# system call counts
# (c) 2010, Tom Zanussi <tzanussi@gmail.com>
# Licensed under the terms of the GNU GPL License version 2
#
# Displays system-wide system call totals, broken down by syscall.
# If a [comm] arg is specified, only syscalls called by [comm] are displayed.

import os
import sys

sys.path.append(os.environ['PERF_EXEC_PATH'] + \
	'/scripts/python/Perf-Trace-Util/lib/Perf/Trace')

from perf_trace_context import *
from Core import *
from Util import syscall_name

usage = "perf script -s syscall-counts.py [comm]\n";

for_comm = None

if len(sys.argv) > 2:
	sys.exit(usage)

if len(sys.argv) > 1:
	for_comm = sys.argv[1]

syscalls = autodict()

def trace_begin():
	print "Press control+C to stop and show the summary"

def trace_end():
	print_syscall_totals()

def raw_syscalls__sys_enter(event_name, context, common_cpu,
	common_secs, common_nsecs, common_pid, common_comm,
	common_callchain, id, args):
	if for_comm is not None:
		if common_comm != for_comm:
			return
	try:
		syscalls[id] += 1
	except TypeError:
		syscalls[id] = 1

def syscalls__sys_enter(event_name, context, common_cpu,
	common_secs, common_nsecs, common_pid, common_comm,
	id, args):
	raw_syscalls__sys_enter(**locals())

def print_syscall_totals():
    if for_comm is not None:
	    print "\nsyscall events for %s:\n\n" % (for_comm),
    else:
	    print "\nsyscall events:\n\n",

    print "%-40s  %10s\n" % ("event", "count"),
    print "%-40s  %10s\n" % ("----------------------------------------", \
                                 "-----------"),

    for id, val in sorted(syscalls.iteritems(), key = lambda(k, v): (v, k), \
				  reverse = True):
	    print "%-40s  %10d\n" % (syscall_name(id), val),
pu/v6.7-rc4'>aarch64/hotplug-vcpu/v6.7-rc4</option>
<option value='aarch64/hotplug-vcpu/v6.7-rc5'>aarch64/hotplug-vcpu/v6.7-rc5</option>
<option value='aarch64/hotplug-vcpu/v6.8-rc2'>aarch64/hotplug-vcpu/v6.8-rc2</option>
<option value='aarch64/ktext/head'>aarch64/ktext/head</option>
<option value='aarch64/ktext/v6.5'>aarch64/ktext/v6.5</option>
<option value='aarch64/ktext/v6.6-rc5'>aarch64/ktext/v6.6-rc5</option>
<option value='aarch64/ktext/v6.7'>aarch64/ktext/v6.7</option>
<option value='adfs'>adfs</option>
<option value='cex7'>cex7</option>
<option value='clearfog'>clearfog</option>
<option value='clearfog-4.10'>clearfog-4.10</option>
<option value='clearfog-4.11'>clearfog-4.11</option>
<option value='clearfog-4.12'>clearfog-4.12</option>
<option value='clearfog-4.13'>clearfog-4.13</option>
<option value='clearfog-4.9'>clearfog-4.9</option>
<option value='clkdev'>clkdev</option>
<option value='csi-v6'>csi-v6</option>
<option value='devel-stable'>devel-stable</option>
<option value='drm-armada-devel'>drm-armada-devel</option>
<option value='drm-armada-devel-4.15'>drm-armada-devel-4.15</option>
<option value='drm-armada-fixes'>drm-armada-fixes</option>
<option value='drm-armada-fixes-4.15'>drm-armada-fixes-4.15</option>
<option value='drm-dwhdmi-devel'>drm-dwhdmi-devel</option>
<option value='drm-etnaviv-devel'>drm-etnaviv-devel</option>
<option value='drm-tda9950-fixes'>drm-tda9950-fixes</option>
<option value='drm-tda998x-devel'>drm-tda998x-devel</option>
<option value='drm-tda998x-fixes'>drm-tda998x-fixes</option>
<option value='fec-testing'>fec-testing</option>
<option value='fiq'>fiq</option>
<option value='fixes'>fixes</option>
<option value='fixes-sa1111'>fixes-sa1111</option>
<option value='for-arm-soc'>for-arm-soc</option>
<option value='for-next'>for-next</option>
<option value='hb2'>hb2</option>
<option value='ktext'>ktext</option>
<option value='ktext-current'>ktext-current</option>
<option value='master' selected='selected'>master</option>
<option value='mcbin'>mcbin</option>
<option value='mvneta'>mvneta</option>
<option value='mvpp2'>mvpp2</option>
<option value='net-merged'>net-merged</option>
<option value='net-next'>net-next</option>
<option value='net-queue'>net-queue</option>
<option value='nmi'>nmi</option>
<option value='phy'>phy</option>
<option value='rtc'>rtc</option>
<option value='sa1100'>sa1100</option>
<option value='spectre'>spectre</option>
<option value='to-build'>to-build</option>
<option value='uaccess'>uaccess</option>
<option value='vcpu-rmk'>vcpu-rmk</option>
<option value='wl18xx'>wl18xx</option>
<option value='zii'>zii</option>
</select> <input type='submit' value='switch'/></form></td></tr>
<tr><td class='sub'>Russell King's ARM Linux kernel tree</td><td class='sub right'>Russell King</td></tr></table>
<table class='tabs'><tr><td>
<a href='/cgit/linux-arm.git/'>summary</a><a href='/cgit/linux-arm.git/refs/'>refs</a><a href='/cgit/linux-arm.git/log/drivers/net'>log</a><a href='/cgit/linux-arm.git/tree/drivers/net'>tree</a><a href='/cgit/linux-arm.git/commit/drivers/net'>commit</a><a class='active' href='/cgit/linux-arm.git/diff/drivers/net?id2=b440d677e15ff30009ac4964a0f987db4416918b'>diff</a></td><td class='form'><form class='right' method='get' action='/cgit/linux-arm.git/log/drivers/net'>
<input type='hidden' name='id2' value='b440d677e15ff30009ac4964a0f987db4416918b'/><select name='qt'>
<option value='grep'>log msg</option>
<option value='author'>author</option>
<option value='committer'>committer</option>
<option value='range'>range</option>
</select>
<input class='txt' type='search' size='10' name='q' value=''/>
<input type='submit' value='search'/>
</form>
</td></tr></table>
<div class='path'>path: <a href='/cgit/linux-arm.git/diff/?id2=b440d677e15ff30009ac4964a0f987db4416918b'>root</a>/<a href='/cgit/linux-arm.git/diff/drivers?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers</a>/<a href='/cgit/linux-arm.git/diff/drivers/net?id2=b440d677e15ff30009ac4964a0f987db4416918b'>net</a></div><div class='content'><div class='cgit-panel'><b>diff options</b><form method='get'><input type='hidden' name='id2' value='b440d677e15ff30009ac4964a0f987db4416918b'/><table><tr><td colspan='2'/></tr><tr><td class='label'>context:</td><td class='ctrl'><select name='context' onchange='this.form.submit();'><option value='1'>1</option><option value='2'>2</option><option value='3' selected='selected'>3</option><option value='4'>4</option><option value='5'>5</option><option value='6'>6</option><option value='7'>7</option><option value='8'>8</option><option value='9'>9</option><option value='10'>10</option><option value='15'>15</option><option value='20'>20</option><option value='25'>25</option><option value='30'>30</option><option value='35'>35</option><option value='40'>40</option></select></td></tr><tr><td class='label'>space:</td><td class='ctrl'><select name='ignorews' onchange='this.form.submit();'><option value='0' selected='selected'>include</option><option value='1'>ignore</option></select></td></tr><tr><td class='label'>mode:</td><td class='ctrl'><select name='dt' onchange='this.form.submit();'><option value='0' selected='selected'>unified</option><option value='1'>ssdiff</option><option value='2'>stat only</option></select></td></tr><tr><td/><td class='ctrl'><noscript><input type='submit' value='reload'/></noscript></td></tr></table></form></div><div class='diffstat-header'><a href='/cgit/linux-arm.git/diff/?id2=b440d677e15ff30009ac4964a0f987db4416918b'>Diffstat</a> (limited to 'drivers/net')</div><table summary='diffstat' class='diffstat'><tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/Kconfig</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/Space.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/Space.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/amt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/amt.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/arcnet.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/arcnet/arcnet.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/com20020-pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/arcnet/com20020-pci.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bareudp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bareudp.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_3ad.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_3ad.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_alb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_alb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_debugfs.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_main.c</a></td><td class='right'>587</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_netlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_netlink.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_options.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_options.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_sysfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_sysfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/caif/caif_serial.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/caif/caif_serial.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/caif/caif_virtio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/caif/caif_virtio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/at91_can.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/at91_can.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/bxcan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/bxcan.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/c_can/c_can_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/c_can/c_can_main.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/c_can/c_can_platform.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/c_can/c_can_platform.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/can327.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/can327.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/cc770/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/cc770/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/cc770/cc770.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/cc770/cc770.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ctucanfd/ctucanfd_base.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/ctucanfd/ctucanfd_base.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/bittiming.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/dev/bittiming.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/calc_bittiming.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/dev/calc_bittiming.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/dev/dev.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/netlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/dev/netlink.c</a></td><td class='right'>895</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dummy_can.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/dummy_can.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/esd/esd_402_pci-core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/esd/esd_402_pci-core.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/esd/esdacc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/esd/esdacc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/flexcan/flexcan-core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/flexcan/flexcan-core.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/flexcan/flexcan.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/flexcan/flexcan.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/grcan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/grcan.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ifi_canfd/ifi_canfd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/ifi_canfd/ifi_canfd.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/janz-ican3.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/janz-ican3.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/kvaser_pciefd/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/kvaser_pciefd/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/kvaser_pciefd/kvaser_pciefd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/kvaser_pciefd/kvaser_pciefd.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c</a> (renamed from drivers/net/can/kvaser_pciefd.c)</td><td class='right'>415</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/m_can.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/m_can.c</a></td><td class='right'>442</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/m_can.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/m_can.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/m_can_pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/m_can_pci.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/m_can_platform.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/m_can_platform.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/tcan4x5x-core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/tcan4x5x-core.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/tcan4x5x.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/tcan4x5x.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/mscan/mscan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/mscan/mscan.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/peak_canfd/peak_canfd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/peak_canfd/peak_canfd.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/peak_canfd/peak_canfd_user.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/peak_canfd/peak_canfd_user.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/peak_canfd/peak_pciefd_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/peak_canfd/peak_pciefd_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rcar/rcar_can.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rcar/rcar_can.c</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rcar/rcar_canfd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rcar/rcar_canfd.c</a></td><td class='right'>926</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rockchip/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/rockchip_canfd-core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rockchip/rockchip_canfd-core.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/rockchip_canfd-timestamp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rockchip/rockchip_canfd-timestamp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/rockchip_canfd-tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rockchip/rockchip_canfd-tx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sja1000/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/peak_pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sja1000/peak_pci.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/peak_pcmcia.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sja1000/peak_pcmcia.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/sja1000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sja1000/sja1000.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/sja1000_platform.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sja1000/sja1000_platform.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/slcan/slcan-core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/slcan/slcan-core.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/softing/softing_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/softing/softing_main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/hi311x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/hi311x.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251x.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sun4i_can.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sun4i_can.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ti_hecc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/ti_hecc.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/ems_usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/ems_usb.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/esd_usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/esd_usb.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/es58x_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/etas_es58x/es58x_core.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/es58x_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/etas_es58x/es58x_devlink.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/es58x_fd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/etas_es58x/es58x_fd.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/f81604.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/f81604.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/gs_usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/gs_usb.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/kvaser_usb.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/nct6694_canfd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/nct6694_canfd.c</a></td><td class='right'>831</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb_core.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb_core.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_fd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb_fd.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_pro.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb_pro.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_pro.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb_pro.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/ucan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/ucan.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/usb_8dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/usb_8dev.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/vcan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/vcan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/vxcan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/vxcan.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/xilinx_can.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/xilinx_can.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_common.c</a></td><td class='right'>904</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_mdio.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_mmap.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_mmap.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_priv.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_priv.h</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_regs.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_serdes.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_serdes.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/bcm_sf2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/bcm_sf2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/dsa_loop.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/dsa_loop.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/dsa_loop.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/dsa_loop.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/dsa_loop_bdinfo.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/dsa_loop_bdinfo.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/hirschmann/hellcreek.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/hirschmann/hellcreek.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/hirschmann/hellcreek_ptp.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ks8995.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/ks8995.c</a></td><td class='right'>857</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/lantiq_gswip.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq/lantiq_gswip.c</a></td><td class='right'>518</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/lantiq_gswip.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq/lantiq_gswip.h</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/lantiq_gswip_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq/lantiq_gswip_common.c</a></td><td class='right'>1739</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/lantiq_pce.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq/lantiq_pce.h</a> (renamed from drivers/net/dsa/lantiq_pce.h)</td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/mxl-gsw1xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq/mxl-gsw1xx.c</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/mxl-gsw1xx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq/mxl-gsw1xx.h</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq_gswip.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq_gswip.c</a></td><td class='right'>2270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.5%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz8.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz8.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz8.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz8.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz8_reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz8_reg.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz9477.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz9477.c</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz9477.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz9477.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz9477_i2c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz9477_i2c.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz9477_reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz9477_reg.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_common.c</a></td><td class='right'>971</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_common.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_dcb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_dcb.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_ptp.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_ptp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_spi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_spi.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/lan937x.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/lan937x.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/lan937x_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/lan937x_main.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/lan937x_reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/lan937x_reg.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mt7530-mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mt7530-mdio.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mt7530-mmio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mt7530-mmio.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mt7530.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mt7530.c</a></td><td class='right'>617</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mt7530.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mt7530.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6060.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6060.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/chip.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/chip.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/chip.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/chip.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/devlink.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/global2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/global2.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/hwtstamp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/hwtstamp.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/hwtstamp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/hwtstamp.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/leds.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/leds.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/pcs-6185.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/pcs-6185.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/pcs-6352.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/pcs-6352.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/pcs-639x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/pcs-639x.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/phy.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/port.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/ptp.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/ptp.h</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/felix.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/ocelot/felix.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/felix.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/ocelot/felix.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/felix_vsc9959.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/ocelot/felix_vsc9959.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/ocelot_ext.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/ocelot/ocelot_ext.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/ar9331.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/qca/ar9331.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/qca8k-8xxx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/qca/qca8k-8xxx.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/qca8k-common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/qca/qca8k-common.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/qca8k.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/qca/qca8k.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/realtek-mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/realtek-mdio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/realtek-smi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/realtek-smi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/realtek.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/realtek.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl8365mb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/rtl8365mb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl8366-core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/rtl8366-core.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl8366rb-leds.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/rtl8366rb-leds.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl8366rb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/rtl8366rb.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl8366rb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/rtl8366rb.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl83xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/rtl83xx.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/rzn1_a5psw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/rzn1_a5psw.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_ethtool.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_main.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_mdio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_ptp.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_ptp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_static_config.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_static_config.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_tas.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_tas.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/vitesse-vsc73xx-core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/vitesse-vsc73xx-core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/xrs700x/xrs700x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/xrs700x/xrs700x.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/yt921x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/yt921x.c</a></td><td class='right'>3006</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/yt921x.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/yt921x.h</a></td><td class='right'>567</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dummy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dummy.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/eql.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/eql.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/3c515.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/3com/3c515.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/3c574_cs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/3com/3c574_cs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/3c589_cs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/3com/3c589_cs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/3c59x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/3com/3c59x.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/axnet_cs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/8390/axnet_cs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/pcnet_cs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/8390/pcnet_cs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/actions/owl-emac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/actions/owl-emac.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/adi/adin1110.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/adi/adin1110.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/agere/et131x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/agere/et131x.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/airoha/Kconfig</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/airoha/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/airoha/airoha_eth.c</a> (renamed from drivers/net/ethernet/mediatek/airoha_eth.c)</td><td class='right'>2642</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 89.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_eth.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/airoha/airoha_eth.h</a></td><td class='right'>673</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_npu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/airoha/airoha_npu.c</a></td><td class='right'>783</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_ppe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/airoha/airoha_ppe.c</a></td><td class='right'>1561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/airoha/airoha_ppe_debugfs.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/airoha/airoha_regs.h</a></td><td class='right'>923</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_tse.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/altera/altera_tse.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_tse_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/altera/altera_tse_main.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_admin_defs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_admin_defs.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_com.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_com.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_com.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_com.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_debugfs.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_debugfs.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_devlink.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_devlink.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_devlink.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_ethtool.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_netdev.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_netdev.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_netdev.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_phc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_phc.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_phc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_phc.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_regs_defs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_regs_defs.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/a2065.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/a2065.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/amd8111e.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/amd8111e.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/au1000_eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/au1000_eth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/declance.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/declance.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pcnet32.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pcnet32.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/adminq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/adminq.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/auxbus.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/auxbus.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/core.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/core.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/debugfs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/devlink.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/main.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/sunlance.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/sunlance.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-common.h</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-dcb.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-desc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-desc.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-dev.c</a></td><td class='right'>453</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-drv.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-drv.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c</a></td><td class='right'>399</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-i2c.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-main.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-mdio.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-pci.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-platform.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-platform.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-pps.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-pps.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-ptp.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-selftest.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-selftest.c</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-smn.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-smn.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe.h</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apm/xgene-v2/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apm/xgene-v2/mdio.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apple/bmac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apple/bmac.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apple/mace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apple/mace.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_hw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_main.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_nic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_nic.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_ptp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_ptp.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_ring.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_ring.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/arc/emac_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/arc/emac_main.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/arc/emac_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/arc/emac_mdio.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/ag71xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/atheros/ag71xx.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1c/atl1c_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/atheros/atl1c/atl1c_main.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1e/atl1e_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/atheros/atl1e/atl1e_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atlx/atl1.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/atheros/atlx/atl1.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atlx/atl2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/atheros/atlx/atl2.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/asp2/bcmasp.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/asp2/bcmasp.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/b44.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/b44.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bcm63xx_enet.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bcm63xx_enet.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bcmsysport.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bcmsysport.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bgmac-platform.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bgmac-platform.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bgmac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bgmac.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bgmac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bgmac.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge.h</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_auxr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_auxr.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_auxr.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_auxr.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_core.c</a></td><td class='right'>420</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_db.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_db.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_devlink.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_devlink.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_devlink.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_ethtool.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_ethtool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_ethtool.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_hwrm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm.c</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_hwrm.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c</a></td><td class='right'>1185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_netdev.c</a></td><td class='right'>2485</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_netdev.h</a></td><td class='right'>454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_resc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_resc.c</a></td><td class='right'>617</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_resc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_resc.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_rmem.c</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnge/bnge_rmem.h</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt.c</a></td><td class='right'>2154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_dim.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_dim.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c</a></td><td class='right'>501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h</a></td><td class='right'>10720</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 44.8%;'/><td class='none' style='width: 55.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/cnic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/cnic.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/genet/bcmgenet.c</a></td><td class='right'>1417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/genet/bcmgenet.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/genet/bcmmii.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/genet/bcmmii.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/tg3.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/tg3.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/tg3.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/tg3.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_ioc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/brocade/bna/bfa_ioc.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bnad.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/brocade/bna/bnad.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bnad_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/brocade/bna/bnad_ethtool.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cadence/macb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cadence/macb.h</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cadence/macb_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cadence/macb_main.c</a></td><td class='right'>1121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cadence/macb_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cadence/macb_ptp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/common/cavium_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/common/cavium_ptp.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/lio_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/lio_core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/lio_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/lio_main.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/lio_vf_main.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_device.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/octeon_device.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_device.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/octeon_device.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/octeon_main.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_nic.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/octeon_nic.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/request_manager.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/request_manager.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/response_manager.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/response_manager.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/octeon/octeon_mgmt.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/nicvf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/thunder/nicvf_main.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/nicvf_queues.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/thunder/nicvf_queues.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/thunder_bgx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/thunder/thunder_bgx.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/cxgb2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb/cxgb2.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/pm3393.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb/pm3393.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/sge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb/sge.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/l2t.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb3/l2t.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/l2t.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb3/l2t.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/sge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb3/sge.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/sched.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/sched.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/sched.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/sched.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/sge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/sge.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/t4_hw.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/sge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4vf/sge.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_io.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_io.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_main.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/cq_desc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/cq_desc.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/cq_enet_desc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/cq_enet_desc.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_clsf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_clsf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_clsf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_clsf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_ethtool.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_main.c</a></td><td class='right'>782</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_res.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_res.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_res.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_res.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_rq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_rq.c</a></td><td class='right'>436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_rq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_rq.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_wq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_wq.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_wq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_wq.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_cq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/vnic_cq.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_devcmd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/vnic_devcmd.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_enet.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/vnic_enet.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_rq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/vnic_rq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_wq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/vnic_wq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cortina/gemini.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cortina/gemini.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/davicom/dm9000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/davicom/dm9000.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/21142.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/21142.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/de2104x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/de2104x.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/dmfe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/dmfe.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/interrupt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/interrupt.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/pnic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/pnic.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/pnic2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/pnic2.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/timer.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/timer.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/tulip_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/tulip_core.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/uli526x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/uli526x.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/winbond-840.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/winbond-840.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/xircom_cb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/xircom_cb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dlink/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dlink/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dlink/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dlink/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dlink/dl2k.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dlink/dl2k.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dlink/dl2k.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dlink/dl2k.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dlink/sundance.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dlink/sundance.c</a></td><td class='right'>1990</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ec_bhf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ec_bhf.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/emulex/benet/be.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_cmds.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/emulex/benet/be_cmds.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_cmds.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/emulex/benet/be_cmds.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/emulex/benet/be_ethtool.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/emulex/benet/be_main.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/engleder/tsnep.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/engleder/tsnep_main.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/engleder/tsnep_ptp.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/faraday/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/faraday/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/faraday/ftgmac100.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/faraday/ftgmac100.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fealnx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fealnx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa/dpaa_eth.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa2/dpaa2-ethtool.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-xsk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa2/dpaa2-xsk.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/Kconfig</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc.c</a></td><td class='right'>1068</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc.h</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc4_debugfs.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc4_debugfs.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc4_hw.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_pf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc4_pf.c</a></td><td class='right'>1102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_cbdr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_cbdr.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_ethtool.c</a></td><td class='right'>365</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_hw.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_pf.c</a></td><td class='right'>472</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_pf.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_pf_common.c</a></td><td class='right'>439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_pf_common.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_ptp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_qos.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_qos.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_vf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_vf.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c</a></td><td class='right'>845</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/ntmp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/ntmp.c</a></td><td class='right'>457</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/ntmp_private.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/ntmp_private.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fec.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fec.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fec_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fec_main.c</a></td><td class='right'>550</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fec_mpc52xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fec_mpc52xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fec_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fec_ptp.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fman/fman.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_dtsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fman/fman_dtsec.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_memac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fman/fman_memac.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fman/mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fman/mac.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fsl_pq_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fsl_pq_mdio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/gianfar.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/gianfar.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/gianfar_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/gianfar_ethtool.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/ucc_geth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/ucc_geth.c</a></td><td class='right'>630</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/ucc_geth.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/ucc_geth.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/ucc_geth_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/ucc_geth_ethtool.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funcore/fun_queue.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fungible/funcore/fun_queue.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funcore/fun_queue.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fungible/funcore/fun_queue.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fungible/funeth/funeth.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fungible/funeth/funeth_ethtool.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fungible/funeth/funeth_main.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve.h</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_adminq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_adminq.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_adminq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_adminq.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_buffer_mgmt_dqo.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_buffer_mgmt_dqo.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_desc_dqo.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_desc_dqo.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_dqo.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_dqo.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_ethtool.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_main.c</a></td><td class='right'>957</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_ptp.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_rx.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_rx_dqo.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_rx_dqo.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_tx.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_tx_dqo.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_tx_dqo.c</a></td><td class='right'>438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_utils.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_utils.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c</a></td><td class='right'>349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_err.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c</a></td><td class='right'>483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_trace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_trace.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hip04_eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hip04_eth.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hnae.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hnae.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_enet.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_enet.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_ethtool.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hnae3.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hnae3.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hnae3.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hnae3.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c</a></td><td class='right'>1088</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_enet.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_enet.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c</a></td><td class='right'>1370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns_mdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_devlink.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_ethtool.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_port.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c</a></td><td class='right'>915</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.h</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_common.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_common.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_csr.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_csr.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c</a></td><td class='right'>776</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_eqs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_eqs.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c</a></td><td class='right'>426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_intf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_intf.h</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c</a></td><td class='right'>557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c</a></td><td class='right'>436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_hwif.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_irq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_irq.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_lld.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_lld.c</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_lld.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_lld.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_main.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c</a></td><td class='right'>860</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c</a></td><td class='right'>496</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c</a></td><td class='right'>885</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_pci_id_tbl.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_pci_id_tbl.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_rss.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_rss.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_rss.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_rss.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_rx.c</a></td><td class='right'>551</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_rx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_rx.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_tx.c</a></td><td class='right'>779</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_tx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_tx.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_wq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_wq.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_wq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic3/hinic3_wq.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/emac/core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ibmveth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/ibmveth.c</a></td><td class='right'>579</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ibmveth.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/ibmveth.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ibmvnic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/ibmvnic.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ibmvnic.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/ibmvnic.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e100.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e100.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000/e1000.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000/e1000_ethtool.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000/e1000_hw.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000/e1000_main.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/defines.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/defines.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/e1000.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/e1000.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/ethtool.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/ich8lan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/ich8lan.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/ich8lan.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/ich8lan.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/mac.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/netdev.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/nvm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/nvm.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/ptp.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_common.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_pci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_pf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_pf.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_pf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_pf.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_vf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_vf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_adminq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_adminq.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_adminq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_adminq.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_client.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_client.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_common.c</a></td><td class='right'>1229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_dcb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_dcb.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_dcb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_dcb.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_debugfs.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_devlink.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_ethtool.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_main.c</a></td><td class='right'>594</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_nvm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_nvm.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_prototype.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_prototype.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_ptp.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_txrx.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_txrx.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_type.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_xsk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_xsk.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_xsk.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_xsk.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_adminq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_adminq.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_adminq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_adminq.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_adv_rss.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_adv_rss.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_adv_rss.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_adv_rss.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_common.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_ethtool.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_main.c</a></td><td class='right'>649</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_prototype.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_prototype.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_ptp.c</a></td><td class='right'>492</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_ptp.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_trace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_trace.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_txrx.c</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_txrx.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_type.h</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_types.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_types.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_virtchnl.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/devlink/devlink.c</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/health.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/devlink/health.c</a></td><td class='right'>551</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/health.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/devlink/health.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/devlink/port.c</a> (renamed from drivers/net/ethernet/intel/ice/devlink/devlink_port.c)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/port.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/devlink/port.h</a> (renamed from drivers/net/ethernet/intel/ice/devlink/devlink_port.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_adapter.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_adapter.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_adapter.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_adapter.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_adminq_cmd.h</a></td><td class='right'>510</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_arfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_arfs.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_arfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_arfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_base.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_base.c</a></td><td class='right'>580</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_base.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_base.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_cgu_regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_cgu_regs.h</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_common.c</a></td><td class='right'>1570</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_common.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_controlq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_controlq.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_controlq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_controlq.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dcb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dcb.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dcb_lib.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_lib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dcb_lib.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_nl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dcb_nl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ddp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ddp.c</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ddp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ddp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_debugfs.c</a></td><td class='right'>633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_devids.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_devids.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dpll.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dpll.c</a></td><td class='right'>1475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dpll.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dpll.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_eswitch.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_eswitch.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_eswitch.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_eswitch.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ethtool.c</a></td><td class='right'>456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ethtool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ethtool.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fdir.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_fdir.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fdir.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_fdir.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_flex_pipe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_flex_pipe.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_flex_pipe.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_flex_pipe.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_flex_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_flex_type.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_flow.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_flow.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_flow.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_flow.h</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fw_update.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_fw_update.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fwlog.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_fwlog.c</a></td><td class='right'>472</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fwlog.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_fwlog.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_gnss.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_gnss.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_gnss.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_gnss.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_hw_autogen.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_hw_autogen.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_idc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_idc.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_idc_int.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_idc_int.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_irq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_irq.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_irq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_irq.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_lag.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_lag.c</a></td><td class='right'>1011</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_lag.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_lag.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_lib.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_lib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_lib.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_main.c</a></td><td class='right'>912</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_nvm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_nvm.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_parser.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_parser.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_parser_rt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_parser_rt.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_protocol_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_protocol_type.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ptp.c</a></td><td class='right'>1051</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ptp.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ptp_consts.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ptp_consts.h</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ptp_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ptp_hw.c</a></td><td class='right'>1458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ptp_hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ptp_hw.h</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_repr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_repr.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_sbq_cmd.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sched.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_sched.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sf_eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_sf_eth.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sriov.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_sriov.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sriov.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_sriov.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_switch.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_switch.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_tc_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_tc_lib.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_tc_lib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_tc_lib.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_trace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_trace.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_tspll.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_tspll.c</a></td><td class='right'>626</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_tspll.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_tspll.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_txrx.c</a></td><td class='right'>929</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_txrx.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_txrx_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_txrx_lib.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_txrx_lib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_txrx_lib.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_type.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vf_lib.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_lib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vf_lib.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_lib_private.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vf_lib_private.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_mbx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vf_mbx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vlan_mode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vlan_mode.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_xsk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_xsk.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_xsk.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_xsk.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/allowlist.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/virt/allowlist.c</a> (renamed from drivers/net/ethernet/intel/ice/ice_virtchnl_allowlist.c)</td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/allowlist.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/virt/allowlist.h</a> (renamed from drivers/net/ethernet/intel/ice/ice_virtchnl_allowlist.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/fdir.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/virt/fdir.c</a> (renamed from drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.c)</td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/fdir.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/virt/fdir.h</a> (renamed from drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/queues.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/virt/queues.c</a></td><td class='right'>975</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/queues.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/virt/queues.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/rss.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/virt/rss.c</a></td><td class='right'>1922</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/rss.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/virt/rss.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/virtchnl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/virt/virtchnl.c</a> (renamed from drivers/net/ethernet/intel/ice/ice_virtchnl.c)</td><td class='right'>1915</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/virtchnl.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/virt/virtchnl.h</a> (renamed from drivers/net/ethernet/intel/ice/ice_virtchnl.h)</td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf.h</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_controlq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_controlq.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_controlq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_controlq.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_controlq_api.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_dev.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_ethtool.c</a></td><td class='right'>511</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_idc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_idc.c</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_lib.c</a></td><td class='right'>570</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_main.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_mem.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_mem.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_ptp.c</a></td><td class='right'>1021</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_ptp.h</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_txrx.c</a></td><td class='right'>1976</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_txrx.h</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_vf_dev.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_virtchnl.c</a></td><td class='right'>1755</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_virtchnl.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c</a></td><td class='right'>673</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/virtchnl2.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/virtchnl2.h</a></td><td class='right'>590</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/xdp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/xdp.c</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/xdp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/xdp.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/xsk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/xsk.c</a></td><td class='right'>633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/xsk.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/xsk.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_82575.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/e1000_82575.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_i210.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/e1000_i210.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_nvm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/e1000_nvm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/igb.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/igb_ethtool.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/igb_main.c</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/igb_ptp.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb_xsk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/igb_xsk.c</a></td><td class='right'>562</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igbvf/ethtool.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/igbvf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igbvf/igbvf.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igbvf/netdev.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_base.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_base.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_base.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_base.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_defines.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_defines.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_diag.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_diag.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_ethtool.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_hw.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_i225.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_i225.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_mac.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_main.c</a></td><td class='right'>528</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_nvm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_nvm.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_nvm.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_nvm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_phy.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_ptp.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_regs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_tsn.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_tsn.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_tsn.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_tsn.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_xdp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_xdp.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/devlink/devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/devlink/devlink.c</a></td><td class='right'>558</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/devlink/devlink.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/devlink/devlink.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/devlink/region.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/devlink/region.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c</a></td><td class='right'>4043</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c</a></td><td class='right'>707</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_main.c</a></td><td class='right'>1032</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_type.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h</a></td><td class='right'>1032</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/defines.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/defines.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/ethtool.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/ipsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/ipsec.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/ixgbevf.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/mbx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/mbx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/mbx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/mbx.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/vf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/vf.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/vf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/vf.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libeth/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libeth/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/priv.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libeth/priv.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libeth/rx.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libeth/tx.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/xdp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libeth/xdp.c</a></td><td class='right'>451</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/xsk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libeth/xsk.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libie/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libie/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libie/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libie/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libie/adminq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libie/adminq.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libie/fwlog.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libie/fwlog.c</a></td><td class='right'>1115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libie/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libie/rx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/korina.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/korina.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/lantiq_etop.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/lantiq_etop.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mv643xx_eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mv643xx_eth.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvneta.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvneta.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvneta_bm.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvneta_bm.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvpp2/mvpp2.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_ethtool.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_main.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_main.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_rx.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_rx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_tx.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_tx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_tx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cgx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cgx.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cgx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cgx.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/reg.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/common.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mbox.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/mbox.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mbox.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/mbox.h</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/ptp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rpm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rpm.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rpm.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rpm.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c</a></td><td class='right'>1042</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.h</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/cn20k.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c</a></td><td class='right'>404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/qos.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/qos.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/rep.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/rep.c</a></td><td class='right'>879</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/rep.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/rep.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_counter.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/prestera/prestera_counter.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/prestera/prestera_main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/prestera/prestera_pci.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/pxa168_eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/pxa168_eth.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/skge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/skge.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/sky2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/sky2.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_eth_path.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_eth_path.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_eth_soc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_eth_soc.c</a></td><td class='right'>551</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_eth_soc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_eth_soc.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_ppe_offload.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_ppe_offload.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_star_emac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_star_emac.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_wed.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_wed.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_wed_mcu.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/alloc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/alloc.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/catas.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/catas.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_clock.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_clock.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_ethtool.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_netdev.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_rx.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_tx.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/main.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/mlx4.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/mlx4.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/mlx4_en.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/mr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/mr.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/port.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/Makefile</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/cmd.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/cq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/cq.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/dev.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/devlink.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/devlink.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/devlink.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/dpll.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/dpll.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/fs.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/fs_ethtool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/fs_ethtool.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/health.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/health.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/mapping.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/mapping.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/params.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/params.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/params.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/params.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/port.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/port.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/port.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/qos.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/qos.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rss.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/rss.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rss.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/rss.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_hmfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_hmfs.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_smfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_smfs.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tir.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tir.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tir.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/trap.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/trap.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/trap.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/trap.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c</a></td><td class='right'>297</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c</a></td><td class='right'>837</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c</a></td><td class='right'>1155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_common.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_dim.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_dim.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_fs.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_main.c</a></td><td class='right'>865</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_rep.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_rx.c</a></td><td class='right'>490</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_tc.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_tx.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/eq.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/adj_vport.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/adj_vport.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c</a></td><td class='right'>1754</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/eswitch.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/eswitch.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c</a></td><td class='right'>567</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/events.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/events.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.c</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_pool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_pool.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_pool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_pool.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fw.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/health.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/health.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/hwmon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/hwmon.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/hwmon.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/hwmon.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/debugfs.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c</a></td><td class='right'>464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c</a></td><td class='right'>746</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c</a></td><td class='right'>440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c</a></td><td class='right'>799</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/st.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/main.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/port.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/rdma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/rdma.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/rdma.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/rdma.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/rl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/rl.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/diag/dev_tracepoint.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/diag/dev_tracepoint.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/sf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/sf.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_action.c)</td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_action.h)</td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_buddy.c)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_buddy.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc.c)</td><td class='right'>823</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc.h)</td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.c</a></td><td class='right'>1101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_cmd.c)</td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_cmd.h)</td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_context.c)</td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_context.h)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_debug.c)</td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_debug.h)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_definer.c)</td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_definer.h)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c</a></td><td class='right'>1641</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/internal.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/internal.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_internal.h)</td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_matcher.c)</td><td class='right'>947</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_matcher.h)</td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.c</a></td><td class='right'>640</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.h</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pat_arg.c)</td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pat_arg.h)</td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_prm.h)</td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_rule.c)</td><td class='right'>312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_rule.h)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.c)</td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.h)</td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_table.c)</td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_table.h)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_vport.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_vport.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_action.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_action.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_arg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_arg.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_arg.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_buddy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_buddy.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_buddy.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c)</td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_definer.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_definer.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_definer.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_domain.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_domain.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c)</td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_fw.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_fw.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_icm_pool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_icm_pool.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_matcher.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_matcher.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ptrn.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ptrn.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ptrn.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_rule.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_rule.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_send.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_send.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c)</td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h)</td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v0.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v0.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c)</td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v2.c)</td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v3.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v3.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_table.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_table.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_table.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_types.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_types.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.c</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/fs_dr.c)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/fs_dr.h)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h)</td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr_ste_v1.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr_ste_v1.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr_ste_v1.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5dr.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5dr.h</a> (renamed from drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5dr.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/vport.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/vport.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/wc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/wc.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/core.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/core.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/core_linecards.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/core_thermal.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/i2c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/i2c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/pci.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/pci_hw.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/trap.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/trap.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/txheader.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/txheader.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_csr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_csr.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_csr.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_csr.h</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_devlink.c</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c</a></td><td class='right'>1843</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_fw.c</a></td><td class='right'>1384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_fw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_fw.h</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_fw_log.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_fw_log.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_fw_log.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_fw_log.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c</a></td><td class='right'>574</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_hwmon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_hwmon.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_irq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_irq.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_mac.c</a></td><td class='right'>372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_mac.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_mdio.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_netdev.c</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_netdev.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_netdev.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_pci.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_phylink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_phylink.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_rpc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_rpc.c</a></td><td class='right'>618</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_rpc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_rpc.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_time.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_time.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_tlv.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_tlv.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_tlv.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_tlv.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_txrx.c</a></td><td class='right'>1472</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_txrx.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8842.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/micrel/ks8842.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8851_spi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/micrel/ks8851_spi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ksz884x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/micrel/ksz884x.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan743x_ethtool.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan743x_main.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan743x_main.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan743x_ptp.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan743x_ptp.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan865x/lan865x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan865x/lan865x.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_main.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_main.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_port.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_switchdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_switchdev.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan969x/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan969x/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan969x/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan969x/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.c</a> (renamed from drivers/net/ethernet/microchip/lan969x/lan969x.c)</td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.h</a> (renamed from drivers/net/ethernet/microchip/lan969x/lan969x.h)</td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_calendar.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_calendar.c</a> (renamed from drivers/net/ethernet/microchip/lan969x/lan969x_calendar.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_regs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_regs.c</a> (renamed from drivers/net/ethernet/microchip/lan969x/lan969x_regs.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_rgmii.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_rgmii.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_ag_api.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_ag_api.c</a></td><td class='right'>3843</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_impl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_impl.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_main.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_main.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_packet.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_port.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_port.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_port.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/gdma_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/mana/gdma_main.c</a></td><td class='right'>812</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/hw_channel.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/mana/hw_channel.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/mana_bpf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/mana/mana_bpf.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/mana_en.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/mana/mana_en.c</a></td><td class='right'>952</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/mana_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/mana/mana_ethtool.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mscc/ocelot.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_net.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mscc/ocelot_net.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mscc/ocelot_ptp.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mscc/ocelot_stats.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_vsc7514.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mscc/ocelot_vsc7514.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/Kconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/rnpgbe/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/myricom/myri10ge/myri10ge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/myricom/myri10ge/myri10ge.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/natsemi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/natsemi/natsemi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/ns83820.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/natsemi/ns83820.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/s2io.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/neterion/s2io.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/bpf/cmsg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/bpf/cmsg.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/bpf/offload.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/bpf/offload.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/crypto/ipsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/crypto/ipsec.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/crypto/tls.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/crypto/tls.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/devlink_param.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/devlink_param.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/metadata.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/flower/metadata.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfd3/dp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfd3/dp.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfdk/dp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfdk/dp.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_hwmon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfp_hwmon.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfp_main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfp_net_common.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfp_net_debugfs.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/nvidia/forcedeth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/nvidia/forcedeth.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oa_tc6.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/oa_tc6.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/packetengines/hamachi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/packetengines/hamachi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/packetengines/yellowfin.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/packetengines/yellowfin.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pasemi/pasemi_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pasemi/pasemi_mac.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_api.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_api.h</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_aux.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_aux.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_aux.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_aux.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_dev.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_dev.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_dev.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_ethtool.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_if.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_if.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_lif.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_lif.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_lif.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_lif.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_main.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_phc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_phc.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_txrx.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_debug.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_debug.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_dev.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_devlink.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_hsi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_hsi.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_hw.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_hw.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_main.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_mcp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_mcp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_ooo.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_ooo.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_ptp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_sriov.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_sriov.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_ethtool.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_filter.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_filter.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_fp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_fp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_main.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_ptp.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_ptp.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qla3xxx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qla3xxx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-sgmii.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/emac/emac-sgmii.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/ppe/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/ppe/ppe.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/ppe/ppe.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe_config.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/ppe/ppe_config.c</a></td><td class='right'>2034</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe_config.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/ppe/ppe_config.h</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c</a></td><td class='right'>847</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe_regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/ppe/ppe_regs.h</a></td><td class='right'>591</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_spi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/qca_spi.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_spi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/qca_spi.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/8139too.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/8139too.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/atp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/atp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/r8169.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/r8169.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/r8169_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/r8169_main.c</a></td><td class='right'>888</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/r8169_phy_config.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/r8169_phy_config.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/rtase/rtase.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/rtase/rtase.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/rtase/rtase_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/rtase/rtase_main.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/ravb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/ravb.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/ravb_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/ravb_main.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/ravb_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/ravb_ptp.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rcar_gen4_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rcar_gen4_ptp.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rcar_gen4_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rcar_gen4_ptp.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rswitch.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rswitch.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rswitch_l2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rswitch_l2.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rswitch_l2.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rswitch_l2.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rswitch_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rswitch_main.c</a> (renamed from drivers/net/ethernet/renesas/rswitch.c)</td><td class='right'>454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rtsn.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rtsn.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/sh_eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/sh_eth.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/rocker_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/rocker/rocker_main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/rocker_ofdpa.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/rocker/rocker_ofdpa.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/seeq/ether3.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/seeq/ether3.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef10.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ef10.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ef100_ethtool.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ef100_netdev.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_nic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ef100_nic.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ef100_tx.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_channels.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx_channels.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx_common.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx_common.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx_devlink.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_reflash.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx_reflash.c</a></td><td class='right'>522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_reflash.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx_reflash.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ethtool.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ethtool_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ethtool_common.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ethtool_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ethtool_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/efx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/efx.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/efx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/efx.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/ethtool.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/falcon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/falcon.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/farch.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/farch.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/net_driver.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/net_driver.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/nic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/nic.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/nic.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/nic.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/rx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/tx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/tx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/tx.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/fw_formats.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/fw_formats.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/io.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/io.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mae.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mae.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mae.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mae.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mcdi.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mcdi.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_pcol.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mcdi_pcol.h</a></td><td class='right'>13844</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.0%;'/><td class='rem' style='width: 36.8%;'/><td class='none' style='width: 42.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_port.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mcdi_port.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_port_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mcdi_port_common.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/net_driver.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/net_driver.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/nic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/nic.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/nic_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/nic_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ptp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ptp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/rx_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/rx_common.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/efx_channels.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/efx_channels.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/efx_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/efx_common.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/ethtool.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/ethtool_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/ethtool_common.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/ethtool_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/ethtool_common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/farch.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/farch.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mcdi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/mcdi.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mcdi_pcol.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/mcdi_pcol.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/net_driver.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/net_driver.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/nic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/nic.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/nic_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/nic_common.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/ptp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/ptp.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/rx_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/rx_common.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/siena.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/siena.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/tc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc_conntrack.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/tc_conntrack.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc_encap_actions.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/tc_encap_actions.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/tx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/tx.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sgi/ioc3-eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sgi/ioc3-eth.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sis/sis190.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sis/sis190.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sis/sis900.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sis/sis900.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/epic100.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/smsc/epic100.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smc91c92_cs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/smsc/smc91c92_cs.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smsc911x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/smsc/smsc911x.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/socionext/netsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/socionext/netsec.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/spacemit/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/spacemit/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/spacemit/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/spacemit/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/spacemit/k1_emac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/spacemit/k1_emac.c</a></td><td class='right'>2162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/spacemit/k1_emac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/spacemit/k1_emac.h</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/Kconfig</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/chain_mode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/chain_mode.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/common.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c</a></td><td class='right'>356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c</a></td><td class='right'>1615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac1000.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c</a></td><td class='right'>501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/hwif.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/hwif.c</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/hwif.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/hwif.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/mmc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/mmc.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/ring_mode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/ring_mode.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_est.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_est.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_est.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_est.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_main.c</a></td><td class='right'>1635</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c</a></td><td class='right'>478</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/cassini.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/cassini.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/ldmvsw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/ldmvsw.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/niu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/niu.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/niu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/niu.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunbmac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sunbmac.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sungem.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sungem.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunhme.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sunhme.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunqe.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sunqe.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunvnet.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sunvnet.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunvnet_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sunvnet_common.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_driver.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sunplus/spl2sw_driver.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/dwc-xlgmac-net.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/synopsys/dwc-xlgmac-net.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tehuti.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/tehuti/tehuti.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tn40.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/tehuti/tn40.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tn40.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/tehuti/tn40.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tn40_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/tehuti/tn40_mdio.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/am65-cpsw-ethtool.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-nuss.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/am65-cpsw-nuss.c</a></td><td class='right'>1001</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-nuss.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/am65-cpsw-nuss.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-qos.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/am65-cpsw-qos.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpts.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/am65-cpts.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_ale.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw_ale.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw_ethtool.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_new.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw_new.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_priv.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw_priv.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_priv.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw_priv.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpts.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpts.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/davinci_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/davinci_mdio.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icss_iep.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icss_iep.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_common.c</a></td><td class='right'>875</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_config.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_config.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_config.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_config.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_prueth.c</a></td><td class='right'>1203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_prueth.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_stats.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_stats.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_stats.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_switch_map.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_switch_map.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssm/icssm_prueth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssm/icssm_prueth.c</a></td><td class='right'>1746</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssm/icssm_prueth.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssm/icssm_prueth.h</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssm/icssm_prueth_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssm/icssm_prueth_ptp.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssm/icssm_switch.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssm/icssm_switch.h</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/netcp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/netcp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/netcp_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/netcp_core.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/netcp_ethss.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/netcp_ethss.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/tlan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/tlan.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/ps3_gelic_net.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/ps3_gelic_net.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/ps3_gelic_net.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/ps3_gelic_net.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/spider_net.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/spider_net.c</a></td><td class='right'>2556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.7%;'/><td class='none' style='width: 89.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/spider_net.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/spider_net.h</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/spider_net_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/spider_net_ethtool.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tundra/tsi108_eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/tundra/tsi108_eth.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/vertexcom/mse102x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/vertexcom/mse102x.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/via/via-rhine.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/via/via-rhine.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/via/via-velocity.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/via/via-velocity.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/Kconfig</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_ethtool.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_ethtool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_ethtool.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_hw.c</a></td><td class='right'>775</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_hw.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_lib.c</a></td><td class='right'>644</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_lib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_lib.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_mbx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_mbx.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_mbx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_mbx.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_ptp.c</a></td><td class='right'>905</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_ptp.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_sriov.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_sriov.c</a></td><td class='right'>929</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_sriov.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_sriov.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_type.h</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_vf.c</a></td><td class='right'>599</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_vf.h</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_vf_common.c</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf_common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_vf_common.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf_lib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_vf_lib.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbe/ngbe_main.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbe/ngbe_type.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbevf/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbevf/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbevf/ngbevf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbevf/ngbevf_main.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbevf/ngbevf_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbevf/ngbevf_type.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c</a></td><td class='right'>530</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_aml.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_main.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_type.h</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbevf/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbevf/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbevf/txgbevf_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbevf/txgbevf_main.c</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbevf/txgbevf_type.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbevf/txgbevf_type.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wiznet/w5100.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wiznet/w5100.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xilinx/Kconfig</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/ll_temac_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xilinx/ll_temac_main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/xilinx_axienet.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xilinx/xilinx_axienet.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/xilinx_axienet_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xilinx/xilinx_axienet_main.c</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/xilinx_emaclite.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xilinx/xilinx_emaclite.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xircom/xirc2ps_cs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xircom/xirc2ps_cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xscale/ixp4xx_eth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xscale/ixp4xx_eth.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/defza.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/fddi/defza.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/fjes_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/fjes/fjes_main.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/geneve.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/geneve.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/gtp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/gtp.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/6pack.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/6pack.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/baycom_epp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/baycom_epp.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/baycom_par.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/baycom_par.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/baycom_ser_fdx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/baycom_ser_fdx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/baycom_ser_hdx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/baycom_ser_hdx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/bpqether.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/bpqether.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/scc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/scc.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/yam.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/yam.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hippi/rrunner.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hippi/rrunner.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/hyperv_net.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/hyperv_net.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/netvsc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/netvsc.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/netvsc_bpf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/netvsc_bpf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/netvsc_drv.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/netvsc_drv.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/rndis_filter.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/rndis_filter.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/at86rf230.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ieee802154/at86rf230.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/ca8210.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ieee802154/ca8210.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ifb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ifb.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v3.1.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v3.1.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v3.5.1.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v3.5.1.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v4.11.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v4.11.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v4.2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v4.2.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v4.5.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v4.5.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v4.7.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v4.7.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v4.9.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v4.9.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v5.0.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v5.0.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v5.5.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v5.5.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_data.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_data.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_interrupt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_interrupt.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_main.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_mem.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_mem.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_modem.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_modem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_smp2p.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_smp2p.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_sysfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_sysfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_uc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_uc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/ipvlan.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipvlan/ipvlan.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/ipvlan_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipvlan/ipvlan_core.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/ipvlan_l3s.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipvlan/ipvlan_l3s.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/ipvlan_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipvlan/ipvlan_main.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/ipvtap.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipvlan/ipvtap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/loopback.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/loopback.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/macsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/macsec.c</a></td><td class='right'>304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/macvlan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/macvlan.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/macvtap.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/macvtap.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/mctp-i2c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/mctp-i2c.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/mctp-i3c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/mctp-i3c.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/mctp-serial.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/mctp-serial.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/mctp-usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/mctp-usb.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/Kconfig</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/fwnode_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/fwnode_mdio.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-airoha.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-airoha.c</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-bcm-unimac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-bcm-unimac.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-i2c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-i2c.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-ipq4019.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-ipq4019.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mux-gpio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-mux-gpio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mux-meson-gxl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-mux-meson-gxl.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-octeon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-octeon.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-realtek-rtl9300.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-realtek-rtl9300.c</a></td><td class='right'>522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-thunder.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-thunder.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/of_mdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/of_mdio.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mii.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mii.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/net_failover.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/net_failover.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netconsole.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netconsole.c</a></td><td class='right'>900</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/bpf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/bpf.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/bus.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/bus.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/dev.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/ethtool.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/health.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/health.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/hwstats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/hwstats.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/ipsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/ipsec.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/netdev.c</a></td><td class='right'>546</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/netdevsim.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/netdevsim.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/psp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/psp.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/udp_tunnels.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/udp_tunnels.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netkit.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netkit.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ntb_netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ntb_netdev.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/Makefile</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/bind.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/bind.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/bind.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/bind.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/crypto.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/crypto.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/crypto.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/crypto.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/crypto_aead.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/crypto_aead.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/crypto_aead.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/crypto_aead.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/io.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/io.c</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/io.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/io.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/main.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/main.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/netlink-gen.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/netlink-gen.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/netlink-gen.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/netlink-gen.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/netlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/netlink.c</a></td><td class='right'>1293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/netlink.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/netlink.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/ovpnpriv.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/ovpnpriv.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/peer.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/peer.c</a></td><td class='right'>1364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/peer.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/peer.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/pktid.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/pktid.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/pktid.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/pktid.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/proto.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/proto.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/skb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/skb.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/socket.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/socket.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/socket.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/socket.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/stats.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/stats.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/stats.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/tcp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/tcp.c</a></td><td class='right'>619</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/tcp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/tcp.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/udp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/udp.c</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/udp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ovpn/udp.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-lynx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-lynx.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-mtk-lynxi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-mtk-lynxi.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-rzn1-miic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-rzn1-miic.c</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-xpcs-plat.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-xpcs-plat.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-xpcs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-xpcs.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-xpcs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-xpcs.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pfcp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pfcp.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/Kconfig</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/Makefile</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/adin.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/adin.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/adin1100.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/adin1100.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/air_en8811h.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/air_en8811h.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/amd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/amd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/aquantia.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/aquantia/aquantia.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/aquantia_firmware.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/aquantia/aquantia_firmware.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/aquantia_hwmon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/aquantia/aquantia_hwmon.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/aquantia_leds.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/aquantia/aquantia_leds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/aquantia_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/aquantia/aquantia_main.c</a></td><td class='right'>822</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/as21xxx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/as21xxx.c</a></td><td class='right'>1088</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/ax88796b.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/ax88796b.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/ax88796b_rust.rs?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/ax88796b_rust.rs</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm-cygnus.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm-cygnus.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm-phy-lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm-phy-lib.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm-phy-ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm-phy-ptp.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm54140.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm54140.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm63xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm63xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm7xxx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm7xxx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm84881.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm84881.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm87xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm87xx.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/broadcom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/broadcom.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/cicada.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/cicada.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/cortina.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/cortina.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/davicom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/davicom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83640.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83640.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83822.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83822.c</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83848.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83848.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83867.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83867.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83869.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83869.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83tc811.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83tc811.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83td510.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83td510.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83tg720.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83tg720.c</a></td><td class='right'>334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/et1011c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/et1011c.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/fixed_phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/fixed_phy.c</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/icplus.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/icplus.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/intel-xway.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/intel-xway.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/lxt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/lxt.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/marvell-88q2xxx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/marvell-88q2xxx.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/marvell-88x2222.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/marvell-88x2222.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/marvell.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/marvell.c</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/marvell10g.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/marvell10g.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-boardinfo.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio-boardinfo.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-boardinfo.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio-boardinfo.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-open-alliance.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio-open-alliance.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-private.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio-private.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio_bus.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio_bus.c</a></td><td class='right'>566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio_bus_provider.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio_bus_provider.c</a></td><td class='right'>442</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio_device.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio_device.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek-ge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mediatek-ge.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mediatek/Kconfig</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mediatek/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/mtk-2p5ge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mediatek/mtk-2p5ge.c</a></td><td class='right'>413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/mtk-ge-soc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mediatek/mtk-ge-soc.c</a> (renamed from drivers/net/phy/mediatek-ge-soc.c)</td><td class='right'>694</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/mtk-ge.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mediatek/mtk-ge.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/mtk-phy-lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mediatek/mtk-phy-lib.c</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/mtk.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mediatek/mtk.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/meson-gxl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/meson-gxl.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/micrel.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/micrel.c</a></td><td class='right'>1795</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/microchip.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/microchip.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/microchip_rds_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/microchip_rds_ptp.c</a></td><td class='right'>1306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/microchip_rds_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/microchip_rds_ptp.h</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/microchip_t1.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/microchip_t1.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/microchip_t1s.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/microchip_t1s.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/motorcomm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/motorcomm.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mscc/mscc.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mscc/mscc_main.c</a></td><td class='right'>525</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mscc/mscc_ptp.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mscc/mscc_ptp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mxl-86110.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mxl-86110.c</a></td><td class='right'>978</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mxl-gpy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mxl-gpy.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/national.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/national.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/ncn26000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/ncn26000.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/nxp-c45-tja11xx-macsec.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/nxp-c45-tja11xx-macsec.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/nxp-c45-tja11xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/nxp-c45-tja11xx.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/nxp-cbtx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/nxp-cbtx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/nxp-tja11xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/nxp-tja11xx.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy-c45.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy-c45.c</a></td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy-caps.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy-caps.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy-core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy-core.c</a></td><td class='right'>461</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy.c</a></td><td class='right'>402</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy_caps.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy_caps.c</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy_device.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy_device.c</a></td><td class='right'>909</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy_led_triggers.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy_led_triggers.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy_link_topology.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy_link_topology.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy_package.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy_package.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phylib-internal.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phylib-internal.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phylib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phylib.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phylink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phylink.c</a></td><td class='right'>1557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/at803x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/at803x.c</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/qca807x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/qca807x.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/qca808x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/qca808x.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/qca83xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/qca83xx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/qcom-phy-lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/qcom-phy-lib.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/qcom.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/qcom.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qsemi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qsemi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qt2025.rs?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qt2025.rs</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/realtek/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/realtek/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek/realtek.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/realtek/realtek.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek/realtek_hwmon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/realtek/realtek_hwmon.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek/realtek_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/realtek/realtek_main.c</a> (renamed from drivers/net/phy/realtek.c)</td><td class='right'>1113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/rockchip.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/rockchip.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/sfp-bus.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/sfp-bus.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/sfp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/sfp.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/sfp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/sfp.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/smsc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/smsc.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/spi_ks8995.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/spi_ks8995.c</a></td><td class='right'>506</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/ste10Xp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/ste10Xp.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/teranetics.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/teranetics.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/uPD60620.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/uPD60620.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/vitesse.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/vitesse.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/xilinx_gmii2rgmii.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/xilinx_gmii2rgmii.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/bsd_comp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/bsd_comp.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/ppp_generic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/ppp_generic.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/ppp_mppe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/ppp_mppe.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/ppp_synctty.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/ppp_synctty.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/pppoe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/pppoe.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/pptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/pptp.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/pd692x0.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/pd692x0.c</a></td><td class='right'>611</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/pse_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/pse_core.c</a></td><td class='right'>1217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/pse_regulator.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/pse_regulator.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/si3474.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/si3474.c</a></td><td class='right'>578</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/tps23881.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/tps23881.c</a></td><td class='right'>911</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/sb1000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/sb1000.c</a></td><td class='right'>1179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.9%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/slip/slip.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/slip/slip.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/sungem_phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/sungem_phy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/tap.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/tap.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/team/team_core.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_mode_activebackup.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/team/team_mode_activebackup.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_mode_loadbalance.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/team/team_mode_loadbalance.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_nl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/team/team_nl.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_nl.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/team/team_nl.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/thunderbolt/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/thunderbolt/main.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/tun.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/tun.c</a></td><td class='right'>312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/tun_vnet.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/tun_vnet.h</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/aqc111.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/aqc111.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/asix.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/asix.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/asix_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/asix_common.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/asix_devices.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/asix_devices.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/ax88172a.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/ax88172a.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/catc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/catc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/cdc_ether.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/cdc_ether.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/cdc_mbim.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/cdc_mbim.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/cdc_ncm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/cdc_ncm.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/ch9200.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/ch9200.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/gl620a.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/gl620a.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/ipheth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/ipheth.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/lan78xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/lan78xx.c</a></td><td class='right'>2101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/qmi_wwan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/qmi_wwan.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/r8152.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/r8152.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/r8153_ecm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/r8153_ecm.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/rtl8150.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/rtl8150.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/sierra_net.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/sierra_net.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/smsc95xx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/smsc95xx.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/usbnet.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/usbnet.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/veth.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/veth.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/virtio_net.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/virtio_net.c</a></td><td class='right'>1303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/vmxnet3_drv.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vmxnet3/vmxnet3_drv.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/vmxnet3_ethtool.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vmxnet3/vmxnet3_ethtool.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/vmxnet3_xdp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vmxnet3/vmxnet3_xdp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vrf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vrf.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan/vxlan_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vxlan/vxlan_core.c</a></td><td class='right'>912</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan/vxlan_mdb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vxlan/vxlan_mdb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan/vxlan_private.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vxlan/vxlan_private.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan/vxlan_vnifilter.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vxlan/vxlan_vnifilter.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/framer/framer-core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/framer/framer-core.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/framer/pef2256/pef2256.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/framer/pef2256/pef2256.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hdlc_cisco.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/hdlc_cisco.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hdlc_fr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/hdlc_fr.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hdlc_ppp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/hdlc_ppp.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lapbether.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/lapbether.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/allowedips.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/allowedips.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/allowedips.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/allowedips.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/cookie.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/cookie.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/device.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/device.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/generated/netlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/generated/netlink.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/generated/netlink.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/generated/netlink.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/netlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/netlink.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/noise.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/noise.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/peer.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/peer.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/queueing.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/queueing.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/selftest/allowedips.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/selftest/allowedips.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/socket.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/socket.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/timers.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/timers.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/admtek/adm8211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/admtek/adm8211.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ar5523/ar5523.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ar5523/ar5523.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/ahb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/ahb.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/bmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/bmi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/ce.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/ce.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/core.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/core.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/coredump.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/coredump.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/debug.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/debug.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/debugfs_sta.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/debugfs_sta.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/htc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/htc.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/htt_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/htt_rx.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/htt_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/htt_tx.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/hw.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/hw.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/leds.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/leds.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/mac.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/pci.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/qmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/qmi.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/sdio.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/snoc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/snoc.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/testmode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/testmode.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/testmode_i.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/testmode_i.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/trace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/txrx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/wmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/wmi.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/wmi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/wmi.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/ahb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/ahb.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/ce.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/ce.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/core.c</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/core.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/coredump.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/coredump.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/coredump.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/coredump.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dbring.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/dbring.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debug.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/debug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/debugfs.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/debugfs.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debugfs_sta.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/debugfs_sta.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/dp.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/dp.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dp_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/dp_rx.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dp_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/dp_tx.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/fw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hal.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/hal.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hal.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/hal.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hal_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/hal_rx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hif.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/hif.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/htc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/htc.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/hw.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/mac.c</a></td><td class='right'>783</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/mac.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/mhi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/mhi.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/mhi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/mhi.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/pci.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/pci.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/pci.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/pcic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/pcic.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/qmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/qmi.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/qmi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/qmi.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/reg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/reg.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/reg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/spectral.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/spectral.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/testmode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/testmode.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/trace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/wmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/wmi.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/wmi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/wmi.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/wow.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/wow.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/acpi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/acpi.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/acpi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/acpi.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/ahb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/ahb.c</a></td><td class='right'>1156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/ahb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/ahb.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/ce.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/ce.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/ce.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/ce.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/core.c</a></td><td class='right'>1211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/core.h</a></td><td class='right'>623</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/coredump.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/coredump.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/coredump.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/coredump.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dbring.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/dbring.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debug.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debug.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debug.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debug.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debugfs.c</a></td><td class='right'>1418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debugfs.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c</a></td><td class='right'>4324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 18.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 81.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs_htt_stats.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debugfs_htt_stats.h</a></td><td class='right'>1397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs_sta.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debugfs_sta.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs_sta.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debugfs_sta.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/dp.c</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/dp.h</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_mon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/dp_mon.c</a></td><td class='right'>2775</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_mon.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/dp_mon.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/dp_rx.c</a></td><td class='right'>1367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_rx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/dp_rx.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/dp_tx.c</a></td><td class='right'>609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_tx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/dp_tx.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/fw.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/fw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/fw.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/hal.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/hal.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal_desc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/hal_desc.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/hal_rx.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal_rx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/hal_rx.h</a></td><td class='right'>534</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal_tx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/hal_tx.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hif.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/hif.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/hw.c</a></td><td class='right'>586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/hw.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/mac.c</a></td><td class='right'>8898</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 30.0%;'/><td class='rem' style='width: 7.2%;'/><td class='none' style='width: 62.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/mac.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/mhi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/mhi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/mhi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/mhi.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/p2p.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/p2p.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/p2p.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/p2p.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/pci.c</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/pci.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/pci.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/peer.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/peer.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/peer.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/peer.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/qmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/qmi.c</a></td><td class='right'>757</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/qmi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/qmi.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/reg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/reg.c</a></td><td class='right'>616</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/reg.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/rx_desc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/rx_desc.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/testmode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/testmode.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/testmode.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/testmode.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/wmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/wmi.c</a></td><td class='right'>3624</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 84.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/wmi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/wmi.h</a></td><td class='right'>1004</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/wow.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/wow.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/ahb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath5k/ahb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/mac80211-ops.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath5k/mac80211-ops.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath5k/pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath5k/phy.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath5k/reg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/bmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/bmi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/cfg80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/cfg80211.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/hif.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/hif.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/htc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/htc.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/htc_mbox.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/htc_mbox.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/htc_pipe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/htc_pipe.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/init.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/recovery.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/recovery.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/sdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/txrx.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/usb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/wmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/wmi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/wmi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath6kl/wmi.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ahb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/ahb.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/antenna.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/antenna.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9002_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/ar9002_hw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_aic.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/ar9003_aic.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/ar9003_hw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_mci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/ar9003_mci.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/ar9003_phy.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ath9k.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/ath9k.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ath9k_pci_owl_loader.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/ath9k_pci_owl_loader.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/beacon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/beacon.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/btcoex.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/btcoex.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/calib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/calib.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/channel.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/channel.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common-beacon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/common-beacon.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common-debug.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/common-debug.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common-init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/common-init.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common-spectral.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/common-spectral.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/common.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/debug.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/debug.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/debug.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/debug.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/dfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/dfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/dynack.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/dynack.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/eeprom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/eeprom.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/gpio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/gpio.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/hif_usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/hif_usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/htc_drv_beacon.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_drv_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/htc_drv_main.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/htc_drv_txrx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_hst.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/htc_hst.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/hw.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/hw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/hw.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/init.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/link.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/link.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/main.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/recv.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/recv.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/wow.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/wow.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/xmit.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath9k/xmit.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/debug.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/carl9170/debug.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/carl9170/fw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/carl9170/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/carl9170/rx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/carl9170/tx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/carl9170/usb.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/main.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/testmode_i.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/testmode_i.h</a> (renamed from drivers/net/wireless/ath/ath11k/testmode_i.h)</td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/dxe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wcn36xx/dxe.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/hal.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wcn36xx/hal.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wcn36xx/main.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/smd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wcn36xx/smd.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/smd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wcn36xx/smd.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/testmode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wcn36xx/testmode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/wcn36xx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wcn36xx/wcn36xx.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/cfg80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wil6210/cfg80211.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/interrupt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wil6210/interrupt.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wil6210/main.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wil6210/netdev.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/p2p.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wil6210/p2p.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/pm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wil6210/pm.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wil6210/txrx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/wmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wil6210/wmi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/wmi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/wil6210/wmi.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/atmel/at76c50x-usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/atmel/at76c50x-usb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/b43/debugfs.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/b43/main.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/b43legacy/debugfs.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/b43legacy/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/module.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/module.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/btcoex.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/btcoex.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/core.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/fwil_types.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/fwil_types.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/module.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/module.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/dmi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/dmi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwvid.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwvid.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/module.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/module.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_cmn.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_cmn.c</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_hal.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_hal.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/pmu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/pmu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/ipw2100.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/ipw2x00/ipw2100.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/ipw2200.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/ipw2x00/ipw2200.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/ipw2x00/libipw.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_crypto.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/ipw2x00/libipw_crypto.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_module.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/ipw2x00/libipw_module.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/ipw2x00/libipw_rx.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/3945-mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlegacy/3945-mac.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/3945-rs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlegacy/3945-rs.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/3945.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlegacy/3945.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/3945.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlegacy/3945.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/4965-mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlegacy/4965-mac.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/4965-rs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlegacy/4965-rs.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/commands.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlegacy/commands.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlegacy/common.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/common.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlegacy/common.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/iwl-spectrum.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlegacy/iwl-spectrum.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/Makefile</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/1000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/1000.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/2000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/2000.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/22000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/22000.c</a></td><td class='right'>396</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/5000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/5000.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/6000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/6000.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/7000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/7000.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/8000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/8000.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/9000.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/9000.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/ax210.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/ax210.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/bz.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/bz.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/dr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/dr.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-fm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/rf-fm.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-gf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/rf-gf.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-hr.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/rf-hr.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-jf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/rf-jf.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-pe.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/rf-pe.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-wh.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/rf-wh.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/sc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/cfg/sc.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/agn.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/agn.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/commands.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/commands.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/dev.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/dev.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/devices.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/devices.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/eeprom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/eeprom.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/led.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/led.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/lib.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/main.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/power.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/power.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/power.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/power.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/rs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/rs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/rx.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/rxon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/rxon.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/tt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/tt.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/tt.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/tt.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/tx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/ucode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/dvm/ucode.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/acpi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/acpi.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/acpi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/acpi.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/alive.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/alive.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/binding.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/binding.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/cmdhdr.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/cmdhdr.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/coex.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/coex.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/commands.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/commands.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/context.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/context.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/d3.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/d3.h</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/debug.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/debug.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/dhc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/dhc.h</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/location.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/location.h</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/mac.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/offload.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/offload.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/phy-ctxt.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/phy-ctxt.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/phy.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/power.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/power.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/rs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/rs.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/rx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/rx.h</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/scan.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/scan.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/sta.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/sta.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/stats.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/stats.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/tdls.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/tdls.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/time-event.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/time-event.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/tx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/api/tx.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dbg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/dbg.c</a></td><td class='right'>381</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dbg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/dbg.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/debugfs.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dhc-utils.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/dhc-utils.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dump.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/dump.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/error-dump.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/error-dump.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/file.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/file.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/img.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/img.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/img.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/img.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/init.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/paging.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/paging.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/pnvm.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/pnvm.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/pnvm.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/regulatory.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/regulatory.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/regulatory.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/regulatory.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/rs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/rs.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/runtime.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/runtime.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/smem.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/smem.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/uefi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/uefi.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/uefi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/fw/uefi.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-config.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-config.h</a></td><td class='right'>550</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-csr.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-csr.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-debug.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-debug.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-devtrace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-devtrace.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-drv.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-drv.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-drv.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-drv.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-fh.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-fh.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-io.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-io.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-io.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-io.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-modparams.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-modparams.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-utils.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-utils.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-op-mode.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-op-mode.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-prph.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-prph.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-trans.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-trans.c</a></td><td class='right'>509</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-trans.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-trans.h</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-utils.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-utils.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-utils.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/iwl-utils.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mei/sap.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mei/sap.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/agg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/agg.c</a></td><td class='right'>677</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/agg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/agg.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ap.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/ap.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ap.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/ap.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/coex.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/coex.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/coex.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/coex.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/constants.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/constants.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/d3.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/d3.c</a></td><td class='right'>2065</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/d3.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/d3.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/debugfs.c</a></td><td class='right'>1113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/debugfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/debugfs.h</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ftm-initiator.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/ftm-initiator.c</a></td><td class='right'>451</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ftm-initiator.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/ftm-initiator.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/fw.c</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/hcmd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/hcmd.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/iface.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/iface.c</a></td><td class='right'>703</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/iface.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/iface.h</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/key.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/key.c</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/key.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/key.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/led.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/led.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/led.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/led.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/link.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/link.c</a></td><td class='right'>909</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/link.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/link.h</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/low_latency.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/low_latency.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/low_latency.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/low_latency.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mac80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/mac80211.c</a></td><td class='right'>2702</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mac80211.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/mac80211.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mcc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/mcc.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mcc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/mcc.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mld.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/mld.c</a></td><td class='right'>776</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mld.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/mld.h</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mlo.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/mlo.c</a></td><td class='right'>1199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mlo.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/mlo.h</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/notif.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/notif.c</a></td><td class='right'>719</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/notif.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/notif.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/phy.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/phy.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/power.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/power.c</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/power.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/power.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/ptp.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ptp.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/ptp.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/regulatory.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/regulatory.c</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/regulatory.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/regulatory.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/roc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/roc.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/roc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/roc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/rx.c</a></td><td class='right'>2264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/rx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/rx.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/scan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/scan.c</a></td><td class='right'>2179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/scan.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/scan.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/session-protect.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/session-protect.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/session-protect.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/session-protect.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/sta.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/sta.c</a></td><td class='right'>1319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/sta.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/sta.h</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/stats.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/stats.c</a></td><td class='right'>521</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/stats.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/stats.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tests/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/agg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tests/agg.c</a></td><td class='right'>663</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/hcmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tests/hcmd.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/link-selection.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tests/link-selection.c</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/link.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tests/link.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/module.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tests/module.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tests/rx.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/utils.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tests/utils.c</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/utils.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tests/utils.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/thermal.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/thermal.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/thermal.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/thermal.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/time_sync.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/time_sync.c</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/time_sync.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/time_sync.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tlc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tlc.c</a></td><td class='right'>739</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tlc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tlc.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tx.c</a></td><td class='right'>1394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mld/tx.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/binding.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/binding.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/coex.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/coex.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/constants.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/constants.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/d3.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/d3.c</a></td><td class='right'>1028</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/debugfs-vif.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/debugfs-vif.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ftm-responder.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/ftm-responder.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/fw.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/led.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/led.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/link.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/link.c</a></td><td class='right'>878</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c</a></td><td class='right'>493</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-key.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/mld-key.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/mld-mac.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-sta.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/mld-sta.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/mvm.h</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/nvm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/nvm.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/offloading.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/offloading.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ops.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/ops.c</a></td><td class='right'>439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/power.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/power.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ptp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/ptp.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/quota.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/quota.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/rs.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/rs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/rx.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/scan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/scan.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/sta.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/sta.c</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/sta.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/sta.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tdls.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/tdls.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/tests/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/hcmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/tests/hcmd.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/links.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/tests/links.c</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/time-event.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/time-event.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/time-event.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/tt.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/tx.c</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/utils.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/utils.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/vendor-cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/mvm/vendor-cmd.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-v2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-v2.c</a> (renamed from drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c)</td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/drv.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/drv.c</a></td><td class='right'>2460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/internal.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/internal.h</a> (renamed from drivers/net/wireless/intel/iwlwifi/pcie/internal.h)</td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/rx.c</a> (renamed from drivers/net/wireless/intel/iwlwifi/pcie/rx.c)</td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans-gen2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans-gen2.c</a> (renamed from drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c)</td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans.c</a> (renamed from drivers/net/wireless/intel/iwlwifi/pcie/trans.c)</td><td class='right'>1350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx-gen2.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx-gen2.c</a> (renamed from drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c)</td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx.c</a> (renamed from drivers/net/wireless/intel/iwlwifi/pcie/tx.c)</td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/iwl-context-info-v2.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/iwl-context-info-v2.h</a> (renamed from drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h)</td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/iwl-context-info.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/iwl-context-info.h</a> (renamed from drivers/net/wireless/intel/iwlwifi/iwl-context-info.h)</td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/utils.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/utils.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/utils.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/pcie/utils.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/tests/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/tests/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/tests/devinfo.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/tests/devinfo.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/tests/nvm_parse.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/tests/nvm_parse.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/tests/utils.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intel/iwlwifi/tests/utils.c</a> (renamed from drivers/net/wireless/intel/iwlwifi/mvm/tests/scan.c)</td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/fwio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intersil/p54/fwio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intersil/p54/main.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/p54.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intersil/p54/p54.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/p54spi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intersil/p54/p54spi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/intersil/p54/txrx.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/cfg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas/cfg.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas/cmd.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/cmd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas/cmd.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/cmdresp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas/cmdresp.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/decl.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas/decl.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/dev.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas/dev.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/if_sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas/if_sdio.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/if_spi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas/if_spi.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/if_usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas/if_usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas/main.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas_tf/cmd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/if_usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas_tf/if_usb.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/libertas_tf/main.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/11n_rxreorder.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/11n_rxreorder.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/cfg80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/cfg80211.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/cfp.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/cfp.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/cmdevt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/cmdevt.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/fw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/fw.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/init.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/main.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/main.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/pcie.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/pcie.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/sdio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sta_cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/sta_cmd.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sta_event.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/sta_event.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sta_ioctl.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/sta_ioctl.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/tdls.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/tdls.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/txrx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/uap_event.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/uap_event.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/usb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/util.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/util.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/wmm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwifiex/wmm.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwl8k.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/marvell/mwl8k.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/agg-rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/agg-rx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/channel.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/channel.c</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/debugfs.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/dma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/dma.c</a></td><td class='right'>326</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/dma.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/dma.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/eeprom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/eeprom.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mac80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mac80211.c</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mcu.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mmio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mmio.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76.h</a></td><td class='right'>436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/beacon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/beacon.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/core.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/dma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/dma.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/eeprom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/eeprom.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/eeprom.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/eeprom.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/mac.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/main.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mcu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/mcu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mt7603.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/mt7603.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/regs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/soc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7603/soc.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/dma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/dma.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/init.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/mac.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/main.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/mcu.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mcu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/mcu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mmio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/mmio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mt7615_trace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/mt7615_trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/pci.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/pci_init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/pci_init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/pci_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/pci_mac.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/regs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/sdio.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/sdio_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/sdio_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/soc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/soc.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/testmode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/testmode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/trace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/usb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/usb_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/usb_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76_connac.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac2_mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76_connac2_mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x0/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/mt76x0.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x0/mt76x0.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x0/pci.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/pci_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x0/pci_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x0/phy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x0/usb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/usb_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x0/usb_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_beacon.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_beacon.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_dfs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_dma.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_dma.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_mac.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mcu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_mcu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_phy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_phy.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_regs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_trace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_trace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_txrx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_usb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_usb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_usb_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_usb_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_util.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x02_util.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mcu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/mcu.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2u.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2u.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/pci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/pci_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/pci_main.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/pci_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/pci_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/phy.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/usb.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_mac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/coredump.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/coredump.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/coredump.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/coredump.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/dma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/dma.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/init.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/mac.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/main.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/mcu.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/mcu.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mmio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/mmio.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/regs.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/soc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/soc.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/testmode.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/testmode.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7915/testmode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/init.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/mac.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/main.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/mcu.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mcu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/mcu.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/pci.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/regs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/sdio.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/sdio_mac.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/sdio_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/testmode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/testmode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7921/usb.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/init.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/mac.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/main.c</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/mcu.c</a></td><td class='right'>752</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mcu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/mcu.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mt7925.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/mt7925.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/pci.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/pci_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/pci_mac.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/pci_mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/pci_mcu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/regd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/regd.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/regd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/regd.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/regs.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/testmode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/testmode.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7925/usb.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_acpi_sar.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x_acpi_sar.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_acpi_sar.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x_acpi_sar.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x_core.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x_debugfs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_dma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x_dma.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x_mac.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x_regs.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_trace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x_trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_trace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x_trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt792x_usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/coredump.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/coredump.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/coredump.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/coredump.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/debugfs.c</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/dma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/dma.c</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/eeprom.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/eeprom.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/eeprom.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/eeprom.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/init.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/init.c</a></td><td class='right'>812</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/mac.c</a></td><td class='right'>1328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/main.c</a></td><td class='right'>1771</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mcu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/mcu.c</a></td><td class='right'>1589</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mcu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/mcu.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mmio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/mmio.c</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mt7996.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/mt7996.h</a></td><td class='right'>413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/npu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/npu.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/pci.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/mt7996/regs.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/npu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/npu.c</a></td><td class='right'>501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/pci.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/scan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/scan.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/sdio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/sdio.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/sdio.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/sdio_txrx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/sdio_txrx.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/testmode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/testmode.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/testmode.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/testmode.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/trace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/trace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/tx.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/usb.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/usb_trace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/usb_trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/usb_trace.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/usb_trace.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/util.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/util.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/util.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/util.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/wed.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt76/wed.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/mediatek/mt7601u/main.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/cfg80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/microchip/wilc1000/cfg80211.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/hif.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/microchip/wilc1000/hif.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/microchip/wilc1000/netdev.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/microchip/wilc1000/sdio.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/spi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/microchip/wilc1000/spi.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/wlan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/microchip/wilc1000/wlan.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/wlan_cfg.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/microchip/wilc1000/wlan_cfg.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/wlan_cfg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/microchip/wilc1000/wlan_cfg.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/purelifi/plfxlc/mac.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/purelifi/plfxlc/mac.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/purelifi/plfxlc/usb.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/cfg80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/quantenna/qtnfmac/cfg80211.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/quantenna/qtnfmac/core.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/quantenna/qtnfmac/core.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/pcie.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/quantenna/qtnfmac/pcie/pcie.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/qlink.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/quantenna/qtnfmac/qlink.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800lib.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2800lib.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800lib.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2800lib.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2800mmio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2800pci.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800soc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2800soc.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2800usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2x00.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2x00dev.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2x00mac.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00queue.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2x00queue.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2x00soc.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2x00soc.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ralink/rt2x00/rt2x00usb.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtl818x/rtl8180/dev.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8187/dev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtl818x/rtl8187/dev.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8188e.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtl8xxxu/8188e.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8192c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtl8xxxu/8192c.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8723a.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtl8xxxu/8723a.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtl8xxxu/core.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/regs.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtl8xxxu/regs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/base.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/base.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/base.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/base.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/core.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/core.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/efuse.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/efuse.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/pci.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/ps.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/ps.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/hw.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/sw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/sw.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/dm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/dm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/hw.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/sw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/sw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/rf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/rf.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/sw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/sw.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hw.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/sw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/sw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/dm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/dm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/sw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/sw.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/usb.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/usb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/usb.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/wifi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtlwifi/wifi.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/Kconfig</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/bf.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/bf.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/bf.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/bf.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/coex.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/coex.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/coex.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/coex.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/debug.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/debug.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/fw.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/fw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/fw.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/hci.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/hci.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/led.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/led.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/led.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/led.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/mac.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/mac.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/mac80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/mac80211.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/main.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/main.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/main.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/pci.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/pci.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/pci.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/phy.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/phy.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/reg.h</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8703b.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8703b.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723cs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8723cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723d.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8723d.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723de.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8723de.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723ds.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8723ds.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723du.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8723du.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723x.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8723x.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723x.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8723x.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812a.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8812a.c</a></td><td class='right'>1125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812a.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8812a.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812a_table.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8812a_table.c</a></td><td class='right'>2812</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812a_table.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8812a_table.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812au.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8812au.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814a.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8814a.c</a></td><td class='right'>2270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814a.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8814a.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814a_table.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8814a_table.c</a></td><td class='right'>23930</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 100.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 0.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814a_table.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8814a_table.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814ae.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8814ae.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814au.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8814au.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821a.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8821a.c</a></td><td class='right'>1226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821a.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8821a.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821a_table.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8821a_table.c</a></td><td class='right'>2350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821a_table.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8821a_table.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821au.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8821au.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8821c.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821c.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8821c.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821ce.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8821ce.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821cs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8821cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821cu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8821cu.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822b.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8822b.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822b.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8822b.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822be.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8822be.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822bs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8822bs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822bu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8822bu.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8822c.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822c.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8822c.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822ce.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8822ce.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822cs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8822cs.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822cu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw8822cu.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw88xxa.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw88xxa.c</a></td><td class='right'>1989</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw88xxa.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rtw88xxa.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/rx.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/sar.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/sar.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/sdio.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/tx.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/tx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/tx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/usb.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/usb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/usb.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/util.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw88/util.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/Kconfig?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/Kconfig</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/Makefile?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/acpi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/acpi.c</a></td><td class='right'>1131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/acpi.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/acpi.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/cam.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/cam.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/cam.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/cam.h</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/chan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/chan.c</a></td><td class='right'>1202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/chan.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/chan.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/coex.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/coex.c</a></td><td class='right'>4125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.4%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 82.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/coex.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/coex.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/core.c</a></td><td class='right'>2236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/core.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/core.h</a></td><td class='right'>1033</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/debug.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/debug.c</a></td><td class='right'>2651</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 88.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/debug.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/debug.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/efuse.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/efuse.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/efuse.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/efuse.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/efuse_be.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/efuse_be.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/fw.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/fw.c</a></td><td class='right'>2278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/fw.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/fw.h</a></td><td class='right'>533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/mac.c</a></td><td class='right'>787</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/mac.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/mac.h</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/mac80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/mac80211.c</a></td><td class='right'>812</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/mac_be.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/mac_be.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/pci.c</a></td><td class='right'>633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/pci.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/pci.h</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/pci_be.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/pci_be.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/phy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/phy.c</a></td><td class='right'>1993</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 91.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/phy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/phy.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/phy_be.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/phy_be.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/ps.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/ps.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/ps.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/ps.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/reg.h</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/regd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/regd.c</a></td><td class='right'>827</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8851b.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8851b_table.c</a></td><td class='right'>501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851be.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8851be.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851bu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8851bu.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852a.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852ae.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852ae.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852au.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852au.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852b.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_common.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852b_common.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852be.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852be.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bt.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852bt.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bte.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852bte.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852bu.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852c.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852c.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852ce.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852ce.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852cu.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8852cu.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922a.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8922a.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922a.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8922a.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922ae.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/rtw8922ae.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/sar.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/sar.c</a></td><td class='right'>755</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/sar.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/sar.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/ser.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/ser.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/txrx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/txrx.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/usb.c</a></td><td class='right'>1071</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/usb.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/usb.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/util.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/util.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/util.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/util.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/wow.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/wow.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/wow.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/realtek/rtw89/wow.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_hal.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/rsi/rsi_91x_hal.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_mac80211.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/rsi/rsi_91x_mac80211.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/bus.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/silabs/wfx/bus.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/bus_sdio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/silabs/wfx/bus_sdio.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/bus_spi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/silabs/wfx/bus_spi.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/silabs/wfx/main.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/sta.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/silabs/wfx/sta.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/sta.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/silabs/wfx/sta.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/bh.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/st/cw1200/bh.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/cw1200_spi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/st/cw1200/cw1200_spi.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/st/cw1200/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/pm.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/st/cw1200/pm.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/queue.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/st/cw1200/queue.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/sta.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/st/cw1200/sta.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/sta.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/st/cw1200/sta.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/acx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl1251/acx.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/acx.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl1251/acx.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl1251/cmd.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/cmd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl1251/cmd.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl1251/main.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl1251/reg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl1251/tx.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl12xx/main.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/reg.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl12xx/reg.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl18xx/debugfs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wl18xx/main.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wlcore/cmd.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/cmd.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wlcore/cmd.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/debugfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wlcore/debugfs.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/main.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wlcore/main.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/scan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wlcore/scan.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/sysfs.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wlcore/sysfs.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/testmode.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wlcore/testmode.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wlcore/tx.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/vendor_cmd.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ti/wlcore/vendor_cmd.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/virtual/mac80211_hwsim.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/virtual/mac80211_hwsim.c</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/virtual/mac80211_hwsim.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/virtual/mac80211_hwsim.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/virtual/virt_wifi.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/virtual/virt_wifi.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_mac.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/zydas/zd1211rw/zd_mac.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_usb.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/zydas/zd1211rw/zd_usb.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_devlink.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/iosm/iosm_ipc_devlink.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_imem.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/iosm/iosm_ipc_imem.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_mmio.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/iosm/iosm_ipc_mmio.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_pcie.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/iosm/iosm_ipc_pcie.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_trace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/iosm/iosm_ipc_trace.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/mhi_wwan_mbim.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/mhi_wwan_mbim.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/qcom_bam_dmux.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/qcom_bam_dmux.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_cldma.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_hif_cldma.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_cldma.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_hif_cldma.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_dpmaif_rx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_hif_dpmaif_rx.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_modem_ops.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_modem_ops.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_netdev.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_netdev.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_pci.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_pci.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_pci.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_pci.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_port.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port_proxy.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_port_proxy.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port_proxy.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_port_proxy.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port_trace.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_port_trace.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port_wwan.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_port_wwan.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_state_monitor.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_state_monitor.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_state_monitor.h?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/t7xx/t7xx_state_monitor.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/wwan_core.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/wwan_core.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/wwan_hwsim.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wwan/wwan_hwsim.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netback/interface.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/xen-netback/interface.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netback/netback.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/xen-netback/netback.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netfront.c?id2=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/xen-netfront.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
</table><div class='diffstat-summary'>3216 files changed, 374363 insertions, 123024 deletions</div><table summary='diff' class='diff'><tr><td><div class='head'>diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig<br/>index 1fd5acdc73c6..ac12eaf11755 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/Kconfig</a></div><div class='hunk'>@@ -76,24 +76,11 @@ config WIREGUARD</div><div class='ctx'> 	tristate "WireGuard secure network tunnel"</div><div class='ctx'> 	depends on NET &amp;&amp; INET</div><div class='ctx'> 	depends on IPV6 || !IPV6</div><div class='del'>-	depends on !KMSAN # KMSAN doesn't support the crypto configs below</div><div class='ctx'> 	select NET_UDP_TUNNEL</div><div class='ctx'> 	select DST_CACHE</div><div class='del'>-	select CRYPTO</div><div class='ctx'> 	select CRYPTO_LIB_CURVE25519</div><div class='ctx'> 	select CRYPTO_LIB_CHACHA20POLY1305</div><div class='del'>-	select CRYPTO_CHACHA20_X86_64 if X86 &amp;&amp; 64BIT</div><div class='del'>-	select CRYPTO_POLY1305_X86_64 if X86 &amp;&amp; 64BIT</div><div class='del'>-	select CRYPTO_BLAKE2S_X86 if X86 &amp;&amp; 64BIT</div><div class='del'>-	select CRYPTO_CURVE25519_X86 if X86 &amp;&amp; 64BIT</div><div class='del'>-	select CRYPTO_CHACHA20_NEON if ARM || (ARM64 &amp;&amp; KERNEL_MODE_NEON)</div><div class='del'>-	select CRYPTO_POLY1305_NEON if ARM64 &amp;&amp; KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_POLY1305_ARM if ARM</div><div class='del'>-	select CRYPTO_BLAKE2S_ARM if ARM</div><div class='del'>-	select CRYPTO_CURVE25519_NEON if ARM &amp;&amp; KERNEL_MODE_NEON</div><div class='del'>-	select CRYPTO_CHACHA_MIPS if CPU_MIPS32_R2</div><div class='del'>-	select CRYPTO_POLY1305_MIPS if MIPS</div><div class='del'>-	select CRYPTO_CHACHA_S390 if S390</div><div class='add'>+	select CRYPTO_LIB_UTILS</div><div class='ctx'> 	help</div><div class='ctx'> 	  WireGuard is a secure, fast, and easy to use replacement for IPSec</div><div class='ctx'> 	  that uses modern cryptography and clever networking tricks. It's</div><div class='hunk'>@@ -115,6 +102,21 @@ config WIREGUARD_DEBUG</div><div class='ctx'> </div><div class='ctx'> 	  Say N here unless you know what you're doing.</div><div class='ctx'> </div><div class='add'>+config OVPN</div><div class='add'>+	tristate "OpenVPN data channel offload"</div><div class='add'>+	depends on NET &amp;&amp; INET</div><div class='add'>+	depends on IPV6 || !IPV6</div><div class='add'>+	select DST_CACHE</div><div class='add'>+	select NET_UDP_TUNNEL</div><div class='add'>+	select CRYPTO</div><div class='add'>+	select CRYPTO_AES</div><div class='add'>+	select CRYPTO_GCM</div><div class='add'>+	select CRYPTO_CHACHA20POLY1305</div><div class='add'>+	select STREAM_PARSER</div><div class='add'>+	help</div><div class='add'>+	  This module enhances the performance of the OpenVPN userspace software</div><div class='add'>+	  by offloading the data channel processing to kernelspace.</div><div class='add'>+</div><div class='ctx'> config EQUALIZER</div><div class='ctx'> 	tristate "EQL (serial line load balancing) support"</div><div class='ctx'> 	help</div><div class='hunk'>@@ -518,30 +520,6 @@ source "drivers/net/hippi/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/ipa/Kconfig"</div><div class='ctx'> </div><div class='del'>-config NET_SB1000</div><div class='del'>-	tristate "General Instruments Surfboard 1000"</div><div class='del'>-	depends on ISA &amp;&amp; PNP</div><div class='del'>-	help</div><div class='del'>-	  This is a driver for the General Instrument (also known as</div><div class='del'>-	  NextLevel) SURFboard 1000 internal</div><div class='del'>-	  cable modem. This is an ISA card which is used by a number of cable</div><div class='del'>-	  TV companies to provide cable modem access. It's a one-way</div><div class='del'>-	  downstream-only cable modem, meaning that your upstream net link is</div><div class='del'>-	  provided by your regular phone modem.</div><div class='del'>-</div><div class='del'>-	  At present this driver only compiles as a module, so say M here if</div><div class='del'>-	  you have this card. The module will be called sb1000. Then read</div><div class='del'>-	  &lt;file:Documentation/networking/device_drivers/cable/sb1000.rst&gt; for</div><div class='del'>-	  information on how to use this module, as it needs special ppp</div><div class='del'>-	  scripts for establishing a connection. Further documentation</div><div class='del'>-	  and the necessary scripts can be found at:</div><div class='del'>-</div><div class='del'>-	  &lt;http://www.jacksonville.net/~fventuri/&gt;</div><div class='del'>-	  &lt;http://home.adelphia.net/~siglercm/sb1000.html&gt;</div><div class='del'>-	  &lt;http://linuxpower.cx/~cable/&gt;</div><div class='del'>-</div><div class='del'>-	  If you don't have this card, of course say N.</div><div class='del'>-</div><div class='ctx'> source "drivers/net/phy/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/pse-pd/Kconfig"</div><div class='head'>diff --git a/drivers/net/Makefile b/drivers/net/Makefile<br/>index 13743d0e83b5..73bc63ecd65f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/Makefile</a></div><div class='hunk'>@@ -11,6 +11,7 @@ obj-$(CONFIG_IPVLAN) += ipvlan/</div><div class='ctx'> obj-$(CONFIG_IPVTAP) += ipvlan/</div><div class='ctx'> obj-$(CONFIG_DUMMY) += dummy.o</div><div class='ctx'> obj-$(CONFIG_WIREGUARD) += wireguard/</div><div class='add'>+obj-$(CONFIG_OVPN) += ovpn/</div><div class='ctx'> obj-$(CONFIG_EQUALIZER) += eql.o</div><div class='ctx'> obj-$(CONFIG_IFB) += ifb.o</div><div class='ctx'> obj-$(CONFIG_MACSEC) += macsec.o</div><div class='hunk'>@@ -69,7 +70,6 @@ obj-$(CONFIG_PPPOL2TP) += ppp/</div><div class='ctx'> obj-$(CONFIG_PPTP) += ppp/</div><div class='ctx'> obj-$(CONFIG_SLIP) += slip/</div><div class='ctx'> obj-$(CONFIG_SLHC) += slip/</div><div class='del'>-obj-$(CONFIG_NET_SB1000) += sb1000.o</div><div class='ctx'> obj-$(CONFIG_SUNGEM_PHY) += sungem_phy.o</div><div class='ctx'> obj-$(CONFIG_WAN) += wan/</div><div class='ctx'> obj-$(CONFIG_WLAN) += wireless/</div><div class='head'>diff --git a/drivers/net/Space.c b/drivers/net/Space.c<br/>index dc50797a2ed0..c01e2c2f7d6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/Space.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/Space.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/Space.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/Space.c</a></div><div class='hunk'>@@ -67,8 +67,7 @@ static int netdev_boot_setup_add(char *name, struct ifmap *map)</div><div class='ctx'> 	s = dev_boot_setup;</div><div class='ctx'> 	for (i = 0; i &lt; NETDEV_BOOT_SETUP_MAX; i++) {</div><div class='ctx'> 		if (s[i].name[0] == '\0' || s[i].name[0] == ' ') {</div><div class='del'>-			memset(s[i].name, 0, sizeof(s[i].name));</div><div class='del'>-			strscpy(s[i].name, name, IFNAMSIZ);</div><div class='add'>+			strscpy_pad(s[i].name, name);</div><div class='ctx'> 			memcpy(&amp;s[i].map, map, sizeof(s[i].map));</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/net/amt.c b/drivers/net/amt.c<br/>index 0433a0f36d1b..902c817a0dea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/amt.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/amt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/amt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/amt.c</a></div><div class='hunk'>@@ -11,6 +11,7 @@</div><div class='ctx'> #include &lt;linux/net.h&gt;</div><div class='ctx'> #include &lt;linux/igmp.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;net/flow.h&gt;</div><div class='ctx'> #include &lt;net/pkt_sched.h&gt;</div><div class='ctx'> #include &lt;net/net_namespace.h&gt;</div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='hunk'>@@ -28,6 +29,7 @@</div><div class='ctx'> #include &lt;net/addrconf.h&gt;</div><div class='ctx'> #include &lt;net/ip6_route.h&gt;</div><div class='ctx'> #include &lt;net/inet_common.h&gt;</div><div class='add'>+#include &lt;net/inet_dscp.h&gt;</div><div class='ctx'> #include &lt;net/ip6_checksum.h&gt;</div><div class='ctx'> </div><div class='ctx'> static struct workqueue_struct *amt_wq;</div><div class='hunk'>@@ -979,7 +981,7 @@ static void amt_event_send_request(struct amt_dev *amt)</div><div class='ctx'> 	amt-&gt;req_cnt++;</div><div class='ctx'> out:</div><div class='ctx'> 	exp = min_t(u32, (1 * (1 &lt;&lt; amt-&gt;req_cnt)), AMT_MAX_REQ_TIMEOUT);</div><div class='del'>-	mod_delayed_work(amt_wq, &amp;amt-&gt;req_wq, msecs_to_jiffies(exp * 1000));</div><div class='add'>+	mod_delayed_work(amt_wq, &amp;amt-&gt;req_wq, secs_to_jiffies(exp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void amt_req_work(struct work_struct *work)</div><div class='hunk'>@@ -1018,7 +1020,7 @@ static bool amt_send_membership_update(struct amt_dev *amt,</div><div class='ctx'> 	fl4.flowi4_oif         = amt-&gt;stream_dev-&gt;ifindex;</div><div class='ctx'> 	fl4.daddr              = amt-&gt;remote_ip;</div><div class='ctx'> 	fl4.saddr              = amt-&gt;local_ip;</div><div class='del'>-	fl4.flowi4_tos         = AMT_TOS;</div><div class='add'>+	fl4.flowi4_dscp        = inet_dsfield_to_dscp(AMT_TOS);</div><div class='ctx'> 	fl4.flowi4_proto       = IPPROTO_UDP;</div><div class='ctx'> 	rt = ip_route_output_key(amt-&gt;net, &amp;fl4);</div><div class='ctx'> 	if (IS_ERR(rt)) {</div><div class='hunk'>@@ -1046,7 +1048,8 @@ static bool amt_send_membership_update(struct amt_dev *amt,</div><div class='ctx'> 			    amt-&gt;gw_port,</div><div class='ctx'> 			    amt-&gt;relay_port,</div><div class='ctx'> 			    false,</div><div class='del'>-			    false);</div><div class='add'>+			    false,</div><div class='add'>+			    0);</div><div class='ctx'> 	amt_update_gw_status(amt, AMT_STATUS_SENT_UPDATE, true);</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='hunk'>@@ -1103,7 +1106,8 @@ static void amt_send_multicast_data(struct amt_dev *amt,</div><div class='ctx'> 			    amt-&gt;relay_port,</div><div class='ctx'> 			    tunnel-&gt;source_port,</div><div class='ctx'> 			    false,</div><div class='del'>-			    false);</div><div class='add'>+			    false,</div><div class='add'>+			    0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool amt_send_membership_query(struct amt_dev *amt,</div><div class='hunk'>@@ -1131,7 +1135,7 @@ static bool amt_send_membership_query(struct amt_dev *amt,</div><div class='ctx'> 	fl4.flowi4_oif         = amt-&gt;stream_dev-&gt;ifindex;</div><div class='ctx'> 	fl4.daddr              = tunnel-&gt;ip4;</div><div class='ctx'> 	fl4.saddr              = amt-&gt;local_ip;</div><div class='del'>-	fl4.flowi4_tos         = AMT_TOS;</div><div class='add'>+	fl4.flowi4_dscp        = inet_dsfield_to_dscp(AMT_TOS);</div><div class='ctx'> 	fl4.flowi4_proto       = IPPROTO_UDP;</div><div class='ctx'> 	rt = ip_route_output_key(amt-&gt;net, &amp;fl4);</div><div class='ctx'> 	if (IS_ERR(rt)) {</div><div class='hunk'>@@ -1161,7 +1165,8 @@ static bool amt_send_membership_query(struct amt_dev *amt,</div><div class='ctx'> 			    amt-&gt;relay_port,</div><div class='ctx'> 			    tunnel-&gt;source_port,</div><div class='ctx'> 			    false,</div><div class='del'>-			    false);</div><div class='add'>+			    false,</div><div class='add'>+			    0);</div><div class='ctx'> 	amt_update_relay_status(tunnel, AMT_STATUS_SENT_QUERY, true);</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='hunk'>@@ -3099,7 +3104,7 @@ static void amt_link_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;addr_len		= 0;</div><div class='ctx'> 	dev-&gt;priv_flags		|= IFF_NO_QUEUE;</div><div class='ctx'> 	dev-&gt;lltx		= true;</div><div class='del'>-	dev-&gt;netns_local	= true;</div><div class='add'>+	dev-&gt;netns_immutable	= true;</div><div class='ctx'> 	dev-&gt;features		|= NETIF_F_GSO_SOFTWARE;</div><div class='ctx'> 	dev-&gt;hw_features	|= NETIF_F_SG | NETIF_F_HW_CSUM;</div><div class='ctx'> 	dev-&gt;hw_features	|= NETIF_F_FRAGLIST | NETIF_F_RXCSUM;</div><div class='hunk'>@@ -3161,14 +3166,17 @@ static int amt_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amt_newlink(struct net *net, struct net_device *dev,</div><div class='del'>-		       struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int amt_newlink(struct net_device *dev,</div><div class='add'>+		       struct rtnl_newlink_params *params,</div><div class='ctx'> 		       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='ctx'> 	struct amt_dev *amt = netdev_priv(dev);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	int err = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	amt-&gt;net = net;</div><div class='add'>+	amt-&gt;net = link_net;</div><div class='ctx'> 	amt-&gt;mode = nla_get_u32(data[IFLA_AMT_MODE]);</div><div class='ctx'> </div><div class='ctx'> 	if (data[IFLA_AMT_MAX_TUNNELS] &amp;&amp;</div><div class='hunk'>@@ -3183,7 +3191,7 @@ static int amt_newlink(struct net *net, struct net_device *dev,</div><div class='ctx'> 	amt-&gt;hash_buckets = AMT_HSIZE;</div><div class='ctx'> 	amt-&gt;nr_tunnels = 0;</div><div class='ctx'> 	get_random_bytes(&amp;amt-&gt;hash_seed, sizeof(amt-&gt;hash_seed));</div><div class='del'>-	amt-&gt;stream_dev = dev_get_by_index(net,</div><div class='add'>+	amt-&gt;stream_dev = dev_get_by_index(link_net,</div><div class='ctx'> 					   nla_get_u32(data[IFLA_AMT_LINK]));</div><div class='ctx'> 	if (!amt-&gt;stream_dev) {</div><div class='ctx'> 		NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_AMT_LINK],</div><div class='hunk'>@@ -3206,15 +3214,11 @@ static int amt_newlink(struct net *net, struct net_device *dev,</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (data[IFLA_AMT_RELAY_PORT])</div><div class='del'>-		amt-&gt;relay_port = nla_get_be16(data[IFLA_AMT_RELAY_PORT]);</div><div class='del'>-	else</div><div class='del'>-		amt-&gt;relay_port = htons(IANA_AMT_UDP_PORT);</div><div class='add'>+	amt-&gt;relay_port = nla_get_be16_default(data[IFLA_AMT_RELAY_PORT],</div><div class='add'>+					       htons(IANA_AMT_UDP_PORT));</div><div class='ctx'> </div><div class='del'>-	if (data[IFLA_AMT_GATEWAY_PORT])</div><div class='del'>-		amt-&gt;gw_port = nla_get_be16(data[IFLA_AMT_GATEWAY_PORT]);</div><div class='del'>-	else</div><div class='del'>-		amt-&gt;gw_port = htons(IANA_AMT_UDP_PORT);</div><div class='add'>+	amt-&gt;gw_port = nla_get_be16_default(data[IFLA_AMT_GATEWAY_PORT],</div><div class='add'>+					    htons(IANA_AMT_UDP_PORT));</div><div class='ctx'> </div><div class='ctx'> 	if (!amt-&gt;relay_port) {</div><div class='ctx'> 		NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_AMT_DISCOVERY_IP],</div><div class='head'>diff --git a/drivers/net/arcnet/arcnet.c b/drivers/net/arcnet/arcnet.c<br/>index 530c15d6a5eb..882972604c82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/arcnet.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/arcnet/arcnet.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/arcnet.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/arcnet.c</a></div><div class='hunk'>@@ -382,7 +382,7 @@ static void arcdev_setup(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void arcnet_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct arcnet_local *lp = from_timer(lp, t, timer);</div><div class='add'>+	struct arcnet_local *lp = timer_container_of(lp, t, timer);</div><div class='ctx'> 	struct net_device *dev = lp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='hunk'>@@ -616,7 +616,7 @@ int arcnet_close(struct net_device *dev)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	arcnet_led_event(dev, ARCNET_LED_EVENT_STOP);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='head'>diff --git a/drivers/net/arcnet/com20020-pci.c b/drivers/net/arcnet/com20020-pci.c<br/>index c5e571ec94c9..0472bcdff130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020-pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/arcnet/com20020-pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020-pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/com20020-pci.c</a></div><div class='hunk'>@@ -251,18 +251,33 @@ static int com20020pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 			card-&gt;tx_led.default_trigger = devm_kasprintf(&amp;pdev-&gt;dev,</div><div class='ctx'> 							GFP_KERNEL, "arc%d-%d-tx",</div><div class='ctx'> 							dev-&gt;dev_id, i);</div><div class='add'>+			if (!card-&gt;tx_led.default_trigger) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err_free_arcdev;</div><div class='add'>+			}</div><div class='ctx'> 			card-&gt;tx_led.name = devm_kasprintf(&amp;pdev-&gt;dev, GFP_KERNEL,</div><div class='ctx'> 							"pci:green:tx:%d-%d",</div><div class='ctx'> 							dev-&gt;dev_id, i);</div><div class='del'>-</div><div class='add'>+			if (!card-&gt;tx_led.name) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err_free_arcdev;</div><div class='add'>+			}</div><div class='ctx'> 			card-&gt;tx_led.dev = &amp;dev-&gt;dev;</div><div class='ctx'> 			card-&gt;recon_led.brightness_set = led_recon_set;</div><div class='ctx'> 			card-&gt;recon_led.default_trigger = devm_kasprintf(&amp;pdev-&gt;dev,</div><div class='ctx'> 							GFP_KERNEL, "arc%d-%d-recon",</div><div class='ctx'> 							dev-&gt;dev_id, i);</div><div class='add'>+			if (!card-&gt;recon_led.default_trigger) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err_free_arcdev;</div><div class='add'>+			}</div><div class='ctx'> 			card-&gt;recon_led.name = devm_kasprintf(&amp;pdev-&gt;dev, GFP_KERNEL,</div><div class='ctx'> 							"pci:red:recon:%d-%d",</div><div class='ctx'> 							dev-&gt;dev_id, i);</div><div class='add'>+			if (!card-&gt;recon_led.name) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err_free_arcdev;</div><div class='add'>+			}</div><div class='ctx'> 			card-&gt;recon_led.dev = &amp;dev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 			ret = devm_led_classdev_register(&amp;pdev-&gt;dev, &amp;card-&gt;tx_led);</div><div class='head'>diff --git a/drivers/net/bareudp.c b/drivers/net/bareudp.c<br/>index a2abfade82dd..0df3208783ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bareudp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bareudp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bareudp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bareudp.c</a></div><div class='hunk'>@@ -84,7 +84,7 @@ static int bareudp_udp_encap_recv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 		if (skb_copy_bits(skb, BAREUDP_BASE_HLEN, &amp;ipversion,</div><div class='ctx'> 				  sizeof(ipversion))) {</div><div class='del'>-			dev_core_stats_rx_dropped_inc(bareudp-&gt;dev);</div><div class='add'>+			dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='ctx'> 			goto drop;</div><div class='ctx'> 		}</div><div class='ctx'> 		ipversion &gt;&gt;= 4;</div><div class='hunk'>@@ -94,7 +94,7 @@ static int bareudp_udp_encap_recv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> 		} else if (ipversion == 6 &amp;&amp; bareudp-&gt;multi_proto_mode) {</div><div class='ctx'> 			proto = htons(ETH_P_IPV6);</div><div class='ctx'> 		} else {</div><div class='del'>-			dev_core_stats_rx_dropped_inc(bareudp-&gt;dev);</div><div class='add'>+			dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='ctx'> 			goto drop;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (bareudp-&gt;ethertype == htons(ETH_P_MPLS_UC)) {</div><div class='hunk'>@@ -108,7 +108,7 @@ static int bareudp_udp_encap_recv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> 				   ipv4_is_multicast(tunnel_hdr-&gt;daddr)) {</div><div class='ctx'> 				proto = htons(ETH_P_MPLS_MC);</div><div class='ctx'> 			} else {</div><div class='del'>-				dev_core_stats_rx_dropped_inc(bareudp-&gt;dev);</div><div class='add'>+				dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='ctx'> 				goto drop;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -124,7 +124,7 @@ static int bareudp_udp_encap_recv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> 				   (addr_type &amp; IPV6_ADDR_MULTICAST)) {</div><div class='ctx'> 				proto = htons(ETH_P_MPLS_MC);</div><div class='ctx'> 			} else {</div><div class='del'>-				dev_core_stats_rx_dropped_inc(bareudp-&gt;dev);</div><div class='add'>+				dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='ctx'> 				goto drop;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -136,7 +136,7 @@ static int bareudp_udp_encap_recv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> 				 proto,</div><div class='ctx'> 				 !net_eq(bareudp-&gt;net,</div><div class='ctx'> 				 dev_net(bareudp-&gt;dev)))) {</div><div class='del'>-		dev_core_stats_rx_dropped_inc(bareudp-&gt;dev);</div><div class='add'>+		dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='ctx'> 		goto drop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -144,7 +144,7 @@ static int bareudp_udp_encap_recv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	tun_dst = udp_tun_rx_dst(skb, family, key, 0, 0);</div><div class='ctx'> 	if (!tun_dst) {</div><div class='del'>-		dev_core_stats_rx_dropped_inc(bareudp-&gt;dev);</div><div class='add'>+		dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='ctx'> 		goto drop;</div><div class='ctx'> 	}</div><div class='ctx'> 	skb_dst_set(skb, &amp;tun_dst-&gt;dst);</div><div class='hunk'>@@ -194,7 +194,7 @@ static int bareudp_udp_encap_recv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> 	len = skb-&gt;len;</div><div class='ctx'> 	err = gro_cells_receive(&amp;bareudp-&gt;gro_cells, skb);</div><div class='ctx'> 	if (likely(err == NET_RX_SUCCESS))</div><div class='del'>-		dev_sw_netstats_rx_add(bareudp-&gt;dev, len);</div><div class='add'>+		dev_dstats_rx_add(bareudp-&gt;dev, len);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> drop:</div><div class='hunk'>@@ -362,8 +362,8 @@ static int bareudp_xmit_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	udp_tunnel_xmit_skb(rt, sock-&gt;sk, skb, saddr, info-&gt;key.u.ipv4.dst,</div><div class='ctx'> 			    tos, ttl, df, sport, bareudp-&gt;port,</div><div class='ctx'> 			    !net_eq(bareudp-&gt;net, dev_net(bareudp-&gt;dev)),</div><div class='del'>-			    !test_bit(IP_TUNNEL_CSUM_BIT,</div><div class='del'>-				      info-&gt;key.tun_flags));</div><div class='add'>+			    !test_bit(IP_TUNNEL_CSUM_BIT, info-&gt;key.tun_flags),</div><div class='add'>+			    0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> free_dst:</div><div class='hunk'>@@ -431,7 +431,8 @@ static int bareudp6_xmit_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			     &amp;saddr, &amp;daddr, prio, ttl,</div><div class='ctx'> 			     info-&gt;key.label, sport, bareudp-&gt;port,</div><div class='ctx'> 			     !test_bit(IP_TUNNEL_CSUM_BIT,</div><div class='del'>-				       info-&gt;key.tun_flags));</div><div class='add'>+				       info-&gt;key.tun_flags),</div><div class='add'>+			     0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> free_dst:</div><div class='hunk'>@@ -589,7 +590,7 @@ static void bareudp_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;priv_flags |= IFF_NO_QUEUE;</div><div class='ctx'> 	dev-&gt;lltx = true;</div><div class='ctx'> 	dev-&gt;flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST;</div><div class='del'>-	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;</div><div class='add'>+	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_DSTATS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bareudp_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='hunk'>@@ -698,10 +699,13 @@ static void bareudp_dellink(struct net_device *dev, struct list_head *head)</div><div class='ctx'> 	unregister_netdevice_queue(dev, head);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bareudp_newlink(struct net *net, struct net_device *dev,</div><div class='del'>-			   struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int bareudp_newlink(struct net_device *dev,</div><div class='add'>+			   struct rtnl_newlink_params *params,</div><div class='ctx'> 			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	struct bareudp_conf conf;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -709,7 +713,7 @@ static int bareudp_newlink(struct net *net, struct net_device *dev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = bareudp_configure(net, dev, &amp;conf, extack);</div><div class='add'>+	err = bareudp_configure(link_net, dev, &amp;conf, extack);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -774,27 +778,19 @@ static __net_init int bareudp_init_net(struct net *net)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bareudp_destroy_tunnels(struct net *net, struct list_head *head)</div><div class='add'>+static void __net_exit bareudp_exit_rtnl_net(struct net *net,</div><div class='add'>+					     struct list_head *dev_kill_list)</div><div class='ctx'> {</div><div class='ctx'> 	struct bareudp_net *bn = net_generic(net, bareudp_net_id);</div><div class='ctx'> 	struct bareudp_dev *bareudp, *next;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry_safe(bareudp, next, &amp;bn-&gt;bareudp_list, next)</div><div class='del'>-		unregister_netdevice_queue(bareudp-&gt;dev, head);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __net_exit bareudp_exit_batch_rtnl(struct list_head *net_list,</div><div class='del'>-					       struct list_head *dev_kill_list)</div><div class='del'>-{</div><div class='del'>-	struct net *net;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(net, net_list, exit_list)</div><div class='del'>-		bareudp_destroy_tunnels(net, dev_kill_list);</div><div class='add'>+		bareudp_dellink(bareudp-&gt;dev, dev_kill_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pernet_operations bareudp_net_ops = {</div><div class='ctx'> 	.init = bareudp_init_net,</div><div class='del'>-	.exit_batch_rtnl = bareudp_exit_batch_rtnl,</div><div class='add'>+	.exit_rtnl = bareudp_exit_rtnl_net,</div><div class='ctx'> 	.id   = &amp;bareudp_net_id,</div><div class='ctx'> 	.size = sizeof(struct bareudp_net),</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/bonding/bond_3ad.c b/drivers/net/bonding/bond_3ad.c<br/>index c6807e473ab7..1a8de2bf8655 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_3ad.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_3ad.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_3ad.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_3ad.c</a></div><div class='hunk'>@@ -76,6 +76,7 @@ enum ad_link_speed_type {</div><div class='ctx'> 	AD_LINK_SPEED_200000MBPS,</div><div class='ctx'> 	AD_LINK_SPEED_400000MBPS,</div><div class='ctx'> 	AD_LINK_SPEED_800000MBPS,</div><div class='add'>+	AD_LINK_SPEED_1600000MBPS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* compare MAC addresses */</div><div class='hunk'>@@ -95,13 +96,13 @@ static int ad_marker_send(struct port *port, struct bond_marker *marker);</div><div class='ctx'> static void ad_mux_machine(struct port *port, bool *update_slave_arr);</div><div class='ctx'> static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port);</div><div class='ctx'> static void ad_tx_machine(struct port *port);</div><div class='del'>-static void ad_periodic_machine(struct port *port, struct bond_params *bond_params);</div><div class='add'>+static void ad_periodic_machine(struct port *port);</div><div class='ctx'> static void ad_port_selection_logic(struct port *port, bool *update_slave_arr);</div><div class='ctx'> static void ad_agg_selection_logic(struct aggregator *aggregator,</div><div class='ctx'> 				   bool *update_slave_arr);</div><div class='ctx'> static void ad_clear_agg(struct aggregator *aggregator);</div><div class='ctx'> static void ad_initialize_agg(struct aggregator *aggregator);</div><div class='del'>-static void ad_initialize_port(struct port *port, int lacp_fast);</div><div class='add'>+static void ad_initialize_port(struct port *port, const struct bond_params *bond_params);</div><div class='ctx'> static void ad_enable_collecting(struct port *port);</div><div class='ctx'> static void ad_disable_distributing(struct port *port,</div><div class='ctx'> 				    bool *update_slave_arr);</div><div class='hunk'>@@ -300,6 +301,7 @@ static inline int __check_agg_selection_timer(struct port *port)</div><div class='ctx'>  *     %AD_LINK_SPEED_200000MBPS</div><div class='ctx'>  *     %AD_LINK_SPEED_400000MBPS</div><div class='ctx'>  *     %AD_LINK_SPEED_800000MBPS</div><div class='add'>+ *     %AD_LINK_SPEED_1600000MBPS</div><div class='ctx'>  */</div><div class='ctx'> static u16 __get_link_speed(struct port *port)</div><div class='ctx'> {</div><div class='hunk'>@@ -379,6 +381,10 @@ static u16 __get_link_speed(struct port *port)</div><div class='ctx'> 			speed = AD_LINK_SPEED_800000MBPS;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case SPEED_1600000:</div><div class='add'>+			speed = AD_LINK_SPEED_1600000MBPS;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		default:</div><div class='ctx'> 			/* unknown speed value from ethtool. shouldn't happen */</div><div class='ctx'> 			if (slave-&gt;speed != SPEED_UNKNOWN)</div><div class='hunk'>@@ -436,6 +442,7 @@ static void __ad_actor_update_port(struct port *port)</div><div class='ctx'> </div><div class='ctx'> 	port-&gt;actor_system = BOND_AD_INFO(bond).system.sys_mac_addr;</div><div class='ctx'> 	port-&gt;actor_system_priority = BOND_AD_INFO(bond).system.sys_priority;</div><div class='add'>+	port-&gt;actor_port_priority = SLAVE_AD_INFO(port-&gt;slave)-&gt;port_priority;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Conversions */</div><div class='hunk'>@@ -746,6 +753,18 @@ static int __agg_active_ports(struct aggregator *agg)</div><div class='ctx'> 	return active;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int __agg_ports_priority(const struct aggregator *agg)</div><div class='add'>+{</div><div class='add'>+	struct port *port = agg-&gt;lag_ports;</div><div class='add'>+	unsigned int prio = 0;</div><div class='add'>+</div><div class='add'>+	for (; port; port = port-&gt;next_port_in_aggregator)</div><div class='add'>+		if (port-&gt;is_enabled)</div><div class='add'>+			prio += port-&gt;actor_port_priority;</div><div class='add'>+</div><div class='add'>+	return prio;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * __get_agg_bandwidth - get the total bandwidth of an aggregator</div><div class='ctx'>  * @aggregator: the aggregator we're looking at</div><div class='hunk'>@@ -809,6 +828,9 @@ static u32 __get_agg_bandwidth(struct aggregator *aggregator)</div><div class='ctx'> 		case AD_LINK_SPEED_800000MBPS:</div><div class='ctx'> 			bandwidth = nports * 800000;</div><div class='ctx'> 			break;</div><div class='add'>+		case AD_LINK_SPEED_1600000MBPS:</div><div class='add'>+			bandwidth = nports * 1600000;</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			bandwidth = 0; /* to silence the compiler */</div><div class='ctx'> 		}</div><div class='hunk'>@@ -982,6 +1004,17 @@ static int ad_marker_send(struct port *port, struct bond_marker *marker)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ad_cond_set_peer_notif(struct port *port)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = port-&gt;slave-&gt;bond;</div><div class='add'>+</div><div class='add'>+	if (bond-&gt;params.broadcast_neighbor &amp;&amp; rtnl_trylock()) {</div><div class='add'>+		bond-&gt;send_peer_notif = bond-&gt;params.num_peer_notif *</div><div class='add'>+			max(1, bond-&gt;params.peer_notif_delay);</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ad_mux_machine - handle a port's mux state machine</div><div class='ctx'>  * @port: the port we're looking at</div><div class='hunk'>@@ -1296,10 +1329,16 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> 			 * case of EXPIRED even if LINK_DOWN didn't arrive for</div><div class='ctx'> 			 * the port.</div><div class='ctx'> 			 */</div><div class='del'>-			port-&gt;partner_oper.port_state &amp;= ~LACP_STATE_SYNCHRONIZATION;</div><div class='ctx'> 			port-&gt;sm_vars &amp;= ~AD_PORT_MATCHED;</div><div class='add'>+			/* Based on IEEE 8021AX-2014, Figure 6-18 - Receive</div><div class='add'>+			 * machine state diagram, the statue should be</div><div class='add'>+			 * Partner_Oper_Port_State.Synchronization = FALSE;</div><div class='add'>+			 * Partner_Oper_Port_State.LACP_Timeout = Short Timeout;</div><div class='add'>+			 * start current_while_timer(Short Timeout);</div><div class='add'>+			 * Actor_Oper_Port_State.Expired = TRUE;</div><div class='add'>+			 */</div><div class='add'>+			port-&gt;partner_oper.port_state &amp;= ~LACP_STATE_SYNCHRONIZATION;</div><div class='ctx'> 			port-&gt;partner_oper.port_state |= LACP_STATE_LACP_TIMEOUT;</div><div class='del'>-			port-&gt;partner_oper.port_state |= LACP_STATE_LACP_ACTIVITY;</div><div class='ctx'> 			port-&gt;sm_rx_timer_counter = __ad_timer_to_ticks(AD_CURRENT_WHILE_TIMER, (u16)(AD_SHORT_TIMEOUT));</div><div class='ctx'> 			port-&gt;actor_oper_port_state |= LACP_STATE_EXPIRED;</div><div class='ctx'> 			port-&gt;sm_vars |= AD_PORT_CHURNED;</div><div class='hunk'>@@ -1378,7 +1417,7 @@ static void ad_tx_machine(struct port *port)</div><div class='ctx'> 	/* check if tx timer expired, to verify that we do not send more than</div><div class='ctx'> 	 * 3 packets per second</div><div class='ctx'> 	 */</div><div class='del'>-	if (port-&gt;sm_tx_timer_counter &amp;&amp; !(--port-&gt;sm_tx_timer_counter)) {</div><div class='add'>+	if (!port-&gt;sm_tx_timer_counter || !(--port-&gt;sm_tx_timer_counter)) {</div><div class='ctx'> 		/* check if there is something to send */</div><div class='ctx'> 		if (port-&gt;ntt &amp;&amp; (port-&gt;sm_vars &amp; AD_PORT_LACP_ENABLED)) {</div><div class='ctx'> 			__update_lacpdu_from_port(port);</div><div class='hunk'>@@ -1393,23 +1432,23 @@ static void ad_tx_machine(struct port *port)</div><div class='ctx'> 				 * again until demanded</div><div class='ctx'> 				 */</div><div class='ctx'> 				port-&gt;ntt = false;</div><div class='add'>+</div><div class='add'>+				/* restart tx timer(to verify that we will not</div><div class='add'>+				 * exceed AD_MAX_TX_IN_SECOND</div><div class='add'>+				 */</div><div class='add'>+				port-&gt;sm_tx_timer_counter = ad_ticks_per_sec / AD_MAX_TX_IN_SECOND;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		/* restart tx timer(to verify that we will not exceed</div><div class='del'>-		 * AD_MAX_TX_IN_SECOND</div><div class='del'>-		 */</div><div class='del'>-		port-&gt;sm_tx_timer_counter = ad_ticks_per_sec/AD_MAX_TX_IN_SECOND;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ad_periodic_machine - handle a port's periodic state machine</div><div class='ctx'>  * @port: the port we're looking at</div><div class='del'>- * @bond_params: bond parameters we will use</div><div class='ctx'>  *</div><div class='ctx'>  * Turn ntt flag on priodically to perform periodic transmission of lacpdu's.</div><div class='ctx'>  */</div><div class='del'>-static void ad_periodic_machine(struct port *port, struct bond_params *bond_params)</div><div class='add'>+static void ad_periodic_machine(struct port *port)</div><div class='ctx'> {</div><div class='ctx'> 	periodic_states_t last_state;</div><div class='ctx'> </div><div class='hunk'>@@ -1418,8 +1457,7 @@ static void ad_periodic_machine(struct port *port, struct bond_params *bond_para</div><div class='ctx'> </div><div class='ctx'> 	/* check if port was reinitialized */</div><div class='ctx'> 	if (((port-&gt;sm_vars &amp; AD_PORT_BEGIN) || !(port-&gt;sm_vars &amp; AD_PORT_LACP_ENABLED) || !port-&gt;is_enabled) ||</div><div class='del'>-	    (!(port-&gt;actor_oper_port_state &amp; LACP_STATE_LACP_ACTIVITY) &amp;&amp; !(port-&gt;partner_oper.port_state &amp; LACP_STATE_LACP_ACTIVITY)) ||</div><div class='del'>-	    !bond_params-&gt;lacp_active) {</div><div class='add'>+	    (!(port-&gt;actor_oper_port_state &amp; LACP_STATE_LACP_ACTIVITY) &amp;&amp; !(port-&gt;partner_oper.port_state &amp; LACP_STATE_LACP_ACTIVITY))) {</div><div class='ctx'> 		port-&gt;sm_periodic_state = AD_NO_PERIODIC;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* check if state machine should change state */</div><div class='hunk'>@@ -1691,6 +1729,9 @@ static struct aggregator *ad_agg_selection_test(struct aggregator *best,</div><div class='ctx'> 	 * 4.  Therefore, current and best both have partner replies or</div><div class='ctx'> 	 *     both do not, so perform selection policy:</div><div class='ctx'> 	 *</div><div class='add'>+	 * BOND_AD_PRIO: Select by total priority of ports. If priority</div><div class='add'>+	 *     is equal, select by count.</div><div class='add'>+	 *</div><div class='ctx'> 	 * BOND_AD_COUNT: Select by count of ports.  If count is equal,</div><div class='ctx'> 	 *     select by bandwidth.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -1712,6 +1753,14 @@ static struct aggregator *ad_agg_selection_test(struct aggregator *best,</div><div class='ctx'> 		return best;</div><div class='ctx'> </div><div class='ctx'> 	switch (__get_agg_selection_mode(curr-&gt;lag_ports)) {</div><div class='add'>+	case BOND_AD_PRIO:</div><div class='add'>+		if (__agg_ports_priority(curr) &gt; __agg_ports_priority(best))</div><div class='add'>+			return curr;</div><div class='add'>+</div><div class='add'>+		if (__agg_ports_priority(curr) &lt; __agg_ports_priority(best))</div><div class='add'>+			return best;</div><div class='add'>+</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case BOND_AD_COUNT:</div><div class='ctx'> 		if (__agg_active_ports(curr) &gt; __agg_active_ports(best))</div><div class='ctx'> 			return curr;</div><div class='hunk'>@@ -1777,6 +1826,10 @@ static int agg_device_up(const struct aggregator *agg)</div><div class='ctx'>  * (slaves), and reselect whenever a link state change takes place or the</div><div class='ctx'>  * set of slaves in the bond changes.</div><div class='ctx'>  *</div><div class='add'>+ * BOND_AD_PRIO: select the aggregator with highest total priority of ports</div><div class='add'>+ * (slaves), and reselect whenever a link state change takes place or the</div><div class='add'>+ * set of slaves in the bond changes.</div><div class='add'>+ *</div><div class='ctx'>  * FIXME: this function MUST be called with the first agg in the bond, or</div><div class='ctx'>  * __get_active_agg() won't work correctly. This function should be better</div><div class='ctx'>  * called with the bond itself, and retrieve the first agg from it.</div><div class='hunk'>@@ -1943,16 +1996,16 @@ static void ad_initialize_agg(struct aggregator *aggregator)</div><div class='ctx'> /**</div><div class='ctx'>  * ad_initialize_port - initialize a given port's parameters</div><div class='ctx'>  * @port: the port we're looking at</div><div class='del'>- * @lacp_fast: boolean. whether fast periodic should be used</div><div class='add'>+ * @bond_params: bond parameters we will use</div><div class='ctx'>  */</div><div class='del'>-static void ad_initialize_port(struct port *port, int lacp_fast)</div><div class='add'>+static void ad_initialize_port(struct port *port, const struct bond_params *bond_params)</div><div class='ctx'> {</div><div class='ctx'> 	static const struct port_params tmpl = {</div><div class='ctx'> 		.system_priority = 0xffff,</div><div class='ctx'> 		.key             = 1,</div><div class='ctx'> 		.port_number     = 1,</div><div class='ctx'> 		.port_priority   = 0xff,</div><div class='del'>-		.port_state      = 1,</div><div class='add'>+		.port_state      = 0,</div><div class='ctx'> 	};</div><div class='ctx'> 	static const struct lacpdu lacpdu = {</div><div class='ctx'> 		.subtype		= 0x01,</div><div class='hunk'>@@ -1970,12 +2023,14 @@ static void ad_initialize_port(struct port *port, int lacp_fast)</div><div class='ctx'> 		port-&gt;actor_port_priority = 0xff;</div><div class='ctx'> 		port-&gt;actor_port_aggregator_identifier = 0;</div><div class='ctx'> 		port-&gt;ntt = false;</div><div class='del'>-		port-&gt;actor_admin_port_state = LACP_STATE_AGGREGATION |</div><div class='del'>-					       LACP_STATE_LACP_ACTIVITY;</div><div class='del'>-		port-&gt;actor_oper_port_state  = LACP_STATE_AGGREGATION |</div><div class='del'>-					       LACP_STATE_LACP_ACTIVITY;</div><div class='add'>+		port-&gt;actor_admin_port_state = LACP_STATE_AGGREGATION;</div><div class='add'>+		port-&gt;actor_oper_port_state  = LACP_STATE_AGGREGATION;</div><div class='add'>+		if (bond_params-&gt;lacp_active) {</div><div class='add'>+			port-&gt;actor_admin_port_state |= LACP_STATE_LACP_ACTIVITY;</div><div class='add'>+			port-&gt;actor_oper_port_state  |= LACP_STATE_LACP_ACTIVITY;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if (lacp_fast)</div><div class='add'>+		if (bond_params-&gt;lacp_fast)</div><div class='ctx'> 			port-&gt;actor_oper_port_state |= LACP_STATE_LACP_TIMEOUT;</div><div class='ctx'> </div><div class='ctx'> 		memcpy(&amp;port-&gt;partner_admin, &amp;tmpl, sizeof(tmpl));</div><div class='hunk'>@@ -2061,6 +2116,8 @@ static void ad_enable_collecting_distributing(struct port *port,</div><div class='ctx'> 		__enable_port(port);</div><div class='ctx'> 		/* Slave array needs update */</div><div class='ctx'> 		*update_slave_arr = true;</div><div class='add'>+		/* Should notify peers if possible */</div><div class='add'>+		ad_cond_set_peer_notif(port);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2187,7 +2244,10 @@ void bond_3ad_bind_slave(struct slave *slave)</div><div class='ctx'> 		/* port initialization */</div><div class='ctx'> 		port = &amp;(SLAVE_AD_INFO(slave)-&gt;port);</div><div class='ctx'> </div><div class='del'>-		ad_initialize_port(port, bond-&gt;params.lacp_fast);</div><div class='add'>+		ad_initialize_port(port, &amp;bond-&gt;params);</div><div class='add'>+</div><div class='add'>+		/* Port priority is initialized. Update it to slave's ad info */</div><div class='add'>+		SLAVE_AD_INFO(slave)-&gt;port_priority = port-&gt;actor_port_priority;</div><div class='ctx'> </div><div class='ctx'> 		port-&gt;slave = slave;</div><div class='ctx'> 		port-&gt;actor_port_number = SLAVE_AD_INFO(slave)-&gt;id;</div><div class='hunk'>@@ -2499,7 +2559,7 @@ void bond_3ad_state_machine_handler(struct work_struct *work)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ad_rx_machine(NULL, port);</div><div class='del'>-		ad_periodic_machine(port, &amp;bond-&gt;params);</div><div class='add'>+		ad_periodic_machine(port);</div><div class='ctx'> 		ad_port_selection_logic(port, &amp;update_slave_arr);</div><div class='ctx'> 		ad_mux_machine(port, &amp;update_slave_arr);</div><div class='ctx'> 		ad_tx_machine(port);</div><div class='hunk'>@@ -2869,6 +2929,31 @@ void bond_3ad_update_lacp_rate(struct bonding *bond)</div><div class='ctx'> 	spin_unlock_bh(&amp;bond-&gt;mode_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * bond_3ad_update_lacp_active - change the lacp active</div><div class='add'>+ * @bond: bonding struct</div><div class='add'>+ *</div><div class='add'>+ * Update actor_oper_port_state when lacp_active is modified.</div><div class='add'>+ */</div><div class='add'>+void bond_3ad_update_lacp_active(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	struct port *port = NULL;</div><div class='add'>+	struct list_head *iter;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+	int lacp_active;</div><div class='add'>+</div><div class='add'>+	lacp_active = bond-&gt;params.lacp_active;</div><div class='add'>+	spin_lock_bh(&amp;bond-&gt;mode_lock);</div><div class='add'>+	bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+		port = &amp;(SLAVE_AD_INFO(slave)-&gt;port);</div><div class='add'>+		if (lacp_active)</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_LACP_ACTIVITY;</div><div class='add'>+		else</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_LACP_ACTIVITY;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;bond-&gt;mode_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> size_t bond_3ad_stats_size(void)</div><div class='ctx'> {</div><div class='ctx'> 	return nla_total_size_64bit(sizeof(u64)) + /* BOND_3AD_STAT_LACPDU_RX */</div><div class='head'>diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c<br/>index 7edf0fd58c34..2d37b07c8215 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_alb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_alb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_alb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_alb.c</a></div><div class='hunk'>@@ -1035,7 +1035,7 @@ static int alb_set_slave_mac_addr(struct slave *slave, const u8 addr[],</div><div class='ctx'> 	 */</div><div class='ctx'> 	memcpy(ss.__data, addr, len);</div><div class='ctx'> 	ss.ss_family = dev-&gt;type;</div><div class='del'>-	if (dev_set_mac_address(dev, (struct sockaddr *)&amp;ss, NULL)) {</div><div class='add'>+	if (dev_set_mac_address(dev, &amp;ss, NULL)) {</div><div class='ctx'> 		slave_err(slave-&gt;bond-&gt;dev, dev, "dev_set_mac_address on slave failed! ALB mode requires that the base driver support setting the hw address also when the network device's interface is open\n");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1273,8 +1273,7 @@ unwind:</div><div class='ctx'> 			break;</div><div class='ctx'> 		bond_hw_addr_copy(tmp_addr, rollback_slave-&gt;dev-&gt;dev_addr,</div><div class='ctx'> 				  rollback_slave-&gt;dev-&gt;addr_len);</div><div class='del'>-		dev_set_mac_address(rollback_slave-&gt;dev,</div><div class='del'>-				    (struct sockaddr *)&amp;ss, NULL);</div><div class='add'>+		dev_set_mac_address(rollback_slave-&gt;dev, &amp;ss, NULL);</div><div class='ctx'> 		dev_addr_set(rollback_slave-&gt;dev, tmp_addr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1763,8 +1762,7 @@ void bond_alb_handle_active_change(struct bonding *bond, struct slave *new_slave</div><div class='ctx'> 				  bond-&gt;dev-&gt;addr_len);</div><div class='ctx'> 		ss.ss_family = bond-&gt;dev-&gt;type;</div><div class='ctx'> 		/* we don't care if it can't change its mac, best effort */</div><div class='del'>-		dev_set_mac_address(new_slave-&gt;dev, (struct sockaddr *)&amp;ss,</div><div class='del'>-				    NULL);</div><div class='add'>+		dev_set_mac_address(new_slave-&gt;dev, &amp;ss, NULL);</div><div class='ctx'> </div><div class='ctx'> 		dev_addr_set(new_slave-&gt;dev, tmp_addr);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/bonding/bond_debugfs.c b/drivers/net/bonding/bond_debugfs.c<br/>index b19492a7f6ad..8adbec7c5084 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_debugfs.c</a></div><div class='hunk'>@@ -63,13 +63,8 @@ void bond_debug_unregister(struct bonding *bond)</div><div class='ctx'> </div><div class='ctx'> void bond_debug_reregister(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	struct dentry *d;</div><div class='del'>-</div><div class='del'>-	d = debugfs_rename(bonding_debug_root, bond-&gt;debug_dir,</div><div class='del'>-			   bonding_debug_root, bond-&gt;dev-&gt;name);</div><div class='del'>-	if (!IS_ERR(d)) {</div><div class='del'>-		bond-&gt;debug_dir = d;</div><div class='del'>-	} else {</div><div class='add'>+	int err = debugfs_change_name(bond-&gt;debug_dir, "%s", bond-&gt;dev-&gt;name);</div><div class='add'>+	if (err) {</div><div class='ctx'> 		netdev_warn(bond-&gt;dev, "failed to reregister, so just unregister old one\n");</div><div class='ctx'> 		bond_debug_unregister(bond);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c<br/>index 5812e8eaccf1..3d56339a8a10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_main.c</a></div><div class='hunk'>@@ -90,6 +90,7 @@</div><div class='ctx'> #include &lt;net/tls.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> #include &lt;net/ip6_route.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "bonding_priv.h"</div><div class='hunk'>@@ -141,8 +142,7 @@ module_param(downdelay, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(downdelay, "Delay before considering link down, "</div><div class='ctx'> 			    "in milliseconds");</div><div class='ctx'> module_param(use_carrier, int, 0);</div><div class='del'>-MODULE_PARM_DESC(use_carrier, "Use netif_carrier_ok (vs MII ioctls) in miimon; "</div><div class='del'>-			      "0 for off, 1 for on (default)");</div><div class='add'>+MODULE_PARM_DESC(use_carrier, "option obsolete, use_carrier cannot be disabled");</div><div class='ctx'> module_param(mode, charp, 0);</div><div class='ctx'> MODULE_PARM_DESC(mode, "Mode of operation; 0 for balance-rr, "</div><div class='ctx'> 		       "1 for active-backup, 2 for balance-xor, "</div><div class='hunk'>@@ -211,6 +211,8 @@ atomic_t netpoll_block_tx = ATOMIC_INIT(0);</div><div class='ctx'> </div><div class='ctx'> unsigned int bond_net_id __read_mostly;</div><div class='ctx'> </div><div class='add'>+DEFINE_STATIC_KEY_FALSE(bond_bcast_neigh_enabled);</div><div class='add'>+</div><div class='ctx'> static const struct flow_dissector_key flow_keys_bonding_keys[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.key_id = FLOW_DISSECTOR_KEY_CONTROL,</div><div class='hunk'>@@ -322,9 +324,9 @@ static bool bond_sk_check(struct bonding *bond)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool bond_xdp_check(struct bonding *bond)</div><div class='add'>+bool bond_xdp_check(struct bonding *bond, int mode)</div><div class='ctx'> {</div><div class='del'>-	switch (BOND_MODE(bond)) {</div><div class='add'>+	switch (mode) {</div><div class='ctx'> 	case BOND_MODE_ROUNDROBIN:</div><div class='ctx'> 	case BOND_MODE_ACTIVEBACKUP:</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -432,9 +434,6 @@ static struct net_device *bond_ipsec_dev(struct xfrm_state *xs)</div><div class='ctx'> 	struct bonding *bond;</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> </div><div class='del'>-	if (!bond_dev)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='ctx'> 	bond = netdev_priv(bond_dev);</div><div class='ctx'> 	if (BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP)</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -455,13 +454,14 @@ static struct net_device *bond_ipsec_dev(struct xfrm_state *xs)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * bond_ipsec_add_sa - program device with a security association</div><div class='add'>+ * @bond_dev: pointer to the bond net device</div><div class='ctx'>  * @xs: pointer to transformer state struct</div><div class='ctx'>  * @extack: extack point to fill failure reason</div><div class='ctx'>  **/</div><div class='del'>-static int bond_ipsec_add_sa(struct xfrm_state *xs,</div><div class='add'>+static int bond_ipsec_add_sa(struct net_device *bond_dev,</div><div class='add'>+			     struct xfrm_state *xs,</div><div class='ctx'> 			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *bond_dev = xs-&gt;xso.dev;</div><div class='ctx'> 	struct net_device *real_dev;</div><div class='ctx'> 	netdevice_tracker tracker;</div><div class='ctx'> 	struct bond_ipsec *ipsec;</div><div class='hunk'>@@ -497,9 +497,9 @@ static int bond_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	xs-&gt;xso.real_dev = real_dev;</div><div class='del'>-	err = real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_add(xs, extack);</div><div class='add'>+	err = real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_add(real_dev, xs, extack);</div><div class='ctx'> 	if (!err) {</div><div class='add'>+		xs-&gt;xso.real_dev = real_dev;</div><div class='ctx'> 		ipsec-&gt;xs = xs;</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;ipsec-&gt;list);</div><div class='ctx'> 		mutex_lock(&amp;bond-&gt;ipsec_lock);</div><div class='hunk'>@@ -541,11 +541,25 @@ static void bond_ipsec_add_sa_all(struct bonding *bond)</div><div class='ctx'> 		if (ipsec-&gt;xs-&gt;xso.real_dev == real_dev)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		ipsec-&gt;xs-&gt;xso.real_dev = real_dev;</div><div class='del'>-		if (real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_add(ipsec-&gt;xs, NULL)) {</div><div class='add'>+		if (real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_add(real_dev,</div><div class='add'>+							     ipsec-&gt;xs, NULL)) {</div><div class='ctx'> 			slave_warn(bond_dev, real_dev, "%s: failed to add SA\n", __func__);</div><div class='del'>-			ipsec-&gt;xs-&gt;xso.real_dev = NULL;</div><div class='add'>+			continue;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;ipsec-&gt;xs-&gt;lock);</div><div class='add'>+		/* xs might have been killed by the user during the migration</div><div class='add'>+		 * to the new dev, but bond_ipsec_del_sa() should have done</div><div class='add'>+		 * nothing, as xso.real_dev is NULL.</div><div class='add'>+		 * Delete it from the device we just added it to. The pending</div><div class='add'>+		 * bond_ipsec_free_sa() call will do the rest of the cleanup.</div><div class='add'>+		 */</div><div class='add'>+		if (ipsec-&gt;xs-&gt;km.state == XFRM_STATE_DEAD &amp;&amp;</div><div class='add'>+		    real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete)</div><div class='add'>+			real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete(real_dev,</div><div class='add'>+								    ipsec-&gt;xs);</div><div class='add'>+		ipsec-&gt;xs-&gt;xso.real_dev = real_dev;</div><div class='add'>+		spin_unlock_bh(&amp;ipsec-&gt;xs-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;bond-&gt;ipsec_lock);</div><div class='hunk'>@@ -553,54 +567,27 @@ out:</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * bond_ipsec_del_sa - clear out this specific SA</div><div class='add'>+ * @bond_dev: pointer to the bond net device</div><div class='ctx'>  * @xs: pointer to transformer state struct</div><div class='ctx'>  **/</div><div class='del'>-static void bond_ipsec_del_sa(struct xfrm_state *xs)</div><div class='add'>+static void bond_ipsec_del_sa(struct net_device *bond_dev,</div><div class='add'>+			      struct xfrm_state *xs)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *bond_dev = xs-&gt;xso.dev;</div><div class='ctx'> 	struct net_device *real_dev;</div><div class='del'>-	netdevice_tracker tracker;</div><div class='del'>-	struct bond_ipsec *ipsec;</div><div class='del'>-	struct bonding *bond;</div><div class='del'>-	struct slave *slave;</div><div class='ctx'> </div><div class='del'>-	if (!bond_dev)</div><div class='add'>+	if (!bond_dev || !xs-&gt;xso.real_dev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	bond = netdev_priv(bond_dev);</div><div class='del'>-	slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='del'>-	real_dev = slave ? slave-&gt;dev : NULL;</div><div class='del'>-	netdev_hold(real_dev, &amp;tracker, GFP_ATOMIC);</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-</div><div class='del'>-	if (!slave)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (!xs-&gt;xso.real_dev)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	WARN_ON(xs-&gt;xso.real_dev != real_dev);</div><div class='add'>+	real_dev = xs-&gt;xso.real_dev;</div><div class='ctx'> </div><div class='ctx'> 	if (!real_dev-&gt;xfrmdev_ops ||</div><div class='ctx'> 	    !real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete ||</div><div class='ctx'> 	    netif_is_bond_master(real_dev)) {</div><div class='ctx'> 		slave_warn(bond_dev, real_dev, "%s: no slave xdo_dev_state_delete\n", __func__);</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete(xs);</div><div class='del'>-out:</div><div class='del'>-	netdev_put(real_dev, &amp;tracker);</div><div class='del'>-	mutex_lock(&amp;bond-&gt;ipsec_lock);</div><div class='del'>-	list_for_each_entry(ipsec, &amp;bond-&gt;ipsec_list, list) {</div><div class='del'>-		if (ipsec-&gt;xs == xs) {</div><div class='del'>-			list_del(&amp;ipsec-&gt;list);</div><div class='del'>-			kfree(ipsec);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+	real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete(real_dev, xs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bond_ipsec_del_sa_all(struct bonding *bond)</div><div class='hunk'>@@ -626,46 +613,55 @@ static void bond_ipsec_del_sa_all(struct bonding *bond)</div><div class='ctx'> 			slave_warn(bond_dev, real_dev,</div><div class='ctx'> 				   "%s: no slave xdo_dev_state_delete\n",</div><div class='ctx'> 				   __func__);</div><div class='del'>-		} else {</div><div class='del'>-			real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete(ipsec-&gt;xs);</div><div class='del'>-			if (real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free)</div><div class='del'>-				real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free(ipsec-&gt;xs);</div><div class='add'>+			continue;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;ipsec-&gt;xs-&gt;lock);</div><div class='add'>+		ipsec-&gt;xs-&gt;xso.real_dev = NULL;</div><div class='add'>+		/* Don't double delete states killed by the user. */</div><div class='add'>+		if (ipsec-&gt;xs-&gt;km.state != XFRM_STATE_DEAD)</div><div class='add'>+			real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete(real_dev,</div><div class='add'>+								    ipsec-&gt;xs);</div><div class='add'>+		spin_unlock_bh(&amp;ipsec-&gt;xs-&gt;lock);</div><div class='add'>+</div><div class='add'>+		if (real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free)</div><div class='add'>+			real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free(real_dev,</div><div class='add'>+								  ipsec-&gt;xs);</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;bond-&gt;ipsec_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bond_ipsec_free_sa(struct xfrm_state *xs)</div><div class='add'>+static void bond_ipsec_free_sa(struct net_device *bond_dev,</div><div class='add'>+			       struct xfrm_state *xs)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *bond_dev = xs-&gt;xso.dev;</div><div class='ctx'> 	struct net_device *real_dev;</div><div class='del'>-	netdevice_tracker tracker;</div><div class='add'>+	struct bond_ipsec *ipsec;</div><div class='ctx'> 	struct bonding *bond;</div><div class='del'>-	struct slave *slave;</div><div class='ctx'> </div><div class='ctx'> 	if (!bond_dev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='ctx'> 	bond = netdev_priv(bond_dev);</div><div class='del'>-	slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='del'>-	real_dev = slave ? slave-&gt;dev : NULL;</div><div class='del'>-	netdev_hold(real_dev, &amp;tracker, GFP_ATOMIC);</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-</div><div class='del'>-	if (!slave)</div><div class='del'>-		goto out;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;bond-&gt;ipsec_lock);</div><div class='ctx'> 	if (!xs-&gt;xso.real_dev)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(xs-&gt;xso.real_dev != real_dev);</div><div class='add'>+	real_dev = xs-&gt;xso.real_dev;</div><div class='ctx'> </div><div class='del'>-	if (real_dev &amp;&amp; real_dev-&gt;xfrmdev_ops &amp;&amp;</div><div class='add'>+	xs-&gt;xso.real_dev = NULL;</div><div class='add'>+	if (real_dev-&gt;xfrmdev_ops &amp;&amp;</div><div class='ctx'> 	    real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free)</div><div class='del'>-		real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free(xs);</div><div class='add'>+		real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free(real_dev, xs);</div><div class='ctx'> out:</div><div class='del'>-	netdev_put(real_dev, &amp;tracker);</div><div class='add'>+	list_for_each_entry(ipsec, &amp;bond-&gt;ipsec_list, list) {</div><div class='add'>+		if (ipsec-&gt;xs == xs) {</div><div class='add'>+			list_del(&amp;ipsec-&gt;list);</div><div class='add'>+			kfree(ipsec);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;bond-&gt;ipsec_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -676,22 +672,16 @@ out:</div><div class='ctx'> static bool bond_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *xs)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *real_dev;</div><div class='del'>-	bool ok = false;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	real_dev = bond_ipsec_dev(xs);</div><div class='del'>-	if (!real_dev)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (!real_dev-&gt;xfrmdev_ops ||</div><div class='del'>-	    !real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_offload_ok ||</div><div class='del'>-	    netif_is_bond_master(real_dev))</div><div class='del'>-		goto out;</div><div class='add'>+	if (!real_dev || netif_is_bond_master(real_dev)) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ok = real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_offload_ok(skb, xs);</div><div class='del'>-out:</div><div class='ctx'> 	rcu_read_unlock();</div><div class='del'>-	return ok;</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -839,73 +829,6 @@ const char *bond_slave_link_status(s8 link)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* if &lt;dev&gt; supports MII link status reporting, check its link status.</div><div class='del'>- *</div><div class='del'>- * We either do MII/ETHTOOL ioctls, or check netif_carrier_ok(),</div><div class='del'>- * depending upon the setting of the use_carrier parameter.</div><div class='del'>- *</div><div class='del'>- * Return either BMSR_LSTATUS, meaning that the link is up (or we</div><div class='del'>- * can't tell and just pretend it is), or 0, meaning that the link is</div><div class='del'>- * down.</div><div class='del'>- *</div><div class='del'>- * If reporting is non-zero, instead of faking link up, return -1 if</div><div class='del'>- * both ETHTOOL and MII ioctls fail (meaning the device does not</div><div class='del'>- * support them).  If use_carrier is set, return whatever it says.</div><div class='del'>- * It'd be nice if there was a good way to tell if a driver supports</div><div class='del'>- * netif_carrier, but there really isn't.</div><div class='del'>- */</div><div class='del'>-static int bond_check_dev_link(struct bonding *bond,</div><div class='del'>-			       struct net_device *slave_dev, int reporting)</div><div class='del'>-{</div><div class='del'>-	const struct net_device_ops *slave_ops = slave_dev-&gt;netdev_ops;</div><div class='del'>-	int (*ioctl)(struct net_device *, struct ifreq *, int);</div><div class='del'>-	struct ifreq ifr;</div><div class='del'>-	struct mii_ioctl_data *mii;</div><div class='del'>-</div><div class='del'>-	if (!reporting &amp;&amp; !netif_running(slave_dev))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (bond-&gt;params.use_carrier)</div><div class='del'>-		return netif_carrier_ok(slave_dev) ? BMSR_LSTATUS : 0;</div><div class='del'>-</div><div class='del'>-	/* Try to get link status using Ethtool first. */</div><div class='del'>-	if (slave_dev-&gt;ethtool_ops-&gt;get_link)</div><div class='del'>-		return slave_dev-&gt;ethtool_ops-&gt;get_link(slave_dev) ?</div><div class='del'>-			BMSR_LSTATUS : 0;</div><div class='del'>-</div><div class='del'>-	/* Ethtool can't be used, fallback to MII ioctls. */</div><div class='del'>-	ioctl = slave_ops-&gt;ndo_eth_ioctl;</div><div class='del'>-	if (ioctl) {</div><div class='del'>-		/* TODO: set pointer to correct ioctl on a per team member</div><div class='del'>-		 *       bases to make this more efficient. that is, once</div><div class='del'>-		 *       we determine the correct ioctl, we will always</div><div class='del'>-		 *       call it and not the others for that team</div><div class='del'>-		 *       member.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		/* We cannot assume that SIOCGMIIPHY will also read a</div><div class='del'>-		 * register; not all network drivers (e.g., e100)</div><div class='del'>-		 * support that.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		/* Yes, the mii is overlaid on the ifreq.ifr_ifru */</div><div class='del'>-		strscpy_pad(ifr.ifr_name, slave_dev-&gt;name, IFNAMSIZ);</div><div class='del'>-		mii = if_mii(&amp;ifr);</div><div class='del'>-		if (ioctl(slave_dev, &amp;ifr, SIOCGMIIPHY) == 0) {</div><div class='del'>-			mii-&gt;reg_num = MII_BMSR;</div><div class='del'>-			if (ioctl(slave_dev, &amp;ifr, SIOCGMIIREG) == 0)</div><div class='del'>-				return mii-&gt;val_out &amp; BMSR_LSTATUS;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If reporting, report that either there's no ndo_eth_ioctl,</div><div class='del'>-	 * or both SIOCGMIIREG and get_link failed (meaning that we</div><div class='del'>-	 * cannot report link status).  If not reporting, pretend</div><div class='del'>-	 * we're ok.</div><div class='del'>-	 */</div><div class='del'>-	return reporting ? -1 : BMSR_LSTATUS;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*----------------------------- Multicast list ------------------------------*/</div><div class='ctx'> </div><div class='ctx'> /* Push the promiscuity flag down to appropriate slaves */</div><div class='hunk'>@@ -1008,6 +931,8 @@ static void bond_hw_addr_swap(struct bonding *bond, struct slave *new_active,</div><div class='ctx'> </div><div class='ctx'> 		if (bond-&gt;dev-&gt;flags &amp; IFF_UP)</div><div class='ctx'> 			bond_hw_addr_flush(bond-&gt;dev, old_active-&gt;dev);</div><div class='add'>+</div><div class='add'>+		bond_slave_ns_maddrs_add(bond, old_active);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (new_active) {</div><div class='hunk'>@@ -1024,6 +949,8 @@ static void bond_hw_addr_swap(struct bonding *bond, struct slave *new_active,</div><div class='ctx'> 			dev_mc_sync(new_active-&gt;dev, bond-&gt;dev);</div><div class='ctx'> 			netif_addr_unlock_bh(bond-&gt;dev);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		bond_slave_ns_maddrs_del(bond, new_active);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1041,7 +968,7 @@ static int bond_set_dev_addr(struct net_device *bond_dev,</div><div class='ctx'> </div><div class='ctx'> 	slave_dbg(bond_dev, slave_dev, "bond_dev=%p slave_dev=%p slave_dev-&gt;addr_len=%d\n",</div><div class='ctx'> 		  bond_dev, slave_dev, slave_dev-&gt;addr_len);</div><div class='del'>-	err = dev_pre_changeaddr_notify(bond_dev, slave_dev-&gt;dev_addr, NULL);</div><div class='add'>+	err = netif_pre_changeaddr_notify(bond_dev, slave_dev-&gt;dev_addr, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -1115,8 +1042,7 @@ static void bond_do_fail_over_mac(struct bonding *bond,</div><div class='ctx'> 			ss.ss_family = bond-&gt;dev-&gt;type;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		rv = dev_set_mac_address(new_active-&gt;dev,</div><div class='del'>-					 (struct sockaddr *)&amp;ss, NULL);</div><div class='add'>+		rv = dev_set_mac_address(new_active-&gt;dev, &amp;ss, NULL);</div><div class='ctx'> 		if (rv) {</div><div class='ctx'> 			slave_err(bond-&gt;dev, new_active-&gt;dev, "Error %d setting MAC of new active slave\n",</div><div class='ctx'> 				  -rv);</div><div class='hunk'>@@ -1130,8 +1056,7 @@ static void bond_do_fail_over_mac(struct bonding *bond,</div><div class='ctx'> 				  new_active-&gt;dev-&gt;addr_len);</div><div class='ctx'> 		ss.ss_family = old_active-&gt;dev-&gt;type;</div><div class='ctx'> </div><div class='del'>-		rv = dev_set_mac_address(old_active-&gt;dev,</div><div class='del'>-					 (struct sockaddr *)&amp;ss, NULL);</div><div class='add'>+		rv = dev_set_mac_address(old_active-&gt;dev, &amp;ss, NULL);</div><div class='ctx'> 		if (rv)</div><div class='ctx'> 			slave_err(bond-&gt;dev, old_active-&gt;dev, "Error %d setting MAC of old active slave\n",</div><div class='ctx'> 				  -rv);</div><div class='hunk'>@@ -1240,17 +1165,32 @@ static struct slave *bond_find_best_slave(struct bonding *bond)</div><div class='ctx'> /* must be called in RCU critical section or with RTNL held */</div><div class='ctx'> static bool bond_should_notify_peers(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	struct slave *slave = rcu_dereference_rtnl(bond-&gt;curr_active_slave);</div><div class='add'>+	struct bond_up_slave *usable;</div><div class='add'>+	struct slave *slave = NULL;</div><div class='ctx'> </div><div class='del'>-	if (!slave || !bond-&gt;send_peer_notif ||</div><div class='add'>+	if (!bond-&gt;send_peer_notif ||</div><div class='ctx'> 	    bond-&gt;send_peer_notif %</div><div class='ctx'> 	    max(1, bond-&gt;params.peer_notif_delay) != 0 ||</div><div class='del'>-	    !netif_carrier_ok(bond-&gt;dev) ||</div><div class='del'>-	    test_bit(__LINK_STATE_LINKWATCH_PENDING, &amp;slave-&gt;dev-&gt;state))</div><div class='add'>+	    !netif_carrier_ok(bond-&gt;dev))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='add'>+	/* The send_peer_notif is set by active-backup or 8023ad</div><div class='add'>+	 * mode, and cleared in bond_close() when changing mode.</div><div class='add'>+	 * It is safe to only check bond mode here.</div><div class='add'>+	 */</div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='add'>+		usable = rcu_dereference_rtnl(bond-&gt;usable_slaves);</div><div class='add'>+		if (!usable || !READ_ONCE(usable-&gt;count))</div><div class='add'>+			return false;</div><div class='add'>+	} else {</div><div class='add'>+		slave = rcu_dereference_rtnl(bond-&gt;curr_active_slave);</div><div class='add'>+		if (!slave || test_bit(__LINK_STATE_LINKWATCH_PENDING,</div><div class='add'>+				       &amp;slave-&gt;dev-&gt;state))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	netdev_dbg(bond-&gt;dev, "bond_should_notify_peers: slave %s\n",</div><div class='del'>-		   slave ? slave-&gt;dev-&gt;name : "NULL");</div><div class='add'>+		   slave ? slave-&gt;dev-&gt;name : "all");</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -1516,9 +1456,7 @@ static netdev_features_t bond_fix_features(struct net_device *dev,</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> </div><div class='ctx'> 	mask = features;</div><div class='del'>-</div><div class='del'>-	features &amp;= ~NETIF_F_ONE_FOR_ALL;</div><div class='del'>-	features |= NETIF_F_ALL_FOR_ALL;</div><div class='add'>+	features = netdev_base_features(features);</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='ctx'> 		features = netdev_increment_features(features,</div><div class='hunk'>@@ -1530,86 +1468,6 @@ static netdev_features_t bond_fix_features(struct net_device *dev,</div><div class='ctx'> 	return features;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define BOND_VLAN_FEATURES	(NETIF_F_HW_CSUM | NETIF_F_SG | \</div><div class='del'>-				 NETIF_F_FRAGLIST | NETIF_F_GSO_SOFTWARE | \</div><div class='del'>-				 NETIF_F_HIGHDMA | NETIF_F_LRO)</div><div class='del'>-</div><div class='del'>-#define BOND_ENC_FEATURES	(NETIF_F_HW_CSUM | NETIF_F_SG | \</div><div class='del'>-				 NETIF_F_RXCSUM | NETIF_F_GSO_SOFTWARE)</div><div class='del'>-</div><div class='del'>-#define BOND_MPLS_FEATURES	(NETIF_F_HW_CSUM | NETIF_F_SG | \</div><div class='del'>-				 NETIF_F_GSO_SOFTWARE)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void bond_compute_features(struct bonding *bond)</div><div class='del'>-{</div><div class='del'>-	unsigned int dst_release_flag = IFF_XMIT_DST_RELEASE |</div><div class='del'>-					IFF_XMIT_DST_RELEASE_PERM;</div><div class='del'>-	netdev_features_t vlan_features = BOND_VLAN_FEATURES;</div><div class='del'>-	netdev_features_t enc_features  = BOND_ENC_FEATURES;</div><div class='del'>-#ifdef CONFIG_XFRM_OFFLOAD</div><div class='del'>-	netdev_features_t xfrm_features  = BOND_XFRM_FEATURES;</div><div class='del'>-#endif /* CONFIG_XFRM_OFFLOAD */</div><div class='del'>-	netdev_features_t mpls_features  = BOND_MPLS_FEATURES;</div><div class='del'>-	struct net_device *bond_dev = bond-&gt;dev;</div><div class='del'>-	struct list_head *iter;</div><div class='del'>-	struct slave *slave;</div><div class='del'>-	unsigned short max_hard_header_len = ETH_HLEN;</div><div class='del'>-	unsigned int tso_max_size = TSO_MAX_SIZE;</div><div class='del'>-	u16 tso_max_segs = TSO_MAX_SEGS;</div><div class='del'>-</div><div class='del'>-	if (!bond_has_slaves(bond))</div><div class='del'>-		goto done;</div><div class='del'>-	vlan_features &amp;= NETIF_F_ALL_FOR_ALL;</div><div class='del'>-	mpls_features &amp;= NETIF_F_ALL_FOR_ALL;</div><div class='del'>-</div><div class='del'>-	bond_for_each_slave(bond, slave, iter) {</div><div class='del'>-		vlan_features = netdev_increment_features(vlan_features,</div><div class='del'>-			slave-&gt;dev-&gt;vlan_features, BOND_VLAN_FEATURES);</div><div class='del'>-</div><div class='del'>-		enc_features = netdev_increment_features(enc_features,</div><div class='del'>-							 slave-&gt;dev-&gt;hw_enc_features,</div><div class='del'>-							 BOND_ENC_FEATURES);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_XFRM_OFFLOAD</div><div class='del'>-		xfrm_features = netdev_increment_features(xfrm_features,</div><div class='del'>-							  slave-&gt;dev-&gt;hw_enc_features,</div><div class='del'>-							  BOND_XFRM_FEATURES);</div><div class='del'>-#endif /* CONFIG_XFRM_OFFLOAD */</div><div class='del'>-</div><div class='del'>-		mpls_features = netdev_increment_features(mpls_features,</div><div class='del'>-							  slave-&gt;dev-&gt;mpls_features,</div><div class='del'>-							  BOND_MPLS_FEATURES);</div><div class='del'>-</div><div class='del'>-		dst_release_flag &amp;= slave-&gt;dev-&gt;priv_flags;</div><div class='del'>-		if (slave-&gt;dev-&gt;hard_header_len &gt; max_hard_header_len)</div><div class='del'>-			max_hard_header_len = slave-&gt;dev-&gt;hard_header_len;</div><div class='del'>-</div><div class='del'>-		tso_max_size = min(tso_max_size, slave-&gt;dev-&gt;tso_max_size);</div><div class='del'>-		tso_max_segs = min(tso_max_segs, slave-&gt;dev-&gt;tso_max_segs);</div><div class='del'>-	}</div><div class='del'>-	bond_dev-&gt;hard_header_len = max_hard_header_len;</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	bond_dev-&gt;vlan_features = vlan_features;</div><div class='del'>-	bond_dev-&gt;hw_enc_features = enc_features | NETIF_F_GSO_ENCAP_ALL |</div><div class='del'>-				    NETIF_F_HW_VLAN_CTAG_TX |</div><div class='del'>-				    NETIF_F_HW_VLAN_STAG_TX;</div><div class='del'>-#ifdef CONFIG_XFRM_OFFLOAD</div><div class='del'>-	bond_dev-&gt;hw_enc_features |= xfrm_features;</div><div class='del'>-#endif /* CONFIG_XFRM_OFFLOAD */</div><div class='del'>-	bond_dev-&gt;mpls_features = mpls_features;</div><div class='del'>-	netif_set_tso_max_segs(bond_dev, tso_max_segs);</div><div class='del'>-	netif_set_tso_max_size(bond_dev, tso_max_size);</div><div class='del'>-</div><div class='del'>-	bond_dev-&gt;priv_flags &amp;= ~IFF_XMIT_DST_RELEASE;</div><div class='del'>-	if ((bond_dev-&gt;priv_flags &amp; IFF_XMIT_DST_RELEASE_PERM) &amp;&amp;</div><div class='del'>-	    dst_release_flag == (IFF_XMIT_DST_RELEASE | IFF_XMIT_DST_RELEASE_PERM))</div><div class='del'>-		bond_dev-&gt;priv_flags |= IFF_XMIT_DST_RELEASE;</div><div class='del'>-</div><div class='del'>-	netdev_change_features(bond_dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void bond_setup_by_slave(struct net_device *bond_dev,</div><div class='ctx'> 				struct net_device *slave_dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -1924,7 +1782,7 @@ void bond_xdp_set_features(struct net_device *bond_dev)</div><div class='ctx'> </div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	if (!bond_xdp_check(bond) || !bond_has_slaves(bond)) {</div><div class='add'>+	if (!bond_xdp_check(bond, BOND_MODE(bond)) || !bond_has_slaves(bond)) {</div><div class='ctx'> 		xdp_clear_features_flag(bond_dev);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1945,7 +1803,6 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev,</div><div class='ctx'> 	const struct net_device_ops *slave_ops = slave_dev-&gt;netdev_ops;</div><div class='ctx'> 	struct slave *new_slave = NULL, *prev_slave;</div><div class='ctx'> 	struct sockaddr_storage ss;</div><div class='del'>-	int link_reporting;</div><div class='ctx'> 	int res = 0, i;</div><div class='ctx'> </div><div class='ctx'> 	if (slave_dev-&gt;flags &amp; IFF_MASTER &amp;&amp;</div><div class='hunk'>@@ -1955,12 +1812,6 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev,</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!bond-&gt;params.use_carrier &amp;&amp;</div><div class='del'>-	    slave_dev-&gt;ethtool_ops-&gt;get_link == NULL &amp;&amp;</div><div class='del'>-	    slave_ops-&gt;ndo_eth_ioctl == NULL) {</div><div class='del'>-		slave_warn(bond_dev, slave_dev, "no link monitoring support\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* already in-use? */</div><div class='ctx'> 	if (netdev_is_rx_handler_busy(slave_dev)) {</div><div class='ctx'> 		SLAVE_NL_ERR(bond_dev, slave_dev, extack,</div><div class='hunk'>@@ -2109,15 +1960,27 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev,</div><div class='ctx'> 		 * set the master's mac address to that of the first slave</div><div class='ctx'> 		 */</div><div class='ctx'> 		memcpy(ss.__data, bond_dev-&gt;dev_addr, bond_dev-&gt;addr_len);</div><div class='del'>-		ss.ss_family = slave_dev-&gt;type;</div><div class='del'>-		res = dev_set_mac_address(slave_dev, (struct sockaddr *)&amp;ss,</div><div class='del'>-					  extack);</div><div class='del'>-		if (res) {</div><div class='del'>-			slave_err(bond_dev, slave_dev, "Error %d calling set_mac_address\n", res);</div><div class='del'>-			goto err_restore_mtu;</div><div class='del'>-		}</div><div class='add'>+	} else if (bond-&gt;params.fail_over_mac == BOND_FOM_FOLLOW &amp;&amp;</div><div class='add'>+		   BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP &amp;&amp;</div><div class='add'>+		   bond_has_slaves(bond) &amp;&amp;</div><div class='add'>+		   memcmp(slave_dev-&gt;dev_addr, bond_dev-&gt;dev_addr, bond_dev-&gt;addr_len) == 0) {</div><div class='add'>+		/* Set slave to random address to avoid duplicate mac</div><div class='add'>+		 * address in later fail over.</div><div class='add'>+		 */</div><div class='add'>+		eth_random_addr(ss.__data);</div><div class='add'>+	} else {</div><div class='add'>+		goto skip_mac_set;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ss.ss_family = slave_dev-&gt;type;</div><div class='add'>+	res = dev_set_mac_address(slave_dev, &amp;ss, extack);</div><div class='add'>+	if (res) {</div><div class='add'>+		slave_err(bond_dev, slave_dev, "Error %d calling set_mac_address\n", res);</div><div class='add'>+		goto err_restore_mtu;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+skip_mac_set:</div><div class='add'>+</div><div class='ctx'> 	/* set no_addrconf flag before open to prevent IPv6 addrconf */</div><div class='ctx'> 	slave_dev-&gt;priv_flags |= IFF_NO_ADDRCONF;</div><div class='ctx'> </div><div class='hunk'>@@ -2163,29 +2026,10 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev,</div><div class='ctx'> </div><div class='ctx'> 	new_slave-&gt;last_tx = new_slave-&gt;last_rx;</div><div class='ctx'> </div><div class='del'>-	if (bond-&gt;params.miimon &amp;&amp; !bond-&gt;params.use_carrier) {</div><div class='del'>-		link_reporting = bond_check_dev_link(bond, slave_dev, 1);</div><div class='del'>-</div><div class='del'>-		if ((link_reporting == -1) &amp;&amp; !bond-&gt;params.arp_interval) {</div><div class='del'>-			/* miimon is set but a bonded network driver</div><div class='del'>-			 * does not support ETHTOOL/MII and</div><div class='del'>-			 * arp_interval is not set.  Note: if</div><div class='del'>-			 * use_carrier is enabled, we will never go</div><div class='del'>-			 * here (because netif_carrier is always</div><div class='del'>-			 * supported); thus, we don't need to change</div><div class='del'>-			 * the messages for netif_carrier.</div><div class='del'>-			 */</div><div class='del'>-			slave_warn(bond_dev, slave_dev, "MII and ETHTOOL support not available for slave, and arp_interval/arp_ip_target module parameters not specified, thus bonding will not detect link failures! see bonding.txt for details\n");</div><div class='del'>-		} else if (link_reporting == -1) {</div><div class='del'>-			/* unable get link status using mii/ethtool */</div><div class='del'>-			slave_warn(bond_dev, slave_dev, "can't get link status from slave; the network driver associated with this interface does not support MII or ETHTOOL link status reporting, thus miimon has no effect on this interface\n");</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* check for initial state */</div><div class='ctx'> 	new_slave-&gt;link = BOND_LINK_NOCHANGE;</div><div class='ctx'> 	if (bond-&gt;params.miimon) {</div><div class='del'>-		if (bond_check_dev_link(bond, slave_dev, 0) == BMSR_LSTATUS) {</div><div class='add'>+		if (netif_running(slave_dev) &amp;&amp; netif_carrier_ok(slave_dev)) {</div><div class='ctx'> 			if (bond-&gt;params.updelay) {</div><div class='ctx'> 				bond_set_slave_link_state(new_slave,</div><div class='ctx'> 							  BOND_LINK_BACK,</div><div class='hunk'>@@ -2338,19 +2182,25 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bond-&gt;slave_cnt++;</div><div class='del'>-	bond_compute_features(bond);</div><div class='add'>+	netdev_compute_master_upper_features(bond-&gt;dev, true);</div><div class='ctx'> 	bond_set_carrier(bond);</div><div class='ctx'> </div><div class='add'>+	/* Needs to be called before bond_select_active_slave(), which will</div><div class='add'>+	 * remove the maddrs if the slave is selected as active slave.</div><div class='add'>+	 */</div><div class='add'>+	bond_slave_ns_maddrs_add(bond, new_slave);</div><div class='add'>+</div><div class='ctx'> 	if (bond_uses_primary(bond)) {</div><div class='ctx'> 		block_netpoll_tx();</div><div class='ctx'> 		bond_select_active_slave(bond);</div><div class='ctx'> 		unblock_netpoll_tx();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (bond_mode_can_use_xmit_hash(bond))</div><div class='add'>+	/* broadcast mode uses the all_slaves to loop through slaves. */</div><div class='add'>+	if (bond_mode_can_use_xmit_hash(bond) ||</div><div class='add'>+	    BOND_MODE(bond) == BOND_MODE_BROADCAST)</div><div class='ctx'> 		bond_update_slave_arr(bond, NULL);</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	if (!slave_dev-&gt;netdev_ops-&gt;ndo_bpf ||</div><div class='ctx'> 	    !slave_dev-&gt;netdev_ops-&gt;ndo_xdp_xmit) {</div><div class='ctx'> 		if (bond-&gt;xdp_prog) {</div><div class='hunk'>@@ -2434,7 +2284,7 @@ err_restore_mac:</div><div class='ctx'> 		bond_hw_addr_copy(ss.__data, new_slave-&gt;perm_hwaddr,</div><div class='ctx'> 				  new_slave-&gt;dev-&gt;addr_len);</div><div class='ctx'> 		ss.ss_family = slave_dev-&gt;type;</div><div class='del'>-		dev_set_mac_address(slave_dev, (struct sockaddr *)&amp;ss, NULL);</div><div class='add'>+		dev_set_mac_address(slave_dev, &amp;ss, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err_restore_mtu:</div><div class='hunk'>@@ -2524,7 +2374,8 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> </div><div class='ctx'> 	bond_upper_dev_unlink(bond, slave);</div><div class='ctx'> </div><div class='del'>-	if (bond_mode_can_use_xmit_hash(bond))</div><div class='add'>+	if (bond_mode_can_use_xmit_hash(bond) ||</div><div class='add'>+	    BOND_MODE(bond) == BOND_MODE_BROADCAST)</div><div class='ctx'> 		bond_update_slave_arr(bond, slave);</div><div class='ctx'> </div><div class='ctx'> 	slave_info(bond_dev, slave_dev, "Releasing %s interface\n",</div><div class='hunk'>@@ -2534,7 +2385,7 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> </div><div class='ctx'> 	RCU_INIT_POINTER(bond-&gt;current_arp_slave, NULL);</div><div class='ctx'> </div><div class='del'>-	if (!all &amp;&amp; (!bond-&gt;params.fail_over_mac ||</div><div class='add'>+	if (!all &amp;&amp; (bond-&gt;params.fail_over_mac != BOND_FOM_ACTIVE ||</div><div class='ctx'> 		     BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP)) {</div><div class='ctx'> 		if (ether_addr_equal_64bits(bond_dev-&gt;dev_addr, slave-&gt;perm_hwaddr) &amp;&amp;</div><div class='ctx'> 		    bond_has_slaves(bond))</div><div class='hunk'>@@ -2548,6 +2399,12 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 	if (oldcurrent == slave)</div><div class='ctx'> 		bond_change_active_slave(bond, NULL);</div><div class='ctx'> </div><div class='add'>+	/* Must be called after bond_change_active_slave () as the slave</div><div class='add'>+	 * might change from an active slave to a backup slave. Then it is</div><div class='add'>+	 * necessary to clear the maddrs on the backup slave.</div><div class='add'>+	 */</div><div class='add'>+	bond_slave_ns_maddrs_del(bond, slave);</div><div class='add'>+</div><div class='ctx'> 	if (bond_is_lb(bond)) {</div><div class='ctx'> 		/* Must be called only after the slave has been</div><div class='ctx'> 		 * detached from the list and the curr_active_slave</div><div class='hunk'>@@ -2580,7 +2437,7 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 		call_netdevice_notifiers(NETDEV_RELEASE, bond-&gt;dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bond_compute_features(bond);</div><div class='add'>+	netdev_compute_master_upper_features(bond-&gt;dev, true);</div><div class='ctx'> 	if (!(bond_dev-&gt;features &amp; NETIF_F_VLAN_CHALLENGED) &amp;&amp;</div><div class='ctx'> 	    (old_features &amp; NETIF_F_VLAN_CHALLENGED))</div><div class='ctx'> 		slave_info(bond_dev, slave_dev, "last VLAN challenged slave left bond - VLAN blocking is removed\n");</div><div class='hunk'>@@ -2622,13 +2479,16 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 		bond_hw_addr_copy(ss.__data, slave-&gt;perm_hwaddr,</div><div class='ctx'> 				  slave-&gt;dev-&gt;addr_len);</div><div class='ctx'> 		ss.ss_family = slave_dev-&gt;type;</div><div class='del'>-		dev_set_mac_address(slave_dev, (struct sockaddr *)&amp;ss, NULL);</div><div class='add'>+		dev_set_mac_address(slave_dev, &amp;ss, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (unregister)</div><div class='del'>-		__dev_set_mtu(slave_dev, slave-&gt;original_mtu);</div><div class='del'>-	else</div><div class='add'>+	if (unregister) {</div><div class='add'>+		netdev_lock_ops(slave_dev);</div><div class='add'>+		__netif_set_mtu(slave_dev, slave-&gt;original_mtu);</div><div class='add'>+		netdev_unlock_ops(slave_dev);</div><div class='add'>+	} else {</div><div class='ctx'> 		dev_set_mtu(slave_dev, slave-&gt;original_mtu);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_is_bond_master(slave_dev))</div><div class='ctx'> 		slave_dev-&gt;priv_flags &amp;= ~IFF_BONDING;</div><div class='hunk'>@@ -2714,7 +2574,8 @@ static int bond_miimon_inspect(struct bonding *bond)</div><div class='ctx'> 	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='ctx'> 		bond_propose_link_state(slave, BOND_LINK_NOCHANGE);</div><div class='ctx'> </div><div class='del'>-		link_state = bond_check_dev_link(bond, slave-&gt;dev, 0);</div><div class='add'>+		link_state = netif_running(slave-&gt;dev) &amp;&amp;</div><div class='add'>+			     netif_carrier_ok(slave-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 		switch (slave-&gt;link) {</div><div class='ctx'> 		case BOND_LINK_UP:</div><div class='hunk'>@@ -2923,7 +2784,7 @@ static void bond_mii_monitor(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = container_of(work, struct bonding,</div><div class='ctx'> 					    mii_work.work);</div><div class='del'>-	bool should_notify_peers = false;</div><div class='add'>+	bool should_notify_peers;</div><div class='ctx'> 	bool commit;</div><div class='ctx'> 	unsigned long delay;</div><div class='ctx'> 	struct slave *slave;</div><div class='hunk'>@@ -2935,30 +2796,33 @@ static void bond_mii_monitor(struct work_struct *work)</div><div class='ctx'> 		goto re_arm;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='add'>+</div><div class='ctx'> 	should_notify_peers = bond_should_notify_peers(bond);</div><div class='ctx'> 	commit = !!bond_miimon_inspect(bond);</div><div class='del'>-	if (bond-&gt;send_peer_notif) {</div><div class='del'>-		rcu_read_unlock();</div><div class='del'>-		if (rtnl_trylock()) {</div><div class='del'>-			bond-&gt;send_peer_notif--;</div><div class='del'>-			rtnl_unlock();</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		rcu_read_unlock();</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (commit) {</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	if (commit || bond-&gt;send_peer_notif) {</div><div class='ctx'> 		/* Race avoidance with bond_close cancel of workqueue */</div><div class='ctx'> 		if (!rtnl_trylock()) {</div><div class='ctx'> 			delay = 1;</div><div class='del'>-			should_notify_peers = false;</div><div class='ctx'> 			goto re_arm;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		bond_for_each_slave(bond, slave, iter) {</div><div class='del'>-			bond_commit_link_state(slave, BOND_SLAVE_NOTIFY_LATER);</div><div class='add'>+		if (commit) {</div><div class='add'>+			bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+				bond_commit_link_state(slave,</div><div class='add'>+						       BOND_SLAVE_NOTIFY_LATER);</div><div class='add'>+			}</div><div class='add'>+			bond_miimon_commit(bond);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (bond-&gt;send_peer_notif) {</div><div class='add'>+			bond-&gt;send_peer_notif--;</div><div class='add'>+			if (should_notify_peers)</div><div class='add'>+				call_netdevice_notifiers(NETDEV_NOTIFY_PEERS,</div><div class='add'>+							 bond-&gt;dev);</div><div class='ctx'> 		}</div><div class='del'>-		bond_miimon_commit(bond);</div><div class='ctx'> </div><div class='ctx'> 		rtnl_unlock();	/* might sleep, hold no other locks */</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2966,13 +2830,6 @@ static void bond_mii_monitor(struct work_struct *work)</div><div class='ctx'> re_arm:</div><div class='ctx'> 	if (bond-&gt;params.miimon)</div><div class='ctx'> 		queue_delayed_work(bond-&gt;wq, &amp;bond-&gt;mii_work, delay);</div><div class='del'>-</div><div class='del'>-	if (should_notify_peers) {</div><div class='del'>-		if (!rtnl_trylock())</div><div class='del'>-			return;</div><div class='del'>-		call_netdevice_notifiers(NETDEV_NOTIFY_PEERS, bond-&gt;dev);</div><div class='del'>-		rtnl_unlock();</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bond_upper_dev_walk(struct net_device *upper,</div><div class='hunk'>@@ -3310,7 +3167,6 @@ static void bond_ns_send_all(struct bonding *bond, struct slave *slave)</div><div class='ctx'> 		/* Find out through which dev should the packet go */</div><div class='ctx'> 		memset(&amp;fl6, 0, sizeof(struct flowi6));</div><div class='ctx'> 		fl6.daddr = targets[i];</div><div class='del'>-		fl6.flowi6_oif = bond-&gt;dev-&gt;ifindex;</div><div class='ctx'> </div><div class='ctx'> 		dst = ip6_route_output(dev_net(bond-&gt;dev), NULL, &amp;fl6);</div><div class='ctx'> 		if (dst-&gt;error) {</div><div class='hunk'>@@ -4081,7 +3937,7 @@ static int bond_slave_netdev_event(unsigned long event,</div><div class='ctx'> 	case NETDEV_FEAT_CHANGE:</div><div class='ctx'> 		if (!bond-&gt;notifier_ctx) {</div><div class='ctx'> 			bond-&gt;notifier_ctx = true;</div><div class='del'>-			bond_compute_features(bond);</div><div class='add'>+			netdev_compute_master_upper_features(bond-&gt;dev, true);</div><div class='ctx'> 			bond-&gt;notifier_ctx = false;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -4194,7 +4050,7 @@ static bool bond_flow_ip(struct sk_buff *skb, struct flow_keys *fk, const void *</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (l34 &amp;&amp; *ip_proto &gt;= 0)</div><div class='del'>-		fk-&gt;ports.ports = __skb_flow_get_ports(skb, *nhoff, *ip_proto, data, hlen);</div><div class='add'>+		fk-&gt;ports.ports = skb_flow_get_ports(skb, *nhoff, *ip_proto, data, hlen);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -4366,7 +4222,7 @@ void bond_work_init_all(struct bonding *bond)</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;bond-&gt;slave_arr_work, bond_slave_arr_handler);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bond_work_cancel_all(struct bonding *bond)</div><div class='add'>+void bond_work_cancel_all(struct bonding *bond)</div><div class='ctx'> {</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;bond-&gt;mii_work);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;bond-&gt;arp_work);</div><div class='hunk'>@@ -4428,6 +4284,9 @@ static int bond_open(struct net_device *bond_dev)</div><div class='ctx'> </div><div class='ctx'> 		bond_for_each_slave(bond, slave, iter)</div><div class='ctx'> 			dev_mc_add(slave-&gt;dev, lacpdu_mcast_addr);</div><div class='add'>+</div><div class='add'>+		if (bond-&gt;params.broadcast_neighbor)</div><div class='add'>+			static_branch_inc(&amp;bond_bcast_neigh_enabled);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (bond_mode_can_use_xmit_hash(bond))</div><div class='hunk'>@@ -4447,6 +4306,10 @@ static int bond_close(struct net_device *bond_dev)</div><div class='ctx'> 		bond_alb_deinitialize(bond);</div><div class='ctx'> 	bond-&gt;recv_probe = NULL;</div><div class='ctx'> </div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_8023AD &amp;&amp;</div><div class='add'>+	    bond-&gt;params.broadcast_neighbor)</div><div class='add'>+		static_branch_dec(&amp;bond_bcast_neigh_enabled);</div><div class='add'>+</div><div class='ctx'> 	if (bond_uses_primary(bond)) {</div><div class='ctx'> 		rcu_read_lock();</div><div class='ctx'> 		slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='hunk'>@@ -4906,8 +4769,7 @@ unwind:</div><div class='ctx'> 		if (rollback_slave == slave)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		tmp_res = dev_set_mac_address(rollback_slave-&gt;dev,</div><div class='del'>-					      (struct sockaddr *)&amp;tmp_ss, NULL);</div><div class='add'>+		tmp_res = dev_set_mac_address(rollback_slave-&gt;dev, &amp;tmp_ss, NULL);</div><div class='ctx'> 		if (tmp_res) {</div><div class='ctx'> 			slave_dbg(bond_dev, rollback_slave-&gt;dev, "%s: unwind err %d\n",</div><div class='ctx'> 				   __func__, tmp_res);</div><div class='hunk'>@@ -5283,6 +5145,37 @@ static struct slave *bond_xdp_xmit_3ad_xor_slave_get(struct bonding *bond,</div><div class='ctx'> 	return slaves-&gt;arr[hash % count];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool bond_should_broadcast_neighbor(struct sk_buff *skb,</div><div class='add'>+					   struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(dev);</div><div class='add'>+	struct {</div><div class='add'>+		struct ipv6hdr ip6;</div><div class='add'>+		struct icmp6hdr icmp6;</div><div class='add'>+	} *combined, _combined;</div><div class='add'>+</div><div class='add'>+	if (!static_branch_unlikely(&amp;bond_bcast_neigh_enabled))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!bond-&gt;params.broadcast_neighbor)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;protocol == htons(ETH_P_ARP))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;protocol == htons(ETH_P_IPV6)) {</div><div class='add'>+		combined = skb_header_pointer(skb, skb_mac_header_len(skb),</div><div class='add'>+					      sizeof(_combined),</div><div class='add'>+					      &amp;_combined);</div><div class='add'>+		if (combined &amp;&amp; combined-&gt;ip6.nexthdr == NEXTHDR_ICMP &amp;&amp;</div><div class='add'>+		    (combined-&gt;icmp6.icmp6_type == NDISC_NEIGHBOUR_SOLICITATION ||</div><div class='add'>+		     combined-&gt;icmp6.icmp6_type == NDISC_NEIGHBOUR_ADVERTISEMENT))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Use this Xmit function for 3AD as well as XOR modes. The current</div><div class='ctx'>  * usable slave array is formed in the control path. The xmit function</div><div class='ctx'>  * just calculates hash and sends the packet out.</div><div class='hunk'>@@ -5302,17 +5195,27 @@ static netdev_tx_t bond_3ad_xor_xmit(struct sk_buff *skb,</div><div class='ctx'> 	return bond_tx_drop(dev, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* in broadcast mode, we send everything to all usable interfaces. */</div><div class='add'>+/* in broadcast mode, we send everything to all or usable slave interfaces.</div><div class='add'>+ * under rcu_read_lock when this function is called.</div><div class='add'>+ */</div><div class='ctx'> static netdev_tx_t bond_xmit_broadcast(struct sk_buff *skb,</div><div class='del'>-				       struct net_device *bond_dev)</div><div class='add'>+				       struct net_device *bond_dev,</div><div class='add'>+				       bool all_slaves)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='del'>-	struct slave *slave = NULL;</div><div class='del'>-	struct list_head *iter;</div><div class='add'>+	struct bond_up_slave *slaves;</div><div class='ctx'> 	bool xmit_suc = false;</div><div class='ctx'> 	bool skb_used = false;</div><div class='add'>+	int slaves_count, i;</div><div class='ctx'> </div><div class='del'>-	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='add'>+	if (all_slaves)</div><div class='add'>+		slaves = rcu_dereference(bond-&gt;all_slaves);</div><div class='add'>+	else</div><div class='add'>+		slaves = rcu_dereference(bond-&gt;usable_slaves);</div><div class='add'>+</div><div class='add'>+	slaves_count = slaves ? READ_ONCE(slaves-&gt;count) : 0;</div><div class='add'>+	for (i = 0; i &lt; slaves_count; i++) {</div><div class='add'>+		struct slave *slave = slaves-&gt;arr[i];</div><div class='ctx'> 		struct sk_buff *skb2;</div><div class='ctx'> </div><div class='ctx'> 		if (!(bond_slave_is_up(slave) &amp;&amp; slave-&gt;link == BOND_LINK_UP))</div><div class='hunk'>@@ -5550,10 +5453,13 @@ static netdev_tx_t __bond_start_xmit(struct sk_buff *skb, struct net_device *dev</div><div class='ctx'> 	case BOND_MODE_ACTIVEBACKUP:</div><div class='ctx'> 		return bond_xmit_activebackup(skb, dev);</div><div class='ctx'> 	case BOND_MODE_8023AD:</div><div class='add'>+		if (bond_should_broadcast_neighbor(skb, dev))</div><div class='add'>+			return bond_xmit_broadcast(skb, dev, false);</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case BOND_MODE_XOR:</div><div class='ctx'> 		return bond_3ad_xor_xmit(skb, dev);</div><div class='ctx'> 	case BOND_MODE_BROADCAST:</div><div class='del'>-		return bond_xmit_broadcast(skb, dev);</div><div class='add'>+		return bond_xmit_broadcast(skb, dev, true);</div><div class='ctx'> 	case BOND_MODE_ALB:</div><div class='ctx'> 		return bond_alb_xmit(skb, dev);</div><div class='ctx'> 	case BOND_MODE_TLB:</div><div class='hunk'>@@ -5676,7 +5582,7 @@ static int bond_xdp_set(struct net_device *dev, struct bpf_prog *prog,</div><div class='ctx'> </div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	if (!bond_xdp_check(bond)) {</div><div class='add'>+	if (!bond_xdp_check(bond, BOND_MODE(bond))) {</div><div class='ctx'> 		BOND_NL_ERR(dev, extack,</div><div class='ctx'> 			    "No native XDP support for the current bonding mode");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -6005,7 +5911,7 @@ void bond_setup(struct net_device *bond_dev)</div><div class='ctx'> 	bond_dev-&gt;lltx = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Don't allow bond devices to change network namespaces. */</div><div class='del'>-	bond_dev-&gt;netns_local = true;</div><div class='add'>+	bond_dev-&gt;netns_immutable = true;</div><div class='ctx'> </div><div class='ctx'> 	/* By default, we declare the bond to be fully</div><div class='ctx'> 	 * VLAN hardware accelerated capable. Special</div><div class='hunk'>@@ -6014,7 +5920,7 @@ void bond_setup(struct net_device *bond_dev)</div><div class='ctx'> 	 * capable</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	bond_dev-&gt;hw_features = BOND_VLAN_FEATURES |</div><div class='add'>+	bond_dev-&gt;hw_features = MASTER_UPPER_DEV_VLAN_FEATURES |</div><div class='ctx'> 				NETIF_F_HW_VLAN_CTAG_RX |</div><div class='ctx'> 				NETIF_F_HW_VLAN_CTAG_FILTER |</div><div class='ctx'> 				NETIF_F_HW_VLAN_STAG_RX |</div><div class='hunk'>@@ -6023,6 +5929,7 @@ void bond_setup(struct net_device *bond_dev)</div><div class='ctx'> 	bond_dev-&gt;hw_features |= NETIF_F_GSO_ENCAP_ALL;</div><div class='ctx'> 	bond_dev-&gt;features |= bond_dev-&gt;hw_features;</div><div class='ctx'> 	bond_dev-&gt;features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_STAG_TX;</div><div class='add'>+	bond_dev-&gt;features |= NETIF_F_GSO_PARTIAL;</div><div class='ctx'> #ifdef CONFIG_XFRM_OFFLOAD</div><div class='ctx'> 	bond_dev-&gt;hw_features |= BOND_XFRM_FEATURES;</div><div class='ctx'> 	/* Only enable XFRM features if this is an active-backup config */</div><div class='hunk'>@@ -6161,10 +6068,10 @@ static int __init bond_check_params(struct bond_params *params)</div><div class='ctx'> 		downdelay = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((use_carrier != 0) &amp;&amp; (use_carrier != 1)) {</div><div class='del'>-		pr_warn("Warning: use_carrier module parameter (%d), not of valid value (0/1), so it was set to 1\n",</div><div class='del'>-			use_carrier);</div><div class='del'>-		use_carrier = 1;</div><div class='add'>+	if (use_carrier != 1) {</div><div class='add'>+		pr_err("Error: invalid use_carrier parameter (%d)\n",</div><div class='add'>+		       use_carrier);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (num_peer_notif &lt; 0 || num_peer_notif &gt; 255) {</div><div class='hunk'>@@ -6411,7 +6318,6 @@ static int __init bond_check_params(struct bond_params *params)</div><div class='ctx'> 	params-&gt;updelay = updelay;</div><div class='ctx'> 	params-&gt;downdelay = downdelay;</div><div class='ctx'> 	params-&gt;peer_notif_delay = 0;</div><div class='del'>-	params-&gt;use_carrier = use_carrier;</div><div class='ctx'> 	params-&gt;lacp_active = 1;</div><div class='ctx'> 	params-&gt;lacp_fast = lacp_fast;</div><div class='ctx'> 	params-&gt;primary[0] = 0;</div><div class='hunk'>@@ -6428,6 +6334,7 @@ static int __init bond_check_params(struct bond_params *params)</div><div class='ctx'> 	eth_zero_addr(params-&gt;ad_actor_system);</div><div class='ctx'> 	params-&gt;ad_user_port_key = ad_user_port_key;</div><div class='ctx'> 	params-&gt;coupled_control = 1;</div><div class='add'>+	params-&gt;broadcast_neighbor = 0;</div><div class='ctx'> 	if (packets_per_slave &gt; 0) {</div><div class='ctx'> 		params-&gt;reciprocal_packets_per_slave =</div><div class='ctx'> 			reciprocal_value(packets_per_slave);</div><div class='hunk'>@@ -6540,7 +6447,7 @@ static int __net_init bond_net_init(struct net *net)</div><div class='ctx'> </div><div class='ctx'> /* According to commit 69b0216ac255 ("bonding: fix bonding_masters</div><div class='ctx'>  * race condition in bond unloading") we need to remove sysfs files</div><div class='del'>- * before we remove our devices (done later in bond_net_exit_batch_rtnl())</div><div class='add'>+ * before we remove our devices (done later in bond_net_exit_rtnl())</div><div class='ctx'>  */</div><div class='ctx'> static void __net_exit bond_net_pre_exit(struct net *net)</div><div class='ctx'> {</div><div class='hunk'>@@ -6549,25 +6456,20 @@ static void __net_exit bond_net_pre_exit(struct net *net)</div><div class='ctx'> 	bond_destroy_sysfs(bn);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __net_exit bond_net_exit_batch_rtnl(struct list_head *net_list,</div><div class='del'>-						struct list_head *dev_kill_list)</div><div class='add'>+static void __net_exit bond_net_exit_rtnl(struct net *net,</div><div class='add'>+					  struct list_head *dev_kill_list)</div><div class='ctx'> {</div><div class='del'>-	struct bond_net *bn;</div><div class='del'>-	struct net *net;</div><div class='add'>+	struct bond_net *bn = net_generic(net, bond_net_id);</div><div class='add'>+	struct bonding *bond, *tmp_bond;</div><div class='ctx'> </div><div class='ctx'> 	/* Kill off any bonds created after unregistering bond rtnl ops */</div><div class='del'>-	list_for_each_entry(net, net_list, exit_list) {</div><div class='del'>-		struct bonding *bond, *tmp_bond;</div><div class='del'>-</div><div class='del'>-		bn = net_generic(net, bond_net_id);</div><div class='del'>-		list_for_each_entry_safe(bond, tmp_bond, &amp;bn-&gt;dev_list, bond_list)</div><div class='del'>-			unregister_netdevice_queue(bond-&gt;dev, dev_kill_list);</div><div class='del'>-	}</div><div class='add'>+	list_for_each_entry_safe(bond, tmp_bond, &amp;bn-&gt;dev_list, bond_list)</div><div class='add'>+		unregister_netdevice_queue(bond-&gt;dev, dev_kill_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* According to commit 23fa5c2caae0 ("bonding: destroy proc directory</div><div class='ctx'>  * only after all bonds are gone") bond_destroy_proc_dir() is called</div><div class='del'>- * after bond_net_exit_batch_rtnl() has completed.</div><div class='add'>+ * after bond_net_exit_rtnl() has completed.</div><div class='ctx'>  */</div><div class='ctx'> static void __net_exit bond_net_exit_batch(struct list_head *net_list)</div><div class='ctx'> {</div><div class='hunk'>@@ -6583,7 +6485,7 @@ static void __net_exit bond_net_exit_batch(struct list_head *net_list)</div><div class='ctx'> static struct pernet_operations bond_net_ops = {</div><div class='ctx'> 	.init = bond_net_init,</div><div class='ctx'> 	.pre_exit = bond_net_pre_exit,</div><div class='del'>-	.exit_batch_rtnl = bond_net_exit_batch_rtnl,</div><div class='add'>+	.exit_rtnl = bond_net_exit_rtnl,</div><div class='ctx'> 	.exit_batch = bond_net_exit_batch,</div><div class='ctx'> 	.id   = &amp;bond_net_id,</div><div class='ctx'> 	.size = sizeof(struct bond_net),</div><div class='hunk'>@@ -6651,3 +6553,4 @@ module_exit(bonding_exit);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION(DRV_DESCRIPTION);</div><div class='ctx'> MODULE_AUTHOR("Thomas Davis, tadavis@lbl.gov and many others");</div><div class='add'>+MODULE_IMPORT_NS("NETDEV_INTERNAL");</div><div class='head'>diff --git a/drivers/net/bonding/bond_netlink.c b/drivers/net/bonding/bond_netlink.c<br/>index 2a6a424806aa..286f11c517f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_netlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_netlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_netlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_netlink.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@ static size_t bond_get_slave_size(const struct net_device *bond_dev,</div><div class='ctx'> 		nla_total_size(sizeof(u8)) +	/* IFLA_BOND_SLAVE_AD_ACTOR_OPER_PORT_STATE */</div><div class='ctx'> 		nla_total_size(sizeof(u16)) +	/* IFLA_BOND_SLAVE_AD_PARTNER_OPER_PORT_STATE */</div><div class='ctx'> 		nla_total_size(sizeof(s32)) +	/* IFLA_BOND_SLAVE_PRIO */</div><div class='add'>+		nla_total_size(sizeof(u16)) +	/* IFLA_BOND_SLAVE_ACTOR_PORT_PRIO */</div><div class='ctx'> 		0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -77,6 +78,10 @@ static int bond_fill_slave_info(struct sk_buff *skb,</div><div class='ctx'> 					ad_port-&gt;partner_oper.port_state))</div><div class='ctx'> 				goto nla_put_failure;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (nla_put_u16(skb, IFLA_BOND_SLAVE_ACTOR_PORT_PRIO,</div><div class='add'>+				SLAVE_AD_INFO(slave)-&gt;port_priority))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -124,11 +129,13 @@ static const struct nla_policy bond_policy[IFLA_BOND_MAX + 1] = {</div><div class='ctx'> 	[IFLA_BOND_MISSED_MAX]		= { .type = NLA_U8 },</div><div class='ctx'> 	[IFLA_BOND_NS_IP6_TARGET]	= { .type = NLA_NESTED },</div><div class='ctx'> 	[IFLA_BOND_COUPLED_CONTROL]	= { .type = NLA_U8 },</div><div class='add'>+	[IFLA_BOND_BROADCAST_NEIGH]	= { .type = NLA_U8 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct nla_policy bond_slave_policy[IFLA_BOND_SLAVE_MAX + 1] = {</div><div class='ctx'> 	[IFLA_BOND_SLAVE_QUEUE_ID]	= { .type = NLA_U16 },</div><div class='ctx'> 	[IFLA_BOND_SLAVE_PRIO]		= { .type = NLA_S32 },</div><div class='add'>+	[IFLA_BOND_SLAVE_ACTOR_PORT_PRIO]	= { .type = NLA_U16 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int bond_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='hunk'>@@ -179,6 +186,16 @@ static int bond_slave_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (data[IFLA_BOND_SLAVE_ACTOR_PORT_PRIO]) {</div><div class='add'>+		u16 ad_prio = nla_get_u16(data[IFLA_BOND_SLAVE_ACTOR_PORT_PRIO]);</div><div class='add'>+</div><div class='add'>+		bond_opt_slave_initval(&amp;newval, &amp;slave_dev, ad_prio);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_ACTOR_PORT_PRIO, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_SLAVE_ACTOR_PORT_PRIO], extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -258,13 +275,11 @@ static int bond_changelink(struct net_device *bond_dev, struct nlattr *tb[],</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (data[IFLA_BOND_USE_CARRIER]) {</div><div class='del'>-		int use_carrier = nla_get_u8(data[IFLA_BOND_USE_CARRIER]);</div><div class='del'>-</div><div class='del'>-		bond_opt_initval(&amp;newval, use_carrier);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_USE_CARRIER, &amp;newval,</div><div class='del'>-				     data[IFLA_BOND_USE_CARRIER], extack);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='add'>+		if (nla_get_u8(data[IFLA_BOND_USE_CARRIER]) != 1) {</div><div class='add'>+			NL_SET_ERR_MSG_ATTR(extack, data[IFLA_BOND_USE_CARRIER],</div><div class='add'>+					    "option obsolete, use_carrier cannot be disabled");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (data[IFLA_BOND_ARP_INTERVAL]) {</div><div class='ctx'> 		int arp_interval = nla_get_u32(data[IFLA_BOND_ARP_INTERVAL]);</div><div class='hunk'>@@ -561,25 +576,39 @@ static int bond_changelink(struct net_device *bond_dev, struct nlattr *tb[],</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (data[IFLA_BOND_BROADCAST_NEIGH]) {</div><div class='add'>+		int broadcast_neigh = nla_get_u8(data[IFLA_BOND_BROADCAST_NEIGH]);</div><div class='add'>+</div><div class='add'>+		bond_opt_initval(&amp;newval, broadcast_neigh);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_BROADCAST_NEIGH, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_BROADCAST_NEIGH], extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_newlink(struct net *src_net, struct net_device *bond_dev,</div><div class='del'>-			struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int bond_newlink(struct net_device *bond_dev,</div><div class='add'>+			struct rtnl_newlink_params *params,</div><div class='ctx'> 			struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = bond_changelink(bond_dev, tb, data, extack);</div><div class='del'>-	if (err &lt; 0)</div><div class='add'>+	err = register_netdevice(bond_dev);</div><div class='add'>+	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = register_netdevice(bond_dev);</div><div class='del'>-	if (!err) {</div><div class='del'>-		struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+	netif_carrier_off(bond_dev);</div><div class='add'>+	bond_work_init_all(bond);</div><div class='ctx'> </div><div class='del'>-		netif_carrier_off(bond_dev);</div><div class='del'>-		bond_work_init_all(bond);</div><div class='add'>+	err = bond_changelink(bond_dev, tb, data, extack);</div><div class='add'>+	if (err) {</div><div class='add'>+		bond_work_cancel_all(bond);</div><div class='add'>+		unregister_netdevice(bond_dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -628,6 +657,7 @@ static size_t bond_get_size(const struct net_device *bond_dev)</div><div class='ctx'> 		nla_total_size(sizeof(struct nlattr)) +</div><div class='ctx'> 		nla_total_size(sizeof(struct in6_addr)) * BOND_MAX_NS_TARGETS +</div><div class='ctx'> 		nla_total_size(sizeof(u8)) +	/* IFLA_BOND_COUPLED_CONTROL */</div><div class='add'>+		nla_total_size(sizeof(u8)) +	/* IFLA_BOND_BROADCAST_NEIGH */</div><div class='ctx'> 		0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -674,7 +704,7 @@ static int bond_fill_info(struct sk_buff *skb,</div><div class='ctx'> 			bond-&gt;params.peer_notif_delay * bond-&gt;params.miimon))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='del'>-	if (nla_put_u8(skb, IFLA_BOND_USE_CARRIER, bond-&gt;params.use_carrier))</div><div class='add'>+	if (nla_put_u8(skb, IFLA_BOND_USE_CARRIER, 1))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	if (nla_put_u32(skb, IFLA_BOND_ARP_INTERVAL, bond-&gt;params.arp_interval))</div><div class='hunk'>@@ -791,6 +821,10 @@ static int bond_fill_info(struct sk_buff *skb,</div><div class='ctx'> 		       bond-&gt;params.coupled_control))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='add'>+	if (nla_put_u8(skb, IFLA_BOND_BROADCAST_NEIGH,</div><div class='add'>+		       bond-&gt;params.broadcast_neighbor))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		struct ad_info info;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/bonding/bond_options.c b/drivers/net/bonding/bond_options.c<br/>index 95d59a18c022..384499c869b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_options.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_options.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_options.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_options.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/sched/signal.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/bonding.h&gt;</div><div class='add'>+#include &lt;net/ndisc.h&gt;</div><div class='ctx'> </div><div class='ctx'> static int bond_option_active_slave_set(struct bonding *bond,</div><div class='ctx'> 					const struct bond_opt_value *newval);</div><div class='hunk'>@@ -78,6 +79,8 @@ static int bond_option_tlb_dynamic_lb_set(struct bonding *bond,</div><div class='ctx'> 				  const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_ad_actor_sys_prio_set(struct bonding *bond,</div><div class='ctx'> 					     const struct bond_opt_value *newval);</div><div class='add'>+static int bond_option_actor_port_prio_set(struct bonding *bond,</div><div class='add'>+					   const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_ad_actor_system_set(struct bonding *bond,</div><div class='ctx'> 					   const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_ad_user_port_key_set(struct bonding *bond,</div><div class='hunk'>@@ -86,6 +89,8 @@ static int bond_option_missed_max_set(struct bonding *bond,</div><div class='ctx'> 				      const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_coupled_control_set(struct bonding *bond,</div><div class='ctx'> 					   const struct bond_opt_value *newval);</div><div class='add'>+static int bond_option_broadcast_neigh_set(struct bonding *bond,</div><div class='add'>+					   const struct bond_opt_value *newval);</div><div class='ctx'> </div><div class='ctx'> static const struct bond_opt_value bond_mode_tbl[] = {</div><div class='ctx'> 	{ "balance-rr",    BOND_MODE_ROUNDROBIN,   BOND_VALFLAG_DEFAULT},</div><div class='hunk'>@@ -157,10 +162,11 @@ static const struct bond_opt_value bond_lacp_rate_tbl[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bond_opt_value bond_ad_select_tbl[] = {</div><div class='del'>-	{ "stable",    BOND_AD_STABLE,    BOND_VALFLAG_DEFAULT},</div><div class='del'>-	{ "bandwidth", BOND_AD_BANDWIDTH, 0},</div><div class='del'>-	{ "count",     BOND_AD_COUNT,     0},</div><div class='del'>-	{ NULL,        -1,                0},</div><div class='add'>+	{ "stable",          BOND_AD_STABLE,    BOND_VALFLAG_DEFAULT},</div><div class='add'>+	{ "bandwidth",       BOND_AD_BANDWIDTH, 0},</div><div class='add'>+	{ "count",           BOND_AD_COUNT,     0},</div><div class='add'>+	{ "actor_port_prio", BOND_AD_PRIO,      0},</div><div class='add'>+	{ NULL,              -1,                0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bond_opt_value bond_num_peer_notif_tbl[] = {</div><div class='hunk'>@@ -184,7 +190,6 @@ static const struct bond_opt_value bond_primary_reselect_tbl[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bond_opt_value bond_use_carrier_tbl[] = {</div><div class='del'>-	{ "off", 0,  0},</div><div class='ctx'> 	{ "on",  1,  BOND_VALFLAG_DEFAULT},</div><div class='ctx'> 	{ NULL,  -1, 0}</div><div class='ctx'> };</div><div class='hunk'>@@ -239,6 +244,12 @@ static const struct bond_opt_value bond_coupled_control_tbl[] = {</div><div class='ctx'> 	{ NULL,  -1, 0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct bond_opt_value bond_broadcast_neigh_tbl[] = {</div><div class='add'>+	{ "off", 0, BOND_VALFLAG_DEFAULT},</div><div class='add'>+	{ "on",	 1, 0},</div><div class='add'>+	{ NULL,  -1, 0}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 	[BOND_OPT_MODE] = {</div><div class='ctx'> 		.id = BOND_OPT_MODE,</div><div class='hunk'>@@ -361,7 +372,7 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 	[BOND_OPT_AD_SELECT] = {</div><div class='ctx'> 		.id = BOND_OPT_AD_SELECT,</div><div class='ctx'> 		.name = "ad_select",</div><div class='del'>-		.desc = "803.ad aggregation selection logic",</div><div class='add'>+		.desc = "802.3ad aggregation selection logic",</div><div class='ctx'> 		.flags = BOND_OPTFLAG_IFDOWN,</div><div class='ctx'> 		.values = bond_ad_select_tbl,</div><div class='ctx'> 		.set = bond_option_ad_select_set</div><div class='hunk'>@@ -410,7 +421,7 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 	[BOND_OPT_USE_CARRIER] = {</div><div class='ctx'> 		.id = BOND_OPT_USE_CARRIER,</div><div class='ctx'> 		.name = "use_carrier",</div><div class='del'>-		.desc = "Use netif_carrier_ok (vs MII ioctls) in miimon",</div><div class='add'>+		.desc = "option obsolete, use_carrier cannot be disabled",</div><div class='ctx'> 		.values = bond_use_carrier_tbl,</div><div class='ctx'> 		.set = bond_option_use_carrier_set</div><div class='ctx'> 	},</div><div class='hunk'>@@ -475,6 +486,13 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 		.values = bond_ad_actor_sys_prio_tbl,</div><div class='ctx'> 		.set = bond_option_ad_actor_sys_prio_set,</div><div class='ctx'> 	},</div><div class='add'>+	[BOND_OPT_ACTOR_PORT_PRIO] = {</div><div class='add'>+		.id = BOND_OPT_ACTOR_PORT_PRIO,</div><div class='add'>+		.name = "actor_port_prio",</div><div class='add'>+		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_8023AD)),</div><div class='add'>+		.flags = BOND_OPTFLAG_RAWVAL,</div><div class='add'>+		.set = bond_option_actor_port_prio_set,</div><div class='add'>+	},</div><div class='ctx'> 	[BOND_OPT_AD_ACTOR_SYSTEM] = {</div><div class='ctx'> 		.id = BOND_OPT_AD_ACTOR_SYSTEM,</div><div class='ctx'> 		.name = "ad_actor_system",</div><div class='hunk'>@@ -512,6 +530,14 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 		.flags = BOND_OPTFLAG_IFDOWN,</div><div class='ctx'> 		.values = bond_coupled_control_tbl,</div><div class='ctx'> 		.set = bond_option_coupled_control_set,</div><div class='add'>+	},</div><div class='add'>+	[BOND_OPT_BROADCAST_NEIGH] = {</div><div class='add'>+		.id = BOND_OPT_BROADCAST_NEIGH,</div><div class='add'>+		.name = "broadcast_neighbor",</div><div class='add'>+		.desc = "Broadcast neighbor packets to all active slaves",</div><div class='add'>+		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_8023AD)),</div><div class='add'>+		.values = bond_broadcast_neigh_tbl,</div><div class='add'>+		.set = bond_option_broadcast_neigh_set,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -867,6 +893,9 @@ static bool bond_set_xfrm_features(struct bonding *bond)</div><div class='ctx'> static int bond_option_mode_set(struct bonding *bond,</div><div class='ctx'> 				const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='add'>+	if (bond-&gt;xdp_prog &amp;&amp; !bond_xdp_check(bond, newval-&gt;value))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	if (!bond_mode_uses_arp(newval-&gt;value)) {</div><div class='ctx'> 		if (bond-&gt;params.arp_interval) {</div><div class='ctx'> 			netdev_dbg(bond-&gt;dev, "%s mode is incompatible with arp monitoring, start mii monitoring\n",</div><div class='hunk'>@@ -890,6 +919,13 @@ static int bond_option_mode_set(struct bonding *bond,</div><div class='ctx'> 	bond-&gt;params.arp_validate = BOND_ARP_VALIDATE_NONE;</div><div class='ctx'> 	bond-&gt;params.mode = newval-&gt;value;</div><div class='ctx'> </div><div class='add'>+	/* When changing mode, the bond device is down, we may reduce</div><div class='add'>+	 * the bond_bcast_neigh_enabled in bond_close() if broadcast_neighbor</div><div class='add'>+	 * enabled in 8023ad mode. Therefore, only clear broadcast_neighbor</div><div class='add'>+	 * to 0.</div><div class='add'>+	 */</div><div class='add'>+	bond-&gt;params.broadcast_neighbor = 0;</div><div class='add'>+</div><div class='ctx'> 	if (bond-&gt;dev-&gt;reg_state == NETREG_REGISTERED) {</div><div class='ctx'> 		bool update = false;</div><div class='ctx'> </div><div class='hunk'>@@ -1064,10 +1100,6 @@ static int bond_option_peer_notif_delay_set(struct bonding *bond,</div><div class='ctx'> static int bond_option_use_carrier_set(struct bonding *bond,</div><div class='ctx'> 				       const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_dbg(bond-&gt;dev, "Setting use_carrier to %llu\n",</div><div class='del'>-		   newval-&gt;value);</div><div class='del'>-	bond-&gt;params.use_carrier = newval-&gt;value;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1234,6 +1266,107 @@ static int bond_option_arp_ip_targets_set(struct bonding *bond,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+static bool slave_can_set_ns_maddr(const struct bonding *bond, struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	return BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP &amp;&amp;</div><div class='add'>+	       !bond_is_active_slave(slave) &amp;&amp;</div><div class='add'>+	       slave-&gt;dev-&gt;flags &amp; IFF_MULTICAST;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * slave_set_ns_maddrs - add/del all NS mac addresses for slave</div><div class='add'>+ * @bond: bond device</div><div class='add'>+ * @slave: slave device</div><div class='add'>+ * @add: add or remove all the NS mac addresses</div><div class='add'>+ *</div><div class='add'>+ * This function tries to add or delete all the NS mac addresses on the slave</div><div class='add'>+ *</div><div class='add'>+ * Note, the IPv6 NS target address is the unicast address in Neighbor</div><div class='add'>+ * Solicitation (NS) message. The dest address of NS message should be</div><div class='add'>+ * solicited-node multicast address of the target. The dest mac of NS message</div><div class='add'>+ * is converted from the solicited-node multicast address.</div><div class='add'>+ *</div><div class='add'>+ * This function is called when</div><div class='add'>+ *   * arp_validate changes</div><div class='add'>+ *   * enslaving, releasing new slaves</div><div class='add'>+ */</div><div class='add'>+static void slave_set_ns_maddrs(struct bonding *bond, struct slave *slave, bool add)</div><div class='add'>+{</div><div class='add'>+	struct in6_addr *targets = bond-&gt;params.ns_targets;</div><div class='add'>+	char slot_maddr[MAX_ADDR_LEN];</div><div class='add'>+	struct in6_addr mcaddr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!slave_can_set_ns_maddr(bond, slave))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BOND_MAX_NS_TARGETS; i++) {</div><div class='add'>+		if (ipv6_addr_any(&amp;targets[i]))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		addrconf_addr_solict_mult(&amp;targets[i], &amp;mcaddr);</div><div class='add'>+		if (!ndisc_mc_map(&amp;mcaddr, slot_maddr, slave-&gt;dev, 0)) {</div><div class='add'>+			if (add)</div><div class='add'>+				dev_mc_add(slave-&gt;dev, slot_maddr);</div><div class='add'>+			else</div><div class='add'>+				dev_mc_del(slave-&gt;dev, slot_maddr);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bond_slave_ns_maddrs_add(struct bonding *bond, struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	if (!bond-&gt;params.arp_validate)</div><div class='add'>+		return;</div><div class='add'>+	slave_set_ns_maddrs(bond, slave, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bond_slave_ns_maddrs_del(struct bonding *bond, struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	if (!bond-&gt;params.arp_validate)</div><div class='add'>+		return;</div><div class='add'>+	slave_set_ns_maddrs(bond, slave, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * slave_set_ns_maddr - set new NS mac address for slave</div><div class='add'>+ * @bond: bond device</div><div class='add'>+ * @slave: slave device</div><div class='add'>+ * @target: the new IPv6 target</div><div class='add'>+ * @slot: the old IPv6 target in the slot</div><div class='add'>+ *</div><div class='add'>+ * This function tries to replace the old mac address to new one on the slave.</div><div class='add'>+ *</div><div class='add'>+ * Note, the target/slot IPv6 address is the unicast address in Neighbor</div><div class='add'>+ * Solicitation (NS) message. The dest address of NS message should be</div><div class='add'>+ * solicited-node multicast address of the target. The dest mac of NS message</div><div class='add'>+ * is converted from the solicited-node multicast address.</div><div class='add'>+ *</div><div class='add'>+ * This function is called when</div><div class='add'>+ *   * An IPv6 NS target is added or removed.</div><div class='add'>+ */</div><div class='add'>+static void slave_set_ns_maddr(struct bonding *bond, struct slave *slave,</div><div class='add'>+			       struct in6_addr *target, struct in6_addr *slot)</div><div class='add'>+{</div><div class='add'>+	char mac_addr[MAX_ADDR_LEN];</div><div class='add'>+	struct in6_addr mcast_addr;</div><div class='add'>+</div><div class='add'>+	if (!bond-&gt;params.arp_validate || !slave_can_set_ns_maddr(bond, slave))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* remove the previous mac addr from slave */</div><div class='add'>+	addrconf_addr_solict_mult(slot, &amp;mcast_addr);</div><div class='add'>+	if (!ipv6_addr_any(slot) &amp;&amp;</div><div class='add'>+	    !ndisc_mc_map(&amp;mcast_addr, mac_addr, slave-&gt;dev, 0))</div><div class='add'>+		dev_mc_del(slave-&gt;dev, mac_addr);</div><div class='add'>+</div><div class='add'>+	/* add new mac addr on slave if target is set */</div><div class='add'>+	addrconf_addr_solict_mult(target, &amp;mcast_addr);</div><div class='add'>+	if (!ipv6_addr_any(target) &amp;&amp;</div><div class='add'>+	    !ndisc_mc_map(&amp;mcast_addr, mac_addr, slave-&gt;dev, 0))</div><div class='add'>+		dev_mc_add(slave-&gt;dev, mac_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void _bond_options_ns_ip6_target_set(struct bonding *bond, int slot,</div><div class='ctx'> 					    struct in6_addr *target,</div><div class='ctx'> 					    unsigned long last_rx)</div><div class='hunk'>@@ -1243,8 +1376,10 @@ static void _bond_options_ns_ip6_target_set(struct bonding *bond, int slot,</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> </div><div class='ctx'> 	if (slot &gt;= 0 &amp;&amp; slot &lt; BOND_MAX_NS_TARGETS) {</div><div class='del'>-		bond_for_each_slave(bond, slave, iter)</div><div class='add'>+		bond_for_each_slave(bond, slave, iter) {</div><div class='ctx'> 			slave-&gt;target_last_arp_rx[slot] = last_rx;</div><div class='add'>+			slave_set_ns_maddr(bond, slave, target, &amp;targets[slot]);</div><div class='add'>+		}</div><div class='ctx'> 		targets[slot] = *target;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1296,15 +1431,30 @@ static int bond_option_ns_ip6_targets_set(struct bonding *bond,</div><div class='ctx'> {</div><div class='ctx'> 	return -EPERM;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void slave_set_ns_maddrs(struct bonding *bond, struct slave *slave, bool add) {}</div><div class='add'>+</div><div class='add'>+void bond_slave_ns_maddrs_add(struct bonding *bond, struct slave *slave) {}</div><div class='add'>+</div><div class='add'>+void bond_slave_ns_maddrs_del(struct bonding *bond, struct slave *slave) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static int bond_option_arp_validate_set(struct bonding *bond,</div><div class='ctx'> 					const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='add'>+	bool changed = !!bond-&gt;params.arp_validate != !!newval-&gt;value;</div><div class='add'>+	struct list_head *iter;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='ctx'> 	netdev_dbg(bond-&gt;dev, "Setting arp_validate to %s (%llu)\n",</div><div class='ctx'> 		   newval-&gt;string, newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.arp_validate = newval-&gt;value;</div><div class='ctx'> </div><div class='add'>+	if (changed) {</div><div class='add'>+		bond_for_each_slave(bond, slave, iter)</div><div class='add'>+			slave_set_ns_maddrs(bond, slave, !!bond-&gt;params.arp_validate);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1515,6 +1665,7 @@ static int bond_option_lacp_active_set(struct bonding *bond,</div><div class='ctx'> 	netdev_dbg(bond-&gt;dev, "Setting LACP active to %s (%llu)\n",</div><div class='ctx'> 		   newval-&gt;string, newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.lacp_active = newval-&gt;value;</div><div class='add'>+	bond_3ad_update_lacp_active(bond);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1671,6 +1822,26 @@ static int bond_option_ad_actor_sys_prio_set(struct bonding *bond,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bond_option_actor_port_prio_set(struct bonding *bond,</div><div class='add'>+					   const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	slave = bond_slave_get_rtnl(newval-&gt;slave_dev);</div><div class='add'>+	if (!slave) {</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "%s called on NULL slave\n", __func__);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(newval-&gt;slave_dev, "Setting actor_port_prio to %llu\n",</div><div class='add'>+		   newval-&gt;value);</div><div class='add'>+</div><div class='add'>+	SLAVE_AD_INFO(slave)-&gt;port_priority = newval-&gt;value;</div><div class='add'>+	bond_3ad_update_ad_actor_settings(bond);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bond_option_ad_actor_system_set(struct bonding *bond,</div><div class='ctx'> 					   const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='hunk'>@@ -1718,3 +1889,22 @@ static int bond_option_coupled_control_set(struct bonding *bond,</div><div class='ctx'> 	bond-&gt;params.coupled_control = newval-&gt;value;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static int bond_option_broadcast_neigh_set(struct bonding *bond,</div><div class='add'>+					   const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	if (bond-&gt;params.broadcast_neighbor == newval-&gt;value)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	bond-&gt;params.broadcast_neighbor = newval-&gt;value;</div><div class='add'>+	if (bond-&gt;dev-&gt;flags &amp; IFF_UP) {</div><div class='add'>+		if (bond-&gt;params.broadcast_neighbor)</div><div class='add'>+			static_branch_inc(&amp;bond_bcast_neigh_enabled);</div><div class='add'>+		else</div><div class='add'>+			static_branch_dec(&amp;bond_bcast_neigh_enabled);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting broadcast_neighbor to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c<br/>index 1e13bb170515..9a75ad3181ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_sysfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/bonding/bond_sysfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_sysfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_sysfs.c</a></div><div class='hunk'>@@ -467,14 +467,12 @@ static ssize_t bonding_show_primary_reselect(struct device *d,</div><div class='ctx'> static DEVICE_ATTR(primary_reselect, 0644,</div><div class='ctx'> 		   bonding_show_primary_reselect, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='del'>-/* Show the use_carrier flag. */</div><div class='add'>+/* use_carrier is obsolete, but print value for compatibility */</div><div class='ctx'> static ssize_t bonding_show_carrier(struct device *d,</div><div class='ctx'> 				    struct device_attribute *attr,</div><div class='ctx'> 				    char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = to_bond(d);</div><div class='del'>-</div><div class='del'>-	return sysfs_emit(buf, "%d\n", bond-&gt;params.use_carrier);</div><div class='add'>+	return sysfs_emit(buf, "1\n");</div><div class='ctx'> }</div><div class='ctx'> static DEVICE_ATTR(use_carrier, 0644,</div><div class='ctx'> 		   bonding_show_carrier, bonding_sysfs_store_option);</div><div class='head'>diff --git a/drivers/net/caif/caif_serial.c b/drivers/net/caif/caif_serial.c<br/>index ed3a589def6b..c398ac42eae9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_serial.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/caif/caif_serial.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_serial.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/caif/caif_serial.c</a></div><div class='hunk'>@@ -126,15 +126,6 @@ static inline void debugfs_rx(struct ser_device *ser, const u8 *data, int size)</div><div class='ctx'> 	ser-&gt;rx_blob.data = ser-&gt;rx_data;</div><div class='ctx'> 	ser-&gt;rx_blob.size = size;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static inline void debugfs_tx(struct ser_device *ser, const u8 *data, int size)</div><div class='del'>-{</div><div class='del'>-	if (size &gt; sizeof(ser-&gt;tx_data))</div><div class='del'>-		size = sizeof(ser-&gt;tx_data);</div><div class='del'>-	memcpy(ser-&gt;tx_data, data, size);</div><div class='del'>-	ser-&gt;tx_blob.data = ser-&gt;tx_data;</div><div class='del'>-	ser-&gt;tx_blob.size = size;</div><div class='del'>-}</div><div class='ctx'> #else</div><div class='ctx'> static inline void debugfs_init(struct ser_device *ser, struct tty_struct *tty)</div><div class='ctx'> {</div><div class='hunk'>@@ -151,11 +142,6 @@ static inline void update_tty_status(struct ser_device *ser)</div><div class='ctx'> static inline void debugfs_rx(struct ser_device *ser, const u8 *data, int size)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static inline void debugfs_tx(struct ser_device *ser, const u8 *data, int size)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static void ldisc_receive(struct tty_struct *tty, const u8 *data,</div><div class='hunk'>@@ -344,7 +330,7 @@ static int ldisc_open(struct tty_struct *tty)</div><div class='ctx'> 	ser-&gt;tty = tty_kref_get(tty);</div><div class='ctx'> 	ser-&gt;dev = dev;</div><div class='ctx'> 	debugfs_init(ser, tty);</div><div class='del'>-	tty-&gt;receive_room = N_TTY_BUF_SIZE;</div><div class='add'>+	tty-&gt;receive_room = 4096;</div><div class='ctx'> 	tty-&gt;disc_data = ser;</div><div class='ctx'> 	set_bit(TTY_DO_WRITE_WAKEUP, &amp;tty-&gt;flags);</div><div class='ctx'> 	rtnl_lock();</div><div class='head'>diff --git a/drivers/net/caif/caif_virtio.c b/drivers/net/caif/caif_virtio.c<br/>index 7fea00c7ca8a..c60386bf2d1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_virtio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/caif/caif_virtio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_virtio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/caif/caif_virtio.c</a></div><div class='hunk'>@@ -745,7 +745,7 @@ err:</div><div class='ctx'> </div><div class='ctx'> 	if (cfv-&gt;vr_rx)</div><div class='ctx'> 		vdev-&gt;vringh_config-&gt;del_vrhs(cfv-&gt;vdev);</div><div class='del'>-	if (cfv-&gt;vdev)</div><div class='add'>+	if (cfv-&gt;vq_tx)</div><div class='ctx'> 		vdev-&gt;config-&gt;del_vqs(cfv-&gt;vdev);</div><div class='ctx'> 	free_netdev(netdev);</div><div class='ctx'> 	return err;</div><div class='head'>diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig<br/>index cf989bea9aa3..e15e320db476 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/Kconfig</a></div><div class='hunk'>@@ -124,6 +124,23 @@ config CAN_CAN327</div><div class='ctx'> </div><div class='ctx'> 	  If this driver is built as a module, it will be called can327.</div><div class='ctx'> </div><div class='add'>+config CAN_DUMMY</div><div class='add'>+	tristate "Dummy CAN"</div><div class='add'>+	help</div><div class='add'>+	  A dummy CAN module supporting Classical CAN, CAN FD and CAN XL. It</div><div class='add'>+	  exposes bittiming values which can be configured through the netlink</div><div class='add'>+	  interface.</div><div class='add'>+</div><div class='add'>+	  The module will simply echo any frame sent to it. If debug messages</div><div class='add'>+	  are activated, it prints all the CAN bittiming information in the</div><div class='add'>+	  kernel log. Aside from that it does nothing.</div><div class='add'>+</div><div class='add'>+	  This is convenient for testing the CAN netlink interface. Most of the</div><div class='add'>+	  users will never need this. If unsure, say NO.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module will be</div><div class='add'>+	  called dummy-can.</div><div class='add'>+</div><div class='ctx'> config CAN_FLEXCAN</div><div class='ctx'> 	tristate "Support for Freescale FLEXCAN based chips"</div><div class='ctx'> 	depends on OF || COLDFIRE || COMPILE_TEST</div><div class='hunk'>@@ -154,6 +171,7 @@ config CAN_JANZ_ICAN3</div><div class='ctx'> config CAN_KVASER_PCIEFD</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	tristate "Kvaser PCIe FD cards"</div><div class='add'>+	select NET_DEVLINK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This is a driver for the Kvaser PCI Express CAN FD family.</div><div class='ctx'> </div><div class='hunk'>@@ -201,7 +219,7 @@ config CAN_SUN4I</div><div class='ctx'> 	  be called sun4i_can.</div><div class='ctx'> </div><div class='ctx'> config CAN_TI_HECC</div><div class='del'>-	depends on ARM</div><div class='add'>+	depends on ARM || COMPILE_TEST</div><div class='ctx'> 	tristate "TI High End CAN Controller"</div><div class='ctx'> 	select CAN_RX_OFFLOAD</div><div class='ctx'> 	help</div><div class='head'>diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile<br/>index a71db2cfe990..d7bc10a6b8ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/Makefile</a></div><div class='hunk'>@@ -21,11 +21,12 @@ obj-$(CONFIG_CAN_CAN327)	+= can327.o</div><div class='ctx'> obj-$(CONFIG_CAN_CC770)		+= cc770/</div><div class='ctx'> obj-$(CONFIG_CAN_C_CAN)		+= c_can/</div><div class='ctx'> obj-$(CONFIG_CAN_CTUCANFD)	+= ctucanfd/</div><div class='add'>+obj-$(CONFIG_CAN_DUMMY)		+= dummy_can.o</div><div class='ctx'> obj-$(CONFIG_CAN_FLEXCAN)	+= flexcan/</div><div class='ctx'> obj-$(CONFIG_CAN_GRCAN)		+= grcan.o</div><div class='ctx'> obj-$(CONFIG_CAN_IFI_CANFD)	+= ifi_canfd/</div><div class='ctx'> obj-$(CONFIG_CAN_JANZ_ICAN3)	+= janz-ican3.o</div><div class='del'>-obj-$(CONFIG_CAN_KVASER_PCIEFD)	+= kvaser_pciefd.o</div><div class='add'>+obj-$(CONFIG_CAN_KVASER_PCIEFD)	+= kvaser_pciefd/</div><div class='ctx'> obj-$(CONFIG_CAN_MSCAN)		+= mscan/</div><div class='ctx'> obj-$(CONFIG_CAN_M_CAN)		+= m_can/</div><div class='ctx'> obj-$(CONFIG_CAN_PEAK_PCIEFD)	+= peak_canfd/</div><div class='head'>diff --git a/drivers/net/can/at91_can.c b/drivers/net/can/at91_can.c<br/>index 191707d7e3da..c2a3a4eef5b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/at91_can.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/at91_can.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/at91_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/at91_can.c</a></div><div class='hunk'>@@ -948,7 +948,6 @@ static const struct net_device_ops at91_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= at91_open,</div><div class='ctx'> 	.ndo_stop	= at91_close,</div><div class='ctx'> 	.ndo_start_xmit	= at91_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops at91_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/bxcan.c b/drivers/net/can/bxcan.c<br/>index bfc60eb33dc3..baf494d20bef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/bxcan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/bxcan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/bxcan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/bxcan.c</a></div><div class='hunk'>@@ -227,7 +227,7 @@ static void bxcan_enable_filters(struct bxcan_priv *priv, enum bxcan_cfg cfg)</div><div class='ctx'> 	 * mask mode with 32 bits width.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	/* Enter filter initialization mode and assing filters to CAN</div><div class='add'>+	/* Enter filter initialization mode and assign filters to CAN</div><div class='ctx'> 	 * controllers.</div><div class='ctx'> 	 */</div><div class='ctx'> 	regmap_update_bits(priv-&gt;gcan, BXCAN_FMR_REG,</div><div class='hunk'>@@ -842,7 +842,7 @@ static netdev_tx_t bxcan_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	u32 id;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(ndev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	if (bxcan_tx_busy(priv))</div><div class='hunk'>@@ -881,7 +881,6 @@ static const struct net_device_ops bxcan_netdev_ops = {</div><div class='ctx'> 	.ndo_open = bxcan_open,</div><div class='ctx'> 	.ndo_stop = bxcan_stop,</div><div class='ctx'> 	.ndo_start_xmit = bxcan_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops bxcan_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/c_can/c_can_main.c b/drivers/net/can/c_can/c_can_main.c<br/>index c63f7fc1e691..3702cac7fbf0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/c_can/c_can_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/c_can/c_can_main.c</a></div><div class='hunk'>@@ -1011,47 +1011,60 @@ static int c_can_handle_bus_err(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	/* common for all type of bus errors */</div><div class='ctx'> 	priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-	stats-&gt;rx_errors++;</div><div class='ctx'> </div><div class='ctx'> 	/* propagate the error condition to the CAN stack */</div><div class='ctx'> 	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* check for 'last error code' which tells us the</div><div class='ctx'> 	 * type of the last error to occur on the CAN bus</div><div class='ctx'> 	 */</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+	if (likely(skb))</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='ctx'> 	switch (lec_type) {</div><div class='ctx'> 	case LEC_STUFF_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "stuff error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_FORM_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "form error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_ACK_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "ack error\n");</div><div class='del'>-		cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_BIT1_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "bit1 error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_BIT0_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "bit0 error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_CRC_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "CRC error\n");</div><div class='del'>-		cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	netif_receive_skb(skb);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -1349,7 +1362,6 @@ static const struct net_device_ops c_can_netdev_ops = {</div><div class='ctx'> 	.ndo_open = c_can_open,</div><div class='ctx'> 	.ndo_stop = c_can_close,</div><div class='ctx'> 	.ndo_start_xmit = c_can_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int register_c_can_dev(struct net_device *dev)</div><div class='head'>diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c<br/>index 6cba9717a6d8..19c86b94a40e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can_platform.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/c_can/c_can_platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can_platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/c_can/c_can_platform.c</a></div><div class='hunk'>@@ -269,30 +269,22 @@ static int c_can_plat_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	/* get the appropriate clk */</div><div class='ctx'> 	clk = devm_clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='del'>-	if (IS_ERR(clk)) {</div><div class='del'>-		ret = PTR_ERR(clk);</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return PTR_ERR(clk);</div><div class='ctx'> </div><div class='ctx'> 	/* get the platform data */</div><div class='ctx'> 	irq = platform_get_irq(pdev, 0);</div><div class='del'>-	if (irq &lt; 0) {</div><div class='del'>-		ret = irq;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return irq;</div><div class='ctx'> </div><div class='ctx'> 	addr = devm_platform_get_and_ioremap_resource(pdev, 0, &amp;mem);</div><div class='del'>-	if (IS_ERR(addr)) {</div><div class='del'>-		ret =  PTR_ERR(addr);</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='add'>+	if (IS_ERR(addr))</div><div class='add'>+		return PTR_ERR(addr);</div><div class='ctx'> </div><div class='ctx'> 	/* allocate the c_can device */</div><div class='ctx'> 	dev = alloc_c_can_dev(drvdata-&gt;msg_obj_num);</div><div class='del'>-	if (!dev) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(dev);</div><div class='ctx'> 	switch (drvdata-&gt;id) {</div><div class='hunk'>@@ -324,33 +316,22 @@ static int c_can_plat_probe(struct platform_device *pdev)</div><div class='ctx'> 		/* Check if we need custom RAMINIT via syscon. Mostly for TI</div><div class='ctx'> 		 * platforms. Only supported with DT boot.</div><div class='ctx'> 		 */</div><div class='del'>-		if (np &amp;&amp; of_property_read_bool(np, "syscon-raminit")) {</div><div class='add'>+		if (np &amp;&amp; of_property_present(np, "syscon-raminit")) {</div><div class='add'>+			unsigned int args[2];</div><div class='ctx'> 			u32 id;</div><div class='ctx'> 			struct c_can_raminit *raminit = &amp;priv-&gt;raminit_sys;</div><div class='ctx'> </div><div class='ctx'> 			ret = -EINVAL;</div><div class='del'>-			raminit-&gt;syscon = syscon_regmap_lookup_by_phandle(np,</div><div class='del'>-									  "syscon-raminit");</div><div class='add'>+			raminit-&gt;syscon = syscon_regmap_lookup_by_phandle_args(np,</div><div class='add'>+									       "syscon-raminit",</div><div class='add'>+									       2, args);</div><div class='ctx'> 			if (IS_ERR(raminit-&gt;syscon)) {</div><div class='del'>-				/* can fail with -EPROBE_DEFER */</div><div class='ctx'> 				ret = PTR_ERR(raminit-&gt;syscon);</div><div class='del'>-				free_c_can_dev(dev);</div><div class='del'>-				return ret;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (of_property_read_u32_index(np, "syscon-raminit", 1,</div><div class='del'>-						       &amp;raminit-&gt;reg)) {</div><div class='del'>-				dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-					"couldn't get the RAMINIT reg. offset!\n");</div><div class='ctx'> 				goto exit_free_device;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (of_property_read_u32_index(np, "syscon-raminit", 2,</div><div class='del'>-						       &amp;id)) {</div><div class='del'>-				dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-					"couldn't get the CAN instance ID\n");</div><div class='del'>-				goto exit_free_device;</div><div class='del'>-			}</div><div class='add'>+			raminit-&gt;reg = args[0];</div><div class='add'>+			id = args[1];</div><div class='ctx'> </div><div class='ctx'> 			if (id &gt;= drvdata-&gt;raminit_num) {</div><div class='ctx'> 				dev_err(&amp;pdev-&gt;dev,</div><div class='hunk'>@@ -385,18 +366,17 @@ static int c_can_plat_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "registering %s failed (err=%d)\n",</div><div class='ctx'> 			KBUILD_MODNAME, ret);</div><div class='del'>-		goto exit_free_device;</div><div class='add'>+		goto exit_pm_runtime;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "%s device registered (regs=%p, irq=%d)\n",</div><div class='ctx'> 		 KBUILD_MODNAME, priv-&gt;base, dev-&gt;irq);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-exit_free_device:</div><div class='add'>+exit_pm_runtime:</div><div class='ctx'> 	pm_runtime_disable(priv-&gt;device);</div><div class='add'>+exit_free_device:</div><div class='ctx'> 	free_c_can_dev(dev);</div><div class='del'>-exit:</div><div class='del'>-	dev_err(&amp;pdev-&gt;dev, "probe failed\n");</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/can/can327.c b/drivers/net/can/can327.c<br/>index 24af63961030..b66fc16aedd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/can327.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/can327.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/can327.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/can327.c</a></div><div class='hunk'>@@ -849,7 +849,6 @@ static const struct net_device_ops can327_netdev_ops = {</div><div class='ctx'> 	.ndo_open = can327_netdev_open,</div><div class='ctx'> 	.ndo_stop = can327_netdev_close,</div><div class='ctx'> 	.ndo_start_xmit = can327_netdev_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops can327_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/cc770/Kconfig b/drivers/net/can/cc770/Kconfig<br/>index 467ef19de1c1..aae25c2f849e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/cc770/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/cc770/Kconfig</a></div><div class='hunk'>@@ -7,7 +7,7 @@ if CAN_CC770</div><div class='ctx'> </div><div class='ctx'> config CAN_CC770_ISA</div><div class='ctx'> 	tristate "ISA Bus based legacy CC770 driver"</div><div class='del'>-	depends on ISA</div><div class='add'>+	depends on HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver adds legacy support for CC770 and AN82527 chips</div><div class='ctx'> 	  connected to the ISA bus using I/O port, memory mapped or</div><div class='head'>diff --git a/drivers/net/can/cc770/cc770.c b/drivers/net/can/cc770/cc770.c<br/>index 30909f3aab57..8d5abd643c06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/cc770.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/cc770/cc770.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/cc770.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/cc770/cc770.c</a></div><div class='hunk'>@@ -834,7 +834,6 @@ static const struct net_device_ops cc770_netdev_ops = {</div><div class='ctx'> 	.ndo_open = cc770_open,</div><div class='ctx'> 	.ndo_stop = cc770_close,</div><div class='ctx'> 	.ndo_start_xmit = cc770_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops cc770_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/ctucanfd/ctucanfd_base.c b/drivers/net/can/ctucanfd/ctucanfd_base.c<br/>index 64c349fd4600..1e6b9e3dc2fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ctucanfd/ctucanfd_base.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/ctucanfd/ctucanfd_base.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ctucanfd/ctucanfd_base.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ctucanfd/ctucanfd_base.c</a></div><div class='hunk'>@@ -275,7 +275,7 @@ static int ctucan_set_bittiming(struct net_device *ndev)</div><div class='ctx'> static int ctucan_set_data_bittiming(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='ctx'> </div><div class='ctx'> 	/* Note that dbt may be modified here */</div><div class='ctx'> 	return ctucan_set_btr(ndev, dbt, false);</div><div class='hunk'>@@ -290,7 +290,7 @@ static int ctucan_set_data_bittiming(struct net_device *ndev)</div><div class='ctx'> static int ctucan_set_secondary_sample_point(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	int ssp_offset = 0;</div><div class='ctx'> 	u32 ssp_cfg = 0; /* No SSP by default */</div><div class='ctx'> </div><div class='hunk'>@@ -506,11 +506,12 @@ static bool ctucan_is_txt_buf_writable(struct ctucan_priv *priv, u8 buf)</div><div class='ctx'>  * @buf:	TXT Buffer index to which frame is inserted (0-based)</div><div class='ctx'>  * @isfdf:	True - CAN FD Frame, False - CAN 2.0 Frame</div><div class='ctx'>  *</div><div class='del'>- * Return: True - Frame inserted successfully</div><div class='del'>- *	   False - Frame was not inserted due to one of:</div><div class='del'>- *			1. TXT Buffer is not writable (it is in wrong state)</div><div class='del'>- *			2. Invalid TXT buffer index</div><div class='del'>- *			3. Invalid frame length</div><div class='add'>+ * Return:</div><div class='add'>+ * * True - Frame inserted successfully</div><div class='add'>+ * * False - Frame was not inserted due to one of:</div><div class='add'>+ *	1. TXT Buffer is not writable (it is in wrong state)</div><div class='add'>+ *	2. Invalid TXT buffer index</div><div class='add'>+ *	3. Invalid frame length</div><div class='ctx'>  */</div><div class='ctx'> static bool ctucan_insert_frame(struct ctucan_priv *priv, const struct canfd_frame *cf, u8 buf,</div><div class='ctx'> 				bool isfdf)</div><div class='hunk'>@@ -867,10 +868,12 @@ static void ctucan_err_interrupt(struct net_device *ndev, u32 isr)</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case CAN_STATE_ERROR_ACTIVE:</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='del'>-			cf-&gt;data[1] = CAN_ERR_CRTL_ACTIVE;</div><div class='del'>-			cf-&gt;data[6] = bec.txerr;</div><div class='del'>-			cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+			if (skb) {</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+				cf-&gt;data[1] = CAN_ERR_CRTL_ACTIVE;</div><div class='add'>+				cf-&gt;data[6] = bec.txerr;</div><div class='add'>+				cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			netdev_warn(ndev, "unhandled error state (%d:%s)!\n",</div><div class='hunk'>@@ -1298,7 +1301,6 @@ static const struct net_device_ops ctucan_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= ctucan_open,</div><div class='ctx'> 	.ndo_stop	= ctucan_close,</div><div class='ctx'> 	.ndo_start_xmit	= ctucan_start_xmit,</div><div class='del'>-	.ndo_change_mtu	= can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ctucan_ethtool_ops = {</div><div class='hunk'>@@ -1356,12 +1358,12 @@ int ctucan_probe_common(struct device *dev, void __iomem *addr, int irq, unsigne</div><div class='ctx'> 	priv-&gt;ntxbufs = ntxbufs;</div><div class='ctx'> 	priv-&gt;dev = dev;</div><div class='ctx'> 	priv-&gt;can.bittiming_const = &amp;ctu_can_fd_bit_timing_max;</div><div class='del'>-	priv-&gt;can.data_bittiming_const = &amp;ctu_can_fd_bit_timing_data_max;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;ctu_can_fd_bit_timing_data_max;</div><div class='ctx'> 	priv-&gt;can.do_set_mode = ctucan_do_set_mode;</div><div class='ctx'> </div><div class='ctx'> 	/* Needed for timing adjustment to be performed as soon as possible */</div><div class='ctx'> 	priv-&gt;can.do_set_bittiming = ctucan_set_bittiming;</div><div class='del'>-	priv-&gt;can.do_set_data_bittiming = ctucan_set_data_bittiming;</div><div class='add'>+	priv-&gt;can.fd.do_set_data_bittiming = ctucan_set_data_bittiming;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;can.do_get_berr_counter = ctucan_get_berr_counter;</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK</div><div class='head'>diff --git a/drivers/net/can/dev/bittiming.c b/drivers/net/can/dev/bittiming.c<br/>index 0b93900b1dfa..8f82418230ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/bittiming.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/dev/bittiming.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/bittiming.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/bittiming.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Copyright (C) 2005 Marc Kleine-Budde, Pengutronix</div><div class='ctx'>  * Copyright (C) 2006 Andrey Volkov, Varma Electronics</div><div class='ctx'>  * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+ * Copyright (c) 2025 Vincent Mailhol &lt;mailhol@kernel.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='hunk'>@@ -151,3 +152,65 @@ int can_get_bittiming(const struct net_device *dev, struct can_bittiming *bt,</div><div class='ctx'> </div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int can_validate_pwm_bittiming(const struct net_device *dev,</div><div class='add'>+			       const struct can_pwm *pwm,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	const struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	u32 xl_bit_time_tqmin = can_bit_time_tqmin(&amp;priv-&gt;xl.data_bittiming);</div><div class='add'>+	u32 nom_bit_time_tqmin = can_bit_time_tqmin(&amp;priv-&gt;bittiming);</div><div class='add'>+	u32 pwms_ns = can_tqmin_to_ns(pwm-&gt;pwms, priv-&gt;clock.freq);</div><div class='add'>+	u32 pwml_ns = can_tqmin_to_ns(pwm-&gt;pwml, priv-&gt;clock.freq);</div><div class='add'>+</div><div class='add'>+	if (pwms_ns + pwml_ns &gt; CAN_PWM_NS_MAX) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "The PWM symbol duration: %u ns may not exceed %u ns",</div><div class='add'>+				   pwms_ns + pwml_ns, CAN_PWM_NS_MAX);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pwms_ns &lt; CAN_PWM_DECODE_NS) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "PWMS: %u ns shall be at least %u ns",</div><div class='add'>+				   pwms_ns, CAN_PWM_DECODE_NS);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pwm-&gt;pwms &gt;= pwm-&gt;pwml) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "PWMS: %u tqmin shall be smaller than PWML: %u tqmin",</div><div class='add'>+				   pwm-&gt;pwms, pwm-&gt;pwml);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pwml_ns - pwms_ns &lt; 2 * CAN_PWM_DECODE_NS) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "At least %u ns shall separate PWMS: %u ns from PMWL: %u ns",</div><div class='add'>+				   2 * CAN_PWM_DECODE_NS, pwms_ns, pwml_ns);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (xl_bit_time_tqmin % (pwm-&gt;pwms + pwm-&gt;pwml) != 0) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "PWM duration: %u tqmin does not divide XL's bit time: %u tqmin",</div><div class='add'>+				   pwm-&gt;pwms + pwm-&gt;pwml, xl_bit_time_tqmin);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pwm-&gt;pwmo &gt;= pwm-&gt;pwms + pwm-&gt;pwml) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "PWMO: %u tqmin can not be greater than PWMS + PWML: %u tqmin",</div><div class='add'>+				   pwm-&gt;pwmo, pwm-&gt;pwms + pwm-&gt;pwml);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (nom_bit_time_tqmin % (pwm-&gt;pwms + pwm-&gt;pwml) != pwm-&gt;pwmo) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "Can not assemble nominal bit time: %u tqmin out of PWMS + PMWL and PWMO",</div><div class='add'>+				   nom_bit_time_tqmin);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/dev/calc_bittiming.c b/drivers/net/can/dev/calc_bittiming.c<br/>index 3809c148fb88..cc4022241553 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/calc_bittiming.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/dev/calc_bittiming.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/calc_bittiming.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/calc_bittiming.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Copyright (C) 2005 Marc Kleine-Budde, Pengutronix</div><div class='ctx'>  * Copyright (C) 2006 Andrey Volkov, Varma Electronics</div><div class='ctx'>  * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+ * Copyright (C) 2021-2025 Vincent Mailhol &lt;mailhol@kernel.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/units.h&gt;</div><div class='hunk'>@@ -9,6 +10,33 @@</div><div class='ctx'> </div><div class='ctx'> #define CAN_CALC_MAX_ERROR 50 /* in one-tenth of a percent */</div><div class='ctx'> </div><div class='add'>+/* CiA recommended sample points for Non Return to Zero encoding. */</div><div class='add'>+static int can_calc_sample_point_nrz(const struct can_bittiming *bt)</div><div class='add'>+{</div><div class='add'>+	if (bt-&gt;bitrate &gt; 800 * KILO /* BPS */)</div><div class='add'>+		return 750;</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;bitrate &gt; 500 * KILO /* BPS */)</div><div class='add'>+		return 800;</div><div class='add'>+</div><div class='add'>+	return 875;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Sample points for Pulse-Width Modulation encoding. */</div><div class='add'>+static int can_calc_sample_point_pwm(const struct can_bittiming *bt)</div><div class='add'>+{</div><div class='add'>+	if (bt-&gt;bitrate &gt; 15 * MEGA /* BPS */)</div><div class='add'>+		return 625;</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;bitrate &gt; 9 * MEGA /* BPS */)</div><div class='add'>+		return 600;</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;bitrate &gt; 4 * MEGA /* BPS */)</div><div class='add'>+		return 560;</div><div class='add'>+</div><div class='add'>+	return 520;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Bit-timing calculation derived from:</div><div class='ctx'>  *</div><div class='ctx'>  * Code based on LinCAN sources and H8S2638 project</div><div class='hunk'>@@ -23,7 +51,7 @@</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='ctx'> can_update_sample_point(const struct can_bittiming_const *btc,</div><div class='del'>-			const unsigned int sample_point_nominal, const unsigned int tseg,</div><div class='add'>+			const unsigned int sample_point_reference, const unsigned int tseg,</div><div class='ctx'> 			unsigned int *tseg1_ptr, unsigned int *tseg2_ptr,</div><div class='ctx'> 			unsigned int *sample_point_error_ptr)</div><div class='ctx'> {</div><div class='hunk'>@@ -34,7 +62,7 @@ can_update_sample_point(const struct can_bittiming_const *btc,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt;= 1; i++) {</div><div class='ctx'> 		tseg2 = tseg + CAN_SYNC_SEG -</div><div class='del'>-			(sample_point_nominal * (tseg + CAN_SYNC_SEG)) /</div><div class='add'>+			(sample_point_reference * (tseg + CAN_SYNC_SEG)) /</div><div class='ctx'> 			1000 - i;</div><div class='ctx'> 		tseg2 = clamp(tseg2, btc-&gt;tseg2_min, btc-&gt;tseg2_max);</div><div class='ctx'> 		tseg1 = tseg - tseg2;</div><div class='hunk'>@@ -45,9 +73,9 @@ can_update_sample_point(const struct can_bittiming_const *btc,</div><div class='ctx'> </div><div class='ctx'> 		sample_point = 1000 * (tseg + CAN_SYNC_SEG - tseg2) /</div><div class='ctx'> 			(tseg + CAN_SYNC_SEG);</div><div class='del'>-		sample_point_error = abs(sample_point_nominal - sample_point);</div><div class='add'>+		sample_point_error = abs(sample_point_reference - sample_point);</div><div class='ctx'> </div><div class='del'>-		if (sample_point &lt;= sample_point_nominal &amp;&amp;</div><div class='add'>+		if (sample_point &lt;= sample_point_reference &amp;&amp;</div><div class='ctx'> 		    sample_point_error &lt; best_sample_point_error) {</div><div class='ctx'> 			best_sample_point = sample_point;</div><div class='ctx'> 			best_sample_point_error = sample_point_error;</div><div class='hunk'>@@ -67,28 +95,24 @@ int can_calc_bittiming(const struct net_device *dev, struct can_bittiming *bt,</div><div class='ctx'> {</div><div class='ctx'> 	struct can_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	unsigned int bitrate;			/* current bitrate */</div><div class='del'>-	unsigned int bitrate_error;		/* difference between current and nominal value */</div><div class='add'>+	unsigned int bitrate_error;		/* diff between calculated and reference value */</div><div class='ctx'> 	unsigned int best_bitrate_error = UINT_MAX;</div><div class='del'>-	unsigned int sample_point_error;	/* difference between current and nominal value */</div><div class='add'>+	unsigned int sample_point_error;	/* diff between calculated and reference value */</div><div class='ctx'> 	unsigned int best_sample_point_error = UINT_MAX;</div><div class='del'>-	unsigned int sample_point_nominal;	/* nominal sample point */</div><div class='add'>+	unsigned int sample_point_reference;	/* reference sample point */</div><div class='ctx'> 	unsigned int best_tseg = 0;		/* current best value for tseg */</div><div class='ctx'> 	unsigned int best_brp = 0;		/* current best value for brp */</div><div class='ctx'> 	unsigned int brp, tsegall, tseg, tseg1 = 0, tseg2 = 0;</div><div class='ctx'> 	u64 v64;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Use CiA recommended sample points */</div><div class='del'>-	if (bt-&gt;sample_point) {</div><div class='del'>-		sample_point_nominal = bt-&gt;sample_point;</div><div class='del'>-	} else {</div><div class='del'>-		if (bt-&gt;bitrate &gt; 800 * KILO /* BPS */)</div><div class='del'>-			sample_point_nominal = 750;</div><div class='del'>-		else if (bt-&gt;bitrate &gt; 500 * KILO /* BPS */)</div><div class='del'>-			sample_point_nominal = 800;</div><div class='del'>-		else</div><div class='del'>-			sample_point_nominal = 875;</div><div class='del'>-	}</div><div class='add'>+	if (bt-&gt;sample_point)</div><div class='add'>+		sample_point_reference = bt-&gt;sample_point;</div><div class='add'>+	else if (btc == priv-&gt;xl.data_bittiming_const &amp;&amp;</div><div class='add'>+		 (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS))</div><div class='add'>+		sample_point_reference = can_calc_sample_point_pwm(bt);</div><div class='add'>+	else</div><div class='add'>+		sample_point_reference = can_calc_sample_point_nrz(bt);</div><div class='ctx'> </div><div class='ctx'> 	/* tseg even = round down, odd = round up */</div><div class='ctx'> 	for (tseg = (btc-&gt;tseg1_max + btc-&gt;tseg2_max) * 2 + 1;</div><div class='hunk'>@@ -114,7 +138,7 @@ int can_calc_bittiming(const struct net_device *dev, struct can_bittiming *bt,</div><div class='ctx'> 		if (bitrate_error &lt; best_bitrate_error)</div><div class='ctx'> 			best_sample_point_error = UINT_MAX;</div><div class='ctx'> </div><div class='del'>-		can_update_sample_point(btc, sample_point_nominal, tseg / 2,</div><div class='add'>+		can_update_sample_point(btc, sample_point_reference, tseg / 2,</div><div class='ctx'> 					&amp;tseg1, &amp;tseg2, &amp;sample_point_error);</div><div class='ctx'> 		if (sample_point_error &gt;= best_sample_point_error)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -129,23 +153,26 @@ int can_calc_bittiming(const struct net_device *dev, struct can_bittiming *bt,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (best_bitrate_error) {</div><div class='del'>-		/* Error in one-tenth of a percent */</div><div class='del'>-		v64 = (u64)best_bitrate_error * 1000;</div><div class='add'>+		/* Error in one-hundredth of a percent */</div><div class='add'>+		v64 = (u64)best_bitrate_error * 10000;</div><div class='ctx'> 		do_div(v64, bt-&gt;bitrate);</div><div class='ctx'> 		bitrate_error = (u32)v64;</div><div class='add'>+		/* print at least 0.01% if the error is smaller */</div><div class='add'>+		bitrate_error = max(bitrate_error, 1U);</div><div class='ctx'> 		if (bitrate_error &gt; CAN_CALC_MAX_ERROR) {</div><div class='ctx'> 			NL_SET_ERR_MSG_FMT(extack,</div><div class='del'>-					   "bitrate error: %u.%u%% too high",</div><div class='del'>-					   bitrate_error / 10, bitrate_error % 10);</div><div class='add'>+					   "bitrate error: %u.%02u%% too high",</div><div class='add'>+					   bitrate_error / 100,</div><div class='add'>+					   bitrate_error % 100);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		NL_SET_ERR_MSG_FMT(extack,</div><div class='del'>-				   "bitrate error: %u.%u%%",</div><div class='del'>-				   bitrate_error / 10, bitrate_error % 10);</div><div class='add'>+				   "bitrate error: %u.%02u%%",</div><div class='add'>+				   bitrate_error / 100, bitrate_error % 100);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* real sample point */</div><div class='del'>-	bt-&gt;sample_point = can_update_sample_point(btc, sample_point_nominal,</div><div class='add'>+	bt-&gt;sample_point = can_update_sample_point(btc, sample_point_reference,</div><div class='ctx'> 						   best_tseg, &amp;tseg1, &amp;tseg2,</div><div class='ctx'> 						   NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -173,13 +200,15 @@ int can_calc_bittiming(const struct net_device *dev, struct can_bittiming *bt,</div><div class='ctx'> </div><div class='ctx'> void can_calc_tdco(struct can_tdc *tdc, const struct can_tdc_const *tdc_const,</div><div class='ctx'> 		   const struct can_bittiming *dbt,</div><div class='del'>-		   u32 *ctrlmode, u32 ctrlmode_supported)</div><div class='add'>+		   u32 tdc_mask, u32 *ctrlmode, u32 ctrlmode_supported)</div><div class='ctx'> </div><div class='ctx'> {</div><div class='del'>-	if (!tdc_const || !(ctrlmode_supported &amp; CAN_CTRLMODE_TDC_AUTO))</div><div class='add'>+	u32 tdc_auto = tdc_mask &amp; CAN_CTRLMODE_TDC_AUTO_MASK;</div><div class='add'>+</div><div class='add'>+	if (!tdc_const || !(ctrlmode_supported &amp; tdc_auto))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	*ctrlmode &amp;= ~CAN_CTRLMODE_TDC_MASK;</div><div class='add'>+	*ctrlmode &amp;= ~tdc_mask;</div><div class='ctx'> </div><div class='ctx'> 	/* As specified in ISO 11898-1 section 11.3.3 "Transmitter</div><div class='ctx'> 	 * delay compensation" (TDC) is only applicable if data BRP is</div><div class='hunk'>@@ -193,6 +222,41 @@ void can_calc_tdco(struct can_tdc *tdc, const struct can_tdc_const *tdc_const,</div><div class='ctx'> 		if (sample_point_in_tc &lt; tdc_const-&gt;tdco_min)</div><div class='ctx'> 			return;</div><div class='ctx'> 		tdc-&gt;tdco = min(sample_point_in_tc, tdc_const-&gt;tdco_max);</div><div class='del'>-		*ctrlmode |= CAN_CTRLMODE_TDC_AUTO;</div><div class='add'>+		*ctrlmode |= tdc_auto;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int can_calc_pwm(struct net_device *dev, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	const struct can_pwm_const *pwm_const = priv-&gt;xl.pwm_const;</div><div class='add'>+	struct can_pwm *pwm = &amp;priv-&gt;xl.pwm;</div><div class='add'>+	u32 xl_tqmin = can_bit_time_tqmin(&amp;priv-&gt;xl.data_bittiming);</div><div class='add'>+	u32 xl_ns = can_tqmin_to_ns(xl_tqmin, priv-&gt;clock.freq);</div><div class='add'>+	u32 nom_tqmin = can_bit_time_tqmin(&amp;priv-&gt;bittiming);</div><div class='add'>+	int pwm_per_bit_max = xl_tqmin / (pwm_const-&gt;pwms_min + pwm_const-&gt;pwml_min);</div><div class='add'>+	int pwm_per_bit;</div><div class='add'>+	u32 pwm_tqmin;</div><div class='add'>+</div><div class='add'>+	/* For 5 MB/s databitrate or greater, xl_ns &lt; CAN_PWM_NS_MAX</div><div class='add'>+	 * giving us a pwm_per_bit of 1 and the loop immediately breaks</div><div class='add'>+	 */</div><div class='add'>+	for (pwm_per_bit = DIV_ROUND_UP(xl_ns, CAN_PWM_NS_MAX);</div><div class='add'>+	     pwm_per_bit &lt;= pwm_per_bit_max; pwm_per_bit++)</div><div class='add'>+		if (xl_tqmin % pwm_per_bit == 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+	if (pwm_per_bit &gt; pwm_per_bit_max) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "Can not divide the XL data phase's bit time: %u tqmin into multiple PWM symbols",</div><div class='add'>+				   xl_tqmin);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pwm_tqmin = xl_tqmin / pwm_per_bit;</div><div class='add'>+	pwm-&gt;pwms = DIV_ROUND_UP_POW2(pwm_tqmin, 4);</div><div class='add'>+	pwm-&gt;pwml = pwm_tqmin - pwm-&gt;pwms;</div><div class='add'>+	pwm-&gt;pwmo = nom_tqmin % pwm_tqmin;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/dev/dev.c b/drivers/net/can/dev/dev.c<br/>index 6792c14fd7eb..091f30e94c61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/dev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/dev/dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/dev.c</a></div><div class='hunk'>@@ -4,17 +4,17 @@</div><div class='ctx'>  * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='ctx'> #include &lt;linux/can/can-ml.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/skb.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/if_arp.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void can_update_state_error_stats(struct net_device *dev,</div><div class='ctx'> 					 enum can_state new_state)</div><div class='hunk'>@@ -85,11 +85,52 @@ const char *can_get_state_str(const enum can_state state)</div><div class='ctx'> 	default:</div><div class='ctx'> 		return "&lt;unknown&gt;";</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return "&lt;unknown&gt;";</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(can_get_state_str);</div><div class='ctx'> </div><div class='add'>+const char *can_get_ctrlmode_str(u32 ctrlmode)</div><div class='add'>+{</div><div class='add'>+	switch (ctrlmode &amp; ~(ctrlmode - 1)) {</div><div class='add'>+	case 0:</div><div class='add'>+		return "(none)";</div><div class='add'>+	case CAN_CTRLMODE_LOOPBACK:</div><div class='add'>+		return "LOOPBACK";</div><div class='add'>+	case CAN_CTRLMODE_LISTENONLY:</div><div class='add'>+		return "LISTEN-ONLY";</div><div class='add'>+	case CAN_CTRLMODE_3_SAMPLES:</div><div class='add'>+		return "TRIPLE-SAMPLING";</div><div class='add'>+	case CAN_CTRLMODE_ONE_SHOT:</div><div class='add'>+		return "ONE-SHOT";</div><div class='add'>+	case CAN_CTRLMODE_BERR_REPORTING:</div><div class='add'>+		return "BERR-REPORTING";</div><div class='add'>+	case CAN_CTRLMODE_FD:</div><div class='add'>+		return "FD";</div><div class='add'>+	case CAN_CTRLMODE_PRESUME_ACK:</div><div class='add'>+		return "PRESUME-ACK";</div><div class='add'>+	case CAN_CTRLMODE_FD_NON_ISO:</div><div class='add'>+		return "FD-NON-ISO";</div><div class='add'>+	case CAN_CTRLMODE_CC_LEN8_DLC:</div><div class='add'>+		return "CC-LEN8-DLC";</div><div class='add'>+	case CAN_CTRLMODE_TDC_AUTO:</div><div class='add'>+		return "TDC-AUTO";</div><div class='add'>+	case CAN_CTRLMODE_TDC_MANUAL:</div><div class='add'>+		return "TDC-MANUAL";</div><div class='add'>+	case CAN_CTRLMODE_RESTRICTED:</div><div class='add'>+		return "RESTRICTED";</div><div class='add'>+	case CAN_CTRLMODE_XL:</div><div class='add'>+		return "XL";</div><div class='add'>+	case CAN_CTRLMODE_XL_TDC_AUTO:</div><div class='add'>+		return "XL-TDC-AUTO";</div><div class='add'>+	case CAN_CTRLMODE_XL_TDC_MANUAL:</div><div class='add'>+		return "XL-TDC-MANUAL";</div><div class='add'>+	case CAN_CTRLMODE_XL_TMS:</div><div class='add'>+		return "TMS";</div><div class='add'>+	default:</div><div class='add'>+		return "&lt;unknown&gt;";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_get_ctrlmode_str);</div><div class='add'>+</div><div class='ctx'> static enum can_state can_state_err_to_state(u16 err)</div><div class='ctx'> {</div><div class='ctx'> 	if (err &lt; CAN_ERROR_WARNING_THRESHOLD)</div><div class='hunk'>@@ -147,13 +188,16 @@ void can_change_state(struct net_device *dev, struct can_frame *cf,</div><div class='ctx'> EXPORT_SYMBOL_GPL(can_change_state);</div><div class='ctx'> </div><div class='ctx'> /* CAN device restart for bus-off recovery */</div><div class='del'>-static void can_restart(struct net_device *dev)</div><div class='add'>+static int can_restart(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct can_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (!priv-&gt;do_set_mode)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	if (netif_carrier_ok(dev))</div><div class='ctx'> 		netdev_err(dev, "Attempt to restart for bus-off recovery, but carrier is OK?\n");</div><div class='ctx'> </div><div class='hunk'>@@ -175,10 +219,14 @@ static void can_restart(struct net_device *dev)</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netdev_err(dev, "Restart failed, error %pe\n", ERR_PTR(err));</div><div class='ctx'> 		netif_carrier_off(dev);</div><div class='add'>+</div><div class='add'>+		return err;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		netdev_dbg(dev, "Restarted\n");</div><div class='ctx'> 		priv-&gt;can_stats.restarts++;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void can_restart_work(struct work_struct *work)</div><div class='hunk'>@@ -203,9 +251,8 @@ int can_restart_now(struct net_device *dev)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;priv-&gt;restart_work);</div><div class='del'>-	can_restart(dev);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return can_restart(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* CAN bus-off</div><div class='hunk'>@@ -236,6 +283,8 @@ void can_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	dev-&gt;type = ARPHRD_CAN;</div><div class='ctx'> 	dev-&gt;mtu = CAN_MTU;</div><div class='add'>+	dev-&gt;min_mtu = CAN_MTU;</div><div class='add'>+	dev-&gt;max_mtu = CAN_MTU;</div><div class='ctx'> 	dev-&gt;hard_header_len = 0;</div><div class='ctx'> 	dev-&gt;addr_len = 0;</div><div class='ctx'> 	dev-&gt;tx_queue_len = 10;</div><div class='hunk'>@@ -305,72 +354,74 @@ void free_candev(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(free_candev);</div><div class='ctx'> </div><div class='del'>-/* changing MTU and control mode for CAN/CANFD devices */</div><div class='del'>-int can_change_mtu(struct net_device *dev, int new_mtu)</div><div class='add'>+void can_set_default_mtu(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 ctrlmode_static = can_get_static_ctrlmode(priv);</div><div class='ctx'> </div><div class='del'>-	/* Do not allow changing the MTU while running */</div><div class='del'>-	if (dev-&gt;flags &amp; IFF_UP)</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL) {</div><div class='add'>+		if (can_is_canxl_dev_mtu(dev-&gt;mtu))</div><div class='add'>+			return;</div><div class='add'>+		dev-&gt;mtu = CANXL_MTU;</div><div class='add'>+		dev-&gt;min_mtu = CANXL_MIN_MTU;</div><div class='add'>+		dev-&gt;max_mtu = CANXL_MAX_MTU;</div><div class='add'>+	} else if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		dev-&gt;mtu = CANFD_MTU;</div><div class='add'>+		dev-&gt;min_mtu = CANFD_MTU;</div><div class='add'>+		dev-&gt;max_mtu = CANFD_MTU;</div><div class='add'>+	} else {</div><div class='add'>+		dev-&gt;mtu = CAN_MTU;</div><div class='add'>+		dev-&gt;min_mtu = CAN_MTU;</div><div class='add'>+		dev-&gt;max_mtu = CAN_MTU;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* allow change of MTU according to the CANFD ability of the device */</div><div class='del'>-	switch (new_mtu) {</div><div class='del'>-	case CAN_MTU:</div><div class='del'>-		/* 'CANFD-only' controllers can not switch to CAN_MTU */</div><div class='del'>-		if (ctrlmode_static &amp; CAN_CTRLMODE_FD)</div><div class='del'>-			return -EINVAL;</div><div class='add'>+/* helper to define static CAN controller features at device creation time */</div><div class='add'>+int can_set_static_ctrlmode(struct net_device *dev, u32 static_mode)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-		priv-&gt;ctrlmode &amp;= ~CAN_CTRLMODE_FD;</div><div class='del'>-		break;</div><div class='add'>+	/* alloc_candev() succeeded =&gt; netdev_priv() is valid at this point */</div><div class='add'>+	if (priv-&gt;ctrlmode_supported &amp; static_mode) {</div><div class='add'>+		netdev_warn(dev,</div><div class='add'>+			    "Controller features can not be supported and static at the same time\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;ctrlmode = static_mode;</div><div class='ctx'> </div><div class='del'>-	case CANFD_MTU:</div><div class='del'>-		/* check for potential CANFD ability */</div><div class='del'>-		if (!(priv-&gt;ctrlmode_supported &amp; CAN_CTRLMODE_FD) &amp;&amp;</div><div class='del'>-		    !(ctrlmode_static &amp; CAN_CTRLMODE_FD))</div><div class='del'>-			return -EINVAL;</div><div class='add'>+	/* override MTU which was set by default in can_setup()? */</div><div class='add'>+	can_set_default_mtu(dev);</div><div class='ctx'> </div><div class='del'>-		priv-&gt;ctrlmode |= CAN_CTRLMODE_FD;</div><div class='del'>-		break;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_set_static_ctrlmode);</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+/* generic implementation of netdev_ops::ndo_hwtstamp_get for CAN devices</div><div class='add'>+ * supporting hardware timestamps</div><div class='add'>+ */</div><div class='add'>+int can_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+		     struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='add'>+	cfg-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+	cfg-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> </div><div class='del'>-	WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(can_change_mtu);</div><div class='add'>+EXPORT_SYMBOL(can_hwtstamp_get);</div><div class='ctx'> </div><div class='del'>-/* generic implementation of netdev_ops::ndo_eth_ioctl for CAN devices</div><div class='add'>+/* generic implementation of netdev_ops::ndo_hwtstamp_set for CAN devices</div><div class='ctx'>  * supporting hardware timestamps</div><div class='ctx'>  */</div><div class='del'>-int can_eth_ioctl_hwts(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='add'>+int can_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+		     struct kernel_hwtstamp_config *cfg,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config hwts_cfg = { 0 };</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP: /* set */</div><div class='del'>-		if (copy_from_user(&amp;hwts_cfg, ifr-&gt;ifr_data, sizeof(hwts_cfg)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		if (hwts_cfg.tx_type == HWTSTAMP_TX_ON &amp;&amp;</div><div class='del'>-		    hwts_cfg.rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='del'>-			return 0;</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	case SIOCGHWTSTAMP: /* get */</div><div class='del'>-		hwts_cfg.tx_type = HWTSTAMP_TX_ON;</div><div class='del'>-		hwts_cfg.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-		if (copy_to_user(ifr-&gt;ifr_data, &amp;hwts_cfg, sizeof(hwts_cfg)))</div><div class='del'>-			return -EFAULT;</div><div class='add'>+	if (cfg-&gt;tx_type == HWTSTAMP_TX_ON &amp;&amp;</div><div class='add'>+	    cfg-&gt;rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='ctx'> 		return 0;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Only TX on and RX all packets filter supported");</div><div class='add'>+	return -ERANGE;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(can_eth_ioctl_hwts);</div><div class='add'>+EXPORT_SYMBOL(can_hwtstamp_set);</div><div class='ctx'> </div><div class='ctx'> /* generic implementation of ethtool_ops::get_ts_info for CAN devices</div><div class='ctx'>  * supporting hardware timestamps</div><div class='hunk'>@@ -406,8 +457,8 @@ int open_candev(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* For CAN FD the data bitrate has to be &gt;= the arbitration bitrate */</div><div class='ctx'> 	if ((priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD) &amp;&amp;</div><div class='del'>-	    (!priv-&gt;data_bittiming.bitrate ||</div><div class='del'>-	     priv-&gt;data_bittiming.bitrate &lt; priv-&gt;bittiming.bitrate)) {</div><div class='add'>+	    (!priv-&gt;fd.data_bittiming.bitrate ||</div><div class='add'>+	     priv-&gt;fd.data_bittiming.bitrate &lt; priv-&gt;bittiming.bitrate)) {</div><div class='ctx'> 		netdev_err(dev, "incorrect/missing data bit-timing\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -468,7 +519,7 @@ static int can_set_termination(struct net_device *ndev, u16 term)</div><div class='ctx'> 	else</div><div class='ctx'> 		set = 0;</div><div class='ctx'> </div><div class='del'>-	gpiod_set_value(priv-&gt;termination_gpio, set);</div><div class='add'>+	gpiod_set_value_cansleep(priv-&gt;termination_gpio, set);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -545,16 +596,16 @@ int register_candev(struct net_device *dev)</div><div class='ctx'> 	if (!priv-&gt;bitrate_const != !priv-&gt;bitrate_const_cnt)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;data_bitrate_const != !priv-&gt;data_bitrate_const_cnt)</div><div class='add'>+	if (!priv-&gt;fd.data_bitrate_const != !priv-&gt;fd.data_bitrate_const_cnt)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* We only support either fixed bit rates or bit timing const. */</div><div class='del'>-	if ((priv-&gt;bitrate_const || priv-&gt;data_bitrate_const) &amp;&amp;</div><div class='del'>-	    (priv-&gt;bittiming_const || priv-&gt;data_bittiming_const))</div><div class='add'>+	if ((priv-&gt;bitrate_const || priv-&gt;fd.data_bitrate_const) &amp;&amp;</div><div class='add'>+	    (priv-&gt;bittiming_const || priv-&gt;fd.data_bittiming_const))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!can_bittiming_const_valid(priv-&gt;bittiming_const) ||</div><div class='del'>-	    !can_bittiming_const_valid(priv-&gt;data_bittiming_const))</div><div class='add'>+	    !can_bittiming_const_valid(priv-&gt;fd.data_bittiming_const))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;termination_const) {</div><div class='head'>diff --git a/drivers/net/can/dev/netlink.c b/drivers/net/can/dev/netlink.c<br/>index 01aacdcda260..d6b0e686fb11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/netlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/dev/netlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/netlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/netlink.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> /* Copyright (C) 2005 Marc Kleine-Budde, Pengutronix</div><div class='ctx'>  * Copyright (C) 2006 Andrey Volkov, Varma Electronics</div><div class='ctx'>  * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- * Copyright (C) 2021 Vincent Mailhol &lt;mailhol.vincent@wanadoo.fr&gt;</div><div class='add'>+ * Copyright (C) 2021-2025 Vincent Mailhol &lt;mailhol@kernel.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='hunk'>@@ -18,10 +18,14 @@ static const struct nla_policy can_policy[IFLA_CAN_MAX + 1] = {</div><div class='ctx'> 	[IFLA_CAN_CLOCK] = { .len = sizeof(struct can_clock) },</div><div class='ctx'> 	[IFLA_CAN_BERR_COUNTER] = { .len = sizeof(struct can_berr_counter) },</div><div class='ctx'> 	[IFLA_CAN_DATA_BITTIMING] = { .len = sizeof(struct can_bittiming) },</div><div class='del'>-	[IFLA_CAN_DATA_BITTIMING_CONST]	= { .len = sizeof(struct can_bittiming_const) },</div><div class='add'>+	[IFLA_CAN_DATA_BITTIMING_CONST] = { .len = sizeof(struct can_bittiming_const) },</div><div class='ctx'> 	[IFLA_CAN_TERMINATION] = { .type = NLA_U16 },</div><div class='ctx'> 	[IFLA_CAN_TDC] = { .type = NLA_NESTED },</div><div class='ctx'> 	[IFLA_CAN_CTRLMODE_EXT] = { .type = NLA_NESTED },</div><div class='add'>+	[IFLA_CAN_XL_DATA_BITTIMING] = { .len = sizeof(struct can_bittiming) },</div><div class='add'>+	[IFLA_CAN_XL_DATA_BITTIMING_CONST] = { .len = sizeof(struct can_bittiming_const) },</div><div class='add'>+	[IFLA_CAN_XL_TDC] = { .type = NLA_NESTED },</div><div class='add'>+	[IFLA_CAN_XL_PWM] = { .type = NLA_NESTED },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct nla_policy can_tdc_policy[IFLA_CAN_TDC_MAX + 1] = {</div><div class='hunk'>@@ -36,116 +40,360 @@ static const struct nla_policy can_tdc_policy[IFLA_CAN_TDC_MAX + 1] = {</div><div class='ctx'> 	[IFLA_CAN_TDC_TDCF] = { .type = NLA_U32 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int can_validate_bittiming(const struct can_bittiming *bt,</div><div class='del'>-				  struct netlink_ext_ack *extack)</div><div class='add'>+static const struct nla_policy can_pwm_policy[IFLA_CAN_PWM_MAX + 1] = {</div><div class='add'>+	[IFLA_CAN_PWM_PWMS_MIN] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWMS_MAX] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWML_MIN] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWML_MAX] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWMO_MIN] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWMO_MAX] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWMS] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWML] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWMO] = { .type = NLA_U32 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int can_validate_bittiming(struct nlattr *data[],</div><div class='add'>+				  struct netlink_ext_ack *extack,</div><div class='add'>+				  int ifla_can_bittiming)</div><div class='ctx'> {</div><div class='add'>+	struct can_bittiming *bt;</div><div class='add'>+</div><div class='add'>+	if (!data[ifla_can_bittiming])</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	static_assert(__alignof__(*bt) &lt;= NLA_ALIGNTO);</div><div class='add'>+	bt = nla_data(data[ifla_can_bittiming]);</div><div class='add'>+</div><div class='ctx'> 	/* sample point is in one-tenth of a percent */</div><div class='ctx'> 	if (bt-&gt;sample_point &gt;= 1000) {</div><div class='ctx'> 		NL_SET_ERR_MSG(extack, "sample point must be between 0 and 100%");</div><div class='del'>-</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int can_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='del'>-			struct netlink_ext_ack *extack)</div><div class='add'>+static int can_validate_tdc(struct nlattr *data_tdc,</div><div class='add'>+			    struct netlink_ext_ack *extack, u32 tdc_flags)</div><div class='ctx'> {</div><div class='del'>-	bool is_can_fd = false;</div><div class='add'>+	bool tdc_manual = tdc_flags &amp; CAN_CTRLMODE_TDC_MANUAL_MASK;</div><div class='add'>+	bool tdc_auto = tdc_flags &amp; CAN_CTRLMODE_TDC_AUTO_MASK;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Make sure that valid CAN FD configurations always consist of</div><div class='del'>-	 * - nominal/arbitration bittiming</div><div class='del'>-	 * - data bittiming</div><div class='del'>-	 * - control mode with CAN_CTRLMODE_FD set</div><div class='del'>-	 * - TDC parameters are coherent (details below)</div><div class='add'>+	if (tdc_auto &amp;&amp; tdc_manual) {</div><div class='add'>+		NL_SET_ERR_MSG(extack,</div><div class='add'>+			       "TDC manual and auto modes are mutually exclusive");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If one of the CAN_CTRLMODE_{,XL}_TDC_* flags is set then TDC</div><div class='add'>+	 * must be set and vice-versa</div><div class='ctx'> 	 */</div><div class='add'>+	if ((tdc_auto || tdc_manual) &amp;&amp; !data_tdc) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "TDC parameters are missing");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+	if (!(tdc_auto || tdc_manual) &amp;&amp; data_tdc) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "TDC mode (auto or manual) is missing");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (!data)</div><div class='add'>+	/* If providing TDC parameters, at least TDCO is needed. TDCV is</div><div class='add'>+	 * needed if and only if CAN_CTRLMODE_{,XL}_TDC_MANUAL is set</div><div class='add'>+	 */</div><div class='add'>+	if (data_tdc) {</div><div class='add'>+		struct nlattr *tb_tdc[IFLA_CAN_TDC_MAX + 1];</div><div class='add'>+</div><div class='add'>+		err = nla_parse_nested(tb_tdc, IFLA_CAN_TDC_MAX,</div><div class='add'>+				       data_tdc, can_tdc_policy, extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (tb_tdc[IFLA_CAN_TDC_TDCV]) {</div><div class='add'>+			if (tdc_auto) {</div><div class='add'>+				NL_SET_ERR_MSG(extack,</div><div class='add'>+					       "TDCV is incompatible with TDC auto mode");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			if (tdc_manual) {</div><div class='add'>+				NL_SET_ERR_MSG(extack,</div><div class='add'>+					       "TDC manual mode requires TDCV");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!tb_tdc[IFLA_CAN_TDC_TDCO]) {</div><div class='add'>+			NL_SET_ERR_MSG(extack, "TDCO is missing");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_validate_pwm(struct nlattr *data[],</div><div class='add'>+			    struct netlink_ext_ack *extack, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *tb_pwm[IFLA_CAN_PWM_MAX + 1];</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!data[IFLA_CAN_XL_PWM])</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (data[IFLA_CAN_CTRLMODE]) {</div><div class='del'>-		struct can_ctrlmode *cm = nla_data(data[IFLA_CAN_CTRLMODE]);</div><div class='del'>-		u32 tdc_flags = cm-&gt;flags &amp; CAN_CTRLMODE_TDC_MASK;</div><div class='add'>+	if (!(flags &amp; CAN_CTRLMODE_XL_TMS)) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "PWM requires TMS");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = nla_parse_nested(tb_pwm, IFLA_CAN_PWM_MAX, data[IFLA_CAN_XL_PWM],</div><div class='add'>+			       can_pwm_policy, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!tb_pwm[IFLA_CAN_PWM_PWMS] != !tb_pwm[IFLA_CAN_PWM_PWML]) {</div><div class='add'>+		NL_SET_ERR_MSG(extack,</div><div class='add'>+			       "Provide either both PWMS and PWML, or none for automatic calculation");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tb_pwm[IFLA_CAN_PWM_PWMO] &amp;&amp;</div><div class='add'>+	    (!tb_pwm[IFLA_CAN_PWM_PWMS] || !tb_pwm[IFLA_CAN_PWM_PWML])) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "PWMO requires both PWMS and PWML");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_validate_databittiming(struct nlattr *data[],</div><div class='add'>+				      struct netlink_ext_ack *extack,</div><div class='add'>+				      int ifla_can_data_bittiming, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *data_tdc;</div><div class='add'>+	const char *type;</div><div class='add'>+	u32 tdc_flags;</div><div class='add'>+	bool is_on;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-		is_can_fd = cm-&gt;flags &amp; cm-&gt;mask &amp; CAN_CTRLMODE_FD;</div><div class='add'>+	/* Make sure that valid CAN FD/XL configurations always consist of</div><div class='add'>+	 * - nominal/arbitration bittiming</div><div class='add'>+	 * - data bittiming</div><div class='add'>+	 * - control mode with CAN_CTRLMODE_{FD,XL} set</div><div class='add'>+	 * - TDC parameters are coherent (details in can_validate_tdc())</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (ifla_can_data_bittiming == IFLA_CAN_DATA_BITTIMING) {</div><div class='add'>+		data_tdc = data[IFLA_CAN_TDC];</div><div class='add'>+		tdc_flags = flags &amp; CAN_CTRLMODE_FD_TDC_MASK;</div><div class='add'>+		is_on = flags &amp; CAN_CTRLMODE_FD;</div><div class='add'>+		type = "FD";</div><div class='add'>+	} else {</div><div class='add'>+		data_tdc = data[IFLA_CAN_XL_TDC];</div><div class='add'>+		tdc_flags = flags &amp; CAN_CTRLMODE_XL_TDC_MASK;</div><div class='add'>+		is_on = flags &amp; CAN_CTRLMODE_XL;</div><div class='add'>+		type = "XL";</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* CAN_CTRLMODE_TDC_{AUTO,MANUAL} are mutually exclusive */</div><div class='del'>-		if (tdc_flags == CAN_CTRLMODE_TDC_MASK)</div><div class='add'>+	if (is_on) {</div><div class='add'>+		if (!data[IFLA_CAN_BITTIMING] || !data[ifla_can_data_bittiming]) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "Provide both nominal and %s data bittiming",</div><div class='add'>+					   type);</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='del'>-		/* If one of the CAN_CTRLMODE_TDC_* flag is set then</div><div class='del'>-		 * TDC must be set and vice-versa</div><div class='del'>-		 */</div><div class='del'>-		if (!!tdc_flags != !!data[IFLA_CAN_TDC])</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (data[ifla_can_data_bittiming]) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "%s data bittiming requires CAN %s",</div><div class='add'>+					   type, type);</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='del'>-		/* If providing TDC parameters, at least TDCO is</div><div class='del'>-		 * needed. TDCV is needed if and only if</div><div class='del'>-		 * CAN_CTRLMODE_TDC_MANUAL is set</div><div class='del'>-		 */</div><div class='del'>-		if (data[IFLA_CAN_TDC]) {</div><div class='del'>-			struct nlattr *tb_tdc[IFLA_CAN_TDC_MAX + 1];</div><div class='add'>+		}</div><div class='add'>+		if (data_tdc) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "%s TDC requires CAN %s",</div><div class='add'>+					   type, type);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-			err = nla_parse_nested(tb_tdc, IFLA_CAN_TDC_MAX,</div><div class='del'>-					       data[IFLA_CAN_TDC],</div><div class='del'>-					       can_tdc_policy, extack);</div><div class='del'>-			if (err)</div><div class='del'>-				return err;</div><div class='add'>+	err = can_validate_bittiming(data, extack, ifla_can_data_bittiming);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-			if (tb_tdc[IFLA_CAN_TDC_TDCV]) {</div><div class='del'>-				if (tdc_flags &amp; CAN_CTRLMODE_TDC_AUTO)</div><div class='del'>-					return -EOPNOTSUPP;</div><div class='del'>-			} else {</div><div class='del'>-				if (tdc_flags &amp; CAN_CTRLMODE_TDC_MANUAL)</div><div class='del'>-					return -EOPNOTSUPP;</div><div class='del'>-			}</div><div class='add'>+	err = can_validate_tdc(data_tdc, extack, tdc_flags);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			if (!tb_tdc[IFLA_CAN_TDC_TDCO])</div><div class='add'>+static int can_validate_xl_flags(struct netlink_ext_ack *extack,</div><div class='add'>+				 u32 masked_flags, u32 mask)</div><div class='add'>+{</div><div class='add'>+	if (masked_flags &amp; CAN_CTRLMODE_XL) {</div><div class='add'>+		if (masked_flags &amp; CAN_CTRLMODE_XL_TMS) {</div><div class='add'>+			const u32 tms_conflicts_mask = CAN_CTRLMODE_FD |</div><div class='add'>+				CAN_CTRLMODE_XL_TDC_MASK;</div><div class='add'>+			u32 tms_conflicts = masked_flags &amp; tms_conflicts_mask;</div><div class='add'>+</div><div class='add'>+			if (tms_conflicts) {</div><div class='add'>+				NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+						   "TMS and %s are mutually exclusive",</div><div class='add'>+						   can_get_ctrlmode_str(tms_conflicts));</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (mask &amp; CAN_CTRLMODE_XL_TMS) {</div><div class='add'>+			NL_SET_ERR_MSG(extack, "TMS requires CAN XL");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (data[IFLA_CAN_BITTIMING]) {</div><div class='del'>-		struct can_bittiming bt;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		memcpy(&amp;bt, nla_data(data[IFLA_CAN_BITTIMING]), sizeof(bt));</div><div class='del'>-		err = can_validate_bittiming(&amp;bt, extack);</div><div class='add'>+static int can_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 flags = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!data)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_CAN_CTRLMODE]) {</div><div class='add'>+		struct can_ctrlmode *cm = nla_data(data[IFLA_CAN_CTRLMODE]);</div><div class='add'>+</div><div class='add'>+		flags = cm-&gt;flags &amp; cm-&gt;mask;</div><div class='add'>+</div><div class='add'>+		if ((flags &amp; CAN_CTRLMODE_LISTENONLY) &amp;&amp;</div><div class='add'>+		    (flags &amp; CAN_CTRLMODE_RESTRICTED)) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "LISTEN-ONLY and RESTRICTED modes are mutually exclusive");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = can_validate_xl_flags(extack, flags, cm-&gt;mask);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (is_can_fd) {</div><div class='del'>-		if (!data[IFLA_CAN_BITTIMING] || !data[IFLA_CAN_DATA_BITTIMING])</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='add'>+	err = can_validate_bittiming(data, extack, IFLA_CAN_BITTIMING);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = can_validate_databittiming(data, extack,</div><div class='add'>+					 IFLA_CAN_DATA_BITTIMING, flags);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = can_validate_databittiming(data, extack,</div><div class='add'>+					 IFLA_CAN_XL_DATA_BITTIMING, flags);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = can_validate_pwm(data, extack, flags);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_ctrlmode_changelink(struct net_device *dev,</div><div class='add'>+				   struct nlattr *data[],</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_ctrlmode *cm;</div><div class='add'>+	u32 ctrlstatic, maskedflags, deactivated, notsupp, ctrlstatic_missing;</div><div class='add'>+</div><div class='add'>+	if (!data[IFLA_CAN_CTRLMODE])</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Do not allow changing controller mode while running */</div><div class='add'>+	if (dev-&gt;flags &amp; IFF_UP)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	cm = nla_data(data[IFLA_CAN_CTRLMODE]);</div><div class='add'>+	ctrlstatic = can_get_static_ctrlmode(priv);</div><div class='add'>+	maskedflags = cm-&gt;flags &amp; cm-&gt;mask;</div><div class='add'>+	deactivated = ~cm-&gt;flags &amp; cm-&gt;mask;</div><div class='add'>+	notsupp = maskedflags &amp; ~(priv-&gt;ctrlmode_supported | ctrlstatic);</div><div class='add'>+	ctrlstatic_missing = (maskedflags &amp; ctrlstatic) ^ ctrlstatic;</div><div class='add'>+</div><div class='add'>+	if (notsupp) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "requested control mode %s not supported",</div><div class='add'>+				   can_get_ctrlmode_str(notsupp));</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (data[IFLA_CAN_DATA_BITTIMING] || data[IFLA_CAN_TDC]) {</div><div class='del'>-		if (!is_can_fd)</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='add'>+	/* do not check for static fd-non-iso if 'fd' is disabled */</div><div class='add'>+	if (!(maskedflags &amp; CAN_CTRLMODE_FD))</div><div class='add'>+		ctrlstatic &amp;= ~CAN_CTRLMODE_FD_NON_ISO;</div><div class='add'>+</div><div class='add'>+	if (ctrlstatic_missing) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "missing required %s static control mode",</div><div class='add'>+				   can_get_ctrlmode_str(ctrlstatic_missing));</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (data[IFLA_CAN_DATA_BITTIMING]) {</div><div class='del'>-		struct can_bittiming bt;</div><div class='add'>+	/* If FD was active and is not turned off, check for XL conflicts */</div><div class='add'>+	if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD &amp; ~deactivated) {</div><div class='add'>+		if (maskedflags &amp; CAN_CTRLMODE_XL_TMS) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "TMS can not be activated while CAN FD is on");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		memcpy(&amp;bt, nla_data(data[IFLA_CAN_DATA_BITTIMING]), sizeof(bt));</div><div class='del'>-		err = can_validate_bittiming(&amp;bt, extack);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='add'>+	/* If a top dependency flag is provided, reset all its dependencies */</div><div class='add'>+	if (cm-&gt;mask &amp; CAN_CTRLMODE_FD)</div><div class='add'>+		priv-&gt;ctrlmode &amp;= ~CAN_CTRLMODE_FD_TDC_MASK;</div><div class='add'>+	if (cm-&gt;mask &amp; CAN_CTRLMODE_XL)</div><div class='add'>+		priv-&gt;ctrlmode &amp;= ~(CAN_CTRLMODE_XL_TDC_MASK |</div><div class='add'>+				    CAN_CTRLMODE_XL_TMS);</div><div class='add'>+</div><div class='add'>+	/* clear bits to be modified and copy the flag values */</div><div class='add'>+	priv-&gt;ctrlmode &amp;= ~cm-&gt;mask;</div><div class='add'>+	priv-&gt;ctrlmode |= maskedflags;</div><div class='add'>+</div><div class='add'>+	/* Wipe potential leftovers from previous CAN FD/XL config */</div><div class='add'>+	if (!(priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD)) {</div><div class='add'>+		memset(&amp;priv-&gt;fd.data_bittiming, 0,</div><div class='add'>+		       sizeof(priv-&gt;fd.data_bittiming));</div><div class='add'>+		priv-&gt;ctrlmode &amp;= ~CAN_CTRLMODE_FD_TDC_MASK;</div><div class='add'>+		memset(&amp;priv-&gt;fd.tdc, 0, sizeof(priv-&gt;fd.tdc));</div><div class='ctx'> 	}</div><div class='add'>+	if (!(priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL)) {</div><div class='add'>+		memset(&amp;priv-&gt;xl.data_bittiming, 0,</div><div class='add'>+		       sizeof(priv-&gt;fd.data_bittiming));</div><div class='add'>+		priv-&gt;ctrlmode &amp;= ~CAN_CTRLMODE_XL_TDC_MASK;</div><div class='add'>+		memset(&amp;priv-&gt;xl.tdc, 0, sizeof(priv-&gt;xl.tdc));</div><div class='add'>+		memset(&amp;priv-&gt;xl.pwm, 0, sizeof(priv-&gt;xl.pwm));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_set_default_mtu(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int can_tdc_changelink(struct can_priv *priv, const struct nlattr *nla,</div><div class='add'>+static int can_tdc_changelink(struct data_bittiming_params *dbt_params,</div><div class='add'>+			      const struct nlattr *nla,</div><div class='ctx'> 			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct nlattr *tb_tdc[IFLA_CAN_TDC_MAX + 1];</div><div class='ctx'> 	struct can_tdc tdc = { 0 };</div><div class='del'>-	const struct can_tdc_const *tdc_const = priv-&gt;tdc_const;</div><div class='add'>+	const struct can_tdc_const *tdc_const = dbt_params-&gt;tdc_const;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (!tdc_const || !can_tdc_is_enabled(priv))</div><div class='add'>+	if (!tdc_const) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "The device does not support TDC");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = nla_parse_nested(tb_tdc, IFLA_CAN_TDC_MAX, nla,</div><div class='ctx'> 			       can_tdc_policy, extack);</div><div class='hunk'>@@ -179,69 +427,181 @@ static int can_tdc_changelink(struct can_priv *priv, const struct nlattr *nla,</div><div class='ctx'> 		tdc.tdcf = tdcf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;tdc = tdc;</div><div class='add'>+	dbt_params-&gt;tdc = tdc;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int can_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='del'>-			  struct nlattr *data[],</div><div class='del'>-			  struct netlink_ext_ack *extack)</div><div class='add'>+static int can_dbt_changelink(struct net_device *dev, struct nlattr *data[],</div><div class='add'>+			      bool fd, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct nlattr *data_bittiming, *data_tdc;</div><div class='ctx'> 	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 tdc_mask = 0;</div><div class='add'>+	struct data_bittiming_params *dbt_params;</div><div class='add'>+	struct can_bittiming dbt;</div><div class='add'>+	bool need_tdc_calc = false;</div><div class='add'>+	u32 tdc_mask;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* We need synchronization with dev-&gt;stop() */</div><div class='del'>-	ASSERT_RTNL();</div><div class='add'>+	if (fd) {</div><div class='add'>+		data_bittiming = data[IFLA_CAN_DATA_BITTIMING];</div><div class='add'>+		data_tdc = data[IFLA_CAN_TDC];</div><div class='add'>+		dbt_params = &amp;priv-&gt;fd;</div><div class='add'>+		tdc_mask = CAN_CTRLMODE_FD_TDC_MASK;</div><div class='add'>+	} else {</div><div class='add'>+		data_bittiming = data[IFLA_CAN_XL_DATA_BITTIMING];</div><div class='add'>+		data_tdc = data[IFLA_CAN_XL_TDC];</div><div class='add'>+		dbt_params = &amp;priv-&gt;xl;</div><div class='add'>+		tdc_mask = CAN_CTRLMODE_XL_TDC_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!data_bittiming)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Do not allow changing bittiming while running */</div><div class='add'>+	if (dev-&gt;flags &amp; IFF_UP)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	/* Calculate bittiming parameters based on data_bittiming_const</div><div class='add'>+	 * if set, otherwise pass bitrate directly via do_set_bitrate().</div><div class='add'>+	 * Bail out if neither is given.</div><div class='add'>+	 */</div><div class='add'>+	if (!dbt_params-&gt;data_bittiming_const &amp;&amp; !dbt_params-&gt;do_set_data_bittiming &amp;&amp;</div><div class='add'>+	    !dbt_params-&gt;data_bitrate_const)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;dbt, nla_data(data_bittiming), sizeof(dbt));</div><div class='add'>+	err = can_get_bittiming(dev, &amp;dbt, dbt_params-&gt;data_bittiming_const,</div><div class='add'>+				dbt_params-&gt;data_bitrate_const,</div><div class='add'>+				dbt_params-&gt;data_bitrate_const_cnt, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;bitrate_max &amp;&amp; dbt.bitrate &gt; priv-&gt;bitrate_max) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "CAN data bitrate %u bps surpasses transceiver capabilities of %u bps",</div><div class='add'>+				   dbt.bitrate, priv-&gt;bitrate_max);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	memset(&amp;dbt_params-&gt;tdc, 0, sizeof(dbt_params-&gt;tdc));</div><div class='ctx'> 	if (data[IFLA_CAN_CTRLMODE]) {</div><div class='del'>-		struct can_ctrlmode *cm;</div><div class='del'>-		u32 ctrlstatic;</div><div class='del'>-		u32 maskedflags;</div><div class='add'>+		struct can_ctrlmode *cm = nla_data(data[IFLA_CAN_CTRLMODE]);</div><div class='ctx'> </div><div class='del'>-		/* Do not allow changing controller mode while running */</div><div class='del'>-		if (dev-&gt;flags &amp; IFF_UP)</div><div class='del'>-			return -EBUSY;</div><div class='del'>-		cm = nla_data(data[IFLA_CAN_CTRLMODE]);</div><div class='del'>-		ctrlstatic = can_get_static_ctrlmode(priv);</div><div class='del'>-		maskedflags = cm-&gt;flags &amp; cm-&gt;mask;</div><div class='add'>+		if (fd || !(priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS))</div><div class='add'>+			need_tdc_calc = !(cm-&gt;mask &amp; tdc_mask);</div><div class='add'>+	}</div><div class='add'>+	if (data_tdc) {</div><div class='add'>+		/* TDC parameters are provided: use them */</div><div class='add'>+		err = can_tdc_changelink(dbt_params, data_tdc, extack);</div><div class='add'>+		if (err) {</div><div class='add'>+			priv-&gt;ctrlmode &amp;= ~tdc_mask;</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	} else if (need_tdc_calc) {</div><div class='add'>+		/* Neither of TDC parameters nor TDC flags are provided:</div><div class='add'>+		 * do calculation</div><div class='add'>+		 */</div><div class='add'>+		can_calc_tdco(&amp;dbt_params-&gt;tdc, dbt_params-&gt;tdc_const, &amp;dbt,</div><div class='add'>+			      tdc_mask, &amp;priv-&gt;ctrlmode, priv-&gt;ctrlmode_supported);</div><div class='add'>+	} /* else: both CAN_CTRLMODE_{,XL}_TDC_{AUTO,MANUAL} are explicitly</div><div class='add'>+	   * turned off. TDC is disabled: do nothing</div><div class='add'>+	   */</div><div class='ctx'> </div><div class='del'>-		/* check whether provided bits are allowed to be passed */</div><div class='del'>-		if (maskedflags &amp; ~(priv-&gt;ctrlmode_supported | ctrlstatic))</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='add'>+	memcpy(&amp;dbt_params-&gt;data_bittiming, &amp;dbt, sizeof(dbt));</div><div class='ctx'> </div><div class='del'>-		/* do not check for static fd-non-iso if 'fd' is disabled */</div><div class='del'>-		if (!(maskedflags &amp; CAN_CTRLMODE_FD))</div><div class='del'>-			ctrlstatic &amp;= ~CAN_CTRLMODE_FD_NON_ISO;</div><div class='add'>+	if (dbt_params-&gt;do_set_data_bittiming) {</div><div class='add'>+		/* Finally, set the bit-timing registers */</div><div class='add'>+		err = dbt_params-&gt;do_set_data_bittiming(dev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* make sure static options are provided by configuration */</div><div class='del'>-		if ((maskedflags &amp; ctrlstatic) != ctrlstatic)</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		/* clear bits to be modified and copy the flag values */</div><div class='del'>-		priv-&gt;ctrlmode &amp;= ~cm-&gt;mask;</div><div class='del'>-		priv-&gt;ctrlmode |= maskedflags;</div><div class='add'>+static int can_pwm_changelink(struct net_device *dev,</div><div class='add'>+			      const struct nlattr *pwm_nla,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	const struct can_pwm_const *pwm_const = priv-&gt;xl.pwm_const;</div><div class='add'>+	struct nlattr *tb_pwm[IFLA_CAN_PWM_MAX + 1];</div><div class='add'>+	struct can_pwm pwm = { 0 };</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-		/* CAN_CTRLMODE_FD can only be set when driver supports FD */</div><div class='del'>-		if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='del'>-			dev-&gt;mtu = CANFD_MTU;</div><div class='del'>-		} else {</div><div class='del'>-			dev-&gt;mtu = CAN_MTU;</div><div class='del'>-			memset(&amp;priv-&gt;data_bittiming, 0,</div><div class='del'>-			       sizeof(priv-&gt;data_bittiming));</div><div class='del'>-			priv-&gt;ctrlmode &amp;= ~CAN_CTRLMODE_TDC_MASK;</div><div class='del'>-			memset(&amp;priv-&gt;tdc, 0, sizeof(priv-&gt;tdc));</div><div class='add'>+	if (!(priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!pwm_const) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "The device does not support PWM");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pwm_nla)</div><div class='add'>+		return can_calc_pwm(dev, extack);</div><div class='add'>+</div><div class='add'>+	err = nla_parse_nested(tb_pwm, IFLA_CAN_PWM_MAX, pwm_nla,</div><div class='add'>+			       can_pwm_policy, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (tb_pwm[IFLA_CAN_PWM_PWMS]) {</div><div class='add'>+		pwm.pwms = nla_get_u32(tb_pwm[IFLA_CAN_PWM_PWMS]);</div><div class='add'>+		if (pwm.pwms &lt; pwm_const-&gt;pwms_min ||</div><div class='add'>+		    pwm.pwms &gt; pwm_const-&gt;pwms_max) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "PWMS: %u tqmin is out of range: %u...%u",</div><div class='add'>+					   pwm.pwms, pwm_const-&gt;pwms_min,</div><div class='add'>+					   pwm_const-&gt;pwms_max);</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		tdc_mask = cm-&gt;mask &amp; CAN_CTRLMODE_TDC_MASK;</div><div class='del'>-		/* CAN_CTRLMODE_TDC_{AUTO,MANUAL} are mutually</div><div class='del'>-		 * exclusive: make sure to turn the other one off</div><div class='del'>-		 */</div><div class='del'>-		if (tdc_mask)</div><div class='del'>-			priv-&gt;ctrlmode &amp;= cm-&gt;flags | ~CAN_CTRLMODE_TDC_MASK;</div><div class='add'>+	if (tb_pwm[IFLA_CAN_PWM_PWML]) {</div><div class='add'>+		pwm.pwml = nla_get_u32(tb_pwm[IFLA_CAN_PWM_PWML]);</div><div class='add'>+		if (pwm.pwml &lt; pwm_const-&gt;pwml_min ||</div><div class='add'>+		    pwm.pwml &gt; pwm_const-&gt;pwml_max) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "PWML: %u tqmin is out of range: %u...%u",</div><div class='add'>+					   pwm.pwml, pwm_const-&gt;pwml_min,</div><div class='add'>+					   pwm_const-&gt;pwml_max);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tb_pwm[IFLA_CAN_PWM_PWMO]) {</div><div class='add'>+		pwm.pwmo = nla_get_u32(tb_pwm[IFLA_CAN_PWM_PWMO]);</div><div class='add'>+		if (pwm.pwmo &lt; pwm_const-&gt;pwmo_min ||</div><div class='add'>+		    pwm.pwmo &gt; pwm_const-&gt;pwmo_max) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "PWMO: %u tqmin is out of range: %u...%u",</div><div class='add'>+					   pwm.pwmo, pwm_const-&gt;pwmo_min,</div><div class='add'>+					   pwm_const-&gt;pwmo_max);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = can_validate_pwm_bittiming(dev, &amp;pwm, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;xl.pwm = pwm;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='add'>+			  struct nlattr *data[],</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* We need synchronization with dev-&gt;stop() */</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	can_ctrlmode_changelink(dev, data, extack);</div><div class='add'>+</div><div class='ctx'> 	if (data[IFLA_CAN_BITTIMING]) {</div><div class='ctx'> 		struct can_bittiming bt;</div><div class='ctx'> </div><div class='hunk'>@@ -285,13 +645,27 @@ static int can_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (data[IFLA_CAN_RESTART_MS]) {</div><div class='add'>+		unsigned int restart_ms = nla_get_u32(data[IFLA_CAN_RESTART_MS]);</div><div class='add'>+</div><div class='add'>+		if (restart_ms != 0 &amp;&amp; !priv-&gt;do_set_mode) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "Device doesn't support restart from Bus Off");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* Do not allow changing restart delay while running */</div><div class='ctx'> 		if (dev-&gt;flags &amp; IFF_UP)</div><div class='ctx'> 			return -EBUSY;</div><div class='del'>-		priv-&gt;restart_ms = nla_get_u32(data[IFLA_CAN_RESTART_MS]);</div><div class='add'>+		priv-&gt;restart_ms = restart_ms;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (data[IFLA_CAN_RESTART]) {</div><div class='add'>+		if (!priv-&gt;do_set_mode) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "Device doesn't support restart from Bus Off");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* Do not allow a restart while not running */</div><div class='ctx'> 		if (!(dev-&gt;flags &amp; IFF_UP))</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -300,75 +674,29 @@ static int can_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (data[IFLA_CAN_DATA_BITTIMING]) {</div><div class='del'>-		struct can_bittiming dbt;</div><div class='del'>-</div><div class='del'>-		/* Do not allow changing bittiming while running */</div><div class='del'>-		if (dev-&gt;flags &amp; IFF_UP)</div><div class='del'>-			return -EBUSY;</div><div class='del'>-</div><div class='del'>-		/* Calculate bittiming parameters based on</div><div class='del'>-		 * data_bittiming_const if set, otherwise pass bitrate</div><div class='del'>-		 * directly via do_set_bitrate(). Bail out if neither</div><div class='del'>-		 * is given.</div><div class='del'>-		 */</div><div class='del'>-		if (!priv-&gt;data_bittiming_const &amp;&amp; !priv-&gt;do_set_data_bittiming &amp;&amp;</div><div class='del'>-		    !priv-&gt;data_bitrate_const)</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-		memcpy(&amp;dbt, nla_data(data[IFLA_CAN_DATA_BITTIMING]),</div><div class='del'>-		       sizeof(dbt));</div><div class='del'>-		err = can_get_bittiming(dev, &amp;dbt,</div><div class='del'>-					priv-&gt;data_bittiming_const,</div><div class='del'>-					priv-&gt;data_bitrate_const,</div><div class='del'>-					priv-&gt;data_bitrate_const_cnt,</div><div class='del'>-					extack);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		if (priv-&gt;bitrate_max &amp;&amp; dbt.bitrate &gt; priv-&gt;bitrate_max) {</div><div class='del'>-			NL_SET_ERR_MSG_FMT(extack,</div><div class='del'>-					   "CANFD data bitrate %u bps surpasses transceiver capabilities of %u bps",</div><div class='del'>-					   dbt.bitrate, priv-&gt;bitrate_max);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='add'>+	/* CAN FD */</div><div class='add'>+	err = can_dbt_changelink(dev, data, true, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-		memset(&amp;priv-&gt;tdc, 0, sizeof(priv-&gt;tdc));</div><div class='del'>-		if (data[IFLA_CAN_TDC]) {</div><div class='del'>-			/* TDC parameters are provided: use them */</div><div class='del'>-			err = can_tdc_changelink(priv, data[IFLA_CAN_TDC],</div><div class='del'>-						 extack);</div><div class='del'>-			if (err) {</div><div class='del'>-				priv-&gt;ctrlmode &amp;= ~CAN_CTRLMODE_TDC_MASK;</div><div class='del'>-				return err;</div><div class='del'>-			}</div><div class='del'>-		} else if (!tdc_mask) {</div><div class='del'>-			/* Neither of TDC parameters nor TDC flags are</div><div class='del'>-			 * provided: do calculation</div><div class='del'>-			 */</div><div class='del'>-			can_calc_tdco(&amp;priv-&gt;tdc, priv-&gt;tdc_const, &amp;dbt,</div><div class='del'>-				      &amp;priv-&gt;ctrlmode, priv-&gt;ctrlmode_supported);</div><div class='del'>-		} /* else: both CAN_CTRLMODE_TDC_{AUTO,MANUAL} are explicitly</div><div class='del'>-		   * turned off. TDC is disabled: do nothing</div><div class='del'>-		   */</div><div class='del'>-</div><div class='del'>-		memcpy(&amp;priv-&gt;data_bittiming, &amp;dbt, sizeof(dbt));</div><div class='del'>-</div><div class='del'>-		if (priv-&gt;do_set_data_bittiming) {</div><div class='del'>-			/* Finally, set the bit-timing registers */</div><div class='del'>-			err = priv-&gt;do_set_data_bittiming(dev);</div><div class='del'>-			if (err)</div><div class='del'>-				return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	/* CAN XL */</div><div class='add'>+	err = can_dbt_changelink(dev, data, false, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	err = can_pwm_changelink(dev, data[IFLA_CAN_XL_PWM], extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	if (data[IFLA_CAN_TERMINATION]) {</div><div class='ctx'> 		const u16 termval = nla_get_u16(data[IFLA_CAN_TERMINATION]);</div><div class='ctx'> 		const unsigned int num_term = priv-&gt;termination_const_cnt;</div><div class='ctx'> 		unsigned int i;</div><div class='ctx'> </div><div class='del'>-		if (!priv-&gt;do_set_termination)</div><div class='add'>+		if (!priv-&gt;do_set_termination) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "Termination is not configurable on this device");</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* check whether given value is supported by the interface */</div><div class='ctx'> 		for (i = 0; i &lt; num_term; i++) {</div><div class='hunk'>@@ -389,44 +717,85 @@ static int can_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static size_t can_tdc_get_size(const struct net_device *dev)</div><div class='add'>+static size_t can_tdc_get_size(struct data_bittiming_params *dbt_params,</div><div class='add'>+			       u32 tdc_flags)</div><div class='ctx'> {</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	bool tdc_manual = tdc_flags &amp; CAN_CTRLMODE_TDC_MANUAL_MASK;</div><div class='ctx'> 	size_t size;</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;tdc_const)</div><div class='add'>+	if (!dbt_params-&gt;tdc_const)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	size = nla_total_size(0);			/* nest IFLA_CAN_TDC */</div><div class='del'>-	if (priv-&gt;ctrlmode_supported &amp; CAN_CTRLMODE_TDC_MANUAL) {</div><div class='add'>+	if (tdc_manual) {</div><div class='ctx'> 		size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCV_MIN */</div><div class='ctx'> 		size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCV_MAX */</div><div class='ctx'> 	}</div><div class='ctx'> 	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_TDCO_MIN */</div><div class='ctx'> 	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_TDCO_MAX */</div><div class='del'>-	if (priv-&gt;tdc_const-&gt;tdcf_max) {</div><div class='add'>+	if (dbt_params-&gt;tdc_const-&gt;tdcf_max) {</div><div class='ctx'> 		size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCF_MIN */</div><div class='ctx'> 		size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCF_MAX */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (can_tdc_is_enabled(priv)) {</div><div class='del'>-		if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_TDC_MANUAL ||</div><div class='del'>-		    priv-&gt;do_get_auto_tdcv)</div><div class='add'>+	if (tdc_flags) {</div><div class='add'>+		if (tdc_manual || dbt_params-&gt;do_get_auto_tdcv)</div><div class='ctx'> 			size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCV */</div><div class='ctx'> 		size += nla_total_size(sizeof(u32));		/* IFLA_CAN_TDCO */</div><div class='del'>-		if (priv-&gt;tdc_const-&gt;tdcf_max)</div><div class='add'>+		if (dbt_params-&gt;tdc_const-&gt;tdcf_max)</div><div class='ctx'> 			size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCF */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static size_t can_data_bittiming_get_size(struct data_bittiming_params *dbt_params,</div><div class='add'>+					  u32 tdc_flags)</div><div class='add'>+{</div><div class='add'>+	size_t size = 0;</div><div class='add'>+</div><div class='add'>+	if (dbt_params-&gt;data_bittiming.bitrate)		/* IFLA_CAN_{,XL}_DATA_BITTIMING */</div><div class='add'>+		size += nla_total_size(sizeof(dbt_params-&gt;data_bittiming));</div><div class='add'>+	if (dbt_params-&gt;data_bittiming_const)		/* IFLA_CAN_{,XL}_DATA_BITTIMING_CONST */</div><div class='add'>+		size += nla_total_size(sizeof(*dbt_params-&gt;data_bittiming_const));</div><div class='add'>+	if (dbt_params-&gt;data_bitrate_const)		/* IFLA_CAN_{,XL}_DATA_BITRATE_CONST */</div><div class='add'>+		size += nla_total_size(sizeof(*dbt_params-&gt;data_bitrate_const) *</div><div class='add'>+				       dbt_params-&gt;data_bitrate_const_cnt);</div><div class='add'>+	size += can_tdc_get_size(dbt_params, tdc_flags);/* IFLA_CAN_{,XL}_TDC */</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static size_t can_ctrlmode_ext_get_size(void)</div><div class='ctx'> {</div><div class='ctx'> 	return nla_total_size(0) +		/* nest IFLA_CAN_CTRLMODE_EXT */</div><div class='ctx'> 		nla_total_size(sizeof(u32));	/* IFLA_CAN_CTRLMODE_SUPPORTED */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static size_t can_pwm_get_size(const struct can_pwm_const *pwm_const,</div><div class='add'>+			       bool pwm_on)</div><div class='add'>+{</div><div class='add'>+	size_t size;</div><div class='add'>+</div><div class='add'>+	if (!pwm_const || !pwm_on)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	size = nla_total_size(0);			/* nest IFLA_CAN_PWM */</div><div class='add'>+</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMS_MIN */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMS_MAX */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWML_MIN */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWML_MAX */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMO_MIN */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMO_MAX */</div><div class='add'>+</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMS */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWML */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMO */</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static size_t can_get_size(const struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct can_priv *priv = netdev_priv(dev);</div><div class='hunk'>@@ -442,10 +811,6 @@ static size_t can_get_size(const struct net_device *dev)</div><div class='ctx'> 	size += nla_total_size(sizeof(u32));			/* IFLA_CAN_RESTART_MS */</div><div class='ctx'> 	if (priv-&gt;do_get_berr_counter)				/* IFLA_CAN_BERR_COUNTER */</div><div class='ctx'> 		size += nla_total_size(sizeof(struct can_berr_counter));</div><div class='del'>-	if (priv-&gt;data_bittiming.bitrate)			/* IFLA_CAN_DATA_BITTIMING */</div><div class='del'>-		size += nla_total_size(sizeof(struct can_bittiming));</div><div class='del'>-	if (priv-&gt;data_bittiming_const)				/* IFLA_CAN_DATA_BITTIMING_CONST */</div><div class='del'>-		size += nla_total_size(sizeof(struct can_bittiming_const));</div><div class='ctx'> 	if (priv-&gt;termination_const) {</div><div class='ctx'> 		size += nla_total_size(sizeof(priv-&gt;termination));		/* IFLA_CAN_TERMINATION */</div><div class='ctx'> 		size += nla_total_size(sizeof(*priv-&gt;termination_const) *	/* IFLA_CAN_TERMINATION_CONST */</div><div class='hunk'>@@ -454,31 +819,76 @@ static size_t can_get_size(const struct net_device *dev)</div><div class='ctx'> 	if (priv-&gt;bitrate_const)				/* IFLA_CAN_BITRATE_CONST */</div><div class='ctx'> 		size += nla_total_size(sizeof(*priv-&gt;bitrate_const) *</div><div class='ctx'> 				       priv-&gt;bitrate_const_cnt);</div><div class='del'>-	if (priv-&gt;data_bitrate_const)				/* IFLA_CAN_DATA_BITRATE_CONST */</div><div class='del'>-		size += nla_total_size(sizeof(*priv-&gt;data_bitrate_const) *</div><div class='del'>-				       priv-&gt;data_bitrate_const_cnt);</div><div class='ctx'> 	size += sizeof(priv-&gt;bitrate_max);			/* IFLA_CAN_BITRATE_MAX */</div><div class='del'>-	size += can_tdc_get_size(dev);				/* IFLA_CAN_TDC */</div><div class='ctx'> 	size += can_ctrlmode_ext_get_size();			/* IFLA_CAN_CTRLMODE_EXT */</div><div class='ctx'> </div><div class='add'>+	size += can_data_bittiming_get_size(&amp;priv-&gt;fd,</div><div class='add'>+					    priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD_TDC_MASK);</div><div class='add'>+</div><div class='add'>+	size += can_data_bittiming_get_size(&amp;priv-&gt;xl,</div><div class='add'>+					    priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TDC_MASK);</div><div class='add'>+	size += can_pwm_get_size(priv-&gt;xl.pwm_const,		/* IFLA_CAN_XL_PWM */</div><div class='add'>+				 priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS);</div><div class='add'>+</div><div class='ctx'> 	return size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int can_tdc_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='add'>+static int can_bittiming_fill_info(struct sk_buff *skb, int ifla_can_bittiming,</div><div class='add'>+				   struct can_bittiming *bittiming)</div><div class='add'>+{</div><div class='add'>+	return bittiming-&gt;bitrate != CAN_BITRATE_UNSET &amp;&amp;</div><div class='add'>+		bittiming-&gt;bitrate != CAN_BITRATE_UNKNOWN &amp;&amp;</div><div class='add'>+		nla_put(skb, ifla_can_bittiming, sizeof(*bittiming), bittiming);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_bittiming_const_fill_info(struct sk_buff *skb,</div><div class='add'>+					 int ifla_can_bittiming_const,</div><div class='add'>+					 const struct can_bittiming_const *bittiming_const)</div><div class='add'>+{</div><div class='add'>+	return bittiming_const &amp;&amp;</div><div class='add'>+		nla_put(skb, ifla_can_bittiming_const,</div><div class='add'>+			sizeof(*bittiming_const), bittiming_const);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_bitrate_const_fill_info(struct sk_buff *skb,</div><div class='add'>+				       int ifla_can_bitrate_const,</div><div class='add'>+				       const u32 *bitrate_const, unsigned int cnt)</div><div class='add'>+{</div><div class='add'>+	return bitrate_const &amp;&amp;</div><div class='add'>+		nla_put(skb, ifla_can_bitrate_const,</div><div class='add'>+			sizeof(*bitrate_const) * cnt, bitrate_const);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_tdc_fill_info(struct sk_buff *skb, const struct net_device *dev,</div><div class='add'>+			     int ifla_can_tdc)</div><div class='ctx'> {</div><div class='del'>-	struct nlattr *nest;</div><div class='ctx'> 	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct can_tdc *tdc = &amp;priv-&gt;tdc;</div><div class='del'>-	const struct can_tdc_const *tdc_const = priv-&gt;tdc_const;</div><div class='add'>+	struct data_bittiming_params *dbt_params;</div><div class='add'>+	const struct can_tdc_const *tdc_const;</div><div class='add'>+	struct can_tdc *tdc;</div><div class='add'>+	struct nlattr *nest;</div><div class='add'>+	bool tdc_is_enabled, tdc_manual;</div><div class='add'>+</div><div class='add'>+	if (ifla_can_tdc == IFLA_CAN_TDC) {</div><div class='add'>+		dbt_params = &amp;priv-&gt;fd;</div><div class='add'>+		tdc_is_enabled = can_fd_tdc_is_enabled(priv);</div><div class='add'>+		tdc_manual = priv-&gt;ctrlmode &amp; CAN_CTRLMODE_TDC_MANUAL;</div><div class='add'>+	} else {</div><div class='add'>+		dbt_params = &amp;priv-&gt;xl;</div><div class='add'>+		tdc_is_enabled = can_xl_tdc_is_enabled(priv);</div><div class='add'>+		tdc_manual = priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TDC_MANUAL;</div><div class='add'>+	}</div><div class='add'>+	tdc_const = dbt_params-&gt;tdc_const;</div><div class='add'>+	tdc = &amp;dbt_params-&gt;tdc;</div><div class='ctx'> </div><div class='ctx'> 	if (!tdc_const)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	nest = nla_nest_start(skb, IFLA_CAN_TDC);</div><div class='add'>+	nest = nla_nest_start(skb, ifla_can_tdc);</div><div class='ctx'> 	if (!nest)</div><div class='ctx'> 		return -EMSGSIZE;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;ctrlmode_supported &amp; CAN_CTRLMODE_TDC_MANUAL &amp;&amp;</div><div class='add'>+	if (tdc_manual &amp;&amp;</div><div class='ctx'> 	    (nla_put_u32(skb, IFLA_CAN_TDC_TDCV_MIN, tdc_const-&gt;tdcv_min) ||</div><div class='ctx'> 	     nla_put_u32(skb, IFLA_CAN_TDC_TDCV_MAX, tdc_const-&gt;tdcv_max)))</div><div class='ctx'> 		goto err_cancel;</div><div class='hunk'>@@ -490,15 +900,15 @@ static int can_tdc_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='ctx'> 	     nla_put_u32(skb, IFLA_CAN_TDC_TDCF_MAX, tdc_const-&gt;tdcf_max)))</div><div class='ctx'> 		goto err_cancel;</div><div class='ctx'> </div><div class='del'>-	if (can_tdc_is_enabled(priv)) {</div><div class='add'>+	if (tdc_is_enabled) {</div><div class='ctx'> 		u32 tdcv;</div><div class='ctx'> 		int err = -EINVAL;</div><div class='ctx'> </div><div class='del'>-		if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_TDC_MANUAL) {</div><div class='add'>+		if (tdc_manual) {</div><div class='ctx'> 			tdcv = tdc-&gt;tdcv;</div><div class='ctx'> 			err = 0;</div><div class='del'>-		} else if (priv-&gt;do_get_auto_tdcv) {</div><div class='del'>-			err = priv-&gt;do_get_auto_tdcv(dev, &amp;tdcv);</div><div class='add'>+		} else if (dbt_params-&gt;do_get_auto_tdcv) {</div><div class='add'>+			err = dbt_params-&gt;do_get_auto_tdcv(dev, &amp;tdcv);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!err &amp;&amp; nla_put_u32(skb, IFLA_CAN_TDC_TDCV, tdcv))</div><div class='ctx'> 			goto err_cancel;</div><div class='hunk'>@@ -517,6 +927,42 @@ err_cancel:</div><div class='ctx'> 	return -EMSGSIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int can_pwm_fill_info(struct sk_buff *skb, const struct can_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct can_pwm_const *pwm_const = priv-&gt;xl.pwm_const;</div><div class='add'>+	const struct can_pwm *pwm = &amp;priv-&gt;xl.pwm;</div><div class='add'>+	struct nlattr *nest;</div><div class='add'>+</div><div class='add'>+	if (!pwm_const)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	nest = nla_nest_start(skb, IFLA_CAN_XL_PWM);</div><div class='add'>+	if (!nest)</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(skb, IFLA_CAN_PWM_PWMS_MIN, pwm_const-&gt;pwms_min) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_PWM_PWMS_MAX, pwm_const-&gt;pwms_max) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_PWM_PWML_MIN, pwm_const-&gt;pwml_min) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_PWM_PWML_MAX, pwm_const-&gt;pwml_max) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_PWM_PWMO_MIN, pwm_const-&gt;pwmo_min) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_PWM_PWMO_MAX, pwm_const-&gt;pwmo_max))</div><div class='add'>+		goto err_cancel;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS) {</div><div class='add'>+		if (nla_put_u32(skb, IFLA_CAN_PWM_PWMS, pwm-&gt;pwms) ||</div><div class='add'>+		    nla_put_u32(skb, IFLA_CAN_PWM_PWML, pwm-&gt;pwml) ||</div><div class='add'>+		    nla_put_u32(skb, IFLA_CAN_PWM_PWMO, pwm-&gt;pwmo))</div><div class='add'>+			goto err_cancel;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nla_nest_end(skb, nest);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_cancel:</div><div class='add'>+	nla_nest_cancel(skb, nest);</div><div class='add'>+	return -EMSGSIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int can_ctrlmode_ext_fill_info(struct sk_buff *skb,</div><div class='ctx'> 				      const struct can_priv *priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -546,14 +992,11 @@ static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='ctx'> 	if (priv-&gt;do_get_state)</div><div class='ctx'> 		priv-&gt;do_get_state(dev, &amp;state);</div><div class='ctx'> </div><div class='del'>-	if ((priv-&gt;bittiming.bitrate != CAN_BITRATE_UNSET &amp;&amp;</div><div class='del'>-	     priv-&gt;bittiming.bitrate != CAN_BITRATE_UNKNOWN &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_BITTIMING,</div><div class='del'>-		     sizeof(priv-&gt;bittiming), &amp;priv-&gt;bittiming)) ||</div><div class='add'>+	if (can_bittiming_fill_info(skb, IFLA_CAN_BITTIMING,</div><div class='add'>+				    &amp;priv-&gt;bittiming) ||</div><div class='ctx'> </div><div class='del'>-	    (priv-&gt;bittiming_const &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_BITTIMING_CONST,</div><div class='del'>-		     sizeof(*priv-&gt;bittiming_const), priv-&gt;bittiming_const)) ||</div><div class='add'>+	    can_bittiming_const_fill_info(skb, IFLA_CAN_BITTIMING_CONST,</div><div class='add'>+					  priv-&gt;bittiming_const) ||</div><div class='ctx'> </div><div class='ctx'> 	    nla_put(skb, IFLA_CAN_CLOCK, sizeof(priv-&gt;clock), &amp;priv-&gt;clock) ||</div><div class='ctx'> 	    nla_put_u32(skb, IFLA_CAN_STATE, state) ||</div><div class='hunk'>@@ -564,14 +1007,11 @@ static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='ctx'> 	     !priv-&gt;do_get_berr_counter(dev, &amp;bec) &amp;&amp;</div><div class='ctx'> 	     nla_put(skb, IFLA_CAN_BERR_COUNTER, sizeof(bec), &amp;bec)) ||</div><div class='ctx'> </div><div class='del'>-	    (priv-&gt;data_bittiming.bitrate &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_DATA_BITTIMING,</div><div class='del'>-		     sizeof(priv-&gt;data_bittiming), &amp;priv-&gt;data_bittiming)) ||</div><div class='add'>+	    can_bittiming_fill_info(skb, IFLA_CAN_DATA_BITTIMING,</div><div class='add'>+				    &amp;priv-&gt;fd.data_bittiming) ||</div><div class='ctx'> </div><div class='del'>-	    (priv-&gt;data_bittiming_const &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_DATA_BITTIMING_CONST,</div><div class='del'>-		     sizeof(*priv-&gt;data_bittiming_const),</div><div class='del'>-		     priv-&gt;data_bittiming_const)) ||</div><div class='add'>+	    can_bittiming_const_fill_info(skb, IFLA_CAN_DATA_BITTIMING_CONST,</div><div class='add'>+					  priv-&gt;fd.data_bittiming_const) ||</div><div class='ctx'> </div><div class='ctx'> 	    (priv-&gt;termination_const &amp;&amp;</div><div class='ctx'> 	     (nla_put_u16(skb, IFLA_CAN_TERMINATION, priv-&gt;termination) ||</div><div class='hunk'>@@ -580,27 +1020,36 @@ static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='ctx'> 		      priv-&gt;termination_const_cnt,</div><div class='ctx'> 		      priv-&gt;termination_const))) ||</div><div class='ctx'> </div><div class='del'>-	    (priv-&gt;bitrate_const &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_BITRATE_CONST,</div><div class='del'>-		     sizeof(*priv-&gt;bitrate_const) *</div><div class='del'>-		     priv-&gt;bitrate_const_cnt,</div><div class='del'>-		     priv-&gt;bitrate_const)) ||</div><div class='add'>+	    can_bitrate_const_fill_info(skb, IFLA_CAN_BITRATE_CONST,</div><div class='add'>+					priv-&gt;bitrate_const,</div><div class='add'>+					priv-&gt;bitrate_const_cnt) ||</div><div class='ctx'> </div><div class='del'>-	    (priv-&gt;data_bitrate_const &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_DATA_BITRATE_CONST,</div><div class='del'>-		     sizeof(*priv-&gt;data_bitrate_const) *</div><div class='del'>-		     priv-&gt;data_bitrate_const_cnt,</div><div class='del'>-		     priv-&gt;data_bitrate_const)) ||</div><div class='add'>+	    can_bitrate_const_fill_info(skb, IFLA_CAN_DATA_BITRATE_CONST,</div><div class='add'>+					priv-&gt;fd.data_bitrate_const,</div><div class='add'>+					priv-&gt;fd.data_bitrate_const_cnt) ||</div><div class='ctx'> </div><div class='ctx'> 	    (nla_put(skb, IFLA_CAN_BITRATE_MAX,</div><div class='ctx'> 		     sizeof(priv-&gt;bitrate_max),</div><div class='ctx'> 		     &amp;priv-&gt;bitrate_max)) ||</div><div class='ctx'> </div><div class='del'>-	    can_tdc_fill_info(skb, dev) ||</div><div class='add'>+	    can_tdc_fill_info(skb, dev, IFLA_CAN_TDC) ||</div><div class='ctx'> </div><div class='del'>-	    can_ctrlmode_ext_fill_info(skb, priv)</div><div class='del'>-	    )</div><div class='add'>+	    can_ctrlmode_ext_fill_info(skb, priv) ||</div><div class='ctx'> </div><div class='add'>+	    can_bittiming_fill_info(skb, IFLA_CAN_XL_DATA_BITTIMING,</div><div class='add'>+				    &amp;priv-&gt;xl.data_bittiming) ||</div><div class='add'>+</div><div class='add'>+	    can_bittiming_const_fill_info(skb, IFLA_CAN_XL_DATA_BITTIMING_CONST,</div><div class='add'>+					  priv-&gt;xl.data_bittiming_const) ||</div><div class='add'>+</div><div class='add'>+	    can_bitrate_const_fill_info(skb, IFLA_CAN_XL_DATA_BITRATE_CONST,</div><div class='add'>+					priv-&gt;xl.data_bitrate_const,</div><div class='add'>+					priv-&gt;xl.data_bitrate_const_cnt) ||</div><div class='add'>+</div><div class='add'>+	    can_tdc_fill_info(skb, dev, IFLA_CAN_XL_TDC) ||</div><div class='add'>+</div><div class='add'>+	    can_pwm_fill_info(skb, priv)</div><div class='add'>+	    )</div><div class='ctx'> 		return -EMSGSIZE;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -624,8 +1073,8 @@ nla_put_failure:</div><div class='ctx'> 	return -EMSGSIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int can_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-		       struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int can_newlink(struct net_device *dev,</div><div class='add'>+		       struct rtnl_newlink_params *params,</div><div class='ctx'> 		       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='head'>diff --git a/drivers/net/can/dummy_can.c b/drivers/net/can/dummy_can.c<br/>new file mode 100644<br/>index 000000000000..41953655e3d3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dummy_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dummy_can.c</a></div><div class='hunk'>@@ -0,0 +1,285 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+/* Copyright (c) 2025 Vincent Mailhol &lt;mailhol@kernel.org&gt; */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/array_size.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/bittiming.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/skb.h&gt;</div><div class='add'>+</div><div class='add'>+struct dummy_can {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dummy_can *dummy_can;</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const dummy_can_bittiming_const = {</div><div class='add'>+	.name = "dummy_can CC",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const dummy_can_fd_databittiming_const = {</div><div class='add'>+	.name = "dummy_can FD",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_tdc_const dummy_can_fd_tdc_const = {</div><div class='add'>+	.tdcv_min = 0,</div><div class='add'>+	.tdcv_max = 0, /* Manual mode not supported. */</div><div class='add'>+	.tdco_min = 0,</div><div class='add'>+	.tdco_max = 127,</div><div class='add'>+	.tdcf_min = 0,</div><div class='add'>+	.tdcf_max = 127</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const dummy_can_xl_databittiming_const = {</div><div class='add'>+	.name = "dummy_can XL",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_tdc_const dummy_can_xl_tdc_const = {</div><div class='add'>+	.tdcv_min = 0,</div><div class='add'>+	.tdcv_max = 0, /* Manual mode not supported. */</div><div class='add'>+	.tdco_min = 0,</div><div class='add'>+	.tdco_max = 127,</div><div class='add'>+	.tdcf_min = 0,</div><div class='add'>+	.tdcf_max = 127</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_pwm_const dummy_can_pwm_const = {</div><div class='add'>+	.pwms_min = 1,</div><div class='add'>+	.pwms_max = 8,</div><div class='add'>+	.pwml_min = 2,</div><div class='add'>+	.pwml_max = 24,</div><div class='add'>+	.pwmo_min = 0,</div><div class='add'>+	.pwmo_max = 16,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void dummy_can_print_bittiming(struct net_device *dev,</div><div class='add'>+				      struct can_bittiming *bt)</div><div class='add'>+{</div><div class='add'>+	netdev_dbg(dev, "\tbitrate: %u\n", bt-&gt;bitrate);</div><div class='add'>+	netdev_dbg(dev, "\tsample_point: %u\n", bt-&gt;sample_point);</div><div class='add'>+	netdev_dbg(dev, "\ttq: %u\n", bt-&gt;tq);</div><div class='add'>+	netdev_dbg(dev, "\tprop_seg: %u\n", bt-&gt;prop_seg);</div><div class='add'>+	netdev_dbg(dev, "\tphase_seg1: %u\n", bt-&gt;phase_seg1);</div><div class='add'>+	netdev_dbg(dev, "\tphase_seg2: %u\n", bt-&gt;phase_seg2);</div><div class='add'>+	netdev_dbg(dev, "\tsjw: %u\n", bt-&gt;sjw);</div><div class='add'>+	netdev_dbg(dev, "\tbrp: %u\n", bt-&gt;brp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dummy_can_print_tdc(struct net_device *dev, struct can_tdc *tdc)</div><div class='add'>+{</div><div class='add'>+	netdev_dbg(dev, "\t\ttdcv: %u\n", tdc-&gt;tdcv);</div><div class='add'>+	netdev_dbg(dev, "\t\ttdco: %u\n", tdc-&gt;tdco);</div><div class='add'>+	netdev_dbg(dev, "\t\ttdcf: %u\n", tdc-&gt;tdcf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dummy_can_print_pwm(struct net_device *dev, struct can_pwm *pwm,</div><div class='add'>+				struct can_bittiming *dbt)</div><div class='add'>+{</div><div class='add'>+	netdev_dbg(dev, "\t\tpwms: %u\n", pwm-&gt;pwms);</div><div class='add'>+	netdev_dbg(dev, "\t\tpwml: %u\n", pwm-&gt;pwml);</div><div class='add'>+	netdev_dbg(dev, "\t\tpwmo: %u\n", pwm-&gt;pwmo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dummy_can_print_ctrlmode(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct dummy_can *priv = netdev_priv(dev);</div><div class='add'>+	struct can_priv *can_priv = &amp;priv-&gt;can;</div><div class='add'>+	unsigned long supported = can_priv-&gt;ctrlmode_supported;</div><div class='add'>+	u32 enabled = can_priv-&gt;ctrlmode;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "Control modes:\n");</div><div class='add'>+	netdev_dbg(dev, "\tsupported: 0x%08x\n", (u32)supported);</div><div class='add'>+	netdev_dbg(dev, "\tenabled: 0x%08x\n", enabled);</div><div class='add'>+</div><div class='add'>+	if (supported) {</div><div class='add'>+		int idx;</div><div class='add'>+</div><div class='add'>+		netdev_dbg(dev, "\tlist:");</div><div class='add'>+		for_each_set_bit(idx, &amp;supported, BITS_PER_TYPE(u32))</div><div class='add'>+			netdev_dbg(dev, "\t\t%s: %s\n",</div><div class='add'>+				   can_get_ctrlmode_str(BIT(idx)),</div><div class='add'>+				   enabled &amp; BIT(idx) ? "on" : "off");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dummy_can_print_bittiming_info(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct dummy_can *priv = netdev_priv(dev);</div><div class='add'>+	struct can_priv *can_priv = &amp;priv-&gt;can;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "Clock frequency: %u\n", can_priv-&gt;clock.freq);</div><div class='add'>+	netdev_dbg(dev, "Maximum bitrate: %u\n", can_priv-&gt;bitrate_max);</div><div class='add'>+	netdev_dbg(dev, "MTU: %u\n", dev-&gt;mtu);</div><div class='add'>+	netdev_dbg(dev, "\n");</div><div class='add'>+</div><div class='add'>+	dummy_can_print_ctrlmode(dev);</div><div class='add'>+	netdev_dbg(dev, "\n");</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "Classical CAN nominal bittiming:\n");</div><div class='add'>+	dummy_can_print_bittiming(dev, &amp;can_priv-&gt;bittiming);</div><div class='add'>+	netdev_dbg(dev, "\n");</div><div class='add'>+</div><div class='add'>+	if (can_priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		netdev_dbg(dev, "CAN FD databittiming:\n");</div><div class='add'>+		dummy_can_print_bittiming(dev, &amp;can_priv-&gt;fd.data_bittiming);</div><div class='add'>+		if (can_fd_tdc_is_enabled(can_priv)) {</div><div class='add'>+			netdev_dbg(dev, "\tCAN FD TDC:\n");</div><div class='add'>+			dummy_can_print_tdc(dev, &amp;can_priv-&gt;fd.tdc);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	netdev_dbg(dev, "\n");</div><div class='add'>+</div><div class='add'>+	if (can_priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL) {</div><div class='add'>+		netdev_dbg(dev, "CAN XL databittiming:\n");</div><div class='add'>+		dummy_can_print_bittiming(dev, &amp;can_priv-&gt;xl.data_bittiming);</div><div class='add'>+		if (can_xl_tdc_is_enabled(can_priv)) {</div><div class='add'>+			netdev_dbg(dev, "\tCAN XL TDC:\n");</div><div class='add'>+			dummy_can_print_tdc(dev, &amp;can_priv-&gt;xl.tdc);</div><div class='add'>+		}</div><div class='add'>+		if (can_priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS) {</div><div class='add'>+			netdev_dbg(dev, "\tCAN XL PWM:\n");</div><div class='add'>+			dummy_can_print_pwm(dev, &amp;can_priv-&gt;xl.pwm,</div><div class='add'>+					    &amp;can_priv-&gt;xl.data_bittiming);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	netdev_dbg(dev, "\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dummy_can_netdev_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	dummy_can_print_bittiming_info(dev);</div><div class='add'>+	netdev_dbg(dev, "error-signalling is %s\n",</div><div class='add'>+		   str_enabled_disabled(!can_dev_in_xl_only_mode(priv)));</div><div class='add'>+</div><div class='add'>+	ret = open_candev(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+	netdev_dbg(dev, "dummy-can is up\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dummy_can_netdev_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+	close_candev(dev);</div><div class='add'>+	netdev_dbg(dev, "dummy-can is down\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t dummy_can_start_xmit(struct sk_buff *skb,</div><div class='add'>+					struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, dev, 0, 0);</div><div class='add'>+	dev-&gt;stats.tx_packets++;</div><div class='add'>+	dev-&gt;stats.tx_bytes += can_get_echo_skb(dev, 0, NULL);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops dummy_can_netdev_ops = {</div><div class='add'>+	.ndo_open = dummy_can_netdev_open,</div><div class='add'>+	.ndo_stop = dummy_can_netdev_close,</div><div class='add'>+	.ndo_start_xmit = dummy_can_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops dummy_can_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init dummy_can_init(void)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct dummy_can *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev = alloc_candev(sizeof(*priv), 1);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev-&gt;netdev_ops = &amp;dummy_can_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;dummy_can_ethtool_ops;</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;dummy_can_bittiming_const;</div><div class='add'>+	priv-&gt;can.bitrate_max = 20 * MEGA /* BPS */;</div><div class='add'>+	priv-&gt;can.clock.freq = 160 * MEGA /* Hz */;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;dummy_can_fd_databittiming_const;</div><div class='add'>+	priv-&gt;can.fd.tdc_const = &amp;dummy_can_fd_tdc_const;</div><div class='add'>+	priv-&gt;can.xl.data_bittiming_const = &amp;dummy_can_xl_databittiming_const;</div><div class='add'>+	priv-&gt;can.xl.tdc_const = &amp;dummy_can_xl_tdc_const;</div><div class='add'>+	priv-&gt;can.xl.pwm_const = &amp;dummy_can_pwm_const;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+		CAN_CTRLMODE_FD | CAN_CTRLMODE_TDC_AUTO |</div><div class='add'>+		CAN_CTRLMODE_RESTRICTED | CAN_CTRLMODE_XL |</div><div class='add'>+		CAN_CTRLMODE_XL_TDC_AUTO | CAN_CTRLMODE_XL_TMS;</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	ret = register_candev(priv-&gt;dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		free_candev(priv-&gt;dev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dummy_can = priv;</div><div class='add'>+	netdev_dbg(dev, "dummy-can ready\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit dummy_can_exit(void)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dummy_can-&gt;dev;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "dummy-can bye bye\n");</div><div class='add'>+	unregister_candev(dev);</div><div class='add'>+	free_candev(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(dummy_can_init);</div><div class='add'>+module_exit(dummy_can_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("A dummy CAN driver, mainly to test the netlink interface");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Vincent Mailhol &lt;mailhol@kernel.org&gt;");</div><div class='head'>diff --git a/drivers/net/can/esd/esd_402_pci-core.c b/drivers/net/can/esd/esd_402_pci-core.c<br/>index 5d6d2828cd04..c826f00c551b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/esd/esd_402_pci-core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/esd/esd_402_pci-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/esd/esd_402_pci-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/esd/esd_402_pci-core.c</a></div><div class='hunk'>@@ -86,8 +86,8 @@ static const struct net_device_ops pci402_acc_netdev_ops = {</div><div class='ctx'> 	.ndo_open = acc_open,</div><div class='ctx'> 	.ndo_stop = acc_close,</div><div class='ctx'> 	.ndo_start_xmit = acc_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='del'>-	.ndo_eth_ioctl = can_eth_ioctl_hwts,</div><div class='add'>+	.ndo_hwtstamp_get = can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = can_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops pci402_acc_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/esd/esdacc.c b/drivers/net/can/esd/esdacc.c<br/>index c80032bc1a52..73e66f9a3781 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/esd/esdacc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/esd/esdacc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/esd/esdacc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/esd/esdacc.c</a></div><div class='hunk'>@@ -254,7 +254,7 @@ netdev_tx_t acc_start_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	u32 acc_id;</div><div class='ctx'> 	u32 acc_dlc;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(netdev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	/* Access core-&gt;tx_fifo_tail only once because it may be changed</div><div class='head'>diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c<br/>index ac1a860986df..f5d22c61503f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/flexcan/flexcan-core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/flexcan/flexcan-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/flexcan/flexcan-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/flexcan/flexcan-core.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> #include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/can/platform/flexcan.h&gt;</div><div class='add'>+#include &lt;linux/phy/phy.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/property.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='hunk'>@@ -386,6 +387,16 @@ static const struct flexcan_devtype_data fsl_lx2160a_r1_devtype_data = {</div><div class='ctx'> 		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct flexcan_devtype_data nxp_s32g2_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |</div><div class='add'>+		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_USE_RX_MAILBOX | FLEXCAN_QUIRK_SUPPORT_FD |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_ECC | FLEXCAN_QUIRK_NR_IRQ_3 |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR |</div><div class='add'>+		FLEXCAN_QUIRK_SECONDARY_MB_IRQ,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct can_bittiming_const flexcan_bittiming_const = {</div><div class='ctx'> 	.name = DRV_NAME,</div><div class='ctx'> 	.tseg1_min = 4,</div><div class='hunk'>@@ -634,18 +645,22 @@ static void flexcan_clks_disable(const struct flexcan_priv *priv)</div><div class='ctx'> </div><div class='ctx'> static inline int flexcan_transceiver_enable(const struct flexcan_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	if (!priv-&gt;reg_xceiver)</div><div class='del'>-		return 0;</div><div class='add'>+	if (priv-&gt;reg_xceiver)</div><div class='add'>+		return regulator_enable(priv-&gt;reg_xceiver);</div><div class='add'>+	else if (priv-&gt;transceiver)</div><div class='add'>+		return phy_power_on(priv-&gt;transceiver);</div><div class='ctx'> </div><div class='del'>-	return regulator_enable(priv-&gt;reg_xceiver);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int flexcan_transceiver_disable(const struct flexcan_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	if (!priv-&gt;reg_xceiver)</div><div class='del'>-		return 0;</div><div class='add'>+	if (priv-&gt;reg_xceiver)</div><div class='add'>+		return regulator_disable(priv-&gt;reg_xceiver);</div><div class='add'>+	else if (priv-&gt;transceiver)</div><div class='add'>+		return phy_power_off(priv-&gt;transceiver);</div><div class='ctx'> </div><div class='del'>-	return regulator_disable(priv-&gt;reg_xceiver);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int flexcan_chip_enable(struct flexcan_priv *priv)</div><div class='hunk'>@@ -1211,7 +1226,7 @@ static void flexcan_set_bittiming_cbt(const struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='ctx'> 	u32 reg_cbt, reg_fdctrl;</div><div class='ctx'> </div><div class='hunk'>@@ -1762,14 +1777,25 @@ static int flexcan_open(struct net_device *dev)</div><div class='ctx'> 			goto out_free_irq_boff;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SECONDARY_MB_IRQ) {</div><div class='add'>+		err = request_irq(priv-&gt;irq_secondary_mb,</div><div class='add'>+				  flexcan_irq, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_free_irq_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	flexcan_chip_interrupts_enable(dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+ out_free_irq_err:</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_NR_IRQ_3)</div><div class='add'>+		free_irq(priv-&gt;irq_err, dev);</div><div class='ctx'>  out_free_irq_boff:</div><div class='del'>-	free_irq(priv-&gt;irq_boff, dev);</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_NR_IRQ_3)</div><div class='add'>+		free_irq(priv-&gt;irq_boff, dev);</div><div class='ctx'>  out_free_irq:</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'>  out_can_rx_offload_disable:</div><div class='hunk'>@@ -1794,6 +1820,9 @@ static int flexcan_close(struct net_device *dev)</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	flexcan_chip_interrupts_disable(dev);</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SECONDARY_MB_IRQ)</div><div class='add'>+		free_irq(priv-&gt;irq_secondary_mb, dev);</div><div class='add'>+</div><div class='ctx'> 	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_NR_IRQ_3) {</div><div class='ctx'> 		free_irq(priv-&gt;irq_err, dev);</div><div class='ctx'> 		free_irq(priv-&gt;irq_boff, dev);</div><div class='hunk'>@@ -1838,7 +1867,6 @@ static const struct net_device_ops flexcan_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= flexcan_open,</div><div class='ctx'> 	.ndo_stop	= flexcan_close,</div><div class='ctx'> 	.ndo_start_xmit	= flexcan_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int register_flexcandev(struct net_device *dev)</div><div class='hunk'>@@ -2041,6 +2069,7 @@ static const struct of_device_id flexcan_of_match[] = {</div><div class='ctx'> 	{ .compatible = "fsl,vf610-flexcan", .data = &amp;fsl_vf610_devtype_data, },</div><div class='ctx'> 	{ .compatible = "fsl,ls1021ar2-flexcan", .data = &amp;fsl_ls1021a_r2_devtype_data, },</div><div class='ctx'> 	{ .compatible = "fsl,lx2160ar1-flexcan", .data = &amp;fsl_lx2160a_r1_devtype_data, },</div><div class='add'>+	{ .compatible = "nxp,s32g2-flexcan", .data = &amp;nxp_s32g2_devtype_data, },</div><div class='ctx'> 	{ /* sentinel */ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, flexcan_of_match);</div><div class='hunk'>@@ -2061,6 +2090,7 @@ static int flexcan_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct flexcan_priv *priv;</div><div class='ctx'> 	struct regulator *reg_xceiver;</div><div class='add'>+	struct phy *transceiver;</div><div class='ctx'> 	struct clk *clk_ipg = NULL, *clk_per = NULL;</div><div class='ctx'> 	struct flexcan_regs __iomem *regs;</div><div class='ctx'> 	struct flexcan_platform_data *pdata;</div><div class='hunk'>@@ -2076,6 +2106,11 @@ static int flexcan_probe(struct platform_device *pdev)</div><div class='ctx'> 	else if (IS_ERR(reg_xceiver))</div><div class='ctx'> 		return PTR_ERR(reg_xceiver);</div><div class='ctx'> </div><div class='add'>+	transceiver = devm_phy_optional_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(transceiver))</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(transceiver),</div><div class='add'>+				     "failed to get phy\n");</div><div class='add'>+</div><div class='ctx'> 	if (pdev-&gt;dev.of_node) {</div><div class='ctx'> 		of_property_read_u32(pdev-&gt;dev.of_node,</div><div class='ctx'> 				     "clock-frequency", &amp;clock_freq);</div><div class='hunk'>@@ -2173,6 +2208,10 @@ static int flexcan_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv-&gt;clk_per = clk_per;</div><div class='ctx'> 	priv-&gt;clk_src = clk_src;</div><div class='ctx'> 	priv-&gt;reg_xceiver = reg_xceiver;</div><div class='add'>+	priv-&gt;transceiver = transceiver;</div><div class='add'>+</div><div class='add'>+	if (transceiver)</div><div class='add'>+		priv-&gt;can.bitrate_max = transceiver-&gt;attrs.max_link_rate;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_NR_IRQ_3) {</div><div class='ctx'> 		priv-&gt;irq_boff = platform_get_irq(pdev, 1);</div><div class='hunk'>@@ -2187,11 +2226,19 @@ static int flexcan_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SECONDARY_MB_IRQ) {</div><div class='add'>+		priv-&gt;irq_secondary_mb = platform_get_irq_byname(pdev, "mb-1");</div><div class='add'>+		if (priv-&gt;irq_secondary_mb &lt; 0) {</div><div class='add'>+			err = priv-&gt;irq_secondary_mb;</div><div class='add'>+			goto failed_platform_get_irq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SUPPORT_FD) {</div><div class='ctx'> 		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD |</div><div class='ctx'> 			CAN_CTRLMODE_FD_NON_ISO;</div><div class='ctx'> 		priv-&gt;can.bittiming_const = &amp;flexcan_fd_bittiming_const;</div><div class='del'>-		priv-&gt;can.data_bittiming_const =</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const =</div><div class='ctx'> 			&amp;flexcan_fd_data_bittiming_const;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		priv-&gt;can.bittiming_const = &amp;flexcan_bittiming_const;</div><div class='hunk'>@@ -2260,14 +2307,19 @@ static int __maybe_unused flexcan_suspend(struct device *device)</div><div class='ctx'> </div><div class='ctx'> 			flexcan_chip_interrupts_disable(dev);</div><div class='ctx'> </div><div class='add'>+			err = flexcan_transceiver_disable(priv);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+</div><div class='ctx'> 			err = pinctrl_pm_select_sleep_state(device);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return err;</div><div class='ctx'> 		}</div><div class='ctx'> 		netif_stop_queue(dev);</div><div class='ctx'> 		netif_device_detach(dev);</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='ctx'> 	}</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2278,7 +2330,6 @@ static int __maybe_unused flexcan_resume(struct device *device)</div><div class='ctx'> 	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		netif_device_attach(dev);</div><div class='ctx'> 		netif_start_queue(dev);</div><div class='hunk'>@@ -2292,12 +2343,20 @@ static int __maybe_unused flexcan_resume(struct device *device)</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return err;</div><div class='ctx'> </div><div class='del'>-			err = flexcan_chip_start(dev);</div><div class='add'>+			err = flexcan_transceiver_enable(priv);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return err;</div><div class='ctx'> </div><div class='add'>+			err = flexcan_chip_start(dev);</div><div class='add'>+			if (err) {</div><div class='add'>+				flexcan_transceiver_disable(priv);</div><div class='add'>+				return err;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			flexcan_chip_interrupts_enable(dev);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/can/flexcan/flexcan.h b/drivers/net/can/flexcan/flexcan.h<br/>index 4933d8c7439e..16692a2502eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/flexcan/flexcan.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/flexcan/flexcan.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/flexcan/flexcan.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/flexcan/flexcan.h</a></div><div class='hunk'>@@ -70,6 +70,10 @@</div><div class='ctx'> #define FLEXCAN_QUIRK_SUPPORT_RX_FIFO BIT(16)</div><div class='ctx'> /* Setup stop mode with ATF SCMI protocol to support wakeup */</div><div class='ctx'> #define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI BIT(17)</div><div class='add'>+/* Device has two separate interrupt lines for two mailbox ranges, which</div><div class='add'>+ * both need to have an interrupt handler registered.</div><div class='add'>+ */</div><div class='add'>+#define FLEXCAN_QUIRK_SECONDARY_MB_IRQ	BIT(18)</div><div class='ctx'> </div><div class='ctx'> struct flexcan_devtype_data {</div><div class='ctx'> 	u32 quirks;		/* quirks needed for different IP cores */</div><div class='hunk'>@@ -103,10 +107,12 @@ struct flexcan_priv {</div><div class='ctx'> 	struct clk *clk_per;</div><div class='ctx'> 	struct flexcan_devtype_data devtype_data;</div><div class='ctx'> 	struct regulator *reg_xceiver;</div><div class='add'>+	struct phy *transceiver;</div><div class='ctx'> 	struct flexcan_stop_mode stm;</div><div class='ctx'> </div><div class='ctx'> 	int irq_boff;</div><div class='ctx'> 	int irq_err;</div><div class='add'>+	int irq_secondary_mb;</div><div class='ctx'> </div><div class='ctx'> 	/* IPC handle when setup stop mode by System Controller firmware(scfw) */</div><div class='ctx'> 	struct imx_sc_ipc *sc_ipc_handle;</div><div class='head'>diff --git a/drivers/net/can/grcan.c b/drivers/net/can/grcan.c<br/>index cdf0ec9fa7f3..3b1b09943436 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/grcan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/grcan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/grcan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/grcan.c</a></div><div class='hunk'>@@ -778,7 +778,7 @@ static irqreturn_t grcan_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (priv-&gt;need_txbug_workaround &amp;&amp;</div><div class='ctx'> 	    (sources &amp; (GRCAN_IRQ_TX | GRCAN_IRQ_TXLOSS))) {</div><div class='del'>-		del_timer(&amp;priv-&gt;hang_timer);</div><div class='add'>+		timer_delete(&amp;priv-&gt;hang_timer);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Frame(s) received or transmitted */</div><div class='hunk'>@@ -806,7 +806,7 @@ static irqreturn_t grcan_interrupt(int irq, void *dev_id)</div><div class='ctx'>  */</div><div class='ctx'> static void grcan_running_reset(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct grcan_priv *priv = from_timer(priv, t, rr_timer);</div><div class='add'>+	struct grcan_priv *priv = timer_container_of(priv, t, rr_timer);</div><div class='ctx'> 	struct net_device *dev = priv-&gt;dev;</div><div class='ctx'> 	struct grcan_registers __iomem *regs = priv-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -817,8 +817,8 @@ static void grcan_running_reset(struct timer_list *t)</div><div class='ctx'> 	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;resetting = false;</div><div class='del'>-	del_timer(&amp;priv-&gt;hang_timer);</div><div class='del'>-	del_timer(&amp;priv-&gt;rr_timer);</div><div class='add'>+	timer_delete(&amp;priv-&gt;hang_timer);</div><div class='add'>+	timer_delete(&amp;priv-&gt;rr_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;closing) {</div><div class='ctx'> 		/* Save and reset - config register preserved by grcan_reset */</div><div class='hunk'>@@ -897,7 +897,7 @@ static inline void grcan_reset_timer(struct timer_list *timer, __u32 bitrate)</div><div class='ctx'> /* Disable channels and schedule a running reset */</div><div class='ctx'> static void grcan_initiate_running_reset(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct grcan_priv *priv = from_timer(priv, t, hang_timer);</div><div class='add'>+	struct grcan_priv *priv = timer_container_of(priv, t, hang_timer);</div><div class='ctx'> 	struct net_device *dev = priv-&gt;dev;</div><div class='ctx'> 	struct grcan_registers __iomem *regs = priv-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -1073,9 +1073,10 @@ static int grcan_open(struct net_device *dev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto exit_close_candev;</div><div class='ctx'> </div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	napi_enable(&amp;priv-&gt;napi);</div><div class='ctx'> 	grcan_start(dev);</div><div class='ctx'> 	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY))</div><div class='ctx'> 		netif_start_queue(dev);</div><div class='hunk'>@@ -1107,8 +1108,8 @@ static int grcan_close(struct net_device *dev)</div><div class='ctx'> 	priv-&gt;closing = true;</div><div class='ctx'> 	if (priv-&gt;need_txbug_workaround) {</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;hang_timer);</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;rr_timer);</div><div class='add'>+		timer_delete_sync(&amp;priv-&gt;hang_timer);</div><div class='add'>+		timer_delete_sync(&amp;priv-&gt;rr_timer);</div><div class='ctx'> 		spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='hunk'>@@ -1146,7 +1147,7 @@ static void grcan_transmit_catch_up(struct net_device *dev)</div><div class='ctx'> 		 * so prevent a running reset while catching up</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (priv-&gt;need_txbug_workaround)</div><div class='del'>-			del_timer(&amp;priv-&gt;hang_timer);</div><div class='add'>+			timer_delete(&amp;priv-&gt;hang_timer);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='hunk'>@@ -1560,7 +1561,6 @@ static const struct net_device_ops grcan_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= grcan_open,</div><div class='ctx'> 	.ndo_stop	= grcan_close,</div><div class='ctx'> 	.ndo_start_xmit	= grcan_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops grcan_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/ifi_canfd/ifi_canfd.c b/drivers/net/can/ifi_canfd/ifi_canfd.c<br/>index d32b10900d2f..0f83335e4d07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ifi_canfd/ifi_canfd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/ifi_canfd/ifi_canfd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ifi_canfd/ifi_canfd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ifi_canfd/ifi_canfd.c</a></div><div class='hunk'>@@ -390,36 +390,55 @@ static int ifi_canfd_handle_lec_err(struct net_device *ndev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-	stats-&gt;rx_errors++;</div><div class='ctx'> </div><div class='ctx'> 	/* Propagate the error condition to the CAN stack. */</div><div class='ctx'> 	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Read the error counter register and check for new errors. */</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+	if (likely(skb))</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='del'>-	if (errctr &amp; IFI_CANFD_ERROR_CTR_OVERLOAD_FIRST)</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_OVERLOAD;</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_OVERLOAD_FIRST) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_OVERLOAD;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (errctr &amp; IFI_CANFD_ERROR_CTR_ACK_ERROR_FIRST)</div><div class='del'>-		cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_ACK_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (errctr &amp; IFI_CANFD_ERROR_CTR_BIT0_ERROR_FIRST)</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_BIT0_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (errctr &amp; IFI_CANFD_ERROR_CTR_BIT1_ERROR_FIRST)</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_BIT1_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (errctr &amp; IFI_CANFD_ERROR_CTR_STUFF_ERROR_FIRST)</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_STUFF_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (errctr &amp; IFI_CANFD_ERROR_CTR_CRC_ERROR_FIRST)</div><div class='del'>-		cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_CRC_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (errctr &amp; IFI_CANFD_ERROR_CTR_FORM_ERROR_FIRST)</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_FORM_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Reset the error counter, ack the IRQ and re-enable the counter. */</div><div class='ctx'> 	writel(IFI_CANFD_ERROR_CTR_ER_RESET, priv-&gt;base + IFI_CANFD_ERROR_CTR);</div><div class='hunk'>@@ -427,6 +446,9 @@ static int ifi_canfd_handle_lec_err(struct net_device *ndev)</div><div class='ctx'> 	       priv-&gt;base + IFI_CANFD_INTERRUPT);</div><div class='ctx'> 	writel(IFI_CANFD_ERROR_CTR_ER_ENABLE, priv-&gt;base + IFI_CANFD_ERROR_CTR);</div><div class='ctx'> </div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	netif_receive_skb(skb);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -647,7 +669,7 @@ static void ifi_canfd_set_bittiming(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	const struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	const struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	u16 brp, sjw, tseg1, tseg2, tdc;</div><div class='ctx'> </div><div class='ctx'> 	/* Configure bit timing */</div><div class='hunk'>@@ -922,7 +944,6 @@ static const struct net_device_ops ifi_canfd_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= ifi_canfd_open,</div><div class='ctx'> 	.ndo_stop	= ifi_canfd_close,</div><div class='ctx'> 	.ndo_start_xmit	= ifi_canfd_start_xmit,</div><div class='del'>-	.ndo_change_mtu	= can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ifi_canfd_ethtool_ops = {</div><div class='hunk'>@@ -978,10 +999,10 @@ static int ifi_canfd_plat_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;can.clock.freq = readl(addr + IFI_CANFD_CANCLOCK);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;can.bittiming_const	= &amp;ifi_canfd_bittiming_const;</div><div class='del'>-	priv-&gt;can.data_bittiming_const	= &amp;ifi_canfd_bittiming_const;</div><div class='del'>-	priv-&gt;can.do_set_mode		= ifi_canfd_set_mode;</div><div class='del'>-	priv-&gt;can.do_get_berr_counter	= ifi_canfd_get_berr_counter;</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;ifi_canfd_bittiming_const;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;ifi_canfd_bittiming_const;</div><div class='add'>+	priv-&gt;can.do_set_mode = ifi_canfd_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = ifi_canfd_get_berr_counter;</div><div class='ctx'> </div><div class='ctx'> 	/* IFI CANFD can do both Bosch FD and ISO FD */</div><div class='ctx'> 	priv-&gt;can.ctrlmode = CAN_CTRLMODE_FD;</div><div class='head'>diff --git a/drivers/net/can/janz-ican3.c b/drivers/net/can/janz-ican3.c<br/>index 60c7b83b4539..1efdd1fd8caa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/janz-ican3.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/janz-ican3.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/janz-ican3.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/janz-ican3.c</a></div><div class='hunk'>@@ -1752,7 +1752,6 @@ static const struct net_device_ops ican3_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= ican3_open,</div><div class='ctx'> 	.ndo_stop	= ican3_stop,</div><div class='ctx'> 	.ndo_start_xmit	= ican3_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ican3_ethtool_ops = {</div><div class='hunk'>@@ -1867,7 +1866,7 @@ static ssize_t fwinfo_show(struct device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct ican3_dev *mod = netdev_priv(to_net_dev(dev));</div><div class='ctx'> </div><div class='del'>-	return scnprintf(buf, PAGE_SIZE, "%s\n", mod-&gt;fwinfo);</div><div class='add'>+	return sysfs_emit(buf, "%s\n", mod-&gt;fwinfo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static DEVICE_ATTR_RW(termination);</div><div class='head'>diff --git a/drivers/net/can/kvaser_pciefd/Makefile b/drivers/net/can/kvaser_pciefd/Makefile<br/>new file mode 100644<br/>index 000000000000..8c5b8cdc6b5f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/kvaser_pciefd/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/kvaser_pciefd/Makefile</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+obj-$(CONFIG_CAN_KVASER_PCIEFD) += kvaser_pciefd.o</div><div class='add'>+kvaser_pciefd-y = kvaser_pciefd_core.o kvaser_pciefd_devlink.o</div><div class='head'>diff --git a/drivers/net/can/kvaser_pciefd/kvaser_pciefd.h b/drivers/net/can/kvaser_pciefd/kvaser_pciefd.h<br/>new file mode 100644<br/>index 000000000000..08c9ddc1ee85<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/kvaser_pciefd/kvaser_pciefd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/kvaser_pciefd/kvaser_pciefd.h</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */</div><div class='add'>+/* kvaser_pciefd common definitions and declarations</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _KVASER_PCIEFD_H</div><div class='add'>+#define _KVASER_PCIEFD_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#define KVASER_PCIEFD_MAX_CAN_CHANNELS 8UL</div><div class='add'>+#define KVASER_PCIEFD_DMA_COUNT 2U</div><div class='add'>+#define KVASER_PCIEFD_DMA_SIZE (4U * 1024U)</div><div class='add'>+#define KVASER_PCIEFD_CAN_TX_MAX_COUNT 17U</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd;</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_address_offset {</div><div class='add'>+	u32 serdes;</div><div class='add'>+	u32 pci_ien;</div><div class='add'>+	u32 pci_irq;</div><div class='add'>+	u32 sysid;</div><div class='add'>+	u32 loopback;</div><div class='add'>+	u32 kcan_srb_fifo;</div><div class='add'>+	u32 kcan_srb;</div><div class='add'>+	u32 kcan_ch0;</div><div class='add'>+	u32 kcan_ch1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_irq_mask {</div><div class='add'>+	u32 kcan_rx0;</div><div class='add'>+	u32 kcan_tx[KVASER_PCIEFD_MAX_CAN_CHANNELS];</div><div class='add'>+	u32 all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_dev_ops {</div><div class='add'>+	void (*kvaser_pciefd_write_dma_map)(struct kvaser_pciefd *pcie,</div><div class='add'>+					    dma_addr_t addr, int index);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_driver_data {</div><div class='add'>+	const struct kvaser_pciefd_address_offset *address_offset;</div><div class='add'>+	const struct kvaser_pciefd_irq_mask *irq_mask;</div><div class='add'>+	const struct kvaser_pciefd_dev_ops *ops;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_fw_version {</div><div class='add'>+	u8 major;</div><div class='add'>+	u8 minor;</div><div class='add'>+	u16 build;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_can {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct devlink_port devlink_port;</div><div class='add'>+	struct kvaser_pciefd *kv_pcie;</div><div class='add'>+	void __iomem *reg_base;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	u32 ioc;</div><div class='add'>+	u8 cmd_seq;</div><div class='add'>+	u8 tx_max_count;</div><div class='add'>+	u8 tx_idx;</div><div class='add'>+	u8 ack_idx;</div><div class='add'>+	int err_rep_cnt;</div><div class='add'>+	unsigned int completed_tx_pkts;</div><div class='add'>+	unsigned int completed_tx_bytes;</div><div class='add'>+	spinlock_t lock; /* Locks sensitive registers (e.g. MODE) */</div><div class='add'>+	struct timer_list bec_poll_timer;</div><div class='add'>+	struct completion start_comp, flush_comp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd {</div><div class='add'>+	struct pci_dev *pci;</div><div class='add'>+	void __iomem *reg_base;</div><div class='add'>+	struct kvaser_pciefd_can *can[KVASER_PCIEFD_MAX_CAN_CHANNELS];</div><div class='add'>+	const struct kvaser_pciefd_driver_data *driver_data;</div><div class='add'>+	void *dma_data[KVASER_PCIEFD_DMA_COUNT];</div><div class='add'>+	u8 nr_channels;</div><div class='add'>+	u32 bus_freq;</div><div class='add'>+	u32 freq;</div><div class='add'>+	u32 freq_to_ticks_div;</div><div class='add'>+	struct kvaser_pciefd_fw_version fw_version;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct devlink_ops kvaser_pciefd_devlink_ops;</div><div class='add'>+</div><div class='add'>+int kvaser_pciefd_devlink_port_register(struct kvaser_pciefd_can *can);</div><div class='add'>+void kvaser_pciefd_devlink_port_unregister(struct kvaser_pciefd_can *can);</div><div class='add'>+#endif /* _KVASER_PCIEFD_H */</div><div class='head'>diff --git a/drivers/net/can/kvaser_pciefd.c b/drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c<br/>index fee012b57f33..d8c9bfb20230 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/kvaser_pciefd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/kvaser_pciefd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c</a></div><div class='hunk'>@@ -5,6 +5,8 @@</div><div class='ctx'>  *  - PEAK linux canfd driver</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include "kvaser_pciefd.h"</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='hunk'>@@ -16,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/timer.h&gt;</div><div class='add'>+#include &lt;net/netdev_queues.h&gt;</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("Dual BSD/GPL");</div><div class='ctx'> MODULE_AUTHOR("Kvaser AB &lt;support@kvaser.com&gt;");</div><div class='hunk'>@@ -26,10 +29,6 @@ MODULE_DESCRIPTION("CAN driver for Kvaser CAN/PCIe devices");</div><div class='ctx'> #define KVASER_PCIEFD_WAIT_TIMEOUT msecs_to_jiffies(1000)</div><div class='ctx'> #define KVASER_PCIEFD_BEC_POLL_FREQ (jiffies + msecs_to_jiffies(200))</div><div class='ctx'> #define KVASER_PCIEFD_MAX_ERR_REP 256U</div><div class='del'>-#define KVASER_PCIEFD_CAN_TX_MAX_COUNT 17U</div><div class='del'>-#define KVASER_PCIEFD_MAX_CAN_CHANNELS 8UL</div><div class='del'>-#define KVASER_PCIEFD_DMA_COUNT 2U</div><div class='del'>-#define KVASER_PCIEFD_DMA_SIZE (4U * 1024U)</div><div class='ctx'> </div><div class='ctx'> #define KVASER_PCIEFD_VENDOR 0x1a07</div><div class='ctx'> </div><div class='hunk'>@@ -65,6 +64,7 @@ MODULE_DESCRIPTION("CAN driver for Kvaser CAN/PCIe devices");</div><div class='ctx'> #define KVASER_PCIEFD_KCAN_FIFO_LAST_REG 0x180</div><div class='ctx'> #define KVASER_PCIEFD_KCAN_CTRL_REG 0x2c0</div><div class='ctx'> #define KVASER_PCIEFD_KCAN_CMD_REG 0x400</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IOC_REG 0x404</div><div class='ctx'> #define KVASER_PCIEFD_KCAN_IEN_REG 0x408</div><div class='ctx'> #define KVASER_PCIEFD_KCAN_IRQ_REG 0x410</div><div class='ctx'> #define KVASER_PCIEFD_KCAN_TX_NR_PACKETS_REG 0x414</div><div class='hunk'>@@ -135,6 +135,9 @@ MODULE_DESCRIPTION("CAN driver for Kvaser CAN/PCIe devices");</div><div class='ctx'> /* Request status packet */</div><div class='ctx'> #define KVASER_PCIEFD_KCAN_CMD_SRQ BIT(0)</div><div class='ctx'> </div><div class='add'>+/* Control CAN LED, active low */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IOC_LED BIT(0)</div><div class='add'>+</div><div class='ctx'> /* Transmitter unaligned */</div><div class='ctx'> #define KVASER_PCIEFD_KCAN_IRQ_TAL BIT(17)</div><div class='ctx'> /* Tx FIFO empty */</div><div class='hunk'>@@ -291,35 +294,6 @@ static void kvaser_pciefd_write_dma_map_sf2(struct kvaser_pciefd *pcie,</div><div class='ctx'> static void kvaser_pciefd_write_dma_map_xilinx(struct kvaser_pciefd *pcie,</div><div class='ctx'> 					       dma_addr_t addr, int index);</div><div class='ctx'> </div><div class='del'>-struct kvaser_pciefd_address_offset {</div><div class='del'>-	u32 serdes;</div><div class='del'>-	u32 pci_ien;</div><div class='del'>-	u32 pci_irq;</div><div class='del'>-	u32 sysid;</div><div class='del'>-	u32 loopback;</div><div class='del'>-	u32 kcan_srb_fifo;</div><div class='del'>-	u32 kcan_srb;</div><div class='del'>-	u32 kcan_ch0;</div><div class='del'>-	u32 kcan_ch1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvaser_pciefd_dev_ops {</div><div class='del'>-	void (*kvaser_pciefd_write_dma_map)(struct kvaser_pciefd *pcie,</div><div class='del'>-					    dma_addr_t addr, int index);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvaser_pciefd_irq_mask {</div><div class='del'>-	u32 kcan_rx0;</div><div class='del'>-	u32 kcan_tx[KVASER_PCIEFD_MAX_CAN_CHANNELS];</div><div class='del'>-	u32 all;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvaser_pciefd_driver_data {</div><div class='del'>-	const struct kvaser_pciefd_address_offset *address_offset;</div><div class='del'>-	const struct kvaser_pciefd_irq_mask *irq_mask;</div><div class='del'>-	const struct kvaser_pciefd_dev_ops *ops;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct kvaser_pciefd_address_offset kvaser_pciefd_altera_address_offset = {</div><div class='ctx'> 	.serdes = 0x1000,</div><div class='ctx'> 	.pci_ien = 0x50,</div><div class='hunk'>@@ -404,32 +378,6 @@ static const struct kvaser_pciefd_driver_data kvaser_pciefd_xilinx_driver_data =</div><div class='ctx'> 	.ops = &amp;kvaser_pciefd_xilinx_dev_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct kvaser_pciefd_can {</div><div class='del'>-	struct can_priv can;</div><div class='del'>-	struct kvaser_pciefd *kv_pcie;</div><div class='del'>-	void __iomem *reg_base;</div><div class='del'>-	struct can_berr_counter bec;</div><div class='del'>-	u8 cmd_seq;</div><div class='del'>-	int err_rep_cnt;</div><div class='del'>-	int echo_idx;</div><div class='del'>-	spinlock_t lock; /* Locks sensitive registers (e.g. MODE) */</div><div class='del'>-	spinlock_t echo_lock; /* Locks the message echo buffer */</div><div class='del'>-	struct timer_list bec_poll_timer;</div><div class='del'>-	struct completion start_comp, flush_comp;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvaser_pciefd {</div><div class='del'>-	struct pci_dev *pci;</div><div class='del'>-	void __iomem *reg_base;</div><div class='del'>-	struct kvaser_pciefd_can *can[KVASER_PCIEFD_MAX_CAN_CHANNELS];</div><div class='del'>-	const struct kvaser_pciefd_driver_data *driver_data;</div><div class='del'>-	void *dma_data[KVASER_PCIEFD_DMA_COUNT];</div><div class='del'>-	u8 nr_channels;</div><div class='del'>-	u32 bus_freq;</div><div class='del'>-	u32 freq;</div><div class='del'>-	u32 freq_to_ticks_div;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct kvaser_pciefd_rx_packet {</div><div class='ctx'> 	u32 header[2];</div><div class='ctx'> 	u64 timestamp;</div><div class='hunk'>@@ -524,6 +472,16 @@ static inline void kvaser_pciefd_abort_flush_reset(struct kvaser_pciefd_can *can</div><div class='ctx'> 	kvaser_pciefd_send_kcan_cmd(can, KVASER_PCIEFD_KCAN_CMD_AT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void kvaser_pciefd_set_led(struct kvaser_pciefd_can *can, bool on)</div><div class='add'>+{</div><div class='add'>+	if (on)</div><div class='add'>+		can-&gt;ioc &amp;= ~KVASER_PCIEFD_KCAN_IOC_LED;</div><div class='add'>+	else</div><div class='add'>+		can-&gt;ioc |= KVASER_PCIEFD_KCAN_IOC_LED;</div><div class='add'>+</div><div class='add'>+	iowrite32(can-&gt;ioc, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IOC_REG);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void kvaser_pciefd_enable_err_gen(struct kvaser_pciefd_can *can)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mode;</div><div class='hunk'>@@ -631,7 +589,7 @@ static int kvaser_pciefd_bus_on(struct kvaser_pciefd_can *can)</div><div class='ctx'> 	u32 mode;</div><div class='ctx'> 	unsigned long irq;</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;can-&gt;bec_poll_timer);</div><div class='add'>+	timer_delete(&amp;can-&gt;bec_poll_timer);</div><div class='ctx'> 	if (!completion_done(&amp;can-&gt;flush_comp))</div><div class='ctx'> 		kvaser_pciefd_start_controller_flush(can);</div><div class='ctx'> </div><div class='hunk'>@@ -714,6 +672,9 @@ static int kvaser_pciefd_open(struct net_device *netdev)</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	struct kvaser_pciefd_can *can = netdev_priv(netdev);</div><div class='ctx'> </div><div class='add'>+	can-&gt;tx_idx = 0;</div><div class='add'>+	can-&gt;ack_idx = 0;</div><div class='add'>+</div><div class='ctx'> 	ret = open_candev(netdev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -742,24 +703,29 @@ static int kvaser_pciefd_stop(struct net_device *netdev)</div><div class='ctx'> 		ret = -ETIMEDOUT;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		iowrite32(0, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='del'>-		del_timer(&amp;can-&gt;bec_poll_timer);</div><div class='add'>+		timer_delete(&amp;can-&gt;bec_poll_timer);</div><div class='ctx'> 	}</div><div class='ctx'> 	can-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	netdev_reset_queue(netdev);</div><div class='ctx'> 	close_candev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int kvaser_pciefd_tx_avail(const struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	return can-&gt;tx_max_count - (READ_ONCE(can-&gt;tx_idx) - READ_ONCE(can-&gt;ack_idx));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int kvaser_pciefd_prepare_tx_packet(struct kvaser_pciefd_tx_packet *p,</div><div class='del'>-					   struct kvaser_pciefd_can *can,</div><div class='add'>+					   struct can_priv *can, u8 seq,</div><div class='ctx'> 					   struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='ctx'> 	int packet_size;</div><div class='del'>-	int seq = can-&gt;echo_idx;</div><div class='ctx'> </div><div class='ctx'> 	memset(p, 0, sizeof(*p));</div><div class='del'>-	if (can-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+	if (can-&gt;ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='ctx'> 		p-&gt;header[1] |= KVASER_PCIEFD_TPACKET_SMS;</div><div class='ctx'> </div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='hunk'>@@ -782,7 +748,7 @@ static int kvaser_pciefd_prepare_tx_packet(struct kvaser_pciefd_tx_packet *p,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		p-&gt;header[1] |=</div><div class='ctx'> 			FIELD_PREP(KVASER_PCIEFD_RPACKET_DLC_MASK,</div><div class='del'>-				   can_get_cc_dlc((struct can_frame *)cf, can-&gt;can.ctrlmode));</div><div class='add'>+				   can_get_cc_dlc((struct can_frame *)cf, can-&gt;ctrlmode));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	p-&gt;header[1] |= FIELD_PREP(KVASER_PCIEFD_PACKET_SEQ_MASK, seq);</div><div class='hunk'>@@ -797,22 +763,24 @@ static netdev_tx_t kvaser_pciefd_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					    struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvaser_pciefd_can *can = netdev_priv(netdev);</div><div class='del'>-	unsigned long irq_flags;</div><div class='ctx'> 	struct kvaser_pciefd_tx_packet packet;</div><div class='add'>+	unsigned int seq = can-&gt;tx_idx &amp; (can-&gt;can.echo_skb_max - 1);</div><div class='add'>+	unsigned int frame_len;</div><div class='ctx'> 	int nr_words;</div><div class='del'>-	u8 count;</div><div class='ctx'> </div><div class='ctx'> 	if (can_dev_dropped_skb(netdev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='add'>+	if (!netif_subqueue_maybe_stop(netdev, 0, kvaser_pciefd_tx_avail(can), 1, 1))</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='ctx'> </div><div class='del'>-	nr_words = kvaser_pciefd_prepare_tx_packet(&amp;packet, can, skb);</div><div class='add'>+	nr_words = kvaser_pciefd_prepare_tx_packet(&amp;packet, &amp;can-&gt;can, seq, skb);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;can-&gt;echo_lock, irq_flags);</div><div class='ctx'> 	/* Prepare and save echo skb in internal slot */</div><div class='del'>-	can_put_echo_skb(skb, netdev, can-&gt;echo_idx, 0);</div><div class='del'>-</div><div class='del'>-	/* Move echo index to the next slot */</div><div class='del'>-	can-&gt;echo_idx = (can-&gt;echo_idx + 1) % can-&gt;can.echo_skb_max;</div><div class='add'>+	WRITE_ONCE(can-&gt;can.echo_skb[seq], NULL);</div><div class='add'>+	frame_len = can_skb_get_frame_len(skb);</div><div class='add'>+	can_put_echo_skb(skb, netdev, seq, frame_len);</div><div class='add'>+	netdev_sent_queue(netdev, frame_len);</div><div class='add'>+	WRITE_ONCE(can-&gt;tx_idx, can-&gt;tx_idx + 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Write header to fifo */</div><div class='ctx'> 	iowrite32(packet.header[0],</div><div class='hunk'>@@ -836,14 +804,7 @@ static netdev_tx_t kvaser_pciefd_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 			     KVASER_PCIEFD_KCAN_FIFO_LAST_REG);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	count = FIELD_GET(KVASER_PCIEFD_KCAN_TX_NR_PACKETS_CURRENT_MASK,</div><div class='del'>-			  ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_TX_NR_PACKETS_REG));</div><div class='del'>-	/* No room for a new message, stop the queue until at least one</div><div class='del'>-	 * successful transmit</div><div class='del'>-	 */</div><div class='del'>-	if (count &gt;= can-&gt;can.echo_skb_max || can-&gt;can.echo_skb[can-&gt;echo_idx])</div><div class='del'>-		netif_stop_queue(netdev);</div><div class='del'>-	spin_unlock_irqrestore(&amp;can-&gt;echo_lock, irq_flags);</div><div class='add'>+	netif_subqueue_maybe_stop(netdev, 0, kvaser_pciefd_tx_avail(can), 1, 1);</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -856,7 +817,7 @@ static int kvaser_pciefd_set_bittiming(struct kvaser_pciefd_can *can, bool data)</div><div class='ctx'> 	struct can_bittiming *bt;</div><div class='ctx'> </div><div class='ctx'> 	if (data)</div><div class='del'>-		bt = &amp;can-&gt;can.data_bittiming;</div><div class='add'>+		bt = &amp;can-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	else</div><div class='ctx'> 		bt = &amp;can-&gt;can.bittiming;</div><div class='ctx'> </div><div class='hunk'>@@ -930,7 +891,8 @@ static int kvaser_pciefd_get_berr_counter(const struct net_device *ndev,</div><div class='ctx'> </div><div class='ctx'> static void kvaser_pciefd_bec_poll_timer(struct timer_list *data)</div><div class='ctx'> {</div><div class='del'>-	struct kvaser_pciefd_can *can = from_timer(can, data, bec_poll_timer);</div><div class='add'>+	struct kvaser_pciefd_can *can = timer_container_of(can, data,</div><div class='add'>+							   bec_poll_timer);</div><div class='ctx'> </div><div class='ctx'> 	kvaser_pciefd_enable_err_gen(can);</div><div class='ctx'> 	kvaser_pciefd_request_status(can);</div><div class='hunk'>@@ -940,13 +902,37 @@ static void kvaser_pciefd_bec_poll_timer(struct timer_list *data)</div><div class='ctx'> static const struct net_device_ops kvaser_pciefd_netdev_ops = {</div><div class='ctx'> 	.ndo_open = kvaser_pciefd_open,</div><div class='ctx'> 	.ndo_stop = kvaser_pciefd_stop,</div><div class='del'>-	.ndo_eth_ioctl = can_eth_ioctl_hwts,</div><div class='ctx'> 	.ndo_start_xmit = kvaser_pciefd_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+	.ndo_hwtstamp_get = can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = can_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int kvaser_pciefd_set_phys_id(struct net_device *netdev,</div><div class='add'>+				     enum ethtool_phys_id_state state)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ETHTOOL_ID_ACTIVE:</div><div class='add'>+		return 3; /* 3 On/Off cycles per second */</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_ON:</div><div class='add'>+		kvaser_pciefd_set_led(can, true);</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_OFF:</div><div class='add'>+	case ETHTOOL_ID_INACTIVE:</div><div class='add'>+		kvaser_pciefd_set_led(can, false);</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops kvaser_pciefd_ethtool_ops = {</div><div class='ctx'> 	.get_ts_info = can_ethtool_op_get_ts_info_hwts,</div><div class='add'>+	.set_phys_id = kvaser_pciefd_set_phys_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int kvaser_pciefd_setup_can_ctrls(struct kvaser_pciefd *pcie)</div><div class='hunk'>@@ -957,9 +943,10 @@ static int kvaser_pciefd_setup_can_ctrls(struct kvaser_pciefd *pcie)</div><div class='ctx'> 		struct net_device *netdev;</div><div class='ctx'> 		struct kvaser_pciefd_can *can;</div><div class='ctx'> 		u32 status, tx_nr_packets_max;</div><div class='add'>+		int ret;</div><div class='ctx'> </div><div class='ctx'> 		netdev = alloc_candev(sizeof(struct kvaser_pciefd_can),</div><div class='del'>-				      KVASER_PCIEFD_CAN_TX_MAX_COUNT);</div><div class='add'>+				      roundup_pow_of_two(KVASER_PCIEFD_CAN_TX_MAX_COUNT));</div><div class='ctx'> 		if (!netdev)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -970,8 +957,11 @@ static int kvaser_pciefd_setup_can_ctrls(struct kvaser_pciefd *pcie)</div><div class='ctx'> 		can-&gt;kv_pcie = pcie;</div><div class='ctx'> 		can-&gt;cmd_seq = 0;</div><div class='ctx'> 		can-&gt;err_rep_cnt = 0;</div><div class='add'>+		can-&gt;completed_tx_pkts = 0;</div><div class='add'>+		can-&gt;completed_tx_bytes = 0;</div><div class='ctx'> 		can-&gt;bec.txerr = 0;</div><div class='ctx'> 		can-&gt;bec.rxerr = 0;</div><div class='add'>+		can-&gt;can.dev-&gt;dev_port = i;</div><div class='ctx'> </div><div class='ctx'> 		init_completion(&amp;can-&gt;start_comp);</div><div class='ctx'> 		init_completion(&amp;can-&gt;flush_comp);</div><div class='hunk'>@@ -980,26 +970,28 @@ static int kvaser_pciefd_setup_can_ctrls(struct kvaser_pciefd *pcie)</div><div class='ctx'> 		/* Disable Bus load reporting */</div><div class='ctx'> 		iowrite32(0, can-&gt;reg_base + KVASER_PCIEFD_KCAN_BUS_LOAD_REG);</div><div class='ctx'> </div><div class='add'>+		can-&gt;ioc = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_IOC_REG);</div><div class='add'>+		kvaser_pciefd_set_led(can, false);</div><div class='add'>+</div><div class='ctx'> 		tx_nr_packets_max =</div><div class='ctx'> 			FIELD_GET(KVASER_PCIEFD_KCAN_TX_NR_PACKETS_MAX_MASK,</div><div class='ctx'> 				  ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_TX_NR_PACKETS_REG));</div><div class='add'>+		can-&gt;tx_max_count = min(KVASER_PCIEFD_CAN_TX_MAX_COUNT, tx_nr_packets_max - 1);</div><div class='ctx'> </div><div class='ctx'> 		can-&gt;can.clock.freq = pcie-&gt;freq;</div><div class='del'>-		can-&gt;can.echo_skb_max = min(KVASER_PCIEFD_CAN_TX_MAX_COUNT, tx_nr_packets_max - 1);</div><div class='del'>-		can-&gt;echo_idx = 0;</div><div class='del'>-		spin_lock_init(&amp;can-&gt;echo_lock);</div><div class='ctx'> 		spin_lock_init(&amp;can-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 		can-&gt;can.bittiming_const = &amp;kvaser_pciefd_bittiming_const;</div><div class='del'>-		can-&gt;can.data_bittiming_const = &amp;kvaser_pciefd_bittiming_const;</div><div class='add'>+		can-&gt;can.fd.data_bittiming_const = &amp;kvaser_pciefd_bittiming_const;</div><div class='ctx'> 		can-&gt;can.do_set_bittiming = kvaser_pciefd_set_nominal_bittiming;</div><div class='del'>-		can-&gt;can.do_set_data_bittiming = kvaser_pciefd_set_data_bittiming;</div><div class='add'>+		can-&gt;can.fd.do_set_data_bittiming = kvaser_pciefd_set_data_bittiming;</div><div class='ctx'> 		can-&gt;can.do_set_mode = kvaser_pciefd_set_mode;</div><div class='ctx'> 		can-&gt;can.do_get_berr_counter = kvaser_pciefd_get_berr_counter;</div><div class='ctx'> 		can-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY |</div><div class='ctx'> 					      CAN_CTRLMODE_FD |</div><div class='ctx'> 					      CAN_CTRLMODE_FD_NON_ISO |</div><div class='del'>-					      CAN_CTRLMODE_CC_LEN8_DLC;</div><div class='add'>+					      CAN_CTRLMODE_CC_LEN8_DLC |</div><div class='add'>+					      CAN_CTRLMODE_BERR_REPORTING;</div><div class='ctx'> </div><div class='ctx'> 		status = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_STAT_REG);</div><div class='ctx'> 		if (!(status &amp; KVASER_PCIEFD_KCAN_STAT_FD)) {</div><div class='hunk'>@@ -1022,6 +1014,11 @@ static int kvaser_pciefd_setup_can_ctrls(struct kvaser_pciefd *pcie)</div><div class='ctx'> </div><div class='ctx'> 		pcie-&gt;can[i] = can;</div><div class='ctx'> 		kvaser_pciefd_pwm_start(can);</div><div class='add'>+		ret = kvaser_pciefd_devlink_port_register(can);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(&amp;pcie-&gt;pci-&gt;dev, "Failed to register devlink port\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1154,14 +1151,12 @@ static int kvaser_pciefd_setup_board(struct kvaser_pciefd *pcie)</div><div class='ctx'> 	u32 version, srb_status, build;</div><div class='ctx'> </div><div class='ctx'> 	version = ioread32(KVASER_PCIEFD_SYSID_ADDR(pcie) + KVASER_PCIEFD_SYSID_VERSION_REG);</div><div class='add'>+	build = ioread32(KVASER_PCIEFD_SYSID_ADDR(pcie) + KVASER_PCIEFD_SYSID_BUILD_REG);</div><div class='ctx'> 	pcie-&gt;nr_channels = min(KVASER_PCIEFD_MAX_CAN_CHANNELS,</div><div class='ctx'> 				FIELD_GET(KVASER_PCIEFD_SYSID_VERSION_NR_CHAN_MASK, version));</div><div class='del'>-</div><div class='del'>-	build = ioread32(KVASER_PCIEFD_SYSID_ADDR(pcie) + KVASER_PCIEFD_SYSID_BUILD_REG);</div><div class='del'>-	dev_dbg(&amp;pcie-&gt;pci-&gt;dev, "Version %lu.%lu.%lu\n",</div><div class='del'>-		FIELD_GET(KVASER_PCIEFD_SYSID_VERSION_MAJOR_MASK, version),</div><div class='del'>-		FIELD_GET(KVASER_PCIEFD_SYSID_VERSION_MINOR_MASK, version),</div><div class='del'>-		FIELD_GET(KVASER_PCIEFD_SYSID_BUILD_SEQ_MASK, build));</div><div class='add'>+	pcie-&gt;fw_version.major = FIELD_GET(KVASER_PCIEFD_SYSID_VERSION_MAJOR_MASK, version);</div><div class='add'>+	pcie-&gt;fw_version.minor = FIELD_GET(KVASER_PCIEFD_SYSID_VERSION_MINOR_MASK, version);</div><div class='add'>+	pcie-&gt;fw_version.build = FIELD_GET(KVASER_PCIEFD_SYSID_BUILD_SEQ_MASK, build);</div><div class='ctx'> </div><div class='ctx'> 	srb_status = ioread32(KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_STAT_REG);</div><div class='ctx'> 	if (!(srb_status &amp; KVASER_PCIEFD_SRB_STAT_DMA)) {</div><div class='hunk'>@@ -1200,7 +1195,7 @@ static int kvaser_pciefd_handle_data_packet(struct kvaser_pciefd *pcie,</div><div class='ctx'> 		skb = alloc_canfd_skb(priv-&gt;dev, &amp;cf);</div><div class='ctx'> 		if (!skb) {</div><div class='ctx'> 			priv-&gt;dev-&gt;stats.rx_dropped++;</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		cf-&gt;len = can_fd_dlc2len(dlc);</div><div class='hunk'>@@ -1212,7 +1207,7 @@ static int kvaser_pciefd_handle_data_packet(struct kvaser_pciefd *pcie,</div><div class='ctx'> 		skb = alloc_can_skb(priv-&gt;dev, (struct can_frame **)&amp;cf);</div><div class='ctx'> 		if (!skb) {</div><div class='ctx'> 			priv-&gt;dev-&gt;stats.rx_dropped++;</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		can_frame_set_cc_len((struct can_frame *)cf, dlc, priv-&gt;ctrlmode);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1230,15 +1225,21 @@ static int kvaser_pciefd_handle_data_packet(struct kvaser_pciefd *pcie,</div><div class='ctx'> 	priv-&gt;dev-&gt;stats.rx_packets++;</div><div class='ctx'> 	kvaser_pciefd_set_skb_timestamp(pcie, skb, p-&gt;timestamp);</div><div class='ctx'> </div><div class='del'>-	return netif_rx(skb);</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvaser_pciefd_change_state(struct kvaser_pciefd_can *can,</div><div class='add'>+				       const struct can_berr_counter *bec,</div><div class='ctx'> 				       struct can_frame *cf,</div><div class='ctx'> 				       enum can_state new_state,</div><div class='ctx'> 				       enum can_state tx_state,</div><div class='ctx'> 				       enum can_state rx_state)</div><div class='ctx'> {</div><div class='add'>+	enum can_state old_state;</div><div class='add'>+</div><div class='add'>+	old_state = can-&gt;can.state;</div><div class='ctx'> 	can_change_state(can-&gt;can.dev, cf, tx_state, rx_state);</div><div class='ctx'> </div><div class='ctx'> 	if (new_state == CAN_STATE_BUS_OFF) {</div><div class='hunk'>@@ -1254,6 +1255,18 @@ static void kvaser_pciefd_change_state(struct kvaser_pciefd_can *can,</div><div class='ctx'> 			can_bus_off(ndev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	if (old_state == CAN_STATE_BUS_OFF &amp;&amp;</div><div class='add'>+	    new_state == CAN_STATE_ERROR_ACTIVE &amp;&amp;</div><div class='add'>+	    can-&gt;can.restart_ms) {</div><div class='add'>+		can-&gt;can.can_stats.restarts++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='add'>+	}</div><div class='add'>+	if (cf &amp;&amp; new_state != CAN_STATE_BUS_OFF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec-&gt;txerr;</div><div class='add'>+		cf-&gt;data[7] = bec-&gt;rxerr;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvaser_pciefd_packet_to_state(struct kvaser_pciefd_rx_packet *p,</div><div class='hunk'>@@ -1288,7 +1301,7 @@ static int kvaser_pciefd_rx_error_frame(struct kvaser_pciefd_can *can,</div><div class='ctx'> 	struct can_berr_counter bec;</div><div class='ctx'> 	enum can_state old_state, new_state, tx_state, rx_state;</div><div class='ctx'> 	struct net_device *ndev = can-&gt;can.dev;</div><div class='del'>-	struct sk_buff *skb;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='ctx'> 	struct can_frame *cf = NULL;</div><div class='ctx'> </div><div class='ctx'> 	old_state = can-&gt;can.state;</div><div class='hunk'>@@ -1297,16 +1310,10 @@ static int kvaser_pciefd_rx_error_frame(struct kvaser_pciefd_can *can,</div><div class='ctx'> 	bec.rxerr = FIELD_GET(KVASER_PCIEFD_SPACK_RXERR_MASK, p-&gt;header[0]);</div><div class='ctx'> </div><div class='ctx'> 	kvaser_pciefd_packet_to_state(p, &amp;bec, &amp;new_state, &amp;tx_state, &amp;rx_state);</div><div class='del'>-	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+	if (can-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='ctx'> 	if (new_state != old_state) {</div><div class='del'>-		kvaser_pciefd_change_state(can, cf, new_state, tx_state, rx_state);</div><div class='del'>-		if (old_state == CAN_STATE_BUS_OFF &amp;&amp;</div><div class='del'>-		    new_state == CAN_STATE_ERROR_ACTIVE &amp;&amp;</div><div class='del'>-		    can-&gt;can.restart_ms) {</div><div class='del'>-			can-&gt;can.can_stats.restarts++;</div><div class='del'>-			if (skb)</div><div class='del'>-				cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='del'>-		}</div><div class='add'>+		kvaser_pciefd_change_state(can, &amp;bec, cf, new_state, tx_state, rx_state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	can-&gt;err_rep_cnt++;</div><div class='hunk'>@@ -1319,18 +1326,19 @@ static int kvaser_pciefd_rx_error_frame(struct kvaser_pciefd_can *can,</div><div class='ctx'> 	can-&gt;bec.txerr = bec.txerr;</div><div class='ctx'> 	can-&gt;bec.rxerr = bec.rxerr;</div><div class='ctx'> </div><div class='del'>-	if (!skb) {</div><div class='del'>-		ndev-&gt;stats.rx_dropped++;</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (can-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) {</div><div class='add'>+		if (!skb) {</div><div class='add'>+			netdev_warn(ndev, "No memory left for err_skb\n");</div><div class='add'>+			ndev-&gt;stats.rx_dropped++;</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+		kvaser_pciefd_set_skb_timestamp(can-&gt;kv_pcie, skb, p-&gt;timestamp);</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+		netif_rx(skb);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	kvaser_pciefd_set_skb_timestamp(can-&gt;kv_pcie, skb, p-&gt;timestamp);</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_CNT;</div><div class='del'>-	cf-&gt;data[6] = bec.txerr;</div><div class='del'>-	cf-&gt;data[7] = bec.rxerr;</div><div class='del'>-</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1359,6 +1367,7 @@ static int kvaser_pciefd_handle_status_resp(struct kvaser_pciefd_can *can,</div><div class='ctx'> {</div><div class='ctx'> 	struct can_berr_counter bec;</div><div class='ctx'> 	enum can_state old_state, new_state, tx_state, rx_state;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	old_state = can-&gt;can.state;</div><div class='ctx'> </div><div class='hunk'>@@ -1372,25 +1381,15 @@ static int kvaser_pciefd_handle_status_resp(struct kvaser_pciefd_can *can,</div><div class='ctx'> 		struct can_frame *cf;</div><div class='ctx'> </div><div class='ctx'> 		skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='del'>-		if (!skb) {</div><div class='add'>+		kvaser_pciefd_change_state(can, &amp;bec, cf, new_state, tx_state, rx_state);</div><div class='add'>+		if (skb) {</div><div class='add'>+			kvaser_pciefd_set_skb_timestamp(can-&gt;kv_pcie, skb, p-&gt;timestamp);</div><div class='add'>+			netif_rx(skb);</div><div class='add'>+		} else {</div><div class='ctx'> 			ndev-&gt;stats.rx_dropped++;</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+			netdev_warn(ndev, "No memory left for err_skb\n");</div><div class='add'>+			ret = -ENOMEM;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		kvaser_pciefd_change_state(can, cf, new_state, tx_state, rx_state);</div><div class='del'>-		if (old_state == CAN_STATE_BUS_OFF &amp;&amp;</div><div class='del'>-		    new_state == CAN_STATE_ERROR_ACTIVE &amp;&amp;</div><div class='del'>-		    can-&gt;can.restart_ms) {</div><div class='del'>-			can-&gt;can.can_stats.restarts++;</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		kvaser_pciefd_set_skb_timestamp(can-&gt;kv_pcie, skb, p-&gt;timestamp);</div><div class='del'>-</div><div class='del'>-		cf-&gt;data[6] = bec.txerr;</div><div class='del'>-		cf-&gt;data[7] = bec.rxerr;</div><div class='del'>-</div><div class='del'>-		netif_rx(skb);</div><div class='ctx'> 	}</div><div class='ctx'> 	can-&gt;bec.txerr = bec.txerr;</div><div class='ctx'> 	can-&gt;bec.rxerr = bec.rxerr;</div><div class='hunk'>@@ -1398,7 +1397,7 @@ static int kvaser_pciefd_handle_status_resp(struct kvaser_pciefd_can *can,</div><div class='ctx'> 	if (bec.txerr || bec.rxerr)</div><div class='ctx'> 		mod_timer(&amp;can-&gt;bec_poll_timer, KVASER_PCIEFD_BEC_POLL_FREQ);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int kvaser_pciefd_handle_status_packet(struct kvaser_pciefd *pcie,</div><div class='hunk'>@@ -1507,19 +1506,21 @@ static int kvaser_pciefd_handle_ack_packet(struct kvaser_pciefd *pcie,</div><div class='ctx'> 		netdev_dbg(can-&gt;can.dev, "Packet was flushed\n");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		int echo_idx = FIELD_GET(KVASER_PCIEFD_PACKET_SEQ_MASK, p-&gt;header[0]);</div><div class='del'>-		int len;</div><div class='del'>-		u8 count;</div><div class='add'>+		unsigned int len, frame_len = 0;</div><div class='ctx'> 		struct sk_buff *skb;</div><div class='ctx'> </div><div class='add'>+		if (echo_idx != (can-&gt;ack_idx &amp; (can-&gt;can.echo_skb_max - 1)))</div><div class='add'>+			return 0;</div><div class='ctx'> 		skb = can-&gt;can.echo_skb[echo_idx];</div><div class='del'>-		if (skb)</div><div class='del'>-			kvaser_pciefd_set_skb_timestamp(pcie, skb, p-&gt;timestamp);</div><div class='del'>-		len = can_get_echo_skb(can-&gt;can.dev, echo_idx, NULL);</div><div class='del'>-		count = FIELD_GET(KVASER_PCIEFD_KCAN_TX_NR_PACKETS_CURRENT_MASK,</div><div class='del'>-				  ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_TX_NR_PACKETS_REG));</div><div class='add'>+		if (!skb)</div><div class='add'>+			return 0;</div><div class='add'>+		kvaser_pciefd_set_skb_timestamp(pcie, skb, p-&gt;timestamp);</div><div class='add'>+		len = can_get_echo_skb(can-&gt;can.dev, echo_idx, &amp;frame_len);</div><div class='ctx'> </div><div class='del'>-		if (count &lt; can-&gt;can.echo_skb_max &amp;&amp; netif_queue_stopped(can-&gt;can.dev))</div><div class='del'>-			netif_wake_queue(can-&gt;can.dev);</div><div class='add'>+		/* Pairs with barrier in kvaser_pciefd_start_xmit() */</div><div class='add'>+		smp_store_release(&amp;can-&gt;ack_idx, can-&gt;ack_idx + 1);</div><div class='add'>+		can-&gt;completed_tx_pkts++;</div><div class='add'>+		can-&gt;completed_tx_bytes += frame_len;</div><div class='ctx'> </div><div class='ctx'> 		if (!one_shot_fail) {</div><div class='ctx'> 			can-&gt;can.dev-&gt;stats.tx_bytes += len;</div><div class='hunk'>@@ -1635,32 +1636,51 @@ static int kvaser_pciefd_read_buffer(struct kvaser_pciefd *pcie, int dma_buf)</div><div class='ctx'> {</div><div class='ctx'> 	int pos = 0;</div><div class='ctx'> 	int res = 0;</div><div class='add'>+	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		res = kvaser_pciefd_read_packet(pcie, &amp;pos, dma_buf);</div><div class='ctx'> 	} while (!res &amp;&amp; pos &gt; 0 &amp;&amp; pos &lt; KVASER_PCIEFD_DMA_SIZE);</div><div class='ctx'> </div><div class='add'>+	/* Report ACKs in this buffer to BQL en masse for correct periods */</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; ++i) {</div><div class='add'>+		struct kvaser_pciefd_can *can = pcie-&gt;can[i];</div><div class='add'>+</div><div class='add'>+		if (!can-&gt;completed_tx_pkts)</div><div class='add'>+			continue;</div><div class='add'>+		netif_subqueue_completed_wake(can-&gt;can.dev, 0,</div><div class='add'>+					      can-&gt;completed_tx_pkts,</div><div class='add'>+					      can-&gt;completed_tx_bytes,</div><div class='add'>+					      kvaser_pciefd_tx_avail(can), 1);</div><div class='add'>+		can-&gt;completed_tx_pkts = 0;</div><div class='add'>+		can-&gt;completed_tx_bytes = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 kvaser_pciefd_receive_irq(struct kvaser_pciefd *pcie)</div><div class='add'>+static void kvaser_pciefd_receive_irq(struct kvaser_pciefd *pcie)</div><div class='ctx'> {</div><div class='add'>+	void __iomem *srb_cmd_reg = KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG;</div><div class='ctx'> 	u32 irq = ioread32(KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG);</div><div class='ctx'> </div><div class='del'>-	if (irq &amp; KVASER_PCIEFD_SRB_IRQ_DPD0)</div><div class='add'>+	iowrite32(irq, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG);</div><div class='add'>+</div><div class='add'>+	if (irq &amp; KVASER_PCIEFD_SRB_IRQ_DPD0) {</div><div class='ctx'> 		kvaser_pciefd_read_buffer(pcie, 0);</div><div class='add'>+		iowrite32(KVASER_PCIEFD_SRB_CMD_RDB0, srb_cmd_reg); /* Rearm buffer */</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (irq &amp; KVASER_PCIEFD_SRB_IRQ_DPD1)</div><div class='add'>+	if (irq &amp; KVASER_PCIEFD_SRB_IRQ_DPD1) {</div><div class='ctx'> 		kvaser_pciefd_read_buffer(pcie, 1);</div><div class='add'>+		iowrite32(KVASER_PCIEFD_SRB_CMD_RDB1, srb_cmd_reg); /* Rearm buffer */</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(irq &amp; KVASER_PCIEFD_SRB_IRQ_DOF0 ||</div><div class='ctx'> 		     irq &amp; KVASER_PCIEFD_SRB_IRQ_DOF1 ||</div><div class='ctx'> 		     irq &amp; KVASER_PCIEFD_SRB_IRQ_DUF0 ||</div><div class='ctx'> 		     irq &amp; KVASER_PCIEFD_SRB_IRQ_DUF1))</div><div class='ctx'> 		dev_err(&amp;pcie-&gt;pci-&gt;dev, "DMA IRQ error 0x%08X\n", irq);</div><div class='del'>-</div><div class='del'>-	iowrite32(irq, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG);</div><div class='del'>-	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvaser_pciefd_transmit_irq(struct kvaser_pciefd_can *can)</div><div class='hunk'>@@ -1688,29 +1708,22 @@ static irqreturn_t kvaser_pciefd_irq_handler(int irq, void *dev)</div><div class='ctx'> 	struct kvaser_pciefd *pcie = (struct kvaser_pciefd *)dev;</div><div class='ctx'> 	const struct kvaser_pciefd_irq_mask *irq_mask = pcie-&gt;driver_data-&gt;irq_mask;</div><div class='ctx'> 	u32 pci_irq = ioread32(KVASER_PCIEFD_PCI_IRQ_ADDR(pcie));</div><div class='del'>-	u32 srb_irq = 0;</div><div class='del'>-	u32 srb_release = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!(pci_irq &amp; irq_mask-&gt;all))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='add'>+	iowrite32(0, KVASER_PCIEFD_PCI_IEN_ADDR(pcie));</div><div class='add'>+</div><div class='ctx'> 	if (pci_irq &amp; irq_mask-&gt;kcan_rx0)</div><div class='del'>-		srb_irq = kvaser_pciefd_receive_irq(pcie);</div><div class='add'>+		kvaser_pciefd_receive_irq(pcie);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pcie-&gt;nr_channels; i++) {</div><div class='ctx'> 		if (pci_irq &amp; irq_mask-&gt;kcan_tx[i])</div><div class='ctx'> 			kvaser_pciefd_transmit_irq(pcie-&gt;can[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (srb_irq &amp; KVASER_PCIEFD_SRB_IRQ_DPD0)</div><div class='del'>-		srb_release |= KVASER_PCIEFD_SRB_CMD_RDB0;</div><div class='del'>-</div><div class='del'>-	if (srb_irq &amp; KVASER_PCIEFD_SRB_IRQ_DPD1)</div><div class='del'>-		srb_release |= KVASER_PCIEFD_SRB_CMD_RDB1;</div><div class='del'>-</div><div class='del'>-	if (srb_release)</div><div class='del'>-		iowrite32(srb_release, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG);</div><div class='add'>+	iowrite32(irq_mask-&gt;all, KVASER_PCIEFD_PCI_IEN_ADDR(pcie));</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -1725,23 +1738,36 @@ static void kvaser_pciefd_teardown_can_ctrls(struct kvaser_pciefd *pcie)</div><div class='ctx'> 		if (can) {</div><div class='ctx'> 			iowrite32(0, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='ctx'> 			kvaser_pciefd_pwm_stop(can);</div><div class='add'>+			kvaser_pciefd_devlink_port_unregister(can);</div><div class='ctx'> 			free_candev(can-&gt;can.dev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvaser_pciefd_disable_irq_srcs(struct kvaser_pciefd *pcie)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	/* Masking PCI_IRQ is insufficient as running ISR will unmask it */</div><div class='add'>+	iowrite32(0, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IEN_REG);</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; ++i)</div><div class='add'>+		iowrite32(0, pcie-&gt;can[i]-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int kvaser_pciefd_probe(struct pci_dev *pdev,</div><div class='ctx'> 			       const struct pci_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct kvaser_pciefd *pcie;</div><div class='ctx'> 	const struct kvaser_pciefd_irq_mask *irq_mask;</div><div class='del'>-	void __iomem *irq_en_base;</div><div class='ctx'> </div><div class='del'>-	pcie = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*pcie), GFP_KERNEL);</div><div class='del'>-	if (!pcie)</div><div class='add'>+	devlink = devlink_alloc(&amp;kvaser_pciefd_devlink_ops, sizeof(*pcie), dev);</div><div class='add'>+	if (!devlink)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	pcie = devlink_priv(devlink);</div><div class='ctx'> 	pci_set_drvdata(pdev, pcie);</div><div class='ctx'> 	pcie-&gt;pci = pdev;</div><div class='ctx'> 	pcie-&gt;driver_data = (const struct kvaser_pciefd_driver_data *)id-&gt;driver_data;</div><div class='hunk'>@@ -1749,7 +1775,7 @@ static int kvaser_pciefd_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	ret = pci_enable_device(pdev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto err_free_devlink;</div><div class='ctx'> </div><div class='ctx'> 	ret = pci_request_regions(pdev, KVASER_PCIEFD_DRV_NAME);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -1777,7 +1803,7 @@ static int kvaser_pciefd_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	ret = pci_alloc_irq_vectors(pcie-&gt;pci, 1, 1, PCI_IRQ_INTX | PCI_IRQ_MSI);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		dev_err(&amp;pcie-&gt;pci-&gt;dev, "Failed to allocate IRQ vectors.\n");</div><div class='add'>+		dev_err(dev, "Failed to allocate IRQ vectors.\n");</div><div class='ctx'> 		goto err_teardown_can_ctrls;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1790,7 +1816,7 @@ static int kvaser_pciefd_probe(struct pci_dev *pdev,</div><div class='ctx'> 	ret = request_irq(pcie-&gt;pci-&gt;irq, kvaser_pciefd_irq_handler,</div><div class='ctx'> 			  IRQF_SHARED, KVASER_PCIEFD_DRV_NAME, pcie);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_err(&amp;pcie-&gt;pci-&gt;dev, "Failed to request IRQ %d\n", pcie-&gt;pci-&gt;irq);</div><div class='add'>+		dev_err(dev, "Failed to request IRQ %d\n", pcie-&gt;pci-&gt;irq);</div><div class='ctx'> 		goto err_pci_free_irq_vectors;</div><div class='ctx'> 	}</div><div class='ctx'> 	iowrite32(KVASER_PCIEFD_SRB_IRQ_DPD0 | KVASER_PCIEFD_SRB_IRQ_DPD1,</div><div class='hunk'>@@ -1802,8 +1828,7 @@ static int kvaser_pciefd_probe(struct pci_dev *pdev,</div><div class='ctx'> 		  KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IEN_REG);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable PCI interrupts */</div><div class='del'>-	irq_en_base = KVASER_PCIEFD_PCI_IEN_ADDR(pcie);</div><div class='del'>-	iowrite32(irq_mask-&gt;all, irq_en_base);</div><div class='add'>+	iowrite32(irq_mask-&gt;all, KVASER_PCIEFD_PCI_IEN_ADDR(pcie));</div><div class='ctx'> 	/* Ready the DMA buffers */</div><div class='ctx'> 	iowrite32(KVASER_PCIEFD_SRB_CMD_RDB0,</div><div class='ctx'> 		  KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG);</div><div class='hunk'>@@ -1814,11 +1839,12 @@ static int kvaser_pciefd_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_free_irq;</div><div class='ctx'> </div><div class='add'>+	devlink_register(devlink);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_free_irq:</div><div class='del'>-	/* Disable PCI interrupts */</div><div class='del'>-	iowrite32(0, irq_en_base);</div><div class='add'>+	kvaser_pciefd_disable_irq_srcs(pcie);</div><div class='ctx'> 	free_irq(pcie-&gt;pci-&gt;irq, pcie);</div><div class='ctx'> </div><div class='ctx'> err_pci_free_irq_vectors:</div><div class='hunk'>@@ -1838,41 +1864,38 @@ err_release_regions:</div><div class='ctx'> err_disable_pci:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_pciefd_remove_all_ctrls(struct kvaser_pciefd *pcie)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='add'>+err_free_devlink:</div><div class='add'>+	devlink_free(devlink);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; pcie-&gt;nr_channels; i++) {</div><div class='del'>-		struct kvaser_pciefd_can *can = pcie-&gt;can[i];</div><div class='del'>-</div><div class='del'>-		if (can) {</div><div class='del'>-			iowrite32(0, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='del'>-			unregister_candev(can-&gt;can.dev);</div><div class='del'>-			del_timer(&amp;can-&gt;bec_poll_timer);</div><div class='del'>-			kvaser_pciefd_pwm_stop(can);</div><div class='del'>-			free_candev(can-&gt;can.dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvaser_pciefd_remove(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvaser_pciefd *pcie = pci_get_drvdata(pdev);</div><div class='add'>+	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	kvaser_pciefd_remove_all_ctrls(pcie);</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; ++i) {</div><div class='add'>+		struct kvaser_pciefd_can *can = pcie-&gt;can[i];</div><div class='ctx'> </div><div class='del'>-	/* Disable interrupts */</div><div class='del'>-	iowrite32(0, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CTRL_REG);</div><div class='del'>-	iowrite32(0, KVASER_PCIEFD_PCI_IEN_ADDR(pcie));</div><div class='add'>+		unregister_candev(can-&gt;can.dev);</div><div class='add'>+		timer_delete(&amp;can-&gt;bec_poll_timer);</div><div class='add'>+		kvaser_pciefd_pwm_stop(can);</div><div class='add'>+		kvaser_pciefd_devlink_port_unregister(can);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	kvaser_pciefd_disable_irq_srcs(pcie);</div><div class='ctx'> 	free_irq(pcie-&gt;pci-&gt;irq, pcie);</div><div class='ctx'> 	pci_free_irq_vectors(pcie-&gt;pci);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; ++i)</div><div class='add'>+		free_candev(pcie-&gt;can[i]-&gt;can.dev);</div><div class='add'>+</div><div class='add'>+	devlink_unregister(priv_to_devlink(pcie));</div><div class='ctx'> 	pci_iounmap(pdev, pcie-&gt;reg_base);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='add'>+	devlink_free(priv_to_devlink(pcie));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver kvaser_pciefd = {</div><div class='head'>diff --git a/drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c b/drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c<br/>new file mode 100644<br/>index 000000000000..1d61a8b0eeba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+/* kvaser_pciefd devlink functions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#include "kvaser_pciefd.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_devlink_info_get(struct devlink *devlink,</div><div class='add'>+					  struct devlink_info_req *req,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd *pcie = devlink_priv(devlink);</div><div class='add'>+	char buf[] = "xxx.xxx.xxxxx";</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pcie-&gt;fw_version.major) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%u.%u.%u",</div><div class='add'>+			 pcie-&gt;fw_version.major,</div><div class='add'>+			 pcie-&gt;fw_version.minor,</div><div class='add'>+			 pcie-&gt;fw_version.build);</div><div class='add'>+		ret = devlink_info_version_running_put(req,</div><div class='add'>+						       DEVLINK_INFO_VERSION_GENERIC_FW,</div><div class='add'>+						       buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct devlink_ops kvaser_pciefd_devlink_ops = {</div><div class='add'>+	.info_get = kvaser_pciefd_devlink_info_get,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int kvaser_pciefd_devlink_port_register(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct devlink_port_attrs attrs = {</div><div class='add'>+		.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL,</div><div class='add'>+		.phys.port_number = can-&gt;can.dev-&gt;dev_port,</div><div class='add'>+	};</div><div class='add'>+	devlink_port_attrs_set(&amp;can-&gt;devlink_port, &amp;attrs);</div><div class='add'>+</div><div class='add'>+	ret = devlink_port_register(priv_to_devlink(can-&gt;kv_pcie),</div><div class='add'>+				    &amp;can-&gt;devlink_port, can-&gt;can.dev-&gt;dev_port);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEVLINK_PORT(can-&gt;can.dev, &amp;can-&gt;devlink_port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvaser_pciefd_devlink_port_unregister(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	devlink_port_unregister(&amp;can-&gt;devlink_port);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c<br/>index a978b960f1f1..eb856547ae7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/m_can.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/m_can.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> // CAN bus driver for Bosch M_CAN controller</div><div class='ctx'> // Copyright (C) 2014 Freescale Semiconductor, Inc.</div><div class='del'>-//      Dong Aisheng &lt;b29396@freescale.com&gt;</div><div class='add'>+//      Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='ctx'> // Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/</div><div class='ctx'> </div><div class='ctx'> /* Bosch M_CAN user manual can be obtained from:</div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "m_can.h"</div><div class='ctx'> </div><div class='hunk'>@@ -386,8 +387,8 @@ static int m_can_cccr_update_bits(struct m_can_classdev *cdev, u32 mask, u32 val</div><div class='ctx'> 	size_t tries = 10;</div><div class='ctx'> </div><div class='ctx'> 	if (!(mask &amp; CCCR_INIT) &amp;&amp; !(val_before &amp; CCCR_INIT)) {</div><div class='del'>-		dev_err(cdev-&gt;dev,</div><div class='del'>-			"refusing to configure device when in normal mode\n");</div><div class='add'>+		netdev_err(cdev-&gt;net,</div><div class='add'>+			   "refusing to configure device when in normal mode\n");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -451,7 +452,7 @@ static void m_can_interrupt_enable(struct m_can_classdev *cdev, u32 interrupts)</div><div class='ctx'> {</div><div class='ctx'> 	if (cdev-&gt;active_interrupts == interrupts)</div><div class='ctx'> 		return;</div><div class='del'>-	cdev-&gt;ops-&gt;write_reg(cdev, M_CAN_IE, interrupts);</div><div class='add'>+	m_can_write(cdev, M_CAN_IE, interrupts);</div><div class='ctx'> 	cdev-&gt;active_interrupts = interrupts;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -469,7 +470,7 @@ static void m_can_coalescing_disable(struct m_can_classdev *cdev)</div><div class='ctx'> static inline void m_can_enable_all_interrupts(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='ctx'> 	if (!cdev-&gt;net-&gt;irq) {</div><div class='del'>-		dev_dbg(cdev-&gt;dev, "Start hrtimer\n");</div><div class='add'>+		netdev_dbg(cdev-&gt;net, "Start hrtimer\n");</div><div class='ctx'> 		hrtimer_start(&amp;cdev-&gt;hrtimer,</div><div class='ctx'> 			      ms_to_ktime(HRTIMER_POLL_INTERVAL_MS),</div><div class='ctx'> 			      HRTIMER_MODE_REL_PINNED);</div><div class='hunk'>@@ -485,7 +486,7 @@ static inline void m_can_disable_all_interrupts(struct m_can_classdev *cdev)</div><div class='ctx'> 	m_can_write(cdev, M_CAN_ILE, 0x0);</div><div class='ctx'> </div><div class='ctx'> 	if (!cdev-&gt;net-&gt;irq) {</div><div class='del'>-		dev_dbg(cdev-&gt;dev, "Stop hrtimer\n");</div><div class='add'>+		netdev_dbg(cdev-&gt;net, "Stop hrtimer\n");</div><div class='ctx'> 		hrtimer_try_to_cancel(&amp;cdev-&gt;hrtimer);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -665,7 +666,7 @@ static int m_can_handle_lost_msg(struct net_device *dev)</div><div class='ctx'> 	struct can_frame *frame;</div><div class='ctx'> 	u32 timestamp = 0;</div><div class='ctx'> </div><div class='del'>-	netdev_err(dev, "msg lost in rxf0\n");</div><div class='add'>+	netdev_dbg(dev, "msg lost in rxf0\n");</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;rx_errors++;</div><div class='ctx'> 	stats-&gt;rx_over_errors++;</div><div class='hunk'>@@ -695,47 +696,60 @@ static int m_can_handle_lec_err(struct net_device *dev,</div><div class='ctx'> 	u32 timestamp = 0;</div><div class='ctx'> </div><div class='ctx'> 	cdev-&gt;can.can_stats.bus_error++;</div><div class='del'>-	stats-&gt;rx_errors++;</div><div class='ctx'> </div><div class='ctx'> 	/* propagate the error condition to the CAN stack */</div><div class='ctx'> 	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* check for 'last error code' which tells us the</div><div class='ctx'> 	 * type of the last error to occur on the CAN bus</div><div class='ctx'> 	 */</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+	if (likely(skb))</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='ctx'> 	switch (lec_type) {</div><div class='ctx'> 	case LEC_STUFF_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "stuff error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_FORM_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "form error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_ACK_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "ack error\n");</div><div class='del'>-		cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_BIT1_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "bit1 error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_BIT0_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "bit0 error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_CRC_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "CRC error\n");</div><div class='del'>-		cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (cdev-&gt;is_peripheral)</div><div class='ctx'> 		timestamp = m_can_get_timestamp(cdev);</div><div class='ctx'> </div><div class='hunk'>@@ -777,6 +791,10 @@ static int m_can_get_berr_counter(const struct net_device *dev,</div><div class='ctx'> 	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	/* Avoid waking up the controller if the interface is down */</div><div class='add'>+	if (!(dev-&gt;flags &amp; IFF_UP))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	err = m_can_clk_start(cdev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -799,6 +817,9 @@ static int m_can_handle_state_change(struct net_device *dev,</div><div class='ctx'> 	u32 timestamp = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (new_state) {</div><div class='add'>+	case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+		cdev-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		break;</div><div class='ctx'> 	case CAN_STATE_ERROR_WARNING:</div><div class='ctx'> 		/* error warning state */</div><div class='ctx'> 		cdev-&gt;can.can_stats.error_warning++;</div><div class='hunk'>@@ -828,6 +849,12 @@ static int m_can_handle_state_change(struct net_device *dev,</div><div class='ctx'> 	__m_can_get_berr_counter(dev, &amp;bec);</div><div class='ctx'> </div><div class='ctx'> 	switch (new_state) {</div><div class='add'>+	case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[1] = CAN_ERR_CRTL_ACTIVE;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+		break;</div><div class='ctx'> 	case CAN_STATE_ERROR_WARNING:</div><div class='ctx'> 		/* error warning state */</div><div class='ctx'> 		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='hunk'>@@ -864,30 +891,33 @@ static int m_can_handle_state_change(struct net_device *dev,</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int m_can_handle_state_errors(struct net_device *dev, u32 psr)</div><div class='add'>+static enum can_state</div><div class='add'>+m_can_state_get_by_psr(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='del'>-	int work_done = 0;</div><div class='add'>+	u32 reg_psr;</div><div class='ctx'> </div><div class='del'>-	if (psr &amp; PSR_EW &amp;&amp; cdev-&gt;can.state != CAN_STATE_ERROR_WARNING) {</div><div class='del'>-		netdev_dbg(dev, "entered error warning state\n");</div><div class='del'>-		work_done += m_can_handle_state_change(dev,</div><div class='del'>-						       CAN_STATE_ERROR_WARNING);</div><div class='del'>-	}</div><div class='add'>+	reg_psr = m_can_read(cdev, M_CAN_PSR);</div><div class='ctx'> </div><div class='del'>-	if (psr &amp; PSR_EP &amp;&amp; cdev-&gt;can.state != CAN_STATE_ERROR_PASSIVE) {</div><div class='del'>-		netdev_dbg(dev, "entered error passive state\n");</div><div class='del'>-		work_done += m_can_handle_state_change(dev,</div><div class='del'>-						       CAN_STATE_ERROR_PASSIVE);</div><div class='del'>-	}</div><div class='add'>+	if (reg_psr &amp; PSR_BO)</div><div class='add'>+		return CAN_STATE_BUS_OFF;</div><div class='add'>+	if (reg_psr &amp; PSR_EP)</div><div class='add'>+		return CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	if (reg_psr &amp; PSR_EW)</div><div class='add'>+		return CAN_STATE_ERROR_WARNING;</div><div class='ctx'> </div><div class='del'>-	if (psr &amp; PSR_BO &amp;&amp; cdev-&gt;can.state != CAN_STATE_BUS_OFF) {</div><div class='del'>-		netdev_dbg(dev, "entered error bus off state\n");</div><div class='del'>-		work_done += m_can_handle_state_change(dev,</div><div class='del'>-						       CAN_STATE_BUS_OFF);</div><div class='del'>-	}</div><div class='add'>+	return CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return work_done;</div><div class='add'>+static int m_can_handle_state_errors(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	enum can_state new_state;</div><div class='add'>+</div><div class='add'>+	new_state = m_can_state_get_by_psr(cdev);</div><div class='add'>+	if (new_state == cdev-&gt;can.state)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return m_can_handle_state_change(dev, new_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void m_can_handle_other_err(struct net_device *dev, u32 irqstatus)</div><div class='hunk'>@@ -1018,8 +1048,7 @@ static int m_can_rx_handler(struct net_device *dev, int quota, u32 irqstatus)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (irqstatus &amp; IR_ERR_STATE)</div><div class='del'>-		work_done += m_can_handle_state_errors(dev,</div><div class='del'>-						       m_can_read(cdev, M_CAN_PSR));</div><div class='add'>+		work_done += m_can_handle_state_errors(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (irqstatus &amp; IR_ERR_BUS_30X)</div><div class='ctx'> 		work_done += m_can_handle_bus_errors(dev, irqstatus,</div><div class='hunk'>@@ -1207,20 +1236,32 @@ static void m_can_coalescing_update(struct m_can_classdev *cdev, u32 ir)</div><div class='ctx'> static int m_can_interrupt_handler(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = cdev-&gt;net;</div><div class='del'>-	u32 ir;</div><div class='add'>+	u32 ir = 0, ir_read;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (pm_runtime_suspended(cdev-&gt;dev))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='del'>-	ir = m_can_read(cdev, M_CAN_IR);</div><div class='add'>+	/* The m_can controller signals its interrupt status as a level, but</div><div class='add'>+	 * depending in the integration the CPU may interpret the signal as</div><div class='add'>+	 * edge-triggered (for example with m_can_pci). For these</div><div class='add'>+	 * edge-triggered integrations, we must observe that IR is 0 at least</div><div class='add'>+	 * once to be sure that the next interrupt will generate an edge.</div><div class='add'>+	 */</div><div class='add'>+	while ((ir_read = m_can_read(cdev, M_CAN_IR)) != 0) {</div><div class='add'>+		ir |= ir_read;</div><div class='add'>+</div><div class='add'>+		/* ACK all irqs */</div><div class='add'>+		m_can_write(cdev, M_CAN_IR, ir);</div><div class='add'>+</div><div class='add'>+		if (!cdev-&gt;irq_edge_triggered)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	m_can_coalescing_update(cdev, ir);</div><div class='ctx'> 	if (!ir)</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='del'>-	/* ACK all irqs */</div><div class='del'>-	m_can_write(cdev, M_CAN_IR, ir);</div><div class='del'>-</div><div class='ctx'> 	if (cdev-&gt;ops-&gt;clear_interrupts)</div><div class='ctx'> 		cdev-&gt;ops-&gt;clear_interrupts(cdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1343,11 +1384,32 @@ static const struct can_bittiming_const m_can_data_bittiming_const_31X = {</div><div class='ctx'> 	.brp_inc = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int m_can_init_ram(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	int end, i, start;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* initialize the entire Message RAM in use to avoid possible</div><div class='add'>+	 * ECC/parity checksum errors when reading an uninitialized buffer</div><div class='add'>+	 */</div><div class='add'>+	start = cdev-&gt;mcfg[MRAM_SIDF].off;</div><div class='add'>+	end = cdev-&gt;mcfg[MRAM_TXB].off +</div><div class='add'>+		cdev-&gt;mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;</div><div class='add'>+</div><div class='add'>+	for (i = start; i &lt; end; i += 4) {</div><div class='add'>+		err = m_can_fifo_write_no_off(cdev, i, 0x0);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int m_can_set_bittiming(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	const struct can_bittiming *bt = &amp;cdev-&gt;can.bittiming;</div><div class='del'>-	const struct can_bittiming *dbt = &amp;cdev-&gt;can.data_bittiming;</div><div class='add'>+	const struct can_bittiming *dbt = &amp;cdev-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	u16 brp, sjw, tseg1, tseg2;</div><div class='ctx'> 	u32 reg_btp;</div><div class='ctx'> </div><div class='hunk'>@@ -1428,7 +1490,7 @@ static int m_can_chip_config(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	err = m_can_init_ram(cdev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(cdev-&gt;dev, "Message RAM configuration failed\n");</div><div class='add'>+		netdev_err(dev, "Message RAM configuration failed\n");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1581,7 +1643,7 @@ static int m_can_start(struct net_device *dev)</div><div class='ctx'> 	netdev_queue_set_dql_min_limit(netdev_get_tx_queue(cdev-&gt;net, 0),</div><div class='ctx'> 				       cdev-&gt;tx_max_coalesced_frames);</div><div class='ctx'> </div><div class='del'>-	cdev-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	cdev-&gt;can.state = m_can_state_get_by_psr(cdev);</div><div class='ctx'> </div><div class='ctx'> 	m_can_enable_all_interrupts(cdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1658,7 +1720,7 @@ static int m_can_niso_supported(struct m_can_classdev *cdev)</div><div class='ctx'> 	/* Then clear the it again. */</div><div class='ctx'> 	ret = m_can_cccr_update_bits(cdev, CCCR_NISO, 0);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_err(cdev-&gt;dev, "failed to revert the NON-ISO bit in CCCR\n");</div><div class='add'>+		netdev_err(cdev-&gt;net, "failed to revert the NON-ISO bit in CCCR\n");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1677,11 +1739,19 @@ static int m_can_dev_setup(struct m_can_classdev *cdev)</div><div class='ctx'> 	m_can_version = m_can_check_core_release(cdev);</div><div class='ctx'> 	/* return if unsupported version */</div><div class='ctx'> 	if (!m_can_version) {</div><div class='del'>-		dev_err(cdev-&gt;dev, "Unsupported version number: %2d",</div><div class='del'>-			m_can_version);</div><div class='add'>+		netdev_err(cdev-&gt;net, "Unsupported version number: %2d",</div><div class='add'>+			   m_can_version);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Write the INIT bit, in case no hardware reset has happened before</div><div class='add'>+	 * the probe (for example, it was observed that the Intel Elkhart Lake</div><div class='add'>+	 * SoCs do not properly reset the CAN controllers on reboot)</div><div class='add'>+	 */</div><div class='add'>+	err = m_can_cccr_update_bits(cdev, CCCR_INIT, CCCR_INIT);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	if (!cdev-&gt;is_peripheral)</div><div class='ctx'> 		netif_napi_add(dev, &amp;cdev-&gt;napi, m_can_poll);</div><div class='ctx'> </div><div class='hunk'>@@ -1705,7 +1775,7 @@ static int m_can_dev_setup(struct m_can_classdev *cdev)</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 		cdev-&gt;can.bittiming_const = &amp;m_can_bittiming_const_30X;</div><div class='del'>-		cdev-&gt;can.data_bittiming_const = &amp;m_can_data_bittiming_const_30X;</div><div class='add'>+		cdev-&gt;can.fd.data_bittiming_const = &amp;m_can_data_bittiming_const_30X;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 31:</div><div class='ctx'> 		/* CAN_CTRLMODE_FD_NON_ISO is fixed with M_CAN IP v3.1.x */</div><div class='hunk'>@@ -1713,13 +1783,13 @@ static int m_can_dev_setup(struct m_can_classdev *cdev)</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 		cdev-&gt;can.bittiming_const = &amp;m_can_bittiming_const_31X;</div><div class='del'>-		cdev-&gt;can.data_bittiming_const = &amp;m_can_data_bittiming_const_31X;</div><div class='add'>+		cdev-&gt;can.fd.data_bittiming_const = &amp;m_can_data_bittiming_const_31X;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 32:</div><div class='ctx'> 	case 33:</div><div class='ctx'> 		/* Support both MCAN version v3.2.x and v3.3.0 */</div><div class='ctx'> 		cdev-&gt;can.bittiming_const = &amp;m_can_bittiming_const_31X;</div><div class='del'>-		cdev-&gt;can.data_bittiming_const = &amp;m_can_data_bittiming_const_31X;</div><div class='add'>+		cdev-&gt;can.fd.data_bittiming_const = &amp;m_can_data_bittiming_const_31X;</div><div class='ctx'> </div><div class='ctx'> 		niso = m_can_niso_supported(cdev);</div><div class='ctx'> 		if (niso &lt; 0)</div><div class='hunk'>@@ -1728,16 +1798,12 @@ static int m_can_dev_setup(struct m_can_classdev *cdev)</div><div class='ctx'> 			cdev-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD_NON_ISO;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		dev_err(cdev-&gt;dev, "Unsupported version number: %2d",</div><div class='del'>-			cdev-&gt;version);</div><div class='add'>+		netdev_err(cdev-&gt;net, "Unsupported version number: %2d",</div><div class='add'>+			   cdev-&gt;version);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Forcing standby mode should be redundant, as the chip should be in</div><div class='del'>-	 * standby after a reset. Write the INIT bit anyways, should the chip</div><div class='del'>-	 * be configured by previous stage.</div><div class='del'>-	 */</div><div class='del'>-	return m_can_cccr_update_bits(cdev, CCCR_INIT, CCCR_INIT);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void m_can_stop(struct net_device *dev)</div><div class='hunk'>@@ -1756,6 +1822,13 @@ static void m_can_stop(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* set the state as STOPPED */</div><div class='ctx'> 	cdev-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;ops-&gt;deinit) {</div><div class='add'>+		ret = cdev-&gt;ops-&gt;deinit(cdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			netdev_err(dev, "failed to deinitialize: %pe\n",</div><div class='add'>+				   ERR_PTR(ret));</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int m_can_close(struct net_device *dev)</div><div class='hunk'>@@ -1765,7 +1838,8 @@ static int m_can_close(struct net_device *dev)</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	m_can_stop(dev);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	if (dev-&gt;irq)</div><div class='add'>+		free_irq(dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	m_can_clean(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1779,6 +1853,7 @@ static int m_can_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	close_candev(dev);</div><div class='ctx'> </div><div class='add'>+	reset_control_assert(cdev-&gt;rst);</div><div class='ctx'> 	m_can_clk_stop(cdev);</div><div class='ctx'> 	phy_power_off(cdev-&gt;transceiver);</div><div class='ctx'> </div><div class='hunk'>@@ -1902,11 +1977,6 @@ out_fail:</div><div class='ctx'> </div><div class='ctx'> static void m_can_tx_submit(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='del'>-	if (cdev-&gt;version == 30)</div><div class='del'>-		return;</div><div class='del'>-	if (!cdev-&gt;is_peripheral)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	m_can_write(cdev, M_CAN_TXBAR, cdev-&gt;tx_peripheral_submit);</div><div class='ctx'> 	cdev-&gt;tx_peripheral_submit = 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1987,7 +2057,7 @@ static netdev_tx_t m_can_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum hrtimer_restart hrtimer_callback(struct hrtimer *timer)</div><div class='add'>+static enum hrtimer_restart m_can_polling_timer(struct hrtimer *timer)</div><div class='ctx'> {</div><div class='ctx'> 	struct m_can_classdev *cdev = container_of(timer, struct</div><div class='ctx'> 						   m_can_classdev, hrtimer);</div><div class='hunk'>@@ -2021,11 +2091,15 @@ static int m_can_open(struct net_device *dev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_phy_power_off;</div><div class='ctx'> </div><div class='add'>+	err = reset_control_deassert(cdev-&gt;rst);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit_disable_clks;</div><div class='add'>+</div><div class='ctx'> 	/* open the can device */</div><div class='ctx'> 	err = open_candev(dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netdev_err(dev, "failed to open can device\n");</div><div class='del'>-		goto exit_disable_clks;</div><div class='add'>+		goto out_reset_control_assert;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cdev-&gt;is_peripheral)</div><div class='hunk'>@@ -2081,6 +2155,8 @@ out_wq_fail:</div><div class='ctx'> 	else</div><div class='ctx'> 		napi_disable(&amp;cdev-&gt;napi);</div><div class='ctx'> 	close_candev(dev);</div><div class='add'>+out_reset_control_assert:</div><div class='add'>+	reset_control_assert(cdev-&gt;rst);</div><div class='ctx'> exit_disable_clks:</div><div class='ctx'> 	m_can_clk_stop(cdev);</div><div class='ctx'> out_phy_power_off:</div><div class='hunk'>@@ -2092,7 +2168,6 @@ static const struct net_device_ops m_can_netdev_ops = {</div><div class='ctx'> 	.ndo_open = m_can_open,</div><div class='ctx'> 	.ndo_stop = m_can_close,</div><div class='ctx'> 	.ndo_start_xmit = m_can_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int m_can_get_coalesce(struct net_device *dev,</div><div class='hunk'>@@ -2176,13 +2251,60 @@ static int m_can_set_coalesce(struct net_device *dev,</div><div class='ctx'> 	cdev-&gt;tx_coalesce_usecs_irq = ec-&gt;tx_coalesce_usecs_irq;</div><div class='ctx'> </div><div class='ctx'> 	if (cdev-&gt;rx_coalesce_usecs_irq)</div><div class='del'>-		cdev-&gt;irq_timer_wait =</div><div class='del'>-			ns_to_ktime(cdev-&gt;rx_coalesce_usecs_irq * NSEC_PER_USEC);</div><div class='add'>+		cdev-&gt;irq_timer_wait = us_to_ktime(cdev-&gt;rx_coalesce_usecs_irq);</div><div class='ctx'> 	else</div><div class='del'>-		cdev-&gt;irq_timer_wait =</div><div class='del'>-			ns_to_ktime(cdev-&gt;tx_coalesce_usecs_irq * NSEC_PER_USEC);</div><div class='add'>+		cdev-&gt;irq_timer_wait = us_to_ktime(cdev-&gt;tx_coalesce_usecs_irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	wol-&gt;supported = device_can_wakeup(cdev-&gt;dev) ? WAKE_PHY : 0;</div><div class='add'>+	wol-&gt;wolopts = device_may_wakeup(cdev-&gt;dev) ? WAKE_PHY : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m_can_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	bool wol_enable = !!(wol-&gt;wolopts &amp; WAKE_PHY);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (wol-&gt;wolopts &amp; ~WAKE_PHY)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (wol_enable == device_may_wakeup(cdev-&gt;dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = device_set_wakeup_enable(cdev-&gt;dev, wol_enable);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(cdev-&gt;net, "Failed to set wakeup enable %pE\n",</div><div class='add'>+			   ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR_OR_NULL(cdev-&gt;pinctrl_state_wakeup)) {</div><div class='add'>+		if (wol_enable)</div><div class='add'>+			ret = pinctrl_select_state(cdev-&gt;pinctrl, cdev-&gt;pinctrl_state_wakeup);</div><div class='add'>+		else</div><div class='add'>+			ret = pinctrl_pm_select_default_state(cdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(cdev-&gt;net, "Failed to select pinctrl state %pE\n",</div><div class='add'>+				   ERR_PTR(ret));</div><div class='add'>+			goto err_wakeup_enable;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_wakeup_enable:</div><div class='add'>+	/* Revert wakeup enable */</div><div class='add'>+	device_set_wakeup_enable(cdev-&gt;dev, !wol_enable);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops m_can_ethtool_ops_coalescing = {</div><div class='hunk'>@@ -2194,10 +2316,14 @@ static const struct ethtool_ops m_can_ethtool_ops_coalescing = {</div><div class='ctx'> 	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> 	.get_coalesce = m_can_get_coalesce,</div><div class='ctx'> 	.set_coalesce = m_can_set_coalesce,</div><div class='add'>+	.get_wol = m_can_get_wol,</div><div class='add'>+	.set_wol = m_can_set_wol,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops m_can_ethtool_ops = {</div><div class='ctx'> 	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+	.get_wol = m_can_get_wol,</div><div class='add'>+	.set_wol = m_can_set_wol,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int register_m_can_dev(struct m_can_classdev *cdev)</div><div class='hunk'>@@ -2221,8 +2347,8 @@ int m_can_check_mram_cfg(struct m_can_classdev *cdev, u32 mram_max_size)</div><div class='ctx'> 	total_size = cdev-&gt;mcfg[MRAM_TXB].off - cdev-&gt;mcfg[MRAM_SIDF].off +</div><div class='ctx'> 			cdev-&gt;mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;</div><div class='ctx'> 	if (total_size &gt; mram_max_size) {</div><div class='del'>-		dev_err(cdev-&gt;dev, "Total size of mram config(%u) exceeds mram(%u)\n",</div><div class='del'>-			total_size, mram_max_size);</div><div class='add'>+		netdev_err(cdev-&gt;net, "Total size of mram config(%u) exceeds mram(%u)\n",</div><div class='add'>+			   total_size, mram_max_size);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2257,39 +2383,17 @@ static void m_can_of_parse_mram(struct m_can_classdev *cdev,</div><div class='ctx'> 	cdev-&gt;mcfg[MRAM_TXB].num = mram_config_vals[7] &amp;</div><div class='ctx'> 		FIELD_MAX(TXBC_NDTB_MASK);</div><div class='ctx'> </div><div class='del'>-	dev_dbg(cdev-&gt;dev,</div><div class='del'>-		"sidf 0x%x %d xidf 0x%x %d rxf0 0x%x %d rxf1 0x%x %d rxb 0x%x %d txe 0x%x %d txb 0x%x %d\n",</div><div class='del'>-		cdev-&gt;mcfg[MRAM_SIDF].off, cdev-&gt;mcfg[MRAM_SIDF].num,</div><div class='del'>-		cdev-&gt;mcfg[MRAM_XIDF].off, cdev-&gt;mcfg[MRAM_XIDF].num,</div><div class='del'>-		cdev-&gt;mcfg[MRAM_RXF0].off, cdev-&gt;mcfg[MRAM_RXF0].num,</div><div class='del'>-		cdev-&gt;mcfg[MRAM_RXF1].off, cdev-&gt;mcfg[MRAM_RXF1].num,</div><div class='del'>-		cdev-&gt;mcfg[MRAM_RXB].off, cdev-&gt;mcfg[MRAM_RXB].num,</div><div class='del'>-		cdev-&gt;mcfg[MRAM_TXE].off, cdev-&gt;mcfg[MRAM_TXE].num,</div><div class='del'>-		cdev-&gt;mcfg[MRAM_TXB].off, cdev-&gt;mcfg[MRAM_TXB].num);</div><div class='add'>+	netdev_dbg(cdev-&gt;net,</div><div class='add'>+		   "sidf 0x%x %d xidf 0x%x %d rxf0 0x%x %d rxf1 0x%x %d rxb 0x%x %d txe 0x%x %d txb 0x%x %d\n",</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_SIDF].off, cdev-&gt;mcfg[MRAM_SIDF].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_XIDF].off, cdev-&gt;mcfg[MRAM_XIDF].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_RXF0].off, cdev-&gt;mcfg[MRAM_RXF0].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_RXF1].off, cdev-&gt;mcfg[MRAM_RXF1].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_RXB].off, cdev-&gt;mcfg[MRAM_RXB].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_TXE].off, cdev-&gt;mcfg[MRAM_TXE].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_TXB].off, cdev-&gt;mcfg[MRAM_TXB].num);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int m_can_init_ram(struct m_can_classdev *cdev)</div><div class='del'>-{</div><div class='del'>-	int end, i, start;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	/* initialize the entire Message RAM in use to avoid possible</div><div class='del'>-	 * ECC/parity checksum errors when reading an uninitialized buffer</div><div class='del'>-	 */</div><div class='del'>-	start = cdev-&gt;mcfg[MRAM_SIDF].off;</div><div class='del'>-	end = cdev-&gt;mcfg[MRAM_TXB].off +</div><div class='del'>-		cdev-&gt;mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;</div><div class='del'>-</div><div class='del'>-	for (i = start; i &lt; end; i += 4) {</div><div class='del'>-		err = m_can_fifo_write_no_off(cdev, i, 0x0);</div><div class='del'>-		if (err)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(m_can_init_ram);</div><div class='del'>-</div><div class='ctx'> int m_can_class_get_clocks(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -2298,7 +2402,7 @@ int m_can_class_get_clocks(struct m_can_classdev *cdev)</div><div class='ctx'> 	cdev-&gt;cclk = devm_clk_get(cdev-&gt;dev, "cclk");</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(cdev-&gt;hclk) || IS_ERR(cdev-&gt;cclk)) {</div><div class='del'>-		dev_err(cdev-&gt;dev, "no clock found\n");</div><div class='add'>+		netdev_err(cdev-&gt;net, "no clock found\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2306,6 +2410,42 @@ int m_can_class_get_clocks(struct m_can_classdev *cdev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(m_can_class_get_clocks);</div><div class='ctx'> </div><div class='add'>+static bool m_can_class_wakeup_pinctrl_enabled(struct m_can_classdev *class_dev)</div><div class='add'>+{</div><div class='add'>+	return device_may_wakeup(class_dev-&gt;dev) &amp;&amp; class_dev-&gt;pinctrl_state_wakeup;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m_can_class_parse_pinctrl(struct m_can_classdev *class_dev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = class_dev-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	class_dev-&gt;pinctrl = devm_pinctrl_get(dev);</div><div class='add'>+	if (IS_ERR(class_dev-&gt;pinctrl)) {</div><div class='add'>+		ret = PTR_ERR(class_dev-&gt;pinctrl);</div><div class='add'>+		class_dev-&gt;pinctrl = NULL;</div><div class='add'>+</div><div class='add'>+		if (ret == -ENODEV)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to get pinctrl\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	class_dev-&gt;pinctrl_state_wakeup =</div><div class='add'>+		pinctrl_lookup_state(class_dev-&gt;pinctrl, "wakeup");</div><div class='add'>+	if (IS_ERR(class_dev-&gt;pinctrl_state_wakeup)) {</div><div class='add'>+		ret = PTR_ERR(class_dev-&gt;pinctrl_state_wakeup);</div><div class='add'>+		class_dev-&gt;pinctrl_state_wakeup = NULL;</div><div class='add'>+</div><div class='add'>+		if (ret == -ENODEV)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to lookup pinctrl wakeup state\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct m_can_classdev *m_can_class_allocate_dev(struct device *dev,</div><div class='ctx'> 						int sizeof_priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -2321,9 +2461,12 @@ struct m_can_classdev *m_can_class_allocate_dev(struct device *dev,</div><div class='ctx'> 					     sizeof(mram_config_vals) / 4);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "Could not get Message RAM configuration.");</div><div class='del'>-		goto out;</div><div class='add'>+		return ERR_PTR(ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (dev-&gt;of_node &amp;&amp; of_property_read_bool(dev-&gt;of_node, "wakeup-source"))</div><div class='add'>+		device_set_wakeup_capable(dev, true);</div><div class='add'>+</div><div class='ctx'> 	/* Get TX FIFO size</div><div class='ctx'> 	 * Defines the total amount of echo buffers for loopback</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -2333,7 +2476,7 @@ struct m_can_classdev *m_can_class_allocate_dev(struct device *dev,</div><div class='ctx'> 	net_dev = alloc_candev(sizeof_priv, tx_fifo_size);</div><div class='ctx'> 	if (!net_dev) {</div><div class='ctx'> 		dev_err(dev, "Failed to allocate CAN device");</div><div class='del'>-		goto out;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	class_dev = netdev_priv(net_dev);</div><div class='hunk'>@@ -2342,8 +2485,17 @@ struct m_can_classdev *m_can_class_allocate_dev(struct device *dev,</div><div class='ctx'> 	SET_NETDEV_DEV(net_dev, dev);</div><div class='ctx'> </div><div class='ctx'> 	m_can_of_parse_mram(class_dev, mram_config_vals);</div><div class='del'>-out:</div><div class='add'>+	spin_lock_init(&amp;class_dev-&gt;tx_handling_spinlock);</div><div class='add'>+</div><div class='add'>+	ret = m_can_class_parse_pinctrl(class_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_candev;</div><div class='add'>+</div><div class='ctx'> 	return class_dev;</div><div class='add'>+</div><div class='add'>+err_free_candev:</div><div class='add'>+	free_candev(net_dev);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(m_can_class_allocate_dev);</div><div class='ctx'> </div><div class='hunk'>@@ -2364,31 +2516,37 @@ int m_can_class_register(struct m_can_classdev *cdev)</div><div class='ctx'> 			devm_kzalloc(cdev-&gt;dev,</div><div class='ctx'> 				     cdev-&gt;tx_fifo_size * sizeof(*cdev-&gt;tx_ops),</div><div class='ctx'> 				     GFP_KERNEL);</div><div class='del'>-		if (!cdev-&gt;tx_ops) {</div><div class='del'>-			dev_err(cdev-&gt;dev, "Failed to allocate tx_ops for workqueue\n");</div><div class='add'>+		if (!cdev-&gt;tx_ops)</div><div class='ctx'> 			return -ENOMEM;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	cdev-&gt;rst = devm_reset_control_get_optional_shared(cdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(cdev-&gt;rst))</div><div class='add'>+		return dev_err_probe(cdev-&gt;dev, PTR_ERR(cdev-&gt;rst),</div><div class='add'>+				     "Failed to get reset line\n");</div><div class='add'>+</div><div class='ctx'> 	ret = m_can_clk_start(cdev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	ret = reset_control_deassert(cdev-&gt;rst);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto clk_disable;</div><div class='add'>+</div><div class='ctx'> 	if (cdev-&gt;is_peripheral) {</div><div class='ctx'> 		ret = can_rx_offload_add_manual(cdev-&gt;net, &amp;cdev-&gt;offload,</div><div class='ctx'> 						NAPI_POLL_WEIGHT);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			goto clk_disable;</div><div class='add'>+			goto out_reset_control_assert;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!cdev-&gt;net-&gt;irq) {</div><div class='del'>-		dev_dbg(cdev-&gt;dev, "Polling enabled, initialize hrtimer");</div><div class='del'>-		hrtimer_init(&amp;cdev-&gt;hrtimer, CLOCK_MONOTONIC,</div><div class='del'>-			     HRTIMER_MODE_REL_PINNED);</div><div class='del'>-		cdev-&gt;hrtimer.function = &amp;hrtimer_callback;</div><div class='add'>+		netdev_dbg(cdev-&gt;net, "Polling enabled, initialize hrtimer");</div><div class='add'>+		hrtimer_setup(&amp;cdev-&gt;hrtimer, m_can_polling_timer, CLOCK_MONOTONIC,</div><div class='add'>+			      HRTIMER_MODE_REL_PINNED);</div><div class='ctx'> 	} else {</div><div class='del'>-		hrtimer_init(&amp;cdev-&gt;hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-		cdev-&gt;hrtimer.function = m_can_coalescing_timer;</div><div class='add'>+		hrtimer_setup(&amp;cdev-&gt;hrtimer, m_can_coalescing_timer, CLOCK_MONOTONIC,</div><div class='add'>+			      HRTIMER_MODE_REL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = m_can_dev_setup(cdev);</div><div class='hunk'>@@ -2397,19 +2555,21 @@ int m_can_class_register(struct m_can_classdev *cdev)</div><div class='ctx'> </div><div class='ctx'> 	ret = register_m_can_dev(cdev);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_err(cdev-&gt;dev, "registering %s failed (err=%d)\n",</div><div class='del'>-			cdev-&gt;net-&gt;name, ret);</div><div class='add'>+		netdev_err(cdev-&gt;net, "registering %s failed (err=%d)\n",</div><div class='add'>+			   cdev-&gt;net-&gt;name, ret);</div><div class='ctx'> 		goto rx_offload_del;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	of_can_transceiver(cdev-&gt;net);</div><div class='ctx'> </div><div class='del'>-	dev_info(cdev-&gt;dev, "%s device registered (irq=%d, version=%d)\n",</div><div class='del'>-		 KBUILD_MODNAME, cdev-&gt;net-&gt;irq, cdev-&gt;version);</div><div class='add'>+	netdev_info(cdev-&gt;net, "device registered (irq=%d, version=%d)\n",</div><div class='add'>+		    cdev-&gt;net-&gt;irq, cdev-&gt;version);</div><div class='ctx'> </div><div class='ctx'> 	/* Probe finished</div><div class='del'>-	 * Stop clocks. They will be reactivated once the M_CAN device is opened</div><div class='add'>+	 * Assert reset and stop clocks.</div><div class='add'>+	 * They will be reactivated once the M_CAN device is opened</div><div class='ctx'> 	 */</div><div class='add'>+	reset_control_assert(cdev-&gt;rst);</div><div class='ctx'> 	m_can_clk_stop(cdev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2417,6 +2577,8 @@ int m_can_class_register(struct m_can_classdev *cdev)</div><div class='ctx'> rx_offload_del:</div><div class='ctx'> 	if (cdev-&gt;is_peripheral)</div><div class='ctx'> 		can_rx_offload_del(&amp;cdev-&gt;offload);</div><div class='add'>+out_reset_control_assert:</div><div class='add'>+	reset_control_assert(cdev-&gt;rst);</div><div class='ctx'> clk_disable:</div><div class='ctx'> 	m_can_clk_stop(cdev);</div><div class='ctx'> </div><div class='hunk'>@@ -2426,9 +2588,9 @@ EXPORT_SYMBOL_GPL(m_can_class_register);</div><div class='ctx'> </div><div class='ctx'> void m_can_class_unregister(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='add'>+	unregister_candev(cdev-&gt;net);</div><div class='ctx'> 	if (cdev-&gt;is_peripheral)</div><div class='ctx'> 		can_rx_offload_del(&amp;cdev-&gt;offload);</div><div class='del'>-	unregister_candev(cdev-&gt;net);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(m_can_class_unregister);</div><div class='ctx'> </div><div class='hunk'>@@ -2436,6 +2598,7 @@ int m_can_class_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct m_can_classdev *cdev = dev_get_drvdata(dev);</div><div class='ctx'> 	struct net_device *ndev = cdev-&gt;net;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(ndev)) {</div><div class='ctx'> 		netif_stop_queue(ndev);</div><div class='hunk'>@@ -2448,18 +2611,21 @@ int m_can_class_suspend(struct device *dev)</div><div class='ctx'> 		if (cdev-&gt;pm_wake_source) {</div><div class='ctx'> 			hrtimer_cancel(&amp;cdev-&gt;hrtimer);</div><div class='ctx'> 			m_can_write(cdev, M_CAN_IE, IR_RF0N);</div><div class='add'>+</div><div class='add'>+			if (cdev-&gt;ops-&gt;deinit)</div><div class='add'>+				ret = cdev-&gt;ops-&gt;deinit(cdev);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			m_can_stop(ndev);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		m_can_clk_stop(cdev);</div><div class='add'>+		cdev-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pinctrl_pm_select_sleep_state(dev);</div><div class='del'>-</div><div class='del'>-	cdev-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='add'>+	if (!m_can_class_wakeup_pinctrl_enabled(cdev))</div><div class='add'>+		pinctrl_pm_select_sleep_state(dev);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(m_can_class_suspend);</div><div class='ctx'> </div><div class='hunk'>@@ -2467,14 +2633,12 @@ int m_can_class_resume(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct m_can_classdev *cdev = dev_get_drvdata(dev);</div><div class='ctx'> 	struct net_device *ndev = cdev-&gt;net;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	pinctrl_pm_select_default_state(dev);</div><div class='del'>-</div><div class='del'>-	cdev-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	if (!m_can_class_wakeup_pinctrl_enabled(cdev))</div><div class='add'>+		pinctrl_pm_select_default_state(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(ndev)) {</div><div class='del'>-		int ret;</div><div class='del'>-</div><div class='ctx'> 		ret = m_can_clk_start(cdev);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -2487,6 +2651,12 @@ int m_can_class_resume(struct device *dev)</div><div class='ctx'> 			 * again.</div><div class='ctx'> 			 */</div><div class='ctx'> 			cdev-&gt;active_interrupts |= IR_RF0N | IR_TEFN;</div><div class='add'>+</div><div class='add'>+			if (cdev-&gt;ops-&gt;init)</div><div class='add'>+				ret = cdev-&gt;ops-&gt;init(cdev);</div><div class='add'>+</div><div class='add'>+			cdev-&gt;can.state = m_can_state_get_by_psr(cdev);</div><div class='add'>+</div><div class='ctx'> 			m_can_write(cdev, M_CAN_IE, cdev-&gt;active_interrupts);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			ret  = m_can_start(ndev);</div><div class='hunk'>@@ -2500,11 +2670,11 @@ int m_can_class_resume(struct device *dev)</div><div class='ctx'> 		netif_start_queue(ndev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(m_can_class_resume);</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Dong Aisheng &lt;b29396@freescale.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Dong Aisheng &lt;aisheng.dong@nxp.com&gt;");</div><div class='ctx'> MODULE_AUTHOR("Dan Murphy &lt;dmurphy@ti.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> MODULE_DESCRIPTION("CAN bus driver for Bosch M_CAN controller");</div><div class='head'>diff --git a/drivers/net/can/m_can/m_can.h b/drivers/net/can/m_can/m_can.h<br/>index 92b2bd8628e6..4743342b2fba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/m_can.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/m_can.h</a></div><div class='hunk'>@@ -68,6 +68,7 @@ struct m_can_ops {</div><div class='ctx'> 	int (*write_fifo)(struct m_can_classdev *cdev, int addr_offset,</div><div class='ctx'> 			  const void *val, size_t val_count);</div><div class='ctx'> 	int (*init)(struct m_can_classdev *cdev);</div><div class='add'>+	int (*deinit)(struct m_can_classdev *cdev);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct m_can_tx_op {</div><div class='hunk'>@@ -85,6 +86,7 @@ struct m_can_classdev {</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct clk *hclk;</div><div class='ctx'> 	struct clk *cclk;</div><div class='add'>+	struct reset_control *rst;</div><div class='ctx'> </div><div class='ctx'> 	struct workqueue_struct *tx_wq;</div><div class='ctx'> 	struct phy *transceiver;</div><div class='hunk'>@@ -99,6 +101,7 @@ struct m_can_classdev {</div><div class='ctx'> 	int pm_clock_support;</div><div class='ctx'> 	int pm_wake_source;</div><div class='ctx'> 	int is_peripheral;</div><div class='add'>+	bool irq_edge_triggered;</div><div class='ctx'> </div><div class='ctx'> 	// Cached M_CAN_IE register content</div><div class='ctx'> 	u32 active_interrupts;</div><div class='hunk'>@@ -126,6 +129,9 @@ struct m_can_classdev {</div><div class='ctx'> 	struct mram_cfg mcfg[MRAM_CFG_NUM];</div><div class='ctx'> </div><div class='ctx'> 	struct hrtimer hrtimer;</div><div class='add'>+</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='add'>+	struct pinctrl_state *pinctrl_state_wakeup;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct m_can_classdev *m_can_class_allocate_dev(struct device *dev, int sizeof_priv);</div><div class='hunk'>@@ -133,7 +139,6 @@ void m_can_class_free_dev(struct net_device *net);</div><div class='ctx'> int m_can_class_register(struct m_can_classdev *cdev);</div><div class='ctx'> void m_can_class_unregister(struct m_can_classdev *cdev);</div><div class='ctx'> int m_can_class_get_clocks(struct m_can_classdev *cdev);</div><div class='del'>-int m_can_init_ram(struct m_can_classdev *priv);</div><div class='ctx'> int m_can_check_mram_cfg(struct m_can_classdev *cdev, u32 mram_max_size);</div><div class='ctx'> </div><div class='ctx'> int m_can_class_suspend(struct device *dev);</div><div class='head'>diff --git a/drivers/net/can/m_can/m_can_pci.c b/drivers/net/can/m_can/m_can_pci.c<br/>index d72fe771dfc7..eb31ed1f9644 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can_pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/m_can_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/m_can_pci.c</a></div><div class='hunk'>@@ -111,8 +111,8 @@ static int m_can_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	mcan_class = m_can_class_allocate_dev(&amp;pci-&gt;dev,</div><div class='ctx'> 					      sizeof(struct m_can_pci_priv));</div><div class='del'>-	if (!mcan_class)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (IS_ERR(mcan_class))</div><div class='add'>+		return PTR_ERR(mcan_class);</div><div class='ctx'> </div><div class='ctx'> 	priv = cdev_to_priv(mcan_class);</div><div class='ctx'> </div><div class='hunk'>@@ -127,6 +127,7 @@ static int m_can_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)</div><div class='ctx'> 	mcan_class-&gt;pm_clock_support = 1;</div><div class='ctx'> 	mcan_class-&gt;pm_wake_source = 0;</div><div class='ctx'> 	mcan_class-&gt;can.clock.freq = id-&gt;driver_data;</div><div class='add'>+	mcan_class-&gt;irq_edge_triggered = true;</div><div class='ctx'> 	mcan_class-&gt;ops = &amp;m_can_pci_ops;</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pci, mcan_class);</div><div class='head'>diff --git a/drivers/net/can/m_can/m_can_platform.c b/drivers/net/can/m_can/m_can_platform.c<br/>index b832566efda0..56da411878af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can_platform.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/m_can_platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can_platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/m_can_platform.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> // IOMapped CAN bus driver for Bosch M_CAN controller</div><div class='ctx'> // Copyright (C) 2014 Freescale Semiconductor, Inc.</div><div class='del'>-//	Dong Aisheng &lt;b29396@freescale.com&gt;</div><div class='add'>+//	Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='ctx'> //</div><div class='ctx'> // Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/</div><div class='ctx'> </div><div class='hunk'>@@ -87,8 +87,8 @@ static int m_can_plat_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	mcan_class = m_can_class_allocate_dev(&amp;pdev-&gt;dev,</div><div class='ctx'> 					      sizeof(struct m_can_plat_priv));</div><div class='del'>-	if (!mcan_class)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (IS_ERR(mcan_class))</div><div class='add'>+		return PTR_ERR(mcan_class);</div><div class='ctx'> </div><div class='ctx'> 	priv = cdev_to_priv(mcan_class);</div><div class='ctx'> </div><div class='hunk'>@@ -180,7 +180,7 @@ static void m_can_plat_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct m_can_classdev *mcan_class = &amp;priv-&gt;cdev;</div><div class='ctx'> </div><div class='ctx'> 	m_can_class_unregister(mcan_class);</div><div class='del'>-</div><div class='add'>+	pm_runtime_disable(mcan_class-&gt;dev);</div><div class='ctx'> 	m_can_class_free_dev(mcan_class-&gt;net);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -236,7 +236,7 @@ static struct platform_driver m_can_plat_driver = {</div><div class='ctx'> </div><div class='ctx'> module_platform_driver(m_can_plat_driver);</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Dong Aisheng &lt;b29396@freescale.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Dong Aisheng &lt;aisheng.dong@nxp.com&gt;");</div><div class='ctx'> MODULE_AUTHOR("Dan Murphy &lt;dmurphy@ti.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> MODULE_DESCRIPTION("M_CAN driver for IO Mapped Bosch controllers");</div><div class='head'>diff --git a/drivers/net/can/m_can/tcan4x5x-core.c b/drivers/net/can/m_can/tcan4x5x-core.c<br/>index 2f73bf3abad8..31cc9d0abd45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/tcan4x5x-core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/tcan4x5x-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/tcan4x5x-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/tcan4x5x-core.c</a></div><div class='hunk'>@@ -92,6 +92,8 @@</div><div class='ctx'> #define TCAN4X5X_MODE_STANDBY BIT(6)</div><div class='ctx'> #define TCAN4X5X_MODE_NORMAL BIT(7)</div><div class='ctx'> </div><div class='add'>+#define TCAN4X5X_NWKRQ_VOLTAGE_VIO BIT(19)</div><div class='add'>+</div><div class='ctx'> #define TCAN4X5X_DISABLE_WAKE_MSK	(BIT(31) | BIT(30))</div><div class='ctx'> #define TCAN4X5X_DISABLE_INH_MSK	BIT(9)</div><div class='ctx'> </div><div class='hunk'>@@ -267,9 +269,24 @@ static int tcan4x5x_init(struct m_can_classdev *cdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	if (tcan4x5x-&gt;nwkrq_voltage_vio) {</div><div class='add'>+		ret = regmap_set_bits(tcan4x5x-&gt;regmap, TCAN4X5X_CONFIG,</div><div class='add'>+				      TCAN4X5X_NWKRQ_VOLTAGE_VIO);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int tcan4x5x_deinit(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(tcan4x5x-&gt;regmap, TCAN4X5X_CONFIG,</div><div class='add'>+				  TCAN4X5X_MODE_SEL_MASK, TCAN4X5X_MODE_STANDBY);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int tcan4x5x_disable_wake(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='hunk'>@@ -318,21 +335,27 @@ static const struct tcan4x5x_version_info</div><div class='ctx'> 	return &amp;tcan4x5x_versions[TCAN4X5X];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tcan4x5x_get_gpios(struct m_can_classdev *cdev,</div><div class='del'>-			      const struct tcan4x5x_version_info *version_info)</div><div class='add'>+static void tcan4x5x_get_dt_data(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	tcan4x5x-&gt;nwkrq_voltage_vio =</div><div class='add'>+		of_property_read_bool(cdev-&gt;dev-&gt;of_node, "ti,nwkrq-voltage-vio");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_get_gpios(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (version_info-&gt;has_wake_pin) {</div><div class='del'>-		tcan4x5x-&gt;device_wake_gpio = devm_gpiod_get(cdev-&gt;dev, "device-wake",</div><div class='del'>-							    GPIOD_OUT_HIGH);</div><div class='del'>-		if (IS_ERR(tcan4x5x-&gt;device_wake_gpio)) {</div><div class='del'>-			if (PTR_ERR(tcan4x5x-&gt;device_wake_gpio) == -EPROBE_DEFER)</div><div class='del'>-				return -EPROBE_DEFER;</div><div class='add'>+	tcan4x5x-&gt;device_wake_gpio = devm_gpiod_get_optional(cdev-&gt;dev,</div><div class='add'>+							     "device-wake",</div><div class='add'>+							     GPIOD_OUT_HIGH);</div><div class='add'>+	if (IS_ERR(tcan4x5x-&gt;device_wake_gpio)) {</div><div class='add'>+		if (PTR_ERR(tcan4x5x-&gt;device_wake_gpio) == -EPROBE_DEFER)</div><div class='add'>+			return -EPROBE_DEFER;</div><div class='ctx'> </div><div class='del'>-			tcan4x5x_disable_wake(cdev);</div><div class='del'>-		}</div><div class='add'>+		tcan4x5x-&gt;device_wake_gpio = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tcan4x5x-&gt;reset_gpio = devm_gpiod_get_optional(cdev-&gt;dev, "reset",</div><div class='hunk'>@@ -344,14 +367,31 @@ static int tcan4x5x_get_gpios(struct m_can_classdev *cdev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (version_info-&gt;has_state_pin) {</div><div class='del'>-		tcan4x5x-&gt;device_state_gpio = devm_gpiod_get_optional(cdev-&gt;dev,</div><div class='del'>-								      "device-state",</div><div class='del'>-								      GPIOD_IN);</div><div class='del'>-		if (IS_ERR(tcan4x5x-&gt;device_state_gpio)) {</div><div class='del'>-			tcan4x5x-&gt;device_state_gpio = NULL;</div><div class='del'>-			tcan4x5x_disable_state(cdev);</div><div class='del'>-		}</div><div class='add'>+	tcan4x5x-&gt;device_state_gpio = devm_gpiod_get_optional(cdev-&gt;dev,</div><div class='add'>+							      "device-state",</div><div class='add'>+							      GPIOD_IN);</div><div class='add'>+	if (IS_ERR(tcan4x5x-&gt;device_state_gpio))</div><div class='add'>+		tcan4x5x-&gt;device_state_gpio = NULL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_check_gpios(struct m_can_classdev *cdev,</div><div class='add'>+				const struct tcan4x5x_version_info *version_info)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (version_info-&gt;has_wake_pin &amp;&amp; !tcan4x5x-&gt;device_wake_gpio) {</div><div class='add'>+		ret = tcan4x5x_disable_wake(cdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (version_info-&gt;has_state_pin &amp;&amp; !tcan4x5x-&gt;device_state_gpio) {</div><div class='add'>+		ret = tcan4x5x_disable_state(cdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -359,6 +399,7 @@ static int tcan4x5x_get_gpios(struct m_can_classdev *cdev,</div><div class='ctx'> </div><div class='ctx'> static const struct m_can_ops tcan4x5x_ops = {</div><div class='ctx'> 	.init = tcan4x5x_init,</div><div class='add'>+	.deinit = tcan4x5x_deinit,</div><div class='ctx'> 	.read_reg = tcan4x5x_read_reg,</div><div class='ctx'> 	.write_reg = tcan4x5x_write_reg,</div><div class='ctx'> 	.write_fifo = tcan4x5x_write_fifo,</div><div class='hunk'>@@ -375,8 +416,8 @@ static int tcan4x5x_can_probe(struct spi_device *spi)</div><div class='ctx'> </div><div class='ctx'> 	mcan_class = m_can_class_allocate_dev(&amp;spi-&gt;dev,</div><div class='ctx'> 					      sizeof(struct tcan4x5x_priv));</div><div class='del'>-	if (!mcan_class)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (IS_ERR(mcan_class))</div><div class='add'>+		return PTR_ERR(mcan_class);</div><div class='ctx'> </div><div class='ctx'> 	ret = m_can_check_mram_cfg(mcan_class, TCAN4X5X_MRAM_SIZE);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -385,14 +426,15 @@ static int tcan4x5x_can_probe(struct spi_device *spi)</div><div class='ctx'> 	priv = cdev_to_priv(mcan_class);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;power = devm_regulator_get_optional(&amp;spi-&gt;dev, "vsup");</div><div class='del'>-	if (PTR_ERR(priv-&gt;power) == -EPROBE_DEFER) {</div><div class='del'>-		ret = -EPROBE_DEFER;</div><div class='del'>-		goto out_m_can_class_free_dev;</div><div class='del'>-	} else {</div><div class='add'>+	if (IS_ERR(priv-&gt;power)) {</div><div class='add'>+		if (PTR_ERR(priv-&gt;power) == -EPROBE_DEFER) {</div><div class='add'>+			ret = -EPROBE_DEFER;</div><div class='add'>+			goto out_m_can_class_free_dev;</div><div class='add'>+		}</div><div class='ctx'> 		priv-&gt;power = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	m_can_class_get_clocks(mcan_class);</div><div class='add'>+	mcan_class-&gt;cclk = devm_clk_get(mcan_class-&gt;dev, "cclk");</div><div class='ctx'> 	if (IS_ERR(mcan_class-&gt;cclk)) {</div><div class='ctx'> 		dev_err(&amp;spi-&gt;dev, "no CAN clock source defined\n");</div><div class='ctx'> 		freq = TCAN4X5X_EXT_CLK_DEF;</div><div class='hunk'>@@ -441,18 +483,26 @@ static int tcan4x5x_can_probe(struct spi_device *spi)</div><div class='ctx'> 		goto out_m_can_class_free_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = tcan4x5x_get_gpios(mcan_class);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Getting gpios failed %pe\n", ERR_PTR(ret));</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	version_info = tcan4x5x_find_version(priv);</div><div class='ctx'> 	if (IS_ERR(version_info)) {</div><div class='ctx'> 		ret = PTR_ERR(version_info);</div><div class='ctx'> 		goto out_power;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = tcan4x5x_get_gpios(mcan_class, version_info);</div><div class='add'>+	ret = tcan4x5x_check_gpios(mcan_class, version_info);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_err(&amp;spi-&gt;dev, "Getting gpios failed %pe\n", ERR_PTR(ret));</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Checking gpios failed %pe\n", ERR_PTR(ret));</div><div class='ctx'> 		goto out_power;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	tcan4x5x_get_dt_data(mcan_class);</div><div class='add'>+</div><div class='ctx'> 	tcan4x5x_check_wake(priv);</div><div class='ctx'> </div><div class='ctx'> 	ret = tcan4x5x_write_tcan_reg(mcan_class, TCAN4X5X_INT_EN, 0);</div><div class='head'>diff --git a/drivers/net/can/m_can/tcan4x5x.h b/drivers/net/can/m_can/tcan4x5x.h<br/>index e62c030d3e1e..203399d5e8cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/tcan4x5x.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/m_can/tcan4x5x.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/tcan4x5x.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/tcan4x5x.h</a></div><div class='hunk'>@@ -42,6 +42,8 @@ struct tcan4x5x_priv {</div><div class='ctx'> </div><div class='ctx'> 	struct tcan4x5x_map_buf map_buf_rx;</div><div class='ctx'> 	struct tcan4x5x_map_buf map_buf_tx;</div><div class='add'>+</div><div class='add'>+	bool nwkrq_voltage_vio;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='head'>diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c<br/>index 8c2a7bc64d3d..39c7aa2a0b2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/mscan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/mscan/mscan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/mscan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/mscan/mscan.c</a></div><div class='hunk'>@@ -607,7 +607,6 @@ static const struct net_device_ops mscan_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= mscan_open,</div><div class='ctx'> 	.ndo_stop	= mscan_close,</div><div class='ctx'> 	.ndo_start_xmit	= mscan_start_xmit,</div><div class='del'>-	.ndo_change_mtu	= can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops mscan_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/peak_canfd/peak_canfd.c b/drivers/net/can/peak_canfd/peak_canfd.c<br/>index 28f3fd805273..06cb2629f66a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/peak_canfd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/peak_canfd/peak_canfd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/peak_canfd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/peak_canfd/peak_canfd.c</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Copyright (C) 2007, 2011 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- * Copyright (C) 2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2016  PEAK System-Technik GmbH</div><div class='add'>+ * Copyright (C) 2016-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='hunk'>@@ -624,7 +624,7 @@ static int peak_canfd_set_data_bittiming(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct peak_canfd_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='del'>-	return pucan_set_timing_fast(priv, &amp;priv-&gt;can.data_bittiming);</div><div class='add'>+	return pucan_set_timing_fast(priv, &amp;priv-&gt;can.fd.data_bittiming);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int peak_canfd_close(struct net_device *ndev)</div><div class='hunk'>@@ -743,37 +743,33 @@ static netdev_tx_t peak_canfd_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int peak_eth_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='add'>+static int peak_eth_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+				 struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config hwts_cfg = { 0 };</div><div class='add'>+	config-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+	config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP: /* set */</div><div class='del'>-		if (copy_from_user(&amp;hwts_cfg, ifr-&gt;ifr_data, sizeof(hwts_cfg)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		if (hwts_cfg.tx_type == HWTSTAMP_TX_OFF &amp;&amp;</div><div class='del'>-		    hwts_cfg.rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='del'>-			return 0;</div><div class='del'>-		return -ERANGE;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	case SIOCGHWTSTAMP: /* get */</div><div class='del'>-		hwts_cfg.tx_type = HWTSTAMP_TX_OFF;</div><div class='del'>-		hwts_cfg.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-		if (copy_to_user(ifr-&gt;ifr_data, &amp;hwts_cfg, sizeof(hwts_cfg)))</div><div class='del'>-			return -EFAULT;</div><div class='add'>+static int peak_eth_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+				 struct kernel_hwtstamp_config *config,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (config-&gt;tx_type == HWTSTAMP_TX_OFF &amp;&amp;</div><div class='add'>+	    config-&gt;rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Only RX HWTSTAMP_FILTER_ALL is supported");</div><div class='add'>+	return -ERANGE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops peak_canfd_netdev_ops = {</div><div class='ctx'> 	.ndo_open = peak_canfd_open,</div><div class='ctx'> 	.ndo_stop = peak_canfd_close,</div><div class='del'>-	.ndo_eth_ioctl = peak_eth_ioctl,</div><div class='ctx'> 	.ndo_start_xmit = peak_canfd_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+	.ndo_hwtstamp_get = peak_eth_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = peak_eth_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int peak_get_ts_info(struct net_device *dev,</div><div class='hunk'>@@ -813,12 +809,12 @@ struct net_device *alloc_peak_canfd_dev(int sizeof_priv, int index,</div><div class='ctx'> 	/* complete now socket-can initialization side */</div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='ctx'> 	priv-&gt;can.bittiming_const = &amp;peak_canfd_nominal_const;</div><div class='del'>-	priv-&gt;can.data_bittiming_const = &amp;peak_canfd_data_const;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;peak_canfd_data_const;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;can.do_set_mode = peak_canfd_set_mode;</div><div class='ctx'> 	priv-&gt;can.do_get_berr_counter = peak_canfd_get_berr_counter;</div><div class='ctx'> 	priv-&gt;can.do_set_bittiming = peak_canfd_set_bittiming;</div><div class='del'>-	priv-&gt;can.do_set_data_bittiming = peak_canfd_set_data_bittiming;</div><div class='add'>+	priv-&gt;can.fd.do_set_data_bittiming = peak_canfd_set_data_bittiming;</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='ctx'> 				       CAN_CTRLMODE_LISTENONLY |</div><div class='ctx'> 				       CAN_CTRLMODE_3_SAMPLES |</div><div class='head'>diff --git a/drivers/net/can/peak_canfd/peak_canfd_user.h b/drivers/net/can/peak_canfd/peak_canfd_user.h<br/>index a72719dc3b74..60c6542028cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/peak_canfd_user.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/peak_canfd/peak_canfd_user.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/peak_canfd_user.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/peak_canfd/peak_canfd_user.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /* CAN driver for PEAK System micro-CAN based adapters</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2011 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2011-2013 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #ifndef PEAK_CANFD_USER_H</div><div class='ctx'> #define PEAK_CANFD_USER_H</div><div class='head'>diff --git a/drivers/net/can/peak_canfd/peak_pciefd_main.c b/drivers/net/can/peak_canfd/peak_pciefd_main.c<br/>index 1df3c4b54f03..93558e33bc02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/peak_pciefd_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/peak_canfd/peak_pciefd_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/peak_pciefd_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/peak_canfd/peak_pciefd_main.c</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Copyright (C) 2007, 2011 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- * Copyright (C) 2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_pci.c:</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2001-2006  PEAK System-Technik GmbH</div><div class='add'>+ * Copyright (C) 2001-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "peak_canfd_user.h"</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCIe/M.2 FD family cards");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/can/rcar/rcar_can.c b/drivers/net/can/rcar/rcar_can.c<br/>index 2b7dd359f27b..fc3df328e877 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rcar/rcar_can.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rcar/rcar_can.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rcar/rcar_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rcar/rcar_can.c</a></div><div class='hunk'>@@ -5,6 +5,8 @@</div><div class='ctx'>  * Copyright (C) 2013 Renesas Solutions Corp.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='hunk'>@@ -16,6 +18,7 @@</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define RCAR_CAN_DRV_NAME	"rcar_can"</div><div class='ctx'> </div><div class='hunk'>@@ -92,7 +95,6 @@ struct rcar_can_priv {</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	struct rcar_can_regs __iomem *regs;</div><div class='del'>-	struct clk *clk;</div><div class='ctx'> 	struct clk *can_clk;</div><div class='ctx'> 	u32 tx_head;</div><div class='ctx'> 	u32 tx_tail;</div><div class='hunk'>@@ -113,100 +115,102 @@ static const struct can_bittiming_const rcar_can_bittiming_const = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Control Register bits */</div><div class='del'>-#define RCAR_CAN_CTLR_BOM	(3 &lt;&lt; 11) /* Bus-Off Recovery Mode Bits */</div><div class='del'>-#define RCAR_CAN_CTLR_BOM_ENT	(1 &lt;&lt; 11) /* Entry to halt mode */</div><div class='del'>-					/* at bus-off entry */</div><div class='del'>-#define RCAR_CAN_CTLR_SLPM	(1 &lt;&lt; 10)</div><div class='del'>-#define RCAR_CAN_CTLR_CANM	(3 &lt;&lt; 8) /* Operating Mode Select Bit */</div><div class='del'>-#define RCAR_CAN_CTLR_CANM_HALT	(1 &lt;&lt; 9)</div><div class='del'>-#define RCAR_CAN_CTLR_CANM_RESET (1 &lt;&lt; 8)</div><div class='del'>-#define RCAR_CAN_CTLR_CANM_FORCE_RESET (3 &lt;&lt; 8)</div><div class='del'>-#define RCAR_CAN_CTLR_MLM	(1 &lt;&lt; 3) /* Message Lost Mode Select */</div><div class='del'>-#define RCAR_CAN_CTLR_IDFM	(3 &lt;&lt; 1) /* ID Format Mode Select Bits */</div><div class='del'>-#define RCAR_CAN_CTLR_IDFM_MIXED (1 &lt;&lt; 2) /* Mixed ID mode */</div><div class='del'>-#define RCAR_CAN_CTLR_MBM	(1 &lt;&lt; 0) /* Mailbox Mode select */</div><div class='add'>+#define RCAR_CAN_CTLR_BOM	GENMASK(12, 11)	/* Bus-Off Recovery Mode Bits */</div><div class='add'>+#define RCAR_CAN_CTLR_BOM_ENT		1	/* Entry to halt mode */</div><div class='add'>+						/* at bus-off entry */</div><div class='add'>+#define RCAR_CAN_CTLR_SLPM	BIT(10)		/* Sleep Mode */</div><div class='add'>+#define RCAR_CAN_CTLR_CANM	GENMASK(9, 8)	/* Operating Mode Select Bit */</div><div class='add'>+#define RCAR_CAN_CTLR_CANM_OPER		0	/* Operation Mode */</div><div class='add'>+#define RCAR_CAN_CTLR_CANM_RESET	1	/* Reset Mode */</div><div class='add'>+#define RCAR_CAN_CTLR_CANM_HALT		2	/* Halt Mode */</div><div class='add'>+#define RCAR_CAN_CTLR_CANM_FORCE_RESET	3	/* Reset Mode (forcible) */</div><div class='add'>+#define RCAR_CAN_CTLR_MLM	BIT(3)		/* Message Lost Mode Select */</div><div class='add'>+#define RCAR_CAN_CTLR_IDFM	GENMASK(2, 1)	/* ID Format Mode Select Bits */</div><div class='add'>+#define RCAR_CAN_CTLR_IDFM_STD		0	/* Standard ID mode */</div><div class='add'>+#define RCAR_CAN_CTLR_IDFM_EXT		1	/* Extended ID mode */</div><div class='add'>+#define RCAR_CAN_CTLR_IDFM_MIXED	2	/* Mixed ID mode */</div><div class='add'>+#define RCAR_CAN_CTLR_MBM	BIT(0)		/* Mailbox Mode select */</div><div class='ctx'> </div><div class='ctx'> /* Status Register bits */</div><div class='del'>-#define RCAR_CAN_STR_RSTST	(1 &lt;&lt; 8) /* Reset Status Bit */</div><div class='add'>+#define RCAR_CAN_STR_RSTST	BIT(8)		/* Reset Status Bit */</div><div class='ctx'> </div><div class='ctx'> /* FIFO Received ID Compare Registers 0 and 1 bits */</div><div class='del'>-#define RCAR_CAN_FIDCR_IDE	(1 &lt;&lt; 31) /* ID Extension Bit */</div><div class='del'>-#define RCAR_CAN_FIDCR_RTR	(1 &lt;&lt; 30) /* Remote Transmission Request Bit */</div><div class='add'>+#define RCAR_CAN_FIDCR_IDE	BIT(31)		/* ID Extension Bit */</div><div class='add'>+#define RCAR_CAN_FIDCR_RTR	BIT(30)		/* Remote Transmission Request Bit */</div><div class='ctx'> </div><div class='ctx'> /* Receive FIFO Control Register bits */</div><div class='del'>-#define RCAR_CAN_RFCR_RFEST	(1 &lt;&lt; 7) /* Receive FIFO Empty Status Flag */</div><div class='del'>-#define RCAR_CAN_RFCR_RFE	(1 &lt;&lt; 0) /* Receive FIFO Enable */</div><div class='add'>+#define RCAR_CAN_RFCR_RFEST	BIT(7)		/* Receive FIFO Empty Status Flag */</div><div class='add'>+#define RCAR_CAN_RFCR_RFE	BIT(0)		/* Receive FIFO Enable */</div><div class='ctx'> </div><div class='ctx'> /* Transmit FIFO Control Register bits */</div><div class='del'>-#define RCAR_CAN_TFCR_TFUST	(7 &lt;&lt; 1) /* Transmit FIFO Unsent Message */</div><div class='del'>-					/* Number Status Bits */</div><div class='del'>-#define RCAR_CAN_TFCR_TFUST_SHIFT 1	/* Offset of Transmit FIFO Unsent */</div><div class='del'>-					/* Message Number Status Bits */</div><div class='del'>-#define RCAR_CAN_TFCR_TFE	(1 &lt;&lt; 0) /* Transmit FIFO Enable */</div><div class='del'>-</div><div class='del'>-#define RCAR_CAN_N_RX_MKREGS1	2	/* Number of mask registers */</div><div class='del'>-					/* for Rx mailboxes 0-31 */</div><div class='add'>+#define RCAR_CAN_TFCR_TFUST	GENMASK(3, 1)	/* Transmit FIFO Unsent Message */</div><div class='add'>+						/* Number Status Bits */</div><div class='add'>+#define RCAR_CAN_TFCR_TFE	BIT(0)		/* Transmit FIFO Enable */</div><div class='add'>+</div><div class='add'>+#define RCAR_CAN_N_RX_MKREGS1	2		/* Number of mask registers */</div><div class='add'>+						/* for Rx mailboxes 0-31 */</div><div class='ctx'> #define RCAR_CAN_N_RX_MKREGS2	8</div><div class='ctx'> </div><div class='ctx'> /* Bit Configuration Register settings */</div><div class='del'>-#define RCAR_CAN_BCR_TSEG1(x)	(((x) &amp; 0x0f) &lt;&lt; 20)</div><div class='del'>-#define RCAR_CAN_BCR_BPR(x)	(((x) &amp; 0x3ff) &lt;&lt; 8)</div><div class='del'>-#define RCAR_CAN_BCR_SJW(x)	(((x) &amp; 0x3) &lt;&lt; 4)</div><div class='del'>-#define RCAR_CAN_BCR_TSEG2(x)	((x) &amp; 0x07)</div><div class='add'>+#define RCAR_CAN_BCR_TSEG1	GENMASK(23, 20)</div><div class='add'>+#define RCAR_CAN_BCR_BRP	GENMASK(17, 8)</div><div class='add'>+#define RCAR_CAN_BCR_SJW	GENMASK(5, 4)</div><div class='add'>+#define RCAR_CAN_BCR_TSEG2	GENMASK(2, 0)</div><div class='ctx'> </div><div class='ctx'> /* Mailbox and Mask Registers bits */</div><div class='del'>-#define RCAR_CAN_IDE		(1 &lt;&lt; 31)</div><div class='del'>-#define RCAR_CAN_RTR		(1 &lt;&lt; 30)</div><div class='del'>-#define RCAR_CAN_SID_SHIFT	18</div><div class='add'>+#define RCAR_CAN_IDE		BIT(31)		/* ID Extension */</div><div class='add'>+#define RCAR_CAN_RTR		BIT(30)		/* Remote Transmission Request */</div><div class='add'>+#define RCAR_CAN_SID		GENMASK(28, 18)	/* Standard ID */</div><div class='add'>+#define RCAR_CAN_EID		GENMASK(28, 0)	/* Extended ID */</div><div class='ctx'> </div><div class='ctx'> /* Mailbox Interrupt Enable Register 1 bits */</div><div class='del'>-#define RCAR_CAN_MIER1_RXFIE	(1 &lt;&lt; 28) /* Receive  FIFO Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_MIER1_TXFIE	(1 &lt;&lt; 24) /* Transmit FIFO Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_MIER1_RXFIE	BIT(28)		/* Receive  FIFO Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_MIER1_TXFIE	BIT(24)		/* Transmit FIFO Interrupt Enable */</div><div class='ctx'> </div><div class='ctx'> /* Interrupt Enable Register bits */</div><div class='del'>-#define RCAR_CAN_IER_ERSIE	(1 &lt;&lt; 5) /* Error (ERS) Interrupt Enable Bit */</div><div class='del'>-#define RCAR_CAN_IER_RXFIE	(1 &lt;&lt; 4) /* Reception FIFO Interrupt */</div><div class='del'>-					/* Enable Bit */</div><div class='del'>-#define RCAR_CAN_IER_TXFIE	(1 &lt;&lt; 3) /* Transmission FIFO Interrupt */</div><div class='del'>-					/* Enable Bit */</div><div class='add'>+#define RCAR_CAN_IER_ERSIE	BIT(5)		/* Error (ERS) Interrupt Enable Bit */</div><div class='add'>+#define RCAR_CAN_IER_RXFIE	BIT(4)		/* Reception FIFO Interrupt */</div><div class='add'>+						/* Enable Bit */</div><div class='add'>+#define RCAR_CAN_IER_TXFIE	BIT(3)		/* Transmission FIFO Interrupt */</div><div class='add'>+						/* Enable Bit */</div><div class='ctx'> /* Interrupt Status Register bits */</div><div class='del'>-#define RCAR_CAN_ISR_ERSF	(1 &lt;&lt; 5) /* Error (ERS) Interrupt Status Bit */</div><div class='del'>-#define RCAR_CAN_ISR_RXFF	(1 &lt;&lt; 4) /* Reception FIFO Interrupt */</div><div class='del'>-					/* Status Bit */</div><div class='del'>-#define RCAR_CAN_ISR_TXFF	(1 &lt;&lt; 3) /* Transmission FIFO Interrupt */</div><div class='del'>-					/* Status Bit */</div><div class='add'>+#define RCAR_CAN_ISR_ERSF	BIT(5)		/* Error (ERS) Interrupt Status Bit */</div><div class='add'>+#define RCAR_CAN_ISR_RXFF	BIT(4)		/* Reception FIFO Interrupt */</div><div class='add'>+						/* Status Bit */</div><div class='add'>+#define RCAR_CAN_ISR_TXFF	BIT(3)		/* Transmission FIFO Interrupt */</div><div class='add'>+						/* Status Bit */</div><div class='ctx'> </div><div class='ctx'> /* Error Interrupt Enable Register bits */</div><div class='del'>-#define RCAR_CAN_EIER_BLIE	(1 &lt;&lt; 7) /* Bus Lock Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_OLIE	(1 &lt;&lt; 6) /* Overload Frame Transmit */</div><div class='del'>-					/* Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_ORIE	(1 &lt;&lt; 5) /* Receive Overrun  Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_BORIE	(1 &lt;&lt; 4) /* Bus-Off Recovery Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_BOEIE	(1 &lt;&lt; 3) /* Bus-Off Entry Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_EPIE	(1 &lt;&lt; 2) /* Error Passive Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_EWIE	(1 &lt;&lt; 1) /* Error Warning Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_BEIE	(1 &lt;&lt; 0) /* Bus Error Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_BLIE	BIT(7)		/* Bus Lock Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_OLIE	BIT(6)		/* Overload Frame Transmit */</div><div class='add'>+						/* Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_ORIE	BIT(5)		/* Receive Overrun  Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_BORIE	BIT(4)		/* Bus-Off Recovery Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_BOEIE	BIT(3)		/* Bus-Off Entry Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_EPIE	BIT(2)		/* Error Passive Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_EWIE	BIT(1)		/* Error Warning Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_BEIE	BIT(0)		/* Bus Error Interrupt Enable */</div><div class='ctx'> </div><div class='ctx'> /* Error Interrupt Factor Judge Register bits */</div><div class='del'>-#define RCAR_CAN_EIFR_BLIF	(1 &lt;&lt; 7) /* Bus Lock Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_OLIF	(1 &lt;&lt; 6) /* Overload Frame Transmission */</div><div class='del'>-					 /* Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_ORIF	(1 &lt;&lt; 5) /* Receive Overrun Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_BORIF	(1 &lt;&lt; 4) /* Bus-Off Recovery Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_BOEIF	(1 &lt;&lt; 3) /* Bus-Off Entry Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_EPIF	(1 &lt;&lt; 2) /* Error Passive Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_EWIF	(1 &lt;&lt; 1) /* Error Warning Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_BEIF	(1 &lt;&lt; 0) /* Bus Error Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_BLIF	BIT(7)		/* Bus Lock Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_OLIF	BIT(6)		/* Overload Frame Transmission */</div><div class='add'>+						/* Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_ORIF	BIT(5)		/* Receive Overrun Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_BORIF	BIT(4)		/* Bus-Off Recovery Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_BOEIF	BIT(3)		/* Bus-Off Entry Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_EPIF	BIT(2)		/* Error Passive Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_EWIF	BIT(1)		/* Error Warning Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_BEIF	BIT(0)		/* Bus Error Detect Flag */</div><div class='ctx'> </div><div class='ctx'> /* Error Code Store Register bits */</div><div class='del'>-#define RCAR_CAN_ECSR_EDPM	(1 &lt;&lt; 7) /* Error Display Mode Select Bit */</div><div class='del'>-#define RCAR_CAN_ECSR_ADEF	(1 &lt;&lt; 6) /* ACK Delimiter Error Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_BE0F	(1 &lt;&lt; 5) /* Bit Error (dominant) Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_BE1F	(1 &lt;&lt; 4) /* Bit Error (recessive) Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_CEF	(1 &lt;&lt; 3) /* CRC Error Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_AEF	(1 &lt;&lt; 2) /* ACK Error Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_FEF	(1 &lt;&lt; 1) /* Form Error Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_SEF	(1 &lt;&lt; 0) /* Stuff Error Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_EDPM	BIT(7)		/* Error Display Mode Select Bit */</div><div class='add'>+#define RCAR_CAN_ECSR_ADEF	BIT(6)		/* ACK Delimiter Error Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_BE0F	BIT(5)		/* Bit Error (dominant) Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_BE1F	BIT(4)		/* Bit Error (recessive) Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_CEF	BIT(3)		/* CRC Error Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_AEF	BIT(2)		/* ACK Error Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_FEF	BIT(1)		/* Form Error Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_SEF	BIT(0)		/* Stuff Error Flag */</div><div class='ctx'> </div><div class='ctx'> #define RCAR_CAN_NAPI_WEIGHT	4</div><div class='ctx'> #define MAX_STR_READS		0x100</div><div class='hunk'>@@ -248,35 +252,35 @@ static void rcar_can_error(struct net_device *ndev)</div><div class='ctx'> 		if (ecsr &amp; RCAR_CAN_ECSR_ADEF) {</div><div class='ctx'> 			netdev_dbg(priv-&gt;ndev, "ACK Delimiter Error\n");</div><div class='ctx'> 			tx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_ADEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_ADEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='ctx'> 			if (skb)</div><div class='ctx'> 				cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK_DEL;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (ecsr &amp; RCAR_CAN_ECSR_BE0F) {</div><div class='ctx'> 			netdev_dbg(priv-&gt;ndev, "Bit Error (dominant)\n");</div><div class='ctx'> 			tx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_BE0F, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_BE0F, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='ctx'> 			if (skb)</div><div class='ctx'> 				cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (ecsr &amp; RCAR_CAN_ECSR_BE1F) {</div><div class='ctx'> 			netdev_dbg(priv-&gt;ndev, "Bit Error (recessive)\n");</div><div class='ctx'> 			tx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_BE1F, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_BE1F, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='ctx'> 			if (skb)</div><div class='ctx'> 				cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (ecsr &amp; RCAR_CAN_ECSR_CEF) {</div><div class='ctx'> 			netdev_dbg(priv-&gt;ndev, "CRC Error\n");</div><div class='ctx'> 			rx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_CEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_CEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='ctx'> 			if (skb)</div><div class='ctx'> 				cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (ecsr &amp; RCAR_CAN_ECSR_AEF) {</div><div class='ctx'> 			netdev_dbg(priv-&gt;ndev, "ACK Error\n");</div><div class='ctx'> 			tx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_AEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_AEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='ctx'> 			if (skb) {</div><div class='ctx'> 				cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='ctx'> 				cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='hunk'>@@ -285,14 +289,14 @@ static void rcar_can_error(struct net_device *ndev)</div><div class='ctx'> 		if (ecsr &amp; RCAR_CAN_ECSR_FEF) {</div><div class='ctx'> 			netdev_dbg(priv-&gt;ndev, "Form Error\n");</div><div class='ctx'> 			rx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_FEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_FEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='ctx'> 			if (skb)</div><div class='ctx'> 				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (ecsr &amp; RCAR_CAN_ECSR_SEF) {</div><div class='ctx'> 			netdev_dbg(priv-&gt;ndev, "Stuff Error\n");</div><div class='ctx'> 			rx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_SEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_SEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='ctx'> 			if (skb)</div><div class='ctx'> 				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -300,14 +304,14 @@ static void rcar_can_error(struct net_device *ndev)</div><div class='ctx'> 		priv-&gt;can.can_stats.bus_error++;</div><div class='ctx'> 		ndev-&gt;stats.rx_errors += rx_errors;</div><div class='ctx'> 		ndev-&gt;stats.tx_errors += tx_errors;</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_BEIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_BEIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (eifr &amp; RCAR_CAN_EIFR_EWIF) {</div><div class='ctx'> 		netdev_dbg(priv-&gt;ndev, "Error warning interrupt\n");</div><div class='ctx'> 		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='ctx'> 		priv-&gt;can.can_stats.error_warning++;</div><div class='ctx'> 		/* Clear interrupt condition */</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_EWIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_EWIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='ctx'> 		if (skb)</div><div class='ctx'> 			cf-&gt;data[1] = txerr &gt; rxerr ? CAN_ERR_CRTL_TX_WARNING :</div><div class='ctx'> 					      CAN_ERR_CRTL_RX_WARNING;</div><div class='hunk'>@@ -317,7 +321,7 @@ static void rcar_can_error(struct net_device *ndev)</div><div class='ctx'> 		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='ctx'> 		priv-&gt;can.can_stats.error_passive++;</div><div class='ctx'> 		/* Clear interrupt condition */</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_EPIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_EPIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='ctx'> 		if (skb)</div><div class='ctx'> 			cf-&gt;data[1] = txerr &gt; rxerr ? CAN_ERR_CRTL_TX_PASSIVE :</div><div class='ctx'> 					      CAN_ERR_CRTL_RX_PASSIVE;</div><div class='hunk'>@@ -329,7 +333,7 @@ static void rcar_can_error(struct net_device *ndev)</div><div class='ctx'> 		writeb(priv-&gt;ier, &amp;priv-&gt;regs-&gt;ier);</div><div class='ctx'> 		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='ctx'> 		/* Clear interrupt condition */</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_BOEIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_BOEIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='ctx'> 		priv-&gt;can.can_stats.bus_off++;</div><div class='ctx'> 		can_bus_off(ndev);</div><div class='ctx'> 		if (skb)</div><div class='hunk'>@@ -343,7 +347,7 @@ static void rcar_can_error(struct net_device *ndev)</div><div class='ctx'> 		netdev_dbg(priv-&gt;ndev, "Receive overrun error interrupt\n");</div><div class='ctx'> 		ndev-&gt;stats.rx_over_errors++;</div><div class='ctx'> 		ndev-&gt;stats.rx_errors++;</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_ORIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_ORIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='ctx'> 		if (skb) {</div><div class='ctx'> 			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='ctx'> 			cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='hunk'>@@ -354,7 +358,7 @@ static void rcar_can_error(struct net_device *ndev)</div><div class='ctx'> 			   "Overload Frame Transmission error interrupt\n");</div><div class='ctx'> 		ndev-&gt;stats.rx_over_errors++;</div><div class='ctx'> 		ndev-&gt;stats.rx_errors++;</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_OLIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_OLIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='ctx'> 		if (skb) {</div><div class='ctx'> 			cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='ctx'> 			cf-&gt;data[2] |= CAN_ERR_PROT_OVERLOAD;</div><div class='hunk'>@@ -372,10 +376,9 @@ static void rcar_can_tx_done(struct net_device *ndev)</div><div class='ctx'> 	u8 isr;</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='del'>-		u8 unsent = readb(&amp;priv-&gt;regs-&gt;tfcr);</div><div class='add'>+		u8 unsent = FIELD_GET(RCAR_CAN_TFCR_TFUST,</div><div class='add'>+			    readb(&amp;priv-&gt;regs-&gt;tfcr));</div><div class='ctx'> </div><div class='del'>-		unsent = (unsent &amp; RCAR_CAN_TFCR_TFUST) &gt;&gt;</div><div class='del'>-			  RCAR_CAN_TFCR_TFUST_SHIFT;</div><div class='ctx'> 		if (priv-&gt;tx_head - priv-&gt;tx_tail &lt;= unsent)</div><div class='ctx'> 			break;</div><div class='ctx'> 		stats-&gt;tx_packets++;</div><div class='hunk'>@@ -420,15 +423,16 @@ static irqreturn_t rcar_can_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rcar_can_set_bittiming(struct net_device *dev)</div><div class='add'>+static void rcar_can_set_bittiming(struct net_device *ndev)</div><div class='ctx'> {</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='ctx'> 	u32 bcr;</div><div class='ctx'> </div><div class='del'>-	bcr = RCAR_CAN_BCR_TSEG1(bt-&gt;phase_seg1 + bt-&gt;prop_seg - 1) |</div><div class='del'>-	      RCAR_CAN_BCR_BPR(bt-&gt;brp - 1) | RCAR_CAN_BCR_SJW(bt-&gt;sjw - 1) |</div><div class='del'>-	      RCAR_CAN_BCR_TSEG2(bt-&gt;phase_seg2 - 1);</div><div class='add'>+	bcr = FIELD_PREP(RCAR_CAN_BCR_TSEG1, bt-&gt;phase_seg1 + bt-&gt;prop_seg - 1) |</div><div class='add'>+	      FIELD_PREP(RCAR_CAN_BCR_BRP, bt-&gt;brp - 1) |</div><div class='add'>+	      FIELD_PREP(RCAR_CAN_BCR_SJW, bt-&gt;sjw - 1) |</div><div class='add'>+	      FIELD_PREP(RCAR_CAN_BCR_TSEG2, bt-&gt;phase_seg2 - 1);</div><div class='ctx'> 	/* Don't overwrite CLKR with 32-bit BCR access; CLKR has 8-bit access.</div><div class='ctx'> 	 * All the registers are big-endian but they get byte-swapped on 32-bit</div><div class='ctx'> 	 * read/write (but not on 8-bit, contrary to the manuals)...</div><div class='hunk'>@@ -452,16 +456,17 @@ static void rcar_can_start(struct net_device *ndev)</div><div class='ctx'> 	ctlr &amp;= ~RCAR_CAN_CTLR_SLPM;</div><div class='ctx'> 	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='ctx'> 	/* Go to reset mode */</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_CANM_FORCE_RESET;</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_FORCE_RESET);</div><div class='ctx'> 	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='ctx'> 	for (i = 0; i &lt; MAX_STR_READS; i++) {</div><div class='ctx'> 		if (readw(&amp;priv-&gt;regs-&gt;str) &amp; RCAR_CAN_STR_RSTST)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> 	rcar_can_set_bittiming(ndev);</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_IDFM_MIXED; /* Select mixed ID mode */</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_BOM_ENT;	/* Entry to halt mode automatically */</div><div class='del'>-					/* at bus-off */</div><div class='add'>+	/* Select mixed ID mode */</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_IDFM, RCAR_CAN_CTLR_IDFM_MIXED);</div><div class='add'>+	/* Entry to halt mode automatically at bus-off */</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_BOM, RCAR_CAN_CTLR_BOM_ENT);</div><div class='ctx'> 	ctlr |= RCAR_CAN_CTLR_MBM;	/* Select FIFO mailbox mode */</div><div class='ctx'> 	ctlr |= RCAR_CAN_CTLR_MLM;	/* Overrun mode */</div><div class='ctx'> 	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='hunk'>@@ -491,7 +496,9 @@ static void rcar_can_start(struct net_device *ndev)</div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> </div><div class='ctx'> 	/* Go to operation mode */</div><div class='del'>-	writew(ctlr &amp; ~RCAR_CAN_CTLR_CANM, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	ctlr &amp;= ~RCAR_CAN_CTLR_CANM;</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_OPER);</div><div class='add'>+	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='ctx'> 	for (i = 0; i &lt; MAX_STR_READS; i++) {</div><div class='ctx'> 		if (!(readw(&amp;priv-&gt;regs-&gt;str) &amp; RCAR_CAN_STR_RSTST))</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -506,29 +513,28 @@ static int rcar_can_open(struct net_device *ndev)</div><div class='ctx'> 	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	err = pm_runtime_resume_and_get(ndev-&gt;dev.parent);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_err(ndev,</div><div class='del'>-			   "failed to enable peripheral clock, error %d\n",</div><div class='del'>-			   err);</div><div class='add'>+		netdev_err(ndev, "pm_runtime_resume_and_get() failed %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	err = clk_prepare_enable(priv-&gt;can_clk);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_err(ndev, "failed to enable CAN clock, error %d\n",</div><div class='del'>-			   err);</div><div class='del'>-		goto out_clock;</div><div class='add'>+		netdev_err(ndev, "failed to enable CAN clock: %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		goto out_rpm;</div><div class='ctx'> 	}</div><div class='ctx'> 	err = open_candev(ndev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_err(ndev, "open_candev() failed, error %d\n", err);</div><div class='add'>+		netdev_err(ndev, "open_candev() failed %pe\n", ERR_PTR(err));</div><div class='ctx'> 		goto out_can_clock;</div><div class='ctx'> 	}</div><div class='ctx'> 	napi_enable(&amp;priv-&gt;napi);</div><div class='ctx'> 	err = request_irq(ndev-&gt;irq, rcar_can_interrupt, 0, ndev-&gt;name, ndev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_err(ndev, "request_irq(%d) failed, error %d\n",</div><div class='del'>-			   ndev-&gt;irq, err);</div><div class='add'>+		netdev_err(ndev, "request_irq(%d) failed %pe\n", ndev-&gt;irq,</div><div class='add'>+			   ERR_PTR(err));</div><div class='ctx'> 		goto out_close;</div><div class='ctx'> 	}</div><div class='ctx'> 	rcar_can_start(ndev);</div><div class='hunk'>@@ -539,8 +545,8 @@ out_close:</div><div class='ctx'> 	close_candev(ndev);</div><div class='ctx'> out_can_clock:</div><div class='ctx'> 	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='del'>-out_clock:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+out_rpm:</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -553,7 +559,7 @@ static void rcar_can_stop(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	/* Go to (force) reset mode */</div><div class='ctx'> 	ctlr = readw(&amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_CANM_FORCE_RESET;</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_FORCE_RESET);</div><div class='ctx'> 	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='ctx'> 	for (i = 0; i &lt; MAX_STR_READS; i++) {</div><div class='ctx'> 		if (readw(&amp;priv-&gt;regs-&gt;str) &amp; RCAR_CAN_STR_RSTST)</div><div class='hunk'>@@ -578,7 +584,7 @@ static int rcar_can_close(struct net_device *ndev)</div><div class='ctx'> 	free_irq(ndev-&gt;irq, ndev);</div><div class='ctx'> 	napi_disable(&amp;priv-&gt;napi);</div><div class='ctx'> 	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='ctx'> 	close_candev(ndev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -594,9 +600,10 @@ static netdev_tx_t rcar_can_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)	/* Extended frame format */</div><div class='del'>-		data = (cf-&gt;can_id &amp; CAN_EFF_MASK) | RCAR_CAN_IDE;</div><div class='add'>+		data = FIELD_PREP(RCAR_CAN_EID, cf-&gt;can_id &amp; CAN_EFF_MASK) |</div><div class='add'>+		       RCAR_CAN_IDE;</div><div class='ctx'> 	else				/* Standard frame format */</div><div class='del'>-		data = (cf-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; RCAR_CAN_SID_SHIFT;</div><div class='add'>+		data = FIELD_PREP(RCAR_CAN_SID, cf-&gt;can_id &amp; CAN_SFF_MASK);</div><div class='ctx'> </div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_RTR_FLAG) { /* Remote transmission request */</div><div class='ctx'> 		data |= RCAR_CAN_RTR;</div><div class='hunk'>@@ -628,7 +635,6 @@ static const struct net_device_ops rcar_can_netdev_ops = {</div><div class='ctx'> 	.ndo_open = rcar_can_open,</div><div class='ctx'> 	.ndo_stop = rcar_can_close,</div><div class='ctx'> 	.ndo_start_xmit = rcar_can_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops rcar_can_ethtool_ops = {</div><div class='hunk'>@@ -651,9 +657,9 @@ static void rcar_can_rx_pkt(struct rcar_can_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	data = readl(&amp;priv-&gt;regs-&gt;mb[RCAR_CAN_RX_FIFO_MBX].id);</div><div class='ctx'> 	if (data &amp; RCAR_CAN_IDE)</div><div class='del'>-		cf-&gt;can_id = (data &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='add'>+		cf-&gt;can_id = FIELD_GET(RCAR_CAN_EID, data) | CAN_EFF_FLAG;</div><div class='ctx'> 	else</div><div class='del'>-		cf-&gt;can_id = (data &gt;&gt; RCAR_CAN_SID_SHIFT) &amp; CAN_SFF_MASK;</div><div class='add'>+		cf-&gt;can_id = FIELD_GET(RCAR_CAN_SID, data);</div><div class='ctx'> </div><div class='ctx'> 	dlc = readb(&amp;priv-&gt;regs-&gt;mb[RCAR_CAN_RX_FIFO_MBX].dlc);</div><div class='ctx'> 	cf-&gt;len = can_cc_dlc2len(dlc);</div><div class='hunk'>@@ -715,18 +721,21 @@ static int rcar_can_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rcar_can_get_berr_counter(const struct net_device *dev,</div><div class='add'>+static int rcar_can_get_berr_counter(const struct net_device *ndev,</div><div class='ctx'> 				     struct can_berr_counter *bec)</div><div class='ctx'> {</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	err = pm_runtime_resume_and_get(ndev-&gt;dev.parent);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='add'>+</div><div class='ctx'> 	bec-&gt;txerr = readb(&amp;priv-&gt;regs-&gt;tecr);</div><div class='ctx'> 	bec-&gt;rxerr = readb(&amp;priv-&gt;regs-&gt;recr);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -738,6 +747,7 @@ static const char * const clock_names[] = {</div><div class='ctx'> </div><div class='ctx'> static int rcar_can_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	struct rcar_can_priv *priv;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	void __iomem *addr;</div><div class='hunk'>@@ -745,7 +755,7 @@ static int rcar_can_probe(struct platform_device *pdev)</div><div class='ctx'> 	int err = -ENODEV;</div><div class='ctx'> 	int irq;</div><div class='ctx'> </div><div class='del'>-	of_property_read_u32(pdev-&gt;dev.of_node, "renesas,can-clock-select",</div><div class='add'>+	of_property_read_u32(dev-&gt;of_node, "renesas,can-clock-select",</div><div class='ctx'> 			     &amp;clock_select);</div><div class='ctx'> </div><div class='ctx'> 	irq = platform_get_irq(pdev, 0);</div><div class='hunk'>@@ -762,30 +772,21 @@ static int rcar_can_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ndev = alloc_candev(sizeof(struct rcar_can_priv), RCAR_CAN_FIFO_DEPTH);</div><div class='ctx'> 	if (!ndev) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "alloc_candev() failed\n");</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;clk = devm_clk_get(&amp;pdev-&gt;dev, "clkp1");</div><div class='del'>-	if (IS_ERR(priv-&gt;clk)) {</div><div class='del'>-		err = PTR_ERR(priv-&gt;clk);</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "cannot get peripheral clock, error %d\n",</div><div class='del'>-			err);</div><div class='del'>-		goto fail_clk;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (!(BIT(clock_select) &amp; RCAR_SUPPORTED_CLOCKS)) {</div><div class='ctx'> 		err = -EINVAL;</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "invalid CAN clock selected\n");</div><div class='add'>+		dev_err(dev, "invalid CAN clock selected\n");</div><div class='ctx'> 		goto fail_clk;</div><div class='ctx'> 	}</div><div class='del'>-	priv-&gt;can_clk = devm_clk_get(&amp;pdev-&gt;dev, clock_names[clock_select]);</div><div class='add'>+	priv-&gt;can_clk = devm_clk_get(dev, clock_names[clock_select]);</div><div class='ctx'> 	if (IS_ERR(priv-&gt;can_clk)) {</div><div class='add'>+		dev_err(dev, "cannot get CAN clock: %pe\n", priv-&gt;can_clk);</div><div class='ctx'> 		err = PTR_ERR(priv-&gt;can_clk);</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "cannot get CAN clock, error %d\n", err);</div><div class='ctx'> 		goto fail_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -802,21 +803,24 @@ static int rcar_can_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv-&gt;can.do_get_berr_counter = rcar_can_get_berr_counter;</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING;</div><div class='ctx'> 	platform_set_drvdata(pdev, ndev);</div><div class='del'>-	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='add'>+	SET_NETDEV_DEV(ndev, dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_napi_add_weight(ndev, &amp;priv-&gt;napi, rcar_can_rx_poll,</div><div class='ctx'> 			      RCAR_CAN_NAPI_WEIGHT);</div><div class='add'>+</div><div class='add'>+	pm_runtime_enable(dev);</div><div class='add'>+</div><div class='ctx'> 	err = register_candev(ndev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "register_candev() failed, error %d\n",</div><div class='del'>-			err);</div><div class='del'>-		goto fail_candev;</div><div class='add'>+		dev_err(dev, "register_candev() failed %pe\n", ERR_PTR(err));</div><div class='add'>+		goto fail_rpm;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_info(&amp;pdev-&gt;dev, "device registered (IRQ%d)\n", ndev-&gt;irq);</div><div class='add'>+	dev_info(dev, "device registered (IRQ%d)\n", ndev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-fail_candev:</div><div class='add'>+fail_rpm:</div><div class='add'>+	pm_runtime_disable(dev);</div><div class='ctx'> 	netif_napi_del(&amp;priv-&gt;napi);</div><div class='ctx'> fail_clk:</div><div class='ctx'> 	free_candev(ndev);</div><div class='hunk'>@@ -830,11 +834,12 @@ static void rcar_can_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='ctx'> 	unregister_candev(ndev);</div><div class='add'>+	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='ctx'> 	netif_napi_del(&amp;priv-&gt;napi);</div><div class='ctx'> 	free_candev(ndev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused rcar_can_suspend(struct device *dev)</div><div class='add'>+static int rcar_can_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='ctx'> 	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='hunk'>@@ -847,38 +852,32 @@ static int __maybe_unused rcar_can_suspend(struct device *dev)</div><div class='ctx'> 	netif_device_detach(ndev);</div><div class='ctx'> </div><div class='ctx'> 	ctlr = readw(&amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_CANM_HALT;</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_HALT);</div><div class='ctx'> 	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='ctx'> 	ctlr |= RCAR_CAN_CTLR_SLPM;</div><div class='ctx'> 	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='ctx'> </div><div class='del'>-	clk_disable(priv-&gt;clk);</div><div class='add'>+	pm_runtime_put(dev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused rcar_can_resume(struct device *dev)</div><div class='add'>+static int rcar_can_resume(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u16 ctlr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	err = clk_enable(priv-&gt;clk);</div><div class='add'>+	err = pm_runtime_resume_and_get(dev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_err(ndev, "clk_enable() failed, error %d\n", err);</div><div class='add'>+		netdev_err(ndev, "pm_runtime_resume_and_get() failed %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ctlr = readw(&amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	ctlr &amp;= ~RCAR_CAN_CTLR_SLPM;</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	ctlr &amp;= ~RCAR_CAN_CTLR_CANM;</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	rcar_can_start(ndev);</div><div class='ctx'> </div><div class='ctx'> 	netif_device_attach(ndev);</div><div class='ctx'> 	netif_start_queue(ndev);</div><div class='hunk'>@@ -886,7 +885,8 @@ static int __maybe_unused rcar_can_resume(struct device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static SIMPLE_DEV_PM_OPS(rcar_can_pm_ops, rcar_can_suspend, rcar_can_resume);</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(rcar_can_pm_ops, rcar_can_suspend,</div><div class='add'>+				rcar_can_resume);</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id rcar_can_of_table[] __maybe_unused = {</div><div class='ctx'> 	{ .compatible = "renesas,can-r8a7778" },</div><div class='hunk'>@@ -904,7 +904,7 @@ static struct platform_driver rcar_can_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = RCAR_CAN_DRV_NAME,</div><div class='ctx'> 		.of_match_table = of_match_ptr(rcar_can_of_table),</div><div class='del'>-		.pm = &amp;rcar_can_pm_ops,</div><div class='add'>+		.pm = pm_sleep_ptr(&amp;rcar_can_pm_ops),</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = rcar_can_probe,</div><div class='ctx'> 	.remove = rcar_can_remove,</div><div class='head'>diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c<br/>index df1a5d0b37b2..7895e1fdea1c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rcar/rcar_canfd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rcar/rcar_canfd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rcar/rcar_canfd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rcar/rcar_canfd.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'>  * wherever it is modified to a readable name.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/bitmap.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='hunk'>@@ -74,33 +75,24 @@</div><div class='ctx'> #define RCANFD_GSTS_GNOPM		(BIT(0) | BIT(1) | BIT(2) | BIT(3))</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDGERFL / RSCFDnGERFL */</div><div class='del'>-#define RCANFD_GERFL_EEF0_7		GENMASK(23, 16)</div><div class='del'>-#define RCANFD_GERFL_EEF(ch)		BIT(16 + (ch))</div><div class='add'>+#define RCANFD_GERFL_EEF		GENMASK(23, 16)</div><div class='ctx'> #define RCANFD_GERFL_CMPOF		BIT(3)	/* CAN FD only */</div><div class='ctx'> #define RCANFD_GERFL_THLES		BIT(2)</div><div class='ctx'> #define RCANFD_GERFL_MES		BIT(1)</div><div class='ctx'> #define RCANFD_GERFL_DEF		BIT(0)</div><div class='ctx'> </div><div class='ctx'> #define RCANFD_GERFL_ERR(gpriv, x) \</div><div class='del'>-	((x) &amp; (reg_gen4(gpriv, RCANFD_GERFL_EEF0_7, \</div><div class='del'>-			 RCANFD_GERFL_EEF(0) | RCANFD_GERFL_EEF(1)) | \</div><div class='del'>-		RCANFD_GERFL_MES | \</div><div class='del'>-		((gpriv)-&gt;fdmode ? RCANFD_GERFL_CMPOF : 0)))</div><div class='add'>+({\</div><div class='add'>+	typeof(gpriv) (_gpriv) = (gpriv); \</div><div class='add'>+	((x) &amp; ((FIELD_PREP(RCANFD_GERFL_EEF, (_gpriv)-&gt;channels_mask)) | \</div><div class='add'>+		RCANFD_GERFL_MES | ((_gpriv)-&gt;fdmode ? RCANFD_GERFL_CMPOF : 0))); \</div><div class='add'>+})</div><div class='ctx'> </div><div class='ctx'> /* AFL Rx rules registers */</div><div class='ctx'> </div><div class='del'>-/* RSCFDnCFDGAFLCFG0 / RSCFDnGAFLCFG0 */</div><div class='del'>-#define RCANFD_GAFLCFG_SETRNC(gpriv, n, x) \</div><div class='del'>-	(((x) &amp; reg_gen4(gpriv, 0x1ff, 0xff)) &lt;&lt; \</div><div class='del'>-	 (reg_gen4(gpriv, 16, 24) - ((n) &amp; 1) * reg_gen4(gpriv, 16, 8)))</div><div class='del'>-</div><div class='del'>-#define RCANFD_GAFLCFG_GETRNC(gpriv, n, x) \</div><div class='del'>-	(((x) &gt;&gt; (reg_gen4(gpriv, 16, 24) - ((n) &amp; 1) * reg_gen4(gpriv, 16, 8))) &amp; \</div><div class='del'>-	 reg_gen4(gpriv, 0x1ff, 0xff))</div><div class='del'>-</div><div class='ctx'> /* RSCFDnCFDGAFLECTR / RSCFDnGAFLECTR */</div><div class='ctx'> #define RCANFD_GAFLECTR_AFLDAE		BIT(8)</div><div class='del'>-#define RCANFD_GAFLECTR_AFLPN(gpriv, x)	((x) &amp; reg_gen4(gpriv, 0x7f, 0x1f))</div><div class='add'>+#define RCANFD_GAFLECTR_AFLPN(gpriv, page_num)	((page_num) &amp; (gpriv)-&gt;info-&gt;max_aflpn)</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDGAFLIDj / RSCFDnGAFLIDj */</div><div class='ctx'> #define RCANFD_GAFLID_GAFLLB		BIT(29)</div><div class='hunk'>@@ -111,22 +103,13 @@</div><div class='ctx'> /* Channel register bits */</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCmCFG - Classical CAN only */</div><div class='del'>-#define RCANFD_CFG_SJW(x)		(((x) &amp; 0x3) &lt;&lt; 24)</div><div class='del'>-#define RCANFD_CFG_TSEG2(x)		(((x) &amp; 0x7) &lt;&lt; 20)</div><div class='del'>-#define RCANFD_CFG_TSEG1(x)		(((x) &amp; 0xf) &lt;&lt; 16)</div><div class='del'>-#define RCANFD_CFG_BRP(x)		(((x) &amp; 0x3ff) &lt;&lt; 0)</div><div class='add'>+#define RCANFD_CFG_SJW		GENMASK(25, 24)</div><div class='add'>+#define RCANFD_CFG_TSEG2	GENMASK(22, 20)</div><div class='add'>+#define RCANFD_CFG_TSEG1	GENMASK(19, 16)</div><div class='add'>+#define RCANFD_CFG_BRP		GENMASK(9, 0)</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDCmNCFG - CAN FD only */</div><div class='del'>-#define RCANFD_NCFG_NTSEG2(gpriv, x) \</div><div class='del'>-	(((x) &amp; reg_gen4(gpriv, 0x7f, 0x1f)) &lt;&lt; reg_gen4(gpriv, 25, 24))</div><div class='del'>-</div><div class='del'>-#define RCANFD_NCFG_NTSEG1(gpriv, x) \</div><div class='del'>-	(((x) &amp; reg_gen4(gpriv, 0xff, 0x7f)) &lt;&lt; reg_gen4(gpriv, 17, 16))</div><div class='del'>-</div><div class='del'>-#define RCANFD_NCFG_NSJW(gpriv, x) \</div><div class='del'>-	(((x) &amp; reg_gen4(gpriv, 0x7f, 0x1f)) &lt;&lt; reg_gen4(gpriv, 10, 11))</div><div class='del'>-</div><div class='del'>-#define RCANFD_NCFG_NBRP(x)		(((x) &amp; 0x3ff) &lt;&lt; 0)</div><div class='add'>+#define RCANFD_NCFG_NBRP	GENMASK(9, 0)</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDCmCTR / RSCFDnCmCTR */</div><div class='ctx'> #define RCANFD_CCTR_CTME		BIT(24)</div><div class='hunk'>@@ -186,22 +169,24 @@</div><div class='ctx'> #define RCANFD_CERFL_ERR(x)		((x) &amp; (0x7fff)) /* above bits 14:0 */</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDCmDCFG */</div><div class='del'>-#define RCANFD_DCFG_DSJW(gpriv, x)	(((x) &amp; reg_gen4(gpriv, 0xf, 0x7)) &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-#define RCANFD_DCFG_DTSEG2(gpriv, x) \</div><div class='del'>-	(((x) &amp; reg_gen4(gpriv, 0x0f, 0x7)) &lt;&lt; reg_gen4(gpriv, 16, 20))</div><div class='del'>-</div><div class='del'>-#define RCANFD_DCFG_DTSEG1(gpriv, x) \</div><div class='del'>-	(((x) &amp; reg_gen4(gpriv, 0x1f, 0xf)) &lt;&lt; reg_gen4(gpriv, 8, 16))</div><div class='del'>-</div><div class='del'>-#define RCANFD_DCFG_DBRP(x)		(((x) &amp; 0xff) &lt;&lt; 0)</div><div class='add'>+#define RCANFD_DCFG_DBRP		GENMASK(7, 0)</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDCmFDCFG */</div><div class='ctx'> #define RCANFD_GEN4_FDCFG_CLOE		BIT(30)</div><div class='ctx'> #define RCANFD_GEN4_FDCFG_FDOE		BIT(28)</div><div class='add'>+#define RCANFD_FDCFG_TDCO		GENMASK(23, 16)</div><div class='ctx'> #define RCANFD_FDCFG_TDCE		BIT(9)</div><div class='ctx'> #define RCANFD_FDCFG_TDCOC		BIT(8)</div><div class='del'>-#define RCANFD_FDCFG_TDCO(x)		(((x) &amp; 0x7f) &gt;&gt; 16)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCmFDSTS */</div><div class='add'>+#define RCANFD_FDSTS_SOC		GENMASK(31, 24)</div><div class='add'>+#define RCANFD_FDSTS_EOC		GENMASK(23, 16)</div><div class='add'>+#define RCANFD_GEN4_FDSTS_TDCVF		BIT(15)</div><div class='add'>+#define RCANFD_GEN4_FDSTS_PNSTS		GENMASK(13, 12)</div><div class='add'>+#define RCANFD_FDSTS_SOCO		BIT(9)</div><div class='add'>+#define RCANFD_FDSTS_EOCO		BIT(8)</div><div class='add'>+#define RCANFD_FDSTS_TDCVF		BIT(7)</div><div class='add'>+#define RCANFD_FDSTS_TDCR		GENMASK(7, 0)</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDRFCCx */</div><div class='ctx'> #define RCANFD_RFCC_RFIM		BIT(12)</div><div class='hunk'>@@ -222,8 +207,6 @@</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDRFPTRx */</div><div class='ctx'> #define RCANFD_RFPTR_RFDLC(x)		(((x) &gt;&gt; 28) &amp; 0xf)</div><div class='del'>-#define RCANFD_RFPTR_RFPTR(x)		(((x) &gt;&gt; 16) &amp; 0xfff)</div><div class='del'>-#define RCANFD_RFPTR_RFTS(x)		(((x) &gt;&gt; 0) &amp; 0xffff)</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDRFFDSTSx */</div><div class='ctx'> #define RCANFD_RFFDSTS_RFFDF		BIT(2)</div><div class='hunk'>@@ -233,11 +216,14 @@</div><div class='ctx'> /* Common FIFO bits */</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDCFCCk */</div><div class='del'>-#define RCANFD_CFCC_CFTML(gpriv, x)	\</div><div class='del'>-	(((x) &amp; reg_gen4(gpriv, 0x1f, 0xf)) &lt;&lt; reg_gen4(gpriv, 16, 20))</div><div class='del'>-#define RCANFD_CFCC_CFM(gpriv, x)	(((x) &amp; 0x3) &lt;&lt; reg_gen4(gpriv,  8, 16))</div><div class='add'>+#define RCANFD_CFCC_CFTML(gpriv, cftml) \</div><div class='add'>+({\</div><div class='add'>+	typeof(gpriv) (_gpriv) = (gpriv); \</div><div class='add'>+	(((cftml) &amp; (_gpriv)-&gt;info-&gt;max_cftml) &lt;&lt; (_gpriv)-&gt;info-&gt;sh-&gt;cftml); \</div><div class='add'>+})</div><div class='add'>+#define RCANFD_CFCC_CFM(gpriv, x)	(((x) &amp; 0x3) &lt;&lt; (gpriv)-&gt;info-&gt;sh-&gt;cfm)</div><div class='ctx'> #define RCANFD_CFCC_CFIM		BIT(12)</div><div class='del'>-#define RCANFD_CFCC_CFDC(gpriv, x)	(((x) &amp; 0x7) &lt;&lt; reg_gen4(gpriv, 21,  8))</div><div class='add'>+#define RCANFD_CFCC_CFDC(gpriv, x)	(((x) &amp; 0x7) &lt;&lt; (gpriv)-&gt;info-&gt;sh-&gt;cfdc)</div><div class='ctx'> #define RCANFD_CFCC_CFPLS(x)		(((x) &amp; 0x7) &lt;&lt; 4)</div><div class='ctx'> #define RCANFD_CFCC_CFTXIE		BIT(2)</div><div class='ctx'> #define RCANFD_CFCC_CFE			BIT(0)</div><div class='hunk'>@@ -252,12 +238,9 @@</div><div class='ctx'> /* RSCFDnCFDCFIDk */</div><div class='ctx'> #define RCANFD_CFID_CFIDE		BIT(31)</div><div class='ctx'> #define RCANFD_CFID_CFRTR		BIT(30)</div><div class='del'>-#define RCANFD_CFID_CFID_MASK(x)	((x) &amp; 0x1fffffff)</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDCFPTRk */</div><div class='ctx'> #define RCANFD_CFPTR_CFDLC(x)		(((x) &amp; 0xf) &lt;&lt; 28)</div><div class='del'>-#define RCANFD_CFPTR_CFPTR(x)		(((x) &amp; 0xfff) &lt;&lt; 16)</div><div class='del'>-#define RCANFD_CFPTR_CFTS(x)		(((x) &amp; 0xff) &lt;&lt; 0)</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDCFFDCSTSk */</div><div class='ctx'> #define RCANFD_CFFDCSTS_CFFDF		BIT(2)</div><div class='hunk'>@@ -298,14 +281,14 @@</div><div class='ctx'> /* RSCFDnCFDGAFLECTR / RSCFDnGAFLECTR */</div><div class='ctx'> #define RCANFD_GAFLECTR			(0x0098)</div><div class='ctx'> /* RSCFDnCFDGAFLCFG / RSCFDnGAFLCFG */</div><div class='del'>-#define RCANFD_GAFLCFG(ch)		(0x009c + (0x04 * ((ch) / 2)))</div><div class='add'>+#define RCANFD_GAFLCFG(w)		(0x009c + (0x04 * (w)))</div><div class='ctx'> /* RSCFDnCFDRMNB / RSCFDnRMNB */</div><div class='ctx'> #define RCANFD_RMNB			(0x00a4)</div><div class='ctx'> /* RSCFDnCFDRMND / RSCFDnRMND */</div><div class='ctx'> #define RCANFD_RMND(y)			(0x00a8 + (0x04 * (y)))</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDRFCCx / RSCFDnRFCCx */</div><div class='del'>-#define RCANFD_RFCC(gpriv, x)		(reg_gen4(gpriv, 0x00c0, 0x00b8) + (0x04 * (x)))</div><div class='add'>+#define RCANFD_RFCC(gpriv, x)		((gpriv)-&gt;info-&gt;regs-&gt;rfcc + (0x04 * (x)))</div><div class='ctx'> /* RSCFDnCFDRFSTSx / RSCFDnRFSTSx */</div><div class='ctx'> #define RCANFD_RFSTS(gpriv, x)		(RCANFD_RFCC(gpriv, x) + 0x20)</div><div class='ctx'> /* RSCFDnCFDRFPCTRx / RSCFDnRFPCTRx */</div><div class='hunk'>@@ -315,67 +298,14 @@</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDCFCCx / RSCFDnCFCCx */</div><div class='ctx'> #define RCANFD_CFCC(gpriv, ch, idx) \</div><div class='del'>-	(reg_gen4(gpriv, 0x0120, 0x0118) + (0x0c * (ch)) + (0x04 * (idx)))</div><div class='add'>+	((gpriv)-&gt;info-&gt;regs-&gt;cfcc + (0x0c * (ch)) + (0x04 * (idx)))</div><div class='ctx'> /* RSCFDnCFDCFSTSx / RSCFDnCFSTSx */</div><div class='ctx'> #define RCANFD_CFSTS(gpriv, ch, idx) \</div><div class='del'>-	(reg_gen4(gpriv, 0x01e0, 0x0178) + (0x0c * (ch)) + (0x04 * (idx)))</div><div class='add'>+	((gpriv)-&gt;info-&gt;regs-&gt;cfsts + (0x0c * (ch)) + (0x04 * (idx)))</div><div class='ctx'> /* RSCFDnCFDCFPCTRx / RSCFDnCFPCTRx */</div><div class='ctx'> #define RCANFD_CFPCTR(gpriv, ch, idx) \</div><div class='del'>-	(reg_gen4(gpriv, 0x0240, 0x01d8) + (0x0c * (ch)) + (0x04 * (idx)))</div><div class='del'>-</div><div class='del'>-/* RSCFDnCFDFESTS / RSCFDnFESTS */</div><div class='del'>-#define RCANFD_FESTS			(0x0238)</div><div class='del'>-/* RSCFDnCFDFFSTS / RSCFDnFFSTS */</div><div class='del'>-#define RCANFD_FFSTS			(0x023c)</div><div class='del'>-/* RSCFDnCFDFMSTS / RSCFDnFMSTS */</div><div class='del'>-#define RCANFD_FMSTS			(0x0240)</div><div class='del'>-/* RSCFDnCFDRFISTS / RSCFDnRFISTS */</div><div class='del'>-#define RCANFD_RFISTS			(0x0244)</div><div class='del'>-/* RSCFDnCFDCFRISTS / RSCFDnCFRISTS */</div><div class='del'>-#define RCANFD_CFRISTS			(0x0248)</div><div class='del'>-/* RSCFDnCFDCFTISTS / RSCFDnCFTISTS */</div><div class='del'>-#define RCANFD_CFTISTS			(0x024c)</div><div class='del'>-</div><div class='del'>-/* RSCFDnCFDTMCp / RSCFDnTMCp */</div><div class='del'>-#define RCANFD_TMC(p)			(0x0250 + (0x01 * (p)))</div><div class='del'>-/* RSCFDnCFDTMSTSp / RSCFDnTMSTSp */</div><div class='del'>-#define RCANFD_TMSTS(p)			(0x02d0 + (0x01 * (p)))</div><div class='del'>-</div><div class='del'>-/* RSCFDnCFDTMTRSTSp / RSCFDnTMTRSTSp */</div><div class='del'>-#define RCANFD_TMTRSTS(y)		(0x0350 + (0x04 * (y)))</div><div class='del'>-/* RSCFDnCFDTMTARSTSp / RSCFDnTMTARSTSp */</div><div class='del'>-#define RCANFD_TMTARSTS(y)		(0x0360 + (0x04 * (y)))</div><div class='del'>-/* RSCFDnCFDTMTCSTSp / RSCFDnTMTCSTSp */</div><div class='del'>-#define RCANFD_TMTCSTS(y)		(0x0370 + (0x04 * (y)))</div><div class='del'>-/* RSCFDnCFDTMTASTSp / RSCFDnTMTASTSp */</div><div class='del'>-#define RCANFD_TMTASTS(y)		(0x0380 + (0x04 * (y)))</div><div class='del'>-/* RSCFDnCFDTMIECy / RSCFDnTMIECy */</div><div class='del'>-#define RCANFD_TMIEC(y)			(0x0390 + (0x04 * (y)))</div><div class='del'>-</div><div class='del'>-/* RSCFDnCFDTXQCCm / RSCFDnTXQCCm */</div><div class='del'>-#define RCANFD_TXQCC(m)			(0x03a0 + (0x04 * (m)))</div><div class='del'>-/* RSCFDnCFDTXQSTSm / RSCFDnTXQSTSm */</div><div class='del'>-#define RCANFD_TXQSTS(m)		(0x03c0 + (0x04 * (m)))</div><div class='del'>-/* RSCFDnCFDTXQPCTRm / RSCFDnTXQPCTRm */</div><div class='del'>-#define RCANFD_TXQPCTR(m)		(0x03e0 + (0x04 * (m)))</div><div class='del'>-</div><div class='del'>-/* RSCFDnCFDTHLCCm / RSCFDnTHLCCm */</div><div class='del'>-#define RCANFD_THLCC(m)			(0x0400 + (0x04 * (m)))</div><div class='del'>-/* RSCFDnCFDTHLSTSm / RSCFDnTHLSTSm */</div><div class='del'>-#define RCANFD_THLSTS(m)		(0x0420 + (0x04 * (m)))</div><div class='del'>-/* RSCFDnCFDTHLPCTRm / RSCFDnTHLPCTRm */</div><div class='del'>-#define RCANFD_THLPCTR(m)		(0x0440 + (0x04 * (m)))</div><div class='del'>-</div><div class='del'>-/* RSCFDnCFDGTINTSTS0 / RSCFDnGTINTSTS0 */</div><div class='del'>-#define RCANFD_GTINTSTS0		(0x0460)</div><div class='del'>-/* RSCFDnCFDGTINTSTS1 / RSCFDnGTINTSTS1 */</div><div class='del'>-#define RCANFD_GTINTSTS1		(0x0464)</div><div class='del'>-/* RSCFDnCFDGTSTCFG / RSCFDnGTSTCFG */</div><div class='del'>-#define RCANFD_GTSTCFG			(0x0468)</div><div class='del'>-/* RSCFDnCFDGTSTCTR / RSCFDnGTSTCTR */</div><div class='del'>-#define RCANFD_GTSTCTR			(0x046c)</div><div class='del'>-/* RSCFDnCFDGLOCKK / RSCFDnGLOCKK */</div><div class='del'>-#define RCANFD_GLOCKK			(0x047c)</div><div class='add'>+	((gpriv)-&gt;info-&gt;regs-&gt;cfpctr + (0x0c * (ch)) + (0x04 * (idx)))</div><div class='add'>+</div><div class='ctx'> /* RSCFDnCFDGRMCFG */</div><div class='ctx'> #define RCANFD_GRMCFG			(0x04fc)</div><div class='ctx'> </div><div class='hunk'>@@ -393,12 +323,6 @@</div><div class='ctx'> /* RSCFDnGAFLXXXj offset */</div><div class='ctx'> #define RCANFD_C_GAFL_OFFSET		(0x0500)</div><div class='ctx'> </div><div class='del'>-/* RSCFDnRMXXXq -&gt; RCANFD_C_RMXXX(q) */</div><div class='del'>-#define RCANFD_C_RMID(q)		(0x0600 + (0x10 * (q)))</div><div class='del'>-#define RCANFD_C_RMPTR(q)		(0x0604 + (0x10 * (q)))</div><div class='del'>-#define RCANFD_C_RMDF0(q)		(0x0608 + (0x10 * (q)))</div><div class='del'>-#define RCANFD_C_RMDF1(q)		(0x060c + (0x10 * (q)))</div><div class='del'>-</div><div class='ctx'> /* RSCFDnRFXXx -&gt; RCANFD_C_RFXX(x) */</div><div class='ctx'> #define RCANFD_C_RFOFFSET	(0x0e00)</div><div class='ctx'> #define RCANFD_C_RFID(x)	(RCANFD_C_RFOFFSET + (0x10 * (x)))</div><div class='hunk'>@@ -418,42 +342,26 @@</div><div class='ctx'> #define RCANFD_C_CFDF(ch, idx, df) \</div><div class='ctx'> 	(RCANFD_C_CFOFFSET + 0x08 + (0x30 * (ch)) + (0x10 * (idx)) + (0x04 * (df)))</div><div class='ctx'> </div><div class='del'>-/* RSCFDnTMXXp -&gt; RCANFD_C_TMXX(p) */</div><div class='del'>-#define RCANFD_C_TMID(p)		(0x1000 + (0x10 * (p)))</div><div class='del'>-#define RCANFD_C_TMPTR(p)		(0x1004 + (0x10 * (p)))</div><div class='del'>-#define RCANFD_C_TMDF0(p)		(0x1008 + (0x10 * (p)))</div><div class='del'>-#define RCANFD_C_TMDF1(p)		(0x100c + (0x10 * (p)))</div><div class='del'>-</div><div class='del'>-/* RSCFDnTHLACCm */</div><div class='del'>-#define RCANFD_C_THLACC(m)		(0x1800 + (0x04 * (m)))</div><div class='del'>-/* RSCFDnRPGACCr */</div><div class='del'>-#define RCANFD_C_RPGACC(r)		(0x1900 + (0x04 * (r)))</div><div class='del'>-</div><div class='ctx'> /* R-Car Gen4 Classical and CAN FD mode specific register map */</div><div class='del'>-#define RCANFD_GEN4_FDCFG(m)		(0x1404 + (0x20 * (m)))</div><div class='del'>-</div><div class='ctx'> #define RCANFD_GEN4_GAFL_OFFSET		(0x1800)</div><div class='ctx'> </div><div class='ctx'> /* CAN FD mode specific register map */</div><div class='ctx'> </div><div class='del'>-/* RSCFDnCFDCmXXX -&gt; RCANFD_F_XXX(m) */</div><div class='del'>-#define RCANFD_F_DCFG(gpriv, m)		(reg_gen4(gpriv, 0x1400, 0x0500) + (0x20 * (m)))</div><div class='del'>-#define RCANFD_F_CFDCFG(m)		(0x0504 + (0x20 * (m)))</div><div class='del'>-#define RCANFD_F_CFDCTR(m)		(0x0508 + (0x20 * (m)))</div><div class='del'>-#define RCANFD_F_CFDSTS(m)		(0x050c + (0x20 * (m)))</div><div class='del'>-#define RCANFD_F_CFDCRC(m)		(0x0510 + (0x20 * (m)))</div><div class='add'>+/* RSCFDnCFDCmXXX -&gt; gpriv-&gt;fcbase[m].xxx */</div><div class='add'>+struct rcar_canfd_f_c {</div><div class='add'>+	u32 dcfg;</div><div class='add'>+	u32 cfdcfg;</div><div class='add'>+	u32 cfdctr;</div><div class='add'>+	u32 cfdsts;</div><div class='add'>+	u32 cfdcrc;</div><div class='add'>+	u32 pad[3];</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDGAFLXXXj offset */</div><div class='ctx'> #define RCANFD_F_GAFL_OFFSET		(0x1000)</div><div class='ctx'> </div><div class='del'>-/* RSCFDnCFDRMXXXq -&gt; RCANFD_F_RMXXX(q) */</div><div class='del'>-#define RCANFD_F_RMID(q)		(0x2000 + (0x20 * (q)))</div><div class='del'>-#define RCANFD_F_RMPTR(q)		(0x2004 + (0x20 * (q)))</div><div class='del'>-#define RCANFD_F_RMFDSTS(q)		(0x2008 + (0x20 * (q)))</div><div class='del'>-#define RCANFD_F_RMDF(q, b)		(0x200c + (0x04 * (b)) + (0x20 * (q)))</div><div class='del'>-</div><div class='ctx'> /* RSCFDnCFDRFXXx -&gt; RCANFD_F_RFXX(x) */</div><div class='del'>-#define RCANFD_F_RFOFFSET(gpriv)	reg_gen4(gpriv, 0x6000, 0x3000)</div><div class='add'>+#define RCANFD_F_RFOFFSET(gpriv)	((gpriv)-&gt;info-&gt;regs-&gt;rfoffset)</div><div class='ctx'> #define RCANFD_F_RFID(gpriv, x)		(RCANFD_F_RFOFFSET(gpriv) + (0x80 * (x)))</div><div class='ctx'> #define RCANFD_F_RFPTR(gpriv, x)	(RCANFD_F_RFOFFSET(gpriv) + 0x04 + (0x80 * (x)))</div><div class='ctx'> #define RCANFD_F_RFFDSTS(gpriv, x)	(RCANFD_F_RFOFFSET(gpriv) + 0x08 + (0x80 * (x)))</div><div class='hunk'>@@ -461,7 +369,7 @@</div><div class='ctx'> 	(RCANFD_F_RFOFFSET(gpriv) + 0x0c + (0x80 * (x)) + (0x04 * (df)))</div><div class='ctx'> </div><div class='ctx'> /* RSCFDnCFDCFXXk -&gt; RCANFD_F_CFXX(ch, k) */</div><div class='del'>-#define RCANFD_F_CFOFFSET(gpriv)	reg_gen4(gpriv, 0x6400, 0x3400)</div><div class='add'>+#define RCANFD_F_CFOFFSET(gpriv)	((gpriv)-&gt;info-&gt;regs-&gt;cfoffset)</div><div class='ctx'> </div><div class='ctx'> #define RCANFD_F_CFID(gpriv, ch, idx) \</div><div class='ctx'> 	(RCANFD_F_CFOFFSET(gpriv) + (0x180 * (ch)) + (0x80 * (idx)))</div><div class='hunk'>@@ -476,23 +384,11 @@</div><div class='ctx'> 	(RCANFD_F_CFOFFSET(gpriv) + 0x0c + (0x180 * (ch)) + (0x80 * (idx)) + \</div><div class='ctx'> 	 (0x04 * (df)))</div><div class='ctx'> </div><div class='del'>-/* RSCFDnCFDTMXXp -&gt; RCANFD_F_TMXX(p) */</div><div class='del'>-#define RCANFD_F_TMID(p)		(0x4000 + (0x20 * (p)))</div><div class='del'>-#define RCANFD_F_TMPTR(p)		(0x4004 + (0x20 * (p)))</div><div class='del'>-#define RCANFD_F_TMFDCTR(p)		(0x4008 + (0x20 * (p)))</div><div class='del'>-#define RCANFD_F_TMDF(p, b)		(0x400c + (0x20 * (p)) + (0x04 * (b)))</div><div class='del'>-</div><div class='del'>-/* RSCFDnCFDTHLACCm */</div><div class='del'>-#define RCANFD_F_THLACC(m)		(0x6000 + (0x04 * (m)))</div><div class='del'>-/* RSCFDnCFDRPGACCr */</div><div class='del'>-#define RCANFD_F_RPGACC(r)		(0x6400 + (0x04 * (r)))</div><div class='del'>-</div><div class='ctx'> /* Constants */</div><div class='ctx'> #define RCANFD_FIFO_DEPTH		8	/* Tx FIFO depth */</div><div class='ctx'> #define RCANFD_NAPI_WEIGHT		8	/* Rx poll quota */</div><div class='ctx'> </div><div class='ctx'> #define RCANFD_NUM_CHANNELS		8	/* Eight channels max */</div><div class='del'>-#define RCANFD_CHANNELS_MASK		BIT((RCANFD_NUM_CHANNELS) - 1)</div><div class='ctx'> </div><div class='ctx'> #define RCANFD_GAFL_PAGENUM(entry)	((entry) / 16)</div><div class='ctx'> #define RCANFD_CHANNEL_NUMRULES		1	/* only one rule per channel */</div><div class='hunk'>@@ -510,12 +406,44 @@</div><div class='ctx'> </div><div class='ctx'> struct rcar_canfd_global;</div><div class='ctx'> </div><div class='add'>+struct rcar_canfd_regs {</div><div class='add'>+	u16 rfcc;	/* RX FIFO Configuration/Control Register */</div><div class='add'>+	u16 cfcc;	/* Common FIFO Configuration/Control Register */</div><div class='add'>+	u16 cfsts;	/* Common FIFO Status Register */</div><div class='add'>+	u16 cfpctr;	/* Common FIFO Pointer Control Register */</div><div class='add'>+	u16 coffset;	/* Channel Data Bitrate Configuration Register */</div><div class='add'>+	u16 rfoffset;	/* Receive FIFO buffer access ID register */</div><div class='add'>+	u16 cfoffset;	/* Transmit/receive FIFO buffer access ID register */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rcar_canfd_shift_data {</div><div class='add'>+	u8 ntseg2;	/* Nominal Bit Rate Time Segment 2 Control */</div><div class='add'>+	u8 ntseg1;	/* Nominal Bit Rate Time Segment 1 Control */</div><div class='add'>+	u8 nsjw;	/* Nominal Bit Rate Resynchronization Jump Width Control */</div><div class='add'>+	u8 dtseg2;	/* Data Bit Rate Time Segment 2 Control */</div><div class='add'>+	u8 dtseg1;	/* Data Bit Rate Time Segment 1 Control */</div><div class='add'>+	u8 cftml;	/* Common FIFO TX Message Buffer Link */</div><div class='add'>+	u8 cfm;		/* Common FIFO Mode */</div><div class='add'>+	u8 cfdc;	/* Common FIFO Depth Configuration */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct rcar_canfd_hw_info {</div><div class='add'>+	const struct can_bittiming_const *nom_bittiming;</div><div class='add'>+	const struct can_bittiming_const *data_bittiming;</div><div class='add'>+	const struct can_tdc_const *tdc_const;</div><div class='add'>+	const struct rcar_canfd_regs *regs;</div><div class='add'>+	const struct rcar_canfd_shift_data *sh;</div><div class='add'>+	u8 rnc_field_width;</div><div class='add'>+	u8 max_aflpn;</div><div class='add'>+	u8 max_cftml;</div><div class='ctx'> 	u8 max_channels;</div><div class='ctx'> 	u8 postdiv;</div><div class='ctx'> 	/* hardware features */</div><div class='ctx'> 	unsigned shared_global_irqs:1;	/* Has shared global irqs */</div><div class='ctx'> 	unsigned multi_channel_irqs:1;	/* Has multiple channel irqs */</div><div class='add'>+	unsigned ch_interface_mode:1;	/* Has channel interface mode */</div><div class='add'>+	unsigned shared_can_regs:1;	/* Has shared classical can registers */</div><div class='add'>+	unsigned external_clk:1;	/* Has external clock */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Channel priv data */</div><div class='hunk'>@@ -536,9 +464,11 @@ struct rcar_canfd_channel {</div><div class='ctx'> struct rcar_canfd_global {</div><div class='ctx'> 	struct rcar_canfd_channel *ch[RCANFD_NUM_CHANNELS];</div><div class='ctx'> 	void __iomem *base;		/* Register base address */</div><div class='add'>+	struct rcar_canfd_f_c __iomem *fcbase;</div><div class='ctx'> 	struct platform_device *pdev;	/* Respective platform device */</div><div class='ctx'> 	struct clk *clkp;		/* Peripheral clock */</div><div class='ctx'> 	struct clk *can_clk;		/* fCAN clock */</div><div class='add'>+	struct clk *clk_ram;		/* Clock RAM */</div><div class='ctx'> 	unsigned long channels_mask;	/* Enabled channels mask */</div><div class='ctx'> 	bool extclk;			/* CANFD or Ext clock */</div><div class='ctx'> 	bool fdmode;			/* CAN FD or Classical CAN only mode */</div><div class='hunk'>@@ -548,7 +478,7 @@ struct rcar_canfd_global {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* CAN FD mode nominal rate constants */</div><div class='del'>-static const struct can_bittiming_const rcar_canfd_nom_bittiming_const = {</div><div class='add'>+static const struct can_bittiming_const rcar_canfd_gen3_nom_bittiming_const = {</div><div class='ctx'> 	.name = RCANFD_DRV_NAME,</div><div class='ctx'> 	.tseg1_min = 2,</div><div class='ctx'> 	.tseg1_max = 128,</div><div class='hunk'>@@ -560,8 +490,20 @@ static const struct can_bittiming_const rcar_canfd_nom_bittiming_const = {</div><div class='ctx'> 	.brp_inc = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct can_bittiming_const rcar_canfd_gen4_nom_bittiming_const = {</div><div class='add'>+	.name = RCANFD_DRV_NAME,</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* CAN FD mode data rate constants */</div><div class='del'>-static const struct can_bittiming_const rcar_canfd_data_bittiming_const = {</div><div class='add'>+static const struct can_bittiming_const rcar_canfd_gen3_data_bittiming_const = {</div><div class='ctx'> 	.name = RCANFD_DRV_NAME,</div><div class='ctx'> 	.tseg1_min = 2,</div><div class='ctx'> 	.tseg1_max = 16,</div><div class='hunk'>@@ -573,6 +515,18 @@ static const struct can_bittiming_const rcar_canfd_data_bittiming_const = {</div><div class='ctx'> 	.brp_inc = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct can_bittiming_const rcar_canfd_gen4_data_bittiming_const = {</div><div class='add'>+	.name = RCANFD_DRV_NAME,</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 32,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Classical CAN mode bitrate constants */</div><div class='ctx'> static const struct can_bittiming_const rcar_canfd_bittiming_const = {</div><div class='ctx'> 	.name = RCANFD_DRV_NAME,</div><div class='hunk'>@@ -586,36 +540,136 @@ static const struct can_bittiming_const rcar_canfd_bittiming_const = {</div><div class='ctx'> 	.brp_inc = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* CAN FD Transmission Delay Compensation constants */</div><div class='add'>+static const struct can_tdc_const rcar_canfd_gen3_tdc_const = {</div><div class='add'>+	.tdcv_min = 1,</div><div class='add'>+	.tdcv_max = 128,</div><div class='add'>+	.tdco_min = 1,</div><div class='add'>+	.tdco_max = 128,</div><div class='add'>+	.tdcf_min = 0,	/* Filter window not supported */</div><div class='add'>+	.tdcf_max = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_tdc_const rcar_canfd_gen4_tdc_const = {</div><div class='add'>+	.tdcv_min = 1,</div><div class='add'>+	.tdcv_max = 256,</div><div class='add'>+	.tdco_min = 1,</div><div class='add'>+	.tdco_max = 256,</div><div class='add'>+	.tdcf_min = 0,	/* Filter window not supported */</div><div class='add'>+	.tdcf_max = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_regs rcar_gen3_regs = {</div><div class='add'>+	.rfcc = 0x00b8,</div><div class='add'>+	.cfcc = 0x0118,</div><div class='add'>+	.cfsts = 0x0178,</div><div class='add'>+	.cfpctr = 0x01d8,</div><div class='add'>+	.coffset = 0x0500,</div><div class='add'>+	.rfoffset = 0x3000,</div><div class='add'>+	.cfoffset = 0x3400,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_regs rcar_gen4_regs = {</div><div class='add'>+	.rfcc = 0x00c0,</div><div class='add'>+	.cfcc = 0x0120,</div><div class='add'>+	.cfsts = 0x01e0,</div><div class='add'>+	.cfpctr = 0x0240,</div><div class='add'>+	.coffset = 0x1400,</div><div class='add'>+	.rfoffset = 0x6000,</div><div class='add'>+	.cfoffset = 0x6400,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_shift_data rcar_gen3_shift_data = {</div><div class='add'>+	.ntseg2 = 24,</div><div class='add'>+	.ntseg1 = 16,</div><div class='add'>+	.nsjw = 11,</div><div class='add'>+	.dtseg2 = 20,</div><div class='add'>+	.dtseg1 = 16,</div><div class='add'>+	.cftml = 20,</div><div class='add'>+	.cfm = 16,</div><div class='add'>+	.cfdc = 8,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_shift_data rcar_gen4_shift_data = {</div><div class='add'>+	.ntseg2 = 25,</div><div class='add'>+	.ntseg1 = 17,</div><div class='add'>+	.nsjw = 10,</div><div class='add'>+	.dtseg2 = 16,</div><div class='add'>+	.dtseg1 = 8,</div><div class='add'>+	.cftml = 16,</div><div class='add'>+	.cfm = 8,</div><div class='add'>+	.cfdc = 21,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {</div><div class='add'>+	.nom_bittiming = &amp;rcar_canfd_gen3_nom_bittiming_const,</div><div class='add'>+	.data_bittiming = &amp;rcar_canfd_gen3_data_bittiming_const,</div><div class='add'>+	.tdc_const = &amp;rcar_canfd_gen3_tdc_const,</div><div class='add'>+	.regs = &amp;rcar_gen3_regs,</div><div class='add'>+	.sh = &amp;rcar_gen3_shift_data,</div><div class='add'>+	.rnc_field_width = 8,</div><div class='add'>+	.max_aflpn = 31,</div><div class='add'>+	.max_cftml = 15,</div><div class='ctx'> 	.max_channels = 2,</div><div class='ctx'> 	.postdiv = 2,</div><div class='ctx'> 	.shared_global_irqs = 1,</div><div class='add'>+	.ch_interface_mode = 0,</div><div class='add'>+	.shared_can_regs = 0,</div><div class='add'>+	.external_clk = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct rcar_canfd_hw_info rcar_gen4_hw_info = {</div><div class='add'>+	.nom_bittiming = &amp;rcar_canfd_gen4_nom_bittiming_const,</div><div class='add'>+	.data_bittiming = &amp;rcar_canfd_gen4_data_bittiming_const,</div><div class='add'>+	.tdc_const = &amp;rcar_canfd_gen4_tdc_const,</div><div class='add'>+	.regs = &amp;rcar_gen4_regs,</div><div class='add'>+	.sh = &amp;rcar_gen4_shift_data,</div><div class='add'>+	.rnc_field_width = 16,</div><div class='add'>+	.max_aflpn = 127,</div><div class='add'>+	.max_cftml = 31,</div><div class='ctx'> 	.max_channels = 8,</div><div class='ctx'> 	.postdiv = 2,</div><div class='ctx'> 	.shared_global_irqs = 1,</div><div class='add'>+	.ch_interface_mode = 1,</div><div class='add'>+	.shared_can_regs = 1,</div><div class='add'>+	.external_clk = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct rcar_canfd_hw_info rzg2l_hw_info = {</div><div class='add'>+	.nom_bittiming = &amp;rcar_canfd_gen3_nom_bittiming_const,</div><div class='add'>+	.data_bittiming = &amp;rcar_canfd_gen3_data_bittiming_const,</div><div class='add'>+	.tdc_const = &amp;rcar_canfd_gen3_tdc_const,</div><div class='add'>+	.regs = &amp;rcar_gen3_regs,</div><div class='add'>+	.sh = &amp;rcar_gen3_shift_data,</div><div class='add'>+	.rnc_field_width = 8,</div><div class='add'>+	.max_aflpn = 31,</div><div class='add'>+	.max_cftml = 15,</div><div class='ctx'> 	.max_channels = 2,</div><div class='ctx'> 	.postdiv = 1,</div><div class='ctx'> 	.multi_channel_irqs = 1,</div><div class='add'>+	.ch_interface_mode = 0,</div><div class='add'>+	.shared_can_regs = 0,</div><div class='add'>+	.external_clk = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Helper functions */</div><div class='del'>-static inline bool is_gen4(struct rcar_canfd_global *gpriv)</div><div class='del'>-{</div><div class='del'>-	return gpriv-&gt;info == &amp;rcar_gen4_hw_info;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u32 reg_gen4(struct rcar_canfd_global *gpriv,</div><div class='del'>-			   u32 gen4, u32 not_gen4)</div><div class='del'>-{</div><div class='del'>-	return is_gen4(gpriv) ? gen4 : not_gen4;</div><div class='del'>-}</div><div class='add'>+static const struct rcar_canfd_hw_info r9a09g047_hw_info = {</div><div class='add'>+	.nom_bittiming = &amp;rcar_canfd_gen4_nom_bittiming_const,</div><div class='add'>+	.data_bittiming = &amp;rcar_canfd_gen4_data_bittiming_const,</div><div class='add'>+	.tdc_const = &amp;rcar_canfd_gen4_tdc_const,</div><div class='add'>+	.regs = &amp;rcar_gen4_regs,</div><div class='add'>+	.sh = &amp;rcar_gen4_shift_data,</div><div class='add'>+	.rnc_field_width = 16,</div><div class='add'>+	.max_aflpn = 63,</div><div class='add'>+	.max_cftml = 31,</div><div class='add'>+	.max_channels = 6,</div><div class='add'>+	.postdiv = 1,</div><div class='add'>+	.multi_channel_irqs = 1,</div><div class='add'>+	.ch_interface_mode = 1,</div><div class='add'>+	.shared_can_regs = 1,</div><div class='add'>+	.external_clk = 0,</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+/* Helper functions */</div><div class='ctx'> static inline void rcar_canfd_update(u32 mask, u32 val, u32 __iomem *reg)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data = readl(reg);</div><div class='hunk'>@@ -651,26 +705,41 @@ static void rcar_canfd_update_bit(void __iomem *base, u32 reg,</div><div class='ctx'> 	rcar_canfd_update(mask, val, base + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rcar_canfd_set_bit_reg(void __iomem *addr, u32 val)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_update(val, val, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_clear_bit_reg(void __iomem *addr, u32 val)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_update(val, 0, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_update_bit_reg(void __iomem *addr, u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_update(mask, val, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void rcar_canfd_get_data(struct rcar_canfd_channel *priv,</div><div class='ctx'> 				struct canfd_frame *cf, u32 off)</div><div class='ctx'> {</div><div class='add'>+	u32 *data = (u32 *)cf-&gt;data;</div><div class='ctx'> 	u32 i, lwords;</div><div class='ctx'> </div><div class='ctx'> 	lwords = DIV_ROUND_UP(cf-&gt;len, sizeof(u32));</div><div class='ctx'> 	for (i = 0; i &lt; lwords; i++)</div><div class='del'>-		*((u32 *)cf-&gt;data + i) =</div><div class='del'>-			rcar_canfd_read(priv-&gt;base, off + i * sizeof(u32));</div><div class='add'>+		data[i] = rcar_canfd_read(priv-&gt;base, off + i * sizeof(u32));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rcar_canfd_put_data(struct rcar_canfd_channel *priv,</div><div class='ctx'> 				struct canfd_frame *cf, u32 off)</div><div class='ctx'> {</div><div class='add'>+	const u32 *data = (u32 *)cf-&gt;data;</div><div class='ctx'> 	u32 i, lwords;</div><div class='ctx'> </div><div class='ctx'> 	lwords = DIV_ROUND_UP(cf-&gt;len, sizeof(u32));</div><div class='ctx'> 	for (i = 0; i &lt; lwords; i++)</div><div class='del'>-		rcar_canfd_write(priv-&gt;base, off + i * sizeof(u32),</div><div class='del'>-				 *((u32 *)cf-&gt;data + i));</div><div class='add'>+		rcar_canfd_write(priv-&gt;base, off + i * sizeof(u32), data[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rcar_canfd_tx_failure_cleanup(struct net_device *ndev)</div><div class='hunk'>@@ -681,28 +750,20 @@ static void rcar_canfd_tx_failure_cleanup(struct net_device *ndev)</div><div class='ctx'> 		can_free_echo_skb(ndev, i, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rcar_canfd_set_mode(struct rcar_canfd_global *gpriv)</div><div class='add'>+static void rcar_canfd_set_rnc(struct rcar_canfd_global *gpriv, unsigned int ch,</div><div class='add'>+			       unsigned int num_rules)</div><div class='ctx'> {</div><div class='del'>-	if (is_gen4(gpriv)) {</div><div class='del'>-		u32 ch, val = gpriv-&gt;fdmode ? RCANFD_GEN4_FDCFG_FDOE</div><div class='del'>-					    : RCANFD_GEN4_FDCFG_CLOE;</div><div class='del'>-</div><div class='del'>-		for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask,</div><div class='del'>-				 gpriv-&gt;info-&gt;max_channels)</div><div class='del'>-			rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GEN4_FDCFG(ch),</div><div class='del'>-					   val);</div><div class='del'>-	} else {</div><div class='del'>-		if (gpriv-&gt;fdmode)</div><div class='del'>-			rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GRMCFG,</div><div class='del'>-					   RCANFD_GRMCFG_RCMC);</div><div class='del'>-		else</div><div class='del'>-			rcar_canfd_clear_bit(gpriv-&gt;base, RCANFD_GRMCFG,</div><div class='del'>-					     RCANFD_GRMCFG_RCMC);</div><div class='del'>-	}</div><div class='add'>+	unsigned int rnc_stride = 32 / gpriv-&gt;info-&gt;rnc_field_width;</div><div class='add'>+	unsigned int shift = 32 - (ch % rnc_stride + 1) * gpriv-&gt;info-&gt;rnc_field_width;</div><div class='add'>+	unsigned int w = ch / rnc_stride;</div><div class='add'>+	u32 rnc = num_rules &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GAFLCFG(w), rnc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = &amp;gpriv-&gt;pdev-&gt;dev;</div><div class='ctx'> 	u32 sts, ch;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -712,7 +773,7 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)</div><div class='ctx'> 	err = readl_poll_timeout((gpriv-&gt;base + RCANFD_GSTS), sts,</div><div class='ctx'> 				 !(sts &amp; RCANFD_GSTS_GRAMINIT), 2, 500000);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_dbg(&amp;gpriv-&gt;pdev-&gt;dev, "global raminit failed\n");</div><div class='add'>+		dev_dbg(dev, "global raminit failed\n");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -725,7 +786,7 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)</div><div class='ctx'> 	err = readl_poll_timeout((gpriv-&gt;base + RCANFD_GSTS), sts,</div><div class='ctx'> 				 (sts &amp; RCANFD_GSTS_GRSTSTS), 2, 500000);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_dbg(&amp;gpriv-&gt;pdev-&gt;dev, "global reset failed\n");</div><div class='add'>+		dev_dbg(dev, "global reset failed\n");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -733,7 +794,14 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)</div><div class='ctx'> 	rcar_canfd_write(gpriv-&gt;base, RCANFD_GERFL, 0x0);</div><div class='ctx'> </div><div class='ctx'> 	/* Set the controller into appropriate mode */</div><div class='del'>-	rcar_canfd_set_mode(gpriv);</div><div class='add'>+	if (!gpriv-&gt;info-&gt;ch_interface_mode) {</div><div class='add'>+		if (gpriv-&gt;fdmode)</div><div class='add'>+			rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GRMCFG,</div><div class='add'>+					   RCANFD_GRMCFG_RCMC);</div><div class='add'>+		else</div><div class='add'>+			rcar_canfd_clear_bit(gpriv-&gt;base, RCANFD_GRMCFG,</div><div class='add'>+					     RCANFD_GRMCFG_RCMC);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Transition all Channels to reset mode */</div><div class='ctx'> 	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='hunk'>@@ -749,11 +817,27 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)</div><div class='ctx'> 					 (sts &amp; RCANFD_CSTS_CRSTSTS),</div><div class='ctx'> 					 2, 500000);</div><div class='ctx'> 		if (err) {</div><div class='del'>-			dev_dbg(&amp;gpriv-&gt;pdev-&gt;dev,</div><div class='del'>-				"channel %u reset failed\n", ch);</div><div class='add'>+			dev_dbg(dev, "channel %u reset failed\n", ch);</div><div class='ctx'> 			return err;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		/* Set the controller into appropriate mode */</div><div class='add'>+		if (gpriv-&gt;info-&gt;ch_interface_mode) {</div><div class='add'>+			/* Do not set CLOE and FDOE simultaneously */</div><div class='add'>+			if (!gpriv-&gt;fdmode) {</div><div class='add'>+				rcar_canfd_clear_bit_reg(&amp;gpriv-&gt;fcbase[ch].cfdcfg,</div><div class='add'>+							 RCANFD_GEN4_FDCFG_FDOE);</div><div class='add'>+				rcar_canfd_set_bit_reg(&amp;gpriv-&gt;fcbase[ch].cfdcfg,</div><div class='add'>+						       RCANFD_GEN4_FDCFG_CLOE);</div><div class='add'>+			} else {</div><div class='add'>+				rcar_canfd_clear_bit_reg(&amp;gpriv-&gt;fcbase[ch].cfdcfg,</div><div class='add'>+							 RCANFD_GEN4_FDCFG_FDOE);</div><div class='add'>+				rcar_canfd_clear_bit_reg(&amp;gpriv-&gt;fcbase[ch].cfdcfg,</div><div class='add'>+							 RCANFD_GEN4_FDCFG_CLOE);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -787,30 +871,21 @@ static void rcar_canfd_configure_controller(struct rcar_canfd_global *gpriv)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rcar_canfd_configure_afl_rules(struct rcar_canfd_global *gpriv,</div><div class='del'>-					   u32 ch)</div><div class='add'>+					   u32 ch, u32 rule_entry)</div><div class='ctx'> {</div><div class='del'>-	u32 cfg;</div><div class='del'>-	int offset, start, page, num_rules = RCANFD_CHANNEL_NUMRULES;</div><div class='add'>+	unsigned int offset, page, num_rules = RCANFD_CHANNEL_NUMRULES;</div><div class='add'>+	u32 rule_entry_index = rule_entry % 16;</div><div class='ctx'> 	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='ctx'> </div><div class='del'>-	if (ch == 0) {</div><div class='del'>-		start = 0; /* Channel 0 always starts from 0th rule */</div><div class='del'>-	} else {</div><div class='del'>-		/* Get number of Channel 0 rules and adjust */</div><div class='del'>-		cfg = rcar_canfd_read(gpriv-&gt;base, RCANFD_GAFLCFG(ch));</div><div class='del'>-		start = RCANFD_GAFLCFG_GETRNC(gpriv, 0, cfg);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Enable write access to entry */</div><div class='del'>-	page = RCANFD_GAFL_PAGENUM(start);</div><div class='add'>+	page = RCANFD_GAFL_PAGENUM(rule_entry);</div><div class='ctx'> 	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GAFLECTR,</div><div class='ctx'> 			   (RCANFD_GAFLECTR_AFLPN(gpriv, page) |</div><div class='ctx'> 			    RCANFD_GAFLECTR_AFLDAE));</div><div class='ctx'> </div><div class='ctx'> 	/* Write number of rules for channel */</div><div class='del'>-	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GAFLCFG(ch),</div><div class='del'>-			   RCANFD_GAFLCFG_SETRNC(gpriv, ch, num_rules));</div><div class='del'>-	if (is_gen4(gpriv))</div><div class='add'>+	rcar_canfd_set_rnc(gpriv, ch, num_rules);</div><div class='add'>+	if (gpriv-&gt;info-&gt;shared_can_regs)</div><div class='ctx'> 		offset = RCANFD_GEN4_GAFL_OFFSET;</div><div class='ctx'> 	else if (gpriv-&gt;fdmode)</div><div class='ctx'> 		offset = RCANFD_F_GAFL_OFFSET;</div><div class='hunk'>@@ -818,13 +893,13 @@ static void rcar_canfd_configure_afl_rules(struct rcar_canfd_global *gpriv,</div><div class='ctx'> 		offset = RCANFD_C_GAFL_OFFSET;</div><div class='ctx'> </div><div class='ctx'> 	/* Accept all IDs */</div><div class='del'>-	rcar_canfd_write(gpriv-&gt;base, RCANFD_GAFLID(offset, start), 0);</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_GAFLID(offset, rule_entry_index), 0);</div><div class='ctx'> 	/* IDE or RTR is not considered for matching */</div><div class='del'>-	rcar_canfd_write(gpriv-&gt;base, RCANFD_GAFLM(offset, start), 0);</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_GAFLM(offset, rule_entry_index), 0);</div><div class='ctx'> 	/* Any data length accepted */</div><div class='del'>-	rcar_canfd_write(gpriv-&gt;base, RCANFD_GAFLP0(offset, start), 0);</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_GAFLP0(offset, rule_entry_index), 0);</div><div class='ctx'> 	/* Place the msg in corresponding Rx FIFO entry */</div><div class='del'>-	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GAFLP1(offset, start),</div><div class='add'>+	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GAFLP1(offset, rule_entry_index),</div><div class='ctx'> 			   RCANFD_GAFLP1_GAFLFDP(ridx));</div><div class='ctx'> </div><div class='ctx'> 	/* Disable write access to page */</div><div class='hunk'>@@ -950,7 +1025,7 @@ static void rcar_canfd_global_error(struct net_device *ndev)</div><div class='ctx'> 	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='ctx'> </div><div class='ctx'> 	gerfl = rcar_canfd_read(priv-&gt;base, RCANFD_GERFL);</div><div class='del'>-	if (gerfl &amp; RCANFD_GERFL_EEF(ch)) {</div><div class='add'>+	if (gerfl &amp; FIELD_PREP(RCANFD_GERFL_EEF, BIT(ch))) {</div><div class='ctx'> 		netdev_dbg(ndev, "Ch%u: ECC Error flag\n", ch);</div><div class='ctx'> 		stats-&gt;tx_dropped++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1307,14 +1382,52 @@ static irqreturn_t rcar_canfd_channel_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rcar_canfd_set_bittiming(struct net_device *dev)</div><div class='add'>+static inline u32 rcar_canfd_compute_nominal_bit_rate_cfg(struct rcar_canfd_channel *priv,</div><div class='add'>+							  u16 tseg1, u16 tseg2, u16 sjw, u16 brp)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	const struct rcar_canfd_hw_info *info = gpriv-&gt;info;</div><div class='add'>+	u32 ntseg1, ntseg2, nsjw, nbrp;</div><div class='add'>+</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) || gpriv-&gt;info-&gt;shared_can_regs) {</div><div class='add'>+		ntseg1 = (tseg1 &amp; (info-&gt;nom_bittiming-&gt;tseg1_max - 1)) &lt;&lt; info-&gt;sh-&gt;ntseg1;</div><div class='add'>+		ntseg2 = (tseg2 &amp; (info-&gt;nom_bittiming-&gt;tseg2_max - 1)) &lt;&lt; info-&gt;sh-&gt;ntseg2;</div><div class='add'>+		nsjw = (sjw &amp; (info-&gt;nom_bittiming-&gt;sjw_max - 1)) &lt;&lt; info-&gt;sh-&gt;nsjw;</div><div class='add'>+		nbrp = FIELD_PREP(RCANFD_NCFG_NBRP, brp);</div><div class='add'>+	} else {</div><div class='add'>+		ntseg1 = FIELD_PREP(RCANFD_CFG_TSEG1, tseg1);</div><div class='add'>+		ntseg2 = FIELD_PREP(RCANFD_CFG_TSEG2, tseg2);</div><div class='add'>+		nsjw = FIELD_PREP(RCANFD_CFG_SJW, sjw);</div><div class='add'>+		nbrp = FIELD_PREP(RCANFD_CFG_BRP, brp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return (ntseg1 | ntseg2 | nsjw | nbrp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 rcar_canfd_compute_data_bit_rate_cfg(const struct rcar_canfd_hw_info *info,</div><div class='add'>+						       u16 tseg1, u16 tseg2, u16 sjw, u16 brp)</div><div class='ctx'> {</div><div class='del'>-	struct rcar_canfd_channel *priv = netdev_priv(dev);</div><div class='add'>+	u32 dtseg1, dtseg2, dsjw, dbrp;</div><div class='add'>+</div><div class='add'>+	dtseg1 = (tseg1 &amp; (info-&gt;data_bittiming-&gt;tseg1_max - 1)) &lt;&lt; info-&gt;sh-&gt;dtseg1;</div><div class='add'>+	dtseg2 = (tseg2 &amp; (info-&gt;data_bittiming-&gt;tseg2_max - 1)) &lt;&lt; info-&gt;sh-&gt;dtseg2;</div><div class='add'>+	dsjw = (sjw &amp; (info-&gt;data_bittiming-&gt;sjw_max - 1)) &lt;&lt; 24;</div><div class='add'>+	dbrp = FIELD_PREP(RCANFD_DCFG_DBRP, brp);</div><div class='add'>+</div><div class='add'>+	return (dtseg1 | dtseg2 | dsjw | dbrp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_set_bittiming(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	u32 mask = RCANFD_FDCFG_TDCO | RCANFD_FDCFG_TDCE | RCANFD_FDCFG_TDCOC;</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='ctx'> 	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	const struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	const struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	const struct can_tdc_const *tdc_const = priv-&gt;can.fd.tdc_const;</div><div class='add'>+	const struct can_tdc *tdc = &amp;priv-&gt;can.fd.tdc;</div><div class='add'>+	u32 cfg, tdcmode = 0, tdco = 0;</div><div class='ctx'> 	u16 brp, sjw, tseg1, tseg2;</div><div class='del'>-	u32 cfg;</div><div class='ctx'> 	u32 ch = priv-&gt;channel;</div><div class='ctx'> </div><div class='ctx'> 	/* Nominal bit timing settings */</div><div class='hunk'>@@ -1322,47 +1435,33 @@ static void rcar_canfd_set_bittiming(struct net_device *dev)</div><div class='ctx'> 	sjw = bt-&gt;sjw - 1;</div><div class='ctx'> 	tseg1 = bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1;</div><div class='ctx'> 	tseg2 = bt-&gt;phase_seg2 - 1;</div><div class='add'>+	cfg = rcar_canfd_compute_nominal_bit_rate_cfg(priv, tseg1, tseg2, sjw, brp);</div><div class='add'>+	rcar_canfd_write(priv-&gt;base, RCANFD_CCFG(ch), cfg);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='del'>-		/* CAN FD only mode */</div><div class='del'>-		cfg = (RCANFD_NCFG_NTSEG1(gpriv, tseg1) | RCANFD_NCFG_NBRP(brp) |</div><div class='del'>-		       RCANFD_NCFG_NSJW(gpriv, sjw) | RCANFD_NCFG_NTSEG2(gpriv, tseg2));</div><div class='del'>-</div><div class='del'>-		rcar_canfd_write(priv-&gt;base, RCANFD_CCFG(ch), cfg);</div><div class='del'>-		netdev_dbg(priv-&gt;ndev, "nrate: brp %u, sjw %u, tseg1 %u, tseg2 %u\n",</div><div class='del'>-			   brp, sjw, tseg1, tseg2);</div><div class='del'>-</div><div class='del'>-		/* Data bit timing settings */</div><div class='del'>-		brp = dbt-&gt;brp - 1;</div><div class='del'>-		sjw = dbt-&gt;sjw - 1;</div><div class='del'>-		tseg1 = dbt-&gt;prop_seg + dbt-&gt;phase_seg1 - 1;</div><div class='del'>-		tseg2 = dbt-&gt;phase_seg2 - 1;</div><div class='del'>-</div><div class='del'>-		cfg = (RCANFD_DCFG_DTSEG1(gpriv, tseg1) | RCANFD_DCFG_DBRP(brp) |</div><div class='del'>-		       RCANFD_DCFG_DSJW(gpriv, sjw) | RCANFD_DCFG_DTSEG2(gpriv, tseg2));</div><div class='del'>-</div><div class='del'>-		rcar_canfd_write(priv-&gt;base, RCANFD_F_DCFG(gpriv, ch), cfg);</div><div class='del'>-		netdev_dbg(priv-&gt;ndev, "drate: brp %u, sjw %u, tseg1 %u, tseg2 %u\n",</div><div class='del'>-			   brp, sjw, tseg1, tseg2);</div><div class='del'>-	} else {</div><div class='del'>-		/* Classical CAN only mode */</div><div class='del'>-		if (is_gen4(gpriv)) {</div><div class='del'>-			cfg = (RCANFD_NCFG_NTSEG1(gpriv, tseg1) |</div><div class='del'>-			       RCANFD_NCFG_NBRP(brp) |</div><div class='del'>-			       RCANFD_NCFG_NSJW(gpriv, sjw) |</div><div class='del'>-			       RCANFD_NCFG_NTSEG2(gpriv, tseg2));</div><div class='del'>-		} else {</div><div class='del'>-			cfg = (RCANFD_CFG_TSEG1(tseg1) |</div><div class='del'>-			       RCANFD_CFG_BRP(brp) |</div><div class='del'>-			       RCANFD_CFG_SJW(sjw) |</div><div class='del'>-			       RCANFD_CFG_TSEG2(tseg2));</div><div class='del'>-		}</div><div class='add'>+	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-		rcar_canfd_write(priv-&gt;base, RCANFD_CCFG(ch), cfg);</div><div class='del'>-		netdev_dbg(priv-&gt;ndev,</div><div class='del'>-			   "rate: brp %u, sjw %u, tseg1 %u, tseg2 %u\n",</div><div class='del'>-			   brp, sjw, tseg1, tseg2);</div><div class='add'>+	/* Data bit timing settings */</div><div class='add'>+	brp = dbt-&gt;brp - 1;</div><div class='add'>+	sjw = dbt-&gt;sjw - 1;</div><div class='add'>+	tseg1 = dbt-&gt;prop_seg + dbt-&gt;phase_seg1 - 1;</div><div class='add'>+	tseg2 = dbt-&gt;phase_seg2 - 1;</div><div class='add'>+	cfg = rcar_canfd_compute_data_bit_rate_cfg(gpriv-&gt;info, tseg1, tseg2, sjw, brp);</div><div class='add'>+	writel(cfg, &amp;gpriv-&gt;fcbase[ch].dcfg);</div><div class='add'>+</div><div class='add'>+	/* Transceiver Delay Compensation */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_TDC_AUTO) {</div><div class='add'>+		/* TDC enabled, measured + offset */</div><div class='add'>+		tdcmode = RCANFD_FDCFG_TDCE;</div><div class='add'>+		tdco = tdc-&gt;tdco - 1;</div><div class='add'>+	} else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_TDC_MANUAL) {</div><div class='add'>+		/* TDC enabled, offset only */</div><div class='add'>+		tdcmode = RCANFD_FDCFG_TDCE | RCANFD_FDCFG_TDCOC;</div><div class='add'>+		tdco = min(tdc-&gt;tdcv + tdc-&gt;tdco, tdc_const-&gt;tdco_max) - 1;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	rcar_canfd_update_bit_reg(&amp;gpriv-&gt;fcbase[ch].cfdcfg, mask,</div><div class='add'>+				  tdcmode | FIELD_PREP(RCANFD_FDCFG_TDCO, tdco));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rcar_canfd_start(struct net_device *ndev)</div><div class='hunk'>@@ -1480,8 +1579,8 @@ static int rcar_canfd_close(struct net_device *ndev)</div><div class='ctx'> 	netif_stop_queue(ndev);</div><div class='ctx'> 	rcar_canfd_stop(ndev);</div><div class='ctx'> 	napi_disable(&amp;priv-&gt;napi);</div><div class='del'>-	clk_disable_unprepare(gpriv-&gt;can_clk);</div><div class='ctx'> 	close_candev(ndev);</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;can_clk);</div><div class='ctx'> 	phy_power_off(priv-&gt;transceiver);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1511,7 +1610,7 @@ static netdev_tx_t rcar_canfd_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	dlc = RCANFD_CFPTR_CFDLC(can_fd_len2dlc(cf-&gt;len));</div><div class='ctx'> </div><div class='del'>-	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) || is_gen4(gpriv)) {</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) || gpriv-&gt;info-&gt;shared_can_regs) {</div><div class='ctx'> 		rcar_canfd_write(priv-&gt;base,</div><div class='ctx'> 				 RCANFD_F_CFID(gpriv, ch, RCANFD_CFFIFO_IDX), id);</div><div class='ctx'> 		rcar_canfd_write(priv-&gt;base,</div><div class='hunk'>@@ -1562,7 +1661,8 @@ static netdev_tx_t rcar_canfd_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> static void rcar_canfd_rx_pkt(struct rcar_canfd_channel *priv)</div><div class='ctx'> {</div><div class='del'>-	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='ctx'> 	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='ctx'> 	struct canfd_frame *cf;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -1570,7 +1670,7 @@ static void rcar_canfd_rx_pkt(struct rcar_canfd_channel *priv)</div><div class='ctx'> 	u32 ch = priv-&gt;channel;</div><div class='ctx'> 	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='ctx'> </div><div class='del'>-	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) || is_gen4(gpriv)) {</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) || gpriv-&gt;info-&gt;shared_can_regs) {</div><div class='ctx'> 		id = rcar_canfd_read(priv-&gt;base, RCANFD_F_RFID(gpriv, ridx));</div><div class='ctx'> 		dlc = rcar_canfd_read(priv-&gt;base, RCANFD_F_RFPTR(gpriv, ridx));</div><div class='ctx'> </div><div class='hunk'>@@ -1578,14 +1678,13 @@ static void rcar_canfd_rx_pkt(struct rcar_canfd_channel *priv)</div><div class='ctx'> </div><div class='ctx'> 		if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) &amp;&amp;</div><div class='ctx'> 		    sts &amp; RCANFD_RFFDSTS_RFFDF)</div><div class='del'>-			skb = alloc_canfd_skb(priv-&gt;ndev, &amp;cf);</div><div class='add'>+			skb = alloc_canfd_skb(ndev, &amp;cf);</div><div class='ctx'> 		else</div><div class='del'>-			skb = alloc_can_skb(priv-&gt;ndev,</div><div class='del'>-					    (struct can_frame **)&amp;cf);</div><div class='add'>+			skb = alloc_can_skb(ndev, (struct can_frame **)&amp;cf);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		id = rcar_canfd_read(priv-&gt;base, RCANFD_C_RFID(ridx));</div><div class='ctx'> 		dlc = rcar_canfd_read(priv-&gt;base, RCANFD_C_RFPTR(ridx));</div><div class='del'>-		skb = alloc_can_skb(priv-&gt;ndev, (struct can_frame **)&amp;cf);</div><div class='add'>+		skb = alloc_can_skb(ndev, (struct can_frame **)&amp;cf);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!skb) {</div><div class='hunk'>@@ -1606,7 +1705,7 @@ static void rcar_canfd_rx_pkt(struct rcar_canfd_channel *priv)</div><div class='ctx'> </div><div class='ctx'> 		if (sts &amp; RCANFD_RFFDSTS_RFESI) {</div><div class='ctx'> 			cf-&gt;flags |= CANFD_ESI;</div><div class='del'>-			netdev_dbg(priv-&gt;ndev, "ESI Error\n");</div><div class='add'>+			netdev_dbg(ndev, "ESI Error\n");</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!(sts &amp; RCANFD_RFFDSTS_RFFDF) &amp;&amp; (id &amp; RCANFD_RFID_RFRTR)) {</div><div class='hunk'>@@ -1621,7 +1720,7 @@ static void rcar_canfd_rx_pkt(struct rcar_canfd_channel *priv)</div><div class='ctx'> 		cf-&gt;len = can_cc_dlc2len(RCANFD_RFPTR_RFDLC(dlc));</div><div class='ctx'> 		if (id &amp; RCANFD_RFID_RFRTR)</div><div class='ctx'> 			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-		else if (is_gen4(gpriv))</div><div class='add'>+		else if (gpriv-&gt;info-&gt;shared_can_regs)</div><div class='ctx'> 			rcar_canfd_get_data(priv, cf, RCANFD_F_RFDF(gpriv, ridx, 0));</div><div class='ctx'> 		else</div><div class='ctx'> 			rcar_canfd_get_data(priv, cf, RCANFD_C_RFDF(ridx, 0));</div><div class='hunk'>@@ -1673,6 +1772,29 @@ static int rcar_canfd_rx_poll(struct napi_struct *napi, int quota)</div><div class='ctx'> 	return num_pkts;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int rcar_canfd_get_tdcr(struct rcar_canfd_global *gpriv,</div><div class='add'>+					unsigned int ch)</div><div class='add'>+{</div><div class='add'>+	u32 sts = readl(&amp;gpriv-&gt;fcbase[ch].cfdsts);</div><div class='add'>+	u32 tdcr = FIELD_GET(RCANFD_FDSTS_TDCR, sts);</div><div class='add'>+</div><div class='add'>+	return tdcr &amp; (gpriv-&gt;info-&gt;tdc_const-&gt;tdcv_max - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_get_auto_tdcv(const struct net_device *ndev, u32 *tdcv)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	u32 tdco = priv-&gt;can.fd.tdc.tdco;</div><div class='add'>+	u32 tdcr;</div><div class='add'>+</div><div class='add'>+	/* Transceiver Delay Compensation Result */</div><div class='add'>+	tdcr = rcar_canfd_get_tdcr(priv-&gt;gpriv, priv-&gt;channel) + 1;</div><div class='add'>+</div><div class='add'>+	*tdcv = tdcr &lt; tdco ? 0 : tdcr - tdco;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rcar_canfd_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1689,10 +1811,10 @@ static int rcar_canfd_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rcar_canfd_get_berr_counter(const struct net_device *dev,</div><div class='add'>+static int rcar_canfd_get_berr_counter(const struct net_device *ndev,</div><div class='ctx'> 				       struct can_berr_counter *bec)</div><div class='ctx'> {</div><div class='del'>-	struct rcar_canfd_channel *priv = netdev_priv(dev);</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='ctx'> 	u32 val, ch = priv-&gt;channel;</div><div class='ctx'> </div><div class='ctx'> 	/* Peripheral clock is already enabled in probe */</div><div class='hunk'>@@ -1706,7 +1828,6 @@ static const struct net_device_ops rcar_canfd_netdev_ops = {</div><div class='ctx'> 	.ndo_open = rcar_canfd_open,</div><div class='ctx'> 	.ndo_stop = rcar_canfd_close,</div><div class='ctx'> 	.ndo_start_xmit = rcar_canfd_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops rcar_canfd_ethtool_ops = {</div><div class='hunk'>@@ -1744,16 +1865,19 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch,</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;multi_channel_irqs) {</div><div class='ctx'> 		char *irq_name;</div><div class='add'>+		char name[10];</div><div class='ctx'> 		int err_irq;</div><div class='ctx'> 		int tx_irq;</div><div class='ctx'> </div><div class='del'>-		err_irq = platform_get_irq_byname(pdev, ch == 0 ? "ch0_err" : "ch1_err");</div><div class='add'>+		scnprintf(name, sizeof(name), "ch%u_err", ch);</div><div class='add'>+		err_irq = platform_get_irq_byname(pdev, name);</div><div class='ctx'> 		if (err_irq &lt; 0) {</div><div class='ctx'> 			err = err_irq;</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		tx_irq = platform_get_irq_byname(pdev, ch == 0 ? "ch0_trx" : "ch1_trx");</div><div class='add'>+		scnprintf(name, sizeof(name), "ch%u_trx", ch);</div><div class='add'>+		tx_irq = platform_get_irq_byname(pdev, name);</div><div class='ctx'> 		if (tx_irq &lt; 0) {</div><div class='ctx'> 			err = tx_irq;</div><div class='ctx'> 			goto fail;</div><div class='hunk'>@@ -1790,18 +1914,25 @@ static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (gpriv-&gt;fdmode) {</div><div class='del'>-		priv-&gt;can.bittiming_const = &amp;rcar_canfd_nom_bittiming_const;</div><div class='del'>-		priv-&gt;can.data_bittiming_const =</div><div class='del'>-			&amp;rcar_canfd_data_bittiming_const;</div><div class='add'>+		priv-&gt;can.bittiming_const = gpriv-&gt;info-&gt;nom_bittiming;</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const = gpriv-&gt;info-&gt;data_bittiming;</div><div class='add'>+		priv-&gt;can.fd.tdc_const = gpriv-&gt;info-&gt;tdc_const;</div><div class='ctx'> </div><div class='ctx'> 		/* Controller starts in CAN FD only mode */</div><div class='ctx'> 		err = can_set_static_ctrlmode(ndev, CAN_CTRLMODE_FD);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto fail;</div><div class='del'>-		priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING |</div><div class='add'>+					       CAN_CTRLMODE_TDC_AUTO |</div><div class='add'>+					       CAN_CTRLMODE_TDC_MANUAL;</div><div class='add'>+		priv-&gt;can.fd.do_get_auto_tdcv = rcar_canfd_get_auto_tdcv;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Controller starts in Classical CAN only mode */</div><div class='del'>-		priv-&gt;can.bittiming_const = &amp;rcar_canfd_bittiming_const;</div><div class='add'>+		if (gpriv-&gt;info-&gt;shared_can_regs)</div><div class='add'>+			priv-&gt;can.bittiming_const = gpriv-&gt;info-&gt;nom_bittiming;</div><div class='add'>+		else</div><div class='add'>+			priv-&gt;can.bittiming_const = &amp;rcar_canfd_bittiming_const;</div><div class='ctx'> 		priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1839,13 +1970,112 @@ static void rcar_canfd_channel_remove(struct rcar_canfd_global *gpriv, u32 ch)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rcar_canfd_global_init(struct rcar_canfd_global *gpriv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;gpriv-&gt;pdev-&gt;dev;</div><div class='add'>+	u32 rule_entry = 0;</div><div class='add'>+	u32 ch, sts;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = reset_control_reset(gpriv-&gt;rstc1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = reset_control_reset(gpriv-&gt;rstc2);</div><div class='add'>+	if (err)</div><div class='add'>+		goto fail_reset1;</div><div class='add'>+</div><div class='add'>+	/* Enable peripheral clock for register access */</div><div class='add'>+	err = clk_prepare_enable(gpriv-&gt;clkp);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "failed to enable peripheral clock: %pe\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+		goto fail_reset2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable RAM clock */</div><div class='add'>+	err = clk_prepare_enable(gpriv-&gt;clk_ram);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"failed to enable RAM clock, error %d\n", err);</div><div class='add'>+		goto fail_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = rcar_canfd_reset_controller(gpriv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "reset controller failed: %pe\n", ERR_PTR(err));</div><div class='add'>+		goto fail_ram_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Controller in Global reset &amp; Channel reset mode */</div><div class='add'>+	rcar_canfd_configure_controller(gpriv);</div><div class='add'>+</div><div class='add'>+	/* Configure per channel attributes */</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		/* Configure Channel's Rx fifo */</div><div class='add'>+		rcar_canfd_configure_rx(gpriv, ch);</div><div class='add'>+</div><div class='add'>+		/* Configure Channel's Tx (Common) fifo */</div><div class='add'>+		rcar_canfd_configure_tx(gpriv, ch);</div><div class='add'>+</div><div class='add'>+		/* Configure receive rules */</div><div class='add'>+		rcar_canfd_configure_afl_rules(gpriv, ch, rule_entry);</div><div class='add'>+		rule_entry += RCANFD_CHANNEL_NUMRULES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure common interrupts */</div><div class='add'>+	rcar_canfd_enable_global_interrupts(gpriv);</div><div class='add'>+</div><div class='add'>+	/* Start Global operation mode */</div><div class='add'>+	rcar_canfd_update_bit(gpriv-&gt;base, RCANFD_GCTR, RCANFD_GCTR_GMDC_MASK,</div><div class='add'>+			      RCANFD_GCTR_GMDC_GOPM);</div><div class='add'>+</div><div class='add'>+	/* Verify mode change */</div><div class='add'>+	err = readl_poll_timeout((gpriv-&gt;base + RCANFD_GSTS), sts,</div><div class='add'>+				 !(sts &amp; RCANFD_GSTS_GNOPM), 2, 500000);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "global operational mode failed\n");</div><div class='add'>+		goto fail_mode;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+fail_mode:</div><div class='add'>+	rcar_canfd_disable_global_interrupts(gpriv);</div><div class='add'>+fail_ram_clk:</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;clk_ram);</div><div class='add'>+fail_clk:</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;clkp);</div><div class='add'>+fail_reset2:</div><div class='add'>+	reset_control_assert(gpriv-&gt;rstc2);</div><div class='add'>+fail_reset1:</div><div class='add'>+	reset_control_assert(gpriv-&gt;rstc1);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_global_deinit(struct rcar_canfd_global *gpriv, bool full)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_disable_global_interrupts(gpriv);</div><div class='add'>+</div><div class='add'>+	if (full) {</div><div class='add'>+		rcar_canfd_reset_controller(gpriv);</div><div class='add'>+</div><div class='add'>+		/* Enter global sleep mode */</div><div class='add'>+		rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GCTR, RCANFD_GCTR_GSLPR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;clk_ram);</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;clkp);</div><div class='add'>+	reset_control_assert(gpriv-&gt;rstc2);</div><div class='add'>+	reset_control_assert(gpriv-&gt;rstc1);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rcar_canfd_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct phy *transceivers[RCANFD_NUM_CHANNELS] = { NULL, };</div><div class='ctx'> 	const struct rcar_canfd_hw_info *info;</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	void __iomem *addr;</div><div class='del'>-	u32 sts, ch, fcan_freq;</div><div class='ctx'> 	struct rcar_canfd_global *gpriv;</div><div class='ctx'> 	struct device_node *of_child;</div><div class='ctx'> 	unsigned long channels_mask = 0;</div><div class='hunk'>@@ -1853,6 +2083,7 @@ static int rcar_canfd_probe(struct platform_device *pdev)</div><div class='ctx'> 	int g_err_irq, g_recc_irq;</div><div class='ctx'> 	bool fdmode = true;			/* CAN FD only mode - default */</div><div class='ctx'> 	char name[9] = "channelX";</div><div class='add'>+	u32 ch, fcan_freq;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	info = of_device_get_match_data(dev);</div><div class='hunk'>@@ -1862,13 +2093,13 @@ static int rcar_canfd_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; info-&gt;max_channels; ++i) {</div><div class='ctx'> 		name[7] = '0' + i;</div><div class='del'>-		of_child = of_get_child_by_name(dev-&gt;of_node, name);</div><div class='del'>-		if (of_child &amp;&amp; of_device_is_available(of_child)) {</div><div class='add'>+		of_child = of_get_available_child_by_name(dev-&gt;of_node, name);</div><div class='add'>+		if (of_child) {</div><div class='ctx'> 			channels_mask |= BIT(i);</div><div class='ctx'> 			transceivers[i] = devm_of_phy_optional_get(dev,</div><div class='ctx'> 							of_child, NULL);</div><div class='add'>+			of_node_put(of_child);</div><div class='ctx'> 		}</div><div class='del'>-		of_node_put(of_child);</div><div class='ctx'> 		if (IS_ERR(transceivers[i]))</div><div class='ctx'> 			return PTR_ERR(transceivers[i]);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1939,15 +2170,21 @@ static int rcar_canfd_probe(struct platform_device *pdev)</div><div class='ctx'> 		fcan_freq = clk_get_rate(gpriv-&gt;can_clk) / info-&gt;postdiv;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		fcan_freq = clk_get_rate(gpriv-&gt;can_clk);</div><div class='del'>-		gpriv-&gt;extclk = true;</div><div class='add'>+		gpriv-&gt;extclk = gpriv-&gt;info-&gt;external_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	gpriv-&gt;clk_ram = devm_clk_get_optional(dev, "ram_clk");</div><div class='add'>+	if (IS_ERR(gpriv-&gt;clk_ram))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gpriv-&gt;clk_ram),</div><div class='add'>+				     "cannot get ram clock\n");</div><div class='add'>+</div><div class='ctx'> 	addr = devm_platform_ioremap_resource(pdev, 0);</div><div class='ctx'> 	if (IS_ERR(addr)) {</div><div class='ctx'> 		err = PTR_ERR(addr);</div><div class='ctx'> 		goto fail_dev;</div><div class='ctx'> 	}</div><div class='ctx'> 	gpriv-&gt;base = addr;</div><div class='add'>+	gpriv-&gt;fcbase = addr + gpriv-&gt;info-&gt;regs-&gt;coffset;</div><div class='ctx'> </div><div class='ctx'> 	/* Request IRQ that's common for both channels */</div><div class='ctx'> 	if (info-&gt;shared_global_irqs) {</div><div class='hunk'>@@ -1988,58 +2225,9 @@ static int rcar_canfd_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = reset_control_reset(gpriv-&gt;rstc1);</div><div class='add'>+	err = rcar_canfd_global_init(gpriv);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto fail_dev;</div><div class='del'>-	err = reset_control_reset(gpriv-&gt;rstc2);</div><div class='del'>-	if (err) {</div><div class='del'>-		reset_control_assert(gpriv-&gt;rstc1);</div><div class='del'>-		goto fail_dev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Enable peripheral clock for register access */</div><div class='del'>-	err = clk_prepare_enable(gpriv-&gt;clkp);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "failed to enable peripheral clock: %pe\n",</div><div class='del'>-			ERR_PTR(err));</div><div class='del'>-		goto fail_reset;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = rcar_canfd_reset_controller(gpriv);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "reset controller failed: %pe\n", ERR_PTR(err));</div><div class='del'>-		goto fail_clk;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Controller in Global reset &amp; Channel reset mode */</div><div class='del'>-	rcar_canfd_configure_controller(gpriv);</div><div class='del'>-</div><div class='del'>-	/* Configure per channel attributes */</div><div class='del'>-	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, info-&gt;max_channels) {</div><div class='del'>-		/* Configure Channel's Rx fifo */</div><div class='del'>-		rcar_canfd_configure_rx(gpriv, ch);</div><div class='del'>-</div><div class='del'>-		/* Configure Channel's Tx (Common) fifo */</div><div class='del'>-		rcar_canfd_configure_tx(gpriv, ch);</div><div class='del'>-</div><div class='del'>-		/* Configure receive rules */</div><div class='del'>-		rcar_canfd_configure_afl_rules(gpriv, ch);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Configure common interrupts */</div><div class='del'>-	rcar_canfd_enable_global_interrupts(gpriv);</div><div class='del'>-</div><div class='del'>-	/* Start Global operation mode */</div><div class='del'>-	rcar_canfd_update_bit(gpriv-&gt;base, RCANFD_GCTR, RCANFD_GCTR_GMDC_MASK,</div><div class='del'>-			      RCANFD_GCTR_GMDC_GOPM);</div><div class='del'>-</div><div class='del'>-	/* Verify mode change */</div><div class='del'>-	err = readl_poll_timeout((gpriv-&gt;base + RCANFD_GSTS), sts,</div><div class='del'>-				 !(sts &amp; RCANFD_GSTS_GNOPM), 2, 500000);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "global operational mode failed\n");</div><div class='ctx'> 		goto fail_mode;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, info-&gt;max_channels) {</div><div class='ctx'> 		err = rcar_canfd_channel_probe(gpriv, ch, fcan_freq,</div><div class='hunk'>@@ -2058,12 +2246,7 @@ fail_channel:</div><div class='ctx'> 	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, info-&gt;max_channels)</div><div class='ctx'> 		rcar_canfd_channel_remove(gpriv, ch);</div><div class='ctx'> fail_mode:</div><div class='del'>-	rcar_canfd_disable_global_interrupts(gpriv);</div><div class='del'>-fail_clk:</div><div class='del'>-	clk_disable_unprepare(gpriv-&gt;clkp);</div><div class='del'>-fail_reset:</div><div class='del'>-	reset_control_assert(gpriv-&gt;rstc1);</div><div class='del'>-	reset_control_assert(gpriv-&gt;rstc2);</div><div class='add'>+	rcar_canfd_global_deinit(gpriv, false);</div><div class='ctx'> fail_dev:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -2073,36 +2256,83 @@ static void rcar_canfd_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct rcar_canfd_global *gpriv = platform_get_drvdata(pdev);</div><div class='ctx'> 	u32 ch;</div><div class='ctx'> </div><div class='del'>-	rcar_canfd_reset_controller(gpriv);</div><div class='del'>-	rcar_canfd_disable_global_interrupts(gpriv);</div><div class='del'>-</div><div class='ctx'> 	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='ctx'> 		rcar_canfd_disable_channel_interrupts(gpriv-&gt;ch[ch]);</div><div class='ctx'> 		rcar_canfd_channel_remove(gpriv, ch);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Enter global sleep mode */</div><div class='del'>-	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GCTR, RCANFD_GCTR_GSLPR);</div><div class='del'>-	clk_disable_unprepare(gpriv-&gt;clkp);</div><div class='del'>-	reset_control_assert(gpriv-&gt;rstc1);</div><div class='del'>-	reset_control_assert(gpriv-&gt;rstc2);</div><div class='add'>+	rcar_canfd_global_deinit(gpriv, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused rcar_canfd_suspend(struct device *dev)</div><div class='add'>+static int rcar_canfd_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct rcar_canfd_global *gpriv = dev_get_drvdata(dev);</div><div class='add'>+	int err;</div><div class='add'>+	u32 ch;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		struct rcar_canfd_channel *priv = gpriv-&gt;ch[ch];</div><div class='add'>+		struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+		if (!netif_running(ndev))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		netif_device_detach(ndev);</div><div class='add'>+</div><div class='add'>+		err = rcar_canfd_close(ndev);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(ndev, "rcar_canfd_close() failed %pe\n",</div><div class='add'>+				   ERR_PTR(err));</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TODO Skip if wake-up (which is not yet supported) is enabled */</div><div class='add'>+	rcar_canfd_global_deinit(gpriv, false);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused rcar_canfd_resume(struct device *dev)</div><div class='add'>+static int rcar_canfd_resume(struct device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct rcar_canfd_global *gpriv = dev_get_drvdata(dev);</div><div class='add'>+	int err;</div><div class='add'>+	u32 ch;</div><div class='add'>+</div><div class='add'>+	err = rcar_canfd_global_init(gpriv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "rcar_canfd_global_init() failed %pe\n", ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		struct rcar_canfd_channel *priv = gpriv-&gt;ch[ch];</div><div class='add'>+		struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+		if (!netif_running(ndev))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = rcar_canfd_open(ndev);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(ndev, "rcar_canfd_open() failed %pe\n",</div><div class='add'>+				   ERR_PTR(err));</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netif_device_attach(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, rcar_canfd_suspend,</div><div class='del'>-			 rcar_canfd_resume);</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, rcar_canfd_suspend,</div><div class='add'>+				rcar_canfd_resume);</div><div class='ctx'> </div><div class='ctx'> static const __maybe_unused struct of_device_id rcar_canfd_of_table[] = {</div><div class='ctx'> 	{ .compatible = "renesas,r8a779a0-canfd", .data = &amp;rcar_gen4_hw_info },</div><div class='add'>+	{ .compatible = "renesas,r9a09g047-canfd", .data = &amp;r9a09g047_hw_info },</div><div class='ctx'> 	{ .compatible = "renesas,rcar-gen3-canfd", .data = &amp;rcar_gen3_hw_info },</div><div class='ctx'> 	{ .compatible = "renesas,rcar-gen4-canfd", .data = &amp;rcar_gen4_hw_info },</div><div class='ctx'> 	{ .compatible = "renesas,rzg2l-canfd", .data = &amp;rzg2l_hw_info },</div><div class='hunk'>@@ -2115,7 +2345,7 @@ static struct platform_driver rcar_canfd_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = RCANFD_DRV_NAME,</div><div class='ctx'> 		.of_match_table = of_match_ptr(rcar_canfd_of_table),</div><div class='del'>-		.pm = &amp;rcar_canfd_pm_ops,</div><div class='add'>+		.pm = pm_sleep_ptr(&amp;rcar_canfd_pm_ops),</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = rcar_canfd_probe,</div><div class='ctx'> 	.remove = rcar_canfd_remove,</div><div class='head'>diff --git a/drivers/net/can/rockchip/Kconfig b/drivers/net/can/rockchip/Kconfig<br/>index e029e2a3ca4b..d203c530551f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rockchip/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/Kconfig</a></div><div class='hunk'>@@ -2,7 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> config CAN_ROCKCHIP_CANFD</div><div class='ctx'> 	tristate "Rockchip CAN-FD controller"</div><div class='del'>-	depends on OF || COMPILE_TEST</div><div class='add'>+	depends on OF</div><div class='add'>+	depends on ARCH_ROCKCHIP || COMPILE_TEST</div><div class='ctx'> 	select CAN_RX_OFFLOAD</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you want to use CAN-FD controller found on</div><div class='head'>diff --git a/drivers/net/can/rockchip/rockchip_canfd-core.c b/drivers/net/can/rockchip/rockchip_canfd-core.c<br/>index df18c85fc078..29de0c01e4ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rockchip/rockchip_canfd-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/rockchip_canfd-core.c</a></div><div class='hunk'>@@ -118,7 +118,7 @@ static void rkcanfd_chip_set_work_mode(const struct rkcanfd_priv *priv)</div><div class='ctx'> </div><div class='ctx'> static int rkcanfd_set_bittiming(struct rkcanfd_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	const struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	const struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='ctx'> 	u32 reg_nbt, reg_dbt, reg_tdc;</div><div class='ctx'> 	u32 tdco;</div><div class='hunk'>@@ -236,11 +236,6 @@ static void rkcanfd_chip_fifo_setup(struct rkcanfd_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	/* TXE FIFO */</div><div class='del'>-	reg = rkcanfd_read(priv, RKCANFD_REG_RX_FIFO_CTRL);</div><div class='del'>-	reg |= RKCANFD_REG_RX_FIFO_CTRL_RX_FIFO_ENABLE;</div><div class='del'>-	rkcanfd_write(priv, RKCANFD_REG_RX_FIFO_CTRL, reg);</div><div class='del'>-</div><div class='ctx'> 	/* RX FIFO */</div><div class='ctx'> 	reg = rkcanfd_read(priv, RKCANFD_REG_RX_FIFO_CTRL);</div><div class='ctx'> 	reg |= RKCANFD_REG_RX_FIFO_CTRL_RX_FIFO_ENABLE;</div><div class='hunk'>@@ -622,7 +617,7 @@ rkcanfd_handle_rx_fifo_overflow_int(struct rkcanfd_priv *priv)</div><div class='ctx'> 	netdev_dbg(priv-&gt;ndev, "RX-FIFO overflow\n");</div><div class='ctx'> </div><div class='ctx'> 	skb = rkcanfd_alloc_can_err_skb(priv, &amp;cf, &amp;timestamp);</div><div class='del'>-	if (skb)</div><div class='add'>+	if (!skb)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	rkcanfd_get_berr_counter_corrected(priv, &amp;bec);</div><div class='hunk'>@@ -766,7 +761,6 @@ static const struct net_device_ops rkcanfd_netdev_ops = {</div><div class='ctx'> 	.ndo_open = rkcanfd_open,</div><div class='ctx'> 	.ndo_stop = rkcanfd_stop,</div><div class='ctx'> 	.ndo_start_xmit = rkcanfd_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __maybe_unused rkcanfd_runtime_suspend(struct device *dev)</div><div class='hunk'>@@ -904,18 +898,19 @@ static int rkcanfd_probe(struct platform_device *pdev)</div><div class='ctx'> 	platform_set_drvdata(pdev, priv);</div><div class='ctx'> 	priv-&gt;can.clock.freq = clk_get_rate(priv-&gt;clks[0].clk);</div><div class='ctx'> 	priv-&gt;can.bittiming_const = &amp;rkcanfd_bittiming_const;</div><div class='del'>-	priv-&gt;can.data_bittiming_const = &amp;rkcanfd_data_bittiming_const;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;rkcanfd_data_bittiming_const;</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='ctx'> 		CAN_CTRLMODE_BERR_REPORTING;</div><div class='del'>-	if (!(priv-&gt;devtype_data.quirks &amp; RKCANFD_QUIRK_CANFD_BROKEN))</div><div class='del'>-		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD;</div><div class='ctx'> 	priv-&gt;can.do_set_mode = rkcanfd_set_mode;</div><div class='ctx'> 	priv-&gt;can.do_get_berr_counter = rkcanfd_get_berr_counter;</div><div class='ctx'> 	priv-&gt;ndev = ndev;</div><div class='ctx'> </div><div class='ctx'> 	match = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='del'>-	if (match)</div><div class='add'>+	if (match) {</div><div class='ctx'> 		priv-&gt;devtype_data = *(struct rkcanfd_devtype_data *)match;</div><div class='add'>+		if (!(priv-&gt;devtype_data.quirks &amp; RKCANFD_QUIRK_CANFD_BROKEN))</div><div class='add'>+			priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = can_rx_offload_add_manual(ndev, &amp;priv-&gt;offload,</div><div class='ctx'> 					RKCANFD_NAPI_WEIGHT);</div><div class='hunk'>@@ -941,8 +936,8 @@ static void rkcanfd_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct rkcanfd_priv *priv = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct net_device *ndev = priv-&gt;ndev;</div><div class='ctx'> </div><div class='del'>-	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='ctx'> 	rkcanfd_unregister(priv);</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='ctx'> 	free_candev(ndev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/can/rockchip/rockchip_canfd-timestamp.c b/drivers/net/can/rockchip/rockchip_canfd-timestamp.c<br/>index 43d4b5721812..72774cd2f94b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-timestamp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rockchip/rockchip_canfd-timestamp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-timestamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/rockchip_canfd-timestamp.c</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "rockchip_canfd.h"</div><div class='ctx'> </div><div class='del'>-static u64 rkcanfd_timestamp_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 rkcanfd_timestamp_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	const struct rkcanfd_priv *priv = container_of(cc, struct rkcanfd_priv, cc);</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +39,7 @@ static void rkcanfd_timestamp_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> void rkcanfd_timestamp_init(struct rkcanfd_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	const struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	const struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='ctx'> 	struct cyclecounter *cc = &amp;priv-&gt;cc;</div><div class='ctx'> 	u32 bitrate, div, reg, rate;</div><div class='head'>diff --git a/drivers/net/can/rockchip/rockchip_canfd-tx.c b/drivers/net/can/rockchip/rockchip_canfd-tx.c<br/>index 865a15e033a9..12200dcfd338 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/rockchip/rockchip_canfd-tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/rockchip_canfd-tx.c</a></div><div class='hunk'>@@ -72,7 +72,7 @@ netdev_tx_t rkcanfd_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u8 i;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(ndev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_subqueue_maybe_stop(priv-&gt;ndev, 0,</div><div class='head'>diff --git a/drivers/net/can/sja1000/Kconfig b/drivers/net/can/sja1000/Kconfig<br/>index 01168db4c106..e061e35769bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sja1000/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/Kconfig</a></div><div class='hunk'>@@ -87,7 +87,7 @@ config CAN_PLX_PCI</div><div class='ctx'> </div><div class='ctx'> config CAN_SJA1000_ISA</div><div class='ctx'> 	tristate "ISA Bus based legacy SJA1000 driver"</div><div class='del'>-	depends on ISA</div><div class='add'>+	depends on HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver adds legacy support for SJA1000 chips connected to</div><div class='ctx'> 	  the ISA bus using I/O port, memory mapped or indirect access.</div><div class='hunk'>@@ -105,7 +105,7 @@ config CAN_SJA1000_PLATFORM</div><div class='ctx'> </div><div class='ctx'> config CAN_TSCAN1</div><div class='ctx'> 	tristate "TS-CAN1 PC104 boards"</div><div class='del'>-	depends on ISA</div><div class='add'>+	depends on (ISA &amp;&amp; PC104) || (COMPILE_TEST &amp;&amp; HAS_IOPORT)</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver is for Technologic Systems' TSCAN-1 PC104 boards.</div><div class='ctx'> 	  https://www.embeddedts.com/products/TS-CAN1</div><div class='head'>diff --git a/drivers/net/can/sja1000/peak_pci.c b/drivers/net/can/sja1000/peak_pci.c<br/>index da396d641e24..10d88cbda465 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/peak_pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sja1000/peak_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/peak_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/peak_pci.c</a></div><div class='hunk'>@@ -1,11 +1,11 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2007, 2011 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- * Copyright (C) 2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_pci.c:</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2001-2006  PEAK System-Technik GmbH</div><div class='add'>+ * Copyright (C) 2001-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -22,7 +22,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "sja1000.h"</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/can/sja1000/peak_pcmcia.c b/drivers/net/can/sja1000/peak_pcmcia.c<br/>index ebd5941c3f53..e1610b527d13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/peak_pcmcia.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sja1000/peak_pcmcia.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/peak_pcmcia.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/peak_pcmcia.c</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2010-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='del'>- *</div><div class='ctx'>  * CAN driver for PEAK-System PCAN-PC Card</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_pccard.c</div><div class='del'>- * Copyright (C) 2006-2010 PEAK System-Technik GmbH</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2006-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include "sja1000.h"</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("CAN driver for PEAK-System PCAN-PC Cards");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='hunk'>@@ -167,7 +167,7 @@ static void pcan_start_led_timer(struct pcan_pccard *card)</div><div class='ctx'>  */</div><div class='ctx'> static void pcan_stop_led_timer(struct pcan_pccard *card)</div><div class='ctx'> {</div><div class='del'>-	del_timer_sync(&amp;card-&gt;led_timer);</div><div class='add'>+	timer_delete_sync(&amp;card-&gt;led_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -374,7 +374,7 @@ static inline void pcan_set_can_power(struct pcan_pccard *card, int onoff)</div><div class='ctx'>  */</div><div class='ctx'> static void pcan_led_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct pcan_pccard *card = from_timer(card, t, led_timer);</div><div class='add'>+	struct pcan_pccard *card = timer_container_of(card, t, led_timer);</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	int i, up_count = 0;</div><div class='ctx'> 	u8 ccr;</div><div class='head'>diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c<br/>index ddb3247948ad..a8fa0d6516b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sja1000/sja1000.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/sja1000.c</a></div><div class='hunk'>@@ -416,8 +416,6 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (skb == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	txerr = priv-&gt;read_reg(priv, SJA1000_TXERR);</div><div class='ctx'> 	rxerr = priv-&gt;read_reg(priv, SJA1000_RXERR);</div><div class='hunk'>@@ -425,8 +423,11 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='ctx'> 	if (isrc &amp; IRQ_DOI) {</div><div class='ctx'> 		/* data overrun interrupt */</div><div class='ctx'> 		netdev_dbg(dev, "data overrun interrupt\n");</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+			cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		stats-&gt;rx_over_errors++;</div><div class='ctx'> 		stats-&gt;rx_errors++;</div><div class='ctx'> 		sja1000_write_cmdreg(priv, CMD_CDO);	/* clear bit */</div><div class='hunk'>@@ -452,7 +453,7 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='ctx'> 		else</div><div class='ctx'> 			state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> 	}</div><div class='del'>-	if (state != CAN_STATE_BUS_OFF) {</div><div class='add'>+	if (state != CAN_STATE_BUS_OFF &amp;&amp; skb) {</div><div class='ctx'> 		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='ctx'> 		cf-&gt;data[6] = txerr;</div><div class='ctx'> 		cf-&gt;data[7] = rxerr;</div><div class='hunk'>@@ -460,33 +461,38 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='ctx'> 	if (isrc &amp; IRQ_BEI) {</div><div class='ctx'> 		/* bus error interrupt */</div><div class='ctx'> 		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='ctx'> </div><div class='ctx'> 		ecc = priv-&gt;read_reg(priv, SJA1000_ECC);</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-</div><div class='del'>-		/* set error type */</div><div class='del'>-		switch (ecc &amp; ECC_MASK) {</div><div class='del'>-		case ECC_BIT:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-			break;</div><div class='del'>-		case ECC_FORM:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-			break;</div><div class='del'>-		case ECC_STUFF:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+			/* set error type */</div><div class='add'>+			switch (ecc &amp; ECC_MASK) {</div><div class='add'>+			case ECC_BIT:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+				break;</div><div class='add'>+			case ECC_FORM:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+				break;</div><div class='add'>+			case ECC_STUFF:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-		/* set error location */</div><div class='del'>-		cf-&gt;data[3] = ecc &amp; ECC_SEG;</div><div class='add'>+			/* set error location */</div><div class='add'>+			cf-&gt;data[3] = ecc &amp; ECC_SEG;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* Error occurred during transmission? */</div><div class='del'>-		if ((ecc &amp; ECC_DIR) == 0)</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		if ((ecc &amp; ECC_DIR) == 0) {</div><div class='add'>+			stats-&gt;tx_errors++;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		} else {</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (isrc &amp; IRQ_EPI) {</div><div class='ctx'> 		/* error passive interrupt */</div><div class='hunk'>@@ -502,8 +508,10 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='ctx'> 		netdev_dbg(dev, "arbitration lost interrupt\n");</div><div class='ctx'> 		alc = priv-&gt;read_reg(priv, SJA1000_ALC);</div><div class='ctx'> 		priv-&gt;can.can_stats.arbitration_lost++;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='del'>-		cf-&gt;data[0] = alc &amp; 0x1f;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='add'>+			cf-&gt;data[0] = alc &amp; 0x1f;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (state != priv-&gt;can.state) {</div><div class='hunk'>@@ -516,6 +524,9 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='ctx'> 			can_bus_off(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -537,8 +548,8 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	if (priv-&gt;read_reg(priv, SJA1000_IER) == IRQ_OFF)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	while ((isrc = priv-&gt;read_reg(priv, SJA1000_IR)) &amp;&amp;</div><div class='del'>-	       (n &lt; SJA1000_MAX_IRQ)) {</div><div class='add'>+	while ((n &lt; SJA1000_MAX_IRQ) &amp;&amp;</div><div class='add'>+	       (isrc = priv-&gt;read_reg(priv, SJA1000_IR))) {</div><div class='ctx'> </div><div class='ctx'> 		status = priv-&gt;read_reg(priv, SJA1000_SR);</div><div class='ctx'> 		/* check for absent controller due to hw unplug */</div><div class='hunk'>@@ -686,7 +697,6 @@ static const struct net_device_ops sja1000_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= sja1000_open,</div><div class='ctx'> 	.ndo_stop	= sja1000_close,</div><div class='ctx'> 	.ndo_start_xmit	= sja1000_start_xmit,</div><div class='del'>-	.ndo_change_mtu	= can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops sja1000_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/sja1000/sja1000_platform.c b/drivers/net/can/sja1000/sja1000_platform.c<br/>index c42ebe9da55a..2d555f854008 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000_platform.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sja1000/sja1000_platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000_platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/sja1000_platform.c</a></div><div class='hunk'>@@ -230,18 +230,9 @@ static int sp_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (!res_mem)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	if (!devm_request_mem_region(&amp;pdev-&gt;dev, res_mem-&gt;start,</div><div class='del'>-				     resource_size(res_mem), DRV_NAME))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	addr = devm_ioremap(&amp;pdev-&gt;dev, res_mem-&gt;start,</div><div class='del'>-				    resource_size(res_mem));</div><div class='del'>-	if (!addr)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	addr = devm_platform_get_and_ioremap_resource(pdev, 0, &amp;res_mem);</div><div class='add'>+	if (IS_ERR(addr))</div><div class='add'>+		return PTR_ERR(addr);</div><div class='ctx'> </div><div class='ctx'> 	if (of) {</div><div class='ctx'> 		irq = platform_get_irq(pdev, 0);</div><div class='head'>diff --git a/drivers/net/can/slcan/slcan-core.c b/drivers/net/can/slcan/slcan-core.c<br/>index 24c6622d36bd..cd789e178d34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/slcan/slcan-core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/slcan/slcan-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/slcan/slcan-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/slcan/slcan-core.c</a></div><div class='hunk'>@@ -71,12 +71,21 @@ MODULE_AUTHOR("Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;");</div><div class='ctx'> #define SLCAN_CMD_LEN 1</div><div class='ctx'> #define SLCAN_SFF_ID_LEN 3</div><div class='ctx'> #define SLCAN_EFF_ID_LEN 8</div><div class='add'>+#define SLCAN_DATA_LENGTH_LEN 1</div><div class='add'>+#define SLCAN_ERROR_LEN 1</div><div class='ctx'> #define SLCAN_STATE_LEN 1</div><div class='ctx'> #define SLCAN_STATE_BE_RXCNT_LEN 3</div><div class='ctx'> #define SLCAN_STATE_BE_TXCNT_LEN 3</div><div class='del'>-#define SLCAN_STATE_FRAME_LEN       (1 + SLCAN_CMD_LEN + \</div><div class='del'>-				     SLCAN_STATE_BE_RXCNT_LEN + \</div><div class='del'>-				     SLCAN_STATE_BE_TXCNT_LEN)</div><div class='add'>+#define SLCAN_STATE_MSG_LEN     (SLCAN_CMD_LEN +		\</div><div class='add'>+                                 SLCAN_STATE_LEN +		\</div><div class='add'>+                                 SLCAN_STATE_BE_RXCNT_LEN +	\</div><div class='add'>+                                 SLCAN_STATE_BE_TXCNT_LEN)</div><div class='add'>+#define SLCAN_ERROR_MSG_LEN_MIN (SLCAN_CMD_LEN +	\</div><div class='add'>+                                 SLCAN_ERROR_LEN +	\</div><div class='add'>+                                 SLCAN_DATA_LENGTH_LEN)</div><div class='add'>+#define SLCAN_FRAME_MSG_LEN_MIN (SLCAN_CMD_LEN +	\</div><div class='add'>+                                 SLCAN_SFF_ID_LEN +	\</div><div class='add'>+                                 SLCAN_DATA_LENGTH_LEN)</div><div class='ctx'> struct slcan {</div><div class='ctx'> 	struct can_priv         can;</div><div class='ctx'> </div><div class='hunk'>@@ -176,6 +185,9 @@ static void slcan_bump_frame(struct slcan *sl)</div><div class='ctx'> 	u32 tmpid;</div><div class='ctx'> 	char *cmd = sl-&gt;rbuff;</div><div class='ctx'> </div><div class='add'>+	if (sl-&gt;rcount &lt; SLCAN_FRAME_MSG_LEN_MIN)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	skb = alloc_can_skb(sl-&gt;dev, &amp;cf);</div><div class='ctx'> 	if (unlikely(!skb)) {</div><div class='ctx'> 		sl-&gt;dev-&gt;stats.rx_dropped++;</div><div class='hunk'>@@ -281,7 +293,7 @@ static void slcan_bump_state(struct slcan *sl)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (state == sl-&gt;can.state || sl-&gt;rcount &lt; SLCAN_STATE_FRAME_LEN)</div><div class='add'>+	if (state == sl-&gt;can.state || sl-&gt;rcount != SLCAN_STATE_MSG_LEN)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	cmd += SLCAN_STATE_BE_RXCNT_LEN + SLCAN_CMD_LEN + 1;</div><div class='hunk'>@@ -328,6 +340,9 @@ static void slcan_bump_err(struct slcan *sl)</div><div class='ctx'> 	bool rx_errors = false, tx_errors = false, rx_over_errors = false;</div><div class='ctx'> 	int i, len;</div><div class='ctx'> </div><div class='add'>+	if (sl-&gt;rcount &lt; SLCAN_ERROR_MSG_LEN_MIN)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	/* get len from sanitized ASCII value */</div><div class='ctx'> 	len = cmd[1];</div><div class='ctx'> 	if (len &gt;= '0' &amp;&amp; len &lt; '9')</div><div class='hunk'>@@ -456,8 +471,7 @@ static void slcan_bump(struct slcan *sl)</div><div class='ctx'> static void slcan_unesc(struct slcan *sl, unsigned char s)</div><div class='ctx'> {</div><div class='ctx'> 	if ((s == '\r') || (s == '\a')) { /* CR or BEL ends the pdu */</div><div class='del'>-		if (!test_and_clear_bit(SLF_ERROR, &amp;sl-&gt;flags) &amp;&amp;</div><div class='del'>-		    sl-&gt;rcount &gt; 4)</div><div class='add'>+		if (!test_and_clear_bit(SLF_ERROR, &amp;sl-&gt;flags))</div><div class='ctx'> 			slcan_bump(sl);</div><div class='ctx'> </div><div class='ctx'> 		sl-&gt;rcount = 0;</div><div class='hunk'>@@ -760,7 +774,6 @@ static const struct net_device_ops slcan_netdev_ops = {</div><div class='ctx'> 	.ndo_open               = slcan_netdev_open,</div><div class='ctx'> 	.ndo_stop               = slcan_netdev_close,</div><div class='ctx'> 	.ndo_start_xmit         = slcan_netdev_xmit,</div><div class='del'>-	.ndo_change_mtu         = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /******************************************</div><div class='head'>diff --git a/drivers/net/can/softing/softing_main.c b/drivers/net/can/softing/softing_main.c<br/>index 278ee8722770..79bc64395ac4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/softing/softing_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/softing/softing_main.c</a></div><div class='hunk'>@@ -609,7 +609,6 @@ static const struct net_device_ops softing_netdev_ops = {</div><div class='ctx'> 	.ndo_open = softing_netdev_open,</div><div class='ctx'> 	.ndo_stop = softing_netdev_stop,</div><div class='ctx'> 	.ndo_start_xmit	= softing_netdev_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops softing_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/spi/hi311x.c b/drivers/net/can/spi/hi311x.c<br/>index 148d974ebb21..e00d3dbc4cf4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/hi311x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/hi311x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/hi311x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/hi311x.c</a></div><div class='hunk'>@@ -545,8 +545,6 @@ static int hi3110_stop(struct net_device *net)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;force_quit = 1;</div><div class='ctx'> 	free_irq(spi-&gt;irq, priv);</div><div class='del'>-	destroy_workqueue(priv-&gt;wq);</div><div class='del'>-	priv-&gt;wq = NULL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;hi3110_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -663,27 +661,27 @@ static irqreturn_t hi3110_can_ist(int irq, void *dev_id)</div><div class='ctx'> 			u8 rxerr, txerr;</div><div class='ctx'> </div><div class='ctx'> 			skb = alloc_can_err_skb(net, &amp;cf);</div><div class='del'>-			if (!skb)</div><div class='del'>-				break;</div><div class='ctx'> </div><div class='ctx'> 			txerr = hi3110_read(spi, HI3110_READ_TEC);</div><div class='ctx'> 			rxerr = hi3110_read(spi, HI3110_READ_REC);</div><div class='ctx'> 			tx_state = txerr &gt;= rxerr ? new_state : 0;</div><div class='ctx'> 			rx_state = txerr &lt;= rxerr ? new_state : 0;</div><div class='ctx'> 			can_change_state(net, cf, tx_state, rx_state);</div><div class='del'>-			netif_rx(skb);</div><div class='ctx'> </div><div class='ctx'> 			if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+				if (skb)</div><div class='add'>+					netif_rx(skb);</div><div class='ctx'> 				can_bus_off(net);</div><div class='ctx'> 				if (priv-&gt;can.restart_ms == 0) {</div><div class='ctx'> 					priv-&gt;force_quit = 1;</div><div class='ctx'> 					hi3110_hw_sleep(spi);</div><div class='ctx'> 					break;</div><div class='ctx'> 				}</div><div class='del'>-			} else {</div><div class='add'>+			} else if (skb) {</div><div class='ctx'> 				cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='ctx'> 				cf-&gt;data[6] = txerr;</div><div class='ctx'> 				cf-&gt;data[7] = rxerr;</div><div class='add'>+				netif_rx(skb);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -696,27 +694,38 @@ static irqreturn_t hi3110_can_ist(int irq, void *dev_id)</div><div class='ctx'> 			/* Check for protocol errors */</div><div class='ctx'> 			if (eflag &amp; HI3110_ERR_PROTOCOL_MASK) {</div><div class='ctx'> 				skb = alloc_can_err_skb(net, &amp;cf);</div><div class='del'>-				if (!skb)</div><div class='del'>-					break;</div><div class='add'>+				if (skb)</div><div class='add'>+					cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='del'>-				cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> 				priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-				priv-&gt;net-&gt;stats.rx_errors++;</div><div class='del'>-				if (eflag &amp; HI3110_ERR_BITERR)</div><div class='del'>-					cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-				else if (eflag &amp; HI3110_ERR_FRMERR)</div><div class='del'>-					cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-				else if (eflag &amp; HI3110_ERR_STUFERR)</div><div class='del'>-					cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-				else if (eflag &amp; HI3110_ERR_CRCERR)</div><div class='del'>-					cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='del'>-				else if (eflag &amp; HI3110_ERR_ACKERR)</div><div class='del'>-					cf-&gt;data[3] |= CAN_ERR_PROT_LOC_ACK;</div><div class='del'>-</div><div class='del'>-				cf-&gt;data[6] = hi3110_read(spi, HI3110_READ_TEC);</div><div class='del'>-				cf-&gt;data[7] = hi3110_read(spi, HI3110_READ_REC);</div><div class='add'>+				if (eflag &amp; HI3110_ERR_BITERR) {</div><div class='add'>+					priv-&gt;net-&gt;stats.tx_errors++;</div><div class='add'>+					if (skb)</div><div class='add'>+						cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+				} else if (eflag &amp; HI3110_ERR_FRMERR) {</div><div class='add'>+					priv-&gt;net-&gt;stats.rx_errors++;</div><div class='add'>+					if (skb)</div><div class='add'>+						cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+				} else if (eflag &amp; HI3110_ERR_STUFERR) {</div><div class='add'>+					priv-&gt;net-&gt;stats.rx_errors++;</div><div class='add'>+					if (skb)</div><div class='add'>+						cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+				} else if (eflag &amp; HI3110_ERR_CRCERR) {</div><div class='add'>+					priv-&gt;net-&gt;stats.rx_errors++;</div><div class='add'>+					if (skb)</div><div class='add'>+						cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+				} else if (eflag &amp; HI3110_ERR_ACKERR) {</div><div class='add'>+					priv-&gt;net-&gt;stats.tx_errors++;</div><div class='add'>+					if (skb)</div><div class='add'>+						cf-&gt;data[3] |= CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+				}</div><div class='add'>+</div><div class='ctx'> 				netdev_dbg(priv-&gt;net, "Bus Error\n");</div><div class='del'>-				netif_rx(skb);</div><div class='add'>+				if (skb) {</div><div class='add'>+					cf-&gt;data[6] = hi3110_read(spi, HI3110_READ_TEC);</div><div class='add'>+					cf-&gt;data[7] = hi3110_read(spi, HI3110_READ_REC);</div><div class='add'>+					netif_rx(skb);</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -759,34 +768,23 @@ static int hi3110_open(struct net_device *net)</div><div class='ctx'> 		goto out_close;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;wq = alloc_workqueue("hi3110_wq", WQ_FREEZABLE | WQ_MEM_RECLAIM,</div><div class='del'>-				   0);</div><div class='del'>-	if (!priv-&gt;wq) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out_free_irq;</div><div class='del'>-	}</div><div class='del'>-	INIT_WORK(&amp;priv-&gt;tx_work, hi3110_tx_work_handler);</div><div class='del'>-	INIT_WORK(&amp;priv-&gt;restart_work, hi3110_restart_work_handler);</div><div class='del'>-</div><div class='ctx'> 	ret = hi3110_hw_reset(spi);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out_free_wq;</div><div class='add'>+		goto out_free_irq;</div><div class='ctx'> </div><div class='ctx'> 	ret = hi3110_setup(net);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out_free_wq;</div><div class='add'>+		goto out_free_irq;</div><div class='ctx'> </div><div class='ctx'> 	ret = hi3110_set_normal_mode(spi);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out_free_wq;</div><div class='add'>+		goto out_free_irq;</div><div class='ctx'> </div><div class='ctx'> 	netif_wake_queue(net);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;hi3110_lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>- out_free_wq:</div><div class='del'>-	destroy_workqueue(priv-&gt;wq);</div><div class='ctx'>  out_free_irq:</div><div class='ctx'> 	free_irq(spi-&gt;irq, priv);</div><div class='ctx'> 	hi3110_hw_sleep(spi);</div><div class='hunk'>@@ -897,6 +895,16 @@ static int hi3110_can_probe(struct spi_device *spi)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_clk;</div><div class='ctx'> </div><div class='add'>+	priv-&gt;wq = alloc_workqueue("hi3110_wq",</div><div class='add'>+				   WQ_FREEZABLE | WQ_MEM_RECLAIM | WQ_PERCPU,</div><div class='add'>+				   0);</div><div class='add'>+	if (!priv-&gt;wq) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_clk;</div><div class='add'>+	}</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;tx_work, hi3110_tx_work_handler);</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;restart_work, hi3110_restart_work_handler);</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;spi = spi;</div><div class='ctx'> 	mutex_init(&amp;priv-&gt;hi3110_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -932,6 +940,8 @@ static int hi3110_can_probe(struct spi_device *spi)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'>  error_probe:</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+	priv-&gt;wq = NULL;</div><div class='ctx'> 	hi3110_power_enable(priv-&gt;power, 0);</div><div class='ctx'> </div><div class='ctx'>  out_clk:</div><div class='hunk'>@@ -952,6 +962,9 @@ static void hi3110_can_remove(struct spi_device *spi)</div><div class='ctx'> </div><div class='ctx'> 	hi3110_power_enable(priv-&gt;power, 0);</div><div class='ctx'> </div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+	priv-&gt;wq = NULL;</div><div class='add'>+</div><div class='ctx'> 	clk_disable_unprepare(priv-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	free_candev(net);</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251x.c b/drivers/net/can/spi/mcp251x.c<br/>index ec5c64006a16..fa97adf25b73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251x.c</a></div><div class='hunk'>@@ -388,8 +388,8 @@ static void mcp251x_write_2regs(struct spi_device *spi, u8 reg, u8 v1, u8 v2)</div><div class='ctx'> 	mcp251x_spi_write(spi, 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mcp251x_write_bits(struct spi_device *spi, u8 reg,</div><div class='del'>-			       u8 mask, u8 val)</div><div class='add'>+static int mcp251x_write_bits(struct spi_device *spi, u8 reg,</div><div class='add'>+			      u8 mask, u8 val)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='ctx'> </div><div class='hunk'>@@ -398,7 +398,7 @@ static void mcp251x_write_bits(struct spi_device *spi, u8 reg,</div><div class='ctx'> 	priv-&gt;spi_tx_buf[2] = mask;</div><div class='ctx'> 	priv-&gt;spi_tx_buf[3] = val;</div><div class='ctx'> </div><div class='del'>-	mcp251x_spi_write(spi, 4);</div><div class='add'>+	return mcp251x_spi_write(spi, 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u8 mcp251x_read_stat(struct spi_device *spi)</div><div class='hunk'>@@ -441,6 +441,7 @@ static int mcp251x_gpio_request(struct gpio_chip *chip,</div><div class='ctx'> 				unsigned int offset)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	int ret;</div><div class='ctx'> 	u8 val;</div><div class='ctx'> </div><div class='ctx'> 	/* nothing to be done for inputs */</div><div class='hunk'>@@ -450,8 +451,10 @@ static int mcp251x_gpio_request(struct gpio_chip *chip,</div><div class='ctx'> 	val = BFPCTRL_BFE(offset - MCP251X_GPIO_RX0BF);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='del'>-	mcp251x_write_bits(priv-&gt;spi, BFPCTRL, val, val);</div><div class='add'>+	ret = mcp251x_write_bits(priv-&gt;spi, BFPCTRL, val, val);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;reg_bfpctrl |= val;</div><div class='ctx'> </div><div class='hunk'>@@ -530,29 +533,35 @@ static int mcp251x_gpio_get_multiple(struct gpio_chip *chip,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mcp251x_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='del'>-			     int value)</div><div class='add'>+static int mcp251x_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			    int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = gpiochip_get_data(chip);</div><div class='ctx'> 	u8 mask, val;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mask = BFPCTRL_BFS(offset - MCP251X_GPIO_RX0BF);</div><div class='ctx'> 	val = value ? mask : 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='del'>-	mcp251x_write_bits(priv-&gt;spi, BFPCTRL, mask, val);</div><div class='add'>+	ret = mcp251x_write_bits(priv-&gt;spi, BFPCTRL, mask, val);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;reg_bfpctrl &amp;= ~mask;</div><div class='ctx'> 	priv-&gt;reg_bfpctrl |= val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='add'>+static int</div><div class='ctx'> mcp251x_gpio_set_multiple(struct gpio_chip *chip,</div><div class='ctx'> 			  unsigned long *maskp, unsigned long *bitsp)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = gpiochip_get_data(chip);</div><div class='ctx'> 	u8 mask, val;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mask = FIELD_GET(MCP251X_GPIO_OUTPUT_MASK, maskp[0]);</div><div class='ctx'> 	mask = FIELD_PREP(BFPCTRL_BFS_MASK, mask);</div><div class='hunk'>@@ -561,14 +570,18 @@ mcp251x_gpio_set_multiple(struct gpio_chip *chip,</div><div class='ctx'> 	val = FIELD_PREP(BFPCTRL_BFS_MASK, val);</div><div class='ctx'> </div><div class='ctx'> 	if (!mask)</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='del'>-	mcp251x_write_bits(priv-&gt;spi, BFPCTRL, mask, val);</div><div class='add'>+	ret = mcp251x_write_bits(priv-&gt;spi, BFPCTRL, mask, val);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;reg_bfpctrl &amp;= ~mask;</div><div class='ctx'> 	priv-&gt;reg_bfpctrl |= val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mcp251x_gpio_restore(struct spi_device *spi)</div><div class='hunk'>@@ -1257,7 +1270,6 @@ static const struct net_device_ops mcp251x_netdev_ops = {</div><div class='ctx'> 	.ndo_open = mcp251x_open,</div><div class='ctx'> 	.ndo_stop = mcp251x_stop,</div><div class='ctx'> 	.ndo_start_xmit = mcp251x_hard_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops mcp251x_ethtool_ops = {</div><div class='hunk'>@@ -1308,7 +1320,7 @@ static int mcp251x_can_probe(struct spi_device *spi)</div><div class='ctx'> </div><div class='ctx'> 	clk = devm_clk_get_optional(&amp;spi-&gt;dev, NULL);</div><div class='ctx'> 	if (IS_ERR(clk))</div><div class='del'>-		return PTR_ERR(clk);</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, PTR_ERR(clk), "Cannot get clock\n");</div><div class='ctx'> </div><div class='ctx'> 	freq = clk_get_rate(clk);</div><div class='ctx'> 	if (freq == 0)</div><div class='hunk'>@@ -1316,7 +1328,7 @@ static int mcp251x_can_probe(struct spi_device *spi)</div><div class='ctx'> </div><div class='ctx'> 	/* Sanity check */</div><div class='ctx'> 	if (freq &lt; 1000000 || freq &gt; 25000000)</div><div class='del'>-		return -ERANGE;</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, -ERANGE, "clock frequency out of range\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate can/net device */</div><div class='ctx'> 	net = alloc_candev(sizeof(struct mcp251x_priv), TX_ECHO_SKB_MAX);</div><div class='hunk'>@@ -1324,8 +1336,10 @@ static int mcp251x_can_probe(struct spi_device *spi)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	ret = clk_prepare_enable(clk);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot enable clock\n");</div><div class='ctx'> 		goto out_free;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	net-&gt;netdev_ops = &amp;mcp251x_netdev_ops;</div><div class='ctx'> 	net-&gt;ethtool_ops = &amp;mcp251x_ethtool_ops;</div><div class='hunk'>@@ -1350,22 +1364,28 @@ static int mcp251x_can_probe(struct spi_device *spi)</div><div class='ctx'> 	else</div><div class='ctx'> 		spi-&gt;max_speed_hz = spi-&gt;max_speed_hz ? : 10 * 1000 * 1000;</div><div class='ctx'> 	ret = spi_setup(spi);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot set up spi\n");</div><div class='ctx'> 		goto out_clk;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;power = devm_regulator_get_optional(&amp;spi-&gt;dev, "vdd");</div><div class='ctx'> 	priv-&gt;transceiver = devm_regulator_get_optional(&amp;spi-&gt;dev, "xceiver");</div><div class='ctx'> 	if ((PTR_ERR(priv-&gt;power) == -EPROBE_DEFER) ||</div><div class='ctx'> 	    (PTR_ERR(priv-&gt;transceiver) == -EPROBE_DEFER)) {</div><div class='ctx'> 		ret = -EPROBE_DEFER;</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "supply deferred\n");</div><div class='ctx'> 		goto out_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = mcp251x_power_enable(priv-&gt;power, 1);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot enable power\n");</div><div class='ctx'> 		goto out_clk;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;wq = alloc_workqueue("mcp251x_wq", WQ_FREEZABLE | WQ_MEM_RECLAIM,</div><div class='add'>+	priv-&gt;wq = alloc_workqueue("mcp251x_wq",</div><div class='add'>+				   WQ_FREEZABLE | WQ_MEM_RECLAIM | WQ_PERCPU,</div><div class='ctx'> 				   0);</div><div class='ctx'> 	if (!priv-&gt;wq) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -1396,21 +1416,24 @@ static int mcp251x_can_probe(struct spi_device *spi)</div><div class='ctx'> 	/* Here is OK to not lock the MCP, no one knows about it yet */</div><div class='ctx'> 	ret = mcp251x_hw_probe(spi);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		if (ret == -ENODEV)</div><div class='del'>-			dev_err(&amp;spi-&gt;dev, "Cannot initialize MCP%x. Wrong wiring?\n",</div><div class='del'>-				priv-&gt;model);</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot initialize MCP%x. Wrong wiring?\n",</div><div class='add'>+			      priv-&gt;model);</div><div class='ctx'> 		goto error_probe;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mcp251x_hw_sleep(spi);</div><div class='ctx'> </div><div class='ctx'> 	ret = register_candev(net);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot register CAN device\n");</div><div class='ctx'> 		goto error_probe;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = mcp251x_gpio_setup(priv);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot set up gpios\n");</div><div class='ctx'> 		goto out_unregister_candev;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(net, "MCP%x successfully initialized.\n", priv-&gt;model);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1429,7 +1452,6 @@ out_clk:</div><div class='ctx'> out_free:</div><div class='ctx'> 	free_candev(net);</div><div class='ctx'> </div><div class='del'>-	dev_err(&amp;spi-&gt;dev, "Probe failed, err=%d\n", -ret);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/Kconfig b/drivers/net/can/spi/mcp251xfd/Kconfig<br/>index 877e4356010d..7c29846e6051 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/Kconfig</a></div><div class='hunk'>@@ -5,6 +5,7 @@ config CAN_MCP251XFD</div><div class='ctx'> 	select CAN_RX_OFFLOAD</div><div class='ctx'> 	select REGMAP</div><div class='ctx'> 	select WANT_DEV_COREDUMP</div><div class='add'>+	select GPIOLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	  Driver for the Microchip MCP251XFD SPI FD-CAN controller</div><div class='ctx'> 	  family.</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c<br/>index 3bc56517fe7a..5134ebb85880 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c</a></div><div class='hunk'>@@ -75,6 +75,24 @@ static const struct can_bittiming_const mcp251xfd_data_bittiming_const = {</div><div class='ctx'> 	.brp_inc = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* The datasheet of the mcp2518fd (DS20006027B) specifies a range of</div><div class='add'>+ * [-64,63] for TDCO, indicating a relative TDCO.</div><div class='add'>+ *</div><div class='add'>+ * Manual tests have shown, that using a relative TDCO configuration</div><div class='add'>+ * results in bus off, while an absolute configuration works.</div><div class='add'>+ *</div><div class='add'>+ * For TDCO use the max value (63) from the data sheet, but 0 as the</div><div class='add'>+ * minimum.</div><div class='add'>+ */</div><div class='add'>+static const struct can_tdc_const mcp251xfd_tdc_const = {</div><div class='add'>+	.tdcv_min = 0,</div><div class='add'>+	.tdcv_max = 63,</div><div class='add'>+	.tdco_min = 0,</div><div class='add'>+	.tdco_max = 63,</div><div class='add'>+	.tdcf_min = 0,</div><div class='add'>+	.tdcf_max = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const char *__mcp251xfd_get_model_str(enum mcp251xfd_model model)</div><div class='ctx'> {</div><div class='ctx'> 	switch (model) {</div><div class='hunk'>@@ -509,9 +527,8 @@ static int mcp251xfd_chip_timestamp_init(const struct mcp251xfd_priv *priv)</div><div class='ctx'> static int mcp251xfd_set_bittiming(const struct mcp251xfd_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	const struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='del'>-	u32 val = 0;</div><div class='del'>-	s8 tdco;</div><div class='add'>+	const struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	u32 tdcmod, val = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* CAN Control Register</div><div class='hunk'>@@ -575,34 +592,37 @@ static int mcp251xfd_set_bittiming(const struct mcp251xfd_priv *priv)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* Transmitter Delay Compensation */</div><div class='del'>-	tdco = clamp_t(int, dbt-&gt;brp * (dbt-&gt;prop_seg + dbt-&gt;phase_seg1),</div><div class='del'>-		       -64, 63);</div><div class='del'>-	val = FIELD_PREP(MCP251XFD_REG_TDC_TDCMOD_MASK,</div><div class='del'>-			 MCP251XFD_REG_TDC_TDCMOD_AUTO) |</div><div class='del'>-		FIELD_PREP(MCP251XFD_REG_TDC_TDCO_MASK, tdco);</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_TDC_AUTO)</div><div class='add'>+		tdcmod = MCP251XFD_REG_TDC_TDCMOD_AUTO;</div><div class='add'>+	else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_TDC_MANUAL)</div><div class='add'>+		tdcmod = MCP251XFD_REG_TDC_TDCMOD_MANUAL;</div><div class='add'>+	else</div><div class='add'>+		tdcmod = MCP251XFD_REG_TDC_TDCMOD_DISABLED;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(MCP251XFD_REG_TDC_TDCMOD_MASK, tdcmod) |</div><div class='add'>+	      FIELD_PREP(MCP251XFD_REG_TDC_TDCV_MASK, priv-&gt;can.fd.tdc.tdcv) |</div><div class='add'>+	      FIELD_PREP(MCP251XFD_REG_TDC_TDCO_MASK, priv-&gt;can.fd.tdc.tdco);</div><div class='ctx'> </div><div class='ctx'> 	return regmap_write(priv-&gt;map_reg, MCP251XFD_REG_TDC, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mcp251xfd_chip_rx_int_enable(const struct mcp251xfd_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	u32 val;</div><div class='add'>+	u32 val, mask;</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;rx_int)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* Configure GPIOs:</div><div class='del'>-	 * - PIN0: GPIO Input</div><div class='del'>-	 * - PIN1: GPIO Input/RX Interrupt</div><div class='add'>+	/* Configure PIN1 as RX Interrupt:</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * PIN1 must be Input, otherwise there is a glitch on the</div><div class='ctx'> 	 * rx-INT line. It happens between setting the PIN as output</div><div class='ctx'> 	 * (in the first byte of the SPI transfer) and configuring the</div><div class='ctx'> 	 * PIN as interrupt (in the last byte of the SPI transfer).</div><div class='ctx'> 	 */</div><div class='del'>-	val = MCP251XFD_REG_IOCON_PM0 | MCP251XFD_REG_IOCON_TRIS1 |</div><div class='del'>-		MCP251XFD_REG_IOCON_TRIS0;</div><div class='del'>-	return regmap_write(priv-&gt;map_reg, MCP251XFD_REG_IOCON, val);</div><div class='add'>+	val = MCP251XFD_REG_IOCON_TRIS(1);</div><div class='add'>+	mask = MCP251XFD_REG_IOCON_TRIS(1) | MCP251XFD_REG_IOCON_PM(1);</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON, mask, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mcp251xfd_chip_rx_int_disable(const struct mcp251xfd_priv *priv)</div><div class='hunk'>@@ -612,13 +632,9 @@ static int mcp251xfd_chip_rx_int_disable(const struct mcp251xfd_priv *priv)</div><div class='ctx'> 	if (!priv-&gt;rx_int)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* Configure GPIOs:</div><div class='del'>-	 * - PIN0: GPIO Input</div><div class='del'>-	 * - PIN1: GPIO Input</div><div class='del'>-	 */</div><div class='del'>-	val = MCP251XFD_REG_IOCON_PM1 | MCP251XFD_REG_IOCON_PM0 |</div><div class='del'>-		MCP251XFD_REG_IOCON_TRIS1 | MCP251XFD_REG_IOCON_TRIS0;</div><div class='del'>-	return regmap_write(priv-&gt;map_reg, MCP251XFD_REG_IOCON, val);</div><div class='add'>+	/* Configure PIN1 as GPIO Input */</div><div class='add'>+	val = MCP251XFD_REG_IOCON_PM(1) | MCP251XFD_REG_IOCON_TRIS(1);</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON, val, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mcp251xfd_chip_ecc_init(struct mcp251xfd_priv *priv)</div><div class='hunk'>@@ -745,21 +761,13 @@ static void mcp251xfd_chip_stop(struct mcp251xfd_priv *priv,</div><div class='ctx'> 	mcp251xfd_chip_interrupts_disable(priv);</div><div class='ctx'> 	mcp251xfd_chip_rx_int_disable(priv);</div><div class='ctx'> 	mcp251xfd_timestamp_stop(priv);</div><div class='del'>-	mcp251xfd_chip_sleep(priv);</div><div class='add'>+	mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mcp251xfd_chip_start(struct mcp251xfd_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = mcp251xfd_chip_softreset(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_chip_stop;</div><div class='del'>-</div><div class='del'>-	err = mcp251xfd_chip_clock_init(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_chip_stop;</div><div class='del'>-</div><div class='ctx'> 	err = mcp251xfd_chip_timestamp_init(priv);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_chip_stop;</div><div class='hunk'>@@ -1603,8 +1611,11 @@ static int mcp251xfd_open(struct net_device *ndev)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	err = pm_runtime_resume_and_get(ndev-&gt;dev.parent);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		if (err == -ETIMEDOUT || err == -ENODEV)</div><div class='add'>+			pm_runtime_set_suspended(ndev-&gt;dev.parent);</div><div class='ctx'> 		goto out_close_candev;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = mcp251xfd_ring_alloc(priv);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1692,8 +1703,8 @@ static const struct net_device_ops mcp251xfd_netdev_ops = {</div><div class='ctx'> 	.ndo_open = mcp251xfd_open,</div><div class='ctx'> 	.ndo_stop = mcp251xfd_stop,</div><div class='ctx'> 	.ndo_start_xmit	= mcp251xfd_start_xmit,</div><div class='del'>-	.ndo_eth_ioctl = can_eth_ioctl_hwts,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+	.ndo_hwtstamp_get = can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = can_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1786,6 +1797,160 @@ static int mcp251xfd_register_check_rx_int(struct mcp251xfd_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const char * const mcp251xfd_gpio_names[] = { "GPIO0", "GPIO1" };</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_request(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 pin_mask = MCP251XFD_REG_IOCON_PM(offset);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;rx_int &amp;&amp; offset == 1) {</div><div class='add'>+		netdev_err(priv-&gt;ndev, "Can't use GPIO 1 with RX-INT!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_resume_and_get(priv-&gt;ndev-&gt;dev.parent);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON, pin_mask, pin_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_gpio_free(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(priv-&gt;ndev-&gt;dev.parent);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_get_direction(struct gpio_chip *chip,</div><div class='add'>+					unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 mask = MCP251XFD_REG_IOCON_TRIS(offset);</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_IOCON, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (mask &amp; val)</div><div class='add'>+		return GPIO_LINE_DIRECTION_IN;</div><div class='add'>+</div><div class='add'>+	return GPIO_LINE_DIRECTION_OUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 mask = MCP251XFD_REG_IOCON_GPIO(offset);</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_IOCON, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return !!(mask &amp; val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,</div><div class='add'>+				       unsigned long *bit)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_IOCON, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*bit = FIELD_GET(MCP251XFD_REG_IOCON_GPIO_MASK, val) &amp; *mask;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_direction_output(struct gpio_chip *chip,</div><div class='add'>+					   unsigned int offset, int value)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 dir_mask = MCP251XFD_REG_IOCON_TRIS(offset);</div><div class='add'>+	u32 val_mask = MCP251XFD_REG_IOCON_LAT(offset);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		val = val_mask;</div><div class='add'>+	else</div><div class='add'>+		val = 0;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON,</div><div class='add'>+				  dir_mask | val_mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_direction_input(struct gpio_chip *chip,</div><div class='add'>+					  unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 dir_mask = MCP251XFD_REG_IOCON_TRIS(offset);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON, dir_mask, dir_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 val_mask = MCP251XFD_REG_IOCON_LAT(offset);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		val = val_mask;</div><div class='add'>+	else</div><div class='add'>+		val = 0;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON, val_mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask,</div><div class='add'>+				       unsigned long *bits)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(MCP251XFD_REG_IOCON_LAT_MASK, *bits);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON,</div><div class='add'>+				  MCP251XFD_REG_IOCON_LAT_MASK, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251fdx_gpio_setup(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = &amp;priv-&gt;gc;</div><div class='add'>+</div><div class='add'>+	if (!device_property_present(&amp;priv-&gt;spi-&gt;dev, "gpio-controller"))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	gc-&gt;label = dev_name(&amp;priv-&gt;spi-&gt;dev);</div><div class='add'>+	gc-&gt;parent = &amp;priv-&gt;spi-&gt;dev;</div><div class='add'>+	gc-&gt;owner = THIS_MODULE;</div><div class='add'>+	gc-&gt;request = mcp251xfd_gpio_request;</div><div class='add'>+	gc-&gt;free = mcp251xfd_gpio_free;</div><div class='add'>+	gc-&gt;get_direction = mcp251xfd_gpio_get_direction;</div><div class='add'>+	gc-&gt;direction_output = mcp251xfd_gpio_direction_output;</div><div class='add'>+	gc-&gt;direction_input = mcp251xfd_gpio_direction_input;</div><div class='add'>+	gc-&gt;get = mcp251xfd_gpio_get;</div><div class='add'>+	gc-&gt;get_multiple = mcp251xfd_gpio_get_multiple;</div><div class='add'>+	gc-&gt;set = mcp251xfd_gpio_set;</div><div class='add'>+	gc-&gt;set_multiple = mcp251xfd_gpio_set_multiple;</div><div class='add'>+	gc-&gt;base = -1;</div><div class='add'>+	gc-&gt;can_sleep = true;</div><div class='add'>+	gc-&gt;ngpio = ARRAY_SIZE(mcp251xfd_gpio_names);</div><div class='add'>+	gc-&gt;names = mcp251xfd_gpio_names;</div><div class='add'>+</div><div class='add'>+	return devm_gpiochip_add_data(&amp;priv-&gt;spi-&gt;dev, gc, priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> mcp251xfd_register_get_dev_id(const struct mcp251xfd_priv *priv, u32 *dev_id,</div><div class='ctx'> 			      u32 *effective_speed_hz_slow,</div><div class='hunk'>@@ -1885,53 +2050,59 @@ static int mcp251xfd_register(struct mcp251xfd_priv *priv)</div><div class='ctx'> 	struct net_device *ndev = priv-&gt;ndev;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	mcp251xfd_register_quirks(priv);</div><div class='add'>+</div><div class='ctx'> 	err = mcp251xfd_clks_and_vdd_enable(priv);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	pm_runtime_get_noresume(ndev-&gt;dev.parent);</div><div class='del'>-	err = pm_runtime_set_active(ndev-&gt;dev.parent);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_runtime_put_noidle;</div><div class='del'>-	pm_runtime_enable(ndev-&gt;dev.parent);</div><div class='del'>-</div><div class='del'>-	mcp251xfd_register_quirks(priv);</div><div class='del'>-</div><div class='ctx'> 	err = mcp251xfd_chip_softreset(priv);</div><div class='ctx'> 	if (err == -ENODEV)</div><div class='del'>-		goto out_runtime_disable;</div><div class='add'>+		goto out_clks_and_vdd_disable;</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_chip_sleep;</div><div class='ctx'> </div><div class='ctx'> 	err = mcp251xfd_chip_clock_init(priv);</div><div class='ctx'> 	if (err == -ENODEV)</div><div class='del'>-		goto out_runtime_disable;</div><div class='add'>+		goto out_clks_and_vdd_disable;</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_chip_sleep;</div><div class='ctx'> </div><div class='add'>+	pm_runtime_get_noresume(ndev-&gt;dev.parent);</div><div class='add'>+	err = pm_runtime_set_active(ndev-&gt;dev.parent);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_runtime_put_noidle;</div><div class='add'>+	pm_runtime_enable(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='ctx'> 	err = mcp251xfd_register_chip_detect(priv);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto out_chip_sleep;</div><div class='add'>+		goto out_runtime_disable;</div><div class='ctx'> </div><div class='ctx'> 	err = mcp251xfd_register_check_rx_int(priv);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto out_chip_sleep;</div><div class='add'>+		goto out_runtime_disable;</div><div class='ctx'> </div><div class='ctx'> 	mcp251xfd_ethtool_init(priv);</div><div class='ctx'> </div><div class='add'>+	err = mcp251fdx_gpio_setup(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;priv-&gt;spi-&gt;dev, err, "Failed to register gpio-controller.\n");</div><div class='add'>+		goto out_runtime_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = register_candev(ndev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto out_chip_sleep;</div><div class='add'>+		goto out_runtime_disable;</div><div class='ctx'> </div><div class='ctx'> 	err = mcp251xfd_register_done(priv);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_unregister_candev;</div><div class='ctx'> </div><div class='del'>-	/* Put controller into sleep mode and let pm_runtime_put()</div><div class='del'>-	 * disable the clocks and vdd. If CONFIG_PM is not enabled,</div><div class='del'>-	 * the clocks and vdd will stay powered.</div><div class='add'>+	/* Put controller into Config mode and let pm_runtime_put()</div><div class='add'>+	 * put in sleep mode, disable the clocks and vdd. If CONFIG_PM</div><div class='add'>+	 * is not enabled, the clocks and vdd will stay powered.</div><div class='ctx'> 	 */</div><div class='del'>-	err = mcp251xfd_chip_sleep(priv);</div><div class='add'>+	err = mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_unregister_candev;</div><div class='ctx'> </div><div class='hunk'>@@ -1941,12 +2112,13 @@ static int mcp251xfd_register(struct mcp251xfd_priv *priv)</div><div class='ctx'> </div><div class='ctx'> out_unregister_candev:</div><div class='ctx'> 	unregister_candev(ndev);</div><div class='del'>-out_chip_sleep:</div><div class='del'>-	mcp251xfd_chip_sleep(priv);</div><div class='ctx'> out_runtime_disable:</div><div class='ctx'> 	pm_runtime_disable(ndev-&gt;dev.parent);</div><div class='ctx'> out_runtime_put_noidle:</div><div class='ctx'> 	pm_runtime_put_noidle(ndev-&gt;dev.parent);</div><div class='add'>+out_chip_sleep:</div><div class='add'>+	mcp251xfd_chip_sleep(priv);</div><div class='add'>+out_clks_and_vdd_disable:</div><div class='ctx'> 	mcp251xfd_clks_and_vdd_disable(priv);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1958,10 +2130,12 @@ static inline void mcp251xfd_unregister(struct mcp251xfd_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	unregister_candev(ndev);</div><div class='ctx'> </div><div class='del'>-	if (pm_runtime_enabled(ndev-&gt;dev.parent))</div><div class='add'>+	if (pm_runtime_enabled(ndev-&gt;dev.parent)) {</div><div class='ctx'> 		pm_runtime_disable(ndev-&gt;dev.parent);</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='add'>+		mcp251xfd_chip_sleep(priv);</div><div class='ctx'> 		mcp251xfd_clks_and_vdd_disable(priv);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id mcp251xfd_of_match[] = {</div><div class='hunk'>@@ -2082,11 +2256,13 @@ static int mcp251xfd_probe(struct spi_device *spi)</div><div class='ctx'> 	priv-&gt;can.do_set_mode = mcp251xfd_set_mode;</div><div class='ctx'> 	priv-&gt;can.do_get_berr_counter = mcp251xfd_get_berr_counter;</div><div class='ctx'> 	priv-&gt;can.bittiming_const = &amp;mcp251xfd_bittiming_const;</div><div class='del'>-	priv-&gt;can.data_bittiming_const = &amp;mcp251xfd_data_bittiming_const;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;mcp251xfd_data_bittiming_const;</div><div class='add'>+	priv-&gt;can.fd.tdc_const = &amp;mcp251xfd_tdc_const;</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='ctx'> 		CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_BERR_REPORTING |</div><div class='ctx'> 		CAN_CTRLMODE_FD | CAN_CTRLMODE_FD_NON_ISO |</div><div class='del'>-		CAN_CTRLMODE_CC_LEN8_DLC;</div><div class='add'>+		CAN_CTRLMODE_CC_LEN8_DLC | CAN_CTRLMODE_TDC_AUTO |</div><div class='add'>+		CAN_CTRLMODE_TDC_MANUAL;</div><div class='ctx'> 	set_bit(MCP251XFD_FLAGS_DOWN, priv-&gt;flags);</div><div class='ctx'> 	priv-&gt;ndev = ndev;</div><div class='ctx'> 	priv-&gt;spi = spi;</div><div class='hunk'>@@ -2174,24 +2350,49 @@ static void mcp251xfd_remove(struct spi_device *spi)</div><div class='ctx'> 	struct mcp251xfd_priv *priv = spi_get_drvdata(spi);</div><div class='ctx'> 	struct net_device *ndev = priv-&gt;ndev;</div><div class='ctx'> </div><div class='del'>-	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='ctx'> 	mcp251xfd_unregister(priv);</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='ctx'> 	spi-&gt;max_speed_hz = priv-&gt;spi_max_speed_hz_orig;</div><div class='ctx'> 	free_candev(ndev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __maybe_unused mcp251xfd_runtime_suspend(struct device *device)</div><div class='ctx'> {</div><div class='del'>-	const struct mcp251xfd_priv *priv = dev_get_drvdata(device);</div><div class='add'>+	struct mcp251xfd_priv *priv = dev_get_drvdata(device);</div><div class='ctx'> </div><div class='add'>+	mcp251xfd_chip_sleep(priv);</div><div class='ctx'> 	return mcp251xfd_clks_and_vdd_disable(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __maybe_unused mcp251xfd_runtime_resume(struct device *device)</div><div class='ctx'> {</div><div class='del'>-	const struct mcp251xfd_priv *priv = dev_get_drvdata(device);</div><div class='add'>+	struct mcp251xfd_priv *priv = dev_get_drvdata(device);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_clks_and_vdd_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_softreset(priv);</div><div class='add'>+	if (err == -ENODEV)</div><div class='add'>+		goto out_clks_and_vdd_disable;</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_sleep;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_clock_init(priv);</div><div class='add'>+	if (err == -ENODEV)</div><div class='add'>+		goto out_clks_and_vdd_disable;</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_sleep;</div><div class='ctx'> </div><div class='del'>-	return mcp251xfd_clks_and_vdd_enable(priv);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_chip_sleep:</div><div class='add'>+	mcp251xfd_chip_sleep(priv);</div><div class='add'>+out_clks_and_vdd_disable:</div><div class='add'>+	mcp251xfd_clks_and_vdd_disable(priv);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct dev_pm_ops mcp251xfd_pm_ops = {</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c<br/>index 8c5be8d1c519..70d5ff0ae7ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c</a></div><div class='hunk'>@@ -13,17 +13,9 @@</div><div class='ctx'> static const struct regmap_config mcp251xfd_regmap_crc;</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-mcp251xfd_regmap_nocrc_write(void *context, const void *data, size_t count)</div><div class='del'>-{</div><div class='del'>-	struct spi_device *spi = context;</div><div class='del'>-</div><div class='del'>-	return spi_write(spi, data, count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-mcp251xfd_regmap_nocrc_gather_write(void *context,</div><div class='del'>-				    const void *reg, size_t reg_len,</div><div class='del'>-				    const void *val, size_t val_len)</div><div class='add'>+_mcp251xfd_regmap_nocrc_gather_write(void *context,</div><div class='add'>+				     const void *reg, size_t reg_len,</div><div class='add'>+				     const void *val, size_t val_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct spi_device *spi = context;</div><div class='ctx'> 	struct mcp251xfd_priv *priv = spi_get_drvdata(spi);</div><div class='hunk'>@@ -47,6 +39,54 @@ mcp251xfd_regmap_nocrc_gather_write(void *context,</div><div class='ctx'> 	return spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_nocrc_gather_write(void *context,</div><div class='add'>+				    const void *reg_p, size_t reg_len,</div><div class='add'>+				    const void *val, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	const u16 byte_exclude = MCP251XFD_REG_IOCON +</div><div class='add'>+				 mcp251xfd_first_byte_set(MCP251XFD_REG_IOCON_GPIO_MASK);</div><div class='add'>+	u16 reg = be16_to_cpu(*(__be16 *)reg_p) &amp; MCP251XFD_SPI_ADDRESS_MASK;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Never write to bits 16..23 of IOCON register to avoid clearing of LAT0/LAT1</div><div class='add'>+	 *</div><div class='add'>+	 * According to MCP2518FD Errata DS80000789E 5 writing IOCON register using one</div><div class='add'>+	 * SPI write command clears LAT0/LAT1.</div><div class='add'>+	 *</div><div class='add'>+	 * Errata Fix/Work Around suggests to write registers with single byte</div><div class='add'>+	 * write instructions. However, it seems that the byte at 0xe06(IOCON[23:16])</div><div class='add'>+	 * is for read-only access and writing to it causes the clearing of LAT0/LAT1.</div><div class='add'>+	 */</div><div class='add'>+	if (reg &lt;= byte_exclude &amp;&amp; reg + val_len &gt; byte_exclude) {</div><div class='add'>+		size_t len = byte_exclude - reg;</div><div class='add'>+</div><div class='add'>+		/* Write up to 0xe05 */</div><div class='add'>+		ret = _mcp251xfd_regmap_nocrc_gather_write(context, reg_p, reg_len, val, len);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Write from 0xe07 on */</div><div class='add'>+		reg += len + 1;</div><div class='add'>+		reg = (__force unsigned short)cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_WRITE | reg);</div><div class='add'>+		return _mcp251xfd_regmap_nocrc_gather_write(context, &amp;reg, reg_len,</div><div class='add'>+							    val + len + 1,</div><div class='add'>+							    val_len - len - 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return _mcp251xfd_regmap_nocrc_gather_write(context, reg_p, reg_len,</div><div class='add'>+						  val, val_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_nocrc_write(void *context, const void *data, size_t count)</div><div class='add'>+{</div><div class='add'>+	const size_t data_offset = sizeof(__be16);</div><div class='add'>+</div><div class='add'>+	return mcp251xfd_regmap_nocrc_gather_write(context, data, data_offset,</div><div class='add'>+						   data + data_offset, count - data_offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool</div><div class='ctx'> mcp251xfd_update_bits_read_reg(const struct mcp251xfd_priv *priv,</div><div class='ctx'> 			       unsigned int reg)</div><div class='hunk'>@@ -64,6 +104,7 @@ mcp251xfd_update_bits_read_reg(const struct mcp251xfd_priv *priv,</div><div class='ctx'> 	case MCP251XFD_REG_CON:</div><div class='ctx'> 	case MCP251XFD_REG_OSC:</div><div class='ctx'> 	case MCP251XFD_REG_ECCCON:</div><div class='add'>+	case MCP251XFD_REG_IOCON:</div><div class='ctx'> 		return true;</div><div class='ctx'> 	default:</div><div class='ctx'> 		mcp251xfd_for_each_rx_ring(priv, ring, n) {</div><div class='hunk'>@@ -139,10 +180,9 @@ mcp251xfd_regmap_nocrc_update_bits(void *context, unsigned int reg,</div><div class='ctx'> 	tmp_le32 = orig_le32 &amp; ~mask_le32;</div><div class='ctx'> 	tmp_le32 |= val_le32 &amp; mask_le32;</div><div class='ctx'> </div><div class='del'>-	mcp251xfd_spi_cmd_write_nocrc(&amp;buf_tx-&gt;cmd, reg + first_byte);</div><div class='del'>-	memcpy(buf_tx-&gt;data, &amp;tmp_le32, len);</div><div class='del'>-</div><div class='del'>-	return spi_write(spi, buf_tx, sizeof(buf_tx-&gt;cmd) + len);</div><div class='add'>+	reg += first_byte;</div><div class='add'>+	mcp251xfd_spi_cmd_write_nocrc(&amp;buf_tx-&gt;cmd, reg);</div><div class='add'>+	return mcp251xfd_regmap_nocrc_gather_write(context, &amp;buf_tx-&gt;cmd, 2, &amp;tmp_le32, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -196,9 +236,9 @@ mcp251xfd_regmap_nocrc_read(void *context,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-mcp251xfd_regmap_crc_gather_write(void *context,</div><div class='del'>-				  const void *reg_p, size_t reg_len,</div><div class='del'>-				  const void *val, size_t val_len)</div><div class='add'>+_mcp251xfd_regmap_crc_gather_write(void *context,</div><div class='add'>+				   const void *reg_p, size_t reg_len,</div><div class='add'>+				   const void *val, size_t val_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct spi_device *spi = context;</div><div class='ctx'> 	struct mcp251xfd_priv *priv = spi_get_drvdata(spi);</div><div class='hunk'>@@ -230,6 +270,44 @@ mcp251xfd_regmap_crc_gather_write(void *context,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='add'>+mcp251xfd_regmap_crc_gather_write(void *context,</div><div class='add'>+				  const void *reg_p, size_t reg_len,</div><div class='add'>+				  const void *val, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	const u16 byte_exclude = MCP251XFD_REG_IOCON +</div><div class='add'>+				 mcp251xfd_first_byte_set(MCP251XFD_REG_IOCON_GPIO_MASK);</div><div class='add'>+	u16 reg = *(u16 *)reg_p;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Never write to bits 16..23 of IOCON register to avoid clearing of LAT0/LAT1</div><div class='add'>+	 *</div><div class='add'>+	 * According to MCP2518FD Errata DS80000789E 5 writing IOCON register using one</div><div class='add'>+	 * SPI write command clears LAT0/LAT1.</div><div class='add'>+	 *</div><div class='add'>+	 * Errata Fix/Work Around suggests to write registers with single byte</div><div class='add'>+	 * write instructions. However, it seems that the byte at 0xe06(IOCON[23:16])</div><div class='add'>+	 * is for read-only access and writing to it causes the clearing of LAT0/LAT1.</div><div class='add'>+	 */</div><div class='add'>+	if (reg &lt;= byte_exclude  &amp;&amp; reg + val_len &gt; byte_exclude) {</div><div class='add'>+		size_t len = byte_exclude - reg;</div><div class='add'>+</div><div class='add'>+		/* Write up to 0xe05 */</div><div class='add'>+		ret = _mcp251xfd_regmap_crc_gather_write(context, &amp;reg, reg_len, val, len);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Write from 0xe07 on */</div><div class='add'>+		reg += len + 1;</div><div class='add'>+		return _mcp251xfd_regmap_crc_gather_write(context, &amp;reg, reg_len,</div><div class='add'>+							  val + len + 1,</div><div class='add'>+							  val_len - len - 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return _mcp251xfd_regmap_crc_gather_write(context, reg_p, reg_len,</div><div class='add'>+						  val, val_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='ctx'> mcp251xfd_regmap_crc_write(void *context,</div><div class='ctx'> 			   const void *data, size_t count)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c<br/>index e684991fa391..c34f2067a989 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> //</div><div class='ctx'> // mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='ctx'> //</div><div class='del'>-// Copyright (c) 2019, 2020, 2021 Pengutronix,</div><div class='add'>+// Copyright (c) 2019, 2020, 2021, 2024 Pengutronix,</div><div class='ctx'> //               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='ctx'> //</div><div class='ctx'> // Based on:</div><div class='hunk'>@@ -483,9 +483,11 @@ int mcp251xfd_ring_alloc(struct mcp251xfd_priv *priv)</div><div class='ctx'> 		};</div><div class='ctx'> 		const struct ethtool_coalesce ec = {</div><div class='ctx'> 			.rx_coalesce_usecs_irq = priv-&gt;rx_coalesce_usecs_irq,</div><div class='del'>-			.rx_max_coalesced_frames_irq = priv-&gt;rx_obj_num_coalesce_irq,</div><div class='add'>+			.rx_max_coalesced_frames_irq = priv-&gt;rx_obj_num_coalesce_irq == 0 ?</div><div class='add'>+				1 : priv-&gt;rx_obj_num_coalesce_irq,</div><div class='ctx'> 			.tx_coalesce_usecs_irq = priv-&gt;tx_coalesce_usecs_irq,</div><div class='del'>-			.tx_max_coalesced_frames_irq = priv-&gt;tx_obj_num_coalesce_irq,</div><div class='add'>+			.tx_max_coalesced_frames_irq = priv-&gt;tx_obj_num_coalesce_irq == 0 ?</div><div class='add'>+				1 : priv-&gt;tx_obj_num_coalesce_irq,</div><div class='ctx'> 		};</div><div class='ctx'> 		struct can_ram_layout layout;</div><div class='ctx'> </div><div class='hunk'>@@ -539,11 +541,11 @@ int mcp251xfd_ring_alloc(struct mcp251xfd_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> 	priv-&gt;rx_ring_num = i;</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;priv-&gt;rx_irq_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-	priv-&gt;rx_irq_timer.function = mcp251xfd_rx_irq_timer;</div><div class='add'>+	hrtimer_setup(&amp;priv-&gt;rx_irq_timer, mcp251xfd_rx_irq_timer, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;priv-&gt;tx_irq_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-	priv-&gt;tx_irq_timer.function = mcp251xfd_tx_irq_timer;</div><div class='add'>+	hrtimer_setup(&amp;priv-&gt;tx_irq_timer, mcp251xfd_tx_irq_timer, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c<br/>index f732556d233a..e94321849fd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c</a></div><div class='hunk'>@@ -16,9 +16,14 @@</div><div class='ctx'> </div><div class='ctx'> #include "mcp251xfd.h"</div><div class='ctx'> </div><div class='del'>-static inline bool mcp251xfd_tx_fifo_sta_full(u32 fifo_sta)</div><div class='add'>+static inline bool mcp251xfd_tx_fifo_sta_empty(u32 fifo_sta)</div><div class='ctx'> {</div><div class='del'>-	return !(fifo_sta &amp; MCP251XFD_REG_FIFOSTA_TFNRFNIF);</div><div class='add'>+	return fifo_sta &amp; MCP251XFD_REG_FIFOSTA_TFERFFIF;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mcp251xfd_tx_fifo_sta_less_than_half_full(u32 fifo_sta)</div><div class='add'>+{</div><div class='add'>+	return fifo_sta &amp; MCP251XFD_REG_FIFOSTA_TFHRFHIF;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='hunk'>@@ -122,7 +127,11 @@ mcp251xfd_get_tef_len(struct mcp251xfd_priv *priv, u8 *len_p)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	if (mcp251xfd_tx_fifo_sta_full(fifo_sta)) {</div><div class='add'>+	/* If the chip says the TX-FIFO is empty, but there are no TX</div><div class='add'>+	 * buffers free in the ring, we assume all have been sent.</div><div class='add'>+	 */</div><div class='add'>+	if (mcp251xfd_tx_fifo_sta_empty(fifo_sta) &amp;&amp;</div><div class='add'>+	    mcp251xfd_get_tx_free(tx_ring) == 0) {</div><div class='ctx'> 		*len_p = tx_ring-&gt;obj_num;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -143,7 +152,29 @@ mcp251xfd_get_tef_len(struct mcp251xfd_priv *priv, u8 *len_p)</div><div class='ctx'> 	BUILD_BUG_ON(sizeof(tx_ring-&gt;obj_num) != sizeof(len));</div><div class='ctx'> </div><div class='ctx'> 	len = (chip_tx_tail &lt;&lt; shift) - (tail &lt;&lt; shift);</div><div class='del'>-	*len_p = len &gt;&gt; shift;</div><div class='add'>+	len &gt;&gt;= shift;</div><div class='add'>+</div><div class='add'>+	/* According to mcp2518fd erratum DS80000789E 6. the FIFOCI</div><div class='add'>+	 * bits of a FIFOSTA register, here the TX-FIFO tail index</div><div class='add'>+	 * might be corrupted.</div><div class='add'>+	 *</div><div class='add'>+	 * However here it seems the bit indicating that the TX-FIFO</div><div class='add'>+	 * is empty (MCP251XFD_REG_FIFOSTA_TFERFFIF) is not correct</div><div class='add'>+	 * while the TX-FIFO tail index is.</div><div class='add'>+	 *</div><div class='add'>+	 * We assume the TX-FIFO is empty, i.e. all pending CAN frames</div><div class='add'>+	 * haven been send, if:</div><div class='add'>+	 * - Chip's head and tail index are equal (len == 0).</div><div class='add'>+	 * - The TX-FIFO is less than half full.</div><div class='add'>+	 *   (The TX-FIFO empty case has already been checked at the</div><div class='add'>+	 *    beginning of this function.)</div><div class='add'>+	 * - No free buffers in the TX ring.</div><div class='add'>+	 */</div><div class='add'>+	if (len == 0 &amp;&amp; mcp251xfd_tx_fifo_sta_less_than_half_full(fifo_sta) &amp;&amp;</div><div class='add'>+	    mcp251xfd_get_tx_free(tx_ring) == 0)</div><div class='add'>+		len = tx_ring-&gt;obj_num;</div><div class='add'>+</div><div class='add'>+	*len_p = len;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c<br/>index 202ca0d24d03..413a5cb75c13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "mcp251xfd.h"</div><div class='ctx'> </div><div class='del'>-static u64 mcp251xfd_timestamp_raw_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 mcp251xfd_timestamp_raw_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	const struct mcp251xfd_priv *priv;</div><div class='ctx'> 	u32 ts_raw = 0;</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd.h b/drivers/net/can/spi/mcp251xfd/mcp251xfd.h<br/>index dcbbd2b2fae8..085d7101e595 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/spi/mcp251xfd/mcp251xfd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd.h</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/rx-offload.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='hunk'>@@ -335,13 +336,19 @@</div><div class='ctx'> #define MCP251XFD_REG_IOCON_TXCANOD BIT(28)</div><div class='ctx'> #define MCP251XFD_REG_IOCON_PM1 BIT(25)</div><div class='ctx'> #define MCP251XFD_REG_IOCON_PM0 BIT(24)</div><div class='add'>+#define MCP251XFD_REG_IOCON_PM(n) (MCP251XFD_REG_IOCON_PM0 &lt;&lt; (n))</div><div class='ctx'> #define MCP251XFD_REG_IOCON_GPIO1 BIT(17)</div><div class='ctx'> #define MCP251XFD_REG_IOCON_GPIO0 BIT(16)</div><div class='add'>+#define MCP251XFD_REG_IOCON_GPIO(n) (MCP251XFD_REG_IOCON_GPIO0 &lt;&lt; (n))</div><div class='add'>+#define MCP251XFD_REG_IOCON_GPIO_MASK GENMASK(17, 16)</div><div class='ctx'> #define MCP251XFD_REG_IOCON_LAT1 BIT(9)</div><div class='ctx'> #define MCP251XFD_REG_IOCON_LAT0 BIT(8)</div><div class='add'>+#define MCP251XFD_REG_IOCON_LAT(n) (MCP251XFD_REG_IOCON_LAT0 &lt;&lt; (n))</div><div class='add'>+#define MCP251XFD_REG_IOCON_LAT_MASK GENMASK(9, 8)</div><div class='ctx'> #define MCP251XFD_REG_IOCON_XSTBYEN BIT(6)</div><div class='ctx'> #define MCP251XFD_REG_IOCON_TRIS1 BIT(1)</div><div class='ctx'> #define MCP251XFD_REG_IOCON_TRIS0 BIT(0)</div><div class='add'>+#define MCP251XFD_REG_IOCON_TRIS(n) (MCP251XFD_REG_IOCON_TRIS0 &lt;&lt; (n))</div><div class='ctx'> </div><div class='ctx'> #define MCP251XFD_REG_CRC 0xe08</div><div class='ctx'> #define MCP251XFD_REG_CRC_FERRIE BIT(25)</div><div class='hunk'>@@ -670,6 +677,7 @@ struct mcp251xfd_priv {</div><div class='ctx'> </div><div class='ctx'> 	struct mcp251xfd_devtype_data devtype_data;</div><div class='ctx'> 	struct can_berr_counter bec;</div><div class='add'>+	struct gpio_chip gc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define MCP251XFD_IS(_model) \</div><div class='head'>diff --git a/drivers/net/can/sun4i_can.c b/drivers/net/can/sun4i_can.c<br/>index 360158c295d3..af52285d5a4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sun4i_can.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/sun4i_can.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sun4i_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sun4i_can.c</a></div><div class='hunk'>@@ -570,7 +570,7 @@ static int sun4i_can_err(struct net_device *dev, u8 isrc, u8 status)</div><div class='ctx'> 		else</div><div class='ctx'> 			state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> 	}</div><div class='del'>-	if (skb &amp;&amp; state != CAN_STATE_BUS_OFF) {</div><div class='add'>+	if (likely(skb) &amp;&amp; state != CAN_STATE_BUS_OFF) {</div><div class='ctx'> 		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='ctx'> 		cf-&gt;data[6] = txerr;</div><div class='ctx'> 		cf-&gt;data[7] = rxerr;</div><div class='hunk'>@@ -579,11 +579,9 @@ static int sun4i_can_err(struct net_device *dev, u8 isrc, u8 status)</div><div class='ctx'> 		/* bus error interrupt */</div><div class='ctx'> 		netdev_dbg(dev, "bus error interrupt\n");</div><div class='ctx'> 		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='add'>+		ecc = readl(priv-&gt;base + SUN4I_REG_STA_ADDR);</div><div class='ctx'> </div><div class='ctx'> 		if (likely(skb)) {</div><div class='del'>-			ecc = readl(priv-&gt;base + SUN4I_REG_STA_ADDR);</div><div class='del'>-</div><div class='ctx'> 			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='ctx'> 			switch (ecc &amp; SUN4I_STA_MASK_ERR) {</div><div class='hunk'>@@ -601,9 +599,15 @@ static int sun4i_can_err(struct net_device *dev, u8 isrc, u8 status)</div><div class='ctx'> 					       &gt;&gt; 16;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='del'>-			/* error occurred during transmission? */</div><div class='del'>-			if ((ecc &amp; SUN4I_STA_ERR_DIR) == 0)</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* error occurred during transmission? */</div><div class='add'>+		if ((ecc &amp; SUN4I_STA_ERR_DIR) == 0) {</div><div class='add'>+			if (likely(skb))</div><div class='ctx'> 				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+			stats-&gt;tx_errors++;</div><div class='add'>+		} else {</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (isrc &amp; SUN4I_INT_ERR_PASSIVE) {</div><div class='hunk'>@@ -629,10 +633,10 @@ static int sun4i_can_err(struct net_device *dev, u8 isrc, u8 status)</div><div class='ctx'> 		tx_state = txerr &gt;= rxerr ? state : 0;</div><div class='ctx'> 		rx_state = txerr &lt;= rxerr ? state : 0;</div><div class='ctx'> </div><div class='del'>-		if (likely(skb))</div><div class='del'>-			can_change_state(dev, cf, tx_state, rx_state);</div><div class='del'>-		else</div><div class='del'>-			priv-&gt;can.state = state;</div><div class='add'>+		/* The skb allocation might fail, but can_change_state()</div><div class='add'>+		 * handles cf == NULL.</div><div class='add'>+		 */</div><div class='add'>+		can_change_state(dev, cf, tx_state, rx_state);</div><div class='ctx'> 		if (state == CAN_STATE_BUS_OFF)</div><div class='ctx'> 			can_bus_off(dev);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -653,8 +657,8 @@ static irqreturn_t sun4i_can_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	u8 isrc, status;</div><div class='ctx'> 	int n = 0;</div><div class='ctx'> </div><div class='del'>-	while ((isrc = readl(priv-&gt;base + SUN4I_REG_INT_ADDR)) &amp;&amp;</div><div class='del'>-	       (n &lt; SUN4I_CAN_MAX_IRQ)) {</div><div class='add'>+	while ((n &lt; SUN4I_CAN_MAX_IRQ) &amp;&amp;</div><div class='add'>+	       (isrc = readl(priv-&gt;base + SUN4I_REG_INT_ADDR))) {</div><div class='ctx'> 		n++;</div><div class='ctx'> 		status = readl(priv-&gt;base + SUN4I_REG_STA_ADDR);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/can/ti_hecc.c b/drivers/net/can/ti_hecc.c<br/>index 644e8b8eb91e..1d3dbf28b105 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ti_hecc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/ti_hecc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ti_hecc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ti_hecc.c</a></div><div class='hunk'>@@ -383,7 +383,7 @@ static void ti_hecc_start(struct net_device *ndev)</div><div class='ctx'> 	 * overflows instead of the hardware silently dropping the</div><div class='ctx'> 	 * messages.</div><div class='ctx'> 	 */</div><div class='del'>-	mbx_mask = ~BIT(HECC_RX_LAST_MBOX);</div><div class='add'>+	mbx_mask = ~BIT_U32(HECC_RX_LAST_MBOX);</div><div class='ctx'> 	hecc_write(priv, HECC_CANOPC, mbx_mask);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupts */</div><div class='hunk'>@@ -829,7 +829,6 @@ static const struct net_device_ops ti_hecc_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= ti_hecc_open,</div><div class='ctx'> 	.ndo_stop		= ti_hecc_close,</div><div class='ctx'> 	.ndo_start_xmit		= ti_hecc_xmit,</div><div class='del'>-	.ndo_change_mtu		= can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ti_hecc_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/usb/Kconfig b/drivers/net/can/usb/Kconfig<br/>index 9dae0c71a2e1..cf65a90816b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/Kconfig</a></div><div class='hunk'>@@ -66,6 +66,7 @@ config CAN_GS_USB</div><div class='ctx'> </div><div class='ctx'> config CAN_KVASER_USB</div><div class='ctx'> 	tristate "Kvaser CAN/USB interface"</div><div class='add'>+	select NET_DEVLINK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver adds support for Kvaser CAN/USB devices like Kvaser</div><div class='ctx'> 	  Leaf Light, Kvaser USBcan II and Kvaser Memorator Pro 5xHS.</div><div class='hunk'>@@ -133,6 +134,17 @@ config CAN_MCBA_USB</div><div class='ctx'> 	  This driver supports the CAN BUS Analyzer interface</div><div class='ctx'> 	  from Microchip (http://www.microchip.com/development-tools/).</div><div class='ctx'> </div><div class='add'>+config CAN_NCT6694</div><div class='add'>+	tristate "Nuvoton NCT6694 Socket CANfd support"</div><div class='add'>+	depends on MFD_NCT6694</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	help</div><div class='add'>+	  If you say yes to this option, support will be included for Nuvoton</div><div class='add'>+	  NCT6694, a USB device to socket CANfd controller.</div><div class='add'>+</div><div class='add'>+	  This driver can also be built as a module. If so, the module will</div><div class='add'>+	  be called nct6694_canfd.</div><div class='add'>+</div><div class='ctx'> config CAN_PEAK_USB</div><div class='ctx'> 	tristate "PEAK PCAN-USB/USB Pro interfaces for CAN 2.0b/CAN-FD"</div><div class='ctx'> 	help</div><div class='head'>diff --git a/drivers/net/can/usb/Makefile b/drivers/net/can/usb/Makefile<br/>index 8b11088e9a59..fcafb1ac262e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/Makefile</a></div><div class='hunk'>@@ -11,5 +11,6 @@ obj-$(CONFIG_CAN_F81604) += f81604.o</div><div class='ctx'> obj-$(CONFIG_CAN_GS_USB) += gs_usb.o</div><div class='ctx'> obj-$(CONFIG_CAN_KVASER_USB) += kvaser_usb/</div><div class='ctx'> obj-$(CONFIG_CAN_MCBA_USB) += mcba_usb.o</div><div class='add'>+obj-$(CONFIG_CAN_NCT6694) += nct6694_canfd.o</div><div class='ctx'> obj-$(CONFIG_CAN_PEAK_USB) += peak_usb/</div><div class='ctx'> obj-$(CONFIG_CAN_UCAN) += ucan.o</div><div class='head'>diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c<br/>index 050c0b49938a..de8e212a1366 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/ems_usb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/ems_usb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/ems_usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/ems_usb.c</a></div><div class='hunk'>@@ -335,15 +335,14 @@ static void ems_usb_rx_err(struct ems_usb *dev, struct ems_cpc_msg *msg)</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;netdev-&gt;stats;</div><div class='ctx'> </div><div class='ctx'> 	skb = alloc_can_err_skb(dev-&gt;netdev, &amp;cf);</div><div class='del'>-	if (skb == NULL)</div><div class='del'>-		return;</div><div class='ctx'> </div><div class='ctx'> 	if (msg-&gt;type == CPC_MSG_TYPE_CAN_STATE) {</div><div class='ctx'> 		u8 state = msg-&gt;msg.can_state;</div><div class='ctx'> </div><div class='ctx'> 		if (state &amp; SJA1000_SR_BS) {</div><div class='ctx'> 			dev-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='ctx'> </div><div class='ctx'> 			dev-&gt;can.can_stats.bus_off++;</div><div class='ctx'> 			can_bus_off(dev-&gt;netdev);</div><div class='hunk'>@@ -361,44 +360,53 @@ static void ems_usb_rx_err(struct ems_usb *dev, struct ems_cpc_msg *msg)</div><div class='ctx'> </div><div class='ctx'> 		/* bus error interrupt */</div><div class='ctx'> 		dev-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='ctx'> </div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='del'>-		switch (ecc &amp; SJA1000_ECC_MASK) {</div><div class='del'>-		case SJA1000_ECC_BIT:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-			break;</div><div class='del'>-		case SJA1000_ECC_FORM:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-			break;</div><div class='del'>-		case SJA1000_ECC_STUFF:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			cf-&gt;data[3] = ecc &amp; SJA1000_ECC_SEG;</div><div class='del'>-			break;</div><div class='add'>+			switch (ecc &amp; SJA1000_ECC_MASK) {</div><div class='add'>+			case SJA1000_ECC_BIT:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+				break;</div><div class='add'>+			case SJA1000_ECC_FORM:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+				break;</div><div class='add'>+			case SJA1000_ECC_STUFF:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				cf-&gt;data[3] = ecc &amp; SJA1000_ECC_SEG;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Error occurred during transmission? */</div><div class='del'>-		if ((ecc &amp; SJA1000_ECC_DIR) == 0)</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		if ((ecc &amp; SJA1000_ECC_DIR) == 0) {</div><div class='add'>+			stats-&gt;tx_errors++;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		} else {</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if (dev-&gt;can.state == CAN_STATE_ERROR_WARNING ||</div><div class='del'>-		    dev-&gt;can.state == CAN_STATE_ERROR_PASSIVE) {</div><div class='add'>+		if (skb &amp;&amp; (dev-&gt;can.state == CAN_STATE_ERROR_WARNING ||</div><div class='add'>+			    dev-&gt;can.state == CAN_STATE_ERROR_PASSIVE)) {</div><div class='ctx'> 			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='ctx'> 			cf-&gt;data[1] = (txerr &gt; rxerr) ?</div><div class='ctx'> 			    CAN_ERR_CRTL_TX_PASSIVE : CAN_ERR_CRTL_RX_PASSIVE;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (msg-&gt;type == CPC_MSG_TYPE_OVERRUN) {</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+			cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		stats-&gt;rx_over_errors++;</div><div class='ctx'> 		stats-&gt;rx_errors++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netif_rx(skb);</div><div class='add'>+	if (skb)</div><div class='add'>+		netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -877,7 +885,6 @@ static const struct net_device_ops ems_usb_netdev_ops = {</div><div class='ctx'> 	.ndo_open = ems_usb_open,</div><div class='ctx'> 	.ndo_stop = ems_usb_close,</div><div class='ctx'> 	.ndo_start_xmit = ems_usb_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ems_usb_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/usb/esd_usb.c b/drivers/net/can/usb/esd_usb.c<br/>index 03ad10b01867..08da507faef4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/esd_usb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/esd_usb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/esd_usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/esd_usb.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='hunk'>@@ -274,6 +275,7 @@ struct esd_usb {</div><div class='ctx'> 	int net_count;</div><div class='ctx'> 	u32 version;</div><div class='ctx'> 	int rxinitdone;</div><div class='add'>+	int in_usb_disconnect;</div><div class='ctx'> 	void *rxbuf[ESD_USB_MAX_RX_URBS];</div><div class='ctx'> 	dma_addr_t rxbuf_dma[ESD_USB_MAX_RX_URBS];</div><div class='ctx'> };</div><div class='hunk'>@@ -480,7 +482,7 @@ static void esd_usb_tx_done_msg(struct esd_usb_net_priv *priv,</div><div class='ctx'> static void esd_usb_read_bulk_callback(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct esd_usb *dev = urb-&gt;context;</div><div class='del'>-	int retval;</div><div class='add'>+	int err;</div><div class='ctx'> 	int pos = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -496,7 +498,7 @@ static void esd_usb_read_bulk_callback(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_info(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			 "Rx URB aborted (%d)\n", urb-&gt;status);</div><div class='add'>+			 "Rx URB aborted (%pe)\n", ERR_PTR(urb-&gt;status));</div><div class='ctx'> 		goto resubmit_urb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -539,15 +541,15 @@ resubmit_urb:</div><div class='ctx'> 			  urb-&gt;transfer_buffer, ESD_USB_RX_BUFFER_SIZE,</div><div class='ctx'> 			  esd_usb_read_bulk_callback, dev);</div><div class='ctx'> </div><div class='del'>-	retval = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='del'>-	if (retval == -ENODEV) {</div><div class='add'>+	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (err == -ENODEV) {</div><div class='ctx'> 		for (i = 0; i &lt; dev-&gt;net_count; i++) {</div><div class='ctx'> 			if (dev-&gt;nets[i])</div><div class='ctx'> 				netif_device_detach(dev-&gt;nets[i]-&gt;netdev);</div><div class='ctx'> 		}</div><div class='del'>-	} else if (retval) {</div><div class='add'>+	} else if (err) {</div><div class='ctx'> 		dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			"failed resubmitting read bulk urb: %d\n", retval);</div><div class='add'>+			"failed resubmitting read bulk urb: %pe\n", ERR_PTR(err));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -572,7 +574,7 @@ static void esd_usb_write_bulk_callback(struct urb *urb)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (urb-&gt;status)</div><div class='del'>-		netdev_info(netdev, "Tx URB aborted (%d)\n", urb-&gt;status);</div><div class='add'>+		netdev_info(netdev, "Tx URB aborted (%pe)\n", ERR_PTR(urb-&gt;status));</div><div class='ctx'> </div><div class='ctx'> 	netif_trans_update(netdev);</div><div class='ctx'> }</div><div class='hunk'>@@ -758,7 +760,7 @@ out:</div><div class='ctx'> 	if (err == -ENODEV)</div><div class='ctx'> 		netif_device_detach(netdev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		netdev_err(netdev, "couldn't start device: %d\n", err);</div><div class='add'>+		netdev_err(netdev, "couldn't start device: %pe\n", ERR_PTR(err));</div><div class='ctx'> </div><div class='ctx'> 	kfree(msg);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -800,7 +802,6 @@ static int esd_usb_open(struct net_device *netdev)</div><div class='ctx'> 	/* finally start device */</div><div class='ctx'> 	err = esd_usb_start(priv);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_warn(netdev, "couldn't start device: %d\n", err);</div><div class='ctx'> 		close_candev(netdev);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -923,7 +924,7 @@ static netdev_tx_t esd_usb_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		if (err == -ENODEV)</div><div class='ctx'> 			netif_device_detach(netdev);</div><div class='ctx'> 		else</div><div class='del'>-			netdev_warn(netdev, "failed tx_urb %d\n", err);</div><div class='add'>+			netdev_warn(netdev, "failed tx_urb %pe\n", ERR_PTR(err));</div><div class='ctx'> </div><div class='ctx'> 		goto releasebuf;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -947,10 +948,11 @@ nourbmem:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int esd_usb_close(struct net_device *netdev)</div><div class='add'>+/* Stop interface */</div><div class='add'>+static int esd_usb_stop(struct esd_usb_net_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct esd_usb_net_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	union esd_usb_msg *msg;</div><div class='add'>+	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='hunk'>@@ -964,8 +966,11 @@ static int esd_usb_close(struct net_device *netdev)</div><div class='ctx'> 	msg-&gt;filter.option = ESD_USB_ID_ENABLE; /* start with segment 0 */</div><div class='ctx'> 	for (i = 0; i &lt;= ESD_USB_MAX_ID_SEGMENT; i++)</div><div class='ctx'> 		msg-&gt;filter.mask[i] = 0;</div><div class='del'>-	if (esd_usb_send_msg(priv-&gt;usb, msg) &lt; 0)</div><div class='del'>-		netdev_err(netdev, "sending idadd message failed\n");</div><div class='add'>+	err = esd_usb_send_msg(priv-&gt;usb, msg);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		netdev_err(priv-&gt;netdev, "sending idadd message failed: %pe\n", ERR_PTR(err));</div><div class='add'>+		goto bail;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* set CAN controller to reset mode */</div><div class='ctx'> 	msg-&gt;hdr.len = sizeof(struct esd_usb_set_baudrate_msg) / sizeof(u32); /* # of 32bit words */</div><div class='hunk'>@@ -973,8 +978,25 @@ static int esd_usb_close(struct net_device *netdev)</div><div class='ctx'> 	msg-&gt;setbaud.net = priv-&gt;index;</div><div class='ctx'> 	msg-&gt;setbaud.rsvd = 0;</div><div class='ctx'> 	msg-&gt;setbaud.baud = cpu_to_le32(ESD_USB_NO_BAUDRATE);</div><div class='del'>-	if (esd_usb_send_msg(priv-&gt;usb, msg) &lt; 0)</div><div class='del'>-		netdev_err(netdev, "sending setbaud message failed\n");</div><div class='add'>+	err = esd_usb_send_msg(priv-&gt;usb, msg);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		netdev_err(priv-&gt;netdev, "sending setbaud message failed: %pe\n", ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+bail:</div><div class='add'>+	kfree(msg);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esd_usb_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;usb-&gt;in_usb_disconnect) {</div><div class='add'>+		/* It's moot to try this in usb_disconnect()! */</div><div class='add'>+		err = esd_usb_stop(priv);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='ctx'> </div><div class='hunk'>@@ -982,16 +1004,13 @@ static int esd_usb_close(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	close_candev(netdev);</div><div class='ctx'> </div><div class='del'>-	kfree(msg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops esd_usb_netdev_ops = {</div><div class='ctx'> 	.ndo_open = esd_usb_open,</div><div class='ctx'> 	.ndo_stop = esd_usb_close,</div><div class='ctx'> 	.ndo_start_xmit = esd_usb_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops esd_usb_ethtool_ops = {</div><div class='hunk'>@@ -1098,7 +1117,7 @@ static int esd_usb_3_set_bittiming(struct net_device *netdev)</div><div class='ctx'> 	const struct can_bittiming_const *data_btc = &amp;esd_usb_3_data_bittiming_const;</div><div class='ctx'> 	struct esd_usb_net_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	struct can_bittiming *nom_bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	struct can_bittiming *data_bt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	struct can_bittiming *data_bt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	struct esd_usb_3_set_baudrate_msg_x *baud_x;</div><div class='ctx'> 	union esd_usb_msg *msg;</div><div class='ctx'> 	u16 flags = 0;</div><div class='hunk'>@@ -1218,9 +1237,9 @@ static int esd_usb_probe_one_net(struct usb_interface *intf, int index)</div><div class='ctx'> 		priv-&gt;can.clock.freq = ESD_USB_3_CAN_CLOCK;</div><div class='ctx'> 		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD;</div><div class='ctx'> 		priv-&gt;can.bittiming_const = &amp;esd_usb_3_nom_bittiming_const;</div><div class='del'>-		priv-&gt;can.data_bittiming_const = &amp;esd_usb_3_data_bittiming_const;</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const = &amp;esd_usb_3_data_bittiming_const;</div><div class='ctx'> 		priv-&gt;can.do_set_bittiming = esd_usb_3_set_bittiming;</div><div class='del'>-		priv-&gt;can.do_set_data_bittiming = esd_usb_3_set_bittiming;</div><div class='add'>+		priv-&gt;can.fd.do_set_data_bittiming = esd_usb_3_set_bittiming;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case ESD_USB_CANUSBM_PRODUCT_ID:</div><div class='hunk'>@@ -1251,14 +1270,14 @@ static int esd_usb_probe_one_net(struct usb_interface *intf, int index)</div><div class='ctx'> </div><div class='ctx'> 	err = register_candev(netdev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "couldn't register CAN device: %d\n", err);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "couldn't register CAN device: %pe\n", ERR_PTR(err));</div><div class='ctx'> 		free_candev(netdev);</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;nets[index] = priv;</div><div class='del'>-	netdev_info(netdev, "device %s registered\n", netdev-&gt;name);</div><div class='add'>+	netdev_info(netdev, "registered\n");</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1354,9 +1373,11 @@ static void esd_usb_disconnect(struct usb_interface *intf)</div><div class='ctx'> 	usb_set_intfdata(intf, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (dev) {</div><div class='add'>+		dev-&gt;in_usb_disconnect = 1;</div><div class='ctx'> 		for (i = 0; i &lt; dev-&gt;net_count; i++) {</div><div class='ctx'> 			if (dev-&gt;nets[i]) {</div><div class='ctx'> 				netdev = dev-&gt;nets[i]-&gt;netdev;</div><div class='add'>+				netdev_info(netdev, "unregister\n");</div><div class='ctx'> 				unregister_netdev(netdev);</div><div class='ctx'> 				free_candev(netdev);</div><div class='ctx'> 			}</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/es58x_core.c b/drivers/net/can/usb/etas_es58x/es58x_core.c<br/>index 71f24dc0a927..f799233c2b72 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/etas_es58x/es58x_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/es58x_core.c</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2019 Robert Bosch Engineering and Business Solutions. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2020 ETAS K.K.. All rights reserved.</div><div class='del'>- * Copyright (c) 2020-2022 Vincent Mailhol &lt;mailhol.vincent@wanadoo.fr&gt;</div><div class='add'>+ * Copyright (c) 2020-2025 Vincent Mailhol &lt;mailhol@kernel.org&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='hunk'>@@ -1976,7 +1976,8 @@ static const struct net_device_ops es58x_netdev_ops = {</div><div class='ctx'> 	.ndo_open = es58x_open,</div><div class='ctx'> 	.ndo_stop = es58x_stop,</div><div class='ctx'> 	.ndo_start_xmit = es58x_start_xmit,</div><div class='del'>-	.ndo_eth_ioctl = can_eth_ioctl_hwts,</div><div class='add'>+	.ndo_hwtstamp_get = can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = can_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops es58x_ethtool_ops = {</div><div class='hunk'>@@ -2059,8 +2060,8 @@ static int es58x_init_priv(struct es58x_device *es58x_dev,</div><div class='ctx'> </div><div class='ctx'> 	can-&gt;bittiming_const = param-&gt;bittiming_const;</div><div class='ctx'> 	if (param-&gt;ctrlmode_supported &amp; CAN_CTRLMODE_FD) {</div><div class='del'>-		can-&gt;data_bittiming_const = param-&gt;data_bittiming_const;</div><div class='del'>-		can-&gt;tdc_const = param-&gt;tdc_const;</div><div class='add'>+		can-&gt;fd.data_bittiming_const = param-&gt;data_bittiming_const;</div><div class='add'>+		can-&gt;fd.tdc_const = param-&gt;tdc_const;</div><div class='ctx'> 	}</div><div class='ctx'> 	can-&gt;bitrate_max = param-&gt;bitrate_max;</div><div class='ctx'> 	can-&gt;clock = param-&gt;clock;</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/es58x_devlink.c b/drivers/net/can/usb/etas_es58x/es58x_devlink.c<br/>index eee20839d96f..0d155eb1b9e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/etas_es58x/es58x_devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/es58x_devlink.c</a></div><div class='hunk'>@@ -248,7 +248,11 @@ static int es58x_devlink_info_get(struct devlink *devlink,</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return devlink_info_serial_number_put(req, es58x_dev-&gt;udev-&gt;serial);</div><div class='add'>+	if (es58x_dev-&gt;udev-&gt;serial)</div><div class='add'>+		ret = devlink_info_serial_number_put(req,</div><div class='add'>+						     es58x_dev-&gt;udev-&gt;serial);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct devlink_ops es58x_dl_ops = {</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/es58x_fd.c b/drivers/net/can/usb/etas_es58x/es58x_fd.c<br/>index 84ffa1839bac..6476add1c105 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_fd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/etas_es58x/es58x_fd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_fd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/es58x_fd.c</a></div><div class='hunk'>@@ -427,12 +427,12 @@ static int es58x_fd_enable_channel(struct es58x_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	if (tx_conf_msg.canfd_enabled) {</div><div class='ctx'> 		es58x_fd_convert_bittiming(&amp;tx_conf_msg.data_bittiming,</div><div class='del'>-					   &amp;priv-&gt;can.data_bittiming);</div><div class='add'>+					   &amp;priv-&gt;can.fd.data_bittiming);</div><div class='ctx'> </div><div class='del'>-		if (can_tdc_is_enabled(&amp;priv-&gt;can)) {</div><div class='add'>+		if (can_fd_tdc_is_enabled(&amp;priv-&gt;can)) {</div><div class='ctx'> 			tx_conf_msg.tdc_enabled = 1;</div><div class='del'>-			tx_conf_msg.tdco = cpu_to_le16(priv-&gt;can.tdc.tdco);</div><div class='del'>-			tx_conf_msg.tdcf = cpu_to_le16(priv-&gt;can.tdc.tdcf);</div><div class='add'>+			tx_conf_msg.tdco = cpu_to_le16(priv-&gt;can.fd.tdc.tdco);</div><div class='add'>+			tx_conf_msg.tdcf = cpu_to_le16(priv-&gt;can.fd.tdc.tdcf);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		conf_len = ES58X_FD_CANFD_CONF_LEN;</div><div class='head'>diff --git a/drivers/net/can/usb/f81604.c b/drivers/net/can/usb/f81604.c<br/>index bc0c8903fe77..efe61ece79ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/f81604.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/f81604.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/f81604.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/f81604.c</a></div><div class='hunk'>@@ -526,7 +526,6 @@ static void f81604_handle_can_bus_errors(struct f81604_port_priv *priv,</div><div class='ctx'> 		netdev_dbg(netdev, "bus error interrupt\n");</div><div class='ctx'> </div><div class='ctx'> 		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='ctx'> </div><div class='ctx'> 		if (skb) {</div><div class='ctx'> 			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='hunk'>@@ -548,10 +547,15 @@ static void f81604_handle_can_bus_errors(struct f81604_port_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 			/* set error location */</div><div class='ctx'> 			cf-&gt;data[3] = data-&gt;ecc &amp; F81604_SJA1000_ECC_SEG;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			/* Error occurred during transmission? */</div><div class='del'>-			if ((data-&gt;ecc &amp; F81604_SJA1000_ECC_DIR) == 0)</div><div class='add'>+		/* Error occurred during transmission? */</div><div class='add'>+		if ((data-&gt;ecc &amp; F81604_SJA1000_ECC_DIR) == 0) {</div><div class='add'>+			stats-&gt;tx_errors++;</div><div class='add'>+			if (skb)</div><div class='ctx'> 				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		} else {</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		set_bit(F81604_CLEAR_ECC, &amp;priv-&gt;clear_flags);</div><div class='hunk'>@@ -1048,7 +1052,6 @@ static const struct net_device_ops f81604_netdev_ops = {</div><div class='ctx'> 	.ndo_open = f81604_open,</div><div class='ctx'> 	.ndo_stop = f81604_close,</div><div class='ctx'> 	.ndo_start_xmit = f81604_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct can_bittiming_const f81604_bittiming_const = {</div><div class='head'>diff --git a/drivers/net/can/usb/gs_usb.c b/drivers/net/can/usb/gs_usb.c<br/>index bc86e9b329fd..e29e85b67fd4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/gs_usb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/gs_usb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/gs_usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/gs_usb.c</a></div><div class='hunk'>@@ -43,8 +43,8 @@</div><div class='ctx'> #define USB_XYLANTA_SAINT3_VENDOR_ID 0x16d0</div><div class='ctx'> #define USB_XYLANTA_SAINT3_PRODUCT_ID 0x0f30</div><div class='ctx'> </div><div class='del'>-#define GS_USB_ENDPOINT_IN 1</div><div class='del'>-#define GS_USB_ENDPOINT_OUT 2</div><div class='add'>+#define USB_CANNECTIVITY_VENDOR_ID 0x1209</div><div class='add'>+#define USB_CANNECTIVITY_PRODUCT_ID 0xca01</div><div class='ctx'> </div><div class='ctx'> /* Timestamp 32 bit timer runs at 1 MHz (1 µs tick). Worker accounts</div><div class='ctx'>  * for timer overflow (will be after ~71 minutes)</div><div class='hunk'>@@ -261,14 +261,21 @@ struct canfd_quirk {</div><div class='ctx'> 	u8 quirk;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+/* struct gs_host_frame::echo_id == GS_HOST_FRAME_ECHO_ID_RX indicates</div><div class='add'>+ * a regular RX'ed CAN frame</div><div class='add'>+ */</div><div class='add'>+#define GS_HOST_FRAME_ECHO_ID_RX 0xffffffff</div><div class='add'>+</div><div class='ctx'> struct gs_host_frame {</div><div class='del'>-	u32 echo_id;</div><div class='del'>-	__le32 can_id;</div><div class='add'>+	struct_group(header,</div><div class='add'>+		u32 echo_id;</div><div class='add'>+		__le32 can_id;</div><div class='ctx'> </div><div class='del'>-	u8 can_dlc;</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 flags;</div><div class='del'>-	u8 reserved;</div><div class='add'>+		u8 can_dlc;</div><div class='add'>+		u8 channel;</div><div class='add'>+		u8 flags;</div><div class='add'>+		u8 reserved;</div><div class='add'>+	);</div><div class='ctx'> </div><div class='ctx'> 	union {</div><div class='ctx'> 		DECLARE_FLEX_ARRAY(struct classic_can, classic_can);</div><div class='hunk'>@@ -289,11 +296,6 @@ struct gs_host_frame {</div><div class='ctx'> #define GS_MAX_RX_URBS 30</div><div class='ctx'> #define GS_NAPI_WEIGHT 32</div><div class='ctx'> </div><div class='del'>-/* Maximum number of interfaces the driver supports per device.</div><div class='del'>- * Current hardware only supports 3 interfaces. The future may vary.</div><div class='del'>- */</div><div class='del'>-#define GS_MAX_INTF 3</div><div class='del'>-</div><div class='ctx'> struct gs_tx_context {</div><div class='ctx'> 	struct gs_can *dev;</div><div class='ctx'> 	unsigned int echo_id;</div><div class='hunk'>@@ -324,7 +326,6 @@ struct gs_can {</div><div class='ctx'> </div><div class='ctx'> /* usb interface struct */</div><div class='ctx'> struct gs_usb {</div><div class='del'>-	struct gs_can *canch[GS_MAX_INTF];</div><div class='ctx'> 	struct usb_anchor rx_submitted;</div><div class='ctx'> 	struct usb_device *udev;</div><div class='ctx'> </div><div class='hunk'>@@ -336,6 +337,11 @@ struct gs_usb {</div><div class='ctx'> </div><div class='ctx'> 	unsigned int hf_size_rx;</div><div class='ctx'> 	u8 active_channels;</div><div class='add'>+	u8 channel_cnt;</div><div class='add'>+</div><div class='add'>+	unsigned int pipe_in;</div><div class='add'>+	unsigned int pipe_out;</div><div class='add'>+	struct gs_can *canch[] __counted_by(channel_cnt);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* 'allocate' a tx context.</div><div class='hunk'>@@ -417,7 +423,7 @@ static inline int gs_usb_get_timestamp(const struct gs_usb *parent,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 gs_usb_timestamp_read(const struct cyclecounter *cc) __must_hold(&amp;dev-&gt;tc_lock)</div><div class='add'>+static u64 gs_usb_timestamp_read(struct cyclecounter *cc) __must_hold(&amp;dev-&gt;tc_lock)</div><div class='ctx'> {</div><div class='ctx'> 	struct gs_usb *parent = container_of(cc, struct gs_usb, cc);</div><div class='ctx'> 	u32 timestamp = 0;</div><div class='hunk'>@@ -569,6 +575,37 @@ gs_usb_get_echo_skb(struct gs_can *dev, struct sk_buff *skb,</div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int</div><div class='add'>+gs_usb_get_minimum_rx_length(const struct gs_can *dev, const struct gs_host_frame *hf,</div><div class='add'>+			     unsigned int *data_length_p)</div><div class='add'>+{</div><div class='add'>+	unsigned int minimum_length, data_length = 0;</div><div class='add'>+</div><div class='add'>+	if (hf-&gt;flags &amp; GS_CAN_FLAG_FD) {</div><div class='add'>+		if (hf-&gt;echo_id == GS_HOST_FRAME_ECHO_ID_RX)</div><div class='add'>+			data_length = can_fd_dlc2len(hf-&gt;can_dlc);</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+			/* timestamp follows data field of max size */</div><div class='add'>+			minimum_length = struct_size(hf, canfd_ts, 1);</div><div class='add'>+		else</div><div class='add'>+			minimum_length = sizeof(hf-&gt;header) + data_length;</div><div class='add'>+	} else {</div><div class='add'>+		if (hf-&gt;echo_id == GS_HOST_FRAME_ECHO_ID_RX &amp;&amp;</div><div class='add'>+		    !(hf-&gt;can_id &amp; cpu_to_le32(CAN_RTR_FLAG)))</div><div class='add'>+			data_length = can_cc_dlc2len(hf-&gt;can_dlc);</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+			/* timestamp follows data field of max size */</div><div class='add'>+			minimum_length = struct_size(hf, classic_can_ts, 1);</div><div class='add'>+		else</div><div class='add'>+			minimum_length = sizeof(hf-&gt;header) + data_length;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*data_length_p = data_length;</div><div class='add'>+	return minimum_length;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void gs_usb_receive_bulk_callback(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct gs_usb *parent = urb-&gt;context;</div><div class='hunk'>@@ -577,6 +614,7 @@ static void gs_usb_receive_bulk_callback(struct urb *urb)</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	struct net_device_stats *stats;</div><div class='ctx'> 	struct gs_host_frame *hf = urb-&gt;transfer_buffer;</div><div class='add'>+	unsigned int minimum_length, data_length;</div><div class='ctx'> 	struct gs_tx_context *txc;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='ctx'> 	struct canfd_frame *cfd;</div><div class='hunk'>@@ -595,8 +633,17 @@ static void gs_usb_receive_bulk_callback(struct urb *urb)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	minimum_length = sizeof(hf-&gt;header);</div><div class='add'>+	if (urb-&gt;actual_length &lt; minimum_length) {</div><div class='add'>+		dev_err_ratelimited(&amp;parent-&gt;udev-&gt;dev,</div><div class='add'>+				    "short read (actual_length=%u, minimum_length=%u)\n",</div><div class='add'>+				    urb-&gt;actual_length, minimum_length);</div><div class='add'>+</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* device reports out of range channel id */</div><div class='del'>-	if (hf-&gt;channel &gt;= GS_MAX_INTF)</div><div class='add'>+	if (hf-&gt;channel &gt;= parent-&gt;channel_cnt)</div><div class='ctx'> 		goto device_detach;</div><div class='ctx'> </div><div class='ctx'> 	dev = parent-&gt;canch[hf-&gt;channel];</div><div class='hunk'>@@ -610,20 +657,33 @@ static void gs_usb_receive_bulk_callback(struct urb *urb)</div><div class='ctx'> 	if (!netif_running(netdev))</div><div class='ctx'> 		goto resubmit_urb;</div><div class='ctx'> </div><div class='del'>-	if (hf-&gt;echo_id == -1) { /* normal rx */</div><div class='add'>+	minimum_length = gs_usb_get_minimum_rx_length(dev, hf, &amp;data_length);</div><div class='add'>+	if (urb-&gt;actual_length &lt; minimum_length) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		stats-&gt;rx_length_errors++;</div><div class='add'>+</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "short read (actual_length=%u, minimum_length=%u)\n",</div><div class='add'>+				   urb-&gt;actual_length, minimum_length);</div><div class='add'>+</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hf-&gt;echo_id == GS_HOST_FRAME_ECHO_ID_RX) { /* normal rx */</div><div class='ctx'> 		if (hf-&gt;flags &amp; GS_CAN_FLAG_FD) {</div><div class='ctx'> 			skb = alloc_canfd_skb(netdev, &amp;cfd);</div><div class='ctx'> 			if (!skb)</div><div class='ctx'> 				return;</div><div class='ctx'> </div><div class='ctx'> 			cfd-&gt;can_id = le32_to_cpu(hf-&gt;can_id);</div><div class='del'>-			cfd-&gt;len = can_fd_dlc2len(hf-&gt;can_dlc);</div><div class='add'>+			cfd-&gt;len = data_length;</div><div class='ctx'> 			if (hf-&gt;flags &amp; GS_CAN_FLAG_BRS)</div><div class='ctx'> 				cfd-&gt;flags |= CANFD_BRS;</div><div class='ctx'> 			if (hf-&gt;flags &amp; GS_CAN_FLAG_ESI)</div><div class='ctx'> 				cfd-&gt;flags |= CANFD_ESI;</div><div class='ctx'> </div><div class='del'>-			memcpy(cfd-&gt;data, hf-&gt;canfd-&gt;data, cfd-&gt;len);</div><div class='add'>+			memcpy(cfd-&gt;data, hf-&gt;canfd-&gt;data, data_length);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			skb = alloc_can_skb(netdev, &amp;cf);</div><div class='ctx'> 			if (!skb)</div><div class='hunk'>@@ -632,7 +692,7 @@ static void gs_usb_receive_bulk_callback(struct urb *urb)</div><div class='ctx'> 			cf-&gt;can_id = le32_to_cpu(hf-&gt;can_id);</div><div class='ctx'> 			can_frame_set_cc_len(cf, hf-&gt;can_dlc, dev-&gt;can.ctrlmode);</div><div class='ctx'> </div><div class='del'>-			memcpy(cf-&gt;data, hf-&gt;classic_can-&gt;data, 8);</div><div class='add'>+			memcpy(cf-&gt;data, hf-&gt;classic_can-&gt;data, data_length);</div><div class='ctx'> </div><div class='ctx'> 			/* ERROR frames tell us information about the controller */</div><div class='ctx'> 			if (le32_to_cpu(hf-&gt;can_id) &amp; CAN_ERR_FLAG)</div><div class='hunk'>@@ -687,8 +747,8 @@ static void gs_usb_receive_bulk_callback(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> resubmit_urb:</div><div class='ctx'> 	usb_fill_bulk_urb(urb, parent-&gt;udev,</div><div class='del'>-			  usb_rcvbulkpipe(parent-&gt;udev, GS_USB_ENDPOINT_IN),</div><div class='del'>-			  hf, dev-&gt;parent-&gt;hf_size_rx,</div><div class='add'>+			  parent-&gt;pipe_in,</div><div class='add'>+			  hf, parent-&gt;hf_size_rx,</div><div class='ctx'> 			  gs_usb_receive_bulk_callback, parent);</div><div class='ctx'> </div><div class='ctx'> 	rc = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='hunk'>@@ -696,7 +756,7 @@ resubmit_urb:</div><div class='ctx'> 	/* USB failure take down all interfaces */</div><div class='ctx'> 	if (rc == -ENODEV) {</div><div class='ctx'> device_detach:</div><div class='del'>-		for (rc = 0; rc &lt; GS_MAX_INTF; rc++) {</div><div class='add'>+		for (rc = 0; rc &lt; parent-&gt;channel_cnt; rc++) {</div><div class='ctx'> 			if (parent-&gt;canch[rc])</div><div class='ctx'> 				netif_device_detach(parent-&gt;canch[rc]-&gt;netdev);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -725,7 +785,7 @@ static int gs_usb_set_bittiming(struct net_device *netdev)</div><div class='ctx'> static int gs_usb_set_data_bittiming(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gs_can *dev = netdev_priv(netdev);</div><div class='del'>-	struct can_bittiming *bt = &amp;dev-&gt;can.data_bittiming;</div><div class='add'>+	struct can_bittiming *bt = &amp;dev-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	struct gs_device_bittiming dbt = {</div><div class='ctx'> 		.prop_seg = cpu_to_le32(bt-&gt;prop_seg),</div><div class='ctx'> 		.phase_seg1 = cpu_to_le32(bt-&gt;phase_seg1),</div><div class='hunk'>@@ -751,8 +811,21 @@ static void gs_usb_xmit_callback(struct urb *urb)</div><div class='ctx'> 	struct gs_can *dev = txc-&gt;dev;</div><div class='ctx'> 	struct net_device *netdev = dev-&gt;netdev;</div><div class='ctx'> </div><div class='del'>-	if (urb-&gt;status)</div><div class='del'>-		netdev_info(netdev, "usb xmit fail %u\n", txc-&gt;echo_id);</div><div class='add'>+	if (!urb-&gt;status)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;status != -ESHUTDOWN &amp;&amp; net_ratelimit())</div><div class='add'>+		netdev_info(netdev, "failed to xmit URB %u: %pe\n",</div><div class='add'>+			    txc-&gt;echo_id, ERR_PTR(urb-&gt;status));</div><div class='add'>+</div><div class='add'>+	netdev-&gt;stats.tx_dropped++;</div><div class='add'>+	netdev-&gt;stats.tx_errors++;</div><div class='add'>+</div><div class='add'>+	can_free_echo_skb(netdev, txc-&gt;echo_id, NULL);</div><div class='add'>+	gs_free_tx_context(txc);</div><div class='add'>+	atomic_dec(&amp;dev-&gt;active_tx_urbs);</div><div class='add'>+</div><div class='add'>+	netif_wake_queue(netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t gs_can_start_xmit(struct sk_buff *skb,</div><div class='hunk'>@@ -819,7 +892,7 @@ static netdev_tx_t gs_can_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='del'>-			  usb_sndbulkpipe(dev-&gt;udev, GS_USB_ENDPOINT_OUT),</div><div class='add'>+			  dev-&gt;parent-&gt;pipe_out,</div><div class='ctx'> 			  hf, dev-&gt;hf_size_tx,</div><div class='ctx'> 			  gs_usb_xmit_callback, txc);</div><div class='ctx'> </div><div class='hunk'>@@ -925,8 +998,7 @@ static int gs_can_open(struct net_device *netdev)</div><div class='ctx'> 			/* fill, anchor, and submit rx urb */</div><div class='ctx'> 			usb_fill_bulk_urb(urb,</div><div class='ctx'> 					  dev-&gt;udev,</div><div class='del'>-					  usb_rcvbulkpipe(dev-&gt;udev,</div><div class='del'>-							  GS_USB_ENDPOINT_IN),</div><div class='add'>+					  dev-&gt;parent-&gt;pipe_in,</div><div class='ctx'> 					  buf,</div><div class='ctx'> 					  dev-&gt;parent-&gt;hf_size_rx,</div><div class='ctx'> 					  gs_usb_receive_bulk_callback, parent);</div><div class='hunk'>@@ -1089,12 +1161,25 @@ static int gs_can_close(struct net_device *netdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gs_can_eth_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='add'>+static int gs_can_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	const struct gs_can *dev = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='del'>-		return can_eth_ioctl_hwts(netdev, ifr, cmd);</div><div class='add'>+		return can_hwtstamp_get(netdev, cfg);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gs_can_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *cfg,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	const struct gs_can *dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+		return can_hwtstamp_set(netdev, cfg, extack);</div><div class='ctx'> </div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='hunk'>@@ -1103,8 +1188,8 @@ static const struct net_device_ops gs_usb_netdev_ops = {</div><div class='ctx'> 	.ndo_open = gs_can_open,</div><div class='ctx'> 	.ndo_stop = gs_can_close,</div><div class='ctx'> 	.ndo_start_xmit = gs_can_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='del'>-	.ndo_eth_ioctl = gs_can_eth_ioctl,</div><div class='add'>+	.ndo_hwtstamp_get = gs_can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = gs_can_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int gs_usb_set_identify(struct net_device *netdev, bool do_identify)</div><div class='hunk'>@@ -1247,6 +1332,7 @@ static struct gs_can *gs_make_candev(unsigned int channel,</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;flags |= IFF_ECHO; /* we support full roundtrip echo */</div><div class='ctx'> 	netdev-&gt;dev_id = channel;</div><div class='add'>+	netdev-&gt;dev_port = channel;</div><div class='ctx'> </div><div class='ctx'> 	/* dev setup */</div><div class='ctx'> 	strcpy(dev-&gt;bt_const.name, KBUILD_MODNAME);</div><div class='hunk'>@@ -1298,8 +1384,8 @@ static struct gs_can *gs_make_candev(unsigned int channel,</div><div class='ctx'> 		/* The data bit timing will be overwritten, if</div><div class='ctx'> 		 * GS_CAN_FEATURE_BT_CONST_EXT is set.</div><div class='ctx'> 		 */</div><div class='del'>-		dev-&gt;can.data_bittiming_const = &amp;dev-&gt;bt_const;</div><div class='del'>-		dev-&gt;can.do_set_data_bittiming = gs_usb_set_data_bittiming;</div><div class='add'>+		dev-&gt;can.fd.data_bittiming_const = &amp;dev-&gt;bt_const;</div><div class='add'>+		dev-&gt;can.fd.do_set_data_bittiming = gs_usb_set_data_bittiming;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (feature &amp; GS_CAN_FEATURE_TERMINATION) {</div><div class='hunk'>@@ -1379,7 +1465,7 @@ static struct gs_can *gs_make_candev(unsigned int channel,</div><div class='ctx'> 		dev-&gt;data_bt_const.brp_max = le32_to_cpu(bt_const_extended.dbrp_max);</div><div class='ctx'> 		dev-&gt;data_bt_const.brp_inc = le32_to_cpu(bt_const_extended.dbrp_inc);</div><div class='ctx'> </div><div class='del'>-		dev-&gt;can.data_bittiming_const = &amp;dev-&gt;data_bt_const;</div><div class='add'>+		dev-&gt;can.fd.data_bittiming_const = &amp;dev-&gt;data_bt_const;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	can_rx_offload_add_manual(netdev, &amp;dev-&gt;offload, GS_NAPI_WEIGHT);</div><div class='hunk'>@@ -1413,6 +1499,7 @@ static int gs_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 			const struct usb_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct usb_device *udev = interface_to_usbdev(intf);</div><div class='add'>+	struct usb_endpoint_descriptor *ep_in, *ep_out;</div><div class='ctx'> 	struct gs_host_frame *hf;</div><div class='ctx'> 	struct gs_usb *parent;</div><div class='ctx'> 	struct gs_host_config hconf = {</div><div class='hunk'>@@ -1422,6 +1509,13 @@ static int gs_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 	unsigned int icount, i;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	rc = usb_find_common_endpoints(intf-&gt;cur_altsetting,</div><div class='add'>+				       &amp;ep_in, &amp;ep_out, NULL, NULL);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Required endpoints not found\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* send host config */</div><div class='ctx'> 	rc = usb_control_msg_send(udev, 0,</div><div class='ctx'> 				  GS_USB_BREQ_HOST_FORMAT,</div><div class='hunk'>@@ -1450,22 +1544,28 @@ static int gs_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 	icount = dconf.icount + 1;</div><div class='ctx'> 	dev_info(&amp;intf-&gt;dev, "Configuring for %u interfaces\n", icount);</div><div class='ctx'> </div><div class='del'>-	if (icount &gt; GS_MAX_INTF) {</div><div class='add'>+	if (icount &gt; type_max(parent-&gt;channel_cnt)) {</div><div class='ctx'> 		dev_err(&amp;intf-&gt;dev,</div><div class='ctx'> 			"Driver cannot handle more that %u CAN interfaces\n",</div><div class='del'>-			GS_MAX_INTF);</div><div class='add'>+			type_max(parent-&gt;channel_cnt));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	parent = kzalloc(sizeof(*parent), GFP_KERNEL);</div><div class='add'>+	parent = kzalloc(struct_size(parent, canch, icount), GFP_KERNEL);</div><div class='ctx'> 	if (!parent)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	parent-&gt;channel_cnt = icount;</div><div class='add'>+</div><div class='ctx'> 	init_usb_anchor(&amp;parent-&gt;rx_submitted);</div><div class='ctx'> </div><div class='ctx'> 	usb_set_intfdata(intf, parent);</div><div class='ctx'> 	parent-&gt;udev = udev;</div><div class='ctx'> </div><div class='add'>+	/* store the detected endpoints */</div><div class='add'>+	parent-&gt;pipe_in = usb_rcvbulkpipe(parent-&gt;udev, ep_in-&gt;bEndpointAddress);</div><div class='add'>+	parent-&gt;pipe_out = usb_sndbulkpipe(parent-&gt;udev, ep_out-&gt;bEndpointAddress);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; icount; i++) {</div><div class='ctx'> 		unsigned int hf_size_rx = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1517,7 +1617,7 @@ static void gs_usb_disconnect(struct usb_interface *intf)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; GS_MAX_INTF; i++)</div><div class='add'>+	for (i = 0; i &lt; parent-&gt;channel_cnt; i++)</div><div class='ctx'> 		if (parent-&gt;canch[i])</div><div class='ctx'> 			gs_destroy_candev(parent-&gt;canch[i]);</div><div class='ctx'> </div><div class='hunk'>@@ -1535,6 +1635,8 @@ static const struct usb_device_id gs_usb_table[] = {</div><div class='ctx'> 				      USB_ABE_CANDEBUGGER_FD_PRODUCT_ID, 0) },</div><div class='ctx'> 	{ USB_DEVICE_INTERFACE_NUMBER(USB_XYLANTA_SAINT3_VENDOR_ID,</div><div class='ctx'> 				      USB_XYLANTA_SAINT3_PRODUCT_ID, 0) },</div><div class='add'>+	{ USB_DEVICE_INTERFACE_NUMBER(USB_CANNECTIVITY_VENDOR_ID,</div><div class='add'>+				      USB_CANNECTIVITY_PRODUCT_ID, 0) },</div><div class='ctx'> 	{} /* Terminating entry */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/Makefile b/drivers/net/can/usb/kvaser_usb/Makefile<br/>index cf260044f0b9..41b4a11555aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/Makefile</a></div><div class='hunk'>@@ -1,3 +1,3 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> obj-$(CONFIG_CAN_KVASER_USB) += kvaser_usb.o</div><div class='del'>-kvaser_usb-y = kvaser_usb_core.o kvaser_usb_leaf.o kvaser_usb_hydra.o</div><div class='add'>+kvaser_usb-y = kvaser_usb_core.o kvaser_usb_devlink.o kvaser_usb_leaf.o kvaser_usb_hydra.o</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/kvaser_usb.h b/drivers/net/can/usb/kvaser_usb/kvaser_usb.h<br/>index 078496d9b7ba..46a1b6907a50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/kvaser_usb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/kvaser_usb.h</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='hunk'>@@ -47,6 +48,10 @@</div><div class='ctx'> #define KVASER_USB_CAP_EXT_CAP			0x02</div><div class='ctx'> #define KVASER_USB_HYDRA_CAP_EXT_CMD		0x04</div><div class='ctx'> </div><div class='add'>+#define KVASER_USB_SW_VERSION_MAJOR_MASK GENMASK(31, 24)</div><div class='add'>+#define KVASER_USB_SW_VERSION_MINOR_MASK GENMASK(23, 16)</div><div class='add'>+#define KVASER_USB_SW_VERSION_BUILD_MASK GENMASK(15, 0)</div><div class='add'>+</div><div class='ctx'> struct kvaser_usb_dev_cfg;</div><div class='ctx'> </div><div class='ctx'> enum kvaser_usb_leaf_family {</div><div class='hunk'>@@ -54,6 +59,11 @@ enum kvaser_usb_leaf_family {</div><div class='ctx'> 	KVASER_USBCAN,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum kvaser_usb_led_state {</div><div class='add'>+	KVASER_USB_LED_ON = 0,</div><div class='add'>+	KVASER_USB_LED_OFF = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define KVASER_USB_HYDRA_MAX_CMD_LEN		128</div><div class='ctx'> struct kvaser_usb_dev_card_data_hydra {</div><div class='ctx'> 	u8 channel_to_he[KVASER_USB_MAX_NET_DEVICES];</div><div class='hunk'>@@ -78,6 +88,12 @@ struct kvaser_usb_tx_urb_context {</div><div class='ctx'> 	u32 echo_index;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct kvaser_usb_fw_version {</div><div class='add'>+	u8 major;</div><div class='add'>+	u8 minor;</div><div class='add'>+	u16 build;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct kvaser_usb_busparams {</div><div class='ctx'> 	__le32 bitrate;</div><div class='ctx'> 	u8 tseg1;</div><div class='hunk'>@@ -96,12 +112,15 @@ struct kvaser_usb {</div><div class='ctx'> 	struct usb_endpoint_descriptor *bulk_in, *bulk_out;</div><div class='ctx'> 	struct usb_anchor rx_submitted;</div><div class='ctx'> </div><div class='add'>+	u32 ean[2];</div><div class='add'>+	u32 serial_number;</div><div class='add'>+	struct kvaser_usb_fw_version fw_version;</div><div class='add'>+	u8 hw_revision;</div><div class='add'>+	unsigned int nchannels;</div><div class='ctx'> 	/* @max_tx_urbs: Firmware-reported maximum number of outstanding,</div><div class='ctx'> 	 * not yet ACKed, transmissions on this device. This value is</div><div class='ctx'> 	 * also used as a sentinel for marking free tx contexts.</div><div class='ctx'> 	 */</div><div class='del'>-	u32 fw_version;</div><div class='del'>-	unsigned int nchannels;</div><div class='ctx'> 	unsigned int max_tx_urbs;</div><div class='ctx'> 	struct kvaser_usb_dev_card_data card_data;</div><div class='ctx'> </div><div class='hunk'>@@ -112,6 +131,7 @@ struct kvaser_usb {</div><div class='ctx'> </div><div class='ctx'> struct kvaser_usb_net_priv {</div><div class='ctx'> 	struct can_priv can;</div><div class='add'>+	struct devlink_port devlink_port;</div><div class='ctx'> 	struct can_berr_counter bec;</div><div class='ctx'> </div><div class='ctx'> 	/* subdriver-specific data */</div><div class='hunk'>@@ -137,7 +157,7 @@ struct kvaser_usb_net_priv {</div><div class='ctx'>  * @dev_set_mode:		used for can.do_set_mode</div><div class='ctx'>  * @dev_set_bittiming:		used for can.do_set_bittiming</div><div class='ctx'>  * @dev_get_busparams:		readback arbitration busparams</div><div class='del'>- * @dev_set_data_bittiming:	used for can.do_set_data_bittiming</div><div class='add'>+ * @dev_set_data_bittiming:	used for can.fd.do_set_data_bittiming</div><div class='ctx'>  * @dev_get_data_busparams:	readback data busparams</div><div class='ctx'>  * @dev_get_berr_counter:	used for can.do_get_berr_counter</div><div class='ctx'>  *</div><div class='hunk'>@@ -149,6 +169,7 @@ struct kvaser_usb_net_priv {</div><div class='ctx'>  * @dev_get_software_details:	get software details</div><div class='ctx'>  * @dev_get_card_info:		get card info</div><div class='ctx'>  * @dev_get_capabilities:	discover device capabilities</div><div class='add'>+ * @dev_set_led:		turn on/off device LED</div><div class='ctx'>  *</div><div class='ctx'>  * @dev_set_opt_mode:		set ctrlmod</div><div class='ctx'>  * @dev_start_chip:		start the CAN controller</div><div class='hunk'>@@ -176,6 +197,9 @@ struct kvaser_usb_dev_ops {</div><div class='ctx'> 	int (*dev_get_software_details)(struct kvaser_usb *dev);</div><div class='ctx'> 	int (*dev_get_card_info)(struct kvaser_usb *dev);</div><div class='ctx'> 	int (*dev_get_capabilities)(struct kvaser_usb *dev);</div><div class='add'>+	int (*dev_set_led)(struct kvaser_usb_net_priv *priv,</div><div class='add'>+			   enum kvaser_usb_led_state state,</div><div class='add'>+			   u16 duration_ms);</div><div class='ctx'> 	int (*dev_set_opt_mode)(const struct kvaser_usb_net_priv *priv);</div><div class='ctx'> 	int (*dev_start_chip)(struct kvaser_usb_net_priv *priv);</div><div class='ctx'> 	int (*dev_stop_chip)(struct kvaser_usb_net_priv *priv);</div><div class='hunk'>@@ -204,6 +228,11 @@ struct kvaser_usb_dev_cfg {</div><div class='ctx'> extern const struct kvaser_usb_dev_ops kvaser_usb_hydra_dev_ops;</div><div class='ctx'> extern const struct kvaser_usb_dev_ops kvaser_usb_leaf_dev_ops;</div><div class='ctx'> </div><div class='add'>+extern const struct devlink_ops kvaser_usb_devlink_ops;</div><div class='add'>+</div><div class='add'>+int kvaser_usb_devlink_port_register(struct kvaser_usb_net_priv *priv);</div><div class='add'>+void kvaser_usb_devlink_port_unregister(struct kvaser_usb_net_priv *priv);</div><div class='add'>+</div><div class='ctx'> void kvaser_usb_unlink_tx_urbs(struct kvaser_usb_net_priv *priv);</div><div class='ctx'> </div><div class='ctx'> int kvaser_usb_recv_cmd(const struct kvaser_usb *dev, void *cmd, int len,</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c b/drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c<br/>index 7d12776ab63e..62701ec34272 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c</a></div><div class='hunk'>@@ -364,10 +364,13 @@ resubmit_urb:</div><div class='ctx'> 	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (err == -ENODEV) {</div><div class='ctx'> 		for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='del'>-			if (!dev-&gt;nets[i])</div><div class='add'>+			struct kvaser_usb_net_priv *priv;</div><div class='add'>+</div><div class='add'>+			priv = dev-&gt;nets[i];</div><div class='add'>+			if (!priv)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			netif_device_detach(dev-&gt;nets[i]-&gt;netdev);</div><div class='add'>+			netif_device_detach(priv-&gt;netdev);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (err) {</div><div class='ctx'> 		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='hunk'>@@ -592,7 +595,7 @@ static int kvaser_usb_set_data_bittiming(struct net_device *netdev)</div><div class='ctx'> 	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='ctx'> 	const struct kvaser_usb_dev_ops *ops = dev-&gt;driver_info-&gt;ops;</div><div class='del'>-	struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	struct kvaser_usb_busparams busparams;</div><div class='ctx'> 	int tseg1 = dbt-&gt;prop_seg + dbt-&gt;phase_seg1;</div><div class='ctx'> 	int tseg2 = dbt-&gt;phase_seg2;</div><div class='hunk'>@@ -753,40 +756,70 @@ freeurb:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvaser_usb_set_phys_id(struct net_device *netdev,</div><div class='add'>+				  enum ethtool_phys_id_state state)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops = priv-&gt;dev-&gt;driver_info-&gt;ops;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ETHTOOL_ID_ACTIVE:</div><div class='add'>+		return 3; /* 3 On/Off cycles per second */</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_ON:</div><div class='add'>+		return ops-&gt;dev_set_led(priv, KVASER_USB_LED_ON, 1000);</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_OFF:</div><div class='add'>+		return ops-&gt;dev_set_led(priv, KVASER_USB_LED_OFF, 1000);</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_INACTIVE:</div><div class='add'>+		/* Turn LED off and restore standard function after 1ms */</div><div class='add'>+		return ops-&gt;dev_set_led(priv, KVASER_USB_LED_OFF, 1);</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops kvaser_usb_netdev_ops = {</div><div class='ctx'> 	.ndo_open = kvaser_usb_open,</div><div class='ctx'> 	.ndo_stop = kvaser_usb_close,</div><div class='del'>-	.ndo_eth_ioctl = can_eth_ioctl_hwts,</div><div class='ctx'> 	.ndo_start_xmit = kvaser_usb_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+	.ndo_hwtstamp_get = can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = can_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops kvaser_usb_ethtool_ops = {</div><div class='ctx'> 	.get_ts_info = can_ethtool_op_get_ts_info_hwts,</div><div class='add'>+	.set_phys_id = kvaser_usb_set_phys_id,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void kvaser_usb_remove_interfaces(struct kvaser_usb *dev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct kvaser_usb_dev_ops *ops = dev-&gt;driver_info-&gt;ops;</div><div class='ctx'> 	int i;</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='del'>-		if (!dev-&gt;nets[i])</div><div class='add'>+		priv = dev-&gt;nets[i];</div><div class='add'>+		if (!priv)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		unregister_candev(dev-&gt;nets[i]-&gt;netdev);</div><div class='add'>+		unregister_candev(priv-&gt;netdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kvaser_usb_unlink_all_urbs(dev);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='del'>-		if (!dev-&gt;nets[i])</div><div class='add'>+		priv = dev-&gt;nets[i];</div><div class='add'>+		if (!priv)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (ops-&gt;dev_remove_channel)</div><div class='del'>-			ops-&gt;dev_remove_channel(dev-&gt;nets[i]);</div><div class='add'>+			ops-&gt;dev_remove_channel(priv);</div><div class='ctx'> </div><div class='del'>-		free_candev(dev-&gt;nets[i]-&gt;netdev);</div><div class='add'>+		kvaser_usb_devlink_port_unregister(priv);</div><div class='add'>+		free_candev(priv-&gt;netdev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -818,7 +851,8 @@ static int kvaser_usb_init_one(struct kvaser_usb *dev, int channel)</div><div class='ctx'> 	init_completion(&amp;priv-&gt;stop_comp);</div><div class='ctx'> 	init_completion(&amp;priv-&gt;flush_comp);</div><div class='ctx'> 	init_completion(&amp;priv-&gt;get_busparams_comp);</div><div class='del'>-	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_CC_LEN8_DLC;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_CC_LEN8_DLC |</div><div class='add'>+				       CAN_CTRLMODE_BERR_REPORTING;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;dev = dev;</div><div class='ctx'> 	priv-&gt;netdev = netdev;</div><div class='hunk'>@@ -841,8 +875,8 @@ static int kvaser_usb_init_one(struct kvaser_usb *dev, int channel)</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported |= dev-&gt;card_data.ctrlmode_supported;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;can.ctrlmode_supported &amp; CAN_CTRLMODE_FD) {</div><div class='del'>-		priv-&gt;can.data_bittiming_const = dev-&gt;cfg-&gt;data_bittiming_const;</div><div class='del'>-		priv-&gt;can.do_set_data_bittiming = kvaser_usb_set_data_bittiming;</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const = dev-&gt;cfg-&gt;data_bittiming_const;</div><div class='add'>+		priv-&gt;can.fd.do_set_data_bittiming = kvaser_usb_set_data_bittiming;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;flags |= IFF_ECHO;</div><div class='hunk'>@@ -851,26 +885,35 @@ static int kvaser_usb_init_one(struct kvaser_usb *dev, int channel)</div><div class='ctx'> 	netdev-&gt;ethtool_ops = &amp;kvaser_usb_ethtool_ops;</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;dev-&gt;intf-&gt;dev);</div><div class='ctx'> 	netdev-&gt;dev_id = channel;</div><div class='add'>+	netdev-&gt;dev_port = channel;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;nets[channel] = priv;</div><div class='ctx'> </div><div class='ctx'> 	if (ops-&gt;dev_init_channel) {</div><div class='ctx'> 		err = ops-&gt;dev_init_channel(priv);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto err;</div><div class='add'>+			goto candev_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_devlink_port_register(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "Failed to register devlink port\n");</div><div class='add'>+		goto candev_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = register_candev(netdev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;dev-&gt;intf-&gt;dev, "Failed to register CAN device\n");</div><div class='del'>-		goto err;</div><div class='add'>+		goto unregister_devlink_port;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(netdev, "device registered\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err:</div><div class='add'>+unregister_devlink_port:</div><div class='add'>+	kvaser_usb_devlink_port_unregister(priv);</div><div class='add'>+candev_free:</div><div class='ctx'> 	free_candev(netdev);</div><div class='ctx'> 	dev-&gt;nets[channel] = NULL;</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -880,6 +923,7 @@ static int kvaser_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 			    const struct usb_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvaser_usb *dev;</div><div class='add'>+	struct devlink *devlink;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	const struct kvaser_usb_driver_info *driver_info;</div><div class='hunk'>@@ -889,17 +933,20 @@ static int kvaser_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 	if (!driver_info)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	dev = devm_kzalloc(&amp;intf-&gt;dev, sizeof(*dev), GFP_KERNEL);</div><div class='del'>-	if (!dev)</div><div class='add'>+	devlink = devlink_alloc(&amp;kvaser_usb_devlink_ops, sizeof(*dev), &amp;intf-&gt;dev);</div><div class='add'>+	if (!devlink)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	dev = devlink_priv(devlink);</div><div class='ctx'> 	dev-&gt;intf = intf;</div><div class='ctx'> 	dev-&gt;driver_info = driver_info;</div><div class='ctx'> 	ops = driver_info-&gt;ops;</div><div class='ctx'> </div><div class='ctx'> 	err = ops-&gt;dev_setup_endpoints(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		return dev_err_probe(&amp;intf-&gt;dev, err, "Cannot get usb endpoint(s)");</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;intf-&gt;dev, err, "Cannot get usb endpoint(s)");</div><div class='add'>+		goto free_devlink;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;udev = interface_to_usbdev(intf);</div><div class='ctx'> </div><div class='hunk'>@@ -910,55 +957,66 @@ static int kvaser_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 	dev-&gt;card_data.ctrlmode_supported = 0;</div><div class='ctx'> 	dev-&gt;card_data.capabilities = 0;</div><div class='ctx'> 	err = ops-&gt;dev_init_card(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		return dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='del'>-				     "Failed to initialize card\n");</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='add'>+			      "Failed to initialize card\n");</div><div class='add'>+		goto free_devlink;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = ops-&gt;dev_get_software_info(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		return dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='del'>-				     "Cannot get software info\n");</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='add'>+			      "Cannot get software info\n");</div><div class='add'>+		goto free_devlink;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (ops-&gt;dev_get_software_details) {</div><div class='ctx'> 		err = ops-&gt;dev_get_software_details(dev);</div><div class='del'>-		if (err)</div><div class='del'>-			return dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='del'>-					     "Cannot get software details\n");</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='add'>+				      "Cannot get software details\n");</div><div class='add'>+			goto free_devlink;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(!dev-&gt;cfg))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;intf-&gt;dev, "Firmware version: %d.%d.%d\n",</div><div class='del'>-		((dev-&gt;fw_version &gt;&gt; 24) &amp; 0xff),</div><div class='del'>-		((dev-&gt;fw_version &gt;&gt; 16) &amp; 0xff),</div><div class='del'>-		(dev-&gt;fw_version &amp; 0xffff));</div><div class='add'>+	if (WARN_ON(!dev-&gt;cfg)) {</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto free_devlink;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;intf-&gt;dev, "Max outstanding tx = %d URBs\n", dev-&gt;max_tx_urbs);</div><div class='ctx'> </div><div class='ctx'> 	err = ops-&gt;dev_get_card_info(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		return dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='del'>-				     "Cannot get card info\n");</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='add'>+			      "Cannot get card info\n");</div><div class='add'>+		goto free_devlink;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (ops-&gt;dev_get_capabilities) {</div><div class='ctx'> 		err = ops-&gt;dev_get_capabilities(dev);</div><div class='ctx'> 		if (err) {</div><div class='del'>-			kvaser_usb_remove_interfaces(dev);</div><div class='del'>-			return dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='del'>-					     "Cannot get capabilities\n");</div><div class='add'>+			dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='add'>+				      "Cannot get capabilities\n");</div><div class='add'>+			goto remove_interfaces;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='ctx'> 		err = kvaser_usb_init_one(dev, i);</div><div class='del'>-		if (err) {</div><div class='del'>-			kvaser_usb_remove_interfaces(dev);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='add'>+		if (err)</div><div class='add'>+			goto remove_interfaces;</div><div class='ctx'> 	}</div><div class='add'>+	devlink_register(devlink);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+remove_interfaces:</div><div class='add'>+	kvaser_usb_remove_interfaces(dev);</div><div class='add'>+free_devlink:</div><div class='add'>+	devlink_free(devlink);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvaser_usb_disconnect(struct usb_interface *intf)</div><div class='hunk'>@@ -971,6 +1029,8 @@ static void kvaser_usb_disconnect(struct usb_interface *intf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	kvaser_usb_remove_interfaces(dev);</div><div class='add'>+	devlink_unregister(priv_to_devlink(dev));</div><div class='add'>+	devlink_free(priv_to_devlink(dev));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct usb_driver kvaser_usb_driver = {</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c b/drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c<br/>new file mode 100644<br/>index 000000000000..e838b82298ae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* kvaser_usb devlink functions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#include "kvaser_usb.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_EAN_MSB 0x00073301</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_devlink_info_get(struct devlink *devlink,</div><div class='add'>+				       struct devlink_info_req *req,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = devlink_priv(devlink);</div><div class='add'>+	char buf[] = "73301XXXXXXXXXX";</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;serial_number) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%u", dev-&gt;serial_number);</div><div class='add'>+		ret = devlink_info_serial_number_put(req, buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;fw_version.major) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%u.%u.%u",</div><div class='add'>+			 dev-&gt;fw_version.major,</div><div class='add'>+			 dev-&gt;fw_version.minor,</div><div class='add'>+			 dev-&gt;fw_version.build);</div><div class='add'>+		ret = devlink_info_version_running_put(req,</div><div class='add'>+						       DEVLINK_INFO_VERSION_GENERIC_FW,</div><div class='add'>+						       buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;hw_revision) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%u", dev-&gt;hw_revision);</div><div class='add'>+		ret = devlink_info_version_fixed_put(req,</div><div class='add'>+						     DEVLINK_INFO_VERSION_GENERIC_BOARD_REV,</div><div class='add'>+						     buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;ean[1] == KVASER_USB_EAN_MSB) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%x%08x", dev-&gt;ean[1], dev-&gt;ean[0]);</div><div class='add'>+		ret = devlink_info_version_fixed_put(req,</div><div class='add'>+						     DEVLINK_INFO_VERSION_GENERIC_BOARD_ID,</div><div class='add'>+						     buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct devlink_ops kvaser_usb_devlink_ops = {</div><div class='add'>+	.info_get = kvaser_usb_devlink_info_get,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int kvaser_usb_devlink_port_register(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct devlink_port_attrs attrs = {</div><div class='add'>+		.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL,</div><div class='add'>+		.phys.port_number = priv-&gt;channel,</div><div class='add'>+	};</div><div class='add'>+	devlink_port_attrs_set(&amp;priv-&gt;devlink_port, &amp;attrs);</div><div class='add'>+</div><div class='add'>+	ret = devlink_port_register(priv_to_devlink(priv-&gt;dev),</div><div class='add'>+				    &amp;priv-&gt;devlink_port, priv-&gt;channel);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEVLINK_PORT(priv-&gt;netdev, &amp;priv-&gt;devlink_port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvaser_usb_devlink_port_unregister(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	devlink_port_unregister(&amp;priv-&gt;devlink_port);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c b/drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c<br/>index 3764b263add3..a59f20dad692 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'>  *    distinguish between ERROR_WARNING and ERROR_ACTIVE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/completion.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='hunk'>@@ -67,6 +68,8 @@ static const struct kvaser_usb_dev_cfg kvaser_usb_hydra_dev_cfg_rt;</div><div class='ctx'> #define CMD_SET_BUSPARAMS_RESP			85</div><div class='ctx'> #define CMD_GET_CAPABILITIES_REQ		95</div><div class='ctx'> #define CMD_GET_CAPABILITIES_RESP		96</div><div class='add'>+#define CMD_LED_ACTION_REQ			101</div><div class='add'>+#define CMD_LED_ACTION_RESP			102</div><div class='ctx'> #define CMD_RX_MESSAGE				106</div><div class='ctx'> #define CMD_MAP_CHANNEL_REQ			200</div><div class='ctx'> #define CMD_MAP_CHANNEL_RESP			201</div><div class='hunk'>@@ -111,7 +114,7 @@ struct kvaser_cmd_card_info {</div><div class='ctx'> 	__le32 clock_res;</div><div class='ctx'> 	__le32 mfg_date;</div><div class='ctx'> 	__le32 ean[2];</div><div class='del'>-	u8 hw_version;</div><div class='add'>+	u8 hw_revision;</div><div class='ctx'> 	u8 usb_mode;</div><div class='ctx'> 	u8 hw_type;</div><div class='ctx'> 	u8 reserved0;</div><div class='hunk'>@@ -217,6 +220,22 @@ struct kvaser_cmd_get_busparams_res {</div><div class='ctx'> 	u8 reserved[20];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+/* The device has two LEDs per CAN channel</div><div class='add'>+ * The LSB of action field controls the state:</div><div class='add'>+ *   0 = ON</div><div class='add'>+ *   1 = OFF</div><div class='add'>+ * The remaining bits of action field is the LED index</div><div class='add'>+ */</div><div class='add'>+#define KVASER_USB_HYDRA_LED_IDX_MASK GENMASK(31, 1)</div><div class='add'>+#define KVASER_USB_HYDRA_LED_YELLOW_CH0_IDX 3</div><div class='add'>+#define KVASER_USB_HYDRA_LEDS_PER_CHANNEL 2</div><div class='add'>+struct kvaser_cmd_led_action_req {</div><div class='add'>+	u8 action;</div><div class='add'>+	u8 padding;</div><div class='add'>+	__le16 duration_ms;</div><div class='add'>+	u8 reserved[24];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> /* Ctrl modes */</div><div class='ctx'> #define KVASER_USB_HYDRA_CTRLMODE_NORMAL	0x01</div><div class='ctx'> #define KVASER_USB_HYDRA_CTRLMODE_LISTEN	0x02</div><div class='hunk'>@@ -299,6 +318,8 @@ struct kvaser_cmd {</div><div class='ctx'> 		struct kvaser_cmd_get_busparams_req get_busparams_req;</div><div class='ctx'> 		struct kvaser_cmd_get_busparams_res get_busparams_res;</div><div class='ctx'> </div><div class='add'>+		struct kvaser_cmd_led_action_req led_action_req;</div><div class='add'>+</div><div class='ctx'> 		struct kvaser_cmd_chip_state_event chip_state_event;</div><div class='ctx'> </div><div class='ctx'> 		struct kvaser_cmd_set_ctrlmode set_ctrlmode;</div><div class='hunk'>@@ -926,6 +947,42 @@ kvaser_usb_hydra_bus_status_to_can_state(const struct kvaser_usb_net_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void kvaser_usb_hydra_change_state(struct kvaser_usb_net_priv *priv,</div><div class='add'>+					  const struct can_berr_counter *bec,</div><div class='add'>+					  struct can_frame *cf,</div><div class='add'>+					  enum can_state new_state)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	enum can_state old_state = priv-&gt;can.state;</div><div class='add'>+	enum can_state tx_state, rx_state;</div><div class='add'>+</div><div class='add'>+	tx_state = (bec-&gt;txerr &gt;= bec-&gt;rxerr) ?</div><div class='add'>+				new_state : CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	rx_state = (bec-&gt;txerr &lt;= bec-&gt;rxerr) ?</div><div class='add'>+				new_state : CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	can_change_state(netdev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (new_state == CAN_STATE_BUS_OFF &amp;&amp; old_state &lt; CAN_STATE_BUS_OFF) {</div><div class='add'>+		if (priv-&gt;can.restart_ms == 0)</div><div class='add'>+			kvaser_usb_hydra_send_simple_cmd_async(priv, CMD_STOP_CHIP_REQ);</div><div class='add'>+</div><div class='add'>+		can_bus_off(netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.restart_ms &amp;&amp;</div><div class='add'>+	    old_state &gt;= CAN_STATE_BUS_OFF &amp;&amp;</div><div class='add'>+	    new_state &lt; CAN_STATE_BUS_OFF) {</div><div class='add'>+		priv-&gt;can.can_stats.restarts++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='add'>+	}</div><div class='add'>+	if (cf &amp;&amp; new_state != CAN_STATE_BUS_OFF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec-&gt;txerr;</div><div class='add'>+		cf-&gt;data[7] = bec-&gt;rxerr;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void kvaser_usb_hydra_update_state(struct kvaser_usb_net_priv *priv,</div><div class='ctx'> 					  u8 bus_status,</div><div class='ctx'> 					  const struct can_berr_counter *bec)</div><div class='hunk'>@@ -951,41 +1008,11 @@ static void kvaser_usb_hydra_update_state(struct kvaser_usb_net_priv *priv,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='del'>-	if (skb) {</div><div class='del'>-		enum can_state tx_state, rx_state;</div><div class='del'>-</div><div class='del'>-		tx_state = (bec-&gt;txerr &gt;= bec-&gt;rxerr) ?</div><div class='del'>-					new_state : CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-		rx_state = (bec-&gt;txerr &lt;= bec-&gt;rxerr) ?</div><div class='del'>-					new_state : CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-		can_change_state(netdev, cf, tx_state, rx_state);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (new_state == CAN_STATE_BUS_OFF &amp;&amp; old_state &lt; CAN_STATE_BUS_OFF) {</div><div class='del'>-		if (!priv-&gt;can.restart_ms)</div><div class='del'>-			kvaser_usb_hydra_send_simple_cmd_async</div><div class='del'>-						(priv, CMD_STOP_CHIP_REQ);</div><div class='del'>-</div><div class='del'>-		can_bus_off(netdev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!skb) {</div><div class='add'>+	kvaser_usb_hydra_change_state(priv, bec, cf, new_state);</div><div class='add'>+	if (skb)</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	else</div><div class='ctx'> 		netdev_warn(netdev, "No memory left for err_skb\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;can.restart_ms &amp;&amp;</div><div class='del'>-	    old_state &gt;= CAN_STATE_BUS_OFF &amp;&amp;</div><div class='del'>-	    new_state &lt; CAN_STATE_BUS_OFF)</div><div class='del'>-		priv-&gt;can.can_stats.restarts++;</div><div class='del'>-</div><div class='del'>-	if (new_state != CAN_STATE_BUS_OFF) {</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='del'>-		cf-&gt;data[6] = bec-&gt;txerr;</div><div class='del'>-		cf-&gt;data[7] = bec-&gt;rxerr;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kvaser_usb_hydra_state_event(const struct kvaser_usb *dev,</div><div class='hunk'>@@ -1078,9 +1105,8 @@ kvaser_usb_hydra_error_frame(struct kvaser_usb_net_priv *priv,</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = priv-&gt;netdev;</div><div class='ctx'> 	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct skb_shared_hwtstamps *shhwtstamps;</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='ctx'> 	struct can_berr_counter bec;</div><div class='ctx'> 	enum can_state new_state, old_state;</div><div class='ctx'> 	u8 bus_status;</div><div class='hunk'>@@ -1096,52 +1122,26 @@ kvaser_usb_hydra_error_frame(struct kvaser_usb_net_priv *priv,</div><div class='ctx'> 	kvaser_usb_hydra_bus_status_to_can_state(priv, bus_status, &amp;bec,</div><div class='ctx'> 						 &amp;new_state);</div><div class='ctx'> </div><div class='del'>-	skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='add'>+	if (new_state != old_state)</div><div class='add'>+		kvaser_usb_hydra_change_state(priv, &amp;bec, cf, new_state);</div><div class='ctx'> </div><div class='del'>-	if (new_state != old_state) {</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) {</div><div class='ctx'> 		if (skb) {</div><div class='del'>-			enum can_state tx_state, rx_state;</div><div class='del'>-</div><div class='del'>-			tx_state = (bec.txerr &gt;= bec.rxerr) ?</div><div class='del'>-					new_state : CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-			rx_state = (bec.txerr &lt;= bec.rxerr) ?</div><div class='del'>-					new_state : CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-			can_change_state(netdev, cf, tx_state, rx_state);</div><div class='del'>-</div><div class='del'>-			if (priv-&gt;can.restart_ms &amp;&amp;</div><div class='del'>-			    old_state &gt;= CAN_STATE_BUS_OFF &amp;&amp;</div><div class='del'>-			    new_state &lt; CAN_STATE_BUS_OFF)</div><div class='del'>-				cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (new_state == CAN_STATE_BUS_OFF) {</div><div class='del'>-			if (!priv-&gt;can.restart_ms)</div><div class='del'>-				kvaser_usb_hydra_send_simple_cmd_async</div><div class='del'>-						(priv, CMD_STOP_CHIP_REQ);</div><div class='add'>+			struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);</div><div class='ctx'> </div><div class='del'>-			can_bus_off(netdev);</div><div class='add'>+			shhwtstamps-&gt;hwtstamp = hwtstamp;</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_CNT;</div><div class='add'>+			cf-&gt;data[6] = bec.txerr;</div><div class='add'>+			cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+			netif_rx(skb);</div><div class='add'>+		} else {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			netdev_warn(netdev, "No memory left for err_skb\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!skb) {</div><div class='del'>-		stats-&gt;rx_dropped++;</div><div class='del'>-		netdev_warn(netdev, "No memory left for err_skb\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	shhwtstamps = skb_hwtstamps(skb);</div><div class='del'>-	shhwtstamps-&gt;hwtstamp = hwtstamp;</div><div class='del'>-</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_BUSERROR;</div><div class='del'>-	if (new_state != CAN_STATE_BUS_OFF) {</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='del'>-		cf-&gt;data[6] = bec.txerr;</div><div class='del'>-		cf-&gt;data[7] = bec.rxerr;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-</div><div class='ctx'> 	priv-&gt;bec.txerr = bec.txerr;</div><div class='ctx'> 	priv-&gt;bec.rxerr = bec.rxerr;</div><div class='ctx'> }</div><div class='hunk'>@@ -1411,6 +1411,7 @@ static void kvaser_usb_hydra_handle_cmd_std(const struct kvaser_usb *dev,</div><div class='ctx'> 	/* Ignored commands */</div><div class='ctx'> 	case CMD_SET_BUSPARAMS_RESP:</div><div class='ctx'> 	case CMD_SET_BUSPARAMS_FD_RESP:</div><div class='add'>+	case CMD_LED_ACTION_RESP:</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1838,6 +1839,7 @@ static int kvaser_usb_hydra_get_software_details(struct kvaser_usb *dev)</div><div class='ctx'> 	size_t cmd_len;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u32 flags;</div><div class='add'>+	u32 fw_version;</div><div class='ctx'> 	struct kvaser_usb_dev_card_data *card_data = &amp;dev-&gt;card_data;</div><div class='ctx'> </div><div class='ctx'> 	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='hunk'>@@ -1862,7 +1864,10 @@ static int kvaser_usb_hydra_get_software_details(struct kvaser_usb *dev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto end;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;fw_version = le32_to_cpu(cmd-&gt;sw_detail_res.sw_version);</div><div class='add'>+	fw_version = le32_to_cpu(cmd-&gt;sw_detail_res.sw_version);</div><div class='add'>+	dev-&gt;fw_version.major = FIELD_GET(KVASER_USB_SW_VERSION_MAJOR_MASK, fw_version);</div><div class='add'>+	dev-&gt;fw_version.minor = FIELD_GET(KVASER_USB_SW_VERSION_MINOR_MASK, fw_version);</div><div class='add'>+	dev-&gt;fw_version.build = FIELD_GET(KVASER_USB_SW_VERSION_BUILD_MASK, fw_version);</div><div class='ctx'> 	flags = le32_to_cpu(cmd-&gt;sw_detail_res.sw_flags);</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; KVASER_USB_HYDRA_SW_FLAG_FW_BAD) {</div><div class='hunk'>@@ -1913,6 +1918,10 @@ static int kvaser_usb_hydra_get_card_info(struct kvaser_usb *dev)</div><div class='ctx'> 	err = kvaser_usb_hydra_wait_cmd(dev, CMD_GET_CARD_INFO_RESP, &amp;cmd);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='add'>+	dev-&gt;ean[1] = le32_to_cpu(cmd.card_info.ean[1]);</div><div class='add'>+	dev-&gt;ean[0] = le32_to_cpu(cmd.card_info.ean[0]);</div><div class='add'>+	dev-&gt;serial_number = le32_to_cpu(cmd.card_info.serial_number);</div><div class='add'>+	dev-&gt;hw_revision = cmd.card_info.hw_revision;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;nchannels = cmd.card_info.nchannels;</div><div class='ctx'> 	if (dev-&gt;nchannels &gt; KVASER_USB_MAX_NET_DEVICES)</div><div class='hunk'>@@ -1967,6 +1976,36 @@ static int kvaser_usb_hydra_get_capabilities(struct kvaser_usb *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvaser_usb_hydra_set_led(struct kvaser_usb_net_priv *priv,</div><div class='add'>+				    enum kvaser_usb_led_state state,</div><div class='add'>+				    u16 duration_ms)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_LED_ACTION_REQ;</div><div class='add'>+	cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he(cmd, dev-&gt;card_data.hydra.sysdbg_he);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid(cmd, kvaser_usb_hydra_get_next_transid(dev));</div><div class='add'>+</div><div class='add'>+	cmd-&gt;led_action_req.duration_ms = cpu_to_le16(duration_ms);</div><div class='add'>+	cmd-&gt;led_action_req.action = state |</div><div class='add'>+				     FIELD_PREP(KVASER_USB_HYDRA_LED_IDX_MASK,</div><div class='add'>+						KVASER_USB_HYDRA_LED_YELLOW_CH0_IDX +</div><div class='add'>+						KVASER_USB_HYDRA_LEDS_PER_CHANNEL * priv-&gt;channel);</div><div class='add'>+</div><div class='add'>+	ret = kvaser_usb_send_cmd(dev, cmd, cmd_len);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int kvaser_usb_hydra_set_opt_mode(const struct kvaser_usb_net_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='hunk'>@@ -2170,6 +2209,7 @@ const struct kvaser_usb_dev_ops kvaser_usb_hydra_dev_ops = {</div><div class='ctx'> 	.dev_get_software_details = kvaser_usb_hydra_get_software_details,</div><div class='ctx'> 	.dev_get_card_info = kvaser_usb_hydra_get_card_info,</div><div class='ctx'> 	.dev_get_capabilities = kvaser_usb_hydra_get_capabilities,</div><div class='add'>+	.dev_set_led = kvaser_usb_hydra_set_led,</div><div class='ctx'> 	.dev_set_opt_mode = kvaser_usb_hydra_set_opt_mode,</div><div class='ctx'> 	.dev_start_chip = kvaser_usb_hydra_start_chip,</div><div class='ctx'> 	.dev_stop_chip = kvaser_usb_hydra_stop_chip,</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c b/drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c<br/>index 6b9122ab1464..1167d38344f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'>  * Copyright (C) 2015 Valeo S.A.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/completion.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='hunk'>@@ -81,6 +82,8 @@</div><div class='ctx'> #define CMD_FLUSH_QUEUE_REPLY		68</div><div class='ctx'> #define CMD_GET_CAPABILITIES_REQ	95</div><div class='ctx'> #define CMD_GET_CAPABILITIES_RESP	96</div><div class='add'>+#define CMD_LED_ACTION_REQ		101</div><div class='add'>+#define CMD_LED_ACTION_RESP		102</div><div class='ctx'> </div><div class='ctx'> #define CMD_LEAF_LOG_MESSAGE		106</div><div class='ctx'> </div><div class='hunk'>@@ -135,7 +138,7 @@ struct kvaser_cmd_cardinfo {</div><div class='ctx'> 	__le32 padding0;</div><div class='ctx'> 	__le32 clock_resolution;</div><div class='ctx'> 	__le32 mfgdate;</div><div class='del'>-	u8 ean[8];</div><div class='add'>+	__le32 ean[2];</div><div class='ctx'> 	u8 hw_revision;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct {</div><div class='hunk'>@@ -173,6 +176,21 @@ struct kvaser_cmd_busparams {</div><div class='ctx'> 	struct kvaser_usb_busparams busparams;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+/* The device has one LED per CAN channel</div><div class='add'>+ * The LSB of action field controls the state:</div><div class='add'>+ *   0 = ON</div><div class='add'>+ *   1 = OFF</div><div class='add'>+ * The remaining bits of action field is the LED index</div><div class='add'>+ */</div><div class='add'>+#define KVASER_USB_LEAF_LED_IDX_MASK GENMASK(31, 1)</div><div class='add'>+#define KVASER_USB_LEAF_LED_YELLOW_CH0_IDX 2</div><div class='add'>+struct kvaser_cmd_led_action_req {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 action;</div><div class='add'>+	__le16 duration_ms;</div><div class='add'>+	u8 padding[24];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='ctx'> struct kvaser_cmd_tx_can {</div><div class='ctx'> 	u8 channel;</div><div class='ctx'> 	u8 tid;</div><div class='hunk'>@@ -359,6 +377,8 @@ struct kvaser_cmd {</div><div class='ctx'> 		struct kvaser_cmd_cardinfo cardinfo;</div><div class='ctx'> 		struct kvaser_cmd_busparams busparams;</div><div class='ctx'> </div><div class='add'>+		struct kvaser_cmd_led_action_req led_action_req;</div><div class='add'>+</div><div class='ctx'> 		struct kvaser_cmd_rx_can_header rx_can_header;</div><div class='ctx'> 		struct kvaser_cmd_tx_acknowledge_header tx_acknowledge_header;</div><div class='ctx'> </div><div class='hunk'>@@ -409,6 +429,7 @@ static const u8 kvaser_usb_leaf_cmd_sizes_leaf[] = {</div><div class='ctx'> 	[CMD_ERROR_EVENT]		= kvaser_fsize(u.leaf.error_event),</div><div class='ctx'> 	/* ignored events: */</div><div class='ctx'> 	[CMD_FLUSH_QUEUE_REPLY]		= CMD_SIZE_ANY,</div><div class='add'>+	[CMD_LED_ACTION_RESP]		= CMD_SIZE_ANY,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const u8 kvaser_usb_leaf_cmd_sizes_usbcan[] = {</div><div class='hunk'>@@ -423,6 +444,8 @@ static const u8 kvaser_usb_leaf_cmd_sizes_usbcan[] = {</div><div class='ctx'> 	[CMD_CAN_ERROR_EVENT]		= kvaser_fsize(u.usbcan.can_error_event),</div><div class='ctx'> 	[CMD_ERROR_EVENT]		= kvaser_fsize(u.usbcan.error_event),</div><div class='ctx'> 	[CMD_USBCAN_CLOCK_OVERFLOW_EVENT] = kvaser_fsize(u.usbcan.clk_overflow_event),</div><div class='add'>+	/* ignored events: */</div><div class='add'>+	[CMD_LED_ACTION_RESP]		= CMD_SIZE_ANY,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Summary of a kvaser error event, for a unified Leaf/Usbcan error</div><div class='hunk'>@@ -662,7 +685,7 @@ static int kvaser_usb_leaf_wait_cmd(const struct kvaser_usb *dev, u8 id,</div><div class='ctx'> 			 * for further details.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (tmp-&gt;len == 0) {</div><div class='del'>-				pos = round_up(pos,</div><div class='add'>+				pos = round_up(pos + 1,</div><div class='ctx'> 					       le16_to_cpu</div><div class='ctx'> 						(dev-&gt;bulk_in-&gt;wMaxPacketSize));</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -718,9 +741,13 @@ static int kvaser_usb_leaf_send_simple_cmd(const struct kvaser_usb *dev,</div><div class='ctx'> static void kvaser_usb_leaf_get_software_info_leaf(struct kvaser_usb *dev,</div><div class='ctx'> 						   const struct leaf_cmd_softinfo *softinfo)</div><div class='ctx'> {</div><div class='add'>+	u32 fw_version;</div><div class='ctx'> 	u32 sw_options = le32_to_cpu(softinfo-&gt;sw_options);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;fw_version = le32_to_cpu(softinfo-&gt;fw_version);</div><div class='add'>+	fw_version = le32_to_cpu(softinfo-&gt;fw_version);</div><div class='add'>+	dev-&gt;fw_version.major = FIELD_GET(KVASER_USB_SW_VERSION_MAJOR_MASK, fw_version);</div><div class='add'>+	dev-&gt;fw_version.minor = FIELD_GET(KVASER_USB_SW_VERSION_MINOR_MASK, fw_version);</div><div class='add'>+	dev-&gt;fw_version.build = FIELD_GET(KVASER_USB_SW_VERSION_BUILD_MASK, fw_version);</div><div class='ctx'> 	dev-&gt;max_tx_urbs = le16_to_cpu(softinfo-&gt;max_outstanding_tx);</div><div class='ctx'> </div><div class='ctx'> 	if (sw_options &amp; KVASER_USB_LEAF_SWOPTION_EXT_CAP)</div><div class='hunk'>@@ -761,6 +788,7 @@ static int kvaser_usb_leaf_get_software_info_inner(struct kvaser_usb *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct kvaser_cmd cmd;</div><div class='ctx'> 	int err;</div><div class='add'>+	u32 fw_version;</div><div class='ctx'> </div><div class='ctx'> 	err = kvaser_usb_leaf_send_simple_cmd(dev, CMD_GET_SOFTWARE_INFO, 0);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -775,7 +803,13 @@ static int kvaser_usb_leaf_get_software_info_inner(struct kvaser_usb *dev)</div><div class='ctx'> 		kvaser_usb_leaf_get_software_info_leaf(dev, &amp;cmd.u.leaf.softinfo);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case KVASER_USBCAN:</div><div class='del'>-		dev-&gt;fw_version = le32_to_cpu(cmd.u.usbcan.softinfo.fw_version);</div><div class='add'>+		fw_version = le32_to_cpu(cmd.u.usbcan.softinfo.fw_version);</div><div class='add'>+		dev-&gt;fw_version.major = FIELD_GET(KVASER_USB_SW_VERSION_MAJOR_MASK,</div><div class='add'>+						  fw_version);</div><div class='add'>+		dev-&gt;fw_version.minor = FIELD_GET(KVASER_USB_SW_VERSION_MINOR_MASK,</div><div class='add'>+						  fw_version);</div><div class='add'>+		dev-&gt;fw_version.build = FIELD_GET(KVASER_USB_SW_VERSION_BUILD_MASK,</div><div class='add'>+						  fw_version);</div><div class='ctx'> 		dev-&gt;max_tx_urbs =</div><div class='ctx'> 			le16_to_cpu(cmd.u.usbcan.softinfo.max_outstanding_tx);</div><div class='ctx'> 		dev-&gt;cfg = &amp;kvaser_usb_leaf_usbcan_dev_cfg;</div><div class='hunk'>@@ -820,6 +854,10 @@ static int kvaser_usb_leaf_get_card_info(struct kvaser_usb *dev)</div><div class='ctx'> 	    (dev-&gt;driver_info-&gt;family == KVASER_USBCAN &amp;&amp;</div><div class='ctx'> 	     dev-&gt;nchannels &gt; MAX_USBCAN_NET_DEVICES))</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	dev-&gt;ean[1] = le32_to_cpu(cmd.u.cardinfo.ean[1]);</div><div class='add'>+	dev-&gt;ean[0] = le32_to_cpu(cmd.u.cardinfo.ean[0]);</div><div class='add'>+	dev-&gt;serial_number = le32_to_cpu(cmd.u.cardinfo.serial_number);</div><div class='add'>+	dev-&gt;hw_revision = cmd.u.cardinfo.hw_revision;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -924,6 +962,34 @@ static int kvaser_usb_leaf_get_capabilities_leaf(struct kvaser_usb *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int kvaser_usb_leaf_set_led(struct kvaser_usb_net_priv *priv,</div><div class='add'>+				   enum kvaser_usb_led_state state,</div><div class='add'>+				   u16 duration_ms)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;id = CMD_LED_ACTION_REQ;</div><div class='add'>+	cmd-&gt;len = CMD_HEADER_LEN + sizeof(struct kvaser_cmd_led_action_req);</div><div class='add'>+	cmd-&gt;u.led_action_req.tid = 0xff;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;u.led_action_req.duration_ms = cpu_to_le16(duration_ms);</div><div class='add'>+	cmd-&gt;u.led_action_req.action = state |</div><div class='add'>+				       FIELD_PREP(KVASER_USB_LEAF_LED_IDX_MASK,</div><div class='add'>+						  KVASER_USB_LEAF_LED_YELLOW_CH0_IDX +</div><div class='add'>+						  priv-&gt;channel);</div><div class='add'>+</div><div class='add'>+	ret = kvaser_usb_send_cmd(dev, cmd, cmd-&gt;len);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int kvaser_usb_leaf_get_capabilities(struct kvaser_usb *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='hunk'>@@ -1120,10 +1186,8 @@ kvaser_usb_leaf_rx_error_update_can_state(struct kvaser_usb_net_priv *priv,</div><div class='ctx'> static void kvaser_usb_leaf_rx_error(const struct kvaser_usb *dev,</div><div class='ctx'> 				     const struct kvaser_usb_err_summary *es)</div><div class='ctx'> {</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct can_frame tmp_cf = { .can_id = CAN_ERR_FLAG,</div><div class='del'>-				    .len = CAN_ERR_DLC };</div><div class='del'>-	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='ctx'> 	struct net_device_stats *stats;</div><div class='ctx'> 	struct kvaser_usb_net_priv *priv;</div><div class='ctx'> 	struct kvaser_usb_net_leaf_priv *leaf;</div><div class='hunk'>@@ -1143,18 +1207,10 @@ static void kvaser_usb_leaf_rx_error(const struct kvaser_usb *dev,</div><div class='ctx'> 	if (!netif_running(priv-&gt;netdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* Update all of the CAN interface's state and error counters before</div><div class='del'>-	 * trying any memory allocation that can actually fail with -ENOMEM.</div><div class='del'>-	 *</div><div class='del'>-	 * We send a temporary stack-allocated error CAN frame to</div><div class='del'>-	 * can_change_state() for the very same reason.</div><div class='del'>-	 *</div><div class='del'>-	 * TODO: Split can_change_state() responsibility between updating the</div><div class='del'>-	 * CAN interface's state and counters, and the setting up of CAN error</div><div class='del'>-	 * frame ID and data to userspace. Remove stack allocation afterwards.</div><div class='del'>-	 */</div><div class='ctx'> 	old_state = priv-&gt;can.state;</div><div class='del'>-	kvaser_usb_leaf_rx_error_update_can_state(priv, es, &amp;tmp_cf);</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		skb = alloc_can_err_skb(priv-&gt;netdev, &amp;cf);</div><div class='add'>+	kvaser_usb_leaf_rx_error_update_can_state(priv, es, cf);</div><div class='ctx'> 	new_state = priv-&gt;can.state;</div><div class='ctx'> </div><div class='ctx'> 	/* If there are errors, request status updates periodically as we do</div><div class='hunk'>@@ -1168,13 +1224,6 @@ static void kvaser_usb_leaf_rx_error(const struct kvaser_usb *dev,</div><div class='ctx'> 		schedule_delayed_work(&amp;leaf-&gt;chip_state_req_work,</div><div class='ctx'> 				      msecs_to_jiffies(500));</div><div class='ctx'> </div><div class='del'>-	skb = alloc_can_err_skb(priv-&gt;netdev, &amp;cf);</div><div class='del'>-	if (!skb) {</div><div class='del'>-		stats-&gt;rx_dropped++;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	memcpy(cf, &amp;tmp_cf, sizeof(*cf));</div><div class='del'>-</div><div class='ctx'> 	if (new_state != old_state) {</div><div class='ctx'> 		if (es-&gt;status &amp;</div><div class='ctx'> 		    (M16C_STATE_BUS_OFF | M16C_STATE_BUS_RESET)) {</div><div class='hunk'>@@ -1187,11 +1236,20 @@ static void kvaser_usb_leaf_rx_error(const struct kvaser_usb *dev,</div><div class='ctx'> 		if (priv-&gt;can.restart_ms &amp;&amp;</div><div class='ctx'> 		    old_state == CAN_STATE_BUS_OFF &amp;&amp;</div><div class='ctx'> 		    new_state &lt; CAN_STATE_BUS_OFF) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='add'>+			if (cf)</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='ctx'> 			netif_carrier_on(priv-&gt;netdev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!skb) {</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			netdev_warn(priv-&gt;netdev, "No memory left for err_skb\n");</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (dev-&gt;driver_info-&gt;family) {</div><div class='ctx'> 	case KVASER_LEAF:</div><div class='ctx'> 		if (es-&gt;leaf.error_factor) {</div><div class='hunk'>@@ -1646,6 +1704,8 @@ static void kvaser_usb_leaf_handle_command(struct kvaser_usb *dev,</div><div class='ctx'> 		if (dev-&gt;driver_info-&gt;family != KVASER_LEAF)</div><div class='ctx'> 			goto warn;</div><div class='ctx'> 		break;</div><div class='add'>+	case CMD_LED_ACTION_RESP:</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> warn:		dev_warn(&amp;dev-&gt;intf-&gt;dev, "Unhandled command (%d)\n", cmd-&gt;id);</div><div class='hunk'>@@ -1672,7 +1732,7 @@ static void kvaser_usb_leaf_read_bulk_callback(struct kvaser_usb *dev,</div><div class='ctx'> 		 * number of events in case of a heavy rx load on the bus.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (cmd-&gt;len == 0) {</div><div class='del'>-			pos = round_up(pos, le16_to_cpu</div><div class='add'>+			pos = round_up(pos + 1, le16_to_cpu</div><div class='ctx'> 						(dev-&gt;bulk_in-&gt;wMaxPacketSize));</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1935,6 +1995,7 @@ const struct kvaser_usb_dev_ops kvaser_usb_leaf_dev_ops = {</div><div class='ctx'> 	.dev_get_software_details = NULL,</div><div class='ctx'> 	.dev_get_card_info = kvaser_usb_leaf_get_card_info,</div><div class='ctx'> 	.dev_get_capabilities = kvaser_usb_leaf_get_capabilities,</div><div class='add'>+	.dev_set_led = kvaser_usb_leaf_set_led,</div><div class='ctx'> 	.dev_set_opt_mode = kvaser_usb_leaf_set_opt_mode,</div><div class='ctx'> 	.dev_start_chip = kvaser_usb_leaf_start_chip,</div><div class='ctx'> 	.dev_stop_chip = kvaser_usb_leaf_stop_chip,</div><div class='head'>diff --git a/drivers/net/can/usb/nct6694_canfd.c b/drivers/net/can/usb/nct6694_canfd.c<br/>new file mode 100644<br/>index 000000000000..dd6df2ec3742<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/nct6694_canfd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/nct6694_canfd.c</a></div><div class='hunk'>@@ -0,0 +1,831 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Nuvoton NCT6694 Socket CANfd driver based on USB interface.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Nuvoton Technology Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/idr.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mfd/nct6694.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#define DEVICE_NAME "nct6694-canfd"</div><div class='add'>+</div><div class='add'>+/* USB command module type for NCT6694 CANfd controller.</div><div class='add'>+ * This defines the module type used for communication with the NCT6694</div><div class='add'>+ * CANfd controller over the USB interface.</div><div class='add'>+ */</div><div class='add'>+#define NCT6694_CANFD_MOD			0x05</div><div class='add'>+</div><div class='add'>+/* Command 00h - CAN Setting and Initialization */</div><div class='add'>+#define NCT6694_CANFD_SETTING			0x00</div><div class='add'>+#define NCT6694_CANFD_SETTING_ACTIVE_CTRL1	BIT(0)</div><div class='add'>+#define NCT6694_CANFD_SETTING_ACTIVE_CTRL2	BIT(1)</div><div class='add'>+#define NCT6694_CANFD_SETTING_ACTIVE_NBTP_DBTP	BIT(2)</div><div class='add'>+#define NCT6694_CANFD_SETTING_CTRL1_MON		BIT(0)</div><div class='add'>+#define NCT6694_CANFD_SETTING_CTRL1_NISO	BIT(1)</div><div class='add'>+#define NCT6694_CANFD_SETTING_CTRL1_LBCK	BIT(2)</div><div class='add'>+#define NCT6694_CANFD_SETTING_NBTP_NTSEG2	GENMASK(6, 0)</div><div class='add'>+#define NCT6694_CANFD_SETTING_NBTP_NTSEG1	GENMASK(15, 8)</div><div class='add'>+#define NCT6694_CANFD_SETTING_NBTP_NBRP		GENMASK(24, 16)</div><div class='add'>+#define NCT6694_CANFD_SETTING_NBTP_NSJW		GENMASK(31, 25)</div><div class='add'>+#define NCT6694_CANFD_SETTING_DBTP_DSJW		GENMASK(3, 0)</div><div class='add'>+#define NCT6694_CANFD_SETTING_DBTP_DTSEG2	GENMASK(7, 4)</div><div class='add'>+#define NCT6694_CANFD_SETTING_DBTP_DTSEG1	GENMASK(12, 8)</div><div class='add'>+#define NCT6694_CANFD_SETTING_DBTP_DBRP		GENMASK(20, 16)</div><div class='add'>+#define NCT6694_CANFD_SETTING_DBTP_TDC		BIT(23)</div><div class='add'>+</div><div class='add'>+/* Command 01h - CAN Information */</div><div class='add'>+#define NCT6694_CANFD_INFORMATION		0x01</div><div class='add'>+#define NCT6694_CANFD_INFORMATION_SEL		0x00</div><div class='add'>+</div><div class='add'>+/* Command 02h - CAN Event */</div><div class='add'>+#define NCT6694_CANFD_EVENT			0x02</div><div class='add'>+#define NCT6694_CANFD_EVENT_SEL(idx, mask)	\</div><div class='add'>+	((idx ? 0x80 : 0x00) | ((mask) &amp; 0x7F))</div><div class='add'>+</div><div class='add'>+#define NCT6694_CANFD_EVENT_MASK		GENMASK(5, 0)</div><div class='add'>+#define NCT6694_CANFD_EVT_TX_FIFO_EMPTY		BIT(7)	/* Read-clear */</div><div class='add'>+#define NCT6694_CANFD_EVT_RX_DATA_LOST		BIT(5)	/* Read-clear */</div><div class='add'>+#define NCT6694_CANFD_EVT_RX_DATA_IN		BIT(7)	/* Read-clear */</div><div class='add'>+</div><div class='add'>+/* Command 10h - CAN Deliver */</div><div class='add'>+#define NCT6694_CANFD_DELIVER			0x10</div><div class='add'>+#define NCT6694_CANFD_DELIVER_SEL(buf_cnt)	\</div><div class='add'>+	((buf_cnt) &amp; 0xFF)</div><div class='add'>+</div><div class='add'>+/* Command 11h - CAN Receive */</div><div class='add'>+#define NCT6694_CANFD_RECEIVE			0x11</div><div class='add'>+#define NCT6694_CANFD_RECEIVE_SEL(idx, buf_cnt)	\</div><div class='add'>+	((idx ? 0x80 : 0x00) | ((buf_cnt) &amp; 0x7F))</div><div class='add'>+</div><div class='add'>+#define NCT6694_CANFD_FRAME_TAG(idx)		(0xC0 | (idx))</div><div class='add'>+#define NCT6694_CANFD_FRAME_FLAG_EFF		BIT(0)</div><div class='add'>+#define NCT6694_CANFD_FRAME_FLAG_RTR		BIT(1)</div><div class='add'>+#define NCT6694_CANFD_FRAME_FLAG_FD		BIT(2)</div><div class='add'>+#define NCT6694_CANFD_FRAME_FLAG_BRS		BIT(3)</div><div class='add'>+#define NCT6694_CANFD_FRAME_FLAG_ERR		BIT(4)</div><div class='add'>+</div><div class='add'>+#define NCT6694_NAPI_WEIGHT			32</div><div class='add'>+</div><div class='add'>+enum nct6694_event_err {</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_NO_ERROR = 0,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_CRC_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_STUFF_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_ACK_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_FORM_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_BIT_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_TIMEOUT_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_UNKNOWN_ERROR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum nct6694_event_status {</div><div class='add'>+	NCT6694_CANFD_EVT_STS_ERROR_ACTIVE = 0,</div><div class='add'>+	NCT6694_CANFD_EVT_STS_ERROR_PASSIVE,</div><div class='add'>+	NCT6694_CANFD_EVT_STS_BUS_OFF,</div><div class='add'>+	NCT6694_CANFD_EVT_STS_WARNING,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed nct6694_canfd_setting {</div><div class='add'>+	__le32 nbr;</div><div class='add'>+	__le32 dbr;</div><div class='add'>+	u8 active;</div><div class='add'>+	u8 reserved[3];</div><div class='add'>+	__le16 ctrl1;</div><div class='add'>+	__le16 ctrl2;</div><div class='add'>+	__le32 nbtp;</div><div class='add'>+	__le32 dbtp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed nct6694_canfd_information {</div><div class='add'>+	u8 tx_fifo_cnt;</div><div class='add'>+	u8 rx_fifo_cnt;</div><div class='add'>+	u8 reserved[2];</div><div class='add'>+	__le32 can_clk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed nct6694_canfd_event {</div><div class='add'>+	u8 err;</div><div class='add'>+	u8 status;</div><div class='add'>+	u8 tx_evt;</div><div class='add'>+	u8 rx_evt;</div><div class='add'>+	u8 rec;</div><div class='add'>+	u8 tec;</div><div class='add'>+	u8 reserved[2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed nct6694_canfd_frame {</div><div class='add'>+	u8 tag;</div><div class='add'>+	u8 flag;</div><div class='add'>+	u8 reserved;</div><div class='add'>+	u8 length;</div><div class='add'>+	__le32 id;</div><div class='add'>+	u8 data[CANFD_MAX_DLEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nct6694_canfd_priv {</div><div class='add'>+	struct can_priv can;	/* must be the first member */</div><div class='add'>+	struct can_rx_offload offload;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct nct6694 *nct6694;</div><div class='add'>+	struct workqueue_struct *wq;</div><div class='add'>+	struct work_struct tx_work;</div><div class='add'>+	struct nct6694_canfd_frame tx;</div><div class='add'>+	struct nct6694_canfd_frame rx;</div><div class='add'>+	struct nct6694_canfd_event event[2];</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct nct6694_canfd_priv *rx_offload_to_priv(struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	return container_of(offload, struct nct6694_canfd_priv, offload);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const nct6694_canfd_bittiming_nominal_const = {</div><div class='add'>+	.name = DEVICE_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const nct6694_canfd_bittiming_data_const = {</div><div class='add'>+	.name = DEVICE_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 32,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 32,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_rx_offload(struct can_rx_offload *offload,</div><div class='add'>+				     struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = rx_offload_to_priv(offload);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = can_rx_offload_queue_tail(offload, skb);</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;ndev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_handle_lost_msg(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ndev, "RX FIFO overflow, message(s) lost.\n");</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_errors++;</div><div class='add'>+	stats-&gt;rx_over_errors++;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+	cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+</div><div class='add'>+	nct6694_canfd_rx_offload(&amp;priv-&gt;offload, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_handle_rx(struct net_device *ndev, u8 rx_evt)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct nct6694_canfd_frame *frame = &amp;priv-&gt;rx;</div><div class='add'>+	const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_RECEIVE,</div><div class='add'>+		.sel = NCT6694_CANFD_RECEIVE_SEL(ndev-&gt;dev_port, 1),</div><div class='add'>+		.len = cpu_to_le16(sizeof(*frame))</div><div class='add'>+	};</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = nct6694_read_msg(priv-&gt;nct6694, &amp;cmd_hd, frame);</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_FD) {</div><div class='add'>+		struct canfd_frame *cfd;</div><div class='add'>+</div><div class='add'>+		skb = alloc_canfd_skb(priv-&gt;ndev, &amp;cfd);</div><div class='add'>+		if (!skb) {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cfd-&gt;can_id = le32_to_cpu(frame-&gt;id);</div><div class='add'>+		cfd-&gt;len = canfd_sanitize_len(frame-&gt;length);</div><div class='add'>+		if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_EFF)</div><div class='add'>+			cfd-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+		if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_BRS)</div><div class='add'>+			cfd-&gt;flags |= CANFD_BRS;</div><div class='add'>+		if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_ERR)</div><div class='add'>+			cfd-&gt;flags |= CANFD_ESI;</div><div class='add'>+</div><div class='add'>+		memcpy(cfd-&gt;data, frame-&gt;data, cfd-&gt;len);</div><div class='add'>+	} else {</div><div class='add'>+		struct can_frame *cf;</div><div class='add'>+</div><div class='add'>+		skb = alloc_can_skb(priv-&gt;ndev, &amp;cf);</div><div class='add'>+		if (!skb) {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cf-&gt;can_id = le32_to_cpu(frame-&gt;id);</div><div class='add'>+		cf-&gt;len = can_cc_dlc2len(frame-&gt;length);</div><div class='add'>+		if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_EFF)</div><div class='add'>+			cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+</div><div class='add'>+		if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_RTR)</div><div class='add'>+			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+		else</div><div class='add'>+			memcpy(cf-&gt;data, frame-&gt;data, cf-&gt;len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nct6694_canfd_rx_offload(&amp;priv-&gt;offload, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+					  struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	*bec = priv-&gt;bec;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_handle_state_change(struct net_device *ndev, u8 status)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	enum can_state new_state, rx_state, tx_state;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	nct6694_canfd_get_berr_counter(ndev, &amp;bec);</div><div class='add'>+	can_state_get_by_berr_counter(ndev, &amp;bec, &amp;tx_state, &amp;rx_state);</div><div class='add'>+</div><div class='add'>+	new_state = max(tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	/* state hasn't changed */</div><div class='add'>+	if (new_state == priv-&gt;can.state)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	can_change_state(ndev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		can_bus_off(ndev);</div><div class='add'>+	} else if (cf) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		nct6694_canfd_rx_offload(&amp;priv-&gt;offload, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_handle_bus_err(struct net_device *ndev, u8 bus_err)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+	if (cf)</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+	switch (bus_err) {</div><div class='add'>+	case NCT6694_CANFD_EVT_ERR_CRC_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "CRC error\n");</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NCT6694_CANFD_EVT_ERR_STUFF_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Stuff error\n");</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NCT6694_CANFD_EVT_ERR_ACK_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Ack error\n");</div><div class='add'>+		ndev-&gt;stats.tx_errors++;</div><div class='add'>+		if (cf) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NCT6694_CANFD_EVT_ERR_FORM_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Form error\n");</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NCT6694_CANFD_EVT_ERR_BIT_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Bit error\n");</div><div class='add'>+		ndev-&gt;stats.tx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_TX | CAN_ERR_PROT_BIT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		nct6694_canfd_rx_offload(&amp;priv-&gt;offload, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_handle_tx(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_bytes += can_rx_offload_get_echo_skb_queue_tail(&amp;priv-&gt;offload,</div><div class='add'>+								  0, NULL);</div><div class='add'>+	stats-&gt;tx_packets++;</div><div class='add'>+	netif_wake_queue(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t nct6694_canfd_irq(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = data;</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct nct6694_canfd_event *event = &amp;priv-&gt;event[ndev-&gt;dev_port];</div><div class='add'>+	const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_EVENT,</div><div class='add'>+		.sel = NCT6694_CANFD_EVENT_SEL(ndev-&gt;dev_port, NCT6694_CANFD_EVENT_MASK),</div><div class='add'>+		.len = cpu_to_le16(sizeof(priv-&gt;event))</div><div class='add'>+	};</div><div class='add'>+	irqreturn_t handled = IRQ_NONE;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = nct6694_read_msg(priv-&gt;nct6694, &amp;cmd_hd, priv-&gt;event);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return handled;</div><div class='add'>+</div><div class='add'>+	if (event-&gt;rx_evt &amp; NCT6694_CANFD_EVT_RX_DATA_IN) {</div><div class='add'>+		nct6694_canfd_handle_rx(ndev, event-&gt;rx_evt);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event-&gt;rx_evt &amp; NCT6694_CANFD_EVT_RX_DATA_LOST) {</div><div class='add'>+		nct6694_canfd_handle_lost_msg(ndev);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event-&gt;status) {</div><div class='add'>+		nct6694_canfd_handle_state_change(ndev, event-&gt;status);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event-&gt;err != NCT6694_CANFD_EVT_ERR_NO_ERROR) {</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+			nct6694_canfd_handle_bus_err(ndev, event-&gt;err);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event-&gt;tx_evt &amp; NCT6694_CANFD_EVT_TX_FIFO_EMPTY) {</div><div class='add'>+		nct6694_canfd_handle_tx(ndev);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (handled)</div><div class='add'>+		can_rx_offload_threaded_irq_finish(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	priv-&gt;bec.rxerr = event-&gt;rec;</div><div class='add'>+	priv-&gt;bec.txerr = event-&gt;tec;</div><div class='add'>+</div><div class='add'>+	return handled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_tx_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = container_of(work,</div><div class='add'>+						       struct nct6694_canfd_priv,</div><div class='add'>+						       tx_work);</div><div class='add'>+	struct nct6694_canfd_frame *frame = &amp;priv-&gt;tx;</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct sk_buff *skb = priv-&gt;can.echo_skb[0];</div><div class='add'>+	static const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_DELIVER,</div><div class='add'>+		.sel = NCT6694_CANFD_DELIVER_SEL(1),</div><div class='add'>+		.len = cpu_to_le16(sizeof(*frame))</div><div class='add'>+	};</div><div class='add'>+	u32 txid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	memset(frame, 0, sizeof(*frame));</div><div class='add'>+</div><div class='add'>+	frame-&gt;tag = NCT6694_CANFD_FRAME_TAG(ndev-&gt;dev_port);</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		struct canfd_frame *cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+		if (cfd-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			frame-&gt;flag |= NCT6694_CANFD_FRAME_FLAG_BRS;</div><div class='add'>+</div><div class='add'>+		if (cfd-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+			txid = cfd-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+			frame-&gt;flag |= NCT6694_CANFD_FRAME_FLAG_EFF;</div><div class='add'>+		} else {</div><div class='add'>+			txid = cfd-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+		}</div><div class='add'>+		frame-&gt;flag |= NCT6694_CANFD_FRAME_FLAG_FD;</div><div class='add'>+		frame-&gt;id = cpu_to_le32(txid);</div><div class='add'>+		frame-&gt;length = canfd_sanitize_len(cfd-&gt;len);</div><div class='add'>+</div><div class='add'>+		memcpy(frame-&gt;data, cfd-&gt;data, frame-&gt;length);</div><div class='add'>+	} else {</div><div class='add'>+		struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+		if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+			txid = cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+			frame-&gt;flag |= NCT6694_CANFD_FRAME_FLAG_EFF;</div><div class='add'>+		} else {</div><div class='add'>+			txid = cf-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+			frame-&gt;flag |= NCT6694_CANFD_FRAME_FLAG_RTR;</div><div class='add'>+		else</div><div class='add'>+			memcpy(frame-&gt;data, cf-&gt;data, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+		frame-&gt;id = cpu_to_le32(txid);</div><div class='add'>+		frame-&gt;length = cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = nct6694_write_msg(priv-&gt;nct6694, &amp;cmd_hd, frame);</div><div class='add'>+	if (err) {</div><div class='add'>+		can_free_echo_skb(ndev, 0, NULL);</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t nct6694_canfd_start_xmit(struct sk_buff *skb,</div><div class='add'>+					    struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	can_put_echo_skb(skb, ndev, 0, 0);</div><div class='add'>+	queue_work(priv-&gt;wq, &amp;priv-&gt;tx_work);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_start(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	const struct can_bittiming *n_bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	const struct can_bittiming *d_bt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	struct nct6694_canfd_setting *setting __free(kfree) = NULL;</div><div class='add'>+	const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_SETTING,</div><div class='add'>+		.sel = ndev-&gt;dev_port,</div><div class='add'>+		.len = cpu_to_le16(sizeof(*setting))</div><div class='add'>+	};</div><div class='add'>+	u32 en_tdc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	setting = kzalloc(sizeof(*setting), GFP_KERNEL);</div><div class='add'>+	if (!setting)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		setting-&gt;ctrl1 |= cpu_to_le16(NCT6694_CANFD_SETTING_CTRL1_MON);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO)</div><div class='add'>+		setting-&gt;ctrl1 |= cpu_to_le16(NCT6694_CANFD_SETTING_CTRL1_NISO);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		setting-&gt;ctrl1 |= cpu_to_le16(NCT6694_CANFD_SETTING_CTRL1_LBCK);</div><div class='add'>+</div><div class='add'>+	/* Disable clock divider */</div><div class='add'>+	setting-&gt;ctrl2 = 0;</div><div class='add'>+</div><div class='add'>+	setting-&gt;nbtp = cpu_to_le32(FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NSJW,</div><div class='add'>+					       n_bt-&gt;sjw - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NBRP,</div><div class='add'>+					       n_bt-&gt;brp - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NTSEG2,</div><div class='add'>+					       n_bt-&gt;phase_seg2 - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NTSEG1,</div><div class='add'>+					       n_bt-&gt;prop_seg + n_bt-&gt;phase_seg1 - 1));</div><div class='add'>+</div><div class='add'>+	if (d_bt-&gt;brp &lt;= 2)</div><div class='add'>+		en_tdc = NCT6694_CANFD_SETTING_DBTP_TDC;</div><div class='add'>+	else</div><div class='add'>+		en_tdc = 0;</div><div class='add'>+</div><div class='add'>+	setting-&gt;dbtp = cpu_to_le32(FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DSJW,</div><div class='add'>+					       d_bt-&gt;sjw - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DBRP,</div><div class='add'>+					       d_bt-&gt;brp - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DTSEG2,</div><div class='add'>+					       d_bt-&gt;phase_seg2 - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DTSEG1,</div><div class='add'>+					       d_bt-&gt;prop_seg + d_bt-&gt;phase_seg1 - 1) |</div><div class='add'>+				    en_tdc);</div><div class='add'>+</div><div class='add'>+	setting-&gt;active = NCT6694_CANFD_SETTING_ACTIVE_CTRL1 |</div><div class='add'>+			  NCT6694_CANFD_SETTING_ACTIVE_CTRL2 |</div><div class='add'>+			  NCT6694_CANFD_SETTING_ACTIVE_NBTP_DBTP;</div><div class='add'>+</div><div class='add'>+	ret = nct6694_write_msg(priv-&gt;nct6694, &amp;cmd_hd, setting);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct nct6694_canfd_setting *setting __free(kfree) = NULL;</div><div class='add'>+	const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_SETTING,</div><div class='add'>+		.sel = ndev-&gt;dev_port,</div><div class='add'>+		.len = cpu_to_le16(sizeof(*setting))</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* The NCT6694 cannot be stopped. To ensure safe operation and avoid</div><div class='add'>+	 * interference, the control mode is set to Listen-Only mode. This</div><div class='add'>+	 * mode allows the device to monitor bus activity without actively</div><div class='add'>+	 * participating in communication.</div><div class='add'>+	 */</div><div class='add'>+	setting = kzalloc(sizeof(*setting), GFP_KERNEL);</div><div class='add'>+	if (!setting)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	nct6694_read_msg(priv-&gt;nct6694, &amp;cmd_hd, setting);</div><div class='add'>+	setting-&gt;ctrl1 = cpu_to_le16(NCT6694_CANFD_SETTING_CTRL1_MON);</div><div class='add'>+	setting-&gt;active = NCT6694_CANFD_SETTING_ACTIVE_CTRL1;</div><div class='add'>+	nct6694_write_msg(priv-&gt;nct6694, &amp;cmd_hd, setting);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_close(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	nct6694_canfd_stop(ndev);</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+	free_irq(ndev-&gt;irq, ndev);</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		ret = nct6694_canfd_start(ndev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = open_candev(ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	can_rx_offload_enable(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	ret = request_threaded_irq(ndev-&gt;irq, NULL,</div><div class='add'>+				   nct6694_canfd_irq, IRQF_ONESHOT,</div><div class='add'>+				   "nct6694_canfd", ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "Failed to request IRQ\n");</div><div class='add'>+		goto can_rx_offload_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;wq = alloc_ordered_workqueue("%s-nct6694_wq",</div><div class='add'>+					   WQ_FREEZABLE | WQ_MEM_RECLAIM,</div><div class='add'>+					   ndev-&gt;name);</div><div class='add'>+	if (!priv-&gt;wq) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto free_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = nct6694_canfd_start(ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto destroy_wq;</div><div class='add'>+</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy_wq:</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+free_irq:</div><div class='add'>+	free_irq(ndev-&gt;irq, ndev);</div><div class='add'>+can_rx_offload_disable:</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops nct6694_canfd_netdev_ops = {</div><div class='add'>+	.ndo_open = nct6694_canfd_open,</div><div class='add'>+	.ndo_stop = nct6694_canfd_close,</div><div class='add'>+	.ndo_start_xmit = nct6694_canfd_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops nct6694_canfd_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_get_clock(struct nct6694_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_information *info __free(kfree) = NULL;</div><div class='add'>+	static const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_INFORMATION,</div><div class='add'>+		.sel = NCT6694_CANFD_INFORMATION_SEL,</div><div class='add'>+		.len = cpu_to_le16(sizeof(*info))</div><div class='add'>+	};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	info = kzalloc(sizeof(*info), GFP_KERNEL);</div><div class='add'>+	if (!info)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = nct6694_read_msg(priv-&gt;nct6694, &amp;cmd_hd, info);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return le32_to_cpu(info-&gt;can_clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694 *nct6694 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct nct6694_canfd_priv *priv;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	int port, irq, ret, can_clk;</div><div class='add'>+</div><div class='add'>+	port = ida_alloc(&amp;nct6694-&gt;canfd_ida, GFP_KERNEL);</div><div class='add'>+	if (port &lt; 0)</div><div class='add'>+		return port;</div><div class='add'>+</div><div class='add'>+	irq = irq_create_mapping(nct6694-&gt;domain,</div><div class='add'>+				 NCT6694_IRQ_CAN0 + port);</div><div class='add'>+	if (!irq) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto free_ida;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ndev = alloc_candev(sizeof(struct nct6694_canfd_priv), 1);</div><div class='add'>+	if (!ndev) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto dispose_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ndev-&gt;irq = irq;</div><div class='add'>+	ndev-&gt;flags |= IFF_ECHO;</div><div class='add'>+	ndev-&gt;dev_port = port;</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;nct6694_canfd_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;nct6694_canfd_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+	priv-&gt;nct6694 = nct6694;</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+</div><div class='add'>+	can_clk = nct6694_canfd_get_clock(priv);</div><div class='add'>+	if (can_clk &lt; 0) {</div><div class='add'>+		ret = dev_err_probe(&amp;pdev-&gt;dev, can_clk,</div><div class='add'>+				    "Failed to get clock\n");</div><div class='add'>+		goto free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;tx_work, nct6694_canfd_tx_work);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.clock.freq = can_clk;</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;nct6694_canfd_bittiming_nominal_const;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;nct6694_canfd_bittiming_data_const;</div><div class='add'>+	priv-&gt;can.do_set_mode = nct6694_canfd_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = nct6694_canfd_get_berr_counter;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+		CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_BERR_REPORTING |</div><div class='add'>+		CAN_CTRLMODE_FD_NON_ISO;</div><div class='add'>+</div><div class='add'>+	ret = can_set_static_ctrlmode(ndev, CAN_CTRLMODE_FD);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_candev;</div><div class='add'>+</div><div class='add'>+	ret = can_rx_offload_add_manual(ndev, &amp;priv-&gt;offload,</div><div class='add'>+					NCT6694_NAPI_WEIGHT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;pdev-&gt;dev, ret, "Failed to add rx_offload\n");</div><div class='add'>+		goto free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, priv);</div><div class='add'>+	SET_NETDEV_DEV(priv-&gt;ndev, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	ret = register_candev(priv-&gt;ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto rx_offload_del;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+rx_offload_del:</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+free_candev:</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+dispose_irq:</div><div class='add'>+	irq_dispose_mapping(irq);</div><div class='add'>+free_ida:</div><div class='add'>+	ida_free(&amp;nct6694-&gt;canfd_ida, port);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+	struct nct6694 *nct6694 = priv-&gt;nct6694;</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	int port = ndev-&gt;dev_port;</div><div class='add'>+	int irq = ndev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	unregister_candev(ndev);</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+	irq_dispose_mapping(irq);</div><div class='add'>+	ida_free(&amp;nct6694-&gt;canfd_ida, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver nct6694_canfd_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= DEVICE_NAME,</div><div class='add'>+	},</div><div class='add'>+	.probe		= nct6694_canfd_probe,</div><div class='add'>+	.remove		= nct6694_canfd_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(nct6694_canfd_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("USB-CAN FD driver for NCT6694");</div><div class='add'>+MODULE_AUTHOR("Ming Yu &lt;tmyu0@nuvoton.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb.c b/drivers/net/can/usb/peak_usb/pcan_usb.c<br/>index c75df1755b3b..9278a1522aae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb.c</a></div><div class='hunk'>@@ -3,8 +3,8 @@</div><div class='ctx'>  * CAN driver for PEAK System PCAN-USB adapter</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_usb.c</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2010 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2011-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Many thanks to Klaus Hitschler &lt;klaus.hitschler@gmx.de&gt;</div><div class='ctx'>  */</div><div class='hunk'>@@ -319,7 +319,7 @@ static int pcan_usb_write_mode(struct peak_usb_device *dev, u8 onoff)</div><div class='ctx'>  */</div><div class='ctx'> static void pcan_usb_restart(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct pcan_usb *pdev = from_timer(pdev, t, restart_timer);</div><div class='add'>+	struct pcan_usb *pdev = timer_container_of(pdev, t, restart_timer);</div><div class='ctx'> 	struct peak_usb_device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	/* notify candev and netdev */</div><div class='hunk'>@@ -919,7 +919,7 @@ static int pcan_usb_init(struct peak_usb_device *dev)</div><div class='ctx'> 					    CAN_CTRLMODE_LOOPBACK;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev_info(dev-&gt;netdev-&gt;dev.parent,</div><div class='del'>-			 "Firmware update available. Please contact support@peak-system.com\n");</div><div class='add'>+			 "Firmware update available. Please contact support.peak@hms-networks.com\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_core.c b/drivers/net/can/usb/peak_usb/pcan_usb_core.c<br/>index 59f7cd8ceb39..cf48bb26d46d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb_core.c</a></div><div class='hunk'>@@ -3,8 +3,8 @@</div><div class='ctx'>  * CAN driver for PEAK System USB adapters</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_usb_core.c</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2010 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2010-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Many thanks to Klaus Hitschler &lt;klaus.hitschler@gmx.de&gt;</div><div class='ctx'>  */</div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "pcan_usb_core.h"</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("CAN driver for PEAK-System USB adapters");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='hunk'>@@ -111,7 +111,7 @@ void peak_usb_update_ts_now(struct peak_time_ref *time_ref, u32 ts_now)</div><div class='ctx'> 		u32 delta_ts = time_ref-&gt;ts_dev_2 - time_ref-&gt;ts_dev_1;</div><div class='ctx'> </div><div class='ctx'> 		if (time_ref-&gt;ts_dev_2 &lt; time_ref-&gt;ts_dev_1)</div><div class='del'>-			delta_ts &amp;= (1 &lt;&lt; time_ref-&gt;adapter-&gt;ts_used_bits) - 1;</div><div class='add'>+			delta_ts &amp;= (1ULL &lt;&lt; time_ref-&gt;adapter-&gt;ts_used_bits) - 1;</div><div class='ctx'> </div><div class='ctx'> 		time_ref-&gt;ts_total += delta_ts;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -770,7 +770,7 @@ static int peak_usb_set_data_bittiming(struct net_device *netdev)</div><div class='ctx'> 	const struct peak_usb_adapter *pa = dev-&gt;adapter;</div><div class='ctx'> </div><div class='ctx'> 	if (pa-&gt;dev_set_data_bittiming) {</div><div class='del'>-		struct can_bittiming *bt = &amp;dev-&gt;can.data_bittiming;</div><div class='add'>+		struct can_bittiming *bt = &amp;dev-&gt;can.fd.data_bittiming;</div><div class='ctx'> 		int err = pa-&gt;dev_set_data_bittiming(dev, bt);</div><div class='ctx'> </div><div class='ctx'> 		if (err)</div><div class='hunk'>@@ -784,37 +784,33 @@ static int peak_usb_set_data_bittiming(struct net_device *netdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int peak_eth_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='add'>+static int peak_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config hwts_cfg = { 0 };</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP: /* set */</div><div class='del'>-		if (copy_from_user(&amp;hwts_cfg, ifr-&gt;ifr_data, sizeof(hwts_cfg)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		if (hwts_cfg.tx_type == HWTSTAMP_TX_OFF &amp;&amp;</div><div class='del'>-		    hwts_cfg.rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='del'>-			return 0;</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	case SIOCGHWTSTAMP: /* get */</div><div class='del'>-		hwts_cfg.tx_type = HWTSTAMP_TX_OFF;</div><div class='del'>-		hwts_cfg.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-		if (copy_to_user(ifr-&gt;ifr_data, &amp;hwts_cfg, sizeof(hwts_cfg)))</div><div class='del'>-			return -EFAULT;</div><div class='add'>+	config-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+	config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (config-&gt;tx_type == HWTSTAMP_TX_OFF &amp;&amp;</div><div class='add'>+	    config-&gt;rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Only RX HWTSTAMP_FILTER_ALL is supported");</div><div class='add'>+	return -ERANGE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops peak_usb_netdev_ops = {</div><div class='ctx'> 	.ndo_open = peak_usb_ndo_open,</div><div class='ctx'> 	.ndo_stop = peak_usb_ndo_stop,</div><div class='del'>-	.ndo_eth_ioctl = peak_eth_ioctl,</div><div class='ctx'> 	.ndo_start_xmit = peak_usb_ndo_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+	.ndo_hwtstamp_get = peak_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = peak_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* CAN-USB devices generally handle 32-bit CAN channel IDs.</div><div class='hunk'>@@ -954,8 +950,8 @@ static int peak_usb_create_dev(const struct peak_usb_adapter *peak_usb_adapter,</div><div class='ctx'> 	dev-&gt;can.clock = peak_usb_adapter-&gt;clock;</div><div class='ctx'> 	dev-&gt;can.bittiming_const = peak_usb_adapter-&gt;bittiming_const;</div><div class='ctx'> 	dev-&gt;can.do_set_bittiming = peak_usb_set_bittiming;</div><div class='del'>-	dev-&gt;can.data_bittiming_const = peak_usb_adapter-&gt;data_bittiming_const;</div><div class='del'>-	dev-&gt;can.do_set_data_bittiming = peak_usb_set_data_bittiming;</div><div class='add'>+	dev-&gt;can.fd.data_bittiming_const = peak_usb_adapter-&gt;data_bittiming_const;</div><div class='add'>+	dev-&gt;can.fd.do_set_data_bittiming = peak_usb_set_data_bittiming;</div><div class='ctx'> 	dev-&gt;can.do_set_mode = peak_usb_set_mode;</div><div class='ctx'> 	dev-&gt;can.do_get_berr_counter = peak_usb_adapter-&gt;do_get_berr_counter;</div><div class='ctx'> 	dev-&gt;can.ctrlmode_supported = peak_usb_adapter-&gt;ctrlmode_supported;</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_core.h b/drivers/net/can/usb/peak_usb/pcan_usb_core.h<br/>index abab00930b9d..d1c1897d47b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_core.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb_core.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb_core.h</a></div><div class='hunk'>@@ -3,8 +3,8 @@</div><div class='ctx'>  * CAN driver for PEAK System USB adapters</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_usb_core.c</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2010 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2010-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Many thanks to Klaus Hitschler &lt;klaus.hitschler@gmx.de&gt;</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c<br/>index 4d85b29a17b7..be84191cde56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_fd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb_fd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_fd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb_fd.c</a></div><div class='hunk'>@@ -2,7 +2,8 @@</div><div class='ctx'> /*</div><div class='ctx'>  * CAN driver for PEAK System PCAN-USB FD / PCAN-USB Pro FD adapter</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2013-2014 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+ * Copyright (C) 2013-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -49,7 +50,7 @@ struct __packed pcan_ufd_fw_info {</div><div class='ctx'> 	__le32	ser_no;		/* S/N */</div><div class='ctx'> 	__le32	flags;		/* special functions */</div><div class='ctx'> </div><div class='del'>-	/* extended data when type == PCAN_USBFD_TYPE_EXT */</div><div class='add'>+	/* extended data when type &gt;= PCAN_USBFD_TYPE_EXT */</div><div class='ctx'> 	u8	cmd_out_ep;	/* ep for cmd */</div><div class='ctx'> 	u8	cmd_in_ep;	/* ep for replies */</div><div class='ctx'> 	u8	data_out_ep[2];	/* ep for CANx TX */</div><div class='hunk'>@@ -982,10 +983,11 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)</div><div class='ctx'> 			dev-&gt;can.ctrlmode |= CAN_CTRLMODE_FD_NON_ISO;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* if vendor rsp is of type 2, then it contains EP numbers to</div><div class='del'>-		 * use for cmds pipes. If not, then default EP should be used.</div><div class='add'>+		/* if vendor rsp type is greater than or equal to 2, then it</div><div class='add'>+		 * contains EP numbers to use for cmds pipes. If not, then</div><div class='add'>+		 * default EP should be used.</div><div class='ctx'> 		 */</div><div class='del'>-		if (fw_info-&gt;type != cpu_to_le16(PCAN_USBFD_TYPE_EXT)) {</div><div class='add'>+		if (le16_to_cpu(fw_info-&gt;type) &lt; PCAN_USBFD_TYPE_EXT) {</div><div class='ctx'> 			fw_info-&gt;cmd_out_ep = PCAN_USBPRO_EP_CMDOUT;</div><div class='ctx'> 			fw_info-&gt;cmd_in_ep = PCAN_USBPRO_EP_CMDIN;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1018,11 +1020,11 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)</div><div class='ctx'> 	dev-&gt;can_channel_id =</div><div class='ctx'> 		le32_to_cpu(pdev-&gt;usb_if-&gt;fw_info.dev_id[dev-&gt;ctrl_idx]);</div><div class='ctx'> </div><div class='del'>-	/* if vendor rsp is of type 2, then it contains EP numbers to</div><div class='del'>-	 * use for data pipes. If not, then statically defined EP are used</div><div class='del'>-	 * (see peak_usb_create_dev()).</div><div class='add'>+	/* if vendor rsp type is greater than or equal to 2, then it contains EP</div><div class='add'>+	 * numbers to use for data pipes. If not, then statically defined EP are</div><div class='add'>+	 * used (see peak_usb_create_dev()).</div><div class='ctx'> 	 */</div><div class='del'>-	if (fw_info-&gt;type == cpu_to_le16(PCAN_USBFD_TYPE_EXT)) {</div><div class='add'>+	if (le16_to_cpu(fw_info-&gt;type) &gt;= PCAN_USBFD_TYPE_EXT) {</div><div class='ctx'> 		dev-&gt;ep_msg_in = fw_info-&gt;data_in_ep;</div><div class='ctx'> 		dev-&gt;ep_msg_out = fw_info-&gt;data_out_ep[dev-&gt;ctrl_idx];</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_pro.c b/drivers/net/can/usb/peak_usb/pcan_usb_pro.c<br/>index f736196383ac..7be286293b1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_pro.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb_pro.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_pro.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb_pro.c</a></div><div class='hunk'>@@ -3,8 +3,8 @@</div><div class='ctx'>  * CAN driver for PEAK System PCAN-USB Pro adapter</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_usbpro.c</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2011 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2011-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_pro.h b/drivers/net/can/usb/peak_usb/pcan_usb_pro.h<br/>index 28e740af905d..162c7546d3a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_pro.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/peak_usb/pcan_usb_pro.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_pro.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb_pro.h</a></div><div class='hunk'>@@ -3,8 +3,8 @@</div><div class='ctx'>  * CAN driver for PEAK System PCAN-USB Pro adapter</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_usbpro_fw.h</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2011 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2011-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #ifndef PCAN_USB_PRO_H</div><div class='ctx'> #define PCAN_USB_PRO_H</div><div class='head'>diff --git a/drivers/net/can/usb/ucan.c b/drivers/net/can/usb/ucan.c<br/>index 39a63b7313a4..de61d9da99e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/ucan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/ucan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/ucan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/ucan.c</a></div><div class='hunk'>@@ -186,7 +186,7 @@ union ucan_ctl_payload {</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct ucan_ctl_cmd_get_protocol_version cmd_get_protocol_version;</div><div class='ctx'> </div><div class='del'>-	u8 raw[128];</div><div class='add'>+	u8 fw_str[128];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -424,18 +424,20 @@ static int ucan_ctrl_command_out(struct ucan_priv *up,</div><div class='ctx'> 			       UCAN_USB_CTL_PIPE_TIMEOUT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ucan_device_request_in(struct ucan_priv *up,</div><div class='del'>-				  u8 cmd, u16 subcmd, u16 datalen)</div><div class='add'>+static void ucan_get_fw_str(struct ucan_priv *up, char *fw_str, size_t size)</div><div class='ctx'> {</div><div class='del'>-	return usb_control_msg(up-&gt;udev,</div><div class='del'>-			       usb_rcvctrlpipe(up-&gt;udev, 0),</div><div class='del'>-			       cmd,</div><div class='del'>-			       USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,</div><div class='del'>-			       subcmd,</div><div class='del'>-			       0,</div><div class='del'>-			       up-&gt;ctl_msg_buffer,</div><div class='del'>-			       datalen,</div><div class='del'>-			       UCAN_USB_CTL_PIPE_TIMEOUT);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = usb_control_msg(up-&gt;udev, usb_rcvctrlpipe(up-&gt;udev, 0),</div><div class='add'>+			      UCAN_DEVICE_GET_FW_STRING,</div><div class='add'>+			      USB_DIR_IN | USB_TYPE_VENDOR |</div><div class='add'>+			      USB_RECIP_DEVICE,</div><div class='add'>+			      0, 0, fw_str, size - 1,</div><div class='add'>+			      UCAN_USB_CTL_PIPE_TIMEOUT);</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		fw_str[ret] = '\0';</div><div class='add'>+	else</div><div class='add'>+		strscpy(fw_str, "unknown", size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Parse the device information structure reported by the device and</div><div class='hunk'>@@ -1231,7 +1233,6 @@ static const struct net_device_ops ucan_netdev_ops = {</div><div class='ctx'> 	.ndo_open = ucan_open,</div><div class='ctx'> 	.ndo_stop = ucan_close,</div><div class='ctx'> 	.ndo_start_xmit = ucan_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ucan_ethtool_ops = {</div><div class='hunk'>@@ -1314,7 +1315,6 @@ static int ucan_probe(struct usb_interface *intf,</div><div class='ctx'> 	u8 in_ep_addr;</div><div class='ctx'> 	u8 out_ep_addr;</div><div class='ctx'> 	union ucan_ctl_payload *ctl_msg_buffer;</div><div class='del'>-	char firmware_str[sizeof(union ucan_ctl_payload) + 1];</div><div class='ctx'> </div><div class='ctx'> 	udev = interface_to_usbdev(intf);</div><div class='ctx'> </div><div class='hunk'>@@ -1527,17 +1527,6 @@ static int ucan_probe(struct usb_interface *intf,</div><div class='ctx'> 	 */</div><div class='ctx'> 	ucan_parse_device_info(up, &amp;ctl_msg_buffer-&gt;cmd_get_device_info);</div><div class='ctx'> </div><div class='del'>-	/* just print some device information - if available */</div><div class='del'>-	ret = ucan_device_request_in(up, UCAN_DEVICE_GET_FW_STRING, 0,</div><div class='del'>-				     sizeof(union ucan_ctl_payload));</div><div class='del'>-	if (ret &gt; 0) {</div><div class='del'>-		/* copy string while ensuring zero termination */</div><div class='del'>-		strscpy(firmware_str, up-&gt;ctl_msg_buffer-&gt;raw,</div><div class='del'>-			sizeof(union ucan_ctl_payload) + 1);</div><div class='del'>-	} else {</div><div class='del'>-		strcpy(firmware_str, "unknown");</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* device is compatible, reset it */</div><div class='ctx'> 	ret = ucan_ctrl_command_out(up, UCAN_COMMAND_RESET, 0, 0);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -1555,7 +1544,10 @@ static int ucan_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	/* initialisation complete, log device info */</div><div class='ctx'> 	netdev_info(up-&gt;netdev, "registered device\n");</div><div class='del'>-	netdev_info(up-&gt;netdev, "firmware string: %s\n", firmware_str);</div><div class='add'>+	ucan_get_fw_str(up, up-&gt;ctl_msg_buffer-&gt;fw_str,</div><div class='add'>+			sizeof(up-&gt;ctl_msg_buffer-&gt;fw_str));</div><div class='add'>+	netdev_info(up-&gt;netdev, "firmware string: %s\n",</div><div class='add'>+		    up-&gt;ctl_msg_buffer-&gt;fw_str);</div><div class='ctx'> </div><div class='ctx'> 	/* success */</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/can/usb/usb_8dev.c b/drivers/net/can/usb/usb_8dev.c<br/>index 8a5596ce4e46..7449328f7cd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/usb_8dev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/usb/usb_8dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/usb_8dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/usb_8dev.c</a></div><div class='hunk'>@@ -868,7 +868,6 @@ static const struct net_device_ops usb_8dev_netdev_ops = {</div><div class='ctx'> 	.ndo_open = usb_8dev_open,</div><div class='ctx'> 	.ndo_stop = usb_8dev_close,</div><div class='ctx'> 	.ndo_start_xmit = usb_8dev_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops usb_8dev_ethtool_ops = {</div><div class='head'>diff --git a/drivers/net/can/vcan.c b/drivers/net/can/vcan.c<br/>index f67e85807100..fdc662aea279 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/vcan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/vcan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/vcan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/vcan.c</a></div><div class='hunk'>@@ -156,7 +156,7 @@ static const struct ethtool_ops vcan_ethtool_ops = {</div><div class='ctx'> static void vcan_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	dev-&gt;type		= ARPHRD_CAN;</div><div class='del'>-	dev-&gt;mtu		= CANFD_MTU;</div><div class='add'>+	dev-&gt;mtu		= CANXL_MTU;</div><div class='ctx'> 	dev-&gt;hard_header_len	= 0;</div><div class='ctx'> 	dev-&gt;addr_len		= 0;</div><div class='ctx'> 	dev-&gt;tx_queue_len	= 0;</div><div class='head'>diff --git a/drivers/net/can/vxcan.c b/drivers/net/can/vxcan.c<br/>index 9e1b7d41005f..b2c19f8c5f8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/vxcan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/vxcan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/vxcan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/vxcan.c</a></div><div class='hunk'>@@ -156,7 +156,7 @@ static void vxcan_setup(struct net_device *dev)</div><div class='ctx'> 	struct can_ml_priv *can_ml;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;type		= ARPHRD_CAN;</div><div class='del'>-	dev-&gt;mtu		= CANFD_MTU;</div><div class='add'>+	dev-&gt;mtu		= CANXL_MTU;</div><div class='ctx'> 	dev-&gt;hard_header_len	= 0;</div><div class='ctx'> 	dev-&gt;addr_len		= 0;</div><div class='ctx'> 	dev-&gt;tx_queue_len	= 0;</div><div class='hunk'>@@ -172,13 +172,15 @@ static void vxcan_setup(struct net_device *dev)</div><div class='ctx'> /* forward declaration for rtnl_create_link() */</div><div class='ctx'> static struct rtnl_link_ops vxcan_link_ops;</div><div class='ctx'> </div><div class='del'>-static int vxcan_newlink(struct net *net, struct net_device *dev,</div><div class='del'>-			 struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int vxcan_newlink(struct net_device *dev,</div><div class='add'>+			 struct rtnl_newlink_params *params,</div><div class='ctx'> 			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *peer_net = rtnl_newlink_peer_net(params);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	struct vxcan_priv *priv;</div><div class='ctx'> 	struct net_device *peer;</div><div class='del'>-	struct net *peer_net;</div><div class='ctx'> </div><div class='ctx'> 	struct nlattr *peer_tb[IFLA_MAX + 1], **tbp = tb;</div><div class='ctx'> 	char ifname[IFNAMSIZ];</div><div class='hunk'>@@ -188,14 +190,10 @@ static int vxcan_newlink(struct net *net, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	/* register peer device */</div><div class='ctx'> 	if (data &amp;&amp; data[VXCAN_INFO_PEER]) {</div><div class='del'>-		struct nlattr *nla_peer;</div><div class='add'>+		struct nlattr *nla_peer = data[VXCAN_INFO_PEER];</div><div class='ctx'> </div><div class='del'>-		nla_peer = data[VXCAN_INFO_PEER];</div><div class='ctx'> 		ifmp = nla_data(nla_peer);</div><div class='del'>-		err = rtnl_nla_parse_ifinfomsg(peer_tb, nla_peer, extack);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='add'>+		rtnl_nla_parse_ifinfomsg(peer_tb, nla_peer, extack);</div><div class='ctx'> 		tbp = peer_tb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -207,23 +205,15 @@ static int vxcan_newlink(struct net *net, struct net_device *dev,</div><div class='ctx'> 		name_assign_type = NET_NAME_ENUM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	peer_net = rtnl_link_get_net(net, tbp);</div><div class='del'>-	if (IS_ERR(peer_net))</div><div class='del'>-		return PTR_ERR(peer_net);</div><div class='del'>-</div><div class='ctx'> 	peer = rtnl_create_link(peer_net, ifname, name_assign_type,</div><div class='ctx'> 				&amp;vxcan_link_ops, tbp, extack);</div><div class='del'>-	if (IS_ERR(peer)) {</div><div class='del'>-		put_net(peer_net);</div><div class='add'>+	if (IS_ERR(peer))</div><div class='ctx'> 		return PTR_ERR(peer);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (ifmp &amp;&amp; dev-&gt;ifindex)</div><div class='ctx'> 		peer-&gt;ifindex = ifmp-&gt;ifi_index;</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdevice(peer);</div><div class='del'>-	put_net(peer_net);</div><div class='del'>-	peer_net = NULL;</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		free_netdev(peer);</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -302,6 +292,7 @@ static struct rtnl_link_ops vxcan_link_ops = {</div><div class='ctx'> 	.newlink	= vxcan_newlink,</div><div class='ctx'> 	.dellink	= vxcan_dellink,</div><div class='ctx'> 	.policy		= vxcan_policy,</div><div class='add'>+	.peer_type	= VXCAN_INFO_PEER,</div><div class='ctx'> 	.maxtype	= VXCAN_INFO_MAX,</div><div class='ctx'> 	.get_link_net	= vxcan_get_link_net,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c<br/>index 436c0e4b0344..43d7f22820b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/xilinx_can.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/can/xilinx_can.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/xilinx_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/xilinx_can.c</a></div><div class='hunk'>@@ -481,7 +481,7 @@ static int xcan_set_bittiming(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	u32 btr0, btr1;</div><div class='ctx'> 	u32 is_config_mode;</div><div class='ctx'> </div><div class='hunk'>@@ -515,12 +515,12 @@ static int xcan_set_bittiming(struct net_device *ndev)</div><div class='ctx'> 	    priv-&gt;devtype.cantype == XAXI_CANFD_2_0) {</div><div class='ctx'> 		/* Setting Baud Rate prescaler value in F_BRPR Register */</div><div class='ctx'> 		btr0 = dbt-&gt;brp - 1;</div><div class='del'>-		if (can_tdc_is_enabled(&amp;priv-&gt;can)) {</div><div class='add'>+		if (can_fd_tdc_is_enabled(&amp;priv-&gt;can)) {</div><div class='ctx'> 			if (priv-&gt;devtype.cantype == XAXI_CANFD)</div><div class='del'>-				btr0 |= FIELD_PREP(XCAN_BRPR_TDCO_MASK, priv-&gt;can.tdc.tdco) |</div><div class='add'>+				btr0 |= FIELD_PREP(XCAN_BRPR_TDCO_MASK, priv-&gt;can.fd.tdc.tdco) |</div><div class='ctx'> 					XCAN_BRPR_TDC_ENABLE;</div><div class='ctx'> 			else</div><div class='del'>-				btr0 |= FIELD_PREP(XCAN_2_BRPR_TDCO_MASK, priv-&gt;can.tdc.tdco) |</div><div class='add'>+				btr0 |= FIELD_PREP(XCAN_2_BRPR_TDCO_MASK, priv-&gt;can.fd.tdc.tdco) |</div><div class='ctx'> 					XCAN_BRPR_TDC_ENABLE;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -690,14 +690,6 @@ static void xcan_write_frame(struct net_device *ndev, struct sk_buff *skb,</div><div class='ctx'> 		dlc |= XCAN_DLCR_EDL_MASK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!(priv-&gt;devtype.flags &amp; XCAN_FLAG_TX_MAILBOXES) &amp;&amp;</div><div class='del'>-	    (priv-&gt;devtype.flags &amp; XCAN_FLAG_TXFEMP))</div><div class='del'>-		can_put_echo_skb(skb, ndev, priv-&gt;tx_head % priv-&gt;tx_max, 0);</div><div class='del'>-	else</div><div class='del'>-		can_put_echo_skb(skb, ndev, 0, 0);</div><div class='del'>-</div><div class='del'>-	priv-&gt;tx_head++;</div><div class='del'>-</div><div class='ctx'> 	priv-&gt;write_reg(priv, XCAN_FRAME_ID_OFFSET(frame_offset), id);</div><div class='ctx'> 	/* If the CAN frame is RTR frame this write triggers transmission</div><div class='ctx'> 	 * (not on CAN FD)</div><div class='hunk'>@@ -730,6 +722,14 @@ static void xcan_write_frame(struct net_device *ndev, struct sk_buff *skb,</div><div class='ctx'> 					data[1]);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;devtype.flags &amp; XCAN_FLAG_TX_MAILBOXES) &amp;&amp;</div><div class='add'>+	    (priv-&gt;devtype.flags &amp; XCAN_FLAG_TXFEMP))</div><div class='add'>+		can_put_echo_skb(skb, ndev, priv-&gt;tx_head % priv-&gt;tx_max, 0);</div><div class='add'>+	else</div><div class='add'>+		can_put_echo_skb(skb, ndev, 0, 0);</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_head++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1702,7 +1702,6 @@ static const struct net_device_ops xcan_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= xcan_open,</div><div class='ctx'> 	.ndo_stop	= xcan_close,</div><div class='ctx'> 	.ndo_start_xmit	= xcan_start_xmit,</div><div class='del'>-	.ndo_change_mtu	= can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops xcan_ethtool_ops = {</div><div class='hunk'>@@ -1967,22 +1966,22 @@ static int xcan_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_free;</div><div class='ctx'> </div><div class='ctx'> 	if (devtype-&gt;cantype == XAXI_CANFD) {</div><div class='del'>-		priv-&gt;can.data_bittiming_const =</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const =</div><div class='ctx'> 			&amp;xcan_data_bittiming_const_canfd;</div><div class='del'>-		priv-&gt;can.tdc_const = &amp;xcan_tdc_const_canfd;</div><div class='add'>+		priv-&gt;can.fd.tdc_const = &amp;xcan_tdc_const_canfd;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (devtype-&gt;cantype == XAXI_CANFD_2_0) {</div><div class='del'>-		priv-&gt;can.data_bittiming_const =</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const =</div><div class='ctx'> 			&amp;xcan_data_bittiming_const_canfd2;</div><div class='del'>-		priv-&gt;can.tdc_const = &amp;xcan_tdc_const_canfd2;</div><div class='add'>+		priv-&gt;can.fd.tdc_const = &amp;xcan_tdc_const_canfd2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (devtype-&gt;cantype == XAXI_CANFD ||</div><div class='ctx'> 	    devtype-&gt;cantype == XAXI_CANFD_2_0) {</div><div class='ctx'> 		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD |</div><div class='ctx'> 						CAN_CTRLMODE_TDC_AUTO;</div><div class='del'>-		priv-&gt;can.do_get_auto_tdcv = xcan_get_auto_tdcv;</div><div class='add'>+		priv-&gt;can.fd.do_get_auto_tdcv = xcan_get_auto_tdcv;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;reg_base = addr;</div><div class='head'>diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig<br/>index 2d10b4d6cfbb..7eb301fd987d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/Kconfig</a></div><div class='hunk'>@@ -26,17 +26,12 @@ config NET_DSA_LOOP</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/dsa/hirschmann/Kconfig"</div><div class='ctx'> </div><div class='del'>-config NET_DSA_LANTIQ_GSWIP</div><div class='del'>-	tristate "Lantiq / Intel GSWIP"</div><div class='del'>-	depends on HAS_IOMEM</div><div class='del'>-	select NET_DSA_TAG_GSWIP</div><div class='del'>-	help</div><div class='del'>-	  This enables support for the Lantiq / Intel GSWIP 2.1 found in</div><div class='del'>-	  the xrx200 / VR9 SoC.</div><div class='add'>+source "drivers/net/dsa/lantiq/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config NET_DSA_MT7530</div><div class='ctx'> 	tristate "MediaTek MT7530 and MT7531 Ethernet switch support"</div><div class='ctx'> 	select NET_DSA_TAG_MTK</div><div class='add'>+	select REGMAP_IRQ</div><div class='ctx'> 	imply NET_DSA_MT7530_MDIO</div><div class='ctx'> 	imply NET_DSA_MT7530_MMIO</div><div class='ctx'> 	help</div><div class='hunk'>@@ -91,13 +86,21 @@ source "drivers/net/dsa/realtek/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config NET_DSA_RZN1_A5PSW</div><div class='ctx'> 	tristate "Renesas RZ/N1 A5PSW Ethernet switch support"</div><div class='del'>-	depends on OF &amp;&amp; ARCH_RZN1</div><div class='add'>+	depends on OF &amp;&amp; (ARCH_RZN1 || COMPILE_TEST)</div><div class='ctx'> 	select NET_DSA_TAG_RZN1_A5PSW</div><div class='ctx'> 	select PCS_RZN1_MIIC</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the A5PSW switch, which is embedded in Renesas</div><div class='ctx'> 	  RZ/N1 SoC.</div><div class='ctx'> </div><div class='add'>+config NET_DSA_KS8995</div><div class='add'>+	tristate "Micrel KS8995 family 5-ports 10/100 Ethernet switches"</div><div class='add'>+	depends on SPI</div><div class='add'>+	select NET_DSA_TAG_NONE</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the Micrel KS8995 family of 10/100 Mbit ethernet</div><div class='add'>+	  switches, managed over SPI.</div><div class='add'>+</div><div class='ctx'> config NET_DSA_SMSC_LAN9303</div><div class='ctx'> 	tristate</div><div class='ctx'> 	select NET_DSA_TAG_LAN9303</div><div class='hunk'>@@ -151,4 +154,11 @@ config NET_DSA_VITESSE_VSC73XX_PLATFORM</div><div class='ctx'> 	  This enables support for the Vitesse VSC7385, VSC7388, VSC7395</div><div class='ctx'> 	  and VSC7398 SparX integrated ethernet switches, connected over</div><div class='ctx'> 	  a CPU-attached address bus and work in memory-mapped I/O mode.</div><div class='add'>+</div><div class='add'>+config NET_DSA_YT921X</div><div class='add'>+	tristate "Motorcomm YT9215 ethernet switch chip support"</div><div class='add'>+	select NET_DSA_TAG_YT921X</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Motorcomm YT9215 ethernet switch</div><div class='add'>+	  chip.</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/net/dsa/Makefile b/drivers/net/dsa/Makefile<br/>index cb9a97340e58..16de4ba3fa38 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/Makefile</a></div><div class='hunk'>@@ -2,10 +2,7 @@</div><div class='ctx'> obj-$(CONFIG_NET_DSA_BCM_SF2)	+= bcm-sf2.o</div><div class='ctx'> bcm-sf2-objs			:= bcm_sf2.o bcm_sf2_cfp.o</div><div class='ctx'> obj-$(CONFIG_NET_DSA_LOOP)	+= dsa_loop.o</div><div class='del'>-ifdef CONFIG_NET_DSA_LOOP</div><div class='del'>-obj-$(CONFIG_FIXED_PHY)		+= dsa_loop_bdinfo.o</div><div class='del'>-endif</div><div class='del'>-obj-$(CONFIG_NET_DSA_LANTIQ_GSWIP) += lantiq_gswip.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_KS8995) 	+= ks8995.o</div><div class='ctx'> obj-$(CONFIG_NET_DSA_MT7530)	+= mt7530.o</div><div class='ctx'> obj-$(CONFIG_NET_DSA_MT7530_MDIO) += mt7530-mdio.o</div><div class='ctx'> obj-$(CONFIG_NET_DSA_MT7530_MMIO) += mt7530-mmio.o</div><div class='hunk'>@@ -17,8 +14,10 @@ obj-$(CONFIG_NET_DSA_SMSC_LAN9303_MDIO) += lan9303_mdio.o</div><div class='ctx'> obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX) += vitesse-vsc73xx-core.o</div><div class='ctx'> obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM) += vitesse-vsc73xx-platform.o</div><div class='ctx'> obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX_SPI) += vitesse-vsc73xx-spi.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_YT921X) += yt921x.o</div><div class='ctx'> obj-y				+= b53/</div><div class='ctx'> obj-y				+= hirschmann/</div><div class='add'>+obj-y				+= lantiq/</div><div class='ctx'> obj-y				+= microchip/</div><div class='ctx'> obj-y				+= mv88e6xxx/</div><div class='ctx'> obj-y				+= ocelot/</div><div class='head'>diff --git a/drivers/net/dsa/b53/Kconfig b/drivers/net/dsa/b53/Kconfig<br/>index ebaa4a80d544..915008e8eff5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/Kconfig</a></div><div class='hunk'>@@ -5,6 +5,7 @@ menuconfig B53</div><div class='ctx'> 	select NET_DSA_TAG_NONE</div><div class='ctx'> 	select NET_DSA_TAG_BRCM</div><div class='ctx'> 	select NET_DSA_TAG_BRCM_LEGACY</div><div class='add'>+	select NET_DSA_TAG_BRCM_LEGACY_FCS</div><div class='ctx'> 	select NET_DSA_TAG_BRCM_PREPEND</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver adds support for Broadcom managed switch chips. It supports</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_common.c b/drivers/net/dsa/b53/b53_common.c<br/>index 285785c942b0..a1a177713d99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_common.c</a></div><div class='hunk'>@@ -21,6 +21,8 @@</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/math.h&gt;</div><div class='add'>+#include &lt;linux/minmax.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/b53.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='hunk'>@@ -326,6 +328,26 @@ static void b53_get_vlan_entry(struct b53_device *dev, u16 vid,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void b53_set_eap_mode(struct b53_device *dev, int port, int mode)</div><div class='add'>+{</div><div class='add'>+	u64 eap_conf;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev) || dev-&gt;chip_id == BCM5389_DEVICE_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_EAP_PAGE, B53_PORT_EAP_CONF(port), &amp;eap_conf);</div><div class='add'>+</div><div class='add'>+	if (is63xx(dev)) {</div><div class='add'>+		eap_conf &amp;= ~EAP_MODE_MASK_63XX;</div><div class='add'>+		eap_conf |= (u64)mode &lt;&lt; EAP_MODE_SHIFT_63XX;</div><div class='add'>+	} else {</div><div class='add'>+		eap_conf &amp;= ~EAP_MODE_MASK;</div><div class='add'>+		eap_conf |= (u64)mode &lt;&lt; EAP_MODE_SHIFT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_write64(dev, B53_EAP_PAGE, B53_PORT_EAP_CONF(port), eap_conf);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void b53_set_forwarding(struct b53_device *dev, int enable)</div><div class='ctx'> {</div><div class='ctx'> 	u8 mgmt;</div><div class='hunk'>@@ -339,18 +361,23 @@ static void b53_set_forwarding(struct b53_device *dev, int enable)</div><div class='ctx'> </div><div class='ctx'> 	b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);</div><div class='ctx'> </div><div class='del'>-	/* Include IMP port in dumb forwarding mode</div><div class='del'>-	 */</div><div class='del'>-	b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, &amp;mgmt);</div><div class='del'>-	mgmt |= B53_MII_DUMB_FWDG_EN;</div><div class='del'>-	b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, mgmt);</div><div class='add'>+	if (!is5325(dev)) {</div><div class='add'>+		/* Include IMP port in dumb forwarding mode */</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, &amp;mgmt);</div><div class='add'>+		mgmt |= B53_MII_DUMB_FWDG_EN;</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, mgmt);</div><div class='ctx'> </div><div class='del'>-	/* Look at B53_UC_FWD_EN and B53_MC_FWD_EN to decide whether</div><div class='del'>-	 * frames should be flooded or not.</div><div class='del'>-	 */</div><div class='del'>-	b53_read8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, &amp;mgmt);</div><div class='del'>-	mgmt |= B53_UC_FWD_EN | B53_MC_FWD_EN | B53_IPMC_FWD_EN;</div><div class='del'>-	b53_write8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, mgmt);</div><div class='add'>+		/* Look at B53_UC_FWD_EN and B53_MC_FWD_EN to decide whether</div><div class='add'>+		 * frames should be flooded or not.</div><div class='add'>+		 */</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, &amp;mgmt);</div><div class='add'>+		mgmt |= B53_UC_FWD_EN | B53_MC_FWD_EN | B53_IP_MC;</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, mgmt);</div><div class='add'>+	} else {</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, &amp;mgmt);</div><div class='add'>+		mgmt |= B53_IP_MC;</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, mgmt);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void b53_enable_vlan(struct b53_device *dev, int port, bool enable,</div><div class='hunk'>@@ -373,15 +400,17 @@ static void b53_enable_vlan(struct b53_device *dev, int port, bool enable,</div><div class='ctx'> 		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &amp;vc5);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	vc1 &amp;= ~VC1_RX_MCST_FWD_EN;</div><div class='add'>+</div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		vc0 |= VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID;</div><div class='del'>-		vc1 |= VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN;</div><div class='add'>+		vc1 |= VC1_RX_MCST_UNTAG_EN;</div><div class='ctx'> 		vc4 &amp;= ~VC4_ING_VID_CHECK_MASK;</div><div class='ctx'> 		if (enable_filtering) {</div><div class='ctx'> 			vc4 |= VC4_ING_VID_VIO_DROP &lt;&lt; VC4_ING_VID_CHECK_S;</div><div class='ctx'> 			vc5 |= VC5_DROP_VTABLE_MISS;</div><div class='ctx'> 		} else {</div><div class='del'>-			vc4 |= VC4_ING_VID_VIO_FWD &lt;&lt; VC4_ING_VID_CHECK_S;</div><div class='add'>+			vc4 |= VC4_NO_ING_VID_CHK &lt;&lt; VC4_ING_VID_CHECK_S;</div><div class='ctx'> 			vc5 &amp;= ~VC5_DROP_VTABLE_MISS;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -393,7 +422,7 @@ static void b53_enable_vlan(struct b53_device *dev, int port, bool enable,</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='ctx'> 		vc0 &amp;= ~(VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID);</div><div class='del'>-		vc1 &amp;= ~(VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN);</div><div class='add'>+		vc1 &amp;= ~VC1_RX_MCST_UNTAG_EN;</div><div class='ctx'> 		vc4 &amp;= ~VC4_ING_VID_CHECK_MASK;</div><div class='ctx'> 		vc5 &amp;= ~VC5_DROP_VTABLE_MISS;</div><div class='ctx'> </div><div class='hunk'>@@ -463,6 +492,9 @@ static int b53_flush_arl(struct b53_device *dev, u8 mask)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,</div><div class='ctx'> 		   FAST_AGE_DONE | FAST_AGE_DYNAMIC | mask);</div><div class='ctx'> </div><div class='hunk'>@@ -487,6 +519,9 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int b53_fast_age_port(struct b53_device *dev, int port)</div><div class='ctx'> {</div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_PORT_CTRL, port);</div><div class='ctx'> </div><div class='ctx'> 	return b53_flush_arl(dev, FAST_AGE_PORT);</div><div class='hunk'>@@ -494,6 +529,9 @@ static int b53_fast_age_port(struct b53_device *dev, int port)</div><div class='ctx'> </div><div class='ctx'> static int b53_fast_age_vlan(struct b53_device *dev, u16 vid)</div><div class='ctx'> {</div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	b53_write16(dev, B53_CTRL_PAGE, B53_FAST_AGE_VID_CTRL, vid);</div><div class='ctx'> </div><div class='ctx'> 	return b53_flush_arl(dev, FAST_AGE_VLAN);</div><div class='hunk'>@@ -505,6 +543,10 @@ void b53_imp_vlan_setup(struct dsa_switch *ds, int cpu_port)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	u16 pvlan;</div><div class='ctx'> </div><div class='add'>+	/* BCM5325 CPU port is at 8 */</div><div class='add'>+	if ((is5325(dev) || is5365(dev)) &amp;&amp; cpu_port == B53_CPU_PORT_25)</div><div class='add'>+		cpu_port = B53_CPU_PORT;</div><div class='add'>+</div><div class='ctx'> 	/* Enable the IMP port to be in the same VLAN as the other ports</div><div class='ctx'> 	 * on a per-port basis such that we only have Port i and IMP in</div><div class='ctx'> 	 * the same VLAN.</div><div class='hunk'>@@ -522,12 +564,24 @@ static void b53_port_set_ucast_flood(struct b53_device *dev, int port,</div><div class='ctx'> {</div><div class='ctx'> 	u16 uc;</div><div class='ctx'> </div><div class='del'>-	b53_read16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, &amp;uc);</div><div class='del'>-	if (unicast)</div><div class='del'>-		uc |= BIT(port);</div><div class='del'>-	else</div><div class='del'>-		uc &amp;= ~BIT(port);</div><div class='del'>-	b53_write16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, uc);</div><div class='add'>+	if (is5325(dev)) {</div><div class='add'>+		if (port == B53_CPU_PORT_25)</div><div class='add'>+			port = B53_CPU_PORT;</div><div class='add'>+</div><div class='add'>+		b53_read16(dev, B53_IEEE_PAGE, B53_IEEE_UCAST_DLF, &amp;uc);</div><div class='add'>+		if (unicast)</div><div class='add'>+			uc |= BIT(port) | B53_IEEE_UCAST_DROP_EN;</div><div class='add'>+		else</div><div class='add'>+			uc &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_IEEE_PAGE, B53_IEEE_UCAST_DLF, uc);</div><div class='add'>+	} else {</div><div class='add'>+		b53_read16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, &amp;uc);</div><div class='add'>+		if (unicast)</div><div class='add'>+			uc |= BIT(port);</div><div class='add'>+		else</div><div class='add'>+			uc &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, uc);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void b53_port_set_mcast_flood(struct b53_device *dev, int port,</div><div class='hunk'>@@ -535,19 +589,31 @@ static void b53_port_set_mcast_flood(struct b53_device *dev, int port,</div><div class='ctx'> {</div><div class='ctx'> 	u16 mc;</div><div class='ctx'> </div><div class='del'>-	b53_read16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, &amp;mc);</div><div class='del'>-	if (multicast)</div><div class='del'>-		mc |= BIT(port);</div><div class='del'>-	else</div><div class='del'>-		mc &amp;= ~BIT(port);</div><div class='del'>-	b53_write16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, mc);</div><div class='add'>+	if (is5325(dev)) {</div><div class='add'>+		if (port == B53_CPU_PORT_25)</div><div class='add'>+			port = B53_CPU_PORT;</div><div class='ctx'> </div><div class='del'>-	b53_read16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, &amp;mc);</div><div class='del'>-	if (multicast)</div><div class='del'>-		mc |= BIT(port);</div><div class='del'>-	else</div><div class='del'>-		mc &amp;= ~BIT(port);</div><div class='del'>-	b53_write16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, mc);</div><div class='add'>+		b53_read16(dev, B53_IEEE_PAGE, B53_IEEE_MCAST_DLF, &amp;mc);</div><div class='add'>+		if (multicast)</div><div class='add'>+			mc |= BIT(port) | B53_IEEE_MCAST_DROP_EN;</div><div class='add'>+		else</div><div class='add'>+			mc &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_IEEE_PAGE, B53_IEEE_MCAST_DLF, mc);</div><div class='add'>+	} else {</div><div class='add'>+		b53_read16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, &amp;mc);</div><div class='add'>+		if (multicast)</div><div class='add'>+			mc |= BIT(port);</div><div class='add'>+		else</div><div class='add'>+			mc &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, mc);</div><div class='add'>+</div><div class='add'>+		b53_read16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, &amp;mc);</div><div class='add'>+		if (multicast)</div><div class='add'>+			mc |= BIT(port);</div><div class='add'>+		else</div><div class='add'>+			mc &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, mc);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void b53_port_set_learning(struct b53_device *dev, int port,</div><div class='hunk'>@@ -555,6 +621,9 @@ static void b53_port_set_learning(struct b53_device *dev, int port,</div><div class='ctx'> {</div><div class='ctx'> 	u16 reg;</div><div class='ctx'> </div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	b53_read16(dev, B53_CTRL_PAGE, B53_DIS_LEARNING, &amp;reg);</div><div class='ctx'> 	if (learning)</div><div class='ctx'> 		reg &amp;= ~BIT(port);</div><div class='hunk'>@@ -563,6 +632,25 @@ static void b53_port_set_learning(struct b53_device *dev, int port,</div><div class='ctx'> 	b53_write16(dev, B53_CTRL_PAGE, B53_DIS_LEARNING, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void b53_port_set_isolated(struct b53_device *dev, int port,</div><div class='add'>+				  bool isolated)</div><div class='add'>+{</div><div class='add'>+	u8 offset;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		offset = B53_PROTECTED_PORT_SEL_25;</div><div class='add'>+	else</div><div class='add'>+		offset = B53_PROTECTED_PORT_SEL;</div><div class='add'>+</div><div class='add'>+	b53_read16(dev, B53_CTRL_PAGE, offset, &amp;reg);</div><div class='add'>+	if (isolated)</div><div class='add'>+		reg |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~BIT(port);</div><div class='add'>+	b53_write16(dev, B53_CTRL_PAGE, offset, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void b53_eee_enable_set(struct dsa_switch *ds, int port, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='hunk'>@@ -576,6 +664,39 @@ static void b53_eee_enable_set(struct dsa_switch *ds, int port, bool enable)</div><div class='ctx'> 	b53_write16(dev, B53_EEE_PAGE, B53_EEE_EN_CTRL, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int b53_setup_port(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	b53_port_set_ucast_flood(dev, port, true);</div><div class='add'>+	b53_port_set_mcast_flood(dev, port, true);</div><div class='add'>+	b53_port_set_learning(dev, port, false);</div><div class='add'>+	b53_port_set_isolated(dev, port, false);</div><div class='add'>+</div><div class='add'>+	/* Force all traffic to go to the CPU port to prevent the ASIC from</div><div class='add'>+	 * trying to forward to bridged ports on matching FDB entries, then</div><div class='add'>+	 * dropping frames because it isn't allowed to forward there.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_user_port(ds, port))</div><div class='add'>+		b53_set_eap_mode(dev, port, EAP_MODE_SIMPLIFIED);</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) &amp;&amp;</div><div class='add'>+	    in_range(port, 1, 4)) {</div><div class='add'>+		u8 reg;</div><div class='add'>+</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_PD_MODE_CTRL_25, &amp;reg);</div><div class='add'>+		reg &amp;= ~PD_MODE_POWER_DOWN_PORT(0);</div><div class='add'>+		if (dsa_is_unused_port(ds, port))</div><div class='add'>+			reg |= PD_MODE_POWER_DOWN_PORT(port);</div><div class='add'>+		else</div><div class='add'>+			reg &amp;= ~PD_MODE_POWER_DOWN_PORT(port);</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_PD_MODE_CTRL_25, reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_setup_port);</div><div class='add'>+</div><div class='ctx'> int b53_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='hunk'>@@ -588,9 +709,8 @@ int b53_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy)</div><div class='ctx'> </div><div class='ctx'> 	cpu_port = dsa_to_port(ds, port)-&gt;cpu_dp-&gt;index;</div><div class='ctx'> </div><div class='del'>-	b53_port_set_ucast_flood(dev, port, true);</div><div class='del'>-	b53_port_set_mcast_flood(dev, port, true);</div><div class='del'>-	b53_port_set_learning(dev, port, false);</div><div class='add'>+	if (dev-&gt;ops-&gt;phy_enable)</div><div class='add'>+		dev-&gt;ops-&gt;phy_enable(dev, port);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;ops-&gt;irq_enable)</div><div class='ctx'> 		ret = dev-&gt;ops-&gt;irq_enable(dev, port);</div><div class='hunk'>@@ -630,6 +750,9 @@ void b53_disable_port(struct dsa_switch *ds, int port)</div><div class='ctx'> 	reg |= PORT_CTRL_RX_DISABLE | PORT_CTRL_TX_DISABLE;</div><div class='ctx'> 	b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), reg);</div><div class='ctx'> </div><div class='add'>+	if (dev-&gt;ops-&gt;phy_disable)</div><div class='add'>+		dev-&gt;ops-&gt;phy_disable(dev, port);</div><div class='add'>+</div><div class='ctx'> 	if (dev-&gt;ops-&gt;irq_disable)</div><div class='ctx'> 		dev-&gt;ops-&gt;irq_disable(dev, port);</div><div class='ctx'> }</div><div class='hunk'>@@ -674,6 +797,11 @@ void b53_brcm_hdr_setup(struct dsa_switch *ds, int port)</div><div class='ctx'> 		hdr_ctl |= GC_FRM_MGMT_PORT_M;</div><div class='ctx'> 	b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, hdr_ctl);</div><div class='ctx'> </div><div class='add'>+	/* B53_BRCM_HDR not present on devices with legacy tags */</div><div class='add'>+	if (dev-&gt;tag_protocol == DSA_TAG_PROTO_BRCM_LEGACY ||</div><div class='add'>+	    dev-&gt;tag_protocol == DSA_TAG_PROTO_BRCM_LEGACY_FCS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	/* Enable Broadcom tags for IMP port */</div><div class='ctx'> 	b53_read8(dev, B53_MGMT_PAGE, B53_BRCM_HDR, &amp;hdr_ctl);</div><div class='ctx'> 	if (tag_en)</div><div class='hunk'>@@ -722,10 +850,6 @@ static void b53_enable_cpu_port(struct b53_device *dev, int port)</div><div class='ctx'> 	b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), port_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	b53_brcm_hdr_setup(dev-&gt;ds, port);</div><div class='del'>-</div><div class='del'>-	b53_port_set_ucast_flood(dev, port, true);</div><div class='del'>-	b53_port_set_mcast_flood(dev, port, true);</div><div class='del'>-	b53_port_set_learning(dev, port, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void b53_enable_mib(struct b53_device *dev)</div><div class='hunk'>@@ -737,12 +861,18 @@ static void b53_enable_mib(struct b53_device *dev)</div><div class='ctx'> 	b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void b53_enable_stp(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	u8 gc;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &amp;gc);</div><div class='add'>+	gc |= GC_RX_BPDU_EN;</div><div class='add'>+	b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u16 b53_default_pvid(struct b53_device *dev)</div><div class='ctx'> {</div><div class='del'>-	if (is5325(dev) || is5365(dev))</div><div class='del'>-		return 1;</div><div class='del'>-	else</div><div class='del'>-		return 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool b53_vlan_port_needs_forced_tagged(struct dsa_switch *ds, int port)</div><div class='hunk'>@@ -752,6 +882,22 @@ static bool b53_vlan_port_needs_forced_tagged(struct dsa_switch *ds, int port)</div><div class='ctx'> 	return dev-&gt;tag_protocol == DSA_TAG_PROTO_NONE &amp;&amp; dsa_is_cpu_port(ds, port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool b53_vlan_port_may_join_untagged(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;vlan_filtering)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	dp = dsa_to_port(ds, port);</div><div class='add'>+</div><div class='add'>+	if (dsa_port_is_cpu(dp))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return dp-&gt;bridge == NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int b53_configure_vlan(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='hunk'>@@ -770,7 +916,7 @@ int b53_configure_vlan(struct dsa_switch *ds)</div><div class='ctx'> 		b53_do_vlan_op(dev, VTA_CMD_CLEAR);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	b53_enable_vlan(dev, -1, dev-&gt;vlan_enabled, ds-&gt;vlan_filtering);</div><div class='add'>+	b53_enable_vlan(dev, -1, dev-&gt;vlan_enabled, dev-&gt;vlan_filtering);</div><div class='ctx'> </div><div class='ctx'> 	/* Create an untagged VLAN entry for the default PVID in case</div><div class='ctx'> 	 * CONFIG_VLAN_8021Q is disabled and there are no calls to</div><div class='hunk'>@@ -778,26 +924,39 @@ int b53_configure_vlan(struct dsa_switch *ds)</div><div class='ctx'> 	 * entry. Do this only when the tagging protocol is not</div><div class='ctx'> 	 * DSA_TAG_PROTO_NONE</div><div class='ctx'> 	 */</div><div class='add'>+	v = &amp;dev-&gt;vlans[def_vid];</div><div class='ctx'> 	b53_for_each_port(dev, i) {</div><div class='del'>-		v = &amp;dev-&gt;vlans[def_vid];</div><div class='del'>-		v-&gt;members |= BIT(i);</div><div class='add'>+		if (!b53_vlan_port_may_join_untagged(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		vl.members |= BIT(i);</div><div class='ctx'> 		if (!b53_vlan_port_needs_forced_tagged(ds, i))</div><div class='del'>-			v-&gt;untag = v-&gt;members;</div><div class='del'>-		b53_write16(dev, B53_VLAN_PAGE,</div><div class='del'>-			    B53_VLAN_PORT_DEF_TAG(i), def_vid);</div><div class='add'>+			vl.untag = vl.members;</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(i),</div><div class='add'>+			    def_vid);</div><div class='ctx'> 	}</div><div class='add'>+	b53_set_vlan_entry(dev, def_vid, &amp;vl);</div><div class='ctx'> </div><div class='del'>-	/* Upon initial call we have not set-up any VLANs, but upon</div><div class='del'>-	 * system resume, we need to restore all VLAN entries.</div><div class='del'>-	 */</div><div class='del'>-	for (vid = def_vid; vid &lt; dev-&gt;num_vlans; vid++) {</div><div class='del'>-		v = &amp;dev-&gt;vlans[vid];</div><div class='add'>+	if (dev-&gt;vlan_filtering) {</div><div class='add'>+		/* Upon initial call we have not set-up any VLANs, but upon</div><div class='add'>+		 * system resume, we need to restore all VLAN entries.</div><div class='add'>+		 */</div><div class='add'>+		for (vid = def_vid + 1; vid &lt; dev-&gt;num_vlans; vid++) {</div><div class='add'>+			v = &amp;dev-&gt;vlans[vid];</div><div class='ctx'> </div><div class='del'>-		if (!v-&gt;members)</div><div class='del'>-			continue;</div><div class='add'>+			if (!v-&gt;members)</div><div class='add'>+				continue;</div><div class='ctx'> </div><div class='del'>-		b53_set_vlan_entry(dev, vid, v);</div><div class='del'>-		b53_fast_age_vlan(dev, vid);</div><div class='add'>+			b53_set_vlan_entry(dev, vid, v);</div><div class='add'>+			b53_fast_age_vlan(dev, vid);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		b53_for_each_port(dev, i) {</div><div class='add'>+			if (!dsa_is_cpu_port(ds, i))</div><div class='add'>+				b53_write16(dev, B53_VLAN_PAGE,</div><div class='add'>+					    B53_VLAN_PORT_DEF_TAG(i),</div><div class='add'>+					    dev-&gt;ports[i].pvid);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -876,6 +1035,7 @@ static int b53_switch_reset(struct b53_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	b53_enable_mib(dev);</div><div class='add'>+	b53_enable_stp(dev);</div><div class='ctx'> </div><div class='ctx'> 	return b53_flush_arl(dev, FAST_AGE_STATIC);</div><div class='ctx'> }</div><div class='hunk'>@@ -1115,7 +1275,9 @@ EXPORT_SYMBOL(b53_setup_devlink_resources);</div><div class='ctx'> static int b53_setup(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct b53_vlan *vl;</div><div class='ctx'> 	unsigned int port;</div><div class='add'>+	u16 pvid;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Request bridge PVID untagged when DSA_TAG_PROTO_NONE is set</div><div class='hunk'>@@ -1123,12 +1285,36 @@ static int b53_setup(struct dsa_switch *ds)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ds-&gt;untag_bridge_pvid = dev-&gt;tag_protocol == DSA_TAG_PROTO_NONE;</div><div class='ctx'> </div><div class='add'>+	/* The switch does not tell us the original VLAN for untagged</div><div class='add'>+	 * packets, so keep the CPU port always tagged.</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;untag_vlan_aware_bridge_pvid = true;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id == BCM53101_DEVICE_ID) {</div><div class='add'>+		/* BCM53101 uses 0.5 second increments */</div><div class='add'>+		ds-&gt;ageing_time_min = 1 * 500;</div><div class='add'>+		ds-&gt;ageing_time_max = AGE_TIME_MAX * 500;</div><div class='add'>+	} else {</div><div class='add'>+		/* Everything else uses 1 second increments */</div><div class='add'>+		ds-&gt;ageing_time_min = 1 * 1000;</div><div class='add'>+		ds-&gt;ageing_time_max = AGE_TIME_MAX * 1000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = b53_reset_switch(dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(ds-&gt;dev, "failed to reset switch\n");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* setup default vlan for filtering mode */</div><div class='add'>+	pvid = b53_default_pvid(dev);</div><div class='add'>+	vl = &amp;dev-&gt;vlans[pvid];</div><div class='add'>+	b53_for_each_port(dev, port) {</div><div class='add'>+		vl-&gt;members |= BIT(port);</div><div class='add'>+		if (!b53_vlan_port_needs_forced_tagged(ds, port))</div><div class='add'>+			vl-&gt;untag |= BIT(port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	b53_reset_mib(dev);</div><div class='ctx'> </div><div class='ctx'> 	ret = b53_apply_config(dev);</div><div class='hunk'>@@ -1163,6 +1349,8 @@ static void b53_force_link(struct b53_device *dev, int port, int link)</div><div class='ctx'> 	if (port == dev-&gt;imp_port) {</div><div class='ctx'> 		off = B53_PORT_OVERRIDE_CTRL;</div><div class='ctx'> 		val = PORT_OVERRIDE_EN;</div><div class='add'>+	} else if (is5325(dev)) {</div><div class='add'>+		return;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		off = B53_GMII_PORT_OVERRIDE_CTRL(port);</div><div class='ctx'> 		val = GMII_PO_EN;</div><div class='hunk'>@@ -1187,6 +1375,8 @@ static void b53_force_port_config(struct b53_device *dev, int port,</div><div class='ctx'> 	if (port == dev-&gt;imp_port) {</div><div class='ctx'> 		off = B53_PORT_OVERRIDE_CTRL;</div><div class='ctx'> 		val = PORT_OVERRIDE_EN;</div><div class='add'>+	} else if (is5325(dev)) {</div><div class='add'>+		return;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		off = B53_GMII_PORT_OVERRIDE_CTRL(port);</div><div class='ctx'> 		val = GMII_PO_EN;</div><div class='hunk'>@@ -1199,6 +1389,10 @@ static void b53_force_port_config(struct b53_device *dev, int port,</div><div class='ctx'> 	else</div><div class='ctx'> 		reg &amp;= ~PORT_OVERRIDE_FULL_DUPLEX;</div><div class='ctx'> </div><div class='add'>+	reg &amp;= ~(0x3 &lt;&lt; GMII_PO_SPEED_S);</div><div class='add'>+	if (is5301x(dev) || is58xx(dev))</div><div class='add'>+		reg &amp;= ~PORT_OVERRIDE_SPEED_2000M;</div><div class='add'>+</div><div class='ctx'> 	switch (speed) {</div><div class='ctx'> 	case 2000:</div><div class='ctx'> 		reg |= PORT_OVERRIDE_SPEED_2000M;</div><div class='hunk'>@@ -1217,10 +1411,24 @@ static void b53_force_port_config(struct b53_device *dev, int port,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (rx_pause)</div><div class='del'>-		reg |= PORT_OVERRIDE_RX_FLOW;</div><div class='del'>-	if (tx_pause)</div><div class='del'>-		reg |= PORT_OVERRIDE_TX_FLOW;</div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		reg &amp;= ~PORT_OVERRIDE_LP_FLOW_25;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~(PORT_OVERRIDE_RX_FLOW | PORT_OVERRIDE_TX_FLOW);</div><div class='add'>+</div><div class='add'>+	if (rx_pause) {</div><div class='add'>+		if (is5325(dev))</div><div class='add'>+			reg |= PORT_OVERRIDE_LP_FLOW_25;</div><div class='add'>+		else</div><div class='add'>+			reg |= PORT_OVERRIDE_RX_FLOW;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tx_pause) {</div><div class='add'>+		if (is5325(dev))</div><div class='add'>+			reg |= PORT_OVERRIDE_LP_FLOW_25;</div><div class='add'>+		else</div><div class='add'>+			reg |= PORT_OVERRIDE_TX_FLOW;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	b53_write8(dev, B53_CTRL_PAGE, off, reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -1229,41 +1437,17 @@ static void b53_adjust_63xx_rgmii(struct dsa_switch *ds, int port,</div><div class='ctx'> 				  phy_interface_t interface)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='del'>-	u8 rgmii_ctrl = 0, off;</div><div class='add'>+	u8 rgmii_ctrl = 0;</div><div class='ctx'> </div><div class='del'>-	if (port == dev-&gt;imp_port)</div><div class='del'>-		off = B53_RGMII_CTRL_IMP;</div><div class='del'>-	else</div><div class='del'>-		off = B53_RGMII_CTRL_P(port);</div><div class='del'>-</div><div class='del'>-	b53_read8(dev, B53_CTRL_PAGE, off, &amp;rgmii_ctrl);</div><div class='del'>-</div><div class='del'>-	switch (interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-		rgmii_ctrl |= (RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-		rgmii_ctrl &amp;= ~(RGMII_CTRL_DLL_TXC);</div><div class='del'>-		rgmii_ctrl |= RGMII_CTRL_DLL_RXC;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		rgmii_ctrl &amp;= ~(RGMII_CTRL_DLL_RXC);</div><div class='del'>-		rgmii_ctrl |= RGMII_CTRL_DLL_TXC;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	default:</div><div class='del'>-		rgmii_ctrl &amp;= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, B53_RGMII_CTRL_P(port), &amp;rgmii_ctrl);</div><div class='add'>+	rgmii_ctrl &amp;= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);</div><div class='ctx'> </div><div class='del'>-	if (port != dev-&gt;imp_port) {</div><div class='del'>-		if (is63268(dev))</div><div class='del'>-			rgmii_ctrl |= RGMII_CTRL_MII_OVERRIDE;</div><div class='add'>+	if (is6318_268(dev))</div><div class='add'>+		rgmii_ctrl |= RGMII_CTRL_MII_OVERRIDE;</div><div class='ctx'> </div><div class='del'>-		rgmii_ctrl |= RGMII_CTRL_ENABLE_GMII;</div><div class='del'>-	}</div><div class='add'>+	rgmii_ctrl |= RGMII_CTRL_ENABLE_GMII;</div><div class='ctx'> </div><div class='del'>-	b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_RGMII_CTRL_P(port), rgmii_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(ds-&gt;dev, "Configured port %d for %s\n", port,</div><div class='ctx'> 		phy_modes(interface));</div><div class='hunk'>@@ -1284,8 +1468,7 @@ static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port,</div><div class='ctx'> 	 * tx_clk aligned timing (restoring to reset defaults)</div><div class='ctx'> 	 */</div><div class='ctx'> 	b53_read8(dev, B53_CTRL_PAGE, off, &amp;rgmii_ctrl);</div><div class='del'>-	rgmii_ctrl &amp;= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC |</div><div class='del'>-			RGMII_CTRL_TIMING_SEL);</div><div class='add'>+	rgmii_ctrl &amp;= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);</div><div class='ctx'> </div><div class='ctx'> 	/* PHY_INTERFACE_MODE_RGMII_TXID means TX internal delay, make</div><div class='ctx'> 	 * sure that we enable the port TX clock internal delay to</div><div class='hunk'>@@ -1305,7 +1488,10 @@ static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port,</div><div class='ctx'> 		rgmii_ctrl |= RGMII_CTRL_DLL_TXC;</div><div class='ctx'> 	if (interface == PHY_INTERFACE_MODE_RGMII)</div><div class='ctx'> 		rgmii_ctrl |= RGMII_CTRL_DLL_TXC | RGMII_CTRL_DLL_RXC;</div><div class='del'>-	rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id != BCM53115_DEVICE_ID)</div><div class='add'>+		rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;</div><div class='add'>+</div><div class='ctx'> 	b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(ds-&gt;dev, "Configured port %d for %s\n", port,</div><div class='hunk'>@@ -1369,6 +1555,10 @@ static void b53_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='ctx'> 	__set_bit(PHY_INTERFACE_MODE_MII, config-&gt;supported_interfaces);</div><div class='ctx'> 	__set_bit(PHY_INTERFACE_MODE_REVMII, config-&gt;supported_interfaces);</div><div class='ctx'> </div><div class='add'>+	/* BCM63xx RGMII ports support RGMII */</div><div class='add'>+	if (is63xx(dev) &amp;&amp; in_range(port, B53_63XX_RGMII0, 4))</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='ctx'> 	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='ctx'> 		MAC_10 | MAC_100;</div><div class='ctx'> </div><div class='hunk'>@@ -1408,7 +1598,7 @@ static void b53_phylink_mac_config(struct phylink_config *config,</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='ctx'> 	int port = dp-&gt;index;</div><div class='ctx'> </div><div class='del'>-	if (is63xx(dev) &amp;&amp; port &gt;= B53_63XX_RGMII0)</div><div class='add'>+	if (is63xx(dev) &amp;&amp; in_range(port, B53_63XX_RGMII0, 4))</div><div class='ctx'> 		b53_adjust_63xx_rgmii(ds, port, interface);</div><div class='ctx'> </div><div class='ctx'> 	if (mode == MLO_AN_FIXED) {</div><div class='hunk'>@@ -1429,8 +1619,11 @@ static void b53_phylink_mac_link_down(struct phylink_config *config,</div><div class='ctx'> 	struct b53_device *dev = dp-&gt;ds-&gt;priv;</div><div class='ctx'> 	int port = dp-&gt;index;</div><div class='ctx'> </div><div class='del'>-	if (mode == MLO_AN_PHY)</div><div class='add'>+	if (mode == MLO_AN_PHY) {</div><div class='add'>+		if (is63xx(dev) &amp;&amp; in_range(port, B53_63XX_RGMII0, 4))</div><div class='add'>+			b53_force_link(dev, port, false);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (mode == MLO_AN_FIXED) {</div><div class='ctx'> 		b53_force_link(dev, port, false);</div><div class='hunk'>@@ -1458,6 +1651,13 @@ static void b53_phylink_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 	if (mode == MLO_AN_PHY) {</div><div class='ctx'> 		/* Re-negotiate EEE if it was enabled already */</div><div class='ctx'> 		p-&gt;eee_enabled = b53_eee_init(ds, port, phydev);</div><div class='add'>+</div><div class='add'>+		if (is63xx(dev) &amp;&amp; in_range(port, B53_63XX_RGMII0, 4)) {</div><div class='add'>+			b53_force_port_config(dev, port, speed, duplex,</div><div class='add'>+					      tx_pause, rx_pause);</div><div class='add'>+			b53_force_link(dev, port, true);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1482,7 +1682,10 @@ int b53_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	b53_enable_vlan(dev, port, dev-&gt;vlan_enabled, vlan_filtering);</div><div class='add'>+	if (dev-&gt;vlan_filtering != vlan_filtering) {</div><div class='add'>+		dev-&gt;vlan_filtering = vlan_filtering;</div><div class='add'>+		b53_apply_config(dev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1493,9 +1696,6 @@ static int b53_vlan_prepare(struct dsa_switch *ds, int port,</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	if ((is5325(dev) || is5365(dev)) &amp;&amp; vlan-&gt;vid == 0)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	/* Port 7 on 7278 connects to the ASP's UniMAC which is not capable of</div><div class='ctx'> 	 * receiving VLAN tagged frames at all, we can still allow the port to</div><div class='ctx'> 	 * be configured for egress untagged.</div><div class='hunk'>@@ -1507,7 +1707,7 @@ static int b53_vlan_prepare(struct dsa_switch *ds, int port,</div><div class='ctx'> 	if (vlan-&gt;vid &gt;= dev-&gt;num_vlans)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='del'>-	b53_enable_vlan(dev, port, true, ds-&gt;vlan_filtering);</div><div class='add'>+	b53_enable_vlan(dev, port, true, dev-&gt;vlan_filtering);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1520,18 +1720,29 @@ int b53_vlan_add(struct dsa_switch *ds, int port,</div><div class='ctx'> 	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='ctx'> 	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='ctx'> 	struct b53_vlan *vl;</div><div class='add'>+	u16 old_pvid, new_pvid;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = b53_vlan_prepare(ds, port, vlan);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	vl = &amp;dev-&gt;vlans[vlan-&gt;vid];</div><div class='add'>+	if (vlan-&gt;vid == 0)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	b53_get_vlan_entry(dev, vlan-&gt;vid, vl);</div><div class='add'>+	old_pvid = dev-&gt;ports[port].pvid;</div><div class='add'>+	if (pvid)</div><div class='add'>+		new_pvid = vlan-&gt;vid;</div><div class='add'>+	else if (!pvid &amp;&amp; vlan-&gt;vid == old_pvid)</div><div class='add'>+		new_pvid = b53_default_pvid(dev);</div><div class='add'>+	else</div><div class='add'>+		new_pvid = old_pvid;</div><div class='add'>+	dev-&gt;ports[port].pvid = new_pvid;</div><div class='ctx'> </div><div class='del'>-	if (vlan-&gt;vid == 0 &amp;&amp; vlan-&gt;vid == b53_default_pvid(dev))</div><div class='del'>-		untagged = true;</div><div class='add'>+	vl = &amp;dev-&gt;vlans[vlan-&gt;vid];</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		untagged = false;</div><div class='ctx'> </div><div class='ctx'> 	vl-&gt;members |= BIT(port);</div><div class='ctx'> 	if (untagged &amp;&amp; !b53_vlan_port_needs_forced_tagged(ds, port))</div><div class='hunk'>@@ -1539,13 +1750,16 @@ int b53_vlan_add(struct dsa_switch *ds, int port,</div><div class='ctx'> 	else</div><div class='ctx'> 		vl-&gt;untag &amp;= ~BIT(port);</div><div class='ctx'> </div><div class='add'>+	if (!dev-&gt;vlan_filtering)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	b53_set_vlan_entry(dev, vlan-&gt;vid, vl);</div><div class='ctx'> 	b53_fast_age_vlan(dev, vlan-&gt;vid);</div><div class='ctx'> </div><div class='del'>-	if (pvid &amp;&amp; !dsa_is_cpu_port(ds, port)) {</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port) &amp;&amp; new_pvid != old_pvid) {</div><div class='ctx'> 		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port),</div><div class='del'>-			    vlan-&gt;vid);</div><div class='del'>-		b53_fast_age_vlan(dev, vlan-&gt;vid);</div><div class='add'>+			    new_pvid);</div><div class='add'>+		b53_fast_age_vlan(dev, old_pvid);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1560,20 +1774,25 @@ int b53_vlan_del(struct dsa_switch *ds, int port,</div><div class='ctx'> 	struct b53_vlan *vl;</div><div class='ctx'> 	u16 pvid;</div><div class='ctx'> </div><div class='del'>-	b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port), &amp;pvid);</div><div class='add'>+	if (vlan-&gt;vid == 0)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	vl = &amp;dev-&gt;vlans[vlan-&gt;vid];</div><div class='add'>+	pvid = dev-&gt;ports[port].pvid;</div><div class='ctx'> </div><div class='del'>-	b53_get_vlan_entry(dev, vlan-&gt;vid, vl);</div><div class='add'>+	vl = &amp;dev-&gt;vlans[vlan-&gt;vid];</div><div class='ctx'> </div><div class='ctx'> 	vl-&gt;members &amp;= ~BIT(port);</div><div class='ctx'> </div><div class='ctx'> 	if (pvid == vlan-&gt;vid)</div><div class='ctx'> 		pvid = b53_default_pvid(dev);</div><div class='add'>+	dev-&gt;ports[port].pvid = pvid;</div><div class='ctx'> </div><div class='ctx'> 	if (untagged &amp;&amp; !b53_vlan_port_needs_forced_tagged(ds, port))</div><div class='ctx'> 		vl-&gt;untag &amp;= ~(BIT(port));</div><div class='ctx'> </div><div class='add'>+	if (!dev-&gt;vlan_filtering)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	b53_set_vlan_entry(dev, vlan-&gt;vid, vl);</div><div class='ctx'> 	b53_fast_age_vlan(dev, vlan-&gt;vid);</div><div class='ctx'> </div><div class='hunk'>@@ -1625,7 +1844,82 @@ static int b53_arl_rw_op(struct b53_device *dev, unsigned int op)</div><div class='ctx'> 	return b53_arl_op_wait(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int b53_arl_read(struct b53_device *dev, u64 mac,</div><div class='add'>+static void b53_arl_read_entry_25(struct b53_device *dev,</div><div class='add'>+				  struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u8 vid_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_ARLIO_PAGE, B53_ARLTBL_VID_ENTRY_25(idx),</div><div class='add'>+		  &amp;vid_entry);</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx),</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_arl_to_entry_25(ent, mac_vid, vid_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_write_entry_25(struct b53_device *dev,</div><div class='add'>+				   const struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u8 vid_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_arl_from_entry_25(&amp;mac_vid, &amp;vid_entry, ent);</div><div class='add'>+	b53_write8(dev, B53_ARLIO_PAGE, B53_ARLTBL_VID_ENTRY_25(idx), vid_entry);</div><div class='add'>+	b53_write64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx),</div><div class='add'>+		    mac_vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_read_entry_89(struct b53_device *dev,</div><div class='add'>+				  struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+	u16 fwd_entry;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx),</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_read16(dev, B53_ARLIO_PAGE, B53_ARLTBL_DATA_ENTRY(idx), &amp;fwd_entry);</div><div class='add'>+	b53_arl_to_entry_89(ent, mac_vid, fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_write_entry_89(struct b53_device *dev,</div><div class='add'>+				   const struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u32 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_arl_from_entry_89(&amp;mac_vid, &amp;fwd_entry, ent);</div><div class='add'>+	b53_write64(dev, B53_ARLIO_PAGE,</div><div class='add'>+		    B53_ARLTBL_MAC_VID_ENTRY(idx), mac_vid);</div><div class='add'>+	b53_write16(dev, B53_ARLIO_PAGE,</div><div class='add'>+		    B53_ARLTBL_DATA_ENTRY(idx), fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_read_entry_95(struct b53_device *dev,</div><div class='add'>+				  struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u32 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx),</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_read32(dev, B53_ARLIO_PAGE, B53_ARLTBL_DATA_ENTRY(idx), &amp;fwd_entry);</div><div class='add'>+	b53_arl_to_entry(ent, mac_vid, fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_write_entry_95(struct b53_device *dev,</div><div class='add'>+				   const struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u32 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_arl_from_entry(&amp;mac_vid, &amp;fwd_entry, ent);</div><div class='add'>+	b53_write64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx),</div><div class='add'>+		    mac_vid);</div><div class='add'>+	b53_write32(dev, B53_ARLIO_PAGE, B53_ARLTBL_DATA_ENTRY(idx),</div><div class='add'>+		    fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_arl_read(struct b53_device *dev, const u8 *mac,</div><div class='ctx'> 			u16 vid, struct b53_arl_entry *ent, u8 *idx)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_BITMAP(free_bins, B53_ARLTBL_MAX_BIN_ENTRIES);</div><div class='hunk'>@@ -1640,23 +1934,15 @@ static int b53_arl_read(struct b53_device *dev, u64 mac,</div><div class='ctx'> </div><div class='ctx'> 	/* Read the bins */</div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;num_arl_bins; i++) {</div><div class='del'>-		u64 mac_vid;</div><div class='del'>-		u32 fwd_entry;</div><div class='del'>-</div><div class='del'>-		b53_read64(dev, B53_ARLIO_PAGE,</div><div class='del'>-			   B53_ARLTBL_MAC_VID_ENTRY(i), &amp;mac_vid);</div><div class='del'>-		b53_read32(dev, B53_ARLIO_PAGE,</div><div class='del'>-			   B53_ARLTBL_DATA_ENTRY(i), &amp;fwd_entry);</div><div class='del'>-		b53_arl_to_entry(ent, mac_vid, fwd_entry);</div><div class='add'>+		b53_arl_read_entry(dev, ent, i);</div><div class='ctx'> </div><div class='del'>-		if (!(fwd_entry &amp; ARLTBL_VALID)) {</div><div class='add'>+		if (!ent-&gt;is_valid) {</div><div class='ctx'> 			set_bit(i, free_bins);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		if ((mac_vid &amp; ARLTBL_MAC_MASK) != mac)</div><div class='add'>+		if (!ether_addr_equal(ent-&gt;mac, mac))</div><div class='ctx'> 			continue;</div><div class='del'>-		if (dev-&gt;vlan_enabled &amp;&amp;</div><div class='del'>-		    ((mac_vid &gt;&gt; ARLTBL_VID_S) &amp; ARLTBL_VID_MASK) != vid)</div><div class='add'>+		if (dev-&gt;vlan_enabled &amp;&amp; ent-&gt;vid != vid)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		*idx = i;</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1670,9 +1956,8 @@ static int b53_arl_op(struct b53_device *dev, int op, int port,</div><div class='ctx'> 		      const unsigned char *addr, u16 vid, bool is_valid)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_arl_entry ent;</div><div class='del'>-	u32 fwd_entry;</div><div class='del'>-	u64 mac, mac_vid = 0;</div><div class='ctx'> 	u8 idx = 0;</div><div class='add'>+	u64 mac;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Convert the array into a 64-bit MAC */</div><div class='hunk'>@@ -1680,14 +1965,19 @@ static int b53_arl_op(struct b53_device *dev, int op, int port,</div><div class='ctx'> </div><div class='ctx'> 	/* Perform a read for the given MAC and VID */</div><div class='ctx'> 	b53_write48(dev, B53_ARLIO_PAGE, B53_MAC_ADDR_IDX, mac);</div><div class='del'>-	b53_write16(dev, B53_ARLIO_PAGE, B53_VLAN_ID_IDX, vid);</div><div class='add'>+	if (!is5325m(dev)) {</div><div class='add'>+		if (is5325(dev) || is5365(dev))</div><div class='add'>+			b53_write8(dev, B53_ARLIO_PAGE, B53_VLAN_ID_IDX, vid);</div><div class='add'>+		else</div><div class='add'>+			b53_write16(dev, B53_ARLIO_PAGE, B53_VLAN_ID_IDX, vid);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Issue a read operation for this MAC */</div><div class='ctx'> 	ret = b53_arl_rw_op(dev, 1);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = b53_arl_read(dev, mac, vid, &amp;ent, &amp;idx);</div><div class='add'>+	ret = b53_arl_read(dev, addr, vid, &amp;ent, &amp;idx);</div><div class='ctx'> </div><div class='ctx'> 	/* If this is a read, just finish now */</div><div class='ctx'> 	if (op)</div><div class='hunk'>@@ -1704,7 +1994,6 @@ static int b53_arl_op(struct b53_device *dev, int op, int port,</div><div class='ctx'> 		/* We could not find a matching MAC, so reset to a new entry */</div><div class='ctx'> 		dev_dbg(dev-&gt;dev, "{%pM,%.4d} not found, using idx: %d\n",</div><div class='ctx'> 			addr, vid, idx);</div><div class='del'>-		fwd_entry = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_dbg(dev-&gt;dev, "{%pM,%.4d} found, using idx: %d\n",</div><div class='hunk'>@@ -1731,12 +2020,7 @@ static int b53_arl_op(struct b53_device *dev, int op, int port,</div><div class='ctx'> 	ent.is_static = true;</div><div class='ctx'> 	ent.is_age = false;</div><div class='ctx'> 	memcpy(ent.mac, addr, ETH_ALEN);</div><div class='del'>-	b53_arl_from_entry(&amp;mac_vid, &amp;fwd_entry, &amp;ent);</div><div class='del'>-</div><div class='del'>-	b53_write64(dev, B53_ARLIO_PAGE,</div><div class='del'>-		    B53_ARLTBL_MAC_VID_ENTRY(idx), mac_vid);</div><div class='del'>-	b53_write32(dev, B53_ARLIO_PAGE,</div><div class='del'>-		    B53_ARLTBL_DATA_ENTRY(idx), fwd_entry);</div><div class='add'>+	b53_arl_write_entry(dev, &amp;ent, idx);</div><div class='ctx'> </div><div class='ctx'> 	return b53_arl_rw_op(dev, 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -1748,12 +2032,6 @@ int b53_fdb_add(struct dsa_switch *ds, int port,</div><div class='ctx'> 	struct b53_device *priv = ds-&gt;priv;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* 5325 and 5365 require some more massaging, but could</div><div class='del'>-	 * be supported eventually</div><div class='del'>-	 */</div><div class='del'>-	if (is5325(priv) || is5365(priv))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;arl_mutex);</div><div class='ctx'> 	ret = b53_arl_op(priv, 0, port, addr, vid, true);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;arl_mutex);</div><div class='hunk'>@@ -1777,15 +2055,55 @@ int b53_fdb_del(struct dsa_switch *ds, int port,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(b53_fdb_del);</div><div class='ctx'> </div><div class='add'>+static void b53_read_arl_srch_ctl(struct b53_device *dev, u8 *val)</div><div class='add'>+{</div><div class='add'>+	u8 offset;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev))</div><div class='add'>+		offset = B53_ARL_SRCH_CTL_25;</div><div class='add'>+	else if (dev-&gt;chip_id == BCM5389_DEVICE_ID || is5397_98(dev) ||</div><div class='add'>+		 is63xx(dev))</div><div class='add'>+		offset = B53_ARL_SRCH_CTL_89;</div><div class='add'>+	else</div><div class='add'>+		offset = B53_ARL_SRCH_CTL;</div><div class='add'>+</div><div class='add'>+	if (is63xx(dev)) {</div><div class='add'>+		u16 val16;</div><div class='add'>+</div><div class='add'>+		b53_read16(dev, B53_ARLIO_PAGE, offset, &amp;val16);</div><div class='add'>+		*val = val16 &amp; 0xff;</div><div class='add'>+	} else {</div><div class='add'>+		b53_read8(dev, B53_ARLIO_PAGE, offset, val);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_write_arl_srch_ctl(struct b53_device *dev, u8 val)</div><div class='add'>+{</div><div class='add'>+	u8 offset;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev))</div><div class='add'>+		offset = B53_ARL_SRCH_CTL_25;</div><div class='add'>+	else if (dev-&gt;chip_id == BCM5389_DEVICE_ID || is5397_98(dev) ||</div><div class='add'>+		 is63xx(dev))</div><div class='add'>+		offset = B53_ARL_SRCH_CTL_89;</div><div class='add'>+	else</div><div class='add'>+		offset = B53_ARL_SRCH_CTL;</div><div class='add'>+</div><div class='add'>+	if (is63xx(dev))</div><div class='add'>+		b53_write16(dev, B53_ARLIO_PAGE, offset, val);</div><div class='add'>+	else</div><div class='add'>+		b53_write8(dev, B53_ARLIO_PAGE, offset, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int b53_arl_search_wait(struct b53_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int timeout = 1000;</div><div class='ctx'> 	u8 reg;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		b53_read8(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_CTL, &amp;reg);</div><div class='add'>+		b53_read_arl_srch_ctl(dev, &amp;reg);</div><div class='ctx'> 		if (!(reg &amp; ARL_SRCH_STDN))</div><div class='del'>-			return 0;</div><div class='add'>+			return -ENOENT;</div><div class='ctx'> </div><div class='ctx'> 		if (reg &amp; ARL_SRCH_VLID)</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -1796,16 +2114,52 @@ static int b53_arl_search_wait(struct b53_device *dev)</div><div class='ctx'> 	return -ETIMEDOUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void b53_arl_search_rd(struct b53_device *dev, u8 idx,</div><div class='del'>-			      struct b53_arl_entry *ent)</div><div class='add'>+static void b53_arl_search_read_25(struct b53_device *dev, u8 idx,</div><div class='add'>+				   struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+	u8 ext;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_EXT_25, &amp;ext);</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSTL_0_MACVID_25,</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_arl_search_to_entry_25(ent, mac_vid, ext);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_search_read_89(struct b53_device *dev, u8 idx,</div><div class='add'>+				   struct b53_arl_entry *ent)</div><div class='ctx'> {</div><div class='add'>+	u16 fwd_entry;</div><div class='ctx'> 	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_MACVID_89,</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_read16(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_89, &amp;fwd_entry);</div><div class='add'>+	b53_arl_to_entry_89(ent, mac_vid, fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_search_read_63xx(struct b53_device *dev, u8 idx,</div><div class='add'>+				     struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	u16 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_MACVID_63XX,</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_read16(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_63XX, &amp;fwd_entry);</div><div class='add'>+	b53_arl_search_to_entry_63xx(ent, mac_vid, fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_search_read_95(struct b53_device *dev, u8 idx,</div><div class='add'>+				   struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='ctx'> 	u32 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='ctx'> </div><div class='del'>-	b53_read64(dev, B53_ARLIO_PAGE,</div><div class='del'>-		   B53_ARL_SRCH_RSTL_MACVID(idx), &amp;mac_vid);</div><div class='del'>-	b53_read32(dev, B53_ARLIO_PAGE,</div><div class='del'>-		   B53_ARL_SRCH_RSTL(idx), &amp;fwd_entry);</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSTL_MACVID(idx),</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_read32(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSTL(idx),</div><div class='add'>+		   &amp;fwd_entry);</div><div class='ctx'> 	b53_arl_to_entry(ent, mac_vid, fwd_entry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1824,30 +2178,31 @@ static int b53_fdb_copy(int port, const struct b53_arl_entry *ent,</div><div class='ctx'> int b53_fdb_dump(struct dsa_switch *ds, int port,</div><div class='ctx'> 		 dsa_fdb_dump_cb_t *cb, void *data)</div><div class='ctx'> {</div><div class='add'>+	unsigned int count = 0, results_per_hit = 1;</div><div class='ctx'> 	struct b53_device *priv = ds-&gt;priv;</div><div class='ctx'> 	struct b53_arl_entry results[2];</div><div class='del'>-	unsigned int count = 0;</div><div class='ctx'> 	int ret;</div><div class='del'>-	u8 reg;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;num_arl_bins &gt; 2)</div><div class='add'>+		results_per_hit = 2;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;arl_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* Start search operation */</div><div class='del'>-	reg = ARL_SRCH_STDN;</div><div class='del'>-	b53_write8(priv, B53_ARLIO_PAGE, B53_ARL_SRCH_CTL, reg);</div><div class='add'>+	b53_write_arl_srch_ctl(priv, ARL_SRCH_STDN);</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		ret = b53_arl_search_wait(priv);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		b53_arl_search_rd(priv, 0, &amp;results[0]);</div><div class='add'>+		b53_arl_search_read(priv, 0, &amp;results[0]);</div><div class='ctx'> 		ret = b53_fdb_copy(port, &amp;results[0], cb, data);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		if (priv-&gt;num_arl_bins &gt; 2) {</div><div class='del'>-			b53_arl_search_rd(priv, 1, &amp;results[1]);</div><div class='add'>+		if (results_per_hit == 2) {</div><div class='add'>+			b53_arl_search_read(priv, 1, &amp;results[1]);</div><div class='ctx'> 			ret = b53_fdb_copy(port, &amp;results[1], cb, data);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -1856,7 +2211,7 @@ int b53_fdb_dump(struct dsa_switch *ds, int port,</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-	} while (count++ &lt; b53_max_arl_entries(priv) / 2);</div><div class='add'>+	} while (count++ &lt; b53_max_arl_entries(priv) / results_per_hit);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;arl_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -1906,8 +2261,9 @@ int b53_br_join(struct dsa_switch *ds, int port, struct dsa_bridge bridge,</div><div class='ctx'> 		bool *tx_fwd_offload, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct b53_vlan *vl;</div><div class='ctx'> 	s8 cpu_port = dsa_to_port(ds, port)-&gt;cpu_dp-&gt;index;</div><div class='del'>-	u16 pvlan, reg;</div><div class='add'>+	u16 pvlan, reg, pvid;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* On 7278, port 7 which connects to the ASP should only receive</div><div class='hunk'>@@ -1916,15 +2272,26 @@ int b53_br_join(struct dsa_switch *ds, int port, struct dsa_bridge bridge,</div><div class='ctx'> 	if (dev-&gt;chip_id == BCM7278_DEVICE_ID &amp;&amp; port == 7)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* Make this port leave the all VLANs join since we will have proper</div><div class='del'>-	 * VLAN entries from now on</div><div class='del'>-	 */</div><div class='del'>-	if (is58xx(dev)) {</div><div class='del'>-		b53_read16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, &amp;reg);</div><div class='del'>-		reg &amp;= ~BIT(port);</div><div class='del'>-		if ((reg &amp; BIT(cpu_port)) == BIT(cpu_port))</div><div class='del'>-			reg &amp;= ~BIT(cpu_port);</div><div class='del'>-		b53_write16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, reg);</div><div class='add'>+	pvid = b53_default_pvid(dev);</div><div class='add'>+	vl = &amp;dev-&gt;vlans[pvid];</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;vlan_filtering) {</div><div class='add'>+		/* Make this port leave the all VLANs join since we will have</div><div class='add'>+		 * proper VLAN entries from now on</div><div class='add'>+		 */</div><div class='add'>+		if (is58xx(dev)) {</div><div class='add'>+			b53_read16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN,</div><div class='add'>+				   &amp;reg);</div><div class='add'>+			reg &amp;= ~BIT(port);</div><div class='add'>+			if ((reg &amp; BIT(cpu_port)) == BIT(cpu_port))</div><div class='add'>+				reg &amp;= ~BIT(cpu_port);</div><div class='add'>+			b53_write16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN,</div><div class='add'>+				    reg);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		b53_get_vlan_entry(dev, pvid, vl);</div><div class='add'>+		vl-&gt;members &amp;= ~BIT(port);</div><div class='add'>+		b53_set_vlan_entry(dev, pvid, vl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), &amp;pvlan);</div><div class='hunk'>@@ -1944,6 +2311,9 @@ int b53_br_join(struct dsa_switch *ds, int port, struct dsa_bridge bridge,</div><div class='ctx'> 		pvlan |= BIT(i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Disable redirection of unknown SA to the CPU port */</div><div class='add'>+	b53_set_eap_mode(dev, port, EAP_MODE_BASIC);</div><div class='add'>+</div><div class='ctx'> 	/* Configure the local port VLAN control membership to include</div><div class='ctx'> 	 * remote ports and update the local port bitmask</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1957,7 +2327,7 @@ EXPORT_SYMBOL(b53_br_join);</div><div class='ctx'> void b53_br_leave(struct dsa_switch *ds, int port, struct dsa_bridge bridge)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='del'>-	struct b53_vlan *vl = &amp;dev-&gt;vlans[0];</div><div class='add'>+	struct b53_vlan *vl;</div><div class='ctx'> 	s8 cpu_port = dsa_to_port(ds, port)-&gt;cpu_dp-&gt;index;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	u16 pvlan, reg, pvid;</div><div class='hunk'>@@ -1979,22 +2349,27 @@ void b53_br_leave(struct dsa_switch *ds, int port, struct dsa_bridge bridge)</div><div class='ctx'> 			pvlan &amp;= ~BIT(i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Enable redirection of unknown SA to the CPU port */</div><div class='add'>+	b53_set_eap_mode(dev, port, EAP_MODE_SIMPLIFIED);</div><div class='add'>+</div><div class='ctx'> 	b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), pvlan);</div><div class='ctx'> 	dev-&gt;ports[port].vlan_ctl_mask = pvlan;</div><div class='ctx'> </div><div class='ctx'> 	pvid = b53_default_pvid(dev);</div><div class='add'>+	vl = &amp;dev-&gt;vlans[pvid];</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;vlan_filtering) {</div><div class='add'>+		/* Make this port join all VLANs without VLAN entries */</div><div class='add'>+		if (is58xx(dev)) {</div><div class='add'>+			b53_read16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, &amp;reg);</div><div class='add'>+			reg |= BIT(port);</div><div class='add'>+			if (!(reg &amp; BIT(cpu_port)))</div><div class='add'>+				reg |= BIT(cpu_port);</div><div class='add'>+			b53_write16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, reg);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	/* Make this port join all VLANs without VLAN entries */</div><div class='del'>-	if (is58xx(dev)) {</div><div class='del'>-		b53_read16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, &amp;reg);</div><div class='del'>-		reg |= BIT(port);</div><div class='del'>-		if (!(reg &amp; BIT(cpu_port)))</div><div class='del'>-			reg |= BIT(cpu_port);</div><div class='del'>-		b53_write16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, reg);</div><div class='del'>-	} else {</div><div class='ctx'> 		b53_get_vlan_entry(dev, pvid, vl);</div><div class='del'>-		vl-&gt;members |= BIT(port) | BIT(cpu_port);</div><div class='del'>-		vl-&gt;untag |= BIT(port) | BIT(cpu_port);</div><div class='add'>+		vl-&gt;members |= BIT(port);</div><div class='ctx'> 		b53_set_vlan_entry(dev, pvid, vl);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2047,7 +2422,13 @@ int b53_br_flags_pre(struct dsa_switch *ds, int port,</div><div class='ctx'> 		     struct switchdev_brport_flags flags,</div><div class='ctx'> 		     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	if (flags.mask &amp; ~(BR_FLOOD | BR_MCAST_FLOOD | BR_LEARNING))</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	unsigned long mask = (BR_FLOOD | BR_MCAST_FLOOD | BR_ISOLATED);</div><div class='add'>+</div><div class='add'>+	if (!is5325(dev))</div><div class='add'>+		mask |= BR_LEARNING;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; ~mask)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2067,6 +2448,9 @@ int b53_br_flags(struct dsa_switch *ds, int port,</div><div class='ctx'> 	if (flags.mask &amp; BR_LEARNING)</div><div class='ctx'> 		b53_port_set_learning(ds-&gt;priv, port,</div><div class='ctx'> 				      !!(flags.val &amp; BR_LEARNING));</div><div class='add'>+	if (flags.mask &amp; BR_ISOLATED)</div><div class='add'>+		b53_port_set_isolated(ds-&gt;priv, port,</div><div class='add'>+				      !!(flags.val &amp; BR_ISOLATED));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2123,8 +2507,11 @@ enum dsa_tag_protocol b53_get_tag_protocol(struct dsa_switch *ds, int port,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Older models require a different 6 byte tag */</div><div class='del'>-	if (is5325(dev) || is5365(dev) || is63xx(dev)) {</div><div class='add'>+	/* Older models require different 6 byte tags */</div><div class='add'>+	if (is5325(dev) || is5365(dev)) {</div><div class='add'>+		dev-&gt;tag_protocol = DSA_TAG_PROTO_BRCM_LEGACY_FCS;</div><div class='add'>+		goto out;</div><div class='add'>+	} else if (is63xx(dev)) {</div><div class='ctx'> 		dev-&gt;tag_protocol = DSA_TAG_PROTO_BRCM_LEGACY;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2214,6 +2601,9 @@ int b53_eee_init(struct dsa_switch *ds, int port, struct phy_device *phy)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!b53_support_eee(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	ret = phy_init_eee(phy, false);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2224,25 +2614,19 @@ int b53_eee_init(struct dsa_switch *ds, int port, struct phy_device *phy)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(b53_eee_init);</div><div class='ctx'> </div><div class='del'>-int b53_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *e)</div><div class='add'>+bool b53_support_eee(struct dsa_switch *ds, int port)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	if (is5325(dev) || is5365(dev))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return !is5325(dev) &amp;&amp; !is5365(dev) &amp;&amp; !is63xx(dev);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(b53_get_mac_eee);</div><div class='add'>+EXPORT_SYMBOL(b53_support_eee);</div><div class='ctx'> </div><div class='ctx'> int b53_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *e)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = ds-&gt;priv;</div><div class='ctx'> 	struct ethtool_keee *p = &amp;dev-&gt;ports[port].eee;</div><div class='ctx'> </div><div class='del'>-	if (is5325(dev) || is5365(dev))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	p-&gt;eee_enabled = e-&gt;eee_enabled;</div><div class='ctx'> 	b53_eee_enable_set(ds, port, e-&gt;eee_enabled);</div><div class='ctx'> </div><div class='hunk'>@@ -2278,6 +2662,31 @@ static int b53_get_max_mtu(struct dsa_switch *ds, int port)</div><div class='ctx'> 	return B53_MAX_MTU;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int b53_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	u32 atc;</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	if (is63xx(dev))</div><div class='add'>+		reg = B53_AGING_TIME_CONTROL_63XX;</div><div class='add'>+	else</div><div class='add'>+		reg = B53_AGING_TIME_CONTROL;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id == BCM53101_DEVICE_ID)</div><div class='add'>+		atc = DIV_ROUND_CLOSEST(msecs, 500);</div><div class='add'>+	else</div><div class='add'>+		atc = DIV_ROUND_CLOSEST(msecs, 1000);</div><div class='add'>+</div><div class='add'>+	if (!is5325(dev) &amp;&amp; !is5365(dev))</div><div class='add'>+		atc |= AGE_CHANGE;</div><div class='add'>+</div><div class='add'>+	b53_write32(dev, B53_MGMT_PAGE, reg, atc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(b53_set_ageing_time);</div><div class='add'>+</div><div class='ctx'> static const struct phylink_mac_ops b53_phylink_mac_ops = {</div><div class='ctx'> 	.mac_select_pcs	= b53_phylink_mac_select_pcs,</div><div class='ctx'> 	.mac_config	= b53_phylink_mac_config,</div><div class='hunk'>@@ -2296,10 +2705,12 @@ static const struct dsa_switch_ops b53_switch_ops = {</div><div class='ctx'> 	.phy_read		= b53_phy_read16,</div><div class='ctx'> 	.phy_write		= b53_phy_write16,</div><div class='ctx'> 	.phylink_get_caps	= b53_phylink_get_caps,</div><div class='add'>+	.port_setup		= b53_setup_port,</div><div class='ctx'> 	.port_enable		= b53_enable_port,</div><div class='ctx'> 	.port_disable		= b53_disable_port,</div><div class='del'>-	.get_mac_eee		= b53_get_mac_eee,</div><div class='add'>+	.support_eee		= b53_support_eee,</div><div class='ctx'> 	.set_mac_eee		= b53_set_mac_eee,</div><div class='add'>+	.set_ageing_time	= b53_set_ageing_time,</div><div class='ctx'> 	.port_bridge_join	= b53_br_join,</div><div class='ctx'> 	.port_bridge_leave	= b53_br_leave,</div><div class='ctx'> 	.port_pre_bridge_flags	= b53_br_flags_pre,</div><div class='hunk'>@@ -2320,6 +2731,30 @@ static const struct dsa_switch_ops b53_switch_ops = {</div><div class='ctx'> 	.port_change_mtu	= b53_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct b53_arl_ops b53_arl_ops_25 = {</div><div class='add'>+	.arl_read_entry = b53_arl_read_entry_25,</div><div class='add'>+	.arl_write_entry = b53_arl_write_entry_25,</div><div class='add'>+	.arl_search_read = b53_arl_search_read_25,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct b53_arl_ops b53_arl_ops_89 = {</div><div class='add'>+	.arl_read_entry = b53_arl_read_entry_89,</div><div class='add'>+	.arl_write_entry = b53_arl_write_entry_89,</div><div class='add'>+	.arl_search_read = b53_arl_search_read_89,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct b53_arl_ops b53_arl_ops_63xx = {</div><div class='add'>+	.arl_read_entry = b53_arl_read_entry_89,</div><div class='add'>+	.arl_write_entry = b53_arl_write_entry_89,</div><div class='add'>+	.arl_search_read = b53_arl_search_read_63xx,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct b53_arl_ops b53_arl_ops_95 = {</div><div class='add'>+	.arl_read_entry = b53_arl_read_entry_95,</div><div class='add'>+	.arl_write_entry = b53_arl_write_entry_95,</div><div class='add'>+	.arl_search_read = b53_arl_search_read_95,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct b53_chip_data {</div><div class='ctx'> 	u32 chip_id;</div><div class='ctx'> 	const char *dev_name;</div><div class='hunk'>@@ -2333,6 +2768,7 @@ struct b53_chip_data {</div><div class='ctx'> 	u8 duplex_reg;</div><div class='ctx'> 	u8 jumbo_pm_reg;</div><div class='ctx'> 	u8 jumbo_size_reg;</div><div class='add'>+	const struct b53_arl_ops *arl_ops;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define B53_VTA_REGS	\</div><div class='hunk'>@@ -2352,6 +2788,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.arl_buckets = 1024,</div><div class='ctx'> 		.imp_port = 5,</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_FE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_25,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM5365_DEVICE_ID,</div><div class='hunk'>@@ -2362,6 +2799,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.arl_buckets = 1024,</div><div class='ctx'> 		.imp_port = 5,</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_FE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_25,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM5389_DEVICE_ID,</div><div class='hunk'>@@ -2375,6 +2813,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_89,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM5395_DEVICE_ID,</div><div class='hunk'>@@ -2388,6 +2827,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM5397_DEVICE_ID,</div><div class='hunk'>@@ -2401,6 +2841,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_89,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM5398_DEVICE_ID,</div><div class='hunk'>@@ -2414,6 +2855,21 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_89,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53101_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53101",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x11f,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 512,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM53115_DEVICE_ID,</div><div class='hunk'>@@ -2427,6 +2883,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM53125_DEVICE_ID,</div><div class='hunk'>@@ -2440,6 +2897,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM53128_DEVICE_ID,</div><div class='hunk'>@@ -2453,32 +2911,21 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM63XX_DEVICE_ID,</div><div class='ctx'> 		.dev_name = "BCM63xx",</div><div class='ctx'> 		.vlans = 4096,</div><div class='ctx'> 		.enabled_ports = 0, /* pdata must provide them */</div><div class='del'>-		.arl_bins = 4,</div><div class='del'>-		.arl_buckets = 1024,</div><div class='del'>-		.imp_port = 8,</div><div class='del'>-		.vta_regs = B53_VTA_REGS_63XX,</div><div class='del'>-		.duplex_reg = B53_DUPLEX_STAT_63XX,</div><div class='del'>-		.jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,</div><div class='del'>-		.jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.chip_id = BCM63268_DEVICE_ID,</div><div class='del'>-		.dev_name = "BCM63268",</div><div class='del'>-		.vlans = 4096,</div><div class='del'>-		.enabled_ports = 0, /* pdata must provide them */</div><div class='del'>-		.arl_bins = 4,</div><div class='del'>-		.arl_buckets = 1024,</div><div class='add'>+		.arl_bins = 1,</div><div class='add'>+		.arl_buckets = 4096,</div><div class='ctx'> 		.imp_port = 8,</div><div class='ctx'> 		.vta_regs = B53_VTA_REGS_63XX,</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_63XX,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_63xx,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM53010_DEVICE_ID,</div><div class='hunk'>@@ -2492,6 +2939,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM53011_DEVICE_ID,</div><div class='hunk'>@@ -2505,6 +2953,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM53012_DEVICE_ID,</div><div class='hunk'>@@ -2518,6 +2967,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM53018_DEVICE_ID,</div><div class='hunk'>@@ -2531,6 +2981,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM53019_DEVICE_ID,</div><div class='hunk'>@@ -2544,6 +2995,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM58XX_DEVICE_ID,</div><div class='hunk'>@@ -2557,6 +3009,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM583XX_DEVICE_ID,</div><div class='hunk'>@@ -2570,6 +3023,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	/* Starfighter 2 */</div><div class='ctx'> 	{</div><div class='hunk'>@@ -2584,6 +3038,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM7445_DEVICE_ID,</div><div class='hunk'>@@ -2597,6 +3052,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM7278_DEVICE_ID,</div><div class='hunk'>@@ -2610,6 +3066,7 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.chip_id = BCM53134_DEVICE_ID,</div><div class='hunk'>@@ -2624,18 +3081,23 @@ static const struct b53_chip_data b53_switch_chips[] = {</div><div class='ctx'> 		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='ctx'> 		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='ctx'> 		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int b53_switch_init(struct b53_device *dev)</div><div class='ctx'> {</div><div class='add'>+	u32 chip_id = dev-&gt;chip_id;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (is63xx(dev))</div><div class='add'>+		chip_id = BCM63XX_DEVICE_ID;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(b53_switch_chips); i++) {</div><div class='ctx'> 		const struct b53_chip_data *chip = &amp;b53_switch_chips[i];</div><div class='ctx'> </div><div class='del'>-		if (chip-&gt;chip_id == dev-&gt;chip_id) {</div><div class='add'>+		if (chip-&gt;chip_id == chip_id) {</div><div class='ctx'> 			if (!dev-&gt;enabled_ports)</div><div class='ctx'> 				dev-&gt;enabled_ports = chip-&gt;enabled_ports;</div><div class='ctx'> 			dev-&gt;name = chip-&gt;dev_name;</div><div class='hunk'>@@ -2648,6 +3110,7 @@ static int b53_switch_init(struct b53_device *dev)</div><div class='ctx'> 			dev-&gt;num_vlans = chip-&gt;vlans;</div><div class='ctx'> 			dev-&gt;num_arl_bins = chip-&gt;arl_bins;</div><div class='ctx'> 			dev-&gt;num_arl_buckets = chip-&gt;arl_buckets;</div><div class='add'>+			dev-&gt;arl_ops = chip-&gt;arl_ops;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2678,6 +3141,9 @@ static int b53_switch_init(struct b53_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (is5325e(dev))</div><div class='add'>+		dev-&gt;num_arl_buckets = 512;</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;num_ports = fls(dev-&gt;enabled_ports);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;ds-&gt;num_ports = min_t(unsigned int, dev-&gt;num_ports, DSA_MAX_PORTS);</div><div class='hunk'>@@ -2740,6 +3206,7 @@ struct b53_device *b53_switch_alloc(struct device *base,</div><div class='ctx'> 	ds-&gt;ops = &amp;b53_switch_ops;</div><div class='ctx'> 	ds-&gt;phylink_mac_ops = &amp;b53_phylink_mac_ops;</div><div class='ctx'> 	dev-&gt;vlan_enabled = true;</div><div class='add'>+	dev-&gt;vlan_filtering = false;</div><div class='ctx'> 	/* Let DSA handle the case were multiple bridges span the same switch</div><div class='ctx'> 	 * device and different VLAN awareness settings are requested, which</div><div class='ctx'> 	 * would be breaking filtering semantics for any of the other bridge</div><div class='hunk'>@@ -2778,10 +3245,24 @@ int b53_switch_detect(struct b53_device *dev)</div><div class='ctx'> 		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, 0xf);</div><div class='ctx'> 		b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, &amp;tmp);</div><div class='ctx'> </div><div class='del'>-		if (tmp == 0xf)</div><div class='add'>+		if (tmp == 0xf) {</div><div class='add'>+			u32 phy_id;</div><div class='add'>+			int val;</div><div class='add'>+</div><div class='ctx'> 			dev-&gt;chip_id = BCM5325_DEVICE_ID;</div><div class='del'>-		else</div><div class='add'>+</div><div class='add'>+			val = b53_phy_read16(dev-&gt;ds, 0, MII_PHYSID1);</div><div class='add'>+			phy_id = (val &amp; 0xffff) &lt;&lt; 16;</div><div class='add'>+			val = b53_phy_read16(dev-&gt;ds, 0, MII_PHYSID2);</div><div class='add'>+			phy_id |= (val &amp; 0xfff0);</div><div class='add'>+</div><div class='add'>+			if (phy_id == 0x00406330)</div><div class='add'>+				dev-&gt;variant_id = B53_VARIANT_5325M;</div><div class='add'>+			else if (phy_id == 0x0143bc30)</div><div class='add'>+				dev-&gt;variant_id = B53_VARIANT_5325E;</div><div class='add'>+		} else {</div><div class='ctx'> 			dev-&gt;chip_id = BCM5365_DEVICE_ID;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BCM5389_DEVICE_ID:</div><div class='ctx'> 	case BCM5395_DEVICE_ID:</div><div class='hunk'>@@ -2795,6 +3276,7 @@ int b53_switch_detect(struct b53_device *dev)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='ctx'> 		switch (id32) {</div><div class='add'>+		case BCM53101_DEVICE_ID:</div><div class='ctx'> 		case BCM53115_DEVICE_ID:</div><div class='ctx'> 		case BCM53125_DEVICE_ID:</div><div class='ctx'> 		case BCM53128_DEVICE_ID:</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_mdio.c b/drivers/net/dsa/b53/b53_mdio.c<br/>index 31d070bf161a..43a3b37b731b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_mdio.c</a></div><div class='hunk'>@@ -374,6 +374,7 @@ static void b53_mdio_shutdown(struct mdio_device *mdiodev)</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id b53_of_match[] = {</div><div class='ctx'> 	{ .compatible = "brcm,bcm5325" },</div><div class='add'>+	{ .compatible = "brcm,bcm53101" },</div><div class='ctx'> 	{ .compatible = "brcm,bcm53115" },</div><div class='ctx'> 	{ .compatible = "brcm,bcm53125" },</div><div class='ctx'> 	{ .compatible = "brcm,bcm53128" },</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_mmap.c<br/>index c687360a5b7f..f4a59d8fbdd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_mmap.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_mmap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_mmap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_mmap.c</a></div><div class='hunk'>@@ -21,13 +21,60 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/b53.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "b53_priv.h"</div><div class='ctx'> </div><div class='add'>+#define BCM63XX_EPHY_REG 0x3C</div><div class='add'>+#define BCM63268_GPHY_REG 0x54</div><div class='add'>+</div><div class='add'>+#define GPHY_CTRL_LOW_PWR	BIT(3)</div><div class='add'>+#define GPHY_CTRL_IDDQ_BIAS	BIT(0)</div><div class='add'>+</div><div class='add'>+struct b53_phy_info {</div><div class='add'>+	u32 gphy_port_mask;</div><div class='add'>+	u32 ephy_enable_mask;</div><div class='add'>+	u32 ephy_port_mask;</div><div class='add'>+	u32 ephy_bias_bit;</div><div class='add'>+	const u32 *ephy_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct b53_mmap_priv {</div><div class='ctx'> 	void __iomem *regs;</div><div class='add'>+	struct regmap *gpio_ctrl;</div><div class='add'>+	const struct b53_phy_info *phy_info;</div><div class='add'>+	u32 phys_enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 bcm6318_ephy_offsets[] = {4, 5, 6, 7};</div><div class='add'>+</div><div class='add'>+static const struct b53_phy_info bcm6318_ephy_info = {</div><div class='add'>+	.ephy_enable_mask = BIT(0) | BIT(4) | BIT(8) | BIT(12) | BIT(16),</div><div class='add'>+	.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm6318_ephy_offsets) - 1), 0),</div><div class='add'>+	.ephy_bias_bit = 24,</div><div class='add'>+	.ephy_offset = bcm6318_ephy_offsets,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 bcm6368_ephy_offsets[] = {2, 3, 4, 5};</div><div class='add'>+</div><div class='add'>+static const struct b53_phy_info bcm6368_ephy_info = {</div><div class='add'>+	.ephy_enable_mask = BIT(0),</div><div class='add'>+	.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm6368_ephy_offsets) - 1), 0),</div><div class='add'>+	.ephy_bias_bit = 0,</div><div class='add'>+	.ephy_offset = bcm6368_ephy_offsets,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 bcm63268_ephy_offsets[] = {4, 9, 14};</div><div class='add'>+</div><div class='add'>+static const struct b53_phy_info bcm63268_ephy_info = {</div><div class='add'>+	.gphy_port_mask = BIT(3),</div><div class='add'>+	.ephy_enable_mask = GENMASK(4, 0),</div><div class='add'>+	.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm63268_ephy_offsets) - 1), 0),</div><div class='add'>+	.ephy_bias_bit = 24,</div><div class='add'>+	.ephy_offset = bcm63268_ephy_offsets,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)</div><div class='hunk'>@@ -229,6 +276,71 @@ static int b53_mmap_phy_write16(struct b53_device *dev, int addr, int reg,</div><div class='ctx'> 	return -EIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bcm63xx_ephy_set(struct b53_device *dev, int port, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	const struct b53_phy_info *info = priv-&gt;phy_info;</div><div class='add'>+	struct regmap *gpio_ctrl = priv-&gt;gpio_ctrl;</div><div class='add'>+	u32 mask, val;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		mask = (info-&gt;ephy_enable_mask &lt;&lt; info-&gt;ephy_offset[port])</div><div class='add'>+				| BIT(info-&gt;ephy_bias_bit);</div><div class='add'>+		val = 0;</div><div class='add'>+	} else {</div><div class='add'>+		mask = (info-&gt;ephy_enable_mask &lt;&lt; info-&gt;ephy_offset[port]);</div><div class='add'>+		if (!((priv-&gt;phys_enabled &amp; ~BIT(port)) &amp; info-&gt;ephy_port_mask))</div><div class='add'>+			mask |= BIT(info-&gt;ephy_bias_bit);</div><div class='add'>+		val = mask;</div><div class='add'>+	}</div><div class='add'>+	return regmap_update_bits(gpio_ctrl, BCM63XX_EPHY_REG, mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm63268_gphy_set(struct b53_device *dev, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct regmap *gpio_ctrl = priv-&gt;gpio_ctrl;</div><div class='add'>+	u32 mask = GPHY_CTRL_IDDQ_BIAS | GPHY_CTRL_LOW_PWR;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	if (!enable)</div><div class='add'>+		val = mask;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(gpio_ctrl, BCM63268_GPHY_REG, mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_mmap_phy_enable(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;phy_info) {</div><div class='add'>+		if (BIT(port) &amp; priv-&gt;phy_info-&gt;ephy_port_mask)</div><div class='add'>+			ret = bcm63xx_ephy_set(dev, port, true);</div><div class='add'>+		else if (BIT(port) &amp; priv-&gt;phy_info-&gt;gphy_port_mask)</div><div class='add'>+			ret = bcm63268_gphy_set(dev, true);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		priv-&gt;phys_enabled |= BIT(port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_mmap_phy_disable(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;phy_info) {</div><div class='add'>+		if (BIT(port) &amp; priv-&gt;phy_info-&gt;ephy_port_mask)</div><div class='add'>+			ret = bcm63xx_ephy_set(dev, port, false);</div><div class='add'>+		else if (BIT(port) &amp; priv-&gt;phy_info-&gt;gphy_port_mask)</div><div class='add'>+			ret = bcm63268_gphy_set(dev, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		priv-&gt;phys_enabled &amp;= ~BIT(port);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct b53_io_ops b53_mmap_ops = {</div><div class='ctx'> 	.read8 = b53_mmap_read8,</div><div class='ctx'> 	.read16 = b53_mmap_read16,</div><div class='hunk'>@@ -242,6 +354,8 @@ static const struct b53_io_ops b53_mmap_ops = {</div><div class='ctx'> 	.write64 = b53_mmap_write64,</div><div class='ctx'> 	.phy_read16 = b53_mmap_phy_read16,</div><div class='ctx'> 	.phy_write16 = b53_mmap_phy_write16,</div><div class='add'>+	.phy_enable = b53_mmap_phy_enable,</div><div class='add'>+	.phy_disable = b53_mmap_phy_disable,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int b53_mmap_probe_of(struct platform_device *pdev,</div><div class='hunk'>@@ -313,6 +427,18 @@ static int b53_mmap_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;regs = pdata-&gt;regs;</div><div class='ctx'> </div><div class='add'>+	priv-&gt;gpio_ctrl = syscon_regmap_lookup_by_phandle(np, "brcm,gpio-ctrl");</div><div class='add'>+	if (!IS_ERR(priv-&gt;gpio_ctrl)) {</div><div class='add'>+		if (pdata-&gt;chip_id == BCM6318_DEVICE_ID ||</div><div class='add'>+		    pdata-&gt;chip_id == BCM6328_DEVICE_ID ||</div><div class='add'>+		    pdata-&gt;chip_id == BCM6362_DEVICE_ID)</div><div class='add'>+			priv-&gt;phy_info = &amp;bcm6318_ephy_info;</div><div class='add'>+		else if (pdata-&gt;chip_id == BCM6368_DEVICE_ID)</div><div class='add'>+			priv-&gt;phy_info = &amp;bcm6368_ephy_info;</div><div class='add'>+		else if (pdata-&gt;chip_id == BCM63268_DEVICE_ID)</div><div class='add'>+			priv-&gt;phy_info = &amp;bcm63268_ephy_info;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	dev = b53_switch_alloc(&amp;pdev-&gt;dev, &amp;b53_mmap_ops, priv);</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -348,16 +474,16 @@ static const struct of_device_id b53_mmap_of_table[] = {</div><div class='ctx'> 		.data = (void *)BCM63XX_DEVICE_ID,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.compatible = "brcm,bcm6318-switch",</div><div class='del'>-		.data = (void *)BCM63268_DEVICE_ID,</div><div class='add'>+		.data = (void *)BCM6318_DEVICE_ID,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.compatible = "brcm,bcm6328-switch",</div><div class='del'>-		.data = (void *)BCM63XX_DEVICE_ID,</div><div class='add'>+		.data = (void *)BCM6328_DEVICE_ID,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.compatible = "brcm,bcm6362-switch",</div><div class='del'>-		.data = (void *)BCM63XX_DEVICE_ID,</div><div class='add'>+		.data = (void *)BCM6362_DEVICE_ID,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.compatible = "brcm,bcm6368-switch",</div><div class='del'>-		.data = (void *)BCM63XX_DEVICE_ID,</div><div class='add'>+		.data = (void *)BCM6368_DEVICE_ID,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.compatible = "brcm,bcm63268-switch",</div><div class='ctx'> 		.data = (void *)BCM63268_DEVICE_ID,</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_priv.h b/drivers/net/dsa/b53/b53_priv.h<br/>index 05141176daf5..bd6849e5bb93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_priv.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_priv.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_priv.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_priv.h</a></div><div class='hunk'>@@ -45,6 +45,8 @@ struct b53_io_ops {</div><div class='ctx'> 	int (*phy_write16)(struct b53_device *dev, int addr, int reg, u16 value);</div><div class='ctx'> 	int (*irq_enable)(struct b53_device *dev, int port);</div><div class='ctx'> 	void (*irq_disable)(struct b53_device *dev, int port);</div><div class='add'>+	void (*phy_enable)(struct b53_device *dev, int port);</div><div class='add'>+	void (*phy_disable)(struct b53_device *dev, int port);</div><div class='ctx'> 	void (*phylink_get_caps)(struct b53_device *dev, int port,</div><div class='ctx'> 				 struct phylink_config *config);</div><div class='ctx'> 	struct phylink_pcs *(*phylink_mac_select_pcs)(struct b53_device *dev,</div><div class='hunk'>@@ -56,6 +58,17 @@ struct b53_io_ops {</div><div class='ctx'> 				bool link_up);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct b53_arl_entry;</div><div class='add'>+</div><div class='add'>+struct b53_arl_ops {</div><div class='add'>+	void (*arl_read_entry)(struct b53_device *dev,</div><div class='add'>+			       struct b53_arl_entry *ent, u8 idx);</div><div class='add'>+	void (*arl_write_entry)(struct b53_device *dev,</div><div class='add'>+				const struct b53_arl_entry *ent, u8 idx);</div><div class='add'>+	void (*arl_search_read)(struct b53_device *dev, u8 idx,</div><div class='add'>+				struct b53_arl_entry *ent);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define B53_INVALID_LANE	0xff</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -66,10 +79,15 @@ enum {</div><div class='ctx'> 	BCM5395_DEVICE_ID = 0x95,</div><div class='ctx'> 	BCM5397_DEVICE_ID = 0x97,</div><div class='ctx'> 	BCM5398_DEVICE_ID = 0x98,</div><div class='add'>+	BCM53101_DEVICE_ID = 0x53101,</div><div class='ctx'> 	BCM53115_DEVICE_ID = 0x53115,</div><div class='ctx'> 	BCM53125_DEVICE_ID = 0x53125,</div><div class='ctx'> 	BCM53128_DEVICE_ID = 0x53128,</div><div class='ctx'> 	BCM63XX_DEVICE_ID = 0x6300,</div><div class='add'>+	BCM6318_DEVICE_ID = 0x6318,</div><div class='add'>+	BCM6328_DEVICE_ID = 0x6328,</div><div class='add'>+	BCM6362_DEVICE_ID = 0x6362,</div><div class='add'>+	BCM6368_DEVICE_ID = 0x6368,</div><div class='ctx'> 	BCM63268_DEVICE_ID = 0x63268,</div><div class='ctx'> 	BCM53010_DEVICE_ID = 0x53010,</div><div class='ctx'> 	BCM53011_DEVICE_ID = 0x53011,</div><div class='hunk'>@@ -83,6 +101,12 @@ enum {</div><div class='ctx'> 	BCM53134_DEVICE_ID = 0x5075,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum b53_variant_id {</div><div class='add'>+	B53_VARIANT_NONE = 0,</div><div class='add'>+	B53_VARIANT_5325E,</div><div class='add'>+	B53_VARIANT_5325M,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct b53_pcs {</div><div class='ctx'> 	struct phylink_pcs pcs;</div><div class='ctx'> 	struct b53_device *dev;</div><div class='hunk'>@@ -95,6 +119,7 @@ struct b53_pcs {</div><div class='ctx'> </div><div class='ctx'> struct b53_port {</div><div class='ctx'> 	u16		vlan_ctl_mask;</div><div class='add'>+	u16		pvid;</div><div class='ctx'> 	struct ethtool_keee eee;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -113,9 +138,11 @@ struct b53_device {</div><div class='ctx'> 	struct mutex stats_mutex;</div><div class='ctx'> 	struct mutex arl_mutex;</div><div class='ctx'> 	const struct b53_io_ops *ops;</div><div class='add'>+	const struct b53_arl_ops *arl_ops;</div><div class='ctx'> </div><div class='ctx'> 	/* chip specific data */</div><div class='ctx'> 	u32 chip_id;</div><div class='add'>+	enum b53_variant_id variant_id;</div><div class='ctx'> 	u8 core_rev;</div><div class='ctx'> 	u8 vta_regs[3];</div><div class='ctx'> 	u8 duplex_reg;</div><div class='hunk'>@@ -146,6 +173,7 @@ struct b53_device {</div><div class='ctx'> 	unsigned int num_vlans;</div><div class='ctx'> 	struct b53_vlan *vlans;</div><div class='ctx'> 	bool vlan_enabled;</div><div class='add'>+	bool vlan_filtering;</div><div class='ctx'> 	unsigned int num_ports;</div><div class='ctx'> 	struct b53_port *ports;</div><div class='ctx'> </div><div class='hunk'>@@ -162,6 +190,18 @@ static inline int is5325(struct b53_device *dev)</div><div class='ctx'> 	return dev-&gt;chip_id == BCM5325_DEVICE_ID;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int is5325e(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return is5325(dev) &amp;&amp;</div><div class='add'>+		dev-&gt;variant_id == B53_VARIANT_5325E;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is5325m(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return is5325(dev) &amp;&amp;</div><div class='add'>+		dev-&gt;variant_id == B53_VARIANT_5325M;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int is5365(struct b53_device *dev)</div><div class='ctx'> {</div><div class='ctx'> #ifdef CONFIG_BCM47XX</div><div class='hunk'>@@ -188,6 +228,7 @@ static inline int is531x5(struct b53_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return dev-&gt;chip_id == BCM53115_DEVICE_ID ||</div><div class='ctx'> 		dev-&gt;chip_id == BCM53125_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM53101_DEVICE_ID ||</div><div class='ctx'> 		dev-&gt;chip_id == BCM53128_DEVICE_ID ||</div><div class='ctx'> 		dev-&gt;chip_id == BCM53134_DEVICE_ID;</div><div class='ctx'> }</div><div class='hunk'>@@ -195,12 +236,17 @@ static inline int is531x5(struct b53_device *dev)</div><div class='ctx'> static inline int is63xx(struct b53_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return dev-&gt;chip_id == BCM63XX_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM6318_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM6328_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM6362_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM6368_DEVICE_ID ||</div><div class='ctx'> 		dev-&gt;chip_id == BCM63268_DEVICE_ID;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int is63268(struct b53_device *dev)</div><div class='add'>+static inline int is6318_268(struct b53_device *dev)</div><div class='ctx'> {</div><div class='del'>-	return dev-&gt;chip_id == BCM63268_DEVICE_ID;</div><div class='add'>+	return dev-&gt;chip_id == BCM6318_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM63268_DEVICE_ID;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int is5301x(struct b53_device *dev)</div><div class='hunk'>@@ -294,6 +340,33 @@ static inline void b53_arl_to_entry(struct b53_arl_entry *ent,</div><div class='ctx'> 	ent-&gt;vid = mac_vid &gt;&gt; ARLTBL_VID_S;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void b53_arl_to_entry_25(struct b53_arl_entry *ent,</div><div class='add'>+				       u64 mac_vid, u8 vid_entry)</div><div class='add'>+{</div><div class='add'>+	memset(ent, 0, sizeof(*ent));</div><div class='add'>+	ent-&gt;is_valid = !!(mac_vid &amp; ARLTBL_VALID_25);</div><div class='add'>+	ent-&gt;is_age = !!(mac_vid &amp; ARLTBL_AGE_25);</div><div class='add'>+	ent-&gt;is_static = !!(mac_vid &amp; ARLTBL_STATIC_25);</div><div class='add'>+	u64_to_ether_addr(mac_vid, ent-&gt;mac);</div><div class='add'>+	ent-&gt;port = (mac_vid &amp; ARLTBL_DATA_PORT_ID_MASK_25) &gt;&gt;</div><div class='add'>+		     ARLTBL_DATA_PORT_ID_S_25;</div><div class='add'>+	if (is_unicast_ether_addr(ent-&gt;mac) &amp;&amp; ent-&gt;port == B53_CPU_PORT)</div><div class='add'>+		ent-&gt;port = B53_CPU_PORT_25;</div><div class='add'>+	ent-&gt;vid = vid_entry;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_to_entry_89(struct b53_arl_entry *ent,</div><div class='add'>+				       u64 mac_vid, u16 fwd_entry)</div><div class='add'>+{</div><div class='add'>+	memset(ent, 0, sizeof(*ent));</div><div class='add'>+	ent-&gt;port = fwd_entry &amp; ARLTBL_DATA_PORT_ID_MASK_89;</div><div class='add'>+	ent-&gt;is_valid = !!(fwd_entry &amp; ARLTBL_VALID_89);</div><div class='add'>+	ent-&gt;is_age = !!(fwd_entry &amp; ARLTBL_AGE_89);</div><div class='add'>+	ent-&gt;is_static = !!(fwd_entry &amp; ARLTBL_STATIC_89);</div><div class='add'>+	u64_to_ether_addr(mac_vid, ent-&gt;mac);</div><div class='add'>+	ent-&gt;vid = mac_vid &gt;&gt; ARLTBL_VID_S;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void b53_arl_from_entry(u64 *mac_vid, u32 *fwd_entry,</div><div class='ctx'> 				      const struct b53_arl_entry *ent)</div><div class='ctx'> {</div><div class='hunk'>@@ -308,6 +381,89 @@ static inline void b53_arl_from_entry(u64 *mac_vid, u32 *fwd_entry,</div><div class='ctx'> 		*fwd_entry |= ARLTBL_AGE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void b53_arl_from_entry_25(u64 *mac_vid, u8 *vid_entry,</div><div class='add'>+					 const struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	*mac_vid = ether_addr_to_u64(ent-&gt;mac);</div><div class='add'>+	if (is_unicast_ether_addr(ent-&gt;mac) &amp;&amp; ent-&gt;port == B53_CPU_PORT_25)</div><div class='add'>+		*mac_vid |= (u64)B53_CPU_PORT &lt;&lt; ARLTBL_DATA_PORT_ID_S_25;</div><div class='add'>+	else</div><div class='add'>+		*mac_vid |= ((u64)ent-&gt;port &lt;&lt; ARLTBL_DATA_PORT_ID_S_25) &amp;</div><div class='add'>+			    ARLTBL_DATA_PORT_ID_MASK_25;</div><div class='add'>+	if (ent-&gt;is_valid)</div><div class='add'>+		*mac_vid |= ARLTBL_VALID_25;</div><div class='add'>+	if (ent-&gt;is_static)</div><div class='add'>+		*mac_vid |= ARLTBL_STATIC_25;</div><div class='add'>+	if (ent-&gt;is_age)</div><div class='add'>+		*mac_vid |= ARLTBL_AGE_25;</div><div class='add'>+	*vid_entry = ent-&gt;vid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_from_entry_89(u64 *mac_vid, u32 *fwd_entry,</div><div class='add'>+					 const struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	*mac_vid = ether_addr_to_u64(ent-&gt;mac);</div><div class='add'>+	*mac_vid |= (u64)(ent-&gt;vid &amp; ARLTBL_VID_MASK) &lt;&lt; ARLTBL_VID_S;</div><div class='add'>+	*fwd_entry = ent-&gt;port &amp; ARLTBL_DATA_PORT_ID_MASK_89;</div><div class='add'>+	if (ent-&gt;is_valid)</div><div class='add'>+		*fwd_entry |= ARLTBL_VALID_89;</div><div class='add'>+	if (ent-&gt;is_static)</div><div class='add'>+		*fwd_entry |= ARLTBL_STATIC_89;</div><div class='add'>+	if (ent-&gt;is_age)</div><div class='add'>+		*fwd_entry |= ARLTBL_AGE_89;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_search_to_entry_25(struct b53_arl_entry *ent,</div><div class='add'>+					      u64 mac_vid, u8 ext)</div><div class='add'>+{</div><div class='add'>+	memset(ent, 0, sizeof(*ent));</div><div class='add'>+	ent-&gt;is_valid = !!(mac_vid &amp; ARLTBL_VALID_25);</div><div class='add'>+	ent-&gt;is_age = !!(mac_vid &amp; ARLTBL_AGE_25);</div><div class='add'>+	ent-&gt;is_static = !!(mac_vid &amp; ARLTBL_STATIC_25);</div><div class='add'>+	u64_to_ether_addr(mac_vid, ent-&gt;mac);</div><div class='add'>+	ent-&gt;vid = (mac_vid &amp; ARL_SRCH_RSLT_VID_MASK_25) &gt;&gt;</div><div class='add'>+		   ARL_SRCH_RSLT_VID_S_25;</div><div class='add'>+	ent-&gt;port = (mac_vid &amp; ARL_SRCH_RSLT_PORT_ID_MASK_25) &gt;&gt;</div><div class='add'>+		    ARL_SRCH_RSLT_PORT_ID_S_25;</div><div class='add'>+	if (is_multicast_ether_addr(ent-&gt;mac) &amp;&amp; (ext &amp; ARL_SRCH_RSLT_EXT_MC_MII))</div><div class='add'>+		ent-&gt;port |= BIT(B53_CPU_PORT_25);</div><div class='add'>+	else if (!is_multicast_ether_addr(ent-&gt;mac) &amp;&amp; ent-&gt;port == B53_CPU_PORT)</div><div class='add'>+		ent-&gt;port = B53_CPU_PORT_25;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_search_to_entry_63xx(struct b53_arl_entry *ent,</div><div class='add'>+						u64 mac_vid, u16 fwd_entry)</div><div class='add'>+{</div><div class='add'>+	memset(ent, 0, sizeof(*ent));</div><div class='add'>+	u64_to_ether_addr(mac_vid, ent-&gt;mac);</div><div class='add'>+	ent-&gt;vid = mac_vid &gt;&gt; ARLTBL_VID_S;</div><div class='add'>+</div><div class='add'>+	ent-&gt;port = fwd_entry &amp; ARL_SRST_PORT_ID_MASK_63XX;</div><div class='add'>+	ent-&gt;port &gt;&gt;= 1;</div><div class='add'>+</div><div class='add'>+	ent-&gt;is_age = !!(fwd_entry &amp; ARL_SRST_AGE_63XX);</div><div class='add'>+	ent-&gt;is_static = !!(fwd_entry &amp; ARL_SRST_STATIC_63XX);</div><div class='add'>+	ent-&gt;is_valid = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_read_entry(struct b53_device *dev,</div><div class='add'>+				      struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;arl_ops-&gt;arl_read_entry(dev, ent, idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_write_entry(struct b53_device *dev,</div><div class='add'>+				       const struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;arl_ops-&gt;arl_write_entry(dev, ent, idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_search_read(struct b53_device *dev, u8 idx,</div><div class='add'>+				       struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;arl_ops-&gt;arl_search_read(dev, idx, ent);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_BCM47XX</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bcm47xx_nvram.h&gt;</div><div class='hunk'>@@ -339,6 +495,7 @@ void b53_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='ctx'> void b53_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data);</div><div class='ctx'> int b53_get_sset_count(struct dsa_switch *ds, int port, int sset);</div><div class='ctx'> void b53_get_ethtool_phy_stats(struct dsa_switch *ds, int port, uint64_t *data);</div><div class='add'>+int b53_set_ageing_time(struct dsa_switch *ds, unsigned int msecs);</div><div class='ctx'> int b53_br_join(struct dsa_switch *ds, int port, struct dsa_bridge bridge,</div><div class='ctx'> 		bool *tx_fwd_offload, struct netlink_ext_ack *extack);</div><div class='ctx'> void b53_br_leave(struct dsa_switch *ds, int port, struct dsa_bridge bridge);</div><div class='hunk'>@@ -380,11 +537,12 @@ enum dsa_tag_protocol b53_get_tag_protocol(struct dsa_switch *ds, int port,</div><div class='ctx'> 					   enum dsa_tag_protocol mprot);</div><div class='ctx'> void b53_mirror_del(struct dsa_switch *ds, int port,</div><div class='ctx'> 		    struct dsa_mall_mirror_tc_entry *mirror);</div><div class='add'>+int b53_setup_port(struct dsa_switch *ds, int port);</div><div class='ctx'> int b53_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);</div><div class='ctx'> void b53_disable_port(struct dsa_switch *ds, int port);</div><div class='ctx'> void b53_brcm_hdr_setup(struct dsa_switch *ds, int port);</div><div class='ctx'> int b53_eee_init(struct dsa_switch *ds, int port, struct phy_device *phy);</div><div class='del'>-int b53_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *e);</div><div class='add'>+bool b53_support_eee(struct dsa_switch *ds, int port);</div><div class='ctx'> int b53_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *e);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_regs.h b/drivers/net/dsa/b53/b53_regs.h<br/>index bfbcb66bef66..54a278db67c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_regs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_regs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_regs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_regs.h</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #define B53_ARLIO_PAGE			0x05 /* ARL Access */</div><div class='ctx'> #define B53_FRAMEBUF_PAGE		0x06 /* Management frame access */</div><div class='ctx'> #define B53_MEM_ACCESS_PAGE		0x08 /* Memory access */</div><div class='add'>+#define B53_IEEE_PAGE			0x0a /* IEEE 802.1X */</div><div class='ctx'> </div><div class='ctx'> /* PHY Registers */</div><div class='ctx'> #define B53_PORT_MII_PAGE(i)		(0x10 + (i)) /* Port i MII Registers */</div><div class='hunk'>@@ -50,6 +51,9 @@</div><div class='ctx'> /* Jumbo Frame Registers */</div><div class='ctx'> #define B53_JUMBO_PAGE			0x40</div><div class='ctx'> </div><div class='add'>+/* EAP Registers */</div><div class='add'>+#define B53_EAP_PAGE			0x42</div><div class='add'>+</div><div class='ctx'> /* EEE Control Registers Page */</div><div class='ctx'> #define B53_EEE_PAGE			0x92</div><div class='ctx'> </div><div class='hunk'>@@ -92,18 +96,22 @@</div><div class='ctx'> #define   PORT_OVERRIDE_SPEED_10M	(0 &lt;&lt; PORT_OVERRIDE_SPEED_S)</div><div class='ctx'> #define   PORT_OVERRIDE_SPEED_100M	(1 &lt;&lt; PORT_OVERRIDE_SPEED_S)</div><div class='ctx'> #define   PORT_OVERRIDE_SPEED_1000M	(2 &lt;&lt; PORT_OVERRIDE_SPEED_S)</div><div class='add'>+#define   PORT_OVERRIDE_LP_FLOW_25	BIT(3) /* BCM5325 only */</div><div class='ctx'> #define   PORT_OVERRIDE_RV_MII_25	BIT(4) /* BCM5325 only */</div><div class='ctx'> #define   PORT_OVERRIDE_RX_FLOW		BIT(4)</div><div class='ctx'> #define   PORT_OVERRIDE_TX_FLOW		BIT(5)</div><div class='ctx'> #define   PORT_OVERRIDE_SPEED_2000M	BIT(6) /* BCM5301X only, requires setting 1000M */</div><div class='ctx'> #define   PORT_OVERRIDE_EN		BIT(7) /* Use the register contents */</div><div class='ctx'> </div><div class='del'>-/* Power-down mode control */</div><div class='add'>+/* Power-down mode control (8 bit) */</div><div class='ctx'> #define B53_PD_MODE_CTRL_25		0x0f</div><div class='add'>+#define  PD_MODE_PORT_MASK		0x1f</div><div class='add'>+/* Bit 0 also powers down the switch. */</div><div class='add'>+#define  PD_MODE_POWER_DOWN_PORT(i)	BIT(i)</div><div class='ctx'> </div><div class='ctx'> /* IP Multicast control (8 bit) */</div><div class='ctx'> #define B53_IP_MULTICAST_CTRL		0x21</div><div class='del'>-#define  B53_IPMC_FWD_EN		BIT(1)</div><div class='add'>+#define  B53_IP_MC			BIT(0)</div><div class='ctx'> #define  B53_UC_FWD_EN			BIT(6)</div><div class='ctx'> #define  B53_MC_FWD_EN			BIT(7)</div><div class='ctx'> </div><div class='hunk'>@@ -111,6 +119,10 @@</div><div class='ctx'> #define B53_SWITCH_CTRL			0x22</div><div class='ctx'> #define  B53_MII_DUMB_FWDG_EN		BIT(6)</div><div class='ctx'> </div><div class='add'>+/* Protected Port Selection (16 bit) */</div><div class='add'>+#define B53_PROTECTED_PORT_SEL		0x24</div><div class='add'>+#define B53_PROTECTED_PORT_SEL_25	0x26</div><div class='add'>+</div><div class='ctx'> /* (16 bit) */</div><div class='ctx'> #define B53_UC_FLOOD_MASK		0x32</div><div class='ctx'> #define B53_MC_FLOOD_MASK		0x34</div><div class='hunk'>@@ -217,6 +229,13 @@</div><div class='ctx'> #define   BRCM_HDR_P5_EN		BIT(1) /* Enable tagging on port 5 */</div><div class='ctx'> #define   BRCM_HDR_P7_EN		BIT(2) /* Enable tagging on port 7 */</div><div class='ctx'> </div><div class='add'>+/* Aging Time control register (32 bit) */</div><div class='add'>+#define B53_AGING_TIME_CONTROL		0x06</div><div class='add'>+#define B53_AGING_TIME_CONTROL_63XX	0x08</div><div class='add'>+#define  AGE_CHANGE			BIT(20)</div><div class='add'>+#define  AGE_TIME_MASK			0x7ffff</div><div class='add'>+#define  AGE_TIME_MAX			1048575</div><div class='add'>+</div><div class='ctx'> /* Mirror capture control register (16 bit) */</div><div class='ctx'> #define B53_MIR_CAP_CTL			0x10</div><div class='ctx'> #define  CAP_PORT_MASK			0xf</div><div class='hunk'>@@ -310,13 +329,12 @@</div><div class='ctx'> #define B53_ARLTBL_MAC_VID_ENTRY(n)	((0x10 * (n)) + 0x10)</div><div class='ctx'> #define   ARLTBL_MAC_MASK		0xffffffffffffULL</div><div class='ctx'> #define   ARLTBL_VID_S			48</div><div class='del'>-#define   ARLTBL_VID_MASK_25		0xff</div><div class='ctx'> #define   ARLTBL_VID_MASK		0xfff</div><div class='ctx'> #define   ARLTBL_DATA_PORT_ID_S_25	48</div><div class='del'>-#define   ARLTBL_DATA_PORT_ID_MASK_25	0xf</div><div class='del'>-#define   ARLTBL_AGE_25			BIT(61)</div><div class='del'>-#define   ARLTBL_STATIC_25		BIT(62)</div><div class='del'>-#define   ARLTBL_VALID_25		BIT(63)</div><div class='add'>+#define   ARLTBL_DATA_PORT_ID_MASK_25	GENMASK_ULL(53, 48)</div><div class='add'>+#define   ARLTBL_AGE_25			BIT_ULL(61)</div><div class='add'>+#define   ARLTBL_STATIC_25		BIT_ULL(62)</div><div class='add'>+#define   ARLTBL_VALID_25		BIT_ULL(63)</div><div class='ctx'> </div><div class='ctx'> /* ARL Table Data Entry N Registers (32 bit) */</div><div class='ctx'> #define B53_ARLTBL_DATA_ENTRY(n)	((0x10 * (n)) + 0x18)</div><div class='hunk'>@@ -326,12 +344,23 @@</div><div class='ctx'> #define   ARLTBL_STATIC			BIT(15)</div><div class='ctx'> #define   ARLTBL_VALID			BIT(16)</div><div class='ctx'> </div><div class='add'>+/* BCM5389 ARL Table Data Entry N Register format (16 bit) */</div><div class='add'>+#define   ARLTBL_DATA_PORT_ID_MASK_89	GENMASK(8, 0)</div><div class='add'>+#define   ARLTBL_TC_MASK_89		GENMASK(12, 10)</div><div class='add'>+#define   ARLTBL_AGE_89			BIT(13)</div><div class='add'>+#define   ARLTBL_STATIC_89		BIT(14)</div><div class='add'>+#define   ARLTBL_VALID_89		BIT(15)</div><div class='add'>+</div><div class='add'>+/* BCM5325/BCM565 ARL Table VID Entry N Registers (8 bit) */</div><div class='add'>+#define B53_ARLTBL_VID_ENTRY_25(n)	((0x2 * (n)) + 0x30)</div><div class='add'>+</div><div class='ctx'> /* Maximum number of bin entries in the ARL for all switches */</div><div class='ctx'> #define B53_ARLTBL_MAX_BIN_ENTRIES	4</div><div class='ctx'> </div><div class='ctx'> /* ARL Search Control Register (8 bit) */</div><div class='ctx'> #define B53_ARL_SRCH_CTL		0x50</div><div class='ctx'> #define B53_ARL_SRCH_CTL_25		0x20</div><div class='add'>+#define B53_ARL_SRCH_CTL_89		0x30</div><div class='ctx'> #define   ARL_SRCH_VLID			BIT(0)</div><div class='ctx'> #define   ARL_SRCH_STDN			BIT(7)</div><div class='ctx'> </div><div class='hunk'>@@ -339,22 +368,54 @@</div><div class='ctx'> #define B53_ARL_SRCH_ADDR		0x51</div><div class='ctx'> #define B53_ARL_SRCH_ADDR_25		0x22</div><div class='ctx'> #define B53_ARL_SRCH_ADDR_65		0x24</div><div class='add'>+#define B53_ARL_SRCH_ADDR_89		0x31</div><div class='add'>+#define B53_ARL_SRCH_ADDR_63XX		0x32</div><div class='ctx'> #define  ARL_ADDR_MASK			GENMASK(14, 0)</div><div class='ctx'> </div><div class='ctx'> /* ARL Search MAC/VID Result (64 bit) */</div><div class='ctx'> #define B53_ARL_SRCH_RSTL_0_MACVID	0x60</div><div class='add'>+#define B53_ARL_SRCH_RSLT_MACVID_89	0x33</div><div class='add'>+#define B53_ARL_SRCH_RSLT_MACVID_63XX	0x34</div><div class='ctx'> </div><div class='del'>-/* Single register search result on 5325 */</div><div class='add'>+/* Single register search result on 5325/5365 */</div><div class='ctx'> #define B53_ARL_SRCH_RSTL_0_MACVID_25	0x24</div><div class='del'>-/* Single register search result on 5365 */</div><div class='del'>-#define B53_ARL_SRCH_RSTL_0_MACVID_65	0x30</div><div class='add'>+#define   ARL_SRCH_RSLT_PORT_ID_S_25	48</div><div class='add'>+#define   ARL_SRCH_RSLT_PORT_ID_MASK_25	GENMASK_ULL(52, 48)</div><div class='add'>+#define   ARL_SRCH_RSLT_VID_S_25	53</div><div class='add'>+#define   ARL_SRCH_RSLT_VID_MASK_25	GENMASK_ULL(60, 53)</div><div class='add'>+</div><div class='add'>+/* BCM5325/5365 Search result extend register (8 bit) */</div><div class='add'>+#define B53_ARL_SRCH_RSLT_EXT_25	0x2c</div><div class='add'>+#define   ARL_SRCH_RSLT_EXT_MC_MII	BIT(2)</div><div class='ctx'> </div><div class='ctx'> /* ARL Search Data Result (32 bit) */</div><div class='ctx'> #define B53_ARL_SRCH_RSTL_0		0x68</div><div class='ctx'> </div><div class='add'>+/* BCM5389 ARL Search Data Result (16 bit) */</div><div class='add'>+#define B53_ARL_SRCH_RSLT_89		0x3b</div><div class='add'>+</div><div class='ctx'> #define B53_ARL_SRCH_RSTL_MACVID(x)	(B53_ARL_SRCH_RSTL_0_MACVID + ((x) * 0x10))</div><div class='ctx'> #define B53_ARL_SRCH_RSTL(x)		(B53_ARL_SRCH_RSTL_0 + ((x) * 0x10))</div><div class='ctx'> </div><div class='add'>+/* 63XX ARL Search Data Result (16 bit) */</div><div class='add'>+#define B53_ARL_SRCH_RSLT_63XX		0x3c</div><div class='add'>+#define   ARL_SRST_PORT_ID_MASK_63XX	GENMASK(9, 1)</div><div class='add'>+#define   ARL_SRST_TC_MASK_63XX		GENMASK(13, 11)</div><div class='add'>+#define   ARL_SRST_AGE_63XX		BIT(14)</div><div class='add'>+#define   ARL_SRST_STATIC_63XX		BIT(15)</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * IEEE 802.1X Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Multicast DLF Drop Control register (16 bit) */</div><div class='add'>+#define B53_IEEE_MCAST_DLF		0x94</div><div class='add'>+#define B53_IEEE_MCAST_DROP_EN		BIT(11)</div><div class='add'>+</div><div class='add'>+/* Unicast DLF Drop Control register (16 bit) */</div><div class='add'>+#define B53_IEEE_UCAST_DLF		0x96</div><div class='add'>+#define B53_IEEE_UCAST_DROP_EN		BIT(11)</div><div class='add'>+</div><div class='ctx'> /*************************************************************************</div><div class='ctx'>  * Port VLAN Registers</div><div class='ctx'>  *************************************************************************/</div><div class='hunk'>@@ -481,6 +542,17 @@</div><div class='ctx'> #define   JMS_MAX_SIZE			9724</div><div class='ctx'> </div><div class='ctx'> /*************************************************************************</div><div class='add'>+ * EAP Page Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+#define B53_PORT_EAP_CONF(i)		(0x20 + 8 * (i))</div><div class='add'>+#define  EAP_MODE_SHIFT			51</div><div class='add'>+#define  EAP_MODE_SHIFT_63XX		50</div><div class='add'>+#define  EAP_MODE_MASK			(0x3ull &lt;&lt; EAP_MODE_SHIFT)</div><div class='add'>+#define  EAP_MODE_MASK_63XX		(0x3ull &lt;&lt; EAP_MODE_SHIFT_63XX)</div><div class='add'>+#define  EAP_MODE_BASIC			0</div><div class='add'>+#define  EAP_MODE_SIMPLIFIED		3</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='ctx'>  * EEE Configuration Page Registers</div><div class='ctx'>  *************************************************************************/</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_serdes.c b/drivers/net/dsa/b53/b53_serdes.c<br/>index 3f8a491ce885..7460122f6abc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_serdes.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/b53/b53_serdes.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_serdes.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_serdes.c</a></div><div class='hunk'>@@ -99,8 +99,8 @@ static void b53_serdes_an_restart(struct phylink_pcs *pcs)</div><div class='ctx'> 			 SERDES_MII_BLK, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void b53_serdes_get_state(struct phylink_pcs *pcs,</div><div class='del'>-				  struct phylink_link_state *state)</div><div class='add'>+static void b53_serdes_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='add'>+				 struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct b53_device *dev = pcs_to_b53_pcs(pcs)-&gt;dev;</div><div class='ctx'> 	u8 lane = pcs_to_b53_pcs(pcs)-&gt;lane;</div><div class='hunk'>@@ -239,7 +239,6 @@ int b53_serdes_init(struct b53_device *dev, int port)</div><div class='ctx'> 	pcs-&gt;dev = dev;</div><div class='ctx'> 	pcs-&gt;lane = lane;</div><div class='ctx'> 	pcs-&gt;pcs.ops = &amp;b53_pcs_ops;</div><div class='del'>-	pcs-&gt;pcs.neg_mode = true;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c<br/>index 43bde1f583ff..960685596093 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/bcm_sf2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/bcm_sf2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/bcm_sf2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/bcm_sf2.c</a></div><div class='hunk'>@@ -1230,10 +1230,12 @@ static const struct dsa_switch_ops bcm_sf2_ops = {</div><div class='ctx'> 	.resume			= bcm_sf2_sw_resume,</div><div class='ctx'> 	.get_wol		= bcm_sf2_sw_get_wol,</div><div class='ctx'> 	.set_wol		= bcm_sf2_sw_set_wol,</div><div class='add'>+	.port_setup		= b53_setup_port,</div><div class='ctx'> 	.port_enable		= bcm_sf2_port_setup,</div><div class='ctx'> 	.port_disable		= bcm_sf2_port_disable,</div><div class='del'>-	.get_mac_eee		= b53_get_mac_eee,</div><div class='add'>+	.support_eee		= b53_support_eee,</div><div class='ctx'> 	.set_mac_eee		= b53_set_mac_eee,</div><div class='add'>+	.set_ageing_time	= b53_set_ageing_time,</div><div class='ctx'> 	.port_bridge_join	= b53_br_join,</div><div class='ctx'> 	.port_bridge_leave	= b53_br_leave,</div><div class='ctx'> 	.port_pre_bridge_flags	= b53_br_flags_pre,</div><div class='head'>diff --git a/drivers/net/dsa/dsa_loop.c b/drivers/net/dsa/dsa_loop.c<br/>index adbab544c60f..4a416f2717ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/dsa_loop.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/dsa_loop.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/dsa_loop.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/dsa_loop.c</a></div><div class='hunk'>@@ -17,7 +17,19 @@</div><div class='ctx'> #include &lt;linux/dsa/loop.h&gt;</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "dsa_loop.h"</div><div class='add'>+#define DSA_LOOP_NUM_PORTS	6</div><div class='add'>+#define DSA_LOOP_CPU_PORT	(DSA_LOOP_NUM_PORTS - 1)</div><div class='add'>+#define NUM_FIXED_PHYS		(DSA_LOOP_NUM_PORTS - 2)</div><div class='add'>+</div><div class='add'>+struct dsa_loop_pdata {</div><div class='add'>+	/* Must be first, such that dsa_register_switch() can access this</div><div class='add'>+	 * without gory pointer manipulations</div><div class='add'>+	 */</div><div class='add'>+	struct dsa_chip_data cd;</div><div class='add'>+	const char *name;</div><div class='add'>+	unsigned int enabled_ports;</div><div class='add'>+	const char *netdev;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static struct dsa_loop_mib_entry dsa_loop_mibs[] = {</div><div class='ctx'> 	[DSA_LOOP_PHY_READ_OK]	= { "phy_read_ok", },</div><div class='hunk'>@@ -27,6 +39,7 @@ static struct dsa_loop_mib_entry dsa_loop_mibs[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct phy_device *phydevs[PHY_MAX_ADDR];</div><div class='add'>+static struct mdio_device *switch_mdiodev;</div><div class='ctx'> </div><div class='ctx'> enum dsa_loop_devlink_resource_id {</div><div class='ctx'> 	DSA_LOOP_DEVLINK_PARAM_ID_VTU,</div><div class='hunk'>@@ -382,34 +395,68 @@ static struct mdio_driver dsa_loop_drv = {</div><div class='ctx'> 	.shutdown = dsa_loop_drv_shutdown,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define NUM_FIXED_PHYS	(DSA_LOOP_NUM_PORTS - 2)</div><div class='del'>-</div><div class='ctx'> static void dsa_loop_phydevs_unregister(void)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; NUM_FIXED_PHYS; i++)</div><div class='del'>-		if (!IS_ERR(phydevs[i])) {</div><div class='add'>+	for (int i = 0; i &lt; NUM_FIXED_PHYS; i++) {</div><div class='add'>+		if (!IS_ERR(phydevs[i]))</div><div class='ctx'> 			fixed_phy_unregister(phydevs[i]);</div><div class='del'>-			phy_device_free(phydevs[i]);</div><div class='del'>-		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init dsa_loop_init(void)</div><div class='add'>+static int __init dsa_loop_create_switch_mdiodev(void)</div><div class='ctx'> {</div><div class='del'>-	struct fixed_phy_status status = {</div><div class='del'>-		.link = 1,</div><div class='del'>-		.speed = SPEED_100,</div><div class='del'>-		.duplex = DUPLEX_FULL,</div><div class='add'>+	static struct dsa_loop_pdata dsa_loop_pdata = {</div><div class='add'>+		.cd = {</div><div class='add'>+			.port_names[0] = "lan1",</div><div class='add'>+			.port_names[1] = "lan2",</div><div class='add'>+			.port_names[2] = "lan3",</div><div class='add'>+			.port_names[3] = "lan4",</div><div class='add'>+			.port_names[DSA_LOOP_CPU_PORT] = "cpu",</div><div class='add'>+		},</div><div class='add'>+		.name = "DSA mockup driver",</div><div class='add'>+		.enabled_ports = 0x1f,</div><div class='add'>+		.netdev = "eth0",</div><div class='ctx'> 	};</div><div class='del'>-	unsigned int i, ret;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int ret = -ENODEV;</div><div class='add'>+</div><div class='add'>+	bus = mdio_find_bus("fixed-0");</div><div class='add'>+	if (WARN_ON(!bus))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch_mdiodev = mdio_device_create(bus, 31);</div><div class='add'>+	if (IS_ERR(switch_mdiodev))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	strscpy(switch_mdiodev-&gt;modalias, "dsa-loop");</div><div class='add'>+	switch_mdiodev-&gt;dev.platform_data = &amp;dsa_loop_pdata;</div><div class='add'>+</div><div class='add'>+	ret = mdio_device_register(switch_mdiodev);</div><div class='add'>+	if (ret)</div><div class='add'>+		mdio_device_free(switch_mdiodev);</div><div class='add'>+out:</div><div class='add'>+	put_device(&amp;bus-&gt;dev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init dsa_loop_init(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = dsa_loop_create_switch_mdiodev();</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; NUM_FIXED_PHYS; i++)</div><div class='del'>-		phydevs[i] = fixed_phy_register(PHY_POLL, &amp;status, NULL);</div><div class='add'>+		phydevs[i] = fixed_phy_register_100fd();</div><div class='ctx'> </div><div class='ctx'> 	ret = mdio_driver_register(&amp;dsa_loop_drv);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='ctx'> 		dsa_loop_phydevs_unregister();</div><div class='add'>+		mdio_device_remove(switch_mdiodev);</div><div class='add'>+		mdio_device_free(switch_mdiodev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -419,10 +466,11 @@ static void __exit dsa_loop_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	mdio_driver_unregister(&amp;dsa_loop_drv);</div><div class='ctx'> 	dsa_loop_phydevs_unregister();</div><div class='add'>+	mdio_device_remove(switch_mdiodev);</div><div class='add'>+	mdio_device_free(switch_mdiodev);</div><div class='ctx'> }</div><div class='ctx'> module_exit(dsa_loop_exit);</div><div class='ctx'> </div><div class='del'>-MODULE_SOFTDEP("pre: dsa_loop_bdinfo");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Florian Fainelli");</div><div class='ctx'> MODULE_DESCRIPTION("DSA loopback driver");</div><div class='head'>diff --git a/drivers/net/dsa/dsa_loop.h b/drivers/net/dsa/dsa_loop.h<br/>deleted file mode 100644<br/>index 93e5c15d0efd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/dsa_loop.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/dsa_loop.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-#ifndef __DSA_LOOP_H</div><div class='del'>-#define __DSA_LOOP_H</div><div class='del'>-</div><div class='del'>-struct dsa_chip_data;</div><div class='del'>-</div><div class='del'>-struct dsa_loop_pdata {</div><div class='del'>-	/* Must be first, such that dsa_register_switch() can access this</div><div class='del'>-	 * without gory pointer manipulations</div><div class='del'>-	 */</div><div class='del'>-	struct dsa_chip_data cd;</div><div class='del'>-	const char *name;</div><div class='del'>-	unsigned int enabled_ports;</div><div class='del'>-	const char *netdev;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define DSA_LOOP_NUM_PORTS	6</div><div class='del'>-#define DSA_LOOP_CPU_PORT	(DSA_LOOP_NUM_PORTS - 1)</div><div class='del'>-</div><div class='del'>-#endif /* __DSA_LOOP_H */</div><div class='head'>diff --git a/drivers/net/dsa/dsa_loop_bdinfo.c b/drivers/net/dsa/dsa_loop_bdinfo.c<br/>deleted file mode 100644<br/>index 14ca42491512..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/dsa_loop_bdinfo.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/dsa_loop_bdinfo.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;net/dsa.h&gt;</div><div class='del'>-</div><div class='del'>-#include "dsa_loop.h"</div><div class='del'>-</div><div class='del'>-static struct dsa_loop_pdata dsa_loop_pdata = {</div><div class='del'>-	.cd = {</div><div class='del'>-		.port_names[0] = "lan1",</div><div class='del'>-		.port_names[1] = "lan2",</div><div class='del'>-		.port_names[2] = "lan3",</div><div class='del'>-		.port_names[3] = "lan4",</div><div class='del'>-		.port_names[DSA_LOOP_CPU_PORT] = "cpu",</div><div class='del'>-	},</div><div class='del'>-	.name = "DSA mockup driver",</div><div class='del'>-	.enabled_ports = 0x1f,</div><div class='del'>-	.netdev = "eth0",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct mdio_board_info bdinfo = {</div><div class='del'>-	.bus_id	= "fixed-0",</div><div class='del'>-	.modalias = "dsa-loop",</div><div class='del'>-	.mdio_addr = 31,</div><div class='del'>-	.platform_data = &amp;dsa_loop_pdata,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init dsa_loop_bdinfo_init(void)</div><div class='del'>-{</div><div class='del'>-	return mdiobus_register_board_info(&amp;bdinfo, 1);</div><div class='del'>-}</div><div class='del'>-arch_initcall(dsa_loop_bdinfo_init)</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("DSA mock-up switch driver");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek.c b/drivers/net/dsa/hirschmann/hellcreek.c<br/>index 283ec5a6e23c..dd5f263ab984 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/hirschmann/hellcreek.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek.c</a></div><div class='hunk'>@@ -1061,7 +1061,7 @@ static void hellcreek_setup_tc_identity_mapping(struct hellcreek *hellcreek)</div><div class='ctx'> </div><div class='ctx'> static int hellcreek_setup_fdb(struct hellcreek *hellcreek)</div><div class='ctx'> {</div><div class='del'>-	static struct hellcreek_fdb_entry l2_ptp = {</div><div class='add'>+	static const struct hellcreek_fdb_entry l2_ptp = {</div><div class='ctx'> 		/* MAC: 01-1B-19-00-00-00 */</div><div class='ctx'> 		.mac	      = { 0x01, 0x1b, 0x19, 0x00, 0x00, 0x00 },</div><div class='ctx'> 		.portmask     = 0x03,	/* Management ports */</div><div class='hunk'>@@ -1072,7 +1072,7 @@ static int hellcreek_setup_fdb(struct hellcreek *hellcreek)</div><div class='ctx'> 		.reprio_tc    = 6,	/* TC: 6 as per IEEE 802.1AS */</div><div class='ctx'> 		.reprio_en    = 1,</div><div class='ctx'> 	};</div><div class='del'>-	static struct hellcreek_fdb_entry udp4_ptp = {</div><div class='add'>+	static const struct hellcreek_fdb_entry udp4_ptp = {</div><div class='ctx'> 		/* MAC: 01-00-5E-00-01-81 */</div><div class='ctx'> 		.mac	      = { 0x01, 0x00, 0x5e, 0x00, 0x01, 0x81 },</div><div class='ctx'> 		.portmask     = 0x03,	/* Management ports */</div><div class='hunk'>@@ -1083,7 +1083,7 @@ static int hellcreek_setup_fdb(struct hellcreek *hellcreek)</div><div class='ctx'> 		.reprio_tc    = 6,</div><div class='ctx'> 		.reprio_en    = 1,</div><div class='ctx'> 	};</div><div class='del'>-	static struct hellcreek_fdb_entry udp6_ptp = {</div><div class='add'>+	static const struct hellcreek_fdb_entry udp6_ptp = {</div><div class='ctx'> 		/* MAC: 33-33-00-00-01-81 */</div><div class='ctx'> 		.mac	      = { 0x33, 0x33, 0x00, 0x00, 0x01, 0x81 },</div><div class='ctx'> 		.portmask     = 0x03,	/* Management ports */</div><div class='hunk'>@@ -1094,7 +1094,7 @@ static int hellcreek_setup_fdb(struct hellcreek *hellcreek)</div><div class='ctx'> 		.reprio_tc    = 6,</div><div class='ctx'> 		.reprio_en    = 1,</div><div class='ctx'> 	};</div><div class='del'>-	static struct hellcreek_fdb_entry l2_p2p = {</div><div class='add'>+	static const struct hellcreek_fdb_entry l2_p2p = {</div><div class='ctx'> 		/* MAC: 01-80-C2-00-00-0E */</div><div class='ctx'> 		.mac	      = { 0x01, 0x80, 0xc2, 0x00, 0x00, 0x0e },</div><div class='ctx'> 		.portmask     = 0x03,	/* Management ports */</div><div class='hunk'>@@ -1105,7 +1105,7 @@ static int hellcreek_setup_fdb(struct hellcreek *hellcreek)</div><div class='ctx'> 		.reprio_tc    = 6,	/* TC: 6 as per IEEE 802.1AS */</div><div class='ctx'> 		.reprio_en    = 1,</div><div class='ctx'> 	};</div><div class='del'>-	static struct hellcreek_fdb_entry udp4_p2p = {</div><div class='add'>+	static const struct hellcreek_fdb_entry udp4_p2p = {</div><div class='ctx'> 		/* MAC: 01-00-5E-00-00-6B */</div><div class='ctx'> 		.mac	      = { 0x01, 0x00, 0x5e, 0x00, 0x00, 0x6b },</div><div class='ctx'> 		.portmask     = 0x03,	/* Management ports */</div><div class='hunk'>@@ -1116,7 +1116,7 @@ static int hellcreek_setup_fdb(struct hellcreek *hellcreek)</div><div class='ctx'> 		.reprio_tc    = 6,</div><div class='ctx'> 		.reprio_en    = 1,</div><div class='ctx'> 	};</div><div class='del'>-	static struct hellcreek_fdb_entry udp6_p2p = {</div><div class='add'>+	static const struct hellcreek_fdb_entry udp6_p2p = {</div><div class='ctx'> 		/* MAC: 33-33-00-00-00-6B */</div><div class='ctx'> 		.mac	      = { 0x33, 0x33, 0x00, 0x00, 0x00, 0x6b },</div><div class='ctx'> 		.portmask     = 0x03,	/* Management ports */</div><div class='hunk'>@@ -1127,7 +1127,7 @@ static int hellcreek_setup_fdb(struct hellcreek *hellcreek)</div><div class='ctx'> 		.reprio_tc    = 6,</div><div class='ctx'> 		.reprio_en    = 1,</div><div class='ctx'> 	};</div><div class='del'>-	static struct hellcreek_fdb_entry stp = {</div><div class='add'>+	static const struct hellcreek_fdb_entry stp = {</div><div class='ctx'> 		/* MAC: 01-80-C2-00-00-00 */</div><div class='ctx'> 		.mac	      = { 0x01, 0x80, 0xc2, 0x00, 0x00, 0x00 },</div><div class='ctx'> 		.portmask     = 0x03,	/* Management ports */</div><div class='hunk'>@@ -1320,13 +1320,13 @@ static int hellcreek_devlink_region_fdb_snapshot(struct devlink *dl,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct devlink_region_ops hellcreek_region_vlan_ops = {</div><div class='add'>+static const struct devlink_region_ops hellcreek_region_vlan_ops = {</div><div class='ctx'> 	.name	    = "vlan",</div><div class='ctx'> 	.snapshot   = hellcreek_devlink_region_vlan_snapshot,</div><div class='ctx'> 	.destructor = kfree,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct devlink_region_ops hellcreek_region_fdb_ops = {</div><div class='add'>+static const struct devlink_region_ops hellcreek_region_fdb_ops = {</div><div class='ctx'> 	.name	    = "fdb",</div><div class='ctx'> 	.snapshot   = hellcreek_devlink_region_fdb_snapshot,</div><div class='ctx'> 	.destructor = kfree,</div><div class='hunk'>@@ -1335,7 +1335,7 @@ static struct devlink_region_ops hellcreek_region_fdb_ops = {</div><div class='ctx'> static int hellcreek_setup_devlink_regions(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='ctx'> 	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='del'>-	struct devlink_region_ops *ops;</div><div class='add'>+	const struct devlink_region_ops *ops;</div><div class='ctx'> 	struct devlink_region *region;</div><div class='ctx'> 	u64 size;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1926,6 +1926,8 @@ static const struct dsa_switch_ops hellcreek_ds_ops = {</div><div class='ctx'> 	.port_vlan_filtering   = hellcreek_vlan_filtering,</div><div class='ctx'> 	.setup		       = hellcreek_setup,</div><div class='ctx'> 	.teardown	       = hellcreek_teardown,</div><div class='add'>+	.port_hsr_join	       = dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave	       = dsa_port_simple_hsr_leave,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int hellcreek_probe(struct platform_device *pdev)</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek.h b/drivers/net/dsa/hirschmann/hellcreek.h<br/>index 9c2ed2ba79da..bebf0d3ff330 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/hirschmann/hellcreek.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek.h</a></div><div class='hunk'>@@ -244,7 +244,7 @@ struct hellcreek_port_hwtstamp {</div><div class='ctx'> 	struct sk_buff *tx_skb;</div><div class='ctx'> </div><div class='ctx'> 	/* Current timestamp configuration */</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct hellcreek_port {</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c b/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c<br/>index ca2500aba96f..99941ff1ebf9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c</a></div><div class='hunk'>@@ -40,7 +40,7 @@ int hellcreek_get_ts_info(struct dsa_switch *ds, int port,</div><div class='ctx'>  * the user requested what is actually available or not</div><div class='ctx'>  */</div><div class='ctx'> static int hellcreek_set_hwtstamp_config(struct hellcreek *hellcreek, int port,</div><div class='del'>-					 struct hwtstamp_config *config)</div><div class='add'>+					 struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct hellcreek_port_hwtstamp *ps =</div><div class='ctx'> 		&amp;hellcreek-&gt;ports[port].port_hwtstamp;</div><div class='hunk'>@@ -110,41 +110,35 @@ static int hellcreek_set_hwtstamp_config(struct hellcreek *hellcreek, int port,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int hellcreek_port_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='del'>-				struct ifreq *ifr)</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='ctx'> 	struct hellcreek_port_hwtstamp *ps;</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	ps = &amp;hellcreek-&gt;ports[port].port_hwtstamp;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	err = hellcreek_set_hwtstamp_config(hellcreek, port, &amp;config);</div><div class='add'>+	err = hellcreek_set_hwtstamp_config(hellcreek, port, config);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* Save the chosen configuration to be returned later */</div><div class='del'>-	memcpy(&amp;ps-&gt;tstamp_config, &amp;config, sizeof(config));</div><div class='add'>+	ps-&gt;tstamp_config = *config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int hellcreek_port_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='del'>-				struct ifreq *ifr)</div><div class='add'>+				struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='ctx'> 	struct hellcreek_port_hwtstamp *ps;</div><div class='del'>-	struct hwtstamp_config *config;</div><div class='ctx'> </div><div class='ctx'> 	ps = &amp;hellcreek-&gt;ports[port].port_hwtstamp;</div><div class='del'>-	config = &amp;ps-&gt;tstamp_config;</div><div class='add'>+	*config = ps-&gt;tstamp_config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, config, sizeof(*config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Returns a pointer to the PTP header if the caller should time stamp, or NULL</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h b/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h<br/>index 7d88da2134f2..388821c4aa10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h</a></div><div class='hunk'>@@ -38,9 +38,10 @@</div><div class='ctx'> #define TX_TSTAMP_TIMEOUT	msecs_to_jiffies(40)</div><div class='ctx'> </div><div class='ctx'> int hellcreek_port_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='del'>-				struct ifreq *ifr);</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack);</div><div class='ctx'> int hellcreek_port_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='del'>-				struct ifreq *ifr);</div><div class='add'>+				struct kernel_hwtstamp_config *config);</div><div class='ctx'> </div><div class='ctx'> bool hellcreek_port_rxtstamp(struct dsa_switch *ds, int port,</div><div class='ctx'> 			     struct sk_buff *clone, unsigned int type);</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek_ptp.c b/drivers/net/dsa/hirschmann/hellcreek_ptp.c<br/>index bfe21f9f7dcd..cb23bea9c21b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/hirschmann/hellcreek_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek_ptp.c</a></div><div class='hunk'>@@ -376,8 +376,18 @@ static int hellcreek_led_setup(struct hellcreek *hellcreek)</div><div class='ctx'> 		hellcreek_set_brightness(hellcreek, STATUS_OUT_IS_GM, 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Register both leds */</div><div class='del'>-	led_classdev_register(hellcreek-&gt;dev, &amp;hellcreek-&gt;led_sync_good);</div><div class='del'>-	led_classdev_register(hellcreek-&gt;dev, &amp;hellcreek-&gt;led_is_gm);</div><div class='add'>+	ret = led_classdev_register(hellcreek-&gt;dev, &amp;hellcreek-&gt;led_sync_good);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "Failed to register sync_good LED\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = led_classdev_register(hellcreek-&gt;dev, &amp;hellcreek-&gt;led_is_gm);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "Failed to register is_gm LED\n");</div><div class='add'>+		led_classdev_unregister(&amp;hellcreek-&gt;led_sync_good);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/ks8995.c b/drivers/net/dsa/ks8995.c<br/>new file mode 100644<br/>index 000000000000..77d8b842693c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ks8995.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ks8995.c</a></div><div class='hunk'>@@ -0,0 +1,857 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * SPI driver for Micrel/Kendin KS8995M and KSZ8864RMN ethernet switches</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2008 Gabor Juhos &lt;juhosg at openwrt.org&gt;</div><div class='add'>+ * Copyright (C) 2025 Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file was based on: drivers/spi/at25.c</div><div class='add'>+ *     Copyright (C) 2006 David Brownell</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_VERSION		"0.1.1"</div><div class='add'>+#define DRV_DESC		"Micrel KS8995 Ethernet switch SPI driver"</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_ID0		0x00    /* Chip ID0 */</div><div class='add'>+#define KS8995_REG_ID1		0x01    /* Chip ID1 */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_GC0		0x02    /* Global Control 0 */</div><div class='add'>+</div><div class='add'>+#define KS8995_GC0_P5_PHY	BIT(3)	/* Port 5 PHY enabled */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_GC1		0x03    /* Global Control 1 */</div><div class='add'>+#define KS8995_REG_GC2		0x04    /* Global Control 2 */</div><div class='add'>+</div><div class='add'>+#define KS8995_GC2_HUGE		BIT(2)	/* Huge packet support */</div><div class='add'>+#define KS8995_GC2_LEGAL	BIT(1)	/* Legal size override */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_GC3		0x05    /* Global Control 3 */</div><div class='add'>+#define KS8995_REG_GC4		0x06    /* Global Control 4 */</div><div class='add'>+</div><div class='add'>+#define KS8995_GC4_10BT		BIT(4)	/* Force switch to 10Mbit */</div><div class='add'>+#define KS8995_GC4_MII_FLOW	BIT(5)	/* MII full-duplex flow control enable */</div><div class='add'>+#define KS8995_GC4_MII_HD	BIT(6)	/* MII half-duplex mode enable */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_GC5		0x07    /* Global Control 5 */</div><div class='add'>+#define KS8995_REG_GC6		0x08    /* Global Control 6 */</div><div class='add'>+#define KS8995_REG_GC7		0x09    /* Global Control 7 */</div><div class='add'>+#define KS8995_REG_GC8		0x0a    /* Global Control 8 */</div><div class='add'>+#define KS8995_REG_GC9		0x0b    /* Global Control 9 */</div><div class='add'>+</div><div class='add'>+#define KS8995_GC9_SPECIAL	BIT(0)	/* Special tagging mode (DSA) */</div><div class='add'>+</div><div class='add'>+/* In DSA the ports 1-4 are numbered 0-3 and the CPU port is port 4 */</div><div class='add'>+#define KS8995_REG_PC(p, r)	(0x10 + (0x10 * (p)) + (r)) /* Port Control */</div><div class='add'>+#define KS8995_REG_PS(p, r)	(0x1e + (0x10 * (p)) + (r)) /* Port Status */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_PC0		0x00    /* Port Control 0 */</div><div class='add'>+#define KS8995_REG_PC1		0x01    /* Port Control 1 */</div><div class='add'>+#define KS8995_REG_PC2		0x02    /* Port Control 2 */</div><div class='add'>+#define KS8995_REG_PC3		0x03    /* Port Control 3 */</div><div class='add'>+#define KS8995_REG_PC4		0x04    /* Port Control 4 */</div><div class='add'>+#define KS8995_REG_PC5		0x05    /* Port Control 5 */</div><div class='add'>+#define KS8995_REG_PC6		0x06    /* Port Control 6 */</div><div class='add'>+#define KS8995_REG_PC7		0x07    /* Port Control 7 */</div><div class='add'>+#define KS8995_REG_PC8		0x08    /* Port Control 8 */</div><div class='add'>+#define KS8995_REG_PC9		0x09    /* Port Control 9 */</div><div class='add'>+#define KS8995_REG_PC10		0x0a    /* Port Control 10 */</div><div class='add'>+#define KS8995_REG_PC11		0x0b    /* Port Control 11 */</div><div class='add'>+#define KS8995_REG_PC12		0x0c    /* Port Control 12 */</div><div class='add'>+#define KS8995_REG_PC13		0x0d    /* Port Control 13 */</div><div class='add'>+</div><div class='add'>+#define KS8995_PC0_TAG_INS	BIT(2)	/* Enable tag insertion on port */</div><div class='add'>+#define KS8995_PC0_TAG_REM	BIT(1)	/* Enable tag removal on port */</div><div class='add'>+#define KS8995_PC0_PRIO_EN	BIT(0)	/* Enable priority handling */</div><div class='add'>+</div><div class='add'>+#define KS8995_PC2_TXEN		BIT(2)	/* Enable TX on port */</div><div class='add'>+#define KS8995_PC2_RXEN		BIT(1)	/* Enable RX on port */</div><div class='add'>+#define KS8995_PC2_LEARN_DIS	BIT(0)	/* Disable learning on port */</div><div class='add'>+</div><div class='add'>+#define KS8995_PC13_TXDIS	BIT(6)	/* Disable transmitter */</div><div class='add'>+#define KS8995_PC13_PWDN	BIT(3)	/* Power down */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_TPC0		0x60    /* TOS Priority Control 0 */</div><div class='add'>+#define KS8995_REG_TPC1		0x61    /* TOS Priority Control 1 */</div><div class='add'>+#define KS8995_REG_TPC2		0x62    /* TOS Priority Control 2 */</div><div class='add'>+#define KS8995_REG_TPC3		0x63    /* TOS Priority Control 3 */</div><div class='add'>+#define KS8995_REG_TPC4		0x64    /* TOS Priority Control 4 */</div><div class='add'>+#define KS8995_REG_TPC5		0x65    /* TOS Priority Control 5 */</div><div class='add'>+#define KS8995_REG_TPC6		0x66    /* TOS Priority Control 6 */</div><div class='add'>+#define KS8995_REG_TPC7		0x67    /* TOS Priority Control 7 */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_MAC0		0x68    /* MAC address 0 */</div><div class='add'>+#define KS8995_REG_MAC1		0x69    /* MAC address 1 */</div><div class='add'>+#define KS8995_REG_MAC2		0x6a    /* MAC address 2 */</div><div class='add'>+#define KS8995_REG_MAC3		0x6b    /* MAC address 3 */</div><div class='add'>+#define KS8995_REG_MAC4		0x6c    /* MAC address 4 */</div><div class='add'>+#define KS8995_REG_MAC5		0x6d    /* MAC address 5 */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_IAC0		0x6e    /* Indirect Access Control 0 */</div><div class='add'>+#define KS8995_REG_IAC1		0x6f    /* Indirect Access Control 0 */</div><div class='add'>+#define KS8995_REG_IAD7		0x70    /* Indirect Access Data 7 */</div><div class='add'>+#define KS8995_REG_IAD6		0x71    /* Indirect Access Data 6 */</div><div class='add'>+#define KS8995_REG_IAD5		0x72    /* Indirect Access Data 5 */</div><div class='add'>+#define KS8995_REG_IAD4		0x73    /* Indirect Access Data 4 */</div><div class='add'>+#define KS8995_REG_IAD3		0x74    /* Indirect Access Data 3 */</div><div class='add'>+#define KS8995_REG_IAD2		0x75    /* Indirect Access Data 2 */</div><div class='add'>+#define KS8995_REG_IAD1		0x76    /* Indirect Access Data 1 */</div><div class='add'>+#define KS8995_REG_IAD0		0x77    /* Indirect Access Data 0 */</div><div class='add'>+</div><div class='add'>+#define KSZ8864_REG_ID1		0xfe	/* Chip ID in bit 7 */</div><div class='add'>+</div><div class='add'>+#define KS8995_REGS_SIZE	0x80</div><div class='add'>+#define KSZ8864_REGS_SIZE	0x100</div><div class='add'>+#define KSZ8795_REGS_SIZE	0x100</div><div class='add'>+</div><div class='add'>+#define ID1_CHIPID_M		0xf</div><div class='add'>+#define ID1_CHIPID_S		4</div><div class='add'>+#define ID1_REVISION_M		0x7</div><div class='add'>+#define ID1_REVISION_S		1</div><div class='add'>+#define ID1_START_SW		1	/* start the switch */</div><div class='add'>+</div><div class='add'>+#define FAMILY_KS8995		0x95</div><div class='add'>+#define FAMILY_KSZ8795		0x87</div><div class='add'>+#define CHIPID_M		0</div><div class='add'>+#define KS8995_CHIP_ID		0x00</div><div class='add'>+#define KSZ8864_CHIP_ID		0x01</div><div class='add'>+#define KSZ8795_CHIP_ID		0x09</div><div class='add'>+</div><div class='add'>+#define KS8995_CMD_WRITE	0x02U</div><div class='add'>+#define KS8995_CMD_READ		0x03U</div><div class='add'>+</div><div class='add'>+#define KS8995_CPU_PORT		4</div><div class='add'>+#define KS8995_NUM_PORTS	5 /* 5 ports including the CPU port */</div><div class='add'>+#define KS8995_RESET_DELAY	10 /* usec */</div><div class='add'>+</div><div class='add'>+enum ks8995_chip_variant {</div><div class='add'>+	ks8995,</div><div class='add'>+	ksz8864,</div><div class='add'>+	ksz8795,</div><div class='add'>+	max_variant</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ks8995_chip_params {</div><div class='add'>+	char *name;</div><div class='add'>+	int family_id;</div><div class='add'>+	int chip_id;</div><div class='add'>+	int regs_size;</div><div class='add'>+	int addr_width;</div><div class='add'>+	int addr_shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ks8995_chip_params ks8995_chip[] = {</div><div class='add'>+	[ks8995] = {</div><div class='add'>+		.name = "KS8995MA",</div><div class='add'>+		.family_id = FAMILY_KS8995,</div><div class='add'>+		.chip_id = KS8995_CHIP_ID,</div><div class='add'>+		.regs_size = KS8995_REGS_SIZE,</div><div class='add'>+		.addr_width = 8,</div><div class='add'>+		.addr_shift = 0,</div><div class='add'>+	},</div><div class='add'>+	[ksz8864] = {</div><div class='add'>+		.name = "KSZ8864RMN",</div><div class='add'>+		.family_id = FAMILY_KS8995,</div><div class='add'>+		.chip_id = KSZ8864_CHIP_ID,</div><div class='add'>+		.regs_size = KSZ8864_REGS_SIZE,</div><div class='add'>+		.addr_width = 8,</div><div class='add'>+		.addr_shift = 0,</div><div class='add'>+	},</div><div class='add'>+	[ksz8795] = {</div><div class='add'>+		.name = "KSZ8795CLX",</div><div class='add'>+		.family_id = FAMILY_KSZ8795,</div><div class='add'>+		.chip_id = KSZ8795_CHIP_ID,</div><div class='add'>+		.regs_size = KSZ8795_REGS_SIZE,</div><div class='add'>+		.addr_width = 12,</div><div class='add'>+		.addr_shift = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ks8995_switch {</div><div class='add'>+	struct spi_device	*spi;</div><div class='add'>+	struct device		*dev;</div><div class='add'>+	struct dsa_switch	*ds;</div><div class='add'>+	struct mutex		lock;</div><div class='add'>+	struct gpio_desc	*reset_gpio;</div><div class='add'>+	struct bin_attribute	regs_attr;</div><div class='add'>+	const struct ks8995_chip_params	*chip;</div><div class='add'>+	int			revision_id;</div><div class='add'>+	unsigned int max_mtu[KS8995_NUM_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id ks8995_id[] = {</div><div class='add'>+	{"ks8995", ks8995},</div><div class='add'>+	{"ksz8864", ksz8864},</div><div class='add'>+	{"ksz8795", ksz8795},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, ks8995_id);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ks8995_spi_of_match[] = {</div><div class='add'>+	{ .compatible = "micrel,ks8995" },</div><div class='add'>+	{ .compatible = "micrel,ksz8864" },</div><div class='add'>+	{ .compatible = "micrel,ksz8795" },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ks8995_spi_of_match);</div><div class='add'>+</div><div class='add'>+static inline u8 get_chip_id(u8 val)</div><div class='add'>+{</div><div class='add'>+	return (val &gt;&gt; ID1_CHIPID_S) &amp; ID1_CHIPID_M;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 get_chip_rev(u8 val)</div><div class='add'>+{</div><div class='add'>+	return (val &gt;&gt; ID1_REVISION_S) &amp; ID1_REVISION_M;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* create_spi_cmd - create a chip specific SPI command header</div><div class='add'>+ * @ks: pointer to switch instance</div><div class='add'>+ * @cmd: SPI command for switch</div><div class='add'>+ * @address: register address for command</div><div class='add'>+ *</div><div class='add'>+ * Different chip families use different bit pattern to address the switches</div><div class='add'>+ * registers:</div><div class='add'>+ *</div><div class='add'>+ * KS8995: 8bit command + 8bit address</div><div class='add'>+ * KSZ8795: 3bit command + 12bit address + 1bit TR (?)</div><div class='add'>+ */</div><div class='add'>+static inline __be16 create_spi_cmd(struct ks8995_switch *ks, int cmd,</div><div class='add'>+				    unsigned address)</div><div class='add'>+{</div><div class='add'>+	u16 result = cmd;</div><div class='add'>+</div><div class='add'>+	/* make room for address (incl. address shift) */</div><div class='add'>+	result &lt;&lt;= ks-&gt;chip-&gt;addr_width + ks-&gt;chip-&gt;addr_shift;</div><div class='add'>+	/* add address */</div><div class='add'>+	result |= address &lt;&lt; ks-&gt;chip-&gt;addr_shift;</div><div class='add'>+	/* SPI protocol needs big endian */</div><div class='add'>+	return cpu_to_be16(result);</div><div class='add'>+}</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+static int ks8995_read(struct ks8995_switch *ks, char *buf,</div><div class='add'>+		 unsigned offset, size_t count)</div><div class='add'>+{</div><div class='add'>+	__be16 cmd;</div><div class='add'>+	struct spi_transfer t[2];</div><div class='add'>+	struct spi_message m;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = create_spi_cmd(ks, KS8995_CMD_READ, offset);</div><div class='add'>+	spi_message_init(&amp;m);</div><div class='add'>+</div><div class='add'>+	memset(&amp;t, 0, sizeof(t));</div><div class='add'>+</div><div class='add'>+	t[0].tx_buf = &amp;cmd;</div><div class='add'>+	t[0].len = sizeof(cmd);</div><div class='add'>+	spi_message_add_tail(&amp;t[0], &amp;m);</div><div class='add'>+</div><div class='add'>+	t[1].rx_buf = buf;</div><div class='add'>+	t[1].len = count;</div><div class='add'>+	spi_message_add_tail(&amp;t[1], &amp;m);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ks-&gt;lock);</div><div class='add'>+	err = spi_sync(ks-&gt;spi, &amp;m);</div><div class='add'>+	mutex_unlock(&amp;ks-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return err ? err : count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_write(struct ks8995_switch *ks, char *buf,</div><div class='add'>+		 unsigned offset, size_t count)</div><div class='add'>+{</div><div class='add'>+	__be16 cmd;</div><div class='add'>+	struct spi_transfer t[2];</div><div class='add'>+	struct spi_message m;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = create_spi_cmd(ks, KS8995_CMD_WRITE, offset);</div><div class='add'>+	spi_message_init(&amp;m);</div><div class='add'>+</div><div class='add'>+	memset(&amp;t, 0, sizeof(t));</div><div class='add'>+</div><div class='add'>+	t[0].tx_buf = &amp;cmd;</div><div class='add'>+	t[0].len = sizeof(cmd);</div><div class='add'>+	spi_message_add_tail(&amp;t[0], &amp;m);</div><div class='add'>+</div><div class='add'>+	t[1].tx_buf = buf;</div><div class='add'>+	t[1].len = count;</div><div class='add'>+	spi_message_add_tail(&amp;t[1], &amp;m);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ks-&gt;lock);</div><div class='add'>+	err = spi_sync(ks-&gt;spi, &amp;m);</div><div class='add'>+	mutex_unlock(&amp;ks-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return err ? err : count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ks8995_read_reg(struct ks8995_switch *ks, u8 addr, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	return ks8995_read(ks, buf, addr, 1) != 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ks8995_write_reg(struct ks8995_switch *ks, u8 addr, u8 val)</div><div class='add'>+{</div><div class='add'>+	char buf = val;</div><div class='add'>+</div><div class='add'>+	return ks8995_write(ks, &amp;buf, addr, 1) != 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int ks8995_stop(struct ks8995_switch *ks)</div><div class='add'>+{</div><div class='add'>+	return ks8995_write_reg(ks, KS8995_REG_ID1, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_start(struct ks8995_switch *ks)</div><div class='add'>+{</div><div class='add'>+	return ks8995_write_reg(ks, KS8995_REG_ID1, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_reset(struct ks8995_switch *ks)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ks8995_stop(ks);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	udelay(KS8995_RESET_DELAY);</div><div class='add'>+</div><div class='add'>+	return ks8995_start(ks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ks8995_get_revision - get chip revision</div><div class='add'>+ * @ks: pointer to switch instance</div><div class='add'>+ *</div><div class='add'>+ * Verify chip family and id and get chip revision.</div><div class='add'>+ */</div><div class='add'>+static int ks8995_get_revision(struct ks8995_switch *ks)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u8 id0, id1, ksz8864_id;</div><div class='add'>+</div><div class='add'>+	/* read family id */</div><div class='add'>+	err = ks8995_read_reg(ks, KS8995_REG_ID0, &amp;id0);</div><div class='add'>+	if (err) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* verify family id */</div><div class='add'>+	if (id0 != ks-&gt;chip-&gt;family_id) {</div><div class='add'>+		dev_err(&amp;ks-&gt;spi-&gt;dev, "chip family id mismatch: expected 0x%02x but 0x%02x read\n",</div><div class='add'>+			ks-&gt;chip-&gt;family_id, id0);</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (ks-&gt;chip-&gt;family_id) {</div><div class='add'>+	case FAMILY_KS8995:</div><div class='add'>+		/* try reading chip id at CHIP ID1 */</div><div class='add'>+		err = ks8995_read_reg(ks, KS8995_REG_ID1, &amp;id1);</div><div class='add'>+		if (err) {</div><div class='add'>+			err = -EIO;</div><div class='add'>+			goto err_out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* verify chip id */</div><div class='add'>+		if ((get_chip_id(id1) == CHIPID_M) &amp;&amp;</div><div class='add'>+		    (get_chip_id(id1) == ks-&gt;chip-&gt;chip_id)) {</div><div class='add'>+			/* KS8995MA */</div><div class='add'>+			ks-&gt;revision_id = get_chip_rev(id1);</div><div class='add'>+		} else if (get_chip_id(id1) != CHIPID_M) {</div><div class='add'>+			/* KSZ8864RMN */</div><div class='add'>+			err = ks8995_read_reg(ks, KS8995_REG_ID1, &amp;ksz8864_id);</div><div class='add'>+			if (err) {</div><div class='add'>+				err = -EIO;</div><div class='add'>+				goto err_out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if ((ksz8864_id &amp; 0x80) &amp;&amp;</div><div class='add'>+			    (ks-&gt;chip-&gt;chip_id == KSZ8864_CHIP_ID)) {</div><div class='add'>+				ks-&gt;revision_id = get_chip_rev(id1);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+		} else {</div><div class='add'>+			dev_err(&amp;ks-&gt;spi-&gt;dev, "unsupported chip id for KS8995 family: 0x%02x\n",</div><div class='add'>+				id1);</div><div class='add'>+			err = -ENODEV;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case FAMILY_KSZ8795:</div><div class='add'>+		/* try reading chip id at CHIP ID1 */</div><div class='add'>+		err = ks8995_read_reg(ks, KS8995_REG_ID1, &amp;id1);</div><div class='add'>+		if (err) {</div><div class='add'>+			err = -EIO;</div><div class='add'>+			goto err_out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (get_chip_id(id1) == ks-&gt;chip-&gt;chip_id) {</div><div class='add'>+			ks-&gt;revision_id = get_chip_rev(id1);</div><div class='add'>+		} else {</div><div class='add'>+			dev_err(&amp;ks-&gt;spi-&gt;dev, "unsupported chip id for KSZ8795 family: 0x%02x\n",</div><div class='add'>+				id1);</div><div class='add'>+			err = -ENODEV;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(&amp;ks-&gt;spi-&gt;dev, "unsupported family id: 0x%02x\n", id0);</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+err_out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_check_config(struct ks8995_switch *ks)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	ret = ks8995_read_reg(ks, KS8995_REG_GC0, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to read KS8995_REG_GC0\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "port 5 PHY %senabled\n",</div><div class='add'>+		(val &amp; KS8995_GC0_P5_PHY) ? "" : "not ");</div><div class='add'>+</div><div class='add'>+	val |= KS8995_GC0_P5_PHY;</div><div class='add'>+	ret = ks8995_write_reg(ks, KS8995_REG_GC0, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to set KS8995_REG_GC0\n");</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "set KS8995_REG_GC0 to 0x%02x\n", val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ks8995_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+		  const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ks8995_mac_link_up(struct phylink_config *config, struct phy_device *phydev,</div><div class='add'>+		   unsigned int mode, phy_interface_t interface,</div><div class='add'>+		   int speed, int duplex, bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ks8995_switch *ks = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	/* Allow forcing the mode on the fixed CPU port, no autonegotiation.</div><div class='add'>+	 * We assume autonegotiation works on the PHY-facing ports.</div><div class='add'>+	 */</div><div class='add'>+	if (port != KS8995_CPU_PORT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "MAC link up on CPU port (%d)\n", port);</div><div class='add'>+</div><div class='add'>+	ret = ks8995_read_reg(ks, KS8995_REG_GC4, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to read KS8995_REG_GC4\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Conjure port config */</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		dev_dbg(ks-&gt;dev, "set switch MII to 100Mbit mode\n");</div><div class='add'>+		val |= KS8995_GC4_10BT;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+	default:</div><div class='add'>+		dev_dbg(ks-&gt;dev, "set switch MII to 100Mbit mode\n");</div><div class='add'>+		val &amp;= ~KS8995_GC4_10BT;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_HALF) {</div><div class='add'>+		dev_dbg(ks-&gt;dev, "set switch MII to half duplex\n");</div><div class='add'>+		val |= KS8995_GC4_MII_HD;</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(ks-&gt;dev, "set switch MII to full duplex\n");</div><div class='add'>+		val &amp;= ~KS8995_GC4_MII_HD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "set KS8995_REG_GC4 to %02x\n", val);</div><div class='add'>+</div><div class='add'>+	/* Enable the CPU port */</div><div class='add'>+	ret = ks8995_write_reg(ks, KS8995_REG_GC4, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to set KS8995_REG_GC4\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ks8995_mac_link_down(struct phylink_config *config, unsigned int mode,</div><div class='add'>+		     phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ks8995_switch *ks = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	if (port != KS8995_CPU_PORT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "MAC link down on CPU port (%d)\n", port);</div><div class='add'>+</div><div class='add'>+	/* Disable the CPU port */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops ks8995_phylink_mac_ops = {</div><div class='add'>+	.mac_config = ks8995_mac_config,</div><div class='add'>+	.mac_link_up = ks8995_mac_link_up,</div><div class='add'>+	.mac_link_down = ks8995_mac_link_down,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static enum</div><div class='add'>+dsa_tag_protocol ks8995_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+					 int port,</div><div class='add'>+					 enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	/* This switch actually uses the 6 byte KS8995 protocol */</div><div class='add'>+	return DSA_TAG_PROTO_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "enable port %d\n", port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ks8995_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "disable port %d\n", port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+					struct switchdev_brport_flags flags,</div><div class='add'>+					struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	/* We support enabling/disabling learning */</div><div class='add'>+	if (flags.mask &amp; ~(BR_LEARNING))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct switchdev_brport_flags flags,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING) {</div><div class='add'>+		ret = ks8995_read_reg(ks, KS8995_REG_PC(port, KS8995_REG_PC2), &amp;val);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ks-&gt;dev, "failed to read KS8995_REG_PC2 on port %d\n", port);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (flags.val &amp; BR_LEARNING)</div><div class='add'>+			val &amp;= ~KS8995_PC2_LEARN_DIS;</div><div class='add'>+		else</div><div class='add'>+			val |= KS8995_PC2_LEARN_DIS;</div><div class='add'>+</div><div class='add'>+		ret = ks8995_write_reg(ks, KS8995_REG_PC(port, KS8995_REG_PC2), val);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ks-&gt;dev, "failed to write KS8995_REG_PC2 on port %d\n", port);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ks8995_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	ret = ks8995_read_reg(ks, KS8995_REG_PC(port, KS8995_REG_PC2), &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to read KS8995_REG_PC2 on port %d\n", port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the bits for the different STP states in accordance with</div><div class='add'>+	 * the datasheet, pages 36-37 "Spanning tree support".</div><div class='add'>+	 */</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		val &amp;= ~KS8995_PC2_TXEN;</div><div class='add'>+		val &amp;= ~KS8995_PC2_RXEN;</div><div class='add'>+		val |= KS8995_PC2_LEARN_DIS;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		val &amp;= ~KS8995_PC2_TXEN;</div><div class='add'>+		val &amp;= ~KS8995_PC2_RXEN;</div><div class='add'>+		val &amp;= ~KS8995_PC2_LEARN_DIS;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		val |= KS8995_PC2_TXEN;</div><div class='add'>+		val |= KS8995_PC2_RXEN;</div><div class='add'>+		val &amp;= ~KS8995_PC2_LEARN_DIS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(ks-&gt;dev, "unknown bridge state requested\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ks8995_write_reg(ks, KS8995_REG_PC(port, KS8995_REG_PC2), val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to write KS8995_REG_PC2 on port %d\n", port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "set KS8995_REG_PC2 for port %d to %02x\n", port, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ks8995_phylink_get_caps(struct dsa_switch *dsa, int port,</div><div class='add'>+				    struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *interfaces = config-&gt;supported_interfaces;</div><div class='add'>+</div><div class='add'>+	if (port == KS8995_CPU_PORT)</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, interfaces);</div><div class='add'>+</div><div class='add'>+	if (port &lt;= 3) {</div><div class='add'>+		/* Internal PHYs */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL, interfaces);</div><div class='add'>+		/* phylib default */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, interfaces);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Huge packet support up to 1916 byte packages "inclusive"</div><div class='add'>+ * which means that tags are included. If the bit is not set</div><div class='add'>+ * it is 1536 bytes "inclusive". We present the length without</div><div class='add'>+ * tags or ethernet headers. The setting affects all ports.</div><div class='add'>+ */</div><div class='add'>+static int ks8995_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = ds-&gt;priv;</div><div class='add'>+	unsigned int max_mtu;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ks-&gt;max_mtu[port] = new_mtu;</div><div class='add'>+</div><div class='add'>+	/* Roof out the MTU for the entire switch to the greatest</div><div class='add'>+	 * common denominator: the biggest set for any one port will</div><div class='add'>+	 * be the biggest MTU for the switch.</div><div class='add'>+	 */</div><div class='add'>+	max_mtu = ETH_DATA_LEN;</div><div class='add'>+	for (i = 0; i &lt; KS8995_NUM_PORTS; i++) {</div><div class='add'>+		if (ks-&gt;max_mtu[i] &gt; max_mtu)</div><div class='add'>+			max_mtu = ks-&gt;max_mtu[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Translate to layer 2 size.</div><div class='add'>+	 * Add ethernet and (possible) VLAN headers, and checksum to the size.</div><div class='add'>+	 * For ETH_DATA_LEN (1500 bytes) this will add up to 1522 bytes.</div><div class='add'>+	 */</div><div class='add'>+	max_mtu += VLAN_ETH_HLEN;</div><div class='add'>+	max_mtu += ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	ret = ks8995_read_reg(ks, KS8995_REG_GC2, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to read KS8995_REG_GC2\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (max_mtu &lt;= 1522) {</div><div class='add'>+		val &amp;= ~KS8995_GC2_HUGE;</div><div class='add'>+		val &amp;= ~KS8995_GC2_LEGAL;</div><div class='add'>+	} else if (max_mtu &gt; 1522 &amp;&amp; max_mtu &lt;= 1536) {</div><div class='add'>+		/* This accepts packets up to 1536 bytes */</div><div class='add'>+		val &amp;= ~KS8995_GC2_HUGE;</div><div class='add'>+		val |= KS8995_GC2_LEGAL;</div><div class='add'>+	} else {</div><div class='add'>+		/* This accepts packets up to 1916 bytes */</div><div class='add'>+		val |= KS8995_GC2_HUGE;</div><div class='add'>+		val |= KS8995_GC2_LEGAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "new max MTU %d bytes (inclusive)\n", max_mtu);</div><div class='add'>+</div><div class='add'>+	ret = ks8995_write_reg(ks, KS8995_REG_GC2, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to set KS8995_REG_GC2\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_get_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	return 1916 - ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops ks8995_ds_ops = {</div><div class='add'>+	.get_tag_protocol = ks8995_get_tag_protocol,</div><div class='add'>+	.setup = ks8995_setup,</div><div class='add'>+	.port_pre_bridge_flags = ks8995_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags = ks8995_port_bridge_flags,</div><div class='add'>+	.port_enable = ks8995_port_enable,</div><div class='add'>+	.port_disable = ks8995_port_disable,</div><div class='add'>+	.port_stp_state_set = ks8995_port_stp_state_set,</div><div class='add'>+	.port_change_mtu = ks8995_change_mtu,</div><div class='add'>+	.port_max_mtu = ks8995_get_max_mtu,</div><div class='add'>+	.phylink_get_caps = ks8995_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+static int ks8995_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks;</div><div class='add'>+	int err;</div><div class='add'>+	int variant = spi_get_device_id(spi)-&gt;driver_data;</div><div class='add'>+</div><div class='add'>+	if (variant &gt;= max_variant) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "bad chip variant %d\n", variant);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ks = devm_kzalloc(&amp;spi-&gt;dev, sizeof(*ks), GFP_KERNEL);</div><div class='add'>+	if (!ks)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;ks-&gt;lock);</div><div class='add'>+	ks-&gt;spi = spi;</div><div class='add'>+	ks-&gt;dev = &amp;spi-&gt;dev;</div><div class='add'>+	ks-&gt;chip = &amp;ks8995_chip[variant];</div><div class='add'>+</div><div class='add'>+	ks-&gt;reset_gpio = devm_gpiod_get_optional(&amp;spi-&gt;dev, "reset",</div><div class='add'>+						 GPIOD_OUT_HIGH);</div><div class='add'>+	err = PTR_ERR_OR_ZERO(ks-&gt;reset_gpio);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev,</div><div class='add'>+			"failed to get reset gpio: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = gpiod_set_consumer_name(ks-&gt;reset_gpio, "switch-reset");</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (ks-&gt;reset_gpio) {</div><div class='add'>+		/*</div><div class='add'>+		 * If a reset line was obtained, wait for 100us after</div><div class='add'>+		 * de-asserting RESET before accessing any registers, see</div><div class='add'>+		 * the KS8995MA datasheet, page 44.</div><div class='add'>+		 */</div><div class='add'>+		gpiod_set_value_cansleep(ks-&gt;reset_gpio, 0);</div><div class='add'>+		udelay(100);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, ks);</div><div class='add'>+</div><div class='add'>+	spi-&gt;mode = SPI_MODE_0;</div><div class='add'>+	spi-&gt;bits_per_word = 8;</div><div class='add'>+	err = spi_setup(spi);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "spi_setup failed, err=%d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ks8995_get_revision(ks);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ks8995_reset(ks);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;spi-&gt;dev, "%s device found, Chip ID:%x, Revision:%x\n",</div><div class='add'>+		 ks-&gt;chip-&gt;name, ks-&gt;chip-&gt;chip_id, ks-&gt;revision_id);</div><div class='add'>+</div><div class='add'>+	err = ks8995_check_config(ks);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ks-&gt;ds = devm_kzalloc(&amp;spi-&gt;dev, sizeof(*ks-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!ks-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ks-&gt;ds-&gt;dev = &amp;spi-&gt;dev;</div><div class='add'>+	ks-&gt;ds-&gt;num_ports = KS8995_NUM_PORTS;</div><div class='add'>+	ks-&gt;ds-&gt;ops = &amp;ks8995_ds_ops;</div><div class='add'>+	ks-&gt;ds-&gt;phylink_mac_ops = &amp;ks8995_phylink_mac_ops;</div><div class='add'>+	ks-&gt;ds-&gt;priv = ks;</div><div class='add'>+</div><div class='add'>+	err = dsa_register_switch(ks-&gt;ds);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, err,</div><div class='add'>+				     "unable to register DSA switch\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ks8995_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(ks-&gt;ds);</div><div class='add'>+	/* assert reset */</div><div class='add'>+	gpiod_set_value_cansleep(ks-&gt;reset_gpio, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+static struct spi_driver ks8995_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	    = "spi-ks8995",</div><div class='add'>+		.of_match_table = ks8995_spi_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe	  = ks8995_probe,</div><div class='add'>+	.remove	  = ks8995_remove,</div><div class='add'>+	.id_table = ks8995_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_spi_driver(ks8995_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION(DRV_DESC);</div><div class='add'>+MODULE_VERSION(DRV_VERSION);</div><div class='add'>+MODULE_AUTHOR("Gabor Juhos &lt;juhosg at openwrt.org&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/Kconfig b/drivers/net/dsa/lantiq/Kconfig<br/>new file mode 100644<br/>index 000000000000..4a9771be5d58<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+config NET_DSA_LANTIQ_COMMON</div><div class='add'>+	tristate</div><div class='add'>+	select REGMAP</div><div class='add'>+</div><div class='add'>+config NET_DSA_LANTIQ_GSWIP</div><div class='add'>+	tristate "Lantiq / Intel GSWIP"</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	select NET_DSA_TAG_GSWIP</div><div class='add'>+	select NET_DSA_LANTIQ_COMMON</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Lantiq / Intel GSWIP 2.1 found in</div><div class='add'>+	  the xrx200 / VR9 SoC.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MXL_GSW1XX</div><div class='add'>+	tristate "MaxLinear GSW1xx Ethernet switch support"</div><div class='add'>+	select NET_DSA_TAG_MXL_GSW1XX</div><div class='add'>+	select NET_DSA_LANTIQ_COMMON</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the MaxLinear GSW1xx family of 1GE switches</div><div class='add'>+	    GSW120 4 port, 2 PHYs, RGMII &amp; SGMII/2500Base-X</div><div class='add'>+	    GSW125 4 port, 2 PHYs, RGMII &amp; SGMII/2500Base-X, industrial temperature</div><div class='add'>+	    GSW140 6 port, 4 PHYs, RGMII &amp; SGMII/2500Base-X</div><div class='add'>+	    GSW141 6 port, 4 PHYs, RGMII &amp; SGMII</div><div class='add'>+	    GSW145 6 port, 4 PHYs, RGMII &amp; SGMII/2500Base-X, industrial temperature</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/Makefile b/drivers/net/dsa/lantiq/Makefile<br/>new file mode 100644<br/>index 000000000000..85fce605310b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/Makefile</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+obj-$(CONFIG_NET_DSA_LANTIQ_GSWIP) += lantiq_gswip.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_LANTIQ_COMMON) += lantiq_gswip_common.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_MXL_GSW1XX) += mxl-gsw1xx.o</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/lantiq_gswip.c b/drivers/net/dsa/lantiq/lantiq_gswip.c<br/>new file mode 100644<br/>index 000000000000..57dd063c0740<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/lantiq_gswip.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/lantiq_gswip.c</a></div><div class='hunk'>@@ -0,0 +1,518 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Lantiq / Intel GSWIP switch driver for VRX200, xRX300 and xRX330 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Daniel Golle &lt;daniel@makrotopia.org&gt;</div><div class='add'>+ * Copyright (C) 2017 - 2019 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Lantiq Deutschland</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "lantiq_gswip.h"</div><div class='add'>+#include "lantiq_pce.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mips/lantiq_rcu_gphy.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+struct xway_gphy_match_data {</div><div class='add'>+	char *fe_firmware_name;</div><div class='add'>+	char *ge_firmware_name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void gswip_xrx200_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+					  struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+	case 1:</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_REVMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+	case 4:</div><div class='add'>+	case 6:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 5:</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+		MAC_10 | MAC_100 | MAC_1000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_xrx300_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+					  struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 1:</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+	case 4:</div><div class='add'>+	case 6:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 5:</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+		MAC_10 | MAC_100 | MAC_1000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct xway_gphy_match_data xrx200a1x_gphy_data = {</div><div class='add'>+	.fe_firmware_name = "lantiq/xrx200_phy22f_a14.bin",</div><div class='add'>+	.ge_firmware_name = "lantiq/xrx200_phy11g_a14.bin",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct xway_gphy_match_data xrx200a2x_gphy_data = {</div><div class='add'>+	.fe_firmware_name = "lantiq/xrx200_phy22f_a22.bin",</div><div class='add'>+	.ge_firmware_name = "lantiq/xrx200_phy11g_a22.bin",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct xway_gphy_match_data xrx300_gphy_data = {</div><div class='add'>+	.fe_firmware_name = "lantiq/xrx300_phy22f_a21.bin",</div><div class='add'>+	.ge_firmware_name = "lantiq/xrx300_phy11g_a21.bin",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id xway_gphy_match[] __maybe_unused = {</div><div class='add'>+	{ .compatible = "lantiq,xrx200-gphy-fw", .data = NULL },</div><div class='add'>+	{ .compatible = "lantiq,xrx200a1x-gphy-fw", .data = &amp;xrx200a1x_gphy_data },</div><div class='add'>+	{ .compatible = "lantiq,xrx200a2x-gphy-fw", .data = &amp;xrx200a2x_gphy_data },</div><div class='add'>+	{ .compatible = "lantiq,xrx300-gphy-fw", .data = &amp;xrx300_gphy_data },</div><div class='add'>+	{ .compatible = "lantiq,xrx330-gphy-fw", .data = &amp;xrx300_gphy_data },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int gswip_gphy_fw_load(struct gswip_priv *priv, struct gswip_gphy_fw *gphy_fw)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	const struct firmware *fw;</div><div class='add'>+	void *fw_addr;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	dma_addr_t dev_addr;</div><div class='add'>+	size_t size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare_enable(gphy_fw-&gt;clk_gate);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reset_control_assert(gphy_fw-&gt;reset);</div><div class='add'>+</div><div class='add'>+	/* The vendor BSP uses a 200ms delay after asserting the reset line.</div><div class='add'>+	 * Without this some users are observing that the PHY is not coming up</div><div class='add'>+	 * on the MDIO bus.</div><div class='add'>+	 */</div><div class='add'>+	msleep(200);</div><div class='add'>+</div><div class='add'>+	ret = request_firmware(&amp;fw, gphy_fw-&gt;fw_name, dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "failed to load firmware: %s\n",</div><div class='add'>+				     gphy_fw-&gt;fw_name);</div><div class='add'>+</div><div class='add'>+	/* GPHY cores need the firmware code in a persistent and contiguous</div><div class='add'>+	 * memory area with a 16 kB boundary aligned start address.</div><div class='add'>+	 */</div><div class='add'>+	size = fw-&gt;size + XRX200_GPHY_FW_ALIGN;</div><div class='add'>+</div><div class='add'>+	fw_addr = dmam_alloc_coherent(dev, size, &amp;dma_addr, GFP_KERNEL);</div><div class='add'>+	if (fw_addr) {</div><div class='add'>+		fw_addr = PTR_ALIGN(fw_addr, XRX200_GPHY_FW_ALIGN);</div><div class='add'>+		dev_addr = ALIGN(dma_addr, XRX200_GPHY_FW_ALIGN);</div><div class='add'>+		memcpy(fw_addr, fw-&gt;data, fw-&gt;size);</div><div class='add'>+	} else {</div><div class='add'>+		release_firmware(fw);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;rcu_regmap, gphy_fw-&gt;fw_addr_offset, dev_addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reset_control_deassert(gphy_fw-&gt;reset);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_gphy_fw_probe(struct gswip_priv *priv,</div><div class='add'>+			       struct gswip_gphy_fw *gphy_fw,</div><div class='add'>+			       struct device_node *gphy_fw_np, int i)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	u32 gphy_mode;</div><div class='add'>+	int ret;</div><div class='add'>+	char gphyname[10];</div><div class='add'>+</div><div class='add'>+	snprintf(gphyname, sizeof(gphyname), "gphy%d", i);</div><div class='add'>+</div><div class='add'>+	gphy_fw-&gt;clk_gate = devm_clk_get(dev, gphyname);</div><div class='add'>+	if (IS_ERR(gphy_fw-&gt;clk_gate)) {</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gphy_fw-&gt;clk_gate),</div><div class='add'>+				     "Failed to lookup gate clock\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(gphy_fw_np, "reg", &amp;gphy_fw-&gt;fw_addr_offset);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(gphy_fw_np, "lantiq,gphy-mode", &amp;gphy_mode);</div><div class='add'>+	/* Default to GE mode */</div><div class='add'>+	if (ret)</div><div class='add'>+		gphy_mode = GPHY_MODE_GE;</div><div class='add'>+</div><div class='add'>+	switch (gphy_mode) {</div><div class='add'>+	case GPHY_MODE_FE:</div><div class='add'>+		gphy_fw-&gt;fw_name = priv-&gt;gphy_fw_name_cfg-&gt;fe_firmware_name;</div><div class='add'>+		break;</div><div class='add'>+	case GPHY_MODE_GE:</div><div class='add'>+		gphy_fw-&gt;fw_name = priv-&gt;gphy_fw_name_cfg-&gt;ge_firmware_name;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return dev_err_probe(dev, -EINVAL, "Unknown GPHY mode %d\n",</div><div class='add'>+				     gphy_mode);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gphy_fw-&gt;reset = of_reset_control_array_get_exclusive(gphy_fw_np);</div><div class='add'>+	if (IS_ERR(gphy_fw-&gt;reset))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gphy_fw-&gt;reset),</div><div class='add'>+				     "Failed to lookup gphy reset\n");</div><div class='add'>+</div><div class='add'>+	return gswip_gphy_fw_load(priv, gphy_fw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_gphy_fw_remove(struct gswip_priv *priv,</div><div class='add'>+				 struct gswip_gphy_fw *gphy_fw)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* check if the device was fully probed */</div><div class='add'>+	if (!gphy_fw-&gt;fw_name)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;rcu_regmap, gphy_fw-&gt;fw_addr_offset, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(priv-&gt;dev, "can not reset GPHY FW pointer\n");</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(gphy_fw-&gt;clk_gate);</div><div class='add'>+</div><div class='add'>+	reset_control_put(gphy_fw-&gt;reset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_gphy_fw_list(struct gswip_priv *priv,</div><div class='add'>+			      struct device_node *gphy_fw_list_np, u32 version)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	struct device_node *gphy_fw_np;</div><div class='add'>+	const struct of_device_id *match;</div><div class='add'>+	int err;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	/* The VRX200 rev 1.1 uses the GSWIP 2.0 and needs the older</div><div class='add'>+	 * GPHY firmware. The VRX200 rev 1.2 uses the GSWIP 2.1 and also</div><div class='add'>+	 * needs a different GPHY firmware.</div><div class='add'>+	 */</div><div class='add'>+	if (of_device_is_compatible(gphy_fw_list_np, "lantiq,xrx200-gphy-fw")) {</div><div class='add'>+		switch (version) {</div><div class='add'>+		case GSWIP_VERSION_2_0:</div><div class='add'>+			priv-&gt;gphy_fw_name_cfg = &amp;xrx200a1x_gphy_data;</div><div class='add'>+			break;</div><div class='add'>+		case GSWIP_VERSION_2_1:</div><div class='add'>+			priv-&gt;gphy_fw_name_cfg = &amp;xrx200a2x_gphy_data;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return dev_err_probe(dev, -ENOENT,</div><div class='add'>+					     "unknown GSWIP version: 0x%x\n",</div><div class='add'>+					     version);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	match = of_match_node(xway_gphy_match, gphy_fw_list_np);</div><div class='add'>+	if (match &amp;&amp; match-&gt;data)</div><div class='add'>+		priv-&gt;gphy_fw_name_cfg = match-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;gphy_fw_name_cfg)</div><div class='add'>+		return dev_err_probe(dev, -ENOENT,</div><div class='add'>+				     "GPHY compatible type not supported\n");</div><div class='add'>+</div><div class='add'>+	priv-&gt;num_gphy_fw = of_get_available_child_count(gphy_fw_list_np);</div><div class='add'>+	if (!priv-&gt;num_gphy_fw)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	priv-&gt;rcu_regmap = syscon_regmap_lookup_by_phandle(gphy_fw_list_np,</div><div class='add'>+							   "lantiq,rcu");</div><div class='add'>+	if (IS_ERR(priv-&gt;rcu_regmap))</div><div class='add'>+		return PTR_ERR(priv-&gt;rcu_regmap);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gphy_fw = devm_kmalloc_array(dev, priv-&gt;num_gphy_fw,</div><div class='add'>+					   sizeof(*priv-&gt;gphy_fw),</div><div class='add'>+					   GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+	if (!priv-&gt;gphy_fw)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node(gphy_fw_list_np, gphy_fw_np) {</div><div class='add'>+		err = gswip_gphy_fw_probe(priv, &amp;priv-&gt;gphy_fw[i],</div><div class='add'>+					  gphy_fw_np, i);</div><div class='add'>+		if (err) {</div><div class='add'>+			of_node_put(gphy_fw_np);</div><div class='add'>+			goto remove_gphy;</div><div class='add'>+		}</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The standalone PHY11G requires 300ms to be fully</div><div class='add'>+	 * initialized and ready for any MDIO communication after being</div><div class='add'>+	 * taken out of reset. For the SoC-internal GPHY variant there</div><div class='add'>+	 * is no (known) documentation for the minimum time after a</div><div class='add'>+	 * reset. Use the same value as for the standalone variant as</div><div class='add'>+	 * some users have reported internal PHYs not being detected</div><div class='add'>+	 * without any delay.</div><div class='add'>+	 */</div><div class='add'>+	msleep(300);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+remove_gphy:</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_gphy_fw; i++)</div><div class='add'>+		gswip_gphy_fw_remove(priv, &amp;priv-&gt;gphy_fw[i]);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_config sw_regmap_config = {</div><div class='add'>+	.name = "switch",</div><div class='add'>+	.reg_bits = 32,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_shift = REGMAP_UPSHIFT(2),</div><div class='add'>+	.val_format_endian = REGMAP_ENDIAN_NATIVE,</div><div class='add'>+	.max_register = GSWIP_SDMA_PCTRLp(6),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config mdio_regmap_config = {</div><div class='add'>+	.name = "mdio",</div><div class='add'>+	.reg_bits = 32,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_shift = REGMAP_UPSHIFT(2),</div><div class='add'>+	.val_format_endian = REGMAP_ENDIAN_NATIVE,</div><div class='add'>+	.max_register = GSWIP_MDIO_PHYp(0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config mii_regmap_config = {</div><div class='add'>+	.name = "mii",</div><div class='add'>+	.reg_bits = 32,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_shift = REGMAP_UPSHIFT(2),</div><div class='add'>+	.val_format_endian = REGMAP_ENDIAN_NATIVE,</div><div class='add'>+	.max_register = GSWIP_MII_CFGp(6),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int gswip_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np, *gphy_fw_np;</div><div class='add'>+	__iomem void *gswip, *mdio, *mii;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct gswip_priv *priv;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+	u32 version;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	gswip = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(gswip))</div><div class='add'>+		return PTR_ERR(gswip);</div><div class='add'>+</div><div class='add'>+	mdio = devm_platform_ioremap_resource(pdev, 1);</div><div class='add'>+	if (IS_ERR(mdio))</div><div class='add'>+		return PTR_ERR(mdio);</div><div class='add'>+</div><div class='add'>+	mii = devm_platform_ioremap_resource(pdev, 2);</div><div class='add'>+	if (IS_ERR(mii))</div><div class='add'>+		return PTR_ERR(mii);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gswip = devm_regmap_init_mmio(dev, gswip, &amp;sw_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;gswip))</div><div class='add'>+		return PTR_ERR(priv-&gt;gswip);</div><div class='add'>+</div><div class='add'>+	priv-&gt;mdio = devm_regmap_init_mmio(dev, mdio, &amp;mdio_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;mdio))</div><div class='add'>+		return PTR_ERR(priv-&gt;mdio);</div><div class='add'>+</div><div class='add'>+	priv-&gt;mii = devm_regmap_init_mmio(dev, mii, &amp;mii_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;mii))</div><div class='add'>+		return PTR_ERR(priv-&gt;mii);</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw_info = of_device_get_match_data(dev);</div><div class='add'>+	if (!priv-&gt;hw_info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds = devm_kzalloc(dev, sizeof(*priv-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	regmap_read(priv-&gt;gswip, GSWIP_VERSION, &amp;version);</div><div class='add'>+</div><div class='add'>+	np = dev-&gt;of_node;</div><div class='add'>+	switch (version) {</div><div class='add'>+	case GSWIP_VERSION_2_0:</div><div class='add'>+	case GSWIP_VERSION_2_1:</div><div class='add'>+		if (!of_device_is_compatible(np, "lantiq,xrx200-gswip"))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case GSWIP_VERSION_2_2:</div><div class='add'>+	case GSWIP_VERSION_2_2_ETC:</div><div class='add'>+		if (!of_device_is_compatible(np, "lantiq,xrx300-gswip") &amp;&amp;</div><div class='add'>+		    !of_device_is_compatible(np, "lantiq,xrx330-gswip"))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return dev_err_probe(dev, -ENOENT,</div><div class='add'>+				     "unknown GSWIP version: 0x%x\n", version);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* bring up the mdio bus */</div><div class='add'>+	gphy_fw_np = of_get_compatible_child(dev-&gt;of_node, "lantiq,gphy-fw");</div><div class='add'>+	if (gphy_fw_np) {</div><div class='add'>+		err = gswip_gphy_fw_list(priv, gphy_fw_np, version);</div><div class='add'>+		of_node_put(gphy_fw_np);</div><div class='add'>+		if (err)</div><div class='add'>+			return dev_err_probe(dev, err,</div><div class='add'>+					     "gphy fw probe failed\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = gswip_probe_common(priv, version);</div><div class='add'>+	if (err)</div><div class='add'>+		goto gphy_fw_remove;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+gphy_fw_remove:</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_gphy_fw; i++)</div><div class='add'>+		gswip_gphy_fw_remove(priv, &amp;priv-&gt;gphy_fw[i]);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* disable the switch */</div><div class='add'>+	gswip_disable_switch(priv);</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_gphy_fw; i++)</div><div class='add'>+		gswip_gphy_fw_remove(priv, &amp;priv-&gt;gphy_fw[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct gswip_hw_info gswip_xrx200 = {</div><div class='add'>+	.max_ports = 7,</div><div class='add'>+	.allowed_cpu_ports = BIT(6),</div><div class='add'>+	.mii_ports = BIT(0) | BIT(1) | BIT(5),</div><div class='add'>+	.mii_port_reg_offset = 0,</div><div class='add'>+	.phylink_get_caps = gswip_xrx200_phylink_get_caps,</div><div class='add'>+	.pce_microcode = &amp;gswip_pce_microcode,</div><div class='add'>+	.pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),</div><div class='add'>+	.tag_protocol = DSA_TAG_PROTO_GSWIP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct gswip_hw_info gswip_xrx300 = {</div><div class='add'>+	.max_ports = 7,</div><div class='add'>+	.allowed_cpu_ports = BIT(6),</div><div class='add'>+	.mii_ports = BIT(0) | BIT(5),</div><div class='add'>+	.mii_port_reg_offset = 0,</div><div class='add'>+	.phylink_get_caps = gswip_xrx300_phylink_get_caps,</div><div class='add'>+	.pce_microcode = &amp;gswip_pce_microcode,</div><div class='add'>+	.pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),</div><div class='add'>+	.tag_protocol = DSA_TAG_PROTO_GSWIP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id gswip_of_match[] = {</div><div class='add'>+	{ .compatible = "lantiq,xrx200-gswip", .data = &amp;gswip_xrx200 },</div><div class='add'>+	{ .compatible = "lantiq,xrx300-gswip", .data = &amp;gswip_xrx300 },</div><div class='add'>+	{ .compatible = "lantiq,xrx330-gswip", .data = &amp;gswip_xrx300 },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, gswip_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver gswip_driver = {</div><div class='add'>+	.probe = gswip_probe,</div><div class='add'>+	.remove = gswip_remove,</div><div class='add'>+	.shutdown = gswip_shutdown,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "gswip",</div><div class='add'>+		.of_match_table = gswip_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(gswip_driver);</div><div class='add'>+</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx300_phy11g_a21.bin");</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx300_phy22f_a21.bin");</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx200_phy11g_a14.bin");</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx200_phy11g_a22.bin");</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx200_phy22f_a14.bin");</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx200_phy22f_a22.bin");</div><div class='add'>+MODULE_AUTHOR("Hauke Mehrtens &lt;hauke@hauke-m.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Lantiq / Intel GSWIP driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/lantiq_gswip.h b/drivers/net/dsa/lantiq/lantiq_gswip.h<br/>new file mode 100644<br/>index 000000000000..9c38e51a75e8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/lantiq_gswip.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/lantiq_gswip.h</a></div><div class='hunk'>@@ -0,0 +1,301 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#ifndef __LANTIQ_GSWIP_H</div><div class='add'>+#define __LANTIQ_GSWIP_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/swab.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+/* GSWIP MDIO Registers */</div><div class='add'>+#define GSWIP_MDIO_GLOB			0x00</div><div class='add'>+#define  GSWIP_MDIO_GLOB_ENABLE		BIT(15)</div><div class='add'>+#define GSWIP_MDIO_CTRL			0x08</div><div class='add'>+#define  GSWIP_MDIO_CTRL_BUSY		BIT(12)</div><div class='add'>+#define  GSWIP_MDIO_CTRL_RD		BIT(11)</div><div class='add'>+#define  GSWIP_MDIO_CTRL_WR		BIT(10)</div><div class='add'>+#define  GSWIP_MDIO_CTRL_PHYAD_MASK	0x1f</div><div class='add'>+#define  GSWIP_MDIO_CTRL_PHYAD_SHIFT	5</div><div class='add'>+#define  GSWIP_MDIO_CTRL_REGAD_MASK	0x1f</div><div class='add'>+#define GSWIP_MDIO_READ			0x09</div><div class='add'>+#define GSWIP_MDIO_WRITE		0x0A</div><div class='add'>+#define GSWIP_MDIO_MDC_CFG0		0x0B</div><div class='add'>+#define GSWIP_MDIO_MDC_CFG1		0x0C</div><div class='add'>+#define GSWIP_MDIO_PHYp(p)		(0x15 - (p))</div><div class='add'>+#define  GSWIP_MDIO_PHY_LINK_MASK	0x6000</div><div class='add'>+#define  GSWIP_MDIO_PHY_LINK_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MDIO_PHY_LINK_DOWN	0x4000</div><div class='add'>+#define  GSWIP_MDIO_PHY_LINK_UP		0x2000</div><div class='add'>+#define  GSWIP_MDIO_PHY_SPEED_MASK	0x1800</div><div class='add'>+#define  GSWIP_MDIO_PHY_SPEED_AUTO	0x1800</div><div class='add'>+#define  GSWIP_MDIO_PHY_SPEED_M10	0x0000</div><div class='add'>+#define  GSWIP_MDIO_PHY_SPEED_M100	0x0800</div><div class='add'>+#define  GSWIP_MDIO_PHY_SPEED_G1	0x1000</div><div class='add'>+#define  GSWIP_MDIO_PHY_FDUP_MASK	0x0600</div><div class='add'>+#define  GSWIP_MDIO_PHY_FDUP_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MDIO_PHY_FDUP_EN		0x0200</div><div class='add'>+#define  GSWIP_MDIO_PHY_FDUP_DIS	0x0600</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONTX_MASK	0x0180</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONTX_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONTX_EN	0x0100</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONTX_DIS	0x0180</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONRX_MASK	0x0060</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONRX_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONRX_EN	0x0020</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONRX_DIS	0x0060</div><div class='add'>+#define  GSWIP_MDIO_PHY_ADDR_MASK	0x001f</div><div class='add'>+#define  GSWIP_MDIO_PHY_MASK		(GSWIP_MDIO_PHY_ADDR_MASK | \</div><div class='add'>+					 GSWIP_MDIO_PHY_FCONRX_MASK | \</div><div class='add'>+					 GSWIP_MDIO_PHY_FCONTX_MASK | \</div><div class='add'>+					 GSWIP_MDIO_PHY_LINK_MASK | \</div><div class='add'>+					 GSWIP_MDIO_PHY_SPEED_MASK | \</div><div class='add'>+					 GSWIP_MDIO_PHY_FDUP_MASK)</div><div class='add'>+</div><div class='add'>+/* GSWIP MII Registers */</div><div class='add'>+#define GSWIP_MII_CFGp(p)		(0x2 * (p))</div><div class='add'>+#define  GSWIP_MII_CFG_RESET		BIT(15)</div><div class='add'>+#define  GSWIP_MII_CFG_EN		BIT(14)</div><div class='add'>+#define  GSWIP_MII_CFG_ISOLATE		BIT(13)</div><div class='add'>+#define  GSWIP_MII_CFG_LDCLKDIS		BIT(12)</div><div class='add'>+#define  GSWIP_MII_CFG_RGMII_IBS	BIT(8)</div><div class='add'>+#define  GSWIP_MII_CFG_RMII_CLK		BIT(7)</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_MIIP	0x0</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_MIIM	0x1</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_RMIIP	0x2</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_RMIIM	0x3</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_RGMII	0x4</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_GMII	0x9</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_MASK	0xf</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_M2P5	0x00</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_M25	0x10</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_M125	0x20</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_M50	0x30</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_AUTO	0x40</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_MASK	0x70</div><div class='add'>+#define GSWIP_MII_PCDU0			0x01</div><div class='add'>+#define GSWIP_MII_PCDU1			0x03</div><div class='add'>+#define GSWIP_MII_PCDU5			0x05</div><div class='add'>+#define  GSWIP_MII_PCDU_TXDLY_MASK	GENMASK(2, 0)</div><div class='add'>+#define  GSWIP_MII_PCDU_RXDLY_MASK	GENMASK(9, 7)</div><div class='add'>+#define  GSWIP_MII_PCDU_TXDLY(x)	u16_encode_bits(((x) / 500), GSWIP_MII_PCDU_TXDLY_MASK)</div><div class='add'>+#define  GSWIP_MII_PCDU_RXDLY(x)	u16_encode_bits(((x) / 500), GSWIP_MII_PCDU_RXDLY_MASK)</div><div class='add'>+#define GSWIP_MII_PCDU_RXDLY_DEFAULT	2000 /* picoseconds */</div><div class='add'>+#define GSWIP_MII_PCDU_TXDLY_DEFAULT	2000 /* picoseconds */</div><div class='add'>+</div><div class='add'>+/* GSWIP Core Registers */</div><div class='add'>+#define GSWIP_SWRES			0x000</div><div class='add'>+#define  GSWIP_SWRES_R1			BIT(1)	/* GSWIP Software reset */</div><div class='add'>+#define  GSWIP_SWRES_R0			BIT(0)	/* GSWIP Hardware reset */</div><div class='add'>+#define GSWIP_VERSION			0x013</div><div class='add'>+#define  GSWIP_VERSION_REV_MASK		GENMASK(7, 0)</div><div class='add'>+#define  GSWIP_VERSION_MOD_MASK		GENMASK(15, 8)</div><div class='add'>+#define  GSWIP_VERSION_REV(v)		FIELD_GET(GSWIP_VERSION_REV_MASK, v)</div><div class='add'>+#define  GSWIP_VERSION_MOD(v)		FIELD_GET(GSWIP_VERSION_MOD_MASK, v)</div><div class='add'>+#define   GSWIP_VERSION_2_0		0x100</div><div class='add'>+#define   GSWIP_VERSION_2_1		0x021</div><div class='add'>+#define   GSWIP_VERSION_2_2		0x122</div><div class='add'>+#define   GSWIP_VERSION_2_2_ETC		0x022</div><div class='add'>+/* The hardware has the 'major/minor' version bytes in the wrong order</div><div class='add'>+ * preventing numerical comparisons. Swap the bytes of the 16-bit value</div><div class='add'>+ * to end up with REV being the most significant byte and MOD being the</div><div class='add'>+ * least significant byte, which then allows comparing it with the</div><div class='add'>+ * value stored in struct gswip_priv.</div><div class='add'>+ */</div><div class='add'>+#define GSWIP_VERSION_GE(priv, ver)	((priv)-&gt;version &gt;= swab16(ver))</div><div class='add'>+</div><div class='add'>+#define GSWIP_BM_RAM_VAL(x)		(0x043 - (x))</div><div class='add'>+#define GSWIP_BM_RAM_ADDR		0x044</div><div class='add'>+#define GSWIP_BM_RAM_CTRL		0x045</div><div class='add'>+#define  GSWIP_BM_RAM_CTRL_BAS		BIT(15)</div><div class='add'>+#define  GSWIP_BM_RAM_CTRL_OPMOD	BIT(5)</div><div class='add'>+#define  GSWIP_BM_RAM_CTRL_ADDR_MASK	GENMASK(4, 0)</div><div class='add'>+#define GSWIP_BM_QUEUE_GCTRL		0x04A</div><div class='add'>+#define  GSWIP_BM_QUEUE_GCTRL_GL_MOD	BIT(10)</div><div class='add'>+/* buffer management Port Configuration Register */</div><div class='add'>+#define GSWIP_BM_PCFGp(p)		(0x080 + ((p) * 2))</div><div class='add'>+#define  GSWIP_BM_PCFG_CNTEN		BIT(0)	/* RMON Counter Enable */</div><div class='add'>+#define  GSWIP_BM_PCFG_IGCNT		BIT(1)	/* Ingres Special Tag RMON count */</div><div class='add'>+/* buffer management Port Control Register */</div><div class='add'>+#define GSWIP_BM_RMON_CTRLp(p)		(0x81 + ((p) * 2))</div><div class='add'>+#define  GSWIP_BM_CTRL_RMON_RAM1_RES	BIT(0)	/* Software Reset for RMON RAM 1 */</div><div class='add'>+#define  GSWIP_BM_CTRL_RMON_RAM2_RES	BIT(1)	/* Software Reset for RMON RAM 2 */</div><div class='add'>+</div><div class='add'>+/* PCE */</div><div class='add'>+#define GSWIP_PCE_TBL_KEY(x)		(0x447 - (x))</div><div class='add'>+#define GSWIP_PCE_TBL_MASK		0x448</div><div class='add'>+#define GSWIP_PCE_TBL_VAL(x)		(0x44D - (x))</div><div class='add'>+#define GSWIP_PCE_TBL_ADDR		0x44E</div><div class='add'>+#define GSWIP_PCE_TBL_CTRL		0x44F</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_BAS		BIT(15)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_TYPE	BIT(13)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_VLD		BIT(12)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_KEYFORM	BIT(11)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_GMAP_MASK	GENMASK(10, 7)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_OPMOD_MASK	GENMASK(6, 5)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_OPMOD_ADRD	0x00</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_OPMOD_ADWR	0x20</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_OPMOD_KSRD	0x40</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_OPMOD_KSWR	0x60</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_ADDR_MASK	GENMASK(4, 0)</div><div class='add'>+#define GSWIP_PCE_PMAP1			0x453	/* Monitoring port map */</div><div class='add'>+#define GSWIP_PCE_PMAP2			0x454	/* Default Multicast port map */</div><div class='add'>+#define GSWIP_PCE_PMAP3			0x455	/* Default Unknown Unicast port map */</div><div class='add'>+#define GSWIP_PCE_GCTRL_0		0x456</div><div class='add'>+#define  GSWIP_PCE_GCTRL_0_MTFL		BIT(0)  /* MAC Table Flushing */</div><div class='add'>+#define  GSWIP_PCE_GCTRL_0_MC_VALID	BIT(3)</div><div class='add'>+#define  GSWIP_PCE_GCTRL_0_VLAN		BIT(14) /* VLAN aware Switching */</div><div class='add'>+#define GSWIP_PCE_GCTRL_1		0x457</div><div class='add'>+#define  GSWIP_PCE_GCTRL_1_MAC_GLOCK	BIT(2)	/* MAC Address table lock */</div><div class='add'>+#define  GSWIP_PCE_GCTRL_1_MAC_GLOCK_MOD	BIT(3) /* Mac address table lock forwarding mode */</div><div class='add'>+#define GSWIP_PCE_PCTRL_0p(p)		(0x480 + ((p) * 0xA))</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_TVM		BIT(5)	/* Transparent VLAN mode */</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_VREP		BIT(6)	/* VLAN Replace Mode */</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_INGRESS	BIT(11)	/* Accept special tag in ingress */</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_LISTEN	0x0</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_RX		0x1</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_TX		0x2</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_LEARNING	0x3</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_FORWARDING	0x7</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_MASK	GENMASK(2, 0)</div><div class='add'>+/* Ethernet Switch PCE Port Control Register 3 */</div><div class='add'>+#define GSWIP_PCE_PCTRL_3p(p)		(0x483 + ((p) * 0xA))</div><div class='add'>+#define  GSWIP_PCE_PCTRL_3_LNDIS	BIT(15)  /* Learning Disable */</div><div class='add'>+#define GSWIP_PCE_VCTRL(p)		(0x485 + ((p) * 0xA))</div><div class='add'>+#define  GSWIP_PCE_VCTRL_UVR		BIT(0)	/* Unknown VLAN Rule */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VINR		GENMASK(2, 1) /* VLAN Ingress Tag Rule */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VINR_ALL	0 /* Admit tagged and untagged packets */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VINR_TAGGED	1 /* Admit only tagged packets */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VINR_UNTAGGED	2 /* Admit only untagged packets */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VIMR		BIT(3)	/* VLAN Ingress Member violation rule */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VEMR		BIT(4)	/* VLAN Egress Member violation rule */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VSR		BIT(5)	/* VLAN Security */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VID0		BIT(6)	/* Priority Tagged Rule */</div><div class='add'>+#define GSWIP_PCE_DEFPVID(p)		(0x486 + ((p) * 0xA))</div><div class='add'>+</div><div class='add'>+#define GSWIP_MAC_FLEN			0x8C5</div><div class='add'>+#define GSWIP_MAC_CTRL_0p(p)		(0x903 + ((p) * 0xC))</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_PADEN		BIT(8)</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCS_EN	BIT(7)</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_MASK	0x0070</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_RX	0x0010</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_TX	0x0020</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_RXTX	0x0030</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_NONE	0x0040</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FDUP_MASK	0x000C</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FDUP_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FDUP_EN	0x0004</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FDUP_DIS	0x000C</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_GMII_MASK	0x0003</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_GMII_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_GMII_MII	0x0001</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_GMII_RGMII	0x0002</div><div class='add'>+#define GSWIP_MAC_CTRL_2p(p)		(0x905 + ((p) * 0xC))</div><div class='add'>+#define GSWIP_MAC_CTRL_2_LCHKL		BIT(2) /* Frame Length Check Long Enable */</div><div class='add'>+#define GSWIP_MAC_CTRL_2_MLEN		BIT(3) /* Maximum Untagged Frame Lnegth */</div><div class='add'>+#define GSWIP_MAC_CTRL_4p(p)		(0x907 + ((p) * 0xC))</div><div class='add'>+#define  GSWIP_MAC_CTRL_4_LPIEN		BIT(7) /* LPI Mode Enable */</div><div class='add'>+#define  GSWIP_MAC_CTRL_4_GWAIT_MASK	GENMASK(14, 8) /* LPI Wait Time 1G */</div><div class='add'>+#define  GSWIP_MAC_CTRL_4_GWAIT(t)	u16_encode_bits((t), GSWIP_MAC_CTRL_4_GWAIT_MASK)</div><div class='add'>+#define  GSWIP_MAC_CTRL_4_WAIT_MASK	GENMASK(6, 0) /* LPI Wait Time 100M */</div><div class='add'>+#define  GSWIP_MAC_CTRL_4_WAIT(t)	u16_encode_bits((t), GSWIP_MAC_CTRL_4_WAIT_MASK)</div><div class='add'>+</div><div class='add'>+/* Ethernet Switch Fetch DMA Port Control Register */</div><div class='add'>+#define GSWIP_FDMA_PCTRLp(p)		(0xA80 + ((p) * 0x6))</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_EN		BIT(0)	/* FDMA Port Enable */</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_STEN		BIT(1)	/* Special Tag Insertion Enable */</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_MASK	GENMASK(4, 3)	/* VLAN Modification Control */</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_SHIFT	3	/* VLAN Modification Control */</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_DIS	(0x0 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_PRIO	(0x1 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_ID	(0x2 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_BOTH	(0x3 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='add'>+</div><div class='add'>+/* Ethernet Switch Store DMA Port Control Register */</div><div class='add'>+#define GSWIP_SDMA_PCTRLp(p)		(0xBC0 + ((p) * 0x6))</div><div class='add'>+#define  GSWIP_SDMA_PCTRL_EN		BIT(0)	/* SDMA Port Enable */</div><div class='add'>+#define  GSWIP_SDMA_PCTRL_FCEN		BIT(1)	/* Flow Control Enable */</div><div class='add'>+#define  GSWIP_SDMA_PCTRL_PAUFWD	BIT(3)	/* Pause Frame Forwarding */</div><div class='add'>+</div><div class='add'>+#define GSWIP_TABLE_ACTIVE_VLAN		0x01</div><div class='add'>+#define GSWIP_TABLE_VLAN_MAPPING	0x02</div><div class='add'>+#define GSWIP_TABLE_MAC_BRIDGE		0x0b</div><div class='add'>+#define  GSWIP_TABLE_MAC_BRIDGE_KEY3_FID	GENMASK(5, 0)	/* Filtering identifier */</div><div class='add'>+#define  GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT	GENMASK(7, 4)	/* Port on learned entries */</div><div class='add'>+#define  GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC	BIT(0)		/* Static, non-aging entry */</div><div class='add'>+#define  GSWIP_TABLE_MAC_BRIDGE_VAL1_VALID	BIT(1)		/* Valid bit */</div><div class='add'>+</div><div class='add'>+#define XRX200_GPHY_FW_ALIGN	(16 * 1024)</div><div class='add'>+</div><div class='add'>+/* Maximum packet size supported by the switch. In theory this should be 10240,</div><div class='add'>+ * but long packets currently cause lock-ups with an MTU of over 2526. Medium</div><div class='add'>+ * packets are sometimes dropped (e.g. TCP over 2477, UDP over 2516-2519, ICMP</div><div class='add'>+ * over 2526), hence an MTU value of 2400 seems safe. This issue only affects</div><div class='add'>+ * packet reception. This is probably caused by the PPA engine, which is on the</div><div class='add'>+ * RX part of the device. Packet transmission works properly up to 10240.</div><div class='add'>+ */</div><div class='add'>+#define GSWIP_MAX_PACKET_LENGTH	2400</div><div class='add'>+</div><div class='add'>+#define GSWIP_VLAN_UNAWARE_PVID	0</div><div class='add'>+</div><div class='add'>+struct gswip_pce_microcode {</div><div class='add'>+	u16 val_3;</div><div class='add'>+	u16 val_2;</div><div class='add'>+	u16 val_1;</div><div class='add'>+	u16 val_0;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gswip_hw_info {</div><div class='add'>+	int max_ports;</div><div class='add'>+	unsigned int allowed_cpu_ports;</div><div class='add'>+	unsigned int mii_ports;</div><div class='add'>+	int mii_port_reg_offset;</div><div class='add'>+	bool supports_2500m;</div><div class='add'>+	const struct gswip_pce_microcode (*pce_microcode)[];</div><div class='add'>+	size_t pce_microcode_size;</div><div class='add'>+	enum dsa_tag_protocol tag_protocol;</div><div class='add'>+	void (*phylink_get_caps)(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct phylink_config *config);</div><div class='add'>+	struct phylink_pcs *(*mac_select_pcs)(struct phylink_config *config,</div><div class='add'>+					      phy_interface_t interface);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gswip_gphy_fw {</div><div class='add'>+	struct clk *clk_gate;</div><div class='add'>+	struct reset_control *reset;</div><div class='add'>+	u32 fw_addr_offset;</div><div class='add'>+	char *fw_name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gswip_vlan {</div><div class='add'>+	struct net_device *bridge;</div><div class='add'>+	u16 vid;</div><div class='add'>+	u8 fid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gswip_priv {</div><div class='add'>+	struct regmap *gswip;</div><div class='add'>+	struct regmap *mdio;</div><div class='add'>+	struct regmap *mii;</div><div class='add'>+	const struct gswip_hw_info *hw_info;</div><div class='add'>+	const struct xway_gphy_match_data *gphy_fw_name_cfg;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct regmap *rcu_regmap;</div><div class='add'>+	struct gswip_vlan vlans[64];</div><div class='add'>+	int num_gphy_fw;</div><div class='add'>+	struct gswip_gphy_fw *gphy_fw;</div><div class='add'>+	struct mutex pce_table_lock;</div><div class='add'>+	u16 version;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void gswip_disable_switch(struct gswip_priv *priv);</div><div class='add'>+</div><div class='add'>+int gswip_probe_common(struct gswip_priv *priv, u32 version);</div><div class='add'>+</div><div class='add'>+#endif /* __LANTIQ_GSWIP_H */</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/lantiq_gswip_common.c b/drivers/net/dsa/lantiq/lantiq_gswip_common.c<br/>new file mode 100644<br/>index 000000000000..9da39edf8f57<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/lantiq_gswip_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/lantiq_gswip_common.c</a></div><div class='hunk'>@@ -0,0 +1,1739 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Lantiq / Intel / MaxLinear GSWIP common function library</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Daniel Golle &lt;daniel@makrotopia.org&gt;</div><div class='add'>+ * Copyright (C) 2023 - 2024 MaxLinear Inc.</div><div class='add'>+ * Copyright (C) 2022 Snap One, LLC.  All rights reserved.</div><div class='add'>+ * Copyright (C) 2017 - 2019 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Lantiq Deutschland</div><div class='add'>+ *</div><div class='add'>+ * The VLAN and bridge model the GSWIP hardware uses does not directly</div><div class='add'>+ * matches the model DSA uses.</div><div class='add'>+ *</div><div class='add'>+ * The hardware has 64 possible table entries for bridges with one VLAN</div><div class='add'>+ * ID, one flow id and a list of ports for each bridge. All entries which</div><div class='add'>+ * match the same flow ID are combined in the mac learning table, they</div><div class='add'>+ * act as one global bridge.</div><div class='add'>+ * The hardware does not support VLAN filter on the port, but on the</div><div class='add'>+ * bridge, this driver converts the DSA model to the hardware.</div><div class='add'>+ *</div><div class='add'>+ * The CPU gets all the exception frames which do not match any forwarding</div><div class='add'>+ * rule and the CPU port is also added to all bridges. This makes it possible</div><div class='add'>+ * to handle all the special cases easily in software.</div><div class='add'>+ * At the initialization the driver allocates one bridge table entry for</div><div class='add'>+ * each switch port which is used when the port is used without an</div><div class='add'>+ * explicit bridge. This prevents the frames from being forwarded</div><div class='add'>+ * between all LAN ports by default.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "lantiq_gswip.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+struct gswip_pce_table_entry {</div><div class='add'>+	u16 index;      // PCE_TBL_ADDR.ADDR = pData-&gt;table_index</div><div class='add'>+	u16 table;      // PCE_TBL_CTRL.ADDR = pData-&gt;table</div><div class='add'>+	u16 key[8];</div><div class='add'>+	u16 val[5];</div><div class='add'>+	u16 mask;</div><div class='add'>+	u8 gmap;</div><div class='add'>+	bool type;</div><div class='add'>+	bool valid;</div><div class='add'>+	bool key_mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gswip_rmon_cnt_desc {</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MIB_DESC(_size, _offset, _name) {.size = _size, .offset = _offset, .name = _name}</div><div class='add'>+</div><div class='add'>+static const struct gswip_rmon_cnt_desc gswip_rmon_cnt[] = {</div><div class='add'>+	/** Receive Packet Count (only packets that are accepted and not discarded). */</div><div class='add'>+	MIB_DESC(1, 0x1F, "RxGoodPkts"),</div><div class='add'>+	MIB_DESC(1, 0x23, "RxUnicastPkts"),</div><div class='add'>+	MIB_DESC(1, 0x22, "RxMulticastPkts"),</div><div class='add'>+	MIB_DESC(1, 0x21, "RxFCSErrorPkts"),</div><div class='add'>+	MIB_DESC(1, 0x1D, "RxUnderSizeGoodPkts"),</div><div class='add'>+	MIB_DESC(1, 0x1E, "RxUnderSizeErrorPkts"),</div><div class='add'>+	MIB_DESC(1, 0x1B, "RxOversizeGoodPkts"),</div><div class='add'>+	MIB_DESC(1, 0x1C, "RxOversizeErrorPkts"),</div><div class='add'>+	MIB_DESC(1, 0x20, "RxGoodPausePkts"),</div><div class='add'>+	MIB_DESC(1, 0x1A, "RxAlignErrorPkts"),</div><div class='add'>+	MIB_DESC(1, 0x12, "Rx64BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x13, "Rx127BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x14, "Rx255BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x15, "Rx511BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x16, "Rx1023BytePkts"),</div><div class='add'>+	/** Receive Size 1024-1522 (or more, if configured) Packet Count. */</div><div class='add'>+	MIB_DESC(1, 0x17, "RxMaxBytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x18, "RxDroppedPkts"),</div><div class='add'>+	MIB_DESC(1, 0x19, "RxFilteredPkts"),</div><div class='add'>+	MIB_DESC(2, 0x24, "RxGoodBytes"),</div><div class='add'>+	MIB_DESC(2, 0x26, "RxBadBytes"),</div><div class='add'>+	MIB_DESC(1, 0x11, "TxAcmDroppedPkts"),</div><div class='add'>+	MIB_DESC(1, 0x0C, "TxGoodPkts"),</div><div class='add'>+	MIB_DESC(1, 0x06, "TxUnicastPkts"),</div><div class='add'>+	MIB_DESC(1, 0x07, "TxMulticastPkts"),</div><div class='add'>+	MIB_DESC(1, 0x00, "Tx64BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x01, "Tx127BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x02, "Tx255BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x03, "Tx511BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x04, "Tx1023BytePkts"),</div><div class='add'>+	/** Transmit Size 1024-1522 (or more, if configured) Packet Count. */</div><div class='add'>+	MIB_DESC(1, 0x05, "TxMaxBytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x08, "TxSingleCollCount"),</div><div class='add'>+	MIB_DESC(1, 0x09, "TxMultCollCount"),</div><div class='add'>+	MIB_DESC(1, 0x0A, "TxLateCollCount"),</div><div class='add'>+	MIB_DESC(1, 0x0B, "TxExcessCollCount"),</div><div class='add'>+	MIB_DESC(1, 0x0D, "TxPauseCount"),</div><div class='add'>+	MIB_DESC(1, 0x10, "TxDroppedPkts"),</div><div class='add'>+	MIB_DESC(2, 0x0E, "TxGoodBytes"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 gswip_switch_r_timeout(struct gswip_priv *priv, u32 offset,</div><div class='add'>+				  u32 cleared)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(priv-&gt;gswip, offset, val,</div><div class='add'>+					!(val &amp; cleared), 20, 50000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_mii_mask_cfg(struct gswip_priv *priv, u32 mask, u32 set,</div><div class='add'>+			       int port)</div><div class='add'>+{</div><div class='add'>+	int reg_port;</div><div class='add'>+</div><div class='add'>+	/* MII_CFG register only exists for MII ports */</div><div class='add'>+	if (!(priv-&gt;hw_info-&gt;mii_ports &amp; BIT(port)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg_port = port + priv-&gt;hw_info-&gt;mii_port_reg_offset;</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;mii, GSWIP_MII_CFGp(reg_port), mask,</div><div class='add'>+			  set);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_mdio_poll(struct gswip_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(priv-&gt;mdio, GSWIP_MDIO_CTRL, ctrl,</div><div class='add'>+					!(ctrl &amp; GSWIP_MDIO_CTRL_BUSY), 40, 4000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_mdio_wr(struct mii_bus *bus, int addr, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = bus-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = gswip_mdio_poll(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;bus-&gt;dev, "waiting for MDIO bus busy timed out\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;mdio, GSWIP_MDIO_WRITE, val);</div><div class='add'>+	regmap_write(priv-&gt;mdio, GSWIP_MDIO_CTRL,</div><div class='add'>+		     GSWIP_MDIO_CTRL_BUSY | GSWIP_MDIO_CTRL_WR |</div><div class='add'>+		     ((addr &amp; GSWIP_MDIO_CTRL_PHYAD_MASK) &lt;&lt; GSWIP_MDIO_CTRL_PHYAD_SHIFT) |</div><div class='add'>+		     (reg &amp; GSWIP_MDIO_CTRL_REGAD_MASK));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_mdio_rd(struct mii_bus *bus, int addr, int reg)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = bus-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = gswip_mdio_poll(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;bus-&gt;dev, "waiting for MDIO bus busy timed out\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;mdio, GSWIP_MDIO_CTRL,</div><div class='add'>+		     GSWIP_MDIO_CTRL_BUSY | GSWIP_MDIO_CTRL_RD |</div><div class='add'>+		     ((addr &amp; GSWIP_MDIO_CTRL_PHYAD_MASK) &lt;&lt; GSWIP_MDIO_CTRL_PHYAD_SHIFT) |</div><div class='add'>+		     (reg &amp; GSWIP_MDIO_CTRL_REGAD_MASK));</div><div class='add'>+</div><div class='add'>+	err = gswip_mdio_poll(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;bus-&gt;dev, "waiting for MDIO bus busy timed out\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;mdio, GSWIP_MDIO_READ, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_mdio(struct gswip_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device_node *mdio_np, *switch_np = priv-&gt;dev-&gt;of_node;</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	mdio_np = of_get_compatible_child(switch_np, "lantiq,xrx200-mdio");</div><div class='add'>+	if (!mdio_np)</div><div class='add'>+		mdio_np = of_get_child_by_name(switch_np, "mdio");</div><div class='add'>+</div><div class='add'>+	if (!of_device_is_available(mdio_np))</div><div class='add'>+		goto out_put_node;</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!bus) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus-&gt;priv = priv;</div><div class='add'>+	bus-&gt;read = gswip_mdio_rd;</div><div class='add'>+	bus-&gt;write = gswip_mdio_wr;</div><div class='add'>+	bus-&gt;name = "lantiq,xrx200-mdio";</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-mii", dev_name(priv-&gt;dev));</div><div class='add'>+	bus-&gt;parent = priv-&gt;dev;</div><div class='add'>+</div><div class='add'>+	err = devm_of_mdiobus_register(dev, bus, mdio_np);</div><div class='add'>+</div><div class='add'>+out_put_node:</div><div class='add'>+	of_node_put(mdio_np);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_pce_table_entry_read(struct gswip_priv *priv,</div><div class='add'>+				      struct gswip_pce_table_entry *tbl)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+	u32 crtl;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	u16 addr_mode = tbl-&gt;key_mode ? GSWIP_PCE_TBL_CTRL_OPMOD_KSRD :</div><div class='add'>+					GSWIP_PCE_TBL_CTRL_OPMOD_ADRD;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_ADDR, tbl-&gt;index);</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_BAS,</div><div class='add'>+			  tbl-&gt;table | addr_mode | GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;key); i++) {</div><div class='add'>+		err = regmap_read(priv-&gt;gswip, GSWIP_PCE_TBL_KEY(i), &amp;tmp);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+		tbl-&gt;key[i] = tmp;</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;val); i++) {</div><div class='add'>+		err = regmap_read(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(i), &amp;tmp);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+		tbl-&gt;val[i] = tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;gswip, GSWIP_PCE_TBL_MASK, &amp;tmp);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	tbl-&gt;mask = tmp;</div><div class='add'>+	err = regmap_read(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL, &amp;crtl);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	tbl-&gt;type = !!(crtl &amp; GSWIP_PCE_TBL_CTRL_TYPE);</div><div class='add'>+	tbl-&gt;valid = !!(crtl &amp; GSWIP_PCE_TBL_CTRL_VLD);</div><div class='add'>+	tbl-&gt;gmap = (crtl &amp; GSWIP_PCE_TBL_CTRL_GMAP_MASK) &gt;&gt; 7;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_pce_table_entry_write(struct gswip_priv *priv,</div><div class='add'>+				       struct gswip_pce_table_entry *tbl)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+	u32 crtl;</div><div class='add'>+	u16 addr_mode = tbl-&gt;key_mode ? GSWIP_PCE_TBL_CTRL_OPMOD_KSWR :</div><div class='add'>+					GSWIP_PCE_TBL_CTRL_OPMOD_ADWR;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+	if (err) {</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_ADDR, tbl-&gt;index);</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_MASK,</div><div class='add'>+			  tbl-&gt;table | addr_mode);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;key); i++)</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_KEY(i), tbl-&gt;key[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;val); i++)</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(i), tbl-&gt;val[i]);</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_MASK,</div><div class='add'>+			  tbl-&gt;table | addr_mode);</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_MASK, tbl-&gt;mask);</div><div class='add'>+</div><div class='add'>+	regmap_read(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL, &amp;crtl);</div><div class='add'>+	crtl &amp;= ~(GSWIP_PCE_TBL_CTRL_TYPE | GSWIP_PCE_TBL_CTRL_VLD |</div><div class='add'>+		  GSWIP_PCE_TBL_CTRL_GMAP_MASK);</div><div class='add'>+	if (tbl-&gt;type)</div><div class='add'>+		crtl |= GSWIP_PCE_TBL_CTRL_TYPE;</div><div class='add'>+	if (tbl-&gt;valid)</div><div class='add'>+		crtl |= GSWIP_PCE_TBL_CTRL_VLD;</div><div class='add'>+	crtl |= (tbl-&gt;gmap &lt;&lt; 7) &amp; GSWIP_PCE_TBL_CTRL_GMAP_MASK;</div><div class='add'>+	crtl |= GSWIP_PCE_TBL_CTRL_BAS;</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL, crtl);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Add the LAN port into a bridge with the CPU port by</div><div class='add'>+ * default. This prevents automatic forwarding of</div><div class='add'>+ * packages between the LAN ports when no explicit</div><div class='add'>+ * bridge is configured.</div><div class='add'>+ */</div><div class='add'>+static int gswip_add_single_port_br(struct gswip_priv *priv, int port, bool add)</div><div class='add'>+{</div><div class='add'>+	struct gswip_pce_table_entry vlan_active = {0,};</div><div class='add'>+	struct gswip_pce_table_entry vlan_mapping = {0,};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	vlan_active.index = port + 1;</div><div class='add'>+	vlan_active.table = GSWIP_TABLE_ACTIVE_VLAN;</div><div class='add'>+	vlan_active.key[0] = GSWIP_VLAN_UNAWARE_PVID;</div><div class='add'>+	vlan_active.val[0] = port + 1 /* fid */;</div><div class='add'>+	vlan_active.valid = add;</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_active);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write active VLAN: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!add)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vlan_mapping.index = port + 1;</div><div class='add'>+	vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='add'>+	vlan_mapping.val[0] = GSWIP_VLAN_UNAWARE_PVID;</div><div class='add'>+	vlan_mapping.val[1] = BIT(port) | dsa_cpu_ports(priv-&gt;ds);</div><div class='add'>+	vlan_mapping.val[2] = 0;</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_mapping);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write VLAN mapping: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_set_learning(struct gswip_priv *priv, int port,</div><div class='add'>+				   bool enable)</div><div class='add'>+{</div><div class='add'>+	if (!GSWIP_VERSION_GE(priv, GSWIP_VERSION_2_2))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* learning disable bit */</div><div class='add'>+	return regmap_update_bits(priv-&gt;gswip, GSWIP_PCE_PCTRL_3p(port),</div><div class='add'>+				  GSWIP_PCE_PCTRL_3_LNDIS,</div><div class='add'>+				  enable ? 0 : GSWIP_PCE_PCTRL_3_LNDIS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct switchdev_brport_flags flags,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	unsigned long supported = 0;</div><div class='add'>+</div><div class='add'>+	if (GSWIP_VERSION_GE(priv, GSWIP_VERSION_2_2))</div><div class='add'>+		supported |= BR_LEARNING;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; ~supported)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct switchdev_brport_flags flags,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING)</div><div class='add'>+		return gswip_port_set_learning(priv, port,</div><div class='add'>+					       !!(flags.val &amp; BR_LEARNING));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_setup(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port)) {</div><div class='add'>+		err = gswip_add_single_port_br(priv, port, true);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port)) {</div><div class='add'>+		u32 mdio_phy = 0;</div><div class='add'>+</div><div class='add'>+		if (phydev)</div><div class='add'>+			mdio_phy = phydev-&gt;mdio.addr &amp; GSWIP_MDIO_PHY_ADDR_MASK;</div><div class='add'>+</div><div class='add'>+		regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_PHYp(port),</div><div class='add'>+				  GSWIP_MDIO_PHY_ADDR_MASK,</div><div class='add'>+				  mdio_phy);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* RMON Counter Enable for port */</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_BM_PCFGp(port), GSWIP_BM_PCFG_CNTEN);</div><div class='add'>+</div><div class='add'>+	/* enable port fetch/store dma &amp; VLAN Modification */</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_FDMA_PCTRLp(port),</div><div class='add'>+			GSWIP_FDMA_PCTRL_EN | GSWIP_FDMA_PCTRL_VLANMOD_BOTH);</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_SDMA_PCTRLp(port),</div><div class='add'>+			GSWIP_SDMA_PCTRL_EN);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	regmap_clear_bits(priv-&gt;gswip, GSWIP_FDMA_PCTRLp(port),</div><div class='add'>+			  GSWIP_FDMA_PCTRL_EN);</div><div class='add'>+	regmap_clear_bits(priv-&gt;gswip, GSWIP_SDMA_PCTRLp(port),</div><div class='add'>+			  GSWIP_SDMA_PCTRL_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_pce_load_microcode(struct gswip_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_ADWR,</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_ADWR);</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_MASK, 0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;hw_info-&gt;pce_microcode_size; i++) {</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_ADDR, i);</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(0),</div><div class='add'>+			     (*priv-&gt;hw_info-&gt;pce_microcode)[i].val_0);</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(1),</div><div class='add'>+			     (*priv-&gt;hw_info-&gt;pce_microcode)[i].val_1);</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(2),</div><div class='add'>+			     (*priv-&gt;hw_info-&gt;pce_microcode)[i].val_2);</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(3),</div><div class='add'>+			     (*priv-&gt;hw_info-&gt;pce_microcode)[i].val_3);</div><div class='add'>+</div><div class='add'>+		/* start the table access: */</div><div class='add'>+		regmap_set_bits(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+				GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+		err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+					     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* tell the switch that the microcode is loaded */</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_PCE_GCTRL_0,</div><div class='add'>+			GSWIP_PCE_GCTRL_0_MC_VALID);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_commit_pvid(struct gswip_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(priv-&gt;ds, port);</div><div class='add'>+	struct net_device *br = dsa_port_bridge_dev_get(dp);</div><div class='add'>+	u32 vinr;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_user(dp))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (br) {</div><div class='add'>+		u16 pvid = GSWIP_VLAN_UNAWARE_PVID;</div><div class='add'>+</div><div class='add'>+		if (br_vlan_enabled(br))</div><div class='add'>+			br_vlan_get_pvid(br, &amp;pvid);</div><div class='add'>+</div><div class='add'>+		/* VLAN-aware bridge ports with no PVID will use Active VLAN</div><div class='add'>+		 * index 0. The expectation is that this drops all untagged and</div><div class='add'>+		 * VID-0 tagged ingress traffic.</div><div class='add'>+		 */</div><div class='add'>+		idx = 0;</div><div class='add'>+		for (int i = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+		     i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+			if (priv-&gt;vlans[i].bridge == br &amp;&amp;</div><div class='add'>+			    priv-&gt;vlans[i].vid == pvid) {</div><div class='add'>+				idx = i;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* The Active VLAN table index as configured by</div><div class='add'>+		 * gswip_add_single_port_br()</div><div class='add'>+		 */</div><div class='add'>+		idx = port + 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vinr = idx ? GSWIP_PCE_VCTRL_VINR_ALL : GSWIP_PCE_VCTRL_VINR_TAGGED;</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_VCTRL(port),</div><div class='add'>+			  GSWIP_PCE_VCTRL_VINR,</div><div class='add'>+			  FIELD_PREP(GSWIP_PCE_VCTRL_VINR, vinr));</div><div class='add'>+</div><div class='add'>+	/* Note that in GSWIP 2.2 VLAN mode the VID needs to be programmed</div><div class='add'>+	 * directly instead of referencing the index in the Active VLAN Tablet.</div><div class='add'>+	 * However, without the VLANMD bit (9) in PCE_GCTRL_1 (0x457) even</div><div class='add'>+	 * GSWIP 2.2 and newer hardware maintain the GSWIP 2.1 behavior.</div><div class='add'>+	 */</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_DEFPVID(port), idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+				     bool vlan_filtering,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (vlan_filtering) {</div><div class='add'>+		/* Use tag based VLAN */</div><div class='add'>+		regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_VCTRL(port),</div><div class='add'>+				  GSWIP_PCE_VCTRL_VSR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_UVR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VIMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VEMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VID0,</div><div class='add'>+				  GSWIP_PCE_VCTRL_UVR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VIMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VEMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VID0);</div><div class='add'>+		regmap_clear_bits(priv-&gt;gswip, GSWIP_PCE_PCTRL_0p(port),</div><div class='add'>+				  GSWIP_PCE_PCTRL_0_TVM);</div><div class='add'>+	} else {</div><div class='add'>+		/* Use port based VLAN */</div><div class='add'>+		regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_VCTRL(port),</div><div class='add'>+				  GSWIP_PCE_VCTRL_UVR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VIMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VEMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VID0 |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VSR,</div><div class='add'>+				  GSWIP_PCE_VCTRL_VSR);</div><div class='add'>+		regmap_set_bits(priv-&gt;gswip, GSWIP_PCE_PCTRL_0p(port),</div><div class='add'>+				GSWIP_PCE_PCTRL_0_TVM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gswip_port_commit_pvid(priv, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_mii_delay_setup(struct gswip_priv *priv, struct dsa_port *dp,</div><div class='add'>+				  phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	u32 tx_delay = GSWIP_MII_PCDU_TXDLY_DEFAULT;</div><div class='add'>+	u32 rx_delay = GSWIP_MII_PCDU_RXDLY_DEFAULT;</div><div class='add'>+	struct device_node *port_dn = dp-&gt;dn;</div><div class='add'>+	u16 mii_pcdu_reg;</div><div class='add'>+</div><div class='add'>+	/* As MII_PCDU registers only exist for MII ports, silently return</div><div class='add'>+	 * unless the port is an MII port</div><div class='add'>+	 */</div><div class='add'>+	if (!(priv-&gt;hw_info-&gt;mii_ports &amp; BIT(dp-&gt;index)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (dp-&gt;index + priv-&gt;hw_info-&gt;mii_port_reg_offset) {</div><div class='add'>+	case 0:</div><div class='add'>+		mii_pcdu_reg = GSWIP_MII_PCDU0;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		mii_pcdu_reg = GSWIP_MII_PCDU1;</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+		mii_pcdu_reg = GSWIP_MII_PCDU5;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* legacy code to set default delays according to the interface mode */</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+		tx_delay = 0;</div><div class='add'>+		rx_delay = 0;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		rx_delay = 0;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		tx_delay = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* allow settings delays using device tree properties */</div><div class='add'>+	of_property_read_u32(port_dn, "rx-internal-delay-ps", &amp;rx_delay);</div><div class='add'>+	of_property_read_u32(port_dn, "tx-internal-delay-ps", &amp;tx_delay);</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;mii, mii_pcdu_reg,</div><div class='add'>+			  GSWIP_MII_PCDU_TXDLY_MASK |</div><div class='add'>+			  GSWIP_MII_PCDU_RXDLY_MASK,</div><div class='add'>+			  GSWIP_MII_PCDU_TXDLY(tx_delay) |</div><div class='add'>+			  GSWIP_MII_PCDU_RXDLY(rx_delay));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	unsigned int cpu_ports = dsa_cpu_ports(ds);</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_SWRES, GSWIP_SWRES_R0);</div><div class='add'>+	usleep_range(5000, 10000);</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_SWRES, 0);</div><div class='add'>+</div><div class='add'>+	/* disable port fetch/store dma on all ports */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;hw_info-&gt;max_ports; i++) {</div><div class='add'>+		gswip_port_disable(ds, i);</div><div class='add'>+		gswip_port_vlan_filtering(ds, i, false, NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enable Switch */</div><div class='add'>+	regmap_set_bits(priv-&gt;mdio, GSWIP_MDIO_GLOB, GSWIP_MDIO_GLOB_ENABLE);</div><div class='add'>+</div><div class='add'>+	err = gswip_pce_load_microcode(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "writing PCE microcode failed, %i\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Default unknown Broadcast/Multicast/Unicast port maps */</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_PMAP1, cpu_ports);</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_PMAP2, cpu_ports);</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_PMAP3, cpu_ports);</div><div class='add'>+</div><div class='add'>+	/* Deactivate MDIO PHY auto polling. Some PHYs as the AR8030 have an</div><div class='add'>+	 * interoperability problem with this auto polling mechanism because</div><div class='add'>+	 * their status registers think that the link is in a different state</div><div class='add'>+	 * than it actually is. For the AR8030 it has the BMSR_ESTATEN bit set</div><div class='add'>+	 * as well as ESTATUS_1000_TFULL and ESTATUS_1000_XFULL. This makes the</div><div class='add'>+	 * auto polling state machine consider the link being negotiated with</div><div class='add'>+	 * 1Gbit/s. Since the PHY itself is a Fast Ethernet RMII PHY this leads</div><div class='add'>+	 * to the switch port being completely dead (RX and TX are both not</div><div class='add'>+	 * working).</div><div class='add'>+	 * Also with various other PHY / port combinations (PHY11G GPHY, PHY22F</div><div class='add'>+	 * GPHY, external RGMII PEF7071/7072) any traffic would stop. Sometimes</div><div class='add'>+	 * it would work fine for a few minutes to hours and then stop, on</div><div class='add'>+	 * other device it would no traffic could be sent or received at all.</div><div class='add'>+	 * Testing shows that when PHY auto polling is disabled these problems</div><div class='add'>+	 * go away.</div><div class='add'>+	 */</div><div class='add'>+	regmap_write(priv-&gt;mdio, GSWIP_MDIO_MDC_CFG0, 0x0);</div><div class='add'>+</div><div class='add'>+	/* Configure the MDIO Clock 2.5 MHz */</div><div class='add'>+	regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_MDC_CFG1, 0xff, 0x09);</div><div class='add'>+</div><div class='add'>+	/* bring up the mdio bus */</div><div class='add'>+	err = gswip_mdio(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "mdio bus setup failed\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable the xMII interface and clear it's isolation bit */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;hw_info-&gt;max_ports; i++)</div><div class='add'>+		gswip_mii_mask_cfg(priv,</div><div class='add'>+				   GSWIP_MII_CFG_EN | GSWIP_MII_CFG_ISOLATE,</div><div class='add'>+				   0, i);</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {</div><div class='add'>+		/* enable special tag insertion on cpu port */</div><div class='add'>+		regmap_set_bits(priv-&gt;gswip, GSWIP_FDMA_PCTRLp(cpu_dp-&gt;index),</div><div class='add'>+				GSWIP_FDMA_PCTRL_STEN);</div><div class='add'>+</div><div class='add'>+		/* accept special tag in ingress direction */</div><div class='add'>+		regmap_set_bits(priv-&gt;gswip,</div><div class='add'>+				GSWIP_PCE_PCTRL_0p(cpu_dp-&gt;index),</div><div class='add'>+				GSWIP_PCE_PCTRL_0_INGRESS);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_BM_QUEUE_GCTRL,</div><div class='add'>+			GSWIP_BM_QUEUE_GCTRL_GL_MOD);</div><div class='add'>+</div><div class='add'>+	/* VLAN aware Switching */</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_PCE_GCTRL_0,</div><div class='add'>+			GSWIP_PCE_GCTRL_0_VLAN);</div><div class='add'>+</div><div class='add'>+	/* Flush MAC Table */</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_PCE_GCTRL_0,</div><div class='add'>+			GSWIP_PCE_GCTRL_0_MTFL);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_PCE_GCTRL_0,</div><div class='add'>+				     GSWIP_PCE_GCTRL_0_MTFL);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "MAC flushing didn't finish\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ds-&gt;mtu_enforcement_ingress = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol gswip_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+						    int port,</div><div class='add'>+						    enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;hw_info-&gt;tag_protocol;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_vlan_active_create(struct gswip_priv *priv,</div><div class='add'>+				    struct net_device *bridge,</div><div class='add'>+				    int fid, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct gswip_pce_table_entry vlan_active = {0,};</div><div class='add'>+	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	int idx = -1;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Look for a free slot */</div><div class='add'>+	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+		if (!priv-&gt;vlans[i].bridge) {</div><div class='add'>+			idx = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (idx == -1)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	if (fid == -1)</div><div class='add'>+		fid = idx;</div><div class='add'>+</div><div class='add'>+	vlan_active.index = idx;</div><div class='add'>+	vlan_active.table = GSWIP_TABLE_ACTIVE_VLAN;</div><div class='add'>+	vlan_active.key[0] = vid;</div><div class='add'>+	vlan_active.val[0] = fid;</div><div class='add'>+	vlan_active.valid = true;</div><div class='add'>+</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_active);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write active VLAN: %d\n",	err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;vlans[idx].bridge = bridge;</div><div class='add'>+	priv-&gt;vlans[idx].vid = vid;</div><div class='add'>+	priv-&gt;vlans[idx].fid = fid;</div><div class='add'>+</div><div class='add'>+	return idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_vlan_active_remove(struct gswip_priv *priv, int idx)</div><div class='add'>+{</div><div class='add'>+	struct gswip_pce_table_entry vlan_active = {0,};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	vlan_active.index = idx;</div><div class='add'>+	vlan_active.table = GSWIP_TABLE_ACTIVE_VLAN;</div><div class='add'>+	vlan_active.valid = false;</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_active);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to delete active VLAN: %d\n", err);</div><div class='add'>+	priv-&gt;vlans[idx].bridge = NULL;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_vlan_add(struct gswip_priv *priv, struct net_device *bridge,</div><div class='add'>+			  int port, u16 vid, bool untagged, bool pvid,</div><div class='add'>+			  bool vlan_aware)</div><div class='add'>+{</div><div class='add'>+	struct gswip_pce_table_entry vlan_mapping = {0,};</div><div class='add'>+	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	unsigned int cpu_ports = dsa_cpu_ports(priv-&gt;ds);</div><div class='add'>+	bool active_vlan_created = false;</div><div class='add'>+	int fid = -1, idx = -1;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	/* Check if there is already a page for this bridge */</div><div class='add'>+	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+		if (priv-&gt;vlans[i].bridge == bridge) {</div><div class='add'>+			if (vlan_aware) {</div><div class='add'>+				if (fid != -1 &amp;&amp; fid != priv-&gt;vlans[i].fid)</div><div class='add'>+					dev_err(priv-&gt;dev, "one bridge with multiple flow ids\n");</div><div class='add'>+				fid = priv-&gt;vlans[i].fid;</div><div class='add'>+			}</div><div class='add'>+			if (priv-&gt;vlans[i].vid == vid) {</div><div class='add'>+				idx = i;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If this bridge is not programmed yet, add a Active VLAN table</div><div class='add'>+	 * entry in a free slot and prepare the VLAN mapping table entry.</div><div class='add'>+	 */</div><div class='add'>+	if (idx == -1) {</div><div class='add'>+		idx = gswip_vlan_active_create(priv, bridge, fid, vid);</div><div class='add'>+		if (idx &lt; 0)</div><div class='add'>+			return idx;</div><div class='add'>+		active_vlan_created = true;</div><div class='add'>+</div><div class='add'>+		vlan_mapping.index = idx;</div><div class='add'>+		vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='add'>+	} else {</div><div class='add'>+		/* Read the existing VLAN mapping entry from the switch */</div><div class='add'>+		vlan_mapping.index = idx;</div><div class='add'>+		vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='add'>+		err = gswip_pce_table_entry_read(priv, &amp;vlan_mapping);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to read VLAN mapping: %d\n",</div><div class='add'>+				err);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* VLAN ID byte, maps to the VLAN ID of vlan active table */</div><div class='add'>+	vlan_mapping.val[0] = vid;</div><div class='add'>+	/* Update the VLAN mapping entry and write it to the switch */</div><div class='add'>+	vlan_mapping.val[1] |= cpu_ports;</div><div class='add'>+	vlan_mapping.val[1] |= BIT(port);</div><div class='add'>+	if (vlan_aware)</div><div class='add'>+		vlan_mapping.val[2] |= cpu_ports;</div><div class='add'>+	if (untagged)</div><div class='add'>+		vlan_mapping.val[2] &amp;= ~BIT(port);</div><div class='add'>+	else</div><div class='add'>+		vlan_mapping.val[2] |= BIT(port);</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_mapping);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write VLAN mapping: %d\n", err);</div><div class='add'>+		/* In case an Active VLAN was creaetd delete it again */</div><div class='add'>+		if (active_vlan_created)</div><div class='add'>+			gswip_vlan_active_remove(priv, idx);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gswip_port_commit_pvid(priv, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_vlan_remove(struct gswip_priv *priv,</div><div class='add'>+			     struct net_device *bridge, int port,</div><div class='add'>+			     u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct gswip_pce_table_entry vlan_mapping = {0,};</div><div class='add'>+	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	int idx = -1;</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Check if there is already a page for this bridge */</div><div class='add'>+	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+		if (priv-&gt;vlans[i].bridge == bridge &amp;&amp;</div><div class='add'>+		    priv-&gt;vlans[i].vid == vid) {</div><div class='add'>+			idx = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (idx == -1) {</div><div class='add'>+		dev_err(priv-&gt;dev, "Port %d cannot find VID %u of bridge %s\n",</div><div class='add'>+			port, vid, bridge ? bridge-&gt;name : "(null)");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vlan_mapping.index = idx;</div><div class='add'>+	vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='add'>+	err = gswip_pce_table_entry_read(priv, &amp;vlan_mapping);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to read VLAN mapping: %d\n",	err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vlan_mapping.val[1] &amp;= ~BIT(port);</div><div class='add'>+	vlan_mapping.val[2] &amp;= ~BIT(port);</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_mapping);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write VLAN mapping: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* In case all ports are removed from the bridge, remove the VLAN */</div><div class='add'>+	if (!(vlan_mapping.val[1] &amp; ~dsa_cpu_ports(priv-&gt;ds))) {</div><div class='add'>+		err = gswip_vlan_active_remove(priv, idx);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to write active VLAN: %d\n",</div><div class='add'>+				err);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gswip_port_commit_pvid(priv, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct dsa_bridge bridge,</div><div class='add'>+				  bool *tx_fwd_offload,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net_device *br = bridge.dev;</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Set up the VLAN for VLAN-unaware bridging for this port, and remove</div><div class='add'>+	 * it from the "single-port bridge" through which it was operating as</div><div class='add'>+	 * standalone.</div><div class='add'>+	 */</div><div class='add'>+	err = gswip_vlan_add(priv, br, port, GSWIP_VLAN_UNAWARE_PVID,</div><div class='add'>+			     true, true, false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return gswip_add_single_port_br(priv, port, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct net_device *br = bridge.dev;</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Add the port back to the "single-port bridge", and remove it from</div><div class='add'>+	 * the VLAN-unaware PVID created for this bridge.</div><div class='add'>+	 */</div><div class='add'>+	gswip_add_single_port_br(priv, port, true);</div><div class='add'>+	gswip_vlan_remove(priv, br, port, GSWIP_VLAN_UNAWARE_PVID);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_vlan_prepare(struct dsa_switch *ds, int port,</div><div class='add'>+				   const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	int pos = max_ports;</div><div class='add'>+	int i, idx = -1;</div><div class='add'>+</div><div class='add'>+	/* We only support VLAN filtering on bridges */</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port) &amp;&amp; !bridge)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Check if there is already a page for this VLAN */</div><div class='add'>+	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+		if (priv-&gt;vlans[i].bridge == bridge &amp;&amp;</div><div class='add'>+		    priv-&gt;vlans[i].vid == vlan-&gt;vid) {</div><div class='add'>+			idx = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If this VLAN is not programmed yet, we have to reserve</div><div class='add'>+	 * one entry in the VLAN table. Make sure we start at the</div><div class='add'>+	 * next position round.</div><div class='add'>+	 */</div><div class='add'>+	if (idx == -1) {</div><div class='add'>+		/* Look for a free slot */</div><div class='add'>+		for (; pos &lt; ARRAY_SIZE(priv-&gt;vlans); pos++) {</div><div class='add'>+			if (!priv-&gt;vlans[pos].bridge) {</div><div class='add'>+				idx = pos;</div><div class='add'>+				pos++;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (idx == -1) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack, "No slot in VLAN table");</div><div class='add'>+			return -ENOSPC;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+			       const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (vlan-&gt;vid == GSWIP_VLAN_UNAWARE_PVID)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = gswip_port_vlan_prepare(ds, port, vlan, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* We have to receive all packets on the CPU port and should not</div><div class='add'>+	 * do any VLAN filtering here. This is also called with bridge</div><div class='add'>+	 * NULL and then we do not know for which bridge to configure</div><div class='add'>+	 * this.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return gswip_vlan_add(priv, bridge, port, vlan-&gt;vid, untagged, pvid,</div><div class='add'>+			      true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+			       const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (vlan-&gt;vid == GSWIP_VLAN_UNAWARE_PVID)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* We have to receive all packets on the CPU port and should not</div><div class='add'>+	 * do any VLAN filtering here. This is also called with bridge</div><div class='add'>+	 * NULL and then we do not know for which bridge to configure</div><div class='add'>+	 * this.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return gswip_vlan_remove(priv, bridge, port, vlan-&gt;vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct gswip_pce_table_entry mac_bridge = {0,};</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 2048; i++) {</div><div class='add'>+		mac_bridge.table = GSWIP_TABLE_MAC_BRIDGE;</div><div class='add'>+		mac_bridge.index = i;</div><div class='add'>+</div><div class='add'>+		err = gswip_pce_table_entry_read(priv, &amp;mac_bridge);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to read mac bridge: %d\n",</div><div class='add'>+				err);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!mac_bridge.valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (mac_bridge.val[1] &amp; GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (port != FIELD_GET(GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT,</div><div class='add'>+				      mac_bridge.val[0]))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mac_bridge.valid = false;</div><div class='add'>+		err = gswip_pce_table_entry_write(priv, &amp;mac_bridge);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to write mac bridge: %d\n",</div><div class='add'>+				err);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 stp_state;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		regmap_clear_bits(priv-&gt;gswip, GSWIP_SDMA_PCTRLp(port),</div><div class='add'>+				  GSWIP_SDMA_PCTRL_EN);</div><div class='add'>+		return;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		stp_state = GSWIP_PCE_PCTRL_0_PSTATE_LISTEN;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		stp_state = GSWIP_PCE_PCTRL_0_PSTATE_LEARNING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		stp_state = GSWIP_PCE_PCTRL_0_PSTATE_FORWARDING;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(priv-&gt;dev, "invalid STP state: %d\n", state);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_SDMA_PCTRLp(port),</div><div class='add'>+			GSWIP_SDMA_PCTRL_EN);</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_PCTRL_0p(port),</div><div class='add'>+			  GSWIP_PCE_PCTRL_0_PSTATE_MASK,</div><div class='add'>+			  stp_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_fdb(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct net_device *bridge, const unsigned char *addr,</div><div class='add'>+			  u16 vid, bool add)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct gswip_pce_table_entry mac_bridge = {0,};</div><div class='add'>+	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	int fid = -1;</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+		if (priv-&gt;vlans[i].bridge == bridge) {</div><div class='add'>+			fid = priv-&gt;vlans[i].fid;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fid == -1) {</div><div class='add'>+		dev_err(priv-&gt;dev, "no FID found for bridge %s\n",</div><div class='add'>+			bridge-&gt;name);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mac_bridge.table = GSWIP_TABLE_MAC_BRIDGE;</div><div class='add'>+	mac_bridge.key_mode = true;</div><div class='add'>+	mac_bridge.key[0] = addr[5] | (addr[4] &lt;&lt; 8);</div><div class='add'>+	mac_bridge.key[1] = addr[3] | (addr[2] &lt;&lt; 8);</div><div class='add'>+	mac_bridge.key[2] = addr[1] | (addr[0] &lt;&lt; 8);</div><div class='add'>+	mac_bridge.key[3] = FIELD_PREP(GSWIP_TABLE_MAC_BRIDGE_KEY3_FID, fid);</div><div class='add'>+	mac_bridge.val[0] = add ? BIT(port) : 0; /* port map */</div><div class='add'>+	if (GSWIP_VERSION_GE(priv, GSWIP_VERSION_2_2_ETC))</div><div class='add'>+		mac_bridge.val[1] = add ? (GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC |</div><div class='add'>+					   GSWIP_TABLE_MAC_BRIDGE_VAL1_VALID) : 0;</div><div class='add'>+	else</div><div class='add'>+		mac_bridge.val[1] = GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC;</div><div class='add'>+</div><div class='add'>+	mac_bridge.valid = add;</div><div class='add'>+</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;mac_bridge);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write mac bridge: %d\n", err);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			      const unsigned char *addr, u16 vid,</div><div class='add'>+			      struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	if (db.type != DSA_DB_BRIDGE)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return gswip_port_fdb(ds, port, db.bridge.dev, addr, vid, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			      const unsigned char *addr, u16 vid,</div><div class='add'>+			      struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	if (db.type != DSA_DB_BRIDGE)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return gswip_port_fdb(ds, port, db.bridge.dev, addr, vid, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			       dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct gswip_pce_table_entry mac_bridge = {0,};</div><div class='add'>+	unsigned char addr[ETH_ALEN];</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 2048; i++) {</div><div class='add'>+		mac_bridge.table = GSWIP_TABLE_MAC_BRIDGE;</div><div class='add'>+		mac_bridge.index = i;</div><div class='add'>+</div><div class='add'>+		err = gswip_pce_table_entry_read(priv, &amp;mac_bridge);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev,</div><div class='add'>+				"failed to read mac bridge entry %d: %d\n",</div><div class='add'>+				i, err);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!mac_bridge.valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		addr[5] = mac_bridge.key[0] &amp; 0xff;</div><div class='add'>+		addr[4] = (mac_bridge.key[0] &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+		addr[3] = mac_bridge.key[1] &amp; 0xff;</div><div class='add'>+		addr[2] = (mac_bridge.key[1] &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+		addr[1] = mac_bridge.key[2] &amp; 0xff;</div><div class='add'>+		addr[0] = (mac_bridge.key[2] &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+		if (mac_bridge.val[1] &amp; GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC) {</div><div class='add'>+			if (mac_bridge.val[0] &amp; BIT(port)) {</div><div class='add'>+				err = cb(addr, 0, true, data);</div><div class='add'>+				if (err)</div><div class='add'>+					return err;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			if (port == FIELD_GET(GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT,</div><div class='add'>+					      mac_bridge.val[0])) {</div><div class='add'>+				err = cb(addr, 0, false, data);</div><div class='add'>+				if (err)</div><div class='add'>+					return err;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	/* Includes 8 bytes for special header. */</div><div class='add'>+	return GSWIP_MAX_PACKET_LENGTH - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* CPU port always has maximum mtu of user ports, so use it to set</div><div class='add'>+	 * switch frame size, including 8 byte special header.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_cpu_port(ds, port)) {</div><div class='add'>+		new_mtu += 8;</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_MAC_FLEN,</div><div class='add'>+			     VLAN_ETH_HLEN + new_mtu + ETH_FCS_LEN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable MLEN for ports with non-standard MTUs, including the special</div><div class='add'>+	 * header on the CPU port added above.</div><div class='add'>+	 */</div><div class='add'>+	if (new_mtu != ETH_DATA_LEN)</div><div class='add'>+		regmap_set_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_2p(port),</div><div class='add'>+				GSWIP_MAC_CTRL_2_MLEN);</div><div class='add'>+	else</div><div class='add'>+		regmap_clear_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_2p(port),</div><div class='add'>+				  GSWIP_MAC_CTRL_2_MLEN);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw_info-&gt;phylink_get_caps(ds, port, config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_set_link(struct gswip_priv *priv, int port, bool link)</div><div class='add'>+{</div><div class='add'>+	u32 mdio_phy;</div><div class='add'>+</div><div class='add'>+	if (link)</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_LINK_UP;</div><div class='add'>+	else</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_LINK_DOWN;</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_PHYp(port),</div><div class='add'>+			  GSWIP_MDIO_PHY_LINK_MASK, mdio_phy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_set_speed(struct gswip_priv *priv, int port, int speed,</div><div class='add'>+				 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	u32 mdio_phy = 0, mii_cfg = 0, mac_ctrl_0 = 0;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_SPEED_M10;</div><div class='add'>+</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RMII)</div><div class='add'>+			mii_cfg = GSWIP_MII_CFG_RATE_M50;</div><div class='add'>+		else</div><div class='add'>+			mii_cfg = GSWIP_MII_CFG_RATE_M2P5;</div><div class='add'>+</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_GMII_MII;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_SPEED_M100;</div><div class='add'>+</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RMII)</div><div class='add'>+			mii_cfg = GSWIP_MII_CFG_RATE_M50;</div><div class='add'>+		else</div><div class='add'>+			mii_cfg = GSWIP_MII_CFG_RATE_M25;</div><div class='add'>+</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_GMII_MII;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_SPEED_G1;</div><div class='add'>+</div><div class='add'>+		mii_cfg = GSWIP_MII_CFG_RATE_M125;</div><div class='add'>+</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_GMII_RGMII;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_PHYp(port),</div><div class='add'>+			  GSWIP_MDIO_PHY_SPEED_MASK, mdio_phy);</div><div class='add'>+	gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_RATE_MASK, mii_cfg, port);</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_0p(port),</div><div class='add'>+			  GSWIP_MAC_CTRL_0_GMII_MASK, mac_ctrl_0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_set_duplex(struct gswip_priv *priv, int port, int duplex)</div><div class='add'>+{</div><div class='add'>+	u32 mac_ctrl_0, mdio_phy;</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_FULL) {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FDUP_EN;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FDUP_EN;</div><div class='add'>+	} else {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FDUP_DIS;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FDUP_DIS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_0p(port),</div><div class='add'>+			  GSWIP_MAC_CTRL_0_FDUP_MASK, mac_ctrl_0);</div><div class='add'>+	regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_PHYp(port),</div><div class='add'>+			  GSWIP_MDIO_PHY_FDUP_MASK, mdio_phy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_set_pause(struct gswip_priv *priv, int port,</div><div class='add'>+				 bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	u32 mac_ctrl_0, mdio_phy;</div><div class='add'>+</div><div class='add'>+	if (tx_pause &amp;&amp; rx_pause) {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_RXTX;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FCONTX_EN |</div><div class='add'>+			   GSWIP_MDIO_PHY_FCONRX_EN;</div><div class='add'>+	} else if (tx_pause) {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_TX;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FCONTX_EN |</div><div class='add'>+			   GSWIP_MDIO_PHY_FCONRX_DIS;</div><div class='add'>+	} else if (rx_pause) {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_RX;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FCONTX_DIS |</div><div class='add'>+			   GSWIP_MDIO_PHY_FCONRX_EN;</div><div class='add'>+	} else {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_NONE;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FCONTX_DIS |</div><div class='add'>+			   GSWIP_MDIO_PHY_FCONRX_DIS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_0p(port),</div><div class='add'>+			  GSWIP_MAC_CTRL_0_FCON_MASK, mac_ctrl_0);</div><div class='add'>+	regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_PHYp(port),</div><div class='add'>+			  GSWIP_MDIO_PHY_FCONTX_MASK | GSWIP_MDIO_PHY_FCONRX_MASK,</div><div class='add'>+			  mdio_phy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+				     unsigned int mode,</div><div class='add'>+				     const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	u32 miicfg = 0;</div><div class='add'>+</div><div class='add'>+	miicfg |= GSWIP_MII_CFG_LDCLKDIS;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		return;</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+	case PHY_INTERFACE_MODE_INTERNAL:</div><div class='add'>+		miicfg |= GSWIP_MII_CFG_MODE_MIIM;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_REVMII:</div><div class='add'>+		miicfg |= GSWIP_MII_CFG_MODE_MIIP;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+		miicfg |= GSWIP_MII_CFG_MODE_RMIIM;</div><div class='add'>+		if (of_property_read_bool(dp-&gt;dn, "maxlinear,rmii-refclk-out"))</div><div class='add'>+			miicfg |= GSWIP_MII_CFG_RMII_CLK;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		miicfg |= GSWIP_MII_CFG_MODE_RGMII;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_GMII:</div><div class='add'>+		miicfg |= GSWIP_MII_CFG_MODE_GMII;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dp-&gt;ds-&gt;dev,</div><div class='add'>+			"Unsupported interface: %d\n", state-&gt;interface);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gswip_mii_mask_cfg(priv,</div><div class='add'>+			   GSWIP_MII_CFG_MODE_MASK | GSWIP_MII_CFG_RMII_CLK |</div><div class='add'>+			   GSWIP_MII_CFG_RGMII_IBS | GSWIP_MII_CFG_LDCLKDIS,</div><div class='add'>+			   miicfg, port);</div><div class='add'>+</div><div class='add'>+	gswip_mii_delay_setup(priv, dp, state-&gt;interface);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+					unsigned int mode,</div><div class='add'>+					phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_EN, 0, port);</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_cpu(dp))</div><div class='add'>+		gswip_port_set_link(priv, port, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+				      struct phy_device *phydev,</div><div class='add'>+				      unsigned int mode,</div><div class='add'>+				      phy_interface_t interface,</div><div class='add'>+				      int speed, int duplex,</div><div class='add'>+				      bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_cpu(dp) || interface != PHY_INTERFACE_MODE_INTERNAL) {</div><div class='add'>+		gswip_port_set_link(priv, port, true);</div><div class='add'>+		gswip_port_set_speed(priv, port, speed, interface);</div><div class='add'>+		gswip_port_set_duplex(priv, port, duplex);</div><div class='add'>+		gswip_port_set_pause(priv, port, tx_pause, rx_pause);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_EN, GSWIP_MII_CFG_EN, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+			      uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(gswip_rmon_cnt); i++)</div><div class='add'>+		ethtool_puts(&amp;data, gswip_rmon_cnt[i].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 gswip_bcm_ram_entry_read(struct gswip_priv *priv, u32 table,</div><div class='add'>+				    u32 index)</div><div class='add'>+{</div><div class='add'>+	u32 result, val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_BM_RAM_ADDR, index);</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_BM_RAM_CTRL,</div><div class='add'>+			  GSWIP_BM_RAM_CTRL_ADDR_MASK | GSWIP_BM_RAM_CTRL_OPMOD |</div><div class='add'>+			  GSWIP_BM_RAM_CTRL_BAS,</div><div class='add'>+			  table | GSWIP_BM_RAM_CTRL_BAS);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_BM_RAM_CTRL,</div><div class='add'>+				     GSWIP_BM_RAM_CTRL_BAS);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "timeout while reading table: %u, index: %u\n",</div><div class='add'>+			table, index);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_read(priv-&gt;gswip, GSWIP_BM_RAM_VAL(0), &amp;result);</div><div class='add'>+	regmap_read(priv-&gt;gswip, GSWIP_BM_RAM_VAL(1), &amp;val);</div><div class='add'>+	result |= val &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				    uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	const struct gswip_rmon_cnt_desc *rmon_cnt;</div><div class='add'>+	int i;</div><div class='add'>+	u64 high;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(gswip_rmon_cnt); i++) {</div><div class='add'>+		rmon_cnt = &amp;gswip_rmon_cnt[i];</div><div class='add'>+</div><div class='add'>+		data[i] = gswip_bcm_ram_entry_read(priv, port,</div><div class='add'>+						   rmon_cnt-&gt;offset);</div><div class='add'>+		if (rmon_cnt-&gt;size == 2) {</div><div class='add'>+			high = gswip_bcm_ram_entry_read(priv, port,</div><div class='add'>+							rmon_cnt-&gt;offset + 1);</div><div class='add'>+			data[i] |= high &lt;&lt; 32;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(gswip_rmon_cnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_set_mac_eee(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct ethtool_keee *e)</div><div class='add'>+{</div><div class='add'>+	if (e-&gt;tx_lpi_timer &gt; 0x7f)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_phylink_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	regmap_clear_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_4p(dp-&gt;index),</div><div class='add'>+			  GSWIP_MAC_CTRL_4_LPIEN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_phylink_mac_enable_tx_lpi(struct phylink_config *config,</div><div class='add'>+					   u32 timer, bool tx_clock_stop)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_4p(dp-&gt;index),</div><div class='add'>+				  GSWIP_MAC_CTRL_4_LPIEN |</div><div class='add'>+				  GSWIP_MAC_CTRL_4_GWAIT_MASK |</div><div class='add'>+				  GSWIP_MAC_CTRL_4_WAIT_MASK,</div><div class='add'>+				  GSWIP_MAC_CTRL_4_LPIEN |</div><div class='add'>+				  GSWIP_MAC_CTRL_4_GWAIT(timer) |</div><div class='add'>+				  GSWIP_MAC_CTRL_4_WAIT(timer));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool gswip_support_eee(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (GSWIP_VERSION_GE(priv, GSWIP_VERSION_2_2))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *gswip_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+							phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;hw_info-&gt;mac_select_pcs)</div><div class='add'>+		return priv-&gt;hw_info-&gt;mac_select_pcs(config, interface);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops gswip_phylink_mac_ops = {</div><div class='add'>+	.mac_config		= gswip_phylink_mac_config,</div><div class='add'>+	.mac_link_down		= gswip_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up		= gswip_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi	= gswip_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi	= gswip_phylink_mac_enable_tx_lpi,</div><div class='add'>+	.mac_select_pcs		= gswip_phylink_mac_select_pcs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops gswip_switch_ops = {</div><div class='add'>+	.get_tag_protocol	= gswip_get_tag_protocol,</div><div class='add'>+	.setup			= gswip_setup,</div><div class='add'>+	.port_setup		= gswip_port_setup,</div><div class='add'>+	.port_enable		= gswip_port_enable,</div><div class='add'>+	.port_disable		= gswip_port_disable,</div><div class='add'>+	.port_pre_bridge_flags	= gswip_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags	= gswip_port_bridge_flags,</div><div class='add'>+	.port_bridge_join	= gswip_port_bridge_join,</div><div class='add'>+	.port_bridge_leave	= gswip_port_bridge_leave,</div><div class='add'>+	.port_fast_age		= gswip_port_fast_age,</div><div class='add'>+	.port_vlan_filtering	= gswip_port_vlan_filtering,</div><div class='add'>+	.port_vlan_add		= gswip_port_vlan_add,</div><div class='add'>+	.port_vlan_del		= gswip_port_vlan_del,</div><div class='add'>+	.port_stp_state_set	= gswip_port_stp_state_set,</div><div class='add'>+	.port_fdb_add		= gswip_port_fdb_add,</div><div class='add'>+	.port_fdb_del		= gswip_port_fdb_del,</div><div class='add'>+	.port_fdb_dump		= gswip_port_fdb_dump,</div><div class='add'>+	.port_change_mtu	= gswip_port_change_mtu,</div><div class='add'>+	.port_max_mtu		= gswip_port_max_mtu,</div><div class='add'>+	.phylink_get_caps	= gswip_phylink_get_caps,</div><div class='add'>+	.get_strings		= gswip_get_strings,</div><div class='add'>+	.get_ethtool_stats	= gswip_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= gswip_get_sset_count,</div><div class='add'>+	.set_mac_eee		= gswip_set_mac_eee,</div><div class='add'>+	.support_eee		= gswip_support_eee,</div><div class='add'>+	.port_hsr_join		= dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave		= dsa_port_simple_hsr_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void gswip_disable_switch(struct gswip_priv *priv)</div><div class='add'>+{</div><div class='add'>+	regmap_clear_bits(priv-&gt;mdio, GSWIP_MDIO_GLOB, GSWIP_MDIO_GLOB_ENABLE);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(gswip_disable_switch);</div><div class='add'>+</div><div class='add'>+static int gswip_validate_cpu_port(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	int cpu_port = -1;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {</div><div class='add'>+		if (cpu_port != -1)</div><div class='add'>+			return dev_err_probe(ds-&gt;dev, -EINVAL,</div><div class='add'>+					     "only a single CPU port is supported\n");</div><div class='add'>+</div><div class='add'>+		cpu_port = cpu_dp-&gt;index;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cpu_port == -1)</div><div class='add'>+		return dev_err_probe(ds-&gt;dev, -EINVAL, "no CPU port defined\n");</div><div class='add'>+</div><div class='add'>+	if (BIT(cpu_port) &amp; ~priv-&gt;hw_info-&gt;allowed_cpu_ports)</div><div class='add'>+		return dev_err_probe(ds-&gt;dev, -EINVAL,</div><div class='add'>+				     "unsupported CPU port defined\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int gswip_probe_common(struct gswip_priv *priv, u32 version)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds = devm_kzalloc(priv-&gt;dev, sizeof(*priv-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds-&gt;dev = priv-&gt;dev;</div><div class='add'>+	priv-&gt;ds-&gt;num_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	priv-&gt;ds-&gt;ops = &amp;gswip_switch_ops;</div><div class='add'>+	priv-&gt;ds-&gt;phylink_mac_ops = &amp;gswip_phylink_mac_ops;</div><div class='add'>+	priv-&gt;ds-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	/* The hardware has the 'major/minor' version bytes in the wrong order</div><div class='add'>+	 * preventing numerical comparisons. Construct a 16-bit unsigned integer</div><div class='add'>+	 * having the REV field as most significant byte and the MOD field as</div><div class='add'>+	 * least significant byte. This is effectively swapping the two bytes of</div><div class='add'>+	 * the version variable, but other than using swab16 it doesn't affect</div><div class='add'>+	 * the source variable.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;version = GSWIP_VERSION_REV(version) &lt;&lt; 8 |</div><div class='add'>+			GSWIP_VERSION_MOD(version);</div><div class='add'>+</div><div class='add'>+	err = dsa_register_switch(priv-&gt;ds);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(priv-&gt;dev, err, "dsa switch registration failed\n");</div><div class='add'>+</div><div class='add'>+	err = gswip_validate_cpu_port(priv-&gt;ds);</div><div class='add'>+	if (err)</div><div class='add'>+		goto disable_switch;</div><div class='add'>+</div><div class='add'>+	dev_info(priv-&gt;dev, "probed GSWIP version %lx mod %lx\n",</div><div class='add'>+		 GSWIP_VERSION_REV(version), GSWIP_VERSION_MOD(version));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+disable_switch:</div><div class='add'>+	gswip_disable_switch(priv);</div><div class='add'>+	dsa_unregister_switch(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(gswip_probe_common);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Hauke Mehrtens &lt;hauke@hauke-m.de&gt;");</div><div class='add'>+MODULE_AUTHOR("Daniel Golle &lt;daniel@makrotopia.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Lantiq / Intel / MaxLinear GSWIP common functions");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/lantiq_pce.h b/drivers/net/dsa/lantiq/lantiq_pce.h<br/>index e2be31f3672a..659f9a0638d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq_pce.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq_pce.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/lantiq_pce.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/lantiq_pce.h</a></div><div class='hunk'>@@ -7,6 +7,8 @@</div><div class='ctx'>  * Copyright (C) 2017 - 2018 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include "lantiq_gswip.h"</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	OUT_MAC0 = 0,</div><div class='ctx'> 	OUT_MAC1,</div><div class='hunk'>@@ -74,13 +76,6 @@ enum {</div><div class='ctx'> 	FLAG_NO,	/*13*/</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct gswip_pce_microcode {</div><div class='del'>-	u16 val_3;</div><div class='del'>-	u16 val_2;</div><div class='del'>-	u16 val_1;</div><div class='del'>-	u16 val_0;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define MC_ENTRY(val, msk, ns, out, len, type, flags, ipv4_len) \</div><div class='ctx'> 	{ val, msk, ((ns) &lt;&lt; 10 | (out) &lt;&lt; 4 | (len) &gt;&gt; 1),\</div><div class='ctx'> 		((len) &amp; 1) &lt;&lt; 15 | (type) &lt;&lt; 13 | (flags) &lt;&lt; 9 | (ipv4_len) &lt;&lt; 8 }</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx.c b/drivers/net/dsa/lantiq/mxl-gsw1xx.c<br/>new file mode 100644<br/>index 000000000000..0816c61a47f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/mxl-gsw1xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/mxl-gsw1xx.c</a></div><div class='hunk'>@@ -0,0 +1,733 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/* DSA Driver for MaxLinear GSW1xx switch devices</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Daniel Golle &lt;daniel@makrotopia.org&gt;</div><div class='add'>+ * Copyright (C) 2023 - 2024 MaxLinear Inc.</div><div class='add'>+ * Copyright (C) 2022 Snap One, LLC.  All rights reserved.</div><div class='add'>+ * Copyright (C) 2017 - 2019 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Lantiq Deutschland</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "lantiq_gswip.h"</div><div class='add'>+#include "mxl-gsw1xx.h"</div><div class='add'>+#include "mxl-gsw1xx_pce.h"</div><div class='add'>+</div><div class='add'>+struct gsw1xx_priv {</div><div class='add'>+	struct mdio_device	*mdio_dev;</div><div class='add'>+	int			smdio_badr;</div><div class='add'>+	struct			regmap *sgmii;</div><div class='add'>+	struct			regmap *gpio;</div><div class='add'>+	struct			regmap *clk;</div><div class='add'>+	struct			regmap *shell;</div><div class='add'>+	struct			phylink_pcs pcs;</div><div class='add'>+	phy_interface_t		tbi_interface;</div><div class='add'>+	struct gswip_priv	gswip;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int gsw1xx_config_smdio_badr(struct gsw1xx_priv *priv,</div><div class='add'>+				    unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = priv-&gt;mdio_dev-&gt;bus;</div><div class='add'>+	int sw_addr = priv-&gt;mdio_dev-&gt;addr;</div><div class='add'>+	int smdio_badr = priv-&gt;smdio_badr;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (smdio_badr == GSW1XX_SMDIO_BADR_UNKNOWN ||</div><div class='add'>+	    reg - smdio_badr &gt;= GSW1XX_SMDIO_BADR ||</div><div class='add'>+	    smdio_badr &gt; reg) {</div><div class='add'>+		/* Configure the Switch Base Address */</div><div class='add'>+		smdio_badr = reg &amp; ~GENMASK(3, 0);</div><div class='add'>+		res = __mdiobus_write(bus, sw_addr, GSW1XX_SMDIO_BADR, smdio_badr);</div><div class='add'>+		if (res &lt; 0) {</div><div class='add'>+			dev_err(&amp;priv-&gt;mdio_dev-&gt;dev,</div><div class='add'>+				"%s: Error %d, configuring switch base\n",</div><div class='add'>+				__func__, res);</div><div class='add'>+			return res;</div><div class='add'>+		}</div><div class='add'>+		priv-&gt;smdio_badr = smdio_badr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return smdio_badr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_regmap_read(void *context, unsigned int reg,</div><div class='add'>+			      unsigned int *val)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = context;</div><div class='add'>+	struct mii_bus *bus = priv-&gt;mdio_dev-&gt;bus;</div><div class='add'>+	int sw_addr = priv-&gt;mdio_dev-&gt;addr;</div><div class='add'>+	int smdio_badr;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	smdio_badr = gsw1xx_config_smdio_badr(priv, reg);</div><div class='add'>+	if (smdio_badr &lt; 0)</div><div class='add'>+		return smdio_badr;</div><div class='add'>+</div><div class='add'>+	res = __mdiobus_read(bus, sw_addr, reg - smdio_badr);</div><div class='add'>+	if (res &lt; 0) {</div><div class='add'>+		dev_err(&amp;priv-&gt;mdio_dev-&gt;dev, "%s: Error %d reading 0x%x\n",</div><div class='add'>+			__func__, res, reg);</div><div class='add'>+		return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_regmap_write(void *context, unsigned int reg,</div><div class='add'>+			       unsigned int val)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = context;</div><div class='add'>+	struct mii_bus *bus = priv-&gt;mdio_dev-&gt;bus;</div><div class='add'>+	int sw_addr = priv-&gt;mdio_dev-&gt;addr;</div><div class='add'>+	int smdio_badr;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	smdio_badr = gsw1xx_config_smdio_badr(priv, reg);</div><div class='add'>+	if (smdio_badr &lt; 0)</div><div class='add'>+		return smdio_badr;</div><div class='add'>+</div><div class='add'>+	res = __mdiobus_write(bus, sw_addr, reg - smdio_badr, val);</div><div class='add'>+	if (res &lt; 0)</div><div class='add'>+		dev_err(&amp;priv-&gt;mdio_dev-&gt;dev,</div><div class='add'>+			"%s: Error %d, writing 0x%x:0x%x\n", __func__, res, reg,</div><div class='add'>+			val);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_bus gsw1xx_regmap_bus = {</div><div class='add'>+	.reg_write = gsw1xx_regmap_write,</div><div class='add'>+	.reg_read = gsw1xx_regmap_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void gsw1xx_mdio_regmap_lock(void *mdio_lock)</div><div class='add'>+{</div><div class='add'>+	mutex_lock_nested(mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_mdio_regmap_unlock(void *mdio_lock)</div><div class='add'>+{</div><div class='add'>+	mutex_unlock(mdio_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int gsw1xx_pcs_inband_caps(struct phylink_pcs *pcs,</div><div class='add'>+					   phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct gsw1xx_priv *pcs_to_gsw1xx(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcs, struct gsw1xx_priv, pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_pcs_enable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+</div><div class='add'>+	/* Deassert SGMII shell reset */</div><div class='add'>+	return regmap_clear_bits(priv-&gt;shell, GSW1XX_SHELL_RST_REQ,</div><div class='add'>+				 GSW1XX_RST_REQ_SGMII_SHELL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_pcs_disable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+</div><div class='add'>+	/* Assert SGMII shell reset */</div><div class='add'>+	regmap_set_bits(priv-&gt;shell, GSW1XX_SHELL_RST_REQ,</div><div class='add'>+			GSW1XX_RST_REQ_SGMII_SHELL);</div><div class='add'>+</div><div class='add'>+	priv-&gt;tbi_interface = PHY_INTERFACE_MODE_NA;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				 unsigned int neg_mode,</div><div class='add'>+				 struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;sgmii, GSW1XX_SGMII_TBI_TBISTAT, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	state-&gt;link = !!(val &amp; GSW1XX_SGMII_TBI_TBISTAT_LINK);</div><div class='add'>+	state-&gt;an_complete = !!(val &amp; GSW1XX_SGMII_TBI_TBISTAT_AN_COMPLETE);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;sgmii, GSW1XX_SGMII_TBI_LPSTAT, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	state-&gt;duplex = (val &amp; GSW1XX_SGMII_TBI_LPSTAT_DUPLEX) ?</div><div class='add'>+			 DUPLEX_FULL : DUPLEX_HALF;</div><div class='add'>+	if (val &amp; GSW1XX_SGMII_TBI_LPSTAT_PAUSE_RX)</div><div class='add'>+		state-&gt;pause |= MLO_PAUSE_RX;</div><div class='add'>+</div><div class='add'>+	if (val &amp; GSW1XX_SGMII_TBI_LPSTAT_PAUSE_TX)</div><div class='add'>+		state-&gt;pause |= MLO_PAUSE_TX;</div><div class='add'>+</div><div class='add'>+	switch (FIELD_GET(GSW1XX_SGMII_TBI_LPSTAT_SPEED, val)) {</div><div class='add'>+	case GSW1XX_SGMII_TBI_LPSTAT_SPEED_10:</div><div class='add'>+		state-&gt;speed = SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case GSW1XX_SGMII_TBI_LPSTAT_SPEED_100:</div><div class='add'>+		state-&gt;speed = SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case GSW1XX_SGMII_TBI_LPSTAT_SPEED_1000:</div><div class='add'>+		state-&gt;speed = SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case GSW1XX_SGMII_TBI_LPSTAT_SPEED_NOSGMII:</div><div class='add'>+		if (state-&gt;interface == PHY_INTERFACE_MODE_1000BASEX)</div><div class='add'>+			state-&gt;speed = SPEED_1000;</div><div class='add'>+		else if (state-&gt;interface == PHY_INTERFACE_MODE_2500BASEX)</div><div class='add'>+			state-&gt;speed = SPEED_2500;</div><div class='add'>+		else</div><div class='add'>+			state-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_pcs_phy_xaui_write(struct gsw1xx_priv *priv, u16 addr,</div><div class='add'>+				     u16 data)</div><div class='add'>+{</div><div class='add'>+	int ret, val;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_D, data);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_A, addr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_C,</div><div class='add'>+			   GSW1XX_SGMII_PHY_WRITE |</div><div class='add'>+			   GSW1XX_SGMII_PHY_RESET_N);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(priv-&gt;sgmii, GSW1XX_SGMII_PHY_C,</div><div class='add'>+					val, val &amp; GSW1XX_SGMII_PHY_STATUS,</div><div class='add'>+					1000, 100000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_pcs_reset(struct gsw1xx_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	/* Assert and deassert SGMII shell reset */</div><div class='add'>+	ret = regmap_set_bits(priv-&gt;shell, GSW1XX_SHELL_RST_REQ,</div><div class='add'>+			      GSW1XX_RST_REQ_SGMII_SHELL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_clear_bits(priv-&gt;shell, GSW1XX_SHELL_RST_REQ,</div><div class='add'>+				GSW1XX_RST_REQ_SGMII_SHELL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Hardware Bringup FSM Enable  */</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_HWBU_CTRL,</div><div class='add'>+			   GSW1XX_SGMII_PHY_HWBU_CTRL_EN_HWBU_FSM |</div><div class='add'>+			   GSW1XX_SGMII_PHY_HWBU_CTRL_HW_FSM_EN);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Configure SGMII PHY Receiver */</div><div class='add'>+	val = FIELD_PREP(GSW1XX_SGMII_PHY_RX0_CFG2_EQ,</div><div class='add'>+			 GSW1XX_SGMII_PHY_RX0_CFG2_EQ_DEF) |</div><div class='add'>+	      GSW1XX_SGMII_PHY_RX0_CFG2_LOS_EN |</div><div class='add'>+	      GSW1XX_SGMII_PHY_RX0_CFG2_TERM_EN |</div><div class='add'>+	      FIELD_PREP(GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT,</div><div class='add'>+			 GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT_DEF);</div><div class='add'>+</div><div class='add'>+	/* TODO: Take care of inverted RX pair once generic property is</div><div class='add'>+	 *       available</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_RX0_CFG2, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_LEVEL,</div><div class='add'>+			 GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_LEVEL_DEF);</div><div class='add'>+</div><div class='add'>+	/* TODO: Take care of inverted TX pair once generic property is</div><div class='add'>+	 *       available</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_TX0_CFG3, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Reset and Release TBI */</div><div class='add'>+	val = GSW1XX_SGMII_TBI_TBICTL_INITTBI | GSW1XX_SGMII_TBI_TBICTL_ENTBI |</div><div class='add'>+	      GSW1XX_SGMII_TBI_TBICTL_CRSTRR | GSW1XX_SGMII_TBI_TBICTL_CRSOFF;</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_TBICTL, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	val &amp;= ~GSW1XX_SGMII_TBI_TBICTL_INITTBI;</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_TBICTL, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Release Tx Data Buffers */</div><div class='add'>+	ret = regmap_set_bits(priv-&gt;sgmii, GSW1XX_SGMII_PCS_TXB_CTL,</div><div class='add'>+			      GSW1XX_SGMII_PCS_TXB_CTL_INIT_TX_TXB);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = regmap_clear_bits(priv-&gt;sgmii, GSW1XX_SGMII_PCS_TXB_CTL,</div><div class='add'>+				GSW1XX_SGMII_PCS_TXB_CTL_INIT_TX_TXB);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Release Rx Data Buffers */</div><div class='add'>+	ret = regmap_set_bits(priv-&gt;sgmii, GSW1XX_SGMII_PCS_RXB_CTL,</div><div class='add'>+			      GSW1XX_SGMII_PCS_RXB_CTL_INIT_RX_RXB);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	return regmap_clear_bits(priv-&gt;sgmii, GSW1XX_SGMII_PCS_RXB_CTL,</div><div class='add'>+				 GSW1XX_SGMII_PCS_RXB_CTL_INIT_RX_RXB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='add'>+			     phy_interface_t interface,</div><div class='add'>+			     const unsigned long *advertising,</div><div class='add'>+			     bool permit_pause_to_mac)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+	u16 txaneg, anegctl, nco_ctrl;</div><div class='add'>+	bool reconf = false;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* do not unnecessarily disrupt link and skip resetting the hardware in</div><div class='add'>+	 * case the PCS has previously been successfully configured for this</div><div class='add'>+	 * interface mode</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;tbi_interface == interface)</div><div class='add'>+		reconf = true;</div><div class='add'>+</div><div class='add'>+	/* mark PCS configuration as incomplete */</div><div class='add'>+	priv-&gt;tbi_interface = PHY_INTERFACE_MODE_NA;</div><div class='add'>+</div><div class='add'>+	if (!reconf)</div><div class='add'>+		ret = gsw1xx_pcs_reset(priv);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* override bootstrap pin settings</div><div class='add'>+	 * OVRANEG sets ANEG Mode, Enable ANEG and restart ANEG to be</div><div class='add'>+	 * taken from bits ANMODE, ANEGEN, RANEG of the ANEGCTL register.</div><div class='add'>+	 * OVERABL sets ability bits in tx_config_reg to be taken from</div><div class='add'>+	 * the TXANEGH and TXANEGL registers.</div><div class='add'>+	 */</div><div class='add'>+	anegctl = GSW1XX_SGMII_TBI_ANEGCTL_OVRANEG |</div><div class='add'>+		  GSW1XX_SGMII_TBI_ANEGCTL_OVRABL;</div><div class='add'>+</div><div class='add'>+	switch (phylink_get_link_timer_ns(interface)) {</div><div class='add'>+	case 10000:</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_LT_10US);</div><div class='add'>+		break;</div><div class='add'>+	case 1600000:</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_LT_1_6MS);</div><div class='add'>+		break;</div><div class='add'>+	case 5000000:</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_LT_5MS);</div><div class='add'>+		break;</div><div class='add'>+	case 10000000:</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_LT_10MS);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (neg_mode &amp; PHYLINK_PCS_NEG_INBAND)</div><div class='add'>+		anegctl |= GSW1XX_SGMII_TBI_ANEGCTL_ANEGEN;</div><div class='add'>+</div><div class='add'>+	txaneg = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);</div><div class='add'>+</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='add'>+		/* lacking a defined reverse-SGMII interface mode this</div><div class='add'>+		 * driver only supports SGMII (MAC side) for now</div><div class='add'>+		 */</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_ANMODE,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_ANMODE_SGMII_MAC);</div><div class='add'>+		txaneg |= ADVERTISE_LPACK;</div><div class='add'>+	} else if (interface == PHY_INTERFACE_MODE_1000BASEX ||</div><div class='add'>+		   interface == PHY_INTERFACE_MODE_2500BASEX) {</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_ANMODE,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_ANMODE_1000BASEX);</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(priv-&gt;gswip.dev, "%s: wrong interface mode %s\n",</div><div class='add'>+			__func__, phy_modes(interface));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_TXANEGH,</div><div class='add'>+			   FIELD_GET(GENMASK(15, 8), txaneg));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_TXANEGL,</div><div class='add'>+			   FIELD_GET(GENMASK(7, 0), txaneg));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_ANEGCTL, anegctl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!reconf) {</div><div class='add'>+		/* setup SerDes clock speed */</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_2500BASEX)</div><div class='add'>+			nco_ctrl = GSW1XX_SGMII_2G5 | GSW1XX_SGMII_2G5_NCO2;</div><div class='add'>+		else</div><div class='add'>+			nco_ctrl = GSW1XX_SGMII_1G | GSW1XX_SGMII_1G_NCO1;</div><div class='add'>+</div><div class='add'>+		ret = regmap_update_bits(priv-&gt;clk, GSW1XX_CLK_NCO_CTRL,</div><div class='add'>+					 GSW1XX_SGMII_HSP_MASK |</div><div class='add'>+					 GSW1XX_SGMII_SEL,</div><div class='add'>+					 nco_ctrl);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = gsw1xx_pcs_phy_xaui_write(priv, 0x30, 0x80);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* PCS configuration has now been completed, store mode to prevent</div><div class='add'>+	 * disrupting the link in case of future calls of this function for the</div><div class='add'>+	 * same interface mode.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;tbi_interface = interface;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_pcs_an_restart(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+</div><div class='add'>+	regmap_set_bits(priv-&gt;sgmii, GSW1XX_SGMII_TBI_ANEGCTL,</div><div class='add'>+			GSW1XX_SGMII_TBI_ANEGCTL_RANEG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_pcs_link_up(struct phylink_pcs *pcs,</div><div class='add'>+			       unsigned int neg_mode,</div><div class='add'>+			       phy_interface_t interface, int speed,</div><div class='add'>+			       int duplex)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+	u16 lpstat;</div><div class='add'>+</div><div class='add'>+	/* When in-band AN is enabled hardware will set lpstat */</div><div class='add'>+	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Force speed and duplex settings */</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='add'>+		if (speed == SPEED_10)</div><div class='add'>+			lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,</div><div class='add'>+					    GSW1XX_SGMII_TBI_LPSTAT_SPEED_10);</div><div class='add'>+		else if (speed == SPEED_100)</div><div class='add'>+			lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,</div><div class='add'>+					    GSW1XX_SGMII_TBI_LPSTAT_SPEED_100);</div><div class='add'>+		else</div><div class='add'>+			lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,</div><div class='add'>+					    GSW1XX_SGMII_TBI_LPSTAT_SPEED_1000);</div><div class='add'>+	} else {</div><div class='add'>+		lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,</div><div class='add'>+				    GSW1XX_SGMII_TBI_LPSTAT_SPEED_NOSGMII);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='add'>+		lpstat |= GSW1XX_SGMII_TBI_LPSTAT_DUPLEX;</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_LPSTAT, lpstat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops gsw1xx_pcs_ops = {</div><div class='add'>+	.pcs_inband_caps = gsw1xx_pcs_inband_caps,</div><div class='add'>+	.pcs_enable = gsw1xx_pcs_enable,</div><div class='add'>+	.pcs_disable = gsw1xx_pcs_disable,</div><div class='add'>+	.pcs_get_state = gsw1xx_pcs_get_state,</div><div class='add'>+	.pcs_config = gsw1xx_pcs_config,</div><div class='add'>+	.pcs_an_restart = gsw1xx_pcs_an_restart,</div><div class='add'>+	.pcs_link_up = gsw1xx_pcs_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void gsw1xx_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+				   MAC_10 | MAC_100 | MAC_1000;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+	case 1:</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	case 4: /* port 4: SGMII */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		if (priv-&gt;hw_info-&gt;supports_2500m) {</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+				  config-&gt;supported_interfaces);</div><div class='add'>+			config-&gt;mac_capabilities |= MAC_2500FD;</div><div class='add'>+		}</div><div class='add'>+		return; /* no support for EEE on SGMII port */</div><div class='add'>+	case 5: /* port 5: RGMII or RMII */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;lpi_capabilities = MAC_100FD | MAC_1000FD;</div><div class='add'>+	config-&gt;lpi_timer_default = 20;</div><div class='add'>+	memcpy(config-&gt;lpi_interfaces, config-&gt;supported_interfaces,</div><div class='add'>+	       sizeof(config-&gt;lpi_interfaces));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *gsw1xx_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+							 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *gswip_priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct gsw1xx_priv *gsw1xx_priv = container_of(gswip_priv,</div><div class='add'>+						       struct gsw1xx_priv,</div><div class='add'>+						       gswip);</div><div class='add'>+</div><div class='add'>+	switch (dp-&gt;index) {</div><div class='add'>+	case GSW1XX_SGMII_PORT:</div><div class='add'>+		return &amp;gsw1xx_priv-&gt;pcs;</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regmap *gsw1xx_regmap_init(struct gsw1xx_priv *priv,</div><div class='add'>+					 const char *name,</div><div class='add'>+					 unsigned int reg_base,</div><div class='add'>+					 unsigned int max_register)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_config config = {</div><div class='add'>+		.name = name,</div><div class='add'>+		.reg_bits = 16,</div><div class='add'>+		.val_bits = 16,</div><div class='add'>+		.reg_base = reg_base,</div><div class='add'>+		.max_register = max_register,</div><div class='add'>+		.lock = gsw1xx_mdio_regmap_lock,</div><div class='add'>+		.unlock = gsw1xx_mdio_regmap_unlock,</div><div class='add'>+		.lock_arg = &amp;priv-&gt;mdio_dev-&gt;bus-&gt;mdio_lock,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return devm_regmap_init(&amp;priv-&gt;mdio_dev-&gt;dev, &amp;gsw1xx_regmap_bus,</div><div class='add'>+				priv, &amp;config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	struct gsw1xx_priv *priv;</div><div class='add'>+	u32 version;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mdio_dev = mdiodev;</div><div class='add'>+	priv-&gt;smdio_badr = GSW1XX_SMDIO_BADR_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	priv-&gt;gswip.dev = dev;</div><div class='add'>+	priv-&gt;gswip.hw_info = of_device_get_match_data(dev);</div><div class='add'>+	if (!priv-&gt;gswip.hw_info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	priv-&gt;gswip.gswip = gsw1xx_regmap_init(priv, "switch",</div><div class='add'>+					       GSW1XX_SWITCH_BASE, 0xfff);</div><div class='add'>+	if (IS_ERR(priv-&gt;gswip.gswip))</div><div class='add'>+		return PTR_ERR(priv-&gt;gswip.gswip);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gswip.mdio = gsw1xx_regmap_init(priv, "mdio", GSW1XX_MMDIO_BASE,</div><div class='add'>+					      0xff);</div><div class='add'>+	if (IS_ERR(priv-&gt;gswip.mdio))</div><div class='add'>+		return PTR_ERR(priv-&gt;gswip.mdio);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gswip.mii = gsw1xx_regmap_init(priv, "mii", GSW1XX_RGMII_BASE,</div><div class='add'>+					     0xff);</div><div class='add'>+	if (IS_ERR(priv-&gt;gswip.mii))</div><div class='add'>+		return PTR_ERR(priv-&gt;gswip.mii);</div><div class='add'>+</div><div class='add'>+	priv-&gt;sgmii = gsw1xx_regmap_init(priv, "sgmii", GSW1XX_SGMII_BASE,</div><div class='add'>+					 0xfff);</div><div class='add'>+	if (IS_ERR(priv-&gt;sgmii))</div><div class='add'>+		return PTR_ERR(priv-&gt;sgmii);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gpio = gsw1xx_regmap_init(priv, "gpio", GSW1XX_GPIO_BASE, 0xff);</div><div class='add'>+	if (IS_ERR(priv-&gt;gpio))</div><div class='add'>+		return PTR_ERR(priv-&gt;gpio);</div><div class='add'>+</div><div class='add'>+	priv-&gt;clk = gsw1xx_regmap_init(priv, "clk", GSW1XX_CLK_BASE, 0xff);</div><div class='add'>+	if (IS_ERR(priv-&gt;clk))</div><div class='add'>+		return PTR_ERR(priv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	priv-&gt;shell = gsw1xx_regmap_init(priv, "shell", GSW1XX_SHELL_BASE,</div><div class='add'>+					 0xff);</div><div class='add'>+	if (IS_ERR(priv-&gt;shell))</div><div class='add'>+		return PTR_ERR(priv-&gt;shell);</div><div class='add'>+</div><div class='add'>+	priv-&gt;pcs.ops = &amp;gsw1xx_pcs_ops;</div><div class='add'>+	priv-&gt;pcs.poll = true;</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+		  priv-&gt;pcs.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+		  priv-&gt;pcs.supported_interfaces);</div><div class='add'>+	if (priv-&gt;gswip.hw_info-&gt;supports_2500m)</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+			  priv-&gt;pcs.supported_interfaces);</div><div class='add'>+	priv-&gt;tbi_interface = PHY_INTERFACE_MODE_NA;</div><div class='add'>+</div><div class='add'>+	/* assert SGMII reset to power down SGMII unit */</div><div class='add'>+	ret = regmap_set_bits(priv-&gt;shell, GSW1XX_SHELL_RST_REQ,</div><div class='add'>+			      GSW1XX_RST_REQ_SGMII_SHELL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* configure GPIO pin-mux for MMDIO in case of external PHY connected to</div><div class='add'>+	 * SGMII or RGMII as slave interface</div><div class='add'>+	 */</div><div class='add'>+	regmap_set_bits(priv-&gt;gpio, GPIO_ALTSEL0, 3);</div><div class='add'>+	regmap_set_bits(priv-&gt;gpio, GPIO_ALTSEL1, 3);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;gswip.gswip, GSWIP_VERSION, &amp;version);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = gswip_probe_common(&amp;priv-&gt;gswip, version);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(dev, &amp;priv-&gt;gswip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	gswip_disable_switch(priv);</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+</div><div class='add'>+	gswip_disable_switch(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct gswip_hw_info gsw12x_data = {</div><div class='add'>+	.max_ports		= GSW1XX_PORTS,</div><div class='add'>+	.allowed_cpu_ports	= BIT(GSW1XX_MII_PORT) | BIT(GSW1XX_SGMII_PORT),</div><div class='add'>+	.mii_ports		= BIT(GSW1XX_MII_PORT),</div><div class='add'>+	.mii_port_reg_offset	= -GSW1XX_MII_PORT,</div><div class='add'>+	.mac_select_pcs		= gsw1xx_phylink_mac_select_pcs,</div><div class='add'>+	.phylink_get_caps	= &amp;gsw1xx_phylink_get_caps,</div><div class='add'>+	.supports_2500m		= true,</div><div class='add'>+	.pce_microcode		= &amp;gsw1xx_pce_microcode,</div><div class='add'>+	.pce_microcode_size	= ARRAY_SIZE(gsw1xx_pce_microcode),</div><div class='add'>+	.tag_protocol		= DSA_TAG_PROTO_MXL_GSW1XX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct gswip_hw_info gsw140_data = {</div><div class='add'>+	.max_ports		= GSW1XX_PORTS,</div><div class='add'>+	.allowed_cpu_ports	= BIT(GSW1XX_MII_PORT) | BIT(GSW1XX_SGMII_PORT),</div><div class='add'>+	.mii_ports		= BIT(GSW1XX_MII_PORT),</div><div class='add'>+	.mii_port_reg_offset	= -GSW1XX_MII_PORT,</div><div class='add'>+	.mac_select_pcs		= gsw1xx_phylink_mac_select_pcs,</div><div class='add'>+	.phylink_get_caps	= &amp;gsw1xx_phylink_get_caps,</div><div class='add'>+	.supports_2500m		= true,</div><div class='add'>+	.pce_microcode		= &amp;gsw1xx_pce_microcode,</div><div class='add'>+	.pce_microcode_size	= ARRAY_SIZE(gsw1xx_pce_microcode),</div><div class='add'>+	.tag_protocol		= DSA_TAG_PROTO_MXL_GSW1XX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct gswip_hw_info gsw141_data = {</div><div class='add'>+	.max_ports		= GSW1XX_PORTS,</div><div class='add'>+	.allowed_cpu_ports	= BIT(GSW1XX_MII_PORT) | BIT(GSW1XX_SGMII_PORT),</div><div class='add'>+	.mii_ports		= BIT(GSW1XX_MII_PORT),</div><div class='add'>+	.mii_port_reg_offset	= -GSW1XX_MII_PORT,</div><div class='add'>+	.mac_select_pcs		= gsw1xx_phylink_mac_select_pcs,</div><div class='add'>+	.phylink_get_caps	= gsw1xx_phylink_get_caps,</div><div class='add'>+	.pce_microcode		= &amp;gsw1xx_pce_microcode,</div><div class='add'>+	.pce_microcode_size	= ARRAY_SIZE(gsw1xx_pce_microcode),</div><div class='add'>+	.tag_protocol		= DSA_TAG_PROTO_MXL_GSW1XX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * GSW125 is the industrial temperature version of GSW120.</div><div class='add'>+ * GSW145 is the industrial temperature version of GSW140.</div><div class='add'>+ */</div><div class='add'>+static const struct of_device_id gsw1xx_of_match[] = {</div><div class='add'>+	{ .compatible = "maxlinear,gsw120", .data = &amp;gsw12x_data },</div><div class='add'>+	{ .compatible = "maxlinear,gsw125", .data = &amp;gsw12x_data },</div><div class='add'>+	{ .compatible = "maxlinear,gsw140", .data = &amp;gsw140_data },</div><div class='add'>+	{ .compatible = "maxlinear,gsw141", .data = &amp;gsw141_data },</div><div class='add'>+	{ .compatible = "maxlinear,gsw145", .data = &amp;gsw140_data },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(of, gsw1xx_of_match);</div><div class='add'>+</div><div class='add'>+static struct mdio_driver gsw1xx_driver = {</div><div class='add'>+	.probe		= gsw1xx_probe,</div><div class='add'>+	.remove		= gsw1xx_remove,</div><div class='add'>+	.shutdown	= gsw1xx_shutdown,</div><div class='add'>+	.mdiodrv.driver	= {</div><div class='add'>+		.name = "mxl-gsw1xx",</div><div class='add'>+		.of_match_table = gsw1xx_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(gsw1xx_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Daniel Golle &lt;daniel@makrotopia.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for MaxLinear GSW1xx ethernet switch");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx.h b/drivers/net/dsa/lantiq/mxl-gsw1xx.h<br/>new file mode 100644<br/>index 000000000000..38e03c048a26<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/mxl-gsw1xx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/mxl-gsw1xx.h</a></div><div class='hunk'>@@ -0,0 +1,126 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Register definitions for MaxLinear GSW1xx series switches</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Daniel Golle &lt;daniel@makrotopia.org&gt;</div><div class='add'>+ * Copyright (C) 2023 - 2024 MaxLinear Inc.</div><div class='add'>+ */</div><div class='add'>+#ifndef __MXL_GSW1XX_H</div><div class='add'>+#define __MXL_GSW1XX_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#define GSW1XX_PORTS				6</div><div class='add'>+/* Port used for RGMII or optional RMII */</div><div class='add'>+#define GSW1XX_MII_PORT				5</div><div class='add'>+/* Port used for SGMII */</div><div class='add'>+#define GSW1XX_SGMII_PORT			4</div><div class='add'>+</div><div class='add'>+#define GSW1XX_SYS_CLK_FREQ			340000000</div><div class='add'>+</div><div class='add'>+/* SMDIO switch register base address */</div><div class='add'>+#define GSW1XX_SMDIO_BADR			0x1f</div><div class='add'>+#define  GSW1XX_SMDIO_BADR_UNKNOWN		-1</div><div class='add'>+</div><div class='add'>+/* GSW1XX SGMII PCS */</div><div class='add'>+#define GSW1XX_SGMII_BASE			0xd000</div><div class='add'>+#define GSW1XX_SGMII_PHY_HWBU_CTRL		0x009</div><div class='add'>+#define  GSW1XX_SGMII_PHY_HWBU_CTRL_EN_HWBU_FSM	BIT(0)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_HWBU_CTRL_HW_FSM_EN	BIT(3)</div><div class='add'>+#define GSW1XX_SGMII_TBI_TXANEGH		0x300</div><div class='add'>+#define GSW1XX_SGMII_TBI_TXANEGL		0x301</div><div class='add'>+#define GSW1XX_SGMII_TBI_ANEGCTL		0x304</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_LT		GENMASK(1, 0)</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_LT_10US	0</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_LT_1_6MS	1</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_LT_5MS	2</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_LT_10MS	3</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_ANEGEN	BIT(2)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_RANEG		BIT(3)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_OVRABL	BIT(4)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_OVRANEG	BIT(5)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_ANMODE	GENMASK(7, 6)</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_ANMODE_1000BASEX	1</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_ANMODE_SGMII_PHY	2</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_ANMODE_SGMII_MAC	3</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_BCOMP		BIT(15)</div><div class='add'>+</div><div class='add'>+#define GSW1XX_SGMII_TBI_TBICTL			0x305</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBICTL_INITTBI	BIT(0)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBICTL_ENTBI		BIT(1)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBICTL_CRSTRR		BIT(4)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBICTL_CRSOFF		BIT(5)</div><div class='add'>+#define GSW1XX_SGMII_TBI_TBISTAT		0x309</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBISTAT_LINK		BIT(0)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBISTAT_AN_COMPLETE	BIT(1)</div><div class='add'>+#define GSW1XX_SGMII_TBI_LPSTAT			0x30a</div><div class='add'>+#define  GSW1XX_SGMII_TBI_LPSTAT_DUPLEX		BIT(0)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_LPSTAT_PAUSE_RX	BIT(1)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_LPSTAT_PAUSE_TX	BIT(2)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_LPSTAT_SPEED		GENMASK(6, 5)</div><div class='add'>+#define   GSW1XX_SGMII_TBI_LPSTAT_SPEED_10	0</div><div class='add'>+#define   GSW1XX_SGMII_TBI_LPSTAT_SPEED_100	1</div><div class='add'>+#define   GSW1XX_SGMII_TBI_LPSTAT_SPEED_1000	2</div><div class='add'>+#define   GSW1XX_SGMII_TBI_LPSTAT_SPEED_NOSGMII	3</div><div class='add'>+#define GSW1XX_SGMII_PHY_D			0x100</div><div class='add'>+#define GSW1XX_SGMII_PHY_A			0x101</div><div class='add'>+#define GSW1XX_SGMII_PHY_C			0x102</div><div class='add'>+#define  GSW1XX_SGMII_PHY_STATUS		BIT(0)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_READ			BIT(4)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_WRITE			BIT(8)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RESET_N		BIT(12)</div><div class='add'>+#define GSW1XX_SGMII_PCS_RXB_CTL		0x401</div><div class='add'>+#define  GSW1XX_SGMII_PCS_RXB_CTL_INIT_RX_RXB	BIT(1)</div><div class='add'>+#define GSW1XX_SGMII_PCS_TXB_CTL		0x404</div><div class='add'>+#define  GSW1XX_SGMII_PCS_TXB_CTL_INIT_TX_TXB	BIT(1)</div><div class='add'>+</div><div class='add'>+#define GSW1XX_SGMII_PHY_RX0_CFG2		0x004</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RX0_CFG2_EQ		GENMASK(2, 0)</div><div class='add'>+#define   GSW1XX_SGMII_PHY_RX0_CFG2_EQ_DEF	2</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RX0_CFG2_INVERT	BIT(3)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RX0_CFG2_LOS_EN	BIT(4)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RX0_CFG2_TERM_EN	BIT(5)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT	GENMASK(12, 6)</div><div class='add'>+#define   GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT_DEF	20</div><div class='add'>+</div><div class='add'>+#define GSW1XX_SGMII_PHY_TX0_CFG3		0x007</div><div class='add'>+#define  GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_EN	BIT(12)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_LEVEL	GENMASK(11, 9)</div><div class='add'>+#define   GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_LEVEL_DEF	4</div><div class='add'>+#define  GSW1XX_SGMII_PHY_TX0_CFG3_INVERT	BIT(8)</div><div class='add'>+</div><div class='add'>+/* GSW1XX PDI Registers */</div><div class='add'>+#define GSW1XX_SWITCH_BASE			0xe000</div><div class='add'>+</div><div class='add'>+/* GSW1XX MII Registers */</div><div class='add'>+#define GSW1XX_RGMII_BASE			0xf100</div><div class='add'>+</div><div class='add'>+/* GSW1XX GPIO Registers */</div><div class='add'>+#define GSW1XX_GPIO_BASE			0xf300</div><div class='add'>+#define GPIO_ALTSEL0				0x83</div><div class='add'>+#define GPIO_ALTSEL0_EXTPHY_MUX_VAL		0x03c3</div><div class='add'>+#define GPIO_ALTSEL1				0x84</div><div class='add'>+#define GPIO_ALTSEL1_EXTPHY_MUX_VAL		0x003f</div><div class='add'>+</div><div class='add'>+/* MDIO bus controller */</div><div class='add'>+#define GSW1XX_MMDIO_BASE			0xf400</div><div class='add'>+</div><div class='add'>+/* generic IC registers */</div><div class='add'>+#define GSW1XX_SHELL_BASE			0xfa00</div><div class='add'>+#define  GSW1XX_SHELL_RST_REQ			0x01</div><div class='add'>+#define   GSW1XX_RST_REQ_SGMII_SHELL		BIT(5)</div><div class='add'>+/* RGMII PAD Slew Control Register */</div><div class='add'>+#define  GSW1XX_SHELL_RGMII_SLEW_CFG		0x78</div><div class='add'>+#define   RGMII_SLEW_CFG_RX_2_5_V		BIT(4)</div><div class='add'>+#define   RGMII_SLEW_CFG_TX_2_5_V		BIT(5)</div><div class='add'>+</div><div class='add'>+/* SGMII clock related settings */</div><div class='add'>+#define GSW1XX_CLK_BASE				0xf900</div><div class='add'>+#define  GSW1XX_CLK_NCO_CTRL			0x68</div><div class='add'>+#define   GSW1XX_SGMII_HSP_MASK			GENMASK(3, 2)</div><div class='add'>+#define   GSW1XX_SGMII_SEL			BIT(1)</div><div class='add'>+#define   GSW1XX_SGMII_1G			0x0</div><div class='add'>+#define   GSW1XX_SGMII_2G5			0xc</div><div class='add'>+#define   GSW1XX_SGMII_1G_NCO1			0x0</div><div class='add'>+#define   GSW1XX_SGMII_2G5_NCO2			0x2</div><div class='add'>+</div><div class='add'>+#endif /* __MXL_GSW1XX_H */</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h b/drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h<br/>new file mode 100644<br/>index 000000000000..eefcd411a340<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h</a></div><div class='hunk'>@@ -0,0 +1,154 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * PCE microcode code update for driver for MaxLinear GSW1xx switch chips</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023 - 2024 MaxLinear Inc.</div><div class='add'>+ * Copyright (C) 2022 Snap One, LLC.  All rights reserved.</div><div class='add'>+ * Copyright (C) 2017 - 2019 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Lantiq Deutschland</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "lantiq_gswip.h"</div><div class='add'>+</div><div class='add'>+#define INSTR 0</div><div class='add'>+#define IPV6 1</div><div class='add'>+#define LENACCU 2</div><div class='add'>+</div><div class='add'>+/* GSWIP_2.X */</div><div class='add'>+enum {</div><div class='add'>+	OUT_MAC0 = 0,</div><div class='add'>+	OUT_MAC1,</div><div class='add'>+	OUT_MAC2,</div><div class='add'>+	OUT_MAC3,</div><div class='add'>+	OUT_MAC4,</div><div class='add'>+	OUT_MAC5,</div><div class='add'>+	OUT_ETHTYP,</div><div class='add'>+	OUT_VTAG0,</div><div class='add'>+	OUT_VTAG1,</div><div class='add'>+	OUT_ITAG0,</div><div class='add'>+	OUT_ITAG1,	/* 10 */</div><div class='add'>+	OUT_ITAG2,</div><div class='add'>+	OUT_ITAG3,</div><div class='add'>+	OUT_IP0,</div><div class='add'>+	OUT_IP1,</div><div class='add'>+	OUT_IP2,</div><div class='add'>+	OUT_IP3,</div><div class='add'>+	OUT_SIP0,</div><div class='add'>+	OUT_SIP1,</div><div class='add'>+	OUT_SIP2,</div><div class='add'>+	OUT_SIP3,	/* 20 */</div><div class='add'>+	OUT_SIP4,</div><div class='add'>+	OUT_SIP5,</div><div class='add'>+	OUT_SIP6,</div><div class='add'>+	OUT_SIP7,</div><div class='add'>+	OUT_DIP0,</div><div class='add'>+	OUT_DIP1,</div><div class='add'>+	OUT_DIP2,</div><div class='add'>+	OUT_DIP3,</div><div class='add'>+	OUT_DIP4,</div><div class='add'>+	OUT_DIP5,	/* 30 */</div><div class='add'>+	OUT_DIP6,</div><div class='add'>+	OUT_DIP7,</div><div class='add'>+	OUT_SESID,</div><div class='add'>+	OUT_PROT,</div><div class='add'>+	OUT_APP0,</div><div class='add'>+	OUT_APP1,</div><div class='add'>+	OUT_IGMP0,</div><div class='add'>+	OUT_IGMP1,</div><div class='add'>+	OUT_STAG0 = 61,</div><div class='add'>+	OUT_STAG1 = 62,</div><div class='add'>+	OUT_NONE = 63,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* parser's microcode flag type */</div><div class='add'>+enum {</div><div class='add'>+	FLAG_ITAG = 0,</div><div class='add'>+	FLAG_VLAN,</div><div class='add'>+	FLAG_SNAP,</div><div class='add'>+	FLAG_PPPOE,</div><div class='add'>+	FLAG_IPV6,</div><div class='add'>+	FLAG_IPV6FL,</div><div class='add'>+	FLAG_IPV4,</div><div class='add'>+	FLAG_IGMP,</div><div class='add'>+	FLAG_TU,</div><div class='add'>+	FLAG_HOP,</div><div class='add'>+	FLAG_NN1,	/* 10 */</div><div class='add'>+	FLAG_NN2,</div><div class='add'>+	FLAG_END,</div><div class='add'>+	FLAG_NO,	/* 13 */</div><div class='add'>+	FLAG_SVLAN,	/* 14 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define PCE_MC_M(val, msk, ns, out, len, type, flags, ipv4_len) \</div><div class='add'>+	{ (val), (msk), ((ns) &lt;&lt; 10 | (out) &lt;&lt; 4 | (len) &gt;&gt; 1),\</div><div class='add'>+	 ((len) &amp; 1) &lt;&lt; 15 | (type) &lt;&lt; 13 | (flags) &lt;&lt; 9 | (ipv4_len) &lt;&lt; 8 }</div><div class='add'>+</div><div class='add'>+/* V22_2X (IPv6 issue fixed) */</div><div class='add'>+static const struct gswip_pce_microcode gsw1xx_pce_microcode[] = {</div><div class='add'>+	/*       value   mask    ns  fields      L  type     flags       ipv4_len */</div><div class='add'>+	PCE_MC_M(0x88c3, 0xFFFF, 1,  OUT_ITAG0,  4, INSTR,   FLAG_ITAG,  0),</div><div class='add'>+	PCE_MC_M(0x8100, 0xFFFF, 4,  OUT_STAG0,  2, INSTR,   FLAG_SVLAN, 0),</div><div class='add'>+	PCE_MC_M(0x88A8, 0xFFFF, 4,  OUT_STAG0,  2, INSTR,   FLAG_SVLAN, 0),</div><div class='add'>+	PCE_MC_M(0x9100, 0xFFFF, 4,  OUT_STAG0,  2, INSTR,   FLAG_SVLAN, 0),</div><div class='add'>+	PCE_MC_M(0x8100, 0xFFFF, 5,  OUT_VTAG0,  2, INSTR,   FLAG_VLAN,  0),</div><div class='add'>+	PCE_MC_M(0x88A8, 0xFFFF, 6,  OUT_VTAG0,  2, INSTR,   FLAG_VLAN,  0),</div><div class='add'>+	PCE_MC_M(0x9100, 0xFFFF, 4,  OUT_VTAG0,  2, INSTR,   FLAG_VLAN,  0),</div><div class='add'>+	PCE_MC_M(0x8864, 0xFFFF, 20, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0800, 0xFFFF, 24, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x86DD, 0xFFFF, 25, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x8863, 0xFFFF, 19, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0xF800, 13, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0600, 0x0600, 44, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 15, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0xAAAA, 0xFFFF, 17, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0300, 0xFF00, 45, OUT_NONE,   0, INSTR,   FLAG_SNAP,  0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_DIP7,   3, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 21, OUT_DIP7,   3, INSTR,   FLAG_PPPOE, 0),</div><div class='add'>+	PCE_MC_M(0x0021, 0xFFFF, 24, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0057, 0xFFFF, 25, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x4000, 0xF000, 27, OUT_IP0,    4, INSTR,   FLAG_IPV4,  1),</div><div class='add'>+	PCE_MC_M(0x6000, 0xF000, 30, OUT_IP0,    3, INSTR,   FLAG_IPV6,  0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 28, OUT_IP3,    2, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 29, OUT_SIP0,   4, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_NONE,   0, LENACCU, FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x1100, 0xFF00, 43, OUT_PROT,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0600, 0xFF00, 43, OUT_PROT,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0xFF00, 36, OUT_IP3,   17, INSTR,   FLAG_HOP,   0),</div><div class='add'>+	PCE_MC_M(0x2B00, 0xFF00, 36, OUT_IP3,   17, INSTR,   FLAG_NN1,   0),</div><div class='add'>+	PCE_MC_M(0x3C00, 0xFF00, 36, OUT_IP3,   17, INSTR,   FLAG_NN2,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 43, OUT_PROT,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x00F0, 38, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0xFF00, 36, OUT_NONE,   0, IPV6,    FLAG_HOP,   0),</div><div class='add'>+	PCE_MC_M(0x2B00, 0xFF00, 36, OUT_NONE,   0, IPV6,    FLAG_NN1,   0),</div><div class='add'>+	PCE_MC_M(0x3C00, 0xFF00, 36, OUT_NONE,   0, IPV6,    FLAG_NN2,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x00FC, 44, OUT_PROT,   0, IPV6,    FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_NONE,   0, IPV6,    FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_SIP0,  16, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_APP0,   4, INSTR,   FLAG_IGMP,  0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c<br/>deleted file mode 100644<br/>index 6eb3140d4044..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq_gswip.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/lantiq_gswip.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2270 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * Lantiq / Intel GSWIP switch driver for VRX200, xRX300 and xRX330 SoCs</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 Lantiq Deutschland</div><div class='del'>- * Copyright (C) 2012 John Crispin &lt;john@phrozen.org&gt;</div><div class='del'>- * Copyright (C) 2017 - 2019 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='del'>- *</div><div class='del'>- * The VLAN and bridge model the GSWIP hardware uses does not directly</div><div class='del'>- * matches the model DSA uses.</div><div class='del'>- *</div><div class='del'>- * The hardware has 64 possible table entries for bridges with one VLAN</div><div class='del'>- * ID, one flow id and a list of ports for each bridge. All entries which</div><div class='del'>- * match the same flow ID are combined in the mac learning table, they</div><div class='del'>- * act as one global bridge.</div><div class='del'>- * The hardware does not support VLAN filter on the port, but on the</div><div class='del'>- * bridge, this driver converts the DSA model to the hardware.</div><div class='del'>- *</div><div class='del'>- * The CPU gets all the exception frames which do not match any forwarding</div><div class='del'>- * rule and the CPU port is also added to all bridges. This makes it possible</div><div class='del'>- * to handle all the special cases easily in software.</div><div class='del'>- * At the initialization the driver allocates one bridge table entry for</div><div class='del'>- * each switch port which is used when the port is used without an</div><div class='del'>- * explicit bridge. This prevents the frames from being forwarded</div><div class='del'>- * between all LAN ports by default.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/firmware.h&gt;</div><div class='del'>-#include &lt;linux/if_bridge.h&gt;</div><div class='del'>-#include &lt;linux/if_vlan.h&gt;</div><div class='del'>-#include &lt;linux/iopoll.h&gt;</div><div class='del'>-#include &lt;linux/mfd/syscon.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/of_mdio.h&gt;</div><div class='del'>-#include &lt;linux/of_net.h&gt;</div><div class='del'>-#include &lt;linux/of_platform.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;linux/phylink.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/regmap.h&gt;</div><div class='del'>-#include &lt;linux/reset.h&gt;</div><div class='del'>-#include &lt;net/dsa.h&gt;</div><div class='del'>-#include &lt;dt-bindings/mips/lantiq_rcu_gphy.h&gt;</div><div class='del'>-</div><div class='del'>-#include "lantiq_pce.h"</div><div class='del'>-</div><div class='del'>-/* GSWIP MDIO Registers */</div><div class='del'>-#define GSWIP_MDIO_GLOB			0x00</div><div class='del'>-#define  GSWIP_MDIO_GLOB_ENABLE		BIT(15)</div><div class='del'>-#define GSWIP_MDIO_CTRL			0x08</div><div class='del'>-#define  GSWIP_MDIO_CTRL_BUSY		BIT(12)</div><div class='del'>-#define  GSWIP_MDIO_CTRL_RD		BIT(11)</div><div class='del'>-#define  GSWIP_MDIO_CTRL_WR		BIT(10)</div><div class='del'>-#define  GSWIP_MDIO_CTRL_PHYAD_MASK	0x1f</div><div class='del'>-#define  GSWIP_MDIO_CTRL_PHYAD_SHIFT	5</div><div class='del'>-#define  GSWIP_MDIO_CTRL_REGAD_MASK	0x1f</div><div class='del'>-#define GSWIP_MDIO_READ			0x09</div><div class='del'>-#define GSWIP_MDIO_WRITE		0x0A</div><div class='del'>-#define GSWIP_MDIO_MDC_CFG0		0x0B</div><div class='del'>-#define GSWIP_MDIO_MDC_CFG1		0x0C</div><div class='del'>-#define GSWIP_MDIO_PHYp(p)		(0x15 - (p))</div><div class='del'>-#define  GSWIP_MDIO_PHY_LINK_MASK	0x6000</div><div class='del'>-#define  GSWIP_MDIO_PHY_LINK_AUTO	0x0000</div><div class='del'>-#define  GSWIP_MDIO_PHY_LINK_DOWN	0x4000</div><div class='del'>-#define  GSWIP_MDIO_PHY_LINK_UP		0x2000</div><div class='del'>-#define  GSWIP_MDIO_PHY_SPEED_MASK	0x1800</div><div class='del'>-#define  GSWIP_MDIO_PHY_SPEED_AUTO	0x1800</div><div class='del'>-#define  GSWIP_MDIO_PHY_SPEED_M10	0x0000</div><div class='del'>-#define  GSWIP_MDIO_PHY_SPEED_M100	0x0800</div><div class='del'>-#define  GSWIP_MDIO_PHY_SPEED_G1	0x1000</div><div class='del'>-#define  GSWIP_MDIO_PHY_FDUP_MASK	0x0600</div><div class='del'>-#define  GSWIP_MDIO_PHY_FDUP_AUTO	0x0000</div><div class='del'>-#define  GSWIP_MDIO_PHY_FDUP_EN		0x0200</div><div class='del'>-#define  GSWIP_MDIO_PHY_FDUP_DIS	0x0600</div><div class='del'>-#define  GSWIP_MDIO_PHY_FCONTX_MASK	0x0180</div><div class='del'>-#define  GSWIP_MDIO_PHY_FCONTX_AUTO	0x0000</div><div class='del'>-#define  GSWIP_MDIO_PHY_FCONTX_EN	0x0100</div><div class='del'>-#define  GSWIP_MDIO_PHY_FCONTX_DIS	0x0180</div><div class='del'>-#define  GSWIP_MDIO_PHY_FCONRX_MASK	0x0060</div><div class='del'>-#define  GSWIP_MDIO_PHY_FCONRX_AUTO	0x0000</div><div class='del'>-#define  GSWIP_MDIO_PHY_FCONRX_EN	0x0020</div><div class='del'>-#define  GSWIP_MDIO_PHY_FCONRX_DIS	0x0060</div><div class='del'>-#define  GSWIP_MDIO_PHY_ADDR_MASK	0x001f</div><div class='del'>-#define  GSWIP_MDIO_PHY_MASK		(GSWIP_MDIO_PHY_ADDR_MASK | \</div><div class='del'>-					 GSWIP_MDIO_PHY_FCONRX_MASK | \</div><div class='del'>-					 GSWIP_MDIO_PHY_FCONTX_MASK | \</div><div class='del'>-					 GSWIP_MDIO_PHY_LINK_MASK | \</div><div class='del'>-					 GSWIP_MDIO_PHY_SPEED_MASK | \</div><div class='del'>-					 GSWIP_MDIO_PHY_FDUP_MASK)</div><div class='del'>-</div><div class='del'>-/* GSWIP MII Registers */</div><div class='del'>-#define GSWIP_MII_CFGp(p)		(0x2 * (p))</div><div class='del'>-#define  GSWIP_MII_CFG_RESET		BIT(15)</div><div class='del'>-#define  GSWIP_MII_CFG_EN		BIT(14)</div><div class='del'>-#define  GSWIP_MII_CFG_ISOLATE		BIT(13)</div><div class='del'>-#define  GSWIP_MII_CFG_LDCLKDIS		BIT(12)</div><div class='del'>-#define  GSWIP_MII_CFG_RGMII_IBS	BIT(8)</div><div class='del'>-#define  GSWIP_MII_CFG_RMII_CLK		BIT(7)</div><div class='del'>-#define  GSWIP_MII_CFG_MODE_MIIP	0x0</div><div class='del'>-#define  GSWIP_MII_CFG_MODE_MIIM	0x1</div><div class='del'>-#define  GSWIP_MII_CFG_MODE_RMIIP	0x2</div><div class='del'>-#define  GSWIP_MII_CFG_MODE_RMIIM	0x3</div><div class='del'>-#define  GSWIP_MII_CFG_MODE_RGMII	0x4</div><div class='del'>-#define  GSWIP_MII_CFG_MODE_GMII	0x9</div><div class='del'>-#define  GSWIP_MII_CFG_MODE_MASK	0xf</div><div class='del'>-#define  GSWIP_MII_CFG_RATE_M2P5	0x00</div><div class='del'>-#define  GSWIP_MII_CFG_RATE_M25	0x10</div><div class='del'>-#define  GSWIP_MII_CFG_RATE_M125	0x20</div><div class='del'>-#define  GSWIP_MII_CFG_RATE_M50	0x30</div><div class='del'>-#define  GSWIP_MII_CFG_RATE_AUTO	0x40</div><div class='del'>-#define  GSWIP_MII_CFG_RATE_MASK	0x70</div><div class='del'>-#define GSWIP_MII_PCDU0			0x01</div><div class='del'>-#define GSWIP_MII_PCDU1			0x03</div><div class='del'>-#define GSWIP_MII_PCDU5			0x05</div><div class='del'>-#define  GSWIP_MII_PCDU_TXDLY_MASK	GENMASK(2, 0)</div><div class='del'>-#define  GSWIP_MII_PCDU_RXDLY_MASK	GENMASK(9, 7)</div><div class='del'>-</div><div class='del'>-/* GSWIP Core Registers */</div><div class='del'>-#define GSWIP_SWRES			0x000</div><div class='del'>-#define  GSWIP_SWRES_R1			BIT(1)	/* GSWIP Software reset */</div><div class='del'>-#define  GSWIP_SWRES_R0			BIT(0)	/* GSWIP Hardware reset */</div><div class='del'>-#define GSWIP_VERSION			0x013</div><div class='del'>-#define  GSWIP_VERSION_REV_SHIFT	0</div><div class='del'>-#define  GSWIP_VERSION_REV_MASK		GENMASK(7, 0)</div><div class='del'>-#define  GSWIP_VERSION_MOD_SHIFT	8</div><div class='del'>-#define  GSWIP_VERSION_MOD_MASK		GENMASK(15, 8)</div><div class='del'>-#define   GSWIP_VERSION_2_0		0x100</div><div class='del'>-#define   GSWIP_VERSION_2_1		0x021</div><div class='del'>-#define   GSWIP_VERSION_2_2		0x122</div><div class='del'>-#define   GSWIP_VERSION_2_2_ETC		0x022</div><div class='del'>-</div><div class='del'>-#define GSWIP_BM_RAM_VAL(x)		(0x043 - (x))</div><div class='del'>-#define GSWIP_BM_RAM_ADDR		0x044</div><div class='del'>-#define GSWIP_BM_RAM_CTRL		0x045</div><div class='del'>-#define  GSWIP_BM_RAM_CTRL_BAS		BIT(15)</div><div class='del'>-#define  GSWIP_BM_RAM_CTRL_OPMOD	BIT(5)</div><div class='del'>-#define  GSWIP_BM_RAM_CTRL_ADDR_MASK	GENMASK(4, 0)</div><div class='del'>-#define GSWIP_BM_QUEUE_GCTRL		0x04A</div><div class='del'>-#define  GSWIP_BM_QUEUE_GCTRL_GL_MOD	BIT(10)</div><div class='del'>-/* buffer management Port Configuration Register */</div><div class='del'>-#define GSWIP_BM_PCFGp(p)		(0x080 + ((p) * 2))</div><div class='del'>-#define  GSWIP_BM_PCFG_CNTEN		BIT(0)	/* RMON Counter Enable */</div><div class='del'>-#define  GSWIP_BM_PCFG_IGCNT		BIT(1)	/* Ingres Special Tag RMON count */</div><div class='del'>-/* buffer management Port Control Register */</div><div class='del'>-#define GSWIP_BM_RMON_CTRLp(p)		(0x81 + ((p) * 2))</div><div class='del'>-#define  GSWIP_BM_CTRL_RMON_RAM1_RES	BIT(0)	/* Software Reset for RMON RAM 1 */</div><div class='del'>-#define  GSWIP_BM_CTRL_RMON_RAM2_RES	BIT(1)	/* Software Reset for RMON RAM 2 */</div><div class='del'>-</div><div class='del'>-/* PCE */</div><div class='del'>-#define GSWIP_PCE_TBL_KEY(x)		(0x447 - (x))</div><div class='del'>-#define GSWIP_PCE_TBL_MASK		0x448</div><div class='del'>-#define GSWIP_PCE_TBL_VAL(x)		(0x44D - (x))</div><div class='del'>-#define GSWIP_PCE_TBL_ADDR		0x44E</div><div class='del'>-#define GSWIP_PCE_TBL_CTRL		0x44F</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_BAS		BIT(15)</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_TYPE	BIT(13)</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_VLD		BIT(12)</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_KEYFORM	BIT(11)</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_GMAP_MASK	GENMASK(10, 7)</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_OPMOD_MASK	GENMASK(6, 5)</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_OPMOD_ADRD	0x00</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_OPMOD_ADWR	0x20</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_OPMOD_KSRD	0x40</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_OPMOD_KSWR	0x60</div><div class='del'>-#define  GSWIP_PCE_TBL_CTRL_ADDR_MASK	GENMASK(4, 0)</div><div class='del'>-#define GSWIP_PCE_PMAP1			0x453	/* Monitoring port map */</div><div class='del'>-#define GSWIP_PCE_PMAP2			0x454	/* Default Multicast port map */</div><div class='del'>-#define GSWIP_PCE_PMAP3			0x455	/* Default Unknown Unicast port map */</div><div class='del'>-#define GSWIP_PCE_GCTRL_0		0x456</div><div class='del'>-#define  GSWIP_PCE_GCTRL_0_MTFL		BIT(0)  /* MAC Table Flushing */</div><div class='del'>-#define  GSWIP_PCE_GCTRL_0_MC_VALID	BIT(3)</div><div class='del'>-#define  GSWIP_PCE_GCTRL_0_VLAN		BIT(14) /* VLAN aware Switching */</div><div class='del'>-#define GSWIP_PCE_GCTRL_1		0x457</div><div class='del'>-#define  GSWIP_PCE_GCTRL_1_MAC_GLOCK	BIT(2)	/* MAC Address table lock */</div><div class='del'>-#define  GSWIP_PCE_GCTRL_1_MAC_GLOCK_MOD	BIT(3) /* Mac address table lock forwarding mode */</div><div class='del'>-#define GSWIP_PCE_PCTRL_0p(p)		(0x480 + ((p) * 0xA))</div><div class='del'>-#define  GSWIP_PCE_PCTRL_0_TVM		BIT(5)	/* Transparent VLAN mode */</div><div class='del'>-#define  GSWIP_PCE_PCTRL_0_VREP		BIT(6)	/* VLAN Replace Mode */</div><div class='del'>-#define  GSWIP_PCE_PCTRL_0_INGRESS	BIT(11)	/* Accept special tag in ingress */</div><div class='del'>-#define  GSWIP_PCE_PCTRL_0_PSTATE_LISTEN	0x0</div><div class='del'>-#define  GSWIP_PCE_PCTRL_0_PSTATE_RX		0x1</div><div class='del'>-#define  GSWIP_PCE_PCTRL_0_PSTATE_TX		0x2</div><div class='del'>-#define  GSWIP_PCE_PCTRL_0_PSTATE_LEARNING	0x3</div><div class='del'>-#define  GSWIP_PCE_PCTRL_0_PSTATE_FORWARDING	0x7</div><div class='del'>-#define  GSWIP_PCE_PCTRL_0_PSTATE_MASK	GENMASK(2, 0)</div><div class='del'>-#define GSWIP_PCE_VCTRL(p)		(0x485 + ((p) * 0xA))</div><div class='del'>-#define  GSWIP_PCE_VCTRL_UVR		BIT(0)	/* Unknown VLAN Rule */</div><div class='del'>-#define  GSWIP_PCE_VCTRL_VIMR		BIT(3)	/* VLAN Ingress Member violation rule */</div><div class='del'>-#define  GSWIP_PCE_VCTRL_VEMR		BIT(4)	/* VLAN Egress Member violation rule */</div><div class='del'>-#define  GSWIP_PCE_VCTRL_VSR		BIT(5)	/* VLAN Security */</div><div class='del'>-#define  GSWIP_PCE_VCTRL_VID0		BIT(6)	/* Priority Tagged Rule */</div><div class='del'>-#define GSWIP_PCE_DEFPVID(p)		(0x486 + ((p) * 0xA))</div><div class='del'>-</div><div class='del'>-#define GSWIP_MAC_FLEN			0x8C5</div><div class='del'>-#define GSWIP_MAC_CTRL_0p(p)		(0x903 + ((p) * 0xC))</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_PADEN		BIT(8)</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FCS_EN	BIT(7)</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FCON_MASK	0x0070</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FCON_AUTO	0x0000</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FCON_RX	0x0010</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FCON_TX	0x0020</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FCON_RXTX	0x0030</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FCON_NONE	0x0040</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FDUP_MASK	0x000C</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FDUP_AUTO	0x0000</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FDUP_EN	0x0004</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_FDUP_DIS	0x000C</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_GMII_MASK	0x0003</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_GMII_AUTO	0x0000</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_GMII_MII	0x0001</div><div class='del'>-#define  GSWIP_MAC_CTRL_0_GMII_RGMII	0x0002</div><div class='del'>-#define GSWIP_MAC_CTRL_2p(p)		(0x905 + ((p) * 0xC))</div><div class='del'>-#define GSWIP_MAC_CTRL_2_LCHKL		BIT(2) /* Frame Length Check Long Enable */</div><div class='del'>-#define GSWIP_MAC_CTRL_2_MLEN		BIT(3) /* Maximum Untagged Frame Lnegth */</div><div class='del'>-</div><div class='del'>-/* Ethernet Switch Fetch DMA Port Control Register */</div><div class='del'>-#define GSWIP_FDMA_PCTRLp(p)		(0xA80 + ((p) * 0x6))</div><div class='del'>-#define  GSWIP_FDMA_PCTRL_EN		BIT(0)	/* FDMA Port Enable */</div><div class='del'>-#define  GSWIP_FDMA_PCTRL_STEN		BIT(1)	/* Special Tag Insertion Enable */</div><div class='del'>-#define  GSWIP_FDMA_PCTRL_VLANMOD_MASK	GENMASK(4, 3)	/* VLAN Modification Control */</div><div class='del'>-#define  GSWIP_FDMA_PCTRL_VLANMOD_SHIFT	3	/* VLAN Modification Control */</div><div class='del'>-#define  GSWIP_FDMA_PCTRL_VLANMOD_DIS	(0x0 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='del'>-#define  GSWIP_FDMA_PCTRL_VLANMOD_PRIO	(0x1 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='del'>-#define  GSWIP_FDMA_PCTRL_VLANMOD_ID	(0x2 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='del'>-#define  GSWIP_FDMA_PCTRL_VLANMOD_BOTH	(0x3 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='del'>-</div><div class='del'>-/* Ethernet Switch Store DMA Port Control Register */</div><div class='del'>-#define GSWIP_SDMA_PCTRLp(p)		(0xBC0 + ((p) * 0x6))</div><div class='del'>-#define  GSWIP_SDMA_PCTRL_EN		BIT(0)	/* SDMA Port Enable */</div><div class='del'>-#define  GSWIP_SDMA_PCTRL_FCEN		BIT(1)	/* Flow Control Enable */</div><div class='del'>-#define  GSWIP_SDMA_PCTRL_PAUFWD	BIT(3)	/* Pause Frame Forwarding */</div><div class='del'>-</div><div class='del'>-#define GSWIP_TABLE_ACTIVE_VLAN		0x01</div><div class='del'>-#define GSWIP_TABLE_VLAN_MAPPING	0x02</div><div class='del'>-#define GSWIP_TABLE_MAC_BRIDGE		0x0b</div><div class='del'>-#define  GSWIP_TABLE_MAC_BRIDGE_KEY3_FID	GENMASK(5, 0)	/* Filtering identifier */</div><div class='del'>-#define  GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT	GENMASK(7, 4)	/* Port on learned entries */</div><div class='del'>-#define  GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC	BIT(0)		/* Static, non-aging entry */</div><div class='del'>-</div><div class='del'>-#define XRX200_GPHY_FW_ALIGN	(16 * 1024)</div><div class='del'>-</div><div class='del'>-/* Maximum packet size supported by the switch. In theory this should be 10240,</div><div class='del'>- * but long packets currently cause lock-ups with an MTU of over 2526. Medium</div><div class='del'>- * packets are sometimes dropped (e.g. TCP over 2477, UDP over 2516-2519, ICMP</div><div class='del'>- * over 2526), hence an MTU value of 2400 seems safe. This issue only affects</div><div class='del'>- * packet reception. This is probably caused by the PPA engine, which is on the</div><div class='del'>- * RX part of the device. Packet transmission works properly up to 10240.</div><div class='del'>- */</div><div class='del'>-#define GSWIP_MAX_PACKET_LENGTH	2400</div><div class='del'>-</div><div class='del'>-struct gswip_hw_info {</div><div class='del'>-	int max_ports;</div><div class='del'>-	int cpu_port;</div><div class='del'>-	const struct dsa_switch_ops *ops;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct xway_gphy_match_data {</div><div class='del'>-	char *fe_firmware_name;</div><div class='del'>-	char *ge_firmware_name;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct gswip_gphy_fw {</div><div class='del'>-	struct clk *clk_gate;</div><div class='del'>-	struct reset_control *reset;</div><div class='del'>-	u32 fw_addr_offset;</div><div class='del'>-	char *fw_name;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct gswip_vlan {</div><div class='del'>-	struct net_device *bridge;</div><div class='del'>-	u16 vid;</div><div class='del'>-	u8 fid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct gswip_priv {</div><div class='del'>-	__iomem void *gswip;</div><div class='del'>-	__iomem void *mdio;</div><div class='del'>-	__iomem void *mii;</div><div class='del'>-	const struct gswip_hw_info *hw_info;</div><div class='del'>-	const struct xway_gphy_match_data *gphy_fw_name_cfg;</div><div class='del'>-	struct dsa_switch *ds;</div><div class='del'>-	struct device *dev;</div><div class='del'>-	struct regmap *rcu_regmap;</div><div class='del'>-	struct gswip_vlan vlans[64];</div><div class='del'>-	int num_gphy_fw;</div><div class='del'>-	struct gswip_gphy_fw *gphy_fw;</div><div class='del'>-	u32 port_vlan_filter;</div><div class='del'>-	struct mutex pce_table_lock;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct gswip_pce_table_entry {</div><div class='del'>-	u16 index;      // PCE_TBL_ADDR.ADDR = pData-&gt;table_index</div><div class='del'>-	u16 table;      // PCE_TBL_CTRL.ADDR = pData-&gt;table</div><div class='del'>-	u16 key[8];</div><div class='del'>-	u16 val[5];</div><div class='del'>-	u16 mask;</div><div class='del'>-	u8 gmap;</div><div class='del'>-	bool type;</div><div class='del'>-	bool valid;</div><div class='del'>-	bool key_mode;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct gswip_rmon_cnt_desc {</div><div class='del'>-	unsigned int size;</div><div class='del'>-	unsigned int offset;</div><div class='del'>-	const char *name;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define MIB_DESC(_size, _offset, _name) {.size = _size, .offset = _offset, .name = _name}</div><div class='del'>-</div><div class='del'>-static const struct gswip_rmon_cnt_desc gswip_rmon_cnt[] = {</div><div class='del'>-	/** Receive Packet Count (only packets that are accepted and not discarded). */</div><div class='del'>-	MIB_DESC(1, 0x1F, "RxGoodPkts"),</div><div class='del'>-	MIB_DESC(1, 0x23, "RxUnicastPkts"),</div><div class='del'>-	MIB_DESC(1, 0x22, "RxMulticastPkts"),</div><div class='del'>-	MIB_DESC(1, 0x21, "RxFCSErrorPkts"),</div><div class='del'>-	MIB_DESC(1, 0x1D, "RxUnderSizeGoodPkts"),</div><div class='del'>-	MIB_DESC(1, 0x1E, "RxUnderSizeErrorPkts"),</div><div class='del'>-	MIB_DESC(1, 0x1B, "RxOversizeGoodPkts"),</div><div class='del'>-	MIB_DESC(1, 0x1C, "RxOversizeErrorPkts"),</div><div class='del'>-	MIB_DESC(1, 0x20, "RxGoodPausePkts"),</div><div class='del'>-	MIB_DESC(1, 0x1A, "RxAlignErrorPkts"),</div><div class='del'>-	MIB_DESC(1, 0x12, "Rx64BytePkts"),</div><div class='del'>-	MIB_DESC(1, 0x13, "Rx127BytePkts"),</div><div class='del'>-	MIB_DESC(1, 0x14, "Rx255BytePkts"),</div><div class='del'>-	MIB_DESC(1, 0x15, "Rx511BytePkts"),</div><div class='del'>-	MIB_DESC(1, 0x16, "Rx1023BytePkts"),</div><div class='del'>-	/** Receive Size 1024-1522 (or more, if configured) Packet Count. */</div><div class='del'>-	MIB_DESC(1, 0x17, "RxMaxBytePkts"),</div><div class='del'>-	MIB_DESC(1, 0x18, "RxDroppedPkts"),</div><div class='del'>-	MIB_DESC(1, 0x19, "RxFilteredPkts"),</div><div class='del'>-	MIB_DESC(2, 0x24, "RxGoodBytes"),</div><div class='del'>-	MIB_DESC(2, 0x26, "RxBadBytes"),</div><div class='del'>-	MIB_DESC(1, 0x11, "TxAcmDroppedPkts"),</div><div class='del'>-	MIB_DESC(1, 0x0C, "TxGoodPkts"),</div><div class='del'>-	MIB_DESC(1, 0x06, "TxUnicastPkts"),</div><div class='del'>-	MIB_DESC(1, 0x07, "TxMulticastPkts"),</div><div class='del'>-	MIB_DESC(1, 0x00, "Tx64BytePkts"),</div><div class='del'>-	MIB_DESC(1, 0x01, "Tx127BytePkts"),</div><div class='del'>-	MIB_DESC(1, 0x02, "Tx255BytePkts"),</div><div class='del'>-	MIB_DESC(1, 0x03, "Tx511BytePkts"),</div><div class='del'>-	MIB_DESC(1, 0x04, "Tx1023BytePkts"),</div><div class='del'>-	/** Transmit Size 1024-1522 (or more, if configured) Packet Count. */</div><div class='del'>-	MIB_DESC(1, 0x05, "TxMaxBytePkts"),</div><div class='del'>-	MIB_DESC(1, 0x08, "TxSingleCollCount"),</div><div class='del'>-	MIB_DESC(1, 0x09, "TxMultCollCount"),</div><div class='del'>-	MIB_DESC(1, 0x0A, "TxLateCollCount"),</div><div class='del'>-	MIB_DESC(1, 0x0B, "TxExcessCollCount"),</div><div class='del'>-	MIB_DESC(1, 0x0D, "TxPauseCount"),</div><div class='del'>-	MIB_DESC(1, 0x10, "TxDroppedPkts"),</div><div class='del'>-	MIB_DESC(2, 0x0E, "TxGoodBytes"),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static u32 gswip_switch_r(struct gswip_priv *priv, u32 offset)</div><div class='del'>-{</div><div class='del'>-	return __raw_readl(priv-&gt;gswip + (offset * 4));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_switch_w(struct gswip_priv *priv, u32 val, u32 offset)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(val, priv-&gt;gswip + (offset * 4));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_switch_mask(struct gswip_priv *priv, u32 clear, u32 set,</div><div class='del'>-			      u32 offset)</div><div class='del'>-{</div><div class='del'>-	u32 val = gswip_switch_r(priv, offset);</div><div class='del'>-</div><div class='del'>-	val &amp;= ~(clear);</div><div class='del'>-	val |= set;</div><div class='del'>-	gswip_switch_w(priv, val, offset);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 gswip_switch_r_timeout(struct gswip_priv *priv, u32 offset,</div><div class='del'>-				  u32 cleared)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	return readx_poll_timeout(__raw_readl, priv-&gt;gswip + (offset * 4), val,</div><div class='del'>-				  (val &amp; cleared) == 0, 20, 50000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 gswip_mdio_r(struct gswip_priv *priv, u32 offset)</div><div class='del'>-{</div><div class='del'>-	return __raw_readl(priv-&gt;mdio + (offset * 4));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_mdio_w(struct gswip_priv *priv, u32 val, u32 offset)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(val, priv-&gt;mdio + (offset * 4));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_mdio_mask(struct gswip_priv *priv, u32 clear, u32 set,</div><div class='del'>-			    u32 offset)</div><div class='del'>-{</div><div class='del'>-	u32 val = gswip_mdio_r(priv, offset);</div><div class='del'>-</div><div class='del'>-	val &amp;= ~(clear);</div><div class='del'>-	val |= set;</div><div class='del'>-	gswip_mdio_w(priv, val, offset);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 gswip_mii_r(struct gswip_priv *priv, u32 offset)</div><div class='del'>-{</div><div class='del'>-	return __raw_readl(priv-&gt;mii + (offset * 4));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_mii_w(struct gswip_priv *priv, u32 val, u32 offset)</div><div class='del'>-{</div><div class='del'>-	__raw_writel(val, priv-&gt;mii + (offset * 4));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_mii_mask(struct gswip_priv *priv, u32 clear, u32 set,</div><div class='del'>-			   u32 offset)</div><div class='del'>-{</div><div class='del'>-	u32 val = gswip_mii_r(priv, offset);</div><div class='del'>-</div><div class='del'>-	val &amp;= ~(clear);</div><div class='del'>-	val |= set;</div><div class='del'>-	gswip_mii_w(priv, val, offset);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_mii_mask_cfg(struct gswip_priv *priv, u32 clear, u32 set,</div><div class='del'>-			       int port)</div><div class='del'>-{</div><div class='del'>-	/* There's no MII_CFG register for the CPU port */</div><div class='del'>-	if (!dsa_is_cpu_port(priv-&gt;ds, port))</div><div class='del'>-		gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_mii_mask_pcdu(struct gswip_priv *priv, u32 clear, u32 set,</div><div class='del'>-				int port)</div><div class='del'>-{</div><div class='del'>-	switch (port) {</div><div class='del'>-	case 0:</div><div class='del'>-		gswip_mii_mask(priv, clear, set, GSWIP_MII_PCDU0);</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		gswip_mii_mask(priv, clear, set, GSWIP_MII_PCDU1);</div><div class='del'>-		break;</div><div class='del'>-	case 5:</div><div class='del'>-		gswip_mii_mask(priv, clear, set, GSWIP_MII_PCDU5);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_mdio_poll(struct gswip_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int cnt = 100;</div><div class='del'>-</div><div class='del'>-	while (likely(cnt--)) {</div><div class='del'>-		u32 ctrl = gswip_mdio_r(priv, GSWIP_MDIO_CTRL);</div><div class='del'>-</div><div class='del'>-		if ((ctrl &amp; GSWIP_MDIO_CTRL_BUSY) == 0)</div><div class='del'>-			return 0;</div><div class='del'>-		usleep_range(20, 40);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ETIMEDOUT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_mdio_wr(struct mii_bus *bus, int addr, int reg, u16 val)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = bus-&gt;priv;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = gswip_mdio_poll(priv);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;bus-&gt;dev, "waiting for MDIO bus busy timed out\n");</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_mdio_w(priv, val, GSWIP_MDIO_WRITE);</div><div class='del'>-	gswip_mdio_w(priv, GSWIP_MDIO_CTRL_BUSY | GSWIP_MDIO_CTRL_WR |</div><div class='del'>-		((addr &amp; GSWIP_MDIO_CTRL_PHYAD_MASK) &lt;&lt; GSWIP_MDIO_CTRL_PHYAD_SHIFT) |</div><div class='del'>-		(reg &amp; GSWIP_MDIO_CTRL_REGAD_MASK),</div><div class='del'>-		GSWIP_MDIO_CTRL);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_mdio_rd(struct mii_bus *bus, int addr, int reg)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = bus-&gt;priv;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = gswip_mdio_poll(priv);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;bus-&gt;dev, "waiting for MDIO bus busy timed out\n");</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_mdio_w(priv, GSWIP_MDIO_CTRL_BUSY | GSWIP_MDIO_CTRL_RD |</div><div class='del'>-		((addr &amp; GSWIP_MDIO_CTRL_PHYAD_MASK) &lt;&lt; GSWIP_MDIO_CTRL_PHYAD_SHIFT) |</div><div class='del'>-		(reg &amp; GSWIP_MDIO_CTRL_REGAD_MASK),</div><div class='del'>-		GSWIP_MDIO_CTRL);</div><div class='del'>-</div><div class='del'>-	err = gswip_mdio_poll(priv);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;bus-&gt;dev, "waiting for MDIO bus busy timed out\n");</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return gswip_mdio_r(priv, GSWIP_MDIO_READ);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_mdio(struct gswip_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct device_node *mdio_np, *switch_np = priv-&gt;dev-&gt;of_node;</div><div class='del'>-	struct device *dev = priv-&gt;dev;</div><div class='del'>-	struct mii_bus *bus;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	mdio_np = of_get_compatible_child(switch_np, "lantiq,xrx200-mdio");</div><div class='del'>-	if (!of_device_is_available(mdio_np))</div><div class='del'>-		goto out_put_node;</div><div class='del'>-</div><div class='del'>-	bus = devm_mdiobus_alloc(dev);</div><div class='del'>-	if (!bus) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto out_put_node;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bus-&gt;priv = priv;</div><div class='del'>-	bus-&gt;read = gswip_mdio_rd;</div><div class='del'>-	bus-&gt;write = gswip_mdio_wr;</div><div class='del'>-	bus-&gt;name = "lantiq,xrx200-mdio";</div><div class='del'>-	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-mii", dev_name(priv-&gt;dev));</div><div class='del'>-	bus-&gt;parent = priv-&gt;dev;</div><div class='del'>-</div><div class='del'>-	err = devm_of_mdiobus_register(dev, bus, mdio_np);</div><div class='del'>-</div><div class='del'>-out_put_node:</div><div class='del'>-	of_node_put(mdio_np);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_pce_table_entry_read(struct gswip_priv *priv,</div><div class='del'>-				      struct gswip_pce_table_entry *tbl)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-	u16 crtl;</div><div class='del'>-	u16 addr_mode = tbl-&gt;key_mode ? GSWIP_PCE_TBL_CTRL_OPMOD_KSRD :</div><div class='del'>-					GSWIP_PCE_TBL_CTRL_OPMOD_ADRD;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;priv-&gt;pce_table_lock);</div><div class='del'>-</div><div class='del'>-	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='del'>-				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='del'>-	if (err) {</div><div class='del'>-		mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_switch_w(priv, tbl-&gt;index, GSWIP_PCE_TBL_ADDR);</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='del'>-				GSWIP_PCE_TBL_CTRL_OPMOD_MASK,</div><div class='del'>-			  tbl-&gt;table | addr_mode | GSWIP_PCE_TBL_CTRL_BAS,</div><div class='del'>-			  GSWIP_PCE_TBL_CTRL);</div><div class='del'>-</div><div class='del'>-	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='del'>-				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='del'>-	if (err) {</div><div class='del'>-		mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;key); i++)</div><div class='del'>-		tbl-&gt;key[i] = gswip_switch_r(priv, GSWIP_PCE_TBL_KEY(i));</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;val); i++)</div><div class='del'>-		tbl-&gt;val[i] = gswip_switch_r(priv, GSWIP_PCE_TBL_VAL(i));</div><div class='del'>-</div><div class='del'>-	tbl-&gt;mask = gswip_switch_r(priv, GSWIP_PCE_TBL_MASK);</div><div class='del'>-</div><div class='del'>-	crtl = gswip_switch_r(priv, GSWIP_PCE_TBL_CTRL);</div><div class='del'>-</div><div class='del'>-	tbl-&gt;type = !!(crtl &amp; GSWIP_PCE_TBL_CTRL_TYPE);</div><div class='del'>-	tbl-&gt;valid = !!(crtl &amp; GSWIP_PCE_TBL_CTRL_VLD);</div><div class='del'>-	tbl-&gt;gmap = (crtl &amp; GSWIP_PCE_TBL_CTRL_GMAP_MASK) &gt;&gt; 7;</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_pce_table_entry_write(struct gswip_priv *priv,</div><div class='del'>-				       struct gswip_pce_table_entry *tbl)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-	u16 crtl;</div><div class='del'>-	u16 addr_mode = tbl-&gt;key_mode ? GSWIP_PCE_TBL_CTRL_OPMOD_KSWR :</div><div class='del'>-					GSWIP_PCE_TBL_CTRL_OPMOD_ADWR;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;priv-&gt;pce_table_lock);</div><div class='del'>-</div><div class='del'>-	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='del'>-				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='del'>-	if (err) {</div><div class='del'>-		mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_switch_w(priv, tbl-&gt;index, GSWIP_PCE_TBL_ADDR);</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='del'>-				GSWIP_PCE_TBL_CTRL_OPMOD_MASK,</div><div class='del'>-			  tbl-&gt;table | addr_mode,</div><div class='del'>-			  GSWIP_PCE_TBL_CTRL);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;key); i++)</div><div class='del'>-		gswip_switch_w(priv, tbl-&gt;key[i], GSWIP_PCE_TBL_KEY(i));</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;val); i++)</div><div class='del'>-		gswip_switch_w(priv, tbl-&gt;val[i], GSWIP_PCE_TBL_VAL(i));</div><div class='del'>-</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='del'>-				GSWIP_PCE_TBL_CTRL_OPMOD_MASK,</div><div class='del'>-			  tbl-&gt;table | addr_mode,</div><div class='del'>-			  GSWIP_PCE_TBL_CTRL);</div><div class='del'>-</div><div class='del'>-	gswip_switch_w(priv, tbl-&gt;mask, GSWIP_PCE_TBL_MASK);</div><div class='del'>-</div><div class='del'>-	crtl = gswip_switch_r(priv, GSWIP_PCE_TBL_CTRL);</div><div class='del'>-	crtl &amp;= ~(GSWIP_PCE_TBL_CTRL_TYPE | GSWIP_PCE_TBL_CTRL_VLD |</div><div class='del'>-		  GSWIP_PCE_TBL_CTRL_GMAP_MASK);</div><div class='del'>-	if (tbl-&gt;type)</div><div class='del'>-		crtl |= GSWIP_PCE_TBL_CTRL_TYPE;</div><div class='del'>-	if (tbl-&gt;valid)</div><div class='del'>-		crtl |= GSWIP_PCE_TBL_CTRL_VLD;</div><div class='del'>-	crtl |= (tbl-&gt;gmap &lt;&lt; 7) &amp; GSWIP_PCE_TBL_CTRL_GMAP_MASK;</div><div class='del'>-	crtl |= GSWIP_PCE_TBL_CTRL_BAS;</div><div class='del'>-	gswip_switch_w(priv, crtl, GSWIP_PCE_TBL_CTRL);</div><div class='del'>-</div><div class='del'>-	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='del'>-				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Add the LAN port into a bridge with the CPU port by</div><div class='del'>- * default. This prevents automatic forwarding of</div><div class='del'>- * packages between the LAN ports when no explicit</div><div class='del'>- * bridge is configured.</div><div class='del'>- */</div><div class='del'>-static int gswip_add_single_port_br(struct gswip_priv *priv, int port, bool add)</div><div class='del'>-{</div><div class='del'>-	struct gswip_pce_table_entry vlan_active = {0,};</div><div class='del'>-	struct gswip_pce_table_entry vlan_mapping = {0,};</div><div class='del'>-	unsigned int cpu_port = priv-&gt;hw_info-&gt;cpu_port;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	vlan_active.index = port + 1;</div><div class='del'>-	vlan_active.table = GSWIP_TABLE_ACTIVE_VLAN;</div><div class='del'>-	vlan_active.key[0] = 0; /* vid */</div><div class='del'>-	vlan_active.val[0] = port + 1 /* fid */;</div><div class='del'>-	vlan_active.valid = add;</div><div class='del'>-	err = gswip_pce_table_entry_write(priv, &amp;vlan_active);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(priv-&gt;dev, "failed to write active VLAN: %d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!add)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	vlan_mapping.index = port + 1;</div><div class='del'>-	vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='del'>-	vlan_mapping.val[0] = 0 /* vid */;</div><div class='del'>-	vlan_mapping.val[1] = BIT(port) | BIT(cpu_port);</div><div class='del'>-	vlan_mapping.val[2] = 0;</div><div class='del'>-	err = gswip_pce_table_entry_write(priv, &amp;vlan_mapping);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(priv-&gt;dev, "failed to write VLAN mapping: %d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_enable(struct dsa_switch *ds, int port,</div><div class='del'>-			     struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!dsa_is_cpu_port(ds, port)) {</div><div class='del'>-		u32 mdio_phy = 0;</div><div class='del'>-</div><div class='del'>-		err = gswip_add_single_port_br(priv, port, true);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		if (phydev)</div><div class='del'>-			mdio_phy = phydev-&gt;mdio.addr &amp; GSWIP_MDIO_PHY_ADDR_MASK;</div><div class='del'>-</div><div class='del'>-		gswip_mdio_mask(priv, GSWIP_MDIO_PHY_ADDR_MASK, mdio_phy,</div><div class='del'>-				GSWIP_MDIO_PHYp(port));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* RMON Counter Enable for port */</div><div class='del'>-	gswip_switch_w(priv, GSWIP_BM_PCFG_CNTEN, GSWIP_BM_PCFGp(port));</div><div class='del'>-</div><div class='del'>-	/* enable port fetch/store dma &amp; VLAN Modification */</div><div class='del'>-	gswip_switch_mask(priv, 0, GSWIP_FDMA_PCTRL_EN |</div><div class='del'>-				   GSWIP_FDMA_PCTRL_VLANMOD_BOTH,</div><div class='del'>-			 GSWIP_FDMA_PCTRLp(port));</div><div class='del'>-	gswip_switch_mask(priv, 0, GSWIP_SDMA_PCTRL_EN,</div><div class='del'>-			  GSWIP_SDMA_PCTRLp(port));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_port_disable(struct dsa_switch *ds, int port)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_FDMA_PCTRL_EN, 0,</div><div class='del'>-			  GSWIP_FDMA_PCTRLp(port));</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_SDMA_PCTRL_EN, 0,</div><div class='del'>-			  GSWIP_SDMA_PCTRLp(port));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_pce_load_microcode(struct gswip_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='del'>-				GSWIP_PCE_TBL_CTRL_OPMOD_MASK,</div><div class='del'>-			  GSWIP_PCE_TBL_CTRL_OPMOD_ADWR, GSWIP_PCE_TBL_CTRL);</div><div class='del'>-	gswip_switch_w(priv, 0, GSWIP_PCE_TBL_MASK);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(gswip_pce_microcode); i++) {</div><div class='del'>-		gswip_switch_w(priv, i, GSWIP_PCE_TBL_ADDR);</div><div class='del'>-		gswip_switch_w(priv, gswip_pce_microcode[i].val_0,</div><div class='del'>-			       GSWIP_PCE_TBL_VAL(0));</div><div class='del'>-		gswip_switch_w(priv, gswip_pce_microcode[i].val_1,</div><div class='del'>-			       GSWIP_PCE_TBL_VAL(1));</div><div class='del'>-		gswip_switch_w(priv, gswip_pce_microcode[i].val_2,</div><div class='del'>-			       GSWIP_PCE_TBL_VAL(2));</div><div class='del'>-		gswip_switch_w(priv, gswip_pce_microcode[i].val_3,</div><div class='del'>-			       GSWIP_PCE_TBL_VAL(3));</div><div class='del'>-</div><div class='del'>-		/* start the table access: */</div><div class='del'>-		gswip_switch_mask(priv, 0, GSWIP_PCE_TBL_CTRL_BAS,</div><div class='del'>-				  GSWIP_PCE_TBL_CTRL);</div><div class='del'>-		err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='del'>-					     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* tell the switch that the microcode is loaded */</div><div class='del'>-	gswip_switch_mask(priv, 0, GSWIP_PCE_GCTRL_0_MC_VALID,</div><div class='del'>-			  GSWIP_PCE_GCTRL_0);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='del'>-				     bool vlan_filtering,</div><div class='del'>-				     struct netlink_ext_ack *extack)</div><div class='del'>-{</div><div class='del'>-	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-</div><div class='del'>-	/* Do not allow changing the VLAN filtering options while in bridge */</div><div class='del'>-	if (bridge &amp;&amp; !!(priv-&gt;port_vlan_filter &amp; BIT(port)) != vlan_filtering) {</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack,</div><div class='del'>-				   "Dynamic toggling of vlan_filtering not supported");</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (vlan_filtering) {</div><div class='del'>-		/* Use tag based VLAN */</div><div class='del'>-		gswip_switch_mask(priv,</div><div class='del'>-				  GSWIP_PCE_VCTRL_VSR,</div><div class='del'>-				  GSWIP_PCE_VCTRL_UVR | GSWIP_PCE_VCTRL_VIMR |</div><div class='del'>-				  GSWIP_PCE_VCTRL_VEMR,</div><div class='del'>-				  GSWIP_PCE_VCTRL(port));</div><div class='del'>-		gswip_switch_mask(priv, GSWIP_PCE_PCTRL_0_TVM, 0,</div><div class='del'>-				  GSWIP_PCE_PCTRL_0p(port));</div><div class='del'>-	} else {</div><div class='del'>-		/* Use port based VLAN */</div><div class='del'>-		gswip_switch_mask(priv,</div><div class='del'>-				  GSWIP_PCE_VCTRL_UVR | GSWIP_PCE_VCTRL_VIMR |</div><div class='del'>-				  GSWIP_PCE_VCTRL_VEMR,</div><div class='del'>-				  GSWIP_PCE_VCTRL_VSR,</div><div class='del'>-				  GSWIP_PCE_VCTRL(port));</div><div class='del'>-		gswip_switch_mask(priv, 0, GSWIP_PCE_PCTRL_0_TVM,</div><div class='del'>-				  GSWIP_PCE_PCTRL_0p(port));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_setup(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	unsigned int cpu_port = priv-&gt;hw_info-&gt;cpu_port;</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	gswip_switch_w(priv, GSWIP_SWRES_R0, GSWIP_SWRES);</div><div class='del'>-	usleep_range(5000, 10000);</div><div class='del'>-	gswip_switch_w(priv, 0, GSWIP_SWRES);</div><div class='del'>-</div><div class='del'>-	/* disable port fetch/store dma on all ports */</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_info-&gt;max_ports; i++) {</div><div class='del'>-		gswip_port_disable(ds, i);</div><div class='del'>-		gswip_port_vlan_filtering(ds, i, false, NULL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* enable Switch */</div><div class='del'>-	gswip_mdio_mask(priv, 0, GSWIP_MDIO_GLOB_ENABLE, GSWIP_MDIO_GLOB);</div><div class='del'>-</div><div class='del'>-	err = gswip_pce_load_microcode(priv);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(priv-&gt;dev, "writing PCE microcode failed, %i\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Default unknown Broadcast/Multicast/Unicast port maps */</div><div class='del'>-	gswip_switch_w(priv, BIT(cpu_port), GSWIP_PCE_PMAP1);</div><div class='del'>-	gswip_switch_w(priv, BIT(cpu_port), GSWIP_PCE_PMAP2);</div><div class='del'>-	gswip_switch_w(priv, BIT(cpu_port), GSWIP_PCE_PMAP3);</div><div class='del'>-</div><div class='del'>-	/* Deactivate MDIO PHY auto polling. Some PHYs as the AR8030 have an</div><div class='del'>-	 * interoperability problem with this auto polling mechanism because</div><div class='del'>-	 * their status registers think that the link is in a different state</div><div class='del'>-	 * than it actually is. For the AR8030 it has the BMSR_ESTATEN bit set</div><div class='del'>-	 * as well as ESTATUS_1000_TFULL and ESTATUS_1000_XFULL. This makes the</div><div class='del'>-	 * auto polling state machine consider the link being negotiated with</div><div class='del'>-	 * 1Gbit/s. Since the PHY itself is a Fast Ethernet RMII PHY this leads</div><div class='del'>-	 * to the switch port being completely dead (RX and TX are both not</div><div class='del'>-	 * working).</div><div class='del'>-	 * Also with various other PHY / port combinations (PHY11G GPHY, PHY22F</div><div class='del'>-	 * GPHY, external RGMII PEF7071/7072) any traffic would stop. Sometimes</div><div class='del'>-	 * it would work fine for a few minutes to hours and then stop, on</div><div class='del'>-	 * other device it would no traffic could be sent or received at all.</div><div class='del'>-	 * Testing shows that when PHY auto polling is disabled these problems</div><div class='del'>-	 * go away.</div><div class='del'>-	 */</div><div class='del'>-	gswip_mdio_w(priv, 0x0, GSWIP_MDIO_MDC_CFG0);</div><div class='del'>-</div><div class='del'>-	/* Configure the MDIO Clock 2.5 MHz */</div><div class='del'>-	gswip_mdio_mask(priv, 0xff, 0x09, GSWIP_MDIO_MDC_CFG1);</div><div class='del'>-</div><div class='del'>-	/* Disable the xMII interface and clear it's isolation bit */</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_info-&gt;max_ports; i++)</div><div class='del'>-		gswip_mii_mask_cfg(priv,</div><div class='del'>-				   GSWIP_MII_CFG_EN | GSWIP_MII_CFG_ISOLATE,</div><div class='del'>-				   0, i);</div><div class='del'>-</div><div class='del'>-	/* enable special tag insertion on cpu port */</div><div class='del'>-	gswip_switch_mask(priv, 0, GSWIP_FDMA_PCTRL_STEN,</div><div class='del'>-			  GSWIP_FDMA_PCTRLp(cpu_port));</div><div class='del'>-</div><div class='del'>-	/* accept special tag in ingress direction */</div><div class='del'>-	gswip_switch_mask(priv, 0, GSWIP_PCE_PCTRL_0_INGRESS,</div><div class='del'>-			  GSWIP_PCE_PCTRL_0p(cpu_port));</div><div class='del'>-</div><div class='del'>-	gswip_switch_mask(priv, 0, GSWIP_BM_QUEUE_GCTRL_GL_MOD,</div><div class='del'>-			  GSWIP_BM_QUEUE_GCTRL);</div><div class='del'>-</div><div class='del'>-	/* VLAN aware Switching */</div><div class='del'>-	gswip_switch_mask(priv, 0, GSWIP_PCE_GCTRL_0_VLAN, GSWIP_PCE_GCTRL_0);</div><div class='del'>-</div><div class='del'>-	/* Flush MAC Table */</div><div class='del'>-	gswip_switch_mask(priv, 0, GSWIP_PCE_GCTRL_0_MTFL, GSWIP_PCE_GCTRL_0);</div><div class='del'>-</div><div class='del'>-	err = gswip_switch_r_timeout(priv, GSWIP_PCE_GCTRL_0,</div><div class='del'>-				     GSWIP_PCE_GCTRL_0_MTFL);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(priv-&gt;dev, "MAC flushing didn't finish\n");</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ds-&gt;mtu_enforcement_ingress = true;</div><div class='del'>-</div><div class='del'>-	ds-&gt;configure_vlan_while_not_filtering = false;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static enum dsa_tag_protocol gswip_get_tag_protocol(struct dsa_switch *ds,</div><div class='del'>-						    int port,</div><div class='del'>-						    enum dsa_tag_protocol mp)</div><div class='del'>-{</div><div class='del'>-	return DSA_TAG_PROTO_GSWIP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_vlan_active_create(struct gswip_priv *priv,</div><div class='del'>-				    struct net_device *bridge,</div><div class='del'>-				    int fid, u16 vid)</div><div class='del'>-{</div><div class='del'>-	struct gswip_pce_table_entry vlan_active = {0,};</div><div class='del'>-	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='del'>-	int idx = -1;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Look for a free slot */</div><div class='del'>-	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='del'>-		if (!priv-&gt;vlans[i].bridge) {</div><div class='del'>-			idx = i;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (idx == -1)</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-</div><div class='del'>-	if (fid == -1)</div><div class='del'>-		fid = idx;</div><div class='del'>-</div><div class='del'>-	vlan_active.index = idx;</div><div class='del'>-	vlan_active.table = GSWIP_TABLE_ACTIVE_VLAN;</div><div class='del'>-	vlan_active.key[0] = vid;</div><div class='del'>-	vlan_active.val[0] = fid;</div><div class='del'>-	vlan_active.valid = true;</div><div class='del'>-</div><div class='del'>-	err = gswip_pce_table_entry_write(priv, &amp;vlan_active);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(priv-&gt;dev, "failed to write active VLAN: %d\n",	err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;vlans[idx].bridge = bridge;</div><div class='del'>-	priv-&gt;vlans[idx].vid = vid;</div><div class='del'>-	priv-&gt;vlans[idx].fid = fid;</div><div class='del'>-</div><div class='del'>-	return idx;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_vlan_active_remove(struct gswip_priv *priv, int idx)</div><div class='del'>-{</div><div class='del'>-	struct gswip_pce_table_entry vlan_active = {0,};</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	vlan_active.index = idx;</div><div class='del'>-	vlan_active.table = GSWIP_TABLE_ACTIVE_VLAN;</div><div class='del'>-	vlan_active.valid = false;</div><div class='del'>-	err = gswip_pce_table_entry_write(priv, &amp;vlan_active);</div><div class='del'>-	if (err)</div><div class='del'>-		dev_err(priv-&gt;dev, "failed to delete active VLAN: %d\n", err);</div><div class='del'>-	priv-&gt;vlans[idx].bridge = NULL;</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_vlan_add_unaware(struct gswip_priv *priv,</div><div class='del'>-				  struct net_device *bridge, int port)</div><div class='del'>-{</div><div class='del'>-	struct gswip_pce_table_entry vlan_mapping = {0,};</div><div class='del'>-	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='del'>-	unsigned int cpu_port = priv-&gt;hw_info-&gt;cpu_port;</div><div class='del'>-	bool active_vlan_created = false;</div><div class='del'>-	int idx = -1;</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Check if there is already a page for this bridge */</div><div class='del'>-	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='del'>-		if (priv-&gt;vlans[i].bridge == bridge) {</div><div class='del'>-			idx = i;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If this bridge is not programmed yet, add a Active VLAN table</div><div class='del'>-	 * entry in a free slot and prepare the VLAN mapping table entry.</div><div class='del'>-	 */</div><div class='del'>-	if (idx == -1) {</div><div class='del'>-		idx = gswip_vlan_active_create(priv, bridge, -1, 0);</div><div class='del'>-		if (idx &lt; 0)</div><div class='del'>-			return idx;</div><div class='del'>-		active_vlan_created = true;</div><div class='del'>-</div><div class='del'>-		vlan_mapping.index = idx;</div><div class='del'>-		vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='del'>-		/* VLAN ID byte, maps to the VLAN ID of vlan active table */</div><div class='del'>-		vlan_mapping.val[0] = 0;</div><div class='del'>-	} else {</div><div class='del'>-		/* Read the existing VLAN mapping entry from the switch */</div><div class='del'>-		vlan_mapping.index = idx;</div><div class='del'>-		vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='del'>-		err = gswip_pce_table_entry_read(priv, &amp;vlan_mapping);</div><div class='del'>-		if (err) {</div><div class='del'>-			dev_err(priv-&gt;dev, "failed to read VLAN mapping: %d\n",</div><div class='del'>-				err);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Update the VLAN mapping entry and write it to the switch */</div><div class='del'>-	vlan_mapping.val[1] |= BIT(cpu_port);</div><div class='del'>-	vlan_mapping.val[1] |= BIT(port);</div><div class='del'>-	err = gswip_pce_table_entry_write(priv, &amp;vlan_mapping);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(priv-&gt;dev, "failed to write VLAN mapping: %d\n", err);</div><div class='del'>-		/* In case an Active VLAN was creaetd delete it again */</div><div class='del'>-		if (active_vlan_created)</div><div class='del'>-			gswip_vlan_active_remove(priv, idx);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_switch_w(priv, 0, GSWIP_PCE_DEFPVID(port));</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_vlan_add_aware(struct gswip_priv *priv,</div><div class='del'>-				struct net_device *bridge, int port,</div><div class='del'>-				u16 vid, bool untagged,</div><div class='del'>-				bool pvid)</div><div class='del'>-{</div><div class='del'>-	struct gswip_pce_table_entry vlan_mapping = {0,};</div><div class='del'>-	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='del'>-	unsigned int cpu_port = priv-&gt;hw_info-&gt;cpu_port;</div><div class='del'>-	bool active_vlan_created = false;</div><div class='del'>-	int idx = -1;</div><div class='del'>-	int fid = -1;</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Check if there is already a page for this bridge */</div><div class='del'>-	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='del'>-		if (priv-&gt;vlans[i].bridge == bridge) {</div><div class='del'>-			if (fid != -1 &amp;&amp; fid != priv-&gt;vlans[i].fid)</div><div class='del'>-				dev_err(priv-&gt;dev, "one bridge with multiple flow ids\n");</div><div class='del'>-			fid = priv-&gt;vlans[i].fid;</div><div class='del'>-			if (priv-&gt;vlans[i].vid == vid) {</div><div class='del'>-				idx = i;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If this bridge is not programmed yet, add a Active VLAN table</div><div class='del'>-	 * entry in a free slot and prepare the VLAN mapping table entry.</div><div class='del'>-	 */</div><div class='del'>-	if (idx == -1) {</div><div class='del'>-		idx = gswip_vlan_active_create(priv, bridge, fid, vid);</div><div class='del'>-		if (idx &lt; 0)</div><div class='del'>-			return idx;</div><div class='del'>-		active_vlan_created = true;</div><div class='del'>-</div><div class='del'>-		vlan_mapping.index = idx;</div><div class='del'>-		vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='del'>-		/* VLAN ID byte, maps to the VLAN ID of vlan active table */</div><div class='del'>-		vlan_mapping.val[0] = vid;</div><div class='del'>-	} else {</div><div class='del'>-		/* Read the existing VLAN mapping entry from the switch */</div><div class='del'>-		vlan_mapping.index = idx;</div><div class='del'>-		vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='del'>-		err = gswip_pce_table_entry_read(priv, &amp;vlan_mapping);</div><div class='del'>-		if (err) {</div><div class='del'>-			dev_err(priv-&gt;dev, "failed to read VLAN mapping: %d\n",</div><div class='del'>-				err);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vlan_mapping.val[0] = vid;</div><div class='del'>-	/* Update the VLAN mapping entry and write it to the switch */</div><div class='del'>-	vlan_mapping.val[1] |= BIT(cpu_port);</div><div class='del'>-	vlan_mapping.val[2] |= BIT(cpu_port);</div><div class='del'>-	vlan_mapping.val[1] |= BIT(port);</div><div class='del'>-	if (untagged)</div><div class='del'>-		vlan_mapping.val[2] &amp;= ~BIT(port);</div><div class='del'>-	else</div><div class='del'>-		vlan_mapping.val[2] |= BIT(port);</div><div class='del'>-	err = gswip_pce_table_entry_write(priv, &amp;vlan_mapping);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(priv-&gt;dev, "failed to write VLAN mapping: %d\n", err);</div><div class='del'>-		/* In case an Active VLAN was creaetd delete it again */</div><div class='del'>-		if (active_vlan_created)</div><div class='del'>-			gswip_vlan_active_remove(priv, idx);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (pvid)</div><div class='del'>-		gswip_switch_w(priv, idx, GSWIP_PCE_DEFPVID(port));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_vlan_remove(struct gswip_priv *priv,</div><div class='del'>-			     struct net_device *bridge, int port,</div><div class='del'>-			     u16 vid, bool pvid, bool vlan_aware)</div><div class='del'>-{</div><div class='del'>-	struct gswip_pce_table_entry vlan_mapping = {0,};</div><div class='del'>-	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='del'>-	unsigned int cpu_port = priv-&gt;hw_info-&gt;cpu_port;</div><div class='del'>-	int idx = -1;</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Check if there is already a page for this bridge */</div><div class='del'>-	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='del'>-		if (priv-&gt;vlans[i].bridge == bridge &amp;&amp;</div><div class='del'>-		    (!vlan_aware || priv-&gt;vlans[i].vid == vid)) {</div><div class='del'>-			idx = i;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (idx == -1) {</div><div class='del'>-		dev_err(priv-&gt;dev, "bridge to leave does not exists\n");</div><div class='del'>-		return -ENOENT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vlan_mapping.index = idx;</div><div class='del'>-	vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='del'>-	err = gswip_pce_table_entry_read(priv, &amp;vlan_mapping);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(priv-&gt;dev, "failed to read VLAN mapping: %d\n",	err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vlan_mapping.val[1] &amp;= ~BIT(port);</div><div class='del'>-	vlan_mapping.val[2] &amp;= ~BIT(port);</div><div class='del'>-	err = gswip_pce_table_entry_write(priv, &amp;vlan_mapping);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(priv-&gt;dev, "failed to write VLAN mapping: %d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* In case all ports are removed from the bridge, remove the VLAN */</div><div class='del'>-	if ((vlan_mapping.val[1] &amp; ~BIT(cpu_port)) == 0) {</div><div class='del'>-		err = gswip_vlan_active_remove(priv, idx);</div><div class='del'>-		if (err) {</div><div class='del'>-			dev_err(priv-&gt;dev, "failed to write active VLAN: %d\n",</div><div class='del'>-				err);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* GSWIP 2.2 (GRX300) and later program here the VID directly. */</div><div class='del'>-	if (pvid)</div><div class='del'>-		gswip_switch_w(priv, 0, GSWIP_PCE_DEFPVID(port));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='del'>-				  struct dsa_bridge bridge,</div><div class='del'>-				  bool *tx_fwd_offload,</div><div class='del'>-				  struct netlink_ext_ack *extack)</div><div class='del'>-{</div><div class='del'>-	struct net_device *br = bridge.dev;</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* When the bridge uses VLAN filtering we have to configure VLAN</div><div class='del'>-	 * specific bridges. No bridge is configured here.</div><div class='del'>-	 */</div><div class='del'>-	if (!br_vlan_enabled(br)) {</div><div class='del'>-		err = gswip_vlan_add_unaware(priv, br, port);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-		priv-&gt;port_vlan_filter &amp;= ~BIT(port);</div><div class='del'>-	} else {</div><div class='del'>-		priv-&gt;port_vlan_filter |= BIT(port);</div><div class='del'>-	}</div><div class='del'>-	return gswip_add_single_port_br(priv, port, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='del'>-				    struct dsa_bridge bridge)</div><div class='del'>-{</div><div class='del'>-	struct net_device *br = bridge.dev;</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-</div><div class='del'>-	gswip_add_single_port_br(priv, port, true);</div><div class='del'>-</div><div class='del'>-	/* When the bridge uses VLAN filtering we have to configure VLAN</div><div class='del'>-	 * specific bridges. No bridge is configured here.</div><div class='del'>-	 */</div><div class='del'>-	if (!br_vlan_enabled(br))</div><div class='del'>-		gswip_vlan_remove(priv, br, port, 0, true, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_vlan_prepare(struct dsa_switch *ds, int port,</div><div class='del'>-				   const struct switchdev_obj_port_vlan *vlan,</div><div class='del'>-				   struct netlink_ext_ack *extack)</div><div class='del'>-{</div><div class='del'>-	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='del'>-	int pos = max_ports;</div><div class='del'>-	int i, idx = -1;</div><div class='del'>-</div><div class='del'>-	/* We only support VLAN filtering on bridges */</div><div class='del'>-	if (!dsa_is_cpu_port(ds, port) &amp;&amp; !bridge)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	/* Check if there is already a page for this VLAN */</div><div class='del'>-	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='del'>-		if (priv-&gt;vlans[i].bridge == bridge &amp;&amp;</div><div class='del'>-		    priv-&gt;vlans[i].vid == vlan-&gt;vid) {</div><div class='del'>-			idx = i;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If this VLAN is not programmed yet, we have to reserve</div><div class='del'>-	 * one entry in the VLAN table. Make sure we start at the</div><div class='del'>-	 * next position round.</div><div class='del'>-	 */</div><div class='del'>-	if (idx == -1) {</div><div class='del'>-		/* Look for a free slot */</div><div class='del'>-		for (; pos &lt; ARRAY_SIZE(priv-&gt;vlans); pos++) {</div><div class='del'>-			if (!priv-&gt;vlans[pos].bridge) {</div><div class='del'>-				idx = pos;</div><div class='del'>-				pos++;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (idx == -1) {</div><div class='del'>-			NL_SET_ERR_MSG_MOD(extack, "No slot in VLAN table");</div><div class='del'>-			return -ENOSPC;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='del'>-			       const struct switchdev_obj_port_vlan *vlan,</div><div class='del'>-			       struct netlink_ext_ack *extack)</div><div class='del'>-{</div><div class='del'>-	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='del'>-	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = gswip_port_vlan_prepare(ds, port, vlan, extack);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* We have to receive all packets on the CPU port and should not</div><div class='del'>-	 * do any VLAN filtering here. This is also called with bridge</div><div class='del'>-	 * NULL and then we do not know for which bridge to configure</div><div class='del'>-	 * this.</div><div class='del'>-	 */</div><div class='del'>-	if (dsa_is_cpu_port(ds, port))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return gswip_vlan_add_aware(priv, bridge, port, vlan-&gt;vid,</div><div class='del'>-				    untagged, pvid);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='del'>-			       const struct switchdev_obj_port_vlan *vlan)</div><div class='del'>-{</div><div class='del'>-	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='del'>-</div><div class='del'>-	/* We have to receive all packets on the CPU port and should not</div><div class='del'>-	 * do any VLAN filtering here. This is also called with bridge</div><div class='del'>-	 * NULL and then we do not know for which bridge to configure</div><div class='del'>-	 * this.</div><div class='del'>-	 */</div><div class='del'>-	if (dsa_is_cpu_port(ds, port))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return gswip_vlan_remove(priv, bridge, port, vlan-&gt;vid, pvid, true);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_port_fast_age(struct dsa_switch *ds, int port)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	struct gswip_pce_table_entry mac_bridge = {0,};</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 2048; i++) {</div><div class='del'>-		mac_bridge.table = GSWIP_TABLE_MAC_BRIDGE;</div><div class='del'>-		mac_bridge.index = i;</div><div class='del'>-</div><div class='del'>-		err = gswip_pce_table_entry_read(priv, &amp;mac_bridge);</div><div class='del'>-		if (err) {</div><div class='del'>-			dev_err(priv-&gt;dev, "failed to read mac bridge: %d\n",</div><div class='del'>-				err);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!mac_bridge.valid)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (mac_bridge.val[1] &amp; GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (port != FIELD_GET(GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT,</div><div class='del'>-				      mac_bridge.val[0]))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		mac_bridge.valid = false;</div><div class='del'>-		err = gswip_pce_table_entry_write(priv, &amp;mac_bridge);</div><div class='del'>-		if (err) {</div><div class='del'>-			dev_err(priv-&gt;dev, "failed to write mac bridge: %d\n",</div><div class='del'>-				err);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	u32 stp_state;</div><div class='del'>-</div><div class='del'>-	switch (state) {</div><div class='del'>-	case BR_STATE_DISABLED:</div><div class='del'>-		gswip_switch_mask(priv, GSWIP_SDMA_PCTRL_EN, 0,</div><div class='del'>-				  GSWIP_SDMA_PCTRLp(port));</div><div class='del'>-		return;</div><div class='del'>-	case BR_STATE_BLOCKING:</div><div class='del'>-	case BR_STATE_LISTENING:</div><div class='del'>-		stp_state = GSWIP_PCE_PCTRL_0_PSTATE_LISTEN;</div><div class='del'>-		break;</div><div class='del'>-	case BR_STATE_LEARNING:</div><div class='del'>-		stp_state = GSWIP_PCE_PCTRL_0_PSTATE_LEARNING;</div><div class='del'>-		break;</div><div class='del'>-	case BR_STATE_FORWARDING:</div><div class='del'>-		stp_state = GSWIP_PCE_PCTRL_0_PSTATE_FORWARDING;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(priv-&gt;dev, "invalid STP state: %d\n", state);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_switch_mask(priv, 0, GSWIP_SDMA_PCTRL_EN,</div><div class='del'>-			  GSWIP_SDMA_PCTRLp(port));</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_PCE_PCTRL_0_PSTATE_MASK, stp_state,</div><div class='del'>-			  GSWIP_PCE_PCTRL_0p(port));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_fdb(struct dsa_switch *ds, int port,</div><div class='del'>-			  const unsigned char *addr, u16 vid, bool add)</div><div class='del'>-{</div><div class='del'>-	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	struct gswip_pce_table_entry mac_bridge = {0,};</div><div class='del'>-	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='del'>-	int fid = -1;</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!bridge)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='del'>-		if (priv-&gt;vlans[i].bridge == bridge) {</div><div class='del'>-			fid = priv-&gt;vlans[i].fid;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (fid == -1) {</div><div class='del'>-		dev_err(priv-&gt;dev, "no FID found for bridge %s\n",</div><div class='del'>-			bridge-&gt;name);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mac_bridge.table = GSWIP_TABLE_MAC_BRIDGE;</div><div class='del'>-	mac_bridge.key_mode = true;</div><div class='del'>-	mac_bridge.key[0] = addr[5] | (addr[4] &lt;&lt; 8);</div><div class='del'>-	mac_bridge.key[1] = addr[3] | (addr[2] &lt;&lt; 8);</div><div class='del'>-	mac_bridge.key[2] = addr[1] | (addr[0] &lt;&lt; 8);</div><div class='del'>-	mac_bridge.key[3] = FIELD_PREP(GSWIP_TABLE_MAC_BRIDGE_KEY3_FID, fid);</div><div class='del'>-	mac_bridge.val[0] = add ? BIT(port) : 0; /* port map */</div><div class='del'>-	mac_bridge.val[1] = GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC;</div><div class='del'>-	mac_bridge.valid = add;</div><div class='del'>-</div><div class='del'>-	err = gswip_pce_table_entry_write(priv, &amp;mac_bridge);</div><div class='del'>-	if (err)</div><div class='del'>-		dev_err(priv-&gt;dev, "failed to write mac bridge: %d\n", err);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='del'>-			      const unsigned char *addr, u16 vid,</div><div class='del'>-			      struct dsa_db db)</div><div class='del'>-{</div><div class='del'>-	return gswip_port_fdb(ds, port, addr, vid, true);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='del'>-			      const unsigned char *addr, u16 vid,</div><div class='del'>-			      struct dsa_db db)</div><div class='del'>-{</div><div class='del'>-	return gswip_port_fdb(ds, port, addr, vid, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='del'>-			       dsa_fdb_dump_cb_t *cb, void *data)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	struct gswip_pce_table_entry mac_bridge = {0,};</div><div class='del'>-	unsigned char addr[ETH_ALEN];</div><div class='del'>-	int i;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 2048; i++) {</div><div class='del'>-		mac_bridge.table = GSWIP_TABLE_MAC_BRIDGE;</div><div class='del'>-		mac_bridge.index = i;</div><div class='del'>-</div><div class='del'>-		err = gswip_pce_table_entry_read(priv, &amp;mac_bridge);</div><div class='del'>-		if (err) {</div><div class='del'>-			dev_err(priv-&gt;dev,</div><div class='del'>-				"failed to read mac bridge entry %d: %d\n",</div><div class='del'>-				i, err);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!mac_bridge.valid)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		addr[5] = mac_bridge.key[0] &amp; 0xff;</div><div class='del'>-		addr[4] = (mac_bridge.key[0] &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-		addr[3] = mac_bridge.key[1] &amp; 0xff;</div><div class='del'>-		addr[2] = (mac_bridge.key[1] &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-		addr[1] = mac_bridge.key[2] &amp; 0xff;</div><div class='del'>-		addr[0] = (mac_bridge.key[2] &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-		if (mac_bridge.val[1] &amp; GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC) {</div><div class='del'>-			if (mac_bridge.val[0] &amp; BIT(port)) {</div><div class='del'>-				err = cb(addr, 0, true, data);</div><div class='del'>-				if (err)</div><div class='del'>-					return err;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			if (port == FIELD_GET(GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT,</div><div class='del'>-					      mac_bridge.val[0])) {</div><div class='del'>-				err = cb(addr, 0, false, data);</div><div class='del'>-				if (err)</div><div class='del'>-					return err;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_max_mtu(struct dsa_switch *ds, int port)</div><div class='del'>-{</div><div class='del'>-	/* Includes 8 bytes for special header. */</div><div class='del'>-	return GSWIP_MAX_PACKET_LENGTH - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-</div><div class='del'>-	/* CPU port always has maximum mtu of user ports, so use it to set</div><div class='del'>-	 * switch frame size, including 8 byte special header.</div><div class='del'>-	 */</div><div class='del'>-	if (dsa_is_cpu_port(ds, port)) {</div><div class='del'>-		new_mtu += 8;</div><div class='del'>-		gswip_switch_w(priv, VLAN_ETH_HLEN + new_mtu + ETH_FCS_LEN,</div><div class='del'>-			       GSWIP_MAC_FLEN);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Enable MLEN for ports with non-standard MTUs, including the special</div><div class='del'>-	 * header on the CPU port added above.</div><div class='del'>-	 */</div><div class='del'>-	if (new_mtu != ETH_DATA_LEN)</div><div class='del'>-		gswip_switch_mask(priv, 0, GSWIP_MAC_CTRL_2_MLEN,</div><div class='del'>-				  GSWIP_MAC_CTRL_2p(port));</div><div class='del'>-	else</div><div class='del'>-		gswip_switch_mask(priv, GSWIP_MAC_CTRL_2_MLEN, 0,</div><div class='del'>-				  GSWIP_MAC_CTRL_2p(port));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_xrx200_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='del'>-					  struct phylink_config *config)</div><div class='del'>-{</div><div class='del'>-	switch (port) {</div><div class='del'>-	case 0:</div><div class='del'>-	case 1:</div><div class='del'>-		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='del'>-		__set_bit(PHY_INTERFACE_MODE_MII,</div><div class='del'>-			  config-&gt;supported_interfaces);</div><div class='del'>-		__set_bit(PHY_INTERFACE_MODE_REVMII,</div><div class='del'>-			  config-&gt;supported_interfaces);</div><div class='del'>-		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='del'>-			  config-&gt;supported_interfaces);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case 2:</div><div class='del'>-	case 3:</div><div class='del'>-	case 4:</div><div class='del'>-	case 6:</div><div class='del'>-		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='del'>-			  config-&gt;supported_interfaces);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case 5:</div><div class='del'>-		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='del'>-		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='del'>-			  config-&gt;supported_interfaces);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='del'>-		MAC_10 | MAC_100 | MAC_1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_xrx300_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='del'>-					  struct phylink_config *config)</div><div class='del'>-{</div><div class='del'>-	switch (port) {</div><div class='del'>-	case 0:</div><div class='del'>-		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='del'>-		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='del'>-			  config-&gt;supported_interfaces);</div><div class='del'>-		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='del'>-			  config-&gt;supported_interfaces);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case 1:</div><div class='del'>-	case 2:</div><div class='del'>-	case 3:</div><div class='del'>-	case 4:</div><div class='del'>-	case 6:</div><div class='del'>-		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='del'>-			  config-&gt;supported_interfaces);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case 5:</div><div class='del'>-		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='del'>-		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='del'>-			  config-&gt;supported_interfaces);</div><div class='del'>-		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='del'>-			  config-&gt;supported_interfaces);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='del'>-		MAC_10 | MAC_100 | MAC_1000;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_port_set_link(struct gswip_priv *priv, int port, bool link)</div><div class='del'>-{</div><div class='del'>-	u32 mdio_phy;</div><div class='del'>-</div><div class='del'>-	if (link)</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_LINK_UP;</div><div class='del'>-	else</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_LINK_DOWN;</div><div class='del'>-</div><div class='del'>-	gswip_mdio_mask(priv, GSWIP_MDIO_PHY_LINK_MASK, mdio_phy,</div><div class='del'>-			GSWIP_MDIO_PHYp(port));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_port_set_speed(struct gswip_priv *priv, int port, int speed,</div><div class='del'>-				 phy_interface_t interface)</div><div class='del'>-{</div><div class='del'>-	u32 mdio_phy = 0, mii_cfg = 0, mac_ctrl_0 = 0;</div><div class='del'>-</div><div class='del'>-	switch (speed) {</div><div class='del'>-	case SPEED_10:</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_SPEED_M10;</div><div class='del'>-</div><div class='del'>-		if (interface == PHY_INTERFACE_MODE_RMII)</div><div class='del'>-			mii_cfg = GSWIP_MII_CFG_RATE_M50;</div><div class='del'>-		else</div><div class='del'>-			mii_cfg = GSWIP_MII_CFG_RATE_M2P5;</div><div class='del'>-</div><div class='del'>-		mac_ctrl_0 = GSWIP_MAC_CTRL_0_GMII_MII;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPEED_100:</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_SPEED_M100;</div><div class='del'>-</div><div class='del'>-		if (interface == PHY_INTERFACE_MODE_RMII)</div><div class='del'>-			mii_cfg = GSWIP_MII_CFG_RATE_M50;</div><div class='del'>-		else</div><div class='del'>-			mii_cfg = GSWIP_MII_CFG_RATE_M25;</div><div class='del'>-</div><div class='del'>-		mac_ctrl_0 = GSWIP_MAC_CTRL_0_GMII_MII;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPEED_1000:</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_SPEED_G1;</div><div class='del'>-</div><div class='del'>-		mii_cfg = GSWIP_MII_CFG_RATE_M125;</div><div class='del'>-</div><div class='del'>-		mac_ctrl_0 = GSWIP_MAC_CTRL_0_GMII_RGMII;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_mdio_mask(priv, GSWIP_MDIO_PHY_SPEED_MASK, mdio_phy,</div><div class='del'>-			GSWIP_MDIO_PHYp(port));</div><div class='del'>-	gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_RATE_MASK, mii_cfg, port);</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_MAC_CTRL_0_GMII_MASK, mac_ctrl_0,</div><div class='del'>-			  GSWIP_MAC_CTRL_0p(port));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_port_set_duplex(struct gswip_priv *priv, int port, int duplex)</div><div class='del'>-{</div><div class='del'>-	u32 mac_ctrl_0, mdio_phy;</div><div class='del'>-</div><div class='del'>-	if (duplex == DUPLEX_FULL) {</div><div class='del'>-		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FDUP_EN;</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_FDUP_EN;</div><div class='del'>-	} else {</div><div class='del'>-		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FDUP_DIS;</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_FDUP_DIS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_MAC_CTRL_0_FDUP_MASK, mac_ctrl_0,</div><div class='del'>-			  GSWIP_MAC_CTRL_0p(port));</div><div class='del'>-	gswip_mdio_mask(priv, GSWIP_MDIO_PHY_FDUP_MASK, mdio_phy,</div><div class='del'>-			GSWIP_MDIO_PHYp(port));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_port_set_pause(struct gswip_priv *priv, int port,</div><div class='del'>-				 bool tx_pause, bool rx_pause)</div><div class='del'>-{</div><div class='del'>-	u32 mac_ctrl_0, mdio_phy;</div><div class='del'>-</div><div class='del'>-	if (tx_pause &amp;&amp; rx_pause) {</div><div class='del'>-		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_RXTX;</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_FCONTX_EN |</div><div class='del'>-			   GSWIP_MDIO_PHY_FCONRX_EN;</div><div class='del'>-	} else if (tx_pause) {</div><div class='del'>-		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_TX;</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_FCONTX_EN |</div><div class='del'>-			   GSWIP_MDIO_PHY_FCONRX_DIS;</div><div class='del'>-	} else if (rx_pause) {</div><div class='del'>-		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_RX;</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_FCONTX_DIS |</div><div class='del'>-			   GSWIP_MDIO_PHY_FCONRX_EN;</div><div class='del'>-	} else {</div><div class='del'>-		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_NONE;</div><div class='del'>-		mdio_phy = GSWIP_MDIO_PHY_FCONTX_DIS |</div><div class='del'>-			   GSWIP_MDIO_PHY_FCONRX_DIS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_MAC_CTRL_0_FCON_MASK,</div><div class='del'>-			  mac_ctrl_0, GSWIP_MAC_CTRL_0p(port));</div><div class='del'>-	gswip_mdio_mask(priv,</div><div class='del'>-			GSWIP_MDIO_PHY_FCONTX_MASK |</div><div class='del'>-			GSWIP_MDIO_PHY_FCONRX_MASK,</div><div class='del'>-			mdio_phy, GSWIP_MDIO_PHYp(port));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_phylink_mac_config(struct phylink_config *config,</div><div class='del'>-				     unsigned int mode,</div><div class='del'>-				     const struct phylink_link_state *state)</div><div class='del'>-{</div><div class='del'>-	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='del'>-	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='del'>-	int port = dp-&gt;index;</div><div class='del'>-	u32 miicfg = 0;</div><div class='del'>-</div><div class='del'>-	miicfg |= GSWIP_MII_CFG_LDCLKDIS;</div><div class='del'>-</div><div class='del'>-	switch (state-&gt;interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_MII:</div><div class='del'>-	case PHY_INTERFACE_MODE_INTERNAL:</div><div class='del'>-		miicfg |= GSWIP_MII_CFG_MODE_MIIM;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_REVMII:</div><div class='del'>-		miicfg |= GSWIP_MII_CFG_MODE_MIIP;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		miicfg |= GSWIP_MII_CFG_MODE_RMIIM;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		miicfg |= GSWIP_MII_CFG_MODE_RGMII;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_GMII:</div><div class='del'>-		miicfg |= GSWIP_MII_CFG_MODE_GMII;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dp-&gt;ds-&gt;dev,</div><div class='del'>-			"Unsupported interface: %d\n", state-&gt;interface);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_mii_mask_cfg(priv,</div><div class='del'>-			   GSWIP_MII_CFG_MODE_MASK | GSWIP_MII_CFG_RMII_CLK |</div><div class='del'>-			   GSWIP_MII_CFG_RGMII_IBS | GSWIP_MII_CFG_LDCLKDIS,</div><div class='del'>-			   miicfg, port);</div><div class='del'>-</div><div class='del'>-	switch (state-&gt;interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-		gswip_mii_mask_pcdu(priv, GSWIP_MII_PCDU_TXDLY_MASK |</div><div class='del'>-					  GSWIP_MII_PCDU_RXDLY_MASK, 0, port);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-		gswip_mii_mask_pcdu(priv, GSWIP_MII_PCDU_RXDLY_MASK, 0, port);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		gswip_mii_mask_pcdu(priv, GSWIP_MII_PCDU_TXDLY_MASK, 0, port);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_phylink_mac_link_down(struct phylink_config *config,</div><div class='del'>-					unsigned int mode,</div><div class='del'>-					phy_interface_t interface)</div><div class='del'>-{</div><div class='del'>-	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='del'>-	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='del'>-	int port = dp-&gt;index;</div><div class='del'>-</div><div class='del'>-	gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_EN, 0, port);</div><div class='del'>-</div><div class='del'>-	if (!dsa_port_is_cpu(dp))</div><div class='del'>-		gswip_port_set_link(priv, port, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_phylink_mac_link_up(struct phylink_config *config,</div><div class='del'>-				      struct phy_device *phydev,</div><div class='del'>-				      unsigned int mode,</div><div class='del'>-				      phy_interface_t interface,</div><div class='del'>-				      int speed, int duplex,</div><div class='del'>-				      bool tx_pause, bool rx_pause)</div><div class='del'>-{</div><div class='del'>-	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='del'>-	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='del'>-	int port = dp-&gt;index;</div><div class='del'>-</div><div class='del'>-	if (!dsa_port_is_cpu(dp)) {</div><div class='del'>-		gswip_port_set_link(priv, port, true);</div><div class='del'>-		gswip_port_set_speed(priv, port, speed, interface);</div><div class='del'>-		gswip_port_set_duplex(priv, port, duplex);</div><div class='del'>-		gswip_port_set_pause(priv, port, tx_pause, rx_pause);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gswip_mii_mask_cfg(priv, 0, GSWIP_MII_CFG_EN, port);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='del'>-			      uint8_t *data)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (stringset != ETH_SS_STATS)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(gswip_rmon_cnt); i++)</div><div class='del'>-		ethtool_puts(&amp;data, gswip_rmon_cnt[i].name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 gswip_bcm_ram_entry_read(struct gswip_priv *priv, u32 table,</div><div class='del'>-				    u32 index)</div><div class='del'>-{</div><div class='del'>-	u32 result;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	gswip_switch_w(priv, index, GSWIP_BM_RAM_ADDR);</div><div class='del'>-	gswip_switch_mask(priv, GSWIP_BM_RAM_CTRL_ADDR_MASK |</div><div class='del'>-				GSWIP_BM_RAM_CTRL_OPMOD,</div><div class='del'>-			      table | GSWIP_BM_RAM_CTRL_BAS,</div><div class='del'>-			      GSWIP_BM_RAM_CTRL);</div><div class='del'>-</div><div class='del'>-	err = gswip_switch_r_timeout(priv, GSWIP_BM_RAM_CTRL,</div><div class='del'>-				     GSWIP_BM_RAM_CTRL_BAS);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(priv-&gt;dev, "timeout while reading table: %u, index: %u\n",</div><div class='del'>-			table, index);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	result = gswip_switch_r(priv, GSWIP_BM_RAM_VAL(0));</div><div class='del'>-	result |= gswip_switch_r(priv, GSWIP_BM_RAM_VAL(1)) &lt;&lt; 16;</div><div class='del'>-</div><div class='del'>-	return result;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='del'>-				    uint64_t *data)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = ds-&gt;priv;</div><div class='del'>-	const struct gswip_rmon_cnt_desc *rmon_cnt;</div><div class='del'>-	int i;</div><div class='del'>-	u64 high;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(gswip_rmon_cnt); i++) {</div><div class='del'>-		rmon_cnt = &amp;gswip_rmon_cnt[i];</div><div class='del'>-</div><div class='del'>-		data[i] = gswip_bcm_ram_entry_read(priv, port,</div><div class='del'>-						   rmon_cnt-&gt;offset);</div><div class='del'>-		if (rmon_cnt-&gt;size == 2) {</div><div class='del'>-			high = gswip_bcm_ram_entry_read(priv, port,</div><div class='del'>-							rmon_cnt-&gt;offset + 1);</div><div class='del'>-			data[i] |= high &lt;&lt; 32;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='del'>-{</div><div class='del'>-	if (sset != ETH_SS_STATS)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return ARRAY_SIZE(gswip_rmon_cnt);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct phylink_mac_ops gswip_phylink_mac_ops = {</div><div class='del'>-	.mac_config	= gswip_phylink_mac_config,</div><div class='del'>-	.mac_link_down	= gswip_phylink_mac_link_down,</div><div class='del'>-	.mac_link_up	= gswip_phylink_mac_link_up,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct dsa_switch_ops gswip_xrx200_switch_ops = {</div><div class='del'>-	.get_tag_protocol	= gswip_get_tag_protocol,</div><div class='del'>-	.setup			= gswip_setup,</div><div class='del'>-	.port_enable		= gswip_port_enable,</div><div class='del'>-	.port_disable		= gswip_port_disable,</div><div class='del'>-	.port_bridge_join	= gswip_port_bridge_join,</div><div class='del'>-	.port_bridge_leave	= gswip_port_bridge_leave,</div><div class='del'>-	.port_fast_age		= gswip_port_fast_age,</div><div class='del'>-	.port_vlan_filtering	= gswip_port_vlan_filtering,</div><div class='del'>-	.port_vlan_add		= gswip_port_vlan_add,</div><div class='del'>-	.port_vlan_del		= gswip_port_vlan_del,</div><div class='del'>-	.port_stp_state_set	= gswip_port_stp_state_set,</div><div class='del'>-	.port_fdb_add		= gswip_port_fdb_add,</div><div class='del'>-	.port_fdb_del		= gswip_port_fdb_del,</div><div class='del'>-	.port_fdb_dump		= gswip_port_fdb_dump,</div><div class='del'>-	.port_change_mtu	= gswip_port_change_mtu,</div><div class='del'>-	.port_max_mtu		= gswip_port_max_mtu,</div><div class='del'>-	.phylink_get_caps	= gswip_xrx200_phylink_get_caps,</div><div class='del'>-	.get_strings		= gswip_get_strings,</div><div class='del'>-	.get_ethtool_stats	= gswip_get_ethtool_stats,</div><div class='del'>-	.get_sset_count		= gswip_get_sset_count,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct dsa_switch_ops gswip_xrx300_switch_ops = {</div><div class='del'>-	.get_tag_protocol	= gswip_get_tag_protocol,</div><div class='del'>-	.setup			= gswip_setup,</div><div class='del'>-	.port_enable		= gswip_port_enable,</div><div class='del'>-	.port_disable		= gswip_port_disable,</div><div class='del'>-	.port_bridge_join	= gswip_port_bridge_join,</div><div class='del'>-	.port_bridge_leave	= gswip_port_bridge_leave,</div><div class='del'>-	.port_fast_age		= gswip_port_fast_age,</div><div class='del'>-	.port_vlan_filtering	= gswip_port_vlan_filtering,</div><div class='del'>-	.port_vlan_add		= gswip_port_vlan_add,</div><div class='del'>-	.port_vlan_del		= gswip_port_vlan_del,</div><div class='del'>-	.port_stp_state_set	= gswip_port_stp_state_set,</div><div class='del'>-	.port_fdb_add		= gswip_port_fdb_add,</div><div class='del'>-	.port_fdb_del		= gswip_port_fdb_del,</div><div class='del'>-	.port_fdb_dump		= gswip_port_fdb_dump,</div><div class='del'>-	.port_change_mtu	= gswip_port_change_mtu,</div><div class='del'>-	.port_max_mtu		= gswip_port_max_mtu,</div><div class='del'>-	.phylink_get_caps	= gswip_xrx300_phylink_get_caps,</div><div class='del'>-	.get_strings		= gswip_get_strings,</div><div class='del'>-	.get_ethtool_stats	= gswip_get_ethtool_stats,</div><div class='del'>-	.get_sset_count		= gswip_get_sset_count,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct xway_gphy_match_data xrx200a1x_gphy_data = {</div><div class='del'>-	.fe_firmware_name = "lantiq/xrx200_phy22f_a14.bin",</div><div class='del'>-	.ge_firmware_name = "lantiq/xrx200_phy11g_a14.bin",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct xway_gphy_match_data xrx200a2x_gphy_data = {</div><div class='del'>-	.fe_firmware_name = "lantiq/xrx200_phy22f_a22.bin",</div><div class='del'>-	.ge_firmware_name = "lantiq/xrx200_phy11g_a22.bin",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct xway_gphy_match_data xrx300_gphy_data = {</div><div class='del'>-	.fe_firmware_name = "lantiq/xrx300_phy22f_a21.bin",</div><div class='del'>-	.ge_firmware_name = "lantiq/xrx300_phy11g_a21.bin",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct of_device_id xway_gphy_match[] __maybe_unused = {</div><div class='del'>-	{ .compatible = "lantiq,xrx200-gphy-fw", .data = NULL },</div><div class='del'>-	{ .compatible = "lantiq,xrx200a1x-gphy-fw", .data = &amp;xrx200a1x_gphy_data },</div><div class='del'>-	{ .compatible = "lantiq,xrx200a2x-gphy-fw", .data = &amp;xrx200a2x_gphy_data },</div><div class='del'>-	{ .compatible = "lantiq,xrx300-gphy-fw", .data = &amp;xrx300_gphy_data },</div><div class='del'>-	{ .compatible = "lantiq,xrx330-gphy-fw", .data = &amp;xrx300_gphy_data },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int gswip_gphy_fw_load(struct gswip_priv *priv, struct gswip_gphy_fw *gphy_fw)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = priv-&gt;dev;</div><div class='del'>-	const struct firmware *fw;</div><div class='del'>-	void *fw_addr;</div><div class='del'>-	dma_addr_t dma_addr;</div><div class='del'>-	dma_addr_t dev_addr;</div><div class='del'>-	size_t size;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = clk_prepare_enable(gphy_fw-&gt;clk_gate);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	reset_control_assert(gphy_fw-&gt;reset);</div><div class='del'>-</div><div class='del'>-	/* The vendor BSP uses a 200ms delay after asserting the reset line.</div><div class='del'>-	 * Without this some users are observing that the PHY is not coming up</div><div class='del'>-	 * on the MDIO bus.</div><div class='del'>-	 */</div><div class='del'>-	msleep(200);</div><div class='del'>-</div><div class='del'>-	ret = request_firmware(&amp;fw, gphy_fw-&gt;fw_name, dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return dev_err_probe(dev, ret, "failed to load firmware: %s\n",</div><div class='del'>-				     gphy_fw-&gt;fw_name);</div><div class='del'>-</div><div class='del'>-	/* GPHY cores need the firmware code in a persistent and contiguous</div><div class='del'>-	 * memory area with a 16 kB boundary aligned start address.</div><div class='del'>-	 */</div><div class='del'>-	size = fw-&gt;size + XRX200_GPHY_FW_ALIGN;</div><div class='del'>-</div><div class='del'>-	fw_addr = dmam_alloc_coherent(dev, size, &amp;dma_addr, GFP_KERNEL);</div><div class='del'>-	if (fw_addr) {</div><div class='del'>-		fw_addr = PTR_ALIGN(fw_addr, XRX200_GPHY_FW_ALIGN);</div><div class='del'>-		dev_addr = ALIGN(dma_addr, XRX200_GPHY_FW_ALIGN);</div><div class='del'>-		memcpy(fw_addr, fw-&gt;data, fw-&gt;size);</div><div class='del'>-	} else {</div><div class='del'>-		release_firmware(fw);</div><div class='del'>-		return dev_err_probe(dev, -ENOMEM,</div><div class='del'>-				     "failed to alloc firmware memory\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	release_firmware(fw);</div><div class='del'>-</div><div class='del'>-	ret = regmap_write(priv-&gt;rcu_regmap, gphy_fw-&gt;fw_addr_offset, dev_addr);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	reset_control_deassert(gphy_fw-&gt;reset);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_gphy_fw_probe(struct gswip_priv *priv,</div><div class='del'>-			       struct gswip_gphy_fw *gphy_fw,</div><div class='del'>-			       struct device_node *gphy_fw_np, int i)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = priv-&gt;dev;</div><div class='del'>-	u32 gphy_mode;</div><div class='del'>-	int ret;</div><div class='del'>-	char gphyname[10];</div><div class='del'>-</div><div class='del'>-	snprintf(gphyname, sizeof(gphyname), "gphy%d", i);</div><div class='del'>-</div><div class='del'>-	gphy_fw-&gt;clk_gate = devm_clk_get(dev, gphyname);</div><div class='del'>-	if (IS_ERR(gphy_fw-&gt;clk_gate)) {</div><div class='del'>-		return dev_err_probe(dev, PTR_ERR(gphy_fw-&gt;clk_gate),</div><div class='del'>-				     "Failed to lookup gate clock\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = of_property_read_u32(gphy_fw_np, "reg", &amp;gphy_fw-&gt;fw_addr_offset);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = of_property_read_u32(gphy_fw_np, "lantiq,gphy-mode", &amp;gphy_mode);</div><div class='del'>-	/* Default to GE mode */</div><div class='del'>-	if (ret)</div><div class='del'>-		gphy_mode = GPHY_MODE_GE;</div><div class='del'>-</div><div class='del'>-	switch (gphy_mode) {</div><div class='del'>-	case GPHY_MODE_FE:</div><div class='del'>-		gphy_fw-&gt;fw_name = priv-&gt;gphy_fw_name_cfg-&gt;fe_firmware_name;</div><div class='del'>-		break;</div><div class='del'>-	case GPHY_MODE_GE:</div><div class='del'>-		gphy_fw-&gt;fw_name = priv-&gt;gphy_fw_name_cfg-&gt;ge_firmware_name;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return dev_err_probe(dev, -EINVAL, "Unknown GPHY mode %d\n",</div><div class='del'>-				     gphy_mode);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	gphy_fw-&gt;reset = of_reset_control_array_get_exclusive(gphy_fw_np);</div><div class='del'>-	if (IS_ERR(gphy_fw-&gt;reset))</div><div class='del'>-		return dev_err_probe(dev, PTR_ERR(gphy_fw-&gt;reset),</div><div class='del'>-				     "Failed to lookup gphy reset\n");</div><div class='del'>-</div><div class='del'>-	return gswip_gphy_fw_load(priv, gphy_fw);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_gphy_fw_remove(struct gswip_priv *priv,</div><div class='del'>-				 struct gswip_gphy_fw *gphy_fw)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* check if the device was fully probed */</div><div class='del'>-	if (!gphy_fw-&gt;fw_name)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ret = regmap_write(priv-&gt;rcu_regmap, gphy_fw-&gt;fw_addr_offset, 0);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_err(priv-&gt;dev, "can not reset GPHY FW pointer\n");</div><div class='del'>-</div><div class='del'>-	clk_disable_unprepare(gphy_fw-&gt;clk_gate);</div><div class='del'>-</div><div class='del'>-	reset_control_put(gphy_fw-&gt;reset);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_gphy_fw_list(struct gswip_priv *priv,</div><div class='del'>-			      struct device_node *gphy_fw_list_np, u32 version)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = priv-&gt;dev;</div><div class='del'>-	struct device_node *gphy_fw_np;</div><div class='del'>-	const struct of_device_id *match;</div><div class='del'>-	int err;</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	/* The VRX200 rev 1.1 uses the GSWIP 2.0 and needs the older</div><div class='del'>-	 * GPHY firmware. The VRX200 rev 1.2 uses the GSWIP 2.1 and also</div><div class='del'>-	 * needs a different GPHY firmware.</div><div class='del'>-	 */</div><div class='del'>-	if (of_device_is_compatible(gphy_fw_list_np, "lantiq,xrx200-gphy-fw")) {</div><div class='del'>-		switch (version) {</div><div class='del'>-		case GSWIP_VERSION_2_0:</div><div class='del'>-			priv-&gt;gphy_fw_name_cfg = &amp;xrx200a1x_gphy_data;</div><div class='del'>-			break;</div><div class='del'>-		case GSWIP_VERSION_2_1:</div><div class='del'>-			priv-&gt;gphy_fw_name_cfg = &amp;xrx200a2x_gphy_data;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			return dev_err_probe(dev, -ENOENT,</div><div class='del'>-					     "unknown GSWIP version: 0x%x\n",</div><div class='del'>-					     version);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	match = of_match_node(xway_gphy_match, gphy_fw_list_np);</div><div class='del'>-	if (match &amp;&amp; match-&gt;data)</div><div class='del'>-		priv-&gt;gphy_fw_name_cfg = match-&gt;data;</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;gphy_fw_name_cfg)</div><div class='del'>-		return dev_err_probe(dev, -ENOENT,</div><div class='del'>-				     "GPHY compatible type not supported\n");</div><div class='del'>-</div><div class='del'>-	priv-&gt;num_gphy_fw = of_get_available_child_count(gphy_fw_list_np);</div><div class='del'>-	if (!priv-&gt;num_gphy_fw)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	priv-&gt;rcu_regmap = syscon_regmap_lookup_by_phandle(gphy_fw_list_np,</div><div class='del'>-							   "lantiq,rcu");</div><div class='del'>-	if (IS_ERR(priv-&gt;rcu_regmap))</div><div class='del'>-		return PTR_ERR(priv-&gt;rcu_regmap);</div><div class='del'>-</div><div class='del'>-	priv-&gt;gphy_fw = devm_kmalloc_array(dev, priv-&gt;num_gphy_fw,</div><div class='del'>-					   sizeof(*priv-&gt;gphy_fw),</div><div class='del'>-					   GFP_KERNEL | __GFP_ZERO);</div><div class='del'>-	if (!priv-&gt;gphy_fw)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for_each_available_child_of_node(gphy_fw_list_np, gphy_fw_np) {</div><div class='del'>-		err = gswip_gphy_fw_probe(priv, &amp;priv-&gt;gphy_fw[i],</div><div class='del'>-					  gphy_fw_np, i);</div><div class='del'>-		if (err) {</div><div class='del'>-			of_node_put(gphy_fw_np);</div><div class='del'>-			goto remove_gphy;</div><div class='del'>-		}</div><div class='del'>-		i++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* The standalone PHY11G requires 300ms to be fully</div><div class='del'>-	 * initialized and ready for any MDIO communication after being</div><div class='del'>-	 * taken out of reset. For the SoC-internal GPHY variant there</div><div class='del'>-	 * is no (known) documentation for the minimum time after a</div><div class='del'>-	 * reset. Use the same value as for the standalone variant as</div><div class='del'>-	 * some users have reported internal PHYs not being detected</div><div class='del'>-	 * without any delay.</div><div class='del'>-	 */</div><div class='del'>-	msleep(300);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-remove_gphy:</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;num_gphy_fw; i++)</div><div class='del'>-		gswip_gphy_fw_remove(priv, &amp;priv-&gt;gphy_fw[i]);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gswip_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct device_node *np, *gphy_fw_np;</div><div class='del'>-	struct device *dev = &amp;pdev-&gt;dev;</div><div class='del'>-	struct gswip_priv *priv;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='del'>-	u32 version;</div><div class='del'>-</div><div class='del'>-	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='del'>-	if (!priv)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	priv-&gt;gswip = devm_platform_ioremap_resource(pdev, 0);</div><div class='del'>-	if (IS_ERR(priv-&gt;gswip))</div><div class='del'>-		return PTR_ERR(priv-&gt;gswip);</div><div class='del'>-</div><div class='del'>-	priv-&gt;mdio = devm_platform_ioremap_resource(pdev, 1);</div><div class='del'>-	if (IS_ERR(priv-&gt;mdio))</div><div class='del'>-		return PTR_ERR(priv-&gt;mdio);</div><div class='del'>-</div><div class='del'>-	priv-&gt;mii = devm_platform_ioremap_resource(pdev, 2);</div><div class='del'>-	if (IS_ERR(priv-&gt;mii))</div><div class='del'>-		return PTR_ERR(priv-&gt;mii);</div><div class='del'>-</div><div class='del'>-	priv-&gt;hw_info = of_device_get_match_data(dev);</div><div class='del'>-	if (!priv-&gt;hw_info)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	priv-&gt;ds = devm_kzalloc(dev, sizeof(*priv-&gt;ds), GFP_KERNEL);</div><div class='del'>-	if (!priv-&gt;ds)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	priv-&gt;ds-&gt;dev = dev;</div><div class='del'>-	priv-&gt;ds-&gt;num_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='del'>-	priv-&gt;ds-&gt;priv = priv;</div><div class='del'>-	priv-&gt;ds-&gt;ops = priv-&gt;hw_info-&gt;ops;</div><div class='del'>-	priv-&gt;ds-&gt;phylink_mac_ops = &amp;gswip_phylink_mac_ops;</div><div class='del'>-	priv-&gt;dev = dev;</div><div class='del'>-	mutex_init(&amp;priv-&gt;pce_table_lock);</div><div class='del'>-	version = gswip_switch_r(priv, GSWIP_VERSION);</div><div class='del'>-</div><div class='del'>-	np = dev-&gt;of_node;</div><div class='del'>-	switch (version) {</div><div class='del'>-	case GSWIP_VERSION_2_0:</div><div class='del'>-	case GSWIP_VERSION_2_1:</div><div class='del'>-		if (!of_device_is_compatible(np, "lantiq,xrx200-gswip"))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	case GSWIP_VERSION_2_2:</div><div class='del'>-	case GSWIP_VERSION_2_2_ETC:</div><div class='del'>-		if (!of_device_is_compatible(np, "lantiq,xrx300-gswip") &amp;&amp;</div><div class='del'>-		    !of_device_is_compatible(np, "lantiq,xrx330-gswip"))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return dev_err_probe(dev, -ENOENT,</div><div class='del'>-				     "unknown GSWIP version: 0x%x\n", version);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* bring up the mdio bus */</div><div class='del'>-	gphy_fw_np = of_get_compatible_child(dev-&gt;of_node, "lantiq,gphy-fw");</div><div class='del'>-	if (gphy_fw_np) {</div><div class='del'>-		err = gswip_gphy_fw_list(priv, gphy_fw_np, version);</div><div class='del'>-		of_node_put(gphy_fw_np);</div><div class='del'>-		if (err)</div><div class='del'>-			return dev_err_probe(dev, err,</div><div class='del'>-					     "gphy fw probe failed\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* bring up the mdio bus */</div><div class='del'>-	err = gswip_mdio(priv);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err_probe(dev, err, "mdio probe failed\n");</div><div class='del'>-		goto gphy_fw_remove;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = dsa_register_switch(priv-&gt;ds);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err_probe(dev, err, "dsa switch registration failed\n");</div><div class='del'>-		goto gphy_fw_remove;</div><div class='del'>-	}</div><div class='del'>-	if (!dsa_is_cpu_port(priv-&gt;ds, priv-&gt;hw_info-&gt;cpu_port)) {</div><div class='del'>-		err = dev_err_probe(dev, -EINVAL,</div><div class='del'>-				    "wrong CPU port defined, HW only supports port: %i\n",</div><div class='del'>-				    priv-&gt;hw_info-&gt;cpu_port);</div><div class='del'>-		goto disable_switch;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(pdev, priv);</div><div class='del'>-</div><div class='del'>-	dev_info(dev, "probed GSWIP version %lx mod %lx\n",</div><div class='del'>-		 (version &amp; GSWIP_VERSION_REV_MASK) &gt;&gt; GSWIP_VERSION_REV_SHIFT,</div><div class='del'>-		 (version &amp; GSWIP_VERSION_MOD_MASK) &gt;&gt; GSWIP_VERSION_MOD_SHIFT);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-disable_switch:</div><div class='del'>-	gswip_mdio_mask(priv, GSWIP_MDIO_GLOB_ENABLE, 0, GSWIP_MDIO_GLOB);</div><div class='del'>-	dsa_unregister_switch(priv-&gt;ds);</div><div class='del'>-gphy_fw_remove:</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;num_gphy_fw; i++)</div><div class='del'>-		gswip_gphy_fw_remove(priv, &amp;priv-&gt;gphy_fw[i]);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = platform_get_drvdata(pdev);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!priv)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* disable the switch */</div><div class='del'>-	gswip_mdio_mask(priv, GSWIP_MDIO_GLOB_ENABLE, 0, GSWIP_MDIO_GLOB);</div><div class='del'>-</div><div class='del'>-	dsa_unregister_switch(priv-&gt;ds);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;num_gphy_fw; i++)</div><div class='del'>-		gswip_gphy_fw_remove(priv, &amp;priv-&gt;gphy_fw[i]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void gswip_shutdown(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct gswip_priv *priv = platform_get_drvdata(pdev);</div><div class='del'>-</div><div class='del'>-	if (!priv)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	dsa_switch_shutdown(priv-&gt;ds);</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(pdev, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct gswip_hw_info gswip_xrx200 = {</div><div class='del'>-	.max_ports = 7,</div><div class='del'>-	.cpu_port = 6,</div><div class='del'>-	.ops = &amp;gswip_xrx200_switch_ops,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct gswip_hw_info gswip_xrx300 = {</div><div class='del'>-	.max_ports = 7,</div><div class='del'>-	.cpu_port = 6,</div><div class='del'>-	.ops = &amp;gswip_xrx300_switch_ops,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct of_device_id gswip_of_match[] = {</div><div class='del'>-	{ .compatible = "lantiq,xrx200-gswip", .data = &amp;gswip_xrx200 },</div><div class='del'>-	{ .compatible = "lantiq,xrx300-gswip", .data = &amp;gswip_xrx300 },</div><div class='del'>-	{ .compatible = "lantiq,xrx330-gswip", .data = &amp;gswip_xrx300 },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(of, gswip_of_match);</div><div class='del'>-</div><div class='del'>-static struct platform_driver gswip_driver = {</div><div class='del'>-	.probe = gswip_probe,</div><div class='del'>-	.remove = gswip_remove,</div><div class='del'>-	.shutdown = gswip_shutdown,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "gswip",</div><div class='del'>-		.of_match_table = gswip_of_match,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_platform_driver(gswip_driver);</div><div class='del'>-</div><div class='del'>-MODULE_FIRMWARE("lantiq/xrx300_phy11g_a21.bin");</div><div class='del'>-MODULE_FIRMWARE("lantiq/xrx300_phy22f_a21.bin");</div><div class='del'>-MODULE_FIRMWARE("lantiq/xrx200_phy11g_a14.bin");</div><div class='del'>-MODULE_FIRMWARE("lantiq/xrx200_phy11g_a22.bin");</div><div class='del'>-MODULE_FIRMWARE("lantiq/xrx200_phy22f_a14.bin");</div><div class='del'>-MODULE_FIRMWARE("lantiq/xrx200_phy22f_a22.bin");</div><div class='del'>-MODULE_AUTHOR("Hauke Mehrtens &lt;hauke@hauke-m.de&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Lantiq / Intel GSWIP driver");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/microchip/Kconfig b/drivers/net/dsa/microchip/Kconfig<br/>index 12a86585a77f..c71d3fd5dfeb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/Kconfig</a></div><div class='hunk'>@@ -6,6 +6,7 @@ menuconfig NET_DSA_MICROCHIP_KSZ_COMMON</div><div class='ctx'> 	select NET_DSA_TAG_NONE</div><div class='ctx'> 	select NET_IEEE8021Q_HELPERS</div><div class='ctx'> 	select DCB</div><div class='add'>+	select PCS_XPCS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver adds support for Microchip KSZ8, KSZ9 and</div><div class='ctx'> 	  LAN937X series switch chips, being KSZ8863/8873,</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/ksz8.c<br/>index da7110d67558..c354abdafc1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz8.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz8.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz8.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz8.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Microchip KSZ8XXX series switch driver</div><div class='ctx'>  *</div><div class='ctx'>  * It supports the following switches:</div><div class='add'>+ * - KSZ8463</div><div class='ctx'>  * - KSZ8863, KSZ8873 aka KSZ88X3</div><div class='ctx'>  * - KSZ8895, KSZ8864 aka KSZ8895 family</div><div class='ctx'>  * - KSZ8794, KSZ8795, KSZ8765 aka KSZ87XX</div><div class='hunk'>@@ -35,14 +36,14 @@</div><div class='ctx'> </div><div class='ctx'> static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)</div><div class='ctx'> {</div><div class='del'>-	regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0);</div><div class='add'>+	ksz_rmw8(dev, addr, bits, set ? bits : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,</div><div class='ctx'> 			 bool set)</div><div class='ctx'> {</div><div class='del'>-	regmap_update_bits(ksz_regmap_8(dev), PORT_CTRL_ADDR(port, offset),</div><div class='del'>-			   bits, set ? bits : 0);</div><div class='add'>+	ksz_rmw8(dev, dev-&gt;dev_ops-&gt;get_port_addr(port, offset), bits,</div><div class='add'>+		 set ? bits : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -140,6 +141,11 @@ int ksz8_reset_switch(struct ksz_device *dev)</div><div class='ctx'> 			KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, true);</div><div class='ctx'> 		ksz_cfg(dev, KSZ8863_REG_SW_RESET,</div><div class='ctx'> 			KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, false);</div><div class='add'>+	} else if (ksz_is_ksz8463(dev)) {</div><div class='add'>+		ksz_cfg(dev, KSZ8463_REG_SW_RESET,</div><div class='add'>+			KSZ8463_GLOBAL_SOFTWARE_RESET, true);</div><div class='add'>+		ksz_cfg(dev, KSZ8463_REG_SW_RESET,</div><div class='add'>+			KSZ8463_GLOBAL_SOFTWARE_RESET, false);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* reset switch */</div><div class='ctx'> 		ksz_write8(dev, REG_POWER_MANAGEMENT_1,</div><div class='hunk'>@@ -194,6 +200,7 @@ int ksz8_change_mtu(struct ksz_device *dev, int port, int mtu)</div><div class='ctx'> 	case KSZ8794_CHIP_ID:</div><div class='ctx'> 	case KSZ8765_CHIP_ID:</div><div class='ctx'> 		return ksz8795_change_mtu(dev, frame_size);</div><div class='add'>+	case KSZ8463_CHIP_ID:</div><div class='ctx'> 	case KSZ88X3_CHIP_ID:</div><div class='ctx'> 	case KSZ8864_CHIP_ID:</div><div class='ctx'> 	case KSZ8895_CHIP_ID:</div><div class='hunk'>@@ -227,6 +234,11 @@ static int ksz8_port_queue_split(struct ksz_device *dev, int port, int queues)</div><div class='ctx'> 			       WEIGHTED_FAIR_QUEUE_ENABLE);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='add'>+	} else if (ksz_is_ksz8463(dev)) {</div><div class='add'>+		mask_4q = KSZ8873_PORT_4QUEUE_SPLIT_EN;</div><div class='add'>+		mask_2q = KSZ8873_PORT_2QUEUE_SPLIT_EN;</div><div class='add'>+		reg_4q = P1CR1;</div><div class='add'>+		reg_2q = P1CR1 + 1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		mask_4q = KSZ8795_PORT_4QUEUE_SPLIT_EN;</div><div class='ctx'> 		mask_2q = KSZ8795_PORT_2QUEUE_SPLIT_EN;</div><div class='hunk'>@@ -371,6 +383,9 @@ static void ksz8863_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,</div><div class='ctx'> 	addr -= dev-&gt;info-&gt;reg_mib_cnt;</div><div class='ctx'> 	ctrl_addr = addr ? KSZ8863_MIB_PACKET_DROPPED_TX_0 :</div><div class='ctx'> 			   KSZ8863_MIB_PACKET_DROPPED_RX_0;</div><div class='add'>+	if (ksz_is_8895_family(dev) &amp;&amp;</div><div class='add'>+	    ctrl_addr == KSZ8863_MIB_PACKET_DROPPED_RX_0)</div><div class='add'>+		ctrl_addr = KSZ8895_MIB_PACKET_DROPPED_RX_0;</div><div class='ctx'> 	ctrl_addr += port;</div><div class='ctx'> 	ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);</div><div class='ctx'> </div><div class='hunk'>@@ -1265,12 +1280,15 @@ int ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)</div><div class='ctx'> </div><div class='ctx'> void ksz8_cfg_port_member(struct ksz_device *dev, int port, u8 member)</div><div class='ctx'> {</div><div class='add'>+	int offset = P_MIRROR_CTRL;</div><div class='ctx'> 	u8 data;</div><div class='ctx'> </div><div class='del'>-	ksz_pread8(dev, port, P_MIRROR_CTRL, &amp;data);</div><div class='del'>-	data &amp;= ~PORT_VLAN_MEMBERSHIP;</div><div class='add'>+	if (ksz_is_ksz8463(dev))</div><div class='add'>+		offset = P1CR2;</div><div class='add'>+	ksz_pread8(dev, port, offset, &amp;data);</div><div class='add'>+	data &amp;= ~dev-&gt;port_mask;</div><div class='ctx'> 	data |= (member &amp; dev-&gt;port_mask);</div><div class='del'>-	ksz_pwrite8(dev, port, P_MIRROR_CTRL, data);</div><div class='add'>+	ksz_pwrite8(dev, port, offset, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)</div><div class='hunk'>@@ -1278,6 +1296,8 @@ void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)</div><div class='ctx'> 	u8 learn[DSA_MAX_PORTS];</div><div class='ctx'> 	int first, index, cnt;</div><div class='ctx'> 	const u16 *regs;</div><div class='add'>+	int reg = S_FLUSH_TABLE_CTRL;</div><div class='add'>+	int mask = SW_FLUSH_DYN_MAC_TABLE;</div><div class='ctx'> </div><div class='ctx'> 	regs = dev-&gt;info-&gt;regs;</div><div class='ctx'> </div><div class='hunk'>@@ -1295,7 +1315,11 @@ void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)</div><div class='ctx'> 			ksz_pwrite8(dev, index, regs[P_STP_CTRL],</div><div class='ctx'> 				    learn[index] | PORT_LEARN_DISABLE);</div><div class='ctx'> 	}</div><div class='del'>-	ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_DYN_MAC_TABLE, true);</div><div class='add'>+	if (ksz_is_ksz8463(dev)) {</div><div class='add'>+		reg = KSZ8463_FLUSH_TABLE_CTRL;</div><div class='add'>+		mask = KSZ8463_FLUSH_DYN_MAC_TABLE;</div><div class='add'>+	}</div><div class='add'>+	ksz_cfg(dev, reg, mask, true);</div><div class='ctx'> 	for (index = first; index &lt; cnt; index++) {</div><div class='ctx'> 		if (!(learn[index] &amp; PORT_LEARN_DISABLE))</div><div class='ctx'> 			ksz_pwrite8(dev, index, regs[P_STP_CTRL], learn[index]);</div><div class='hunk'>@@ -1434,7 +1458,7 @@ int ksz8_fdb_del(struct ksz_device *dev, int port, const unsigned char *addr,</div><div class='ctx'> int ksz8_port_vlan_filtering(struct ksz_device *dev, int port, bool flag,</div><div class='ctx'> 			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	if (ksz_is_ksz88x3(dev))</div><div class='add'>+	if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev))</div><div class='ctx'> 		return -ENOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	/* Discard packets with VID not enabled on the switch */</div><div class='hunk'>@@ -1450,9 +1474,12 @@ int ksz8_port_vlan_filtering(struct ksz_device *dev, int port, bool flag,</div><div class='ctx'> </div><div class='ctx'> static void ksz8_port_enable_pvid(struct ksz_device *dev, int port, bool state)</div><div class='ctx'> {</div><div class='del'>-	if (ksz_is_ksz88x3(dev)) {</div><div class='del'>-		ksz_cfg(dev, REG_SW_INSERT_SRC_PVID,</div><div class='del'>-			0x03 &lt;&lt; (4 - 2 * port), state);</div><div class='add'>+	if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev)) {</div><div class='add'>+		int reg = REG_SW_INSERT_SRC_PVID;</div><div class='add'>+</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			reg = KSZ8463_REG_SW_CTRL_9;</div><div class='add'>+		ksz_cfg(dev, reg, 0x03 &lt;&lt; (4 - 2 * port), state);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ksz_pwrite8(dev, port, REG_PORT_CTRL_12, state ? 0x0f : 0x00);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1467,7 +1494,7 @@ int ksz8_port_vlan_add(struct ksz_device *dev, int port,</div><div class='ctx'> 	u16 data, new_pvid = 0;</div><div class='ctx'> 	u8 fid, member, valid;</div><div class='ctx'> </div><div class='del'>-	if (ksz_is_ksz88x3(dev))</div><div class='add'>+	if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev))</div><div class='ctx'> 		return -ENOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	/* If a VLAN is added with untagged flag different from the</div><div class='hunk'>@@ -1536,7 +1563,7 @@ int ksz8_port_vlan_del(struct ksz_device *dev, int port,</div><div class='ctx'> 	u16 data, pvid;</div><div class='ctx'> 	u8 fid, member, valid;</div><div class='ctx'> </div><div class='del'>-	if (ksz_is_ksz88x3(dev))</div><div class='add'>+	if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev))</div><div class='ctx'> 		return -ENOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	ksz_pread16(dev, port, REG_PORT_CTRL_VID, &amp;pvid);</div><div class='hunk'>@@ -1566,19 +1593,23 @@ int ksz8_port_mirror_add(struct ksz_device *dev, int port,</div><div class='ctx'> 			 struct dsa_mall_mirror_tc_entry *mirror,</div><div class='ctx'> 			 bool ingress, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	int offset = P_MIRROR_CTRL;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_ksz8463(dev))</div><div class='add'>+		offset = P1CR2;</div><div class='ctx'> 	if (ingress) {</div><div class='del'>-		ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);</div><div class='add'>+		ksz_port_cfg(dev, port, offset, PORT_MIRROR_RX, true);</div><div class='ctx'> 		dev-&gt;mirror_rx |= BIT(port);</div><div class='ctx'> 	} else {</div><div class='del'>-		ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);</div><div class='add'>+		ksz_port_cfg(dev, port, offset, PORT_MIRROR_TX, true);</div><div class='ctx'> 		dev-&gt;mirror_tx |= BIT(port);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false);</div><div class='add'>+	ksz_port_cfg(dev, port, offset, PORT_MIRROR_SNIFFER, false);</div><div class='ctx'> </div><div class='ctx'> 	/* configure mirror port */</div><div class='ctx'> 	if (dev-&gt;mirror_rx || dev-&gt;mirror_tx)</div><div class='del'>-		ksz_port_cfg(dev, mirror-&gt;to_local_port, P_MIRROR_CTRL,</div><div class='add'>+		ksz_port_cfg(dev, mirror-&gt;to_local_port, offset,</div><div class='ctx'> 			     PORT_MIRROR_SNIFFER, true);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1587,20 +1618,23 @@ int ksz8_port_mirror_add(struct ksz_device *dev, int port,</div><div class='ctx'> void ksz8_port_mirror_del(struct ksz_device *dev, int port,</div><div class='ctx'> 			  struct dsa_mall_mirror_tc_entry *mirror)</div><div class='ctx'> {</div><div class='add'>+	int offset = P_MIRROR_CTRL;</div><div class='ctx'> 	u8 data;</div><div class='ctx'> </div><div class='add'>+	if (ksz_is_ksz8463(dev))</div><div class='add'>+		offset = P1CR2;</div><div class='ctx'> 	if (mirror-&gt;ingress) {</div><div class='del'>-		ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);</div><div class='add'>+		ksz_port_cfg(dev, port, offset, PORT_MIRROR_RX, false);</div><div class='ctx'> 		dev-&gt;mirror_rx &amp;= ~BIT(port);</div><div class='ctx'> 	} else {</div><div class='del'>-		ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);</div><div class='add'>+		ksz_port_cfg(dev, port, offset, PORT_MIRROR_TX, false);</div><div class='ctx'> 		dev-&gt;mirror_tx &amp;= ~BIT(port);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ksz_pread8(dev, port, P_MIRROR_CTRL, &amp;data);</div><div class='add'>+	ksz_pread8(dev, port, offset, &amp;data);</div><div class='ctx'> </div><div class='ctx'> 	if (!dev-&gt;mirror_rx &amp;&amp; !dev-&gt;mirror_tx)</div><div class='del'>-		ksz_port_cfg(dev, mirror-&gt;to_local_port, P_MIRROR_CTRL,</div><div class='add'>+		ksz_port_cfg(dev, mirror-&gt;to_local_port, offset,</div><div class='ctx'> 			     PORT_MIRROR_SNIFFER, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1625,26 +1659,24 @@ void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)</div><div class='ctx'> 	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='ctx'> 	struct dsa_switch *ds = dev-&gt;ds;</div><div class='ctx'> 	const u32 *masks;</div><div class='del'>-	int queues;</div><div class='add'>+	int offset;</div><div class='ctx'> 	u8 member;</div><div class='ctx'> </div><div class='ctx'> 	masks = dev-&gt;info-&gt;masks;</div><div class='ctx'> </div><div class='ctx'> 	/* enable broadcast storm limit */</div><div class='del'>-	ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true);</div><div class='del'>-</div><div class='del'>-	/* For KSZ88x3 enable only one queue by default, otherwise we won't</div><div class='del'>-	 * be able to get rid of PCP prios on Port 2.</div><div class='del'>-	 */</div><div class='del'>-	if (ksz_is_ksz88x3(dev))</div><div class='del'>-		queues = 1;</div><div class='del'>-	else</div><div class='del'>-		queues = dev-&gt;info-&gt;num_tx_queues;</div><div class='add'>+	offset = P_BCAST_STORM_CTRL;</div><div class='add'>+	if (ksz_is_ksz8463(dev))</div><div class='add'>+		offset = P1CR1;</div><div class='add'>+	ksz_port_cfg(dev, port, offset, PORT_BROADCAST_STORM, true);</div><div class='ctx'> </div><div class='del'>-	ksz8_port_queue_split(dev, port, queues);</div><div class='add'>+	ksz8_port_queue_split(dev, port, dev-&gt;info-&gt;num_tx_queues);</div><div class='ctx'> </div><div class='ctx'> 	/* replace priority */</div><div class='del'>-	ksz_port_cfg(dev, port, P_802_1P_CTRL,</div><div class='add'>+	offset = P_802_1P_CTRL;</div><div class='add'>+	if (ksz_is_ksz8463(dev))</div><div class='add'>+		offset = P1CR2;</div><div class='add'>+	ksz_port_cfg(dev, port, offset,</div><div class='ctx'> 		     masks[PORT_802_1P_REMAPPING], false);</div><div class='ctx'> </div><div class='ctx'> 	if (cpu_port)</div><div class='hunk'>@@ -1684,6 +1716,7 @@ void ksz8_config_cpu_port(struct dsa_switch *ds)</div><div class='ctx'> 	const u32 *masks;</div><div class='ctx'> 	const u16 *regs;</div><div class='ctx'> 	u8 remote;</div><div class='add'>+	u8 fiber_ports = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	masks = dev-&gt;info-&gt;masks;</div><div class='hunk'>@@ -1714,6 +1747,32 @@ void ksz8_config_cpu_port(struct dsa_switch *ds)</div><div class='ctx'> 		else</div><div class='ctx'> 			ksz_port_cfg(dev, i, regs[P_STP_CTRL],</div><div class='ctx'> 				     PORT_FORCE_FLOW_CTRL, false);</div><div class='add'>+		if (p-&gt;fiber)</div><div class='add'>+			fiber_ports |= (1 &lt;&lt; i);</div><div class='add'>+	}</div><div class='add'>+	if (ksz_is_ksz8463(dev)) {</div><div class='add'>+		/* Setup fiber ports. */</div><div class='add'>+		if (fiber_ports) {</div><div class='add'>+			fiber_ports &amp;= 3;</div><div class='add'>+			regmap_update_bits(ksz_regmap_16(dev),</div><div class='add'>+					   KSZ8463_REG_CFG_CTRL,</div><div class='add'>+					   fiber_ports &lt;&lt; PORT_COPPER_MODE_S,</div><div class='add'>+					   0);</div><div class='add'>+			regmap_update_bits(ksz_regmap_16(dev),</div><div class='add'>+					   KSZ8463_REG_DSP_CTRL_6,</div><div class='add'>+					   COPPER_RECEIVE_ADJUSTMENT, 0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Turn off PTP function as the switch's proprietary way of</div><div class='add'>+		 * handling timestamp is not supported in current Linux PTP</div><div class='add'>+		 * stack implementation.</div><div class='add'>+		 */</div><div class='add'>+		regmap_update_bits(ksz_regmap_16(dev),</div><div class='add'>+				   KSZ8463_PTP_MSG_CONF1,</div><div class='add'>+				   PTP_ENABLE, 0);</div><div class='add'>+		regmap_update_bits(ksz_regmap_16(dev),</div><div class='add'>+				   KSZ8463_PTP_CLK_CTRL,</div><div class='add'>+				   PTP_CLK_ENABLE, 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1895,22 +1954,25 @@ int ksz8_setup(struct dsa_switch *ds)</div><div class='ctx'> 	ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable aggressive back off algorithm in half duplex mode. */</div><div class='del'>-	regmap_update_bits(ksz_regmap_8(dev), REG_SW_CTRL_1,</div><div class='del'>-			   SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);</div><div class='add'>+	ret = ksz_rmw8(dev, REG_SW_CTRL_1, SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure unicast VLAN boundary is set as default and</div><div class='ctx'> 	 * enable no excessive collision drop.</div><div class='ctx'> 	 */</div><div class='del'>-	regmap_update_bits(ksz_regmap_8(dev), REG_SW_CTRL_2,</div><div class='del'>-			   UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP,</div><div class='del'>-			   UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP);</div><div class='add'>+	ret = ksz_rmw8(dev, REG_SW_CTRL_2,</div><div class='add'>+		       UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP,</div><div class='add'>+		       UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_REPLACE_VID, false);</div><div class='ctx'> </div><div class='ctx'> 	ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);</div><div class='ctx'> </div><div class='del'>-	if (!ksz_is_ksz88x3(dev))</div><div class='add'>+	if (!ksz_is_ksz88x3(dev) &amp;&amp; !ksz_is_ksz8463(dev))</div><div class='ctx'> 		ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; (dev-&gt;info-&gt;num_vlans / 4); i++)</div><div class='hunk'>@@ -1956,6 +2018,84 @@ u32 ksz8_get_port_addr(int port, int offset)</div><div class='ctx'> 	return PORT_CTRL_ADDR(port, offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u32 ksz8463_get_port_addr(int port, int offset)</div><div class='add'>+{</div><div class='add'>+	return offset + 0x18 * port;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 ksz8463_get_phy_addr(u16 phy, u16 reg, u16 offset)</div><div class='add'>+{</div><div class='add'>+	return offset + reg * 2 + phy * (P2MBCR - P1MBCR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8463_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	u16 sw_reg = 0;</div><div class='add'>+	u16 data = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phy &gt; 1)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case MII_PHYSID1:</div><div class='add'>+		sw_reg = ksz8463_get_phy_addr(phy, 0, PHY1IHR);</div><div class='add'>+		break;</div><div class='add'>+	case MII_PHYSID2:</div><div class='add'>+		sw_reg = ksz8463_get_phy_addr(phy, 0, PHY1ILR);</div><div class='add'>+		break;</div><div class='add'>+	case MII_BMCR:</div><div class='add'>+	case MII_BMSR:</div><div class='add'>+	case MII_ADVERTISE:</div><div class='add'>+	case MII_LPA:</div><div class='add'>+		sw_reg = ksz8463_get_phy_addr(phy, reg, P1MBCR);</div><div class='add'>+		break;</div><div class='add'>+	case MII_TPISTATUS:</div><div class='add'>+		/* This register holds the PHY interrupt status for simulated</div><div class='add'>+		 * Micrel KSZ PHY.</div><div class='add'>+		 */</div><div class='add'>+		data = 0x0505;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (sw_reg) {</div><div class='add'>+		ret = ksz_read16(dev, sw_reg, &amp;data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	*val = data;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8463_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	u16 sw_reg = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phy &gt; 1)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	/* No write to fiber port. */</div><div class='add'>+	if (dev-&gt;ports[phy].fiber)</div><div class='add'>+		return 0;</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case MII_BMCR:</div><div class='add'>+	case MII_ADVERTISE:</div><div class='add'>+		sw_reg = ksz8463_get_phy_addr(phy, reg, P1MBCR);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (sw_reg) {</div><div class='add'>+		ret = ksz_write16(dev, sw_reg, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ksz8_switch_init(struct ksz_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	dev-&gt;cpu_port = fls(dev-&gt;info-&gt;cpu_ports) - 1;</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz8.h b/drivers/net/dsa/microchip/ksz8.h<br/>index e1c79ff97123..0f2cd1474b44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz8.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz8.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz8.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz8.h</a></div><div class='hunk'>@@ -63,4 +63,8 @@ void ksz8_phylink_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 			      bool tx_pause, bool rx_pause);</div><div class='ctx'> int ksz8_all_queues_split(struct ksz_device *dev, int queues);</div><div class='ctx'> </div><div class='add'>+u32 ksz8463_get_port_addr(int port, int offset);</div><div class='add'>+int ksz8463_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);</div><div class='add'>+int ksz8463_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz8_reg.h b/drivers/net/dsa/microchip/ksz8_reg.h<br/>index 329688603a58..332408567b47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz8_reg.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz8_reg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz8_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz8_reg.h</a></div><div class='hunk'>@@ -729,6 +729,55 @@</div><div class='ctx'> #define PHY_POWER_SAVING_ENABLE		BIT(2)</div><div class='ctx'> #define PHY_REMOTE_LOOPBACK		BIT(1)</div><div class='ctx'> </div><div class='add'>+/* KSZ8463 specific registers. */</div><div class='add'>+#define P1MBCR				0x4C</div><div class='add'>+#define P1MBSR				0x4E</div><div class='add'>+#define PHY1ILR				0x50</div><div class='add'>+#define PHY1IHR				0x52</div><div class='add'>+#define P1ANAR				0x54</div><div class='add'>+#define P1ANLPR				0x56</div><div class='add'>+#define P2MBCR				0x58</div><div class='add'>+#define P2MBSR				0x5A</div><div class='add'>+#define PHY2ILR				0x5C</div><div class='add'>+#define PHY2IHR				0x5E</div><div class='add'>+#define P2ANAR				0x60</div><div class='add'>+#define P2ANLPR				0x62</div><div class='add'>+</div><div class='add'>+#define P1CR1				0x6C</div><div class='add'>+#define P1CR2				0x6E</div><div class='add'>+#define P1CR3				0x72</div><div class='add'>+#define P1CR4				0x7E</div><div class='add'>+#define P1SR				0x80</div><div class='add'>+</div><div class='add'>+#define KSZ8463_FLUSH_TABLE_CTRL	0xAD</div><div class='add'>+</div><div class='add'>+#define KSZ8463_FLUSH_DYN_MAC_TABLE	BIT(2)</div><div class='add'>+#define KSZ8463_FLUSH_STA_MAC_TABLE	BIT(1)</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REG_SW_CTRL_9		0xAE</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REG_CFG_CTRL		0xD8</div><div class='add'>+</div><div class='add'>+#define PORT_2_COPPER_MODE		BIT(7)</div><div class='add'>+#define PORT_1_COPPER_MODE		BIT(6)</div><div class='add'>+#define PORT_COPPER_MODE_S		6</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REG_SW_RESET		0x126</div><div class='add'>+</div><div class='add'>+#define KSZ8463_GLOBAL_SOFTWARE_RESET	BIT(0)</div><div class='add'>+</div><div class='add'>+#define KSZ8463_PTP_CLK_CTRL		0x600</div><div class='add'>+</div><div class='add'>+#define PTP_CLK_ENABLE			BIT(1)</div><div class='add'>+</div><div class='add'>+#define KSZ8463_PTP_MSG_CONF1		0x620</div><div class='add'>+</div><div class='add'>+#define PTP_ENABLE			BIT(6)</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REG_DSP_CTRL_6		0x734</div><div class='add'>+</div><div class='add'>+#define COPPER_RECEIVE_ADJUSTMENT	BIT(13)</div><div class='add'>+</div><div class='ctx'> /* Chip resource */</div><div class='ctx'> </div><div class='ctx'> #define PRIO_QUEUES			4</div><div class='hunk'>@@ -784,7 +833,9 @@</div><div class='ctx'> #define KSZ8795_MIB_TOTAL_TX_1		0x105</div><div class='ctx'> </div><div class='ctx'> #define KSZ8863_MIB_PACKET_DROPPED_TX_0 0x100</div><div class='del'>-#define KSZ8863_MIB_PACKET_DROPPED_RX_0 0x105</div><div class='add'>+#define KSZ8863_MIB_PACKET_DROPPED_RX_0 0x103</div><div class='add'>+</div><div class='add'>+#define KSZ8895_MIB_PACKET_DROPPED_RX_0 0x105</div><div class='ctx'> </div><div class='ctx'> #define MIB_PACKET_DROPPED		0x0000FFFF</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c<br/>index 0ba658a72d8f..5facffbb9c9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz9477.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz9477.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Microchip KSZ9477 switch driver main logic</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2017-2019 Microchip Technology Inc.</div><div class='add'>+ * Copyright (C) 2017-2025 Microchip Technology Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -161,6 +161,190 @@ static int ksz9477_wait_alu_sta_ready(struct ksz_device *dev)</div><div class='ctx'> 					10, 1000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void port_sgmii_s(struct ksz_device *dev, uint port, u16 devid, u16 reg)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = (devid &amp; MII_MMD_CTRL_DEVAD_MASK) &lt;&lt; 16;</div><div class='add'>+	data |= reg;</div><div class='add'>+	ksz_pwrite32(dev, port, REG_PORT_SGMII_ADDR__4, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void port_sgmii_r(struct ksz_device *dev, uint port, u16 devid, u16 reg,</div><div class='add'>+			 u16 *buf)</div><div class='add'>+{</div><div class='add'>+	port_sgmii_s(dev, port, devid, reg);</div><div class='add'>+	ksz_pread16(dev, port, REG_PORT_SGMII_DATA__4 + 2, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void port_sgmii_w(struct ksz_device *dev, uint port, u16 devid, u16 reg,</div><div class='add'>+			 u16 buf)</div><div class='add'>+{</div><div class='add'>+	port_sgmii_s(dev, port, devid, reg);</div><div class='add'>+	ksz_pwrite32(dev, port, REG_PORT_SGMII_DATA__4, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_pcs_read(struct mii_bus *bus, int phy, int mmd, int reg)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = bus-&gt;priv;</div><div class='add'>+	int port = ksz_get_sgmii_port(dev);</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	port_sgmii_r(dev, port, mmd, reg, &amp;val);</div><div class='add'>+</div><div class='add'>+	/* Simulate a value to activate special code in the XPCS driver if</div><div class='add'>+	 * supported.</div><div class='add'>+	 */</div><div class='add'>+	if (mmd == MDIO_MMD_PMAPMD) {</div><div class='add'>+		if (reg == MDIO_DEVID1)</div><div class='add'>+			val = 0x9477;</div><div class='add'>+		else if (reg == MDIO_DEVID2)</div><div class='add'>+			val = 0x22 &lt;&lt; 10;</div><div class='add'>+	} else if (mmd == MDIO_MMD_VEND2) {</div><div class='add'>+		struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+		/* Need to update MII_BMCR register with the exact speed and</div><div class='add'>+		 * duplex mode when running in SGMII mode and this register is</div><div class='add'>+		 * used to detect connected speed in that mode.</div><div class='add'>+		 */</div><div class='add'>+		if (reg == MMD_SR_MII_AUTO_NEG_STATUS) {</div><div class='add'>+			int duplex, speed;</div><div class='add'>+</div><div class='add'>+			if (val &amp; SR_MII_STAT_LINK_UP) {</div><div class='add'>+				speed = (val &gt;&gt; SR_MII_STAT_S) &amp; SR_MII_STAT_M;</div><div class='add'>+				if (speed == SR_MII_STAT_1000_MBPS)</div><div class='add'>+					speed = SPEED_1000;</div><div class='add'>+				else if (speed == SR_MII_STAT_100_MBPS)</div><div class='add'>+					speed = SPEED_100;</div><div class='add'>+				else</div><div class='add'>+					speed = SPEED_10;</div><div class='add'>+</div><div class='add'>+				if (val &amp; SR_MII_STAT_FULL_DUPLEX)</div><div class='add'>+					duplex = DUPLEX_FULL;</div><div class='add'>+				else</div><div class='add'>+					duplex = DUPLEX_HALF;</div><div class='add'>+</div><div class='add'>+				if (!p-&gt;phydev.link ||</div><div class='add'>+				    p-&gt;phydev.speed != speed ||</div><div class='add'>+				    p-&gt;phydev.duplex != duplex) {</div><div class='add'>+					u16 ctrl;</div><div class='add'>+</div><div class='add'>+					p-&gt;phydev.link = 1;</div><div class='add'>+					p-&gt;phydev.speed = speed;</div><div class='add'>+					p-&gt;phydev.duplex = duplex;</div><div class='add'>+					port_sgmii_r(dev, port, mmd, MII_BMCR,</div><div class='add'>+						     &amp;ctrl);</div><div class='add'>+					ctrl &amp;= BMCR_ANENABLE;</div><div class='add'>+					ctrl |= mii_bmcr_encode_fixed(speed,</div><div class='add'>+								      duplex);</div><div class='add'>+					port_sgmii_w(dev, port, mmd, MII_BMCR,</div><div class='add'>+						     ctrl);</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				p-&gt;phydev.link = 0;</div><div class='add'>+			}</div><div class='add'>+		} else if (reg == MII_BMSR) {</div><div class='add'>+			p-&gt;phydev.link = !!(val &amp; BMSR_LSTATUS);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_pcs_write(struct mii_bus *bus, int phy, int mmd, int reg,</div><div class='add'>+			     u16 val)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = bus-&gt;priv;</div><div class='add'>+	int port = ksz_get_sgmii_port(dev);</div><div class='add'>+</div><div class='add'>+	if (mmd == MDIO_MMD_VEND2) {</div><div class='add'>+		struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+		if (reg == MMD_SR_MII_AUTO_NEG_CTRL) {</div><div class='add'>+			u16 sgmii_mode = SR_MII_PCS_SGMII &lt;&lt; SR_MII_PCS_MODE_S;</div><div class='add'>+</div><div class='add'>+			/* Need these bits for 1000BASE-X mode to work with</div><div class='add'>+			 * AN on.</div><div class='add'>+			 */</div><div class='add'>+			if (!(val &amp; sgmii_mode))</div><div class='add'>+				val |= SR_MII_SGMII_LINK_UP |</div><div class='add'>+				       SR_MII_TX_CFG_PHY_MASTER;</div><div class='add'>+</div><div class='add'>+			/* SGMII interrupt in the port cannot be masked, so</div><div class='add'>+			 * make sure interrupt is not enabled as it is not</div><div class='add'>+			 * handled.</div><div class='add'>+			 */</div><div class='add'>+			val &amp;= ~SR_MII_AUTO_NEG_COMPLETE_INTR;</div><div class='add'>+		} else if (reg == MII_BMCR) {</div><div class='add'>+			/* The MII_ADVERTISE register needs to write once</div><div class='add'>+			 * before doing auto-negotiation for the correct</div><div class='add'>+			 * config_word to be sent out after reset.</div><div class='add'>+			 */</div><div class='add'>+			if ((val &amp; BMCR_ANENABLE) &amp;&amp; !p-&gt;sgmii_adv_write) {</div><div class='add'>+				u16 adv;</div><div class='add'>+</div><div class='add'>+				/* The SGMII port cannot disable flow control</div><div class='add'>+				 * so it is better to just advertise symmetric</div><div class='add'>+				 * pause.</div><div class='add'>+				 */</div><div class='add'>+				port_sgmii_r(dev, port, mmd, MII_ADVERTISE,</div><div class='add'>+					     &amp;adv);</div><div class='add'>+				adv |= ADVERTISE_1000XPAUSE;</div><div class='add'>+				adv &amp;= ~ADVERTISE_1000XPSE_ASYM;</div><div class='add'>+				port_sgmii_w(dev, port, mmd, MII_ADVERTISE,</div><div class='add'>+					     adv);</div><div class='add'>+				p-&gt;sgmii_adv_write = 1;</div><div class='add'>+			} else if (val &amp; BMCR_RESET) {</div><div class='add'>+				p-&gt;sgmii_adv_write = 0;</div><div class='add'>+			}</div><div class='add'>+		} else if (reg == MII_ADVERTISE) {</div><div class='add'>+			/* XPCS driver writes to this register so there is no</div><div class='add'>+			 * need to update it for the errata.</div><div class='add'>+			 */</div><div class='add'>+			p-&gt;sgmii_adv_write = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	port_sgmii_w(dev, port, mmd, reg, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_pcs_create(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	/* This chip has a SGMII port. */</div><div class='add'>+	if (ksz_has_sgmii_port(dev)) {</div><div class='add'>+		int port = ksz_get_sgmii_port(dev);</div><div class='add'>+		struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+		struct phylink_pcs *pcs;</div><div class='add'>+		struct mii_bus *bus;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		bus = devm_mdiobus_alloc(dev-&gt;dev);</div><div class='add'>+		if (!bus)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		bus-&gt;name = "ksz_pcs_mdio_bus";</div><div class='add'>+		snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-pcs",</div><div class='add'>+			 dev_name(dev-&gt;dev));</div><div class='add'>+		bus-&gt;read_c45 = &amp;ksz9477_pcs_read;</div><div class='add'>+		bus-&gt;write_c45 = &amp;ksz9477_pcs_write;</div><div class='add'>+		bus-&gt;parent = dev-&gt;dev;</div><div class='add'>+		bus-&gt;phy_mask = ~0;</div><div class='add'>+		bus-&gt;priv = dev;</div><div class='add'>+</div><div class='add'>+		ret = devm_mdiobus_register(dev-&gt;dev, bus);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		pcs = xpcs_create_pcs_mdiodev(bus, 0);</div><div class='add'>+		if (IS_ERR(pcs))</div><div class='add'>+			return PTR_ERR(pcs);</div><div class='add'>+		p-&gt;pcs = pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ksz9477_reset_switch(struct ksz_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u8 data8;</div><div class='hunk'>@@ -978,31 +1162,64 @@ void ksz9477_get_caps(struct ksz_device *dev, int port,</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;info-&gt;gbit_capable[port])</div><div class='ctx'> 		config-&gt;mac_capabilities |= MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_sgmii_port(dev, port)) {</div><div class='add'>+		struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+		phy_interface_or(config-&gt;supported_interfaces,</div><div class='add'>+				 config-&gt;supported_interfaces,</div><div class='add'>+				 p-&gt;pcs-&gt;supported_interfaces);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ksz9477_set_ageing_time(struct ksz_device *dev, unsigned int msecs)</div><div class='ctx'> {</div><div class='ctx'> 	u32 secs = msecs / 1000;</div><div class='del'>-	u8 value;</div><div class='del'>-	u8 data;</div><div class='add'>+	u8 data, mult, value;</div><div class='add'>+	u32 max_val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	value = FIELD_GET(SW_AGE_PERIOD_7_0_M, secs);</div><div class='add'>+#define MAX_TIMER_VAL	((1 &lt;&lt; 8) - 1)</div><div class='ctx'> </div><div class='del'>-	ret = ksz_write8(dev, REG_SW_LUE_CTRL_3, value);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+	/* The aging timer comprises a 3-bit multiplier and an 8-bit second</div><div class='add'>+	 * value.  Either of them cannot be zero.  The maximum timer is then</div><div class='add'>+	 * 7 * 255 = 1785 seconds.</div><div class='add'>+	 */</div><div class='add'>+	if (!secs)</div><div class='add'>+		secs = 1;</div><div class='ctx'> </div><div class='del'>-	data = FIELD_GET(SW_AGE_PERIOD_10_8_M, secs);</div><div class='add'>+	/* Return error if too large. */</div><div class='add'>+	else if (secs &gt; 7 * MAX_TIMER_VAL)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ret = ksz_read8(dev, REG_SW_LUE_CTRL_0, &amp;value);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	value &amp;= ~SW_AGE_CNT_M;</div><div class='del'>-	value |= FIELD_PREP(SW_AGE_CNT_M, data);</div><div class='add'>+	/* Check whether there is need to update the multiplier. */</div><div class='add'>+	mult = FIELD_GET(SW_AGE_CNT_M, value);</div><div class='add'>+	max_val = MAX_TIMER_VAL;</div><div class='add'>+	if (mult &gt; 0) {</div><div class='add'>+		/* Try to use the same multiplier already in the register as</div><div class='add'>+		 * the hardware default uses multiplier 4 and 75 seconds for</div><div class='add'>+		 * 300 seconds.</div><div class='add'>+		 */</div><div class='add'>+		max_val = DIV_ROUND_UP(secs, mult);</div><div class='add'>+		if (max_val &gt; MAX_TIMER_VAL || max_val * mult != secs)</div><div class='add'>+			max_val = MAX_TIMER_VAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = DIV_ROUND_UP(secs, max_val);</div><div class='add'>+	if (mult != data) {</div><div class='add'>+		value &amp;= ~SW_AGE_CNT_M;</div><div class='add'>+		value |= FIELD_PREP(SW_AGE_CNT_M, data);</div><div class='add'>+		ret = ksz_write8(dev, REG_SW_LUE_CTRL_0, value);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return ksz_write8(dev, REG_SW_LUE_CTRL_0, value);</div><div class='add'>+	value = DIV_ROUND_UP(secs, data);</div><div class='add'>+	return ksz_write8(dev, REG_SW_LUE_CTRL_3, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ksz9477_port_queue_split(struct ksz_device *dev, int port)</div><div class='hunk'>@@ -1131,12 +1348,22 @@ void ksz9477_config_cpu_port(struct dsa_switch *ds)</div><div class='ctx'> 		if (i == dev-&gt;cpu_port)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		ksz_port_stp_state_set(ds, i, BR_STATE_DISABLED);</div><div class='add'>+</div><div class='add'>+		/* Power down the internal PHY if port is unused. */</div><div class='add'>+		if (dsa_is_unused_port(ds, i) &amp;&amp; dev-&gt;info-&gt;internal_phy[i])</div><div class='add'>+			ksz_pwrite16(dev, i, 0x100, BMCR_PDOWN);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define RESV_MCAST_CNT	8</div><div class='add'>+</div><div class='add'>+static u8 reserved_mcast_map[RESV_MCAST_CNT] = { 0, 1, 3, 16, 32, 33, 2, 17 };</div><div class='add'>+</div><div class='ctx'> int ksz9477_enable_stp_addr(struct ksz_device *dev)</div><div class='ctx'> {</div><div class='add'>+	u8 i, ports, update;</div><div class='ctx'> 	const u32 *masks;</div><div class='add'>+	bool override;</div><div class='ctx'> 	u32 data;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1145,23 +1372,87 @@ int ksz9477_enable_stp_addr(struct ksz_device *dev)</div><div class='ctx'> 	/* Enable Reserved multicast table */</div><div class='ctx'> 	ksz_cfg(dev, REG_SW_LUE_CTRL_0, SW_RESV_MCAST_ENABLE, true);</div><div class='ctx'> </div><div class='del'>-	/* Set the Override bit for forwarding BPDU packet to CPU */</div><div class='del'>-	ret = ksz_write32(dev, REG_SW_ALU_VAL_B,</div><div class='del'>-			  ALU_V_OVERRIDE | BIT(dev-&gt;cpu_port));</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+	/* The reserved multicast address table has 8 entries.  Each entry has</div><div class='add'>+	 * a default value of which port to forward.  It is assumed the host</div><div class='add'>+	 * port is the last port in most of the switches, but that is not the</div><div class='add'>+	 * case for KSZ9477 or maybe KSZ9897.  For LAN937X family the default</div><div class='add'>+	 * port is port 5, the first RGMII port.  It is okay for LAN9370, a</div><div class='add'>+	 * 5-port switch, but may not be correct for the other 8-port</div><div class='add'>+	 * versions.  It is necessary to update the whole table to forward to</div><div class='add'>+	 * the right ports.</div><div class='add'>+	 * Furthermore PTP messages can use a reserved multicast address and</div><div class='add'>+	 * the host will not receive them if this table is not correct.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; RESV_MCAST_CNT; i++) {</div><div class='add'>+		data = reserved_mcast_map[i] &lt;&lt;</div><div class='add'>+			dev-&gt;info-&gt;shifts[ALU_STAT_INDEX];</div><div class='add'>+		data |= ALU_STAT_START |</div><div class='add'>+			masks[ALU_STAT_DIRECT] |</div><div class='add'>+			masks[ALU_RESV_MCAST_ADDR] |</div><div class='add'>+			masks[ALU_STAT_READ];</div><div class='add'>+		ret = ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-	data = ALU_STAT_START | ALU_RESV_MCAST_ADDR | masks[ALU_STAT_WRITE];</div><div class='add'>+		/* wait to be finished */</div><div class='add'>+		ret = ksz9477_wait_alu_sta_ready(dev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-	ret = ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+		ret = ksz_read32(dev, REG_SW_ALU_VAL_B, &amp;data);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-	/* wait to be finished */</div><div class='del'>-	ret = ksz9477_wait_alu_sta_ready(dev);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_err(dev-&gt;dev, "Failed to update Reserved Multicast table\n");</div><div class='del'>-		return ret;</div><div class='add'>+		override = false;</div><div class='add'>+		ports = data &amp; dev-&gt;port_mask;</div><div class='add'>+		switch (i) {</div><div class='add'>+		case 0:</div><div class='add'>+		case 6:</div><div class='add'>+			/* Change the host port. */</div><div class='add'>+			update = BIT(dev-&gt;cpu_port);</div><div class='add'>+			override = true;</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			/* Change the host port. */</div><div class='add'>+			update = BIT(dev-&gt;cpu_port);</div><div class='add'>+			break;</div><div class='add'>+		case 4:</div><div class='add'>+		case 5:</div><div class='add'>+		case 7:</div><div class='add'>+			/* Skip the host port. */</div><div class='add'>+			update = dev-&gt;port_mask &amp; ~BIT(dev-&gt;cpu_port);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			update = ports;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (update != ports || override) {</div><div class='add'>+			data &amp;= ~dev-&gt;port_mask;</div><div class='add'>+			data |= update;</div><div class='add'>+			/* Set Override bit to receive frame even when port is</div><div class='add'>+			 * closed.</div><div class='add'>+			 */</div><div class='add'>+			if (override)</div><div class='add'>+				data |= ALU_V_OVERRIDE;</div><div class='add'>+			ret = ksz_write32(dev, REG_SW_ALU_VAL_B, data);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			data = reserved_mcast_map[i] &lt;&lt;</div><div class='add'>+			       dev-&gt;info-&gt;shifts[ALU_STAT_INDEX];</div><div class='add'>+			data |= ALU_STAT_START |</div><div class='add'>+				masks[ALU_STAT_DIRECT] |</div><div class='add'>+				masks[ALU_RESV_MCAST_ADDR] |</div><div class='add'>+				masks[ALU_STAT_WRITE];</div><div class='add'>+			ret = ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			/* wait to be finished */</div><div class='add'>+			ret = ksz9477_wait_alu_sta_ready(dev);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz9477.h b/drivers/net/dsa/microchip/ksz9477.h<br/>index d2166b0d881e..0d1a6dfda23e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz9477.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz9477.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Microchip KSZ9477 series Header file</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2017-2022 Microchip Technology Inc.</div><div class='add'>+ * Copyright (C) 2017-2025 Microchip Technology Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __KSZ9477_H</div><div class='hunk'>@@ -97,4 +97,6 @@ void ksz9477_acl_match_process_l2(struct ksz_device *dev, int port,</div><div class='ctx'> 				  u16 ethtype, u8 *src_mac, u8 *dst_mac,</div><div class='ctx'> 				  unsigned long cookie, u32 prio);</div><div class='ctx'> </div><div class='add'>+int ksz9477_pcs_create(struct ksz_device *dev);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz9477_i2c.c b/drivers/net/dsa/microchip/ksz9477_i2c.c<br/>index 7d7560f23a73..a2beb27459f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477_i2c.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz9477_i2c.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477_i2c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz9477_i2c.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Microchip KSZ9477 series register access through I2C</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2018-2019 Microchip Technology Inc.</div><div class='add'>+ * Copyright (C) 2018-2024 Microchip Technology Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/i2c.h&gt;</div><div class='hunk'>@@ -16,6 +16,8 @@ KSZ_REGMAP_TABLE(ksz9477, not_used, 16, 0, 0);</div><div class='ctx'> </div><div class='ctx'> static int ksz9477_i2c_probe(struct i2c_client *i2c)</div><div class='ctx'> {</div><div class='add'>+	const struct ksz_chip_data *chip;</div><div class='add'>+	struct device *ddev = &amp;i2c-&gt;dev;</div><div class='ctx'> 	struct regmap_config rc;</div><div class='ctx'> 	struct ksz_device *dev;</div><div class='ctx'> 	int i, ret;</div><div class='hunk'>@@ -24,6 +26,12 @@ static int ksz9477_i2c_probe(struct i2c_client *i2c)</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	chip = device_get_match_data(ddev);</div><div class='add'>+	if (!chip)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Save chip id to do special initialization when probing. */</div><div class='add'>+	dev-&gt;chip_id = chip-&gt;chip_id;</div><div class='ctx'> 	for (i = 0; i &lt; __KSZ_NUM_REGMAPS; i++) {</div><div class='ctx'> 		rc = ksz9477_regmap_config[i];</div><div class='ctx'> 		rc.lock_arg = &amp;dev-&gt;regmap_mutex;</div><div class='hunk'>@@ -111,14 +119,22 @@ static const struct of_device_id ksz9477_dt_ids[] = {</div><div class='ctx'> 		.compatible = "microchip,ksz9567",</div><div class='ctx'> 		.data = &amp;ksz_switch_chips[KSZ9567]</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,lan9646",</div><div class='add'>+		.data = &amp;ksz_switch_chips[LAN9646]</div><div class='add'>+	},</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, ksz9477_dt_ids);</div><div class='ctx'> </div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(ksz_i2c_pm_ops,</div><div class='add'>+				ksz_switch_suspend, ksz_switch_resume);</div><div class='add'>+</div><div class='ctx'> static struct i2c_driver ksz9477_i2c_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= "ksz9477-switch",</div><div class='ctx'> 		.of_match_table = ksz9477_dt_ids,</div><div class='add'>+		.pm = &amp;ksz_i2c_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = ksz9477_i2c_probe,</div><div class='ctx'> 	.remove	= ksz9477_i2c_remove,</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz9477_reg.h b/drivers/net/dsa/microchip/ksz9477_reg.h<br/>index 04235c22bf40..61ea11e3338e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477_reg.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz9477_reg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz9477_reg.h</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Microchip KSZ9477 register definitions</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2017-2018 Microchip Technology Inc.</div><div class='add'>+ * Copyright (C) 2017-2025 Microchip Technology Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __KSZ9477_REGS_H</div><div class='hunk'>@@ -165,8 +165,6 @@</div><div class='ctx'> #define SW_VLAN_ENABLE			BIT(7)</div><div class='ctx'> #define SW_DROP_INVALID_VID		BIT(6)</div><div class='ctx'> #define SW_AGE_CNT_M			GENMASK(5, 3)</div><div class='del'>-#define SW_AGE_CNT_S			3</div><div class='del'>-#define SW_AGE_PERIOD_10_8_M		GENMASK(10, 8)</div><div class='ctx'> #define SW_RESV_MCAST_ENABLE		BIT(2)</div><div class='ctx'> #define SW_HASH_OPTION_M		0x03</div><div class='ctx'> #define SW_HASH_OPTION_CRC		1</div><div class='hunk'>@@ -399,7 +397,6 @@</div><div class='ctx'> </div><div class='ctx'> #define ALU_RESV_MCAST_INDEX_M		(BIT(6) - 1)</div><div class='ctx'> #define ALU_STAT_START			BIT(7)</div><div class='del'>-#define ALU_RESV_MCAST_ADDR		BIT(1)</div><div class='ctx'> </div><div class='ctx'> #define REG_SW_ALU_VAL_A		0x0420</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c<br/>index f73833e24622..0c10351fe5eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_common.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Microchip switch driver main logic</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2017-2024 Microchip Technology Inc.</div><div class='add'>+ * Copyright (C) 2017-2025 Microchip Technology Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='ctx'> #include &lt;linux/micrel_phy.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='ctx'> #include &lt;net/ieee8021q.h&gt;</div><div class='ctx'> #include &lt;net/pkt_cls.h&gt;</div><div class='hunk'>@@ -265,16 +266,102 @@ static void ksz_phylink_mac_link_down(struct phylink_config *config,</div><div class='ctx'> 				      unsigned int mode,</div><div class='ctx'> 				      phy_interface_t interface);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ksz_phylink_mac_disable_tx_lpi() - Callback to signal LPI support (Dummy)</div><div class='add'>+ * @config: phylink config structure</div><div class='add'>+ *</div><div class='add'>+ * This function is a dummy handler. See ksz_phylink_mac_enable_tx_lpi() for</div><div class='add'>+ * a detailed explanation of EEE/LPI handling in KSZ switches.</div><div class='add'>+ */</div><div class='add'>+static void ksz_phylink_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_phylink_mac_enable_tx_lpi() - Callback to signal LPI support (Dummy)</div><div class='add'>+ * @config: phylink config structure</div><div class='add'>+ * @timer: timer value before entering LPI (unused)</div><div class='add'>+ * @tx_clock_stop: whether to stop the TX clock in LPI mode (unused)</div><div class='add'>+ *</div><div class='add'>+ * This function signals to phylink that the driver architecture supports</div><div class='add'>+ * LPI management, enabling phylink to control EEE advertisement during</div><div class='add'>+ * negotiation according to IEEE Std 802.3 (Clause 78).</div><div class='add'>+ *</div><div class='add'>+ * Hardware Management of EEE/LPI State:</div><div class='add'>+ * For KSZ switch ports with integrated PHYs (e.g., KSZ9893R ports 1-2),</div><div class='add'>+ * observation and testing suggest that the actual EEE / Low Power Idle (LPI)</div><div class='add'>+ * state transitions are managed autonomously by the hardware based on</div><div class='add'>+ * the auto-negotiation results. (Note: While the datasheet describes EEE</div><div class='add'>+ * operation based on negotiation, it doesn't explicitly detail the internal</div><div class='add'>+ * MAC/PHY interaction, so autonomous hardware management of the MAC state</div><div class='add'>+ * for LPI is inferred from observed behavior).</div><div class='add'>+ * This hardware control, consistent with the switch's ability to operate</div><div class='add'>+ * autonomously via strapping, means MAC-level software intervention is not</div><div class='add'>+ * required or exposed for managing the LPI state once EEE is negotiated.</div><div class='add'>+ * (Ref: KSZ9893R Data Sheet DS00002420D, primarily Section 4.7.5 explaining</div><div class='add'>+ * EEE, also Sections 4.1.7 on Auto-Negotiation and 3.2.1 on Configuration</div><div class='add'>+ * Straps).</div><div class='add'>+ *</div><div class='add'>+ * Additionally, ports configured as MAC interfaces (e.g., KSZ9893R port 3)</div><div class='add'>+ * lack documented MAC-level LPI control.</div><div class='add'>+ *</div><div class='add'>+ * Therefore, this callback performs no action and serves primarily to inform</div><div class='add'>+ * phylink of LPI awareness and to document the inferred hardware behavior.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 (Always success)</div><div class='add'>+ */</div><div class='add'>+static int ksz_phylink_mac_enable_tx_lpi(struct phylink_config *config,</div><div class='add'>+					 u32 timer, bool tx_clock_stop)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct phylink_mac_ops ksz88x3_phylink_mac_ops = {</div><div class='ctx'> 	.mac_config	= ksz88x3_phylink_mac_config,</div><div class='ctx'> 	.mac_link_down	= ksz_phylink_mac_link_down,</div><div class='ctx'> 	.mac_link_up	= ksz8_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = ksz_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = ksz_phylink_mac_enable_tx_lpi,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_mac_ops ksz8_phylink_mac_ops = {</div><div class='ctx'> 	.mac_config	= ksz_phylink_mac_config,</div><div class='ctx'> 	.mac_link_down	= ksz_phylink_mac_link_down,</div><div class='ctx'> 	.mac_link_up	= ksz8_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = ksz_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = ksz_phylink_mac_enable_tx_lpi,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ksz_dev_ops ksz8463_dev_ops = {</div><div class='add'>+	.setup = ksz8_setup,</div><div class='add'>+	.get_port_addr = ksz8463_get_port_addr,</div><div class='add'>+	.cfg_port_member = ksz8_cfg_port_member,</div><div class='add'>+	.flush_dyn_mac_table = ksz8_flush_dyn_mac_table,</div><div class='add'>+	.port_setup = ksz8_port_setup,</div><div class='add'>+	.r_phy = ksz8463_r_phy,</div><div class='add'>+	.w_phy = ksz8463_w_phy,</div><div class='add'>+	.r_mib_cnt = ksz8_r_mib_cnt,</div><div class='add'>+	.r_mib_pkt = ksz8_r_mib_pkt,</div><div class='add'>+	.r_mib_stat64 = ksz88xx_r_mib_stats64,</div><div class='add'>+	.freeze_mib = ksz8_freeze_mib,</div><div class='add'>+	.port_init_cnt = ksz8_port_init_cnt,</div><div class='add'>+	.fdb_dump = ksz8_fdb_dump,</div><div class='add'>+	.fdb_add = ksz8_fdb_add,</div><div class='add'>+	.fdb_del = ksz8_fdb_del,</div><div class='add'>+	.mdb_add = ksz8_mdb_add,</div><div class='add'>+	.mdb_del = ksz8_mdb_del,</div><div class='add'>+	.vlan_filtering = ksz8_port_vlan_filtering,</div><div class='add'>+	.vlan_add = ksz8_port_vlan_add,</div><div class='add'>+	.vlan_del = ksz8_port_vlan_del,</div><div class='add'>+	.mirror_add = ksz8_port_mirror_add,</div><div class='add'>+	.mirror_del = ksz8_port_mirror_del,</div><div class='add'>+	.get_caps = ksz8_get_caps,</div><div class='add'>+	.config_cpu_port = ksz8_config_cpu_port,</div><div class='add'>+	.enable_stp_addr = ksz8_enable_stp_addr,</div><div class='add'>+	.reset = ksz8_reset_switch,</div><div class='add'>+	.init = ksz8_switch_init,</div><div class='add'>+	.exit = ksz8_switch_exit,</div><div class='add'>+	.change_mtu = ksz8_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ksz_dev_ops ksz88xx_dev_ops = {</div><div class='hunk'>@@ -354,10 +441,29 @@ static void ksz9477_phylink_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 					int speed, int duplex, bool tx_pause,</div><div class='ctx'> 					bool rx_pause);</div><div class='ctx'> </div><div class='add'>+static struct phylink_pcs *</div><div class='add'>+ksz_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+			   phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ksz_device *dev = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct ksz_port *p = &amp;dev-&gt;ports[dp-&gt;index];</div><div class='add'>+</div><div class='add'>+	if (ksz_is_sgmii_port(dev, dp-&gt;index) &amp;&amp;</div><div class='add'>+	    (interface == PHY_INTERFACE_MODE_SGMII ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_1000BASEX))</div><div class='add'>+		return p-&gt;pcs;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct phylink_mac_ops ksz9477_phylink_mac_ops = {</div><div class='ctx'> 	.mac_config	= ksz_phylink_mac_config,</div><div class='ctx'> 	.mac_link_down	= ksz_phylink_mac_link_down,</div><div class='ctx'> 	.mac_link_up	= ksz9477_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = ksz_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = ksz_phylink_mac_enable_tx_lpi,</div><div class='add'>+	.mac_select_pcs	= ksz_phylink_mac_select_pcs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ksz_dev_ops ksz9477_dev_ops = {</div><div class='hunk'>@@ -395,12 +501,15 @@ static const struct ksz_dev_ops ksz9477_dev_ops = {</div><div class='ctx'> 	.reset = ksz9477_reset_switch,</div><div class='ctx'> 	.init = ksz9477_switch_init,</div><div class='ctx'> 	.exit = ksz9477_switch_exit,</div><div class='add'>+	.pcs_create = ksz9477_pcs_create,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_mac_ops lan937x_phylink_mac_ops = {</div><div class='ctx'> 	.mac_config	= ksz_phylink_mac_config,</div><div class='ctx'> 	.mac_link_down	= ksz_phylink_mac_link_down,</div><div class='ctx'> 	.mac_link_up	= ksz9477_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = ksz_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = ksz_phylink_mac_enable_tx_lpi,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ksz_dev_ops lan937x_dev_ops = {</div><div class='hunk'>@@ -411,6 +520,8 @@ static const struct ksz_dev_ops lan937x_dev_ops = {</div><div class='ctx'> 	.flush_dyn_mac_table = ksz9477_flush_dyn_mac_table,</div><div class='ctx'> 	.port_setup = lan937x_port_setup,</div><div class='ctx'> 	.set_ageing_time = lan937x_set_ageing_time,</div><div class='add'>+	.mdio_bus_preinit = lan937x_mdio_bus_preinit,</div><div class='add'>+	.create_phy_addr_map = lan937x_create_phy_addr_map,</div><div class='ctx'> 	.r_phy = lan937x_r_phy,</div><div class='ctx'> 	.w_phy = lan937x_w_phy,</div><div class='ctx'> 	.r_mib_cnt = ksz9477_r_mib_cnt,</div><div class='hunk'>@@ -439,6 +550,60 @@ static const struct ksz_dev_ops lan937x_dev_ops = {</div><div class='ctx'> 	.exit = lan937x_switch_exit,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const u16 ksz8463_regs[] = {</div><div class='add'>+	[REG_SW_MAC_ADDR]		= 0x10,</div><div class='add'>+	[REG_IND_CTRL_0]		= 0x30,</div><div class='add'>+	[REG_IND_DATA_8]		= 0x26,</div><div class='add'>+	[REG_IND_DATA_CHECK]		= 0x26,</div><div class='add'>+	[REG_IND_DATA_HI]		= 0x28,</div><div class='add'>+	[REG_IND_DATA_LO]		= 0x2C,</div><div class='add'>+	[REG_IND_MIB_CHECK]		= 0x2F,</div><div class='add'>+	[P_FORCE_CTRL]			= 0x0C,</div><div class='add'>+	[P_LINK_STATUS]			= 0x0E,</div><div class='add'>+	[P_LOCAL_CTRL]			= 0x0C,</div><div class='add'>+	[P_NEG_RESTART_CTRL]		= 0x0D,</div><div class='add'>+	[P_REMOTE_STATUS]		= 0x0E,</div><div class='add'>+	[P_SPEED_STATUS]		= 0x0F,</div><div class='add'>+	[S_TAIL_TAG_CTRL]		= 0xAD,</div><div class='add'>+	[P_STP_CTRL]			= 0x6F,</div><div class='add'>+	[S_START_CTRL]			= 0x01,</div><div class='add'>+	[S_BROADCAST_CTRL]		= 0x06,</div><div class='add'>+	[S_MULTICAST_CTRL]		= 0x04,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 ksz8463_masks[] = {</div><div class='add'>+	[PORT_802_1P_REMAPPING]		= BIT(3),</div><div class='add'>+	[SW_TAIL_TAG_ENABLE]		= BIT(0),</div><div class='add'>+	[MIB_COUNTER_OVERFLOW]		= BIT(7),</div><div class='add'>+	[MIB_COUNTER_VALID]		= BIT(6),</div><div class='add'>+	[VLAN_TABLE_FID]		= GENMASK(15, 12),</div><div class='add'>+	[VLAN_TABLE_MEMBERSHIP]		= GENMASK(18, 16),</div><div class='add'>+	[VLAN_TABLE_VALID]		= BIT(19),</div><div class='add'>+	[STATIC_MAC_TABLE_VALID]	= BIT(19),</div><div class='add'>+	[STATIC_MAC_TABLE_USE_FID]	= BIT(21),</div><div class='add'>+	[STATIC_MAC_TABLE_FID]		= GENMASK(25, 22),</div><div class='add'>+	[STATIC_MAC_TABLE_OVERRIDE]	= BIT(20),</div><div class='add'>+	[STATIC_MAC_TABLE_FWD_PORTS]	= GENMASK(18, 16),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_ENTRIES_H]	= GENMASK(1, 0),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_MAC_EMPTY]	= BIT(2),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_NOT_READY]	= BIT(7),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_ENTRIES]	= GENMASK(31, 24),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_FID]		= GENMASK(19, 16),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_SRC_PORT]	= GENMASK(21, 20),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_TIMESTAMP]	= GENMASK(23, 22),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u8 ksz8463_shifts[] = {</div><div class='add'>+	[VLAN_TABLE_MEMBERSHIP_S]	= 16,</div><div class='add'>+	[STATIC_MAC_FWD_PORTS]		= 16,</div><div class='add'>+	[STATIC_MAC_FID]		= 22,</div><div class='add'>+	[DYNAMIC_MAC_ENTRIES_H]		= 8,</div><div class='add'>+	[DYNAMIC_MAC_ENTRIES]		= 24,</div><div class='add'>+	[DYNAMIC_MAC_FID]		= 16,</div><div class='add'>+	[DYNAMIC_MAC_TIMESTAMP]		= 22,</div><div class='add'>+	[DYNAMIC_MAC_SRC_PORT]		= 20,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const u16 ksz8795_regs[] = {</div><div class='ctx'> 	[REG_SW_MAC_ADDR]		= 0x68,</div><div class='ctx'> 	[REG_IND_CTRL_0]		= 0x6E,</div><div class='hunk'>@@ -643,6 +808,8 @@ static const u16 ksz9477_regs[] = {</div><div class='ctx'> static const u32 ksz9477_masks[] = {</div><div class='ctx'> 	[ALU_STAT_WRITE]		= 0,</div><div class='ctx'> 	[ALU_STAT_READ]			= 1,</div><div class='add'>+	[ALU_STAT_DIRECT]		= 0,</div><div class='add'>+	[ALU_RESV_MCAST_ADDR]		= BIT(1),</div><div class='ctx'> 	[P_MII_TX_FLOW_CTRL]		= BIT(5),</div><div class='ctx'> 	[P_MII_RX_FLOW_CTRL]		= BIT(3),</div><div class='ctx'> };</div><div class='hunk'>@@ -670,6 +837,8 @@ static const u8 ksz9477_xmii_ctrl1[] = {</div><div class='ctx'> static const u32 lan937x_masks[] = {</div><div class='ctx'> 	[ALU_STAT_WRITE]		= 1,</div><div class='ctx'> 	[ALU_STAT_READ]			= 2,</div><div class='add'>+	[ALU_STAT_DIRECT]		= BIT(3),</div><div class='add'>+	[ALU_RESV_MCAST_ADDR]		= BIT(2),</div><div class='ctx'> 	[P_MII_TX_FLOW_CTRL]		= BIT(5),</div><div class='ctx'> 	[P_MII_RX_FLOW_CTRL]		= BIT(3),</div><div class='ctx'> };</div><div class='hunk'>@@ -1033,8 +1202,7 @@ static const struct regmap_range ksz9477_valid_regs[] = {</div><div class='ctx'> 	regmap_reg_range(0x701b, 0x701b),</div><div class='ctx'> 	regmap_reg_range(0x701f, 0x7020),</div><div class='ctx'> 	regmap_reg_range(0x7030, 0x7030),</div><div class='del'>-	regmap_reg_range(0x7200, 0x7203),</div><div class='del'>-	regmap_reg_range(0x7206, 0x7207),</div><div class='add'>+	regmap_reg_range(0x7200, 0x7207),</div><div class='ctx'> 	regmap_reg_range(0x7300, 0x7301),</div><div class='ctx'> 	regmap_reg_range(0x7400, 0x7401),</div><div class='ctx'> 	regmap_reg_range(0x7403, 0x7403),</div><div class='hunk'>@@ -1098,10 +1266,9 @@ static const struct regmap_range ksz9896_valid_regs[] = {</div><div class='ctx'> 	regmap_reg_range(0x1030, 0x1030),</div><div class='ctx'> 	regmap_reg_range(0x1100, 0x1115),</div><div class='ctx'> 	regmap_reg_range(0x111a, 0x111f),</div><div class='del'>-	regmap_reg_range(0x1122, 0x1127),</div><div class='del'>-	regmap_reg_range(0x112a, 0x112b),</div><div class='del'>-	regmap_reg_range(0x1136, 0x1139),</div><div class='del'>-	regmap_reg_range(0x113e, 0x113f),</div><div class='add'>+	regmap_reg_range(0x1120, 0x112b),</div><div class='add'>+	regmap_reg_range(0x1134, 0x113b),</div><div class='add'>+	regmap_reg_range(0x113c, 0x113f),</div><div class='ctx'> 	regmap_reg_range(0x1400, 0x1401),</div><div class='ctx'> 	regmap_reg_range(0x1403, 0x1403),</div><div class='ctx'> 	regmap_reg_range(0x1410, 0x1417),</div><div class='hunk'>@@ -1128,10 +1295,9 @@ static const struct regmap_range ksz9896_valid_regs[] = {</div><div class='ctx'> 	regmap_reg_range(0x2030, 0x2030),</div><div class='ctx'> 	regmap_reg_range(0x2100, 0x2115),</div><div class='ctx'> 	regmap_reg_range(0x211a, 0x211f),</div><div class='del'>-	regmap_reg_range(0x2122, 0x2127),</div><div class='del'>-	regmap_reg_range(0x212a, 0x212b),</div><div class='del'>-	regmap_reg_range(0x2136, 0x2139),</div><div class='del'>-	regmap_reg_range(0x213e, 0x213f),</div><div class='add'>+	regmap_reg_range(0x2120, 0x212b),</div><div class='add'>+	regmap_reg_range(0x2134, 0x213b),</div><div class='add'>+	regmap_reg_range(0x213c, 0x213f),</div><div class='ctx'> 	regmap_reg_range(0x2400, 0x2401),</div><div class='ctx'> 	regmap_reg_range(0x2403, 0x2403),</div><div class='ctx'> 	regmap_reg_range(0x2410, 0x2417),</div><div class='hunk'>@@ -1158,10 +1324,9 @@ static const struct regmap_range ksz9896_valid_regs[] = {</div><div class='ctx'> 	regmap_reg_range(0x3030, 0x3030),</div><div class='ctx'> 	regmap_reg_range(0x3100, 0x3115),</div><div class='ctx'> 	regmap_reg_range(0x311a, 0x311f),</div><div class='del'>-	regmap_reg_range(0x3122, 0x3127),</div><div class='del'>-	regmap_reg_range(0x312a, 0x312b),</div><div class='del'>-	regmap_reg_range(0x3136, 0x3139),</div><div class='del'>-	regmap_reg_range(0x313e, 0x313f),</div><div class='add'>+	regmap_reg_range(0x3120, 0x312b),</div><div class='add'>+	regmap_reg_range(0x3134, 0x313b),</div><div class='add'>+	regmap_reg_range(0x313c, 0x313f),</div><div class='ctx'> 	regmap_reg_range(0x3400, 0x3401),</div><div class='ctx'> 	regmap_reg_range(0x3403, 0x3403),</div><div class='ctx'> 	regmap_reg_range(0x3410, 0x3417),</div><div class='hunk'>@@ -1188,10 +1353,9 @@ static const struct regmap_range ksz9896_valid_regs[] = {</div><div class='ctx'> 	regmap_reg_range(0x4030, 0x4030),</div><div class='ctx'> 	regmap_reg_range(0x4100, 0x4115),</div><div class='ctx'> 	regmap_reg_range(0x411a, 0x411f),</div><div class='del'>-	regmap_reg_range(0x4122, 0x4127),</div><div class='del'>-	regmap_reg_range(0x412a, 0x412b),</div><div class='del'>-	regmap_reg_range(0x4136, 0x4139),</div><div class='del'>-	regmap_reg_range(0x413e, 0x413f),</div><div class='add'>+	regmap_reg_range(0x4120, 0x412b),</div><div class='add'>+	regmap_reg_range(0x4134, 0x413b),</div><div class='add'>+	regmap_reg_range(0x413c, 0x413f),</div><div class='ctx'> 	regmap_reg_range(0x4400, 0x4401),</div><div class='ctx'> 	regmap_reg_range(0x4403, 0x4403),</div><div class='ctx'> 	regmap_reg_range(0x4410, 0x4417),</div><div class='hunk'>@@ -1218,10 +1382,9 @@ static const struct regmap_range ksz9896_valid_regs[] = {</div><div class='ctx'> 	regmap_reg_range(0x5030, 0x5030),</div><div class='ctx'> 	regmap_reg_range(0x5100, 0x5115),</div><div class='ctx'> 	regmap_reg_range(0x511a, 0x511f),</div><div class='del'>-	regmap_reg_range(0x5122, 0x5127),</div><div class='del'>-	regmap_reg_range(0x512a, 0x512b),</div><div class='del'>-	regmap_reg_range(0x5136, 0x5139),</div><div class='del'>-	regmap_reg_range(0x513e, 0x513f),</div><div class='add'>+	regmap_reg_range(0x5120, 0x512b),</div><div class='add'>+	regmap_reg_range(0x5134, 0x513b),</div><div class='add'>+	regmap_reg_range(0x513c, 0x513f),</div><div class='ctx'> 	regmap_reg_range(0x5400, 0x5401),</div><div class='ctx'> 	regmap_reg_range(0x5403, 0x5403),</div><div class='ctx'> 	regmap_reg_range(0x5410, 0x5417),</div><div class='hunk'>@@ -1248,10 +1411,9 @@ static const struct regmap_range ksz9896_valid_regs[] = {</div><div class='ctx'> 	regmap_reg_range(0x6030, 0x6030),</div><div class='ctx'> 	regmap_reg_range(0x6100, 0x6115),</div><div class='ctx'> 	regmap_reg_range(0x611a, 0x611f),</div><div class='del'>-	regmap_reg_range(0x6122, 0x6127),</div><div class='del'>-	regmap_reg_range(0x612a, 0x612b),</div><div class='del'>-	regmap_reg_range(0x6136, 0x6139),</div><div class='del'>-	regmap_reg_range(0x613e, 0x613f),</div><div class='add'>+	regmap_reg_range(0x6120, 0x612b),</div><div class='add'>+	regmap_reg_range(0x6134, 0x613b),</div><div class='add'>+	regmap_reg_range(0x613c, 0x613f),</div><div class='ctx'> 	regmap_reg_range(0x6300, 0x6301),</div><div class='ctx'> 	regmap_reg_range(0x6400, 0x6401),</div><div class='ctx'> 	regmap_reg_range(0x6403, 0x6403),</div><div class='hunk'>@@ -1290,6 +1452,7 @@ static const struct regmap_range ksz8873_valid_regs[] = {</div><div class='ctx'> 	regmap_reg_range(0x3f, 0x3f),</div><div class='ctx'> </div><div class='ctx'> 	/* advanced control registers */</div><div class='add'>+	regmap_reg_range(0x43, 0x43),</div><div class='ctx'> 	regmap_reg_range(0x60, 0x6f),</div><div class='ctx'> 	regmap_reg_range(0x70, 0x75),</div><div class='ctx'> 	regmap_reg_range(0x76, 0x78),</div><div class='hunk'>@@ -1316,6 +1479,29 @@ static const struct regmap_access_table ksz8873_register_set = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='add'>+	[KSZ8463] = {</div><div class='add'>+		.chip_id = KSZ8463_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ8463",</div><div class='add'>+		.num_vlans = 16,</div><div class='add'>+		.num_alus = 0,</div><div class='add'>+		.num_statics = 8,</div><div class='add'>+		.cpu_ports = 0x4,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 3,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 4,</div><div class='add'>+		.ops = &amp;ksz8463_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz88x3_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz88xx_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz88xx_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz8463_regs,</div><div class='add'>+		.masks = ksz8463_masks,</div><div class='add'>+		.shifts = ksz8463_shifts,</div><div class='add'>+		.supports_mii = {false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, true},</div><div class='add'>+		.internal_phy = {true, true, false},</div><div class='add'>+	},</div><div class='add'>+</div><div class='ctx'> 	[KSZ8563] = {</div><div class='ctx'> 		.chip_id = KSZ8563_CHIP_ID,</div><div class='ctx'> 		.dev_name = "KSZ8563",</div><div class='hunk'>@@ -1343,6 +1529,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.supports_rgmii = {false, false, true},</div><div class='ctx'> 		.internal_phy = {true, true, false},</div><div class='ctx'> 		.gbit_capable = {false, false, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='ctx'> 		.wr_table = &amp;ksz8563_register_set,</div><div class='ctx'> 		.rd_table = &amp;ksz8563_register_set,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -1554,6 +1741,8 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.internal_phy	= {true, true, true, true,</div><div class='ctx'> 				   true, false, false},</div><div class='ctx'> 		.gbit_capable	= {true, true, true, true, true, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+		.sgmii_port = 7,</div><div class='ctx'> 		.wr_table = &amp;ksz9477_register_set,</div><div class='ctx'> 		.rd_table = &amp;ksz9477_register_set,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -1681,6 +1870,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.supports_rgmii = {false, false, true},</div><div class='ctx'> 		.internal_phy = {true, true, false},</div><div class='ctx'> 		.gbit_capable = {true, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> 	[KSZ8567] = {</div><div class='hunk'>@@ -1716,6 +1906,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 				   true, false, false},</div><div class='ctx'> 		.gbit_capable	= {false, false, false, false, false,</div><div class='ctx'> 				   true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> 	[KSZ9567] = {</div><div class='hunk'>@@ -1748,6 +1939,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.internal_phy	= {true, true, true, true,</div><div class='ctx'> 				   true, false, false},</div><div class='ctx'> 		.gbit_capable	= {true, true, true, true, true, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> 	[LAN9370] = {</div><div class='hunk'>@@ -1762,6 +1954,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.num_tx_queues = 8,</div><div class='ctx'> 		.num_ipms = 8,</div><div class='ctx'> 		.tc_cbs_supported = true,</div><div class='add'>+		.phy_side_mdio_supported = true,</div><div class='ctx'> 		.ops = &amp;lan937x_dev_ops,</div><div class='ctx'> 		.phylink_mac_ops = &amp;lan937x_phylink_mac_ops,</div><div class='ctx'> 		.mib_names = ksz9477_mib_names,</div><div class='hunk'>@@ -1776,6 +1969,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.supports_rmii = {false, false, false, false, true},</div><div class='ctx'> 		.supports_rgmii = {false, false, false, false, true},</div><div class='ctx'> 		.internal_phy = {true, true, true, true, false},</div><div class='add'>+		.ptp_capable = true,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> 	[LAN9371] = {</div><div class='hunk'>@@ -1790,6 +1984,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.num_tx_queues = 8,</div><div class='ctx'> 		.num_ipms = 8,</div><div class='ctx'> 		.tc_cbs_supported = true,</div><div class='add'>+		.phy_side_mdio_supported = true,</div><div class='ctx'> 		.ops = &amp;lan937x_dev_ops,</div><div class='ctx'> 		.phylink_mac_ops = &amp;lan937x_phylink_mac_ops,</div><div class='ctx'> 		.mib_names = ksz9477_mib_names,</div><div class='hunk'>@@ -1804,6 +1999,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.supports_rmii = {false, false, false, false, true, true},</div><div class='ctx'> 		.supports_rgmii = {false, false, false, false, true, true},</div><div class='ctx'> 		.internal_phy = {true, true, true, true, false, false},</div><div class='add'>+		.ptp_capable = true,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> 	[LAN9372] = {</div><div class='hunk'>@@ -1818,6 +2014,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.num_tx_queues = 8,</div><div class='ctx'> 		.num_ipms = 8,</div><div class='ctx'> 		.tc_cbs_supported = true,</div><div class='add'>+		.phy_side_mdio_supported = true,</div><div class='ctx'> 		.ops = &amp;lan937x_dev_ops,</div><div class='ctx'> 		.phylink_mac_ops = &amp;lan937x_phylink_mac_ops,</div><div class='ctx'> 		.mib_names = ksz9477_mib_names,</div><div class='hunk'>@@ -1836,6 +2033,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 				   true, true, false, false},</div><div class='ctx'> 		.internal_phy	= {true, true, true, true,</div><div class='ctx'> 				   false, false, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> 	[LAN9373] = {</div><div class='hunk'>@@ -1850,6 +2048,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.num_tx_queues = 8,</div><div class='ctx'> 		.num_ipms = 8,</div><div class='ctx'> 		.tc_cbs_supported = true,</div><div class='add'>+		.phy_side_mdio_supported = true,</div><div class='ctx'> 		.ops = &amp;lan937x_dev_ops,</div><div class='ctx'> 		.phylink_mac_ops = &amp;lan937x_phylink_mac_ops,</div><div class='ctx'> 		.mib_names = ksz9477_mib_names,</div><div class='hunk'>@@ -1868,6 +2067,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 				   true, true, false, false},</div><div class='ctx'> 		.internal_phy	= {true, true, true, false,</div><div class='ctx'> 				   false, false, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> 	[LAN9374] = {</div><div class='hunk'>@@ -1882,6 +2082,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 		.num_tx_queues = 8,</div><div class='ctx'> 		.num_ipms = 8,</div><div class='ctx'> 		.tc_cbs_supported = true,</div><div class='add'>+		.phy_side_mdio_supported = true,</div><div class='ctx'> 		.ops = &amp;lan937x_dev_ops,</div><div class='ctx'> 		.phylink_mac_ops = &amp;lan937x_phylink_mac_ops,</div><div class='ctx'> 		.mib_names = ksz9477_mib_names,</div><div class='hunk'>@@ -1900,6 +2101,43 @@ const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='ctx'> 				   true, true, false, false},</div><div class='ctx'> 		.internal_phy	= {true, true, true, true,</div><div class='ctx'> 				   false, false, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[LAN9646] = {</div><div class='add'>+		.chip_id = LAN9646_CHIP_ID,</div><div class='add'>+		.dev_name = "LAN9646",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 4096,</div><div class='add'>+		.num_statics = 16,</div><div class='add'>+		.cpu_ports = 0x7F,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 7,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 4,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.ops = &amp;ksz9477_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz9477_phylink_mac_ops,</div><div class='add'>+		.phy_errata_9477 = true,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = ksz9477_masks,</div><div class='add'>+		.shifts = ksz9477_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii	= {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.supports_rmii	= {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.internal_phy	= {true, true, true, true,</div><div class='add'>+				   true, false, false},</div><div class='add'>+		.gbit_capable	= {true, true, true, true, true, true, true},</div><div class='add'>+		.sgmii_port = 7,</div><div class='add'>+		.wr_table = &amp;ksz9477_register_set,</div><div class='add'>+		.rd_table = &amp;ksz9477_register_set,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(ksz_switch_chips);</div><div class='hunk'>@@ -1970,6 +2208,18 @@ static void ksz_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;dev_ops-&gt;get_caps)</div><div class='ctx'> 		dev-&gt;dev_ops-&gt;get_caps(dev, port, config);</div><div class='add'>+</div><div class='add'>+	if (ds-&gt;ops-&gt;support_eee &amp;&amp; ds-&gt;ops-&gt;support_eee(ds, port)) {</div><div class='add'>+		memcpy(config-&gt;lpi_interfaces, config-&gt;supported_interfaces,</div><div class='add'>+		       sizeof(config-&gt;lpi_interfaces));</div><div class='add'>+</div><div class='add'>+		config-&gt;lpi_capabilities = MAC_100FD;</div><div class='add'>+		if (dev-&gt;info-&gt;gbit_capable[port])</div><div class='add'>+			config-&gt;lpi_capabilities |= MAC_1000FD;</div><div class='add'>+</div><div class='add'>+		/* EEE is fully operational */</div><div class='add'>+		config-&gt;eee_enabled_default = true;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ksz_r_mib_stats64(struct ksz_device *dev, int port)</div><div class='hunk'>@@ -2021,7 +2271,7 @@ void ksz_r_mib_stats64(struct ksz_device *dev, int port)</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;mib-&gt;stats64_lock);</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;info-&gt;phy_errata_9477) {</div><div class='add'>+	if (dev-&gt;info-&gt;phy_errata_9477 &amp;&amp; !ksz_is_sgmii_port(dev, port)) {</div><div class='ctx'> 		ret = ksz9477_errata_monitor(dev, port, raw-&gt;tx_late_col);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			dev_err(dev-&gt;dev, "Failed to monitor transmission halt\n");</div><div class='hunk'>@@ -2212,6 +2462,12 @@ static void ksz_update_port_member(struct ksz_device *dev, int port)</div><div class='ctx'> 		dev-&gt;dev_ops-&gt;cfg_port_member(dev, i, val | cpu_port);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* HSR ports are setup once so need to use the assigned membership</div><div class='add'>+	 * when the port is enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (!port_member &amp;&amp; p-&gt;stp_state == BR_STATE_FORWARDING &amp;&amp;</div><div class='add'>+	    (dev-&gt;hsr_ports &amp; BIT(port)))</div><div class='add'>+		port_member = dev-&gt;hsr_ports;</div><div class='ctx'> 	dev-&gt;dev_ops-&gt;cfg_port_member(dev, port, port_member | cpu_port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2236,19 +2492,103 @@ static int ksz_sw_mdio_write(struct mii_bus *bus, int addr, int regnum,</div><div class='ctx'> 	return dev-&gt;dev_ops-&gt;w_phy(dev, addr, regnum, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ksz_parent_mdio_read - Read data from a PHY register on the parent MDIO bus.</div><div class='add'>+ * @bus: MDIO bus structure.</div><div class='add'>+ * @addr: PHY address on the parent MDIO bus.</div><div class='add'>+ * @regnum: Register number to read.</div><div class='add'>+ *</div><div class='add'>+ * This function provides a direct read operation on the parent MDIO bus for</div><div class='add'>+ * accessing PHY registers. By bypassing SPI or I2C, it uses the parent MDIO bus</div><div class='add'>+ * to retrieve data from the PHY registers at the specified address and register</div><div class='add'>+ * number.</div><div class='add'>+ *</div><div class='add'>+ * Return: Value of the PHY register, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz_parent_mdio_read(struct mii_bus *bus, int addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return mdiobus_read_nested(dev-&gt;parent_mdio_bus, addr, regnum);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_parent_mdio_write - Write data to a PHY register on the parent MDIO bus.</div><div class='add'>+ * @bus: MDIO bus structure.</div><div class='add'>+ * @addr: PHY address on the parent MDIO bus.</div><div class='add'>+ * @regnum: Register number to write to.</div><div class='add'>+ * @val: Value to write to the PHY register.</div><div class='add'>+ *</div><div class='add'>+ * This function provides a direct write operation on the parent MDIO bus for</div><div class='add'>+ * accessing PHY registers. Bypassing SPI or I2C, it uses the parent MDIO bus</div><div class='add'>+ * to modify the PHY register values at the specified address.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz_parent_mdio_write(struct mii_bus *bus, int addr, int regnum,</div><div class='add'>+				 u16 val)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return mdiobus_write_nested(dev-&gt;parent_mdio_bus, addr, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_phy_addr_to_port - Map a PHY address to the corresponding switch port.</div><div class='add'>+ * @dev: Pointer to device structure.</div><div class='add'>+ * @addr: PHY address to map to a port.</div><div class='add'>+ *</div><div class='add'>+ * This function finds the corresponding switch port for a given PHY address by</div><div class='add'>+ * iterating over all user ports on the device. It checks if a port's PHY</div><div class='add'>+ * address in `phy_addr_map` matches the specified address and if the port</div><div class='add'>+ * contains an internal PHY. If a match is found, the index of the port is</div><div class='add'>+ * returned.</div><div class='add'>+ *</div><div class='add'>+ * Return: Port index on success, or -EINVAL if no matching port is found.</div><div class='add'>+ */</div><div class='add'>+static int ksz_phy_addr_to_port(struct ksz_device *dev, int addr)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, ds) {</div><div class='add'>+		if (dev-&gt;info-&gt;internal_phy[dp-&gt;index] &amp;&amp;</div><div class='add'>+		    dev-&gt;phy_addr_map[dp-&gt;index] == addr)</div><div class='add'>+			return dp-&gt;index;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_irq_phy_setup - Configure IRQs for PHYs in the KSZ device.</div><div class='add'>+ * @dev: Pointer to the KSZ device structure.</div><div class='add'>+ *</div><div class='add'>+ * Sets up IRQs for each active PHY connected to the KSZ switch by mapping the</div><div class='add'>+ * appropriate IRQs for each PHY and assigning them to the `user_mii_bus` in</div><div class='add'>+ * the DSA switch structure. Each IRQ is mapped based on the port's IRQ domain.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='ctx'> static int ksz_irq_phy_setup(struct ksz_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dsa_switch *ds = dev-&gt;ds;</div><div class='del'>-	int phy;</div><div class='add'>+	int phy, port;</div><div class='ctx'> 	int irq;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	for (phy = 0; phy &lt; KSZ_MAX_NUM_PORTS; phy++) {</div><div class='add'>+	for (phy = 0; phy &lt; PHY_MAX_ADDR; phy++) {</div><div class='ctx'> 		if (BIT(phy) &amp; ds-&gt;phys_mii_mask) {</div><div class='del'>-			irq = irq_find_mapping(dev-&gt;ports[phy].pirq.domain,</div><div class='add'>+			port = ksz_phy_addr_to_port(dev, phy);</div><div class='add'>+			if (port &lt; 0) {</div><div class='add'>+				ret = port;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			irq = irq_find_mapping(dev-&gt;ports[port].pirq.domain,</div><div class='ctx'> 					       PORT_SRC_PHY_INT);</div><div class='del'>-			if (irq &lt; 0) {</div><div class='del'>-				ret = irq;</div><div class='add'>+			if (!irq) {</div><div class='add'>+				ret = -EINVAL;</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='ctx'> 			ds-&gt;user_mii_bus-&gt;irq[phy] = irq;</div><div class='hunk'>@@ -2263,49 +2603,187 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ksz_irq_phy_free - Release IRQ mappings for PHYs in the KSZ device.</div><div class='add'>+ * @dev: Pointer to the KSZ device structure.</div><div class='add'>+ *</div><div class='add'>+ * Releases any IRQ mappings previously assigned to active PHYs in the KSZ</div><div class='add'>+ * switch by disposing of each mapped IRQ in the `user_mii_bus` structure.</div><div class='add'>+ */</div><div class='ctx'> static void ksz_irq_phy_free(struct ksz_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dsa_switch *ds = dev-&gt;ds;</div><div class='ctx'> 	int phy;</div><div class='ctx'> </div><div class='del'>-	for (phy = 0; phy &lt; KSZ_MAX_NUM_PORTS; phy++)</div><div class='add'>+	for (phy = 0; phy &lt; PHY_MAX_ADDR; phy++)</div><div class='ctx'> 		if (BIT(phy) &amp; ds-&gt;phys_mii_mask)</div><div class='ctx'> 			irq_dispose_mapping(ds-&gt;user_mii_bus-&gt;irq[phy]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ksz_parse_dt_phy_config - Parse and validate PHY configuration from DT</div><div class='add'>+ * @dev: pointer to the KSZ device structure</div><div class='add'>+ * @bus: pointer to the MII bus structure</div><div class='add'>+ * @mdio_np: pointer to the MDIO node in the device tree</div><div class='add'>+ *</div><div class='add'>+ * This function parses and validates PHY configurations for each user port</div><div class='add'>+ * defined in the device tree for a KSZ switch device. It verifies that the</div><div class='add'>+ * `phy-handle` properties are correctly set and that the internal PHYs match</div><div class='add'>+ * expected addresses and parent nodes. Sets up the PHY mask in the MII bus if</div><div class='add'>+ * all validations pass. Logs error messages for any mismatches or missing data.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz_parse_dt_phy_config(struct ksz_device *dev, struct mii_bus *bus,</div><div class='add'>+				   struct device_node *mdio_np)</div><div class='add'>+{</div><div class='add'>+	struct device_node *phy_node, *phy_parent_node;</div><div class='add'>+	bool phys_are_valid = true;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	u32 phy_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, dev-&gt;ds) {</div><div class='add'>+		if (!dev-&gt;info-&gt;internal_phy[dp-&gt;index])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		phy_node = of_parse_phandle(dp-&gt;dn, "phy-handle", 0);</div><div class='add'>+		if (!phy_node) {</div><div class='add'>+			dev_err(dev-&gt;dev, "failed to parse phy-handle for port %d.\n",</div><div class='add'>+				dp-&gt;index);</div><div class='add'>+			phys_are_valid = false;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phy_parent_node = of_get_parent(phy_node);</div><div class='add'>+		if (!phy_parent_node) {</div><div class='add'>+			dev_err(dev-&gt;dev, "failed to get PHY-parent node for port %d\n",</div><div class='add'>+				dp-&gt;index);</div><div class='add'>+			phys_are_valid = false;</div><div class='add'>+		} else if (phy_parent_node != mdio_np) {</div><div class='add'>+			dev_err(dev-&gt;dev, "PHY-parent node mismatch for port %d, expected %pOF, got %pOF\n",</div><div class='add'>+				dp-&gt;index, mdio_np, phy_parent_node);</div><div class='add'>+			phys_are_valid = false;</div><div class='add'>+		} else {</div><div class='add'>+			ret = of_property_read_u32(phy_node, "reg", &amp;phy_addr);</div><div class='add'>+			if (ret &lt; 0) {</div><div class='add'>+				dev_err(dev-&gt;dev, "failed to read PHY address for port %d. Error %d\n",</div><div class='add'>+					dp-&gt;index, ret);</div><div class='add'>+				phys_are_valid = false;</div><div class='add'>+			} else if (phy_addr != dev-&gt;phy_addr_map[dp-&gt;index]) {</div><div class='add'>+				dev_err(dev-&gt;dev, "PHY address mismatch for port %d, expected 0x%x, got 0x%x\n",</div><div class='add'>+					dp-&gt;index, dev-&gt;phy_addr_map[dp-&gt;index],</div><div class='add'>+					phy_addr);</div><div class='add'>+				phys_are_valid = false;</div><div class='add'>+			} else {</div><div class='add'>+				bus-&gt;phy_mask |= BIT(phy_addr);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		of_node_put(phy_node);</div><div class='add'>+		of_node_put(phy_parent_node);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!phys_are_valid)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_mdio_register - Register and configure the MDIO bus for the KSZ device.</div><div class='add'>+ * @dev: Pointer to the KSZ device structure.</div><div class='add'>+ *</div><div class='add'>+ * This function sets up and registers an MDIO bus for the KSZ switch device,</div><div class='add'>+ * allowing access to its internal PHYs. If the device supports side MDIO,</div><div class='add'>+ * the function will configure the external MDIO controller specified by the</div><div class='add'>+ * "mdio-parent-bus" device tree property to directly manage internal PHYs.</div><div class='add'>+ * Otherwise, SPI or I2C access is set up for PHY access.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='ctx'> static int ksz_mdio_register(struct ksz_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *parent_bus_node;</div><div class='add'>+	struct mii_bus *parent_bus = NULL;</div><div class='ctx'> 	struct dsa_switch *ds = dev-&gt;ds;</div><div class='ctx'> 	struct device_node *mdio_np;</div><div class='ctx'> 	struct mii_bus *bus;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	mdio_np = of_get_child_by_name(dev-&gt;dev-&gt;of_node, "mdio");</div><div class='ctx'> 	if (!mdio_np)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	parent_bus_node = of_parse_phandle(mdio_np, "mdio-parent-bus", 0);</div><div class='add'>+	if (parent_bus_node &amp;&amp; !dev-&gt;info-&gt;phy_side_mdio_supported) {</div><div class='add'>+		dev_err(dev-&gt;dev, "Side MDIO bus is not supported for this HW, ignoring 'mdio-parent-bus' property.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+		goto put_mdio_node;</div><div class='add'>+	} else if (parent_bus_node) {</div><div class='add'>+		parent_bus = of_mdio_find_bus(parent_bus_node);</div><div class='add'>+		if (!parent_bus) {</div><div class='add'>+			ret = -EPROBE_DEFER;</div><div class='add'>+</div><div class='add'>+			goto put_mdio_node;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev-&gt;parent_mdio_bus = parent_bus;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	bus = devm_mdiobus_alloc(ds-&gt;dev);</div><div class='ctx'> 	if (!bus) {</div><div class='del'>-		of_node_put(mdio_np);</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto put_mdio_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;mdio_bus_preinit) {</div><div class='add'>+		ret = dev-&gt;dev_ops-&gt;mdio_bus_preinit(dev, !!parent_bus);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto put_mdio_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;create_phy_addr_map) {</div><div class='add'>+		ret = dev-&gt;dev_ops-&gt;create_phy_addr_map(dev, !!parent_bus);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto put_mdio_node;</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++)</div><div class='add'>+			dev-&gt;phy_addr_map[i] = i;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bus-&gt;priv = dev;</div><div class='del'>-	bus-&gt;read = ksz_sw_mdio_read;</div><div class='del'>-	bus-&gt;write = ksz_sw_mdio_write;</div><div class='del'>-	bus-&gt;name = "ksz user smi";</div><div class='del'>-	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "SMI-%d", ds-&gt;index);</div><div class='add'>+	if (parent_bus) {</div><div class='add'>+		bus-&gt;read = ksz_parent_mdio_read;</div><div class='add'>+		bus-&gt;write = ksz_parent_mdio_write;</div><div class='add'>+		bus-&gt;name = "KSZ side MDIO";</div><div class='add'>+		snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "ksz-side-mdio-%d",</div><div class='add'>+			 ds-&gt;index);</div><div class='add'>+	} else {</div><div class='add'>+		bus-&gt;read = ksz_sw_mdio_read;</div><div class='add'>+		bus-&gt;write = ksz_sw_mdio_write;</div><div class='add'>+		bus-&gt;name = "ksz user smi";</div><div class='add'>+		if (ds-&gt;dst-&gt;index != 0) {</div><div class='add'>+			snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "SMI-%d-%d", ds-&gt;dst-&gt;index, ds-&gt;index);</div><div class='add'>+		} else {</div><div class='add'>+			snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "SMI-%d", ds-&gt;index);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz_parse_dt_phy_config(dev, bus, mdio_np);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto put_mdio_node;</div><div class='add'>+</div><div class='add'>+	ds-&gt;phys_mii_mask = bus-&gt;phy_mask;</div><div class='ctx'> 	bus-&gt;parent = ds-&gt;dev;</div><div class='del'>-	bus-&gt;phy_mask = ~ds-&gt;phys_mii_mask;</div><div class='ctx'> </div><div class='ctx'> 	ds-&gt;user_mii_bus = bus;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;irq &gt; 0) {</div><div class='ctx'> 		ret = ksz_irq_phy_setup(dev);</div><div class='del'>-		if (ret) {</div><div class='del'>-			of_node_put(mdio_np);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='add'>+		if (ret)</div><div class='add'>+			goto put_mdio_node;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = devm_of_mdiobus_register(ds-&gt;dev, bus, mdio_np);</div><div class='hunk'>@@ -2316,7 +2794,9 @@ static int ksz_mdio_register(struct ksz_device *dev)</div><div class='ctx'> 			ksz_irq_phy_free(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+put_mdio_node:</div><div class='ctx'> 	of_node_put(mdio_np);</div><div class='add'>+	of_node_put(parent_bus_node);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2427,8 +2907,8 @@ static int ksz_irq_common_setup(struct ksz_device *dev, struct ksz_irq *kirq)</div><div class='ctx'> 	kirq-&gt;dev = dev;</div><div class='ctx'> 	kirq-&gt;masked = ~0;</div><div class='ctx'> </div><div class='del'>-	kirq-&gt;domain = irq_domain_add_simple(dev-&gt;dev-&gt;of_node, kirq-&gt;nirqs, 0,</div><div class='del'>-					     &amp;ksz_irq_domain_ops, kirq);</div><div class='add'>+	kirq-&gt;domain = irq_domain_create_simple(dev_fwnode(dev-&gt;dev), kirq-&gt;nirqs, 0,</div><div class='add'>+						&amp;ksz_irq_domain_ops, kirq);</div><div class='ctx'> 	if (!kirq-&gt;domain)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -2472,8 +2952,8 @@ static int ksz_pirq_setup(struct ksz_device *dev, u8 p)</div><div class='ctx'> 	snprintf(pirq-&gt;name, sizeof(pirq-&gt;name), "port_irq-%d", p);</div><div class='ctx'> </div><div class='ctx'> 	pirq-&gt;irq_num = irq_find_mapping(dev-&gt;girq.domain, p);</div><div class='del'>-	if (pirq-&gt;irq_num &lt; 0)</div><div class='del'>-		return pirq-&gt;irq_num;</div><div class='add'>+	if (!pirq-&gt;irq_num)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	return ksz_irq_common_setup(dev, pirq);</div><div class='ctx'> }</div><div class='hunk'>@@ -2483,6 +2963,7 @@ static int ksz_parse_drive_strength(struct ksz_device *dev);</div><div class='ctx'> static int ksz_setup(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='ctx'> 	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	u16 storm_mask, storm_rate;</div><div class='ctx'> 	struct dsa_port *dp;</div><div class='ctx'> 	struct ksz_port *p;</div><div class='ctx'> 	const u16 *regs;</div><div class='hunk'>@@ -2505,11 +2986,21 @@ static int ksz_setup(struct dsa_switch *ds)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	if (ksz_has_sgmii_port(dev) &amp;&amp; dev-&gt;dev_ops-&gt;pcs_create) {</div><div class='add'>+		ret = dev-&gt;dev_ops-&gt;pcs_create(dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* set broadcast storm protection 10% rate */</div><div class='add'>+	storm_mask = BROADCAST_STORM_RATE;</div><div class='add'>+	storm_rate = (BROADCAST_STORM_VALUE * BROADCAST_STORM_PROT_RATE) / 100;</div><div class='add'>+	if (ksz_is_ksz8463(dev)) {</div><div class='add'>+		storm_mask = swab16(storm_mask);</div><div class='add'>+		storm_rate = swab16(storm_rate);</div><div class='add'>+	}</div><div class='ctx'> 	regmap_update_bits(ksz_regmap_16(dev), regs[S_BROADCAST_CTRL],</div><div class='del'>-			   BROADCAST_STORM_RATE,</div><div class='del'>-			   (BROADCAST_STORM_VALUE *</div><div class='del'>-			   BROADCAST_STORM_PROT_RATE) / 100);</div><div class='add'>+			   storm_mask, storm_rate);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;dev_ops-&gt;config_cpu_port(ds);</div><div class='ctx'> </div><div class='hunk'>@@ -2547,18 +3038,23 @@ static int ksz_setup(struct dsa_switch *ds)</div><div class='ctx'> 		dsa_switch_for_each_user_port(dp, dev-&gt;ds) {</div><div class='ctx'> 			ret = ksz_pirq_setup(dev, dp-&gt;index);</div><div class='ctx'> 			if (ret)</div><div class='del'>-				goto out_girq;</div><div class='add'>+				goto port_release;</div><div class='ctx'> </div><div class='del'>-			ret = ksz_ptp_irq_setup(ds, dp-&gt;index);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto out_pirq;</div><div class='add'>+			if (dev-&gt;info-&gt;ptp_capable) {</div><div class='add'>+				ret = ksz_ptp_irq_setup(ds, dp-&gt;index);</div><div class='add'>+				if (ret)</div><div class='add'>+					goto pirq_release;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = ksz_ptp_clock_register(ds);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(dev-&gt;dev, "Failed to register PTP clock: %d\n", ret);</div><div class='del'>-		goto out_ptpirq;</div><div class='add'>+	if (dev-&gt;info-&gt;ptp_capable) {</div><div class='add'>+		ret = ksz_ptp_clock_register(ds);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev-&gt;dev, "Failed to register PTP clock: %d\n",</div><div class='add'>+				ret);</div><div class='add'>+			goto port_release;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = ksz_mdio_register(dev);</div><div class='hunk'>@@ -2578,18 +3074,18 @@ static int ksz_setup(struct dsa_switch *ds)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_ptp_clock_unregister:</div><div class='del'>-	ksz_ptp_clock_unregister(ds);</div><div class='del'>-out_ptpirq:</div><div class='del'>-	if (dev-&gt;irq &gt; 0)</div><div class='del'>-		dsa_switch_for_each_user_port(dp, dev-&gt;ds)</div><div class='del'>-			ksz_ptp_irq_free(ds, dp-&gt;index);</div><div class='del'>-out_pirq:</div><div class='del'>-	if (dev-&gt;irq &gt; 0)</div><div class='del'>-		dsa_switch_for_each_user_port(dp, dev-&gt;ds)</div><div class='add'>+	if (dev-&gt;info-&gt;ptp_capable)</div><div class='add'>+		ksz_ptp_clock_unregister(ds);</div><div class='add'>+port_release:</div><div class='add'>+	if (dev-&gt;irq &gt; 0) {</div><div class='add'>+		dsa_switch_for_each_user_port_continue_reverse(dp, dev-&gt;ds) {</div><div class='add'>+			if (dev-&gt;info-&gt;ptp_capable)</div><div class='add'>+				ksz_ptp_irq_free(ds, dp-&gt;index);</div><div class='add'>+pirq_release:</div><div class='ctx'> 			ksz_irq_free(&amp;dev-&gt;ports[dp-&gt;index].pirq);</div><div class='del'>-out_girq:</div><div class='del'>-	if (dev-&gt;irq &gt; 0)</div><div class='add'>+		}</div><div class='ctx'> 		ksz_irq_free(&amp;dev-&gt;girq);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2599,11 +3095,13 @@ static void ksz_teardown(struct dsa_switch *ds)</div><div class='ctx'> 	struct ksz_device *dev = ds-&gt;priv;</div><div class='ctx'> 	struct dsa_port *dp;</div><div class='ctx'> </div><div class='del'>-	ksz_ptp_clock_unregister(ds);</div><div class='add'>+	if (dev-&gt;info-&gt;ptp_capable)</div><div class='add'>+		ksz_ptp_clock_unregister(ds);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;irq &gt; 0) {</div><div class='ctx'> 		dsa_switch_for_each_user_port(dp, dev-&gt;ds) {</div><div class='del'>-			ksz_ptp_irq_free(ds, dp-&gt;index);</div><div class='add'>+			if (dev-&gt;info-&gt;ptp_capable)</div><div class='add'>+				ksz_ptp_irq_free(ds, dp-&gt;index);</div><div class='ctx'> </div><div class='ctx'> 			ksz_irq_free(&amp;dev-&gt;ports[dp-&gt;index].pirq);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2730,30 +3228,6 @@ static u32 ksz_get_phy_flags(struct dsa_switch *ds, int port)</div><div class='ctx'> 		if (!port)</div><div class='ctx'> 			return MICREL_KSZ8_P1_ERRATA;</div><div class='ctx'> 		break;</div><div class='del'>-	case KSZ8567_CHIP_ID:</div><div class='del'>-		/* KSZ8567R Errata DS80000752C Module 4 */</div><div class='del'>-	case KSZ8765_CHIP_ID:</div><div class='del'>-	case KSZ8794_CHIP_ID:</div><div class='del'>-	case KSZ8795_CHIP_ID:</div><div class='del'>-		/* KSZ879x/KSZ877x/KSZ876x Errata DS80000687C Module 2 */</div><div class='del'>-	case KSZ9477_CHIP_ID:</div><div class='del'>-		/* KSZ9477S Errata DS80000754A Module 4 */</div><div class='del'>-	case KSZ9567_CHIP_ID:</div><div class='del'>-		/* KSZ9567S Errata DS80000756A Module 4 */</div><div class='del'>-	case KSZ9896_CHIP_ID:</div><div class='del'>-		/* KSZ9896C Errata DS80000757A Module 3 */</div><div class='del'>-	case KSZ9897_CHIP_ID:</div><div class='del'>-		/* KSZ9897R Errata DS80000758C Module 4 */</div><div class='del'>-		/* Energy Efficient Ethernet (EEE) feature select must be manually disabled</div><div class='del'>-		 *   The EEE feature is enabled by default, but it is not fully</div><div class='del'>-		 *   operational. It must be manually disabled through register</div><div class='del'>-		 *   controls. If not disabled, the PHY ports can auto-negotiate</div><div class='del'>-		 *   to enable EEE, and this feature can cause link drops when</div><div class='del'>-		 *   linked to another device supporting EEE.</div><div class='del'>-		 *</div><div class='del'>-		 * The same item appears in the errata for all switches above.</div><div class='del'>-		 */</div><div class='del'>-		return MICREL_NO_EEE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3003,6 +3477,7 @@ static void ksz_port_teardown(struct dsa_switch *ds, int port)</div><div class='ctx'> 	case KSZ9893_CHIP_ID:</div><div class='ctx'> 	case KSZ9896_CHIP_ID:</div><div class='ctx'> 	case KSZ9897_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='ctx'> 		if (dsa_is_user_port(ds, port))</div><div class='ctx'> 			ksz9477_port_acl_free(dev, port);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3050,6 +3525,7 @@ static enum dsa_tag_protocol ksz_get_tag_protocol(struct dsa_switch *ds,</div><div class='ctx'> 		proto = DSA_TAG_PROTO_KSZ8795;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;chip_id == KSZ88X3_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ8463_CHIP_ID ||</div><div class='ctx'> 	    dev-&gt;chip_id == KSZ8563_CHIP_ID ||</div><div class='ctx'> 	    dev-&gt;chip_id == KSZ9893_CHIP_ID ||</div><div class='ctx'> 	    dev-&gt;chip_id == KSZ9563_CHIP_ID)</div><div class='hunk'>@@ -3059,7 +3535,8 @@ static enum dsa_tag_protocol ksz_get_tag_protocol(struct dsa_switch *ds,</div><div class='ctx'> 	    dev-&gt;chip_id == KSZ9477_CHIP_ID ||</div><div class='ctx'> 	    dev-&gt;chip_id == KSZ9896_CHIP_ID ||</div><div class='ctx'> 	    dev-&gt;chip_id == KSZ9897_CHIP_ID ||</div><div class='del'>-	    dev-&gt;chip_id == KSZ9567_CHIP_ID)</div><div class='add'>+	    dev-&gt;chip_id == KSZ9567_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == LAN9646_CHIP_ID)</div><div class='ctx'> 		proto = DSA_TAG_PROTO_KSZ9477;</div><div class='ctx'> </div><div class='ctx'> 	if (is_lan937x(dev))</div><div class='hunk'>@@ -3161,6 +3638,7 @@ static int ksz_max_mtu(struct dsa_switch *ds, int port)</div><div class='ctx'> 	case KSZ8794_CHIP_ID:</div><div class='ctx'> 	case KSZ8765_CHIP_ID:</div><div class='ctx'> 		return KSZ8795_HUGE_PACKET_SIZE - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+	case KSZ8463_CHIP_ID:</div><div class='ctx'> 	case KSZ88X3_CHIP_ID:</div><div class='ctx'> 	case KSZ8864_CHIP_ID:</div><div class='ctx'> 	case KSZ8895_CHIP_ID:</div><div class='hunk'>@@ -3178,63 +3656,74 @@ static int ksz_max_mtu(struct dsa_switch *ds, int port)</div><div class='ctx'> 	case LAN9372_CHIP_ID:</div><div class='ctx'> 	case LAN9373_CHIP_ID:</div><div class='ctx'> 	case LAN9374_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='ctx'> 		return KSZ9477_MAX_FRAME_SIZE - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ksz_validate_eee(struct dsa_switch *ds, int port)</div><div class='add'>+/**</div><div class='add'>+ * ksz_support_eee - Determine Energy Efficient Ethernet (EEE) support for a</div><div class='add'>+ *                   port</div><div class='add'>+ * @ds: Pointer to the DSA switch structure</div><div class='add'>+ * @port: Port number to check</div><div class='add'>+ *</div><div class='add'>+ * This function also documents devices where EEE was initially advertised but</div><div class='add'>+ * later withdrawn due to reliability issues, as described in official errata</div><div class='add'>+ * documents. These devices are explicitly listed to record known limitations,</div><div class='add'>+ * even if there is no technical necessity for runtime checks.</div><div class='add'>+ *</div><div class='add'>+ * Returns: true if the internal PHY on the given port supports fully</div><div class='add'>+ * operational EEE, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool ksz_support_eee(struct dsa_switch *ds, int port)</div><div class='ctx'> {</div><div class='ctx'> 	struct ksz_device *dev = ds-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev-&gt;info-&gt;internal_phy[port])</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	switch (dev-&gt;chip_id) {</div><div class='ctx'> 	case KSZ8563_CHIP_ID:</div><div class='add'>+	case KSZ9563_CHIP_ID:</div><div class='add'>+	case KSZ9893_CHIP_ID:</div><div class='add'>+		return true;</div><div class='ctx'> 	case KSZ8567_CHIP_ID:</div><div class='add'>+		/* KSZ8567R Errata DS80000752C Module 4 */</div><div class='add'>+	case KSZ8765_CHIP_ID:</div><div class='add'>+	case KSZ8794_CHIP_ID:</div><div class='add'>+	case KSZ8795_CHIP_ID:</div><div class='add'>+		/* KSZ879x/KSZ877x/KSZ876x Errata DS80000687C Module 2 */</div><div class='ctx'> 	case KSZ9477_CHIP_ID:</div><div class='del'>-	case KSZ9563_CHIP_ID:</div><div class='add'>+		/* KSZ9477S Errata DS80000754A Module 4 */</div><div class='ctx'> 	case KSZ9567_CHIP_ID:</div><div class='del'>-	case KSZ9893_CHIP_ID:</div><div class='add'>+		/* KSZ9567S Errata DS80000756A Module 4 */</div><div class='ctx'> 	case KSZ9896_CHIP_ID:</div><div class='add'>+		/* KSZ9896C Errata DS80000757A Module 3 */</div><div class='ctx'> 	case KSZ9897_CHIP_ID:</div><div class='del'>-		return 0;</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='add'>+		/* KSZ9897R Errata DS80000758C Module 4 */</div><div class='add'>+		/* Energy Efficient Ethernet (EEE) feature select must be</div><div class='add'>+		 * manually disabled</div><div class='add'>+		 *   The EEE feature is enabled by default, but it is not fully</div><div class='add'>+		 *   operational. It must be manually disabled through register</div><div class='add'>+		 *   controls. If not disabled, the PHY ports can auto-negotiate</div><div class='add'>+		 *   to enable EEE, and this feature can cause link drops when</div><div class='add'>+		 *   linked to another device supporting EEE.</div><div class='add'>+		 *</div><div class='add'>+		 * The same item appears in the errata for all switches above.</div><div class='add'>+		 */</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ksz_get_mac_eee(struct dsa_switch *ds, int port,</div><div class='del'>-			   struct ethtool_keee *e)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = ksz_validate_eee(ds, port);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* There is no documented control of Tx LPI configuration. */</div><div class='del'>-	e-&gt;tx_lpi_enabled = true;</div><div class='del'>-</div><div class='del'>-	/* There is no documented control of Tx LPI timer. According to tests</div><div class='del'>-	 * Tx LPI timer seems to be set by default to minimal value.</div><div class='del'>-	 */</div><div class='del'>-	e-&gt;tx_lpi_timer = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ksz_set_mac_eee(struct dsa_switch *ds, int port,</div><div class='ctx'> 			   struct ethtool_keee *e)</div><div class='ctx'> {</div><div class='ctx'> 	struct ksz_device *dev = ds-&gt;priv;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = ksz_validate_eee(ds, port);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!e-&gt;tx_lpi_enabled) {</div><div class='ctx'> 		dev_err(dev-&gt;dev, "Disabling EEE Tx LPI is not supported\n");</div><div class='hunk'>@@ -3355,6 +3844,10 @@ static void ksz_phylink_mac_config(struct phylink_config *config,</div><div class='ctx'> 	if (dev-&gt;info-&gt;internal_phy[port])</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* No need to configure XMII control register when using SGMII. */</div><div class='add'>+	if (ksz_is_sgmii_port(dev, port))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (phylink_autoneg_inband(mode)) {</div><div class='ctx'> 		dev_err(dev-&gt;dev, "In-band AN not supported!\n");</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -3500,6 +3993,9 @@ static int ksz_switch_detect(struct ksz_device *dev)</div><div class='ctx'> 	id2 = FIELD_GET(SW_CHIP_ID_M, id16);</div><div class='ctx'> </div><div class='ctx'> 	switch (id1) {</div><div class='add'>+	case KSZ84_FAMILY_ID:</div><div class='add'>+		dev-&gt;chip_id = KSZ8463_CHIP_ID;</div><div class='add'>+		break;</div><div class='ctx'> 	case KSZ87_FAMILY_ID:</div><div class='ctx'> 		if (id2 == KSZ87_CHIP_ID_95) {</div><div class='ctx'> 			u8 val;</div><div class='hunk'>@@ -3552,7 +4048,10 @@ static int ksz_switch_detect(struct ksz_device *dev)</div><div class='ctx'> 		case LAN9372_CHIP_ID:</div><div class='ctx'> 		case LAN9373_CHIP_ID:</div><div class='ctx'> 		case LAN9374_CHIP_ID:</div><div class='del'>-			dev-&gt;chip_id = id32;</div><div class='add'>+</div><div class='add'>+			/* LAN9646 does not have its own chip id. */</div><div class='add'>+			if (dev-&gt;chip_id != LAN9646_CHIP_ID)</div><div class='add'>+				dev-&gt;chip_id = id32;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case KSZ9893_CHIP_ID:</div><div class='ctx'> 			ret = ksz_read8(dev, REG_CHIP_ID4,</div><div class='hunk'>@@ -3591,6 +4090,7 @@ static int ksz_cls_flower_add(struct dsa_switch *ds, int port,</div><div class='ctx'> 	case KSZ9893_CHIP_ID:</div><div class='ctx'> 	case KSZ9896_CHIP_ID:</div><div class='ctx'> 	case KSZ9897_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='ctx'> 		return ksz9477_cls_flower_add(ds, port, cls, ingress);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3611,6 +4111,7 @@ static int ksz_cls_flower_del(struct dsa_switch *ds, int port,</div><div class='ctx'> 	case KSZ9893_CHIP_ID:</div><div class='ctx'> 	case KSZ9896_CHIP_ID:</div><div class='ctx'> 	case KSZ9897_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='ctx'> 		return ksz9477_cls_flower_del(ds, port, cls, ingress);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3736,6 +4237,104 @@ static int ksz_ets_band_to_queue(struct tc_ets_qopt_offload_replace_params *p,</div><div class='ctx'> 	return p-&gt;bands - 1 - band;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u8 ksz8463_tc_ctrl(int port, int queue)</div><div class='add'>+{</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	reg = 0xC8 + port * 4;</div><div class='add'>+	reg += ((3 - queue) / 2) * 2;</div><div class='add'>+	reg++;</div><div class='add'>+	reg -= (queue &amp; 1);</div><div class='add'>+	return reg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz88x3_tc_ets_add - Configure ETS (Enhanced Transmission Selection)</div><div class='add'>+ *                      for a port on KSZ88x3 switch</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ * @port: Port number to configure</div><div class='add'>+ * @p: Pointer to offload replace parameters describing ETS bands and mapping</div><div class='add'>+ *</div><div class='add'>+ * The KSZ88x3 supports two scheduling modes: Strict Priority and</div><div class='add'>+ * Weighted Fair Queuing (WFQ). Both modes have fixed behavior:</div><div class='add'>+ *   - No configurable queue-to-priority mapping</div><div class='add'>+ *   - No weight adjustment in WFQ mode</div><div class='add'>+ *</div><div class='add'>+ * This function configures the switch to use strict priority mode by</div><div class='add'>+ * clearing the WFQ enable bit for all queues associated with ETS bands.</div><div class='add'>+ * If strict priority is not explicitly requested, the switch will default</div><div class='add'>+ * to WFQ mode.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int ksz88x3_tc_ets_add(struct ksz_device *dev, int port,</div><div class='add'>+			      struct tc_ets_qopt_offload_replace_params *p)</div><div class='add'>+{</div><div class='add'>+	int ret, band;</div><div class='add'>+</div><div class='add'>+	/* Only strict priority mode is supported for now.</div><div class='add'>+	 * WFQ is implicitly enabled when strict mode is disabled.</div><div class='add'>+	 */</div><div class='add'>+	for (band = 0; band &lt; p-&gt;bands; band++) {</div><div class='add'>+		int queue = ksz_ets_band_to_queue(p, band);</div><div class='add'>+		u8 reg;</div><div class='add'>+</div><div class='add'>+		/* Calculate TXQ Split Control register address for this</div><div class='add'>+		 * port/queue</div><div class='add'>+		 */</div><div class='add'>+		reg = KSZ8873_TXQ_SPLIT_CTRL_REG(port, queue);</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			reg = ksz8463_tc_ctrl(port, queue);</div><div class='add'>+</div><div class='add'>+		/* Clear WFQ enable bit to select strict priority scheduling */</div><div class='add'>+		ret = ksz_rmw8(dev, reg, KSZ8873_TXQ_WFQ_ENABLE, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz88x3_tc_ets_del - Reset ETS (Enhanced Transmission Selection) config</div><div class='add'>+ *                      for a port on KSZ88x3 switch</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ * @port: Port number to reset</div><div class='add'>+ *</div><div class='add'>+ * The KSZ88x3 supports only fixed scheduling modes: Strict Priority or</div><div class='add'>+ * Weighted Fair Queuing (WFQ), with no reconfiguration of weights or</div><div class='add'>+ * queue mapping. This function resets the port’s scheduling mode to</div><div class='add'>+ * the default, which is WFQ, by enabling the WFQ bit for all queues.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int ksz88x3_tc_ets_del(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	int ret, queue;</div><div class='add'>+</div><div class='add'>+	/* Iterate over all transmit queues for this port */</div><div class='add'>+	for (queue = 0; queue &lt; dev-&gt;info-&gt;num_tx_queues; queue++) {</div><div class='add'>+		u8 reg;</div><div class='add'>+</div><div class='add'>+		/* Calculate TXQ Split Control register address for this</div><div class='add'>+		 * port/queue</div><div class='add'>+		 */</div><div class='add'>+		reg = KSZ8873_TXQ_SPLIT_CTRL_REG(port, queue);</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			reg = ksz8463_tc_ctrl(port, queue);</div><div class='add'>+</div><div class='add'>+		/* Set WFQ enable bit to revert back to default scheduling</div><div class='add'>+		 * mode</div><div class='add'>+		 */</div><div class='add'>+		ret = ksz_rmw8(dev, reg, KSZ8873_TXQ_WFQ_ENABLE,</div><div class='add'>+			       KSZ8873_TXQ_WFQ_ENABLE);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ksz_queue_set_strict(struct ksz_device *dev, int port, int queue)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -3817,6 +4416,7 @@ static int ksz_tc_ets_del(struct ksz_device *dev, int port)</div><div class='ctx'> 	for (queue = 0; queue &lt; dev-&gt;info-&gt;num_tx_queues; queue++) {</div><div class='ctx'> 		ret = ksz_queue_set_wrr(dev, port, queue,</div><div class='ctx'> 					KSZ9477_DEFAULT_WRR_WEIGHT);</div><div class='add'>+</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3869,7 +4469,7 @@ static int ksz_tc_setup_qdisc_ets(struct dsa_switch *ds, int port,</div><div class='ctx'> 	struct ksz_device *dev = ds-&gt;priv;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (is_ksz8(dev))</div><div class='add'>+	if (is_ksz8(dev) &amp;&amp; !(ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev)))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	if (qopt-&gt;parent != TC_H_ROOT) {</div><div class='hunk'>@@ -3883,9 +4483,16 @@ static int ksz_tc_setup_qdisc_ets(struct dsa_switch *ds, int port,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		return ksz_tc_ets_add(dev, port, &amp;qopt-&gt;replace_params);</div><div class='add'>+		if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev))</div><div class='add'>+			return ksz88x3_tc_ets_add(dev, port,</div><div class='add'>+						  &amp;qopt-&gt;replace_params);</div><div class='add'>+		else</div><div class='add'>+			return ksz_tc_ets_add(dev, port, &amp;qopt-&gt;replace_params);</div><div class='ctx'> 	case TC_ETS_DESTROY:</div><div class='del'>-		return ksz_tc_ets_del(dev, port);</div><div class='add'>+		if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev))</div><div class='add'>+			return ksz88x3_tc_ets_del(dev, port);</div><div class='add'>+		else</div><div class='add'>+			return ksz_tc_ets_del(dev, port);</div><div class='ctx'> 	case TC_ETS_STATS:</div><div class='ctx'> 	case TC_ETS_GRAFT:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -4225,7 +4832,16 @@ int ksz_switch_macaddr_get(struct dsa_switch *ds, int port,</div><div class='ctx'> </div><div class='ctx'> 	/* Program the switch MAC address to hardware */</div><div class='ctx'> 	for (i = 0; i &lt; ETH_ALEN; i++) {</div><div class='del'>-		ret = ksz_write8(dev, regs[REG_SW_MAC_ADDR] + i, addr[i]);</div><div class='add'>+		if (ksz_is_ksz8463(dev)) {</div><div class='add'>+			u16 addr16 = ((u16)addr[i] &lt;&lt; 8) | addr[i + 1];</div><div class='add'>+</div><div class='add'>+			ret = ksz_write16(dev, regs[REG_SW_MAC_ADDR] + i,</div><div class='add'>+					  addr16);</div><div class='add'>+			i++;</div><div class='add'>+		} else {</div><div class='add'>+			ret = ksz_write8(dev, regs[REG_SW_MAC_ADDR] + i,</div><div class='add'>+					 addr[i]);</div><div class='add'>+		}</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto macaddr_drop;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4327,6 +4943,23 @@ static int ksz_hsr_leave(struct dsa_switch *ds, int port,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ksz_suspend(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;dev-&gt;mib_read);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_resume(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;mib_read_interval)</div><div class='add'>+		schedule_delayed_work(&amp;dev-&gt;mib_read, dev-&gt;mib_read_interval);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct dsa_switch_ops ksz_switch_ops = {</div><div class='ctx'> 	.get_tag_protocol	= ksz_get_tag_protocol,</div><div class='ctx'> 	.connect_tag_protocol   = ksz_connect_tag_protocol,</div><div class='hunk'>@@ -4367,6 +5000,8 @@ static const struct dsa_switch_ops ksz_switch_ops = {</div><div class='ctx'> 	.port_max_mtu		= ksz_max_mtu,</div><div class='ctx'> 	.get_wol		= ksz_get_wol,</div><div class='ctx'> 	.set_wol		= ksz_set_wol,</div><div class='add'>+	.suspend		= ksz_suspend,</div><div class='add'>+	.resume			= ksz_resume,</div><div class='ctx'> 	.get_ts_info		= ksz_get_ts_info,</div><div class='ctx'> 	.port_hwtstamp_get	= ksz_hwtstamp_get,</div><div class='ctx'> 	.port_hwtstamp_set	= ksz_hwtstamp_set,</div><div class='hunk'>@@ -4375,7 +5010,7 @@ static const struct dsa_switch_ops ksz_switch_ops = {</div><div class='ctx'> 	.cls_flower_add		= ksz_cls_flower_add,</div><div class='ctx'> 	.cls_flower_del		= ksz_cls_flower_del,</div><div class='ctx'> 	.port_setup_tc		= ksz_setup_tc,</div><div class='del'>-	.get_mac_eee		= ksz_get_mac_eee,</div><div class='add'>+	.support_eee		= ksz_support_eee,</div><div class='ctx'> 	.set_mac_eee		= ksz_set_mac_eee,</div><div class='ctx'> 	.port_get_default_prio	= ksz_port_get_default_prio,</div><div class='ctx'> 	.port_set_default_prio	= ksz_port_set_default_prio,</div><div class='hunk'>@@ -4698,6 +5333,7 @@ static int ksz_parse_drive_strength(struct ksz_device *dev)</div><div class='ctx'> 	case KSZ9893_CHIP_ID:</div><div class='ctx'> 	case KSZ9896_CHIP_ID:</div><div class='ctx'> 	case KSZ9897_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='ctx'> 		return ksz9477_drive_strength_write(dev, of_props,</div><div class='ctx'> 						    ARRAY_SIZE(of_props));</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -4713,6 +5349,38 @@ static int ksz_parse_drive_strength(struct ksz_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ksz8463_configure_straps_spi(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='add'>+	struct gpio_desc *rxd0;</div><div class='add'>+	struct gpio_desc *rxd1;</div><div class='add'>+</div><div class='add'>+	rxd0 = devm_gpiod_get_index_optional(dev-&gt;dev, "straps-rxd", 0, GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(rxd0))</div><div class='add'>+		return PTR_ERR(rxd0);</div><div class='add'>+</div><div class='add'>+	rxd1 = devm_gpiod_get_index_optional(dev-&gt;dev, "straps-rxd", 1, GPIOD_OUT_HIGH);</div><div class='add'>+	if (IS_ERR(rxd1))</div><div class='add'>+		return PTR_ERR(rxd1);</div><div class='add'>+</div><div class='add'>+	if (!rxd0 &amp;&amp; !rxd1)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if ((rxd0 &amp;&amp; !rxd1) || (rxd1 &amp;&amp; !rxd0))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pinctrl = devm_pinctrl_get_select(dev-&gt;dev, "reset");</div><div class='add'>+	if (IS_ERR(pinctrl))</div><div class='add'>+		return PTR_ERR(pinctrl);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8463_release_straps_spi(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return pinctrl_select_default_state(dev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ksz_switch_register(struct ksz_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct ksz_chip_data *info;</div><div class='hunk'>@@ -4728,10 +5396,22 @@ int ksz_switch_register(struct ksz_device *dev)</div><div class='ctx'> 		return PTR_ERR(dev-&gt;reset_gpio);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;reset_gpio) {</div><div class='add'>+		if (of_device_is_compatible(dev-&gt;dev-&gt;of_node, "microchip,ksz8463")) {</div><div class='add'>+			ret = ksz8463_configure_straps_spi(dev);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		gpiod_set_value_cansleep(dev-&gt;reset_gpio, 1);</div><div class='ctx'> 		usleep_range(10000, 12000);</div><div class='ctx'> 		gpiod_set_value_cansleep(dev-&gt;reset_gpio, 0);</div><div class='ctx'> 		msleep(100);</div><div class='add'>+</div><div class='add'>+		if (of_device_is_compatible(dev-&gt;dev-&gt;of_node, "microchip,ksz8463")) {</div><div class='add'>+			ret = ksz8463_release_straps_spi(dev);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;dev-&gt;dev_mutex);</div><div class='hunk'>@@ -4814,6 +5494,9 @@ int ksz_switch_register(struct ksz_device *dev)</div><div class='ctx'> 						&amp;dev-&gt;ports[port_num].interface);</div><div class='ctx'> </div><div class='ctx'> 				ksz_parse_rgmii_delay(dev, port_num, port);</div><div class='add'>+				dev-&gt;ports[port_num].fiber =</div><div class='add'>+					of_property_read_bool(port,</div><div class='add'>+							      "micrel,fiber-mode");</div><div class='ctx'> 			}</div><div class='ctx'> 			of_node_put(ports);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -4865,6 +5548,24 @@ void ksz_switch_remove(struct ksz_device *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ksz_switch_remove);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+int ksz_switch_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *priv = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return dsa_switch_suspend(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ksz_switch_suspend);</div><div class='add'>+</div><div class='add'>+int ksz_switch_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *priv = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return dsa_switch_resume(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ksz_switch_resume);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> MODULE_AUTHOR("Woojung Huh &lt;Woojung.Huh@microchip.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Microchip KSZ Series Switch DSA Driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h<br/>index bec846e20682..c65188cd3c0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_common.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /* Microchip switch driver common header</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2017-2024 Microchip Technology Inc.</div><div class='add'>+ * Copyright (C) 2017-2025 Microchip Technology Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __KSZ_COMMON_H</div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/pcs/pcs-xpcs.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='hunk'>@@ -65,6 +66,12 @@ struct ksz_chip_data {</div><div class='ctx'> 	u8 num_tx_queues;</div><div class='ctx'> 	u8 num_ipms; /* number of Internal Priority Maps */</div><div class='ctx'> 	bool tc_cbs_supported;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @phy_side_mdio_supported: Indicates if the chip supports an additional</div><div class='add'>+	 * side MDIO channel for accessing integrated PHYs.</div><div class='add'>+	 */</div><div class='add'>+	bool phy_side_mdio_supported;</div><div class='ctx'> 	const struct ksz_dev_ops *ops;</div><div class='ctx'> 	const struct phylink_mac_ops *phylink_mac_ops;</div><div class='ctx'> 	bool phy_errata_9477;</div><div class='hunk'>@@ -86,6 +93,8 @@ struct ksz_chip_data {</div><div class='ctx'> 	bool supports_rgmii[KSZ_MAX_NUM_PORTS];</div><div class='ctx'> 	bool internal_phy[KSZ_MAX_NUM_PORTS];</div><div class='ctx'> 	bool gbit_capable[KSZ_MAX_NUM_PORTS];</div><div class='add'>+	bool ptp_capable;</div><div class='add'>+	u8 sgmii_port;</div><div class='ctx'> 	const struct regmap_access_table *wr_table;</div><div class='ctx'> 	const struct regmap_access_table *rd_table;</div><div class='ctx'> };</div><div class='hunk'>@@ -125,6 +134,7 @@ struct ksz_port {</div><div class='ctx'> 	u32 force:1;</div><div class='ctx'> 	u32 read:1;			/* read MIB counters in background */</div><div class='ctx'> 	u32 freeze:1;			/* MIB counter freeze is enabled */</div><div class='add'>+	u32 sgmii_adv_write:1;</div><div class='ctx'> </div><div class='ctx'> 	struct ksz_port_mib mib;</div><div class='ctx'> 	phy_interface_t interface;</div><div class='hunk'>@@ -134,8 +144,9 @@ struct ksz_port {</div><div class='ctx'> 	void *acl_priv;</div><div class='ctx'> 	struct ksz_irq pirq;</div><div class='ctx'> 	u8 num;</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='ctx'> #if IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ_PTP)</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> 	bool hwts_tx_en;</div><div class='ctx'> 	bool hwts_rx_en;</div><div class='ctx'> 	struct ksz_irq ptpirq;</div><div class='hunk'>@@ -191,10 +202,27 @@ struct ksz_device {</div><div class='ctx'> 	struct ksz_switch_macaddr *switch_macaddr;</div><div class='ctx'> 	struct net_device *hsr_dev;     /* HSR */</div><div class='ctx'> 	u8 hsr_ports;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @phy_addr_map: Array mapping switch ports to their corresponding PHY</div><div class='add'>+	 * addresses.</div><div class='add'>+	 */</div><div class='add'>+	u8 phy_addr_map[KSZ_MAX_NUM_PORTS];</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @parent_mdio_bus: Pointer to the external MDIO bus controller.</div><div class='add'>+	 *</div><div class='add'>+	 * This points to an external MDIO bus controller that is used to access</div><div class='add'>+	 * the  PHYs integrated within the switch. Unlike an integrated MDIO</div><div class='add'>+	 * bus, this external controller provides a direct path for managing</div><div class='add'>+	 * the switch’s internal PHYs, bypassing the main SPI interface.</div><div class='add'>+	 */</div><div class='add'>+	struct mii_bus *parent_mdio_bus;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* List of supported models */</div><div class='ctx'> enum ksz_model {</div><div class='add'>+	KSZ8463,</div><div class='ctx'> 	KSZ8563,</div><div class='ctx'> 	KSZ8567,</div><div class='ctx'> 	KSZ8795,</div><div class='hunk'>@@ -214,6 +242,7 @@ enum ksz_model {</div><div class='ctx'> 	LAN9372,</div><div class='ctx'> 	LAN9373,</div><div class='ctx'> 	LAN9374,</div><div class='add'>+	LAN9646,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum ksz_regs {</div><div class='hunk'>@@ -265,6 +294,8 @@ enum ksz_masks {</div><div class='ctx'> 	DYNAMIC_MAC_TABLE_TIMESTAMP,</div><div class='ctx'> 	ALU_STAT_WRITE,</div><div class='ctx'> 	ALU_STAT_READ,</div><div class='add'>+	ALU_STAT_DIRECT,</div><div class='add'>+	ALU_RESV_MCAST_ADDR,</div><div class='ctx'> 	P_MII_TX_FLOW_CTRL,</div><div class='ctx'> 	P_MII_RX_FLOW_CTRL,</div><div class='ctx'> };</div><div class='hunk'>@@ -326,6 +357,43 @@ struct ksz_dev_ops {</div><div class='ctx'> 	void (*port_cleanup)(struct ksz_device *dev, int port);</div><div class='ctx'> 	void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);</div><div class='ctx'> 	int (*set_ageing_time)(struct ksz_device *dev, unsigned int msecs);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @mdio_bus_preinit: Function pointer to pre-initialize the MDIO bus</div><div class='add'>+	 *                    for accessing PHYs.</div><div class='add'>+	 * @dev: Pointer to device structure.</div><div class='add'>+	 * @side_mdio: Boolean indicating if the PHYs are accessed over a side</div><div class='add'>+	 *             MDIO bus.</div><div class='add'>+	 *</div><div class='add'>+	 * This function pointer is used to configure the MDIO bus for PHY</div><div class='add'>+	 * access before initiating regular PHY operations. It enables either</div><div class='add'>+	 * SPI/I2C or side MDIO access modes by unlocking necessary registers</div><div class='add'>+	 * and setting up access permissions for the selected mode.</div><div class='add'>+	 *</div><div class='add'>+	 * Return:</div><div class='add'>+	 *  - 0 on success.</div><div class='add'>+	 *  - Negative error code on failure.</div><div class='add'>+	 */</div><div class='add'>+	int (*mdio_bus_preinit)(struct ksz_device *dev, bool side_mdio);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @create_phy_addr_map: Function pointer to create a port-to-PHY</div><div class='add'>+	 *                       address map.</div><div class='add'>+	 * @dev: Pointer to device structure.</div><div class='add'>+	 * @side_mdio: Boolean indicating if the PHYs are accessed over a side</div><div class='add'>+	 *             MDIO bus.</div><div class='add'>+	 *</div><div class='add'>+	 * This function pointer is responsible for mapping switch ports to PHY</div><div class='add'>+	 * addresses according to the configured access mode (SPI or side MDIO)</div><div class='add'>+	 * and the device’s strap configuration. The mapping setup may vary</div><div class='add'>+	 * depending on the chip variant and configuration. Ensures the correct</div><div class='add'>+	 * address mapping for PHY communication.</div><div class='add'>+	 *</div><div class='add'>+	 * Return:</div><div class='add'>+	 *  - 0 on success.</div><div class='add'>+	 *  - Negative error code on failure (e.g., invalid configuration).</div><div class='add'>+	 */</div><div class='add'>+	int (*create_phy_addr_map)(struct ksz_device *dev, bool side_mdio);</div><div class='ctx'> 	int (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);</div><div class='ctx'> 	int (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);</div><div class='ctx'> 	void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,</div><div class='hunk'>@@ -379,11 +447,15 @@ struct ksz_dev_ops {</div><div class='ctx'> 	int (*reset)(struct ksz_device *dev);</div><div class='ctx'> 	int (*init)(struct ksz_device *dev);</div><div class='ctx'> 	void (*exit)(struct ksz_device *dev);</div><div class='add'>+</div><div class='add'>+	int (*pcs_create)(struct ksz_device *dev);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);</div><div class='ctx'> int ksz_switch_register(struct ksz_device *dev);</div><div class='ctx'> void ksz_switch_remove(struct ksz_device *dev);</div><div class='add'>+int ksz_switch_suspend(struct device *dev);</div><div class='add'>+int ksz_switch_resume(struct device *dev);</div><div class='ctx'> </div><div class='ctx'> void ksz_init_mib_timer(struct ksz_device *dev);</div><div class='ctx'> bool ksz_is_port_mac_global_usable(struct dsa_switch *ds, int port);</div><div class='hunk'>@@ -415,6 +487,11 @@ static inline struct regmap *ksz_regmap_32(struct ksz_device *dev)</div><div class='ctx'> 	return dev-&gt;regmap[KSZ_REGMAP_32];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool ksz_is_ksz8463(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == KSZ8463_CHIP_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int value;</div><div class='hunk'>@@ -640,12 +717,13 @@ static inline bool ksz_is_8895_family(struct ksz_device *dev)</div><div class='ctx'> static inline bool is_ksz8(struct ksz_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return ksz_is_ksz87xx(dev) || ksz_is_ksz88x3(dev) ||</div><div class='del'>-	       ksz_is_8895_family(dev);</div><div class='add'>+	       ksz_is_8895_family(dev) || ksz_is_ksz8463(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool is_ksz88xx(struct ksz_device *dev)</div><div class='ctx'> {</div><div class='del'>-	return ksz_is_ksz88x3(dev) || ksz_is_8895_family(dev);</div><div class='add'>+	return ksz_is_ksz88x3(dev) || ksz_is_8895_family(dev) ||</div><div class='add'>+	       ksz_is_ksz8463(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool is_ksz9477(struct ksz_device *dev)</div><div class='hunk'>@@ -668,6 +746,21 @@ static inline bool is_lan937x_tx_phy(struct ksz_device *dev, int port)</div><div class='ctx'> 		dev-&gt;chip_id == LAN9372_CHIP_ID) &amp;&amp; port == KSZ_PORT_4;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int ksz_get_sgmii_port(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;info-&gt;sgmii_port - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ksz_has_sgmii_port(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;info-&gt;sgmii_port &gt; 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ksz_is_sgmii_port(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;info-&gt;sgmii_port == port + 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* STP State Defines */</div><div class='ctx'> #define PORT_TX_ENABLE			BIT(2)</div><div class='ctx'> #define PORT_RX_ENABLE			BIT(1)</div><div class='hunk'>@@ -677,6 +770,7 @@ static inline bool is_lan937x_tx_phy(struct ksz_device *dev, int port)</div><div class='ctx'> #define REG_CHIP_ID0			0x00</div><div class='ctx'> </div><div class='ctx'> #define SW_FAMILY_ID_M			GENMASK(15, 8)</div><div class='add'>+#define KSZ84_FAMILY_ID			0x84</div><div class='ctx'> #define KSZ87_FAMILY_ID			0x87</div><div class='ctx'> #define KSZ88_FAMILY_ID			0x88</div><div class='ctx'> #define KSZ8895_FAMILY_ID		0x95</div><div class='hunk'>@@ -773,6 +867,25 @@ static inline bool is_lan937x_tx_phy(struct ksz_device *dev, int port)</div><div class='ctx'> #define SW_HI_SPEED_DRIVE_STRENGTH_S	4</div><div class='ctx'> #define SW_LO_SPEED_DRIVE_STRENGTH_S	0</div><div class='ctx'> </div><div class='add'>+/* TXQ Split Control Register for per-port, per-queue configuration.</div><div class='add'>+ * Register 0xAF is TXQ Split for Q3 on Port 1.</div><div class='add'>+ * Register offset formula: 0xAF + (port * 4) + (3 - queue)</div><div class='add'>+ *   where: port = 0..2, queue = 0..3</div><div class='add'>+ */</div><div class='add'>+#define KSZ8873_TXQ_SPLIT_CTRL_REG(port, queue) \</div><div class='add'>+	(0xAF + ((port) * 4) + (3 - (queue)))</div><div class='add'>+</div><div class='add'>+/* Bit 7 selects between:</div><div class='add'>+ *   0 = Strict priority mode (highest-priority queue first)</div><div class='add'>+ *   1 = Weighted Fair Queuing (WFQ) mode:</div><div class='add'>+ *       Queue weights: Q3:Q2:Q1:Q0 = 8:4:2:1</div><div class='add'>+ *       If any queues are empty, weight is redistributed.</div><div class='add'>+ *</div><div class='add'>+ * Note: This is referred to as "Weighted Fair Queuing" (WFQ) in KSZ8863/8873</div><div class='add'>+ * documentation, and as "Weighted Round Robin" (WRR) in KSZ9477 family docs.</div><div class='add'>+ */</div><div class='add'>+#define KSZ8873_TXQ_WFQ_ENABLE		BIT(7)</div><div class='add'>+</div><div class='ctx'> #define KSZ9477_REG_PORT_OUT_RATE_0	0x0420</div><div class='ctx'> #define KSZ9477_OUT_RATE_NO_LIMIT	0</div><div class='ctx'> </div><div class='hunk'>@@ -836,4 +949,29 @@ static inline bool is_lan937x_tx_phy(struct ksz_device *dev, int port)</div><div class='ctx'> 		[KSZ_REGMAP_32] = KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#define KSZ8463_REGMAP_ENTRY(width, regbits, regpad, regalign)		\</div><div class='add'>+	{								\</div><div class='add'>+		.name = #width,						\</div><div class='add'>+		.val_bits = (width),					\</div><div class='add'>+		.reg_stride = (width / 8),				\</div><div class='add'>+		.reg_bits = (regbits) + (regalign),			\</div><div class='add'>+		.pad_bits = (regpad),					\</div><div class='add'>+		.read = ksz8463_spi_read,				\</div><div class='add'>+		.write = ksz8463_spi_write,				\</div><div class='add'>+		.max_register = BIT(regbits) - 1,			\</div><div class='add'>+		.cache_type = REGCACHE_NONE,				\</div><div class='add'>+		.zero_flag_mask = 1,					\</div><div class='add'>+		.use_single_read = 1,					\</div><div class='add'>+		.use_single_write = 1,					\</div><div class='add'>+		.lock = ksz_regmap_lock,				\</div><div class='add'>+		.unlock = ksz_regmap_unlock,				\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REGMAP_TABLE(ksz, regbits, regpad, regalign)		\</div><div class='add'>+	static const struct regmap_config ksz##_regmap_config[] = {	\</div><div class='add'>+		[KSZ_REGMAP_8] = KSZ8463_REGMAP_ENTRY(8, (regbits), (regpad), (regalign)), \</div><div class='add'>+		[KSZ_REGMAP_16] = KSZ8463_REGMAP_ENTRY(16, (regbits), (regpad), (regalign)), \</div><div class='add'>+		[KSZ_REGMAP_32] = KSZ8463_REGMAP_ENTRY(32, (regbits), (regpad), (regalign)), \</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_dcb.c b/drivers/net/dsa/microchip/ksz_dcb.c<br/>index 30b4a6186e38..7131c5caac54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_dcb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_dcb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_dcb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_dcb.c</a></div><div class='hunk'>@@ -10,11 +10,18 @@</div><div class='ctx'> #include "ksz_dcb.h"</div><div class='ctx'> #include "ksz8.h"</div><div class='ctx'> </div><div class='del'>-#define KSZ8_REG_PORT_1_CTRL_0			0x10</div><div class='add'>+/* Port X Control 0 register.</div><div class='add'>+ * The datasheet specifies: Port 1 - 0x10, Port 2 - 0x20, Port 3 - 0x30.</div><div class='add'>+ * However, the driver uses get_port_addr(), which maps Port 1 to offset 0.</div><div class='add'>+ * Therefore, we define the base offset as 0x00 here to align with that logic.</div><div class='add'>+ */</div><div class='add'>+#define KSZ8_REG_PORT_1_CTRL_0			0x00</div><div class='add'>+#define KSZ8463_REG_PORT_1_CTRL_0		0x6C</div><div class='ctx'> #define KSZ8_PORT_DIFFSERV_ENABLE		BIT(6)</div><div class='ctx'> #define KSZ8_PORT_802_1P_ENABLE			BIT(5)</div><div class='ctx'> #define KSZ8_PORT_BASED_PRIO_M			GENMASK(4, 3)</div><div class='ctx'> </div><div class='add'>+#define KSZ8463_REG_TOS_DSCP_CTRL		0x16</div><div class='ctx'> #define KSZ88X3_REG_TOS_DSCP_CTRL		0x60</div><div class='ctx'> #define KSZ8765_REG_TOS_DSCP_CTRL		0x90</div><div class='ctx'> </div><div class='hunk'>@@ -93,6 +100,8 @@ static void ksz_get_default_port_prio_reg(struct ksz_device *dev, int *reg,</div><div class='ctx'> 		*reg = KSZ8_REG_PORT_1_CTRL_0;</div><div class='ctx'> 		*mask = KSZ8_PORT_BASED_PRIO_M;</div><div class='ctx'> 		*shift = __bf_shf(KSZ8_PORT_BASED_PRIO_M);</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			*reg = KSZ8463_REG_PORT_1_CTRL_0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		*reg = KSZ9477_REG_PORT_MRI_MAC_CTRL;</div><div class='ctx'> 		*mask = KSZ9477_PORT_BASED_PRIO_M;</div><div class='hunk'>@@ -117,10 +126,12 @@ static void ksz_get_dscp_prio_reg(struct ksz_device *dev, int *reg,</div><div class='ctx'> 		*reg = KSZ8765_REG_TOS_DSCP_CTRL;</div><div class='ctx'> 		*per_reg = 4;</div><div class='ctx'> 		*mask = GENMASK(1, 0);</div><div class='del'>-	} else if (ksz_is_ksz88x3(dev)) {</div><div class='add'>+	} else if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev)) {</div><div class='ctx'> 		*reg = KSZ88X3_REG_TOS_DSCP_CTRL;</div><div class='ctx'> 		*per_reg = 4;</div><div class='ctx'> 		*mask = GENMASK(1, 0);</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			*reg = KSZ8463_REG_TOS_DSCP_CTRL;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		*reg = KSZ9477_REG_DIFFSERV_PRIO_MAP;</div><div class='ctx'> 		*per_reg = 2;</div><div class='hunk'>@@ -146,6 +157,8 @@ static void ksz_get_apptrust_map_and_reg(struct ksz_device *dev,</div><div class='ctx'> 		*map = ksz8_apptrust_map_to_bit;</div><div class='ctx'> 		*reg = KSZ8_REG_PORT_1_CTRL_0;</div><div class='ctx'> 		*mask = KSZ8_PORT_DIFFSERV_ENABLE | KSZ8_PORT_802_1P_ENABLE;</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			*reg = KSZ8463_REG_PORT_1_CTRL_0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		*map = ksz9477_apptrust_map_to_bit;</div><div class='ctx'> 		*reg = KSZ9477_REG_PORT_MRI_PRIO_CTRL;</div><div class='hunk'>@@ -182,49 +195,6 @@ int ksz_port_get_default_prio(struct dsa_switch *ds, int port)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ksz88x3_port_set_default_prio_quirks - Quirks for default priority</div><div class='del'>- * @dev: Pointer to the KSZ switch device structure</div><div class='del'>- * @port: Port number for which to set the default priority</div><div class='del'>- * @prio: Priority value to set</div><div class='del'>- *</div><div class='del'>- * This function implements quirks for setting the default priority on KSZ88x3</div><div class='del'>- * devices. On Port 2, no other priority providers are working</div><div class='del'>- * except of PCP. So, configuring default priority on Port 2 is not possible.</div><div class='del'>- * On Port 1, it is not possible to configure port priority if PCP</div><div class='del'>- * apptrust on Port 2 is disabled. Since we disable multiple queues on the</div><div class='del'>- * switch to disable PCP on Port 2, we need to ensure that the default priority</div><div class='del'>- * configuration on Port 1 is in agreement with the configuration on Port 2.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, or a negative error code on failure</div><div class='del'>- */</div><div class='del'>-static int ksz88x3_port_set_default_prio_quirks(struct ksz_device *dev, int port,</div><div class='del'>-						u8 prio)</div><div class='del'>-{</div><div class='del'>-	if (!prio)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (port == KSZ_PORT_2) {</div><div class='del'>-		dev_err(dev-&gt;dev, "Port priority configuration is not working on Port 2\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	} else if (port == KSZ_PORT_1) {</div><div class='del'>-		u8 port2_data;</div><div class='del'>-		int ret;</div><div class='del'>-</div><div class='del'>-		ret = ksz_pread8(dev, KSZ_PORT_2, KSZ8_REG_PORT_1_CTRL_0,</div><div class='del'>-				 &amp;port2_data);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		if (!(port2_data &amp; KSZ8_PORT_802_1P_ENABLE)) {</div><div class='del'>-			dev_err(dev-&gt;dev, "Not possible to configure port priority on Port 1 if PCP apptrust on Port 2 is disabled\n");</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ksz_port_set_default_prio - Sets the default priority for a port on a KSZ</div><div class='ctx'>  *			       switch</div><div class='ctx'>  * @ds: Pointer to the DSA switch structure</div><div class='hunk'>@@ -239,18 +209,12 @@ static int ksz88x3_port_set_default_prio_quirks(struct ksz_device *dev, int port</div><div class='ctx'> int ksz_port_set_default_prio(struct dsa_switch *ds, int port, u8 prio)</div><div class='ctx'> {</div><div class='ctx'> 	struct ksz_device *dev = ds-&gt;priv;</div><div class='del'>-	int reg, shift, ret;</div><div class='add'>+	int reg, shift;</div><div class='ctx'> 	u8 mask;</div><div class='ctx'> </div><div class='ctx'> 	if (prio &gt;= dev-&gt;info-&gt;num_ipms)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (ksz_is_ksz88x3(dev)) {</div><div class='del'>-		ret = ksz88x3_port_set_default_prio_quirks(dev, port, prio);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ksz_get_default_port_prio_reg(dev, &amp;reg, &amp;mask, &amp;shift);</div><div class='ctx'> </div><div class='ctx'> 	return ksz_prmw8(dev, port, reg, mask, (prio &lt;&lt; shift) &amp; mask);</div><div class='hunk'>@@ -519,155 +483,6 @@ err_sel_not_vaild:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ksz88x3_port1_apptrust_quirk - Quirk for apptrust configuration on Port 1</div><div class='del'>- *				  of KSZ88x3 devices</div><div class='del'>- * @dev: Pointer to the KSZ switch device structure</div><div class='del'>- * @port: Port number for which to set the apptrust selectors</div><div class='del'>- * @reg: Register address for the apptrust configuration</div><div class='del'>- * @port1_data: Data to set for the apptrust configuration</div><div class='del'>- *</div><div class='del'>- * This function implements a quirk for apptrust configuration on Port 1 of</div><div class='del'>- * KSZ88x3 devices. It ensures that apptrust configuration on Port 1 is not</div><div class='del'>- * possible if PCP apptrust on Port 2 is disabled. This is because the Port 2</div><div class='del'>- * seems to be permanently hardwired to PCP classification, so we need to</div><div class='del'>- * do Port 1 configuration always in agreement with Port 2 configuration.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, or a negative error code on failure</div><div class='del'>- */</div><div class='del'>-static int ksz88x3_port1_apptrust_quirk(struct ksz_device *dev, int port,</div><div class='del'>-					int reg, u8 port1_data)</div><div class='del'>-{</div><div class='del'>-	u8 port2_data;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* If no apptrust is requested for Port 1, no need to care about Port 2</div><div class='del'>-	 * configuration.</div><div class='del'>-	 */</div><div class='del'>-	if (!(port1_data &amp; (KSZ8_PORT_802_1P_ENABLE | KSZ8_PORT_DIFFSERV_ENABLE)))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* We got request to enable any apptrust on Port 1. To make it possible,</div><div class='del'>-	 * we need to enable multiple queues on the switch. If we enable</div><div class='del'>-	 * multiqueue support, PCP classification on Port 2 will be</div><div class='del'>-	 * automatically activated by HW.</div><div class='del'>-	 */</div><div class='del'>-	ret = ksz_pread8(dev, KSZ_PORT_2, reg, &amp;port2_data);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* If KSZ8_PORT_802_1P_ENABLE bit is set on Port 2, the driver showed</div><div class='del'>-	 * the interest in PCP classification on Port 2. In this case,</div><div class='del'>-	 * multiqueue support is enabled and we can enable any apptrust on</div><div class='del'>-	 * Port 1.</div><div class='del'>-	 * If KSZ8_PORT_802_1P_ENABLE bit is not set on Port 2, the PCP</div><div class='del'>-	 * classification on Port 2 is still active, but the driver disabled</div><div class='del'>-	 * multiqueue support and made frame prioritization inactive for</div><div class='del'>-	 * all ports. In this case, we can't enable any apptrust on Port 1.</div><div class='del'>-	 */</div><div class='del'>-	if (!(port2_data &amp; KSZ8_PORT_802_1P_ENABLE)) {</div><div class='del'>-		dev_err(dev-&gt;dev, "Not possible to enable any apptrust on Port 1 if PCP apptrust on Port 2 is disabled\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ksz88x3_port2_apptrust_quirk - Quirk for apptrust configuration on Port 2</div><div class='del'>- *				  of KSZ88x3 devices</div><div class='del'>- * @dev: Pointer to the KSZ switch device structure</div><div class='del'>- * @port: Port number for which to set the apptrust selectors</div><div class='del'>- * @reg: Register address for the apptrust configuration</div><div class='del'>- * @port2_data: Data to set for the apptrust configuration</div><div class='del'>- *</div><div class='del'>- * This function implements a quirk for apptrust configuration on Port 2 of</div><div class='del'>- * KSZ88x3 devices. It ensures that DSCP apptrust is not working on Port 2 and</div><div class='del'>- * that it is not possible to disable PCP on Port 2. The only way to disable PCP</div><div class='del'>- * on Port 2 is to disable multiple queues on the switch.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, or a negative error code on failure</div><div class='del'>- */</div><div class='del'>-static int ksz88x3_port2_apptrust_quirk(struct ksz_device *dev, int port,</div><div class='del'>-					int reg, u8 port2_data)</div><div class='del'>-{</div><div class='del'>-	struct dsa_switch *ds = dev-&gt;ds;</div><div class='del'>-	u8 port1_data;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* First validate Port 2 configuration. DiffServ/DSCP is not working</div><div class='del'>-	 * on this port.</div><div class='del'>-	 */</div><div class='del'>-	if (port2_data &amp; KSZ8_PORT_DIFFSERV_ENABLE) {</div><div class='del'>-		dev_err(dev-&gt;dev, "DSCP apptrust is not working on Port 2\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If PCP support is requested, we need to enable all queues on the</div><div class='del'>-	 * switch to make PCP priority working on Port 2.</div><div class='del'>-	 */</div><div class='del'>-	if (port2_data &amp; KSZ8_PORT_802_1P_ENABLE)</div><div class='del'>-		return ksz8_all_queues_split(dev, dev-&gt;info-&gt;num_tx_queues);</div><div class='del'>-</div><div class='del'>-	/* We got request to disable PCP priority on Port 2.</div><div class='del'>-	 * Now, we need to compare Port 2 configuration with Port 1</div><div class='del'>-	 * configuration.</div><div class='del'>-	 */</div><div class='del'>-	ret = ksz_pread8(dev, KSZ_PORT_1, reg, &amp;port1_data);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* If Port 1 has any apptrust enabled, we can't disable multiple queues</div><div class='del'>-	 * on the switch, so we can't disable PCP on Port 2.</div><div class='del'>-	 */</div><div class='del'>-	if (port1_data &amp; (KSZ8_PORT_802_1P_ENABLE | KSZ8_PORT_DIFFSERV_ENABLE)) {</div><div class='del'>-		dev_err(dev-&gt;dev, "Not possible to disable PCP on Port 2 if any apptrust is enabled on Port 1\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Now we need to ensure that default priority on Port 1 is set to 0</div><div class='del'>-	 * otherwise we can't disable multiqueue support on the switch.</div><div class='del'>-	 */</div><div class='del'>-	ret = ksz_port_get_default_prio(ds, KSZ_PORT_1);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		return ret;</div><div class='del'>-	} else if (ret) {</div><div class='del'>-		dev_err(dev-&gt;dev, "Not possible to disable PCP on Port 2 if non zero default priority is set on Port 1\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Port 1 has no apptrust or default priority set and we got request to</div><div class='del'>-	 * disable PCP on Port 2. We can disable multiqueue support to disable</div><div class='del'>-	 * PCP on Port 2.</div><div class='del'>-	 */</div><div class='del'>-	return ksz8_all_queues_split(dev, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ksz88x3_port_apptrust_quirk - Quirk for apptrust configuration on KSZ88x3</div><div class='del'>- *			       devices</div><div class='del'>- * @dev: Pointer to the KSZ switch device structure</div><div class='del'>- * @port: Port number for which to set the apptrust selectors</div><div class='del'>- * @reg: Register address for the apptrust configuration</div><div class='del'>- * @data: Data to set for the apptrust configuration</div><div class='del'>- *</div><div class='del'>- * This function implements a quirk for apptrust configuration on KSZ88x3</div><div class='del'>- * devices. It ensures that apptrust configuration on Port 1 and</div><div class='del'>- * Port 2 is done in agreement with each other.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, or a negative error code on failure</div><div class='del'>- */</div><div class='del'>-static int ksz88x3_port_apptrust_quirk(struct ksz_device *dev, int port,</div><div class='del'>-				       int reg, u8 data)</div><div class='del'>-{</div><div class='del'>-	if (port == KSZ_PORT_1)</div><div class='del'>-		return ksz88x3_port1_apptrust_quirk(dev, port, reg, data);</div><div class='del'>-	else if (port == KSZ_PORT_2)</div><div class='del'>-		return ksz88x3_port2_apptrust_quirk(dev, port, reg, data);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ksz_port_set_apptrust - Sets the apptrust selectors for a port on a KSZ</div><div class='ctx'>  *			   switch</div><div class='ctx'>  * @ds: Pointer to the DSA switch structure</div><div class='hunk'>@@ -707,12 +522,6 @@ int ksz_port_set_apptrust(struct dsa_switch *ds, int port,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ksz_is_ksz88x3(dev)) {</div><div class='del'>-		ret = ksz88x3_port_apptrust_quirk(dev, port, reg, data);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return ksz_prmw8(dev, port, reg, mask, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -799,21 +608,5 @@ int ksz_dcb_init_port(struct ksz_device *dev, int port)</div><div class='ctx'>  */</div><div class='ctx'> int ksz_dcb_init(struct ksz_device *dev)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = ksz_init_global_dscp_map(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Enable 802.1p priority control on Port 2 during switch initialization.</div><div class='del'>-	 * This setup is critical for the apptrust functionality on Port 1, which</div><div class='del'>-	 * relies on the priority settings of Port 2. Note: Port 1 is naturally</div><div class='del'>-	 * configured before Port 2, necessitating this configuration order.</div><div class='del'>-	 */</div><div class='del'>-	if (ksz_is_ksz88x3(dev))</div><div class='del'>-		return ksz_prmw8(dev, KSZ_PORT_2, KSZ8_REG_PORT_1_CTRL_0,</div><div class='del'>-				 KSZ8_PORT_802_1P_ENABLE,</div><div class='del'>-				 KSZ8_PORT_802_1P_ENABLE);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return ksz_init_global_dscp_map(dev);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchip/ksz_ptp.c<br/>index 22fb9ef4645c..997e4a76d0a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_ptp.c</a></div><div class='hunk'>@@ -319,22 +319,21 @@ int ksz_get_ts_info(struct dsa_switch *ds, int port, struct kernel_ethtool_ts_in</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ksz_hwtstamp_get(struct dsa_switch *ds, int port, struct ifreq *ifr)</div><div class='add'>+int ksz_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+		     struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct ksz_device *dev = ds-&gt;priv;</div><div class='del'>-	struct hwtstamp_config *config;</div><div class='ctx'> 	struct ksz_port *prt;</div><div class='ctx'> </div><div class='ctx'> 	prt = &amp;dev-&gt;ports[port];</div><div class='del'>-	config = &amp;prt-&gt;tstamp_config;</div><div class='add'>+	*config = prt-&gt;tstamp_config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, config, sizeof(*config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ksz_set_hwtstamp_config(struct ksz_device *dev,</div><div class='ctx'> 				   struct ksz_port *prt,</div><div class='del'>-				   struct hwtstamp_config *config)</div><div class='add'>+				   struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -404,26 +403,21 @@ static int ksz_set_hwtstamp_config(struct ksz_device *dev,</div><div class='ctx'> 	return ksz_ptp_enable_mode(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ksz_hwtstamp_set(struct dsa_switch *ds, int port, struct ifreq *ifr)</div><div class='add'>+int ksz_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+		     struct kernel_hwtstamp_config *config,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ksz_device *dev = ds-&gt;priv;</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	struct ksz_port *prt;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	prt = &amp;dev-&gt;ports[port];</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	ret = ksz_set_hwtstamp_config(dev, prt, &amp;config);</div><div class='add'>+	ret = ksz_set_hwtstamp_config(dev, prt, config);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	memcpy(&amp;prt-&gt;tstamp_config, &amp;config, sizeof(config));</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	prt-&gt;tstamp_config = *config;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1099,19 +1093,19 @@ static int ksz_ptp_msg_irq_setup(struct ksz_port *port, u8 n)</div><div class='ctx'> 	static const char * const name[] = {"pdresp-msg", "xdreq-msg",</div><div class='ctx'> 					    "sync-msg"};</div><div class='ctx'> 	const struct ksz_dev_ops *ops = port-&gt;ksz_dev-&gt;dev_ops;</div><div class='add'>+	struct ksz_irq *ptpirq = &amp;port-&gt;ptpirq;</div><div class='ctx'> 	struct ksz_ptp_irq *ptpmsg_irq;</div><div class='ctx'> </div><div class='ctx'> 	ptpmsg_irq = &amp;port-&gt;ptpmsg_irq[n];</div><div class='add'>+	ptpmsg_irq-&gt;num = irq_create_mapping(ptpirq-&gt;domain, n);</div><div class='add'>+	if (!ptpmsg_irq-&gt;num)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ptpmsg_irq-&gt;port = port;</div><div class='ctx'> 	ptpmsg_irq-&gt;ts_reg = ops-&gt;get_port_addr(port-&gt;num, ts_reg[n]);</div><div class='ctx'> </div><div class='ctx'> 	strscpy(ptpmsg_irq-&gt;name, name[n]);</div><div class='ctx'> </div><div class='del'>-	ptpmsg_irq-&gt;num = irq_find_mapping(port-&gt;ptpirq.domain, n);</div><div class='del'>-	if (ptpmsg_irq-&gt;num &lt; 0)</div><div class='del'>-		return ptpmsg_irq-&gt;num;</div><div class='del'>-</div><div class='ctx'> 	return request_threaded_irq(ptpmsg_irq-&gt;num, NULL,</div><div class='ctx'> 				    ksz_ptp_msg_thread_fn, IRQF_ONESHOT,</div><div class='ctx'> 				    ptpmsg_irq-&gt;name, ptpmsg_irq);</div><div class='hunk'>@@ -1136,17 +1130,14 @@ int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p)</div><div class='ctx'> </div><div class='ctx'> 	init_completion(&amp;port-&gt;tstamp_msg_comp);</div><div class='ctx'> </div><div class='del'>-	ptpirq-&gt;domain = irq_domain_add_linear(dev-&gt;dev-&gt;of_node, ptpirq-&gt;nirqs,</div><div class='del'>-					       &amp;ksz_ptp_irq_domain_ops, ptpirq);</div><div class='add'>+	ptpirq-&gt;domain = irq_domain_create_linear(dev_fwnode(dev-&gt;dev), ptpirq-&gt;nirqs,</div><div class='add'>+						  &amp;ksz_ptp_irq_domain_ops, ptpirq);</div><div class='ctx'> 	if (!ptpirq-&gt;domain)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (irq = 0; irq &lt; ptpirq-&gt;nirqs; irq++)</div><div class='del'>-		irq_create_mapping(ptpirq-&gt;domain, irq);</div><div class='del'>-</div><div class='ctx'> 	ptpirq-&gt;irq_num = irq_find_mapping(port-&gt;pirq.domain, PORT_SRC_PTP_INT);</div><div class='del'>-	if (ptpirq-&gt;irq_num &lt; 0) {</div><div class='del'>-		ret = ptpirq-&gt;irq_num;</div><div class='add'>+	if (!ptpirq-&gt;irq_num) {</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1165,12 +1156,11 @@ int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p)</div><div class='ctx'> </div><div class='ctx'> out_ptp_msg:</div><div class='ctx'> 	free_irq(ptpirq-&gt;irq_num, ptpirq);</div><div class='del'>-	while (irq--)</div><div class='add'>+	while (irq--) {</div><div class='ctx'> 		free_irq(port-&gt;ptpmsg_irq[irq].num, &amp;port-&gt;ptpmsg_irq[irq]);</div><div class='del'>-out:</div><div class='del'>-	for (irq = 0; irq &lt; ptpirq-&gt;nirqs; irq++)</div><div class='ctx'> 		irq_dispose_mapping(port-&gt;ptpmsg_irq[irq].num);</div><div class='del'>-</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='ctx'> 	irq_domain_remove(ptpirq-&gt;domain);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchip/ksz_ptp.h<br/>index 2f1783c0d723..3086e519b1b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_ptp.h</a></div><div class='hunk'>@@ -39,8 +39,11 @@ void ksz_ptp_clock_unregister(struct dsa_switch *ds);</div><div class='ctx'> </div><div class='ctx'> int ksz_get_ts_info(struct dsa_switch *ds, int port,</div><div class='ctx'> 		    struct kernel_ethtool_ts_info *ts);</div><div class='del'>-int ksz_hwtstamp_get(struct dsa_switch *ds, int port, struct ifreq *ifr);</div><div class='del'>-int ksz_hwtstamp_set(struct dsa_switch *ds, int port, struct ifreq *ifr);</div><div class='add'>+int ksz_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+		     struct kernel_hwtstamp_config *config);</div><div class='add'>+int ksz_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+		     struct kernel_hwtstamp_config *config,</div><div class='add'>+		     struct netlink_ext_ack *extack);</div><div class='ctx'> void ksz_port_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb);</div><div class='ctx'> void ksz_port_deferred_xmit(struct kthread_work *work);</div><div class='ctx'> bool ksz_port_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb,</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_spi.c b/drivers/net/dsa/microchip/ksz_spi.c<br/>index 1c6652f2b9fe..d8001734b057 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_spi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/ksz_spi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_spi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_spi.c</a></div><div class='hunk'>@@ -16,6 +16,10 @@</div><div class='ctx'> </div><div class='ctx'> #include "ksz_common.h"</div><div class='ctx'> </div><div class='add'>+#define KSZ8463_SPI_ADDR_SHIFT			13</div><div class='add'>+#define KSZ8463_SPI_ADDR_ALIGN			3</div><div class='add'>+#define KSZ8463_SPI_TURNAROUND_SHIFT		2</div><div class='add'>+</div><div class='ctx'> #define KSZ8795_SPI_ADDR_SHIFT			12</div><div class='ctx'> #define KSZ8795_SPI_ADDR_ALIGN			3</div><div class='ctx'> #define KSZ8795_SPI_TURNAROUND_SHIFT		1</div><div class='hunk'>@@ -37,6 +41,99 @@ KSZ_REGMAP_TABLE(ksz8863, 16, KSZ8863_SPI_ADDR_SHIFT,</div><div class='ctx'> KSZ_REGMAP_TABLE(ksz9477, 32, KSZ9477_SPI_ADDR_SHIFT,</div><div class='ctx'> 		 KSZ9477_SPI_TURNAROUND_SHIFT, KSZ9477_SPI_ADDR_ALIGN);</div><div class='ctx'> </div><div class='add'>+static u16 ksz8463_reg(u16 reg, size_t size)</div><div class='add'>+{</div><div class='add'>+	switch (size) {</div><div class='add'>+	case 1:</div><div class='add'>+		reg = ((reg &gt;&gt; 2) &lt;&lt; 4) | (1 &lt;&lt; (reg &amp; 3));</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		reg = ((reg &gt;&gt; 2) &lt;&lt; 4) | (reg &amp; 2 ? 0x0c : 0x03);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		reg = ((reg &gt;&gt; 2) &lt;&lt; 4) | 0xf;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	reg &lt;&lt;= KSZ8463_SPI_TURNAROUND_SHIFT;</div><div class='add'>+	return reg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8463_spi_read(void *context,</div><div class='add'>+			    const void *reg, size_t reg_size,</div><div class='add'>+			    void *val, size_t val_size)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = context;</div><div class='add'>+	struct spi_device *spi = to_spi_device(dev);</div><div class='add'>+	u8 bytes[2];</div><div class='add'>+	u16 cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (reg_size &gt; 2 || val_size &gt; 4)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	memcpy(&amp;cmd, reg, sizeof(u16));</div><div class='add'>+	cmd = ksz8463_reg(cmd, val_size);</div><div class='add'>+	/* SPI command uses big-endian format. */</div><div class='add'>+	put_unaligned_be16(cmd, bytes);</div><div class='add'>+	rc = spi_write_then_read(spi, bytes, reg_size, val, val_size);</div><div class='add'>+#if defined(__BIG_ENDIAN)</div><div class='add'>+	/* Register value uses little-endian format so need to convert when</div><div class='add'>+	 * running in big-endian system.</div><div class='add'>+	 */</div><div class='add'>+	if (!rc &amp;&amp; val_size &gt; 1) {</div><div class='add'>+		if (val_size == 2) {</div><div class='add'>+			u16 v = get_unaligned_le16(val);</div><div class='add'>+</div><div class='add'>+			memcpy(val, &amp;v, sizeof(v));</div><div class='add'>+		} else if (val_size == 4) {</div><div class='add'>+			u32 v = get_unaligned_le32(val);</div><div class='add'>+</div><div class='add'>+			memcpy(val, &amp;v, sizeof(v));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8463_spi_write(void *context, const void *data, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = context;</div><div class='add'>+	struct spi_device *spi = to_spi_device(dev);</div><div class='add'>+	size_t val_size = count - 2;</div><div class='add'>+	u8 bytes[6];</div><div class='add'>+	u16 cmd;</div><div class='add'>+</div><div class='add'>+	if (count &lt;= 2 || count &gt; 6)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	memcpy(bytes, data, count);</div><div class='add'>+	memcpy(&amp;cmd, data, sizeof(u16));</div><div class='add'>+	cmd = ksz8463_reg(cmd, val_size);</div><div class='add'>+	cmd |= (1 &lt;&lt; (KSZ8463_SPI_ADDR_SHIFT + KSZ8463_SPI_TURNAROUND_SHIFT));</div><div class='add'>+	/* SPI command uses big-endian format. */</div><div class='add'>+	put_unaligned_be16(cmd, bytes);</div><div class='add'>+#if defined(__BIG_ENDIAN)</div><div class='add'>+	/* Register value uses little-endian format so need to convert when</div><div class='add'>+	 * running in big-endian system.</div><div class='add'>+	 */</div><div class='add'>+	if (val_size == 2) {</div><div class='add'>+		u8 *val = &amp;bytes[2];</div><div class='add'>+		u16 v;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;v, val, sizeof(v));</div><div class='add'>+		put_unaligned_le16(v, val);</div><div class='add'>+	} else if (val_size == 4) {</div><div class='add'>+		u8 *val = &amp;bytes[2];</div><div class='add'>+		u32 v;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;v, val, sizeof(v));</div><div class='add'>+		put_unaligned_le32(v, val);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	return spi_write(spi, bytes, count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+KSZ8463_REGMAP_TABLE(ksz8463, KSZ8463_SPI_ADDR_SHIFT, 0,</div><div class='add'>+		     KSZ8463_SPI_ADDR_ALIGN);</div><div class='add'>+</div><div class='ctx'> static int ksz_spi_probe(struct spi_device *spi)</div><div class='ctx'> {</div><div class='ctx'> 	const struct regmap_config *regmap_config;</div><div class='hunk'>@@ -54,8 +151,12 @@ static int ksz_spi_probe(struct spi_device *spi)</div><div class='ctx'> 	if (!chip)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	/* Save chip id to do special initialization when probing. */</div><div class='add'>+	dev-&gt;chip_id = chip-&gt;chip_id;</div><div class='ctx'> 	if (chip-&gt;chip_id == KSZ88X3_CHIP_ID)</div><div class='ctx'> 		regmap_config = ksz8863_regmap_config;</div><div class='add'>+	else if (chip-&gt;chip_id == KSZ8463_CHIP_ID)</div><div class='add'>+		regmap_config = ksz8463_regmap_config;</div><div class='ctx'> 	else if (chip-&gt;chip_id == KSZ8795_CHIP_ID ||</div><div class='ctx'> 		 chip-&gt;chip_id == KSZ8794_CHIP_ID ||</div><div class='ctx'> 		 chip-&gt;chip_id == KSZ8765_CHIP_ID)</div><div class='hunk'>@@ -124,6 +225,10 @@ static void ksz_spi_shutdown(struct spi_device *spi)</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id ksz_dt_ids[] = {</div><div class='ctx'> 	{</div><div class='add'>+		.compatible = "microchip,ksz8463",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8463]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		.compatible = "microchip,ksz8765",</div><div class='ctx'> 		.data = &amp;ksz_switch_chips[KSZ8765]</div><div class='ctx'> 	},</div><div class='hunk'>@@ -203,11 +308,16 @@ static const struct of_device_id ksz_dt_ids[] = {</div><div class='ctx'> 		.compatible = "microchip,lan9374",</div><div class='ctx'> 		.data = &amp;ksz_switch_chips[LAN9374]</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,lan9646",</div><div class='add'>+		.data = &amp;ksz_switch_chips[LAN9646]</div><div class='add'>+	},</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, ksz_dt_ids);</div><div class='ctx'> </div><div class='ctx'> static const struct spi_device_id ksz_spi_ids[] = {</div><div class='add'>+	{ "ksz8463" },</div><div class='ctx'> 	{ "ksz8765" },</div><div class='ctx'> 	{ "ksz8794" },</div><div class='ctx'> 	{ "ksz8795" },</div><div class='hunk'>@@ -228,14 +338,19 @@ static const struct spi_device_id ksz_spi_ids[] = {</div><div class='ctx'> 	{ "lan9372" },</div><div class='ctx'> 	{ "lan9373" },</div><div class='ctx'> 	{ "lan9374" },</div><div class='add'>+	{ "lan9646" },</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(spi, ksz_spi_ids);</div><div class='ctx'> </div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(ksz_spi_pm_ops,</div><div class='add'>+				ksz_switch_suspend, ksz_switch_resume);</div><div class='add'>+</div><div class='ctx'> static struct spi_driver ksz_spi_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name	= "ksz-switch",</div><div class='ctx'> 		.of_match_table = ksz_dt_ids,</div><div class='add'>+		.pm = &amp;ksz_spi_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> 	.id_table = ksz_spi_ids,</div><div class='ctx'> 	.probe	= ksz_spi_probe,</div><div class='head'>diff --git a/drivers/net/dsa/microchip/lan937x.h b/drivers/net/dsa/microchip/lan937x.h<br/>index 3388d91dbc44..df13ebbd356f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/lan937x.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/lan937x.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/lan937x.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/lan937x.h</a></div><div class='hunk'>@@ -13,6 +13,8 @@ void lan937x_port_setup(struct ksz_device *dev, int port, bool cpu_port);</div><div class='ctx'> void lan937x_config_cpu_port(struct dsa_switch *ds);</div><div class='ctx'> int lan937x_switch_init(struct ksz_device *dev);</div><div class='ctx'> void lan937x_switch_exit(struct ksz_device *dev);</div><div class='add'>+int lan937x_mdio_bus_preinit(struct ksz_device *dev, bool side_mdio);</div><div class='add'>+int lan937x_create_phy_addr_map(struct ksz_device *dev, bool side_mdio);</div><div class='ctx'> int lan937x_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data);</div><div class='ctx'> int lan937x_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val);</div><div class='ctx'> int lan937x_change_mtu(struct ksz_device *dev, int port, int new_mtu);</div><div class='head'>diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c<br/>index 824d9309a3d3..5a1496fff445 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/lan937x_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/lan937x_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/lan937x_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/lan937x_main.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* Microchip LAN937X switch driver main logic</div><div class='del'>- * Copyright (C) 2019-2022 Microchip Technology Inc.</div><div class='add'>+ * Copyright (C) 2019-2024 Microchip Technology Inc.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -18,6 +18,87 @@</div><div class='ctx'> #include "ksz9477.h"</div><div class='ctx'> #include "lan937x.h"</div><div class='ctx'> </div><div class='add'>+/* marker for ports without built-in PHY */</div><div class='add'>+#define LAN937X_NO_PHY U8_MAX</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * lan9370_phy_addr - Mapping of LAN9370 switch ports to PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * Each entry corresponds to a specific port on the LAN9370 switch,</div><div class='add'>+ * where ports 1-4 are connected to integrated 100BASE-T1 PHYs, and</div><div class='add'>+ * Port 5 is connected to an RGMII interface without a PHY. The values</div><div class='add'>+ * are based on the documentation (DS00003108E, section 3.3).</div><div class='add'>+ */</div><div class='add'>+static const u8 lan9370_phy_addr[] = {</div><div class='add'>+	[0] = 2, /* Port 1, T1 AFE0 */</div><div class='add'>+	[1] = 3, /* Port 2, T1 AFE1 */</div><div class='add'>+	[2] = 5, /* Port 3, T1 AFE3 */</div><div class='add'>+	[3] = 6, /* Port 4, T1 AFE4 */</div><div class='add'>+	[4] = LAN937X_NO_PHY, /* Port 5, RGMII 2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * lan9371_phy_addr - Mapping of LAN9371 switch ports to PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * The values are based on the documentation (DS00003109E, section 3.3).</div><div class='add'>+ */</div><div class='add'>+static const u8 lan9371_phy_addr[] = {</div><div class='add'>+	[0] = 2, /* Port 1, T1 AFE0 */</div><div class='add'>+	[1] = 3, /* Port 2, T1 AFE1 */</div><div class='add'>+	[2] = 5, /* Port 3, T1 AFE3 */</div><div class='add'>+	[3] = 8, /* Port 4, TX PHY */</div><div class='add'>+	[4] = LAN937X_NO_PHY, /* Port 5, RGMII 2 */</div><div class='add'>+	[5] = LAN937X_NO_PHY, /* Port 6, RGMII 1 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * lan9372_phy_addr - Mapping of LAN9372 switch ports to PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * The values are based on the documentation (DS00003110F, section 3.3).</div><div class='add'>+ */</div><div class='add'>+static const u8 lan9372_phy_addr[] = {</div><div class='add'>+	[0] = 2, /* Port 1, T1 AFE0 */</div><div class='add'>+	[1] = 3, /* Port 2, T1 AFE1 */</div><div class='add'>+	[2] = 5, /* Port 3, T1 AFE3 */</div><div class='add'>+	[3] = 8, /* Port 4, TX PHY */</div><div class='add'>+	[4] = LAN937X_NO_PHY, /* Port 5, RGMII 2 */</div><div class='add'>+	[5] = LAN937X_NO_PHY, /* Port 6, RGMII 1 */</div><div class='add'>+	[6] = 6, /* Port 7, T1 AFE4 */</div><div class='add'>+	[7] = 4, /* Port 8, T1 AFE2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * lan9373_phy_addr - Mapping of LAN9373 switch ports to PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * The values are based on the documentation (DS00003110F, section 3.3).</div><div class='add'>+ */</div><div class='add'>+static const u8 lan9373_phy_addr[] = {</div><div class='add'>+	[0] = 2, /* Port 1, T1 AFE0 */</div><div class='add'>+	[1] = 3, /* Port 2, T1 AFE1 */</div><div class='add'>+	[2] = 5, /* Port 3, T1 AFE3 */</div><div class='add'>+	[3] = LAN937X_NO_PHY, /* Port 4, SGMII */</div><div class='add'>+	[4] = LAN937X_NO_PHY, /* Port 5, RGMII 2 */</div><div class='add'>+	[5] = LAN937X_NO_PHY, /* Port 6, RGMII 1 */</div><div class='add'>+	[6] = 6, /* Port 7, T1 AFE4 */</div><div class='add'>+	[7] = 4, /* Port 8, T1 AFE2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * lan9374_phy_addr - Mapping of LAN9374 switch ports to PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * The values are based on the documentation (DS00003110F, section 3.3).</div><div class='add'>+ */</div><div class='add'>+static const u8 lan9374_phy_addr[] = {</div><div class='add'>+	[0] = 2, /* Port 1, T1 AFE0 */</div><div class='add'>+	[1] = 3, /* Port 2, T1 AFE1 */</div><div class='add'>+	[2] = 5, /* Port 3, T1 AFE3 */</div><div class='add'>+	[3] = 7, /* Port 4, T1 AFE5 */</div><div class='add'>+	[4] = LAN937X_NO_PHY, /* Port 5, RGMII 2 */</div><div class='add'>+	[5] = LAN937X_NO_PHY, /* Port 6, RGMII 1 */</div><div class='add'>+	[6] = 6, /* Port 7, T1 AFE4 */</div><div class='add'>+	[7] = 4, /* Port 8, T1 AFE2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int lan937x_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)</div><div class='ctx'> {</div><div class='ctx'> 	return regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0);</div><div class='hunk'>@@ -30,24 +111,144 @@ static int lan937x_port_cfg(struct ksz_device *dev, int port, int offset,</div><div class='ctx'> 				  bits, set ? bits : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lan937x_enable_spi_indirect_access(struct ksz_device *dev)</div><div class='add'>+/**</div><div class='add'>+ * lan937x_create_phy_addr_map - Create port-to-PHY address map for MDIO bus.</div><div class='add'>+ * @dev: Pointer to device structure.</div><div class='add'>+ * @side_mdio: Boolean indicating if the PHYs are accessed over a side MDIO bus.</div><div class='add'>+ *</div><div class='add'>+ * This function sets up the PHY address mapping for the LAN937x switches,</div><div class='add'>+ * which support two access modes for internal PHYs:</div><div class='add'>+ * 1. **SPI Access**: A straightforward one-to-one port-to-PHY address</div><div class='add'>+ *    mapping is applied.</div><div class='add'>+ * 2. **MDIO Access**: The PHY address mapping varies based on chip variant</div><div class='add'>+ *    and strap configuration. An offset is calculated based on strap settings</div><div class='add'>+ *    to ensure correct PHY addresses are assigned. The offset calculation logic</div><div class='add'>+ *    is based on Microchip's Article Number 000015828, available at:</div><div class='add'>+ *    https://microchip.my.site.com/s/article/LAN9374-Virtual-PHY-PHY-Address-Mapping</div><div class='add'>+ *</div><div class='add'>+ * The function first checks if side MDIO access is disabled, in which case a</div><div class='add'>+ * simple direct mapping (port number = PHY address) is applied. If side MDIO</div><div class='add'>+ * access is enabled, it reads the strap configuration to determine the correct</div><div class='add'>+ * offset for PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * The appropriate mapping table is selected based on the chip ID, and the</div><div class='add'>+ * `phy_addr_map` is populated with the correct addresses for each port. Any</div><div class='add'>+ * port with no PHY is assigned a `LAN937X_NO_PHY` marker.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+int lan937x_create_phy_addr_map(struct ksz_device *dev, bool side_mdio)</div><div class='add'>+{</div><div class='add'>+	static const u8 *phy_addr_map;</div><div class='add'>+	u32 strap_val;</div><div class='add'>+	u8 offset = 0;</div><div class='add'>+	size_t size;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	if (!side_mdio) {</div><div class='add'>+		/* simple direct mapping */</div><div class='add'>+		for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++)</div><div class='add'>+			dev-&gt;phy_addr_map[i] = i;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz_read32(dev, REG_SW_CFG_STRAP_VAL, &amp;strap_val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(strap_val &amp; SW_CASCADE_ID_CFG) &amp;&amp; !(strap_val &amp; SW_VPHY_ADD_CFG))</div><div class='add'>+		offset = 0;</div><div class='add'>+	else if (!(strap_val &amp; SW_CASCADE_ID_CFG) &amp;&amp; (strap_val &amp; SW_VPHY_ADD_CFG))</div><div class='add'>+		offset = 7;</div><div class='add'>+	else if ((strap_val &amp; SW_CASCADE_ID_CFG) &amp;&amp; !(strap_val &amp; SW_VPHY_ADD_CFG))</div><div class='add'>+		offset = 15;</div><div class='add'>+	else</div><div class='add'>+		offset = 22;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;info-&gt;chip_id) {</div><div class='add'>+	case LAN9370_CHIP_ID:</div><div class='add'>+		phy_addr_map = lan9370_phy_addr;</div><div class='add'>+		size = ARRAY_SIZE(lan9370_phy_addr);</div><div class='add'>+		break;</div><div class='add'>+	case LAN9371_CHIP_ID:</div><div class='add'>+		phy_addr_map = lan9371_phy_addr;</div><div class='add'>+		size = ARRAY_SIZE(lan9371_phy_addr);</div><div class='add'>+		break;</div><div class='add'>+	case LAN9372_CHIP_ID:</div><div class='add'>+		phy_addr_map = lan9372_phy_addr;</div><div class='add'>+		size = ARRAY_SIZE(lan9372_phy_addr);</div><div class='add'>+		break;</div><div class='add'>+	case LAN9373_CHIP_ID:</div><div class='add'>+		phy_addr_map = lan9373_phy_addr;</div><div class='add'>+		size = ARRAY_SIZE(lan9373_phy_addr);</div><div class='add'>+		break;</div><div class='add'>+	case LAN9374_CHIP_ID:</div><div class='add'>+		phy_addr_map = lan9374_phy_addr;</div><div class='add'>+		size = ARRAY_SIZE(lan9374_phy_addr);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (size &lt; dev-&gt;info-&gt;port_cnt)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++) {</div><div class='add'>+		if (phy_addr_map[i] == LAN937X_NO_PHY)</div><div class='add'>+			dev-&gt;phy_addr_map[i] = phy_addr_map[i];</div><div class='add'>+		else</div><div class='add'>+			dev-&gt;phy_addr_map[i] = phy_addr_map[i] + offset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lan937x_mdio_bus_preinit - Pre-initialize MDIO bus for accessing PHYs.</div><div class='add'>+ * @dev: Pointer to device structure.</div><div class='add'>+ * @side_mdio: Boolean indicating if the PHYs are accessed over a side MDIO bus.</div><div class='add'>+ *</div><div class='add'>+ * This function configures the LAN937x switch for PHY access either through</div><div class='add'>+ * SPI or the side MDIO bus, unlocking the necessary registers for each access</div><div class='add'>+ * mode.</div><div class='add'>+ *</div><div class='add'>+ * Operation Modes:</div><div class='add'>+ * 1. **SPI Access**: Enables SPI indirect access to address clock domain</div><div class='add'>+ *    crossing issues when SPI is used for PHY access.</div><div class='add'>+ * 2. **MDIO Access**: Grants access to internal PHYs over the side MDIO bus,</div><div class='add'>+ *    required when using the MDIO bus for PHY management.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+int lan937x_mdio_bus_preinit(struct ksz_device *dev, bool side_mdio)</div><div class='ctx'> {</div><div class='ctx'> 	u16 data16;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* Enable Phy access through SPI */</div><div class='add'>+	/* Unlock access to the PHYs, needed for SPI and side MDIO access */</div><div class='ctx'> 	ret = lan937x_cfg(dev, REG_GLOBAL_CTRL_0, SW_PHY_REG_BLOCK, false);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+		goto print_error;</div><div class='ctx'> </div><div class='del'>-	ret = ksz_read16(dev, REG_VPHY_SPECIAL_CTRL__2, &amp;data16);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+	if (side_mdio)</div><div class='add'>+		/* Allow access to internal PHYs over MDIO bus */</div><div class='add'>+		data16 = VPHY_MDIO_INTERNAL_ENABLE;</div><div class='add'>+	else</div><div class='add'>+		/* Enable SPI indirect access to address clock domain crossing</div><div class='add'>+		 * issue</div><div class='add'>+		 */</div><div class='add'>+		data16 = VPHY_SPI_INDIRECT_ENABLE;</div><div class='ctx'> </div><div class='del'>-	/* Allow SPI access */</div><div class='del'>-	data16 |= VPHY_SPI_INDIRECT_ENABLE;</div><div class='add'>+	ret = ksz_rmw16(dev, REG_VPHY_SPECIAL_CTRL__2,</div><div class='add'>+			VPHY_SPI_INDIRECT_ENABLE | VPHY_MDIO_INTERNAL_ENABLE,</div><div class='add'>+			data16);</div><div class='ctx'> </div><div class='del'>-	return ksz_write16(dev, REG_VPHY_SPECIAL_CTRL__2, data16);</div><div class='add'>+print_error:</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(dev-&gt;dev, "failed to preinit the MDIO bus\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan937x_vphy_ind_addr_wr(struct ksz_device *dev, int addr, int reg)</div><div class='hunk'>@@ -260,10 +461,66 @@ int lan937x_change_mtu(struct ksz_device *dev, int port, int new_mtu)</div><div class='ctx'> </div><div class='ctx'> int lan937x_set_ageing_time(struct ksz_device *dev, unsigned int msecs)</div><div class='ctx'> {</div><div class='del'>-	u32 secs = msecs / 1000;</div><div class='del'>-	u32 value;</div><div class='add'>+	u8 data, mult, value8;</div><div class='add'>+	bool in_msec = false;</div><div class='add'>+	u32 max_val, value;</div><div class='add'>+	u32 secs = msecs;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+#define MAX_TIMER_VAL	((1 &lt;&lt; 20) - 1)</div><div class='add'>+</div><div class='add'>+	/* The aging timer comprises a 3-bit multiplier and a 20-bit second</div><div class='add'>+	 * value.  Either of them cannot be zero.  The maximum timer is then</div><div class='add'>+	 * 7 * 1048575 = 7340025 seconds.  As this value is too large for</div><div class='add'>+	 * practical use it can be interpreted as microseconds, making the</div><div class='add'>+	 * maximum timer 7340 seconds with finer control.  This allows for</div><div class='add'>+	 * maximum 122 minutes compared to 29 minutes in KSZ9477 switch.</div><div class='add'>+	 */</div><div class='add'>+	if (msecs % 1000)</div><div class='add'>+		in_msec = true;</div><div class='add'>+	else</div><div class='add'>+		secs /= 1000;</div><div class='add'>+	if (!secs)</div><div class='add'>+		secs = 1;</div><div class='add'>+</div><div class='add'>+	/* Return error if too large. */</div><div class='add'>+	else if (secs &gt; 7 * MAX_TIMER_VAL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Configure how to interpret the number value. */</div><div class='add'>+	ret = ksz_rmw8(dev, REG_SW_LUE_CTRL_2, SW_AGE_CNT_IN_MICROSEC,</div><div class='add'>+		       in_msec ? SW_AGE_CNT_IN_MICROSEC : 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_read8(dev, REG_SW_LUE_CTRL_0, &amp;value8);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Check whether there is need to update the multiplier. */</div><div class='add'>+	mult = FIELD_GET(SW_AGE_CNT_M, value8);</div><div class='add'>+	max_val = MAX_TIMER_VAL;</div><div class='add'>+	if (mult &gt; 0) {</div><div class='add'>+		/* Try to use the same multiplier already in the register as</div><div class='add'>+		 * the hardware default uses multiplier 4 and 75 seconds for</div><div class='add'>+		 * 300 seconds.</div><div class='add'>+		 */</div><div class='add'>+		max_val = DIV_ROUND_UP(secs, mult);</div><div class='add'>+		if (max_val &gt; MAX_TIMER_VAL || max_val * mult != secs)</div><div class='add'>+			max_val = MAX_TIMER_VAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = DIV_ROUND_UP(secs, max_val);</div><div class='add'>+	if (mult != data) {</div><div class='add'>+		value8 &amp;= ~SW_AGE_CNT_M;</div><div class='add'>+		value8 |= FIELD_PREP(SW_AGE_CNT_M, data);</div><div class='add'>+		ret = ksz_write8(dev, REG_SW_LUE_CTRL_0, value8);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	secs = DIV_ROUND_UP(secs, data);</div><div class='add'>+</div><div class='ctx'> 	value = FIELD_GET(SW_AGE_PERIOD_7_0_M, secs);</div><div class='ctx'> </div><div class='ctx'> 	ret = ksz_write8(dev, REG_SW_AGE_PERIOD__1, value);</div><div class='hunk'>@@ -283,6 +540,7 @@ static void lan937x_set_tune_adj(struct ksz_device *dev, int port,</div><div class='ctx'> 	ksz_pread16(dev, port, reg, &amp;data16);</div><div class='ctx'> </div><div class='ctx'> 	/* Update tune Adjust */</div><div class='add'>+	data16 &amp;= ~PORT_TUNE_ADJ;</div><div class='ctx'> 	data16 |= FIELD_PREP(PORT_TUNE_ADJ, val);</div><div class='ctx'> 	ksz_pwrite16(dev, port, reg, data16);</div><div class='ctx'> </div><div class='hunk'>@@ -363,13 +621,6 @@ int lan937x_setup(struct dsa_switch *ds)</div><div class='ctx'> 	struct ksz_device *dev = ds-&gt;priv;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* enable Indirect Access from SPI to the VPHY registers */</div><div class='del'>-	ret = lan937x_enable_spi_indirect_access(dev);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_err(dev-&gt;dev, "failed to enable spi indirect access");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* The VLAN aware is a global setting. Mixed vlan</div><div class='ctx'> 	 * filterings are not supported.</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/drivers/net/dsa/microchip/lan937x_reg.h b/drivers/net/dsa/microchip/lan937x_reg.h<br/>index 2f22a9d01de3..72042fd64e5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/lan937x_reg.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/microchip/lan937x_reg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/lan937x_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/lan937x_reg.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /* Microchip LAN937X switch register definitions</div><div class='del'>- * Copyright (C) 2019-2021 Microchip Technology Inc.</div><div class='add'>+ * Copyright (C) 2019-2024 Microchip Technology Inc.</div><div class='ctx'>  */</div><div class='ctx'> #ifndef __LAN937X_REG_H</div><div class='ctx'> #define __LAN937X_REG_H</div><div class='hunk'>@@ -37,6 +37,10 @@</div><div class='ctx'> #define SW_CLK125_ENB			BIT(1)</div><div class='ctx'> #define SW_CLK25_ENB			BIT(0)</div><div class='ctx'> </div><div class='add'>+#define REG_SW_CFG_STRAP_VAL		0x0200</div><div class='add'>+#define SW_CASCADE_ID_CFG		BIT(15)</div><div class='add'>+#define SW_VPHY_ADD_CFG			BIT(0)</div><div class='add'>+</div><div class='ctx'> /* 2 - PHY Control */</div><div class='ctx'> #define REG_SW_CFG_STRAP_OVR		0x0214</div><div class='ctx'> #define SW_VPHY_DISABLE			BIT(31)</div><div class='hunk'>@@ -52,8 +56,7 @@</div><div class='ctx'> </div><div class='ctx'> #define SW_VLAN_ENABLE			BIT(7)</div><div class='ctx'> #define SW_DROP_INVALID_VID		BIT(6)</div><div class='del'>-#define SW_AGE_CNT_M			0x7</div><div class='del'>-#define SW_AGE_CNT_S			3</div><div class='add'>+#define SW_AGE_CNT_M			GENMASK(5, 3)</div><div class='ctx'> #define SW_RESV_MCAST_ENABLE		BIT(2)</div><div class='ctx'> </div><div class='ctx'> #define REG_SW_LUE_CTRL_1		0x0311</div><div class='hunk'>@@ -66,6 +69,10 @@</div><div class='ctx'> #define SW_FAST_AGING			BIT(1)</div><div class='ctx'> #define SW_LINK_AUTO_AGING		BIT(0)</div><div class='ctx'> </div><div class='add'>+#define REG_SW_LUE_CTRL_2		0x0312</div><div class='add'>+</div><div class='add'>+#define SW_AGE_CNT_IN_MICROSEC		BIT(7)</div><div class='add'>+</div><div class='ctx'> #define REG_SW_AGE_PERIOD__1		0x0313</div><div class='ctx'> #define SW_AGE_PERIOD_7_0_M		GENMASK(7, 0)</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/mt7530-mdio.c b/drivers/net/dsa/mt7530-mdio.c<br/>index 51df42ccdbe6..0286a6cecb6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530-mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mt7530-mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530-mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mt7530-mdio.c</a></div><div class='hunk'>@@ -136,10 +136,17 @@ static const struct of_device_id mt7530_of_match[] = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, mt7530_of_match);</div><div class='ctx'> </div><div class='add'>+static const struct regmap_config regmap_config = {</div><div class='add'>+	.reg_bits = 16,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_stride = 4,</div><div class='add'>+	.max_register = MT7530_CREV,</div><div class='add'>+	.disable_locking = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> mt7530_probe(struct mdio_device *mdiodev)</div><div class='ctx'> {</div><div class='del'>-	static struct regmap_config *regmap_config;</div><div class='ctx'> 	struct mt7530_priv *priv;</div><div class='ctx'> 	struct device_node *dn;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -193,18 +200,8 @@ mt7530_probe(struct mdio_device *mdiodev)</div><div class='ctx'> 			return PTR_ERR(priv-&gt;io_pwr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	regmap_config = devm_kzalloc(&amp;mdiodev-&gt;dev, sizeof(*regmap_config),</div><div class='del'>-				     GFP_KERNEL);</div><div class='del'>-	if (!regmap_config)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	regmap_config-&gt;reg_bits = 16;</div><div class='del'>-	regmap_config-&gt;val_bits = 32;</div><div class='del'>-	regmap_config-&gt;reg_stride = 4;</div><div class='del'>-	regmap_config-&gt;max_register = MT7530_CREV;</div><div class='del'>-	regmap_config-&gt;disable_locking = true;</div><div class='ctx'> 	priv-&gt;regmap = devm_regmap_init(priv-&gt;dev, &amp;mt7530_regmap_bus, priv,</div><div class='del'>-					regmap_config);</div><div class='add'>+					&amp;regmap_config);</div><div class='ctx'> 	if (IS_ERR(priv-&gt;regmap))</div><div class='ctx'> 		return PTR_ERR(priv-&gt;regmap);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/mt7530-mmio.c b/drivers/net/dsa/mt7530-mmio.c<br/>index 5f2db4317dd3..1dc8b93fb51a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530-mmio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mt7530-mmio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530-mmio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mt7530-mmio.c</a></div><div class='hunk'>@@ -11,16 +11,24 @@</div><div class='ctx'> #include "mt7530.h"</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id mt7988_of_match[] = {</div><div class='add'>+	{ .compatible = "airoha,an7583-switch", .data = &amp;mt753x_table[ID_AN7583], },</div><div class='ctx'> 	{ .compatible = "airoha,en7581-switch", .data = &amp;mt753x_table[ID_EN7581], },</div><div class='ctx'> 	{ .compatible = "mediatek,mt7988-switch", .data = &amp;mt753x_table[ID_MT7988], },</div><div class='ctx'> 	{ /* sentinel */ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, mt7988_of_match);</div><div class='ctx'> </div><div class='add'>+static const struct regmap_config sw_regmap_config = {</div><div class='add'>+	.name = "switch",</div><div class='add'>+	.reg_bits = 16,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_stride = 4,</div><div class='add'>+	.max_register = MT7530_CREV,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> mt7988_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	static struct regmap_config *sw_regmap_config;</div><div class='ctx'> 	struct mt7530_priv *priv;</div><div class='ctx'> 	void __iomem *base_addr;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -48,16 +56,8 @@ mt7988_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sw_regmap_config = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*sw_regmap_config), GFP_KERNEL);</div><div class='del'>-	if (!sw_regmap_config)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	sw_regmap_config-&gt;name = "switch";</div><div class='del'>-	sw_regmap_config-&gt;reg_bits = 16;</div><div class='del'>-	sw_regmap_config-&gt;val_bits = 32;</div><div class='del'>-	sw_regmap_config-&gt;reg_stride = 4;</div><div class='del'>-	sw_regmap_config-&gt;max_register = MT7530_CREV;</div><div class='del'>-	priv-&gt;regmap = devm_regmap_init_mmio(&amp;pdev-&gt;dev, base_addr, sw_regmap_config);</div><div class='add'>+	priv-&gt;regmap = devm_regmap_init_mmio(&amp;pdev-&gt;dev, base_addr,</div><div class='add'>+					     &amp;sw_regmap_config);</div><div class='ctx'> 	if (IS_ERR(priv-&gt;regmap))</div><div class='ctx'> 		return PTR_ERR(priv-&gt;regmap);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c<br/>index 086b8b3d5b40..b9423389c2ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mt7530.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mt7530.c</a></div><div class='hunk'>@@ -32,47 +32,15 @@ static struct mt753x_pcs *pcs_to_mt753x_pcs(struct phylink_pcs *pcs)</div><div class='ctx'> </div><div class='ctx'> /* String, offset, and register size in bytes if different from 4 bytes */</div><div class='ctx'> static const struct mt7530_mib_desc mt7530_mib[] = {</div><div class='del'>-	MIB_DESC(1, 0x00, "TxDrop"),</div><div class='del'>-	MIB_DESC(1, 0x04, "TxCrcErr"),</div><div class='del'>-	MIB_DESC(1, 0x08, "TxUnicast"),</div><div class='del'>-	MIB_DESC(1, 0x0c, "TxMulticast"),</div><div class='del'>-	MIB_DESC(1, 0x10, "TxBroadcast"),</div><div class='del'>-	MIB_DESC(1, 0x14, "TxCollision"),</div><div class='del'>-	MIB_DESC(1, 0x18, "TxSingleCollision"),</div><div class='del'>-	MIB_DESC(1, 0x1c, "TxMultipleCollision"),</div><div class='del'>-	MIB_DESC(1, 0x20, "TxDeferred"),</div><div class='del'>-	MIB_DESC(1, 0x24, "TxLateCollision"),</div><div class='del'>-	MIB_DESC(1, 0x28, "TxExcessiveCollistion"),</div><div class='del'>-	MIB_DESC(1, 0x2c, "TxPause"),</div><div class='del'>-	MIB_DESC(1, 0x30, "TxPktSz64"),</div><div class='del'>-	MIB_DESC(1, 0x34, "TxPktSz65To127"),</div><div class='del'>-	MIB_DESC(1, 0x38, "TxPktSz128To255"),</div><div class='del'>-	MIB_DESC(1, 0x3c, "TxPktSz256To511"),</div><div class='del'>-	MIB_DESC(1, 0x40, "TxPktSz512To1023"),</div><div class='del'>-	MIB_DESC(1, 0x44, "Tx1024ToMax"),</div><div class='del'>-	MIB_DESC(2, 0x48, "TxBytes"),</div><div class='del'>-	MIB_DESC(1, 0x60, "RxDrop"),</div><div class='del'>-	MIB_DESC(1, 0x64, "RxFiltering"),</div><div class='del'>-	MIB_DESC(1, 0x68, "RxUnicast"),</div><div class='del'>-	MIB_DESC(1, 0x6c, "RxMulticast"),</div><div class='del'>-	MIB_DESC(1, 0x70, "RxBroadcast"),</div><div class='del'>-	MIB_DESC(1, 0x74, "RxAlignErr"),</div><div class='del'>-	MIB_DESC(1, 0x78, "RxCrcErr"),</div><div class='del'>-	MIB_DESC(1, 0x7c, "RxUnderSizeErr"),</div><div class='del'>-	MIB_DESC(1, 0x80, "RxFragErr"),</div><div class='del'>-	MIB_DESC(1, 0x84, "RxOverSzErr"),</div><div class='del'>-	MIB_DESC(1, 0x88, "RxJabberErr"),</div><div class='del'>-	MIB_DESC(1, 0x8c, "RxPause"),</div><div class='del'>-	MIB_DESC(1, 0x90, "RxPktSz64"),</div><div class='del'>-	MIB_DESC(1, 0x94, "RxPktSz65To127"),</div><div class='del'>-	MIB_DESC(1, 0x98, "RxPktSz128To255"),</div><div class='del'>-	MIB_DESC(1, 0x9c, "RxPktSz256To511"),</div><div class='del'>-	MIB_DESC(1, 0xa0, "RxPktSz512To1023"),</div><div class='del'>-	MIB_DESC(1, 0xa4, "RxPktSz1024ToMax"),</div><div class='del'>-	MIB_DESC(2, 0xa8, "RxBytes"),</div><div class='del'>-	MIB_DESC(1, 0xb0, "RxCtrlDrop"),</div><div class='del'>-	MIB_DESC(1, 0xb4, "RxIngressDrop"),</div><div class='del'>-	MIB_DESC(1, 0xb8, "RxArlDrop"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_TX_DROP, "TxDrop"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_TX_CRC_ERR, "TxCrcErr"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_TX_COLLISION, "TxCollision"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_DROP, "RxDrop"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_FILTERING, "RxFiltering"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_CRC_ERR, "RxCrcErr"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_CTRL_DROP, "RxCtrlDrop"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_INGRESS_DROP, "RxIngressDrop"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_ARL_DROP, "RxArlDrop"),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -790,23 +758,33 @@ mt7530_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='add'>+mt7530_read_port_stats(struct mt7530_priv *priv, int port,</div><div class='add'>+		       u32 offset, u8 size, uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	u32 val, reg = MT7530_PORT_MIB_COUNTER(port) + offset;</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, reg);</div><div class='add'>+	*data = val;</div><div class='add'>+</div><div class='add'>+	if (size == 2) {</div><div class='add'>+		val = mt7530_read(priv, reg + 4);</div><div class='add'>+		*data |= (u64)val &lt;&lt; 32;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='ctx'> mt7530_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='ctx'> 			 uint64_t *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='ctx'> 	const struct mt7530_mib_desc *mib;</div><div class='del'>-	u32 reg, i;</div><div class='del'>-	u64 hi;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(mt7530_mib); i++) {</div><div class='ctx'> 		mib = &amp;mt7530_mib[i];</div><div class='del'>-		reg = MT7530_PORT_MIB_COUNTER(port) + mib-&gt;offset;</div><div class='ctx'> </div><div class='del'>-		data[i] = mt7530_read(priv, reg);</div><div class='del'>-		if (mib-&gt;size == 2) {</div><div class='del'>-			hi = mt7530_read(priv, reg + 4);</div><div class='del'>-			data[i] |= hi &lt;&lt; 32;</div><div class='del'>-		}</div><div class='add'>+		mt7530_read_port_stats(priv, port, mib-&gt;offset, mib-&gt;size,</div><div class='add'>+				       data + i);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -819,6 +797,172 @@ mt7530_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='ctx'> 	return ARRAY_SIZE(mt7530_mib);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mt7530_get_eth_mac_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* MIB counter doesn't provide a FramesTransmittedOK but instead</div><div class='add'>+	 * provide stats for Unicast, Broadcast and Multicast frames separately.</div><div class='add'>+	 * To simulate a global frame counter, read Unicast and addition Multicast</div><div class='add'>+	 * and Broadcast later</div><div class='add'>+	 */</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_UNICAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;FramesTransmittedOK);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_SINGLE_COLLISION, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;SingleCollisionFrames);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTIPLE_COLLISION, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;MultipleCollisionFrames);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_UNICAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;FramesReceivedOK);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BYTES, 2,</div><div class='add'>+			       &amp;mac_stats-&gt;OctetsTransmittedOK);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_ALIGN_ERR, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;AlignmentErrors);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_DEFERRED, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;FramesWithDeferredXmissions);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_LATE_COLLISION, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;LateCollisions);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_EXCESSIVE_COLLISION, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;FramesAbortedDueToXSColls);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BYTES, 2,</div><div class='add'>+			       &amp;mac_stats-&gt;OctetsReceivedOK);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTICAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;MulticastFramesXmittedOK);</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK += mac_stats-&gt;MulticastFramesXmittedOK;</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BROADCAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;BroadcastFramesXmittedOK);</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK += mac_stats-&gt;BroadcastFramesXmittedOK;</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_MULTICAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;MulticastFramesReceivedOK);</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK += mac_stats-&gt;MulticastFramesReceivedOK;</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BROADCAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;BroadcastFramesReceivedOK);</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK += mac_stats-&gt;BroadcastFramesReceivedOK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range mt7530_rmon_ranges[] = {</div><div class='add'>+	{ 0, 64 },</div><div class='add'>+	{ 65, 127 },</div><div class='add'>+	{ 128, 255 },</div><div class='add'>+	{ 256, 511 },</div><div class='add'>+	{ 512, 1023 },</div><div class='add'>+	{ 1024, MT7530_MAX_MTU },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mt7530_get_rmon_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+				  const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_UNDER_SIZE_ERR, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;undersize_pkts);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_OVER_SZ_ERR, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;oversize_pkts);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_FRAG_ERR, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;fragments);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_JABBER_ERR, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;jabbers);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_64, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[0]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_65_TO_127, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[1]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_128_TO_255, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[2]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_256_TO_511, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[3]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_512_TO_1023, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[4]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_1024_TO_MAX, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[5]);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_64, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[0]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_65_TO_127, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[1]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_128_TO_255, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[2]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_256_TO_511, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[3]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_512_TO_1023, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[4]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_1024_TO_MAX, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[5]);</div><div class='add'>+</div><div class='add'>+	*ranges = mt7530_rmon_ranges;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_get_stats64(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct rtnl_link_stats64 *storage)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	uint64_t data;</div><div class='add'>+</div><div class='add'>+	/* MIB counter doesn't provide a FramesTransmittedOK but instead</div><div class='add'>+	 * provide stats for Unicast, Broadcast and Multicast frames separately.</div><div class='add'>+	 * To simulate a global frame counter, read Unicast and addition Multicast</div><div class='add'>+	 * and Broadcast later</div><div class='add'>+	 */</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_UNICAST, 1,</div><div class='add'>+			       &amp;storage-&gt;rx_packets);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_MULTICAST, 1,</div><div class='add'>+			       &amp;storage-&gt;multicast);</div><div class='add'>+	storage-&gt;rx_packets += storage-&gt;multicast;</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BROADCAST, 1,</div><div class='add'>+			       &amp;data);</div><div class='add'>+	storage-&gt;rx_packets += data;</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_UNICAST, 1,</div><div class='add'>+			       &amp;storage-&gt;tx_packets);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTICAST, 1,</div><div class='add'>+			       &amp;data);</div><div class='add'>+	storage-&gt;tx_packets += data;</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BROADCAST, 1,</div><div class='add'>+			       &amp;data);</div><div class='add'>+	storage-&gt;tx_packets += data;</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BYTES, 2,</div><div class='add'>+			       &amp;storage-&gt;rx_bytes);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BYTES, 2,</div><div class='add'>+			       &amp;storage-&gt;tx_bytes);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_DROP, 1,</div><div class='add'>+			       &amp;storage-&gt;rx_dropped);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_DROP, 1,</div><div class='add'>+			       &amp;storage-&gt;tx_dropped);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_CRC_ERR, 1,</div><div class='add'>+			       &amp;storage-&gt;rx_crc_errors);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_get_eth_ctrl_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				      struct ethtool_eth_ctrl_stats *ctrl_stats)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PAUSE, 1,</div><div class='add'>+			       &amp;ctrl_stats-&gt;MACControlFramesTransmitted);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PAUSE, 1,</div><div class='add'>+			       &amp;ctrl_stats-&gt;MACControlFramesReceived);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> mt7530_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)</div><div class='ctx'> {</div><div class='hunk'>@@ -1154,7 +1298,7 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int port)</div><div class='ctx'> 	 * is affine to the inbound user port.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (priv-&gt;id == ID_MT7531 || priv-&gt;id == ID_MT7988 ||</div><div class='del'>-	    priv-&gt;id == ID_EN7581)</div><div class='add'>+	    priv-&gt;id == ID_EN7581 || priv-&gt;id == ID_AN7583)</div><div class='ctx'> 		mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));</div><div class='ctx'> </div><div class='ctx'> 	/* CPU port gets connected to all user ports of</div><div class='hunk'>@@ -1968,7 +2112,7 @@ mt7530_gpio_get(struct gpio_chip *gc, unsigned int offset)</div><div class='ctx'> 	return !!(mt7530_read(priv, MT7530_LED_GPIO_DATA) &amp; bit);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='add'>+static int</div><div class='ctx'> mt7530_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct mt7530_priv *priv = gpiochip_get_data(gc);</div><div class='hunk'>@@ -1978,6 +2122,8 @@ mt7530_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)</div><div class='ctx'> 		mt7530_set(priv, MT7530_LED_GPIO_DATA, bit);</div><div class='ctx'> 	else</div><div class='ctx'> 		mt7530_clear(priv, MT7530_LED_GPIO_DATA, bit);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -2050,131 +2196,6 @@ mt7530_setup_gpio(struct mt7530_priv *priv)</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_GPIOLIB */</div><div class='ctx'> </div><div class='del'>-static irqreturn_t</div><div class='del'>-mt7530_irq_thread_fn(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct mt7530_priv *priv = dev_id;</div><div class='del'>-	bool handled = false;</div><div class='del'>-	u32 val;</div><div class='del'>-	int p;</div><div class='del'>-</div><div class='del'>-	mt7530_mutex_lock(priv);</div><div class='del'>-	val = mt7530_mii_read(priv, MT7530_SYS_INT_STS);</div><div class='del'>-	mt7530_mii_write(priv, MT7530_SYS_INT_STS, val);</div><div class='del'>-	mt7530_mutex_unlock(priv);</div><div class='del'>-</div><div class='del'>-	for (p = 0; p &lt; MT7530_NUM_PHYS; p++) {</div><div class='del'>-		if (BIT(p) &amp; val) {</div><div class='del'>-			unsigned int irq;</div><div class='del'>-</div><div class='del'>-			irq = irq_find_mapping(priv-&gt;irq_domain, p);</div><div class='del'>-			handle_nested_irq(irq);</div><div class='del'>-			handled = true;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_RETVAL(handled);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-mt7530_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='del'>-</div><div class='del'>-	priv-&gt;irq_enable &amp;= ~BIT(d-&gt;hwirq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-mt7530_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='del'>-</div><div class='del'>-	priv-&gt;irq_enable |= BIT(d-&gt;hwirq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-mt7530_irq_bus_lock(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='del'>-</div><div class='del'>-	mt7530_mutex_lock(priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-mt7530_irq_bus_sync_unlock(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='del'>-</div><div class='del'>-	mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv-&gt;irq_enable);</div><div class='del'>-	mt7530_mutex_unlock(priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip mt7530_irq_chip = {</div><div class='del'>-	.name = KBUILD_MODNAME,</div><div class='del'>-	.irq_mask = mt7530_irq_mask,</div><div class='del'>-	.irq_unmask = mt7530_irq_unmask,</div><div class='del'>-	.irq_bus_lock = mt7530_irq_bus_lock,</div><div class='del'>-	.irq_bus_sync_unlock = mt7530_irq_bus_sync_unlock,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-mt7530_irq_map(struct irq_domain *domain, unsigned int irq,</div><div class='del'>-	       irq_hw_number_t hwirq)</div><div class='del'>-{</div><div class='del'>-	irq_set_chip_data(irq, domain-&gt;host_data);</div><div class='del'>-	irq_set_chip_and_handler(irq, &amp;mt7530_irq_chip, handle_simple_irq);</div><div class='del'>-	irq_set_nested_thread(irq, true);</div><div class='del'>-	irq_set_noprobe(irq);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct irq_domain_ops mt7530_irq_domain_ops = {</div><div class='del'>-	.map = mt7530_irq_map,</div><div class='del'>-	.xlate = irq_domain_xlate_onecell,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-mt7988_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='del'>-</div><div class='del'>-	priv-&gt;irq_enable &amp;= ~BIT(d-&gt;hwirq);</div><div class='del'>-	mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv-&gt;irq_enable);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-mt7988_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='del'>-</div><div class='del'>-	priv-&gt;irq_enable |= BIT(d-&gt;hwirq);</div><div class='del'>-	mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv-&gt;irq_enable);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct irq_chip mt7988_irq_chip = {</div><div class='del'>-	.name = KBUILD_MODNAME,</div><div class='del'>-	.irq_mask = mt7988_irq_mask,</div><div class='del'>-	.irq_unmask = mt7988_irq_unmask,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-mt7988_irq_map(struct irq_domain *domain, unsigned int irq,</div><div class='del'>-	       irq_hw_number_t hwirq)</div><div class='del'>-{</div><div class='del'>-	irq_set_chip_data(irq, domain-&gt;host_data);</div><div class='del'>-	irq_set_chip_and_handler(irq, &amp;mt7988_irq_chip, handle_simple_irq);</div><div class='del'>-	irq_set_nested_thread(irq, true);</div><div class='del'>-	irq_set_noprobe(irq);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct irq_domain_ops mt7988_irq_domain_ops = {</div><div class='del'>-	.map = mt7988_irq_map,</div><div class='del'>-	.xlate = irq_domain_xlate_onecell,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void</div><div class='ctx'> mt7530_setup_mdio_irq(struct mt7530_priv *priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -2191,49 +2212,72 @@ mt7530_setup_mdio_irq(struct mt7530_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct regmap_irq mt7530_irqs[] = {</div><div class='add'>+	REGMAP_IRQ_REG_LINE(0, 32),  /* PHY0_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(1, 32),  /* PHY1_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(2, 32),  /* PHY2_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(3, 32),  /* PHY3_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(4, 32),  /* PHY4_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(5, 32),  /* PHY5_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(6, 32),  /* PHY6_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(16, 32), /* MAC_PC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(17, 32), /* BMU */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(18, 32), /* MIB */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(22, 32), /* ARL_COL_FULL_COL */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(23, 32), /* ARL_COL_FULL */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(24, 32), /* ARL_TBL_ERR */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(25, 32), /* ARL_PKT_QERR */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(26, 32), /* ARL_EQ_ERR */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(27, 32), /* ARL_PKT_BC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(28, 32), /* ARL_SEC_IG1X */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(29, 32), /* ARL_SEC_VLAN */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(30, 32), /* ARL_SEC_TAG */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(31, 32), /* ACL */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_irq_chip mt7530_regmap_irq_chip = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.status_base = MT7530_SYS_INT_STS,</div><div class='add'>+	.unmask_base = MT7530_SYS_INT_EN,</div><div class='add'>+	.ack_base = MT7530_SYS_INT_STS,</div><div class='add'>+	.init_ack_masked = true,</div><div class='add'>+	.irqs = mt7530_irqs,</div><div class='add'>+	.num_irqs = ARRAY_SIZE(mt7530_irqs),</div><div class='add'>+	.num_regs = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> mt7530_setup_irq(struct mt7530_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	struct regmap_irq_chip_data *irq_data;</div><div class='ctx'> 	struct device *dev = priv-&gt;dev;</div><div class='ctx'> 	struct device_node *np = dev-&gt;of_node;</div><div class='del'>-	int ret;</div><div class='add'>+	int irq, ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!of_property_read_bool(np, "interrupt-controller")) {</div><div class='ctx'> 		dev_info(dev, "no interrupt support\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;irq = of_irq_get(np, 0);</div><div class='del'>-	if (priv-&gt;irq &lt;= 0) {</div><div class='del'>-		dev_err(dev, "failed to get parent IRQ: %d\n", priv-&gt;irq);</div><div class='del'>-		return priv-&gt;irq ? : -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;id == ID_MT7988 || priv-&gt;id == ID_EN7581)</div><div class='del'>-		priv-&gt;irq_domain = irq_domain_add_linear(np, MT7530_NUM_PHYS,</div><div class='del'>-							 &amp;mt7988_irq_domain_ops,</div><div class='del'>-							 priv);</div><div class='del'>-	else</div><div class='del'>-		priv-&gt;irq_domain = irq_domain_add_linear(np, MT7530_NUM_PHYS,</div><div class='del'>-							 &amp;mt7530_irq_domain_ops,</div><div class='del'>-							 priv);</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;irq_domain) {</div><div class='del'>-		dev_err(dev, "failed to create IRQ domain\n");</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	irq = of_irq_get(np, 0);</div><div class='add'>+	if (irq &lt;= 0) {</div><div class='add'>+		dev_err(dev, "failed to get parent IRQ: %d\n", irq);</div><div class='add'>+		return irq ? : -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* This register must be set for MT7530 to properly fire interrupts */</div><div class='ctx'> 	if (priv-&gt;id == ID_MT7530 || priv-&gt;id == ID_MT7621)</div><div class='ctx'> 		mt7530_set(priv, MT7530_TOP_SIG_CTRL, TOP_SIG_CTRL_NORMAL);</div><div class='ctx'> </div><div class='del'>-	ret = request_threaded_irq(priv-&gt;irq, NULL, mt7530_irq_thread_fn,</div><div class='del'>-				   IRQF_ONESHOT, KBUILD_MODNAME, priv);</div><div class='del'>-	if (ret) {</div><div class='del'>-		irq_domain_remove(priv-&gt;irq_domain);</div><div class='del'>-		dev_err(dev, "failed to request IRQ: %d\n", ret);</div><div class='add'>+	ret = devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev),</div><div class='add'>+					      priv-&gt;regmap, irq,</div><div class='add'>+					      IRQF_ONESHOT,</div><div class='add'>+					      0, &amp;mt7530_regmap_irq_chip,</div><div class='add'>+					      &amp;irq_data);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;irq_domain = regmap_irq_get_domain(irq_data);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2253,26 +2297,6 @@ mt7530_free_mdio_irq(struct mt7530_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-mt7530_free_irq_common(struct mt7530_priv *priv)</div><div class='del'>-{</div><div class='del'>-	free_irq(priv-&gt;irq, priv);</div><div class='del'>-	irq_domain_remove(priv-&gt;irq_domain);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-mt7530_free_irq(struct mt7530_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct device_node *mnp, *np = priv-&gt;dev-&gt;of_node;</div><div class='del'>-</div><div class='del'>-	mnp = of_get_child_by_name(np, "mdio");</div><div class='del'>-	if (!mnp)</div><div class='del'>-		mt7530_free_mdio_irq(priv);</div><div class='del'>-	of_node_put(mnp);</div><div class='del'>-</div><div class='del'>-	mt7530_free_irq_common(priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int</div><div class='ctx'> mt7530_setup_mdio(struct mt7530_priv *priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -2307,13 +2331,13 @@ mt7530_setup_mdio(struct mt7530_priv *priv)</div><div class='ctx'> 	bus-&gt;parent = dev;</div><div class='ctx'> 	bus-&gt;phy_mask = ~ds-&gt;phys_mii_mask;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;irq &amp;&amp; !mnp)</div><div class='add'>+	if (priv-&gt;irq_domain &amp;&amp; !mnp)</div><div class='ctx'> 		mt7530_setup_mdio_irq(priv);</div><div class='ctx'> </div><div class='ctx'> 	ret = devm_of_mdiobus_register(dev, bus, mnp);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "failed to register MDIO bus: %d\n", ret);</div><div class='del'>-		if (priv-&gt;irq &amp;&amp; !mnp)</div><div class='add'>+		if (priv-&gt;irq_domain &amp;&amp; !mnp)</div><div class='ctx'> 			mt7530_free_mdio_irq(priv);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2541,6 +2565,9 @@ mt7531_setup_common(struct dsa_switch *ds)</div><div class='ctx'> 	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='add'>+	ds-&gt;assisted_learning_on_cpu_port = true;</div><div class='add'>+	ds-&gt;mtu_enforcement_ingress = true;</div><div class='add'>+</div><div class='ctx'> 	mt753x_trap_frames(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable and reset MIB counters */</div><div class='hunk'>@@ -2586,12 +2613,18 @@ mt7531_setup_common(struct dsa_switch *ds)</div><div class='ctx'> 	/* Allow mirroring frames received on the local port (monitor port). */</div><div class='ctx'> 	mt7530_set(priv, MT753X_AGC, LOCAL_EN);</div><div class='ctx'> </div><div class='add'>+	/* Enable Special Tag for rx frames */</div><div class='add'>+	if (priv-&gt;id == ID_EN7581 || priv-&gt;id == ID_AN7583)</div><div class='add'>+		mt7530_write(priv, MT753X_CPORT_SPTAG_CFG,</div><div class='add'>+			     CPORT_SW2FE_STAG_EN | CPORT_FE2SW_STAG_EN);</div><div class='add'>+</div><div class='ctx'> 	/* Flush the FDB table */</div><div class='ctx'> 	ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* Setup VLAN ID 0 for VLAN-unaware bridges */</div><div class='add'>+	return mt7530_setup_vlan0(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -2687,14 +2720,6 @@ mt7531_setup(struct dsa_switch *ds)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	/* Setup VLAN ID 0 for VLAN-unaware bridges */</div><div class='del'>-	ret = mt7530_setup_vlan0(priv);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ds-&gt;assisted_learning_on_cpu_port = true;</div><div class='del'>-	ds-&gt;mtu_enforcement_ingress = true;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2957,28 +2982,61 @@ static void mt753x_phylink_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 			mcr |= PMCR_FORCE_RX_FC_EN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mode == MLO_AN_PHY &amp;&amp; phydev &amp;&amp; phy_init_eee(phydev, false) &gt;= 0) {</div><div class='del'>-		switch (speed) {</div><div class='del'>-		case SPEED_1000:</div><div class='del'>-		case SPEED_2500:</div><div class='del'>-			mcr |= PMCR_FORCE_EEE1G;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED_100:</div><div class='del'>-			mcr |= PMCR_FORCE_EEE100;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	mt7530_set(priv, MT753X_PMCR_P(dp-&gt;index), mcr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mt753x_phylink_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mt7530_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mt7530_clear(priv, MT753X_PMCR_P(dp-&gt;index),</div><div class='add'>+		     PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt753x_phylink_mac_enable_tx_lpi(struct phylink_config *config,</div><div class='add'>+					    u32 timer, bool tx_clock_stop)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mt7530_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* If the timer is zero, then set LPI_MODE_EN, which allows the</div><div class='add'>+	 * system to enter LPI mode immediately rather than waiting for</div><div class='add'>+	 * the LPI threshold.</div><div class='add'>+	 */</div><div class='add'>+	if (!timer)</div><div class='add'>+		val = LPI_MODE_EN;</div><div class='add'>+	else if (FIELD_FIT(LPI_THRESH_MASK, timer))</div><div class='add'>+		val = FIELD_PREP(LPI_THRESH_MASK, timer);</div><div class='add'>+	else</div><div class='add'>+		val = LPI_THRESH_MASK;</div><div class='add'>+</div><div class='add'>+	mt7530_rmw(priv, MT753X_PMEEECR_P(dp-&gt;index),</div><div class='add'>+		   LPI_THRESH_MASK | LPI_MODE_EN, val);</div><div class='add'>+</div><div class='add'>+	mt7530_set(priv, MT753X_PMCR_P(dp-&gt;index),</div><div class='add'>+		   PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='ctx'> 				    struct phylink_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 eeecr;</div><div class='ctx'> </div><div class='ctx'> 	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE;</div><div class='ctx'> </div><div class='add'>+	config-&gt;lpi_capabilities = MAC_100FD | MAC_1000FD | MAC_2500FD;</div><div class='add'>+</div><div class='add'>+	eeecr = mt7530_read(priv, MT753X_PMEEECR_P(port));</div><div class='add'>+	/* tx_lpi_timer should be in microseconds. The time units for</div><div class='add'>+	 * LPI threshold are unspecified.</div><div class='add'>+	 */</div><div class='add'>+	config-&gt;lpi_timer_default = FIELD_GET(LPI_THRESH_MASK, eeecr);</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;info-&gt;mac_port_get_caps(ds, port, config);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2994,7 +3052,7 @@ static int mt753x_pcs_validate(struct phylink_pcs *pcs,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mt7530_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+static void mt7530_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 				 struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct mt7530_priv *priv = pcs_to_mt753x_pcs(pcs)-&gt;priv;</div><div class='hunk'>@@ -3063,55 +3121,31 @@ mt753x_setup(struct dsa_switch *ds)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = mt7530_setup_mdio(priv);</div><div class='del'>-	if (ret &amp;&amp; priv-&gt;irq)</div><div class='del'>-		mt7530_free_irq_common(priv);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialise the PCS devices */</div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;ds-&gt;num_ports; i++) {</div><div class='ctx'> 		priv-&gt;pcs[i].pcs.ops = priv-&gt;info-&gt;pcs_ops;</div><div class='del'>-		priv-&gt;pcs[i].pcs.neg_mode = true;</div><div class='ctx'> 		priv-&gt;pcs[i].priv = priv;</div><div class='ctx'> 		priv-&gt;pcs[i].port = i;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;create_sgmii) {</div><div class='add'>+	if (priv-&gt;create_sgmii)</div><div class='ctx'> 		ret = priv-&gt;create_sgmii(priv);</div><div class='del'>-		if (ret &amp;&amp; priv-&gt;irq)</div><div class='del'>-			mt7530_free_irq(priv);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static int mt753x_get_mac_eee(struct dsa_switch *ds, int port,</div><div class='del'>-			      struct ethtool_keee *e)</div><div class='del'>-{</div><div class='del'>-	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='del'>-	u32 eeecr = mt7530_read(priv, MT753X_PMEEECR_P(port));</div><div class='del'>-</div><div class='del'>-	e-&gt;tx_lpi_enabled = !(eeecr &amp; LPI_MODE_EN);</div><div class='del'>-	e-&gt;tx_lpi_timer = LPI_THRESH_GET(eeecr);</div><div class='add'>+	if (ret &amp;&amp; priv-&gt;irq_domain)</div><div class='add'>+		mt7530_free_mdio_irq(priv);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mt753x_set_mac_eee(struct dsa_switch *ds, int port,</div><div class='ctx'> 			      struct ethtool_keee *e)</div><div class='ctx'> {</div><div class='del'>-	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='del'>-	u32 set, mask = LPI_THRESH_MASK | LPI_MODE_EN;</div><div class='del'>-</div><div class='ctx'> 	if (e-&gt;tx_lpi_timer &gt; 0xFFF)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	set = LPI_THRESH_SET(e-&gt;tx_lpi_timer);</div><div class='del'>-	if (!e-&gt;tx_lpi_enabled)</div><div class='del'>-		/* Force LPI Mode without a delay */</div><div class='del'>-		set |= LPI_MODE_EN;</div><div class='del'>-	mt7530_rmw(priv, MT753X_PMEEECR_P(port), mask, set);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3204,19 +3238,33 @@ static int mt7988_setup(struct dsa_switch *ds)</div><div class='ctx'> 	reset_control_deassert(priv-&gt;rstc);</div><div class='ctx'> 	usleep_range(20, 50);</div><div class='ctx'> </div><div class='add'>+	/* AN7583 require additional tweak to CONN_CFG */</div><div class='add'>+	if (priv-&gt;id == ID_AN7583)</div><div class='add'>+		mt7530_rmw(priv, AN7583_GEPHY_CONN_CFG,</div><div class='add'>+			   AN7583_CSR_DPHY_CKIN_SEL |</div><div class='add'>+			   AN7583_CSR_PHY_CORE_REG_CLK_SEL |</div><div class='add'>+			   AN7583_CSR_ETHER_AFE_PWD,</div><div class='add'>+			   AN7583_CSR_DPHY_CKIN_SEL |</div><div class='add'>+			   AN7583_CSR_PHY_CORE_REG_CLK_SEL |</div><div class='add'>+			   FIELD_PREP(AN7583_CSR_ETHER_AFE_PWD, 0));</div><div class='add'>+</div><div class='ctx'> 	/* Reset the switch PHYs */</div><div class='ctx'> 	mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_PHY_RST);</div><div class='ctx'> </div><div class='ctx'> 	return mt7531_setup_common(ds);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-const struct dsa_switch_ops mt7530_switch_ops = {</div><div class='add'>+static const struct dsa_switch_ops mt7530_switch_ops = {</div><div class='ctx'> 	.get_tag_protocol	= mtk_get_tag_protocol,</div><div class='ctx'> 	.setup			= mt753x_setup,</div><div class='ctx'> 	.preferred_default_local_cpu_port = mt753x_preferred_default_local_cpu_port,</div><div class='ctx'> 	.get_strings		= mt7530_get_strings,</div><div class='ctx'> 	.get_ethtool_stats	= mt7530_get_ethtool_stats,</div><div class='ctx'> 	.get_sset_count		= mt7530_get_sset_count,</div><div class='add'>+	.get_eth_mac_stats	= mt7530_get_eth_mac_stats,</div><div class='add'>+	.get_rmon_stats		= mt7530_get_rmon_stats,</div><div class='add'>+	.get_eth_ctrl_stats	= mt7530_get_eth_ctrl_stats,</div><div class='add'>+	.get_stats64		= mt7530_get_stats64,</div><div class='ctx'> 	.set_ageing_time	= mt7530_set_ageing_time,</div><div class='ctx'> 	.port_enable		= mt7530_port_enable,</div><div class='ctx'> 	.port_disable		= mt7530_port_disable,</div><div class='hunk'>@@ -3238,18 +3286,21 @@ const struct dsa_switch_ops mt7530_switch_ops = {</div><div class='ctx'> 	.port_mirror_add	= mt753x_port_mirror_add,</div><div class='ctx'> 	.port_mirror_del	= mt753x_port_mirror_del,</div><div class='ctx'> 	.phylink_get_caps	= mt753x_phylink_get_caps,</div><div class='del'>-	.get_mac_eee		= mt753x_get_mac_eee,</div><div class='add'>+	.support_eee		= dsa_supports_eee,</div><div class='ctx'> 	.set_mac_eee		= mt753x_set_mac_eee,</div><div class='ctx'> 	.conduit_state_change	= mt753x_conduit_state_change,</div><div class='ctx'> 	.port_setup_tc		= mt753x_setup_tc,</div><div class='add'>+	.port_hsr_join		= dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave		= dsa_port_simple_hsr_leave,</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(mt7530_switch_ops);</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_mac_ops mt753x_phylink_mac_ops = {</div><div class='ctx'> 	.mac_select_pcs	= mt753x_phylink_mac_select_pcs,</div><div class='ctx'> 	.mac_config	= mt753x_phylink_mac_config,</div><div class='ctx'> 	.mac_link_down	= mt753x_phylink_mac_link_down,</div><div class='ctx'> 	.mac_link_up	= mt753x_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = mt753x_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = mt753x_phylink_mac_enable_tx_lpi,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct mt753x_info mt753x_table[] = {</div><div class='hunk'>@@ -3306,6 +3357,16 @@ const struct mt753x_info mt753x_table[] = {</div><div class='ctx'> 		.phy_write_c45 = mt7531_ind_c45_phy_write,</div><div class='ctx'> 		.mac_port_get_caps = en7581_mac_port_get_caps,</div><div class='ctx'> 	},</div><div class='add'>+	[ID_AN7583] = {</div><div class='add'>+		.id = ID_AN7583,</div><div class='add'>+		.pcs_ops = &amp;mt7530_pcs_ops,</div><div class='add'>+		.sw_setup = mt7988_setup,</div><div class='add'>+		.phy_read_c22 = mt7531_ind_c22_phy_read,</div><div class='add'>+		.phy_write_c22 = mt7531_ind_c22_phy_write,</div><div class='add'>+		.phy_read_c45 = mt7531_ind_c45_phy_read,</div><div class='add'>+		.phy_write_c45 = mt7531_ind_c45_phy_write,</div><div class='add'>+		.mac_port_get_caps = en7581_mac_port_get_caps,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(mt753x_table);</div><div class='ctx'> </div><div class='hunk'>@@ -3343,8 +3404,8 @@ EXPORT_SYMBOL_GPL(mt7530_probe_common);</div><div class='ctx'> void</div><div class='ctx'> mt7530_remove_common(struct mt7530_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	if (priv-&gt;irq)</div><div class='del'>-		mt7530_free_irq(priv);</div><div class='add'>+	if (priv-&gt;irq_domain)</div><div class='add'>+		mt7530_free_mdio_irq(priv);</div><div class='ctx'> </div><div class='ctx'> 	dsa_unregister_switch(priv-&gt;ds);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h<br/>index 448200689f49..3e0090bed298 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mt7530.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mt7530.h</a></div><div class='hunk'>@@ -20,6 +20,7 @@ enum mt753x_id {</div><div class='ctx'> 	ID_MT7531 = 2,</div><div class='ctx'> 	ID_MT7988 = 3,</div><div class='ctx'> 	ID_EN7581 = 4,</div><div class='add'>+	ID_AN7583 = 5,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define	NUM_TRGMII_CTRL			5</div><div class='hunk'>@@ -66,7 +67,8 @@ enum mt753x_id {</div><div class='ctx'> </div><div class='ctx'> #define MT753X_MIRROR_REG(id)		((id == ID_MT7531 || \</div><div class='ctx'> 					  id == ID_MT7988 || \</div><div class='del'>-					  id == ID_EN7581) ? \</div><div class='add'>+					  id == ID_EN7581 || \</div><div class='add'>+					  id == ID_AN7583) ? \</div><div class='ctx'> 					 MT7531_CFC : MT753X_MFC)</div><div class='ctx'> </div><div class='ctx'> #define MT753X_MIRROR_EN(id)		((id == ID_MT7531 || \</div><div class='hunk'>@@ -76,19 +78,22 @@ enum mt753x_id {</div><div class='ctx'> </div><div class='ctx'> #define MT753X_MIRROR_PORT_MASK(id)	((id == ID_MT7531 || \</div><div class='ctx'> 					  id == ID_MT7988 || \</div><div class='del'>-					  id == ID_EN7581) ? \</div><div class='add'>+					  id == ID_EN7581 || \</div><div class='add'>+					  id == ID_AN7583) ? \</div><div class='ctx'> 					 MT7531_MIRROR_PORT_MASK : \</div><div class='ctx'> 					 MT7530_MIRROR_PORT_MASK)</div><div class='ctx'> </div><div class='ctx'> #define MT753X_MIRROR_PORT_GET(id, val)	((id == ID_MT7531 || \</div><div class='ctx'> 					  id == ID_MT7988 || \</div><div class='del'>-					  id == ID_EN7581) ? \</div><div class='add'>+					  id == ID_EN7581 || \</div><div class='add'>+					  id == ID_AN7583) ? \</div><div class='ctx'> 					 MT7531_MIRROR_PORT_GET(val) : \</div><div class='ctx'> 					 MT7530_MIRROR_PORT_GET(val))</div><div class='ctx'> </div><div class='ctx'> #define MT753X_MIRROR_PORT_SET(id, val)	((id == ID_MT7531 || \</div><div class='ctx'> 					  id == ID_MT7988 || \</div><div class='del'>-					  id == ID_EN7581) ? \</div><div class='add'>+					  id == ID_EN7581 || \</div><div class='add'>+					  id == ID_AN7583) ? \</div><div class='ctx'> 					 MT7531_MIRROR_PORT_SET(val) : \</div><div class='ctx'> 					 MT7530_MIRROR_PORT_SET(val))</div><div class='ctx'> </div><div class='hunk'>@@ -423,6 +428,48 @@ enum mt7530_vlan_port_acc_frm {</div><div class='ctx'> </div><div class='ctx'> /* Register for MIB */</div><div class='ctx'> #define MT7530_PORT_MIB_COUNTER(x)	(0x4000 + (x) * 0x100)</div><div class='add'>+/* Each define is an offset of MT7530_PORT_MIB_COUNTER */</div><div class='add'>+#define   MT7530_PORT_MIB_TX_DROP	0x00</div><div class='add'>+#define   MT7530_PORT_MIB_TX_CRC_ERR	0x04</div><div class='add'>+#define   MT7530_PORT_MIB_TX_UNICAST	0x08</div><div class='add'>+#define   MT7530_PORT_MIB_TX_MULTICAST	0x0c</div><div class='add'>+#define   MT7530_PORT_MIB_TX_BROADCAST	0x10</div><div class='add'>+#define   MT7530_PORT_MIB_TX_COLLISION	0x14</div><div class='add'>+#define   MT7530_PORT_MIB_TX_SINGLE_COLLISION 0x18</div><div class='add'>+#define   MT7530_PORT_MIB_TX_MULTIPLE_COLLISION 0x1c</div><div class='add'>+#define   MT7530_PORT_MIB_TX_DEFERRED	0x20</div><div class='add'>+#define   MT7530_PORT_MIB_TX_LATE_COLLISION 0x24</div><div class='add'>+#define   MT7530_PORT_MIB_TX_EXCESSIVE_COLLISION 0x28</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PAUSE	0x2c</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_64	0x30</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_65_TO_127 0x34</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_128_TO_255 0x38</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_256_TO_511 0x3c</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_512_TO_1023 0x40</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_1024_TO_MAX 0x44</div><div class='add'>+#define   MT7530_PORT_MIB_TX_BYTES	0x48 /* 64 bytes */</div><div class='add'>+#define   MT7530_PORT_MIB_RX_DROP	0x60</div><div class='add'>+#define   MT7530_PORT_MIB_RX_FILTERING	0x64</div><div class='add'>+#define   MT7530_PORT_MIB_RX_UNICAST	0x68</div><div class='add'>+#define   MT7530_PORT_MIB_RX_MULTICAST	0x6c</div><div class='add'>+#define   MT7530_PORT_MIB_RX_BROADCAST	0x70</div><div class='add'>+#define   MT7530_PORT_MIB_RX_ALIGN_ERR	0x74</div><div class='add'>+#define   MT7530_PORT_MIB_RX_CRC_ERR	0x78</div><div class='add'>+#define   MT7530_PORT_MIB_RX_UNDER_SIZE_ERR 0x7c</div><div class='add'>+#define   MT7530_PORT_MIB_RX_FRAG_ERR	0x80</div><div class='add'>+#define   MT7530_PORT_MIB_RX_OVER_SZ_ERR 0x84</div><div class='add'>+#define   MT7530_PORT_MIB_RX_JABBER_ERR	0x88</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PAUSE	0x8c</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_64	0x90</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_65_TO_127 0x94</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_128_TO_255 0x98</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_256_TO_511 0x9c</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_512_TO_1023 0xa0</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_1024_TO_MAX 0xa4</div><div class='add'>+#define   MT7530_PORT_MIB_RX_BYTES	0xa8 /* 64 bytes */</div><div class='add'>+#define   MT7530_PORT_MIB_RX_CTRL_DROP	0xb0</div><div class='add'>+#define   MT7530_PORT_MIB_RX_INGRESS_DROP 0xb4</div><div class='add'>+#define   MT7530_PORT_MIB_RX_ARL_DROP	0xb8</div><div class='ctx'> #define MT7530_MIB_CCR			0x4fe0</div><div class='ctx'> #define  CCR_MIB_ENABLE			BIT(31)</div><div class='ctx'> #define  CCR_RX_OCT_CNT_GOOD		BIT(7)</div><div class='hunk'>@@ -627,6 +674,15 @@ enum mt7531_xtal_fsel {</div><div class='ctx'> #define  MT7531_GPIO12_RG_RXD3_MASK	GENMASK(19, 16)</div><div class='ctx'> #define  MT7531_EXT_P_MDIO_12		(2 &lt;&lt; 16)</div><div class='ctx'> </div><div class='add'>+#define MT753X_CPORT_SPTAG_CFG		0x7c10</div><div class='add'>+#define  CPORT_SW2FE_STAG_EN		BIT(1)</div><div class='add'>+#define  CPORT_FE2SW_STAG_EN		BIT(0)</div><div class='add'>+</div><div class='add'>+#define AN7583_GEPHY_CONN_CFG		0x7c14</div><div class='add'>+#define  AN7583_CSR_DPHY_CKIN_SEL	BIT(31)</div><div class='add'>+#define  AN7583_CSR_PHY_CORE_REG_CLK_SEL BIT(30)</div><div class='add'>+#define  AN7583_CSR_ETHER_AFE_PWD	GENMASK(28, 24)</div><div class='add'>+</div><div class='ctx'> /* Registers for LED GPIO control (MT7530 only)</div><div class='ctx'>  * All registers follow this pattern:</div><div class='ctx'>  * [ 2: 0]  port 0</div><div class='hunk'>@@ -815,9 +871,7 @@ struct mt753x_info {</div><div class='ctx'>  * @p5_mode:		Holding the current mode of port 5 of the MT7530 switch</div><div class='ctx'>  * @p5_sgmii:		Flag for distinguishing if port 5 of the MT7531 switch</div><div class='ctx'>  *			has got SGMII</div><div class='del'>- * @irq:		IRQ number of the switch</div><div class='ctx'>  * @irq_domain:		IRQ domain of the switch irq_chip</div><div class='del'>- * @irq_enable:		IRQ enable bits, synced to SYS_INT_EN</div><div class='ctx'>  * @create_sgmii:	Pointer to function creating SGMII PCS instance(s)</div><div class='ctx'>  * @active_cpu_ports:	Holding the active CPU ports</div><div class='ctx'>  * @mdiodev:		The pointer to the MDIO device structure</div><div class='hunk'>@@ -842,9 +896,7 @@ struct mt7530_priv {</div><div class='ctx'> 	struct mt753x_pcs	pcs[MT7530_NUM_PORTS];</div><div class='ctx'> 	/* protect among processes for registers access*/</div><div class='ctx'> 	struct mutex reg_mutex;</div><div class='del'>-	int irq;</div><div class='ctx'> 	struct irq_domain *irq_domain;</div><div class='del'>-	u32 irq_enable;</div><div class='ctx'> 	int (*create_sgmii)(struct mt7530_priv *priv);</div><div class='ctx'> 	u8 active_cpu_ports;</div><div class='ctx'> 	struct mdio_device *mdiodev;</div><div class='hunk'>@@ -887,7 +939,6 @@ static inline void INIT_MT7530_DUMMY_POLL(struct mt7530_dummy_poll *p,</div><div class='ctx'> int mt7530_probe_common(struct mt7530_priv *priv);</div><div class='ctx'> void mt7530_remove_common(struct mt7530_priv *priv);</div><div class='ctx'> </div><div class='del'>-extern const struct dsa_switch_ops mt7530_switch_ops;</div><div class='ctx'> extern const struct mt753x_info mt753x_table[];</div><div class='ctx'> </div><div class='ctx'> #endif /* __MT7530_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6060.c b/drivers/net/dsa/mv88e6060.c<br/>index 294312b58e4f..9c8ac14cd4f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6060.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6060.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6060.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6060.c</a></div><div class='hunk'>@@ -297,6 +297,8 @@ static const struct dsa_switch_ops mv88e6060_switch_ops = {</div><div class='ctx'> 	.phy_read	= mv88e6060_phy_read,</div><div class='ctx'> 	.phy_write	= mv88e6060_phy_write,</div><div class='ctx'> 	.phylink_get_caps = mv88e6060_phylink_get_caps,</div><div class='add'>+	.port_hsr_join	= dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave	= dsa_port_simple_hsr_leave,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int mv88e6060_probe(struct mdio_device *mdiodev)</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c<br/>index 3a792f79270d..b4d48997bf46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/chip.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/chip.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/chip.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/chip.c</a></div><div class='hunk'>@@ -297,7 +297,7 @@ static int mv88e6xxx_g1_irq_setup_common(struct mv88e6xxx_chip *chip)</div><div class='ctx'> 	u16 reg, mask;</div><div class='ctx'> </div><div class='ctx'> 	chip-&gt;g1_irq.nirqs = chip-&gt;info-&gt;g1_irqs;</div><div class='del'>-	chip-&gt;g1_irq.domain = irq_domain_add_simple(</div><div class='add'>+	chip-&gt;g1_irq.domain = irq_domain_create_simple(</div><div class='ctx'> 		NULL, chip-&gt;g1_irq.nirqs, 0,</div><div class='ctx'> 		&amp;mv88e6xxx_g1_irq_domain_ops, chip);</div><div class='ctx'> 	if (!chip-&gt;g1_irq.domain)</div><div class='hunk'>@@ -394,7 +394,7 @@ static int mv88e6xxx_irq_poll_setup(struct mv88e6xxx_chip *chip)</div><div class='ctx'> 	kthread_init_delayed_work(&amp;chip-&gt;irq_poll_work,</div><div class='ctx'> 				  mv88e6xxx_irq_poll);</div><div class='ctx'> </div><div class='del'>-	chip-&gt;kworker = kthread_create_worker(0, "%s", dev_name(chip-&gt;dev));</div><div class='add'>+	chip-&gt;kworker = kthread_run_worker(0, "%s", dev_name(chip-&gt;dev));</div><div class='ctx'> 	if (IS_ERR(chip-&gt;kworker))</div><div class='ctx'> 		return PTR_ERR(chip-&gt;kworker);</div><div class='ctx'> </div><div class='hunk'>@@ -1289,9 +1289,6 @@ static size_t mv88e6095_stats_get_stat(struct mv88e6xxx_chip *chip, int port,</div><div class='ctx'> 				       const struct mv88e6xxx_hw_stat *stat,</div><div class='ctx'> 				       uint64_t *data)</div><div class='ctx'> {</div><div class='del'>-	if (!(stat-&gt;type &amp; (STATS_TYPE_BANK0 | STATS_TYPE_PORT)))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	*data = _mv88e6xxx_get_ethtool_stat(chip, stat, port, 0,</div><div class='ctx'> 					    MV88E6XXX_G1_STATS_OP_HIST_RX);</div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -1301,9 +1298,6 @@ static size_t mv88e6250_stats_get_stat(struct mv88e6xxx_chip *chip, int port,</div><div class='ctx'> 				       const struct mv88e6xxx_hw_stat *stat,</div><div class='ctx'> 				       uint64_t *data)</div><div class='ctx'> {</div><div class='del'>-	if (!(stat-&gt;type &amp; STATS_TYPE_BANK0))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	*data = _mv88e6xxx_get_ethtool_stat(chip, stat, port, 0,</div><div class='ctx'> 					    MV88E6XXX_G1_STATS_OP_HIST_RX);</div><div class='ctx'> 	return 1;</div><div class='hunk'>@@ -1313,9 +1307,6 @@ static size_t mv88e6320_stats_get_stat(struct mv88e6xxx_chip *chip, int port,</div><div class='ctx'> 				       const struct mv88e6xxx_hw_stat *stat,</div><div class='ctx'> 				       uint64_t *data)</div><div class='ctx'> {</div><div class='del'>-	if (!(stat-&gt;type &amp; (STATS_TYPE_BANK0 | STATS_TYPE_BANK1)))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	*data = _mv88e6xxx_get_ethtool_stat(chip, stat, port,</div><div class='ctx'> 					    MV88E6XXX_G1_STATS_OP_BANK_1_BIT_9,</div><div class='ctx'> 					    MV88E6XXX_G1_STATS_OP_HIST_RX);</div><div class='hunk'>@@ -1326,9 +1317,6 @@ static size_t mv88e6390_stats_get_stat(struct mv88e6xxx_chip *chip, int port,</div><div class='ctx'> 				       const struct mv88e6xxx_hw_stat *stat,</div><div class='ctx'> 				       uint64_t *data)</div><div class='ctx'> {</div><div class='del'>-	if (!(stat-&gt;type &amp; (STATS_TYPE_BANK0 | STATS_TYPE_BANK1)))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	*data = _mv88e6xxx_get_ethtool_stat(chip, stat, port,</div><div class='ctx'> 					    MV88E6XXX_G1_STATS_OP_BANK_1_BIT_10,</div><div class='ctx'> 					    0);</div><div class='hunk'>@@ -1341,6 +1329,9 @@ static size_t mv88e6xxx_stats_get_stat(struct mv88e6xxx_chip *chip, int port,</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='add'>+	if (!(stat-&gt;type &amp; chip-&gt;info-&gt;stats_type))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	if (chip-&gt;info-&gt;ops-&gt;stats_get_stat) {</div><div class='ctx'> 		mv88e6xxx_reg_lock(chip);</div><div class='ctx'> 		ret = chip-&gt;info-&gt;ops-&gt;stats_get_stat(chip, port, stat, data);</div><div class='hunk'>@@ -1522,13 +1513,6 @@ static void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,</div><div class='ctx'> 	mv88e6xxx_reg_unlock(chip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv88e6xxx_get_mac_eee(struct dsa_switch *ds, int port,</div><div class='del'>-				 struct ethtool_keee *e)</div><div class='del'>-{</div><div class='del'>-	/* Nothing to do on the port's MAC */</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mv88e6xxx_set_mac_eee(struct dsa_switch *ds, int port,</div><div class='ctx'> 				 struct ethtool_keee *e)</div><div class='ctx'> {</div><div class='hunk'>@@ -1868,6 +1852,8 @@ static int mv88e6xxx_vtu_get(struct mv88e6xxx_chip *chip, u16 vid,</div><div class='ctx'> 	if (!chip-&gt;info-&gt;ops-&gt;vtu_getnext)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='add'>+	memset(entry, 0, sizeof(*entry));</div><div class='add'>+</div><div class='ctx'> 	entry-&gt;vid = vid ? vid - 1 : mv88e6xxx_max_vid(chip);</div><div class='ctx'> 	entry-&gt;valid = false;</div><div class='ctx'> </div><div class='hunk'>@@ -1976,7 +1962,16 @@ static int mv88e6xxx_mst_put(struct mv88e6xxx_chip *chip, u8 sid)</div><div class='ctx'> 	struct mv88e6xxx_mst *mst, *tmp;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (!sid)</div><div class='add'>+	/* If the SID is zero, it is for a VLAN mapped to the default MSTI,</div><div class='add'>+	 * and mv88e6xxx_stu_setup() made sure it is always present, and thus,</div><div class='add'>+	 * should not be removed here.</div><div class='add'>+	 *</div><div class='add'>+	 * If the chip lacks STU support, numerically the "sid" variable will</div><div class='add'>+	 * happen to also be zero, but we don't want to rely on that fact, so</div><div class='add'>+	 * we explicitly test that first. In that case, there is also nothing</div><div class='add'>+	 * to do here.</div><div class='add'>+	 */</div><div class='add'>+	if (!mv88e6xxx_has_stu(chip) || !sid)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry_safe(mst, tmp, &amp;chip-&gt;msts, node) {</div><div class='hunk'>@@ -2224,13 +2219,11 @@ mv88e6xxx_port_vlan_prepare(struct dsa_switch *ds, int port,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv88e6xxx_port_db_load_purge(struct mv88e6xxx_chip *chip, int port,</div><div class='del'>-					const unsigned char *addr, u16 vid,</div><div class='del'>-					u8 state)</div><div class='add'>+static int mv88e6xxx_port_db_get(struct mv88e6xxx_chip *chip,</div><div class='add'>+				 const unsigned char *addr, u16 vid,</div><div class='add'>+				 u16 *fid, struct mv88e6xxx_atu_entry *entry)</div><div class='ctx'> {</div><div class='del'>-	struct mv88e6xxx_atu_entry entry;</div><div class='ctx'> 	struct mv88e6xxx_vtu_entry vlan;</div><div class='del'>-	u16 fid;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* Ports have two private address databases: one for when the port is</div><div class='hunk'>@@ -2241,7 +2234,7 @@ static int mv88e6xxx_port_db_load_purge(struct mv88e6xxx_chip *chip, int port,</div><div class='ctx'> 	 * VLAN ID into the port's database used for VLAN-unaware bridging.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (vid == 0) {</div><div class='del'>-		fid = MV88E6XXX_FID_BRIDGED;</div><div class='add'>+		*fid = MV88E6XXX_FID_BRIDGED;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		err = mv88e6xxx_vtu_get(chip, vid, &amp;vlan);</div><div class='ctx'> 		if (err)</div><div class='hunk'>@@ -2251,14 +2244,39 @@ static int mv88e6xxx_port_db_load_purge(struct mv88e6xxx_chip *chip, int port,</div><div class='ctx'> 		if (!vlan.valid)</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-		fid = vlan.fid;</div><div class='add'>+		*fid = vlan.fid;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	entry.state = 0;</div><div class='del'>-	ether_addr_copy(entry.mac, addr);</div><div class='del'>-	eth_addr_dec(entry.mac);</div><div class='add'>+	entry-&gt;state = 0;</div><div class='add'>+	ether_addr_copy(entry-&gt;mac, addr);</div><div class='add'>+	eth_addr_dec(entry-&gt;mac);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_getnext(chip, *fid, entry);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	err = mv88e6xxx_g1_atu_getnext(chip, fid, &amp;entry);</div><div class='add'>+static bool mv88e6xxx_port_db_find(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_atu_entry entry;</div><div class='add'>+	u16 fid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_db_get(chip, addr, vid, &amp;fid, &amp;entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return entry.state &amp;&amp; ether_addr_equal(entry.mac, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_db_load_purge(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					const unsigned char *addr, u16 vid,</div><div class='add'>+					u8 state)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_atu_entry entry;</div><div class='add'>+	u16 fid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_db_get(chip, addr, vid, &amp;fid, &amp;entry);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -2862,6 +2880,13 @@ static int mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='ctx'> 	mv88e6xxx_reg_lock(chip);</div><div class='ctx'> 	err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid,</div><div class='ctx'> 					   MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_port_db_find(chip, addr, vid))</div><div class='add'>+		err = -ENOSPC;</div><div class='add'>+</div><div class='add'>+out:</div><div class='ctx'> 	mv88e6xxx_reg_unlock(chip);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -3660,6 +3685,21 @@ static int mv88e6xxx_stats_setup(struct mv88e6xxx_chip *chip)</div><div class='ctx'> 	return mv88e6xxx_g1_stats_clear(chip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mv88e6320_setup_errata(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 dummy;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Workaround for erratum</div><div class='add'>+	 *   3.3 RGMII timing may be out of spec when transmit delay is enabled</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_port_hidden_write(chip, 0, 0xf, 0x7, 0xe000);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_hidden_read(chip, 0, 0xf, 0x7, &amp;dummy);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Check if the errata has already been applied. */</div><div class='ctx'> static bool mv88e6390_setup_errata_applied(struct mv88e6xxx_chip *chip)</div><div class='ctx'> {</div><div class='hunk'>@@ -3925,6 +3965,8 @@ static void mv88e6xxx_teardown(struct dsa_switch *ds)</div><div class='ctx'> 	mv88e6xxx_teardown_devlink_params(ds);</div><div class='ctx'> 	dsa_devlink_resources_unregister(ds);</div><div class='ctx'> 	mv88e6xxx_teardown_devlink_regions_global(ds);</div><div class='add'>+	mv88e6xxx_hwtstamp_free(chip);</div><div class='add'>+	mv88e6xxx_ptp_free(chip);</div><div class='ctx'> 	mv88e6xxx_mdios_unregister(chip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4065,7 +4107,7 @@ unlock:</div><div class='ctx'> 	mv88e6xxx_reg_unlock(chip);</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='del'>-		goto out_mdios;</div><div class='add'>+		goto out_hwtstamp;</div><div class='ctx'> </div><div class='ctx'> 	/* Have to be called without holding the register lock, since</div><div class='ctx'> 	 * they take the devlink lock, and we later take the locks in</div><div class='hunk'>@@ -4074,7 +4116,7 @@ unlock:</div><div class='ctx'> 	 */</div><div class='ctx'> 	err = mv88e6xxx_setup_devlink_resources(ds);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto out_mdios;</div><div class='add'>+		goto out_hwtstamp;</div><div class='ctx'> </div><div class='ctx'> 	err = mv88e6xxx_setup_devlink_params(ds);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -4090,7 +4132,9 @@ out_params:</div><div class='ctx'> 	mv88e6xxx_teardown_devlink_params(ds);</div><div class='ctx'> out_resources:</div><div class='ctx'> 	dsa_devlink_resources_unregister(ds);</div><div class='del'>-out_mdios:</div><div class='add'>+out_hwtstamp:</div><div class='add'>+	mv88e6xxx_hwtstamp_free(chip);</div><div class='add'>+	mv88e6xxx_ptp_free(chip);</div><div class='ctx'> 	mv88e6xxx_mdios_unregister(chip);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -5048,7 +5092,7 @@ static const struct mv88e6xxx_ops mv88e6250_ops = {</div><div class='ctx'> 	.vtu_getnext = mv88e6185_g1_vtu_getnext,</div><div class='ctx'> 	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,</div><div class='ctx'> 	.avb_ops = &amp;mv88e6352_avb_ops,</div><div class='del'>-	.ptp_ops = &amp;mv88e6250_ptp_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='ctx'> 	.phylink_get_caps = mv88e6250_phylink_get_caps,</div><div class='ctx'> 	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,</div><div class='ctx'> };</div><div class='hunk'>@@ -5116,6 +5160,7 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {</div><div class='ctx'> </div><div class='ctx'> static const struct mv88e6xxx_ops mv88e6320_ops = {</div><div class='ctx'> 	/* MV88E6XXX_FAMILY_6320 */</div><div class='add'>+	.setup_errata = mv88e6320_setup_errata,</div><div class='ctx'> 	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='ctx'> 	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='ctx'> 	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='hunk'>@@ -5131,6 +5176,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {</div><div class='ctx'> 	.port_set_rgmii_delay = mv88e6320_port_set_rgmii_delay,</div><div class='ctx'> 	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='ctx'> 	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='ctx'> 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='ctx'> 	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='ctx'> 	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='hunk'>@@ -5155,8 +5201,10 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {</div><div class='ctx'> 	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='ctx'> 	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='ctx'> 	.reset = mv88e6352_g1_reset,</div><div class='del'>-	.vtu_getnext = mv88e6185_g1_vtu_getnext,</div><div class='del'>-	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='ctx'> 	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='ctx'> 	.avb_ops = &amp;mv88e6352_avb_ops,</div><div class='ctx'> 	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='hunk'>@@ -5165,6 +5213,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {</div><div class='ctx'> </div><div class='ctx'> static const struct mv88e6xxx_ops mv88e6321_ops = {</div><div class='ctx'> 	/* MV88E6XXX_FAMILY_6320 */</div><div class='add'>+	.setup_errata = mv88e6320_setup_errata,</div><div class='ctx'> 	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='ctx'> 	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='ctx'> 	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='hunk'>@@ -5180,6 +5229,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {</div><div class='ctx'> 	.port_set_rgmii_delay = mv88e6320_port_set_rgmii_delay,</div><div class='ctx'> 	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='ctx'> 	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='ctx'> 	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='ctx'> 	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='ctx'> 	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='hunk'>@@ -5203,8 +5253,10 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {</div><div class='ctx'> 	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='ctx'> 	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='ctx'> 	.reset = mv88e6352_g1_reset,</div><div class='del'>-	.vtu_getnext = mv88e6185_g1_vtu_getnext,</div><div class='del'>-	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='ctx'> 	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='ctx'> 	.avb_ops = &amp;mv88e6352_avb_ops,</div><div class='ctx'> 	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='hunk'>@@ -5645,6 +5697,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 5,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.dual_chip = true,</div><div class='ctx'> 		.ops = &amp;mv88e6250_ops,</div><div class='hunk'>@@ -5665,6 +5718,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 5,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.dual_chip = true,</div><div class='ctx'> 		.ops = &amp;mv88e6250_ops,</div><div class='hunk'>@@ -5687,6 +5741,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 8,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -5708,6 +5763,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.global2_addr = 0x1c,</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 8,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.multi_chip = true,</div><div class='ctx'> 		.ops = &amp;mv88e6095_ops,</div><div class='hunk'>@@ -5730,6 +5786,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 8,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -5754,6 +5811,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -5776,6 +5834,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.global2_addr = 0x1c,</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.multi_chip = true,</div><div class='ctx'> 		.ops = &amp;mv88e6131_ops,</div><div class='hunk'>@@ -5797,9 +5856,10 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.global1_addr = 0x1b,</div><div class='ctx'> 		.global2_addr = 0x1c,</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='del'>-		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='ctx'> 		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='hunk'>@@ -5823,6 +5883,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -5848,6 +5909,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -5872,6 +5934,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -5897,6 +5960,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -5921,6 +5985,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -5946,6 +6011,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -5968,6 +6034,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.global2_addr = 0x1c,</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 8,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.multi_chip = true,</div><div class='ctx'> 		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='hunk'>@@ -5992,6 +6059,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='ctx'> 		.atu_move_port_mask = 0x1f,</div><div class='hunk'>@@ -6016,6 +6084,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0x1f,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6039,6 +6108,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0x1f,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6063,6 +6133,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='ctx'> 		.g1_irqs = 10,</div><div class='ctx'> 		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0x1f,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6087,6 +6158,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='ctx'> 		.g1_irqs = 10,</div><div class='ctx'> 		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0x1f,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6114,6 +6186,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.dual_chip = true,</div><div class='ctx'> 		.ptp_support = true,</div><div class='hunk'>@@ -6138,6 +6211,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6161,6 +6235,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.dual_chip = true,</div><div class='ctx'> 		.ptp_support = true,</div><div class='hunk'>@@ -6184,6 +6259,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0x1f,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6198,9 +6274,11 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.num_databases = 4096,</div><div class='ctx'> 		.num_macs = 8192,</div><div class='ctx'> 		.num_ports = 7,</div><div class='del'>-		.num_internal_phys = 5,</div><div class='add'>+		.num_internal_phys = 2,</div><div class='add'>+		.internal_phys_offset = 3,</div><div class='ctx'> 		.num_gpio = 15,</div><div class='ctx'> 		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='ctx'> 		.port_base_addr = 0x10,</div><div class='ctx'> 		.phy_base_addr = 0x0,</div><div class='ctx'> 		.global1_addr = 0x1b,</div><div class='hunk'>@@ -6208,6 +6286,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 8,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6223,9 +6302,11 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.num_databases = 4096,</div><div class='ctx'> 		.num_macs = 8192,</div><div class='ctx'> 		.num_ports = 7,</div><div class='del'>-		.num_internal_phys = 5,</div><div class='add'>+		.num_internal_phys = 2,</div><div class='add'>+		.internal_phys_offset = 3,</div><div class='ctx'> 		.num_gpio = 15,</div><div class='ctx'> 		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='ctx'> 		.port_base_addr = 0x10,</div><div class='ctx'> 		.phy_base_addr = 0x0,</div><div class='ctx'> 		.global1_addr = 0x1b,</div><div class='hunk'>@@ -6233,7 +6314,9 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 8,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='ctx'> 		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='ctx'> 		.ptp_support = true,</div><div class='hunk'>@@ -6256,9 +6339,10 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.global1_addr = 0x1b,</div><div class='ctx'> 		.global2_addr = 0x1c,</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='del'>-		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='ctx'> 		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='hunk'>@@ -6283,6 +6367,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6307,6 +6392,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6332,6 +6418,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 15000,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='ctx'> 		.atu_move_port_mask = 0xf,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6359,6 +6446,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='ctx'> 		.g1_irqs = 10,</div><div class='ctx'> 		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0x1f,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6383,6 +6471,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0x1f,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6408,6 +6497,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='ctx'> 		.g1_irqs = 9,</div><div class='ctx'> 		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0x1f,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6433,6 +6523,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='ctx'> 		.age_time_coeff = 3750,</div><div class='ctx'> 		.g1_irqs = 10,</div><div class='ctx'> 		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='ctx'> 		.atu_move_port_mask = 0x1f,</div><div class='ctx'> 		.pvt = true,</div><div class='ctx'> 		.multi_chip = true,</div><div class='hunk'>@@ -6596,6 +6687,13 @@ static int mv88e6xxx_port_mdb_add(struct dsa_switch *ds, int port,</div><div class='ctx'> 	mv88e6xxx_reg_lock(chip);</div><div class='ctx'> 	err = mv88e6xxx_port_db_load_purge(chip, port, mdb-&gt;addr, mdb-&gt;vid,</div><div class='ctx'> 					   MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_port_db_find(chip, mdb-&gt;addr, mdb-&gt;vid))</div><div class='add'>+		err = -ENOSPC;</div><div class='add'>+</div><div class='add'>+out:</div><div class='ctx'> 	mv88e6xxx_reg_unlock(chip);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -7074,7 +7172,7 @@ static const struct dsa_switch_ops mv88e6xxx_switch_ops = {</div><div class='ctx'> 	.get_sset_count		= mv88e6xxx_get_sset_count,</div><div class='ctx'> 	.port_max_mtu		= mv88e6xxx_get_max_mtu,</div><div class='ctx'> 	.port_change_mtu	= mv88e6xxx_change_mtu,</div><div class='del'>-	.get_mac_eee		= mv88e6xxx_get_mac_eee,</div><div class='add'>+	.support_eee		= dsa_supports_eee,</div><div class='ctx'> 	.set_mac_eee		= mv88e6xxx_set_mac_eee,</div><div class='ctx'> 	.get_eeprom_len		= mv88e6xxx_get_eeprom_len,</div><div class='ctx'> 	.get_eeprom		= mv88e6xxx_get_eeprom,</div><div class='hunk'>@@ -7267,13 +7365,13 @@ static int mv88e6xxx_probe(struct mdio_device *mdiodev)</div><div class='ctx'> 	err = mv88e6xxx_switch_reset(chip);</div><div class='ctx'> 	mv88e6xxx_reg_unlock(chip);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_phy;</div><div class='ctx'> </div><div class='ctx'> 	if (np) {</div><div class='ctx'> 		chip-&gt;irq = of_irq_get(np, 0);</div><div class='ctx'> 		if (chip-&gt;irq == -EPROBE_DEFER) {</div><div class='ctx'> 			err = chip-&gt;irq;</div><div class='del'>-			goto out;</div><div class='add'>+			goto out_phy;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7292,7 +7390,7 @@ static int mv88e6xxx_probe(struct mdio_device *mdiodev)</div><div class='ctx'> 	mv88e6xxx_reg_unlock(chip);</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_phy;</div><div class='ctx'> </div><div class='ctx'> 	if (chip-&gt;info-&gt;g2_irqs &gt; 0) {</div><div class='ctx'> 		err = mv88e6xxx_g2_irq_setup(chip);</div><div class='hunk'>@@ -7326,6 +7424,8 @@ out_g1_irq:</div><div class='ctx'> 		mv88e6xxx_g1_irq_free(chip);</div><div class='ctx'> 	else</div><div class='ctx'> 		mv88e6xxx_irq_poll_free(chip);</div><div class='add'>+out_phy:</div><div class='add'>+	mv88e6xxx_phy_destroy(chip);</div><div class='ctx'> out:</div><div class='ctx'> 	if (pdata)</div><div class='ctx'> 		dev_put(pdata-&gt;netdev);</div><div class='hunk'>@@ -7343,12 +7443,6 @@ static void mv88e6xxx_remove(struct mdio_device *mdiodev)</div><div class='ctx'> </div><div class='ctx'> 	chip = ds-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	if (chip-&gt;info-&gt;ptp_support) {</div><div class='del'>-		mv88e6xxx_hwtstamp_free(chip);</div><div class='del'>-		mv88e6xxx_ptp_free(chip);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mv88e6xxx_phy_destroy(chip);</div><div class='ctx'> 	mv88e6xxx_unregister_switch(chip);</div><div class='ctx'> </div><div class='ctx'> 	mv88e6xxx_g1_vtu_prob_irq_free(chip);</div><div class='hunk'>@@ -7361,6 +7455,8 @@ static void mv88e6xxx_remove(struct mdio_device *mdiodev)</div><div class='ctx'> 		mv88e6xxx_g1_irq_free(chip);</div><div class='ctx'> 	else</div><div class='ctx'> 		mv88e6xxx_irq_poll_free(chip);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_phy_destroy(chip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mv88e6xxx_shutdown(struct mdio_device *mdiodev)</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h<br/>index 9fe8e8a7856b..2f211e55cb47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/chip.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/chip.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/chip.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/chip.h</a></div><div class='hunk'>@@ -144,6 +144,7 @@ struct mv88e6xxx_info {</div><div class='ctx'> 	unsigned int age_time_coeff;</div><div class='ctx'> 	unsigned int g1_irqs;</div><div class='ctx'> 	unsigned int g2_irqs;</div><div class='add'>+	int stats_type;</div><div class='ctx'> 	bool pvt;</div><div class='ctx'> </div><div class='ctx'> 	/* Mark certain ports as invalid. This is required for example for the</div><div class='hunk'>@@ -240,7 +241,7 @@ struct mv88e6xxx_port_hwtstamp {</div><div class='ctx'> 	u16 tx_seq_id;</div><div class='ctx'> </div><div class='ctx'> 	/* Current timestamp configuration */</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum mv88e6xxx_policy_mapping {</div><div class='hunk'>@@ -423,8 +424,6 @@ struct mv88e6xxx_chip {</div><div class='ctx'> 	struct ptp_clock_info	ptp_clock_info;</div><div class='ctx'> 	struct delayed_work	tai_event_work;</div><div class='ctx'> 	struct ptp_pin_desc	pin_config[MV88E6XXX_MAX_GPIO];</div><div class='del'>-	u16 trig_config;</div><div class='del'>-	u16 evcap_config;</div><div class='ctx'> 	u16 enable_count;</div><div class='ctx'> </div><div class='ctx'> 	/* Current ingress and egress monitor ports */</div><div class='hunk'>@@ -731,7 +730,7 @@ struct mv88e6xxx_avb_ops {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mv88e6xxx_ptp_ops {</div><div class='del'>-	u64 (*clock_read)(const struct cyclecounter *cc);</div><div class='add'>+	u64 (*clock_read)(struct cyclecounter *cc);</div><div class='ctx'> 	int (*ptp_enable)(struct ptp_clock_info *ptp,</div><div class='ctx'> 			  struct ptp_clock_request *rq, int on);</div><div class='ctx'> 	int (*ptp_verify)(struct ptp_clock_info *ptp, unsigned int pin,</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/devlink.c b/drivers/net/dsa/mv88e6xxx/devlink.c<br/>index 795c8df7b6a7..da69e0b85879 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/devlink.c</a></div><div class='hunk'>@@ -376,19 +376,14 @@ static int mv88e6xxx_region_atu_snapshot(struct devlink *dl,</div><div class='ctx'> 	struct dsa_switch *ds = dsa_devlink_to_ds(dl);</div><div class='ctx'> 	struct mv88e6xxx_devlink_atu_entry *table;</div><div class='ctx'> 	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='del'>-	int fid = -1, err = 0, count;</div><div class='add'>+	int fid = -1, err = 0, count = 0;</div><div class='ctx'> </div><div class='del'>-	table = kmalloc_array(mv88e6xxx_num_databases(chip),</div><div class='del'>-			      sizeof(struct mv88e6xxx_devlink_atu_entry),</div><div class='del'>-			      GFP_KERNEL);</div><div class='add'>+	table = kcalloc(mv88e6xxx_num_databases(chip),</div><div class='add'>+			sizeof(struct mv88e6xxx_devlink_atu_entry),</div><div class='add'>+			GFP_KERNEL);</div><div class='ctx'> 	if (!table)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	memset(table, 0, mv88e6xxx_num_databases(chip) *</div><div class='del'>-	       sizeof(struct mv88e6xxx_devlink_atu_entry));</div><div class='del'>-</div><div class='del'>-	count = 0;</div><div class='del'>-</div><div class='ctx'> 	mv88e6xxx_reg_lock(chip);</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='hunk'>@@ -647,7 +642,7 @@ static struct mv88e6xxx_region_priv mv88e6xxx_region_global1_priv = {</div><div class='ctx'> 	.id = MV88E6XXX_REGION_GLOBAL1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct devlink_region_ops mv88e6xxx_region_global1_ops = {</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_global1_ops = {</div><div class='ctx'> 	.name = "global1",</div><div class='ctx'> 	.snapshot = mv88e6xxx_region_global_snapshot,</div><div class='ctx'> 	.destructor = kfree,</div><div class='hunk'>@@ -658,32 +653,32 @@ static struct mv88e6xxx_region_priv mv88e6xxx_region_global2_priv = {</div><div class='ctx'> 	.id = MV88E6XXX_REGION_GLOBAL2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct devlink_region_ops mv88e6xxx_region_global2_ops = {</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_global2_ops = {</div><div class='ctx'> 	.name = "global2",</div><div class='ctx'> 	.snapshot = mv88e6xxx_region_global_snapshot,</div><div class='ctx'> 	.destructor = kfree,</div><div class='ctx'> 	.priv = &amp;mv88e6xxx_region_global2_priv,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct devlink_region_ops mv88e6xxx_region_atu_ops = {</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_atu_ops = {</div><div class='ctx'> 	.name = "atu",</div><div class='ctx'> 	.snapshot = mv88e6xxx_region_atu_snapshot,</div><div class='ctx'> 	.destructor = kfree,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct devlink_region_ops mv88e6xxx_region_vtu_ops = {</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_vtu_ops = {</div><div class='ctx'> 	.name = "vtu",</div><div class='ctx'> 	.snapshot = mv88e6xxx_region_vtu_snapshot,</div><div class='ctx'> 	.destructor = kfree,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct devlink_region_ops mv88e6xxx_region_stu_ops = {</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_stu_ops = {</div><div class='ctx'> 	.name = "stu",</div><div class='ctx'> 	.snapshot = mv88e6xxx_region_stu_snapshot,</div><div class='ctx'> 	.destructor = kfree,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct devlink_region_ops mv88e6xxx_region_pvt_ops = {</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_pvt_ops = {</div><div class='ctx'> 	.name = "pvt",</div><div class='ctx'> 	.snapshot = mv88e6xxx_region_pvt_snapshot,</div><div class='ctx'> 	.destructor = kfree,</div><div class='hunk'>@@ -696,13 +691,13 @@ static const struct devlink_port_region_ops mv88e6xxx_region_port_ops = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mv88e6xxx_region {</div><div class='del'>-	struct devlink_region_ops *ops;</div><div class='add'>+	const struct devlink_region_ops *ops;</div><div class='ctx'> 	u64 size;</div><div class='ctx'> </div><div class='ctx'> 	bool (*cond)(struct mv88e6xxx_chip *chip);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct mv88e6xxx_region mv88e6xxx_regions[] = {</div><div class='add'>+static const struct mv88e6xxx_region mv88e6xxx_regions[] = {</div><div class='ctx'> 	[MV88E6XXX_REGION_GLOBAL1] = {</div><div class='ctx'> 		.ops = &amp;mv88e6xxx_region_global1_ops,</div><div class='ctx'> 		.size = 32 * sizeof(u16)</div><div class='hunk'>@@ -736,7 +731,8 @@ void mv88e6xxx_teardown_devlink_regions_global(struct dsa_switch *ds)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(mv88e6xxx_regions); i++)</div><div class='del'>-		dsa_devlink_region_destroy(chip-&gt;regions[i]);</div><div class='add'>+		if (chip-&gt;regions[i])</div><div class='add'>+			dsa_devlink_region_destroy(chip-&gt;regions[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mv88e6xxx_teardown_devlink_regions_port(struct dsa_switch *ds, int port)</div><div class='hunk'>@@ -767,7 +763,7 @@ int mv88e6xxx_setup_devlink_regions_global(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='ctx'> 	bool (*cond)(struct mv88e6xxx_chip *chip);</div><div class='ctx'> 	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='del'>-	struct devlink_region_ops *ops;</div><div class='add'>+	const struct devlink_region_ops *ops;</div><div class='ctx'> 	struct devlink_region *region;</div><div class='ctx'> 	u64 size;</div><div class='ctx'> 	int i, j;</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/global2.c b/drivers/net/dsa/mv88e6xxx/global2.c<br/>index b2b5f6ba438f..30a6ffa7817b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/global2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/global2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/global2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/global2.c</a></div><div class='hunk'>@@ -1154,8 +1154,8 @@ int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	chip-&gt;g2_irq.domain = irq_domain_add_simple(</div><div class='del'>-		chip-&gt;dev-&gt;of_node, 16, 0, &amp;mv88e6xxx_g2_irq_domain_ops, chip);</div><div class='add'>+	chip-&gt;g2_irq.domain = irq_domain_create_simple(dev_fwnode(chip-&gt;dev), 16, 0,</div><div class='add'>+						       &amp;mv88e6xxx_g2_irq_domain_ops, chip);</div><div class='ctx'> 	if (!chip-&gt;g2_irq.domain)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/hwtstamp.c b/drivers/net/dsa/mv88e6xxx/hwtstamp.c<br/>index 49e6e1355142..6e6472a3b75a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/hwtstamp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/hwtstamp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/hwtstamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/hwtstamp.c</a></div><div class='hunk'>@@ -89,7 +89,7 @@ int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mv88e6xxx_set_hwtstamp_config(struct mv88e6xxx_chip *chip, int port,</div><div class='del'>-					 struct hwtstamp_config *config)</div><div class='add'>+					 struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	const struct mv88e6xxx_ptp_ops *ptp_ops = chip-&gt;info-&gt;ops-&gt;ptp_ops;</div><div class='ctx'> 	struct mv88e6xxx_port_hwtstamp *ps = &amp;chip-&gt;port_hwtstamp[port];</div><div class='hunk'>@@ -169,42 +169,38 @@ static int mv88e6xxx_set_hwtstamp_config(struct mv88e6xxx_chip *chip, int port,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='del'>-				struct ifreq *ifr)</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='ctx'> 	struct mv88e6xxx_port_hwtstamp *ps = &amp;chip-&gt;port_hwtstamp[port];</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!chip-&gt;info-&gt;ptp_support)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	err = mv88e6xxx_set_hwtstamp_config(chip, port, &amp;config);</div><div class='add'>+	err = mv88e6xxx_set_hwtstamp_config(chip, port, config);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* Save the chosen configuration to be returned later. */</div><div class='del'>-	memcpy(&amp;ps-&gt;tstamp_config, &amp;config, sizeof(config));</div><div class='add'>+	ps-&gt;tstamp_config = *config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='del'>-				struct ifreq *ifr)</div><div class='add'>+				struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='ctx'> 	struct mv88e6xxx_port_hwtstamp *ps = &amp;chip-&gt;port_hwtstamp[port];</div><div class='del'>-	struct hwtstamp_config *config = &amp;ps-&gt;tstamp_config;</div><div class='ctx'> </div><div class='ctx'> 	if (!chip-&gt;info-&gt;ptp_support)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, config, sizeof(*config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	*config = ps-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Returns a pointer to the PTP header if the caller should time stamp,</div><div class='hunk'>@@ -574,7 +570,7 @@ int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set the ethertype of L2 PTP messages */</div><div class='del'>-	err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_GC_ETYPE, ETH_P_1588);</div><div class='add'>+	err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_ETHERTYPE, ETH_P_1588);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/hwtstamp.h b/drivers/net/dsa/mv88e6xxx/hwtstamp.h<br/>index 85acc758e3eb..c359821d5a6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/hwtstamp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/hwtstamp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/hwtstamp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/hwtstamp.h</a></div><div class='hunk'>@@ -111,9 +111,10 @@</div><div class='ctx'> #ifdef CONFIG_NET_DSA_MV88E6XXX_PTP</div><div class='ctx'> </div><div class='ctx'> int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='del'>-				struct ifreq *ifr);</div><div class='add'>+				struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				struct netlink_ext_ack *extack);</div><div class='ctx'> int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='del'>-				struct ifreq *ifr);</div><div class='add'>+				struct kernel_hwtstamp_config *cfg);</div><div class='ctx'> </div><div class='ctx'> bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port,</div><div class='ctx'> 			     struct sk_buff *clone, unsigned int type);</div><div class='hunk'>@@ -123,6 +124,7 @@ void mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port,</div><div class='ctx'> int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,</div><div class='ctx'> 			  struct kernel_ethtool_ts_info *info);</div><div class='ctx'> </div><div class='add'>+long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp);</div><div class='ctx'> int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip);</div><div class='ctx'> void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip);</div><div class='ctx'> int mv88e6352_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port);</div><div class='hunk'>@@ -132,14 +134,17 @@ int mv88e6165_global_disable(struct mv88e6xxx_chip *chip);</div><div class='ctx'> </div><div class='ctx'> #else /* !CONFIG_NET_DSA_MV88E6XXX_PTP */</div><div class='ctx'> </div><div class='del'>-static inline int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds,</div><div class='del'>-					      int port, struct ifreq *ifr)</div><div class='add'>+static inline int</div><div class='add'>+mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct kernel_hwtstamp_config *config,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds,</div><div class='del'>-					      int port, struct ifreq *ifr)</div><div class='add'>+static inline int</div><div class='add'>+mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/leds.c b/drivers/net/dsa/mv88e6xxx/leds.c<br/>index 1c88bfaea46b..ab3bc645da56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/leds.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/leds.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/leds.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/leds.c</a></div><div class='hunk'>@@ -779,7 +779,8 @@ int mv88e6xxx_port_setup_leds(struct mv88e6xxx_chip *chip, int port)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (led_num &gt; 1) {</div><div class='ctx'> 			dev_err(dev, "invalid LED specified port %d\n", port);</div><div class='del'>-			return -EINVAL;</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto err_put_led;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (led_num == 0)</div><div class='hunk'>@@ -823,17 +824,25 @@ int mv88e6xxx_port_setup_leds(struct mv88e6xxx_chip *chip, int port)</div><div class='ctx'> 		init_data.devname_mandatory = true;</div><div class='ctx'> 		init_data.devicename = kasprintf(GFP_KERNEL, "%s:0%d:0%d", chip-&gt;info-&gt;name,</div><div class='ctx'> 						 port, led_num);</div><div class='del'>-		if (!init_data.devicename)</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+		if (!init_data.devicename) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err_put_led;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		ret = devm_led_classdev_register_ext(dev, l, &amp;init_data);</div><div class='ctx'> 		kfree(init_data.devicename);</div><div class='ctx'> </div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(dev, "Failed to init LED %d for port %d", led_num, port);</div><div class='del'>-			return ret;</div><div class='add'>+			goto err_put_led;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	fwnode_handle_put(leds);</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_put_led:</div><div class='add'>+	fwnode_handle_put(led);</div><div class='add'>+	fwnode_handle_put(leds);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/pcs-6185.c b/drivers/net/dsa/mv88e6xxx/pcs-6185.c<br/>index 5a27d047a38e..af7e06d265f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/pcs-6185.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/pcs-6185.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/pcs-6185.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/pcs-6185.c</a></div><div class='hunk'>@@ -55,6 +55,7 @@ static irqreturn_t mv88e6185_pcs_handle_irq(int irq, void *dev_id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mv88e6185_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				    unsigned int neg_mode,</div><div class='ctx'> 				    struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct mv88e6185_pcs *mpcs = pcs_to_mv88e6185_pcs(pcs);</div><div class='hunk'>@@ -137,7 +138,6 @@ static int mv88e6185_pcs_init(struct mv88e6xxx_chip *chip, int port)</div><div class='ctx'> 	mpcs-&gt;chip = chip;</div><div class='ctx'> 	mpcs-&gt;port = port;</div><div class='ctx'> 	mpcs-&gt;phylink_pcs.ops = &amp;mv88e6185_phylink_pcs_ops;</div><div class='del'>-	mpcs-&gt;phylink_pcs.neg_mode = true;</div><div class='ctx'> </div><div class='ctx'> 	irq = mv88e6xxx_serdes_irq_mapping(chip, port);</div><div class='ctx'> 	if (irq) {</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/pcs-6352.c b/drivers/net/dsa/mv88e6xxx/pcs-6352.c<br/>index 88f624b65470..36993400837e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/pcs-6352.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/pcs-6352.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/pcs-6352.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/pcs-6352.c</a></div><div class='hunk'>@@ -158,6 +158,7 @@ static void marvell_c22_pcs_disable(struct phylink_pcs *pcs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void marvell_c22_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				      unsigned int neg_mode,</div><div class='ctx'> 				      struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);</div><div class='hunk'>@@ -274,7 +275,6 @@ static struct marvell_c22_pcs *marvell_c22_pcs_alloc(struct device *dev,</div><div class='ctx'> 	mpcs-&gt;mdio.bus = bus;</div><div class='ctx'> 	mpcs-&gt;mdio.addr = addr;</div><div class='ctx'> 	mpcs-&gt;phylink_pcs.ops = &amp;marvell_c22_pcs_ops;</div><div class='del'>-	mpcs-&gt;phylink_pcs.neg_mode = true;</div><div class='ctx'> </div><div class='ctx'> 	return mpcs;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/pcs-639x.c b/drivers/net/dsa/mv88e6xxx/pcs-639x.c<br/>index d758a6c1b226..5db17c0b77f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/pcs-639x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/pcs-639x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/pcs-639x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/pcs-639x.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/mii.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "chip.h"</div><div class='ctx'> #include "global2.h"</div><div class='hunk'>@@ -257,6 +258,7 @@ static int mv88e639x_sgmii_pcs_post_config(struct phylink_pcs *pcs,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mv88e639x_sgmii_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+					  unsigned int neg_mode,</div><div class='ctx'> 					  struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='hunk'>@@ -395,6 +397,7 @@ static void mv88e639x_xg_pcs_disable(struct mv88e639x_pcs *mpcs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mv88e639x_xg_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				       unsigned int neg_mode,</div><div class='ctx'> 				       struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);</div><div class='hunk'>@@ -562,9 +565,7 @@ static int mv88e6390_pcs_init(struct mv88e6xxx_chip *chip, int port)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	mpcs-&gt;sgmii_pcs.ops = &amp;mv88e639x_sgmii_pcs_ops;</div><div class='del'>-	mpcs-&gt;sgmii_pcs.neg_mode = true;</div><div class='ctx'> 	mpcs-&gt;xg_pcs.ops = &amp;mv88e6390_xg_pcs_ops;</div><div class='del'>-	mpcs-&gt;xg_pcs.neg_mode = true;</div><div class='ctx'> </div><div class='ctx'> 	if (chip-&gt;info-&gt;prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6190X ||</div><div class='ctx'> 	    chip-&gt;info-&gt;prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6390X)</div><div class='hunk'>@@ -748,7 +749,7 @@ static int mv88e6393x_sgmii_apply_2500basex_an(struct mv88e639x_pcs *mpcs,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='ctx'> 			"failed to %s 2500basex fix: %pe\n",</div><div class='del'>-			enable ? "enable" : "disable", ERR_PTR(err));</div><div class='add'>+			str_enable_disable(enable), ERR_PTR(err));</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -889,6 +890,7 @@ static int mv88e6393x_xg_pcs_post_config(struct phylink_pcs *pcs,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mv88e6393x_xg_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+					unsigned int neg_mode,</div><div class='ctx'> 					struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);</div><div class='hunk'>@@ -896,7 +898,7 @@ static void mv88e6393x_xg_pcs_get_state(struct phylink_pcs *pcs,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (state-&gt;interface != PHY_INTERFACE_MODE_USXGMII)</div><div class='del'>-		return mv88e639x_xg_pcs_get_state(pcs, state);</div><div class='add'>+		return mv88e639x_xg_pcs_get_state(pcs, neg_mode, state);</div><div class='ctx'> </div><div class='ctx'> 	state-&gt;link = false;</div><div class='ctx'> </div><div class='hunk'>@@ -941,9 +943,7 @@ static int mv88e6393x_pcs_init(struct mv88e6xxx_chip *chip, int port)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	mpcs-&gt;sgmii_pcs.ops = &amp;mv88e6393x_sgmii_pcs_ops;</div><div class='del'>-	mpcs-&gt;sgmii_pcs.neg_mode = true;</div><div class='ctx'> 	mpcs-&gt;xg_pcs.ops = &amp;mv88e6393x_xg_pcs_ops;</div><div class='del'>-	mpcs-&gt;xg_pcs.neg_mode = true;</div><div class='ctx'> 	mpcs-&gt;supports_5g = true;</div><div class='ctx'> </div><div class='ctx'> 	err = mv88e6393x_erratum_4_6(mpcs);</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/phy.c b/drivers/net/dsa/mv88e6xxx/phy.c<br/>index 8bb88b3d900d..4e7827ee684a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/phy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/phy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/phy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/phy.c</a></div><div class='hunk'>@@ -182,7 +182,7 @@ static void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly)</div><div class='ctx'> </div><div class='ctx'> static void mv88e6xxx_phy_ppu_reenable_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct mv88e6xxx_chip *chip = from_timer(chip, t, ppu_timer);</div><div class='add'>+	struct mv88e6xxx_chip *chip = timer_container_of(chip, t, ppu_timer);</div><div class='ctx'> </div><div class='ctx'> 	schedule_work(&amp;chip-&gt;ppu_work);</div><div class='ctx'> }</div><div class='hunk'>@@ -206,7 +206,7 @@ static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)</div><div class='ctx'> 		}</div><div class='ctx'> 		chip-&gt;ppu_disabled = 1;</div><div class='ctx'> 	} else {</div><div class='del'>-		del_timer(&amp;chip-&gt;ppu_timer);</div><div class='add'>+		timer_delete(&amp;chip-&gt;ppu_timer);</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -229,7 +229,10 @@ static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)</div><div class='ctx'> </div><div class='ctx'> static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)</div><div class='ctx'> {</div><div class='del'>-	del_timer_sync(&amp;chip-&gt;ppu_timer);</div><div class='add'>+	mutex_lock(&amp;chip-&gt;ppu_mutex);</div><div class='add'>+	timer_delete_sync(&amp;chip-&gt;ppu_timer);</div><div class='add'>+	cancel_work_sync(&amp;chip-&gt;ppu_work);</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;ppu_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/port.c b/drivers/net/dsa/mv88e6xxx/port.c<br/>index dc777ddce1f3..66b1b7277281 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/port.c</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "chip.h"</div><div class='ctx'> #include "global2.h"</div><div class='hunk'>@@ -176,7 +177,7 @@ int mv88e6xxx_port_set_link(struct mv88e6xxx_chip *chip, int port, int link)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(chip-&gt;dev, "p%d: %s link %s\n", port,</div><div class='ctx'> 		reg &amp; MV88E6XXX_PORT_MAC_CTL_FORCE_LINK ? "Force" : "Unforce",</div><div class='del'>-		reg &amp; MV88E6XXX_PORT_MAC_CTL_LINK_UP ? "up" : "down");</div><div class='add'>+		str_up_down(reg &amp; MV88E6XXX_PORT_MAC_CTL_LINK_UP));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/ptp.c b/drivers/net/dsa/mv88e6xxx/ptp.c<br/>index aed4a4b07f34..f7603573d3a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/ptp.c</a></div><div class='hunk'>@@ -138,13 +138,13 @@ mv88e6xxx_cc_coeff_get(struct mv88e6xxx_chip *chip)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 mv88e6352_ptp_clock_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 mv88e6352_ptp_clock_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mv88e6xxx_chip *chip = cc_to_chip(cc);</div><div class='ctx'> 	u16 phc_time[2];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = mv88e6xxx_tai_read(chip, MV88E6XXX_TAI_TIME_LO, phc_time,</div><div class='add'>+	err = mv88e6xxx_tai_read(chip, MV88E6352_TAI_TIME_LO, phc_time,</div><div class='ctx'> 				 ARRAY_SIZE(phc_time));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -152,13 +152,13 @@ static u64 mv88e6352_ptp_clock_read(const struct cyclecounter *cc)</div><div class='ctx'> 		return ((u32)phc_time[1] &lt;&lt; 16) | phc_time[0];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 mv88e6165_ptp_clock_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 mv88e6165_ptp_clock_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mv88e6xxx_chip *chip = cc_to_chip(cc);</div><div class='ctx'> 	u16 phc_time[2];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = mv88e6xxx_tai_read(chip, MV88E6XXX_PTP_GC_TIME_LO, phc_time,</div><div class='add'>+	err = mv88e6xxx_tai_read(chip, MV88E6165_PTP_GC_TIME_LO, phc_time,</div><div class='ctx'> 				 ARRAY_SIZE(phc_time));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -167,42 +167,26 @@ static u64 mv88e6165_ptp_clock_read(const struct cyclecounter *cc)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* mv88e6352_config_eventcap - configure TAI event capture</div><div class='del'>- * @event: PTP_CLOCK_PPS (internal) or PTP_CLOCK_EXTTS (external)</div><div class='ctx'>  * @rising: zero for falling-edge trigger, else rising-edge trigger</div><div class='ctx'>  *</div><div class='ctx'>  * This will also reset the capture sequence counter.</div><div class='ctx'>  */</div><div class='del'>-static int mv88e6352_config_eventcap(struct mv88e6xxx_chip *chip, int event,</div><div class='del'>-				     int rising)</div><div class='add'>+static int mv88e6352_config_eventcap(struct mv88e6xxx_chip *chip, int rising)</div><div class='ctx'> {</div><div class='del'>-	u16 global_config;</div><div class='del'>-	u16 cap_config;</div><div class='add'>+	u16 evcap_config;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	chip-&gt;evcap_config = MV88E6XXX_TAI_CFG_CAP_OVERWRITE |</div><div class='del'>-			     MV88E6XXX_TAI_CFG_CAP_CTR_START;</div><div class='add'>+	evcap_config = MV88E6352_TAI_CFG_CAP_OVERWRITE |</div><div class='add'>+		       MV88E6352_TAI_CFG_CAP_CTR_START;</div><div class='ctx'> 	if (!rising)</div><div class='del'>-		chip-&gt;evcap_config |= MV88E6XXX_TAI_CFG_EVREQ_FALLING;</div><div class='add'>+		evcap_config |= MV88E6352_TAI_CFG_EVREQ_FALLING;</div><div class='ctx'> </div><div class='del'>-	global_config = (chip-&gt;evcap_config | chip-&gt;trig_config);</div><div class='del'>-	err = mv88e6xxx_tai_write(chip, MV88E6XXX_TAI_CFG, global_config);</div><div class='add'>+	err = mv88e6xxx_tai_write(chip, MV88E6352_TAI_CFG, evcap_config);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	if (event == PTP_CLOCK_PPS) {</div><div class='del'>-		cap_config = MV88E6XXX_TAI_EVENT_STATUS_CAP_TRIG;</div><div class='del'>-	} else if (event == PTP_CLOCK_EXTTS) {</div><div class='del'>-		/* if STATUS_CAP_TRIG is unset we capture PTP_EVREQ events */</div><div class='del'>-		cap_config = 0;</div><div class='del'>-	} else {</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Write the capture config; this also clears the capture counter */</div><div class='del'>-	err = mv88e6xxx_tai_write(chip, MV88E6XXX_TAI_EVENT_STATUS,</div><div class='del'>-				  cap_config);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	return mv88e6xxx_tai_write(chip, MV88E6352_TAI_EVENT_STATUS, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mv88e6352_tai_event_work(struct work_struct *ugly)</div><div class='hunk'>@@ -215,7 +199,7 @@ static void mv88e6352_tai_event_work(struct work_struct *ugly)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	mv88e6xxx_reg_lock(chip);</div><div class='del'>-	err = mv88e6xxx_tai_read(chip, MV88E6XXX_TAI_EVENT_STATUS,</div><div class='add'>+	err = mv88e6xxx_tai_read(chip, MV88E6352_TAI_EVENT_STATUS,</div><div class='ctx'> 				 status, ARRAY_SIZE(status));</div><div class='ctx'> 	mv88e6xxx_reg_unlock(chip);</div><div class='ctx'> </div><div class='hunk'>@@ -223,19 +207,19 @@ static void mv88e6352_tai_event_work(struct work_struct *ugly)</div><div class='ctx'> 		dev_err(chip-&gt;dev, "failed to read TAI status register\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	if (status[0] &amp; MV88E6XXX_TAI_EVENT_STATUS_ERROR) {</div><div class='add'>+	if (status[0] &amp; MV88E6352_TAI_EVENT_STATUS_ERROR) {</div><div class='ctx'> 		dev_warn(chip-&gt;dev, "missed event capture\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	if (!(status[0] &amp; MV88E6XXX_TAI_EVENT_STATUS_VALID))</div><div class='add'>+	if (!(status[0] &amp; MV88E6352_TAI_EVENT_STATUS_VALID))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	raw_ts = ((u32)status[2] &lt;&lt; 16) | status[1];</div><div class='ctx'> </div><div class='ctx'> 	/* Clear the valid bit so the next timestamp can come in */</div><div class='del'>-	status[0] &amp;= ~MV88E6XXX_TAI_EVENT_STATUS_VALID;</div><div class='add'>+	status[0] &amp;= ~MV88E6352_TAI_EVENT_STATUS_VALID;</div><div class='ctx'> 	mv88e6xxx_reg_lock(chip);</div><div class='del'>-	err = mv88e6xxx_tai_write(chip, MV88E6XXX_TAI_EVENT_STATUS, status[0]);</div><div class='add'>+	err = mv88e6xxx_tai_write(chip, MV88E6352_TAI_EVENT_STATUS, status[0]);</div><div class='ctx'> 	mv88e6xxx_reg_unlock(chip);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(chip-&gt;dev, "failed to write TAI status register\n");</div><div class='hunk'>@@ -332,13 +316,6 @@ static int mv88e6352_ptp_enable_extts(struct mv88e6xxx_chip *chip,</div><div class='ctx'> 	int pin;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-	if (rq-&gt;extts.flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-				PTP_RISING_EDGE |</div><div class='del'>-				PTP_FALLING_EDGE |</div><div class='del'>-				PTP_STRICT_FLAGS))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	/* Reject requests to enable time stamping on both edges. */</div><div class='ctx'> 	if ((rq-&gt;extts.flags &amp; PTP_STRICT_FLAGS) &amp;&amp;</div><div class='ctx'> 	    (rq-&gt;extts.flags &amp; PTP_ENABLE_FEATURE) &amp;&amp;</div><div class='hunk'>@@ -362,7 +339,7 @@ static int mv88e6352_ptp_enable_extts(struct mv88e6xxx_chip *chip,</div><div class='ctx'> 		schedule_delayed_work(&amp;chip-&gt;tai_event_work,</div><div class='ctx'> 				      TAI_EVENT_WORK_INTERVAL);</div><div class='ctx'> </div><div class='del'>-		err = mv88e6352_config_eventcap(chip, PTP_CLOCK_EXTTS, rising);</div><div class='add'>+		err = mv88e6352_config_eventcap(chip, rising);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		func = MV88E6352_G2_SCRATCH_GPIO_PCTL_GPIO;</div><div class='ctx'> </div><div class='hunk'>@@ -420,29 +397,6 @@ const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops = {</div><div class='ctx'> 		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-const struct mv88e6xxx_ptp_ops mv88e6250_ptp_ops = {</div><div class='del'>-	.clock_read = mv88e6352_ptp_clock_read,</div><div class='del'>-	.ptp_enable = mv88e6352_ptp_enable,</div><div class='del'>-	.ptp_verify = mv88e6352_ptp_verify,</div><div class='del'>-	.event_work = mv88e6352_tai_event_work,</div><div class='del'>-	.port_enable = mv88e6352_hwtstamp_port_enable,</div><div class='del'>-	.port_disable = mv88e6352_hwtstamp_port_disable,</div><div class='del'>-	.n_ext_ts = 1,</div><div class='del'>-	.arr0_sts_reg = MV88E6XXX_PORT_PTP_ARR0_STS,</div><div class='del'>-	.arr1_sts_reg = MV88E6XXX_PORT_PTP_ARR1_STS,</div><div class='del'>-	.dep_sts_reg = MV88E6XXX_PORT_PTP_DEP_STS,</div><div class='del'>-	.rx_filters = (1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_EVENT) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_SYNC) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops = {</div><div class='ctx'> 	.clock_read = mv88e6352_ptp_clock_read,</div><div class='ctx'> 	.ptp_enable = mv88e6352_ptp_enable,</div><div class='hunk'>@@ -490,7 +444,7 @@ const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops = {</div><div class='ctx'> 		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static u64 mv88e6xxx_ptp_clock_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 mv88e6xxx_ptp_clock_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mv88e6xxx_chip *chip = cc_to_chip(cc);</div><div class='ctx'> </div><div class='hunk'>@@ -566,6 +520,10 @@ int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip)</div><div class='ctx'> 	chip-&gt;ptp_clock_info.verify	= ptp_ops-&gt;ptp_verify;</div><div class='ctx'> 	chip-&gt;ptp_clock_info.do_aux_work = mv88e6xxx_hwtstamp_work;</div><div class='ctx'> </div><div class='add'>+	chip-&gt;ptp_clock_info.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+						     PTP_FALLING_EDGE |</div><div class='add'>+						     PTP_STRICT_FLAGS;</div><div class='add'>+</div><div class='ctx'> 	if (ptp_ops-&gt;set_ptp_cpu_port) {</div><div class='ctx'> 		struct dsa_port *dp;</div><div class='ctx'> 		int upstream = 0;</div><div class='hunk'>@@ -593,6 +551,7 @@ int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* This must never be called holding the register lock */</div><div class='ctx'> void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip)</div><div class='ctx'> {</div><div class='ctx'> 	if (chip-&gt;ptp_clock) {</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/ptp.h b/drivers/net/dsa/mv88e6xxx/ptp.h<br/>index 6c4d09adc93c..95bdddb0bf39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/mv88e6xxx/ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/ptp.h</a></div><div class='hunk'>@@ -16,132 +16,56 @@</div><div class='ctx'> #include "chip.h"</div><div class='ctx'> </div><div class='ctx'> /* Offset 0x00: TAI Global Config */</div><div class='del'>-#define MV88E6XXX_TAI_CFG			0x00</div><div class='del'>-#define MV88E6XXX_TAI_CFG_CAP_OVERWRITE		0x8000</div><div class='del'>-#define MV88E6XXX_TAI_CFG_CAP_CTR_START		0x4000</div><div class='del'>-#define MV88E6XXX_TAI_CFG_EVREQ_FALLING		0x2000</div><div class='del'>-#define MV88E6XXX_TAI_CFG_TRIG_ACTIVE_LO	0x1000</div><div class='del'>-#define MV88E6XXX_TAI_CFG_IRL_ENABLE		0x0400</div><div class='del'>-#define MV88E6XXX_TAI_CFG_TRIG_IRQ_EN		0x0200</div><div class='del'>-#define MV88E6XXX_TAI_CFG_EVREQ_IRQ_EN		0x0100</div><div class='del'>-#define MV88E6XXX_TAI_CFG_TRIG_LOCK		0x0080</div><div class='del'>-#define MV88E6XXX_TAI_CFG_BLOCK_UPDATE		0x0008</div><div class='del'>-#define MV88E6XXX_TAI_CFG_MULTI_PTP		0x0004</div><div class='del'>-#define MV88E6XXX_TAI_CFG_TRIG_MODE_ONESHOT	0x0002</div><div class='del'>-#define MV88E6XXX_TAI_CFG_TRIG_ENABLE		0x0001</div><div class='add'>+#define MV88E6352_TAI_CFG			0x00</div><div class='add'>+#define MV88E6352_TAI_CFG_CAP_OVERWRITE		0x8000</div><div class='add'>+#define MV88E6352_TAI_CFG_CAP_CTR_START		0x4000</div><div class='add'>+#define MV88E6352_TAI_CFG_EVREQ_FALLING		0x2000</div><div class='add'>+#define MV88E6352_TAI_CFG_TRIG_ACTIVE_LO	0x1000</div><div class='add'>+#define MV88E6352_TAI_CFG_IRL_ENABLE		0x0400</div><div class='add'>+#define MV88E6352_TAI_CFG_TRIG_IRQ_EN		0x0200</div><div class='add'>+#define MV88E6352_TAI_CFG_EVREQ_IRQ_EN		0x0100</div><div class='add'>+#define MV88E6352_TAI_CFG_TRIG_LOCK		0x0080</div><div class='add'>+#define MV88E6352_TAI_CFG_BLOCK_UPDATE		0x0008</div><div class='add'>+#define MV88E6352_TAI_CFG_MULTI_PTP		0x0004</div><div class='add'>+#define MV88E6352_TAI_CFG_TRIG_MODE_ONESHOT	0x0002</div><div class='add'>+#define MV88E6352_TAI_CFG_TRIG_ENABLE		0x0001</div><div class='ctx'> </div><div class='ctx'> /* Offset 0x01: Timestamp Clock Period (ps) */</div><div class='ctx'> #define MV88E6XXX_TAI_CLOCK_PERIOD		0x01</div><div class='ctx'> </div><div class='del'>-/* Offset 0x02/0x03: Trigger Generation Amount */</div><div class='del'>-#define MV88E6XXX_TAI_TRIG_GEN_AMOUNT_LO	0x02</div><div class='del'>-#define MV88E6XXX_TAI_TRIG_GEN_AMOUNT_HI	0x03</div><div class='del'>-</div><div class='del'>-/* Offset 0x04: Clock Compensation */</div><div class='del'>-#define MV88E6XXX_TAI_TRIG_CLOCK_COMP		0x04</div><div class='del'>-</div><div class='del'>-/* Offset 0x05: Trigger Configuration */</div><div class='del'>-#define MV88E6XXX_TAI_TRIG_CFG			0x05</div><div class='del'>-</div><div class='del'>-/* Offset 0x06: Ingress Rate Limiter Clock Generation Amount */</div><div class='del'>-#define MV88E6XXX_TAI_IRL_AMOUNT		0x06</div><div class='del'>-</div><div class='del'>-/* Offset 0x07: Ingress Rate Limiter Compensation */</div><div class='del'>-#define MV88E6XXX_TAI_IRL_COMP			0x07</div><div class='del'>-</div><div class='del'>-/* Offset 0x08: Ingress Rate Limiter Compensation */</div><div class='del'>-#define MV88E6XXX_TAI_IRL_COMP_PS		0x08</div><div class='del'>-</div><div class='ctx'> /* Offset 0x09: Event Status */</div><div class='del'>-#define MV88E6XXX_TAI_EVENT_STATUS		0x09</div><div class='del'>-#define MV88E6XXX_TAI_EVENT_STATUS_CAP_TRIG	0x4000</div><div class='del'>-#define MV88E6XXX_TAI_EVENT_STATUS_ERROR	0x0200</div><div class='del'>-#define MV88E6XXX_TAI_EVENT_STATUS_VALID	0x0100</div><div class='del'>-#define MV88E6XXX_TAI_EVENT_STATUS_CTR_MASK	0x00ff</div><div class='del'>-</div><div class='del'>-/* Offset 0x0A/0x0B: Event Time */</div><div class='del'>-#define MV88E6XXX_TAI_EVENT_TIME_LO		0x0a</div><div class='del'>-#define MV88E6XXX_TAI_EVENT_TYPE_HI		0x0b</div><div class='add'>+#define MV88E6352_TAI_EVENT_STATUS		0x09</div><div class='add'>+#define MV88E6352_TAI_EVENT_STATUS_ERROR	0x0200</div><div class='add'>+#define MV88E6352_TAI_EVENT_STATUS_VALID	0x0100</div><div class='add'>+#define MV88E6352_TAI_EVENT_STATUS_CTR_MASK	0x00ff</div><div class='add'>+/* Offset 0x0A/0x0B: Event Time Lo/Hi. Always read with Event Status. */</div><div class='ctx'> </div><div class='ctx'> /* Offset 0x0E/0x0F: PTP Global Time */</div><div class='del'>-#define MV88E6XXX_TAI_TIME_LO			0x0e</div><div class='del'>-#define MV88E6XXX_TAI_TIME_HI			0x0f</div><div class='del'>-</div><div class='del'>-/* Offset 0x10/0x11: Trig Generation Time */</div><div class='del'>-#define MV88E6XXX_TAI_TRIG_TIME_LO		0x10</div><div class='del'>-#define MV88E6XXX_TAI_TRIG_TIME_HI		0x11</div><div class='del'>-</div><div class='del'>-/* Offset 0x12: Lock Status */</div><div class='del'>-#define MV88E6XXX_TAI_LOCK_STATUS		0x12</div><div class='del'>-</div><div class='del'>-/* Offset 0x00: Ether Type */</div><div class='del'>-#define MV88E6XXX_PTP_GC_ETYPE			0x00</div><div class='add'>+#define MV88E6352_TAI_TIME_LO			0x0e</div><div class='add'>+#define MV88E6352_TAI_TIME_HI			0x0f</div><div class='ctx'> </div><div class='ctx'> /* 6165 Global Control Registers */</div><div class='del'>-/* Offset 0x00: Ether Type */</div><div class='del'>-#define MV88E6XXX_PTP_GC_ETYPE			0x00</div><div class='del'>-</div><div class='del'>-/* Offset 0x01: Message ID */</div><div class='del'>-#define MV88E6XXX_PTP_GC_MESSAGE_ID		0x01</div><div class='del'>-</div><div class='del'>-/* Offset 0x02: Time Stamp Arrive Time */</div><div class='del'>-#define MV88E6XXX_PTP_GC_TS_ARR_PTR		0x02</div><div class='del'>-</div><div class='del'>-/* Offset 0x03: Port Arrival Interrupt Enable */</div><div class='del'>-#define MV88E6XXX_PTP_GC_PORT_ARR_INT_EN	0x03</div><div class='del'>-</div><div class='del'>-/* Offset 0x04: Port Departure Interrupt Enable */</div><div class='del'>-#define MV88E6XXX_PTP_GC_PORT_DEP_INT_EN	0x04</div><div class='del'>-</div><div class='del'>-/* Offset 0x05: Configuration */</div><div class='del'>-#define MV88E6XXX_PTP_GC_CONFIG			0x05</div><div class='del'>-#define MV88E6XXX_PTP_GC_CONFIG_DIS_OVERWRITE	BIT(1)</div><div class='del'>-#define MV88E6XXX_PTP_GC_CONFIG_DIS_TS		BIT(0)</div><div class='del'>-</div><div class='del'>-/* Offset 0x8: Interrupt Status */</div><div class='del'>-#define MV88E6XXX_PTP_GC_INT_STATUS		0x08</div><div class='del'>-</div><div class='ctx'> /* Offset 0x9/0xa: Global Time */</div><div class='del'>-#define MV88E6XXX_PTP_GC_TIME_LO		0x09</div><div class='del'>-#define MV88E6XXX_PTP_GC_TIME_HI		0x0A</div><div class='add'>+#define MV88E6165_PTP_GC_TIME_LO		0x09</div><div class='add'>+#define MV88E6165_PTP_GC_TIME_HI		0x0A</div><div class='ctx'> </div><div class='del'>-/* 6165 Per Port Registers */</div><div class='add'>+/* 6165 Per Port Registers. The arrival and departure registers are a</div><div class='add'>+ * common block consisting of status, two time registers and the sequence ID</div><div class='add'>+ */</div><div class='ctx'> /* Offset 0: Arrival Time 0 Status */</div><div class='ctx'> #define MV88E6165_PORT_PTP_ARR0_STS	0x00</div><div class='ctx'> </div><div class='del'>-/* Offset 0x01/0x02: PTP Arrival 0 Time */</div><div class='del'>-#define MV88E6165_PORT_PTP_ARR0_TIME_LO	0x01</div><div class='del'>-#define MV88E6165_PORT_PTP_ARR0_TIME_HI	0x02</div><div class='del'>-</div><div class='del'>-/* Offset 0x03: PTP Arrival 0 Sequence ID */</div><div class='del'>-#define MV88E6165_PORT_PTP_ARR0_SEQID	0x03</div><div class='del'>-</div><div class='ctx'> /* Offset 0x04: PTP Arrival 1 Status */</div><div class='ctx'> #define MV88E6165_PORT_PTP_ARR1_STS	0x04</div><div class='ctx'> </div><div class='del'>-/* Offset 0x05/0x6E: PTP Arrival 1 Time */</div><div class='del'>-#define MV88E6165_PORT_PTP_ARR1_TIME_LO	0x05</div><div class='del'>-#define MV88E6165_PORT_PTP_ARR1_TIME_HI	0x06</div><div class='del'>-</div><div class='del'>-/* Offset 0x07: PTP Arrival 1 Sequence ID */</div><div class='del'>-#define MV88E6165_PORT_PTP_ARR1_SEQID	0x07</div><div class='del'>-</div><div class='ctx'> /* Offset 0x08: PTP Departure Status */</div><div class='ctx'> #define MV88E6165_PORT_PTP_DEP_STS	0x08</div><div class='ctx'> </div><div class='del'>-/* Offset 0x09/0x0a: PTP Deperture Time */</div><div class='del'>-#define MV88E6165_PORT_PTP_DEP_TIME_LO	0x09</div><div class='del'>-#define MV88E6165_PORT_PTP_DEP_TIME_HI	0x0a</div><div class='del'>-</div><div class='del'>-/* Offset 0x0b: PTP Departure Sequence ID */</div><div class='del'>-#define MV88E6165_PORT_PTP_DEP_SEQID	0x0b</div><div class='del'>-</div><div class='ctx'> /* Offset 0x0d: Port Status */</div><div class='ctx'> #define MV88E6164_PORT_STATUS		0x0d</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NET_DSA_MV88E6XXX_PTP</div><div class='ctx'> </div><div class='del'>-long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp);</div><div class='ctx'> int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip);</div><div class='ctx'> void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip);</div><div class='ctx'> </div><div class='hunk'>@@ -149,17 +73,11 @@ void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip);</div><div class='ctx'> 				      ptp_clock_info)</div><div class='ctx'> </div><div class='ctx'> extern const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops;</div><div class='del'>-extern const struct mv88e6xxx_ptp_ops mv88e6250_ptp_ops;</div><div class='ctx'> extern const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops;</div><div class='ctx'> extern const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops;</div><div class='ctx'> </div><div class='ctx'> #else /* !CONFIG_NET_DSA_MV88E6XXX_PTP */</div><div class='ctx'> </div><div class='del'>-static inline long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp)</div><div class='del'>-{</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -170,7 +88,6 @@ static inline void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops = {};</div><div class='del'>-static const struct mv88e6xxx_ptp_ops mv88e6250_ptp_ops = {};</div><div class='ctx'> static const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops = {};</div><div class='ctx'> static const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops = {};</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c<br/>index 3aa9c997018a..9e5ede932b42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/felix.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/ocelot/felix.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/felix.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/felix.c</a></div><div class='hunk'>@@ -1153,6 +1153,9 @@ static void felix_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='ctx'> </div><div class='ctx'> 	__set_bit(ocelot-&gt;ports[port]-&gt;phy_mode,</div><div class='ctx'> 		  config-&gt;supported_interfaces);</div><div class='add'>+	if (ocelot-&gt;ports[port]-&gt;phy_mode == PHY_INTERFACE_MODE_USXGMII)</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_10G_QXGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void felix_phylink_mac_config(struct phylink_config *config,</div><div class='hunk'>@@ -1230,6 +1233,7 @@ static int felix_port_enable(struct dsa_switch *ds, int port,</div><div class='ctx'> {</div><div class='ctx'> 	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='ctx'> 	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='ctx'> </div><div class='ctx'> 	if (!dsa_port_is_user(dp))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1243,7 +1247,25 @@ static int felix_port_enable(struct dsa_switch *ds, int port,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (!dp-&gt;hsr_dev || felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return dsa_port_simple_hsr_join(ds, port, dp-&gt;hsr_dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_user(dp))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!dp-&gt;hsr_dev || felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_port_simple_hsr_leave(ds, port, dp-&gt;hsr_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void felix_port_qos_map_init(struct ocelot *ocelot, int port)</div><div class='hunk'>@@ -1316,6 +1338,14 @@ static void felix_get_eth_phy_stats(struct dsa_switch *ds, int port,</div><div class='ctx'> 	ocelot_port_get_eth_phy_stats(ocelot, port, phy_stats);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void felix_get_ts_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct ethtool_ts_stats *ts_stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_get_ts_stats(ocelot, port, ts_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void felix_get_strings(struct dsa_switch *ds, int port,</div><div class='ctx'> 			      u32 stringset, u8 *data)</div><div class='ctx'> {</div><div class='hunk'>@@ -1351,6 +1381,7 @@ static const u32 felix_phy_match_table[PHY_INTERFACE_MODE_MAX] = {</div><div class='ctx'> 	[PHY_INTERFACE_MODE_SGMII] = OCELOT_PORT_MODE_SGMII,</div><div class='ctx'> 	[PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,</div><div class='ctx'> 	[PHY_INTERFACE_MODE_USXGMII] = OCELOT_PORT_MODE_USXGMII,</div><div class='add'>+	[PHY_INTERFACE_MODE_10G_QXGMII] = OCELOT_PORT_MODE_10G_QXGMII,</div><div class='ctx'> 	[PHY_INTERFACE_MODE_1000BASEX] = OCELOT_PORT_MODE_1000BASEX,</div><div class='ctx'> 	[PHY_INTERFACE_MODE_2500BASEX] = OCELOT_PORT_MODE_2500BASEX,</div><div class='ctx'> };</div><div class='hunk'>@@ -1766,22 +1797,25 @@ static void felix_teardown(struct dsa_switch *ds)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int felix_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='del'>-			      struct ifreq *ifr)</div><div class='add'>+			      struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct ocelot *ocelot = ds-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	return ocelot_hwstamp_get(ocelot, port, ifr);</div><div class='add'>+	ocelot_hwstamp_get(ocelot, port, config);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int felix_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='del'>-			      struct ifreq *ifr)</div><div class='add'>+			      struct kernel_hwtstamp_config *config,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ocelot *ocelot = ds-&gt;priv;</div><div class='ctx'> 	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='ctx'> 	bool using_tag_8021q;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = ocelot_hwstamp_set(ocelot, port, ifr);</div><div class='add'>+	err = ocelot_hwstamp_set(ocelot, port, config, extack);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -2217,6 +2251,52 @@ static void felix_get_mm_stats(struct dsa_switch *ds, int port,</div><div class='ctx'> 	ocelot_port_get_mm_stats(ocelot, port, stats);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Depending on port type, we may be able to support the offload later (with</div><div class='add'>+ * the "ocelot"/"seville" tagging protocols), or never.</div><div class='add'>+ * If we return 0, the dp-&gt;hsr_dev reference is kept for later; if we return</div><div class='add'>+ * -EOPNOTSUPP, it is cleared (which helps to not bother</div><div class='add'>+ * dsa_port_simple_hsr_leave() with an offload that didn't pass validation).</div><div class='add'>+ */</div><div class='add'>+static int felix_port_hsr_join(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct net_device *hsr,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = dsa_port_simple_hsr_validate(ds, port, hsr, extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Offloading not supported with \"ocelot-8021q\"");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(dsa_to_port(ds, port)-&gt;user-&gt;flags &amp; IFF_UP))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return dsa_port_simple_hsr_join(ds, port, hsr, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_hsr_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				struct net_device *hsr)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!(dsa_to_port(ds, port)-&gt;user-&gt;flags &amp; IFF_UP))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return dsa_port_simple_hsr_leave(ds, port, hsr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct phylink_mac_ops felix_phylink_mac_ops = {</div><div class='ctx'> 	.mac_select_pcs		= felix_phylink_mac_select_pcs,</div><div class='ctx'> 	.mac_config		= felix_phylink_mac_config,</div><div class='hunk'>@@ -2237,6 +2317,7 @@ static const struct dsa_switch_ops felix_switch_ops = {</div><div class='ctx'> 	.get_stats64			= felix_get_stats64,</div><div class='ctx'> 	.get_pause_stats		= felix_get_pause_stats,</div><div class='ctx'> 	.get_rmon_stats			= felix_get_rmon_stats,</div><div class='add'>+	.get_ts_stats			= felix_get_ts_stats,</div><div class='ctx'> 	.get_eth_ctrl_stats		= felix_get_eth_ctrl_stats,</div><div class='ctx'> 	.get_eth_mac_stats		= felix_get_eth_mac_stats,</div><div class='ctx'> 	.get_eth_phy_stats		= felix_get_eth_phy_stats,</div><div class='hunk'>@@ -2246,6 +2327,7 @@ static const struct dsa_switch_ops felix_switch_ops = {</div><div class='ctx'> 	.get_ts_info			= felix_get_ts_info,</div><div class='ctx'> 	.phylink_get_caps		= felix_phylink_get_caps,</div><div class='ctx'> 	.port_enable			= felix_port_enable,</div><div class='add'>+	.port_disable			= felix_port_disable,</div><div class='ctx'> 	.port_fast_age			= felix_port_fast_age,</div><div class='ctx'> 	.port_fdb_dump			= felix_fdb_dump,</div><div class='ctx'> 	.port_fdb_add			= felix_fdb_add,</div><div class='hunk'>@@ -2302,6 +2384,8 @@ static const struct dsa_switch_ops felix_switch_ops = {</div><div class='ctx'> 	.port_del_dscp_prio		= felix_port_del_dscp_prio,</div><div class='ctx'> 	.port_set_host_flood		= felix_port_set_host_flood,</div><div class='ctx'> 	.port_change_conduit		= felix_port_change_conduit,</div><div class='add'>+	.port_hsr_join			= felix_port_hsr_join,</div><div class='add'>+	.port_hsr_leave			= felix_port_hsr_leave,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int felix_register_switch(struct device *dev, resource_size_t switch_base,</div><div class='head'>diff --git a/drivers/net/dsa/ocelot/felix.h b/drivers/net/dsa/ocelot/felix.h<br/>index 211991f494e3..a657b190c5d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/felix.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/ocelot/felix.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/felix.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/felix.h</a></div><div class='hunk'>@@ -12,8 +12,9 @@</div><div class='ctx'> #define OCELOT_PORT_MODE_SGMII		BIT(1)</div><div class='ctx'> #define OCELOT_PORT_MODE_QSGMII		BIT(2)</div><div class='ctx'> #define OCELOT_PORT_MODE_2500BASEX	BIT(3)</div><div class='del'>-#define OCELOT_PORT_MODE_USXGMII	BIT(4)</div><div class='add'>+#define OCELOT_PORT_MODE_USXGMII	BIT(4) /* compatibility */</div><div class='ctx'> #define OCELOT_PORT_MODE_1000BASEX	BIT(5)</div><div class='add'>+#define OCELOT_PORT_MODE_10G_QXGMII	BIT(6)</div><div class='ctx'> </div><div class='ctx'> struct device_node;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/ocelot/felix_vsc9959.c b/drivers/net/dsa/ocelot/felix_vsc9959.c<br/>index 0102a82e88cc..8cf4c8986587 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/felix_vsc9959.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/ocelot/felix_vsc9959.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/felix_vsc9959.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/felix_vsc9959.c</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> #define VSC9959_NUM_PORTS		6</div><div class='ctx'> </div><div class='ctx'> #define VSC9959_TAS_GCL_ENTRY_MAX	63</div><div class='del'>-#define VSC9959_TAS_MIN_GATE_LEN_NS	33</div><div class='add'>+#define VSC9959_TAS_MIN_GATE_LEN_NS	35</div><div class='ctx'> #define VSC9959_VCAP_POLICER_BASE	63</div><div class='ctx'> #define VSC9959_VCAP_POLICER_MAX	383</div><div class='ctx'> #define VSC9959_SWITCH_PCI_BAR		4</div><div class='hunk'>@@ -34,7 +34,8 @@</div><div class='ctx'> 					 OCELOT_PORT_MODE_QSGMII | \</div><div class='ctx'> 					 OCELOT_PORT_MODE_1000BASEX | \</div><div class='ctx'> 					 OCELOT_PORT_MODE_2500BASEX | \</div><div class='del'>-					 OCELOT_PORT_MODE_USXGMII)</div><div class='add'>+					 OCELOT_PORT_MODE_USXGMII | \</div><div class='add'>+					 OCELOT_PORT_MODE_10G_QXGMII)</div><div class='ctx'> </div><div class='ctx'> static const u32 vsc9959_port_modes[VSC9959_NUM_PORTS] = {</div><div class='ctx'> 	VSC9959_PORT_MODE_SERDES,</div><div class='hunk'>@@ -1056,11 +1057,15 @@ static void vsc9959_mdio_bus_free(struct ocelot *ocelot)</div><div class='ctx'> 	mdiobus_free(felix-&gt;imdio);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* The switch considers any frame (regardless of size) as eligible for</div><div class='del'>- * transmission if the traffic class gate is open for at least 33 ns.</div><div class='add'>+/* The switch considers any frame (regardless of size) as eligible</div><div class='add'>+ * for transmission if the traffic class gate is open for at least</div><div class='add'>+ * VSC9959_TAS_MIN_GATE_LEN_NS.</div><div class='add'>+ *</div><div class='ctx'>  * Overruns are prevented by cropping an interval at the end of the gate time</div><div class='del'>- * slot for which egress scheduling is blocked, but we need to still keep 33 ns</div><div class='del'>- * available for one packet to be transmitted, otherwise the port tc will hang.</div><div class='add'>+ * slot for which egress scheduling is blocked, but we need to still keep</div><div class='add'>+ * VSC9959_TAS_MIN_GATE_LEN_NS available for one packet to be transmitted,</div><div class='add'>+ * otherwise the port tc will hang.</div><div class='add'>+ *</div><div class='ctx'>  * This function returns the size of a gate interval that remains available for</div><div class='ctx'>  * setting the guard band, after reserving the space for one egress frame.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1303,7 +1308,8 @@ static void vsc9959_tas_guard_bands_update(struct ocelot *ocelot, int port)</div><div class='ctx'> 			 * per-tc static guard band lengths, so it reduces the</div><div class='ctx'> 			 * useful gate interval length. Therefore, be careful</div><div class='ctx'> 			 * to calculate a guard band (and therefore max_sdu)</div><div class='del'>-			 * that still leaves 33 ns available in the time slot.</div><div class='add'>+			 * that still leaves VSC9959_TAS_MIN_GATE_LEN_NS</div><div class='add'>+			 * available in the time slot.</div><div class='ctx'> 			 */</div><div class='ctx'> 			max_sdu = div_u64(remaining_gate_len_ps, picos_per_byte);</div><div class='ctx'> 			/* A TC gate may be completely closed, which is a</div><div class='hunk'>@@ -1538,7 +1544,7 @@ static void vsc9959_tas_clock_adjust(struct ocelot *ocelot)</div><div class='ctx'> 	struct tc_taprio_qopt_offload *taprio;</div><div class='ctx'> 	struct ocelot_port *ocelot_port;</div><div class='ctx'> 	struct timespec64 base_ts;</div><div class='del'>-	int port;</div><div class='add'>+	int i, port;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='hunk'>@@ -1570,6 +1576,9 @@ static void vsc9959_tas_clock_adjust(struct ocelot *ocelot)</div><div class='ctx'> 			   QSYS_PARAM_CFG_REG_3_BASE_TIME_SEC_MSB_M,</div><div class='ctx'> 			   QSYS_PARAM_CFG_REG_3);</div><div class='ctx'> </div><div class='add'>+		for (i = 0; i &lt; taprio-&gt;num_entries; i++)</div><div class='add'>+			vsc9959_tas_gcl_set(ocelot, i, &amp;taprio-&gt;entries[i]);</div><div class='add'>+</div><div class='ctx'> 		ocelot_rmw(ocelot, QSYS_TAS_PARAM_CFG_CTRL_CONFIG_CHANGE,</div><div class='ctx'> 			   QSYS_TAS_PARAM_CFG_CTRL_CONFIG_CHANGE,</div><div class='ctx'> 			   QSYS_TAS_PARAM_CFG_CTRL);</div><div class='head'>diff --git a/drivers/net/dsa/ocelot/ocelot_ext.c b/drivers/net/dsa/ocelot/ocelot_ext.c<br/>index 450bda18ef37..d5c557a20292 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/ocelot_ext.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/ocelot/ocelot_ext.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/ocelot_ext.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/ocelot_ext.c</a></div><div class='hunk'>@@ -109,4 +109,4 @@ module_platform_driver(ocelot_ext_switch_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("External Ocelot Switch driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_IMPORT_NS(MFD_OCELOT);</div><div class='add'>+MODULE_IMPORT_NS("MFD_OCELOT");</div><div class='head'>diff --git a/drivers/net/dsa/qca/ar9331.c b/drivers/net/dsa/qca/ar9331.c<br/>index e9f2c67bc15f..0526aa96146e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/ar9331.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/qca/ar9331.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/ar9331.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/ar9331.c</a></div><div class='hunk'>@@ -821,8 +821,8 @@ static int ar9331_sw_irq_init(struct ar9331_sw_priv *priv)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;irqdomain = irq_domain_add_linear(np, 1, &amp;ar9331_sw_irqdomain_ops,</div><div class='del'>-						priv);</div><div class='add'>+	priv-&gt;irqdomain = irq_domain_create_linear(dev_fwnode(dev), 1, &amp;ar9331_sw_irqdomain_ops,</div><div class='add'>+						   priv);</div><div class='ctx'> 	if (!priv-&gt;irqdomain) {</div><div class='ctx'> 		dev_err(dev, "failed to create IRQ domain\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/drivers/net/dsa/qca/qca8k-8xxx.c b/drivers/net/dsa/qca/qca8k-8xxx.c<br/>index f8d8c70642c4..a36b8b07030e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k-8xxx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/qca/qca8k-8xxx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k-8xxx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/qca8k-8xxx.c</a></div><div class='hunk'>@@ -342,7 +342,7 @@ static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len)</div><div class='ctx'> 	dev_queue_xmit(skb);</div><div class='ctx'> </div><div class='ctx'> 	ret = wait_for_completion_timeout(&amp;mgmt_eth_data-&gt;rw_done,</div><div class='del'>-					  msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT));</div><div class='add'>+					  QCA8K_ETHERNET_TIMEOUT);</div><div class='ctx'> </div><div class='ctx'> 	*val = mgmt_eth_data-&gt;data[0];</div><div class='ctx'> 	if (len &gt; QCA_HDR_MGMT_DATA1_LEN)</div><div class='hunk'>@@ -394,7 +394,7 @@ static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len)</div><div class='ctx'> 	dev_queue_xmit(skb);</div><div class='ctx'> </div><div class='ctx'> 	ret = wait_for_completion_timeout(&amp;mgmt_eth_data-&gt;rw_done,</div><div class='del'>-					  msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT));</div><div class='add'>+					  QCA8K_ETHERNET_TIMEOUT);</div><div class='ctx'> </div><div class='ctx'> 	ack = mgmt_eth_data-&gt;ack;</div><div class='ctx'> </div><div class='hunk'>@@ -673,7 +673,7 @@ qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy,</div><div class='ctx'> 	 * We therefore need to lock the MDIO bus onto which the switch is</div><div class='ctx'> 	 * connected.</div><div class='ctx'> 	 */</div><div class='del'>-	mutex_lock(&amp;priv-&gt;bus-&gt;mdio_lock);</div><div class='add'>+	mutex_lock_nested(&amp;priv-&gt;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='ctx'> </div><div class='ctx'> 	/* Actually start the request:</div><div class='ctx'> 	 * 1. Send mdio master packet</div><div class='hunk'>@@ -1019,7 +1019,7 @@ qca8k_setup_mdio_bus(struct qca8k_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 		of_get_phy_mode(port, &amp;mode);</div><div class='ctx'> </div><div class='del'>-		if (of_property_read_bool(port, "phy-handle") &amp;&amp;</div><div class='add'>+		if (of_property_present(port, "phy-handle") &amp;&amp;</div><div class='ctx'> 		    mode != PHY_INTERFACE_MODE_INTERNAL)</div><div class='ctx'> 			external_mdio_mask |= BIT(reg);</div><div class='ctx'> 		else</div><div class='hunk'>@@ -1491,7 +1491,7 @@ static struct qca8k_pcs *pcs_to_qca8k_pcs(struct phylink_pcs *pcs)</div><div class='ctx'> 	return container_of(pcs, struct qca8k_pcs, pcs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void qca8k_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+static void qca8k_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 				struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct qca8k_priv *priv = pcs_to_qca8k_pcs(pcs)-&gt;priv;</div><div class='hunk'>@@ -1634,7 +1634,6 @@ static void qca8k_setup_pcs(struct qca8k_priv *priv, struct qca8k_pcs *qpcs,</div><div class='ctx'> 			    int port)</div><div class='ctx'> {</div><div class='ctx'> 	qpcs-&gt;pcs.ops = &amp;qca8k_pcs_ops;</div><div class='del'>-	qpcs-&gt;pcs.neg_mode = true;</div><div class='ctx'> </div><div class='ctx'> 	/* We don't have interrupts for link changes, so we need to poll */</div><div class='ctx'> 	qpcs-&gt;pcs.poll = true;</div><div class='hunk'>@@ -2016,7 +2015,7 @@ static const struct dsa_switch_ops qca8k_switch_ops = {</div><div class='ctx'> 	.get_ethtool_stats	= qca8k_get_ethtool_stats,</div><div class='ctx'> 	.get_sset_count		= qca8k_get_sset_count,</div><div class='ctx'> 	.set_ageing_time	= qca8k_set_ageing_time,</div><div class='del'>-	.get_mac_eee		= qca8k_get_mac_eee,</div><div class='add'>+	.support_eee		= dsa_supports_eee,</div><div class='ctx'> 	.set_mac_eee		= qca8k_set_mac_eee,</div><div class='ctx'> 	.port_enable		= qca8k_port_enable,</div><div class='ctx'> 	.port_disable		= qca8k_port_disable,</div><div class='head'>diff --git a/drivers/net/dsa/qca/qca8k-common.c b/drivers/net/dsa/qca/qca8k-common.c<br/>index 560c74c4ac3d..13005f10edb7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k-common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/qca/qca8k-common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k-common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/qca8k-common.c</a></div><div class='hunk'>@@ -557,13 +557,6 @@ exit:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int qca8k_get_mac_eee(struct dsa_switch *ds, int port,</div><div class='del'>-		      struct ethtool_keee *e)</div><div class='del'>-{</div><div class='del'>-	/* Nothing to do on the port's MAC */</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int qca8k_port_configure_learning(struct dsa_switch *ds, int port,</div><div class='ctx'> 					 bool learning)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/dsa/qca/qca8k.h b/drivers/net/dsa/qca/qca8k.h<br/>index 3664a2e2f1f6..d046679265fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/qca/qca8k.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/qca8k.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> #define QCA8K_ETHERNET_MDIO_PRIORITY			7</div><div class='ctx'> #define QCA8K_ETHERNET_PHY_PRIORITY			6</div><div class='del'>-#define QCA8K_ETHERNET_TIMEOUT				5</div><div class='add'>+#define QCA8K_ETHERNET_TIMEOUT				msecs_to_jiffies(5)</div><div class='ctx'> </div><div class='ctx'> #define QCA8K_NUM_PORTS					7</div><div class='ctx'> #define QCA8K_NUM_CPU_PORTS				2</div><div class='hunk'>@@ -520,7 +520,6 @@ int qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset);</div><div class='ctx'> </div><div class='ctx'> /* Common eee function */</div><div class='ctx'> int qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *eee);</div><div class='del'>-int qca8k_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *e);</div><div class='ctx'> </div><div class='ctx'> /* Common bridge function */</div><div class='ctx'> void qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);</div><div class='head'>diff --git a/drivers/net/dsa/realtek/Kconfig b/drivers/net/dsa/realtek/Kconfig<br/>index 6989972eebc3..d6eb6713e5f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/Kconfig</a></div><div class='hunk'>@@ -43,4 +43,10 @@ config NET_DSA_REALTEK_RTL8366RB</div><div class='ctx'> 	help</div><div class='ctx'> 	  Select to enable support for Realtek RTL8366RB.</div><div class='ctx'> </div><div class='add'>+config NET_DSA_REALTEK_RTL8366RB_LEDS</div><div class='add'>+	bool</div><div class='add'>+	depends on (LEDS_CLASS=y || LEDS_CLASS=NET_DSA_REALTEK_RTL8366RB)</div><div class='add'>+	depends on NET_DSA_REALTEK_RTL8366RB</div><div class='add'>+	default NET_DSA_REALTEK_RTL8366RB</div><div class='add'>+</div><div class='ctx'> endif</div><div class='head'>diff --git a/drivers/net/dsa/realtek/Makefile b/drivers/net/dsa/realtek/Makefile<br/>index 35491dc20d6d..17367bcba496 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/Makefile</a></div><div class='hunk'>@@ -12,4 +12,7 @@ endif</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_NET_DSA_REALTEK_RTL8366RB) += rtl8366.o</div><div class='ctx'> rtl8366-objs 				:= rtl8366-core.o rtl8366rb.o</div><div class='add'>+ifdef CONFIG_NET_DSA_REALTEK_RTL8366RB_LEDS</div><div class='add'>+rtl8366-objs 				+= rtl8366rb-leds.o</div><div class='add'>+endif</div><div class='ctx'> obj-$(CONFIG_NET_DSA_REALTEK_RTL8365MB) += rtl8365mb.o</div><div class='head'>diff --git a/drivers/net/dsa/realtek/realtek-mdio.c b/drivers/net/dsa/realtek/realtek-mdio.c<br/>index 5f545dda702b..a5e7dff96e91 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek-mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/realtek-mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek-mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/realtek-mdio.c</a></div><div class='hunk'>@@ -140,7 +140,7 @@ int realtek_mdio_probe(struct mdio_device *mdiodev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(realtek_mdio_probe, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_mdio_probe, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * realtek_mdio_remove() - Remove the driver of an MDIO-connected switch</div><div class='hunk'>@@ -163,7 +163,7 @@ void realtek_mdio_remove(struct mdio_device *mdiodev)</div><div class='ctx'> </div><div class='ctx'> 	rtl83xx_remove(priv);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(realtek_mdio_remove, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_mdio_remove, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * realtek_mdio_shutdown() - Shutdown the driver of a MDIO-connected switch</div><div class='hunk'>@@ -184,4 +184,4 @@ void realtek_mdio_shutdown(struct mdio_device *mdiodev)</div><div class='ctx'> </div><div class='ctx'> 	rtl83xx_shutdown(priv);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(realtek_mdio_shutdown, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_mdio_shutdown, "REALTEK_DSA");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/realtek-smi.c b/drivers/net/dsa/realtek/realtek-smi.c<br/>index d750bddf27b4..972e22218418 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek-smi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/realtek-smi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek-smi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/realtek-smi.c</a></div><div class='hunk'>@@ -361,7 +361,7 @@ int realtek_smi_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(realtek_smi_probe, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_smi_probe, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * realtek_smi_remove() - Remove the driver of a SMI-connected switch</div><div class='hunk'>@@ -384,7 +384,7 @@ void realtek_smi_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	rtl83xx_remove(priv);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(realtek_smi_remove, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_smi_remove, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * realtek_smi_shutdown() - Shutdown the driver of a SMI-connected switch</div><div class='hunk'>@@ -405,4 +405,4 @@ void realtek_smi_shutdown(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	rtl83xx_shutdown(priv);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(realtek_smi_shutdown, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_smi_shutdown, "REALTEK_DSA");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/realtek.h b/drivers/net/dsa/realtek/realtek.h<br/>index a1b2e0b529d5..c03485a80d93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/realtek.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/realtek.h</a></div><div class='hunk'>@@ -19,9 +19,6 @@</div><div class='ctx'> </div><div class='ctx'> struct phylink_mac_ops;</div><div class='ctx'> struct realtek_ops;</div><div class='del'>-struct dentry;</div><div class='del'>-struct inode;</div><div class='del'>-struct file;</div><div class='ctx'> </div><div class='ctx'> struct rtl8366_mib_counter {</div><div class='ctx'> 	unsigned int	base;</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c<br/>index 6b9dbdb00941..c575e164368c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8365mb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/rtl8365mb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8365mb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl8365mb.c</a></div><div class='hunk'>@@ -1719,8 +1719,8 @@ static int rtl8365mb_irq_setup(struct realtek_priv *priv)</div><div class='ctx'> 		goto out_put_node;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;irqdomain = irq_domain_add_linear(intc, priv-&gt;num_ports,</div><div class='del'>-						&amp;rtl8365mb_irqdomain_ops, priv);</div><div class='add'>+	priv-&gt;irqdomain = irq_domain_create_linear(of_fwnode_handle(intc), priv-&gt;num_ports,</div><div class='add'>+						   &amp;rtl8365mb_irqdomain_ops, priv);</div><div class='ctx'> 	if (!priv-&gt;irqdomain) {</div><div class='ctx'> 		dev_err(priv-&gt;dev, "failed to add irq domain\n");</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -2134,6 +2134,8 @@ static const struct dsa_switch_ops rtl8365mb_switch_ops = {</div><div class='ctx'> 	.get_stats64 = rtl8365mb_get_stats64,</div><div class='ctx'> 	.port_change_mtu = rtl8365mb_port_change_mtu,</div><div class='ctx'> 	.port_max_mtu = rtl8365mb_port_max_mtu,</div><div class='add'>+	.port_hsr_join = dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave = dsa_port_simple_hsr_leave,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct realtek_ops rtl8365mb_ops = {</div><div class='hunk'>@@ -2206,4 +2208,4 @@ module_exit(rtl8365mb_exit);</div><div class='ctx'> MODULE_AUTHOR("Alvin Šipraga &lt;alsi@bang-olufsen.dk&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Driver for RTL8365MB-VC ethernet switch");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_IMPORT_NS(REALTEK_DSA);</div><div class='add'>+MODULE_IMPORT_NS("REALTEK_DSA");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl8366-core.c b/drivers/net/dsa/realtek/rtl8366-core.c<br/>index 7c6520ba3a26..047feeed96a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8366-core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/rtl8366-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8366-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl8366-core.c</a></div><div class='hunk'>@@ -34,7 +34,7 @@ int rtl8366_mc_is_used(struct realtek_priv *priv, int mc_index, int *used)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_mc_is_used, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_mc_is_used, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * rtl8366_obtain_mc() - retrieve or allocate a VLAN member configuration</div><div class='hunk'>@@ -187,7 +187,7 @@ int rtl8366_set_vlan(struct realtek_priv *priv, int vid, u32 member,</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_set_vlan, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_set_vlan, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> int rtl8366_set_pvid(struct realtek_priv *priv, unsigned int port,</div><div class='ctx'> 		     unsigned int vid)</div><div class='hunk'>@@ -217,7 +217,7 @@ int rtl8366_set_pvid(struct realtek_priv *priv, unsigned int port,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_set_pvid, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_set_pvid, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> int rtl8366_enable_vlan4k(struct realtek_priv *priv, bool enable)</div><div class='ctx'> {</div><div class='hunk'>@@ -243,7 +243,7 @@ int rtl8366_enable_vlan4k(struct realtek_priv *priv, bool enable)</div><div class='ctx'> 	priv-&gt;vlan4k_enabled = enable;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_enable_vlan4k, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_enable_vlan4k, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> int rtl8366_enable_vlan(struct realtek_priv *priv, bool enable)</div><div class='ctx'> {</div><div class='hunk'>@@ -265,7 +265,7 @@ int rtl8366_enable_vlan(struct realtek_priv *priv, bool enable)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_enable_vlan, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_enable_vlan, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> int rtl8366_reset_vlan(struct realtek_priv *priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -290,7 +290,7 @@ int rtl8366_reset_vlan(struct realtek_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_reset_vlan, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_reset_vlan, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> int rtl8366_vlan_add(struct dsa_switch *ds, int port,</div><div class='ctx'> 		     const struct switchdev_obj_port_vlan *vlan,</div><div class='hunk'>@@ -345,7 +345,7 @@ int rtl8366_vlan_add(struct dsa_switch *ds, int port,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_vlan_add, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_vlan_add, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> int rtl8366_vlan_del(struct dsa_switch *ds, int port,</div><div class='ctx'> 		     const struct switchdev_obj_port_vlan *vlan)</div><div class='hunk'>@@ -389,7 +389,7 @@ int rtl8366_vlan_del(struct dsa_switch *ds, int port,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_vlan_del, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_vlan_del, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> void rtl8366_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='ctx'> 			 uint8_t *data)</div><div class='hunk'>@@ -403,7 +403,7 @@ void rtl8366_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;num_mib_counters; i++)</div><div class='ctx'> 		ethtool_puts(&amp;data, priv-&gt;mib_counters[i].name);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_get_strings, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_get_strings, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> int rtl8366_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='ctx'> {</div><div class='hunk'>@@ -417,7 +417,7 @@ int rtl8366_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='ctx'> </div><div class='ctx'> 	return priv-&gt;num_mib_counters;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_get_sset_count, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_get_sset_count, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> void rtl8366_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data)</div><div class='ctx'> {</div><div class='hunk'>@@ -441,4 +441,4 @@ void rtl8366_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data)</div><div class='ctx'> 		data[i] = mibvalue;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl8366_get_ethtool_stats, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_get_ethtool_stats, "REALTEK_DSA");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl8366rb-leds.c b/drivers/net/dsa/realtek/rtl8366rb-leds.c<br/>new file mode 100644<br/>index 000000000000..99c890681ae6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8366rb-leds.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl8366rb-leds.c</a></div><div class='hunk'>@@ -0,0 +1,177 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include "rtl83xx.h"</div><div class='add'>+#include "rtl8366rb.h"</div><div class='add'>+</div><div class='add'>+static inline u32 rtl8366rb_led_group_port_mask(u8 led_group, u8 port)</div><div class='add'>+{</div><div class='add'>+	switch (led_group) {</div><div class='add'>+	case 0:</div><div class='add'>+		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='add'>+	case 1:</div><div class='add'>+		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='add'>+	case 2:</div><div class='add'>+		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='add'>+	case 3:</div><div class='add'>+		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rb8366rb_get_port_led(struct rtl8366rb_led *led)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = led-&gt;priv;</div><div class='add'>+	u8 led_group = led-&gt;led_group;</div><div class='add'>+	u8 port_num = led-&gt;port_num;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map, RTL8366RB_LED_X_X_CTRL_REG(led_group),</div><div class='add'>+			  &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "error reading LED on port %d group %d\n",</div><div class='add'>+			led_group, port_num);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return !!(val &amp; rtl8366rb_led_group_port_mask(led_group, port_num));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rb8366rb_set_port_led(struct rtl8366rb_led *led, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = led-&gt;priv;</div><div class='add'>+	u8 led_group = led-&gt;led_group;</div><div class='add'>+	u8 port_num = led-&gt;port_num;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map,</div><div class='add'>+				 RTL8366RB_LED_X_X_CTRL_REG(led_group),</div><div class='add'>+				 rtl8366rb_led_group_port_mask(led_group,</div><div class='add'>+							       port_num),</div><div class='add'>+				 enable ? 0xffff : 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "error updating LED on port %d group %d\n",</div><div class='add'>+			led_group, port_num);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Change the LED group to manual controlled LEDs if required */</div><div class='add'>+	ret = rb8366rb_set_ledgroup_mode(priv, led_group,</div><div class='add'>+					 RTL8366RB_LEDGROUP_FORCE);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "error updating LED GROUP group %d\n",</div><div class='add'>+			led_group);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+rtl8366rb_cled_brightness_set_blocking(struct led_classdev *ldev,</div><div class='add'>+				       enum led_brightness brightness)</div><div class='add'>+{</div><div class='add'>+	struct rtl8366rb_led *led = container_of(ldev, struct rtl8366rb_led,</div><div class='add'>+						 cdev);</div><div class='add'>+</div><div class='add'>+	return rb8366rb_set_port_led(led, brightness == LED_ON);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_setup_led(struct realtek_priv *priv, struct dsa_port *dp,</div><div class='add'>+			       struct fwnode_handle *led_fwnode)</div><div class='add'>+{</div><div class='add'>+	struct rtl8366rb *rb = priv-&gt;chip_data;</div><div class='add'>+	struct led_init_data init_data = { };</div><div class='add'>+	enum led_default_state state;</div><div class='add'>+	struct rtl8366rb_led *led;</div><div class='add'>+	u32 led_group;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = fwnode_property_read_u32(led_fwnode, "reg", &amp;led_group);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (led_group &gt;= RTL8366RB_NUM_LEDGROUPS) {</div><div class='add'>+		dev_warn(priv-&gt;dev, "Invalid LED reg %d defined for port %d",</div><div class='add'>+			 led_group, dp-&gt;index);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	led = &amp;rb-&gt;leds[dp-&gt;index][led_group];</div><div class='add'>+	led-&gt;port_num = dp-&gt;index;</div><div class='add'>+	led-&gt;led_group = led_group;</div><div class='add'>+	led-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	state = led_init_default_state_get(led_fwnode);</div><div class='add'>+	switch (state) {</div><div class='add'>+	case LEDS_DEFSTATE_ON:</div><div class='add'>+		led-&gt;cdev.brightness = 1;</div><div class='add'>+		rb8366rb_set_port_led(led, 1);</div><div class='add'>+		break;</div><div class='add'>+	case LEDS_DEFSTATE_KEEP:</div><div class='add'>+		led-&gt;cdev.brightness =</div><div class='add'>+			rb8366rb_get_port_led(led);</div><div class='add'>+		break;</div><div class='add'>+	case LEDS_DEFSTATE_OFF:</div><div class='add'>+	default:</div><div class='add'>+		led-&gt;cdev.brightness = 0;</div><div class='add'>+		rb8366rb_set_port_led(led, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	led-&gt;cdev.max_brightness = 1;</div><div class='add'>+	led-&gt;cdev.brightness_set_blocking =</div><div class='add'>+		rtl8366rb_cled_brightness_set_blocking;</div><div class='add'>+	init_data.fwnode = led_fwnode;</div><div class='add'>+	init_data.devname_mandatory = true;</div><div class='add'>+</div><div class='add'>+	init_data.devicename = kasprintf(GFP_KERNEL, "Realtek-%d:0%d:%d",</div><div class='add'>+					 dp-&gt;ds-&gt;index, dp-&gt;index, led_group);</div><div class='add'>+	if (!init_data.devicename)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = devm_led_classdev_register_ext(priv-&gt;dev, &amp;led-&gt;cdev, &amp;init_data);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_warn(priv-&gt;dev, "Failed to init LED %d for port %d",</div><div class='add'>+			 led_group, dp-&gt;index);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rtl8366rb_setup_leds(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	struct device_node *leds_np;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_port(dp, ds) {</div><div class='add'>+		if (!dp-&gt;dn)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		leds_np = of_get_child_by_name(dp-&gt;dn, "leds");</div><div class='add'>+		if (!leds_np) {</div><div class='add'>+			dev_dbg(priv-&gt;dev, "No leds defined for port %d",</div><div class='add'>+				dp-&gt;index);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for_each_child_of_node_scoped(leds_np, led_np) {</div><div class='add'>+			ret = rtl8366rb_setup_led(priv, dp,</div><div class='add'>+						  of_fwnode_handle(led_np));</div><div class='add'>+			if (ret)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		of_node_put(leds_np);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl8366rb.c b/drivers/net/dsa/realtek/rtl8366rb.c<br/>index 6ba03f81c882..d96ae72b0a5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8366rb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/rtl8366rb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8366rb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl8366rb.c</a></div><div class='hunk'>@@ -21,16 +21,13 @@</div><div class='ctx'> #include &lt;linux/irqchip/chained_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "realtek.h"</div><div class='ctx'> #include "realtek-smi.h"</div><div class='ctx'> #include "realtek-mdio.h"</div><div class='ctx'> #include "rtl83xx.h"</div><div class='del'>-</div><div class='del'>-#define RTL8366RB_PORT_NUM_CPU		5</div><div class='del'>-#define RTL8366RB_NUM_PORTS		6</div><div class='del'>-#define RTL8366RB_PHY_NO_MAX		4</div><div class='del'>-#define RTL8366RB_PHY_ADDR_MAX		31</div><div class='add'>+#include "rtl8366rb.h"</div><div class='ctx'> </div><div class='ctx'> /* Switch Global Configuration register */</div><div class='ctx'> #define RTL8366RB_SGCR				0x0000</div><div class='hunk'>@@ -175,39 +172,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #define RTL8366RB_VLAN_INGRESS_CTRL2_REG	0x037f</div><div class='ctx'> </div><div class='del'>-/* LED control registers */</div><div class='del'>-/* The LED blink rate is global; it is used by all triggers in all groups. */</div><div class='del'>-#define RTL8366RB_LED_BLINKRATE_REG		0x0430</div><div class='del'>-#define RTL8366RB_LED_BLINKRATE_MASK		0x0007</div><div class='del'>-#define RTL8366RB_LED_BLINKRATE_28MS		0x0000</div><div class='del'>-#define RTL8366RB_LED_BLINKRATE_56MS		0x0001</div><div class='del'>-#define RTL8366RB_LED_BLINKRATE_84MS		0x0002</div><div class='del'>-#define RTL8366RB_LED_BLINKRATE_111MS		0x0003</div><div class='del'>-#define RTL8366RB_LED_BLINKRATE_222MS		0x0004</div><div class='del'>-#define RTL8366RB_LED_BLINKRATE_446MS		0x0005</div><div class='del'>-</div><div class='del'>-/* LED trigger event for each group */</div><div class='del'>-#define RTL8366RB_LED_CTRL_REG			0x0431</div><div class='del'>-#define RTL8366RB_LED_CTRL_OFFSET(led_group)	\</div><div class='del'>-	(4 * (led_group))</div><div class='del'>-#define RTL8366RB_LED_CTRL_MASK(led_group)	\</div><div class='del'>-	(0xf &lt;&lt; RTL8366RB_LED_CTRL_OFFSET(led_group))</div><div class='del'>-</div><div class='del'>-/* The RTL8366RB_LED_X_X registers are used to manually set the LED state only</div><div class='del'>- * when the corresponding LED group in RTL8366RB_LED_CTRL_REG is</div><div class='del'>- * RTL8366RB_LEDGROUP_FORCE. Otherwise, it is ignored.</div><div class='del'>- */</div><div class='del'>-#define RTL8366RB_LED_0_1_CTRL_REG		0x0432</div><div class='del'>-#define RTL8366RB_LED_2_3_CTRL_REG		0x0433</div><div class='del'>-#define RTL8366RB_LED_X_X_CTRL_REG(led_group)	\</div><div class='del'>-	((led_group) &lt;= 1 ? \</div><div class='del'>-		RTL8366RB_LED_0_1_CTRL_REG : \</div><div class='del'>-		RTL8366RB_LED_2_3_CTRL_REG)</div><div class='del'>-#define RTL8366RB_LED_0_X_CTRL_MASK		GENMASK(5, 0)</div><div class='del'>-#define RTL8366RB_LED_X_1_CTRL_MASK		GENMASK(11, 6)</div><div class='del'>-#define RTL8366RB_LED_2_X_CTRL_MASK		GENMASK(5, 0)</div><div class='del'>-#define RTL8366RB_LED_X_3_CTRL_MASK		GENMASK(11, 6)</div><div class='del'>-</div><div class='ctx'> #define RTL8366RB_MIB_COUNT			33</div><div class='ctx'> #define RTL8366RB_GLOBAL_MIB_COUNT		1</div><div class='ctx'> #define RTL8366RB_MIB_COUNTER_PORT_OFFSET	0x0050</div><div class='hunk'>@@ -243,7 +207,6 @@</div><div class='ctx'> #define RTL8366RB_PORT_STATUS_AN_MASK		0x0080</div><div class='ctx'> </div><div class='ctx'> #define RTL8366RB_NUM_VLANS		16</div><div class='del'>-#define RTL8366RB_NUM_LEDGROUPS		4</div><div class='ctx'> #define RTL8366RB_NUM_VIDS		4096</div><div class='ctx'> #define RTL8366RB_PRIORITYMAX		7</div><div class='ctx'> #define RTL8366RB_NUM_FIDS		8</div><div class='hunk'>@@ -350,46 +313,6 @@</div><div class='ctx'> #define RTL8366RB_GREEN_FEATURE_TX	BIT(0)</div><div class='ctx'> #define RTL8366RB_GREEN_FEATURE_RX	BIT(2)</div><div class='ctx'> </div><div class='del'>-enum rtl8366_ledgroup_mode {</div><div class='del'>-	RTL8366RB_LEDGROUP_OFF			= 0x0,</div><div class='del'>-	RTL8366RB_LEDGROUP_DUP_COL		= 0x1,</div><div class='del'>-	RTL8366RB_LEDGROUP_LINK_ACT		= 0x2,</div><div class='del'>-	RTL8366RB_LEDGROUP_SPD1000		= 0x3,</div><div class='del'>-	RTL8366RB_LEDGROUP_SPD100		= 0x4,</div><div class='del'>-	RTL8366RB_LEDGROUP_SPD10		= 0x5,</div><div class='del'>-	RTL8366RB_LEDGROUP_SPD1000_ACT		= 0x6,</div><div class='del'>-	RTL8366RB_LEDGROUP_SPD100_ACT		= 0x7,</div><div class='del'>-	RTL8366RB_LEDGROUP_SPD10_ACT		= 0x8,</div><div class='del'>-	RTL8366RB_LEDGROUP_SPD100_10_ACT	= 0x9,</div><div class='del'>-	RTL8366RB_LEDGROUP_FIBER		= 0xa,</div><div class='del'>-	RTL8366RB_LEDGROUP_AN_FAULT		= 0xb,</div><div class='del'>-	RTL8366RB_LEDGROUP_LINK_RX		= 0xc,</div><div class='del'>-	RTL8366RB_LEDGROUP_LINK_TX		= 0xd,</div><div class='del'>-	RTL8366RB_LEDGROUP_MASTER		= 0xe,</div><div class='del'>-	RTL8366RB_LEDGROUP_FORCE		= 0xf,</div><div class='del'>-</div><div class='del'>-	__RTL8366RB_LEDGROUP_MODE_MAX</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct rtl8366rb_led {</div><div class='del'>-	u8 port_num;</div><div class='del'>-	u8 led_group;</div><div class='del'>-	struct realtek_priv *priv;</div><div class='del'>-	struct led_classdev cdev;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct rtl8366rb - RTL8366RB-specific data</div><div class='del'>- * @max_mtu: per-port max MTU setting</div><div class='del'>- * @pvid_enabled: if PVID is set for respective port</div><div class='del'>- * @leds: per-port and per-ledgroup led info</div><div class='del'>- */</div><div class='del'>-struct rtl8366rb {</div><div class='del'>-	unsigned int max_mtu[RTL8366RB_NUM_PORTS];</div><div class='del'>-	bool pvid_enabled[RTL8366RB_NUM_PORTS];</div><div class='del'>-	struct rtl8366rb_led leds[RTL8366RB_NUM_PORTS][RTL8366RB_NUM_LEDGROUPS];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct rtl8366_mib_counter rtl8366rb_mib_counters[] = {</div><div class='ctx'> 	{ 0,  0, 4, "IfInOctets"				},</div><div class='ctx'> 	{ 0,  4, 4, "EtherStatsOctets"				},</div><div class='hunk'>@@ -627,10 +550,8 @@ static int rtl8366rb_setup_cascaded_irq(struct realtek_priv *priv)</div><div class='ctx'> 		dev_err(priv-&gt;dev, "unable to request irq: %d\n", ret);</div><div class='ctx'> 		goto out_put_node;</div><div class='ctx'> 	}</div><div class='del'>-	priv-&gt;irqdomain = irq_domain_add_linear(intc,</div><div class='del'>-						RTL8366RB_NUM_INTERRUPT,</div><div class='del'>-						&amp;rtl8366rb_irqdomain_ops,</div><div class='del'>-						priv);</div><div class='add'>+	priv-&gt;irqdomain = irq_domain_create_linear(of_fwnode_handle(intc), RTL8366RB_NUM_INTERRUPT,</div><div class='add'>+						   &amp;rtl8366rb_irqdomain_ops, priv);</div><div class='ctx'> 	if (!priv-&gt;irqdomain) {</div><div class='ctx'> 		dev_err(priv-&gt;dev, "failed to create IRQ domain\n");</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -830,9 +751,10 @@ static int rtl8366rb_jam_table(const struct rtl8366rb_jam_tbl_entry *jam_table,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rb8366rb_set_ledgroup_mode(struct realtek_priv *priv,</div><div class='del'>-				      u8 led_group,</div><div class='del'>-				      enum rtl8366_ledgroup_mode mode)</div><div class='add'>+/* This code is used also with LEDs disabled */</div><div class='add'>+int rb8366rb_set_ledgroup_mode(struct realtek_priv *priv,</div><div class='add'>+			       u8 led_group,</div><div class='add'>+			       enum rtl8366_ledgroup_mode mode)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -849,144 +771,7 @@ static int rb8366rb_set_ledgroup_mode(struct realtek_priv *priv,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 rtl8366rb_led_group_port_mask(u8 led_group, u8 port)</div><div class='del'>-{</div><div class='del'>-	switch (led_group) {</div><div class='del'>-	case 0:</div><div class='del'>-		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='del'>-	case 1:</div><div class='del'>-		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='del'>-	case 2:</div><div class='del'>-		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='del'>-	case 3:</div><div class='del'>-		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='del'>-	default:</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rb8366rb_get_port_led(struct rtl8366rb_led *led)</div><div class='del'>-{</div><div class='del'>-	struct realtek_priv *priv = led-&gt;priv;</div><div class='del'>-	u8 led_group = led-&gt;led_group;</div><div class='del'>-	u8 port_num = led-&gt;port_num;</div><div class='del'>-	int ret;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	ret = regmap_read(priv-&gt;map, RTL8366RB_LED_X_X_CTRL_REG(led_group),</div><div class='del'>-			  &amp;val);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(priv-&gt;dev, "error reading LED on port %d group %d\n",</div><div class='del'>-			led_group, port_num);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return !!(val &amp; rtl8366rb_led_group_port_mask(led_group, port_num));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rb8366rb_set_port_led(struct rtl8366rb_led *led, bool enable)</div><div class='del'>-{</div><div class='del'>-	struct realtek_priv *priv = led-&gt;priv;</div><div class='del'>-	u8 led_group = led-&gt;led_group;</div><div class='del'>-	u8 port_num = led-&gt;port_num;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = regmap_update_bits(priv-&gt;map,</div><div class='del'>-				 RTL8366RB_LED_X_X_CTRL_REG(led_group),</div><div class='del'>-				 rtl8366rb_led_group_port_mask(led_group,</div><div class='del'>-							       port_num),</div><div class='del'>-				 enable ? 0xffff : 0);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(priv-&gt;dev, "error updating LED on port %d group %d\n",</div><div class='del'>-			led_group, port_num);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Change the LED group to manual controlled LEDs if required */</div><div class='del'>-	ret = rb8366rb_set_ledgroup_mode(priv, led_group,</div><div class='del'>-					 RTL8366RB_LEDGROUP_FORCE);</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(priv-&gt;dev, "error updating LED GROUP group %d\n",</div><div class='del'>-			led_group);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-rtl8366rb_cled_brightness_set_blocking(struct led_classdev *ldev,</div><div class='del'>-				       enum led_brightness brightness)</div><div class='del'>-{</div><div class='del'>-	struct rtl8366rb_led *led = container_of(ldev, struct rtl8366rb_led,</div><div class='del'>-						 cdev);</div><div class='del'>-</div><div class='del'>-	return rb8366rb_set_port_led(led, brightness == LED_ON);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rtl8366rb_setup_led(struct realtek_priv *priv, struct dsa_port *dp,</div><div class='del'>-			       struct fwnode_handle *led_fwnode)</div><div class='del'>-{</div><div class='del'>-	struct rtl8366rb *rb = priv-&gt;chip_data;</div><div class='del'>-	struct led_init_data init_data = { };</div><div class='del'>-	enum led_default_state state;</div><div class='del'>-	struct rtl8366rb_led *led;</div><div class='del'>-	u32 led_group;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = fwnode_property_read_u32(led_fwnode, "reg", &amp;led_group);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (led_group &gt;= RTL8366RB_NUM_LEDGROUPS) {</div><div class='del'>-		dev_warn(priv-&gt;dev, "Invalid LED reg %d defined for port %d",</div><div class='del'>-			 led_group, dp-&gt;index);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	led = &amp;rb-&gt;leds[dp-&gt;index][led_group];</div><div class='del'>-	led-&gt;port_num = dp-&gt;index;</div><div class='del'>-	led-&gt;led_group = led_group;</div><div class='del'>-	led-&gt;priv = priv;</div><div class='del'>-</div><div class='del'>-	state = led_init_default_state_get(led_fwnode);</div><div class='del'>-	switch (state) {</div><div class='del'>-	case LEDS_DEFSTATE_ON:</div><div class='del'>-		led-&gt;cdev.brightness = 1;</div><div class='del'>-		rb8366rb_set_port_led(led, 1);</div><div class='del'>-		break;</div><div class='del'>-	case LEDS_DEFSTATE_KEEP:</div><div class='del'>-		led-&gt;cdev.brightness =</div><div class='del'>-			rb8366rb_get_port_led(led);</div><div class='del'>-		break;</div><div class='del'>-	case LEDS_DEFSTATE_OFF:</div><div class='del'>-	default:</div><div class='del'>-		led-&gt;cdev.brightness = 0;</div><div class='del'>-		rb8366rb_set_port_led(led, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	led-&gt;cdev.max_brightness = 1;</div><div class='del'>-	led-&gt;cdev.brightness_set_blocking =</div><div class='del'>-		rtl8366rb_cled_brightness_set_blocking;</div><div class='del'>-	init_data.fwnode = led_fwnode;</div><div class='del'>-	init_data.devname_mandatory = true;</div><div class='del'>-</div><div class='del'>-	init_data.devicename = kasprintf(GFP_KERNEL, "Realtek-%d:0%d:%d",</div><div class='del'>-					 dp-&gt;ds-&gt;index, dp-&gt;index, led_group);</div><div class='del'>-	if (!init_data.devicename)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ret = devm_led_classdev_register_ext(priv-&gt;dev, &amp;led-&gt;cdev, &amp;init_data);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_warn(priv-&gt;dev, "Failed to init LED %d for port %d",</div><div class='del'>-			 led_group, dp-&gt;index);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='add'>+/* This code is used also with LEDs disabled */</div><div class='ctx'> static int rtl8366rb_setup_all_leds_off(struct realtek_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -1007,38 +792,6 @@ static int rtl8366rb_setup_all_leds_off(struct realtek_priv *priv)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl8366rb_setup_leds(struct realtek_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='del'>-	struct device_node *leds_np;</div><div class='del'>-	struct dsa_port *dp;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	dsa_switch_for_each_port(dp, ds) {</div><div class='del'>-		if (!dp-&gt;dn)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		leds_np = of_get_child_by_name(dp-&gt;dn, "leds");</div><div class='del'>-		if (!leds_np) {</div><div class='del'>-			dev_dbg(priv-&gt;dev, "No leds defined for port %d",</div><div class='del'>-				dp-&gt;index);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		for_each_child_of_node_scoped(leds_np, led_np) {</div><div class='del'>-			ret = rtl8366rb_setup_led(priv, dp,</div><div class='del'>-						  of_fwnode_handle(led_np));</div><div class='del'>-			if (ret)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		of_node_put(leds_np);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int rtl8366rb_setup(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='ctx'> 	struct realtek_priv *priv = ds-&gt;priv;</div><div class='hunk'>@@ -1522,7 +1275,7 @@ static int rtl8366rb_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='ctx'> 	rb = priv-&gt;chip_data;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(priv-&gt;dev, "port %d: %s VLAN filtering\n", port,</div><div class='del'>-		vlan_filtering ? "enable" : "disable");</div><div class='add'>+		str_enable_disable(vlan_filtering));</div><div class='ctx'> </div><div class='ctx'> 	/* If the port is not in the member set, the frame will be dropped */</div><div class='ctx'> 	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_VLAN_INGRESS_CTRL2_REG,</div><div class='hunk'>@@ -1884,7 +1637,7 @@ static bool rtl8366rb_is_vlan_valid(struct realtek_priv *priv, unsigned int vlan</div><div class='ctx'> </div><div class='ctx'> static int rtl8366rb_enable_vlan(struct realtek_priv *priv, bool enable)</div><div class='ctx'> {</div><div class='del'>-	dev_dbg(priv-&gt;dev, "%s VLAN\n", enable ? "enable" : "disable");</div><div class='add'>+	dev_dbg(priv-&gt;dev, "%s VLAN\n", str_enable_disable(enable));</div><div class='ctx'> 	return regmap_update_bits(priv-&gt;map,</div><div class='ctx'> 				  RTL8366RB_SGCR, RTL8366RB_SGCR_EN_VLAN,</div><div class='ctx'> 				  enable ? RTL8366RB_SGCR_EN_VLAN : 0);</div><div class='hunk'>@@ -1892,7 +1645,7 @@ static int rtl8366rb_enable_vlan(struct realtek_priv *priv, bool enable)</div><div class='ctx'> </div><div class='ctx'> static int rtl8366rb_enable_vlan4k(struct realtek_priv *priv, bool enable)</div><div class='ctx'> {</div><div class='del'>-	dev_dbg(priv-&gt;dev, "%s VLAN 4k\n", enable ? "enable" : "disable");</div><div class='add'>+	dev_dbg(priv-&gt;dev, "%s VLAN 4k\n", str_enable_disable(enable));</div><div class='ctx'> 	return regmap_update_bits(priv-&gt;map, RTL8366RB_SGCR,</div><div class='ctx'> 				  RTL8366RB_SGCR_EN_VLAN_4KTB,</div><div class='ctx'> 				  enable ? RTL8366RB_SGCR_EN_VLAN_4KTB : 0);</div><div class='hunk'>@@ -2062,6 +1815,8 @@ static const struct dsa_switch_ops rtl8366rb_switch_ops = {</div><div class='ctx'> 	.port_fast_age = rtl8366rb_port_fast_age,</div><div class='ctx'> 	.port_change_mtu = rtl8366rb_change_mtu,</div><div class='ctx'> 	.port_max_mtu = rtl8366rb_max_mtu,</div><div class='add'>+	.port_hsr_join = dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave = dsa_port_simple_hsr_leave,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct realtek_ops rtl8366rb_ops = {</div><div class='hunk'>@@ -2144,4 +1899,4 @@ module_exit(rtl8366rb_exit);</div><div class='ctx'> MODULE_AUTHOR("Linus Walleij &lt;linus.walleij@linaro.org&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Driver for RTL8366RB ethernet switch");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_IMPORT_NS(REALTEK_DSA);</div><div class='add'>+MODULE_IMPORT_NS("REALTEK_DSA");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl8366rb.h b/drivers/net/dsa/realtek/rtl8366rb.h<br/>new file mode 100644<br/>index 000000000000..685ff3275faa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8366rb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl8366rb.h</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0+ */</div><div class='add'>+</div><div class='add'>+#ifndef _RTL8366RB_H</div><div class='add'>+#define _RTL8366RB_H</div><div class='add'>+</div><div class='add'>+#include "realtek.h"</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PORT_NUM_CPU		5</div><div class='add'>+#define RTL8366RB_NUM_PORTS		6</div><div class='add'>+#define RTL8366RB_PHY_NO_MAX		4</div><div class='add'>+#define RTL8366RB_NUM_LEDGROUPS		4</div><div class='add'>+#define RTL8366RB_PHY_ADDR_MAX		31</div><div class='add'>+</div><div class='add'>+/* LED control registers */</div><div class='add'>+/* The LED blink rate is global; it is used by all triggers in all groups. */</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_REG		0x0430</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_MASK		0x0007</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_28MS		0x0000</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_56MS		0x0001</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_84MS		0x0002</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_111MS		0x0003</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_222MS		0x0004</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_446MS		0x0005</div><div class='add'>+</div><div class='add'>+/* LED trigger event for each group */</div><div class='add'>+#define RTL8366RB_LED_CTRL_REG			0x0431</div><div class='add'>+#define RTL8366RB_LED_CTRL_OFFSET(led_group)	\</div><div class='add'>+	(4 * (led_group))</div><div class='add'>+#define RTL8366RB_LED_CTRL_MASK(led_group)	\</div><div class='add'>+	(0xf &lt;&lt; RTL8366RB_LED_CTRL_OFFSET(led_group))</div><div class='add'>+</div><div class='add'>+/* The RTL8366RB_LED_X_X registers are used to manually set the LED state only</div><div class='add'>+ * when the corresponding LED group in RTL8366RB_LED_CTRL_REG is</div><div class='add'>+ * RTL8366RB_LEDGROUP_FORCE. Otherwise, it is ignored.</div><div class='add'>+ */</div><div class='add'>+#define RTL8366RB_LED_0_1_CTRL_REG		0x0432</div><div class='add'>+#define RTL8366RB_LED_2_3_CTRL_REG		0x0433</div><div class='add'>+#define RTL8366RB_LED_X_X_CTRL_REG(led_group)	\</div><div class='add'>+	((led_group) &lt;= 1 ? \</div><div class='add'>+		RTL8366RB_LED_0_1_CTRL_REG : \</div><div class='add'>+		RTL8366RB_LED_2_3_CTRL_REG)</div><div class='add'>+#define RTL8366RB_LED_0_X_CTRL_MASK		GENMASK(5, 0)</div><div class='add'>+#define RTL8366RB_LED_X_1_CTRL_MASK		GENMASK(11, 6)</div><div class='add'>+#define RTL8366RB_LED_2_X_CTRL_MASK		GENMASK(5, 0)</div><div class='add'>+#define RTL8366RB_LED_X_3_CTRL_MASK		GENMASK(11, 6)</div><div class='add'>+</div><div class='add'>+enum rtl8366_ledgroup_mode {</div><div class='add'>+	RTL8366RB_LEDGROUP_OFF			= 0x0,</div><div class='add'>+	RTL8366RB_LEDGROUP_DUP_COL		= 0x1,</div><div class='add'>+	RTL8366RB_LEDGROUP_LINK_ACT		= 0x2,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD1000		= 0x3,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD100		= 0x4,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD10		= 0x5,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD1000_ACT		= 0x6,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD100_ACT		= 0x7,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD10_ACT		= 0x8,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD100_10_ACT	= 0x9,</div><div class='add'>+	RTL8366RB_LEDGROUP_FIBER		= 0xa,</div><div class='add'>+	RTL8366RB_LEDGROUP_AN_FAULT		= 0xb,</div><div class='add'>+	RTL8366RB_LEDGROUP_LINK_RX		= 0xc,</div><div class='add'>+	RTL8366RB_LEDGROUP_LINK_TX		= 0xd,</div><div class='add'>+	RTL8366RB_LEDGROUP_MASTER		= 0xe,</div><div class='add'>+	RTL8366RB_LEDGROUP_FORCE		= 0xf,</div><div class='add'>+</div><div class='add'>+	__RTL8366RB_LEDGROUP_MODE_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8366RB_LEDS)</div><div class='add'>+</div><div class='add'>+struct rtl8366rb_led {</div><div class='add'>+	u8 port_num;</div><div class='add'>+	u8 led_group;</div><div class='add'>+	struct realtek_priv *priv;</div><div class='add'>+	struct led_classdev cdev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int rtl8366rb_setup_leds(struct realtek_priv *priv);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline int rtl8366rb_setup_leds(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_LEDS_CLASS) */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtl8366rb - RTL8366RB-specific data</div><div class='add'>+ * @max_mtu: per-port max MTU setting</div><div class='add'>+ * @pvid_enabled: if PVID is set for respective port</div><div class='add'>+ * @leds: per-port and per-ledgroup led info</div><div class='add'>+ */</div><div class='add'>+struct rtl8366rb {</div><div class='add'>+	unsigned int max_mtu[RTL8366RB_NUM_PORTS];</div><div class='add'>+	bool pvid_enabled[RTL8366RB_NUM_PORTS];</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8366RB_LEDS)</div><div class='add'>+	struct rtl8366rb_led leds[RTL8366RB_NUM_PORTS][RTL8366RB_NUM_LEDGROUPS];</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This code is used also with LEDs disabled */</div><div class='add'>+int rb8366rb_set_ledgroup_mode(struct realtek_priv *priv,</div><div class='add'>+			       u8 led_group,</div><div class='add'>+			       enum rtl8366_ledgroup_mode mode);</div><div class='add'>+</div><div class='add'>+#endif /* _RTL8366RB_H */</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl83xx.c b/drivers/net/dsa/realtek/rtl83xx.c<br/>index 3c5018d5e1f9..2b9bd4462714 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl83xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/realtek/rtl83xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl83xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl83xx.c</a></div><div class='hunk'>@@ -25,7 +25,7 @@ void rtl83xx_lock(void *ctx)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;map_lock);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl83xx_lock, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_lock, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * rtl83xx_unlock() - Unlocks the mutex used by regmaps</div><div class='hunk'>@@ -42,7 +42,7 @@ void rtl83xx_unlock(void *ctx)</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;map_lock);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl83xx_unlock, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_unlock, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> static int rtl83xx_user_mdio_read(struct mii_bus *bus, int addr, int regnum)</div><div class='ctx'> {</div><div class='hunk'>@@ -109,7 +109,7 @@ err_put_node:</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl83xx_setup_user_mdio, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_setup_user_mdio, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * rtl83xx_probe() - probe a Realtek switch</div><div class='hunk'>@@ -208,7 +208,7 @@ rtl83xx_probe(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> 	return priv;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl83xx_probe, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_probe, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * rtl83xx_register_switch() - detects and register a switch</div><div class='hunk'>@@ -245,7 +245,7 @@ int rtl83xx_register_switch(struct realtek_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl83xx_register_switch, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_register_switch, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * rtl83xx_unregister_switch() - unregister a switch</div><div class='hunk'>@@ -262,7 +262,7 @@ void rtl83xx_unregister_switch(struct realtek_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	dsa_unregister_switch(ds);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl83xx_unregister_switch, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_unregister_switch, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * rtl83xx_shutdown() - shutdown a switch</div><div class='hunk'>@@ -283,7 +283,7 @@ void rtl83xx_shutdown(struct realtek_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	dev_set_drvdata(priv-&gt;dev, NULL);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl83xx_shutdown, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_shutdown, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * rtl83xx_remove() - Cleanup a realtek switch driver</div><div class='hunk'>@@ -297,7 +297,7 @@ EXPORT_SYMBOL_NS_GPL(rtl83xx_shutdown, REALTEK_DSA);</div><div class='ctx'> void rtl83xx_remove(struct realtek_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(rtl83xx_remove, REALTEK_DSA);</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_remove, "REALTEK_DSA");</div><div class='ctx'> </div><div class='ctx'> void rtl83xx_reset_assert(struct realtek_priv *priv)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/dsa/rzn1_a5psw.c b/drivers/net/dsa/rzn1_a5psw.c<br/>index 66974379334a..4d857e3be10b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/rzn1_a5psw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/rzn1_a5psw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/rzn1_a5psw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/rzn1_a5psw.c</a></div><div class='hunk'>@@ -337,8 +337,9 @@ static void a5psw_port_rx_block_set(struct a5psw *a5psw, int port, bool block)</div><div class='ctx'> static void a5psw_flooding_set_resolution(struct a5psw *a5psw, int port,</div><div class='ctx'> 					  bool set)</div><div class='ctx'> {</div><div class='del'>-	u8 offsets[] = {A5PSW_UCAST_DEF_MASK, A5PSW_BCAST_DEF_MASK,</div><div class='del'>-			A5PSW_MCAST_DEF_MASK};</div><div class='add'>+	static const u8 offsets[] = {</div><div class='add'>+		A5PSW_UCAST_DEF_MASK, A5PSW_BCAST_DEF_MASK, A5PSW_MCAST_DEF_MASK</div><div class='add'>+	};</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(offsets); i++)</div><div class='hunk'>@@ -1034,6 +1035,8 @@ static const struct dsa_switch_ops a5psw_switch_ops = {</div><div class='ctx'> 	.port_fdb_add = a5psw_port_fdb_add,</div><div class='ctx'> 	.port_fdb_del = a5psw_port_fdb_del,</div><div class='ctx'> 	.port_fdb_dump = a5psw_port_fdb_dump,</div><div class='add'>+	.port_hsr_join = dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave = dsa_port_simple_hsr_leave,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int a5psw_mdio_wait_busy(struct a5psw *a5psw)</div><div class='hunk'>@@ -1226,40 +1229,30 @@ static int a5psw_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	a5psw-&gt;hclk = devm_clk_get(dev, "hclk");</div><div class='add'>+	a5psw-&gt;hclk = devm_clk_get_enabled(dev, "hclk");</div><div class='ctx'> 	if (IS_ERR(a5psw-&gt;hclk)) {</div><div class='ctx'> 		dev_err(dev, "failed get hclk clock\n");</div><div class='ctx'> 		ret = PTR_ERR(a5psw-&gt;hclk);</div><div class='ctx'> 		goto free_pcs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	a5psw-&gt;clk = devm_clk_get(dev, "clk");</div><div class='add'>+	a5psw-&gt;clk = devm_clk_get_enabled(dev, "clk");</div><div class='ctx'> 	if (IS_ERR(a5psw-&gt;clk)) {</div><div class='ctx'> 		dev_err(dev, "failed get clk_switch clock\n");</div><div class='ctx'> 		ret = PTR_ERR(a5psw-&gt;clk);</div><div class='ctx'> 		goto free_pcs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = clk_prepare_enable(a5psw-&gt;clk);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto free_pcs;</div><div class='del'>-</div><div class='del'>-	ret = clk_prepare_enable(a5psw-&gt;hclk);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto clk_disable;</div><div class='del'>-</div><div class='del'>-	mdio = of_get_child_by_name(dev-&gt;of_node, "mdio");</div><div class='del'>-	if (of_device_is_available(mdio)) {</div><div class='add'>+	mdio = of_get_available_child_by_name(dev-&gt;of_node, "mdio");</div><div class='add'>+	if (mdio) {</div><div class='ctx'> 		ret = a5psw_probe_mdio(a5psw, mdio);</div><div class='add'>+		of_node_put(mdio);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			of_node_put(mdio);</div><div class='ctx'> 			dev_err(dev, "Failed to register MDIO: %d\n", ret);</div><div class='del'>-			goto hclk_disable;</div><div class='add'>+			goto free_pcs;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	of_node_put(mdio);</div><div class='del'>-</div><div class='ctx'> 	ds = &amp;a5psw-&gt;ds;</div><div class='ctx'> 	ds-&gt;dev = dev;</div><div class='ctx'> 	ds-&gt;num_ports = A5PSW_PORTS_NUM;</div><div class='hunk'>@@ -1270,15 +1263,11 @@ static int a5psw_probe(struct platform_device *pdev)</div><div class='ctx'> 	ret = dsa_register_switch(ds);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "Failed to register DSA switch: %d\n", ret);</div><div class='del'>-		goto hclk_disable;</div><div class='add'>+		goto free_pcs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-hclk_disable:</div><div class='del'>-	clk_disable_unprepare(a5psw-&gt;hclk);</div><div class='del'>-clk_disable:</div><div class='del'>-	clk_disable_unprepare(a5psw-&gt;clk);</div><div class='ctx'> free_pcs:</div><div class='ctx'> 	a5psw_pcs_free(a5psw);</div><div class='ctx'> </div><div class='hunk'>@@ -1294,8 +1283,6 @@ static void a5psw_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dsa_unregister_switch(&amp;a5psw-&gt;ds);</div><div class='ctx'> 	a5psw_pcs_free(a5psw);</div><div class='del'>-	clk_disable_unprepare(a5psw-&gt;hclk);</div><div class='del'>-	clk_disable_unprepare(a5psw-&gt;clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void a5psw_shutdown(struct platform_device *pdev)</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_ethtool.c b/drivers/net/dsa/sja1105/sja1105_ethtool.c<br/>index 2ea64b1d026d..84d7d3f66bd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_ethtool.c</a></div><div class='hunk'>@@ -571,6 +571,9 @@ void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)</div><div class='ctx'> 		max_ctr = __MAX_SJA1105PQRS_PORT_COUNTER;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; max_ctr; i++) {</div><div class='add'>+		if (!strlen(sja1105_port_counters[i].name))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		rc = sja1105_port_counter_read(priv, port, i, &amp;data[k++]);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			dev_err(ds-&gt;dev,</div><div class='hunk'>@@ -596,8 +599,12 @@ void sja1105_get_strings(struct dsa_switch *ds, int port,</div><div class='ctx'> 	else</div><div class='ctx'> 		max_ctr = __MAX_SJA1105PQRS_PORT_COUNTER;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; max_ctr; i++)</div><div class='add'>+	for (i = 0; i &lt; max_ctr; i++) {</div><div class='add'>+		if (!strlen(sja1105_port_counters[i].name))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		ethtool_puts(&amp;data, sja1105_port_counters[i].name);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_main.c b/drivers/net/dsa/sja1105/sja1105_main.c<br/>index f8454f3b6f9c..aa2145cf29a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_main.c</a></div><div class='hunk'>@@ -1302,14 +1302,7 @@ static int sja1105_set_port_speed(struct sja1105_private *priv, int port,</div><div class='ctx'> 	 * table, since this will be used for the clocking setup, and we no</div><div class='ctx'> 	 * longer need to store it in the static config (already told hardware</div><div class='ctx'> 	 * we want auto during upload phase).</div><div class='del'>-	 * Actually for the SGMII port, the MAC is fixed at 1 Gbps and</div><div class='del'>-	 * we need to configure the PCS only (if even that).</div><div class='ctx'> 	 */</div><div class='del'>-	if (priv-&gt;phy_mode[port] == PHY_INTERFACE_MODE_SGMII)</div><div class='del'>-		speed = priv-&gt;info-&gt;port_speed[SJA1105_SPEED_1000MBPS];</div><div class='del'>-	else if (priv-&gt;phy_mode[port] == PHY_INTERFACE_MODE_2500BASEX)</div><div class='del'>-		speed = priv-&gt;info-&gt;port_speed[SJA1105_SPEED_2500MBPS];</div><div class='del'>-</div><div class='ctx'> 	mac[port].speed = speed;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2081,6 +2074,7 @@ static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,</div><div class='ctx'> 	switch (state) {</div><div class='ctx'> 	case BR_STATE_DISABLED:</div><div class='ctx'> 	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='ctx'> 		/* From UM10944 description of DRPDTAG (why put this there?):</div><div class='ctx'> 		 * "Management traffic flows to the port regardless of the state</div><div class='ctx'> 		 * of the INGRESS flag". So BPDUs are still be allowed to pass.</div><div class='hunk'>@@ -2090,11 +2084,6 @@ static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,</div><div class='ctx'> 		mac[port].egress    = false;</div><div class='ctx'> 		mac[port].dyn_learn = false;</div><div class='ctx'> 		break;</div><div class='del'>-	case BR_STATE_LISTENING:</div><div class='del'>-		mac[port].ingress   = true;</div><div class='del'>-		mac[port].egress    = false;</div><div class='del'>-		mac[port].dyn_learn = false;</div><div class='del'>-		break;</div><div class='ctx'> 	case BR_STATE_LEARNING:</div><div class='ctx'> 		mac[port].ingress   = true;</div><div class='ctx'> 		mac[port].egress    = false;</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_mdio.c b/drivers/net/dsa/sja1105/sja1105_mdio.c<br/>index 84b7169f2974..8d535c033cef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_mdio.c</a></div><div class='hunk'>@@ -468,13 +468,10 @@ int sja1105_mdiobus_register(struct dsa_switch *ds)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	mdio_node = of_get_child_by_name(switch_node, "mdios");</div><div class='add'>+	mdio_node = of_get_available_child_by_name(switch_node, "mdios");</div><div class='ctx'> 	if (!mdio_node)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (!of_device_is_available(mdio_node))</div><div class='del'>-		goto out_put_mdio_node;</div><div class='del'>-</div><div class='ctx'> 	if (regs-&gt;mdio_100base_tx != SJA1105_RSV_ADDR) {</div><div class='ctx'> 		rc = sja1105_mdiobus_base_tx_register(priv, mdio_node);</div><div class='ctx'> 		if (rc)</div><div class='hunk'>@@ -487,7 +484,6 @@ int sja1105_mdiobus_register(struct dsa_switch *ds)</div><div class='ctx'> 			goto err_free_base_tx_mdiobus;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-out_put_mdio_node:</div><div class='ctx'> 	of_node_put(mdio_node);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_ptp.c b/drivers/net/dsa/sja1105/sja1105_ptp.c<br/>index a1f4ca6ad888..fefe46e2a5e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_ptp.c</a></div><div class='hunk'>@@ -58,56 +58,60 @@ enum sja1105_ptp_clk_mode {</div><div class='ctx'> #define ptp_data_to_sja1105(d) \</div><div class='ctx'> 		container_of((d), struct sja1105_private, ptp_data)</div><div class='ctx'> </div><div class='del'>-int sja1105_hwtstamp_set(struct dsa_switch *ds, int port, struct ifreq *ifr)</div><div class='add'>+int sja1105_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct kernel_hwtstamp_config *config,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct sja1105_private *priv = ds-&gt;priv;</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	unsigned long hwts_tx_en, hwts_rx_en;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	hwts_tx_en = priv-&gt;hwts_tx_en;</div><div class='add'>+	hwts_rx_en = priv-&gt;hwts_rx_en;</div><div class='ctx'> </div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='del'>-		priv-&gt;hwts_tx_en &amp;= ~BIT(port);</div><div class='add'>+		hwts_tx_en &amp;= ~BIT(port);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='del'>-		priv-&gt;hwts_tx_en |= BIT(port);</div><div class='add'>+		hwts_tx_en |= BIT(port);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='del'>-		priv-&gt;hwts_rx_en &amp;= ~BIT(port);</div><div class='add'>+		hwts_rx_en &amp;= ~BIT(port);</div><div class='ctx'> 		break;</div><div class='del'>-	default:</div><div class='del'>-		priv-&gt;hwts_rx_en |= BIT(port);</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+		hwts_rx_en |= BIT(port);</div><div class='ctx'> 		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	priv-&gt;hwts_tx_en = hwts_tx_en;</div><div class='add'>+	priv-&gt;hwts_rx_en = hwts_rx_en;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int sja1105_hwtstamp_get(struct dsa_switch *ds, int port, struct ifreq *ifr)</div><div class='add'>+int sja1105_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct sja1105_private *priv = ds-&gt;priv;</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> </div><div class='del'>-	config.flags = 0;</div><div class='add'>+	config-&gt;flags = 0;</div><div class='ctx'> 	if (priv-&gt;hwts_tx_en &amp; BIT(port))</div><div class='del'>-		config.tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='ctx'> 	else</div><div class='del'>-		config.tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='ctx'> 	if (priv-&gt;hwts_rx_en &amp; BIT(port))</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='ctx'> 	else</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int sja1105_get_ts_info(struct dsa_switch *ds, int port,</div><div class='hunk'>@@ -727,10 +731,6 @@ static int sja1105_per_out_enable(struct sja1105_private *priv,</div><div class='ctx'> 	if (perout-&gt;index != 0)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-	if (perout-&gt;flags)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_PEROUT);</div><div class='hunk'>@@ -810,13 +810,6 @@ static int sja1105_extts_enable(struct sja1105_private *priv,</div><div class='ctx'> 	if (extts-&gt;index != 0)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-	if (extts-&gt;flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-			     PTP_RISING_EDGE |</div><div class='del'>-			     PTP_FALLING_EDGE |</div><div class='del'>-			     PTP_STRICT_FLAGS))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	/* We can only enable time stamping on both edges, sadly. */</div><div class='ctx'> 	if ((extts-&gt;flags &amp; PTP_STRICT_FLAGS) &amp;&amp;</div><div class='ctx'> 	    (extts-&gt;flags &amp; PTP_ENABLE_FEATURE) &amp;&amp;</div><div class='hunk'>@@ -832,7 +825,7 @@ static int sja1105_extts_enable(struct sja1105_private *priv,</div><div class='ctx'> 	if (on)</div><div class='ctx'> 		sja1105_ptp_extts_setup_timer(&amp;priv-&gt;ptp_data);</div><div class='ctx'> 	else</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;ptp_data.extts_timer);</div><div class='add'>+		timer_delete_sync(&amp;priv-&gt;ptp_data.extts_timer);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -902,6 +895,9 @@ int sja1105_ptp_clock_register(struct dsa_switch *ds)</div><div class='ctx'> 		.n_pins		= 1,</div><div class='ctx'> 		.n_ext_ts	= 1,</div><div class='ctx'> 		.n_per_out	= 1,</div><div class='add'>+		.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+					 PTP_FALLING_EDGE |</div><div class='add'>+					 PTP_STRICT_FLAGS,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	/* Only used on SJA1105 */</div><div class='hunk'>@@ -929,7 +925,7 @@ void sja1105_ptp_clock_unregister(struct dsa_switch *ds)</div><div class='ctx'> 	if (IS_ERR_OR_NULL(ptp_data-&gt;clock))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ptp_data-&gt;extts_timer);</div><div class='add'>+	timer_delete_sync(&amp;ptp_data-&gt;extts_timer);</div><div class='ctx'> 	ptp_cancel_worker_sync(ptp_data-&gt;clock);</div><div class='ctx'> 	skb_queue_purge(&amp;ptp_data-&gt;skb_txtstamp_queue);</div><div class='ctx'> 	skb_queue_purge(&amp;ptp_data-&gt;skb_rxtstamp_queue);</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_ptp.h b/drivers/net/dsa/sja1105/sja1105_ptp.h<br/>index 8add2bd5f728..325e3777ea07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_ptp.h</a></div><div class='hunk'>@@ -112,9 +112,12 @@ bool sja1105_port_rxtstamp(struct dsa_switch *ds, int port,</div><div class='ctx'> void sja1105_port_txtstamp(struct dsa_switch *ds, int port,</div><div class='ctx'> 			   struct sk_buff *skb);</div><div class='ctx'> </div><div class='del'>-int sja1105_hwtstamp_get(struct dsa_switch *ds, int port, struct ifreq *ifr);</div><div class='add'>+int sja1105_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct kernel_hwtstamp_config *config);</div><div class='ctx'> </div><div class='del'>-int sja1105_hwtstamp_set(struct dsa_switch *ds, int port, struct ifreq *ifr);</div><div class='add'>+int sja1105_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct kernel_hwtstamp_config *config,</div><div class='add'>+			 struct netlink_ext_ack *extack);</div><div class='ctx'> </div><div class='ctx'> int __sja1105_ptp_gettimex(struct dsa_switch *ds, u64 *ns,</div><div class='ctx'> 			   struct ptp_system_timestamp *sts);</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_static_config.c b/drivers/net/dsa/sja1105/sja1105_static_config.c<br/>index baba204ad62f..ffece8a400a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_static_config.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_static_config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_static_config.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_static_config.c</a></div><div class='hunk'>@@ -26,12 +26,8 @@ void sja1105_pack(void *buf, const u64 *val, int start, int end, size_t len)</div><div class='ctx'> 		pr_err("Start bit (%d) expected to be larger than end (%d)\n",</div><div class='ctx'> 		       start, end);</div><div class='ctx'> 	} else if (rc == -ERANGE) {</div><div class='del'>-		if ((start - end + 1) &gt; 64)</div><div class='del'>-			pr_err("Field %d-%d too large for 64 bits!\n",</div><div class='del'>-			       start, end);</div><div class='del'>-		else</div><div class='del'>-			pr_err("Cannot store %llx inside bits %d-%d (would truncate)\n",</div><div class='del'>-			       *val, start, end);</div><div class='add'>+		pr_err("Field %d-%d too large for 64 bits!\n",</div><div class='add'>+		       start, end);</div><div class='ctx'> 	}</div><div class='ctx'> 	dump_stack();</div><div class='ctx'> }</div><div class='hunk'>@@ -1921,8 +1917,10 @@ int sja1105_table_delete_entry(struct sja1105_table *table, int i)</div><div class='ctx'> 	if (i &gt; table-&gt;entry_count)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='del'>-	memmove(entries + i * entry_size, entries + (i + 1) * entry_size,</div><div class='del'>-		(table-&gt;entry_count - i) * entry_size);</div><div class='add'>+	if (i + 1 &lt; table-&gt;entry_count) {</div><div class='add'>+		memmove(entries + i * entry_size, entries + (i + 1) * entry_size,</div><div class='add'>+			(table-&gt;entry_count - i - 1) * entry_size);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	table-&gt;entry_count--;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_tas.c b/drivers/net/dsa/sja1105/sja1105_tas.c<br/>index d7818710bc02..d5949d2c3e71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_tas.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/sja1105/sja1105_tas.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_tas.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_tas.c</a></div><div class='hunk'>@@ -775,9 +775,8 @@ static void sja1105_tas_state_machine(struct work_struct *work)</div><div class='ctx'> 		base_time_ts = ns_to_timespec64(base_time);</div><div class='ctx'> 		now_ts = ns_to_timespec64(now);</div><div class='ctx'> </div><div class='del'>-		dev_dbg(ds-&gt;dev, "OPER base time %lld.%09ld (now %lld.%09ld)\n",</div><div class='del'>-			base_time_ts.tv_sec, base_time_ts.tv_nsec,</div><div class='del'>-			now_ts.tv_sec, now_ts.tv_nsec);</div><div class='add'>+		dev_dbg(ds-&gt;dev, "OPER base time %ptSp (now %ptSp)\n",</div><div class='add'>+			&amp;base_time_ts, &amp;now_ts);</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -798,8 +797,7 @@ static void sja1105_tas_state_machine(struct work_struct *work)</div><div class='ctx'> 		if (now &lt; tas_data-&gt;oper_base_time) {</div><div class='ctx'> 			/* TAS has not started yet */</div><div class='ctx'> 			diff = ns_to_timespec64(tas_data-&gt;oper_base_time - now);</div><div class='del'>-			dev_dbg(ds-&gt;dev, "time to start: [%lld.%09ld]",</div><div class='del'>-				diff.tv_sec, diff.tv_nsec);</div><div class='add'>+			dev_dbg(ds-&gt;dev, "time to start: [%ptSp]", &amp;diff);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/dsa/vitesse-vsc73xx-core.c b/drivers/net/dsa/vitesse-vsc73xx-core.c<br/>index f18aa321053d..9d31b8258268 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/vitesse-vsc73xx-core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/vitesse-vsc73xx-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/vitesse-vsc73xx-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/vitesse-vsc73xx-core.c</a></div><div class='hunk'>@@ -2258,14 +2258,14 @@ static int vsc73xx_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='ctx'> 	return !!(val &amp; BIT(offset));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void vsc73xx_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='del'>-			     int val)</div><div class='add'>+static int vsc73xx_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			    int val)</div><div class='ctx'> {</div><div class='ctx'> 	struct vsc73xx *vsc = gpiochip_get_data(chip);</div><div class='ctx'> 	u32 tmp = val ? BIT(offset) : 0;</div><div class='ctx'> </div><div class='del'>-	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_SYSTEM, 0,</div><div class='del'>-			    VSC73XX_GPIO, BIT(offset), tmp);</div><div class='add'>+	return vsc73xx_update_bits(vsc, VSC73XX_BLOCK_SYSTEM, 0,</div><div class='add'>+				   VSC73XX_GPIO, BIT(offset), tmp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vsc73xx_gpio_direction_output(struct gpio_chip *chip,</div><div class='head'>diff --git a/drivers/net/dsa/xrs700x/xrs700x.c b/drivers/net/dsa/xrs700x/xrs700x.c<br/>index 4dbcc49a9e52..0a05f4156ef4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/xrs700x/xrs700x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dsa/xrs700x/xrs700x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/xrs700x/xrs700x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/xrs700x/xrs700x.c</a></div><div class='hunk'>@@ -566,6 +566,7 @@ static int xrs700x_hsr_join(struct dsa_switch *ds, int port,</div><div class='ctx'> 	struct xrs700x *priv = ds-&gt;priv;</div><div class='ctx'> 	struct net_device *user;</div><div class='ctx'> 	int ret, i, hsr_pair[2];</div><div class='add'>+	enum hsr_port_type type;</div><div class='ctx'> 	enum hsr_version ver;</div><div class='ctx'> 	bool fwd = false;</div><div class='ctx'> </div><div class='hunk'>@@ -589,6 +590,16 @@ static int xrs700x_hsr_join(struct dsa_switch *ds, int port,</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = hsr_get_port_type(hsr, dsa_to_port(ds, port)-&gt;user, &amp;type);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (type != HSR_PT_SLAVE_A &amp;&amp; type != HSR_PT_SLAVE_B) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Only HSR slave ports can be offloaded");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	dsa_hsr_foreach_port(dp, ds, hsr) {</div><div class='ctx'> 		if (dp-&gt;index != port) {</div><div class='ctx'> 			partner = dp;</div><div class='head'>diff --git a/drivers/net/dsa/yt921x.c b/drivers/net/dsa/yt921x.c<br/>new file mode 100644<br/>index 000000000000..1c511f5dc6ab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/yt921x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/yt921x.c</a></div><div class='hunk'>@@ -0,0 +1,3006 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Driver for Motorcomm YT921x Switch</div><div class='add'>+ *</div><div class='add'>+ * Should work on YT9213/YT9214/YT9215/YT9218, but only tested on YT9215+SGMII,</div><div class='add'>+ * be sure to do your own checks before porting to another chip.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025 David Yang</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_hsr.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "yt921x.h"</div><div class='add'>+</div><div class='add'>+struct yt921x_mib_desc {</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MIB_DESC(_size, _offset, _name) \</div><div class='add'>+	{_size, _offset, _name}</div><div class='add'>+</div><div class='add'>+/* Must agree with yt921x_mib</div><div class='add'>+ *</div><div class='add'>+ * Unstructured fields (name != NULL) will appear in get_ethtool_stats(),</div><div class='add'>+ * structured go to their *_stats() methods, but we need their sizes and offsets</div><div class='add'>+ * to perform 32bit MIB overflow wraparound.</div><div class='add'>+ */</div><div class='add'>+static const struct yt921x_mib_desc yt921x_mib_descs[] = {</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_BROADCAST, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PAUSE, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_MULTICAST, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_CRC_ERR, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_ALIGN_ERR, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_UNDERSIZE_ERR, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_FRAG_ERR, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_64, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_65_TO_127, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_128_TO_255, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_256_TO_511, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_512_TO_1023, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_1024_TO_1518, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_1519_TO_MAX, NULL),</div><div class='add'>+	MIB_DESC(2, YT921X_MIB_DATA_RX_GOOD_BYTES, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(2, YT921X_MIB_DATA_RX_BAD_BYTES, "RxBadBytes"),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_OVERSIZE_ERR, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_DROPPED, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_BROADCAST, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PAUSE, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_MULTICAST, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_UNDERSIZE_ERR, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_64, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_65_TO_127, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_128_TO_255, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_256_TO_511, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_512_TO_1023, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_1024_TO_1518, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_1519_TO_MAX, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(2, YT921X_MIB_DATA_TX_GOOD_BYTES, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_COLLISION, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_EXCESSIVE_COLLISION, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_MULTIPLE_COLLISION, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_SINGLE_COLLISION, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_DEFERRED, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_LATE_COLLISION, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_OAM, "RxOAM"),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_OAM, "TxOAM"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct yt921x_info {</div><div class='add'>+	const char *name;</div><div class='add'>+	u16 major;</div><div class='add'>+	/* Unknown, seems to be plain enumeration */</div><div class='add'>+	u8 mode;</div><div class='add'>+	u8 extmode;</div><div class='add'>+	/* Ports with integral GbE PHYs, not including MCU Port 10 */</div><div class='add'>+	u16 internal_mask;</div><div class='add'>+	/* TODO: see comments in yt921x_dsa_phylink_get_caps() */</div><div class='add'>+	u16 external_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define YT921X_PORT_MASK_INTn(port)	BIT(port)</div><div class='add'>+#define YT921X_PORT_MASK_INT0_n(n)	GENMASK((n) - 1, 0)</div><div class='add'>+#define YT921X_PORT_MASK_EXT0		BIT(8)</div><div class='add'>+#define YT921X_PORT_MASK_EXT1		BIT(9)</div><div class='add'>+</div><div class='add'>+static const struct yt921x_info yt921x_infos[] = {</div><div class='add'>+	{</div><div class='add'>+		"YT9215SC", YT9215_MAJOR, 1, 0,</div><div class='add'>+		YT921X_PORT_MASK_INT0_n(5),</div><div class='add'>+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9215S", YT9215_MAJOR, 2, 0,</div><div class='add'>+		YT921X_PORT_MASK_INT0_n(5),</div><div class='add'>+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9215RB", YT9215_MAJOR, 3, 0,</div><div class='add'>+		YT921X_PORT_MASK_INT0_n(5),</div><div class='add'>+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9214NB", YT9215_MAJOR, 3, 2,</div><div class='add'>+		YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3),</div><div class='add'>+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9213NB", YT9215_MAJOR, 3, 3,</div><div class='add'>+		YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3),</div><div class='add'>+		YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9218N", YT9218_MAJOR, 0, 0,</div><div class='add'>+		YT921X_PORT_MASK_INT0_n(8),</div><div class='add'>+		0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9218MB", YT9218_MAJOR, 1, 0,</div><div class='add'>+		YT921X_PORT_MASK_INT0_n(8),</div><div class='add'>+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define YT921X_NAME	"yt921x"</div><div class='add'>+</div><div class='add'>+#define YT921X_VID_UNWARE	4095</div><div class='add'>+</div><div class='add'>+#define YT921X_POLL_SLEEP_US	10000</div><div class='add'>+#define YT921X_POLL_TIMEOUT_US	100000</div><div class='add'>+</div><div class='add'>+/* The interval should be small enough to avoid overflow of 32bit MIBs.</div><div class='add'>+ *</div><div class='add'>+ * Until we can read MIBs from stats64 call directly (i.e. sleep</div><div class='add'>+ * there), we have to poll stats more frequently then it is actually needed.</div><div class='add'>+ * For overflow protection, normally, 100 sec interval should have been OK.</div><div class='add'>+ */</div><div class='add'>+#define YT921X_STATS_INTERVAL_JIFFIES	(3 * HZ)</div><div class='add'>+</div><div class='add'>+struct yt921x_reg_mdio {</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int addr;</div><div class='add'>+	/* SWITCH_ID_1 / SWITCH_ID_0 of the device</div><div class='add'>+	 *</div><div class='add'>+	 * This is a way to multiplex multiple devices on the same MII phyaddr</div><div class='add'>+	 * and should be configurable in DT. However, MDIO core simply doesn't</div><div class='add'>+	 * allow multiple devices over one reg addr, so this is a fixed value</div><div class='add'>+	 * for now until a solution is found.</div><div class='add'>+	 *</div><div class='add'>+	 * Keep this because we need switchid to form MII regaddrs anyway.</div><div class='add'>+	 */</div><div class='add'>+	unsigned char switchid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TODO: SPI/I2C */</div><div class='add'>+</div><div class='add'>+#define to_yt921x_priv(_ds) container_of_const(_ds, struct yt921x_priv, ds)</div><div class='add'>+#define to_device(priv) ((priv)-&gt;ds.dev)</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_read(struct yt921x_priv *priv, u32 reg, u32 *valp)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(!mutex_is_locked(&amp;priv-&gt;reg_lock));</div><div class='add'>+</div><div class='add'>+	return priv-&gt;reg_ops-&gt;read(priv-&gt;reg_ctx, reg, valp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_write(struct yt921x_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(!mutex_is_locked(&amp;priv-&gt;reg_lock));</div><div class='add'>+</div><div class='add'>+	return priv-&gt;reg_ops-&gt;write(priv-&gt;reg_ctx, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_reg_wait(struct yt921x_priv *priv, u32 reg, u32 mask, u32 *valp)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = read_poll_timeout(yt921x_reg_read, res,</div><div class='add'>+				res || (val &amp; mask) == *valp,</div><div class='add'>+				YT921X_POLL_SLEEP_US, YT921X_POLL_TIMEOUT_US,</div><div class='add'>+				false, priv, reg, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	*valp = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_reg_update_bits(struct yt921x_priv *priv, u32 reg, u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+	u32 v;</div><div class='add'>+	u32 u;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, reg, &amp;v);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	u = v;</div><div class='add'>+	u &amp;= ~mask;</div><div class='add'>+	u |= val;</div><div class='add'>+	if (u == v)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_reg_write(priv, reg, u);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_set_bits(struct yt921x_priv *priv, u32 reg, u32 mask)</div><div class='add'>+{</div><div class='add'>+	return yt921x_reg_update_bits(priv, reg, 0, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_clear_bits(struct yt921x_priv *priv, u32 reg, u32 mask)</div><div class='add'>+{</div><div class='add'>+	return yt921x_reg_update_bits(priv, reg, mask, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_reg_toggle_bits(struct yt921x_priv *priv, u32 reg, u32 mask, bool set)</div><div class='add'>+{</div><div class='add'>+	return yt921x_reg_update_bits(priv, reg, mask, !set ? 0 : mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Some registers, like VLANn_CTRL, should always be written in 64-bit, even if</div><div class='add'>+ * you are to write only the lower / upper 32 bits.</div><div class='add'>+ *</div><div class='add'>+ * There is no such restriction for reading, but we still provide 64-bit read</div><div class='add'>+ * wrappers so that we always handle u64 values.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int yt921x_reg64_read(struct yt921x_priv *priv, u32 reg, u64 *valp)</div><div class='add'>+{</div><div class='add'>+	u32 lo;</div><div class='add'>+	u32 hi;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, reg, &amp;lo);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_read(priv, reg + 4, &amp;hi);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	*valp = ((u64)hi &lt;&lt; 32) | lo;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg64_write(struct yt921x_priv *priv, u32 reg, u64 val)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_write(priv, reg, (u32)val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	return yt921x_reg_write(priv, reg + 4, (u32)(val &gt;&gt; 32));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_reg64_update_bits(struct yt921x_priv *priv, u32 reg, u64 mask, u64 val)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+	u64 v;</div><div class='add'>+	u64 u;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg64_read(priv, reg, &amp;v);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	u = v;</div><div class='add'>+	u &amp;= ~mask;</div><div class='add'>+	u |= val;</div><div class='add'>+	if (u == v)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_reg64_write(priv, reg, u);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg64_clear_bits(struct yt921x_priv *priv, u32 reg, u64 mask)</div><div class='add'>+{</div><div class='add'>+	return yt921x_reg64_update_bits(priv, reg, mask, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_mdio_read(void *context, u32 reg, u32 *valp)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_reg_mdio *mdio = context;</div><div class='add'>+	struct mii_bus *bus = mdio-&gt;bus;</div><div class='add'>+	int addr = mdio-&gt;addr;</div><div class='add'>+	u32 reg_addr;</div><div class='add'>+	u32 reg_data;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Hold the mdio bus lock to avoid (un)locking for 4 times */</div><div class='add'>+	mutex_lock_nested(&amp;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	reg_addr = YT921X_SMI_SWITCHID(mdio-&gt;switchid) | YT921X_SMI_ADDR |</div><div class='add'>+		   YT921X_SMI_READ;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_addr, (u16)(reg &gt;&gt; 16));</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_addr, (u16)reg);</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	reg_data = YT921X_SMI_SWITCHID(mdio-&gt;switchid) | YT921X_SMI_DATA |</div><div class='add'>+		   YT921X_SMI_READ;</div><div class='add'>+	res = __mdiobus_read(bus, addr, reg_data);</div><div class='add'>+	if (res &lt; 0)</div><div class='add'>+		goto end;</div><div class='add'>+	val = (u16)res;</div><div class='add'>+	res = __mdiobus_read(bus, addr, reg_data);</div><div class='add'>+	if (res &lt; 0)</div><div class='add'>+		goto end;</div><div class='add'>+	val = (val &lt;&lt; 16) | (u16)res;</div><div class='add'>+</div><div class='add'>+	*valp = val;</div><div class='add'>+	res = 0;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_mdio_write(void *context, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_reg_mdio *mdio = context;</div><div class='add'>+	struct mii_bus *bus = mdio-&gt;bus;</div><div class='add'>+	int addr = mdio-&gt;addr;</div><div class='add'>+	u32 reg_addr;</div><div class='add'>+	u32 reg_data;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	reg_addr = YT921X_SMI_SWITCHID(mdio-&gt;switchid) | YT921X_SMI_ADDR |</div><div class='add'>+		   YT921X_SMI_WRITE;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_addr, (u16)(reg &gt;&gt; 16));</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_addr, (u16)reg);</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	reg_data = YT921X_SMI_SWITCHID(mdio-&gt;switchid) | YT921X_SMI_DATA |</div><div class='add'>+		   YT921X_SMI_WRITE;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_data, (u16)(val &gt;&gt; 16));</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_data, (u16)val);</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	res = 0;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct yt921x_reg_ops yt921x_reg_ops_mdio = {</div><div class='add'>+	.read = yt921x_reg_mdio_read,</div><div class='add'>+	.write = yt921x_reg_mdio_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TODO: SPI/I2C */</div><div class='add'>+</div><div class='add'>+static int yt921x_intif_wait(struct yt921x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_reg_wait(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START,</div><div class='add'>+			       &amp;val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_intif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M |</div><div class='add'>+	       YT921X_MBUS_CTRL_OP_M;</div><div class='add'>+	ctrl = YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) |</div><div class='add'>+	       YT921X_MBUS_CTRL_READ;</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_intif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_INT_MBUS_DIN, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if ((u16)val != val)</div><div class='add'>+		dev_info(dev,</div><div class='add'>+			 "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n",</div><div class='add'>+			 __func__, port, reg, val);</div><div class='add'>+	*valp = (u16)val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_intif_write(struct yt921x_priv *priv, int port, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_intif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M |</div><div class='add'>+	       YT921X_MBUS_CTRL_OP_M;</div><div class='add'>+	ctrl = YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) |</div><div class='add'>+	       YT921X_MBUS_CTRL_WRITE;</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_INT_MBUS_DOUT, val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return yt921x_intif_wait(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_mbus_int_read(struct mii_bus *mbus, int port, int reg)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mbus-&gt;priv;</div><div class='add'>+	u16 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (port &gt;= YT921X_PORT_NUM)</div><div class='add'>+		return U16_MAX;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_intif_read(priv, port, reg, &amp;val);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mbus_int_write(struct mii_bus *mbus, int port, int reg, u16 data)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mbus-&gt;priv;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (port &gt;= YT921X_PORT_NUM)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_intif_write(priv, port, reg, data);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mbus_int_init(struct yt921x_priv *priv, struct device_node *mnp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	struct mii_bus *mbus;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mbus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!mbus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mbus-&gt;name = "YT921x internal MDIO bus";</div><div class='add'>+	snprintf(mbus-&gt;id, MII_BUS_ID_SIZE, "%s", dev_name(dev));</div><div class='add'>+	mbus-&gt;priv = priv;</div><div class='add'>+	mbus-&gt;read = yt921x_mbus_int_read;</div><div class='add'>+	mbus-&gt;write = yt921x_mbus_int_write;</div><div class='add'>+	mbus-&gt;parent = dev;</div><div class='add'>+	mbus-&gt;phy_mask = (u32)~GENMASK(YT921X_PORT_NUM - 1, 0);</div><div class='add'>+</div><div class='add'>+	res = devm_of_mdiobus_register(dev, mbus, mnp);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mbus_int = mbus;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_extif_wait(struct yt921x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_reg_wait(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START,</div><div class='add'>+			       &amp;val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_extif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_extif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M |</div><div class='add'>+	       YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M;</div><div class='add'>+	ctrl = YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) |</div><div class='add'>+	       YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_READ;</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_extif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_EXT_MBUS_DIN, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if ((u16)val != val)</div><div class='add'>+		dev_info(dev,</div><div class='add'>+			 "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n",</div><div class='add'>+			 __func__, port, reg, val);</div><div class='add'>+	*valp = (u16)val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_extif_write(struct yt921x_priv *priv, int port, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_extif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M |</div><div class='add'>+	       YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M;</div><div class='add'>+	ctrl = YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) |</div><div class='add'>+	       YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_WRITE;</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_EXT_MBUS_DOUT, val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return yt921x_extif_wait(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_mbus_ext_read(struct mii_bus *mbus, int port, int reg)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mbus-&gt;priv;</div><div class='add'>+	u16 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_extif_read(priv, port, reg, &amp;val);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mbus_ext_write(struct mii_bus *mbus, int port, int reg, u16 data)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mbus-&gt;priv;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_extif_write(priv, port, reg, data);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mbus_ext_init(struct yt921x_priv *priv, struct device_node *mnp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	struct mii_bus *mbus;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mbus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!mbus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mbus-&gt;name = "YT921x external MDIO bus";</div><div class='add'>+	snprintf(mbus-&gt;id, MII_BUS_ID_SIZE, "%s@ext", dev_name(dev));</div><div class='add'>+	mbus-&gt;priv = priv;</div><div class='add'>+	/* TODO: c45? */</div><div class='add'>+	mbus-&gt;read = yt921x_mbus_ext_read;</div><div class='add'>+	mbus-&gt;write = yt921x_mbus_ext_write;</div><div class='add'>+	mbus-&gt;parent = dev;</div><div class='add'>+</div><div class='add'>+	res = devm_of_mdiobus_register(dev, mbus, mnp);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mbus_ext = mbus;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Read and handle overflow of 32bit MIBs. MIB buffer must be zeroed before. */</div><div class='add'>+static int yt921x_read_mib(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+	int res = 0;</div><div class='add'>+</div><div class='add'>+	/* Reading of yt921x_port::mib is not protected by a lock and it's vain</div><div class='add'>+	 * to keep its consistency, since we have to read registers one by one</div><div class='add'>+	 * and there is no way to make a snapshot of MIB stats.</div><div class='add'>+	 *</div><div class='add'>+	 * Writing (by this function only) is and should be protected by</div><div class='add'>+	 * reg_lock.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(yt921x_mib_descs); i++) {</div><div class='add'>+		const struct yt921x_mib_desc *desc = &amp;yt921x_mib_descs[i];</div><div class='add'>+		u32 reg = YT921X_MIBn_DATA0(port) + desc-&gt;offset;</div><div class='add'>+		u64 *valp = &amp;((u64 *)mib)[i];</div><div class='add'>+		u64 val = *valp;</div><div class='add'>+		u32 val0;</div><div class='add'>+		u32 val1;</div><div class='add'>+</div><div class='add'>+		res = yt921x_reg_read(priv, reg, &amp;val0);</div><div class='add'>+		if (res)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (desc-&gt;size &lt;= 1) {</div><div class='add'>+			if (val &lt; (u32)val)</div><div class='add'>+				/* overflow */</div><div class='add'>+				val += (u64)U32_MAX + 1;</div><div class='add'>+			val &amp;= ~U32_MAX;</div><div class='add'>+			val |= val0;</div><div class='add'>+		} else {</div><div class='add'>+			res = yt921x_reg_read(priv, reg + 4, &amp;val1);</div><div class='add'>+			if (res)</div><div class='add'>+				break;</div><div class='add'>+			val = ((u64)val1 &lt;&lt; 32) | val0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		WRITE_ONCE(*valp, val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pp-&gt;rx_frames = mib-&gt;rx_64byte + mib-&gt;rx_65_127byte +</div><div class='add'>+			mib-&gt;rx_128_255byte + mib-&gt;rx_256_511byte +</div><div class='add'>+			mib-&gt;rx_512_1023byte + mib-&gt;rx_1024_1518byte +</div><div class='add'>+			mib-&gt;rx_jumbo;</div><div class='add'>+	pp-&gt;tx_frames = mib-&gt;tx_64byte + mib-&gt;tx_65_127byte +</div><div class='add'>+			mib-&gt;tx_128_255byte + mib-&gt;tx_256_511byte +</div><div class='add'>+			mib-&gt;tx_512_1023byte + mib-&gt;tx_1024_1518byte +</div><div class='add'>+			mib-&gt;tx_jumbo;</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dev, "Failed to %s port %d: %i\n", "read stats for",</div><div class='add'>+			port, res);</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void yt921x_poll_mib(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_port *pp = container_of_const(work, struct yt921x_port,</div><div class='add'>+						    mib_read.work);</div><div class='add'>+	struct yt921x_priv *priv = (void *)(pp - pp-&gt;index) -</div><div class='add'>+				   offsetof(struct yt921x_priv, ports);</div><div class='add'>+	unsigned long delay = YT921X_STATS_INTERVAL_JIFFIES;</div><div class='add'>+	int port = pp-&gt;index;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	if (res)</div><div class='add'>+		delay *= 4;</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;pp-&gt;mib_read, delay);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+		       uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(yt921x_mib_descs); i++) {</div><div class='add'>+		const struct yt921x_mib_desc *desc = &amp;yt921x_mib_descs[i];</div><div class='add'>+</div><div class='add'>+		if (desc-&gt;name)</div><div class='add'>+			ethtool_puts(&amp;data, desc-&gt;name);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+	size_t j;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	j = 0;</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(yt921x_mib_descs); i++) {</div><div class='add'>+		const struct yt921x_mib_desc *desc = &amp;yt921x_mib_descs[i];</div><div class='add'>+</div><div class='add'>+		if (!desc-&gt;name)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		data[j] = ((u64 *)mib)[i];</div><div class='add'>+		j++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_dsa_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	int cnt = 0;</div><div class='add'>+</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(yt921x_mib_descs); i++) {</div><div class='add'>+		const struct yt921x_mib_desc *desc = &amp;yt921x_mib_descs[i];</div><div class='add'>+</div><div class='add'>+		if (desc-&gt;name)</div><div class='add'>+			cnt++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_eth_mac_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK = pp-&gt;tx_frames;</div><div class='add'>+	mac_stats-&gt;SingleCollisionFrames = mib-&gt;tx_single_collisions;</div><div class='add'>+	mac_stats-&gt;MultipleCollisionFrames = mib-&gt;tx_multiple_collisions;</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK = pp-&gt;rx_frames;</div><div class='add'>+	mac_stats-&gt;FrameCheckSequenceErrors = mib-&gt;rx_crc_errors;</div><div class='add'>+	mac_stats-&gt;AlignmentErrors = mib-&gt;rx_alignment_errors;</div><div class='add'>+	mac_stats-&gt;OctetsTransmittedOK = mib-&gt;tx_good_bytes;</div><div class='add'>+	mac_stats-&gt;FramesWithDeferredXmissions = mib-&gt;tx_deferred;</div><div class='add'>+	mac_stats-&gt;LateCollisions = mib-&gt;tx_late_collisions;</div><div class='add'>+	mac_stats-&gt;FramesAbortedDueToXSColls = mib-&gt;tx_aborted_errors;</div><div class='add'>+	/* mac_stats-&gt;FramesLostDueToIntMACXmitError */</div><div class='add'>+	/* mac_stats-&gt;CarrierSenseErrors */</div><div class='add'>+	mac_stats-&gt;OctetsReceivedOK = mib-&gt;rx_good_bytes;</div><div class='add'>+	/* mac_stats-&gt;FramesLostDueToIntMACRcvError */</div><div class='add'>+	mac_stats-&gt;MulticastFramesXmittedOK = mib-&gt;tx_multicast;</div><div class='add'>+	mac_stats-&gt;BroadcastFramesXmittedOK = mib-&gt;tx_broadcast;</div><div class='add'>+	/* mac_stats-&gt;FramesWithExcessiveDeferral */</div><div class='add'>+	mac_stats-&gt;MulticastFramesReceivedOK = mib-&gt;rx_multicast;</div><div class='add'>+	mac_stats-&gt;BroadcastFramesReceivedOK = mib-&gt;rx_broadcast;</div><div class='add'>+	/* mac_stats-&gt;InRangeLengthErrors */</div><div class='add'>+	/* mac_stats-&gt;OutOfRangeLengthField */</div><div class='add'>+	mac_stats-&gt;FrameTooLongErrors = mib-&gt;rx_oversize_errors;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_eth_ctrl_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct ethtool_eth_ctrl_stats *ctrl_stats)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	ctrl_stats-&gt;MACControlFramesTransmitted = mib-&gt;tx_pause;</div><div class='add'>+	ctrl_stats-&gt;MACControlFramesReceived = mib-&gt;rx_pause;</div><div class='add'>+	/* ctrl_stats-&gt;UnsupportedOpcodesReceived */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range yt921x_rmon_ranges[] = {</div><div class='add'>+	{ 0, 64 },</div><div class='add'>+	{ 65, 127 },</div><div class='add'>+	{ 128, 255 },</div><div class='add'>+	{ 256, 511 },</div><div class='add'>+	{ 512, 1023 },</div><div class='add'>+	{ 1024, 1518 },</div><div class='add'>+	{ 1519, YT921X_FRAME_SIZE_MAX },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_rmon_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+			  const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	*ranges = yt921x_rmon_ranges;</div><div class='add'>+</div><div class='add'>+	rmon_stats-&gt;undersize_pkts = mib-&gt;rx_undersize_errors;</div><div class='add'>+	rmon_stats-&gt;oversize_pkts = mib-&gt;rx_oversize_errors;</div><div class='add'>+	rmon_stats-&gt;fragments = mib-&gt;rx_alignment_errors;</div><div class='add'>+	/* rmon_stats-&gt;jabbers */</div><div class='add'>+</div><div class='add'>+	rmon_stats-&gt;hist[0] = mib-&gt;rx_64byte;</div><div class='add'>+	rmon_stats-&gt;hist[1] = mib-&gt;rx_65_127byte;</div><div class='add'>+	rmon_stats-&gt;hist[2] = mib-&gt;rx_128_255byte;</div><div class='add'>+	rmon_stats-&gt;hist[3] = mib-&gt;rx_256_511byte;</div><div class='add'>+	rmon_stats-&gt;hist[4] = mib-&gt;rx_512_1023byte;</div><div class='add'>+	rmon_stats-&gt;hist[5] = mib-&gt;rx_1024_1518byte;</div><div class='add'>+	rmon_stats-&gt;hist[6] = mib-&gt;rx_jumbo;</div><div class='add'>+</div><div class='add'>+	rmon_stats-&gt;hist_tx[0] = mib-&gt;tx_64byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[1] = mib-&gt;tx_65_127byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[2] = mib-&gt;tx_128_255byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[3] = mib-&gt;tx_256_511byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[4] = mib-&gt;tx_512_1023byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[5] = mib-&gt;tx_1024_1518byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[6] = mib-&gt;tx_jumbo;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_stats64(struct dsa_switch *ds, int port,</div><div class='add'>+		       struct rtnl_link_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_length_errors = mib-&gt;rx_undersize_errors +</div><div class='add'>+				  mib-&gt;rx_fragment_errors;</div><div class='add'>+	stats-&gt;rx_over_errors = mib-&gt;rx_oversize_errors;</div><div class='add'>+	stats-&gt;rx_crc_errors = mib-&gt;rx_crc_errors;</div><div class='add'>+	stats-&gt;rx_frame_errors = mib-&gt;rx_alignment_errors;</div><div class='add'>+	/* stats-&gt;rx_fifo_errors */</div><div class='add'>+	/* stats-&gt;rx_missed_errors */</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_aborted_errors = mib-&gt;tx_aborted_errors;</div><div class='add'>+	/* stats-&gt;tx_carrier_errors */</div><div class='add'>+	stats-&gt;tx_fifo_errors = mib-&gt;tx_undersize_errors;</div><div class='add'>+	/* stats-&gt;tx_heartbeat_errors */</div><div class='add'>+	stats-&gt;tx_window_errors = mib-&gt;tx_late_collisions;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_packets = pp-&gt;rx_frames;</div><div class='add'>+	stats-&gt;tx_packets = pp-&gt;tx_frames;</div><div class='add'>+	stats-&gt;rx_bytes = mib-&gt;rx_good_bytes - ETH_FCS_LEN * stats-&gt;rx_packets;</div><div class='add'>+	stats-&gt;tx_bytes = mib-&gt;tx_good_bytes - ETH_FCS_LEN * stats-&gt;tx_packets;</div><div class='add'>+	stats-&gt;rx_errors = stats-&gt;rx_length_errors + stats-&gt;rx_over_errors +</div><div class='add'>+			   stats-&gt;rx_crc_errors + stats-&gt;rx_frame_errors;</div><div class='add'>+	stats-&gt;tx_errors = stats-&gt;tx_aborted_errors + stats-&gt;tx_fifo_errors +</div><div class='add'>+			   stats-&gt;tx_window_errors;</div><div class='add'>+	stats-&gt;rx_dropped = mib-&gt;rx_dropped;</div><div class='add'>+	/* stats-&gt;tx_dropped */</div><div class='add'>+	stats-&gt;multicast = mib-&gt;rx_multicast;</div><div class='add'>+	stats-&gt;collisions = mib-&gt;tx_collisions;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_pause_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct ethtool_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	pause_stats-&gt;tx_pause_frames = mib-&gt;tx_pause;</div><div class='add'>+	pause_stats-&gt;rx_pause_frames = mib-&gt;rx_pause;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_set_eee(struct yt921x_priv *priv, int port, struct ethtool_keee *e)</div><div class='add'>+{</div><div class='add'>+	/* Poor datasheet for EEE operations; don't ask if you are confused */</div><div class='add'>+</div><div class='add'>+	bool enable = e-&gt;eee_enabled;</div><div class='add'>+	u16 new_mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Enable / disable global EEE */</div><div class='add'>+	new_mask = priv-&gt;eee_ports_mask;</div><div class='add'>+	new_mask &amp;= ~BIT(port);</div><div class='add'>+	new_mask |= !enable ? 0 : BIT(port);</div><div class='add'>+</div><div class='add'>+	if (!!new_mask != !!priv-&gt;eee_ports_mask) {</div><div class='add'>+		res = yt921x_reg_toggle_bits(priv, YT921X_PON_STRAP_FUNC,</div><div class='add'>+					     YT921X_PON_STRAP_EEE, !!new_mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+		res = yt921x_reg_toggle_bits(priv, YT921X_PON_STRAP_VAL,</div><div class='add'>+					     YT921X_PON_STRAP_EEE, !!new_mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;eee_ports_mask = new_mask;</div><div class='add'>+</div><div class='add'>+	/* Enable / disable port EEE */</div><div class='add'>+	res = yt921x_reg_toggle_bits(priv, YT921X_EEE_CTRL,</div><div class='add'>+				     YT921X_EEE_CTRL_ENn(port), enable);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_toggle_bits(priv, YT921X_EEEn_VAL(port),</div><div class='add'>+				     YT921X_EEE_VAL_DATA, enable);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *e)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_set_eee(priv, port, e);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	/* Only serves as packet filter, since the frame size is always set to</div><div class='add'>+	 * maximum after reset</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	int frame_size;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+	if (dsa_port_is_cpu(dp))</div><div class='add'>+		frame_size += YT921X_TAG_LEN;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_MACn_FRAME(port),</div><div class='add'>+				     YT921X_MAC_FRAME_SIZE_M,</div><div class='add'>+				     YT921X_MAC_FRAME_SIZE(frame_size));</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_dsa_port_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	/* Only called for user ports, exclude tag len here */</div><div class='add'>+	return YT921X_FRAME_SIZE_MAX - ETH_HLEN - ETH_FCS_LEN - YT921X_TAG_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mirror_del(struct yt921x_priv *priv, int port, bool ingress)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+</div><div class='add'>+	if (ingress)</div><div class='add'>+		mask = YT921X_MIRROR_IGR_PORTn(port);</div><div class='add'>+	else</div><div class='add'>+		mask = YT921X_MIRROR_EGR_PORTn(port);</div><div class='add'>+	return yt921x_reg_clear_bits(priv, YT921X_MIRROR, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mirror_add(struct yt921x_priv *priv, int port, bool ingress,</div><div class='add'>+		  int to_local_port, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 srcs;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	u32 dst;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (ingress)</div><div class='add'>+		srcs = YT921X_MIRROR_IGR_PORTn(port);</div><div class='add'>+	else</div><div class='add'>+		srcs = YT921X_MIRROR_EGR_PORTn(port);</div><div class='add'>+	dst = YT921X_MIRROR_PORT(to_local_port);</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_MIRROR, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* other mirror tasks &amp; different dst port -&gt; conflict */</div><div class='add'>+	if ((val &amp; ~srcs &amp; (YT921X_MIRROR_EGR_PORTS_M |</div><div class='add'>+			    YT921X_MIRROR_IGR_PORTS_M)) &amp;&amp;</div><div class='add'>+	    (val &amp; YT921X_MIRROR_PORT_M) != dst) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Sniffer port is already configured, delete existing rules &amp; retry");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctrl = val &amp; ~YT921X_MIRROR_PORT_M;</div><div class='add'>+	ctrl |= srcs;</div><div class='add'>+	ctrl |= dst;</div><div class='add'>+</div><div class='add'>+	if (ctrl == val)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_reg_write(priv, YT921X_MIRROR, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_port_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_mirror_del(priv, port, mirror-&gt;ingress);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dev, "Failed to %s port %d: %i\n", "unmirror",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			   bool ingress, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_mirror_add(priv, port, ingress,</div><div class='add'>+				mirror-&gt;to_local_port, extack);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_fdb_wait(struct yt921x_priv *priv, u32 *valp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u32 val = YT921X_FDB_RESULT_DONE;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_wait(priv, YT921X_FDB_RESULT, YT921X_FDB_RESULT_DONE,</div><div class='add'>+			      &amp;val);</div><div class='add'>+	if (res) {</div><div class='add'>+		dev_err(dev, "FDB probably stuck\n");</div><div class='add'>+		return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*valp = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_in01(struct yt921x_priv *priv, const unsigned char *addr,</div><div class='add'>+		u16 vid, u32 ctrl1)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	ctrl = (addr[0] &lt;&lt; 24) | (addr[1] &lt;&lt; 16) | (addr[2] &lt;&lt; 8) | addr[3];</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN0, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = ctrl1 | YT921X_FDB_IO1_FID(vid) | (addr[4] &lt;&lt; 8) | addr[5];</div><div class='add'>+	return yt921x_reg_write(priv, YT921X_FDB_IN1, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_has(struct yt921x_priv *priv, const unsigned char *addr, u16 vid,</div><div class='add'>+	       u16 *indexp)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_fdb_in01(priv, addr, vid, 0);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = 0;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN2, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_OP_OP_GET_ONE | YT921X_FDB_OP_START;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if (val &amp; YT921X_FDB_RESULT_NOTFOUND) {</div><div class='add'>+		*indexp = YT921X_FDB_NUM;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*indexp = FIELD_GET(YT921X_FDB_RESULT_INDEX_M, val);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_read(struct yt921x_priv *priv, unsigned char *addr, u16 *vidp,</div><div class='add'>+		u16 *ports_maskp, u16 *indexp, u8 *statusp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u16 index;</div><div class='add'>+	u32 data0;</div><div class='add'>+	u32 data1;</div><div class='add'>+	u32 data2;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if (val &amp; YT921X_FDB_RESULT_NOTFOUND) {</div><div class='add'>+		*ports_maskp = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	index = FIELD_GET(YT921X_FDB_RESULT_INDEX_M, val);</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT1, &amp;data1);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if ((data1 &amp; YT921X_FDB_IO1_STATUS_M) ==</div><div class='add'>+	    YT921X_FDB_IO1_STATUS_INVALID) {</div><div class='add'>+		*ports_maskp = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT0, &amp;data0);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT2, &amp;data2);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	addr[0] = data0 &gt;&gt; 24;</div><div class='add'>+	addr[1] = data0 &gt;&gt; 16;</div><div class='add'>+	addr[2] = data0 &gt;&gt; 8;</div><div class='add'>+	addr[3] = data0;</div><div class='add'>+	addr[4] = data1 &gt;&gt; 8;</div><div class='add'>+	addr[5] = data1;</div><div class='add'>+	*vidp = FIELD_GET(YT921X_FDB_IO1_FID_M, data1);</div><div class='add'>+	*indexp = index;</div><div class='add'>+	*ports_maskp = FIELD_GET(YT921X_FDB_IO2_EGR_PORTS_M, data2);</div><div class='add'>+	*statusp = FIELD_GET(YT921X_FDB_IO1_STATUS_M, data1);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev,</div><div class='add'>+		"%s: index 0x%x, mac %02x:%02x:%02x:%02x:%02x:%02x, vid %d, ports 0x%x, status %d\n",</div><div class='add'>+		__func__, *indexp, addr[0], addr[1], addr[2], addr[3],</div><div class='add'>+		addr[4], addr[5], *vidp, *ports_maskp, *statusp);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_dump(struct yt921x_priv *priv, u16 ports_mask,</div><div class='add'>+		dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	unsigned char addr[ETH_ALEN];</div><div class='add'>+	u8 status;</div><div class='add'>+	u16 pmask;</div><div class='add'>+	u16 index;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u16 vid;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_OP_INDEX(0) | YT921X_FDB_OP_MODE_INDEX |</div><div class='add'>+	       YT921X_FDB_OP_OP_GET_ONE | YT921X_FDB_OP_START;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_fdb_read(priv, addr, &amp;vid, &amp;pmask, &amp;index, &amp;status);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if ((pmask &amp; ports_mask) &amp;&amp; !is_multicast_ether_addr(addr)) {</div><div class='add'>+		res = cb(addr, vid,</div><div class='add'>+			 status == YT921X_FDB_ENTRY_STATUS_STATIC, data);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_IO2_EGR_PORTS(ports_mask);</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN2, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	index = 0;</div><div class='add'>+	do {</div><div class='add'>+		ctrl = YT921X_FDB_OP_INDEX(index) | YT921X_FDB_OP_MODE_INDEX |</div><div class='add'>+		       YT921X_FDB_OP_NEXT_TYPE_UCAST_PORT |</div><div class='add'>+		       YT921X_FDB_OP_OP_GET_NEXT | YT921X_FDB_OP_START;</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		res = yt921x_fdb_read(priv, addr, &amp;vid, &amp;pmask, &amp;index,</div><div class='add'>+				      &amp;status);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+		if (!pmask)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if ((pmask &amp; ports_mask) &amp;&amp; !is_multicast_ether_addr(addr)) {</div><div class='add'>+			res = cb(addr, vid,</div><div class='add'>+				 status == YT921X_FDB_ENTRY_STATUS_STATIC,</div><div class='add'>+				 data);</div><div class='add'>+			if (res)</div><div class='add'>+				return res;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Never call GET_NEXT with 4095, otherwise it will hang</div><div class='add'>+		 * forever until a reset!</div><div class='add'>+		 */</div><div class='add'>+	} while (index &lt; YT921X_FDB_NUM - 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_flush_raw(struct yt921x_priv *priv, u16 ports_mask, u16 vid,</div><div class='add'>+		     bool flush_static)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (vid &lt; 4096) {</div><div class='add'>+		ctrl = YT921X_FDB_IO1_FID(vid);</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_FDB_IN1, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_IO2_EGR_PORTS(ports_mask);</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN2, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_OP_OP_FLUSH | YT921X_FDB_OP_START;</div><div class='add'>+	if (vid &gt;= 4096)</div><div class='add'>+		ctrl |= YT921X_FDB_OP_FLUSH_PORT;</div><div class='add'>+	else</div><div class='add'>+		ctrl |= YT921X_FDB_OP_FLUSH_PORT_VID;</div><div class='add'>+	if (flush_static)</div><div class='add'>+		ctrl |= YT921X_FDB_OP_FLUSH_STATIC;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_flush_port(struct yt921x_priv *priv, int port, bool flush_static)</div><div class='add'>+{</div><div class='add'>+	return yt921x_fdb_flush_raw(priv, BIT(port), 4096, flush_static);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_add_index_in12(struct yt921x_priv *priv, u16 index, u16 ctrl1,</div><div class='add'>+			  u16 ctrl2)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN1, ctrl1);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN2, ctrl2);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_OP_INDEX(index) | YT921X_FDB_OP_MODE_INDEX |</div><div class='add'>+	       YT921X_FDB_OP_OP_ADD | YT921X_FDB_OP_START;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_add(struct yt921x_priv *priv, const unsigned char *addr, u16 vid,</div><div class='add'>+	       u16 ports_mask)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_IO1_STATUS_STATIC;</div><div class='add'>+	res = yt921x_fdb_in01(priv, addr, vid, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_IO2_EGR_PORTS(ports_mask);</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN2, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_OP_OP_ADD | YT921X_FDB_OP_START;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_leave(struct yt921x_priv *priv, const unsigned char *addr,</div><div class='add'>+		 u16 vid, u16 ports_mask)</div><div class='add'>+{</div><div class='add'>+	u16 index;</div><div class='add'>+	u32 ctrl1;</div><div class='add'>+	u32 ctrl2;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val2;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Check for presence */</div><div class='add'>+	res = yt921x_fdb_has(priv, addr, vid, &amp;index);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if (index &gt;= YT921X_FDB_NUM)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Check if action required */</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT2, &amp;val2);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl2 = val2 &amp; ~YT921X_FDB_IO2_EGR_PORTS(ports_mask);</div><div class='add'>+	if (ctrl2 == val2)</div><div class='add'>+		return 0;</div><div class='add'>+	if (!(ctrl2 &amp; YT921X_FDB_IO2_EGR_PORTS_M)) {</div><div class='add'>+		ctrl = YT921X_FDB_OP_OP_DEL | YT921X_FDB_OP_START;</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		return yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT1, &amp;ctrl1);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return yt921x_fdb_add_index_in12(priv, index, ctrl1, ctrl2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_join(struct yt921x_priv *priv, const unsigned char *addr, u16 vid,</div><div class='add'>+		u16 ports_mask)</div><div class='add'>+{</div><div class='add'>+	u16 index;</div><div class='add'>+	u32 ctrl1;</div><div class='add'>+	u32 ctrl2;</div><div class='add'>+	u32 val1;</div><div class='add'>+	u32 val2;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Check for presence */</div><div class='add'>+	res = yt921x_fdb_has(priv, addr, vid, &amp;index);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if (index &gt;= YT921X_FDB_NUM)</div><div class='add'>+		return yt921x_fdb_add(priv, addr, vid, ports_mask);</div><div class='add'>+</div><div class='add'>+	/* Check if action required */</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT1, &amp;val1);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT2, &amp;val2);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl1 = val1 &amp; ~YT921X_FDB_IO1_STATUS_M;</div><div class='add'>+	ctrl1 |= YT921X_FDB_IO1_STATUS_STATIC;</div><div class='add'>+	ctrl2 = val2 | YT921X_FDB_IO2_EGR_PORTS(ports_mask);</div><div class='add'>+	if (ctrl1 == val1 &amp;&amp; ctrl2 == val2)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_fdb_add_index_in12(priv, index, ctrl1, ctrl2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			 dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	/* Hardware FDB is shared for fdb and mdb, "bridge fdb show"</div><div class='add'>+	 * only wants to see unicast</div><div class='add'>+	 */</div><div class='add'>+	res = yt921x_fdb_dump(priv, BIT(port), cb, data);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void yt921x_dsa_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_fdb_flush_port(priv, port, false);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dev, "Failed to %s port %d: %i\n", "clear FDB for",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* AGEING reg is set in 5s step */</div><div class='add'>+	ctrl = clamp(msecs / 5000, 1, U16_MAX);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_AGEING, ctrl);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			const unsigned char *addr, u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_fdb_leave(priv, addr, vid, BIT(port));</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			const unsigned char *addr, u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_fdb_join(priv, addr, vid, BIT(port));</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+			struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	const unsigned char *addr = mdb-&gt;addr;</div><div class='add'>+	u16 vid = mdb-&gt;vid;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_fdb_leave(priv, addr, vid, BIT(port));</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+			struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	const unsigned char *addr = mdb-&gt;addr;</div><div class='add'>+	u16 vid = mdb-&gt;vid;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_fdb_join(priv, addr, vid, BIT(port));</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_port_set_pvid(struct yt921x_priv *priv, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_PORT_VLAN_CTRL_CVID_M;</div><div class='add'>+	ctrl = YT921X_PORT_VLAN_CTRL_CVID(vid);</div><div class='add'>+	return yt921x_reg_update_bits(priv, YT921X_PORTn_VLAN_CTRL(port),</div><div class='add'>+				      mask, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_vlan_filtering(struct yt921x_priv *priv, int port, bool vlan_filtering)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(&amp;priv-&gt;ds, port);</div><div class='add'>+	struct net_device *bdev;</div><div class='add'>+	u16 pvid;</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	bdev = dsa_port_bridge_dev_get(dp);</div><div class='add'>+</div><div class='add'>+	if (!bdev || !vlan_filtering)</div><div class='add'>+		pvid = YT921X_VID_UNWARE;</div><div class='add'>+	else</div><div class='add'>+		br_vlan_get_pvid(bdev, &amp;pvid);</div><div class='add'>+	res = yt921x_port_set_pvid(priv, port, pvid);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_TAGGED |</div><div class='add'>+	       YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_UNTAGGED;</div><div class='add'>+	ctrl = 0;</div><div class='add'>+	/* Do not drop tagged frames here; let VLAN_IGR_FILTER do it */</div><div class='add'>+	if (vlan_filtering &amp;&amp; !pvid)</div><div class='add'>+		ctrl |= YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_UNTAGGED;</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_PORTn_VLAN_CTRL1(port),</div><div class='add'>+				     mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_toggle_bits(priv, YT921X_VLAN_IGR_FILTER,</div><div class='add'>+				     YT921X_VLAN_IGR_FILTER_PORTn(port),</div><div class='add'>+				     vlan_filtering);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Turn on / off VLAN awareness */</div><div class='add'>+	mask = YT921X_PORT_IGR_TPIDn_CTAG_M;</div><div class='add'>+	if (!vlan_filtering)</div><div class='add'>+		ctrl = 0;</div><div class='add'>+	else</div><div class='add'>+		ctrl = YT921X_PORT_IGR_TPIDn_CTAG(0);</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_PORTn_IGR_TPID(port),</div><div class='add'>+				     mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_vlan_del(struct yt921x_priv *priv, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	u64 mask64;</div><div class='add'>+</div><div class='add'>+	mask64 = YT921X_VLAN_CTRL_PORTS(port) |</div><div class='add'>+		 YT921X_VLAN_CTRL_UNTAG_PORTn(port);</div><div class='add'>+</div><div class='add'>+	return yt921x_reg64_clear_bits(priv, YT921X_VLANn_CTRL(vid), mask64);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_vlan_add(struct yt921x_priv *priv, int port, u16 vid, bool untagged)</div><div class='add'>+{</div><div class='add'>+	u64 mask64;</div><div class='add'>+	u64 ctrl64;</div><div class='add'>+</div><div class='add'>+	mask64 = YT921X_VLAN_CTRL_PORTn(port) |</div><div class='add'>+		 YT921X_VLAN_CTRL_PORTS(priv-&gt;cpu_ports_mask);</div><div class='add'>+	ctrl64 = mask64;</div><div class='add'>+</div><div class='add'>+	mask64 |= YT921X_VLAN_CTRL_UNTAG_PORTn(port);</div><div class='add'>+	if (untagged)</div><div class='add'>+		ctrl64 |= YT921X_VLAN_CTRL_UNTAG_PORTn(port);</div><div class='add'>+</div><div class='add'>+	return yt921x_reg64_update_bits(priv, YT921X_VLANn_CTRL(vid),</div><div class='add'>+					mask64, ctrl64);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_pvid_clear(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(&amp;priv-&gt;ds, port);</div><div class='add'>+	bool vlan_filtering;</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	vlan_filtering = dsa_port_is_vlan_filtering(dp);</div><div class='add'>+</div><div class='add'>+	res = yt921x_port_set_pvid(priv, port,</div><div class='add'>+				   vlan_filtering ? 0 : YT921X_VID_UNWARE);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if (vlan_filtering) {</div><div class='add'>+		mask = YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_UNTAGGED;</div><div class='add'>+		res = yt921x_reg_set_bits(priv, YT921X_PORTn_VLAN_CTRL1(port),</div><div class='add'>+					  mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_pvid_set(struct yt921x_priv *priv, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(&amp;priv-&gt;ds, port);</div><div class='add'>+	bool vlan_filtering;</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	vlan_filtering = dsa_port_is_vlan_filtering(dp);</div><div class='add'>+</div><div class='add'>+	if (vlan_filtering) {</div><div class='add'>+		res = yt921x_port_set_pvid(priv, port, vid);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mask = YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_UNTAGGED;</div><div class='add'>+	res = yt921x_reg_clear_bits(priv, YT921X_PORTn_VLAN_CTRL1(port), mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+			       bool vlan_filtering,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_vlan_filtering(priv, port, vlan_filtering);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+			 const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u16 vid = vlan-&gt;vid;</div><div class='add'>+	u16 pvid;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	do {</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+		struct net_device *bdev;</div><div class='add'>+</div><div class='add'>+		res = yt921x_vlan_del(priv, port, vid);</div><div class='add'>+		if (res)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		bdev = dsa_port_bridge_dev_get(dp);</div><div class='add'>+		if (bdev) {</div><div class='add'>+			br_vlan_get_pvid(bdev, &amp;pvid);</div><div class='add'>+			if (pvid == vid)</div><div class='add'>+				res = yt921x_pvid_clear(priv, port);</div><div class='add'>+		}</div><div class='add'>+	} while (0);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+			 const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u16 vid = vlan-&gt;vid;</div><div class='add'>+	u16 pvid;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* CPU port is supposed to be a member of every VLAN; see</div><div class='add'>+	 * yt921x_vlan_add() and yt921x_port_setup()</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	do {</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+		struct net_device *bdev;</div><div class='add'>+</div><div class='add'>+		res = yt921x_vlan_add(priv, port, vid,</div><div class='add'>+				      vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED);</div><div class='add'>+		if (res)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		bdev = dsa_port_bridge_dev_get(dp);</div><div class='add'>+		if (bdev) {</div><div class='add'>+			if (vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID) {</div><div class='add'>+				res = yt921x_pvid_set(priv, port, vid);</div><div class='add'>+			} else {</div><div class='add'>+				br_vlan_get_pvid(bdev, &amp;pvid);</div><div class='add'>+				if (pvid == vid)</div><div class='add'>+					res = yt921x_pvid_clear(priv, port);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} while (0);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_userport_standalone(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	ctrl = ~priv-&gt;cpu_ports_mask;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_PORTn_ISOLATION(port), ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Turn off FDB learning to prevent FDB pollution */</div><div class='add'>+	mask = YT921X_PORT_LEARN_DIS;</div><div class='add'>+	res = yt921x_reg_set_bits(priv, YT921X_PORTn_LEARN(port), mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Turn off VLAN awareness */</div><div class='add'>+	mask = YT921X_PORT_IGR_TPIDn_CTAG_M;</div><div class='add'>+	res = yt921x_reg_clear_bits(priv, YT921X_PORTn_IGR_TPID(port), mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Unrelated since learning is off and all packets are trapped;</div><div class='add'>+	 * set it anyway</div><div class='add'>+	 */</div><div class='add'>+	res = yt921x_port_set_pvid(priv, port, YT921X_VID_UNWARE);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_userport_bridge(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_PORT_LEARN_DIS;</div><div class='add'>+	res = yt921x_reg_clear_bits(priv, YT921X_PORTn_LEARN(port), mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_isolate(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mask = BIT(port);</div><div class='add'>+	for (int i = 0; i &lt; YT921X_PORT_NUM; i++) {</div><div class='add'>+		if ((BIT(i) &amp; priv-&gt;cpu_ports_mask) || i == port)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		res = yt921x_reg_set_bits(priv, YT921X_PORTn_ISOLATION(i),</div><div class='add'>+					  mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Make sure to include the CPU port in ports_mask, or your bridge will</div><div class='add'>+ * not have it.</div><div class='add'>+ */</div><div class='add'>+static int yt921x_bridge(struct yt921x_priv *priv, u16 ports_mask)</div><div class='add'>+{</div><div class='add'>+	unsigned long targets_mask = ports_mask &amp; ~priv-&gt;cpu_ports_mask;</div><div class='add'>+	u32 isolated_mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int port;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	isolated_mask = 0;</div><div class='add'>+	for_each_set_bit(port, &amp;targets_mask, YT921X_PORT_NUM) {</div><div class='add'>+		struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;isolated)</div><div class='add'>+			isolated_mask |= BIT(port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Block from non-cpu bridge ports ... */</div><div class='add'>+	for_each_set_bit(port, &amp;targets_mask, YT921X_PORT_NUM) {</div><div class='add'>+		struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+		/* to non-bridge ports */</div><div class='add'>+		ctrl = ~ports_mask;</div><div class='add'>+		/* to isolated ports when isolated */</div><div class='add'>+		if (pp-&gt;isolated)</div><div class='add'>+			ctrl |= isolated_mask;</div><div class='add'>+		/* to itself when non-hairpin */</div><div class='add'>+		if (!pp-&gt;hairpin)</div><div class='add'>+			ctrl |= BIT(port);</div><div class='add'>+		else</div><div class='add'>+			ctrl &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_PORTn_ISOLATION(port),</div><div class='add'>+				       ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_bridge_leave(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_userport_standalone(priv, port);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_isolate(priv, port);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_bridge_join(struct yt921x_priv *priv, int port, u16 ports_mask)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_userport_bridge(priv, port);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_bridge(priv, ports_mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+dsa_bridge_ports(struct dsa_switch *ds, const struct net_device *bdev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	u32 mask = 0;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, ds)</div><div class='add'>+		if (dsa_port_offloads_bridge_dev(dp, bdev))</div><div class='add'>+			mask |= BIT(dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	return mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_bridge_flags(struct yt921x_priv *priv, int port,</div><div class='add'>+		    struct switchdev_brport_flags flags)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	bool do_flush;</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING) {</div><div class='add'>+		bool learning = flags.val &amp; BR_LEARNING;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_PORT_LEARN_DIS;</div><div class='add'>+		res = yt921x_reg_toggle_bits(priv, YT921X_PORTn_LEARN(port),</div><div class='add'>+					     mask, !learning);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* BR_FLOOD, BR_MCAST_FLOOD: see the comment where ACT_UNK_ACTn_TRAP</div><div class='add'>+	 * is set</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* BR_BCAST_FLOOD: we can filter bcast, but cannot trap them */</div><div class='add'>+</div><div class='add'>+	do_flush = false;</div><div class='add'>+	if (flags.mask &amp; BR_HAIRPIN_MODE) {</div><div class='add'>+		pp-&gt;hairpin = flags.val &amp; BR_HAIRPIN_MODE;</div><div class='add'>+		do_flush = true;</div><div class='add'>+	}</div><div class='add'>+	if (flags.mask &amp; BR_ISOLATED) {</div><div class='add'>+		pp-&gt;isolated = flags.val &amp; BR_ISOLATED;</div><div class='add'>+		do_flush = true;</div><div class='add'>+	}</div><div class='add'>+	if (do_flush) {</div><div class='add'>+		struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+		struct net_device *bdev;</div><div class='add'>+</div><div class='add'>+		bdev = dsa_port_bridge_dev_get(dp);</div><div class='add'>+		if (bdev) {</div><div class='add'>+			u32 ports_mask;</div><div class='add'>+</div><div class='add'>+			ports_mask = dsa_bridge_ports(ds, bdev);</div><div class='add'>+			ports_mask |= priv-&gt;cpu_ports_mask;</div><div class='add'>+			res = yt921x_bridge(priv, ports_mask);</div><div class='add'>+			if (res)</div><div class='add'>+				return res;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct switchdev_brport_flags flags,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; ~(BR_HAIRPIN_MODE | BR_LEARNING | BR_FLOOD |</div><div class='add'>+			   BR_MCAST_FLOOD | BR_ISOLATED))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct switchdev_brport_flags flags,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_bridge_flags(priv, port, flags);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_bridge_leave(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dev, "Failed to %s port %d: %i\n", "unbridge",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct dsa_bridge bridge, bool *tx_fwd_offload,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u16 ports_mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ports_mask = dsa_bridge_ports(ds, bridge.dev);</div><div class='add'>+	ports_mask |= priv-&gt;cpu_ports_mask;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_bridge_join(priv, port, ports_mask);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_mst_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+			      const struct switchdev_mst_state *st)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_STP_PORTn_M(port);</div><div class='add'>+	switch (st-&gt;state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_DISABLED(port);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_LEARNING(port);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+	default:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_FORWARD(port);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_BLOCKING(port);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_STPn(st-&gt;msti), mask, ctrl);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_vlan_msti_set(struct dsa_switch *ds, struct dsa_bridge bridge,</div><div class='add'>+			 const struct switchdev_vlan_msti *msti)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u64 mask64;</div><div class='add'>+	u64 ctrl64;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (!msti-&gt;vid)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (!msti-&gt;msti || msti-&gt;msti &gt;= YT921X_MSTI_NUM)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mask64 = YT921X_VLAN_CTRL_STP_ID_M;</div><div class='add'>+	ctrl64 = YT921X_VLAN_CTRL_STP_ID(msti-&gt;msti);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_reg64_update_bits(priv, YT921X_VLANn_CTRL(msti-&gt;vid),</div><div class='add'>+				       mask64, ctrl64);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	bool learning;</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_STP_PORTn_M(port);</div><div class='add'>+	learning = false;</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_DISABLED(port);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_LEARNING(port);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_LEARNING(port);</div><div class='add'>+		learning = dp-&gt;learning;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+	default:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_FORWARD(port);</div><div class='add'>+		learning = dp-&gt;learning;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_BLOCKING(port);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	do {</div><div class='add'>+		res = yt921x_reg_update_bits(priv, YT921X_STPn(0), mask, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_PORT_LEARN_DIS;</div><div class='add'>+		ctrl = !learning ? YT921X_PORT_LEARN_DIS : 0;</div><div class='add'>+		res = yt921x_reg_update_bits(priv, YT921X_PORTn_LEARN(port),</div><div class='add'>+					     mask, ctrl);</div><div class='add'>+	} while (0);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dev, "Failed to %s port %d: %i\n", "set STP state for",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_port_down(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_PORT_LINK | YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_MAC_EN;</div><div class='add'>+	res = yt921x_reg_clear_bits(priv, YT921X_PORTn_CTRL(port), mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if (yt921x_port_is_external(port)) {</div><div class='add'>+		mask = YT921X_SERDES_LINK;</div><div class='add'>+		res = yt921x_reg_clear_bits(priv, YT921X_SERDESn(port), mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_XMII_LINK;</div><div class='add'>+		res = yt921x_reg_clear_bits(priv, YT921X_XMIIn(port), mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_port_up(struct yt921x_priv *priv, int port, unsigned int mode,</div><div class='add'>+	       phy_interface_t interface, int speed, int duplex,</div><div class='add'>+	       bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		ctrl = YT921X_PORT_SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		ctrl = YT921X_PORT_SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		ctrl = YT921X_PORT_SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		ctrl = YT921X_PORT_SPEED_2500;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		ctrl = YT921X_PORT_SPEED_10000;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='add'>+		ctrl |= YT921X_PORT_DUPLEX_FULL;</div><div class='add'>+	if (tx_pause)</div><div class='add'>+		ctrl |= YT921X_PORT_TX_PAUSE;</div><div class='add'>+	if (rx_pause)</div><div class='add'>+		ctrl |= YT921X_PORT_RX_PAUSE;</div><div class='add'>+	ctrl |= YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_MAC_EN;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_PORTn_CTRL(port), ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if (yt921x_port_is_external(port)) {</div><div class='add'>+		mask = YT921X_SERDES_SPEED_M;</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			ctrl = YT921X_SERDES_SPEED_10;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			ctrl = YT921X_SERDES_SPEED_100;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_1000:</div><div class='add'>+			ctrl = YT921X_SERDES_SPEED_1000;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_2500:</div><div class='add'>+			ctrl = YT921X_SERDES_SPEED_2500;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_10000:</div><div class='add'>+			ctrl = YT921X_SERDES_SPEED_10000;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		mask |= YT921X_SERDES_DUPLEX_FULL;</div><div class='add'>+		if (duplex == DUPLEX_FULL)</div><div class='add'>+			ctrl |= YT921X_SERDES_DUPLEX_FULL;</div><div class='add'>+		mask |= YT921X_SERDES_TX_PAUSE;</div><div class='add'>+		if (tx_pause)</div><div class='add'>+			ctrl |= YT921X_SERDES_TX_PAUSE;</div><div class='add'>+		mask |= YT921X_SERDES_RX_PAUSE;</div><div class='add'>+		if (rx_pause)</div><div class='add'>+			ctrl |= YT921X_SERDES_RX_PAUSE;</div><div class='add'>+		mask |= YT921X_SERDES_LINK;</div><div class='add'>+		ctrl |= YT921X_SERDES_LINK;</div><div class='add'>+		res = yt921x_reg_update_bits(priv, YT921X_SERDESn(port),</div><div class='add'>+					     mask, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_XMII_LINK;</div><div class='add'>+		res = yt921x_reg_set_bits(priv, YT921X_XMIIn(port), mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			ctrl = YT921X_MDIO_POLLING_SPEED_10;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			ctrl = YT921X_MDIO_POLLING_SPEED_100;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_1000:</div><div class='add'>+			ctrl = YT921X_MDIO_POLLING_SPEED_1000;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_2500:</div><div class='add'>+			ctrl = YT921X_MDIO_POLLING_SPEED_2500;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_10000:</div><div class='add'>+			ctrl = YT921X_MDIO_POLLING_SPEED_10000;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		if (duplex == DUPLEX_FULL)</div><div class='add'>+			ctrl |= YT921X_MDIO_POLLING_DUPLEX_FULL;</div><div class='add'>+		ctrl |= YT921X_MDIO_POLLING_LINK;</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_MDIO_POLLINGn(port), ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_port_config(struct yt921x_priv *priv, int port, unsigned int mode,</div><div class='add'>+		   phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (!yt921x_port_is_external(port)) {</div><div class='add'>+		if (interface != PHY_INTERFACE_MODE_INTERNAL) {</div><div class='add'>+			dev_err(dev, "Wrong mode %d on port %d\n",</div><div class='add'>+				interface, port);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (interface) {</div><div class='add'>+	/* SERDES */</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_100BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		mask = YT921X_SERDES_CTRL_PORTn(port);</div><div class='add'>+		res = yt921x_reg_set_bits(priv, YT921X_SERDES_CTRL, mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_XMII_CTRL_PORTn(port);</div><div class='add'>+		res = yt921x_reg_clear_bits(priv, YT921X_XMII_CTRL, mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_SERDES_MODE_M;</div><div class='add'>+		switch (interface) {</div><div class='add'>+		case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+			ctrl = YT921X_SERDES_MODE_SGMII;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_100BASEX:</div><div class='add'>+			ctrl = YT921X_SERDES_MODE_100BASEX;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+			ctrl = YT921X_SERDES_MODE_1000BASEX;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+			ctrl = YT921X_SERDES_MODE_2500BASEX;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		res = yt921x_reg_update_bits(priv, YT921X_SERDESn(port),</div><div class='add'>+					     mask, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	/* add XMII support here */</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_phylink_mac_link_down(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			     phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(dp-&gt;ds);</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* No need to sync; port control block is hold until device remove */</div><div class='add'>+	cancel_delayed_work(&amp;priv-&gt;ports[port].mib_read);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_port_down(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dp-&gt;ds-&gt;dev, "Failed to %s port %d: %i\n", "bring down",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+			   struct phy_device *phydev, unsigned int mode,</div><div class='add'>+			   phy_interface_t interface, int speed, int duplex,</div><div class='add'>+			   bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(dp-&gt;ds);</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_port_up(priv, port, mode, interface, speed, duplex,</div><div class='add'>+			     tx_pause, rx_pause);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dp-&gt;ds-&gt;dev, "Failed to %s port %d: %i\n", "bring up",</div><div class='add'>+			port, res);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;ports[port].mib_read, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_phylink_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			  const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(dp-&gt;ds);</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_port_config(priv, port, mode, state-&gt;interface);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dp-&gt;ds-&gt;dev, "Failed to %s port %d: %i\n", "config",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	const struct yt921x_info *info = priv-&gt;info;</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+				   MAC_10 | MAC_100 | MAC_1000;</div><div class='add'>+</div><div class='add'>+	if (info-&gt;internal_mask &amp; BIT(port)) {</div><div class='add'>+		/* Port 10 for MCU should probably go here too. But since that</div><div class='add'>+		 * is untested yet, turn it down for the moment by letting it</div><div class='add'>+		 * fall to the default branch.</div><div class='add'>+		 */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+	} else if (info-&gt;external_mask &amp; BIT(port)) {</div><div class='add'>+		/* TODO: external ports may support SERDES only, XMII only, or</div><div class='add'>+		 * SERDES + XMII depending on the chip. However, we can't get</div><div class='add'>+		 * the accurate config table due to lack of document, thus</div><div class='add'>+		 * we simply declare SERDES + XMII and rely on the correctness</div><div class='add'>+		 * of devicetree for now.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* SERDES */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		/* REVSGMII (SGMII in PHY role) should go here, once</div><div class='add'>+		 * PHY_INTERFACE_MODE_REVSGMII is introduced.</div><div class='add'>+		 */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_100BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_2500FD;</div><div class='add'>+</div><div class='add'>+		/* XMII */</div><div class='add'>+</div><div class='add'>+		/* Not tested. To add support for XMII:</div><div class='add'>+		 *   - Add proper interface modes below</div><div class='add'>+		 *   - Handle them in yt921x_port_config()</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+	/* no such port: empty supported_interfaces causes phylink to turn it</div><div class='add'>+	 * down</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_port_setup(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_userport_standalone(priv, port);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port)) {</div><div class='add'>+		/* Egress of CPU port is supposed to be completely controlled</div><div class='add'>+		 * via tagging, so set to oneway isolated (drop all packets</div><div class='add'>+		 * without tag).</div><div class='add'>+		 */</div><div class='add'>+		ctrl = ~(u32)0;</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_PORTn_ISOLATION(port),</div><div class='add'>+				       ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		/* To simplify FDB "isolation" simulation, we also disable</div><div class='add'>+		 * learning on the CPU port, and let software identify packets</div><div class='add'>+		 * towarding CPU (either trapped or a static FDB entry is</div><div class='add'>+		 * matched, no matter which bridge that entry is for), which is</div><div class='add'>+		 * already done by yt921x_userport_standalone(). As a result,</div><div class='add'>+		 * VLAN-awareness becomes unrelated on the CPU port (set to</div><div class='add'>+		 * VLAN-unaware by the way).</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol</div><div class='add'>+yt921x_dsa_get_tag_protocol(struct dsa_switch *ds, int port,</div><div class='add'>+			    enum dsa_tag_protocol m)</div><div class='add'>+{</div><div class='add'>+	return DSA_TAG_PROTO_YT921X;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_dsa_port_setup(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_port_setup(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_edata_wait(struct yt921x_priv *priv, u32 *valp)</div><div class='add'>+{</div><div class='add'>+	u32 val = YT921X_EDATA_DATA_IDLE;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_wait(priv, YT921X_EDATA_DATA,</div><div class='add'>+			      YT921X_EDATA_DATA_STATUS_M, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	*valp = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_edata_read_cont(struct yt921x_priv *priv, u8 addr, u8 *valp)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_EDATA_CTRL_ADDR(addr) | YT921X_EDATA_CTRL_READ;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_EDATA_CTRL, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_edata_wait(priv, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	*valp = FIELD_GET(YT921X_EDATA_DATA_DATA_M, val);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_edata_read(struct yt921x_priv *priv, u8 addr, u8 *valp)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_edata_wait(priv, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	return yt921x_edata_read_cont(priv, addr, valp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_chip_detect(struct yt921x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	const struct yt921x_info *info;</div><div class='add'>+	u8 extmode;</div><div class='add'>+	u32 chipid;</div><div class='add'>+	u32 major;</div><div class='add'>+	u32 mode;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_CHIP_ID, &amp;chipid);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	major = FIELD_GET(YT921X_CHIP_ID_MAJOR, chipid);</div><div class='add'>+</div><div class='add'>+	for (info = yt921x_infos; info-&gt;name; info++)</div><div class='add'>+		if (info-&gt;major == major)</div><div class='add'>+			break;</div><div class='add'>+	if (!info-&gt;name) {</div><div class='add'>+		dev_err(dev, "Unexpected chipid 0x%x\n", chipid);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_CHIP_MODE, &amp;mode);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_edata_read(priv, YT921X_EDATA_EXTMODE, &amp;extmode);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	for (; info-&gt;name; info++)</div><div class='add'>+		if (info-&gt;major == major &amp;&amp; info-&gt;mode == mode &amp;&amp;</div><div class='add'>+		    info-&gt;extmode == extmode)</div><div class='add'>+			break;</div><div class='add'>+	if (!info-&gt;name) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Unsupported chipid 0x%x with chipmode 0x%x 0x%x\n",</div><div class='add'>+			chipid, mode, extmode);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Print chipid here since we are interested in lower 16 bits */</div><div class='add'>+	dev_info(dev,</div><div class='add'>+		 "Motorcomm %s ethernet switch, chipid: 0x%x, chipmode: 0x%x 0x%x\n",</div><div class='add'>+		 info-&gt;name, chipid, mode, extmode);</div><div class='add'>+</div><div class='add'>+	priv-&gt;info = info;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_chip_reset(struct yt921x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u16 eth_p_tag;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_chip_detect(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Reset */</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_RST, YT921X_RST_HW);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* RST_HW is almost same as GPIO hard reset, so we need this delay. */</div><div class='add'>+	fsleep(YT921X_RST_DELAY_US);</div><div class='add'>+</div><div class='add'>+	val = 0;</div><div class='add'>+	res = yt921x_reg_wait(priv, YT921X_RST, ~0, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Check for tag EtherType; do it after reset in case you messed it up</div><div class='add'>+	 * before.</div><div class='add'>+	 */</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_CPU_TAG_TPID, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	eth_p_tag = FIELD_GET(YT921X_CPU_TAG_TPID_TPID_M, val);</div><div class='add'>+	if (eth_p_tag != ETH_P_YT921X) {</div><div class='add'>+		dev_err(dev, "Tag type 0x%x != 0x%x\n", eth_p_tag,</div><div class='add'>+			ETH_P_YT921X);</div><div class='add'>+		/* Despite being possible, we choose not to set CPU_TAG_TPID,</div><div class='add'>+		 * since there is no way it can be different unless you have the</div><div class='add'>+		 * wrong chip.</div><div class='add'>+		 */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_chip_setup(struct yt921x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	unsigned long cpu_ports_mask;</div><div class='add'>+	u64 ctrl64;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int port;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Enable DSA */</div><div class='add'>+	priv-&gt;cpu_ports_mask = dsa_cpu_ports(ds);</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_EXT_CPU_PORT_TAG_EN | YT921X_EXT_CPU_PORT_PORT_EN |</div><div class='add'>+	       YT921X_EXT_CPU_PORT_PORT(__ffs(priv-&gt;cpu_ports_mask));</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_EXT_CPU_PORT, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Enable and clear MIB */</div><div class='add'>+	res = yt921x_reg_set_bits(priv, YT921X_FUNC, YT921X_FUNC_MIB);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_MIB_CTRL_CLEAN | YT921X_MIB_CTRL_ALL_PORT;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_MIB_CTRL, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Setup software switch */</div><div class='add'>+	ctrl = YT921X_CPU_COPY_TO_EXT_CPU;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_CPU_COPY, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = GENMASK(10, 0);</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FILTER_UNK_UCAST, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FILTER_UNK_MCAST, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* YT921x does not support native DSA port bridging, so we use port</div><div class='add'>+	 * isolation to emulate it. However, be especially careful that port</div><div class='add'>+	 * isolation takes _after_ FDB lookups, i.e. if an FDB entry (from</div><div class='add'>+	 * another bridge) is matched and the destination port (in another</div><div class='add'>+	 * bridge) is blocked, the packet will be dropped instead of flooding to</div><div class='add'>+	 * the "bridged" ports, thus we need to trap and handle those packets by</div><div class='add'>+	 * software.</div><div class='add'>+	 *</div><div class='add'>+	 * If there is no more than one bridge, we might be able to drop them</div><div class='add'>+	 * directly given some conditions are met, but we trap them in all cases</div><div class='add'>+	 * for now.</div><div class='add'>+	 */</div><div class='add'>+	ctrl = 0;</div><div class='add'>+	for (int i = 0; i &lt; YT921X_PORT_NUM; i++)</div><div class='add'>+		ctrl |= YT921X_ACT_UNK_ACTn_TRAP(i);</div><div class='add'>+	/* Except for CPU ports, if any packets are sent via CPU ports without</div><div class='add'>+	 * tag, they should be dropped.</div><div class='add'>+	 */</div><div class='add'>+	cpu_ports_mask = priv-&gt;cpu_ports_mask;</div><div class='add'>+	for_each_set_bit(port, &amp;cpu_ports_mask, YT921X_PORT_NUM) {</div><div class='add'>+		ctrl &amp;= ~YT921X_ACT_UNK_ACTn_M(port);</div><div class='add'>+		ctrl |= YT921X_ACT_UNK_ACTn_DROP(port);</div><div class='add'>+	}</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_ACT_UNK_UCAST, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_ACT_UNK_MCAST, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Tagged VID 0 should be treated as untagged, which confuses the</div><div class='add'>+	 * hardware a lot</div><div class='add'>+	 */</div><div class='add'>+	ctrl64 = YT921X_VLAN_CTRL_LEARN_DIS | YT921X_VLAN_CTRL_PORTS_M;</div><div class='add'>+	res = yt921x_reg64_write(priv, YT921X_VLANn_CTRL(0), ctrl64);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Miscellaneous */</div><div class='add'>+	res = yt921x_reg_set_bits(priv, YT921X_SENSOR, YT921X_SENSOR_TEMP);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_dsa_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	struct device_node *np = dev-&gt;of_node;</div><div class='add'>+	struct device_node *child;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_chip_reset(priv);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Register the internal mdio bus. Nodes for internal ports should have</div><div class='add'>+	 * proper phy-handle pointing to their PHYs. Not enabling the internal</div><div class='add'>+	 * bus is possible, though pretty wired, if internal ports are not used.</div><div class='add'>+	 */</div><div class='add'>+	child = of_get_child_by_name(np, "mdio");</div><div class='add'>+	if (child) {</div><div class='add'>+		res = yt921x_mbus_int_init(priv, child);</div><div class='add'>+		of_node_put(child);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* External mdio bus is optional */</div><div class='add'>+	child = of_get_child_by_name(np, "mdio-external");</div><div class='add'>+	if (child) {</div><div class='add'>+		res = yt921x_mbus_ext_init(priv, child);</div><div class='add'>+		of_node_put(child);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		dev_err(dev, "Untested external mdio bus\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_chip_setup(priv);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops yt921x_phylink_mac_ops = {</div><div class='add'>+	.mac_link_down	= yt921x_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= yt921x_phylink_mac_link_up,</div><div class='add'>+	.mac_config	= yt921x_phylink_mac_config,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops yt921x_dsa_switch_ops = {</div><div class='add'>+	/* mib */</div><div class='add'>+	.get_strings		= yt921x_dsa_get_strings,</div><div class='add'>+	.get_ethtool_stats	= yt921x_dsa_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= yt921x_dsa_get_sset_count,</div><div class='add'>+	.get_eth_mac_stats	= yt921x_dsa_get_eth_mac_stats,</div><div class='add'>+	.get_eth_ctrl_stats	= yt921x_dsa_get_eth_ctrl_stats,</div><div class='add'>+	.get_rmon_stats		= yt921x_dsa_get_rmon_stats,</div><div class='add'>+	.get_stats64		= yt921x_dsa_get_stats64,</div><div class='add'>+	.get_pause_stats	= yt921x_dsa_get_pause_stats,</div><div class='add'>+	/* eee */</div><div class='add'>+	.support_eee		= dsa_supports_eee,</div><div class='add'>+	.set_mac_eee		= yt921x_dsa_set_mac_eee,</div><div class='add'>+	/* mtu */</div><div class='add'>+	.port_change_mtu	= yt921x_dsa_port_change_mtu,</div><div class='add'>+	.port_max_mtu		= yt921x_dsa_port_max_mtu,</div><div class='add'>+	/* hsr */</div><div class='add'>+	.port_hsr_leave		= dsa_port_simple_hsr_leave,</div><div class='add'>+	.port_hsr_join		= dsa_port_simple_hsr_join,</div><div class='add'>+	/* mirror */</div><div class='add'>+	.port_mirror_del	= yt921x_dsa_port_mirror_del,</div><div class='add'>+	.port_mirror_add	= yt921x_dsa_port_mirror_add,</div><div class='add'>+	/* fdb */</div><div class='add'>+	.port_fdb_dump		= yt921x_dsa_port_fdb_dump,</div><div class='add'>+	.port_fast_age		= yt921x_dsa_port_fast_age,</div><div class='add'>+	.set_ageing_time	= yt921x_dsa_set_ageing_time,</div><div class='add'>+	.port_fdb_del		= yt921x_dsa_port_fdb_del,</div><div class='add'>+	.port_fdb_add		= yt921x_dsa_port_fdb_add,</div><div class='add'>+	.port_mdb_del		= yt921x_dsa_port_mdb_del,</div><div class='add'>+	.port_mdb_add		= yt921x_dsa_port_mdb_add,</div><div class='add'>+	/* vlan */</div><div class='add'>+	.port_vlan_filtering	= yt921x_dsa_port_vlan_filtering,</div><div class='add'>+	.port_vlan_del		= yt921x_dsa_port_vlan_del,</div><div class='add'>+	.port_vlan_add		= yt921x_dsa_port_vlan_add,</div><div class='add'>+	/* bridge */</div><div class='add'>+	.port_pre_bridge_flags	= yt921x_dsa_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags	= yt921x_dsa_port_bridge_flags,</div><div class='add'>+	.port_bridge_leave	= yt921x_dsa_port_bridge_leave,</div><div class='add'>+	.port_bridge_join	= yt921x_dsa_port_bridge_join,</div><div class='add'>+	/* mst */</div><div class='add'>+	.port_mst_state_set	= yt921x_dsa_port_mst_state_set,</div><div class='add'>+	.vlan_msti_set		= yt921x_dsa_vlan_msti_set,</div><div class='add'>+	.port_stp_state_set	= yt921x_dsa_port_stp_state_set,</div><div class='add'>+	/* port */</div><div class='add'>+	.get_tag_protocol	= yt921x_dsa_get_tag_protocol,</div><div class='add'>+	.phylink_get_caps	= yt921x_dsa_phylink_get_caps,</div><div class='add'>+	.port_setup		= yt921x_dsa_port_setup,</div><div class='add'>+	/* chip */</div><div class='add'>+	.setup			= yt921x_dsa_setup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void yt921x_mdio_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mdiodev_get_drvdata(mdiodev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(&amp;priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void yt921x_mdio_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mdiodev_get_drvdata(mdiodev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (size_t i = ARRAY_SIZE(priv-&gt;ports); i-- &gt; 0; ) {</div><div class='add'>+		struct yt921x_port *pp = &amp;priv-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		disable_delayed_work_sync(&amp;pp-&gt;mib_read);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(&amp;priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	mutex_destroy(&amp;priv-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_mdio_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	struct yt921x_reg_mdio *mdio;</div><div class='add'>+	struct yt921x_priv *priv;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mdio = devm_kzalloc(dev, sizeof(*mdio), GFP_KERNEL);</div><div class='add'>+	if (!mdio)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mdio-&gt;bus = mdiodev-&gt;bus;</div><div class='add'>+	mdio-&gt;addr = mdiodev-&gt;addr;</div><div class='add'>+	mdio-&gt;switchid = 0;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	priv-&gt;reg_ops = &amp;yt921x_reg_ops_mdio;</div><div class='add'>+	priv-&gt;reg_ctx = mdio;</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(priv-&gt;ports); i++) {</div><div class='add'>+		struct yt921x_port *pp = &amp;priv-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		pp-&gt;index = i;</div><div class='add'>+		INIT_DELAYED_WORK(&amp;pp-&gt;mib_read, yt921x_poll_mib);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ds = &amp;priv-&gt;ds;</div><div class='add'>+	ds-&gt;dev = dev;</div><div class='add'>+	ds-&gt;assisted_learning_on_cpu_port = true;</div><div class='add'>+	ds-&gt;priv = priv;</div><div class='add'>+	ds-&gt;ops = &amp;yt921x_dsa_switch_ops;</div><div class='add'>+	ds-&gt;ageing_time_min = 1 * 5000;</div><div class='add'>+	ds-&gt;ageing_time_max = U16_MAX * 5000;</div><div class='add'>+	ds-&gt;phylink_mac_ops = &amp;yt921x_phylink_mac_ops;</div><div class='add'>+	ds-&gt;num_ports = YT921X_PORT_NUM;</div><div class='add'>+</div><div class='add'>+	mdiodev_set_drvdata(mdiodev, priv);</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id yt921x_of_match[] = {</div><div class='add'>+	{ .compatible = "motorcomm,yt9215" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, yt921x_of_match);</div><div class='add'>+</div><div class='add'>+static struct mdio_driver yt921x_mdio_driver = {</div><div class='add'>+	.probe = yt921x_mdio_probe,</div><div class='add'>+	.remove = yt921x_mdio_remove,</div><div class='add'>+	.shutdown = yt921x_mdio_shutdown,</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = YT921X_NAME,</div><div class='add'>+		.of_match_table = yt921x_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(yt921x_mdio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("David Yang &lt;mmyangfl@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for Motorcomm YT921x Switch");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/yt921x.h b/drivers/net/dsa/yt921x.h<br/>new file mode 100644<br/>index 000000000000..61bb0ab3b09a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/yt921x.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/yt921x.h</a></div><div class='hunk'>@@ -0,0 +1,567 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 David Yang</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __YT921X_H</div><div class='add'>+#define __YT921X_H</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#define YT921X_SMI_SWITCHID_M		GENMASK(3, 2)</div><div class='add'>+#define  YT921X_SMI_SWITCHID(x)			FIELD_PREP(YT921X_SMI_SWITCHID_M, (x))</div><div class='add'>+#define YT921X_SMI_AD			BIT(1)</div><div class='add'>+#define  YT921X_SMI_ADDR			0</div><div class='add'>+#define  YT921X_SMI_DATA			YT921X_SMI_AD</div><div class='add'>+#define YT921X_SMI_RW			BIT(0)</div><div class='add'>+#define  YT921X_SMI_WRITE			0</div><div class='add'>+#define  YT921X_SMI_READ			YT921X_SMI_RW</div><div class='add'>+</div><div class='add'>+#define YT921X_SWITCHID_NUM		4</div><div class='add'>+</div><div class='add'>+#define YT921X_RST			0x80000</div><div class='add'>+#define  YT921X_RST_HW				BIT(31)</div><div class='add'>+#define  YT921X_RST_SW				BIT(1)</div><div class='add'>+#define YT921X_FUNC			0x80004</div><div class='add'>+#define  YT921X_FUNC_MIB			BIT(1)</div><div class='add'>+#define YT921X_CHIP_ID			0x80008</div><div class='add'>+#define  YT921X_CHIP_ID_MAJOR			GENMASK(31, 16)</div><div class='add'>+#define YT921X_EXT_CPU_PORT		0x8000c</div><div class='add'>+#define  YT921X_EXT_CPU_PORT_TAG_EN		BIT(15)</div><div class='add'>+#define  YT921X_EXT_CPU_PORT_PORT_EN		BIT(14)</div><div class='add'>+#define  YT921X_EXT_CPU_PORT_PORT_M		GENMASK(3, 0)</div><div class='add'>+#define   YT921X_EXT_CPU_PORT_PORT(x)			FIELD_PREP(YT921X_EXT_CPU_PORT_PORT_M, (x))</div><div class='add'>+#define YT921X_CPU_TAG_TPID		0x80010</div><div class='add'>+#define  YT921X_CPU_TAG_TPID_TPID_M		GENMASK(15, 0)</div><div class='add'>+/* Same as ETH_P_YT921X, but this represents the true HW default, while the</div><div class='add'>+ * former is a local convention chosen by us.</div><div class='add'>+ */</div><div class='add'>+#define   YT921X_CPU_TAG_TPID_TPID_DEFAULT		0x9988</div><div class='add'>+#define YT921X_PVID_SEL			0x80014</div><div class='add'>+#define  YT921X_PVID_SEL_SVID_PORTn(port)	BIT(port)</div><div class='add'>+#define YT921X_SERDES_CTRL		0x80028</div><div class='add'>+#define  YT921X_SERDES_CTRL_PORTn_TEST(port)	BIT((port) - 3)</div><div class='add'>+#define  YT921X_SERDES_CTRL_PORTn(port)		BIT((port) - 8)</div><div class='add'>+#define YT921X_IO_LEVEL			0x80030</div><div class='add'>+#define  YT9215_IO_LEVEL_NORMAL_M		GENMASK(5, 4)</div><div class='add'>+#define   YT9215_IO_LEVEL_NORMAL(x)			FIELD_PREP(YT9215_IO_LEVEL_NORMAL_M, (x))</div><div class='add'>+#define   YT9215_IO_LEVEL_NORMAL_3V3			YT9215_IO_LEVEL_NORMAL(0)</div><div class='add'>+#define   YT9215_IO_LEVEL_NORMAL_1V8			YT9215_IO_LEVEL_NORMAL(3)</div><div class='add'>+#define  YT9215_IO_LEVEL_RGMII1_M		GENMASK(3, 2)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII1(x)			FIELD_PREP(YT9215_IO_LEVEL_RGMII1_M, (x))</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII1_3V3			YT9215_IO_LEVEL_RGMII1(0)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII1_2V5			YT9215_IO_LEVEL_RGMII1(1)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII1_1V8			YT9215_IO_LEVEL_RGMII1(2)</div><div class='add'>+#define  YT9215_IO_LEVEL_RGMII0_M		GENMASK(1, 0)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII0(x)			FIELD_PREP(YT9215_IO_LEVEL_RGMII0_M, (x))</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII0_3V3			YT9215_IO_LEVEL_RGMII0(0)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII0_2V5			YT9215_IO_LEVEL_RGMII0(1)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII0_1V8			YT9215_IO_LEVEL_RGMII0(2)</div><div class='add'>+#define  YT9218_IO_LEVEL_RGMII1_M		GENMASK(5, 4)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII1(x)			FIELD_PREP(YT9218_IO_LEVEL_RGMII1_M, (x))</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII1_3V3			YT9218_IO_LEVEL_RGMII1(0)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII1_2V5			YT9218_IO_LEVEL_RGMII1(1)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII1_1V8			YT9218_IO_LEVEL_RGMII1(2)</div><div class='add'>+#define  YT9218_IO_LEVEL_RGMII0_M		GENMASK(3, 2)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII0(x)			FIELD_PREP(YT9218_IO_LEVEL_RGMII0_M, (x))</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII0_3V3			YT9218_IO_LEVEL_RGMII0(0)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII0_2V5			YT9218_IO_LEVEL_RGMII0(1)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII0_1V8			YT9218_IO_LEVEL_RGMII0(2)</div><div class='add'>+#define  YT9218_IO_LEVEL_NORMAL_M		GENMASK(1, 0)</div><div class='add'>+#define   YT9218_IO_LEVEL_NORMAL(x)			FIELD_PREP(YT9218_IO_LEVEL_NORMAL_M, (x))</div><div class='add'>+#define   YT9218_IO_LEVEL_NORMAL_3V3			YT9218_IO_LEVEL_NORMAL(0)</div><div class='add'>+#define   YT9218_IO_LEVEL_NORMAL_1V8			YT9218_IO_LEVEL_NORMAL(3)</div><div class='add'>+#define YT921X_MAC_ADDR_HI2		0x80080</div><div class='add'>+#define YT921X_MAC_ADDR_LO4		0x80084</div><div class='add'>+#define YT921X_SERDESn(port)		(0x8008c + 4 * ((port) - 8))</div><div class='add'>+#define  YT921X_SERDES_MODE_M			GENMASK(9, 7)</div><div class='add'>+#define   YT921X_SERDES_MODE(x)				FIELD_PREP(YT921X_SERDES_MODE_M, (x))</div><div class='add'>+#define   YT921X_SERDES_MODE_SGMII			YT921X_SERDES_MODE(0)</div><div class='add'>+#define   YT921X_SERDES_MODE_REVSGMII			YT921X_SERDES_MODE(1)</div><div class='add'>+#define   YT921X_SERDES_MODE_1000BASEX			YT921X_SERDES_MODE(2)</div><div class='add'>+#define   YT921X_SERDES_MODE_100BASEX			YT921X_SERDES_MODE(3)</div><div class='add'>+#define   YT921X_SERDES_MODE_2500BASEX			YT921X_SERDES_MODE(4)</div><div class='add'>+#define  YT921X_SERDES_RX_PAUSE			BIT(6)</div><div class='add'>+#define  YT921X_SERDES_TX_PAUSE			BIT(5)</div><div class='add'>+#define  YT921X_SERDES_LINK			BIT(4)  /* force link */</div><div class='add'>+#define  YT921X_SERDES_DUPLEX_FULL		BIT(3)</div><div class='add'>+#define  YT921X_SERDES_SPEED_M			GENMASK(2, 0)</div><div class='add'>+#define   YT921X_SERDES_SPEED(x)			FIELD_PREP(YT921X_SERDES_SPEED_M, (x))</div><div class='add'>+#define   YT921X_SERDES_SPEED_10			YT921X_SERDES_SPEED(0)</div><div class='add'>+#define   YT921X_SERDES_SPEED_100			YT921X_SERDES_SPEED(1)</div><div class='add'>+#define   YT921X_SERDES_SPEED_1000			YT921X_SERDES_SPEED(2)</div><div class='add'>+#define   YT921X_SERDES_SPEED_10000			YT921X_SERDES_SPEED(3)</div><div class='add'>+#define   YT921X_SERDES_SPEED_2500			YT921X_SERDES_SPEED(4)</div><div class='add'>+#define YT921X_PORTn_CTRL(port)		(0x80100 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_CTRL_PAUSE_AN		BIT(10)</div><div class='add'>+#define YT921X_PORTn_STATUS(port)	(0x80200 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_LINK			BIT(9)  /* CTRL: auto negotiation */</div><div class='add'>+#define  YT921X_PORT_HALF_PAUSE			BIT(8)  /* Half-duplex back pressure mode */</div><div class='add'>+#define  YT921X_PORT_DUPLEX_FULL		BIT(7)</div><div class='add'>+#define  YT921X_PORT_RX_PAUSE			BIT(6)</div><div class='add'>+#define  YT921X_PORT_TX_PAUSE			BIT(5)</div><div class='add'>+#define  YT921X_PORT_RX_MAC_EN			BIT(4)</div><div class='add'>+#define  YT921X_PORT_TX_MAC_EN			BIT(3)</div><div class='add'>+#define  YT921X_PORT_SPEED_M			GENMASK(2, 0)</div><div class='add'>+#define   YT921X_PORT_SPEED(x)				FIELD_PREP(YT921X_PORT_SPEED_M, (x))</div><div class='add'>+#define   YT921X_PORT_SPEED_10				YT921X_PORT_SPEED(0)</div><div class='add'>+#define   YT921X_PORT_SPEED_100				YT921X_PORT_SPEED(1)</div><div class='add'>+#define   YT921X_PORT_SPEED_1000			YT921X_PORT_SPEED(2)</div><div class='add'>+#define   YT921X_PORT_SPEED_10000			YT921X_PORT_SPEED(3)</div><div class='add'>+#define   YT921X_PORT_SPEED_2500			YT921X_PORT_SPEED(4)</div><div class='add'>+#define YT921X_PON_STRAP_FUNC		0x80320</div><div class='add'>+#define YT921X_PON_STRAP_VAL		0x80324</div><div class='add'>+#define YT921X_PON_STRAP_CAP		0x80328</div><div class='add'>+#define  YT921X_PON_STRAP_EEE			BIT(16)</div><div class='add'>+#define  YT921X_PON_STRAP_LOOP_DETECT		BIT(7)</div><div class='add'>+#define YT921X_MDIO_POLLINGn(port)	(0x80364 + 4 * ((port) - 8))</div><div class='add'>+#define  YT921X_MDIO_POLLING_DUPLEX_FULL	BIT(4)</div><div class='add'>+#define  YT921X_MDIO_POLLING_LINK		BIT(3)</div><div class='add'>+#define  YT921X_MDIO_POLLING_SPEED_M		GENMASK(2, 0)</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED(x)			FIELD_PREP(YT921X_MDIO_POLLING_SPEED_M, (x))</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED_10			YT921X_MDIO_POLLING_SPEED(0)</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED_100			YT921X_MDIO_POLLING_SPEED(1)</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED_1000		YT921X_MDIO_POLLING_SPEED(2)</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED_10000		YT921X_MDIO_POLLING_SPEED(3)</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED_2500		YT921X_MDIO_POLLING_SPEED(4)</div><div class='add'>+#define YT921X_SENSOR			0x8036c</div><div class='add'>+#define  YT921X_SENSOR_TEMP			BIT(18)</div><div class='add'>+#define YT921X_TEMP			0x80374</div><div class='add'>+#define YT921X_CHIP_MODE		0x80388</div><div class='add'>+#define  YT921X_CHIP_MODE_MODE			GENMASK(1, 0)</div><div class='add'>+#define YT921X_XMII_CTRL		0x80394</div><div class='add'>+#define  YT921X_XMII_CTRL_PORTn(port)		BIT(9 - (port))  /* Yes, it's reversed */</div><div class='add'>+#define YT921X_XMIIn(port)		(0x80400 + 8 * ((port) - 8))</div><div class='add'>+#define  YT921X_XMII_MODE_M			GENMASK(31, 29)</div><div class='add'>+#define   YT921X_XMII_MODE(x)				FIELD_PREP(YT921X_XMII_MODE_M, (x))</div><div class='add'>+#define   YT921X_XMII_MODE_MII				YT921X_XMII_MODE(0)</div><div class='add'>+#define   YT921X_XMII_MODE_REVMII			YT921X_XMII_MODE(1)</div><div class='add'>+#define   YT921X_XMII_MODE_RMII				YT921X_XMII_MODE(2)</div><div class='add'>+#define   YT921X_XMII_MODE_REVRMII			YT921X_XMII_MODE(3)</div><div class='add'>+#define   YT921X_XMII_MODE_RGMII			YT921X_XMII_MODE(4)</div><div class='add'>+#define   YT921X_XMII_MODE_DISABLE			YT921X_XMII_MODE(5)</div><div class='add'>+#define  YT921X_XMII_LINK			BIT(19)  /* force link */</div><div class='add'>+#define  YT921X_XMII_EN				BIT(18)</div><div class='add'>+#define  YT921X_XMII_SOFT_RST			BIT(17)</div><div class='add'>+#define  YT921X_XMII_RGMII_TX_DELAY_150PS_M	GENMASK(16, 13)</div><div class='add'>+#define   YT921X_XMII_RGMII_TX_DELAY_150PS(x)		FIELD_PREP(YT921X_XMII_RGMII_TX_DELAY_150PS_M, (x))</div><div class='add'>+#define  YT921X_XMII_TX_CLK_IN			BIT(11)</div><div class='add'>+#define  YT921X_XMII_RX_CLK_IN			BIT(10)</div><div class='add'>+#define  YT921X_XMII_RGMII_TX_DELAY_2NS		BIT(8)</div><div class='add'>+#define  YT921X_XMII_RGMII_TX_CLK_OUT		BIT(7)</div><div class='add'>+#define  YT921X_XMII_RGMII_RX_DELAY_150PS_M	GENMASK(6, 3)</div><div class='add'>+#define   YT921X_XMII_RGMII_RX_DELAY_150PS(x)		FIELD_PREP(YT921X_XMII_RGMII_RX_DELAY_150PS_M, (x))</div><div class='add'>+#define  YT921X_XMII_RMII_PHY_TX_CLK_OUT	BIT(2)</div><div class='add'>+#define  YT921X_XMII_REVMII_TX_CLK_OUT		BIT(1)</div><div class='add'>+#define  YT921X_XMII_REVMII_RX_CLK_OUT		BIT(0)</div><div class='add'>+</div><div class='add'>+#define YT921X_MACn_FRAME(port)		(0x81008 + 0x1000 * (port))</div><div class='add'>+#define  YT921X_MAC_FRAME_SIZE_M		GENMASK(21, 8)</div><div class='add'>+#define   YT921X_MAC_FRAME_SIZE(x)			FIELD_PREP(YT921X_MAC_FRAME_SIZE_M, (x))</div><div class='add'>+</div><div class='add'>+#define YT921X_EEEn_VAL(port)		(0xa0000 + 0x40 * (port))</div><div class='add'>+#define  YT921X_EEE_VAL_DATA			BIT(1)</div><div class='add'>+</div><div class='add'>+#define YT921X_EEE_CTRL			0xb0000</div><div class='add'>+#define  YT921X_EEE_CTRL_ENn(port)		BIT(port)</div><div class='add'>+</div><div class='add'>+#define YT921X_MIB_CTRL			0xc0004</div><div class='add'>+#define  YT921X_MIB_CTRL_CLEAN			BIT(30)</div><div class='add'>+#define  YT921X_MIB_CTRL_PORT_M			GENMASK(6, 3)</div><div class='add'>+#define   YT921X_MIB_CTRL_PORT(x)			FIELD_PREP(YT921X_MIB_CTRL_PORT_M, (x))</div><div class='add'>+#define  YT921X_MIB_CTRL_ONE_PORT		BIT(1)</div><div class='add'>+#define  YT921X_MIB_CTRL_ALL_PORT		BIT(0)</div><div class='add'>+#define YT921X_MIBn_DATA0(port)		(0xc0100 + 0x100 * (port))</div><div class='add'>+#define YT921X_MIBn_DATAm(port, x)	(YT921X_MIBn_DATA0(port) + 4 * (x))</div><div class='add'>+#define  YT921X_MIB_DATA_RX_BROADCAST		0x00</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PAUSE		0x04</div><div class='add'>+#define  YT921X_MIB_DATA_RX_MULTICAST		0x08</div><div class='add'>+#define  YT921X_MIB_DATA_RX_CRC_ERR		0x0c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_RX_ALIGN_ERR		0x10</div><div class='add'>+#define  YT921X_MIB_DATA_RX_UNDERSIZE_ERR	0x14</div><div class='add'>+#define  YT921X_MIB_DATA_RX_FRAG_ERR		0x18</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_64		0x1c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_65_TO_127	0x20</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_128_TO_255	0x24</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_256_TO_511	0x28</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_512_TO_1023	0x2c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_1024_TO_1518	0x30</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_1519_TO_MAX	0x34</div><div class='add'>+/* 0x38: unused */</div><div class='add'>+#define  YT921X_MIB_DATA_RX_GOOD_BYTES		0x3c</div><div class='add'>+</div><div class='add'>+/* 0x40: 64 bytes */</div><div class='add'>+#define  YT921X_MIB_DATA_RX_BAD_BYTES		0x44</div><div class='add'>+/* 0x48: 64 bytes */</div><div class='add'>+#define  YT921X_MIB_DATA_RX_OVERSIZE_ERR	0x4c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_RX_DROPPED		0x50</div><div class='add'>+#define  YT921X_MIB_DATA_TX_BROADCAST		0x54</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PAUSE		0x58</div><div class='add'>+#define  YT921X_MIB_DATA_TX_MULTICAST		0x5c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_TX_UNDERSIZE_ERR	0x60</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_64		0x64</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_65_TO_127	0x68</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_128_TO_255	0x6c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_256_TO_511	0x70</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_512_TO_1023	0x74</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_1024_TO_1518	0x78</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_1519_TO_MAX	0x7c</div><div class='add'>+</div><div class='add'>+/* 0x80: unused */</div><div class='add'>+#define  YT921X_MIB_DATA_TX_GOOD_BYTES		0x84</div><div class='add'>+/* 0x88: 64 bytes */</div><div class='add'>+#define  YT921X_MIB_DATA_TX_COLLISION		0x8c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_TX_EXCESSIVE_COLLISION	0x90</div><div class='add'>+#define  YT921X_MIB_DATA_TX_MULTIPLE_COLLISION	0x94</div><div class='add'>+#define  YT921X_MIB_DATA_TX_SINGLE_COLLISION	0x98</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT			0x9c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_TX_DEFERRED		0xa0</div><div class='add'>+#define  YT921X_MIB_DATA_TX_LATE_COLLISION	0xa4</div><div class='add'>+#define  YT921X_MIB_DATA_RX_OAM			0xa8</div><div class='add'>+#define  YT921X_MIB_DATA_TX_OAM			0xac</div><div class='add'>+</div><div class='add'>+#define YT921X_EDATA_CTRL		0xe0000</div><div class='add'>+#define  YT921X_EDATA_CTRL_ADDR_M		GENMASK(15, 8)</div><div class='add'>+#define   YT921X_EDATA_CTRL_ADDR(x)			FIELD_PREP(YT921X_EDATA_CTRL_ADDR_M, (x))</div><div class='add'>+#define  YT921X_EDATA_CTRL_OP_M			GENMASK(3, 0)</div><div class='add'>+#define   YT921X_EDATA_CTRL_OP(x)			FIELD_PREP(YT921X_EDATA_CTRL_OP_M, (x))</div><div class='add'>+#define   YT921X_EDATA_CTRL_READ			YT921X_EDATA_CTRL_OP(5)</div><div class='add'>+#define YT921X_EDATA_DATA		0xe0004</div><div class='add'>+#define  YT921X_EDATA_DATA_DATA_M			GENMASK(31, 24)</div><div class='add'>+#define  YT921X_EDATA_DATA_STATUS_M		GENMASK(3, 0)</div><div class='add'>+#define   YT921X_EDATA_DATA_STATUS(x)			FIELD_PREP(YT921X_EDATA_DATA_STATUS_M, (x))</div><div class='add'>+#define   YT921X_EDATA_DATA_IDLE			YT921X_EDATA_DATA_STATUS(3)</div><div class='add'>+</div><div class='add'>+#define YT921X_EXT_MBUS_OP		0x6a000</div><div class='add'>+#define YT921X_INT_MBUS_OP		0xf0000</div><div class='add'>+#define  YT921X_MBUS_OP_START			BIT(0)</div><div class='add'>+#define YT921X_EXT_MBUS_CTRL		0x6a004</div><div class='add'>+#define YT921X_INT_MBUS_CTRL		0xf0004</div><div class='add'>+#define  YT921X_MBUS_CTRL_PORT_M		GENMASK(25, 21)</div><div class='add'>+#define   YT921X_MBUS_CTRL_PORT(x)			FIELD_PREP(YT921X_MBUS_CTRL_PORT_M, (x))</div><div class='add'>+#define  YT921X_MBUS_CTRL_REG_M			GENMASK(20, 16)</div><div class='add'>+#define   YT921X_MBUS_CTRL_REG(x)			FIELD_PREP(YT921X_MBUS_CTRL_REG_M, (x))</div><div class='add'>+#define  YT921X_MBUS_CTRL_TYPE_M		GENMASK(11, 8)  /* wild guess */</div><div class='add'>+#define   YT921X_MBUS_CTRL_TYPE(x)			FIELD_PREP(YT921X_MBUS_CTRL_TYPE_M, (x))</div><div class='add'>+#define   YT921X_MBUS_CTRL_TYPE_C22			YT921X_MBUS_CTRL_TYPE(4)</div><div class='add'>+#define  YT921X_MBUS_CTRL_OP_M			GENMASK(3, 2)  /* wild guess */</div><div class='add'>+#define   YT921X_MBUS_CTRL_OP(x)			FIELD_PREP(YT921X_MBUS_CTRL_OP_M, (x))</div><div class='add'>+#define   YT921X_MBUS_CTRL_WRITE			YT921X_MBUS_CTRL_OP(1)</div><div class='add'>+#define   YT921X_MBUS_CTRL_READ				YT921X_MBUS_CTRL_OP(2)</div><div class='add'>+#define YT921X_EXT_MBUS_DOUT		0x6a008</div><div class='add'>+#define YT921X_INT_MBUS_DOUT		0xf0008</div><div class='add'>+#define YT921X_EXT_MBUS_DIN		0x6a00c</div><div class='add'>+#define YT921X_INT_MBUS_DIN		0xf000c</div><div class='add'>+</div><div class='add'>+#define YT921X_PORTn_EGR(port)		(0x100000 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_EGR_TPID_CTAG_M		GENMASK(5, 4)</div><div class='add'>+#define   YT921X_PORT_EGR_TPID_CTAG(x)			FIELD_PREP(YT921X_PORT_EGR_TPID_CTAG_M, (x))</div><div class='add'>+#define  YT921X_PORT_EGR_TPID_STAG_M		GENMASK(3, 2)</div><div class='add'>+#define   YT921X_PORT_EGR_TPID_STAG(x)			FIELD_PREP(YT921X_PORT_EGR_TPID_STAG_M, (x))</div><div class='add'>+#define YT921X_TPID_EGRn(x)		(0x100300 + 4 * (x))	/* [0, 3] */</div><div class='add'>+#define  YT921X_TPID_EGR_TPID_M			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define YT921X_VLAN_IGR_FILTER		0x180280</div><div class='add'>+#define  YT921X_VLAN_IGR_FILTER_PORTn_BYPASS_IGMP(port)	BIT((port) + 11)</div><div class='add'>+#define  YT921X_VLAN_IGR_FILTER_PORTn(port)	BIT(port)</div><div class='add'>+#define YT921X_PORTn_ISOLATION(port)	(0x180294 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_ISOLATION_BLOCKn(port)	BIT(port)</div><div class='add'>+#define YT921X_STPn(n)			(0x18038c + 4 * (n))</div><div class='add'>+#define  YT921X_STP_PORTn_M(port)		GENMASK(2 * (port) + 1, 2 * (port))</div><div class='add'>+#define   YT921X_STP_PORTn(port, x)			((x) &lt;&lt; (2 * (port)))</div><div class='add'>+#define   YT921X_STP_PORTn_DISABLED(port)		YT921X_STP_PORTn(port, 0)</div><div class='add'>+#define   YT921X_STP_PORTn_LEARNING(port)		YT921X_STP_PORTn(port, 1)</div><div class='add'>+#define   YT921X_STP_PORTn_BLOCKING(port)		YT921X_STP_PORTn(port, 2)</div><div class='add'>+#define   YT921X_STP_PORTn_FORWARD(port)		YT921X_STP_PORTn(port, 3)</div><div class='add'>+#define YT921X_PORTn_LEARN(port)	(0x1803d0 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_LEARN_VID_LEARN_MULTI_EN	BIT(22)</div><div class='add'>+#define  YT921X_PORT_LEARN_VID_LEARN_MODE	BIT(21)</div><div class='add'>+#define  YT921X_PORT_LEARN_VID_LEARN_EN		BIT(20)</div><div class='add'>+#define  YT921X_PORT_LEARN_SUSPEND_COPY_EN	BIT(19)</div><div class='add'>+#define  YT921X_PORT_LEARN_SUSPEND_DROP_EN	BIT(18)</div><div class='add'>+#define  YT921X_PORT_LEARN_DIS			BIT(17)</div><div class='add'>+#define  YT921X_PORT_LEARN_LIMIT_EN		BIT(16)</div><div class='add'>+#define  YT921X_PORT_LEARN_LIMIT_M		GENMASK(15, 8)</div><div class='add'>+#define   YT921X_PORT_LEARN_LIMIT(x)			FIELD_PREP(YT921X_PORT_LEARN_LIMIT_M, (x))</div><div class='add'>+#define  YT921X_PORT_LEARN_DROP_ON_EXCEEDED	BIT(2)</div><div class='add'>+#define  YT921X_PORT_LEARN_MODE_M		GENMASK(1, 0)</div><div class='add'>+#define   YT921X_PORT_LEARN_MODE(x)			FIELD_PREP(YT921X_PORT_LEARN_MODE_M, (x))</div><div class='add'>+#define   YT921X_PORT_LEARN_MODE_AUTO			YT921X_PORT_LEARN_MODE(0)</div><div class='add'>+#define   YT921X_PORT_LEARN_MODE_AUTO_AND_COPY		YT921X_PORT_LEARN_MODE(1)</div><div class='add'>+#define   YT921X_PORT_LEARN_MODE_CPU_CONTROL		YT921X_PORT_LEARN_MODE(2)</div><div class='add'>+#define YT921X_AGEING			0x180440</div><div class='add'>+#define  YT921X_AGEING_INTERVAL_M		GENMASK(15, 0)</div><div class='add'>+#define YT921X_FDB_IN0			0x180454</div><div class='add'>+#define YT921X_FDB_IN1			0x180458</div><div class='add'>+#define YT921X_FDB_IN2			0x18045c</div><div class='add'>+#define YT921X_FDB_OP			0x180460</div><div class='add'>+#define  YT921X_FDB_OP_INDEX_M			GENMASK(22, 11)</div><div class='add'>+#define   YT921X_FDB_OP_INDEX(x)			FIELD_PREP(YT921X_FDB_OP_INDEX_M, (x))</div><div class='add'>+#define  YT921X_FDB_OP_MODE_INDEX		BIT(10)  /* mac+fid / index */</div><div class='add'>+#define  YT921X_FDB_OP_FLUSH_MCAST		BIT(9)  /* ucast / mcast */</div><div class='add'>+#define  YT921X_FDB_OP_FLUSH_M			GENMASK(8, 7)</div><div class='add'>+#define   YT921X_FDB_OP_FLUSH(x)			FIELD_PREP(YT921X_FDB_OP_FLUSH_M, (x))</div><div class='add'>+#define   YT921X_FDB_OP_FLUSH_ALL			YT921X_FDB_OP_FLUSH(0)</div><div class='add'>+#define   YT921X_FDB_OP_FLUSH_PORT			YT921X_FDB_OP_FLUSH(1)</div><div class='add'>+#define   YT921X_FDB_OP_FLUSH_PORT_VID			YT921X_FDB_OP_FLUSH(2)</div><div class='add'>+#define   YT921X_FDB_OP_FLUSH_VID			YT921X_FDB_OP_FLUSH(3)</div><div class='add'>+#define  YT921X_FDB_OP_FLUSH_STATIC		BIT(6)</div><div class='add'>+#define  YT921X_FDB_OP_NEXT_TYPE_M		GENMASK(5, 4)</div><div class='add'>+#define   YT921X_FDB_OP_NEXT_TYPE(x)			FIELD_PREP(YT921X_FDB_OP_NEXT_TYPE_M, (x))</div><div class='add'>+#define   YT921X_FDB_OP_NEXT_TYPE_UCAST_PORT		YT921X_FDB_OP_NEXT_TYPE(0)</div><div class='add'>+#define   YT921X_FDB_OP_NEXT_TYPE_UCAST_VID		YT921X_FDB_OP_NEXT_TYPE(1)</div><div class='add'>+#define   YT921X_FDB_OP_NEXT_TYPE_UCAST			YT921X_FDB_OP_NEXT_TYPE(2)</div><div class='add'>+#define   YT921X_FDB_OP_NEXT_TYPE_MCAST			YT921X_FDB_OP_NEXT_TYPE(3)</div><div class='add'>+#define  YT921X_FDB_OP_OP_M			GENMASK(3, 1)</div><div class='add'>+#define   YT921X_FDB_OP_OP(x)				FIELD_PREP(YT921X_FDB_OP_OP_M, (x))</div><div class='add'>+#define   YT921X_FDB_OP_OP_ADD				YT921X_FDB_OP_OP(0)</div><div class='add'>+#define   YT921X_FDB_OP_OP_DEL				YT921X_FDB_OP_OP(1)</div><div class='add'>+#define   YT921X_FDB_OP_OP_GET_ONE			YT921X_FDB_OP_OP(2)</div><div class='add'>+#define   YT921X_FDB_OP_OP_GET_NEXT			YT921X_FDB_OP_OP(3)</div><div class='add'>+#define   YT921X_FDB_OP_OP_FLUSH			YT921X_FDB_OP_OP(4)</div><div class='add'>+#define  YT921X_FDB_OP_START			BIT(0)</div><div class='add'>+#define YT921X_FDB_RESULT		0x180464</div><div class='add'>+#define  YT921X_FDB_RESULT_DONE			BIT(15)</div><div class='add'>+#define  YT921X_FDB_RESULT_NOTFOUND		BIT(14)</div><div class='add'>+#define  YT921X_FDB_RESULT_OVERWRITED		BIT(13)</div><div class='add'>+#define  YT921X_FDB_RESULT_INDEX_M		GENMASK(11, 0)</div><div class='add'>+#define   YT921X_FDB_RESULT_INDEX(x)			FIELD_PREP(YT921X_FDB_RESULT_INDEX_M, (x))</div><div class='add'>+#define YT921X_FDB_OUT0			0x1804b0</div><div class='add'>+#define  YT921X_FDB_IO0_ADDR_HI4_M		GENMASK(31, 0)</div><div class='add'>+#define YT921X_FDB_OUT1			0x1804b4</div><div class='add'>+#define  YT921X_FDB_IO1_EGR_INT_PRI_EN		BIT(31)</div><div class='add'>+#define  YT921X_FDB_IO1_STATUS_M		GENMASK(30, 28)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS(x)			FIELD_PREP(YT921X_FDB_IO1_STATUS_M, (x))</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_INVALID			YT921X_FDB_IO1_STATUS(0)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_MIN_TIME		YT921X_FDB_IO1_STATUS(1)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_MOVE_AGING_MAX_TIME	YT921X_FDB_IO1_STATUS(3)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_MAX_TIME		YT921X_FDB_IO1_STATUS(5)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_PENDING			YT921X_FDB_IO1_STATUS(6)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_STATIC			YT921X_FDB_IO1_STATUS(7)</div><div class='add'>+#define  YT921X_FDB_IO1_FID_M			GENMASK(27, 16)  /* filtering ID (VID) */</div><div class='add'>+#define   YT921X_FDB_IO1_FID(x)				FIELD_PREP(YT921X_FDB_IO1_FID_M, (x))</div><div class='add'>+#define  YT921X_FDB_IO1_ADDR_LO2_M		GENMASK(15, 0)</div><div class='add'>+#define YT921X_FDB_OUT2			0x1804b8</div><div class='add'>+#define  YT921X_FDB_IO2_MOVE_AGING_STATUS_M	GENMASK(31, 30)</div><div class='add'>+#define  YT921X_FDB_IO2_IGR_DROP		BIT(29)</div><div class='add'>+#define  YT921X_FDB_IO2_EGR_PORTS_M		GENMASK(28, 18)</div><div class='add'>+#define   YT921X_FDB_IO2_EGR_PORTS(x)			FIELD_PREP(YT921X_FDB_IO2_EGR_PORTS_M, (x))</div><div class='add'>+#define  YT921X_FDB_IO2_EGR_DROP		BIT(17)</div><div class='add'>+#define  YT921X_FDB_IO2_COPY_TO_CPU		BIT(16)</div><div class='add'>+#define  YT921X_FDB_IO2_IGR_INT_PRI_EN		BIT(15)</div><div class='add'>+#define  YT921X_FDB_IO2_INT_PRI_M		GENMASK(14, 12)</div><div class='add'>+#define   YT921X_FDB_IO2_INT_PRI(x)			FIELD_PREP(YT921X_FDB_IO2_INT_PRI_M, (x))</div><div class='add'>+#define  YT921X_FDB_IO2_NEW_VID_M		GENMASK(11, 0)</div><div class='add'>+#define   YT921X_FDB_IO2_NEW_VID(x)			FIELD_PREP(YT921X_FDB_IO2_NEW_VID_M, (x))</div><div class='add'>+#define YT921X_FILTER_UNK_UCAST		0x180508</div><div class='add'>+#define YT921X_FILTER_UNK_MCAST		0x18050c</div><div class='add'>+#define YT921X_FILTER_MCAST		0x180510</div><div class='add'>+#define YT921X_FILTER_BCAST		0x180514</div><div class='add'>+#define  YT921X_FILTER_PORTS_M			GENMASK(10, 0)</div><div class='add'>+#define   YT921X_FILTER_PORTS(x)			FIELD_PREP(YT921X_FILTER_PORTS_M, (x))</div><div class='add'>+#define  YT921X_FILTER_PORTn(port)		BIT(port)</div><div class='add'>+#define YT921X_VLAN_EGR_FILTER		0x180598</div><div class='add'>+#define  YT921X_VLAN_EGR_FILTER_PORTn(port)	BIT(port)</div><div class='add'>+#define YT921X_CPU_COPY			0x180690</div><div class='add'>+#define  YT921X_CPU_COPY_FORCE_INT_PORT		BIT(2)</div><div class='add'>+#define  YT921X_CPU_COPY_TO_INT_CPU		BIT(1)</div><div class='add'>+#define  YT921X_CPU_COPY_TO_EXT_CPU		BIT(0)</div><div class='add'>+#define YT921X_ACT_UNK_UCAST		0x180734</div><div class='add'>+#define YT921X_ACT_UNK_MCAST		0x180738</div><div class='add'>+#define  YT921X_ACT_UNK_MCAST_BYPASS_DROP_RMA	BIT(23)</div><div class='add'>+#define  YT921X_ACT_UNK_MCAST_BYPASS_DROP_IGMP	BIT(22)</div><div class='add'>+#define  YT921X_ACT_UNK_ACTn_M(port)		GENMASK(2 * (port) + 1, 2 * (port))</div><div class='add'>+#define   YT921X_ACT_UNK_ACTn(port, x)			((x) &lt;&lt; (2 * (port)))</div><div class='add'>+#define   YT921X_ACT_UNK_ACTn_FORWARD(port)		YT921X_ACT_UNK_ACTn(port, 0)  /* flood */</div><div class='add'>+#define   YT921X_ACT_UNK_ACTn_TRAP(port)		YT921X_ACT_UNK_ACTn(port, 1)  /* steer to CPU */</div><div class='add'>+#define   YT921X_ACT_UNK_ACTn_DROP(port)		YT921X_ACT_UNK_ACTn(port, 2)  /* discard */</div><div class='add'>+/* NEVER use this action; see comments in the tag driver */</div><div class='add'>+#define   YT921X_ACT_UNK_ACTn_COPY(port)		YT921X_ACT_UNK_ACTn(port, 3)  /* flood and copy */</div><div class='add'>+#define YT921X_FDB_HW_FLUSH		0x180958</div><div class='add'>+#define  YT921X_FDB_HW_FLUSH_ON_LINKDOWN	BIT(0)</div><div class='add'>+</div><div class='add'>+#define YT921X_VLANn_CTRL(vlan)		(0x188000 + 8 * (vlan))</div><div class='add'>+#define  YT921X_VLAN_CTRL_UNTAG_PORTS_M		GENMASK_ULL(50, 40)</div><div class='add'>+#define   YT921X_VLAN_CTRL_UNTAG_PORTS(x)		FIELD_PREP(YT921X_VLAN_CTRL_UNTAG_PORTS_M, (x))</div><div class='add'>+#define  YT921X_VLAN_CTRL_UNTAG_PORTn(port)	BIT_ULL((port) + 40)</div><div class='add'>+#define  YT921X_VLAN_CTRL_STP_ID_M		GENMASK_ULL(39, 36)</div><div class='add'>+#define   YT921X_VLAN_CTRL_STP_ID(x)			FIELD_PREP(YT921X_VLAN_CTRL_STP_ID_M, (x))</div><div class='add'>+#define  YT921X_VLAN_CTRL_SVLAN_EN		BIT_ULL(35)</div><div class='add'>+#define  YT921X_VLAN_CTRL_FID_M			GENMASK_ULL(34, 23)</div><div class='add'>+#define   YT921X_VLAN_CTRL_FID(x)			FIELD_PREP(YT921X_VLAN_CTRL_FID_M, (x))</div><div class='add'>+#define  YT921X_VLAN_CTRL_LEARN_DIS		BIT_ULL(22)</div><div class='add'>+#define  YT921X_VLAN_CTRL_INT_PRI_EN		BIT_ULL(21)</div><div class='add'>+#define  YT921X_VLAN_CTRL_INT_PRI_M		GENMASK_ULL(20, 18)</div><div class='add'>+#define  YT921X_VLAN_CTRL_PORTS_M		GENMASK_ULL(17, 7)</div><div class='add'>+#define   YT921X_VLAN_CTRL_PORTS(x)			FIELD_PREP(YT921X_VLAN_CTRL_PORTS_M, (x))</div><div class='add'>+#define  YT921X_VLAN_CTRL_PORTn(port)		BIT_ULL((port) + 7)</div><div class='add'>+#define  YT921X_VLAN_CTRL_BYPASS_1X_AC		BIT_ULL(6)</div><div class='add'>+#define  YT921X_VLAN_CTRL_METER_EN		BIT_ULL(5)</div><div class='add'>+#define  YT921X_VLAN_CTRL_METER_ID_M		GENMASK_ULL(4, 0)</div><div class='add'>+</div><div class='add'>+#define YT921X_TPID_IGRn(x)		(0x210000 + 4 * (x))	/* [0, 3] */</div><div class='add'>+#define  YT921X_TPID_IGR_TPID_M			GENMASK(15, 0)</div><div class='add'>+#define YT921X_PORTn_IGR_TPID(port)	(0x210010 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_IGR_TPIDn_STAG_M		GENMASK(7, 4)</div><div class='add'>+#define  YT921X_PORT_IGR_TPIDn_STAG(x)		BIT((x) + 4)</div><div class='add'>+#define  YT921X_PORT_IGR_TPIDn_CTAG_M		GENMASK(3, 0)</div><div class='add'>+#define  YT921X_PORT_IGR_TPIDn_CTAG(x)		BIT(x)</div><div class='add'>+</div><div class='add'>+#define YT921X_PORTn_VLAN_CTRL(port)	(0x230010 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_SVLAN_PRI_EN	BIT(31)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_CVLAN_PRI_EN	BIT(30)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_SVID_M		GENMASK(29, 18)</div><div class='add'>+#define   YT921X_PORT_VLAN_CTRL_SVID(x)			FIELD_PREP(YT921X_PORT_VLAN_CTRL_SVID_M, (x))</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_CVID_M		GENMASK(17, 6)</div><div class='add'>+#define   YT921X_PORT_VLAN_CTRL_CVID(x)			FIELD_PREP(YT921X_PORT_VLAN_CTRL_CVID_M, (x))</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_SVLAN_PRI_M	GENMASK(5, 3)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_CVLAN_PRI_M	GENMASK(2, 0)</div><div class='add'>+#define YT921X_PORTn_VLAN_CTRL1(port)	(0x230080 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_VLAN_RANGE_EN	BIT(8)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_VLAN_RANGE_PROFILE_ID_M	GENMASK(7, 4)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_SVLAN_DROP_TAGGED	BIT(3)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_SVLAN_DROP_UNTAGGED	BIT(2)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_TAGGED	BIT(1)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_UNTAGGED	BIT(0)</div><div class='add'>+</div><div class='add'>+#define YT921X_MIRROR			0x300300</div><div class='add'>+#define  YT921X_MIRROR_IGR_PORTS_M		GENMASK(26, 16)</div><div class='add'>+#define   YT921X_MIRROR_IGR_PORTS(x)			FIELD_PREP(YT921X_MIRROR_IGR_PORTS_M, (x))</div><div class='add'>+#define  YT921X_MIRROR_IGR_PORTn(port)		BIT((port) + 16)</div><div class='add'>+#define  YT921X_MIRROR_EGR_PORTS_M		GENMASK(14, 4)</div><div class='add'>+#define   YT921X_MIRROR_EGR_PORTS(x)			FIELD_PREP(YT921X_MIRROR_EGR_PORTS_M, (x))</div><div class='add'>+#define  YT921X_MIRROR_EGR_PORTn(port)		BIT((port) + 4)</div><div class='add'>+#define  YT921X_MIRROR_PORT_M			GENMASK(3, 0)</div><div class='add'>+#define   YT921X_MIRROR_PORT(x)				FIELD_PREP(YT921X_MIRROR_PORT_M, (x))</div><div class='add'>+</div><div class='add'>+#define YT921X_EDATA_EXTMODE	0xfb</div><div class='add'>+#define YT921X_EDATA_LEN	0x100</div><div class='add'>+</div><div class='add'>+#define YT921X_FDB_NUM	4096</div><div class='add'>+</div><div class='add'>+enum yt921x_fdb_entry_status {</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_INVALID = 0,</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_MIN_TIME = 1,</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_MOVE_AGING_MAX_TIME = 3,</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_MAX_TIME = 5,</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_PENDING = 6,</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_STATIC = 7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define YT921X_MSTI_NUM		16</div><div class='add'>+</div><div class='add'>+#define YT9215_MAJOR	0x9002</div><div class='add'>+#define YT9218_MAJOR	0x9001</div><div class='add'>+</div><div class='add'>+/* required for a hard reset */</div><div class='add'>+#define YT921X_RST_DELAY_US	10000</div><div class='add'>+</div><div class='add'>+#define YT921X_FRAME_SIZE_MAX	0x2400  /* 9216 */</div><div class='add'>+</div><div class='add'>+#define YT921X_TAG_LEN	8</div><div class='add'>+</div><div class='add'>+/* 8 internal + 2 external + 1 mcu */</div><div class='add'>+#define YT921X_PORT_NUM			11</div><div class='add'>+</div><div class='add'>+#define yt921x_port_is_internal(port) ((port) &lt; 8)</div><div class='add'>+#define yt921x_port_is_external(port) (8 &lt;= (port) &amp;&amp; (port) &lt; 9)</div><div class='add'>+</div><div class='add'>+struct yt921x_mib {</div><div class='add'>+	u64 rx_broadcast;</div><div class='add'>+	u64 rx_pause;</div><div class='add'>+	u64 rx_multicast;</div><div class='add'>+	u64 rx_crc_errors;</div><div class='add'>+</div><div class='add'>+	u64 rx_alignment_errors;</div><div class='add'>+	u64 rx_undersize_errors;</div><div class='add'>+	u64 rx_fragment_errors;</div><div class='add'>+	u64 rx_64byte;</div><div class='add'>+</div><div class='add'>+	u64 rx_65_127byte;</div><div class='add'>+	u64 rx_128_255byte;</div><div class='add'>+	u64 rx_256_511byte;</div><div class='add'>+	u64 rx_512_1023byte;</div><div class='add'>+</div><div class='add'>+	u64 rx_1024_1518byte;</div><div class='add'>+	u64 rx_jumbo;</div><div class='add'>+	u64 rx_good_bytes;</div><div class='add'>+</div><div class='add'>+	u64 rx_bad_bytes;</div><div class='add'>+	u64 rx_oversize_errors;</div><div class='add'>+</div><div class='add'>+	u64 rx_dropped;</div><div class='add'>+	u64 tx_broadcast;</div><div class='add'>+	u64 tx_pause;</div><div class='add'>+	u64 tx_multicast;</div><div class='add'>+</div><div class='add'>+	u64 tx_undersize_errors;</div><div class='add'>+	u64 tx_64byte;</div><div class='add'>+	u64 tx_65_127byte;</div><div class='add'>+	u64 tx_128_255byte;</div><div class='add'>+</div><div class='add'>+	u64 tx_256_511byte;</div><div class='add'>+	u64 tx_512_1023byte;</div><div class='add'>+	u64 tx_1024_1518byte;</div><div class='add'>+	u64 tx_jumbo;</div><div class='add'>+</div><div class='add'>+	u64 tx_good_bytes;</div><div class='add'>+	u64 tx_collisions;</div><div class='add'>+</div><div class='add'>+	u64 tx_aborted_errors;</div><div class='add'>+	u64 tx_multiple_collisions;</div><div class='add'>+	u64 tx_single_collisions;</div><div class='add'>+	u64 tx_good;</div><div class='add'>+</div><div class='add'>+	u64 tx_deferred;</div><div class='add'>+	u64 tx_late_collisions;</div><div class='add'>+	u64 rx_oam;</div><div class='add'>+	u64 tx_oam;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct yt921x_port {</div><div class='add'>+	unsigned char index;</div><div class='add'>+</div><div class='add'>+	bool hairpin;</div><div class='add'>+	bool isolated;</div><div class='add'>+</div><div class='add'>+	struct delayed_work mib_read;</div><div class='add'>+	struct yt921x_mib mib;</div><div class='add'>+	u64 rx_frames;</div><div class='add'>+	u64 tx_frames;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct yt921x_reg_ops {</div><div class='add'>+	int (*read)(void *context, u32 reg, u32 *valp);</div><div class='add'>+	int (*write)(void *context, u32 reg, u32 val);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct yt921x_priv {</div><div class='add'>+	struct dsa_switch ds;</div><div class='add'>+</div><div class='add'>+	const struct yt921x_info *info;</div><div class='add'>+	/* cache of dsa_cpu_ports(ds) */</div><div class='add'>+	u16 cpu_ports_mask;</div><div class='add'>+</div><div class='add'>+	/* protect the access to the switch registers */</div><div class='add'>+	struct mutex reg_lock;</div><div class='add'>+	const struct yt921x_reg_ops *reg_ops;</div><div class='add'>+	void *reg_ctx;</div><div class='add'>+</div><div class='add'>+	/* mdio master bus */</div><div class='add'>+	struct mii_bus *mbus_int;</div><div class='add'>+	struct mii_bus *mbus_ext;</div><div class='add'>+</div><div class='add'>+	struct yt921x_port ports[YT921X_PORT_NUM];</div><div class='add'>+</div><div class='add'>+	u16 eee_ports_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dummy.c b/drivers/net/dummy.c<br/>index e9c5e1e11fa0..d6bdad4baadd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dummy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/dummy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dummy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dummy.c</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;linux/u64_stats_sync.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -104,6 +105,7 @@ static void dummy_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;dummy_netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;dummy_ethtool_ops;</div><div class='ctx'> 	dev-&gt;needs_free_netdev = true;</div><div class='add'>+	dev-&gt;request_ops_lock = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Fill in device structure with ethernet-generic values. */</div><div class='ctx'> 	dev-&gt;flags |= IFF_NOARP;</div><div class='hunk'>@@ -168,22 +170,21 @@ static int __init dummy_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i, err = 0;</div><div class='ctx'> </div><div class='del'>-	down_write(&amp;pernet_ops_rwsem);</div><div class='del'>-	rtnl_lock();</div><div class='del'>-	err = __rtnl_link_register(&amp;dummy_link_ops);</div><div class='add'>+	err = rtnl_link_register(&amp;dummy_link_ops);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='del'>-		goto out;</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	rtnl_net_lock(&amp;init_net);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; numdummies &amp;&amp; !err; i++) {</div><div class='ctx'> 		err = dummy_init_one();</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> 	}</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		__rtnl_link_unregister(&amp;dummy_link_ops);</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	rtnl_unlock();</div><div class='del'>-	up_write(&amp;pernet_ops_rwsem);</div><div class='add'>+	rtnl_net_unlock(&amp;init_net);</div><div class='add'>+</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		rtnl_link_unregister(&amp;dummy_link_ops);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/eql.c b/drivers/net/eql.c<br/>index 3c2efda916f1..9ba10efd3794 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/eql.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/eql.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/eql.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/eql.c</a></div><div class='hunk'>@@ -143,7 +143,7 @@ static void eql_kill_one_slave(slave_queue_t *queue, slave_t *slave);</div><div class='ctx'> </div><div class='ctx'> static void eql_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	equalizer_t *eql = from_timer(eql, t, timer);</div><div class='add'>+	equalizer_t *eql = timer_container_of(eql, t, timer);</div><div class='ctx'> 	struct list_head *this, *tmp, *head;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;eql-&gt;queue.lock);</div><div class='hunk'>@@ -254,7 +254,7 @@ static int eql_close(struct net_device *dev)</div><div class='ctx'> 	 *	at the data structure it scans every so often...</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;eql-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;eql-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	eql_kill_slave_queue(&amp;eql-&gt;queue);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/3com/3c515.c b/drivers/net/ethernet/3com/3c515.c<br/>index 4725a8cfd695..2227c83a4862 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c515.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/3com/3c515.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c515.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/3c515.c</a></div><div class='hunk'>@@ -859,7 +859,7 @@ static int corkscrew_open(struct net_device *dev)</div><div class='ctx'> static void corkscrew_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='ctx'> #ifdef AUTOMEDIA</div><div class='del'>-	struct corkscrew_private *vp = from_timer(vp, t, timer);</div><div class='add'>+	struct corkscrew_private *vp = timer_container_of(vp, t, timer);</div><div class='ctx'> 	struct net_device *dev = vp-&gt;our_dev;</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -1414,7 +1414,7 @@ static int corkscrew_close(struct net_device *dev)</div><div class='ctx'> 			dev-&gt;name, rx_nocopy, rx_copy, queued_packet);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;vp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;vp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Turn off statistics ASAP.  We update lp-&gt;stats below. */</div><div class='ctx'> 	outw(StatsDisable, ioaddr + EL3_CMD);</div><div class='hunk'>@@ -1547,9 +1547,8 @@ static const struct ethtool_ops netdev_ethtool_ops = {</div><div class='ctx'> 	.set_msglevel		= netdev_set_msglevel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #ifdef MODULE</div><div class='del'>-void cleanup_module(void)</div><div class='add'>+static void __exit corkscrew_exit_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	while (!list_empty(&amp;root_corkscrew_dev)) {</div><div class='ctx'> 		struct net_device *dev;</div><div class='hunk'>@@ -1563,4 +1562,5 @@ void cleanup_module(void)</div><div class='ctx'> 		free_netdev(dev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+module_exit(corkscrew_exit_module);</div><div class='ctx'> #endif				/* MODULE */</div><div class='head'>diff --git a/drivers/net/ethernet/3com/3c574_cs.c b/drivers/net/ethernet/3com/3c574_cs.c<br/>index dc3b7c960611..1f2070497a75 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c574_cs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/3com/3c574_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c574_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/3c574_cs.c</a></div><div class='hunk'>@@ -858,7 +858,7 @@ static irqreturn_t el3_interrupt(int irq, void *dev_id)</div><div class='ctx'> */</div><div class='ctx'> static void media_check(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct el3_private *lp = from_timer(lp, t, media);</div><div class='add'>+	struct el3_private *lp = timer_container_of(lp, t, media);</div><div class='ctx'> 	struct net_device *dev = lp-&gt;p_dev-&gt;priv;</div><div class='ctx'> 	unsigned int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -1140,7 +1140,7 @@ static int el3_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	link-&gt;open--;</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;media);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;media);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/3com/3c589_cs.c b/drivers/net/ethernet/3com/3c589_cs.c<br/>index be58dac0502a..ea49be43b8c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c589_cs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/3com/3c589_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c589_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/3c589_cs.c</a></div><div class='hunk'>@@ -685,7 +685,7 @@ static irqreturn_t el3_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> static void media_check(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct el3_private *lp = from_timer(lp, t, media);</div><div class='add'>+	struct el3_private *lp = timer_container_of(lp, t, media);</div><div class='ctx'> 	struct net_device *dev = lp-&gt;p_dev-&gt;priv;</div><div class='ctx'> 	unsigned int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	u16 media, errs;</div><div class='hunk'>@@ -946,7 +946,7 @@ static int el3_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	link-&gt;open--;</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;media);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;media);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/3com/3c59x.c b/drivers/net/ethernet/3com/3c59x.c<br/>index 082388bb6169..8c9cc97efd4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c59x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/3com/3c59x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c59x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/3c59x.c</a></div><div class='hunk'>@@ -1302,7 +1302,7 @@ static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq,</div><div class='ctx'> 	if (print_info)</div><div class='ctx'> 		pr_cont(", IRQ %d\n", dev-&gt;irq);</div><div class='ctx'> 	/* Tell them about an invalid IRQ. */</div><div class='del'>-	if (dev-&gt;irq &lt;= 0 || dev-&gt;irq &gt;= nr_irqs)</div><div class='add'>+	if (dev-&gt;irq &lt;= 0 || dev-&gt;irq &gt;= irq_get_nr_irqs())</div><div class='ctx'> 		pr_warn(" *** Warning: IRQ %d is unlikely to work! ***\n",</div><div class='ctx'> 			dev-&gt;irq);</div><div class='ctx'> </div><div class='hunk'>@@ -1783,7 +1783,7 @@ out:</div><div class='ctx'> static void</div><div class='ctx'> vortex_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct vortex_private *vp = from_timer(vp, t, timer);</div><div class='add'>+	struct vortex_private *vp = timer_container_of(vp, t, timer);</div><div class='ctx'> 	struct net_device *dev = vp-&gt;mii.dev;</div><div class='ctx'> 	void __iomem *ioaddr = vp-&gt;ioaddr;</div><div class='ctx'> 	int next_tick = 60*HZ;</div><div class='hunk'>@@ -2691,7 +2691,7 @@ vortex_down(struct net_device *dev, int final_down)</div><div class='ctx'> 	netdev_reset_queue(dev);</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;vp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;vp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Turn off statistics ASAP.  We update dev-&gt;stats below. */</div><div class='ctx'> 	iowrite16(StatsDisable, ioaddr + EL3_CMD);</div><div class='head'>diff --git a/drivers/net/ethernet/8390/axnet_cs.c b/drivers/net/ethernet/8390/axnet_cs.c<br/>index fea489af72fb..7c8213011b5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/axnet_cs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/8390/axnet_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/axnet_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/axnet_cs.c</a></div><div class='hunk'>@@ -504,7 +504,7 @@ static int axnet_close(struct net_device *dev)</div><div class='ctx'>     </div><div class='ctx'>     link-&gt;open--;</div><div class='ctx'>     netif_stop_queue(dev);</div><div class='del'>-    del_timer_sync(&amp;info-&gt;watchdog);</div><div class='add'>+    timer_delete_sync(&amp;info-&gt;watchdog);</div><div class='ctx'> </div><div class='ctx'>     return 0;</div><div class='ctx'> } /* axnet_close */</div><div class='hunk'>@@ -550,7 +550,7 @@ static irqreturn_t ei_irq_wrapper(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> static void ei_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-    struct axnet_dev *info = from_timer(info, t, watchdog);</div><div class='add'>+    struct axnet_dev *info = timer_container_of(info, t, watchdog);</div><div class='ctx'>     struct net_device *dev = info-&gt;p_dev-&gt;priv;</div><div class='ctx'>     unsigned int nic_base = dev-&gt;base_addr;</div><div class='ctx'>     unsigned int mii_addr = nic_base + AXNET_MII_EEP;</div><div class='head'>diff --git a/drivers/net/ethernet/8390/pcnet_cs.c b/drivers/net/ethernet/8390/pcnet_cs.c<br/>index 780fb4afb6af..19f9c5db3f3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/pcnet_cs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/8390/pcnet_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/pcnet_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/pcnet_cs.c</a></div><div class='hunk'>@@ -947,7 +947,7 @@ static int pcnet_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'>     link-&gt;open--;</div><div class='ctx'>     netif_stop_queue(dev);</div><div class='del'>-    del_timer_sync(&amp;info-&gt;watchdog);</div><div class='add'>+    timer_delete_sync(&amp;info-&gt;watchdog);</div><div class='ctx'> </div><div class='ctx'>     return 0;</div><div class='ctx'> } /* pcnet_close */</div><div class='hunk'>@@ -1018,7 +1018,7 @@ static irqreturn_t ei_irq_wrapper(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> static void ei_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-    struct pcnet_dev *info = from_timer(info, t, watchdog);</div><div class='add'>+    struct pcnet_dev *info = timer_container_of(info, t, watchdog);</div><div class='ctx'>     struct net_device *dev = info-&gt;p_dev-&gt;priv;</div><div class='ctx'>     unsigned int nic_base = dev-&gt;base_addr;</div><div class='ctx'>     unsigned int mii_addr = nic_base + DLINK_GPIO;</div><div class='head'>diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig<br/>index 9a542e3c9b05..4a1b368ca7e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/Kconfig</a></div><div class='hunk'>@@ -20,6 +20,7 @@ source "drivers/net/ethernet/actions/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/adaptec/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/aeroflex/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/agere/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/airoha/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/alacritech/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/allwinner/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/alteon/Kconfig"</div><div class='hunk'>@@ -128,6 +129,7 @@ source "drivers/net/ethernet/microchip/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/mscc/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/microsoft/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/moxa/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/mucse/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/myricom/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config FEALNX</div><div class='hunk'>@@ -159,7 +161,7 @@ config ETHOC</div><div class='ctx'> 	  Say Y here if you want to use the OpenCores 10/100 Mbps Ethernet MAC.</div><div class='ctx'> </div><div class='ctx'> config OA_TC6</div><div class='del'>-	tristate "OPEN Alliance TC6 10BASE-T1x MAC-PHY support"</div><div class='add'>+	tristate "OPEN Alliance TC6 10BASE-T1x MAC-PHY support" if COMPILE_TEST</div><div class='ctx'> 	depends on SPI</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	help</div><div class='hunk'>@@ -187,6 +189,7 @@ source "drivers/net/ethernet/sis/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/sfc/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/smsc/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/socionext/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/spacemit/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/stmicro/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/sun/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/sunplus/Kconfig"</div><div class='head'>diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile<br/>index 99fa180dedb8..2e18df8ca8ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/Makefile</a></div><div class='hunk'>@@ -10,6 +10,7 @@ obj-$(CONFIG_NET_VENDOR_ADAPTEC) += adaptec/</div><div class='ctx'> obj-$(CONFIG_GRETH) += aeroflex/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_ADI) += adi/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_AGERE) += agere/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_AIROHA) += airoha/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_ALACRITECH) += alacritech/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_ALLWINNER) += allwinner/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/</div><div class='hunk'>@@ -64,6 +65,7 @@ obj-$(CONFIG_NET_VENDOR_MICREL) += micrel/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_MICROCHIP) += microchip/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_MICROSEMI) += mscc/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_MOXART) += moxa/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_MUCSE) += mucse/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_MYRI) += myricom/</div><div class='ctx'> obj-$(CONFIG_FEALNX) += fealnx.o</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_NATSEMI) += natsemi/</div><div class='hunk'>@@ -90,6 +92,7 @@ obj-$(CONFIG_NET_VENDOR_SOLARFLARE) += sfc/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SGI) += sgi/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SMSC) += smsc/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SOCIONEXT) += socionext/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_SPACEMIT) += spacemit/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_STMICRO) += stmicro/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SUN) += sun/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SUNPLUS) += sunplus/</div><div class='head'>diff --git a/drivers/net/ethernet/actions/owl-emac.c b/drivers/net/ethernet/actions/owl-emac.c<br/>index 115f48b3342c..0a08da799255 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/actions/owl-emac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/actions/owl-emac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/actions/owl-emac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/actions/owl-emac.c</a></div><div class='hunk'>@@ -1325,15 +1325,10 @@ static int owl_emac_mdio_init(struct net_device *netdev)</div><div class='ctx'> 	struct device_node *mdio_node;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mdio_node = of_get_child_by_name(dev-&gt;of_node, "mdio");</div><div class='add'>+	mdio_node = of_get_available_child_by_name(dev-&gt;of_node, "mdio");</div><div class='ctx'> 	if (!mdio_node)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (!of_device_is_available(mdio_node)) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto err_put_node;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	priv-&gt;mii = devm_mdiobus_alloc(dev);</div><div class='ctx'> 	if (!priv-&gt;mii) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='head'>diff --git a/drivers/net/ethernet/adi/adin1110.c b/drivers/net/ethernet/adi/adin1110.c<br/>index 68fad5575fd4..30f9d271e595 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adi/adin1110.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/adi/adin1110.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adi/adin1110.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/adi/adin1110.c</a></div><div class='hunk'>@@ -1599,7 +1599,7 @@ static int adin1110_probe_netdevs(struct adin1110_priv *priv)</div><div class='ctx'> 		netdev-&gt;netdev_ops = &amp;adin1110_netdev_ops;</div><div class='ctx'> 		netdev-&gt;ethtool_ops = &amp;adin1110_ethtool_ops;</div><div class='ctx'> 		netdev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='del'>-		netdev-&gt;netns_local = true;</div><div class='add'>+		netdev-&gt;netns_immutable = true;</div><div class='ctx'> </div><div class='ctx'> 		port_priv-&gt;phydev = get_phy_device(priv-&gt;mii_bus, i + 1, false);</div><div class='ctx'> 		if (IS_ERR(port_priv-&gt;phydev)) {</div><div class='head'>diff --git a/drivers/net/ethernet/agere/et131x.c b/drivers/net/ethernet/agere/et131x.c<br/>index b325e0cef120..5c8217638dda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/agere/et131x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/agere/et131x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/agere/et131x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/agere/et131x.c</a></div><div class='hunk'>@@ -2459,6 +2459,10 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> 							  skb-&gt;data,</div><div class='ctx'> 							  skb_headlen(skb),</div><div class='ctx'> 							  DMA_TO_DEVICE);</div><div class='add'>+				if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+						      dma_addr))</div><div class='add'>+					return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 				desc[frag].addr_lo = lower_32_bits(dma_addr);</div><div class='ctx'> 				desc[frag].addr_hi = upper_32_bits(dma_addr);</div><div class='ctx'> 				frag++;</div><div class='hunk'>@@ -2468,6 +2472,10 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> 							  skb-&gt;data,</div><div class='ctx'> 							  skb_headlen(skb) / 2,</div><div class='ctx'> 							  DMA_TO_DEVICE);</div><div class='add'>+				if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+						      dma_addr))</div><div class='add'>+					return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 				desc[frag].addr_lo = lower_32_bits(dma_addr);</div><div class='ctx'> 				desc[frag].addr_hi = upper_32_bits(dma_addr);</div><div class='ctx'> 				frag++;</div><div class='hunk'>@@ -2478,6 +2486,10 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> 							  skb_headlen(skb) / 2,</div><div class='ctx'> 							  skb_headlen(skb) / 2,</div><div class='ctx'> 							  DMA_TO_DEVICE);</div><div class='add'>+				if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+						      dma_addr))</div><div class='add'>+					goto unmap_first_out;</div><div class='add'>+</div><div class='ctx'> 				desc[frag].addr_lo = lower_32_bits(dma_addr);</div><div class='ctx'> 				desc[frag].addr_hi = upper_32_bits(dma_addr);</div><div class='ctx'> 				frag++;</div><div class='hunk'>@@ -2489,6 +2501,9 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> 						    0,</div><div class='ctx'> 						    desc[frag].len_vlan,</div><div class='ctx'> 						    DMA_TO_DEVICE);</div><div class='add'>+			if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev, dma_addr))</div><div class='add'>+				goto unmap_out;</div><div class='add'>+</div><div class='ctx'> 			desc[frag].addr_lo = lower_32_bits(dma_addr);</div><div class='ctx'> 			desc[frag].addr_hi = upper_32_bits(dma_addr);</div><div class='ctx'> 			frag++;</div><div class='hunk'>@@ -2578,6 +2593,27 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> 		       &amp;adapter-&gt;regs-&gt;global.watchdog_timer);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+unmap_out:</div><div class='add'>+	// Unmap the body of the packet with map_page</div><div class='add'>+	while (--i) {</div><div class='add'>+		frag--;</div><div class='add'>+		dma_addr = desc[frag].addr_lo;</div><div class='add'>+		dma_addr |= (u64)desc[frag].addr_hi &lt;&lt; 32;</div><div class='add'>+		dma_unmap_page(&amp;adapter-&gt;pdev-&gt;dev, dma_addr,</div><div class='add'>+			       desc[frag].len_vlan, DMA_TO_DEVICE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unmap_first_out:</div><div class='add'>+	// Unmap the header with map_single</div><div class='add'>+	while (frag--) {</div><div class='add'>+		dma_addr = desc[frag].addr_lo;</div><div class='add'>+		dma_addr |= (u64)desc[frag].addr_hi &lt;&lt; 32;</div><div class='add'>+		dma_unmap_single(&amp;adapter-&gt;pdev-&gt;dev, dma_addr,</div><div class='add'>+				 desc[frag].len_vlan, DMA_TO_DEVICE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int send_packet(struct sk_buff *skb, struct et131x_adapter *adapter)</div><div class='hunk'>@@ -3076,7 +3112,8 @@ err_out:</div><div class='ctx'>  */</div><div class='ctx'> static void et131x_error_timer_handler(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct et131x_adapter *adapter = from_timer(adapter, t, error_timer);</div><div class='add'>+	struct et131x_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							    error_timer);</div><div class='ctx'> 	struct phy_device *phydev = adapter-&gt;netdev-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	if (et1310_in_phy_coma(adapter)) {</div><div class='hunk'>@@ -3639,7 +3676,7 @@ static int et131x_close(struct net_device *netdev)</div><div class='ctx'> 	free_irq(adapter-&gt;pdev-&gt;irq, netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the error timer */</div><div class='del'>-	return del_timer_sync(&amp;adapter-&gt;error_timer);</div><div class='add'>+	return timer_delete_sync(&amp;adapter-&gt;error_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* et131x_set_packet_filter - Configures the Rx Packet filtering */</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/Kconfig b/drivers/net/ethernet/airoha/Kconfig<br/>new file mode 100644<br/>index 000000000000..ad3ce501e7a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config NET_VENDOR_AIROHA</div><div class='add'>+	bool "Airoha devices"</div><div class='add'>+	depends on ARCH_AIROHA || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  If you have a Airoha SoC with ethernet, say Y.</div><div class='add'>+</div><div class='add'>+if NET_VENDOR_AIROHA</div><div class='add'>+</div><div class='add'>+config NET_AIROHA_NPU</div><div class='add'>+	tristate "Airoha NPU support"</div><div class='add'>+	select WANT_DEV_COREDUMP</div><div class='add'>+	select REGMAP_MMIO</div><div class='add'>+	help</div><div class='add'>+	  This driver supports Airoha Network Processor (NPU) available</div><div class='add'>+	  on the Airoha Soc family.</div><div class='add'>+</div><div class='add'>+config NET_AIROHA</div><div class='add'>+	tristate "Airoha SoC Gigabit Ethernet support"</div><div class='add'>+	depends on NET_DSA || !NET_DSA</div><div class='add'>+	select NET_AIROHA_NPU</div><div class='add'>+	select PAGE_POOL</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the gigabit ethernet MACs in the</div><div class='add'>+	  Airoha SoC family.</div><div class='add'>+</div><div class='add'>+config NET_AIROHA_FLOW_STATS</div><div class='add'>+	default y</div><div class='add'>+	bool "Airoha flow stats"</div><div class='add'>+	depends on NET_AIROHA &amp;&amp; NET_AIROHA_NPU</div><div class='add'>+	help</div><div class='add'>+	  Enable Aiorha flowtable statistic counters.</div><div class='add'>+</div><div class='add'>+endif #NET_VENDOR_AIROHA</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/Makefile b/drivers/net/ethernet/airoha/Makefile<br/>new file mode 100644<br/>index 000000000000..94468053e34b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/Makefile</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Airoha for the Mediatek SoCs built-in ethernet macs</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_NET_AIROHA) += airoha-eth.o</div><div class='add'>+airoha-eth-y := airoha_eth.o airoha_ppe.o</div><div class='add'>+airoha-eth-$(CONFIG_DEBUG_FS) += airoha_ppe_debugfs.o</div><div class='add'>+obj-$(CONFIG_NET_AIROHA_NPU) += airoha_npu.o</div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c<br/>index 6c683a12d5aa..75893c90a0a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/airoha_eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/airoha_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_eth.c</a></div><div class='hunk'>@@ -3,841 +3,31 @@</div><div class='ctx'>  * Copyright (c) 2024 AIROHA Inc</div><div class='ctx'>  * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='ctx'>  */</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/iopoll.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_reserved_mem.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/reset.h&gt;</div><div class='ctx'> #include &lt;linux/tcp.h&gt;</div><div class='ctx'> #include &lt;linux/u64_stats_sync.h&gt;</div><div class='del'>-#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;net/dst_metadata.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='add'>+#include &lt;net/pkt_cls.h&gt;</div><div class='ctx'> #include &lt;uapi/linux/ppp_defs.h&gt;</div><div class='ctx'> </div><div class='del'>-#define AIROHA_MAX_NUM_GDM_PORTS	1</div><div class='del'>-#define AIROHA_MAX_NUM_QDMA		2</div><div class='del'>-#define AIROHA_MAX_NUM_RSTS		3</div><div class='del'>-#define AIROHA_MAX_NUM_XSI_RSTS		5</div><div class='del'>-#define AIROHA_MAX_MTU			2000</div><div class='del'>-#define AIROHA_MAX_PACKET_SIZE		2048</div><div class='del'>-#define AIROHA_NUM_TX_RING		32</div><div class='del'>-#define AIROHA_NUM_RX_RING		32</div><div class='del'>-#define AIROHA_FE_MC_MAX_VLAN_TABLE	64</div><div class='del'>-#define AIROHA_FE_MC_MAX_VLAN_PORT	16</div><div class='del'>-#define AIROHA_NUM_TX_IRQ		2</div><div class='del'>-#define HW_DSCP_NUM			2048</div><div class='del'>-#define IRQ_QUEUE_LEN(_n)		((_n) ? 1024 : 2048)</div><div class='del'>-#define TX_DSCP_NUM			1024</div><div class='del'>-#define RX_DSCP_NUM(_n)			\</div><div class='del'>-	((_n) ==  2 ? 128 :		\</div><div class='del'>-	 (_n) == 11 ? 128 :		\</div><div class='del'>-	 (_n) == 15 ? 128 :		\</div><div class='del'>-	 (_n) ==  0 ? 1024 : 16)</div><div class='del'>-</div><div class='del'>-#define PSE_RSV_PAGES			128</div><div class='del'>-#define PSE_QUEUE_RSV_PAGES		64</div><div class='del'>-</div><div class='del'>-/* FE */</div><div class='del'>-#define PSE_BASE			0x0100</div><div class='del'>-#define CSR_IFC_BASE			0x0200</div><div class='del'>-#define CDM1_BASE			0x0400</div><div class='del'>-#define GDM1_BASE			0x0500</div><div class='del'>-#define PPE1_BASE			0x0c00</div><div class='del'>-</div><div class='del'>-#define CDM2_BASE			0x1400</div><div class='del'>-#define GDM2_BASE			0x1500</div><div class='del'>-</div><div class='del'>-#define GDM3_BASE			0x1100</div><div class='del'>-#define GDM4_BASE			0x2500</div><div class='del'>-</div><div class='del'>-#define GDM_BASE(_n)			\</div><div class='del'>-	((_n) == 4 ? GDM4_BASE :	\</div><div class='del'>-	 (_n) == 3 ? GDM3_BASE :	\</div><div class='del'>-	 (_n) == 2 ? GDM2_BASE : GDM1_BASE)</div><div class='del'>-</div><div class='del'>-#define REG_FE_DMA_GLO_CFG		0x0000</div><div class='del'>-#define FE_DMA_GLO_L2_SPACE_MASK	GENMASK(7, 4)</div><div class='del'>-#define FE_DMA_GLO_PG_SZ_MASK		BIT(3)</div><div class='del'>-</div><div class='del'>-#define REG_FE_RST_GLO_CFG		0x0004</div><div class='del'>-#define FE_RST_GDM4_MBI_ARB_MASK	BIT(3)</div><div class='del'>-#define FE_RST_GDM3_MBI_ARB_MASK	BIT(2)</div><div class='del'>-#define FE_RST_CORE_MASK		BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_FE_WAN_MAC_H		0x0030</div><div class='del'>-#define REG_FE_LAN_MAC_H		0x0040</div><div class='del'>-</div><div class='del'>-#define REG_FE_MAC_LMIN(_n)		((_n) + 0x04)</div><div class='del'>-#define REG_FE_MAC_LMAX(_n)		((_n) + 0x08)</div><div class='del'>-</div><div class='del'>-#define REG_FE_CDM1_OQ_MAP0		0x0050</div><div class='del'>-#define REG_FE_CDM1_OQ_MAP1		0x0054</div><div class='del'>-#define REG_FE_CDM1_OQ_MAP2		0x0058</div><div class='del'>-#define REG_FE_CDM1_OQ_MAP3		0x005c</div><div class='del'>-</div><div class='del'>-#define REG_FE_PCE_CFG			0x0070</div><div class='del'>-#define PCE_DPI_EN_MASK			BIT(2)</div><div class='del'>-#define PCE_KA_EN_MASK			BIT(1)</div><div class='del'>-#define PCE_MC_EN_MASK			BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_FE_PSE_QUEUE_CFG_WR		0x0080</div><div class='del'>-#define PSE_CFG_PORT_ID_MASK		GENMASK(27, 24)</div><div class='del'>-#define PSE_CFG_QUEUE_ID_MASK		GENMASK(20, 16)</div><div class='del'>-#define PSE_CFG_WR_EN_MASK		BIT(8)</div><div class='del'>-#define PSE_CFG_OQRSV_SEL_MASK		BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_FE_PSE_QUEUE_CFG_VAL	0x0084</div><div class='del'>-#define PSE_CFG_OQ_RSV_MASK		GENMASK(13, 0)</div><div class='del'>-</div><div class='del'>-#define PSE_FQ_CFG			0x008c</div><div class='del'>-#define PSE_FQ_LIMIT_MASK		GENMASK(14, 0)</div><div class='del'>-</div><div class='del'>-#define REG_FE_PSE_BUF_SET		0x0090</div><div class='del'>-#define PSE_SHARE_USED_LTHD_MASK	GENMASK(31, 16)</div><div class='del'>-#define PSE_ALLRSV_MASK			GENMASK(14, 0)</div><div class='del'>-</div><div class='del'>-#define REG_PSE_SHARE_USED_THD		0x0094</div><div class='del'>-#define PSE_SHARE_USED_MTHD_MASK	GENMASK(31, 16)</div><div class='del'>-#define PSE_SHARE_USED_HTHD_MASK	GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_GDM_MISC_CFG		0x0148</div><div class='del'>-#define GDM2_RDM_ACK_WAIT_PREF_MASK	BIT(9)</div><div class='del'>-#define GDM2_CHN_VLD_MODE_MASK		BIT(5)</div><div class='del'>-</div><div class='del'>-#define REG_FE_CSR_IFC_CFG		CSR_IFC_BASE</div><div class='del'>-#define FE_IFC_EN_MASK			BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_FE_VIP_PORT_EN		0x01f0</div><div class='del'>-#define REG_FE_IFC_PORT_EN		0x01f4</div><div class='del'>-</div><div class='del'>-#define REG_PSE_IQ_REV1			(PSE_BASE + 0x08)</div><div class='del'>-#define PSE_IQ_RES1_P2_MASK		GENMASK(23, 16)</div><div class='del'>-</div><div class='del'>-#define REG_PSE_IQ_REV2			(PSE_BASE + 0x0c)</div><div class='del'>-#define PSE_IQ_RES2_P5_MASK		GENMASK(15, 8)</div><div class='del'>-#define PSE_IQ_RES2_P4_MASK		GENMASK(7, 0)</div><div class='del'>-</div><div class='del'>-#define REG_FE_VIP_EN(_n)		(0x0300 + ((_n) &lt;&lt; 3))</div><div class='del'>-#define PATN_FCPU_EN_MASK		BIT(7)</div><div class='del'>-#define PATN_SWP_EN_MASK		BIT(6)</div><div class='del'>-#define PATN_DP_EN_MASK			BIT(5)</div><div class='del'>-#define PATN_SP_EN_MASK			BIT(4)</div><div class='del'>-#define PATN_TYPE_MASK			GENMASK(3, 1)</div><div class='del'>-#define PATN_EN_MASK			BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_FE_VIP_PATN(_n)		(0x0304 + ((_n) &lt;&lt; 3))</div><div class='del'>-#define PATN_DP_MASK			GENMASK(31, 16)</div><div class='del'>-#define PATN_SP_MASK			GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_CDM1_VLAN_CTRL		CDM1_BASE</div><div class='del'>-#define CDM1_VLAN_MASK			GENMASK(31, 16)</div><div class='del'>-</div><div class='del'>-#define REG_CDM1_FWD_CFG		(CDM1_BASE + 0x08)</div><div class='del'>-#define CDM1_VIP_QSEL_MASK		GENMASK(24, 20)</div><div class='del'>-</div><div class='del'>-#define REG_CDM1_CRSN_QSEL(_n)		(CDM1_BASE + 0x10 + ((_n) &lt;&lt; 2))</div><div class='del'>-#define CDM1_CRSN_QSEL_REASON_MASK(_n)	\</div><div class='del'>-	GENMASK(4 + (((_n) % 4) &lt;&lt; 3),	(((_n) % 4) &lt;&lt; 3))</div><div class='del'>-</div><div class='del'>-#define REG_CDM2_FWD_CFG		(CDM2_BASE + 0x08)</div><div class='del'>-#define CDM2_OAM_QSEL_MASK		GENMASK(31, 27)</div><div class='del'>-#define CDM2_VIP_QSEL_MASK		GENMASK(24, 20)</div><div class='del'>-</div><div class='del'>-#define REG_CDM2_CRSN_QSEL(_n)		(CDM2_BASE + 0x10 + ((_n) &lt;&lt; 2))</div><div class='del'>-#define CDM2_CRSN_QSEL_REASON_MASK(_n)	\</div><div class='del'>-	GENMASK(4 + (((_n) % 4) &lt;&lt; 3),	(((_n) % 4) &lt;&lt; 3))</div><div class='del'>-</div><div class='del'>-#define REG_GDM_FWD_CFG(_n)		GDM_BASE(_n)</div><div class='del'>-#define GDM_DROP_CRC_ERR		BIT(23)</div><div class='del'>-#define GDM_IP4_CKSUM			BIT(22)</div><div class='del'>-#define GDM_TCP_CKSUM			BIT(21)</div><div class='del'>-#define GDM_UDP_CKSUM			BIT(20)</div><div class='del'>-#define GDM_UCFQ_MASK			GENMASK(15, 12)</div><div class='del'>-#define GDM_BCFQ_MASK			GENMASK(11, 8)</div><div class='del'>-#define GDM_MCFQ_MASK			GENMASK(7, 4)</div><div class='del'>-#define GDM_OCFQ_MASK			GENMASK(3, 0)</div><div class='del'>-</div><div class='del'>-#define REG_GDM_INGRESS_CFG(_n)		(GDM_BASE(_n) + 0x10)</div><div class='del'>-#define GDM_INGRESS_FC_EN_MASK		BIT(1)</div><div class='del'>-#define GDM_STAG_EN_MASK		BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_GDM_LEN_CFG(_n)		(GDM_BASE(_n) + 0x14)</div><div class='del'>-#define GDM_SHORT_LEN_MASK		GENMASK(13, 0)</div><div class='del'>-#define GDM_LONG_LEN_MASK		GENMASK(29, 16)</div><div class='del'>-</div><div class='del'>-#define REG_FE_CPORT_CFG		(GDM1_BASE + 0x40)</div><div class='del'>-#define FE_CPORT_PAD			BIT(26)</div><div class='del'>-#define FE_CPORT_PORT_XFC_MASK		BIT(25)</div><div class='del'>-#define FE_CPORT_QUEUE_XFC_MASK		BIT(24)</div><div class='del'>-</div><div class='del'>-#define REG_FE_GDM_MIB_CLEAR(_n)	(GDM_BASE(_n) + 0xf0)</div><div class='del'>-#define FE_GDM_MIB_RX_CLEAR_MASK	BIT(1)</div><div class='del'>-#define FE_GDM_MIB_TX_CLEAR_MASK	BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_FE_GDM1_MIB_CFG		(GDM1_BASE + 0xf4)</div><div class='del'>-#define FE_STRICT_RFC2819_MODE_MASK	BIT(31)</div><div class='del'>-#define FE_GDM1_TX_MIB_SPLIT_EN_MASK	BIT(17)</div><div class='del'>-#define FE_GDM1_RX_MIB_SPLIT_EN_MASK	BIT(16)</div><div class='del'>-#define FE_TX_MIB_ID_MASK		GENMASK(15, 8)</div><div class='del'>-#define FE_RX_MIB_ID_MASK		GENMASK(7, 0)</div><div class='del'>-</div><div class='del'>-#define REG_FE_GDM_TX_OK_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x104)</div><div class='del'>-#define REG_FE_GDM_TX_OK_BYTE_CNT_L(_n)		(GDM_BASE(_n) + 0x10c)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x110)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_BYTE_CNT_L(_n)	(GDM_BASE(_n) + 0x114)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_DROP_CNT(_n)		(GDM_BASE(_n) + 0x118)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_BC_CNT(_n)		(GDM_BASE(_n) + 0x11c)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_MC_CNT(_n)		(GDM_BASE(_n) + 0x120)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_RUNT_CNT(_n)		(GDM_BASE(_n) + 0x124)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_LONG_CNT(_n)		(GDM_BASE(_n) + 0x128)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_E64_CNT_L(_n)		(GDM_BASE(_n) + 0x12c)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_L64_CNT_L(_n)		(GDM_BASE(_n) + 0x130)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_L127_CNT_L(_n)	(GDM_BASE(_n) + 0x134)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_L255_CNT_L(_n)	(GDM_BASE(_n) + 0x138)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_L511_CNT_L(_n)	(GDM_BASE(_n) + 0x13c)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_L1023_CNT_L(_n)	(GDM_BASE(_n) + 0x140)</div><div class='del'>-</div><div class='del'>-#define REG_FE_GDM_RX_OK_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x148)</div><div class='del'>-#define REG_FE_GDM_RX_FC_DROP_CNT(_n)		(GDM_BASE(_n) + 0x14c)</div><div class='del'>-#define REG_FE_GDM_RX_RC_DROP_CNT(_n)		(GDM_BASE(_n) + 0x150)</div><div class='del'>-#define REG_FE_GDM_RX_OVERFLOW_DROP_CNT(_n)	(GDM_BASE(_n) + 0x154)</div><div class='del'>-#define REG_FE_GDM_RX_ERROR_DROP_CNT(_n)	(GDM_BASE(_n) + 0x158)</div><div class='del'>-#define REG_FE_GDM_RX_OK_BYTE_CNT_L(_n)		(GDM_BASE(_n) + 0x15c)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x160)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_BYTE_CNT_L(_n)	(GDM_BASE(_n) + 0x164)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_DROP_CNT(_n)		(GDM_BASE(_n) + 0x168)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_BC_CNT(_n)		(GDM_BASE(_n) + 0x16c)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_MC_CNT(_n)		(GDM_BASE(_n) + 0x170)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_CRC_ERR_CNT(_n)	(GDM_BASE(_n) + 0x174)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_FRAG_CNT(_n)		(GDM_BASE(_n) + 0x178)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_JABBER_CNT(_n)	(GDM_BASE(_n) + 0x17c)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_RUNT_CNT(_n)		(GDM_BASE(_n) + 0x180)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_LONG_CNT(_n)		(GDM_BASE(_n) + 0x184)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_E64_CNT_L(_n)		(GDM_BASE(_n) + 0x188)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_L64_CNT_L(_n)		(GDM_BASE(_n) + 0x18c)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_L127_CNT_L(_n)	(GDM_BASE(_n) + 0x190)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_L255_CNT_L(_n)	(GDM_BASE(_n) + 0x194)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_L511_CNT_L(_n)	(GDM_BASE(_n) + 0x198)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_L1023_CNT_L(_n)	(GDM_BASE(_n) + 0x19c)</div><div class='del'>-</div><div class='del'>-#define REG_PPE1_TB_HASH_CFG		(PPE1_BASE + 0x250)</div><div class='del'>-#define PPE1_SRAM_TABLE_EN_MASK		BIT(0)</div><div class='del'>-#define PPE1_SRAM_HASH1_EN_MASK		BIT(8)</div><div class='del'>-#define PPE1_DRAM_TABLE_EN_MASK		BIT(16)</div><div class='del'>-#define PPE1_DRAM_HASH1_EN_MASK		BIT(24)</div><div class='del'>-</div><div class='del'>-#define REG_FE_GDM_TX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x280)</div><div class='del'>-#define REG_FE_GDM_TX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x284)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x288)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x28c)</div><div class='del'>-</div><div class='del'>-#define REG_FE_GDM_RX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x290)</div><div class='del'>-#define REG_FE_GDM_RX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x294)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x298)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x29c)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2b8)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2bc)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2c0)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2c4)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2c8)</div><div class='del'>-#define REG_FE_GDM_TX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2cc)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2e8)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2ec)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2f0)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2f4)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2f8)</div><div class='del'>-#define REG_FE_GDM_RX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2fc)</div><div class='del'>-</div><div class='del'>-#define REG_GDM2_CHN_RLS		(GDM2_BASE + 0x20)</div><div class='del'>-#define MBI_RX_AGE_SEL_MASK		GENMASK(26, 25)</div><div class='del'>-#define MBI_TX_AGE_SEL_MASK		GENMASK(18, 17)</div><div class='del'>-</div><div class='del'>-#define REG_GDM3_FWD_CFG		GDM3_BASE</div><div class='del'>-#define GDM3_PAD_EN_MASK		BIT(28)</div><div class='del'>-</div><div class='del'>-#define REG_GDM4_FWD_CFG		(GDM4_BASE + 0x100)</div><div class='del'>-#define GDM4_PAD_EN_MASK		BIT(28)</div><div class='del'>-#define GDM4_SPORT_OFFSET0_MASK		GENMASK(11, 8)</div><div class='del'>-</div><div class='del'>-#define REG_GDM4_SRC_PORT_SET		(GDM4_BASE + 0x33c)</div><div class='del'>-#define GDM4_SPORT_OFF2_MASK		GENMASK(19, 16)</div><div class='del'>-#define GDM4_SPORT_OFF1_MASK		GENMASK(15, 12)</div><div class='del'>-#define GDM4_SPORT_OFF0_MASK		GENMASK(11, 8)</div><div class='del'>-</div><div class='del'>-#define REG_IP_FRAG_FP			0x2010</div><div class='del'>-#define IP_ASSEMBLE_PORT_MASK		GENMASK(24, 21)</div><div class='del'>-#define IP_ASSEMBLE_NBQ_MASK		GENMASK(20, 16)</div><div class='del'>-#define IP_FRAGMENT_PORT_MASK		GENMASK(8, 5)</div><div class='del'>-#define IP_FRAGMENT_NBQ_MASK		GENMASK(4, 0)</div><div class='del'>-</div><div class='del'>-#define REG_MC_VLAN_EN			0x2100</div><div class='del'>-#define MC_VLAN_EN_MASK			BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_MC_VLAN_CFG			0x2104</div><div class='del'>-#define MC_VLAN_CFG_CMD_DONE_MASK	BIT(31)</div><div class='del'>-#define MC_VLAN_CFG_TABLE_ID_MASK	GENMASK(21, 16)</div><div class='del'>-#define MC_VLAN_CFG_PORT_ID_MASK	GENMASK(11, 8)</div><div class='del'>-#define MC_VLAN_CFG_TABLE_SEL_MASK	BIT(4)</div><div class='del'>-#define MC_VLAN_CFG_RW_MASK		BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_MC_VLAN_DATA		0x2108</div><div class='del'>-</div><div class='del'>-#define REG_CDM5_RX_OQ1_DROP_CNT	0x29d4</div><div class='del'>-</div><div class='del'>-/* QDMA */</div><div class='del'>-#define REG_QDMA_GLOBAL_CFG			0x0004</div><div class='del'>-#define GLOBAL_CFG_RX_2B_OFFSET_MASK		BIT(31)</div><div class='del'>-#define GLOBAL_CFG_DMA_PREFERENCE_MASK		GENMASK(30, 29)</div><div class='del'>-#define GLOBAL_CFG_CPU_TXR_RR_MASK		BIT(28)</div><div class='del'>-#define GLOBAL_CFG_DSCP_BYTE_SWAP_MASK		BIT(27)</div><div class='del'>-#define GLOBAL_CFG_PAYLOAD_BYTE_SWAP_MASK	BIT(26)</div><div class='del'>-#define GLOBAL_CFG_MULTICAST_MODIFY_FP_MASK	BIT(25)</div><div class='del'>-#define GLOBAL_CFG_OAM_MODIFY_MASK		BIT(24)</div><div class='del'>-#define GLOBAL_CFG_RESET_MASK			BIT(23)</div><div class='del'>-#define GLOBAL_CFG_RESET_DONE_MASK		BIT(22)</div><div class='del'>-#define GLOBAL_CFG_MULTICAST_EN_MASK		BIT(21)</div><div class='del'>-#define GLOBAL_CFG_IRQ1_EN_MASK			BIT(20)</div><div class='del'>-#define GLOBAL_CFG_IRQ0_EN_MASK			BIT(19)</div><div class='del'>-#define GLOBAL_CFG_LOOPCNT_EN_MASK		BIT(18)</div><div class='del'>-#define GLOBAL_CFG_RD_BYPASS_WR_MASK		BIT(17)</div><div class='del'>-#define GLOBAL_CFG_QDMA_LOOPBACK_MASK		BIT(16)</div><div class='del'>-#define GLOBAL_CFG_LPBK_RXQ_SEL_MASK		GENMASK(13, 8)</div><div class='del'>-#define GLOBAL_CFG_CHECK_DONE_MASK		BIT(7)</div><div class='del'>-#define GLOBAL_CFG_TX_WB_DONE_MASK		BIT(6)</div><div class='del'>-#define GLOBAL_CFG_MAX_ISSUE_NUM_MASK		GENMASK(5, 4)</div><div class='del'>-#define GLOBAL_CFG_RX_DMA_BUSY_MASK		BIT(3)</div><div class='del'>-#define GLOBAL_CFG_RX_DMA_EN_MASK		BIT(2)</div><div class='del'>-#define GLOBAL_CFG_TX_DMA_BUSY_MASK		BIT(1)</div><div class='del'>-#define GLOBAL_CFG_TX_DMA_EN_MASK		BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_FWD_DSCP_BASE			0x0010</div><div class='del'>-#define REG_FWD_BUF_BASE			0x0014</div><div class='del'>-</div><div class='del'>-#define REG_HW_FWD_DSCP_CFG			0x0018</div><div class='del'>-#define HW_FWD_DSCP_PAYLOAD_SIZE_MASK		GENMASK(29, 28)</div><div class='del'>-#define HW_FWD_DSCP_SCATTER_LEN_MASK		GENMASK(17, 16)</div><div class='del'>-#define HW_FWD_DSCP_MIN_SCATTER_LEN_MASK	GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_INT_STATUS(_n)		\</div><div class='del'>-	(((_n) == 4) ? 0x0730 :		\</div><div class='del'>-	 ((_n) == 3) ? 0x0724 :		\</div><div class='del'>-	 ((_n) == 2) ? 0x0720 :		\</div><div class='del'>-	 ((_n) == 1) ? 0x0024 : 0x0020)</div><div class='del'>-</div><div class='del'>-#define REG_INT_ENABLE(_n)		\</div><div class='del'>-	(((_n) == 4) ? 0x0750 :		\</div><div class='del'>-	 ((_n) == 3) ? 0x0744 :		\</div><div class='del'>-	 ((_n) == 2) ? 0x0740 :		\</div><div class='del'>-	 ((_n) == 1) ? 0x002c : 0x0028)</div><div class='del'>-</div><div class='del'>-/* QDMA_CSR_INT_ENABLE1 */</div><div class='del'>-#define RX15_COHERENT_INT_MASK		BIT(31)</div><div class='del'>-#define RX14_COHERENT_INT_MASK		BIT(30)</div><div class='del'>-#define RX13_COHERENT_INT_MASK		BIT(29)</div><div class='del'>-#define RX12_COHERENT_INT_MASK		BIT(28)</div><div class='del'>-#define RX11_COHERENT_INT_MASK		BIT(27)</div><div class='del'>-#define RX10_COHERENT_INT_MASK		BIT(26)</div><div class='del'>-#define RX9_COHERENT_INT_MASK		BIT(25)</div><div class='del'>-#define RX8_COHERENT_INT_MASK		BIT(24)</div><div class='del'>-#define RX7_COHERENT_INT_MASK		BIT(23)</div><div class='del'>-#define RX6_COHERENT_INT_MASK		BIT(22)</div><div class='del'>-#define RX5_COHERENT_INT_MASK		BIT(21)</div><div class='del'>-#define RX4_COHERENT_INT_MASK		BIT(20)</div><div class='del'>-#define RX3_COHERENT_INT_MASK		BIT(19)</div><div class='del'>-#define RX2_COHERENT_INT_MASK		BIT(18)</div><div class='del'>-#define RX1_COHERENT_INT_MASK		BIT(17)</div><div class='del'>-#define RX0_COHERENT_INT_MASK		BIT(16)</div><div class='del'>-#define TX7_COHERENT_INT_MASK		BIT(15)</div><div class='del'>-#define TX6_COHERENT_INT_MASK		BIT(14)</div><div class='del'>-#define TX5_COHERENT_INT_MASK		BIT(13)</div><div class='del'>-#define TX4_COHERENT_INT_MASK		BIT(12)</div><div class='del'>-#define TX3_COHERENT_INT_MASK		BIT(11)</div><div class='del'>-#define TX2_COHERENT_INT_MASK		BIT(10)</div><div class='del'>-#define TX1_COHERENT_INT_MASK		BIT(9)</div><div class='del'>-#define TX0_COHERENT_INT_MASK		BIT(8)</div><div class='del'>-#define CNT_OVER_FLOW_INT_MASK		BIT(7)</div><div class='del'>-#define IRQ1_FULL_INT_MASK		BIT(5)</div><div class='del'>-#define IRQ1_INT_MASK			BIT(4)</div><div class='del'>-#define HWFWD_DSCP_LOW_INT_MASK		BIT(3)</div><div class='del'>-#define HWFWD_DSCP_EMPTY_INT_MASK	BIT(2)</div><div class='del'>-#define IRQ0_FULL_INT_MASK		BIT(1)</div><div class='del'>-#define IRQ0_INT_MASK			BIT(0)</div><div class='del'>-</div><div class='del'>-#define TX_DONE_INT_MASK(_n)					\</div><div class='del'>-	((_n) ? IRQ1_INT_MASK | IRQ1_FULL_INT_MASK		\</div><div class='del'>-	      : IRQ0_INT_MASK | IRQ0_FULL_INT_MASK)</div><div class='del'>-</div><div class='del'>-#define INT_TX_MASK						\</div><div class='del'>-	(IRQ1_INT_MASK | IRQ1_FULL_INT_MASK |			\</div><div class='del'>-	 IRQ0_INT_MASK | IRQ0_FULL_INT_MASK)</div><div class='del'>-</div><div class='del'>-#define INT_IDX0_MASK						\</div><div class='del'>-	(TX0_COHERENT_INT_MASK | TX1_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX2_COHERENT_INT_MASK | TX3_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX4_COHERENT_INT_MASK | TX5_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX6_COHERENT_INT_MASK | TX7_COHERENT_INT_MASK |	\</div><div class='del'>-	 RX0_COHERENT_INT_MASK | RX1_COHERENT_INT_MASK |	\</div><div class='del'>-	 RX2_COHERENT_INT_MASK | RX3_COHERENT_INT_MASK |	\</div><div class='del'>-	 RX4_COHERENT_INT_MASK | RX7_COHERENT_INT_MASK |	\</div><div class='del'>-	 RX8_COHERENT_INT_MASK | RX9_COHERENT_INT_MASK |	\</div><div class='del'>-	 RX15_COHERENT_INT_MASK | INT_TX_MASK)</div><div class='del'>-</div><div class='del'>-/* QDMA_CSR_INT_ENABLE2 */</div><div class='del'>-#define RX15_NO_CPU_DSCP_INT_MASK	BIT(31)</div><div class='del'>-#define RX14_NO_CPU_DSCP_INT_MASK	BIT(30)</div><div class='del'>-#define RX13_NO_CPU_DSCP_INT_MASK	BIT(29)</div><div class='del'>-#define RX12_NO_CPU_DSCP_INT_MASK	BIT(28)</div><div class='del'>-#define RX11_NO_CPU_DSCP_INT_MASK	BIT(27)</div><div class='del'>-#define RX10_NO_CPU_DSCP_INT_MASK	BIT(26)</div><div class='del'>-#define RX9_NO_CPU_DSCP_INT_MASK	BIT(25)</div><div class='del'>-#define RX8_NO_CPU_DSCP_INT_MASK	BIT(24)</div><div class='del'>-#define RX7_NO_CPU_DSCP_INT_MASK	BIT(23)</div><div class='del'>-#define RX6_NO_CPU_DSCP_INT_MASK	BIT(22)</div><div class='del'>-#define RX5_NO_CPU_DSCP_INT_MASK	BIT(21)</div><div class='del'>-#define RX4_NO_CPU_DSCP_INT_MASK	BIT(20)</div><div class='del'>-#define RX3_NO_CPU_DSCP_INT_MASK	BIT(19)</div><div class='del'>-#define RX2_NO_CPU_DSCP_INT_MASK	BIT(18)</div><div class='del'>-#define RX1_NO_CPU_DSCP_INT_MASK	BIT(17)</div><div class='del'>-#define RX0_NO_CPU_DSCP_INT_MASK	BIT(16)</div><div class='del'>-#define RX15_DONE_INT_MASK		BIT(15)</div><div class='del'>-#define RX14_DONE_INT_MASK		BIT(14)</div><div class='del'>-#define RX13_DONE_INT_MASK		BIT(13)</div><div class='del'>-#define RX12_DONE_INT_MASK		BIT(12)</div><div class='del'>-#define RX11_DONE_INT_MASK		BIT(11)</div><div class='del'>-#define RX10_DONE_INT_MASK		BIT(10)</div><div class='del'>-#define RX9_DONE_INT_MASK		BIT(9)</div><div class='del'>-#define RX8_DONE_INT_MASK		BIT(8)</div><div class='del'>-#define RX7_DONE_INT_MASK		BIT(7)</div><div class='del'>-#define RX6_DONE_INT_MASK		BIT(6)</div><div class='del'>-#define RX5_DONE_INT_MASK		BIT(5)</div><div class='del'>-#define RX4_DONE_INT_MASK		BIT(4)</div><div class='del'>-#define RX3_DONE_INT_MASK		BIT(3)</div><div class='del'>-#define RX2_DONE_INT_MASK		BIT(2)</div><div class='del'>-#define RX1_DONE_INT_MASK		BIT(1)</div><div class='del'>-#define RX0_DONE_INT_MASK		BIT(0)</div><div class='del'>-</div><div class='del'>-#define RX_DONE_INT_MASK					\</div><div class='del'>-	(RX0_DONE_INT_MASK | RX1_DONE_INT_MASK |		\</div><div class='del'>-	 RX2_DONE_INT_MASK | RX3_DONE_INT_MASK |		\</div><div class='del'>-	 RX4_DONE_INT_MASK | RX7_DONE_INT_MASK |		\</div><div class='del'>-	 RX8_DONE_INT_MASK | RX9_DONE_INT_MASK |		\</div><div class='del'>-	 RX15_DONE_INT_MASK)</div><div class='del'>-#define INT_IDX1_MASK						\</div><div class='del'>-	(RX_DONE_INT_MASK |					\</div><div class='del'>-	 RX0_NO_CPU_DSCP_INT_MASK | RX1_NO_CPU_DSCP_INT_MASK |	\</div><div class='del'>-	 RX2_NO_CPU_DSCP_INT_MASK | RX3_NO_CPU_DSCP_INT_MASK |	\</div><div class='del'>-	 RX4_NO_CPU_DSCP_INT_MASK | RX7_NO_CPU_DSCP_INT_MASK |	\</div><div class='del'>-	 RX8_NO_CPU_DSCP_INT_MASK | RX9_NO_CPU_DSCP_INT_MASK |	\</div><div class='del'>-	 RX15_NO_CPU_DSCP_INT_MASK)</div><div class='del'>-</div><div class='del'>-/* QDMA_CSR_INT_ENABLE5 */</div><div class='del'>-#define TX31_COHERENT_INT_MASK		BIT(31)</div><div class='del'>-#define TX30_COHERENT_INT_MASK		BIT(30)</div><div class='del'>-#define TX29_COHERENT_INT_MASK		BIT(29)</div><div class='del'>-#define TX28_COHERENT_INT_MASK		BIT(28)</div><div class='del'>-#define TX27_COHERENT_INT_MASK		BIT(27)</div><div class='del'>-#define TX26_COHERENT_INT_MASK		BIT(26)</div><div class='del'>-#define TX25_COHERENT_INT_MASK		BIT(25)</div><div class='del'>-#define TX24_COHERENT_INT_MASK		BIT(24)</div><div class='del'>-#define TX23_COHERENT_INT_MASK		BIT(23)</div><div class='del'>-#define TX22_COHERENT_INT_MASK		BIT(22)</div><div class='del'>-#define TX21_COHERENT_INT_MASK		BIT(21)</div><div class='del'>-#define TX20_COHERENT_INT_MASK		BIT(20)</div><div class='del'>-#define TX19_COHERENT_INT_MASK		BIT(19)</div><div class='del'>-#define TX18_COHERENT_INT_MASK		BIT(18)</div><div class='del'>-#define TX17_COHERENT_INT_MASK		BIT(17)</div><div class='del'>-#define TX16_COHERENT_INT_MASK		BIT(16)</div><div class='del'>-#define TX15_COHERENT_INT_MASK		BIT(15)</div><div class='del'>-#define TX14_COHERENT_INT_MASK		BIT(14)</div><div class='del'>-#define TX13_COHERENT_INT_MASK		BIT(13)</div><div class='del'>-#define TX12_COHERENT_INT_MASK		BIT(12)</div><div class='del'>-#define TX11_COHERENT_INT_MASK		BIT(11)</div><div class='del'>-#define TX10_COHERENT_INT_MASK		BIT(10)</div><div class='del'>-#define TX9_COHERENT_INT_MASK		BIT(9)</div><div class='del'>-#define TX8_COHERENT_INT_MASK		BIT(8)</div><div class='del'>-</div><div class='del'>-#define INT_IDX4_MASK						\</div><div class='del'>-	(TX8_COHERENT_INT_MASK | TX9_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX10_COHERENT_INT_MASK | TX11_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX12_COHERENT_INT_MASK | TX13_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX14_COHERENT_INT_MASK | TX15_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX16_COHERENT_INT_MASK | TX17_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX18_COHERENT_INT_MASK | TX19_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX20_COHERENT_INT_MASK | TX21_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX22_COHERENT_INT_MASK | TX23_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX24_COHERENT_INT_MASK | TX25_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX26_COHERENT_INT_MASK | TX27_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX28_COHERENT_INT_MASK | TX29_COHERENT_INT_MASK |	\</div><div class='del'>-	 TX30_COHERENT_INT_MASK | TX31_COHERENT_INT_MASK)</div><div class='del'>-</div><div class='del'>-#define REG_TX_IRQ_BASE(_n)		((_n) ? 0x0048 : 0x0050)</div><div class='del'>-</div><div class='del'>-#define REG_TX_IRQ_CFG(_n)		((_n) ? 0x004c : 0x0054)</div><div class='del'>-#define TX_IRQ_THR_MASK			GENMASK(27, 16)</div><div class='del'>-#define TX_IRQ_DEPTH_MASK		GENMASK(11, 0)</div><div class='del'>-</div><div class='del'>-#define REG_IRQ_CLEAR_LEN(_n)		((_n) ? 0x0064 : 0x0058)</div><div class='del'>-#define IRQ_CLEAR_LEN_MASK		GENMASK(7, 0)</div><div class='del'>-</div><div class='del'>-#define REG_IRQ_STATUS(_n)		((_n) ? 0x0068 : 0x005c)</div><div class='del'>-#define IRQ_ENTRY_LEN_MASK		GENMASK(27, 16)</div><div class='del'>-#define IRQ_HEAD_IDX_MASK		GENMASK(11, 0)</div><div class='del'>-</div><div class='del'>-#define REG_TX_RING_BASE(_n)	\</div><div class='del'>-	(((_n) &lt; 8) ? 0x0100 + ((_n) &lt;&lt; 5) : 0x0b00 + (((_n) - 8) &lt;&lt; 5))</div><div class='del'>-</div><div class='del'>-#define REG_TX_RING_BLOCKING(_n)	\</div><div class='del'>-	(((_n) &lt; 8) ? 0x0104 + ((_n) &lt;&lt; 5) : 0x0b04 + (((_n) - 8) &lt;&lt; 5))</div><div class='del'>-</div><div class='del'>-#define TX_RING_IRQ_BLOCKING_MAP_MASK			BIT(6)</div><div class='del'>-#define TX_RING_IRQ_BLOCKING_CFG_MASK			BIT(4)</div><div class='del'>-#define TX_RING_IRQ_BLOCKING_TX_DROP_EN_MASK		BIT(2)</div><div class='del'>-#define TX_RING_IRQ_BLOCKING_MAX_TH_TXRING_EN_MASK	BIT(1)</div><div class='del'>-#define TX_RING_IRQ_BLOCKING_MIN_TH_TXRING_EN_MASK	BIT(0)</div><div class='del'>-</div><div class='del'>-#define REG_TX_CPU_IDX(_n)	\</div><div class='del'>-	(((_n) &lt; 8) ? 0x0108 + ((_n) &lt;&lt; 5) : 0x0b08 + (((_n) - 8) &lt;&lt; 5))</div><div class='del'>-</div><div class='del'>-#define TX_RING_CPU_IDX_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_TX_DMA_IDX(_n)	\</div><div class='del'>-	(((_n) &lt; 8) ? 0x010c + ((_n) &lt;&lt; 5) : 0x0b0c + (((_n) - 8) &lt;&lt; 5))</div><div class='del'>-</div><div class='del'>-#define TX_RING_DMA_IDX_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define IRQ_RING_IDX_MASK		GENMASK(20, 16)</div><div class='del'>-#define IRQ_DESC_IDX_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_RX_RING_BASE(_n)	\</div><div class='del'>-	(((_n) &lt; 16) ? 0x0200 + ((_n) &lt;&lt; 5) : 0x0e00 + (((_n) - 16) &lt;&lt; 5))</div><div class='del'>-</div><div class='del'>-#define REG_RX_RING_SIZE(_n)	\</div><div class='del'>-	(((_n) &lt; 16) ? 0x0204 + ((_n) &lt;&lt; 5) : 0x0e04 + (((_n) - 16) &lt;&lt; 5))</div><div class='del'>-</div><div class='del'>-#define RX_RING_THR_MASK		GENMASK(31, 16)</div><div class='del'>-#define RX_RING_SIZE_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_RX_CPU_IDX(_n)	\</div><div class='del'>-	(((_n) &lt; 16) ? 0x0208 + ((_n) &lt;&lt; 5) : 0x0e08 + (((_n) - 16) &lt;&lt; 5))</div><div class='del'>-</div><div class='del'>-#define RX_RING_CPU_IDX_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_RX_DMA_IDX(_n)	\</div><div class='del'>-	(((_n) &lt; 16) ? 0x020c + ((_n) &lt;&lt; 5) : 0x0e0c + (((_n) - 16) &lt;&lt; 5))</div><div class='del'>-</div><div class='del'>-#define REG_RX_DELAY_INT_IDX(_n)	\</div><div class='del'>-	(((_n) &lt; 16) ? 0x0210 + ((_n) &lt;&lt; 5) : 0x0e10 + (((_n) - 16) &lt;&lt; 5))</div><div class='del'>-</div><div class='del'>-#define RX_DELAY_INT_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define RX_RING_DMA_IDX_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_INGRESS_TRTCM_CFG		0x0070</div><div class='del'>-#define INGRESS_TRTCM_EN_MASK		BIT(31)</div><div class='del'>-#define INGRESS_TRTCM_MODE_MASK		BIT(30)</div><div class='del'>-#define INGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='del'>-#define INGRESS_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_TXQ_DIS_CFG_BASE(_n)	((_n) ? 0x20a0 : 0x00a0)</div><div class='del'>-#define REG_TXQ_DIS_CFG(_n, _m)		(REG_TXQ_DIS_CFG_BASE((_n)) + (_m) &lt;&lt; 2)</div><div class='del'>-</div><div class='del'>-#define REG_LMGR_INIT_CFG		0x1000</div><div class='del'>-#define LMGR_INIT_START			BIT(31)</div><div class='del'>-#define LMGR_SRAM_MODE_MASK		BIT(30)</div><div class='del'>-#define HW_FWD_PKTSIZE_OVERHEAD_MASK	GENMASK(27, 20)</div><div class='del'>-#define HW_FWD_DESC_NUM_MASK		GENMASK(16, 0)</div><div class='del'>-</div><div class='del'>-#define REG_FWD_DSCP_LOW_THR		0x1004</div><div class='del'>-#define FWD_DSCP_LOW_THR_MASK		GENMASK(17, 0)</div><div class='del'>-</div><div class='del'>-#define REG_EGRESS_RATE_METER_CFG		0x100c</div><div class='del'>-#define EGRESS_RATE_METER_EN_MASK		BIT(31)</div><div class='del'>-#define EGRESS_RATE_METER_EQ_RATE_EN_MASK	BIT(17)</div><div class='del'>-#define EGRESS_RATE_METER_WINDOW_SZ_MASK	GENMASK(16, 12)</div><div class='del'>-#define EGRESS_RATE_METER_TIMESLICE_MASK	GENMASK(10, 0)</div><div class='del'>-</div><div class='del'>-#define REG_EGRESS_TRTCM_CFG		0x1010</div><div class='del'>-#define EGRESS_TRTCM_EN_MASK		BIT(31)</div><div class='del'>-#define EGRESS_TRTCM_MODE_MASK		BIT(30)</div><div class='del'>-#define EGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='del'>-#define EGRESS_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_TXWRR_MODE_CFG		0x1020</div><div class='del'>-#define TWRR_WEIGHT_SCALE_MASK		BIT(31)</div><div class='del'>-#define TWRR_WEIGHT_BASE_MASK		BIT(3)</div><div class='del'>-</div><div class='del'>-#define REG_PSE_BUF_USAGE_CFG		0x1028</div><div class='del'>-#define PSE_BUF_ESTIMATE_EN_MASK	BIT(29)</div><div class='del'>-</div><div class='del'>-#define REG_GLB_TRTCM_CFG		0x1080</div><div class='del'>-#define GLB_TRTCM_EN_MASK		BIT(31)</div><div class='del'>-#define GLB_TRTCM_MODE_MASK		BIT(30)</div><div class='del'>-#define GLB_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='del'>-#define GLB_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-#define REG_TXQ_CNGST_CFG		0x10a0</div><div class='del'>-#define TXQ_CNGST_DROP_EN		BIT(31)</div><div class='del'>-#define TXQ_CNGST_DEI_DROP_EN		BIT(30)</div><div class='del'>-</div><div class='del'>-#define REG_SLA_TRTCM_CFG		0x1150</div><div class='del'>-#define SLA_TRTCM_EN_MASK		BIT(31)</div><div class='del'>-#define SLA_TRTCM_MODE_MASK		BIT(30)</div><div class='del'>-#define SLA_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='del'>-#define SLA_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-/* CTRL */</div><div class='del'>-#define QDMA_DESC_DONE_MASK		BIT(31)</div><div class='del'>-#define QDMA_DESC_DROP_MASK		BIT(30) /* tx: drop - rx: overflow */</div><div class='del'>-#define QDMA_DESC_MORE_MASK		BIT(29) /* more SG elements */</div><div class='del'>-#define QDMA_DESC_DEI_MASK		BIT(25)</div><div class='del'>-#define QDMA_DESC_NO_DROP_MASK		BIT(24)</div><div class='del'>-#define QDMA_DESC_LEN_MASK		GENMASK(15, 0)</div><div class='del'>-/* DATA */</div><div class='del'>-#define QDMA_DESC_NEXT_ID_MASK		GENMASK(15, 0)</div><div class='del'>-/* TX MSG0 */</div><div class='del'>-#define QDMA_ETH_TXMSG_MIC_IDX_MASK	BIT(30)</div><div class='del'>-#define QDMA_ETH_TXMSG_SP_TAG_MASK	GENMASK(29, 14)</div><div class='del'>-#define QDMA_ETH_TXMSG_ICO_MASK		BIT(13)</div><div class='del'>-#define QDMA_ETH_TXMSG_UCO_MASK		BIT(12)</div><div class='del'>-#define QDMA_ETH_TXMSG_TCO_MASK		BIT(11)</div><div class='del'>-#define QDMA_ETH_TXMSG_TSO_MASK		BIT(10)</div><div class='del'>-#define QDMA_ETH_TXMSG_FAST_MASK	BIT(9)</div><div class='del'>-#define QDMA_ETH_TXMSG_OAM_MASK		BIT(8)</div><div class='del'>-#define QDMA_ETH_TXMSG_CHAN_MASK	GENMASK(7, 3)</div><div class='del'>-#define QDMA_ETH_TXMSG_QUEUE_MASK	GENMASK(2, 0)</div><div class='del'>-/* TX MSG1 */</div><div class='del'>-#define QDMA_ETH_TXMSG_NO_DROP		BIT(31)</div><div class='del'>-#define QDMA_ETH_TXMSG_METER_MASK	GENMASK(30, 24)	/* 0x7f no meters */</div><div class='del'>-#define QDMA_ETH_TXMSG_FPORT_MASK	GENMASK(23, 20)</div><div class='del'>-#define QDMA_ETH_TXMSG_NBOQ_MASK	GENMASK(19, 15)</div><div class='del'>-#define QDMA_ETH_TXMSG_HWF_MASK		BIT(14)</div><div class='del'>-#define QDMA_ETH_TXMSG_HOP_MASK		BIT(13)</div><div class='del'>-#define QDMA_ETH_TXMSG_PTP_MASK		BIT(12)</div><div class='del'>-#define QDMA_ETH_TXMSG_ACNT_G1_MASK	GENMASK(10, 6)	/* 0x1f do not count */</div><div class='del'>-#define QDMA_ETH_TXMSG_ACNT_G0_MASK	GENMASK(5, 0)	/* 0x3f do not count */</div><div class='del'>-</div><div class='del'>-/* RX MSG1 */</div><div class='del'>-#define QDMA_ETH_RXMSG_DEI_MASK		BIT(31)</div><div class='del'>-#define QDMA_ETH_RXMSG_IP6_MASK		BIT(30)</div><div class='del'>-#define QDMA_ETH_RXMSG_IP4_MASK		BIT(29)</div><div class='del'>-#define QDMA_ETH_RXMSG_IP4F_MASK	BIT(28)</div><div class='del'>-#define QDMA_ETH_RXMSG_L4_VALID_MASK	BIT(27)</div><div class='del'>-#define QDMA_ETH_RXMSG_L4F_MASK		BIT(26)</div><div class='del'>-#define QDMA_ETH_RXMSG_SPORT_MASK	GENMASK(25, 21)</div><div class='del'>-#define QDMA_ETH_RXMSG_CRSN_MASK	GENMASK(20, 16)</div><div class='del'>-#define QDMA_ETH_RXMSG_PPE_ENTRY_MASK	GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-struct airoha_qdma_desc {</div><div class='del'>-	__le32 rsv;</div><div class='del'>-	__le32 ctrl;</div><div class='del'>-	__le32 addr;</div><div class='del'>-	__le32 data;</div><div class='del'>-	__le32 msg0;</div><div class='del'>-	__le32 msg1;</div><div class='del'>-	__le32 msg2;</div><div class='del'>-	__le32 msg3;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* CTRL0 */</div><div class='del'>-#define QDMA_FWD_DESC_CTX_MASK		BIT(31)</div><div class='del'>-#define QDMA_FWD_DESC_RING_MASK		GENMASK(30, 28)</div><div class='del'>-#define QDMA_FWD_DESC_IDX_MASK		GENMASK(27, 16)</div><div class='del'>-#define QDMA_FWD_DESC_LEN_MASK		GENMASK(15, 0)</div><div class='del'>-/* CTRL1 */</div><div class='del'>-#define QDMA_FWD_DESC_FIRST_IDX_MASK	GENMASK(15, 0)</div><div class='del'>-/* CTRL2 */</div><div class='del'>-#define QDMA_FWD_DESC_MORE_PKT_NUM_MASK	GENMASK(2, 0)</div><div class='del'>-</div><div class='del'>-struct airoha_qdma_fwd_desc {</div><div class='del'>-	__le32 addr;</div><div class='del'>-	__le32 ctrl0;</div><div class='del'>-	__le32 ctrl1;</div><div class='del'>-	__le32 ctrl2;</div><div class='del'>-	__le32 msg0;</div><div class='del'>-	__le32 msg1;</div><div class='del'>-	__le32 rsv0;</div><div class='del'>-	__le32 rsv1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	QDMA_INT_REG_IDX0,</div><div class='del'>-	QDMA_INT_REG_IDX1,</div><div class='del'>-	QDMA_INT_REG_IDX2,</div><div class='del'>-	QDMA_INT_REG_IDX3,</div><div class='del'>-	QDMA_INT_REG_IDX4,</div><div class='del'>-	QDMA_INT_REG_MAX</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	XSI_PCIE0_PORT,</div><div class='del'>-	XSI_PCIE1_PORT,</div><div class='del'>-	XSI_USB_PORT,</div><div class='del'>-	XSI_AE_PORT,</div><div class='del'>-	XSI_ETH_PORT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	XSI_PCIE0_VIP_PORT_MASK	= BIT(22),</div><div class='del'>-	XSI_PCIE1_VIP_PORT_MASK	= BIT(23),</div><div class='del'>-	XSI_USB_VIP_PORT_MASK	= BIT(25),</div><div class='del'>-	XSI_ETH_VIP_PORT_MASK	= BIT(24),</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	DEV_STATE_INITIALIZED,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	CDM_CRSN_QSEL_Q1 = 1,</div><div class='del'>-	CDM_CRSN_QSEL_Q5 = 5,</div><div class='del'>-	CDM_CRSN_QSEL_Q6 = 6,</div><div class='del'>-	CDM_CRSN_QSEL_Q15 = 15,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	CRSN_08 = 0x8,</div><div class='del'>-	CRSN_21 = 0x15, /* KA */</div><div class='del'>-	CRSN_22 = 0x16, /* hit bind and force route to CPU */</div><div class='del'>-	CRSN_24 = 0x18,</div><div class='del'>-	CRSN_25 = 0x19,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	FE_PSE_PORT_CDM1,</div><div class='del'>-	FE_PSE_PORT_GDM1,</div><div class='del'>-	FE_PSE_PORT_GDM2,</div><div class='del'>-	FE_PSE_PORT_GDM3,</div><div class='del'>-	FE_PSE_PORT_PPE1,</div><div class='del'>-	FE_PSE_PORT_CDM2,</div><div class='del'>-	FE_PSE_PORT_CDM3,</div><div class='del'>-	FE_PSE_PORT_CDM4,</div><div class='del'>-	FE_PSE_PORT_PPE2,</div><div class='del'>-	FE_PSE_PORT_GDM4,</div><div class='del'>-	FE_PSE_PORT_CDM5,</div><div class='del'>-	FE_PSE_PORT_DROP = 0xf,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct airoha_queue_entry {</div><div class='del'>-	union {</div><div class='del'>-		void *buf;</div><div class='del'>-		struct sk_buff *skb;</div><div class='del'>-	};</div><div class='del'>-	dma_addr_t dma_addr;</div><div class='del'>-	u16 dma_len;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct airoha_queue {</div><div class='del'>-	struct airoha_qdma *qdma;</div><div class='del'>-</div><div class='del'>-	/* protect concurrent queue accesses */</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-	struct airoha_queue_entry *entry;</div><div class='del'>-	struct airoha_qdma_desc *desc;</div><div class='del'>-	u16 head;</div><div class='del'>-	u16 tail;</div><div class='del'>-</div><div class='del'>-	int queued;</div><div class='del'>-	int ndesc;</div><div class='del'>-	int free_thr;</div><div class='del'>-	int buf_size;</div><div class='del'>-</div><div class='del'>-	struct napi_struct napi;</div><div class='del'>-	struct page_pool *page_pool;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct airoha_tx_irq_queue {</div><div class='del'>-	struct airoha_qdma *qdma;</div><div class='del'>-</div><div class='del'>-	struct napi_struct napi;</div><div class='del'>-</div><div class='del'>-	int size;</div><div class='del'>-	u32 *q;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct airoha_hw_stats {</div><div class='del'>-	/* protect concurrent hw_stats accesses */</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-	struct u64_stats_sync syncp;</div><div class='del'>-</div><div class='del'>-	/* get_stats64 */</div><div class='del'>-	u64 rx_ok_pkts;</div><div class='del'>-	u64 tx_ok_pkts;</div><div class='del'>-	u64 rx_ok_bytes;</div><div class='del'>-	u64 tx_ok_bytes;</div><div class='del'>-	u64 rx_multicast;</div><div class='del'>-	u64 rx_errors;</div><div class='del'>-	u64 rx_drops;</div><div class='del'>-	u64 tx_drops;</div><div class='del'>-	u64 rx_crc_error;</div><div class='del'>-	u64 rx_over_errors;</div><div class='del'>-	/* ethtool stats */</div><div class='del'>-	u64 tx_broadcast;</div><div class='del'>-	u64 tx_multicast;</div><div class='del'>-	u64 tx_len[7];</div><div class='del'>-	u64 rx_broadcast;</div><div class='del'>-	u64 rx_fragment;</div><div class='del'>-	u64 rx_jabber;</div><div class='del'>-	u64 rx_len[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct airoha_qdma {</div><div class='del'>-	struct airoha_eth *eth;</div><div class='del'>-	void __iomem *regs;</div><div class='del'>-</div><div class='del'>-	/* protect concurrent irqmask accesses */</div><div class='del'>-	spinlock_t irq_lock;</div><div class='del'>-	u32 irqmask[QDMA_INT_REG_MAX];</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	struct airoha_tx_irq_queue q_tx_irq[AIROHA_NUM_TX_IRQ];</div><div class='add'>+#include "airoha_regs.h"</div><div class='add'>+#include "airoha_eth.h"</div><div class='ctx'> </div><div class='del'>-	struct airoha_queue q_tx[AIROHA_NUM_TX_RING];</div><div class='del'>-	struct airoha_queue q_rx[AIROHA_NUM_RX_RING];</div><div class='del'>-</div><div class='del'>-	/* descriptor and packet buffers for qdma hw forward */</div><div class='del'>-	struct {</div><div class='del'>-		void *desc;</div><div class='del'>-		void *q;</div><div class='del'>-	} hfwd;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct airoha_gdm_port {</div><div class='del'>-	struct airoha_qdma *qdma;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	int id;</div><div class='del'>-</div><div class='del'>-	struct airoha_hw_stats stats;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct airoha_eth {</div><div class='del'>-	struct device *dev;</div><div class='del'>-</div><div class='del'>-	unsigned long state;</div><div class='del'>-	void __iomem *fe_regs;</div><div class='del'>-</div><div class='del'>-	struct reset_control_bulk_data rsts[AIROHA_MAX_NUM_RSTS];</div><div class='del'>-	struct reset_control_bulk_data xsi_rsts[AIROHA_MAX_NUM_XSI_RSTS];</div><div class='del'>-</div><div class='del'>-	struct net_device *napi_dev;</div><div class='del'>-</div><div class='del'>-	struct airoha_qdma qdma[AIROHA_MAX_NUM_QDMA];</div><div class='del'>-	struct airoha_gdm_port *ports[AIROHA_MAX_NUM_GDM_PORTS];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static u32 airoha_rr(void __iomem *base, u32 offset)</div><div class='add'>+u32 airoha_rr(void __iomem *base, u32 offset)</div><div class='ctx'> {</div><div class='ctx'> 	return readl(base + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void airoha_wr(void __iomem *base, u32 offset, u32 val)</div><div class='add'>+void airoha_wr(void __iomem *base, u32 offset, u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	writel(val, base + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val)</div><div class='add'>+u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	val |= (airoha_rr(base, offset) &amp; ~mask);</div><div class='ctx'> 	airoha_wr(base, offset, val);</div><div class='hunk'>@@ -845,68 +35,40 @@ static u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val)</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define airoha_fe_rr(eth, offset)				\</div><div class='del'>-	airoha_rr((eth)-&gt;fe_regs, (offset))</div><div class='del'>-#define airoha_fe_wr(eth, offset, val)				\</div><div class='del'>-	airoha_wr((eth)-&gt;fe_regs, (offset), (val))</div><div class='del'>-#define airoha_fe_rmw(eth, offset, mask, val)			\</div><div class='del'>-	airoha_rmw((eth)-&gt;fe_regs, (offset), (mask), (val))</div><div class='del'>-#define airoha_fe_set(eth, offset, val)				\</div><div class='del'>-	airoha_rmw((eth)-&gt;fe_regs, (offset), 0, (val))</div><div class='del'>-#define airoha_fe_clear(eth, offset, val)			\</div><div class='del'>-	airoha_rmw((eth)-&gt;fe_regs, (offset), (val), 0)</div><div class='del'>-</div><div class='del'>-#define airoha_qdma_rr(qdma, offset)				\</div><div class='del'>-	airoha_rr((qdma)-&gt;regs, (offset))</div><div class='del'>-#define airoha_qdma_wr(qdma, offset, val)			\</div><div class='del'>-	airoha_wr((qdma)-&gt;regs, (offset), (val))</div><div class='del'>-#define airoha_qdma_rmw(qdma, offset, mask, val)		\</div><div class='del'>-	airoha_rmw((qdma)-&gt;regs, (offset), (mask), (val))</div><div class='del'>-#define airoha_qdma_set(qdma, offset, val)			\</div><div class='del'>-	airoha_rmw((qdma)-&gt;regs, (offset), 0, (val))</div><div class='del'>-#define airoha_qdma_clear(qdma, offset, val)			\</div><div class='del'>-	airoha_rmw((qdma)-&gt;regs, (offset), (val), 0)</div><div class='del'>-</div><div class='del'>-static void airoha_qdma_set_irqmask(struct airoha_qdma *qdma, int index,</div><div class='del'>-				    u32 clear, u32 set)</div><div class='add'>+static void airoha_qdma_set_irqmask(struct airoha_irq_bank *irq_bank,</div><div class='add'>+				    int index, u32 clear, u32 set)</div><div class='ctx'> {</div><div class='add'>+	struct airoha_qdma *qdma = irq_bank-&gt;qdma;</div><div class='add'>+	int bank = irq_bank - &amp;qdma-&gt;irq_banks[0];</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(index &gt;= ARRAY_SIZE(qdma-&gt;irqmask)))</div><div class='add'>+	if (WARN_ON_ONCE(index &gt;= ARRAY_SIZE(irq_bank-&gt;irqmask)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;qdma-&gt;irq_lock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;irq_bank-&gt;irq_lock, flags);</div><div class='ctx'> </div><div class='del'>-	qdma-&gt;irqmask[index] &amp;= ~clear;</div><div class='del'>-	qdma-&gt;irqmask[index] |= set;</div><div class='del'>-	airoha_qdma_wr(qdma, REG_INT_ENABLE(index), qdma-&gt;irqmask[index]);</div><div class='add'>+	irq_bank-&gt;irqmask[index] &amp;= ~clear;</div><div class='add'>+	irq_bank-&gt;irqmask[index] |= set;</div><div class='add'>+	airoha_qdma_wr(qdma, REG_INT_ENABLE(bank, index),</div><div class='add'>+		       irq_bank-&gt;irqmask[index]);</div><div class='ctx'> 	/* Read irq_enable register in order to guarantee the update above</div><div class='ctx'> 	 * completes in the spinlock critical section.</div><div class='ctx'> 	 */</div><div class='del'>-	airoha_qdma_rr(qdma, REG_INT_ENABLE(index));</div><div class='add'>+	airoha_qdma_rr(qdma, REG_INT_ENABLE(bank, index));</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;qdma-&gt;irq_lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;irq_bank-&gt;irq_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void airoha_qdma_irq_enable(struct airoha_qdma *qdma, int index,</div><div class='del'>-				   u32 mask)</div><div class='add'>+static void airoha_qdma_irq_enable(struct airoha_irq_bank *irq_bank,</div><div class='add'>+				   int index, u32 mask)</div><div class='ctx'> {</div><div class='del'>-	airoha_qdma_set_irqmask(qdma, index, 0, mask);</div><div class='add'>+	airoha_qdma_set_irqmask(irq_bank, index, 0, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void airoha_qdma_irq_disable(struct airoha_qdma *qdma, int index,</div><div class='del'>-				    u32 mask)</div><div class='add'>+static void airoha_qdma_irq_disable(struct airoha_irq_bank *irq_bank,</div><div class='add'>+				    int index, u32 mask)</div><div class='ctx'> {</div><div class='del'>-	airoha_qdma_set_irqmask(qdma, index, mask, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool airhoa_is_lan_gdm_port(struct airoha_gdm_port *port)</div><div class='del'>-{</div><div class='del'>-	/* GDM1 port on EN7581 SoC is connected to the lan dsa switch.</div><div class='del'>-	 * GDM{2,3,4} can be used as wan port connected to an external</div><div class='del'>-	 * phy module.</div><div class='del'>-	 */</div><div class='del'>-	return port-&gt;id == 1;</div><div class='add'>+	airoha_qdma_set_irqmask(irq_bank, index, mask, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void airoha_set_macaddr(struct airoha_gdm_port *port, const u8 *addr)</div><div class='hunk'>@@ -922,6 +84,8 @@ static void airoha_set_macaddr(struct airoha_gdm_port *port, const u8 *addr)</div><div class='ctx'> 	val = (addr[3] &lt;&lt; 16) | (addr[4] &lt;&lt; 8) | addr[5];</div><div class='ctx'> 	airoha_fe_wr(eth, REG_FE_MAC_LMIN(reg), val);</div><div class='ctx'> 	airoha_fe_wr(eth, REG_FE_MAC_LMAX(reg), val);</div><div class='add'>+</div><div class='add'>+	airoha_ppe_init_upd_mem(port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void airoha_set_gdm_port_fwd_cfg(struct airoha_eth *eth, u32 addr,</div><div class='hunk'>@@ -937,30 +101,23 @@ static void airoha_set_gdm_port_fwd_cfg(struct airoha_eth *eth, u32 addr,</div><div class='ctx'> 		      FIELD_PREP(GDM_UCFQ_MASK, val));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int airoha_set_gdm_port(struct airoha_eth *eth, int port, bool enable)</div><div class='add'>+static int airoha_set_vip_for_gdm_port(struct airoha_gdm_port *port,</div><div class='add'>+				       bool enable)</div><div class='ctx'> {</div><div class='del'>-	u32 val = enable ? FE_PSE_PORT_PPE1 : FE_PSE_PORT_DROP;</div><div class='del'>-	u32 vip_port, cfg_addr;</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+	u32 vip_port;</div><div class='ctx'> </div><div class='del'>-	switch (port) {</div><div class='del'>-	case XSI_PCIE0_PORT:</div><div class='add'>+	switch (port-&gt;id) {</div><div class='add'>+	case 3:</div><div class='add'>+		/* FIXME: handle XSI_PCIE1_PORT */</div><div class='ctx'> 		vip_port = XSI_PCIE0_VIP_PORT_MASK;</div><div class='del'>-		cfg_addr = REG_GDM_FWD_CFG(3);</div><div class='del'>-		break;</div><div class='del'>-	case XSI_PCIE1_PORT:</div><div class='del'>-		vip_port = XSI_PCIE1_VIP_PORT_MASK;</div><div class='del'>-		cfg_addr = REG_GDM_FWD_CFG(3);</div><div class='del'>-		break;</div><div class='del'>-	case XSI_USB_PORT:</div><div class='del'>-		vip_port = XSI_USB_VIP_PORT_MASK;</div><div class='del'>-		cfg_addr = REG_GDM_FWD_CFG(4);</div><div class='ctx'> 		break;</div><div class='del'>-	case XSI_ETH_PORT:</div><div class='add'>+	case 4:</div><div class='add'>+		/* FIXME: handle XSI_USB_PORT */</div><div class='ctx'> 		vip_port = XSI_ETH_VIP_PORT_MASK;</div><div class='del'>-		cfg_addr = REG_GDM_FWD_CFG(4);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='hunk'>@@ -971,54 +128,20 @@ static int airoha_set_gdm_port(struct airoha_eth *eth, int port, bool enable)</div><div class='ctx'> 		airoha_fe_clear(eth, REG_FE_IFC_PORT_EN, vip_port);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	airoha_set_gdm_port_fwd_cfg(eth, cfg_addr, val);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int airoha_set_gdm_ports(struct airoha_eth *eth, bool enable)</div><div class='del'>-{</div><div class='del'>-	const int port_list[] = {</div><div class='del'>-		XSI_PCIE0_PORT,</div><div class='del'>-		XSI_PCIE1_PORT,</div><div class='del'>-		XSI_USB_PORT,</div><div class='del'>-		XSI_ETH_PORT</div><div class='del'>-	};</div><div class='del'>-	int i, err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(port_list); i++) {</div><div class='del'>-		err = airoha_set_gdm_port(eth, port_list[i], enable);</div><div class='del'>-		if (err)</div><div class='del'>-			goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	for (i--; i &gt;= 0; i--)</div><div class='del'>-		airoha_set_gdm_port(eth, port_list[i], false);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void airoha_fe_maccr_init(struct airoha_eth *eth)</div><div class='ctx'> {</div><div class='ctx'> 	int p;</div><div class='ctx'> </div><div class='del'>-	for (p = 1; p &lt;= ARRAY_SIZE(eth-&gt;ports); p++) {</div><div class='add'>+	for (p = 1; p &lt;= ARRAY_SIZE(eth-&gt;ports); p++)</div><div class='ctx'> 		airoha_fe_set(eth, REG_GDM_FWD_CFG(p),</div><div class='del'>-			      GDM_TCP_CKSUM | GDM_UDP_CKSUM | GDM_IP4_CKSUM |</div><div class='del'>-			      GDM_DROP_CRC_ERR);</div><div class='del'>-		airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(p),</div><div class='del'>-					    FE_PSE_PORT_CDM1);</div><div class='del'>-		airoha_fe_rmw(eth, REG_GDM_LEN_CFG(p),</div><div class='del'>-			      GDM_SHORT_LEN_MASK | GDM_LONG_LEN_MASK,</div><div class='del'>-			      FIELD_PREP(GDM_SHORT_LEN_MASK, 60) |</div><div class='del'>-			      FIELD_PREP(GDM_LONG_LEN_MASK, 4004));</div><div class='del'>-	}</div><div class='add'>+			      GDM_TCP_CKSUM_MASK | GDM_UDP_CKSUM_MASK |</div><div class='add'>+			      GDM_IP4_CKSUM_MASK | GDM_DROP_CRC_ERR_MASK);</div><div class='ctx'> </div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM1_VLAN_CTRL, CDM1_VLAN_MASK,</div><div class='del'>-		      FIELD_PREP(CDM1_VLAN_MASK, 0x8100));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_VLAN_CTRL(1), CDM_VLAN_MASK,</div><div class='add'>+		      FIELD_PREP(CDM_VLAN_MASK, 0x8100));</div><div class='ctx'> </div><div class='ctx'> 	airoha_fe_set(eth, REG_FE_CPORT_CFG, FE_CPORT_PAD);</div><div class='ctx'> }</div><div class='hunk'>@@ -1174,8 +297,11 @@ static void airoha_fe_pse_ports_init(struct airoha_eth *eth)</div><div class='ctx'> 	int q;</div><div class='ctx'> </div><div class='ctx'> 	all_rsv = airoha_fe_get_pse_all_rsv(eth);</div><div class='del'>-	/* hw misses PPE2 oq rsv */</div><div class='del'>-	all_rsv += PSE_RSV_PAGES * pse_port_num_queues[FE_PSE_PORT_PPE2];</div><div class='add'>+	if (airoha_ppe_is_enabled(eth, 1)) {</div><div class='add'>+		/* hw misses PPE2 oq rsv */</div><div class='add'>+		all_rsv += PSE_RSV_PAGES *</div><div class='add'>+			   pse_port_num_queues[FE_PSE_PORT_PPE2];</div><div class='add'>+	}</div><div class='ctx'> 	airoha_fe_set(eth, REG_FE_PSE_BUF_SET, all_rsv);</div><div class='ctx'> </div><div class='ctx'> 	/* CMD1 */</div><div class='hunk'>@@ -1212,13 +338,17 @@ static void airoha_fe_pse_ports_init(struct airoha_eth *eth)</div><div class='ctx'> 	for (q = 4; q &lt; pse_port_num_queues[FE_PSE_PORT_CDM4]; q++)</div><div class='ctx'> 		airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM4, q,</div><div class='ctx'> 					 PSE_QUEUE_RSV_PAGES);</div><div class='del'>-	/* PPE2 */</div><div class='del'>-	for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_PPE2]; q++) {</div><div class='del'>-		if (q &lt; pse_port_num_queues[FE_PSE_PORT_PPE2] / 2)</div><div class='del'>-			airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE2, q,</div><div class='del'>-						 PSE_QUEUE_RSV_PAGES);</div><div class='del'>-		else</div><div class='del'>-			airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE2, q, 0);</div><div class='add'>+	if (airoha_ppe_is_enabled(eth, 1)) {</div><div class='add'>+		/* PPE2 */</div><div class='add'>+		for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_PPE2]; q++) {</div><div class='add'>+			if (q &lt; pse_port_num_queues[FE_PSE_PORT_PPE2] / 2)</div><div class='add'>+				airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE2,</div><div class='add'>+							 q,</div><div class='add'>+							 PSE_QUEUE_RSV_PAGES);</div><div class='add'>+			else</div><div class='add'>+				airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE2,</div><div class='add'>+							 q, 0);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* GMD4 */</div><div class='ctx'> 	for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_GDM4]; q++)</div><div class='hunk'>@@ -1273,46 +403,46 @@ static int airoha_fe_mc_vlan_clear(struct airoha_eth *eth)</div><div class='ctx'> static void airoha_fe_crsn_qsel_init(struct airoha_eth *eth)</div><div class='ctx'> {</div><div class='ctx'> 	/* CDM1_CRSN_QSEL */</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_22 &gt;&gt; 2),</div><div class='del'>-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='del'>-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_22 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='ctx'> 				 CDM_CRSN_QSEL_Q1));</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_08 &gt;&gt; 2),</div><div class='del'>-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='del'>-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_08 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='ctx'> 				 CDM_CRSN_QSEL_Q1));</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_21 &gt;&gt; 2),</div><div class='del'>-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='del'>-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_21 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='ctx'> 				 CDM_CRSN_QSEL_Q1));</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_24 &gt;&gt; 2),</div><div class='del'>-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='del'>-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_24 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='ctx'> 				 CDM_CRSN_QSEL_Q6));</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_25 &gt;&gt; 2),</div><div class='del'>-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='del'>-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_25 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='ctx'> 				 CDM_CRSN_QSEL_Q1));</div><div class='ctx'> 	/* CDM2_CRSN_QSEL */</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_08 &gt;&gt; 2),</div><div class='del'>-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='del'>-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_08 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='ctx'> 				 CDM_CRSN_QSEL_Q1));</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_21 &gt;&gt; 2),</div><div class='del'>-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='del'>-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_21 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='ctx'> 				 CDM_CRSN_QSEL_Q1));</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_22 &gt;&gt; 2),</div><div class='del'>-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='del'>-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_22 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='ctx'> 				 CDM_CRSN_QSEL_Q1));</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_24 &gt;&gt; 2),</div><div class='del'>-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='del'>-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_24 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='ctx'> 				 CDM_CRSN_QSEL_Q6));</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_25 &gt;&gt; 2),</div><div class='del'>-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='del'>-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_25 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='ctx'> 				 CDM_CRSN_QSEL_Q1));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1332,18 +462,18 @@ static int airoha_fe_init(struct airoha_eth *eth)</div><div class='ctx'> 	airoha_fe_wr(eth, REG_FE_PCE_CFG,</div><div class='ctx'> 		     PCE_DPI_EN_MASK | PCE_KA_EN_MASK | PCE_MC_EN_MASK);</div><div class='ctx'> 	/* set vip queue selection to ring 1 */</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM1_FWD_CFG, CDM1_VIP_QSEL_MASK,</div><div class='del'>-		      FIELD_PREP(CDM1_VIP_QSEL_MASK, 0x4));</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_VIP_QSEL_MASK,</div><div class='del'>-		      FIELD_PREP(CDM2_VIP_QSEL_MASK, 0x4));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(1), CDM_VIP_QSEL_MASK,</div><div class='add'>+		      FIELD_PREP(CDM_VIP_QSEL_MASK, 0x4));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(2), CDM_VIP_QSEL_MASK,</div><div class='add'>+		      FIELD_PREP(CDM_VIP_QSEL_MASK, 0x4));</div><div class='ctx'> 	/* set GDM4 source interface offset to 8 */</div><div class='del'>-	airoha_fe_rmw(eth, REG_GDM4_SRC_PORT_SET,</div><div class='del'>-		      GDM4_SPORT_OFF2_MASK |</div><div class='del'>-		      GDM4_SPORT_OFF1_MASK |</div><div class='del'>-		      GDM4_SPORT_OFF0_MASK,</div><div class='del'>-		      FIELD_PREP(GDM4_SPORT_OFF2_MASK, 8) |</div><div class='del'>-		      FIELD_PREP(GDM4_SPORT_OFF1_MASK, 8) |</div><div class='del'>-		      FIELD_PREP(GDM4_SPORT_OFF0_MASK, 8));</div><div class='add'>+	airoha_fe_rmw(eth, REG_GDM_SRC_PORT_SET(4),</div><div class='add'>+		      GDM_SPORT_OFF2_MASK |</div><div class='add'>+		      GDM_SPORT_OFF1_MASK |</div><div class='add'>+		      GDM_SPORT_OFF0_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_SPORT_OFF2_MASK, 8) |</div><div class='add'>+		      FIELD_PREP(GDM_SPORT_OFF1_MASK, 8) |</div><div class='add'>+		      FIELD_PREP(GDM_SPORT_OFF0_MASK, 8));</div><div class='ctx'> </div><div class='ctx'> 	/* set PSE Page as 128B */</div><div class='ctx'> 	airoha_fe_rmw(eth, REG_FE_DMA_GLO_CFG,</div><div class='hunk'>@@ -1369,8 +499,8 @@ static int airoha_fe_init(struct airoha_eth *eth)</div><div class='ctx'> 	airoha_fe_set(eth, REG_GDM_MISC_CFG,</div><div class='ctx'> 		      GDM2_RDM_ACK_WAIT_PREF_MASK |</div><div class='ctx'> 		      GDM2_CHN_VLD_MODE_MASK);</div><div class='del'>-	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK,</div><div class='del'>-		      FIELD_PREP(CDM2_OAM_QSEL_MASK, 15));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(2), CDM_OAM_QSEL_MASK,</div><div class='add'>+		      FIELD_PREP(CDM_OAM_QSEL_MASK, 15));</div><div class='ctx'> </div><div class='ctx'> 	/* init fragment and assemble Force Port */</div><div class='ctx'> 	/* NPU Core-3, NPU Bridge Channel-3 */</div><div class='hunk'>@@ -1384,8 +514,8 @@ static int airoha_fe_init(struct airoha_eth *eth)</div><div class='ctx'> 		      FIELD_PREP(IP_ASSEMBLE_PORT_MASK, 0) |</div><div class='ctx'> 		      FIELD_PREP(IP_ASSEMBLE_NBQ_MASK, 22));</div><div class='ctx'> </div><div class='del'>-	airoha_fe_set(eth, REG_GDM3_FWD_CFG, GDM3_PAD_EN_MASK);</div><div class='del'>-	airoha_fe_set(eth, REG_GDM4_FWD_CFG, GDM4_PAD_EN_MASK);</div><div class='add'>+	airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN_MASK);</div><div class='add'>+	airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN_MASK);</div><div class='ctx'> </div><div class='ctx'> 	airoha_fe_crsn_qsel_init(eth);</div><div class='ctx'> </div><div class='hunk'>@@ -1393,7 +523,7 @@ static int airoha_fe_init(struct airoha_eth *eth)</div><div class='ctx'> 	airoha_fe_set(eth, REG_FE_CPORT_CFG, FE_CPORT_PORT_XFC_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* default aging mode for mbi unlock issue */</div><div class='del'>-	airoha_fe_rmw(eth, REG_GDM2_CHN_RLS,</div><div class='add'>+	airoha_fe_rmw(eth, REG_GDM_CHN_RLS(2),</div><div class='ctx'> 		      MBI_RX_AGE_SEL_MASK | MBI_TX_AGE_SEL_MASK,</div><div class='ctx'> 		      FIELD_PREP(MBI_RX_AGE_SEL_MASK, 3) |</div><div class='ctx'> 		      FIELD_PREP(MBI_TX_AGE_SEL_MASK, 3));</div><div class='hunk'>@@ -1409,9 +539,7 @@ static int airoha_fe_init(struct airoha_eth *eth)</div><div class='ctx'> </div><div class='ctx'> static int airoha_qdma_fill_rx_queue(struct airoha_queue *q)</div><div class='ctx'> {</div><div class='del'>-	enum dma_data_direction dir = page_pool_get_dma_dir(q-&gt;page_pool);</div><div class='ctx'> 	struct airoha_qdma *qdma = q-&gt;qdma;</div><div class='del'>-	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='ctx'> 	int qid = q - &amp;qdma-&gt;q_rx[0];</div><div class='ctx'> 	int nframes = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1435,9 +563,6 @@ static int airoha_qdma_fill_rx_queue(struct airoha_queue *q)</div><div class='ctx'> 		e-&gt;dma_addr = page_pool_get_dma_addr(page) + offset;</div><div class='ctx'> 		e-&gt;dma_len = SKB_WITH_OVERHEAD(q-&gt;buf_size);</div><div class='ctx'> </div><div class='del'>-		dma_sync_single_for_device(eth-&gt;dev, e-&gt;dma_addr, e-&gt;dma_len,</div><div class='del'>-					   dir);</div><div class='del'>-</div><div class='ctx'> 		val = FIELD_PREP(QDMA_DESC_LEN_MASK, e-&gt;dma_len);</div><div class='ctx'> 		WRITE_ONCE(desc-&gt;ctrl, cpu_to_le32(val));</div><div class='ctx'> 		WRITE_ONCE(desc-&gt;addr, cpu_to_le32(e-&gt;dma_addr));</div><div class='hunk'>@@ -1463,7 +588,7 @@ static int airoha_qdma_get_gdm_port(struct airoha_eth *eth,</div><div class='ctx'> </div><div class='ctx'> 	sport = FIELD_GET(QDMA_ETH_RXMSG_SPORT_MASK, msg1);</div><div class='ctx'> 	switch (sport) {</div><div class='del'>-	case 0x10 ... 0x13:</div><div class='add'>+	case 0x10 ... 0x14:</div><div class='ctx'> 		port = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0x2 ... 0x4:</div><div class='hunk'>@@ -1487,53 +612,94 @@ static int airoha_qdma_rx_process(struct airoha_queue *q, int budget)</div><div class='ctx'> 	while (done &lt; budget) {</div><div class='ctx'> 		struct airoha_queue_entry *e = &amp;q-&gt;entry[q-&gt;tail];</div><div class='ctx'> 		struct airoha_qdma_desc *desc = &amp;q-&gt;desc[q-&gt;tail];</div><div class='del'>-		dma_addr_t dma_addr = le32_to_cpu(desc-&gt;addr);</div><div class='add'>+		u32 hash, reason, msg1 = le32_to_cpu(desc-&gt;msg1);</div><div class='add'>+		struct page *page = virt_to_head_page(e-&gt;buf);</div><div class='ctx'> 		u32 desc_ctrl = le32_to_cpu(desc-&gt;ctrl);</div><div class='del'>-		struct sk_buff *skb;</div><div class='del'>-		int len, p;</div><div class='add'>+		struct airoha_gdm_port *port;</div><div class='add'>+		int data_len, len, p;</div><div class='ctx'> </div><div class='ctx'> 		if (!(desc_ctrl &amp; QDMA_DESC_DONE_MASK))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		if (!dma_addr)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		len = FIELD_GET(QDMA_DESC_LEN_MASK, desc_ctrl);</div><div class='del'>-		if (!len)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		q-&gt;tail = (q-&gt;tail + 1) % q-&gt;ndesc;</div><div class='ctx'> 		q-&gt;queued--;</div><div class='ctx'> </div><div class='del'>-		dma_sync_single_for_cpu(eth-&gt;dev, dma_addr,</div><div class='add'>+		dma_sync_single_for_cpu(eth-&gt;dev, e-&gt;dma_addr,</div><div class='ctx'> 					SKB_WITH_OVERHEAD(q-&gt;buf_size), dir);</div><div class='ctx'> </div><div class='add'>+		len = FIELD_GET(QDMA_DESC_LEN_MASK, desc_ctrl);</div><div class='add'>+		data_len = q-&gt;skb ? q-&gt;buf_size</div><div class='add'>+				  : SKB_WITH_OVERHEAD(q-&gt;buf_size);</div><div class='add'>+		if (!len || data_len &lt; len)</div><div class='add'>+			goto free_frag;</div><div class='add'>+</div><div class='ctx'> 		p = airoha_qdma_get_gdm_port(eth, desc);</div><div class='del'>-		if (p &lt; 0 || !eth-&gt;ports[p]) {</div><div class='del'>-			page_pool_put_full_page(q-&gt;page_pool,</div><div class='del'>-						virt_to_head_page(e-&gt;buf),</div><div class='del'>-						true);</div><div class='del'>-			continue;</div><div class='add'>+		if (p &lt; 0 || !eth-&gt;ports[p])</div><div class='add'>+			goto free_frag;</div><div class='add'>+</div><div class='add'>+		port = eth-&gt;ports[p];</div><div class='add'>+		if (!q-&gt;skb) { /* first buffer */</div><div class='add'>+			q-&gt;skb = napi_build_skb(e-&gt;buf, q-&gt;buf_size);</div><div class='add'>+			if (!q-&gt;skb)</div><div class='add'>+				goto free_frag;</div><div class='add'>+</div><div class='add'>+			__skb_put(q-&gt;skb, len);</div><div class='add'>+			skb_mark_for_recycle(q-&gt;skb);</div><div class='add'>+			q-&gt;skb-&gt;dev = port-&gt;dev;</div><div class='add'>+			q-&gt;skb-&gt;protocol = eth_type_trans(q-&gt;skb, port-&gt;dev);</div><div class='add'>+			q-&gt;skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+			skb_record_rx_queue(q-&gt;skb, qid);</div><div class='add'>+		} else { /* scattered frame */</div><div class='add'>+			struct skb_shared_info *shinfo = skb_shinfo(q-&gt;skb);</div><div class='add'>+			int nr_frags = shinfo-&gt;nr_frags;</div><div class='add'>+</div><div class='add'>+			if (nr_frags &gt;= ARRAY_SIZE(shinfo-&gt;frags))</div><div class='add'>+				goto free_frag;</div><div class='add'>+</div><div class='add'>+			skb_add_rx_frag(q-&gt;skb, nr_frags, page,</div><div class='add'>+					e-&gt;buf - page_address(page), len,</div><div class='add'>+					q-&gt;buf_size);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		skb = napi_build_skb(e-&gt;buf, q-&gt;buf_size);</div><div class='del'>-		if (!skb) {</div><div class='del'>-			page_pool_put_full_page(q-&gt;page_pool,</div><div class='del'>-						virt_to_head_page(e-&gt;buf),</div><div class='del'>-						true);</div><div class='del'>-			break;</div><div class='add'>+		if (FIELD_GET(QDMA_DESC_MORE_MASK, desc_ctrl))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (netdev_uses_dsa(port-&gt;dev)) {</div><div class='add'>+			/* PPE module requires untagged packets to work</div><div class='add'>+			 * properly and it provides DSA port index via the</div><div class='add'>+			 * DMA descriptor. Report DSA tag to the DSA stack</div><div class='add'>+			 * via skb dst info.</div><div class='add'>+			 */</div><div class='add'>+			u32 sptag = FIELD_GET(QDMA_ETH_RXMSG_SPTAG,</div><div class='add'>+					      le32_to_cpu(desc-&gt;msg0));</div><div class='add'>+</div><div class='add'>+			if (sptag &lt; ARRAY_SIZE(port-&gt;dsa_meta) &amp;&amp;</div><div class='add'>+			    port-&gt;dsa_meta[sptag])</div><div class='add'>+				skb_dst_set_noref(q-&gt;skb,</div><div class='add'>+						  &amp;port-&gt;dsa_meta[sptag]-&gt;dst);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		skb_reserve(skb, 2);</div><div class='del'>-		__skb_put(skb, len);</div><div class='del'>-		skb_mark_for_recycle(skb);</div><div class='del'>-		skb-&gt;dev = eth-&gt;ports[p]-&gt;dev;</div><div class='del'>-		skb-&gt;protocol = eth_type_trans(skb, skb-&gt;dev);</div><div class='del'>-		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='del'>-		skb_record_rx_queue(skb, qid);</div><div class='del'>-		napi_gro_receive(&amp;q-&gt;napi, skb);</div><div class='add'>+		hash = FIELD_GET(AIROHA_RXD4_FOE_ENTRY, msg1);</div><div class='add'>+		if (hash != AIROHA_RXD4_FOE_ENTRY)</div><div class='add'>+			skb_set_hash(q-&gt;skb, jhash_1word(hash, 0),</div><div class='add'>+				     PKT_HASH_TYPE_L4);</div><div class='add'>+</div><div class='add'>+		reason = FIELD_GET(AIROHA_RXD4_PPE_CPU_REASON, msg1);</div><div class='add'>+		if (reason == PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)</div><div class='add'>+			airoha_ppe_check_skb(&amp;eth-&gt;ppe-&gt;dev, q-&gt;skb, hash,</div><div class='add'>+					     false);</div><div class='ctx'> </div><div class='ctx'> 		done++;</div><div class='add'>+		napi_gro_receive(&amp;q-&gt;napi, q-&gt;skb);</div><div class='add'>+		q-&gt;skb = NULL;</div><div class='add'>+		continue;</div><div class='add'>+free_frag:</div><div class='add'>+		if (q-&gt;skb) {</div><div class='add'>+			dev_kfree_skb(q-&gt;skb);</div><div class='add'>+			q-&gt;skb = NULL;</div><div class='add'>+		} else {</div><div class='add'>+			page_pool_put_full_page(q-&gt;page_pool, page, true);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	airoha_qdma_fill_rx_queue(q);</div><div class='ctx'> </div><div class='hunk'>@@ -1550,9 +716,20 @@ static int airoha_qdma_rx_napi_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		done += cur;</div><div class='ctx'> 	} while (cur &amp;&amp; done &lt; budget);</div><div class='ctx'> </div><div class='del'>-	if (done &lt; budget &amp;&amp; napi_complete(napi))</div><div class='del'>-		airoha_qdma_irq_enable(q-&gt;qdma, QDMA_INT_REG_IDX1,</div><div class='del'>-				       RX_DONE_INT_MASK);</div><div class='add'>+	if (done &lt; budget &amp;&amp; napi_complete(napi)) {</div><div class='add'>+		struct airoha_qdma *qdma = q-&gt;qdma;</div><div class='add'>+		int i, qid = q - &amp;qdma-&gt;q_rx[0];</div><div class='add'>+		int intr_reg = qid &lt; RX_DONE_HIGH_OFFSET ? QDMA_INT_REG_IDX1</div><div class='add'>+							 : QDMA_INT_REG_IDX2;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;irq_banks); i++) {</div><div class='add'>+			if (!(BIT(qid) &amp; RX_IRQ_BANK_PIN_MASK(i)))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[i], intr_reg,</div><div class='add'>+					       BIT(qid % RX_DONE_HIGH_OFFSET));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return done;</div><div class='ctx'> }</div><div class='hunk'>@@ -1608,6 +785,7 @@ static int airoha_qdma_init_rx_queue(struct airoha_queue *q,</div><div class='ctx'> 			FIELD_PREP(RX_RING_THR_MASK, thr));</div><div class='ctx'> 	airoha_qdma_rmw(qdma, REG_RX_DMA_IDX(qid), RX_RING_DMA_IDX_MASK,</div><div class='ctx'> 			FIELD_PREP(RX_RING_DMA_IDX_MASK, q-&gt;head));</div><div class='add'>+	airoha_qdma_set(qdma, REG_RX_SCATTER_CFG(qid), RX_RING_SG_EN_MASK);</div><div class='ctx'> </div><div class='ctx'> 	airoha_qdma_fill_rx_queue(q);</div><div class='ctx'> </div><div class='hunk'>@@ -1714,19 +892,13 @@ static int airoha_qdma_tx_napi_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 		dma_unmap_single(eth-&gt;dev, e-&gt;dma_addr, e-&gt;dma_len,</div><div class='ctx'> 				 DMA_TO_DEVICE);</div><div class='del'>-		memset(e, 0, sizeof(*e));</div><div class='add'>+		e-&gt;dma_addr = 0;</div><div class='add'>+		list_add_tail(&amp;e-&gt;list, &amp;q-&gt;tx_list);</div><div class='add'>+</div><div class='ctx'> 		WRITE_ONCE(desc-&gt;msg0, 0);</div><div class='ctx'> 		WRITE_ONCE(desc-&gt;msg1, 0);</div><div class='ctx'> 		q-&gt;queued--;</div><div class='ctx'> </div><div class='del'>-		/* completion ring can report out-of-order indexes if hw QoS</div><div class='del'>-		 * is enabled and packets with different priority are queued</div><div class='del'>-		 * to same DMA ring. Take into account possible out-of-order</div><div class='del'>-		 * reports incrementing DMA ring tail pointer</div><div class='del'>-		 */</div><div class='del'>-		while (q-&gt;tail != q-&gt;head &amp;&amp; !q-&gt;entry[q-&gt;tail].dma_addr)</div><div class='del'>-			q-&gt;tail = (q-&gt;tail + 1) % q-&gt;ndesc;</div><div class='del'>-</div><div class='ctx'> 		if (skb) {</div><div class='ctx'> 			u16 queue = skb_get_queue_mapping(skb);</div><div class='ctx'> 			struct netdev_queue *txq;</div><div class='hunk'>@@ -1754,7 +926,7 @@ unlock:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (done &lt; budget &amp;&amp; napi_complete(napi))</div><div class='del'>-		airoha_qdma_irq_enable(qdma, QDMA_INT_REG_IDX0,</div><div class='add'>+		airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[0], QDMA_INT_REG_IDX0,</div><div class='ctx'> 				       TX_DONE_INT_MASK(id));</div><div class='ctx'> </div><div class='ctx'> 	return done;</div><div class='hunk'>@@ -1771,6 +943,7 @@ static int airoha_qdma_init_tx_queue(struct airoha_queue *q,</div><div class='ctx'> 	q-&gt;ndesc = size;</div><div class='ctx'> 	q-&gt;qdma = qdma;</div><div class='ctx'> 	q-&gt;free_thr = 1 + MAX_SKB_FRAGS;</div><div class='add'>+	INIT_LIST_HEAD(&amp;q-&gt;tx_list);</div><div class='ctx'> </div><div class='ctx'> 	q-&gt;entry = devm_kzalloc(eth-&gt;dev, q-&gt;ndesc * sizeof(*q-&gt;entry),</div><div class='ctx'> 				GFP_KERNEL);</div><div class='hunk'>@@ -1783,17 +956,21 @@ static int airoha_qdma_init_tx_queue(struct airoha_queue *q,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; q-&gt;ndesc; i++) {</div><div class='del'>-		u32 val;</div><div class='add'>+		u32 val = FIELD_PREP(QDMA_DESC_DONE_MASK, 1);</div><div class='ctx'> </div><div class='del'>-		val = FIELD_PREP(QDMA_DESC_DONE_MASK, 1);</div><div class='add'>+		list_add_tail(&amp;q-&gt;entry[i].list, &amp;q-&gt;tx_list);</div><div class='ctx'> 		WRITE_ONCE(q-&gt;desc[i].ctrl, cpu_to_le32(val));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* xmit ring drop default setting */</div><div class='add'>+	airoha_qdma_set(qdma, REG_TX_RING_BLOCKING(qid),</div><div class='add'>+			TX_RING_IRQ_BLOCKING_TX_DROP_EN_MASK);</div><div class='add'>+</div><div class='ctx'> 	airoha_qdma_wr(qdma, REG_TX_RING_BASE(qid), dma_addr);</div><div class='ctx'> 	airoha_qdma_rmw(qdma, REG_TX_CPU_IDX(qid), TX_RING_CPU_IDX_MASK,</div><div class='del'>-			FIELD_PREP(TX_RING_CPU_IDX_MASK, q-&gt;head));</div><div class='add'>+			FIELD_PREP(TX_RING_CPU_IDX_MASK, 0));</div><div class='ctx'> 	airoha_qdma_rmw(qdma, REG_TX_DMA_IDX(qid), TX_RING_DMA_IDX_MASK,</div><div class='del'>-			FIELD_PREP(TX_RING_DMA_IDX_MASK, q-&gt;head));</div><div class='add'>+			FIELD_PREP(TX_RING_DMA_IDX_MASK, 0));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1849,17 +1026,21 @@ static int airoha_qdma_init_tx(struct airoha_qdma *qdma)</div><div class='ctx'> static void airoha_qdma_cleanup_tx_queue(struct airoha_queue *q)</div><div class='ctx'> {</div><div class='ctx'> 	struct airoha_eth *eth = q-&gt;qdma-&gt;eth;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;q-&gt;lock);</div><div class='del'>-	while (q-&gt;queued) {</div><div class='del'>-		struct airoha_queue_entry *e = &amp;q-&gt;entry[q-&gt;tail];</div><div class='add'>+	for (i = 0; i &lt; q-&gt;ndesc; i++) {</div><div class='add'>+		struct airoha_queue_entry *e = &amp;q-&gt;entry[i];</div><div class='add'>+</div><div class='add'>+		if (!e-&gt;dma_addr)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='ctx'> 		dma_unmap_single(eth-&gt;dev, e-&gt;dma_addr, e-&gt;dma_len,</div><div class='ctx'> 				 DMA_TO_DEVICE);</div><div class='ctx'> 		dev_kfree_skb_any(e-&gt;skb);</div><div class='add'>+		e-&gt;dma_addr = 0;</div><div class='ctx'> 		e-&gt;skb = NULL;</div><div class='del'>-</div><div class='del'>-		q-&gt;tail = (q-&gt;tail + 1) % q-&gt;ndesc;</div><div class='add'>+		list_add_tail(&amp;e-&gt;list, &amp;q-&gt;tx_list);</div><div class='ctx'> 		q-&gt;queued--;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_bh(&amp;q-&gt;lock);</div><div class='hunk'>@@ -1867,37 +1048,64 @@ static void airoha_qdma_cleanup_tx_queue(struct airoha_queue *q)</div><div class='ctx'> </div><div class='ctx'> static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma)</div><div class='ctx'> {</div><div class='add'>+	int size, index, num_desc = HW_DSCP_NUM;</div><div class='ctx'> 	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+	int id = qdma - &amp;eth-&gt;qdma[0];</div><div class='add'>+	u32 status, buf_size;</div><div class='ctx'> 	dma_addr_t dma_addr;</div><div class='del'>-	u32 status;</div><div class='del'>-	int size;</div><div class='add'>+	const char *name;</div><div class='ctx'> </div><div class='del'>-	size = HW_DSCP_NUM * sizeof(struct airoha_qdma_fwd_desc);</div><div class='del'>-	qdma-&gt;hfwd.desc = dmam_alloc_coherent(eth-&gt;dev, size, &amp;dma_addr,</div><div class='del'>-					      GFP_KERNEL);</div><div class='del'>-	if (!qdma-&gt;hfwd.desc)</div><div class='add'>+	name = devm_kasprintf(eth-&gt;dev, GFP_KERNEL, "qdma%d-buf", id);</div><div class='add'>+	if (!name)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	airoha_qdma_wr(qdma, REG_FWD_DSCP_BASE, dma_addr);</div><div class='add'>+	buf_size = id ? AIROHA_MAX_PACKET_SIZE / 2 : AIROHA_MAX_PACKET_SIZE;</div><div class='add'>+	index = of_property_match_string(eth-&gt;dev-&gt;of_node,</div><div class='add'>+					 "memory-region-names", name);</div><div class='add'>+	if (index &gt;= 0) {</div><div class='add'>+		struct reserved_mem *rmem;</div><div class='add'>+		struct device_node *np;</div><div class='ctx'> </div><div class='del'>-	size = AIROHA_MAX_PACKET_SIZE * HW_DSCP_NUM;</div><div class='del'>-	qdma-&gt;hfwd.q = dmam_alloc_coherent(eth-&gt;dev, size, &amp;dma_addr,</div><div class='del'>-					   GFP_KERNEL);</div><div class='del'>-	if (!qdma-&gt;hfwd.q)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		/* Consume reserved memory for hw forwarding buffers queue if</div><div class='add'>+		 * available in the DTS</div><div class='add'>+		 */</div><div class='add'>+		np = of_parse_phandle(eth-&gt;dev-&gt;of_node, "memory-region",</div><div class='add'>+				      index);</div><div class='add'>+		if (!np)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+</div><div class='add'>+		rmem = of_reserved_mem_lookup(np);</div><div class='add'>+		of_node_put(np);</div><div class='add'>+		dma_addr = rmem-&gt;base;</div><div class='add'>+		/* Compute the number of hw descriptors according to the</div><div class='add'>+		 * reserved memory size and the payload buffer size</div><div class='add'>+		 */</div><div class='add'>+		num_desc = div_u64(rmem-&gt;size, buf_size);</div><div class='add'>+	} else {</div><div class='add'>+		size = buf_size * num_desc;</div><div class='add'>+		if (!dmam_alloc_coherent(eth-&gt;dev, size, &amp;dma_addr,</div><div class='add'>+					 GFP_KERNEL))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	airoha_qdma_wr(qdma, REG_FWD_BUF_BASE, dma_addr);</div><div class='ctx'> </div><div class='add'>+	size = num_desc * sizeof(struct airoha_qdma_fwd_desc);</div><div class='add'>+	if (!dmam_alloc_coherent(eth-&gt;dev, size, &amp;dma_addr, GFP_KERNEL))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_FWD_DSCP_BASE, dma_addr);</div><div class='add'>+	/* QDMA0: 2KB. QDMA1: 1KB */</div><div class='ctx'> 	airoha_qdma_rmw(qdma, REG_HW_FWD_DSCP_CFG,</div><div class='ctx'> 			HW_FWD_DSCP_PAYLOAD_SIZE_MASK,</div><div class='del'>-			FIELD_PREP(HW_FWD_DSCP_PAYLOAD_SIZE_MASK, 0));</div><div class='add'>+			FIELD_PREP(HW_FWD_DSCP_PAYLOAD_SIZE_MASK, !!id));</div><div class='ctx'> 	airoha_qdma_rmw(qdma, REG_FWD_DSCP_LOW_THR, FWD_DSCP_LOW_THR_MASK,</div><div class='ctx'> 			FIELD_PREP(FWD_DSCP_LOW_THR_MASK, 128));</div><div class='ctx'> 	airoha_qdma_rmw(qdma, REG_LMGR_INIT_CFG,</div><div class='ctx'> 			LMGR_INIT_START | LMGR_SRAM_MODE_MASK |</div><div class='ctx'> 			HW_FWD_DESC_NUM_MASK,</div><div class='del'>-			FIELD_PREP(HW_FWD_DESC_NUM_MASK, HW_DSCP_NUM) |</div><div class='del'>-			LMGR_INIT_START);</div><div class='add'>+			FIELD_PREP(HW_FWD_DESC_NUM_MASK, num_desc) |</div><div class='add'>+			LMGR_INIT_START | LMGR_SRAM_MODE_MASK);</div><div class='ctx'> </div><div class='ctx'> 	return read_poll_timeout(airoha_qdma_rr, status,</div><div class='ctx'> 				 !(status &amp; LMGR_INIT_START), USEC_PER_MSEC,</div><div class='hunk'>@@ -1955,18 +1163,49 @@ static void airoha_qdma_init_qos(struct airoha_qdma *qdma)</div><div class='ctx'> 			FIELD_PREP(SLA_SLOW_TICK_RATIO_MASK, 40));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void airoha_qdma_init_qos_stats(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AIROHA_NUM_QOS_CHANNELS; i++) {</div><div class='add'>+		/* Tx-cpu transferred count */</div><div class='add'>+		airoha_qdma_wr(qdma, REG_CNTR_VAL(i &lt;&lt; 1), 0);</div><div class='add'>+		airoha_qdma_wr(qdma, REG_CNTR_CFG(i &lt;&lt; 1),</div><div class='add'>+			       CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |</div><div class='add'>+			       CNTR_ALL_DSCP_RING_EN_MASK |</div><div class='add'>+			       FIELD_PREP(CNTR_CHAN_MASK, i));</div><div class='add'>+		/* Tx-fwd transferred count */</div><div class='add'>+		airoha_qdma_wr(qdma, REG_CNTR_VAL((i &lt;&lt; 1) + 1), 0);</div><div class='add'>+		airoha_qdma_wr(qdma, REG_CNTR_CFG(i &lt;&lt; 1),</div><div class='add'>+			       CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |</div><div class='add'>+			       CNTR_ALL_DSCP_RING_EN_MASK |</div><div class='add'>+			       FIELD_PREP(CNTR_SRC_MASK, 1) |</div><div class='add'>+			       FIELD_PREP(CNTR_CHAN_MASK, i));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int airoha_qdma_hw_init(struct airoha_qdma *qdma)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	/* clear pending irqs */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;irqmask); i++)</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;irq_banks); i++) {</div><div class='add'>+		/* clear pending irqs */</div><div class='ctx'> 		airoha_qdma_wr(qdma, REG_INT_STATUS(i), 0xffffffff);</div><div class='del'>-</div><div class='del'>-	/* setup irqs */</div><div class='del'>-	airoha_qdma_irq_enable(qdma, QDMA_INT_REG_IDX0, INT_IDX0_MASK);</div><div class='del'>-	airoha_qdma_irq_enable(qdma, QDMA_INT_REG_IDX1, INT_IDX1_MASK);</div><div class='del'>-	airoha_qdma_irq_enable(qdma, QDMA_INT_REG_IDX4, INT_IDX4_MASK);</div><div class='add'>+		/* setup rx irqs */</div><div class='add'>+		airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[i], QDMA_INT_REG_IDX0,</div><div class='add'>+				       INT_RX0_MASK(RX_IRQ_BANK_PIN_MASK(i)));</div><div class='add'>+		airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[i], QDMA_INT_REG_IDX1,</div><div class='add'>+				       INT_RX1_MASK(RX_IRQ_BANK_PIN_MASK(i)));</div><div class='add'>+		airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[i], QDMA_INT_REG_IDX2,</div><div class='add'>+				       INT_RX2_MASK(RX_IRQ_BANK_PIN_MASK(i)));</div><div class='add'>+		airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[i], QDMA_INT_REG_IDX3,</div><div class='add'>+				       INT_RX3_MASK(RX_IRQ_BANK_PIN_MASK(i)));</div><div class='add'>+	}</div><div class='add'>+	/* setup tx irqs */</div><div class='add'>+	airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[0], QDMA_INT_REG_IDX0,</div><div class='add'>+			       TX_COHERENT_LOW_INT_MASK | INT_TX_MASK);</div><div class='add'>+	airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[0], QDMA_INT_REG_IDX4,</div><div class='add'>+			       TX_COHERENT_HIGH_INT_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* setup irq binding */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx); i++) {</div><div class='hunk'>@@ -1982,7 +1221,6 @@ static int airoha_qdma_hw_init(struct airoha_qdma *qdma)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	airoha_qdma_wr(qdma, REG_QDMA_GLOBAL_CFG,</div><div class='del'>-		       GLOBAL_CFG_RX_2B_OFFSET_MASK |</div><div class='ctx'> 		       FIELD_PREP(GLOBAL_CFG_DMA_PREFERENCE_MASK, 3) |</div><div class='ctx'> 		       GLOBAL_CFG_CPU_TXR_RR_MASK |</div><div class='ctx'> 		       GLOBAL_CFG_PAYLOAD_BYTE_SWAP_MASK |</div><div class='hunk'>@@ -2005,36 +1243,46 @@ static int airoha_qdma_hw_init(struct airoha_qdma *qdma)</div><div class='ctx'> </div><div class='ctx'> 	airoha_qdma_set(qdma, REG_TXQ_CNGST_CFG,</div><div class='ctx'> 			TXQ_CNGST_DROP_EN | TXQ_CNGST_DEI_DROP_EN);</div><div class='add'>+	airoha_qdma_init_qos_stats(qdma);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t airoha_irq_handler(int irq, void *dev_instance)</div><div class='ctx'> {</div><div class='del'>-	struct airoha_qdma *qdma = dev_instance;</div><div class='del'>-	u32 intr[ARRAY_SIZE(qdma-&gt;irqmask)];</div><div class='add'>+	struct airoha_irq_bank *irq_bank = dev_instance;</div><div class='add'>+	struct airoha_qdma *qdma = irq_bank-&gt;qdma;</div><div class='add'>+	u32 rx_intr_mask = 0, rx_intr1, rx_intr2;</div><div class='add'>+	u32 intr[ARRAY_SIZE(irq_bank-&gt;irqmask)];</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;irqmask); i++) {</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(intr); i++) {</div><div class='ctx'> 		intr[i] = airoha_qdma_rr(qdma, REG_INT_STATUS(i));</div><div class='del'>-		intr[i] &amp;= qdma-&gt;irqmask[i];</div><div class='add'>+		intr[i] &amp;= irq_bank-&gt;irqmask[i];</div><div class='ctx'> 		airoha_qdma_wr(qdma, REG_INT_STATUS(i), intr[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(DEV_STATE_INITIALIZED, &amp;qdma-&gt;eth-&gt;state))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='del'>-	if (intr[1] &amp; RX_DONE_INT_MASK) {</div><div class='del'>-		airoha_qdma_irq_disable(qdma, QDMA_INT_REG_IDX1,</div><div class='del'>-					RX_DONE_INT_MASK);</div><div class='add'>+	rx_intr1 = intr[1] &amp; RX_DONE_LOW_INT_MASK;</div><div class='add'>+	if (rx_intr1) {</div><div class='add'>+		airoha_qdma_irq_disable(irq_bank, QDMA_INT_REG_IDX1, rx_intr1);</div><div class='add'>+		rx_intr_mask |= rx_intr1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='del'>-			if (!qdma-&gt;q_rx[i].ndesc)</div><div class='del'>-				continue;</div><div class='add'>+	rx_intr2 = intr[2] &amp; RX_DONE_HIGH_INT_MASK;</div><div class='add'>+	if (rx_intr2) {</div><div class='add'>+		airoha_qdma_irq_disable(irq_bank, QDMA_INT_REG_IDX2, rx_intr2);</div><div class='add'>+		rx_intr_mask |= (rx_intr2 &lt;&lt; 16);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-			if (intr[1] &amp; BIT(i))</div><div class='del'>-				napi_schedule(&amp;qdma-&gt;q_rx[i].napi);</div><div class='del'>-		}</div><div class='add'>+	for (i = 0; rx_intr_mask &amp;&amp; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='add'>+		if (!qdma-&gt;q_rx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (rx_intr_mask &amp; BIT(i))</div><div class='add'>+			napi_schedule(&amp;qdma-&gt;q_rx[i].napi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (intr[0] &amp; INT_TX_MASK) {</div><div class='hunk'>@@ -2042,7 +1290,7 @@ static irqreturn_t airoha_irq_handler(int irq, void *dev_instance)</div><div class='ctx'> 			if (!(intr[0] &amp; TX_DONE_INT_MASK(i)))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			airoha_qdma_irq_disable(qdma, QDMA_INT_REG_IDX0,</div><div class='add'>+			airoha_qdma_irq_disable(irq_bank, QDMA_INT_REG_IDX0,</div><div class='ctx'> 						TX_DONE_INT_MASK(i));</div><div class='ctx'> 			napi_schedule(&amp;qdma-&gt;q_tx_irq[i].napi);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2051,6 +1299,39 @@ static irqreturn_t airoha_irq_handler(int irq, void *dev_instance)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int airoha_qdma_init_irq_banks(struct platform_device *pdev,</div><div class='add'>+				      struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+	int i, id = qdma - &amp;eth-&gt;qdma[0];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;irq_banks); i++) {</div><div class='add'>+		struct airoha_irq_bank *irq_bank = &amp;qdma-&gt;irq_banks[i];</div><div class='add'>+		int err, irq_index = 4 * id + i;</div><div class='add'>+		const char *name;</div><div class='add'>+</div><div class='add'>+		spin_lock_init(&amp;irq_bank-&gt;irq_lock);</div><div class='add'>+		irq_bank-&gt;qdma = qdma;</div><div class='add'>+</div><div class='add'>+		irq_bank-&gt;irq = platform_get_irq(pdev, irq_index);</div><div class='add'>+		if (irq_bank-&gt;irq &lt; 0)</div><div class='add'>+			return irq_bank-&gt;irq;</div><div class='add'>+</div><div class='add'>+		name = devm_kasprintf(eth-&gt;dev, GFP_KERNEL,</div><div class='add'>+				      KBUILD_MODNAME ".%d", irq_index);</div><div class='add'>+		if (!name)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		err = devm_request_irq(eth-&gt;dev, irq_bank-&gt;irq,</div><div class='add'>+				       airoha_irq_handler, IRQF_SHARED, name,</div><div class='add'>+				       irq_bank);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int airoha_qdma_init(struct platform_device *pdev,</div><div class='ctx'> 			    struct airoha_eth *eth,</div><div class='ctx'> 			    struct airoha_qdma *qdma)</div><div class='hunk'>@@ -2058,9 +1339,7 @@ static int airoha_qdma_init(struct platform_device *pdev,</div><div class='ctx'> 	int err, id = qdma - &amp;eth-&gt;qdma[0];</div><div class='ctx'> 	const char *res;</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;qdma-&gt;irq_lock);</div><div class='ctx'> 	qdma-&gt;eth = eth;</div><div class='del'>-</div><div class='ctx'> 	res = devm_kasprintf(eth-&gt;dev, GFP_KERNEL, "qdma%d", id);</div><div class='ctx'> 	if (!res)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -2070,12 +1349,7 @@ static int airoha_qdma_init(struct platform_device *pdev,</div><div class='ctx'> 		return dev_err_probe(eth-&gt;dev, PTR_ERR(qdma-&gt;regs),</div><div class='ctx'> 				     "failed to iomap qdma%d regs\n", id);</div><div class='ctx'> </div><div class='del'>-	qdma-&gt;irq = platform_get_irq(pdev, 4 * id);</div><div class='del'>-	if (qdma-&gt;irq &lt; 0)</div><div class='del'>-		return qdma-&gt;irq;</div><div class='del'>-</div><div class='del'>-	err = devm_request_irq(eth-&gt;dev, qdma-&gt;irq, airoha_irq_handler,</div><div class='del'>-			       IRQF_SHARED, KBUILD_MODNAME, qdma);</div><div class='add'>+	err = airoha_qdma_init_irq_banks(pdev, qdma);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -2100,8 +1374,7 @@ static int airoha_hw_init(struct platform_device *pdev,</div><div class='ctx'> 	int err, i;</div><div class='ctx'> </div><div class='ctx'> 	/* disable xsi */</div><div class='del'>-	err = reset_control_bulk_assert(ARRAY_SIZE(eth-&gt;xsi_rsts),</div><div class='del'>-					eth-&gt;xsi_rsts);</div><div class='add'>+	err = reset_control_bulk_assert(eth-&gt;soc-&gt;num_xsi_rsts, eth-&gt;xsi_rsts);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -2125,6 +1398,10 @@ static int airoha_hw_init(struct platform_device *pdev,</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = airoha_ppe_init(eth);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	set_bit(DEV_STATE_INITIALIZED, &amp;eth-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2138,17 +1415,14 @@ static void airoha_hw_cleanup(struct airoha_qdma *qdma)</div><div class='ctx'> 		if (!qdma-&gt;q_rx[i].ndesc)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		napi_disable(&amp;qdma-&gt;q_rx[i].napi);</div><div class='ctx'> 		netif_napi_del(&amp;qdma-&gt;q_rx[i].napi);</div><div class='ctx'> 		airoha_qdma_cleanup_rx_queue(&amp;qdma-&gt;q_rx[i]);</div><div class='ctx'> 		if (qdma-&gt;q_rx[i].page_pool)</div><div class='ctx'> 			page_pool_destroy(qdma-&gt;q_rx[i].page_pool);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx_irq); i++) {</div><div class='del'>-		napi_disable(&amp;qdma-&gt;q_tx_irq[i].napi);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx_irq); i++)</div><div class='ctx'> 		netif_napi_del(&amp;qdma-&gt;q_tx_irq[i].napi);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx); i++) {</div><div class='ctx'> 		if (!qdma-&gt;q_tx[i].ndesc)</div><div class='hunk'>@@ -2173,6 +1447,21 @@ static void airoha_qdma_start_napi(struct airoha_qdma *qdma)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void airoha_qdma_stop_napi(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx_irq); i++)</div><div class='add'>+		napi_disable(&amp;qdma-&gt;q_tx_irq[i].napi);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='add'>+		if (!qdma-&gt;q_rx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		napi_disable(&amp;qdma-&gt;q_rx[i].napi);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void airoha_update_hw_stats(struct airoha_gdm_port *port)</div><div class='ctx'> {</div><div class='ctx'> 	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='hunk'>@@ -2319,12 +1608,12 @@ static void airoha_update_hw_stats(struct airoha_gdm_port *port)</div><div class='ctx'> </div><div class='ctx'> static int airoha_dev_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	int err, len = ETH_HLEN + dev-&gt;mtu + ETH_FCS_LEN;</div><div class='ctx'> 	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='ctx'> 	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	netif_tx_start_all_queues(dev);</div><div class='del'>-	err = airoha_set_gdm_ports(qdma-&gt;eth, true);</div><div class='add'>+	err = airoha_set_vip_for_gdm_port(port, true);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -2335,9 +1624,15 @@ static int airoha_dev_open(struct net_device *dev)</div><div class='ctx'> 		airoha_fe_clear(qdma-&gt;eth, REG_GDM_INGRESS_CFG(port-&gt;id),</div><div class='ctx'> 				GDM_STAG_EN_MASK);</div><div class='ctx'> </div><div class='add'>+	airoha_fe_rmw(qdma-&gt;eth, REG_GDM_LEN_CFG(port-&gt;id),</div><div class='add'>+		      GDM_SHORT_LEN_MASK | GDM_LONG_LEN_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_SHORT_LEN_MASK, 60) |</div><div class='add'>+		      FIELD_PREP(GDM_LONG_LEN_MASK, len));</div><div class='add'>+</div><div class='ctx'> 	airoha_qdma_set(qdma, REG_QDMA_GLOBAL_CFG,</div><div class='ctx'> 			GLOBAL_CFG_TX_DMA_EN_MASK |</div><div class='ctx'> 			GLOBAL_CFG_RX_DMA_EN_MASK);</div><div class='add'>+	atomic_inc(&amp;qdma-&gt;users);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2349,20 +1644,24 @@ static int airoha_dev_stop(struct net_device *dev)</div><div class='ctx'> 	int i, err;</div><div class='ctx'> </div><div class='ctx'> 	netif_tx_disable(dev);</div><div class='del'>-	err = airoha_set_gdm_ports(qdma-&gt;eth, false);</div><div class='add'>+	err = airoha_set_vip_for_gdm_port(port, false);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	airoha_qdma_clear(qdma, REG_QDMA_GLOBAL_CFG,</div><div class='del'>-			  GLOBAL_CFG_TX_DMA_EN_MASK |</div><div class='del'>-			  GLOBAL_CFG_RX_DMA_EN_MASK);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx); i++)</div><div class='add'>+		netdev_tx_reset_subqueue(dev, i);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx); i++) {</div><div class='del'>-		if (!qdma-&gt;q_tx[i].ndesc)</div><div class='del'>-			continue;</div><div class='add'>+	if (atomic_dec_and_test(&amp;qdma-&gt;users)) {</div><div class='add'>+		airoha_qdma_clear(qdma, REG_QDMA_GLOBAL_CFG,</div><div class='add'>+				  GLOBAL_CFG_TX_DMA_EN_MASK |</div><div class='add'>+				  GLOBAL_CFG_RX_DMA_EN_MASK);</div><div class='ctx'> </div><div class='del'>-		airoha_qdma_cleanup_tx_queue(&amp;qdma-&gt;q_tx[i]);</div><div class='del'>-		netdev_tx_reset_subqueue(dev, i);</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx); i++) {</div><div class='add'>+			if (!qdma-&gt;q_tx[i].ndesc)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			airoha_qdma_cleanup_tx_queue(&amp;qdma-&gt;q_tx[i]);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2382,12 +1681,106 @@ static int airoha_dev_set_macaddr(struct net_device *dev, void *p)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int airhoha_set_gdm2_loopback(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+	u32 val, pse_port, chan, nbq;</div><div class='add'>+	int src_port;</div><div class='add'>+</div><div class='add'>+	/* Forward the traffic to the proper GDM port */</div><div class='add'>+	pse_port = port-&gt;id == AIROHA_GDM3_IDX ? FE_PSE_PORT_GDM3</div><div class='add'>+					       : FE_PSE_PORT_GDM4;</div><div class='add'>+	airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(2), pse_port);</div><div class='add'>+	airoha_fe_clear(eth, REG_GDM_FWD_CFG(2), GDM_STRIP_CRC_MASK);</div><div class='add'>+</div><div class='add'>+	/* Enable GDM2 loopback */</div><div class='add'>+	airoha_fe_wr(eth, REG_GDM_TXCHN_EN(2), 0xffffffff);</div><div class='add'>+	airoha_fe_wr(eth, REG_GDM_RXCHN_EN(2), 0xffff);</div><div class='add'>+</div><div class='add'>+	chan = port-&gt;id == AIROHA_GDM3_IDX ? airoha_is_7581(eth) ? 4 : 3 : 0;</div><div class='add'>+	airoha_fe_rmw(eth, REG_GDM_LPBK_CFG(2),</div><div class='add'>+		      LPBK_CHAN_MASK | LPBK_MODE_MASK | LPBK_EN_MASK,</div><div class='add'>+		      FIELD_PREP(LPBK_CHAN_MASK, chan) |</div><div class='add'>+		      LBK_GAP_MODE_MASK | LBK_LEN_MODE_MASK |</div><div class='add'>+		      LBK_CHAN_MODE_MASK | LPBK_EN_MASK);</div><div class='add'>+	airoha_fe_rmw(eth, REG_GDM_LEN_CFG(2),</div><div class='add'>+		      GDM_SHORT_LEN_MASK | GDM_LONG_LEN_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_SHORT_LEN_MASK, 60) |</div><div class='add'>+		      FIELD_PREP(GDM_LONG_LEN_MASK, AIROHA_MAX_MTU));</div><div class='add'>+</div><div class='add'>+	/* Disable VIP and IFC for GDM2 */</div><div class='add'>+	airoha_fe_clear(eth, REG_FE_VIP_PORT_EN, BIT(2));</div><div class='add'>+	airoha_fe_clear(eth, REG_FE_IFC_PORT_EN, BIT(2));</div><div class='add'>+</div><div class='add'>+	/* XXX: handle XSI_USB_PORT and XSI_PCE1_PORT */</div><div class='add'>+	nbq = port-&gt;id == AIROHA_GDM3_IDX &amp;&amp; airoha_is_7581(eth) ? 4 : 0;</div><div class='add'>+	src_port = eth-&gt;soc-&gt;ops.get_src_port_id(port, nbq);</div><div class='add'>+	if (src_port &lt; 0)</div><div class='add'>+		return src_port;</div><div class='add'>+</div><div class='add'>+	airoha_fe_rmw(eth, REG_FE_WAN_PORT,</div><div class='add'>+		      WAN1_EN_MASK | WAN1_MASK | WAN0_MASK,</div><div class='add'>+		      FIELD_PREP(WAN0_MASK, src_port));</div><div class='add'>+	val = src_port &amp; SP_CPORT_DFT_MASK;</div><div class='add'>+	airoha_fe_rmw(eth,</div><div class='add'>+		      REG_SP_DFT_CPORT(src_port &gt;&gt; fls(SP_CPORT_DFT_MASK)),</div><div class='add'>+		      SP_CPORT_MASK(val),</div><div class='add'>+		      FE_PSE_PORT_CDM2 &lt;&lt; __ffs(SP_CPORT_MASK(val)));</div><div class='add'>+</div><div class='add'>+	if (port-&gt;id != AIROHA_GDM3_IDX &amp;&amp; airoha_is_7581(eth))</div><div class='add'>+		airoha_fe_rmw(eth, REG_SRC_PORT_FC_MAP6,</div><div class='add'>+			      FC_ID_OF_SRC_PORT24_MASK,</div><div class='add'>+			      FIELD_PREP(FC_ID_OF_SRC_PORT24_MASK, 2));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int airoha_dev_init(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+	u32 pse_port, fe_cpu_port;</div><div class='add'>+	u8 ppe_id;</div><div class='ctx'> </div><div class='ctx'> 	airoha_set_macaddr(port, dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='add'>+	switch (port-&gt;id) {</div><div class='add'>+	case 3:</div><div class='add'>+	case 4:</div><div class='add'>+		/* If GDM2 is active we can't enable loopback */</div><div class='add'>+		if (!eth-&gt;ports[1]) {</div><div class='add'>+			int err;</div><div class='add'>+</div><div class='add'>+			err = airhoha_set_gdm2_loopback(port);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+	case 2:</div><div class='add'>+		if (airoha_ppe_is_enabled(eth, 1)) {</div><div class='add'>+			/* For PPE2 always use secondary cpu port. */</div><div class='add'>+			fe_cpu_port = FE_PSE_PORT_CDM2;</div><div class='add'>+			pse_port = FE_PSE_PORT_PPE2;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+	default: {</div><div class='add'>+		u8 qdma_id = qdma - &amp;eth-&gt;qdma[0];</div><div class='add'>+</div><div class='add'>+		/* For PPE1 select cpu port according to the running QDMA. */</div><div class='add'>+		fe_cpu_port = qdma_id ? FE_PSE_PORT_CDM2 : FE_PSE_PORT_CDM1;</div><div class='add'>+		pse_port = FE_PSE_PORT_PPE1;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(port-&gt;id), pse_port);</div><div class='add'>+	ppe_id = pse_port == FE_PSE_PORT_PPE2 ? 1 : 0;</div><div class='add'>+	airoha_fe_rmw(eth, REG_PPE_DFT_CPORT0(ppe_id),</div><div class='add'>+		      DFT_CPORT_MASK(port-&gt;id),</div><div class='add'>+		      fe_cpu_port &lt;&lt; __ffs(DFT_CPORT_MASK(port-&gt;id)));</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2413,21 +1806,121 @@ static void airoha_dev_get_stats64(struct net_device *dev,</div><div class='ctx'> 	} while (u64_stats_fetch_retry(&amp;port-&gt;stats.syncp, start));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int airoha_dev_change_mtu(struct net_device *dev, int mtu)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+	u32 len = ETH_HLEN + mtu + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	airoha_fe_rmw(eth, REG_GDM_LEN_CFG(port-&gt;id),</div><div class='add'>+		      GDM_LONG_LEN_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_LONG_LEN_MASK, len));</div><div class='add'>+	WRITE_ONCE(dev-&gt;mtu, mtu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 airoha_dev_select_queue(struct net_device *dev, struct sk_buff *skb,</div><div class='add'>+				   struct net_device *sb_dev)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	int queue, channel;</div><div class='add'>+</div><div class='add'>+	/* For dsa device select QoS channel according to the dsa user port</div><div class='add'>+	 * index, rely on port id otherwise. Select QoS queue based on the</div><div class='add'>+	 * skb priority.</div><div class='add'>+	 */</div><div class='add'>+	channel = netdev_uses_dsa(dev) ? skb_get_queue_mapping(skb) : port-&gt;id;</div><div class='add'>+	channel = channel % AIROHA_NUM_QOS_CHANNELS;</div><div class='add'>+	queue = (skb-&gt;priority - 1) % AIROHA_NUM_QOS_QUEUES; /* QoS queue */</div><div class='add'>+	queue = channel * AIROHA_NUM_QOS_QUEUES + queue;</div><div class='add'>+</div><div class='add'>+	return queue &lt; dev-&gt;num_tx_queues ? queue : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_get_dsa_tag(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA)</div><div class='add'>+	struct ethhdr *ehdr;</div><div class='add'>+	u8 xmit_tpid;</div><div class='add'>+	u16 tag;</div><div class='add'>+</div><div class='add'>+	if (!netdev_uses_dsa(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dsa_ptr-&gt;tag_ops-&gt;proto != DSA_TAG_PROTO_MTK)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (skb_cow_head(skb, 0))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ehdr = (struct ethhdr *)skb-&gt;data;</div><div class='add'>+	tag = be16_to_cpu(ehdr-&gt;h_proto);</div><div class='add'>+	xmit_tpid = tag &gt;&gt; 8;</div><div class='add'>+</div><div class='add'>+	switch (xmit_tpid) {</div><div class='add'>+	case MTK_HDR_XMIT_TAGGED_TPID_8100:</div><div class='add'>+		ehdr-&gt;h_proto = cpu_to_be16(ETH_P_8021Q);</div><div class='add'>+		tag &amp;= ~(MTK_HDR_XMIT_TAGGED_TPID_8100 &lt;&lt; 8);</div><div class='add'>+		break;</div><div class='add'>+	case MTK_HDR_XMIT_TAGGED_TPID_88A8:</div><div class='add'>+		ehdr-&gt;h_proto = cpu_to_be16(ETH_P_8021AD);</div><div class='add'>+		tag &amp;= ~(MTK_HDR_XMIT_TAGGED_TPID_88A8 &lt;&lt; 8);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* PPE module requires untagged DSA packets to work properly,</div><div class='add'>+		 * so move DSA tag to DMA descriptor.</div><div class='add'>+		 */</div><div class='add'>+		memmove(skb-&gt;data + MTK_HDR_LEN, skb-&gt;data, 2 * ETH_ALEN);</div><div class='add'>+		__skb_pull(skb, MTK_HDR_LEN);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return tag;</div><div class='add'>+#else</div><div class='add'>+	return 0;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_get_fe_port(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+</div><div class='add'>+	switch (eth-&gt;soc-&gt;version) {</div><div class='add'>+	case 0x7583:</div><div class='add'>+		return port-&gt;id == AIROHA_GDM3_IDX ? FE_PSE_PORT_GDM3</div><div class='add'>+						   : port-&gt;id;</div><div class='add'>+	case 0x7581:</div><div class='add'>+	default:</div><div class='add'>+		return port-&gt;id == AIROHA_GDM4_IDX ? FE_PSE_PORT_GDM4</div><div class='add'>+						   : port-&gt;id;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,</div><div class='ctx'> 				   struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct skb_shared_info *sinfo = skb_shinfo(skb);</div><div class='ctx'> 	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='del'>-	u32 msg0 = 0, msg1, len = skb_headlen(skb);</div><div class='del'>-	int i, qid = skb_get_queue_mapping(skb);</div><div class='ctx'> 	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='del'>-	u32 nr_frags = 1 + sinfo-&gt;nr_frags;</div><div class='add'>+	u32 nr_frags, tag, msg0, msg1, len;</div><div class='add'>+	struct airoha_queue_entry *e;</div><div class='ctx'> 	struct netdev_queue *txq;</div><div class='ctx'> 	struct airoha_queue *q;</div><div class='del'>-	void *data = skb-&gt;data;</div><div class='add'>+	LIST_HEAD(tx_list);</div><div class='add'>+	void *data;</div><div class='add'>+	int i, qid;</div><div class='ctx'> 	u16 index;</div><div class='ctx'> 	u8 fport;</div><div class='ctx'> </div><div class='add'>+	qid = skb_get_queue_mapping(skb) % ARRAY_SIZE(qdma-&gt;q_tx);</div><div class='add'>+	tag = airoha_get_dsa_tag(skb, dev);</div><div class='add'>+</div><div class='add'>+	msg0 = FIELD_PREP(QDMA_ETH_TXMSG_CHAN_MASK,</div><div class='add'>+			  qid / AIROHA_NUM_QOS_QUEUES) |</div><div class='add'>+	       FIELD_PREP(QDMA_ETH_TXMSG_QUEUE_MASK,</div><div class='add'>+			  qid % AIROHA_NUM_QOS_QUEUES) |</div><div class='add'>+	       FIELD_PREP(QDMA_ETH_TXMSG_SP_TAG_MASK, tag);</div><div class='ctx'> 	if (skb-&gt;ip_summed == CHECKSUM_PARTIAL)</div><div class='ctx'> 		msg0 |= FIELD_PREP(QDMA_ETH_TXMSG_TCO_MASK, 1) |</div><div class='ctx'> 			FIELD_PREP(QDMA_ETH_TXMSG_UCO_MASK, 1) |</div><div class='hunk'>@@ -2438,15 +1931,16 @@ static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,</div><div class='ctx'> 		if (skb_cow_head(skb, 0))</div><div class='ctx'> 			goto error;</div><div class='ctx'> </div><div class='del'>-		if (sinfo-&gt;gso_type &amp; (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {</div><div class='del'>-			__be16 csum = cpu_to_be16(sinfo-&gt;gso_size);</div><div class='add'>+		if (skb_shinfo(skb)-&gt;gso_type &amp; (SKB_GSO_TCPV4 |</div><div class='add'>+						 SKB_GSO_TCPV6)) {</div><div class='add'>+			__be16 csum = cpu_to_be16(skb_shinfo(skb)-&gt;gso_size);</div><div class='ctx'> </div><div class='ctx'> 			tcp_hdr(skb)-&gt;check = (__force __sum16)csum;</div><div class='ctx'> 			msg0 |= FIELD_PREP(QDMA_ETH_TXMSG_TSO_MASK, 1);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fport = port-&gt;id == 4 ? FE_PSE_PORT_GDM4 : port-&gt;id;</div><div class='add'>+	fport = airoha_get_fe_port(port);</div><div class='ctx'> 	msg1 = FIELD_PREP(QDMA_ETH_TXMSG_FPORT_MASK, fport) |</div><div class='ctx'> 	       FIELD_PREP(QDMA_ETH_TXMSG_METER_MASK, 0x7f);</div><div class='ctx'> </div><div class='hunk'>@@ -2457,18 +1951,25 @@ static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,</div><div class='ctx'> 	spin_lock_bh(&amp;q-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	txq = netdev_get_tx_queue(dev, qid);</div><div class='del'>-	if (q-&gt;queued + nr_frags &gt; q-&gt;ndesc) {</div><div class='add'>+	nr_frags = 1 + skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+</div><div class='add'>+	if (q-&gt;queued + nr_frags &gt;= q-&gt;ndesc) {</div><div class='ctx'> 		/* not enough space in the queue */</div><div class='ctx'> 		netif_tx_stop_queue(txq);</div><div class='ctx'> 		spin_unlock_bh(&amp;q-&gt;lock);</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	index = q-&gt;head;</div><div class='add'>+	len = skb_headlen(skb);</div><div class='add'>+	data = skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	e = list_first_entry(&amp;q-&gt;tx_list, struct airoha_queue_entry,</div><div class='add'>+			     list);</div><div class='add'>+	index = e - q-&gt;entry;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; nr_frags; i++) {</div><div class='ctx'> 		struct airoha_qdma_desc *desc = &amp;q-&gt;desc[index];</div><div class='del'>-		struct airoha_queue_entry *e = &amp;q-&gt;entry[index];</div><div class='del'>-		skb_frag_t *frag = &amp;sinfo-&gt;frags[i];</div><div class='add'>+		skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[i];</div><div class='ctx'> 		dma_addr_t addr;</div><div class='ctx'> 		u32 val;</div><div class='ctx'> </div><div class='hunk'>@@ -2477,7 +1978,14 @@ static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,</div><div class='ctx'> 		if (unlikely(dma_mapping_error(dev-&gt;dev.parent, addr)))</div><div class='ctx'> 			goto error_unmap;</div><div class='ctx'> </div><div class='del'>-		index = (index + 1) % q-&gt;ndesc;</div><div class='add'>+		list_move_tail(&amp;e-&gt;list, &amp;tx_list);</div><div class='add'>+		e-&gt;skb = i ? NULL : skb;</div><div class='add'>+		e-&gt;dma_addr = addr;</div><div class='add'>+		e-&gt;dma_len = len;</div><div class='add'>+</div><div class='add'>+		e = list_first_entry(&amp;q-&gt;tx_list, struct airoha_queue_entry,</div><div class='add'>+				     list);</div><div class='add'>+		index = e - q-&gt;entry;</div><div class='ctx'> </div><div class='ctx'> 		val = FIELD_PREP(QDMA_DESC_LEN_MASK, len);</div><div class='ctx'> 		if (i &lt; nr_frags - 1)</div><div class='hunk'>@@ -2490,15 +1998,9 @@ static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,</div><div class='ctx'> 		WRITE_ONCE(desc-&gt;msg1, cpu_to_le32(msg1));</div><div class='ctx'> 		WRITE_ONCE(desc-&gt;msg2, cpu_to_le32(0xffff));</div><div class='ctx'> </div><div class='del'>-		e-&gt;skb = i ? NULL : skb;</div><div class='del'>-		e-&gt;dma_addr = addr;</div><div class='del'>-		e-&gt;dma_len = len;</div><div class='del'>-</div><div class='ctx'> 		data = skb_frag_address(frag);</div><div class='ctx'> 		len = skb_frag_size(frag);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	q-&gt;head = index;</div><div class='ctx'> 	q-&gt;queued += i;</div><div class='ctx'> </div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='hunk'>@@ -2507,7 +2009,7 @@ static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,</div><div class='ctx'> 	if (netif_xmit_stopped(txq) || !netdev_xmit_more())</div><div class='ctx'> 		airoha_qdma_rmw(qdma, REG_TX_CPU_IDX(qid),</div><div class='ctx'> 				TX_RING_CPU_IDX_MASK,</div><div class='del'>-				FIELD_PREP(TX_RING_CPU_IDX_MASK, q-&gt;head));</div><div class='add'>+				FIELD_PREP(TX_RING_CPU_IDX_MASK, index));</div><div class='ctx'> </div><div class='ctx'> 	if (q-&gt;ndesc - q-&gt;queued &lt; q-&gt;free_thr)</div><div class='ctx'> 		netif_tx_stop_queue(txq);</div><div class='hunk'>@@ -2517,10 +2019,13 @@ static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> error_unmap:</div><div class='del'>-	for (i--; i &gt;= 0; i--) {</div><div class='del'>-		index = (q-&gt;head + i) % q-&gt;ndesc;</div><div class='del'>-		dma_unmap_single(dev-&gt;dev.parent, q-&gt;entry[index].dma_addr,</div><div class='del'>-				 q-&gt;entry[index].dma_len, DMA_TO_DEVICE);</div><div class='add'>+	while (!list_empty(&amp;tx_list)) {</div><div class='add'>+		e = list_first_entry(&amp;tx_list, struct airoha_queue_entry,</div><div class='add'>+				     list);</div><div class='add'>+		dma_unmap_single(dev-&gt;dev.parent, e-&gt;dma_addr, e-&gt;dma_len,</div><div class='add'>+				 DMA_TO_DEVICE);</div><div class='add'>+		e-&gt;dma_addr = 0;</div><div class='add'>+		list_move_tail(&amp;e-&gt;list, &amp;q-&gt;tx_list);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;q-&gt;lock);</div><div class='hunk'>@@ -2550,8 +2055,12 @@ static void airoha_ethtool_get_mac_stats(struct net_device *dev,</div><div class='ctx'> 	airoha_update_hw_stats(port);</div><div class='ctx'> 	do {</div><div class='ctx'> 		start = u64_stats_fetch_begin(&amp;port-&gt;stats.syncp);</div><div class='add'>+		stats-&gt;FramesTransmittedOK = port-&gt;stats.tx_ok_pkts;</div><div class='add'>+		stats-&gt;OctetsTransmittedOK = port-&gt;stats.tx_ok_bytes;</div><div class='ctx'> 		stats-&gt;MulticastFramesXmittedOK = port-&gt;stats.tx_multicast;</div><div class='ctx'> 		stats-&gt;BroadcastFramesXmittedOK = port-&gt;stats.tx_broadcast;</div><div class='add'>+		stats-&gt;FramesReceivedOK = port-&gt;stats.rx_ok_pkts;</div><div class='add'>+		stats-&gt;OctetsReceivedOK = port-&gt;stats.rx_ok_bytes;</div><div class='ctx'> 		stats-&gt;BroadcastFramesReceivedOK = port-&gt;stats.rx_broadcast;</div><div class='ctx'> 	} while (u64_stats_fetch_retry(&amp;port-&gt;stats.syncp, start));</div><div class='ctx'> }</div><div class='hunk'>@@ -2597,28 +2106,758 @@ airoha_ethtool_get_rmon_stats(struct net_device *dev,</div><div class='ctx'> 	} while (u64_stats_fetch_retry(&amp;port-&gt;stats.syncp, start));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int airoha_qdma_set_chan_tx_sched(struct airoha_gdm_port *port,</div><div class='add'>+					 int channel, enum tx_sched_mode mode,</div><div class='add'>+					 const u16 *weights, u8 n_weights)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AIROHA_NUM_TX_RING; i++)</div><div class='add'>+		airoha_qdma_clear(port-&gt;qdma, REG_QUEUE_CLOSE_CFG(channel),</div><div class='add'>+				  TXQ_DISABLE_CHAN_QUEUE_MASK(channel, i));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; n_weights; i++) {</div><div class='add'>+		u32 status;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		airoha_qdma_wr(port-&gt;qdma, REG_TXWRR_WEIGHT_CFG,</div><div class='add'>+			       TWRR_RW_CMD_MASK |</div><div class='add'>+			       FIELD_PREP(TWRR_CHAN_IDX_MASK, channel) |</div><div class='add'>+			       FIELD_PREP(TWRR_QUEUE_IDX_MASK, i) |</div><div class='add'>+			       FIELD_PREP(TWRR_VALUE_MASK, weights[i]));</div><div class='add'>+		err = read_poll_timeout(airoha_qdma_rr, status,</div><div class='add'>+					status &amp; TWRR_RW_CMD_DONE,</div><div class='add'>+					USEC_PER_MSEC, 10 * USEC_PER_MSEC,</div><div class='add'>+					true, port-&gt;qdma,</div><div class='add'>+					REG_TXWRR_WEIGHT_CFG);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_qdma_rmw(port-&gt;qdma, REG_CHAN_QOS_MODE(channel &gt;&gt; 3),</div><div class='add'>+			CHAN_QOS_MODE_MASK(channel),</div><div class='add'>+			mode &lt;&lt; __ffs(CHAN_QOS_MODE_MASK(channel)));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_tx_prio_sched(struct airoha_gdm_port *port,</div><div class='add'>+					 int channel)</div><div class='add'>+{</div><div class='add'>+	static const u16 w[AIROHA_NUM_QOS_QUEUES] = {};</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_chan_tx_sched(port, channel, TC_SCH_SP, w,</div><div class='add'>+					     ARRAY_SIZE(w));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_tx_ets_sched(struct airoha_gdm_port *port,</div><div class='add'>+					int channel,</div><div class='add'>+					struct tc_ets_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	struct tc_ets_qopt_offload_replace_params *p = &amp;opt-&gt;replace_params;</div><div class='add'>+	enum tx_sched_mode mode = TC_SCH_SP;</div><div class='add'>+	u16 w[AIROHA_NUM_QOS_QUEUES] = {};</div><div class='add'>+	int i, nstrict = 0;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;bands &gt; AIROHA_NUM_QOS_QUEUES)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; p-&gt;bands; i++) {</div><div class='add'>+		if (!p-&gt;quanta[i])</div><div class='add'>+			nstrict++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* this configuration is not supported by the hw */</div><div class='add'>+	if (nstrict == AIROHA_NUM_QOS_QUEUES - 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* EN7581 SoC supports fixed QoS band priority where WRR queues have</div><div class='add'>+	 * lowest priorities with respect to SP ones.</div><div class='add'>+	 * e.g: WRR0, WRR1, .., WRRm, SP0, SP1, .., SPn</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; nstrict; i++) {</div><div class='add'>+		if (p-&gt;priomap[p-&gt;bands - i - 1] != i)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; p-&gt;bands - nstrict; i++) {</div><div class='add'>+		if (p-&gt;priomap[i] != nstrict + i)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		w[i] = p-&gt;weights[nstrict + i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!nstrict)</div><div class='add'>+		mode = TC_SCH_WRR8;</div><div class='add'>+	else if (nstrict &lt; AIROHA_NUM_QOS_QUEUES - 1)</div><div class='add'>+		mode = nstrict + 1;</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_chan_tx_sched(port, channel, mode, w,</div><div class='add'>+					     ARRAY_SIZE(w));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_get_tx_ets_stats(struct airoha_gdm_port *port,</div><div class='add'>+					int channel,</div><div class='add'>+					struct tc_ets_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	u64 cpu_tx_packets = airoha_qdma_rr(port-&gt;qdma,</div><div class='add'>+					    REG_CNTR_VAL(channel &lt;&lt; 1));</div><div class='add'>+	u64 fwd_tx_packets = airoha_qdma_rr(port-&gt;qdma,</div><div class='add'>+					    REG_CNTR_VAL((channel &lt;&lt; 1) + 1));</div><div class='add'>+	u64 tx_packets = (cpu_tx_packets - port-&gt;cpu_tx_packets) +</div><div class='add'>+			 (fwd_tx_packets - port-&gt;fwd_tx_packets);</div><div class='add'>+	_bstats_update(opt-&gt;stats.bstats, 0, tx_packets);</div><div class='add'>+</div><div class='add'>+	port-&gt;cpu_tx_packets = cpu_tx_packets;</div><div class='add'>+	port-&gt;fwd_tx_packets = fwd_tx_packets;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port,</div><div class='add'>+				     struct tc_ets_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	int channel;</div><div class='add'>+</div><div class='add'>+	if (opt-&gt;parent == TC_H_ROOT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	channel = TC_H_MAJ(opt-&gt;handle) &gt;&gt; 16;</div><div class='add'>+	channel = channel % AIROHA_NUM_QOS_CHANNELS;</div><div class='add'>+</div><div class='add'>+	switch (opt-&gt;command) {</div><div class='add'>+	case TC_ETS_REPLACE:</div><div class='add'>+		return airoha_qdma_set_tx_ets_sched(port, channel, opt);</div><div class='add'>+	case TC_ETS_DESTROY:</div><div class='add'>+		/* PRIO is default qdisc scheduler */</div><div class='add'>+		return airoha_qdma_set_tx_prio_sched(port, channel);</div><div class='add'>+	case TC_ETS_STATS:</div><div class='add'>+		return airoha_qdma_get_tx_ets_stats(port, channel, opt);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_get_rl_param(struct airoha_qdma *qdma, int queue_id,</div><div class='add'>+				    u32 addr, enum trtcm_param_type param,</div><div class='add'>+				    u32 *val_low, u32 *val_high)</div><div class='add'>+{</div><div class='add'>+	u32 idx = QDMA_METER_IDX(queue_id), group = QDMA_METER_GROUP(queue_id);</div><div class='add'>+	u32 val, config = FIELD_PREP(RATE_LIMIT_PARAM_TYPE_MASK, param) |</div><div class='add'>+			  FIELD_PREP(RATE_LIMIT_METER_GROUP_MASK, group) |</div><div class='add'>+			  FIELD_PREP(RATE_LIMIT_PARAM_INDEX_MASK, idx);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);</div><div class='add'>+	if (read_poll_timeout(airoha_qdma_rr, val,</div><div class='add'>+			      val &amp; RATE_LIMIT_PARAM_RW_DONE_MASK,</div><div class='add'>+			      USEC_PER_MSEC, 10 * USEC_PER_MSEC, true, qdma,</div><div class='add'>+			      REG_TRTCM_CFG_PARAM(addr)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	*val_low = airoha_qdma_rr(qdma, REG_TRTCM_DATA_LOW(addr));</div><div class='add'>+	if (val_high)</div><div class='add'>+		*val_high = airoha_qdma_rr(qdma, REG_TRTCM_DATA_HIGH(addr));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_rl_param(struct airoha_qdma *qdma, int queue_id,</div><div class='add'>+				    u32 addr, enum trtcm_param_type param,</div><div class='add'>+				    u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 idx = QDMA_METER_IDX(queue_id), group = QDMA_METER_GROUP(queue_id);</div><div class='add'>+	u32 config = RATE_LIMIT_PARAM_RW_MASK |</div><div class='add'>+		     FIELD_PREP(RATE_LIMIT_PARAM_TYPE_MASK, param) |</div><div class='add'>+		     FIELD_PREP(RATE_LIMIT_METER_GROUP_MASK, group) |</div><div class='add'>+		     FIELD_PREP(RATE_LIMIT_PARAM_INDEX_MASK, idx);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_DATA_LOW(addr), val);</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout(airoha_qdma_rr, val,</div><div class='add'>+				 val &amp; RATE_LIMIT_PARAM_RW_DONE_MASK,</div><div class='add'>+				 USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,</div><div class='add'>+				 qdma, REG_TRTCM_CFG_PARAM(addr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_rl_config(struct airoha_qdma *qdma, int queue_id,</div><div class='add'>+				     u32 addr, bool enable, u32 enable_mask)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_get_rl_param(qdma, queue_id, addr, TRTCM_MISC_MODE,</div><div class='add'>+				       &amp;val, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = enable ? val | enable_mask : val &amp; ~enable_mask;</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_rl_param(qdma, queue_id, addr, TRTCM_MISC_MODE,</div><div class='add'>+					val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_rl_token_bucket(struct airoha_qdma *qdma,</div><div class='add'>+					   int queue_id, u32 rate_val,</div><div class='add'>+					   u32 bucket_size)</div><div class='add'>+{</div><div class='add'>+	u32 val, config, tick, unit, rate, rate_frac;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_get_rl_param(qdma, queue_id, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+				       TRTCM_MISC_MODE, &amp;config, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = airoha_qdma_rr(qdma, REG_INGRESS_TRTCM_CFG);</div><div class='add'>+	tick = FIELD_GET(INGRESS_FAST_TICK_MASK, val);</div><div class='add'>+	if (config &amp; TRTCM_TICK_SEL)</div><div class='add'>+		tick *= FIELD_GET(INGRESS_SLOW_TICK_RATIO_MASK, val);</div><div class='add'>+	if (!tick)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	unit = (config &amp; TRTCM_PKT_MODE) ? 1000000 / tick : 8000 / tick;</div><div class='add'>+	if (!unit)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rate = rate_val / unit;</div><div class='add'>+	rate_frac = rate_val % unit;</div><div class='add'>+	rate_frac = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate_frac) / unit;</div><div class='add'>+	rate = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate) |</div><div class='add'>+	       FIELD_PREP(TRTCM_TOKEN_RATE_FRACTION_MASK, rate_frac);</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_set_rl_param(qdma, queue_id, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+				       TRTCM_TOKEN_RATE_MODE, rate);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = bucket_size;</div><div class='add'>+	if (!(config &amp; TRTCM_PKT_MODE))</div><div class='add'>+		val = max_t(u32, val, MIN_TOKEN_SIZE);</div><div class='add'>+	val = min_t(u32, __fls(val), MAX_TOKEN_SIZE_OFFSET);</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_rl_param(qdma, queue_id, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+					TRTCM_BUCKETSIZE_SHIFT_MODE, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_init_rl_config(struct airoha_qdma *qdma, int queue_id,</div><div class='add'>+				      bool enable, enum trtcm_unit_type unit)</div><div class='add'>+{</div><div class='add'>+	bool tick_sel = queue_id == 0 || queue_id == 2 || queue_id == 8;</div><div class='add'>+	enum trtcm_param mode = TRTCM_METER_MODE;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mode |= unit == TRTCM_PACKET_UNIT ? TRTCM_PKT_MODE : 0;</div><div class='add'>+	err = airoha_qdma_set_rl_config(qdma, queue_id, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+					enable, mode);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_rl_config(qdma, queue_id, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+					 tick_sel, TRTCM_TICK_SEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_get_trtcm_param(struct airoha_qdma *qdma, int channel,</div><div class='add'>+				       u32 addr, enum trtcm_param_type param,</div><div class='add'>+				       enum trtcm_mode_type mode,</div><div class='add'>+				       u32 *val_low, u32 *val_high)</div><div class='add'>+{</div><div class='add'>+	u32 idx = QDMA_METER_IDX(channel), group = QDMA_METER_GROUP(channel);</div><div class='add'>+	u32 val, config = FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |</div><div class='add'>+			  FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |</div><div class='add'>+			  FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |</div><div class='add'>+			  FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);</div><div class='add'>+	if (read_poll_timeout(airoha_qdma_rr, val,</div><div class='add'>+			      val &amp; TRTCM_PARAM_RW_DONE_MASK,</div><div class='add'>+			      USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,</div><div class='add'>+			      qdma, REG_TRTCM_CFG_PARAM(addr)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	*val_low = airoha_qdma_rr(qdma, REG_TRTCM_DATA_LOW(addr));</div><div class='add'>+	if (val_high)</div><div class='add'>+		*val_high = airoha_qdma_rr(qdma, REG_TRTCM_DATA_HIGH(addr));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_trtcm_param(struct airoha_qdma *qdma, int channel,</div><div class='add'>+				       u32 addr, enum trtcm_param_type param,</div><div class='add'>+				       enum trtcm_mode_type mode, u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 idx = QDMA_METER_IDX(channel), group = QDMA_METER_GROUP(channel);</div><div class='add'>+	u32 config = TRTCM_PARAM_RW_MASK |</div><div class='add'>+		     FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |</div><div class='add'>+		     FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |</div><div class='add'>+		     FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |</div><div class='add'>+		     FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_DATA_LOW(addr), val);</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout(airoha_qdma_rr, val,</div><div class='add'>+				 val &amp; TRTCM_PARAM_RW_DONE_MASK,</div><div class='add'>+				 USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,</div><div class='add'>+				 qdma, REG_TRTCM_CFG_PARAM(addr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_trtcm_config(struct airoha_qdma *qdma, int channel,</div><div class='add'>+					u32 addr, enum trtcm_mode_type mode,</div><div class='add'>+					bool enable, u32 enable_mask)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (airoha_qdma_get_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,</div><div class='add'>+					mode, &amp;val, NULL))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = enable ? val | enable_mask : val &amp; ~enable_mask;</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,</div><div class='add'>+					   mode, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_trtcm_token_bucket(struct airoha_qdma *qdma,</div><div class='add'>+					      int channel, u32 addr,</div><div class='add'>+					      enum trtcm_mode_type mode,</div><div class='add'>+					      u32 rate_val, u32 bucket_size)</div><div class='add'>+{</div><div class='add'>+	u32 val, config, tick, unit, rate, rate_frac;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (airoha_qdma_get_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,</div><div class='add'>+					mode, &amp;config, NULL))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = airoha_qdma_rr(qdma, addr);</div><div class='add'>+	tick = FIELD_GET(INGRESS_FAST_TICK_MASK, val);</div><div class='add'>+	if (config &amp; TRTCM_TICK_SEL)</div><div class='add'>+		tick *= FIELD_GET(INGRESS_SLOW_TICK_RATIO_MASK, val);</div><div class='add'>+	if (!tick)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	unit = (config &amp; TRTCM_PKT_MODE) ? 1000000 / tick : 8000 / tick;</div><div class='add'>+	if (!unit)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rate = rate_val / unit;</div><div class='add'>+	rate_frac = rate_val % unit;</div><div class='add'>+	rate_frac = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate_frac) / unit;</div><div class='add'>+	rate = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate) |</div><div class='add'>+	       FIELD_PREP(TRTCM_TOKEN_RATE_FRACTION_MASK, rate_frac);</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_set_trtcm_param(qdma, channel, addr,</div><div class='add'>+					  TRTCM_TOKEN_RATE_MODE, mode, rate);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = max_t(u32, bucket_size, MIN_TOKEN_SIZE);</div><div class='add'>+	val = min_t(u32, __fls(val), MAX_TOKEN_SIZE_OFFSET);</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_trtcm_param(qdma, channel, addr,</div><div class='add'>+					   TRTCM_BUCKETSIZE_SHIFT_MODE,</div><div class='add'>+					   mode, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_tx_rate_limit(struct airoha_gdm_port *port,</div><div class='add'>+					 int channel, u32 rate,</div><div class='add'>+					 u32 bucket_size)</div><div class='add'>+{</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;= TRTCM_PEAK_MODE; i++) {</div><div class='add'>+		err = airoha_qdma_set_trtcm_config(port-&gt;qdma, channel,</div><div class='add'>+						   REG_EGRESS_TRTCM_CFG, i,</div><div class='add'>+						   !!rate, TRTCM_METER_MODE);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = airoha_qdma_set_trtcm_token_bucket(port-&gt;qdma, channel,</div><div class='add'>+							 REG_EGRESS_TRTCM_CFG,</div><div class='add'>+							 i, rate, bucket_size);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_htb_alloc_leaf_queue(struct airoha_gdm_port *port,</div><div class='add'>+					  struct tc_htb_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	u32 channel = TC_H_MIN(opt-&gt;classid) % AIROHA_NUM_QOS_CHANNELS;</div><div class='add'>+	u32 rate = div_u64(opt-&gt;rate, 1000) &lt;&lt; 3; /* kbps */</div><div class='add'>+	struct net_device *dev = port-&gt;dev;</div><div class='add'>+	int num_tx_queues = dev-&gt;real_num_tx_queues;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (opt-&gt;parent_classid != TC_HTB_CLASSID_ROOT) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(opt-&gt;extack, "invalid parent classid");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_set_tx_rate_limit(port, channel, rate, opt-&gt;quantum);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(opt-&gt;extack,</div><div class='add'>+				   "failed configuring htb offload");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (opt-&gt;command == TC_HTB_NODE_MODIFY)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = netif_set_real_num_tx_queues(dev, num_tx_queues + 1);</div><div class='add'>+	if (err) {</div><div class='add'>+		airoha_qdma_set_tx_rate_limit(port, channel, 0, opt-&gt;quantum);</div><div class='add'>+		NL_SET_ERR_MSG_MOD(opt-&gt;extack,</div><div class='add'>+				   "failed setting real_num_tx_queues");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_bit(channel, port-&gt;qos_sq_bmap);</div><div class='add'>+	opt-&gt;qid = AIROHA_NUM_TX_RING + channel;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_rx_meter(struct airoha_gdm_port *port,</div><div class='add'>+				    u32 rate, u32 bucket_size,</div><div class='add'>+				    enum trtcm_unit_type unit_type)</div><div class='add'>+{</div><div class='add'>+	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		if (!qdma-&gt;q_rx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = airoha_qdma_init_rl_config(qdma, i, !!rate, unit_type);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = airoha_qdma_set_rl_token_bucket(qdma, i, rate,</div><div class='add'>+						      bucket_size);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_matchall_act_validate(struct tc_cls_matchall_offload *f)</div><div class='add'>+{</div><div class='add'>+	const struct flow_action *actions = &amp;f-&gt;rule-&gt;action;</div><div class='add'>+	const struct flow_action_entry *act;</div><div class='add'>+</div><div class='add'>+	if (!flow_action_has_entries(actions)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "filter run with no actions");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!flow_offload_has_one_action(actions)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "only once action per filter is supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	act = &amp;actions-&gt;entries[0];</div><div class='add'>+	if (act-&gt;id != FLOW_ACTION_POLICE) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack, "unsupported action");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.exceed.act_id != FLOW_ACTION_DROP) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "invalid exceed action id");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.notexceed.act_id != FLOW_ACTION_ACCEPT) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "invalid notexceed action id");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.notexceed.act_id == FLOW_ACTION_ACCEPT &amp;&amp;</div><div class='add'>+	    !flow_action_is_last_entry(actions, act)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "action accept must be last");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.peakrate_bytes_ps || act-&gt;police.avrate ||</div><div class='add'>+	    act-&gt;police.overhead || act-&gt;police.mtu) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "peakrate/avrate/overhead/mtu unsupported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_tc_matchall(struct net_device *dev,</div><div class='add'>+				  struct tc_cls_matchall_offload *f)</div><div class='add'>+{</div><div class='add'>+	enum trtcm_unit_type unit_type = TRTCM_BYTE_UNIT;</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	u32 rate = 0, bucket_size = 0;</div><div class='add'>+</div><div class='add'>+	switch (f-&gt;command) {</div><div class='add'>+	case TC_CLSMATCHALL_REPLACE: {</div><div class='add'>+		const struct flow_action_entry *act;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = airoha_tc_matchall_act_validate(f);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		act = &amp;f-&gt;rule-&gt;action.entries[0];</div><div class='add'>+		if (act-&gt;police.rate_pkt_ps) {</div><div class='add'>+			rate = act-&gt;police.rate_pkt_ps;</div><div class='add'>+			bucket_size = act-&gt;police.burst_pkt;</div><div class='add'>+			unit_type = TRTCM_PACKET_UNIT;</div><div class='add'>+		} else {</div><div class='add'>+			rate = div_u64(act-&gt;police.rate_bytes_ps, 1000);</div><div class='add'>+			rate = rate &lt;&lt; 3; /* Kbps */</div><div class='add'>+			bucket_size = act-&gt;police.burst;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+	}</div><div class='add'>+	case TC_CLSMATCHALL_DESTROY:</div><div class='add'>+		return airoha_qdma_set_rx_meter(port, rate, bucket_size,</div><div class='add'>+						unit_type);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_setup_tc_block_cb(enum tc_setup_type type,</div><div class='add'>+					void *type_data, void *cb_priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = cb_priv;</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+</div><div class='add'>+	if (!tc_can_offload(dev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_CLSFLOWER:</div><div class='add'>+		return airoha_ppe_setup_tc_block_cb(&amp;eth-&gt;ppe-&gt;dev, type_data);</div><div class='add'>+	case TC_SETUP_CLSMATCHALL:</div><div class='add'>+		return airoha_dev_tc_matchall(dev, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_setup_tc_block(struct airoha_gdm_port *port,</div><div class='add'>+				     struct flow_block_offload *f)</div><div class='add'>+{</div><div class='add'>+	flow_setup_cb_t *cb = airoha_dev_setup_tc_block_cb;</div><div class='add'>+	static LIST_HEAD(block_cb_list);</div><div class='add'>+	struct flow_block_cb *block_cb;</div><div class='add'>+</div><div class='add'>+	if (f-&gt;binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	f-&gt;driver_block_list = &amp;block_cb_list;</div><div class='add'>+	switch (f-&gt;command) {</div><div class='add'>+	case FLOW_BLOCK_BIND:</div><div class='add'>+		block_cb = flow_block_cb_lookup(f-&gt;block, cb, port-&gt;dev);</div><div class='add'>+		if (block_cb) {</div><div class='add'>+			flow_block_cb_incref(block_cb);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		block_cb = flow_block_cb_alloc(cb, port-&gt;dev, port-&gt;dev, NULL);</div><div class='add'>+		if (IS_ERR(block_cb))</div><div class='add'>+			return PTR_ERR(block_cb);</div><div class='add'>+</div><div class='add'>+		flow_block_cb_incref(block_cb);</div><div class='add'>+		flow_block_cb_add(block_cb, f);</div><div class='add'>+		list_add_tail(&amp;block_cb-&gt;driver_list, &amp;block_cb_list);</div><div class='add'>+		return 0;</div><div class='add'>+	case FLOW_BLOCK_UNBIND:</div><div class='add'>+		block_cb = flow_block_cb_lookup(f-&gt;block, cb, port-&gt;dev);</div><div class='add'>+		if (!block_cb)</div><div class='add'>+			return -ENOENT;</div><div class='add'>+</div><div class='add'>+		if (!flow_block_cb_decref(block_cb)) {</div><div class='add'>+			flow_block_cb_remove(block_cb, f);</div><div class='add'>+			list_del(&amp;block_cb-&gt;driver_list);</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_tc_remove_htb_queue(struct airoha_gdm_port *port, int queue)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = port-&gt;dev;</div><div class='add'>+</div><div class='add'>+	netif_set_real_num_tx_queues(dev, dev-&gt;real_num_tx_queues - 1);</div><div class='add'>+	airoha_qdma_set_tx_rate_limit(port, queue + 1, 0, 0);</div><div class='add'>+	clear_bit(queue, port-&gt;qos_sq_bmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_htb_delete_leaf_queue(struct airoha_gdm_port *port,</div><div class='add'>+					   struct tc_htb_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	u32 channel = TC_H_MIN(opt-&gt;classid) % AIROHA_NUM_QOS_CHANNELS;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(channel, port-&gt;qos_sq_bmap)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(opt-&gt;extack, "invalid queue id");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_tc_remove_htb_queue(port, channel);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_htb_destroy(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	int q;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(q, port-&gt;qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS)</div><div class='add'>+		airoha_tc_remove_htb_queue(port, q);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_get_htb_get_leaf_queue(struct airoha_gdm_port *port,</div><div class='add'>+					    struct tc_htb_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	u32 channel = TC_H_MIN(opt-&gt;classid) % AIROHA_NUM_QOS_CHANNELS;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(channel, port-&gt;qos_sq_bmap)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(opt-&gt;extack, "invalid queue id");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	opt-&gt;qid = AIROHA_NUM_TX_RING + channel;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_setup_qdisc_htb(struct airoha_gdm_port *port,</div><div class='add'>+				     struct tc_htb_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	switch (opt-&gt;command) {</div><div class='add'>+	case TC_HTB_CREATE:</div><div class='add'>+		break;</div><div class='add'>+	case TC_HTB_DESTROY:</div><div class='add'>+		return airoha_tc_htb_destroy(port);</div><div class='add'>+	case TC_HTB_NODE_MODIFY:</div><div class='add'>+	case TC_HTB_LEAF_ALLOC_QUEUE:</div><div class='add'>+		return airoha_tc_htb_alloc_leaf_queue(port, opt);</div><div class='add'>+	case TC_HTB_LEAF_DEL:</div><div class='add'>+	case TC_HTB_LEAF_DEL_LAST:</div><div class='add'>+	case TC_HTB_LEAF_DEL_LAST_FORCE:</div><div class='add'>+		return airoha_tc_htb_delete_leaf_queue(port, opt);</div><div class='add'>+	case TC_HTB_LEAF_QUERY_QUEUE:</div><div class='add'>+		return airoha_tc_get_htb_get_leaf_queue(port, opt);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_tc_setup(struct net_device *dev, enum tc_setup_type type,</div><div class='add'>+			       void *type_data)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_QDISC_ETS:</div><div class='add'>+		return airoha_tc_setup_qdisc_ets(port, type_data);</div><div class='add'>+	case TC_SETUP_QDISC_HTB:</div><div class='add'>+		return airoha_tc_setup_qdisc_htb(port, type_data);</div><div class='add'>+	case TC_SETUP_BLOCK:</div><div class='add'>+	case TC_SETUP_FT:</div><div class='add'>+		return airoha_dev_setup_tc_block(port, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops airoha_netdev_ops = {</div><div class='ctx'> 	.ndo_init		= airoha_dev_init,</div><div class='ctx'> 	.ndo_open		= airoha_dev_open,</div><div class='ctx'> 	.ndo_stop		= airoha_dev_stop,</div><div class='add'>+	.ndo_change_mtu		= airoha_dev_change_mtu,</div><div class='add'>+	.ndo_select_queue	= airoha_dev_select_queue,</div><div class='ctx'> 	.ndo_start_xmit		= airoha_dev_xmit,</div><div class='ctx'> 	.ndo_get_stats64        = airoha_dev_get_stats64,</div><div class='ctx'> 	.ndo_set_mac_address	= airoha_dev_set_macaddr,</div><div class='add'>+	.ndo_setup_tc		= airoha_dev_tc_setup,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops airoha_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo		= airoha_ethtool_get_drvinfo,</div><div class='ctx'> 	.get_eth_mac_stats      = airoha_ethtool_get_mac_stats,</div><div class='ctx'> 	.get_rmon_stats		= airoha_ethtool_get_rmon_stats,</div><div class='add'>+	.get_link		= ethtool_op_get_link,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int airoha_alloc_gdm_port(struct airoha_eth *eth, struct device_node *np)</div><div class='add'>+static int airoha_metadata_dst_alloc(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(port-&gt;dsa_meta); i++) {</div><div class='add'>+		struct metadata_dst *md_dst;</div><div class='add'>+</div><div class='add'>+		md_dst = metadata_dst_alloc(0, METADATA_HW_PORT_MUX,</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+		if (!md_dst)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		md_dst-&gt;u.port_info.port_id = i;</div><div class='add'>+		port-&gt;dsa_meta[i] = md_dst;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_metadata_dst_free(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(port-&gt;dsa_meta); i++) {</div><div class='add'>+		if (!port-&gt;dsa_meta[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		metadata_dst_free(port-&gt;dsa_meta[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool airoha_is_valid_gdm_port(struct airoha_eth *eth,</div><div class='add'>+			      struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;ports); i++) {</div><div class='add'>+		if (eth-&gt;ports[i] == port)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_alloc_gdm_port(struct airoha_eth *eth,</div><div class='add'>+				 struct device_node *np, int index)</div><div class='ctx'> {</div><div class='ctx'> 	const __be32 *id_ptr = of_get_property(np, "reg", NULL);</div><div class='ctx'> 	struct airoha_gdm_port *port;</div><div class='ctx'> 	struct airoha_qdma *qdma;</div><div class='ctx'> 	struct net_device *dev;</div><div class='del'>-	int err, index;</div><div class='add'>+	int err, p;</div><div class='ctx'> 	u32 id;</div><div class='ctx'> </div><div class='ctx'> 	if (!id_ptr) {</div><div class='hunk'>@@ -2627,20 +2866,21 @@ static int airoha_alloc_gdm_port(struct airoha_eth *eth, struct device_node *np)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	id = be32_to_cpup(id_ptr);</div><div class='del'>-	index = id - 1;</div><div class='add'>+	p = id - 1;</div><div class='ctx'> </div><div class='ctx'> 	if (!id || id &gt; ARRAY_SIZE(eth-&gt;ports)) {</div><div class='ctx'> 		dev_err(eth-&gt;dev, "invalid gdm port id: %d\n", id);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (eth-&gt;ports[index]) {</div><div class='add'>+	if (eth-&gt;ports[p]) {</div><div class='ctx'> 		dev_err(eth-&gt;dev, "duplicate gdm port id: %d\n", id);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev = devm_alloc_etherdev_mqs(eth-&gt;dev, sizeof(*port),</div><div class='del'>-				      AIROHA_NUM_TX_RING, AIROHA_NUM_RX_RING);</div><div class='add'>+				      AIROHA_NUM_NETDEV_TX_RINGS,</div><div class='add'>+				      AIROHA_NUM_RX_RING);</div><div class='ctx'> 	if (!dev) {</div><div class='ctx'> 		dev_err(eth-&gt;dev, "alloc_etherdev failed\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -2653,12 +2893,19 @@ static int airoha_alloc_gdm_port(struct airoha_eth *eth, struct device_node *np)</div><div class='ctx'> 	dev-&gt;watchdog_timeo = 5 * HZ;</div><div class='ctx'> 	dev-&gt;hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM |</div><div class='ctx'> 			   NETIF_F_TSO6 | NETIF_F_IPV6_CSUM |</div><div class='del'>-			   NETIF_F_SG | NETIF_F_TSO;</div><div class='add'>+			   NETIF_F_SG | NETIF_F_TSO |</div><div class='add'>+			   NETIF_F_HW_TC;</div><div class='ctx'> 	dev-&gt;features |= dev-&gt;hw_features;</div><div class='add'>+	dev-&gt;vlan_features = dev-&gt;hw_features;</div><div class='ctx'> 	dev-&gt;dev.of_node = np;</div><div class='del'>-	dev-&gt;irq = qdma-&gt;irq;</div><div class='add'>+	dev-&gt;irq = qdma-&gt;irq_banks[0].irq;</div><div class='ctx'> 	SET_NETDEV_DEV(dev, eth-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	/* reserve hw queues for HTB offloading */</div><div class='add'>+	err = netif_set_real_num_tx_queues(dev, AIROHA_NUM_TX_RING);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	err = of_get_ethdev_address(np, dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		if (err == -EPROBE_DEFER)</div><div class='hunk'>@@ -2675,13 +2922,26 @@ static int airoha_alloc_gdm_port(struct airoha_eth *eth, struct device_node *np)</div><div class='ctx'> 	port-&gt;qdma = qdma;</div><div class='ctx'> 	port-&gt;dev = dev;</div><div class='ctx'> 	port-&gt;id = id;</div><div class='del'>-	eth-&gt;ports[index] = port;</div><div class='add'>+	eth-&gt;ports[p] = port;</div><div class='ctx'> </div><div class='del'>-	return register_netdev(dev);</div><div class='add'>+	err = airoha_metadata_dst_alloc(port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = register_netdev(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_metadata_dst;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_metadata_dst:</div><div class='add'>+	airoha_metadata_dst_free(port);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int airoha_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='add'>+	struct reset_control_bulk_data *xsi_rsts;</div><div class='ctx'> 	struct device_node *np;</div><div class='ctx'> 	struct airoha_eth *eth;</div><div class='ctx'> 	int i, err;</div><div class='hunk'>@@ -2690,6 +2950,10 @@ static int airoha_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!eth)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	eth-&gt;soc = of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	if (!eth-&gt;soc)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	eth-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	err = dma_set_mask_and_coherent(eth-&gt;dev, DMA_BIT_MASK(32));</div><div class='hunk'>@@ -2714,13 +2978,18 @@ static int airoha_probe(struct platform_device *pdev)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	eth-&gt;xsi_rsts[0].id = "xsi-mac";</div><div class='del'>-	eth-&gt;xsi_rsts[1].id = "hsi0-mac";</div><div class='del'>-	eth-&gt;xsi_rsts[2].id = "hsi1-mac";</div><div class='del'>-	eth-&gt;xsi_rsts[3].id = "hsi-mac";</div><div class='del'>-	eth-&gt;xsi_rsts[4].id = "xfp-mac";</div><div class='add'>+	xsi_rsts = devm_kcalloc(eth-&gt;dev,</div><div class='add'>+				eth-&gt;soc-&gt;num_xsi_rsts, sizeof(*xsi_rsts),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!xsi_rsts)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	eth-&gt;xsi_rsts = xsi_rsts;</div><div class='add'>+	for (i = 0; i &lt; eth-&gt;soc-&gt;num_xsi_rsts; i++)</div><div class='add'>+		eth-&gt;xsi_rsts[i].id = eth-&gt;soc-&gt;xsi_rsts_names[i];</div><div class='add'>+</div><div class='ctx'> 	err = devm_reset_control_bulk_get_exclusive(eth-&gt;dev,</div><div class='del'>-						    ARRAY_SIZE(eth-&gt;xsi_rsts),</div><div class='add'>+						    eth-&gt;soc-&gt;num_xsi_rsts,</div><div class='ctx'> 						    eth-&gt;xsi_rsts);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(eth-&gt;dev, "failed to get bulk xsi reset lines\n");</div><div class='hunk'>@@ -2738,11 +3007,12 @@ static int airoha_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	err = airoha_hw_init(pdev, eth);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto error;</div><div class='add'>+		goto error_hw_cleanup;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;qdma); i++)</div><div class='ctx'> 		airoha_qdma_start_napi(&amp;eth-&gt;qdma[i]);</div><div class='ctx'> </div><div class='add'>+	i = 0;</div><div class='ctx'> 	for_each_child_of_node(pdev-&gt;dev.of_node, np) {</div><div class='ctx'> 		if (!of_device_is_compatible(np, "airoha,eth-mac"))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -2750,24 +3020,30 @@ static int airoha_probe(struct platform_device *pdev)</div><div class='ctx'> 		if (!of_device_is_available(np))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		err = airoha_alloc_gdm_port(eth, np);</div><div class='add'>+		err = airoha_alloc_gdm_port(eth, np, i++);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			of_node_put(np);</div><div class='del'>-			goto error;</div><div class='add'>+			goto error_napi_stop;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-error:</div><div class='add'>+error_napi_stop:</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;qdma); i++)</div><div class='add'>+		airoha_qdma_stop_napi(&amp;eth-&gt;qdma[i]);</div><div class='add'>+	airoha_ppe_deinit(eth);</div><div class='add'>+error_hw_cleanup:</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;qdma); i++)</div><div class='ctx'> 		airoha_hw_cleanup(&amp;eth-&gt;qdma[i]);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;ports); i++) {</div><div class='ctx'> 		struct airoha_gdm_port *port = eth-&gt;ports[i];</div><div class='ctx'> </div><div class='del'>-		if (port &amp;&amp; port-&gt;dev-&gt;reg_state == NETREG_REGISTERED)</div><div class='add'>+		if (port &amp;&amp; port-&gt;dev-&gt;reg_state == NETREG_REGISTERED) {</div><div class='ctx'> 			unregister_netdev(port-&gt;dev);</div><div class='add'>+			airoha_metadata_dst_free(port);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	free_netdev(eth-&gt;napi_dev);</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='hunk'>@@ -2780,8 +3056,10 @@ static void airoha_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct airoha_eth *eth = platform_get_drvdata(pdev);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;qdma); i++)</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;qdma); i++) {</div><div class='add'>+		airoha_qdma_stop_napi(&amp;eth-&gt;qdma[i]);</div><div class='ctx'> 		airoha_hw_cleanup(&amp;eth-&gt;qdma[i]);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;ports); i++) {</div><div class='ctx'> 		struct airoha_gdm_port *port = eth-&gt;ports[i];</div><div class='hunk'>@@ -2791,14 +3069,98 @@ static void airoha_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 		airoha_dev_stop(port-&gt;dev);</div><div class='ctx'> 		unregister_netdev(port-&gt;dev);</div><div class='add'>+		airoha_metadata_dst_free(port);</div><div class='ctx'> 	}</div><div class='ctx'> 	free_netdev(eth-&gt;napi_dev);</div><div class='ctx'> </div><div class='add'>+	airoha_ppe_deinit(eth);</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const char * const en7581_xsi_rsts_names[] = {</div><div class='add'>+	"xsi-mac",</div><div class='add'>+	"hsi0-mac",</div><div class='add'>+	"hsi1-mac",</div><div class='add'>+	"hsi-mac",</div><div class='add'>+	"xfp-mac",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_en7581_get_src_port_id(struct airoha_gdm_port *port, int nbq)</div><div class='add'>+{</div><div class='add'>+	switch (port-&gt;id) {</div><div class='add'>+	case 3:</div><div class='add'>+		/* 7581 SoC supports PCIe serdes on GDM3 port */</div><div class='add'>+		if (nbq == 4)</div><div class='add'>+			return HSGMII_LAN_7581_PCIE0_SRCPORT;</div><div class='add'>+		if (nbq == 5)</div><div class='add'>+			return HSGMII_LAN_7581_PCIE1_SRCPORT;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		/* 7581 SoC supports eth and usb serdes on GDM4 port */</div><div class='add'>+		if (!nbq)</div><div class='add'>+			return HSGMII_LAN_7581_ETH_SRCPORT;</div><div class='add'>+		if (nbq == 1)</div><div class='add'>+			return HSGMII_LAN_7581_USB_SRCPORT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const an7583_xsi_rsts_names[] = {</div><div class='add'>+	"xsi-mac",</div><div class='add'>+	"hsi0-mac",</div><div class='add'>+	"hsi1-mac",</div><div class='add'>+	"xfp-mac",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_an7583_get_src_port_id(struct airoha_gdm_port *port, int nbq)</div><div class='add'>+{</div><div class='add'>+	switch (port-&gt;id) {</div><div class='add'>+	case 3:</div><div class='add'>+		/* 7583 SoC supports eth serdes on GDM3 port */</div><div class='add'>+		if (!nbq)</div><div class='add'>+			return HSGMII_LAN_7583_ETH_SRCPORT;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		/* 7583 SoC supports PCIe and USB serdes on GDM4 port */</div><div class='add'>+		if (!nbq)</div><div class='add'>+			return HSGMII_LAN_7583_PCIE_SRCPORT;</div><div class='add'>+		if (nbq == 1)</div><div class='add'>+			return HSGMII_LAN_7583_USB_SRCPORT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct airoha_eth_soc_data en7581_soc_data = {</div><div class='add'>+	.version = 0x7581,</div><div class='add'>+	.xsi_rsts_names = en7581_xsi_rsts_names,</div><div class='add'>+	.num_xsi_rsts = ARRAY_SIZE(en7581_xsi_rsts_names),</div><div class='add'>+	.num_ppe = 2,</div><div class='add'>+	.ops = {</div><div class='add'>+		.get_src_port_id = airoha_en7581_get_src_port_id,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct airoha_eth_soc_data an7583_soc_data = {</div><div class='add'>+	.version = 0x7583,</div><div class='add'>+	.xsi_rsts_names = an7583_xsi_rsts_names,</div><div class='add'>+	.num_xsi_rsts = ARRAY_SIZE(an7583_xsi_rsts_names),</div><div class='add'>+	.num_ppe = 1,</div><div class='add'>+	.ops = {</div><div class='add'>+		.get_src_port_id = airoha_an7583_get_src_port_id,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct of_device_id of_airoha_match[] = {</div><div class='del'>-	{ .compatible = "airoha,en7581-eth" },</div><div class='add'>+	{ .compatible = "airoha,en7581-eth", .data = &amp;en7581_soc_data },</div><div class='add'>+	{ .compatible = "airoha,an7583-eth", .data = &amp;an7583_soc_data },</div><div class='ctx'> 	{ /* sentinel */ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, of_airoha_match);</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_eth.h b/drivers/net/ethernet/airoha/airoha_eth.h<br/>new file mode 100644<br/>index 000000000000..fbbc58133364<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_eth.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_eth.h</a></div><div class='hunk'>@@ -0,0 +1,673 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AIROHA_ETH_H</div><div class='add'>+#define AIROHA_ETH_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/soc/airoha/airoha_offload.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#define AIROHA_MAX_NUM_GDM_PORTS	4</div><div class='add'>+#define AIROHA_MAX_NUM_QDMA		2</div><div class='add'>+#define AIROHA_MAX_NUM_IRQ_BANKS	4</div><div class='add'>+#define AIROHA_MAX_DSA_PORTS		7</div><div class='add'>+#define AIROHA_MAX_NUM_RSTS		3</div><div class='add'>+#define AIROHA_MAX_MTU			9216</div><div class='add'>+#define AIROHA_MAX_PACKET_SIZE		2048</div><div class='add'>+#define AIROHA_NUM_QOS_CHANNELS		4</div><div class='add'>+#define AIROHA_NUM_QOS_QUEUES		8</div><div class='add'>+#define AIROHA_NUM_TX_RING		32</div><div class='add'>+#define AIROHA_NUM_RX_RING		32</div><div class='add'>+#define AIROHA_NUM_NETDEV_TX_RINGS	(AIROHA_NUM_TX_RING + \</div><div class='add'>+					 AIROHA_NUM_QOS_CHANNELS)</div><div class='add'>+#define AIROHA_FE_MC_MAX_VLAN_TABLE	64</div><div class='add'>+#define AIROHA_FE_MC_MAX_VLAN_PORT	16</div><div class='add'>+#define AIROHA_NUM_TX_IRQ		2</div><div class='add'>+#define HW_DSCP_NUM			2048</div><div class='add'>+#define IRQ_QUEUE_LEN(_n)		((_n) ? 1024 : 2048)</div><div class='add'>+#define TX_DSCP_NUM			1024</div><div class='add'>+#define RX_DSCP_NUM(_n)			\</div><div class='add'>+	((_n) ==  2 ? 128 :		\</div><div class='add'>+	 (_n) == 11 ? 128 :		\</div><div class='add'>+	 (_n) == 15 ? 128 :		\</div><div class='add'>+	 (_n) ==  0 ? 1024 : 16)</div><div class='add'>+</div><div class='add'>+#define PSE_RSV_PAGES			128</div><div class='add'>+#define PSE_QUEUE_RSV_PAGES		64</div><div class='add'>+</div><div class='add'>+#define QDMA_METER_IDX(_n)		((_n) &amp; 0xff)</div><div class='add'>+#define QDMA_METER_GROUP(_n)		(((_n) &gt;&gt; 8) &amp; 0x3)</div><div class='add'>+</div><div class='add'>+#define PPE_SRAM_NUM_ENTRIES		(8 * 1024)</div><div class='add'>+#define PPE_STATS_NUM_ENTRIES		(4 * 1024)</div><div class='add'>+#define PPE_DRAM_NUM_ENTRIES		(16 * 1024)</div><div class='add'>+#define PPE_ENTRY_SIZE			80</div><div class='add'>+#define PPE_RAM_NUM_ENTRIES_SHIFT(_n)	(__ffs((_n) &gt;&gt; 10))</div><div class='add'>+</div><div class='add'>+#define MTK_HDR_LEN			4</div><div class='add'>+#define MTK_HDR_XMIT_TAGGED_TPID_8100	1</div><div class='add'>+#define MTK_HDR_XMIT_TAGGED_TPID_88A8	2</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	QDMA_INT_REG_IDX0,</div><div class='add'>+	QDMA_INT_REG_IDX1,</div><div class='add'>+	QDMA_INT_REG_IDX2,</div><div class='add'>+	QDMA_INT_REG_IDX3,</div><div class='add'>+	QDMA_INT_REG_IDX4,</div><div class='add'>+	QDMA_INT_REG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	HSGMII_LAN_7581_PCIE0_SRCPORT	= 0x16,</div><div class='add'>+	HSGMII_LAN_7581_PCIE1_SRCPORT,</div><div class='add'>+	HSGMII_LAN_7581_ETH_SRCPORT,</div><div class='add'>+	HSGMII_LAN_7581_USB_SRCPORT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	HSGMII_LAN_7583_ETH_SRCPORT	= 0x16,</div><div class='add'>+	HSGMII_LAN_7583_PCIE_SRCPORT	= 0x18,</div><div class='add'>+	HSGMII_LAN_7583_USB_SRCPORT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	XSI_PCIE0_VIP_PORT_MASK	= BIT(22),</div><div class='add'>+	XSI_PCIE1_VIP_PORT_MASK	= BIT(23),</div><div class='add'>+	XSI_USB_VIP_PORT_MASK	= BIT(25),</div><div class='add'>+	XSI_ETH_VIP_PORT_MASK	= BIT(24),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	DEV_STATE_INITIALIZED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	CDM_CRSN_QSEL_Q1 = 1,</div><div class='add'>+	CDM_CRSN_QSEL_Q5 = 5,</div><div class='add'>+	CDM_CRSN_QSEL_Q6 = 6,</div><div class='add'>+	CDM_CRSN_QSEL_Q15 = 15,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	CRSN_08 = 0x8,</div><div class='add'>+	CRSN_21 = 0x15, /* KA */</div><div class='add'>+	CRSN_22 = 0x16, /* hit bind and force route to CPU */</div><div class='add'>+	CRSN_24 = 0x18,</div><div class='add'>+	CRSN_25 = 0x19,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum airoha_gdm_index {</div><div class='add'>+	AIROHA_GDM1_IDX = 1,</div><div class='add'>+	AIROHA_GDM2_IDX = 2,</div><div class='add'>+	AIROHA_GDM3_IDX = 3,</div><div class='add'>+	AIROHA_GDM4_IDX = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FE_PSE_PORT_CDM1,</div><div class='add'>+	FE_PSE_PORT_GDM1,</div><div class='add'>+	FE_PSE_PORT_GDM2,</div><div class='add'>+	FE_PSE_PORT_GDM3,</div><div class='add'>+	FE_PSE_PORT_PPE1,</div><div class='add'>+	FE_PSE_PORT_CDM2,</div><div class='add'>+	FE_PSE_PORT_CDM3,</div><div class='add'>+	FE_PSE_PORT_CDM4,</div><div class='add'>+	FE_PSE_PORT_PPE2,</div><div class='add'>+	FE_PSE_PORT_GDM4,</div><div class='add'>+	FE_PSE_PORT_CDM5,</div><div class='add'>+	FE_PSE_PORT_DROP = 0xf,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum tx_sched_mode {</div><div class='add'>+	TC_SCH_WRR8,</div><div class='add'>+	TC_SCH_SP,</div><div class='add'>+	TC_SCH_WRR7,</div><div class='add'>+	TC_SCH_WRR6,</div><div class='add'>+	TC_SCH_WRR5,</div><div class='add'>+	TC_SCH_WRR4,</div><div class='add'>+	TC_SCH_WRR3,</div><div class='add'>+	TC_SCH_WRR2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum trtcm_unit_type {</div><div class='add'>+	TRTCM_BYTE_UNIT,</div><div class='add'>+	TRTCM_PACKET_UNIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum trtcm_param_type {</div><div class='add'>+	TRTCM_MISC_MODE, /* meter_en, pps_mode, tick_sel */</div><div class='add'>+	TRTCM_TOKEN_RATE_MODE,</div><div class='add'>+	TRTCM_BUCKETSIZE_SHIFT_MODE,</div><div class='add'>+	TRTCM_BUCKET_COUNTER_MODE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum trtcm_mode_type {</div><div class='add'>+	TRTCM_COMMIT_MODE,</div><div class='add'>+	TRTCM_PEAK_MODE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum trtcm_param {</div><div class='add'>+	TRTCM_TICK_SEL = BIT(0),</div><div class='add'>+	TRTCM_PKT_MODE = BIT(1),</div><div class='add'>+	TRTCM_METER_MODE = BIT(2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MIN_TOKEN_SIZE				4096</div><div class='add'>+#define MAX_TOKEN_SIZE_OFFSET			17</div><div class='add'>+#define TRTCM_TOKEN_RATE_MASK			GENMASK(23, 6)</div><div class='add'>+#define TRTCM_TOKEN_RATE_FRACTION_MASK		GENMASK(5, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_queue_entry {</div><div class='add'>+	union {</div><div class='add'>+		void *buf;</div><div class='add'>+		struct {</div><div class='add'>+			struct list_head list;</div><div class='add'>+			struct sk_buff *skb;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	u16 dma_len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_queue {</div><div class='add'>+	struct airoha_qdma *qdma;</div><div class='add'>+</div><div class='add'>+	/* protect concurrent queue accesses */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct airoha_queue_entry *entry;</div><div class='add'>+	struct airoha_qdma_desc *desc;</div><div class='add'>+	u16 head;</div><div class='add'>+	u16 tail;</div><div class='add'>+</div><div class='add'>+	int queued;</div><div class='add'>+	int ndesc;</div><div class='add'>+	int free_thr;</div><div class='add'>+	int buf_size;</div><div class='add'>+</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct page_pool *page_pool;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	struct list_head tx_list;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_tx_irq_queue {</div><div class='add'>+	struct airoha_qdma *qdma;</div><div class='add'>+</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+</div><div class='add'>+	int size;</div><div class='add'>+	u32 *q;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_hw_stats {</div><div class='add'>+	/* protect concurrent hw_stats accesses */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+</div><div class='add'>+	/* get_stats64 */</div><div class='add'>+	u64 rx_ok_pkts;</div><div class='add'>+	u64 tx_ok_pkts;</div><div class='add'>+	u64 rx_ok_bytes;</div><div class='add'>+	u64 tx_ok_bytes;</div><div class='add'>+	u64 rx_multicast;</div><div class='add'>+	u64 rx_errors;</div><div class='add'>+	u64 rx_drops;</div><div class='add'>+	u64 tx_drops;</div><div class='add'>+	u64 rx_crc_error;</div><div class='add'>+	u64 rx_over_errors;</div><div class='add'>+	/* ethtool stats */</div><div class='add'>+	u64 tx_broadcast;</div><div class='add'>+	u64 tx_multicast;</div><div class='add'>+	u64 tx_len[7];</div><div class='add'>+	u64 rx_broadcast;</div><div class='add'>+	u64 rx_fragment;</div><div class='add'>+	u64 rx_jabber;</div><div class='add'>+	u64 rx_len[7];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	AIROHA_FOE_STATE_INVALID,</div><div class='add'>+	AIROHA_FOE_STATE_UNBIND,</div><div class='add'>+	AIROHA_FOE_STATE_BIND,</div><div class='add'>+	AIROHA_FOE_STATE_FIN</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PPE_PKT_TYPE_IPV4_HNAPT = 0,</div><div class='add'>+	PPE_PKT_TYPE_IPV4_ROUTE = 1,</div><div class='add'>+	PPE_PKT_TYPE_BRIDGE = 2,</div><div class='add'>+	PPE_PKT_TYPE_IPV4_DSLITE = 3,</div><div class='add'>+	PPE_PKT_TYPE_IPV6_ROUTE_3T = 4,</div><div class='add'>+	PPE_PKT_TYPE_IPV6_ROUTE_5T = 5,</div><div class='add'>+	PPE_PKT_TYPE_IPV6_6RD = 7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_MAC_SMAC_ID		GENMASK(20, 16)</div><div class='add'>+#define AIROHA_FOE_MAC_PPPOE_ID		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_MAC_WDMA_QOS		GENMASK(15, 12)</div><div class='add'>+#define AIROHA_FOE_MAC_WDMA_BAND	BIT(11)</div><div class='add'>+#define AIROHA_FOE_MAC_WDMA_WCID	GENMASK(10, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_foe_mac_info_common {</div><div class='add'>+	u16 vlan1;</div><div class='add'>+	u16 etype;</div><div class='add'>+</div><div class='add'>+	u32 dest_mac_hi;</div><div class='add'>+</div><div class='add'>+	u16 vlan2;</div><div class='add'>+	u16 dest_mac_lo;</div><div class='add'>+</div><div class='add'>+	u32 src_mac_hi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_mac_info {</div><div class='add'>+	struct airoha_foe_mac_info_common common;</div><div class='add'>+</div><div class='add'>+	u16 pppoe_id;</div><div class='add'>+	u16 src_mac_lo;</div><div class='add'>+</div><div class='add'>+	u32 meter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_IB1_UNBIND_PREBIND		BIT(24)</div><div class='add'>+#define AIROHA_FOE_IB1_UNBIND_PACKETS		GENMASK(23, 8)</div><div class='add'>+#define AIROHA_FOE_IB1_UNBIND_TIMESTAMP		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_STATIC		BIT(31)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_UDP			BIT(30)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_STATE		GENMASK(29, 28)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_PACKET_TYPE		GENMASK(27, 25)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_TTL			BIT(24)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_TUNNEL_DECAP	BIT(23)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_PPPOE		BIT(22)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_VPM			GENMASK(21, 20)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_VLAN_LAYER		GENMASK(19, 16)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_KEEPALIVE		BIT(15)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_TIMESTAMP		GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_IB2_DSCP			GENMASK(31, 24)</div><div class='add'>+#define AIROHA_FOE_IB2_PORT_AG			GENMASK(23, 13)</div><div class='add'>+#define AIROHA_FOE_IB2_PCP			BIT(12)</div><div class='add'>+#define AIROHA_FOE_IB2_MULTICAST		BIT(11)</div><div class='add'>+#define AIROHA_FOE_IB2_FAST_PATH		BIT(10)</div><div class='add'>+#define AIROHA_FOE_IB2_PSE_QOS			BIT(9)</div><div class='add'>+#define AIROHA_FOE_IB2_PSE_PORT			GENMASK(8, 5)</div><div class='add'>+#define AIROHA_FOE_IB2_NBQ			GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_ACTDP			GENMASK(31, 24)</div><div class='add'>+#define AIROHA_FOE_SHAPER_ID			GENMASK(23, 16)</div><div class='add'>+#define AIROHA_FOE_CHANNEL			GENMASK(15, 11)</div><div class='add'>+#define AIROHA_FOE_QID				GENMASK(10, 8)</div><div class='add'>+#define AIROHA_FOE_DPI				BIT(7)</div><div class='add'>+#define AIROHA_FOE_TUNNEL			BIT(6)</div><div class='add'>+#define AIROHA_FOE_TUNNEL_ID			GENMASK(5, 0)</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_TUNNEL_MTU			GENMASK(31, 16)</div><div class='add'>+#define AIROHA_FOE_ACNT_GRP3			GENMASK(15, 9)</div><div class='add'>+#define AIROHA_FOE_METER_GRP3			GENMASK(8, 5)</div><div class='add'>+#define AIROHA_FOE_METER_GRP2			GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_foe_bridge {</div><div class='add'>+	u32 dest_mac_hi;</div><div class='add'>+</div><div class='add'>+	u16 src_mac_hi;</div><div class='add'>+	u16 dest_mac_lo;</div><div class='add'>+</div><div class='add'>+	u32 src_mac_lo;</div><div class='add'>+</div><div class='add'>+	u32 ib2;</div><div class='add'>+</div><div class='add'>+	u32 rsv[5];</div><div class='add'>+</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_mac_info l2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_ipv4_tuple {</div><div class='add'>+	u32 src_ip;</div><div class='add'>+	u32 dest_ip;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u16 dest_port;</div><div class='add'>+			u16 src_port;</div><div class='add'>+		};</div><div class='add'>+		struct {</div><div class='add'>+			u8 protocol;</div><div class='add'>+			u8 _pad[3]; /* fill with 0xa5a5a5 */</div><div class='add'>+		};</div><div class='add'>+		u32 ports;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_ipv4 {</div><div class='add'>+	struct airoha_foe_ipv4_tuple orig_tuple;</div><div class='add'>+</div><div class='add'>+	u32 ib2;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_ipv4_tuple new_tuple;</div><div class='add'>+</div><div class='add'>+	u32 rsv[2];</div><div class='add'>+</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_mac_info l2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_ipv4_dslite {</div><div class='add'>+	struct airoha_foe_ipv4_tuple ip4;</div><div class='add'>+</div><div class='add'>+	u32 ib2;</div><div class='add'>+</div><div class='add'>+	u8 flow_label[3];</div><div class='add'>+	u8 priority;</div><div class='add'>+</div><div class='add'>+	u32 rsv[4];</div><div class='add'>+</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_mac_info l2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_ipv6 {</div><div class='add'>+	u32 src_ip[4];</div><div class='add'>+	u32 dest_ip[4];</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u16 dest_port;</div><div class='add'>+			u16 src_port;</div><div class='add'>+		};</div><div class='add'>+		struct {</div><div class='add'>+			u8 protocol;</div><div class='add'>+			u8 pad[3];</div><div class='add'>+		};</div><div class='add'>+		u32 ports;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	u32 ib2;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_mac_info_common l2;</div><div class='add'>+</div><div class='add'>+	u32 meter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_entry {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u32 ib1;</div><div class='add'>+			union {</div><div class='add'>+				struct airoha_foe_bridge bridge;</div><div class='add'>+				struct airoha_foe_ipv4 ipv4;</div><div class='add'>+				struct airoha_foe_ipv4_dslite dslite;</div><div class='add'>+				struct airoha_foe_ipv6 ipv6;</div><div class='add'>+				DECLARE_FLEX_ARRAY(u32, d);</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		u8 data[PPE_ENTRY_SIZE];</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_stats {</div><div class='add'>+	u32 bytes;</div><div class='add'>+	u32 packets;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_stats64 {</div><div class='add'>+	u64 bytes;</div><div class='add'>+	u64 packets;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_flow_data {</div><div class='add'>+	struct ethhdr eth;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			__be32 src_addr;</div><div class='add'>+			__be32 dst_addr;</div><div class='add'>+		} v4;</div><div class='add'>+</div><div class='add'>+		struct {</div><div class='add'>+			struct in6_addr src_addr;</div><div class='add'>+			struct in6_addr dst_addr;</div><div class='add'>+		} v6;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	__be16 src_port;</div><div class='add'>+	__be16 dst_port;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		struct {</div><div class='add'>+			u16 id;</div><div class='add'>+			__be16 proto;</div><div class='add'>+		} hdr[2];</div><div class='add'>+		u8 num;</div><div class='add'>+	} vlan;</div><div class='add'>+	struct {</div><div class='add'>+		u16 sid;</div><div class='add'>+		u8 num;</div><div class='add'>+	} pppoe;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum airoha_flow_entry_type {</div><div class='add'>+	FLOW_TYPE_L4,</div><div class='add'>+	FLOW_TYPE_L2,</div><div class='add'>+	FLOW_TYPE_L2_SUBFLOW,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_flow_table_entry {</div><div class='add'>+	union {</div><div class='add'>+		struct hlist_node list; /* PPE L3 flow entry */</div><div class='add'>+		struct {</div><div class='add'>+			struct rhash_head l2_node;  /* L2 flow entry */</div><div class='add'>+			struct hlist_head l2_flows; /* PPE L2 subflows list */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct hlist_node l2_subflow_node; /* PPE L2 subflow entry */</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_stats64 stats;</div><div class='add'>+	enum airoha_flow_entry_type type;</div><div class='add'>+</div><div class='add'>+	struct rhash_head node;</div><div class='add'>+	unsigned long cookie;</div><div class='add'>+</div><div class='add'>+	/* Must be last --ends in a flexible-array member. */</div><div class='add'>+	struct airoha_foe_entry data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_wdma_info {</div><div class='add'>+	u8 idx;</div><div class='add'>+	u8 queue;</div><div class='add'>+	u16 wcid;</div><div class='add'>+	u8 bss;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RX queue to IRQ mapping: BIT(q) in IRQ(n) */</div><div class='add'>+#define RX_IRQ0_BANK_PIN_MASK			0x839f</div><div class='add'>+#define RX_IRQ1_BANK_PIN_MASK			0x7fe00000</div><div class='add'>+#define RX_IRQ2_BANK_PIN_MASK			0x20</div><div class='add'>+#define RX_IRQ3_BANK_PIN_MASK			0x40</div><div class='add'>+#define RX_IRQ_BANK_PIN_MASK(_n)		\</div><div class='add'>+	(((_n) == 3) ? RX_IRQ3_BANK_PIN_MASK :	\</div><div class='add'>+	 ((_n) == 2) ? RX_IRQ2_BANK_PIN_MASK :	\</div><div class='add'>+	 ((_n) == 1) ? RX_IRQ1_BANK_PIN_MASK :	\</div><div class='add'>+	 RX_IRQ0_BANK_PIN_MASK)</div><div class='add'>+</div><div class='add'>+struct airoha_irq_bank {</div><div class='add'>+	struct airoha_qdma *qdma;</div><div class='add'>+</div><div class='add'>+	/* protect concurrent irqmask accesses */</div><div class='add'>+	spinlock_t irq_lock;</div><div class='add'>+	u32 irqmask[QDMA_INT_REG_MAX];</div><div class='add'>+	int irq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_qdma {</div><div class='add'>+	struct airoha_eth *eth;</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+</div><div class='add'>+	atomic_t users;</div><div class='add'>+</div><div class='add'>+	struct airoha_irq_bank irq_banks[AIROHA_MAX_NUM_IRQ_BANKS];</div><div class='add'>+</div><div class='add'>+	struct airoha_tx_irq_queue q_tx_irq[AIROHA_NUM_TX_IRQ];</div><div class='add'>+</div><div class='add'>+	struct airoha_queue q_tx[AIROHA_NUM_TX_RING];</div><div class='add'>+	struct airoha_queue q_rx[AIROHA_NUM_RX_RING];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_gdm_port {</div><div class='add'>+	struct airoha_qdma *qdma;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	struct airoha_hw_stats stats;</div><div class='add'>+</div><div class='add'>+	DECLARE_BITMAP(qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS);</div><div class='add'>+</div><div class='add'>+	/* qos stats counters */</div><div class='add'>+	u64 cpu_tx_packets;</div><div class='add'>+	u64 fwd_tx_packets;</div><div class='add'>+</div><div class='add'>+	struct metadata_dst *dsa_meta[AIROHA_MAX_DSA_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AIROHA_RXD4_PPE_CPU_REASON	GENMASK(20, 16)</div><div class='add'>+#define AIROHA_RXD4_FOE_ENTRY		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_ppe {</div><div class='add'>+	struct airoha_ppe_dev dev;</div><div class='add'>+	struct airoha_eth *eth;</div><div class='add'>+</div><div class='add'>+	void *foe;</div><div class='add'>+	dma_addr_t foe_dma;</div><div class='add'>+</div><div class='add'>+	struct rhashtable l2_flows;</div><div class='add'>+</div><div class='add'>+	struct hlist_head *foe_flow;</div><div class='add'>+	u16 *foe_check_time;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_stats *foe_stats;</div><div class='add'>+	dma_addr_t foe_stats_dma;</div><div class='add'>+</div><div class='add'>+	struct dentry *debugfs_dir;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_eth_soc_data {</div><div class='add'>+	u16 version;</div><div class='add'>+	const char * const *xsi_rsts_names;</div><div class='add'>+	int num_xsi_rsts;</div><div class='add'>+	int num_ppe;</div><div class='add'>+	struct {</div><div class='add'>+		int (*get_src_port_id)(struct airoha_gdm_port *port, int nbq);</div><div class='add'>+	} ops;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_eth {</div><div class='add'>+	struct device *dev;</div><div class='add'>+</div><div class='add'>+	const struct airoha_eth_soc_data *soc;</div><div class='add'>+</div><div class='add'>+	unsigned long state;</div><div class='add'>+	void __iomem *fe_regs;</div><div class='add'>+</div><div class='add'>+	struct airoha_npu __rcu *npu;</div><div class='add'>+</div><div class='add'>+	struct airoha_ppe *ppe;</div><div class='add'>+	struct rhashtable flow_table;</div><div class='add'>+</div><div class='add'>+	struct reset_control_bulk_data rsts[AIROHA_MAX_NUM_RSTS];</div><div class='add'>+	struct reset_control_bulk_data *xsi_rsts;</div><div class='add'>+</div><div class='add'>+	struct net_device *napi_dev;</div><div class='add'>+</div><div class='add'>+	struct airoha_qdma qdma[AIROHA_MAX_NUM_QDMA];</div><div class='add'>+	struct airoha_gdm_port *ports[AIROHA_MAX_NUM_GDM_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u32 airoha_rr(void __iomem *base, u32 offset);</div><div class='add'>+void airoha_wr(void __iomem *base, u32 offset, u32 val);</div><div class='add'>+u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val);</div><div class='add'>+</div><div class='add'>+#define airoha_fe_rr(eth, offset)				\</div><div class='add'>+	airoha_rr((eth)-&gt;fe_regs, (offset))</div><div class='add'>+#define airoha_fe_wr(eth, offset, val)				\</div><div class='add'>+	airoha_wr((eth)-&gt;fe_regs, (offset), (val))</div><div class='add'>+#define airoha_fe_rmw(eth, offset, mask, val)			\</div><div class='add'>+	airoha_rmw((eth)-&gt;fe_regs, (offset), (mask), (val))</div><div class='add'>+#define airoha_fe_set(eth, offset, val)				\</div><div class='add'>+	airoha_rmw((eth)-&gt;fe_regs, (offset), 0, (val))</div><div class='add'>+#define airoha_fe_clear(eth, offset, val)			\</div><div class='add'>+	airoha_rmw((eth)-&gt;fe_regs, (offset), (val), 0)</div><div class='add'>+</div><div class='add'>+#define airoha_qdma_rr(qdma, offset)				\</div><div class='add'>+	airoha_rr((qdma)-&gt;regs, (offset))</div><div class='add'>+#define airoha_qdma_wr(qdma, offset, val)			\</div><div class='add'>+	airoha_wr((qdma)-&gt;regs, (offset), (val))</div><div class='add'>+#define airoha_qdma_rmw(qdma, offset, mask, val)		\</div><div class='add'>+	airoha_rmw((qdma)-&gt;regs, (offset), (mask), (val))</div><div class='add'>+#define airoha_qdma_set(qdma, offset, val)			\</div><div class='add'>+	airoha_rmw((qdma)-&gt;regs, (offset), 0, (val))</div><div class='add'>+#define airoha_qdma_clear(qdma, offset, val)			\</div><div class='add'>+	airoha_rmw((qdma)-&gt;regs, (offset), (val), 0)</div><div class='add'>+</div><div class='add'>+static inline bool airhoa_is_lan_gdm_port(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	/* GDM1 port on EN7581 SoC is connected to the lan dsa switch.</div><div class='add'>+	 * GDM{2,3,4} can be used as wan port connected to an external</div><div class='add'>+	 * phy module.</div><div class='add'>+	 */</div><div class='add'>+	return port-&gt;id == 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool airoha_is_7581(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	return eth-&gt;soc-&gt;version == 0x7581;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool airoha_is_7583(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	return eth-&gt;soc-&gt;version == 0x7583;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool airoha_is_valid_gdm_port(struct airoha_eth *eth,</div><div class='add'>+			      struct airoha_gdm_port *port);</div><div class='add'>+</div><div class='add'>+bool airoha_ppe_is_enabled(struct airoha_eth *eth, int index);</div><div class='add'>+void airoha_ppe_check_skb(struct airoha_ppe_dev *dev, struct sk_buff *skb,</div><div class='add'>+			  u16 hash, bool rx_wlan);</div><div class='add'>+int airoha_ppe_setup_tc_block_cb(struct airoha_ppe_dev *dev, void *type_data);</div><div class='add'>+int airoha_ppe_init(struct airoha_eth *eth);</div><div class='add'>+void airoha_ppe_deinit(struct airoha_eth *eth);</div><div class='add'>+void airoha_ppe_init_upd_mem(struct airoha_gdm_port *port);</div><div class='add'>+u32 airoha_ppe_get_total_num_entries(struct airoha_ppe *ppe);</div><div class='add'>+struct airoha_foe_entry *airoha_ppe_foe_get_entry(struct airoha_ppe *ppe,</div><div class='add'>+						  u32 hash);</div><div class='add'>+void airoha_ppe_foe_entry_get_stats(struct airoha_ppe *ppe, u32 hash,</div><div class='add'>+				    struct airoha_foe_stats64 *stats);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+int airoha_ppe_debugfs_init(struct airoha_ppe *ppe);</div><div class='add'>+#else</div><div class='add'>+static inline int airoha_ppe_debugfs_init(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* AIROHA_ETH_H */</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_npu.c b/drivers/net/ethernet/airoha/airoha_npu.c<br/>new file mode 100644<br/>index 000000000000..68b7f9684dc7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_npu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_npu.c</a></div><div class='hunk'>@@ -0,0 +1,783 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/devcoredump.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of_reserved_mem.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+</div><div class='add'>+#include "airoha_eth.h"</div><div class='add'>+</div><div class='add'>+#define NPU_EN7581_FIRMWARE_DATA		"airoha/en7581_npu_data.bin"</div><div class='add'>+#define NPU_EN7581_FIRMWARE_RV32		"airoha/en7581_npu_rv32.bin"</div><div class='add'>+#define NPU_AN7583_FIRMWARE_DATA		"airoha/an7583_npu_data.bin"</div><div class='add'>+#define NPU_AN7583_FIRMWARE_RV32		"airoha/an7583_npu_rv32.bin"</div><div class='add'>+#define NPU_EN7581_FIRMWARE_RV32_MAX_SIZE	0x200000</div><div class='add'>+#define NPU_EN7581_FIRMWARE_DATA_MAX_SIZE	0x10000</div><div class='add'>+#define NPU_DUMP_SIZE				512</div><div class='add'>+</div><div class='add'>+#define REG_NPU_LOCAL_SRAM		0x0</div><div class='add'>+</div><div class='add'>+#define NPU_PC_BASE_ADDR		0x305000</div><div class='add'>+#define REG_PC_DBG(_n)			(0x305000 + ((_n) * 0x100))</div><div class='add'>+</div><div class='add'>+#define NPU_CLUSTER_BASE_ADDR		0x306000</div><div class='add'>+</div><div class='add'>+#define REG_CR_BOOT_TRIGGER		(NPU_CLUSTER_BASE_ADDR + 0x000)</div><div class='add'>+#define REG_CR_BOOT_CONFIG		(NPU_CLUSTER_BASE_ADDR + 0x004)</div><div class='add'>+#define REG_CR_BOOT_BASE(_n)		(NPU_CLUSTER_BASE_ADDR + 0x020 + ((_n) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define NPU_MBOX_BASE_ADDR		0x30c000</div><div class='add'>+</div><div class='add'>+#define REG_CR_MBOX_INT_STATUS		(NPU_MBOX_BASE_ADDR + 0x000)</div><div class='add'>+#define MBOX_INT_STATUS_MASK		BIT(8)</div><div class='add'>+</div><div class='add'>+#define REG_CR_MBOX_INT_MASK(_n)	(NPU_MBOX_BASE_ADDR + 0x004 + ((_n) &lt;&lt; 2))</div><div class='add'>+#define REG_CR_MBQ0_CTRL(_n)		(NPU_MBOX_BASE_ADDR + 0x030 + ((_n) &lt;&lt; 2))</div><div class='add'>+#define REG_CR_MBQ8_CTRL(_n)		(NPU_MBOX_BASE_ADDR + 0x0b0 + ((_n) &lt;&lt; 2))</div><div class='add'>+#define REG_CR_NPU_MIB(_n)		(NPU_MBOX_BASE_ADDR + 0x140 + ((_n) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define NPU_WLAN_BASE_ADDR		0x30d000</div><div class='add'>+</div><div class='add'>+#define REG_IRQ_STATUS			(NPU_WLAN_BASE_ADDR + 0x030)</div><div class='add'>+#define REG_IRQ_RXDONE(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 2) + 0x034)</div><div class='add'>+#define NPU_IRQ_RX_MASK(_n)		((_n) == 1 ? BIT(17) : BIT(16))</div><div class='add'>+</div><div class='add'>+#define REG_TX_BASE(_n)			(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x080)</div><div class='add'>+#define REG_TX_DSCP_NUM(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x084)</div><div class='add'>+#define REG_TX_CPU_IDX(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x088)</div><div class='add'>+#define REG_TX_DMA_IDX(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x08c)</div><div class='add'>+</div><div class='add'>+#define REG_RX_BASE(_n)			(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x180)</div><div class='add'>+#define REG_RX_DSCP_NUM(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x184)</div><div class='add'>+#define REG_RX_CPU_IDX(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x188)</div><div class='add'>+#define REG_RX_DMA_IDX(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x18c)</div><div class='add'>+</div><div class='add'>+#define NPU_TIMER_BASE_ADDR		0x310100</div><div class='add'>+#define REG_WDT_TIMER_CTRL(_n)		(NPU_TIMER_BASE_ADDR + ((_n) * 0x100))</div><div class='add'>+#define WDT_EN_MASK			BIT(25)</div><div class='add'>+#define WDT_INTR_MASK			BIT(21)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NPU_OP_SET = 1,</div><div class='add'>+	NPU_OP_SET_NO_WAIT,</div><div class='add'>+	NPU_OP_GET,</div><div class='add'>+	NPU_OP_GET_NO_WAIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NPU_FUNC_WIFI,</div><div class='add'>+	NPU_FUNC_TUNNEL,</div><div class='add'>+	NPU_FUNC_NOTIFY,</div><div class='add'>+	NPU_FUNC_DBA,</div><div class='add'>+	NPU_FUNC_TR471,</div><div class='add'>+	NPU_FUNC_PPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NPU_MBOX_ERROR,</div><div class='add'>+	NPU_MBOX_SUCCESS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PPE_FUNC_SET_WAIT,</div><div class='add'>+	PPE_FUNC_SET_WAIT_HWNAT_INIT,</div><div class='add'>+	PPE_FUNC_SET_WAIT_HWNAT_DEINIT,</div><div class='add'>+	PPE_FUNC_SET_WAIT_API,</div><div class='add'>+	PPE_FUNC_SET_WAIT_FLOW_STATS_SETUP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PPE2_SRAM_SET_ENTRY,</div><div class='add'>+	PPE_SRAM_SET_ENTRY,</div><div class='add'>+	PPE_SRAM_SET_VAL,</div><div class='add'>+	PPE_SRAM_RESET_VAL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	QDMA_WAN_ETHER = 1,</div><div class='add'>+	QDMA_WAN_PON_XDSL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_npu_fw {</div><div class='add'>+	const char *name;</div><div class='add'>+	int max_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_npu_soc_data {</div><div class='add'>+	struct airoha_npu_fw fw_rv32;</div><div class='add'>+	struct airoha_npu_fw fw_data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MBOX_MSG_FUNC_ID	GENMASK(14, 11)</div><div class='add'>+#define MBOX_MSG_STATIC_BUF	BIT(5)</div><div class='add'>+#define MBOX_MSG_STATUS		GENMASK(4, 2)</div><div class='add'>+#define MBOX_MSG_DONE		BIT(1)</div><div class='add'>+#define MBOX_MSG_WAIT_RSP	BIT(0)</div><div class='add'>+</div><div class='add'>+#define PPE_TYPE_L2B_IPV4	2</div><div class='add'>+#define PPE_TYPE_L2B_IPV4_IPV6	3</div><div class='add'>+</div><div class='add'>+struct ppe_mbox_data {</div><div class='add'>+	u32 func_type;</div><div class='add'>+	u32 func_id;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u8 cds;</div><div class='add'>+			u8 xpon_hal_api;</div><div class='add'>+			u8 wan_xsi;</div><div class='add'>+			u8 ct_joyme4;</div><div class='add'>+			u8 max_packet;</div><div class='add'>+			u8 rsv[3];</div><div class='add'>+			u32 ppe_type;</div><div class='add'>+			u32 wan_mode;</div><div class='add'>+			u32 wan_sel;</div><div class='add'>+		} init_info;</div><div class='add'>+		struct {</div><div class='add'>+			u32 func_id;</div><div class='add'>+			u32 size;</div><div class='add'>+			u32 data;</div><div class='add'>+		} set_info;</div><div class='add'>+		struct {</div><div class='add'>+			u32 npu_stats_addr;</div><div class='add'>+			u32 foe_stats_addr;</div><div class='add'>+		} stats_info;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct wlan_mbox_data {</div><div class='add'>+	u32 ifindex:4;</div><div class='add'>+	u32 func_type:4;</div><div class='add'>+	u32 func_id;</div><div class='add'>+	DECLARE_FLEX_ARRAY(u8, d);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_npu_send_msg(struct airoha_npu *npu, int func_id,</div><div class='add'>+			       void *p, int size)</div><div class='add'>+{</div><div class='add'>+	u16 core = 0; /* FIXME */</div><div class='add'>+	u32 val, offset = core &lt;&lt; 4;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dma_addr = dma_map_single(npu-&gt;dev, p, size, DMA_TO_DEVICE);</div><div class='add'>+	ret = dma_mapping_error(npu-&gt;dev, dma_addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;npu-&gt;cores[core].lock);</div><div class='add'>+</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_MBQ0_CTRL(0) + offset, dma_addr);</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_MBQ0_CTRL(1) + offset, size);</div><div class='add'>+	regmap_read(npu-&gt;regmap, REG_CR_MBQ0_CTRL(2) + offset, &amp;val);</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_MBQ0_CTRL(2) + offset, val + 1);</div><div class='add'>+	val = FIELD_PREP(MBOX_MSG_FUNC_ID, func_id) | MBOX_MSG_WAIT_RSP;</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_MBQ0_CTRL(3) + offset, val);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read_poll_timeout_atomic(npu-&gt;regmap,</div><div class='add'>+					      REG_CR_MBQ0_CTRL(3) + offset,</div><div class='add'>+					      val, (val &amp; MBOX_MSG_DONE),</div><div class='add'>+					      100, 100 * MSEC_PER_SEC);</div><div class='add'>+	if (!ret &amp;&amp; FIELD_GET(MBOX_MSG_STATUS, val) != NPU_MBOX_SUCCESS)</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;npu-&gt;cores[core].lock);</div><div class='add'>+</div><div class='add'>+	dma_unmap_single(npu-&gt;dev, dma_addr, size, DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_load_firmware(struct device *dev, void __iomem *addr,</div><div class='add'>+				    const struct airoha_npu_fw *fw_info)</div><div class='add'>+{</div><div class='add'>+	const struct firmware *fw;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = request_firmware(&amp;fw, fw_info-&gt;name, dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret == -ENOENT ? -EPROBE_DEFER : ret;</div><div class='add'>+</div><div class='add'>+	if (fw-&gt;size &gt; fw_info-&gt;max_size) {</div><div class='add'>+		dev_err(dev, "%s: fw size too overlimit (%zu)\n",</div><div class='add'>+			fw_info-&gt;name, fw-&gt;size);</div><div class='add'>+		ret = -E2BIG;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy_toio(addr, fw-&gt;data, fw-&gt;size);</div><div class='add'>+out:</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_run_firmware(struct device *dev, void __iomem *base,</div><div class='add'>+				   struct resource *res)</div><div class='add'>+{</div><div class='add'>+	const struct airoha_npu_soc_data *soc;</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	soc = of_device_get_match_data(dev);</div><div class='add'>+	if (!soc)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	addr = devm_ioremap_resource(dev, res);</div><div class='add'>+	if (IS_ERR(addr))</div><div class='add'>+		return PTR_ERR(addr);</div><div class='add'>+</div><div class='add'>+	/* Load rv32 npu firmware */</div><div class='add'>+	ret = airoha_npu_load_firmware(dev, addr, &amp;soc-&gt;fw_rv32);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Load data npu firmware */</div><div class='add'>+	return airoha_npu_load_firmware(dev, base + REG_NPU_LOCAL_SRAM,</div><div class='add'>+					&amp;soc-&gt;fw_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t airoha_npu_mbox_handler(int irq, void *npu_instance)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu *npu = npu_instance;</div><div class='add'>+</div><div class='add'>+	/* clear mbox interrupt status */</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_MBOX_INT_STATUS,</div><div class='add'>+		     MBOX_INT_STATUS_MASK);</div><div class='add'>+</div><div class='add'>+	/* acknowledge npu */</div><div class='add'>+	regmap_update_bits(npu-&gt;regmap, REG_CR_MBQ8_CTRL(3),</div><div class='add'>+			   MBOX_MSG_STATUS | MBOX_MSG_DONE, MBOX_MSG_DONE);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_npu_wdt_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu_core *core;</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+	void *dump;</div><div class='add'>+	u32 val[3];</div><div class='add'>+	int c;</div><div class='add'>+</div><div class='add'>+	core = container_of(work, struct airoha_npu_core, wdt_work);</div><div class='add'>+	npu = core-&gt;npu;</div><div class='add'>+</div><div class='add'>+	dump = vzalloc(NPU_DUMP_SIZE);</div><div class='add'>+	if (!dump)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	c = core - &amp;npu-&gt;cores[0];</div><div class='add'>+	regmap_bulk_read(npu-&gt;regmap, REG_PC_DBG(c), val, ARRAY_SIZE(val));</div><div class='add'>+	snprintf(dump, NPU_DUMP_SIZE, "PC: %08x SP: %08x LR: %08x\n",</div><div class='add'>+		 val[0], val[1], val[2]);</div><div class='add'>+</div><div class='add'>+	dev_coredumpv(npu-&gt;dev, dump, NPU_DUMP_SIZE, GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t airoha_npu_wdt_handler(int irq, void *core_instance)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu_core *core = core_instance;</div><div class='add'>+	struct airoha_npu *npu = core-&gt;npu;</div><div class='add'>+	int c = core - &amp;npu-&gt;cores[0];</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	regmap_set_bits(npu-&gt;regmap, REG_WDT_TIMER_CTRL(c), WDT_INTR_MASK);</div><div class='add'>+	if (!regmap_read(npu-&gt;regmap, REG_WDT_TIMER_CTRL(c), &amp;val) &amp;&amp;</div><div class='add'>+	    FIELD_GET(WDT_EN_MASK, val))</div><div class='add'>+		schedule_work(&amp;core-&gt;wdt_work);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_ppe_init(struct airoha_npu *npu)</div><div class='add'>+{</div><div class='add'>+	struct ppe_mbox_data *ppe_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ppe_data = kzalloc(sizeof(*ppe_data), GFP_KERNEL);</div><div class='add'>+	if (!ppe_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	ppe_data-&gt;func_id = PPE_FUNC_SET_WAIT_HWNAT_INIT;</div><div class='add'>+	ppe_data-&gt;init_info.ppe_type = PPE_TYPE_L2B_IPV4_IPV6;</div><div class='add'>+	ppe_data-&gt;init_info.wan_mode = QDMA_WAN_ETHER;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+	kfree(ppe_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_ppe_deinit(struct airoha_npu *npu)</div><div class='add'>+{</div><div class='add'>+	struct ppe_mbox_data *ppe_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ppe_data = kzalloc(sizeof(*ppe_data), GFP_KERNEL);</div><div class='add'>+	if (!ppe_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	ppe_data-&gt;func_id = PPE_FUNC_SET_WAIT_HWNAT_DEINIT;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+	kfree(ppe_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_ppe_flush_sram_entries(struct airoha_npu *npu,</div><div class='add'>+					     dma_addr_t foe_addr,</div><div class='add'>+					     int sram_num_entries)</div><div class='add'>+{</div><div class='add'>+	struct ppe_mbox_data *ppe_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ppe_data = kzalloc(sizeof(*ppe_data), GFP_KERNEL);</div><div class='add'>+	if (!ppe_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	ppe_data-&gt;func_id = PPE_FUNC_SET_WAIT_API;</div><div class='add'>+	ppe_data-&gt;set_info.func_id = PPE_SRAM_RESET_VAL;</div><div class='add'>+	ppe_data-&gt;set_info.data = foe_addr;</div><div class='add'>+	ppe_data-&gt;set_info.size = sram_num_entries;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+	kfree(ppe_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_foe_commit_entry(struct airoha_npu *npu,</div><div class='add'>+				       dma_addr_t foe_addr,</div><div class='add'>+				       u32 entry_size, u32 hash, bool ppe2)</div><div class='add'>+{</div><div class='add'>+	struct ppe_mbox_data *ppe_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ppe_data = kzalloc(sizeof(*ppe_data), GFP_ATOMIC);</div><div class='add'>+	if (!ppe_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	ppe_data-&gt;func_id = PPE_FUNC_SET_WAIT_API;</div><div class='add'>+	ppe_data-&gt;set_info.data = foe_addr;</div><div class='add'>+	ppe_data-&gt;set_info.size = entry_size;</div><div class='add'>+	ppe_data-&gt;set_info.func_id = ppe2 ? PPE2_SRAM_SET_ENTRY</div><div class='add'>+					  : PPE_SRAM_SET_ENTRY;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;set_info.func_id = PPE_SRAM_SET_VAL;</div><div class='add'>+	ppe_data-&gt;set_info.data = hash;</div><div class='add'>+	ppe_data-&gt;set_info.size = sizeof(u32);</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+out:</div><div class='add'>+	kfree(ppe_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_ppe_stats_setup(struct airoha_npu *npu,</div><div class='add'>+				      dma_addr_t foe_stats_addr,</div><div class='add'>+				      u32 num_stats_entries)</div><div class='add'>+{</div><div class='add'>+	int err, size = num_stats_entries * sizeof(*npu-&gt;stats);</div><div class='add'>+	struct ppe_mbox_data *ppe_data;</div><div class='add'>+</div><div class='add'>+	ppe_data = kzalloc(sizeof(*ppe_data), GFP_ATOMIC);</div><div class='add'>+	if (!ppe_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	ppe_data-&gt;func_id = PPE_FUNC_SET_WAIT_FLOW_STATS_SETUP;</div><div class='add'>+	ppe_data-&gt;stats_info.foe_stats_addr = foe_stats_addr;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	npu-&gt;stats = devm_ioremap(npu-&gt;dev,</div><div class='add'>+				  ppe_data-&gt;stats_info.npu_stats_addr,</div><div class='add'>+				  size);</div><div class='add'>+	if (!npu-&gt;stats)</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+out:</div><div class='add'>+	kfree(ppe_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_wlan_msg_send(struct airoha_npu *npu, int ifindex,</div><div class='add'>+				    enum airoha_npu_wlan_set_cmd func_id,</div><div class='add'>+				    void *data, int data_len, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct wlan_mbox_data *wlan_data;</div><div class='add'>+	int err, len;</div><div class='add'>+</div><div class='add'>+	len = sizeof(*wlan_data) + data_len;</div><div class='add'>+	wlan_data = kzalloc(len, gfp);</div><div class='add'>+	if (!wlan_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	wlan_data-&gt;ifindex = ifindex;</div><div class='add'>+	wlan_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	wlan_data-&gt;func_id = func_id;</div><div class='add'>+	memcpy(wlan_data-&gt;d, data, data_len);</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_WIFI, wlan_data, len);</div><div class='add'>+	kfree(wlan_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_wlan_msg_get(struct airoha_npu *npu, int ifindex,</div><div class='add'>+				   enum airoha_npu_wlan_get_cmd func_id,</div><div class='add'>+				   void *data, int data_len, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct wlan_mbox_data *wlan_data;</div><div class='add'>+	int err, len;</div><div class='add'>+</div><div class='add'>+	len = sizeof(*wlan_data) + data_len;</div><div class='add'>+	wlan_data = kzalloc(len, gfp);</div><div class='add'>+	if (!wlan_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	wlan_data-&gt;ifindex = ifindex;</div><div class='add'>+	wlan_data-&gt;func_type = NPU_OP_GET;</div><div class='add'>+	wlan_data-&gt;func_id = func_id;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_WIFI, wlan_data, len);</div><div class='add'>+	if (!err)</div><div class='add'>+		memcpy(data, wlan_data-&gt;d, data_len);</div><div class='add'>+	kfree(wlan_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+airoha_npu_wlan_set_reserved_memory(struct airoha_npu *npu,</div><div class='add'>+				    int ifindex, const char *name,</div><div class='add'>+				    enum airoha_npu_wlan_set_cmd func_id)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = npu-&gt;dev;</div><div class='add'>+	struct resource res;</div><div class='add'>+	int err;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	err = of_reserved_mem_region_to_resource_byname(dev-&gt;of_node, name,</div><div class='add'>+							&amp;res);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = res.start;</div><div class='add'>+	return airoha_npu_wlan_msg_send(npu, ifindex, func_id, &amp;val,</div><div class='add'>+					sizeof(val), GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_wlan_init_memory(struct airoha_npu *npu)</div><div class='add'>+{</div><div class='add'>+	enum airoha_npu_wlan_set_cmd cmd = WLAN_FUNC_SET_WAIT_NPU_BAND0_ONCPU;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_wlan_msg_send(npu, 1, cmd, &amp;val, sizeof(val),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd = WLAN_FUNC_SET_WAIT_TX_BUF_CHECK_ADDR;</div><div class='add'>+	err = airoha_npu_wlan_set_reserved_memory(npu, 0, "tx-bufid", cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd = WLAN_FUNC_SET_WAIT_PKT_BUF_ADDR;</div><div class='add'>+	err = airoha_npu_wlan_set_reserved_memory(npu, 0, "pkt", cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd = WLAN_FUNC_SET_WAIT_TX_PKT_BUF_ADDR;</div><div class='add'>+	err = airoha_npu_wlan_set_reserved_memory(npu, 0, "tx-pkt", cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd = WLAN_FUNC_SET_WAIT_IS_FORCE_TO_CPU;</div><div class='add'>+	return airoha_npu_wlan_msg_send(npu, 0, cmd, &amp;val, sizeof(val),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_npu_wlan_queue_addr_get(struct airoha_npu *npu, int qid,</div><div class='add'>+					  bool xmit)</div><div class='add'>+{</div><div class='add'>+	if (xmit)</div><div class='add'>+		return REG_TX_BASE(qid + 2);</div><div class='add'>+</div><div class='add'>+	return REG_RX_BASE(qid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_npu_wlan_irq_status_set(struct airoha_npu *npu, u32 val)</div><div class='add'>+{</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_IRQ_STATUS, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_npu_wlan_irq_status_get(struct airoha_npu *npu, int q)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	regmap_read(npu-&gt;regmap, REG_IRQ_STATUS, &amp;val);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_npu_wlan_irq_enable(struct airoha_npu *npu, int q)</div><div class='add'>+{</div><div class='add'>+	regmap_set_bits(npu-&gt;regmap, REG_IRQ_RXDONE(q), NPU_IRQ_RX_MASK(q));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_npu_wlan_irq_disable(struct airoha_npu *npu, int q)</div><div class='add'>+{</div><div class='add'>+	regmap_clear_bits(npu-&gt;regmap, REG_IRQ_RXDONE(q), NPU_IRQ_RX_MASK(q));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct airoha_npu *airoha_npu_get(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+</div><div class='add'>+	np = of_parse_phandle(dev-&gt;of_node, "airoha,npu", 0);</div><div class='add'>+	if (!np)</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+</div><div class='add'>+	pdev = of_find_device_by_node(np);</div><div class='add'>+</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		dev_err(dev, "cannot find device node %s\n", np-&gt;name);</div><div class='add'>+		of_node_put(np);</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+	of_node_put(np);</div><div class='add'>+</div><div class='add'>+	if (!try_module_get(THIS_MODULE)) {</div><div class='add'>+		dev_err(dev, "failed to get the device driver module\n");</div><div class='add'>+		npu = ERR_PTR(-ENODEV);</div><div class='add'>+		goto error_pdev_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	npu = platform_get_drvdata(pdev);</div><div class='add'>+	if (!npu) {</div><div class='add'>+		npu = ERR_PTR(-ENODEV);</div><div class='add'>+		goto error_module_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!device_link_add(dev, &amp;pdev-&gt;dev, DL_FLAG_AUTOREMOVE_SUPPLIER)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"failed to create device link to consumer %s\n",</div><div class='add'>+			dev_name(dev));</div><div class='add'>+		npu = ERR_PTR(-EINVAL);</div><div class='add'>+		goto error_module_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return npu;</div><div class='add'>+</div><div class='add'>+error_module_put:</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+error_pdev_put:</div><div class='add'>+	platform_device_put(pdev);</div><div class='add'>+</div><div class='add'>+	return npu;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(airoha_npu_get);</div><div class='add'>+</div><div class='add'>+void airoha_npu_put(struct airoha_npu *npu)</div><div class='add'>+{</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+	put_device(npu-&gt;dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(airoha_npu_put);</div><div class='add'>+</div><div class='add'>+static const struct airoha_npu_soc_data en7581_npu_soc_data = {</div><div class='add'>+	.fw_rv32 = {</div><div class='add'>+		.name = NPU_EN7581_FIRMWARE_RV32,</div><div class='add'>+		.max_size = NPU_EN7581_FIRMWARE_RV32_MAX_SIZE,</div><div class='add'>+	},</div><div class='add'>+	.fw_data = {</div><div class='add'>+		.name = NPU_EN7581_FIRMWARE_DATA,</div><div class='add'>+		.max_size = NPU_EN7581_FIRMWARE_DATA_MAX_SIZE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct airoha_npu_soc_data an7583_npu_soc_data = {</div><div class='add'>+	.fw_rv32 = {</div><div class='add'>+		.name = NPU_AN7583_FIRMWARE_RV32,</div><div class='add'>+		.max_size = NPU_EN7581_FIRMWARE_RV32_MAX_SIZE,</div><div class='add'>+	},</div><div class='add'>+	.fw_data = {</div><div class='add'>+		.name = NPU_AN7583_FIRMWARE_DATA,</div><div class='add'>+		.max_size = NPU_EN7581_FIRMWARE_DATA_MAX_SIZE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id of_airoha_npu_match[] = {</div><div class='add'>+	{ .compatible = "airoha,en7581-npu", .data = &amp;en7581_npu_soc_data },</div><div class='add'>+	{ .compatible = "airoha,an7583-npu", .data = &amp;an7583_npu_soc_data },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, of_airoha_npu_match);</div><div class='add'>+</div><div class='add'>+static const struct regmap_config regmap_config = {</div><div class='add'>+	.name			= "npu",</div><div class='add'>+	.reg_bits		= 32,</div><div class='add'>+	.val_bits		= 32,</div><div class='add'>+	.reg_stride		= 4,</div><div class='add'>+	.disable_locking	= true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_npu_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+	struct resource res;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	int i, irq, err;</div><div class='add'>+</div><div class='add'>+	base = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(base))</div><div class='add'>+		return PTR_ERR(base);</div><div class='add'>+</div><div class='add'>+	npu = devm_kzalloc(dev, sizeof(*npu), GFP_KERNEL);</div><div class='add'>+	if (!npu)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	npu-&gt;dev = dev;</div><div class='add'>+	npu-&gt;ops.ppe_init = airoha_npu_ppe_init;</div><div class='add'>+	npu-&gt;ops.ppe_deinit = airoha_npu_ppe_deinit;</div><div class='add'>+	npu-&gt;ops.ppe_init_stats = airoha_npu_ppe_stats_setup;</div><div class='add'>+	npu-&gt;ops.ppe_flush_sram_entries = airoha_npu_ppe_flush_sram_entries;</div><div class='add'>+	npu-&gt;ops.ppe_foe_commit_entry = airoha_npu_foe_commit_entry;</div><div class='add'>+	npu-&gt;ops.wlan_init_reserved_memory = airoha_npu_wlan_init_memory;</div><div class='add'>+	npu-&gt;ops.wlan_send_msg = airoha_npu_wlan_msg_send;</div><div class='add'>+	npu-&gt;ops.wlan_get_msg = airoha_npu_wlan_msg_get;</div><div class='add'>+	npu-&gt;ops.wlan_get_queue_addr = airoha_npu_wlan_queue_addr_get;</div><div class='add'>+	npu-&gt;ops.wlan_set_irq_status = airoha_npu_wlan_irq_status_set;</div><div class='add'>+	npu-&gt;ops.wlan_get_irq_status = airoha_npu_wlan_irq_status_get;</div><div class='add'>+	npu-&gt;ops.wlan_enable_irq = airoha_npu_wlan_irq_enable;</div><div class='add'>+	npu-&gt;ops.wlan_disable_irq = airoha_npu_wlan_irq_disable;</div><div class='add'>+</div><div class='add'>+	npu-&gt;regmap = devm_regmap_init_mmio(dev, base, &amp;regmap_config);</div><div class='add'>+	if (IS_ERR(npu-&gt;regmap))</div><div class='add'>+		return PTR_ERR(npu-&gt;regmap);</div><div class='add'>+</div><div class='add'>+	err = of_reserved_mem_region_to_resource(dev-&gt;of_node, 0, &amp;res);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return irq;</div><div class='add'>+</div><div class='add'>+	err = devm_request_irq(dev, irq, airoha_npu_mbox_handler,</div><div class='add'>+			       IRQF_SHARED, "airoha-npu-mbox", npu);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(npu-&gt;cores); i++) {</div><div class='add'>+		struct airoha_npu_core *core = &amp;npu-&gt;cores[i];</div><div class='add'>+</div><div class='add'>+		spin_lock_init(&amp;core-&gt;lock);</div><div class='add'>+		core-&gt;npu = npu;</div><div class='add'>+</div><div class='add'>+		irq = platform_get_irq(pdev, i + 1);</div><div class='add'>+		if (irq &lt; 0)</div><div class='add'>+			return irq;</div><div class='add'>+</div><div class='add'>+		err = devm_request_irq(dev, irq, airoha_npu_wdt_handler,</div><div class='add'>+				       IRQF_SHARED, "airoha-npu-wdt", core);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		INIT_WORK(&amp;core-&gt;wdt_work, airoha_npu_wdt_work);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* wlan IRQ lines */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(npu-&gt;irqs); i++) {</div><div class='add'>+		irq = platform_get_irq(pdev, i + ARRAY_SIZE(npu-&gt;cores) + 1);</div><div class='add'>+		if (irq &lt; 0)</div><div class='add'>+			return irq;</div><div class='add'>+</div><div class='add'>+		npu-&gt;irqs[i] = irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_run_firmware(dev, base, &amp;res);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(dev, err, "failed to run npu firmware\n");</div><div class='add'>+</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_NPU_MIB(10),</div><div class='add'>+		     res.start + NPU_EN7581_FIRMWARE_RV32_MAX_SIZE);</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_NPU_MIB(11), 0x40000); /* SRAM 256K */</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_NPU_MIB(12), 0);</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_NPU_MIB(21), 1);</div><div class='add'>+	msleep(100);</div><div class='add'>+</div><div class='add'>+	/* setting booting address */</div><div class='add'>+	for (i = 0; i &lt; NPU_NUM_CORES; i++)</div><div class='add'>+		regmap_write(npu-&gt;regmap, REG_CR_BOOT_BASE(i), res.start);</div><div class='add'>+	usleep_range(1000, 2000);</div><div class='add'>+</div><div class='add'>+	/* enable NPU cores */</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_BOOT_CONFIG, 0xff);</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_BOOT_TRIGGER, 0x1);</div><div class='add'>+	msleep(100);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, npu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_npu_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu *npu = platform_get_drvdata(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(npu-&gt;cores); i++)</div><div class='add'>+		cancel_work_sync(&amp;npu-&gt;cores[i].wdt_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver airoha_npu_driver = {</div><div class='add'>+	.probe = airoha_npu_probe,</div><div class='add'>+	.remove = airoha_npu_remove,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "airoha-npu",</div><div class='add'>+		.of_match_table = of_airoha_npu_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(airoha_npu_driver);</div><div class='add'>+</div><div class='add'>+MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_DATA);</div><div class='add'>+MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_RV32);</div><div class='add'>+MODULE_FIRMWARE(NPU_AN7583_FIRMWARE_DATA);</div><div class='add'>+MODULE_FIRMWARE(NPU_AN7583_FIRMWARE_RV32);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Airoha Network Processor Unit driver");</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_ppe.c b/drivers/net/ethernet/airoha/airoha_ppe.c<br/>new file mode 100644<br/>index 000000000000..0caabb0c3aa0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_ppe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_ppe.c</a></div><div class='hunk'>@@ -0,0 +1,1561 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/ipv6.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/rhashtable.h&gt;</div><div class='add'>+#include &lt;net/ipv6.h&gt;</div><div class='add'>+#include &lt;net/pkt_cls.h&gt;</div><div class='add'>+</div><div class='add'>+#include "airoha_regs.h"</div><div class='add'>+#include "airoha_eth.h"</div><div class='add'>+</div><div class='add'>+static DEFINE_MUTEX(flow_offload_mutex);</div><div class='add'>+static DEFINE_SPINLOCK(ppe_lock);</div><div class='add'>+</div><div class='add'>+static const struct rhashtable_params airoha_flow_table_params = {</div><div class='add'>+	.head_offset = offsetof(struct airoha_flow_table_entry, node),</div><div class='add'>+	.key_offset = offsetof(struct airoha_flow_table_entry, cookie),</div><div class='add'>+	.key_len = sizeof(unsigned long),</div><div class='add'>+	.automatic_shrinking = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rhashtable_params airoha_l2_flow_table_params = {</div><div class='add'>+	.head_offset = offsetof(struct airoha_flow_table_entry, l2_node),</div><div class='add'>+	.key_offset = offsetof(struct airoha_flow_table_entry, data.bridge),</div><div class='add'>+	.key_len = 2 * ETH_ALEN,</div><div class='add'>+	.automatic_shrinking = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_get_num_stats_entries(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ENABLED(CONFIG_NET_AIROHA_FLOW_STATS))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (airoha_is_7583(ppe-&gt;eth))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return PPE_STATS_NUM_ENTRIES;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_get_total_num_stats_entries(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	int num_stats = airoha_ppe_get_num_stats_entries(ppe);</div><div class='add'>+</div><div class='add'>+	if (num_stats &gt; 0) {</div><div class='add'>+		struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+</div><div class='add'>+		num_stats = num_stats * eth-&gt;soc-&gt;num_ppe;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return num_stats;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_ppe_get_total_sram_num_entries(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+</div><div class='add'>+	return PPE_SRAM_NUM_ENTRIES * eth-&gt;soc-&gt;num_ppe;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 airoha_ppe_get_total_num_entries(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);</div><div class='add'>+</div><div class='add'>+	return sram_num_entries + PPE_DRAM_NUM_ENTRIES;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool airoha_ppe_is_enabled(struct airoha_eth *eth, int index)</div><div class='add'>+{</div><div class='add'>+	if (index &gt;= eth-&gt;soc-&gt;num_ppe)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return airoha_fe_rr(eth, REG_PPE_GLO_CFG(index)) &amp; PPE_GLO_CFG_EN_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_ppe_get_timestamp(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	u16 timestamp = airoha_fe_rr(ppe-&gt;eth, REG_FE_FOE_TS);</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(AIROHA_FOE_IB1_BIND_TIMESTAMP, timestamp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_hw_init(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	u32 sram_ppe_num_data_entries = PPE_SRAM_NUM_ENTRIES, sram_num_entries;</div><div class='add'>+	u32 sram_tb_size, dram_num_entries;</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+	int i, sram_num_stats_entries;</div><div class='add'>+</div><div class='add'>+	sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);</div><div class='add'>+	sram_tb_size = sram_num_entries * sizeof(struct airoha_foe_entry);</div><div class='add'>+	dram_num_entries = PPE_RAM_NUM_ENTRIES_SHIFT(PPE_DRAM_NUM_ENTRIES);</div><div class='add'>+</div><div class='add'>+	sram_num_stats_entries = airoha_ppe_get_num_stats_entries(ppe);</div><div class='add'>+	if (sram_num_stats_entries &gt; 0)</div><div class='add'>+		sram_ppe_num_data_entries -= sram_num_stats_entries;</div><div class='add'>+	sram_ppe_num_data_entries =</div><div class='add'>+		PPE_RAM_NUM_ENTRIES_SHIFT(sram_ppe_num_data_entries);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; eth-&gt;soc-&gt;num_ppe; i++) {</div><div class='add'>+		int p;</div><div class='add'>+</div><div class='add'>+		airoha_fe_wr(eth, REG_PPE_TB_BASE(i),</div><div class='add'>+			     ppe-&gt;foe_dma + sram_tb_size);</div><div class='add'>+</div><div class='add'>+		airoha_fe_rmw(eth, REG_PPE_BND_AGE0(i),</div><div class='add'>+			      PPE_BIND_AGE0_DELTA_NON_L4 |</div><div class='add'>+			      PPE_BIND_AGE0_DELTA_UDP,</div><div class='add'>+			      FIELD_PREP(PPE_BIND_AGE0_DELTA_NON_L4, 1) |</div><div class='add'>+			      FIELD_PREP(PPE_BIND_AGE0_DELTA_UDP, 12));</div><div class='add'>+		airoha_fe_rmw(eth, REG_PPE_BND_AGE1(i),</div><div class='add'>+			      PPE_BIND_AGE1_DELTA_TCP_FIN |</div><div class='add'>+			      PPE_BIND_AGE1_DELTA_TCP,</div><div class='add'>+			      FIELD_PREP(PPE_BIND_AGE1_DELTA_TCP_FIN, 1) |</div><div class='add'>+			      FIELD_PREP(PPE_BIND_AGE1_DELTA_TCP, 7));</div><div class='add'>+</div><div class='add'>+		airoha_fe_rmw(eth, REG_PPE_TB_HASH_CFG(i),</div><div class='add'>+			      PPE_SRAM_TABLE_EN_MASK |</div><div class='add'>+			      PPE_SRAM_HASH1_EN_MASK |</div><div class='add'>+			      PPE_DRAM_TABLE_EN_MASK |</div><div class='add'>+			      PPE_SRAM_HASH0_MODE_MASK |</div><div class='add'>+			      PPE_SRAM_HASH1_MODE_MASK |</div><div class='add'>+			      PPE_DRAM_HASH0_MODE_MASK |</div><div class='add'>+			      PPE_DRAM_HASH1_MODE_MASK,</div><div class='add'>+			      FIELD_PREP(PPE_SRAM_TABLE_EN_MASK, 1) |</div><div class='add'>+			      FIELD_PREP(PPE_SRAM_HASH1_EN_MASK, 1) |</div><div class='add'>+			      FIELD_PREP(PPE_SRAM_HASH1_MODE_MASK, 1) |</div><div class='add'>+			      FIELD_PREP(PPE_DRAM_HASH1_MODE_MASK, 3));</div><div class='add'>+</div><div class='add'>+		airoha_fe_rmw(eth, REG_PPE_TB_CFG(i),</div><div class='add'>+			      PPE_TB_CFG_SEARCH_MISS_MASK |</div><div class='add'>+			      PPE_SRAM_TB_NUM_ENTRY_MASK |</div><div class='add'>+			      PPE_DRAM_TB_NUM_ENTRY_MASK |</div><div class='add'>+			      PPE_TB_CFG_KEEPALIVE_MASK |</div><div class='add'>+			      PPE_TB_ENTRY_SIZE_MASK,</div><div class='add'>+			      FIELD_PREP(PPE_TB_CFG_SEARCH_MISS_MASK, 3) |</div><div class='add'>+			      FIELD_PREP(PPE_TB_ENTRY_SIZE_MASK, 0) |</div><div class='add'>+			      FIELD_PREP(PPE_SRAM_TB_NUM_ENTRY_MASK,</div><div class='add'>+					 sram_ppe_num_data_entries) |</div><div class='add'>+			      FIELD_PREP(PPE_DRAM_TB_NUM_ENTRY_MASK,</div><div class='add'>+					 dram_num_entries));</div><div class='add'>+</div><div class='add'>+		airoha_fe_wr(eth, REG_PPE_HASH_SEED(i), PPE_HASH_SEED);</div><div class='add'>+</div><div class='add'>+		for (p = 0; p &lt; ARRAY_SIZE(eth-&gt;ports); p++)</div><div class='add'>+			airoha_fe_rmw(eth, REG_PPE_MTU(i, p),</div><div class='add'>+				      FP0_EGRESS_MTU_MASK |</div><div class='add'>+				      FP1_EGRESS_MTU_MASK,</div><div class='add'>+				      FIELD_PREP(FP0_EGRESS_MTU_MASK,</div><div class='add'>+						 AIROHA_MAX_MTU) |</div><div class='add'>+				      FIELD_PREP(FP1_EGRESS_MTU_MASK,</div><div class='add'>+						 AIROHA_MAX_MTU));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_flow_mangle_eth(const struct flow_action_entry *act, void *eth)</div><div class='add'>+{</div><div class='add'>+	void *dest = eth + act-&gt;mangle.offset;</div><div class='add'>+	const void *src = &amp;act-&gt;mangle.val;</div><div class='add'>+</div><div class='add'>+	if (act-&gt;mangle.offset &gt; 8)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (act-&gt;mangle.mask == 0xffff) {</div><div class='add'>+		src += 2;</div><div class='add'>+		dest += 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(dest, src, act-&gt;mangle.mask ? 2 : 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_mangle_ports(const struct flow_action_entry *act,</div><div class='add'>+					struct airoha_flow_data *data)</div><div class='add'>+{</div><div class='add'>+	u32 val = be32_to_cpu((__force __be32)act-&gt;mangle.val);</div><div class='add'>+</div><div class='add'>+	switch (act-&gt;mangle.offset) {</div><div class='add'>+	case 0:</div><div class='add'>+		if ((__force __be32)act-&gt;mangle.mask == ~cpu_to_be32(0xffff))</div><div class='add'>+			data-&gt;dst_port = cpu_to_be16(val);</div><div class='add'>+		else</div><div class='add'>+			data-&gt;src_port = cpu_to_be16(val &gt;&gt; 16);</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		data-&gt;dst_port = cpu_to_be16(val);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_mangle_ipv4(const struct flow_action_entry *act,</div><div class='add'>+				       struct airoha_flow_data *data)</div><div class='add'>+{</div><div class='add'>+	__be32 *dest;</div><div class='add'>+</div><div class='add'>+	switch (act-&gt;mangle.offset) {</div><div class='add'>+	case offsetof(struct iphdr, saddr):</div><div class='add'>+		dest = &amp;data-&gt;v4.src_addr;</div><div class='add'>+		break;</div><div class='add'>+	case offsetof(struct iphdr, daddr):</div><div class='add'>+		dest = &amp;data-&gt;v4.dst_addr;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(dest, &amp;act-&gt;mangle.val, sizeof(u32));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_get_wdma_info(struct net_device *dev, const u8 *addr,</div><div class='add'>+				    struct airoha_wdma_info *info)</div><div class='add'>+{</div><div class='add'>+	struct net_device_path_stack stack;</div><div class='add'>+	struct net_device_path *path;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	err = dev_fill_forward_path(dev, addr, &amp;stack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	path = &amp;stack.path[stack.num_paths - 1];</div><div class='add'>+	if (path-&gt;type != DEV_PATH_MTK_WDMA)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	info-&gt;idx = path-&gt;mtk_wdma.wdma_idx;</div><div class='add'>+	info-&gt;bss = path-&gt;mtk_wdma.bss;</div><div class='add'>+	info-&gt;wcid = path-&gt;mtk_wdma.wcid;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_get_dsa_port(struct net_device **dev)</div><div class='add'>+{</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA)</div><div class='add'>+	struct dsa_port *dp = dsa_port_from_netdev(*dev);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(dp))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	*dev = dsa_port_to_conduit(dp);</div><div class='add'>+	return dp-&gt;index;</div><div class='add'>+#else</div><div class='add'>+	return -ENODEV;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_set_bridge_addrs(struct airoha_foe_bridge *br,</div><div class='add'>+					    struct ethhdr *eh)</div><div class='add'>+{</div><div class='add'>+	br-&gt;dest_mac_hi = get_unaligned_be32(eh-&gt;h_dest);</div><div class='add'>+	br-&gt;dest_mac_lo = get_unaligned_be16(eh-&gt;h_dest + 4);</div><div class='add'>+	br-&gt;src_mac_hi = get_unaligned_be16(eh-&gt;h_source);</div><div class='add'>+	br-&gt;src_mac_lo = get_unaligned_be32(eh-&gt;h_source + 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_entry_prepare(struct airoha_eth *eth,</div><div class='add'>+					struct airoha_foe_entry *hwe,</div><div class='add'>+					struct net_device *dev, int type,</div><div class='add'>+					struct airoha_flow_data *data,</div><div class='add'>+					int l4proto)</div><div class='add'>+{</div><div class='add'>+	u32 qdata = FIELD_PREP(AIROHA_FOE_SHAPER_ID, 0x7f), ports_pad, val;</div><div class='add'>+	int wlan_etype = -EINVAL, dsa_port = airoha_get_dsa_port(&amp;dev);</div><div class='add'>+	struct airoha_foe_mac_info_common *l2;</div><div class='add'>+	u8 smac_id = 0xf;</div><div class='add'>+</div><div class='add'>+	memset(hwe, 0, sizeof(*hwe));</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(AIROHA_FOE_IB1_BIND_STATE, AIROHA_FOE_STATE_BIND) |</div><div class='add'>+	      FIELD_PREP(AIROHA_FOE_IB1_BIND_PACKET_TYPE, type) |</div><div class='add'>+	      FIELD_PREP(AIROHA_FOE_IB1_BIND_UDP, l4proto == IPPROTO_UDP) |</div><div class='add'>+	      FIELD_PREP(AIROHA_FOE_IB1_BIND_VLAN_LAYER, data-&gt;vlan.num) |</div><div class='add'>+	      FIELD_PREP(AIROHA_FOE_IB1_BIND_VPM, data-&gt;vlan.num) |</div><div class='add'>+	      FIELD_PREP(AIROHA_FOE_IB1_BIND_PPPOE, data-&gt;pppoe.num) |</div><div class='add'>+	      AIROHA_FOE_IB1_BIND_TTL;</div><div class='add'>+	hwe-&gt;ib1 = val;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(AIROHA_FOE_IB2_PORT_AG, 0x1f);</div><div class='add'>+	if (dev) {</div><div class='add'>+		struct airoha_wdma_info info = {};</div><div class='add'>+</div><div class='add'>+		if (!airoha_ppe_get_wdma_info(dev, data-&gt;eth.h_dest, &amp;info)) {</div><div class='add'>+			val |= FIELD_PREP(AIROHA_FOE_IB2_NBQ, info.idx) |</div><div class='add'>+			       FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT,</div><div class='add'>+					  FE_PSE_PORT_CDM4);</div><div class='add'>+			qdata |= FIELD_PREP(AIROHA_FOE_ACTDP, info.bss);</div><div class='add'>+			wlan_etype = FIELD_PREP(AIROHA_FOE_MAC_WDMA_BAND,</div><div class='add'>+						info.idx) |</div><div class='add'>+				     FIELD_PREP(AIROHA_FOE_MAC_WDMA_WCID,</div><div class='add'>+						info.wcid);</div><div class='add'>+		} else {</div><div class='add'>+			struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+			u8 pse_port;</div><div class='add'>+</div><div class='add'>+			if (!airoha_is_valid_gdm_port(eth, port))</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			if (dsa_port &gt;= 0 || eth-&gt;ports[1])</div><div class='add'>+				pse_port = port-&gt;id == 4 ? FE_PSE_PORT_GDM4</div><div class='add'>+							 : port-&gt;id;</div><div class='add'>+			else</div><div class='add'>+				pse_port = 2; /* uplink relies on GDM2</div><div class='add'>+					       * loopback</div><div class='add'>+					       */</div><div class='add'>+</div><div class='add'>+			val |= FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT, pse_port) |</div><div class='add'>+			       AIROHA_FOE_IB2_PSE_QOS;</div><div class='add'>+			/* For downlink traffic consume SRAM memory for hw</div><div class='add'>+			 * forwarding descriptors queue.</div><div class='add'>+			 */</div><div class='add'>+			if (airhoa_is_lan_gdm_port(port))</div><div class='add'>+				val |= AIROHA_FOE_IB2_FAST_PATH;</div><div class='add'>+			if (dsa_port &gt;= 0)</div><div class='add'>+				val |= FIELD_PREP(AIROHA_FOE_IB2_NBQ,</div><div class='add'>+						  dsa_port);</div><div class='add'>+</div><div class='add'>+			smac_id = port-&gt;id;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_multicast_ether_addr(data-&gt;eth.h_dest))</div><div class='add'>+		val |= AIROHA_FOE_IB2_MULTICAST;</div><div class='add'>+</div><div class='add'>+	ports_pad = 0xa5a5a500 | (l4proto &amp; 0xff);</div><div class='add'>+	if (type == PPE_PKT_TYPE_IPV4_ROUTE)</div><div class='add'>+		hwe-&gt;ipv4.orig_tuple.ports = ports_pad;</div><div class='add'>+	if (type == PPE_PKT_TYPE_IPV6_ROUTE_3T)</div><div class='add'>+		hwe-&gt;ipv6.ports = ports_pad;</div><div class='add'>+</div><div class='add'>+	if (type == PPE_PKT_TYPE_BRIDGE) {</div><div class='add'>+		airoha_ppe_foe_set_bridge_addrs(&amp;hwe-&gt;bridge, &amp;data-&gt;eth);</div><div class='add'>+		hwe-&gt;bridge.data = qdata;</div><div class='add'>+		hwe-&gt;bridge.ib2 = val;</div><div class='add'>+		l2 = &amp;hwe-&gt;bridge.l2.common;</div><div class='add'>+	} else if (type &gt;= PPE_PKT_TYPE_IPV6_ROUTE_3T) {</div><div class='add'>+		hwe-&gt;ipv6.data = qdata;</div><div class='add'>+		hwe-&gt;ipv6.ib2 = val;</div><div class='add'>+		l2 = &amp;hwe-&gt;ipv6.l2;</div><div class='add'>+		l2-&gt;etype = ETH_P_IPV6;</div><div class='add'>+	} else {</div><div class='add'>+		hwe-&gt;ipv4.data = qdata;</div><div class='add'>+		hwe-&gt;ipv4.ib2 = val;</div><div class='add'>+		l2 = &amp;hwe-&gt;ipv4.l2.common;</div><div class='add'>+		l2-&gt;etype = ETH_P_IP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	l2-&gt;dest_mac_hi = get_unaligned_be32(data-&gt;eth.h_dest);</div><div class='add'>+	l2-&gt;dest_mac_lo = get_unaligned_be16(data-&gt;eth.h_dest + 4);</div><div class='add'>+	if (type &lt;= PPE_PKT_TYPE_IPV4_DSLITE) {</div><div class='add'>+		struct airoha_foe_mac_info *mac_info;</div><div class='add'>+</div><div class='add'>+		l2-&gt;src_mac_hi = get_unaligned_be32(data-&gt;eth.h_source);</div><div class='add'>+		hwe-&gt;ipv4.l2.src_mac_lo =</div><div class='add'>+			get_unaligned_be16(data-&gt;eth.h_source + 4);</div><div class='add'>+</div><div class='add'>+		mac_info = (struct airoha_foe_mac_info *)l2;</div><div class='add'>+		mac_info-&gt;pppoe_id = data-&gt;pppoe.sid;</div><div class='add'>+	} else {</div><div class='add'>+		l2-&gt;src_mac_hi = FIELD_PREP(AIROHA_FOE_MAC_SMAC_ID, smac_id) |</div><div class='add'>+				 FIELD_PREP(AIROHA_FOE_MAC_PPPOE_ID,</div><div class='add'>+					    data-&gt;pppoe.sid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data-&gt;vlan.num) {</div><div class='add'>+		l2-&gt;vlan1 = data-&gt;vlan.hdr[0].id;</div><div class='add'>+		if (data-&gt;vlan.num == 2)</div><div class='add'>+			l2-&gt;vlan2 = data-&gt;vlan.hdr[1].id;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (wlan_etype &gt;= 0) {</div><div class='add'>+		l2-&gt;etype = wlan_etype;</div><div class='add'>+	} else if (dsa_port &gt;= 0) {</div><div class='add'>+		l2-&gt;etype = BIT(dsa_port);</div><div class='add'>+		l2-&gt;etype |= !data-&gt;vlan.num ? BIT(15) : 0;</div><div class='add'>+	} else if (data-&gt;pppoe.num) {</div><div class='add'>+		l2-&gt;etype = ETH_P_PPP_SES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_entry_set_ipv4_tuple(struct airoha_foe_entry *hwe,</div><div class='add'>+					       struct airoha_flow_data *data,</div><div class='add'>+					       bool egress)</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe-&gt;ib1);</div><div class='add'>+	struct airoha_foe_ipv4_tuple *t;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_HNAPT:</div><div class='add'>+		if (egress) {</div><div class='add'>+			t = &amp;hwe-&gt;ipv4.new_tuple;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_DSLITE:</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_ROUTE:</div><div class='add'>+		t = &amp;hwe-&gt;ipv4.orig_tuple;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	t-&gt;src_ip = be32_to_cpu(data-&gt;v4.src_addr);</div><div class='add'>+	t-&gt;dest_ip = be32_to_cpu(data-&gt;v4.dst_addr);</div><div class='add'>+</div><div class='add'>+	if (type != PPE_PKT_TYPE_IPV4_ROUTE) {</div><div class='add'>+		t-&gt;src_port = be16_to_cpu(data-&gt;src_port);</div><div class='add'>+		t-&gt;dest_port = be16_to_cpu(data-&gt;dst_port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_entry_set_ipv6_tuple(struct airoha_foe_entry *hwe,</div><div class='add'>+					       struct airoha_flow_data *data)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe-&gt;ib1);</div><div class='add'>+	u32 *src, *dest;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_ROUTE_5T:</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_6RD:</div><div class='add'>+		hwe-&gt;ipv6.src_port = be16_to_cpu(data-&gt;src_port);</div><div class='add'>+		hwe-&gt;ipv6.dest_port = be16_to_cpu(data-&gt;dst_port);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_ROUTE_3T:</div><div class='add'>+		src = hwe-&gt;ipv6.src_ip;</div><div class='add'>+		dest = hwe-&gt;ipv6.dest_ip;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ipv6_addr_be32_to_cpu(src, data-&gt;v6.src_addr.s6_addr32);</div><div class='add'>+	ipv6_addr_be32_to_cpu(dest, data-&gt;v6.dst_addr.s6_addr32);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_ppe_foe_get_entry_hash(struct airoha_ppe *ppe,</div><div class='add'>+					 struct airoha_foe_entry *hwe)</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe-&gt;ib1);</div><div class='add'>+	u32 ppe_hash_mask = airoha_ppe_get_total_num_entries(ppe) - 1;</div><div class='add'>+	u32 hash, hv1, hv2, hv3;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_ROUTE:</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_HNAPT:</div><div class='add'>+		hv1 = hwe-&gt;ipv4.orig_tuple.ports;</div><div class='add'>+		hv2 = hwe-&gt;ipv4.orig_tuple.dest_ip;</div><div class='add'>+		hv3 = hwe-&gt;ipv4.orig_tuple.src_ip;</div><div class='add'>+		break;</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_ROUTE_3T:</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_ROUTE_5T:</div><div class='add'>+		hv1 = hwe-&gt;ipv6.src_ip[3] ^ hwe-&gt;ipv6.dest_ip[3];</div><div class='add'>+		hv1 ^= hwe-&gt;ipv6.ports;</div><div class='add'>+</div><div class='add'>+		hv2 = hwe-&gt;ipv6.src_ip[2] ^ hwe-&gt;ipv6.dest_ip[2];</div><div class='add'>+		hv2 ^= hwe-&gt;ipv6.dest_ip[0];</div><div class='add'>+</div><div class='add'>+		hv3 = hwe-&gt;ipv6.src_ip[1] ^ hwe-&gt;ipv6.dest_ip[1];</div><div class='add'>+		hv3 ^= hwe-&gt;ipv6.src_ip[0];</div><div class='add'>+		break;</div><div class='add'>+	case PPE_PKT_TYPE_BRIDGE: {</div><div class='add'>+		struct airoha_foe_mac_info *l2 = &amp;hwe-&gt;bridge.l2;</div><div class='add'>+</div><div class='add'>+		hv1 = l2-&gt;common.src_mac_hi &amp; 0xffff;</div><div class='add'>+		hv1 = hv1 &lt;&lt; 16 | l2-&gt;src_mac_lo;</div><div class='add'>+</div><div class='add'>+		hv2 = l2-&gt;common.dest_mac_lo;</div><div class='add'>+		hv2 = hv2 &lt;&lt; 16;</div><div class='add'>+		hv2 = hv2 | ((l2-&gt;common.src_mac_hi &amp; 0xffff0000) &gt;&gt; 16);</div><div class='add'>+</div><div class='add'>+		hv3 = l2-&gt;common.dest_mac_hi;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_DSLITE:</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_6RD:</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return ppe_hash_mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hash = (hv1 &amp; hv2) | ((~hv1) &amp; hv3);</div><div class='add'>+	hash = (hash &gt;&gt; 24) | ((hash &amp; 0xffffff) &lt;&lt; 8);</div><div class='add'>+	hash ^= hv1 ^ hv2 ^ hv3;</div><div class='add'>+	hash ^= hash &gt;&gt; 16;</div><div class='add'>+	hash &amp;= ppe_hash_mask;</div><div class='add'>+</div><div class='add'>+	return hash;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_get_flow_stats_index(struct airoha_ppe *ppe,</div><div class='add'>+					       u32 hash, u32 *index)</div><div class='add'>+{</div><div class='add'>+	int ppe_num_stats_entries;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &lt; 0)</div><div class='add'>+		return ppe_num_stats_entries;</div><div class='add'>+</div><div class='add'>+	*index = hash &gt;= ppe_num_stats_entries ? hash - PPE_STATS_NUM_ENTRIES</div><div class='add'>+					       : hash;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_flow_stat_entry_reset(struct airoha_ppe *ppe,</div><div class='add'>+						 struct airoha_npu *npu,</div><div class='add'>+						 int index)</div><div class='add'>+{</div><div class='add'>+	memset_io(&amp;npu-&gt;stats[index], 0, sizeof(*npu-&gt;stats));</div><div class='add'>+	memset(&amp;ppe-&gt;foe_stats[index], 0, sizeof(*ppe-&gt;foe_stats));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_flow_stats_reset(struct airoha_ppe *ppe,</div><div class='add'>+					    struct airoha_npu *npu)</div><div class='add'>+{</div><div class='add'>+	int i, ppe_num_stats_entries;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ppe_num_stats_entries; i++)</div><div class='add'>+		airoha_ppe_foe_flow_stat_entry_reset(ppe, npu, i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_flow_stats_update(struct airoha_ppe *ppe,</div><div class='add'>+					     struct airoha_npu *npu,</div><div class='add'>+					     struct airoha_foe_entry *hwe,</div><div class='add'>+					     u32 hash)</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe-&gt;ib1);</div><div class='add'>+	u32 index, pse_port, val, *data, *ib2, *meter;</div><div class='add'>+	int ppe_num_stats_entries;</div><div class='add'>+	u8 nbq;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (airoha_ppe_foe_get_flow_stats_index(ppe, hash, &amp;index))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= ppe_num_stats_entries)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (type == PPE_PKT_TYPE_BRIDGE) {</div><div class='add'>+		data = &amp;hwe-&gt;bridge.data;</div><div class='add'>+		ib2 = &amp;hwe-&gt;bridge.ib2;</div><div class='add'>+		meter = &amp;hwe-&gt;bridge.l2.meter;</div><div class='add'>+	} else if (type &gt;= PPE_PKT_TYPE_IPV6_ROUTE_3T) {</div><div class='add'>+		data = &amp;hwe-&gt;ipv6.data;</div><div class='add'>+		ib2 = &amp;hwe-&gt;ipv6.ib2;</div><div class='add'>+		meter = &amp;hwe-&gt;ipv6.meter;</div><div class='add'>+	} else {</div><div class='add'>+		data = &amp;hwe-&gt;ipv4.data;</div><div class='add'>+		ib2 = &amp;hwe-&gt;ipv4.ib2;</div><div class='add'>+		meter = &amp;hwe-&gt;ipv4.l2.meter;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pse_port = FIELD_GET(AIROHA_FOE_IB2_PSE_PORT, *ib2);</div><div class='add'>+	if (pse_port == FE_PSE_PORT_CDM4)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	airoha_ppe_foe_flow_stat_entry_reset(ppe, npu, index);</div><div class='add'>+</div><div class='add'>+	val = FIELD_GET(AIROHA_FOE_CHANNEL | AIROHA_FOE_QID, *data);</div><div class='add'>+	*data = (*data &amp; ~AIROHA_FOE_ACTDP) |</div><div class='add'>+		FIELD_PREP(AIROHA_FOE_ACTDP, val);</div><div class='add'>+</div><div class='add'>+	val = *ib2 &amp; (AIROHA_FOE_IB2_NBQ | AIROHA_FOE_IB2_PSE_PORT |</div><div class='add'>+		      AIROHA_FOE_IB2_PSE_QOS | AIROHA_FOE_IB2_FAST_PATH);</div><div class='add'>+	*meter |= FIELD_PREP(AIROHA_FOE_TUNNEL_MTU, val);</div><div class='add'>+</div><div class='add'>+	nbq = pse_port == 1 ? 6 : 5;</div><div class='add'>+	*ib2 &amp;= ~(AIROHA_FOE_IB2_NBQ | AIROHA_FOE_IB2_PSE_PORT |</div><div class='add'>+		  AIROHA_FOE_IB2_PSE_QOS);</div><div class='add'>+	*ib2 |= FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT, 6) |</div><div class='add'>+		FIELD_PREP(AIROHA_FOE_IB2_NBQ, nbq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct airoha_foe_entry *</div><div class='add'>+airoha_ppe_foe_get_entry_locked(struct airoha_ppe *ppe, u32 hash)</div><div class='add'>+{</div><div class='add'>+	u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	if (hash &lt; sram_num_entries) {</div><div class='add'>+		u32 *hwe = ppe-&gt;foe + hash * sizeof(struct airoha_foe_entry);</div><div class='add'>+		bool ppe2 = hash &gt;= PPE_SRAM_NUM_ENTRIES;</div><div class='add'>+		struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+		u32 val;</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		airoha_fe_wr(ppe-&gt;eth, REG_PPE_RAM_CTRL(ppe2),</div><div class='add'>+			     FIELD_PREP(PPE_SRAM_CTRL_ENTRY_MASK, hash) |</div><div class='add'>+			     PPE_SRAM_CTRL_REQ_MASK);</div><div class='add'>+		if (read_poll_timeout_atomic(airoha_fe_rr, val,</div><div class='add'>+					     val &amp; PPE_SRAM_CTRL_ACK_MASK,</div><div class='add'>+					     10, 100, false, eth,</div><div class='add'>+					     REG_PPE_RAM_CTRL(ppe2)))</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; sizeof(struct airoha_foe_entry) / sizeof(*hwe);</div><div class='add'>+		     i++)</div><div class='add'>+			hwe[i] = airoha_fe_rr(eth,</div><div class='add'>+					      REG_PPE_RAM_ENTRY(ppe2, i));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ppe-&gt;foe + hash * sizeof(struct airoha_foe_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct airoha_foe_entry *airoha_ppe_foe_get_entry(struct airoha_ppe *ppe,</div><div class='add'>+						  u32 hash)</div><div class='add'>+{</div><div class='add'>+	struct airoha_foe_entry *hwe;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ppe_lock);</div><div class='add'>+	hwe = airoha_ppe_foe_get_entry_locked(ppe, hash);</div><div class='add'>+	spin_unlock_bh(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	return hwe;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool airoha_ppe_foe_compare_entry(struct airoha_flow_table_entry *e,</div><div class='add'>+					 struct airoha_foe_entry *hwe)</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, e-&gt;data.ib1);</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	if ((hwe-&gt;ib1 ^ e-&gt;data.ib1) &amp; AIROHA_FOE_IB1_BIND_UDP)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (type &gt; PPE_PKT_TYPE_IPV4_DSLITE)</div><div class='add'>+		len = offsetof(struct airoha_foe_entry, ipv6.data);</div><div class='add'>+	else</div><div class='add'>+		len = offsetof(struct airoha_foe_entry, ipv4.ib2);</div><div class='add'>+</div><div class='add'>+	return !memcmp(&amp;e-&gt;data.d, &amp;hwe-&gt;d, len - sizeof(hwe-&gt;ib1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_commit_sram_entry(struct airoha_ppe *ppe, u32 hash)</div><div class='add'>+{</div><div class='add'>+	struct airoha_foe_entry *hwe = ppe-&gt;foe + hash * sizeof(*hwe);</div><div class='add'>+	bool ppe2 = hash &gt;= PPE_SRAM_NUM_ENTRIES;</div><div class='add'>+	u32 *ptr = (u32 *)hwe, val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sizeof(*hwe) / sizeof(*ptr); i++)</div><div class='add'>+		airoha_fe_wr(ppe-&gt;eth, REG_PPE_RAM_ENTRY(ppe2, i), ptr[i]);</div><div class='add'>+</div><div class='add'>+	wmb();</div><div class='add'>+	airoha_fe_wr(ppe-&gt;eth, REG_PPE_RAM_CTRL(ppe2),</div><div class='add'>+		     FIELD_PREP(PPE_SRAM_CTRL_ENTRY_MASK, hash) |</div><div class='add'>+		     PPE_SRAM_CTRL_WR_MASK | PPE_SRAM_CTRL_REQ_MASK);</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout_atomic(airoha_fe_rr, val,</div><div class='add'>+					val &amp; PPE_SRAM_CTRL_ACK_MASK,</div><div class='add'>+					10, 100, false, ppe-&gt;eth,</div><div class='add'>+					REG_PPE_RAM_CTRL(ppe2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_commit_entry(struct airoha_ppe *ppe,</div><div class='add'>+				       struct airoha_foe_entry *e,</div><div class='add'>+				       u32 hash, bool rx_wlan)</div><div class='add'>+{</div><div class='add'>+	u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);</div><div class='add'>+	struct airoha_foe_entry *hwe = ppe-&gt;foe + hash * sizeof(*hwe);</div><div class='add'>+	u32 ts = airoha_ppe_get_timestamp(ppe);</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;hwe-&gt;d, &amp;e-&gt;d, sizeof(*hwe) - sizeof(hwe-&gt;ib1));</div><div class='add'>+	wmb();</div><div class='add'>+</div><div class='add'>+	e-&gt;ib1 &amp;= ~AIROHA_FOE_IB1_BIND_TIMESTAMP;</div><div class='add'>+	e-&gt;ib1 |= FIELD_PREP(AIROHA_FOE_IB1_BIND_TIMESTAMP, ts);</div><div class='add'>+	hwe-&gt;ib1 = e-&gt;ib1;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+</div><div class='add'>+	npu = rcu_dereference(eth-&gt;npu);</div><div class='add'>+	if (!npu) {</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!rx_wlan)</div><div class='add'>+		airoha_ppe_foe_flow_stats_update(ppe, npu, hwe, hash);</div><div class='add'>+</div><div class='add'>+	if (hash &lt; sram_num_entries)</div><div class='add'>+		err = airoha_ppe_foe_commit_sram_entry(ppe, hash);</div><div class='add'>+unlock:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_remove_flow(struct airoha_ppe *ppe,</div><div class='add'>+				       struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	hlist_del_init(&amp;e-&gt;list);</div><div class='add'>+	if (e-&gt;hash != 0xffff) {</div><div class='add'>+		e-&gt;data.ib1 &amp;= ~AIROHA_FOE_IB1_BIND_STATE;</div><div class='add'>+		e-&gt;data.ib1 |= FIELD_PREP(AIROHA_FOE_IB1_BIND_STATE,</div><div class='add'>+					  AIROHA_FOE_STATE_INVALID);</div><div class='add'>+		airoha_ppe_foe_commit_entry(ppe, &amp;e-&gt;data, e-&gt;hash, false);</div><div class='add'>+		e-&gt;hash = 0xffff;</div><div class='add'>+	}</div><div class='add'>+	if (e-&gt;type == FLOW_TYPE_L2_SUBFLOW) {</div><div class='add'>+		hlist_del_init(&amp;e-&gt;l2_subflow_node);</div><div class='add'>+		kfree(e);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_remove_l2_flow(struct airoha_ppe *ppe,</div><div class='add'>+					  struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	struct hlist_head *head = &amp;e-&gt;l2_flows;</div><div class='add'>+	struct hlist_node *n;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	rhashtable_remove_fast(&amp;ppe-&gt;l2_flows, &amp;e-&gt;l2_node,</div><div class='add'>+			       airoha_l2_flow_table_params);</div><div class='add'>+	hlist_for_each_entry_safe(e, n, head, l2_subflow_node)</div><div class='add'>+		airoha_ppe_foe_remove_flow(ppe, e);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_flow_remove_entry(struct airoha_ppe *ppe,</div><div class='add'>+					     struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	if (e-&gt;type == FLOW_TYPE_L2)</div><div class='add'>+		airoha_ppe_foe_remove_l2_flow(ppe, e);</div><div class='add'>+	else</div><div class='add'>+		airoha_ppe_foe_remove_flow(ppe, e);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;ppe_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+airoha_ppe_foe_commit_subflow_entry(struct airoha_ppe *ppe,</div><div class='add'>+				    struct airoha_flow_table_entry *e,</div><div class='add'>+				    u32 hash, bool rx_wlan)</div><div class='add'>+{</div><div class='add'>+	u32 mask = AIROHA_FOE_IB1_BIND_PACKET_TYPE | AIROHA_FOE_IB1_BIND_UDP;</div><div class='add'>+	struct airoha_foe_entry *hwe_p, hwe;</div><div class='add'>+	struct airoha_flow_table_entry *f;</div><div class='add'>+	int type;</div><div class='add'>+</div><div class='add'>+	hwe_p = airoha_ppe_foe_get_entry_locked(ppe, hash);</div><div class='add'>+	if (!hwe_p)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	f = kzalloc(sizeof(*f), GFP_ATOMIC);</div><div class='add'>+	if (!f)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hlist_add_head(&amp;f-&gt;l2_subflow_node, &amp;e-&gt;l2_flows);</div><div class='add'>+	f-&gt;type = FLOW_TYPE_L2_SUBFLOW;</div><div class='add'>+	f-&gt;hash = hash;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;hwe, hwe_p, sizeof(*hwe_p));</div><div class='add'>+	hwe.ib1 = (hwe.ib1 &amp; mask) | (e-&gt;data.ib1 &amp; ~mask);</div><div class='add'>+</div><div class='add'>+	type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe.ib1);</div><div class='add'>+	if (type &gt;= PPE_PKT_TYPE_IPV6_ROUTE_3T) {</div><div class='add'>+		memcpy(&amp;hwe.ipv6.l2, &amp;e-&gt;data.bridge.l2, sizeof(hwe.ipv6.l2));</div><div class='add'>+		hwe.ipv6.ib2 = e-&gt;data.bridge.ib2;</div><div class='add'>+		/* setting smac_id to 0xf instruct the hw to keep original</div><div class='add'>+		 * source mac address</div><div class='add'>+		 */</div><div class='add'>+		hwe.ipv6.l2.src_mac_hi = FIELD_PREP(AIROHA_FOE_MAC_SMAC_ID,</div><div class='add'>+						    0xf);</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(&amp;hwe.bridge.l2, &amp;e-&gt;data.bridge.l2,</div><div class='add'>+		       sizeof(hwe.bridge.l2));</div><div class='add'>+		hwe.bridge.ib2 = e-&gt;data.bridge.ib2;</div><div class='add'>+		if (type == PPE_PKT_TYPE_IPV4_HNAPT)</div><div class='add'>+			memcpy(&amp;hwe.ipv4.new_tuple, &amp;hwe.ipv4.orig_tuple,</div><div class='add'>+			       sizeof(hwe.ipv4.new_tuple));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hwe.bridge.data = e-&gt;data.bridge.data;</div><div class='add'>+	airoha_ppe_foe_commit_entry(ppe, &amp;hwe, hash, rx_wlan);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_insert_entry(struct airoha_ppe *ppe,</div><div class='add'>+					struct sk_buff *skb,</div><div class='add'>+					u32 hash, bool rx_wlan)</div><div class='add'>+{</div><div class='add'>+	struct airoha_flow_table_entry *e;</div><div class='add'>+	struct airoha_foe_bridge br = {};</div><div class='add'>+	struct airoha_foe_entry *hwe;</div><div class='add'>+	bool commit_done = false;</div><div class='add'>+	struct hlist_node *n;</div><div class='add'>+	u32 index, state;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	hwe = airoha_ppe_foe_get_entry_locked(ppe, hash);</div><div class='add'>+	if (!hwe)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, hwe-&gt;ib1);</div><div class='add'>+	if (state == AIROHA_FOE_STATE_BIND)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	index = airoha_ppe_foe_get_entry_hash(ppe, hwe);</div><div class='add'>+	hlist_for_each_entry_safe(e, n, &amp;ppe-&gt;foe_flow[index], list) {</div><div class='add'>+		if (e-&gt;type == FLOW_TYPE_L2_SUBFLOW) {</div><div class='add'>+			state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, hwe-&gt;ib1);</div><div class='add'>+			if (state != AIROHA_FOE_STATE_BIND) {</div><div class='add'>+				e-&gt;hash = 0xffff;</div><div class='add'>+				airoha_ppe_foe_remove_flow(ppe, e);</div><div class='add'>+			}</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!airoha_ppe_foe_compare_entry(e, hwe))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		airoha_ppe_foe_commit_entry(ppe, &amp;e-&gt;data, hash, rx_wlan);</div><div class='add'>+		commit_done = true;</div><div class='add'>+		e-&gt;hash = hash;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (commit_done)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	airoha_ppe_foe_set_bridge_addrs(&amp;br, eth_hdr(skb));</div><div class='add'>+	e = rhashtable_lookup_fast(&amp;ppe-&gt;l2_flows, &amp;br,</div><div class='add'>+				   airoha_l2_flow_table_params);</div><div class='add'>+	if (e)</div><div class='add'>+		airoha_ppe_foe_commit_subflow_entry(ppe, e, hash, rx_wlan);</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_bh(&amp;ppe_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+airoha_ppe_foe_l2_flow_commit_entry(struct airoha_ppe *ppe,</div><div class='add'>+				    struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	struct airoha_flow_table_entry *prev;</div><div class='add'>+</div><div class='add'>+	e-&gt;type = FLOW_TYPE_L2;</div><div class='add'>+	prev = rhashtable_lookup_get_insert_fast(&amp;ppe-&gt;l2_flows, &amp;e-&gt;l2_node,</div><div class='add'>+						 airoha_l2_flow_table_params);</div><div class='add'>+	if (!prev)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(prev))</div><div class='add'>+		return PTR_ERR(prev);</div><div class='add'>+</div><div class='add'>+	return rhashtable_replace_fast(&amp;ppe-&gt;l2_flows, &amp;prev-&gt;l2_node,</div><div class='add'>+				       &amp;e-&gt;l2_node,</div><div class='add'>+				       airoha_l2_flow_table_params);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_flow_commit_entry(struct airoha_ppe *ppe,</div><div class='add'>+					    struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, e-&gt;data.ib1);</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	if (type == PPE_PKT_TYPE_BRIDGE)</div><div class='add'>+		return airoha_ppe_foe_l2_flow_commit_entry(ppe, e);</div><div class='add'>+</div><div class='add'>+	hash = airoha_ppe_foe_get_entry_hash(ppe, &amp;e-&gt;data);</div><div class='add'>+	e-&gt;type = FLOW_TYPE_L4;</div><div class='add'>+	e-&gt;hash = 0xffff;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ppe_lock);</div><div class='add'>+	hlist_add_head(&amp;e-&gt;list, &amp;ppe-&gt;foe_flow[hash]);</div><div class='add'>+	spin_unlock_bh(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_get_entry_idle_time(struct airoha_ppe *ppe, u32 ib1)</div><div class='add'>+{</div><div class='add'>+	u32 state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, ib1);</div><div class='add'>+	u32 ts, ts_mask, now = airoha_ppe_get_timestamp(ppe);</div><div class='add'>+	int idle;</div><div class='add'>+</div><div class='add'>+	if (state == AIROHA_FOE_STATE_BIND) {</div><div class='add'>+		ts = FIELD_GET(AIROHA_FOE_IB1_BIND_TIMESTAMP, ib1);</div><div class='add'>+		ts_mask = AIROHA_FOE_IB1_BIND_TIMESTAMP;</div><div class='add'>+	} else {</div><div class='add'>+		ts = FIELD_GET(AIROHA_FOE_IB1_UNBIND_TIMESTAMP, ib1);</div><div class='add'>+		now = FIELD_GET(AIROHA_FOE_IB1_UNBIND_TIMESTAMP, now);</div><div class='add'>+		ts_mask = AIROHA_FOE_IB1_UNBIND_TIMESTAMP;</div><div class='add'>+	}</div><div class='add'>+	idle = now - ts;</div><div class='add'>+</div><div class='add'>+	return idle &lt; 0 ? idle + ts_mask + 1 : idle;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+airoha_ppe_foe_flow_l2_entry_update(struct airoha_ppe *ppe,</div><div class='add'>+				    struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	int min_idle = airoha_ppe_get_entry_idle_time(ppe, e-&gt;data.ib1);</div><div class='add'>+	struct airoha_flow_table_entry *iter;</div><div class='add'>+	struct hlist_node *n;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(iter, n, &amp;e-&gt;l2_flows, l2_subflow_node) {</div><div class='add'>+		struct airoha_foe_entry *hwe;</div><div class='add'>+		u32 ib1, state;</div><div class='add'>+		int idle;</div><div class='add'>+</div><div class='add'>+		hwe = airoha_ppe_foe_get_entry_locked(ppe, iter-&gt;hash);</div><div class='add'>+		if (!hwe)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ib1 = READ_ONCE(hwe-&gt;ib1);</div><div class='add'>+		state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, ib1);</div><div class='add'>+		if (state != AIROHA_FOE_STATE_BIND) {</div><div class='add'>+			iter-&gt;hash = 0xffff;</div><div class='add'>+			airoha_ppe_foe_remove_flow(ppe, iter);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		idle = airoha_ppe_get_entry_idle_time(ppe, ib1);</div><div class='add'>+		if (idle &gt;= min_idle)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		min_idle = idle;</div><div class='add'>+		e-&gt;data.ib1 &amp;= ~AIROHA_FOE_IB1_BIND_TIMESTAMP;</div><div class='add'>+		e-&gt;data.ib1 |= ib1 &amp; AIROHA_FOE_IB1_BIND_TIMESTAMP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_flow_entry_update(struct airoha_ppe *ppe,</div><div class='add'>+					     struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	struct airoha_foe_entry *hwe_p, hwe = {};</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	if (e-&gt;type == FLOW_TYPE_L2) {</div><div class='add'>+		airoha_ppe_foe_flow_l2_entry_update(ppe, e);</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (e-&gt;hash == 0xffff)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	hwe_p = airoha_ppe_foe_get_entry_locked(ppe, e-&gt;hash);</div><div class='add'>+	if (!hwe_p)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;hwe, hwe_p, sizeof(*hwe_p));</div><div class='add'>+	if (!airoha_ppe_foe_compare_entry(e, &amp;hwe)) {</div><div class='add'>+		e-&gt;hash = 0xffff;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	e-&gt;data.ib1 = hwe.ib1;</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_bh(&amp;ppe_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_entry_idle_time(struct airoha_ppe *ppe,</div><div class='add'>+				      struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	airoha_ppe_foe_flow_entry_update(ppe, e);</div><div class='add'>+</div><div class='add'>+	return airoha_ppe_get_entry_idle_time(ppe, e-&gt;data.ib1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_offload_replace(struct airoha_eth *eth,</div><div class='add'>+					   struct flow_cls_offload *f)</div><div class='add'>+{</div><div class='add'>+	struct flow_rule *rule = flow_cls_offload_flow_rule(f);</div><div class='add'>+	struct airoha_flow_table_entry *e;</div><div class='add'>+	struct airoha_flow_data data = {};</div><div class='add'>+	struct net_device *odev = NULL;</div><div class='add'>+	struct flow_action_entry *act;</div><div class='add'>+	struct airoha_foe_entry hwe;</div><div class='add'>+	int err, i, offload_type;</div><div class='add'>+	u16 addr_type = 0;</div><div class='add'>+	u8 l4proto = 0;</div><div class='add'>+</div><div class='add'>+	if (rhashtable_lookup(&amp;eth-&gt;flow_table, &amp;f-&gt;cookie,</div><div class='add'>+			      airoha_flow_table_params))</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {</div><div class='add'>+		struct flow_match_control match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_control(rule, &amp;match);</div><div class='add'>+		addr_type = match.key-&gt;addr_type;</div><div class='add'>+		if (flow_rule_has_control_flags(match.mask-&gt;flags,</div><div class='add'>+						f-&gt;common.extack))</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+	} else {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {</div><div class='add'>+		struct flow_match_basic match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_basic(rule, &amp;match);</div><div class='add'>+		l4proto = match.key-&gt;ip_proto;</div><div class='add'>+	} else {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (addr_type) {</div><div class='add'>+	case 0:</div><div class='add'>+		offload_type = PPE_PKT_TYPE_BRIDGE;</div><div class='add'>+		if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {</div><div class='add'>+			struct flow_match_eth_addrs match;</div><div class='add'>+</div><div class='add'>+			flow_rule_match_eth_addrs(rule, &amp;match);</div><div class='add'>+			memcpy(data.eth.h_dest, match.key-&gt;dst, ETH_ALEN);</div><div class='add'>+			memcpy(data.eth.h_source, match.key-&gt;src, ETH_ALEN);</div><div class='add'>+		} else {</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case FLOW_DISSECTOR_KEY_IPV4_ADDRS:</div><div class='add'>+		offload_type = PPE_PKT_TYPE_IPV4_HNAPT;</div><div class='add'>+		break;</div><div class='add'>+	case FLOW_DISSECTOR_KEY_IPV6_ADDRS:</div><div class='add'>+		offload_type = PPE_PKT_TYPE_IPV6_ROUTE_5T;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow_action_for_each(i, act, &amp;rule-&gt;action) {</div><div class='add'>+		switch (act-&gt;id) {</div><div class='add'>+		case FLOW_ACTION_MANGLE:</div><div class='add'>+			if (offload_type == PPE_PKT_TYPE_BRIDGE)</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+			if (act-&gt;mangle.htype == FLOW_ACT_MANGLE_HDR_TYPE_ETH)</div><div class='add'>+				airoha_ppe_flow_mangle_eth(act, &amp;data.eth);</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_REDIRECT:</div><div class='add'>+			odev = act-&gt;dev;</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_CSUM:</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_VLAN_PUSH:</div><div class='add'>+			if (data.vlan.num == 2 ||</div><div class='add'>+			    act-&gt;vlan.proto != htons(ETH_P_8021Q))</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+			data.vlan.hdr[data.vlan.num].id = act-&gt;vlan.vid;</div><div class='add'>+			data.vlan.hdr[data.vlan.num].proto = act-&gt;vlan.proto;</div><div class='add'>+			data.vlan.num++;</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_VLAN_POP:</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_PPPOE_PUSH:</div><div class='add'>+			if (data.pppoe.num == 1 || data.vlan.num == 2)</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+			data.pppoe.sid = act-&gt;pppoe.sid;</div><div class='add'>+			data.pppoe.num++;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(data.eth.h_source) ||</div><div class='add'>+	    !is_valid_ether_addr(data.eth.h_dest))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = airoha_ppe_foe_entry_prepare(eth, &amp;hwe, odev, offload_type,</div><div class='add'>+					   &amp;data, l4proto);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {</div><div class='add'>+		struct flow_match_ports ports;</div><div class='add'>+</div><div class='add'>+		if (offload_type == PPE_PKT_TYPE_BRIDGE)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_ports(rule, &amp;ports);</div><div class='add'>+		data.src_port = ports.key-&gt;src;</div><div class='add'>+		data.dst_port = ports.key-&gt;dst;</div><div class='add'>+	} else if (offload_type != PPE_PKT_TYPE_BRIDGE) {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {</div><div class='add'>+		struct flow_match_ipv4_addrs addrs;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_ipv4_addrs(rule, &amp;addrs);</div><div class='add'>+		data.v4.src_addr = addrs.key-&gt;src;</div><div class='add'>+		data.v4.dst_addr = addrs.key-&gt;dst;</div><div class='add'>+		airoha_ppe_foe_entry_set_ipv4_tuple(&amp;hwe, &amp;data, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {</div><div class='add'>+		struct flow_match_ipv6_addrs addrs;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_ipv6_addrs(rule, &amp;addrs);</div><div class='add'>+</div><div class='add'>+		data.v6.src_addr = addrs.key-&gt;src;</div><div class='add'>+		data.v6.dst_addr = addrs.key-&gt;dst;</div><div class='add'>+		airoha_ppe_foe_entry_set_ipv6_tuple(&amp;hwe, &amp;data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow_action_for_each(i, act, &amp;rule-&gt;action) {</div><div class='add'>+		if (act-&gt;id != FLOW_ACTION_MANGLE)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (offload_type == PPE_PKT_TYPE_BRIDGE)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		switch (act-&gt;mangle.htype) {</div><div class='add'>+		case FLOW_ACT_MANGLE_HDR_TYPE_TCP:</div><div class='add'>+		case FLOW_ACT_MANGLE_HDR_TYPE_UDP:</div><div class='add'>+			err = airoha_ppe_flow_mangle_ports(act, &amp;data);</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACT_MANGLE_HDR_TYPE_IP4:</div><div class='add'>+			err = airoha_ppe_flow_mangle_ipv4(act, &amp;data);</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACT_MANGLE_HDR_TYPE_ETH:</div><div class='add'>+			/* handled earlier */</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {</div><div class='add'>+		err = airoha_ppe_foe_entry_set_ipv4_tuple(&amp;hwe, &amp;data, true);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	e = kzalloc(sizeof(*e), GFP_KERNEL);</div><div class='add'>+	if (!e)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	e-&gt;cookie = f-&gt;cookie;</div><div class='add'>+	memcpy(&amp;e-&gt;data, &amp;hwe, sizeof(e-&gt;data));</div><div class='add'>+</div><div class='add'>+	err = airoha_ppe_foe_flow_commit_entry(eth-&gt;ppe, e);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_entry;</div><div class='add'>+</div><div class='add'>+	err = rhashtable_insert_fast(&amp;eth-&gt;flow_table, &amp;e-&gt;node,</div><div class='add'>+				     airoha_flow_table_params);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto remove_foe_entry;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+remove_foe_entry:</div><div class='add'>+	airoha_ppe_foe_flow_remove_entry(eth-&gt;ppe, e);</div><div class='add'>+free_entry:</div><div class='add'>+	kfree(e);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_offload_destroy(struct airoha_eth *eth,</div><div class='add'>+					   struct flow_cls_offload *f)</div><div class='add'>+{</div><div class='add'>+	struct airoha_flow_table_entry *e;</div><div class='add'>+</div><div class='add'>+	e = rhashtable_lookup(&amp;eth-&gt;flow_table, &amp;f-&gt;cookie,</div><div class='add'>+			      airoha_flow_table_params);</div><div class='add'>+	if (!e)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	airoha_ppe_foe_flow_remove_entry(eth-&gt;ppe, e);</div><div class='add'>+	rhashtable_remove_fast(&amp;eth-&gt;flow_table, &amp;e-&gt;node,</div><div class='add'>+			       airoha_flow_table_params);</div><div class='add'>+	kfree(e);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void airoha_ppe_foe_entry_get_stats(struct airoha_ppe *ppe, u32 hash,</div><div class='add'>+				    struct airoha_foe_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+	int ppe_num_stats_entries;</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+	u32 index;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (airoha_ppe_foe_get_flow_stats_index(ppe, hash, &amp;index))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= ppe_num_stats_entries)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+</div><div class='add'>+	npu = rcu_dereference(eth-&gt;npu);</div><div class='add'>+	if (npu) {</div><div class='add'>+		u64 packets = ppe-&gt;foe_stats[index].packets;</div><div class='add'>+		u64 bytes = ppe-&gt;foe_stats[index].bytes;</div><div class='add'>+		struct airoha_foe_stats npu_stats;</div><div class='add'>+</div><div class='add'>+		memcpy_fromio(&amp;npu_stats, &amp;npu-&gt;stats[index],</div><div class='add'>+			      sizeof(*npu-&gt;stats));</div><div class='add'>+		stats-&gt;packets = packets &lt;&lt; 32 | npu_stats.packets;</div><div class='add'>+		stats-&gt;bytes = bytes &lt;&lt; 32 | npu_stats.bytes;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_offload_stats(struct airoha_eth *eth,</div><div class='add'>+					 struct flow_cls_offload *f)</div><div class='add'>+{</div><div class='add'>+	struct airoha_flow_table_entry *e;</div><div class='add'>+	u32 idle;</div><div class='add'>+</div><div class='add'>+	e = rhashtable_lookup(&amp;eth-&gt;flow_table, &amp;f-&gt;cookie,</div><div class='add'>+			      airoha_flow_table_params);</div><div class='add'>+	if (!e)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	idle = airoha_ppe_entry_idle_time(eth-&gt;ppe, e);</div><div class='add'>+	f-&gt;stats.lastused = jiffies - idle * HZ;</div><div class='add'>+</div><div class='add'>+	if (e-&gt;hash != 0xffff) {</div><div class='add'>+		struct airoha_foe_stats64 stats = {};</div><div class='add'>+</div><div class='add'>+		airoha_ppe_foe_entry_get_stats(eth-&gt;ppe, e-&gt;hash, &amp;stats);</div><div class='add'>+		f-&gt;stats.pkts += (stats.packets - e-&gt;stats.packets);</div><div class='add'>+		f-&gt;stats.bytes += (stats.bytes - e-&gt;stats.bytes);</div><div class='add'>+		e-&gt;stats = stats;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_offload_cmd(struct airoha_eth *eth,</div><div class='add'>+				       struct flow_cls_offload *f)</div><div class='add'>+{</div><div class='add'>+	switch (f-&gt;command) {</div><div class='add'>+	case FLOW_CLS_REPLACE:</div><div class='add'>+		return airoha_ppe_flow_offload_replace(eth, f);</div><div class='add'>+	case FLOW_CLS_DESTROY:</div><div class='add'>+		return airoha_ppe_flow_offload_destroy(eth, f);</div><div class='add'>+	case FLOW_CLS_STATS:</div><div class='add'>+		return airoha_ppe_flow_offload_stats(eth, f);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flush_sram_entries(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);</div><div class='add'>+	struct airoha_foe_entry *hwe = ppe-&gt;foe;</div><div class='add'>+	int i, err = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sram_num_entries; i++) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		memset(&amp;hwe[i], 0, sizeof(*hwe));</div><div class='add'>+		err = airoha_ppe_foe_commit_sram_entry(ppe, i);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct airoha_npu *airoha_ppe_npu_get(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu *npu = airoha_npu_get(eth-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(npu)) {</div><div class='add'>+		request_module("airoha-npu");</div><div class='add'>+		npu = airoha_npu_get(eth-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return npu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_offload_setup(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu *npu = airoha_ppe_npu_get(eth);</div><div class='add'>+	struct airoha_ppe *ppe = eth-&gt;ppe;</div><div class='add'>+	int err, ppe_num_stats_entries;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(npu))</div><div class='add'>+		return PTR_ERR(npu);</div><div class='add'>+</div><div class='add'>+	err = npu-&gt;ops.ppe_init(npu);</div><div class='add'>+	if (err)</div><div class='add'>+		goto error_npu_put;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &gt; 0) {</div><div class='add'>+		err = npu-&gt;ops.ppe_init_stats(npu, ppe-&gt;foe_stats_dma,</div><div class='add'>+					      ppe_num_stats_entries);</div><div class='add'>+		if (err)</div><div class='add'>+			goto error_npu_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_ppe_hw_init(ppe);</div><div class='add'>+	airoha_ppe_foe_flow_stats_reset(ppe, npu);</div><div class='add'>+</div><div class='add'>+	rcu_assign_pointer(eth-&gt;npu, npu);</div><div class='add'>+	synchronize_rcu();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_npu_put:</div><div class='add'>+	airoha_npu_put(npu);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int airoha_ppe_setup_tc_block_cb(struct airoha_ppe_dev *dev, void *type_data)</div><div class='add'>+{</div><div class='add'>+	struct airoha_ppe *ppe = dev-&gt;priv;</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;flow_offload_mutex);</div><div class='add'>+</div><div class='add'>+	if (!eth-&gt;npu)</div><div class='add'>+		err = airoha_ppe_offload_setup(eth);</div><div class='add'>+	if (!err)</div><div class='add'>+		err = airoha_ppe_flow_offload_cmd(eth, type_data);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;flow_offload_mutex);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void airoha_ppe_check_skb(struct airoha_ppe_dev *dev, struct sk_buff *skb,</div><div class='add'>+			  u16 hash, bool rx_wlan)</div><div class='add'>+{</div><div class='add'>+	struct airoha_ppe *ppe = dev-&gt;priv;</div><div class='add'>+	u32 ppe_hash_mask = airoha_ppe_get_total_num_entries(ppe) - 1;</div><div class='add'>+	u16 now, diff;</div><div class='add'>+</div><div class='add'>+	if (hash &gt; ppe_hash_mask)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	now = (u16)jiffies;</div><div class='add'>+	diff = now - ppe-&gt;foe_check_time[hash];</div><div class='add'>+	if (diff &lt; HZ / 10)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ppe-&gt;foe_check_time[hash] = now;</div><div class='add'>+	airoha_ppe_foe_insert_entry(ppe, skb, hash, rx_wlan);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void airoha_ppe_init_upd_mem(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+	struct net_device *dev = port-&gt;dev;</div><div class='add'>+	const u8 *addr = dev-&gt;dev_addr;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = (addr[2] &lt;&lt; 24) | (addr[3] &lt;&lt; 16) | (addr[4] &lt;&lt; 8) | addr[5];</div><div class='add'>+	airoha_fe_wr(eth, REG_UPDMEM_DATA(0), val);</div><div class='add'>+	airoha_fe_wr(eth, REG_UPDMEM_CTRL(0),</div><div class='add'>+		     FIELD_PREP(PPE_UPDMEM_ADDR_MASK, port-&gt;id) |</div><div class='add'>+		     PPE_UPDMEM_WR_MASK | PPE_UPDMEM_REQ_MASK);</div><div class='add'>+</div><div class='add'>+	val = (addr[0] &lt;&lt; 8) | addr[1];</div><div class='add'>+	airoha_fe_wr(eth, REG_UPDMEM_DATA(0), val);</div><div class='add'>+	airoha_fe_wr(eth, REG_UPDMEM_CTRL(0),</div><div class='add'>+		     FIELD_PREP(PPE_UPDMEM_ADDR_MASK, port-&gt;id) |</div><div class='add'>+		     FIELD_PREP(PPE_UPDMEM_OFFSET_MASK, 1) |</div><div class='add'>+		     PPE_UPDMEM_WR_MASK | PPE_UPDMEM_REQ_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct airoha_ppe_dev *airoha_ppe_get_dev(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct airoha_eth *eth;</div><div class='add'>+</div><div class='add'>+	np = of_parse_phandle(dev-&gt;of_node, "airoha,eth", 0);</div><div class='add'>+	if (!np)</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+</div><div class='add'>+	pdev = of_find_device_by_node(np);</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		dev_err(dev, "cannot find device node %s\n", np-&gt;name);</div><div class='add'>+		of_node_put(np);</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+	of_node_put(np);</div><div class='add'>+</div><div class='add'>+	if (!try_module_get(THIS_MODULE)) {</div><div class='add'>+		dev_err(dev, "failed to get the device driver module\n");</div><div class='add'>+		goto error_pdev_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	eth = platform_get_drvdata(pdev);</div><div class='add'>+	if (!eth)</div><div class='add'>+		goto error_module_put;</div><div class='add'>+</div><div class='add'>+	if (!device_link_add(dev, &amp;pdev-&gt;dev, DL_FLAG_AUTOREMOVE_SUPPLIER)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"failed to create device link to consumer %s\n",</div><div class='add'>+			dev_name(dev));</div><div class='add'>+		goto error_module_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return &amp;eth-&gt;ppe-&gt;dev;</div><div class='add'>+</div><div class='add'>+error_module_put:</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+error_pdev_put:</div><div class='add'>+	platform_device_put(pdev);</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(-ENODEV);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(airoha_ppe_get_dev);</div><div class='add'>+</div><div class='add'>+void airoha_ppe_put_dev(struct airoha_ppe_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct airoha_ppe *ppe = dev-&gt;priv;</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+	put_device(eth-&gt;dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(airoha_ppe_put_dev);</div><div class='add'>+</div><div class='add'>+int airoha_ppe_init(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	int foe_size, err, ppe_num_stats_entries;</div><div class='add'>+	u32 ppe_num_entries;</div><div class='add'>+	struct airoha_ppe *ppe;</div><div class='add'>+</div><div class='add'>+	ppe = devm_kzalloc(eth-&gt;dev, sizeof(*ppe), GFP_KERNEL);</div><div class='add'>+	if (!ppe)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe-&gt;dev.ops.setup_tc_block_cb = airoha_ppe_setup_tc_block_cb;</div><div class='add'>+	ppe-&gt;dev.ops.check_skb = airoha_ppe_check_skb;</div><div class='add'>+	ppe-&gt;dev.priv = ppe;</div><div class='add'>+	ppe-&gt;eth = eth;</div><div class='add'>+	eth-&gt;ppe = ppe;</div><div class='add'>+</div><div class='add'>+	ppe_num_entries = airoha_ppe_get_total_num_entries(ppe);</div><div class='add'>+	foe_size = ppe_num_entries * sizeof(struct airoha_foe_entry);</div><div class='add'>+	ppe-&gt;foe = dmam_alloc_coherent(eth-&gt;dev, foe_size, &amp;ppe-&gt;foe_dma,</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+	if (!ppe-&gt;foe)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe-&gt;foe_flow = devm_kzalloc(eth-&gt;dev,</div><div class='add'>+				     ppe_num_entries * sizeof(*ppe-&gt;foe_flow),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+	if (!ppe-&gt;foe_flow)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &gt; 0) {</div><div class='add'>+		foe_size = ppe_num_stats_entries * sizeof(*ppe-&gt;foe_stats);</div><div class='add'>+		ppe-&gt;foe_stats = dmam_alloc_coherent(eth-&gt;dev, foe_size,</div><div class='add'>+						     &amp;ppe-&gt;foe_stats_dma,</div><div class='add'>+						     GFP_KERNEL);</div><div class='add'>+		if (!ppe-&gt;foe_stats)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ppe-&gt;foe_check_time = devm_kzalloc(eth-&gt;dev, ppe_num_entries,</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+	if (!ppe-&gt;foe_check_time)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = airoha_ppe_flush_sram_entries(ppe);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = rhashtable_init(&amp;eth-&gt;flow_table, &amp;airoha_flow_table_params);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = rhashtable_init(&amp;ppe-&gt;l2_flows, &amp;airoha_l2_flow_table_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto error_flow_table_destroy;</div><div class='add'>+</div><div class='add'>+	err = airoha_ppe_debugfs_init(ppe);</div><div class='add'>+	if (err)</div><div class='add'>+		goto error_l2_flow_table_destroy;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_l2_flow_table_destroy:</div><div class='add'>+	rhashtable_destroy(&amp;ppe-&gt;l2_flows);</div><div class='add'>+error_flow_table_destroy:</div><div class='add'>+	rhashtable_destroy(&amp;eth-&gt;flow_table);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void airoha_ppe_deinit(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	npu = rcu_dereference(eth-&gt;npu);</div><div class='add'>+	if (npu) {</div><div class='add'>+		npu-&gt;ops.ppe_deinit(npu);</div><div class='add'>+		airoha_npu_put(npu);</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	rhashtable_destroy(&amp;eth-&gt;ppe-&gt;l2_flows);</div><div class='add'>+	rhashtable_destroy(&amp;eth-&gt;flow_table);</div><div class='add'>+	debugfs_remove(eth-&gt;ppe-&gt;debugfs_dir);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c b/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c<br/>new file mode 100644<br/>index 000000000000..0112c41150bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_ppe_debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,187 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "airoha_eth.h"</div><div class='add'>+</div><div class='add'>+static void airoha_debugfs_ppe_print_tuple(struct seq_file *m,</div><div class='add'>+					   void *src_addr, void *dest_addr,</div><div class='add'>+					   u16 *src_port, u16 *dest_port,</div><div class='add'>+					   bool ipv6)</div><div class='add'>+{</div><div class='add'>+	__be32 n_addr[IPV6_ADDR_WORDS];</div><div class='add'>+</div><div class='add'>+	if (ipv6) {</div><div class='add'>+		ipv6_addr_cpu_to_be32(n_addr, src_addr);</div><div class='add'>+		seq_printf(m, "%pI6", n_addr);</div><div class='add'>+	} else {</div><div class='add'>+		seq_printf(m, "%pI4h", src_addr);</div><div class='add'>+	}</div><div class='add'>+	if (src_port)</div><div class='add'>+		seq_printf(m, ":%d", *src_port);</div><div class='add'>+</div><div class='add'>+	seq_puts(m, "-&gt;");</div><div class='add'>+</div><div class='add'>+	if (ipv6) {</div><div class='add'>+		ipv6_addr_cpu_to_be32(n_addr, dest_addr);</div><div class='add'>+		seq_printf(m, "%pI6", n_addr);</div><div class='add'>+	} else {</div><div class='add'>+		seq_printf(m, "%pI4h", dest_addr);</div><div class='add'>+	}</div><div class='add'>+	if (dest_port)</div><div class='add'>+		seq_printf(m, ":%d", *dest_port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_debugfs_foe_show(struct seq_file *m, void *private,</div><div class='add'>+				       bool bind)</div><div class='add'>+{</div><div class='add'>+	static const char *const ppe_type_str[] = {</div><div class='add'>+		[PPE_PKT_TYPE_IPV4_HNAPT] = "IPv4 5T",</div><div class='add'>+		[PPE_PKT_TYPE_IPV4_ROUTE] = "IPv4 3T",</div><div class='add'>+		[PPE_PKT_TYPE_BRIDGE] = "L2B",</div><div class='add'>+		[PPE_PKT_TYPE_IPV4_DSLITE] = "DS-LITE",</div><div class='add'>+		[PPE_PKT_TYPE_IPV6_ROUTE_3T] = "IPv6 3T",</div><div class='add'>+		[PPE_PKT_TYPE_IPV6_ROUTE_5T] = "IPv6 5T",</div><div class='add'>+		[PPE_PKT_TYPE_IPV6_6RD] = "6RD",</div><div class='add'>+	};</div><div class='add'>+	static const char *const ppe_state_str[] = {</div><div class='add'>+		[AIROHA_FOE_STATE_INVALID] = "INV",</div><div class='add'>+		[AIROHA_FOE_STATE_UNBIND] = "UNB",</div><div class='add'>+		[AIROHA_FOE_STATE_BIND] = "BND",</div><div class='add'>+		[AIROHA_FOE_STATE_FIN] = "FIN",</div><div class='add'>+	};</div><div class='add'>+	struct airoha_ppe *ppe = m-&gt;private;</div><div class='add'>+	u32 ppe_num_entries = airoha_ppe_get_total_num_entries(ppe);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ppe_num_entries; i++) {</div><div class='add'>+		const char *state_str, *type_str = "UNKNOWN";</div><div class='add'>+		void *src_addr = NULL, *dest_addr = NULL;</div><div class='add'>+		u16 *src_port = NULL, *dest_port = NULL;</div><div class='add'>+		struct airoha_foe_mac_info_common *l2;</div><div class='add'>+		unsigned char h_source[ETH_ALEN] = {};</div><div class='add'>+		struct airoha_foe_stats64 stats = {};</div><div class='add'>+		unsigned char h_dest[ETH_ALEN];</div><div class='add'>+		struct airoha_foe_entry *hwe;</div><div class='add'>+		u32 type, state, ib2, data;</div><div class='add'>+		bool ipv6 = false;</div><div class='add'>+</div><div class='add'>+		hwe = airoha_ppe_foe_get_entry(ppe, i);</div><div class='add'>+		if (!hwe)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, hwe-&gt;ib1);</div><div class='add'>+		if (!state)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (bind &amp;&amp; state != AIROHA_FOE_STATE_BIND)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		state_str = ppe_state_str[state % ARRAY_SIZE(ppe_state_str)];</div><div class='add'>+		type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe-&gt;ib1);</div><div class='add'>+		if (type &lt; ARRAY_SIZE(ppe_type_str) &amp;&amp; ppe_type_str[type])</div><div class='add'>+			type_str = ppe_type_str[type];</div><div class='add'>+</div><div class='add'>+		seq_printf(m, "%05x %s %7s", i, state_str, type_str);</div><div class='add'>+</div><div class='add'>+		switch (type) {</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_HNAPT:</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_DSLITE:</div><div class='add'>+			src_port = &amp;hwe-&gt;ipv4.orig_tuple.src_port;</div><div class='add'>+			dest_port = &amp;hwe-&gt;ipv4.orig_tuple.dest_port;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_ROUTE:</div><div class='add'>+			src_addr = &amp;hwe-&gt;ipv4.orig_tuple.src_ip;</div><div class='add'>+			dest_addr = &amp;hwe-&gt;ipv4.orig_tuple.dest_ip;</div><div class='add'>+			break;</div><div class='add'>+		case PPE_PKT_TYPE_IPV6_ROUTE_5T:</div><div class='add'>+			src_port = &amp;hwe-&gt;ipv6.src_port;</div><div class='add'>+			dest_port = &amp;hwe-&gt;ipv6.dest_port;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case PPE_PKT_TYPE_IPV6_ROUTE_3T:</div><div class='add'>+		case PPE_PKT_TYPE_IPV6_6RD:</div><div class='add'>+			src_addr = &amp;hwe-&gt;ipv6.src_ip;</div><div class='add'>+			dest_addr = &amp;hwe-&gt;ipv6.dest_ip;</div><div class='add'>+			ipv6 = true;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (src_addr &amp;&amp; dest_addr) {</div><div class='add'>+			seq_puts(m, " orig=");</div><div class='add'>+			airoha_debugfs_ppe_print_tuple(m, src_addr, dest_addr,</div><div class='add'>+						       src_port, dest_port, ipv6);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (type) {</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_HNAPT:</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_DSLITE:</div><div class='add'>+			src_port = &amp;hwe-&gt;ipv4.new_tuple.src_port;</div><div class='add'>+			dest_port = &amp;hwe-&gt;ipv4.new_tuple.dest_port;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_ROUTE:</div><div class='add'>+			src_addr = &amp;hwe-&gt;ipv4.new_tuple.src_ip;</div><div class='add'>+			dest_addr = &amp;hwe-&gt;ipv4.new_tuple.dest_ip;</div><div class='add'>+			seq_puts(m, " new=");</div><div class='add'>+			airoha_debugfs_ppe_print_tuple(m, src_addr, dest_addr,</div><div class='add'>+						       src_port, dest_port,</div><div class='add'>+						       ipv6);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (type &gt;= PPE_PKT_TYPE_IPV6_ROUTE_3T) {</div><div class='add'>+			data = hwe-&gt;ipv6.data;</div><div class='add'>+			ib2 = hwe-&gt;ipv6.ib2;</div><div class='add'>+			l2 = &amp;hwe-&gt;ipv6.l2;</div><div class='add'>+		} else {</div><div class='add'>+			data = hwe-&gt;ipv4.data;</div><div class='add'>+			ib2 = hwe-&gt;ipv4.ib2;</div><div class='add'>+			l2 = &amp;hwe-&gt;ipv4.l2.common;</div><div class='add'>+			*((__be16 *)&amp;h_source[4]) =</div><div class='add'>+				cpu_to_be16(hwe-&gt;ipv4.l2.src_mac_lo);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		airoha_ppe_foe_entry_get_stats(ppe, i, &amp;stats);</div><div class='add'>+</div><div class='add'>+		*((__be32 *)h_dest) = cpu_to_be32(l2-&gt;dest_mac_hi);</div><div class='add'>+		*((__be16 *)&amp;h_dest[4]) = cpu_to_be16(l2-&gt;dest_mac_lo);</div><div class='add'>+		*((__be32 *)h_source) = cpu_to_be32(l2-&gt;src_mac_hi);</div><div class='add'>+</div><div class='add'>+		seq_printf(m, " eth=%pM-&gt;%pM etype=%04x data=%08x"</div><div class='add'>+			      " vlan=%d,%d ib1=%08x ib2=%08x"</div><div class='add'>+			      " packets=%llu bytes=%llu\n",</div><div class='add'>+			   h_source, h_dest, l2-&gt;etype, data,</div><div class='add'>+			   l2-&gt;vlan1, l2-&gt;vlan2, hwe-&gt;ib1, ib2,</div><div class='add'>+			   stats.packets, stats.bytes);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_debugfs_foe_all_show(struct seq_file *m, void *private)</div><div class='add'>+{</div><div class='add'>+	return airoha_ppe_debugfs_foe_show(m, private, false);</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(airoha_ppe_debugfs_foe_all);</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_debugfs_foe_bind_show(struct seq_file *m, void *private)</div><div class='add'>+{</div><div class='add'>+	return airoha_ppe_debugfs_foe_show(m, private, true);</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(airoha_ppe_debugfs_foe_bind);</div><div class='add'>+</div><div class='add'>+int airoha_ppe_debugfs_init(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	ppe-&gt;debugfs_dir = debugfs_create_dir("ppe", NULL);</div><div class='add'>+	debugfs_create_file("entries", 0444, ppe-&gt;debugfs_dir, ppe,</div><div class='add'>+			    &amp;airoha_ppe_debugfs_foe_all_fops);</div><div class='add'>+	debugfs_create_file("bind", 0444, ppe-&gt;debugfs_dir, ppe,</div><div class='add'>+			    &amp;airoha_ppe_debugfs_foe_bind_fops);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_regs.h b/drivers/net/ethernet/airoha/airoha_regs.h<br/>new file mode 100644<br/>index 000000000000..ed4e3407f4a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_regs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_regs.h</a></div><div class='hunk'>@@ -0,0 +1,923 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AIROHA_REGS_H</div><div class='add'>+#define AIROHA_REGS_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/* FE */</div><div class='add'>+#define PSE_BASE			0x0100</div><div class='add'>+#define CSR_IFC_BASE			0x0200</div><div class='add'>+#define CDM1_BASE			0x0400</div><div class='add'>+#define GDM1_BASE			0x0500</div><div class='add'>+#define PPE1_BASE			0x0c00</div><div class='add'>+#define PPE2_BASE			0x1c00</div><div class='add'>+</div><div class='add'>+#define CDM2_BASE			0x1400</div><div class='add'>+#define GDM2_BASE			0x1500</div><div class='add'>+</div><div class='add'>+#define GDM3_BASE			0x1100</div><div class='add'>+#define GDM4_BASE			0x2500</div><div class='add'>+</div><div class='add'>+#define CDM_BASE(_n)			\</div><div class='add'>+	((_n) == 2 ? CDM2_BASE : CDM1_BASE)</div><div class='add'>+#define GDM_BASE(_n)			\</div><div class='add'>+	((_n) == 4 ? GDM4_BASE :	\</div><div class='add'>+	 (_n) == 3 ? GDM3_BASE :	\</div><div class='add'>+	 (_n) == 2 ? GDM2_BASE : GDM1_BASE)</div><div class='add'>+</div><div class='add'>+#define REG_FE_DMA_GLO_CFG		0x0000</div><div class='add'>+#define FE_DMA_GLO_L2_SPACE_MASK	GENMASK(7, 4)</div><div class='add'>+#define FE_DMA_GLO_PG_SZ_MASK		BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_FE_RST_GLO_CFG		0x0004</div><div class='add'>+#define FE_RST_GDM4_MBI_ARB_MASK	BIT(3)</div><div class='add'>+#define FE_RST_GDM3_MBI_ARB_MASK	BIT(2)</div><div class='add'>+#define FE_RST_CORE_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_FOE_TS			0x0010</div><div class='add'>+</div><div class='add'>+#define REG_FE_WAN_PORT			0x0024</div><div class='add'>+#define WAN1_EN_MASK			BIT(16)</div><div class='add'>+#define WAN1_MASK			GENMASK(12, 8)</div><div class='add'>+#define WAN0_MASK			GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_WAN_MAC_H		0x0030</div><div class='add'>+#define REG_FE_LAN_MAC_H		0x0040</div><div class='add'>+</div><div class='add'>+#define REG_FE_MAC_LMIN(_n)		((_n) + 0x04)</div><div class='add'>+#define REG_FE_MAC_LMAX(_n)		((_n) + 0x08)</div><div class='add'>+</div><div class='add'>+#define REG_FE_CDM1_OQ_MAP0		0x0050</div><div class='add'>+#define REG_FE_CDM1_OQ_MAP1		0x0054</div><div class='add'>+#define REG_FE_CDM1_OQ_MAP2		0x0058</div><div class='add'>+#define REG_FE_CDM1_OQ_MAP3		0x005c</div><div class='add'>+</div><div class='add'>+#define REG_FE_PCE_CFG			0x0070</div><div class='add'>+#define PCE_DPI_EN_MASK			BIT(2)</div><div class='add'>+#define PCE_KA_EN_MASK			BIT(1)</div><div class='add'>+#define PCE_MC_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_PSE_QUEUE_CFG_WR		0x0080</div><div class='add'>+#define PSE_CFG_PORT_ID_MASK		GENMASK(27, 24)</div><div class='add'>+#define PSE_CFG_QUEUE_ID_MASK		GENMASK(20, 16)</div><div class='add'>+#define PSE_CFG_WR_EN_MASK		BIT(8)</div><div class='add'>+#define PSE_CFG_OQRSV_SEL_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_PSE_QUEUE_CFG_VAL	0x0084</div><div class='add'>+#define PSE_CFG_OQ_RSV_MASK		GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define PSE_FQ_CFG			0x008c</div><div class='add'>+#define PSE_FQ_LIMIT_MASK		GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_PSE_BUF_SET		0x0090</div><div class='add'>+#define PSE_SHARE_USED_LTHD_MASK	GENMASK(31, 16)</div><div class='add'>+#define PSE_ALLRSV_MASK			GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PSE_SHARE_USED_THD		0x0094</div><div class='add'>+#define PSE_SHARE_USED_MTHD_MASK	GENMASK(31, 16)</div><div class='add'>+#define PSE_SHARE_USED_HTHD_MASK	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_MISC_CFG		0x0148</div><div class='add'>+#define GDM2_RDM_ACK_WAIT_PREF_MASK	BIT(9)</div><div class='add'>+#define GDM2_CHN_VLD_MODE_MASK		BIT(5)</div><div class='add'>+</div><div class='add'>+#define REG_FE_CSR_IFC_CFG		CSR_IFC_BASE</div><div class='add'>+#define FE_IFC_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_VIP_PORT_EN		0x01f0</div><div class='add'>+#define REG_FE_IFC_PORT_EN		0x01f4</div><div class='add'>+</div><div class='add'>+#define REG_PSE_IQ_REV1			(PSE_BASE + 0x08)</div><div class='add'>+#define PSE_IQ_RES1_P2_MASK		GENMASK(23, 16)</div><div class='add'>+</div><div class='add'>+#define REG_PSE_IQ_REV2			(PSE_BASE + 0x0c)</div><div class='add'>+#define PSE_IQ_RES2_P5_MASK		GENMASK(15, 8)</div><div class='add'>+#define PSE_IQ_RES2_P4_MASK		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_VIP_EN(_n)		(0x0300 + ((_n) &lt;&lt; 3))</div><div class='add'>+#define PATN_FCPU_EN_MASK		BIT(7)</div><div class='add'>+#define PATN_SWP_EN_MASK		BIT(6)</div><div class='add'>+#define PATN_DP_EN_MASK			BIT(5)</div><div class='add'>+#define PATN_SP_EN_MASK			BIT(4)</div><div class='add'>+#define PATN_TYPE_MASK			GENMASK(3, 1)</div><div class='add'>+#define PATN_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_VIP_PATN(_n)		(0x0304 + ((_n) &lt;&lt; 3))</div><div class='add'>+#define PATN_DP_MASK			GENMASK(31, 16)</div><div class='add'>+#define PATN_SP_MASK			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_CDM_VLAN_CTRL(_n)		CDM_BASE(_n)</div><div class='add'>+#define CDM_VLAN_MASK			GENMASK(31, 16)</div><div class='add'>+</div><div class='add'>+#define REG_CDM_FWD_CFG(_n)		(CDM_BASE(_n) + 0x08)</div><div class='add'>+#define CDM_OAM_QSEL_MASK		GENMASK(31, 27)</div><div class='add'>+#define CDM_VIP_QSEL_MASK		GENMASK(24, 20)</div><div class='add'>+</div><div class='add'>+#define REG_CDM_CRSN_QSEL(_n, _m)	(CDM_BASE(_n) + 0x10 + ((_m) &lt;&lt; 2))</div><div class='add'>+#define CDM_CRSN_QSEL_REASON_MASK(_n)	\</div><div class='add'>+	GENMASK(4 + (((_n) % 4) &lt;&lt; 3),	(((_n) % 4) &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+#define REG_GDM_FWD_CFG(_n)		GDM_BASE(_n)</div><div class='add'>+#define GDM_PAD_EN_MASK			BIT(28)</div><div class='add'>+#define GDM_DROP_CRC_ERR_MASK		BIT(23)</div><div class='add'>+#define GDM_IP4_CKSUM_MASK		BIT(22)</div><div class='add'>+#define GDM_TCP_CKSUM_MASK		BIT(21)</div><div class='add'>+#define GDM_UDP_CKSUM_MASK		BIT(20)</div><div class='add'>+#define GDM_STRIP_CRC_MASK		BIT(16)</div><div class='add'>+#define GDM_UCFQ_MASK			GENMASK(15, 12)</div><div class='add'>+#define GDM_BCFQ_MASK			GENMASK(11, 8)</div><div class='add'>+#define GDM_MCFQ_MASK			GENMASK(7, 4)</div><div class='add'>+#define GDM_OCFQ_MASK			GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_INGRESS_CFG(_n)		(GDM_BASE(_n) + 0x10)</div><div class='add'>+#define GDM_INGRESS_FC_EN_MASK		BIT(1)</div><div class='add'>+#define GDM_STAG_EN_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_LEN_CFG(_n)		(GDM_BASE(_n) + 0x14)</div><div class='add'>+#define GDM_SHORT_LEN_MASK		GENMASK(13, 0)</div><div class='add'>+#define GDM_LONG_LEN_MASK		GENMASK(29, 16)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_LPBK_CFG(_n)		(GDM_BASE(_n) + 0x1c)</div><div class='add'>+#define LPBK_GAP_MASK			GENMASK(31, 24)</div><div class='add'>+#define LPBK_LEN_MASK			GENMASK(23, 10)</div><div class='add'>+#define LPBK_CHAN_MASK			GENMASK(8, 4)</div><div class='add'>+#define LPBK_MODE_MASK			GENMASK(3, 1)</div><div class='add'>+#define LBK_GAP_MODE_MASK		BIT(3)</div><div class='add'>+#define LBK_LEN_MODE_MASK		BIT(2)</div><div class='add'>+#define LBK_CHAN_MODE_MASK		BIT(1)</div><div class='add'>+#define LPBK_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_CHN_RLS(_n)		(GDM_BASE(_n) + 0x20)</div><div class='add'>+#define MBI_RX_AGE_SEL_MASK		GENMASK(26, 25)</div><div class='add'>+#define MBI_TX_AGE_SEL_MASK		GENMASK(18, 17)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_TXCHN_EN(_n)		(GDM_BASE(_n) + 0x24)</div><div class='add'>+#define REG_GDM_RXCHN_EN(_n)		(GDM_BASE(_n) + 0x28)</div><div class='add'>+</div><div class='add'>+#define REG_FE_CPORT_CFG		(GDM1_BASE + 0x40)</div><div class='add'>+#define FE_CPORT_PAD			BIT(26)</div><div class='add'>+#define FE_CPORT_PORT_XFC_MASK		BIT(25)</div><div class='add'>+#define FE_CPORT_QUEUE_XFC_MASK		BIT(24)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_MIB_CLEAR(_n)	(GDM_BASE(_n) + 0xf0)</div><div class='add'>+#define FE_GDM_MIB_RX_CLEAR_MASK	BIT(1)</div><div class='add'>+#define FE_GDM_MIB_TX_CLEAR_MASK	BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_MIB_CFG(_n)		(GDM_BASE(_n) + 0xf4)</div><div class='add'>+#define FE_STRICT_RFC2819_MODE_MASK	BIT(31)</div><div class='add'>+#define FE_GDM_TX_MIB_SPLIT_EN_MASK	BIT(17)</div><div class='add'>+#define FE_GDM_RX_MIB_SPLIT_EN_MASK	BIT(16)</div><div class='add'>+#define FE_TX_MIB_ID_MASK		GENMASK(15, 8)</div><div class='add'>+#define FE_RX_MIB_ID_MASK		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_TX_OK_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x104)</div><div class='add'>+#define REG_FE_GDM_TX_OK_BYTE_CNT_L(_n)		(GDM_BASE(_n) + 0x10c)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x110)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_BYTE_CNT_L(_n)	(GDM_BASE(_n) + 0x114)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_DROP_CNT(_n)		(GDM_BASE(_n) + 0x118)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_BC_CNT(_n)		(GDM_BASE(_n) + 0x11c)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_MC_CNT(_n)		(GDM_BASE(_n) + 0x120)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_RUNT_CNT(_n)		(GDM_BASE(_n) + 0x124)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_LONG_CNT(_n)		(GDM_BASE(_n) + 0x128)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_E64_CNT_L(_n)		(GDM_BASE(_n) + 0x12c)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L64_CNT_L(_n)		(GDM_BASE(_n) + 0x130)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L127_CNT_L(_n)	(GDM_BASE(_n) + 0x134)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L255_CNT_L(_n)	(GDM_BASE(_n) + 0x138)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L511_CNT_L(_n)	(GDM_BASE(_n) + 0x13c)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L1023_CNT_L(_n)	(GDM_BASE(_n) + 0x140)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_RX_OK_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x148)</div><div class='add'>+#define REG_FE_GDM_RX_FC_DROP_CNT(_n)		(GDM_BASE(_n) + 0x14c)</div><div class='add'>+#define REG_FE_GDM_RX_RC_DROP_CNT(_n)		(GDM_BASE(_n) + 0x150)</div><div class='add'>+#define REG_FE_GDM_RX_OVERFLOW_DROP_CNT(_n)	(GDM_BASE(_n) + 0x154)</div><div class='add'>+#define REG_FE_GDM_RX_ERROR_DROP_CNT(_n)	(GDM_BASE(_n) + 0x158)</div><div class='add'>+#define REG_FE_GDM_RX_OK_BYTE_CNT_L(_n)		(GDM_BASE(_n) + 0x15c)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x160)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_BYTE_CNT_L(_n)	(GDM_BASE(_n) + 0x164)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_DROP_CNT(_n)		(GDM_BASE(_n) + 0x168)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_BC_CNT(_n)		(GDM_BASE(_n) + 0x16c)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_MC_CNT(_n)		(GDM_BASE(_n) + 0x170)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_CRC_ERR_CNT(_n)	(GDM_BASE(_n) + 0x174)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_FRAG_CNT(_n)		(GDM_BASE(_n) + 0x178)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_JABBER_CNT(_n)	(GDM_BASE(_n) + 0x17c)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_RUNT_CNT(_n)		(GDM_BASE(_n) + 0x180)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_LONG_CNT(_n)		(GDM_BASE(_n) + 0x184)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_E64_CNT_L(_n)		(GDM_BASE(_n) + 0x188)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L64_CNT_L(_n)		(GDM_BASE(_n) + 0x18c)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L127_CNT_L(_n)	(GDM_BASE(_n) + 0x190)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L255_CNT_L(_n)	(GDM_BASE(_n) + 0x194)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L511_CNT_L(_n)	(GDM_BASE(_n) + 0x198)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L1023_CNT_L(_n)	(GDM_BASE(_n) + 0x19c)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_SRC_PORT_SET(_n)		(GDM_BASE(_n) + 0x23c)</div><div class='add'>+#define GDM_SPORT_OFF2_MASK			GENMASK(19, 16)</div><div class='add'>+#define GDM_SPORT_OFF1_MASK			GENMASK(15, 12)</div><div class='add'>+#define GDM_SPORT_OFF0_MASK			GENMASK(11, 8)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_TX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x280)</div><div class='add'>+#define REG_FE_GDM_TX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x284)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x288)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x28c)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_RX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x290)</div><div class='add'>+#define REG_FE_GDM_RX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x294)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x298)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x29c)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2b8)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2bc)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2c0)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2c4)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2c8)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2cc)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2e8)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2ec)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2f0)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2f4)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2f8)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2fc)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_GLO_CFG(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x200)</div><div class='add'>+#define PPE_GLO_CFG_BUSY_MASK			BIT(31)</div><div class='add'>+#define PPE_GLO_CFG_FLOW_DROP_UPDATE_MASK	BIT(9)</div><div class='add'>+#define PPE_GLO_CFG_PSE_HASH_OFS_MASK		BIT(6)</div><div class='add'>+#define PPE_GLO_CFG_PPE_BSWAP_MASK		BIT(5)</div><div class='add'>+#define PPE_GLO_CFG_TTL_DROP_MASK		BIT(4)</div><div class='add'>+#define PPE_GLO_CFG_IP4_CS_DROP_MASK		BIT(3)</div><div class='add'>+#define PPE_GLO_CFG_IP4_L4_CS_DROP_MASK		BIT(2)</div><div class='add'>+#define PPE_GLO_CFG_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_PPE_FLOW_CFG(_n)		(((_n) ? PPE2_BASE : PPE1_BASE) + 0x204)</div><div class='add'>+#define PPE_FLOW_CFG_IP6_HASH_GRE_KEY_MASK	BIT(20)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_HASH_GRE_KEY_MASK	BIT(19)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_HASH_FLOW_LABEL_MASK	BIT(18)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_NAT_FRAG_MASK		BIT(17)</div><div class='add'>+#define PPE_FLOW_CFG_IP_PROTO_BLACKLIST_MASK	BIT(16)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_DSLITE_MASK		BIT(14)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_NAPT_MASK		BIT(13)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_NAT_MASK		BIT(12)</div><div class='add'>+#define PPE_FLOW_CFG_IP6_6RD_MASK		BIT(10)</div><div class='add'>+#define PPE_FLOW_CFG_IP6_5T_ROUTE_MASK		BIT(9)</div><div class='add'>+#define PPE_FLOW_CFG_IP6_3T_ROUTE_MASK		BIT(8)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_UDP_FRAG_MASK		BIT(7)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_TCP_FRAG_MASK		BIT(6)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_IP_PROTO_CHK(_n)		(((_n) ? PPE2_BASE : PPE1_BASE) + 0x208)</div><div class='add'>+#define PPE_IP_PROTO_CHK_IPV4_MASK		GENMASK(31, 16)</div><div class='add'>+#define PPE_IP_PROTO_CHK_IPV6_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_TB_CFG(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x21c)</div><div class='add'>+#define PPE_SRAM_TB_NUM_ENTRY_MASK		GENMASK(26, 24)</div><div class='add'>+#define PPE_TB_CFG_KEEPALIVE_MASK		GENMASK(13, 12)</div><div class='add'>+#define PPE_TB_CFG_AGE_TCP_FIN_MASK		BIT(11)</div><div class='add'>+#define PPE_TB_CFG_AGE_UDP_MASK			BIT(10)</div><div class='add'>+#define PPE_TB_CFG_AGE_TCP_MASK			BIT(9)</div><div class='add'>+#define PPE_TB_CFG_AGE_UNBIND_MASK		BIT(8)</div><div class='add'>+#define PPE_TB_CFG_AGE_NON_L4_MASK		BIT(7)</div><div class='add'>+#define PPE_TB_CFG_AGE_PREBIND_MASK		BIT(6)</div><div class='add'>+#define PPE_TB_CFG_SEARCH_MISS_MASK		GENMASK(5, 4)</div><div class='add'>+#define PPE_TB_ENTRY_SIZE_MASK			BIT(3)</div><div class='add'>+#define PPE_DRAM_TB_NUM_ENTRY_MASK		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_TB_BASE(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x220)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_BIND_RATE(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x228)</div><div class='add'>+#define PPE_BIND_RATE_L2B_BIND_MASK		GENMASK(31, 16)</div><div class='add'>+#define PPE_BIND_RATE_BIND_MASK			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_BIND_LIMIT0(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x22c)</div><div class='add'>+#define PPE_BIND_LIMIT0_HALF_MASK		GENMASK(29, 16)</div><div class='add'>+#define PPE_BIND_LIMIT0_QUARTER_MASK		GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_BIND_LIMIT1(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x230)</div><div class='add'>+#define PPE_BIND_LIMIT1_NON_L4_MASK		GENMASK(23, 16)</div><div class='add'>+#define PPE_BIND_LIMIT1_FULL_MASK		GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_BND_AGE0(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x23c)</div><div class='add'>+#define PPE_BIND_AGE0_DELTA_NON_L4		GENMASK(30, 16)</div><div class='add'>+#define PPE_BIND_AGE0_DELTA_UDP			GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_UNBIND_AGE(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x238)</div><div class='add'>+#define PPE_UNBIND_AGE_MIN_PACKETS_MASK		GENMASK(31, 16)</div><div class='add'>+#define PPE_UNBIND_AGE_DELTA_MASK		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_BND_AGE1(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x240)</div><div class='add'>+#define PPE_BIND_AGE1_DELTA_TCP_FIN		GENMASK(30, 16)</div><div class='add'>+#define PPE_BIND_AGE1_DELTA_TCP			GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_HASH_SEED(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x244)</div><div class='add'>+#define PPE_HASH_SEED				0x12345678</div><div class='add'>+</div><div class='add'>+#define REG_PPE_DFT_CPORT0(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x248)</div><div class='add'>+#define DFT_CPORT_MASK(_n)			GENMASK(3 + ((_n) &lt;&lt; 2), ((_n) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define REG_PPE_DFT_CPORT1(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x24c)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_TB_HASH_CFG(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x250)</div><div class='add'>+#define PPE_DRAM_HASH1_MODE_MASK		GENMASK(31, 28)</div><div class='add'>+#define PPE_DRAM_HASH1_EN_MASK			BIT(24)</div><div class='add'>+#define PPE_DRAM_HASH0_MODE_MASK		GENMASK(23, 20)</div><div class='add'>+#define PPE_DRAM_TABLE_EN_MASK			BIT(16)</div><div class='add'>+#define PPE_SRAM_HASH1_MODE_MASK		GENMASK(15, 12)</div><div class='add'>+#define PPE_SRAM_HASH1_EN_MASK			BIT(8)</div><div class='add'>+#define PPE_SRAM_HASH0_MODE_MASK		GENMASK(7, 4)</div><div class='add'>+#define PPE_SRAM_TABLE_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_MTU_BASE(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x304)</div><div class='add'>+#define REG_PPE_MTU(_m, _n)			(REG_PPE_MTU_BASE(_m) + ((_n) &lt;&lt; 2))</div><div class='add'>+#define FP1_EGRESS_MTU_MASK			GENMASK(29, 16)</div><div class='add'>+#define FP0_EGRESS_MTU_MASK			GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_RAM_CTRL(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x31c)</div><div class='add'>+#define PPE_SRAM_CTRL_ACK_MASK			BIT(31)</div><div class='add'>+#define PPE_SRAM_CTRL_DUAL_SUCESS_MASK		BIT(30)</div><div class='add'>+#define PPE_SRAM_CTRL_ENTRY_MASK		GENMASK(23, 8)</div><div class='add'>+#define PPE_SRAM_WR_DUAL_DIRECTION_MASK		BIT(2)</div><div class='add'>+#define PPE_SRAM_CTRL_WR_MASK			BIT(1)</div><div class='add'>+#define PPE_SRAM_CTRL_REQ_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_RAM_BASE(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x320)</div><div class='add'>+#define REG_PPE_RAM_ENTRY(_m, _n)		(REG_PPE_RAM_BASE(_m) + ((_n) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define REG_UPDMEM_CTRL(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x370)</div><div class='add'>+#define PPE_UPDMEM_ACK_MASK			BIT(31)</div><div class='add'>+#define PPE_UPDMEM_ADDR_MASK			GENMASK(11, 8)</div><div class='add'>+#define PPE_UPDMEM_OFFSET_MASK			GENMASK(7, 4)</div><div class='add'>+#define PPE_UPDMEM_SEL_MASK			GENMASK(3, 2)</div><div class='add'>+#define PPE_UPDMEM_WR_MASK			BIT(1)</div><div class='add'>+#define PPE_UPDMEM_REQ_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_UPDMEM_DATA(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x374)</div><div class='add'>+</div><div class='add'>+#define REG_IP_FRAG_FP			0x2010</div><div class='add'>+#define IP_ASSEMBLE_PORT_MASK		GENMASK(24, 21)</div><div class='add'>+#define IP_ASSEMBLE_NBQ_MASK		GENMASK(20, 16)</div><div class='add'>+#define IP_FRAGMENT_PORT_MASK		GENMASK(8, 5)</div><div class='add'>+#define IP_FRAGMENT_NBQ_MASK		GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define REG_MC_VLAN_EN			0x2100</div><div class='add'>+#define MC_VLAN_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_MC_VLAN_CFG			0x2104</div><div class='add'>+#define MC_VLAN_CFG_CMD_DONE_MASK	BIT(31)</div><div class='add'>+#define MC_VLAN_CFG_TABLE_ID_MASK	GENMASK(21, 16)</div><div class='add'>+#define MC_VLAN_CFG_PORT_ID_MASK	GENMASK(11, 8)</div><div class='add'>+#define MC_VLAN_CFG_TABLE_SEL_MASK	BIT(4)</div><div class='add'>+#define MC_VLAN_CFG_RW_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_MC_VLAN_DATA		0x2108</div><div class='add'>+</div><div class='add'>+#define REG_SP_DFT_CPORT(_n)		(0x20e0 + ((_n) &lt;&lt; 2))</div><div class='add'>+#define SP_CPORT_DFT_MASK		GENMASK(2, 0)</div><div class='add'>+#define SP_CPORT_MASK(_n)		GENMASK(3 + ((_n) &lt;&lt; 2), ((_n) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define REG_SRC_PORT_FC_MAP6		0x2298</div><div class='add'>+#define FC_ID_OF_SRC_PORT27_MASK	GENMASK(28, 24)</div><div class='add'>+#define FC_ID_OF_SRC_PORT26_MASK	GENMASK(20, 16)</div><div class='add'>+#define FC_ID_OF_SRC_PORT25_MASK	GENMASK(12, 8)</div><div class='add'>+#define FC_ID_OF_SRC_PORT24_MASK	GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define REG_CDM5_RX_OQ1_DROP_CNT	0x29d4</div><div class='add'>+</div><div class='add'>+/* QDMA */</div><div class='add'>+#define REG_QDMA_GLOBAL_CFG			0x0004</div><div class='add'>+#define GLOBAL_CFG_RX_2B_OFFSET_MASK		BIT(31)</div><div class='add'>+#define GLOBAL_CFG_DMA_PREFERENCE_MASK		GENMASK(30, 29)</div><div class='add'>+#define GLOBAL_CFG_CPU_TXR_RR_MASK		BIT(28)</div><div class='add'>+#define GLOBAL_CFG_DSCP_BYTE_SWAP_MASK		BIT(27)</div><div class='add'>+#define GLOBAL_CFG_PAYLOAD_BYTE_SWAP_MASK	BIT(26)</div><div class='add'>+#define GLOBAL_CFG_MULTICAST_MODIFY_FP_MASK	BIT(25)</div><div class='add'>+#define GLOBAL_CFG_OAM_MODIFY_MASK		BIT(24)</div><div class='add'>+#define GLOBAL_CFG_RESET_MASK			BIT(23)</div><div class='add'>+#define GLOBAL_CFG_RESET_DONE_MASK		BIT(22)</div><div class='add'>+#define GLOBAL_CFG_MULTICAST_EN_MASK		BIT(21)</div><div class='add'>+#define GLOBAL_CFG_IRQ1_EN_MASK			BIT(20)</div><div class='add'>+#define GLOBAL_CFG_IRQ0_EN_MASK			BIT(19)</div><div class='add'>+#define GLOBAL_CFG_LOOPCNT_EN_MASK		BIT(18)</div><div class='add'>+#define GLOBAL_CFG_RD_BYPASS_WR_MASK		BIT(17)</div><div class='add'>+#define GLOBAL_CFG_QDMA_LOOPBACK_MASK		BIT(16)</div><div class='add'>+#define GLOBAL_CFG_LPBK_RXQ_SEL_MASK		GENMASK(13, 8)</div><div class='add'>+#define GLOBAL_CFG_CHECK_DONE_MASK		BIT(7)</div><div class='add'>+#define GLOBAL_CFG_TX_WB_DONE_MASK		BIT(6)</div><div class='add'>+#define GLOBAL_CFG_MAX_ISSUE_NUM_MASK		GENMASK(5, 4)</div><div class='add'>+#define GLOBAL_CFG_RX_DMA_BUSY_MASK		BIT(3)</div><div class='add'>+#define GLOBAL_CFG_RX_DMA_EN_MASK		BIT(2)</div><div class='add'>+#define GLOBAL_CFG_TX_DMA_BUSY_MASK		BIT(1)</div><div class='add'>+#define GLOBAL_CFG_TX_DMA_EN_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FWD_DSCP_BASE			0x0010</div><div class='add'>+#define REG_FWD_BUF_BASE			0x0014</div><div class='add'>+</div><div class='add'>+#define REG_HW_FWD_DSCP_CFG			0x0018</div><div class='add'>+#define HW_FWD_DSCP_PAYLOAD_SIZE_MASK		GENMASK(29, 28)</div><div class='add'>+#define HW_FWD_DSCP_SCATTER_LEN_MASK		GENMASK(17, 16)</div><div class='add'>+#define HW_FWD_DSCP_MIN_SCATTER_LEN_MASK	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_INT_STATUS(_n)		\</div><div class='add'>+	(((_n) == 4) ? 0x0730 :		\</div><div class='add'>+	 ((_n) == 3) ? 0x0724 :		\</div><div class='add'>+	 ((_n) == 2) ? 0x0720 :		\</div><div class='add'>+	 ((_n) == 1) ? 0x0024 : 0x0020)</div><div class='add'>+</div><div class='add'>+#define REG_INT_ENABLE(_b, _n)		\</div><div class='add'>+	(((_n) == 4) ? 0x0750 + ((_b) &lt;&lt; 5) :	\</div><div class='add'>+	 ((_n) == 3) ? 0x0744 + ((_b) &lt;&lt; 5) :	\</div><div class='add'>+	 ((_n) == 2) ? 0x0740 + ((_b) &lt;&lt; 5) :	\</div><div class='add'>+	 ((_n) == 1) ? 0x002c + ((_b) &lt;&lt; 3) :	\</div><div class='add'>+		       0x0028 + ((_b) &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+/* QDMA_CSR_INT_ENABLE1 */</div><div class='add'>+#define RX15_COHERENT_INT_MASK		BIT(31)</div><div class='add'>+#define RX14_COHERENT_INT_MASK		BIT(30)</div><div class='add'>+#define RX13_COHERENT_INT_MASK		BIT(29)</div><div class='add'>+#define RX12_COHERENT_INT_MASK		BIT(28)</div><div class='add'>+#define RX11_COHERENT_INT_MASK		BIT(27)</div><div class='add'>+#define RX10_COHERENT_INT_MASK		BIT(26)</div><div class='add'>+#define RX9_COHERENT_INT_MASK		BIT(25)</div><div class='add'>+#define RX8_COHERENT_INT_MASK		BIT(24)</div><div class='add'>+#define RX7_COHERENT_INT_MASK		BIT(23)</div><div class='add'>+#define RX6_COHERENT_INT_MASK		BIT(22)</div><div class='add'>+#define RX5_COHERENT_INT_MASK		BIT(21)</div><div class='add'>+#define RX4_COHERENT_INT_MASK		BIT(20)</div><div class='add'>+#define RX3_COHERENT_INT_MASK		BIT(19)</div><div class='add'>+#define RX2_COHERENT_INT_MASK		BIT(18)</div><div class='add'>+#define RX1_COHERENT_INT_MASK		BIT(17)</div><div class='add'>+#define RX0_COHERENT_INT_MASK		BIT(16)</div><div class='add'>+#define TX7_COHERENT_INT_MASK		BIT(15)</div><div class='add'>+#define TX6_COHERENT_INT_MASK		BIT(14)</div><div class='add'>+#define TX5_COHERENT_INT_MASK		BIT(13)</div><div class='add'>+#define TX4_COHERENT_INT_MASK		BIT(12)</div><div class='add'>+#define TX3_COHERENT_INT_MASK		BIT(11)</div><div class='add'>+#define TX2_COHERENT_INT_MASK		BIT(10)</div><div class='add'>+#define TX1_COHERENT_INT_MASK		BIT(9)</div><div class='add'>+#define TX0_COHERENT_INT_MASK		BIT(8)</div><div class='add'>+#define CNT_OVER_FLOW_INT_MASK		BIT(7)</div><div class='add'>+#define IRQ1_FULL_INT_MASK		BIT(5)</div><div class='add'>+#define IRQ1_INT_MASK			BIT(4)</div><div class='add'>+#define HWFWD_DSCP_LOW_INT_MASK		BIT(3)</div><div class='add'>+#define HWFWD_DSCP_EMPTY_INT_MASK	BIT(2)</div><div class='add'>+#define IRQ0_FULL_INT_MASK		BIT(1)</div><div class='add'>+#define IRQ0_INT_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define RX_COHERENT_LOW_INT_MASK				\</div><div class='add'>+	(RX15_COHERENT_INT_MASK | RX14_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX13_COHERENT_INT_MASK | RX12_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX11_COHERENT_INT_MASK | RX10_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX9_COHERENT_INT_MASK | RX8_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX7_COHERENT_INT_MASK | RX6_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX5_COHERENT_INT_MASK | RX4_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX3_COHERENT_INT_MASK | RX2_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX1_COHERENT_INT_MASK | RX0_COHERENT_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define RX_COHERENT_LOW_OFFSET	__ffs(RX_COHERENT_LOW_INT_MASK)</div><div class='add'>+#define INT_RX0_MASK(_n)					\</div><div class='add'>+	(((_n) &lt;&lt; RX_COHERENT_LOW_OFFSET) &amp; RX_COHERENT_LOW_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define TX_COHERENT_LOW_INT_MASK				\</div><div class='add'>+	(TX7_COHERENT_INT_MASK | TX6_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX5_COHERENT_INT_MASK | TX4_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX3_COHERENT_INT_MASK | TX2_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX1_COHERENT_INT_MASK | TX0_COHERENT_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define TX_DONE_INT_MASK(_n)					\</div><div class='add'>+	((_n) ? IRQ1_INT_MASK | IRQ1_FULL_INT_MASK		\</div><div class='add'>+	      : IRQ0_INT_MASK | IRQ0_FULL_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define INT_TX_MASK						\</div><div class='add'>+	(IRQ1_INT_MASK | IRQ1_FULL_INT_MASK |			\</div><div class='add'>+	 IRQ0_INT_MASK | IRQ0_FULL_INT_MASK)</div><div class='add'>+</div><div class='add'>+/* QDMA_CSR_INT_ENABLE2 */</div><div class='add'>+#define RX15_NO_CPU_DSCP_INT_MASK	BIT(31)</div><div class='add'>+#define RX14_NO_CPU_DSCP_INT_MASK	BIT(30)</div><div class='add'>+#define RX13_NO_CPU_DSCP_INT_MASK	BIT(29)</div><div class='add'>+#define RX12_NO_CPU_DSCP_INT_MASK	BIT(28)</div><div class='add'>+#define RX11_NO_CPU_DSCP_INT_MASK	BIT(27)</div><div class='add'>+#define RX10_NO_CPU_DSCP_INT_MASK	BIT(26)</div><div class='add'>+#define RX9_NO_CPU_DSCP_INT_MASK	BIT(25)</div><div class='add'>+#define RX8_NO_CPU_DSCP_INT_MASK	BIT(24)</div><div class='add'>+#define RX7_NO_CPU_DSCP_INT_MASK	BIT(23)</div><div class='add'>+#define RX6_NO_CPU_DSCP_INT_MASK	BIT(22)</div><div class='add'>+#define RX5_NO_CPU_DSCP_INT_MASK	BIT(21)</div><div class='add'>+#define RX4_NO_CPU_DSCP_INT_MASK	BIT(20)</div><div class='add'>+#define RX3_NO_CPU_DSCP_INT_MASK	BIT(19)</div><div class='add'>+#define RX2_NO_CPU_DSCP_INT_MASK	BIT(18)</div><div class='add'>+#define RX1_NO_CPU_DSCP_INT_MASK	BIT(17)</div><div class='add'>+#define RX0_NO_CPU_DSCP_INT_MASK	BIT(16)</div><div class='add'>+#define RX15_DONE_INT_MASK		BIT(15)</div><div class='add'>+#define RX14_DONE_INT_MASK		BIT(14)</div><div class='add'>+#define RX13_DONE_INT_MASK		BIT(13)</div><div class='add'>+#define RX12_DONE_INT_MASK		BIT(12)</div><div class='add'>+#define RX11_DONE_INT_MASK		BIT(11)</div><div class='add'>+#define RX10_DONE_INT_MASK		BIT(10)</div><div class='add'>+#define RX9_DONE_INT_MASK		BIT(9)</div><div class='add'>+#define RX8_DONE_INT_MASK		BIT(8)</div><div class='add'>+#define RX7_DONE_INT_MASK		BIT(7)</div><div class='add'>+#define RX6_DONE_INT_MASK		BIT(6)</div><div class='add'>+#define RX5_DONE_INT_MASK		BIT(5)</div><div class='add'>+#define RX4_DONE_INT_MASK		BIT(4)</div><div class='add'>+#define RX3_DONE_INT_MASK		BIT(3)</div><div class='add'>+#define RX2_DONE_INT_MASK		BIT(2)</div><div class='add'>+#define RX1_DONE_INT_MASK		BIT(1)</div><div class='add'>+#define RX0_DONE_INT_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define RX_NO_CPU_DSCP_LOW_INT_MASK					\</div><div class='add'>+	(RX15_NO_CPU_DSCP_INT_MASK | RX14_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX13_NO_CPU_DSCP_INT_MASK | RX12_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX11_NO_CPU_DSCP_INT_MASK | RX10_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX9_NO_CPU_DSCP_INT_MASK | RX8_NO_CPU_DSCP_INT_MASK |		\</div><div class='add'>+	 RX7_NO_CPU_DSCP_INT_MASK | RX6_NO_CPU_DSCP_INT_MASK |		\</div><div class='add'>+	 RX5_NO_CPU_DSCP_INT_MASK | RX4_NO_CPU_DSCP_INT_MASK |		\</div><div class='add'>+	 RX3_NO_CPU_DSCP_INT_MASK | RX2_NO_CPU_DSCP_INT_MASK |		\</div><div class='add'>+	 RX1_NO_CPU_DSCP_INT_MASK | RX0_NO_CPU_DSCP_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define RX_DONE_LOW_INT_MASK				\</div><div class='add'>+	(RX15_DONE_INT_MASK | RX14_DONE_INT_MASK |	\</div><div class='add'>+	 RX13_DONE_INT_MASK | RX12_DONE_INT_MASK |	\</div><div class='add'>+	 RX11_DONE_INT_MASK | RX10_DONE_INT_MASK |	\</div><div class='add'>+	 RX9_DONE_INT_MASK | RX8_DONE_INT_MASK |	\</div><div class='add'>+	 RX7_DONE_INT_MASK | RX6_DONE_INT_MASK |	\</div><div class='add'>+	 RX5_DONE_INT_MASK | RX4_DONE_INT_MASK |	\</div><div class='add'>+	 RX3_DONE_INT_MASK | RX2_DONE_INT_MASK |	\</div><div class='add'>+	 RX1_DONE_INT_MASK | RX0_DONE_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define RX_NO_CPU_DSCP_LOW_OFFSET	__ffs(RX_NO_CPU_DSCP_LOW_INT_MASK)</div><div class='add'>+#define INT_RX1_MASK(_n)							\</div><div class='add'>+	((((_n) &lt;&lt; RX_NO_CPU_DSCP_LOW_OFFSET) &amp; RX_NO_CPU_DSCP_LOW_INT_MASK) |	\</div><div class='add'>+	 (RX_DONE_LOW_INT_MASK &amp; (_n)))</div><div class='add'>+</div><div class='add'>+/* QDMA_CSR_INT_ENABLE3 */</div><div class='add'>+#define RX31_NO_CPU_DSCP_INT_MASK	BIT(31)</div><div class='add'>+#define RX30_NO_CPU_DSCP_INT_MASK	BIT(30)</div><div class='add'>+#define RX29_NO_CPU_DSCP_INT_MASK	BIT(29)</div><div class='add'>+#define RX28_NO_CPU_DSCP_INT_MASK	BIT(28)</div><div class='add'>+#define RX27_NO_CPU_DSCP_INT_MASK	BIT(27)</div><div class='add'>+#define RX26_NO_CPU_DSCP_INT_MASK	BIT(26)</div><div class='add'>+#define RX25_NO_CPU_DSCP_INT_MASK	BIT(25)</div><div class='add'>+#define RX24_NO_CPU_DSCP_INT_MASK	BIT(24)</div><div class='add'>+#define RX23_NO_CPU_DSCP_INT_MASK	BIT(23)</div><div class='add'>+#define RX22_NO_CPU_DSCP_INT_MASK	BIT(22)</div><div class='add'>+#define RX21_NO_CPU_DSCP_INT_MASK	BIT(21)</div><div class='add'>+#define RX20_NO_CPU_DSCP_INT_MASK	BIT(20)</div><div class='add'>+#define RX19_NO_CPU_DSCP_INT_MASK	BIT(19)</div><div class='add'>+#define RX18_NO_CPU_DSCP_INT_MASK	BIT(18)</div><div class='add'>+#define RX17_NO_CPU_DSCP_INT_MASK	BIT(17)</div><div class='add'>+#define RX16_NO_CPU_DSCP_INT_MASK	BIT(16)</div><div class='add'>+#define RX31_DONE_INT_MASK		BIT(15)</div><div class='add'>+#define RX30_DONE_INT_MASK		BIT(14)</div><div class='add'>+#define RX29_DONE_INT_MASK		BIT(13)</div><div class='add'>+#define RX28_DONE_INT_MASK		BIT(12)</div><div class='add'>+#define RX27_DONE_INT_MASK		BIT(11)</div><div class='add'>+#define RX26_DONE_INT_MASK		BIT(10)</div><div class='add'>+#define RX25_DONE_INT_MASK		BIT(9)</div><div class='add'>+#define RX24_DONE_INT_MASK		BIT(8)</div><div class='add'>+#define RX23_DONE_INT_MASK		BIT(7)</div><div class='add'>+#define RX22_DONE_INT_MASK		BIT(6)</div><div class='add'>+#define RX21_DONE_INT_MASK		BIT(5)</div><div class='add'>+#define RX20_DONE_INT_MASK		BIT(4)</div><div class='add'>+#define RX19_DONE_INT_MASK		BIT(3)</div><div class='add'>+#define RX18_DONE_INT_MASK		BIT(2)</div><div class='add'>+#define RX17_DONE_INT_MASK		BIT(1)</div><div class='add'>+#define RX16_DONE_INT_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define RX_NO_CPU_DSCP_HIGH_INT_MASK					\</div><div class='add'>+	(RX31_NO_CPU_DSCP_INT_MASK | RX30_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX29_NO_CPU_DSCP_INT_MASK | RX28_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX27_NO_CPU_DSCP_INT_MASK | RX26_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX25_NO_CPU_DSCP_INT_MASK | RX24_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX23_NO_CPU_DSCP_INT_MASK | RX22_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX21_NO_CPU_DSCP_INT_MASK | RX20_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX19_NO_CPU_DSCP_INT_MASK | RX18_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX17_NO_CPU_DSCP_INT_MASK | RX16_NO_CPU_DSCP_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define RX_DONE_HIGH_INT_MASK				\</div><div class='add'>+	(RX31_DONE_INT_MASK | RX30_DONE_INT_MASK |	\</div><div class='add'>+	 RX29_DONE_INT_MASK | RX28_DONE_INT_MASK |	\</div><div class='add'>+	 RX27_DONE_INT_MASK | RX26_DONE_INT_MASK |	\</div><div class='add'>+	 RX25_DONE_INT_MASK | RX24_DONE_INT_MASK |	\</div><div class='add'>+	 RX23_DONE_INT_MASK | RX22_DONE_INT_MASK |	\</div><div class='add'>+	 RX21_DONE_INT_MASK | RX20_DONE_INT_MASK |	\</div><div class='add'>+	 RX19_DONE_INT_MASK | RX18_DONE_INT_MASK |	\</div><div class='add'>+	 RX17_DONE_INT_MASK | RX16_DONE_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define RX_DONE_HIGH_OFFSET	fls(RX_DONE_HIGH_INT_MASK)</div><div class='add'>+#define RX_DONE_INT_MASK	\</div><div class='add'>+	((RX_DONE_HIGH_INT_MASK &lt;&lt; RX_DONE_HIGH_OFFSET) | RX_DONE_LOW_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define INT_RX2_MASK(_n)				\</div><div class='add'>+	((RX_NO_CPU_DSCP_HIGH_INT_MASK &amp; (_n)) |	\</div><div class='add'>+	 (((_n) &gt;&gt; RX_DONE_HIGH_OFFSET) &amp; RX_DONE_HIGH_INT_MASK))</div><div class='add'>+</div><div class='add'>+/* QDMA_CSR_INT_ENABLE4 */</div><div class='add'>+#define RX31_COHERENT_INT_MASK		BIT(31)</div><div class='add'>+#define RX30_COHERENT_INT_MASK		BIT(30)</div><div class='add'>+#define RX29_COHERENT_INT_MASK		BIT(29)</div><div class='add'>+#define RX28_COHERENT_INT_MASK		BIT(28)</div><div class='add'>+#define RX27_COHERENT_INT_MASK		BIT(27)</div><div class='add'>+#define RX26_COHERENT_INT_MASK		BIT(26)</div><div class='add'>+#define RX25_COHERENT_INT_MASK		BIT(25)</div><div class='add'>+#define RX24_COHERENT_INT_MASK		BIT(24)</div><div class='add'>+#define RX23_COHERENT_INT_MASK		BIT(23)</div><div class='add'>+#define RX22_COHERENT_INT_MASK		BIT(22)</div><div class='add'>+#define RX21_COHERENT_INT_MASK		BIT(21)</div><div class='add'>+#define RX20_COHERENT_INT_MASK		BIT(20)</div><div class='add'>+#define RX19_COHERENT_INT_MASK		BIT(19)</div><div class='add'>+#define RX18_COHERENT_INT_MASK		BIT(18)</div><div class='add'>+#define RX17_COHERENT_INT_MASK		BIT(17)</div><div class='add'>+#define RX16_COHERENT_INT_MASK		BIT(16)</div><div class='add'>+</div><div class='add'>+#define RX_COHERENT_HIGH_INT_MASK				\</div><div class='add'>+	(RX31_COHERENT_INT_MASK | RX30_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX29_COHERENT_INT_MASK | RX28_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX27_COHERENT_INT_MASK | RX26_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX25_COHERENT_INT_MASK | RX24_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX23_COHERENT_INT_MASK | RX22_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX21_COHERENT_INT_MASK | RX20_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX19_COHERENT_INT_MASK | RX18_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX17_COHERENT_INT_MASK | RX16_COHERENT_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define INT_RX3_MASK(_n)	(RX_COHERENT_HIGH_INT_MASK &amp; (_n))</div><div class='add'>+</div><div class='add'>+/* QDMA_CSR_INT_ENABLE5 */</div><div class='add'>+#define TX31_COHERENT_INT_MASK		BIT(31)</div><div class='add'>+#define TX30_COHERENT_INT_MASK		BIT(30)</div><div class='add'>+#define TX29_COHERENT_INT_MASK		BIT(29)</div><div class='add'>+#define TX28_COHERENT_INT_MASK		BIT(28)</div><div class='add'>+#define TX27_COHERENT_INT_MASK		BIT(27)</div><div class='add'>+#define TX26_COHERENT_INT_MASK		BIT(26)</div><div class='add'>+#define TX25_COHERENT_INT_MASK		BIT(25)</div><div class='add'>+#define TX24_COHERENT_INT_MASK		BIT(24)</div><div class='add'>+#define TX23_COHERENT_INT_MASK		BIT(23)</div><div class='add'>+#define TX22_COHERENT_INT_MASK		BIT(22)</div><div class='add'>+#define TX21_COHERENT_INT_MASK		BIT(21)</div><div class='add'>+#define TX20_COHERENT_INT_MASK		BIT(20)</div><div class='add'>+#define TX19_COHERENT_INT_MASK		BIT(19)</div><div class='add'>+#define TX18_COHERENT_INT_MASK		BIT(18)</div><div class='add'>+#define TX17_COHERENT_INT_MASK		BIT(17)</div><div class='add'>+#define TX16_COHERENT_INT_MASK		BIT(16)</div><div class='add'>+#define TX15_COHERENT_INT_MASK		BIT(15)</div><div class='add'>+#define TX14_COHERENT_INT_MASK		BIT(14)</div><div class='add'>+#define TX13_COHERENT_INT_MASK		BIT(13)</div><div class='add'>+#define TX12_COHERENT_INT_MASK		BIT(12)</div><div class='add'>+#define TX11_COHERENT_INT_MASK		BIT(11)</div><div class='add'>+#define TX10_COHERENT_INT_MASK		BIT(10)</div><div class='add'>+#define TX9_COHERENT_INT_MASK		BIT(9)</div><div class='add'>+#define TX8_COHERENT_INT_MASK		BIT(8)</div><div class='add'>+</div><div class='add'>+#define TX_COHERENT_HIGH_INT_MASK				\</div><div class='add'>+	(TX31_COHERENT_INT_MASK | TX30_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX29_COHERENT_INT_MASK | TX28_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX27_COHERENT_INT_MASK | TX26_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX25_COHERENT_INT_MASK | TX24_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX23_COHERENT_INT_MASK | TX22_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX21_COHERENT_INT_MASK | TX20_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX19_COHERENT_INT_MASK | TX18_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX17_COHERENT_INT_MASK | TX16_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX15_COHERENT_INT_MASK | TX14_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX13_COHERENT_INT_MASK | TX12_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX11_COHERENT_INT_MASK | TX10_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX9_COHERENT_INT_MASK | TX8_COHERENT_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define REG_TX_IRQ_BASE(_n)		((_n) ? 0x0048 : 0x0050)</div><div class='add'>+</div><div class='add'>+#define REG_TX_IRQ_CFG(_n)		((_n) ? 0x004c : 0x0054)</div><div class='add'>+#define TX_IRQ_THR_MASK			GENMASK(27, 16)</div><div class='add'>+#define TX_IRQ_DEPTH_MASK		GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+#define REG_IRQ_CLEAR_LEN(_n)		((_n) ? 0x0064 : 0x0058)</div><div class='add'>+#define IRQ_CLEAR_LEN_MASK		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define REG_IRQ_STATUS(_n)		((_n) ? 0x0068 : 0x005c)</div><div class='add'>+#define IRQ_ENTRY_LEN_MASK		GENMASK(27, 16)</div><div class='add'>+#define IRQ_HEAD_IDX_MASK		GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+#define REG_TX_RING_BASE(_n)	\</div><div class='add'>+	(((_n) &lt; 8) ? 0x0100 + ((_n) &lt;&lt; 5) : 0x0b00 + (((_n) - 8) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define REG_TX_RING_BLOCKING(_n)	\</div><div class='add'>+	(((_n) &lt; 8) ? 0x0104 + ((_n) &lt;&lt; 5) : 0x0b04 + (((_n) - 8) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define TX_RING_IRQ_BLOCKING_MAP_MASK			BIT(6)</div><div class='add'>+#define TX_RING_IRQ_BLOCKING_CFG_MASK			BIT(4)</div><div class='add'>+#define TX_RING_IRQ_BLOCKING_TX_DROP_EN_MASK		BIT(2)</div><div class='add'>+#define TX_RING_IRQ_BLOCKING_MAX_TH_TXRING_EN_MASK	BIT(1)</div><div class='add'>+#define TX_RING_IRQ_BLOCKING_MIN_TH_TXRING_EN_MASK	BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_TX_CPU_IDX(_n)	\</div><div class='add'>+	(((_n) &lt; 8) ? 0x0108 + ((_n) &lt;&lt; 5) : 0x0b08 + (((_n) - 8) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define TX_RING_CPU_IDX_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_TX_DMA_IDX(_n)	\</div><div class='add'>+	(((_n) &lt; 8) ? 0x010c + ((_n) &lt;&lt; 5) : 0x0b0c + (((_n) - 8) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define TX_RING_DMA_IDX_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define IRQ_RING_IDX_MASK		GENMASK(20, 16)</div><div class='add'>+#define IRQ_DESC_IDX_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_RX_RING_BASE(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x0200 + ((_n) &lt;&lt; 5) : 0x0e00 + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define REG_RX_RING_SIZE(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x0204 + ((_n) &lt;&lt; 5) : 0x0e04 + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define RX_RING_THR_MASK		GENMASK(31, 16)</div><div class='add'>+#define RX_RING_SIZE_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_RX_CPU_IDX(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x0208 + ((_n) &lt;&lt; 5) : 0x0e08 + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define RX_RING_CPU_IDX_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_RX_DMA_IDX(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x020c + ((_n) &lt;&lt; 5) : 0x0e0c + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define REG_RX_DELAY_INT_IDX(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x0210 + ((_n) &lt;&lt; 5) : 0x0e10 + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define REG_RX_SCATTER_CFG(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x0214 + ((_n) &lt;&lt; 5) : 0x0e14 + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define RX_DELAY_INT_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define RX_RING_DMA_IDX_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define RX_RING_SG_EN_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_INGRESS_TRTCM_CFG		0x0070</div><div class='add'>+#define INGRESS_TRTCM_EN_MASK		BIT(31)</div><div class='add'>+#define INGRESS_TRTCM_MODE_MASK		BIT(30)</div><div class='add'>+#define INGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='add'>+#define INGRESS_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_QUEUE_CLOSE_CFG(_n)		(0x00a0 + ((_n) &amp; 0xfc))</div><div class='add'>+#define TXQ_DISABLE_CHAN_QUEUE_MASK(_n, _m)	BIT((_m) + (((_n) &amp; 0x3) &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+#define REG_TXQ_DIS_CFG_BASE(_n)	((_n) ? 0x20a0 : 0x00a0)</div><div class='add'>+#define REG_TXQ_DIS_CFG(_n, _m)		(REG_TXQ_DIS_CFG_BASE((_n)) + (_m) &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+#define REG_CNTR_CFG(_n)		(0x0400 + ((_n) &lt;&lt; 3))</div><div class='add'>+#define CNTR_EN_MASK			BIT(31)</div><div class='add'>+#define CNTR_ALL_CHAN_EN_MASK		BIT(30)</div><div class='add'>+#define CNTR_ALL_QUEUE_EN_MASK		BIT(29)</div><div class='add'>+#define CNTR_ALL_DSCP_RING_EN_MASK	BIT(28)</div><div class='add'>+#define CNTR_SRC_MASK			GENMASK(27, 24)</div><div class='add'>+#define CNTR_DSCP_RING_MASK		GENMASK(20, 16)</div><div class='add'>+#define CNTR_CHAN_MASK			GENMASK(7, 3)</div><div class='add'>+#define CNTR_QUEUE_MASK			GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+#define REG_CNTR_VAL(_n)		(0x0404 + ((_n) &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+#define REG_LMGR_INIT_CFG		0x1000</div><div class='add'>+#define LMGR_INIT_START			BIT(31)</div><div class='add'>+#define LMGR_SRAM_MODE_MASK		BIT(30)</div><div class='add'>+#define HW_FWD_PKTSIZE_OVERHEAD_MASK	GENMASK(27, 20)</div><div class='add'>+#define HW_FWD_DESC_NUM_MASK		GENMASK(16, 0)</div><div class='add'>+</div><div class='add'>+#define REG_FWD_DSCP_LOW_THR		0x1004</div><div class='add'>+#define FWD_DSCP_LOW_THR_MASK		GENMASK(17, 0)</div><div class='add'>+</div><div class='add'>+#define REG_EGRESS_RATE_METER_CFG		0x100c</div><div class='add'>+#define EGRESS_RATE_METER_EN_MASK		BIT(31)</div><div class='add'>+#define EGRESS_RATE_METER_EQ_RATE_EN_MASK	BIT(17)</div><div class='add'>+#define EGRESS_RATE_METER_WINDOW_SZ_MASK	GENMASK(16, 12)</div><div class='add'>+#define EGRESS_RATE_METER_TIMESLICE_MASK	GENMASK(10, 0)</div><div class='add'>+</div><div class='add'>+#define REG_EGRESS_TRTCM_CFG		0x1010</div><div class='add'>+#define EGRESS_TRTCM_EN_MASK		BIT(31)</div><div class='add'>+#define EGRESS_TRTCM_MODE_MASK		BIT(30)</div><div class='add'>+#define EGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='add'>+#define EGRESS_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define TRTCM_PARAM_RW_MASK		BIT(31)</div><div class='add'>+#define TRTCM_PARAM_RW_DONE_MASK	BIT(30)</div><div class='add'>+#define TRTCM_PARAM_TYPE_MASK		GENMASK(29, 28)</div><div class='add'>+#define TRTCM_METER_GROUP_MASK		GENMASK(27, 26)</div><div class='add'>+#define TRTCM_PARAM_INDEX_MASK		GENMASK(23, 17)</div><div class='add'>+#define TRTCM_PARAM_RATE_TYPE_MASK	BIT(16)</div><div class='add'>+</div><div class='add'>+#define REG_TRTCM_CFG_PARAM(_n)		((_n) + 0x4)</div><div class='add'>+#define REG_TRTCM_DATA_LOW(_n)		((_n) + 0x8)</div><div class='add'>+#define REG_TRTCM_DATA_HIGH(_n)		((_n) + 0xc)</div><div class='add'>+</div><div class='add'>+#define RATE_LIMIT_PARAM_RW_MASK	BIT(31)</div><div class='add'>+#define RATE_LIMIT_PARAM_RW_DONE_MASK	BIT(30)</div><div class='add'>+#define RATE_LIMIT_PARAM_TYPE_MASK	GENMASK(29, 28)</div><div class='add'>+#define RATE_LIMIT_METER_GROUP_MASK	GENMASK(27, 26)</div><div class='add'>+#define RATE_LIMIT_PARAM_INDEX_MASK	GENMASK(23, 16)</div><div class='add'>+</div><div class='add'>+#define REG_TXWRR_MODE_CFG		0x1020</div><div class='add'>+#define TWRR_WEIGHT_SCALE_MASK		BIT(31)</div><div class='add'>+#define TWRR_WEIGHT_BASE_MASK		BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_TXWRR_WEIGHT_CFG		0x1024</div><div class='add'>+#define TWRR_RW_CMD_MASK		BIT(31)</div><div class='add'>+#define TWRR_RW_CMD_DONE		BIT(30)</div><div class='add'>+#define TWRR_CHAN_IDX_MASK		GENMASK(23, 19)</div><div class='add'>+#define TWRR_QUEUE_IDX_MASK		GENMASK(18, 16)</div><div class='add'>+#define TWRR_VALUE_MASK			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PSE_BUF_USAGE_CFG		0x1028</div><div class='add'>+#define PSE_BUF_ESTIMATE_EN_MASK	BIT(29)</div><div class='add'>+</div><div class='add'>+#define REG_CHAN_QOS_MODE(_n)		(0x1040 + ((_n) &lt;&lt; 2))</div><div class='add'>+#define CHAN_QOS_MODE_MASK(_n)		GENMASK(2 + ((_n) &lt;&lt; 2), (_n) &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+#define REG_GLB_TRTCM_CFG		0x1080</div><div class='add'>+#define GLB_TRTCM_EN_MASK		BIT(31)</div><div class='add'>+#define GLB_TRTCM_MODE_MASK		BIT(30)</div><div class='add'>+#define GLB_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='add'>+#define GLB_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_TXQ_CNGST_CFG		0x10a0</div><div class='add'>+#define TXQ_CNGST_DROP_EN		BIT(31)</div><div class='add'>+#define TXQ_CNGST_DEI_DROP_EN		BIT(30)</div><div class='add'>+</div><div class='add'>+#define REG_SLA_TRTCM_CFG		0x1150</div><div class='add'>+#define SLA_TRTCM_EN_MASK		BIT(31)</div><div class='add'>+#define SLA_TRTCM_MODE_MASK		BIT(30)</div><div class='add'>+#define SLA_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='add'>+#define SLA_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* CTRL */</div><div class='add'>+#define QDMA_DESC_DONE_MASK		BIT(31)</div><div class='add'>+#define QDMA_DESC_DROP_MASK		BIT(30) /* tx: drop - rx: overflow */</div><div class='add'>+#define QDMA_DESC_MORE_MASK		BIT(29) /* more SG elements */</div><div class='add'>+#define QDMA_DESC_DEI_MASK		BIT(25)</div><div class='add'>+#define QDMA_DESC_NO_DROP_MASK		BIT(24)</div><div class='add'>+#define QDMA_DESC_LEN_MASK		GENMASK(15, 0)</div><div class='add'>+/* DATA */</div><div class='add'>+#define QDMA_DESC_NEXT_ID_MASK		GENMASK(15, 0)</div><div class='add'>+/* TX MSG0 */</div><div class='add'>+#define QDMA_ETH_TXMSG_MIC_IDX_MASK	BIT(30)</div><div class='add'>+#define QDMA_ETH_TXMSG_SP_TAG_MASK	GENMASK(29, 14)</div><div class='add'>+#define QDMA_ETH_TXMSG_ICO_MASK		BIT(13)</div><div class='add'>+#define QDMA_ETH_TXMSG_UCO_MASK		BIT(12)</div><div class='add'>+#define QDMA_ETH_TXMSG_TCO_MASK		BIT(11)</div><div class='add'>+#define QDMA_ETH_TXMSG_TSO_MASK		BIT(10)</div><div class='add'>+#define QDMA_ETH_TXMSG_FAST_MASK	BIT(9)</div><div class='add'>+#define QDMA_ETH_TXMSG_OAM_MASK		BIT(8)</div><div class='add'>+#define QDMA_ETH_TXMSG_CHAN_MASK	GENMASK(7, 3)</div><div class='add'>+#define QDMA_ETH_TXMSG_QUEUE_MASK	GENMASK(2, 0)</div><div class='add'>+/* TX MSG1 */</div><div class='add'>+#define QDMA_ETH_TXMSG_NO_DROP		BIT(31)</div><div class='add'>+#define QDMA_ETH_TXMSG_METER_MASK	GENMASK(30, 24)	/* 0x7f no meters */</div><div class='add'>+#define QDMA_ETH_TXMSG_FPORT_MASK	GENMASK(23, 20)</div><div class='add'>+#define QDMA_ETH_TXMSG_NBOQ_MASK	GENMASK(19, 15)</div><div class='add'>+#define QDMA_ETH_TXMSG_HWF_MASK		BIT(14)</div><div class='add'>+#define QDMA_ETH_TXMSG_HOP_MASK		BIT(13)</div><div class='add'>+#define QDMA_ETH_TXMSG_PTP_MASK		BIT(12)</div><div class='add'>+#define QDMA_ETH_TXMSG_ACNT_G1_MASK	GENMASK(10, 6)	/* 0x1f do not count */</div><div class='add'>+#define QDMA_ETH_TXMSG_ACNT_G0_MASK	GENMASK(5, 0)	/* 0x3f do not count */</div><div class='add'>+</div><div class='add'>+/* RX MSG0 */</div><div class='add'>+#define QDMA_ETH_RXMSG_SPTAG		GENMASK(21, 14)</div><div class='add'>+/* RX MSG1 */</div><div class='add'>+#define QDMA_ETH_RXMSG_DEI_MASK		BIT(31)</div><div class='add'>+#define QDMA_ETH_RXMSG_IP6_MASK		BIT(30)</div><div class='add'>+#define QDMA_ETH_RXMSG_IP4_MASK		BIT(29)</div><div class='add'>+#define QDMA_ETH_RXMSG_IP4F_MASK	BIT(28)</div><div class='add'>+#define QDMA_ETH_RXMSG_L4_VALID_MASK	BIT(27)</div><div class='add'>+#define QDMA_ETH_RXMSG_L4F_MASK		BIT(26)</div><div class='add'>+#define QDMA_ETH_RXMSG_SPORT_MASK	GENMASK(25, 21)</div><div class='add'>+#define QDMA_ETH_RXMSG_CRSN_MASK	GENMASK(20, 16)</div><div class='add'>+#define QDMA_ETH_RXMSG_PPE_ENTRY_MASK	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_qdma_desc {</div><div class='add'>+	__le32 rsv;</div><div class='add'>+	__le32 ctrl;</div><div class='add'>+	__le32 addr;</div><div class='add'>+	__le32 data;</div><div class='add'>+	__le32 msg0;</div><div class='add'>+	__le32 msg1;</div><div class='add'>+	__le32 msg2;</div><div class='add'>+	__le32 msg3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CTRL0 */</div><div class='add'>+#define QDMA_FWD_DESC_CTX_MASK		BIT(31)</div><div class='add'>+#define QDMA_FWD_DESC_RING_MASK		GENMASK(30, 28)</div><div class='add'>+#define QDMA_FWD_DESC_IDX_MASK		GENMASK(27, 16)</div><div class='add'>+#define QDMA_FWD_DESC_LEN_MASK		GENMASK(15, 0)</div><div class='add'>+/* CTRL1 */</div><div class='add'>+#define QDMA_FWD_DESC_FIRST_IDX_MASK	GENMASK(15, 0)</div><div class='add'>+/* CTRL2 */</div><div class='add'>+#define QDMA_FWD_DESC_MORE_PKT_NUM_MASK	GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_qdma_fwd_desc {</div><div class='add'>+	__le32 addr;</div><div class='add'>+	__le32 ctrl0;</div><div class='add'>+	__le32 ctrl1;</div><div class='add'>+	__le32 ctrl2;</div><div class='add'>+	__le32 msg0;</div><div class='add'>+	__le32 msg1;</div><div class='add'>+	__le32 rsv0;</div><div class='add'>+	__le32 rsv1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* AIROHA_REGS_H */</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_tse.h b/drivers/net/ethernet/altera/altera_tse.h<br/>index 82f2363a45cd..e5a56bb989da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_tse.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/altera/altera_tse.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_tse.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_tse.h</a></div><div class='hunk'>@@ -401,9 +401,6 @@ struct altera_tse_private {</div><div class='ctx'> 	/* MAC address space */</div><div class='ctx'> 	struct altera_tse_mac __iomem *mac_dev;</div><div class='ctx'> </div><div class='del'>-	/* TSE Revision */</div><div class='del'>-	u32	revision;</div><div class='del'>-</div><div class='ctx'> 	/* mSGDMA Rx Dispatcher address space */</div><div class='ctx'> 	void __iomem *rx_dma_csr;</div><div class='ctx'> 	void __iomem *rx_dma_desc;</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c<br/>index 3f6204de9e6b..ca55c5fd11df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_tse_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/altera/altera_tse_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_tse_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_tse_main.c</a></div><div class='hunk'>@@ -892,9 +892,6 @@ static int tse_open(struct net_device *dev)</div><div class='ctx'> 		netdev_warn(dev, "device MAC address %pM\n",</div><div class='ctx'> 			    dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='del'>-	if ((priv-&gt;revision &lt; 0xd00) || (priv-&gt;revision &gt; 0xe00))</div><div class='del'>-		netdev_warn(dev, "TSE revision %x\n", priv-&gt;revision);</div><div class='del'>-</div><div class='ctx'> 	spin_lock(&amp;priv-&gt;mac_cfg_lock);</div><div class='ctx'> </div><div class='ctx'> 	ret = reset_mac(priv);</div><div class='hunk'>@@ -1142,6 +1139,7 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	void __iomem *descmap;</div><div class='ctx'> 	int ret = -ENODEV;</div><div class='add'>+	u32 revision;</div><div class='ctx'> </div><div class='ctx'> 	ndev = alloc_etherdev(sizeof(struct altera_tse_private));</div><div class='ctx'> 	if (!ndev) {</div><div class='hunk'>@@ -1150,6 +1148,7 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='add'>+	platform_set_drvdata(pdev, ndev);</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(ndev);</div><div class='ctx'> 	priv-&gt;device = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -1387,25 +1386,7 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;tx_lock);</div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;rxdma_irq_lock);</div><div class='ctx'> </div><div class='del'>-	netif_carrier_off(ndev);</div><div class='del'>-	ret = register_netdev(ndev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to register TSE net device\n");</div><div class='del'>-		goto err_register_netdev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(pdev, ndev);</div><div class='del'>-</div><div class='del'>-	priv-&gt;revision = ioread32(&amp;priv-&gt;mac_dev-&gt;megacore_revision);</div><div class='del'>-</div><div class='del'>-	if (netif_msg_probe(priv))</div><div class='del'>-		dev_info(&amp;pdev-&gt;dev, "Altera TSE MAC version %d.%d at 0x%08lx irq %d/%d\n",</div><div class='del'>-			 (priv-&gt;revision &gt;&gt; 8) &amp; 0xff,</div><div class='del'>-			 priv-&gt;revision &amp; 0xff,</div><div class='del'>-			 (unsigned long) control_port-&gt;start, priv-&gt;rx_irq,</div><div class='del'>-			 priv-&gt;tx_irq);</div><div class='del'>-</div><div class='del'>-	snprintf(mrc.name, MII_BUS_ID_SIZE, "%s-pcs-mii", ndev-&gt;name);</div><div class='add'>+	snprintf(mrc.name, MII_BUS_ID_SIZE, "%s-pcs-mii", dev_name(&amp;pdev-&gt;dev));</div><div class='ctx'> 	pcs_bus = devm_mdio_regmap_register(&amp;pdev-&gt;dev, &amp;mrc);</div><div class='ctx'> 	if (IS_ERR(pcs_bus)) {</div><div class='ctx'> 		ret = PTR_ERR(pcs_bus);</div><div class='hunk'>@@ -1442,12 +1423,30 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_init_phylink;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = register_netdev(ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to register TSE net device\n");</div><div class='add'>+		goto err_register_netdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	revision = ioread32(&amp;priv-&gt;mac_dev-&gt;megacore_revision);</div><div class='add'>+</div><div class='add'>+	if (revision &lt; 0xd00 || revision &gt; 0xe00)</div><div class='add'>+		netdev_warn(ndev, "TSE revision %x\n", revision);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_probe(priv))</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Altera TSE MAC version %d.%d at 0x%08lx irq %d/%d\n",</div><div class='add'>+			 (revision &gt;&gt; 8) &amp; 0xff, revision &amp; 0xff,</div><div class='add'>+			 (unsigned long)control_port-&gt;start, priv-&gt;rx_irq,</div><div class='add'>+			 priv-&gt;tx_irq);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_register_netdev:</div><div class='add'>+	phylink_destroy(priv-&gt;phylink);</div><div class='ctx'> err_init_phylink:</div><div class='ctx'> 	lynx_pcs_destroy(priv-&gt;pcs);</div><div class='ctx'> err_init_pcs:</div><div class='del'>-	unregister_netdev(ndev);</div><div class='del'>-err_register_netdev:</div><div class='ctx'> 	netif_napi_del(&amp;priv-&gt;napi);</div><div class='ctx'> 	altera_tse_mdio_destroy(ndev);</div><div class='ctx'> err_free_netdev:</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/Kconfig b/drivers/net/ethernet/amazon/Kconfig<br/>index c37fa393b99e..95dcc3969f0c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/Kconfig</a></div><div class='hunk'>@@ -19,7 +19,9 @@ if NET_VENDOR_AMAZON</div><div class='ctx'> config ENA_ETHERNET</div><div class='ctx'> 	tristate "Elastic Network Adapter (ENA) support"</div><div class='ctx'> 	depends on PCI_MSI &amp;&amp; !CPU_BIG_ENDIAN</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select DIMLIB</div><div class='add'>+	select NET_DEVLINK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Elastic Network Adapter (ENA)"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/Makefile b/drivers/net/ethernet/amazon/ena/Makefile<br/>index 6ab615365172..6d8036bc1823 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/Makefile</a></div><div class='hunk'>@@ -5,4 +5,4 @@</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ENA_ETHERNET) += ena.o</div><div class='ctx'> </div><div class='del'>-ena-y := ena_netdev.o ena_com.o ena_eth_com.o ena_ethtool.o ena_xdp.o</div><div class='add'>+ena-y := ena_netdev.o ena_com.o ena_eth_com.o ena_ethtool.o ena_xdp.o ena_phc.o ena_devlink.o ena_debugfs.o</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_admin_defs.h b/drivers/net/ethernet/amazon/ena/ena_admin_defs.h<br/>index 9d9fa6559354..898ecd96b96a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_admin_defs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_admin_defs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_admin_defs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_admin_defs.h</a></div><div class='hunk'>@@ -60,6 +60,7 @@ enum ena_admin_aq_feature_id {</div><div class='ctx'> 	ENA_ADMIN_AENQ_CONFIG                       = 26,</div><div class='ctx'> 	ENA_ADMIN_LINK_CONFIG                       = 27,</div><div class='ctx'> 	ENA_ADMIN_HOST_ATTR_CONFIG                  = 28,</div><div class='add'>+	ENA_ADMIN_PHC_CONFIG                        = 29,</div><div class='ctx'> 	ENA_ADMIN_FEATURES_OPCODE_NUM               = 32,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -127,6 +128,14 @@ enum ena_admin_get_stats_scope {</div><div class='ctx'> 	ENA_ADMIN_ETH_TRAFFIC                       = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum ena_admin_phc_type {</div><div class='add'>+	ENA_ADMIN_PHC_TYPE_READLESS                 = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_phc_error_flags {</div><div class='add'>+	ENA_ADMIN_PHC_ERROR_FLAG_TIMESTAMP   = BIT(0),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* ENA SRD configuration for ENI */</div><div class='ctx'> enum ena_admin_ena_srd_flags {</div><div class='ctx'> 	/* Feature enabled */</div><div class='hunk'>@@ -943,7 +952,9 @@ struct ena_admin_host_info {</div><div class='ctx'> 	 * 4 : rss_configurable_function_key</div><div class='ctx'> 	 * 5 : reserved</div><div class='ctx'> 	 * 6 : rx_page_reuse</div><div class='del'>-	 * 31:7 : reserved</div><div class='add'>+	 * 7 : reserved</div><div class='add'>+	 * 8 : phc</div><div class='add'>+	 * 31:9 : reserved</div><div class='ctx'> 	 */</div><div class='ctx'> 	u32 driver_supported_features;</div><div class='ctx'> };</div><div class='hunk'>@@ -975,7 +986,7 @@ struct ena_admin_feature_rss_ind_table {</div><div class='ctx'> 	struct ena_admin_rss_ind_table_entry inline_entry;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* When hint value is 0, driver should use it's own predefined value */</div><div class='add'>+/* When hint value is 0, driver should use its own predefined value */</div><div class='ctx'> struct ena_admin_ena_hw_hints {</div><div class='ctx'> 	/* value in ms */</div><div class='ctx'> 	u16 mmio_read_timeout;</div><div class='hunk'>@@ -1023,6 +1034,43 @@ struct ena_admin_queue_ext_feature_desc {</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ena_admin_feature_phc_desc {</div><div class='add'>+	/* PHC type as defined in enum ena_admin_get_phc_type,</div><div class='add'>+	 * used only for GET command.</div><div class='add'>+	 */</div><div class='add'>+	u8 type;</div><div class='add'>+</div><div class='add'>+	/* Reserved - MBZ */</div><div class='add'>+	u8 reserved1[3];</div><div class='add'>+</div><div class='add'>+	/* PHC doorbell address as an offset to PCIe MMIO REG BAR,</div><div class='add'>+	 * used only for GET command.</div><div class='add'>+	 */</div><div class='add'>+	u32 doorbell_offset;</div><div class='add'>+</div><div class='add'>+	/* Max time for valid PHC retrieval, passing this threshold will</div><div class='add'>+	 * fail the get-time request and block PHC requests for</div><div class='add'>+	 * block_timeout_usec, used only for GET command.</div><div class='add'>+	 */</div><div class='add'>+	u32 expire_timeout_usec;</div><div class='add'>+</div><div class='add'>+	/* PHC requests block period, blocking starts if PHC request expired</div><div class='add'>+	 * in order to prevent floods on busy device,</div><div class='add'>+	 * used only for GET command.</div><div class='add'>+	 */</div><div class='add'>+	u32 block_timeout_usec;</div><div class='add'>+</div><div class='add'>+	/* Shared PHC physical address (ena_admin_phc_resp),</div><div class='add'>+	 * used only for SET command.</div><div class='add'>+	 */</div><div class='add'>+	struct ena_common_mem_addr output_address;</div><div class='add'>+</div><div class='add'>+	/* Shared PHC Size (ena_admin_phc_resp),</div><div class='add'>+	 * used only for SET command.</div><div class='add'>+	 */</div><div class='add'>+	u32 output_length;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ena_admin_get_feat_resp {</div><div class='ctx'> 	struct ena_admin_acq_common_desc acq_common_desc;</div><div class='ctx'> </div><div class='hunk'>@@ -1052,6 +1100,8 @@ struct ena_admin_get_feat_resp {</div><div class='ctx'> 		struct ena_admin_feature_intr_moder_desc intr_moderation;</div><div class='ctx'> </div><div class='ctx'> 		struct ena_admin_ena_hw_hints hw_hints;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_feature_phc_desc phc;</div><div class='ctx'> 	} u;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1085,6 +1135,9 @@ struct ena_admin_set_feat_cmd {</div><div class='ctx'> </div><div class='ctx'> 		/* LLQ configuration */</div><div class='ctx'> 		struct ena_admin_feature_llq_desc llq;</div><div class='add'>+</div><div class='add'>+		/* PHC configuration */</div><div class='add'>+		struct ena_admin_feature_phc_desc phc;</div><div class='ctx'> 	} u;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1162,6 +1215,23 @@ struct ena_admin_ena_mmio_req_read_less_resp {</div><div class='ctx'> 	u32 reg_val;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ena_admin_phc_resp {</div><div class='add'>+	/* Request Id, received from DB register */</div><div class='add'>+	u16 req_id;</div><div class='add'>+</div><div class='add'>+	u8 reserved1[6];</div><div class='add'>+</div><div class='add'>+	/* PHC timestamp (nsec) */</div><div class='add'>+	u64 timestamp;</div><div class='add'>+</div><div class='add'>+	u8 reserved2[12];</div><div class='add'>+</div><div class='add'>+	/* Bit field of enum ena_admin_phc_error_flags */</div><div class='add'>+	u32 error_flags;</div><div class='add'>+</div><div class='add'>+	u8 reserved3[32];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* aq_common_desc */</div><div class='ctx'> #define ENA_ADMIN_AQ_COMMON_DESC_COMMAND_ID_MASK            GENMASK(11, 0)</div><div class='ctx'> #define ENA_ADMIN_AQ_COMMON_DESC_PHASE_MASK                 BIT(0)</div><div class='hunk'>@@ -1260,6 +1330,8 @@ struct ena_admin_ena_mmio_req_read_less_resp {</div><div class='ctx'> #define ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK BIT(4)</div><div class='ctx'> #define ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_SHIFT             6</div><div class='ctx'> #define ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_MASK              BIT(6)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_PHC_SHIFT                       8</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_PHC_MASK                        BIT(8)</div><div class='ctx'> </div><div class='ctx'> /* aenq_common_desc */</div><div class='ctx'> #define ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK               BIT(0)</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_com.c b/drivers/net/ethernet/amazon/ena/ena_com.c<br/>index d958cda9e58b..e67b592e5697 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_com.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_com.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_com.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_com.c</a></div><div class='hunk'>@@ -41,6 +41,12 @@</div><div class='ctx'> </div><div class='ctx'> #define ENA_MAX_ADMIN_POLL_US 5000</div><div class='ctx'> </div><div class='add'>+/* PHC definitions */</div><div class='add'>+#define ENA_PHC_DEFAULT_EXPIRE_TIMEOUT_USEC 10</div><div class='add'>+#define ENA_PHC_DEFAULT_BLOCK_TIMEOUT_USEC 1000</div><div class='add'>+#define ENA_PHC_REQ_ID_OFFSET 0xDEAD</div><div class='add'>+#define ENA_PHC_ERROR_FLAGS (ENA_ADMIN_PHC_ERROR_FLAG_TIMESTAMP)</div><div class='add'>+</div><div class='ctx'> /*****************************************************************************/</div><div class='ctx'> /*****************************************************************************/</div><div class='ctx'> /*****************************************************************************/</div><div class='hunk'>@@ -763,25 +769,16 @@ static int ena_com_wait_and_process_admin_cq_interrupts(struct ena_comp_ctx *com</div><div class='ctx'> </div><div class='ctx'> 		if (comp_ctx-&gt;status == ENA_CMD_COMPLETED) {</div><div class='ctx'> 			netdev_err(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='del'>-				   "The ena device sent a completion but the driver didn't receive a MSI-X interrupt (cmd %d), autopolling mode is %s\n",</div><div class='del'>-				   comp_ctx-&gt;cmd_opcode, admin_queue-&gt;auto_polling ? "ON" : "OFF");</div><div class='del'>-			/* Check if fallback to polling is enabled */</div><div class='del'>-			if (admin_queue-&gt;auto_polling)</div><div class='del'>-				admin_queue-&gt;polling = true;</div><div class='add'>+				   "The ena device sent a completion but the driver didn't receive a MSI-X interrupt (cmd %d)\n",</div><div class='add'>+				   comp_ctx-&gt;cmd_opcode);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			netdev_err(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='ctx'> 				   "The ena device didn't send a completion for the admin cmd %d status %d\n",</div><div class='ctx'> 				   comp_ctx-&gt;cmd_opcode, comp_ctx-&gt;status);</div><div class='ctx'> 		}</div><div class='del'>-		/* Check if shifted to polling mode.</div><div class='del'>-		 * This will happen if there is a completion without an interrupt</div><div class='del'>-		 * and autopolling mode is enabled. Continuing normal execution in such case</div><div class='del'>-		 */</div><div class='del'>-		if (!admin_queue-&gt;polling) {</div><div class='del'>-			admin_queue-&gt;running_state = false;</div><div class='del'>-			ret = -ETIME;</div><div class='del'>-			goto err;</div><div class='del'>-		}</div><div class='add'>+		admin_queue-&gt;running_state = false;</div><div class='add'>+		ret = -ETIME;</div><div class='add'>+		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = ena_com_comp_status_to_errno(admin_queue, comp_ctx-&gt;comp_status);</div><div class='hunk'>@@ -1650,10 +1647,265 @@ void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling)</div><div class='ctx'> 	ena_dev-&gt;admin_queue.polling = polling;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ena_com_set_admin_auto_polling_mode(struct ena_com_dev *ena_dev,</div><div class='del'>-					 bool polling)</div><div class='add'>+bool ena_com_phc_supported(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	return ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_PHC_CONFIG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_phc_init(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_phc_info *phc = &amp;ena_dev-&gt;phc;</div><div class='add'>+</div><div class='add'>+	memset(phc, 0x0, sizeof(*phc));</div><div class='add'>+</div><div class='add'>+	/* Allocate shared mem used PHC timestamp retrieved from device */</div><div class='add'>+	phc-&gt;virt_addr = dma_alloc_coherent(ena_dev-&gt;dmadev,</div><div class='add'>+					    sizeof(*phc-&gt;virt_addr),</div><div class='add'>+					    &amp;phc-&gt;phys_addr,</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+	if (unlikely(!phc-&gt;virt_addr))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;phc-&gt;lock);</div><div class='add'>+</div><div class='add'>+	phc-&gt;virt_addr-&gt;req_id = 0;</div><div class='add'>+	phc-&gt;virt_addr-&gt;timestamp = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_phc_config(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_phc_info *phc = &amp;ena_dev-&gt;phc;</div><div class='add'>+	struct ena_admin_get_feat_resp get_feat_resp;</div><div class='add'>+	struct ena_admin_set_feat_resp set_feat_resp;</div><div class='add'>+	struct ena_admin_set_feat_cmd set_feat_cmd;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Get device PHC default configuration */</div><div class='add'>+	ret = ena_com_get_feature(ena_dev,</div><div class='add'>+				  &amp;get_feat_resp,</div><div class='add'>+				  ENA_ADMIN_PHC_CONFIG,</div><div class='add'>+				  0);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Failed to get PHC feature configuration, error: %d\n",</div><div class='add'>+			   ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Supporting only readless PHC retrieval */</div><div class='add'>+	if (get_feat_resp.u.phc.type != ENA_ADMIN_PHC_TYPE_READLESS) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Unsupported PHC type, error: %d\n",</div><div class='add'>+			   -EOPNOTSUPP);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update PHC doorbell offset according to device value,</div><div class='add'>+	 * used to write req_id to PHC bar</div><div class='add'>+	 */</div><div class='add'>+	phc-&gt;doorbell_offset = get_feat_resp.u.phc.doorbell_offset;</div><div class='add'>+</div><div class='add'>+	/* Update PHC expire timeout according to device</div><div class='add'>+	 * or default driver value</div><div class='add'>+	 */</div><div class='add'>+	phc-&gt;expire_timeout_usec = (get_feat_resp.u.phc.expire_timeout_usec) ?</div><div class='add'>+				    get_feat_resp.u.phc.expire_timeout_usec :</div><div class='add'>+				    ENA_PHC_DEFAULT_EXPIRE_TIMEOUT_USEC;</div><div class='add'>+</div><div class='add'>+	/* Update PHC block timeout according to device</div><div class='add'>+	 * or default driver value</div><div class='add'>+	 */</div><div class='add'>+	phc-&gt;block_timeout_usec = (get_feat_resp.u.phc.block_timeout_usec) ?</div><div class='add'>+				   get_feat_resp.u.phc.block_timeout_usec :</div><div class='add'>+				   ENA_PHC_DEFAULT_BLOCK_TIMEOUT_USEC;</div><div class='add'>+</div><div class='add'>+	/* Sanity check - expire timeout must not exceed block timeout */</div><div class='add'>+	if (phc-&gt;expire_timeout_usec &gt; phc-&gt;block_timeout_usec)</div><div class='add'>+		phc-&gt;expire_timeout_usec = phc-&gt;block_timeout_usec;</div><div class='add'>+</div><div class='add'>+	/* Prepare PHC feature command */</div><div class='add'>+	memset(&amp;set_feat_cmd, 0x0, sizeof(set_feat_cmd));</div><div class='add'>+	set_feat_cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;</div><div class='add'>+	set_feat_cmd.feat_common.feature_id = ENA_ADMIN_PHC_CONFIG;</div><div class='add'>+	set_feat_cmd.u.phc.output_length = sizeof(*phc-&gt;virt_addr);</div><div class='add'>+	ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+				   &amp;set_feat_cmd.u.phc.output_address,</div><div class='add'>+				   phc-&gt;phys_addr);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Failed setting PHC output address, error: %d\n",</div><div class='add'>+			   ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Send PHC feature command to the device */</div><div class='add'>+	ret = ena_com_execute_admin_command(&amp;ena_dev-&gt;admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;set_feat_cmd,</div><div class='add'>+					    sizeof(set_feat_cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;set_feat_resp,</div><div class='add'>+					    sizeof(set_feat_resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Failed to enable PHC, error: %d\n",</div><div class='add'>+			   ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phc-&gt;active = true;</div><div class='add'>+	netdev_dbg(ena_dev-&gt;net_device, "PHC is active in the device\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_phc_destroy(struct ena_com_dev *ena_dev)</div><div class='ctx'> {</div><div class='del'>-	ena_dev-&gt;admin_queue.auto_polling = polling;</div><div class='add'>+	struct ena_com_phc_info *phc = &amp;ena_dev-&gt;phc;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+</div><div class='add'>+	/* In case PHC is not supported by the device, silently exiting */</div><div class='add'>+	if (!phc-&gt;virt_addr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;phc-&gt;lock, flags);</div><div class='add'>+	phc-&gt;active = false;</div><div class='add'>+	spin_unlock_irqrestore(&amp;phc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(ena_dev-&gt;dmadev,</div><div class='add'>+			  sizeof(*phc-&gt;virt_addr),</div><div class='add'>+			  phc-&gt;virt_addr,</div><div class='add'>+			  phc-&gt;phys_addr);</div><div class='add'>+	phc-&gt;virt_addr = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_phc_get_timestamp(struct ena_com_dev *ena_dev, u64 *timestamp)</div><div class='add'>+{</div><div class='add'>+	volatile struct ena_admin_phc_resp *resp = ena_dev-&gt;phc.virt_addr;</div><div class='add'>+	const ktime_t zero_system_time = ktime_set(0, 0);</div><div class='add'>+	struct ena_com_phc_info *phc = &amp;ena_dev-&gt;phc;</div><div class='add'>+	ktime_t expire_time;</div><div class='add'>+	ktime_t block_time;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!phc-&gt;active) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "PHC feature is not active in the device\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;phc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Check if PHC is in blocked state */</div><div class='add'>+	if (unlikely(ktime_compare(phc-&gt;system_time, zero_system_time))) {</div><div class='add'>+		/* Check if blocking time expired */</div><div class='add'>+		block_time = ktime_add_us(phc-&gt;system_time, phc-&gt;block_timeout_usec);</div><div class='add'>+		if (!ktime_after(ktime_get(), block_time)) {</div><div class='add'>+			/* PHC is still in blocked state, skip PHC request */</div><div class='add'>+			phc-&gt;stats.phc_skp++;</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			goto skip;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* PHC is in active state, update statistics according</div><div class='add'>+		 * to req_id and error_flags</div><div class='add'>+		 */</div><div class='add'>+		if (READ_ONCE(resp-&gt;req_id) != phc-&gt;req_id) {</div><div class='add'>+			/* Device didn't update req_id during blocking time,</div><div class='add'>+			 * this indicates on a device error</div><div class='add'>+			 */</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+				   "PHC get time request 0x%x failed (device error)\n",</div><div class='add'>+				   phc-&gt;req_id);</div><div class='add'>+			phc-&gt;stats.phc_err_dv++;</div><div class='add'>+		} else if (resp-&gt;error_flags &amp; ENA_PHC_ERROR_FLAGS) {</div><div class='add'>+			/* Device updated req_id during blocking time but got</div><div class='add'>+			 * a PHC error, this occurs if device:</div><div class='add'>+			 * - exceeded the get time request limit</div><div class='add'>+			 * - received an invalid timestamp</div><div class='add'>+			 */</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+				   "PHC get time request 0x%x failed (error 0x%x)\n",</div><div class='add'>+				   phc-&gt;req_id,</div><div class='add'>+				   resp-&gt;error_flags);</div><div class='add'>+			phc-&gt;stats.phc_err_ts += !!(resp-&gt;error_flags &amp;</div><div class='add'>+				ENA_ADMIN_PHC_ERROR_FLAG_TIMESTAMP);</div><div class='add'>+		} else {</div><div class='add'>+			/* Device updated req_id during blocking time</div><div class='add'>+			 * with valid timestamp</div><div class='add'>+			 */</div><div class='add'>+			phc-&gt;stats.phc_exp++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Setting relative timeouts */</div><div class='add'>+	phc-&gt;system_time = ktime_get();</div><div class='add'>+	block_time = ktime_add_us(phc-&gt;system_time, phc-&gt;block_timeout_usec);</div><div class='add'>+	expire_time = ktime_add_us(phc-&gt;system_time, phc-&gt;expire_timeout_usec);</div><div class='add'>+</div><div class='add'>+	/* We expect the device to return this req_id once</div><div class='add'>+	 * the new PHC timestamp is updated</div><div class='add'>+	 */</div><div class='add'>+	phc-&gt;req_id++;</div><div class='add'>+</div><div class='add'>+	/* Initialize PHC shared memory with different req_id value</div><div class='add'>+	 * to be able to identify once the device changes it to req_id</div><div class='add'>+	 */</div><div class='add'>+	resp-&gt;req_id = phc-&gt;req_id + ENA_PHC_REQ_ID_OFFSET;</div><div class='add'>+</div><div class='add'>+	/* Writing req_id to PHC bar */</div><div class='add'>+	writel(phc-&gt;req_id, ena_dev-&gt;reg_bar + phc-&gt;doorbell_offset);</div><div class='add'>+</div><div class='add'>+	/* Stalling until the device updates req_id */</div><div class='add'>+	while (1) {</div><div class='add'>+		if (unlikely(ktime_after(ktime_get(), expire_time))) {</div><div class='add'>+			/* Gave up waiting for updated req_id, PHC enters into</div><div class='add'>+			 * blocked state until passing blocking time,</div><div class='add'>+			 * during this time any get PHC timestamp will fail with</div><div class='add'>+			 * device busy error</div><div class='add'>+			 */</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Check if req_id was updated by the device */</div><div class='add'>+		if (READ_ONCE(resp-&gt;req_id) != phc-&gt;req_id) {</div><div class='add'>+			/* req_id was not updated by the device yet,</div><div class='add'>+			 * check again on next loop</div><div class='add'>+			 */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* req_id was updated by the device which indicates that</div><div class='add'>+		 * PHC timestamp and error_flags are updated too,</div><div class='add'>+		 * checking errors before retrieving timestamp</div><div class='add'>+		 */</div><div class='add'>+		if (unlikely(resp-&gt;error_flags &amp; ENA_PHC_ERROR_FLAGS)) {</div><div class='add'>+			/* Retrieved invalid PHC timestamp, PHC enters into</div><div class='add'>+			 * blocked state until passing blocking time,</div><div class='add'>+			 * during this time any get PHC timestamp requests</div><div class='add'>+			 * will fail with device busy error</div><div class='add'>+			 */</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* PHC timestamp value is returned to the caller */</div><div class='add'>+		*timestamp = resp-&gt;timestamp;</div><div class='add'>+</div><div class='add'>+		/* Update statistic on valid PHC timestamp retrieval */</div><div class='add'>+		phc-&gt;stats.phc_cnt++;</div><div class='add'>+</div><div class='add'>+		/* This indicates PHC state is active */</div><div class='add'>+		phc-&gt;system_time = zero_system_time;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+skip:</div><div class='add'>+	spin_unlock_irqrestore(&amp;phc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev)</div><div class='hunk'>@@ -2198,21 +2450,6 @@ int ena_com_get_ena_srd_info(struct ena_com_dev *ena_dev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,</div><div class='del'>-				struct ena_admin_basic_stats *stats)</div><div class='del'>-{</div><div class='del'>-	struct ena_com_stats_ctx ctx;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	memset(&amp;ctx, 0x0, sizeof(ctx));</div><div class='del'>-	ret = ena_get_dev_stats(ena_dev, &amp;ctx, ENA_ADMIN_GET_STATS_TYPE_BASIC);</div><div class='del'>-	if (likely(ret == 0))</div><div class='del'>-		memcpy(stats, &amp;ctx.get_resp.u.basic_stats,</div><div class='del'>-		       sizeof(ctx.get_resp.u.basic_stats));</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int ena_com_get_customer_metrics(struct ena_com_dev *ena_dev, char *buffer, u32 len)</div><div class='ctx'> {</div><div class='ctx'> 	struct ena_admin_aq_get_stats_cmd *get_cmd;</div><div class='hunk'>@@ -2289,24 +2526,6 @@ int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, u32 mtu)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,</div><div class='del'>-				 struct ena_admin_feature_offload_desc *offload)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	struct ena_admin_get_feat_resp resp;</div><div class='del'>-</div><div class='del'>-	ret = ena_com_get_feature(ena_dev, &amp;resp,</div><div class='del'>-				  ENA_ADMIN_STATELESS_OFFLOAD_CONFIG, 0);</div><div class='del'>-	if (unlikely(ret)) {</div><div class='del'>-		netdev_err(ena_dev-&gt;net_device, "Failed to get offload capabilities %d\n", ret);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memcpy(offload, &amp;resp.u.offload, sizeof(resp.u.offload));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int ena_com_set_hash_function(struct ena_com_dev *ena_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_com.h b/drivers/net/ethernet/amazon/ena/ena_com.h<br/>index a372c5e768a7..64df2c48c9a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_com.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_com.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_com.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_com.h</a></div><div class='hunk'>@@ -210,6 +210,14 @@ struct ena_com_stats_admin {</div><div class='ctx'> 	u64 no_completion;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ena_com_stats_phc {</div><div class='add'>+	u64 phc_cnt;</div><div class='add'>+	u64 phc_exp;</div><div class='add'>+	u64 phc_skp;</div><div class='add'>+	u64 phc_err_dv;</div><div class='add'>+	u64 phc_err_ts;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ena_com_admin_queue {</div><div class='ctx'> 	void *q_dmadev;</div><div class='ctx'> 	struct ena_com_dev *ena_dev;</div><div class='hunk'>@@ -224,9 +232,6 @@ struct ena_com_admin_queue {</div><div class='ctx'> 	/* Indicate if the admin queue should poll for completion */</div><div class='ctx'> 	bool polling;</div><div class='ctx'> </div><div class='del'>-	/* Define if fallback to polling mode should occur */</div><div class='del'>-	bool auto_polling;</div><div class='del'>-</div><div class='ctx'> 	u16 curr_cmd_id;</div><div class='ctx'> </div><div class='ctx'> 	/* Indicate that the ena was initialized and can</div><div class='hunk'>@@ -261,6 +266,47 @@ struct ena_com_mmio_read {</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* PTP hardware clock (PHC) MMIO read data info */</div><div class='add'>+struct ena_com_phc_info {</div><div class='add'>+	/* Internal PHC statistics */</div><div class='add'>+	struct ena_com_stats_phc stats;</div><div class='add'>+</div><div class='add'>+	/* PHC shared memory - virtual address */</div><div class='add'>+	struct ena_admin_phc_resp *virt_addr;</div><div class='add'>+</div><div class='add'>+	/* System time of last PHC request */</div><div class='add'>+	ktime_t system_time;</div><div class='add'>+</div><div class='add'>+	/* Spin lock to ensure a single outstanding PHC read */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+</div><div class='add'>+	/* PHC doorbell address as an offset to PCIe MMIO REG BAR */</div><div class='add'>+	u32 doorbell_offset;</div><div class='add'>+</div><div class='add'>+	/* Shared memory read expire timeout (usec)</div><div class='add'>+	 * Max time for valid PHC retrieval, passing this threshold will fail</div><div class='add'>+	 * the get time request and block new PHC requests for block_timeout_usec</div><div class='add'>+	 * in order to prevent floods on busy device</div><div class='add'>+	 */</div><div class='add'>+	u32 expire_timeout_usec;</div><div class='add'>+</div><div class='add'>+	/* Shared memory read abort timeout (usec)</div><div class='add'>+	 * PHC requests block period, blocking starts once PHC request expired</div><div class='add'>+	 * in order to prevent floods on busy device,</div><div class='add'>+	 * any PHC requests during block period will be skipped</div><div class='add'>+	 */</div><div class='add'>+	u32 block_timeout_usec;</div><div class='add'>+</div><div class='add'>+	/* PHC shared memory - physical address */</div><div class='add'>+	dma_addr_t phys_addr;</div><div class='add'>+</div><div class='add'>+	/* Request id sent to the device */</div><div class='add'>+	u16 req_id;</div><div class='add'>+</div><div class='add'>+	/* True if PHC is active in the device */</div><div class='add'>+	bool active;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ena_rss {</div><div class='ctx'> 	/* Indirect table */</div><div class='ctx'> 	u16 *host_rss_ind_tbl;</div><div class='hunk'>@@ -320,6 +366,7 @@ struct ena_com_dev {</div><div class='ctx'> 	u32 ena_min_poll_delay_us;</div><div class='ctx'> </div><div class='ctx'> 	struct ena_com_mmio_read mmio_read;</div><div class='add'>+	struct ena_com_phc_info phc;</div><div class='ctx'> </div><div class='ctx'> 	struct ena_rss rss;</div><div class='ctx'> 	u32 supported_features;</div><div class='hunk'>@@ -385,6 +432,40 @@ struct ena_aenq_handlers {</div><div class='ctx'>  */</div><div class='ctx'> int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);</div><div class='ctx'> </div><div class='add'>+/* ena_com_phc_init - Allocate and initialize PHC feature</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @note: This method assumes PHC is supported by the device</div><div class='add'>+ * @return - 0 on success, negative value on failure</div><div class='add'>+ */</div><div class='add'>+int ena_com_phc_init(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_phc_supported - Return if PHC feature is supported by the device</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @note: This method must be called after getting supported features</div><div class='add'>+ * @return - supported or not</div><div class='add'>+ */</div><div class='add'>+bool ena_com_phc_supported(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_phc_config - Configure PHC feature</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * Configure PHC feature in driver and device</div><div class='add'>+ * @note: This method assumes PHC is supported by the device</div><div class='add'>+ * @return - 0 on success, negative value on failure</div><div class='add'>+ */</div><div class='add'>+int ena_com_phc_config(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_phc_destroy - Destroy PHC feature</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ */</div><div class='add'>+void ena_com_phc_destroy(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_phc_get_timestamp - Retrieve PHC timestamp</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @timestamp: Retrieved PHC timestamp</div><div class='add'>+ * @return - 0 on success, negative value on failure</div><div class='add'>+ */</div><div class='add'>+int ena_com_phc_get_timestamp(struct ena_com_dev *ena_dev, u64 *timestamp);</div><div class='add'>+</div><div class='ctx'> /* ena_com_set_mmio_read_mode - Enable/disable the indirect mmio reg read mechanism</div><div class='ctx'>  * @ena_dev: ENA communication layer struct</div><div class='ctx'>  * @readless_supported: readless mode (enable/disable)</div><div class='hunk'>@@ -493,17 +574,6 @@ bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);</div><div class='ctx'>  */</div><div class='ctx'> void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);</div><div class='ctx'> </div><div class='del'>-/* ena_com_set_admin_auto_polling_mode - Enable autoswitch to polling mode</div><div class='del'>- * @ena_dev: ENA communication layer struct</div><div class='del'>- * @polling: Enable/Disable polling mode</div><div class='del'>- *</div><div class='del'>- * Set the autopolling mode.</div><div class='del'>- * If autopolling is on:</div><div class='del'>- * In case of missing interrupt when data is available switch to polling.</div><div class='del'>- */</div><div class='del'>-void ena_com_set_admin_auto_polling_mode(struct ena_com_dev *ena_dev,</div><div class='del'>-					 bool polling);</div><div class='del'>-</div><div class='ctx'> /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler</div><div class='ctx'>  * @ena_dev: ENA communication layer struct</div><div class='ctx'>  *</div><div class='hunk'>@@ -591,15 +661,6 @@ int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);</div><div class='ctx'> int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,</div><div class='ctx'> 			      struct ena_com_dev_get_features_ctx *get_feat_ctx);</div><div class='ctx'> </div><div class='del'>-/* ena_com_get_dev_basic_stats - Get device basic statistics</div><div class='del'>- * @ena_dev: ENA communication layer struct</div><div class='del'>- * @stats: stats return value</div><div class='del'>- *</div><div class='del'>- * @return: 0 on Success and negative value otherwise.</div><div class='del'>- */</div><div class='del'>-int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,</div><div class='del'>-				struct ena_admin_basic_stats *stats);</div><div class='del'>-</div><div class='ctx'> /* ena_com_get_eni_stats - Get extended network interface statistics</div><div class='ctx'>  * @ena_dev: ENA communication layer struct</div><div class='ctx'>  * @stats: stats return value</div><div class='hunk'>@@ -635,15 +696,6 @@ int ena_com_get_customer_metrics(struct ena_com_dev *ena_dev, char *buffer, u32</div><div class='ctx'>  */</div><div class='ctx'> int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, u32 mtu);</div><div class='ctx'> </div><div class='del'>-/* ena_com_get_offload_settings - Retrieve the device offloads capabilities</div><div class='del'>- * @ena_dev: ENA communication layer struct</div><div class='del'>- * @offlad: offload return value</div><div class='del'>- *</div><div class='del'>- * @return: 0 on Success and negative value otherwise.</div><div class='del'>- */</div><div class='del'>-int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,</div><div class='del'>-				 struct ena_admin_feature_offload_desc *offload);</div><div class='del'>-</div><div class='ctx'> /* ena_com_rss_init - Init RSS</div><div class='ctx'>  * @ena_dev: ENA communication layer struct</div><div class='ctx'>  * @log_size: indirection log size</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_debugfs.c b/drivers/net/ethernet/amazon/ena/ena_debugfs.c<br/>new file mode 100644<br/>index 000000000000..46ed80986724<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) Amazon.com, Inc. or its affiliates.</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include "ena_debugfs.h"</div><div class='add'>+#include "ena_phc.h"</div><div class='add'>+</div><div class='add'>+static int phc_stats_show(struct seq_file *file, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = file-&gt;private;</div><div class='add'>+</div><div class='add'>+	if (!ena_phc_is_active(adapter))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	seq_printf(file,</div><div class='add'>+		   "phc_cnt: %llu\n",</div><div class='add'>+		   adapter-&gt;ena_dev-&gt;phc.stats.phc_cnt);</div><div class='add'>+	seq_printf(file,</div><div class='add'>+		   "phc_exp: %llu\n",</div><div class='add'>+		   adapter-&gt;ena_dev-&gt;phc.stats.phc_exp);</div><div class='add'>+	seq_printf(file,</div><div class='add'>+		   "phc_skp: %llu\n",</div><div class='add'>+		   adapter-&gt;ena_dev-&gt;phc.stats.phc_skp);</div><div class='add'>+	seq_printf(file,</div><div class='add'>+		   "phc_err_dv: %llu\n",</div><div class='add'>+		   adapter-&gt;ena_dev-&gt;phc.stats.phc_err_dv);</div><div class='add'>+	seq_printf(file,</div><div class='add'>+		   "phc_err_ts: %llu\n",</div><div class='add'>+		   adapter-&gt;ena_dev-&gt;phc.stats.phc_err_ts);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(phc_stats);</div><div class='add'>+</div><div class='add'>+void ena_debugfs_init(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;debugfs_base =</div><div class='add'>+		debugfs_create_dir(dev_name(&amp;adapter-&gt;pdev-&gt;dev), NULL);</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("phc_stats",</div><div class='add'>+			    0400,</div><div class='add'>+			    adapter-&gt;debugfs_base,</div><div class='add'>+			    adapter,</div><div class='add'>+			    &amp;phc_stats_fops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_debugfs_terminate(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	debugfs_remove_recursive(adapter-&gt;debugfs_base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_DEBUG_FS */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_debugfs.h b/drivers/net/ethernet/amazon/ena/ena_debugfs.h<br/>new file mode 100644<br/>index 000000000000..dc61dd998867<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_debugfs.h</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) Amazon.com, Inc. or its affiliates.</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ENA_DEBUGFS_H__</div><div class='add'>+#define __ENA_DEBUGFS_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include "ena_netdev.h"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+</div><div class='add'>+void ena_debugfs_init(struct net_device *dev);</div><div class='add'>+</div><div class='add'>+void ena_debugfs_terminate(struct net_device *dev);</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_DEBUG_FS */</div><div class='add'>+</div><div class='add'>+static inline void ena_debugfs_init(struct net_device *dev) {}</div><div class='add'>+</div><div class='add'>+static inline void ena_debugfs_terminate(struct net_device *dev) {}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_DEBUG_FS */</div><div class='add'>+</div><div class='add'>+#endif /* __ENA_DEBUGFS_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_devlink.c b/drivers/net/ethernet/amazon/ena/ena_devlink.c<br/>new file mode 100644<br/>index 000000000000..ac81c24016dd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_devlink.c</a></div><div class='hunk'>@@ -0,0 +1,210 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) Amazon.com, Inc. or its affiliates.</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "linux/pci.h"</div><div class='add'>+#include "ena_devlink.h"</div><div class='add'>+#include "ena_phc.h"</div><div class='add'>+</div><div class='add'>+static int ena_devlink_enable_phc_validate(struct devlink *devlink, u32 id,</div><div class='add'>+					   union devlink_param_value val,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+</div><div class='add'>+	if (!val.vbool)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_phc_supported(adapter-&gt;ena_dev)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Device doesn't support PHC");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_param ena_devlink_params[] = {</div><div class='add'>+	DEVLINK_PARAM_GENERIC(ENABLE_PHC,</div><div class='add'>+			      BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),</div><div class='add'>+			      NULL,</div><div class='add'>+			      NULL,</div><div class='add'>+			      ena_devlink_enable_phc_validate),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ena_devlink_params_get(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+	union devlink_param_value val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = devl_param_driverinit_value_get(devlink,</div><div class='add'>+					      DEVLINK_PARAM_GENERIC_ID_ENABLE_PHC,</div><div class='add'>+					      &amp;val);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Failed to query PHC param\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_phc_enable(adapter, val.vbool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_devlink_disable_phc_param(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	union devlink_param_value value;</div><div class='add'>+</div><div class='add'>+	value.vbool = false;</div><div class='add'>+	devl_param_driverinit_value_set(devlink,</div><div class='add'>+					DEVLINK_PARAM_GENERIC_ID_ENABLE_PHC,</div><div class='add'>+					value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_devlink_port_register(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+	struct devlink_port_attrs attrs = {};</div><div class='add'>+</div><div class='add'>+	attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;</div><div class='add'>+	devlink_port_attrs_set(&amp;adapter-&gt;devlink_port, &amp;attrs);</div><div class='add'>+	devl_port_register(devlink, &amp;adapter-&gt;devlink_port, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_devlink_port_unregister(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+</div><div class='add'>+	devl_port_unregister(&amp;adapter-&gt;devlink_port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_devlink_reload_down(struct devlink *devlink,</div><div class='add'>+				   bool netns_change,</div><div class='add'>+				   enum devlink_reload_action action,</div><div class='add'>+				   enum devlink_reload_limit limit,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+</div><div class='add'>+	if (netns_change) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Namespace change is not supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_devlink_port_unregister(devlink);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	ena_destroy_device(adapter, false);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_devlink_reload_up(struct devlink *devlink,</div><div class='add'>+				 enum devlink_reload_action action,</div><div class='add'>+				 enum devlink_reload_limit limit,</div><div class='add'>+				 u32 *actions_performed,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	/* Check that no other routine initialized the device (e.g.</div><div class='add'>+	 * ena_fw_reset_device()). Also we're under devlink_mutex here,</div><div class='add'>+	 * so devlink isn't freed under our feet.</div><div class='add'>+	 */</div><div class='add'>+	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &amp;adapter-&gt;flags))</div><div class='add'>+		err = ena_restore_device(adapter);</div><div class='add'>+</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	ena_devlink_port_register(devlink);</div><div class='add'>+</div><div class='add'>+	if (!err)</div><div class='add'>+		*actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_ops ena_devlink_ops = {</div><div class='add'>+	.reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT),</div><div class='add'>+	.reload_down	= ena_devlink_reload_down,</div><div class='add'>+	.reload_up	= ena_devlink_reload_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ena_devlink_configure_params(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+	union devlink_param_value value;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = devlink_params_register(devlink, ena_devlink_params,</div><div class='add'>+				     ARRAY_SIZE(ena_devlink_params));</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Failed to register devlink params\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	value.vbool = ena_phc_is_enabled(adapter);</div><div class='add'>+	devl_param_driverinit_value_set(devlink,</div><div class='add'>+					DEVLINK_PARAM_GENERIC_ID_ENABLE_PHC,</div><div class='add'>+					value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct devlink *ena_devlink_alloc(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+</div><div class='add'>+	devlink = devlink_alloc(&amp;ena_devlink_ops,</div><div class='add'>+				sizeof(struct ena_adapter *),</div><div class='add'>+				dev);</div><div class='add'>+	if (!devlink) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev,</div><div class='add'>+			   "Failed to allocate devlink struct\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ENA_DEVLINK_PRIV(devlink) = adapter;</div><div class='add'>+	adapter-&gt;devlink = devlink;</div><div class='add'>+</div><div class='add'>+	if (ena_devlink_configure_params(devlink))</div><div class='add'>+		goto free_devlink;</div><div class='add'>+</div><div class='add'>+	return devlink;</div><div class='add'>+</div><div class='add'>+free_devlink:</div><div class='add'>+	devlink_free(devlink);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_devlink_configure_params_clean(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	devlink_params_unregister(devlink, ena_devlink_params,</div><div class='add'>+				  ARRAY_SIZE(ena_devlink_params));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_devlink_free(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	ena_devlink_configure_params_clean(devlink);</div><div class='add'>+</div><div class='add'>+	devlink_free(devlink);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_devlink_register(struct devlink *devlink, struct device *dev)</div><div class='add'>+{</div><div class='add'>+	devl_lock(devlink);</div><div class='add'>+	ena_devlink_port_register(devlink);</div><div class='add'>+	devl_register(devlink);</div><div class='add'>+	devl_unlock(devlink);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_devlink_unregister(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	devl_lock(devlink);</div><div class='add'>+	ena_devlink_port_unregister(devlink);</div><div class='add'>+	devl_unregister(devlink);</div><div class='add'>+	devl_unlock(devlink);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_devlink.h b/drivers/net/ethernet/amazon/ena/ena_devlink.h<br/>new file mode 100644<br/>index 000000000000..7a19ce4830d9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_devlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_devlink.h</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) Amazon.com, Inc. or its affiliates.</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#ifndef DEVLINK_H</div><div class='add'>+#define DEVLINK_H</div><div class='add'>+</div><div class='add'>+#include "ena_netdev.h"</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#define ENA_DEVLINK_PRIV(devlink) \</div><div class='add'>+	(*(struct ena_adapter **)devlink_priv(devlink))</div><div class='add'>+</div><div class='add'>+struct devlink *ena_devlink_alloc(struct ena_adapter *adapter);</div><div class='add'>+void ena_devlink_free(struct devlink *devlink);</div><div class='add'>+void ena_devlink_register(struct devlink *devlink, struct device *dev);</div><div class='add'>+void ena_devlink_unregister(struct devlink *devlink);</div><div class='add'>+void ena_devlink_params_get(struct devlink *devlink);</div><div class='add'>+void ena_devlink_disable_phc_param(struct devlink *devlink);</div><div class='add'>+</div><div class='add'>+#endif /* DEVLINK_H */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_ethtool.c b/drivers/net/ethernet/amazon/ena/ena_ethtool.c<br/>index 60fb35ec4b15..fe3479b84a1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_ethtool.c</a></div><div class='hunk'>@@ -5,9 +5,11 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ena_netdev.h"</div><div class='ctx'> #include "ena_xdp.h"</div><div class='add'>+#include "ena_phc.h"</div><div class='ctx'> </div><div class='ctx'> struct ena_stats {</div><div class='ctx'> 	char name[ETH_GSTRING_LEN];</div><div class='hunk'>@@ -298,6 +300,18 @@ static void ena_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 	ena_get_stats(adapter, data, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ena_get_ts_info(struct net_device *netdev,</div><div class='add'>+			   struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE;</div><div class='add'>+</div><div class='add'>+	info-&gt;phc_index = ena_phc_get_index(adapter);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ena_get_sw_stats_count(struct ena_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	return adapter-&gt;num_io_queues * (ENA_STATS_ARRAY_TX + ENA_STATS_ARRAY_RX)</div><div class='hunk'>@@ -721,9 +735,11 @@ static u16 ena_flow_data_to_flow_hash(u32 hash_fields)</div><div class='ctx'> 	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ena_get_rss_hash(struct ena_com_dev *ena_dev,</div><div class='del'>-			    struct ethtool_rxnfc *cmd)</div><div class='add'>+static int ena_get_rxfh_fields(struct net_device *netdev,</div><div class='add'>+			       struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='ctx'> 	enum ena_admin_flow_hash_proto proto;</div><div class='ctx'> 	u16 hash_fields;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -772,9 +788,12 @@ static int ena_get_rss_hash(struct ena_com_dev *ena_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ena_set_rss_hash(struct ena_com_dev *ena_dev,</div><div class='del'>-			    struct ethtool_rxnfc *cmd)</div><div class='add'>+static int ena_set_rxfh_fields(struct net_device *netdev,</div><div class='add'>+			       const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='ctx'> 	enum ena_admin_flow_hash_proto proto;</div><div class='ctx'> 	u16 hash_fields;</div><div class='ctx'> </div><div class='hunk'>@@ -816,26 +835,6 @@ static int ena_set_rss_hash(struct ena_com_dev *ena_dev,</div><div class='ctx'> 	return ena_com_fill_hash_ctrl(ena_dev, proto, hash_fields);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ena_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *info)</div><div class='del'>-{</div><div class='del'>-	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	int rc = 0;</div><div class='del'>-</div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		rc = ena_set_rss_hash(adapter-&gt;ena_dev, info);</div><div class='del'>-		break;</div><div class='del'>-	case ETHTOOL_SRXCLSRLDEL:</div><div class='del'>-	case ETHTOOL_SRXCLSRLINS:</div><div class='del'>-	default:</div><div class='del'>-		netif_err(adapter, drv, netdev,</div><div class='del'>-			  "Command parameter %d is not supported\n", info-&gt;cmd);</div><div class='del'>-		rc = -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ena_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *info,</div><div class='ctx'> 			 u32 *rules)</div><div class='ctx'> {</div><div class='hunk'>@@ -847,9 +846,6 @@ static int ena_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *info,</div><div class='ctx'> 		info-&gt;data = adapter-&gt;num_io_queues;</div><div class='ctx'> 		rc = 0;</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		rc = ena_get_rss_hash(adapter-&gt;ena_dev, info);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 	case ETHTOOL_GRXCLSRULE:</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLALL:</div><div class='hunk'>@@ -869,7 +865,10 @@ static u32 ena_get_rxfh_indir_size(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> static u32 ena_get_rxfh_key_size(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	return ENA_HASH_KEY_SIZE;</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ena_rss *rss = &amp;adapter-&gt;ena_dev-&gt;rss;</div><div class='add'>+</div><div class='add'>+	return rss-&gt;hash_key ? ENA_HASH_KEY_SIZE : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ena_indirection_table_set(struct ena_adapter *adapter,</div><div class='hunk'>@@ -1098,16 +1097,17 @@ static const struct ethtool_ops ena_ethtool_ops = {</div><div class='ctx'> 	.get_strings		= ena_get_ethtool_strings,</div><div class='ctx'> 	.get_ethtool_stats      = ena_get_ethtool_stats,</div><div class='ctx'> 	.get_rxnfc		= ena_get_rxnfc,</div><div class='del'>-	.set_rxnfc		= ena_set_rxnfc,</div><div class='ctx'> 	.get_rxfh_indir_size    = ena_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh_key_size	= ena_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh		= ena_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= ena_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= ena_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= ena_set_rxfh_fields,</div><div class='ctx'> 	.get_channels		= ena_get_channels,</div><div class='ctx'> 	.set_channels		= ena_set_channels,</div><div class='ctx'> 	.get_tunable		= ena_get_tunable,</div><div class='ctx'> 	.set_tunable		= ena_set_tunable,</div><div class='del'>-	.get_ts_info            = ethtool_op_get_ts_info,</div><div class='add'>+	.get_ts_info		= ena_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void ena_set_ethtool_ops(struct net_device *netdev)</div><div class='hunk'>@@ -1129,22 +1129,18 @@ static void ena_dump_stats_ex(struct ena_adapter *adapter, u8 *buf)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	strings_buf = devm_kcalloc(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='del'>-				   ETH_GSTRING_LEN, strings_num,</div><div class='del'>-				   GFP_ATOMIC);</div><div class='add'>+	strings_buf = kcalloc(strings_num, ETH_GSTRING_LEN, GFP_ATOMIC);</div><div class='ctx'> 	if (!strings_buf) {</div><div class='ctx'> 		netif_err(adapter, drv, netdev,</div><div class='ctx'> 			  "Failed to allocate strings_buf\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	data_buf = devm_kcalloc(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='del'>-				strings_num, sizeof(u64),</div><div class='del'>-				GFP_ATOMIC);</div><div class='add'>+	data_buf = kcalloc(strings_num, sizeof(u64), GFP_ATOMIC);</div><div class='ctx'> 	if (!data_buf) {</div><div class='ctx'> 		netif_err(adapter, drv, netdev,</div><div class='ctx'> 			  "Failed to allocate data buf\n");</div><div class='del'>-		devm_kfree(&amp;adapter-&gt;pdev-&gt;dev, strings_buf);</div><div class='add'>+		kfree(strings_buf);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1166,8 +1162,8 @@ static void ena_dump_stats_ex(struct ena_adapter *adapter, u8 *buf)</div><div class='ctx'> 				  strings_buf + i * ETH_GSTRING_LEN,</div><div class='ctx'> 				  data_buf[i]);</div><div class='ctx'> </div><div class='del'>-	devm_kfree(&amp;adapter-&gt;pdev-&gt;dev, strings_buf);</div><div class='del'>-	devm_kfree(&amp;adapter-&gt;pdev-&gt;dev, data_buf);</div><div class='add'>+	kfree(strings_buf);</div><div class='add'>+	kfree(data_buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf)</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_netdev.c b/drivers/net/ethernet/amazon/ena/ena_netdev.c<br/>index 63c8a2328142..92d149d4f091 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_netdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_netdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_netdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_netdev.c</a></div><div class='hunk'>@@ -5,9 +5,6 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_RFS_ACCEL</div><div class='del'>-#include &lt;linux/cpu_rmap.h&gt;</div><div class='del'>-#endif /* CONFIG_RFS_ACCEL */</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -22,6 +19,12 @@</div><div class='ctx'> #include "ena_pci_id_tbl.h"</div><div class='ctx'> #include "ena_xdp.h"</div><div class='ctx'> </div><div class='add'>+#include "ena_phc.h"</div><div class='add'>+</div><div class='add'>+#include "ena_devlink.h"</div><div class='add'>+</div><div class='add'>+#include "ena_debugfs.h"</div><div class='add'>+</div><div class='ctx'> MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");</div><div class='ctx'> MODULE_DESCRIPTION(DEVICE_NAME);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='hunk'>@@ -42,8 +45,6 @@ MODULE_DEVICE_TABLE(pci, ena_pci_tbl);</div><div class='ctx'> </div><div class='ctx'> static int ena_rss_init_default(struct ena_adapter *adapter);</div><div class='ctx'> static void check_for_admin_com_state(struct ena_adapter *adapter);</div><div class='del'>-static int ena_destroy_device(struct ena_adapter *adapter, bool graceful);</div><div class='del'>-static int ena_restore_device(struct ena_adapter *adapter);</div><div class='ctx'> </div><div class='ctx'> static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='hunk'>@@ -74,7 +75,7 @@ static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> 	if (threshold &lt; time_since_last_napi &amp;&amp; napi_scheduled) {</div><div class='ctx'> 		netdev_err(dev,</div><div class='ctx'> 			   "napi handler hasn't been called for a long time but is scheduled\n");</div><div class='del'>-			   reset_reason = ENA_REGS_RESET_SUSPECTED_POLL_STARVATION;</div><div class='add'>+		reset_reason = ENA_REGS_RESET_SUSPECTED_POLL_STARVATION;</div><div class='ctx'> 	}</div><div class='ctx'> schedule_reset:</div><div class='ctx'> 	/* Change the state of the device to trigger reset</div><div class='hunk'>@@ -162,30 +163,6 @@ int ena_xmit_common(struct ena_adapter *adapter,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-#ifdef CONFIG_RFS_ACCEL</div><div class='del'>-	u32 i;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	adapter-&gt;netdev-&gt;rx_cpu_rmap = alloc_irq_cpu_rmap(adapter-&gt;num_io_queues);</div><div class='del'>-	if (!adapter-&gt;netdev-&gt;rx_cpu_rmap)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++) {</div><div class='del'>-		int irq_idx = ENA_IO_IRQ_IDX(i);</div><div class='del'>-</div><div class='del'>-		rc = irq_cpu_rmap_add(adapter-&gt;netdev-&gt;rx_cpu_rmap,</div><div class='del'>-				      pci_irq_vector(adapter-&gt;pdev, irq_idx));</div><div class='del'>-		if (rc) {</div><div class='del'>-			free_irq_cpu_rmap(adapter-&gt;netdev-&gt;rx_cpu_rmap);</div><div class='del'>-			adapter-&gt;netdev-&gt;rx_cpu_rmap = NULL;</div><div class='del'>-			return rc;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#endif /* CONFIG_RFS_ACCEL */</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void ena_init_io_rings_common(struct ena_adapter *adapter,</div><div class='ctx'> 				     struct ena_ring *ring, u16 qid)</div><div class='ctx'> {</div><div class='hunk'>@@ -1596,7 +1573,7 @@ static int ena_enable_msix(struct ena_adapter *adapter)</div><div class='ctx'> 		adapter-&gt;num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ena_init_rx_cpu_rmap(adapter))</div><div class='add'>+	if (netif_enable_cpu_rmap(adapter-&gt;netdev, adapter-&gt;num_io_queues))</div><div class='ctx'> 		netif_warn(adapter, probe, adapter-&gt;netdev,</div><div class='ctx'> 			   "Failed to map IRQs to CPUs\n");</div><div class='ctx'> </div><div class='hunk'>@@ -1742,16 +1719,13 @@ static void ena_free_io_irq(struct ena_adapter *adapter)</div><div class='ctx'> 	struct ena_irq *irq;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_RFS_ACCEL</div><div class='del'>-	if (adapter-&gt;msix_vecs &gt;= 1) {</div><div class='del'>-		free_irq_cpu_rmap(adapter-&gt;netdev-&gt;rx_cpu_rmap);</div><div class='del'>-		adapter-&gt;netdev-&gt;rx_cpu_rmap = NULL;</div><div class='del'>-	}</div><div class='del'>-#endif /* CONFIG_RFS_ACCEL */</div><div class='del'>-</div><div class='ctx'> 	for (i = ENA_IO_IRQ_FIRST_IDX; i &lt; ENA_MAX_MSIX_VEC(io_queue_count); i++) {</div><div class='add'>+		struct ena_napi *ena_napi;</div><div class='add'>+</div><div class='ctx'> 		irq = &amp;adapter-&gt;irq_tbl[i];</div><div class='ctx'> 		irq_set_affinity_hint(irq-&gt;vector, NULL);</div><div class='add'>+		ena_napi = irq-&gt;data;</div><div class='add'>+		netif_napi_set_irq(&amp;ena_napi-&gt;napi, -1);</div><div class='ctx'> 		free_irq(irq-&gt;vector, irq-&gt;data);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1807,7 +1781,7 @@ static void ena_init_napi_in_range(struct ena_adapter *adapter,</div><div class='ctx'> 		if (ENA_IS_XDP_INDEX(adapter, i))</div><div class='ctx'> 			napi_handler = ena_xdp_io_poll;</div><div class='ctx'> </div><div class='del'>-		netif_napi_add(adapter-&gt;netdev, &amp;napi-&gt;napi, napi_handler);</div><div class='add'>+		netif_napi_add_config(adapter-&gt;netdev, &amp;napi-&gt;napi, napi_handler, i);</div><div class='ctx'> </div><div class='ctx'> 		if (!ENA_IS_XDP_INDEX(adapter, i))</div><div class='ctx'> 			napi-&gt;rx_ring = rx_ring;</div><div class='hunk'>@@ -2773,7 +2747,8 @@ static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pd</div><div class='ctx'> 		ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK |</div><div class='ctx'> 		ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK |</div><div class='ctx'> 		ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK |</div><div class='del'>-		ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_MASK;</div><div class='add'>+		ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_MASK |</div><div class='add'>+		ENA_ADMIN_HOST_INFO_PHC_MASK;</div><div class='ctx'> </div><div class='ctx'> 	rc = ena_com_set_host_attributes(ena_dev);</div><div class='ctx'> 	if (rc) {</div><div class='hunk'>@@ -3165,6 +3140,8 @@ static int ena_device_init(struct ena_adapter *adapter, struct pci_dev *pdev,</div><div class='ctx'> 		goto err_mmio_read_less;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ena_devlink_params_get(adapter-&gt;devlink);</div><div class='add'>+</div><div class='ctx'> 	/* ENA admin level init */</div><div class='ctx'> 	rc = ena_com_admin_init(ena_dev, &amp;aenq_handlers);</div><div class='ctx'> 	if (rc) {</div><div class='hunk'>@@ -3218,6 +3195,10 @@ static int ena_device_init(struct ena_adapter *adapter, struct pci_dev *pdev,</div><div class='ctx'> 	if (unlikely(rc))</div><div class='ctx'> 		goto err_admin_init;</div><div class='ctx'> </div><div class='add'>+	rc = ena_phc_init(adapter);</div><div class='add'>+	if (unlikely(rc &amp;&amp; (rc != -EOPNOTSUPP)))</div><div class='add'>+		netdev_err(netdev, "Failed initializing PHC, error: %d\n", rc);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_admin_init:</div><div class='hunk'>@@ -3263,7 +3244,7 @@ err_disable_msix:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ena_destroy_device(struct ena_adapter *adapter, bool graceful)</div><div class='add'>+int ena_destroy_device(struct ena_adapter *adapter, bool graceful)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = adapter-&gt;netdev;</div><div class='ctx'> 	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='hunk'>@@ -3275,7 +3256,7 @@ static int ena_destroy_device(struct ena_adapter *adapter, bool graceful)</div><div class='ctx'> </div><div class='ctx'> 	netif_carrier_off(netdev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;timer_service);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;timer_service);</div><div class='ctx'> </div><div class='ctx'> 	dev_up = test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags);</div><div class='ctx'> 	adapter-&gt;dev_up_before_reset = dev_up;</div><div class='hunk'>@@ -3301,6 +3282,8 @@ static int ena_destroy_device(struct ena_adapter *adapter, bool graceful)</div><div class='ctx'> </div><div class='ctx'> 	ena_com_admin_destroy(ena_dev);</div><div class='ctx'> </div><div class='add'>+	ena_phc_destroy(adapter);</div><div class='add'>+</div><div class='ctx'> 	ena_com_mmio_reg_read_request_destroy(ena_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* return reset reason to default value */</div><div class='hunk'>@@ -3312,7 +3295,7 @@ static int ena_destroy_device(struct ena_adapter *adapter, bool graceful)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ena_restore_device(struct ena_adapter *adapter)</div><div class='add'>+int ena_restore_device(struct ena_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct ena_com_dev_get_features_ctx get_feat_ctx;</div><div class='ctx'> 	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='hunk'>@@ -3374,6 +3357,7 @@ err_device_destroy:</div><div class='ctx'> 	ena_com_wait_for_abort_completion(ena_dev);</div><div class='ctx'> 	ena_com_admin_destroy(ena_dev);</div><div class='ctx'> 	ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);</div><div class='add'>+	ena_phc_destroy(adapter);</div><div class='ctx'> 	ena_com_mmio_reg_read_request_destroy(ena_dev);</div><div class='ctx'> err:</div><div class='ctx'> 	clear_bit(ENA_FLAG_DEVICE_RUNNING, &amp;adapter-&gt;flags);</div><div class='hunk'>@@ -3697,7 +3681,8 @@ static void ena_update_host_info(struct ena_admin_host_info *host_info,</div><div class='ctx'> </div><div class='ctx'> static void ena_timer_service(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ena_adapter *adapter = from_timer(adapter, t, timer_service);</div><div class='add'>+	struct ena_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							 timer_service);</div><div class='ctx'> 	u8 *debug_area = adapter-&gt;ena_dev-&gt;host_attr.debug_area_virt_addr;</div><div class='ctx'> 	struct ena_admin_host_info *host_info =</div><div class='ctx'> 		adapter-&gt;ena_dev-&gt;host_attr.host_info;</div><div class='hunk'>@@ -3896,6 +3881,7 @@ static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	struct ena_adapter *adapter;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	static int adapters_found;</div><div class='add'>+	struct devlink *devlink;</div><div class='ctx'> 	u32 max_num_io_queues;</div><div class='ctx'> 	bool wd_state;</div><div class='ctx'> 	int bars, rc;</div><div class='hunk'>@@ -3961,10 +3947,16 @@ static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, adapter);</div><div class='ctx'> </div><div class='add'>+	rc = ena_phc_alloc(adapter);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(netdev, "ena_phc_alloc failed\n");</div><div class='add'>+		goto err_netdev_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	rc = ena_com_allocate_customer_metrics_buffer(ena_dev);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		netdev_err(netdev, "ena_com_allocate_customer_metrics_buffer failed\n");</div><div class='del'>-		goto err_netdev_destroy;</div><div class='add'>+		goto err_free_phc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rc = ena_map_llq_mem_bar(pdev, ena_dev, bars);</div><div class='hunk'>@@ -3973,12 +3965,20 @@ static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_metrics_destroy;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Need to do this before ena_device_init */</div><div class='add'>+	devlink = ena_devlink_alloc(adapter);</div><div class='add'>+	if (!devlink) {</div><div class='add'>+		netdev_err(netdev, "ena_devlink_alloc failed\n");</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_metrics_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	rc = ena_device_init(adapter, pdev, &amp;get_feat_ctx, &amp;wd_state);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "ENA device init failed\n");</div><div class='ctx'> 		if (rc == -ETIME)</div><div class='ctx'> 			rc = -EPROBE_DEFER;</div><div class='del'>-		goto err_metrics_destroy;</div><div class='add'>+		goto ena_devlink_destroy;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Initial TX and RX interrupt delay. Assumes 1 usec granularity.</div><div class='hunk'>@@ -4062,6 +4062,8 @@ static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_rss;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ena_debugfs_init(netdev);</div><div class='add'>+</div><div class='ctx'> 	INIT_WORK(&amp;adapter-&gt;reset_task, ena_fw_reset_device);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;last_keep_alive_jiffies = jiffies;</div><div class='hunk'>@@ -4083,6 +4085,12 @@ static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	adapters_found++;</div><div class='ctx'> </div><div class='add'>+	/* From this point, the devlink device is visible to users.</div><div class='add'>+	 * Perform the registration last to ensure that all the resources</div><div class='add'>+	 * are available and that the netdevice is registered.</div><div class='add'>+	 */</div><div class='add'>+	ena_devlink_register(devlink, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_rss:</div><div class='hunk'>@@ -4095,12 +4103,16 @@ err_free_msix:</div><div class='ctx'> 	ena_free_mgmnt_irq(adapter);</div><div class='ctx'> 	ena_disable_msix(adapter);</div><div class='ctx'> err_worker_destroy:</div><div class='del'>-	del_timer(&amp;adapter-&gt;timer_service);</div><div class='add'>+	timer_delete(&amp;adapter-&gt;timer_service);</div><div class='ctx'> err_device_destroy:</div><div class='ctx'> 	ena_com_delete_host_info(ena_dev);</div><div class='ctx'> 	ena_com_admin_destroy(ena_dev);</div><div class='add'>+ena_devlink_destroy:</div><div class='add'>+	ena_devlink_free(devlink);</div><div class='ctx'> err_metrics_destroy:</div><div class='ctx'> 	ena_com_delete_customer_metrics_buffer(ena_dev);</div><div class='add'>+err_free_phc:</div><div class='add'>+	ena_phc_free(adapter);</div><div class='ctx'> err_netdev_destroy:</div><div class='ctx'> 	free_netdev(netdev);</div><div class='ctx'> err_free_region:</div><div class='hunk'>@@ -4131,23 +4143,23 @@ static void __ena_shutoff(struct pci_dev *pdev, bool shutdown)</div><div class='ctx'> 	ena_dev = adapter-&gt;ena_dev;</div><div class='ctx'> 	netdev = adapter-&gt;netdev;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_RFS_ACCEL</div><div class='del'>-	if ((adapter-&gt;msix_vecs &gt;= 1) &amp;&amp; (netdev-&gt;rx_cpu_rmap)) {</div><div class='del'>-		free_irq_cpu_rmap(netdev-&gt;rx_cpu_rmap);</div><div class='del'>-		netdev-&gt;rx_cpu_rmap = NULL;</div><div class='del'>-	}</div><div class='add'>+	ena_debugfs_terminate(netdev);</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_RFS_ACCEL */</div><div class='ctx'> 	/* Make sure timer and reset routine won't be called after</div><div class='ctx'> 	 * freeing device resources.</div><div class='ctx'> 	 */</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;timer_service);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;timer_service);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock(); /* lock released inside the below if-else block */</div><div class='ctx'> 	adapter-&gt;reset_reason = ENA_REGS_RESET_SHUTDOWN;</div><div class='ctx'> 	ena_destroy_device(adapter, true);</div><div class='ctx'> </div><div class='add'>+	ena_phc_free(adapter);</div><div class='add'>+</div><div class='add'>+	ena_devlink_unregister(adapter-&gt;devlink);</div><div class='add'>+	ena_devlink_free(adapter-&gt;devlink);</div><div class='add'>+</div><div class='ctx'> 	if (shutdown) {</div><div class='ctx'> 		netif_device_detach(netdev);</div><div class='ctx'> 		dev_close(netdev);</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_netdev.h b/drivers/net/ethernet/amazon/ena/ena_netdev.h<br/>index 6e12ae3b12e5..006f9a3acea6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_netdev.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_netdev.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_netdev.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_netdev.h</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='ctx'> #include &lt;uapi/linux/bpf.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ena_com.h"</div><div class='ctx'> #include "ena_eth_com.h"</div><div class='hunk'>@@ -110,6 +111,8 @@</div><div class='ctx'> </div><div class='ctx'> #define ENA_MMIO_DISABLE_REG_READ	BIT(0)</div><div class='ctx'> </div><div class='add'>+struct ena_phc_info;</div><div class='add'>+</div><div class='ctx'> struct ena_irq {</div><div class='ctx'> 	irq_handler_t handler;</div><div class='ctx'> 	void *data;</div><div class='hunk'>@@ -348,6 +351,8 @@ struct ena_adapter {</div><div class='ctx'> </div><div class='ctx'> 	char name[ENA_NAME_MAX_LEN];</div><div class='ctx'> </div><div class='add'>+	struct ena_phc_info *phc_info;</div><div class='add'>+</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	/* TX */</div><div class='ctx'> 	struct ena_ring tx_ring[ENA_MAX_NUM_IO_QUEUES]</div><div class='hunk'>@@ -383,6 +388,13 @@ struct ena_adapter {</div><div class='ctx'> 	struct bpf_prog *xdp_bpf_prog;</div><div class='ctx'> 	u32 xdp_first_ring;</div><div class='ctx'> 	u32 xdp_num_queues;</div><div class='add'>+</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	struct devlink_port devlink_port;</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+</div><div class='add'>+	struct dentry *debugfs_base;</div><div class='add'>+#endif /* CONFIG_DEBUG_FS */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void ena_set_ethtool_ops(struct net_device *netdev);</div><div class='hunk'>@@ -412,6 +424,8 @@ static inline void ena_reset_device(struct ena_adapter *adapter,</div><div class='ctx'> 	set_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int ena_destroy_device(struct ena_adapter *adapter, bool graceful);</div><div class='add'>+int ena_restore_device(struct ena_adapter *adapter);</div><div class='ctx'> int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,</div><div class='ctx'> 			  struct ena_tx_buffer *tx_info, bool is_xdp);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_phc.c b/drivers/net/ethernet/amazon/ena/ena_phc.c<br/>new file mode 100644<br/>index 000000000000..7867e893fd15<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_phc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_phc.c</a></div><div class='hunk'>@@ -0,0 +1,233 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2022 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include "ena_netdev.h"</div><div class='add'>+#include "ena_phc.h"</div><div class='add'>+#include "ena_devlink.h"</div><div class='add'>+</div><div class='add'>+static int ena_phc_adjtime(struct ptp_clock_info *clock_info, s64 delta)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_phc_adjfine(struct ptp_clock_info *clock_info, long scaled_ppm)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_phc_feature_enable(struct ptp_clock_info *clock_info,</div><div class='add'>+				  struct ptp_clock_request *rq,</div><div class='add'>+				  int on)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_phc_gettimex64(struct ptp_clock_info *clock_info,</div><div class='add'>+			      struct timespec64 *ts,</div><div class='add'>+			      struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	struct ena_phc_info *phc_info =</div><div class='add'>+		container_of(clock_info, struct ena_phc_info, clock_info);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u64 timestamp_nsec;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;phc_info-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	ptp_read_system_prets(sts);</div><div class='add'>+</div><div class='add'>+	rc = ena_com_phc_get_timestamp(phc_info-&gt;adapter-&gt;ena_dev,</div><div class='add'>+				       &amp;timestamp_nsec);</div><div class='add'>+</div><div class='add'>+	ptp_read_system_postts(sts);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;phc_info-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	*ts = ns_to_timespec64(timestamp_nsec);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_phc_settime64(struct ptp_clock_info *clock_info,</div><div class='add'>+			     const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ptp_clock_info ena_ptp_clock_info = {</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.n_alarm	= 0,</div><div class='add'>+	.n_ext_ts	= 0,</div><div class='add'>+	.n_per_out	= 0,</div><div class='add'>+	.pps		= 0,</div><div class='add'>+	.adjtime	= ena_phc_adjtime,</div><div class='add'>+	.adjfine	= ena_phc_adjfine,</div><div class='add'>+	.gettimex64	= ena_phc_gettimex64,</div><div class='add'>+	.settime64	= ena_phc_settime64,</div><div class='add'>+	.enable		= ena_phc_feature_enable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Enable/Disable PHC by the kernel, affects on the next init flow */</div><div class='add'>+void ena_phc_enable(struct ena_adapter *adapter, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct ena_phc_info *phc_info = adapter-&gt;phc_info;</div><div class='add'>+</div><div class='add'>+	if (!phc_info) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "phc_info is not allocated\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phc_info-&gt;enabled = enable;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Check if PHC is enabled by the kernel */</div><div class='add'>+bool ena_phc_is_enabled(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_phc_info *phc_info = adapter-&gt;phc_info;</div><div class='add'>+</div><div class='add'>+	return (phc_info &amp;&amp; phc_info-&gt;enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* PHC is activated if ptp clock is registered in the kernel */</div><div class='add'>+bool ena_phc_is_active(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_phc_info *phc_info = adapter-&gt;phc_info;</div><div class='add'>+</div><div class='add'>+	return (phc_info &amp;&amp; phc_info-&gt;clock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_phc_register(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='add'>+	struct ptp_clock_info *clock_info;</div><div class='add'>+	struct ena_phc_info *phc_info;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	phc_info = adapter-&gt;phc_info;</div><div class='add'>+	clock_info = &amp;phc_info-&gt;clock_info;</div><div class='add'>+</div><div class='add'>+	/* PHC may already be registered in case of a reset */</div><div class='add'>+	if (ena_phc_is_active(adapter))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	phc_info-&gt;adapter = adapter;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;phc_info-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Fill the ptp_clock_info struct and register PTP clock */</div><div class='add'>+	*clock_info = ena_ptp_clock_info;</div><div class='add'>+	snprintf(clock_info-&gt;name,</div><div class='add'>+		 sizeof(clock_info-&gt;name),</div><div class='add'>+		 "ena-ptp-%02x",</div><div class='add'>+		 PCI_SLOT(pdev-&gt;devfn));</div><div class='add'>+</div><div class='add'>+	phc_info-&gt;clock = ptp_clock_register(clock_info, &amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(phc_info-&gt;clock)) {</div><div class='add'>+		rc = PTR_ERR(phc_info-&gt;clock);</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Failed registering ptp clock, error: %d\n",</div><div class='add'>+			   rc);</div><div class='add'>+		phc_info-&gt;clock = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_phc_unregister(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_phc_info *phc_info = adapter-&gt;phc_info;</div><div class='add'>+</div><div class='add'>+	/* During reset flow, PHC must stay registered</div><div class='add'>+	 * to keep kernel's PHC index</div><div class='add'>+	 */</div><div class='add'>+	if (ena_phc_is_active(adapter) &amp;&amp;</div><div class='add'>+	    !test_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags)) {</div><div class='add'>+		ptp_clock_unregister(phc_info-&gt;clock);</div><div class='add'>+		phc_info-&gt;clock = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_phc_alloc(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	/* Allocate driver specific PHC info */</div><div class='add'>+	adapter-&gt;phc_info = vzalloc(sizeof(*adapter-&gt;phc_info));</div><div class='add'>+	if (unlikely(!adapter-&gt;phc_info)) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Failed to alloc phc_info\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_phc_free(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (adapter-&gt;phc_info) {</div><div class='add'>+		vfree(adapter-&gt;phc_info);</div><div class='add'>+		adapter-&gt;phc_info = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_phc_init(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	int rc = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Validate PHC feature is supported in the device */</div><div class='add'>+	if (!ena_com_phc_supported(ena_dev)) {</div><div class='add'>+		netdev_dbg(netdev, "PHC feature is not supported by the device\n");</div><div class='add'>+		goto err_ena_com_phc_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Validate PHC feature is enabled by the kernel */</div><div class='add'>+	if (!ena_phc_is_enabled(adapter)) {</div><div class='add'>+		netdev_dbg(netdev, "PHC feature is not enabled by the kernel\n");</div><div class='add'>+		goto err_ena_com_phc_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize device specific PHC info */</div><div class='add'>+	rc = ena_com_phc_init(ena_dev);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		netdev_err(netdev, "Failed to init phc, error: %d\n", rc);</div><div class='add'>+		goto err_ena_com_phc_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure PHC feature in driver and device */</div><div class='add'>+	rc = ena_com_phc_config(ena_dev);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		netdev_err(netdev, "Failed to config phc, error: %d\n", rc);</div><div class='add'>+		goto err_ena_com_phc_config;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Register to PTP class driver */</div><div class='add'>+	rc = ena_phc_register(adapter);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		netdev_err(netdev, "Failed to register phc, error: %d\n", rc);</div><div class='add'>+		goto err_ena_com_phc_config;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_ena_com_phc_config:</div><div class='add'>+	ena_com_phc_destroy(ena_dev);</div><div class='add'>+err_ena_com_phc_init:</div><div class='add'>+	ena_phc_enable(adapter, false);</div><div class='add'>+	ena_devlink_disable_phc_param(adapter-&gt;devlink);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_phc_destroy(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	ena_phc_unregister(adapter);</div><div class='add'>+	ena_com_phc_destroy(adapter-&gt;ena_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_phc_get_index(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (ena_phc_is_active(adapter))</div><div class='add'>+		return ptp_clock_index(adapter-&gt;phc_info-&gt;clock);</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_phc.h b/drivers/net/ethernet/amazon/ena/ena_phc.h<br/>new file mode 100644<br/>index 000000000000..7364fe714e44<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_phc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_phc.h</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2022 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef ENA_PHC_H</div><div class='add'>+#define ENA_PHC_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+</div><div class='add'>+struct ena_phc_info {</div><div class='add'>+	/* PTP hardware capabilities */</div><div class='add'>+	struct ptp_clock_info clock_info;</div><div class='add'>+</div><div class='add'>+	/* Registered PTP clock device */</div><div class='add'>+	struct ptp_clock *clock;</div><div class='add'>+</div><div class='add'>+	/* Adapter specific private data structure */</div><div class='add'>+	struct ena_adapter *adapter;</div><div class='add'>+</div><div class='add'>+	/* PHC lock */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+</div><div class='add'>+	/* Enabled by kernel */</div><div class='add'>+	bool enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ena_phc_enable(struct ena_adapter *adapter, bool enable);</div><div class='add'>+bool ena_phc_is_enabled(struct ena_adapter *adapter);</div><div class='add'>+bool ena_phc_is_active(struct ena_adapter *adapter);</div><div class='add'>+int ena_phc_get_index(struct ena_adapter *adapter);</div><div class='add'>+int ena_phc_init(struct ena_adapter *adapter);</div><div class='add'>+void ena_phc_destroy(struct ena_adapter *adapter);</div><div class='add'>+int ena_phc_alloc(struct ena_adapter *adapter);</div><div class='add'>+void ena_phc_free(struct ena_adapter *adapter);</div><div class='add'>+</div><div class='add'>+#endif /* ENA_PHC_H */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_regs_defs.h b/drivers/net/ethernet/amazon/ena/ena_regs_defs.h<br/>index a2efebafd686..51068dc1cc2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_regs_defs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amazon/ena/ena_regs_defs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_regs_defs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_regs_defs.h</a></div><div class='hunk'>@@ -53,6 +53,11 @@ enum ena_regs_reset_reason_types {</div><div class='ctx'> #define ENA_REGS_MMIO_RESP_HI_OFF                           0x64</div><div class='ctx'> #define ENA_REGS_RSS_IND_ENTRY_UPDATE_OFF                   0x68</div><div class='ctx'> </div><div class='add'>+/* phc_registers offsets */</div><div class='add'>+</div><div class='add'>+/* 100 base */</div><div class='add'>+#define ENA_REGS_PHC_DB_OFF                                 0x100</div><div class='add'>+</div><div class='ctx'> /* version register */</div><div class='ctx'> #define ENA_REGS_VERSION_MINOR_VERSION_MASK                 0xff</div><div class='ctx'> #define ENA_REGS_VERSION_MAJOR_VERSION_SHIFT                8</div><div class='hunk'>@@ -129,4 +134,7 @@ enum ena_regs_reset_reason_types {</div><div class='ctx'> #define ENA_REGS_RSS_IND_ENTRY_UPDATE_CQ_IDX_SHIFT          16</div><div class='ctx'> #define ENA_REGS_RSS_IND_ENTRY_UPDATE_CQ_IDX_MASK           0xffff0000</div><div class='ctx'> </div><div class='add'>+/* phc_db_req_id register */</div><div class='add'>+#define ENA_REGS_PHC_DB_REQ_ID_MASK                         0xffff</div><div class='add'>+</div><div class='ctx'> #endif /* _ENA_REGS_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/amd/Kconfig b/drivers/net/ethernet/amd/Kconfig<br/>index b39c6f3e1eda..d54dca3074eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/Kconfig</a></div><div class='hunk'>@@ -165,6 +165,7 @@ config AMD_XGBE</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	select AMD_XGBE_HAVE_ECC if X86</div><div class='add'>+	select NET_SELFTESTS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the AMD 10GbE Ethernet device found on an</div><div class='ctx'> 	  AMD SoC.</div><div class='head'>diff --git a/drivers/net/ethernet/amd/a2065.c b/drivers/net/ethernet/amd/a2065.c<br/>index 1ca26a8c40eb..ce9445425045 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/a2065.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/a2065.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/a2065.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/a2065.c</a></div><div class='hunk'>@@ -486,7 +486,7 @@ static int lance_close(struct net_device *dev)</div><div class='ctx'> 	volatile struct lance_regs *ll = lp-&gt;ll;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;multicast_timer);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;multicast_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the card */</div><div class='ctx'> 	ll-&gt;rap = LE_CSR0;</div><div class='hunk'>@@ -636,7 +636,7 @@ static void lance_set_multicast(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void lance_set_multicast_retry(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct lance_private *lp = from_timer(lp, t, multicast_timer);</div><div class='add'>+	struct lance_private *lp = timer_container_of(lp, t, multicast_timer);</div><div class='ctx'> </div><div class='ctx'> 	lance_set_multicast(lp-&gt;dev);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/amd/amd8111e.c b/drivers/net/ethernet/amd/amd8111e.c<br/>index f64f96fa17cf..76e8c13d5985 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/amd8111e.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/amd8111e.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/amd8111e.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/amd8111e.c</a></div><div class='hunk'>@@ -1173,7 +1173,7 @@ static int amd8111e_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Delete ipg timer */</div><div class='ctx'> 	if (lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE)</div><div class='del'>-		del_timer_sync(&amp;lp-&gt;ipg_data.ipg_timer);</div><div class='add'>+		timer_delete_sync(&amp;lp-&gt;ipg_data.ipg_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='hunk'>@@ -1598,7 +1598,7 @@ static int __maybe_unused amd8111e_suspend(struct device *dev_d)</div><div class='ctx'> 	/* stop chip */</div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 	if (lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE)</div><div class='del'>-		del_timer_sync(&amp;lp-&gt;ipg_data.ipg_timer);</div><div class='add'>+		timer_delete_sync(&amp;lp-&gt;ipg_data.ipg_timer);</div><div class='ctx'> 	amd8111e_stop_chip(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1641,7 +1641,8 @@ static int __maybe_unused amd8111e_resume(struct device *dev_d)</div><div class='ctx'> </div><div class='ctx'> static void amd8111e_config_ipg(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct amd8111e_priv *lp = from_timer(lp, t, ipg_data.ipg_timer);</div><div class='add'>+	struct amd8111e_priv *lp = timer_container_of(lp, t,</div><div class='add'>+						      ipg_data.ipg_timer);</div><div class='ctx'> 	struct ipg_info *ipg_data = &amp;lp-&gt;ipg_data;</div><div class='ctx'> 	void __iomem *mmio = lp-&gt;mmio;</div><div class='ctx'> 	unsigned int prev_col_cnt = ipg_data-&gt;col_cnt;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/au1000_eth.c b/drivers/net/ethernet/amd/au1000_eth.c<br/>index 0671a066913b..9d35ac348ebe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/au1000_eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/au1000_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/au1000_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/au1000_eth.c</a></div><div class='hunk'>@@ -571,7 +571,7 @@ static struct db_dest *au1000_GetFreeDB(struct au1000_private *aup)</div><div class='ctx'> 	return pDB;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void au1000_ReleaseDB(struct au1000_private *aup, struct db_dest *pDB)</div><div class='add'>+static void au1000_ReleaseDB(struct au1000_private *aup, struct db_dest *pDB)</div><div class='ctx'> {</div><div class='ctx'> 	struct db_dest *pDBfree = aup-&gt;pDBfree;</div><div class='ctx'> 	if (pDBfree)</div><div class='head'>diff --git a/drivers/net/ethernet/amd/declance.c b/drivers/net/ethernet/amd/declance.c<br/>index ec8df05e7bf6..8d05a0c5f2d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/declance.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/declance.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/declance.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/declance.c</a></div><div class='hunk'>@@ -842,7 +842,7 @@ static int lance_close(struct net_device *dev)</div><div class='ctx'> 	volatile struct lance_regs *ll = lp-&gt;ll;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;multicast_timer);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;multicast_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the card */</div><div class='ctx'> 	writereg(&amp;ll-&gt;rap, LE_CSR0);</div><div class='hunk'>@@ -1004,7 +1004,7 @@ static void lance_set_multicast(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void lance_set_multicast_retry(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct lance_private *lp = from_timer(lp, t, multicast_timer);</div><div class='add'>+	struct lance_private *lp = timer_container_of(lp, t, multicast_timer);</div><div class='ctx'> 	struct net_device *dev = lp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	lance_set_multicast(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pcnet32.c b/drivers/net/ethernet/amd/pcnet32.c<br/>index 72db9f9e7bee..9eaefa0f5e80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pcnet32.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pcnet32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pcnet32.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pcnet32.c</a></div><div class='hunk'>@@ -462,7 +462,7 @@ static void pcnet32_netif_start(struct net_device *dev)</div><div class='ctx'> 	val = lp-&gt;a-&gt;read_csr(ioaddr, CSR3);</div><div class='ctx'> 	val &amp;= 0x00ff;</div><div class='ctx'> 	lp-&gt;a-&gt;write_csr(ioaddr, CSR3, val);</div><div class='del'>-	napi_enable(&amp;lp-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;lp-&gt;napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -889,6 +889,7 @@ static int pcnet32_set_ringparam(struct net_device *dev,</div><div class='ctx'> 	if (netif_running(dev))</div><div class='ctx'> 		pcnet32_netif_stop(dev);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	lp-&gt;a-&gt;write_csr(ioaddr, CSR0, CSR0_STOP);	/* stop the chip */</div><div class='ctx'> </div><div class='hunk'>@@ -920,6 +921,7 @@ static int pcnet32_set_ringparam(struct net_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_info(lp, drv, dev, "Ring Param Settings: RX: %d, TX: %d\n",</div><div class='ctx'> 		   lp-&gt;rx_ring_size, lp-&gt;tx_ring_size);</div><div class='hunk'>@@ -985,6 +987,7 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)</div><div class='ctx'> 	if (netif_running(dev))</div><div class='ctx'> 		pcnet32_netif_stop(dev);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	lp-&gt;a-&gt;write_csr(ioaddr, CSR0, CSR0_STOP);	/* stop the chip */</div><div class='ctx'> </div><div class='hunk'>@@ -1122,6 +1125,7 @@ clean_up:</div><div class='ctx'> 		lp-&gt;a-&gt;write_bcr(ioaddr, 20, 4);	/* return to 16bit mode */</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='ctx'> }				/* end pcnet32_loopback_test  */</div><div class='hunk'>@@ -2101,6 +2105,7 @@ static int pcnet32_open(struct net_device *dev)</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	/* Check for a valid station address */</div><div class='ctx'> 	if (!is_valid_ether_addr(dev-&gt;dev_addr)) {</div><div class='hunk'>@@ -2266,7 +2271,7 @@ static int pcnet32_open(struct net_device *dev)</div><div class='ctx'> 		goto err_free_ring;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	napi_enable(&amp;lp-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;lp-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	/* Re-initialize the PCNET32, and start it when done. */</div><div class='ctx'> 	lp-&gt;a-&gt;write_csr(ioaddr, 1, (lp-&gt;init_dma_addr &amp; 0xffff));</div><div class='hunk'>@@ -2300,6 +2305,7 @@ static int pcnet32_open(struct net_device *dev)</div><div class='ctx'> 		     lp-&gt;a-&gt;read_csr(ioaddr, CSR0));</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;		/* Always succeed */</div><div class='ctx'> </div><div class='hunk'>@@ -2315,6 +2321,7 @@ err_free_ring:</div><div class='ctx'> </div><div class='ctx'> err_free_irq:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -2623,7 +2630,7 @@ static int pcnet32_close(struct net_device *dev)</div><div class='ctx'> 	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;lp-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	napi_disable(&amp;lp-&gt;napi);</div><div class='hunk'>@@ -2898,7 +2905,7 @@ static void pcnet32_check_media(struct net_device *dev, int verbose)</div><div class='ctx'> </div><div class='ctx'> static void pcnet32_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct pcnet32_private *lp = from_timer(lp, t, watchdog_timer);</div><div class='add'>+	struct pcnet32_private *lp = timer_container_of(lp, t, watchdog_timer);</div><div class='ctx'> 	struct net_device *dev = lp-&gt;dev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/adminq.c b/drivers/net/ethernet/amd/pds_core/adminq.c<br/>index c83a0a80d533..097bb092bdb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/adminq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/adminq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/adminq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/adminq.c</a></div><div class='hunk'>@@ -5,11 +5,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='ctx'> </div><div class='del'>-struct pdsc_wait_context {</div><div class='del'>-	struct pdsc_qcq *qcq;</div><div class='del'>-	struct completion wait_completion;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int pdsc_process_notifyq(struct pdsc_qcq *qcq)</div><div class='ctx'> {</div><div class='ctx'> 	union pds_core_notifyq_comp *comp;</div><div class='hunk'>@@ -109,10 +104,10 @@ void pdsc_process_adminq(struct pdsc_qcq *qcq)</div><div class='ctx'> 		q_info = &amp;q-&gt;info[q-&gt;tail_idx];</div><div class='ctx'> 		q-&gt;tail_idx = (q-&gt;tail_idx + 1) &amp; (q-&gt;num_descs - 1);</div><div class='ctx'> </div><div class='del'>-		/* Copy out the completion data */</div><div class='del'>-		memcpy(q_info-&gt;dest, comp, sizeof(*comp));</div><div class='del'>-</div><div class='del'>-		complete_all(&amp;q_info-&gt;wc-&gt;wait_completion);</div><div class='add'>+		if (!completion_done(&amp;q_info-&gt;completion)) {</div><div class='add'>+			memcpy(q_info-&gt;dest, comp, sizeof(*comp));</div><div class='add'>+			complete(&amp;q_info-&gt;completion);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (cq-&gt;tail_idx == cq-&gt;num_descs - 1)</div><div class='ctx'> 			cq-&gt;done_color = !cq-&gt;done_color;</div><div class='hunk'>@@ -162,8 +157,7 @@ irqreturn_t pdsc_adminq_isr(int irq, void *data)</div><div class='ctx'> static int __pdsc_adminq_post(struct pdsc *pdsc,</div><div class='ctx'> 			      struct pdsc_qcq *qcq,</div><div class='ctx'> 			      union pds_core_adminq_cmd *cmd,</div><div class='del'>-			      union pds_core_adminq_comp *comp,</div><div class='del'>-			      struct pdsc_wait_context *wc)</div><div class='add'>+			      union pds_core_adminq_comp *comp)</div><div class='ctx'> {</div><div class='ctx'> 	struct pdsc_queue *q = &amp;qcq-&gt;q;</div><div class='ctx'> 	struct pdsc_q_info *q_info;</div><div class='hunk'>@@ -205,9 +199,9 @@ static int __pdsc_adminq_post(struct pdsc *pdsc,</div><div class='ctx'> 	/* Post the request */</div><div class='ctx'> 	index = q-&gt;head_idx;</div><div class='ctx'> 	q_info = &amp;q-&gt;info[index];</div><div class='del'>-	q_info-&gt;wc = wc;</div><div class='ctx'> 	q_info-&gt;dest = comp;</div><div class='ctx'> 	memcpy(q_info-&gt;desc, cmd, sizeof(*cmd));</div><div class='add'>+	reinit_completion(&amp;q_info-&gt;completion);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(pdsc-&gt;dev, "head_idx %d tail_idx %d\n",</div><div class='ctx'> 		q-&gt;head_idx, q-&gt;tail_idx);</div><div class='hunk'>@@ -231,16 +225,13 @@ int pdsc_adminq_post(struct pdsc *pdsc,</div><div class='ctx'> 		     union pds_core_adminq_comp *comp,</div><div class='ctx'> 		     bool fast_poll)</div><div class='ctx'> {</div><div class='del'>-	struct pdsc_wait_context wc = {</div><div class='del'>-		.wait_completion =</div><div class='del'>-			COMPLETION_INITIALIZER_ONSTACK(wc.wait_completion),</div><div class='del'>-	};</div><div class='del'>-	unsigned long poll_interval = 1;</div><div class='add'>+	unsigned long poll_interval = 200;</div><div class='ctx'> 	unsigned long poll_jiffies;</div><div class='ctx'> 	unsigned long time_limit;</div><div class='ctx'> 	unsigned long time_start;</div><div class='ctx'> 	unsigned long time_done;</div><div class='ctx'> 	unsigned long remaining;</div><div class='add'>+	struct completion *wc;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	int index;</div><div class='ctx'> </div><div class='hunk'>@@ -250,20 +241,19 @@ int pdsc_adminq_post(struct pdsc *pdsc,</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wc.qcq = &amp;pdsc-&gt;adminqcq;</div><div class='del'>-	index = __pdsc_adminq_post(pdsc, &amp;pdsc-&gt;adminqcq, cmd, comp, &amp;wc);</div><div class='add'>+	index = __pdsc_adminq_post(pdsc, &amp;pdsc-&gt;adminqcq, cmd, comp);</div><div class='ctx'> 	if (index &lt; 0) {</div><div class='ctx'> 		err = index;</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	wc = &amp;pdsc-&gt;adminqcq.q.info[index].completion;</div><div class='ctx'> 	time_start = jiffies;</div><div class='ctx'> 	time_limit = time_start + HZ * pdsc-&gt;devcmd_timeout;</div><div class='ctx'> 	do {</div><div class='ctx'> 		/* Timeslice the actual wait to catch IO errors etc early */</div><div class='del'>-		poll_jiffies = msecs_to_jiffies(poll_interval);</div><div class='del'>-		remaining = wait_for_completion_timeout(&amp;wc.wait_completion,</div><div class='del'>-							poll_jiffies);</div><div class='add'>+		poll_jiffies = usecs_to_jiffies(poll_interval);</div><div class='add'>+		remaining = wait_for_completion_timeout(wc, poll_jiffies);</div><div class='ctx'> 		if (remaining)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -292,9 +282,11 @@ int pdsc_adminq_post(struct pdsc *pdsc,</div><div class='ctx'> 	dev_dbg(pdsc-&gt;dev, "%s: elapsed %d msecs\n",</div><div class='ctx'> 		__func__, jiffies_to_msecs(time_done - time_start));</div><div class='ctx'> </div><div class='del'>-	/* Check the results */</div><div class='del'>-	if (time_after_eq(time_done, time_limit))</div><div class='add'>+	/* Check the results and clear an un-completed timeout */</div><div class='add'>+	if (time_after_eq(time_done, time_limit) &amp;&amp; !completion_done(wc)) {</div><div class='ctx'> 		err = -ETIMEDOUT;</div><div class='add'>+		complete(wc);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(pdsc-&gt;dev, "read admin queue completion idx %d:\n", index);</div><div class='ctx'> 	dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1,</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/auxbus.c b/drivers/net/ethernet/amd/pds_core/auxbus.c<br/>index 2babea110991..92f359f2b449 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/auxbus.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/auxbus.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/auxbus.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/auxbus.c</a></div><div class='hunk'>@@ -107,9 +107,6 @@ int pds_client_adminq_cmd(struct pds_auxiliary_dev *padev,</div><div class='ctx'> 	dev_dbg(pf-&gt;dev, "%s: %s opcode %d\n",</div><div class='ctx'> 		__func__, dev_name(&amp;padev-&gt;aux_dev.dev), req-&gt;opcode);</div><div class='ctx'> </div><div class='del'>-	if (pf-&gt;state)</div><div class='del'>-		return -ENXIO;</div><div class='del'>-</div><div class='ctx'> 	/* Wrap the client's request */</div><div class='ctx'> 	cmd.client_request.opcode = PDS_AQ_CMD_CLIENT_CMD;</div><div class='ctx'> 	cmd.client_request.client_id = cpu_to_le16(padev-&gt;client_id);</div><div class='hunk'>@@ -175,34 +172,31 @@ static struct pds_auxiliary_dev *pdsc_auxbus_dev_register(struct pdsc *cf,</div><div class='ctx'> 	return padev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int pdsc_auxbus_dev_del(struct pdsc *cf, struct pdsc *pf)</div><div class='add'>+void pdsc_auxbus_dev_del(struct pdsc *cf, struct pdsc *pf,</div><div class='add'>+			 struct pds_auxiliary_dev **pd_ptr)</div><div class='ctx'> {</div><div class='ctx'> 	struct pds_auxiliary_dev *padev;</div><div class='del'>-	int err = 0;</div><div class='ctx'> </div><div class='del'>-	if (!cf)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (!*pd_ptr)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pf-&gt;config_lock);</div><div class='ctx'> </div><div class='del'>-	padev = pf-&gt;vfs[cf-&gt;vf_id].padev;</div><div class='del'>-	if (padev) {</div><div class='del'>-		pds_client_unregister(pf, padev-&gt;client_id);</div><div class='del'>-		auxiliary_device_delete(&amp;padev-&gt;aux_dev);</div><div class='del'>-		auxiliary_device_uninit(&amp;padev-&gt;aux_dev);</div><div class='del'>-		padev-&gt;client_id = 0;</div><div class='del'>-	}</div><div class='del'>-	pf-&gt;vfs[cf-&gt;vf_id].padev = NULL;</div><div class='add'>+	padev = *pd_ptr;</div><div class='add'>+	pds_client_unregister(pf, padev-&gt;client_id);</div><div class='add'>+	auxiliary_device_delete(&amp;padev-&gt;aux_dev);</div><div class='add'>+	auxiliary_device_uninit(&amp;padev-&gt;aux_dev);</div><div class='add'>+	*pd_ptr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;config_lock);</div><div class='del'>-	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int pdsc_auxbus_dev_add(struct pdsc *cf, struct pdsc *pf)</div><div class='add'>+int pdsc_auxbus_dev_add(struct pdsc *cf, struct pdsc *pf,</div><div class='add'>+			enum pds_core_vif_types vt,</div><div class='add'>+			struct pds_auxiliary_dev **pd_ptr)</div><div class='ctx'> {</div><div class='ctx'> 	struct pds_auxiliary_dev *padev;</div><div class='ctx'> 	char devname[PDS_DEVNAME_LEN];</div><div class='del'>-	enum pds_core_vif_types vt;</div><div class='ctx'> 	unsigned long mask;</div><div class='ctx'> 	u16 vt_support;</div><div class='ctx'> 	int client_id;</div><div class='hunk'>@@ -211,6 +205,9 @@ int pdsc_auxbus_dev_add(struct pdsc *cf, struct pdsc *pf)</div><div class='ctx'> 	if (!cf)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='add'>+	if (vt &gt;= PDS_DEV_TYPE_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;pf-&gt;config_lock);</div><div class='ctx'> </div><div class='ctx'> 	mask = BIT_ULL(PDSC_S_FW_DEAD) |</div><div class='hunk'>@@ -222,17 +219,10 @@ int pdsc_auxbus_dev_add(struct pdsc *cf, struct pdsc *pf)</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* We only support vDPA so far, so it is the only one to</div><div class='del'>-	 * be verified that it is available in the Core device and</div><div class='del'>-	 * enabled in the devlink param.  In the future this might</div><div class='del'>-	 * become a loop for several VIF types.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='ctx'> 	/* Verify that the type is supported and enabled.  It is not</div><div class='del'>-	 * an error if there is no auxbus device support for this</div><div class='del'>-	 * VF, it just means something else needs to happen with it.</div><div class='add'>+	 * an error if the firmware doesn't support the feature, the</div><div class='add'>+	 * driver just won't set up an auxiliary_device for it.</div><div class='ctx'> 	 */</div><div class='del'>-	vt = PDS_DEV_TYPE_VDPA;</div><div class='ctx'> 	vt_support = !!le16_to_cpu(pf-&gt;dev_ident.vif_types[vt]);</div><div class='ctx'> 	if (!(vt_support &amp;&amp;</div><div class='ctx'> 	      pf-&gt;viftype_status[vt].supported &amp;&amp;</div><div class='hunk'>@@ -258,7 +248,7 @@ int pdsc_auxbus_dev_add(struct pdsc *cf, struct pdsc *pf)</div><div class='ctx'> 		err = PTR_ERR(padev);</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	}</div><div class='del'>-	pf-&gt;vfs[cf-&gt;vf_id].padev = padev;</div><div class='add'>+	*pd_ptr = padev;</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;config_lock);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/core.c b/drivers/net/ethernet/amd/pds_core/core.c<br/>index 536635e57727..076dfe2910c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/core.c</a></div><div class='hunk'>@@ -167,8 +167,10 @@ static void pdsc_q_map(struct pdsc_queue *q, void *base, dma_addr_t base_pa)</div><div class='ctx'> 	q-&gt;base = base;</div><div class='ctx'> 	q-&gt;base_pa = base_pa;</div><div class='ctx'> </div><div class='del'>-	for (i = 0, cur = q-&gt;info; i &lt; q-&gt;num_descs; i++, cur++)</div><div class='add'>+	for (i = 0, cur = q-&gt;info; i &lt; q-&gt;num_descs; i++, cur++) {</div><div class='ctx'> 		cur-&gt;desc = base + (i * q-&gt;desc_size);</div><div class='add'>+		init_completion(&amp;cur-&gt;completion);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pdsc_cq_map(struct pdsc_cq *cq, void *base, dma_addr_t base_pa)</div><div class='hunk'>@@ -325,10 +327,7 @@ static int pdsc_core_init(struct pdsc *pdsc)</div><div class='ctx'> 	size_t sz;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Scale the descriptor ring length based on number of CPUs and VFs */</div><div class='del'>-	numdescs = max_t(int, PDSC_ADMINQ_MIN_LENGTH, num_online_cpus());</div><div class='del'>-	numdescs += 2 * pci_sriov_get_totalvfs(pdsc-&gt;pdev);</div><div class='del'>-	numdescs = roundup_pow_of_two(numdescs);</div><div class='add'>+	numdescs = PDSC_ADMINQ_MAX_LENGTH;</div><div class='ctx'> 	err = pdsc_qcq_alloc(pdsc, PDS_CORE_QTYPE_ADMINQ, 0, "adminq",</div><div class='ctx'> 			     PDS_CORE_QCQ_F_CORE | PDS_CORE_QCQ_F_INTR,</div><div class='ctx'> 			     numdescs,</div><div class='hunk'>@@ -402,6 +401,10 @@ err_out_uninit:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pdsc_viftype pdsc_viftype_defaults[] = {</div><div class='add'>+	[PDS_DEV_TYPE_FWCTL] = { .name = PDS_DEV_TYPE_FWCTL_STR,</div><div class='add'>+				 .enabled = true,</div><div class='add'>+				 .vif_id = PDS_DEV_TYPE_FWCTL,</div><div class='add'>+				 .dl_id = -1 },</div><div class='ctx'> 	[PDS_DEV_TYPE_VDPA] = { .name = PDS_DEV_TYPE_VDPA_STR,</div><div class='ctx'> 				.vif_id = PDS_DEV_TYPE_VDPA,</div><div class='ctx'> 				.dl_id = DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET },</div><div class='hunk'>@@ -412,7 +415,8 @@ static int pdsc_viftypes_init(struct pdsc *pdsc)</div><div class='ctx'> {</div><div class='ctx'> 	enum pds_core_vif_types vt;</div><div class='ctx'> </div><div class='del'>-	pdsc-&gt;viftype_status = kzalloc(sizeof(pdsc_viftype_defaults),</div><div class='add'>+	pdsc-&gt;viftype_status = kcalloc(ARRAY_SIZE(pdsc_viftype_defaults),</div><div class='add'>+				       sizeof(*pdsc-&gt;viftype_status),</div><div class='ctx'> 				       GFP_KERNEL);</div><div class='ctx'> 	if (!pdsc-&gt;viftype_status)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -428,6 +432,7 @@ static int pdsc_viftypes_init(struct pdsc *pdsc)</div><div class='ctx'> </div><div class='ctx'> 		/* See what the Core device has for support */</div><div class='ctx'> 		vt_support = !!le16_to_cpu(pdsc-&gt;dev_ident.vif_types[vt]);</div><div class='add'>+</div><div class='ctx'> 		dev_dbg(pdsc-&gt;dev, "VIF %s is %ssupported\n",</div><div class='ctx'> 			pdsc-&gt;viftype_status[vt].name,</div><div class='ctx'> 			vt_support ? "" : "not ");</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/core.h b/drivers/net/ethernet/amd/pds_core/core.h<br/>index 14522d6d5f86..4a6b35c84dab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/core.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/core.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/core.h</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> #define PDSC_WATCHDOG_SECS	5</div><div class='ctx'> #define PDSC_QUEUE_NAME_MAX_SZ  16</div><div class='del'>-#define PDSC_ADMINQ_MIN_LENGTH	16	/* must be a power of two */</div><div class='add'>+#define PDSC_ADMINQ_MAX_LENGTH	16	/* must be a power of two */</div><div class='ctx'> #define PDSC_NOTIFYQ_LENGTH	64	/* must be a power of two */</div><div class='ctx'> #define PDSC_TEARDOWN_RECOVERY	false</div><div class='ctx'> #define PDSC_TEARDOWN_REMOVING	true</div><div class='hunk'>@@ -96,7 +96,7 @@ struct pdsc_q_info {</div><div class='ctx'> 	unsigned int bytes;</div><div class='ctx'> 	unsigned int nbufs;</div><div class='ctx'> 	struct pdsc_buf_info bufs[PDS_CORE_MAX_FRAGS];</div><div class='del'>-	struct pdsc_wait_context *wc;</div><div class='add'>+	struct completion completion;</div><div class='ctx'> 	void *dest;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -156,6 +156,7 @@ struct pdsc {</div><div class='ctx'> 	struct dentry *dentry;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct pdsc_dev_bar bars[PDS_CORE_BARS_MAX];</div><div class='add'>+	struct pds_auxiliary_dev *padev;</div><div class='ctx'> 	struct pdsc_vf *vfs;</div><div class='ctx'> 	int num_vfs;</div><div class='ctx'> 	int vf_id;</div><div class='hunk'>@@ -254,7 +255,8 @@ int pdsc_dl_flash_update(struct devlink *dl,</div><div class='ctx'> 			 struct devlink_flash_update_params *params,</div><div class='ctx'> 			 struct netlink_ext_ack *extack);</div><div class='ctx'> int pdsc_dl_enable_get(struct devlink *dl, u32 id,</div><div class='del'>-		       struct devlink_param_gset_ctx *ctx);</div><div class='add'>+		       struct devlink_param_gset_ctx *ctx,</div><div class='add'>+		       struct netlink_ext_ack *extack);</div><div class='ctx'> int pdsc_dl_enable_set(struct devlink *dl, u32 id,</div><div class='ctx'> 		       struct devlink_param_gset_ctx *ctx,</div><div class='ctx'> 		       struct netlink_ext_ack *extack);</div><div class='hunk'>@@ -303,8 +305,11 @@ void pdsc_health_thread(struct work_struct *work);</div><div class='ctx'> int pdsc_register_notify(struct notifier_block *nb);</div><div class='ctx'> void pdsc_unregister_notify(struct notifier_block *nb);</div><div class='ctx'> void pdsc_notify(unsigned long event, void *data);</div><div class='del'>-int pdsc_auxbus_dev_add(struct pdsc *cf, struct pdsc *pf);</div><div class='del'>-int pdsc_auxbus_dev_del(struct pdsc *cf, struct pdsc *pf);</div><div class='add'>+int pdsc_auxbus_dev_add(struct pdsc *cf, struct pdsc *pf,</div><div class='add'>+			enum pds_core_vif_types vt,</div><div class='add'>+			struct pds_auxiliary_dev **pd_ptr);</div><div class='add'>+void pdsc_auxbus_dev_del(struct pdsc *cf, struct pdsc *pf,</div><div class='add'>+			 struct pds_auxiliary_dev **pd_ptr);</div><div class='ctx'> </div><div class='ctx'> void pdsc_process_adminq(struct pdsc_qcq *qcq);</div><div class='ctx'> void pdsc_work_thread(struct work_struct *work);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/debugfs.c b/drivers/net/ethernet/amd/pds_core/debugfs.c<br/>index ac37a4e738ae..04c5e3abd8d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/debugfs.c</a></div><div class='hunk'>@@ -154,8 +154,9 @@ void pdsc_debugfs_add_qcq(struct pdsc *pdsc, struct pdsc_qcq *qcq)</div><div class='ctx'> 		debugfs_create_u32("index", 0400, intr_dentry, &amp;intr-&gt;index);</div><div class='ctx'> 		debugfs_create_u32("vector", 0400, intr_dentry, &amp;intr-&gt;vector);</div><div class='ctx'> </div><div class='del'>-		intr_ctrl_regset = kzalloc(sizeof(*intr_ctrl_regset),</div><div class='del'>-					   GFP_KERNEL);</div><div class='add'>+		intr_ctrl_regset = devm_kzalloc(pdsc-&gt;dev,</div><div class='add'>+						sizeof(*intr_ctrl_regset),</div><div class='add'>+						GFP_KERNEL);</div><div class='ctx'> 		if (!intr_ctrl_regset)</div><div class='ctx'> 			return;</div><div class='ctx'> 		intr_ctrl_regset-&gt;regs = intr_ctrl_regs;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/devlink.c b/drivers/net/ethernet/amd/pds_core/devlink.c<br/>index 2681889162a2..b576be626a29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/devlink.c</a></div><div class='hunk'>@@ -22,7 +22,8 @@ pdsc_viftype *pdsc_dl_find_viftype_by_id(struct pdsc *pdsc,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int pdsc_dl_enable_get(struct devlink *dl, u32 id,</div><div class='del'>-		       struct devlink_param_gset_ctx *ctx)</div><div class='add'>+		       struct devlink_param_gset_ctx *ctx,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct pdsc *pdsc = devlink_priv(dl);</div><div class='ctx'> 	struct pdsc_viftype *vt_entry;</div><div class='hunk'>@@ -56,8 +57,11 @@ int pdsc_dl_enable_set(struct devlink *dl, u32 id,</div><div class='ctx'> 	for (vf_id = 0; vf_id &lt; pdsc-&gt;num_vfs; vf_id++) {</div><div class='ctx'> 		struct pdsc *vf = pdsc-&gt;vfs[vf_id].vf;</div><div class='ctx'> </div><div class='del'>-		err = ctx-&gt;val.vbool ? pdsc_auxbus_dev_add(vf, pdsc) :</div><div class='del'>-				       pdsc_auxbus_dev_del(vf, pdsc);</div><div class='add'>+		if (ctx-&gt;val.vbool)</div><div class='add'>+			err = pdsc_auxbus_dev_add(vf, pdsc, vt_entry-&gt;vif_id,</div><div class='add'>+						  &amp;pdsc-&gt;vfs[vf_id].padev);</div><div class='add'>+		else</div><div class='add'>+			pdsc_auxbus_dev_del(vf, pdsc, &amp;pdsc-&gt;vfs[vf_id].padev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -102,7 +106,7 @@ int pdsc_dl_info_get(struct devlink *dl, struct devlink_info_req *req,</div><div class='ctx'> 		.fw_control.opcode = PDS_CORE_CMD_FW_CONTROL,</div><div class='ctx'> 		.fw_control.oper = PDS_CORE_FW_GET_LIST,</div><div class='ctx'> 	};</div><div class='del'>-	struct pds_core_fw_list_info fw_list;</div><div class='add'>+	struct pds_core_fw_list_info fw_list = {};</div><div class='ctx'> 	struct pdsc *pdsc = devlink_priv(dl);</div><div class='ctx'> 	union pds_core_dev_comp comp;</div><div class='ctx'> 	char buf[32];</div><div class='hunk'>@@ -115,10 +119,8 @@ int pdsc_dl_info_get(struct devlink *dl, struct devlink_info_req *req,</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		memcpy_fromio(&amp;fw_list, pdsc-&gt;cmd_regs-&gt;data, sizeof(fw_list));</div><div class='ctx'> 	mutex_unlock(&amp;pdsc-&gt;devcmd_lock);</div><div class='del'>-	if (err &amp;&amp; err != -EIO)</div><div class='del'>-		return err;</div><div class='ctx'> </div><div class='del'>-	listlen = fw_list.num_fw_slots;</div><div class='add'>+	listlen = min(fw_list.num_fw_slots, ARRAY_SIZE(fw_list.fw_names));</div><div class='ctx'> 	for (i = 0; i &lt; listlen; i++) {</div><div class='ctx'> 		if (i &lt; ARRAY_SIZE(fw_slotnames))</div><div class='ctx'> 			strscpy(buf, fw_slotnames[i], sizeof(buf));</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/main.c b/drivers/net/ethernet/amd/pds_core/main.c<br/>index 660268ff9562..c7a2eff57632 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/pds_core/main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/main.c</a></div><div class='hunk'>@@ -23,7 +23,7 @@ MODULE_DEVICE_TABLE(pci, pdsc_id_table);</div><div class='ctx'> </div><div class='ctx'> static void pdsc_wdtimer_cb(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct pdsc *pdsc = from_timer(pdsc, t, wdtimer);</div><div class='add'>+	struct pdsc *pdsc = timer_container_of(pdsc, t, wdtimer);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(pdsc-&gt;dev, "%s: jiffies %ld\n", __func__, jiffies);</div><div class='ctx'> 	mod_timer(&amp;pdsc-&gt;wdtimer,</div><div class='hunk'>@@ -190,7 +190,8 @@ static int pdsc_init_vf(struct pdsc *vf)</div><div class='ctx'> 	devl_unlock(dl);</div><div class='ctx'> </div><div class='ctx'> 	pf-&gt;vfs[vf-&gt;vf_id].vf = vf;</div><div class='del'>-	err = pdsc_auxbus_dev_add(vf, pf);</div><div class='add'>+	err = pdsc_auxbus_dev_add(vf, pf, PDS_DEV_TYPE_VDPA,</div><div class='add'>+				  &amp;pf-&gt;vfs[vf-&gt;vf_id].padev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		devl_lock(dl);</div><div class='ctx'> 		devl_unregister(dl);</div><div class='hunk'>@@ -264,6 +265,10 @@ static int pdsc_init_pf(struct pdsc *pdsc)</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;pdsc-&gt;config_lock);</div><div class='ctx'> </div><div class='add'>+	err = pdsc_auxbus_dev_add(pdsc, pdsc, PDS_DEV_TYPE_FWCTL, &amp;pdsc-&gt;padev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out_stop;</div><div class='add'>+</div><div class='ctx'> 	dl = priv_to_devlink(pdsc);</div><div class='ctx'> 	devl_lock(dl);</div><div class='ctx'> 	err = devl_params_register(dl, pdsc_dl_params,</div><div class='hunk'>@@ -272,10 +277,10 @@ static int pdsc_init_pf(struct pdsc *pdsc)</div><div class='ctx'> 		devl_unlock(dl);</div><div class='ctx'> 		dev_warn(pdsc-&gt;dev, "Failed to register devlink params: %pe\n",</div><div class='ctx'> 			 ERR_PTR(err));</div><div class='del'>-		goto err_out_stop;</div><div class='add'>+		goto err_out_del_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hr = devl_health_reporter_create(dl, &amp;pdsc_fw_reporter_ops, 0, pdsc);</div><div class='add'>+	hr = devl_health_reporter_create(dl, &amp;pdsc_fw_reporter_ops, pdsc);</div><div class='ctx'> 	if (IS_ERR(hr)) {</div><div class='ctx'> 		devl_unlock(dl);</div><div class='ctx'> 		dev_warn(pdsc-&gt;dev, "Failed to create fw reporter: %pe\n", hr);</div><div class='hunk'>@@ -295,6 +300,8 @@ static int pdsc_init_pf(struct pdsc *pdsc)</div><div class='ctx'> err_out_unreg_params:</div><div class='ctx'> 	devlink_params_unregister(dl, pdsc_dl_params,</div><div class='ctx'> 				  ARRAY_SIZE(pdsc_dl_params));</div><div class='add'>+err_out_del_dev:</div><div class='add'>+	pdsc_auxbus_dev_del(pdsc, pdsc, &amp;pdsc-&gt;padev);</div><div class='ctx'> err_out_stop:</div><div class='ctx'> 	pdsc_stop(pdsc);</div><div class='ctx'> err_out_teardown:</div><div class='hunk'>@@ -417,7 +424,7 @@ static void pdsc_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 		pf = pdsc_get_pf_struct(pdsc-&gt;pdev);</div><div class='ctx'> 		if (!IS_ERR(pf)) {</div><div class='del'>-			pdsc_auxbus_dev_del(pdsc, pf);</div><div class='add'>+			pdsc_auxbus_dev_del(pdsc, pf, &amp;pf-&gt;vfs[pdsc-&gt;vf_id].padev);</div><div class='ctx'> 			pf-&gt;vfs[pdsc-&gt;vf_id].vf = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -426,6 +433,7 @@ static void pdsc_remove(struct pci_dev *pdev)</div><div class='ctx'> 		 * shut themselves down.</div><div class='ctx'> 		 */</div><div class='ctx'> 		pdsc_sriov_configure(pdev, 0);</div><div class='add'>+		pdsc_auxbus_dev_del(pdsc, pdsc, &amp;pdsc-&gt;padev);</div><div class='ctx'> </div><div class='ctx'> 		timer_shutdown_sync(&amp;pdsc-&gt;wdtimer);</div><div class='ctx'> 		if (pdsc-&gt;wq)</div><div class='hunk'>@@ -482,7 +490,10 @@ static void pdsc_reset_prepare(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 		pf = pdsc_get_pf_struct(pdsc-&gt;pdev);</div><div class='ctx'> 		if (!IS_ERR(pf))</div><div class='del'>-			pdsc_auxbus_dev_del(pdsc, pf);</div><div class='add'>+			pdsc_auxbus_dev_del(pdsc, pf,</div><div class='add'>+					    &amp;pf-&gt;vfs[pdsc-&gt;vf_id].padev);</div><div class='add'>+	} else {</div><div class='add'>+		pdsc_auxbus_dev_del(pdsc, pdsc, &amp;pdsc-&gt;padev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pdsc_unmap_bars(pdsc);</div><div class='hunk'>@@ -527,7 +538,11 @@ static void pdsc_reset_done(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 		pf = pdsc_get_pf_struct(pdsc-&gt;pdev);</div><div class='ctx'> 		if (!IS_ERR(pf))</div><div class='del'>-			pdsc_auxbus_dev_add(pdsc, pf);</div><div class='add'>+			pdsc_auxbus_dev_add(pdsc, pf, PDS_DEV_TYPE_VDPA,</div><div class='add'>+					    &amp;pf-&gt;vfs[pdsc-&gt;vf_id].padev);</div><div class='add'>+	} else {</div><div class='add'>+		pdsc_auxbus_dev_add(pdsc, pdsc, PDS_DEV_TYPE_FWCTL,</div><div class='add'>+				    &amp;pdsc-&gt;padev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/amd/sunlance.c b/drivers/net/ethernet/amd/sunlance.c<br/>index 0f98b92408ed..0b273327f5a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/sunlance.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/sunlance.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/sunlance.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/sunlance.c</a></div><div class='hunk'>@@ -963,7 +963,7 @@ static int lance_close(struct net_device *dev)</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;multicast_timer);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;multicast_timer);</div><div class='ctx'> </div><div class='ctx'> 	STOP_LANCE(lp);</div><div class='ctx'> </div><div class='hunk'>@@ -1246,7 +1246,7 @@ static void lance_set_multicast(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void lance_set_multicast_retry(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct lance_private *lp = from_timer(lp, t, multicast_timer);</div><div class='add'>+	struct lance_private *lp = timer_container_of(lp, t, multicast_timer);</div><div class='ctx'> 	struct net_device *dev = lp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	lance_set_multicast(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/Makefile b/drivers/net/ethernet/amd/xgbe/Makefile<br/>index 620785ffbd51..5992f7fd4d9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/Makefile</a></div><div class='hunk'>@@ -3,9 +3,9 @@ obj-$(CONFIG_AMD_XGBE) += amd-xgbe.o</div><div class='ctx'> </div><div class='ctx'> amd-xgbe-objs := xgbe-main.o xgbe-drv.o xgbe-dev.o \</div><div class='ctx'> 		 xgbe-desc.o xgbe-ethtool.o xgbe-mdio.o \</div><div class='del'>-		 xgbe-ptp.o \</div><div class='add'>+		 xgbe-hwtstamp.o xgbe-ptp.o xgbe-pps.o \</div><div class='ctx'> 		 xgbe-i2c.o xgbe-phy-v1.o xgbe-phy-v2.o \</div><div class='del'>-		 xgbe-platform.o</div><div class='add'>+		 xgbe-platform.o xgbe-selftest.o</div><div class='ctx'> </div><div class='ctx'> amd-xgbe-$(CONFIG_PCI) += xgbe-pci.o</div><div class='ctx'> amd-xgbe-$(CONFIG_AMD_XGBE_DCB) += xgbe-dcb.o</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h<br/>index 3b70f6737633..62b01de93db4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-common.h</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __XGBE_COMMON_H__</div><div class='hunk'>@@ -332,7 +223,15 @@</div><div class='ctx'> #define MAC_TSSR			0x0d20</div><div class='ctx'> #define MAC_TXSNR			0x0d30</div><div class='ctx'> #define MAC_TXSSR			0x0d34</div><div class='del'>-</div><div class='add'>+#define MAC_TICNR                       0x0d58</div><div class='add'>+#define MAC_TICSNR                      0x0d5C</div><div class='add'>+#define MAC_TECNR                       0x0d60</div><div class='add'>+#define MAC_TECSNR                      0x0d64</div><div class='add'>+#define MAC_PPSCR			0x0d70</div><div class='add'>+#define MAC_PPS0_TTSR			0x0d80</div><div class='add'>+#define MAC_PPS0_TTNSR			0x0d84</div><div class='add'>+#define MAC_PPS0_INTERVAL		0x0d88</div><div class='add'>+#define MAC_PPS0_WIDTH			0x0d8C</div><div class='ctx'> #define MAC_QTFCR_INC			4</div><div class='ctx'> #define MAC_MACA_INC			4</div><div class='ctx'> #define MAC_HTR_INC			4</div><div class='hunk'>@@ -340,6 +239,18 @@</div><div class='ctx'> #define MAC_RQC2_INC			4</div><div class='ctx'> #define MAC_RQC2_Q_PER_REG		4</div><div class='ctx'> </div><div class='add'>+/* PPS helpers */</div><div class='add'>+#define PPSEN0				BIT(4)</div><div class='add'>+#define MAC_PPSx_TTSR(x)		((MAC_PPS0_TTSR) + ((x) * 0x10))</div><div class='add'>+#define MAC_PPSx_TTNSR(x)		((MAC_PPS0_TTNSR) + ((x) * 0x10))</div><div class='add'>+#define MAC_PPSx_INTERVAL(x)		((MAC_PPS0_INTERVAL) + ((x) * 0x10))</div><div class='add'>+#define MAC_PPSx_WIDTH(x)		((MAC_PPS0_WIDTH) + ((x) * 0x10))</div><div class='add'>+#define PPS_MAXIDX(x)			((((x) + 1) * 8) - 1)</div><div class='add'>+#define PPS_MINIDX(x)			((x) * 8)</div><div class='add'>+#define XGBE_PPSCMD_STOP		0x5</div><div class='add'>+#define XGBE_PPSCMD_START		0x2</div><div class='add'>+#define XGBE_PPSTARGET_PULSE		0x2</div><div class='add'>+</div><div class='ctx'> /* MAC register entry bit positions and sizes */</div><div class='ctx'> #define MAC_HWF0R_ADDMACADRSEL_INDEX	18</div><div class='ctx'> #define MAC_HWF0R_ADDMACADRSEL_WIDTH	5</div><div class='hunk'>@@ -473,6 +384,10 @@</div><div class='ctx'> #define MAC_RCR_CST_WIDTH		1</div><div class='ctx'> #define MAC_RCR_DCRCC_INDEX		3</div><div class='ctx'> #define MAC_RCR_DCRCC_WIDTH		1</div><div class='add'>+#define MAC_RCR_GPSLCE_INDEX		6</div><div class='add'>+#define MAC_RCR_GPSLCE_WIDTH		1</div><div class='add'>+#define MAC_RCR_WD_INDEX		7</div><div class='add'>+#define MAC_RCR_WD_WIDTH		1</div><div class='ctx'> #define MAC_RCR_HDSMS_INDEX		12</div><div class='ctx'> #define MAC_RCR_HDSMS_WIDTH		3</div><div class='ctx'> #define MAC_RCR_IPC_INDEX		9</div><div class='hunk'>@@ -483,6 +398,8 @@</div><div class='ctx'> #define MAC_RCR_LM_WIDTH		1</div><div class='ctx'> #define MAC_RCR_RE_INDEX		0</div><div class='ctx'> #define MAC_RCR_RE_WIDTH		1</div><div class='add'>+#define MAC_RCR_GPSL_INDEX		16</div><div class='add'>+#define MAC_RCR_GPSL_WIDTH		14</div><div class='ctx'> #define MAC_RFCR_PFCE_INDEX		8</div><div class='ctx'> #define MAC_RFCR_PFCE_WIDTH		1</div><div class='ctx'> #define MAC_RFCR_RFE_INDEX		0</div><div class='hunk'>@@ -521,6 +438,8 @@</div><div class='ctx'> #define MAC_TCR_VNE_WIDTH		1</div><div class='ctx'> #define MAC_TCR_VNM_INDEX		25</div><div class='ctx'> #define MAC_TCR_VNM_WIDTH		1</div><div class='add'>+#define MAC_TCR_JD_INDEX		16</div><div class='add'>+#define MAC_TCR_JD_WIDTH		1</div><div class='ctx'> #define MAC_TIR_TNID_INDEX		0</div><div class='ctx'> #define MAC_TIR_TNID_WIDTH		16</div><div class='ctx'> #define MAC_TSCR_AV8021ASMEN_INDEX	28</div><div class='hunk'>@@ -529,6 +448,8 @@</div><div class='ctx'> #define MAC_TSCR_SNAPTYPSEL_WIDTH	2</div><div class='ctx'> #define MAC_TSCR_TSADDREG_INDEX		5</div><div class='ctx'> #define MAC_TSCR_TSADDREG_WIDTH		1</div><div class='add'>+#define MAC_TSCR_TSUPDT_INDEX		3</div><div class='add'>+#define MAC_TSCR_TSUPDT_WIDTH		1</div><div class='ctx'> #define MAC_TSCR_TSCFUPDT_INDEX		1</div><div class='ctx'> #define MAC_TSCR_TSCFUPDT_WIDTH		1</div><div class='ctx'> #define MAC_TSCR_TSCTRLSSR_INDEX	9</div><div class='hunk'>@@ -557,6 +478,10 @@</div><div class='ctx'> #define MAC_TSSR_TXTSC_WIDTH		1</div><div class='ctx'> #define MAC_TXSNR_TXTSSTSMIS_INDEX	31</div><div class='ctx'> #define MAC_TXSNR_TXTSSTSMIS_WIDTH	1</div><div class='add'>+#define MAC_TICSNR_TSICSNS_INDEX	8</div><div class='add'>+#define MAC_TICSNR_TSICSNS_WIDTH	8</div><div class='add'>+#define MAC_TECSNR_TSECSNS_INDEX	8</div><div class='add'>+#define MAC_TECSNR_TSECSNS_WIDTH	8</div><div class='ctx'> #define MAC_VLANHTR_VLHT_INDEX		0</div><div class='ctx'> #define MAC_VLANHTR_VLHT_WIDTH		16</div><div class='ctx'> #define MAC_VLANIR_VLTI_INDEX		20</div><div class='hunk'>@@ -587,8 +512,10 @@</div><div class='ctx'> #define MAC_VR_SNPSVER_WIDTH		8</div><div class='ctx'> #define MAC_VR_USERVER_INDEX		16</div><div class='ctx'> #define MAC_VR_USERVER_WIDTH		8</div><div class='add'>+#define MAC_PPSx_TTNSR_TRGTBUSY0_INDEX	31</div><div class='add'>+#define MAC_PPSx_TTNSR_TRGTBUSY0_WIDTH	1</div><div class='ctx'> </div><div class='del'>-/* MMC register offsets */</div><div class='add'>+ /* MMC register offsets */</div><div class='ctx'> #define MMC_CR				0x0800</div><div class='ctx'> #define MMC_RISR			0x0804</div><div class='ctx'> #define MMC_TISR			0x0808</div><div class='hunk'>@@ -900,6 +827,11 @@</div><div class='ctx'> #define PCS_V2_RV_WINDOW_SELECT		0x1064</div><div class='ctx'> #define PCS_V2_YC_WINDOW_DEF		0x18060</div><div class='ctx'> #define PCS_V2_YC_WINDOW_SELECT		0x18064</div><div class='add'>+#define PCS_V3_RN_WINDOW_DEF		0xf8078</div><div class='add'>+#define PCS_V3_RN_WINDOW_SELECT		0xf807c</div><div class='add'>+</div><div class='add'>+#define PCS_RN_SMN_BASE_ADDR		0x11e00000</div><div class='add'>+#define PCS_RN_PORT_ADDR_SIZE		0x100000</div><div class='ctx'> </div><div class='ctx'> /* PCS register entry bit positions and sizes */</div><div class='ctx'> #define PCS_V2_WINDOW_DEF_OFFSET_INDEX	6</div><div class='hunk'>@@ -1373,6 +1305,8 @@</div><div class='ctx'> #define MDIO_VEND2_CTRL1_SS13		BIT(13)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define XGBE_VEND2_MAC_AUTO_SW		BIT(9)</div><div class='add'>+</div><div class='ctx'> /* MDIO mask values */</div><div class='ctx'> #define XGBE_AN_CL73_INT_CMPLT		BIT(0)</div><div class='ctx'> #define XGBE_AN_CL73_INC_LINK		BIT(1)</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c b/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c<br/>index c68ace804e37..1474df5544fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-dcb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-dcb.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c b/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c<br/>index b0a6c96b6ef4..d9157c4acde9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='hunk'>@@ -505,21 +396,6 @@ void xgbe_debugfs_exit(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> void xgbe_debugfs_rename(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	char *buf;</div><div class='del'>-</div><div class='del'>-	if (!pdata-&gt;xgbe_debugfs)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	buf = kasprintf(GFP_KERNEL, "amd-xgbe-%s", pdata-&gt;netdev-&gt;name);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!strcmp(pdata-&gt;xgbe_debugfs-&gt;d_name.name, buf))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	debugfs_rename(pdata-&gt;xgbe_debugfs-&gt;d_parent, pdata-&gt;xgbe_debugfs,</div><div class='del'>-		       pdata-&gt;xgbe_debugfs-&gt;d_parent, buf);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	kfree(buf);</div><div class='add'>+	debugfs_change_name(pdata-&gt;xgbe_debugfs,</div><div class='add'>+			    "amd-xgbe-%s", pdata-&gt;netdev-&gt;name);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-desc.c b/drivers/net/ethernet/amd/xgbe/xgbe-desc.c<br/>index 230726d7b74f..7c8a19988a52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-desc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-desc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-desc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-desc.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "xgbe.h"</div><div class='hunk'>@@ -373,8 +264,13 @@ static int xgbe_map_rx_buffer(struct xgbe_prv_data *pdata,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the header page info */</div><div class='del'>-	xgbe_set_buffer_data(&amp;rdata-&gt;rx.hdr, &amp;ring-&gt;rx_hdr_pa,</div><div class='del'>-			     XGBE_SKB_ALLOC_SIZE);</div><div class='add'>+	if (pdata-&gt;netdev-&gt;features &amp; NETIF_F_RXCSUM) {</div><div class='add'>+		xgbe_set_buffer_data(&amp;rdata-&gt;rx.hdr, &amp;ring-&gt;rx_hdr_pa,</div><div class='add'>+				     XGBE_SKB_ALLOC_SIZE);</div><div class='add'>+	} else {</div><div class='add'>+		xgbe_set_buffer_data(&amp;rdata-&gt;rx.hdr, &amp;ring-&gt;rx_hdr_pa,</div><div class='add'>+				     pdata-&gt;rx_buf_size);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the buffer page info */</div><div class='ctx'> 	xgbe_set_buffer_data(&amp;rdata-&gt;rx.buf, &amp;ring-&gt;rx_buf_pa,</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c<br/>index f393228d41c7..b646ae575e6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-dev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-dev.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='hunk'>@@ -120,9 +11,11 @@</div><div class='ctx'> #include &lt;linux/bitrev.h&gt;</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='ctx'> #include &lt;linux/crc32poly.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "xgbe.h"</div><div class='ctx'> #include "xgbe-common.h"</div><div class='add'>+#include "xgbe-smn.h"</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int xgbe_get_max_frame(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='hunk'>@@ -318,6 +211,20 @@ static void xgbe_config_sph_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, HDSMS, XGBE_SPH_HDSMS_SIZE);</div><div class='add'>+	pdata-&gt;sph = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_disable_sph_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;rx_ring)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_CR, SPH, 0);</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;sph = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_write_rss_reg(struct xgbe_prv_data *pdata, unsigned int type,</div><div class='hunk'>@@ -1150,18 +1057,19 @@ static int xgbe_set_gpio(struct xgbe_prv_data *pdata, unsigned int gpio)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_read_mmd_regs_v2(struct xgbe_prv_data *pdata, int prtad,</div><div class='del'>-				 int mmd_reg)</div><div class='add'>+static unsigned int xgbe_get_mmd_address(struct xgbe_prv_data *pdata,</div><div class='add'>+					 int mmd_reg)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned int mmd_address, index, offset;</div><div class='del'>-	int mmd_data;</div><div class='del'>-</div><div class='del'>-	if (mmd_reg &amp; XGBE_ADDR_C45)</div><div class='del'>-		mmd_address = mmd_reg &amp; ~XGBE_ADDR_C45;</div><div class='del'>-	else</div><div class='del'>-		mmd_address = (pdata-&gt;mdio_mmd &lt;&lt; 16) | (mmd_reg &amp; 0xffff);</div><div class='add'>+	return (mmd_reg &amp; XGBE_ADDR_C45) ?</div><div class='add'>+		mmd_reg &amp; ~XGBE_ADDR_C45 :</div><div class='add'>+		(pdata-&gt;mdio_mmd &lt;&lt; 16) | (mmd_reg &amp; 0xffff);</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static void xgbe_get_pcs_index_and_offset(struct xgbe_prv_data *pdata,</div><div class='add'>+					  unsigned int mmd_address,</div><div class='add'>+					  unsigned int *index,</div><div class='add'>+					  unsigned int *offset)</div><div class='add'>+{</div><div class='ctx'> 	/* The PCS registers are accessed using mmio. The underlying</div><div class='ctx'> 	 * management interface uses indirect addressing to access the MMD</div><div class='ctx'> 	 * register sets. This requires accessing of the PCS register in two</div><div class='hunk'>@@ -1172,8 +1080,98 @@ static int xgbe_read_mmd_regs_v2(struct xgbe_prv_data *pdata, int prtad,</div><div class='ctx'> 	 * offset 1 bit and reading 16 bits of data.</div><div class='ctx'> 	 */</div><div class='ctx'> 	mmd_address &lt;&lt;= 1;</div><div class='del'>-	index = mmd_address &amp; ~pdata-&gt;xpcs_window_mask;</div><div class='del'>-	offset = pdata-&gt;xpcs_window + (mmd_address &amp; pdata-&gt;xpcs_window_mask);</div><div class='add'>+	*index = mmd_address &amp; ~pdata-&gt;xpcs_window_mask;</div><div class='add'>+	*offset = pdata-&gt;xpcs_window + (mmd_address &amp; pdata-&gt;xpcs_window_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_read_mmd_regs_v3(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+				 int mmd_reg)</div><div class='add'>+{</div><div class='add'>+	unsigned int mmd_address, index, offset;</div><div class='add'>+	u32 smn_address;</div><div class='add'>+	int mmd_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='add'>+</div><div class='add'>+	xgbe_get_pcs_index_and_offset(pdata, mmd_address, &amp;index, &amp;offset);</div><div class='add'>+</div><div class='add'>+	smn_address = pdata-&gt;smn_base + pdata-&gt;xpcs_window_sel_reg;</div><div class='add'>+	ret = amd_smn_write(0, smn_address, index);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = amd_smn_read(0, pdata-&gt;smn_base + offset, &amp;mmd_data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mmd_data = (offset % 4) ? FIELD_GET(XGBE_GEN_HI_MASK, mmd_data) :</div><div class='add'>+				  FIELD_GET(XGBE_GEN_LO_MASK, mmd_data);</div><div class='add'>+</div><div class='add'>+	return mmd_data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_write_mmd_regs_v3(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+				   int mmd_reg, int mmd_data)</div><div class='add'>+{</div><div class='add'>+	unsigned int pci_mmd_data, hi_mask, lo_mask;</div><div class='add'>+	unsigned int mmd_address, index, offset;</div><div class='add'>+	struct pci_dev *dev;</div><div class='add'>+	u32 smn_address;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev = pdata-&gt;pcidev;</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='add'>+</div><div class='add'>+	xgbe_get_pcs_index_and_offset(pdata, mmd_address, &amp;index, &amp;offset);</div><div class='add'>+</div><div class='add'>+	smn_address = pdata-&gt;smn_base + pdata-&gt;xpcs_window_sel_reg;</div><div class='add'>+	ret = amd_smn_write(0, smn_address, index);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pci_err(dev, "Failed to write data 0x%x\n", index);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = amd_smn_read(0, pdata-&gt;smn_base + offset, &amp;pci_mmd_data);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pci_err(dev, "Failed to read data\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (offset % 4) {</div><div class='add'>+		hi_mask = FIELD_PREP(XGBE_GEN_HI_MASK, mmd_data);</div><div class='add'>+		lo_mask = FIELD_GET(XGBE_GEN_LO_MASK, pci_mmd_data);</div><div class='add'>+	} else {</div><div class='add'>+		hi_mask = FIELD_PREP(XGBE_GEN_HI_MASK,</div><div class='add'>+				     FIELD_GET(XGBE_GEN_HI_MASK, pci_mmd_data));</div><div class='add'>+		lo_mask = FIELD_GET(XGBE_GEN_LO_MASK, mmd_data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_mmd_data = hi_mask | lo_mask;</div><div class='add'>+</div><div class='add'>+	ret = amd_smn_write(0, smn_address, index);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pci_err(dev, "Failed to write data 0x%x\n", index);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = amd_smn_write(0, (pdata-&gt;smn_base + offset), pci_mmd_data);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pci_err(dev, "Failed to write data 0x%x\n", pci_mmd_data);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_read_mmd_regs_v2(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+				 int mmd_reg)</div><div class='add'>+{</div><div class='add'>+	unsigned int mmd_address, index, offset;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int mmd_data;</div><div class='add'>+</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='add'>+</div><div class='add'>+	xgbe_get_pcs_index_and_offset(pdata, mmd_address, &amp;index, &amp;offset);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;pdata-&gt;xpcs_lock, flags);</div><div class='ctx'> 	XPCS32_IOWRITE(pdata, pdata-&gt;xpcs_window_sel_reg, index);</div><div class='hunk'>@@ -1189,23 +1187,9 @@ static void xgbe_write_mmd_regs_v2(struct xgbe_prv_data *pdata, int prtad,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	unsigned int mmd_address, index, offset;</div><div class='ctx'> </div><div class='del'>-	if (mmd_reg &amp; XGBE_ADDR_C45)</div><div class='del'>-		mmd_address = mmd_reg &amp; ~XGBE_ADDR_C45;</div><div class='del'>-	else</div><div class='del'>-		mmd_address = (pdata-&gt;mdio_mmd &lt;&lt; 16) | (mmd_reg &amp; 0xffff);</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='ctx'> </div><div class='del'>-	/* The PCS registers are accessed using mmio. The underlying</div><div class='del'>-	 * management interface uses indirect addressing to access the MMD</div><div class='del'>-	 * register sets. This requires accessing of the PCS register in two</div><div class='del'>-	 * phases, an address phase and a data phase.</div><div class='del'>-	 *</div><div class='del'>-	 * The mmio interface is based on 16-bit offsets and values. All</div><div class='del'>-	 * register offsets must therefore be adjusted by left shifting the</div><div class='del'>-	 * offset 1 bit and writing 16 bits of data.</div><div class='del'>-	 */</div><div class='del'>-	mmd_address &lt;&lt;= 1;</div><div class='del'>-	index = mmd_address &amp; ~pdata-&gt;xpcs_window_mask;</div><div class='del'>-	offset = pdata-&gt;xpcs_window + (mmd_address &amp; pdata-&gt;xpcs_window_mask);</div><div class='add'>+	xgbe_get_pcs_index_and_offset(pdata, mmd_address, &amp;index, &amp;offset);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;pdata-&gt;xpcs_lock, flags);</div><div class='ctx'> 	XPCS32_IOWRITE(pdata, pdata-&gt;xpcs_window_sel_reg, index);</div><div class='hunk'>@@ -1220,10 +1204,7 @@ static int xgbe_read_mmd_regs_v1(struct xgbe_prv_data *pdata, int prtad,</div><div class='ctx'> 	unsigned int mmd_address;</div><div class='ctx'> 	int mmd_data;</div><div class='ctx'> </div><div class='del'>-	if (mmd_reg &amp; XGBE_ADDR_C45)</div><div class='del'>-		mmd_address = mmd_reg &amp; ~XGBE_ADDR_C45;</div><div class='del'>-	else</div><div class='del'>-		mmd_address = (pdata-&gt;mdio_mmd &lt;&lt; 16) | (mmd_reg &amp; 0xffff);</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='ctx'> </div><div class='ctx'> 	/* The PCS registers are accessed using mmio. The underlying APB3</div><div class='ctx'> 	 * management interface uses indirect addressing to access the MMD</div><div class='hunk'>@@ -1248,10 +1229,7 @@ static void xgbe_write_mmd_regs_v1(struct xgbe_prv_data *pdata, int prtad,</div><div class='ctx'> 	unsigned int mmd_address;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (mmd_reg &amp; XGBE_ADDR_C45)</div><div class='del'>-		mmd_address = mmd_reg &amp; ~XGBE_ADDR_C45;</div><div class='del'>-	else</div><div class='del'>-		mmd_address = (pdata-&gt;mdio_mmd &lt;&lt; 16) | (mmd_reg &amp; 0xffff);</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='ctx'> </div><div class='ctx'> 	/* The PCS registers are accessed using mmio. The underlying APB3</div><div class='ctx'> 	 * management interface uses indirect addressing to access the MMD</div><div class='hunk'>@@ -1278,6 +1256,9 @@ static int xgbe_read_mmd_regs(struct xgbe_prv_data *pdata, int prtad,</div><div class='ctx'> 	case XGBE_XPCS_ACCESS_V2:</div><div class='ctx'> 	default:</div><div class='ctx'> 		return xgbe_read_mmd_regs_v2(pdata, prtad, mmd_reg);</div><div class='add'>+</div><div class='add'>+	case XGBE_XPCS_ACCESS_V3:</div><div class='add'>+		return xgbe_read_mmd_regs_v3(pdata, prtad, mmd_reg);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1288,6 +1269,9 @@ static void xgbe_write_mmd_regs(struct xgbe_prv_data *pdata, int prtad,</div><div class='ctx'> 	case XGBE_XPCS_ACCESS_V1:</div><div class='ctx'> 		return xgbe_write_mmd_regs_v1(pdata, prtad, mmd_reg, mmd_data);</div><div class='ctx'> </div><div class='add'>+	case XGBE_XPCS_ACCESS_V3:</div><div class='add'>+		return xgbe_write_mmd_regs_v3(pdata, prtad, mmd_reg, mmd_data);</div><div class='add'>+</div><div class='ctx'> 	case XGBE_XPCS_ACCESS_V2:</div><div class='ctx'> 	default:</div><div class='ctx'> 		return xgbe_write_mmd_regs_v2(pdata, prtad, mmd_reg, mmd_data);</div><div class='hunk'>@@ -1576,125 +1560,6 @@ static void xgbe_rx_desc_init(struct xgbe_channel *channel)</div><div class='ctx'> 	DBGPR("&lt;--rx_desc_init\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata,</div><div class='del'>-				      unsigned int addend)</div><div class='del'>-{</div><div class='del'>-	unsigned int count = 10000;</div><div class='del'>-</div><div class='del'>-	/* Set the addend register value and tell the device */</div><div class='del'>-	XGMAC_IOWRITE(pdata, MAC_TSAR, addend);</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1);</div><div class='del'>-</div><div class='del'>-	/* Wait for addend update to complete */</div><div class='del'>-	while (--count &amp;&amp; XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSADDREG))</div><div class='del'>-		udelay(5);</div><div class='del'>-</div><div class='del'>-	if (!count)</div><div class='del'>-		netdev_err(pdata-&gt;netdev,</div><div class='del'>-			   "timed out updating timestamp addend register\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec,</div><div class='del'>-				 unsigned int nsec)</div><div class='del'>-{</div><div class='del'>-	unsigned int count = 10000;</div><div class='del'>-</div><div class='del'>-	/* Set the time values and tell the device */</div><div class='del'>-	XGMAC_IOWRITE(pdata, MAC_STSUR, sec);</div><div class='del'>-	XGMAC_IOWRITE(pdata, MAC_STNUR, nsec);</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1);</div><div class='del'>-</div><div class='del'>-	/* Wait for time update to complete */</div><div class='del'>-	while (--count &amp;&amp; XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSINIT))</div><div class='del'>-		udelay(5);</div><div class='del'>-</div><div class='del'>-	if (!count)</div><div class='del'>-		netdev_err(pdata-&gt;netdev, "timed out initializing timestamp\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	u64 nsec;</div><div class='del'>-</div><div class='del'>-	nsec = XGMAC_IOREAD(pdata, MAC_STSR);</div><div class='del'>-	nsec *= NSEC_PER_SEC;</div><div class='del'>-	nsec += XGMAC_IOREAD(pdata, MAC_STNR);</div><div class='del'>-</div><div class='del'>-	return nsec;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	unsigned int tx_snr, tx_ssr;</div><div class='del'>-	u64 nsec;</div><div class='del'>-</div><div class='del'>-	if (pdata-&gt;vdata-&gt;tx_tstamp_workaround) {</div><div class='del'>-		tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR);</div><div class='del'>-		tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR);</div><div class='del'>-	} else {</div><div class='del'>-		tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR);</div><div class='del'>-		tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (XGMAC_GET_BITS(tx_snr, MAC_TXSNR, TXTSSTSMIS))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	nsec = tx_ssr;</div><div class='del'>-	nsec *= NSEC_PER_SEC;</div><div class='del'>-	nsec += tx_snr;</div><div class='del'>-</div><div class='del'>-	return nsec;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet,</div><div class='del'>-			       struct xgbe_ring_desc *rdesc)</div><div class='del'>-{</div><div class='del'>-	u64 nsec;</div><div class='del'>-</div><div class='del'>-	if (XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_CONTEXT_DESC3, TSA) &amp;&amp;</div><div class='del'>-	    !XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_CONTEXT_DESC3, TSD)) {</div><div class='del'>-		nsec = le32_to_cpu(rdesc-&gt;desc1);</div><div class='del'>-		nsec &lt;&lt;= 32;</div><div class='del'>-		nsec |= le32_to_cpu(rdesc-&gt;desc0);</div><div class='del'>-		if (nsec != 0xffffffffffffffffULL) {</div><div class='del'>-			packet-&gt;rx_tstamp = nsec;</div><div class='del'>-			XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='del'>-				       RX_TSTAMP, 1);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_config_tstamp(struct xgbe_prv_data *pdata,</div><div class='del'>-			      unsigned int mac_tscr)</div><div class='del'>-{</div><div class='del'>-	/* Set one nano-second accuracy */</div><div class='del'>-	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1);</div><div class='del'>-</div><div class='del'>-	/* Set fine timestamp update */</div><div class='del'>-	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1);</div><div class='del'>-</div><div class='del'>-	/* Overwrite earlier timestamps */</div><div class='del'>-	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1);</div><div class='del'>-</div><div class='del'>-	XGMAC_IOWRITE(pdata, MAC_TSCR, mac_tscr);</div><div class='del'>-</div><div class='del'>-	/* Exit if timestamping is not enabled */</div><div class='del'>-	if (!XGMAC_GET_BITS(mac_tscr, MAC_TSCR, TSENA))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Initialize time registers */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC);</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC);</div><div class='del'>-	xgbe_update_tstamp_addend(pdata, pdata-&gt;tstamp_addend);</div><div class='del'>-	xgbe_set_tstamp_time(pdata, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* Initialize the timecounter */</div><div class='del'>-	timecounter_init(&amp;pdata-&gt;tstamp_tc, &amp;pdata-&gt;tstamp_cc,</div><div class='del'>-			 ktime_to_ns(ktime_get_real()));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void xgbe_tx_start_xmit(struct xgbe_channel *channel,</div><div class='ctx'> 			       struct xgbe_ring *ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -2868,9 +2733,19 @@ static void xgbe_config_jumbo_enable(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	val = (pdata-&gt;netdev-&gt;mtu &gt; XGMAC_STD_PACKET_MTU) ? 1 : 0;</div><div class='del'>-</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val);</div><div class='add'>+	if (pdata-&gt;netdev-&gt;mtu &gt; XGMAC_JUMBO_PACKET_MTU) {</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, GPSL,</div><div class='add'>+				   XGMAC_GIANT_PACKET_MTU);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, WD, 1);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_TCR, JD, 1);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, GPSLCE, 1);</div><div class='add'>+	} else {</div><div class='add'>+		val = pdata-&gt;netdev-&gt;mtu &gt; XGMAC_STD_PACKET_MTU ? 1 : 0;</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, GPSLCE, 0);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, WD, 0);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_TCR, JD, 0);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_mac_speed(struct xgbe_prv_data *pdata)</div><div class='hunk'>@@ -3545,8 +3420,12 @@ static int xgbe_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	xgbe_config_tx_coalesce(pdata);</div><div class='ctx'> 	xgbe_config_rx_buffer_size(pdata);</div><div class='ctx'> 	xgbe_config_tso_mode(pdata);</div><div class='del'>-	xgbe_config_sph_mode(pdata);</div><div class='del'>-	xgbe_config_rss(pdata);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;netdev-&gt;features &amp; NETIF_F_RXCSUM) {</div><div class='add'>+		xgbe_config_sph_mode(pdata);</div><div class='add'>+		xgbe_config_rss(pdata);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	desc_if-&gt;wrapper_tx_desc_init(pdata);</div><div class='ctx'> 	desc_if-&gt;wrapper_rx_desc_init(pdata);</div><div class='ctx'> 	xgbe_enable_dma_interrupts(pdata);</div><div class='hunk'>@@ -3675,13 +3554,6 @@ void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *hw_if)</div><div class='ctx'> 	hw_if-&gt;rx_mmc_int = xgbe_rx_mmc_int;</div><div class='ctx'> 	hw_if-&gt;read_mmc_stats = xgbe_read_mmc_stats;</div><div class='ctx'> </div><div class='del'>-	/* For PTP config */</div><div class='del'>-	hw_if-&gt;config_tstamp = xgbe_config_tstamp;</div><div class='del'>-	hw_if-&gt;update_tstamp_addend = xgbe_update_tstamp_addend;</div><div class='del'>-	hw_if-&gt;set_tstamp_time = xgbe_set_tstamp_time;</div><div class='del'>-	hw_if-&gt;get_tstamp_time = xgbe_get_tstamp_time;</div><div class='del'>-	hw_if-&gt;get_tx_tstamp = xgbe_get_tx_tstamp;</div><div class='del'>-</div><div class='ctx'> 	/* For Data Center Bridging config */</div><div class='ctx'> 	hw_if-&gt;config_tc = xgbe_config_tc;</div><div class='ctx'> 	hw_if-&gt;config_dcb_tc = xgbe_config_dcb_tc;</div><div class='hunk'>@@ -3702,5 +3574,26 @@ void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *hw_if)</div><div class='ctx'> 	hw_if-&gt;disable_vxlan = xgbe_disable_vxlan;</div><div class='ctx'> 	hw_if-&gt;set_vxlan_id = xgbe_set_vxlan_id;</div><div class='ctx'> </div><div class='add'>+	/* For Split Header*/</div><div class='add'>+	hw_if-&gt;enable_sph = xgbe_config_sph_mode;</div><div class='add'>+	hw_if-&gt;disable_sph = xgbe_disable_sph_mode;</div><div class='add'>+</div><div class='ctx'> 	DBGPR("&lt;--xgbe_init_function_ptrs\n");</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int xgbe_enable_mac_loopback(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Enable MAC loopback mode */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, LM, 1);</div><div class='add'>+</div><div class='add'>+	/* Wait for loopback to stabilize */</div><div class='add'>+	usleep_range(10, 15);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_disable_mac_loopback(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Disable MAC loopback mode */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, LM, 0);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c<br/>index 5475867708f4..3ddd896d6987 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-drv.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-drv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-drv.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-drv.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -476,10 +367,11 @@ static irqreturn_t xgbe_ecc_isr(int irq, void *data)</div><div class='ctx'> static void xgbe_isr_bh_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = from_work(pdata, work, dev_bh_work);</div><div class='add'>+	unsigned int mac_isr, mac_tssr, mac_mdioisr;</div><div class='ctx'> 	struct xgbe_hw_if *hw_if = &amp;pdata-&gt;hw_if;</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='add'>+	bool per_ch_irq, ti, ri, rbu, fbe;</div><div class='ctx'> 	unsigned int dma_isr, dma_ch_isr;</div><div class='del'>-	unsigned int mac_isr, mac_tssr, mac_mdioisr;</div><div class='add'>+	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* The DMA interrupt status register also reports MAC and MTL</div><div class='hunk'>@@ -493,43 +385,73 @@ static void xgbe_isr_bh_work(struct work_struct *work)</div><div class='ctx'> 	netif_dbg(pdata, intr, pdata-&gt;netdev, "DMA_ISR=%#010x\n", dma_isr);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		bool schedule_napi = false;</div><div class='add'>+		struct napi_struct *napi;</div><div class='add'>+</div><div class='ctx'> 		if (!(dma_isr &amp; (1 &lt;&lt; i)))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		channel = pdata-&gt;channel[i];</div><div class='ctx'> </div><div class='ctx'> 		dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);</div><div class='add'>+</div><div class='add'>+		/* Precompute flags once */</div><div class='add'>+		ti  = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI);</div><div class='add'>+		ri  = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI);</div><div class='add'>+		rbu = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RBU);</div><div class='add'>+		fbe = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE);</div><div class='add'>+</div><div class='ctx'> 		netif_dbg(pdata, intr, pdata-&gt;netdev, "DMA_CH%u_ISR=%#010x\n",</div><div class='ctx'> 			  i, dma_ch_isr);</div><div class='ctx'> </div><div class='del'>-		/* The TI or RI interrupt bits may still be set even if using</div><div class='del'>-		 * per channel DMA interrupts. Check to be sure those are not</div><div class='del'>-		 * enabled before using the private data napi structure.</div><div class='add'>+		per_ch_irq = pdata-&gt;per_channel_irq;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Decide which NAPI to use and whether to schedule:</div><div class='add'>+		 * - When not using per-channel IRQs: schedule on global NAPI</div><div class='add'>+		 *   if TI or RI are set.</div><div class='add'>+		 * - RBU should also trigger NAPI (either per-channel or global)</div><div class='add'>+		 *   to allow refill.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!pdata-&gt;per_channel_irq &amp;&amp;</div><div class='del'>-		    (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) ||</div><div class='del'>-		     XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI))) {</div><div class='del'>-			if (napi_schedule_prep(&amp;pdata-&gt;napi)) {</div><div class='del'>-				/* Disable Tx and Rx interrupts */</div><div class='del'>-				xgbe_disable_rx_tx_ints(pdata);</div><div class='add'>+		if (!per_ch_irq &amp;&amp; (ti || ri))</div><div class='add'>+			schedule_napi = true;</div><div class='add'>+</div><div class='add'>+		if (rbu) {</div><div class='add'>+			schedule_napi = true;</div><div class='add'>+			pdata-&gt;ext_stats.rx_buffer_unavailable++;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-				/* Turn on polling */</div><div class='del'>-				__napi_schedule(&amp;pdata-&gt;napi);</div><div class='add'>+		napi = per_ch_irq ? &amp;channel-&gt;napi : &amp;pdata-&gt;napi;</div><div class='add'>+</div><div class='add'>+		if (schedule_napi &amp;&amp; napi_schedule_prep(napi)) {</div><div class='add'>+			/* Disable interrupts appropriately before polling */</div><div class='add'>+			if (per_ch_irq) {</div><div class='add'>+				if (pdata-&gt;channel_irq_mode)</div><div class='add'>+					xgbe_disable_rx_tx_int(pdata, channel);</div><div class='add'>+				else</div><div class='add'>+					disable_irq_nosync(channel-&gt;dma_irq);</div><div class='add'>+			} else {</div><div class='add'>+				xgbe_disable_rx_tx_ints(pdata);</div><div class='ctx'> 			}</div><div class='add'>+</div><div class='add'>+			/* Turn on polling */</div><div class='add'>+			__napi_schedule(napi);</div><div class='ctx'> 		} else {</div><div class='del'>-			/* Don't clear Rx/Tx status if doing per channel DMA</div><div class='del'>-			 * interrupts, these will be cleared by the ISR for</div><div class='del'>-			 * per channel DMA interrupts.</div><div class='add'>+			/*</div><div class='add'>+			 * Don't clear Rx/Tx status if doing per-channel DMA</div><div class='add'>+			 * interrupts; those bits will be serviced/cleared by</div><div class='add'>+			 * the per-channel ISR/NAPI. In non-per-channel mode</div><div class='add'>+			 * when we're not scheduling NAPI here, ensure we don't</div><div class='add'>+			 * accidentally clear TI/RI in HW: zero them in the</div><div class='add'>+			 * local copy so that the eventual write-back does not</div><div class='add'>+			 * clear TI/RI.</div><div class='ctx'> 			 */</div><div class='ctx'> 			XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, TI, 0);</div><div class='ctx'> 			XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, RI, 0);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RBU))</div><div class='del'>-			pdata-&gt;ext_stats.rx_buffer_unavailable++;</div><div class='del'>-</div><div class='ctx'> 		/* Restart the device on a Fatal Bus Error */</div><div class='del'>-		if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE))</div><div class='add'>+		if (fbe)</div><div class='ctx'> 			schedule_work(&amp;pdata-&gt;restart_work);</div><div class='ctx'> </div><div class='ctx'> 		/* Clear interrupt signals */</div><div class='hunk'>@@ -557,7 +479,7 @@ static void xgbe_isr_bh_work(struct work_struct *work)</div><div class='ctx'> 			if (XGMAC_GET_BITS(mac_tssr, MAC_TSSR, TXTSC)) {</div><div class='ctx'> 				/* Read Tx Timestamp to clear interrupt */</div><div class='ctx'> 				pdata-&gt;tx_tstamp =</div><div class='del'>-					hw_if-&gt;get_tx_tstamp(pdata);</div><div class='add'>+					xgbe_get_tx_tstamp(pdata);</div><div class='ctx'> 				queue_work(pdata-&gt;dev_workqueue,</div><div class='ctx'> 					   &amp;pdata-&gt;tx_tstamp_work);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -643,7 +565,8 @@ static irqreturn_t xgbe_dma_isr(int irq, void *data)</div><div class='ctx'> </div><div class='ctx'> static void xgbe_tx_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel = from_timer(channel, t, tx_timer);</div><div class='add'>+	struct xgbe_channel *channel = timer_container_of(channel, t,</div><div class='add'>+							  tx_timer);</div><div class='ctx'> 	struct xgbe_prv_data *pdata = channel-&gt;pdata;</div><div class='ctx'> 	struct napi_struct *napi;</div><div class='ctx'> </div><div class='hunk'>@@ -681,7 +604,8 @@ static void xgbe_service(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void xgbe_service_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_prv_data *pdata = from_timer(pdata, t, service_timer);</div><div class='add'>+	struct xgbe_prv_data *pdata = timer_container_of(pdata, t,</div><div class='add'>+							 service_timer);</div><div class='ctx'> 	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='hunk'>@@ -728,7 +652,7 @@ static void xgbe_stop_timers(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;pdata-&gt;service_timer);</div><div class='add'>+	timer_delete_sync(&amp;pdata-&gt;service_timer);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='ctx'> 		channel = pdata-&gt;channel[i];</div><div class='hunk'>@@ -736,7 +660,7 @@ static void xgbe_stop_timers(struct xgbe_prv_data *pdata)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		/* Deactivate the Tx timer */</div><div class='del'>-		del_timer_sync(&amp;channel-&gt;tx_timer);</div><div class='add'>+		timer_delete_sync(&amp;channel-&gt;tx_timer);</div><div class='ctx'> 		channel-&gt;tx_timer_active = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -798,6 +722,21 @@ void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	hw_feat-&gt;pps_out_num  = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, PPSOUTNUM);</div><div class='ctx'> 	hw_feat-&gt;aux_snap_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, AUXSNAPNUM);</div><div class='ctx'> </div><div class='add'>+	/* Sanity check and warn if hardware reports more than supported */</div><div class='add'>+	if (hw_feat-&gt;pps_out_num &gt; XGBE_MAX_PPS_OUT) {</div><div class='add'>+		dev_warn(pdata-&gt;dev,</div><div class='add'>+			 "Hardware reports %u PPS outputs, limiting to %u\n",</div><div class='add'>+			 hw_feat-&gt;pps_out_num, XGBE_MAX_PPS_OUT);</div><div class='add'>+		hw_feat-&gt;pps_out_num = XGBE_MAX_PPS_OUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hw_feat-&gt;aux_snap_num &gt; XGBE_MAX_AUX_SNAP) {</div><div class='add'>+		dev_warn(pdata-&gt;dev,</div><div class='add'>+			 "Hardware reports %u aux snapshot inputs, limiting to %u\n",</div><div class='add'>+			 hw_feat-&gt;aux_snap_num, XGBE_MAX_AUX_SNAP);</div><div class='add'>+		hw_feat-&gt;aux_snap_num = XGBE_MAX_AUX_SNAP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Translate the Hash Table size into actual number */</div><div class='ctx'> 	switch (hw_feat-&gt;hash_table_size) {</div><div class='ctx'> 	case 0:</div><div class='hunk'>@@ -1172,7 +1111,6 @@ static void xgbe_free_rx_data(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> static int xgbe_phy_reset(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	pdata-&gt;phy_link = -1;</div><div class='ctx'> 	pdata-&gt;phy_speed = SPEED_UNKNOWN;</div><div class='ctx'> </div><div class='ctx'> 	return pdata-&gt;phy_if.phy_reset(pdata);</div><div class='hunk'>@@ -1352,6 +1290,11 @@ static int xgbe_start(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	udp_tunnel_nic_reset_ntf(netdev);</div><div class='ctx'> </div><div class='add'>+	/* Reset the phy settings */</div><div class='add'>+	ret = xgbe_phy_reset(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_txrx;</div><div class='add'>+</div><div class='ctx'> 	netif_tx_start_all_queues(netdev);</div><div class='ctx'> </div><div class='ctx'> 	xgbe_start_timers(pdata);</div><div class='hunk'>@@ -1361,6 +1304,10 @@ static int xgbe_start(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_txrx:</div><div class='add'>+	hw_if-&gt;disable_rx(pdata);</div><div class='add'>+	hw_if-&gt;disable_tx(pdata);</div><div class='add'>+</div><div class='ctx'> err_irqs:</div><div class='ctx'> 	xgbe_free_irqs(pdata);</div><div class='ctx'> </div><div class='hunk'>@@ -1478,199 +1425,6 @@ static void xgbe_restart(struct work_struct *work)</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_tx_tstamp(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct xgbe_prv_data *pdata = container_of(work,</div><div class='del'>-						   struct xgbe_prv_data,</div><div class='del'>-						   tx_tstamp_work);</div><div class='del'>-	struct skb_shared_hwtstamps hwtstamps;</div><div class='del'>-	u64 nsec;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-	if (!pdata-&gt;tx_tstamp_skb)</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='del'>-	if (pdata-&gt;tx_tstamp) {</div><div class='del'>-		nsec = timecounter_cyc2time(&amp;pdata-&gt;tstamp_tc,</div><div class='del'>-					    pdata-&gt;tx_tstamp);</div><div class='del'>-</div><div class='del'>-		memset(&amp;hwtstamps, 0, sizeof(hwtstamps));</div><div class='del'>-		hwtstamps.hwtstamp = ns_to_ktime(nsec);</div><div class='del'>-		skb_tstamp_tx(pdata-&gt;tx_tstamp_skb, &amp;hwtstamps);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_kfree_skb_any(pdata-&gt;tx_tstamp_skb);</div><div class='del'>-</div><div class='del'>-	pdata-&gt;tx_tstamp_skb = NULL;</div><div class='del'>-</div><div class='del'>-unlock:</div><div class='del'>-	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata,</div><div class='del'>-				      struct ifreq *ifreq)</div><div class='del'>-{</div><div class='del'>-	if (copy_to_user(ifreq-&gt;ifr_data, &amp;pdata-&gt;tstamp_config,</div><div class='del'>-			 sizeof(pdata-&gt;tstamp_config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata,</div><div class='del'>-				      struct ifreq *ifreq)</div><div class='del'>-{</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-	unsigned int mac_tscr;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;config, ifreq-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	mac_tscr = 0;</div><div class='del'>-</div><div class='del'>-	switch (config.tx_type) {</div><div class='del'>-	case HWTSTAMP_TX_OFF:</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HWTSTAMP_TX_ON:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return -ERANGE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (config.rx_filter) {</div><div class='del'>-	case HWTSTAMP_FILTER_NONE:</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='del'>-	case HWTSTAMP_FILTER_ALL:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2, UDP, any kind of event packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-		fallthrough;	/* to PTP v1, UDP, any kind of event packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2, UDP, Sync packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-		fallthrough;	/* to PTP v1, UDP, Sync packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2, UDP, Delay_req packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-		fallthrough;	/* to PTP v1, UDP, Delay_req packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* 802.AS1, Ethernet, any kind of event packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* 802.AS1, Ethernet, Sync packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* 802.AS1, Ethernet, Delay_req packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2/802.AS1, any layer, any kind of event packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2/802.AS1, any layer, Sync packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2/802.AS1, any layer, Delay_req packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return -ERANGE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pdata-&gt;hw_if.config_tstamp(pdata, mac_tscr);</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;pdata-&gt;tstamp_config, &amp;config, sizeof(config));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,</div><div class='del'>-				struct sk_buff *skb,</div><div class='del'>-				struct xgbe_packet_data *packet)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (XGMAC_GET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES, PTP)) {</div><div class='del'>-		spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-		if (pdata-&gt;tx_tstamp_skb) {</div><div class='del'>-			/* Another timestamp in progress, ignore this one */</div><div class='del'>-			XGMAC_SET_BITS(packet-&gt;attributes,</div><div class='del'>-				       TX_PACKET_ATTRIBUTES, PTP, 0);</div><div class='del'>-		} else {</div><div class='del'>-			pdata-&gt;tx_tstamp_skb = skb_get(skb);</div><div class='del'>-			skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	skb_tx_timestamp(skb);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void xgbe_prep_vlan(struct sk_buff *skb, struct xgbe_packet_data *packet)</div><div class='ctx'> {</div><div class='ctx'> 	if (skb_vlan_tag_present(skb))</div><div class='hunk'>@@ -1860,11 +1614,6 @@ static int xgbe_open(struct net_device *netdev)</div><div class='ctx'> 		goto err_dev_wq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Reset the phy settings */</div><div class='del'>-	ret = xgbe_phy_reset(pdata);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_an_wq;</div><div class='del'>-</div><div class='ctx'> 	/* Enable the clocks */</div><div class='ctx'> 	ret = clk_prepare_enable(pdata-&gt;sysclk);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -1883,6 +1632,9 @@ static int xgbe_open(struct net_device *netdev)</div><div class='ctx'> 	INIT_WORK(&amp;pdata-&gt;stopdev_work, xgbe_stopdev);</div><div class='ctx'> 	INIT_WORK(&amp;pdata-&gt;tx_tstamp_work, xgbe_tx_tstamp);</div><div class='ctx'> </div><div class='add'>+	/* Initialize PTP timestamping and clock. */</div><div class='add'>+	xgbe_init_ptp(pdata);</div><div class='add'>+</div><div class='ctx'> 	ret = xgbe_alloc_memory(pdata);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_ptpclk;</div><div class='hunk'>@@ -2037,27 +1789,6 @@ static int xgbe_set_mac_address(struct net_device *netdev, void *addr)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_ioctl(struct net_device *netdev, struct ifreq *ifreq, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		ret = xgbe_get_hwtstamp_settings(pdata, ifreq);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		ret = xgbe_set_hwtstamp_settings(pdata, ifreq);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		ret = -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int xgbe_change_mtu(struct net_device *netdev, int mtu)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='hunk'>@@ -2257,10 +1988,17 @@ static int xgbe_set_features(struct net_device *netdev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if ((features &amp; NETIF_F_RXCSUM) &amp;&amp; !rxcsum)</div><div class='add'>+	if ((features &amp; NETIF_F_RXCSUM) &amp;&amp; !rxcsum) {</div><div class='add'>+		hw_if-&gt;enable_sph(pdata);</div><div class='add'>+		hw_if-&gt;enable_vxlan(pdata);</div><div class='ctx'> 		hw_if-&gt;enable_rx_csum(pdata);</div><div class='del'>-	else if (!(features &amp; NETIF_F_RXCSUM) &amp;&amp; rxcsum)</div><div class='add'>+		schedule_work(&amp;pdata-&gt;restart_work);</div><div class='add'>+	} else if (!(features &amp; NETIF_F_RXCSUM) &amp;&amp; rxcsum) {</div><div class='add'>+		hw_if-&gt;disable_sph(pdata);</div><div class='add'>+		hw_if-&gt;disable_vxlan(pdata);</div><div class='ctx'> 		hw_if-&gt;disable_rx_csum(pdata);</div><div class='add'>+		schedule_work(&amp;pdata-&gt;restart_work);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if ((features &amp; NETIF_F_HW_VLAN_CTAG_RX) &amp;&amp; !rxvlan)</div><div class='ctx'> 		hw_if-&gt;enable_rx_vlan_stripping(pdata);</div><div class='hunk'>@@ -2296,7 +2034,6 @@ static const struct net_device_ops xgbe_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= xgbe_set_rx_mode,</div><div class='ctx'> 	.ndo_set_mac_address	= xgbe_set_mac_address,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_eth_ioctl		= xgbe_ioctl,</div><div class='ctx'> 	.ndo_change_mtu		= xgbe_change_mtu,</div><div class='ctx'> 	.ndo_tx_timeout		= xgbe_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats64	= xgbe_get_stats64,</div><div class='hunk'>@@ -2309,6 +2046,8 @@ static const struct net_device_ops xgbe_netdev_ops = {</div><div class='ctx'> 	.ndo_fix_features	= xgbe_fix_features,</div><div class='ctx'> 	.ndo_set_features	= xgbe_set_features,</div><div class='ctx'> 	.ndo_features_check	= xgbe_features_check,</div><div class='add'>+	.ndo_hwtstamp_get	= xgbe_get_hwtstamp_settings,</div><div class='add'>+	.ndo_hwtstamp_set	= xgbe_set_hwtstamp_settings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct net_device_ops *xgbe_get_netdev_ops(void)</div><div class='hunk'>@@ -2646,12 +2385,8 @@ skip_data:</div><div class='ctx'> </div><div class='ctx'> 		if (XGMAC_GET_BITS(packet-&gt;attributes,</div><div class='ctx'> 				   RX_PACKET_ATTRIBUTES, RX_TSTAMP)) {</div><div class='del'>-			u64 nsec;</div><div class='del'>-</div><div class='del'>-			nsec = timecounter_cyc2time(&amp;pdata-&gt;tstamp_tc,</div><div class='del'>-						    packet-&gt;rx_tstamp);</div><div class='ctx'> 			hwtstamps = skb_hwtstamps(skb);</div><div class='del'>-			hwtstamps-&gt;hwtstamp = ns_to_ktime(nsec);</div><div class='add'>+			hwtstamps-&gt;hwtstamp = ns_to_ktime(packet-&gt;rx_tstamp);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (XGMAC_GET_BITS(packet-&gt;attributes,</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c b/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c<br/>index 4431ab1c18b3..0d19b09497a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='hunk'>@@ -194,6 +85,9 @@ static void xgbe_get_strings(struct net_device *netdev, u32 stringset, u8 *data)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	switch (stringset) {</div><div class='add'>+	case ETH_SS_TEST:</div><div class='add'>+		xgbe_selftest_get_strings(pdata, data);</div><div class='add'>+		break;</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='ctx'> 		for (i = 0; i &lt; XGBE_STATS_COUNT; i++)</div><div class='ctx'> 			ethtool_puts(&amp;data, xgbe_gstring_stats[i].stat_string);</div><div class='hunk'>@@ -240,6 +134,9 @@ static int xgbe_get_sset_count(struct net_device *netdev, int stringset)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	switch (stringset) {</div><div class='add'>+	case ETH_SS_TEST:</div><div class='add'>+		ret = xgbe_selftest_get_count(pdata);</div><div class='add'>+		break;</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='ctx'> 		ret = XGBE_STATS_COUNT +</div><div class='ctx'> 		      (pdata-&gt;tx_ring_count * 2) +</div><div class='hunk'>@@ -438,6 +335,7 @@ static int xgbe_get_coalesce(struct net_device *netdev,</div><div class='ctx'> 	ec-&gt;rx_coalesce_usecs = pdata-&gt;rx_usecs;</div><div class='ctx'> 	ec-&gt;rx_max_coalesced_frames = pdata-&gt;rx_frames;</div><div class='ctx'> </div><div class='add'>+	ec-&gt;tx_coalesce_usecs = pdata-&gt;tx_usecs;</div><div class='ctx'> 	ec-&gt;tx_max_coalesced_frames = pdata-&gt;tx_frames;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -451,7 +349,8 @@ static int xgbe_set_coalesce(struct net_device *netdev,</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	struct xgbe_hw_if *hw_if = &amp;pdata-&gt;hw_if;</div><div class='ctx'> 	unsigned int rx_frames, rx_riwt, rx_usecs;</div><div class='del'>-	unsigned int tx_frames;</div><div class='add'>+	unsigned int tx_frames, tx_usecs;</div><div class='add'>+	unsigned int jiffy_us = jiffies_to_usecs(1);</div><div class='ctx'> </div><div class='ctx'> 	rx_riwt = hw_if-&gt;usec_to_riwt(pdata, ec-&gt;rx_coalesce_usecs);</div><div class='ctx'> 	rx_usecs = ec-&gt;rx_coalesce_usecs;</div><div class='hunk'>@@ -473,20 +372,42 @@ static int xgbe_set_coalesce(struct net_device *netdev,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	tx_usecs = ec-&gt;tx_coalesce_usecs;</div><div class='ctx'> 	tx_frames = ec-&gt;tx_max_coalesced_frames;</div><div class='ctx'> </div><div class='ctx'> 	/* Check the bounds of values for Tx */</div><div class='add'>+	if (!tx_usecs) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "tx-usecs must not be 0");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (tx_usecs &gt; XGMAC_MAX_COAL_TX_TICK) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack, "tx-usecs is limited to %d usec",</div><div class='add'>+				       XGMAC_MAX_COAL_TX_TICK);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> 	if (tx_frames &gt; pdata-&gt;tx_desc_count) {</div><div class='ctx'> 		netdev_err(netdev, "tx-frames is limited to %d frames\n",</div><div class='ctx'> 			   pdata-&gt;tx_desc_count);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Round tx-usecs to nearest multiple of jiffy granularity */</div><div class='add'>+	if (tx_usecs % jiffy_us) {</div><div class='add'>+		tx_usecs = rounddown(tx_usecs, jiffy_us);</div><div class='add'>+		if (!tx_usecs)</div><div class='add'>+			tx_usecs = jiffy_us;</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "tx-usecs rounded to %u usec due to jiffy granularity (%u usec)",</div><div class='add'>+				       tx_usecs, jiffy_us);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pdata-&gt;rx_riwt = rx_riwt;</div><div class='ctx'> 	pdata-&gt;rx_usecs = rx_usecs;</div><div class='ctx'> 	pdata-&gt;rx_frames = rx_frames;</div><div class='ctx'> 	hw_if-&gt;config_rx_coalesce(pdata);</div><div class='ctx'> </div><div class='add'>+	pdata-&gt;tx_usecs = tx_usecs;</div><div class='ctx'> 	pdata-&gt;tx_frames = tx_frames;</div><div class='ctx'> 	hw_if-&gt;config_tx_coalesce(pdata);</div><div class='ctx'> </div><div class='hunk'>@@ -549,7 +470,7 @@ static int xgbe_set_rxfh(struct net_device *netdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	struct xgbe_hw_if *hw_if = &amp;pdata-&gt;hw_if;</div><div class='del'>-	unsigned int ret;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (rxfh-&gt;hfunc != ETH_RSS_HASH_NO_CHANGE &amp;&amp;</div><div class='ctx'> 	    rxfh-&gt;hfunc != ETH_RSS_HASH_TOP) {</div><div class='hunk'>@@ -818,7 +739,7 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops xgbe_ethtool_ops = {</div><div class='del'>-	.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |</div><div class='add'>+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_MAX_FRAMES,</div><div class='ctx'> 	.get_drvinfo = xgbe_get_drvinfo,</div><div class='ctx'> 	.get_msglevel = xgbe_get_msglevel,</div><div class='hunk'>@@ -845,6 +766,7 @@ static const struct ethtool_ops xgbe_ethtool_ops = {</div><div class='ctx'> 	.set_ringparam = xgbe_set_ringparam,</div><div class='ctx'> 	.get_channels = xgbe_get_channels,</div><div class='ctx'> 	.set_channels = xgbe_set_channels,</div><div class='add'>+	.self_test = xgbe_selftest_run,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct ethtool_ops *xgbe_get_ethtool_ops(void)</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c b/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c<br/>new file mode 100644<br/>index 000000000000..0127988e10be<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c</a></div><div class='hunk'>@@ -0,0 +1,399 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ *</div><div class='add'>+ * Author: Raju Rangoju &lt;Raju.Rangoju@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+void xgbe_update_tstamp_time(struct xgbe_prv_data *pdata,</div><div class='add'>+			     unsigned int sec, unsigned int nsec)</div><div class='add'>+{</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	/* Set the time values and tell the device */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_STSUR, sec);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_STNUR, nsec);</div><div class='add'>+</div><div class='add'>+	/* issue command to update the system time value */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_TSCR,</div><div class='add'>+		      XGMAC_IOREAD(pdata, MAC_TSCR) |</div><div class='add'>+		      (1 &lt;&lt; MAC_TSCR_TSUPDT_INDEX));</div><div class='add'>+</div><div class='add'>+	/* Wait for the time adjust/update to complete */</div><div class='add'>+	count = 10000;</div><div class='add'>+	while (--count &amp;&amp; XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSUPDT))</div><div class='add'>+		udelay(5);</div><div class='add'>+</div><div class='add'>+	if (count &lt; 0)</div><div class='add'>+		netdev_err(pdata-&gt;netdev,</div><div class='add'>+			   "timed out updating system timestamp\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata,</div><div class='add'>+			       unsigned int addend)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = 10000;</div><div class='add'>+</div><div class='add'>+	/* Set the addend register value and tell the device */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_TSAR, addend);</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1);</div><div class='add'>+</div><div class='add'>+	/* Wait for addend update to complete */</div><div class='add'>+	while (--count &amp;&amp; XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSADDREG))</div><div class='add'>+		udelay(5);</div><div class='add'>+</div><div class='add'>+	if (!count)</div><div class='add'>+		netdev_err(pdata-&gt;netdev,</div><div class='add'>+			   "timed out updating timestamp addend register\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec,</div><div class='add'>+			  unsigned int nsec)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = 10000;</div><div class='add'>+</div><div class='add'>+	/* Set the time values and tell the device */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_STSUR, sec);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_STNUR, nsec);</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1);</div><div class='add'>+</div><div class='add'>+	/* Wait for time update to complete */</div><div class='add'>+	while (--count &amp;&amp; XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSINIT))</div><div class='add'>+		udelay(5);</div><div class='add'>+</div><div class='add'>+	if (!count)</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "timed out initializing timestamp\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	u64 nsec;</div><div class='add'>+</div><div class='add'>+	nsec = XGMAC_IOREAD(pdata, MAC_STSR);</div><div class='add'>+	nsec *= NSEC_PER_SEC;</div><div class='add'>+	nsec += XGMAC_IOREAD(pdata, MAC_STNR);</div><div class='add'>+</div><div class='add'>+	return nsec;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int tx_snr, tx_ssr;</div><div class='add'>+	u64 nsec;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;vdata-&gt;tx_tstamp_workaround) {</div><div class='add'>+		tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR);</div><div class='add'>+		tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR);</div><div class='add'>+	} else {</div><div class='add'>+		tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR);</div><div class='add'>+		tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (XGMAC_GET_BITS(tx_snr, MAC_TXSNR, TXTSSTSMIS))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	nsec = tx_ssr;</div><div class='add'>+	nsec *= NSEC_PER_SEC;</div><div class='add'>+	nsec += tx_snr;</div><div class='add'>+</div><div class='add'>+	return nsec;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet,</div><div class='add'>+			struct xgbe_ring_desc *rdesc)</div><div class='add'>+{</div><div class='add'>+	u64 nsec;</div><div class='add'>+</div><div class='add'>+	if (XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_CONTEXT_DESC3, TSA) &amp;&amp;</div><div class='add'>+	    !XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_CONTEXT_DESC3, TSD)) {</div><div class='add'>+		nsec = le32_to_cpu(rdesc-&gt;desc1);</div><div class='add'>+		nsec *= NSEC_PER_SEC;</div><div class='add'>+		nsec += le32_to_cpu(rdesc-&gt;desc0);</div><div class='add'>+		if (nsec != 0xffffffffffffffffULL) {</div><div class='add'>+			packet-&gt;rx_tstamp = nsec;</div><div class='add'>+			XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+				       RX_TSTAMP, 1);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_config_tstamp(struct xgbe_prv_data *pdata, unsigned int mac_tscr)</div><div class='add'>+{</div><div class='add'>+	unsigned int value = 0;</div><div class='add'>+</div><div class='add'>+	value = XGMAC_IOREAD(pdata, MAC_TSCR);</div><div class='add'>+	value |= mac_tscr;</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_TSCR, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_tx_tstamp(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = container_of(work,</div><div class='add'>+						   struct xgbe_prv_data,</div><div class='add'>+						   tx_tstamp_work);</div><div class='add'>+	struct skb_shared_hwtstamps hwtstamps;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+	if (!pdata-&gt;tx_tstamp_skb)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;tx_tstamp) {</div><div class='add'>+		memset(&amp;hwtstamps, 0, sizeof(hwtstamps));</div><div class='add'>+		hwtstamps.hwtstamp = ns_to_ktime(pdata-&gt;tx_tstamp);</div><div class='add'>+		skb_tstamp_tx(pdata-&gt;tx_tstamp_skb, &amp;hwtstamps);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_kfree_skb_any(pdata-&gt;tx_tstamp_skb);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;tx_tstamp_skb = NULL;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgbe_get_hwtstamp_settings(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	*config = pdata-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgbe_set_hwtstamp_settings(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+	unsigned int mac_tscr = 0;</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='add'>+	case HWTSTAMP_FILTER_ALL:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* PTP v2, UDP, any kind of event packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		fallthrough;    /* to PTP v1, UDP, any kind of event packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+		/* PTP v2, UDP, Sync packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		fallthrough;    /* to PTP v1, UDP, Sync packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* PTP v2, UDP, Delay_req packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		fallthrough;    /* to PTP v1, UDP, Delay_req packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* 802.AS1, Ethernet, any kind of event packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* 802.AS1, Ethernet, Sync packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* 802.AS1, Ethernet, Delay_req packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* PTP v2/802.AS1, any layer, any kind of event packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* PTP v2/802.AS1, any layer, Sync packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* PTP v2/802.AS1, any layer, Delay_req packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_config_tstamp(pdata, mac_tscr);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;tstamp_config = *config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,</div><div class='add'>+			 struct sk_buff *skb,</div><div class='add'>+			 struct xgbe_packet_data *packet)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (XGMAC_GET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES, PTP)) {</div><div class='add'>+		spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+		if (pdata-&gt;tx_tstamp_skb) {</div><div class='add'>+			/* Another timestamp in progress, ignore this one */</div><div class='add'>+			XGMAC_SET_BITS(packet-&gt;attributes,</div><div class='add'>+				       TX_PACKET_ATTRIBUTES, PTP, 0);</div><div class='add'>+		} else {</div><div class='add'>+			pdata-&gt;tx_tstamp_skb = skb_get(skb);</div><div class='add'>+			skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgbe_init_ptp(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int mac_tscr = 0;</div><div class='add'>+	struct timespec64 now;</div><div class='add'>+	u64 dividend;</div><div class='add'>+</div><div class='add'>+	/* Register Settings to be done based on the link speed. */</div><div class='add'>+	switch (pdata-&gt;phy.speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		XGMAC_IOWRITE(pdata, MAC_TICNR, MAC_TICNR_1G_INITVAL);</div><div class='add'>+		XGMAC_IOWRITE(pdata, MAC_TECNR, MAC_TECNR_1G_INITVAL);</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_TICSNR, TSICSNS,</div><div class='add'>+				   MAC_TICSNR_10G_INITVAL);</div><div class='add'>+		XGMAC_IOWRITE(pdata, MAC_TECNR, MAC_TECNR_10G_INITVAL);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_TECSNR, TSECSNS,</div><div class='add'>+				   MAC_TECSNR_10G_INITVAL);</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_UNKNOWN:</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable IEEE1588 PTP clock. */</div><div class='add'>+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+</div><div class='add'>+	/* Overwrite earlier timestamps */</div><div class='add'>+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1);</div><div class='add'>+</div><div class='add'>+	/* Set one nano-second accuracy */</div><div class='add'>+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1);</div><div class='add'>+</div><div class='add'>+	/* Set fine timestamp update */</div><div class='add'>+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1);</div><div class='add'>+</div><div class='add'>+	xgbe_config_tstamp(pdata, mac_tscr);</div><div class='add'>+</div><div class='add'>+	/* Exit if timestamping is not enabled */</div><div class='add'>+	if (!XGMAC_GET_BITS(mac_tscr, MAC_TSCR, TSENA))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;vdata-&gt;tstamp_ptp_clock_freq) {</div><div class='add'>+		/* Initialize time registers based on</div><div class='add'>+		 * 125MHz PTP Clock Frequency</div><div class='add'>+		 */</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC,</div><div class='add'>+				   XGBE_V2_TSTAMP_SSINC);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC,</div><div class='add'>+				   XGBE_V2_TSTAMP_SNSINC);</div><div class='add'>+	} else {</div><div class='add'>+		/* Initialize time registers based on</div><div class='add'>+		 * 50MHz PTP Clock Frequency</div><div class='add'>+		 */</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate the addend:</div><div class='add'>+	 *   addend = 2^32 / (PTP ref clock / (PTP clock based on SSINC))</div><div class='add'>+	 *          = (2^32 * (PTP clock based on SSINC)) / PTP ref clock</div><div class='add'>+	 */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;tstamp_ptp_clock_freq)</div><div class='add'>+		dividend = XGBE_V2_PTP_ACT_CLK_FREQ;</div><div class='add'>+	else</div><div class='add'>+		dividend = XGBE_PTP_ACT_CLK_FREQ;</div><div class='add'>+</div><div class='add'>+	dividend = (u64)(dividend &lt;&lt; 32);</div><div class='add'>+	pdata-&gt;tstamp_addend = div_u64(dividend, pdata-&gt;ptpclk_rate);</div><div class='add'>+</div><div class='add'>+	xgbe_update_tstamp_addend(pdata, pdata-&gt;tstamp_addend);</div><div class='add'>+</div><div class='add'>+	dma_wmb();</div><div class='add'>+	/* initialize system time */</div><div class='add'>+	ktime_get_real_ts64(&amp;now);</div><div class='add'>+</div><div class='add'>+	/* lower 32 bits of tv_sec are safe until y2106 */</div><div class='add'>+	xgbe_set_tstamp_time(pdata, (u32)now.tv_sec, now.tv_nsec);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c b/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c<br/>index 7a833894f52a..65eb7b577b65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-i2c.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-i2c.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -179,7 +70,7 @@ static int xgbe_i2c_set_enable(struct xgbe_prv_data *pdata, bool enable)</div><div class='ctx'> </div><div class='ctx'> static int xgbe_i2c_disable(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int ret;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = xgbe_i2c_set_enable(pdata, false);</div><div class='ctx'> 	if (ret) {</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-main.c b/drivers/net/ethernet/amd/xgbe/xgbe-main.c<br/>index 0e8698928e4d..d1f0419edb23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-main.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -384,7 +275,7 @@ int xgbe_config_netdev(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='ctx'> 	netdev-&gt;min_mtu = 0;</div><div class='del'>-	netdev-&gt;max_mtu = XGMAC_JUMBO_PACKET_MTU;</div><div class='add'>+	netdev-&gt;max_mtu = XGMAC_GIANT_PACKET_MTU - XGBE_ETH_FRAME_HDR;</div><div class='ctx'> </div><div class='ctx'> 	/* Use default watchdog timeout */</div><div class='ctx'> 	netdev-&gt;watchdog_timeo = 0;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c<br/>index 07f4f3418d01..7675bb98f029 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-mdio.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='hunk'>@@ -375,6 +266,10 @@ static void xgbe_an37_set(struct xgbe_prv_data *pdata, bool enable,</div><div class='ctx'> 		reg |= MDIO_VEND2_CTRL1_AN_RESTART;</div><div class='ctx'> </div><div class='ctx'> 	XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_CTRL1, reg);</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_PCS_DIG_CTRL);</div><div class='add'>+	reg |= XGBE_VEND2_MAC_AUTO_SW;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_PCS_DIG_CTRL, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_an37_restart(struct xgbe_prv_data *pdata)</div><div class='hunk'>@@ -1003,6 +898,11 @@ static void xgbe_an37_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(pdata, link, pdata-&gt;netdev, "CL37 AN (%s) initialized\n",</div><div class='ctx'> 		  (pdata-&gt;an_mode == XGBE_AN_MODE_CL37) ? "BaseX" : "SGMII");</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1);</div><div class='add'>+	reg &amp;= ~MDIO_AN_CTRL1_ENABLE;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_CTRL1, reg);</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_an73_init(struct xgbe_prv_data *pdata)</div><div class='hunk'>@@ -1404,6 +1304,10 @@ static void xgbe_phy_status(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;phy.link = pdata-&gt;phy_if.phy_impl.link_status(pdata,</div><div class='ctx'> 							     &amp;an_restart);</div><div class='add'>+	/* bail out if the link status register read fails */</div><div class='add'>+	if (pdata-&gt;phy.link &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (an_restart) {</div><div class='ctx'> 		xgbe_phy_config_aneg(pdata);</div><div class='ctx'> 		goto adjust_link;</div><div class='hunk'>@@ -1651,6 +1555,7 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> 		pdata-&gt;phy.duplex = DUPLEX_FULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	pdata-&gt;phy_link = 0;</div><div class='ctx'> 	pdata-&gt;phy.link = 0;</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;phy.pause_autoneg = pdata-&gt;pause_autoneg;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c<br/>index c636999a6a84..e3e1dca9856a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-pci.c</a></div><div class='hunk'>@@ -1,123 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/log2.h&gt;</div><div class='add'>+#include "xgbe-smn.h"</div><div class='ctx'> </div><div class='ctx'> #include "xgbe.h"</div><div class='ctx'> #include "xgbe-common.h"</div><div class='hunk'>@@ -207,14 +99,14 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_prv_data *pdata;</div><div class='del'>-	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	void __iomem * const *iomap_table;</div><div class='del'>-	struct pci_dev *rdev;</div><div class='add'>+	unsigned int port_addr_size, reg;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct xgbe_prv_data *pdata;</div><div class='ctx'> 	unsigned int ma_lo, ma_hi;</div><div class='del'>-	unsigned int reg;</div><div class='del'>-	int bar_mask;</div><div class='del'>-	int ret;</div><div class='add'>+	struct pci_dev *rdev;</div><div class='add'>+	int bar_mask, ret;</div><div class='add'>+	u32 address;</div><div class='ctx'> </div><div class='ctx'> 	pdata = xgbe_alloc_pdata(dev);</div><div class='ctx'> 	if (IS_ERR(pdata)) {</div><div class='hunk'>@@ -274,20 +166,31 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	/* Set the PCS indirect addressing definition registers */</div><div class='ctx'> 	rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));</div><div class='del'>-	if (rdev &amp;&amp;</div><div class='del'>-	    (rdev-&gt;vendor == PCI_VENDOR_ID_AMD) &amp;&amp; (rdev-&gt;device == 0x15d0)) {</div><div class='del'>-		pdata-&gt;xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;</div><div class='del'>-		pdata-&gt;xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;</div><div class='del'>-	} else if (rdev &amp;&amp; (rdev-&gt;vendor == PCI_VENDOR_ID_AMD) &amp;&amp;</div><div class='del'>-		   (rdev-&gt;device == 0x14b5)) {</div><div class='del'>-		pdata-&gt;xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF;</div><div class='del'>-		pdata-&gt;xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT;</div><div class='del'>-</div><div class='del'>-		/* Yellow Carp devices do not need cdr workaround */</div><div class='del'>-		pdata-&gt;vdata-&gt;an_cdr_workaround = 0;</div><div class='del'>-</div><div class='del'>-		/* Yellow Carp devices do not need rrc */</div><div class='del'>-		pdata-&gt;vdata-&gt;enable_rrc = 0;</div><div class='add'>+	if (rdev &amp;&amp; rdev-&gt;vendor == PCI_VENDOR_ID_AMD) {</div><div class='add'>+		switch (rdev-&gt;device) {</div><div class='add'>+		case XGBE_RV_PCI_DEVICE_ID:</div><div class='add'>+			pdata-&gt;xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;</div><div class='add'>+			pdata-&gt;xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;</div><div class='add'>+			break;</div><div class='add'>+		case XGBE_YC_PCI_DEVICE_ID:</div><div class='add'>+			pdata-&gt;xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF;</div><div class='add'>+			pdata-&gt;xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT;</div><div class='add'>+</div><div class='add'>+			/* Yellow Carp devices do not need cdr workaround */</div><div class='add'>+			pdata-&gt;vdata-&gt;an_cdr_workaround = 0;</div><div class='add'>+</div><div class='add'>+			/* Yellow Carp devices do not need rrc */</div><div class='add'>+			pdata-&gt;vdata-&gt;enable_rrc = 0;</div><div class='add'>+			break;</div><div class='add'>+		case XGBE_RN_PCI_DEVICE_ID:</div><div class='add'>+			pdata-&gt;xpcs_window_def_reg = PCS_V3_RN_WINDOW_DEF;</div><div class='add'>+			pdata-&gt;xpcs_window_sel_reg = PCS_V3_RN_WINDOW_SELECT;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			pdata-&gt;xpcs_window_def_reg = PCS_V2_WINDOW_DEF;</div><div class='add'>+			pdata-&gt;xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pdata-&gt;xpcs_window_def_reg = PCS_V2_WINDOW_DEF;</div><div class='ctx'> 		pdata-&gt;xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;</div><div class='hunk'>@@ -295,7 +198,22 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	pci_dev_put(rdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Configure the PCS indirect addressing support */</div><div class='del'>-	reg = XPCS32_IOREAD(pdata, pdata-&gt;xpcs_window_def_reg);</div><div class='add'>+	if (pdata-&gt;vdata-&gt;xpcs_access == XGBE_XPCS_ACCESS_V3) {</div><div class='add'>+		reg = XP_IOREAD(pdata, XP_PROP_0);</div><div class='add'>+		port_addr_size = PCS_RN_PORT_ADDR_SIZE *</div><div class='add'>+				 XP_GET_BITS(reg, XP_PROP_0, PORT_ID);</div><div class='add'>+		pdata-&gt;smn_base = PCS_RN_SMN_BASE_ADDR + port_addr_size;</div><div class='add'>+</div><div class='add'>+		address = pdata-&gt;smn_base + (pdata-&gt;xpcs_window_def_reg);</div><div class='add'>+		ret = amd_smn_read(0, address, &amp;reg);</div><div class='add'>+		if (ret) {</div><div class='add'>+			pci_err(pdata-&gt;pcidev, "Failed to read data\n");</div><div class='add'>+			goto err_pci_enable;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		reg = XPCS32_IOREAD(pdata, pdata-&gt;xpcs_window_def_reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pdata-&gt;xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);</div><div class='ctx'> 	pdata-&gt;xpcs_window &lt;&lt;= 6;</div><div class='ctx'> 	pdata-&gt;xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);</div><div class='hunk'>@@ -473,6 +391,22 @@ static int __maybe_unused xgbe_pci_resume(struct device *dev)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct xgbe_version_data xgbe_v3 = {</div><div class='add'>+	.init_function_ptrs_phy_impl	= xgbe_init_function_ptrs_phy_v2,</div><div class='add'>+	.xpcs_access			= XGBE_XPCS_ACCESS_V3,</div><div class='add'>+	.mmc_64bit			= 1,</div><div class='add'>+	.tx_max_fifo_size		= 65536,</div><div class='add'>+	.rx_max_fifo_size		= 65536,</div><div class='add'>+	.tx_tstamp_workaround		= 1,</div><div class='add'>+	.ecc_support			= 1,</div><div class='add'>+	.i2c_support			= 1,</div><div class='add'>+	.irq_reissue_support		= 1,</div><div class='add'>+	.tx_desc_prefetch		= 5,</div><div class='add'>+	.rx_desc_prefetch		= 5,</div><div class='add'>+	.an_cdr_workaround		= 0,</div><div class='add'>+	.enable_rrc			= 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct xgbe_version_data xgbe_v2a = {</div><div class='ctx'> 	.init_function_ptrs_phy_impl	= xgbe_init_function_ptrs_phy_v2,</div><div class='ctx'> 	.xpcs_access			= XGBE_XPCS_ACCESS_V2,</div><div class='hunk'>@@ -480,6 +414,7 @@ static struct xgbe_version_data xgbe_v2a = {</div><div class='ctx'> 	.tx_max_fifo_size		= 229376,</div><div class='ctx'> 	.rx_max_fifo_size		= 229376,</div><div class='ctx'> 	.tx_tstamp_workaround		= 1,</div><div class='add'>+	.tstamp_ptp_clock_freq		= 1,</div><div class='ctx'> 	.ecc_support			= 1,</div><div class='ctx'> 	.i2c_support			= 1,</div><div class='ctx'> 	.irq_reissue_support		= 1,</div><div class='hunk'>@@ -496,6 +431,7 @@ static struct xgbe_version_data xgbe_v2b = {</div><div class='ctx'> 	.tx_max_fifo_size		= 65536,</div><div class='ctx'> 	.rx_max_fifo_size		= 65536,</div><div class='ctx'> 	.tx_tstamp_workaround		= 1,</div><div class='add'>+	.tstamp_ptp_clock_freq		= 1,</div><div class='ctx'> 	.ecc_support			= 1,</div><div class='ctx'> 	.i2c_support			= 1,</div><div class='ctx'> 	.irq_reissue_support		= 1,</div><div class='hunk'>@@ -510,6 +446,8 @@ static const struct pci_device_id xgbe_pci_table[] = {</div><div class='ctx'> 	  .driver_data = (kernel_ulong_t)&amp;xgbe_v2a },</div><div class='ctx'> 	{ PCI_VDEVICE(AMD, 0x1459),</div><div class='ctx'> 	  .driver_data = (kernel_ulong_t)&amp;xgbe_v2b },</div><div class='add'>+	{ PCI_VDEVICE(AMD, 0x1641),</div><div class='add'>+	  .driver_data = (kernel_ulong_t)&amp;xgbe_v3 },</div><div class='ctx'> 	/* Last entry must be zero */</div><div class='ctx'> 	{ 0, }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c<br/>index d16eae415f72..2e6b8ffe785c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c<br/>index 6a716337f48b..a68757e8fd22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -777,7 +668,7 @@ static int xgbe_phy_mii_read_c45(struct mii_bus *mii, int addr, int devad,</div><div class='ctx'> 	else if (phy_data-&gt;conn_type &amp; XGBE_CONN_TYPE_MDIO)</div><div class='ctx'> 		ret = xgbe_phy_mdio_mii_read_c45(pdata, addr, devad, reg);</div><div class='ctx'> 	else</div><div class='del'>-		ret = -ENOTSUPP;</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	xgbe_phy_put_comm_ownership(pdata);</div><div class='ctx'> </div><div class='hunk'>@@ -923,7 +814,6 @@ static void xgbe_phy_free_phy_device(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> static bool xgbe_phy_finisar_phy_quirks(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };</div><div class='ctx'> 	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='ctx'> 	unsigned int phy_id = phy_data-&gt;phydev-&gt;phy_id;</div><div class='ctx'> </div><div class='hunk'>@@ -945,14 +835,7 @@ static bool xgbe_phy_finisar_phy_quirks(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	phy_write(phy_data-&gt;phydev, 0x04, 0x0d01);</div><div class='ctx'> 	phy_write(phy_data-&gt;phydev, 0x00, 0x9140);</div><div class='ctx'> </div><div class='del'>-	linkmode_set_bit_array(phy_10_100_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_10_100_features_array),</div><div class='del'>-			       supported);</div><div class='del'>-	linkmode_set_bit_array(phy_gbit_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_gbit_features_array),</div><div class='del'>-			       supported);</div><div class='del'>-</div><div class='del'>-	linkmode_copy(phy_data-&gt;phydev-&gt;supported, supported);</div><div class='add'>+	linkmode_copy(phy_data-&gt;phydev-&gt;supported, PHY_GBIT_FEATURES);</div><div class='ctx'> </div><div class='ctx'> 	phy_support_asym_pause(phy_data-&gt;phydev);</div><div class='ctx'> </div><div class='hunk'>@@ -964,7 +847,6 @@ static bool xgbe_phy_finisar_phy_quirks(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> static bool xgbe_phy_belfuse_phy_quirks(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };</div><div class='ctx'> 	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='ctx'> 	struct xgbe_sfp_eeprom *sfp_eeprom = &amp;phy_data-&gt;sfp_eeprom;</div><div class='ctx'> 	unsigned int phy_id = phy_data-&gt;phydev-&gt;phy_id;</div><div class='hunk'>@@ -1028,13 +910,7 @@ static bool xgbe_phy_belfuse_phy_quirks(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	reg = phy_read(phy_data-&gt;phydev, 0x00);</div><div class='ctx'> 	phy_write(phy_data-&gt;phydev, 0x00, reg &amp; ~0x00800);</div><div class='ctx'> </div><div class='del'>-	linkmode_set_bit_array(phy_10_100_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_10_100_features_array),</div><div class='del'>-			       supported);</div><div class='del'>-	linkmode_set_bit_array(phy_gbit_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_gbit_features_array),</div><div class='del'>-			       supported);</div><div class='del'>-	linkmode_copy(phy_data-&gt;phydev-&gt;supported, supported);</div><div class='add'>+	linkmode_copy(phy_data-&gt;phydev-&gt;supported, PHY_GBIT_FEATURES);</div><div class='ctx'> 	phy_support_asym_pause(phy_data-&gt;phydev);</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='hunk'>@@ -1113,6 +989,7 @@ static int xgbe_phy_find_phy_device(struct xgbe_prv_data *pdata)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	phy_data-&gt;phydev = phydev;</div><div class='add'>+	phy_data-&gt;phydev-&gt;mac_managed_pm = true;</div><div class='ctx'> </div><div class='ctx'> 	xgbe_phy_external_phy_quirks(pdata);</div><div class='ctx'> </div><div class='hunk'>@@ -2870,8 +2747,7 @@ static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)</div><div class='ctx'> static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='del'>-	unsigned int reg;</div><div class='del'>-	int ret;</div><div class='add'>+	int reg, ret;</div><div class='ctx'> </div><div class='ctx'> 	*an_restart = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2905,11 +2781,20 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Link status is latched low, so read once to clear</div><div class='del'>-	 * and then read again to get current state</div><div class='del'>-	 */</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='ctx'> 	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='add'>+	if (reg &lt; 0)</div><div class='add'>+		return reg;</div><div class='add'>+</div><div class='add'>+	/* Link status is latched low so that momentary link drops</div><div class='add'>+	 * can be detected. If link was already down read again</div><div class='add'>+	 * to get the latest state.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;phy.link &amp;&amp; !(reg &amp; MDIO_STAT1_LSTATUS)) {</div><div class='add'>+		reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='add'>+		if (reg &lt; 0)</div><div class='add'>+			return reg;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;en_rx_adap) {</div><div class='ctx'> 		/* if the link is available and adaptation is done,</div><div class='hunk'>@@ -2928,9 +2813,7 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)</div><div class='ctx'> 			xgbe_phy_set_mode(pdata, phy_data-&gt;cur_mode);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* check again for the link and adaptation status */</div><div class='del'>-		reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='del'>-		if ((reg &amp; MDIO_STAT1_LSTATUS) &amp;&amp; pdata-&gt;rx_adapt_done)</div><div class='add'>+		if (pdata-&gt;rx_adapt_done)</div><div class='ctx'> 			return 1;</div><div class='ctx'> 	} else if (reg &amp; MDIO_STAT1_LSTATUS)</div><div class='ctx'> 		return 1;</div><div class='hunk'>@@ -3020,7 +2903,7 @@ static void xgbe_phy_sfp_setup(struct xgbe_prv_data *pdata)</div><div class='ctx'> static int xgbe_phy_int_mdio_reset(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='del'>-	unsigned int ret;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = pdata-&gt;hw_if.set_gpio(pdata, phy_data-&gt;mdio_reset_gpio);</div><div class='ctx'> 	if (ret)</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-platform.c b/drivers/net/ethernet/amd/xgbe/xgbe-platform.c<br/>index 4365bd62942c..47d53e59ccf6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-platform.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-platform.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pps.c b/drivers/net/ethernet/amd/xgbe/xgbe-pps.c<br/>new file mode 100644<br/>index 000000000000..6d03ae7ab36f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-pps.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-pps.c</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ *</div><div class='add'>+ * Author: Raju Rangoju &lt;Raju.Rangoju@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+static u32 get_pps_mask(unsigned int x)</div><div class='add'>+{</div><div class='add'>+	return GENMASK(PPS_MAXIDX(x), PPS_MINIDX(x));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_pps_cmd(unsigned int x, u32 val)</div><div class='add'>+{</div><div class='add'>+	return (val &amp; GENMASK(3, 0)) &lt;&lt; PPS_MINIDX(x);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_target_mode_sel(unsigned int x, u32 val)</div><div class='add'>+{</div><div class='add'>+	return (val &amp; GENMASK(1, 0)) &lt;&lt; (PPS_MAXIDX(x) - 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgbe_pps_config(struct xgbe_prv_data *pdata,</div><div class='add'>+		    struct xgbe_pps_config *cfg, int index, bool on)</div><div class='add'>+{</div><div class='add'>+	unsigned int ppscr = 0;</div><div class='add'>+	unsigned int tnsec;</div><div class='add'>+	u64 period;</div><div class='add'>+</div><div class='add'>+	/* Check if target time register is busy */</div><div class='add'>+	tnsec = XGMAC_IOREAD(pdata, MAC_PPSx_TTNSR(index));</div><div class='add'>+	if (XGMAC_GET_BITS(tnsec, MAC_PPSx_TTNSR, TRGTBUSY0))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	ppscr = XGMAC_IOREAD(pdata, MAC_PPSCR);</div><div class='add'>+	ppscr &amp;= ~get_pps_mask(index);</div><div class='add'>+</div><div class='add'>+	if (!on) {</div><div class='add'>+		/* Disable PPS output */</div><div class='add'>+		ppscr |= get_pps_cmd(index, XGBE_PPSCMD_STOP);</div><div class='add'>+		ppscr |= PPSEN0;</div><div class='add'>+		XGMAC_IOWRITE(pdata, MAC_PPSCR, ppscr);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure start time */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_PPSx_TTSR(index), cfg-&gt;start.tv_sec);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_PPSx_TTNSR(index), cfg-&gt;start.tv_nsec);</div><div class='add'>+</div><div class='add'>+	period = cfg-&gt;period.tv_sec * NSEC_PER_SEC + cfg-&gt;period.tv_nsec;</div><div class='add'>+	period = div_u64(period, XGBE_V2_TSTAMP_SSINC);</div><div class='add'>+</div><div class='add'>+	if (period &lt; 4)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Configure interval and pulse width (50% duty cycle) */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_PPSx_INTERVAL(index), period - 1);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_PPSx_WIDTH(index), (period &gt;&gt; 1) - 1);</div><div class='add'>+</div><div class='add'>+	/* Enable PPS with pulse train mode */</div><div class='add'>+	ppscr |= get_pps_cmd(index, XGBE_PPSCMD_START);</div><div class='add'>+	ppscr |= get_target_mode_sel(index, XGBE_PPSTARGET_PULSE);</div><div class='add'>+	ppscr |= PPSEN0;</div><div class='add'>+</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_PPSCR, ppscr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c<br/>index 7051bd7cf6dc..0e0b8ec3b504 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe-ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-ptp.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='hunk'>@@ -122,18 +13,6 @@</div><div class='ctx'> #include "xgbe.h"</div><div class='ctx'> #include "xgbe-common.h"</div><div class='ctx'> </div><div class='del'>-static u64 xgbe_cc_read(const struct cyclecounter *cc)</div><div class='del'>-{</div><div class='del'>-	struct xgbe_prv_data *pdata = container_of(cc,</div><div class='del'>-						   struct xgbe_prv_data,</div><div class='del'>-						   tstamp_cc);</div><div class='del'>-	u64 nsec;</div><div class='del'>-</div><div class='del'>-	nsec = pdata-&gt;hw_if.get_tstamp_time(pdata);</div><div class='del'>-</div><div class='del'>-	return nsec;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int xgbe_adjfine(struct ptp_clock_info *info, long scaled_ppm)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = container_of(info,</div><div class='hunk'>@@ -146,7 +25,7 @@ static int xgbe_adjfine(struct ptp_clock_info *info, long scaled_ppm)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;hw_if.update_tstamp_addend(pdata, addend);</div><div class='add'>+	xgbe_update_tstamp_addend(pdata, addend);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -158,16 +37,39 @@ static int xgbe_adjtime(struct ptp_clock_info *info, s64 delta)</div><div class='ctx'> 	struct xgbe_prv_data *pdata = container_of(info,</div><div class='ctx'> 						   struct xgbe_prv_data,</div><div class='ctx'> 						   ptp_clock_info);</div><div class='add'>+	unsigned int neg_adjust = 0;</div><div class='add'>+	unsigned int sec, nsec;</div><div class='add'>+	u32 quotient, reminder;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	if (delta &lt; 0) {</div><div class='add'>+		neg_adjust = 1;</div><div class='add'>+		delta = -delta;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	quotient = div_u64_rem(delta, 1000000000ULL, &amp;reminder);</div><div class='add'>+	sec = quotient;</div><div class='add'>+	nsec = reminder;</div><div class='add'>+</div><div class='add'>+	/* Negative adjustment for Hw timer register. */</div><div class='add'>+	if (neg_adjust) {</div><div class='add'>+		sec = -sec;</div><div class='add'>+		if (XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSCTRLSSR))</div><div class='add'>+			nsec = (1000000000UL - nsec);</div><div class='add'>+		else</div><div class='add'>+			nsec = (0x80000000UL - nsec);</div><div class='add'>+	}</div><div class='add'>+	nsec = (neg_adjust &lt;&lt; 31) | nsec;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-	timecounter_adjtime(&amp;pdata-&gt;tstamp_tc, delta);</div><div class='add'>+	xgbe_update_tstamp_time(pdata, sec, nsec);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_gettime(struct ptp_clock_info *info, struct timespec64 *ts)</div><div class='add'>+static int xgbe_gettimex(struct ptp_clock_info *info, struct timespec64 *ts,</div><div class='add'>+			 struct ptp_system_timestamp *sts)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = container_of(info,</div><div class='ctx'> 						   struct xgbe_prv_data,</div><div class='hunk'>@@ -176,9 +78,9 @@ static int xgbe_gettime(struct ptp_clock_info *info, struct timespec64 *ts)</div><div class='ctx'> 	u64 nsec;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-</div><div class='del'>-	nsec = timecounter_read(&amp;pdata-&gt;tstamp_tc);</div><div class='del'>-</div><div class='add'>+	ptp_read_system_prets(sts);</div><div class='add'>+	nsec = xgbe_get_tstamp_time(pdata);</div><div class='add'>+	ptp_read_system_postts(sts);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	*ts = ns_to_timespec64(nsec);</div><div class='hunk'>@@ -193,14 +95,9 @@ static int xgbe_settime(struct ptp_clock_info *info,</div><div class='ctx'> 						   struct xgbe_prv_data,</div><div class='ctx'> 						   ptp_clock_info);</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	u64 nsec;</div><div class='del'>-</div><div class='del'>-	nsec = timespec64_to_ns(ts);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-</div><div class='del'>-	timecounter_init(&amp;pdata-&gt;tstamp_tc, &amp;pdata-&gt;tstamp_cc, nsec);</div><div class='del'>-</div><div class='add'>+	xgbe_set_tstamp_time(pdata, ts-&gt;tv_sec, ts-&gt;tv_nsec);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -209,15 +106,35 @@ static int xgbe_settime(struct ptp_clock_info *info,</div><div class='ctx'> static int xgbe_enable(struct ptp_clock_info *info,</div><div class='ctx'> 		       struct ptp_clock_request *request, int on)</div><div class='ctx'> {</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='add'>+	struct xgbe_prv_data *pdata = container_of(info, struct xgbe_prv_data,</div><div class='add'>+						   ptp_clock_info);</div><div class='add'>+	struct xgbe_pps_config *pps_cfg;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(pdata-&gt;dev, "rq-&gt;type %d on %d\n", request-&gt;type, on);</div><div class='add'>+</div><div class='add'>+	if (request-&gt;type != PTP_CLK_REQ_PEROUT)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	pps_cfg = &amp;pdata-&gt;pps[request-&gt;perout.index];</div><div class='add'>+</div><div class='add'>+	pps_cfg-&gt;start.tv_sec = request-&gt;perout.start.sec;</div><div class='add'>+	pps_cfg-&gt;start.tv_nsec = request-&gt;perout.start.nsec;</div><div class='add'>+	pps_cfg-&gt;period.tv_sec = request-&gt;perout.period.sec;</div><div class='add'>+	pps_cfg-&gt;period.tv_nsec = request-&gt;perout.period.nsec;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+	ret = xgbe_pps_config(pdata, pps_cfg, request-&gt;perout.index, on);</div><div class='add'>+	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void xgbe_ptp_register(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct ptp_clock_info *info = &amp;pdata-&gt;ptp_clock_info;</div><div class='ctx'> 	struct ptp_clock *clock;</div><div class='del'>-	struct cyclecounter *cc = &amp;pdata-&gt;tstamp_cc;</div><div class='del'>-	u64 dividend;</div><div class='ctx'> </div><div class='ctx'> 	snprintf(info-&gt;name, sizeof(info-&gt;name), "%s",</div><div class='ctx'> 		 netdev_name(pdata-&gt;netdev));</div><div class='hunk'>@@ -225,8 +142,10 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	info-&gt;max_adj = pdata-&gt;ptpclk_rate;</div><div class='ctx'> 	info-&gt;adjfine = xgbe_adjfine;</div><div class='ctx'> 	info-&gt;adjtime = xgbe_adjtime;</div><div class='del'>-	info-&gt;gettime64 = xgbe_gettime;</div><div class='add'>+	info-&gt;gettimex64 = xgbe_gettimex;</div><div class='ctx'> 	info-&gt;settime64 = xgbe_settime;</div><div class='add'>+	info-&gt;n_per_out = pdata-&gt;hw_feat.pps_out_num;</div><div class='add'>+	info-&gt;n_ext_ts = pdata-&gt;hw_feat.aux_snap_num;</div><div class='ctx'> 	info-&gt;enable = xgbe_enable;</div><div class='ctx'> </div><div class='ctx'> 	clock = ptp_clock_register(info, pdata-&gt;dev);</div><div class='hunk'>@@ -237,23 +156,6 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;ptp_clock = clock;</div><div class='ctx'> </div><div class='del'>-	/* Calculate the addend:</div><div class='del'>-	 *   addend = 2^32 / (PTP ref clock / 50Mhz)</div><div class='del'>-	 *          = (2^32 * 50Mhz) / PTP ref clock</div><div class='del'>-	 */</div><div class='del'>-	dividend = 50000000;</div><div class='del'>-	dividend &lt;&lt;= 32;</div><div class='del'>-	pdata-&gt;tstamp_addend = div_u64(dividend, pdata-&gt;ptpclk_rate);</div><div class='del'>-</div><div class='del'>-	/* Setup the timecounter */</div><div class='del'>-	cc-&gt;read = xgbe_cc_read;</div><div class='del'>-	cc-&gt;mask = CLOCKSOURCE_MASK(64);</div><div class='del'>-	cc-&gt;mult = 1;</div><div class='del'>-	cc-&gt;shift = 0;</div><div class='del'>-</div><div class='del'>-	timecounter_init(&amp;pdata-&gt;tstamp_tc, &amp;pdata-&gt;tstamp_cc,</div><div class='del'>-			 ktime_to_ns(ktime_get_real()));</div><div class='del'>-</div><div class='ctx'> 	/* Disable all timestamping to start */</div><div class='ctx'> 	XGMAC_IOWRITE(pdata, MAC_TSCR, 0);</div><div class='ctx'> 	pdata-&gt;tstamp_config.tx_type = HWTSTAMP_TX_OFF;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-selftest.c b/drivers/net/ethernet/amd/xgbe/xgbe-selftest.c<br/>new file mode 100644<br/>index 000000000000..55e5e467facd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-selftest.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-selftest.c</a></div><div class='hunk'>@@ -0,0 +1,346 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ *</div><div class='add'>+ * Author: Raju Rangoju &lt;Raju.Rangoju@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/udp.h&gt;</div><div class='add'>+#include &lt;net/tcp.h&gt;</div><div class='add'>+#include &lt;net/udp.h&gt;</div><div class='add'>+#include &lt;net/checksum.h&gt;</div><div class='add'>+#include &lt;net/selftests.h&gt;</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+#define XGBE_LOOPBACK_NONE	0</div><div class='add'>+#define XGBE_LOOPBACK_MAC	1</div><div class='add'>+#define XGBE_LOOPBACK_PHY	2</div><div class='add'>+</div><div class='add'>+struct xgbe_test {</div><div class='add'>+	char name[ETH_GSTRING_LEN];</div><div class='add'>+	int lb;</div><div class='add'>+	int (*fn)(struct xgbe_prv_data *pdata);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u8 xgbe_test_id;</div><div class='add'>+</div><div class='add'>+static int xgbe_test_loopback_validate(struct sk_buff *skb,</div><div class='add'>+				       struct net_device *ndev,</div><div class='add'>+				       struct packet_type *pt,</div><div class='add'>+				       struct net_device *orig_ndev)</div><div class='add'>+{</div><div class='add'>+	struct net_test_priv *tdata = pt-&gt;af_packet_priv;</div><div class='add'>+	const unsigned char *dst = tdata-&gt;packet-&gt;dst;</div><div class='add'>+	const unsigned char *src = tdata-&gt;packet-&gt;src;</div><div class='add'>+	struct netsfhdr *hdr;</div><div class='add'>+	struct ethhdr *eh;</div><div class='add'>+	struct tcphdr *th;</div><div class='add'>+	struct udphdr *uh;</div><div class='add'>+	struct iphdr *ih;</div><div class='add'>+	int eat;</div><div class='add'>+</div><div class='add'>+	skb = skb_unshare(skb, GFP_ATOMIC);</div><div class='add'>+	if (!skb)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	eat = (skb-&gt;tail + skb-&gt;data_len) - skb-&gt;end;</div><div class='add'>+	if (eat &gt; 0 &amp;&amp; skb_shared(skb)) {</div><div class='add'>+		skb = skb_share_check(skb, GFP_ATOMIC);</div><div class='add'>+		if (!skb)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb_linearize(skb))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (skb_headlen(skb) &lt; (NET_TEST_PKT_SIZE - ETH_HLEN))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	eh = (struct ethhdr *)skb_mac_header(skb);</div><div class='add'>+	if (dst) {</div><div class='add'>+		if (!ether_addr_equal_unaligned(eh-&gt;h_dest, dst))</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+	if (src) {</div><div class='add'>+		if (!ether_addr_equal_unaligned(eh-&gt;h_source, src))</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ih = ip_hdr(skb);</div><div class='add'>+</div><div class='add'>+	if (tdata-&gt;packet-&gt;tcp) {</div><div class='add'>+		if (ih-&gt;protocol != IPPROTO_TCP)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		th = (struct tcphdr *)((u8 *)ih + 4 * ih-&gt;ihl);</div><div class='add'>+		if (th-&gt;dest != htons(tdata-&gt;packet-&gt;dport))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		hdr = (struct netsfhdr *)((u8 *)th + sizeof(*th));</div><div class='add'>+	} else {</div><div class='add'>+		if (ih-&gt;protocol != IPPROTO_UDP)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		uh = (struct udphdr *)((u8 *)ih + 4 * ih-&gt;ihl);</div><div class='add'>+		if (uh-&gt;dest != htons(tdata-&gt;packet-&gt;dport))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		hdr = (struct netsfhdr *)((u8 *)uh + sizeof(*uh));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hdr-&gt;magic != cpu_to_be64(NET_TEST_PKT_MAGIC))</div><div class='add'>+		goto out;</div><div class='add'>+	if (tdata-&gt;packet-&gt;id != hdr-&gt;id)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	tdata-&gt;ok = true;</div><div class='add'>+	complete(&amp;tdata-&gt;comp);</div><div class='add'>+out:</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __xgbe_test_loopback(struct xgbe_prv_data *pdata,</div><div class='add'>+				struct net_packet_attrs *attr)</div><div class='add'>+{</div><div class='add'>+	struct net_test_priv *tdata;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	tdata = kzalloc(sizeof(*tdata), GFP_KERNEL);</div><div class='add'>+	if (!tdata)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	tdata-&gt;ok = false;</div><div class='add'>+	init_completion(&amp;tdata-&gt;comp);</div><div class='add'>+</div><div class='add'>+	tdata-&gt;pt.type = htons(ETH_P_IP);</div><div class='add'>+	tdata-&gt;pt.func = xgbe_test_loopback_validate;</div><div class='add'>+	tdata-&gt;pt.dev = pdata-&gt;netdev;</div><div class='add'>+	tdata-&gt;pt.af_packet_priv = tdata;</div><div class='add'>+	tdata-&gt;packet = attr;</div><div class='add'>+</div><div class='add'>+	dev_add_pack(&amp;tdata-&gt;pt);</div><div class='add'>+</div><div class='add'>+	skb = net_test_get_skb(pdata-&gt;netdev, xgbe_test_id, attr);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_test_id++;</div><div class='add'>+	ret = dev_direct_xmit(skb, attr-&gt;queue_mapping);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	if (!attr-&gt;timeout)</div><div class='add'>+		attr-&gt;timeout = NET_LB_TIMEOUT;</div><div class='add'>+</div><div class='add'>+	wait_for_completion_timeout(&amp;tdata-&gt;comp, attr-&gt;timeout);</div><div class='add'>+	ret = tdata-&gt;ok ? 0 : -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "Response timedout: ret %d\n", ret);</div><div class='add'>+cleanup:</div><div class='add'>+	dev_remove_pack(&amp;tdata-&gt;pt);</div><div class='add'>+	kfree(tdata);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_test_mac_loopback(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_packet_attrs attr = {};</div><div class='add'>+</div><div class='add'>+	attr.dst = pdata-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	return __xgbe_test_loopback(pdata, &amp;attr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_test_phy_loopback(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_packet_attrs attr = {};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;netdev-&gt;phydev) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "phydev not found: cannot start PHY loopback test\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = phy_loopback(pdata-&gt;netdev-&gt;phydev, true, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	attr.dst = pdata-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	ret = __xgbe_test_loopback(pdata, &amp;attr);</div><div class='add'>+</div><div class='add'>+	phy_loopback(pdata-&gt;netdev-&gt;phydev, false, 0);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_test_sph(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_packet_attrs attr = {};</div><div class='add'>+	unsigned long cnt_end, cnt_start;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cnt_start = pdata-&gt;ext_stats.rx_split_header_packets;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;sph) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "Split Header not enabled\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* UDP test */</div><div class='add'>+	attr.dst = pdata-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	attr.tcp = false;</div><div class='add'>+</div><div class='add'>+	ret = __xgbe_test_loopback(pdata, &amp;attr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cnt_end = pdata-&gt;ext_stats.rx_split_header_packets;</div><div class='add'>+	if (cnt_end &lt;= cnt_start)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* TCP test */</div><div class='add'>+	cnt_start = cnt_end;</div><div class='add'>+</div><div class='add'>+	attr.dst = pdata-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	attr.tcp = true;</div><div class='add'>+</div><div class='add'>+	ret = __xgbe_test_loopback(pdata, &amp;attr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cnt_end = pdata-&gt;ext_stats.rx_split_header_packets;</div><div class='add'>+	if (cnt_end &lt;= cnt_start)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_test_jumbo(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_packet_attrs attr = {};</div><div class='add'>+	int size = pdata-&gt;rx_buf_size;</div><div class='add'>+</div><div class='add'>+	attr.dst = pdata-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	attr.max_size = size - ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	return __xgbe_test_loopback(pdata, &amp;attr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct xgbe_test xgbe_selftests[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "MAC Loopback   ",</div><div class='add'>+		.lb = XGBE_LOOPBACK_MAC,</div><div class='add'>+		.fn = xgbe_test_mac_loopback,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "PHY Loopback   ",</div><div class='add'>+		.lb = XGBE_LOOPBACK_NONE,</div><div class='add'>+		.fn = xgbe_test_phy_loopback,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "Split Header   ",</div><div class='add'>+		.lb = XGBE_LOOPBACK_PHY,</div><div class='add'>+		.fn = xgbe_test_sph,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "Jumbo Frame    ",</div><div class='add'>+		.lb = XGBE_LOOPBACK_PHY,</div><div class='add'>+		.fn = xgbe_test_jumbo,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void xgbe_selftest_run(struct net_device *dev,</div><div class='add'>+		       struct ethtool_test *etest, u64 *buf)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(dev);</div><div class='add'>+	int count = xgbe_selftest_get_count(pdata);</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	memset(buf, 0, sizeof(*buf) * count);</div><div class='add'>+	xgbe_test_id = 0;</div><div class='add'>+</div><div class='add'>+	if (etest-&gt;flags != ETH_TEST_FL_OFFLINE) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "Only offline tests are supported\n");</div><div class='add'>+		etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='add'>+		return;</div><div class='add'>+	} else if (!netif_carrier_ok(dev)) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev,</div><div class='add'>+			   "Invalid link, cannot execute tests\n");</div><div class='add'>+		etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Wait for queues drain */</div><div class='add'>+	msleep(200);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		ret = 0;</div><div class='add'>+</div><div class='add'>+		switch (xgbe_selftests[i].lb) {</div><div class='add'>+		case XGBE_LOOPBACK_PHY:</div><div class='add'>+			ret = -EOPNOTSUPP;</div><div class='add'>+			if (dev-&gt;phydev)</div><div class='add'>+				ret = phy_loopback(dev-&gt;phydev, true, 0);</div><div class='add'>+			if (!ret)</div><div class='add'>+				break;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case XGBE_LOOPBACK_MAC:</div><div class='add'>+			ret = xgbe_enable_mac_loopback(pdata);</div><div class='add'>+			break;</div><div class='add'>+		case XGBE_LOOPBACK_NONE:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			ret = -EOPNOTSUPP;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * First tests will always be MAC / PHY loopback.</div><div class='add'>+		 * If any of them is not supported we abort earlier.</div><div class='add'>+		 */</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(pdata-&gt;netdev, "Loopback not supported\n");</div><div class='add'>+			etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = xgbe_selftests[i].fn(pdata);</div><div class='add'>+		if (ret &amp;&amp; (ret != -EOPNOTSUPP))</div><div class='add'>+			etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='add'>+		buf[i] = ret;</div><div class='add'>+</div><div class='add'>+		switch (xgbe_selftests[i].lb) {</div><div class='add'>+		case XGBE_LOOPBACK_PHY:</div><div class='add'>+			ret = -EOPNOTSUPP;</div><div class='add'>+			if (dev-&gt;phydev)</div><div class='add'>+				ret = phy_loopback(dev-&gt;phydev, false, 0);</div><div class='add'>+			if (!ret)</div><div class='add'>+				break;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case XGBE_LOOPBACK_MAC:</div><div class='add'>+			xgbe_disable_mac_loopback(pdata);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_selftest_get_strings(struct xgbe_prv_data *pdata, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u8 *p = data;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; xgbe_selftest_get_count(pdata); i++)</div><div class='add'>+		ethtool_puts(&amp;p, xgbe_selftests[i].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgbe_selftest_get_count(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return ARRAY_SIZE(xgbe_selftests);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-smn.h b/drivers/net/ethernet/amd/xgbe/xgbe-smn.h<br/>new file mode 100644<br/>index 000000000000..c6ae127ced03<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-smn.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-smn.h</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ *</div><div class='add'>+ * Author: Raju Rangoju &lt;Raju.Rangoju@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __SMN_H__</div><div class='add'>+#define __SMN_H__</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AMD_NB</div><div class='add'>+</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline int amd_smn_write(u16 node, u32 address, u32 value)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int amd_smn_read(u16 node, u32 address, u32 *value)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h<br/>index d85386cac8d1..03ef0f548483 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/amd/xgbe/xgbe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe.h</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __XGBE_H__</div><div class='hunk'>@@ -189,11 +80,13 @@</div><div class='ctx'> #define XGBE_IRQ_MODE_EDGE	0</div><div class='ctx'> #define XGBE_IRQ_MODE_LEVEL	1</div><div class='ctx'> </div><div class='add'>+#define XGBE_ETH_FRAME_HDR	(ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN)</div><div class='ctx'> #define XGMAC_MIN_PACKET	60</div><div class='ctx'> #define XGMAC_STD_PACKET_MTU	1500</div><div class='ctx'> #define XGMAC_MAX_STD_PACKET	1518</div><div class='ctx'> #define XGMAC_JUMBO_PACKET_MTU	9000</div><div class='ctx'> #define XGMAC_MAX_JUMBO_PACKET	9018</div><div class='add'>+#define XGMAC_GIANT_PACKET_MTU	16368</div><div class='ctx'> #define XGMAC_ETH_PREAMBLE	(12 + 8)	/* Inter-frame gap + preamble */</div><div class='ctx'> </div><div class='ctx'> #define XGMAC_PFC_DATA_LEN	46</div><div class='hunk'>@@ -226,6 +119,14 @@</div><div class='ctx'> #define XGBE_MSI_BASE_COUNT	4</div><div class='ctx'> #define XGBE_MSI_MIN_COUNT	(XGBE_MSI_BASE_COUNT + 1)</div><div class='ctx'> </div><div class='add'>+/* Initial PTP register values based on Link Speed. */</div><div class='add'>+#define MAC_TICNR_1G_INITVAL	0x10</div><div class='add'>+#define MAC_TECNR_1G_INITVAL	0x28</div><div class='add'>+</div><div class='add'>+#define MAC_TICSNR_10G_INITVAL	0x33</div><div class='add'>+#define MAC_TECNR_10G_INITVAL	0x14</div><div class='add'>+#define MAC_TECSNR_10G_INITVAL	0xCC</div><div class='add'>+</div><div class='ctx'> /* PCI clock frequencies */</div><div class='ctx'> #define XGBE_V2_DMA_CLOCK_FREQ	500000000	/* 500 MHz */</div><div class='ctx'> #define XGBE_V2_PTP_CLOCK_FREQ	125000000	/* 125 MHz */</div><div class='hunk'>@@ -235,6 +136,15 @@</div><div class='ctx'>  */</div><div class='ctx'> #define XGBE_TSTAMP_SSINC	20</div><div class='ctx'> #define XGBE_TSTAMP_SNSINC	0</div><div class='add'>+#define XGBE_PTP_ACT_CLK_FREQ	500000000</div><div class='add'>+</div><div class='add'>+#define XGBE_V2_TSTAMP_SSINC	0xA</div><div class='add'>+#define XGBE_V2_TSTAMP_SNSINC	0</div><div class='add'>+#define XGBE_V2_PTP_ACT_CLK_FREQ	1000000000</div><div class='add'>+</div><div class='add'>+/* Define maximum supported values */</div><div class='add'>+#define XGBE_MAX_PPS_OUT	4</div><div class='add'>+#define XGBE_MAX_AUX_SNAP	4</div><div class='ctx'> </div><div class='ctx'> /* Driver PMT macros */</div><div class='ctx'> #define XGMAC_DRIVER_CONTEXT	1</div><div class='hunk'>@@ -262,6 +172,7 @@</div><div class='ctx'> /* Default coalescing parameters */</div><div class='ctx'> #define XGMAC_INIT_DMA_TX_USECS		1000</div><div class='ctx'> #define XGMAC_INIT_DMA_TX_FRAMES	25</div><div class='add'>+#define XGMAC_MAX_COAL_TX_TICK		100000</div><div class='ctx'> </div><div class='ctx'> #define XGMAC_MAX_DMA_RIWT		0xff</div><div class='ctx'> #define XGMAC_INIT_DMA_RX_USECS		30</div><div class='hunk'>@@ -292,12 +203,12 @@</div><div class='ctx'> #define XGBE_LINK_TIMEOUT		5</div><div class='ctx'> #define XGBE_KR_TRAINING_WAIT_ITER	50</div><div class='ctx'> </div><div class='del'>-#define XGBE_SGMII_AN_LINK_STATUS	BIT(1)</div><div class='add'>+#define XGBE_SGMII_AN_LINK_DUPLEX	BIT(1)</div><div class='ctx'> #define XGBE_SGMII_AN_LINK_SPEED	(BIT(2) | BIT(3))</div><div class='ctx'> #define XGBE_SGMII_AN_LINK_SPEED_10	0x00</div><div class='ctx'> #define XGBE_SGMII_AN_LINK_SPEED_100	0x04</div><div class='ctx'> #define XGBE_SGMII_AN_LINK_SPEED_1000	0x08</div><div class='del'>-#define XGBE_SGMII_AN_LINK_DUPLEX	BIT(4)</div><div class='add'>+#define XGBE_SGMII_AN_LINK_STATUS	BIT(4)</div><div class='ctx'> </div><div class='ctx'> /* ECC correctable error notification window (seconds) */</div><div class='ctx'> #define XGBE_ECC_LIMIT			60</div><div class='hunk'>@@ -347,6 +258,15 @@</div><div class='ctx'> 		    (_src)-&gt;link_modes._sname,		\</div><div class='ctx'> 		    __ETHTOOL_LINK_MODE_MASK_NBITS)</div><div class='ctx'> </div><div class='add'>+/* XGBE PCI device id */</div><div class='add'>+#define XGBE_RV_PCI_DEVICE_ID	0x15d0</div><div class='add'>+#define XGBE_YC_PCI_DEVICE_ID	0x14b5</div><div class='add'>+#define XGBE_RN_PCI_DEVICE_ID	0x1630</div><div class='add'>+</div><div class='add'>+ /* Generic low and high masks */</div><div class='add'>+#define XGBE_GEN_HI_MASK	GENMASK(31, 16)</div><div class='add'>+#define XGBE_GEN_LO_MASK	GENMASK(15, 0)</div><div class='add'>+</div><div class='ctx'> struct xgbe_prv_data;</div><div class='ctx'> </div><div class='ctx'> struct xgbe_packet_data {</div><div class='hunk'>@@ -565,6 +485,7 @@ enum xgbe_speed {</div><div class='ctx'> enum xgbe_xpcs_access {</div><div class='ctx'> 	XGBE_XPCS_ACCESS_V1 = 0,</div><div class='ctx'> 	XGBE_XPCS_ACCESS_V2,</div><div class='add'>+	XGBE_XPCS_ACCESS_V3,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum xgbe_an_mode {</div><div class='hunk'>@@ -756,6 +677,11 @@ struct xgbe_ext_stats {</div><div class='ctx'> 	u64 rx_vxlan_csum_errors;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct xgbe_pps_config {</div><div class='add'>+	struct timespec64 start;</div><div class='add'>+	struct timespec64 period;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct xgbe_hw_if {</div><div class='ctx'> 	int (*tx_complete)(struct xgbe_ring_desc *);</div><div class='ctx'> </div><div class='hunk'>@@ -838,14 +764,6 @@ struct xgbe_hw_if {</div><div class='ctx'> 	void (*tx_mmc_int)(struct xgbe_prv_data *);</div><div class='ctx'> 	void (*read_mmc_stats)(struct xgbe_prv_data *);</div><div class='ctx'> </div><div class='del'>-	/* For Timestamp config */</div><div class='del'>-	int (*config_tstamp)(struct xgbe_prv_data *, unsigned int);</div><div class='del'>-	void (*update_tstamp_addend)(struct xgbe_prv_data *, unsigned int);</div><div class='del'>-	void (*set_tstamp_time)(struct xgbe_prv_data *, unsigned int sec,</div><div class='del'>-				unsigned int nsec);</div><div class='del'>-	u64 (*get_tstamp_time)(struct xgbe_prv_data *);</div><div class='del'>-	u64 (*get_tx_tstamp)(struct xgbe_prv_data *);</div><div class='del'>-</div><div class='ctx'> 	/* For Data Center Bridging config */</div><div class='ctx'> 	void (*config_tc)(struct xgbe_prv_data *);</div><div class='ctx'> 	void (*config_dcb_tc)(struct xgbe_prv_data *);</div><div class='hunk'>@@ -865,6 +783,10 @@ struct xgbe_hw_if {</div><div class='ctx'> 	void (*enable_vxlan)(struct xgbe_prv_data *);</div><div class='ctx'> 	void (*disable_vxlan)(struct xgbe_prv_data *);</div><div class='ctx'> 	void (*set_vxlan_id)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* For Split Header */</div><div class='add'>+	void (*enable_sph)(struct xgbe_prv_data *pdata);</div><div class='add'>+	void (*disable_sph)(struct xgbe_prv_data *pdata);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* This structure represents implementation specific routines for an</div><div class='hunk'>@@ -1039,6 +961,7 @@ struct xgbe_version_data {</div><div class='ctx'> 	unsigned int tx_max_fifo_size;</div><div class='ctx'> 	unsigned int rx_max_fifo_size;</div><div class='ctx'> 	unsigned int tx_tstamp_workaround;</div><div class='add'>+	unsigned int tstamp_ptp_clock_freq;</div><div class='ctx'> 	unsigned int ecc_support;</div><div class='ctx'> 	unsigned int i2c_support;</div><div class='ctx'> 	unsigned int irq_reissue_support;</div><div class='hunk'>@@ -1056,6 +979,7 @@ struct xgbe_prv_data {</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct platform_device *phy_platdev;</div><div class='ctx'> 	struct device *phy_dev;</div><div class='add'>+	unsigned int smn_base;</div><div class='ctx'> </div><div class='ctx'> 	/* Version related data */</div><div class='ctx'> 	struct xgbe_version_data *vdata;</div><div class='hunk'>@@ -1222,14 +1146,15 @@ struct xgbe_prv_data {</div><div class='ctx'> 	spinlock_t tstamp_lock;</div><div class='ctx'> 	struct ptp_clock_info ptp_clock_info;</div><div class='ctx'> 	struct ptp_clock *ptp_clock;</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='del'>-	struct cyclecounter tstamp_cc;</div><div class='del'>-	struct timecounter tstamp_tc;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> 	unsigned int tstamp_addend;</div><div class='ctx'> 	struct work_struct tx_tstamp_work;</div><div class='ctx'> 	struct sk_buff *tx_tstamp_skb;</div><div class='ctx'> 	u64 tx_tstamp;</div><div class='ctx'> </div><div class='add'>+	/* Pulse Per Second output */</div><div class='add'>+	struct xgbe_pps_config pps[XGBE_MAX_PPS_OUT];</div><div class='add'>+</div><div class='ctx'> 	/* DCB support */</div><div class='ctx'> 	struct ieee_ets *ets;</div><div class='ctx'> 	struct ieee_pfc *pfc;</div><div class='hunk'>@@ -1321,6 +1246,7 @@ struct xgbe_prv_data {</div><div class='ctx'> 	int rx_adapt_retries;</div><div class='ctx'> 	bool rx_adapt_done;</div><div class='ctx'> 	bool mode_set;</div><div class='add'>+	bool sph;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Function prototypes*/</div><div class='hunk'>@@ -1369,6 +1295,44 @@ void xgbe_init_tx_coalesce(struct xgbe_prv_data *);</div><div class='ctx'> void xgbe_restart_dev(struct xgbe_prv_data *pdata);</div><div class='ctx'> void xgbe_full_restart_dev(struct xgbe_prv_data *pdata);</div><div class='ctx'> </div><div class='add'>+/* For Timestamp config */</div><div class='add'>+void xgbe_config_tstamp(struct xgbe_prv_data *pdata, unsigned int mac_tscr);</div><div class='add'>+u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata);</div><div class='add'>+u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata);</div><div class='add'>+void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet,</div><div class='add'>+			struct xgbe_ring_desc *rdesc);</div><div class='add'>+void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet,</div><div class='add'>+			struct xgbe_ring_desc *rdesc);</div><div class='add'>+void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata,</div><div class='add'>+			       unsigned int addend);</div><div class='add'>+void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec,</div><div class='add'>+			  unsigned int nsec);</div><div class='add'>+void xgbe_tx_tstamp(struct work_struct *work);</div><div class='add'>+int xgbe_get_hwtstamp_settings(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config);</div><div class='add'>+int xgbe_set_hwtstamp_settings(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack);</div><div class='add'>+void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,</div><div class='add'>+			 struct sk_buff *skb,</div><div class='add'>+			 struct xgbe_packet_data *packet);</div><div class='add'>+int xgbe_init_ptp(struct xgbe_prv_data *pdata);</div><div class='add'>+void xgbe_update_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec,</div><div class='add'>+			     unsigned int nsec);</div><div class='add'>+</div><div class='add'>+int xgbe_pps_config(struct xgbe_prv_data *pdata, struct xgbe_pps_config *cfg,</div><div class='add'>+		    int index, bool on);</div><div class='add'>+</div><div class='add'>+/* Selftest functions */</div><div class='add'>+void xgbe_selftest_run(struct net_device *dev,</div><div class='add'>+		       struct ethtool_test *etest, u64 *buf);</div><div class='add'>+void xgbe_selftest_get_strings(struct xgbe_prv_data *pdata, u8 *data);</div><div class='add'>+int xgbe_selftest_get_count(struct xgbe_prv_data *pdata);</div><div class='add'>+</div><div class='add'>+/* Loopback control */</div><div class='add'>+int xgbe_enable_mac_loopback(struct xgbe_prv_data *pdata);</div><div class='add'>+void xgbe_disable_mac_loopback(struct xgbe_prv_data *pdata);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> void xgbe_debugfs_init(struct xgbe_prv_data *);</div><div class='ctx'> void xgbe_debugfs_exit(struct xgbe_prv_data *);</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/main.c b/drivers/net/ethernet/apm/xgene-v2/main.c<br/>index 2a91c84aebdb..d7ca847d44c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apm/xgene-v2/main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/main.c</a></div><div class='hunk'>@@ -9,8 +9,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "main.h"</div><div class='ctx'> </div><div class='del'>-static const struct acpi_device_id xge_acpi_match[];</div><div class='del'>-</div><div class='ctx'> static int xge_get_resources(struct xge_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='hunk'>@@ -731,7 +729,7 @@ MODULE_DEVICE_TABLE(acpi, xge_acpi_match);</div><div class='ctx'> static struct platform_driver xge_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		   .name = "xgene-enet-v2",</div><div class='del'>-		   .acpi_match_table = ACPI_PTR(xge_acpi_match),</div><div class='add'>+		   .acpi_match_table = xge_acpi_match,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = xge_probe,</div><div class='ctx'> 	.remove = xge_remove,</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/mdio.c b/drivers/net/ethernet/apm/xgene-v2/mdio.c<br/>index eba06831aec2..6a17045a5f62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apm/xgene-v2/mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/mdio.c</a></div><div class='hunk'>@@ -97,7 +97,6 @@ void xge_mdio_remove(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> int xge_mdio_config(struct net_device *ndev)</div><div class='ctx'> {</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };</div><div class='ctx'> 	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='ctx'> 	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='ctx'> 	struct mii_bus *mdio_bus;</div><div class='hunk'>@@ -137,17 +136,12 @@ int xge_mdio_config(struct net_device *ndev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	linkmode_set_bit_array(phy_10_100_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_10_100_features_array),</div><div class='del'>-			       mask);</div><div class='del'>-	linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, mask);</div><div class='del'>-	linkmode_set_bit(ETHTOOL_LINK_MODE_AUI_BIT, mask);</div><div class='del'>-	linkmode_set_bit(ETHTOOL_LINK_MODE_MII_BIT, mask);</div><div class='del'>-	linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, mask);</div><div class='del'>-	linkmode_set_bit(ETHTOOL_LINK_MODE_BNC_BIT, mask);</div><div class='del'>-</div><div class='del'>-	linkmode_andnot(phydev-&gt;supported, phydev-&gt;supported, mask);</div><div class='del'>-	linkmode_copy(phydev-&gt;advertising, phydev-&gt;supported);</div><div class='add'>+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);</div><div class='add'>+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT);</div><div class='add'>+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);</div><div class='add'>+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Full_BIT);</div><div class='add'>+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);</div><div class='add'>+</div><div class='ctx'> 	pdata-&gt;phy_speed = SPEED_UNKNOWN;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c<br/>index e641dbbea1e2..b854b6b42d77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.c</a></div><div class='hunk'>@@ -421,18 +421,12 @@ static void xgene_enet_configure_clock(struct xgene_enet_pdata *pdata)</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;of_node) {</div><div class='ctx'> 		struct clk *parent = clk_get_parent(pdata-&gt;clk);</div><div class='add'>+		long rate = rgmii_clock(pdata-&gt;phy_speed);</div><div class='ctx'> </div><div class='del'>-		switch (pdata-&gt;phy_speed) {</div><div class='del'>-		case SPEED_10:</div><div class='del'>-			clk_set_rate(parent, 2500000);</div><div class='del'>-			break;</div><div class='del'>-		case SPEED_100:</div><div class='del'>-			clk_set_rate(parent, 25000000);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			clk_set_rate(parent, 125000000);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+		if (rate &lt; 0)</div><div class='add'>+			rate = 125000000;</div><div class='add'>+</div><div class='add'>+		clk_set_rate(parent, rate);</div><div class='ctx'> 	}</div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='ctx'> 	else {</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c b/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c<br/>index 86607b79c09f..cc3b1631c905 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c</a></div><div class='hunk'>@@ -6,8 +6,14 @@</div><div class='ctx'>  *	    Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/of_gpio.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "xgene_enet_main.h"</div><div class='ctx'> #include "xgene_enet_hw.h"</div><div class='ctx'> #include "xgene_enet_xgmac.h"</div><div class='head'>diff --git a/drivers/net/ethernet/apple/bmac.c b/drivers/net/ethernet/apple/bmac.c<br/>index 785f4b4ff758..b3bf8d6f88e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/bmac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apple/bmac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/bmac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apple/bmac.c</a></div><div class='hunk'>@@ -20,7 +20,6 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='del'>-#include &lt;linux/crc32poly.h&gt;</div><div class='ctx'> #include &lt;linux/bitrev.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -461,7 +460,7 @@ static int bmac_suspend(struct macio_dev *mdev, pm_message_t state)</div><div class='ctx'> 	/* prolly should wait for dma to finish &amp; turn off the chip */</div><div class='ctx'> 	spin_lock_irqsave(&amp;bp-&gt;lock, flags);</div><div class='ctx'> 	if (bp-&gt;timeout_active) {</div><div class='del'>-		del_timer(&amp;bp-&gt;tx_timeout);</div><div class='add'>+		timer_delete(&amp;bp-&gt;tx_timeout);</div><div class='ctx'> 		bp-&gt;timeout_active = 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	disable_irq(dev-&gt;irq);</div><div class='hunk'>@@ -546,7 +545,7 @@ static inline void bmac_set_timeout(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bp-&gt;lock, flags);</div><div class='ctx'> 	if (bp-&gt;timeout_active)</div><div class='del'>-		del_timer(&amp;bp-&gt;tx_timeout);</div><div class='add'>+		timer_delete(&amp;bp-&gt;tx_timeout);</div><div class='ctx'> 	bp-&gt;tx_timeout.expires = jiffies + TX_TIMEOUT;</div><div class='ctx'> 	add_timer(&amp;bp-&gt;tx_timeout);</div><div class='ctx'> 	bp-&gt;timeout_active = 1;</div><div class='hunk'>@@ -755,7 +754,7 @@ static irqreturn_t bmac_txdma_intr(int irq, void *dev_id)</div><div class='ctx'> 		XXDEBUG(("bmac_txdma_intr\n"));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*     del_timer(&amp;bp-&gt;tx_timeout); */</div><div class='add'>+	/*     timer_delete(&amp;bp-&gt;tx_timeout); */</div><div class='ctx'> 	/*     bp-&gt;timeout_active = 0; */</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='hunk'>@@ -796,59 +795,6 @@ static irqreturn_t bmac_txdma_intr(int irq, void *dev_id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifndef SUNHME_MULTICAST</div><div class='del'>-/* Real fast bit-reversal algorithm, 6-bit values */</div><div class='del'>-static int reverse6[64] = {</div><div class='del'>-	0x0,0x20,0x10,0x30,0x8,0x28,0x18,0x38,</div><div class='del'>-	0x4,0x24,0x14,0x34,0xc,0x2c,0x1c,0x3c,</div><div class='del'>-	0x2,0x22,0x12,0x32,0xa,0x2a,0x1a,0x3a,</div><div class='del'>-	0x6,0x26,0x16,0x36,0xe,0x2e,0x1e,0x3e,</div><div class='del'>-	0x1,0x21,0x11,0x31,0x9,0x29,0x19,0x39,</div><div class='del'>-	0x5,0x25,0x15,0x35,0xd,0x2d,0x1d,0x3d,</div><div class='del'>-	0x3,0x23,0x13,0x33,0xb,0x2b,0x1b,0x3b,</div><div class='del'>-	0x7,0x27,0x17,0x37,0xf,0x2f,0x1f,0x3f</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned int</div><div class='del'>-crc416(unsigned int curval, unsigned short nxtval)</div><div class='del'>-{</div><div class='del'>-	unsigned int counter, cur = curval, next = nxtval;</div><div class='del'>-	int high_crc_set, low_data_set;</div><div class='del'>-</div><div class='del'>-	/* Swap bytes */</div><div class='del'>-	next = ((next &amp; 0x00FF) &lt;&lt; 8) | (next &gt;&gt; 8);</div><div class='del'>-</div><div class='del'>-	/* Compute bit-by-bit */</div><div class='del'>-	for (counter = 0; counter &lt; 16; ++counter) {</div><div class='del'>-		/* is high CRC bit set? */</div><div class='del'>-		if ((cur &amp; 0x80000000) == 0) high_crc_set = 0;</div><div class='del'>-		else high_crc_set = 1;</div><div class='del'>-</div><div class='del'>-		cur = cur &lt;&lt; 1;</div><div class='del'>-</div><div class='del'>-		if ((next &amp; 0x0001) == 0) low_data_set = 0;</div><div class='del'>-		else low_data_set = 1;</div><div class='del'>-</div><div class='del'>-		next = next &gt;&gt; 1;</div><div class='del'>-</div><div class='del'>-		/* do the XOR */</div><div class='del'>-		if (high_crc_set ^ low_data_set) cur = cur ^ CRC32_POLY_BE;</div><div class='del'>-	}</div><div class='del'>-	return cur;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int</div><div class='del'>-bmac_crc(unsigned short *address)</div><div class='del'>-{</div><div class='del'>-	unsigned int newcrc;</div><div class='del'>-</div><div class='del'>-	XXDEBUG(("bmac_crc: addr=%#04x, %#04x, %#04x\n", *address, address[1], address[2]));</div><div class='del'>-	newcrc = crc416(0xffffffff, *address);	/* address bits 47 - 32 */</div><div class='del'>-	newcrc = crc416(newcrc, address[1]);	/* address bits 31 - 16 */</div><div class='del'>-	newcrc = crc416(newcrc, address[2]);	/* address bits 15 - 0  */</div><div class='del'>-</div><div class='del'>-	return(newcrc);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Add requested mcast addr to BMac's hash table filter.</div><div class='ctx'>  *</div><div class='hunk'>@@ -861,8 +807,7 @@ bmac_addhash(struct bmac_data *bp, unsigned char *addr)</div><div class='ctx'> 	unsigned short	 mask;</div><div class='ctx'> </div><div class='ctx'> 	if (!(*addr)) return;</div><div class='del'>-	crc = bmac_crc((unsigned short *)addr) &amp; 0x3f; /* Big-endian alert! */</div><div class='del'>-	crc = reverse6[crc];	/* Hyperfast bit-reversing algorithm */</div><div class='add'>+	crc = crc32(~0, addr, ETH_ALEN) &gt;&gt; 26;</div><div class='ctx'> 	if (bp-&gt;hash_use_count[crc]++) return; /* This bit is already set */</div><div class='ctx'> 	mask = crc % 16;</div><div class='ctx'> 	mask = (unsigned char)1 &lt;&lt; mask;</div><div class='hunk'>@@ -876,8 +821,7 @@ bmac_removehash(struct bmac_data *bp, unsigned char *addr)</div><div class='ctx'> 	unsigned char mask;</div><div class='ctx'> </div><div class='ctx'> 	/* Now, delete the address from the filter copy, as indicated */</div><div class='del'>-	crc = bmac_crc((unsigned short *)addr) &amp; 0x3f; /* Big-endian alert! */</div><div class='del'>-	crc = reverse6[crc];	/* Hyperfast bit-reversing algorithm */</div><div class='add'>+	crc = crc32(~0, addr, ETH_ALEN) &gt;&gt; 26;</div><div class='ctx'> 	if (bp-&gt;hash_use_count[crc] == 0) return; /* That bit wasn't in use! */</div><div class='ctx'> 	if (--bp-&gt;hash_use_count[crc]) return; /* That bit is still in use */</div><div class='ctx'> 	mask = crc % 16;</div><div class='hunk'>@@ -1466,7 +1410,7 @@ bmac_output(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void bmac_tx_timeout(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bmac_data *bp = from_timer(bp, t, tx_timeout);</div><div class='add'>+	struct bmac_data *bp = timer_container_of(bp, t, tx_timeout);</div><div class='ctx'> 	struct net_device *dev = macio_get_drvdata(bp-&gt;mdev);</div><div class='ctx'> 	volatile struct dbdma_regs __iomem *td = bp-&gt;tx_dma;</div><div class='ctx'> 	volatile struct dbdma_regs __iomem *rd = bp-&gt;rx_dma;</div><div class='head'>diff --git a/drivers/net/ethernet/apple/mace.c b/drivers/net/ethernet/apple/mace.c<br/>index e6350971c707..af26905e44e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/mace.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/apple/mace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/mace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apple/mace.c</a></div><div class='hunk'>@@ -523,7 +523,7 @@ static inline void mace_set_timeout(struct net_device *dev)</div><div class='ctx'>     struct mace_data *mp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'>     if (mp-&gt;timeout_active)</div><div class='del'>-	del_timer(&amp;mp-&gt;tx_timeout);</div><div class='add'>+	timer_delete(&amp;mp-&gt;tx_timeout);</div><div class='ctx'>     mp-&gt;tx_timeout.expires = jiffies + TX_TIMEOUT;</div><div class='ctx'>     add_timer(&amp;mp-&gt;tx_timeout);</div><div class='ctx'>     mp-&gt;timeout_active = 1;</div><div class='hunk'>@@ -676,7 +676,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'>     i = mp-&gt;tx_empty;</div><div class='ctx'>     while (in_8(&amp;mb-&gt;pr) &amp; XMTSV) {</div><div class='del'>-	del_timer(&amp;mp-&gt;tx_timeout);</div><div class='add'>+	timer_delete(&amp;mp-&gt;tx_timeout);</div><div class='ctx'> 	mp-&gt;timeout_active = 0;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear any interrupt indication associated with this status</div><div class='hunk'>@@ -805,7 +805,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> static void mace_tx_timeout(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-    struct mace_data *mp = from_timer(mp, t, tx_timeout);</div><div class='add'>+    struct mace_data *mp = timer_container_of(mp, t, tx_timeout);</div><div class='ctx'>     struct net_device *dev = macio_get_drvdata(mp-&gt;mdev);</div><div class='ctx'>     volatile struct mace __iomem *mb = mp-&gt;mace;</div><div class='ctx'>     volatile struct dbdma_regs __iomem *td = mp-&gt;tx_dma;</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c b/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c<br/>index 414b2e448d59..787ea91802e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c</a></div><div class='hunk'>@@ -113,19 +113,9 @@ static const struct hwmon_ops aq_hwmon_ops = {</div><div class='ctx'> 	.read_string = aq_hwmon_read_string,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static u32 aq_hwmon_temp_config[] = {</div><div class='del'>-	HWMON_T_INPUT | HWMON_T_LABEL,</div><div class='del'>-	HWMON_T_INPUT | HWMON_T_LABEL,</div><div class='del'>-	0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info aq_hwmon_temp = {</div><div class='del'>-	.type = hwmon_temp,</div><div class='del'>-	.config = aq_hwmon_temp_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct hwmon_channel_info * const aq_hwmon_info[] = {</div><div class='del'>-	&amp;aq_hwmon_temp,</div><div class='add'>+	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_LABEL,</div><div class='add'>+			   HWMON_T_INPUT | HWMON_T_LABEL),</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h<br/>index 42c0efc1b455..4e66fd9b2ab1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_hw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_hw.h</a></div><div class='hunk'>@@ -113,6 +113,8 @@ struct aq_stats_s {</div><div class='ctx'> #define AQ_HW_POWER_STATE_D0   0U</div><div class='ctx'> #define AQ_HW_POWER_STATE_D3   3U</div><div class='ctx'> </div><div class='add'>+#define	AQ_FW_WAKE_ON_LINK_RTPM BIT(10)</div><div class='add'>+</div><div class='ctx'> #define AQ_HW_FLAG_STARTED     0x00000004U</div><div class='ctx'> #define AQ_HW_FLAG_STOPPING    0x00000008U</div><div class='ctx'> #define AQ_HW_FLAG_RESETTING   0x00000010U</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c<br/>index 1921741f7311..18b08277d2e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "aq_hw.h"</div><div class='ctx'> #include "aq_nic.h"</div><div class='add'>+#include "hw_atl/hw_atl_llh.h"</div><div class='ctx'> </div><div class='ctx'> void aq_hw_write_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk,</div><div class='ctx'> 			 u32 shift, u32 val)</div><div class='hunk'>@@ -81,6 +82,27 @@ void aq_hw_write_reg64(struct aq_hw_s *hw, u32 reg, u64 value)</div><div class='ctx'> 		lo_hi_writeq(value, hw-&gt;mmio + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int aq_hw_invalidate_descriptor_cache(struct aq_hw_s *hw)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Invalidate Descriptor Cache to prevent writing to the cached</div><div class='add'>+	 * descriptors and to the data pointer of those descriptors</div><div class='add'>+	 */</div><div class='add'>+	hw_atl_rdm_rx_dma_desc_cache_init_tgl(hw);</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	readx_poll_timeout_atomic(hw_atl_rdm_rx_dma_desc_cache_init_done_get,</div><div class='add'>+				  hw, val, val == 1, 1000U, 10000U);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int aq_hw_err_from_flags(struct aq_hw_s *hw)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h<br/>index ffa6e4067c21..d89c63d88e4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h</a></div><div class='hunk'>@@ -35,6 +35,7 @@ u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg);</div><div class='ctx'> void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value);</div><div class='ctx'> u64 aq_hw_read_reg64(struct aq_hw_s *hw, u32 reg);</div><div class='ctx'> void aq_hw_write_reg64(struct aq_hw_s *hw, u32 reg, u64 value);</div><div class='add'>+int aq_hw_invalidate_descriptor_cache(struct aq_hw_s *hw);</div><div class='ctx'> int aq_hw_err_from_flags(struct aq_hw_s *hw);</div><div class='ctx'> int aq_hw_num_tcs(struct aq_hw_s *hw);</div><div class='ctx'> int aq_hw_q_per_tc(struct aq_hw_s *hw);</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_main.c b/drivers/net/ethernet/aquantia/atlantic/aq_main.c<br/>index c1d1673c5749..4ef4fe64b8ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_main.c</a></div><div class='hunk'>@@ -123,7 +123,6 @@ static netdev_tx_t aq_ndev_start_xmit(struct sk_buff *skb, struct net_device *nd</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	skb_tx_timestamp(skb);</div><div class='ctx'> 	return aq_nic_xmit(aq_nic, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -259,10 +258,15 @@ static void aq_ndev_set_multicast_settings(struct net_device *ndev)</div><div class='ctx'> 	(void)aq_nic_set_multicast_list(aq_nic, ndev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='del'>-static int aq_ndev_config_hwtstamp(struct aq_nic_s *aq_nic,</div><div class='del'>-				   struct hwtstamp_config *config)</div><div class='add'>+static int aq_ndev_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (!IS_REACHABLE(CONFIG_PTP_1588_CLOCK) || !aq_nic-&gt;aq_ptp)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='hunk'>@@ -291,59 +295,17 @@ static int aq_ndev_config_hwtstamp(struct aq_nic_s *aq_nic,</div><div class='ctx'> </div><div class='ctx'> 	return aq_ptp_hwtstamp_config_set(aq_nic-&gt;aq_ptp, config);</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int aq_ndev_hwtstamp_set(struct aq_nic_s *aq_nic, struct ifreq *ifr)</div><div class='del'>-{</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='del'>-	int ret_val;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (!aq_nic-&gt;aq_ptp)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='del'>-	ret_val = aq_ndev_config_hwtstamp(aq_nic, &amp;config);</div><div class='del'>-	if (ret_val)</div><div class='del'>-		return ret_val;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-	       -EFAULT : 0;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='del'>-static int aq_ndev_hwtstamp_get(struct aq_nic_s *aq_nic, struct ifreq *ifr)</div><div class='add'>+static int aq_ndev_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+				struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (!aq_nic-&gt;aq_ptp)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	aq_ptp_hwtstamp_config_get(aq_nic-&gt;aq_ptp, &amp;config);</div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-	       -EFAULT : 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int aq_ndev_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct aq_nic_s *aq_nic = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return aq_ndev_hwtstamp_set(aq_nic, ifr);</div><div class='del'>-</div><div class='del'>-#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return aq_ndev_hwtstamp_get(aq_nic, ifr);</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='add'>+	aq_ptp_hwtstamp_config_get(aq_nic-&gt;aq_ptp, config);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aq_ndo_vlan_rx_add_vid(struct net_device *ndev, __be16 proto,</div><div class='hunk'>@@ -501,12 +463,13 @@ static const struct net_device_ops aq_ndev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address = aq_ndev_set_mac_address,</div><div class='ctx'> 	.ndo_set_features = aq_ndev_set_features,</div><div class='ctx'> 	.ndo_fix_features = aq_ndev_fix_features,</div><div class='del'>-	.ndo_eth_ioctl = aq_ndev_ioctl,</div><div class='ctx'> 	.ndo_vlan_rx_add_vid = aq_ndo_vlan_rx_add_vid,</div><div class='ctx'> 	.ndo_vlan_rx_kill_vid = aq_ndo_vlan_rx_kill_vid,</div><div class='ctx'> 	.ndo_setup_tc = aq_ndo_setup_tc,</div><div class='ctx'> 	.ndo_bpf = aq_xdp,</div><div class='ctx'> 	.ndo_xdp_xmit = aq_xdp_xmit,</div><div class='add'>+	.ndo_hwtstamp_get = aq_ndev_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = aq_ndev_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init aq_ndev_init_module(void)</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_nic.c b/drivers/net/ethernet/aquantia/atlantic/aq_nic.c<br/>index fe0e3e2a8117..b24eaa5283fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_nic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_nic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_nic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_nic.c</a></div><div class='hunk'>@@ -254,7 +254,7 @@ static void aq_nic_service_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void aq_nic_service_timer_cb(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct aq_nic_s *self = from_timer(self, t, service_timer);</div><div class='add'>+	struct aq_nic_s *self = timer_container_of(self, t, service_timer);</div><div class='ctx'> </div><div class='ctx'> 	mod_timer(&amp;self-&gt;service_timer,</div><div class='ctx'> 		  jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL);</div><div class='hunk'>@@ -264,7 +264,7 @@ static void aq_nic_service_timer_cb(struct timer_list *t)</div><div class='ctx'> </div><div class='ctx'> static void aq_nic_polling_timer_cb(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct aq_nic_s *self = from_timer(self, t, polling_timer);</div><div class='add'>+	struct aq_nic_s *self = timer_container_of(self, t, polling_timer);</div><div class='ctx'> 	unsigned int i = 0U;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0U; self-&gt;aq_vecs &gt; i; ++i)</div><div class='hunk'>@@ -898,6 +898,8 @@ int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	frags = aq_nic_map_skb(self, skb, ring);</div><div class='ctx'> </div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 	if (likely(frags)) {</div><div class='ctx'> 		err = self-&gt;aq_hw_ops-&gt;hw_ring_tx_xmit(self-&gt;aq_hw,</div><div class='ctx'> 						       ring, frags);</div><div class='hunk'>@@ -1389,13 +1391,13 @@ int aq_nic_stop(struct aq_nic_s *self)</div><div class='ctx'> 	netif_tx_disable(self-&gt;ndev);</div><div class='ctx'> 	netif_carrier_off(self-&gt;ndev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;self-&gt;service_timer);</div><div class='add'>+	timer_delete_sync(&amp;self-&gt;service_timer);</div><div class='ctx'> 	cancel_work_sync(&amp;self-&gt;service_task);</div><div class='ctx'> </div><div class='ctx'> 	self-&gt;aq_hw_ops-&gt;hw_irq_disable(self-&gt;aq_hw, AQ_CFG_IRQ_MASK);</div><div class='ctx'> </div><div class='ctx'> 	if (self-&gt;aq_nic_cfg.is_polling)</div><div class='del'>-		del_timer_sync(&amp;self-&gt;polling_timer);</div><div class='add'>+		timer_delete_sync(&amp;self-&gt;polling_timer);</div><div class='ctx'> 	else</div><div class='ctx'> 		aq_pci_func_free_irqs(self);</div><div class='ctx'> </div><div class='hunk'>@@ -1441,7 +1443,9 @@ void aq_nic_deinit(struct aq_nic_s *self, bool link_down)</div><div class='ctx'> 	aq_ptp_ring_free(self);</div><div class='ctx'> 	aq_ptp_free(self);</div><div class='ctx'> </div><div class='del'>-	if (likely(self-&gt;aq_fw_ops-&gt;deinit) &amp;&amp; link_down) {</div><div class='add'>+	/* May be invoked during hot unplug. */</div><div class='add'>+	if (pci_device_is_present(self-&gt;pdev) &amp;&amp;</div><div class='add'>+	    likely(self-&gt;aq_fw_ops-&gt;deinit) &amp;&amp; link_down) {</div><div class='ctx'> 		mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='ctx'> 		self-&gt;aq_fw_ops-&gt;deinit(self-&gt;aq_hw);</div><div class='ctx'> 		mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c b/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c<br/>index 43c71f6b314f..ed5231dece3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c</a></div><div class='hunk'>@@ -162,8 +162,8 @@ int aq_pci_func_alloc_irq(struct aq_nic_s *self, unsigned int i,</div><div class='ctx'> 		self-&gt;msix_entry_mask |= (1 &lt;&lt; i);</div><div class='ctx'> </div><div class='ctx'> 		if (pdev-&gt;msix_enabled &amp;&amp; affinity_mask)</div><div class='del'>-			irq_set_affinity_hint(pci_irq_vector(pdev, i),</div><div class='del'>-					      affinity_mask);</div><div class='add'>+			irq_update_affinity_hint(pci_irq_vector(pdev, i),</div><div class='add'>+						 affinity_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -187,7 +187,7 @@ void aq_pci_func_free_irqs(struct aq_nic_s *self)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (pdev-&gt;msix_enabled)</div><div class='del'>-			irq_set_affinity_hint(pci_irq_vector(pdev, i), NULL);</div><div class='add'>+			irq_update_affinity_hint(pci_irq_vector(pdev, i), NULL);</div><div class='ctx'> 		free_irq(pci_irq_vector(pdev, i), irq_data);</div><div class='ctx'> 		self-&gt;msix_entry_mask &amp;= ~(1U &lt;&lt; i);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -463,7 +463,7 @@ static const struct dev_pm_ops aq_pm_ops = {</div><div class='ctx'> };</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static struct pci_driver aq_pci_ops = {</div><div class='add'>+static struct pci_driver aq_pci_driver = {</div><div class='ctx'> 	.name = AQ_CFG_DRV_NAME,</div><div class='ctx'> 	.id_table = aq_pci_tbl,</div><div class='ctx'> 	.probe = aq_pci_probe,</div><div class='hunk'>@@ -476,11 +476,11 @@ static struct pci_driver aq_pci_ops = {</div><div class='ctx'> </div><div class='ctx'> int aq_pci_func_register_driver(void)</div><div class='ctx'> {</div><div class='del'>-	return pci_register_driver(&amp;aq_pci_ops);</div><div class='add'>+	return pci_register_driver(&amp;aq_pci_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void aq_pci_func_unregister_driver(void)</div><div class='ctx'> {</div><div class='del'>-	pci_unregister_driver(&amp;aq_pci_ops);</div><div class='add'>+	pci_unregister_driver(&amp;aq_pci_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ptp.c b/drivers/net/ethernet/aquantia/atlantic/aq_ptp.c<br/>index 5acb3e16b567..0fa0f891c0e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_ptp.c</a></div><div class='hunk'>@@ -51,7 +51,7 @@ struct ptp_tx_timeout {</div><div class='ctx'> </div><div class='ctx'> struct aq_ptp_s {</div><div class='ctx'> 	struct aq_nic_s *aq_nic;</div><div class='del'>-	struct hwtstamp_config hwtstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config hwtstamp_config;</div><div class='ctx'> 	spinlock_t ptp_lock;</div><div class='ctx'> 	spinlock_t ptp_ring_lock;</div><div class='ctx'> 	struct ptp_clock *ptp_clock;</div><div class='hunk'>@@ -567,7 +567,7 @@ static void aq_ptp_rx_hwtstamp(struct aq_ptp_s *aq_ptp, struct skb_shared_hwtsta</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void aq_ptp_hwtstamp_config_get(struct aq_ptp_s *aq_ptp,</div><div class='del'>-				struct hwtstamp_config *config)</div><div class='add'>+				struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	*config = aq_ptp-&gt;hwtstamp_config;</div><div class='ctx'> }</div><div class='hunk'>@@ -588,7 +588,7 @@ static void aq_ptp_prepare_filters(struct aq_ptp_s *aq_ptp)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int aq_ptp_hwtstamp_config_set(struct aq_ptp_s *aq_ptp,</div><div class='del'>-			       struct hwtstamp_config *config)</div><div class='add'>+			       struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='ctx'> 	const struct aq_hw_ops *hw_ops;</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ptp.h b/drivers/net/ethernet/aquantia/atlantic/aq_ptp.h<br/>index 210b723f2207..5e643ec7cc06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_ptp.h</a></div><div class='hunk'>@@ -60,9 +60,9 @@ void aq_ptp_tx_hwtstamp(struct aq_nic_s *aq_nic, u64 timestamp);</div><div class='ctx'> </div><div class='ctx'> /* Must be to check available of PTP before call */</div><div class='ctx'> void aq_ptp_hwtstamp_config_get(struct aq_ptp_s *aq_ptp,</div><div class='del'>-				struct hwtstamp_config *config);</div><div class='add'>+				struct kernel_hwtstamp_config *config);</div><div class='ctx'> int aq_ptp_hwtstamp_config_set(struct aq_ptp_s *aq_ptp,</div><div class='del'>-			       struct hwtstamp_config *config);</div><div class='add'>+			       struct kernel_hwtstamp_config *config);</div><div class='ctx'> </div><div class='ctx'> /* Return either ring is belong to PTP or not*/</div><div class='ctx'> bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring);</div><div class='hunk'>@@ -130,9 +130,9 @@ static inline int aq_ptp_xmit(struct aq_nic_s *aq_nic, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> static inline void aq_ptp_tx_hwtstamp(struct aq_nic_s *aq_nic, u64 timestamp) {}</div><div class='ctx'> static inline void aq_ptp_hwtstamp_config_get(struct aq_ptp_s *aq_ptp,</div><div class='del'>-					      struct hwtstamp_config *config) {}</div><div class='add'>+					      struct kernel_hwtstamp_config *config) {}</div><div class='ctx'> static inline int aq_ptp_hwtstamp_config_set(struct aq_ptp_s *aq_ptp,</div><div class='del'>-					     struct hwtstamp_config *config)</div><div class='add'>+					     struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ring.c b/drivers/net/ethernet/aquantia/atlantic/aq_ring.c<br/>index f21de0c21e52..d23d23bed39f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ring.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/aq_ring.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ring.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_ring.c</a></div><div class='hunk'>@@ -547,6 +547,11 @@ static int __aq_ring_rx_clean(struct aq_ring_s *self, struct napi_struct *napi,</div><div class='ctx'> </div><div class='ctx'> 		if (!buff-&gt;is_eop) {</div><div class='ctx'> 			unsigned int frag_cnt = 0U;</div><div class='add'>+</div><div class='add'>+			/* There will be an extra fragment */</div><div class='add'>+			if (buff-&gt;len &gt; AQ_CFG_RX_HDR_SIZE)</div><div class='add'>+				frag_cnt++;</div><div class='add'>+</div><div class='ctx'> 			buff_ = buff;</div><div class='ctx'> 			do {</div><div class='ctx'> 				bool is_rsc_completed = true;</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c<br/>index 493432d036b9..c7895bfb2ecf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c</a></div><div class='hunk'>@@ -1198,26 +1198,9 @@ static int hw_atl_b0_hw_interrupt_moderation_set(struct aq_hw_s *self)</div><div class='ctx'> </div><div class='ctx'> static int hw_atl_b0_hw_stop(struct aq_hw_s *self)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='ctx'> 	hw_atl_b0_hw_irq_disable(self, HW_ATL_B0_INT_MASK);</div><div class='ctx'> </div><div class='del'>-	/* Invalidate Descriptor Cache to prevent writing to the cached</div><div class='del'>-	 * descriptors and to the data pointer of those descriptors</div><div class='del'>-	 */</div><div class='del'>-	hw_atl_rdm_rx_dma_desc_cache_init_tgl(self);</div><div class='del'>-</div><div class='del'>-	err = aq_hw_err_from_flags(self);</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_exit;</div><div class='del'>-</div><div class='del'>-	readx_poll_timeout_atomic(hw_atl_rdm_rx_dma_desc_cache_init_done_get,</div><div class='del'>-				  self, val, val == 1, 1000U, 10000U);</div><div class='del'>-</div><div class='del'>-err_exit:</div><div class='del'>-	return err;</div><div class='add'>+	return aq_hw_invalidate_descriptor_cache(self);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int hw_atl_b0_hw_ring_tx_stop(struct aq_hw_s *self, struct aq_ring_s *ring)</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h<br/>index f5901f8e3907..f6b990b7f5b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h</a></div><div class='hunk'>@@ -226,7 +226,6 @@ struct __packed offload_info {</div><div class='ctx'> 	struct offload_port_info ports;</div><div class='ctx'> 	struct offload_ka_info kas;</div><div class='ctx'> 	struct offload_rr_info rrs;</div><div class='del'>-	u8 buf[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct __packed hw_atl_utils_fw_rpc {</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c<br/>index b0ed572e88c6..0ce9caae8799 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c</a></div><div class='hunk'>@@ -759,7 +759,7 @@ static int hw_atl2_hw_stop(struct aq_hw_s *self)</div><div class='ctx'> {</div><div class='ctx'> 	hw_atl_b0_hw_irq_disable(self, HW_ATL2_INT_MASK);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return aq_hw_invalidate_descriptor_cache(self);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct aq_stats_s *hw_atl2_utils_get_hw_stats(struct aq_hw_s *self)</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c<br/>index 52e2070a4a2f..7370e3f76b62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c</a></div><div class='hunk'>@@ -462,6 +462,44 @@ static int aq_a2_fw_get_mac_temp(struct aq_hw_s *self, int *temp)</div><div class='ctx'> 	return aq_a2_fw_get_phy_temp(self, temp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int aq_a2_fw_set_wol_params(struct aq_hw_s *self, const u8 *mac, u32 wol)</div><div class='add'>+{</div><div class='add'>+	struct mac_address_aligned_s mac_address;</div><div class='add'>+	struct link_control_s link_control;</div><div class='add'>+	struct wake_on_lan_s wake_on_lan;</div><div class='add'>+</div><div class='add'>+	memcpy(mac_address.aligned.mac_address, mac, ETH_ALEN);</div><div class='add'>+	hw_atl2_shared_buffer_write(self, mac_address, mac_address);</div><div class='add'>+</div><div class='add'>+	memset(&amp;wake_on_lan, 0, sizeof(wake_on_lan));</div><div class='add'>+</div><div class='add'>+	if (wol &amp; WAKE_MAGIC)</div><div class='add'>+		wake_on_lan.wake_on_magic_packet = 1U;</div><div class='add'>+</div><div class='add'>+	if (wol &amp; (WAKE_PHY | AQ_FW_WAKE_ON_LINK_RTPM))</div><div class='add'>+		wake_on_lan.wake_on_link_up = 1U;</div><div class='add'>+</div><div class='add'>+	hw_atl2_shared_buffer_write(self, sleep_proxy, wake_on_lan);</div><div class='add'>+</div><div class='add'>+	hw_atl2_shared_buffer_get(self, link_control, link_control);</div><div class='add'>+	link_control.mode = AQ_HOST_MODE_SLEEP_PROXY;</div><div class='add'>+	hw_atl2_shared_buffer_write(self, link_control, link_control);</div><div class='add'>+</div><div class='add'>+	return hw_atl2_shared_buffer_finish_ack(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_a2_fw_set_power(struct aq_hw_s *self, unsigned int power_state,</div><div class='add'>+			      const u8 *mac)</div><div class='add'>+{</div><div class='add'>+	u32 wol = self-&gt;aq_nic_cfg-&gt;wol;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (wol)</div><div class='add'>+		err = aq_a2_fw_set_wol_params(self, mac, wol);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int aq_a2_fw_set_eee_rate(struct aq_hw_s *self, u32 speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct link_options_s link_options;</div><div class='hunk'>@@ -605,6 +643,7 @@ const struct aq_fw_ops aq_a2_fw_ops = {</div><div class='ctx'> 	.set_state          = aq_a2_fw_set_state,</div><div class='ctx'> 	.update_link_status = aq_a2_fw_update_link_status,</div><div class='ctx'> 	.update_stats       = aq_a2_fw_update_stats,</div><div class='add'>+	.set_power          = aq_a2_fw_set_power,</div><div class='ctx'> 	.get_mac_temp       = aq_a2_fw_get_mac_temp,</div><div class='ctx'> 	.get_phy_temp       = aq_a2_fw_get_phy_temp,</div><div class='ctx'> 	.set_eee_rate       = aq_a2_fw_set_eee_rate,</div><div class='head'>diff --git a/drivers/net/ethernet/arc/emac_main.c b/drivers/net/ethernet/arc/emac_main.c<br/>index 31ee477dd131..8283aeee35fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/arc/emac_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/arc/emac_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/arc/emac_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/arc/emac_main.c</a></div><div class='hunk'>@@ -111,6 +111,7 @@ static void arc_emac_tx_clean(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct arc_emac_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct device *dev = ndev-&gt;dev.parent;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; TX_BD_NUM; i++) {</div><div class='hunk'>@@ -140,7 +141,7 @@ static void arc_emac_tx_clean(struct net_device *ndev)</div><div class='ctx'> 			stats-&gt;tx_bytes += skb-&gt;len;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		dma_unmap_single(&amp;ndev-&gt;dev, dma_unmap_addr(tx_buff, addr),</div><div class='add'>+		dma_unmap_single(dev, dma_unmap_addr(tx_buff, addr),</div><div class='ctx'> 				 dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 		/* return the sk_buff to system */</div><div class='hunk'>@@ -174,6 +175,7 @@ static void arc_emac_tx_clean(struct net_device *ndev)</div><div class='ctx'> static int arc_emac_rx(struct net_device *ndev, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct arc_emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = ndev-&gt;dev.parent;</div><div class='ctx'> 	unsigned int work_done;</div><div class='ctx'> </div><div class='ctx'> 	for (work_done = 0; work_done &lt; budget; work_done++) {</div><div class='hunk'>@@ -223,9 +225,9 @@ static int arc_emac_rx(struct net_device *ndev, int budget)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		addr = dma_map_single(&amp;ndev-&gt;dev, (void *)skb-&gt;data,</div><div class='add'>+		addr = dma_map_single(dev, (void *)skb-&gt;data,</div><div class='ctx'> 				      EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);</div><div class='del'>-		if (dma_mapping_error(&amp;ndev-&gt;dev, addr)) {</div><div class='add'>+		if (dma_mapping_error(dev, addr)) {</div><div class='ctx'> 			if (net_ratelimit())</div><div class='ctx'> 				netdev_err(ndev, "cannot map dma buffer\n");</div><div class='ctx'> 			dev_kfree_skb(skb);</div><div class='hunk'>@@ -237,7 +239,7 @@ static int arc_emac_rx(struct net_device *ndev, int budget)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* unmap previosly mapped skb */</div><div class='del'>-		dma_unmap_single(&amp;ndev-&gt;dev, dma_unmap_addr(rx_buff, addr),</div><div class='add'>+		dma_unmap_single(dev, dma_unmap_addr(rx_buff, addr),</div><div class='ctx'> 				 dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 		pktlen = info &amp; LEN_MASK;</div><div class='hunk'>@@ -423,6 +425,7 @@ static int arc_emac_open(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct arc_emac_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct phy_device *phy_dev = ndev-&gt;phydev;</div><div class='add'>+	struct device *dev = ndev-&gt;dev.parent;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	phy_dev-&gt;autoneg = AUTONEG_ENABLE;</div><div class='hunk'>@@ -445,9 +448,9 @@ static int arc_emac_open(struct net_device *ndev)</div><div class='ctx'> 		if (unlikely(!rx_buff-&gt;skb))</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		addr = dma_map_single(&amp;ndev-&gt;dev, (void *)rx_buff-&gt;skb-&gt;data,</div><div class='add'>+		addr = dma_map_single(dev, (void *)rx_buff-&gt;skb-&gt;data,</div><div class='ctx'> 				      EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);</div><div class='del'>-		if (dma_mapping_error(&amp;ndev-&gt;dev, addr)) {</div><div class='add'>+		if (dma_mapping_error(dev, addr)) {</div><div class='ctx'> 			netdev_err(ndev, "cannot dma map\n");</div><div class='ctx'> 			dev_kfree_skb(rx_buff-&gt;skb);</div><div class='ctx'> 			return -ENOMEM;</div><div class='hunk'>@@ -548,6 +551,7 @@ static void arc_emac_set_rx_mode(struct net_device *ndev)</div><div class='ctx'> static void arc_free_tx_queue(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct arc_emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = ndev-&gt;dev.parent;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; TX_BD_NUM; i++) {</div><div class='hunk'>@@ -555,7 +559,7 @@ static void arc_free_tx_queue(struct net_device *ndev)</div><div class='ctx'> 		struct buffer_state *tx_buff = &amp;priv-&gt;tx_buff[i];</div><div class='ctx'> </div><div class='ctx'> 		if (tx_buff-&gt;skb) {</div><div class='del'>-			dma_unmap_single(&amp;ndev-&gt;dev,</div><div class='add'>+			dma_unmap_single(dev,</div><div class='ctx'> 					 dma_unmap_addr(tx_buff, addr),</div><div class='ctx'> 					 dma_unmap_len(tx_buff, len),</div><div class='ctx'> 					 DMA_TO_DEVICE);</div><div class='hunk'>@@ -579,6 +583,7 @@ static void arc_free_tx_queue(struct net_device *ndev)</div><div class='ctx'> static void arc_free_rx_queue(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct arc_emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = ndev-&gt;dev.parent;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; RX_BD_NUM; i++) {</div><div class='hunk'>@@ -586,7 +591,7 @@ static void arc_free_rx_queue(struct net_device *ndev)</div><div class='ctx'> 		struct buffer_state *rx_buff = &amp;priv-&gt;rx_buff[i];</div><div class='ctx'> </div><div class='ctx'> 		if (rx_buff-&gt;skb) {</div><div class='del'>-			dma_unmap_single(&amp;ndev-&gt;dev,</div><div class='add'>+			dma_unmap_single(dev,</div><div class='ctx'> 					 dma_unmap_addr(rx_buff, addr),</div><div class='ctx'> 					 dma_unmap_len(rx_buff, len),</div><div class='ctx'> 					 DMA_FROM_DEVICE);</div><div class='hunk'>@@ -679,6 +684,7 @@ static netdev_tx_t arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 	unsigned int len, *txbd_curr = &amp;priv-&gt;txbd_curr;</div><div class='ctx'> 	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='ctx'> 	__le32 *info = &amp;priv-&gt;txbd[*txbd_curr].info;</div><div class='add'>+	struct device *dev = ndev-&gt;dev.parent;</div><div class='ctx'> 	dma_addr_t addr;</div><div class='ctx'> </div><div class='ctx'> 	if (skb_padto(skb, ETH_ZLEN))</div><div class='hunk'>@@ -692,10 +698,9 @@ static netdev_tx_t arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	addr = dma_map_single(&amp;ndev-&gt;dev, (void *)skb-&gt;data, len,</div><div class='del'>-			      DMA_TO_DEVICE);</div><div class='add'>+	addr = dma_map_single(dev, (void *)skb-&gt;data, len, DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(dma_mapping_error(&amp;ndev-&gt;dev, addr))) {</div><div class='add'>+	if (unlikely(dma_mapping_error(dev, addr))) {</div><div class='ctx'> 		stats-&gt;tx_dropped++;</div><div class='ctx'> 		stats-&gt;tx_errors++;</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='head'>diff --git a/drivers/net/ethernet/arc/emac_mdio.c b/drivers/net/ethernet/arc/emac_mdio.c<br/>index 87f40c2ba904..078b1a72c161 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/arc/emac_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/arc/emac_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/arc/emac_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/arc/emac_mdio.c</a></div><div class='hunk'>@@ -133,6 +133,7 @@ int arc_mdio_probe(struct arc_emac_priv *priv)</div><div class='ctx'> 	struct arc_emac_mdio_bus_data *data = &amp;priv-&gt;bus_data;</div><div class='ctx'> 	struct device_node *np = priv-&gt;dev-&gt;of_node;</div><div class='ctx'> 	const char *name = "Synopsys MII Bus";</div><div class='add'>+	struct device_node *mdio_node;</div><div class='ctx'> 	struct mii_bus *bus;</div><div class='ctx'> 	int error;</div><div class='ctx'> </div><div class='hunk'>@@ -164,7 +165,13 @@ int arc_mdio_probe(struct arc_emac_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s", bus-&gt;name);</div><div class='ctx'> </div><div class='del'>-	error = of_mdiobus_register(bus, priv-&gt;dev-&gt;of_node);</div><div class='add'>+	/* Backwards compatibility for EMAC nodes without MDIO subnode. */</div><div class='add'>+	mdio_node = of_get_child_by_name(np, "mdio");</div><div class='add'>+	if (!mdio_node)</div><div class='add'>+		mdio_node = of_node_get(np);</div><div class='add'>+</div><div class='add'>+	error = of_mdiobus_register(bus, mdio_node);</div><div class='add'>+	of_node_put(mdio_node);</div><div class='ctx'> 	if (error) {</div><div class='ctx'> 		mdiobus_free(bus);</div><div class='ctx'> 		return dev_err_probe(priv-&gt;dev, error,</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/ag71xx.c b/drivers/net/ethernet/atheros/ag71xx.c<br/>index 3d4c3d8698e2..cbc730c7cff2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/atheros/ag71xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/atheros/ag71xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/atheros/ag71xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/atheros/ag71xx.c</a></div><div class='hunk'>@@ -1213,6 +1213,11 @@ static bool ag71xx_fill_rx_buf(struct ag71xx *ag, struct ag71xx_buf *buf,</div><div class='ctx'> 	buf-&gt;rx.rx_buf = data;</div><div class='ctx'> 	buf-&gt;rx.dma_addr = dma_map_single(&amp;ag-&gt;pdev-&gt;dev, data, ag-&gt;rx_buf_size,</div><div class='ctx'> 					  DMA_FROM_DEVICE);</div><div class='add'>+	if (dma_mapping_error(&amp;ag-&gt;pdev-&gt;dev, buf-&gt;rx.dma_addr)) {</div><div class='add'>+		skb_free_frag(data);</div><div class='add'>+		buf-&gt;rx.rx_buf = NULL;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='ctx'> 	desc-&gt;data = (u32)buf-&gt;rx.dma_addr + offset;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -1391,7 +1396,7 @@ static void ag71xx_hw_disable(struct ag71xx *ag)</div><div class='ctx'> 	ag71xx_dma_reset(ag);</div><div class='ctx'> </div><div class='ctx'> 	napi_disable(&amp;ag-&gt;napi);</div><div class='del'>-	del_timer_sync(&amp;ag-&gt;oom_timer);</div><div class='add'>+	timer_delete_sync(&amp;ag-&gt;oom_timer);</div><div class='ctx'> </div><div class='ctx'> 	ag71xx_rings_cleanup(ag);</div><div class='ctx'> }</div><div class='hunk'>@@ -1511,6 +1516,10 @@ static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	dma_addr = dma_map_single(&amp;ag-&gt;pdev-&gt;dev, skb-&gt;data, skb-&gt;len,</div><div class='ctx'> 				  DMA_TO_DEVICE);</div><div class='add'>+	if (dma_mapping_error(&amp;ag-&gt;pdev-&gt;dev, dma_addr)) {</div><div class='add'>+		netif_dbg(ag, tx_err, ndev, "DMA mapping error\n");</div><div class='add'>+		goto err_drop;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	i = ring-&gt;curr &amp; ring_mask;</div><div class='ctx'> 	desc = ag71xx_ring_desc(ring, i);</div><div class='hunk'>@@ -1563,7 +1572,7 @@ err_drop:</div><div class='ctx'> </div><div class='ctx'> static void ag71xx_oom_timer_handler(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ag71xx *ag = from_timer(ag, t, oom_timer);</div><div class='add'>+	struct ag71xx *ag = timer_container_of(ag, t, oom_timer);</div><div class='ctx'> </div><div class='ctx'> 	napi_schedule(&amp;ag-&gt;napi);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atl1c/atl1c_main.c b/drivers/net/ethernet/atheros/atl1c/atl1c_main.c<br/>index c571614b1d50..7efa3fc257b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/atheros/atl1c/atl1c_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/atheros/atl1c/atl1c_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/atheros/atl1c/atl1c_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/atheros/atl1c/atl1c_main.c</a></div><div class='hunk'>@@ -231,8 +231,8 @@ static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)</div><div class='ctx'>  */</div><div class='ctx'> static void atl1c_phy_config(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct atl1c_adapter *adapter = from_timer(adapter, t,</div><div class='del'>-						   phy_config_timer);</div><div class='add'>+	struct atl1c_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							   phy_config_timer);</div><div class='ctx'> 	struct atl1c_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -357,7 +357,7 @@ static void atl1c_common_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void atl1c_del_timer(struct atl1c_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -2688,7 +2688,7 @@ static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	adapter-&gt;mii.mdio_write = atl1c_mdio_write;</div><div class='ctx'> 	adapter-&gt;mii.phy_id_mask = 0x1f;</div><div class='ctx'> 	adapter-&gt;mii.reg_num_mask = MDIO_CTRL_REG_MASK;</div><div class='del'>-	dev_set_threaded(netdev, true);</div><div class='add'>+	netif_threaded_enable(netdev);</div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;rx_queue_count; ++i)</div><div class='ctx'> 		netif_napi_add(netdev, &amp;adapter-&gt;rrd_ring[i].napi,</div><div class='ctx'> 			       atl1c_clean_rx);</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atl1e/atl1e_main.c b/drivers/net/ethernet/atheros/atl1e/atl1e_main.c<br/>index 9b778b34b67e..40290028580b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/atheros/atl1e/atl1e_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/atheros/atl1e/atl1e_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/atheros/atl1e/atl1e_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/atheros/atl1e/atl1e_main.c</a></div><div class='hunk'>@@ -115,8 +115,8 @@ static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)</div><div class='ctx'>  */</div><div class='ctx'> static void atl1e_phy_config(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct atl1e_adapter *adapter = from_timer(adapter, t,</div><div class='del'>-						   phy_config_timer);</div><div class='add'>+	struct atl1e_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							   phy_config_timer);</div><div class='ctx'> 	struct atl1e_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -232,7 +232,7 @@ static void atl1e_link_chg_event(struct atl1e_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> static void atl1e_del_timer(struct atl1e_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void atl1e_cancel_work(struct atl1e_adapter *adapter)</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atlx/atl1.c b/drivers/net/ethernet/atheros/atlx/atl1.c<br/>index 3afd3627ce48..98a4d089270e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/atheros/atlx/atl1.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/atheros/atlx/atl1.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/atheros/atlx/atl1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/atheros/atlx/atl1.c</a></div><div class='hunk'>@@ -1861,14 +1861,21 @@ static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		buffer_info-&gt;alloced = 1;</div><div class='del'>-		buffer_info-&gt;skb = skb;</div><div class='del'>-		buffer_info-&gt;length = (u16) adapter-&gt;rx_buffer_len;</div><div class='ctx'> 		page = virt_to_page(skb-&gt;data);</div><div class='ctx'> 		offset = offset_in_page(skb-&gt;data);</div><div class='ctx'> 		buffer_info-&gt;dma = dma_map_page(&amp;pdev-&gt;dev, page, offset,</div><div class='ctx'> 						adapter-&gt;rx_buffer_len,</div><div class='ctx'> 						DMA_FROM_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;pdev-&gt;dev, buffer_info-&gt;dma)) {</div><div class='add'>+			kfree_skb(skb);</div><div class='add'>+			adapter-&gt;soft_stats.rx_dropped++;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		buffer_info-&gt;alloced = 1;</div><div class='add'>+		buffer_info-&gt;skb = skb;</div><div class='add'>+		buffer_info-&gt;length = (u16)adapter-&gt;rx_buffer_len;</div><div class='add'>+</div><div class='ctx'> 		rfd_desc-&gt;buffer_addr = cpu_to_le64(buffer_info-&gt;dma);</div><div class='ctx'> 		rfd_desc-&gt;buf_len = cpu_to_le16(adapter-&gt;rx_buffer_len);</div><div class='ctx'> 		rfd_desc-&gt;coalese = 0;</div><div class='hunk'>@@ -2183,8 +2190,8 @@ static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,</div><div class='del'>-	struct tx_packet_desc *ptpd)</div><div class='add'>+static bool atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,</div><div class='add'>+			struct tx_packet_desc *ptpd)</div><div class='ctx'> {</div><div class='ctx'> 	struct atl1_tpd_ring *tpd_ring = &amp;adapter-&gt;tpd_ring;</div><div class='ctx'> 	struct atl1_buffer *buffer_info;</div><div class='hunk'>@@ -2194,6 +2201,7 @@ static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,</div><div class='ctx'> 	unsigned int nr_frags;</div><div class='ctx'> 	unsigned int f;</div><div class='ctx'> 	int retval;</div><div class='add'>+	u16 first_mapped;</div><div class='ctx'> 	u16 next_to_use;</div><div class='ctx'> 	u16 data_len;</div><div class='ctx'> 	u8 hdr_len;</div><div class='hunk'>@@ -2201,6 +2209,7 @@ static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,</div><div class='ctx'> 	buf_len -= skb-&gt;data_len;</div><div class='ctx'> 	nr_frags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='ctx'> 	next_to_use = atomic_read(&amp;tpd_ring-&gt;next_to_use);</div><div class='add'>+	first_mapped = next_to_use;</div><div class='ctx'> 	buffer_info = &amp;tpd_ring-&gt;buffer_info[next_to_use];</div><div class='ctx'> 	BUG_ON(buffer_info-&gt;skb);</div><div class='ctx'> 	/* put skb in last TPD */</div><div class='hunk'>@@ -2216,6 +2225,8 @@ static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,</div><div class='ctx'> 		buffer_info-&gt;dma = dma_map_page(&amp;adapter-&gt;pdev-&gt;dev, page,</div><div class='ctx'> 						offset, hdr_len,</div><div class='ctx'> 						DMA_TO_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev, buffer_info-&gt;dma))</div><div class='add'>+			goto dma_err;</div><div class='ctx'> </div><div class='ctx'> 		if (++next_to_use == tpd_ring-&gt;count)</div><div class='ctx'> 			next_to_use = 0;</div><div class='hunk'>@@ -2242,6 +2253,9 @@ static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,</div><div class='ctx'> 								page, offset,</div><div class='ctx'> 								buffer_info-&gt;length,</div><div class='ctx'> 								DMA_TO_DEVICE);</div><div class='add'>+				if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+						      buffer_info-&gt;dma))</div><div class='add'>+					goto dma_err;</div><div class='ctx'> 				if (++next_to_use == tpd_ring-&gt;count)</div><div class='ctx'> 					next_to_use = 0;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2254,6 +2268,8 @@ static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,</div><div class='ctx'> 		buffer_info-&gt;dma = dma_map_page(&amp;adapter-&gt;pdev-&gt;dev, page,</div><div class='ctx'> 						offset, buf_len,</div><div class='ctx'> 						DMA_TO_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev, buffer_info-&gt;dma))</div><div class='add'>+			goto dma_err;</div><div class='ctx'> 		if (++next_to_use == tpd_ring-&gt;count)</div><div class='ctx'> 			next_to_use = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2277,6 +2293,9 @@ static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,</div><div class='ctx'> 			buffer_info-&gt;dma = skb_frag_dma_map(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='ctx'> 				frag, i * ATL1_MAX_TX_BUF_LEN,</div><div class='ctx'> 				buffer_info-&gt;length, DMA_TO_DEVICE);</div><div class='add'>+			if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+					      buffer_info-&gt;dma))</div><div class='add'>+				goto dma_err;</div><div class='ctx'> </div><div class='ctx'> 			if (++next_to_use == tpd_ring-&gt;count)</div><div class='ctx'> 				next_to_use = 0;</div><div class='hunk'>@@ -2285,6 +2304,22 @@ static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	/* last tpd's buffer-info */</div><div class='ctx'> 	buffer_info-&gt;skb = skb;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+</div><div class='add'>+ dma_err:</div><div class='add'>+	while (first_mapped != next_to_use) {</div><div class='add'>+		buffer_info = &amp;tpd_ring-&gt;buffer_info[first_mapped];</div><div class='add'>+		dma_unmap_page(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+			       buffer_info-&gt;dma,</div><div class='add'>+			       buffer_info-&gt;length,</div><div class='add'>+			       DMA_TO_DEVICE);</div><div class='add'>+		buffer_info-&gt;dma = 0;</div><div class='add'>+</div><div class='add'>+		if (++first_mapped == tpd_ring-&gt;count)</div><div class='add'>+			first_mapped = 0;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void atl1_tx_queue(struct atl1_adapter *adapter, u16 count,</div><div class='hunk'>@@ -2355,10 +2390,8 @@ static netdev_tx_t atl1_xmit_frame(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	len = skb_headlen(skb);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(skb-&gt;len &lt;= 0)) {</div><div class='del'>-		dev_kfree_skb_any(skb);</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-	}</div><div class='add'>+	if (unlikely(skb-&gt;len &lt;= 0))</div><div class='add'>+		goto drop_packet;</div><div class='ctx'> </div><div class='ctx'> 	nr_frags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='ctx'> 	for (f = 0; f &lt; nr_frags; f++) {</div><div class='hunk'>@@ -2371,10 +2404,9 @@ static netdev_tx_t atl1_xmit_frame(struct sk_buff *skb,</div><div class='ctx'> 	if (mss) {</div><div class='ctx'> 		if (skb-&gt;protocol == htons(ETH_P_IP)) {</div><div class='ctx'> 			proto_hdr_len = skb_tcp_all_headers(skb);</div><div class='del'>-			if (unlikely(proto_hdr_len &gt; len)) {</div><div class='del'>-				dev_kfree_skb_any(skb);</div><div class='del'>-				return NETDEV_TX_OK;</div><div class='del'>-			}</div><div class='add'>+			if (unlikely(proto_hdr_len &gt; len))</div><div class='add'>+				goto drop_packet;</div><div class='add'>+</div><div class='ctx'> 			/* need additional TPD ? */</div><div class='ctx'> 			if (proto_hdr_len != len)</div><div class='ctx'> 				count += (len - proto_hdr_len +</div><div class='hunk'>@@ -2406,23 +2438,26 @@ static netdev_tx_t atl1_xmit_frame(struct sk_buff *skb,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tso = atl1_tso(adapter, skb, ptpd);</div><div class='del'>-	if (tso &lt; 0) {</div><div class='del'>-		dev_kfree_skb_any(skb);</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-	}</div><div class='add'>+	if (tso &lt; 0)</div><div class='add'>+		goto drop_packet;</div><div class='ctx'> </div><div class='ctx'> 	if (!tso) {</div><div class='ctx'> 		ret_val = atl1_tx_csum(adapter, skb, ptpd);</div><div class='del'>-		if (ret_val &lt; 0) {</div><div class='del'>-			dev_kfree_skb_any(skb);</div><div class='del'>-			return NETDEV_TX_OK;</div><div class='del'>-		}</div><div class='add'>+		if (ret_val &lt; 0)</div><div class='add'>+			goto drop_packet;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	atl1_tx_map(adapter, skb, ptpd);</div><div class='add'>+	if (!atl1_tx_map(adapter, skb, ptpd))</div><div class='add'>+		goto drop_packet;</div><div class='add'>+</div><div class='ctx'> 	atl1_tx_queue(adapter, count, ptpd);</div><div class='ctx'> 	atl1_update_mailbox(adapter);</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+drop_packet:</div><div class='add'>+	adapter-&gt;soft_stats.tx_errors++;</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int atl1_rings_clean(struct napi_struct *napi, int budget)</div><div class='hunk'>@@ -2556,8 +2591,8 @@ static irqreturn_t atl1_intr(int irq, void *data)</div><div class='ctx'>  */</div><div class='ctx'> static void atl1_phy_config(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct atl1_adapter *adapter = from_timer(adapter, t,</div><div class='del'>-						  phy_config_timer);</div><div class='add'>+	struct atl1_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							  phy_config_timer);</div><div class='ctx'> 	struct atl1_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -2641,7 +2676,7 @@ static void atl1_down(struct atl1_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	napi_disable(&amp;adapter-&gt;napi);</div><div class='ctx'> 	netif_stop_queue(netdev);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='ctx'> 	adapter-&gt;phy_timer_pending = false;</div><div class='ctx'> </div><div class='ctx'> 	atlx_irq_disable(adapter);</div><div class='head'>diff --git a/drivers/net/ethernet/atheros/atlx/atl2.c b/drivers/net/ethernet/atheros/atlx/atl2.c<br/>index fa9a4919f25d..280e2f5f4aa5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/atheros/atlx/atl2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/atheros/atlx/atl2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/atheros/atlx/atl2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/atheros/atlx/atl2.c</a></div><div class='hunk'>@@ -752,8 +752,8 @@ static void atl2_down(struct atl2_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	atl2_irq_disable(adapter);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='ctx'> 	clear_bit(0, &amp;adapter-&gt;cfg_phy);</div><div class='ctx'> </div><div class='ctx'> 	netif_carrier_off(netdev);</div><div class='hunk'>@@ -1010,7 +1010,8 @@ static void atl2_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='ctx'>  */</div><div class='ctx'> static void atl2_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct atl2_adapter *adapter = from_timer(adapter, t, watchdog_timer);</div><div class='add'>+	struct atl2_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							  watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(__ATL2_DOWN, &amp;adapter-&gt;flags)) {</div><div class='ctx'> 		u32 drop_rxd, drop_rxs;</div><div class='hunk'>@@ -1035,8 +1036,8 @@ static void atl2_watchdog(struct timer_list *t)</div><div class='ctx'>  */</div><div class='ctx'> static void atl2_phy_config(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct atl2_adapter *adapter = from_timer(adapter, t,</div><div class='del'>-						  phy_config_timer);</div><div class='add'>+	struct atl2_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							  phy_config_timer);</div><div class='ctx'> 	struct atl2_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -1468,8 +1469,8 @@ static void atl2_remove(struct pci_dev *pdev)</div><div class='ctx'> 	 * explicitly disable watchdog tasks from being rescheduled  */</div><div class='ctx'> 	set_bit(__ATL2_DOWN, &amp;adapter-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_config_timer);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;link_chg_task);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/Kconfig b/drivers/net/ethernet/broadcom/Kconfig<br/>index eeec8bf17cf4..666522d64775 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/Kconfig</a></div><div class='hunk'>@@ -25,6 +25,7 @@ config B44</div><div class='ctx'> 	select SSB</div><div class='ctx'> 	select MII</div><div class='ctx'> 	select PHYLIB</div><div class='add'>+	select FIXED_PHY if BCM47XX</div><div class='ctx'> 	help</div><div class='ctx'> 	  If you have a network (Ethernet) controller of this type, say Y</div><div class='ctx'> 	  or M here.</div><div class='hunk'>@@ -96,7 +97,6 @@ config BNX2</div><div class='ctx'> config CNIC</div><div class='ctx'> 	tristate "QLogic CNIC support"</div><div class='ctx'> 	depends on PCI &amp;&amp; (IPV6 || IPV6=n)</div><div class='del'>-	depends on MMU</div><div class='ctx'> 	select BNX2</div><div class='ctx'> 	select UIO</div><div class='ctx'> 	help</div><div class='hunk'>@@ -123,6 +123,7 @@ config TIGON3</div><div class='ctx'> 	tristate "Broadcom Tigon3 support"</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select CRC32</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Broadcom Tigon3 based gigabit Ethernet cards.</div><div class='hunk'>@@ -143,7 +144,7 @@ config BNX2X</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select FW_LOADER</div><div class='ctx'> 	select ZLIB_INFLATE</div><div class='del'>-	select LIBCRC32C</div><div class='add'>+	select CRC32</div><div class='ctx'> 	select MDIO</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Broadcom NetXtremeII 10 gigabit Ethernet cards.</div><div class='hunk'>@@ -207,7 +208,7 @@ config BNXT</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select FW_LOADER</div><div class='del'>-	select LIBCRC32C</div><div class='add'>+	select CRC32</div><div class='ctx'> 	select NET_DEVLINK</div><div class='ctx'> 	select PAGE_POOL</div><div class='ctx'> 	select DIMLIB</div><div class='hunk'>@@ -253,6 +254,16 @@ config BNXT_HWMON</div><div class='ctx'> 	  Say Y if you want to expose the thermal sensor data on NetXtreme-C/E</div><div class='ctx'> 	  devices, via the hwmon sysfs interface.</div><div class='ctx'> </div><div class='add'>+config BNGE</div><div class='add'>+	tristate "Broadcom Ethernet device support"</div><div class='add'>+	depends on PCI</div><div class='add'>+	select NET_DEVLINK</div><div class='add'>+	select PAGE_POOL</div><div class='add'>+	help</div><div class='add'>+	  This driver supports Broadcom 50/100/200/400/800 gigabit Ethernet cards.</div><div class='add'>+	  The module will be called bng_en. To compile this driver as a module,</div><div class='add'>+	  choose M here.</div><div class='add'>+</div><div class='ctx'> config BCMASP</div><div class='ctx'> 	tristate "Broadcom ASP 2.0 Ethernet support"</div><div class='ctx'> 	depends on ARCH_BRCMSTB || COMPILE_TEST</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/Makefile b/drivers/net/ethernet/broadcom/Makefile<br/>index bac5cb6ad0cd..10cc1c92ecfc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/Makefile</a></div><div class='hunk'>@@ -18,3 +18,4 @@ obj-$(CONFIG_BGMAC_PLATFORM) += bgmac-platform.o</div><div class='ctx'> obj-$(CONFIG_SYSTEMPORT) += bcmsysport.o</div><div class='ctx'> obj-$(CONFIG_BNXT) += bnxt/</div><div class='ctx'> obj-$(CONFIG_BCMASP) += asp2/</div><div class='add'>+obj-$(CONFIG_BNGE) += bnge/</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/asp2/bcmasp.c b/drivers/net/ethernet/broadcom/asp2/bcmasp.c<br/>index a68fab1b05f0..fd35f4b4dc50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/asp2/bcmasp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/asp2/bcmasp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/asp2/bcmasp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/asp2/bcmasp.c</a></div><div class='hunk'>@@ -141,7 +141,7 @@ void bcmasp_flush_rx_port(struct bcmasp_intf *intf)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rx_ctrl_core_wl(priv, mask, priv-&gt;hw_info-&gt;rx_ctrl_flush);</div><div class='add'>+	rx_ctrl_core_wl(priv, mask, ASP_RX_CTRL_FLUSH);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcmasp_netfilt_hw_en_wake(struct bcmasp_priv *priv,</div><div class='hunk'>@@ -518,7 +518,7 @@ void bcmasp_netfilt_suspend(struct bcmasp_intf *intf)</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	/* Write all filters to HW */</div><div class='del'>-	for (i = 0; i &lt; NUM_NET_FILTERS; i++) {</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_net_filters; i++) {</div><div class='ctx'> 		/* If the filter does not match the port, skip programming. */</div><div class='ctx'> 		if (!priv-&gt;net_filters[i].claimed ||</div><div class='ctx'> 		    priv-&gt;net_filters[i].port != intf-&gt;port)</div><div class='hunk'>@@ -551,7 +551,7 @@ int bcmasp_netfilt_get_all_active(struct bcmasp_intf *intf, u32 *rule_locs,</div><div class='ctx'> 	struct bcmasp_priv *priv = intf-&gt;parent;</div><div class='ctx'> 	int j = 0, i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; NUM_NET_FILTERS; i++) {</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_net_filters; i++) {</div><div class='ctx'> 		if (!priv-&gt;net_filters[i].claimed ||</div><div class='ctx'> 		    priv-&gt;net_filters[i].port != intf-&gt;port)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -577,7 +577,7 @@ int bcmasp_netfilt_get_active(struct bcmasp_intf *intf)</div><div class='ctx'> 	struct bcmasp_priv *priv = intf-&gt;parent;</div><div class='ctx'> 	int cnt = 0, i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; NUM_NET_FILTERS; i++) {</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_net_filters; i++) {</div><div class='ctx'> 		if (!priv-&gt;net_filters[i].claimed ||</div><div class='ctx'> 		    priv-&gt;net_filters[i].port != intf-&gt;port)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -602,7 +602,7 @@ bool bcmasp_netfilt_check_dup(struct bcmasp_intf *intf,</div><div class='ctx'> 	size_t fs_size = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; NUM_NET_FILTERS; i++) {</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_net_filters; i++) {</div><div class='ctx'> 		if (!priv-&gt;net_filters[i].claimed ||</div><div class='ctx'> 		    priv-&gt;net_filters[i].port != intf-&gt;port)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -670,7 +670,7 @@ struct bcmasp_net_filter *bcmasp_netfilt_get_init(struct bcmasp_intf *intf,</div><div class='ctx'> 	int i, open_index = -1;</div><div class='ctx'> </div><div class='ctx'> 	/* Check whether we exceed the filter table capacity */</div><div class='del'>-	if (loc != RX_CLS_LOC_ANY &amp;&amp; loc &gt;= NUM_NET_FILTERS)</div><div class='add'>+	if (loc != RX_CLS_LOC_ANY &amp;&amp; loc &gt;= priv-&gt;num_net_filters)</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='ctx'> 	/* If the filter location is busy (already claimed) and we are initializing</div><div class='hunk'>@@ -686,7 +686,7 @@ struct bcmasp_net_filter *bcmasp_netfilt_get_init(struct bcmasp_intf *intf,</div><div class='ctx'> 	/* Initialize the loop index based on the desired location or from 0 */</div><div class='ctx'> 	i = loc == RX_CLS_LOC_ANY ? 0 : loc;</div><div class='ctx'> </div><div class='del'>-	for ( ; i &lt; NUM_NET_FILTERS; i++) {</div><div class='add'>+	for ( ; i &lt; priv-&gt;num_net_filters; i++) {</div><div class='ctx'> 		/* Found matching network filter */</div><div class='ctx'> 		if (!init &amp;&amp;</div><div class='ctx'> 		    priv-&gt;net_filters[i].claimed &amp;&amp;</div><div class='hunk'>@@ -779,7 +779,7 @@ static void bcmasp_en_mda_filter(struct bcmasp_intf *intf, bool en,</div><div class='ctx'> 	priv-&gt;mda_filters[i].en = en;</div><div class='ctx'> 	priv-&gt;mda_filters[i].port = intf-&gt;port;</div><div class='ctx'> </div><div class='del'>-	rx_filter_core_wl(priv, ((intf-&gt;channel + 8) |</div><div class='add'>+	rx_filter_core_wl(priv, ((intf-&gt;channel + priv-&gt;tx_chan_offset) |</div><div class='ctx'> 			  (en &lt;&lt; ASP_RX_FILTER_MDA_CFG_EN_SHIFT) |</div><div class='ctx'> 			  ASP_RX_FILTER_MDA_CFG_UMC_SEL(intf-&gt;port)),</div><div class='ctx'> 			  ASP_RX_FILTER_MDA_CFG(i));</div><div class='hunk'>@@ -865,7 +865,7 @@ void bcmasp_disable_all_filters(struct bcmasp_intf *intf)</div><div class='ctx'> 	res_count = bcmasp_total_res_mda_cnt(intf-&gt;parent);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable all filters held by this port */</div><div class='del'>-	for (i = res_count; i &lt; NUM_MDA_FILTERS; i++) {</div><div class='add'>+	for (i = res_count; i &lt; priv-&gt;num_mda_filters; i++) {</div><div class='ctx'> 		if (priv-&gt;mda_filters[i].en &amp;&amp;</div><div class='ctx'> 		    priv-&gt;mda_filters[i].port == intf-&gt;port)</div><div class='ctx'> 			bcmasp_en_mda_filter(intf, 0, i);</div><div class='hunk'>@@ -909,7 +909,7 @@ int bcmasp_set_en_mda_filter(struct bcmasp_intf *intf, unsigned char *addr,</div><div class='ctx'> </div><div class='ctx'> 	res_count = bcmasp_total_res_mda_cnt(intf-&gt;parent);</div><div class='ctx'> </div><div class='del'>-	for (i = res_count; i &lt; NUM_MDA_FILTERS; i++) {</div><div class='add'>+	for (i = res_count; i &lt; priv-&gt;num_mda_filters; i++) {</div><div class='ctx'> 		/* If filter not enabled or belongs to another port skip */</div><div class='ctx'> 		if (!priv-&gt;mda_filters[i].en ||</div><div class='ctx'> 		    priv-&gt;mda_filters[i].port != intf-&gt;port)</div><div class='hunk'>@@ -924,7 +924,7 @@ int bcmasp_set_en_mda_filter(struct bcmasp_intf *intf, unsigned char *addr,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Create new filter if possible */</div><div class='del'>-	for (i = res_count; i &lt; NUM_MDA_FILTERS; i++) {</div><div class='add'>+	for (i = res_count; i &lt; priv-&gt;num_mda_filters; i++) {</div><div class='ctx'> 		if (priv-&gt;mda_filters[i].en)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -944,12 +944,12 @@ static void bcmasp_core_init_filters(struct bcmasp_priv *priv)</div><div class='ctx'> 	/* Disable all filters and reset software view since the HW</div><div class='ctx'> 	 * can lose context while in deep sleep suspend states</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; NUM_MDA_FILTERS; i++) {</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_mda_filters; i++) {</div><div class='ctx'> 		rx_filter_core_wl(priv, 0x0, ASP_RX_FILTER_MDA_CFG(i));</div><div class='ctx'> 		priv-&gt;mda_filters[i].en = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; NUM_NET_FILTERS; i++)</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_net_filters; i++)</div><div class='ctx'> 		rx_filter_core_wl(priv, 0x0, ASP_RX_FILTER_NET_CFG(i));</div><div class='ctx'> </div><div class='ctx'> 	/* Top level filter enable bit should be enabled at all times, set</div><div class='hunk'>@@ -966,18 +966,8 @@ static void bcmasp_core_init_filters(struct bcmasp_priv *priv)</div><div class='ctx'> /* ASP core initialization */</div><div class='ctx'> static void bcmasp_core_init(struct bcmasp_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	tx_analytics_core_wl(priv, 0x0, ASP_TX_ANALYTICS_CTRL);</div><div class='del'>-	rx_analytics_core_wl(priv, 0x4, ASP_RX_ANALYTICS_CTRL);</div><div class='del'>-</div><div class='del'>-	rx_edpkt_core_wl(priv, (ASP_EDPKT_HDR_SZ_128 &lt;&lt; ASP_EDPKT_HDR_SZ_SHIFT),</div><div class='del'>-			 ASP_EDPKT_HDR_CFG);</div><div class='del'>-	rx_edpkt_core_wl(priv,</div><div class='del'>-			 (ASP_EDPKT_ENDI_BT_SWP_WD &lt;&lt; ASP_EDPKT_ENDI_DESC_SHIFT),</div><div class='del'>-			 ASP_EDPKT_ENDI);</div><div class='del'>-</div><div class='ctx'> 	rx_edpkt_core_wl(priv, 0x1b, ASP_EDPKT_BURST_BUF_PSCAL_TOUT);</div><div class='ctx'> 	rx_edpkt_core_wl(priv, 0x3e8, ASP_EDPKT_BURST_BUF_WRITE_TOUT);</div><div class='del'>-	rx_edpkt_core_wl(priv, 0x3e8, ASP_EDPKT_BURST_BUF_READ_TOUT);</div><div class='ctx'> </div><div class='ctx'> 	rx_edpkt_core_wl(priv, ASP_EDPKT_ENABLE_EN, ASP_EDPKT_ENABLE);</div><div class='ctx'> </div><div class='hunk'>@@ -1020,6 +1010,18 @@ static void bcmasp_core_clock_select_one(struct bcmasp_priv *priv, bool slow)</div><div class='ctx'> 	ctrl_core_wl(priv, reg, ASP_CTRL_CORE_CLOCK_SELECT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bcmasp_core_clock_select_one_ctrl2(struct bcmasp_priv *priv, bool slow)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = ctrl2_core_rl(priv, ASP_CTRL2_CORE_CLOCK_SELECT);</div><div class='add'>+	if (slow)</div><div class='add'>+		reg &amp;= ~ASP_CTRL2_CORE_CLOCK_SELECT_MAIN;</div><div class='add'>+	else</div><div class='add'>+		reg |= ASP_CTRL2_CORE_CLOCK_SELECT_MAIN;</div><div class='add'>+	ctrl2_core_wl(priv, reg, ASP_CTRL2_CORE_CLOCK_SELECT);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bcmasp_core_clock_set_ll(struct bcmasp_priv *priv, u32 clr, u32 set)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg;</div><div class='hunk'>@@ -1108,7 +1110,7 @@ static int bcmasp_get_and_request_irq(struct bcmasp_priv *priv, int i)</div><div class='ctx'> 	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcmasp_init_wol_shared(struct bcmasp_priv *priv)</div><div class='add'>+static void bcmasp_init_wol(struct bcmasp_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev = priv-&gt;pdev;</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -1125,7 +1127,7 @@ static void bcmasp_init_wol_shared(struct bcmasp_priv *priv)</div><div class='ctx'> 	device_set_wakeup_capable(&amp;pdev-&gt;dev, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcmasp_enable_wol_shared(struct bcmasp_intf *intf, bool en)</div><div class='add'>+void bcmasp_enable_wol(struct bcmasp_intf *intf, bool en)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmasp_priv *priv = intf-&gt;parent;</div><div class='ctx'> 	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='hunk'>@@ -1154,54 +1156,12 @@ static void bcmasp_enable_wol_shared(struct bcmasp_intf *intf, bool en)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcmasp_wol_irq_destroy_shared(struct bcmasp_priv *priv)</div><div class='add'>+static void bcmasp_wol_irq_destroy(struct bcmasp_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	if (priv-&gt;wol_irq &gt; 0)</div><div class='ctx'> 		free_irq(priv-&gt;wol_irq, priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcmasp_init_wol_per_intf(struct bcmasp_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct platform_device *pdev = priv-&gt;pdev;</div><div class='del'>-	struct device *dev = &amp;pdev-&gt;dev;</div><div class='del'>-	struct bcmasp_intf *intf;</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(intf, &amp;priv-&gt;intfs, list) {</div><div class='del'>-		irq = bcmasp_get_and_request_irq(priv, intf-&gt;port + 1);</div><div class='del'>-		if (irq &lt; 0) {</div><div class='del'>-			dev_warn(dev, "Failed to init WoL irq(port %d): %d\n",</div><div class='del'>-				 intf-&gt;port, irq);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		intf-&gt;wol_irq = irq;</div><div class='del'>-		intf-&gt;wol_irq_enabled = false;</div><div class='del'>-		device_set_wakeup_capable(&amp;pdev-&gt;dev, 1);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bcmasp_enable_wol_per_intf(struct bcmasp_intf *intf, bool en)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;intf-&gt;parent-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (en ^ intf-&gt;wol_irq_enabled)</div><div class='del'>-		irq_set_irq_wake(intf-&gt;wol_irq, en);</div><div class='del'>-</div><div class='del'>-	intf-&gt;wol_irq_enabled = en;</div><div class='del'>-	device_set_wakeup_enable(dev, en);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bcmasp_wol_irq_destroy_per_intf(struct bcmasp_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct bcmasp_intf *intf;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(intf, &amp;priv-&gt;intfs, list) {</div><div class='del'>-		if (intf-&gt;wol_irq &gt; 0)</div><div class='del'>-			free_irq(intf-&gt;wol_irq, priv);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void bcmasp_eee_fixup(struct bcmasp_intf *intf, bool en)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg, phy_lpi_overwrite;</div><div class='hunk'>@@ -1220,70 +1180,53 @@ static void bcmasp_eee_fixup(struct bcmasp_intf *intf, bool en)</div><div class='ctx'> 	usleep_range(50, 100);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct bcmasp_hw_info v20_hw_info = {</div><div class='del'>-	.rx_ctrl_flush = ASP_RX_CTRL_FLUSH,</div><div class='del'>-	.umac2fb = UMAC2FB_OFFSET,</div><div class='del'>-	.rx_ctrl_fb_out_frame_count = ASP_RX_CTRL_FB_OUT_FRAME_COUNT,</div><div class='del'>-	.rx_ctrl_fb_filt_out_frame_count = ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT,</div><div class='del'>-	.rx_ctrl_fb_rx_fifo_depth = ASP_RX_CTRL_FB_RX_FIFO_DEPTH,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct bcmasp_plat_data v20_plat_data = {</div><div class='del'>-	.init_wol = bcmasp_init_wol_per_intf,</div><div class='del'>-	.enable_wol = bcmasp_enable_wol_per_intf,</div><div class='del'>-	.destroy_wol = bcmasp_wol_irq_destroy_per_intf,</div><div class='del'>-	.core_clock_select = bcmasp_core_clock_select_one,</div><div class='del'>-	.hw_info = &amp;v20_hw_info,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct bcmasp_hw_info v21_hw_info = {</div><div class='del'>-	.rx_ctrl_flush = ASP_RX_CTRL_FLUSH_2_1,</div><div class='del'>-	.umac2fb = UMAC2FB_OFFSET_2_1,</div><div class='del'>-	.rx_ctrl_fb_out_frame_count = ASP_RX_CTRL_FB_OUT_FRAME_COUNT_2_1,</div><div class='del'>-	.rx_ctrl_fb_filt_out_frame_count =</div><div class='del'>-		ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT_2_1,</div><div class='del'>-	.rx_ctrl_fb_rx_fifo_depth = ASP_RX_CTRL_FB_RX_FIFO_DEPTH_2_1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct bcmasp_plat_data v21_plat_data = {</div><div class='del'>-	.init_wol = bcmasp_init_wol_shared,</div><div class='del'>-	.enable_wol = bcmasp_enable_wol_shared,</div><div class='del'>-	.destroy_wol = bcmasp_wol_irq_destroy_shared,</div><div class='ctx'> 	.core_clock_select = bcmasp_core_clock_select_one,</div><div class='del'>-	.hw_info = &amp;v21_hw_info,</div><div class='add'>+	.num_mda_filters = 32,</div><div class='add'>+	.num_net_filters = 32,</div><div class='add'>+	.tx_chan_offset = 8,</div><div class='add'>+	.rx_ctrl_offset = 0x0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bcmasp_plat_data v22_plat_data = {</div><div class='del'>-	.init_wol = bcmasp_init_wol_shared,</div><div class='del'>-	.enable_wol = bcmasp_enable_wol_shared,</div><div class='del'>-	.destroy_wol = bcmasp_wol_irq_destroy_shared,</div><div class='ctx'> 	.core_clock_select = bcmasp_core_clock_select_many,</div><div class='del'>-	.hw_info = &amp;v21_hw_info,</div><div class='ctx'> 	.eee_fixup = bcmasp_eee_fixup,</div><div class='add'>+	.num_mda_filters = 32,</div><div class='add'>+	.num_net_filters = 32,</div><div class='add'>+	.tx_chan_offset = 8,</div><div class='add'>+	.rx_ctrl_offset = 0x0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct bcmasp_plat_data v30_plat_data = {</div><div class='add'>+	.core_clock_select = bcmasp_core_clock_select_one_ctrl2,</div><div class='add'>+	.num_mda_filters = 20,</div><div class='add'>+	.num_net_filters = 16,</div><div class='add'>+	.tx_chan_offset = 0,</div><div class='add'>+	.rx_ctrl_offset = 0x10000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void bcmasp_set_pdata(struct bcmasp_priv *priv, const struct bcmasp_plat_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	priv-&gt;init_wol = pdata-&gt;init_wol;</div><div class='del'>-	priv-&gt;enable_wol = pdata-&gt;enable_wol;</div><div class='del'>-	priv-&gt;destroy_wol = pdata-&gt;destroy_wol;</div><div class='ctx'> 	priv-&gt;core_clock_select = pdata-&gt;core_clock_select;</div><div class='ctx'> 	priv-&gt;eee_fixup = pdata-&gt;eee_fixup;</div><div class='del'>-	priv-&gt;hw_info = pdata-&gt;hw_info;</div><div class='add'>+	priv-&gt;num_mda_filters = pdata-&gt;num_mda_filters;</div><div class='add'>+	priv-&gt;num_net_filters = pdata-&gt;num_net_filters;</div><div class='add'>+	priv-&gt;tx_chan_offset = pdata-&gt;tx_chan_offset;</div><div class='add'>+	priv-&gt;rx_ctrl_offset = pdata-&gt;rx_ctrl_offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id bcmasp_of_match[] = {</div><div class='del'>-	{ .compatible = "brcm,asp-v2.0", .data = &amp;v20_plat_data },</div><div class='ctx'> 	{ .compatible = "brcm,asp-v2.1", .data = &amp;v21_plat_data },</div><div class='ctx'> 	{ .compatible = "brcm,asp-v2.2", .data = &amp;v22_plat_data },</div><div class='add'>+	{ .compatible = "brcm,asp-v3.0", .data = &amp;v30_plat_data },</div><div class='ctx'> 	{ /* sentinel */ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, bcmasp_of_match);</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id bcmasp_mdio_of_match[] = {</div><div class='del'>-	{ .compatible = "brcm,asp-v2.2-mdio", },</div><div class='ctx'> 	{ .compatible = "brcm,asp-v2.1-mdio", },</div><div class='del'>-	{ .compatible = "brcm,asp-v2.0-mdio", },</div><div class='add'>+	{ .compatible = "brcm,asp-v2.2-mdio", },</div><div class='add'>+	{ .compatible = "brcm,asp-v3.0-mdio", },</div><div class='ctx'> 	{ /* sentinel */ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, bcmasp_mdio_of_match);</div><div class='hunk'>@@ -1365,6 +1308,17 @@ static int bcmasp_probe(struct platform_device *pdev)</div><div class='ctx'> 	 * how many interfaces come up.</div><div class='ctx'> 	 */</div><div class='ctx'> 	bcmasp_core_init(priv);</div><div class='add'>+</div><div class='add'>+	priv-&gt;mda_filters = devm_kcalloc(dev, priv-&gt;num_mda_filters,</div><div class='add'>+					 sizeof(*priv-&gt;mda_filters), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;mda_filters)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;net_filters = devm_kcalloc(dev, priv-&gt;num_net_filters,</div><div class='add'>+					 sizeof(*priv-&gt;net_filters), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;net_filters)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	bcmasp_core_init_filters(priv);</div><div class='ctx'> </div><div class='ctx'> 	ports_node = of_find_node_by_name(dev-&gt;of_node, "ethernet-ports");</div><div class='hunk'>@@ -1387,7 +1341,7 @@ static int bcmasp_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check and enable WoL */</div><div class='del'>-	priv-&gt;init_wol(priv);</div><div class='add'>+	bcmasp_init_wol(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Drop the clock reference count now and let ndo_open()/ndo_close()</div><div class='ctx'> 	 * manage it for us from now on.</div><div class='hunk'>@@ -1404,7 +1358,7 @@ static int bcmasp_probe(struct platform_device *pdev)</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			netdev_err(intf-&gt;ndev,</div><div class='ctx'> 				   "failed to register net_device: %d\n", ret);</div><div class='del'>-			priv-&gt;destroy_wol(priv);</div><div class='add'>+			bcmasp_wol_irq_destroy(priv);</div><div class='ctx'> 			bcmasp_remove_intfs(priv);</div><div class='ctx'> 			goto of_put_exit;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1425,7 +1379,7 @@ static void bcmasp_remove(struct platform_device *pdev)</div><div class='ctx'> 	if (!priv)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;destroy_wol(priv);</div><div class='add'>+	bcmasp_wol_irq_destroy(priv);</div><div class='ctx'> 	bcmasp_remove_intfs(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/asp2/bcmasp.h b/drivers/net/ethernet/broadcom/asp2/bcmasp.h<br/>index f93cb3da44b0..74adfdb50e11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/asp2/bcmasp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/asp2/bcmasp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/asp2/bcmasp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/asp2/bcmasp.h</a></div><div class='hunk'>@@ -53,22 +53,15 @@</div><div class='ctx'> #define ASP_RX_CTRL_FB_0_FRAME_COUNT		0x14</div><div class='ctx'> #define ASP_RX_CTRL_FB_1_FRAME_COUNT		0x18</div><div class='ctx'> #define ASP_RX_CTRL_FB_8_FRAME_COUNT		0x1c</div><div class='del'>-/* asp2.1 diverges offsets here */</div><div class='del'>-/* ASP2.0 */</div><div class='del'>-#define ASP_RX_CTRL_FB_OUT_FRAME_COUNT		0x20</div><div class='del'>-#define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT	0x24</div><div class='del'>-#define ASP_RX_CTRL_FLUSH			0x28</div><div class='del'>-#define  ASP_CTRL_UMAC0_FLUSH_MASK		(BIT(0) | BIT(12))</div><div class='del'>-#define  ASP_CTRL_UMAC1_FLUSH_MASK		(BIT(1) | BIT(13))</div><div class='del'>-#define  ASP_CTRL_SPB_FLUSH_MASK		(BIT(8) | BIT(20))</div><div class='del'>-#define ASP_RX_CTRL_FB_RX_FIFO_DEPTH		0x30</div><div class='del'>-/* ASP2.1 */</div><div class='del'>-#define ASP_RX_CTRL_FB_9_FRAME_COUNT_2_1	0x20</div><div class='del'>-#define ASP_RX_CTRL_FB_10_FRAME_COUNT_2_1	0x24</div><div class='del'>-#define ASP_RX_CTRL_FB_OUT_FRAME_COUNT_2_1	0x28</div><div class='del'>-#define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT_2_1	0x2c</div><div class='del'>-#define ASP_RX_CTRL_FLUSH_2_1			0x30</div><div class='del'>-#define ASP_RX_CTRL_FB_RX_FIFO_DEPTH_2_1	0x38</div><div class='add'>+#define ASP_RX_CTRL_FB_9_FRAME_COUNT		0x20</div><div class='add'>+#define ASP_RX_CTRL_FB_10_FRAME_COUNT		0x24</div><div class='add'>+#define ASP_RX_CTRL_FB_OUT_FRAME_COUNT		0x28</div><div class='add'>+#define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT	0x2c</div><div class='add'>+#define ASP_RX_CTRL_FLUSH			0x30</div><div class='add'>+#define  ASP_CTRL_UMAC0_FLUSH_MASK             (BIT(0) | BIT(12))</div><div class='add'>+#define  ASP_CTRL_UMAC1_FLUSH_MASK             (BIT(1) | BIT(13))</div><div class='add'>+#define  ASP_CTRL_SPB_FLUSH_MASK               (BIT(8) | BIT(20))</div><div class='add'>+#define ASP_RX_CTRL_FB_RX_FIFO_DEPTH		0x38</div><div class='ctx'> </div><div class='ctx'> #define ASP_RX_FILTER_OFFSET			0x80000</div><div class='ctx'> #define  ASP_RX_FILTER_BLK_CTRL			0x0</div><div class='hunk'>@@ -345,11 +338,6 @@ struct bcmasp_intf {</div><div class='ctx'> </div><div class='ctx'> 	u32				wolopts;</div><div class='ctx'> 	u8				sopass[SOPASS_MAX];</div><div class='del'>-	/* Used if per intf wol irq */</div><div class='del'>-	int				wol_irq;</div><div class='del'>-	unsigned int			wol_irq_enabled:1;</div><div class='del'>-</div><div class='del'>-	struct ethtool_keee		eee;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define NUM_NET_FILTERS				32</div><div class='hunk'>@@ -372,21 +360,13 @@ struct bcmasp_mda_filter {</div><div class='ctx'> 	u8		mask[ETH_ALEN];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct bcmasp_hw_info {</div><div class='del'>-	u32		rx_ctrl_flush;</div><div class='del'>-	u32		umac2fb;</div><div class='del'>-	u32		rx_ctrl_fb_out_frame_count;</div><div class='del'>-	u32		rx_ctrl_fb_filt_out_frame_count;</div><div class='del'>-	u32		rx_ctrl_fb_rx_fifo_depth;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct bcmasp_plat_data {</div><div class='del'>-	void (*init_wol)(struct bcmasp_priv *priv);</div><div class='del'>-	void (*enable_wol)(struct bcmasp_intf *intf, bool en);</div><div class='del'>-	void (*destroy_wol)(struct bcmasp_priv *priv);</div><div class='ctx'> 	void (*core_clock_select)(struct bcmasp_priv *priv, bool slow);</div><div class='ctx'> 	void (*eee_fixup)(struct bcmasp_intf *priv, bool en);</div><div class='del'>-	struct bcmasp_hw_info		*hw_info;</div><div class='add'>+	unsigned int num_mda_filters;</div><div class='add'>+	unsigned int num_net_filters;</div><div class='add'>+	unsigned int tx_chan_offset;</div><div class='add'>+	unsigned int rx_ctrl_offset;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bcmasp_priv {</div><div class='hunk'>@@ -401,18 +381,18 @@ struct bcmasp_priv {</div><div class='ctx'> 	int				wol_irq;</div><div class='ctx'> 	unsigned long			wol_irq_enabled_mask;</div><div class='ctx'> </div><div class='del'>-	void (*init_wol)(struct bcmasp_priv *priv);</div><div class='del'>-	void (*enable_wol)(struct bcmasp_intf *intf, bool en);</div><div class='del'>-	void (*destroy_wol)(struct bcmasp_priv *priv);</div><div class='ctx'> 	void (*core_clock_select)(struct bcmasp_priv *priv, bool slow);</div><div class='ctx'> 	void (*eee_fixup)(struct bcmasp_intf *intf, bool en);</div><div class='add'>+	unsigned int			num_mda_filters;</div><div class='add'>+	unsigned int			num_net_filters;</div><div class='add'>+	unsigned int			tx_chan_offset;</div><div class='add'>+	unsigned int			rx_ctrl_offset;</div><div class='ctx'> </div><div class='ctx'> 	void __iomem			*base;</div><div class='del'>-	struct	bcmasp_hw_info		*hw_info;</div><div class='ctx'> </div><div class='ctx'> 	struct list_head		intfs;</div><div class='ctx'> </div><div class='del'>-	struct bcmasp_mda_filter	mda_filters[NUM_MDA_FILTERS];</div><div class='add'>+	struct bcmasp_mda_filter	*mda_filters;</div><div class='ctx'> </div><div class='ctx'> 	/* MAC destination address filters lock */</div><div class='ctx'> 	spinlock_t			mda_lock;</div><div class='hunk'>@@ -420,7 +400,7 @@ struct bcmasp_priv {</div><div class='ctx'> 	/* Protects accesses to ASP_CTRL_CLOCK_CTRL */</div><div class='ctx'> 	spinlock_t			clk_lock;</div><div class='ctx'> </div><div class='del'>-	struct bcmasp_net_filter	net_filters[NUM_NET_FILTERS];</div><div class='add'>+	struct bcmasp_net_filter	*net_filters;</div><div class='ctx'> </div><div class='ctx'> 	/* Network filter lock */</div><div class='ctx'> 	struct mutex			net_lock;</div><div class='hunk'>@@ -510,8 +490,8 @@ BCMASP_FP_IO_MACRO_Q(rx_edpkt_cfg);</div><div class='ctx'> #define  PKT_OFFLOAD_EPKT_IP(x)		((x) &lt;&lt; 21)</div><div class='ctx'> #define  PKT_OFFLOAD_EPKT_TP(x)		((x) &lt;&lt; 19)</div><div class='ctx'> #define  PKT_OFFLOAD_EPKT_LEN(x)	((x) &lt;&lt; 16)</div><div class='del'>-#define  PKT_OFFLOAD_EPKT_CSUM_L3	BIT(15)</div><div class='del'>-#define  PKT_OFFLOAD_EPKT_CSUM_L2	BIT(14)</div><div class='add'>+#define  PKT_OFFLOAD_EPKT_CSUM_L4	BIT(15)</div><div class='add'>+#define  PKT_OFFLOAD_EPKT_CSUM_L3	BIT(14)</div><div class='ctx'> #define  PKT_OFFLOAD_EPKT_ID(x)		((x) &lt;&lt; 12)</div><div class='ctx'> #define  PKT_OFFLOAD_EPKT_SEQ(x)	((x) &lt;&lt; 10)</div><div class='ctx'> #define  PKT_OFFLOAD_EPKT_TS(x)		((x) &lt;&lt; 8)</div><div class='hunk'>@@ -543,12 +523,27 @@ BCMASP_CORE_IO_MACRO(intr2, ASP_INTR2_OFFSET);</div><div class='ctx'> BCMASP_CORE_IO_MACRO(wakeup_intr2, ASP_WAKEUP_INTR2_OFFSET);</div><div class='ctx'> BCMASP_CORE_IO_MACRO(tx_analytics, ASP_TX_ANALYTICS_OFFSET);</div><div class='ctx'> BCMASP_CORE_IO_MACRO(rx_analytics, ASP_RX_ANALYTICS_OFFSET);</div><div class='del'>-BCMASP_CORE_IO_MACRO(rx_ctrl, ASP_RX_CTRL_OFFSET);</div><div class='ctx'> BCMASP_CORE_IO_MACRO(rx_filter, ASP_RX_FILTER_OFFSET);</div><div class='ctx'> BCMASP_CORE_IO_MACRO(rx_edpkt, ASP_EDPKT_OFFSET);</div><div class='ctx'> BCMASP_CORE_IO_MACRO(ctrl, ASP_CTRL_OFFSET);</div><div class='ctx'> BCMASP_CORE_IO_MACRO(ctrl2, ASP_CTRL2_OFFSET);</div><div class='ctx'> </div><div class='add'>+#define BCMASP_CORE_IO_MACRO_OFFSET(name, offset)			\</div><div class='add'>+static inline u32 name##_core_rl(struct bcmasp_priv *priv,		\</div><div class='add'>+				 u32 off)				\</div><div class='add'>+{									\</div><div class='add'>+	u32 reg = readl_relaxed(priv-&gt;base + priv-&gt;name##_offset +	\</div><div class='add'>+				(offset) + off);			\</div><div class='add'>+	return reg;							\</div><div class='add'>+}									\</div><div class='add'>+static inline void name##_core_wl(struct bcmasp_priv *priv,		\</div><div class='add'>+				  u32 val, u32 off)			\</div><div class='add'>+{									\</div><div class='add'>+	writel_relaxed(val, priv-&gt;base + priv-&gt;name##_offset +		\</div><div class='add'>+		       (offset) + off);					\</div><div class='add'>+}</div><div class='add'>+BCMASP_CORE_IO_MACRO_OFFSET(rx_ctrl, ASP_RX_CTRL_OFFSET);</div><div class='add'>+</div><div class='ctx'> struct bcmasp_intf *bcmasp_interface_create(struct bcmasp_priv *priv,</div><div class='ctx'> 					    struct device_node *ndev_dn, int i);</div><div class='ctx'> </div><div class='hunk'>@@ -601,5 +596,5 @@ int bcmasp_netfilt_get_all_active(struct bcmasp_intf *intf, u32 *rule_locs,</div><div class='ctx'> </div><div class='ctx'> void bcmasp_netfilt_suspend(struct bcmasp_intf *intf);</div><div class='ctx'> </div><div class='del'>-void bcmasp_eee_enable_set(struct bcmasp_intf *intf, bool enable);</div><div class='add'>+void bcmasp_enable_wol(struct bcmasp_intf *intf, bool en);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c b/drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c<br/>index 67928b5d8a26..dd80ccfca19d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> #include "bcmasp_intf_defs.h"</div><div class='ctx'> </div><div class='ctx'> enum bcmasp_stat_type {</div><div class='del'>-	BCMASP_STAT_RX_EDPKT,</div><div class='ctx'> 	BCMASP_STAT_RX_CTRL,</div><div class='ctx'> 	BCMASP_STAT_RX_CTRL_PER_INTF,</div><div class='ctx'> 	BCMASP_STAT_SOFT,</div><div class='hunk'>@@ -33,8 +32,6 @@ struct bcmasp_stats {</div><div class='ctx'> 	.reg_offset = offset, \</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define STAT_BCMASP_RX_EDPKT(str, offset) \</div><div class='del'>-	STAT_BCMASP_OFFSET(str, BCMASP_STAT_RX_EDPKT, offset)</div><div class='ctx'> #define STAT_BCMASP_RX_CTRL(str, offset) \</div><div class='ctx'> 	STAT_BCMASP_OFFSET(str, BCMASP_STAT_RX_CTRL, offset)</div><div class='ctx'> #define STAT_BCMASP_RX_CTRL_PER_INTF(str, offset) \</div><div class='hunk'>@@ -42,11 +39,6 @@ struct bcmasp_stats {</div><div class='ctx'> </div><div class='ctx'> /* Must match the order of struct bcmasp_mib_counters */</div><div class='ctx'> static const struct bcmasp_stats bcmasp_gstrings_stats[] = {</div><div class='del'>-	/* EDPKT counters */</div><div class='del'>-	STAT_BCMASP_RX_EDPKT("RX Time Stamp", ASP_EDPKT_RX_TS_COUNTER),</div><div class='del'>-	STAT_BCMASP_RX_EDPKT("RX PKT Count", ASP_EDPKT_RX_PKT_CNT),</div><div class='del'>-	STAT_BCMASP_RX_EDPKT("RX PKT Buffered", ASP_EDPKT_HDR_EXTR_CNT),</div><div class='del'>-	STAT_BCMASP_RX_EDPKT("RX PKT Pushed to DRAM", ASP_EDPKT_HDR_OUT_CNT),</div><div class='ctx'> 	/* ASP RX control */</div><div class='ctx'> 	STAT_BCMASP_RX_CTRL_PER_INTF("Frames From Unimac",</div><div class='ctx'> 				     ASP_RX_CTRL_UMAC_0_FRAME_COUNT),</div><div class='hunk'>@@ -71,23 +63,6 @@ static const struct bcmasp_stats bcmasp_gstrings_stats[] = {</div><div class='ctx'> </div><div class='ctx'> #define BCMASP_STATS_LEN	ARRAY_SIZE(bcmasp_gstrings_stats)</div><div class='ctx'> </div><div class='del'>-static u16 bcmasp_stat_fixup_offset(struct bcmasp_intf *intf,</div><div class='del'>-				    const struct bcmasp_stats *s)</div><div class='del'>-{</div><div class='del'>-	struct bcmasp_priv *priv = intf-&gt;parent;</div><div class='del'>-</div><div class='del'>-	if (!strcmp("Frames Out(Buffer)", s-&gt;stat_string))</div><div class='del'>-		return priv-&gt;hw_info-&gt;rx_ctrl_fb_out_frame_count;</div><div class='del'>-</div><div class='del'>-	if (!strcmp("Frames Out(Filters)", s-&gt;stat_string))</div><div class='del'>-		return priv-&gt;hw_info-&gt;rx_ctrl_fb_filt_out_frame_count;</div><div class='del'>-</div><div class='del'>-	if (!strcmp("RX Buffer FIFO Depth", s-&gt;stat_string))</div><div class='del'>-		return priv-&gt;hw_info-&gt;rx_ctrl_fb_rx_fifo_depth;</div><div class='del'>-</div><div class='del'>-	return s-&gt;reg_offset;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int bcmasp_get_sset_count(struct net_device *dev, int string_set)</div><div class='ctx'> {</div><div class='ctx'> 	switch (string_set) {</div><div class='hunk'>@@ -101,14 +76,14 @@ static int bcmasp_get_sset_count(struct net_device *dev, int string_set)</div><div class='ctx'> static void bcmasp_get_strings(struct net_device *dev, u32 stringset,</div><div class='ctx'> 			       u8 *data)</div><div class='ctx'> {</div><div class='add'>+	const char *str;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	switch (stringset) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='ctx'> 		for (i = 0; i &lt; BCMASP_STATS_LEN; i++) {</div><div class='del'>-			memcpy(data + i * ETH_GSTRING_LEN,</div><div class='del'>-			       bcmasp_gstrings_stats[i].stat_string,</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='add'>+			str = bcmasp_gstrings_stats[i].stat_string;</div><div class='add'>+			ethtool_puts(&amp;data, str);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -126,13 +101,10 @@ static void bcmasp_update_mib_counters(struct bcmasp_intf *intf)</div><div class='ctx'> 		char *p;</div><div class='ctx'> </div><div class='ctx'> 		s = &amp;bcmasp_gstrings_stats[i];</div><div class='del'>-		offset = bcmasp_stat_fixup_offset(intf, s);</div><div class='add'>+		offset = s-&gt;reg_offset;</div><div class='ctx'> 		switch (s-&gt;type) {</div><div class='ctx'> 		case BCMASP_STAT_SOFT:</div><div class='ctx'> 			continue;</div><div class='del'>-		case BCMASP_STAT_RX_EDPKT:</div><div class='del'>-			val = rx_edpkt_core_rl(intf-&gt;parent, offset);</div><div class='del'>-			break;</div><div class='ctx'> 		case BCMASP_STAT_RX_CTRL:</div><div class='ctx'> 			val = rx_ctrl_core_rl(intf-&gt;parent, offset);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -191,11 +163,30 @@ static void bcmasp_set_msglevel(struct net_device *dev, u32 level)</div><div class='ctx'> static void bcmasp_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmasp_intf *intf = netdev_priv(dev);</div><div class='add'>+	struct bcmasp_priv *priv = intf-&gt;parent;</div><div class='add'>+	struct device *kdev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	u32 phy_wolopts = 0;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;phydev) {</div><div class='add'>+		phy_ethtool_get_wol(dev-&gt;phydev, wol);</div><div class='add'>+		phy_wolopts = wol-&gt;wolopts;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* MAC is not wake-up capable, return what the PHY does */</div><div class='add'>+	if (!device_can_wakeup(kdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Overlay MAC capabilities with that of the PHY queried before */</div><div class='add'>+	wol-&gt;supported |= BCMASP_SUPPORTED_WAKE;</div><div class='add'>+	wol-&gt;wolopts |= intf-&gt;wolopts;</div><div class='add'>+</div><div class='add'>+	/* Return the PHY configured magic password */</div><div class='add'>+	if (phy_wolopts &amp; WAKE_MAGICSECURE)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	wol-&gt;supported = BCMASP_SUPPORTED_WAKE;</div><div class='del'>-	wol-&gt;wolopts = intf-&gt;wolopts;</div><div class='ctx'> 	memset(wol-&gt;sopass, 0, sizeof(wol-&gt;sopass));</div><div class='ctx'> </div><div class='add'>+	/* Otherwise the MAC one */</div><div class='ctx'> 	if (wol-&gt;wolopts &amp; WAKE_MAGICSECURE)</div><div class='ctx'> 		memcpy(wol-&gt;sopass, intf-&gt;sopass, sizeof(intf-&gt;sopass));</div><div class='ctx'> }</div><div class='hunk'>@@ -205,17 +196,28 @@ static int bcmasp_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> 	struct bcmasp_intf *intf = netdev_priv(dev);</div><div class='ctx'> 	struct bcmasp_priv *priv = intf-&gt;parent;</div><div class='ctx'> 	struct device *kdev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Try Wake-on-LAN from the PHY first */</div><div class='add'>+	if (dev-&gt;phydev) {</div><div class='add'>+		ret = phy_ethtool_set_wol(dev-&gt;phydev, wol);</div><div class='add'>+		if (ret != -EOPNOTSUPP &amp;&amp; wol-&gt;wolopts)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!device_can_wakeup(kdev))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='add'>+	if (wol-&gt;wolopts &amp; ~BCMASP_SUPPORTED_WAKE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	/* Interface Specific */</div><div class='ctx'> 	intf-&gt;wolopts = wol-&gt;wolopts;</div><div class='ctx'> 	if (intf-&gt;wolopts &amp; WAKE_MAGICSECURE)</div><div class='ctx'> 		memcpy(intf-&gt;sopass, wol-&gt;sopass, sizeof(wol-&gt;sopass));</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;wol_lock);</div><div class='del'>-	priv-&gt;enable_wol(intf, !!intf-&gt;wolopts);</div><div class='add'>+	bcmasp_enable_wol(intf, !!intf-&gt;wolopts);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;wol_lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -289,7 +291,7 @@ static int bcmasp_flow_get(struct bcmasp_intf *intf, struct ethtool_rxnfc *cmd)</div><div class='ctx'> </div><div class='ctx'> 	memcpy(&amp;cmd-&gt;fs, &amp;nfilter-&gt;fs, sizeof(nfilter-&gt;fs));</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;data = NUM_NET_FILTERS;</div><div class='add'>+	cmd-&gt;data = intf-&gt;parent-&gt;num_net_filters;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -336,7 +338,7 @@ static int bcmasp_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLALL:</div><div class='ctx'> 		err = bcmasp_netfilt_get_all_active(intf, rule_locs, &amp;cmd-&gt;rule_cnt);</div><div class='del'>-		cmd-&gt;data = NUM_NET_FILTERS;</div><div class='add'>+		cmd-&gt;data = intf-&gt;parent-&gt;num_net_filters;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EOPNOTSUPP;</div><div class='hunk'>@@ -348,58 +350,19 @@ static int bcmasp_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bcmasp_eee_enable_set(struct bcmasp_intf *intf, bool enable)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = umac_rl(intf, UMC_EEE_CTRL);</div><div class='del'>-	if (enable)</div><div class='del'>-		reg |= EEE_EN;</div><div class='del'>-	else</div><div class='del'>-		reg &amp;= ~EEE_EN;</div><div class='del'>-	umac_wl(intf, reg, UMC_EEE_CTRL);</div><div class='del'>-</div><div class='del'>-	intf-&gt;eee.eee_enabled = enable;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int bcmasp_get_eee(struct net_device *dev, struct ethtool_keee *e)</div><div class='ctx'> {</div><div class='del'>-	struct bcmasp_intf *intf = netdev_priv(dev);</div><div class='del'>-	struct ethtool_keee *p = &amp;intf-&gt;eee;</div><div class='del'>-</div><div class='ctx'> 	if (!dev-&gt;phydev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	e-&gt;tx_lpi_enabled = p-&gt;tx_lpi_enabled;</div><div class='del'>-	e-&gt;tx_lpi_timer = umac_rl(intf, UMC_EEE_LPI_TIMER);</div><div class='del'>-</div><div class='ctx'> 	return phy_ethtool_get_eee(dev-&gt;phydev, e);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bcmasp_set_eee(struct net_device *dev, struct ethtool_keee *e)</div><div class='ctx'> {</div><div class='del'>-	struct bcmasp_intf *intf = netdev_priv(dev);</div><div class='del'>-	struct ethtool_keee *p = &amp;intf-&gt;eee;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	if (!dev-&gt;phydev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (!p-&gt;eee_enabled) {</div><div class='del'>-		bcmasp_eee_enable_set(intf, false);</div><div class='del'>-	} else {</div><div class='del'>-		ret = phy_init_eee(dev-&gt;phydev, 0);</div><div class='del'>-		if (ret) {</div><div class='del'>-			netif_err(intf, hw, dev,</div><div class='del'>-				  "EEE initialization failed: %d\n", ret);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		umac_wl(intf, e-&gt;tx_lpi_timer, UMC_EEE_LPI_TIMER);</div><div class='del'>-		intf-&gt;eee.tx_lpi_enabled = e-&gt;tx_lpi_enabled;</div><div class='del'>-		bcmasp_eee_enable_set(intf, true);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return phy_ethtool_set_eee(dev-&gt;phydev, e);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -497,4 +460,5 @@ const struct ethtool_ops bcmasp_ethtool_ops = {</div><div class='ctx'> 	.get_ethtool_stats	= bcmasp_get_ethtool_stats,</div><div class='ctx'> 	.get_sset_count		= bcmasp_get_sset_count,</div><div class='ctx'> 	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='add'>+	.nway_reset		= phy_ethtool_nway_reset,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c b/drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c<br/>index cfd50efbdbc0..b9973956c480 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c</a></div><div class='hunk'>@@ -180,14 +180,14 @@ static struct sk_buff *bcmasp_csum_offload(struct net_device *dev,</div><div class='ctx'> 	case htons(ETH_P_IP):</div><div class='ctx'> 		header |= PKT_OFFLOAD_HDR_SIZE_2((ip_hdrlen(skb) &gt;&gt; 8) &amp; 0xf);</div><div class='ctx'> 		header2 |= PKT_OFFLOAD_HDR2_SIZE_2(ip_hdrlen(skb) &amp; 0xff);</div><div class='del'>-		epkt |= PKT_OFFLOAD_EPKT_IP(0) | PKT_OFFLOAD_EPKT_CSUM_L2;</div><div class='add'>+		epkt |= PKT_OFFLOAD_EPKT_IP(0);</div><div class='ctx'> 		ip_proto = ip_hdr(skb)-&gt;protocol;</div><div class='ctx'> 		header_cnt += 2;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case htons(ETH_P_IPV6):</div><div class='ctx'> 		header |= PKT_OFFLOAD_HDR_SIZE_2((IP6_HLEN &gt;&gt; 8) &amp; 0xf);</div><div class='ctx'> 		header2 |= PKT_OFFLOAD_HDR2_SIZE_2(IP6_HLEN &amp; 0xff);</div><div class='del'>-		epkt |= PKT_OFFLOAD_EPKT_IP(1) | PKT_OFFLOAD_EPKT_CSUM_L2;</div><div class='add'>+		epkt |= PKT_OFFLOAD_EPKT_IP(1);</div><div class='ctx'> 		ip_proto = ipv6_hdr(skb)-&gt;nexthdr;</div><div class='ctx'> 		header_cnt += 2;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -198,12 +198,12 @@ static struct sk_buff *bcmasp_csum_offload(struct net_device *dev,</div><div class='ctx'> 	switch (ip_proto) {</div><div class='ctx'> 	case IPPROTO_TCP:</div><div class='ctx'> 		header2 |= PKT_OFFLOAD_HDR2_SIZE_3(tcp_hdrlen(skb));</div><div class='del'>-		epkt |= PKT_OFFLOAD_EPKT_TP(0) | PKT_OFFLOAD_EPKT_CSUM_L3;</div><div class='add'>+		epkt |= PKT_OFFLOAD_EPKT_TP(0) | PKT_OFFLOAD_EPKT_CSUM_L4;</div><div class='ctx'> 		header_cnt++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IPPROTO_UDP:</div><div class='ctx'> 		header2 |= PKT_OFFLOAD_HDR2_SIZE_3(UDP_HLEN);</div><div class='del'>-		epkt |= PKT_OFFLOAD_EPKT_TP(1) | PKT_OFFLOAD_EPKT_CSUM_L3;</div><div class='add'>+		epkt |= PKT_OFFLOAD_EPKT_TP(1) | PKT_OFFLOAD_EPKT_CSUM_L4;</div><div class='ctx'> 		header_cnt++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -605,10 +605,8 @@ next:</div><div class='ctx'> </div><div class='ctx'> 	bcmasp_intf_rx_desc_write(intf, intf-&gt;rx_edpkt_dma_read);</div><div class='ctx'> </div><div class='del'>-	if (processed &lt; budget) {</div><div class='del'>-		napi_complete_done(&amp;intf-&gt;rx_napi, processed);</div><div class='add'>+	if (processed &lt; budget &amp;&amp; napi_complete_done(&amp;intf-&gt;rx_napi, processed))</div><div class='ctx'> 		bcmasp_enable_rx_irq(intf, 1);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return processed;</div><div class='ctx'> }</div><div class='hunk'>@@ -619,7 +617,6 @@ static void bcmasp_adj_link(struct net_device *dev)</div><div class='ctx'> 	struct phy_device *phydev = dev-&gt;phydev;</div><div class='ctx'> 	u32 cmd_bits = 0, reg;</div><div class='ctx'> 	int changed = 0;</div><div class='del'>-	bool active;</div><div class='ctx'> </div><div class='ctx'> 	if (intf-&gt;old_link != phydev-&gt;link) {</div><div class='ctx'> 		changed = 1;</div><div class='hunk'>@@ -677,8 +674,13 @@ static void bcmasp_adj_link(struct net_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 		umac_wl(intf, reg, UMC_CMD);</div><div class='ctx'> </div><div class='del'>-		active = phy_init_eee(phydev, 0) &gt;= 0;</div><div class='del'>-		bcmasp_eee_enable_set(intf, active);</div><div class='add'>+		umac_wl(intf, phydev-&gt;eee_cfg.tx_lpi_timer, UMC_EEE_LPI_TIMER);</div><div class='add'>+		reg = umac_rl(intf, UMC_EEE_CTRL);</div><div class='add'>+		if (phydev-&gt;enable_tx_lpi)</div><div class='add'>+			reg |= EEE_EN;</div><div class='add'>+		else</div><div class='add'>+			reg &amp;= ~EEE_EN;</div><div class='add'>+		umac_wl(intf, reg, UMC_EEE_CTRL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	reg = rgmii_rl(intf, RGMII_OOB_CNTRL);</div><div class='hunk'>@@ -814,9 +816,10 @@ static void bcmasp_init_tx(struct bcmasp_intf *intf)</div><div class='ctx'> 	/* Tx SPB */</div><div class='ctx'> 	tx_spb_ctrl_wl(intf, ((intf-&gt;channel + 8) &lt;&lt; TX_SPB_CTRL_XF_BID_SHIFT),</div><div class='ctx'> 		       TX_SPB_CTRL_XF_CTRL2);</div><div class='del'>-	tx_pause_ctrl_wl(intf, (1 &lt;&lt; (intf-&gt;channel + 8)), TX_PAUSE_MAP_VECTOR);</div><div class='add'>+</div><div class='add'>+	if (intf-&gt;parent-&gt;tx_chan_offset)</div><div class='add'>+		tx_pause_ctrl_wl(intf, (1 &lt;&lt; (intf-&gt;channel + 8)), TX_PAUSE_MAP_VECTOR);</div><div class='ctx'> 	tx_spb_top_wl(intf, 0x1e, TX_SPB_TOP_BLKOUT);</div><div class='del'>-	tx_spb_top_wl(intf, 0x0, TX_SPB_TOP_SPRE_BW_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	tx_spb_dma_wq(intf, intf-&gt;tx_spb_dma_addr, TX_SPB_DMA_READ);</div><div class='ctx'> 	tx_spb_dma_wq(intf, intf-&gt;tx_spb_dma_addr, TX_SPB_DMA_BASE);</div><div class='hunk'>@@ -1055,6 +1058,9 @@ static int bcmasp_netif_init(struct net_device *dev, bool phy_connect)</div><div class='ctx'> </div><div class='ctx'> 		/* Indicate that the MAC is responsible for PHY PM */</div><div class='ctx'> 		phydev-&gt;mac_managed_pm = true;</div><div class='add'>+</div><div class='add'>+		/* Set phylib's copy of the LPI timer */</div><div class='add'>+		phydev-&gt;eee_cfg.tx_lpi_timer = umac_rl(intf, UMC_EEE_LPI_TIMER);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	umac_reset(intf);</div><div class='hunk'>@@ -1178,7 +1184,7 @@ static void bcmasp_map_res(struct bcmasp_priv *priv, struct bcmasp_intf *intf)</div><div class='ctx'> {</div><div class='ctx'> 	/* Per port */</div><div class='ctx'> 	intf-&gt;res.umac = priv-&gt;base + UMC_OFFSET(intf);</div><div class='del'>-	intf-&gt;res.umac2fb = priv-&gt;base + (priv-&gt;hw_info-&gt;umac2fb +</div><div class='add'>+	intf-&gt;res.umac2fb = priv-&gt;base + (UMAC2FB_OFFSET + priv-&gt;rx_ctrl_offset +</div><div class='ctx'> 					  (intf-&gt;port * 0x4));</div><div class='ctx'> 	intf-&gt;res.rgmii = priv-&gt;base + RGMII_OFFSET(intf);</div><div class='ctx'> </div><div class='hunk'>@@ -1193,7 +1199,6 @@ static void bcmasp_map_res(struct bcmasp_priv *priv, struct bcmasp_intf *intf)</div><div class='ctx'> 	intf-&gt;rx_edpkt_cfg = priv-&gt;base + RX_EDPKT_CFG_OFFSET(intf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define MAX_IRQ_STR_LEN		64</div><div class='ctx'> struct bcmasp_intf *bcmasp_interface_create(struct bcmasp_priv *priv,</div><div class='ctx'> 					    struct device_node *ndev_dn, int i)</div><div class='ctx'> {</div><div class='hunk'>@@ -1277,6 +1282,8 @@ struct bcmasp_intf *bcmasp_interface_create(struct bcmasp_priv *priv,</div><div class='ctx'> 	ndev-&gt;hw_features |= ndev-&gt;features;</div><div class='ctx'> 	ndev-&gt;needed_headroom += sizeof(struct bcmasp_pkt_offload);</div><div class='ctx'> </div><div class='add'>+	netdev_sw_irq_coalesce_default_on(ndev);</div><div class='add'>+</div><div class='ctx'> 	return intf;</div><div class='ctx'> </div><div class='ctx'> err_free_netdev:</div><div class='hunk'>@@ -1331,7 +1338,8 @@ static void bcmasp_suspend_to_wol(struct bcmasp_intf *intf)</div><div class='ctx'> 				     ASP_WAKEUP_INTR2_MASK_CLEAR);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (intf-&gt;eee.eee_enabled &amp;&amp; intf-&gt;parent-&gt;eee_fixup)</div><div class='add'>+	if (ndev-&gt;phydev &amp;&amp; ndev-&gt;phydev-&gt;eee_cfg.eee_enabled &amp;&amp;</div><div class='add'>+	    intf-&gt;parent-&gt;eee_fixup)</div><div class='ctx'> 		intf-&gt;parent-&gt;eee_fixup(intf, true);</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(intf, wol, ndev, "entered WOL mode\n");</div><div class='hunk'>@@ -1373,7 +1381,8 @@ static void bcmasp_resume_from_wol(struct bcmasp_intf *intf)</div><div class='ctx'> {</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	if (intf-&gt;eee.eee_enabled &amp;&amp; intf-&gt;parent-&gt;eee_fixup)</div><div class='add'>+	if (intf-&gt;ndev-&gt;phydev &amp;&amp; intf-&gt;ndev-&gt;phydev-&gt;eee_cfg.eee_enabled &amp;&amp;</div><div class='add'>+	    intf-&gt;parent-&gt;eee_fixup)</div><div class='ctx'> 		intf-&gt;parent-&gt;eee_fixup(intf, false);</div><div class='ctx'> </div><div class='ctx'> 	reg = umac_rl(intf, UMC_MPD_CTRL);</div><div class='hunk'>@@ -1404,9 +1413,6 @@ int bcmasp_interface_resume(struct bcmasp_intf *intf)</div><div class='ctx'> </div><div class='ctx'> 	bcmasp_resume_from_wol(intf);</div><div class='ctx'> </div><div class='del'>-	if (intf-&gt;eee.eee_enabled)</div><div class='del'>-		bcmasp_eee_enable_set(intf, true);</div><div class='del'>-</div><div class='ctx'> 	netif_device_attach(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h b/drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h<br/>index ad742612895f..af7418348e81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h</a></div><div class='hunk'>@@ -118,8 +118,7 @@</div><div class='ctx'> #define  UMC_PSW_MS			0x624</div><div class='ctx'> #define  UMC_PSW_LS			0x628</div><div class='ctx'> </div><div class='del'>-#define UMAC2FB_OFFSET_2_1		0x9f044</div><div class='del'>-#define UMAC2FB_OFFSET			0x9f03c</div><div class='add'>+#define UMAC2FB_OFFSET			0x9f044</div><div class='ctx'> #define  UMAC2FB_CFG			0x0</div><div class='ctx'> #define   UMAC2FB_CFG_OPUT_EN		BIT(0)</div><div class='ctx'> #define   UMAC2FB_CFG_VLAN_EN		BIT(1)</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/b44.c b/drivers/net/ethernet/broadcom/b44.c<br/>index e5809ad5eb82..888f28f11406 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/b44.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/b44.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/b44.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/b44.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@</div><div class='ctx'> #include &lt;linux/ssb/ssb.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/phy_fixed.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='hunk'>@@ -575,7 +576,7 @@ static void b44_check_phy(struct b44 *bp)</div><div class='ctx'> </div><div class='ctx'> static void b44_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct b44 *bp = from_timer(bp, t, timer);</div><div class='add'>+	struct b44 *bp = timer_container_of(bp, t, timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;bp-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1628,7 +1629,7 @@ static int b44_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	napi_disable(&amp;bp-&gt;napi);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;bp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;bp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;bp-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -2233,7 +2234,6 @@ static int b44_register_phy_one(struct b44 *bp)</div><div class='ctx'> 	struct mii_bus *mii_bus;</div><div class='ctx'> 	struct ssb_device *sdev = bp-&gt;sdev;</div><div class='ctx'> 	struct phy_device *phydev;</div><div class='del'>-	char bus_id[MII_BUS_ID_SIZE + 3];</div><div class='ctx'> 	struct ssb_sprom *sprom = &amp;sdev-&gt;bus-&gt;sprom;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -2260,27 +2260,26 @@ static int b44_register_phy_one(struct b44 *bp)</div><div class='ctx'> 		goto err_out_mdiobus;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!mdiobus_is_registered_device(bp-&gt;mii_bus, bp-&gt;phy_addr) &amp;&amp;</div><div class='del'>-	    (sprom-&gt;boardflags_lo &amp; (B44_BOARDFLAG_ROBO | B44_BOARDFLAG_ADM))) {</div><div class='del'>-</div><div class='add'>+	phydev = mdiobus_get_phy(bp-&gt;mii_bus, bp-&gt;phy_addr);</div><div class='add'>+	if (!phydev &amp;&amp;</div><div class='add'>+	    sprom-&gt;boardflags_lo &amp; (B44_BOARDFLAG_ROBO | B44_BOARDFLAG_ADM)) {</div><div class='ctx'> 		dev_info(sdev-&gt;dev,</div><div class='ctx'> 			 "could not find PHY at %i, use fixed one\n",</div><div class='ctx'> 			 bp-&gt;phy_addr);</div><div class='ctx'> </div><div class='del'>-		bp-&gt;phy_addr = 0;</div><div class='del'>-		snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, "fixed-0",</div><div class='del'>-			 bp-&gt;phy_addr);</div><div class='del'>-	} else {</div><div class='del'>-		snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, mii_bus-&gt;id,</div><div class='del'>-			 bp-&gt;phy_addr);</div><div class='add'>+		phydev = fixed_phy_register_100fd();</div><div class='add'>+		if (!IS_ERR(phydev))</div><div class='add'>+			bp-&gt;phy_addr = phydev-&gt;mdio.addr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phydev = phy_connect(bp-&gt;dev, bus_id, &amp;b44_adjust_link,</div><div class='del'>-			     PHY_INTERFACE_MODE_MII);</div><div class='del'>-	if (IS_ERR(phydev)) {</div><div class='add'>+	if (IS_ERR_OR_NULL(phydev))</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+	else</div><div class='add'>+		err = phy_connect_direct(bp-&gt;dev, phydev, &amp;b44_adjust_link,</div><div class='add'>+					 PHY_INTERFACE_MODE_MII);</div><div class='add'>+	if (err) {</div><div class='ctx'> 		dev_err(sdev-&gt;dev, "could not attach PHY at %i\n",</div><div class='ctx'> 			bp-&gt;phy_addr);</div><div class='del'>-		err = PTR_ERR(phydev);</div><div class='ctx'> 		goto err_out_mdiobus_unregister;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2293,7 +2292,6 @@ static int b44_register_phy_one(struct b44 *bp)</div><div class='ctx'> 	linkmode_copy(phydev-&gt;advertising, phydev-&gt;supported);</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;old_link = 0;</div><div class='del'>-	bp-&gt;phy_addr = phydev-&gt;mdio.addr;</div><div class='ctx'> </div><div class='ctx'> 	phy_attached_info(phydev);</div><div class='ctx'> </div><div class='hunk'>@@ -2311,10 +2309,15 @@ err_out:</div><div class='ctx'> </div><div class='ctx'> static void b44_unregister_phy_one(struct b44 *bp)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = bp-&gt;dev;</div><div class='ctx'> 	struct mii_bus *mii_bus = bp-&gt;mii_bus;</div><div class='add'>+	struct net_device *dev = bp-&gt;dev;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+</div><div class='add'>+	phydev = dev-&gt;phydev;</div><div class='ctx'> </div><div class='del'>-	phy_disconnect(dev-&gt;phydev);</div><div class='add'>+	phy_disconnect(phydev);</div><div class='add'>+	if (phy_is_pseudo_fixed_link(phydev))</div><div class='add'>+		fixed_phy_unregister(phydev);</div><div class='ctx'> 	mdiobus_unregister(mii_bus);</div><div class='ctx'> 	mdiobus_free(mii_bus);</div><div class='ctx'> }</div><div class='hunk'>@@ -2473,7 +2476,7 @@ static int b44_suspend(struct ssb_device *sdev, pm_message_t state)</div><div class='ctx'> 	if (!netif_running(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;bp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;bp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;bp-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -2570,7 +2573,7 @@ static int __init b44_init(void)</div><div class='ctx'> 	unsigned int dma_desc_align_size = dma_get_cache_alignment();</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Setup paramaters for syncing RX/TX DMA descriptors */</div><div class='add'>+	/* Setup parameters for syncing RX/TX DMA descriptors */</div><div class='ctx'> 	dma_desc_sync_size = max_t(unsigned int, dma_desc_align_size, sizeof(struct dma_desc));</div><div class='ctx'> </div><div class='ctx'> 	err = b44_pci_init();</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bcm63xx_enet.c b/drivers/net/ethernet/broadcom/bcm63xx_enet.c<br/>index e5e03aaa49f9..92204fea1f08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bcm63xx_enet.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bcm63xx_enet.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bcm63xx_enet.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bcm63xx_enet.c</a></div><div class='hunk'>@@ -286,7 +286,7 @@ static int bcm_enet_refill_rx(struct net_device *dev, bool napi_mode)</div><div class='ctx'>  */</div><div class='ctx'> static void bcm_enet_refill_rx_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_enet_priv *priv = from_timer(priv, t, rx_timeout);</div><div class='add'>+	struct bcm_enet_priv *priv = timer_container_of(priv, t, rx_timeout);</div><div class='ctx'> 	struct net_device *dev = priv-&gt;net_dev;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;priv-&gt;rx_lock);</div><div class='hunk'>@@ -1195,7 +1195,7 @@ static int bcm_enet_stop(struct net_device *dev)</div><div class='ctx'> 	napi_disable(&amp;priv-&gt;napi);</div><div class='ctx'> 	if (priv-&gt;has_phy)</div><div class='ctx'> 		phy_stop(dev-&gt;phydev);</div><div class='del'>-	del_timer_sync(&amp;priv-&gt;rx_timeout);</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;rx_timeout);</div><div class='ctx'> </div><div class='ctx'> 	/* mask all interrupts */</div><div class='ctx'> 	enet_writel(priv, 0, ENET_IRMASK_REG);</div><div class='hunk'>@@ -1339,14 +1339,14 @@ static int bcm_enet_get_sset_count(struct net_device *netdev,</div><div class='ctx'> static void bcm_enet_get_strings(struct net_device *netdev,</div><div class='ctx'> 				 u32 stringset, u8 *data)</div><div class='ctx'> {</div><div class='add'>+	const char *str;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	switch (stringset) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='ctx'> 		for (i = 0; i &lt; BCM_ENET_STATS_LEN; i++) {</div><div class='del'>-			memcpy(data + i * ETH_GSTRING_LEN,</div><div class='del'>-			       bcm_enet_gstrings_stats[i].stat_string,</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='add'>+			str = bcm_enet_gstrings_stats[i].stat_string;</div><div class='add'>+			ethtool_puts(&amp;data, str);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2001,7 +2001,7 @@ static inline int bcm_enet_port_is_rgmii(int portid)</div><div class='ctx'>  */</div><div class='ctx'> static void swphy_poll_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_enet_priv *priv = from_timer(priv, t, swphy_poll);</div><div class='add'>+	struct bcm_enet_priv *priv = timer_container_of(priv, t, swphy_poll);</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;num_ports; i++) {</div><div class='hunk'>@@ -2346,10 +2346,10 @@ static int bcm_enetsw_stop(struct net_device *dev)</div><div class='ctx'> 	priv = netdev_priv(dev);</div><div class='ctx'> 	kdev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;priv-&gt;swphy_poll);</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;swphy_poll);</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	napi_disable(&amp;priv-&gt;napi);</div><div class='del'>-	del_timer_sync(&amp;priv-&gt;rx_timeout);</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;rx_timeout);</div><div class='ctx'> </div><div class='ctx'> 	/* mask all interrupts */</div><div class='ctx'> 	enet_dmac_writel(priv, 0, ENETDMAC_IRMASK, priv-&gt;rx_chan);</div><div class='hunk'>@@ -2503,14 +2503,14 @@ static const struct bcm_enet_stats bcm_enetsw_gstrings_stats[] = {</div><div class='ctx'> static void bcm_enetsw_get_strings(struct net_device *netdev,</div><div class='ctx'> 				   u32 stringset, u8 *data)</div><div class='ctx'> {</div><div class='add'>+	const char *str;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	switch (stringset) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='ctx'> 		for (i = 0; i &lt; BCM_ENETSW_STATS_LEN; i++) {</div><div class='del'>-			memcpy(data + i * ETH_GSTRING_LEN,</div><div class='del'>-			       bcm_enetsw_gstrings_stats[i].stat_string,</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='add'>+			str = bcm_enetsw_gstrings_stats[i].stat_string;</div><div class='add'>+			ethtool_puts(&amp;data, str);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bcmsysport.c b/drivers/net/ethernet/broadcom/bcmsysport.c<br/>index 031e9e0cca53..bc4e1f3b3752 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bcmsysport.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bcmsysport.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bcmsysport.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bcmsysport.c</a></div><div class='hunk'>@@ -346,32 +346,22 @@ static void bcm_sysport_get_strings(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct bcm_sysport_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	const struct bcm_sysport_stats *s;</div><div class='del'>-	char buf[128];</div><div class='del'>-	int i, j;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	switch (stringset) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='del'>-		for (i = 0, j = 0; i &lt; BCM_SYSPORT_STATS_LEN; i++) {</div><div class='add'>+		for (i = 0; i &lt; BCM_SYSPORT_STATS_LEN; i++) {</div><div class='ctx'> 			s = &amp;bcm_sysport_gstrings_stats[i];</div><div class='ctx'> 			if (priv-&gt;is_lite &amp;&amp;</div><div class='ctx'> 			    !bcm_sysport_lite_stat_valid(s-&gt;type))</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			memcpy(data + j * ETH_GSTRING_LEN, s-&gt;stat_string,</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='del'>-			j++;</div><div class='add'>+			ethtool_puts(&amp;data, s-&gt;stat_string);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; dev-&gt;num_tx_queues; i++) {</div><div class='del'>-			snprintf(buf, sizeof(buf), "txq%d_packets", i);</div><div class='del'>-			memcpy(data + j * ETH_GSTRING_LEN, buf,</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='del'>-			j++;</div><div class='del'>-</div><div class='del'>-			snprintf(buf, sizeof(buf), "txq%d_bytes", i);</div><div class='del'>-			memcpy(data + j * ETH_GSTRING_LEN, buf,</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='del'>-			j++;</div><div class='add'>+			ethtool_sprintf(&amp;data, "txq%d_packets", i);</div><div class='add'>+			ethtool_sprintf(&amp;data, "txq%d_bytes", i);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1943,7 +1933,11 @@ static int bcm_sysport_open(struct net_device *dev)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(dev, "could not enable priv clock\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Reset UniMAC */</div><div class='ctx'> 	umac_reset(priv);</div><div class='hunk'>@@ -2601,7 +2595,11 @@ static int bcm_sysport_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err_deregister_notifier;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "could not enable priv clock\n");</div><div class='add'>+		goto err_deregister_netdev;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;rev = topctrl_readl(priv, REV_CNTL) &amp; REV_MASK;</div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev,</div><div class='hunk'>@@ -2615,6 +2613,8 @@ static int bcm_sysport_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_deregister_netdev:</div><div class='add'>+	unregister_netdev(dev);</div><div class='ctx'> err_deregister_notifier:</div><div class='ctx'> 	unregister_netdevice_notifier(&amp;priv-&gt;netdev_notifier);</div><div class='ctx'> err_deregister_fixed_link:</div><div class='hunk'>@@ -2784,7 +2784,12 @@ static int __maybe_unused bcm_sysport_resume(struct device *d)</div><div class='ctx'> 	if (!netif_running(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(dev, "could not enable priv clock\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (priv-&gt;wolopts)</div><div class='ctx'> 		clk_disable_unprepare(priv-&gt;wol_clk);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bgmac-platform.c b/drivers/net/ethernet/broadcom/bgmac-platform.c<br/>index ecce23cecbea..4e266ce41180 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bgmac-platform.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bgmac-platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bgmac-platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bgmac-platform.c</a></div><div class='hunk'>@@ -171,6 +171,7 @@ static int platform_phy_connect(struct bgmac *bgmac)</div><div class='ctx'> static int bgmac_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct device_node *phy_node;</div><div class='ctx'> 	struct bgmac *bgmac;</div><div class='ctx'> 	struct resource *regs;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -236,7 +237,9 @@ static int bgmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	bgmac-&gt;cco_ctl_maskset = platform_bgmac_cco_ctl_maskset;</div><div class='ctx'> 	bgmac-&gt;get_bus_clock = platform_bgmac_get_bus_clock;</div><div class='ctx'> 	bgmac-&gt;cmn_maskset32 = platform_bgmac_cmn_maskset32;</div><div class='del'>-	if (of_parse_phandle(np, "phy-handle", 0)) {</div><div class='add'>+	phy_node = of_parse_phandle(np, "phy-handle", 0);</div><div class='add'>+	if (phy_node) {</div><div class='add'>+		of_node_put(phy_node);</div><div class='ctx'> 		bgmac-&gt;phy_connect = platform_phy_connect;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		bgmac-&gt;phy_connect = bgmac_phy_connect_direct;</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bgmac.c b/drivers/net/ethernet/broadcom/bgmac.c<br/>index 6ffdc4229407..3e9c57196a39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bgmac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bgmac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bgmac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bgmac.c</a></div><div class='hunk'>@@ -1367,8 +1367,7 @@ static void bgmac_get_strings(struct net_device *dev, u32 stringset,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; BGMAC_STATS_LEN; i++)</div><div class='del'>-		strscpy(data + i * ETH_GSTRING_LEN,</div><div class='del'>-			bgmac_get_strings_stats[i].name, ETH_GSTRING_LEN);</div><div class='add'>+		ethtool_puts(&amp;data, bgmac_get_strings_stats[i].name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bgmac_get_ethtool_stats(struct net_device *dev,</div><div class='hunk'>@@ -1447,7 +1446,7 @@ int bgmac_phy_connect_direct(struct bgmac *bgmac)</div><div class='ctx'> 	struct phy_device *phy_dev;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	phy_dev = fixed_phy_register(PHY_POLL, &amp;fphy_status, NULL);</div><div class='add'>+	phy_dev = fixed_phy_register(&amp;fphy_status, NULL);</div><div class='ctx'> 	if (IS_ERR(phy_dev)) {</div><div class='ctx'> 		dev_err(bgmac-&gt;dev, "Failed to register fixed PHY device\n");</div><div class='ctx'> 		return PTR_ERR(phy_dev);</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bgmac.h b/drivers/net/ethernet/broadcom/bgmac.h<br/>index d73ef262991d..6fee9a41839c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bgmac.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bgmac.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bgmac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bgmac.h</a></div><div class='hunk'>@@ -328,8 +328,7 @@</div><div class='ctx'> #define BGMAC_RX_FRAME_OFFSET			30		/* There are 2 unused bytes between header and real data */</div><div class='ctx'> #define BGMAC_RX_BUF_OFFSET			(NET_SKB_PAD + NET_IP_ALIGN - \</div><div class='ctx'> 						 BGMAC_RX_FRAME_OFFSET)</div><div class='del'>-/* Jumbo frame size with FCS */</div><div class='del'>-#define BGMAC_RX_MAX_FRAME_SIZE			9724</div><div class='add'>+#define BGMAC_RX_MAX_FRAME_SIZE			1536</div><div class='ctx'> #define BGMAC_RX_BUF_SIZE			(BGMAC_RX_FRAME_OFFSET + BGMAC_RX_MAX_FRAME_SIZE)</div><div class='ctx'> #define BGMAC_RX_ALLOC_SIZE			(SKB_DATA_ALIGN(BGMAC_RX_BUF_SIZE + BGMAC_RX_BUF_OFFSET) + \</div><div class='ctx'> 						 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/Makefile b/drivers/net/ethernet/broadcom/bnge/Makefile<br/>new file mode 100644<br/>index 000000000000..ea6596854e5c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/Makefile</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_BNGE) += bng_en.o</div><div class='add'>+</div><div class='add'>+bng_en-y := bnge_core.o \</div><div class='add'>+	    bnge_devlink.o \</div><div class='add'>+	    bnge_hwrm.o \</div><div class='add'>+	    bnge_hwrm_lib.o \</div><div class='add'>+	    bnge_rmem.o \</div><div class='add'>+	    bnge_resc.o \</div><div class='add'>+	    bnge_netdev.o \</div><div class='add'>+	    bnge_ethtool.o \</div><div class='add'>+	    bnge_auxr.o</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge.h b/drivers/net/ethernet/broadcom/bnge/bnge.h<br/>new file mode 100644<br/>index 000000000000..411744894349<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge.h</a></div><div class='hunk'>@@ -0,0 +1,255 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Broadcom */</div><div class='add'>+</div><div class='add'>+#ifndef _BNGE_H_</div><div class='add'>+#define _BNGE_H_</div><div class='add'>+</div><div class='add'>+#define DRV_NAME	"bng_en"</div><div class='add'>+#define DRV_SUMMARY	"Broadcom 800G Ethernet Linux Driver"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='add'>+#include "bnge_rmem.h"</div><div class='add'>+#include "bnge_resc.h"</div><div class='add'>+#include "bnge_auxr.h"</div><div class='add'>+</div><div class='add'>+#define DRV_VER_MAJ	1</div><div class='add'>+#define DRV_VER_MIN	15</div><div class='add'>+#define DRV_VER_UPD	1</div><div class='add'>+</div><div class='add'>+extern char bnge_driver_name[];</div><div class='add'>+</div><div class='add'>+enum board_idx {</div><div class='add'>+	BCM57708,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_auxr_priv {</div><div class='add'>+	struct auxiliary_device aux_dev;</div><div class='add'>+	struct bnge_auxr_dev *auxr_dev;</div><div class='add'>+	int id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_pf_info {</div><div class='add'>+	u16	fw_fid;</div><div class='add'>+	u16	port_id;</div><div class='add'>+	u8	mac_addr[ETH_ALEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define INVALID_HW_RING_ID      ((u16)-1)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	BNGE_FW_CAP_SHORT_CMD				= BIT_ULL(0),</div><div class='add'>+	BNGE_FW_CAP_LLDP_AGENT				= BIT_ULL(1),</div><div class='add'>+	BNGE_FW_CAP_DCBX_AGENT				= BIT_ULL(2),</div><div class='add'>+	BNGE_FW_CAP_IF_CHANGE				= BIT_ULL(3),</div><div class='add'>+	BNGE_FW_CAP_KONG_MB_CHNL			= BIT_ULL(4),</div><div class='add'>+	BNGE_FW_CAP_ERROR_RECOVERY			= BIT_ULL(5),</div><div class='add'>+	BNGE_FW_CAP_PKG_VER				= BIT_ULL(6),</div><div class='add'>+	BNGE_FW_CAP_CFA_ADV_FLOW			= BIT_ULL(7),</div><div class='add'>+	BNGE_FW_CAP_CFA_RFS_RING_TBL_IDX_V2		= BIT_ULL(8),</div><div class='add'>+	BNGE_FW_CAP_PCIE_STATS_SUPPORTED		= BIT_ULL(9),</div><div class='add'>+	BNGE_FW_CAP_EXT_STATS_SUPPORTED			= BIT_ULL(10),</div><div class='add'>+	BNGE_FW_CAP_ERR_RECOVER_RELOAD			= BIT_ULL(11),</div><div class='add'>+	BNGE_FW_CAP_HOT_RESET				= BIT_ULL(12),</div><div class='add'>+	BNGE_FW_CAP_RX_ALL_PKT_TS			= BIT_ULL(13),</div><div class='add'>+	BNGE_FW_CAP_VLAN_RX_STRIP			= BIT_ULL(14),</div><div class='add'>+	BNGE_FW_CAP_VLAN_TX_INSERT			= BIT_ULL(15),</div><div class='add'>+	BNGE_FW_CAP_EXT_HW_STATS_SUPPORTED		= BIT_ULL(16),</div><div class='add'>+	BNGE_FW_CAP_LIVEPATCH				= BIT_ULL(17),</div><div class='add'>+	BNGE_FW_CAP_HOT_RESET_IF			= BIT_ULL(18),</div><div class='add'>+	BNGE_FW_CAP_RING_MONITOR			= BIT_ULL(19),</div><div class='add'>+	BNGE_FW_CAP_DBG_QCAPS				= BIT_ULL(20),</div><div class='add'>+	BNGE_FW_CAP_THRESHOLD_TEMP_SUPPORTED		= BIT_ULL(21),</div><div class='add'>+	BNGE_FW_CAP_DFLT_VLAN_TPID_PCP			= BIT_ULL(22),</div><div class='add'>+	BNGE_FW_CAP_VNIC_TUNNEL_TPA			= BIT_ULL(23),</div><div class='add'>+	BNGE_FW_CAP_CFA_NTUPLE_RX_EXT_IP_PROTO		= BIT_ULL(24),</div><div class='add'>+	BNGE_FW_CAP_CFA_RFS_RING_TBL_IDX_V3		= BIT_ULL(25),</div><div class='add'>+	BNGE_FW_CAP_VNIC_RE_FLUSH			= BIT_ULL(26),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	BNGE_EN_ROCE_V1					= BIT_ULL(0),</div><div class='add'>+	BNGE_EN_ROCE_V2					= BIT_ULL(1),</div><div class='add'>+	BNGE_EN_STRIP_VLAN				= BIT_ULL(2),</div><div class='add'>+	BNGE_EN_SHARED_CHNL				= BIT_ULL(3),</div><div class='add'>+	BNGE_EN_UDP_GSO_SUPP				= BIT_ULL(4),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNGE_EN_ROCE		(BNGE_EN_ROCE_V1 | BNGE_EN_ROCE_V2)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	BNGE_RSS_CAP_RSS_HASH_TYPE_DELTA		= BIT(0),</div><div class='add'>+	BNGE_RSS_CAP_UDP_RSS_CAP			= BIT(1),</div><div class='add'>+	BNGE_RSS_CAP_NEW_RSS_CAP			= BIT(2),</div><div class='add'>+	BNGE_RSS_CAP_RSS_TCAM				= BIT(3),</div><div class='add'>+	BNGE_RSS_CAP_AH_V4_RSS_CAP			= BIT(4),</div><div class='add'>+	BNGE_RSS_CAP_AH_V6_RSS_CAP			= BIT(5),</div><div class='add'>+	BNGE_RSS_CAP_ESP_V4_RSS_CAP			= BIT(6),</div><div class='add'>+	BNGE_RSS_CAP_ESP_V6_RSS_CAP			= BIT(7),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNGE_MAX_QUEUE		8</div><div class='add'>+struct bnge_queue_info {</div><div class='add'>+	u8      queue_id;</div><div class='add'>+	u8      queue_profile;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_dev {</div><div class='add'>+	struct device	*dev;</div><div class='add'>+	struct pci_dev	*pdev;</div><div class='add'>+	struct net_device	*netdev;</div><div class='add'>+	u64	dsn;</div><div class='add'>+#define BNGE_VPD_FLD_LEN	32</div><div class='add'>+	char		board_partno[BNGE_VPD_FLD_LEN];</div><div class='add'>+	char		board_serialno[BNGE_VPD_FLD_LEN];</div><div class='add'>+</div><div class='add'>+	void __iomem	*bar0;</div><div class='add'>+	void __iomem	*bar1;</div><div class='add'>+</div><div class='add'>+	u16		chip_num;</div><div class='add'>+	u8		chip_rev;</div><div class='add'>+</div><div class='add'>+#if BITS_PER_LONG == 32</div><div class='add'>+	/* ensure atomic 64-bit doorbell writes on 32-bit systems. */</div><div class='add'>+	spinlock_t	db_lock;</div><div class='add'>+#endif</div><div class='add'>+	int		db_offset; /* db_offset within db_size */</div><div class='add'>+	int		db_size;</div><div class='add'>+</div><div class='add'>+	/* HWRM members */</div><div class='add'>+	u16			hwrm_cmd_seq;</div><div class='add'>+	u16			hwrm_cmd_kong_seq;</div><div class='add'>+	struct dma_pool		*hwrm_dma_pool;</div><div class='add'>+	struct hlist_head	hwrm_pending_list;</div><div class='add'>+	u16			hwrm_max_req_len;</div><div class='add'>+	u16			hwrm_max_ext_req_len;</div><div class='add'>+	unsigned int		hwrm_cmd_timeout;</div><div class='add'>+	unsigned int		hwrm_cmd_max_timeout;</div><div class='add'>+	struct mutex		hwrm_cmd_lock;	/* serialize hwrm messages */</div><div class='add'>+</div><div class='add'>+	struct hwrm_ver_get_output	ver_resp;</div><div class='add'>+#define FW_VER_STR_LEN		32</div><div class='add'>+	char			fw_ver_str[FW_VER_STR_LEN];</div><div class='add'>+	char			hwrm_ver_supp[FW_VER_STR_LEN];</div><div class='add'>+	char			nvm_cfg_ver[FW_VER_STR_LEN];</div><div class='add'>+	u64			fw_ver_code;</div><div class='add'>+#define BNGE_FW_VER_CODE(maj, min, bld, rsv)			\</div><div class='add'>+	((u64)(maj) &lt;&lt; 48 | (u64)(min) &lt;&lt; 32 | (u64)(bld) &lt;&lt; 16 | (rsv))</div><div class='add'>+</div><div class='add'>+	struct bnge_pf_info	pf;</div><div class='add'>+</div><div class='add'>+	unsigned long           state;</div><div class='add'>+#define BNGE_STATE_DRV_REGISTERED      0</div><div class='add'>+#define BNGE_STATE_OPEN			1</div><div class='add'>+</div><div class='add'>+	u64			fw_cap;</div><div class='add'>+</div><div class='add'>+	/* Backing stores */</div><div class='add'>+	struct bnge_ctx_mem_info	*ctx;</div><div class='add'>+</div><div class='add'>+	u64			flags;</div><div class='add'>+</div><div class='add'>+	struct bnge_hw_resc	hw_resc;</div><div class='add'>+</div><div class='add'>+	u16			tso_max_segs;</div><div class='add'>+</div><div class='add'>+	int			max_fltr;</div><div class='add'>+#define BNGE_L2_FLTR_MAX_FLTR	1024</div><div class='add'>+</div><div class='add'>+	u32			*rss_indir_tbl;</div><div class='add'>+#define BNGE_RSS_TABLE_ENTRIES	64</div><div class='add'>+#define BNGE_RSS_TABLE_SIZE		(BNGE_RSS_TABLE_ENTRIES * 4)</div><div class='add'>+#define BNGE_RSS_TABLE_MAX_TBL	8</div><div class='add'>+#define BNGE_MAX_RSS_TABLE_SIZE				\</div><div class='add'>+	(BNGE_RSS_TABLE_SIZE * BNGE_RSS_TABLE_MAX_TBL)</div><div class='add'>+#define BNGE_MAX_RSS_TABLE_ENTRIES				\</div><div class='add'>+	(BNGE_RSS_TABLE_ENTRIES * BNGE_RSS_TABLE_MAX_TBL)</div><div class='add'>+	u16			rss_indir_tbl_entries;</div><div class='add'>+</div><div class='add'>+	u32			rss_cap;</div><div class='add'>+	u32			rss_hash_cfg;</div><div class='add'>+</div><div class='add'>+	u16			rx_nr_rings;</div><div class='add'>+	u16			tx_nr_rings;</div><div class='add'>+	u16			tx_nr_rings_per_tc;</div><div class='add'>+	/* Number of NQs */</div><div class='add'>+	u16			nq_nr_rings;</div><div class='add'>+</div><div class='add'>+	/* Aux device resources */</div><div class='add'>+	u16			aux_num_msix;</div><div class='add'>+	u16			aux_num_stat_ctxs;</div><div class='add'>+</div><div class='add'>+	u16			max_mtu;</div><div class='add'>+#define BNGE_MAX_MTU		9500</div><div class='add'>+</div><div class='add'>+	u16			hw_ring_stats_size;</div><div class='add'>+#define BNGE_NUM_RX_RING_STATS			8</div><div class='add'>+#define BNGE_NUM_TX_RING_STATS			8</div><div class='add'>+#define BNGE_NUM_TPA_RING_STATS			6</div><div class='add'>+#define BNGE_RING_STATS_SIZE					\</div><div class='add'>+	((BNGE_NUM_RX_RING_STATS + BNGE_NUM_TX_RING_STATS +	\</div><div class='add'>+	  BNGE_NUM_TPA_RING_STATS) * 8)</div><div class='add'>+</div><div class='add'>+	u16			max_tpa_v2;</div><div class='add'>+#define BNGE_SUPPORTS_TPA(bd)	((bd)-&gt;max_tpa_v2)</div><div class='add'>+</div><div class='add'>+	u8                      num_tc;</div><div class='add'>+	u8			max_tc;</div><div class='add'>+	u8			max_lltc;	/* lossless TCs */</div><div class='add'>+	struct bnge_queue_info	q_info[BNGE_MAX_QUEUE];</div><div class='add'>+	u8			tc_to_qidx[BNGE_MAX_QUEUE];</div><div class='add'>+	u8			q_ids[BNGE_MAX_QUEUE];</div><div class='add'>+	u8			max_q;</div><div class='add'>+	u8			port_count;</div><div class='add'>+</div><div class='add'>+	struct bnge_irq		*irq_tbl;</div><div class='add'>+	u16			irqs_acquired;</div><div class='add'>+</div><div class='add'>+	struct bnge_auxr_priv	*aux_priv;</div><div class='add'>+	struct bnge_auxr_dev	*auxr_dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool bnge_is_roce_en(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	return bd-&gt;flags &amp; BNGE_EN_ROCE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool bnge_is_agg_reqd(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	if (bd-&gt;netdev) {</div><div class='add'>+		struct bnge_net *bn = netdev_priv(bd-&gt;netdev);</div><div class='add'>+</div><div class='add'>+		if (bn-&gt;priv_flags &amp; BNGE_NET_EN_TPA ||</div><div class='add'>+		    bn-&gt;priv_flags &amp; BNGE_NET_EN_JUMBO)</div><div class='add'>+			return true;</div><div class='add'>+		else</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void bnge_writeq(struct bnge_dev *bd, u64 val,</div><div class='add'>+			       void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+#if BITS_PER_LONG == 32</div><div class='add'>+	spin_lock(&amp;bd-&gt;db_lock);</div><div class='add'>+	lo_hi_writeq(val, addr);</div><div class='add'>+	spin_unlock(&amp;bd-&gt;db_lock);</div><div class='add'>+#else</div><div class='add'>+	writeq(val, addr);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* For TX and RX ring doorbells */</div><div class='add'>+static inline void bnge_db_write(struct bnge_dev *bd, struct bnge_db_info *db,</div><div class='add'>+				 u32 idx)</div><div class='add'>+{</div><div class='add'>+	bnge_writeq(bd, db-&gt;db_key64 | DB_RING_IDX(db, idx),</div><div class='add'>+		    db-&gt;doorbell);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bnge_aux_registered(struct bnge_dev *bd);</div><div class='add'>+u16 bnge_aux_get_msix(struct bnge_dev *bd);</div><div class='add'>+</div><div class='add'>+#endif /* _BNGE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_auxr.c b/drivers/net/ethernet/broadcom/bnge/bnge_auxr.c<br/>new file mode 100644<br/>index 000000000000..d64592b64e17<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_auxr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_auxr.c</a></div><div class='hunk'>@@ -0,0 +1,258 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2025 Broadcom.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;asm/byteorder.h&gt;</div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='add'>+#include &lt;linux/auxiliary_bus.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bnge.h"</div><div class='add'>+#include "bnge_hwrm.h"</div><div class='add'>+#include "bnge_auxr.h"</div><div class='add'>+</div><div class='add'>+static DEFINE_IDA(bnge_aux_dev_ids);</div><div class='add'>+</div><div class='add'>+static void bnge_fill_msix_vecs(struct bnge_dev *bd,</div><div class='add'>+				struct bnge_msix_info *info)</div><div class='add'>+{</div><div class='add'>+	struct bnge_auxr_dev *auxr_dev = bd-&gt;auxr_dev;</div><div class='add'>+	int num_msix, i;</div><div class='add'>+</div><div class='add'>+	if (!auxr_dev-&gt;auxr_info-&gt;msix_requested) {</div><div class='add'>+		dev_warn(bd-&gt;dev, "Requested MSI-X vectors not allocated\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	num_msix = auxr_dev-&gt;auxr_info-&gt;msix_requested;</div><div class='add'>+	for (i = 0; i &lt; num_msix; i++) {</div><div class='add'>+		info[i].vector = bd-&gt;irq_tbl[i].vector;</div><div class='add'>+		info[i].db_offset = bd-&gt;db_offset;</div><div class='add'>+		info[i].ring_idx = i;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_register_dev(struct bnge_auxr_dev *auxr_dev,</div><div class='add'>+		      void *handle)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = pci_get_drvdata(auxr_dev-&gt;pdev);</div><div class='add'>+	struct bnge_auxr_info *auxr_info;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	netdev_lock(bd-&gt;netdev);</div><div class='add'>+	mutex_lock(&amp;auxr_dev-&gt;auxr_dev_lock);</div><div class='add'>+	if (!bd-&gt;irq_tbl) {</div><div class='add'>+		rc = -ENODEV;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!bnge_aux_has_enough_resources(bd)) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	auxr_info = auxr_dev-&gt;auxr_info;</div><div class='add'>+	auxr_info-&gt;handle = handle;</div><div class='add'>+</div><div class='add'>+	auxr_info-&gt;msix_requested = bd-&gt;aux_num_msix;</div><div class='add'>+</div><div class='add'>+	bnge_fill_msix_vecs(bd, bd-&gt;auxr_dev-&gt;msix_info);</div><div class='add'>+	auxr_dev-&gt;flags |= BNGE_ARDEV_MSIX_ALLOC;</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;auxr_dev-&gt;auxr_dev_lock);</div><div class='add'>+	netdev_unlock(bd-&gt;netdev);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(bnge_register_dev);</div><div class='add'>+</div><div class='add'>+void bnge_unregister_dev(struct bnge_auxr_dev *auxr_dev)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = pci_get_drvdata(auxr_dev-&gt;pdev);</div><div class='add'>+	struct bnge_auxr_info *auxr_info;</div><div class='add'>+</div><div class='add'>+	auxr_info = auxr_dev-&gt;auxr_info;</div><div class='add'>+	netdev_lock(bd-&gt;netdev);</div><div class='add'>+	mutex_lock(&amp;auxr_dev-&gt;auxr_dev_lock);</div><div class='add'>+	if (auxr_info-&gt;msix_requested)</div><div class='add'>+		auxr_dev-&gt;flags &amp;= ~BNGE_ARDEV_MSIX_ALLOC;</div><div class='add'>+	auxr_info-&gt;msix_requested = 0;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;auxr_dev-&gt;auxr_dev_lock);</div><div class='add'>+	netdev_unlock(bd-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(bnge_unregister_dev);</div><div class='add'>+</div><div class='add'>+int bnge_send_msg(struct bnge_auxr_dev *auxr_dev, struct bnge_fw_msg *fw_msg)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = pci_get_drvdata(auxr_dev-&gt;pdev);</div><div class='add'>+	struct output *resp;</div><div class='add'>+	struct input *req;</div><div class='add'>+	u32 resp_len;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, 0 /* don't care */);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_replace(bd, req, fw_msg-&gt;msg, fw_msg-&gt;msg_len);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto drop_req;</div><div class='add'>+</div><div class='add'>+	bnge_hwrm_req_timeout(bd, req, fw_msg-&gt;timeout);</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	resp_len = le16_to_cpu(resp-&gt;resp_len);</div><div class='add'>+	if (resp_len) {</div><div class='add'>+		if (fw_msg-&gt;resp_max_len &lt; resp_len)</div><div class='add'>+			resp_len = fw_msg-&gt;resp_max_len;</div><div class='add'>+</div><div class='add'>+		memcpy(fw_msg-&gt;resp, resp, resp_len);</div><div class='add'>+	}</div><div class='add'>+drop_req:</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(bnge_send_msg);</div><div class='add'>+</div><div class='add'>+void bnge_rdma_aux_device_uninit(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_auxr_priv *aux_priv;</div><div class='add'>+	struct auxiliary_device *adev;</div><div class='add'>+</div><div class='add'>+	/* Skip if no auxiliary device init was done. */</div><div class='add'>+	if (!bd-&gt;aux_priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	aux_priv = bd-&gt;aux_priv;</div><div class='add'>+	adev = &amp;aux_priv-&gt;aux_dev;</div><div class='add'>+	auxiliary_device_uninit(adev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_aux_dev_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bnge_auxr_priv *aux_priv =</div><div class='add'>+			container_of(dev, struct bnge_auxr_priv, aux_dev.dev);</div><div class='add'>+	struct bnge_dev *bd = pci_get_drvdata(aux_priv-&gt;auxr_dev-&gt;pdev);</div><div class='add'>+</div><div class='add'>+	ida_free(&amp;bnge_aux_dev_ids, aux_priv-&gt;id);</div><div class='add'>+	kfree(aux_priv-&gt;auxr_dev-&gt;auxr_info);</div><div class='add'>+	bd-&gt;auxr_dev = NULL;</div><div class='add'>+	kfree(aux_priv-&gt;auxr_dev);</div><div class='add'>+	kfree(aux_priv);</div><div class='add'>+	bd-&gt;aux_priv = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_rdma_aux_device_del(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	if (!bd-&gt;auxr_dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	auxiliary_device_delete(&amp;bd-&gt;aux_priv-&gt;aux_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_set_auxr_dev_info(struct bnge_auxr_dev *auxr_dev,</div><div class='add'>+				   struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	auxr_dev-&gt;pdev = bd-&gt;pdev;</div><div class='add'>+	auxr_dev-&gt;l2_db_size = bd-&gt;db_size;</div><div class='add'>+	auxr_dev-&gt;l2_db_size_nc = bd-&gt;db_size;</div><div class='add'>+	auxr_dev-&gt;l2_db_offset = bd-&gt;db_offset;</div><div class='add'>+	mutex_init(&amp;auxr_dev-&gt;auxr_dev_lock);</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;flags &amp; BNGE_EN_ROCE_V1)</div><div class='add'>+		auxr_dev-&gt;flags |= BNGE_ARDEV_ROCEV1_SUPP;</div><div class='add'>+	if (bd-&gt;flags &amp; BNGE_EN_ROCE_V2)</div><div class='add'>+		auxr_dev-&gt;flags |= BNGE_ARDEV_ROCEV2_SUPP;</div><div class='add'>+</div><div class='add'>+	auxr_dev-&gt;chip_num = bd-&gt;chip_num;</div><div class='add'>+	auxr_dev-&gt;hw_ring_stats_size = bd-&gt;hw_ring_stats_size;</div><div class='add'>+	auxr_dev-&gt;pf_port_id = bd-&gt;pf.port_id;</div><div class='add'>+	auxr_dev-&gt;en_state = bd-&gt;state;</div><div class='add'>+	auxr_dev-&gt;bar0 = bd-&gt;bar0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_rdma_aux_device_add(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct auxiliary_device *aux_dev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!bd-&gt;auxr_dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	aux_dev = &amp;bd-&gt;aux_priv-&gt;aux_dev;</div><div class='add'>+	rc = auxiliary_device_add(aux_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_warn(bd-&gt;dev, "Failed to add auxiliary device for ROCE\n");</div><div class='add'>+		auxiliary_device_uninit(aux_dev);</div><div class='add'>+		bd-&gt;flags &amp;= ~BNGE_EN_ROCE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bd-&gt;auxr_dev-&gt;net = bd-&gt;netdev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_rdma_aux_device_init(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct auxiliary_device *aux_dev;</div><div class='add'>+	struct bnge_auxr_info *auxr_info;</div><div class='add'>+	struct bnge_auxr_priv *aux_priv;</div><div class='add'>+	struct bnge_auxr_dev *auxr_dev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!bnge_is_roce_en(bd))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	aux_priv = kzalloc(sizeof(*aux_priv), GFP_KERNEL);</div><div class='add'>+	if (!aux_priv)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	aux_priv-&gt;id = ida_alloc(&amp;bnge_aux_dev_ids, GFP_KERNEL);</div><div class='add'>+	if (aux_priv-&gt;id &lt; 0) {</div><div class='add'>+		dev_warn(bd-&gt;dev, "ida alloc failed for aux device\n");</div><div class='add'>+		kfree(aux_priv);</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aux_dev = &amp;aux_priv-&gt;aux_dev;</div><div class='add'>+	aux_dev-&gt;id = aux_priv-&gt;id;</div><div class='add'>+	aux_dev-&gt;name = "rdma";</div><div class='add'>+	aux_dev-&gt;dev.parent = &amp;bd-&gt;pdev-&gt;dev;</div><div class='add'>+	aux_dev-&gt;dev.release = bnge_aux_dev_release;</div><div class='add'>+</div><div class='add'>+	rc = auxiliary_device_init(aux_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		ida_free(&amp;bnge_aux_dev_ids, aux_priv-&gt;id);</div><div class='add'>+		kfree(aux_priv);</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+	bd-&gt;aux_priv = aux_priv;</div><div class='add'>+</div><div class='add'>+	auxr_dev = kzalloc(sizeof(*auxr_dev), GFP_KERNEL);</div><div class='add'>+	if (!auxr_dev)</div><div class='add'>+		goto aux_dev_uninit;</div><div class='add'>+</div><div class='add'>+	aux_priv-&gt;auxr_dev = auxr_dev;</div><div class='add'>+</div><div class='add'>+	auxr_info = kzalloc(sizeof(*auxr_info), GFP_KERNEL);</div><div class='add'>+	if (!auxr_info)</div><div class='add'>+		goto aux_dev_uninit;</div><div class='add'>+</div><div class='add'>+	auxr_dev-&gt;auxr_info = auxr_info;</div><div class='add'>+	bd-&gt;auxr_dev = auxr_dev;</div><div class='add'>+	bnge_set_auxr_dev_info(auxr_dev, bd);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+aux_dev_uninit:</div><div class='add'>+	auxiliary_device_uninit(aux_dev);</div><div class='add'>+exit:</div><div class='add'>+	bd-&gt;flags &amp;= ~BNGE_EN_ROCE;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_auxr.h b/drivers/net/ethernet/broadcom/bnge/bnge_auxr.h<br/>new file mode 100644<br/>index 000000000000..6c5c15ef2b0a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_auxr.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_auxr.h</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Broadcom */</div><div class='add'>+</div><div class='add'>+#ifndef _BNGE_AUXR_H_</div><div class='add'>+#define _BNGE_AUXR_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/auxiliary_bus.h&gt;</div><div class='add'>+</div><div class='add'>+#define BNGE_MIN_ROCE_CP_RINGS	2</div><div class='add'>+#define BNGE_MIN_ROCE_STAT_CTXS	1</div><div class='add'>+</div><div class='add'>+#define BNGE_MAX_ROCE_MSIX	64</div><div class='add'>+</div><div class='add'>+struct hwrm_async_event_cmpl;</div><div class='add'>+struct bnge;</div><div class='add'>+</div><div class='add'>+struct bnge_msix_info {</div><div class='add'>+	u32	vector;</div><div class='add'>+	u32	ring_idx;</div><div class='add'>+	u32	db_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_fw_msg {</div><div class='add'>+	void	*msg;</div><div class='add'>+	int	msg_len;</div><div class='add'>+	void	*resp;</div><div class='add'>+	int	resp_max_len;</div><div class='add'>+	int	timeout;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_auxr_info {</div><div class='add'>+	void		*handle;</div><div class='add'>+	u16		msix_requested;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	BNGE_ARDEV_ROCEV1_SUPP		= BIT(0),</div><div class='add'>+	BNGE_ARDEV_ROCEV2_SUPP		= BIT(1),</div><div class='add'>+	BNGE_ARDEV_MSIX_ALLOC		= BIT(2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNGE_ARDEV_ROCE_SUPP	(BNGE_ARDEV_ROCEV1_SUPP | \</div><div class='add'>+				 BNGE_ARDEV_ROCEV2_SUPP)</div><div class='add'>+</div><div class='add'>+struct bnge_auxr_dev {</div><div class='add'>+	struct net_device	*net;</div><div class='add'>+	struct pci_dev		*pdev;</div><div class='add'>+	void __iomem		*bar0;</div><div class='add'>+</div><div class='add'>+	struct bnge_msix_info	msix_info[BNGE_MAX_ROCE_MSIX];</div><div class='add'>+</div><div class='add'>+	u32 flags;</div><div class='add'>+</div><div class='add'>+	struct bnge_auxr_info	*auxr_info;</div><div class='add'>+</div><div class='add'>+	/* Doorbell BAR size in bytes mapped by L2 driver. */</div><div class='add'>+	int	l2_db_size;</div><div class='add'>+	/* Doorbell BAR size in bytes mapped as non-cacheable. */</div><div class='add'>+	int	l2_db_size_nc;</div><div class='add'>+	/* Doorbell offset in bytes within l2_db_size_nc. */</div><div class='add'>+	int	l2_db_offset;</div><div class='add'>+</div><div class='add'>+	u16		chip_num;</div><div class='add'>+	u16		hw_ring_stats_size;</div><div class='add'>+	u16		pf_port_id;</div><div class='add'>+	unsigned long	en_state;</div><div class='add'>+</div><div class='add'>+	u16	auxr_num_msix_vec;</div><div class='add'>+	u16	auxr_num_ctxs;</div><div class='add'>+</div><div class='add'>+	/* serialize auxr operations */</div><div class='add'>+	struct mutex	auxr_dev_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void bnge_rdma_aux_device_uninit(struct bnge_dev *bdev);</div><div class='add'>+void bnge_rdma_aux_device_del(struct bnge_dev *bdev);</div><div class='add'>+void bnge_rdma_aux_device_add(struct bnge_dev *bdev);</div><div class='add'>+void bnge_rdma_aux_device_init(struct bnge_dev *bdev);</div><div class='add'>+int bnge_register_dev(struct bnge_auxr_dev *adev,</div><div class='add'>+		      void *handle);</div><div class='add'>+void bnge_unregister_dev(struct bnge_auxr_dev *adev);</div><div class='add'>+int bnge_send_msg(struct bnge_auxr_dev *adev, struct bnge_fw_msg *fw_msg);</div><div class='add'>+</div><div class='add'>+#endif /* _BNGE_AUXR_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_core.c b/drivers/net/ethernet/broadcom/bnge/bnge_core.c<br/>new file mode 100644<br/>index 000000000000..c94e132bebc8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_core.c</a></div><div class='hunk'>@@ -0,0 +1,420 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2025 Broadcom.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/crash_dump.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bnge.h"</div><div class='add'>+#include "bnge_devlink.h"</div><div class='add'>+#include "bnge_hwrm.h"</div><div class='add'>+#include "bnge_hwrm_lib.h"</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION(DRV_SUMMARY);</div><div class='add'>+</div><div class='add'>+char bnge_driver_name[] = DRV_NAME;</div><div class='add'>+</div><div class='add'>+static const struct {</div><div class='add'>+	char *name;</div><div class='add'>+} board_info[] = {</div><div class='add'>+	[BCM57708] = { "Broadcom BCM57708 50Gb/100Gb/200Gb/400Gb/800Gb Ethernet" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id bnge_pci_tbl[] = {</div><div class='add'>+	{ PCI_VDEVICE(BROADCOM, 0x1780), .driver_data = BCM57708 },</div><div class='add'>+	/* Required last entry */</div><div class='add'>+	{0, }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, bnge_pci_tbl);</div><div class='add'>+</div><div class='add'>+static void bnge_print_device_info(struct pci_dev *pdev, enum board_idx idx)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "%s found at mem %lx\n", board_info[idx].name,</div><div class='add'>+		 (long)pci_resource_start(pdev, 0));</div><div class='add'>+</div><div class='add'>+	pcie_print_link_status(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bnge_aux_registered(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_auxr_dev *ba_dev = bd-&gt;auxr_dev;</div><div class='add'>+</div><div class='add'>+	if (ba_dev &amp;&amp; ba_dev-&gt;auxr_info-&gt;msix_requested)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_nvm_cfg_ver_get(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_nvm_get_dev_info_output nvm_info;</div><div class='add'>+</div><div class='add'>+	if (!bnge_hwrm_nvm_dev_info(bd, &amp;nvm_info))</div><div class='add'>+		snprintf(bd-&gt;nvm_cfg_ver, FW_VER_STR_LEN, "%d.%d.%d",</div><div class='add'>+			 nvm_info.nvm_cfg_ver_maj, nvm_info.nvm_cfg_ver_min,</div><div class='add'>+			 nvm_info.nvm_cfg_ver_upd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_func_qcaps(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_func_qcaps(bd);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_queue_qportcfg(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "query qportcfg failure rc: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_func_resc_qcaps(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "query resc caps failure rc: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_func_qcfg(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "query config failure rc: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_vnic_qcaps(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "vnic caps failure rc: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_fw_unregister_dev(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	/* ctx mem free after unrgtr only */</div><div class='add'>+	bnge_hwrm_func_drv_unrgtr(bd);</div><div class='add'>+	bnge_free_ctx_mem(bd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_set_dflt_rss_hash_type(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	bd-&gt;rss_hash_cfg = VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4 |</div><div class='add'>+			   VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4 |</div><div class='add'>+			   VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6 |</div><div class='add'>+			   VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6 |</div><div class='add'>+			   VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4 |</div><div class='add'>+			   VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_fw_register_dev(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	bd-&gt;fw_cap = 0;</div><div class='add'>+	rc = bnge_hwrm_ver_get(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "Get Version command failed rc: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bnge_nvm_cfg_ver_get(bd);</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_func_reset(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "Failed to reset function rc: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bnge_hwrm_fw_set_time(bd);</div><div class='add'>+</div><div class='add'>+	rc =  bnge_hwrm_func_drv_rgtr(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "Failed to rgtr with firmware rc: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_ctx_mem(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "Failed to allocate ctx mem rc: %d\n", rc);</div><div class='add'>+		goto err_func_unrgtr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get the resources and configuration from firmware */</div><div class='add'>+	rc = bnge_func_qcaps(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "Failed initial configuration rc: %d\n", rc);</div><div class='add'>+		rc = -ENODEV;</div><div class='add'>+		goto err_func_unrgtr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bnge_set_dflt_rss_hash_type(bd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_func_unrgtr:</div><div class='add'>+	bnge_fw_unregister_dev(bd);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_pci_disable(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+	if (pci_is_enabled(pdev))</div><div class='add'>+		pci_disable_device(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_pci_enable(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = pci_enable_device(pdev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Cannot enable PCI device, aborting\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(pci_resource_flags(pdev, 0) &amp; IORESOURCE_MEM)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Cannot find PCI device base address, aborting\n");</div><div class='add'>+		rc = -ENODEV;</div><div class='add'>+		goto err_pci_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = pci_request_regions(pdev, bnge_driver_name);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Cannot obtain PCI resources, aborting\n");</div><div class='add'>+		goto err_pci_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_pci_disable:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_unmap_bars(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;bar1) {</div><div class='add'>+		pci_iounmap(pdev, bd-&gt;bar1);</div><div class='add'>+		bd-&gt;bar1 = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;bar0) {</div><div class='add'>+		pci_iounmap(pdev, bd-&gt;bar0);</div><div class='add'>+		bd-&gt;bar0 = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_set_max_func_irqs(struct bnge_dev *bd,</div><div class='add'>+				   unsigned int max_irqs)</div><div class='add'>+{</div><div class='add'>+	bd-&gt;hw_resc.max_irqs = max_irqs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_get_max_irq(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	u16 ctrl;</div><div class='add'>+</div><div class='add'>+	pci_read_config_word(pdev, pdev-&gt;msix_cap + PCI_MSIX_FLAGS, &amp;ctrl);</div><div class='add'>+	return (ctrl &amp; PCI_MSIX_FLAGS_QSIZE) + 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_map_db_bar(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	if (!bd-&gt;db_size)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	bd-&gt;bar1 = pci_iomap(bd-&gt;pdev, 2, bd-&gt;db_size);</div><div class='add'>+	if (!bd-&gt;bar1)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	unsigned int max_irqs;</div><div class='add'>+	struct bnge_dev *bd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (pci_is_bridge(pdev))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!pdev-&gt;msix_cap) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "MSIX capability missing, aborting\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_kdump_kernel()) {</div><div class='add'>+		pci_clear_master(pdev);</div><div class='add'>+		pcie_flr(pdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_pci_enable(pdev);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	bnge_print_device_info(pdev, ent-&gt;driver_data);</div><div class='add'>+</div><div class='add'>+	bd = bnge_devlink_alloc(pdev);</div><div class='add'>+	if (!bd) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Devlink allocation failed\n");</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_pci_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bd-&gt;bar0 = pci_ioremap_bar(pdev, 0);</div><div class='add'>+	if (!bd-&gt;bar0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed mapping BAR-0, aborting\n");</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_devl_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_init_hwrm_resources(bd);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_bar_unmap;</div><div class='add'>+</div><div class='add'>+	rc = bnge_fw_register_dev(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to register with firmware rc = %d\n", rc);</div><div class='add'>+		goto err_hwrm_cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bnge_devlink_register(bd);</div><div class='add'>+</div><div class='add'>+	max_irqs = bnge_get_max_irq(pdev);</div><div class='add'>+	bnge_set_max_func_irqs(bd, max_irqs);</div><div class='add'>+</div><div class='add'>+	bnge_aux_init_dflt_config(bd);</div><div class='add'>+</div><div class='add'>+	rc = bnge_net_init_dflt_config(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Error setting up default cfg to netdev rc = %d\n",</div><div class='add'>+			rc);</div><div class='add'>+		goto err_fw_reg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_map_db_bar(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed mapping doorbell BAR rc = %d, aborting\n",</div><div class='add'>+			rc);</div><div class='add'>+		goto err_config_uninit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#if BITS_PER_LONG == 32</div><div class='add'>+	spin_lock_init(&amp;bd-&gt;db_lock);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	bnge_rdma_aux_device_init(bd);</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_irqs(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Error IRQ allocation rc = %d\n", rc);</div><div class='add'>+		goto err_uninit_auxr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_netdev_alloc(bd, max_irqs);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_irq;</div><div class='add'>+</div><div class='add'>+	bnge_rdma_aux_device_add(bd);</div><div class='add'>+</div><div class='add'>+	pci_save_state(pdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irq:</div><div class='add'>+	bnge_free_irqs(bd);</div><div class='add'>+</div><div class='add'>+err_uninit_auxr:</div><div class='add'>+	bnge_rdma_aux_device_uninit(bd);</div><div class='add'>+</div><div class='add'>+err_config_uninit:</div><div class='add'>+	bnge_net_uninit_dflt_config(bd);</div><div class='add'>+</div><div class='add'>+err_fw_reg:</div><div class='add'>+	bnge_devlink_unregister(bd);</div><div class='add'>+	bnge_fw_unregister_dev(bd);</div><div class='add'>+</div><div class='add'>+err_hwrm_cleanup:</div><div class='add'>+	bnge_cleanup_hwrm_resources(bd);</div><div class='add'>+</div><div class='add'>+err_bar_unmap:</div><div class='add'>+	bnge_unmap_bars(pdev);</div><div class='add'>+</div><div class='add'>+err_devl_free:</div><div class='add'>+	bnge_devlink_free(bd);</div><div class='add'>+</div><div class='add'>+err_pci_disable:</div><div class='add'>+	bnge_pci_disable(pdev);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_remove_one(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	bnge_rdma_aux_device_del(bd);</div><div class='add'>+</div><div class='add'>+	bnge_netdev_free(bd);</div><div class='add'>+</div><div class='add'>+	bnge_free_irqs(bd);</div><div class='add'>+</div><div class='add'>+	bnge_rdma_aux_device_uninit(bd);</div><div class='add'>+</div><div class='add'>+	bnge_net_uninit_dflt_config(bd);</div><div class='add'>+</div><div class='add'>+	bnge_devlink_unregister(bd);</div><div class='add'>+</div><div class='add'>+	bnge_fw_unregister_dev(bd);</div><div class='add'>+</div><div class='add'>+	bnge_cleanup_hwrm_resources(bd);</div><div class='add'>+</div><div class='add'>+	bnge_unmap_bars(pdev);</div><div class='add'>+</div><div class='add'>+	bnge_devlink_free(bd);</div><div class='add'>+</div><div class='add'>+	bnge_pci_disable(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	if (system_state == SYSTEM_POWER_OFF) {</div><div class='add'>+		pci_wake_from_d3(pdev, 0);</div><div class='add'>+		pci_set_power_state(pdev, PCI_D3hot);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_driver bnge_driver = {</div><div class='add'>+	.name		= bnge_driver_name,</div><div class='add'>+	.id_table	= bnge_pci_tbl,</div><div class='add'>+	.probe		= bnge_probe_one,</div><div class='add'>+	.remove		= bnge_remove_one,</div><div class='add'>+	.shutdown	= bnge_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init bnge_init_module(void)</div><div class='add'>+{</div><div class='add'>+	return pci_register_driver(&amp;bnge_driver);</div><div class='add'>+}</div><div class='add'>+module_init(bnge_init_module);</div><div class='add'>+</div><div class='add'>+static void __exit bnge_exit_module(void)</div><div class='add'>+{</div><div class='add'>+	pci_unregister_driver(&amp;bnge_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(bnge_exit_module);</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_db.h b/drivers/net/ethernet/broadcom/bnge/bnge_db.h<br/>new file mode 100644<br/>index 000000000000..950ed582f1d8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_db.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_db.h</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Broadcom */</div><div class='add'>+</div><div class='add'>+#ifndef _BNGE_DB_H_</div><div class='add'>+#define _BNGE_DB_H_</div><div class='add'>+</div><div class='add'>+/* 64-bit doorbell */</div><div class='add'>+#define DBR_EPOCH_SFT					24</div><div class='add'>+#define DBR_TOGGLE_SFT					25</div><div class='add'>+#define DBR_XID_SFT					32</div><div class='add'>+#define DBR_PATH_L2					(0x1ULL &lt;&lt; 56)</div><div class='add'>+#define DBR_VALID					(0x1ULL &lt;&lt; 58)</div><div class='add'>+#define DBR_TYPE_SQ					(0x0ULL &lt;&lt; 60)</div><div class='add'>+#define DBR_TYPE_SRQ					(0x2ULL &lt;&lt; 60)</div><div class='add'>+#define DBR_TYPE_CQ					(0x4ULL &lt;&lt; 60)</div><div class='add'>+#define DBR_TYPE_CQ_ARMALL				(0x6ULL &lt;&lt; 60)</div><div class='add'>+#define DBR_TYPE_NQ					(0xaULL &lt;&lt; 60)</div><div class='add'>+#define DBR_TYPE_NQ_ARM					(0xbULL &lt;&lt; 60)</div><div class='add'>+#define DBR_TYPE_NQ_MASK				(0xeULL &lt;&lt; 60)</div><div class='add'>+</div><div class='add'>+struct bnge_db_info {</div><div class='add'>+	void __iomem		*doorbell;</div><div class='add'>+	u64			db_key64;</div><div class='add'>+	u32			db_ring_mask;</div><div class='add'>+	u32			db_epoch_mask;</div><div class='add'>+	u8			db_epoch_shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define DB_EPOCH(db, idx)	(((idx) &amp; (db)-&gt;db_epoch_mask) &lt;&lt;	\</div><div class='add'>+				 ((db)-&gt;db_epoch_shift))</div><div class='add'>+#define DB_RING_IDX(db, idx)	(((idx) &amp; (db)-&gt;db_ring_mask) |		\</div><div class='add'>+				 DB_EPOCH(db, idx))</div><div class='add'>+</div><div class='add'>+#endif /* _BNGE_DB_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_devlink.c b/drivers/net/ethernet/broadcom/bnge/bnge_devlink.c<br/>new file mode 100644<br/>index 000000000000..a987afebd64d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_devlink.c</a></div><div class='hunk'>@@ -0,0 +1,306 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2025 Broadcom.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bnge.h"</div><div class='add'>+#include "bnge_devlink.h"</div><div class='add'>+#include "bnge_hwrm_lib.h"</div><div class='add'>+</div><div class='add'>+static int bnge_dl_info_put(struct bnge_dev *bd, struct devlink_info_req *req,</div><div class='add'>+			    enum bnge_dl_version_type type, const char *key,</div><div class='add'>+			    char *buf)</div><div class='add'>+{</div><div class='add'>+	if (!strlen(buf))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!strcmp(key, DEVLINK_INFO_VERSION_GENERIC_FW_NCSI) ||</div><div class='add'>+	    !strcmp(key, DEVLINK_INFO_VERSION_GENERIC_FW_ROCE))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case BNGE_VERSION_FIXED:</div><div class='add'>+		return devlink_info_version_fixed_put(req, key, buf);</div><div class='add'>+	case BNGE_VERSION_RUNNING:</div><div class='add'>+		return devlink_info_version_running_put(req, key, buf);</div><div class='add'>+	case BNGE_VERSION_STORED:</div><div class='add'>+		return devlink_info_version_stored_put(req, key, buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_vpd_read_info(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = bd-&gt;pdev;</div><div class='add'>+	unsigned int vpd_size, kw_len;</div><div class='add'>+	int pos, size;</div><div class='add'>+	u8 *vpd_data;</div><div class='add'>+</div><div class='add'>+	vpd_data = pci_vpd_alloc(pdev, &amp;vpd_size);</div><div class='add'>+	if (IS_ERR(vpd_data)) {</div><div class='add'>+		pci_warn(pdev, "Unable to read VPD\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pos = pci_vpd_find_ro_info_keyword(vpd_data, vpd_size,</div><div class='add'>+					   PCI_VPD_RO_KEYWORD_PARTNO, &amp;kw_len);</div><div class='add'>+	if (pos &lt; 0)</div><div class='add'>+		goto read_sn;</div><div class='add'>+</div><div class='add'>+	size = min_t(int, kw_len, BNGE_VPD_FLD_LEN - 1);</div><div class='add'>+	memcpy(bd-&gt;board_partno, &amp;vpd_data[pos], size);</div><div class='add'>+</div><div class='add'>+read_sn:</div><div class='add'>+	pos = pci_vpd_find_ro_info_keyword(vpd_data, vpd_size,</div><div class='add'>+					   PCI_VPD_RO_KEYWORD_SERIALNO,</div><div class='add'>+					   &amp;kw_len);</div><div class='add'>+	if (pos &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	size = min_t(int, kw_len, BNGE_VPD_FLD_LEN - 1);</div><div class='add'>+	memcpy(bd-&gt;board_serialno, &amp;vpd_data[pos], size);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	kfree(vpd_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define HWRM_FW_VER_STR_LEN	16</div><div class='add'>+</div><div class='add'>+static int bnge_devlink_info_get(struct devlink *devlink,</div><div class='add'>+				 struct devlink_info_req *req,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_nvm_get_dev_info_output nvm_dev_info;</div><div class='add'>+	struct bnge_dev *bd = devlink_priv(devlink);</div><div class='add'>+	struct hwrm_ver_get_output *ver_resp;</div><div class='add'>+	char mgmt_ver[FW_VER_STR_LEN];</div><div class='add'>+	char roce_ver[FW_VER_STR_LEN];</div><div class='add'>+	char ncsi_ver[FW_VER_STR_LEN];</div><div class='add'>+	char buf[32];</div><div class='add'>+</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;dsn) {</div><div class='add'>+		char buf[32];</div><div class='add'>+		u8 dsn[8];</div><div class='add'>+		int rc;</div><div class='add'>+</div><div class='add'>+		put_unaligned_le64(bd-&gt;dsn, dsn);</div><div class='add'>+		sprintf(buf, "%02X-%02X-%02X-%02X-%02X-%02X-%02X-%02X",</div><div class='add'>+			dsn[7], dsn[6], dsn[5], dsn[4],</div><div class='add'>+			dsn[3], dsn[2], dsn[1], dsn[0]);</div><div class='add'>+		rc = devlink_info_serial_number_put(req, buf);</div><div class='add'>+		if (rc) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack, "Failed to set dsn");</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (strlen(bd-&gt;board_serialno)) {</div><div class='add'>+		rc = devlink_info_board_serial_number_put(req,</div><div class='add'>+							  bd-&gt;board_serialno);</div><div class='add'>+		if (rc) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Failed to set board serial number");</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_FIXED,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_BOARD_ID,</div><div class='add'>+			      bd-&gt;board_partno);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to set board part number");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* More information from HWRM ver get command */</div><div class='add'>+	sprintf(buf, "%X", bd-&gt;chip_num);</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_FIXED,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_ASIC_ID, buf);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to set asic id");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ver_resp = &amp;bd-&gt;ver_resp;</div><div class='add'>+	sprintf(buf, "%c%d", 'A' + ver_resp-&gt;chip_rev, ver_resp-&gt;chip_metal);</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_FIXED,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_ASIC_REV, buf);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to set asic info");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_RUNNING,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_FW_PSID,</div><div class='add'>+			      bd-&gt;nvm_cfg_ver);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to set firmware version");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buf[0] = 0;</div><div class='add'>+	strncat(buf, ver_resp-&gt;active_pkg_name, HWRM_FW_VER_STR_LEN);</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_RUNNING,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_FW, buf);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to set firmware generic version");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ver_resp-&gt;flags &amp; VER_GET_RESP_FLAGS_EXT_VER_AVAIL) {</div><div class='add'>+		snprintf(mgmt_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",</div><div class='add'>+			 ver_resp-&gt;hwrm_fw_major, ver_resp-&gt;hwrm_fw_minor,</div><div class='add'>+			 ver_resp-&gt;hwrm_fw_build, ver_resp-&gt;hwrm_fw_patch);</div><div class='add'>+</div><div class='add'>+		snprintf(ncsi_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",</div><div class='add'>+			 ver_resp-&gt;mgmt_fw_major, ver_resp-&gt;mgmt_fw_minor,</div><div class='add'>+			 ver_resp-&gt;mgmt_fw_build, ver_resp-&gt;mgmt_fw_patch);</div><div class='add'>+</div><div class='add'>+		snprintf(roce_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",</div><div class='add'>+			 ver_resp-&gt;roce_fw_major, ver_resp-&gt;roce_fw_minor,</div><div class='add'>+			 ver_resp-&gt;roce_fw_build, ver_resp-&gt;roce_fw_patch);</div><div class='add'>+	} else {</div><div class='add'>+		snprintf(mgmt_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",</div><div class='add'>+			 ver_resp-&gt;hwrm_fw_maj_8b, ver_resp-&gt;hwrm_fw_min_8b,</div><div class='add'>+			 ver_resp-&gt;hwrm_fw_bld_8b, ver_resp-&gt;hwrm_fw_rsvd_8b);</div><div class='add'>+</div><div class='add'>+		snprintf(ncsi_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",</div><div class='add'>+			 ver_resp-&gt;mgmt_fw_maj_8b, ver_resp-&gt;mgmt_fw_min_8b,</div><div class='add'>+			 ver_resp-&gt;mgmt_fw_bld_8b, ver_resp-&gt;mgmt_fw_rsvd_8b);</div><div class='add'>+</div><div class='add'>+		snprintf(roce_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",</div><div class='add'>+			 ver_resp-&gt;roce_fw_maj_8b, ver_resp-&gt;roce_fw_min_8b,</div><div class='add'>+			 ver_resp-&gt;roce_fw_bld_8b, ver_resp-&gt;roce_fw_rsvd_8b);</div><div class='add'>+	}</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_RUNNING,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_FW_MGMT, mgmt_ver);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to set firmware mgmt version");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_RUNNING,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_FW_MGMT_API,</div><div class='add'>+			      bd-&gt;hwrm_ver_supp);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to set firmware mgmt api version");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_RUNNING,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_FW_NCSI, ncsi_ver);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to set ncsi firmware version");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_RUNNING,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_FW_ROCE, roce_ver);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to set roce firmware version");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_nvm_dev_info(bd, &amp;nvm_dev_info);</div><div class='add'>+	if (!(nvm_dev_info.flags &amp; NVM_GET_DEV_INFO_RESP_FLAGS_FW_VER_VALID))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	buf[0] = 0;</div><div class='add'>+	strncat(buf, nvm_dev_info.pkg_name, HWRM_FW_VER_STR_LEN);</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_STORED,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_FW, buf);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to set roce firmware version");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(mgmt_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",</div><div class='add'>+		 nvm_dev_info.hwrm_fw_major, nvm_dev_info.hwrm_fw_minor,</div><div class='add'>+		 nvm_dev_info.hwrm_fw_build, nvm_dev_info.hwrm_fw_patch);</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_STORED,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_FW_MGMT, mgmt_ver);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to set stored firmware version");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(ncsi_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",</div><div class='add'>+		 nvm_dev_info.mgmt_fw_major, nvm_dev_info.mgmt_fw_minor,</div><div class='add'>+		 nvm_dev_info.mgmt_fw_build, nvm_dev_info.mgmt_fw_patch);</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_STORED,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_FW_NCSI, ncsi_ver);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to set stored ncsi firmware version");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(roce_ver, FW_VER_STR_LEN, "%d.%d.%d.%d",</div><div class='add'>+		 nvm_dev_info.roce_fw_major, nvm_dev_info.roce_fw_minor,</div><div class='add'>+		 nvm_dev_info.roce_fw_build, nvm_dev_info.roce_fw_patch);</div><div class='add'>+	rc = bnge_dl_info_put(bd, req, BNGE_VERSION_STORED,</div><div class='add'>+			      DEVLINK_INFO_VERSION_GENERIC_FW_ROCE, roce_ver);</div><div class='add'>+	if (rc)</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to set stored roce firmware version");</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_ops bnge_devlink_ops = {</div><div class='add'>+	.info_get = bnge_devlink_info_get,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void bnge_devlink_free(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct devlink *devlink = priv_to_devlink(bd);</div><div class='add'>+</div><div class='add'>+	devlink_free(devlink);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct bnge_dev *bnge_devlink_alloc(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	struct bnge_dev *bd;</div><div class='add'>+</div><div class='add'>+	devlink = devlink_alloc(&amp;bnge_devlink_ops, sizeof(*bd), &amp;pdev-&gt;dev);</div><div class='add'>+	if (!devlink)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	bd = devlink_priv(devlink);</div><div class='add'>+	pci_set_drvdata(pdev, bd);</div><div class='add'>+	bd-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	bd-&gt;pdev = pdev;</div><div class='add'>+</div><div class='add'>+	bd-&gt;dsn = pci_get_dsn(pdev);</div><div class='add'>+	if (!bd-&gt;dsn)</div><div class='add'>+		pci_warn(pdev, "Failed to get DSN\n");</div><div class='add'>+</div><div class='add'>+	bnge_vpd_read_info(bd);</div><div class='add'>+</div><div class='add'>+	return bd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_devlink_register(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct devlink *devlink = priv_to_devlink(bd);</div><div class='add'>+	devlink_register(devlink);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_devlink_unregister(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct devlink *devlink = priv_to_devlink(bd);</div><div class='add'>+	devlink_unregister(devlink);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_devlink.h b/drivers/net/ethernet/broadcom/bnge/bnge_devlink.h<br/>new file mode 100644<br/>index 000000000000..c6575255e650<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_devlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_devlink.h</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Broadcom */</div><div class='add'>+</div><div class='add'>+#ifndef _BNGE_DEVLINK_H_</div><div class='add'>+#define _BNGE_DEVLINK_H_</div><div class='add'>+</div><div class='add'>+enum bnge_dl_version_type {</div><div class='add'>+	BNGE_VERSION_FIXED,</div><div class='add'>+	BNGE_VERSION_RUNNING,</div><div class='add'>+	BNGE_VERSION_STORED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void bnge_devlink_free(struct bnge_dev *bd);</div><div class='add'>+struct bnge_dev *bnge_devlink_alloc(struct pci_dev *pdev);</div><div class='add'>+void bnge_devlink_register(struct bnge_dev *bd);</div><div class='add'>+void bnge_devlink_unregister(struct bnge_dev *bd);</div><div class='add'>+</div><div class='add'>+#endif /* _BNGE_DEVLINK_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_ethtool.c b/drivers/net/ethernet/broadcom/bnge/bnge_ethtool.c<br/>new file mode 100644<br/>index 000000000000..569371c1b4f2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_ethtool.c</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2025 Broadcom.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/ethtool_netlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bnge.h"</div><div class='add'>+#include "bnge_ethtool.h"</div><div class='add'>+</div><div class='add'>+static void bnge_get_drvinfo(struct net_device *dev,</div><div class='add'>+			     struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	struct bnge_net *bn = netdev_priv(dev);</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;fw_version, bd-&gt;fw_ver_str, sizeof(info-&gt;fw_version));</div><div class='add'>+	strscpy(info-&gt;bus_info, pci_name(bd-&gt;pdev), sizeof(info-&gt;bus_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops bnge_ethtool_ops = {</div><div class='add'>+	.get_drvinfo		= bnge_get_drvinfo,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void bnge_set_ethtool_ops(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;bnge_ethtool_ops;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_ethtool.h b/drivers/net/ethernet/broadcom/bnge/bnge_ethtool.h<br/>new file mode 100644<br/>index 000000000000..21e96a0976d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_ethtool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_ethtool.h</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Broadcom */</div><div class='add'>+</div><div class='add'>+#ifndef _BNGE_ETHTOOL_H_</div><div class='add'>+#define _BNGE_ETHTOOL_H_</div><div class='add'>+</div><div class='add'>+void bnge_set_ethtool_ops(struct net_device *dev);</div><div class='add'>+</div><div class='add'>+#endif /* _BNGE_ETHTOOL_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm.c b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm.c<br/>new file mode 100644<br/>index 000000000000..c3087e5cd875<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_hwrm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm.c</a></div><div class='hunk'>@@ -0,0 +1,548 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2025 Broadcom.</div><div class='add'>+</div><div class='add'>+#include &lt;asm/byteorder.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/dmapool.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bnge.h"</div><div class='add'>+#include "bnge_hwrm.h"</div><div class='add'>+</div><div class='add'>+static u64 bnge_cal_sentinel(struct bnge_hwrm_ctx *ctx, u16 req_type)</div><div class='add'>+{</div><div class='add'>+	return (((uintptr_t)ctx) + req_type) ^ BNGE_HWRM_SENTINEL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_req_create(struct bnge_dev *bd, void **req, u16 req_type,</div><div class='add'>+			 u32 req_len)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_ctx *ctx;</div><div class='add'>+	dma_addr_t dma_handle;</div><div class='add'>+	u8 *req_addr;</div><div class='add'>+</div><div class='add'>+	if (req_len &gt; BNGE_HWRM_CTX_OFFSET)</div><div class='add'>+		return -E2BIG;</div><div class='add'>+</div><div class='add'>+	req_addr = dma_pool_alloc(bd-&gt;hwrm_dma_pool, GFP_KERNEL | __GFP_ZERO,</div><div class='add'>+				  &amp;dma_handle);</div><div class='add'>+	if (!req_addr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ctx = (struct bnge_hwrm_ctx *)(req_addr + BNGE_HWRM_CTX_OFFSET);</div><div class='add'>+	/* safety first, sentinel used to check for invalid requests */</div><div class='add'>+	ctx-&gt;sentinel = bnge_cal_sentinel(ctx, req_type);</div><div class='add'>+	ctx-&gt;req_len = req_len;</div><div class='add'>+	ctx-&gt;req = (struct input *)req_addr;</div><div class='add'>+	ctx-&gt;resp = (struct output *)(req_addr + BNGE_HWRM_RESP_OFFSET);</div><div class='add'>+	ctx-&gt;dma_handle = dma_handle;</div><div class='add'>+	ctx-&gt;flags = 0; /* __GFP_ZERO, but be explicit regarding ownership */</div><div class='add'>+	ctx-&gt;timeout = bd-&gt;hwrm_cmd_timeout ?: BNGE_DFLT_HWRM_CMD_TIMEOUT;</div><div class='add'>+	ctx-&gt;allocated = BNGE_HWRM_DMA_SIZE - BNGE_HWRM_CTX_OFFSET;</div><div class='add'>+	ctx-&gt;gfp = GFP_KERNEL;</div><div class='add'>+	ctx-&gt;slice_addr = NULL;</div><div class='add'>+</div><div class='add'>+	/* initialize common request fields */</div><div class='add'>+	ctx-&gt;req-&gt;req_type = cpu_to_le16(req_type);</div><div class='add'>+	ctx-&gt;req-&gt;resp_addr = cpu_to_le64(dma_handle + BNGE_HWRM_RESP_OFFSET);</div><div class='add'>+	ctx-&gt;req-&gt;cmpl_ring = cpu_to_le16(BNGE_HWRM_NO_CMPL_RING);</div><div class='add'>+	ctx-&gt;req-&gt;target_id = cpu_to_le16(BNGE_HWRM_TARGET);</div><div class='add'>+	*req = ctx-&gt;req;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bnge_hwrm_ctx *__hwrm_ctx_get(struct bnge_dev *bd, u8 *req_addr)</div><div class='add'>+{</div><div class='add'>+	void *ctx_addr = req_addr + BNGE_HWRM_CTX_OFFSET;</div><div class='add'>+	struct input *req = (struct input *)req_addr;</div><div class='add'>+	struct bnge_hwrm_ctx *ctx = ctx_addr;</div><div class='add'>+	u64 sentinel;</div><div class='add'>+</div><div class='add'>+	if (!req) {</div><div class='add'>+		dev_err(bd-&gt;dev, "null HWRM request");</div><div class='add'>+		dump_stack();</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* HWRM API has no type safety, verify sentinel to validate address */</div><div class='add'>+	sentinel = bnge_cal_sentinel(ctx, le16_to_cpu(req-&gt;req_type));</div><div class='add'>+	if (ctx-&gt;sentinel != sentinel) {</div><div class='add'>+		dev_err(bd-&gt;dev, "HWRM sentinel mismatch, req_type = %u\n",</div><div class='add'>+			(u32)le16_to_cpu(req-&gt;req_type));</div><div class='add'>+		dump_stack();</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ctx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_hwrm_req_timeout(struct bnge_dev *bd,</div><div class='add'>+			   void *req, unsigned int timeout)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_ctx *ctx = __hwrm_ctx_get(bd, req);</div><div class='add'>+</div><div class='add'>+	if (ctx)</div><div class='add'>+		ctx-&gt;timeout = timeout;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_hwrm_req_alloc_flags(struct bnge_dev *bd, void *req, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_ctx *ctx = __hwrm_ctx_get(bd, req);</div><div class='add'>+</div><div class='add'>+	if (ctx)</div><div class='add'>+		ctx-&gt;gfp = gfp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_req_replace(struct bnge_dev *bd, void *req, void *new_req,</div><div class='add'>+			  u32 len)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_ctx *ctx = __hwrm_ctx_get(bd, req);</div><div class='add'>+	struct input *internal_req = req;</div><div class='add'>+	u16 req_type;</div><div class='add'>+</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (len &gt; BNGE_HWRM_CTX_OFFSET)</div><div class='add'>+		return -E2BIG;</div><div class='add'>+</div><div class='add'>+	/* free any existing slices */</div><div class='add'>+	ctx-&gt;allocated = BNGE_HWRM_DMA_SIZE - BNGE_HWRM_CTX_OFFSET;</div><div class='add'>+	if (ctx-&gt;slice_addr) {</div><div class='add'>+		dma_free_coherent(bd-&gt;dev, ctx-&gt;slice_size,</div><div class='add'>+				  ctx-&gt;slice_addr, ctx-&gt;slice_handle);</div><div class='add'>+		ctx-&gt;slice_addr = NULL;</div><div class='add'>+	}</div><div class='add'>+	ctx-&gt;gfp = GFP_KERNEL;</div><div class='add'>+</div><div class='add'>+	if ((bd-&gt;fw_cap &amp; BNGE_FW_CAP_SHORT_CMD) || len &gt; BNGE_HWRM_MAX_REQ_LEN) {</div><div class='add'>+		memcpy(internal_req, new_req, len);</div><div class='add'>+	} else {</div><div class='add'>+		internal_req-&gt;req_type = ((struct input *)new_req)-&gt;req_type;</div><div class='add'>+		ctx-&gt;req = new_req;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;req_len = len;</div><div class='add'>+	ctx-&gt;req-&gt;resp_addr = cpu_to_le64(ctx-&gt;dma_handle +</div><div class='add'>+					  BNGE_HWRM_RESP_OFFSET);</div><div class='add'>+</div><div class='add'>+	/* update sentinel for potentially new request type */</div><div class='add'>+	req_type = le16_to_cpu(internal_req-&gt;req_type);</div><div class='add'>+	ctx-&gt;sentinel = bnge_cal_sentinel(ctx, req_type);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_hwrm_req_flags(struct bnge_dev *bd, void *req,</div><div class='add'>+			 enum bnge_hwrm_ctx_flags flags)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_ctx *ctx = __hwrm_ctx_get(bd, req);</div><div class='add'>+</div><div class='add'>+	if (ctx)</div><div class='add'>+		ctx-&gt;flags |= (flags &amp; BNGE_HWRM_API_FLAGS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void *bnge_hwrm_req_hold(struct bnge_dev *bd, void *req)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_ctx *ctx = __hwrm_ctx_get(bd, req);</div><div class='add'>+	struct input *input = (struct input *)req;</div><div class='add'>+</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;flags &amp; BNGE_HWRM_INTERNAL_CTX_OWNED) {</div><div class='add'>+		dev_err(bd-&gt;dev, "HWRM context already owned, req_type = %u\n",</div><div class='add'>+			(u32)le16_to_cpu(input-&gt;req_type));</div><div class='add'>+		dump_stack();</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;flags |= BNGE_HWRM_INTERNAL_CTX_OWNED;</div><div class='add'>+	return ((u8 *)req) + BNGE_HWRM_RESP_OFFSET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __hwrm_ctx_invalidate(struct bnge_dev *bd,</div><div class='add'>+				  struct bnge_hwrm_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	void *addr = ((u8 *)ctx) - BNGE_HWRM_CTX_OFFSET;</div><div class='add'>+	dma_addr_t dma_handle = ctx-&gt;dma_handle; /* save before invalidate */</div><div class='add'>+</div><div class='add'>+	/* unmap any auxiliary DMA slice */</div><div class='add'>+	if (ctx-&gt;slice_addr)</div><div class='add'>+		dma_free_coherent(bd-&gt;dev, ctx-&gt;slice_size,</div><div class='add'>+				  ctx-&gt;slice_addr, ctx-&gt;slice_handle);</div><div class='add'>+</div><div class='add'>+	/* invalidate, ensure ownership, sentinel and dma_handle are cleared */</div><div class='add'>+	memset(ctx, 0, sizeof(struct bnge_hwrm_ctx));</div><div class='add'>+</div><div class='add'>+	/* return the buffer to the DMA pool */</div><div class='add'>+	if (dma_handle)</div><div class='add'>+		dma_pool_free(bd-&gt;hwrm_dma_pool, addr, dma_handle);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_hwrm_req_drop(struct bnge_dev *bd, void *req)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_ctx *ctx = __hwrm_ctx_get(bd, req);</div><div class='add'>+</div><div class='add'>+	if (ctx)</div><div class='add'>+		__hwrm_ctx_invalidate(bd, ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_map_hwrm_error(u32 hwrm_err)</div><div class='add'>+{</div><div class='add'>+	switch (hwrm_err) {</div><div class='add'>+	case HWRM_ERR_CODE_SUCCESS:</div><div class='add'>+		return 0;</div><div class='add'>+	case HWRM_ERR_CODE_RESOURCE_LOCKED:</div><div class='add'>+		return -EROFS;</div><div class='add'>+	case HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED:</div><div class='add'>+		return -EACCES;</div><div class='add'>+	case HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR:</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	case HWRM_ERR_CODE_INVALID_PARAMS:</div><div class='add'>+	case HWRM_ERR_CODE_INVALID_FLAGS:</div><div class='add'>+	case HWRM_ERR_CODE_INVALID_ENABLES:</div><div class='add'>+	case HWRM_ERR_CODE_UNSUPPORTED_TLV:</div><div class='add'>+	case HWRM_ERR_CODE_UNSUPPORTED_OPTION_ERR:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	case HWRM_ERR_CODE_NO_BUFFER:</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	case HWRM_ERR_CODE_HOT_RESET_PROGRESS:</div><div class='add'>+	case HWRM_ERR_CODE_BUSY:</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	case HWRM_ERR_CODE_CMD_NOT_SUPPORTED:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	case HWRM_ERR_CODE_PF_UNAVAILABLE:</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	default:</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bnge_hwrm_wait_token *</div><div class='add'>+bnge_hwrm_create_token(struct bnge_dev *bd, enum bnge_hwrm_chnl dst)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_wait_token *token;</div><div class='add'>+</div><div class='add'>+	token = kzalloc(sizeof(*token), GFP_KERNEL);</div><div class='add'>+	if (!token)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;bd-&gt;hwrm_cmd_lock);</div><div class='add'>+</div><div class='add'>+	token-&gt;dst = dst;</div><div class='add'>+	token-&gt;state = BNGE_HWRM_PENDING;</div><div class='add'>+	if (dst == BNGE_HWRM_CHNL_CHIMP) {</div><div class='add'>+		token-&gt;seq_id = bd-&gt;hwrm_cmd_seq++;</div><div class='add'>+		hlist_add_head_rcu(&amp;token-&gt;node, &amp;bd-&gt;hwrm_pending_list);</div><div class='add'>+	} else {</div><div class='add'>+		token-&gt;seq_id = bd-&gt;hwrm_cmd_kong_seq++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return token;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+bnge_hwrm_destroy_token(struct bnge_dev *bd, struct bnge_hwrm_wait_token *token)</div><div class='add'>+{</div><div class='add'>+	if (token-&gt;dst == BNGE_HWRM_CHNL_CHIMP) {</div><div class='add'>+		hlist_del_rcu(&amp;token-&gt;node);</div><div class='add'>+		kfree_rcu(token, rcu);</div><div class='add'>+	} else {</div><div class='add'>+		kfree(token);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;bd-&gt;hwrm_cmd_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_req_dbg(struct bnge_dev *bd, struct input *req)</div><div class='add'>+{</div><div class='add'>+	u32 ring = le16_to_cpu(req-&gt;cmpl_ring);</div><div class='add'>+	u32 type = le16_to_cpu(req-&gt;req_type);</div><div class='add'>+	u32 tgt = le16_to_cpu(req-&gt;target_id);</div><div class='add'>+	u32 seq = le16_to_cpu(req-&gt;seq_id);</div><div class='add'>+	char opt[32] = "\n";</div><div class='add'>+</div><div class='add'>+	if (unlikely(ring != (u16)BNGE_HWRM_NO_CMPL_RING))</div><div class='add'>+		snprintf(opt, 16, " ring %d\n", ring);</div><div class='add'>+</div><div class='add'>+	if (unlikely(tgt != BNGE_HWRM_TARGET))</div><div class='add'>+		snprintf(opt + strlen(opt) - 1, 16, " tgt 0x%x\n", tgt);</div><div class='add'>+</div><div class='add'>+	dev_dbg(bd-&gt;dev, "sent hwrm req_type 0x%x seq id 0x%x%s",</div><div class='add'>+		type, seq, opt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define bnge_hwrm_err(bd, ctx, fmt, ...)		\</div><div class='add'>+	do {							       \</div><div class='add'>+		if ((ctx)-&gt;flags &amp; BNGE_HWRM_CTX_SILENT)	       \</div><div class='add'>+			dev_dbg((bd)-&gt;dev, fmt, __VA_ARGS__);       \</div><div class='add'>+		else						       \</div><div class='add'>+			dev_err((bd)-&gt;dev, fmt, __VA_ARGS__);       \</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+static int __hwrm_send_ctx(struct bnge_dev *bd, struct bnge_hwrm_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	u32 doorbell_offset = BNGE_GRCPF_REG_CHIMP_COMM_TRIGGER;</div><div class='add'>+	enum bnge_hwrm_chnl dst = BNGE_HWRM_CHNL_CHIMP;</div><div class='add'>+	u32 bar_offset = BNGE_GRCPF_REG_CHIMP_COMM;</div><div class='add'>+	struct bnge_hwrm_wait_token *token = NULL;</div><div class='add'>+	u16 max_req_len = BNGE_HWRM_MAX_REQ_LEN;</div><div class='add'>+	unsigned int i, timeout, tmo_count;</div><div class='add'>+	u32 *data = (u32 *)ctx-&gt;req;</div><div class='add'>+	u32 msg_len = ctx-&gt;req_len;</div><div class='add'>+	int rc = -EBUSY;</div><div class='add'>+	u32 req_type;</div><div class='add'>+	u16 len = 0;</div><div class='add'>+	u8 *valid;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;flags &amp; BNGE_HWRM_INTERNAL_RESP_DIRTY)</div><div class='add'>+		memset(ctx-&gt;resp, 0, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	req_type = le16_to_cpu(ctx-&gt;req-&gt;req_type);</div><div class='add'>+</div><div class='add'>+	if (msg_len &gt; BNGE_HWRM_MAX_REQ_LEN &amp;&amp;</div><div class='add'>+	    msg_len &gt; bd-&gt;hwrm_max_ext_req_len) {</div><div class='add'>+		dev_warn(bd-&gt;dev, "oversized hwrm request, req_type 0x%x",</div><div class='add'>+			 req_type);</div><div class='add'>+		rc = -E2BIG;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	token = bnge_hwrm_create_token(bd, dst);</div><div class='add'>+	if (!token) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+	ctx-&gt;req-&gt;seq_id = cpu_to_le16(token-&gt;seq_id);</div><div class='add'>+</div><div class='add'>+	/* Ensure any associated DMA buffers are written before doorbell */</div><div class='add'>+	wmb();</div><div class='add'>+</div><div class='add'>+	/* Write request msg to hwrm channel */</div><div class='add'>+	__iowrite32_copy(bd-&gt;bar0 + bar_offset, data, msg_len / 4);</div><div class='add'>+</div><div class='add'>+	for (i = msg_len; i &lt; max_req_len; i += 4)</div><div class='add'>+		writel(0, bd-&gt;bar0 + bar_offset + i);</div><div class='add'>+</div><div class='add'>+	/* Ring channel doorbell */</div><div class='add'>+	writel(1, bd-&gt;bar0 + doorbell_offset);</div><div class='add'>+</div><div class='add'>+	bnge_hwrm_req_dbg(bd, ctx-&gt;req);</div><div class='add'>+</div><div class='add'>+	/* Limit timeout to an upper limit */</div><div class='add'>+	timeout = min(ctx-&gt;timeout,</div><div class='add'>+		      bd-&gt;hwrm_cmd_max_timeout ?: BNGE_HWRM_CMD_MAX_TIMEOUT);</div><div class='add'>+	/* convert timeout to usec */</div><div class='add'>+	timeout *= 1000;</div><div class='add'>+</div><div class='add'>+	i = 0;</div><div class='add'>+	/* Short timeout for the first few iterations:</div><div class='add'>+	 * number of loops = number of loops for short timeout +</div><div class='add'>+	 * number of loops for standard timeout.</div><div class='add'>+	 */</div><div class='add'>+	tmo_count = BNGE_HWRM_SHORT_TIMEOUT_COUNTER;</div><div class='add'>+	timeout = timeout - BNGE_HWRM_SHORT_MIN_TIMEOUT *</div><div class='add'>+			BNGE_HWRM_SHORT_TIMEOUT_COUNTER;</div><div class='add'>+	tmo_count += DIV_ROUND_UP(timeout, BNGE_HWRM_MIN_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	if (le16_to_cpu(ctx-&gt;req-&gt;cmpl_ring) != INVALID_HW_RING_ID) {</div><div class='add'>+		/* Wait until hwrm response cmpl interrupt is processed */</div><div class='add'>+		while (READ_ONCE(token-&gt;state) &lt; BNGE_HWRM_COMPLETE &amp;&amp;</div><div class='add'>+		       i++ &lt; tmo_count) {</div><div class='add'>+			/* on first few passes, just barely sleep */</div><div class='add'>+			if (i &lt; BNGE_HWRM_SHORT_TIMEOUT_COUNTER) {</div><div class='add'>+				usleep_range(BNGE_HWRM_SHORT_MIN_TIMEOUT,</div><div class='add'>+					     BNGE_HWRM_SHORT_MAX_TIMEOUT);</div><div class='add'>+			} else {</div><div class='add'>+				usleep_range(BNGE_HWRM_MIN_TIMEOUT,</div><div class='add'>+					     BNGE_HWRM_MAX_TIMEOUT);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (READ_ONCE(token-&gt;state) != BNGE_HWRM_COMPLETE) {</div><div class='add'>+			bnge_hwrm_err(bd, ctx, "No hwrm cmpl received: 0x%x\n",</div><div class='add'>+				      req_type);</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+		len = le16_to_cpu(READ_ONCE(ctx-&gt;resp-&gt;resp_len));</div><div class='add'>+		valid = ((u8 *)ctx-&gt;resp) + len - 1;</div><div class='add'>+	} else {</div><div class='add'>+		__le16 seen_out_of_seq = ctx-&gt;req-&gt;seq_id; /* will never see */</div><div class='add'>+		int j;</div><div class='add'>+</div><div class='add'>+		/* Check if response len is updated */</div><div class='add'>+		for (i = 0; i &lt; tmo_count; i++) {</div><div class='add'>+			if (token &amp;&amp;</div><div class='add'>+			    READ_ONCE(token-&gt;state) == BNGE_HWRM_DEFERRED) {</div><div class='add'>+				bnge_hwrm_destroy_token(bd, token);</div><div class='add'>+				token = NULL;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			len = le16_to_cpu(READ_ONCE(ctx-&gt;resp-&gt;resp_len));</div><div class='add'>+			if (len) {</div><div class='add'>+				__le16 resp_seq = READ_ONCE(ctx-&gt;resp-&gt;seq_id);</div><div class='add'>+</div><div class='add'>+				if (resp_seq == ctx-&gt;req-&gt;seq_id)</div><div class='add'>+					break;</div><div class='add'>+				if (resp_seq != seen_out_of_seq) {</div><div class='add'>+					dev_warn(bd-&gt;dev, "Discarding out of seq response: 0x%x for msg {0x%x 0x%x}\n",</div><div class='add'>+						 le16_to_cpu(resp_seq), req_type, le16_to_cpu(ctx-&gt;req-&gt;seq_id));</div><div class='add'>+					seen_out_of_seq = resp_seq;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* on first few passes, just barely sleep */</div><div class='add'>+			if (i &lt; BNGE_HWRM_SHORT_TIMEOUT_COUNTER) {</div><div class='add'>+				usleep_range(BNGE_HWRM_SHORT_MIN_TIMEOUT,</div><div class='add'>+					     BNGE_HWRM_SHORT_MAX_TIMEOUT);</div><div class='add'>+			} else {</div><div class='add'>+				usleep_range(BNGE_HWRM_MIN_TIMEOUT,</div><div class='add'>+					     BNGE_HWRM_MAX_TIMEOUT);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (i &gt;= tmo_count) {</div><div class='add'>+			bnge_hwrm_err(bd, ctx,</div><div class='add'>+				      "Error (timeout: %u) msg {0x%x 0x%x} len:%d\n",</div><div class='add'>+				      bnge_hwrm_timeout(i), req_type,</div><div class='add'>+				      le16_to_cpu(ctx-&gt;req-&gt;seq_id), len);</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Last byte of resp contains valid bit */</div><div class='add'>+		valid = ((u8 *)ctx-&gt;resp) + len - 1;</div><div class='add'>+		for (j = 0; j &lt; BNGE_HWRM_FIN_WAIT_USEC; ) {</div><div class='add'>+			/* make sure we read from updated DMA memory */</div><div class='add'>+			dma_rmb();</div><div class='add'>+			if (*valid)</div><div class='add'>+				break;</div><div class='add'>+			if (j &lt; 10) {</div><div class='add'>+				udelay(1);</div><div class='add'>+				j++;</div><div class='add'>+			} else {</div><div class='add'>+				usleep_range(20, 30);</div><div class='add'>+				j += 20;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (j &gt;= BNGE_HWRM_FIN_WAIT_USEC) {</div><div class='add'>+			bnge_hwrm_err(bd, ctx, "Error (timeout: %u) msg {0x%x 0x%x} len:%d v:%d\n",</div><div class='add'>+				      bnge_hwrm_timeout(i) + j, req_type,</div><div class='add'>+				      le16_to_cpu(ctx-&gt;req-&gt;seq_id), len, *valid);</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Zero valid bit for compatibility.  Valid bit in an older spec</div><div class='add'>+	 * may become a new field in a newer spec.  We must make sure that</div><div class='add'>+	 * a new field not implemented by old spec will read zero.</div><div class='add'>+	 */</div><div class='add'>+	*valid = 0;</div><div class='add'>+	rc = le16_to_cpu(ctx-&gt;resp-&gt;error_code);</div><div class='add'>+	if (rc == HWRM_ERR_CODE_BUSY &amp;&amp; !(ctx-&gt;flags &amp; BNGE_HWRM_CTX_SILENT))</div><div class='add'>+		dev_warn(bd-&gt;dev, "FW returned busy, hwrm req_type 0x%x\n",</div><div class='add'>+			 req_type);</div><div class='add'>+	else if (rc &amp;&amp; rc != HWRM_ERR_CODE_PF_UNAVAILABLE)</div><div class='add'>+		bnge_hwrm_err(bd, ctx, "hwrm req_type 0x%x seq id 0x%x error %d\n",</div><div class='add'>+			      req_type, le16_to_cpu(ctx-&gt;req-&gt;seq_id), rc);</div><div class='add'>+	rc = bnge_map_hwrm_error(rc);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	if (token)</div><div class='add'>+		bnge_hwrm_destroy_token(bd, token);</div><div class='add'>+	if (ctx-&gt;flags &amp; BNGE_HWRM_INTERNAL_CTX_OWNED)</div><div class='add'>+		ctx-&gt;flags |= BNGE_HWRM_INTERNAL_RESP_DIRTY;</div><div class='add'>+	else</div><div class='add'>+		__hwrm_ctx_invalidate(bd, ctx);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_req_send(struct bnge_dev *bd, void *req)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_ctx *ctx = __hwrm_ctx_get(bd, req);</div><div class='add'>+</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return __hwrm_send_ctx(bd, ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_req_send_silent(struct bnge_dev *bd, void *req)</div><div class='add'>+{</div><div class='add'>+	bnge_hwrm_req_flags(bd, req, BNGE_HWRM_CTX_SILENT);</div><div class='add'>+	return bnge_hwrm_req_send(bd, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void *</div><div class='add'>+bnge_hwrm_req_dma_slice(struct bnge_dev *bd, void *req, u32 size,</div><div class='add'>+			dma_addr_t *dma_handle)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_ctx *ctx = __hwrm_ctx_get(bd, req);</div><div class='add'>+	u8 *end = ((u8 *)req) + BNGE_HWRM_DMA_SIZE;</div><div class='add'>+	struct input *input = req;</div><div class='add'>+	u8 *addr, *req_addr = req;</div><div class='add'>+	u32 max_offset, offset;</div><div class='add'>+</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	max_offset = BNGE_HWRM_DMA_SIZE - ctx-&gt;allocated;</div><div class='add'>+	offset = max_offset - size;</div><div class='add'>+	offset = ALIGN_DOWN(offset, BNGE_HWRM_DMA_ALIGN);</div><div class='add'>+	addr = req_addr + offset;</div><div class='add'>+</div><div class='add'>+	if (addr &lt; req_addr + max_offset &amp;&amp; req_addr + ctx-&gt;req_len &lt;= addr) {</div><div class='add'>+		ctx-&gt;allocated = end - addr;</div><div class='add'>+		*dma_handle = ctx-&gt;dma_handle + offset;</div><div class='add'>+		return addr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;slice_addr) {</div><div class='add'>+		dev_err(bd-&gt;dev, "HWRM refusing to reallocate DMA slice, req_type = %u\n",</div><div class='add'>+			(u32)le16_to_cpu(input-&gt;req_type));</div><div class='add'>+		dump_stack();</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	addr = dma_alloc_coherent(bd-&gt;dev, size, dma_handle, ctx-&gt;gfp);</div><div class='add'>+	if (!addr)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;slice_addr = addr;</div><div class='add'>+	ctx-&gt;slice_size = size;</div><div class='add'>+	ctx-&gt;slice_handle = *dma_handle;</div><div class='add'>+</div><div class='add'>+	return addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_cleanup_hwrm_resources(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hwrm_wait_token *token;</div><div class='add'>+</div><div class='add'>+	dma_pool_destroy(bd-&gt;hwrm_dma_pool);</div><div class='add'>+	bd-&gt;hwrm_dma_pool = NULL;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	hlist_for_each_entry_rcu(token, &amp;bd-&gt;hwrm_pending_list, node)</div><div class='add'>+		WRITE_ONCE(token-&gt;state, BNGE_HWRM_CANCELLED);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_init_hwrm_resources(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	bd-&gt;hwrm_dma_pool = dma_pool_create("bnge_hwrm", bd-&gt;dev,</div><div class='add'>+					    BNGE_HWRM_DMA_SIZE,</div><div class='add'>+					    BNGE_HWRM_DMA_ALIGN, 0);</div><div class='add'>+	if (!bd-&gt;hwrm_dma_pool)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	INIT_HLIST_HEAD(&amp;bd-&gt;hwrm_pending_list);</div><div class='add'>+	mutex_init(&amp;bd-&gt;hwrm_cmd_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm.h b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm.h<br/>new file mode 100644<br/>index 000000000000..6df629761d95<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_hwrm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm.h</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Broadcom */</div><div class='add'>+</div><div class='add'>+#ifndef _BNGE_HWRM_H_</div><div class='add'>+#define _BNGE_HWRM_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='add'>+</div><div class='add'>+enum bnge_hwrm_ctx_flags {</div><div class='add'>+	BNGE_HWRM_INTERNAL_CTX_OWNED	= BIT(0),</div><div class='add'>+	BNGE_HWRM_INTERNAL_RESP_DIRTY	= BIT(1),</div><div class='add'>+	BNGE_HWRM_CTX_SILENT		= BIT(2),</div><div class='add'>+	BNGE_HWRM_FULL_WAIT		= BIT(3),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNGE_HWRM_API_FLAGS (BNGE_HWRM_CTX_SILENT | BNGE_HWRM_FULL_WAIT)</div><div class='add'>+</div><div class='add'>+struct bnge_hwrm_ctx {</div><div class='add'>+	u64 sentinel;</div><div class='add'>+	dma_addr_t dma_handle;</div><div class='add'>+	struct output *resp;</div><div class='add'>+	struct input *req;</div><div class='add'>+	dma_addr_t slice_handle;</div><div class='add'>+	void *slice_addr;</div><div class='add'>+	u32 slice_size;</div><div class='add'>+	u32 req_len;</div><div class='add'>+	enum bnge_hwrm_ctx_flags flags;</div><div class='add'>+	unsigned int timeout;</div><div class='add'>+	u32 allocated;</div><div class='add'>+	gfp_t gfp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum bnge_hwrm_wait_state {</div><div class='add'>+	BNGE_HWRM_PENDING,</div><div class='add'>+	BNGE_HWRM_DEFERRED,</div><div class='add'>+	BNGE_HWRM_COMPLETE,</div><div class='add'>+	BNGE_HWRM_CANCELLED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum bnge_hwrm_chnl { BNGE_HWRM_CHNL_CHIMP, BNGE_HWRM_CHNL_KONG };</div><div class='add'>+</div><div class='add'>+struct bnge_hwrm_wait_token {</div><div class='add'>+	struct rcu_head rcu;</div><div class='add'>+	struct hlist_node node;</div><div class='add'>+	enum bnge_hwrm_wait_state state;</div><div class='add'>+	enum bnge_hwrm_chnl dst;</div><div class='add'>+	u16 seq_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNGE_DFLT_HWRM_CMD_TIMEOUT		500</div><div class='add'>+</div><div class='add'>+#define BNGE_GRCPF_REG_CHIMP_COMM		0x0</div><div class='add'>+#define BNGE_GRCPF_REG_CHIMP_COMM_TRIGGER	0x100</div><div class='add'>+</div><div class='add'>+#define BNGE_HWRM_MAX_REQ_LEN		(bd-&gt;hwrm_max_req_len)</div><div class='add'>+#define BNGE_HWRM_SHORT_REQ_LEN		sizeof(struct hwrm_short_input)</div><div class='add'>+#define BNGE_HWRM_CMD_MAX_TIMEOUT	40000U</div><div class='add'>+#define BNGE_SHORT_HWRM_CMD_TIMEOUT	20</div><div class='add'>+#define BNGE_HWRM_CMD_TIMEOUT		(bd-&gt;hwrm_cmd_timeout)</div><div class='add'>+#define BNGE_HWRM_RESET_TIMEOUT		((BNGE_HWRM_CMD_TIMEOUT) * 4)</div><div class='add'>+#define BNGE_HWRM_TARGET		0xffff</div><div class='add'>+#define BNGE_HWRM_NO_CMPL_RING		-1</div><div class='add'>+#define BNGE_HWRM_REQ_MAX_SIZE		128</div><div class='add'>+#define BNGE_HWRM_DMA_SIZE		(2 * PAGE_SIZE) /* space for req+resp */</div><div class='add'>+#define BNGE_HWRM_RESP_RESERVED		PAGE_SIZE</div><div class='add'>+#define BNGE_HWRM_RESP_OFFSET		(BNGE_HWRM_DMA_SIZE -		\</div><div class='add'>+					 BNGE_HWRM_RESP_RESERVED)</div><div class='add'>+#define BNGE_HWRM_CTX_OFFSET		(BNGE_HWRM_RESP_OFFSET -	\</div><div class='add'>+					 sizeof(struct bnge_hwrm_ctx))</div><div class='add'>+#define BNGE_HWRM_DMA_ALIGN		16</div><div class='add'>+#define BNGE_HWRM_SENTINEL		0xb6e1f68a12e9a7eb /* arbitrary value */</div><div class='add'>+#define BNGE_HWRM_SHORT_MIN_TIMEOUT		3</div><div class='add'>+#define BNGE_HWRM_SHORT_MAX_TIMEOUT		10</div><div class='add'>+#define BNGE_HWRM_SHORT_TIMEOUT_COUNTER		5</div><div class='add'>+</div><div class='add'>+#define BNGE_HWRM_MIN_TIMEOUT		25</div><div class='add'>+#define BNGE_HWRM_MAX_TIMEOUT		40</div><div class='add'>+</div><div class='add'>+static inline unsigned int bnge_hwrm_timeout(unsigned int n)</div><div class='add'>+{</div><div class='add'>+	return n &lt;= BNGE_HWRM_SHORT_TIMEOUT_COUNTER ?</div><div class='add'>+		n * BNGE_HWRM_SHORT_MIN_TIMEOUT :</div><div class='add'>+		BNGE_HWRM_SHORT_TIMEOUT_COUNTER *</div><div class='add'>+			BNGE_HWRM_SHORT_MIN_TIMEOUT +</div><div class='add'>+			(n - BNGE_HWRM_SHORT_TIMEOUT_COUNTER) *</div><div class='add'>+				BNGE_HWRM_MIN_TIMEOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define BNGE_HWRM_FIN_WAIT_USEC	50000</div><div class='add'>+</div><div class='add'>+void bnge_cleanup_hwrm_resources(struct bnge_dev *bd);</div><div class='add'>+int bnge_init_hwrm_resources(struct bnge_dev *bd);</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_req_create(struct bnge_dev *bd, void **req, u16 req_type,</div><div class='add'>+			 u32 req_len);</div><div class='add'>+#define bnge_hwrm_req_init(bd, req, req_type) \</div><div class='add'>+	bnge_hwrm_req_create((bd), (void **)&amp;(req), (req_type),	\</div><div class='add'>+			     sizeof(*(req)))</div><div class='add'>+void *bnge_hwrm_req_hold(struct bnge_dev *bd, void *req);</div><div class='add'>+void bnge_hwrm_req_drop(struct bnge_dev *bd, void *req);</div><div class='add'>+void bnge_hwrm_req_flags(struct bnge_dev *bd, void *req,</div><div class='add'>+			 enum bnge_hwrm_ctx_flags flags);</div><div class='add'>+void bnge_hwrm_req_timeout(struct bnge_dev *bd, void *req,</div><div class='add'>+			   unsigned int timeout);</div><div class='add'>+int bnge_hwrm_req_send(struct bnge_dev *bd, void *req);</div><div class='add'>+int bnge_hwrm_req_send_silent(struct bnge_dev *bd, void *req);</div><div class='add'>+void bnge_hwrm_req_alloc_flags(struct bnge_dev *bd, void *req, gfp_t flags);</div><div class='add'>+void *bnge_hwrm_req_dma_slice(struct bnge_dev *bd, void *req, u32 size,</div><div class='add'>+			      dma_addr_t *dma);</div><div class='add'>+int bnge_hwrm_req_replace(struct bnge_dev *bd, void *req, void *new_req,</div><div class='add'>+			  u32 len);</div><div class='add'>+#endif /* _BNGE_HWRM_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c<br/>new file mode 100644<br/>index 000000000000..198f49b40dbf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c</a></div><div class='hunk'>@@ -0,0 +1,1185 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2025 Broadcom.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;net/netdev_queues.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bnge.h"</div><div class='add'>+#include "bnge_hwrm.h"</div><div class='add'>+#include "bnge_hwrm_lib.h"</div><div class='add'>+#include "bnge_rmem.h"</div><div class='add'>+#include "bnge_resc.h"</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_ver_get(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	u32 dev_caps_cfg, hwrm_ver, hwrm_spec_code;</div><div class='add'>+	u16 fw_maj, fw_min, fw_bld, fw_rsv;</div><div class='add'>+	struct hwrm_ver_get_output *resp;</div><div class='add'>+	struct hwrm_ver_get_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_VER_GET);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	bnge_hwrm_req_flags(bd, req, BNGE_HWRM_FULL_WAIT);</div><div class='add'>+	bd-&gt;hwrm_max_req_len = HWRM_MAX_REQ_LEN;</div><div class='add'>+	req-&gt;hwrm_intf_maj = HWRM_VERSION_MAJOR;</div><div class='add'>+	req-&gt;hwrm_intf_min = HWRM_VERSION_MINOR;</div><div class='add'>+	req-&gt;hwrm_intf_upd = HWRM_VERSION_UPDATE;</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto hwrm_ver_get_exit;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;bd-&gt;ver_resp, resp, sizeof(struct hwrm_ver_get_output));</div><div class='add'>+</div><div class='add'>+	hwrm_spec_code = resp-&gt;hwrm_intf_maj_8b &lt;&lt; 16 |</div><div class='add'>+			 resp-&gt;hwrm_intf_min_8b &lt;&lt; 8 |</div><div class='add'>+			 resp-&gt;hwrm_intf_upd_8b;</div><div class='add'>+	hwrm_ver = HWRM_VERSION_MAJOR &lt;&lt; 16 | HWRM_VERSION_MINOR &lt;&lt; 8 |</div><div class='add'>+			HWRM_VERSION_UPDATE;</div><div class='add'>+</div><div class='add'>+	if (hwrm_spec_code &gt; hwrm_ver)</div><div class='add'>+		snprintf(bd-&gt;hwrm_ver_supp, FW_VER_STR_LEN, "%d.%d.%d",</div><div class='add'>+			 HWRM_VERSION_MAJOR, HWRM_VERSION_MINOR,</div><div class='add'>+			 HWRM_VERSION_UPDATE);</div><div class='add'>+	else</div><div class='add'>+		snprintf(bd-&gt;hwrm_ver_supp, FW_VER_STR_LEN, "%d.%d.%d",</div><div class='add'>+			 resp-&gt;hwrm_intf_maj_8b, resp-&gt;hwrm_intf_min_8b,</div><div class='add'>+			 resp-&gt;hwrm_intf_upd_8b);</div><div class='add'>+</div><div class='add'>+	fw_maj = le16_to_cpu(resp-&gt;hwrm_fw_major);</div><div class='add'>+	fw_min = le16_to_cpu(resp-&gt;hwrm_fw_minor);</div><div class='add'>+	fw_bld = le16_to_cpu(resp-&gt;hwrm_fw_build);</div><div class='add'>+	fw_rsv = le16_to_cpu(resp-&gt;hwrm_fw_patch);</div><div class='add'>+</div><div class='add'>+	bd-&gt;fw_ver_code = BNGE_FW_VER_CODE(fw_maj, fw_min, fw_bld, fw_rsv);</div><div class='add'>+	snprintf(bd-&gt;fw_ver_str, FW_VER_STR_LEN, "%d.%d.%d.%d",</div><div class='add'>+		 fw_maj, fw_min, fw_bld, fw_rsv);</div><div class='add'>+</div><div class='add'>+	if (strlen(resp-&gt;active_pkg_name)) {</div><div class='add'>+		int fw_ver_len = strlen(bd-&gt;fw_ver_str);</div><div class='add'>+</div><div class='add'>+		snprintf(bd-&gt;fw_ver_str + fw_ver_len,</div><div class='add'>+			 FW_VER_STR_LEN - fw_ver_len - 1, "/pkg %s",</div><div class='add'>+			 resp-&gt;active_pkg_name);</div><div class='add'>+		bd-&gt;fw_cap |= BNGE_FW_CAP_PKG_VER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bd-&gt;hwrm_cmd_timeout = le16_to_cpu(resp-&gt;def_req_timeout);</div><div class='add'>+	if (!bd-&gt;hwrm_cmd_timeout)</div><div class='add'>+		bd-&gt;hwrm_cmd_timeout = BNGE_DFLT_HWRM_CMD_TIMEOUT;</div><div class='add'>+	bd-&gt;hwrm_cmd_max_timeout = le16_to_cpu(resp-&gt;max_req_timeout) * 1000;</div><div class='add'>+	if (!bd-&gt;hwrm_cmd_max_timeout)</div><div class='add'>+		bd-&gt;hwrm_cmd_max_timeout = BNGE_HWRM_CMD_MAX_TIMEOUT;</div><div class='add'>+	else if (bd-&gt;hwrm_cmd_max_timeout &gt; BNGE_HWRM_CMD_MAX_TIMEOUT)</div><div class='add'>+		dev_warn(bd-&gt;dev, "Default HWRM commands max timeout increased to %d seconds\n",</div><div class='add'>+			 bd-&gt;hwrm_cmd_max_timeout / 1000);</div><div class='add'>+</div><div class='add'>+	bd-&gt;hwrm_max_req_len = le16_to_cpu(resp-&gt;max_req_win_len);</div><div class='add'>+	bd-&gt;hwrm_max_ext_req_len = le16_to_cpu(resp-&gt;max_ext_req_len);</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;hwrm_max_ext_req_len &lt; HWRM_MAX_REQ_LEN)</div><div class='add'>+		bd-&gt;hwrm_max_ext_req_len = HWRM_MAX_REQ_LEN;</div><div class='add'>+</div><div class='add'>+	bd-&gt;chip_num = le16_to_cpu(resp-&gt;chip_num);</div><div class='add'>+	bd-&gt;chip_rev = resp-&gt;chip_rev;</div><div class='add'>+</div><div class='add'>+	dev_caps_cfg = le32_to_cpu(resp-&gt;dev_caps_cfg);</div><div class='add'>+	if ((dev_caps_cfg &amp; VER_GET_RESP_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED) &amp;&amp;</div><div class='add'>+	    (dev_caps_cfg &amp; VER_GET_RESP_DEV_CAPS_CFG_SHORT_CMD_REQUIRED))</div><div class='add'>+		bd-&gt;fw_cap |= BNGE_FW_CAP_SHORT_CMD;</div><div class='add'>+</div><div class='add'>+	if (dev_caps_cfg &amp; VER_GET_RESP_DEV_CAPS_CFG_KONG_MB_CHNL_SUPPORTED)</div><div class='add'>+		bd-&gt;fw_cap |= BNGE_FW_CAP_KONG_MB_CHNL;</div><div class='add'>+</div><div class='add'>+	if (dev_caps_cfg &amp;</div><div class='add'>+	    VER_GET_RESP_DEV_CAPS_CFG_CFA_ADV_FLOW_MGNT_SUPPORTED)</div><div class='add'>+		bd-&gt;fw_cap |= BNGE_FW_CAP_CFA_ADV_FLOW;</div><div class='add'>+</div><div class='add'>+hwrm_ver_get_exit:</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+bnge_hwrm_nvm_dev_info(struct bnge_dev *bd,</div><div class='add'>+		       struct hwrm_nvm_get_dev_info_output *nvm_info)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_nvm_get_dev_info_output *resp;</div><div class='add'>+	struct hwrm_nvm_get_dev_info_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_NVM_GET_DEV_INFO);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (!rc)</div><div class='add'>+		memcpy(nvm_info, resp, sizeof(*resp));</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_func_reset(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_reset_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FUNC_RESET);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;enables = 0;</div><div class='add'>+	bnge_hwrm_req_timeout(bd, req, BNGE_HWRM_RESET_TIMEOUT);</div><div class='add'>+	return bnge_hwrm_req_send(bd, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_fw_set_time(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_fw_set_time_input *req;</div><div class='add'>+	struct tm tm;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	time64_to_tm(ktime_get_real_seconds(), 0, &amp;tm);</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FW_SET_TIME);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;year = cpu_to_le16(1900 + tm.tm_year);</div><div class='add'>+	req-&gt;month = 1 + tm.tm_mon;</div><div class='add'>+	req-&gt;day = tm.tm_mday;</div><div class='add'>+	req-&gt;hour = tm.tm_hour;</div><div class='add'>+	req-&gt;minute = tm.tm_min;</div><div class='add'>+	req-&gt;second = tm.tm_sec;</div><div class='add'>+	return bnge_hwrm_req_send(bd, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_func_drv_rgtr(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_drv_rgtr_output *resp;</div><div class='add'>+	struct hwrm_func_drv_rgtr_input *req;</div><div class='add'>+	u32 flags;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FUNC_DRV_RGTR);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;enables = cpu_to_le32(FUNC_DRV_RGTR_REQ_ENABLES_OS_TYPE |</div><div class='add'>+				   FUNC_DRV_RGTR_REQ_ENABLES_VER |</div><div class='add'>+				   FUNC_DRV_RGTR_REQ_ENABLES_ASYNC_EVENT_FWD);</div><div class='add'>+</div><div class='add'>+	req-&gt;os_type = cpu_to_le16(FUNC_DRV_RGTR_REQ_OS_TYPE_LINUX);</div><div class='add'>+	flags = FUNC_DRV_RGTR_REQ_FLAGS_16BIT_VER_MODE;</div><div class='add'>+</div><div class='add'>+	req-&gt;flags = cpu_to_le32(flags);</div><div class='add'>+	req-&gt;ver_maj_8b = DRV_VER_MAJ;</div><div class='add'>+	req-&gt;ver_min_8b = DRV_VER_MIN;</div><div class='add'>+	req-&gt;ver_upd_8b = DRV_VER_UPD;</div><div class='add'>+	req-&gt;ver_maj = cpu_to_le16(DRV_VER_MAJ);</div><div class='add'>+	req-&gt;ver_min = cpu_to_le16(DRV_VER_MIN);</div><div class='add'>+	req-&gt;ver_upd = cpu_to_le16(DRV_VER_UPD);</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (!rc) {</div><div class='add'>+		set_bit(BNGE_STATE_DRV_REGISTERED, &amp;bd-&gt;state);</div><div class='add'>+		if (resp-&gt;flags &amp;</div><div class='add'>+		    cpu_to_le32(FUNC_DRV_RGTR_RESP_FLAGS_IF_CHANGE_SUPPORTED))</div><div class='add'>+			bd-&gt;fw_cap |= BNGE_FW_CAP_IF_CHANGE;</div><div class='add'>+	}</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_func_drv_unrgtr(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_drv_unrgtr_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!test_and_clear_bit(BNGE_STATE_DRV_REGISTERED, &amp;bd-&gt;state))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FUNC_DRV_UNRGTR);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	return bnge_hwrm_req_send(bd, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_ctx_initializer(struct bnge_ctx_mem_type *ctxm,</div><div class='add'>+				      u8 init_val, u8 init_offset,</div><div class='add'>+				      bool init_mask_set)</div><div class='add'>+{</div><div class='add'>+	ctxm-&gt;init_value = init_val;</div><div class='add'>+	ctxm-&gt;init_offset = BNGE_CTX_INIT_INVALID_OFFSET;</div><div class='add'>+	if (init_mask_set)</div><div class='add'>+		ctxm-&gt;init_offset = init_offset * 4;</div><div class='add'>+	else</div><div class='add'>+		ctxm-&gt;init_value = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_all_ctx_pg_info(struct bnge_dev *bd, int ctx_max)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ctx_mem_info *ctx = bd-&gt;ctx;</div><div class='add'>+	u16 type;</div><div class='add'>+</div><div class='add'>+	for (type = 0; type &lt; ctx_max; type++) {</div><div class='add'>+		struct bnge_ctx_mem_type *ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='add'>+		int n = 1;</div><div class='add'>+</div><div class='add'>+		if (!ctxm-&gt;max_entries)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ctxm-&gt;instance_bmap)</div><div class='add'>+			n = hweight32(ctxm-&gt;instance_bmap);</div><div class='add'>+		ctxm-&gt;pg_info = kcalloc(n, sizeof(*ctxm-&gt;pg_info), GFP_KERNEL);</div><div class='add'>+		if (!ctxm-&gt;pg_info)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define BNGE_CTX_INIT_VALID(flags)	\</div><div class='add'>+	(!!((flags) &amp;			\</div><div class='add'>+	    FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_ENABLE_CTX_KIND_INIT))</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_func_backing_store_qcaps(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_backing_store_qcaps_v2_output *resp;</div><div class='add'>+	struct hwrm_func_backing_store_qcaps_v2_input *req;</div><div class='add'>+	struct bnge_ctx_mem_info *ctx;</div><div class='add'>+	u16 type;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;ctx)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FUNC_BACKING_STORE_QCAPS_V2);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	bd-&gt;ctx = ctx;</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+</div><div class='add'>+	for (type = 0; type &lt; BNGE_CTX_V2_MAX; ) {</div><div class='add'>+		struct bnge_ctx_mem_type *ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='add'>+		u8 init_val, init_off, i;</div><div class='add'>+		__le32 *p;</div><div class='add'>+		u32 flags;</div><div class='add'>+</div><div class='add'>+		req-&gt;type = cpu_to_le16(type);</div><div class='add'>+		rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto ctx_done;</div><div class='add'>+		flags = le32_to_cpu(resp-&gt;flags);</div><div class='add'>+		type = le16_to_cpu(resp-&gt;next_valid_type);</div><div class='add'>+		if (!(flags &amp;</div><div class='add'>+		      FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_TYPE_VALID))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ctxm-&gt;type = le16_to_cpu(resp-&gt;type);</div><div class='add'>+		ctxm-&gt;entry_size = le16_to_cpu(resp-&gt;entry_size);</div><div class='add'>+		ctxm-&gt;flags = flags;</div><div class='add'>+		ctxm-&gt;instance_bmap = le32_to_cpu(resp-&gt;instance_bit_map);</div><div class='add'>+		ctxm-&gt;entry_multiple = resp-&gt;entry_multiple;</div><div class='add'>+		ctxm-&gt;max_entries = le32_to_cpu(resp-&gt;max_num_entries);</div><div class='add'>+		ctxm-&gt;min_entries = le32_to_cpu(resp-&gt;min_num_entries);</div><div class='add'>+		init_val = resp-&gt;ctx_init_value;</div><div class='add'>+		init_off = resp-&gt;ctx_init_offset;</div><div class='add'>+		bnge_init_ctx_initializer(ctxm, init_val, init_off,</div><div class='add'>+					  BNGE_CTX_INIT_VALID(flags));</div><div class='add'>+		ctxm-&gt;split_entry_cnt = min_t(u8, resp-&gt;subtype_valid_cnt,</div><div class='add'>+					      BNGE_MAX_SPLIT_ENTRY);</div><div class='add'>+		for (i = 0, p = &amp;resp-&gt;split_entry_0; i &lt; ctxm-&gt;split_entry_cnt;</div><div class='add'>+		     i++, p++)</div><div class='add'>+			ctxm-&gt;split[i] = le32_to_cpu(*p);</div><div class='add'>+	}</div><div class='add'>+	rc = bnge_alloc_all_ctx_pg_info(bd, BNGE_CTX_V2_MAX);</div><div class='add'>+</div><div class='add'>+ctx_done:</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_set_pg_attr(struct bnge_ring_mem_info *rmem, u8 *pg_attr,</div><div class='add'>+				  __le64 *pg_dir)</div><div class='add'>+{</div><div class='add'>+	if (!rmem-&gt;nr_pages)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	BNGE_SET_CTX_PAGE_ATTR(*pg_attr);</div><div class='add'>+	if (rmem-&gt;depth &gt;= 1) {</div><div class='add'>+		if (rmem-&gt;depth == 2)</div><div class='add'>+			*pg_attr |= 2;</div><div class='add'>+		else</div><div class='add'>+			*pg_attr |= 1;</div><div class='add'>+		*pg_dir = cpu_to_le64(rmem-&gt;dma_pg_tbl);</div><div class='add'>+	} else {</div><div class='add'>+		*pg_dir = cpu_to_le64(rmem-&gt;dma_arr[0]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_func_backing_store(struct bnge_dev *bd,</div><div class='add'>+				 struct bnge_ctx_mem_type *ctxm,</div><div class='add'>+				 bool last)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_backing_store_cfg_v2_input *req;</div><div class='add'>+	u32 instance_bmap = ctxm-&gt;instance_bmap;</div><div class='add'>+	int i, j, rc = 0, n = 1;</div><div class='add'>+	__le32 *p;</div><div class='add'>+</div><div class='add'>+	if (!(ctxm-&gt;flags &amp; BNGE_CTX_MEM_TYPE_VALID) || !ctxm-&gt;pg_info)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (instance_bmap)</div><div class='add'>+		n = hweight32(ctxm-&gt;instance_bmap);</div><div class='add'>+	else</div><div class='add'>+		instance_bmap = 1;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FUNC_BACKING_STORE_CFG_V2);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	req-&gt;type = cpu_to_le16(ctxm-&gt;type);</div><div class='add'>+	req-&gt;entry_size = cpu_to_le16(ctxm-&gt;entry_size);</div><div class='add'>+	req-&gt;subtype_valid_cnt = ctxm-&gt;split_entry_cnt;</div><div class='add'>+	for (i = 0, p = &amp;req-&gt;split_entry_0; i &lt; ctxm-&gt;split_entry_cnt; i++)</div><div class='add'>+		p[i] = cpu_to_le32(ctxm-&gt;split[i]);</div><div class='add'>+	for (i = 0, j = 0; j &lt; n &amp;&amp; !rc; i++) {</div><div class='add'>+		struct bnge_ctx_pg_info *ctx_pg;</div><div class='add'>+</div><div class='add'>+		if (!(instance_bmap &amp; (1 &lt;&lt; i)))</div><div class='add'>+			continue;</div><div class='add'>+		req-&gt;instance = cpu_to_le16(i);</div><div class='add'>+		ctx_pg = &amp;ctxm-&gt;pg_info[j++];</div><div class='add'>+		if (!ctx_pg-&gt;entries)</div><div class='add'>+			continue;</div><div class='add'>+		req-&gt;num_entries = cpu_to_le32(ctx_pg-&gt;entries);</div><div class='add'>+		bnge_hwrm_set_pg_attr(&amp;ctx_pg-&gt;ring_mem,</div><div class='add'>+				      &amp;req-&gt;page_size_pbl_level,</div><div class='add'>+				      &amp;req-&gt;page_dir);</div><div class='add'>+		if (last &amp;&amp; j == n)</div><div class='add'>+			req-&gt;flags =</div><div class='add'>+				cpu_to_le32(BNGE_BS_CFG_ALL_DONE);</div><div class='add'>+		rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	}</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_hwrm_get_rings(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hw_resc *hw_resc = &amp;bd-&gt;hw_resc;</div><div class='add'>+	struct hwrm_func_qcfg_output *resp;</div><div class='add'>+	struct hwrm_func_qcfg_input *req;</div><div class='add'>+	u16 cp, stats;</div><div class='add'>+	u16 rx, tx;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FUNC_QCFG);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;fid = cpu_to_le16(0xffff);</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (rc) {</div><div class='add'>+		bnge_hwrm_req_drop(bd, req);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_resc-&gt;resv_tx_rings = le16_to_cpu(resp-&gt;alloc_tx_rings);</div><div class='add'>+	hw_resc-&gt;resv_rx_rings = le16_to_cpu(resp-&gt;alloc_rx_rings);</div><div class='add'>+	hw_resc-&gt;resv_hw_ring_grps =</div><div class='add'>+		le32_to_cpu(resp-&gt;alloc_hw_ring_grps);</div><div class='add'>+	hw_resc-&gt;resv_vnics = le16_to_cpu(resp-&gt;alloc_vnics);</div><div class='add'>+	hw_resc-&gt;resv_rsscos_ctxs = le16_to_cpu(resp-&gt;alloc_rsscos_ctx);</div><div class='add'>+	cp = le16_to_cpu(resp-&gt;alloc_cmpl_rings);</div><div class='add'>+	stats = le16_to_cpu(resp-&gt;alloc_stat_ctx);</div><div class='add'>+	hw_resc-&gt;resv_irqs = cp;</div><div class='add'>+	rx = hw_resc-&gt;resv_rx_rings;</div><div class='add'>+	tx = hw_resc-&gt;resv_tx_rings;</div><div class='add'>+	if (bnge_is_agg_reqd(bd))</div><div class='add'>+		rx &gt;&gt;= 1;</div><div class='add'>+	if (cp &lt; (rx + tx)) {</div><div class='add'>+		rc = bnge_fix_rings_count(&amp;rx, &amp;tx, cp, false);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto get_rings_exit;</div><div class='add'>+		if (bnge_is_agg_reqd(bd))</div><div class='add'>+			rx &lt;&lt;= 1;</div><div class='add'>+		hw_resc-&gt;resv_rx_rings = rx;</div><div class='add'>+		hw_resc-&gt;resv_tx_rings = tx;</div><div class='add'>+	}</div><div class='add'>+	hw_resc-&gt;resv_irqs = le16_to_cpu(resp-&gt;alloc_msix);</div><div class='add'>+	hw_resc-&gt;resv_hw_ring_grps = rx;</div><div class='add'>+	hw_resc-&gt;resv_cp_rings = cp;</div><div class='add'>+	hw_resc-&gt;resv_stat_ctxs = stats;</div><div class='add'>+</div><div class='add'>+get_rings_exit:</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct hwrm_func_cfg_input *</div><div class='add'>+__bnge_hwrm_reserve_pf_rings(struct bnge_dev *bd, struct bnge_hw_rings *hwr)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_cfg_input *req;</div><div class='add'>+	u32 enables = 0;</div><div class='add'>+</div><div class='add'>+	if (bnge_hwrm_req_init(bd, req, HWRM_FUNC_QCFG))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	req-&gt;fid = cpu_to_le16(0xffff);</div><div class='add'>+	enables |= hwr-&gt;tx ? FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS : 0;</div><div class='add'>+	req-&gt;num_tx_rings = cpu_to_le16(hwr-&gt;tx);</div><div class='add'>+</div><div class='add'>+	enables |= hwr-&gt;rx ? FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS : 0;</div><div class='add'>+	enables |= hwr-&gt;stat ? FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS : 0;</div><div class='add'>+	enables |= hwr-&gt;nq ? FUNC_CFG_REQ_ENABLES_NUM_MSIX : 0;</div><div class='add'>+	enables |= hwr-&gt;cmpl ? FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS : 0;</div><div class='add'>+	enables |= hwr-&gt;vnic ? FUNC_CFG_REQ_ENABLES_NUM_VNICS : 0;</div><div class='add'>+	enables |= hwr-&gt;rss_ctx ? FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS : 0;</div><div class='add'>+</div><div class='add'>+	req-&gt;num_rx_rings = cpu_to_le16(hwr-&gt;rx);</div><div class='add'>+	req-&gt;num_rsscos_ctxs = cpu_to_le16(hwr-&gt;rss_ctx);</div><div class='add'>+	req-&gt;num_cmpl_rings = cpu_to_le16(hwr-&gt;cmpl);</div><div class='add'>+	req-&gt;num_msix = cpu_to_le16(hwr-&gt;nq);</div><div class='add'>+	req-&gt;num_stat_ctxs = cpu_to_le16(hwr-&gt;stat);</div><div class='add'>+	req-&gt;num_vnics = cpu_to_le16(hwr-&gt;vnic);</div><div class='add'>+	req-&gt;enables = cpu_to_le32(enables);</div><div class='add'>+</div><div class='add'>+	return req;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+bnge_hwrm_reserve_pf_rings(struct bnge_dev *bd, struct bnge_hw_rings *hwr)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_cfg_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	req = __bnge_hwrm_reserve_pf_rings(bd, hwr);</div><div class='add'>+	if (!req)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (!req-&gt;enables) {</div><div class='add'>+		bnge_hwrm_req_drop(bd, req);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return bnge_hwrm_get_rings(bd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_reserve_rings(struct bnge_dev *bd, struct bnge_hw_rings *hwr)</div><div class='add'>+{</div><div class='add'>+	return bnge_hwrm_reserve_pf_rings(bd, hwr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_func_qcfg(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_qcfg_output *resp;</div><div class='add'>+	struct hwrm_func_qcfg_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FUNC_QCFG);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;fid = cpu_to_le16(0xffff);</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto func_qcfg_exit;</div><div class='add'>+</div><div class='add'>+	bd-&gt;max_mtu = le16_to_cpu(resp-&gt;max_mtu_configured);</div><div class='add'>+	if (!bd-&gt;max_mtu)</div><div class='add'>+		bd-&gt;max_mtu = BNGE_MAX_MTU;</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;db_size)</div><div class='add'>+		goto func_qcfg_exit;</div><div class='add'>+</div><div class='add'>+	bd-&gt;db_offset = le16_to_cpu(resp-&gt;legacy_l2_db_size_kb) * 1024;</div><div class='add'>+	bd-&gt;db_size = PAGE_ALIGN(le16_to_cpu(resp-&gt;l2_doorbell_bar_size_kb) *</div><div class='add'>+			1024);</div><div class='add'>+	if (!bd-&gt;db_size || bd-&gt;db_size &gt; pci_resource_len(bd-&gt;pdev, 2) ||</div><div class='add'>+	    bd-&gt;db_size &lt;= bd-&gt;db_offset)</div><div class='add'>+		bd-&gt;db_size = pci_resource_len(bd-&gt;pdev, 2);</div><div class='add'>+</div><div class='add'>+func_qcfg_exit:</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_func_resc_qcaps(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_resource_qcaps_output *resp;</div><div class='add'>+	struct bnge_hw_resc *hw_resc = &amp;bd-&gt;hw_resc;</div><div class='add'>+	struct hwrm_func_resource_qcaps_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FUNC_RESOURCE_QCAPS);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;fid = cpu_to_le16(0xffff);</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send_silent(bd, req);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto hwrm_func_resc_qcaps_exit;</div><div class='add'>+</div><div class='add'>+	hw_resc-&gt;max_tx_sch_inputs = le16_to_cpu(resp-&gt;max_tx_scheduler_inputs);</div><div class='add'>+	hw_resc-&gt;min_rsscos_ctxs = le16_to_cpu(resp-&gt;min_rsscos_ctx);</div><div class='add'>+	hw_resc-&gt;max_rsscos_ctxs = le16_to_cpu(resp-&gt;max_rsscos_ctx);</div><div class='add'>+	hw_resc-&gt;min_cp_rings = le16_to_cpu(resp-&gt;min_cmpl_rings);</div><div class='add'>+	hw_resc-&gt;max_cp_rings = le16_to_cpu(resp-&gt;max_cmpl_rings);</div><div class='add'>+	hw_resc-&gt;min_tx_rings = le16_to_cpu(resp-&gt;min_tx_rings);</div><div class='add'>+	hw_resc-&gt;max_tx_rings = le16_to_cpu(resp-&gt;max_tx_rings);</div><div class='add'>+	hw_resc-&gt;min_rx_rings = le16_to_cpu(resp-&gt;min_rx_rings);</div><div class='add'>+	hw_resc-&gt;max_rx_rings = le16_to_cpu(resp-&gt;max_rx_rings);</div><div class='add'>+	hw_resc-&gt;min_hw_ring_grps = le16_to_cpu(resp-&gt;min_hw_ring_grps);</div><div class='add'>+	hw_resc-&gt;max_hw_ring_grps = le16_to_cpu(resp-&gt;max_hw_ring_grps);</div><div class='add'>+	hw_resc-&gt;min_l2_ctxs = le16_to_cpu(resp-&gt;min_l2_ctxs);</div><div class='add'>+	hw_resc-&gt;max_l2_ctxs = le16_to_cpu(resp-&gt;max_l2_ctxs);</div><div class='add'>+	hw_resc-&gt;min_vnics = le16_to_cpu(resp-&gt;min_vnics);</div><div class='add'>+	hw_resc-&gt;max_vnics = le16_to_cpu(resp-&gt;max_vnics);</div><div class='add'>+	hw_resc-&gt;min_stat_ctxs = le16_to_cpu(resp-&gt;min_stat_ctx);</div><div class='add'>+	hw_resc-&gt;max_stat_ctxs = le16_to_cpu(resp-&gt;max_stat_ctx);</div><div class='add'>+</div><div class='add'>+	hw_resc-&gt;max_nqs = le16_to_cpu(resp-&gt;max_msix);</div><div class='add'>+	hw_resc-&gt;max_hw_ring_grps = hw_resc-&gt;max_rx_rings;</div><div class='add'>+</div><div class='add'>+hwrm_func_resc_qcaps_exit:</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_func_qcaps(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_qcaps_output *resp;</div><div class='add'>+	struct hwrm_func_qcaps_input *req;</div><div class='add'>+	struct bnge_pf_info *pf = &amp;bd-&gt;pf;</div><div class='add'>+	u32 flags;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FUNC_QCAPS);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;fid = cpu_to_le16(0xffff);</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto hwrm_func_qcaps_exit;</div><div class='add'>+</div><div class='add'>+	flags = le32_to_cpu(resp-&gt;flags);</div><div class='add'>+	if (flags &amp; FUNC_QCAPS_RESP_FLAGS_ROCE_V1_SUPPORTED)</div><div class='add'>+		bd-&gt;flags |= BNGE_EN_ROCE_V1;</div><div class='add'>+	if (flags &amp; FUNC_QCAPS_RESP_FLAGS_ROCE_V2_SUPPORTED)</div><div class='add'>+		bd-&gt;flags |= BNGE_EN_ROCE_V2;</div><div class='add'>+</div><div class='add'>+	pf-&gt;fw_fid = le16_to_cpu(resp-&gt;fid);</div><div class='add'>+	pf-&gt;port_id = le16_to_cpu(resp-&gt;port_id);</div><div class='add'>+	memcpy(pf-&gt;mac_addr, resp-&gt;mac_address, ETH_ALEN);</div><div class='add'>+</div><div class='add'>+	bd-&gt;tso_max_segs = le16_to_cpu(resp-&gt;max_tso_segs);</div><div class='add'>+</div><div class='add'>+hwrm_func_qcaps_exit:</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_vnic_qcaps(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_vnic_qcaps_output *resp;</div><div class='add'>+	struct hwrm_vnic_qcaps_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	bd-&gt;hw_ring_stats_size = sizeof(struct ctx_hw_stats);</div><div class='add'>+	bd-&gt;rss_cap &amp;= ~BNGE_RSS_CAP_NEW_RSS_CAP;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_VNIC_QCAPS);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (!rc) {</div><div class='add'>+		u32 flags = le32_to_cpu(resp-&gt;flags);</div><div class='add'>+</div><div class='add'>+		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_VLAN_STRIP_CAP)</div><div class='add'>+			bd-&gt;fw_cap |= BNGE_FW_CAP_VLAN_RX_STRIP;</div><div class='add'>+		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_RSS_HASH_TYPE_DELTA_CAP)</div><div class='add'>+			bd-&gt;rss_cap |= BNGE_RSS_CAP_RSS_HASH_TYPE_DELTA;</div><div class='add'>+		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_RSS_PROF_TCAM_MODE_ENABLED)</div><div class='add'>+			bd-&gt;rss_cap |= BNGE_RSS_CAP_RSS_TCAM;</div><div class='add'>+		bd-&gt;max_tpa_v2 = le16_to_cpu(resp-&gt;max_aggs_supported);</div><div class='add'>+		if (bd-&gt;max_tpa_v2)</div><div class='add'>+			bd-&gt;hw_ring_stats_size = BNGE_RING_STATS_SIZE;</div><div class='add'>+		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_HW_TUNNEL_TPA_CAP)</div><div class='add'>+			bd-&gt;fw_cap |= BNGE_FW_CAP_VNIC_TUNNEL_TPA;</div><div class='add'>+		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_RSS_IPSEC_AH_SPI_IPV4_CAP)</div><div class='add'>+			bd-&gt;rss_cap |= BNGE_RSS_CAP_AH_V4_RSS_CAP;</div><div class='add'>+		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_RSS_IPSEC_AH_SPI_IPV6_CAP)</div><div class='add'>+			bd-&gt;rss_cap |= BNGE_RSS_CAP_AH_V6_RSS_CAP;</div><div class='add'>+		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_RSS_IPSEC_ESP_SPI_IPV4_CAP)</div><div class='add'>+			bd-&gt;rss_cap |= BNGE_RSS_CAP_ESP_V4_RSS_CAP;</div><div class='add'>+		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_RSS_IPSEC_ESP_SPI_IPV6_CAP)</div><div class='add'>+			bd-&gt;rss_cap |= BNGE_RSS_CAP_ESP_V6_RSS_CAP;</div><div class='add'>+	}</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define BNGE_CNPQ(q_profile)	\</div><div class='add'>+		((q_profile) ==	\</div><div class='add'>+		 QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_LOSSY_ROCE_CNP)</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_queue_qportcfg(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_queue_qportcfg_output *resp;</div><div class='add'>+	struct hwrm_queue_qportcfg_input *req;</div><div class='add'>+	u8 i, j, *qptr;</div><div class='add'>+	bool no_rdma;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_QUEUE_QPORTCFG);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto qportcfg_exit;</div><div class='add'>+</div><div class='add'>+	if (!resp-&gt;max_configurable_queues) {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto qportcfg_exit;</div><div class='add'>+	}</div><div class='add'>+	bd-&gt;max_tc = resp-&gt;max_configurable_queues;</div><div class='add'>+	bd-&gt;max_lltc = resp-&gt;max_configurable_lossless_queues;</div><div class='add'>+	if (bd-&gt;max_tc &gt; BNGE_MAX_QUEUE)</div><div class='add'>+		bd-&gt;max_tc = BNGE_MAX_QUEUE;</div><div class='add'>+</div><div class='add'>+	no_rdma = !bnge_is_roce_en(bd);</div><div class='add'>+	qptr = &amp;resp-&gt;queue_id0;</div><div class='add'>+	for (i = 0, j = 0; i &lt; bd-&gt;max_tc; i++) {</div><div class='add'>+		bd-&gt;q_info[j].queue_id = *qptr;</div><div class='add'>+		bd-&gt;q_ids[i] = *qptr++;</div><div class='add'>+		bd-&gt;q_info[j].queue_profile = *qptr++;</div><div class='add'>+		bd-&gt;tc_to_qidx[j] = j;</div><div class='add'>+		if (!BNGE_CNPQ(bd-&gt;q_info[j].queue_profile) || no_rdma)</div><div class='add'>+			j++;</div><div class='add'>+	}</div><div class='add'>+	bd-&gt;max_q = bd-&gt;max_tc;</div><div class='add'>+	bd-&gt;max_tc = max_t(u8, j, 1);</div><div class='add'>+</div><div class='add'>+	if (resp-&gt;queue_cfg_info &amp; QUEUE_QPORTCFG_RESP_QUEUE_CFG_INFO_ASYM_CFG)</div><div class='add'>+		bd-&gt;max_tc = 1;</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;max_lltc &gt; bd-&gt;max_tc)</div><div class='add'>+		bd-&gt;max_lltc = bd-&gt;max_tc;</div><div class='add'>+</div><div class='add'>+qportcfg_exit:</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_vnic_set_hds(struct bnge_net *bn, struct bnge_vnic_info *vnic)</div><div class='add'>+{</div><div class='add'>+	u16 hds_thresh = (u16)bn-&gt;netdev-&gt;cfg_pending-&gt;hds_thresh;</div><div class='add'>+	struct hwrm_vnic_plcmodes_cfg_input *req;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_VNIC_PLCMODES_CFG);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;flags = cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_JUMBO_PLACEMENT);</div><div class='add'>+	req-&gt;enables = cpu_to_le32(BNGE_PLC_EN_JUMBO_THRES_VALID);</div><div class='add'>+	req-&gt;jumbo_thresh = cpu_to_le16(bn-&gt;rx_buf_use_size);</div><div class='add'>+</div><div class='add'>+	if (bnge_is_agg_reqd(bd)) {</div><div class='add'>+		req-&gt;flags |= cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV4 |</div><div class='add'>+					  VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV6);</div><div class='add'>+		req-&gt;enables |=</div><div class='add'>+			cpu_to_le32(BNGE_PLC_EN_HDS_THRES_VALID);</div><div class='add'>+		req-&gt;hds_threshold = cpu_to_le16(hds_thresh);</div><div class='add'>+	}</div><div class='add'>+	req-&gt;vnic_id = cpu_to_le32(vnic-&gt;fw_vnic_id);</div><div class='add'>+	return bnge_hwrm_req_send(bd, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_vnic_ctx_alloc(struct bnge_dev *bd,</div><div class='add'>+			     struct bnge_vnic_info *vnic, u16 ctx_idx)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_vnic_rss_cos_lb_ctx_alloc_output *resp;</div><div class='add'>+	struct hwrm_vnic_rss_cos_lb_ctx_alloc_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_VNIC_RSS_COS_LB_CTX_ALLOC);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (!rc)</div><div class='add'>+		vnic-&gt;fw_rss_cos_lb_ctx[ctx_idx] =</div><div class='add'>+			le16_to_cpu(resp-&gt;rss_cos_lb_ctx_id);</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+__bnge_hwrm_vnic_set_rss(struct bnge_net *bn,</div><div class='add'>+			 struct hwrm_vnic_rss_cfg_input *req,</div><div class='add'>+			 struct bnge_vnic_info *vnic)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+</div><div class='add'>+	bnge_fill_hw_rss_tbl(bn, vnic);</div><div class='add'>+	req-&gt;flags |= VNIC_RSS_CFG_REQ_FLAGS_IPSEC_HASH_TYPE_CFG_SUPPORT;</div><div class='add'>+</div><div class='add'>+	req-&gt;hash_type = cpu_to_le32(bd-&gt;rss_hash_cfg);</div><div class='add'>+	req-&gt;hash_mode_flags = VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_DEFAULT;</div><div class='add'>+	req-&gt;ring_grp_tbl_addr = cpu_to_le64(vnic-&gt;rss_table_dma_addr);</div><div class='add'>+	req-&gt;hash_key_tbl_addr = cpu_to_le64(vnic-&gt;rss_hash_key_dma_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_vnic_set_rss(struct bnge_net *bn,</div><div class='add'>+			   struct bnge_vnic_info *vnic, bool set_rss)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_vnic_rss_cfg_input *req;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	dma_addr_t ring_tbl_map;</div><div class='add'>+	u32 i, nr_ctxs;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_VNIC_RSS_CFG);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;vnic_id = cpu_to_le16(vnic-&gt;fw_vnic_id);</div><div class='add'>+	if (!set_rss)</div><div class='add'>+		return bnge_hwrm_req_send(bd, req);</div><div class='add'>+</div><div class='add'>+	__bnge_hwrm_vnic_set_rss(bn, req, vnic);</div><div class='add'>+	ring_tbl_map = vnic-&gt;rss_table_dma_addr;</div><div class='add'>+	nr_ctxs = bnge_cal_nr_rss_ctxs(bd-&gt;rx_nr_rings);</div><div class='add'>+</div><div class='add'>+	bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	for (i = 0; i &lt; nr_ctxs; ring_tbl_map += BNGE_RSS_TABLE_SIZE, i++) {</div><div class='add'>+		req-&gt;ring_grp_tbl_addr = cpu_to_le64(ring_tbl_map);</div><div class='add'>+		req-&gt;ring_table_pair_index = i;</div><div class='add'>+		req-&gt;rss_ctx_idx = cpu_to_le16(vnic-&gt;fw_rss_cos_lb_ctx[i]);</div><div class='add'>+		rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_vnic_cfg(struct bnge_net *bn, struct bnge_vnic_info *vnic)</div><div class='add'>+{</div><div class='add'>+	struct bnge_rx_ring_info *rxr = &amp;bn-&gt;rx_ring[0];</div><div class='add'>+	struct hwrm_vnic_cfg_input *req;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_VNIC_CFG);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;default_rx_ring_id =</div><div class='add'>+		cpu_to_le16(rxr-&gt;rx_ring_struct.fw_ring_id);</div><div class='add'>+	req-&gt;default_cmpl_ring_id =</div><div class='add'>+		cpu_to_le16(bnge_cp_ring_for_rx(rxr));</div><div class='add'>+	req-&gt;enables =</div><div class='add'>+		cpu_to_le32(VNIC_CFG_REQ_ENABLES_DEFAULT_RX_RING_ID |</div><div class='add'>+			    VNIC_CFG_REQ_ENABLES_DEFAULT_CMPL_RING_ID);</div><div class='add'>+	vnic-&gt;mru = bd-&gt;netdev-&gt;mtu + ETH_HLEN + VLAN_HLEN;</div><div class='add'>+	req-&gt;mru = cpu_to_le16(vnic-&gt;mru);</div><div class='add'>+</div><div class='add'>+	req-&gt;vnic_id = cpu_to_le16(vnic-&gt;fw_vnic_id);</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;flags &amp; BNGE_EN_STRIP_VLAN)</div><div class='add'>+		req-&gt;flags |= cpu_to_le32(VNIC_CFG_REQ_FLAGS_VLAN_STRIP_MODE);</div><div class='add'>+	if (vnic-&gt;vnic_id == BNGE_VNIC_DEFAULT &amp;&amp; bnge_aux_registered(bd))</div><div class='add'>+		req-&gt;flags |= cpu_to_le32(BNGE_VNIC_CFG_ROCE_DUAL_MODE);</div><div class='add'>+</div><div class='add'>+	return bnge_hwrm_req_send(bd, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_hwrm_update_rss_hash_cfg(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_vnic_info *vnic = &amp;bn-&gt;vnic_info[BNGE_VNIC_DEFAULT];</div><div class='add'>+	struct hwrm_vnic_rss_qcfg_output *resp;</div><div class='add'>+	struct hwrm_vnic_rss_qcfg_input *req;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+</div><div class='add'>+	if (bnge_hwrm_req_init(bd, req, HWRM_VNIC_RSS_QCFG))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	req-&gt;vnic_id = cpu_to_le16(vnic-&gt;fw_vnic_id);</div><div class='add'>+	/* all contexts configured to same hash_type, zero always exists */</div><div class='add'>+	req-&gt;rss_ctx_idx = cpu_to_le16(vnic-&gt;fw_rss_cos_lb_ctx[0]);</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	if (!bnge_hwrm_req_send(bd, req))</div><div class='add'>+		bd-&gt;rss_hash_cfg =</div><div class='add'>+			le32_to_cpu(resp-&gt;hash_type) ?: bd-&gt;rss_hash_cfg;</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_l2_filter_free(struct bnge_dev *bd, struct bnge_l2_filter *fltr)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_cfa_l2_filter_free_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_CFA_L2_FILTER_FREE);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;l2_filter_id = fltr-&gt;base.filter_id;</div><div class='add'>+	return bnge_hwrm_req_send(bd, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_l2_filter_alloc(struct bnge_dev *bd, struct bnge_l2_filter *fltr)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_cfa_l2_filter_alloc_output *resp;</div><div class='add'>+	struct hwrm_cfa_l2_filter_alloc_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_CFA_L2_FILTER_ALLOC);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;flags = cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_RX);</div><div class='add'>+</div><div class='add'>+	req-&gt;flags |= cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_FLAGS_OUTERMOST);</div><div class='add'>+	req-&gt;dst_id = cpu_to_le16(fltr-&gt;base.fw_vnic_id);</div><div class='add'>+	req-&gt;enables =</div><div class='add'>+		cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR |</div><div class='add'>+			    CFA_L2_FILTER_ALLOC_REQ_ENABLES_DST_ID |</div><div class='add'>+			    CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR_MASK);</div><div class='add'>+	ether_addr_copy(req-&gt;l2_addr, fltr-&gt;l2_key.dst_mac_addr);</div><div class='add'>+	eth_broadcast_addr(req-&gt;l2_addr_mask);</div><div class='add'>+</div><div class='add'>+	if (fltr-&gt;l2_key.vlan) {</div><div class='add'>+		req-&gt;enables |=</div><div class='add'>+			cpu_to_le32(CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_IVLAN |</div><div class='add'>+				CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_IVLAN_MASK |</div><div class='add'>+				CFA_L2_FILTER_ALLOC_REQ_ENABLES_NUM_VLANS);</div><div class='add'>+		req-&gt;num_vlans = 1;</div><div class='add'>+		req-&gt;l2_ivlan = cpu_to_le16(fltr-&gt;l2_key.vlan);</div><div class='add'>+		req-&gt;l2_ivlan_mask = cpu_to_le16(0xfff);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (!rc)</div><div class='add'>+		fltr-&gt;base.filter_id = resp-&gt;l2_filter_id;</div><div class='add'>+</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_cfa_l2_set_rx_mask(struct bnge_dev *bd,</div><div class='add'>+				 struct bnge_vnic_info *vnic)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_cfa_l2_set_rx_mask_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_CFA_L2_SET_RX_MASK);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;vnic_id = cpu_to_le32(vnic-&gt;fw_vnic_id);</div><div class='add'>+	if (vnic-&gt;rx_mask &amp; CFA_L2_SET_RX_MASK_REQ_MASK_MCAST) {</div><div class='add'>+		req-&gt;num_mc_entries = cpu_to_le32(vnic-&gt;mc_list_count);</div><div class='add'>+		req-&gt;mc_tbl_addr = cpu_to_le64(vnic-&gt;mc_list_mapping);</div><div class='add'>+	}</div><div class='add'>+	req-&gt;mask = cpu_to_le32(vnic-&gt;rx_mask);</div><div class='add'>+	return bnge_hwrm_req_send_silent(bd, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_vnic_alloc(struct bnge_dev *bd, struct bnge_vnic_info *vnic,</div><div class='add'>+			 unsigned int nr_rings)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_vnic_alloc_output *resp;</div><div class='add'>+	struct hwrm_vnic_alloc_input *req;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_VNIC_ALLOC);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BNGE_MAX_CTX_PER_VNIC; i++)</div><div class='add'>+		vnic-&gt;fw_rss_cos_lb_ctx[i] = INVALID_HW_RING_ID;</div><div class='add'>+	if (vnic-&gt;vnic_id == BNGE_VNIC_DEFAULT)</div><div class='add'>+		req-&gt;flags = cpu_to_le32(VNIC_ALLOC_REQ_FLAGS_DEFAULT);</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	if (!rc)</div><div class='add'>+		vnic-&gt;fw_vnic_id = le32_to_cpu(resp-&gt;vnic_id);</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_hwrm_vnic_free_one(struct bnge_dev *bd, struct bnge_vnic_info *vnic)</div><div class='add'>+{</div><div class='add'>+	if (vnic-&gt;fw_vnic_id != INVALID_HW_RING_ID) {</div><div class='add'>+		struct hwrm_vnic_free_input *req;</div><div class='add'>+</div><div class='add'>+		if (bnge_hwrm_req_init(bd, req, HWRM_VNIC_FREE))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		req-&gt;vnic_id = cpu_to_le32(vnic-&gt;fw_vnic_id);</div><div class='add'>+</div><div class='add'>+		bnge_hwrm_req_send(bd, req);</div><div class='add'>+		vnic-&gt;fw_vnic_id = INVALID_HW_RING_ID;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_hwrm_vnic_ctx_free_one(struct bnge_dev *bd,</div><div class='add'>+				 struct bnge_vnic_info *vnic, u16 ctx_idx)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_vnic_rss_cos_lb_ctx_free_input *req;</div><div class='add'>+</div><div class='add'>+	if (bnge_hwrm_req_init(bd, req, HWRM_VNIC_RSS_COS_LB_CTX_FREE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	req-&gt;rss_cos_lb_ctx_id =</div><div class='add'>+		cpu_to_le16(vnic-&gt;fw_rss_cos_lb_ctx[ctx_idx]);</div><div class='add'>+</div><div class='add'>+	bnge_hwrm_req_send(bd, req);</div><div class='add'>+	vnic-&gt;fw_rss_cos_lb_ctx[ctx_idx] = INVALID_HW_RING_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_hwrm_stat_ctx_free(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_stat_ctx_free_input *req;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (bnge_hwrm_req_init(bd, req, HWRM_STAT_CTX_FREE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		struct bnge_nq_ring_info *nqr = &amp;bnapi-&gt;nq_ring;</div><div class='add'>+</div><div class='add'>+		if (nqr-&gt;hw_stats_ctx_id != INVALID_STATS_CTX_ID) {</div><div class='add'>+			req-&gt;stat_ctx_id = cpu_to_le32(nqr-&gt;hw_stats_ctx_id);</div><div class='add'>+			bnge_hwrm_req_send(bd, req);</div><div class='add'>+</div><div class='add'>+			nqr-&gt;hw_stats_ctx_id = INVALID_STATS_CTX_ID;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_stat_ctx_alloc(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_stat_ctx_alloc_output *resp;</div><div class='add'>+	struct hwrm_stat_ctx_alloc_input *req;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int rc, i;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_STAT_CTX_ALLOC);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;stats_dma_length = cpu_to_le16(bd-&gt;hw_ring_stats_size);</div><div class='add'>+	req-&gt;update_period_ms = cpu_to_le32(bn-&gt;stats_coal_ticks / 1000);</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		struct bnge_nq_ring_info *nqr = &amp;bnapi-&gt;nq_ring;</div><div class='add'>+</div><div class='add'>+		req-&gt;stats_dma_addr = cpu_to_le64(nqr-&gt;stats.hw_stats_map);</div><div class='add'>+</div><div class='add'>+		rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+		if (rc)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		nqr-&gt;hw_stats_ctx_id = le32_to_cpu(resp-&gt;stat_ctx_id);</div><div class='add'>+		bn-&gt;grp_info[i].fw_stats_ctx = nqr-&gt;hw_stats_ctx_id;</div><div class='add'>+	}</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hwrm_ring_free_send_msg(struct bnge_net *bn,</div><div class='add'>+			    struct bnge_ring_struct *ring,</div><div class='add'>+			    u32 ring_type, int cmpl_ring_id)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_ring_free_input *req;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_RING_FREE);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	req-&gt;cmpl_ring = cpu_to_le16(cmpl_ring_id);</div><div class='add'>+	req-&gt;ring_type = ring_type;</div><div class='add'>+	req-&gt;ring_id = cpu_to_le16(ring-&gt;fw_ring_id);</div><div class='add'>+</div><div class='add'>+	bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+exit:</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bd-&gt;netdev, "hwrm_ring_free type %d failed. rc:%d\n", ring_type, rc);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hwrm_ring_alloc_send_msg(struct bnge_net *bn,</div><div class='add'>+			     struct bnge_ring_struct *ring,</div><div class='add'>+			     u32 ring_type, u32 map_index)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_mem_info *rmem = &amp;ring-&gt;ring_mem;</div><div class='add'>+	struct bnge_ring_grp_info *grp_info;</div><div class='add'>+	struct hwrm_ring_alloc_output *resp;</div><div class='add'>+	struct hwrm_ring_alloc_input *req;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	u16 ring_id, flags = 0;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_RING_ALLOC);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	req-&gt;enables = 0;</div><div class='add'>+	if (rmem-&gt;nr_pages &gt; 1) {</div><div class='add'>+		req-&gt;page_tbl_addr = cpu_to_le64(rmem-&gt;dma_pg_tbl);</div><div class='add'>+		/* Page size is in log2 units */</div><div class='add'>+		req-&gt;page_size = BNGE_PAGE_SHIFT;</div><div class='add'>+		req-&gt;page_tbl_depth = 1;</div><div class='add'>+	} else {</div><div class='add'>+		req-&gt;page_tbl_addr =  cpu_to_le64(rmem-&gt;dma_arr[0]);</div><div class='add'>+	}</div><div class='add'>+	req-&gt;fbo = 0;</div><div class='add'>+	/* Association of ring index with doorbell index and MSIX number */</div><div class='add'>+	req-&gt;logical_id = cpu_to_le16(map_index);</div><div class='add'>+</div><div class='add'>+	switch (ring_type) {</div><div class='add'>+	case HWRM_RING_ALLOC_TX: {</div><div class='add'>+		struct bnge_tx_ring_info *txr;</div><div class='add'>+</div><div class='add'>+		txr = container_of(ring, struct bnge_tx_ring_info,</div><div class='add'>+				   tx_ring_struct);</div><div class='add'>+		req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_TX;</div><div class='add'>+		/* Association of transmit ring with completion ring */</div><div class='add'>+		grp_info = &amp;bn-&gt;grp_info[ring-&gt;grp_idx];</div><div class='add'>+		req-&gt;cmpl_ring_id = cpu_to_le16(bnge_cp_ring_for_tx(txr));</div><div class='add'>+		req-&gt;length = cpu_to_le32(bn-&gt;tx_ring_mask + 1);</div><div class='add'>+		req-&gt;stat_ctx_id = cpu_to_le32(grp_info-&gt;fw_stats_ctx);</div><div class='add'>+		req-&gt;queue_id = cpu_to_le16(ring-&gt;queue_id);</div><div class='add'>+		req-&gt;flags = cpu_to_le16(flags);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case HWRM_RING_ALLOC_RX:</div><div class='add'>+		req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_RX;</div><div class='add'>+		req-&gt;length = cpu_to_le32(bn-&gt;rx_ring_mask + 1);</div><div class='add'>+</div><div class='add'>+		/* Association of rx ring with stats context */</div><div class='add'>+		grp_info = &amp;bn-&gt;grp_info[ring-&gt;grp_idx];</div><div class='add'>+		req-&gt;rx_buf_size = cpu_to_le16(bn-&gt;rx_buf_use_size);</div><div class='add'>+		req-&gt;stat_ctx_id = cpu_to_le32(grp_info-&gt;fw_stats_ctx);</div><div class='add'>+		req-&gt;enables |=</div><div class='add'>+			cpu_to_le32(RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID);</div><div class='add'>+		if (NET_IP_ALIGN == 2)</div><div class='add'>+			flags = RING_ALLOC_REQ_FLAGS_RX_SOP_PAD;</div><div class='add'>+		req-&gt;flags = cpu_to_le16(flags);</div><div class='add'>+		break;</div><div class='add'>+	case HWRM_RING_ALLOC_AGG:</div><div class='add'>+		req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG;</div><div class='add'>+		/* Association of agg ring with rx ring */</div><div class='add'>+		grp_info = &amp;bn-&gt;grp_info[ring-&gt;grp_idx];</div><div class='add'>+		req-&gt;rx_ring_id = cpu_to_le16(grp_info-&gt;rx_fw_ring_id);</div><div class='add'>+		req-&gt;rx_buf_size = cpu_to_le16(BNGE_RX_PAGE_SIZE);</div><div class='add'>+		req-&gt;stat_ctx_id = cpu_to_le32(grp_info-&gt;fw_stats_ctx);</div><div class='add'>+		req-&gt;enables |=</div><div class='add'>+			cpu_to_le32(RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID |</div><div class='add'>+				    RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID);</div><div class='add'>+		req-&gt;length = cpu_to_le32(bn-&gt;rx_agg_ring_mask + 1);</div><div class='add'>+		break;</div><div class='add'>+	case HWRM_RING_ALLOC_CMPL:</div><div class='add'>+		req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;</div><div class='add'>+		req-&gt;length = cpu_to_le32(bn-&gt;cp_ring_mask + 1);</div><div class='add'>+		/* Association of cp ring with nq */</div><div class='add'>+		grp_info = &amp;bn-&gt;grp_info[map_index];</div><div class='add'>+		req-&gt;nq_ring_id = cpu_to_le16(grp_info-&gt;nq_fw_ring_id);</div><div class='add'>+		req-&gt;cq_handle = cpu_to_le64(ring-&gt;handle);</div><div class='add'>+		req-&gt;enables |=</div><div class='add'>+			cpu_to_le32(RING_ALLOC_REQ_ENABLES_NQ_RING_ID_VALID);</div><div class='add'>+		break;</div><div class='add'>+	case HWRM_RING_ALLOC_NQ:</div><div class='add'>+		req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_NQ;</div><div class='add'>+		req-&gt;length = cpu_to_le32(bn-&gt;cp_ring_mask + 1);</div><div class='add'>+		req-&gt;int_mode = RING_ALLOC_REQ_INT_MODE_MSIX;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_err(bn-&gt;netdev, "hwrm alloc invalid ring type %d\n", ring_type);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	resp = bnge_hwrm_req_hold(bd, req);</div><div class='add'>+	rc = bnge_hwrm_req_send(bd, req);</div><div class='add'>+	ring_id = le16_to_cpu(resp-&gt;ring_id);</div><div class='add'>+	bnge_hwrm_req_drop(bd, req);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bd-&gt;netdev, "hwrm_ring_alloc type %d failed. rc:%d\n", ring_type, rc);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	ring-&gt;fw_ring_id = ring_id;</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_set_async_event_cr(struct bnge_dev *bd, int idx)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_cfg_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_req_init(bd, req, HWRM_FUNC_CFG);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;fid = cpu_to_le16(0xffff);</div><div class='add'>+	req-&gt;enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_ASYNC_EVENT_CR);</div><div class='add'>+	req-&gt;async_event_cr = cpu_to_le16(idx);</div><div class='add'>+	return bnge_hwrm_req_send(bd, req);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h b/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h<br/>new file mode 100644<br/>index 000000000000..042f28e84a05<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Broadcom */</div><div class='add'>+</div><div class='add'>+#ifndef _BNGE_HWRM_LIB_H_</div><div class='add'>+#define _BNGE_HWRM_LIB_H_</div><div class='add'>+</div><div class='add'>+#define BNGE_PLC_EN_JUMBO_THRES_VALID		\</div><div class='add'>+	VNIC_PLCMODES_CFG_REQ_ENABLES_JUMBO_THRESH_VALID</div><div class='add'>+#define BNGE_PLC_EN_HDS_THRES_VALID		\</div><div class='add'>+	VNIC_PLCMODES_CFG_REQ_ENABLES_HDS_THRESHOLD_VALID</div><div class='add'>+#define BNGE_VNIC_CFG_ROCE_DUAL_MODE		\</div><div class='add'>+	VNIC_CFG_REQ_FLAGS_ROCE_DUAL_VNIC_MODE</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_ver_get(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_func_reset(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_fw_set_time(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_func_drv_rgtr(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_func_drv_unrgtr(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_vnic_qcaps(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_nvm_dev_info(struct bnge_dev *bd,</div><div class='add'>+			   struct hwrm_nvm_get_dev_info_output *nvm_dev_info);</div><div class='add'>+int bnge_hwrm_func_backing_store(struct bnge_dev *bd,</div><div class='add'>+				 struct bnge_ctx_mem_type *ctxm,</div><div class='add'>+				 bool last);</div><div class='add'>+int bnge_hwrm_func_backing_store_qcaps(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_reserve_rings(struct bnge_dev *bd,</div><div class='add'>+			    struct bnge_hw_rings *hwr);</div><div class='add'>+int bnge_hwrm_func_qcaps(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_vnic_qcaps(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_func_qcfg(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_func_resc_qcaps(struct bnge_dev *bd);</div><div class='add'>+int bnge_hwrm_queue_qportcfg(struct bnge_dev *bd);</div><div class='add'>+</div><div class='add'>+int bnge_hwrm_vnic_set_hds(struct bnge_net *bn, struct bnge_vnic_info *vnic);</div><div class='add'>+int bnge_hwrm_vnic_ctx_alloc(struct bnge_dev *bd,</div><div class='add'>+			     struct bnge_vnic_info *vnic, u16 ctx_idx);</div><div class='add'>+int bnge_hwrm_vnic_set_rss(struct bnge_net *bn,</div><div class='add'>+			   struct bnge_vnic_info *vnic, bool set_rss);</div><div class='add'>+int bnge_hwrm_vnic_cfg(struct bnge_net *bn, struct bnge_vnic_info *vnic);</div><div class='add'>+void bnge_hwrm_update_rss_hash_cfg(struct bnge_net *bn);</div><div class='add'>+int bnge_hwrm_vnic_alloc(struct bnge_dev *bd, struct bnge_vnic_info *vnic,</div><div class='add'>+			 unsigned int nr_rings);</div><div class='add'>+void bnge_hwrm_vnic_free_one(struct bnge_dev *bd, struct bnge_vnic_info *vnic);</div><div class='add'>+void bnge_hwrm_vnic_ctx_free_one(struct bnge_dev *bd,</div><div class='add'>+				 struct bnge_vnic_info *vnic, u16 ctx_idx);</div><div class='add'>+int bnge_hwrm_l2_filter_free(struct bnge_dev *bd, struct bnge_l2_filter *fltr);</div><div class='add'>+int bnge_hwrm_l2_filter_alloc(struct bnge_dev *bd, struct bnge_l2_filter *fltr);</div><div class='add'>+int bnge_hwrm_cfa_l2_set_rx_mask(struct bnge_dev *bd,</div><div class='add'>+				 struct bnge_vnic_info *vnic);</div><div class='add'>+void bnge_hwrm_stat_ctx_free(struct bnge_net *bn);</div><div class='add'>+int bnge_hwrm_stat_ctx_alloc(struct bnge_net *bn);</div><div class='add'>+int hwrm_ring_free_send_msg(struct bnge_net *bn, struct bnge_ring_struct *ring,</div><div class='add'>+			    u32 ring_type, int cmpl_ring_id);</div><div class='add'>+int hwrm_ring_alloc_send_msg(struct bnge_net *bn,</div><div class='add'>+			     struct bnge_ring_struct *ring,</div><div class='add'>+			     u32 ring_type, u32 map_index);</div><div class='add'>+int bnge_hwrm_set_async_event_cr(struct bnge_dev *bd, int idx);</div><div class='add'>+#endif /* _BNGE_HWRM_LIB_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c<br/>new file mode 100644<br/>index 000000000000..832eeb960bd2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_netdev.c</a></div><div class='hunk'>@@ -0,0 +1,2485 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2025 Broadcom.</div><div class='add'>+</div><div class='add'>+#include &lt;asm/byteorder.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/dmapool.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if.h&gt;</div><div class='add'>+#include &lt;net/ip.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bnge.h"</div><div class='add'>+#include "bnge_hwrm_lib.h"</div><div class='add'>+#include "bnge_ethtool.h"</div><div class='add'>+#include "bnge_rmem.h"</div><div class='add'>+</div><div class='add'>+#define BNGE_RING_TO_TC_OFF(bd, tx)	\</div><div class='add'>+	((tx) % (bd)-&gt;tx_nr_rings_per_tc)</div><div class='add'>+</div><div class='add'>+#define BNGE_RING_TO_TC(bd, tx)		\</div><div class='add'>+	((tx) / (bd)-&gt;tx_nr_rings_per_tc)</div><div class='add'>+</div><div class='add'>+#define BNGE_TC_TO_RING_BASE(bd, tc)	\</div><div class='add'>+	((tc) * (bd)-&gt;tx_nr_rings_per_tc)</div><div class='add'>+</div><div class='add'>+static void bnge_free_stats_mem(struct bnge_net *bn,</div><div class='add'>+				struct bnge_stats_mem *stats)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+</div><div class='add'>+	if (stats-&gt;hw_stats) {</div><div class='add'>+		dma_free_coherent(bd-&gt;dev, stats-&gt;len, stats-&gt;hw_stats,</div><div class='add'>+				  stats-&gt;hw_stats_map);</div><div class='add'>+		stats-&gt;hw_stats = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_stats_mem(struct bnge_net *bn,</div><div class='add'>+				struct bnge_stats_mem *stats)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+</div><div class='add'>+	stats-&gt;hw_stats = dma_alloc_coherent(bd-&gt;dev, stats-&gt;len,</div><div class='add'>+					     &amp;stats-&gt;hw_stats_map, GFP_KERNEL);</div><div class='add'>+	if (!stats-&gt;hw_stats)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_ring_stats(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!bn-&gt;bnapi)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		struct bnge_nq_ring_info *nqr = &amp;bnapi-&gt;nq_ring;</div><div class='add'>+</div><div class='add'>+		bnge_free_stats_mem(bn, &amp;nqr-&gt;stats);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_ring_stats(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	u32 size, i;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	size = bd-&gt;hw_ring_stats_size;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		struct bnge_nq_ring_info *nqr = &amp;bnapi-&gt;nq_ring;</div><div class='add'>+</div><div class='add'>+		nqr-&gt;stats.len = size;</div><div class='add'>+		rc = bnge_alloc_stats_mem(bn, &amp;nqr-&gt;stats);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_ring_stats;</div><div class='add'>+</div><div class='add'>+		nqr-&gt;hw_stats_ctx_id = INVALID_STATS_CTX_ID;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_ring_stats:</div><div class='add'>+	bnge_free_ring_stats(bn);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_nq_desc_arr(struct bnge_nq_ring_info *nqr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring = &amp;nqr-&gt;ring_struct;</div><div class='add'>+</div><div class='add'>+	kfree(nqr-&gt;desc_ring);</div><div class='add'>+	nqr-&gt;desc_ring = NULL;</div><div class='add'>+	ring-&gt;ring_mem.pg_arr = NULL;</div><div class='add'>+	kfree(nqr-&gt;desc_mapping);</div><div class='add'>+	nqr-&gt;desc_mapping = NULL;</div><div class='add'>+	ring-&gt;ring_mem.dma_arr = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_cp_desc_arr(struct bnge_cp_ring_info *cpr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring = &amp;cpr-&gt;ring_struct;</div><div class='add'>+</div><div class='add'>+	kfree(cpr-&gt;desc_ring);</div><div class='add'>+	cpr-&gt;desc_ring = NULL;</div><div class='add'>+	ring-&gt;ring_mem.pg_arr = NULL;</div><div class='add'>+	kfree(cpr-&gt;desc_mapping);</div><div class='add'>+	cpr-&gt;desc_mapping = NULL;</div><div class='add'>+	ring-&gt;ring_mem.dma_arr = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_nq_desc_arr(struct bnge_nq_ring_info *nqr, int n)</div><div class='add'>+{</div><div class='add'>+	nqr-&gt;desc_ring = kcalloc(n, sizeof(*nqr-&gt;desc_ring), GFP_KERNEL);</div><div class='add'>+	if (!nqr-&gt;desc_ring)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	nqr-&gt;desc_mapping = kcalloc(n, sizeof(*nqr-&gt;desc_mapping), GFP_KERNEL);</div><div class='add'>+	if (!nqr-&gt;desc_mapping)</div><div class='add'>+		goto err_free_desc_ring;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_desc_ring:</div><div class='add'>+	kfree(nqr-&gt;desc_ring);</div><div class='add'>+	nqr-&gt;desc_ring = NULL;</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_cp_desc_arr(struct bnge_cp_ring_info *cpr, int n)</div><div class='add'>+{</div><div class='add'>+	cpr-&gt;desc_ring = kcalloc(n, sizeof(*cpr-&gt;desc_ring), GFP_KERNEL);</div><div class='add'>+	if (!cpr-&gt;desc_ring)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cpr-&gt;desc_mapping = kcalloc(n, sizeof(*cpr-&gt;desc_mapping), GFP_KERNEL);</div><div class='add'>+	if (!cpr-&gt;desc_mapping)</div><div class='add'>+		goto err_free_desc_ring;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_desc_ring:</div><div class='add'>+	kfree(cpr-&gt;desc_ring);</div><div class='add'>+	cpr-&gt;desc_ring = NULL;</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_nq_arrays(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+</div><div class='add'>+		bnge_free_nq_desc_arr(&amp;bnapi-&gt;nq_ring);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_nq_arrays(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i, rc;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+</div><div class='add'>+		rc = bnge_alloc_nq_desc_arr(&amp;bnapi-&gt;nq_ring, bn-&gt;cp_nr_pages);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_nq_arrays;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_nq_arrays:</div><div class='add'>+	bnge_free_nq_arrays(bn);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_nq_tree(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		struct bnge_nq_ring_info *nqr;</div><div class='add'>+		struct bnge_ring_struct *ring;</div><div class='add'>+		int j;</div><div class='add'>+</div><div class='add'>+		nqr = &amp;bnapi-&gt;nq_ring;</div><div class='add'>+		ring = &amp;nqr-&gt;ring_struct;</div><div class='add'>+</div><div class='add'>+		bnge_free_ring(bd, &amp;ring-&gt;ring_mem);</div><div class='add'>+</div><div class='add'>+		if (!nqr-&gt;cp_ring_arr)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; nqr-&gt;cp_ring_count; j++) {</div><div class='add'>+			struct bnge_cp_ring_info *cpr = &amp;nqr-&gt;cp_ring_arr[j];</div><div class='add'>+</div><div class='add'>+			ring = &amp;cpr-&gt;ring_struct;</div><div class='add'>+			bnge_free_ring(bd, &amp;ring-&gt;ring_mem);</div><div class='add'>+			bnge_free_cp_desc_arr(cpr);</div><div class='add'>+		}</div><div class='add'>+		kfree(nqr-&gt;cp_ring_arr);</div><div class='add'>+		nqr-&gt;cp_ring_arr = NULL;</div><div class='add'>+		nqr-&gt;cp_ring_count = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int alloc_one_cp_ring(struct bnge_net *bn,</div><div class='add'>+			     struct bnge_cp_ring_info *cpr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_mem_info *rmem;</div><div class='add'>+	struct bnge_ring_struct *ring;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_cp_desc_arr(cpr, bn-&gt;cp_nr_pages);</div><div class='add'>+	if (rc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	ring = &amp;cpr-&gt;ring_struct;</div><div class='add'>+	rmem = &amp;ring-&gt;ring_mem;</div><div class='add'>+	rmem-&gt;nr_pages = bn-&gt;cp_nr_pages;</div><div class='add'>+	rmem-&gt;page_size = HW_CMPD_RING_SIZE;</div><div class='add'>+	rmem-&gt;pg_arr = (void **)cpr-&gt;desc_ring;</div><div class='add'>+	rmem-&gt;dma_arr = cpr-&gt;desc_mapping;</div><div class='add'>+	rmem-&gt;flags = BNGE_RMEM_RING_PTE_FLAG;</div><div class='add'>+	rc = bnge_alloc_ring(bd, rmem);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_cp_desc_arr;</div><div class='add'>+	return rc;</div><div class='add'>+</div><div class='add'>+err_free_cp_desc_arr:</div><div class='add'>+	bnge_free_cp_desc_arr(cpr);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_nq_tree(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i, j, ulp_msix, rc;</div><div class='add'>+	int tcs = 1;</div><div class='add'>+</div><div class='add'>+	ulp_msix = bnge_aux_get_msix(bd);</div><div class='add'>+	for (i = 0, j = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		bool sh = !!(bd-&gt;flags &amp; BNGE_EN_SHARED_CHNL);</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		struct bnge_nq_ring_info *nqr;</div><div class='add'>+		struct bnge_cp_ring_info *cpr;</div><div class='add'>+		struct bnge_ring_struct *ring;</div><div class='add'>+		int cp_count = 0, k;</div><div class='add'>+		int rx = 0, tx = 0;</div><div class='add'>+</div><div class='add'>+		nqr = &amp;bnapi-&gt;nq_ring;</div><div class='add'>+		nqr-&gt;bnapi = bnapi;</div><div class='add'>+		ring = &amp;nqr-&gt;ring_struct;</div><div class='add'>+</div><div class='add'>+		rc = bnge_alloc_ring(bd, &amp;ring-&gt;ring_mem);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_nq_tree;</div><div class='add'>+</div><div class='add'>+		ring-&gt;map_idx = ulp_msix + i;</div><div class='add'>+</div><div class='add'>+		if (i &lt; bd-&gt;rx_nr_rings) {</div><div class='add'>+			cp_count++;</div><div class='add'>+			rx = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if ((sh &amp;&amp; i &lt; bd-&gt;tx_nr_rings) ||</div><div class='add'>+		    (!sh &amp;&amp; i &gt;= bd-&gt;rx_nr_rings)) {</div><div class='add'>+			cp_count += tcs;</div><div class='add'>+			tx = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nqr-&gt;cp_ring_arr = kcalloc(cp_count, sizeof(*cpr),</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+		if (!nqr-&gt;cp_ring_arr) {</div><div class='add'>+			rc = -ENOMEM;</div><div class='add'>+			goto err_free_nq_tree;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nqr-&gt;cp_ring_count = cp_count;</div><div class='add'>+</div><div class='add'>+		for (k = 0; k &lt; cp_count; k++) {</div><div class='add'>+			cpr = &amp;nqr-&gt;cp_ring_arr[k];</div><div class='add'>+			rc = alloc_one_cp_ring(bn, cpr);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto err_free_nq_tree;</div><div class='add'>+</div><div class='add'>+			cpr-&gt;bnapi = bnapi;</div><div class='add'>+			cpr-&gt;cp_idx = k;</div><div class='add'>+			if (!k &amp;&amp; rx) {</div><div class='add'>+				bn-&gt;rx_ring[i].rx_cpr = cpr;</div><div class='add'>+				cpr-&gt;cp_ring_type = BNGE_NQ_HDL_TYPE_RX;</div><div class='add'>+			} else {</div><div class='add'>+				int n, tc = k - rx;</div><div class='add'>+</div><div class='add'>+				n = BNGE_TC_TO_RING_BASE(bd, tc) + j;</div><div class='add'>+				bn-&gt;tx_ring[n].tx_cpr = cpr;</div><div class='add'>+				cpr-&gt;cp_ring_type = BNGE_NQ_HDL_TYPE_TX;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (tx)</div><div class='add'>+			j++;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_nq_tree:</div><div class='add'>+	bnge_free_nq_tree(bn);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bnge_separate_head_pool(struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	return rxr-&gt;need_head_pool || PAGE_SIZE &gt; BNGE_RX_PAGE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_one_rx_ring_bufs(struct bnge_net *bn,</div><div class='add'>+				       struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	int i, max_idx;</div><div class='add'>+</div><div class='add'>+	if (!rxr-&gt;rx_buf_ring)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	max_idx = bn-&gt;rx_nr_pages * RX_DESC_CNT;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max_idx; i++) {</div><div class='add'>+		struct bnge_sw_rx_bd *rx_buf = &amp;rxr-&gt;rx_buf_ring[i];</div><div class='add'>+		void *data = rx_buf-&gt;data;</div><div class='add'>+</div><div class='add'>+		if (!data)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rx_buf-&gt;data = NULL;</div><div class='add'>+		page_pool_free_va(rxr-&gt;head_pool, data, true);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_one_agg_ring_bufs(struct bnge_net *bn,</div><div class='add'>+					struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	int i, max_idx;</div><div class='add'>+</div><div class='add'>+	if (!rxr-&gt;rx_agg_buf_ring)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	max_idx = bn-&gt;rx_agg_nr_pages * RX_DESC_CNT;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max_idx; i++) {</div><div class='add'>+		struct bnge_sw_rx_agg_bd *rx_agg_buf = &amp;rxr-&gt;rx_agg_buf_ring[i];</div><div class='add'>+		netmem_ref netmem = rx_agg_buf-&gt;netmem;</div><div class='add'>+</div><div class='add'>+		if (!netmem)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rx_agg_buf-&gt;netmem = 0;</div><div class='add'>+		__clear_bit(i, rxr-&gt;rx_agg_bmap);</div><div class='add'>+</div><div class='add'>+		page_pool_recycle_direct_netmem(rxr-&gt;page_pool, netmem);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_one_rx_ring_pair_bufs(struct bnge_net *bn,</div><div class='add'>+					    struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	bnge_free_one_rx_ring_bufs(bn, rxr);</div><div class='add'>+	bnge_free_one_agg_ring_bufs(bn, rxr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_rx_ring_pair_bufs(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!bn-&gt;rx_ring)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;rx_nr_rings; i++)</div><div class='add'>+		bnge_free_one_rx_ring_pair_bufs(bn, &amp;bn-&gt;rx_ring[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_all_rings_bufs(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	bnge_free_rx_ring_pair_bufs(bn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_rx_rings(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;rx_nr_rings; i++) {</div><div class='add'>+		struct bnge_rx_ring_info *rxr = &amp;bn-&gt;rx_ring[i];</div><div class='add'>+		struct bnge_ring_struct *ring;</div><div class='add'>+</div><div class='add'>+		page_pool_destroy(rxr-&gt;page_pool);</div><div class='add'>+		page_pool_destroy(rxr-&gt;head_pool);</div><div class='add'>+		rxr-&gt;page_pool = rxr-&gt;head_pool = NULL;</div><div class='add'>+</div><div class='add'>+		kfree(rxr-&gt;rx_agg_bmap);</div><div class='add'>+		rxr-&gt;rx_agg_bmap = NULL;</div><div class='add'>+</div><div class='add'>+		ring = &amp;rxr-&gt;rx_ring_struct;</div><div class='add'>+		bnge_free_ring(bd, &amp;ring-&gt;ring_mem);</div><div class='add'>+</div><div class='add'>+		ring = &amp;rxr-&gt;rx_agg_ring_struct;</div><div class='add'>+		bnge_free_ring(bd, &amp;ring-&gt;ring_mem);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_rx_page_pool(struct bnge_net *bn,</div><div class='add'>+				   struct bnge_rx_ring_info *rxr,</div><div class='add'>+				   int numa_node)</div><div class='add'>+{</div><div class='add'>+	const unsigned int agg_size_fac = PAGE_SIZE / BNGE_RX_PAGE_SIZE;</div><div class='add'>+	const unsigned int rx_size_fac = PAGE_SIZE / SZ_4K;</div><div class='add'>+	struct page_pool_params pp = { 0 };</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	struct page_pool *pool;</div><div class='add'>+</div><div class='add'>+	pp.pool_size = bn-&gt;rx_agg_ring_size / agg_size_fac;</div><div class='add'>+	pp.nid = numa_node;</div><div class='add'>+	pp.netdev = bn-&gt;netdev;</div><div class='add'>+	pp.dev = bd-&gt;dev;</div><div class='add'>+	pp.dma_dir = bn-&gt;rx_dir;</div><div class='add'>+	pp.max_len = PAGE_SIZE;</div><div class='add'>+	pp.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV |</div><div class='add'>+		   PP_FLAG_ALLOW_UNREADABLE_NETMEM;</div><div class='add'>+	pp.queue_idx = rxr-&gt;bnapi-&gt;index;</div><div class='add'>+</div><div class='add'>+	pool = page_pool_create(&amp;pp);</div><div class='add'>+	if (IS_ERR(pool))</div><div class='add'>+		return PTR_ERR(pool);</div><div class='add'>+	rxr-&gt;page_pool = pool;</div><div class='add'>+</div><div class='add'>+	rxr-&gt;need_head_pool = page_pool_is_unreadable(pool);</div><div class='add'>+	if (bnge_separate_head_pool(rxr)) {</div><div class='add'>+		pp.pool_size = min(bn-&gt;rx_ring_size / rx_size_fac, 1024);</div><div class='add'>+		pp.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;</div><div class='add'>+		pool = page_pool_create(&amp;pp);</div><div class='add'>+		if (IS_ERR(pool))</div><div class='add'>+			goto err_destroy_pp;</div><div class='add'>+	} else {</div><div class='add'>+		page_pool_get(pool);</div><div class='add'>+	}</div><div class='add'>+	rxr-&gt;head_pool = pool;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_destroy_pp:</div><div class='add'>+	page_pool_destroy(rxr-&gt;page_pool);</div><div class='add'>+	rxr-&gt;page_pool = NULL;</div><div class='add'>+	return PTR_ERR(pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_enable_rx_page_pool(struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	page_pool_enable_direct_recycling(rxr-&gt;head_pool, &amp;rxr-&gt;bnapi-&gt;napi);</div><div class='add'>+	page_pool_enable_direct_recycling(rxr-&gt;page_pool, &amp;rxr-&gt;bnapi-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_rx_agg_bmap(struct bnge_net *bn,</div><div class='add'>+				  struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	u16 mem_size;</div><div class='add'>+</div><div class='add'>+	rxr-&gt;rx_agg_bmap_size = bn-&gt;rx_agg_ring_mask + 1;</div><div class='add'>+	mem_size = rxr-&gt;rx_agg_bmap_size / 8;</div><div class='add'>+	rxr-&gt;rx_agg_bmap = kzalloc(mem_size, GFP_KERNEL);</div><div class='add'>+	if (!rxr-&gt;rx_agg_bmap)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_rx_rings(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	int i, rc = 0, agg_rings = 0, cpu;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+</div><div class='add'>+	if (bnge_is_agg_reqd(bd))</div><div class='add'>+		agg_rings = 1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;rx_nr_rings; i++) {</div><div class='add'>+		struct bnge_rx_ring_info *rxr = &amp;bn-&gt;rx_ring[i];</div><div class='add'>+		struct bnge_ring_struct *ring;</div><div class='add'>+		int cpu_node;</div><div class='add'>+</div><div class='add'>+		ring = &amp;rxr-&gt;rx_ring_struct;</div><div class='add'>+</div><div class='add'>+		cpu = cpumask_local_spread(i, dev_to_node(bd-&gt;dev));</div><div class='add'>+		cpu_node = cpu_to_node(cpu);</div><div class='add'>+		netdev_dbg(bn-&gt;netdev, "Allocating page pool for rx_ring[%d] on numa_node: %d\n",</div><div class='add'>+			   i, cpu_node);</div><div class='add'>+		rc = bnge_alloc_rx_page_pool(bn, rxr, cpu_node);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_rx_rings;</div><div class='add'>+		bnge_enable_rx_page_pool(rxr);</div><div class='add'>+</div><div class='add'>+		rc = bnge_alloc_ring(bd, &amp;ring-&gt;ring_mem);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_rx_rings;</div><div class='add'>+</div><div class='add'>+		ring-&gt;grp_idx = i;</div><div class='add'>+		if (agg_rings) {</div><div class='add'>+			ring = &amp;rxr-&gt;rx_agg_ring_struct;</div><div class='add'>+			rc = bnge_alloc_ring(bd, &amp;ring-&gt;ring_mem);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto err_free_rx_rings;</div><div class='add'>+</div><div class='add'>+			ring-&gt;grp_idx = i;</div><div class='add'>+			rc = bnge_alloc_rx_agg_bmap(bn, rxr);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto err_free_rx_rings;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return rc;</div><div class='add'>+</div><div class='add'>+err_free_rx_rings:</div><div class='add'>+	bnge_free_rx_rings(bn);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_tx_rings(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;tx_nr_rings; i++) {</div><div class='add'>+		struct bnge_tx_ring_info *txr = &amp;bn-&gt;tx_ring[i];</div><div class='add'>+		struct bnge_ring_struct *ring;</div><div class='add'>+</div><div class='add'>+		ring = &amp;txr-&gt;tx_ring_struct;</div><div class='add'>+</div><div class='add'>+		bnge_free_ring(bd, &amp;ring-&gt;ring_mem);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_tx_rings(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i, j, rc;</div><div class='add'>+</div><div class='add'>+	for (i = 0, j = 0; i &lt; bd-&gt;tx_nr_rings; i++) {</div><div class='add'>+		struct bnge_tx_ring_info *txr = &amp;bn-&gt;tx_ring[i];</div><div class='add'>+		struct bnge_ring_struct *ring;</div><div class='add'>+		u8 qidx;</div><div class='add'>+</div><div class='add'>+		ring = &amp;txr-&gt;tx_ring_struct;</div><div class='add'>+</div><div class='add'>+		rc = bnge_alloc_ring(bd, &amp;ring-&gt;ring_mem);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_tx_rings;</div><div class='add'>+</div><div class='add'>+		ring-&gt;grp_idx = txr-&gt;bnapi-&gt;index;</div><div class='add'>+		qidx = bd-&gt;tc_to_qidx[j];</div><div class='add'>+		ring-&gt;queue_id = bd-&gt;q_info[qidx].queue_id;</div><div class='add'>+		if (BNGE_RING_TO_TC_OFF(bd, i) == (bd-&gt;tx_nr_rings_per_tc - 1))</div><div class='add'>+			j++;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_tx_rings:</div><div class='add'>+	bnge_free_tx_rings(bn);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_vnic_attributes(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = bn-&gt;bd-&gt;pdev;</div><div class='add'>+	struct bnge_vnic_info *vnic;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!bn-&gt;vnic_info)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bn-&gt;nr_vnics; i++) {</div><div class='add'>+		vnic = &amp;bn-&gt;vnic_info[i];</div><div class='add'>+</div><div class='add'>+		kfree(vnic-&gt;uc_list);</div><div class='add'>+		vnic-&gt;uc_list = NULL;</div><div class='add'>+</div><div class='add'>+		if (vnic-&gt;mc_list) {</div><div class='add'>+			dma_free_coherent(&amp;pdev-&gt;dev, vnic-&gt;mc_list_size,</div><div class='add'>+					  vnic-&gt;mc_list, vnic-&gt;mc_list_mapping);</div><div class='add'>+			vnic-&gt;mc_list = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (vnic-&gt;rss_table) {</div><div class='add'>+			dma_free_coherent(&amp;pdev-&gt;dev, vnic-&gt;rss_table_size,</div><div class='add'>+					  vnic-&gt;rss_table,</div><div class='add'>+					  vnic-&gt;rss_table_dma_addr);</div><div class='add'>+			vnic-&gt;rss_table = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		vnic-&gt;rss_hash_key = NULL;</div><div class='add'>+		vnic-&gt;flags = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_vnic_attributes(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	struct bnge_vnic_info *vnic;</div><div class='add'>+	int i, size;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bn-&gt;nr_vnics; i++) {</div><div class='add'>+		vnic = &amp;bn-&gt;vnic_info[i];</div><div class='add'>+</div><div class='add'>+		if (vnic-&gt;flags &amp; BNGE_VNIC_UCAST_FLAG) {</div><div class='add'>+			int mem_size = (BNGE_MAX_UC_ADDRS - 1) * ETH_ALEN;</div><div class='add'>+</div><div class='add'>+			vnic-&gt;uc_list = kmalloc(mem_size, GFP_KERNEL);</div><div class='add'>+			if (!vnic-&gt;uc_list)</div><div class='add'>+				goto err_free_vnic_attributes;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (vnic-&gt;flags &amp; BNGE_VNIC_MCAST_FLAG) {</div><div class='add'>+			vnic-&gt;mc_list_size = BNGE_MAX_MC_ADDRS * ETH_ALEN;</div><div class='add'>+			vnic-&gt;mc_list =</div><div class='add'>+				dma_alloc_coherent(bd-&gt;dev,</div><div class='add'>+						   vnic-&gt;mc_list_size,</div><div class='add'>+						   &amp;vnic-&gt;mc_list_mapping,</div><div class='add'>+						   GFP_KERNEL);</div><div class='add'>+			if (!vnic-&gt;mc_list)</div><div class='add'>+				goto err_free_vnic_attributes;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Allocate rss table and hash key */</div><div class='add'>+		size = L1_CACHE_ALIGN(BNGE_MAX_RSS_TABLE_SIZE);</div><div class='add'>+</div><div class='add'>+		vnic-&gt;rss_table_size = size + HW_HASH_KEY_SIZE;</div><div class='add'>+		vnic-&gt;rss_table = dma_alloc_coherent(bd-&gt;dev,</div><div class='add'>+						     vnic-&gt;rss_table_size,</div><div class='add'>+						     &amp;vnic-&gt;rss_table_dma_addr,</div><div class='add'>+						     GFP_KERNEL);</div><div class='add'>+		if (!vnic-&gt;rss_table)</div><div class='add'>+			goto err_free_vnic_attributes;</div><div class='add'>+</div><div class='add'>+		vnic-&gt;rss_hash_key = ((void *)vnic-&gt;rss_table) + size;</div><div class='add'>+		vnic-&gt;rss_hash_key_dma_addr = vnic-&gt;rss_table_dma_addr + size;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_vnic_attributes:</div><div class='add'>+	bnge_free_vnic_attributes(bn);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_vnics(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	int num_vnics;</div><div class='add'>+</div><div class='add'>+	/* Allocate only 1 VNIC for now</div><div class='add'>+	 * Additional VNICs will be added based on RFS/NTUPLE in future patches</div><div class='add'>+	 */</div><div class='add'>+	num_vnics = 1;</div><div class='add'>+</div><div class='add'>+	bn-&gt;vnic_info = kcalloc(num_vnics, sizeof(struct bnge_vnic_info),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!bn-&gt;vnic_info)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bn-&gt;nr_vnics = num_vnics;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_vnics(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	kfree(bn-&gt;vnic_info);</div><div class='add'>+	bn-&gt;vnic_info = NULL;</div><div class='add'>+	bn-&gt;nr_vnics = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_ring_grps(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	kfree(bn-&gt;grp_info);</div><div class='add'>+	bn-&gt;grp_info = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_init_ring_grps(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	bn-&gt;grp_info = kcalloc(bd-&gt;nq_nr_rings,</div><div class='add'>+			       sizeof(struct bnge_ring_grp_info),</div><div class='add'>+			       GFP_KERNEL);</div><div class='add'>+	if (!bn-&gt;grp_info)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		bn-&gt;grp_info[i].fw_stats_ctx = INVALID_HW_RING_ID;</div><div class='add'>+		bn-&gt;grp_info[i].fw_grp_id = INVALID_HW_RING_ID;</div><div class='add'>+		bn-&gt;grp_info[i].rx_fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+		bn-&gt;grp_info[i].agg_fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+		bn-&gt;grp_info[i].nq_fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_core(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	bnge_free_vnic_attributes(bn);</div><div class='add'>+	bnge_free_tx_rings(bn);</div><div class='add'>+	bnge_free_rx_rings(bn);</div><div class='add'>+	bnge_free_nq_tree(bn);</div><div class='add'>+	bnge_free_nq_arrays(bn);</div><div class='add'>+	bnge_free_ring_stats(bn);</div><div class='add'>+	bnge_free_ring_grps(bn);</div><div class='add'>+	bnge_free_vnics(bn);</div><div class='add'>+	kfree(bn-&gt;tx_ring_map);</div><div class='add'>+	bn-&gt;tx_ring_map = NULL;</div><div class='add'>+	kfree(bn-&gt;tx_ring);</div><div class='add'>+	bn-&gt;tx_ring = NULL;</div><div class='add'>+	kfree(bn-&gt;rx_ring);</div><div class='add'>+	bn-&gt;rx_ring = NULL;</div><div class='add'>+	kfree(bn-&gt;bnapi);</div><div class='add'>+	bn-&gt;bnapi = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_core(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i, j, size, arr_size;</div><div class='add'>+	int rc = -ENOMEM;</div><div class='add'>+	void *bnapi;</div><div class='add'>+</div><div class='add'>+	arr_size = L1_CACHE_ALIGN(sizeof(struct bnge_napi *) *</div><div class='add'>+			bd-&gt;nq_nr_rings);</div><div class='add'>+	size = L1_CACHE_ALIGN(sizeof(struct bnge_napi));</div><div class='add'>+	bnapi = kzalloc(arr_size + size * bd-&gt;nq_nr_rings, GFP_KERNEL);</div><div class='add'>+	if (!bnapi)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	bn-&gt;bnapi = bnapi;</div><div class='add'>+	bnapi += arr_size;</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++, bnapi += size) {</div><div class='add'>+		struct bnge_nq_ring_info *nqr;</div><div class='add'>+</div><div class='add'>+		bn-&gt;bnapi[i] = bnapi;</div><div class='add'>+		bn-&gt;bnapi[i]-&gt;index = i;</div><div class='add'>+		bn-&gt;bnapi[i]-&gt;bn = bn;</div><div class='add'>+		nqr = &amp;bn-&gt;bnapi[i]-&gt;nq_ring;</div><div class='add'>+		nqr-&gt;ring_struct.ring_mem.flags = BNGE_RMEM_RING_PTE_FLAG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bn-&gt;rx_ring = kcalloc(bd-&gt;rx_nr_rings,</div><div class='add'>+			      sizeof(struct bnge_rx_ring_info),</div><div class='add'>+			      GFP_KERNEL);</div><div class='add'>+	if (!bn-&gt;rx_ring)</div><div class='add'>+		goto err_free_core;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;rx_nr_rings; i++) {</div><div class='add'>+		struct bnge_rx_ring_info *rxr = &amp;bn-&gt;rx_ring[i];</div><div class='add'>+</div><div class='add'>+		rxr-&gt;rx_ring_struct.ring_mem.flags =</div><div class='add'>+			BNGE_RMEM_RING_PTE_FLAG;</div><div class='add'>+		rxr-&gt;rx_agg_ring_struct.ring_mem.flags =</div><div class='add'>+			BNGE_RMEM_RING_PTE_FLAG;</div><div class='add'>+		rxr-&gt;bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		bn-&gt;bnapi[i]-&gt;rx_ring = &amp;bn-&gt;rx_ring[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bn-&gt;tx_ring = kcalloc(bd-&gt;tx_nr_rings,</div><div class='add'>+			      sizeof(struct bnge_tx_ring_info),</div><div class='add'>+			      GFP_KERNEL);</div><div class='add'>+	if (!bn-&gt;tx_ring)</div><div class='add'>+		goto err_free_core;</div><div class='add'>+</div><div class='add'>+	bn-&gt;tx_ring_map = kcalloc(bd-&gt;tx_nr_rings, sizeof(u16),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (!bn-&gt;tx_ring_map)</div><div class='add'>+		goto err_free_core;</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;flags &amp; BNGE_EN_SHARED_CHNL)</div><div class='add'>+		j = 0;</div><div class='add'>+	else</div><div class='add'>+		j = bd-&gt;rx_nr_rings;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;tx_nr_rings; i++) {</div><div class='add'>+		struct bnge_tx_ring_info *txr = &amp;bn-&gt;tx_ring[i];</div><div class='add'>+		struct bnge_napi *bnapi2;</div><div class='add'>+		int k;</div><div class='add'>+</div><div class='add'>+		txr-&gt;tx_ring_struct.ring_mem.flags = BNGE_RMEM_RING_PTE_FLAG;</div><div class='add'>+		bn-&gt;tx_ring_map[i] = i;</div><div class='add'>+		k = j + BNGE_RING_TO_TC_OFF(bd, i);</div><div class='add'>+</div><div class='add'>+		bnapi2 = bn-&gt;bnapi[k];</div><div class='add'>+		txr-&gt;txq_index = i;</div><div class='add'>+		txr-&gt;tx_napi_idx =</div><div class='add'>+			BNGE_RING_TO_TC(bd, txr-&gt;txq_index);</div><div class='add'>+		bnapi2-&gt;tx_ring[txr-&gt;tx_napi_idx] = txr;</div><div class='add'>+		txr-&gt;bnapi = bnapi2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_ring_stats(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_core;</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_vnics(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_core;</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_nq_arrays(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_core;</div><div class='add'>+</div><div class='add'>+	bnge_init_ring_struct(bn);</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_rx_rings(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_core;</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_tx_rings(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_core;</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_nq_tree(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_core;</div><div class='add'>+</div><div class='add'>+	bn-&gt;vnic_info[BNGE_VNIC_DEFAULT].flags |= BNGE_VNIC_RSS_FLAG |</div><div class='add'>+						  BNGE_VNIC_MCAST_FLAG |</div><div class='add'>+						  BNGE_VNIC_UCAST_FLAG;</div><div class='add'>+	rc = bnge_alloc_vnic_attributes(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_core;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_core:</div><div class='add'>+	bnge_free_core(bn);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 bnge_cp_ring_for_rx(struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	return rxr-&gt;rx_cpr-&gt;ring_struct.fw_ring_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 bnge_cp_ring_for_tx(struct bnge_tx_ring_info *txr)</div><div class='add'>+{</div><div class='add'>+	return txr-&gt;tx_cpr-&gt;ring_struct.fw_ring_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_db_nq(struct bnge_net *bn, struct bnge_db_info *db, u32 idx)</div><div class='add'>+{</div><div class='add'>+	bnge_writeq(bn-&gt;bd, db-&gt;db_key64 | DBR_TYPE_NQ_MASK |</div><div class='add'>+		    DB_RING_IDX(db, idx), db-&gt;doorbell);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_db_cq(struct bnge_net *bn, struct bnge_db_info *db, u32 idx)</div><div class='add'>+{</div><div class='add'>+	bnge_writeq(bn-&gt;bd, db-&gt;db_key64 | DBR_TYPE_CQ_ARMALL |</div><div class='add'>+		    DB_RING_IDX(db, idx), db-&gt;doorbell);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_cp_num_to_irq_num(struct bnge_net *bn, int n)</div><div class='add'>+{</div><div class='add'>+	struct bnge_napi *bnapi = bn-&gt;bnapi[n];</div><div class='add'>+	struct bnge_nq_ring_info *nqr;</div><div class='add'>+</div><div class='add'>+	nqr = &amp;bnapi-&gt;nq_ring;</div><div class='add'>+</div><div class='add'>+	return nqr-&gt;ring_struct.map_idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t bnge_msix(int irq, void *dev_instance)</div><div class='add'>+{</div><div class='add'>+	/* NAPI scheduling to be added in a future patch */</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_nq_tree(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_nq_ring_info *nqr = &amp;bn-&gt;bnapi[i]-&gt;nq_ring;</div><div class='add'>+		struct bnge_ring_struct *ring = &amp;nqr-&gt;ring_struct;</div><div class='add'>+</div><div class='add'>+		ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+		for (j = 0; j &lt; nqr-&gt;cp_ring_count; j++) {</div><div class='add'>+			struct bnge_cp_ring_info *cpr = &amp;nqr-&gt;cp_ring_arr[j];</div><div class='add'>+</div><div class='add'>+			ring = &amp;cpr-&gt;ring_struct;</div><div class='add'>+			ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netmem_ref __bnge_alloc_rx_netmem(struct bnge_net *bn,</div><div class='add'>+					 dma_addr_t *mapping,</div><div class='add'>+					 struct bnge_rx_ring_info *rxr,</div><div class='add'>+					 unsigned int *offset,</div><div class='add'>+					 gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	netmem_ref netmem;</div><div class='add'>+</div><div class='add'>+	if (PAGE_SIZE &gt; BNGE_RX_PAGE_SIZE) {</div><div class='add'>+		netmem = page_pool_alloc_frag_netmem(rxr-&gt;page_pool, offset,</div><div class='add'>+						     BNGE_RX_PAGE_SIZE, gfp);</div><div class='add'>+	} else {</div><div class='add'>+		netmem = page_pool_alloc_netmems(rxr-&gt;page_pool, gfp);</div><div class='add'>+		*offset = 0;</div><div class='add'>+	}</div><div class='add'>+	if (!netmem)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	*mapping = page_pool_get_dma_addr_netmem(netmem) + *offset;</div><div class='add'>+	return netmem;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 *__bnge_alloc_rx_frag(struct bnge_net *bn, dma_addr_t *mapping,</div><div class='add'>+				struct bnge_rx_ring_info *rxr,</div><div class='add'>+				gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	struct page *page;</div><div class='add'>+</div><div class='add'>+	page = page_pool_alloc_frag(rxr-&gt;head_pool, &amp;offset,</div><div class='add'>+				    bn-&gt;rx_buf_size, gfp);</div><div class='add'>+	if (!page)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	*mapping = page_pool_get_dma_addr(page) + bn-&gt;rx_dma_offset + offset;</div><div class='add'>+	return page_address(page) + offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_rx_data(struct bnge_net *bn,</div><div class='add'>+			      struct bnge_rx_ring_info *rxr,</div><div class='add'>+			      u16 prod, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct bnge_sw_rx_bd *rx_buf = &amp;rxr-&gt;rx_buf_ring[RING_RX(bn, prod)];</div><div class='add'>+	struct rx_bd *rxbd;</div><div class='add'>+	dma_addr_t mapping;</div><div class='add'>+	u8 *data;</div><div class='add'>+</div><div class='add'>+	rxbd = &amp;rxr-&gt;rx_desc_ring[RX_RING(bn, prod)][RX_IDX(prod)];</div><div class='add'>+	data = __bnge_alloc_rx_frag(bn, &amp;mapping, rxr, gfp);</div><div class='add'>+	if (!data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rx_buf-&gt;data = data;</div><div class='add'>+	rx_buf-&gt;data_ptr = data + bn-&gt;rx_offset;</div><div class='add'>+	rx_buf-&gt;mapping = mapping;</div><div class='add'>+</div><div class='add'>+	rxbd-&gt;rx_bd_haddr = cpu_to_le64(mapping);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_one_rx_ring_bufs(struct bnge_net *bn,</div><div class='add'>+				       struct bnge_rx_ring_info *rxr,</div><div class='add'>+				       int ring_nr)</div><div class='add'>+{</div><div class='add'>+	u32 prod = rxr-&gt;rx_prod;</div><div class='add'>+	int i, rc = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bn-&gt;rx_ring_size; i++) {</div><div class='add'>+		rc = bnge_alloc_rx_data(bn, rxr, prod, GFP_KERNEL);</div><div class='add'>+		if (rc)</div><div class='add'>+			break;</div><div class='add'>+		prod = NEXT_RX(prod);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Abort if not a single buffer can be allocated */</div><div class='add'>+	if (rc &amp;&amp; !i) {</div><div class='add'>+		netdev_err(bn-&gt;netdev,</div><div class='add'>+			   "RX ring %d: allocated %d/%d buffers, abort\n",</div><div class='add'>+			   ring_nr, i, bn-&gt;rx_ring_size);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rxr-&gt;rx_prod = prod;</div><div class='add'>+</div><div class='add'>+	if (i &lt; bn-&gt;rx_ring_size)</div><div class='add'>+		netdev_warn(bn-&gt;netdev,</div><div class='add'>+			    "RX ring %d: allocated %d/%d buffers, continuing\n",</div><div class='add'>+			    ring_nr, i, bn-&gt;rx_ring_size);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 bnge_find_next_agg_idx(struct bnge_rx_ring_info *rxr, u16 idx)</div><div class='add'>+{</div><div class='add'>+	u16 next, max = rxr-&gt;rx_agg_bmap_size;</div><div class='add'>+</div><div class='add'>+	next = find_next_zero_bit(rxr-&gt;rx_agg_bmap, max, idx);</div><div class='add'>+	if (next &gt;= max)</div><div class='add'>+		next = find_first_zero_bit(rxr-&gt;rx_agg_bmap, max);</div><div class='add'>+	return next;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_rx_netmem(struct bnge_net *bn,</div><div class='add'>+				struct bnge_rx_ring_info *rxr,</div><div class='add'>+				u16 prod, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct bnge_sw_rx_agg_bd *rx_agg_buf;</div><div class='add'>+	u16 sw_prod = rxr-&gt;rx_sw_agg_prod;</div><div class='add'>+	unsigned int offset = 0;</div><div class='add'>+	struct rx_bd *rxbd;</div><div class='add'>+	dma_addr_t mapping;</div><div class='add'>+	netmem_ref netmem;</div><div class='add'>+</div><div class='add'>+	rxbd = &amp;rxr-&gt;rx_agg_desc_ring[RX_AGG_RING(bn, prod)][RX_IDX(prod)];</div><div class='add'>+	netmem = __bnge_alloc_rx_netmem(bn, &amp;mapping, rxr, &amp;offset, gfp);</div><div class='add'>+	if (!netmem)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (unlikely(test_bit(sw_prod, rxr-&gt;rx_agg_bmap)))</div><div class='add'>+		sw_prod = bnge_find_next_agg_idx(rxr, sw_prod);</div><div class='add'>+</div><div class='add'>+	__set_bit(sw_prod, rxr-&gt;rx_agg_bmap);</div><div class='add'>+	rx_agg_buf = &amp;rxr-&gt;rx_agg_buf_ring[sw_prod];</div><div class='add'>+	rxr-&gt;rx_sw_agg_prod = RING_RX_AGG(bn, NEXT_RX_AGG(sw_prod));</div><div class='add'>+</div><div class='add'>+	rx_agg_buf-&gt;netmem = netmem;</div><div class='add'>+	rx_agg_buf-&gt;offset = offset;</div><div class='add'>+	rx_agg_buf-&gt;mapping = mapping;</div><div class='add'>+	rxbd-&gt;rx_bd_haddr = cpu_to_le64(mapping);</div><div class='add'>+	rxbd-&gt;rx_bd_opaque = sw_prod;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_one_agg_ring_bufs(struct bnge_net *bn,</div><div class='add'>+					struct bnge_rx_ring_info *rxr,</div><div class='add'>+					int ring_nr)</div><div class='add'>+{</div><div class='add'>+	u32 prod = rxr-&gt;rx_agg_prod;</div><div class='add'>+	int i, rc = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bn-&gt;rx_agg_ring_size; i++) {</div><div class='add'>+		rc = bnge_alloc_rx_netmem(bn, rxr, prod, GFP_KERNEL);</div><div class='add'>+		if (rc)</div><div class='add'>+			break;</div><div class='add'>+		prod = NEXT_RX_AGG(prod);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rc &amp;&amp; i &lt; MAX_SKB_FRAGS) {</div><div class='add'>+		netdev_err(bn-&gt;netdev,</div><div class='add'>+			   "Agg ring %d: allocated %d/%d buffers (min %d), abort\n",</div><div class='add'>+			   ring_nr, i, bn-&gt;rx_agg_ring_size, MAX_SKB_FRAGS);</div><div class='add'>+		goto err_free_one_agg_ring_bufs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rxr-&gt;rx_agg_prod = prod;</div><div class='add'>+</div><div class='add'>+	if (i &lt; bn-&gt;rx_agg_ring_size)</div><div class='add'>+		netdev_warn(bn-&gt;netdev,</div><div class='add'>+			    "Agg ring %d: allocated %d/%d buffers, continuing\n",</div><div class='add'>+			    ring_nr, i, bn-&gt;rx_agg_ring_size);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_one_agg_ring_bufs:</div><div class='add'>+	bnge_free_one_agg_ring_bufs(bn, rxr);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_one_rx_ring_pair_bufs(struct bnge_net *bn, int ring_nr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_rx_ring_info *rxr = &amp;bn-&gt;rx_ring[ring_nr];</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_one_rx_ring_bufs(bn, rxr, ring_nr);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (bnge_is_agg_reqd(bn-&gt;bd)) {</div><div class='add'>+		rc = bnge_alloc_one_agg_ring_bufs(bn, rxr, ring_nr);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_one_rx_ring_bufs;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_one_rx_ring_bufs:</div><div class='add'>+	bnge_free_one_rx_ring_bufs(bn, rxr);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_rxbd_pages(struct bnge_ring_struct *ring, u32 type)</div><div class='add'>+{</div><div class='add'>+	struct rx_bd **rx_desc_ring;</div><div class='add'>+	u32 prod;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	rx_desc_ring = (struct rx_bd **)ring-&gt;ring_mem.pg_arr;</div><div class='add'>+	for (i = 0, prod = 0; i &lt; ring-&gt;ring_mem.nr_pages; i++) {</div><div class='add'>+		struct rx_bd *rxbd = rx_desc_ring[i];</div><div class='add'>+		int j;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; RX_DESC_CNT; j++, rxbd++, prod++) {</div><div class='add'>+			rxbd-&gt;rx_bd_len_flags_type = cpu_to_le32(type);</div><div class='add'>+			rxbd-&gt;rx_bd_opaque = prod;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_one_rx_ring_rxbd(struct bnge_net *bn,</div><div class='add'>+				       struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring;</div><div class='add'>+	u32 type;</div><div class='add'>+</div><div class='add'>+	type = (bn-&gt;rx_buf_use_size &lt;&lt; RX_BD_LEN_SHIFT) |</div><div class='add'>+		RX_BD_TYPE_RX_PACKET_BD | RX_BD_FLAGS_EOP;</div><div class='add'>+</div><div class='add'>+	if (NET_IP_ALIGN == 2)</div><div class='add'>+		type |= RX_BD_FLAGS_SOP;</div><div class='add'>+</div><div class='add'>+	ring = &amp;rxr-&gt;rx_ring_struct;</div><div class='add'>+	bnge_init_rxbd_pages(ring, type);</div><div class='add'>+	ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_one_agg_ring_rxbd(struct bnge_net *bn,</div><div class='add'>+					struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring;</div><div class='add'>+	u32 type;</div><div class='add'>+</div><div class='add'>+	ring = &amp;rxr-&gt;rx_agg_ring_struct;</div><div class='add'>+	ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+	if (bnge_is_agg_reqd(bn-&gt;bd)) {</div><div class='add'>+		type = ((u32)BNGE_RX_PAGE_SIZE &lt;&lt; RX_BD_LEN_SHIFT) |</div><div class='add'>+			RX_BD_TYPE_RX_AGG_BD | RX_BD_FLAGS_SOP;</div><div class='add'>+</div><div class='add'>+		bnge_init_rxbd_pages(ring, type);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_one_rx_ring_pair(struct bnge_net *bn, int ring_nr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_rx_ring_info *rxr;</div><div class='add'>+</div><div class='add'>+	rxr = &amp;bn-&gt;rx_ring[ring_nr];</div><div class='add'>+	bnge_init_one_rx_ring_rxbd(bn, rxr);</div><div class='add'>+</div><div class='add'>+	netif_queue_set_napi(bn-&gt;netdev, ring_nr, NETDEV_QUEUE_TYPE_RX,</div><div class='add'>+			     &amp;rxr-&gt;bnapi-&gt;napi);</div><div class='add'>+</div><div class='add'>+	bnge_init_one_agg_ring_rxbd(bn, rxr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_rx_ring_pair_bufs(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	int i, rc;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bn-&gt;bd-&gt;rx_nr_rings; i++) {</div><div class='add'>+		rc = bnge_alloc_one_rx_ring_pair_bufs(bn, i);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_rx_ring_pair_bufs;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_rx_ring_pair_bufs:</div><div class='add'>+	bnge_free_rx_ring_pair_bufs(bn);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_rx_rings(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+#define BNGE_RX_OFFSET (NET_SKB_PAD + NET_IP_ALIGN)</div><div class='add'>+#define BNGE_RX_DMA_OFFSET NET_SKB_PAD</div><div class='add'>+	bn-&gt;rx_offset = BNGE_RX_OFFSET;</div><div class='add'>+	bn-&gt;rx_dma_offset = BNGE_RX_DMA_OFFSET;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bn-&gt;bd-&gt;rx_nr_rings; i++)</div><div class='add'>+		bnge_init_one_rx_ring_pair(bn, i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_tx_rings(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	bn-&gt;tx_wake_thresh = max(bn-&gt;tx_ring_size / 2, BNGE_MIN_TX_DESC_CNT);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bn-&gt;bd-&gt;tx_nr_rings; i++) {</div><div class='add'>+		struct bnge_tx_ring_info *txr = &amp;bn-&gt;tx_ring[i];</div><div class='add'>+		struct bnge_ring_struct *ring = &amp;txr-&gt;tx_ring_struct;</div><div class='add'>+</div><div class='add'>+		ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+</div><div class='add'>+		netif_queue_set_napi(bn-&gt;netdev, i, NETDEV_QUEUE_TYPE_TX,</div><div class='add'>+				     &amp;txr-&gt;bnapi-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_vnics(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_vnic_info *vnic0 = &amp;bn-&gt;vnic_info[BNGE_VNIC_DEFAULT];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bn-&gt;nr_vnics; i++) {</div><div class='add'>+		struct bnge_vnic_info *vnic = &amp;bn-&gt;vnic_info[i];</div><div class='add'>+		int j;</div><div class='add'>+</div><div class='add'>+		vnic-&gt;fw_vnic_id = INVALID_HW_RING_ID;</div><div class='add'>+		vnic-&gt;vnic_id = i;</div><div class='add'>+		for (j = 0; j &lt; BNGE_MAX_CTX_PER_VNIC; j++)</div><div class='add'>+			vnic-&gt;fw_rss_cos_lb_ctx[j] = INVALID_HW_RING_ID;</div><div class='add'>+</div><div class='add'>+		if (bn-&gt;vnic_info[i].rss_hash_key) {</div><div class='add'>+			if (i == BNGE_VNIC_DEFAULT) {</div><div class='add'>+				u8 *key = (void *)vnic-&gt;rss_hash_key;</div><div class='add'>+				int k;</div><div class='add'>+</div><div class='add'>+				if (!bn-&gt;rss_hash_key_valid &amp;&amp;</div><div class='add'>+				    !bn-&gt;rss_hash_key_updated) {</div><div class='add'>+					get_random_bytes(bn-&gt;rss_hash_key,</div><div class='add'>+							 HW_HASH_KEY_SIZE);</div><div class='add'>+					bn-&gt;rss_hash_key_updated = true;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				memcpy(vnic-&gt;rss_hash_key, bn-&gt;rss_hash_key,</div><div class='add'>+				       HW_HASH_KEY_SIZE);</div><div class='add'>+</div><div class='add'>+				if (!bn-&gt;rss_hash_key_updated)</div><div class='add'>+					continue;</div><div class='add'>+</div><div class='add'>+				bn-&gt;rss_hash_key_updated = false;</div><div class='add'>+				bn-&gt;rss_hash_key_valid = true;</div><div class='add'>+</div><div class='add'>+				bn-&gt;toeplitz_prefix = 0;</div><div class='add'>+				for (k = 0; k &lt; 8; k++) {</div><div class='add'>+					bn-&gt;toeplitz_prefix &lt;&lt;= 8;</div><div class='add'>+					bn-&gt;toeplitz_prefix |= key[k];</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				memcpy(vnic-&gt;rss_hash_key, vnic0-&gt;rss_hash_key,</div><div class='add'>+				       HW_HASH_KEY_SIZE);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_set_db_mask(struct bnge_net *bn, struct bnge_db_info *db,</div><div class='add'>+			     u32 ring_type)</div><div class='add'>+{</div><div class='add'>+	switch (ring_type) {</div><div class='add'>+	case HWRM_RING_ALLOC_TX:</div><div class='add'>+		db-&gt;db_ring_mask = bn-&gt;tx_ring_mask;</div><div class='add'>+		break;</div><div class='add'>+	case HWRM_RING_ALLOC_RX:</div><div class='add'>+		db-&gt;db_ring_mask = bn-&gt;rx_ring_mask;</div><div class='add'>+		break;</div><div class='add'>+	case HWRM_RING_ALLOC_AGG:</div><div class='add'>+		db-&gt;db_ring_mask = bn-&gt;rx_agg_ring_mask;</div><div class='add'>+		break;</div><div class='add'>+	case HWRM_RING_ALLOC_CMPL:</div><div class='add'>+	case HWRM_RING_ALLOC_NQ:</div><div class='add'>+		db-&gt;db_ring_mask = bn-&gt;cp_ring_mask;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	db-&gt;db_epoch_mask = db-&gt;db_ring_mask + 1;</div><div class='add'>+	db-&gt;db_epoch_shift = DBR_EPOCH_SFT - ilog2(db-&gt;db_epoch_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_set_db(struct bnge_net *bn, struct bnge_db_info *db,</div><div class='add'>+			u32 ring_type, u32 map_idx, u32 xid)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+</div><div class='add'>+	switch (ring_type) {</div><div class='add'>+	case HWRM_RING_ALLOC_TX:</div><div class='add'>+		db-&gt;db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;</div><div class='add'>+		break;</div><div class='add'>+	case HWRM_RING_ALLOC_RX:</div><div class='add'>+	case HWRM_RING_ALLOC_AGG:</div><div class='add'>+		db-&gt;db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ;</div><div class='add'>+		break;</div><div class='add'>+	case HWRM_RING_ALLOC_CMPL:</div><div class='add'>+		db-&gt;db_key64 = DBR_PATH_L2;</div><div class='add'>+		break;</div><div class='add'>+	case HWRM_RING_ALLOC_NQ:</div><div class='add'>+		db-&gt;db_key64 = DBR_PATH_L2;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	db-&gt;db_key64 |= ((u64)xid &lt;&lt; DBR_XID_SFT) | DBR_VALID;</div><div class='add'>+</div><div class='add'>+	db-&gt;doorbell = bd-&gt;bar1 + bd-&gt;db_offset;</div><div class='add'>+	bnge_set_db_mask(bn, db, ring_type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_hwrm_cp_ring_alloc(struct bnge_net *bn,</div><div class='add'>+				   struct bnge_cp_ring_info *cpr)</div><div class='add'>+{</div><div class='add'>+	const u32 type = HWRM_RING_ALLOC_CMPL;</div><div class='add'>+	struct bnge_napi *bnapi = cpr-&gt;bnapi;</div><div class='add'>+	struct bnge_ring_struct *ring;</div><div class='add'>+	u32 map_idx = bnapi-&gt;index;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	ring = &amp;cpr-&gt;ring_struct;</div><div class='add'>+	ring-&gt;handle = BNGE_SET_NQ_HDL(cpr);</div><div class='add'>+	rc = hwrm_ring_alloc_send_msg(bn, ring, type, map_idx);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	bnge_set_db(bn, &amp;cpr-&gt;cp_db, type, map_idx, ring-&gt;fw_ring_id);</div><div class='add'>+	bnge_db_cq(bn, &amp;cpr-&gt;cp_db, cpr-&gt;cp_raw_cons);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_hwrm_tx_ring_alloc(struct bnge_net *bn,</div><div class='add'>+				   struct bnge_tx_ring_info *txr, u32 tx_idx)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring = &amp;txr-&gt;tx_ring_struct;</div><div class='add'>+	const u32 type = HWRM_RING_ALLOC_TX;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_ring_alloc_send_msg(bn, ring, type, tx_idx);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	bnge_set_db(bn, &amp;txr-&gt;tx_db, type, tx_idx, ring-&gt;fw_ring_id);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_hwrm_rx_agg_ring_alloc(struct bnge_net *bn,</div><div class='add'>+				       struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring = &amp;rxr-&gt;rx_agg_ring_struct;</div><div class='add'>+	u32 type = HWRM_RING_ALLOC_AGG;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	u32 grp_idx = ring-&gt;grp_idx;</div><div class='add'>+	u32 map_idx;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	map_idx = grp_idx + bd-&gt;rx_nr_rings;</div><div class='add'>+	rc = hwrm_ring_alloc_send_msg(bn, ring, type, map_idx);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	bnge_set_db(bn, &amp;rxr-&gt;rx_agg_db, type, map_idx,</div><div class='add'>+		    ring-&gt;fw_ring_id);</div><div class='add'>+	bnge_db_write(bn-&gt;bd, &amp;rxr-&gt;rx_agg_db, rxr-&gt;rx_agg_prod);</div><div class='add'>+	bnge_db_write(bn-&gt;bd, &amp;rxr-&gt;rx_db, rxr-&gt;rx_prod);</div><div class='add'>+	bn-&gt;grp_info[grp_idx].agg_fw_ring_id = ring-&gt;fw_ring_id;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_hwrm_rx_ring_alloc(struct bnge_net *bn,</div><div class='add'>+				   struct bnge_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring = &amp;rxr-&gt;rx_ring_struct;</div><div class='add'>+	struct bnge_napi *bnapi = rxr-&gt;bnapi;</div><div class='add'>+	u32 type = HWRM_RING_ALLOC_RX;</div><div class='add'>+	u32 map_idx = bnapi-&gt;index;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_ring_alloc_send_msg(bn, ring, type, map_idx);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	bnge_set_db(bn, &amp;rxr-&gt;rx_db, type, map_idx, ring-&gt;fw_ring_id);</div><div class='add'>+	bn-&gt;grp_info[map_idx].rx_fw_ring_id = ring-&gt;fw_ring_id;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_hwrm_ring_alloc(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	bool agg_rings;</div><div class='add'>+	int i, rc = 0;</div><div class='add'>+</div><div class='add'>+	agg_rings = !!(bnge_is_agg_reqd(bd));</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		struct bnge_nq_ring_info *nqr = &amp;bnapi-&gt;nq_ring;</div><div class='add'>+		struct bnge_ring_struct *ring = &amp;nqr-&gt;ring_struct;</div><div class='add'>+		u32 type = HWRM_RING_ALLOC_NQ;</div><div class='add'>+		u32 map_idx = ring-&gt;map_idx;</div><div class='add'>+		unsigned int vector;</div><div class='add'>+</div><div class='add'>+		vector = bd-&gt;irq_tbl[map_idx].vector;</div><div class='add'>+		disable_irq_nosync(vector);</div><div class='add'>+		rc = hwrm_ring_alloc_send_msg(bn, ring, type, map_idx);</div><div class='add'>+		if (rc) {</div><div class='add'>+			enable_irq(vector);</div><div class='add'>+			goto err_out;</div><div class='add'>+		}</div><div class='add'>+		bnge_set_db(bn, &amp;nqr-&gt;nq_db, type, map_idx, ring-&gt;fw_ring_id);</div><div class='add'>+		bnge_db_nq(bn, &amp;nqr-&gt;nq_db, nqr-&gt;nq_raw_cons);</div><div class='add'>+		enable_irq(vector);</div><div class='add'>+		bn-&gt;grp_info[i].nq_fw_ring_id = ring-&gt;fw_ring_id;</div><div class='add'>+</div><div class='add'>+		if (!i) {</div><div class='add'>+			rc = bnge_hwrm_set_async_event_cr(bd, ring-&gt;fw_ring_id);</div><div class='add'>+			if (rc)</div><div class='add'>+				netdev_warn(bn-&gt;netdev, "Failed to set async event completion ring.\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;tx_nr_rings; i++) {</div><div class='add'>+		struct bnge_tx_ring_info *txr = &amp;bn-&gt;tx_ring[i];</div><div class='add'>+</div><div class='add'>+		rc = bnge_hwrm_cp_ring_alloc(bn, txr-&gt;tx_cpr);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_out;</div><div class='add'>+		rc = bnge_hwrm_tx_ring_alloc(bn, txr, i);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;rx_nr_rings; i++) {</div><div class='add'>+		struct bnge_rx_ring_info *rxr = &amp;bn-&gt;rx_ring[i];</div><div class='add'>+		struct bnge_cp_ring_info *cpr;</div><div class='add'>+		struct bnge_ring_struct *ring;</div><div class='add'>+		struct bnge_napi *bnapi;</div><div class='add'>+		u32 map_idx, type;</div><div class='add'>+</div><div class='add'>+		rc = bnge_hwrm_rx_ring_alloc(bn, rxr);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_out;</div><div class='add'>+		/* If we have agg rings, post agg buffers first. */</div><div class='add'>+		if (!agg_rings)</div><div class='add'>+			bnge_db_write(bn-&gt;bd, &amp;rxr-&gt;rx_db, rxr-&gt;rx_prod);</div><div class='add'>+</div><div class='add'>+		cpr = rxr-&gt;rx_cpr;</div><div class='add'>+		bnapi = rxr-&gt;bnapi;</div><div class='add'>+		type = HWRM_RING_ALLOC_CMPL;</div><div class='add'>+		map_idx = bnapi-&gt;index;</div><div class='add'>+</div><div class='add'>+		ring = &amp;cpr-&gt;ring_struct;</div><div class='add'>+		ring-&gt;handle = BNGE_SET_NQ_HDL(cpr);</div><div class='add'>+		rc = hwrm_ring_alloc_send_msg(bn, ring, type, map_idx);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_out;</div><div class='add'>+		bnge_set_db(bn, &amp;cpr-&gt;cp_db, type, map_idx,</div><div class='add'>+			    ring-&gt;fw_ring_id);</div><div class='add'>+		bnge_db_cq(bn, &amp;cpr-&gt;cp_db, cpr-&gt;cp_raw_cons);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (agg_rings) {</div><div class='add'>+		for (i = 0; i &lt; bd-&gt;rx_nr_rings; i++) {</div><div class='add'>+			rc = bnge_hwrm_rx_agg_ring_alloc(bn, &amp;bn-&gt;rx_ring[i]);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto err_out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+err_out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_fill_hw_rss_tbl(struct bnge_net *bn, struct bnge_vnic_info *vnic)</div><div class='add'>+{</div><div class='add'>+	__le16 *ring_tbl = vnic-&gt;rss_table;</div><div class='add'>+	struct bnge_rx_ring_info *rxr;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	u16 tbl_size, i;</div><div class='add'>+</div><div class='add'>+	tbl_size = bnge_get_rxfh_indir_size(bd);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; tbl_size; i++) {</div><div class='add'>+		u16 ring_id, j;</div><div class='add'>+</div><div class='add'>+		j = bd-&gt;rss_indir_tbl[i];</div><div class='add'>+		rxr = &amp;bn-&gt;rx_ring[j];</div><div class='add'>+</div><div class='add'>+		ring_id = rxr-&gt;rx_ring_struct.fw_ring_id;</div><div class='add'>+		*ring_tbl++ = cpu_to_le16(ring_id);</div><div class='add'>+		ring_id = bnge_cp_ring_for_rx(rxr);</div><div class='add'>+		*ring_tbl++ = cpu_to_le16(ring_id);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_hwrm_vnic_rss_cfg(struct bnge_net *bn,</div><div class='add'>+				  struct bnge_vnic_info *vnic)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_vnic_set_rss(bn, vnic, true);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bn-&gt;netdev, "hwrm vnic %d set rss failure rc: %d\n",</div><div class='add'>+			   vnic-&gt;vnic_id, rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+	rc = bnge_hwrm_vnic_cfg(bn, vnic);</div><div class='add'>+	if (rc)</div><div class='add'>+		netdev_err(bn-&gt;netdev, "hwrm vnic %d cfg failure rc: %d\n",</div><div class='add'>+			   vnic-&gt;vnic_id, rc);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_setup_vnic(struct bnge_net *bn, struct bnge_vnic_info *vnic)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int rc, i, nr_ctxs;</div><div class='add'>+</div><div class='add'>+	nr_ctxs = bnge_cal_nr_rss_ctxs(bd-&gt;rx_nr_rings);</div><div class='add'>+	for (i = 0; i &lt; nr_ctxs; i++) {</div><div class='add'>+		rc = bnge_hwrm_vnic_ctx_alloc(bd, vnic, i);</div><div class='add'>+		if (rc) {</div><div class='add'>+			netdev_err(bn-&gt;netdev, "hwrm vnic %d ctx %d alloc failure rc: %d\n",</div><div class='add'>+				   vnic-&gt;vnic_id, i, rc);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+		bn-&gt;rsscos_nr_ctxs++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_vnic_rss_cfg(bn, vnic);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (bnge_is_agg_reqd(bd)) {</div><div class='add'>+		rc = bnge_hwrm_vnic_set_hds(bn, vnic);</div><div class='add'>+		if (rc)</div><div class='add'>+			netdev_err(bn-&gt;netdev, "hwrm vnic %d set hds failure rc: %d\n",</div><div class='add'>+				   vnic-&gt;vnic_id, rc);</div><div class='add'>+	}</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_del_l2_filter(struct bnge_net *bn, struct bnge_l2_filter *fltr)</div><div class='add'>+{</div><div class='add'>+	if (!refcount_dec_and_test(&amp;fltr-&gt;refcnt))</div><div class='add'>+		return;</div><div class='add'>+	hlist_del_rcu(&amp;fltr-&gt;base.hash);</div><div class='add'>+	kfree_rcu(fltr, base.rcu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_l2_filter(struct bnge_net *bn,</div><div class='add'>+				struct bnge_l2_filter *fltr,</div><div class='add'>+				struct bnge_l2_key *key, u32 idx)</div><div class='add'>+{</div><div class='add'>+	struct hlist_head *head;</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(fltr-&gt;l2_key.dst_mac_addr, key-&gt;dst_mac_addr);</div><div class='add'>+	fltr-&gt;l2_key.vlan = key-&gt;vlan;</div><div class='add'>+	fltr-&gt;base.type = BNGE_FLTR_TYPE_L2;</div><div class='add'>+</div><div class='add'>+	head = &amp;bn-&gt;l2_fltr_hash_tbl[idx];</div><div class='add'>+	hlist_add_head_rcu(&amp;fltr-&gt;base.hash, head);</div><div class='add'>+	refcount_set(&amp;fltr-&gt;refcnt, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bnge_l2_filter *__bnge_lookup_l2_filter(struct bnge_net *bn,</div><div class='add'>+						      struct bnge_l2_key *key,</div><div class='add'>+						      u32 idx)</div><div class='add'>+{</div><div class='add'>+	struct bnge_l2_filter *fltr;</div><div class='add'>+	struct hlist_head *head;</div><div class='add'>+</div><div class='add'>+	head = &amp;bn-&gt;l2_fltr_hash_tbl[idx];</div><div class='add'>+	hlist_for_each_entry_rcu(fltr, head, base.hash) {</div><div class='add'>+		struct bnge_l2_key *l2_key = &amp;fltr-&gt;l2_key;</div><div class='add'>+</div><div class='add'>+		if (ether_addr_equal(l2_key-&gt;dst_mac_addr, key-&gt;dst_mac_addr) &amp;&amp;</div><div class='add'>+		    l2_key-&gt;vlan == key-&gt;vlan)</div><div class='add'>+			return fltr;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bnge_l2_filter *bnge_lookup_l2_filter(struct bnge_net *bn,</div><div class='add'>+						    struct bnge_l2_key *key,</div><div class='add'>+						    u32 idx)</div><div class='add'>+{</div><div class='add'>+	struct bnge_l2_filter *fltr;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	fltr = __bnge_lookup_l2_filter(bn, key, idx);</div><div class='add'>+	if (fltr)</div><div class='add'>+		refcount_inc(&amp;fltr-&gt;refcnt);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	return fltr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bnge_l2_filter *bnge_alloc_l2_filter(struct bnge_net *bn,</div><div class='add'>+						   struct bnge_l2_key *key,</div><div class='add'>+						   gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct bnge_l2_filter *fltr;</div><div class='add'>+	u32 idx;</div><div class='add'>+</div><div class='add'>+	idx = jhash2(&amp;key-&gt;filter_key, BNGE_L2_KEY_SIZE, bn-&gt;hash_seed) &amp;</div><div class='add'>+	      BNGE_L2_FLTR_HASH_MASK;</div><div class='add'>+	fltr = bnge_lookup_l2_filter(bn, key, idx);</div><div class='add'>+	if (fltr)</div><div class='add'>+		return fltr;</div><div class='add'>+</div><div class='add'>+	fltr = kzalloc(sizeof(*fltr), gfp);</div><div class='add'>+	if (!fltr)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	bnge_init_l2_filter(bn, fltr, key, idx);</div><div class='add'>+	return fltr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_hwrm_set_vnic_filter(struct bnge_net *bn, u16 vnic_id, u16 idx,</div><div class='add'>+				     const u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_l2_filter *fltr;</div><div class='add'>+	struct bnge_l2_key key;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(key.dst_mac_addr, mac_addr);</div><div class='add'>+	key.vlan = 0;</div><div class='add'>+	fltr = bnge_alloc_l2_filter(bn, &amp;key, GFP_KERNEL);</div><div class='add'>+	if (IS_ERR(fltr))</div><div class='add'>+		return PTR_ERR(fltr);</div><div class='add'>+</div><div class='add'>+	fltr-&gt;base.fw_vnic_id = bn-&gt;vnic_info[vnic_id].fw_vnic_id;</div><div class='add'>+	rc = bnge_hwrm_l2_filter_alloc(bn-&gt;bd, fltr);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_del_l2_filter;</div><div class='add'>+	bn-&gt;vnic_info[vnic_id].l2_filters[idx] = fltr;</div><div class='add'>+	return rc;</div><div class='add'>+</div><div class='add'>+err_del_l2_filter:</div><div class='add'>+	bnge_del_l2_filter(bn, fltr);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bnge_mc_list_updated(struct bnge_net *bn, u32 *rx_mask)</div><div class='add'>+{</div><div class='add'>+	struct bnge_vnic_info *vnic = &amp;bn-&gt;vnic_info[BNGE_VNIC_DEFAULT];</div><div class='add'>+	struct net_device *dev = bn-&gt;netdev;</div><div class='add'>+	struct netdev_hw_addr *ha;</div><div class='add'>+	int mc_count = 0, off = 0;</div><div class='add'>+	bool update = false;</div><div class='add'>+	u8 *haddr;</div><div class='add'>+</div><div class='add'>+	netdev_for_each_mc_addr(ha, dev) {</div><div class='add'>+		if (mc_count &gt;= BNGE_MAX_MC_ADDRS) {</div><div class='add'>+			*rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST;</div><div class='add'>+			vnic-&gt;mc_list_count = 0;</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+		haddr = ha-&gt;addr;</div><div class='add'>+		if (!ether_addr_equal(haddr, vnic-&gt;mc_list + off)) {</div><div class='add'>+			memcpy(vnic-&gt;mc_list + off, haddr, ETH_ALEN);</div><div class='add'>+			update = true;</div><div class='add'>+		}</div><div class='add'>+		off += ETH_ALEN;</div><div class='add'>+		mc_count++;</div><div class='add'>+	}</div><div class='add'>+	if (mc_count)</div><div class='add'>+		*rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_MCAST;</div><div class='add'>+</div><div class='add'>+	if (mc_count != vnic-&gt;mc_list_count) {</div><div class='add'>+		vnic-&gt;mc_list_count = mc_count;</div><div class='add'>+		update = true;</div><div class='add'>+	}</div><div class='add'>+	return update;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bnge_uc_list_updated(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_vnic_info *vnic = &amp;bn-&gt;vnic_info[BNGE_VNIC_DEFAULT];</div><div class='add'>+	struct net_device *dev = bn-&gt;netdev;</div><div class='add'>+	struct netdev_hw_addr *ha;</div><div class='add'>+	int off = 0;</div><div class='add'>+</div><div class='add'>+	if (netdev_uc_count(dev) != (vnic-&gt;uc_filter_count - 1))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	netdev_for_each_uc_addr(ha, dev) {</div><div class='add'>+		if (!ether_addr_equal(ha-&gt;addr, vnic-&gt;uc_list + off))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		off += ETH_ALEN;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bnge_promisc_ok(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_cfg_def_vnic(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_vnic_info *vnic = &amp;bn-&gt;vnic_info[BNGE_VNIC_DEFAULT];</div><div class='add'>+	struct net_device *dev = bn-&gt;netdev;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	struct netdev_hw_addr *ha;</div><div class='add'>+	int i, off = 0, rc;</div><div class='add'>+	bool uc_update;</div><div class='add'>+</div><div class='add'>+	netif_addr_lock_bh(dev);</div><div class='add'>+	uc_update = bnge_uc_list_updated(bn);</div><div class='add'>+	netif_addr_unlock_bh(dev);</div><div class='add'>+</div><div class='add'>+	if (!uc_update)</div><div class='add'>+		goto skip_uc;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; vnic-&gt;uc_filter_count; i++) {</div><div class='add'>+		struct bnge_l2_filter *fltr = vnic-&gt;l2_filters[i];</div><div class='add'>+</div><div class='add'>+		bnge_hwrm_l2_filter_free(bd, fltr);</div><div class='add'>+		bnge_del_l2_filter(bn, fltr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vnic-&gt;uc_filter_count = 1;</div><div class='add'>+</div><div class='add'>+	netif_addr_lock_bh(dev);</div><div class='add'>+	if (netdev_uc_count(dev) &gt; (BNGE_MAX_UC_ADDRS - 1)) {</div><div class='add'>+		vnic-&gt;rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS;</div><div class='add'>+	} else {</div><div class='add'>+		netdev_for_each_uc_addr(ha, dev) {</div><div class='add'>+			memcpy(vnic-&gt;uc_list + off, ha-&gt;addr, ETH_ALEN);</div><div class='add'>+			off += ETH_ALEN;</div><div class='add'>+			vnic-&gt;uc_filter_count++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	netif_addr_unlock_bh(dev);</div><div class='add'>+</div><div class='add'>+	for (i = 1, off = 0; i &lt; vnic-&gt;uc_filter_count; i++, off += ETH_ALEN) {</div><div class='add'>+		rc = bnge_hwrm_set_vnic_filter(bn, 0, i, vnic-&gt;uc_list + off);</div><div class='add'>+		if (rc) {</div><div class='add'>+			netdev_err(dev, "HWRM vnic filter failure rc: %d\n", rc);</div><div class='add'>+			vnic-&gt;uc_filter_count = i;</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+skip_uc:</div><div class='add'>+	if ((vnic-&gt;rx_mask &amp; CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS) &amp;&amp;</div><div class='add'>+	    !bnge_promisc_ok(bn))</div><div class='add'>+		vnic-&gt;rx_mask &amp;= ~CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS;</div><div class='add'>+	rc = bnge_hwrm_cfa_l2_set_rx_mask(bd, vnic);</div><div class='add'>+	if (rc &amp;&amp; (vnic-&gt;rx_mask &amp; CFA_L2_SET_RX_MASK_REQ_MASK_MCAST)) {</div><div class='add'>+		netdev_info(dev, "Failed setting MC filters rc: %d, turning on ALL_MCAST mode\n",</div><div class='add'>+			    rc);</div><div class='add'>+		vnic-&gt;rx_mask &amp;= ~CFA_L2_SET_RX_MASK_REQ_MASK_MCAST;</div><div class='add'>+		vnic-&gt;rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST;</div><div class='add'>+		vnic-&gt;mc_list_count = 0;</div><div class='add'>+		rc = bnge_hwrm_cfa_l2_set_rx_mask(bd, vnic);</div><div class='add'>+	}</div><div class='add'>+	if (rc)</div><div class='add'>+		netdev_err(dev, "HWRM cfa l2 rx mask failure rc: %d\n",</div><div class='add'>+			   rc);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_vnic_free(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bn-&gt;nr_vnics; i++)</div><div class='add'>+		bnge_hwrm_vnic_free_one(bn-&gt;bd, &amp;bn-&gt;vnic_info[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_vnic_ctx_free(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bn-&gt;nr_vnics; i++) {</div><div class='add'>+		struct bnge_vnic_info *vnic = &amp;bn-&gt;vnic_info[i];</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; BNGE_MAX_CTX_PER_VNIC; j++) {</div><div class='add'>+			if (vnic-&gt;fw_rss_cos_lb_ctx[j] != INVALID_HW_RING_ID)</div><div class='add'>+				bnge_hwrm_vnic_ctx_free_one(bn-&gt;bd, vnic, j);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	bn-&gt;rsscos_nr_ctxs = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_clear_vnic_filter(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_vnic_info *vnic = &amp;bn-&gt;vnic_info[BNGE_VNIC_DEFAULT];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; vnic-&gt;uc_filter_count; i++) {</div><div class='add'>+		struct bnge_l2_filter *fltr = vnic-&gt;l2_filters[i];</div><div class='add'>+</div><div class='add'>+		bnge_hwrm_l2_filter_free(bn-&gt;bd, fltr);</div><div class='add'>+		bnge_del_l2_filter(bn, fltr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vnic-&gt;uc_filter_count = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_clear_vnic(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	bnge_hwrm_clear_vnic_filter(bn);</div><div class='add'>+	bnge_hwrm_vnic_free(bn);</div><div class='add'>+	bnge_hwrm_vnic_ctx_free(bn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_rx_ring_free(struct bnge_net *bn,</div><div class='add'>+				   struct bnge_rx_ring_info *rxr,</div><div class='add'>+				   bool close_path)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring = &amp;rxr-&gt;rx_ring_struct;</div><div class='add'>+	u32 grp_idx = rxr-&gt;bnapi-&gt;index;</div><div class='add'>+	u32 cmpl_ring_id;</div><div class='add'>+</div><div class='add'>+	if (ring-&gt;fw_ring_id == INVALID_HW_RING_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cmpl_ring_id = bnge_cp_ring_for_rx(rxr);</div><div class='add'>+	hwrm_ring_free_send_msg(bn, ring,</div><div class='add'>+				RING_FREE_REQ_RING_TYPE_RX,</div><div class='add'>+				close_path ? cmpl_ring_id :</div><div class='add'>+				INVALID_HW_RING_ID);</div><div class='add'>+	ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+	bn-&gt;grp_info[grp_idx].rx_fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_rx_agg_ring_free(struct bnge_net *bn,</div><div class='add'>+				       struct bnge_rx_ring_info *rxr,</div><div class='add'>+				       bool close_path)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring = &amp;rxr-&gt;rx_agg_ring_struct;</div><div class='add'>+	u32 grp_idx = rxr-&gt;bnapi-&gt;index;</div><div class='add'>+	u32 cmpl_ring_id;</div><div class='add'>+</div><div class='add'>+	if (ring-&gt;fw_ring_id == INVALID_HW_RING_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cmpl_ring_id = bnge_cp_ring_for_rx(rxr);</div><div class='add'>+	hwrm_ring_free_send_msg(bn, ring, RING_FREE_REQ_RING_TYPE_RX_AGG,</div><div class='add'>+				close_path ? cmpl_ring_id :</div><div class='add'>+				INVALID_HW_RING_ID);</div><div class='add'>+	ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+	bn-&gt;grp_info[grp_idx].agg_fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_tx_ring_free(struct bnge_net *bn,</div><div class='add'>+				   struct bnge_tx_ring_info *txr,</div><div class='add'>+				   bool close_path)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring = &amp;txr-&gt;tx_ring_struct;</div><div class='add'>+	u32 cmpl_ring_id;</div><div class='add'>+</div><div class='add'>+	if (ring-&gt;fw_ring_id == INVALID_HW_RING_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cmpl_ring_id = close_path ? bnge_cp_ring_for_tx(txr) :</div><div class='add'>+		       INVALID_HW_RING_ID;</div><div class='add'>+	hwrm_ring_free_send_msg(bn, ring, RING_FREE_REQ_RING_TYPE_TX,</div><div class='add'>+				cmpl_ring_id);</div><div class='add'>+	ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_cp_ring_free(struct bnge_net *bn,</div><div class='add'>+				   struct bnge_cp_ring_info *cpr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_struct *ring;</div><div class='add'>+</div><div class='add'>+	ring = &amp;cpr-&gt;ring_struct;</div><div class='add'>+	if (ring-&gt;fw_ring_id == INVALID_HW_RING_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hwrm_ring_free_send_msg(bn, ring, RING_FREE_REQ_RING_TYPE_L2_CMPL,</div><div class='add'>+				INVALID_HW_RING_ID);</div><div class='add'>+	ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_ring_free(struct bnge_net *bn, bool close_path)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!bn-&gt;bnapi)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;tx_nr_rings; i++)</div><div class='add'>+		bnge_hwrm_tx_ring_free(bn, &amp;bn-&gt;tx_ring[i], close_path);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;rx_nr_rings; i++) {</div><div class='add'>+		bnge_hwrm_rx_ring_free(bn, &amp;bn-&gt;rx_ring[i], close_path);</div><div class='add'>+		bnge_hwrm_rx_agg_ring_free(bn, &amp;bn-&gt;rx_ring[i], close_path);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		struct bnge_nq_ring_info *nqr;</div><div class='add'>+		struct bnge_ring_struct *ring;</div><div class='add'>+		int j;</div><div class='add'>+</div><div class='add'>+		nqr = &amp;bnapi-&gt;nq_ring;</div><div class='add'>+		for (j = 0; j &lt; nqr-&gt;cp_ring_count &amp;&amp; nqr-&gt;cp_ring_arr; j++)</div><div class='add'>+			bnge_hwrm_cp_ring_free(bn, &amp;nqr-&gt;cp_ring_arr[j]);</div><div class='add'>+</div><div class='add'>+		ring = &amp;nqr-&gt;ring_struct;</div><div class='add'>+		if (ring-&gt;fw_ring_id != INVALID_HW_RING_ID) {</div><div class='add'>+			hwrm_ring_free_send_msg(bn, ring,</div><div class='add'>+						RING_FREE_REQ_RING_TYPE_NQ,</div><div class='add'>+						INVALID_HW_RING_ID);</div><div class='add'>+			ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+			bn-&gt;grp_info[i].nq_fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_setup_msix(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = bn-&gt;netdev;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int len, i;</div><div class='add'>+</div><div class='add'>+	len = sizeof(bd-&gt;irq_tbl[0].name);</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		int map_idx = bnge_cp_num_to_irq_num(bn, i);</div><div class='add'>+		char *attr;</div><div class='add'>+</div><div class='add'>+		if (bd-&gt;flags &amp; BNGE_EN_SHARED_CHNL)</div><div class='add'>+			attr = "TxRx";</div><div class='add'>+		else if (i &lt; bd-&gt;rx_nr_rings)</div><div class='add'>+			attr = "rx";</div><div class='add'>+		else</div><div class='add'>+			attr = "tx";</div><div class='add'>+</div><div class='add'>+		snprintf(bd-&gt;irq_tbl[map_idx].name, len, "%s-%s-%d", dev-&gt;name,</div><div class='add'>+			 attr, i);</div><div class='add'>+		bd-&gt;irq_tbl[map_idx].handler = bnge_msix;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_setup_interrupts(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = bn-&gt;netdev;</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+</div><div class='add'>+	bnge_setup_msix(bn);</div><div class='add'>+</div><div class='add'>+	return netif_set_real_num_queues(dev, bd-&gt;tx_nr_rings, bd-&gt;rx_nr_rings);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_hwrm_resource_free(struct bnge_net *bn, bool close_path)</div><div class='add'>+{</div><div class='add'>+	bnge_clear_vnic(bn);</div><div class='add'>+	bnge_hwrm_ring_free(bn, close_path);</div><div class='add'>+	bnge_hwrm_stat_ctx_free(bn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_irq(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	struct bnge_irq *irq;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		int map_idx = bnge_cp_num_to_irq_num(bn, i);</div><div class='add'>+</div><div class='add'>+		irq = &amp;bd-&gt;irq_tbl[map_idx];</div><div class='add'>+		if (irq-&gt;requested) {</div><div class='add'>+			if (irq-&gt;have_cpumask) {</div><div class='add'>+				irq_set_affinity_hint(irq-&gt;vector, NULL);</div><div class='add'>+				free_cpumask_var(irq-&gt;cpu_mask);</div><div class='add'>+				irq-&gt;have_cpumask = 0;</div><div class='add'>+			}</div><div class='add'>+			free_irq(irq-&gt;vector, bn-&gt;bnapi[i]);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		irq-&gt;requested = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_request_irq(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i, rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_setup_interrupts(bn);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bn-&gt;netdev, "bnge_setup_interrupts err: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		int map_idx = bnge_cp_num_to_irq_num(bn, i);</div><div class='add'>+		struct bnge_irq *irq = &amp;bd-&gt;irq_tbl[map_idx];</div><div class='add'>+</div><div class='add'>+		rc = request_irq(irq-&gt;vector, irq-&gt;handler, 0, irq-&gt;name,</div><div class='add'>+				 bn-&gt;bnapi[i]);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_irq;</div><div class='add'>+</div><div class='add'>+		netif_napi_set_irq_locked(&amp;bn-&gt;bnapi[i]-&gt;napi, irq-&gt;vector);</div><div class='add'>+		irq-&gt;requested = 1;</div><div class='add'>+</div><div class='add'>+		if (zalloc_cpumask_var(&amp;irq-&gt;cpu_mask, GFP_KERNEL)) {</div><div class='add'>+			int numa_node = dev_to_node(&amp;bd-&gt;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+			irq-&gt;have_cpumask = 1;</div><div class='add'>+			cpumask_set_cpu(cpumask_local_spread(i, numa_node),</div><div class='add'>+					irq-&gt;cpu_mask);</div><div class='add'>+			rc = irq_set_affinity_hint(irq-&gt;vector, irq-&gt;cpu_mask);</div><div class='add'>+			if (rc) {</div><div class='add'>+				netdev_warn(bn-&gt;netdev,</div><div class='add'>+					    "Set affinity failed, IRQ = %d\n",</div><div class='add'>+					    irq-&gt;vector);</div><div class='add'>+				goto err_free_irq;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irq:</div><div class='add'>+	bnge_free_irq(bn);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_init_chip(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_vnic_info *vnic = &amp;bn-&gt;vnic_info[BNGE_VNIC_DEFAULT];</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+#define BNGE_DEF_STATS_COAL_TICKS	 1000000</div><div class='add'>+	bn-&gt;stats_coal_ticks = BNGE_DEF_STATS_COAL_TICKS;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_stat_ctx_alloc(bn);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bn-&gt;netdev, "hwrm stat ctx alloc failure rc: %d\n", rc);</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_ring_alloc(bn);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bn-&gt;netdev, "hwrm ring alloc failure rc: %d\n", rc);</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_vnic_alloc(bd, vnic, bd-&gt;rx_nr_rings);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bn-&gt;netdev, "hwrm vnic alloc failure rc: %d\n", rc);</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_setup_vnic(bn, vnic);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;rss_cap &amp; BNGE_RSS_CAP_RSS_HASH_TYPE_DELTA)</div><div class='add'>+		bnge_hwrm_update_rss_hash_cfg(bn);</div><div class='add'>+</div><div class='add'>+	/* Filter for default vnic 0 */</div><div class='add'>+	rc = bnge_hwrm_set_vnic_filter(bn, 0, 0, bn-&gt;netdev-&gt;dev_addr);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bn-&gt;netdev, "HWRM vnic filter failure rc: %d\n", rc);</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+	vnic-&gt;uc_filter_count = 1;</div><div class='add'>+</div><div class='add'>+	vnic-&gt;rx_mask = 0;</div><div class='add'>+</div><div class='add'>+	if (bn-&gt;netdev-&gt;flags &amp; IFF_BROADCAST)</div><div class='add'>+		vnic-&gt;rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_BCAST;</div><div class='add'>+</div><div class='add'>+	if (bn-&gt;netdev-&gt;flags &amp; IFF_PROMISC)</div><div class='add'>+		vnic-&gt;rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS;</div><div class='add'>+</div><div class='add'>+	if (bn-&gt;netdev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='add'>+		vnic-&gt;rx_mask |= CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST;</div><div class='add'>+		vnic-&gt;mc_list_count = 0;</div><div class='add'>+	} else if (bn-&gt;netdev-&gt;flags &amp; IFF_MULTICAST) {</div><div class='add'>+		u32 mask = 0;</div><div class='add'>+</div><div class='add'>+		bnge_mc_list_updated(bn, &amp;mask);</div><div class='add'>+		vnic-&gt;rx_mask |= mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_cfg_def_vnic(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_out;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	bnge_hwrm_resource_free(bn, 0);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_napi_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	int work_done = 0;</div><div class='add'>+</div><div class='add'>+	/* defer NAPI implementation to next patch series */</div><div class='add'>+	napi_complete_done(napi, work_done);</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_napi(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	struct bnge_napi *bnapi;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		netif_napi_add_config_locked(bn-&gt;netdev, &amp;bnapi-&gt;napi,</div><div class='add'>+					     bnge_napi_poll, bnapi-&gt;index);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_del_napi(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;rx_nr_rings; i++)</div><div class='add'>+		netif_queue_set_napi(bn-&gt;netdev, i, NETDEV_QUEUE_TYPE_RX, NULL);</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;tx_nr_rings; i++)</div><div class='add'>+		netif_queue_set_napi(bn-&gt;netdev, i, NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+</div><div class='add'>+		__netif_napi_del_locked(&amp;bnapi-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Wait for RCU grace period after removing NAPI instances */</div><div class='add'>+	synchronize_net();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_init_nic(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	bnge_init_nq_tree(bn);</div><div class='add'>+</div><div class='add'>+	bnge_init_rx_rings(bn);</div><div class='add'>+	rc = bnge_alloc_rx_ring_pair_bufs(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	bnge_init_tx_rings(bn);</div><div class='add'>+</div><div class='add'>+	rc = bnge_init_ring_grps(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_rx_ring_pair_bufs;</div><div class='add'>+</div><div class='add'>+	bnge_init_vnics(bn);</div><div class='add'>+</div><div class='add'>+	rc = bnge_init_chip(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_ring_grps;</div><div class='add'>+	return rc;</div><div class='add'>+</div><div class='add'>+err_free_ring_grps:</div><div class='add'>+	bnge_free_ring_grps(bn);</div><div class='add'>+	return rc;</div><div class='add'>+</div><div class='add'>+err_free_rx_ring_pair_bufs:</div><div class='add'>+	bnge_free_rx_ring_pair_bufs(bn);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_open_core(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(bn-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	rc = bnge_reserve_rings(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bn-&gt;netdev, "bnge_reserve_rings err: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_core(bn);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bn-&gt;netdev, "bnge_alloc_core err: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bnge_init_napi(bn);</div><div class='add'>+	rc = bnge_request_irq(bn);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bn-&gt;netdev, "bnge_request_irq err: %d\n", rc);</div><div class='add'>+		goto err_del_napi;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = bnge_init_nic(bn);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(bn-&gt;netdev, "bnge_init_nic err: %d\n", rc);</div><div class='add'>+		goto err_free_irq;</div><div class='add'>+	}</div><div class='add'>+	set_bit(BNGE_STATE_OPEN, &amp;bd-&gt;state);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irq:</div><div class='add'>+	bnge_free_irq(bn);</div><div class='add'>+err_del_napi:</div><div class='add'>+	bnge_del_napi(bn);</div><div class='add'>+	bnge_free_core(bn);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t bnge_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bnge_net *bn = netdev_priv(dev);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_open_core(bn);</div><div class='add'>+	if (rc)</div><div class='add'>+		netdev_err(dev, "bnge_open_core err: %d\n", rc);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_shutdown_nic(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	/* TODO: close_path = 0 until we make NAPI functional */</div><div class='add'>+	bnge_hwrm_resource_free(bn, 0);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_close_core(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+</div><div class='add'>+	clear_bit(BNGE_STATE_OPEN, &amp;bd-&gt;state);</div><div class='add'>+	bnge_shutdown_nic(bn);</div><div class='add'>+	bnge_free_all_rings_bufs(bn);</div><div class='add'>+	bnge_free_irq(bn);</div><div class='add'>+	bnge_del_napi(bn);</div><div class='add'>+</div><div class='add'>+	bnge_free_core(bn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bnge_net *bn = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	bnge_close_core(bn);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops bnge_netdev_ops = {</div><div class='add'>+	.ndo_open		= bnge_open,</div><div class='add'>+	.ndo_stop		= bnge_close,</div><div class='add'>+	.ndo_start_xmit		= bnge_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void bnge_init_mac_addr(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	eth_hw_addr_set(bd-&gt;netdev, bd-&gt;pf.mac_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_set_tpa_flags(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_net *bn = netdev_priv(bd-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	bn-&gt;priv_flags &amp;= ~BNGE_NET_EN_TPA;</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;netdev-&gt;features &amp; NETIF_F_LRO)</div><div class='add'>+		bn-&gt;priv_flags |= BNGE_NET_EN_LRO;</div><div class='add'>+	else if (bd-&gt;netdev-&gt;features &amp; NETIF_F_GRO_HW)</div><div class='add'>+		bn-&gt;priv_flags |= BNGE_NET_EN_GRO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_init_l2_fltr_tbl(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BNGE_L2_FLTR_HASH_SIZE; i++)</div><div class='add'>+		INIT_HLIST_HEAD(&amp;bn-&gt;l2_fltr_hash_tbl[i]);</div><div class='add'>+	get_random_bytes(&amp;bn-&gt;hash_seed, sizeof(bn-&gt;hash_seed));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_set_ring_params(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_net *bn = netdev_priv(bd-&gt;netdev);</div><div class='add'>+	u32 ring_size, rx_size, rx_space, max_rx_cmpl;</div><div class='add'>+	u32 agg_factor = 0, agg_ring_size = 0;</div><div class='add'>+</div><div class='add'>+	/* 8 for CRC and VLAN */</div><div class='add'>+	rx_size = SKB_DATA_ALIGN(bn-&gt;netdev-&gt;mtu + ETH_HLEN + NET_IP_ALIGN + 8);</div><div class='add'>+</div><div class='add'>+	rx_space = rx_size + ALIGN(NET_SKB_PAD, 8) +</div><div class='add'>+		SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='add'>+</div><div class='add'>+	bn-&gt;rx_copy_thresh = BNGE_RX_COPY_THRESH;</div><div class='add'>+	ring_size = bn-&gt;rx_ring_size;</div><div class='add'>+	bn-&gt;rx_agg_ring_size = 0;</div><div class='add'>+	bn-&gt;rx_agg_nr_pages = 0;</div><div class='add'>+</div><div class='add'>+	if (bn-&gt;priv_flags &amp; BNGE_NET_EN_TPA)</div><div class='add'>+		agg_factor = min_t(u32, 4, 65536 / BNGE_RX_PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	bn-&gt;priv_flags &amp;= ~BNGE_NET_EN_JUMBO;</div><div class='add'>+	if (rx_space &gt; PAGE_SIZE) {</div><div class='add'>+		u32 jumbo_factor;</div><div class='add'>+</div><div class='add'>+		bn-&gt;priv_flags |= BNGE_NET_EN_JUMBO;</div><div class='add'>+		jumbo_factor = PAGE_ALIGN(bn-&gt;netdev-&gt;mtu - 40) &gt;&gt; PAGE_SHIFT;</div><div class='add'>+		if (jumbo_factor &gt; agg_factor)</div><div class='add'>+			agg_factor = jumbo_factor;</div><div class='add'>+	}</div><div class='add'>+	if (agg_factor) {</div><div class='add'>+		if (ring_size &gt; BNGE_MAX_RX_DESC_CNT_JUM_ENA) {</div><div class='add'>+			ring_size = BNGE_MAX_RX_DESC_CNT_JUM_ENA;</div><div class='add'>+			netdev_warn(bn-&gt;netdev, "RX ring size reduced from %d to %d due to jumbo ring\n",</div><div class='add'>+				    bn-&gt;rx_ring_size, ring_size);</div><div class='add'>+			bn-&gt;rx_ring_size = ring_size;</div><div class='add'>+		}</div><div class='add'>+		agg_ring_size = ring_size * agg_factor;</div><div class='add'>+</div><div class='add'>+		bn-&gt;rx_agg_nr_pages = bnge_adjust_pow_two(agg_ring_size,</div><div class='add'>+							  RX_DESC_CNT);</div><div class='add'>+		if (bn-&gt;rx_agg_nr_pages &gt; MAX_RX_AGG_PAGES) {</div><div class='add'>+			u32 tmp = agg_ring_size;</div><div class='add'>+</div><div class='add'>+			bn-&gt;rx_agg_nr_pages = MAX_RX_AGG_PAGES;</div><div class='add'>+			agg_ring_size = MAX_RX_AGG_PAGES * RX_DESC_CNT - 1;</div><div class='add'>+			netdev_warn(bn-&gt;netdev, "RX agg ring size %d reduced to %d.\n",</div><div class='add'>+				    tmp, agg_ring_size);</div><div class='add'>+		}</div><div class='add'>+		bn-&gt;rx_agg_ring_size = agg_ring_size;</div><div class='add'>+		bn-&gt;rx_agg_ring_mask = (bn-&gt;rx_agg_nr_pages * RX_DESC_CNT) - 1;</div><div class='add'>+</div><div class='add'>+		rx_size = SKB_DATA_ALIGN(BNGE_RX_COPY_THRESH + NET_IP_ALIGN);</div><div class='add'>+		rx_space = rx_size + NET_SKB_PAD +</div><div class='add'>+			SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bn-&gt;rx_buf_use_size = rx_size;</div><div class='add'>+	bn-&gt;rx_buf_size = rx_space;</div><div class='add'>+</div><div class='add'>+	bn-&gt;rx_nr_pages = bnge_adjust_pow_two(ring_size, RX_DESC_CNT);</div><div class='add'>+	bn-&gt;rx_ring_mask = (bn-&gt;rx_nr_pages * RX_DESC_CNT) - 1;</div><div class='add'>+</div><div class='add'>+	ring_size = bn-&gt;tx_ring_size;</div><div class='add'>+	bn-&gt;tx_nr_pages = bnge_adjust_pow_two(ring_size, TX_DESC_CNT);</div><div class='add'>+	bn-&gt;tx_ring_mask = (bn-&gt;tx_nr_pages * TX_DESC_CNT) - 1;</div><div class='add'>+</div><div class='add'>+	max_rx_cmpl = bn-&gt;rx_ring_size;</div><div class='add'>+</div><div class='add'>+	if (bn-&gt;priv_flags &amp; BNGE_NET_EN_TPA)</div><div class='add'>+		max_rx_cmpl += bd-&gt;max_tpa_v2;</div><div class='add'>+	ring_size = max_rx_cmpl * 2 + agg_ring_size + bn-&gt;tx_ring_size;</div><div class='add'>+	bn-&gt;cp_ring_size = ring_size;</div><div class='add'>+</div><div class='add'>+	bn-&gt;cp_nr_pages = bnge_adjust_pow_two(ring_size, CP_DESC_CNT);</div><div class='add'>+	if (bn-&gt;cp_nr_pages &gt; MAX_CP_PAGES) {</div><div class='add'>+		bn-&gt;cp_nr_pages = MAX_CP_PAGES;</div><div class='add'>+		bn-&gt;cp_ring_size = MAX_CP_PAGES * CP_DESC_CNT - 1;</div><div class='add'>+		netdev_warn(bn-&gt;netdev, "completion ring size %d reduced to %d.\n",</div><div class='add'>+			    ring_size, bn-&gt;cp_ring_size);</div><div class='add'>+	}</div><div class='add'>+	bn-&gt;cp_bit = bn-&gt;cp_nr_pages * CP_DESC_CNT;</div><div class='add'>+	bn-&gt;cp_ring_mask = bn-&gt;cp_bit - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_netdev_alloc(struct bnge_dev *bd, int max_irqs)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct bnge_net *bn;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	netdev = alloc_etherdev_mqs(sizeof(*bn), max_irqs * BNGE_MAX_QUEUE,</div><div class='add'>+				    max_irqs);</div><div class='add'>+	if (!netdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(netdev, bd-&gt;dev);</div><div class='add'>+	bd-&gt;netdev = netdev;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;bnge_netdev_ops;</div><div class='add'>+</div><div class='add'>+	bnge_set_ethtool_ops(netdev);</div><div class='add'>+</div><div class='add'>+	bn = netdev_priv(netdev);</div><div class='add'>+	bn-&gt;netdev = netdev;</div><div class='add'>+	bn-&gt;bd = bd;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;min_mtu = ETH_ZLEN;</div><div class='add'>+	netdev-&gt;max_mtu = bd-&gt;max_mtu;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;hw_features = NETIF_F_IP_CSUM |</div><div class='add'>+			      NETIF_F_IPV6_CSUM |</div><div class='add'>+			      NETIF_F_SG |</div><div class='add'>+			      NETIF_F_TSO |</div><div class='add'>+			      NETIF_F_TSO6 |</div><div class='add'>+			      NETIF_F_GSO_UDP_TUNNEL |</div><div class='add'>+			      NETIF_F_GSO_GRE |</div><div class='add'>+			      NETIF_F_GSO_IPXIP4 |</div><div class='add'>+			      NETIF_F_GSO_UDP_TUNNEL_CSUM |</div><div class='add'>+			      NETIF_F_GSO_GRE_CSUM |</div><div class='add'>+			      NETIF_F_GSO_PARTIAL |</div><div class='add'>+			      NETIF_F_RXHASH |</div><div class='add'>+			      NETIF_F_RXCSUM |</div><div class='add'>+			      NETIF_F_GRO;</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;flags &amp; BNGE_EN_UDP_GSO_SUPP)</div><div class='add'>+		netdev-&gt;hw_features |= NETIF_F_GSO_UDP_L4;</div><div class='add'>+</div><div class='add'>+	if (BNGE_SUPPORTS_TPA(bd))</div><div class='add'>+		netdev-&gt;hw_features |= NETIF_F_LRO;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;hw_enc_features = NETIF_F_IP_CSUM |</div><div class='add'>+				  NETIF_F_IPV6_CSUM |</div><div class='add'>+				  NETIF_F_SG |</div><div class='add'>+				  NETIF_F_TSO |</div><div class='add'>+				  NETIF_F_TSO6 |</div><div class='add'>+				  NETIF_F_GSO_UDP_TUNNEL |</div><div class='add'>+				  NETIF_F_GSO_GRE |</div><div class='add'>+				  NETIF_F_GSO_UDP_TUNNEL_CSUM |</div><div class='add'>+				  NETIF_F_GSO_GRE_CSUM |</div><div class='add'>+				  NETIF_F_GSO_IPXIP4 |</div><div class='add'>+				  NETIF_F_GSO_PARTIAL;</div><div class='add'>+</div><div class='add'>+	if (bd-&gt;flags &amp; BNGE_EN_UDP_GSO_SUPP)</div><div class='add'>+		netdev-&gt;hw_enc_features |= NETIF_F_GSO_UDP_L4;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM |</div><div class='add'>+				       NETIF_F_GSO_GRE_CSUM;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;vlan_features = netdev-&gt;hw_features | NETIF_F_HIGHDMA;</div><div class='add'>+	if (bd-&gt;fw_cap &amp; BNGE_FW_CAP_VLAN_RX_STRIP)</div><div class='add'>+		netdev-&gt;hw_features |= BNGE_HW_FEATURE_VLAN_ALL_RX;</div><div class='add'>+	if (bd-&gt;fw_cap &amp; BNGE_FW_CAP_VLAN_TX_INSERT)</div><div class='add'>+		netdev-&gt;hw_features |= BNGE_HW_FEATURE_VLAN_ALL_TX;</div><div class='add'>+</div><div class='add'>+	if (BNGE_SUPPORTS_TPA(bd))</div><div class='add'>+		netdev-&gt;hw_features |= NETIF_F_GRO_HW;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;features |= netdev-&gt;hw_features | NETIF_F_HIGHDMA;</div><div class='add'>+</div><div class='add'>+	if (netdev-&gt;features &amp; NETIF_F_GRO_HW)</div><div class='add'>+		netdev-&gt;features &amp;= ~NETIF_F_LRO;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='add'>+</div><div class='add'>+	netif_set_tso_max_size(netdev, GSO_MAX_SIZE);</div><div class='add'>+	if (bd-&gt;tso_max_segs)</div><div class='add'>+		netif_set_tso_max_segs(netdev, bd-&gt;tso_max_segs);</div><div class='add'>+</div><div class='add'>+	bn-&gt;rx_ring_size = BNGE_DEFAULT_RX_RING_SIZE;</div><div class='add'>+	bn-&gt;tx_ring_size = BNGE_DEFAULT_TX_RING_SIZE;</div><div class='add'>+	bn-&gt;rx_dir = DMA_FROM_DEVICE;</div><div class='add'>+</div><div class='add'>+	bnge_set_tpa_flags(bd);</div><div class='add'>+	bnge_set_ring_params(bd);</div><div class='add'>+</div><div class='add'>+	bnge_init_l2_fltr_tbl(bn);</div><div class='add'>+	bnge_init_mac_addr(bd);</div><div class='add'>+</div><div class='add'>+	netdev-&gt;request_ops_lock = true;</div><div class='add'>+	rc = register_netdev(netdev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "Register netdev failed rc: %d\n", rc);</div><div class='add'>+		goto err_netdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_netdev:</div><div class='add'>+	free_netdev(netdev);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_netdev_free(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = bd-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	unregister_netdev(netdev);</div><div class='add'>+	free_netdev(netdev);</div><div class='add'>+	bd-&gt;netdev = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h b/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h<br/>new file mode 100644<br/>index 000000000000..fb3b961536ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_netdev.h</a></div><div class='hunk'>@@ -0,0 +1,454 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Broadcom */</div><div class='add'>+</div><div class='add'>+#ifndef _BNGE_NETDEV_H_</div><div class='add'>+#define _BNGE_NETDEV_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='add'>+#include &lt;linux/io-64-nonatomic-lo-hi.h&gt;</div><div class='add'>+#include &lt;linux/refcount.h&gt;</div><div class='add'>+#include "bnge_db.h"</div><div class='add'>+</div><div class='add'>+struct tx_bd {</div><div class='add'>+	__le32 tx_bd_len_flags_type;</div><div class='add'>+	#define TX_BD_TYPE					(0x3f &lt;&lt; 0)</div><div class='add'>+	#define TX_BD_TYPE_SHORT_TX_BD				(0x00 &lt;&lt; 0)</div><div class='add'>+	#define TX_BD_TYPE_LONG_TX_BD				(0x10 &lt;&lt; 0)</div><div class='add'>+	#define TX_BD_FLAGS_PACKET_END				(1 &lt;&lt; 6)</div><div class='add'>+	#define TX_BD_FLAGS_NO_CMPL				(1 &lt;&lt; 7)</div><div class='add'>+	#define TX_BD_FLAGS_BD_CNT				(0x1f &lt;&lt; 8)</div><div class='add'>+	#define TX_BD_FLAGS_BD_CNT_SHIFT			8</div><div class='add'>+	#define TX_BD_FLAGS_LHINT				(3 &lt;&lt; 13)</div><div class='add'>+	#define TX_BD_FLAGS_LHINT_SHIFT				13</div><div class='add'>+	#define TX_BD_FLAGS_LHINT_512_AND_SMALLER		(0 &lt;&lt; 13)</div><div class='add'>+	#define TX_BD_FLAGS_LHINT_512_TO_1023			(1 &lt;&lt; 13)</div><div class='add'>+	#define TX_BD_FLAGS_LHINT_1024_TO_2047			(2 &lt;&lt; 13)</div><div class='add'>+	#define TX_BD_FLAGS_LHINT_2048_AND_LARGER		(3 &lt;&lt; 13)</div><div class='add'>+	#define TX_BD_FLAGS_COAL_NOW				(1 &lt;&lt; 15)</div><div class='add'>+	#define TX_BD_LEN					(0xffff &lt;&lt; 16)</div><div class='add'>+	#define TX_BD_LEN_SHIFT					16</div><div class='add'>+	u32 tx_bd_opaque;</div><div class='add'>+	__le64 tx_bd_haddr;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct rx_bd {</div><div class='add'>+	__le32 rx_bd_len_flags_type;</div><div class='add'>+	#define RX_BD_TYPE					(0x3f &lt;&lt; 0)</div><div class='add'>+	#define RX_BD_TYPE_RX_PACKET_BD				0x4</div><div class='add'>+	#define RX_BD_TYPE_RX_BUFFER_BD				0x5</div><div class='add'>+	#define RX_BD_TYPE_RX_AGG_BD				0x6</div><div class='add'>+	#define RX_BD_TYPE_16B_BD_SIZE				(0 &lt;&lt; 4)</div><div class='add'>+	#define RX_BD_TYPE_32B_BD_SIZE				(1 &lt;&lt; 4)</div><div class='add'>+	#define RX_BD_TYPE_48B_BD_SIZE				(2 &lt;&lt; 4)</div><div class='add'>+	#define RX_BD_TYPE_64B_BD_SIZE				(3 &lt;&lt; 4)</div><div class='add'>+	#define RX_BD_FLAGS_SOP					(1 &lt;&lt; 6)</div><div class='add'>+	#define RX_BD_FLAGS_EOP					(1 &lt;&lt; 7)</div><div class='add'>+	#define RX_BD_FLAGS_BUFFERS				(3 &lt;&lt; 8)</div><div class='add'>+	#define RX_BD_FLAGS_1_BUFFER_PACKET			(0 &lt;&lt; 8)</div><div class='add'>+	#define RX_BD_FLAGS_2_BUFFER_PACKET			(1 &lt;&lt; 8)</div><div class='add'>+	#define RX_BD_FLAGS_3_BUFFER_PACKET			(2 &lt;&lt; 8)</div><div class='add'>+	#define RX_BD_FLAGS_4_BUFFER_PACKET			(3 &lt;&lt; 8)</div><div class='add'>+	#define RX_BD_LEN					(0xffff &lt;&lt; 16)</div><div class='add'>+	#define RX_BD_LEN_SHIFT					16</div><div class='add'>+	u32 rx_bd_opaque;</div><div class='add'>+	__le64 rx_bd_haddr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tx_cmp {</div><div class='add'>+	__le32 tx_cmp_flags_type;</div><div class='add'>+	#define CMP_TYPE					(0x3f &lt;&lt; 0)</div><div class='add'>+	#define CMP_TYPE_TX_L2_CMP				0</div><div class='add'>+	#define CMP_TYPE_TX_L2_COAL_CMP				2</div><div class='add'>+	#define CMP_TYPE_TX_L2_PKT_TS_CMP			4</div><div class='add'>+	#define CMP_TYPE_RX_L2_CMP				17</div><div class='add'>+	#define CMP_TYPE_RX_AGG_CMP				18</div><div class='add'>+	#define CMP_TYPE_RX_L2_TPA_START_CMP			19</div><div class='add'>+	#define CMP_TYPE_RX_L2_TPA_END_CMP			21</div><div class='add'>+	#define CMP_TYPE_RX_TPA_AGG_CMP				22</div><div class='add'>+	#define CMP_TYPE_RX_L2_V3_CMP				23</div><div class='add'>+	#define CMP_TYPE_RX_L2_TPA_START_V3_CMP			25</div><div class='add'>+	#define CMP_TYPE_STATUS_CMP				32</div><div class='add'>+	#define CMP_TYPE_REMOTE_DRIVER_REQ			34</div><div class='add'>+	#define CMP_TYPE_REMOTE_DRIVER_RESP			36</div><div class='add'>+	#define CMP_TYPE_ERROR_STATUS				48</div><div class='add'>+	#define CMPL_BASE_TYPE_STAT_EJECT			0x1aUL</div><div class='add'>+	#define CMPL_BASE_TYPE_HWRM_DONE			0x20UL</div><div class='add'>+	#define CMPL_BASE_TYPE_HWRM_FWD_REQ			0x22UL</div><div class='add'>+	#define CMPL_BASE_TYPE_HWRM_FWD_RESP			0x24UL</div><div class='add'>+	#define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT			0x2eUL</div><div class='add'>+	#define TX_CMP_FLAGS_ERROR				(1 &lt;&lt; 6)</div><div class='add'>+	#define TX_CMP_FLAGS_PUSH				(1 &lt;&lt; 7)</div><div class='add'>+	u32 tx_cmp_opaque;</div><div class='add'>+	__le32 tx_cmp_errors_v;</div><div class='add'>+	#define TX_CMP_V					(1 &lt;&lt; 0)</div><div class='add'>+	#define TX_CMP_ERRORS_BUFFER_ERROR			(7 &lt;&lt; 1)</div><div class='add'>+	#define TX_CMP_ERRORS_BUFFER_ERROR_NO_ERROR		0</div><div class='add'>+	#define TX_CMP_ERRORS_BUFFER_ERROR_BAD_FORMAT		2</div><div class='add'>+	#define TX_CMP_ERRORS_BUFFER_ERROR_INVALID_STAG		4</div><div class='add'>+	#define TX_CMP_ERRORS_BUFFER_ERROR_STAG_BOUNDS		5</div><div class='add'>+	#define TX_CMP_ERRORS_ZERO_LENGTH_PKT			(1 &lt;&lt; 4)</div><div class='add'>+	#define TX_CMP_ERRORS_EXCESSIVE_BD_LEN			(1 &lt;&lt; 5)</div><div class='add'>+	#define TX_CMP_ERRORS_DMA_ERROR				(1 &lt;&lt; 6)</div><div class='add'>+	#define TX_CMP_ERRORS_HINT_TOO_SHORT			(1 &lt;&lt; 7)</div><div class='add'>+	__le32 sq_cons_idx;</div><div class='add'>+	#define TX_CMP_SQ_CONS_IDX_MASK				0x00ffffff</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_sw_tx_bd {</div><div class='add'>+	struct sk_buff		*skb;</div><div class='add'>+	DEFINE_DMA_UNMAP_ADDR(mapping);</div><div class='add'>+	DEFINE_DMA_UNMAP_LEN(len);</div><div class='add'>+	struct page		*page;</div><div class='add'>+	u8			is_ts_pkt;</div><div class='add'>+	u8			is_push;</div><div class='add'>+	u8			action;</div><div class='add'>+	unsigned short		nr_frags;</div><div class='add'>+	union {</div><div class='add'>+		u16		rx_prod;</div><div class='add'>+		u16		txts_prod;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_sw_rx_bd {</div><div class='add'>+	void			*data;</div><div class='add'>+	u8			*data_ptr;</div><div class='add'>+	dma_addr_t		mapping;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_sw_rx_agg_bd {</div><div class='add'>+	netmem_ref		netmem;</div><div class='add'>+	unsigned int		offset;</div><div class='add'>+	dma_addr_t		mapping;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HWRM_RING_ALLOC_TX	0x1</div><div class='add'>+#define HWRM_RING_ALLOC_RX	0x2</div><div class='add'>+#define HWRM_RING_ALLOC_AGG	0x4</div><div class='add'>+#define HWRM_RING_ALLOC_CMPL	0x8</div><div class='add'>+#define HWRM_RING_ALLOC_NQ	0x10</div><div class='add'>+</div><div class='add'>+struct bnge_ring_grp_info {</div><div class='add'>+	u16	fw_stats_ctx;</div><div class='add'>+	u16	fw_grp_id;</div><div class='add'>+	u16	rx_fw_ring_id;</div><div class='add'>+	u16	agg_fw_ring_id;</div><div class='add'>+	u16	nq_fw_ring_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNGE_RX_COPY_THRESH     256</div><div class='add'>+</div><div class='add'>+#define BNGE_HW_FEATURE_VLAN_ALL_RX	\</div><div class='add'>+		(NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_STAG_RX)</div><div class='add'>+#define BNGE_HW_FEATURE_VLAN_ALL_TX	\</div><div class='add'>+		(NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_STAG_TX)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	BNGE_NET_EN_GRO		= BIT(0),</div><div class='add'>+	BNGE_NET_EN_LRO		= BIT(1),</div><div class='add'>+	BNGE_NET_EN_JUMBO	= BIT(2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNGE_NET_EN_TPA		(BNGE_NET_EN_GRO | BNGE_NET_EN_LRO)</div><div class='add'>+</div><div class='add'>+/* Minimum TX BDs for a TX packet with MAX_SKB_FRAGS + 1. We need one extra</div><div class='add'>+ * BD because the first TX BD is always a long BD.</div><div class='add'>+ */</div><div class='add'>+#define BNGE_MIN_TX_DESC_CNT	(MAX_SKB_FRAGS + 2)</div><div class='add'>+</div><div class='add'>+#define RX_RING(bn, x)	(((x) &amp; (bn)-&gt;rx_ring_mask) &gt;&gt; (BNGE_PAGE_SHIFT - 4))</div><div class='add'>+#define RX_AGG_RING(bn, x)	(((x) &amp; (bn)-&gt;rx_agg_ring_mask) &gt;&gt;	\</div><div class='add'>+				 (BNGE_PAGE_SHIFT - 4))</div><div class='add'>+#define RX_IDX(x)	((x) &amp; (RX_DESC_CNT - 1))</div><div class='add'>+</div><div class='add'>+#define TX_RING(bn, x)	(((x) &amp; (bn)-&gt;tx_ring_mask) &gt;&gt; (BNGE_PAGE_SHIFT - 4))</div><div class='add'>+#define TX_IDX(x)	((x) &amp; (TX_DESC_CNT - 1))</div><div class='add'>+</div><div class='add'>+#define CP_RING(x)	(((x) &amp; ~(CP_DESC_CNT - 1)) &gt;&gt; (BNGE_PAGE_SHIFT - 4))</div><div class='add'>+#define CP_IDX(x)	((x) &amp; (CP_DESC_CNT - 1))</div><div class='add'>+</div><div class='add'>+#define RING_RX(bn, idx)	((idx) &amp; (bn)-&gt;rx_ring_mask)</div><div class='add'>+#define NEXT_RX(idx)		((idx) + 1)</div><div class='add'>+</div><div class='add'>+#define RING_RX_AGG(bn, idx)	((idx) &amp; (bn)-&gt;rx_agg_ring_mask)</div><div class='add'>+#define NEXT_RX_AGG(idx)	((idx) + 1)</div><div class='add'>+</div><div class='add'>+#define BNGE_NQ_HDL_TYPE_SHIFT	24</div><div class='add'>+#define BNGE_NQ_HDL_TYPE_RX	0x00</div><div class='add'>+#define BNGE_NQ_HDL_TYPE_TX	0x01</div><div class='add'>+</div><div class='add'>+struct bnge_net {</div><div class='add'>+	struct bnge_dev		*bd;</div><div class='add'>+	struct net_device	*netdev;</div><div class='add'>+</div><div class='add'>+	u32			priv_flags;</div><div class='add'>+</div><div class='add'>+	u32			rx_ring_size;</div><div class='add'>+	u32			rx_buf_size;</div><div class='add'>+	u32			rx_buf_use_size; /* usable size */</div><div class='add'>+	u32			rx_agg_ring_size;</div><div class='add'>+	u32			rx_copy_thresh;</div><div class='add'>+	u32			rx_ring_mask;</div><div class='add'>+	u32			rx_agg_ring_mask;</div><div class='add'>+	u16			rx_nr_pages;</div><div class='add'>+	u16			rx_agg_nr_pages;</div><div class='add'>+</div><div class='add'>+	u32			tx_ring_size;</div><div class='add'>+	u32			tx_ring_mask;</div><div class='add'>+	u16			tx_nr_pages;</div><div class='add'>+</div><div class='add'>+	/* NQs and Completion rings */</div><div class='add'>+	u32			cp_ring_size;</div><div class='add'>+	u32			cp_ring_mask;</div><div class='add'>+	u32			cp_bit;</div><div class='add'>+	u16			cp_nr_pages;</div><div class='add'>+</div><div class='add'>+#define BNGE_L2_FLTR_HASH_SIZE	32</div><div class='add'>+#define BNGE_L2_FLTR_HASH_MASK	(BNGE_L2_FLTR_HASH_SIZE - 1)</div><div class='add'>+	struct hlist_head	l2_fltr_hash_tbl[BNGE_L2_FLTR_HASH_SIZE];</div><div class='add'>+	u32			hash_seed;</div><div class='add'>+	u64			toeplitz_prefix;</div><div class='add'>+</div><div class='add'>+	struct bnge_napi		**bnapi;</div><div class='add'>+</div><div class='add'>+	struct bnge_rx_ring_info	*rx_ring;</div><div class='add'>+	struct bnge_tx_ring_info	*tx_ring;</div><div class='add'>+</div><div class='add'>+	u16				*tx_ring_map;</div><div class='add'>+	enum dma_data_direction		rx_dir;</div><div class='add'>+</div><div class='add'>+	/* grp_info indexed by napi/nq index */</div><div class='add'>+	struct bnge_ring_grp_info	*grp_info;</div><div class='add'>+	struct bnge_vnic_info		*vnic_info;</div><div class='add'>+	int				nr_vnics;</div><div class='add'>+	int				total_irqs;</div><div class='add'>+</div><div class='add'>+	u32			tx_wake_thresh;</div><div class='add'>+	u16			rx_offset;</div><div class='add'>+	u16			rx_dma_offset;</div><div class='add'>+</div><div class='add'>+	u8			rss_hash_key[HW_HASH_KEY_SIZE];</div><div class='add'>+	u8			rss_hash_key_valid:1;</div><div class='add'>+	u8			rss_hash_key_updated:1;</div><div class='add'>+	int			rsscos_nr_ctxs;</div><div class='add'>+	u32			stats_coal_ticks;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNGE_DEFAULT_RX_RING_SIZE	511</div><div class='add'>+#define BNGE_DEFAULT_TX_RING_SIZE	511</div><div class='add'>+</div><div class='add'>+int bnge_netdev_alloc(struct bnge_dev *bd, int max_irqs);</div><div class='add'>+void bnge_netdev_free(struct bnge_dev *bd);</div><div class='add'>+void bnge_set_ring_params(struct bnge_dev *bd);</div><div class='add'>+</div><div class='add'>+#if (BNGE_PAGE_SHIFT == 16)</div><div class='add'>+#define MAX_RX_PAGES_AGG_ENA	1</div><div class='add'>+#define MAX_RX_PAGES		4</div><div class='add'>+#define MAX_RX_AGG_PAGES	4</div><div class='add'>+#define MAX_TX_PAGES		1</div><div class='add'>+#define MAX_CP_PAGES		16</div><div class='add'>+#else</div><div class='add'>+#define MAX_RX_PAGES_AGG_ENA	8</div><div class='add'>+#define MAX_RX_PAGES		32</div><div class='add'>+#define MAX_RX_AGG_PAGES	32</div><div class='add'>+#define MAX_TX_PAGES		8</div><div class='add'>+#define MAX_CP_PAGES		128</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define BNGE_RX_PAGE_SIZE		(1 &lt;&lt; BNGE_RX_PAGE_SHIFT)</div><div class='add'>+</div><div class='add'>+#define RX_DESC_CNT			(BNGE_PAGE_SIZE / sizeof(struct rx_bd))</div><div class='add'>+#define TX_DESC_CNT			(BNGE_PAGE_SIZE / sizeof(struct tx_bd))</div><div class='add'>+#define CP_DESC_CNT			(BNGE_PAGE_SIZE / sizeof(struct tx_cmp))</div><div class='add'>+#define SW_RXBD_RING_SIZE		(sizeof(struct bnge_sw_rx_bd) * RX_DESC_CNT)</div><div class='add'>+#define HW_RXBD_RING_SIZE		(sizeof(struct rx_bd) * RX_DESC_CNT)</div><div class='add'>+#define SW_RXBD_AGG_RING_SIZE		(sizeof(struct bnge_sw_rx_agg_bd) * RX_DESC_CNT)</div><div class='add'>+#define SW_TXBD_RING_SIZE		(sizeof(struct bnge_sw_tx_bd) * TX_DESC_CNT)</div><div class='add'>+#define HW_TXBD_RING_SIZE		(sizeof(struct tx_bd) * TX_DESC_CNT)</div><div class='add'>+#define HW_CMPD_RING_SIZE		(sizeof(struct tx_cmp) * CP_DESC_CNT)</div><div class='add'>+#define BNGE_MAX_RX_DESC_CNT		(RX_DESC_CNT * MAX_RX_PAGES - 1)</div><div class='add'>+#define BNGE_MAX_RX_DESC_CNT_JUM_ENA	(RX_DESC_CNT * MAX_RX_PAGES_AGG_ENA - 1)</div><div class='add'>+#define BNGE_MAX_RX_JUM_DESC_CNT	(RX_DESC_CNT * MAX_RX_AGG_PAGES - 1)</div><div class='add'>+#define BNGE_MAX_TX_DESC_CNT		(TX_DESC_CNT * MAX_TX_PAGES - 1)</div><div class='add'>+</div><div class='add'>+#define BNGE_MAX_TXR_PER_NAPI	8</div><div class='add'>+</div><div class='add'>+#define bnge_for_each_napi_tx(iter, bnapi, txr)		\</div><div class='add'>+	for (iter = 0, txr = (bnapi)-&gt;tx_ring[0]; txr;	\</div><div class='add'>+	     txr = (iter &lt; BNGE_MAX_TXR_PER_NAPI - 1) ?	\</div><div class='add'>+	     (bnapi)-&gt;tx_ring[++iter] : NULL)</div><div class='add'>+</div><div class='add'>+#define BNGE_SET_NQ_HDL(cpr)						\</div><div class='add'>+	(((cpr)-&gt;cp_ring_type &lt;&lt; BNGE_NQ_HDL_TYPE_SHIFT) | (cpr)-&gt;cp_idx)</div><div class='add'>+</div><div class='add'>+struct bnge_stats_mem {</div><div class='add'>+	u64		*sw_stats;</div><div class='add'>+	u64		*hw_masks;</div><div class='add'>+	void		*hw_stats;</div><div class='add'>+	dma_addr_t	hw_stats_map;</div><div class='add'>+	int		len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_cp_ring_info {</div><div class='add'>+	struct bnge_napi	*bnapi;</div><div class='add'>+	dma_addr_t		*desc_mapping;</div><div class='add'>+	struct tx_cmp		**desc_ring;</div><div class='add'>+	struct bnge_ring_struct	ring_struct;</div><div class='add'>+	u8			cp_ring_type;</div><div class='add'>+	u8			cp_idx;</div><div class='add'>+	u32			cp_raw_cons;</div><div class='add'>+	struct bnge_db_info	cp_db;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_nq_ring_info {</div><div class='add'>+	struct bnge_napi	*bnapi;</div><div class='add'>+	dma_addr_t		*desc_mapping;</div><div class='add'>+	struct nqe_cn		**desc_ring;</div><div class='add'>+	struct bnge_ring_struct	ring_struct;</div><div class='add'>+	u32			nq_raw_cons;</div><div class='add'>+	struct bnge_db_info	nq_db;</div><div class='add'>+</div><div class='add'>+	struct bnge_stats_mem	stats;</div><div class='add'>+	u32			hw_stats_ctx_id;</div><div class='add'>+</div><div class='add'>+	int				cp_ring_count;</div><div class='add'>+	struct bnge_cp_ring_info	*cp_ring_arr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_rx_ring_info {</div><div class='add'>+	struct bnge_napi	*bnapi;</div><div class='add'>+	struct bnge_cp_ring_info	*rx_cpr;</div><div class='add'>+	u16			rx_prod;</div><div class='add'>+	u16			rx_agg_prod;</div><div class='add'>+	u16			rx_sw_agg_prod;</div><div class='add'>+	u16			rx_next_cons;</div><div class='add'>+	struct bnge_db_info	rx_db;</div><div class='add'>+	struct bnge_db_info	rx_agg_db;</div><div class='add'>+</div><div class='add'>+	struct rx_bd		*rx_desc_ring[MAX_RX_PAGES];</div><div class='add'>+	struct bnge_sw_rx_bd	*rx_buf_ring;</div><div class='add'>+</div><div class='add'>+	struct rx_bd			*rx_agg_desc_ring[MAX_RX_AGG_PAGES];</div><div class='add'>+	struct bnge_sw_rx_agg_bd	*rx_agg_buf_ring;</div><div class='add'>+</div><div class='add'>+	unsigned long		*rx_agg_bmap;</div><div class='add'>+	u16			rx_agg_bmap_size;</div><div class='add'>+</div><div class='add'>+	dma_addr_t		rx_desc_mapping[MAX_RX_PAGES];</div><div class='add'>+	dma_addr_t		rx_agg_desc_mapping[MAX_RX_AGG_PAGES];</div><div class='add'>+</div><div class='add'>+	struct bnge_ring_struct	rx_ring_struct;</div><div class='add'>+	struct bnge_ring_struct	rx_agg_ring_struct;</div><div class='add'>+	struct page_pool	*page_pool;</div><div class='add'>+	struct page_pool	*head_pool;</div><div class='add'>+	bool			need_head_pool;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_tx_ring_info {</div><div class='add'>+	struct bnge_napi	*bnapi;</div><div class='add'>+	struct bnge_cp_ring_info	*tx_cpr;</div><div class='add'>+	u16			tx_prod;</div><div class='add'>+	u16			tx_cons;</div><div class='add'>+	u16			tx_hw_cons;</div><div class='add'>+	u16			txq_index;</div><div class='add'>+	u8			tx_napi_idx;</div><div class='add'>+	u8			kick_pending;</div><div class='add'>+	struct bnge_db_info	tx_db;</div><div class='add'>+</div><div class='add'>+	struct tx_bd		*tx_desc_ring[MAX_TX_PAGES];</div><div class='add'>+	struct bnge_sw_tx_bd	*tx_buf_ring;</div><div class='add'>+</div><div class='add'>+	dma_addr_t		tx_desc_mapping[MAX_TX_PAGES];</div><div class='add'>+</div><div class='add'>+	u32			dev_state;</div><div class='add'>+#define BNGE_DEV_STATE_CLOSING	0x1</div><div class='add'>+</div><div class='add'>+	struct bnge_ring_struct	tx_ring_struct;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_napi {</div><div class='add'>+	struct napi_struct		napi;</div><div class='add'>+	struct bnge_net			*bn;</div><div class='add'>+	int				index;</div><div class='add'>+</div><div class='add'>+	struct bnge_nq_ring_info	nq_ring;</div><div class='add'>+	struct bnge_rx_ring_info	*rx_ring;</div><div class='add'>+	struct bnge_tx_ring_info	*tx_ring[BNGE_MAX_TXR_PER_NAPI];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define INVALID_STATS_CTX_ID	-1</div><div class='add'>+#define BNGE_VNIC_DEFAULT	0</div><div class='add'>+#define BNGE_MAX_UC_ADDRS	4</div><div class='add'>+</div><div class='add'>+struct bnge_vnic_info {</div><div class='add'>+	u16		fw_vnic_id;</div><div class='add'>+#define BNGE_MAX_CTX_PER_VNIC	8</div><div class='add'>+	u16		fw_rss_cos_lb_ctx[BNGE_MAX_CTX_PER_VNIC];</div><div class='add'>+	u16		mru;</div><div class='add'>+	/* index 0 always dev_addr */</div><div class='add'>+	struct bnge_l2_filter *l2_filters[BNGE_MAX_UC_ADDRS];</div><div class='add'>+	u16		uc_filter_count;</div><div class='add'>+	u8		*uc_list;</div><div class='add'>+	dma_addr_t	rss_table_dma_addr;</div><div class='add'>+	__le16		*rss_table;</div><div class='add'>+	dma_addr_t	rss_hash_key_dma_addr;</div><div class='add'>+	u64		*rss_hash_key;</div><div class='add'>+	int		rss_table_size;</div><div class='add'>+#define BNGE_RSS_TABLE_ENTRIES		64</div><div class='add'>+#define BNGE_RSS_TABLE_SIZE		(BNGE_RSS_TABLE_ENTRIES * 4)</div><div class='add'>+#define BNGE_RSS_TABLE_MAX_TBL		8</div><div class='add'>+#define BNGE_MAX_RSS_TABLE_SIZE			\</div><div class='add'>+	(BNGE_RSS_TABLE_SIZE * BNGE_RSS_TABLE_MAX_TBL)</div><div class='add'>+	u32		rx_mask;</div><div class='add'>+</div><div class='add'>+	u8		*mc_list;</div><div class='add'>+	int		mc_list_size;</div><div class='add'>+	int		mc_list_count;</div><div class='add'>+	dma_addr_t	mc_list_mapping;</div><div class='add'>+#define BNGE_MAX_MC_ADDRS	16</div><div class='add'>+</div><div class='add'>+	u32		flags;</div><div class='add'>+#define BNGE_VNIC_RSS_FLAG	1</div><div class='add'>+#define BNGE_VNIC_MCAST_FLAG	4</div><div class='add'>+#define BNGE_VNIC_UCAST_FLAG	8</div><div class='add'>+	u32		vnic_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_filter_base {</div><div class='add'>+	struct hlist_node	hash;</div><div class='add'>+	struct list_head	list;</div><div class='add'>+	__le64			filter_id;</div><div class='add'>+	u8			type;</div><div class='add'>+#define BNGE_FLTR_TYPE_L2	2</div><div class='add'>+	u8			flags;</div><div class='add'>+	u16			rxq;</div><div class='add'>+	u16			fw_vnic_id;</div><div class='add'>+	u16			vf_idx;</div><div class='add'>+	unsigned long		state;</div><div class='add'>+#define BNGE_FLTR_VALID		0</div><div class='add'>+#define BNGE_FLTR_FW_DELETED	2</div><div class='add'>+</div><div class='add'>+	struct rcu_head         rcu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_l2_key {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u8	dst_mac_addr[ETH_ALEN];</div><div class='add'>+			u16	vlan;</div><div class='add'>+		};</div><div class='add'>+		u32	filter_key;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNGE_L2_KEY_SIZE	(sizeof(struct bnge_l2_key) / 4)</div><div class='add'>+struct bnge_l2_filter {</div><div class='add'>+	/* base filter must be the first member */</div><div class='add'>+	struct bnge_filter_base	base;</div><div class='add'>+	struct bnge_l2_key	l2_key;</div><div class='add'>+	refcount_t		refcnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u16 bnge_cp_ring_for_rx(struct bnge_rx_ring_info *rxr);</div><div class='add'>+u16 bnge_cp_ring_for_tx(struct bnge_tx_ring_info *txr);</div><div class='add'>+void bnge_fill_hw_rss_tbl(struct bnge_net *bn, struct bnge_vnic_info *vnic);</div><div class='add'>+#endif /* _BNGE_NETDEV_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_resc.c b/drivers/net/ethernet/broadcom/bnge/bnge_resc.c<br/>new file mode 100644<br/>index 000000000000..943df5f60f01<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_resc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_resc.c</a></div><div class='hunk'>@@ -0,0 +1,617 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2025 Broadcom.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bnge.h"</div><div class='add'>+#include "bnge_hwrm.h"</div><div class='add'>+#include "bnge_hwrm_lib.h"</div><div class='add'>+#include "bnge_resc.h"</div><div class='add'>+</div><div class='add'>+static u16 bnge_num_tx_to_cp(struct bnge_dev *bd, u16 tx)</div><div class='add'>+{</div><div class='add'>+	u16 tcs = bd-&gt;num_tc;</div><div class='add'>+</div><div class='add'>+	if (!tcs)</div><div class='add'>+		tcs = 1;</div><div class='add'>+</div><div class='add'>+	return tx / tcs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 bnge_get_max_func_irqs(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hw_resc *hw_resc = &amp;bd-&gt;hw_resc;</div><div class='add'>+</div><div class='add'>+	return min_t(u16, hw_resc-&gt;max_irqs, hw_resc-&gt;max_nqs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int bnge_get_max_func_stat_ctxs(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	return bd-&gt;hw_resc.max_stat_ctxs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bnge_aux_has_enough_resources(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	unsigned int max_stat_ctxs;</div><div class='add'>+</div><div class='add'>+	max_stat_ctxs = bnge_get_max_func_stat_ctxs(bd);</div><div class='add'>+	if (max_stat_ctxs &lt;= BNGE_MIN_ROCE_STAT_CTXS ||</div><div class='add'>+	    bd-&gt;nq_nr_rings == max_stat_ctxs)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int bnge_get_max_func_cp_rings(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	return bd-&gt;hw_resc.max_cp_rings;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_aux_get_dflt_msix(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	int roce_msix = BNGE_MAX_ROCE_MSIX;</div><div class='add'>+</div><div class='add'>+	return min_t(int, roce_msix, num_online_cpus() + 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 bnge_aux_get_msix(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	if (bnge_is_roce_en(bd))</div><div class='add'>+		return bd-&gt;aux_num_msix;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_aux_set_msix_num(struct bnge_dev *bd, u16 num)</div><div class='add'>+{</div><div class='add'>+	if (bnge_is_roce_en(bd))</div><div class='add'>+		bd-&gt;aux_num_msix = num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 bnge_aux_get_stat_ctxs(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	if (bnge_is_roce_en(bd))</div><div class='add'>+		return bd-&gt;aux_num_stat_ctxs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_aux_set_stat_ctxs(struct bnge_dev *bd, u16 num_aux_ctx)</div><div class='add'>+{</div><div class='add'>+	if (bnge_is_roce_en(bd))</div><div class='add'>+		bd-&gt;aux_num_stat_ctxs = num_aux_ctx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 bnge_func_stat_ctxs_demand(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	return bd-&gt;nq_nr_rings + bnge_aux_get_stat_ctxs(bd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_get_dflt_aux_stat_ctxs(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	int stat_ctx = 0;</div><div class='add'>+</div><div class='add'>+	if (bnge_is_roce_en(bd)) {</div><div class='add'>+		stat_ctx = BNGE_MIN_ROCE_STAT_CTXS;</div><div class='add'>+</div><div class='add'>+		if (!bd-&gt;pf.port_id &amp;&amp; bd-&gt;port_count &gt; 1)</div><div class='add'>+			stat_ctx++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return stat_ctx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 bnge_nqs_demand(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	return bd-&gt;nq_nr_rings + bnge_aux_get_msix(bd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 bnge_cprs_demand(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	return bd-&gt;tx_nr_rings + bd-&gt;rx_nr_rings;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 bnge_get_avail_msix(struct bnge_dev *bd, int num)</div><div class='add'>+{</div><div class='add'>+	u16 max_irq = bnge_get_max_func_irqs(bd);</div><div class='add'>+	u16 total_demand = bd-&gt;nq_nr_rings + num;</div><div class='add'>+</div><div class='add'>+	if (max_irq &lt; total_demand) {</div><div class='add'>+		num = max_irq - bd-&gt;nq_nr_rings;</div><div class='add'>+		if (num &lt;= 0)</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 bnge_num_cp_to_tx(struct bnge_dev *bd, u16 tx_chunks)</div><div class='add'>+{</div><div class='add'>+	return tx_chunks * bd-&gt;num_tc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_fix_rings_count(u16 *rx, u16 *tx, u16 max, bool shared)</div><div class='add'>+{</div><div class='add'>+	u16 _rx = *rx, _tx = *tx;</div><div class='add'>+</div><div class='add'>+	if (shared) {</div><div class='add'>+		*rx = min_t(u16, _rx, max);</div><div class='add'>+		*tx = min_t(u16, _tx, max);</div><div class='add'>+	} else {</div><div class='add'>+		if (max &lt; 2)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		while (_rx + _tx &gt; max) {</div><div class='add'>+			if (_rx &gt; _tx &amp;&amp; _rx &gt; 1)</div><div class='add'>+				_rx--;</div><div class='add'>+			else if (_tx &gt; 1)</div><div class='add'>+				_tx--;</div><div class='add'>+		}</div><div class='add'>+		*rx = _rx;</div><div class='add'>+		*tx = _tx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_adjust_rings(struct bnge_dev *bd, u16 *rx,</div><div class='add'>+			     u16 *tx, u16 max_nq, bool sh)</div><div class='add'>+{</div><div class='add'>+	u16 tx_chunks = bnge_num_tx_to_cp(bd, *tx);</div><div class='add'>+</div><div class='add'>+	if (tx_chunks != *tx) {</div><div class='add'>+		u16 tx_saved = tx_chunks, rc;</div><div class='add'>+</div><div class='add'>+		rc = bnge_fix_rings_count(rx, &amp;tx_chunks, max_nq, sh);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+		if (tx_chunks != tx_saved)</div><div class='add'>+			*tx = bnge_num_cp_to_tx(bd, tx_chunks);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return bnge_fix_rings_count(rx, tx, max_nq, sh);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_cal_nr_rss_ctxs(u16 rx_rings)</div><div class='add'>+{</div><div class='add'>+	if (!rx_rings)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return bnge_adjust_pow_two(rx_rings - 1,</div><div class='add'>+				   BNGE_RSS_TABLE_ENTRIES);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 bnge_rss_ctxs_in_use(struct bnge_dev *bd,</div><div class='add'>+				struct bnge_hw_rings *hwr)</div><div class='add'>+{</div><div class='add'>+	return bnge_cal_nr_rss_ctxs(hwr-&gt;grp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 bnge_get_total_vnics(struct bnge_dev *bd, u16 rx_rings)</div><div class='add'>+{</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 bnge_get_rxfh_indir_size(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	return bnge_cal_nr_rss_ctxs(bd-&gt;rx_nr_rings) *</div><div class='add'>+	       BNGE_RSS_TABLE_ENTRIES;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_set_dflt_rss_indir_tbl(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	u16 max_entries, pad;</div><div class='add'>+	u32 *rss_indir_tbl;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	max_entries = bnge_get_rxfh_indir_size(bd);</div><div class='add'>+	rss_indir_tbl = &amp;bd-&gt;rss_indir_tbl[0];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max_entries; i++)</div><div class='add'>+		rss_indir_tbl[i] = ethtool_rxfh_indir_default(i,</div><div class='add'>+							      bd-&gt;rx_nr_rings);</div><div class='add'>+</div><div class='add'>+	pad = bd-&gt;rss_indir_tbl_entries - max_entries;</div><div class='add'>+	if (pad)</div><div class='add'>+		memset(&amp;rss_indir_tbl[i], 0, pad * sizeof(*rss_indir_tbl));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_copy_reserved_rings(struct bnge_dev *bd,</div><div class='add'>+				     struct bnge_hw_rings *hwr)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hw_resc *hw_resc = &amp;bd-&gt;hw_resc;</div><div class='add'>+</div><div class='add'>+	hwr-&gt;tx = hw_resc-&gt;resv_tx_rings;</div><div class='add'>+	hwr-&gt;rx = hw_resc-&gt;resv_rx_rings;</div><div class='add'>+	hwr-&gt;nq = hw_resc-&gt;resv_irqs;</div><div class='add'>+	hwr-&gt;cmpl = hw_resc-&gt;resv_cp_rings;</div><div class='add'>+	hwr-&gt;grp = hw_resc-&gt;resv_hw_ring_grps;</div><div class='add'>+	hwr-&gt;vnic = hw_resc-&gt;resv_vnics;</div><div class='add'>+	hwr-&gt;stat = hw_resc-&gt;resv_stat_ctxs;</div><div class='add'>+	hwr-&gt;rss_ctx = hw_resc-&gt;resv_rsscos_ctxs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bnge_rings_ok(struct bnge_hw_rings *hwr)</div><div class='add'>+{</div><div class='add'>+	return hwr-&gt;tx &amp;&amp; hwr-&gt;rx &amp;&amp; hwr-&gt;nq &amp;&amp; hwr-&gt;grp &amp;&amp; hwr-&gt;vnic &amp;&amp;</div><div class='add'>+	       hwr-&gt;stat &amp;&amp; hwr-&gt;cmpl;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bnge_need_reserve_rings(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hw_resc *hw_resc = &amp;bd-&gt;hw_resc;</div><div class='add'>+	u16 cprs = bnge_cprs_demand(bd);</div><div class='add'>+	u16 rx = bd-&gt;rx_nr_rings, stat;</div><div class='add'>+	u16 nqs = bnge_nqs_demand(bd);</div><div class='add'>+	u16 vnic;</div><div class='add'>+</div><div class='add'>+	if (hw_resc-&gt;resv_tx_rings != bd-&gt;tx_nr_rings)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	vnic = bnge_get_total_vnics(bd, rx);</div><div class='add'>+</div><div class='add'>+	if (bnge_is_agg_reqd(bd))</div><div class='add'>+		rx &lt;&lt;= 1;</div><div class='add'>+	stat = bnge_func_stat_ctxs_demand(bd);</div><div class='add'>+	if (hw_resc-&gt;resv_rx_rings != rx || hw_resc-&gt;resv_cp_rings != cprs ||</div><div class='add'>+	    hw_resc-&gt;resv_vnics != vnic || hw_resc-&gt;resv_stat_ctxs != stat)</div><div class='add'>+		return true;</div><div class='add'>+	if (hw_resc-&gt;resv_irqs != nqs)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_reserve_rings(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	u16 aux_dflt_msix = bnge_aux_get_dflt_msix(bd);</div><div class='add'>+	struct bnge_hw_rings hwr = {0};</div><div class='add'>+	u16 rx_rings, old_rx_rings;</div><div class='add'>+	u16 nq = bd-&gt;nq_nr_rings;</div><div class='add'>+	u16 aux_msix = 0;</div><div class='add'>+	bool sh = false;</div><div class='add'>+	u16 tx_cp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!bnge_need_reserve_rings(bd))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!bnge_aux_registered(bd)) {</div><div class='add'>+		aux_msix = bnge_get_avail_msix(bd, aux_dflt_msix);</div><div class='add'>+		if (!aux_msix)</div><div class='add'>+			bnge_aux_set_stat_ctxs(bd, 0);</div><div class='add'>+</div><div class='add'>+		if (aux_msix &gt; aux_dflt_msix)</div><div class='add'>+			aux_msix = aux_dflt_msix;</div><div class='add'>+		hwr.nq = nq + aux_msix;</div><div class='add'>+	} else {</div><div class='add'>+		hwr.nq = bnge_nqs_demand(bd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hwr.tx = bd-&gt;tx_nr_rings;</div><div class='add'>+	hwr.rx = bd-&gt;rx_nr_rings;</div><div class='add'>+	if (bd-&gt;flags &amp; BNGE_EN_SHARED_CHNL)</div><div class='add'>+		sh = true;</div><div class='add'>+	hwr.cmpl = hwr.rx + hwr.tx;</div><div class='add'>+</div><div class='add'>+	hwr.vnic = bnge_get_total_vnics(bd, hwr.rx);</div><div class='add'>+</div><div class='add'>+	if (bnge_is_agg_reqd(bd))</div><div class='add'>+		hwr.rx &lt;&lt;= 1;</div><div class='add'>+	hwr.grp = bd-&gt;rx_nr_rings;</div><div class='add'>+	hwr.rss_ctx = bnge_rss_ctxs_in_use(bd, &amp;hwr);</div><div class='add'>+	hwr.stat = bnge_func_stat_ctxs_demand(bd);</div><div class='add'>+	old_rx_rings = bd-&gt;hw_resc.resv_rx_rings;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_reserve_rings(bd, &amp;hwr);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	bnge_copy_reserved_rings(bd, &amp;hwr);</div><div class='add'>+</div><div class='add'>+	rx_rings = hwr.rx;</div><div class='add'>+	if (bnge_is_agg_reqd(bd)) {</div><div class='add'>+		if (hwr.rx &gt;= 2)</div><div class='add'>+			rx_rings = hwr.rx &gt;&gt; 1;</div><div class='add'>+		else</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_rings = min_t(u16, rx_rings, hwr.grp);</div><div class='add'>+	hwr.nq = min_t(u16, hwr.nq, bd-&gt;nq_nr_rings);</div><div class='add'>+	if (hwr.stat &gt; bnge_aux_get_stat_ctxs(bd))</div><div class='add'>+		hwr.stat -= bnge_aux_get_stat_ctxs(bd);</div><div class='add'>+	hwr.nq = min_t(u16, hwr.nq, hwr.stat);</div><div class='add'>+</div><div class='add'>+	/* Adjust the rings */</div><div class='add'>+	rc = bnge_adjust_rings(bd, &amp;rx_rings, &amp;hwr.tx, hwr.nq, sh);</div><div class='add'>+	if (bnge_is_agg_reqd(bd))</div><div class='add'>+		hwr.rx = rx_rings &lt;&lt; 1;</div><div class='add'>+	tx_cp = hwr.tx;</div><div class='add'>+	hwr.nq = sh ? max_t(u16, tx_cp, rx_rings) : tx_cp + rx_rings;</div><div class='add'>+	bd-&gt;tx_nr_rings = hwr.tx;</div><div class='add'>+</div><div class='add'>+	if (rx_rings != bd-&gt;rx_nr_rings)</div><div class='add'>+		dev_warn(bd-&gt;dev, "RX rings resv reduced to %d than earlier %d requested\n",</div><div class='add'>+			 rx_rings, bd-&gt;rx_nr_rings);</div><div class='add'>+</div><div class='add'>+	bd-&gt;rx_nr_rings = rx_rings;</div><div class='add'>+	bd-&gt;nq_nr_rings = hwr.nq;</div><div class='add'>+</div><div class='add'>+	if (!bnge_rings_ok(&amp;hwr))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (old_rx_rings != bd-&gt;hw_resc.resv_rx_rings)</div><div class='add'>+		bnge_set_dflt_rss_indir_tbl(bd);</div><div class='add'>+</div><div class='add'>+	if (!bnge_aux_registered(bd)) {</div><div class='add'>+		u16 resv_msix, resv_ctx, aux_ctxs;</div><div class='add'>+		struct bnge_hw_resc *hw_resc;</div><div class='add'>+</div><div class='add'>+		hw_resc = &amp;bd-&gt;hw_resc;</div><div class='add'>+		resv_msix = hw_resc-&gt;resv_irqs - bd-&gt;nq_nr_rings;</div><div class='add'>+		aux_msix = min_t(u16, resv_msix, aux_msix);</div><div class='add'>+		bnge_aux_set_msix_num(bd, aux_msix);</div><div class='add'>+		resv_ctx = hw_resc-&gt;resv_stat_ctxs  - bd-&gt;nq_nr_rings;</div><div class='add'>+		aux_ctxs = min(resv_ctx, bnge_aux_get_stat_ctxs(bd));</div><div class='add'>+		bnge_aux_set_stat_ctxs(bd, aux_ctxs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_alloc_irqs(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	u16 aux_msix, tx_cp, num_entries;</div><div class='add'>+	int i, irqs_demand, rc;</div><div class='add'>+	u16 max, min = 1;</div><div class='add'>+</div><div class='add'>+	irqs_demand = bnge_nqs_demand(bd);</div><div class='add'>+	max = bnge_get_max_func_irqs(bd);</div><div class='add'>+	if (irqs_demand &gt; max)</div><div class='add'>+		irqs_demand = max;</div><div class='add'>+</div><div class='add'>+	if (!(bd-&gt;flags &amp; BNGE_EN_SHARED_CHNL))</div><div class='add'>+		min = 2;</div><div class='add'>+</div><div class='add'>+	irqs_demand = pci_alloc_irq_vectors(bd-&gt;pdev, min, irqs_demand,</div><div class='add'>+					    PCI_IRQ_MSIX);</div><div class='add'>+	aux_msix = bnge_aux_get_msix(bd);</div><div class='add'>+	if (irqs_demand &lt; 0 || irqs_demand &lt; aux_msix) {</div><div class='add'>+		rc = -ENODEV;</div><div class='add'>+		goto err_free_irqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_entries = irqs_demand;</div><div class='add'>+	if (pci_msix_can_alloc_dyn(bd-&gt;pdev))</div><div class='add'>+		num_entries = max;</div><div class='add'>+	bd-&gt;irq_tbl = kcalloc(num_entries, sizeof(*bd-&gt;irq_tbl), GFP_KERNEL);</div><div class='add'>+	if (!bd-&gt;irq_tbl) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_free_irqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; irqs_demand; i++)</div><div class='add'>+		bd-&gt;irq_tbl[i].vector = pci_irq_vector(bd-&gt;pdev, i);</div><div class='add'>+</div><div class='add'>+	bd-&gt;irqs_acquired = irqs_demand;</div><div class='add'>+	/* Reduce rings based upon num of vectors allocated.</div><div class='add'>+	 * We dont need to consider NQs as they have been calculated</div><div class='add'>+	 * and must be more than irqs_demand.</div><div class='add'>+	 */</div><div class='add'>+	rc = bnge_adjust_rings(bd, &amp;bd-&gt;rx_nr_rings,</div><div class='add'>+			       &amp;bd-&gt;tx_nr_rings,</div><div class='add'>+			       irqs_demand - aux_msix, min == 1);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_irqs;</div><div class='add'>+</div><div class='add'>+	tx_cp = bnge_num_tx_to_cp(bd, bd-&gt;tx_nr_rings);</div><div class='add'>+	bd-&gt;nq_nr_rings = (min == 1) ?</div><div class='add'>+		max_t(u16, tx_cp, bd-&gt;rx_nr_rings) :</div><div class='add'>+		tx_cp + bd-&gt;rx_nr_rings;</div><div class='add'>+</div><div class='add'>+	/* Readjust tx_nr_rings_per_tc */</div><div class='add'>+	if (!bd-&gt;num_tc)</div><div class='add'>+		bd-&gt;tx_nr_rings_per_tc = bd-&gt;tx_nr_rings;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irqs:</div><div class='add'>+	dev_err(bd-&gt;dev, "Failed to allocate IRQs err = %d\n", rc);</div><div class='add'>+	bnge_free_irqs(bd);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_free_irqs(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	pci_free_irq_vectors(bd-&gt;pdev);</div><div class='add'>+	kfree(bd-&gt;irq_tbl);</div><div class='add'>+	bd-&gt;irq_tbl = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void _bnge_get_max_rings(struct bnge_dev *bd, u16 *max_rx,</div><div class='add'>+				u16 *max_tx, u16 *max_nq)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hw_resc *hw_resc = &amp;bd-&gt;hw_resc;</div><div class='add'>+	u16 max_ring_grps = 0, max_cp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	*max_tx = hw_resc-&gt;max_tx_rings;</div><div class='add'>+	*max_rx = hw_resc-&gt;max_rx_rings;</div><div class='add'>+	*max_nq = min_t(int, bnge_get_max_func_irqs(bd),</div><div class='add'>+			hw_resc-&gt;max_stat_ctxs);</div><div class='add'>+	max_ring_grps = hw_resc-&gt;max_hw_ring_grps;</div><div class='add'>+	if (bnge_is_agg_reqd(bd))</div><div class='add'>+		*max_rx &gt;&gt;= 1;</div><div class='add'>+</div><div class='add'>+	max_cp = bnge_get_max_func_cp_rings(bd);</div><div class='add'>+</div><div class='add'>+	/* Fix RX and TX rings according to number of CPs available */</div><div class='add'>+	rc = bnge_fix_rings_count(max_rx, max_tx, max_cp, false);</div><div class='add'>+	if (rc) {</div><div class='add'>+		*max_rx = 0;</div><div class='add'>+		*max_tx = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*max_rx = min_t(int, *max_rx, max_ring_grps);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_get_max_rings(struct bnge_dev *bd, u16 *max_rx,</div><div class='add'>+			      u16 *max_tx, bool shared)</div><div class='add'>+{</div><div class='add'>+	u16 rx, tx, nq;</div><div class='add'>+</div><div class='add'>+	_bnge_get_max_rings(bd, &amp;rx, &amp;tx, &amp;nq);</div><div class='add'>+	*max_rx = rx;</div><div class='add'>+	*max_tx = tx;</div><div class='add'>+	if (!rx || !tx || !nq)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return bnge_fix_rings_count(max_rx, max_tx, nq, shared);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_get_dflt_rings(struct bnge_dev *bd, u16 *max_rx, u16 *max_tx,</div><div class='add'>+			       bool shared)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_get_max_rings(bd, max_rx, max_tx, shared);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_info(bd-&gt;dev, "Not enough rings available\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bnge_is_roce_en(bd)) {</div><div class='add'>+		int max_cp, max_stat, max_irq;</div><div class='add'>+</div><div class='add'>+		/* Reserve minimum resources for RoCE */</div><div class='add'>+		max_cp = bnge_get_max_func_cp_rings(bd);</div><div class='add'>+		max_stat = bnge_get_max_func_stat_ctxs(bd);</div><div class='add'>+		max_irq = bnge_get_max_func_irqs(bd);</div><div class='add'>+		if (max_cp &lt;= BNGE_MIN_ROCE_CP_RINGS ||</div><div class='add'>+		    max_irq &lt;= BNGE_MIN_ROCE_CP_RINGS ||</div><div class='add'>+		    max_stat &lt;= BNGE_MIN_ROCE_STAT_CTXS)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		max_cp -= BNGE_MIN_ROCE_CP_RINGS;</div><div class='add'>+		max_irq -= BNGE_MIN_ROCE_CP_RINGS;</div><div class='add'>+		max_stat -= BNGE_MIN_ROCE_STAT_CTXS;</div><div class='add'>+		max_cp = min_t(u16, max_cp, max_irq);</div><div class='add'>+		max_cp = min_t(u16, max_cp, max_stat);</div><div class='add'>+		rc = bnge_adjust_rings(bd, max_rx, max_tx, max_cp, shared);</div><div class='add'>+		if (rc)</div><div class='add'>+			rc = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* In initial default shared ring setting, each shared ring must have a</div><div class='add'>+ * RX/TX ring pair.</div><div class='add'>+ */</div><div class='add'>+static void bnge_trim_dflt_sh_rings(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	bd-&gt;nq_nr_rings = min_t(u16, bd-&gt;tx_nr_rings_per_tc, bd-&gt;rx_nr_rings);</div><div class='add'>+	bd-&gt;rx_nr_rings = bd-&gt;nq_nr_rings;</div><div class='add'>+	bd-&gt;tx_nr_rings_per_tc = bd-&gt;nq_nr_rings;</div><div class='add'>+	bd-&gt;tx_nr_rings = bd-&gt;tx_nr_rings_per_tc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_net_init_dflt_rings(struct bnge_dev *bd, bool sh)</div><div class='add'>+{</div><div class='add'>+	u16 dflt_rings, max_rx_rings, max_tx_rings;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (sh)</div><div class='add'>+		bd-&gt;flags |= BNGE_EN_SHARED_CHNL;</div><div class='add'>+</div><div class='add'>+	dflt_rings = netif_get_num_default_rss_queues();</div><div class='add'>+</div><div class='add'>+	rc = bnge_get_dflt_rings(bd, &amp;max_rx_rings, &amp;max_tx_rings, sh);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	bd-&gt;rx_nr_rings = min_t(u16, dflt_rings, max_rx_rings);</div><div class='add'>+	bd-&gt;tx_nr_rings_per_tc = min_t(u16, dflt_rings, max_tx_rings);</div><div class='add'>+	if (sh)</div><div class='add'>+		bnge_trim_dflt_sh_rings(bd);</div><div class='add'>+	else</div><div class='add'>+		bd-&gt;nq_nr_rings = bd-&gt;tx_nr_rings_per_tc + bd-&gt;rx_nr_rings;</div><div class='add'>+	bd-&gt;tx_nr_rings = bd-&gt;tx_nr_rings_per_tc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_reserve_rings(bd);</div><div class='add'>+	if (rc &amp;&amp; rc != -ENODEV)</div><div class='add'>+		dev_warn(bd-&gt;dev, "Unable to reserve tx rings\n");</div><div class='add'>+	bd-&gt;tx_nr_rings_per_tc = bd-&gt;tx_nr_rings;</div><div class='add'>+	if (sh)</div><div class='add'>+		bnge_trim_dflt_sh_rings(bd);</div><div class='add'>+</div><div class='add'>+	/* Rings may have been reduced, re-reserve them again */</div><div class='add'>+	if (bnge_need_reserve_rings(bd)) {</div><div class='add'>+		rc = bnge_reserve_rings(bd);</div><div class='add'>+		if (rc &amp;&amp; rc != -ENODEV)</div><div class='add'>+			dev_warn(bd-&gt;dev, "Fewer rings reservation failed\n");</div><div class='add'>+		bd-&gt;tx_nr_rings_per_tc = bd-&gt;tx_nr_rings;</div><div class='add'>+	}</div><div class='add'>+	if (rc) {</div><div class='add'>+		bd-&gt;tx_nr_rings = 0;</div><div class='add'>+		bd-&gt;rx_nr_rings = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_rss_indir_tbl(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	u16 entries;</div><div class='add'>+</div><div class='add'>+	entries = BNGE_MAX_RSS_TABLE_ENTRIES;</div><div class='add'>+</div><div class='add'>+	bd-&gt;rss_indir_tbl_entries = entries;</div><div class='add'>+	bd-&gt;rss_indir_tbl =</div><div class='add'>+		kmalloc_array(entries, sizeof(*bd-&gt;rss_indir_tbl), GFP_KERNEL);</div><div class='add'>+	if (!bd-&gt;rss_indir_tbl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_net_init_dflt_config(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_hw_resc *hw_resc;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_alloc_rss_indir_tbl(bd);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_net_init_dflt_rings(bd, true);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_tbl;</div><div class='add'>+</div><div class='add'>+	hw_resc = &amp;bd-&gt;hw_resc;</div><div class='add'>+	bd-&gt;max_fltr = hw_resc-&gt;max_rx_em_flows + hw_resc-&gt;max_rx_wm_flows +</div><div class='add'>+		       BNGE_L2_FLTR_MAX_FLTR;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_tbl:</div><div class='add'>+	kfree(bd-&gt;rss_indir_tbl);</div><div class='add'>+	bd-&gt;rss_indir_tbl = NULL;</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_net_uninit_dflt_config(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	kfree(bd-&gt;rss_indir_tbl);</div><div class='add'>+	bd-&gt;rss_indir_tbl = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_aux_init_dflt_config(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	bd-&gt;aux_num_msix = bnge_aux_get_dflt_msix(bd);</div><div class='add'>+	bd-&gt;aux_num_stat_ctxs = bnge_get_dflt_aux_stat_ctxs(bd);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_resc.h b/drivers/net/ethernet/broadcom/bnge/bnge_resc.h<br/>new file mode 100644<br/>index 000000000000..b62a634669f6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_resc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_resc.h</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Broadcom */</div><div class='add'>+</div><div class='add'>+#ifndef _BNGE_RESC_H_</div><div class='add'>+#define _BNGE_RESC_H_</div><div class='add'>+</div><div class='add'>+#include "bnge_netdev.h"</div><div class='add'>+#include "bnge_rmem.h"</div><div class='add'>+</div><div class='add'>+struct bnge_hw_resc {</div><div class='add'>+	u16	min_rsscos_ctxs;</div><div class='add'>+	u16	max_rsscos_ctxs;</div><div class='add'>+	u16	resv_rsscos_ctxs;</div><div class='add'>+	u16	min_cp_rings;</div><div class='add'>+	u16	max_cp_rings;</div><div class='add'>+	u16	resv_cp_rings;</div><div class='add'>+	u16	min_tx_rings;</div><div class='add'>+	u16	max_tx_rings;</div><div class='add'>+	u16	resv_tx_rings;</div><div class='add'>+	u16	max_tx_sch_inputs;</div><div class='add'>+	u16	min_rx_rings;</div><div class='add'>+	u16	max_rx_rings;</div><div class='add'>+	u16	resv_rx_rings;</div><div class='add'>+	u16	min_hw_ring_grps;</div><div class='add'>+	u16	max_hw_ring_grps;</div><div class='add'>+	u16	resv_hw_ring_grps;</div><div class='add'>+	u16	min_l2_ctxs;</div><div class='add'>+	u16	max_l2_ctxs;</div><div class='add'>+	u16	min_vnics;</div><div class='add'>+	u16	max_vnics;</div><div class='add'>+	u16	resv_vnics;</div><div class='add'>+	u16	min_stat_ctxs;</div><div class='add'>+	u16	max_stat_ctxs;</div><div class='add'>+	u16	resv_stat_ctxs;</div><div class='add'>+	u16	max_nqs;</div><div class='add'>+	u16	max_irqs;</div><div class='add'>+	u16	resv_irqs;</div><div class='add'>+	u32	max_encap_records;</div><div class='add'>+	u32	max_decap_records;</div><div class='add'>+	u32	max_tx_em_flows;</div><div class='add'>+	u32	max_tx_wm_flows;</div><div class='add'>+	u32	max_rx_em_flows;</div><div class='add'>+	u32	max_rx_wm_flows;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_hw_rings {</div><div class='add'>+	u16 tx;</div><div class='add'>+	u16 rx;</div><div class='add'>+	u16 grp;</div><div class='add'>+	u16 nq;</div><div class='add'>+	u16 cmpl;</div><div class='add'>+	u16 stat;</div><div class='add'>+	u16 vnic;</div><div class='add'>+	u16 rss_ctx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* "TXRX", 2 hypens, plus maximum integer */</div><div class='add'>+#define BNGE_IRQ_NAME_EXTRA	17</div><div class='add'>+struct bnge_irq {</div><div class='add'>+	irq_handler_t	handler;</div><div class='add'>+	unsigned int	vector;</div><div class='add'>+	u8		requested:1;</div><div class='add'>+	u8		have_cpumask:1;</div><div class='add'>+	char		name[IFNAMSIZ + BNGE_IRQ_NAME_EXTRA];</div><div class='add'>+	cpumask_var_t	cpu_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int bnge_reserve_rings(struct bnge_dev *bd);</div><div class='add'>+int bnge_fix_rings_count(u16 *rx, u16 *tx, u16 max, bool shared);</div><div class='add'>+int bnge_alloc_irqs(struct bnge_dev *bd);</div><div class='add'>+void bnge_free_irqs(struct bnge_dev *bd);</div><div class='add'>+int bnge_net_init_dflt_config(struct bnge_dev *bd);</div><div class='add'>+void bnge_net_uninit_dflt_config(struct bnge_dev *bd);</div><div class='add'>+void bnge_aux_init_dflt_config(struct bnge_dev *bd);</div><div class='add'>+u32 bnge_get_rxfh_indir_size(struct bnge_dev *bd);</div><div class='add'>+int bnge_cal_nr_rss_ctxs(u16 rx_rings);</div><div class='add'>+bool bnge_aux_has_enough_resources(struct bnge_dev *bd);</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+bnge_adjust_pow_two(u32 total_ent, u16 ent_per_blk)</div><div class='add'>+{</div><div class='add'>+	u32 blks = total_ent / ent_per_blk;</div><div class='add'>+</div><div class='add'>+	if (blks == 0 || blks == 1)</div><div class='add'>+		return ++blks;</div><div class='add'>+</div><div class='add'>+	if (!is_power_of_2(blks))</div><div class='add'>+		blks = roundup_pow_of_two(blks);</div><div class='add'>+</div><div class='add'>+	return blks;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define BNGE_MAX_ROCE_MSIX		64</div><div class='add'>+#define BNGE_MIN_ROCE_CP_RINGS		2</div><div class='add'>+#define BNGE_MIN_ROCE_STAT_CTXS		1</div><div class='add'>+</div><div class='add'>+#endif /* _BNGE_RESC_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c b/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c<br/>new file mode 100644<br/>index 000000000000..79f5ce2e5d08<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_rmem.c</a></div><div class='hunk'>@@ -0,0 +1,499 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2025 Broadcom.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+#include &lt;linux/crash_dump.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bnge.h"</div><div class='add'>+#include "bnge_hwrm_lib.h"</div><div class='add'>+#include "bnge_rmem.h"</div><div class='add'>+</div><div class='add'>+static void bnge_init_ctx_mem(struct bnge_ctx_mem_type *ctxm,</div><div class='add'>+			      void *p, int len)</div><div class='add'>+{</div><div class='add'>+	u8 init_val = ctxm-&gt;init_value;</div><div class='add'>+	u16 offset = ctxm-&gt;init_offset;</div><div class='add'>+	u8 *p2 = p;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!init_val)</div><div class='add'>+		return;</div><div class='add'>+	if (offset == BNGE_CTX_INIT_INVALID_OFFSET) {</div><div class='add'>+		memset(p, init_val, len);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; len; i += ctxm-&gt;entry_size)</div><div class='add'>+		*(p2 + i + offset) = init_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_free_ring(struct bnge_dev *bd, struct bnge_ring_mem_info *rmem)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = bd-&gt;pdev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!rmem-&gt;pg_arr)</div><div class='add'>+		goto skip_pages;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; rmem-&gt;nr_pages; i++) {</div><div class='add'>+		if (!rmem-&gt;pg_arr[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dma_free_coherent(&amp;pdev-&gt;dev, rmem-&gt;page_size,</div><div class='add'>+				  rmem-&gt;pg_arr[i], rmem-&gt;dma_arr[i]);</div><div class='add'>+</div><div class='add'>+		rmem-&gt;pg_arr[i] = NULL;</div><div class='add'>+	}</div><div class='add'>+skip_pages:</div><div class='add'>+	if (rmem-&gt;pg_tbl) {</div><div class='add'>+		size_t pg_tbl_size = rmem-&gt;nr_pages * 8;</div><div class='add'>+</div><div class='add'>+		if (rmem-&gt;flags &amp; BNGE_RMEM_USE_FULL_PAGE_FLAG)</div><div class='add'>+			pg_tbl_size = rmem-&gt;page_size;</div><div class='add'>+		dma_free_coherent(&amp;pdev-&gt;dev, pg_tbl_size,</div><div class='add'>+				  rmem-&gt;pg_tbl, rmem-&gt;dma_pg_tbl);</div><div class='add'>+		rmem-&gt;pg_tbl = NULL;</div><div class='add'>+	}</div><div class='add'>+	if (rmem-&gt;vmem_size &amp;&amp; *rmem-&gt;vmem) {</div><div class='add'>+		vfree(*rmem-&gt;vmem);</div><div class='add'>+		*rmem-&gt;vmem = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bnge_alloc_ring(struct bnge_dev *bd, struct bnge_ring_mem_info *rmem)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = bd-&gt;pdev;</div><div class='add'>+	u64 valid_bit = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (rmem-&gt;flags &amp; (BNGE_RMEM_VALID_PTE_FLAG | BNGE_RMEM_RING_PTE_FLAG))</div><div class='add'>+		valid_bit = PTU_PTE_VALID;</div><div class='add'>+</div><div class='add'>+	if ((rmem-&gt;nr_pages &gt; 1 || rmem-&gt;depth &gt; 0) &amp;&amp; !rmem-&gt;pg_tbl) {</div><div class='add'>+		size_t pg_tbl_size = rmem-&gt;nr_pages * 8;</div><div class='add'>+</div><div class='add'>+		if (rmem-&gt;flags &amp; BNGE_RMEM_USE_FULL_PAGE_FLAG)</div><div class='add'>+			pg_tbl_size = rmem-&gt;page_size;</div><div class='add'>+		rmem-&gt;pg_tbl = dma_alloc_coherent(&amp;pdev-&gt;dev, pg_tbl_size,</div><div class='add'>+						  &amp;rmem-&gt;dma_pg_tbl,</div><div class='add'>+						  GFP_KERNEL);</div><div class='add'>+		if (!rmem-&gt;pg_tbl)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; rmem-&gt;nr_pages; i++) {</div><div class='add'>+		u64 extra_bits = valid_bit;</div><div class='add'>+</div><div class='add'>+		rmem-&gt;pg_arr[i] = dma_alloc_coherent(&amp;pdev-&gt;dev,</div><div class='add'>+						     rmem-&gt;page_size,</div><div class='add'>+						     &amp;rmem-&gt;dma_arr[i],</div><div class='add'>+						     GFP_KERNEL);</div><div class='add'>+		if (!rmem-&gt;pg_arr[i])</div><div class='add'>+			goto err_free_ring;</div><div class='add'>+</div><div class='add'>+		if (rmem-&gt;ctx_mem)</div><div class='add'>+			bnge_init_ctx_mem(rmem-&gt;ctx_mem, rmem-&gt;pg_arr[i],</div><div class='add'>+					  rmem-&gt;page_size);</div><div class='add'>+</div><div class='add'>+		if (rmem-&gt;nr_pages &gt; 1 || rmem-&gt;depth &gt; 0) {</div><div class='add'>+			if (i == rmem-&gt;nr_pages - 2 &amp;&amp;</div><div class='add'>+			    (rmem-&gt;flags &amp; BNGE_RMEM_RING_PTE_FLAG))</div><div class='add'>+				extra_bits |= PTU_PTE_NEXT_TO_LAST;</div><div class='add'>+			else if (i == rmem-&gt;nr_pages - 1 &amp;&amp;</div><div class='add'>+				 (rmem-&gt;flags &amp; BNGE_RMEM_RING_PTE_FLAG))</div><div class='add'>+				extra_bits |= PTU_PTE_LAST;</div><div class='add'>+			rmem-&gt;pg_tbl[i] =</div><div class='add'>+				cpu_to_le64(rmem-&gt;dma_arr[i] | extra_bits);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rmem-&gt;vmem_size) {</div><div class='add'>+		*rmem-&gt;vmem = vzalloc(rmem-&gt;vmem_size);</div><div class='add'>+		if (!(*rmem-&gt;vmem))</div><div class='add'>+			goto err_free_ring;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_ring:</div><div class='add'>+	bnge_free_ring(bd, rmem);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_ctx_one_lvl(struct bnge_dev *bd,</div><div class='add'>+				  struct bnge_ctx_pg_info *ctx_pg)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_mem_info *rmem = &amp;ctx_pg-&gt;ring_mem;</div><div class='add'>+</div><div class='add'>+	rmem-&gt;page_size = BNGE_PAGE_SIZE;</div><div class='add'>+	rmem-&gt;pg_arr = ctx_pg-&gt;ctx_pg_arr;</div><div class='add'>+	rmem-&gt;dma_arr = ctx_pg-&gt;ctx_dma_arr;</div><div class='add'>+	rmem-&gt;flags = BNGE_RMEM_VALID_PTE_FLAG;</div><div class='add'>+	if (rmem-&gt;depth &gt;= 1)</div><div class='add'>+		rmem-&gt;flags |= BNGE_RMEM_USE_FULL_PAGE_FLAG;</div><div class='add'>+	return bnge_alloc_ring(bd, rmem);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_alloc_ctx_pg_tbls(struct bnge_dev *bd,</div><div class='add'>+				  struct bnge_ctx_pg_info *ctx_pg, u32 mem_size,</div><div class='add'>+				  u8 depth, struct bnge_ctx_mem_type *ctxm)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_mem_info *rmem = &amp;ctx_pg-&gt;ring_mem;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!mem_size)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ctx_pg-&gt;nr_pages = DIV_ROUND_UP(mem_size, BNGE_PAGE_SIZE);</div><div class='add'>+	if (ctx_pg-&gt;nr_pages &gt; MAX_CTX_TOTAL_PAGES) {</div><div class='add'>+		ctx_pg-&gt;nr_pages = 0;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (ctx_pg-&gt;nr_pages &gt; MAX_CTX_PAGES || depth &gt; 1) {</div><div class='add'>+		int nr_tbls, i;</div><div class='add'>+</div><div class='add'>+		rmem-&gt;depth = 2;</div><div class='add'>+		ctx_pg-&gt;ctx_pg_tbl = kcalloc(MAX_CTX_PAGES, sizeof(ctx_pg),</div><div class='add'>+					     GFP_KERNEL);</div><div class='add'>+		if (!ctx_pg-&gt;ctx_pg_tbl)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		nr_tbls = DIV_ROUND_UP(ctx_pg-&gt;nr_pages, MAX_CTX_PAGES);</div><div class='add'>+		rmem-&gt;nr_pages = nr_tbls;</div><div class='add'>+		rc = bnge_alloc_ctx_one_lvl(bd, ctx_pg);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+		for (i = 0; i &lt; nr_tbls; i++) {</div><div class='add'>+			struct bnge_ctx_pg_info *pg_tbl;</div><div class='add'>+</div><div class='add'>+			pg_tbl = kzalloc(sizeof(*pg_tbl), GFP_KERNEL);</div><div class='add'>+			if (!pg_tbl)</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+			ctx_pg-&gt;ctx_pg_tbl[i] = pg_tbl;</div><div class='add'>+			rmem = &amp;pg_tbl-&gt;ring_mem;</div><div class='add'>+			rmem-&gt;pg_tbl = ctx_pg-&gt;ctx_pg_arr[i];</div><div class='add'>+			rmem-&gt;dma_pg_tbl = ctx_pg-&gt;ctx_dma_arr[i];</div><div class='add'>+			rmem-&gt;depth = 1;</div><div class='add'>+			rmem-&gt;nr_pages = MAX_CTX_PAGES;</div><div class='add'>+			rmem-&gt;ctx_mem = ctxm;</div><div class='add'>+			if (i == (nr_tbls - 1)) {</div><div class='add'>+				int rem = ctx_pg-&gt;nr_pages % MAX_CTX_PAGES;</div><div class='add'>+</div><div class='add'>+				if (rem)</div><div class='add'>+					rmem-&gt;nr_pages = rem;</div><div class='add'>+			}</div><div class='add'>+			rc = bnge_alloc_ctx_one_lvl(bd, pg_tbl);</div><div class='add'>+			if (rc)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		rmem-&gt;nr_pages = DIV_ROUND_UP(mem_size, BNGE_PAGE_SIZE);</div><div class='add'>+		if (rmem-&gt;nr_pages &gt; 1 || depth)</div><div class='add'>+			rmem-&gt;depth = 1;</div><div class='add'>+		rmem-&gt;ctx_mem = ctxm;</div><div class='add'>+		rc = bnge_alloc_ctx_one_lvl(bd, ctx_pg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnge_free_ctx_pg_tbls(struct bnge_dev *bd,</div><div class='add'>+				  struct bnge_ctx_pg_info *ctx_pg)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ring_mem_info *rmem = &amp;ctx_pg-&gt;ring_mem;</div><div class='add'>+</div><div class='add'>+	if (rmem-&gt;depth &gt; 1 || ctx_pg-&gt;nr_pages &gt; MAX_CTX_PAGES ||</div><div class='add'>+	    ctx_pg-&gt;ctx_pg_tbl) {</div><div class='add'>+		int i, nr_tbls = rmem-&gt;nr_pages;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; nr_tbls; i++) {</div><div class='add'>+			struct bnge_ctx_pg_info *pg_tbl;</div><div class='add'>+			struct bnge_ring_mem_info *rmem2;</div><div class='add'>+</div><div class='add'>+			pg_tbl = ctx_pg-&gt;ctx_pg_tbl[i];</div><div class='add'>+			if (!pg_tbl)</div><div class='add'>+				continue;</div><div class='add'>+			rmem2 = &amp;pg_tbl-&gt;ring_mem;</div><div class='add'>+			bnge_free_ring(bd, rmem2);</div><div class='add'>+			ctx_pg-&gt;ctx_pg_arr[i] = NULL;</div><div class='add'>+			kfree(pg_tbl);</div><div class='add'>+			ctx_pg-&gt;ctx_pg_tbl[i] = NULL;</div><div class='add'>+		}</div><div class='add'>+		kfree(ctx_pg-&gt;ctx_pg_tbl);</div><div class='add'>+		ctx_pg-&gt;ctx_pg_tbl = NULL;</div><div class='add'>+	}</div><div class='add'>+	bnge_free_ring(bd, rmem);</div><div class='add'>+	ctx_pg-&gt;nr_pages = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_setup_ctxm_pg_tbls(struct bnge_dev *bd,</div><div class='add'>+				   struct bnge_ctx_mem_type *ctxm, u32 entries,</div><div class='add'>+				   u8 pg_lvl)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ctx_pg_info *ctx_pg = ctxm-&gt;pg_info;</div><div class='add'>+	int i, rc = 0, n = 1;</div><div class='add'>+	u32 mem_size;</div><div class='add'>+</div><div class='add'>+	if (!ctxm-&gt;entry_size || !ctx_pg)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (ctxm-&gt;instance_bmap)</div><div class='add'>+		n = hweight32(ctxm-&gt;instance_bmap);</div><div class='add'>+	if (ctxm-&gt;entry_multiple)</div><div class='add'>+		entries = roundup(entries, ctxm-&gt;entry_multiple);</div><div class='add'>+	entries = clamp_t(u32, entries, ctxm-&gt;min_entries, ctxm-&gt;max_entries);</div><div class='add'>+	mem_size = entries * ctxm-&gt;entry_size;</div><div class='add'>+	for (i = 0; i &lt; n &amp;&amp; !rc; i++) {</div><div class='add'>+		ctx_pg[i].entries = entries;</div><div class='add'>+		rc = bnge_alloc_ctx_pg_tbls(bd, &amp;ctx_pg[i], mem_size, pg_lvl,</div><div class='add'>+					    ctxm-&gt;init_value ? ctxm : NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnge_backing_store_cfg(struct bnge_dev *bd, u32 ena)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ctx_mem_info *ctx = bd-&gt;ctx;</div><div class='add'>+	struct bnge_ctx_mem_type *ctxm;</div><div class='add'>+	u16 last_type;</div><div class='add'>+	int rc = 0;</div><div class='add'>+	u16 type;</div><div class='add'>+</div><div class='add'>+	if (!ena)</div><div class='add'>+		return 0;</div><div class='add'>+	else if (ena &amp; FUNC_BACKING_STORE_CFG_REQ_ENABLES_TIM)</div><div class='add'>+		last_type = BNGE_CTX_MAX - 1;</div><div class='add'>+	else</div><div class='add'>+		last_type = BNGE_CTX_L2_MAX - 1;</div><div class='add'>+	ctx-&gt;ctx_arr[last_type].last = 1;</div><div class='add'>+</div><div class='add'>+	for (type = 0 ; type &lt; BNGE_CTX_V2_MAX; type++) {</div><div class='add'>+		ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='add'>+</div><div class='add'>+		rc = bnge_hwrm_func_backing_store(bd, ctxm, ctxm-&gt;last);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_free_ctx_mem(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ctx_mem_info *ctx = bd-&gt;ctx;</div><div class='add'>+	u16 type;</div><div class='add'>+</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (type = 0; type &lt; BNGE_CTX_V2_MAX; type++) {</div><div class='add'>+		struct bnge_ctx_mem_type *ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='add'>+		struct bnge_ctx_pg_info *ctx_pg = ctxm-&gt;pg_info;</div><div class='add'>+		int i, n = 1;</div><div class='add'>+</div><div class='add'>+		if (!ctx_pg)</div><div class='add'>+			continue;</div><div class='add'>+		if (ctxm-&gt;instance_bmap)</div><div class='add'>+			n = hweight32(ctxm-&gt;instance_bmap);</div><div class='add'>+		for (i = 0; i &lt; n; i++)</div><div class='add'>+			bnge_free_ctx_pg_tbls(bd, &amp;ctx_pg[i]);</div><div class='add'>+</div><div class='add'>+		kfree(ctx_pg);</div><div class='add'>+		ctxm-&gt;pg_info = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;flags &amp;= ~BNGE_CTX_FLAG_INITED;</div><div class='add'>+	kfree(ctx);</div><div class='add'>+	bd-&gt;ctx = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define FUNC_BACKING_STORE_CFG_REQ_DFLT_ENABLES			\</div><div class='add'>+	(FUNC_BACKING_STORE_CFG_REQ_ENABLES_QP |		\</div><div class='add'>+	 FUNC_BACKING_STORE_CFG_REQ_ENABLES_SRQ |		\</div><div class='add'>+	 FUNC_BACKING_STORE_CFG_REQ_ENABLES_CQ |		\</div><div class='add'>+	 FUNC_BACKING_STORE_CFG_REQ_ENABLES_VNIC |		\</div><div class='add'>+	 FUNC_BACKING_STORE_CFG_REQ_ENABLES_STAT)</div><div class='add'>+</div><div class='add'>+int bnge_alloc_ctx_mem(struct bnge_dev *bd)</div><div class='add'>+{</div><div class='add'>+	struct bnge_ctx_mem_type *ctxm;</div><div class='add'>+	struct bnge_ctx_mem_info *ctx;</div><div class='add'>+	u32 l2_qps, qp1_qps, max_qps;</div><div class='add'>+	u32 ena, entries_sp, entries;</div><div class='add'>+	u32 srqs, max_srqs, min;</div><div class='add'>+	u32 num_mr, num_ah;</div><div class='add'>+	u32 extra_srqs = 0;</div><div class='add'>+	u32 extra_qps = 0;</div><div class='add'>+	u32 fast_qpmd_qps;</div><div class='add'>+	u8 pg_lvl = 1;</div><div class='add'>+	int i, rc;</div><div class='add'>+</div><div class='add'>+	rc = bnge_hwrm_func_backing_store_qcaps(bd);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "Failed querying ctx mem caps, rc: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx = bd-&gt;ctx;</div><div class='add'>+	if (!ctx || (ctx-&gt;flags &amp; BNGE_CTX_FLAG_INITED))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_QP];</div><div class='add'>+	l2_qps = ctxm-&gt;qp_l2_entries;</div><div class='add'>+	qp1_qps = ctxm-&gt;qp_qp1_entries;</div><div class='add'>+	fast_qpmd_qps = ctxm-&gt;qp_fast_qpmd_entries;</div><div class='add'>+	max_qps = ctxm-&gt;max_entries;</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_SRQ];</div><div class='add'>+	srqs = ctxm-&gt;srq_l2_entries;</div><div class='add'>+	max_srqs = ctxm-&gt;max_entries;</div><div class='add'>+	ena = 0;</div><div class='add'>+	if (bnge_is_roce_en(bd) &amp;&amp; !is_kdump_kernel()) {</div><div class='add'>+		pg_lvl = 2;</div><div class='add'>+		extra_qps = min_t(u32, 65536, max_qps - l2_qps - qp1_qps);</div><div class='add'>+		/* allocate extra qps if fast qp destroy feature enabled */</div><div class='add'>+		extra_qps += fast_qpmd_qps;</div><div class='add'>+		extra_srqs = min_t(u32, 8192, max_srqs - srqs);</div><div class='add'>+		if (fast_qpmd_qps)</div><div class='add'>+			ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_QP_FAST_QPMD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_QP];</div><div class='add'>+	rc = bnge_setup_ctxm_pg_tbls(bd, ctxm, l2_qps + qp1_qps + extra_qps,</div><div class='add'>+				     pg_lvl);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_SRQ];</div><div class='add'>+	rc = bnge_setup_ctxm_pg_tbls(bd, ctxm, srqs + extra_srqs, pg_lvl);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_CQ];</div><div class='add'>+	rc = bnge_setup_ctxm_pg_tbls(bd, ctxm, ctxm-&gt;cq_l2_entries +</div><div class='add'>+				     extra_qps * 2, pg_lvl);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_VNIC];</div><div class='add'>+	rc = bnge_setup_ctxm_pg_tbls(bd, ctxm, ctxm-&gt;max_entries, 1);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_STAT];</div><div class='add'>+	rc = bnge_setup_ctxm_pg_tbls(bd, ctxm, ctxm-&gt;max_entries, 1);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (!bnge_is_roce_en(bd))</div><div class='add'>+		goto skip_rdma;</div><div class='add'>+</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_MRAV];</div><div class='add'>+	/* 128K extra is needed to accommodate static AH context</div><div class='add'>+	 * allocation by f/w.</div><div class='add'>+	 */</div><div class='add'>+	num_mr = min_t(u32, ctxm-&gt;max_entries / 2, 1024 * 256);</div><div class='add'>+	num_ah = min_t(u32, num_mr, 1024 * 128);</div><div class='add'>+	ctxm-&gt;split_entry_cnt = BNGE_CTX_MRAV_AV_SPLIT_ENTRY + 1;</div><div class='add'>+	if (!ctxm-&gt;mrav_av_entries || ctxm-&gt;mrav_av_entries &gt; num_ah)</div><div class='add'>+		ctxm-&gt;mrav_av_entries = num_ah;</div><div class='add'>+</div><div class='add'>+	rc = bnge_setup_ctxm_pg_tbls(bd, ctxm, num_mr + num_ah, 2);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_MRAV;</div><div class='add'>+</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_TIM];</div><div class='add'>+	rc = bnge_setup_ctxm_pg_tbls(bd, ctxm, l2_qps + qp1_qps + extra_qps, 1);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_TIM;</div><div class='add'>+</div><div class='add'>+skip_rdma:</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_STQM];</div><div class='add'>+	min = ctxm-&gt;min_entries;</div><div class='add'>+	entries_sp = ctx-&gt;ctx_arr[BNGE_CTX_VNIC].vnic_entries + l2_qps +</div><div class='add'>+		     2 * (extra_qps + qp1_qps) + min;</div><div class='add'>+	rc = bnge_setup_ctxm_pg_tbls(bd, ctxm, entries_sp, 2);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ctxm = &amp;ctx-&gt;ctx_arr[BNGE_CTX_FTQM];</div><div class='add'>+	entries = l2_qps + 2 * (extra_qps + qp1_qps);</div><div class='add'>+	rc = bnge_setup_ctxm_pg_tbls(bd, ctxm, entries, 2);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	for (i = 0; i &lt; ctx-&gt;tqm_fp_rings_count + 1; i++)</div><div class='add'>+		ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_SP &lt;&lt; i;</div><div class='add'>+	ena |= FUNC_BACKING_STORE_CFG_REQ_DFLT_ENABLES;</div><div class='add'>+</div><div class='add'>+	rc = bnge_backing_store_cfg(bd, ena);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(bd-&gt;dev, "Failed configuring ctx mem, rc: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+	ctx-&gt;flags |= BNGE_CTX_FLAG_INITED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnge_init_ring_struct(struct bnge_net *bn)</div><div class='add'>+{</div><div class='add'>+	struct bnge_dev *bd = bn-&gt;bd;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bd-&gt;nq_nr_rings; i++) {</div><div class='add'>+		struct bnge_napi *bnapi = bn-&gt;bnapi[i];</div><div class='add'>+		struct bnge_ring_mem_info *rmem;</div><div class='add'>+		struct bnge_nq_ring_info *nqr;</div><div class='add'>+		struct bnge_rx_ring_info *rxr;</div><div class='add'>+		struct bnge_tx_ring_info *txr;</div><div class='add'>+		struct bnge_ring_struct *ring;</div><div class='add'>+</div><div class='add'>+		nqr = &amp;bnapi-&gt;nq_ring;</div><div class='add'>+		ring = &amp;nqr-&gt;ring_struct;</div><div class='add'>+		rmem = &amp;ring-&gt;ring_mem;</div><div class='add'>+		rmem-&gt;nr_pages = bn-&gt;cp_nr_pages;</div><div class='add'>+		rmem-&gt;page_size = HW_CMPD_RING_SIZE;</div><div class='add'>+		rmem-&gt;pg_arr = (void **)nqr-&gt;desc_ring;</div><div class='add'>+		rmem-&gt;dma_arr = nqr-&gt;desc_mapping;</div><div class='add'>+		rmem-&gt;vmem_size = 0;</div><div class='add'>+</div><div class='add'>+		rxr = bnapi-&gt;rx_ring;</div><div class='add'>+		if (!rxr)</div><div class='add'>+			goto skip_rx;</div><div class='add'>+</div><div class='add'>+		ring = &amp;rxr-&gt;rx_ring_struct;</div><div class='add'>+		rmem = &amp;ring-&gt;ring_mem;</div><div class='add'>+		rmem-&gt;nr_pages = bn-&gt;rx_nr_pages;</div><div class='add'>+		rmem-&gt;page_size = HW_RXBD_RING_SIZE;</div><div class='add'>+		rmem-&gt;pg_arr = (void **)rxr-&gt;rx_desc_ring;</div><div class='add'>+		rmem-&gt;dma_arr = rxr-&gt;rx_desc_mapping;</div><div class='add'>+		rmem-&gt;vmem_size = SW_RXBD_RING_SIZE * bn-&gt;rx_nr_pages;</div><div class='add'>+		rmem-&gt;vmem = (void **)&amp;rxr-&gt;rx_buf_ring;</div><div class='add'>+</div><div class='add'>+		ring = &amp;rxr-&gt;rx_agg_ring_struct;</div><div class='add'>+		rmem = &amp;ring-&gt;ring_mem;</div><div class='add'>+		rmem-&gt;nr_pages = bn-&gt;rx_agg_nr_pages;</div><div class='add'>+		rmem-&gt;page_size = HW_RXBD_RING_SIZE;</div><div class='add'>+		rmem-&gt;pg_arr = (void **)rxr-&gt;rx_agg_desc_ring;</div><div class='add'>+		rmem-&gt;dma_arr = rxr-&gt;rx_agg_desc_mapping;</div><div class='add'>+		rmem-&gt;vmem_size = SW_RXBD_AGG_RING_SIZE * bn-&gt;rx_agg_nr_pages;</div><div class='add'>+		rmem-&gt;vmem = (void **)&amp;rxr-&gt;rx_agg_buf_ring;</div><div class='add'>+</div><div class='add'>+skip_rx:</div><div class='add'>+		bnge_for_each_napi_tx(j, bnapi, txr) {</div><div class='add'>+			ring = &amp;txr-&gt;tx_ring_struct;</div><div class='add'>+			rmem = &amp;ring-&gt;ring_mem;</div><div class='add'>+			rmem-&gt;nr_pages = bn-&gt;tx_nr_pages;</div><div class='add'>+			rmem-&gt;page_size = HW_TXBD_RING_SIZE;</div><div class='add'>+			rmem-&gt;pg_arr = (void **)txr-&gt;tx_desc_ring;</div><div class='add'>+			rmem-&gt;dma_arr = txr-&gt;tx_desc_mapping;</div><div class='add'>+			rmem-&gt;vmem_size = SW_TXBD_RING_SIZE * bn-&gt;tx_nr_pages;</div><div class='add'>+			rmem-&gt;vmem = (void **)&amp;txr-&gt;tx_buf_ring;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h b/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h<br/>new file mode 100644<br/>index 000000000000..341c7f81ed09<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnge/bnge_rmem.h</a></div><div class='hunk'>@@ -0,0 +1,202 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025 Broadcom */</div><div class='add'>+</div><div class='add'>+#ifndef _BNGE_RMEM_H_</div><div class='add'>+#define _BNGE_RMEM_H_</div><div class='add'>+</div><div class='add'>+struct bnge_ctx_mem_type;</div><div class='add'>+struct bnge_dev;</div><div class='add'>+struct bnge_net;</div><div class='add'>+</div><div class='add'>+#define PTU_PTE_VALID             0x1UL</div><div class='add'>+#define PTU_PTE_LAST              0x2UL</div><div class='add'>+#define PTU_PTE_NEXT_TO_LAST      0x4UL</div><div class='add'>+</div><div class='add'>+struct bnge_ring_mem_info {</div><div class='add'>+	/* Number of pages to next level */</div><div class='add'>+	int			nr_pages;</div><div class='add'>+	int			page_size;</div><div class='add'>+	u16			flags;</div><div class='add'>+#define BNGE_RMEM_VALID_PTE_FLAG	1</div><div class='add'>+#define BNGE_RMEM_RING_PTE_FLAG		2</div><div class='add'>+#define BNGE_RMEM_USE_FULL_PAGE_FLAG	4</div><div class='add'>+</div><div class='add'>+	u16			depth;</div><div class='add'>+</div><div class='add'>+	void			**pg_arr;</div><div class='add'>+	dma_addr_t		*dma_arr;</div><div class='add'>+</div><div class='add'>+	__le64			*pg_tbl;</div><div class='add'>+	dma_addr_t		dma_pg_tbl;</div><div class='add'>+</div><div class='add'>+	int			vmem_size;</div><div class='add'>+	void			**vmem;</div><div class='add'>+</div><div class='add'>+	struct bnge_ctx_mem_type	*ctx_mem;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The hardware supports certain page sizes.</div><div class='add'>+ * Use the supported page sizes to allocate the rings.</div><div class='add'>+ */</div><div class='add'>+#if (PAGE_SHIFT &lt; 12)</div><div class='add'>+#define BNGE_PAGE_SHIFT	12</div><div class='add'>+#elif (PAGE_SHIFT &lt;= 13)</div><div class='add'>+#define BNGE_PAGE_SHIFT	PAGE_SHIFT</div><div class='add'>+#elif (PAGE_SHIFT &lt; 16)</div><div class='add'>+#define BNGE_PAGE_SHIFT	13</div><div class='add'>+#else</div><div class='add'>+#define BNGE_PAGE_SHIFT	16</div><div class='add'>+#endif</div><div class='add'>+#define BNGE_PAGE_SIZE	(1 &lt;&lt; BNGE_PAGE_SHIFT)</div><div class='add'>+/* The RXBD length is 16-bit so we can only support page sizes &lt; 64K */</div><div class='add'>+#if (PAGE_SHIFT &gt; 15)</div><div class='add'>+#define BNGE_RX_PAGE_SHIFT 15</div><div class='add'>+#else</div><div class='add'>+#define BNGE_RX_PAGE_SHIFT PAGE_SHIFT</div><div class='add'>+#endif</div><div class='add'>+#define MAX_CTX_PAGES	(BNGE_PAGE_SIZE / 8)</div><div class='add'>+#define MAX_CTX_TOTAL_PAGES	(MAX_CTX_PAGES * MAX_CTX_PAGES)</div><div class='add'>+</div><div class='add'>+struct bnge_ctx_pg_info {</div><div class='add'>+	u32		entries;</div><div class='add'>+	u32		nr_pages;</div><div class='add'>+	void		*ctx_pg_arr[MAX_CTX_PAGES];</div><div class='add'>+	dma_addr_t	ctx_dma_arr[MAX_CTX_PAGES];</div><div class='add'>+	struct bnge_ring_mem_info ring_mem;</div><div class='add'>+	struct bnge_ctx_pg_info **ctx_pg_tbl;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNGE_MAX_TQM_SP_RINGS		1</div><div class='add'>+#define BNGE_MAX_TQM_FP_RINGS		8</div><div class='add'>+#define BNGE_MAX_TQM_RINGS		\</div><div class='add'>+	(BNGE_MAX_TQM_SP_RINGS + BNGE_MAX_TQM_FP_RINGS)</div><div class='add'>+#define BNGE_BACKING_STORE_CFG_LEGACY_LEN	256</div><div class='add'>+#define BNGE_SET_CTX_PAGE_ATTR(attr)					\</div><div class='add'>+do {									\</div><div class='add'>+	if (BNGE_PAGE_SIZE == 0x2000)					\</div><div class='add'>+		attr = FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_PG_8K;	\</div><div class='add'>+	else if (BNGE_PAGE_SIZE == 0x10000)				\</div><div class='add'>+		attr = FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_64K;	\</div><div class='add'>+	else								\</div><div class='add'>+		attr = FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_4K;	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define BNGE_CTX_MRAV_AV_SPLIT_ENTRY	0</div><div class='add'>+</div><div class='add'>+#define BNGE_CTX_QP	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_QP</div><div class='add'>+#define BNGE_CTX_SRQ	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRQ</div><div class='add'>+#define BNGE_CTX_CQ	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CQ</div><div class='add'>+#define BNGE_CTX_VNIC	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_VNIC</div><div class='add'>+#define BNGE_CTX_STAT	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_STAT</div><div class='add'>+#define BNGE_CTX_STQM	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SP_TQM_RING</div><div class='add'>+#define BNGE_CTX_FTQM	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_FP_TQM_RING</div><div class='add'>+#define BNGE_CTX_MRAV	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_MRAV</div><div class='add'>+#define BNGE_CTX_TIM	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_TIM</div><div class='add'>+#define BNGE_CTX_TCK	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_TX_CK</div><div class='add'>+#define BNGE_CTX_RCK	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RX_CK</div><div class='add'>+#define BNGE_CTX_MTQM	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_MP_TQM_RING</div><div class='add'>+#define BNGE_CTX_SQDBS	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SQ_DB_SHADOW</div><div class='add'>+#define BNGE_CTX_RQDBS	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RQ_DB_SHADOW</div><div class='add'>+#define BNGE_CTX_SRQDBS	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRQ_DB_SHADOW</div><div class='add'>+#define BNGE_CTX_CQDBS	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CQ_DB_SHADOW</div><div class='add'>+#define BNGE_CTX_SRT_TRACE	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRT_TRACE</div><div class='add'>+#define BNGE_CTX_SRT2_TRACE	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRT2_TRACE</div><div class='add'>+#define BNGE_CTX_CRT_TRACE	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CRT_TRACE</div><div class='add'>+#define BNGE_CTX_CRT2_TRACE	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CRT2_TRACE</div><div class='add'>+#define BNGE_CTX_RIGP0_TRACE	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RIGP0_TRACE</div><div class='add'>+#define BNGE_CTX_L2_HWRM_TRACE	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_L2_HWRM_TRACE</div><div class='add'>+#define BNGE_CTX_ROCE_HWRM_TRACE	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_ROCE_HWRM_TRACE</div><div class='add'>+</div><div class='add'>+#define BNGE_CTX_MAX		(BNGE_CTX_TIM + 1)</div><div class='add'>+#define BNGE_CTX_L2_MAX		(BNGE_CTX_FTQM + 1)</div><div class='add'>+#define BNGE_CTX_INV		((u16)-1)</div><div class='add'>+</div><div class='add'>+#define BNGE_CTX_V2_MAX	\</div><div class='add'>+	(FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_ROCE_HWRM_TRACE + 1)</div><div class='add'>+</div><div class='add'>+#define BNGE_BS_CFG_ALL_DONE	\</div><div class='add'>+	FUNC_BACKING_STORE_CFG_V2_REQ_FLAGS_BS_CFG_ALL_DONE</div><div class='add'>+</div><div class='add'>+struct bnge_ctx_mem_type {</div><div class='add'>+	u16	type;</div><div class='add'>+	u16	entry_size;</div><div class='add'>+	u32	flags;</div><div class='add'>+#define BNGE_CTX_MEM_TYPE_VALID	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_TYPE_VALID</div><div class='add'>+	u32	instance_bmap;</div><div class='add'>+	u8	init_value;</div><div class='add'>+	u8	entry_multiple;</div><div class='add'>+	u16	init_offset;</div><div class='add'>+#define	BNGE_CTX_INIT_INVALID_OFFSET	0xffff</div><div class='add'>+	u32	max_entries;</div><div class='add'>+	u32	min_entries;</div><div class='add'>+	u8	last:1;</div><div class='add'>+	u8	split_entry_cnt;</div><div class='add'>+#define BNGE_MAX_SPLIT_ENTRY	4</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u32	qp_l2_entries;</div><div class='add'>+			u32	qp_qp1_entries;</div><div class='add'>+			u32	qp_fast_qpmd_entries;</div><div class='add'>+		};</div><div class='add'>+		u32	srq_l2_entries;</div><div class='add'>+		u32	cq_l2_entries;</div><div class='add'>+		u32	vnic_entries;</div><div class='add'>+		struct {</div><div class='add'>+			u32	mrav_av_entries;</div><div class='add'>+			u32	mrav_num_entries_units;</div><div class='add'>+		};</div><div class='add'>+		u32	split[BNGE_MAX_SPLIT_ENTRY];</div><div class='add'>+	};</div><div class='add'>+	struct bnge_ctx_pg_info	*pg_info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_ctx_mem_info {</div><div class='add'>+	u8	tqm_fp_rings_count;</div><div class='add'>+	u32	flags;</div><div class='add'>+#define BNGE_CTX_FLAG_INITED	0x01</div><div class='add'>+	struct bnge_ctx_mem_type	ctx_arr[BNGE_CTX_V2_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bnge_ring_struct {</div><div class='add'>+	struct bnge_ring_mem_info	ring_mem;</div><div class='add'>+</div><div class='add'>+	u16			fw_ring_id;</div><div class='add'>+	union {</div><div class='add'>+		u16		grp_idx;</div><div class='add'>+		u16		map_idx; /* Used by NQs */</div><div class='add'>+	};</div><div class='add'>+	u32			handle;</div><div class='add'>+	u8			queue_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int bnge_alloc_ring(struct bnge_dev *bd, struct bnge_ring_mem_info *rmem);</div><div class='add'>+void bnge_free_ring(struct bnge_dev *bd, struct bnge_ring_mem_info *rmem);</div><div class='add'>+int bnge_alloc_ctx_mem(struct bnge_dev *bd);</div><div class='add'>+void bnge_free_ctx_mem(struct bnge_dev *bd);</div><div class='add'>+void bnge_init_ring_struct(struct bnge_net *bn);</div><div class='add'>+</div><div class='add'>+#endif /* _BNGE_RMEM_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2.c b/drivers/net/ethernet/broadcom/bnx2.c<br/>index 6ec773e61182..805daae9dd36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnx2.c</a></div><div class='hunk'>@@ -6163,7 +6163,7 @@ bnx2_5708_serdes_timer(struct bnx2 *bp)</div><div class='ctx'> static void</div><div class='ctx'> bnx2_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bnx2 *bp = from_timer(bp, t, timer);</div><div class='add'>+	struct bnx2 *bp = timer_container_of(bp, t, timer);</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(bp-&gt;dev))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -6400,7 +6400,7 @@ bnx2_open(struct net_device *dev)</div><div class='ctx'> 				rc = bnx2_request_irq(bp);</div><div class='ctx'> </div><div class='ctx'> 			if (rc) {</div><div class='del'>-				del_timer_sync(&amp;bp-&gt;timer);</div><div class='add'>+				timer_delete_sync(&amp;bp-&gt;timer);</div><div class='ctx'> 				goto open_err;</div><div class='ctx'> 			}</div><div class='ctx'> 			bnx2_enable_int(bp);</div><div class='hunk'>@@ -6444,7 +6444,6 @@ bnx2_reset_task(struct work_struct *work)</div><div class='ctx'> 	if (!(pcicmd &amp; PCI_COMMAND_MEMORY)) {</div><div class='ctx'> 		/* in case PCI block has reset */</div><div class='ctx'> 		pci_restore_state(bp-&gt;pdev);</div><div class='del'>-		pci_save_state(bp-&gt;pdev);</div><div class='ctx'> 	}</div><div class='ctx'> 	rc = bnx2_init_nic(bp, 1);</div><div class='ctx'> 	if (rc) {</div><div class='hunk'>@@ -6752,7 +6751,7 @@ bnx2_close(struct net_device *dev)</div><div class='ctx'> 	bnx2_disable_int_sync(bp);</div><div class='ctx'> 	bnx2_napi_disable(bp);</div><div class='ctx'> 	netif_tx_disable(dev);</div><div class='del'>-	del_timer_sync(&amp;bp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;bp-&gt;timer);</div><div class='ctx'> 	bnx2_shutdown_chip(bp);</div><div class='ctx'> 	bnx2_free_irq(bp);</div><div class='ctx'> 	bnx2_free_skbs(bp);</div><div class='hunk'>@@ -8602,7 +8601,7 @@ bnx2_remove_one(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;bp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;bp-&gt;timer);</div><div class='ctx'> 	cancel_work_sync(&amp;bp-&gt;reset_task);</div><div class='ctx'> </div><div class='ctx'> 	pci_iounmap(bp-&gt;pdev, bp-&gt;regview);</div><div class='hunk'>@@ -8629,7 +8628,7 @@ bnx2_suspend(struct device *device)</div><div class='ctx'> 		cancel_work_sync(&amp;bp-&gt;reset_task);</div><div class='ctx'> 		bnx2_netif_stop(bp, true);</div><div class='ctx'> 		netif_device_detach(dev);</div><div class='del'>-		del_timer_sync(&amp;bp-&gt;timer);</div><div class='add'>+		timer_delete_sync(&amp;bp-&gt;timer);</div><div class='ctx'> 		bnx2_shutdown_chip(bp);</div><div class='ctx'> 		__bnx2_free_irq(bp);</div><div class='ctx'> 		bnx2_free_skbs(bp);</div><div class='hunk'>@@ -8687,7 +8686,7 @@ static pci_ers_result_t bnx2_io_error_detected(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		bnx2_netif_stop(bp, true);</div><div class='del'>-		del_timer_sync(&amp;bp-&gt;timer);</div><div class='add'>+		timer_delete_sync(&amp;bp-&gt;timer);</div><div class='ctx'> 		bnx2_reset_nic(bp, BNX2_DRV_MSG_CODE_RESET);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -8718,7 +8717,6 @@ static pci_ers_result_t bnx2_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pci_set_master(pdev);</div><div class='ctx'> 		pci_restore_state(pdev);</div><div class='del'>-		pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 		if (netif_running(dev))</div><div class='ctx'> 			err = bnx2_init_nic(bp, 1);</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c<br/>index a8e07e51418f..e59530357e2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c</a></div><div class='hunk'>@@ -3059,7 +3059,7 @@ int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode, bool keep_link)</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;rx_mode = BNX2X_RX_MODE_NONE;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;bp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;bp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_PF(bp) &amp;&amp; !BP_NOMCP(bp)) {</div><div class='ctx'> 		/* Set ALWAYS_ALIVE bit in shmem */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c<br/>index 17ae6df90723..9af81630c8a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c</a></div><div class='hunk'>@@ -344,7 +344,7 @@ static void  bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* maps unmapped priorities to to the same COS as L2 */</div><div class='add'>+/* maps unmapped priorities to the same COS as L2 */</div><div class='ctx'> static void bnx2x_dcbx_map_nw(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c<br/>index adf7b6b94941..3d853eeb976f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c</a></div><div class='hunk'>@@ -39,34 +39,34 @@ static const struct {</div><div class='ctx'> 	int size;</div><div class='ctx'> 	char string[ETH_GSTRING_LEN];</div><div class='ctx'> } bnx2x_q_stats_arr[] = {</div><div class='del'>-/* 1 */	{ Q_STATS_OFFSET32(total_bytes_received_hi), 8, "[%s]: rx_bytes" },</div><div class='add'>+/* 1 */	{ Q_STATS_OFFSET32(total_bytes_received_hi), 8, "[%d]: rx_bytes" },</div><div class='ctx'> 	{ Q_STATS_OFFSET32(total_unicast_packets_received_hi),</div><div class='del'>-						8, "[%s]: rx_ucast_packets" },</div><div class='add'>+						8, "[%d]: rx_ucast_packets" },</div><div class='ctx'> 	{ Q_STATS_OFFSET32(total_multicast_packets_received_hi),</div><div class='del'>-						8, "[%s]: rx_mcast_packets" },</div><div class='add'>+						8, "[%d]: rx_mcast_packets" },</div><div class='ctx'> 	{ Q_STATS_OFFSET32(total_broadcast_packets_received_hi),</div><div class='del'>-						8, "[%s]: rx_bcast_packets" },</div><div class='del'>-	{ Q_STATS_OFFSET32(no_buff_discard_hi),	8, "[%s]: rx_discards" },</div><div class='add'>+						8, "[%d]: rx_bcast_packets" },</div><div class='add'>+	{ Q_STATS_OFFSET32(no_buff_discard_hi),	8, "[%d]: rx_discards" },</div><div class='ctx'> 	{ Q_STATS_OFFSET32(rx_err_discard_pkt),</div><div class='del'>-					 4, "[%s]: rx_phy_ip_err_discards"},</div><div class='add'>+					 4, "[%d]: rx_phy_ip_err_discards"},</div><div class='ctx'> 	{ Q_STATS_OFFSET32(rx_skb_alloc_failed),</div><div class='del'>-					 4, "[%s]: rx_skb_alloc_discard" },</div><div class='del'>-	{ Q_STATS_OFFSET32(hw_csum_err), 4, "[%s]: rx_csum_offload_errors" },</div><div class='del'>-	{ Q_STATS_OFFSET32(driver_xoff), 4, "[%s]: tx_exhaustion_events" },</div><div class='del'>-	{ Q_STATS_OFFSET32(total_bytes_transmitted_hi),	8, "[%s]: tx_bytes" },</div><div class='add'>+					 4, "[%d]: rx_skb_alloc_discard" },</div><div class='add'>+	{ Q_STATS_OFFSET32(hw_csum_err), 4, "[%d]: rx_csum_offload_errors" },</div><div class='add'>+	{ Q_STATS_OFFSET32(driver_xoff), 4, "[%d]: tx_exhaustion_events" },</div><div class='add'>+	{ Q_STATS_OFFSET32(total_bytes_transmitted_hi),	8, "[%d]: tx_bytes" },</div><div class='ctx'> /* 10 */{ Q_STATS_OFFSET32(total_unicast_packets_transmitted_hi),</div><div class='del'>-						8, "[%s]: tx_ucast_packets" },</div><div class='add'>+						8, "[%d]: tx_ucast_packets" },</div><div class='ctx'> 	{ Q_STATS_OFFSET32(total_multicast_packets_transmitted_hi),</div><div class='del'>-						8, "[%s]: tx_mcast_packets" },</div><div class='add'>+						8, "[%d]: tx_mcast_packets" },</div><div class='ctx'> 	{ Q_STATS_OFFSET32(total_broadcast_packets_transmitted_hi),</div><div class='del'>-						8, "[%s]: tx_bcast_packets" },</div><div class='add'>+						8, "[%d]: tx_bcast_packets" },</div><div class='ctx'> 	{ Q_STATS_OFFSET32(total_tpa_aggregations_hi),</div><div class='del'>-						8, "[%s]: tpa_aggregations" },</div><div class='add'>+						8, "[%d]: tpa_aggregations" },</div><div class='ctx'> 	{ Q_STATS_OFFSET32(total_tpa_aggregated_frames_hi),</div><div class='del'>-					8, "[%s]: tpa_aggregated_frames"},</div><div class='del'>-	{ Q_STATS_OFFSET32(total_tpa_bytes_hi),	8, "[%s]: tpa_bytes"},</div><div class='add'>+					8, "[%d]: tpa_aggregated_frames"},</div><div class='add'>+	{ Q_STATS_OFFSET32(total_tpa_bytes_hi),	8, "[%d]: tpa_bytes"},</div><div class='ctx'> 	{ Q_STATS_OFFSET32(driver_filtered_tx_pkt),</div><div class='del'>-					4, "[%s]: driver_filtered_tx_pkt" }</div><div class='add'>+					4, "[%d]: driver_filtered_tx_pkt" }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define BNX2X_NUM_Q_STATS ARRAY_SIZE(bnx2x_q_stats_arr)</div><div class='hunk'>@@ -1243,9 +1243,9 @@ static int bnx2x_get_eeprom_len(struct net_device *dev)</div><div class='ctx'>  * pf B succeeds in taking the same lock since they are from the same port.</div><div class='ctx'>  * pf A takes the per pf misc lock. Performs eeprom access.</div><div class='ctx'>  * pf A finishes. Unlocks the per pf misc lock.</div><div class='del'>- * Pf B takes the lock and proceeds to perform it's own access.</div><div class='add'>+ * Pf B takes the lock and proceeds to perform its own access.</div><div class='ctx'>  * pf A unlocks the per port lock, while pf B is still working (!).</div><div class='del'>- * mcp takes the per port lock and corrupts pf B's access (and/or has it's own</div><div class='add'>+ * mcp takes the per port lock and corrupts pf B's access (and/or has its own</div><div class='ctx'>  * access corrupted by pf B)</div><div class='ctx'>  */</div><div class='ctx'> static int bnx2x_acquire_nvram_lock(struct bnx2x *bp)</div><div class='hunk'>@@ -3184,49 +3184,43 @@ static u32 bnx2x_get_private_flags(struct net_device *dev)</div><div class='ctx'> static void bnx2x_get_strings(struct net_device *dev, u32 stringset, u8 *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x *bp = netdev_priv(dev);</div><div class='del'>-	int i, j, k, start;</div><div class='del'>-	char queue_name[MAX_QUEUE_NAME_LEN+1];</div><div class='add'>+	const char *str;</div><div class='add'>+	int i, j, start;</div><div class='ctx'> </div><div class='ctx'> 	switch (stringset) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='del'>-		k = 0;</div><div class='ctx'> 		if (is_multi(bp)) {</div><div class='ctx'> 			for_each_eth_queue(bp, i) {</div><div class='del'>-				memset(queue_name, 0, sizeof(queue_name));</div><div class='del'>-				snprintf(queue_name, sizeof(queue_name),</div><div class='del'>-					 "%d", i);</div><div class='del'>-				for (j = 0; j &lt; BNX2X_NUM_Q_STATS; j++)</div><div class='del'>-					snprintf(buf + (k + j)*ETH_GSTRING_LEN,</div><div class='del'>-						ETH_GSTRING_LEN,</div><div class='del'>-						bnx2x_q_stats_arr[j].string,</div><div class='del'>-						queue_name);</div><div class='del'>-				k += BNX2X_NUM_Q_STATS;</div><div class='add'>+				for (j = 0; j &lt; BNX2X_NUM_Q_STATS; j++) {</div><div class='add'>+					str = bnx2x_q_stats_arr[j].string;</div><div class='add'>+					ethtool_sprintf(&amp;buf, str, i);</div><div class='add'>+				}</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		for (i = 0, j = 0; i &lt; BNX2X_NUM_STATS; i++) {</div><div class='add'>+		for (i = 0; i &lt; BNX2X_NUM_STATS; i++) {</div><div class='ctx'> 			if (HIDE_PORT_STAT(bp) &amp;&amp; IS_PORT_STAT(i))</div><div class='ctx'> 				continue;</div><div class='del'>-			strcpy(buf + (k + j)*ETH_GSTRING_LEN,</div><div class='del'>-				   bnx2x_stats_arr[i].string);</div><div class='del'>-			j++;</div><div class='add'>+			ethtool_puts(&amp;buf, bnx2x_stats_arr[i].string);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case ETH_SS_TEST:</div><div class='add'>+		if (IS_VF(bp))</div><div class='add'>+			break;</div><div class='ctx'> 		/* First 4 tests cannot be done in MF mode */</div><div class='ctx'> 		if (!IS_MF(bp))</div><div class='ctx'> 			start = 0;</div><div class='ctx'> 		else</div><div class='ctx'> 			start = 4;</div><div class='del'>-		memcpy(buf, bnx2x_tests_str_arr + start,</div><div class='del'>-		       ETH_GSTRING_LEN * BNX2X_NUM_TESTS(bp));</div><div class='add'>+		for (i = start; i &lt; BNX2X_NUM_TESTS_SF; i++)</div><div class='add'>+			ethtool_puts(&amp;buf, bnx2x_tests_str_arr[i]);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case ETH_SS_PRIV_FLAGS:</div><div class='del'>-		memcpy(buf, bnx2x_private_arr,</div><div class='del'>-		       ETH_GSTRING_LEN * BNX2X_PRI_FLAG_LEN);</div><div class='add'>+		for (i = 0; i &lt; BNX2X_PRI_FLAG_LEN; i++)</div><div class='add'>+			ethtool_puts(&amp;buf, bnx2x_private_arr[i]);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -3324,8 +3318,11 @@ static int bnx2x_set_phys_id(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bnx2x_get_rss_flags(struct bnx2x *bp, struct ethtool_rxnfc *info)</div><div class='add'>+static int bnx2x_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 struct ethtool_rxfh_fields *info)</div><div class='ctx'> {</div><div class='add'>+	struct bnx2x *bp = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	switch (info-&gt;flow_type) {</div><div class='ctx'> 	case TCP_V4_FLOW:</div><div class='ctx'> 	case TCP_V6_FLOW:</div><div class='hunk'>@@ -3358,29 +3355,22 @@ static int bnx2x_get_rss_flags(struct bnx2x *bp, struct ethtool_rxnfc *info)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bnx2x_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='del'>-			   u32 *rules __always_unused)</div><div class='add'>+static u32 bnx2x_get_rx_ring_count(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		info-&gt;data = BNX2X_NUM_ETH_QUEUES(bp);</div><div class='del'>-		return 0;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		return bnx2x_get_rss_flags(bp, info);</div><div class='del'>-	default:</div><div class='del'>-		DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n");</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	return BNX2X_NUM_ETH_QUEUES(bp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bnx2x_set_rss_flags(struct bnx2x *bp, struct ethtool_rxnfc *info)</div><div class='add'>+static int bnx2x_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 const struct ethtool_rxfh_fields *info,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct bnx2x *bp = netdev_priv(dev);</div><div class='ctx'> 	int udp_rss_requested;</div><div class='ctx'> </div><div class='ctx'> 	DP(BNX2X_MSG_ETHTOOL,</div><div class='del'>-	   "Set rss flags command parameters: flow type = %d, data = %llu\n",</div><div class='add'>+	   "Set rss flags command parameters: flow type = %d, data = %u\n",</div><div class='ctx'> 	   info-&gt;flow_type, info-&gt;data);</div><div class='ctx'> </div><div class='ctx'> 	switch (info-&gt;flow_type) {</div><div class='hunk'>@@ -3466,19 +3456,6 @@ static int bnx2x_set_rss_flags(struct bnx2x *bp, struct ethtool_rxnfc *info)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bnx2x_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)</div><div class='del'>-{</div><div class='del'>-	struct bnx2x *bp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		return bnx2x_set_rss_flags(bp, info);</div><div class='del'>-	default:</div><div class='del'>-		DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n");</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u32 bnx2x_get_rxfh_indir_size(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return T_ETH_INDIRECTION_TABLE_SIZE;</div><div class='hunk'>@@ -3689,11 +3666,12 @@ static const struct ethtool_ops bnx2x_ethtool_ops = {</div><div class='ctx'> 	.get_strings		= bnx2x_get_strings,</div><div class='ctx'> 	.set_phys_id		= bnx2x_set_phys_id,</div><div class='ctx'> 	.get_ethtool_stats	= bnx2x_get_ethtool_stats,</div><div class='del'>-	.get_rxnfc		= bnx2x_get_rxnfc,</div><div class='del'>-	.set_rxnfc		= bnx2x_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= bnx2x_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_indir_size	= bnx2x_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= bnx2x_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= bnx2x_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= bnx2x_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= bnx2x_set_rxfh_fields,</div><div class='ctx'> 	.get_channels		= bnx2x_get_channels,</div><div class='ctx'> 	.set_channels		= bnx2x_set_channels,</div><div class='ctx'> 	.get_module_info	= bnx2x_get_module_info,</div><div class='hunk'>@@ -3716,11 +3694,12 @@ static const struct ethtool_ops bnx2x_vf_ethtool_ops = {</div><div class='ctx'> 	.get_sset_count		= bnx2x_get_sset_count,</div><div class='ctx'> 	.get_strings		= bnx2x_get_strings,</div><div class='ctx'> 	.get_ethtool_stats	= bnx2x_get_ethtool_stats,</div><div class='del'>-	.get_rxnfc		= bnx2x_get_rxnfc,</div><div class='del'>-	.set_rxnfc		= bnx2x_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= bnx2x_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_indir_size	= bnx2x_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= bnx2x_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= bnx2x_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= bnx2x_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= bnx2x_set_rxfh_fields,</div><div class='ctx'> 	.get_channels		= bnx2x_get_channels,</div><div class='ctx'> 	.set_channels		= bnx2x_set_channels,</div><div class='ctx'> 	.get_link_ksettings	= bnx2x_get_vf_link_ksettings,</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h<br/>index a84d015da5df..9221942290a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h</a></div><div class='hunk'>@@ -332,7 +332,7 @@</div><div class='ctx'> #define TOE_STATE (TOE_CONNECTION_TYPE &lt;&lt; PROTOCOL_STATE_BIT_OFFSET)</div><div class='ctx'> #define RDMA_STATE (RDMA_CONNECTION_TYPE &lt;&lt; PROTOCOL_STATE_BIT_OFFSET)</div><div class='ctx'> </div><div class='del'>-/* microcode fixed page page size 4K (chains and ring segments) */</div><div class='add'>+/* microcode fixed page size 4K (chains and ring segments) */</div><div class='ctx'> #define MC_PAGE_SIZE 4096</div><div class='ctx'> </div><div class='ctx'> /* Number of indices per slow-path SB */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c<br/>index 678829646cec..6a1cc2032bf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c</a></div><div class='hunk'>@@ -308,8 +308,11 @@ static int bnx2x_set_storm_rx_mode(struct bnx2x *bp);</div><div class='ctx'> /****************************************************************************</div><div class='ctx'> * General service functions</div><div class='ctx'> ****************************************************************************/</div><div class='del'>-</div><div class='del'>-static int bnx2x_hwtstamp_ioctl(struct bnx2x *bp, struct ifreq *ifr);</div><div class='add'>+static int bnx2x_hwtstamp_set(struct net_device *dev,</div><div class='add'>+			      struct kernel_hwtstamp_config *config,</div><div class='add'>+			      struct netlink_ext_ack *extack);</div><div class='add'>+static int bnx2x_hwtstamp_get(struct net_device *dev,</div><div class='add'>+			      struct kernel_hwtstamp_config *config);</div><div class='ctx'> </div><div class='ctx'> static void __storm_memset_dma_mapping(struct bnx2x *bp,</div><div class='ctx'> 				       u32 addr, dma_addr_t mapping)</div><div class='hunk'>@@ -1768,7 +1771,7 @@ static bool bnx2x_trylock_hw_lock(struct bnx2x *bp, u32 resource)</div><div class='ctx'>  * @bp:	driver handle</div><div class='ctx'>  *</div><div class='ctx'>  * Returns the recovery leader resource id according to the engine this function</div><div class='del'>- * belongs to. Currently only only 2 engines is supported.</div><div class='add'>+ * belongs to. Currently only 2 engines is supported.</div><div class='ctx'>  */</div><div class='ctx'> static int bnx2x_get_leader_lock_resource(struct bnx2x *bp)</div><div class='ctx'> {</div><div class='hunk'>@@ -5783,7 +5786,7 @@ void bnx2x_drv_pulse(struct bnx2x *bp)</div><div class='ctx'> </div><div class='ctx'> static void bnx2x_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bnx2x *bp = from_timer(bp, t, timer);</div><div class='add'>+	struct bnx2x *bp = timer_container_of(bp, t, timer);</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(bp-&gt;dev))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -10219,8 +10222,7 @@ static int bnx2x_udp_tunnel_sync(struct net_device *netdev, unsigned int table)</div><div class='ctx'> </div><div class='ctx'> static const struct udp_tunnel_nic_info bnx2x_udp_tunnels = {</div><div class='ctx'> 	.sync_table	= bnx2x_udp_tunnel_sync,</div><div class='del'>-	.flags		= UDP_TUNNEL_NIC_INFO_MAY_SLEEP |</div><div class='del'>-			  UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='add'>+	.flags		= UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='ctx'> 	.tables		= {</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },</div><div class='hunk'>@@ -12814,14 +12816,9 @@ static int bnx2x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='ctx'> 	if (!netif_running(dev))</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return bnx2x_hwtstamp_ioctl(bp, ifr);</div><div class='del'>-	default:</div><div class='del'>-		DP(NETIF_MSG_LINK, "ioctl: phy id 0x%x, reg 0x%x, val_in 0x%x\n",</div><div class='del'>-		   mdio-&gt;phy_id, mdio-&gt;reg_num, mdio-&gt;val_in);</div><div class='del'>-		return mdio_mii_ioctl(&amp;bp-&gt;mdio, mdio, cmd);</div><div class='del'>-	}</div><div class='add'>+	DP(NETIF_MSG_LINK, "ioctl: phy id 0x%x, reg 0x%x, val_in 0x%x\n",</div><div class='add'>+	   mdio-&gt;phy_id, mdio-&gt;reg_num, mdio-&gt;val_in);</div><div class='add'>+	return mdio_mii_ioctl(&amp;bp-&gt;mdio, mdio, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnx2x_validate_addr(struct net_device *dev)</div><div class='hunk'>@@ -13037,6 +13034,8 @@ static const struct net_device_ops bnx2x_netdev_ops = {</div><div class='ctx'> 	.ndo_get_phys_port_id	= bnx2x_get_phys_port_id,</div><div class='ctx'> 	.ndo_set_vf_link_state	= bnx2x_set_vf_link_state,</div><div class='ctx'> 	.ndo_features_check	= bnx2x_features_check,</div><div class='add'>+	.ndo_hwtstamp_get	= bnx2x_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= bnx2x_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev,</div><div class='hunk'>@@ -14140,7 +14139,7 @@ static int bnx2x_eeh_nic_unload(struct bnx2x *bp)</div><div class='ctx'> 	bnx2x_tx_disable(bp);</div><div class='ctx'> 	netdev_reset_tc(bp-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;bp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;bp-&gt;timer);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;bp-&gt;sp_task);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;bp-&gt;period_task);</div><div class='ctx'> </div><div class='hunk'>@@ -14217,7 +14216,6 @@ static pci_ers_result_t bnx2x_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev))</div><div class='ctx'> 		bnx2x_set_power_state(bp, PCI_D0);</div><div class='hunk'>@@ -15176,7 +15174,7 @@ void bnx2x_set_rx_ts(struct bnx2x *bp, struct sk_buff *skb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Read the PHC */</div><div class='del'>-static u64 bnx2x_cyclecounter_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 bnx2x_cyclecounter_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnx2x *bp = container_of(cc, struct bnx2x, cyclecounter);</div><div class='ctx'> 	int port = BP_PORT(bp);</div><div class='hunk'>@@ -15351,31 +15349,57 @@ int bnx2x_configure_ptp_filters(struct bnx2x *bp)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bnx2x_hwtstamp_ioctl(struct bnx2x *bp, struct ifreq *ifr)</div><div class='add'>+static int bnx2x_hwtstamp_set(struct net_device *dev,</div><div class='add'>+			      struct kernel_hwtstamp_config *config,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	struct bnx2x *bp = netdev_priv(dev);</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	DP(BNX2X_MSG_PTP, "HWTSTAMP IOCTL called\n");</div><div class='add'>+	DP(BNX2X_MSG_PTP, "HWTSTAMP SET called\n");</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	if (!netif_running(dev)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Device is down");</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	DP(BNX2X_MSG_PTP, "Requested tx_type: %d, requested rx_filters = %d\n",</div><div class='del'>-	   config.tx_type, config.rx_filter);</div><div class='add'>+	   config-&gt;tx_type, config-&gt;rx_filter);</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "One-step timestamping is not supported");</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;hwtstamp_ioctl_called = true;</div><div class='del'>-	bp-&gt;tx_type = config.tx_type;</div><div class='del'>-	bp-&gt;rx_filter = config.rx_filter;</div><div class='add'>+	bp-&gt;tx_type = config-&gt;tx_type;</div><div class='add'>+	bp-&gt;rx_filter = config-&gt;rx_filter;</div><div class='ctx'> </div><div class='ctx'> 	rc = bnx2x_configure_ptp_filters(bp);</div><div class='del'>-	if (rc)</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "HW configuration failure");</div><div class='ctx'> 		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;rx_filter = bp-&gt;rx_filter;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnx2x_hwtstamp_get(struct net_device *dev,</div><div class='add'>+			      struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct bnx2x *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	config.rx_filter = bp-&gt;rx_filter;</div><div class='add'>+	config-&gt;rx_filter = bp-&gt;rx_filter;</div><div class='add'>+	config-&gt;tx_type = bp-&gt;tx_type;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Configures HW for PTP */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c<br/>index 8e04552d2216..02c8213915a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c</a></div><div class='hunk'>@@ -2593,7 +2593,7 @@ void bnx2x_init_rx_mode_obj(struct bnx2x *bp,</div><div class='ctx'> /********************* Multicast verbs: SET, CLEAR ****************************/</div><div class='ctx'> static inline u8 bnx2x_mcast_bin_from_mac(u8 *mac)</div><div class='ctx'> {</div><div class='del'>-	return (crc32c_le(0, mac, ETH_ALEN) &gt;&gt; 24) &amp; 0xff;</div><div class='add'>+	return (crc32c(0, mac, ETH_ALEN) &gt;&gt; 24) &amp; 0xff;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct bnx2x_mcast_mac_elem {</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h<br/>index bacc8552bce1..00ca861c80dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h</a></div><div class='hunk'>@@ -379,7 +379,7 @@ struct bnx2x_vlan_mac_obj {</div><div class='ctx'> 	/**</div><div class='ctx'> 	*  Delete all configured elements having the given</div><div class='ctx'> 	*  vlan_mac_flags specification. Assumes no pending for</div><div class='del'>-	*  execution commands. Will schedule all all currently</div><div class='add'>+	*  execution commands. Will schedule all currently</div><div class='ctx'> 	*  configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags</div><div class='ctx'> 	*  specification for deletion and will use the given</div><div class='ctx'> 	*  ramrod_flags for the last DEL operation.</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c<br/>index ca42b81133d7..d17d0ea89c36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt.c</a></div><div class='hunk'>@@ -54,9 +54,12 @@</div><div class='ctx'> #include &lt;net/pkt_cls.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> #include &lt;linux/align.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/netdev_queues.h&gt;</div><div class='add'>+#include &lt;net/netdev_rx_queue.h&gt;</div><div class='add'>+#include &lt;linux/pci-tph.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "bnxt_hsi.h"</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_ulp.h"</div><div class='hunk'>@@ -76,12 +79,12 @@</div><div class='ctx'> #define BNXT_DEF_MSG_ENABLE	(NETIF_MSG_DRV | NETIF_MSG_HW | \</div><div class='ctx'> 				 NETIF_MSG_TX_ERR)</div><div class='ctx'> </div><div class='add'>+MODULE_IMPORT_NS("NETDEV_INTERNAL");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("Broadcom NetXtreme network driver");</div><div class='ctx'> </div><div class='ctx'> #define BNXT_RX_OFFSET (NET_SKB_PAD + NET_IP_ALIGN)</div><div class='ctx'> #define BNXT_RX_DMA_OFFSET NET_SKB_PAD</div><div class='del'>-#define BNXT_RX_COPY_THRESH 256</div><div class='ctx'> </div><div class='ctx'> #define BNXT_TX_PUSH_THRESH 164</div><div class='ctx'> </div><div class='hunk'>@@ -139,6 +142,7 @@ static const struct {</div><div class='ctx'> 	[NETXTREME_E_P5_VF] = { "Broadcom BCM5750X NetXtreme-E Ethernet Virtual Function" },</div><div class='ctx'> 	[NETXTREME_E_P5_VF_HV] = { "Broadcom BCM5750X NetXtreme-E Virtual Function for Hyper-V" },</div><div class='ctx'> 	[NETXTREME_E_P7_VF] = { "Broadcom BCM5760X Virtual Function" },</div><div class='add'>+	[NETXTREME_E_P7_VF_HV] = { "Broadcom BCM5760X Virtual Function for Hyper-V" },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct pci_device_id bnxt_pci_tbl[] = {</div><div class='hunk'>@@ -214,6 +218,7 @@ static const struct pci_device_id bnxt_pci_tbl[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(BROADCOM, 0x1808), .driver_data = NETXTREME_E_P5_VF_HV },</div><div class='ctx'> 	{ PCI_VDEVICE(BROADCOM, 0x1809), .driver_data = NETXTREME_E_P5_VF_HV },</div><div class='ctx'> 	{ PCI_VDEVICE(BROADCOM, 0x1819), .driver_data = NETXTREME_E_P7_VF },</div><div class='add'>+	{ PCI_VDEVICE(BROADCOM, 0x181b), .driver_data = NETXTREME_E_P7_VF_HV },</div><div class='ctx'> 	{ PCI_VDEVICE(BROADCOM, 0xd800), .driver_data = NETXTREME_S_VF },</div><div class='ctx'> #endif</div><div class='ctx'> 	{ 0 }</div><div class='hunk'>@@ -245,6 +250,23 @@ static const u16 bnxt_async_events_arr[] = {</div><div class='ctx'> 	ASYNC_EVENT_CMPL_EVENT_ID_PPS_TIMESTAMP,</div><div class='ctx'> 	ASYNC_EVENT_CMPL_EVENT_ID_ERROR_REPORT,</div><div class='ctx'> 	ASYNC_EVENT_CMPL_EVENT_ID_PHC_UPDATE,</div><div class='add'>+	ASYNC_EVENT_CMPL_EVENT_ID_DBG_BUF_PRODUCER,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const u16 bnxt_bstore_to_trace[] = {</div><div class='add'>+	[BNXT_CTX_SRT]		= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_SRT_TRACE,</div><div class='add'>+	[BNXT_CTX_SRT2]		= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_SRT2_TRACE,</div><div class='add'>+	[BNXT_CTX_CRT]		= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_CRT_TRACE,</div><div class='add'>+	[BNXT_CTX_CRT2]		= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_CRT2_TRACE,</div><div class='add'>+	[BNXT_CTX_RIGP0]	= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_RIGP0_TRACE,</div><div class='add'>+	[BNXT_CTX_L2HWRM]	= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_L2_HWRM_TRACE,</div><div class='add'>+	[BNXT_CTX_REHWRM]	= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_ROCE_HWRM_TRACE,</div><div class='add'>+	[BNXT_CTX_CA0]		= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_CA0_TRACE,</div><div class='add'>+	[BNXT_CTX_CA1]		= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_CA1_TRACE,</div><div class='add'>+	[BNXT_CTX_CA2]		= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_CA2_TRACE,</div><div class='add'>+	[BNXT_CTX_RIGP1]	= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_RIGP1_TRACE,</div><div class='add'>+	[BNXT_CTX_KONG]		= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_AFM_KONG_HWRM_TRACE,</div><div class='add'>+	[BNXT_CTX_QPC]		= DBG_LOG_BUFFER_FLUSH_REQ_TYPE_ERR_QPC_TRACE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct workqueue_struct *bnxt_pf_wq;</div><div class='hunk'>@@ -297,7 +319,8 @@ static bool bnxt_vf_pciid(enum board_idx idx)</div><div class='ctx'> 	return (idx == NETXTREME_C_VF || idx == NETXTREME_E_VF ||</div><div class='ctx'> 		idx == NETXTREME_S_VF || idx == NETXTREME_C_VF_HV ||</div><div class='ctx'> 		idx == NETXTREME_E_VF_HV || idx == NETXTREME_E_P5_VF ||</div><div class='del'>-		idx == NETXTREME_E_P5_VF_HV || idx == NETXTREME_E_P7_VF);</div><div class='add'>+		idx == NETXTREME_E_P5_VF_HV || idx == NETXTREME_E_P7_VF ||</div><div class='add'>+		idx == NETXTREME_E_P7_VF_HV);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define DB_CP_REARM_FLAGS	(DB_KEY_CP | DB_IDX_VALID)</div><div class='hunk'>@@ -459,6 +482,7 @@ static netdev_tx_t bnxt_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	struct bnxt_tx_ring_info *txr;</div><div class='ctx'> 	struct bnxt_sw_tx_bd *tx_buf;</div><div class='ctx'> 	__le32 lflags = 0;</div><div class='add'>+	skb_frag_t *frag;</div><div class='ctx'> </div><div class='ctx'> 	i = skb_get_queue_mapping(skb);</div><div class='ctx'> 	if (unlikely(i &gt;= bp-&gt;tx_nr_rings)) {</div><div class='hunk'>@@ -471,6 +495,17 @@ static netdev_tx_t bnxt_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	txr = &amp;bp-&gt;tx_ring[bp-&gt;tx_ring_map[i]];</div><div class='ctx'> 	prod = txr-&gt;tx_prod;</div><div class='ctx'> </div><div class='add'>+#if (MAX_SKB_FRAGS &gt; TX_MAX_FRAGS)</div><div class='add'>+	if (skb_shinfo(skb)-&gt;nr_frags &gt; TX_MAX_FRAGS) {</div><div class='add'>+		netdev_warn_once(dev, "SKB has too many (%d) fragments, max supported is %d.  SKB will be linearized.\n",</div><div class='add'>+				 skb_shinfo(skb)-&gt;nr_frags, TX_MAX_FRAGS);</div><div class='add'>+		if (skb_linearize(skb)) {</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+			dev_core_stats_tx_dropped_inc(dev);</div><div class='add'>+			return NETDEV_TX_OK;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='ctx'> 	free_size = bnxt_tx_avail(bp, txr);</div><div class='ctx'> 	if (unlikely(free_size &lt; skb_shinfo(skb)-&gt;nr_frags + 2)) {</div><div class='ctx'> 		/* We must have raced with NAPI cleanup */</div><div class='hunk'>@@ -534,7 +569,7 @@ static netdev_tx_t bnxt_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		lflags |= cpu_to_le32(TX_BD_FLAGS_NO_CRC);</div><div class='ctx'> </div><div class='ctx'> 	if (free_size == bp-&gt;tx_ring_size &amp;&amp; length &lt;= bp-&gt;tx_push_thresh &amp;&amp;</div><div class='del'>-	    !lflags) {</div><div class='add'>+	    skb_frags_readable(skb) &amp;&amp; !lflags) {</div><div class='ctx'> 		struct tx_push_buffer *tx_push_buf = txr-&gt;tx_push;</div><div class='ctx'> 		struct tx_push_bd *tx_push = &amp;tx_push_buf-&gt;push_bd;</div><div class='ctx'> 		struct tx_bd_ext *tx_push1 = &amp;tx_push-&gt;txbd2;</div><div class='hunk'>@@ -550,7 +585,7 @@ static netdev_tx_t bnxt_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 					TX_BD_FLAGS_LHINT_512_AND_SMALLER |</div><div class='ctx'> 					TX_BD_FLAGS_COAL_NOW |</div><div class='ctx'> 					TX_BD_FLAGS_PACKET_END |</div><div class='del'>-					(2 &lt;&lt; TX_BD_FLAGS_BD_CNT_SHIFT));</div><div class='add'>+					TX_BD_CNT(2));</div><div class='ctx'> </div><div class='ctx'> 		if (skb-&gt;ip_summed == CHECKSUM_PARTIAL)</div><div class='ctx'> 			tx_push1-&gt;tx_bd_hsize_lflags =</div><div class='hunk'>@@ -569,9 +604,9 @@ static netdev_tx_t bnxt_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		skb_copy_from_linear_data(skb, pdata, len);</div><div class='ctx'> 		pdata += len;</div><div class='ctx'> 		for (j = 0; j &lt; last_frag; j++) {</div><div class='del'>-			skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[j];</div><div class='ctx'> 			void *fptr;</div><div class='ctx'> </div><div class='add'>+			frag = &amp;skb_shinfo(skb)-&gt;frags[j];</div><div class='ctx'> 			fptr = skb_frag_address_safe(frag);</div><div class='ctx'> 			if (!fptr)</div><div class='ctx'> 				goto normal_tx;</div><div class='hunk'>@@ -625,7 +660,7 @@ normal_tx:</div><div class='ctx'> </div><div class='ctx'> 	dma_unmap_addr_set(tx_buf, mapping, mapping);</div><div class='ctx'> 	flags = (len &lt;&lt; TX_BD_LEN_SHIFT) | TX_BD_TYPE_LONG_TX_BD |</div><div class='del'>-		((last_frag + 2) &lt;&lt; TX_BD_FLAGS_BD_CNT_SHIFT);</div><div class='add'>+		TX_BD_CNT(last_frag + 2);</div><div class='ctx'> </div><div class='ctx'> 	txbd-&gt;tx_bd_haddr = cpu_to_le64(mapping);</div><div class='ctx'> 	txbd-&gt;tx_bd_opaque = SET_TX_OPAQUE(bp, txr, prod, 2 + last_frag);</div><div class='hunk'>@@ -679,8 +714,7 @@ normal_tx:</div><div class='ctx'> 			cpu_to_le32(cfa_action &lt;&lt; TX_BD_CFA_ACTION_SHIFT);</div><div class='ctx'> 	txbd0 = txbd;</div><div class='ctx'> 	for (i = 0; i &lt; last_frag; i++) {</div><div class='del'>-		skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[i];</div><div class='del'>-</div><div class='add'>+		frag = &amp;skb_shinfo(skb)-&gt;frags[i];</div><div class='ctx'> 		prod = NEXT_TX(prod);</div><div class='ctx'> 		txbd = &amp;txr-&gt;tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)];</div><div class='ctx'> </div><div class='hunk'>@@ -692,7 +726,8 @@ normal_tx:</div><div class='ctx'> 			goto tx_dma_error;</div><div class='ctx'> </div><div class='ctx'> 		tx_buf = &amp;txr-&gt;tx_buf_ring[RING_TX(bp, prod)];</div><div class='del'>-		dma_unmap_addr_set(tx_buf, mapping, mapping);</div><div class='add'>+		netmem_dma_unmap_addr_set(skb_frag_netmem(frag), tx_buf,</div><div class='add'>+					  mapping, mapping);</div><div class='ctx'> </div><div class='ctx'> 		txbd-&gt;tx_bd_haddr = cpu_to_le64(mapping);</div><div class='ctx'> </div><div class='hunk'>@@ -749,16 +784,18 @@ tx_dma_error:</div><div class='ctx'> 	for (i = 0; i &lt; last_frag; i++) {</div><div class='ctx'> 		prod = NEXT_TX(prod);</div><div class='ctx'> 		tx_buf = &amp;txr-&gt;tx_buf_ring[RING_TX(bp, prod)];</div><div class='del'>-		dma_unmap_page(&amp;pdev-&gt;dev, dma_unmap_addr(tx_buf, mapping),</div><div class='del'>-			       skb_frag_size(&amp;skb_shinfo(skb)-&gt;frags[i]),</div><div class='del'>-			       DMA_TO_DEVICE);</div><div class='add'>+		frag = &amp;skb_shinfo(skb)-&gt;frags[i];</div><div class='add'>+		netmem_dma_unmap_page_attrs(&amp;pdev-&gt;dev,</div><div class='add'>+					    dma_unmap_addr(tx_buf, mapping),</div><div class='add'>+					    skb_frag_size(frag),</div><div class='add'>+					    DMA_TO_DEVICE, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> tx_free:</div><div class='ctx'> 	dev_kfree_skb_any(skb);</div><div class='ctx'> tx_kick_pending:</div><div class='ctx'> 	if (BNXT_TX_PTP_IS_SET(lflags)) {</div><div class='del'>-		txr-&gt;tx_buf_ring[txr-&gt;tx_prod].is_ts_pkt = 0;</div><div class='add'>+		txr-&gt;tx_buf_ring[RING_TX(bp, txr-&gt;tx_prod)].is_ts_pkt = 0;</div><div class='ctx'> 		atomic64_inc(&amp;bp-&gt;ptp_cfg-&gt;stats.ts_err);</div><div class='ctx'> 		if (!(bp-&gt;fw_cap &amp; BNXT_FW_CAP_TX_TS_CMP))</div><div class='ctx'> 			/* set SKB to err so PTP worker will clean up */</div><div class='hunk'>@@ -766,7 +803,7 @@ tx_kick_pending:</div><div class='ctx'> 	}</div><div class='ctx'> 	if (txr-&gt;kick_pending)</div><div class='ctx'> 		bnxt_txr_db_kick(bp, txr, txr-&gt;tx_prod);</div><div class='del'>-	txr-&gt;tx_buf_ring[txr-&gt;tx_prod].skb = NULL;</div><div class='add'>+	txr-&gt;tx_buf_ring[RING_TX(bp, txr-&gt;tx_prod)].skb = NULL;</div><div class='ctx'> 	dev_core_stats_tx_dropped_inc(dev);</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -780,6 +817,7 @@ static bool __bnxt_tx_int(struct bnxt *bp, struct bnxt_tx_ring_info *txr,</div><div class='ctx'> 	u16 hw_cons = txr-&gt;tx_hw_cons;</div><div class='ctx'> 	unsigned int tx_bytes = 0;</div><div class='ctx'> 	u16 cons = txr-&gt;tx_cons;</div><div class='add'>+	skb_frag_t *frag;</div><div class='ctx'> 	int tx_pkts = 0;</div><div class='ctx'> 	bool rc = false;</div><div class='ctx'> </div><div class='hunk'>@@ -819,13 +857,14 @@ static bool __bnxt_tx_int(struct bnxt *bp, struct bnxt_tx_ring_info *txr,</div><div class='ctx'> 		last = tx_buf-&gt;nr_frags;</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; last; j++) {</div><div class='add'>+			frag = &amp;skb_shinfo(skb)-&gt;frags[j];</div><div class='ctx'> 			cons = NEXT_TX(cons);</div><div class='ctx'> 			tx_buf = &amp;txr-&gt;tx_buf_ring[RING_TX(bp, cons)];</div><div class='del'>-			dma_unmap_page(</div><div class='del'>-				&amp;pdev-&gt;dev,</div><div class='del'>-				dma_unmap_addr(tx_buf, mapping),</div><div class='del'>-				skb_frag_size(&amp;skb_shinfo(skb)-&gt;frags[j]),</div><div class='del'>-				DMA_TO_DEVICE);</div><div class='add'>+			netmem_dma_unmap_page_attrs(&amp;pdev-&gt;dev,</div><div class='add'>+						    dma_unmap_addr(tx_buf,</div><div class='add'>+								   mapping),</div><div class='add'>+						    skb_frag_size(frag),</div><div class='add'>+						    DMA_TO_DEVICE, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (unlikely(is_ts_pkt)) {</div><div class='ctx'> 			if (BNXT_CHIP_P5(bp)) {</div><div class='hunk'>@@ -838,7 +877,7 @@ static bool __bnxt_tx_int(struct bnxt *bp, struct bnxt_tx_ring_info *txr,</div><div class='ctx'> next_tx_int:</div><div class='ctx'> 		cons = NEXT_TX(cons);</div><div class='ctx'> </div><div class='del'>-		dev_consume_skb_any(skb);</div><div class='add'>+		napi_consume_skb(skb, budget);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(txr-&gt;tx_cons, cons);</div><div class='hunk'>@@ -864,6 +903,11 @@ static void bnxt_tx_int(struct bnxt *bp, struct bnxt_napi *bnapi, int budget)</div><div class='ctx'> 		bnapi-&gt;events &amp;= ~BNXT_TX_CMP_EVENT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool bnxt_separate_head_pool(struct bnxt_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	return rxr-&gt;need_head_pool || PAGE_SIZE &gt; BNXT_RX_PAGE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct page *__bnxt_alloc_rx_page(struct bnxt *bp, dma_addr_t *mapping,</div><div class='ctx'> 					 struct bnxt_rx_ring_info *rxr,</div><div class='ctx'> 					 unsigned int *offset,</div><div class='hunk'>@@ -885,28 +929,40 @@ static struct page *__bnxt_alloc_rx_page(struct bnxt *bp, dma_addr_t *mapping,</div><div class='ctx'> 	return page;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static netmem_ref __bnxt_alloc_rx_netmem(struct bnxt *bp, dma_addr_t *mapping,</div><div class='add'>+					 struct bnxt_rx_ring_info *rxr,</div><div class='add'>+					 unsigned int *offset,</div><div class='add'>+					 gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	netmem_ref netmem;</div><div class='add'>+</div><div class='add'>+	if (PAGE_SIZE &gt; BNXT_RX_PAGE_SIZE) {</div><div class='add'>+		netmem = page_pool_alloc_frag_netmem(rxr-&gt;page_pool, offset, BNXT_RX_PAGE_SIZE, gfp);</div><div class='add'>+	} else {</div><div class='add'>+		netmem = page_pool_alloc_netmems(rxr-&gt;page_pool, gfp);</div><div class='add'>+		*offset = 0;</div><div class='add'>+	}</div><div class='add'>+	if (!netmem)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	*mapping = page_pool_get_dma_addr_netmem(netmem) + *offset;</div><div class='add'>+	return netmem;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u8 *__bnxt_alloc_rx_frag(struct bnxt *bp, dma_addr_t *mapping,</div><div class='add'>+				       struct bnxt_rx_ring_info *rxr,</div><div class='ctx'> 				       gfp_t gfp)</div><div class='ctx'> {</div><div class='del'>-	u8 *data;</div><div class='del'>-	struct pci_dev *pdev = bp-&gt;pdev;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	struct page *page;</div><div class='ctx'> </div><div class='del'>-	if (gfp == GFP_ATOMIC)</div><div class='del'>-		data = napi_alloc_frag(bp-&gt;rx_buf_size);</div><div class='del'>-	else</div><div class='del'>-		data = netdev_alloc_frag(bp-&gt;rx_buf_size);</div><div class='del'>-	if (!data)</div><div class='add'>+	page = page_pool_alloc_frag(rxr-&gt;head_pool, &amp;offset,</div><div class='add'>+				    bp-&gt;rx_buf_size, gfp);</div><div class='add'>+	if (!page)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	*mapping = dma_map_single_attrs(&amp;pdev-&gt;dev, data + bp-&gt;rx_dma_offset,</div><div class='del'>-					bp-&gt;rx_buf_use_size, bp-&gt;rx_dir,</div><div class='del'>-					DMA_ATTR_WEAK_ORDERING);</div><div class='del'>-</div><div class='del'>-	if (dma_mapping_error(&amp;pdev-&gt;dev, *mapping)) {</div><div class='del'>-		skb_free_frag(data);</div><div class='del'>-		data = NULL;</div><div class='del'>-	}</div><div class='del'>-	return data;</div><div class='add'>+	*mapping = page_pool_get_dma_addr(page) + bp-&gt;rx_dma_offset + offset;</div><div class='add'>+	return page_address(page) + offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int bnxt_alloc_rx_data(struct bnxt *bp, struct bnxt_rx_ring_info *rxr,</div><div class='hunk'>@@ -928,7 +984,7 @@ int bnxt_alloc_rx_data(struct bnxt *bp, struct bnxt_rx_ring_info *rxr,</div><div class='ctx'> 		rx_buf-&gt;data = page;</div><div class='ctx'> 		rx_buf-&gt;data_ptr = page_address(page) + offset + bp-&gt;rx_offset;</div><div class='ctx'> 	} else {</div><div class='del'>-		u8 *data = __bnxt_alloc_rx_frag(bp, &amp;mapping, gfp);</div><div class='add'>+		u8 *data = __bnxt_alloc_rx_frag(bp, &amp;mapping, rxr, gfp);</div><div class='ctx'> </div><div class='ctx'> 		if (!data)</div><div class='ctx'> 			return -ENOMEM;</div><div class='hunk'>@@ -973,21 +1029,19 @@ static inline u16 bnxt_find_next_agg_idx(struct bnxt_rx_ring_info *rxr, u16 idx)</div><div class='ctx'> 	return next;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int bnxt_alloc_rx_page(struct bnxt *bp,</div><div class='del'>-				     struct bnxt_rx_ring_info *rxr,</div><div class='del'>-				     u16 prod, gfp_t gfp)</div><div class='add'>+static int bnxt_alloc_rx_netmem(struct bnxt *bp, struct bnxt_rx_ring_info *rxr,</div><div class='add'>+				u16 prod, gfp_t gfp)</div><div class='ctx'> {</div><div class='ctx'> 	struct rx_bd *rxbd =</div><div class='ctx'> 		&amp;rxr-&gt;rx_agg_desc_ring[RX_AGG_RING(bp, prod)][RX_IDX(prod)];</div><div class='ctx'> 	struct bnxt_sw_rx_agg_bd *rx_agg_buf;</div><div class='del'>-	struct page *page;</div><div class='del'>-	dma_addr_t mapping;</div><div class='ctx'> 	u16 sw_prod = rxr-&gt;rx_sw_agg_prod;</div><div class='ctx'> 	unsigned int offset = 0;</div><div class='add'>+	dma_addr_t mapping;</div><div class='add'>+	netmem_ref netmem;</div><div class='ctx'> </div><div class='del'>-	page = __bnxt_alloc_rx_page(bp, &amp;mapping, rxr, &amp;offset, gfp);</div><div class='del'>-</div><div class='del'>-	if (!page)</div><div class='add'>+	netmem = __bnxt_alloc_rx_netmem(bp, &amp;mapping, rxr, &amp;offset, gfp);</div><div class='add'>+	if (!netmem)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(test_bit(sw_prod, rxr-&gt;rx_agg_bmap)))</div><div class='hunk'>@@ -997,7 +1051,7 @@ static inline int bnxt_alloc_rx_page(struct bnxt *bp,</div><div class='ctx'> 	rx_agg_buf = &amp;rxr-&gt;rx_agg_ring[sw_prod];</div><div class='ctx'> 	rxr-&gt;rx_sw_agg_prod = RING_RX_AGG(bp, NEXT_RX_AGG(sw_prod));</div><div class='ctx'> </div><div class='del'>-	rx_agg_buf-&gt;page = page;</div><div class='add'>+	rx_agg_buf-&gt;netmem = netmem;</div><div class='ctx'> 	rx_agg_buf-&gt;offset = offset;</div><div class='ctx'> 	rx_agg_buf-&gt;mapping = mapping;</div><div class='ctx'> 	rxbd-&gt;rx_bd_haddr = cpu_to_le64(mapping);</div><div class='hunk'>@@ -1041,11 +1095,11 @@ static void bnxt_reuse_rx_agg_bufs(struct bnxt_cp_ring_info *cpr, u16 idx,</div><div class='ctx'> 		p5_tpa = true;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; agg_bufs; i++) {</div><div class='del'>-		u16 cons;</div><div class='del'>-		struct rx_agg_cmp *agg;</div><div class='ctx'> 		struct bnxt_sw_rx_agg_bd *cons_rx_buf, *prod_rx_buf;</div><div class='add'>+		struct rx_agg_cmp *agg;</div><div class='ctx'> 		struct rx_bd *prod_bd;</div><div class='del'>-		struct page *page;</div><div class='add'>+		netmem_ref netmem;</div><div class='add'>+		u16 cons;</div><div class='ctx'> </div><div class='ctx'> 		if (p5_tpa)</div><div class='ctx'> 			agg = bnxt_get_tpa_agg_p5(bp, rxr, idx, start + i);</div><div class='hunk'>@@ -1062,11 +1116,11 @@ static void bnxt_reuse_rx_agg_bufs(struct bnxt_cp_ring_info *cpr, u16 idx,</div><div class='ctx'> 		cons_rx_buf = &amp;rxr-&gt;rx_agg_ring[cons];</div><div class='ctx'> </div><div class='ctx'> 		/* It is possible for sw_prod to be equal to cons, so</div><div class='del'>-		 * set cons_rx_buf-&gt;page to NULL first.</div><div class='add'>+		 * set cons_rx_buf-&gt;netmem to 0 first.</div><div class='ctx'> 		 */</div><div class='del'>-		page = cons_rx_buf-&gt;page;</div><div class='del'>-		cons_rx_buf-&gt;page = NULL;</div><div class='del'>-		prod_rx_buf-&gt;page = page;</div><div class='add'>+		netmem = cons_rx_buf-&gt;netmem;</div><div class='add'>+		cons_rx_buf-&gt;netmem = 0;</div><div class='add'>+		prod_rx_buf-&gt;netmem = netmem;</div><div class='ctx'> 		prod_rx_buf-&gt;offset = cons_rx_buf-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 		prod_rx_buf-&gt;mapping = cons_rx_buf-&gt;mapping;</div><div class='hunk'>@@ -1179,41 +1233,48 @@ static struct sk_buff *bnxt_rx_skb(struct bnxt *bp,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	skb = napi_build_skb(data, bp-&gt;rx_buf_size);</div><div class='del'>-	dma_unmap_single_attrs(&amp;bp-&gt;pdev-&gt;dev, dma_addr, bp-&gt;rx_buf_use_size,</div><div class='del'>-			       bp-&gt;rx_dir, DMA_ATTR_WEAK_ORDERING);</div><div class='add'>+	dma_sync_single_for_cpu(&amp;bp-&gt;pdev-&gt;dev, dma_addr, bp-&gt;rx_buf_use_size,</div><div class='add'>+				bp-&gt;rx_dir);</div><div class='ctx'> 	if (!skb) {</div><div class='del'>-		skb_free_frag(data);</div><div class='add'>+		page_pool_free_va(rxr-&gt;head_pool, data, true);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	skb_mark_for_recycle(skb);</div><div class='ctx'> 	skb_reserve(skb, bp-&gt;rx_offset);</div><div class='ctx'> 	skb_put(skb, offset_and_len &amp; 0xffff);</div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 __bnxt_rx_agg_pages(struct bnxt *bp,</div><div class='del'>-			       struct bnxt_cp_ring_info *cpr,</div><div class='del'>-			       struct skb_shared_info *shinfo,</div><div class='del'>-			       u16 idx, u32 agg_bufs, bool tpa,</div><div class='del'>-			       struct xdp_buff *xdp)</div><div class='add'>+static u32 __bnxt_rx_agg_netmems(struct bnxt *bp,</div><div class='add'>+				 struct bnxt_cp_ring_info *cpr,</div><div class='add'>+				 u16 idx, u32 agg_bufs, bool tpa,</div><div class='add'>+				 struct sk_buff *skb,</div><div class='add'>+				 struct xdp_buff *xdp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_napi *bnapi = cpr-&gt;bnapi;</div><div class='del'>-	struct pci_dev *pdev = bp-&gt;pdev;</div><div class='del'>-	struct bnxt_rx_ring_info *rxr = bnapi-&gt;rx_ring;</div><div class='del'>-	u16 prod = rxr-&gt;rx_agg_prod;</div><div class='add'>+	struct skb_shared_info *shinfo;</div><div class='add'>+	struct bnxt_rx_ring_info *rxr;</div><div class='ctx'> 	u32 i, total_frag_len = 0;</div><div class='ctx'> 	bool p5_tpa = false;</div><div class='add'>+	u16 prod;</div><div class='add'>+</div><div class='add'>+	rxr = bnapi-&gt;rx_ring;</div><div class='add'>+	prod = rxr-&gt;rx_agg_prod;</div><div class='ctx'> </div><div class='ctx'> 	if ((bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS) &amp;&amp; tpa)</div><div class='ctx'> 		p5_tpa = true;</div><div class='ctx'> </div><div class='add'>+	if (skb)</div><div class='add'>+		shinfo = skb_shinfo(skb);</div><div class='add'>+	else</div><div class='add'>+		shinfo = xdp_get_shared_info_from_buff(xdp);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; agg_bufs; i++) {</div><div class='del'>-		skb_frag_t *frag = &amp;shinfo-&gt;frags[i];</div><div class='del'>-		u16 cons, frag_len;</div><div class='del'>-		struct rx_agg_cmp *agg;</div><div class='ctx'> 		struct bnxt_sw_rx_agg_bd *cons_rx_buf;</div><div class='del'>-		struct page *page;</div><div class='del'>-		dma_addr_t mapping;</div><div class='add'>+		struct rx_agg_cmp *agg;</div><div class='add'>+		u16 cons, frag_len;</div><div class='add'>+		netmem_ref netmem;</div><div class='ctx'> </div><div class='ctx'> 		if (p5_tpa)</div><div class='ctx'> 			agg = bnxt_get_tpa_agg_p5(bp, rxr, idx, i);</div><div class='hunk'>@@ -1224,27 +1285,41 @@ static u32 __bnxt_rx_agg_pages(struct bnxt *bp,</div><div class='ctx'> 			    RX_AGG_CMP_LEN) &gt;&gt; RX_AGG_CMP_LEN_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 		cons_rx_buf = &amp;rxr-&gt;rx_agg_ring[cons];</div><div class='del'>-		skb_frag_fill_page_desc(frag, cons_rx_buf-&gt;page,</div><div class='del'>-					cons_rx_buf-&gt;offset, frag_len);</div><div class='del'>-		shinfo-&gt;nr_frags = i + 1;</div><div class='add'>+		if (skb) {</div><div class='add'>+			skb_add_rx_frag_netmem(skb, i, cons_rx_buf-&gt;netmem,</div><div class='add'>+					       cons_rx_buf-&gt;offset,</div><div class='add'>+					       frag_len, BNXT_RX_PAGE_SIZE);</div><div class='add'>+		} else {</div><div class='add'>+			skb_frag_t *frag = &amp;shinfo-&gt;frags[i];</div><div class='add'>+</div><div class='add'>+			skb_frag_fill_netmem_desc(frag, cons_rx_buf-&gt;netmem,</div><div class='add'>+						  cons_rx_buf-&gt;offset,</div><div class='add'>+						  frag_len);</div><div class='add'>+			shinfo-&gt;nr_frags = i + 1;</div><div class='add'>+		}</div><div class='ctx'> 		__clear_bit(cons, rxr-&gt;rx_agg_bmap);</div><div class='ctx'> </div><div class='del'>-		/* It is possible for bnxt_alloc_rx_page() to allocate</div><div class='add'>+		/* It is possible for bnxt_alloc_rx_netmem() to allocate</div><div class='ctx'> 		 * a sw_prod index that equals the cons index, so we</div><div class='ctx'> 		 * need to clear the cons entry now.</div><div class='ctx'> 		 */</div><div class='del'>-		mapping = cons_rx_buf-&gt;mapping;</div><div class='del'>-		page = cons_rx_buf-&gt;page;</div><div class='del'>-		cons_rx_buf-&gt;page = NULL;</div><div class='add'>+		netmem = cons_rx_buf-&gt;netmem;</div><div class='add'>+		cons_rx_buf-&gt;netmem = 0;</div><div class='ctx'> </div><div class='del'>-		if (xdp &amp;&amp; page_is_pfmemalloc(page))</div><div class='add'>+		if (xdp &amp;&amp; netmem_is_pfmemalloc(netmem))</div><div class='ctx'> 			xdp_buff_set_frag_pfmemalloc(xdp);</div><div class='ctx'> </div><div class='del'>-		if (bnxt_alloc_rx_page(bp, rxr, prod, GFP_ATOMIC) != 0) {</div><div class='add'>+		if (bnxt_alloc_rx_netmem(bp, rxr, prod, GFP_ATOMIC) != 0) {</div><div class='add'>+			if (skb) {</div><div class='add'>+				skb-&gt;len -= frag_len;</div><div class='add'>+				skb-&gt;data_len -= frag_len;</div><div class='add'>+				skb-&gt;truesize -= BNXT_RX_PAGE_SIZE;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			--shinfo-&gt;nr_frags;</div><div class='del'>-			cons_rx_buf-&gt;page = page;</div><div class='add'>+			cons_rx_buf-&gt;netmem = netmem;</div><div class='ctx'> </div><div class='del'>-			/* Update prod since possibly some pages have been</div><div class='add'>+			/* Update prod since possibly some netmems have been</div><div class='ctx'> 			 * allocated already.</div><div class='ctx'> 			 */</div><div class='ctx'> 			rxr-&gt;rx_agg_prod = prod;</div><div class='hunk'>@@ -1252,8 +1327,8 @@ static u32 __bnxt_rx_agg_pages(struct bnxt *bp,</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		dma_sync_single_for_cpu(&amp;pdev-&gt;dev, mapping, BNXT_RX_PAGE_SIZE,</div><div class='del'>-					bp-&gt;rx_dir);</div><div class='add'>+		page_pool_dma_sync_netmem_for_cpu(rxr-&gt;page_pool, netmem, 0,</div><div class='add'>+						  BNXT_RX_PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 		total_frag_len += frag_len;</div><div class='ctx'> 		prod = NEXT_RX_AGG(prod);</div><div class='hunk'>@@ -1262,32 +1337,28 @@ static u32 __bnxt_rx_agg_pages(struct bnxt *bp,</div><div class='ctx'> 	return total_frag_len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct sk_buff *bnxt_rx_agg_pages_skb(struct bnxt *bp,</div><div class='del'>-					     struct bnxt_cp_ring_info *cpr,</div><div class='del'>-					     struct sk_buff *skb, u16 idx,</div><div class='del'>-					     u32 agg_bufs, bool tpa)</div><div class='add'>+static struct sk_buff *bnxt_rx_agg_netmems_skb(struct bnxt *bp,</div><div class='add'>+					       struct bnxt_cp_ring_info *cpr,</div><div class='add'>+					       struct sk_buff *skb, u16 idx,</div><div class='add'>+					       u32 agg_bufs, bool tpa)</div><div class='ctx'> {</div><div class='del'>-	struct skb_shared_info *shinfo = skb_shinfo(skb);</div><div class='ctx'> 	u32 total_frag_len = 0;</div><div class='ctx'> </div><div class='del'>-	total_frag_len = __bnxt_rx_agg_pages(bp, cpr, shinfo, idx,</div><div class='del'>-					     agg_bufs, tpa, NULL);</div><div class='add'>+	total_frag_len = __bnxt_rx_agg_netmems(bp, cpr, idx, agg_bufs, tpa,</div><div class='add'>+					       skb, NULL);</div><div class='ctx'> 	if (!total_frag_len) {</div><div class='ctx'> 		skb_mark_for_recycle(skb);</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	skb-&gt;data_len += total_frag_len;</div><div class='del'>-	skb-&gt;len += total_frag_len;</div><div class='del'>-	skb-&gt;truesize += BNXT_RX_PAGE_SIZE * agg_bufs;</div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 bnxt_rx_agg_pages_xdp(struct bnxt *bp,</div><div class='del'>-				 struct bnxt_cp_ring_info *cpr,</div><div class='del'>-				 struct xdp_buff *xdp, u16 idx,</div><div class='del'>-				 u32 agg_bufs, bool tpa)</div><div class='add'>+static u32 bnxt_rx_agg_netmems_xdp(struct bnxt *bp,</div><div class='add'>+				   struct bnxt_cp_ring_info *cpr,</div><div class='add'>+				   struct xdp_buff *xdp, u16 idx,</div><div class='add'>+				   u32 agg_bufs, bool tpa)</div><div class='ctx'> {</div><div class='ctx'> 	struct skb_shared_info *shinfo = xdp_get_shared_info_from_buff(xdp);</div><div class='ctx'> 	u32 total_frag_len = 0;</div><div class='hunk'>@@ -1295,8 +1366,8 @@ static u32 bnxt_rx_agg_pages_xdp(struct bnxt *bp,</div><div class='ctx'> 	if (!xdp_buff_has_frags(xdp))</div><div class='ctx'> 		shinfo-&gt;nr_frags = 0;</div><div class='ctx'> </div><div class='del'>-	total_frag_len = __bnxt_rx_agg_pages(bp, cpr, shinfo,</div><div class='del'>-					     idx, agg_bufs, tpa, xdp);</div><div class='add'>+	total_frag_len = __bnxt_rx_agg_netmems(bp, cpr, idx, agg_bufs, tpa,</div><div class='add'>+					       NULL, xdp);</div><div class='ctx'> 	if (total_frag_len) {</div><div class='ctx'> 		xdp_buff_set_frags_flag(xdp);</div><div class='ctx'> 		shinfo-&gt;nr_frags = agg_bufs;</div><div class='hunk'>@@ -1330,13 +1401,13 @@ static struct sk_buff *bnxt_copy_data(struct bnxt_napi *bnapi, u8 *data,</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	dma_sync_single_for_cpu(&amp;pdev-&gt;dev, mapping, bp-&gt;rx_copy_thresh,</div><div class='add'>+	dma_sync_single_for_cpu(&amp;pdev-&gt;dev, mapping, bp-&gt;rx_copybreak,</div><div class='ctx'> 				bp-&gt;rx_dir);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(skb-&gt;data - NET_IP_ALIGN, data - NET_IP_ALIGN,</div><div class='ctx'> 	       len + NET_IP_ALIGN);</div><div class='ctx'> </div><div class='del'>-	dma_sync_single_for_device(&amp;pdev-&gt;dev, mapping, bp-&gt;rx_copy_thresh,</div><div class='add'>+	dma_sync_single_for_device(&amp;pdev-&gt;dev, mapping, bp-&gt;rx_copybreak,</div><div class='ctx'> 				   bp-&gt;rx_dir);</div><div class='ctx'> </div><div class='ctx'> 	skb_put(skb, len);</div><div class='hunk'>@@ -1518,7 +1589,7 @@ static void bnxt_tpa_start(struct bnxt *bp, struct bnxt_rx_ring_info *rxr,</div><div class='ctx'> 		if (TPA_START_IS_IPV6(tpa_start1))</div><div class='ctx'> 			tpa_info-&gt;gso_type = SKB_GSO_TCPV6;</div><div class='ctx'> 		/* RSS profiles 1 and 3 with extract code 0 for inner 4-tuple */</div><div class='del'>-		else if (cmp_type == CMP_TYPE_RX_L2_TPA_START_CMP &amp;&amp;</div><div class='add'>+		else if (!BNXT_CHIP_P4_PLUS(bp) &amp;&amp;</div><div class='ctx'> 			 TPA_START_HASH_TYPE(tpa_start) == 3)</div><div class='ctx'> 			tpa_info-&gt;gso_type = SKB_GSO_TCPV6;</div><div class='ctx'> 		tpa_info-&gt;rss_hash =</div><div class='hunk'>@@ -1755,7 +1826,7 @@ static struct net_device *bnxt_get_pkt_dev(struct bnxt *bp, u16 cfa_code)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = bnxt_get_vf_rep(bp, cfa_code);</div><div class='ctx'> </div><div class='del'>-	/* if vf-rep dev is NULL, the must belongs to the PF */</div><div class='add'>+	/* if vf-rep dev is NULL, it must belong to the PF */</div><div class='ctx'> 	return dev ? dev : bp-&gt;dev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1829,7 +1900,7 @@ static inline struct sk_buff *bnxt_tpa_end(struct bnxt *bp,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (len &lt;= bp-&gt;rx_copy_thresh) {</div><div class='add'>+	if (len &lt;= bp-&gt;rx_copybreak) {</div><div class='ctx'> 		skb = bnxt_copy_skb(bnapi, data_ptr, len, mapping);</div><div class='ctx'> 		if (!skb) {</div><div class='ctx'> 			bnxt_abort_tpa(cpr, idx, agg_bufs);</div><div class='hunk'>@@ -1840,7 +1911,8 @@ static inline struct sk_buff *bnxt_tpa_end(struct bnxt *bp,</div><div class='ctx'> 		u8 *new_data;</div><div class='ctx'> 		dma_addr_t new_mapping;</div><div class='ctx'> </div><div class='del'>-		new_data = __bnxt_alloc_rx_frag(bp, &amp;new_mapping, GFP_ATOMIC);</div><div class='add'>+		new_data = __bnxt_alloc_rx_frag(bp, &amp;new_mapping, rxr,</div><div class='add'>+						GFP_ATOMIC);</div><div class='ctx'> 		if (!new_data) {</div><div class='ctx'> 			bnxt_abort_tpa(cpr, idx, agg_bufs);</div><div class='ctx'> 			cpr-&gt;sw_stats-&gt;rx.rx_oom_discards += 1;</div><div class='hunk'>@@ -1852,22 +1924,23 @@ static inline struct sk_buff *bnxt_tpa_end(struct bnxt *bp,</div><div class='ctx'> 		tpa_info-&gt;mapping = new_mapping;</div><div class='ctx'> </div><div class='ctx'> 		skb = napi_build_skb(data, bp-&gt;rx_buf_size);</div><div class='del'>-		dma_unmap_single_attrs(&amp;bp-&gt;pdev-&gt;dev, mapping,</div><div class='del'>-				       bp-&gt;rx_buf_use_size, bp-&gt;rx_dir,</div><div class='del'>-				       DMA_ATTR_WEAK_ORDERING);</div><div class='add'>+		dma_sync_single_for_cpu(&amp;bp-&gt;pdev-&gt;dev, mapping,</div><div class='add'>+					bp-&gt;rx_buf_use_size, bp-&gt;rx_dir);</div><div class='ctx'> </div><div class='ctx'> 		if (!skb) {</div><div class='del'>-			skb_free_frag(data);</div><div class='add'>+			page_pool_free_va(rxr-&gt;head_pool, data, true);</div><div class='ctx'> 			bnxt_abort_tpa(cpr, idx, agg_bufs);</div><div class='ctx'> 			cpr-&gt;sw_stats-&gt;rx.rx_oom_discards += 1;</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='add'>+		skb_mark_for_recycle(skb);</div><div class='ctx'> 		skb_reserve(skb, bp-&gt;rx_offset);</div><div class='ctx'> 		skb_put(skb, len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (agg_bufs) {</div><div class='del'>-		skb = bnxt_rx_agg_pages_skb(bp, cpr, skb, idx, agg_bufs, true);</div><div class='add'>+		skb = bnxt_rx_agg_netmems_skb(bp, cpr, skb, idx, agg_bufs,</div><div class='add'>+					      true);</div><div class='ctx'> 		if (!skb) {</div><div class='ctx'> 			/* Page reuse already handled by bnxt_rx_pages(). */</div><div class='ctx'> 			cpr-&gt;sw_stats-&gt;rx.rx_oom_discards += 1;</div><div class='hunk'>@@ -1987,6 +2060,7 @@ static struct sk_buff *bnxt_rx_vlan(struct sk_buff *skb, u8 cmp_type,</div><div class='ctx'> 	}</div><div class='ctx'> 	return skb;</div><div class='ctx'> vlan_err:</div><div class='add'>+	skb_mark_for_recycle(skb);</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -2025,6 +2099,7 @@ static int bnxt_rx_pkt(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,</div><div class='ctx'> 	struct rx_cmp_ext *rxcmp1;</div><div class='ctx'> 	u32 tmp_raw_cons = *raw_cons;</div><div class='ctx'> 	u16 cons, prod, cp_cons = RING_CMP(tmp_raw_cons);</div><div class='add'>+	struct skb_shared_info *sinfo;</div><div class='ctx'> 	struct bnxt_sw_rx_bd *rx_buf;</div><div class='ctx'> 	unsigned int len;</div><div class='ctx'> 	u8 *data_ptr, agg_bufs, cmp_type;</div><div class='hunk'>@@ -2146,11 +2221,13 @@ static int bnxt_rx_pkt(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,</div><div class='ctx'> 	if (bnxt_xdp_attached(bp, rxr)) {</div><div class='ctx'> 		bnxt_xdp_buff_init(bp, rxr, cons, data_ptr, len, &amp;xdp);</div><div class='ctx'> 		if (agg_bufs) {</div><div class='del'>-			u32 frag_len = bnxt_rx_agg_pages_xdp(bp, cpr, &amp;xdp,</div><div class='del'>-							     cp_cons, agg_bufs,</div><div class='del'>-							     false);</div><div class='add'>+			u32 frag_len = bnxt_rx_agg_netmems_xdp(bp, cpr, &amp;xdp,</div><div class='add'>+							       cp_cons,</div><div class='add'>+							       agg_bufs,</div><div class='add'>+							       false);</div><div class='ctx'> 			if (!frag_len)</div><div class='ctx'> 				goto oom_next_rx;</div><div class='add'>+</div><div class='ctx'> 		}</div><div class='ctx'> 		xdp_active = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2160,9 +2237,15 @@ static int bnxt_rx_pkt(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,</div><div class='ctx'> 			rc = 1;</div><div class='ctx'> 			goto next_rx;</div><div class='ctx'> 		}</div><div class='add'>+		if (xdp_buff_has_frags(&amp;xdp)) {</div><div class='add'>+			sinfo = xdp_get_shared_info_from_buff(&amp;xdp);</div><div class='add'>+			agg_bufs = sinfo-&gt;nr_frags;</div><div class='add'>+		} else {</div><div class='add'>+			agg_bufs = 0;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (len &lt;= bp-&gt;rx_copy_thresh) {</div><div class='add'>+	if (len &lt;= bp-&gt;rx_copybreak) {</div><div class='ctx'> 		if (!xdp_active)</div><div class='ctx'> 			skb = bnxt_copy_skb(bnapi, data_ptr, len, dma_addr);</div><div class='ctx'> 		else</div><div class='hunk'>@@ -2193,11 +2276,13 @@ static int bnxt_rx_pkt(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,</div><div class='ctx'> </div><div class='ctx'> 	if (agg_bufs) {</div><div class='ctx'> 		if (!xdp_active) {</div><div class='del'>-			skb = bnxt_rx_agg_pages_skb(bp, cpr, skb, cp_cons, agg_bufs, false);</div><div class='add'>+			skb = bnxt_rx_agg_netmems_skb(bp, cpr, skb, cp_cons,</div><div class='add'>+						      agg_bufs, false);</div><div class='ctx'> 			if (!skb)</div><div class='ctx'> 				goto oom_next_rx;</div><div class='ctx'> 		} else {</div><div class='del'>-			skb = bnxt_xdp_build_skb(bp, skb, agg_bufs, rxr-&gt;page_pool, &amp;xdp, rxcmp1);</div><div class='add'>+			skb = bnxt_xdp_build_skb(bp, skb, agg_bufs,</div><div class='add'>+						 rxr-&gt;page_pool, &amp;xdp);</div><div class='ctx'> 			if (!skb) {</div><div class='ctx'> 				/* we should be able to free the old skb here */</div><div class='ctx'> 				bnxt_xdp_buff_frags_free(rxr, &amp;xdp);</div><div class='hunk'>@@ -2212,15 +2297,13 @@ static int bnxt_rx_pkt(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,</div><div class='ctx'> 		if (cmp_type == CMP_TYPE_RX_L2_V3_CMP) {</div><div class='ctx'> 			type = bnxt_rss_ext_op(bp, rxcmp);</div><div class='ctx'> 		} else {</div><div class='del'>-			u32 hash_type = RX_CMP_HASH_TYPE(rxcmp);</div><div class='add'>+			u32 itypes = RX_CMP_ITYPES(rxcmp);</div><div class='ctx'> </div><div class='del'>-			/* RSS profiles 1 and 3 with extract code 0 for inner</div><div class='del'>-			 * 4-tuple</div><div class='del'>-			 */</div><div class='del'>-			if (hash_type != 1 &amp;&amp; hash_type != 3)</div><div class='del'>-				type = PKT_HASH_TYPE_L3;</div><div class='del'>-			else</div><div class='add'>+			if (itypes == RX_CMP_FLAGS_ITYPE_TCP ||</div><div class='add'>+			    itypes == RX_CMP_FLAGS_ITYPE_UDP)</div><div class='ctx'> 				type = PKT_HASH_TYPE_L4;</div><div class='add'>+			else</div><div class='add'>+				type = PKT_HASH_TYPE_L3;</div><div class='ctx'> 		}</div><div class='ctx'> 		skb_set_hash(skb, le32_to_cpu(rxcmp-&gt;rx_cmp_rss_hash), type);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2254,11 +2337,8 @@ static int bnxt_rx_pkt(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,</div><div class='ctx'> </div><div class='ctx'> 			if (!bnxt_get_rx_ts_p5(bp, &amp;ts, cmpl_ts)) {</div><div class='ctx'> 				struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='del'>-				unsigned long flags;</div><div class='ctx'> </div><div class='del'>-				spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='del'>-				ns = timecounter_cyc2time(&amp;ptp-&gt;tc, ts);</div><div class='del'>-				spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+				ns = bnxt_timecounter_cyc2time(ptp, ts);</div><div class='ctx'> 				memset(skb_hwtstamps(skb), 0,</div><div class='ctx'> 				       sizeof(*skb_hwtstamps(skb)));</div><div class='ctx'> 				skb_hwtstamps(skb)-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='hunk'>@@ -2465,6 +2545,59 @@ static bool bnxt_auto_speed_updated(struct bnxt_link_info *link_info)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool bnxt_bs_trace_avail(struct bnxt *bp, u16 type)</div><div class='add'>+{</div><div class='add'>+	u32 flags = bp-&gt;ctx-&gt;ctx_arr[type].flags;</div><div class='add'>+</div><div class='add'>+	return (flags &amp; BNXT_CTX_MEM_TYPE_VALID) &amp;&amp;</div><div class='add'>+		((flags &amp; BNXT_CTX_MEM_FW_TRACE) ||</div><div class='add'>+		 (flags &amp; BNXT_CTX_MEM_FW_BIN_TRACE));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_bs_trace_init(struct bnxt *bp, struct bnxt_ctx_mem_type *ctxm)</div><div class='add'>+{</div><div class='add'>+	u32 mem_size, pages, rem_bytes, magic_byte_offset;</div><div class='add'>+	u16 trace_type = bnxt_bstore_to_trace[ctxm-&gt;type];</div><div class='add'>+	struct bnxt_ctx_pg_info *ctx_pg = ctxm-&gt;pg_info;</div><div class='add'>+	struct bnxt_ring_mem_info *rmem, *rmem_pg_tbl;</div><div class='add'>+	struct bnxt_bs_trace_info *bs_trace;</div><div class='add'>+	int last_pg;</div><div class='add'>+</div><div class='add'>+	if (ctxm-&gt;instance_bmap &amp;&amp; ctxm-&gt;instance_bmap &gt; 1)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mem_size = ctxm-&gt;max_entries * ctxm-&gt;entry_size;</div><div class='add'>+	rem_bytes = mem_size % BNXT_PAGE_SIZE;</div><div class='add'>+	pages = DIV_ROUND_UP(mem_size, BNXT_PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	last_pg = (pages - 1) &amp; (MAX_CTX_PAGES - 1);</div><div class='add'>+	magic_byte_offset = (rem_bytes ? rem_bytes : BNXT_PAGE_SIZE) - 1;</div><div class='add'>+</div><div class='add'>+	rmem = &amp;ctx_pg[0].ring_mem;</div><div class='add'>+	bs_trace = &amp;bp-&gt;bs_trace[trace_type];</div><div class='add'>+	bs_trace-&gt;ctx_type = ctxm-&gt;type;</div><div class='add'>+	bs_trace-&gt;trace_type = trace_type;</div><div class='add'>+	if (pages &gt; MAX_CTX_PAGES) {</div><div class='add'>+		int last_pg_dir = rmem-&gt;nr_pages - 1;</div><div class='add'>+</div><div class='add'>+		rmem_pg_tbl = &amp;ctx_pg[0].ctx_pg_tbl[last_pg_dir]-&gt;ring_mem;</div><div class='add'>+		bs_trace-&gt;magic_byte = rmem_pg_tbl-&gt;pg_arr[last_pg];</div><div class='add'>+	} else {</div><div class='add'>+		bs_trace-&gt;magic_byte = rmem-&gt;pg_arr[last_pg];</div><div class='add'>+	}</div><div class='add'>+	bs_trace-&gt;magic_byte += magic_byte_offset;</div><div class='add'>+	*bs_trace-&gt;magic_byte = BNXT_TRACE_BUF_MAGIC_BYTE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define BNXT_EVENT_BUF_PRODUCER_TYPE(data1)				\</div><div class='add'>+	(((data1) &amp; ASYNC_EVENT_CMPL_DBG_BUF_PRODUCER_EVENT_DATA1_TYPE_MASK) &gt;&gt;\</div><div class='add'>+	 ASYNC_EVENT_CMPL_DBG_BUF_PRODUCER_EVENT_DATA1_TYPE_SFT)</div><div class='add'>+</div><div class='add'>+#define BNXT_EVENT_BUF_PRODUCER_OFFSET(data2)				\</div><div class='add'>+	(((data2) &amp;							\</div><div class='add'>+	  ASYNC_EVENT_CMPL_DBG_BUF_PRODUCER_EVENT_DATA2_CURR_OFF_MASK) &gt;&gt;\</div><div class='add'>+	 ASYNC_EVENT_CMPL_DBG_BUF_PRODUCER_EVENT_DATA2_CURR_OFF_SFT)</div><div class='add'>+</div><div class='ctx'> #define BNXT_EVENT_THERMAL_CURRENT_TEMP(data2)				\</div><div class='ctx'> 	((data2) &amp;							\</div><div class='ctx'> 	  ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA2_CURRENT_TEMP_MASK)</div><div class='hunk'>@@ -2764,12 +2897,12 @@ static int bnxt_async_event_process(struct bnxt *bp,</div><div class='ctx'> 				if (!ptp)</div><div class='ctx'> 					goto async_event_process_exit;</div><div class='ctx'> </div><div class='del'>-				spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 				bnxt_ptp_update_current_time(bp);</div><div class='ctx'> 				ns = (((u64)BNXT_EVENT_PHC_RTC_UPDATE(data1) &lt;&lt;</div><div class='ctx'> 				       BNXT_PHC_BITS) | ptp-&gt;current_time);</div><div class='add'>+				write_seqlock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 				bnxt_ptp_rtc_timecounter_init(ptp, ns);</div><div class='del'>-				spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+				write_sequnlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2781,11 +2914,19 @@ static int bnxt_async_event_process(struct bnxt *bp,</div><div class='ctx'> 		hwrm_update_token(bp, seq_id, BNXT_HWRM_DEFERRED);</div><div class='ctx'> 		goto async_event_process_exit;</div><div class='ctx'> 	}</div><div class='add'>+	case ASYNC_EVENT_CMPL_EVENT_ID_DBG_BUF_PRODUCER: {</div><div class='add'>+		u16 type = (u16)BNXT_EVENT_BUF_PRODUCER_TYPE(data1);</div><div class='add'>+		u32 offset =  BNXT_EVENT_BUF_PRODUCER_OFFSET(data2);</div><div class='add'>+</div><div class='add'>+		bnxt_bs_trace_check_wrap(&amp;bp-&gt;bs_trace[type], offset);</div><div class='add'>+		goto async_event_process_exit;</div><div class='add'>+	}</div><div class='ctx'> 	default:</div><div class='ctx'> 		goto async_event_process_exit;</div><div class='ctx'> 	}</div><div class='ctx'> 	__bnxt_queue_sp_work(bp);</div><div class='ctx'> async_event_process_exit:</div><div class='add'>+	bnxt_ulp_async_events(bp, cmpl);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2828,6 +2969,13 @@ static int bnxt_hwrm_handler(struct bnxt *bp, struct tx_cmp *txcmp)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool bnxt_vnic_is_active(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_vnic_info *vnic = &amp;bp-&gt;vnic_info[0];</div><div class='add'>+</div><div class='add'>+	return vnic-&gt;fw_vnic_id != INVALID_HW_RING_ID &amp;&amp; vnic-&gt;mru &gt; 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static irqreturn_t bnxt_msix(int irq, void *dev_instance)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_napi *bnapi = dev_instance;</div><div class='hunk'>@@ -2857,6 +3005,7 @@ static int __bnxt_poll_work(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_napi *bnapi = cpr-&gt;bnapi;</div><div class='ctx'> 	u32 raw_cons = cpr-&gt;cp_raw_cons;</div><div class='add'>+	bool flush_xdp = false;</div><div class='ctx'> 	u32 cons;</div><div class='ctx'> 	int rx_pkts = 0;</div><div class='ctx'> 	u8 event = 0;</div><div class='hunk'>@@ -2910,6 +3059,8 @@ static int __bnxt_poll_work(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,</div><div class='ctx'> 			else</div><div class='ctx'> 				rc = bnxt_force_rx_discard(bp, cpr, &amp;raw_cons,</div><div class='ctx'> 							   &amp;event);</div><div class='add'>+			if (event &amp; BNXT_REDIRECT_EVENT)</div><div class='add'>+				flush_xdp = true;</div><div class='ctx'> 			if (likely(rc &gt;= 0))</div><div class='ctx'> 				rx_pkts += rc;</div><div class='ctx'> 			/* Increment rx_pkts when rc is -ENOMEM to count towards</div><div class='hunk'>@@ -2934,7 +3085,7 @@ static int __bnxt_poll_work(struct bnxt *bp, struct bnxt_cp_ring_info *cpr,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (event &amp; BNXT_REDIRECT_EVENT) {</div><div class='add'>+	if (flush_xdp) {</div><div class='ctx'> 		xdp_do_flush();</div><div class='ctx'> 		event &amp;= ~BNXT_REDIRECT_EVENT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3095,7 +3246,7 @@ static int bnxt_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (bp-&gt;flags &amp; BNXT_FLAG_DIM) {</div><div class='add'>+	if ((bp-&gt;flags &amp; BNXT_FLAG_DIM) &amp;&amp; bnxt_vnic_is_active(bp)) {</div><div class='ctx'> 		struct dim_sample dim_sample = {};</div><div class='ctx'> </div><div class='ctx'> 		dim_update_sample(cpr-&gt;event_ctr,</div><div class='hunk'>@@ -3226,7 +3377,7 @@ static int bnxt_poll_p5(struct napi_struct *napi, int budget)</div><div class='ctx'> poll_done:</div><div class='ctx'> 	cpr_rx = &amp;cpr-&gt;cp_ring_arr[0];</div><div class='ctx'> 	if (cpr_rx-&gt;cp_ring_type == BNXT_NQ_HDL_TYPE_RX &amp;&amp;</div><div class='del'>-	    (bp-&gt;flags &amp; BNXT_FLAG_DIM)) {</div><div class='add'>+	    (bp-&gt;flags &amp; BNXT_FLAG_DIM) &amp;&amp; bnxt_vnic_is_active(bp)) {</div><div class='ctx'> 		struct dim_sample dim_sample = {};</div><div class='ctx'> </div><div class='ctx'> 		dim_update_sample(cpr-&gt;event_ctr,</div><div class='hunk'>@@ -3238,101 +3389,107 @@ poll_done:</div><div class='ctx'> 	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bnxt_free_tx_skbs(struct bnxt *bp)</div><div class='add'>+static void bnxt_free_one_tx_ring_skbs(struct bnxt *bp,</div><div class='add'>+				       struct bnxt_tx_ring_info *txr, int idx)</div><div class='ctx'> {</div><div class='ctx'> 	int i, max_idx;</div><div class='ctx'> 	struct pci_dev *pdev = bp-&gt;pdev;</div><div class='ctx'> </div><div class='del'>-	if (!bp-&gt;tx_ring)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	max_idx = bp-&gt;tx_nr_pages * TX_DESC_CNT;</div><div class='del'>-	for (i = 0; i &lt; bp-&gt;tx_nr_rings; i++) {</div><div class='del'>-		struct bnxt_tx_ring_info *txr = &amp;bp-&gt;tx_ring[i];</div><div class='del'>-		int j;</div><div class='ctx'> </div><div class='del'>-		if (!txr-&gt;tx_buf_ring)</div><div class='add'>+	for (i = 0; i &lt; max_idx;) {</div><div class='add'>+		struct bnxt_sw_tx_bd *tx_buf = &amp;txr-&gt;tx_buf_ring[i];</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+		int j, last;</div><div class='add'>+</div><div class='add'>+		if (idx  &lt; bp-&gt;tx_nr_rings_xdp &amp;&amp;</div><div class='add'>+		    tx_buf-&gt;action == XDP_REDIRECT) {</div><div class='add'>+			dma_unmap_single(&amp;pdev-&gt;dev,</div><div class='add'>+					 dma_unmap_addr(tx_buf, mapping),</div><div class='add'>+					 dma_unmap_len(tx_buf, len),</div><div class='add'>+					 DMA_TO_DEVICE);</div><div class='add'>+			xdp_return_frame(tx_buf-&gt;xdpf);</div><div class='add'>+			tx_buf-&gt;action = 0;</div><div class='add'>+			tx_buf-&gt;xdpf = NULL;</div><div class='add'>+			i++;</div><div class='ctx'> 			continue;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		for (j = 0; j &lt; max_idx;) {</div><div class='del'>-			struct bnxt_sw_tx_bd *tx_buf = &amp;txr-&gt;tx_buf_ring[j];</div><div class='del'>-			struct sk_buff *skb;</div><div class='del'>-			int k, last;</div><div class='del'>-</div><div class='del'>-			if (i &lt; bp-&gt;tx_nr_rings_xdp &amp;&amp;</div><div class='del'>-			    tx_buf-&gt;action == XDP_REDIRECT) {</div><div class='del'>-				dma_unmap_single(&amp;pdev-&gt;dev,</div><div class='del'>-					dma_unmap_addr(tx_buf, mapping),</div><div class='del'>-					dma_unmap_len(tx_buf, len),</div><div class='del'>-					DMA_TO_DEVICE);</div><div class='del'>-				xdp_return_frame(tx_buf-&gt;xdpf);</div><div class='del'>-				tx_buf-&gt;action = 0;</div><div class='del'>-				tx_buf-&gt;xdpf = NULL;</div><div class='del'>-				j++;</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='add'>+		skb = tx_buf-&gt;skb;</div><div class='add'>+		if (!skb) {</div><div class='add'>+			i++;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			skb = tx_buf-&gt;skb;</div><div class='del'>-			if (!skb) {</div><div class='del'>-				j++;</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='add'>+		tx_buf-&gt;skb = NULL;</div><div class='ctx'> </div><div class='del'>-			tx_buf-&gt;skb = NULL;</div><div class='add'>+		if (tx_buf-&gt;is_push) {</div><div class='add'>+			dev_kfree_skb(skb);</div><div class='add'>+			i += 2;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			if (tx_buf-&gt;is_push) {</div><div class='del'>-				dev_kfree_skb(skb);</div><div class='del'>-				j += 2;</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='add'>+		dma_unmap_single(&amp;pdev-&gt;dev,</div><div class='add'>+				 dma_unmap_addr(tx_buf, mapping),</div><div class='add'>+				 skb_headlen(skb),</div><div class='add'>+				 DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='del'>-			dma_unmap_single(&amp;pdev-&gt;dev,</div><div class='del'>-					 dma_unmap_addr(tx_buf, mapping),</div><div class='del'>-					 skb_headlen(skb),</div><div class='del'>-					 DMA_TO_DEVICE);</div><div class='add'>+		last = tx_buf-&gt;nr_frags;</div><div class='add'>+		i += 2;</div><div class='add'>+		for (j = 0; j &lt; last; j++, i++) {</div><div class='add'>+			int ring_idx = i &amp; bp-&gt;tx_ring_mask;</div><div class='add'>+			skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[j];</div><div class='ctx'> </div><div class='del'>-			last = tx_buf-&gt;nr_frags;</div><div class='del'>-			j += 2;</div><div class='del'>-			for (k = 0; k &lt; last; k++, j++) {</div><div class='del'>-				int ring_idx = j &amp; bp-&gt;tx_ring_mask;</div><div class='del'>-				skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[k];</div><div class='del'>-</div><div class='del'>-				tx_buf = &amp;txr-&gt;tx_buf_ring[ring_idx];</div><div class='del'>-				dma_unmap_page(</div><div class='del'>-					&amp;pdev-&gt;dev,</div><div class='del'>-					dma_unmap_addr(tx_buf, mapping),</div><div class='del'>-					skb_frag_size(frag), DMA_TO_DEVICE);</div><div class='del'>-			}</div><div class='del'>-			dev_kfree_skb(skb);</div><div class='add'>+			tx_buf = &amp;txr-&gt;tx_buf_ring[ring_idx];</div><div class='add'>+			netmem_dma_unmap_page_attrs(&amp;pdev-&gt;dev,</div><div class='add'>+						    dma_unmap_addr(tx_buf,</div><div class='add'>+								   mapping),</div><div class='add'>+						    skb_frag_size(frag),</div><div class='add'>+						    DMA_TO_DEVICE, 0);</div><div class='ctx'> 		}</div><div class='del'>-		netdev_tx_reset_queue(netdev_get_tx_queue(bp-&gt;dev, i));</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+	}</div><div class='add'>+	netdev_tx_reset_queue(netdev_get_tx_queue(bp-&gt;dev, idx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_free_tx_skbs(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!bp-&gt;tx_ring)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bp-&gt;tx_nr_rings; i++) {</div><div class='add'>+		struct bnxt_tx_ring_info *txr = &amp;bp-&gt;tx_ring[i];</div><div class='add'>+</div><div class='add'>+		if (!txr-&gt;tx_buf_ring)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		bnxt_free_one_tx_ring_skbs(bp, txr, i);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (bp-&gt;ptp_cfg &amp;&amp; !(bp-&gt;fw_cap &amp; BNXT_FW_CAP_TX_TS_CMP))</div><div class='add'>+		bnxt_ptp_free_txts_skbs(bp-&gt;ptp_cfg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnxt_free_one_rx_ring(struct bnxt *bp, struct bnxt_rx_ring_info *rxr)</div><div class='ctx'> {</div><div class='del'>-	struct pci_dev *pdev = bp-&gt;pdev;</div><div class='ctx'> 	int i, max_idx;</div><div class='ctx'> </div><div class='ctx'> 	max_idx = bp-&gt;rx_nr_pages * RX_DESC_CNT;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; max_idx; i++) {</div><div class='ctx'> 		struct bnxt_sw_rx_bd *rx_buf = &amp;rxr-&gt;rx_buf_ring[i];</div><div class='del'>-		dma_addr_t mapping = rx_buf-&gt;mapping;</div><div class='ctx'> 		void *data = rx_buf-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 		if (!data)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		rx_buf-&gt;data = NULL;</div><div class='del'>-		if (BNXT_RX_PAGE_MODE(bp)) {</div><div class='add'>+		if (BNXT_RX_PAGE_MODE(bp))</div><div class='ctx'> 			page_pool_recycle_direct(rxr-&gt;page_pool, data);</div><div class='del'>-		} else {</div><div class='del'>-			dma_unmap_single_attrs(&amp;pdev-&gt;dev, mapping,</div><div class='del'>-					       bp-&gt;rx_buf_use_size, bp-&gt;rx_dir,</div><div class='del'>-					       DMA_ATTR_WEAK_ORDERING);</div><div class='del'>-			skb_free_frag(data);</div><div class='del'>-		}</div><div class='add'>+		else</div><div class='add'>+			page_pool_free_va(rxr-&gt;head_pool, data, true);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3344,28 +3501,23 @@ static void bnxt_free_one_rx_agg_ring(struct bnxt *bp, struct bnxt_rx_ring_info</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; max_idx; i++) {</div><div class='ctx'> 		struct bnxt_sw_rx_agg_bd *rx_agg_buf = &amp;rxr-&gt;rx_agg_ring[i];</div><div class='del'>-		struct page *page = rx_agg_buf-&gt;page;</div><div class='add'>+		netmem_ref netmem = rx_agg_buf-&gt;netmem;</div><div class='ctx'> </div><div class='del'>-		if (!page)</div><div class='add'>+		if (!netmem)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		rx_agg_buf-&gt;page = NULL;</div><div class='add'>+		rx_agg_buf-&gt;netmem = 0;</div><div class='ctx'> 		__clear_bit(i, rxr-&gt;rx_agg_bmap);</div><div class='ctx'> </div><div class='del'>-		page_pool_recycle_direct(rxr-&gt;page_pool, page);</div><div class='add'>+		page_pool_recycle_direct_netmem(rxr-&gt;page_pool, netmem);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bnxt_free_one_rx_ring_skbs(struct bnxt *bp, int ring_nr)</div><div class='add'>+static void bnxt_free_one_tpa_info_data(struct bnxt *bp,</div><div class='add'>+					struct bnxt_rx_ring_info *rxr)</div><div class='ctx'> {</div><div class='del'>-	struct bnxt_rx_ring_info *rxr = &amp;bp-&gt;rx_ring[ring_nr];</div><div class='del'>-	struct pci_dev *pdev = bp-&gt;pdev;</div><div class='del'>-	struct bnxt_tpa_idx_map *map;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!rxr-&gt;rx_tpa)</div><div class='del'>-		goto skip_rx_tpa_free;</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; bp-&gt;max_tpa; i++) {</div><div class='ctx'> 		struct bnxt_tpa_info *tpa_info = &amp;rxr-&gt;rx_tpa[i];</div><div class='ctx'> 		u8 *data = tpa_info-&gt;data;</div><div class='hunk'>@@ -3373,14 +3525,20 @@ static void bnxt_free_one_rx_ring_skbs(struct bnxt *bp, int ring_nr)</div><div class='ctx'> 		if (!data)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		dma_unmap_single_attrs(&amp;pdev-&gt;dev, tpa_info-&gt;mapping,</div><div class='del'>-				       bp-&gt;rx_buf_use_size, bp-&gt;rx_dir,</div><div class='del'>-				       DMA_ATTR_WEAK_ORDERING);</div><div class='del'>-</div><div class='ctx'> 		tpa_info-&gt;data = NULL;</div><div class='del'>-</div><div class='del'>-		skb_free_frag(data);</div><div class='add'>+		page_pool_free_va(rxr-&gt;head_pool, data, false);</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_free_one_rx_ring_skbs(struct bnxt *bp,</div><div class='add'>+				       struct bnxt_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_tpa_idx_map *map;</div><div class='add'>+</div><div class='add'>+	if (!rxr-&gt;rx_tpa)</div><div class='add'>+		goto skip_rx_tpa_free;</div><div class='add'>+</div><div class='add'>+	bnxt_free_one_tpa_info_data(bp, rxr);</div><div class='ctx'> </div><div class='ctx'> skip_rx_tpa_free:</div><div class='ctx'> 	if (!rxr-&gt;rx_buf_ring)</div><div class='hunk'>@@ -3408,7 +3566,7 @@ static void bnxt_free_rx_skbs(struct bnxt *bp)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; bp-&gt;rx_nr_rings; i++)</div><div class='del'>-		bnxt_free_one_rx_ring_skbs(bp, i);</div><div class='add'>+		bnxt_free_one_rx_ring_skbs(bp, &amp;bp-&gt;rx_ring[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnxt_free_skbs(struct bnxt *bp)</div><div class='hunk'>@@ -3434,6 +3592,35 @@ static void bnxt_init_ctx_mem(struct bnxt_ctx_mem_type *ctxm, void *p, int len)</div><div class='ctx'> 		*(p2 + i + offset) = init_val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static size_t __bnxt_copy_ring(struct bnxt *bp, struct bnxt_ring_mem_info *rmem,</div><div class='add'>+			       void *buf, size_t offset, size_t head,</div><div class='add'>+			       size_t tail)</div><div class='add'>+{</div><div class='add'>+	int i, head_page, start_idx, source_offset;</div><div class='add'>+	size_t len, rem_len, total_len, max_bytes;</div><div class='add'>+</div><div class='add'>+	head_page = head / rmem-&gt;page_size;</div><div class='add'>+	source_offset = head % rmem-&gt;page_size;</div><div class='add'>+	total_len = (tail - head) &amp; MAX_CTX_BYTES_MASK;</div><div class='add'>+	if (!total_len)</div><div class='add'>+		total_len = MAX_CTX_BYTES;</div><div class='add'>+	start_idx = head_page % MAX_CTX_PAGES;</div><div class='add'>+	max_bytes = (rmem-&gt;nr_pages - start_idx) * rmem-&gt;page_size -</div><div class='add'>+		    source_offset;</div><div class='add'>+	total_len = min(total_len, max_bytes);</div><div class='add'>+	rem_len = total_len;</div><div class='add'>+</div><div class='add'>+	for (i = start_idx; rem_len; i++, source_offset = 0) {</div><div class='add'>+		len = min((size_t)(rmem-&gt;page_size - source_offset), rem_len);</div><div class='add'>+		if (buf)</div><div class='add'>+			memcpy(buf + offset, rmem-&gt;pg_arr[i] + source_offset,</div><div class='add'>+			       len);</div><div class='add'>+		offset += len;</div><div class='add'>+		rem_len -= len;</div><div class='add'>+	}</div><div class='add'>+	return total_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bnxt_free_ring(struct bnxt *bp, struct bnxt_ring_mem_info *rmem)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = bp-&gt;pdev;</div><div class='hunk'>@@ -3520,29 +3707,64 @@ static int bnxt_alloc_ring(struct bnxt *bp, struct bnxt_ring_mem_info *rmem)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_free_one_tpa_info(struct bnxt *bp,</div><div class='add'>+				   struct bnxt_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	kfree(rxr-&gt;rx_tpa_idx_map);</div><div class='add'>+	rxr-&gt;rx_tpa_idx_map = NULL;</div><div class='add'>+	if (rxr-&gt;rx_tpa) {</div><div class='add'>+		for (i = 0; i &lt; bp-&gt;max_tpa; i++) {</div><div class='add'>+			kfree(rxr-&gt;rx_tpa[i].agg_arr);</div><div class='add'>+			rxr-&gt;rx_tpa[i].agg_arr = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	kfree(rxr-&gt;rx_tpa);</div><div class='add'>+	rxr-&gt;rx_tpa = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bnxt_free_tpa_info(struct bnxt *bp)</div><div class='ctx'> {</div><div class='del'>-	int i, j;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; bp-&gt;rx_nr_rings; i++) {</div><div class='ctx'> 		struct bnxt_rx_ring_info *rxr = &amp;bp-&gt;rx_ring[i];</div><div class='ctx'> </div><div class='del'>-		kfree(rxr-&gt;rx_tpa_idx_map);</div><div class='del'>-		rxr-&gt;rx_tpa_idx_map = NULL;</div><div class='del'>-		if (rxr-&gt;rx_tpa) {</div><div class='del'>-			for (j = 0; j &lt; bp-&gt;max_tpa; j++) {</div><div class='del'>-				kfree(rxr-&gt;rx_tpa[j].agg_arr);</div><div class='del'>-				rxr-&gt;rx_tpa[j].agg_arr = NULL;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		kfree(rxr-&gt;rx_tpa);</div><div class='del'>-		rxr-&gt;rx_tpa = NULL;</div><div class='add'>+		bnxt_free_one_tpa_info(bp, rxr);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnxt_alloc_one_tpa_info(struct bnxt *bp,</div><div class='add'>+				   struct bnxt_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	struct rx_agg_cmp *agg;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	rxr-&gt;rx_tpa = kcalloc(bp-&gt;max_tpa, sizeof(struct bnxt_tpa_info),</div><div class='add'>+			      GFP_KERNEL);</div><div class='add'>+	if (!rxr-&gt;rx_tpa)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (!(bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS))</div><div class='add'>+		return 0;</div><div class='add'>+	for (i = 0; i &lt; bp-&gt;max_tpa; i++) {</div><div class='add'>+		agg = kcalloc(MAX_SKB_FRAGS, sizeof(*agg), GFP_KERNEL);</div><div class='add'>+		if (!agg)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		rxr-&gt;rx_tpa[i].agg_arr = agg;</div><div class='add'>+	}</div><div class='add'>+	rxr-&gt;rx_tpa_idx_map = kzalloc(sizeof(*rxr-&gt;rx_tpa_idx_map),</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+	if (!rxr-&gt;rx_tpa_idx_map)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnxt_alloc_tpa_info(struct bnxt *bp)</div><div class='ctx'> {</div><div class='del'>-	int i, j;</div><div class='add'>+	int i, rc;</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;max_tpa = MAX_TPA;</div><div class='ctx'> 	if (bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS) {</div><div class='hunk'>@@ -3553,25 +3775,10 @@ static int bnxt_alloc_tpa_info(struct bnxt *bp)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; bp-&gt;rx_nr_rings; i++) {</div><div class='ctx'> 		struct bnxt_rx_ring_info *rxr = &amp;bp-&gt;rx_ring[i];</div><div class='del'>-		struct rx_agg_cmp *agg;</div><div class='del'>-</div><div class='del'>-		rxr-&gt;rx_tpa = kcalloc(bp-&gt;max_tpa, sizeof(struct bnxt_tpa_info),</div><div class='del'>-				      GFP_KERNEL);</div><div class='del'>-		if (!rxr-&gt;rx_tpa)</div><div class='del'>-			return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		if (!(bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS))</div><div class='del'>-			continue;</div><div class='del'>-		for (j = 0; j &lt; bp-&gt;max_tpa; j++) {</div><div class='del'>-			agg = kcalloc(MAX_SKB_FRAGS, sizeof(*agg), GFP_KERNEL);</div><div class='del'>-			if (!agg)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-			rxr-&gt;rx_tpa[j].agg_arr = agg;</div><div class='del'>-		}</div><div class='del'>-		rxr-&gt;rx_tpa_idx_map = kzalloc(sizeof(*rxr-&gt;rx_tpa_idx_map),</div><div class='del'>-					      GFP_KERNEL);</div><div class='del'>-		if (!rxr-&gt;rx_tpa_idx_map)</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+		rc = bnxt_alloc_one_tpa_info(bp, rxr);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3595,7 +3802,8 @@ static void bnxt_free_rx_rings(struct bnxt *bp)</div><div class='ctx'> 			xdp_rxq_info_unreg(&amp;rxr-&gt;xdp_rxq);</div><div class='ctx'> </div><div class='ctx'> 		page_pool_destroy(rxr-&gt;page_pool);</div><div class='del'>-		rxr-&gt;page_pool = NULL;</div><div class='add'>+		page_pool_destroy(rxr-&gt;head_pool);</div><div class='add'>+		rxr-&gt;page_pool = rxr-&gt;head_pool = NULL;</div><div class='ctx'> </div><div class='ctx'> 		kfree(rxr-&gt;rx_agg_bmap);</div><div class='ctx'> 		rxr-&gt;rx_agg_bmap = NULL;</div><div class='hunk'>@@ -3612,26 +3820,64 @@ static int bnxt_alloc_rx_page_pool(struct bnxt *bp,</div><div class='ctx'> 				   struct bnxt_rx_ring_info *rxr,</div><div class='ctx'> 				   int numa_node)</div><div class='ctx'> {</div><div class='add'>+	const unsigned int agg_size_fac = PAGE_SIZE / BNXT_RX_PAGE_SIZE;</div><div class='add'>+	const unsigned int rx_size_fac = PAGE_SIZE / SZ_4K;</div><div class='ctx'> 	struct page_pool_params pp = { 0 };</div><div class='add'>+	struct page_pool *pool;</div><div class='ctx'> </div><div class='del'>-	pp.pool_size = bp-&gt;rx_agg_ring_size;</div><div class='add'>+	pp.pool_size = bp-&gt;rx_agg_ring_size / agg_size_fac;</div><div class='ctx'> 	if (BNXT_RX_PAGE_MODE(bp))</div><div class='del'>-		pp.pool_size += bp-&gt;rx_ring_size;</div><div class='add'>+		pp.pool_size += bp-&gt;rx_ring_size / rx_size_fac;</div><div class='ctx'> 	pp.nid = numa_node;</div><div class='del'>-	pp.napi = &amp;rxr-&gt;bnapi-&gt;napi;</div><div class='ctx'> 	pp.netdev = bp-&gt;dev;</div><div class='ctx'> 	pp.dev = &amp;bp-&gt;pdev-&gt;dev;</div><div class='ctx'> 	pp.dma_dir = bp-&gt;rx_dir;</div><div class='ctx'> 	pp.max_len = PAGE_SIZE;</div><div class='del'>-	pp.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;</div><div class='add'>+	pp.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV |</div><div class='add'>+		   PP_FLAG_ALLOW_UNREADABLE_NETMEM;</div><div class='add'>+	pp.queue_idx = rxr-&gt;bnapi-&gt;index;</div><div class='add'>+</div><div class='add'>+	pool = page_pool_create(&amp;pp);</div><div class='add'>+	if (IS_ERR(pool))</div><div class='add'>+		return PTR_ERR(pool);</div><div class='add'>+	rxr-&gt;page_pool = pool;</div><div class='add'>+</div><div class='add'>+	rxr-&gt;need_head_pool = page_pool_is_unreadable(pool);</div><div class='add'>+	if (bnxt_separate_head_pool(rxr)) {</div><div class='add'>+		pp.pool_size = min(bp-&gt;rx_ring_size / rx_size_fac, 1024);</div><div class='add'>+		pp.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;</div><div class='add'>+		pool = page_pool_create(&amp;pp);</div><div class='add'>+		if (IS_ERR(pool))</div><div class='add'>+			goto err_destroy_pp;</div><div class='add'>+	} else {</div><div class='add'>+		page_pool_get(pool);</div><div class='add'>+	}</div><div class='add'>+	rxr-&gt;head_pool = pool;</div><div class='ctx'> </div><div class='del'>-	rxr-&gt;page_pool = page_pool_create(&amp;pp);</div><div class='del'>-	if (IS_ERR(rxr-&gt;page_pool)) {</div><div class='del'>-		int err = PTR_ERR(rxr-&gt;page_pool);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_destroy_pp:</div><div class='add'>+	page_pool_destroy(rxr-&gt;page_pool);</div><div class='add'>+	rxr-&gt;page_pool = NULL;</div><div class='add'>+	return PTR_ERR(pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_enable_rx_page_pool(struct bnxt_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	page_pool_enable_direct_recycling(rxr-&gt;head_pool, &amp;rxr-&gt;bnapi-&gt;napi);</div><div class='add'>+	page_pool_enable_direct_recycling(rxr-&gt;page_pool, &amp;rxr-&gt;bnapi-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_alloc_rx_agg_bmap(struct bnxt *bp, struct bnxt_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	u16 mem_size;</div><div class='add'>+</div><div class='add'>+	rxr-&gt;rx_agg_bmap_size = bp-&gt;rx_agg_ring_mask + 1;</div><div class='add'>+	mem_size = rxr-&gt;rx_agg_bmap_size / 8;</div><div class='add'>+	rxr-&gt;rx_agg_bmap = kzalloc(mem_size, GFP_KERNEL);</div><div class='add'>+	if (!rxr-&gt;rx_agg_bmap)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		rxr-&gt;page_pool = NULL;</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3660,6 +3906,7 @@ static int bnxt_alloc_rx_rings(struct bnxt *bp)</div><div class='ctx'> 		rc = bnxt_alloc_rx_page_pool(bp, rxr, cpu_node);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			return rc;</div><div class='add'>+		bnxt_enable_rx_page_pool(rxr);</div><div class='ctx'> </div><div class='ctx'> 		rc = xdp_rxq_info_reg(&amp;rxr-&gt;xdp_rxq, bp-&gt;dev, i, 0);</div><div class='ctx'> 		if (rc &lt; 0)</div><div class='hunk'>@@ -3679,19 +3926,15 @@ static int bnxt_alloc_rx_rings(struct bnxt *bp)</div><div class='ctx'> </div><div class='ctx'> 		ring-&gt;grp_idx = i;</div><div class='ctx'> 		if (agg_rings) {</div><div class='del'>-			u16 mem_size;</div><div class='del'>-</div><div class='ctx'> 			ring = &amp;rxr-&gt;rx_agg_ring_struct;</div><div class='ctx'> 			rc = bnxt_alloc_ring(bp, &amp;ring-&gt;ring_mem);</div><div class='ctx'> 			if (rc)</div><div class='ctx'> 				return rc;</div><div class='ctx'> </div><div class='ctx'> 			ring-&gt;grp_idx = i;</div><div class='del'>-			rxr-&gt;rx_agg_bmap_size = bp-&gt;rx_agg_ring_mask + 1;</div><div class='del'>-			mem_size = rxr-&gt;rx_agg_bmap_size / 8;</div><div class='del'>-			rxr-&gt;rx_agg_bmap = kzalloc(mem_size, GFP_KERNEL);</div><div class='del'>-			if (!rxr-&gt;rx_agg_bmap)</div><div class='del'>-				return -ENOMEM;</div><div class='add'>+			rc = bnxt_alloc_rx_agg_bmap(bp, rxr);</div><div class='add'>+			if (rc)</div><div class='add'>+				return rc;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (bp-&gt;flags &amp; BNXT_FLAG_TPA)</div><div class='hunk'>@@ -4023,6 +4266,8 @@ static void bnxt_reset_rx_ring_struct(struct bnxt *bp,</div><div class='ctx'> </div><div class='ctx'> 	rxr-&gt;page_pool-&gt;p.napi = NULL;</div><div class='ctx'> 	rxr-&gt;page_pool = NULL;</div><div class='add'>+	rxr-&gt;head_pool-&gt;p.napi = NULL;</div><div class='add'>+	rxr-&gt;head_pool = NULL;</div><div class='ctx'> 	memset(&amp;rxr-&gt;xdp_rxq, 0, sizeof(struct xdp_rxq_info));</div><div class='ctx'> </div><div class='ctx'> 	ring = &amp;rxr-&gt;rx_ring_struct;</div><div class='hunk'>@@ -4147,18 +4392,18 @@ static void bnxt_alloc_one_rx_ring_skb(struct bnxt *bp,</div><div class='ctx'> 	rxr-&gt;rx_prod = prod;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bnxt_alloc_one_rx_ring_page(struct bnxt *bp,</div><div class='del'>-					struct bnxt_rx_ring_info *rxr,</div><div class='del'>-					int ring_nr)</div><div class='add'>+static void bnxt_alloc_one_rx_ring_netmem(struct bnxt *bp,</div><div class='add'>+					  struct bnxt_rx_ring_info *rxr,</div><div class='add'>+					  int ring_nr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 prod;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	prod = rxr-&gt;rx_agg_prod;</div><div class='ctx'> 	for (i = 0; i &lt; bp-&gt;rx_agg_ring_size; i++) {</div><div class='del'>-		if (bnxt_alloc_rx_page(bp, rxr, prod, GFP_KERNEL)) {</div><div class='add'>+		if (bnxt_alloc_rx_netmem(bp, rxr, prod, GFP_KERNEL)) {</div><div class='ctx'> 			netdev_warn(bp-&gt;dev, "init'ed rx ring %d with %d/%d pages only\n",</div><div class='del'>-				    ring_nr, i, bp-&gt;rx_ring_size);</div><div class='add'>+				    ring_nr, i, bp-&gt;rx_agg_ring_size);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		prod = NEXT_RX_AGG(prod);</div><div class='hunk'>@@ -4166,31 +4411,43 @@ static void bnxt_alloc_one_rx_ring_page(struct bnxt *bp,</div><div class='ctx'> 	rxr-&gt;rx_agg_prod = prod;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnxt_alloc_one_tpa_info_data(struct bnxt *bp,</div><div class='add'>+					struct bnxt_rx_ring_info *rxr)</div><div class='add'>+{</div><div class='add'>+	dma_addr_t mapping;</div><div class='add'>+	u8 *data;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bp-&gt;max_tpa; i++) {</div><div class='add'>+		data = __bnxt_alloc_rx_frag(bp, &amp;mapping, rxr,</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+		if (!data)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		rxr-&gt;rx_tpa[i].data = data;</div><div class='add'>+		rxr-&gt;rx_tpa[i].data_ptr = data + bp-&gt;rx_offset;</div><div class='add'>+		rxr-&gt;rx_tpa[i].mapping = mapping;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnxt_alloc_one_rx_ring(struct bnxt *bp, int ring_nr)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_rx_ring_info *rxr = &amp;bp-&gt;rx_ring[ring_nr];</div><div class='del'>-	int i;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	bnxt_alloc_one_rx_ring_skb(bp, rxr, ring_nr);</div><div class='ctx'> </div><div class='ctx'> 	if (!(bp-&gt;flags &amp; BNXT_FLAG_AGG_RINGS))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	bnxt_alloc_one_rx_ring_page(bp, rxr, ring_nr);</div><div class='add'>+	bnxt_alloc_one_rx_ring_netmem(bp, rxr, ring_nr);</div><div class='ctx'> </div><div class='ctx'> 	if (rxr-&gt;rx_tpa) {</div><div class='del'>-		dma_addr_t mapping;</div><div class='del'>-		u8 *data;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; bp-&gt;max_tpa; i++) {</div><div class='del'>-			data = __bnxt_alloc_rx_frag(bp, &amp;mapping, GFP_KERNEL);</div><div class='del'>-			if (!data)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-</div><div class='del'>-			rxr-&gt;rx_tpa[i].data = data;</div><div class='del'>-			rxr-&gt;rx_tpa[i].data_ptr = data + bp-&gt;rx_offset;</div><div class='del'>-			rxr-&gt;rx_tpa[i].mapping = mapping;</div><div class='del'>-		}</div><div class='add'>+		rc = bnxt_alloc_one_tpa_info_data(bp, rxr);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -4222,7 +4479,14 @@ static void bnxt_init_one_rx_agg_ring_rxbd(struct bnxt *bp,</div><div class='ctx'> 	ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='ctx'> 	if ((bp-&gt;flags &amp; BNXT_FLAG_AGG_RINGS)) {</div><div class='ctx'> 		type = ((u32)BNXT_RX_PAGE_SIZE &lt;&lt; RX_BD_LEN_SHIFT) |</div><div class='del'>-			RX_BD_TYPE_RX_AGG_BD | RX_BD_FLAGS_SOP;</div><div class='add'>+			RX_BD_TYPE_RX_AGG_BD;</div><div class='add'>+</div><div class='add'>+		/* On P7, setting EOP will cause the chip to disable</div><div class='add'>+		 * Relaxed Ordering (RO) for TPA data.  Disable EOP for</div><div class='add'>+		 * potentially higher performance with RO.</div><div class='add'>+		 */</div><div class='add'>+		if (BNXT_CHIP_P5_AND_MINUS(bp) || !(bp-&gt;flags &amp; BNXT_FLAG_TPA))</div><div class='add'>+			type |= RX_BD_FLAGS_AGG_EOP;</div><div class='ctx'> </div><div class='ctx'> 		bnxt_init_rxbd_pages(ring, type);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4453,6 +4717,17 @@ void bnxt_set_tpa_flags(struct bnxt *bp)</div><div class='ctx'> 		bp-&gt;flags |= BNXT_FLAG_GRO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_init_ring_params(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	unsigned int rx_size;</div><div class='add'>+</div><div class='add'>+	bp-&gt;rx_copybreak = BNXT_DEFAULT_RX_COPYBREAK;</div><div class='add'>+	/* Try to fit 4 chunks into a 4k page */</div><div class='add'>+	rx_size = SZ_1K -</div><div class='add'>+		NET_SKB_PAD - SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='add'>+	bp-&gt;dev-&gt;cfg-&gt;hds_thresh = max(BNXT_DEFAULT_RX_COPYBREAK, rx_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* bp-&gt;rx_ring_size, bp-&gt;tx_ring_size, dev-&gt;mtu, BNXT_FLAG_{G|L}RO flags must</div><div class='ctx'>  * be set on entry.</div><div class='ctx'>  */</div><div class='hunk'>@@ -4467,12 +4742,11 @@ void bnxt_set_ring_params(struct bnxt *bp)</div><div class='ctx'> 	rx_space = rx_size + ALIGN(max(NET_SKB_PAD, XDP_PACKET_HEADROOM), 8) +</div><div class='ctx'> 		SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='ctx'> </div><div class='del'>-	bp-&gt;rx_copy_thresh = BNXT_RX_COPY_THRESH;</div><div class='ctx'> 	ring_size = bp-&gt;rx_ring_size;</div><div class='ctx'> 	bp-&gt;rx_agg_ring_size = 0;</div><div class='ctx'> 	bp-&gt;rx_agg_nr_pages = 0;</div><div class='ctx'> </div><div class='del'>-	if (bp-&gt;flags &amp; BNXT_FLAG_TPA)</div><div class='add'>+	if (bp-&gt;flags &amp; BNXT_FLAG_TPA || bp-&gt;flags &amp; BNXT_FLAG_HDS)</div><div class='ctx'> 		agg_factor = min_t(u32, 4, 65536 / BNXT_RX_PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;flags &amp;= ~BNXT_FLAG_JUMBO;</div><div class='hunk'>@@ -4512,7 +4786,10 @@ void bnxt_set_ring_params(struct bnxt *bp)</div><div class='ctx'> 				  ALIGN(max(NET_SKB_PAD, XDP_PACKET_HEADROOM), 8) -</div><div class='ctx'> 				  SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='ctx'> 		} else {</div><div class='del'>-			rx_size = SKB_DATA_ALIGN(BNXT_RX_COPY_THRESH + NET_IP_ALIGN);</div><div class='add'>+			rx_size = max3(BNXT_DEFAULT_RX_COPYBREAK,</div><div class='add'>+				       bp-&gt;rx_copybreak,</div><div class='add'>+				       bp-&gt;dev-&gt;cfg_pending-&gt;hds_thresh);</div><div class='add'>+			rx_size = SKB_DATA_ALIGN(rx_size + NET_IP_ALIGN);</div><div class='ctx'> 			rx_space = rx_size + NET_SKB_PAD +</div><div class='ctx'> 				SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='ctx'> 		}</div><div class='hunk'>@@ -4553,12 +4830,12 @@ void bnxt_set_ring_params(struct bnxt *bp)</div><div class='ctx'> /* Changing allocation mode of RX rings.</div><div class='ctx'>  * TODO: Update when extending xdp_rxq_info to support allocation modes.</div><div class='ctx'>  */</div><div class='del'>-int bnxt_set_rx_skb_mode(struct bnxt *bp, bool page_mode)</div><div class='add'>+static void __bnxt_set_rx_skb_mode(struct bnxt *bp, bool page_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = bp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (page_mode) {</div><div class='del'>-		bp-&gt;flags &amp;= ~BNXT_FLAG_AGG_RINGS;</div><div class='add'>+		bp-&gt;flags &amp;= ~(BNXT_FLAG_AGG_RINGS | BNXT_FLAG_NO_AGG_RINGS);</div><div class='ctx'> 		bp-&gt;flags |= BNXT_FLAG_RX_PAGE_MODE;</div><div class='ctx'> </div><div class='ctx'> 		if (bp-&gt;xdp_prog-&gt;aux-&gt;xdp_has_frags)</div><div class='hunk'>@@ -4574,15 +4851,30 @@ int bnxt_set_rx_skb_mode(struct bnxt *bp, bool page_mode)</div><div class='ctx'> 			bp-&gt;rx_skb_func = bnxt_rx_page_skb;</div><div class='ctx'> 		}</div><div class='ctx'> 		bp-&gt;rx_dir = DMA_BIDIRECTIONAL;</div><div class='del'>-		/* Disable LRO or GRO_HW */</div><div class='del'>-		netdev_update_features(dev);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev-&gt;max_mtu = bp-&gt;max_mtu;</div><div class='ctx'> 		bp-&gt;flags &amp;= ~BNXT_FLAG_RX_PAGE_MODE;</div><div class='ctx'> 		bp-&gt;rx_dir = DMA_FROM_DEVICE;</div><div class='ctx'> 		bp-&gt;rx_skb_func = bnxt_rx_skb;</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnxt_set_rx_skb_mode(struct bnxt *bp, bool page_mode)</div><div class='add'>+{</div><div class='add'>+	__bnxt_set_rx_skb_mode(bp, page_mode);</div><div class='add'>+</div><div class='add'>+	if (!page_mode) {</div><div class='add'>+		int rx, tx;</div><div class='add'>+</div><div class='add'>+		bnxt_get_max_rings(bp, &amp;rx, &amp;tx, true);</div><div class='add'>+		if (rx &gt; 1) {</div><div class='add'>+			bp-&gt;flags &amp;= ~BNXT_FLAG_NO_AGG_RINGS;</div><div class='add'>+			bp-&gt;dev-&gt;hw_features |= NETIF_F_LRO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update LRO and GRO_HW availability */</div><div class='add'>+	netdev_update_features(bp-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnxt_free_vnic_attributes(struct bnxt *bp)</div><div class='hunk'>@@ -5053,8 +5345,10 @@ static void bnxt_free_ntp_fltrs(struct bnxt *bp, bool all)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	/* Under rtnl_lock and all our NAPIs have been disabled.  It's</div><div class='del'>-	 * safe to delete the hash table.</div><div class='add'>+	netdev_assert_locked_or_invisible(bp-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/* Under netdev instance lock and all our NAPIs have been disabled.</div><div class='add'>+	 * It's safe to delete the hash table.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; BNXT_NTP_FLTR_HASH_SIZE; i++) {</div><div class='ctx'> 		struct hlist_head *head;</div><div class='hunk'>@@ -5382,6 +5676,8 @@ int bnxt_hwrm_func_drv_rgtr(struct bnxt *bp, unsigned long *bmap, int bmap_size,</div><div class='ctx'> 	if (bp-&gt;fw_cap &amp; BNXT_FW_CAP_ERROR_RECOVERY)</div><div class='ctx'> 		flags |= FUNC_DRV_RGTR_REQ_FLAGS_ERROR_RECOVERY_SUPPORT |</div><div class='ctx'> 			 FUNC_DRV_RGTR_REQ_FLAGS_MASTER_SUPPORT;</div><div class='add'>+	if (bp-&gt;fw_cap &amp; BNXT_FW_CAP_NPAR_1_2)</div><div class='add'>+		flags |= FUNC_DRV_RGTR_REQ_FLAGS_NPAR_1_2_SUPPORT;</div><div class='ctx'> 	req-&gt;flags = cpu_to_le32(flags);</div><div class='ctx'> 	req-&gt;ver_maj_8b = DRV_VER_MAJ;</div><div class='ctx'> 	req-&gt;ver_min_8b = DRV_VER_MIN;</div><div class='hunk'>@@ -5399,6 +5695,10 @@ int bnxt_hwrm_func_drv_rgtr(struct bnxt *bp, unsigned long *bmap, int bmap_size,</div><div class='ctx'> 			u16 cmd = bnxt_vf_req_snif[i];</div><div class='ctx'> 			unsigned int bit, idx;</div><div class='ctx'> </div><div class='add'>+			if ((bp-&gt;fw_cap &amp; BNXT_FW_CAP_LINK_ADMIN) &amp;&amp;</div><div class='add'>+			    cmd == HWRM_PORT_PHY_QCFG)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='ctx'> 			idx = cmd / 32;</div><div class='ctx'> 			bit = cmd % 32;</div><div class='ctx'> 			data[idx] |= 1 &lt;&lt; bit;</div><div class='hunk'>@@ -6409,6 +6709,7 @@ static void bnxt_hwrm_update_rss_hash_cfg(struct bnxt *bp)</div><div class='ctx'> </div><div class='ctx'> static int bnxt_hwrm_vnic_set_hds(struct bnxt *bp, struct bnxt_vnic_info *vnic)</div><div class='ctx'> {</div><div class='add'>+	u16 hds_thresh = (u16)bp-&gt;dev-&gt;cfg_pending-&gt;hds_thresh;</div><div class='ctx'> 	struct hwrm_vnic_plcmodes_cfg_input *req;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='hunk'>@@ -6418,16 +6719,14 @@ static int bnxt_hwrm_vnic_set_hds(struct bnxt *bp, struct bnxt_vnic_info *vnic)</div><div class='ctx'> </div><div class='ctx'> 	req-&gt;flags = cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_JUMBO_PLACEMENT);</div><div class='ctx'> 	req-&gt;enables = cpu_to_le32(VNIC_PLCMODES_CFG_REQ_ENABLES_JUMBO_THRESH_VALID);</div><div class='add'>+	req-&gt;jumbo_thresh = cpu_to_le16(bp-&gt;rx_buf_use_size);</div><div class='ctx'> </div><div class='del'>-	if (BNXT_RX_PAGE_MODE(bp)) {</div><div class='del'>-		req-&gt;jumbo_thresh = cpu_to_le16(bp-&gt;rx_buf_use_size);</div><div class='del'>-	} else {</div><div class='add'>+	if (!BNXT_RX_PAGE_MODE(bp) &amp;&amp; (bp-&gt;flags &amp; BNXT_FLAG_AGG_RINGS)) {</div><div class='ctx'> 		req-&gt;flags |= cpu_to_le32(VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV4 |</div><div class='ctx'> 					  VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV6);</div><div class='ctx'> 		req-&gt;enables |=</div><div class='ctx'> 			cpu_to_le32(VNIC_PLCMODES_CFG_REQ_ENABLES_HDS_THRESHOLD_VALID);</div><div class='del'>-		req-&gt;jumbo_thresh = cpu_to_le16(bp-&gt;rx_copy_thresh);</div><div class='del'>-		req-&gt;hds_threshold = cpu_to_le16(bp-&gt;rx_copy_thresh);</div><div class='add'>+		req-&gt;hds_threshold = cpu_to_le16(hds_thresh);</div><div class='ctx'> 	}</div><div class='ctx'> 	req-&gt;vnic_id = cpu_to_le32(vnic-&gt;fw_vnic_id);</div><div class='ctx'> 	return hwrm_req_send(bp, req);</div><div class='hunk'>@@ -6550,7 +6849,7 @@ int bnxt_hwrm_vnic_cfg(struct bnxt *bp, struct bnxt_vnic_info *vnic)</div><div class='ctx'> 	req-&gt;dflt_ring_grp = cpu_to_le16(bp-&gt;grp_info[grp_idx].fw_grp_id);</div><div class='ctx'> 	req-&gt;lb_rule = cpu_to_le16(0xffff);</div><div class='ctx'> vnic_mru:</div><div class='del'>-	vnic-&gt;mru = bp-&gt;dev-&gt;mtu + ETH_HLEN + VLAN_HLEN;</div><div class='add'>+	vnic-&gt;mru = bp-&gt;dev-&gt;mtu + VLAN_ETH_HLEN;</div><div class='ctx'> 	req-&gt;mru = cpu_to_le16(vnic-&gt;mru);</div><div class='ctx'> </div><div class='ctx'> 	req-&gt;vnic_id = cpu_to_le16(vnic-&gt;fw_vnic_id);</div><div class='hunk'>@@ -6687,6 +6986,8 @@ static int bnxt_hwrm_vnic_qcaps(struct bnxt *bp)</div><div class='ctx'> 			bp-&gt;rss_cap |= BNXT_RSS_CAP_ESP_V4_RSS_CAP;</div><div class='ctx'> 		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_RSS_IPSEC_ESP_SPI_IPV6_CAP)</div><div class='ctx'> 			bp-&gt;rss_cap |= BNXT_RSS_CAP_ESP_V6_RSS_CAP;</div><div class='add'>+		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_RSS_IPV6_FLOW_LABEL_CAP)</div><div class='add'>+			bp-&gt;rss_cap |= BNXT_RSS_CAP_IPV6_FLOW_LABEL_RSS_CAP;</div><div class='ctx'> 		if (flags &amp; VNIC_QCAPS_RESP_FLAGS_RE_FLUSH_CAP)</div><div class='ctx'> 			bp-&gt;fw_cap |= BNXT_FW_CAP_VNIC_RE_FLUSH;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6753,6 +7054,30 @@ static void bnxt_hwrm_ring_grp_free(struct bnxt *bp)</div><div class='ctx'> 	hwrm_req_drop(bp, req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_set_rx_ring_params_p5(struct bnxt *bp, u32 ring_type,</div><div class='add'>+				       struct hwrm_ring_alloc_input *req,</div><div class='add'>+				       struct bnxt_ring_struct *ring)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ring_grp_info *grp_info = &amp;bp-&gt;grp_info[ring-&gt;grp_idx];</div><div class='add'>+	u32 enables = RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID |</div><div class='add'>+		      RING_ALLOC_REQ_ENABLES_NQ_RING_ID_VALID;</div><div class='add'>+</div><div class='add'>+	if (ring_type == HWRM_RING_ALLOC_AGG) {</div><div class='add'>+		req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG;</div><div class='add'>+		req-&gt;rx_ring_id = cpu_to_le16(grp_info-&gt;rx_fw_ring_id);</div><div class='add'>+		req-&gt;rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE);</div><div class='add'>+		enables |= RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID;</div><div class='add'>+	} else {</div><div class='add'>+		req-&gt;rx_buf_size = cpu_to_le16(bp-&gt;rx_buf_use_size);</div><div class='add'>+		if (NET_IP_ALIGN == 2)</div><div class='add'>+			req-&gt;flags =</div><div class='add'>+				cpu_to_le16(RING_ALLOC_REQ_FLAGS_RX_SOP_PAD);</div><div class='add'>+	}</div><div class='add'>+	req-&gt;stat_ctx_id = cpu_to_le32(grp_info-&gt;fw_stats_ctx);</div><div class='add'>+	req-&gt;nq_ring_id = cpu_to_le16(grp_info-&gt;cp_fw_ring_id);</div><div class='add'>+	req-&gt;enables |= cpu_to_le32(enables);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hwrm_ring_alloc_send_msg(struct bnxt *bp,</div><div class='ctx'> 				    struct bnxt_ring_struct *ring,</div><div class='ctx'> 				    u32 ring_type, u32 map_index)</div><div class='hunk'>@@ -6804,37 +7129,13 @@ static int hwrm_ring_alloc_send_msg(struct bnxt *bp,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case HWRM_RING_ALLOC_RX:</div><div class='del'>-		req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_RX;</div><div class='del'>-		req-&gt;length = cpu_to_le32(bp-&gt;rx_ring_mask + 1);</div><div class='del'>-		if (bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS) {</div><div class='del'>-			u16 flags = 0;</div><div class='del'>-</div><div class='del'>-			/* Association of rx ring with stats context */</div><div class='del'>-			grp_info = &amp;bp-&gt;grp_info[ring-&gt;grp_idx];</div><div class='del'>-			req-&gt;rx_buf_size = cpu_to_le16(bp-&gt;rx_buf_use_size);</div><div class='del'>-			req-&gt;stat_ctx_id = cpu_to_le32(grp_info-&gt;fw_stats_ctx);</div><div class='del'>-			req-&gt;enables |= cpu_to_le32(</div><div class='del'>-				RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID);</div><div class='del'>-			if (NET_IP_ALIGN == 2)</div><div class='del'>-				flags = RING_ALLOC_REQ_FLAGS_RX_SOP_PAD;</div><div class='del'>-			req-&gt;flags = cpu_to_le16(flags);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='ctx'> 	case HWRM_RING_ALLOC_AGG:</div><div class='del'>-		if (bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS) {</div><div class='del'>-			req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_RX_AGG;</div><div class='del'>-			/* Association of agg ring with rx ring */</div><div class='del'>-			grp_info = &amp;bp-&gt;grp_info[ring-&gt;grp_idx];</div><div class='del'>-			req-&gt;rx_ring_id = cpu_to_le16(grp_info-&gt;rx_fw_ring_id);</div><div class='del'>-			req-&gt;rx_buf_size = cpu_to_le16(BNXT_RX_PAGE_SIZE);</div><div class='del'>-			req-&gt;stat_ctx_id = cpu_to_le32(grp_info-&gt;fw_stats_ctx);</div><div class='del'>-			req-&gt;enables |= cpu_to_le32(</div><div class='del'>-				RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID |</div><div class='del'>-				RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID);</div><div class='del'>-		} else {</div><div class='del'>-			req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_RX;</div><div class='del'>-		}</div><div class='del'>-		req-&gt;length = cpu_to_le32(bp-&gt;rx_agg_ring_mask + 1);</div><div class='add'>+		req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_RX;</div><div class='add'>+		req-&gt;length = (ring_type == HWRM_RING_ALLOC_RX) ?</div><div class='add'>+			      cpu_to_le32(bp-&gt;rx_ring_mask + 1) :</div><div class='add'>+			      cpu_to_le32(bp-&gt;rx_agg_ring_mask + 1);</div><div class='add'>+		if (bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS)</div><div class='add'>+			bnxt_set_rx_ring_params_p5(bp, ring_type, req, ring);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWRM_RING_ALLOC_CMPL:</div><div class='ctx'> 		req-&gt;ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;</div><div class='hunk'>@@ -6858,7 +7159,7 @@ static int hwrm_ring_alloc_send_msg(struct bnxt *bp,</div><div class='ctx'> 	default:</div><div class='ctx'> 		netdev_err(bp-&gt;dev, "hwrm alloc invalid ring type %d\n",</div><div class='ctx'> 			   ring_type);</div><div class='del'>-		return -1;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	resp = hwrm_req_hold(bp, req);</div><div class='hunk'>@@ -7015,6 +7316,39 @@ static int bnxt_hwrm_rx_agg_ring_alloc(struct bnxt *bp,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnxt_hwrm_cp_ring_alloc_p5(struct bnxt *bp,</div><div class='add'>+				      struct bnxt_cp_ring_info *cpr)</div><div class='add'>+{</div><div class='add'>+	const u32 type = HWRM_RING_ALLOC_CMPL;</div><div class='add'>+	struct bnxt_napi *bnapi = cpr-&gt;bnapi;</div><div class='add'>+	struct bnxt_ring_struct *ring;</div><div class='add'>+	u32 map_idx = bnapi-&gt;index;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	ring = &amp;cpr-&gt;cp_ring_struct;</div><div class='add'>+	ring-&gt;handle = BNXT_SET_NQ_HDL(cpr);</div><div class='add'>+	rc = hwrm_ring_alloc_send_msg(bp, ring, type, map_idx);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	bnxt_set_db(bp, &amp;cpr-&gt;cp_db, type, map_idx, ring-&gt;fw_ring_id);</div><div class='add'>+	bnxt_db_cq(bp, &amp;cpr-&gt;cp_db, cpr-&gt;cp_raw_cons);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_hwrm_tx_ring_alloc(struct bnxt *bp,</div><div class='add'>+				   struct bnxt_tx_ring_info *txr, u32 tx_idx)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ring_struct *ring = &amp;txr-&gt;tx_ring_struct;</div><div class='add'>+	const u32 type = HWRM_RING_ALLOC_TX;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_ring_alloc_send_msg(bp, ring, type, tx_idx);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	bnxt_set_db(bp, &amp;txr-&gt;tx_db, type, tx_idx, ring-&gt;fw_ring_id);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnxt_hwrm_ring_alloc(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	bool agg_rings = !!(bp-&gt;flags &amp; BNXT_FLAG_AGG_RINGS);</div><div class='hunk'>@@ -7051,33 +7385,17 @@ static int bnxt_hwrm_ring_alloc(struct bnxt *bp)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	type = HWRM_RING_ALLOC_TX;</div><div class='ctx'> 	for (i = 0; i &lt; bp-&gt;tx_nr_rings; i++) {</div><div class='ctx'> 		struct bnxt_tx_ring_info *txr = &amp;bp-&gt;tx_ring[i];</div><div class='del'>-		struct bnxt_ring_struct *ring;</div><div class='del'>-		u32 map_idx;</div><div class='ctx'> </div><div class='ctx'> 		if (bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS) {</div><div class='del'>-			struct bnxt_cp_ring_info *cpr2 = txr-&gt;tx_cpr;</div><div class='del'>-			struct bnxt_napi *bnapi = txr-&gt;bnapi;</div><div class='del'>-			u32 type2 = HWRM_RING_ALLOC_CMPL;</div><div class='del'>-</div><div class='del'>-			ring = &amp;cpr2-&gt;cp_ring_struct;</div><div class='del'>-			ring-&gt;handle = BNXT_SET_NQ_HDL(cpr2);</div><div class='del'>-			map_idx = bnapi-&gt;index;</div><div class='del'>-			rc = hwrm_ring_alloc_send_msg(bp, ring, type2, map_idx);</div><div class='add'>+			rc = bnxt_hwrm_cp_ring_alloc_p5(bp, txr-&gt;tx_cpr);</div><div class='ctx'> 			if (rc)</div><div class='ctx'> 				goto err_out;</div><div class='del'>-			bnxt_set_db(bp, &amp;cpr2-&gt;cp_db, type2, map_idx,</div><div class='del'>-				    ring-&gt;fw_ring_id);</div><div class='del'>-			bnxt_db_cq(bp, &amp;cpr2-&gt;cp_db, cpr2-&gt;cp_raw_cons);</div><div class='ctx'> 		}</div><div class='del'>-		ring = &amp;txr-&gt;tx_ring_struct;</div><div class='del'>-		map_idx = i;</div><div class='del'>-		rc = hwrm_ring_alloc_send_msg(bp, ring, type, map_idx);</div><div class='add'>+		rc = bnxt_hwrm_tx_ring_alloc(bp, txr, i);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			goto err_out;</div><div class='del'>-		bnxt_set_db(bp, &amp;txr-&gt;tx_db, type, map_idx, ring-&gt;fw_ring_id);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; bp-&gt;rx_nr_rings; i++) {</div><div class='hunk'>@@ -7090,20 +7408,9 @@ static int bnxt_hwrm_ring_alloc(struct bnxt *bp)</div><div class='ctx'> 		if (!agg_rings)</div><div class='ctx'> 			bnxt_db_write(bp, &amp;rxr-&gt;rx_db, rxr-&gt;rx_prod);</div><div class='ctx'> 		if (bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS) {</div><div class='del'>-			struct bnxt_cp_ring_info *cpr2 = rxr-&gt;rx_cpr;</div><div class='del'>-			struct bnxt_napi *bnapi = rxr-&gt;bnapi;</div><div class='del'>-			u32 type2 = HWRM_RING_ALLOC_CMPL;</div><div class='del'>-			struct bnxt_ring_struct *ring;</div><div class='del'>-			u32 map_idx = bnapi-&gt;index;</div><div class='del'>-</div><div class='del'>-			ring = &amp;cpr2-&gt;cp_ring_struct;</div><div class='del'>-			ring-&gt;handle = BNXT_SET_NQ_HDL(cpr2);</div><div class='del'>-			rc = hwrm_ring_alloc_send_msg(bp, ring, type2, map_idx);</div><div class='add'>+			rc = bnxt_hwrm_cp_ring_alloc_p5(bp, rxr-&gt;rx_cpr);</div><div class='ctx'> 			if (rc)</div><div class='ctx'> 				goto err_out;</div><div class='del'>-			bnxt_set_db(bp, &amp;cpr2-&gt;cp_db, type2, map_idx,</div><div class='del'>-				    ring-&gt;fw_ring_id);</div><div class='del'>-			bnxt_db_cq(bp, &amp;cpr2-&gt;cp_db, cpr2-&gt;cp_raw_cons);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7118,6 +7425,26 @@ err_out:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_cancel_dim(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* DIM work is initialized in bnxt_enable_napi().  Proceed only</div><div class='add'>+	 * if NAPI is enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (!bp-&gt;bnapi || test_bit(BNXT_STATE_NAPI_DISABLED, &amp;bp-&gt;state))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Make sure NAPI sees that the VNIC is disabled */</div><div class='add'>+	synchronize_net();</div><div class='add'>+	for (i = 0; i &lt; bp-&gt;rx_nr_rings; i++) {</div><div class='add'>+		struct bnxt_rx_ring_info *rxr = &amp;bp-&gt;rx_ring[i];</div><div class='add'>+		struct bnxt_napi *bnapi = rxr-&gt;bnapi;</div><div class='add'>+</div><div class='add'>+		cancel_work_sync(&amp;bnapi-&gt;cp_ring.dim.work);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hwrm_ring_free_send_msg(struct bnxt *bp,</div><div class='ctx'> 				   struct bnxt_ring_struct *ring,</div><div class='ctx'> 				   u32 ring_type, int cmpl_ring_id)</div><div class='hunk'>@@ -7151,6 +7478,23 @@ exit:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_hwrm_tx_ring_free(struct bnxt *bp,</div><div class='add'>+				   struct bnxt_tx_ring_info *txr,</div><div class='add'>+				   bool close_path)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ring_struct *ring = &amp;txr-&gt;tx_ring_struct;</div><div class='add'>+	u32 cmpl_ring_id;</div><div class='add'>+</div><div class='add'>+	if (ring-&gt;fw_ring_id == INVALID_HW_RING_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cmpl_ring_id = close_path ? bnxt_cp_ring_for_tx(bp, txr) :</div><div class='add'>+		       INVALID_HW_RING_ID;</div><div class='add'>+	hwrm_ring_free_send_msg(bp, ring, RING_FREE_REQ_RING_TYPE_TX,</div><div class='add'>+				cmpl_ring_id);</div><div class='add'>+	ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bnxt_hwrm_rx_ring_free(struct bnxt *bp,</div><div class='ctx'> 				   struct bnxt_rx_ring_info *rxr,</div><div class='ctx'> 				   bool close_path)</div><div class='hunk'>@@ -7195,6 +7539,33 @@ static void bnxt_hwrm_rx_agg_ring_free(struct bnxt *bp,</div><div class='ctx'> 	bp-&gt;grp_info[grp_idx].agg_fw_ring_id = INVALID_HW_RING_ID;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_hwrm_cp_ring_free(struct bnxt *bp,</div><div class='add'>+				   struct bnxt_cp_ring_info *cpr)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ring_struct *ring;</div><div class='add'>+</div><div class='add'>+	ring = &amp;cpr-&gt;cp_ring_struct;</div><div class='add'>+	if (ring-&gt;fw_ring_id == INVALID_HW_RING_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hwrm_ring_free_send_msg(bp, ring, RING_FREE_REQ_RING_TYPE_L2_CMPL,</div><div class='add'>+				INVALID_HW_RING_ID);</div><div class='add'>+	ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_clear_one_cp_ring(struct bnxt *bp, struct bnxt_cp_ring_info *cpr)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ring_struct *ring = &amp;cpr-&gt;cp_ring_struct;</div><div class='add'>+	int i, size = ring-&gt;ring_mem.page_size;</div><div class='add'>+</div><div class='add'>+	cpr-&gt;cp_raw_cons = 0;</div><div class='add'>+	cpr-&gt;toggle = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bp-&gt;cp_nr_pages; i++)</div><div class='add'>+		if (cpr-&gt;cp_desc_ring[i])</div><div class='add'>+			memset(cpr-&gt;cp_desc_ring[i], 0, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bnxt_hwrm_ring_free(struct bnxt *bp, bool close_path)</div><div class='ctx'> {</div><div class='ctx'> 	u32 type;</div><div class='hunk'>@@ -7203,21 +7574,10 @@ static void bnxt_hwrm_ring_free(struct bnxt *bp, bool close_path)</div><div class='ctx'> 	if (!bp-&gt;bnapi)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; bp-&gt;tx_nr_rings; i++) {</div><div class='del'>-		struct bnxt_tx_ring_info *txr = &amp;bp-&gt;tx_ring[i];</div><div class='del'>-		struct bnxt_ring_struct *ring = &amp;txr-&gt;tx_ring_struct;</div><div class='del'>-</div><div class='del'>-		if (ring-&gt;fw_ring_id != INVALID_HW_RING_ID) {</div><div class='del'>-			u32 cmpl_ring_id = bnxt_cp_ring_for_tx(bp, txr);</div><div class='del'>-</div><div class='del'>-			hwrm_ring_free_send_msg(bp, ring,</div><div class='del'>-						RING_FREE_REQ_RING_TYPE_TX,</div><div class='del'>-						close_path ? cmpl_ring_id :</div><div class='del'>-						INVALID_HW_RING_ID);</div><div class='del'>-			ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; bp-&gt;tx_nr_rings; i++)</div><div class='add'>+		bnxt_hwrm_tx_ring_free(bp, &amp;bp-&gt;tx_ring[i], close_path);</div><div class='ctx'> </div><div class='add'>+	bnxt_cancel_dim(bp);</div><div class='ctx'> 	for (i = 0; i &lt; bp-&gt;rx_nr_rings; i++) {</div><div class='ctx'> 		bnxt_hwrm_rx_ring_free(bp, &amp;bp-&gt;rx_ring[i], close_path);</div><div class='ctx'> 		bnxt_hwrm_rx_agg_ring_free(bp, &amp;bp-&gt;rx_ring[i], close_path);</div><div class='hunk'>@@ -7239,17 +7599,9 @@ static void bnxt_hwrm_ring_free(struct bnxt *bp, bool close_path)</div><div class='ctx'> 		struct bnxt_ring_struct *ring;</div><div class='ctx'> 		int j;</div><div class='ctx'> </div><div class='del'>-		for (j = 0; j &lt; cpr-&gt;cp_ring_count &amp;&amp; cpr-&gt;cp_ring_arr; j++) {</div><div class='del'>-			struct bnxt_cp_ring_info *cpr2 = &amp;cpr-&gt;cp_ring_arr[j];</div><div class='add'>+		for (j = 0; j &lt; cpr-&gt;cp_ring_count &amp;&amp; cpr-&gt;cp_ring_arr; j++)</div><div class='add'>+			bnxt_hwrm_cp_ring_free(bp, &amp;cpr-&gt;cp_ring_arr[j]);</div><div class='ctx'> </div><div class='del'>-			ring = &amp;cpr2-&gt;cp_ring_struct;</div><div class='del'>-			if (ring-&gt;fw_ring_id == INVALID_HW_RING_ID)</div><div class='del'>-				continue;</div><div class='del'>-			hwrm_ring_free_send_msg(bp, ring,</div><div class='del'>-						RING_FREE_REQ_RING_TYPE_L2_CMPL,</div><div class='del'>-						INVALID_HW_RING_ID);</div><div class='del'>-			ring-&gt;fw_ring_id = INVALID_HW_RING_ID;</div><div class='del'>-		}</div><div class='ctx'> 		ring = &amp;cpr-&gt;cp_ring_struct;</div><div class='ctx'> 		if (ring-&gt;fw_ring_id != INVALID_HW_RING_ID) {</div><div class='ctx'> 			hwrm_ring_free_send_msg(bp, ring, type,</div><div class='hunk'>@@ -7683,7 +8035,8 @@ static int __bnxt_reserve_rings(struct bnxt *bp)</div><div class='ctx'> 	}</div><div class='ctx'> 	rx_rings = min_t(int, rx_rings, hwr.grp);</div><div class='ctx'> 	hwr.cp = min_t(int, hwr.cp, bp-&gt;cp_nr_rings);</div><div class='del'>-	if (hwr.stat &gt; bnxt_get_ulp_stat_ctxs(bp))</div><div class='add'>+	if (bnxt_ulp_registered(bp-&gt;edev) &amp;&amp;</div><div class='add'>+	    hwr.stat &gt; bnxt_get_ulp_stat_ctxs(bp))</div><div class='ctx'> 		hwr.stat -= bnxt_get_ulp_stat_ctxs(bp);</div><div class='ctx'> 	hwr.cp = min_t(int, hwr.cp, hwr.stat);</div><div class='ctx'> 	rc = bnxt_trim_rings(bp, &amp;rx_rings, &amp;hwr.tx, hwr.cp, sh);</div><div class='hunk'>@@ -7691,6 +8044,11 @@ static int __bnxt_reserve_rings(struct bnxt *bp)</div><div class='ctx'> 		hwr.rx = rx_rings &lt;&lt; 1;</div><div class='ctx'> 	tx_cp = bnxt_num_tx_to_cp(bp, hwr.tx);</div><div class='ctx'> 	hwr.cp = sh ? max_t(int, tx_cp, rx_rings) : tx_cp + rx_rings;</div><div class='add'>+	if (hwr.tx != bp-&gt;tx_nr_rings) {</div><div class='add'>+		netdev_warn(bp-&gt;dev,</div><div class='add'>+			    "Able to reserve only %d out of %d requested TX rings\n",</div><div class='add'>+			    hwr.tx, bp-&gt;tx_nr_rings);</div><div class='add'>+	}</div><div class='ctx'> 	bp-&gt;tx_nr_rings = hwr.tx;</div><div class='ctx'> </div><div class='ctx'> 	/* If we cannot reserve all the RX rings, reset the RSS map only</div><div class='hunk'>@@ -8131,16 +8489,20 @@ static int bnxt_hwrm_func_qcfg(struct bnxt *bp)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto func_qcfg_exit;</div><div class='ctx'> </div><div class='add'>+	flags = le16_to_cpu(resp-&gt;flags);</div><div class='ctx'> #ifdef CONFIG_BNXT_SRIOV</div><div class='ctx'> 	if (BNXT_VF(bp)) {</div><div class='ctx'> 		struct bnxt_vf_info *vf = &amp;bp-&gt;vf;</div><div class='ctx'> </div><div class='ctx'> 		vf-&gt;vlan = le16_to_cpu(resp-&gt;vlan) &amp; VLAN_VID_MASK;</div><div class='add'>+		if (flags &amp; FUNC_QCFG_RESP_FLAGS_TRUSTED_VF)</div><div class='add'>+			vf-&gt;flags |= BNXT_VF_TRUST;</div><div class='add'>+		else</div><div class='add'>+			vf-&gt;flags &amp;= ~BNXT_VF_TRUST;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		bp-&gt;pf.registered_vfs = le16_to_cpu(resp-&gt;registered_vfs);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='del'>-	flags = le16_to_cpu(resp-&gt;flags);</div><div class='ctx'> 	if (flags &amp; (FUNC_QCFG_RESP_FLAGS_FW_DCBX_AGENT_ENABLED |</div><div class='ctx'> 		     FUNC_QCFG_RESP_FLAGS_FW_LLDP_AGENT_ENABLED)) {</div><div class='ctx'> 		bp-&gt;fw_cap |= BNXT_FW_CAP_LLDP_AGENT;</div><div class='hunk'>@@ -8153,8 +8515,17 @@ static int bnxt_hwrm_func_qcfg(struct bnxt *bp)</div><div class='ctx'> 	if (flags &amp; FUNC_QCFG_RESP_FLAGS_RING_MONITOR_ENABLED)</div><div class='ctx'> 		bp-&gt;fw_cap |= BNXT_FW_CAP_RING_MONITOR;</div><div class='ctx'> </div><div class='add'>+	if (flags &amp; FUNC_QCFG_RESP_FLAGS_ENABLE_RDMA_SRIOV)</div><div class='add'>+		bp-&gt;fw_cap |= BNXT_FW_CAP_ENABLE_RDMA_SRIOV;</div><div class='add'>+	if (resp-&gt;roce_bidi_opt_mode &amp;</div><div class='add'>+	    FUNC_QCFG_RESP_ROCE_BIDI_OPT_MODE_DEDICATED)</div><div class='add'>+		bp-&gt;cos0_cos1_shared = 1;</div><div class='add'>+	else</div><div class='add'>+		bp-&gt;cos0_cos1_shared = 0;</div><div class='add'>+</div><div class='ctx'> 	switch (resp-&gt;port_partition_type) {</div><div class='ctx'> 	case FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_0:</div><div class='add'>+	case FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_2:</div><div class='ctx'> 	case FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_5:</div><div class='ctx'> 	case FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR2_0:</div><div class='ctx'> 		bp-&gt;port_partition_type = resp-&gt;port_partition_type;</div><div class='hunk'>@@ -8214,7 +8585,7 @@ static int bnxt_alloc_all_ctx_pg_info(struct bnxt *bp, int ctx_max)</div><div class='ctx'> 		struct bnxt_ctx_mem_type *ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='ctx'> 		int n = 1;</div><div class='ctx'> </div><div class='del'>-		if (!ctxm-&gt;max_entries)</div><div class='add'>+		if (!ctxm-&gt;max_entries || ctxm-&gt;pg_info)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (ctxm-&gt;instance_bmap)</div><div class='hunk'>@@ -8226,6 +8597,9 @@ static int bnxt_alloc_all_ctx_pg_info(struct bnxt *bp, int ctx_max)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_free_one_ctx_mem(struct bnxt *bp,</div><div class='add'>+				  struct bnxt_ctx_mem_type *ctxm, bool force);</div><div class='add'>+</div><div class='ctx'> #define BNXT_CTX_INIT_VALID(flags)	\</div><div class='ctx'> 	(!!((flags) &amp;			\</div><div class='ctx'> 	    FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_ENABLE_CTX_KIND_INIT))</div><div class='hunk'>@@ -8234,7 +8608,7 @@ static int bnxt_hwrm_func_backing_store_qcaps_v2(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct hwrm_func_backing_store_qcaps_v2_output *resp;</div><div class='ctx'> 	struct hwrm_func_backing_store_qcaps_v2_input *req;</div><div class='del'>-	struct bnxt_ctx_mem_info *ctx;</div><div class='add'>+	struct bnxt_ctx_mem_info *ctx = bp-&gt;ctx;</div><div class='ctx'> 	u16 type;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='hunk'>@@ -8242,16 +8616,20 @@ static int bnxt_hwrm_func_backing_store_qcaps_v2(struct bnxt *bp)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);</div><div class='del'>-	if (!ctx)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	bp-&gt;ctx = ctx;</div><div class='add'>+	if (!ctx) {</div><div class='add'>+		ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);</div><div class='add'>+		if (!ctx)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		bp-&gt;ctx = ctx;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	resp = hwrm_req_hold(bp, req);</div><div class='ctx'> </div><div class='ctx'> 	for (type = 0; type &lt; BNXT_CTX_V2_MAX; ) {</div><div class='ctx'> 		struct bnxt_ctx_mem_type *ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='ctx'> 		u8 init_val, init_off, i;</div><div class='add'>+		u32 max_entries;</div><div class='add'>+		u16 entry_size;</div><div class='ctx'> 		__le32 *p;</div><div class='ctx'> 		u32 flags;</div><div class='ctx'> </div><div class='hunk'>@@ -8261,15 +8639,26 @@ static int bnxt_hwrm_func_backing_store_qcaps_v2(struct bnxt *bp)</div><div class='ctx'> 			goto ctx_done;</div><div class='ctx'> 		flags = le32_to_cpu(resp-&gt;flags);</div><div class='ctx'> 		type = le16_to_cpu(resp-&gt;next_valid_type);</div><div class='del'>-		if (!(flags &amp; FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_TYPE_VALID))</div><div class='add'>+		if (!(flags &amp; BNXT_CTX_MEM_TYPE_VALID)) {</div><div class='add'>+			bnxt_free_one_ctx_mem(bp, ctxm, true);</div><div class='ctx'> 			continue;</div><div class='del'>-</div><div class='add'>+		}</div><div class='add'>+		entry_size = le16_to_cpu(resp-&gt;entry_size);</div><div class='add'>+		max_entries = le32_to_cpu(resp-&gt;max_num_entries);</div><div class='add'>+		if (ctxm-&gt;mem_valid) {</div><div class='add'>+			if (!(flags &amp; BNXT_CTX_MEM_PERSIST) ||</div><div class='add'>+			    ctxm-&gt;entry_size != entry_size ||</div><div class='add'>+			    ctxm-&gt;max_entries != max_entries)</div><div class='add'>+				bnxt_free_one_ctx_mem(bp, ctxm, true);</div><div class='add'>+			else</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='ctx'> 		ctxm-&gt;type = le16_to_cpu(resp-&gt;type);</div><div class='del'>-		ctxm-&gt;entry_size = le16_to_cpu(resp-&gt;entry_size);</div><div class='add'>+		ctxm-&gt;entry_size = entry_size;</div><div class='ctx'> 		ctxm-&gt;flags = flags;</div><div class='ctx'> 		ctxm-&gt;instance_bmap = le32_to_cpu(resp-&gt;instance_bit_map);</div><div class='ctx'> 		ctxm-&gt;entry_multiple = resp-&gt;entry_multiple;</div><div class='del'>-		ctxm-&gt;max_entries = le32_to_cpu(resp-&gt;max_num_entries);</div><div class='add'>+		ctxm-&gt;max_entries = max_entries;</div><div class='ctx'> 		ctxm-&gt;min_entries = le32_to_cpu(resp-&gt;min_num_entries);</div><div class='ctx'> 		init_val = resp-&gt;ctx_init_value;</div><div class='ctx'> 		init_off = resp-&gt;ctx_init_offset;</div><div class='hunk'>@@ -8294,7 +8683,8 @@ static int bnxt_hwrm_func_backing_store_qcaps(struct bnxt *bp)</div><div class='ctx'> 	struct hwrm_func_backing_store_qcaps_input *req;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	if (bp-&gt;hwrm_spec_code &lt; 0x10902 || BNXT_VF(bp) || bp-&gt;ctx)</div><div class='add'>+	if (bp-&gt;hwrm_spec_code &lt; 0x10902 || BNXT_VF(bp) ||</div><div class='add'>+	    (bp-&gt;ctx &amp;&amp; bp-&gt;ctx-&gt;flags &amp; BNXT_CTX_FLAG_INITED))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (bp-&gt;fw_cap &amp; BNXT_FW_CAP_BACKING_STORE_V2)</div><div class='hunk'>@@ -8635,6 +9025,36 @@ static int bnxt_alloc_ctx_pg_tbls(struct bnxt *bp,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static size_t bnxt_copy_ctx_pg_tbls(struct bnxt *bp,</div><div class='add'>+				    struct bnxt_ctx_pg_info *ctx_pg,</div><div class='add'>+				    void *buf, size_t offset, size_t head,</div><div class='add'>+				    size_t tail)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ring_mem_info *rmem = &amp;ctx_pg-&gt;ring_mem;</div><div class='add'>+	size_t nr_pages = ctx_pg-&gt;nr_pages;</div><div class='add'>+	int page_size = rmem-&gt;page_size;</div><div class='add'>+	size_t len = 0, total_len = 0;</div><div class='add'>+	u16 depth = rmem-&gt;depth;</div><div class='add'>+</div><div class='add'>+	tail %= nr_pages * page_size;</div><div class='add'>+	do {</div><div class='add'>+		if (depth &gt; 1) {</div><div class='add'>+			int i = head / (page_size * MAX_CTX_PAGES);</div><div class='add'>+			struct bnxt_ctx_pg_info *pg_tbl;</div><div class='add'>+</div><div class='add'>+			pg_tbl = ctx_pg-&gt;ctx_pg_tbl[i];</div><div class='add'>+			rmem = &amp;pg_tbl-&gt;ring_mem;</div><div class='add'>+		}</div><div class='add'>+		len = __bnxt_copy_ring(bp, rmem, buf, offset, head, tail);</div><div class='add'>+		head += len;</div><div class='add'>+		offset += len;</div><div class='add'>+		total_len += len;</div><div class='add'>+		if (head &gt;= nr_pages * page_size)</div><div class='add'>+			head = 0;</div><div class='add'>+	} while (head != tail);</div><div class='add'>+	return total_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bnxt_free_ctx_pg_tbls(struct bnxt *bp,</div><div class='ctx'> 				  struct bnxt_ctx_pg_info *ctx_pg)</div><div class='ctx'> {</div><div class='hunk'>@@ -8685,6 +9105,8 @@ static int bnxt_setup_ctxm_pg_tbls(struct bnxt *bp,</div><div class='ctx'> 		rc = bnxt_alloc_ctx_pg_tbls(bp, &amp;ctx_pg[i], mem_size, pg_lvl,</div><div class='ctx'> 					    ctxm-&gt;init_value ? ctxm : NULL);</div><div class='ctx'> 	}</div><div class='add'>+	if (!rc)</div><div class='add'>+		ctxm-&gt;mem_valid = 1;</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -8711,6 +9133,16 @@ static int bnxt_hwrm_func_backing_store_cfg_v2(struct bnxt *bp,</div><div class='ctx'> 	hwrm_req_hold(bp, req);</div><div class='ctx'> 	req-&gt;type = cpu_to_le16(ctxm-&gt;type);</div><div class='ctx'> 	req-&gt;entry_size = cpu_to_le16(ctxm-&gt;entry_size);</div><div class='add'>+	if ((ctxm-&gt;flags &amp; BNXT_CTX_MEM_PERSIST) &amp;&amp;</div><div class='add'>+	    bnxt_bs_trace_avail(bp, ctxm-&gt;type)) {</div><div class='add'>+		struct bnxt_bs_trace_info *bs_trace;</div><div class='add'>+		u32 enables;</div><div class='add'>+</div><div class='add'>+		enables = FUNC_BACKING_STORE_CFG_V2_REQ_ENABLES_NEXT_BS_OFFSET;</div><div class='add'>+		req-&gt;enables = cpu_to_le32(enables);</div><div class='add'>+		bs_trace = &amp;bp-&gt;bs_trace[bnxt_bstore_to_trace[ctxm-&gt;type]];</div><div class='add'>+		req-&gt;next_bs_offset = cpu_to_le32(bs_trace-&gt;last_offset);</div><div class='add'>+	}</div><div class='ctx'> 	req-&gt;subtype_valid_cnt = ctxm-&gt;split_entry_cnt;</div><div class='ctx'> 	for (i = 0, p = &amp;req-&gt;split_entry_0; i &lt; ctxm-&gt;split_entry_cnt; i++)</div><div class='ctx'> 		p[i] = cpu_to_le32(ctxm-&gt;split[i]);</div><div class='hunk'>@@ -8736,25 +9168,47 @@ static int bnxt_hwrm_func_backing_store_cfg_v2(struct bnxt *bp,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bnxt_backing_store_cfg_v2(struct bnxt *bp, u32 ena)</div><div class='add'>+static int bnxt_backing_store_cfg_v2(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ctx_mem_info *ctx = bp-&gt;ctx;</div><div class='ctx'> 	struct bnxt_ctx_mem_type *ctxm;</div><div class='del'>-	u16 last_type;</div><div class='add'>+	u16 last_type = BNXT_CTX_INV;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> 	u16 type;</div><div class='ctx'> </div><div class='del'>-	if (!ena)</div><div class='del'>-		return 0;</div><div class='del'>-	else if (ena &amp; FUNC_BACKING_STORE_CFG_REQ_ENABLES_TIM)</div><div class='del'>-		last_type = BNXT_CTX_MAX - 1;</div><div class='del'>-	else</div><div class='del'>-		last_type = BNXT_CTX_L2_MAX - 1;</div><div class='add'>+	for (type = BNXT_CTX_SRT; type &lt;= BNXT_CTX_QPC; type++) {</div><div class='add'>+		ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='add'>+		if (!bnxt_bs_trace_avail(bp, type))</div><div class='add'>+			continue;</div><div class='add'>+		if (!ctxm-&gt;mem_valid) {</div><div class='add'>+			rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm,</div><div class='add'>+						     ctxm-&gt;max_entries, 1);</div><div class='add'>+			if (rc) {</div><div class='add'>+				netdev_warn(bp-&gt;dev, "Unable to setup ctx page for type:0x%x.\n",</div><div class='add'>+					    type);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+			bnxt_bs_trace_init(bp, ctxm);</div><div class='add'>+		}</div><div class='add'>+		last_type = type;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (last_type == BNXT_CTX_INV) {</div><div class='add'>+		for (type = 0; type &lt; BNXT_CTX_MAX; type++) {</div><div class='add'>+			ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='add'>+			if (ctxm-&gt;mem_valid)</div><div class='add'>+				last_type = type;</div><div class='add'>+		}</div><div class='add'>+		if (last_type == BNXT_CTX_INV)</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='ctx'> 	ctx-&gt;ctx_arr[last_type].last = 1;</div><div class='ctx'> </div><div class='ctx'> 	for (type = 0 ; type &lt; BNXT_CTX_V2_MAX; type++) {</div><div class='ctx'> 		ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='ctx'> </div><div class='add'>+		if (!ctxm-&gt;mem_valid)</div><div class='add'>+			continue;</div><div class='ctx'> 		rc = bnxt_hwrm_func_backing_store_cfg_v2(bp, ctxm, ctxm-&gt;last);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			return rc;</div><div class='hunk'>@@ -8762,21 +9216,63 @@ static int bnxt_backing_store_cfg_v2(struct bnxt *bp, u32 ena)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bnxt_free_ctx_mem(struct bnxt *bp)</div><div class='add'>+/**</div><div class='add'>+ * __bnxt_copy_ctx_mem - copy host context memory</div><div class='add'>+ * @bp: The driver context</div><div class='add'>+ * @ctxm: The pointer to the context memory type</div><div class='add'>+ * @buf: The destination buffer or NULL to just obtain the length</div><div class='add'>+ * @offset: The buffer offset to copy the data to</div><div class='add'>+ * @head: The head offset of context memory to copy from</div><div class='add'>+ * @tail: The tail offset (last byte + 1) of context memory to end the copy</div><div class='add'>+ *</div><div class='add'>+ * This function is called for debugging purposes to dump the host context</div><div class='add'>+ * used by the chip.</div><div class='add'>+ *</div><div class='add'>+ * Return: Length of memory copied</div><div class='add'>+ */</div><div class='add'>+static size_t __bnxt_copy_ctx_mem(struct bnxt *bp,</div><div class='add'>+				  struct bnxt_ctx_mem_type *ctxm, void *buf,</div><div class='add'>+				  size_t offset, size_t head, size_t tail)</div><div class='ctx'> {</div><div class='del'>-	struct bnxt_ctx_mem_info *ctx = bp-&gt;ctx;</div><div class='del'>-	u16 type;</div><div class='add'>+	struct bnxt_ctx_pg_info *ctx_pg = ctxm-&gt;pg_info;</div><div class='add'>+	size_t len = 0, total_len = 0;</div><div class='add'>+	int i, n = 1;</div><div class='ctx'> </div><div class='del'>-	if (!ctx)</div><div class='del'>-		return;</div><div class='add'>+	if (!ctx_pg)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	for (type = 0; type &lt; BNXT_CTX_V2_MAX; type++) {</div><div class='del'>-		struct bnxt_ctx_mem_type *ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='del'>-		struct bnxt_ctx_pg_info *ctx_pg = ctxm-&gt;pg_info;</div><div class='del'>-		int i, n = 1;</div><div class='add'>+	if (ctxm-&gt;instance_bmap)</div><div class='add'>+		n = hweight32(ctxm-&gt;instance_bmap);</div><div class='add'>+	for (i = 0; i &lt; n; i++) {</div><div class='add'>+		len = bnxt_copy_ctx_pg_tbls(bp, &amp;ctx_pg[i], buf, offset, head,</div><div class='add'>+					    tail);</div><div class='add'>+		offset += len;</div><div class='add'>+		total_len += len;</div><div class='add'>+	}</div><div class='add'>+	return total_len;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (!ctx_pg)</div><div class='del'>-			continue;</div><div class='add'>+size_t bnxt_copy_ctx_mem(struct bnxt *bp, struct bnxt_ctx_mem_type *ctxm,</div><div class='add'>+			 void *buf, size_t offset)</div><div class='add'>+{</div><div class='add'>+	size_t tail = ctxm-&gt;max_entries * ctxm-&gt;entry_size;</div><div class='add'>+</div><div class='add'>+	return __bnxt_copy_ctx_mem(bp, ctxm, buf, offset, 0, tail);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_free_one_ctx_mem(struct bnxt *bp,</div><div class='add'>+				  struct bnxt_ctx_mem_type *ctxm, bool force)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ctx_pg_info *ctx_pg;</div><div class='add'>+	int i, n = 1;</div><div class='add'>+</div><div class='add'>+	ctxm-&gt;last = 0;</div><div class='add'>+</div><div class='add'>+	if (ctxm-&gt;mem_valid &amp;&amp; !force &amp;&amp; (ctxm-&gt;flags &amp; BNXT_CTX_MEM_PERSIST))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ctx_pg = ctxm-&gt;pg_info;</div><div class='add'>+	if (ctx_pg) {</div><div class='ctx'> 		if (ctxm-&gt;instance_bmap)</div><div class='ctx'> 			n = hweight32(ctxm-&gt;instance_bmap);</div><div class='ctx'> 		for (i = 0; i &lt; n; i++)</div><div class='hunk'>@@ -8784,11 +9280,27 @@ void bnxt_free_ctx_mem(struct bnxt *bp)</div><div class='ctx'> </div><div class='ctx'> 		kfree(ctx_pg);</div><div class='ctx'> 		ctxm-&gt;pg_info = NULL;</div><div class='add'>+		ctxm-&gt;mem_valid = 0;</div><div class='ctx'> 	}</div><div class='add'>+	memset(ctxm, 0, sizeof(*ctxm));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnxt_free_ctx_mem(struct bnxt *bp, bool force)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ctx_mem_info *ctx = bp-&gt;ctx;</div><div class='add'>+	u16 type;</div><div class='add'>+</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (type = 0; type &lt; BNXT_CTX_V2_MAX; type++)</div><div class='add'>+		bnxt_free_one_ctx_mem(bp, &amp;ctx-&gt;ctx_arr[type], force);</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;flags &amp;= ~BNXT_CTX_FLAG_INITED;</div><div class='del'>-	kfree(ctx);</div><div class='del'>-	bp-&gt;ctx = NULL;</div><div class='add'>+	if (force) {</div><div class='add'>+		kfree(ctx);</div><div class='add'>+		bp-&gt;ctx = NULL;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnxt_alloc_ctx_mem(struct bnxt *bp)</div><div class='hunk'>@@ -8815,6 +9327,10 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)</div><div class='ctx'> 	if (!ctx || (ctx-&gt;flags &amp; BNXT_CTX_FLAG_INITED))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	ena = 0;</div><div class='add'>+	if (!(bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS))</div><div class='add'>+		goto skip_legacy;</div><div class='add'>+</div><div class='ctx'> 	ctxm = &amp;ctx-&gt;ctx_arr[BNXT_CTX_QP];</div><div class='ctx'> 	l2_qps = ctxm-&gt;qp_l2_entries;</div><div class='ctx'> 	qp1_qps = ctxm-&gt;qp_qp1_entries;</div><div class='hunk'>@@ -8823,13 +9339,20 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)</div><div class='ctx'> 	ctxm = &amp;ctx-&gt;ctx_arr[BNXT_CTX_SRQ];</div><div class='ctx'> 	srqs = ctxm-&gt;srq_l2_entries;</div><div class='ctx'> 	max_srqs = ctxm-&gt;max_entries;</div><div class='del'>-	ena = 0;</div><div class='ctx'> 	if ((bp-&gt;flags &amp; BNXT_FLAG_ROCE_CAP) &amp;&amp; !is_kdump_kernel()) {</div><div class='ctx'> 		pg_lvl = 2;</div><div class='del'>-		extra_qps = min_t(u32, 65536, max_qps - l2_qps - qp1_qps);</div><div class='del'>-		/* allocate extra qps if fw supports RoCE fast qp destroy feature */</div><div class='del'>-		extra_qps += fast_qpmd_qps;</div><div class='del'>-		extra_srqs = min_t(u32, 8192, max_srqs - srqs);</div><div class='add'>+		if (BNXT_SW_RES_LMT(bp)) {</div><div class='add'>+			extra_qps = max_qps - l2_qps - qp1_qps;</div><div class='add'>+			extra_srqs = max_srqs - srqs;</div><div class='add'>+		} else {</div><div class='add'>+			extra_qps = min_t(u32, 65536,</div><div class='add'>+					  max_qps - l2_qps - qp1_qps);</div><div class='add'>+			/* allocate extra qps if fw supports RoCE fast qp</div><div class='add'>+			 * destroy feature</div><div class='add'>+			 */</div><div class='add'>+			extra_qps += fast_qpmd_qps;</div><div class='add'>+			extra_srqs = min_t(u32, 8192, max_srqs - srqs);</div><div class='add'>+		}</div><div class='ctx'> 		if (fast_qpmd_qps)</div><div class='ctx'> 			ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_QP_FAST_QPMD;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -8865,14 +9388,20 @@ static int bnxt_alloc_ctx_mem(struct bnxt *bp)</div><div class='ctx'> 		goto skip_rdma;</div><div class='ctx'> </div><div class='ctx'> 	ctxm = &amp;ctx-&gt;ctx_arr[BNXT_CTX_MRAV];</div><div class='del'>-	/* 128K extra is needed to accommodate static AH context</div><div class='del'>-	 * allocation by f/w.</div><div class='del'>-	 */</div><div class='del'>-	num_mr = min_t(u32, ctxm-&gt;max_entries / 2, 1024 * 256);</div><div class='del'>-	num_ah = min_t(u32, num_mr, 1024 * 128);</div><div class='del'>-	ctxm-&gt;split_entry_cnt = BNXT_CTX_MRAV_AV_SPLIT_ENTRY + 1;</div><div class='del'>-	if (!ctxm-&gt;mrav_av_entries || ctxm-&gt;mrav_av_entries &gt; num_ah)</div><div class='del'>-		ctxm-&gt;mrav_av_entries = num_ah;</div><div class='add'>+	if (BNXT_SW_RES_LMT(bp) &amp;&amp;</div><div class='add'>+	    ctxm-&gt;split_entry_cnt == BNXT_CTX_MRAV_AV_SPLIT_ENTRY + 1) {</div><div class='add'>+		num_ah = ctxm-&gt;mrav_av_entries;</div><div class='add'>+		num_mr = ctxm-&gt;max_entries - num_ah;</div><div class='add'>+	} else {</div><div class='add'>+		/* 128K extra is needed to accommodate static AH context</div><div class='add'>+		 * allocation by f/w.</div><div class='add'>+		 */</div><div class='add'>+		num_mr = min_t(u32, ctxm-&gt;max_entries / 2, 1024 * 256);</div><div class='add'>+		num_ah = min_t(u32, num_mr, 1024 * 128);</div><div class='add'>+		ctxm-&gt;split_entry_cnt = BNXT_CTX_MRAV_AV_SPLIT_ENTRY + 1;</div><div class='add'>+		if (!ctxm-&gt;mrav_av_entries || ctxm-&gt;mrav_av_entries &gt; num_ah)</div><div class='add'>+			ctxm-&gt;mrav_av_entries = num_ah;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	rc = bnxt_setup_ctxm_pg_tbls(bp, ctxm, num_mr + num_ah, 2);</div><div class='ctx'> 	if (rc)</div><div class='hunk'>@@ -8903,8 +9432,9 @@ skip_rdma:</div><div class='ctx'> 		ena |= FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_SP &lt;&lt; i;</div><div class='ctx'> 	ena |= FUNC_BACKING_STORE_CFG_REQ_DFLT_ENABLES;</div><div class='ctx'> </div><div class='add'>+skip_legacy:</div><div class='ctx'> 	if (bp-&gt;fw_cap &amp; BNXT_FW_CAP_BACKING_STORE_V2)</div><div class='del'>-		rc = bnxt_backing_store_cfg_v2(bp, ena);</div><div class='add'>+		rc = bnxt_backing_store_cfg_v2(bp);</div><div class='ctx'> 	else</div><div class='ctx'> 		rc = bnxt_hwrm_func_backing_store_cfg(bp, ena);</div><div class='ctx'> 	if (rc) {</div><div class='hunk'>@@ -9053,7 +9583,6 @@ static int __bnxt_hwrm_ptp_qcfg(struct bnxt *bp)</div><div class='ctx'> 	struct hwrm_port_mac_ptp_qcfg_output *resp;</div><div class='ctx'> 	struct hwrm_port_mac_ptp_qcfg_input *req;</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='del'>-	bool phc_cfg;</div><div class='ctx'> 	u8 flags;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='hunk'>@@ -9100,8 +9629,9 @@ static int __bnxt_hwrm_ptp_qcfg(struct bnxt *bp)</div><div class='ctx'> 		rc = -ENODEV;</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='del'>-	phc_cfg = (flags &amp; PORT_MAC_PTP_QCFG_RESP_FLAGS_RTC_CONFIGURED) != 0;</div><div class='del'>-	rc = bnxt_ptp_init(bp, phc_cfg);</div><div class='add'>+	ptp-&gt;rtc_configured =</div><div class='add'>+		(flags &amp; PORT_MAC_PTP_QCFG_RESP_FLAGS_RTC_CONFIGURED) != 0;</div><div class='add'>+	rc = bnxt_ptp_init(bp);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		netdev_warn(bp-&gt;dev, "PTP initialization failed.\n");</div><div class='ctx'> exit:</div><div class='hunk'>@@ -9118,10 +9648,10 @@ no_ptp:</div><div class='ctx'> </div><div class='ctx'> static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)</div><div class='ctx'> {</div><div class='add'>+	u32 flags, flags_ext, flags_ext2, flags_ext3;</div><div class='add'>+	struct bnxt_hw_resc *hw_resc = &amp;bp-&gt;hw_resc;</div><div class='ctx'> 	struct hwrm_func_qcaps_output *resp;</div><div class='ctx'> 	struct hwrm_func_qcaps_input *req;</div><div class='del'>-	struct bnxt_hw_resc *hw_resc = &amp;bp-&gt;hw_resc;</div><div class='del'>-	u32 flags, flags_ext, flags_ext2;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	rc = hwrm_req_init(bp, req, HWRM_FUNC_QCAPS);</div><div class='hunk'>@@ -9139,6 +9669,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)</div><div class='ctx'> 		bp-&gt;flags |= BNXT_FLAG_ROCEV1_CAP;</div><div class='ctx'> 	if (flags &amp; FUNC_QCAPS_RESP_FLAGS_ROCE_V2_SUPPORTED)</div><div class='ctx'> 		bp-&gt;flags |= BNXT_FLAG_ROCEV2_CAP;</div><div class='add'>+	if (flags &amp; FUNC_QCAPS_RESP_FLAGS_LINK_ADMIN_STATUS_SUPPORTED)</div><div class='add'>+		bp-&gt;fw_cap |= BNXT_FW_CAP_LINK_ADMIN;</div><div class='ctx'> 	if (flags &amp; FUNC_QCAPS_RESP_FLAGS_PCIE_STATS_SUPPORTED)</div><div class='ctx'> 		bp-&gt;fw_cap |= BNXT_FW_CAP_PCIE_STATS_SUPPORTED;</div><div class='ctx'> 	if (flags &amp; FUNC_QCAPS_RESP_FLAGS_HOT_RESET_CAPABLE)</div><div class='hunk'>@@ -9165,6 +9697,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)</div><div class='ctx'> 		bp-&gt;fw_cap |= BNXT_FW_CAP_HOT_RESET_IF;</div><div class='ctx'> 	if (BNXT_PF(bp) &amp;&amp; (flags_ext &amp; FUNC_QCAPS_RESP_FLAGS_EXT_FW_LIVEPATCH_SUPPORTED))</div><div class='ctx'> 		bp-&gt;fw_cap |= BNXT_FW_CAP_LIVEPATCH;</div><div class='add'>+	if (flags_ext &amp; FUNC_QCAPS_RESP_FLAGS_EXT_NPAR_1_2_SUPPORTED)</div><div class='add'>+		bp-&gt;fw_cap |= BNXT_FW_CAP_NPAR_1_2;</div><div class='ctx'> 	if (BNXT_PF(bp) &amp;&amp; (flags_ext &amp; FUNC_QCAPS_RESP_FLAGS_EXT_DFLT_VLAN_TPID_PCP_SUPPORTED))</div><div class='ctx'> 		bp-&gt;fw_cap |= BNXT_FW_CAP_DFLT_VLAN_TPID_PCP;</div><div class='ctx'> 	if (flags_ext &amp; FUNC_QCAPS_RESP_FLAGS_EXT_BS_V2_SUPPORTED)</div><div class='hunk'>@@ -9179,6 +9713,18 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)</div><div class='ctx'> 		bp-&gt;flags |= BNXT_FLAG_UDP_GSO_CAP;</div><div class='ctx'> 	if (flags_ext2 &amp; FUNC_QCAPS_RESP_FLAGS_EXT2_TX_PKT_TS_CMPL_SUPPORTED)</div><div class='ctx'> 		bp-&gt;fw_cap |= BNXT_FW_CAP_TX_TS_CMP;</div><div class='add'>+	if (flags_ext2 &amp;</div><div class='add'>+	    FUNC_QCAPS_RESP_FLAGS_EXT2_SW_MAX_RESOURCE_LIMITS_SUPPORTED)</div><div class='add'>+		bp-&gt;fw_cap |= BNXT_FW_CAP_SW_MAX_RESOURCE_LIMITS;</div><div class='add'>+	if (BNXT_PF(bp) &amp;&amp;</div><div class='add'>+	    (flags_ext2 &amp; FUNC_QCAPS_RESP_FLAGS_EXT2_ROCE_VF_RESOURCE_MGMT_SUPPORTED))</div><div class='add'>+		bp-&gt;fw_cap |= BNXT_FW_CAP_ROCE_VF_RESC_MGMT_SUPPORTED;</div><div class='add'>+</div><div class='add'>+	flags_ext3 = le32_to_cpu(resp-&gt;flags_ext3);</div><div class='add'>+	if (flags_ext3 &amp; FUNC_QCAPS_RESP_FLAGS_EXT3_ROCE_VF_DYN_ALLOC_SUPPORT)</div><div class='add'>+		bp-&gt;fw_cap |= BNXT_FW_CAP_ROCE_VF_DYN_ALLOC_SUPPORT;</div><div class='add'>+	if (flags_ext3 &amp; FUNC_QCAPS_RESP_FLAGS_EXT3_MIRROR_ON_ROCE_SUPPORTED)</div><div class='add'>+		bp-&gt;fw_cap |= BNXT_FW_CAP_MIRROR_ON_ROCE;</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;tx_push_thresh = 0;</div><div class='ctx'> 	if ((flags &amp; FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED) &amp;&amp;</div><div class='hunk'>@@ -9635,7 +10181,7 @@ static int bnxt_hwrm_ver_get(struct bnxt *bp)</div><div class='ctx'> 	struct hwrm_ver_get_input *req;</div><div class='ctx'> 	u16 fw_maj, fw_min, fw_bld, fw_rsv;</div><div class='ctx'> 	u32 dev_caps_cfg, hwrm_ver;</div><div class='del'>-	int rc, len;</div><div class='add'>+	int rc, len, max_tmo_secs;</div><div class='ctx'> </div><div class='ctx'> 	rc = hwrm_req_init(bp, req, HWRM_VER_GET);</div><div class='ctx'> 	if (rc)</div><div class='hunk'>@@ -9708,9 +10254,14 @@ static int bnxt_hwrm_ver_get(struct bnxt *bp)</div><div class='ctx'> 	bp-&gt;hwrm_cmd_max_timeout = le16_to_cpu(resp-&gt;max_req_timeout) * 1000;</div><div class='ctx'> 	if (!bp-&gt;hwrm_cmd_max_timeout)</div><div class='ctx'> 		bp-&gt;hwrm_cmd_max_timeout = HWRM_CMD_MAX_TIMEOUT;</div><div class='del'>-	else if (bp-&gt;hwrm_cmd_max_timeout &gt; HWRM_CMD_MAX_TIMEOUT)</div><div class='del'>-		netdev_warn(bp-&gt;dev, "Device requests max timeout of %d seconds, may trigger hung task watchdog\n",</div><div class='del'>-			    bp-&gt;hwrm_cmd_max_timeout / 1000);</div><div class='add'>+	max_tmo_secs = bp-&gt;hwrm_cmd_max_timeout / 1000;</div><div class='add'>+#ifdef CONFIG_DETECT_HUNG_TASK</div><div class='add'>+	if (bp-&gt;hwrm_cmd_max_timeout &gt; HWRM_CMD_MAX_TIMEOUT ||</div><div class='add'>+	    max_tmo_secs &gt; CONFIG_DEFAULT_HUNG_TASK_TIMEOUT) {</div><div class='add'>+		netdev_warn(bp-&gt;dev, "Device requests max timeout of %d seconds, may trigger hung task watchdog (kernel default %ds)\n",</div><div class='add'>+			    max_tmo_secs, CONFIG_DEFAULT_HUNG_TASK_TIMEOUT);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	if (resp-&gt;hwrm_intf_maj_8b &gt;= 1) {</div><div class='ctx'> 		bp-&gt;hwrm_max_req_len = le16_to_cpu(resp-&gt;max_req_win_len);</div><div class='hunk'>@@ -10296,6 +10847,72 @@ void bnxt_del_one_rss_ctx(struct bnxt *bp, struct bnxt_rss_ctx *rss_ctx,</div><div class='ctx'> 	bp-&gt;num_rss_ctx--;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool bnxt_vnic_has_rx_ring(struct bnxt *bp, struct bnxt_vnic_info *vnic,</div><div class='add'>+				  int rxr_id)</div><div class='add'>+{</div><div class='add'>+	u16 tbl_size = bnxt_get_rxfh_indir_size(bp-&gt;dev);</div><div class='add'>+	int i, vnic_rx;</div><div class='add'>+</div><div class='add'>+	/* Ntuple VNIC always has all the rx rings. Any change of ring id</div><div class='add'>+	 * must be updated because a future filter may use it.</div><div class='add'>+	 */</div><div class='add'>+	if (vnic-&gt;flags &amp; BNXT_VNIC_NTUPLE_FLAG)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; tbl_size; i++) {</div><div class='add'>+		if (vnic-&gt;flags &amp; BNXT_VNIC_RSSCTX_FLAG)</div><div class='add'>+			vnic_rx = ethtool_rxfh_context_indir(vnic-&gt;rss_ctx)[i];</div><div class='add'>+		else</div><div class='add'>+			vnic_rx = bp-&gt;rss_indir_tbl[i];</div><div class='add'>+</div><div class='add'>+		if (rxr_id == vnic_rx)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_set_vnic_mru_p5(struct bnxt *bp, struct bnxt_vnic_info *vnic,</div><div class='add'>+				u16 mru, int rxr_id)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!bnxt_vnic_has_rx_ring(bp, vnic, rxr_id))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (mru) {</div><div class='add'>+		rc = bnxt_hwrm_vnic_set_rss_p5(bp, vnic, true);</div><div class='add'>+		if (rc) {</div><div class='add'>+			netdev_err(bp-&gt;dev, "hwrm vnic %d set rss failure rc: %d\n",</div><div class='add'>+				   vnic-&gt;vnic_id, rc);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	vnic-&gt;mru = mru;</div><div class='add'>+	bnxt_hwrm_vnic_update(bp, vnic,</div><div class='add'>+			      VNIC_UPDATE_REQ_ENABLES_MRU_VALID);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_set_rss_ctx_vnic_mru(struct bnxt *bp, u16 mru, int rxr_id)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_rxfh_context *ctx;</div><div class='add'>+	unsigned long context;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	xa_for_each(&amp;bp-&gt;dev-&gt;ethtool-&gt;rss_ctx, context, ctx) {</div><div class='add'>+		struct bnxt_rss_ctx *rss_ctx = ethtool_rxfh_context_priv(ctx);</div><div class='add'>+		struct bnxt_vnic_info *vnic = &amp;rss_ctx-&gt;vnic;</div><div class='add'>+</div><div class='add'>+		rc = bnxt_set_vnic_mru_p5(bp, vnic, mru, rxr_id);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bnxt_hwrm_realloc_rss_ctx_vnic(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	bool set_tpa = !!(bp-&gt;flags &amp; BNXT_FLAG_TPA);</div><div class='hunk'>@@ -10867,6 +11484,155 @@ int bnxt_reserve_rings(struct bnxt *bp, bool irq_re_init)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_tx_queue_stop(struct bnxt *bp, int idx)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_tx_ring_info *txr;</div><div class='add'>+	struct netdev_queue *txq;</div><div class='add'>+	struct bnxt_napi *bnapi;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	bnapi = bp-&gt;bnapi[idx];</div><div class='add'>+	bnxt_for_each_napi_tx(i, bnapi, txr) {</div><div class='add'>+		WRITE_ONCE(txr-&gt;dev_state, BNXT_DEV_STATE_CLOSING);</div><div class='add'>+		synchronize_net();</div><div class='add'>+</div><div class='add'>+		if (!(bnapi-&gt;flags &amp; BNXT_NAPI_FLAG_XDP)) {</div><div class='add'>+			txq = netdev_get_tx_queue(bp-&gt;dev, txr-&gt;txq_index);</div><div class='add'>+			if (txq) {</div><div class='add'>+				__netif_tx_lock_bh(txq);</div><div class='add'>+				netif_tx_stop_queue(txq);</div><div class='add'>+				__netif_tx_unlock_bh(txq);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!bp-&gt;tph_mode)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		bnxt_hwrm_tx_ring_free(bp, txr, true);</div><div class='add'>+		bnxt_hwrm_cp_ring_free(bp, txr-&gt;tx_cpr);</div><div class='add'>+		bnxt_free_one_tx_ring_skbs(bp, txr, txr-&gt;txq_index);</div><div class='add'>+		bnxt_clear_one_cp_ring(bp, txr-&gt;tx_cpr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_tx_queue_start(struct bnxt *bp, int idx)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_tx_ring_info *txr;</div><div class='add'>+	struct netdev_queue *txq;</div><div class='add'>+	struct bnxt_napi *bnapi;</div><div class='add'>+	int rc, i;</div><div class='add'>+</div><div class='add'>+	bnapi = bp-&gt;bnapi[idx];</div><div class='add'>+	/* All rings have been reserved and previously allocated.</div><div class='add'>+	 * Reallocating with the same parameters should never fail.</div><div class='add'>+	 */</div><div class='add'>+	bnxt_for_each_napi_tx(i, bnapi, txr) {</div><div class='add'>+		if (!bp-&gt;tph_mode)</div><div class='add'>+			goto start_tx;</div><div class='add'>+</div><div class='add'>+		rc = bnxt_hwrm_cp_ring_alloc_p5(bp, txr-&gt;tx_cpr);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		rc = bnxt_hwrm_tx_ring_alloc(bp, txr, false);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		txr-&gt;tx_prod = 0;</div><div class='add'>+		txr-&gt;tx_cons = 0;</div><div class='add'>+		txr-&gt;tx_hw_cons = 0;</div><div class='add'>+start_tx:</div><div class='add'>+		WRITE_ONCE(txr-&gt;dev_state, 0);</div><div class='add'>+		synchronize_net();</div><div class='add'>+</div><div class='add'>+		if (bnapi-&gt;flags &amp; BNXT_NAPI_FLAG_XDP)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		txq = netdev_get_tx_queue(bp-&gt;dev, txr-&gt;txq_index);</div><div class='add'>+		if (txq)</div><div class='add'>+			netif_tx_start_queue(txq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_irq_affinity_notify(struct irq_affinity_notify *notify,</div><div class='add'>+				     const cpumask_t *mask)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_irq *irq;</div><div class='add'>+	u16 tag;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	irq = container_of(notify, struct bnxt_irq, affinity_notify);</div><div class='add'>+</div><div class='add'>+	if (!irq-&gt;bp-&gt;tph_mode)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cpumask_copy(irq-&gt;cpu_mask, mask);</div><div class='add'>+</div><div class='add'>+	if (irq-&gt;ring_nr &gt;= irq-&gt;bp-&gt;rx_nr_rings)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (pcie_tph_get_cpu_st(irq-&gt;bp-&gt;pdev, TPH_MEM_TYPE_VM,</div><div class='add'>+				cpumask_first(irq-&gt;cpu_mask), &amp;tag))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (pcie_tph_set_st_entry(irq-&gt;bp-&gt;pdev, irq-&gt;msix_nr, tag))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	netdev_lock(irq-&gt;bp-&gt;dev);</div><div class='add'>+	if (netif_running(irq-&gt;bp-&gt;dev)) {</div><div class='add'>+		err = netdev_rx_queue_restart(irq-&gt;bp-&gt;dev, irq-&gt;ring_nr);</div><div class='add'>+		if (err)</div><div class='add'>+			netdev_err(irq-&gt;bp-&gt;dev,</div><div class='add'>+				   "RX queue restart failed: err=%d\n", err);</div><div class='add'>+	}</div><div class='add'>+	netdev_unlock(irq-&gt;bp-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_irq_affinity_release(struct kref *ref)</div><div class='add'>+{</div><div class='add'>+	struct irq_affinity_notify *notify =</div><div class='add'>+		container_of(ref, struct irq_affinity_notify, kref);</div><div class='add'>+	struct bnxt_irq *irq;</div><div class='add'>+</div><div class='add'>+	irq = container_of(notify, struct bnxt_irq, affinity_notify);</div><div class='add'>+</div><div class='add'>+	if (!irq-&gt;bp-&gt;tph_mode)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (pcie_tph_set_st_entry(irq-&gt;bp-&gt;pdev, irq-&gt;msix_nr, 0)) {</div><div class='add'>+		netdev_err(irq-&gt;bp-&gt;dev,</div><div class='add'>+			   "Setting ST=0 for MSIX entry %d failed\n",</div><div class='add'>+			   irq-&gt;msix_nr);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_release_irq_notifier(struct bnxt_irq *irq)</div><div class='add'>+{</div><div class='add'>+	irq_set_affinity_notifier(irq-&gt;vector, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_register_irq_notifier(struct bnxt *bp, struct bnxt_irq *irq)</div><div class='add'>+{</div><div class='add'>+	struct irq_affinity_notify *notify;</div><div class='add'>+</div><div class='add'>+	irq-&gt;bp = bp;</div><div class='add'>+</div><div class='add'>+	/* Nothing to do if TPH is not enabled */</div><div class='add'>+	if (!bp-&gt;tph_mode)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Register IRQ affinity notifier */</div><div class='add'>+	notify = &amp;irq-&gt;affinity_notify;</div><div class='add'>+	notify-&gt;irq = irq-&gt;vector;</div><div class='add'>+	notify-&gt;notify = bnxt_irq_affinity_notify;</div><div class='add'>+	notify-&gt;release = bnxt_irq_affinity_release;</div><div class='add'>+</div><div class='add'>+	irq_set_affinity_notifier(irq-&gt;vector, notify);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bnxt_free_irq(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_irq *irq;</div><div class='hunk'>@@ -10885,24 +11651,29 @@ static void bnxt_free_irq(struct bnxt *bp)</div><div class='ctx'> 		irq = &amp;bp-&gt;irq_tbl[map_idx];</div><div class='ctx'> 		if (irq-&gt;requested) {</div><div class='ctx'> 			if (irq-&gt;have_cpumask) {</div><div class='del'>-				irq_set_affinity_hint(irq-&gt;vector, NULL);</div><div class='add'>+				irq_update_affinity_hint(irq-&gt;vector, NULL);</div><div class='ctx'> 				free_cpumask_var(irq-&gt;cpu_mask);</div><div class='ctx'> 				irq-&gt;have_cpumask = 0;</div><div class='ctx'> 			}</div><div class='add'>+</div><div class='add'>+			bnxt_release_irq_notifier(irq);</div><div class='add'>+</div><div class='ctx'> 			free_irq(irq-&gt;vector, bp-&gt;bnapi[i]);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		irq-&gt;requested = 0;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* Disable TPH support */</div><div class='add'>+	pcie_disable_tph(bp-&gt;pdev);</div><div class='add'>+	bp-&gt;tph_mode = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnxt_request_irq(struct bnxt *bp)</div><div class='ctx'> {</div><div class='add'>+	struct cpu_rmap *rmap = NULL;</div><div class='ctx'> 	int i, j, rc = 0;</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='del'>-#ifdef CONFIG_RFS_ACCEL</div><div class='del'>-	struct cpu_rmap *rmap;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	rc = bnxt_setup_int_mode(bp);</div><div class='ctx'> 	if (rc) {</div><div class='hunk'>@@ -10913,40 +11684,59 @@ static int bnxt_request_irq(struct bnxt *bp)</div><div class='ctx'> #ifdef CONFIG_RFS_ACCEL</div><div class='ctx'> 	rmap = bp-&gt;dev-&gt;rx_cpu_rmap;</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+	/* Enable TPH support as part of IRQ request */</div><div class='add'>+	rc = pcie_enable_tph(bp-&gt;pdev, PCI_TPH_ST_IV_MODE);</div><div class='add'>+	if (!rc)</div><div class='add'>+		bp-&gt;tph_mode = PCI_TPH_ST_IV_MODE;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0, j = 0; i &lt; bp-&gt;cp_nr_rings; i++) {</div><div class='ctx'> 		int map_idx = bnxt_cp_num_to_irq_num(bp, i);</div><div class='ctx'> 		struct bnxt_irq *irq = &amp;bp-&gt;irq_tbl[map_idx];</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_RFS_ACCEL</div><div class='del'>-		if (rmap &amp;&amp; bp-&gt;bnapi[i]-&gt;rx_ring) {</div><div class='add'>+		if (IS_ENABLED(CONFIG_RFS_ACCEL) &amp;&amp;</div><div class='add'>+		    rmap &amp;&amp; bp-&gt;bnapi[i]-&gt;rx_ring) {</div><div class='ctx'> 			rc = irq_cpu_rmap_add(rmap, irq-&gt;vector);</div><div class='ctx'> 			if (rc)</div><div class='ctx'> 				netdev_warn(bp-&gt;dev, "failed adding irq rmap for ring %d\n",</div><div class='ctx'> 					    j);</div><div class='ctx'> 			j++;</div><div class='ctx'> 		}</div><div class='del'>-#endif</div><div class='add'>+</div><div class='ctx'> 		rc = request_irq(irq-&gt;vector, irq-&gt;handler, flags, irq-&gt;name,</div><div class='ctx'> 				 bp-&gt;bnapi[i]);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		netif_napi_set_irq(&amp;bp-&gt;bnapi[i]-&gt;napi, irq-&gt;vector);</div><div class='add'>+		netif_napi_set_irq_locked(&amp;bp-&gt;bnapi[i]-&gt;napi, irq-&gt;vector);</div><div class='ctx'> 		irq-&gt;requested = 1;</div><div class='ctx'> </div><div class='ctx'> 		if (zalloc_cpumask_var(&amp;irq-&gt;cpu_mask, GFP_KERNEL)) {</div><div class='ctx'> 			int numa_node = dev_to_node(&amp;bp-&gt;pdev-&gt;dev);</div><div class='add'>+			u16 tag;</div><div class='ctx'> </div><div class='ctx'> 			irq-&gt;have_cpumask = 1;</div><div class='add'>+			irq-&gt;msix_nr = map_idx;</div><div class='add'>+			irq-&gt;ring_nr = i;</div><div class='ctx'> 			cpumask_set_cpu(cpumask_local_spread(i, numa_node),</div><div class='ctx'> 					irq-&gt;cpu_mask);</div><div class='del'>-			rc = irq_set_affinity_hint(irq-&gt;vector, irq-&gt;cpu_mask);</div><div class='add'>+			rc = irq_update_affinity_hint(irq-&gt;vector, irq-&gt;cpu_mask);</div><div class='ctx'> 			if (rc) {</div><div class='ctx'> 				netdev_warn(bp-&gt;dev,</div><div class='del'>-					    "Set affinity failed, IRQ = %d\n",</div><div class='add'>+					    "Update affinity hint failed, IRQ = %d\n",</div><div class='ctx'> 					    irq-&gt;vector);</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='add'>+</div><div class='add'>+			bnxt_register_irq_notifier(bp, irq);</div><div class='add'>+</div><div class='add'>+			/* Init ST table entry */</div><div class='add'>+			if (pcie_tph_get_cpu_st(irq-&gt;bp-&gt;pdev, TPH_MEM_TYPE_VM,</div><div class='add'>+						cpumask_first(irq-&gt;cpu_mask),</div><div class='add'>+						&amp;tag))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			pcie_tph_set_st_entry(irq-&gt;bp-&gt;pdev, irq-&gt;msix_nr, tag);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -10967,9 +11757,9 @@ static void bnxt_del_napi(struct bnxt *bp)</div><div class='ctx'> 	for (i = 0; i &lt; bp-&gt;cp_nr_rings; i++) {</div><div class='ctx'> 		struct bnxt_napi *bnapi = bp-&gt;bnapi[i];</div><div class='ctx'> </div><div class='del'>-		__netif_napi_del(&amp;bnapi-&gt;napi);</div><div class='add'>+		__netif_napi_del_locked(&amp;bnapi-&gt;napi);</div><div class='ctx'> 	}</div><div class='del'>-	/* We called __netif_napi_del(), we need</div><div class='add'>+	/* We called __netif_napi_del_locked(), we need</div><div class='ctx'> 	 * to respect an RCU grace period before freeing napi structures.</div><div class='ctx'> 	 */</div><div class='ctx'> 	synchronize_net();</div><div class='hunk'>@@ -10986,14 +11776,17 @@ static void bnxt_init_napi(struct bnxt *bp)</div><div class='ctx'> 		poll_fn = bnxt_poll_p5;</div><div class='ctx'> 	else if (BNXT_CHIP_TYPE_NITRO_A0(bp))</div><div class='ctx'> 		cp_nr_rings--;</div><div class='add'>+</div><div class='add'>+	set_bit(BNXT_STATE_NAPI_DISABLED, &amp;bp-&gt;state);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; cp_nr_rings; i++) {</div><div class='ctx'> 		bnapi = bp-&gt;bnapi[i];</div><div class='del'>-		netif_napi_add_config(bp-&gt;dev, &amp;bnapi-&gt;napi, poll_fn,</div><div class='del'>-				      bnapi-&gt;index);</div><div class='add'>+		netif_napi_add_config_locked(bp-&gt;dev, &amp;bnapi-&gt;napi, poll_fn,</div><div class='add'>+					     bnapi-&gt;index);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (BNXT_CHIP_TYPE_NITRO_A0(bp)) {</div><div class='ctx'> 		bnapi = bp-&gt;bnapi[cp_nr_rings];</div><div class='del'>-		netif_napi_add(bp-&gt;dev, &amp;bnapi-&gt;napi, bnxt_poll_nitroa0);</div><div class='add'>+		netif_napi_add_locked(bp-&gt;dev, &amp;bnapi-&gt;napi, bnxt_poll_nitroa0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -11014,9 +11807,7 @@ static void bnxt_disable_napi(struct bnxt *bp)</div><div class='ctx'> 			cpr-&gt;sw_stats-&gt;tx.tx_resets++;</div><div class='ctx'> 		if (bnapi-&gt;in_reset)</div><div class='ctx'> 			cpr-&gt;sw_stats-&gt;rx.rx_resets++;</div><div class='del'>-		napi_disable(&amp;bnapi-&gt;napi);</div><div class='del'>-		if (bnapi-&gt;rx_ring)</div><div class='del'>-			cancel_work_sync(&amp;cpr-&gt;dim.work);</div><div class='add'>+		napi_disable_locked(&amp;bnapi-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -11038,7 +11829,7 @@ static void bnxt_enable_napi(struct bnxt *bp)</div><div class='ctx'> 			INIT_WORK(&amp;cpr-&gt;dim.work, bnxt_dim_work);</div><div class='ctx'> 			cpr-&gt;dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;</div><div class='ctx'> 		}</div><div class='del'>-		napi_enable(&amp;bnapi-&gt;napi);</div><div class='add'>+		napi_enable_locked(&amp;bnapi-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -11236,6 +12027,26 @@ hwrm_phy_qcaps_exit:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_hwrm_mac_qcaps(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_port_mac_qcaps_output *resp;</div><div class='add'>+	struct hwrm_port_mac_qcaps_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (bp-&gt;hwrm_spec_code &lt; 0x10a03)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_QCAPS);</div><div class='add'>+	if (rc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	resp = hwrm_req_hold(bp, req);</div><div class='add'>+	rc = hwrm_req_send_silent(bp, req);</div><div class='add'>+	if (!rc)</div><div class='add'>+		bp-&gt;mac_flags = resp-&gt;flags;</div><div class='add'>+	hwrm_req_drop(bp, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool bnxt_support_dropped(u16 advertising, u16 supported)</div><div class='ctx'> {</div><div class='ctx'> 	u16 diff = advertising ^ supported;</div><div class='hunk'>@@ -11646,7 +12457,7 @@ static int bnxt_try_recover_fw(struct bnxt *bp)</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bnxt_clear_reservations(struct bnxt *bp, bool fw_reset)</div><div class='add'>+void bnxt_clear_reservations(struct bnxt *bp, bool fw_reset)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_hw_resc *hw_resc = &amp;bp-&gt;hw_resc;</div><div class='ctx'> </div><div class='hunk'>@@ -11687,11 +12498,15 @@ static int bnxt_hwrm_if_change(struct bnxt *bp, bool up)</div><div class='ctx'> {</div><div class='ctx'> 	struct hwrm_func_drv_if_change_output *resp;</div><div class='ctx'> 	struct hwrm_func_drv_if_change_input *req;</div><div class='del'>-	bool fw_reset = !bp-&gt;irq_tbl;</div><div class='ctx'> 	bool resc_reinit = false;</div><div class='add'>+	bool caps_change = false;</div><div class='ctx'> 	int rc, retry = 0;</div><div class='add'>+	bool fw_reset;</div><div class='ctx'> 	u32 flags = 0;</div><div class='ctx'> </div><div class='add'>+	fw_reset = (bp-&gt;fw_reset_state == BNXT_FW_RESET_STATE_ABORT);</div><div class='add'>+	bp-&gt;fw_reset_state = 0;</div><div class='add'>+</div><div class='ctx'> 	if (!(bp-&gt;fw_cap &amp; BNXT_FW_CAP_IF_CHANGE))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -11744,12 +12559,15 @@ static int bnxt_hwrm_if_change(struct bnxt *bp, bool up)</div><div class='ctx'> 		set_bit(BNXT_STATE_ABORT_ERR, &amp;bp-&gt;state);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-	if (resc_reinit || fw_reset) {</div><div class='del'>-		if (fw_reset) {</div><div class='add'>+	if (flags &amp; FUNC_DRV_IF_CHANGE_RESP_FLAGS_CAPS_CHANGE)</div><div class='add'>+		caps_change = true;</div><div class='add'>+</div><div class='add'>+	if (resc_reinit || fw_reset || caps_change) {</div><div class='add'>+		if (fw_reset || caps_change) {</div><div class='ctx'> 			set_bit(BNXT_STATE_FW_RESET_DET, &amp;bp-&gt;state);</div><div class='ctx'> 			if (!test_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state))</div><div class='ctx'> 				bnxt_ulp_irq_stop(bp);</div><div class='del'>-			bnxt_free_ctx_mem(bp);</div><div class='add'>+			bnxt_free_ctx_mem(bp, false);</div><div class='ctx'> 			bnxt_dcb_free(bp);</div><div class='ctx'> 			rc = bnxt_fw_init_one(bp);</div><div class='ctx'> 			if (rc) {</div><div class='hunk'>@@ -11757,13 +12575,8 @@ static int bnxt_hwrm_if_change(struct bnxt *bp, bool up)</div><div class='ctx'> 				set_bit(BNXT_STATE_ABORT_ERR, &amp;bp-&gt;state);</div><div class='ctx'> 				return rc;</div><div class='ctx'> 			}</div><div class='add'>+			/* IRQ will be initialized later in bnxt_request_irq()*/</div><div class='ctx'> 			bnxt_clear_int_mode(bp);</div><div class='del'>-			rc = bnxt_init_int_mode(bp);</div><div class='del'>-			if (rc) {</div><div class='del'>-				clear_bit(BNXT_STATE_FW_RESET_DET, &amp;bp-&gt;state);</div><div class='del'>-				netdev_err(bp-&gt;dev, "init int mode failed\n");</div><div class='del'>-				return rc;</div><div class='del'>-			}</div><div class='ctx'> 		}</div><div class='ctx'> 		rc = bnxt_cancel_reservations(bp, fw_reset);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -12081,6 +12894,17 @@ static int bnxt_set_xps_mapping(struct bnxt *bp)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnxt_tx_nr_rings(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	return bp-&gt;num_tc ? bp-&gt;tx_nr_rings_per_tc * bp-&gt;num_tc :</div><div class='add'>+			    bp-&gt;tx_nr_rings_per_tc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_tx_nr_rings_per_tc(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	return bp-&gt;num_tc ? bp-&gt;tx_nr_rings / bp-&gt;num_tc : bp-&gt;tx_nr_rings;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int __bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = 0;</div><div class='hunk'>@@ -12098,6 +12922,13 @@ static int __bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='add'>+	/* Make adjustments if reserved TX rings are less than requested */</div><div class='add'>+	bp-&gt;tx_nr_rings -= bp-&gt;tx_nr_rings_xdp;</div><div class='add'>+	bp-&gt;tx_nr_rings_per_tc = bnxt_tx_nr_rings_per_tc(bp);</div><div class='add'>+	if (bp-&gt;tx_nr_rings_xdp) {</div><div class='add'>+		bp-&gt;tx_nr_rings_xdp = bp-&gt;tx_nr_rings_per_tc;</div><div class='add'>+		bp-&gt;tx_nr_rings += bp-&gt;tx_nr_rings_xdp;</div><div class='add'>+	}</div><div class='ctx'> 	rc = bnxt_alloc_mem(bp, irq_re_init);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		netdev_err(bp-&gt;dev, "bnxt_alloc_mem err: %x\n", rc);</div><div class='hunk'>@@ -12162,8 +12993,6 @@ static int __bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)</div><div class='ctx'> 	/* VF-reps may need to be re-opened after the PF is re-opened */</div><div class='ctx'> 	if (BNXT_PF(bp))</div><div class='ctx'> 		bnxt_vf_reps_open(bp);</div><div class='del'>-	if (bp-&gt;ptp_cfg &amp;&amp; !(bp-&gt;fw_cap &amp; BNXT_FW_CAP_TX_TS_CMP))</div><div class='del'>-		WRITE_ONCE(bp-&gt;ptp_cfg-&gt;tx_avail, BNXT_MAX_TX_TS);</div><div class='ctx'> 	bnxt_ptp_init_rtc(bp, true);</div><div class='ctx'> 	bnxt_ptp_cfg_tstamp_filters(bp);</div><div class='ctx'> 	if (BNXT_SUPPORTS_MULTI_RSS_CTX(bp))</div><div class='hunk'>@@ -12181,7 +13010,6 @@ open_err_free_mem:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* rtnl_lock held */</div><div class='ctx'> int bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = 0;</div><div class='hunk'>@@ -12192,14 +13020,14 @@ int bnxt_open_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)</div><div class='ctx'> 		rc = __bnxt_open_nic(bp, irq_re_init, link_re_init);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		netdev_err(bp-&gt;dev, "nic open fail (rc: %x)\n", rc);</div><div class='del'>-		dev_close(bp-&gt;dev);</div><div class='add'>+		netif_close(bp-&gt;dev);</div><div class='ctx'> 	}</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* rtnl_lock held, open the NIC half way by allocating all resources, but</div><div class='del'>- * NAPI, IRQ, and TX are not enabled.  This is mainly used for offline</div><div class='del'>- * self tests.</div><div class='add'>+/* netdev instance lock held, open the NIC half way by allocating all</div><div class='add'>+ * resources, but NAPI, IRQ, and TX are not enabled.  This is mainly used</div><div class='add'>+ * for offline self tests.</div><div class='ctx'>  */</div><div class='ctx'> int bnxt_half_open_nic(struct bnxt *bp)</div><div class='ctx'> {</div><div class='hunk'>@@ -12230,12 +13058,12 @@ int bnxt_half_open_nic(struct bnxt *bp)</div><div class='ctx'> half_open_err:</div><div class='ctx'> 	bnxt_free_skbs(bp);</div><div class='ctx'> 	bnxt_free_mem(bp, true);</div><div class='del'>-	dev_close(bp-&gt;dev);</div><div class='add'>+	netif_close(bp-&gt;dev);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* rtnl_lock held, this call can only be made after a previous successful</div><div class='del'>- * call to bnxt_half_open_nic().</div><div class='add'>+/* netdev instance lock held, this call can only be made after a previous</div><div class='add'>+ * successful call to bnxt_half_open_nic().</div><div class='ctx'>  */</div><div class='ctx'> void bnxt_half_close_nic(struct bnxt *bp)</div><div class='ctx'> {</div><div class='hunk'>@@ -12324,7 +13152,7 @@ static void __bnxt_close_nic(struct bnxt *bp, bool irq_re_init,</div><div class='ctx'> </div><div class='ctx'> 	bnxt_debug_dev_exit(bp);</div><div class='ctx'> 	bnxt_disable_napi(bp);</div><div class='del'>-	del_timer_sync(&amp;bp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;bp-&gt;timer);</div><div class='ctx'> 	bnxt_free_skbs(bp);</div><div class='ctx'> </div><div class='ctx'> 	/* Save ring stats before shutdown */</div><div class='hunk'>@@ -12344,10 +13172,11 @@ void bnxt_close_nic(struct bnxt *bp, bool irq_re_init, bool link_re_init)</div><div class='ctx'> 	if (test_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state)) {</div><div class='ctx'> 		/* If we get here, it means firmware reset is in progress</div><div class='ctx'> 		 * while we are trying to close.  We can safely proceed with</div><div class='del'>-		 * the close because we are holding rtnl_lock().  Some firmware</div><div class='del'>-		 * messages may fail as we proceed to close.  We set the</div><div class='del'>-		 * ABORT_ERR flag here so that the FW reset thread will later</div><div class='del'>-		 * abort when it gets the rtnl_lock() and sees the flag.</div><div class='add'>+		 * the close because we are holding netdev instance lock.</div><div class='add'>+		 * Some firmware messages may fail as we proceed to close.</div><div class='add'>+		 * We set the ABORT_ERR flag here so that the FW reset thread</div><div class='add'>+		 * will later abort when it gets the netdev instance lock</div><div class='add'>+		 * and sees the flag.</div><div class='ctx'> 		 */</div><div class='ctx'> 		netdev_warn(bp-&gt;dev, "FW reset in progress during close, FW reset will be aborted\n");</div><div class='ctx'> 		set_bit(BNXT_STATE_ABORT_ERR, &amp;bp-&gt;state);</div><div class='hunk'>@@ -12438,7 +13267,7 @@ static int bnxt_hwrm_port_phy_write(struct bnxt *bp, u16 phy_addr, u16 reg,</div><div class='ctx'> 	return hwrm_req_send(bp, req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* rtnl_lock held */</div><div class='add'>+/* netdev instance lock held */</div><div class='ctx'> static int bnxt_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct mii_ioctl_data *mdio = if_mii(ifr);</div><div class='hunk'>@@ -12469,12 +13298,6 @@ static int bnxt_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='ctx'> 		return bnxt_hwrm_port_phy_write(bp, mdio-&gt;phy_id, mdio-&gt;reg_num,</div><div class='ctx'> 						mdio-&gt;val_in);</div><div class='ctx'> </div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return bnxt_hwtstamp_set(dev, ifr);</div><div class='del'>-</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return bnxt_hwtstamp_get(dev, ifr);</div><div class='del'>-</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* do nothing */</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -13215,11 +14038,19 @@ static void bnxt_dump_rx_sw_state(struct bnxt_napi *bnapi)</div><div class='ctx'> </div><div class='ctx'> static void bnxt_dump_cp_sw_state(struct bnxt_napi *bnapi)</div><div class='ctx'> {</div><div class='del'>-	struct bnxt_cp_ring_info *cpr = &amp;bnapi-&gt;cp_ring;</div><div class='del'>-	int i = bnapi-&gt;index;</div><div class='add'>+	struct bnxt_cp_ring_info *cpr = &amp;bnapi-&gt;cp_ring, *cpr2;</div><div class='add'>+	int i = bnapi-&gt;index, j;</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(bnapi-&gt;bp-&gt;dev, "[%d]: cp{fw_ring: %d raw_cons: %x}\n",</div><div class='ctx'> 		    i, cpr-&gt;cp_ring_struct.fw_ring_id, cpr-&gt;cp_raw_cons);</div><div class='add'>+	for (j = 0; j &lt; cpr-&gt;cp_ring_count; j++) {</div><div class='add'>+		cpr2 = &amp;cpr-&gt;cp_ring_arr[j];</div><div class='add'>+		if (!cpr2-&gt;bnapi)</div><div class='add'>+			continue;</div><div class='add'>+		netdev_info(bnapi-&gt;bp-&gt;dev, "[%d.%d]: cp{fw_ring: %d raw_cons: %x}\n",</div><div class='add'>+			    i, j, cpr2-&gt;cp_ring_struct.fw_ring_id,</div><div class='add'>+			    cpr2-&gt;cp_raw_cons);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnxt_dbg_dump_states(struct bnxt *bp)</div><div class='hunk'>@@ -13315,7 +14146,7 @@ fw_reset:</div><div class='ctx'> </div><div class='ctx'> static void bnxt_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bnxt *bp = from_timer(bp, t, timer);</div><div class='add'>+	struct bnxt *bp = timer_container_of(bp, t, timer);</div><div class='ctx'> 	struct net_device *dev = bp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(dev) || !test_bit(BNXT_STATE_OPEN, &amp;bp-&gt;state))</div><div class='hunk'>@@ -13357,30 +14188,31 @@ bnxt_restart_timer:</div><div class='ctx'> 	mod_timer(&amp;bp-&gt;timer, jiffies + bp-&gt;current_interval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bnxt_rtnl_lock_sp(struct bnxt *bp)</div><div class='add'>+static void bnxt_lock_sp(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	/* We are called from bnxt_sp_task which has BNXT_STATE_IN_SP_TASK</div><div class='ctx'> 	 * set.  If the device is being closed, bnxt_close() may be holding</div><div class='del'>-	 * rtnl() and waiting for BNXT_STATE_IN_SP_TASK to clear.  So we</div><div class='del'>-	 * must clear BNXT_STATE_IN_SP_TASK before holding rtnl().</div><div class='add'>+	 * netdev instance lock and waiting for BNXT_STATE_IN_SP_TASK to clear.</div><div class='add'>+	 * So we must clear BNXT_STATE_IN_SP_TASK before holding netdev</div><div class='add'>+	 * instance lock.</div><div class='ctx'> 	 */</div><div class='ctx'> 	clear_bit(BNXT_STATE_IN_SP_TASK, &amp;bp-&gt;state);</div><div class='del'>-	rtnl_lock();</div><div class='add'>+	netdev_lock(bp-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bnxt_rtnl_unlock_sp(struct bnxt *bp)</div><div class='add'>+static void bnxt_unlock_sp(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	set_bit(BNXT_STATE_IN_SP_TASK, &amp;bp-&gt;state);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	netdev_unlock(bp-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Only called from bnxt_sp_task() */</div><div class='ctx'> static void bnxt_reset(struct bnxt *bp, bool silent)</div><div class='ctx'> {</div><div class='del'>-	bnxt_rtnl_lock_sp(bp);</div><div class='add'>+	bnxt_lock_sp(bp);</div><div class='ctx'> 	if (test_bit(BNXT_STATE_OPEN, &amp;bp-&gt;state))</div><div class='ctx'> 		bnxt_reset_task(bp, silent);</div><div class='del'>-	bnxt_rtnl_unlock_sp(bp);</div><div class='add'>+	bnxt_unlock_sp(bp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Only called from bnxt_sp_task() */</div><div class='hunk'>@@ -13388,9 +14220,9 @@ static void bnxt_rx_ring_reset(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	bnxt_rtnl_lock_sp(bp);</div><div class='add'>+	bnxt_lock_sp(bp);</div><div class='ctx'> 	if (!test_bit(BNXT_STATE_OPEN, &amp;bp-&gt;state)) {</div><div class='del'>-		bnxt_rtnl_unlock_sp(bp);</div><div class='add'>+		bnxt_unlock_sp(bp);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Disable and flush TPA before resetting the RX ring */</div><div class='hunk'>@@ -13414,7 +14246,7 @@ static void bnxt_rx_ring_reset(struct bnxt *bp)</div><div class='ctx'> 			bnxt_reset_task(bp, true);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		bnxt_free_one_rx_ring_skbs(bp, i);</div><div class='add'>+		bnxt_free_one_rx_ring_skbs(bp, rxr);</div><div class='ctx'> 		rxr-&gt;rx_prod = 0;</div><div class='ctx'> 		rxr-&gt;rx_agg_prod = 0;</div><div class='ctx'> 		rxr-&gt;rx_sw_agg_prod = 0;</div><div class='hunk'>@@ -13429,7 +14261,7 @@ static void bnxt_rx_ring_reset(struct bnxt *bp)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (bp-&gt;flags &amp; BNXT_FLAG_TPA)</div><div class='ctx'> 		bnxt_set_tpa(bp, true);</div><div class='del'>-	bnxt_rtnl_unlock_sp(bp);</div><div class='add'>+	bnxt_unlock_sp(bp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnxt_fw_fatal_close(struct bnxt *bp)</div><div class='hunk'>@@ -13462,7 +14294,7 @@ static void bnxt_fw_reset_close(struct bnxt *bp)</div><div class='ctx'> 	bnxt_hwrm_func_drv_unrgtr(bp);</div><div class='ctx'> 	if (pci_is_enabled(bp-&gt;pdev))</div><div class='ctx'> 		pci_disable_device(bp-&gt;pdev);</div><div class='del'>-	bnxt_free_ctx_mem(bp);</div><div class='add'>+	bnxt_free_ctx_mem(bp, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool is_bnxt_fw_ok(struct bnxt *bp)</div><div class='hunk'>@@ -13485,7 +14317,7 @@ static bool is_bnxt_fw_ok(struct bnxt *bp)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* rtnl_lock is acquired before calling this function */</div><div class='add'>+/* netdev instance lock is acquired before calling this function */</div><div class='ctx'> static void bnxt_force_fw_reset(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_fw_health *fw_health = bp-&gt;fw_health;</div><div class='hunk'>@@ -13496,12 +14328,13 @@ static void bnxt_force_fw_reset(struct bnxt *bp)</div><div class='ctx'> 	    test_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* we have to serialize with bnxt_refclk_read()*/</div><div class='ctx'> 	if (ptp) {</div><div class='ctx'> 		unsigned long flags;</div><div class='ctx'> </div><div class='del'>-		spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+		write_seqlock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 		set_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state);</div><div class='del'>-		spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+		write_sequnlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		set_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -13527,9 +14360,9 @@ void bnxt_fw_exception(struct bnxt *bp)</div><div class='ctx'> 	netdev_warn(bp-&gt;dev, "Detected firmware fatal condition, initiating reset\n");</div><div class='ctx'> 	set_bit(BNXT_STATE_FW_FATAL_COND, &amp;bp-&gt;state);</div><div class='ctx'> 	bnxt_ulp_stop(bp);</div><div class='del'>-	bnxt_rtnl_lock_sp(bp);</div><div class='add'>+	bnxt_lock_sp(bp);</div><div class='ctx'> 	bnxt_force_fw_reset(bp);</div><div class='del'>-	bnxt_rtnl_unlock_sp(bp);</div><div class='add'>+	bnxt_unlock_sp(bp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Returns the number of registered VFs, or 1 if VF configuration is pending, or</div><div class='hunk'>@@ -13559,18 +14392,19 @@ static int bnxt_get_registered_vfs(struct bnxt *bp)</div><div class='ctx'> void bnxt_fw_reset(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	bnxt_ulp_stop(bp);</div><div class='del'>-	bnxt_rtnl_lock_sp(bp);</div><div class='add'>+	bnxt_lock_sp(bp);</div><div class='ctx'> 	if (test_bit(BNXT_STATE_OPEN, &amp;bp-&gt;state) &amp;&amp;</div><div class='ctx'> 	    !test_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state)) {</div><div class='ctx'> 		struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='ctx'> 		int n = 0, tmo;</div><div class='ctx'> </div><div class='add'>+		/* we have to serialize with bnxt_refclk_read()*/</div><div class='ctx'> 		if (ptp) {</div><div class='ctx'> 			unsigned long flags;</div><div class='ctx'> </div><div class='del'>-			spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+			write_seqlock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 			set_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state);</div><div class='del'>-			spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+			write_sequnlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			set_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -13581,7 +14415,7 @@ void bnxt_fw_reset(struct bnxt *bp)</div><div class='ctx'> 			netdev_err(bp-&gt;dev, "Firmware reset aborted, rc = %d\n",</div><div class='ctx'> 				   n);</div><div class='ctx'> 			clear_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state);</div><div class='del'>-			dev_close(bp-&gt;dev);</div><div class='add'>+			netif_close(bp-&gt;dev);</div><div class='ctx'> 			goto fw_reset_exit;</div><div class='ctx'> 		} else if (n &gt; 0) {</div><div class='ctx'> 			u16 vf_tmo_dsecs = n * 10;</div><div class='hunk'>@@ -13604,7 +14438,7 @@ void bnxt_fw_reset(struct bnxt *bp)</div><div class='ctx'> 		bnxt_queue_fw_reset_work(bp, tmo);</div><div class='ctx'> 	}</div><div class='ctx'> fw_reset_exit:</div><div class='del'>-	bnxt_rtnl_unlock_sp(bp);</div><div class='add'>+	bnxt_unlock_sp(bp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnxt_chk_missed_irq(struct bnxt *bp)</div><div class='hunk'>@@ -13803,7 +14637,7 @@ static void bnxt_sp_task(struct work_struct *work)</div><div class='ctx'> static void _bnxt_get_max_rings(struct bnxt *bp, int *max_rx, int *max_tx,</div><div class='ctx'> 				int *max_cp);</div><div class='ctx'> </div><div class='del'>-/* Under rtnl_lock */</div><div class='add'>+/* Under netdev instance lock */</div><div class='ctx'> int bnxt_check_rings(struct bnxt *bp, int tx, int rx, bool sh, int tcs,</div><div class='ctx'> 		     int tx_xdp)</div><div class='ctx'> {</div><div class='hunk'>@@ -13936,6 +14770,23 @@ static bool bnxt_fw_pre_resv_vnics(struct bnxt *bp)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_hwrm_pfcwd_qcaps(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_queue_pfcwd_timeout_qcaps_output *resp;</div><div class='add'>+	struct hwrm_queue_pfcwd_timeout_qcaps_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	bp-&gt;max_pfcwd_tmo_ms = 0;</div><div class='add'>+	rc = hwrm_req_init(bp, req, HWRM_QUEUE_PFCWD_TIMEOUT_QCAPS);</div><div class='add'>+	if (rc)</div><div class='add'>+		return;</div><div class='add'>+	resp = hwrm_req_hold(bp, req);</div><div class='add'>+	rc = hwrm_req_send_silent(bp, req);</div><div class='add'>+	if (!rc)</div><div class='add'>+		bp-&gt;max_pfcwd_tmo_ms = le16_to_cpu(resp-&gt;max_pfcwd_timeout);</div><div class='add'>+	hwrm_req_drop(bp, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnxt_fw_init_one_p1(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -14013,6 +14864,7 @@ static int bnxt_fw_init_one_p2(struct bnxt *bp)</div><div class='ctx'> 	if (bnxt_fw_pre_resv_vnics(bp))</div><div class='ctx'> 		bp-&gt;fw_cap |= BNXT_FW_CAP_PRE_RESV_VNICS;</div><div class='ctx'> </div><div class='add'>+	bnxt_hwrm_pfcwd_qcaps(bp);</div><div class='ctx'> 	bnxt_hwrm_func_qcfg(bp);</div><div class='ctx'> 	bnxt_hwrm_vnic_qcaps(bp);</div><div class='ctx'> 	bnxt_hwrm_port_led_qcaps(bp);</div><div class='hunk'>@@ -14195,8 +15047,8 @@ static void bnxt_fw_reset_abort(struct bnxt *bp, int rc)</div><div class='ctx'> 	clear_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state);</div><div class='ctx'> 	if (bp-&gt;fw_reset_state != BNXT_FW_RESET_STATE_POLL_VF)</div><div class='ctx'> 		bnxt_dl_health_fw_status_update(bp, false);</div><div class='del'>-	bp-&gt;fw_reset_state = 0;</div><div class='del'>-	dev_close(bp-&gt;dev);</div><div class='add'>+	bp-&gt;fw_reset_state = BNXT_FW_RESET_STATE_ABORT;</div><div class='add'>+	netif_close(bp-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnxt_fw_reset_task(struct work_struct *work)</div><div class='hunk'>@@ -14231,10 +15083,10 @@ static void bnxt_fw_reset_task(struct work_struct *work)</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		bp-&gt;fw_reset_timestamp = jiffies;</div><div class='del'>-		rtnl_lock();</div><div class='add'>+		netdev_lock(bp-&gt;dev);</div><div class='ctx'> 		if (test_bit(BNXT_STATE_ABORT_ERR, &amp;bp-&gt;state)) {</div><div class='ctx'> 			bnxt_fw_reset_abort(bp, rc);</div><div class='del'>-			rtnl_unlock();</div><div class='add'>+			netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 			goto ulp_start;</div><div class='ctx'> 		}</div><div class='ctx'> 		bnxt_fw_reset_close(bp);</div><div class='hunk'>@@ -14245,7 +15097,7 @@ static void bnxt_fw_reset_task(struct work_struct *work)</div><div class='ctx'> 			bp-&gt;fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV;</div><div class='ctx'> 			tmo = bp-&gt;fw_reset_min_dsecs * HZ / 10;</div><div class='ctx'> 		}</div><div class='del'>-		rtnl_unlock();</div><div class='add'>+		netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 		bnxt_queue_fw_reset_work(bp, tmo);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -14319,7 +15171,7 @@ static void bnxt_fw_reset_task(struct work_struct *work)</div><div class='ctx'> 		bp-&gt;fw_reset_state = BNXT_FW_RESET_STATE_OPENING;</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case BNXT_FW_RESET_STATE_OPENING:</div><div class='del'>-		while (!rtnl_trylock()) {</div><div class='add'>+		while (!netdev_trylock(bp-&gt;dev)) {</div><div class='ctx'> 			bnxt_queue_fw_reset_work(bp, HZ / 10);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -14327,7 +15179,7 @@ static void bnxt_fw_reset_task(struct work_struct *work)</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			netdev_err(bp-&gt;dev, "bnxt_open() failed during FW reset\n");</div><div class='ctx'> 			bnxt_fw_reset_abort(bp, rc);</div><div class='del'>-			rtnl_unlock();</div><div class='add'>+			netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 			goto ulp_start;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -14346,13 +15198,13 @@ static void bnxt_fw_reset_task(struct work_struct *work)</div><div class='ctx'> 			bnxt_dl_health_fw_recovery_done(bp);</div><div class='ctx'> 			bnxt_dl_health_fw_status_update(bp, true);</div><div class='ctx'> 		}</div><div class='del'>-		rtnl_unlock();</div><div class='add'>+		netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 		bnxt_ulp_start(bp, 0);</div><div class='ctx'> 		bnxt_reenable_sriov(bp);</div><div class='del'>-		rtnl_lock();</div><div class='add'>+		netdev_lock(bp-&gt;dev);</div><div class='ctx'> 		bnxt_vf_reps_alloc(bp);</div><div class='ctx'> 		bnxt_vf_reps_open(bp);</div><div class='del'>-		rtnl_unlock();</div><div class='add'>+		netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	return;</div><div class='hunk'>@@ -14365,9 +15217,9 @@ fw_reset_abort_status:</div><div class='ctx'> 		netdev_err(bp-&gt;dev, "fw_health_status 0x%x\n", sts);</div><div class='ctx'> 	}</div><div class='ctx'> fw_reset_abort:</div><div class='del'>-	rtnl_lock();</div><div class='add'>+	netdev_lock(bp-&gt;dev);</div><div class='ctx'> 	bnxt_fw_reset_abort(bp, rc);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	netdev_unlock(bp-&gt;dev);</div><div class='ctx'> ulp_start:</div><div class='ctx'> 	bnxt_ulp_start(bp, rc);</div><div class='ctx'> }</div><div class='hunk'>@@ -14459,13 +15311,14 @@ init_err:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* rtnl_lock held */</div><div class='ctx'> static int bnxt_change_mac_addr(struct net_device *dev, void *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct sockaddr *addr = p;</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(dev);</div><div class='add'>+</div><div class='ctx'> 	if (!is_valid_ether_addr(addr-&gt;sa_data))</div><div class='ctx'> 		return -EADDRNOTAVAIL;</div><div class='ctx'> </div><div class='hunk'>@@ -14486,15 +15339,24 @@ static int bnxt_change_mac_addr(struct net_device *dev, void *p)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* rtnl_lock held */</div><div class='ctx'> static int bnxt_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(dev);</div><div class='add'>+</div><div class='ctx'> 	if (netif_running(dev))</div><div class='ctx'> 		bnxt_close_nic(bp, true, false);</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='add'>+</div><div class='add'>+	/* MTU change may change the AGG ring settings if an XDP multi-buffer</div><div class='add'>+	 * program is attached.  We need to set the AGG rings settings and</div><div class='add'>+	 * rx_skb_func accordingly.</div><div class='add'>+	 */</div><div class='add'>+	if (READ_ONCE(bp-&gt;xdp_prog))</div><div class='add'>+		bnxt_set_rx_skb_mode(bp, true);</div><div class='add'>+</div><div class='ctx'> 	bnxt_set_ring_params(bp);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev))</div><div class='hunk'>@@ -14862,8 +15724,7 @@ static int bnxt_udp_tunnel_unset_port(struct net_device *netdev, unsigned int ta</div><div class='ctx'> static const struct udp_tunnel_nic_info bnxt_udp_tunnels = {</div><div class='ctx'> 	.set_port	= bnxt_udp_tunnel_set_port,</div><div class='ctx'> 	.unset_port	= bnxt_udp_tunnel_unset_port,</div><div class='del'>-	.flags		= UDP_TUNNEL_NIC_INFO_MAY_SLEEP |</div><div class='del'>-			  UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='add'>+	.flags		= UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='ctx'> 	.tables		= {</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },</div><div class='hunk'>@@ -14871,8 +15732,7 @@ static const struct udp_tunnel_nic_info bnxt_udp_tunnels = {</div><div class='ctx'> }, bnxt_udp_tunnels_p7 = {</div><div class='ctx'> 	.set_port	= bnxt_udp_tunnel_set_port,</div><div class='ctx'> 	.unset_port	= bnxt_udp_tunnel_unset_port,</div><div class='del'>-	.flags		= UDP_TUNNEL_NIC_INFO_MAY_SLEEP |</div><div class='del'>-			  UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='add'>+	.flags		= UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='ctx'> 	.tables		= {</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },</div><div class='hunk'>@@ -14968,6 +15828,8 @@ static const struct net_device_ops bnxt_netdev_ops = {</div><div class='ctx'> 	.ndo_xdp_xmit		= bnxt_xdp_xmit,</div><div class='ctx'> 	.ndo_bridge_getlink	= bnxt_bridge_getlink,</div><div class='ctx'> 	.ndo_bridge_setlink	= bnxt_bridge_setlink,</div><div class='add'>+	.ndo_hwtstamp_get	= bnxt_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= bnxt_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void bnxt_get_queue_stats_rx(struct net_device *dev, int i,</div><div class='hunk'>@@ -14977,6 +15839,9 @@ static void bnxt_get_queue_stats_rx(struct net_device *dev, int i,</div><div class='ctx'> 	struct bnxt_cp_ring_info *cpr;</div><div class='ctx'> 	u64 *sw;</div><div class='ctx'> </div><div class='add'>+	if (!bp-&gt;bnapi)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	cpr = &amp;bp-&gt;bnapi[i]-&gt;cp_ring;</div><div class='ctx'> 	sw = cpr-&gt;stats.sw_stats;</div><div class='ctx'> </div><div class='hunk'>@@ -15000,6 +15865,9 @@ static void bnxt_get_queue_stats_tx(struct net_device *dev, int i,</div><div class='ctx'> 	struct bnxt_napi *bnapi;</div><div class='ctx'> 	u64 *sw;</div><div class='ctx'> </div><div class='add'>+	if (!bp-&gt;tx_ring)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	bnapi = bp-&gt;tx_ring[bp-&gt;tx_ring_map[i]].bnapi;</div><div class='ctx'> 	sw = bnapi-&gt;cp_ring.stats.sw_stats;</div><div class='ctx'> </div><div class='hunk'>@@ -15034,19 +15902,6 @@ static const struct netdev_stat_ops bnxt_stat_ops = {</div><div class='ctx'> 	.get_base_stats		= bnxt_get_base_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int bnxt_alloc_rx_agg_bmap(struct bnxt *bp, struct bnxt_rx_ring_info *rxr)</div><div class='del'>-{</div><div class='del'>-	u16 mem_size;</div><div class='del'>-</div><div class='del'>-	rxr-&gt;rx_agg_bmap_size = bp-&gt;rx_agg_ring_mask + 1;</div><div class='del'>-	mem_size = rxr-&gt;rx_agg_bmap_size / 8;</div><div class='del'>-	rxr-&gt;rx_agg_bmap = kzalloc(mem_size, GFP_KERNEL);</div><div class='del'>-	if (!rxr-&gt;rx_agg_bmap)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int bnxt_queue_mem_alloc(struct net_device *dev, void *qmem, int idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_rx_ring_info *rxr, *clone;</div><div class='hunk'>@@ -15054,6 +15909,9 @@ static int bnxt_queue_mem_alloc(struct net_device *dev, void *qmem, int idx)</div><div class='ctx'> 	struct bnxt_ring_struct *ring;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	if (!bp-&gt;rx_ring)</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='ctx'> 	rxr = &amp;bp-&gt;rx_ring[idx];</div><div class='ctx'> 	clone = qmem;</div><div class='ctx'> 	memcpy(clone, rxr, sizeof(*rxr));</div><div class='hunk'>@@ -15064,6 +15922,7 @@ static int bnxt_queue_mem_alloc(struct net_device *dev, void *qmem, int idx)</div><div class='ctx'> 	clone-&gt;rx_agg_prod = 0;</div><div class='ctx'> 	clone-&gt;rx_sw_agg_prod = 0;</div><div class='ctx'> 	clone-&gt;rx_next_cons = 0;</div><div class='add'>+	clone-&gt;need_head_pool = false;</div><div class='ctx'> </div><div class='ctx'> 	rc = bnxt_alloc_rx_page_pool(bp, clone, rxr-&gt;page_pool-&gt;p.nid);</div><div class='ctx'> 	if (rc)</div><div class='hunk'>@@ -15095,15 +15954,25 @@ static int bnxt_queue_mem_alloc(struct net_device *dev, void *qmem, int idx)</div><div class='ctx'> 			goto err_free_rx_agg_ring;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (bp-&gt;flags &amp; BNXT_FLAG_TPA) {</div><div class='add'>+		rc = bnxt_alloc_one_tpa_info(bp, clone);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_tpa_info;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	bnxt_init_one_rx_ring_rxbd(bp, clone);</div><div class='ctx'> 	bnxt_init_one_rx_agg_ring_rxbd(bp, clone);</div><div class='ctx'> </div><div class='ctx'> 	bnxt_alloc_one_rx_ring_skb(bp, clone, idx);</div><div class='ctx'> 	if (bp-&gt;flags &amp; BNXT_FLAG_AGG_RINGS)</div><div class='del'>-		bnxt_alloc_one_rx_ring_page(bp, clone, idx);</div><div class='add'>+		bnxt_alloc_one_rx_ring_netmem(bp, clone, idx);</div><div class='add'>+	if (bp-&gt;flags &amp; BNXT_FLAG_TPA)</div><div class='add'>+		bnxt_alloc_one_tpa_info_data(bp, clone);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_free_tpa_info:</div><div class='add'>+	bnxt_free_one_tpa_info(bp, clone);</div><div class='ctx'> err_free_rx_agg_ring:</div><div class='ctx'> 	bnxt_free_ring(bp, &amp;clone-&gt;rx_agg_ring_struct.ring_mem);</div><div class='ctx'> err_free_rx_ring:</div><div class='hunk'>@@ -15111,9 +15980,10 @@ err_free_rx_ring:</div><div class='ctx'> err_rxq_info_unreg:</div><div class='ctx'> 	xdp_rxq_info_unreg(&amp;clone-&gt;xdp_rxq);</div><div class='ctx'> err_page_pool_destroy:</div><div class='del'>-	clone-&gt;page_pool-&gt;p.napi = NULL;</div><div class='ctx'> 	page_pool_destroy(clone-&gt;page_pool);</div><div class='add'>+	page_pool_destroy(clone-&gt;head_pool);</div><div class='ctx'> 	clone-&gt;page_pool = NULL;</div><div class='add'>+	clone-&gt;head_pool = NULL;</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -15123,13 +15993,15 @@ static void bnxt_queue_mem_free(struct net_device *dev, void *qmem)</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	struct bnxt_ring_struct *ring;</div><div class='ctx'> </div><div class='del'>-	bnxt_free_one_rx_ring(bp, rxr);</div><div class='del'>-	bnxt_free_one_rx_agg_ring(bp, rxr);</div><div class='add'>+	bnxt_free_one_rx_ring_skbs(bp, rxr);</div><div class='add'>+	bnxt_free_one_tpa_info(bp, rxr);</div><div class='ctx'> </div><div class='ctx'> 	xdp_rxq_info_unreg(&amp;rxr-&gt;xdp_rxq);</div><div class='ctx'> </div><div class='ctx'> 	page_pool_destroy(rxr-&gt;page_pool);</div><div class='add'>+	page_pool_destroy(rxr-&gt;head_pool);</div><div class='ctx'> 	rxr-&gt;page_pool = NULL;</div><div class='add'>+	rxr-&gt;head_pool = NULL;</div><div class='ctx'> </div><div class='ctx'> 	ring = &amp;rxr-&gt;rx_ring_struct;</div><div class='ctx'> 	bnxt_free_ring(bp, &amp;ring-&gt;ring_mem);</div><div class='hunk'>@@ -15202,7 +16074,9 @@ static int bnxt_queue_start(struct net_device *dev, void *qmem, int idx)</div><div class='ctx'> 	struct bnxt_rx_ring_info *rxr, *clone;</div><div class='ctx'> 	struct bnxt_cp_ring_info *cpr;</div><div class='ctx'> 	struct bnxt_vnic_info *vnic;</div><div class='add'>+	struct bnxt_napi *bnapi;</div><div class='ctx'> 	int i, rc;</div><div class='add'>+	u16 mru;</div><div class='ctx'> </div><div class='ctx'> 	rxr = &amp;bp-&gt;rx_ring[idx];</div><div class='ctx'> 	clone = qmem;</div><div class='hunk'>@@ -15211,36 +16085,65 @@ static int bnxt_queue_start(struct net_device *dev, void *qmem, int idx)</div><div class='ctx'> 	rxr-&gt;rx_agg_prod = clone-&gt;rx_agg_prod;</div><div class='ctx'> 	rxr-&gt;rx_sw_agg_prod = clone-&gt;rx_sw_agg_prod;</div><div class='ctx'> 	rxr-&gt;rx_next_cons = clone-&gt;rx_next_cons;</div><div class='add'>+	rxr-&gt;rx_tpa = clone-&gt;rx_tpa;</div><div class='add'>+	rxr-&gt;rx_tpa_idx_map = clone-&gt;rx_tpa_idx_map;</div><div class='ctx'> 	rxr-&gt;page_pool = clone-&gt;page_pool;</div><div class='add'>+	rxr-&gt;head_pool = clone-&gt;head_pool;</div><div class='ctx'> 	rxr-&gt;xdp_rxq = clone-&gt;xdp_rxq;</div><div class='add'>+	rxr-&gt;need_head_pool = clone-&gt;need_head_pool;</div><div class='ctx'> </div><div class='ctx'> 	bnxt_copy_rx_ring(bp, rxr, clone);</div><div class='ctx'> </div><div class='add'>+	bnapi = rxr-&gt;bnapi;</div><div class='add'>+	cpr = &amp;bnapi-&gt;cp_ring;</div><div class='add'>+</div><div class='add'>+	/* All rings have been reserved and previously allocated.</div><div class='add'>+	 * Reallocating with the same parameters should never fail.</div><div class='add'>+	 */</div><div class='ctx'> 	rc = bnxt_hwrm_rx_ring_alloc(bp, rxr);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto err_reset;</div><div class='add'>+</div><div class='add'>+	if (bp-&gt;tph_mode) {</div><div class='add'>+		rc = bnxt_hwrm_cp_ring_alloc_p5(bp, rxr-&gt;rx_cpr);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_reset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	rc = bnxt_hwrm_rx_agg_ring_alloc(bp, rxr);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		goto err_free_hwrm_rx_ring;</div><div class='add'>+		goto err_reset;</div><div class='ctx'> </div><div class='ctx'> 	bnxt_db_write(bp, &amp;rxr-&gt;rx_db, rxr-&gt;rx_prod);</div><div class='ctx'> 	if (bp-&gt;flags &amp; BNXT_FLAG_AGG_RINGS)</div><div class='ctx'> 		bnxt_db_write(bp, &amp;rxr-&gt;rx_agg_db, rxr-&gt;rx_agg_prod);</div><div class='ctx'> </div><div class='del'>-	cpr = &amp;rxr-&gt;bnapi-&gt;cp_ring;</div><div class='del'>-	cpr-&gt;sw_stats-&gt;rx.rx_resets++;</div><div class='add'>+	if (bp-&gt;flags &amp; BNXT_FLAG_SHARED_RINGS) {</div><div class='add'>+		rc = bnxt_tx_queue_start(bp, idx);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_reset;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt;= BNXT_VNIC_NTUPLE; i++) {</div><div class='add'>+	bnxt_enable_rx_page_pool(rxr);</div><div class='add'>+	napi_enable_locked(&amp;bnapi-&gt;napi);</div><div class='add'>+	bnxt_db_nq_arm(bp, &amp;cpr-&gt;cp_db, cpr-&gt;cp_raw_cons);</div><div class='add'>+</div><div class='add'>+	mru = bp-&gt;dev-&gt;mtu + VLAN_ETH_HLEN;</div><div class='add'>+	for (i = 0; i &lt; bp-&gt;nr_vnics; i++) {</div><div class='ctx'> 		vnic = &amp;bp-&gt;vnic_info[i];</div><div class='del'>-		vnic-&gt;mru = bp-&gt;dev-&gt;mtu + ETH_HLEN + VLAN_HLEN;</div><div class='del'>-		bnxt_hwrm_vnic_update(bp, vnic,</div><div class='del'>-				      VNIC_UPDATE_REQ_ENABLES_MRU_VALID);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+		rc = bnxt_set_vnic_mru_p5(bp, vnic, mru, idx);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+	return bnxt_set_rss_ctx_vnic_mru(bp, mru, idx);</div><div class='ctx'> </div><div class='del'>-err_free_hwrm_rx_ring:</div><div class='del'>-	bnxt_hwrm_rx_ring_free(bp, rxr, false);</div><div class='add'>+err_reset:</div><div class='add'>+	netdev_err(bp-&gt;dev, "Unexpected HWRM error during queue start rc: %d\n",</div><div class='add'>+		   rc);</div><div class='add'>+	napi_enable_locked(&amp;bnapi-&gt;napi);</div><div class='add'>+	bnxt_db_nq_arm(bp, &amp;cpr-&gt;cp_db, cpr-&gt;cp_raw_cons);</div><div class='add'>+	bnxt_reset_task(bp, true);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -15248,21 +16151,43 @@ static int bnxt_queue_stop(struct net_device *dev, void *qmem, int idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	struct bnxt_rx_ring_info *rxr;</div><div class='add'>+	struct bnxt_cp_ring_info *cpr;</div><div class='ctx'> 	struct bnxt_vnic_info *vnic;</div><div class='add'>+	struct bnxt_napi *bnapi;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt;= BNXT_VNIC_NTUPLE; i++) {</div><div class='add'>+	for (i = 0; i &lt; bp-&gt;nr_vnics; i++) {</div><div class='ctx'> 		vnic = &amp;bp-&gt;vnic_info[i];</div><div class='del'>-		vnic-&gt;mru = 0;</div><div class='del'>-		bnxt_hwrm_vnic_update(bp, vnic,</div><div class='del'>-				      VNIC_UPDATE_REQ_ENABLES_MRU_VALID);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+		bnxt_set_vnic_mru_p5(bp, vnic, 0, idx);</div><div class='add'>+	}</div><div class='add'>+	bnxt_set_rss_ctx_vnic_mru(bp, 0, idx);</div><div class='add'>+	/* Make sure NAPI sees that the VNIC is disabled */</div><div class='add'>+	synchronize_net();</div><div class='ctx'> 	rxr = &amp;bp-&gt;rx_ring[idx];</div><div class='add'>+	bnapi = rxr-&gt;bnapi;</div><div class='add'>+	cpr = &amp;bnapi-&gt;cp_ring;</div><div class='add'>+	cancel_work_sync(&amp;cpr-&gt;dim.work);</div><div class='ctx'> 	bnxt_hwrm_rx_ring_free(bp, rxr, false);</div><div class='ctx'> 	bnxt_hwrm_rx_agg_ring_free(bp, rxr, false);</div><div class='del'>-	rxr-&gt;rx_next_cons = 0;</div><div class='ctx'> 	page_pool_disable_direct_recycling(rxr-&gt;page_pool);</div><div class='add'>+	if (bnxt_separate_head_pool(rxr))</div><div class='add'>+		page_pool_disable_direct_recycling(rxr-&gt;head_pool);</div><div class='add'>+</div><div class='add'>+	if (bp-&gt;flags &amp; BNXT_FLAG_SHARED_RINGS)</div><div class='add'>+		bnxt_tx_queue_stop(bp, idx);</div><div class='add'>+</div><div class='add'>+	/* Disable NAPI now after freeing the rings because HWRM_RING_FREE</div><div class='add'>+	 * completion is handled in NAPI to guarantee no more DMA on that ring</div><div class='add'>+	 * after seeing the completion.</div><div class='add'>+	 */</div><div class='add'>+	napi_disable_locked(&amp;bnapi-&gt;napi);</div><div class='add'>+</div><div class='add'>+	if (bp-&gt;tph_mode) {</div><div class='add'>+		bnxt_hwrm_cp_ring_free(bp, rxr-&gt;rx_cpr);</div><div class='add'>+		bnxt_clear_one_cp_ring(bp, rxr-&gt;rx_cpr);</div><div class='add'>+	}</div><div class='add'>+	bnxt_db_nq(bp, &amp;cpr-&gt;cp_db, cpr-&gt;cp_raw_cons);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(qmem, rxr, sizeof(*rxr));</div><div class='ctx'> 	bnxt_init_rx_ring_struct(bp, qmem);</div><div class='hunk'>@@ -15284,12 +16209,12 @@ static void bnxt_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (BNXT_PF(bp))</div><div class='del'>-		bnxt_sriov_disable(bp);</div><div class='add'>+		__bnxt_sriov_disable(bp);</div><div class='ctx'> </div><div class='ctx'> 	bnxt_rdma_aux_device_del(bp);</div><div class='ctx'> </div><div class='del'>-	bnxt_ptp_clear(bp);</div><div class='ctx'> 	unregister_netdev(dev);</div><div class='add'>+	bnxt_ptp_clear(bp);</div><div class='ctx'> </div><div class='ctx'> 	bnxt_rdma_aux_device_uninit(bp);</div><div class='ctx'> </div><div class='hunk'>@@ -15317,7 +16242,7 @@ static void bnxt_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	kfree(bp-&gt;fw_health);</div><div class='ctx'> 	bp-&gt;fw_health = NULL;</div><div class='ctx'> 	bnxt_cleanup_pci(bp);</div><div class='del'>-	bnxt_free_ctx_mem(bp);</div><div class='add'>+	bnxt_free_ctx_mem(bp, true);</div><div class='ctx'> 	bnxt_free_crash_dump_mem(bp);</div><div class='ctx'> 	kfree(bp-&gt;rss_indir_tbl);</div><div class='ctx'> 	bp-&gt;rss_indir_tbl = NULL;</div><div class='hunk'>@@ -15341,6 +16266,10 @@ static int bnxt_probe_phy(struct bnxt *bp, bool fw_dflt)</div><div class='ctx'> 		bp-&gt;dev-&gt;priv_flags |= IFF_SUPP_NOFCS;</div><div class='ctx'> 	else</div><div class='ctx'> 		bp-&gt;dev-&gt;priv_flags &amp;= ~IFF_SUPP_NOFCS;</div><div class='add'>+</div><div class='add'>+	bp-&gt;mac_flags = 0;</div><div class='add'>+	bnxt_hwrm_mac_qcaps(bp);</div><div class='add'>+</div><div class='ctx'> 	if (!fw_dflt)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -15477,7 +16406,7 @@ static void bnxt_trim_dflt_sh_rings(struct bnxt *bp)</div><div class='ctx'> 	bp-&gt;cp_nr_rings = min_t(int, bp-&gt;tx_nr_rings_per_tc, bp-&gt;rx_nr_rings);</div><div class='ctx'> 	bp-&gt;rx_nr_rings = bp-&gt;cp_nr_rings;</div><div class='ctx'> 	bp-&gt;tx_nr_rings_per_tc = bp-&gt;cp_nr_rings;</div><div class='del'>-	bp-&gt;tx_nr_rings = bp-&gt;tx_nr_rings_per_tc;</div><div class='add'>+	bp-&gt;tx_nr_rings = bnxt_tx_nr_rings(bp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnxt_set_dflt_rings(struct bnxt *bp, bool sh)</div><div class='hunk'>@@ -15509,7 +16438,7 @@ static int bnxt_set_dflt_rings(struct bnxt *bp, bool sh)</div><div class='ctx'> 		bnxt_trim_dflt_sh_rings(bp);</div><div class='ctx'> 	else</div><div class='ctx'> 		bp-&gt;cp_nr_rings = bp-&gt;tx_nr_rings_per_tc + bp-&gt;rx_nr_rings;</div><div class='del'>-	bp-&gt;tx_nr_rings = bp-&gt;tx_nr_rings_per_tc;</div><div class='add'>+	bp-&gt;tx_nr_rings = bnxt_tx_nr_rings(bp);</div><div class='ctx'> </div><div class='ctx'> 	avail_msix = bnxt_get_max_func_irqs(bp) - bp-&gt;cp_nr_rings;</div><div class='ctx'> 	if (avail_msix &gt;= BNXT_MIN_ROCE_CP_RINGS) {</div><div class='hunk'>@@ -15522,7 +16451,7 @@ static int bnxt_set_dflt_rings(struct bnxt *bp, bool sh)</div><div class='ctx'> 	rc = __bnxt_reserve_rings(bp);</div><div class='ctx'> 	if (rc &amp;&amp; rc != -ENODEV)</div><div class='ctx'> 		netdev_warn(bp-&gt;dev, "Unable to reserve tx rings\n");</div><div class='del'>-	bp-&gt;tx_nr_rings_per_tc = bp-&gt;tx_nr_rings;</div><div class='add'>+	bp-&gt;tx_nr_rings_per_tc = bnxt_tx_nr_rings_per_tc(bp);</div><div class='ctx'> 	if (sh)</div><div class='ctx'> 		bnxt_trim_dflt_sh_rings(bp);</div><div class='ctx'> </div><div class='hunk'>@@ -15531,7 +16460,7 @@ static int bnxt_set_dflt_rings(struct bnxt *bp, bool sh)</div><div class='ctx'> 		rc = __bnxt_reserve_rings(bp);</div><div class='ctx'> 		if (rc &amp;&amp; rc != -ENODEV)</div><div class='ctx'> 			netdev_warn(bp-&gt;dev, "2nd rings reservation failed.\n");</div><div class='del'>-		bp-&gt;tx_nr_rings_per_tc = bp-&gt;tx_nr_rings;</div><div class='add'>+		bp-&gt;tx_nr_rings_per_tc = bnxt_tx_nr_rings_per_tc(bp);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (BNXT_CHIP_TYPE_NITRO_A0(bp)) {</div><div class='ctx'> 		bp-&gt;rx_nr_rings++;</div><div class='hunk'>@@ -15565,7 +16494,7 @@ static int bnxt_init_dflt_ring_mode(struct bnxt *bp)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto init_dflt_ring_err;</div><div class='ctx'> </div><div class='del'>-	bp-&gt;tx_nr_rings_per_tc = bp-&gt;tx_nr_rings;</div><div class='add'>+	bp-&gt;tx_nr_rings_per_tc = bnxt_tx_nr_rings_per_tc(bp);</div><div class='ctx'> </div><div class='ctx'> 	bnxt_set_dflt_rfs(bp);</div><div class='ctx'> </div><div class='hunk'>@@ -15578,7 +16507,7 @@ int bnxt_restore_pf_fw_resources(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	ASSERT_RTNL();</div><div class='add'>+	netdev_ops_assert_locked(bp-&gt;dev);</div><div class='ctx'> 	bnxt_hwrm_func_qcaps(bp);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(bp-&gt;dev))</div><div class='hunk'>@@ -15591,7 +16520,7 @@ int bnxt_restore_pf_fw_resources(struct bnxt *bp)</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(bp-&gt;dev)) {</div><div class='ctx'> 		if (rc)</div><div class='del'>-			dev_close(bp-&gt;dev);</div><div class='add'>+			netif_close(bp-&gt;dev);</div><div class='ctx'> 		else</div><div class='ctx'> 			rc = bnxt_open_nic(bp, true, false);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -15869,8 +16798,9 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	if (bp-&gt;max_fltr &lt; BNXT_MAX_FLTR)</div><div class='ctx'> 		bp-&gt;max_fltr = BNXT_MAX_FLTR;</div><div class='ctx'> 	bnxt_init_l2_fltr_tbl(bp);</div><div class='del'>-	bnxt_set_rx_skb_mode(bp, false);</div><div class='add'>+	__bnxt_set_rx_skb_mode(bp, false);</div><div class='ctx'> 	bnxt_set_tpa_flags(bp);</div><div class='add'>+	bnxt_init_ring_params(bp);</div><div class='ctx'> 	bnxt_set_ring_params(bp);</div><div class='ctx'> 	bnxt_rdma_aux_device_init(bp);</div><div class='ctx'> 	rc = bnxt_set_dflt_rings(bp, true);</div><div class='hunk'>@@ -15927,6 +16857,8 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		bp-&gt;rss_cap |= BNXT_RSS_CAP_MULTI_RSS_CTX;</div><div class='ctx'> 	if (BNXT_SUPPORTS_QUEUE_API(bp))</div><div class='ctx'> 		dev-&gt;queue_mgmt_ops = &amp;bnxt_queue_mgmt_ops;</div><div class='add'>+	dev-&gt;request_ops_lock = true;</div><div class='add'>+	dev-&gt;netmem_tx = true;</div><div class='ctx'> </div><div class='ctx'> 	rc = register_netdev(dev);</div><div class='ctx'> 	if (rc)</div><div class='hunk'>@@ -15959,7 +16891,7 @@ init_err_pci_clean:</div><div class='ctx'> 	kfree(bp-&gt;fw_health);</div><div class='ctx'> 	bp-&gt;fw_health = NULL;</div><div class='ctx'> 	bnxt_cleanup_pci(bp);</div><div class='del'>-	bnxt_free_ctx_mem(bp);</div><div class='add'>+	bnxt_free_ctx_mem(bp, true);</div><div class='ctx'> 	bnxt_free_crash_dump_mem(bp);</div><div class='ctx'> 	kfree(bp-&gt;rss_indir_tbl);</div><div class='ctx'> 	bp-&gt;rss_indir_tbl = NULL;</div><div class='hunk'>@@ -15978,13 +16910,19 @@ static void bnxt_shutdown(struct pci_dev *pdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	bp = netdev_priv(dev);</div><div class='ctx'> 	if (!bp)</div><div class='ctx'> 		goto shutdown_exit;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev))</div><div class='del'>-		dev_close(dev);</div><div class='add'>+		netif_close(dev);</div><div class='ctx'> </div><div class='add'>+	if (bnxt_hwrm_func_drv_unrgtr(bp)) {</div><div class='add'>+		pcie_flr(pdev);</div><div class='add'>+		goto shutdown_exit;</div><div class='add'>+	}</div><div class='add'>+	bnxt_ptp_clear(bp);</div><div class='ctx'> 	bnxt_clear_int_mode(bp);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -15994,6 +16932,7 @@ static void bnxt_shutdown(struct pci_dev *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> shutdown_exit:</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -16006,15 +16945,16 @@ static int bnxt_suspend(struct device *device)</div><div class='ctx'> </div><div class='ctx'> 	bnxt_ulp_stop(bp);</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		netif_device_detach(dev);</div><div class='ctx'> 		rc = bnxt_close(dev);</div><div class='ctx'> 	}</div><div class='ctx'> 	bnxt_hwrm_func_drv_unrgtr(bp);</div><div class='add'>+	bnxt_ptp_clear(bp);</div><div class='ctx'> 	pci_disable_device(bp-&gt;pdev);</div><div class='del'>-	bnxt_free_ctx_mem(bp);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	bnxt_free_ctx_mem(bp, false);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -16024,7 +16964,7 @@ static int bnxt_resume(struct device *device)</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	rc = pci_enable_device(bp-&gt;pdev);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		netdev_err(dev, "Cannot re-enable PCI device during resume, err = %d\n",</div><div class='hunk'>@@ -16055,6 +16995,10 @@ static int bnxt_resume(struct device *device)</div><div class='ctx'> 	if (bp-&gt;fw_crash_mem)</div><div class='ctx'> 		bnxt_hwrm_crash_dump_mem_cfg(bp);</div><div class='ctx'> </div><div class='add'>+	if (bnxt_ptp_init(bp)) {</div><div class='add'>+		kfree(bp-&gt;ptp_cfg);</div><div class='add'>+		bp-&gt;ptp_cfg = NULL;</div><div class='add'>+	}</div><div class='ctx'> 	bnxt_get_wol_settings(bp);</div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		rc = bnxt_open(dev);</div><div class='hunk'>@@ -16063,7 +17007,7 @@ static int bnxt_resume(struct device *device)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> resume_exit:</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 	bnxt_ulp_start(bp, rc);</div><div class='ctx'> 	if (!rc)</div><div class='ctx'> 		bnxt_reenable_sriov(bp);</div><div class='hunk'>@@ -16098,7 +17042,7 @@ static pci_ers_result_t bnxt_io_error_detected(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	bnxt_ulp_stop(bp);</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> 	netif_device_detach(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (test_and_set_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state)) {</div><div class='hunk'>@@ -16107,7 +17051,7 @@ static pci_ers_result_t bnxt_io_error_detected(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (abort || state == pci_channel_io_perm_failure) {</div><div class='del'>-		rtnl_unlock();</div><div class='add'>+		netdev_unlock(netdev);</div><div class='ctx'> 		return PCI_ERS_RESULT_DISCONNECT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -16125,10 +17069,10 @@ static pci_ers_result_t bnxt_io_error_detected(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	if (pci_is_enabled(pdev))</div><div class='ctx'> 		pci_disable_device(pdev);</div><div class='del'>-	bnxt_free_ctx_mem(bp);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	bnxt_free_ctx_mem(bp, false);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> </div><div class='del'>-	/* Request a slot slot reset. */</div><div class='add'>+	/* Request a slot reset. */</div><div class='ctx'> 	return PCI_ERS_RESULT_NEED_RESET;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -16156,7 +17100,7 @@ static pci_ers_result_t bnxt_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 	    test_bit(BNXT_STATE_PCI_CHANNEL_IO_FROZEN, &amp;bp-&gt;state))</div><div class='ctx'> 		msleep(900);</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (pci_enable_device(pdev)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='hunk'>@@ -16202,16 +17146,15 @@ static pci_ers_result_t bnxt_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 		if (!err)</div><div class='ctx'> 			result = PCI_ERS_RESULT_RECOVERED;</div><div class='ctx'> </div><div class='add'>+		/* IRQ will be initialized later in bnxt_io_resume */</div><div class='ctx'> 		bnxt_ulp_irq_stop(bp);</div><div class='ctx'> 		bnxt_clear_int_mode(bp);</div><div class='del'>-		err = bnxt_init_int_mode(bp);</div><div class='del'>-		bnxt_ulp_irq_restart(bp, err);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> reset_exit:</div><div class='ctx'> 	clear_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state);</div><div class='ctx'> 	bnxt_clear_reservations(bp, true);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='hunk'>@@ -16230,16 +17173,23 @@ static void bnxt_io_resume(struct pci_dev *pdev)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(bp-&gt;dev, "PCI Slot Resume\n");</div><div class='del'>-	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	err = bnxt_hwrm_func_qcaps(bp);</div><div class='del'>-	if (!err &amp;&amp; netif_running(netdev))</div><div class='del'>-		err = bnxt_open(netdev);</div><div class='add'>+	if (!err) {</div><div class='add'>+		if (netif_running(netdev)) {</div><div class='add'>+			err = bnxt_open(netdev);</div><div class='add'>+		} else {</div><div class='add'>+			err = bnxt_reserve_rings(bp, true);</div><div class='add'>+			if (!err)</div><div class='add'>+				err = bnxt_init_int_mode(bp);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		netif_device_attach(netdev);</div><div class='ctx'> </div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	bnxt_ulp_start(bp, err);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		bnxt_reenable_sriov(bp);</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.h b/drivers/net/ethernet/broadcom/bnxt/bnxt.h<br/>index 69231e85140b..f5f07a7e6b29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt.h</a></div><div class='hunk'>@@ -34,6 +34,9 @@</div><div class='ctx'> #include &lt;linux/firmware/broadcom/tee_bnxt_fw.h&gt;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#define BNXT_DEFAULT_RX_COPYBREAK 256</div><div class='add'>+#define BNXT_MAX_RX_COPYBREAK 1024</div><div class='add'>+</div><div class='ctx'> extern struct list_head bnxt_block_cb_list;</div><div class='ctx'> </div><div class='ctx'> struct page_pool;</div><div class='hunk'>@@ -79,6 +82,12 @@ struct tx_bd {</div><div class='ctx'> #define TX_OPAQUE_PROD(bp, opq)	((TX_OPAQUE_IDX(opq) + TX_OPAQUE_BDS(opq)) &amp;\</div><div class='ctx'> 				 (bp)-&gt;tx_ring_mask)</div><div class='ctx'> </div><div class='add'>+#define TX_BD_CNT(n)	(((n) &lt;&lt; TX_BD_FLAGS_BD_CNT_SHIFT) &amp; TX_BD_FLAGS_BD_CNT)</div><div class='add'>+</div><div class='add'>+#define TX_MAX_BD_CNT	32</div><div class='add'>+</div><div class='add'>+#define TX_MAX_FRAGS		(TX_MAX_BD_CNT - 2)</div><div class='add'>+</div><div class='ctx'> struct tx_bd_ext {</div><div class='ctx'> 	__le32 tx_bd_hsize_lflags;</div><div class='ctx'> 	#define TX_BD_FLAGS_TCP_UDP_CHKSUM			(1 &lt;&lt; 0)</div><div class='hunk'>@@ -122,6 +131,7 @@ struct rx_bd {</div><div class='ctx'> 	 #define RX_BD_TYPE_48B_BD_SIZE				 (2 &lt;&lt; 4)</div><div class='ctx'> 	 #define RX_BD_TYPE_64B_BD_SIZE				 (3 &lt;&lt; 4)</div><div class='ctx'> 	#define RX_BD_FLAGS_SOP					(1 &lt;&lt; 6)</div><div class='add'>+	#define RX_BD_FLAGS_AGG_EOP				(1 &lt;&lt; 6)</div><div class='ctx'> 	#define RX_BD_FLAGS_EOP					(1 &lt;&lt; 7)</div><div class='ctx'> 	#define RX_BD_FLAGS_BUFFERS				(3 &lt;&lt; 8)</div><div class='ctx'> 	 #define RX_BD_FLAGS_1_BUFFER_PACKET			 (0 &lt;&lt; 8)</div><div class='hunk'>@@ -267,6 +277,9 @@ struct rx_cmp {</div><div class='ctx'> 	(((le32_to_cpu((rxcmp)-&gt;rx_cmp_misc_v1) &amp; RX_CMP_RSS_HASH_TYPE) &gt;&gt;\</div><div class='ctx'> 	  RX_CMP_RSS_HASH_TYPE_SHIFT) &amp; RSS_PROFILE_ID_MASK)</div><div class='ctx'> </div><div class='add'>+#define RX_CMP_ITYPES(rxcmp)					\</div><div class='add'>+	(le32_to_cpu((rxcmp)-&gt;rx_cmp_len_flags_type) &amp; RX_CMP_FLAGS_ITYPES_MASK)</div><div class='add'>+</div><div class='ctx'> #define RX_CMP_V3_HASH_TYPE_LEGACY(rxcmp)				\</div><div class='ctx'> 	((le32_to_cpu((rxcmp)-&gt;rx_cmp_misc_v1) &amp; RX_CMP_V3_RSS_EXT_OP_LEGACY) &gt;&gt;\</div><div class='ctx'> 	 RX_CMP_V3_RSS_EXT_OP_LEGACY_SHIFT)</div><div class='hunk'>@@ -378,7 +391,7 @@ struct rx_agg_cmp {</div><div class='ctx'> 	u32 rx_agg_cmp_opaque;</div><div class='ctx'> 	__le32 rx_agg_cmp_v;</div><div class='ctx'> 	#define RX_AGG_CMP_V					(1 &lt;&lt; 0)</div><div class='del'>-	#define RX_AGG_CMP_AGG_ID				(0xffff &lt;&lt; 16)</div><div class='add'>+	#define RX_AGG_CMP_AGG_ID				(0x0fff &lt;&lt; 16)</div><div class='ctx'> 	 #define RX_AGG_CMP_AGG_ID_SHIFT			 16</div><div class='ctx'> 	__le32 rx_agg_cmp_unused;</div><div class='ctx'> };</div><div class='hunk'>@@ -416,7 +429,7 @@ struct rx_tpa_start_cmp {</div><div class='ctx'> 	 #define RX_TPA_START_CMP_V3_RSS_HASH_TYPE_SHIFT	 7</div><div class='ctx'> 	#define RX_TPA_START_CMP_AGG_ID				(0x7f &lt;&lt; 25)</div><div class='ctx'> 	 #define RX_TPA_START_CMP_AGG_ID_SHIFT			 25</div><div class='del'>-	#define RX_TPA_START_CMP_AGG_ID_P5			(0xffff &lt;&lt; 16)</div><div class='add'>+	#define RX_TPA_START_CMP_AGG_ID_P5			(0x0fff &lt;&lt; 16)</div><div class='ctx'> 	 #define RX_TPA_START_CMP_AGG_ID_SHIFT_P5		 16</div><div class='ctx'> 	#define RX_TPA_START_CMP_METADATA1			(0xf &lt;&lt; 28)</div><div class='ctx'> 	 #define RX_TPA_START_CMP_METADATA1_SHIFT		 28</div><div class='hunk'>@@ -540,7 +553,7 @@ struct rx_tpa_end_cmp {</div><div class='ctx'> 	 #define RX_TPA_END_CMP_PAYLOAD_OFFSET_SHIFT		 16</div><div class='ctx'> 	#define RX_TPA_END_CMP_AGG_ID				(0x7f &lt;&lt; 25)</div><div class='ctx'> 	 #define RX_TPA_END_CMP_AGG_ID_SHIFT			 25</div><div class='del'>-	#define RX_TPA_END_CMP_AGG_ID_P5			(0xffff &lt;&lt; 16)</div><div class='add'>+	#define RX_TPA_END_CMP_AGG_ID_P5			(0x0fff &lt;&lt; 16)</div><div class='ctx'> 	 #define RX_TPA_END_CMP_AGG_ID_SHIFT_P5			 16</div><div class='ctx'> </div><div class='ctx'> 	__le32 rx_tpa_end_cmp_tsdelta;</div><div class='hunk'>@@ -891,7 +904,7 @@ struct bnxt_sw_rx_bd {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bnxt_sw_rx_agg_bd {</div><div class='del'>-	struct page		*page;</div><div class='add'>+	netmem_ref		netmem;</div><div class='ctx'> 	unsigned int		offset;</div><div class='ctx'> 	dma_addr_t		mapping;</div><div class='ctx'> };</div><div class='hunk'>@@ -1094,6 +1107,7 @@ struct bnxt_rx_ring_info {</div><div class='ctx'> </div><div class='ctx'> 	unsigned long		*rx_agg_bmap;</div><div class='ctx'> 	u16			rx_agg_bmap_size;</div><div class='add'>+	bool                    need_head_pool;</div><div class='ctx'> </div><div class='ctx'> 	dma_addr_t		rx_desc_mapping[MAX_RX_PAGES];</div><div class='ctx'> 	dma_addr_t		rx_agg_desc_mapping[MAX_RX_AGG_PAGES];</div><div class='hunk'>@@ -1105,6 +1119,7 @@ struct bnxt_rx_ring_info {</div><div class='ctx'> 	struct bnxt_ring_struct	rx_agg_ring_struct;</div><div class='ctx'> 	struct xdp_rxq_info	xdp_rxq;</div><div class='ctx'> 	struct page_pool	*page_pool;</div><div class='add'>+	struct page_pool	*head_pool;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bnxt_rx_sw_stats {</div><div class='hunk'>@@ -1227,6 +1242,11 @@ struct bnxt_irq {</div><div class='ctx'> 	u8		have_cpumask:1;</div><div class='ctx'> 	char		name[IFNAMSIZ + BNXT_IRQ_NAME_EXTRA];</div><div class='ctx'> 	cpumask_var_t	cpu_mask;</div><div class='add'>+</div><div class='add'>+	struct bnxt	*bp;</div><div class='add'>+	int		msix_nr;</div><div class='add'>+	int		ring_nr;</div><div class='add'>+	struct irq_affinity_notify affinity_notify;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define HWRM_RING_ALLOC_TX	0x1</div><div class='hunk'>@@ -1848,6 +1868,8 @@ struct bnxt_vf_rep {</div><div class='ctx'> </div><div class='ctx'> #define MAX_CTX_PAGES	(BNXT_PAGE_SIZE / 8)</div><div class='ctx'> #define MAX_CTX_TOTAL_PAGES	(MAX_CTX_PAGES * MAX_CTX_PAGES)</div><div class='add'>+#define MAX_CTX_BYTES		((size_t)MAX_CTX_TOTAL_PAGES * BNXT_PAGE_SIZE)</div><div class='add'>+#define MAX_CTX_BYTES_MASK	(MAX_CTX_BYTES - 1)</div><div class='ctx'> </div><div class='ctx'> struct bnxt_ctx_pg_info {</div><div class='ctx'> 	u32		entries;</div><div class='hunk'>@@ -1880,6 +1902,13 @@ struct bnxt_ctx_mem_type {</div><div class='ctx'> 	u16	entry_size;</div><div class='ctx'> 	u32	flags;</div><div class='ctx'> #define BNXT_CTX_MEM_TYPE_VALID FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_TYPE_VALID</div><div class='add'>+#define BNXT_CTX_MEM_FW_TRACE		\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_FW_DBG_TRACE</div><div class='add'>+#define BNXT_CTX_MEM_FW_BIN_TRACE	\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_FW_BIN_DBG_TRACE</div><div class='add'>+#define BNXT_CTX_MEM_PERSIST		\</div><div class='add'>+	FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_NEXT_BS_OFFSET</div><div class='add'>+</div><div class='ctx'> 	u32	instance_bmap;</div><div class='ctx'> 	u8	init_value;</div><div class='ctx'> 	u8	entry_multiple;</div><div class='hunk'>@@ -1888,6 +1917,7 @@ struct bnxt_ctx_mem_type {</div><div class='ctx'> 	u32	max_entries;</div><div class='ctx'> 	u32	min_entries;</div><div class='ctx'> 	u8	last:1;</div><div class='add'>+	u8	mem_valid:1;</div><div class='ctx'> 	u8	split_entry_cnt;</div><div class='ctx'> #define BNXT_MAX_SPLIT_ENTRY	4</div><div class='ctx'> 	union {</div><div class='hunk'>@@ -1919,21 +1949,32 @@ struct bnxt_ctx_mem_type {</div><div class='ctx'> #define BNXT_CTX_FTQM	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_FP_TQM_RING</div><div class='ctx'> #define BNXT_CTX_MRAV	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_MRAV</div><div class='ctx'> #define BNXT_CTX_TIM	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_TIM</div><div class='del'>-#define BNXT_CTX_TKC	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_TKC</div><div class='del'>-#define BNXT_CTX_RKC	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RKC</div><div class='add'>+#define BNXT_CTX_TCK	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_TX_CK</div><div class='add'>+#define BNXT_CTX_RCK	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RX_CK</div><div class='ctx'> #define BNXT_CTX_MTQM	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_MP_TQM_RING</div><div class='ctx'> #define BNXT_CTX_SQDBS	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SQ_DB_SHADOW</div><div class='ctx'> #define BNXT_CTX_RQDBS	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RQ_DB_SHADOW</div><div class='ctx'> #define BNXT_CTX_SRQDBS	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRQ_DB_SHADOW</div><div class='ctx'> #define BNXT_CTX_CQDBS	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CQ_DB_SHADOW</div><div class='del'>-#define BNXT_CTX_QTKC	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_QUIC_TKC</div><div class='del'>-#define BNXT_CTX_QRKC	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_QUIC_RKC</div><div class='ctx'> #define BNXT_CTX_TBLSC	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_TBL_SCOPE</div><div class='ctx'> #define BNXT_CTX_XPAR	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_XID_PARTITION</div><div class='add'>+#define BNXT_CTX_SRT	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRT_TRACE</div><div class='add'>+#define BNXT_CTX_SRT2	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRT2_TRACE</div><div class='add'>+#define BNXT_CTX_CRT	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CRT_TRACE</div><div class='add'>+#define BNXT_CTX_CRT2	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CRT2_TRACE</div><div class='add'>+#define BNXT_CTX_RIGP0	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RIGP0_TRACE</div><div class='add'>+#define BNXT_CTX_L2HWRM	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_L2_HWRM_TRACE</div><div class='add'>+#define BNXT_CTX_REHWRM	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_ROCE_HWRM_TRACE</div><div class='add'>+#define BNXT_CTX_CA0	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CA0_TRACE</div><div class='add'>+#define BNXT_CTX_CA1	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CA1_TRACE</div><div class='add'>+#define BNXT_CTX_CA2	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CA2_TRACE</div><div class='add'>+#define BNXT_CTX_RIGP1	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RIGP1_TRACE</div><div class='add'>+#define BNXT_CTX_KONG	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_AFM_KONG_HWRM_TRACE</div><div class='add'>+#define BNXT_CTX_QPC	FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_ERR_QPC_TRACE</div><div class='ctx'> </div><div class='ctx'> #define BNXT_CTX_MAX	(BNXT_CTX_TIM + 1)</div><div class='ctx'> #define BNXT_CTX_L2_MAX	(BNXT_CTX_FTQM + 1)</div><div class='del'>-#define BNXT_CTX_V2_MAX	(BNXT_CTX_XPAR + 1)</div><div class='add'>+#define BNXT_CTX_V2_MAX (BNXT_CTX_QPC + 1)</div><div class='ctx'> #define BNXT_CTX_INV	((u16)-1)</div><div class='ctx'> </div><div class='ctx'> struct bnxt_ctx_mem_info {</div><div class='hunk'>@@ -2092,8 +2133,29 @@ enum board_idx {</div><div class='ctx'> 	NETXTREME_E_P5_VF,</div><div class='ctx'> 	NETXTREME_E_P5_VF_HV,</div><div class='ctx'> 	NETXTREME_E_P7_VF,</div><div class='add'>+	NETXTREME_E_P7_VF_HV,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNXT_TRACE_BUF_MAGIC_BYTE ((u8)0xbc)</div><div class='add'>+#define BNXT_TRACE_MAX 11</div><div class='add'>+</div><div class='add'>+struct bnxt_bs_trace_info {</div><div class='add'>+	u8 *magic_byte;</div><div class='add'>+	u32 last_offset;</div><div class='add'>+	u8 wrapped:1;</div><div class='add'>+	u16 ctx_type;</div><div class='add'>+	u16 trace_type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static inline void bnxt_bs_trace_check_wrap(struct bnxt_bs_trace_info *bs_trace,</div><div class='add'>+					    u32 offset)</div><div class='add'>+{</div><div class='add'>+	if (!bs_trace-&gt;wrapped &amp;&amp; bs_trace-&gt;magic_byte &amp;&amp;</div><div class='add'>+	    *bs_trace-&gt;magic_byte != BNXT_TRACE_BUF_MAGIC_BYTE)</div><div class='add'>+		bs_trace-&gt;wrapped = 1;</div><div class='add'>+	bs_trace-&gt;last_offset = offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct bnxt {</div><div class='ctx'> 	void __iomem		*bar0;</div><div class='ctx'> 	void __iomem		*bar1;</div><div class='hunk'>@@ -2198,8 +2260,6 @@ struct bnxt {</div><div class='ctx'> 	#define BNXT_FLAG_TPA		(BNXT_FLAG_LRO | BNXT_FLAG_GRO)</div><div class='ctx'> 	#define BNXT_FLAG_JUMBO		0x10</div><div class='ctx'> 	#define BNXT_FLAG_STRIP_VLAN	0x20</div><div class='del'>-	#define BNXT_FLAG_AGG_RINGS	(BNXT_FLAG_JUMBO | BNXT_FLAG_GRO | \</div><div class='del'>-					 BNXT_FLAG_LRO)</div><div class='ctx'> 	#define BNXT_FLAG_RFS		0x100</div><div class='ctx'> 	#define BNXT_FLAG_SHARED_RINGS	0x200</div><div class='ctx'> 	#define BNXT_FLAG_PORT_STATS	0x400</div><div class='hunk'>@@ -2220,6 +2280,9 @@ struct bnxt {</div><div class='ctx'> 	#define BNXT_FLAG_ROCE_MIRROR_CAP	0x4000000</div><div class='ctx'> 	#define BNXT_FLAG_TX_COAL_CMPL	0x8000000</div><div class='ctx'> 	#define BNXT_FLAG_PORT_STATS_EXT	0x10000000</div><div class='add'>+	#define BNXT_FLAG_HDS		0x20000000</div><div class='add'>+	#define BNXT_FLAG_AGG_RINGS	(BNXT_FLAG_JUMBO | BNXT_FLAG_GRO | \</div><div class='add'>+					 BNXT_FLAG_LRO | BNXT_FLAG_HDS)</div><div class='ctx'> </div><div class='ctx'> 	#define BNXT_FLAG_ALL_CONFIG_FEATS (BNXT_FLAG_TPA |		\</div><div class='ctx'> 					    BNXT_FLAG_RFS |		\</div><div class='hunk'>@@ -2227,6 +2290,11 @@ struct bnxt {</div><div class='ctx'> </div><div class='ctx'> #define BNXT_PF(bp)		(!((bp)-&gt;flags &amp; BNXT_FLAG_VF))</div><div class='ctx'> #define BNXT_VF(bp)		((bp)-&gt;flags &amp; BNXT_FLAG_VF)</div><div class='add'>+#ifdef CONFIG_BNXT_SRIOV</div><div class='add'>+#define	BNXT_VF_IS_TRUSTED(bp)	((bp)-&gt;vf.flags &amp; BNXT_VF_TRUST)</div><div class='add'>+#else</div><div class='add'>+#define	BNXT_VF_IS_TRUSTED(bp)	0</div><div class='add'>+#endif</div><div class='ctx'> #define BNXT_NPAR(bp)		((bp)-&gt;port_partition_type)</div><div class='ctx'> #define BNXT_MH(bp)		((bp)-&gt;flags &amp; BNXT_FLAG_MULTI_HOST)</div><div class='ctx'> #define BNXT_SINGLE_PF(bp)	(BNXT_PF(bp) &amp;&amp; !BNXT_NPAR(bp) &amp;&amp; !BNXT_MH(bp))</div><div class='hunk'>@@ -2299,7 +2367,7 @@ struct bnxt {</div><div class='ctx'> 	enum dma_data_direction	rx_dir;</div><div class='ctx'> 	u32			rx_ring_size;</div><div class='ctx'> 	u32			rx_agg_ring_size;</div><div class='del'>-	u32			rx_copy_thresh;</div><div class='add'>+	u32			rx_copybreak;</div><div class='ctx'> 	u32			rx_ring_mask;</div><div class='ctx'> 	u32			rx_agg_ring_mask;</div><div class='ctx'> 	int			rx_nr_pages;</div><div class='hunk'>@@ -2343,6 +2411,7 @@ struct bnxt {</div><div class='ctx'> #define BNXT_RSS_CAP_ESP_V4_RSS_CAP		BIT(6)</div><div class='ctx'> #define BNXT_RSS_CAP_ESP_V6_RSS_CAP		BIT(7)</div><div class='ctx'> #define BNXT_RSS_CAP_MULTI_RSS_CTX		BIT(8)</div><div class='add'>+#define BNXT_RSS_CAP_IPV6_FLOW_LABEL_RSS_CAP	BIT(9)</div><div class='ctx'> </div><div class='ctx'> 	u8			rss_hash_key[HW_HASH_KEY_SIZE];</div><div class='ctx'> 	u8			rss_hash_key_valid:1;</div><div class='hunk'>@@ -2356,8 +2425,13 @@ struct bnxt {</div><div class='ctx'> 	u8			tc_to_qidx[BNXT_MAX_QUEUE];</div><div class='ctx'> 	u8			q_ids[BNXT_MAX_QUEUE];</div><div class='ctx'> 	u8			max_q;</div><div class='add'>+	u8			cos0_cos1_shared;</div><div class='ctx'> 	u8			num_tc;</div><div class='ctx'> </div><div class='add'>+	u16			max_pfcwd_tmo_ms;</div><div class='add'>+</div><div class='add'>+	u8			tph_mode;</div><div class='add'>+</div><div class='ctx'> 	unsigned int		current_interval;</div><div class='ctx'> #define BNXT_TIMER_INTERVAL	HZ</div><div class='ctx'> </div><div class='hunk'>@@ -2406,7 +2480,11 @@ struct bnxt {</div><div class='ctx'> 	#define BNXT_FW_CAP_DCBX_AGENT			BIT_ULL(2)</div><div class='ctx'> 	#define BNXT_FW_CAP_NEW_RM			BIT_ULL(3)</div><div class='ctx'> 	#define BNXT_FW_CAP_IF_CHANGE			BIT_ULL(4)</div><div class='add'>+	#define BNXT_FW_CAP_ENABLE_RDMA_SRIOV           BIT_ULL(5)</div><div class='add'>+	#define BNXT_FW_CAP_ROCE_VF_RESC_MGMT_SUPPORTED	BIT_ULL(6)</div><div class='ctx'> 	#define BNXT_FW_CAP_KONG_MB_CHNL		BIT_ULL(7)</div><div class='add'>+	#define BNXT_FW_CAP_ROCE_VF_DYN_ALLOC_SUPPORT	BIT_ULL(8)</div><div class='add'>+	#define BNXT_FW_CAP_LINK_ADMIN			BIT_ULL(9)</div><div class='ctx'> 	#define BNXT_FW_CAP_OVS_64BIT_HANDLE		BIT_ULL(10)</div><div class='ctx'> 	#define BNXT_FW_CAP_TRUSTED_VF			BIT_ULL(11)</div><div class='ctx'> 	#define BNXT_FW_CAP_ERROR_RECOVERY		BIT_ULL(13)</div><div class='hunk'>@@ -2437,6 +2515,9 @@ struct bnxt {</div><div class='ctx'> 	#define BNXT_FW_CAP_CFA_NTUPLE_RX_EXT_IP_PROTO	BIT_ULL(38)</div><div class='ctx'> 	#define BNXT_FW_CAP_CFA_RFS_RING_TBL_IDX_V3	BIT_ULL(39)</div><div class='ctx'> 	#define BNXT_FW_CAP_VNIC_RE_FLUSH		BIT_ULL(40)</div><div class='add'>+	#define BNXT_FW_CAP_SW_MAX_RESOURCE_LIMITS	BIT_ULL(41)</div><div class='add'>+	#define BNXT_FW_CAP_NPAR_1_2			BIT_ULL(42)</div><div class='add'>+	#define BNXT_FW_CAP_MIRROR_ON_ROCE		BIT_ULL(43)</div><div class='ctx'> </div><div class='ctx'> 	u32			fw_dbg_cap;</div><div class='ctx'> </div><div class='hunk'>@@ -2449,9 +2530,19 @@ struct bnxt {</div><div class='ctx'> #define BNXT_SUPPORTS_MULTI_RSS_CTX(bp)				\</div><div class='ctx'> 	(BNXT_PF(bp) &amp;&amp; BNXT_SUPPORTS_NTUPLE_VNIC(bp) &amp;&amp;	\</div><div class='ctx'> 	 ((bp)-&gt;rss_cap &amp; BNXT_RSS_CAP_MULTI_RSS_CTX))</div><div class='add'>+#define BNXT_ROCE_VF_DYN_ALLOC_CAP(bp)				\</div><div class='add'>+	((bp)-&gt;fw_cap &amp; BNXT_FW_CAP_ROCE_VF_DYN_ALLOC_SUPPORT)</div><div class='ctx'> #define BNXT_SUPPORTS_QUEUE_API(bp)				\</div><div class='ctx'> 	(BNXT_PF(bp) &amp;&amp; BNXT_SUPPORTS_NTUPLE_VNIC(bp) &amp;&amp;	\</div><div class='ctx'> 	 ((bp)-&gt;fw_cap &amp; BNXT_FW_CAP_VNIC_RE_FLUSH))</div><div class='add'>+#define BNXT_RDMA_SRIOV_EN(bp)		\</div><div class='add'>+	((bp)-&gt;fw_cap &amp; BNXT_FW_CAP_ENABLE_RDMA_SRIOV)</div><div class='add'>+#define BNXT_ROCE_VF_RESC_CAP(bp)	\</div><div class='add'>+	((bp)-&gt;fw_cap &amp; BNXT_FW_CAP_ROCE_VF_RESC_MGMT_SUPPORTED)</div><div class='add'>+#define BNXT_SW_RES_LMT(bp)		\</div><div class='add'>+	((bp)-&gt;fw_cap &amp; BNXT_FW_CAP_SW_MAX_RESOURCE_LIMITS)</div><div class='add'>+#define BNXT_MIRROR_ON_ROCE_CAP(bp)	\</div><div class='add'>+	((bp)-&gt;fw_cap &amp; BNXT_FW_CAP_MIRROR_ON_ROCE)</div><div class='ctx'> </div><div class='ctx'> 	u32			hwrm_spec_code;</div><div class='ctx'> 	u16			hwrm_cmd_seq;</div><div class='hunk'>@@ -2466,6 +2557,7 @@ struct bnxt {</div><div class='ctx'> 	u16			fw_rx_stats_ext_size;</div><div class='ctx'> 	u16			fw_tx_stats_ext_size;</div><div class='ctx'> 	u16			hw_ring_stats_size;</div><div class='add'>+	u16			pcie_stat_len;</div><div class='ctx'> 	u8			pri2cos_idx[8];</div><div class='ctx'> 	u8			pri2cos_valid;</div><div class='ctx'> </div><div class='hunk'>@@ -2539,6 +2631,7 @@ struct bnxt {</div><div class='ctx'> #define BNXT_FW_RESET_STATE_POLL_FW	4</div><div class='ctx'> #define BNXT_FW_RESET_STATE_OPENING	5</div><div class='ctx'> #define BNXT_FW_RESET_STATE_POLL_FW_DOWN	6</div><div class='add'>+#define BNXT_FW_RESET_STATE_ABORT	7</div><div class='ctx'> </div><div class='ctx'> 	u16			fw_reset_min_dsecs;</div><div class='ctx'> #define BNXT_DFLT_FW_RST_MIN_DSECS	20</div><div class='hunk'>@@ -2611,6 +2704,11 @@ struct bnxt {</div><div class='ctx'> #define BNXT_PHY_FL_BANK_SEL		(PORT_PHY_QCAPS_RESP_FLAGS2_BANK_ADDR_SUPPORTED &lt;&lt; 8)</div><div class='ctx'> #define BNXT_PHY_FL_SPEEDS2		(PORT_PHY_QCAPS_RESP_FLAGS2_SPEEDS2_SUPPORTED &lt;&lt; 8)</div><div class='ctx'> </div><div class='add'>+	/* copied from flags in hwrm_port_mac_qcaps_output */</div><div class='add'>+	u8			mac_flags;</div><div class='add'>+#define BNXT_MAC_FL_NO_MAC_LPBK		\</div><div class='add'>+	PORT_MAC_QCAPS_RESP_FLAGS_LOCAL_LPBK_NOT_SUPPORTED</div><div class='add'>+</div><div class='ctx'> 	u8			num_tests;</div><div class='ctx'> 	struct bnxt_test_info	*test_info;</div><div class='ctx'> </div><div class='hunk'>@@ -2622,6 +2720,8 @@ struct bnxt {</div><div class='ctx'> 	u16			dump_flag;</div><div class='ctx'> #define BNXT_DUMP_LIVE		0</div><div class='ctx'> #define BNXT_DUMP_CRASH		1</div><div class='add'>+#define BNXT_DUMP_DRIVER	2</div><div class='add'>+#define BNXT_DUMP_LIVE_WITH_CTX_L1_CACHE	3</div><div class='ctx'> </div><div class='ctx'> 	struct bpf_prog		*xdp_prog;</div><div class='ctx'> </div><div class='hunk'>@@ -2650,6 +2750,7 @@ struct bnxt {</div><div class='ctx'> </div><div class='ctx'> 	struct bnxt_ctx_pg_info	*fw_crash_mem;</div><div class='ctx'> 	u32			fw_crash_len;</div><div class='add'>+	struct bnxt_bs_trace_info bs_trace[BNXT_TRACE_MAX];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define BNXT_NUM_RX_RING_STATS			8</div><div class='hunk'>@@ -2711,6 +2812,8 @@ struct bnxt {</div><div class='ctx'> #define SFF_MODULE_ID_QSFP28			0x11</div><div class='ctx'> #define BNXT_MAX_PHY_I2C_RESP_SIZE		64</div><div class='ctx'> </div><div class='add'>+#define BNXT_HDS_THRESHOLD_MAX			1023</div><div class='add'>+</div><div class='ctx'> static inline u32 bnxt_tx_avail(struct bnxt *bp,</div><div class='ctx'> 				const struct bnxt_tx_ring_info *txr)</div><div class='ctx'> {</div><div class='hunk'>@@ -2785,15 +2888,17 @@ static inline bool bnxt_sriov_cfg(struct bnxt *bp)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+extern const u16 bnxt_bstore_to_trace[];</div><div class='ctx'> extern const u16 bnxt_lhint_arr[];</div><div class='ctx'> </div><div class='ctx'> int bnxt_alloc_rx_data(struct bnxt *bp, struct bnxt_rx_ring_info *rxr,</div><div class='ctx'> 		       u16 prod, gfp_t gfp);</div><div class='ctx'> void bnxt_reuse_rx_data(struct bnxt_rx_ring_info *rxr, u16 cons, void *data);</div><div class='ctx'> u32 bnxt_fw_health_readl(struct bnxt *bp, int reg_idx);</div><div class='add'>+bool bnxt_bs_trace_avail(struct bnxt *bp, u16 type);</div><div class='ctx'> void bnxt_set_tpa_flags(struct bnxt *bp);</div><div class='ctx'> void bnxt_set_ring_params(struct bnxt *);</div><div class='del'>-int bnxt_set_rx_skb_mode(struct bnxt *bp, bool page_mode);</div><div class='add'>+void bnxt_set_rx_skb_mode(struct bnxt *bp, bool page_mode);</div><div class='ctx'> void bnxt_insert_usr_fltr(struct bnxt *bp, struct bnxt_filter_base *fltr);</div><div class='ctx'> void bnxt_del_one_usr_fltr(struct bnxt *bp, struct bnxt_filter_base *fltr);</div><div class='ctx'> int bnxt_hwrm_func_drv_rgtr(struct bnxt *bp, unsigned long *bmap,</div><div class='hunk'>@@ -2822,7 +2927,9 @@ int bnxt_hwrm_vnic_alloc(struct bnxt *bp, struct bnxt_vnic_info *vnic,</div><div class='ctx'> int __bnxt_hwrm_get_tx_rings(struct bnxt *bp, u16 fid, int *tx_rings);</div><div class='ctx'> int bnxt_nq_rings_in_use(struct bnxt *bp);</div><div class='ctx'> int bnxt_hwrm_set_coal(struct bnxt *);</div><div class='del'>-void bnxt_free_ctx_mem(struct bnxt *bp);</div><div class='add'>+size_t bnxt_copy_ctx_mem(struct bnxt *bp, struct bnxt_ctx_mem_type *ctxm,</div><div class='add'>+			 void *buf, size_t offset);</div><div class='add'>+void bnxt_free_ctx_mem(struct bnxt *bp, bool force);</div><div class='ctx'> int bnxt_num_tx_to_cp(struct bnxt *bp, int tx);</div><div class='ctx'> unsigned int bnxt_get_max_func_stat_ctxs(struct bnxt *bp);</div><div class='ctx'> unsigned int bnxt_get_avail_stat_ctxs_for_en(struct bnxt *bp);</div><div class='hunk'>@@ -2837,6 +2944,7 @@ void bnxt_report_link(struct bnxt *bp);</div><div class='ctx'> int bnxt_update_link(struct bnxt *bp, bool chng_link_state);</div><div class='ctx'> int bnxt_hwrm_set_pause(struct bnxt *);</div><div class='ctx'> int bnxt_hwrm_set_link_setting(struct bnxt *, bool, bool);</div><div class='add'>+void bnxt_clear_reservations(struct bnxt *bp, bool fw_reset);</div><div class='ctx'> int bnxt_cancel_reservations(struct bnxt *bp, bool fw_reset);</div><div class='ctx'> int bnxt_hwrm_alloc_wol_fltr(struct bnxt *bp);</div><div class='ctx'> int bnxt_hwrm_free_wol_fltr(struct bnxt *bp);</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c<br/>index 4e2b938ed1f7..ccb8b509662d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c</a></div><div class='hunk'>@@ -10,11 +10,57 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_coredump.h"</div><div class='ctx'> </div><div class='add'>+static const u16 bnxt_bstore_to_seg_id[] = {</div><div class='add'>+	[BNXT_CTX_QP]			= BNXT_CTX_MEM_SEG_QP,</div><div class='add'>+	[BNXT_CTX_SRQ]			= BNXT_CTX_MEM_SEG_SRQ,</div><div class='add'>+	[BNXT_CTX_CQ]			= BNXT_CTX_MEM_SEG_CQ,</div><div class='add'>+	[BNXT_CTX_VNIC]			= BNXT_CTX_MEM_SEG_VNIC,</div><div class='add'>+	[BNXT_CTX_STAT]			= BNXT_CTX_MEM_SEG_STAT,</div><div class='add'>+	[BNXT_CTX_STQM]			= BNXT_CTX_MEM_SEG_STQM,</div><div class='add'>+	[BNXT_CTX_FTQM]			= BNXT_CTX_MEM_SEG_FTQM,</div><div class='add'>+	[BNXT_CTX_MRAV]			= BNXT_CTX_MEM_SEG_MRAV,</div><div class='add'>+	[BNXT_CTX_TIM]			= BNXT_CTX_MEM_SEG_TIM,</div><div class='add'>+	[BNXT_CTX_SRT]			= BNXT_CTX_MEM_SEG_SRT,</div><div class='add'>+	[BNXT_CTX_SRT2]			= BNXT_CTX_MEM_SEG_SRT2,</div><div class='add'>+	[BNXT_CTX_CRT]			= BNXT_CTX_MEM_SEG_CRT,</div><div class='add'>+	[BNXT_CTX_CRT2]			= BNXT_CTX_MEM_SEG_CRT2,</div><div class='add'>+	[BNXT_CTX_RIGP0]		= BNXT_CTX_MEM_SEG_RIGP0,</div><div class='add'>+	[BNXT_CTX_L2HWRM]		= BNXT_CTX_MEM_SEG_L2HWRM,</div><div class='add'>+	[BNXT_CTX_REHWRM]		= BNXT_CTX_MEM_SEG_REHWRM,</div><div class='add'>+	[BNXT_CTX_CA0]			= BNXT_CTX_MEM_SEG_CA0,</div><div class='add'>+	[BNXT_CTX_CA1]			= BNXT_CTX_MEM_SEG_CA1,</div><div class='add'>+	[BNXT_CTX_CA2]			= BNXT_CTX_MEM_SEG_CA2,</div><div class='add'>+	[BNXT_CTX_RIGP1]		= BNXT_CTX_MEM_SEG_RIGP1,</div><div class='add'>+	[BNXT_CTX_KONG]			= BNXT_CTX_MEM_SEG_KONG,</div><div class='add'>+	[BNXT_CTX_QPC]			= BNXT_CTX_MEM_SEG_QPC,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int bnxt_dbg_hwrm_log_buffer_flush(struct bnxt *bp, u16 type, u32 flags,</div><div class='add'>+					  u32 *offset)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_dbg_log_buffer_flush_output *resp;</div><div class='add'>+	struct hwrm_dbg_log_buffer_flush_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_req_init(bp, req, HWRM_DBG_LOG_BUFFER_FLUSH);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;flags = cpu_to_le32(flags);</div><div class='add'>+	req-&gt;type = cpu_to_le16(type);</div><div class='add'>+	resp = hwrm_req_hold(bp, req);</div><div class='add'>+	rc = hwrm_req_send(bp, req);</div><div class='add'>+	if (!rc)</div><div class='add'>+		*offset = le32_to_cpu(resp-&gt;current_buffer_offset);</div><div class='add'>+	hwrm_req_drop(bp, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg,</div><div class='ctx'> 				  struct bnxt_hwrm_dbg_dma_info *info)</div><div class='ctx'> {</div><div class='hunk'>@@ -66,20 +112,30 @@ static int bnxt_hwrm_dbg_dma_data(struct bnxt *bp, void *msg,</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (cmn_req-&gt;req_type ==</div><div class='add'>+				cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE))</div><div class='add'>+			info-&gt;dest_buf_size += len;</div><div class='add'>+</div><div class='ctx'> 		if (info-&gt;dest_buf) {</div><div class='ctx'> 			if ((info-&gt;seg_start + off + len) &lt;=</div><div class='ctx'> 			    BNXT_COREDUMP_BUF_LEN(info-&gt;buf_len)) {</div><div class='del'>-				memcpy(info-&gt;dest_buf + off, dma_buf, len);</div><div class='add'>+				u16 copylen = min_t(u16, len,</div><div class='add'>+						    info-&gt;dest_buf_size - off);</div><div class='add'>+</div><div class='add'>+				memcpy(info-&gt;dest_buf + off, dma_buf, copylen);</div><div class='add'>+				if (copylen &lt; len)</div><div class='add'>+					break;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				rc = -ENOBUFS;</div><div class='add'>+				if (cmn_req-&gt;req_type ==</div><div class='add'>+				    cpu_to_le16(HWRM_DBG_COREDUMP_LIST)) {</div><div class='add'>+					kfree(info-&gt;dest_buf);</div><div class='add'>+					info-&gt;dest_buf = NULL;</div><div class='add'>+				}</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (cmn_req-&gt;req_type ==</div><div class='del'>-				cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE))</div><div class='del'>-			info-&gt;dest_buf_size += len;</div><div class='del'>-</div><div class='ctx'> 		if (!(cmn_resp-&gt;flags &amp; HWRM_DBG_CMN_FLAGS_MORE))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -115,8 +171,8 @@ static int bnxt_hwrm_dbg_coredump_list(struct bnxt *bp,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id,</div><div class='del'>-					   u16 segment_id)</div><div class='add'>+static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 dump_type,</div><div class='add'>+					   u16 component_id, u16 segment_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct hwrm_dbg_coredump_initiate_input *req;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -128,6 +184,8 @@ static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt *bp, u16 component_id,</div><div class='ctx'> 	hwrm_req_timeout(bp, req, bp-&gt;hwrm_cmd_max_timeout);</div><div class='ctx'> 	req-&gt;component_id = cpu_to_le16(component_id);</div><div class='ctx'> 	req-&gt;segment_id = cpu_to_le16(segment_id);</div><div class='add'>+	if (dump_type == BNXT_DUMP_LIVE_WITH_CTX_L1_CACHE)</div><div class='add'>+		req-&gt;seg_flags = DBG_COREDUMP_INITIATE_REQ_SEG_FLAGS_COLLECT_CTX_L1_CACHE;</div><div class='ctx'> </div><div class='ctx'> 	return hwrm_req_send(bp, req);</div><div class='ctx'> }</div><div class='hunk'>@@ -165,11 +223,12 @@ static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt *bp, u16 component_id,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='add'>+void</div><div class='ctx'> bnxt_fill_coredump_seg_hdr(struct bnxt *bp,</div><div class='ctx'> 			   struct bnxt_coredump_segment_hdr *seg_hdr,</div><div class='ctx'> 			   struct coredump_segment_record *seg_rec, u32 seg_len,</div><div class='del'>-			   int status, u32 duration, u32 instance)</div><div class='add'>+			   int status, u32 duration, u32 instance, u32 comp_id,</div><div class='add'>+			   u32 seg_id)</div><div class='ctx'> {</div><div class='ctx'> 	memset(seg_hdr, 0, sizeof(*seg_hdr));</div><div class='ctx'> 	memcpy(seg_hdr-&gt;signature, "sEgM", 4);</div><div class='hunk'>@@ -180,11 +239,8 @@ bnxt_fill_coredump_seg_hdr(struct bnxt *bp,</div><div class='ctx'> 		seg_hdr-&gt;high_version = seg_rec-&gt;version_hi;</div><div class='ctx'> 		seg_hdr-&gt;flags = cpu_to_le32(seg_rec-&gt;compress_flags);</div><div class='ctx'> 	} else {</div><div class='del'>-		/* For hwrm_ver_get response Component id = 2</div><div class='del'>-		 * and Segment id = 0</div><div class='del'>-		 */</div><div class='del'>-		seg_hdr-&gt;component_id = cpu_to_le32(2);</div><div class='del'>-		seg_hdr-&gt;segment_id = 0;</div><div class='add'>+		seg_hdr-&gt;component_id = cpu_to_le32(comp_id);</div><div class='add'>+		seg_hdr-&gt;segment_id = cpu_to_le32(seg_id);</div><div class='ctx'> 	}</div><div class='ctx'> 	seg_hdr-&gt;function_id = cpu_to_le16(bp-&gt;pdev-&gt;devfn);</div><div class='ctx'> 	seg_hdr-&gt;length = cpu_to_le32(seg_len);</div><div class='hunk'>@@ -269,7 +325,83 @@ bnxt_fill_coredump_record(struct bnxt *bp, struct bnxt_coredump_record *record,</div><div class='ctx'> 	record-&gt;ioctl_high_version = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len)</div><div class='add'>+static void bnxt_fill_drv_seg_record(struct bnxt *bp,</div><div class='add'>+				     struct bnxt_driver_segment_record *record,</div><div class='add'>+				     struct bnxt_ctx_mem_type *ctxm, u16 type)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_bs_trace_info *bs_trace = &amp;bp-&gt;bs_trace[type];</div><div class='add'>+	u32 offset = 0;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	record-&gt;max_entries = cpu_to_le32(ctxm-&gt;max_entries);</div><div class='add'>+	record-&gt;entry_size = cpu_to_le32(ctxm-&gt;entry_size);</div><div class='add'>+</div><div class='add'>+	rc = bnxt_dbg_hwrm_log_buffer_flush(bp, type, 0, &amp;offset);</div><div class='add'>+	if (rc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bnxt_bs_trace_check_wrap(bs_trace, offset);</div><div class='add'>+	record-&gt;offset = cpu_to_le32(bs_trace-&gt;last_offset);</div><div class='add'>+	record-&gt;wrapped = bs_trace-&gt;wrapped;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 bnxt_get_ctx_coredump(struct bnxt *bp, void *buf, u32 offset,</div><div class='add'>+				 u32 *segs)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_driver_segment_record record = {};</div><div class='add'>+	struct bnxt_coredump_segment_hdr seg_hdr;</div><div class='add'>+	struct bnxt_ctx_mem_info *ctx = bp-&gt;ctx;</div><div class='add'>+	u32 comp_id = BNXT_DRV_COMP_ID;</div><div class='add'>+	void *data = NULL;</div><div class='add'>+	size_t len = 0;</div><div class='add'>+	u16 type;</div><div class='add'>+</div><div class='add'>+	*segs = 0;</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		buf += offset;</div><div class='add'>+	for (type = 0; type &lt; BNXT_CTX_V2_MAX; type++) {</div><div class='add'>+		struct bnxt_ctx_mem_type *ctxm = &amp;ctx-&gt;ctx_arr[type];</div><div class='add'>+		bool trace = bnxt_bs_trace_avail(bp, type);</div><div class='add'>+		u32 seg_id = bnxt_bstore_to_seg_id[type];</div><div class='add'>+		size_t seg_len, extra_hlen = 0;</div><div class='add'>+</div><div class='add'>+		if (!ctxm-&gt;mem_valid || !seg_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (trace) {</div><div class='add'>+			extra_hlen = BNXT_SEG_RCD_LEN;</div><div class='add'>+			if (buf) {</div><div class='add'>+				u16 trace_type = bnxt_bstore_to_trace[type];</div><div class='add'>+</div><div class='add'>+				bnxt_fill_drv_seg_record(bp, &amp;record, ctxm,</div><div class='add'>+							 trace_type);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (buf)</div><div class='add'>+			data = buf + BNXT_SEG_HDR_LEN + extra_hlen;</div><div class='add'>+</div><div class='add'>+		seg_len = bnxt_copy_ctx_mem(bp, ctxm, data, 0) + extra_hlen;</div><div class='add'>+		if (buf) {</div><div class='add'>+			bnxt_fill_coredump_seg_hdr(bp, &amp;seg_hdr, NULL, seg_len,</div><div class='add'>+						   0, 0, 0, comp_id, seg_id);</div><div class='add'>+			memcpy(buf, &amp;seg_hdr, BNXT_SEG_HDR_LEN);</div><div class='add'>+			buf += BNXT_SEG_HDR_LEN;</div><div class='add'>+			if (trace)</div><div class='add'>+				memcpy(buf, &amp;record, BNXT_SEG_RCD_LEN);</div><div class='add'>+			buf += seg_len;</div><div class='add'>+		}</div><div class='add'>+		len += BNXT_SEG_HDR_LEN + seg_len;</div><div class='add'>+		*segs += 1;</div><div class='add'>+	}</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __bnxt_get_coredump(struct bnxt *bp, u16 dump_type, void *buf,</div><div class='add'>+			       u32 *dump_len)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ver_get_resp_len = sizeof(struct hwrm_ver_get_output);</div><div class='ctx'> 	u32 offset = 0, seg_hdr_len, seg_record_len, buf_len = 0;</div><div class='hunk'>@@ -287,17 +419,31 @@ static int __bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len)</div><div class='ctx'> 	start_utc = sys_tz.tz_minuteswest * 60;</div><div class='ctx'> 	seg_hdr_len = sizeof(seg_hdr);</div><div class='ctx'> </div><div class='del'>-	/* First segment should be hwrm_ver_get response */</div><div class='add'>+	/* First segment should be hwrm_ver_get response.</div><div class='add'>+	 * For hwrm_ver_get response Component id = 2 and Segment id = 0.</div><div class='add'>+	 */</div><div class='ctx'> 	*dump_len = seg_hdr_len + ver_get_resp_len;</div><div class='ctx'> 	if (buf) {</div><div class='ctx'> 		bnxt_fill_coredump_seg_hdr(bp, &amp;seg_hdr, NULL, ver_get_resp_len,</div><div class='del'>-					   0, 0, 0);</div><div class='add'>+					   0, 0, 0, BNXT_VER_GET_COMP_ID, 0);</div><div class='ctx'> 		memcpy(buf + offset, &amp;seg_hdr, seg_hdr_len);</div><div class='ctx'> 		offset += seg_hdr_len;</div><div class='ctx'> 		memcpy(buf + offset, &amp;bp-&gt;ver_resp, ver_get_resp_len);</div><div class='ctx'> 		offset += ver_get_resp_len;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (dump_type == BNXT_DUMP_DRIVER) {</div><div class='add'>+		u32 drv_len, segs = 0;</div><div class='add'>+</div><div class='add'>+		drv_len = bnxt_get_ctx_coredump(bp, buf, offset, &amp;segs);</div><div class='add'>+		*dump_len += drv_len;</div><div class='add'>+		offset += drv_len;</div><div class='add'>+		if (buf)</div><div class='add'>+			coredump.total_segs += segs;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seg_record_len = sizeof(*seg_record);</div><div class='ctx'> 	rc = bnxt_hwrm_dbg_coredump_list(bp, &amp;coredump);</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		netdev_err(bp-&gt;dev, "Failed to get coredump segment list\n");</div><div class='hunk'>@@ -323,7 +469,8 @@ static int __bnxt_get_coredump(struct bnxt *bp, void *buf, u32 *dump_len)</div><div class='ctx'> </div><div class='ctx'> 		start = jiffies;</div><div class='ctx'> </div><div class='del'>-		rc = bnxt_hwrm_dbg_coredump_initiate(bp, comp_id, seg_id);</div><div class='add'>+		rc = bnxt_hwrm_dbg_coredump_initiate(bp, dump_type, comp_id,</div><div class='add'>+						     seg_id);</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			netdev_err(bp-&gt;dev,</div><div class='ctx'> 				   "Failed to initiate coredump for seg = %d\n",</div><div class='hunk'>@@ -346,7 +493,7 @@ next_seg:</div><div class='ctx'> 		end = jiffies;</div><div class='ctx'> 		duration = jiffies_to_msecs(end - start);</div><div class='ctx'> 		bnxt_fill_coredump_seg_hdr(bp, &amp;seg_hdr, seg_record, seg_len,</div><div class='del'>-					   rc, duration, 0);</div><div class='add'>+					   rc, duration, 0, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 		if (buf) {</div><div class='ctx'> 			/* Write segment header into the buffer */</div><div class='hunk'>@@ -366,9 +513,16 @@ err:</div><div class='ctx'> 					  start_utc, coredump.total_segs + 1,</div><div class='ctx'> 					  rc);</div><div class='ctx'> 	kfree(coredump.data);</div><div class='del'>-	*dump_len += sizeof(struct bnxt_coredump_record);</div><div class='del'>-	if (rc == -ENOBUFS)</div><div class='add'>+	if (!rc) {</div><div class='add'>+		*dump_len += sizeof(struct bnxt_coredump_record);</div><div class='add'>+		/* The actual coredump length can be smaller than the FW</div><div class='add'>+		 * reported length earlier.  Use the ethtool provided length.</div><div class='add'>+		 */</div><div class='add'>+		if (buf_len)</div><div class='add'>+			*dump_len = buf_len;</div><div class='add'>+	} else if (rc == -ENOBUFS) {</div><div class='ctx'> 		netdev_err(bp-&gt;dev, "Firmware returned large coredump buffer\n");</div><div class='add'>+	}</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -442,7 +596,7 @@ int bnxt_get_coredump(struct bnxt *bp, u16 dump_type, void *buf, u32 *dump_len)</div><div class='ctx'> 		else</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 	} else {</div><div class='del'>-		return __bnxt_get_coredump(bp, buf, dump_len);</div><div class='add'>+		return __bnxt_get_coredump(bp, dump_type, buf, dump_len);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -512,9 +666,12 @@ u32 bnxt_get_coredump_length(struct bnxt *bp, u16 dump_type)</div><div class='ctx'> 		return bp-&gt;fw_crash_len;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (bnxt_hwrm_get_dump_len(bp, dump_type, &amp;len)) {</div><div class='del'>-		if (dump_type != BNXT_DUMP_CRASH)</div><div class='del'>-			__bnxt_get_coredump(bp, NULL, &amp;len);</div><div class='add'>+	if (dump_type != BNXT_DUMP_DRIVER) {</div><div class='add'>+		if (!bnxt_hwrm_get_dump_len(bp, dump_type, &amp;len))</div><div class='add'>+			return len;</div><div class='ctx'> 	}</div><div class='add'>+	if (dump_type != BNXT_DUMP_CRASH)</div><div class='add'>+		__bnxt_get_coredump(bp, dump_type, NULL, &amp;len);</div><div class='add'>+</div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.h<br/>index a76d5c281413..c087df88154a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.h</a></div><div class='hunk'>@@ -68,11 +68,51 @@ struct bnxt_coredump_record {</div><div class='ctx'> 	__le16 rsvd3[313];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct bnxt_driver_segment_record {</div><div class='add'>+	__le32 max_entries;</div><div class='add'>+	__le32 entry_size;</div><div class='add'>+	__le32 offset;</div><div class='add'>+	__u8 wrapped:1;</div><div class='add'>+	__u8 unused[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define BNXT_VER_GET_COMP_ID	2</div><div class='add'>+#define BNXT_DRV_COMP_ID	0xd</div><div class='add'>+</div><div class='add'>+#define BNXT_CTX_MEM_SEG_ID_START  0x200</div><div class='add'>+</div><div class='add'>+#define BNXT_CTX_MEM_SEG_QP	(BNXT_CTX_MEM_SEG_ID_START + BNXT_CTX_QP)</div><div class='add'>+#define BNXT_CTX_MEM_SEG_SRQ	(BNXT_CTX_MEM_SEG_ID_START + BNXT_CTX_SRQ)</div><div class='add'>+#define BNXT_CTX_MEM_SEG_CQ	(BNXT_CTX_MEM_SEG_ID_START + BNXT_CTX_CQ)</div><div class='add'>+#define BNXT_CTX_MEM_SEG_VNIC	(BNXT_CTX_MEM_SEG_ID_START + BNXT_CTX_VNIC)</div><div class='add'>+#define BNXT_CTX_MEM_SEG_STAT	(BNXT_CTX_MEM_SEG_ID_START + BNXT_CTX_STAT)</div><div class='add'>+#define BNXT_CTX_MEM_SEG_STQM	(BNXT_CTX_MEM_SEG_ID_START + BNXT_CTX_STQM)</div><div class='add'>+#define BNXT_CTX_MEM_SEG_FTQM	(BNXT_CTX_MEM_SEG_ID_START + BNXT_CTX_FTQM)</div><div class='add'>+#define BNXT_CTX_MEM_SEG_MRAV	(BNXT_CTX_MEM_SEG_ID_START + BNXT_CTX_MRAV)</div><div class='add'>+#define BNXT_CTX_MEM_SEG_TIM	(BNXT_CTX_MEM_SEG_ID_START + BNXT_CTX_TIM)</div><div class='add'>+</div><div class='add'>+#define BNXT_CTX_MEM_SEG_SRT	0x1</div><div class='add'>+#define BNXT_CTX_MEM_SEG_SRT2	0x2</div><div class='add'>+#define BNXT_CTX_MEM_SEG_CRT	0x3</div><div class='add'>+#define BNXT_CTX_MEM_SEG_CRT2	0x4</div><div class='add'>+#define BNXT_CTX_MEM_SEG_RIGP0	0x5</div><div class='add'>+#define BNXT_CTX_MEM_SEG_L2HWRM	0x6</div><div class='add'>+#define BNXT_CTX_MEM_SEG_REHWRM	0x7</div><div class='add'>+#define BNXT_CTX_MEM_SEG_CA0	0x8</div><div class='add'>+#define BNXT_CTX_MEM_SEG_CA1	0x9</div><div class='add'>+#define BNXT_CTX_MEM_SEG_CA2	0xa</div><div class='add'>+#define BNXT_CTX_MEM_SEG_RIGP1	0xb</div><div class='add'>+#define BNXT_CTX_MEM_SEG_QPC	0xc</div><div class='add'>+#define BNXT_CTX_MEM_SEG_KONG	0xd</div><div class='add'>+</div><div class='ctx'> #define BNXT_CRASH_DUMP_LEN	(8 &lt;&lt; 20)</div><div class='ctx'> </div><div class='ctx'> #define COREDUMP_LIST_BUF_LEN		2048</div><div class='ctx'> #define COREDUMP_RETRIEVE_BUF_LEN	4096</div><div class='ctx'> </div><div class='add'>+#define BNXT_SEG_HDR_LEN	sizeof(struct bnxt_coredump_segment_hdr)</div><div class='add'>+#define BNXT_SEG_RCD_LEN	sizeof(struct bnxt_driver_segment_record)</div><div class='add'>+</div><div class='ctx'> struct bnxt_coredump {</div><div class='ctx'> 	void		*data;</div><div class='ctx'> 	int		data_size;</div><div class='hunk'>@@ -118,6 +158,11 @@ struct hwrm_dbg_cmn_output {</div><div class='ctx'> #define BNXT_DBG_CR_DUMP_MDM_CFG_DDR	\</div><div class='ctx'> 	DBG_CRASHDUMP_MEDIUM_CFG_REQ_TYPE_DDR</div><div class='ctx'> </div><div class='add'>+void bnxt_fill_coredump_seg_hdr(struct bnxt *bp,</div><div class='add'>+				struct bnxt_coredump_segment_hdr *seg_hdr,</div><div class='add'>+				struct coredump_segment_record *seg_rec,</div><div class='add'>+				u32 seg_len, int status, u32 duration,</div><div class='add'>+				u32 instance, u32 comp_id, u32 seg_id);</div><div class='ctx'> int bnxt_get_coredump(struct bnxt *bp, u16 dump_type, void *buf, u32 *dump_len);</div><div class='ctx'> int bnxt_hwrm_get_dump_len(struct bnxt *bp, u16 dump_type, u32 *dump_len);</div><div class='ctx'> u32 bnxt_get_coredump_length(struct bnxt *bp, u16 dump_type);</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c<br/>index 0dbb880a7aa0..a00b67334f9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;rdma/ib_verbs.h&gt;</div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_dcb.h"</div><div class='hunk'>@@ -487,7 +487,9 @@ static int bnxt_ets_validate(struct bnxt *bp, struct ieee_ets *ets, u8 *tc)</div><div class='ctx'> </div><div class='ctx'> 		if ((ets-&gt;tc_tx_bw[i] || ets-&gt;tc_tsa[i]) &amp;&amp; i &gt; bp-&gt;max_tc)</div><div class='ctx'> 			return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; max_tc; i++) {</div><div class='ctx'> 		switch (ets-&gt;tc_tsa[i]) {</div><div class='ctx'> 		case IEEE_8021QAZ_TSA_STRICT:</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.c<br/>index 127b7015f676..3324afbb3bec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.c</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> #include &lt;linux/dim.h&gt;</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_debugfs.h"</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.h<br/>index d0bb4887acd0..a0a8d687dd99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.h</a></div><div class='hunk'>@@ -7,7 +7,7 @@</div><div class='ctx'>  * the Free Software Foundation.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c<br/>index 4cb0fabf977e..15de802bbac4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c</a></div><div class='hunk'>@@ -11,7 +11,8 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;net/devlink.h&gt;</div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_vfr.h"</div><div class='hunk'>@@ -39,12 +40,6 @@ bnxt_dl_flash_update(struct devlink *dl,</div><div class='ctx'> 	struct bnxt *bp = bnxt_get_bp_from_dl(dl);</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	if (!BNXT_PF(bp)) {</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack,</div><div class='del'>-				   "flash update not supported from a VF");</div><div class='del'>-		return -EPERM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	devlink_flash_update_status_notify(dl, "Preparing to flash", NULL, 0, 0);</div><div class='ctx'> 	rc = bnxt_flash_package_from_fw_obj(bp-&gt;dev, params-&gt;fw, 0, extack);</div><div class='ctx'> 	if (!rc)</div><div class='hunk'>@@ -219,7 +214,7 @@ __bnxt_dl_reporter_create(struct bnxt *bp,</div><div class='ctx'> {</div><div class='ctx'> 	struct devlink_health_reporter *reporter;</div><div class='ctx'> </div><div class='del'>-	reporter = devlink_health_reporter_create(bp-&gt;dl, ops, 0, bp);</div><div class='add'>+	reporter = devlink_health_reporter_create(bp-&gt;dl, ops, bp);</div><div class='ctx'> 	if (IS_ERR(reporter)) {</div><div class='ctx'> 		netdev_warn(bp-&gt;dev, "Failed to create %s health reporter, rc = %ld\n",</div><div class='ctx'> 			    ops-&gt;name, PTR_ERR(reporter));</div><div class='hunk'>@@ -439,14 +434,17 @@ static int bnxt_dl_reload_down(struct devlink *dl, bool netns_change,</div><div class='ctx'> 	case DEVLINK_RELOAD_ACTION_DRIVER_REINIT: {</div><div class='ctx'> 		bnxt_ulp_stop(bp);</div><div class='ctx'> 		rtnl_lock();</div><div class='add'>+		netdev_lock(bp-&gt;dev);</div><div class='ctx'> 		if (bnxt_sriov_cfg(bp)) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack,</div><div class='ctx'> 					   "reload is unsupported while VFs are allocated or being configured");</div><div class='add'>+			netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 			rtnl_unlock();</div><div class='ctx'> 			bnxt_ulp_start(bp, 0);</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (bp-&gt;dev-&gt;reg_state == NETREG_UNREGISTERED) {</div><div class='add'>+			netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 			rtnl_unlock();</div><div class='ctx'> 			bnxt_ulp_start(bp, 0);</div><div class='ctx'> 			return -ENODEV;</div><div class='hunk'>@@ -458,12 +456,13 @@ static int bnxt_dl_reload_down(struct devlink *dl, bool netns_change,</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack, "Failed to deregister");</div><div class='ctx'> 			if (netif_running(bp-&gt;dev))</div><div class='del'>-				dev_close(bp-&gt;dev);</div><div class='add'>+				netif_close(bp-&gt;dev);</div><div class='add'>+			netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 			rtnl_unlock();</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		bnxt_cancel_reservations(bp, false);</div><div class='del'>-		bnxt_free_ctx_mem(bp);</div><div class='add'>+		bnxt_clear_reservations(bp, false);</div><div class='add'>+		bnxt_free_ctx_mem(bp, false);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	case DEVLINK_RELOAD_ACTION_FW_ACTIVATE: {</div><div class='hunk'>@@ -479,7 +478,9 @@ static int bnxt_dl_reload_down(struct devlink *dl, bool netns_change,</div><div class='ctx'> 			return -EPERM;</div><div class='ctx'> 		}</div><div class='ctx'> 		rtnl_lock();</div><div class='add'>+		netdev_lock(bp-&gt;dev);</div><div class='ctx'> 		if (bp-&gt;dev-&gt;reg_state == NETREG_UNREGISTERED) {</div><div class='add'>+			netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 			rtnl_unlock();</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -493,6 +494,7 @@ static int bnxt_dl_reload_down(struct devlink *dl, bool netns_change,</div><div class='ctx'> 		if (rc) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack, "Failed to activate firmware");</div><div class='ctx'> 			clear_bit(BNXT_STATE_FW_ACTIVATE, &amp;bp-&gt;state);</div><div class='add'>+			netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 			rtnl_unlock();</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -511,6 +513,8 @@ static int bnxt_dl_reload_up(struct devlink *dl, enum devlink_reload_action acti</div><div class='ctx'> 	struct bnxt *bp = bnxt_get_bp_from_dl(dl);</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(bp-&gt;dev);</div><div class='add'>+</div><div class='ctx'> 	*actions_performed = 0;</div><div class='ctx'> 	switch (action) {</div><div class='ctx'> 	case DEVLINK_RELOAD_ACTION_DRIVER_REINIT: {</div><div class='hunk'>@@ -535,6 +539,7 @@ static int bnxt_dl_reload_up(struct devlink *dl, enum devlink_reload_action acti</div><div class='ctx'> 		if (!netif_running(bp-&gt;dev))</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack,</div><div class='ctx'> 					   "Device is closed, not waiting for reset notice that will never come");</div><div class='add'>+		netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 		rtnl_unlock();</div><div class='ctx'> 		while (test_bit(BNXT_STATE_FW_ACTIVATE, &amp;bp-&gt;state)) {</div><div class='ctx'> 			if (time_after(jiffies, timeout)) {</div><div class='hunk'>@@ -550,6 +555,7 @@ static int bnxt_dl_reload_up(struct devlink *dl, enum devlink_reload_action acti</div><div class='ctx'> 			msleep(50);</div><div class='ctx'> 		}</div><div class='ctx'> 		rtnl_lock();</div><div class='add'>+		netdev_lock(bp-&gt;dev);</div><div class='ctx'> 		if (!rc)</div><div class='ctx'> 			*actions_performed |= BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT);</div><div class='ctx'> 		clear_bit(BNXT_STATE_FW_ACTIVATE, &amp;bp-&gt;state);</div><div class='hunk'>@@ -568,8 +574,9 @@ static int bnxt_dl_reload_up(struct devlink *dl, enum devlink_reload_action acti</div><div class='ctx'> 		}</div><div class='ctx'> 		*actions_performed |= BIT(action);</div><div class='ctx'> 	} else if (netif_running(bp-&gt;dev)) {</div><div class='del'>-		dev_close(bp-&gt;dev);</div><div class='add'>+		netif_close(bp-&gt;dev);</div><div class='ctx'> 	}</div><div class='add'>+	netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> 	if (action == DEVLINK_RELOAD_ACTION_DRIVER_REINIT)</div><div class='ctx'> 		bnxt_ulp_start(bp, rc);</div><div class='hunk'>@@ -666,6 +673,8 @@ static const struct bnxt_dl_nvm_param nvm_params[] = {</div><div class='ctx'> 	 NVM_OFF_MSIX_VEC_PER_PF_MAX, BNXT_NVM_SHARED_CFG, 10, 4},</div><div class='ctx'> 	{DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,</div><div class='ctx'> 	 NVM_OFF_MSIX_VEC_PER_PF_MIN, BNXT_NVM_SHARED_CFG, 7, 4},</div><div class='add'>+	{DEVLINK_PARAM_GENERIC_ID_ENABLE_ROCE, NVM_OFF_SUPPORT_RDMA,</div><div class='add'>+	 BNXT_NVM_FUNC_CFG, 1, 1},</div><div class='ctx'> 	{BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK, NVM_OFF_DIS_GRE_VER_CHECK,</div><div class='ctx'> 	 BNXT_NVM_SHARED_CFG, 1, 1},</div><div class='ctx'> };</div><div class='hunk'>@@ -1010,37 +1019,19 @@ static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req,</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,</div><div class='del'>-			     union devlink_param_value *val)</div><div class='add'>+static int __bnxt_hwrm_nvm_req(struct bnxt *bp,</div><div class='add'>+			       const struct bnxt_dl_nvm_param *nvm, void *msg,</div><div class='add'>+			       union devlink_param_value *val)</div><div class='ctx'> {</div><div class='ctx'> 	struct hwrm_nvm_get_variable_input *req = msg;</div><div class='del'>-	struct bnxt_dl_nvm_param nvm_param;</div><div class='ctx'> 	struct hwrm_err_output *resp;</div><div class='ctx'> 	union bnxt_nvm_data *data;</div><div class='ctx'> 	dma_addr_t data_dma_addr;</div><div class='del'>-	int idx = 0, rc, i;</div><div class='add'>+	int idx = 0, rc;</div><div class='ctx'> </div><div class='del'>-	/* Get/Set NVM CFG parameter is supported only on PFs */</div><div class='del'>-	if (BNXT_VF(bp)) {</div><div class='del'>-		hwrm_req_drop(bp, req);</div><div class='del'>-		return -EPERM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(nvm_params); i++) {</div><div class='del'>-		if (nvm_params[i].id == param_id) {</div><div class='del'>-			nvm_param = nvm_params[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i == ARRAY_SIZE(nvm_params)) {</div><div class='del'>-		hwrm_req_drop(bp, req);</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (nvm_param.dir_type == BNXT_NVM_PORT_CFG)</div><div class='add'>+	if (nvm-&gt;dir_type == BNXT_NVM_PORT_CFG)</div><div class='ctx'> 		idx = bp-&gt;pf.port_id;</div><div class='del'>-	else if (nvm_param.dir_type == BNXT_NVM_FUNC_CFG)</div><div class='add'>+	else if (nvm-&gt;dir_type == BNXT_NVM_FUNC_CFG)</div><div class='ctx'> 		idx = bp-&gt;pf.fw_fid - BNXT_FIRST_PF_FID;</div><div class='ctx'> </div><div class='ctx'> 	data = hwrm_req_dma_slice(bp, req, sizeof(*data), &amp;data_dma_addr);</div><div class='hunk'>@@ -1051,23 +1042,23 @@ static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	req-&gt;dest_data_addr = cpu_to_le64(data_dma_addr);</div><div class='del'>-	req-&gt;data_len = cpu_to_le16(nvm_param.nvm_num_bits);</div><div class='del'>-	req-&gt;option_num = cpu_to_le16(nvm_param.offset);</div><div class='add'>+	req-&gt;data_len = cpu_to_le16(nvm-&gt;nvm_num_bits);</div><div class='add'>+	req-&gt;option_num = cpu_to_le16(nvm-&gt;offset);</div><div class='ctx'> 	req-&gt;index_0 = cpu_to_le16(idx);</div><div class='ctx'> 	if (idx)</div><div class='ctx'> 		req-&gt;dimensions = cpu_to_le16(1);</div><div class='ctx'> </div><div class='ctx'> 	resp = hwrm_req_hold(bp, req);</div><div class='ctx'> 	if (req-&gt;req_type == cpu_to_le16(HWRM_NVM_SET_VARIABLE)) {</div><div class='del'>-		bnxt_copy_to_nvm_data(data, val, nvm_param.nvm_num_bits,</div><div class='del'>-				      nvm_param.dl_num_bytes);</div><div class='add'>+		bnxt_copy_to_nvm_data(data, val, nvm-&gt;nvm_num_bits,</div><div class='add'>+				      nvm-&gt;dl_num_bytes);</div><div class='ctx'> 		rc = hwrm_req_send(bp, msg);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		rc = hwrm_req_send_silent(bp, msg);</div><div class='ctx'> 		if (!rc) {</div><div class='ctx'> 			bnxt_copy_from_nvm_data(val, data,</div><div class='del'>-						nvm_param.nvm_num_bits,</div><div class='del'>-						nvm_param.dl_num_bytes);</div><div class='add'>+						nvm-&gt;nvm_num_bits,</div><div class='add'>+						nvm-&gt;dl_num_bytes);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (resp-&gt;cmd_err ==</div><div class='ctx'> 				NVM_GET_VARIABLE_CMD_ERR_CODE_VAR_NOT_EXIST)</div><div class='hunk'>@@ -1080,8 +1071,23 @@ static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnxt_hwrm_nvm_req(struct bnxt *bp, u32 param_id, void *msg,</div><div class='add'>+			     union devlink_param_value *val)</div><div class='add'>+{</div><div class='add'>+	const struct bnxt_dl_nvm_param *nvm_param;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(nvm_params); i++) {</div><div class='add'>+		nvm_param = &amp;nvm_params[i];</div><div class='add'>+		if (nvm_param-&gt;id == param_id)</div><div class='add'>+			return __bnxt_hwrm_nvm_req(bp, nvm_param, msg, val);</div><div class='add'>+	}</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnxt_dl_nvm_param_get(struct devlink *dl, u32 id,</div><div class='del'>-				 struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				 struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = bnxt_get_bp_from_dl(dl);</div><div class='ctx'> 	struct hwrm_nvm_get_variable_input *req;</div><div class='hunk'>@@ -1116,6 +1122,32 @@ static int bnxt_dl_nvm_param_set(struct devlink *dl, u32 id,</div><div class='ctx'> 	return bnxt_hwrm_nvm_req(bp, id, req, &amp;ctx-&gt;val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnxt_dl_roce_validate(struct devlink *dl, u32 id,</div><div class='add'>+				 union devlink_param_value val,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	const struct bnxt_dl_nvm_param nvm_roce_cap = {0, NVM_OFF_RDMA_CAPABLE,</div><div class='add'>+		BNXT_NVM_SHARED_CFG, 1, 1};</div><div class='add'>+	struct bnxt *bp = bnxt_get_bp_from_dl(dl);</div><div class='add'>+	struct hwrm_nvm_get_variable_input *req;</div><div class='add'>+	union devlink_param_value roce_cap;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_req_init(bp, req, HWRM_NVM_GET_VARIABLE);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (__bnxt_hwrm_nvm_req(bp, &amp;nvm_roce_cap, req, &amp;roce_cap)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Unable to verify if device is RDMA Capable");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (!roce_cap.vbool) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Device does not support RDMA");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnxt_dl_msix_validate(struct devlink *dl, u32 id,</div><div class='ctx'> 				 union devlink_param_value val,</div><div class='ctx'> 				 struct netlink_ext_ack *extack)</div><div class='hunk'>@@ -1137,7 +1169,8 @@ static int bnxt_dl_msix_validate(struct devlink *dl, u32 id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnxt_remote_dev_reset_get(struct devlink *dl, u32 id,</div><div class='del'>-				     struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				     struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = bnxt_get_bp_from_dl(dl);</div><div class='ctx'> </div><div class='hunk'>@@ -1180,6 +1213,10 @@ static const struct devlink_param bnxt_dl_params[] = {</div><div class='ctx'> 			      BIT(DEVLINK_PARAM_CMODE_PERMANENT),</div><div class='ctx'> 			      bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,</div><div class='ctx'> 			      bnxt_dl_msix_validate),</div><div class='add'>+	DEVLINK_PARAM_GENERIC(ENABLE_ROCE,</div><div class='add'>+			      BIT(DEVLINK_PARAM_CMODE_PERMANENT),</div><div class='add'>+			      bnxt_dl_nvm_param_get, bnxt_dl_nvm_param_set,</div><div class='add'>+			      bnxt_dl_roce_validate),</div><div class='ctx'> 	DEVLINK_PARAM_DRIVER(BNXT_DEVLINK_PARAM_ID_GRE_VER_CHECK,</div><div class='ctx'> 			     "gre_ver_check", DEVLINK_PARAM_TYPE_BOOL,</div><div class='ctx'> 			     BIT(DEVLINK_PARAM_CMODE_PERMANENT),</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h<br/>index b8105065367b..7f45dcd7b287 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h</a></div><div class='hunk'>@@ -41,8 +41,10 @@ static inline void bnxt_dl_set_remote_reset(struct devlink *dl, bool value)</div><div class='ctx'> #define NVM_OFF_MSIX_VEC_PER_PF_MAX	108</div><div class='ctx'> #define NVM_OFF_MSIX_VEC_PER_PF_MIN	114</div><div class='ctx'> #define NVM_OFF_IGNORE_ARI		164</div><div class='add'>+#define NVM_OFF_RDMA_CAPABLE		161</div><div class='ctx'> #define NVM_OFF_DIS_GRE_VER_CHECK	171</div><div class='ctx'> #define NVM_OFF_ENABLE_SRIOV		401</div><div class='add'>+#define NVM_OFF_SUPPORT_RDMA		506</div><div class='ctx'> #define NVM_OFF_NVM_CFG_VER		602</div><div class='ctx'> </div><div class='ctx'> #define BNXT_NVM_CFG_VER_BITS		8</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_dim.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_dim.c<br/>index 6f6576dc417a..53a3bcb0efe0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_dim.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_dim.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_dim.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_dim.c</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/dim.h&gt;</div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> </div><div class='ctx'> void bnxt_dim_work(struct work_struct *work)</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c<br/>index 6ef06579df53..068e191ede19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c</a></div><div class='hunk'>@@ -24,8 +24,9 @@</div><div class='ctx'> #include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/timecounter.h&gt;</div><div class='add'>+#include &lt;net/netdev_queues.h&gt;</div><div class='ctx'> #include &lt;net/netlink.h&gt;</div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_ulp.h"</div><div class='hunk'>@@ -687,16 +688,22 @@ skip_ring_stats:</div><div class='ctx'> 				buf[j] = *(rx_port_stats_ext + n);</div><div class='ctx'> 			}</div><div class='ctx'> 			for (i = 0; i &lt; 8; i++, j++) {</div><div class='del'>-				long n = bnxt_tx_bytes_pri_arr[i].base_off +</div><div class='del'>-					 bp-&gt;pri2cos_idx[i];</div><div class='add'>+				u8 cos_idx = bp-&gt;pri2cos_idx[i];</div><div class='add'>+				long n;</div><div class='ctx'> </div><div class='add'>+				n = bnxt_tx_bytes_pri_arr[i].base_off + cos_idx;</div><div class='ctx'> 				buf[j] = *(tx_port_stats_ext + n);</div><div class='add'>+				if (bp-&gt;cos0_cos1_shared &amp;&amp; !cos_idx)</div><div class='add'>+					buf[j] += *(tx_port_stats_ext + n + 1);</div><div class='ctx'> 			}</div><div class='ctx'> 			for (i = 0; i &lt; 8; i++, j++) {</div><div class='del'>-				long n = bnxt_tx_pkts_pri_arr[i].base_off +</div><div class='del'>-					 bp-&gt;pri2cos_idx[i];</div><div class='add'>+				u8 cos_idx = bp-&gt;pri2cos_idx[i];</div><div class='add'>+				long n;</div><div class='ctx'> </div><div class='add'>+				n = bnxt_tx_pkts_pri_arr[i].base_off + cos_idx;</div><div class='ctx'> 				buf[j] = *(tx_port_stats_ext + n);</div><div class='add'>+				if (bp-&gt;cos0_cos1_shared &amp;&amp; !cos_idx)</div><div class='add'>+					buf[j] += *(tx_port_stats_ext + n + 1);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -833,6 +840,8 @@ static void bnxt_get_ringparam(struct net_device *dev,</div><div class='ctx'> 	ering-&gt;rx_pending = bp-&gt;rx_ring_size;</div><div class='ctx'> 	ering-&gt;rx_jumbo_pending = bp-&gt;rx_agg_ring_size;</div><div class='ctx'> 	ering-&gt;tx_pending = bp-&gt;tx_ring_size;</div><div class='add'>+</div><div class='add'>+	kernel_ering-&gt;hds_thresh_max = BNXT_HDS_THRESHOLD_MAX;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnxt_set_ringparam(struct net_device *dev,</div><div class='hunk'>@@ -840,16 +849,35 @@ static int bnxt_set_ringparam(struct net_device *dev,</div><div class='ctx'> 			      struct kernel_ethtool_ringparam *kernel_ering,</div><div class='ctx'> 			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	u8 tcp_data_split = kernel_ering-&gt;tcp_data_split;</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='add'>+	u8 hds_config_mod;</div><div class='ctx'> </div><div class='ctx'> 	if ((ering-&gt;rx_pending &gt; BNXT_MAX_RX_DESC_CNT) ||</div><div class='ctx'> 	    (ering-&gt;tx_pending &gt; BNXT_MAX_TX_DESC_CNT) ||</div><div class='ctx'> 	    (ering-&gt;tx_pending &lt; BNXT_MIN_TX_DESC_CNT))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	hds_config_mod = tcp_data_split != dev-&gt;cfg-&gt;hds_config;</div><div class='add'>+	if (tcp_data_split == ETHTOOL_TCP_DATA_SPLIT_DISABLED &amp;&amp; hds_config_mod)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (tcp_data_split == ETHTOOL_TCP_DATA_SPLIT_ENABLED &amp;&amp;</div><div class='add'>+	    hds_config_mod &amp;&amp; BNXT_RX_PAGE_MODE(bp)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "tcp-data-split is disallowed when XDP is attached");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (netif_running(dev))</div><div class='ctx'> 		bnxt_close_nic(bp, false, false);</div><div class='ctx'> </div><div class='add'>+	if (hds_config_mod) {</div><div class='add'>+		if (tcp_data_split == ETHTOOL_TCP_DATA_SPLIT_ENABLED)</div><div class='add'>+			bp-&gt;flags |= BNXT_FLAG_HDS;</div><div class='add'>+		else if (tcp_data_split == ETHTOOL_TCP_DATA_SPLIT_UNKNOWN)</div><div class='add'>+			bp-&gt;flags &amp;= ~BNXT_FLAG_HDS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	bp-&gt;rx_ring_size = ering-&gt;rx_pending;</div><div class='ctx'> 	bp-&gt;tx_ring_size = ering-&gt;tx_pending;</div><div class='ctx'> 	bnxt_set_ring_params(bp);</div><div class='hunk'>@@ -1124,14 +1152,15 @@ static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	fkeys = &amp;fltr-&gt;fkeys;</div><div class='ctx'> 	fmasks = &amp;fltr-&gt;fmasks;</div><div class='ctx'> 	if (fkeys-&gt;basic.n_proto == htons(ETH_P_IP)) {</div><div class='del'>-		if (fkeys-&gt;basic.ip_proto == IPPROTO_ICMP ||</div><div class='del'>-		    fkeys-&gt;basic.ip_proto == IPPROTO_RAW) {</div><div class='add'>+		if (fkeys-&gt;basic.ip_proto == BNXT_IP_PROTO_WILDCARD) {</div><div class='ctx'> 			fs-&gt;flow_type = IP_USER_FLOW;</div><div class='ctx'> 			fs-&gt;h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;</div><div class='del'>-			if (fkeys-&gt;basic.ip_proto == IPPROTO_ICMP)</div><div class='del'>-				fs-&gt;h_u.usr_ip4_spec.proto = IPPROTO_ICMP;</div><div class='del'>-			else</div><div class='del'>-				fs-&gt;h_u.usr_ip4_spec.proto = IPPROTO_RAW;</div><div class='add'>+			fs-&gt;h_u.usr_ip4_spec.proto = BNXT_IP_PROTO_WILDCARD;</div><div class='add'>+			fs-&gt;m_u.usr_ip4_spec.proto = 0;</div><div class='add'>+		} else if (fkeys-&gt;basic.ip_proto == IPPROTO_ICMP) {</div><div class='add'>+			fs-&gt;flow_type = IP_USER_FLOW;</div><div class='add'>+			fs-&gt;h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;</div><div class='add'>+			fs-&gt;h_u.usr_ip4_spec.proto = IPPROTO_ICMP;</div><div class='ctx'> 			fs-&gt;m_u.usr_ip4_spec.proto = BNXT_IP_PROTO_FULL_MASK;</div><div class='ctx'> 		} else if (fkeys-&gt;basic.ip_proto == IPPROTO_TCP) {</div><div class='ctx'> 			fs-&gt;flow_type = TCP_V4_FLOW;</div><div class='hunk'>@@ -1153,13 +1182,13 @@ static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 			fs-&gt;m_u.tcp_ip4_spec.pdst = fmasks-&gt;ports.dst;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		if (fkeys-&gt;basic.ip_proto == IPPROTO_ICMPV6 ||</div><div class='del'>-		    fkeys-&gt;basic.ip_proto == IPPROTO_RAW) {</div><div class='add'>+		if (fkeys-&gt;basic.ip_proto == BNXT_IP_PROTO_WILDCARD) {</div><div class='ctx'> 			fs-&gt;flow_type = IPV6_USER_FLOW;</div><div class='del'>-			if (fkeys-&gt;basic.ip_proto == IPPROTO_ICMPV6)</div><div class='del'>-				fs-&gt;h_u.usr_ip6_spec.l4_proto = IPPROTO_ICMPV6;</div><div class='del'>-			else</div><div class='del'>-				fs-&gt;h_u.usr_ip6_spec.l4_proto = IPPROTO_RAW;</div><div class='add'>+			fs-&gt;h_u.usr_ip6_spec.l4_proto = BNXT_IP_PROTO_WILDCARD;</div><div class='add'>+			fs-&gt;m_u.usr_ip6_spec.l4_proto = 0;</div><div class='add'>+		} else if (fkeys-&gt;basic.ip_proto == IPPROTO_ICMPV6) {</div><div class='add'>+			fs-&gt;flow_type = IPV6_USER_FLOW;</div><div class='add'>+			fs-&gt;h_u.usr_ip6_spec.l4_proto = IPPROTO_ICMPV6;</div><div class='ctx'> 			fs-&gt;m_u.usr_ip6_spec.l4_proto = BNXT_IP_PROTO_FULL_MASK;</div><div class='ctx'> 		} else if (fkeys-&gt;basic.ip_proto == IPPROTO_TCP) {</div><div class='ctx'> 			fs-&gt;flow_type = TCP_V6_FLOW;</div><div class='hunk'>@@ -1186,10 +1215,14 @@ static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (fltr-&gt;base.flags &amp; BNXT_ACT_DROP)</div><div class='add'>+	if (fltr-&gt;base.flags &amp; BNXT_ACT_DROP) {</div><div class='ctx'> 		fs-&gt;ring_cookie = RX_CLS_FLOW_DISC;</div><div class='del'>-	else</div><div class='add'>+	} else if (fltr-&gt;base.flags &amp; BNXT_ACT_RSS_CTX) {</div><div class='add'>+		fs-&gt;flow_type |= FLOW_RSS;</div><div class='add'>+		cmd-&gt;rss_context = fltr-&gt;base.fw_vnic_id;</div><div class='add'>+	} else {</div><div class='ctx'> 		fs-&gt;ring_cookie = fltr-&gt;base.rxq;</div><div class='add'>+	}</div><div class='ctx'> 	rc = 0;</div><div class='ctx'> </div><div class='ctx'> fltr_err:</div><div class='hunk'>@@ -1282,10 +1315,12 @@ static int bnxt_add_l2_cls_rule(struct bnxt *bp,</div><div class='ctx'> static bool bnxt_verify_ntuple_ip4_flow(struct ethtool_usrip4_spec *ip_spec,</div><div class='ctx'> 					struct ethtool_usrip4_spec *ip_mask)</div><div class='ctx'> {</div><div class='add'>+	u8 mproto = ip_mask-&gt;proto;</div><div class='add'>+	u8 sproto = ip_spec-&gt;proto;</div><div class='add'>+</div><div class='ctx'> 	if (ip_mask-&gt;l4_4_bytes || ip_mask-&gt;tos ||</div><div class='ctx'> 	    ip_spec-&gt;ip_ver != ETH_RX_NFC_IP4 ||</div><div class='del'>-	    ip_mask-&gt;proto != BNXT_IP_PROTO_FULL_MASK ||</div><div class='del'>-	    (ip_spec-&gt;proto != IPPROTO_RAW &amp;&amp; ip_spec-&gt;proto != IPPROTO_ICMP))</div><div class='add'>+	    (mproto &amp;&amp; (mproto != BNXT_IP_PROTO_FULL_MASK || sproto != IPPROTO_ICMP)))</div><div class='ctx'> 		return false;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -1293,10 +1328,11 @@ static bool bnxt_verify_ntuple_ip4_flow(struct ethtool_usrip4_spec *ip_spec,</div><div class='ctx'> static bool bnxt_verify_ntuple_ip6_flow(struct ethtool_usrip6_spec *ip_spec,</div><div class='ctx'> 					struct ethtool_usrip6_spec *ip_mask)</div><div class='ctx'> {</div><div class='add'>+	u8 mproto = ip_mask-&gt;l4_proto;</div><div class='add'>+	u8 sproto = ip_spec-&gt;l4_proto;</div><div class='add'>+</div><div class='ctx'> 	if (ip_mask-&gt;l4_4_bytes || ip_mask-&gt;tclass ||</div><div class='del'>-	    ip_mask-&gt;l4_proto != BNXT_IP_PROTO_FULL_MASK ||</div><div class='del'>-	    (ip_spec-&gt;l4_proto != IPPROTO_RAW &amp;&amp;</div><div class='del'>-	     ip_spec-&gt;l4_proto != IPPROTO_ICMPV6))</div><div class='add'>+	    (mproto &amp;&amp; (mproto != BNXT_IP_PROTO_FULL_MASK || sproto != IPPROTO_ICMPV6)))</div><div class='ctx'> 		return false;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -1350,7 +1386,8 @@ static int bnxt_add_ntuple_cls_rule(struct bnxt *bp,</div><div class='ctx'> 		struct ethtool_usrip4_spec *ip_spec = &amp;fs-&gt;h_u.usr_ip4_spec;</div><div class='ctx'> 		struct ethtool_usrip4_spec *ip_mask = &amp;fs-&gt;m_u.usr_ip4_spec;</div><div class='ctx'> </div><div class='del'>-		fkeys-&gt;basic.ip_proto = ip_spec-&gt;proto;</div><div class='add'>+		fkeys-&gt;basic.ip_proto = ip_mask-&gt;proto ? ip_spec-&gt;proto</div><div class='add'>+						       : BNXT_IP_PROTO_WILDCARD;</div><div class='ctx'> 		fkeys-&gt;basic.n_proto = htons(ETH_P_IP);</div><div class='ctx'> 		fkeys-&gt;addrs.v4addrs.src = ip_spec-&gt;ip4src;</div><div class='ctx'> 		fmasks-&gt;addrs.v4addrs.src = ip_mask-&gt;ip4src;</div><div class='hunk'>@@ -1381,7 +1418,8 @@ static int bnxt_add_ntuple_cls_rule(struct bnxt *bp,</div><div class='ctx'> 		struct ethtool_usrip6_spec *ip_spec = &amp;fs-&gt;h_u.usr_ip6_spec;</div><div class='ctx'> 		struct ethtool_usrip6_spec *ip_mask = &amp;fs-&gt;m_u.usr_ip6_spec;</div><div class='ctx'> </div><div class='del'>-		fkeys-&gt;basic.ip_proto = ip_spec-&gt;l4_proto;</div><div class='add'>+		fkeys-&gt;basic.ip_proto = ip_mask-&gt;l4_proto ? ip_spec-&gt;l4_proto</div><div class='add'>+							  : BNXT_IP_PROTO_WILDCARD;</div><div class='ctx'> 		fkeys-&gt;basic.n_proto = htons(ETH_P_IPV6);</div><div class='ctx'> 		fkeys-&gt;addrs.v6addrs.src = *(struct in6_addr *)&amp;ip_spec-&gt;ip6src;</div><div class='ctx'> 		fmasks-&gt;addrs.v6addrs.src = *(struct in6_addr *)&amp;ip_mask-&gt;ip6src;</div><div class='hunk'>@@ -1552,11 +1590,16 @@ static u64 get_ethtool_ipv6_rss(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	if (bp-&gt;rss_hash_cfg &amp; VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)</div><div class='ctx'> 		return RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+	if (bp-&gt;rss_hash_cfg &amp; VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6_FLOW_LABEL)</div><div class='add'>+		return RXH_IP_SRC | RXH_IP_DST | RXH_IP6_FL;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)</div><div class='add'>+static int bnxt_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct bnxt *bp = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	cmd-&gt;data = 0;</div><div class='ctx'> 	switch (cmd-&gt;flow_type) {</div><div class='ctx'> 	case TCP_V4_FLOW:</div><div class='hunk'>@@ -1615,20 +1658,30 @@ static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)</div><div class='ctx'> #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)</div><div class='ctx'> #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)</div><div class='ctx'> </div><div class='del'>-static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)</div><div class='add'>+static int bnxt_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	u32 rss_hash_cfg = bp-&gt;rss_hash_cfg;</div><div class='add'>+	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	int tuple, rc = 0;</div><div class='add'>+	u32 rss_hash_cfg;</div><div class='add'>+</div><div class='add'>+	rss_hash_cfg = bp-&gt;rss_hash_cfg;</div><div class='ctx'> </div><div class='ctx'> 	if (cmd-&gt;data == RXH_4TUPLE)</div><div class='ctx'> 		tuple = 4;</div><div class='del'>-	else if (cmd-&gt;data == RXH_2TUPLE)</div><div class='add'>+	else if (cmd-&gt;data == RXH_2TUPLE ||</div><div class='add'>+		 cmd-&gt;data == (RXH_2TUPLE | RXH_IP6_FL))</div><div class='ctx'> 		tuple = 2;</div><div class='ctx'> 	else if (!cmd-&gt;data)</div><div class='ctx'> 		tuple = 0;</div><div class='ctx'> 	else</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (cmd-&gt;data &amp; RXH_IP6_FL &amp;&amp;</div><div class='add'>+	    !(bp-&gt;rss_cap &amp; BNXT_RSS_CAP_IPV6_FLOW_LABEL_RSS_CAP))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	if (cmd-&gt;flow_type == TCP_V4_FLOW) {</div><div class='ctx'> 		rss_hash_cfg &amp;= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;</div><div class='ctx'> 		if (tuple == 4)</div><div class='hunk'>@@ -1692,10 +1745,15 @@ static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	case AH_V6_FLOW:</div><div class='ctx'> 	case ESP_V6_FLOW:</div><div class='ctx'> 	case IPV6_FLOW:</div><div class='del'>-		if (tuple == 2)</div><div class='add'>+		rss_hash_cfg &amp;= ~(VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6 |</div><div class='add'>+				  VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6_FLOW_LABEL);</div><div class='add'>+		if (!tuple)</div><div class='add'>+			break;</div><div class='add'>+		if (cmd-&gt;data &amp; RXH_IP6_FL)</div><div class='add'>+			rss_hash_cfg |=</div><div class='add'>+				VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6_FLOW_LABEL;</div><div class='add'>+		else if (tuple == 2)</div><div class='ctx'> 			rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;</div><div class='del'>-		else if (!tuple)</div><div class='del'>-			rss_hash_cfg &amp;= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1712,6 +1770,13 @@ static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 bnxt_get_rx_ring_count(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bnxt *bp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return bp-&gt;rx_nr_rings;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 			  u32 *rule_locs)</div><div class='ctx'> {</div><div class='hunk'>@@ -1719,10 +1784,6 @@ static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = bp-&gt;rx_nr_rings;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		cmd-&gt;rule_cnt = bp-&gt;ntp_fltr_count;</div><div class='ctx'> 		cmd-&gt;data = bp-&gt;max_fltr | RX_CLS_LOC_SPECIAL;</div><div class='hunk'>@@ -1736,10 +1797,6 @@ static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 		rc = bnxt_grxclsrule(bp, cmd);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		rc = bnxt_grxfh(bp, cmd);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	default:</div><div class='ctx'> 		rc = -EOPNOTSUPP;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1754,10 +1811,6 @@ static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		rc = bnxt_srxfh(bp, cmd);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		rc = bnxt_srxclsrlins(bp, cmd);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2017,30 +2070,56 @@ static void bnxt_get_drvinfo(struct net_device *dev,</div><div class='ctx'> static int bnxt_get_regs_len(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='del'>-	int reg_len;</div><div class='ctx'> </div><div class='ctx'> 	if (!BNXT_PF(bp))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	reg_len = BNXT_PXP_REG_LEN;</div><div class='add'>+	return BNXT_PXP_REG_LEN + bp-&gt;pcie_stat_len;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (bp-&gt;fw_cap &amp; BNXT_FW_CAP_PCIE_STATS_SUPPORTED)</div><div class='del'>-		reg_len += sizeof(struct pcie_ctx_hw_stats);</div><div class='add'>+static void *</div><div class='add'>+__bnxt_hwrm_pcie_qstats(struct bnxt *bp, struct hwrm_pcie_qstats_input *req)</div><div class='add'>+{</div><div class='add'>+	struct pcie_ctx_hw_stats_v2 *hw_pcie_stats;</div><div class='add'>+	dma_addr_t hw_pcie_stats_addr;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='del'>-	return reg_len;</div><div class='add'>+	hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats),</div><div class='add'>+					   &amp;hw_pcie_stats_addr);</div><div class='add'>+	if (!hw_pcie_stats)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	req-&gt;pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));</div><div class='add'>+	req-&gt;pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);</div><div class='add'>+	rc = hwrm_req_send(bp, req);</div><div class='add'>+</div><div class='add'>+	return rc ? NULL : hw_pcie_stats;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define BNXT_PCIE_32B_ENTRY(start, end)			\</div><div class='add'>+	 { offsetof(struct pcie_ctx_hw_stats_v2, start),\</div><div class='add'>+	   offsetof(struct pcie_ctx_hw_stats_v2, end) }</div><div class='add'>+</div><div class='add'>+static const struct {</div><div class='add'>+	u16 start;</div><div class='add'>+	u16 end;</div><div class='add'>+} bnxt_pcie_32b_entries[] = {</div><div class='add'>+	BNXT_PCIE_32B_ENTRY(pcie_ltssm_histogram[0], pcie_ltssm_histogram[3]),</div><div class='add'>+	BNXT_PCIE_32B_ENTRY(pcie_tl_credit_nph_histogram[0], unused_1),</div><div class='add'>+	BNXT_PCIE_32B_ENTRY(pcie_rd_latency_histogram[0], unused_2),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,</div><div class='ctx'> 			  void *_p)</div><div class='ctx'> {</div><div class='del'>-	struct pcie_ctx_hw_stats *hw_pcie_stats;</div><div class='add'>+	struct hwrm_pcie_qstats_output *resp;</div><div class='ctx'> 	struct hwrm_pcie_qstats_input *req;</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='del'>-	dma_addr_t hw_pcie_stats_addr;</div><div class='del'>-	int rc;</div><div class='add'>+	u8 *src;</div><div class='ctx'> </div><div class='ctx'> 	regs-&gt;version = 0;</div><div class='del'>-	bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p);</div><div class='add'>+	if (!(bp-&gt;fw_dbg_cap &amp; DBG_QCAPS_RESP_FLAGS_REG_ACCESS_RESTRICTED))</div><div class='add'>+		bnxt_dbg_hwrm_rd_reg(bp, 0, BNXT_PXP_REG_LEN / 4, _p);</div><div class='ctx'> </div><div class='ctx'> 	if (!(bp-&gt;fw_cap &amp; BNXT_FW_CAP_PCIE_STATS_SUPPORTED))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2048,25 +2127,37 @@ static void bnxt_get_regs(struct net_device *dev, struct ethtool_regs *regs,</div><div class='ctx'> 	if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	hw_pcie_stats = hwrm_req_dma_slice(bp, req, sizeof(*hw_pcie_stats),</div><div class='del'>-					   &amp;hw_pcie_stats_addr);</div><div class='del'>-	if (!hw_pcie_stats) {</div><div class='del'>-		hwrm_req_drop(bp, req);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	regs-&gt;version = 1;</div><div class='del'>-	hwrm_req_hold(bp, req); /* hold on to slice */</div><div class='del'>-	req-&gt;pcie_stat_size = cpu_to_le16(sizeof(*hw_pcie_stats));</div><div class='del'>-	req-&gt;pcie_stat_host_addr = cpu_to_le64(hw_pcie_stats_addr);</div><div class='del'>-	rc = hwrm_req_send(bp, req);</div><div class='del'>-	if (!rc) {</div><div class='del'>-		__le64 *src = (__le64 *)hw_pcie_stats;</div><div class='del'>-		u64 *dst = (u64 *)(_p + BNXT_PXP_REG_LEN);</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; sizeof(*hw_pcie_stats) / sizeof(__le64); i++)</div><div class='del'>-			dst[i] = le64_to_cpu(src[i]);</div><div class='add'>+	resp = hwrm_req_hold(bp, req);</div><div class='add'>+	src = __bnxt_hwrm_pcie_qstats(bp, req);</div><div class='add'>+	if (src) {</div><div class='add'>+		u8 *dst = (u8 *)(_p + BNXT_PXP_REG_LEN);</div><div class='add'>+		int i, j, len;</div><div class='add'>+</div><div class='add'>+		len = min(bp-&gt;pcie_stat_len, le16_to_cpu(resp-&gt;pcie_stat_size));</div><div class='add'>+		if (len &lt;= sizeof(struct pcie_ctx_hw_stats))</div><div class='add'>+			regs-&gt;version = 1;</div><div class='add'>+		else if (len &lt; sizeof(struct pcie_ctx_hw_stats_v2))</div><div class='add'>+			regs-&gt;version = 2;</div><div class='add'>+		else</div><div class='add'>+			regs-&gt;version = 3;</div><div class='add'>+</div><div class='add'>+		for (i = 0, j = 0; i &lt; len; ) {</div><div class='add'>+			if (i &gt;= bnxt_pcie_32b_entries[j].start &amp;&amp;</div><div class='add'>+			    i &lt;= bnxt_pcie_32b_entries[j].end) {</div><div class='add'>+				u32 *dst32 = (u32 *)(dst + i);</div><div class='add'>+</div><div class='add'>+				*dst32 = le32_to_cpu(*(__le32 *)(src + i));</div><div class='add'>+				i += 4;</div><div class='add'>+				if (i &gt; bnxt_pcie_32b_entries[j].end &amp;&amp;</div><div class='add'>+				    j &lt; ARRAY_SIZE(bnxt_pcie_32b_entries) - 1)</div><div class='add'>+					j++;</div><div class='add'>+			} else {</div><div class='add'>+				u64 *dst64 = (u64 *)(dst + i);</div><div class='add'>+</div><div class='add'>+				*dst64 = le64_to_cpu(*(__le64 *)(src + i));</div><div class='add'>+				i += 8;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	hwrm_req_drop(bp, req);</div><div class='ctx'> }</div><div class='hunk'>@@ -2774,7 +2865,7 @@ u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)</div><div class='ctx'> static void bnxt_get_default_speeds(struct ethtool_link_ksettings *lk_ksettings,</div><div class='ctx'> 				    struct bnxt_link_info *link_info)</div><div class='ctx'> {</div><div class='del'>-	struct ethtool_link_settings_hdr *base = &amp;lk_ksettings-&gt;base;</div><div class='add'>+	struct ethtool_link_settings *base = &amp;lk_ksettings-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	if (link_info-&gt;link_state == BNXT_LINK_STATE_UP) {</div><div class='ctx'> 		base-&gt;speed = bnxt_fw_to_ethtool_speed(link_info-&gt;link_speed);</div><div class='hunk'>@@ -2793,7 +2884,7 @@ static void bnxt_get_default_speeds(struct ethtool_link_ksettings *lk_ksettings,</div><div class='ctx'> static int bnxt_get_link_ksettings(struct net_device *dev,</div><div class='ctx'> 				   struct ethtool_link_ksettings *lk_ksettings)</div><div class='ctx'> {</div><div class='del'>-	struct ethtool_link_settings_hdr *base = &amp;lk_ksettings-&gt;base;</div><div class='add'>+	struct ethtool_link_settings *base = &amp;lk_ksettings-&gt;base;</div><div class='ctx'> 	enum ethtool_link_mode_bit_indices link_mode;</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	struct bnxt_link_info *link_info;</div><div class='hunk'>@@ -2831,19 +2922,24 @@ static int bnxt_get_link_ksettings(struct net_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	base-&gt;port = PORT_NONE;</div><div class='del'>-	if (link_info-&gt;media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {</div><div class='add'>+	if (media == BNXT_MEDIA_TP) {</div><div class='ctx'> 		base-&gt;port = PORT_TP;</div><div class='ctx'> 		linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,</div><div class='ctx'> 				 lk_ksettings-&gt;link_modes.supported);</div><div class='ctx'> 		linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,</div><div class='ctx'> 				 lk_ksettings-&gt;link_modes.advertising);</div><div class='add'>+	} else if (media == BNXT_MEDIA_KR) {</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_Backplane_BIT,</div><div class='add'>+				 lk_ksettings-&gt;link_modes.supported);</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_Backplane_BIT,</div><div class='add'>+				 lk_ksettings-&gt;link_modes.advertising);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,</div><div class='ctx'> 				 lk_ksettings-&gt;link_modes.supported);</div><div class='ctx'> 		linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,</div><div class='ctx'> 				 lk_ksettings-&gt;link_modes.advertising);</div><div class='ctx'> </div><div class='del'>-		if (link_info-&gt;media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)</div><div class='add'>+		if (media == BNXT_MEDIA_CR)</div><div class='ctx'> 			base-&gt;port = PORT_DA;</div><div class='ctx'> 		else</div><div class='ctx'> 			base-&gt;port = PORT_FIBRE;</div><div class='hunk'>@@ -3016,9 +3112,9 @@ u16 bnxt_get_fw_auto_link_speeds(const unsigned long *mode)</div><div class='ctx'> static int bnxt_set_link_ksettings(struct net_device *dev,</div><div class='ctx'> 			   const struct ethtool_link_ksettings *lk_ksettings)</div><div class='ctx'> {</div><div class='del'>-	const struct ethtool_link_settings_hdr *base = &amp;lk_ksettings-&gt;base;</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	struct bnxt_link_info *link_info = &amp;bp-&gt;link_info;</div><div class='add'>+	const struct ethtool_link_settings *base = &amp;lk_ksettings-&gt;base;</div><div class='ctx'> 	bool set_pause = false;</div><div class='ctx'> 	u32 speed, lanes = 0;</div><div class='ctx'> 	int rc = 0;</div><div class='hunk'>@@ -3121,7 +3217,8 @@ static int bnxt_get_fecparam(struct net_device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bnxt_get_fec_stats(struct net_device *dev,</div><div class='del'>-			       struct ethtool_fec_stats *fec_stats)</div><div class='add'>+			       struct ethtool_fec_stats *fec_stats,</div><div class='add'>+			       struct ethtool_fec_hist *hist)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	u64 *rx;</div><div class='hunk'>@@ -4146,7 +4243,7 @@ err:</div><div class='ctx'> static void bnxt_get_pkgver(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='del'>-	char buf[FW_VER_STR_LEN];</div><div class='add'>+	char buf[FW_VER_STR_LEN - 5];</div><div class='ctx'> 	int len;</div><div class='ctx'> </div><div class='ctx'> 	if (!bnxt_get_pkginfo(dev, buf, sizeof(buf))) {</div><div class='hunk'>@@ -4312,6 +4409,88 @@ static int bnxt_get_eee(struct net_device *dev, struct ethtool_keee *edata)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnxt_hwrm_pfcwd_qcfg(struct bnxt *bp, u16 *val)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_queue_pfcwd_timeout_qcfg_output *resp;</div><div class='add'>+	struct hwrm_queue_pfcwd_timeout_qcfg_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_req_init(bp, req, HWRM_QUEUE_PFCWD_TIMEOUT_QCFG);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	resp = hwrm_req_hold(bp, req);</div><div class='add'>+	rc = hwrm_req_send(bp, req);</div><div class='add'>+	if (!rc)</div><div class='add'>+		*val = le16_to_cpu(resp-&gt;pfcwd_timeout_value);</div><div class='add'>+	hwrm_req_drop(bp, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_hwrm_pfcwd_cfg(struct bnxt *bp, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_queue_pfcwd_timeout_cfg_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_req_init(bp, req, HWRM_QUEUE_PFCWD_TIMEOUT_CFG);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	req-&gt;pfcwd_timeout_value = cpu_to_le16(val);</div><div class='add'>+	rc = hwrm_req_send(bp, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_set_tunable(struct net_device *dev,</div><div class='add'>+			    const struct ethtool_tunable *tuna,</div><div class='add'>+			    const void *data)</div><div class='add'>+{</div><div class='add'>+	struct bnxt *bp = netdev_priv(dev);</div><div class='add'>+	u32 rx_copybreak, val;</div><div class='add'>+</div><div class='add'>+	switch (tuna-&gt;id) {</div><div class='add'>+	case ETHTOOL_RX_COPYBREAK:</div><div class='add'>+		rx_copybreak = *(u32 *)data;</div><div class='add'>+		if (rx_copybreak &gt; BNXT_MAX_RX_COPYBREAK)</div><div class='add'>+			return -ERANGE;</div><div class='add'>+		if (rx_copybreak != bp-&gt;rx_copybreak) {</div><div class='add'>+			if (netif_running(dev))</div><div class='add'>+				return -EBUSY;</div><div class='add'>+			bp-&gt;rx_copybreak = rx_copybreak;</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	case ETHTOOL_PFC_PREVENTION_TOUT:</div><div class='add'>+		if (BNXT_VF(bp) || !bp-&gt;max_pfcwd_tmo_ms)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		val = *(u16 *)data;</div><div class='add'>+		if (val &gt; bp-&gt;max_pfcwd_tmo_ms &amp;&amp;</div><div class='add'>+		    val != PFC_STORM_PREVENTION_AUTO)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		return bnxt_hwrm_pfcwd_cfg(bp, val);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_get_tunable(struct net_device *dev,</div><div class='add'>+			    const struct ethtool_tunable *tuna, void *data)</div><div class='add'>+{</div><div class='add'>+	struct bnxt *bp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	switch (tuna-&gt;id) {</div><div class='add'>+	case ETHTOOL_RX_COPYBREAK:</div><div class='add'>+		*(u32 *)data = bp-&gt;rx_copybreak;</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_PFC_PREVENTION_TOUT:</div><div class='add'>+		if (!bp-&gt;max_pfcwd_tmo_ms)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		return bnxt_hwrm_pfcwd_qcfg(bp, data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,</div><div class='ctx'> 					    u16 page_number, u8 bank,</div><div class='ctx'> 					    u16 start_addr, u16 data_length,</div><div class='hunk'>@@ -4360,6 +4539,9 @@ static int bnxt_get_module_info(struct net_device *dev,</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	if (BNXT_VF(bp) &amp;&amp; !BNXT_VF_IS_TRUSTED(bp))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	/* No point in going further if phy status indicates</div><div class='ctx'> 	 * module is not inserted or if it is powered down or</div><div class='ctx'> 	 * if it is of type 10GBase-T</div><div class='hunk'>@@ -4411,6 +4593,9 @@ static int bnxt_get_module_eeprom(struct net_device *dev,</div><div class='ctx'> 	u16  start = eeprom-&gt;offset, length = eeprom-&gt;len;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='add'>+	if (BNXT_VF(bp) &amp;&amp; !BNXT_VF_IS_TRUSTED(bp))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='ctx'> 	memset(data, 0, eeprom-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	/* Read A0 portion of the EEPROM */</div><div class='hunk'>@@ -4441,6 +4626,11 @@ static int bnxt_get_module_status(struct bnxt *bp, struct netlink_ext_ack *extac</div><div class='ctx'> 	    PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (bp-&gt;link_info.phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||</div><div class='add'>+	    bp-&gt;link_info.phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE){</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Operation not supported as PHY type is Base-T");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> 	switch (bp-&gt;link_info.module_status) {</div><div class='ctx'> 	case PORT_PHY_QCFG_RESP_MODULE_STATUS_PWRDOWN:</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Transceiver module is powering down");</div><div class='hunk'>@@ -4458,13 +4648,19 @@ static int bnxt_get_module_status(struct bnxt *bp, struct netlink_ext_ack *extac</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bnxt_get_module_eeprom_by_page(struct net_device *dev,</div><div class='del'>-					  const struct ethtool_module_eeprom *page_data,</div><div class='del'>-					  struct netlink_ext_ack *extack)</div><div class='add'>+static int</div><div class='add'>+bnxt_mod_eeprom_by_page_precheck(struct bnxt *bp,</div><div class='add'>+				 const struct ethtool_module_eeprom *page_data,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	if (BNXT_VF(bp) &amp;&amp; !BNXT_VF_IS_TRUSTED(bp)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Module read/write not permitted on untrusted VF");</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	rc = bnxt_get_module_status(bp, extack);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='hunk'>@@ -4478,6 +4674,19 @@ static int bnxt_get_module_eeprom_by_page(struct net_device *dev,</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Firmware not capable for bank selection");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_get_module_eeprom_by_page(struct net_device *dev,</div><div class='add'>+					  const struct ethtool_module_eeprom *page_data,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct bnxt *bp = netdev_priv(dev);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnxt_mod_eeprom_by_page_precheck(bp, page_data, extack);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='ctx'> 	rc = bnxt_read_sfp_module_eeprom_info(bp, page_data-&gt;i2c_address &lt;&lt; 1,</div><div class='ctx'> 					      page_data-&gt;page, page_data-&gt;bank,</div><div class='hunk'>@@ -4491,6 +4700,62 @@ static int bnxt_get_module_eeprom_by_page(struct net_device *dev,</div><div class='ctx'> 	return page_data-&gt;length;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnxt_write_sfp_module_eeprom_info(struct bnxt *bp,</div><div class='add'>+					     const struct ethtool_module_eeprom *page)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_port_phy_i2c_write_input *req;</div><div class='add'>+	int bytes_written = 0;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_req_init(bp, req, HWRM_PORT_PHY_I2C_WRITE);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	hwrm_req_hold(bp, req);</div><div class='add'>+	req-&gt;i2c_slave_addr = page-&gt;i2c_address &lt;&lt; 1;</div><div class='add'>+	req-&gt;page_number = cpu_to_le16(page-&gt;page);</div><div class='add'>+	req-&gt;bank_number = page-&gt;bank;</div><div class='add'>+	req-&gt;port_id = cpu_to_le16(bp-&gt;pf.port_id);</div><div class='add'>+	req-&gt;enables = cpu_to_le32(PORT_PHY_I2C_WRITE_REQ_ENABLES_PAGE_OFFSET |</div><div class='add'>+				   PORT_PHY_I2C_WRITE_REQ_ENABLES_BANK_NUMBER);</div><div class='add'>+</div><div class='add'>+	while (bytes_written &lt; page-&gt;length) {</div><div class='add'>+		u16 xfer_size;</div><div class='add'>+</div><div class='add'>+		xfer_size = min_t(u16, page-&gt;length - bytes_written,</div><div class='add'>+				  BNXT_MAX_PHY_I2C_RESP_SIZE);</div><div class='add'>+		req-&gt;page_offset = cpu_to_le16(page-&gt;offset + bytes_written);</div><div class='add'>+		req-&gt;data_length = xfer_size;</div><div class='add'>+		memcpy(req-&gt;data, page-&gt;data + bytes_written, xfer_size);</div><div class='add'>+		rc = hwrm_req_send(bp, req);</div><div class='add'>+		if (rc)</div><div class='add'>+			break;</div><div class='add'>+		bytes_written += xfer_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hwrm_req_drop(bp, req);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_set_module_eeprom_by_page(struct net_device *dev,</div><div class='add'>+					  const struct ethtool_module_eeprom *page_data,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct bnxt *bp = netdev_priv(dev);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = bnxt_mod_eeprom_by_page_precheck(bp, page_data, extack);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = bnxt_write_sfp_module_eeprom_info(bp, page_data);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Module`s eeprom write failed");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+	return page_data-&gt;length;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bnxt_nway_reset(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int rc = 0;</div><div class='hunk'>@@ -4762,7 +5027,8 @@ static int bnxt_run_loopback(struct bnxt *bp)</div><div class='ctx'> 	cpr = &amp;rxr-&gt;bnapi-&gt;cp_ring;</div><div class='ctx'> 	if (bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS)</div><div class='ctx'> 		cpr = rxr-&gt;rx_cpr;</div><div class='del'>-	pkt_size = min(bp-&gt;dev-&gt;mtu + ETH_HLEN, bp-&gt;rx_copy_thresh);</div><div class='add'>+	pkt_size = min(bp-&gt;dev-&gt;mtu + ETH_HLEN, max(BNXT_DEFAULT_RX_COPYBREAK,</div><div class='add'>+						    bp-&gt;rx_copybreak));</div><div class='ctx'> 	skb = netdev_alloc_skb(bp-&gt;dev, pkt_size);</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -4832,6 +5098,7 @@ static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,</div><div class='ctx'> 	if (!bp-&gt;num_tests || !BNXT_PF(bp))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	memset(buf, 0, sizeof(u64) * bp-&gt;num_tests);</div><div class='ctx'> 	if (etest-&gt;flags &amp; ETH_TEST_FL_OFFLINE &amp;&amp;</div><div class='ctx'> 	    bnxt_ulp_registered(bp-&gt;edev)) {</div><div class='ctx'> 		etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='hunk'>@@ -4839,7 +5106,6 @@ static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memset(buf, 0, sizeof(u64) * bp-&gt;num_tests);</div><div class='ctx'> 	if (!netif_running(dev)) {</div><div class='ctx'> 		etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -4872,35 +5138,44 @@ static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,</div><div class='ctx'> 		bnxt_close_nic(bp, true, false);</div><div class='ctx'> 		bnxt_run_fw_tests(bp, test_mask, &amp;test_results);</div><div class='ctx'> </div><div class='del'>-		buf[BNXT_MACLPBK_TEST_IDX] = 1;</div><div class='del'>-		bnxt_hwrm_mac_loopback(bp, true);</div><div class='del'>-		msleep(250);</div><div class='ctx'> 		rc = bnxt_half_open_nic(bp);</div><div class='ctx'> 		if (rc) {</div><div class='del'>-			bnxt_hwrm_mac_loopback(bp, false);</div><div class='ctx'> 			etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='add'>+		buf[BNXT_MACLPBK_TEST_IDX] = 1;</div><div class='add'>+		if (bp-&gt;mac_flags &amp; BNXT_MAC_FL_NO_MAC_LPBK)</div><div class='add'>+			goto skip_mac_loopback;</div><div class='add'>+</div><div class='add'>+		bnxt_hwrm_mac_loopback(bp, true);</div><div class='add'>+		msleep(250);</div><div class='ctx'> 		if (bnxt_run_loopback(bp))</div><div class='ctx'> 			etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='ctx'> 		else</div><div class='ctx'> 			buf[BNXT_MACLPBK_TEST_IDX] = 0;</div><div class='ctx'> </div><div class='ctx'> 		bnxt_hwrm_mac_loopback(bp, false);</div><div class='add'>+skip_mac_loopback:</div><div class='add'>+		buf[BNXT_PHYLPBK_TEST_IDX] = 1;</div><div class='add'>+		if (bp-&gt;phy_flags &amp; BNXT_PHY_FL_NO_PHY_LPBK)</div><div class='add'>+			goto skip_phy_loopback;</div><div class='add'>+</div><div class='ctx'> 		bnxt_hwrm_phy_loopback(bp, true, false);</div><div class='ctx'> 		msleep(1000);</div><div class='del'>-		if (bnxt_run_loopback(bp)) {</div><div class='del'>-			buf[BNXT_PHYLPBK_TEST_IDX] = 1;</div><div class='add'>+		if (bnxt_run_loopback(bp))</div><div class='ctx'> 			etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='del'>-		}</div><div class='add'>+		else</div><div class='add'>+			buf[BNXT_PHYLPBK_TEST_IDX] = 0;</div><div class='add'>+skip_phy_loopback:</div><div class='add'>+		buf[BNXT_EXTLPBK_TEST_IDX] = 1;</div><div class='ctx'> 		if (do_ext_lpbk) {</div><div class='ctx'> 			etest-&gt;flags |= ETH_TEST_FL_EXTERNAL_LB_DONE;</div><div class='ctx'> 			bnxt_hwrm_phy_loopback(bp, true, true);</div><div class='ctx'> 			msleep(1000);</div><div class='del'>-			if (bnxt_run_loopback(bp)) {</div><div class='del'>-				buf[BNXT_EXTLPBK_TEST_IDX] = 1;</div><div class='add'>+			if (bnxt_run_loopback(bp))</div><div class='ctx'> 				etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='del'>-			}</div><div class='add'>+			else</div><div class='add'>+				buf[BNXT_EXTLPBK_TEST_IDX] = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		bnxt_hwrm_phy_loopback(bp, false, false);</div><div class='ctx'> 		bnxt_half_close_nic(bp);</div><div class='hunk'>@@ -4978,8 +5253,9 @@ static int bnxt_set_dump(struct net_device *dev, struct ethtool_dump *dump)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (dump-&gt;flag &gt; BNXT_DUMP_CRASH) {</div><div class='del'>-		netdev_info(dev, "Supports only Live(0) and Crash(1) dumps.\n");</div><div class='add'>+	if (dump-&gt;flag &gt; BNXT_DUMP_LIVE_WITH_CTX_L1_CACHE) {</div><div class='add'>+		netdev_info(dev,</div><div class='add'>+			    "Supports only Live(0), Crash(1), Driver(2), Live with cached context(3) dumps.\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5059,6 +5335,26 @@ static int bnxt_get_ts_info(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_hwrm_pcie_qstats(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_pcie_qstats_output *resp;</div><div class='add'>+	struct hwrm_pcie_qstats_input *req;</div><div class='add'>+</div><div class='add'>+	bp-&gt;pcie_stat_len = 0;</div><div class='add'>+	if (!(bp-&gt;fw_cap &amp; BNXT_FW_CAP_PCIE_STATS_SUPPORTED))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (hwrm_req_init(bp, req, HWRM_PCIE_QSTATS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	resp = hwrm_req_hold(bp, req);</div><div class='add'>+	if (__bnxt_hwrm_pcie_qstats(bp, req))</div><div class='add'>+		bp-&gt;pcie_stat_len = min_t(u16,</div><div class='add'>+					  le16_to_cpu(resp-&gt;pcie_stat_size),</div><div class='add'>+					  sizeof(struct pcie_ctx_hw_stats_v2));</div><div class='add'>+	hwrm_req_drop(bp, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void bnxt_ethtool_init(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct hwrm_selftest_qlist_output *resp;</div><div class='hunk'>@@ -5067,6 +5363,7 @@ void bnxt_ethtool_init(struct bnxt *bp)</div><div class='ctx'> 	struct net_device *dev = bp-&gt;dev;</div><div class='ctx'> 	int i, rc;</div><div class='ctx'> </div><div class='add'>+	bnxt_hwrm_pcie_qstats(bp);</div><div class='ctx'> 	if (!(bp-&gt;fw_cap &amp; BNXT_FW_CAP_PKG_VER))</div><div class='ctx'> 		bnxt_get_pkgver(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -5294,6 +5591,8 @@ const struct ethtool_ops bnxt_ethtool_ops = {</div><div class='ctx'> 				     ETHTOOL_COALESCE_STATS_BLOCK_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_CQE,</div><div class='add'>+	.supported_ring_params	= ETHTOOL_RING_USE_TCP_DATA_SPLIT |</div><div class='add'>+				  ETHTOOL_RING_USE_HDS_THRS,</div><div class='ctx'> 	.get_link_ksettings	= bnxt_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings	= bnxt_set_link_ksettings,</div><div class='ctx'> 	.get_fec_stats		= bnxt_get_fec_stats,</div><div class='hunk'>@@ -5320,10 +5619,13 @@ const struct ethtool_ops bnxt_ethtool_ops = {</div><div class='ctx'> 	.set_channels		= bnxt_set_channels,</div><div class='ctx'> 	.get_rxnfc		= bnxt_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= bnxt_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= bnxt_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_indir_size    = bnxt_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh_key_size      = bnxt_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh               = bnxt_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= bnxt_set_rxfh,</div><div class='add'>+	.get_rxfh_fields        = bnxt_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields        = bnxt_set_rxfh_fields,</div><div class='ctx'> 	.create_rxfh_context	= bnxt_create_rxfh_context,</div><div class='ctx'> 	.modify_rxfh_context	= bnxt_modify_rxfh_context,</div><div class='ctx'> 	.remove_rxfh_context	= bnxt_remove_rxfh_context,</div><div class='hunk'>@@ -5335,9 +5637,12 @@ const struct ethtool_ops bnxt_ethtool_ops = {</div><div class='ctx'> 	.get_link_ext_stats	= bnxt_get_link_ext_stats,</div><div class='ctx'> 	.get_eee		= bnxt_get_eee,</div><div class='ctx'> 	.set_eee		= bnxt_set_eee,</div><div class='add'>+	.get_tunable		= bnxt_get_tunable,</div><div class='add'>+	.set_tunable		= bnxt_set_tunable,</div><div class='ctx'> 	.get_module_info	= bnxt_get_module_info,</div><div class='ctx'> 	.get_module_eeprom	= bnxt_get_module_eeprom,</div><div class='ctx'> 	.get_module_eeprom_by_page = bnxt_get_module_eeprom_by_page,</div><div class='add'>+	.set_module_eeprom_by_page = bnxt_set_module_eeprom_by_page,</div><div class='ctx'> 	.nway_reset		= bnxt_nway_reset,</div><div class='ctx'> 	.set_phys_id		= bnxt_set_phys_id,</div><div class='ctx'> 	.self_test		= bnxt_self_test,</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h<br/>index e2ee030237d4..33b86ede1ce5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h</a></div><div class='hunk'>@@ -44,6 +44,7 @@ struct bnxt_led_cfg {</div><div class='ctx'> #define BNXT_PXP_REG_LEN	0x3110</div><div class='ctx'> </div><div class='ctx'> #define BNXT_IP_PROTO_FULL_MASK	0xFF</div><div class='add'>+#define BNXT_IP_PROTO_WILDCARD	0x0</div><div class='ctx'> </div><div class='ctx'> extern const struct ethtool_ops bnxt_ethtool_ops;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h<br/>deleted file mode 100644<br/>index f8ef6f1a1964..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,10720 +0,0 @@</div><div class='del'>-/* Broadcom NetXtreme-C/E network driver.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014-2016 Broadcom Corporation</div><div class='del'>- * Copyright (c) 2014-2018 Broadcom Limited</div><div class='del'>- * Copyright (c) 2018-2024 Broadcom Inc.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * DO NOT MODIFY!!! This file is automatically generated.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _BNXT_HSI_H_</div><div class='del'>-#define _BNXT_HSI_H_</div><div class='del'>-</div><div class='del'>-/* hwrm_cmd_hdr (size:128b/16B) */</div><div class='del'>-struct hwrm_cmd_hdr {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_resp_hdr (size:64b/8B) */</div><div class='del'>-struct hwrm_resp_hdr {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define CMD_DISCR_TLV_ENCAP 0x8000UL</div><div class='del'>-#define CMD_DISCR_LAST     CMD_DISCR_TLV_ENCAP</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define TLV_TYPE_HWRM_REQUEST                    0x1UL</div><div class='del'>-#define TLV_TYPE_HWRM_RESPONSE                   0x2UL</div><div class='del'>-#define TLV_TYPE_ROCE_SP_COMMAND                 0x3UL</div><div class='del'>-#define TLV_TYPE_QUERY_ROCE_CC_GEN1              0x4UL</div><div class='del'>-#define TLV_TYPE_MODIFY_ROCE_CC_GEN1             0x5UL</div><div class='del'>-#define TLV_TYPE_QUERY_ROCE_CC_GEN2              0x6UL</div><div class='del'>-#define TLV_TYPE_MODIFY_ROCE_CC_GEN2             0x7UL</div><div class='del'>-#define TLV_TYPE_ENGINE_CKV_ALIAS_ECC_PUBLIC_KEY 0x8001UL</div><div class='del'>-#define TLV_TYPE_ENGINE_CKV_IV                   0x8003UL</div><div class='del'>-#define TLV_TYPE_ENGINE_CKV_AUTH_TAG             0x8004UL</div><div class='del'>-#define TLV_TYPE_ENGINE_CKV_CIPHERTEXT           0x8005UL</div><div class='del'>-#define TLV_TYPE_ENGINE_CKV_HOST_ALGORITHMS      0x8006UL</div><div class='del'>-#define TLV_TYPE_ENGINE_CKV_HOST_ECC_PUBLIC_KEY  0x8007UL</div><div class='del'>-#define TLV_TYPE_ENGINE_CKV_ECDSA_SIGNATURE      0x8008UL</div><div class='del'>-#define TLV_TYPE_ENGINE_CKV_FW_ECC_PUBLIC_KEY    0x8009UL</div><div class='del'>-#define TLV_TYPE_ENGINE_CKV_FW_ALGORITHMS        0x800aUL</div><div class='del'>-#define TLV_TYPE_LAST                           TLV_TYPE_ENGINE_CKV_FW_ALGORITHMS</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* tlv (size:64b/8B) */</div><div class='del'>-struct tlv {</div><div class='del'>-	__le16	cmd_discr;</div><div class='del'>-	u8	reserved_8b;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define TLV_FLAGS_MORE         0x1UL</div><div class='del'>-	#define TLV_FLAGS_MORE_LAST      0x0UL</div><div class='del'>-	#define TLV_FLAGS_MORE_NOT_LAST  0x1UL</div><div class='del'>-	#define TLV_FLAGS_REQUIRED     0x2UL</div><div class='del'>-	#define TLV_FLAGS_REQUIRED_NO    (0x0UL &lt;&lt; 1)</div><div class='del'>-	#define TLV_FLAGS_REQUIRED_YES   (0x1UL &lt;&lt; 1)</div><div class='del'>-	#define TLV_FLAGS_REQUIRED_LAST TLV_FLAGS_REQUIRED_YES</div><div class='del'>-	__le16	tlv_type;</div><div class='del'>-	__le16	length;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* input (size:128b/16B) */</div><div class='del'>-struct input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* output (size:64b/8B) */</div><div class='del'>-struct output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_short_input (size:128b/16B) */</div><div class='del'>-struct hwrm_short_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	signature;</div><div class='del'>-	#define SHORT_REQ_SIGNATURE_SHORT_CMD 0x4321UL</div><div class='del'>-	#define SHORT_REQ_SIGNATURE_LAST     SHORT_REQ_SIGNATURE_SHORT_CMD</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	#define SHORT_REQ_TARGET_ID_DEFAULT 0x0UL</div><div class='del'>-	#define SHORT_REQ_TARGET_ID_TOOLS   0xfffdUL</div><div class='del'>-	#define SHORT_REQ_TARGET_ID_LAST   SHORT_REQ_TARGET_ID_TOOLS</div><div class='del'>-	__le16	size;</div><div class='del'>-	__le64	req_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* cmd_nums (size:64b/8B) */</div><div class='del'>-struct cmd_nums {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	#define HWRM_VER_GET                              0x0UL</div><div class='del'>-	#define HWRM_FUNC_ECHO_RESPONSE                   0xbUL</div><div class='del'>-	#define HWRM_ERROR_RECOVERY_QCFG                  0xcUL</div><div class='del'>-	#define HWRM_FUNC_DRV_IF_CHANGE                   0xdUL</div><div class='del'>-	#define HWRM_FUNC_BUF_UNRGTR                      0xeUL</div><div class='del'>-	#define HWRM_FUNC_VF_CFG                          0xfUL</div><div class='del'>-	#define HWRM_RESERVED1                            0x10UL</div><div class='del'>-	#define HWRM_FUNC_RESET                           0x11UL</div><div class='del'>-	#define HWRM_FUNC_GETFID                          0x12UL</div><div class='del'>-	#define HWRM_FUNC_VF_ALLOC                        0x13UL</div><div class='del'>-	#define HWRM_FUNC_VF_FREE                         0x14UL</div><div class='del'>-	#define HWRM_FUNC_QCAPS                           0x15UL</div><div class='del'>-	#define HWRM_FUNC_QCFG                            0x16UL</div><div class='del'>-	#define HWRM_FUNC_CFG                             0x17UL</div><div class='del'>-	#define HWRM_FUNC_QSTATS                          0x18UL</div><div class='del'>-	#define HWRM_FUNC_CLR_STATS                       0x19UL</div><div class='del'>-	#define HWRM_FUNC_DRV_UNRGTR                      0x1aUL</div><div class='del'>-	#define HWRM_FUNC_VF_RESC_FREE                    0x1bUL</div><div class='del'>-	#define HWRM_FUNC_VF_VNIC_IDS_QUERY               0x1cUL</div><div class='del'>-	#define HWRM_FUNC_DRV_RGTR                        0x1dUL</div><div class='del'>-	#define HWRM_FUNC_DRV_QVER                        0x1eUL</div><div class='del'>-	#define HWRM_FUNC_BUF_RGTR                        0x1fUL</div><div class='del'>-	#define HWRM_PORT_PHY_CFG                         0x20UL</div><div class='del'>-	#define HWRM_PORT_MAC_CFG                         0x21UL</div><div class='del'>-	#define HWRM_PORT_TS_QUERY                        0x22UL</div><div class='del'>-	#define HWRM_PORT_QSTATS                          0x23UL</div><div class='del'>-	#define HWRM_PORT_LPBK_QSTATS                     0x24UL</div><div class='del'>-	#define HWRM_PORT_CLR_STATS                       0x25UL</div><div class='del'>-	#define HWRM_PORT_LPBK_CLR_STATS                  0x26UL</div><div class='del'>-	#define HWRM_PORT_PHY_QCFG                        0x27UL</div><div class='del'>-	#define HWRM_PORT_MAC_QCFG                        0x28UL</div><div class='del'>-	#define HWRM_PORT_MAC_PTP_QCFG                    0x29UL</div><div class='del'>-	#define HWRM_PORT_PHY_QCAPS                       0x2aUL</div><div class='del'>-	#define HWRM_PORT_PHY_I2C_WRITE                   0x2bUL</div><div class='del'>-	#define HWRM_PORT_PHY_I2C_READ                    0x2cUL</div><div class='del'>-	#define HWRM_PORT_LED_CFG                         0x2dUL</div><div class='del'>-	#define HWRM_PORT_LED_QCFG                        0x2eUL</div><div class='del'>-	#define HWRM_PORT_LED_QCAPS                       0x2fUL</div><div class='del'>-	#define HWRM_QUEUE_QPORTCFG                       0x30UL</div><div class='del'>-	#define HWRM_QUEUE_QCFG                           0x31UL</div><div class='del'>-	#define HWRM_QUEUE_CFG                            0x32UL</div><div class='del'>-	#define HWRM_FUNC_VLAN_CFG                        0x33UL</div><div class='del'>-	#define HWRM_FUNC_VLAN_QCFG                       0x34UL</div><div class='del'>-	#define HWRM_QUEUE_PFCENABLE_QCFG                 0x35UL</div><div class='del'>-	#define HWRM_QUEUE_PFCENABLE_CFG                  0x36UL</div><div class='del'>-	#define HWRM_QUEUE_PRI2COS_QCFG                   0x37UL</div><div class='del'>-	#define HWRM_QUEUE_PRI2COS_CFG                    0x38UL</div><div class='del'>-	#define HWRM_QUEUE_COS2BW_QCFG                    0x39UL</div><div class='del'>-	#define HWRM_QUEUE_COS2BW_CFG                     0x3aUL</div><div class='del'>-	#define HWRM_QUEUE_DSCP_QCAPS                     0x3bUL</div><div class='del'>-	#define HWRM_QUEUE_DSCP2PRI_QCFG                  0x3cUL</div><div class='del'>-	#define HWRM_QUEUE_DSCP2PRI_CFG                   0x3dUL</div><div class='del'>-	#define HWRM_VNIC_ALLOC                           0x40UL</div><div class='del'>-	#define HWRM_VNIC_FREE                            0x41UL</div><div class='del'>-	#define HWRM_VNIC_CFG                             0x42UL</div><div class='del'>-	#define HWRM_VNIC_QCFG                            0x43UL</div><div class='del'>-	#define HWRM_VNIC_TPA_CFG                         0x44UL</div><div class='del'>-	#define HWRM_VNIC_TPA_QCFG                        0x45UL</div><div class='del'>-	#define HWRM_VNIC_RSS_CFG                         0x46UL</div><div class='del'>-	#define HWRM_VNIC_RSS_QCFG                        0x47UL</div><div class='del'>-	#define HWRM_VNIC_PLCMODES_CFG                    0x48UL</div><div class='del'>-	#define HWRM_VNIC_PLCMODES_QCFG                   0x49UL</div><div class='del'>-	#define HWRM_VNIC_QCAPS                           0x4aUL</div><div class='del'>-	#define HWRM_VNIC_UPDATE                          0x4bUL</div><div class='del'>-	#define HWRM_RING_ALLOC                           0x50UL</div><div class='del'>-	#define HWRM_RING_FREE                            0x51UL</div><div class='del'>-	#define HWRM_RING_CMPL_RING_QAGGINT_PARAMS        0x52UL</div><div class='del'>-	#define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS     0x53UL</div><div class='del'>-	#define HWRM_RING_AGGINT_QCAPS                    0x54UL</div><div class='del'>-	#define HWRM_RING_SCHQ_ALLOC                      0x55UL</div><div class='del'>-	#define HWRM_RING_SCHQ_CFG                        0x56UL</div><div class='del'>-	#define HWRM_RING_SCHQ_FREE                       0x57UL</div><div class='del'>-	#define HWRM_RING_RESET                           0x5eUL</div><div class='del'>-	#define HWRM_RING_GRP_ALLOC                       0x60UL</div><div class='del'>-	#define HWRM_RING_GRP_FREE                        0x61UL</div><div class='del'>-	#define HWRM_RING_CFG                             0x62UL</div><div class='del'>-	#define HWRM_RING_QCFG                            0x63UL</div><div class='del'>-	#define HWRM_RESERVED5                            0x64UL</div><div class='del'>-	#define HWRM_RESERVED6                            0x65UL</div><div class='del'>-	#define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC            0x70UL</div><div class='del'>-	#define HWRM_VNIC_RSS_COS_LB_CTX_FREE             0x71UL</div><div class='del'>-	#define HWRM_QUEUE_MPLS_QCAPS                     0x80UL</div><div class='del'>-	#define HWRM_QUEUE_MPLSTC2PRI_QCFG                0x81UL</div><div class='del'>-	#define HWRM_QUEUE_MPLSTC2PRI_CFG                 0x82UL</div><div class='del'>-	#define HWRM_QUEUE_VLANPRI_QCAPS                  0x83UL</div><div class='del'>-	#define HWRM_QUEUE_VLANPRI2PRI_QCFG               0x84UL</div><div class='del'>-	#define HWRM_QUEUE_VLANPRI2PRI_CFG                0x85UL</div><div class='del'>-	#define HWRM_QUEUE_GLOBAL_CFG                     0x86UL</div><div class='del'>-	#define HWRM_QUEUE_GLOBAL_QCFG                    0x87UL</div><div class='del'>-	#define HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_QCFG      0x88UL</div><div class='del'>-	#define HWRM_QUEUE_ADPTV_QOS_RX_FEATURE_CFG       0x89UL</div><div class='del'>-	#define HWRM_QUEUE_ADPTV_QOS_TX_FEATURE_QCFG      0x8aUL</div><div class='del'>-	#define HWRM_QUEUE_ADPTV_QOS_TX_FEATURE_CFG       0x8bUL</div><div class='del'>-	#define HWRM_QUEUE_QCAPS                          0x8cUL</div><div class='del'>-	#define HWRM_QUEUE_ADPTV_QOS_RX_TUNING_QCFG       0x8dUL</div><div class='del'>-	#define HWRM_QUEUE_ADPTV_QOS_RX_TUNING_CFG        0x8eUL</div><div class='del'>-	#define HWRM_QUEUE_ADPTV_QOS_TX_TUNING_QCFG       0x8fUL</div><div class='del'>-	#define HWRM_CFA_L2_FILTER_ALLOC                  0x90UL</div><div class='del'>-	#define HWRM_CFA_L2_FILTER_FREE                   0x91UL</div><div class='del'>-	#define HWRM_CFA_L2_FILTER_CFG                    0x92UL</div><div class='del'>-	#define HWRM_CFA_L2_SET_RX_MASK                   0x93UL</div><div class='del'>-	#define HWRM_CFA_VLAN_ANTISPOOF_CFG               0x94UL</div><div class='del'>-	#define HWRM_CFA_TUNNEL_FILTER_ALLOC              0x95UL</div><div class='del'>-	#define HWRM_CFA_TUNNEL_FILTER_FREE               0x96UL</div><div class='del'>-	#define HWRM_CFA_ENCAP_RECORD_ALLOC               0x97UL</div><div class='del'>-	#define HWRM_CFA_ENCAP_RECORD_FREE                0x98UL</div><div class='del'>-	#define HWRM_CFA_NTUPLE_FILTER_ALLOC              0x99UL</div><div class='del'>-	#define HWRM_CFA_NTUPLE_FILTER_FREE               0x9aUL</div><div class='del'>-	#define HWRM_CFA_NTUPLE_FILTER_CFG                0x9bUL</div><div class='del'>-	#define HWRM_CFA_EM_FLOW_ALLOC                    0x9cUL</div><div class='del'>-	#define HWRM_CFA_EM_FLOW_FREE                     0x9dUL</div><div class='del'>-	#define HWRM_CFA_EM_FLOW_CFG                      0x9eUL</div><div class='del'>-	#define HWRM_TUNNEL_DST_PORT_QUERY                0xa0UL</div><div class='del'>-	#define HWRM_TUNNEL_DST_PORT_ALLOC                0xa1UL</div><div class='del'>-	#define HWRM_TUNNEL_DST_PORT_FREE                 0xa2UL</div><div class='del'>-	#define HWRM_QUEUE_ADPTV_QOS_TX_TUNING_CFG        0xa3UL</div><div class='del'>-	#define HWRM_STAT_CTX_ENG_QUERY                   0xafUL</div><div class='del'>-	#define HWRM_STAT_CTX_ALLOC                       0xb0UL</div><div class='del'>-	#define HWRM_STAT_CTX_FREE                        0xb1UL</div><div class='del'>-	#define HWRM_STAT_CTX_QUERY                       0xb2UL</div><div class='del'>-	#define HWRM_STAT_CTX_CLR_STATS                   0xb3UL</div><div class='del'>-	#define HWRM_PORT_QSTATS_EXT                      0xb4UL</div><div class='del'>-	#define HWRM_PORT_PHY_MDIO_WRITE                  0xb5UL</div><div class='del'>-	#define HWRM_PORT_PHY_MDIO_READ                   0xb6UL</div><div class='del'>-	#define HWRM_PORT_PHY_MDIO_BUS_ACQUIRE            0xb7UL</div><div class='del'>-	#define HWRM_PORT_PHY_MDIO_BUS_RELEASE            0xb8UL</div><div class='del'>-	#define HWRM_PORT_QSTATS_EXT_PFC_WD               0xb9UL</div><div class='del'>-	#define HWRM_RESERVED7                            0xbaUL</div><div class='del'>-	#define HWRM_PORT_TX_FIR_CFG                      0xbbUL</div><div class='del'>-	#define HWRM_PORT_TX_FIR_QCFG                     0xbcUL</div><div class='del'>-	#define HWRM_PORT_ECN_QSTATS                      0xbdUL</div><div class='del'>-	#define HWRM_FW_LIVEPATCH_QUERY                   0xbeUL</div><div class='del'>-	#define HWRM_FW_LIVEPATCH                         0xbfUL</div><div class='del'>-	#define HWRM_FW_RESET                             0xc0UL</div><div class='del'>-	#define HWRM_FW_QSTATUS                           0xc1UL</div><div class='del'>-	#define HWRM_FW_HEALTH_CHECK                      0xc2UL</div><div class='del'>-	#define HWRM_FW_SYNC                              0xc3UL</div><div class='del'>-	#define HWRM_FW_STATE_QCAPS                       0xc4UL</div><div class='del'>-	#define HWRM_FW_STATE_QUIESCE                     0xc5UL</div><div class='del'>-	#define HWRM_FW_STATE_BACKUP                      0xc6UL</div><div class='del'>-	#define HWRM_FW_STATE_RESTORE                     0xc7UL</div><div class='del'>-	#define HWRM_FW_SET_TIME                          0xc8UL</div><div class='del'>-	#define HWRM_FW_GET_TIME                          0xc9UL</div><div class='del'>-	#define HWRM_FW_SET_STRUCTURED_DATA               0xcaUL</div><div class='del'>-	#define HWRM_FW_GET_STRUCTURED_DATA               0xcbUL</div><div class='del'>-	#define HWRM_FW_IPC_MAILBOX                       0xccUL</div><div class='del'>-	#define HWRM_FW_ECN_CFG                           0xcdUL</div><div class='del'>-	#define HWRM_FW_ECN_QCFG                          0xceUL</div><div class='del'>-	#define HWRM_FW_SECURE_CFG                        0xcfUL</div><div class='del'>-	#define HWRM_EXEC_FWD_RESP                        0xd0UL</div><div class='del'>-	#define HWRM_REJECT_FWD_RESP                      0xd1UL</div><div class='del'>-	#define HWRM_FWD_RESP                             0xd2UL</div><div class='del'>-	#define HWRM_FWD_ASYNC_EVENT_CMPL                 0xd3UL</div><div class='del'>-	#define HWRM_OEM_CMD                              0xd4UL</div><div class='del'>-	#define HWRM_PORT_PRBS_TEST                       0xd5UL</div><div class='del'>-	#define HWRM_PORT_SFP_SIDEBAND_CFG                0xd6UL</div><div class='del'>-	#define HWRM_PORT_SFP_SIDEBAND_QCFG               0xd7UL</div><div class='del'>-	#define HWRM_FW_STATE_UNQUIESCE                   0xd8UL</div><div class='del'>-	#define HWRM_PORT_DSC_DUMP                        0xd9UL</div><div class='del'>-	#define HWRM_PORT_EP_TX_QCFG                      0xdaUL</div><div class='del'>-	#define HWRM_PORT_EP_TX_CFG                       0xdbUL</div><div class='del'>-	#define HWRM_PORT_CFG                             0xdcUL</div><div class='del'>-	#define HWRM_PORT_QCFG                            0xddUL</div><div class='del'>-	#define HWRM_PORT_MAC_QCAPS                       0xdfUL</div><div class='del'>-	#define HWRM_TEMP_MONITOR_QUERY                   0xe0UL</div><div class='del'>-	#define HWRM_REG_POWER_QUERY                      0xe1UL</div><div class='del'>-	#define HWRM_CORE_FREQUENCY_QUERY                 0xe2UL</div><div class='del'>-	#define HWRM_REG_POWER_HISTOGRAM                  0xe3UL</div><div class='del'>-	#define HWRM_WOL_FILTER_ALLOC                     0xf0UL</div><div class='del'>-	#define HWRM_WOL_FILTER_FREE                      0xf1UL</div><div class='del'>-	#define HWRM_WOL_FILTER_QCFG                      0xf2UL</div><div class='del'>-	#define HWRM_WOL_REASON_QCFG                      0xf3UL</div><div class='del'>-	#define HWRM_CFA_METER_QCAPS                      0xf4UL</div><div class='del'>-	#define HWRM_CFA_METER_PROFILE_ALLOC              0xf5UL</div><div class='del'>-	#define HWRM_CFA_METER_PROFILE_FREE               0xf6UL</div><div class='del'>-	#define HWRM_CFA_METER_PROFILE_CFG                0xf7UL</div><div class='del'>-	#define HWRM_CFA_METER_INSTANCE_ALLOC             0xf8UL</div><div class='del'>-	#define HWRM_CFA_METER_INSTANCE_FREE              0xf9UL</div><div class='del'>-	#define HWRM_CFA_METER_INSTANCE_CFG               0xfaUL</div><div class='del'>-	#define HWRM_CFA_VFR_ALLOC                        0xfdUL</div><div class='del'>-	#define HWRM_CFA_VFR_FREE                         0xfeUL</div><div class='del'>-	#define HWRM_CFA_VF_PAIR_ALLOC                    0x100UL</div><div class='del'>-	#define HWRM_CFA_VF_PAIR_FREE                     0x101UL</div><div class='del'>-	#define HWRM_CFA_VF_PAIR_INFO                     0x102UL</div><div class='del'>-	#define HWRM_CFA_FLOW_ALLOC                       0x103UL</div><div class='del'>-	#define HWRM_CFA_FLOW_FREE                        0x104UL</div><div class='del'>-	#define HWRM_CFA_FLOW_FLUSH                       0x105UL</div><div class='del'>-	#define HWRM_CFA_FLOW_STATS                       0x106UL</div><div class='del'>-	#define HWRM_CFA_FLOW_INFO                        0x107UL</div><div class='del'>-	#define HWRM_CFA_DECAP_FILTER_ALLOC               0x108UL</div><div class='del'>-	#define HWRM_CFA_DECAP_FILTER_FREE                0x109UL</div><div class='del'>-	#define HWRM_CFA_VLAN_ANTISPOOF_QCFG              0x10aUL</div><div class='del'>-	#define HWRM_CFA_REDIRECT_TUNNEL_TYPE_ALLOC       0x10bUL</div><div class='del'>-	#define HWRM_CFA_REDIRECT_TUNNEL_TYPE_FREE        0x10cUL</div><div class='del'>-	#define HWRM_CFA_PAIR_ALLOC                       0x10dUL</div><div class='del'>-	#define HWRM_CFA_PAIR_FREE                        0x10eUL</div><div class='del'>-	#define HWRM_CFA_PAIR_INFO                        0x10fUL</div><div class='del'>-	#define HWRM_FW_IPC_MSG                           0x110UL</div><div class='del'>-	#define HWRM_CFA_REDIRECT_TUNNEL_TYPE_INFO        0x111UL</div><div class='del'>-	#define HWRM_CFA_REDIRECT_QUERY_TUNNEL_TYPE       0x112UL</div><div class='del'>-	#define HWRM_CFA_FLOW_AGING_TIMER_RESET           0x113UL</div><div class='del'>-	#define HWRM_CFA_FLOW_AGING_CFG                   0x114UL</div><div class='del'>-	#define HWRM_CFA_FLOW_AGING_QCFG                  0x115UL</div><div class='del'>-	#define HWRM_CFA_FLOW_AGING_QCAPS                 0x116UL</div><div class='del'>-	#define HWRM_CFA_CTX_MEM_RGTR                     0x117UL</div><div class='del'>-	#define HWRM_CFA_CTX_MEM_UNRGTR                   0x118UL</div><div class='del'>-	#define HWRM_CFA_CTX_MEM_QCTX                     0x119UL</div><div class='del'>-	#define HWRM_CFA_CTX_MEM_QCAPS                    0x11aUL</div><div class='del'>-	#define HWRM_CFA_COUNTER_QCAPS                    0x11bUL</div><div class='del'>-	#define HWRM_CFA_COUNTER_CFG                      0x11cUL</div><div class='del'>-	#define HWRM_CFA_COUNTER_QCFG                     0x11dUL</div><div class='del'>-	#define HWRM_CFA_COUNTER_QSTATS                   0x11eUL</div><div class='del'>-	#define HWRM_CFA_TCP_FLAG_PROCESS_QCFG            0x11fUL</div><div class='del'>-	#define HWRM_CFA_EEM_QCAPS                        0x120UL</div><div class='del'>-	#define HWRM_CFA_EEM_CFG                          0x121UL</div><div class='del'>-	#define HWRM_CFA_EEM_QCFG                         0x122UL</div><div class='del'>-	#define HWRM_CFA_EEM_OP                           0x123UL</div><div class='del'>-	#define HWRM_CFA_ADV_FLOW_MGNT_QCAPS              0x124UL</div><div class='del'>-	#define HWRM_CFA_TFLIB                            0x125UL</div><div class='del'>-	#define HWRM_CFA_LAG_GROUP_MEMBER_RGTR            0x126UL</div><div class='del'>-	#define HWRM_CFA_LAG_GROUP_MEMBER_UNRGTR          0x127UL</div><div class='del'>-	#define HWRM_CFA_TLS_FILTER_ALLOC                 0x128UL</div><div class='del'>-	#define HWRM_CFA_TLS_FILTER_FREE                  0x129UL</div><div class='del'>-	#define HWRM_CFA_RELEASE_AFM_FUNC                 0x12aUL</div><div class='del'>-	#define HWRM_ENGINE_CKV_STATUS                    0x12eUL</div><div class='del'>-	#define HWRM_ENGINE_CKV_CKEK_ADD                  0x12fUL</div><div class='del'>-	#define HWRM_ENGINE_CKV_CKEK_DELETE               0x130UL</div><div class='del'>-	#define HWRM_ENGINE_CKV_KEY_ADD                   0x131UL</div><div class='del'>-	#define HWRM_ENGINE_CKV_KEY_DELETE                0x132UL</div><div class='del'>-	#define HWRM_ENGINE_CKV_FLUSH                     0x133UL</div><div class='del'>-	#define HWRM_ENGINE_CKV_RNG_GET                   0x134UL</div><div class='del'>-	#define HWRM_ENGINE_CKV_KEY_GEN                   0x135UL</div><div class='del'>-	#define HWRM_ENGINE_CKV_KEY_LABEL_CFG             0x136UL</div><div class='del'>-	#define HWRM_ENGINE_CKV_KEY_LABEL_QCFG            0x137UL</div><div class='del'>-	#define HWRM_ENGINE_QG_CONFIG_QUERY               0x13cUL</div><div class='del'>-	#define HWRM_ENGINE_QG_QUERY                      0x13dUL</div><div class='del'>-	#define HWRM_ENGINE_QG_METER_PROFILE_CONFIG_QUERY 0x13eUL</div><div class='del'>-	#define HWRM_ENGINE_QG_METER_PROFILE_QUERY        0x13fUL</div><div class='del'>-	#define HWRM_ENGINE_QG_METER_PROFILE_ALLOC        0x140UL</div><div class='del'>-	#define HWRM_ENGINE_QG_METER_PROFILE_FREE         0x141UL</div><div class='del'>-	#define HWRM_ENGINE_QG_METER_QUERY                0x142UL</div><div class='del'>-	#define HWRM_ENGINE_QG_METER_BIND                 0x143UL</div><div class='del'>-	#define HWRM_ENGINE_QG_METER_UNBIND               0x144UL</div><div class='del'>-	#define HWRM_ENGINE_QG_FUNC_BIND                  0x145UL</div><div class='del'>-	#define HWRM_ENGINE_SG_CONFIG_QUERY               0x146UL</div><div class='del'>-	#define HWRM_ENGINE_SG_QUERY                      0x147UL</div><div class='del'>-	#define HWRM_ENGINE_SG_METER_QUERY                0x148UL</div><div class='del'>-	#define HWRM_ENGINE_SG_METER_CONFIG               0x149UL</div><div class='del'>-	#define HWRM_ENGINE_SG_QG_BIND                    0x14aUL</div><div class='del'>-	#define HWRM_ENGINE_QG_SG_UNBIND                  0x14bUL</div><div class='del'>-	#define HWRM_ENGINE_CONFIG_QUERY                  0x154UL</div><div class='del'>-	#define HWRM_ENGINE_STATS_CONFIG                  0x155UL</div><div class='del'>-	#define HWRM_ENGINE_STATS_CLEAR                   0x156UL</div><div class='del'>-	#define HWRM_ENGINE_STATS_QUERY                   0x157UL</div><div class='del'>-	#define HWRM_ENGINE_STATS_QUERY_CONTINUOUS_ERROR  0x158UL</div><div class='del'>-	#define HWRM_ENGINE_RQ_ALLOC                      0x15eUL</div><div class='del'>-	#define HWRM_ENGINE_RQ_FREE                       0x15fUL</div><div class='del'>-	#define HWRM_ENGINE_CQ_ALLOC                      0x160UL</div><div class='del'>-	#define HWRM_ENGINE_CQ_FREE                       0x161UL</div><div class='del'>-	#define HWRM_ENGINE_NQ_ALLOC                      0x162UL</div><div class='del'>-	#define HWRM_ENGINE_NQ_FREE                       0x163UL</div><div class='del'>-	#define HWRM_ENGINE_ON_DIE_RQE_CREDITS            0x164UL</div><div class='del'>-	#define HWRM_ENGINE_FUNC_QCFG                     0x165UL</div><div class='del'>-	#define HWRM_FUNC_RESOURCE_QCAPS                  0x190UL</div><div class='del'>-	#define HWRM_FUNC_VF_RESOURCE_CFG                 0x191UL</div><div class='del'>-	#define HWRM_FUNC_BACKING_STORE_QCAPS             0x192UL</div><div class='del'>-	#define HWRM_FUNC_BACKING_STORE_CFG               0x193UL</div><div class='del'>-	#define HWRM_FUNC_BACKING_STORE_QCFG              0x194UL</div><div class='del'>-	#define HWRM_FUNC_VF_BW_CFG                       0x195UL</div><div class='del'>-	#define HWRM_FUNC_VF_BW_QCFG                      0x196UL</div><div class='del'>-	#define HWRM_FUNC_HOST_PF_IDS_QUERY               0x197UL</div><div class='del'>-	#define HWRM_FUNC_QSTATS_EXT                      0x198UL</div><div class='del'>-	#define HWRM_STAT_EXT_CTX_QUERY                   0x199UL</div><div class='del'>-	#define HWRM_FUNC_SPD_CFG                         0x19aUL</div><div class='del'>-	#define HWRM_FUNC_SPD_QCFG                        0x19bUL</div><div class='del'>-	#define HWRM_FUNC_PTP_PIN_QCFG                    0x19cUL</div><div class='del'>-	#define HWRM_FUNC_PTP_PIN_CFG                     0x19dUL</div><div class='del'>-	#define HWRM_FUNC_PTP_CFG                         0x19eUL</div><div class='del'>-	#define HWRM_FUNC_PTP_TS_QUERY                    0x19fUL</div><div class='del'>-	#define HWRM_FUNC_PTP_EXT_CFG                     0x1a0UL</div><div class='del'>-	#define HWRM_FUNC_PTP_EXT_QCFG                    0x1a1UL</div><div class='del'>-	#define HWRM_FUNC_KEY_CTX_ALLOC                   0x1a2UL</div><div class='del'>-	#define HWRM_FUNC_BACKING_STORE_CFG_V2            0x1a3UL</div><div class='del'>-	#define HWRM_FUNC_BACKING_STORE_QCFG_V2           0x1a4UL</div><div class='del'>-	#define HWRM_FUNC_DBR_PACING_CFG                  0x1a5UL</div><div class='del'>-	#define HWRM_FUNC_DBR_PACING_QCFG                 0x1a6UL</div><div class='del'>-	#define HWRM_FUNC_DBR_PACING_BROADCAST_EVENT      0x1a7UL</div><div class='del'>-	#define HWRM_FUNC_BACKING_STORE_QCAPS_V2          0x1a8UL</div><div class='del'>-	#define HWRM_FUNC_DBR_PACING_NQLIST_QUERY         0x1a9UL</div><div class='del'>-	#define HWRM_FUNC_DBR_RECOVERY_COMPLETED          0x1aaUL</div><div class='del'>-	#define HWRM_FUNC_SYNCE_CFG                       0x1abUL</div><div class='del'>-	#define HWRM_FUNC_SYNCE_QCFG                      0x1acUL</div><div class='del'>-	#define HWRM_FUNC_KEY_CTX_FREE                    0x1adUL</div><div class='del'>-	#define HWRM_FUNC_LAG_MODE_CFG                    0x1aeUL</div><div class='del'>-	#define HWRM_FUNC_LAG_MODE_QCFG                   0x1afUL</div><div class='del'>-	#define HWRM_FUNC_LAG_CREATE                      0x1b0UL</div><div class='del'>-	#define HWRM_FUNC_LAG_UPDATE                      0x1b1UL</div><div class='del'>-	#define HWRM_FUNC_LAG_FREE                        0x1b2UL</div><div class='del'>-	#define HWRM_FUNC_LAG_QCFG                        0x1b3UL</div><div class='del'>-	#define HWRM_FUNC_TIMEDTX_PACING_RATE_ADD         0x1c2UL</div><div class='del'>-	#define HWRM_FUNC_TIMEDTX_PACING_RATE_DELETE      0x1c3UL</div><div class='del'>-	#define HWRM_FUNC_TIMEDTX_PACING_RATE_QUERY       0x1c4UL</div><div class='del'>-	#define HWRM_SELFTEST_QLIST                       0x200UL</div><div class='del'>-	#define HWRM_SELFTEST_EXEC                        0x201UL</div><div class='del'>-	#define HWRM_SELFTEST_IRQ                         0x202UL</div><div class='del'>-	#define HWRM_SELFTEST_RETRIEVE_SERDES_DATA        0x203UL</div><div class='del'>-	#define HWRM_PCIE_QSTATS                          0x204UL</div><div class='del'>-	#define HWRM_MFG_FRU_WRITE_CONTROL                0x205UL</div><div class='del'>-	#define HWRM_MFG_TIMERS_QUERY                     0x206UL</div><div class='del'>-	#define HWRM_MFG_OTP_CFG                          0x207UL</div><div class='del'>-	#define HWRM_MFG_OTP_QCFG                         0x208UL</div><div class='del'>-	#define HWRM_MFG_HDMA_TEST                        0x209UL</div><div class='del'>-	#define HWRM_MFG_FRU_EEPROM_WRITE                 0x20aUL</div><div class='del'>-	#define HWRM_MFG_FRU_EEPROM_READ                  0x20bUL</div><div class='del'>-	#define HWRM_MFG_SOC_IMAGE                        0x20cUL</div><div class='del'>-	#define HWRM_MFG_SOC_QSTATUS                      0x20dUL</div><div class='del'>-	#define HWRM_MFG_PARAM_CRITICAL_DATA_FINALIZE     0x20eUL</div><div class='del'>-	#define HWRM_MFG_PARAM_CRITICAL_DATA_READ         0x20fUL</div><div class='del'>-	#define HWRM_MFG_PARAM_CRITICAL_DATA_HEALTH       0x210UL</div><div class='del'>-	#define HWRM_MFG_PRVSN_EXPORT_CSR                 0x211UL</div><div class='del'>-	#define HWRM_MFG_PRVSN_IMPORT_CERT                0x212UL</div><div class='del'>-	#define HWRM_MFG_PRVSN_GET_STATE                  0x213UL</div><div class='del'>-	#define HWRM_MFG_GET_NVM_MEASUREMENT              0x214UL</div><div class='del'>-	#define HWRM_MFG_PSOC_QSTATUS                     0x215UL</div><div class='del'>-	#define HWRM_MFG_SELFTEST_QLIST                   0x216UL</div><div class='del'>-	#define HWRM_MFG_SELFTEST_EXEC                    0x217UL</div><div class='del'>-	#define HWRM_STAT_GENERIC_QSTATS                  0x218UL</div><div class='del'>-	#define HWRM_MFG_PRVSN_EXPORT_CERT                0x219UL</div><div class='del'>-	#define HWRM_STAT_DB_ERROR_QSTATS                 0x21aUL</div><div class='del'>-	#define HWRM_MFG_TESTS                            0x21bUL</div><div class='del'>-	#define HWRM_PORT_POE_CFG                         0x230UL</div><div class='del'>-	#define HWRM_PORT_POE_QCFG                        0x231UL</div><div class='del'>-	#define HWRM_UDCC_QCAPS                           0x258UL</div><div class='del'>-	#define HWRM_UDCC_CFG                             0x259UL</div><div class='del'>-	#define HWRM_UDCC_QCFG                            0x25aUL</div><div class='del'>-	#define HWRM_UDCC_SESSION_CFG                     0x25bUL</div><div class='del'>-	#define HWRM_UDCC_SESSION_QCFG                    0x25cUL</div><div class='del'>-	#define HWRM_UDCC_SESSION_QUERY                   0x25dUL</div><div class='del'>-	#define HWRM_UDCC_COMP_CFG                        0x25eUL</div><div class='del'>-	#define HWRM_UDCC_COMP_QCFG                       0x25fUL</div><div class='del'>-	#define HWRM_UDCC_COMP_QUERY                      0x260UL</div><div class='del'>-	#define HWRM_QUEUE_PFCWD_TIMEOUT_QCAPS            0x261UL</div><div class='del'>-	#define HWRM_QUEUE_PFCWD_TIMEOUT_CFG              0x262UL</div><div class='del'>-	#define HWRM_QUEUE_PFCWD_TIMEOUT_QCFG             0x263UL</div><div class='del'>-	#define HWRM_TF                                   0x2bcUL</div><div class='del'>-	#define HWRM_TF_VERSION_GET                       0x2bdUL</div><div class='del'>-	#define HWRM_TF_SESSION_OPEN                      0x2c6UL</div><div class='del'>-	#define HWRM_TF_SESSION_REGISTER                  0x2c8UL</div><div class='del'>-	#define HWRM_TF_SESSION_UNREGISTER                0x2c9UL</div><div class='del'>-	#define HWRM_TF_SESSION_CLOSE                     0x2caUL</div><div class='del'>-	#define HWRM_TF_SESSION_QCFG                      0x2cbUL</div><div class='del'>-	#define HWRM_TF_SESSION_RESC_QCAPS                0x2ccUL</div><div class='del'>-	#define HWRM_TF_SESSION_RESC_ALLOC                0x2cdUL</div><div class='del'>-	#define HWRM_TF_SESSION_RESC_FREE                 0x2ceUL</div><div class='del'>-	#define HWRM_TF_SESSION_RESC_FLUSH                0x2cfUL</div><div class='del'>-	#define HWRM_TF_SESSION_RESC_INFO                 0x2d0UL</div><div class='del'>-	#define HWRM_TF_SESSION_HOTUP_STATE_SET           0x2d1UL</div><div class='del'>-	#define HWRM_TF_SESSION_HOTUP_STATE_GET           0x2d2UL</div><div class='del'>-	#define HWRM_TF_TBL_TYPE_GET                      0x2daUL</div><div class='del'>-	#define HWRM_TF_TBL_TYPE_SET                      0x2dbUL</div><div class='del'>-	#define HWRM_TF_TBL_TYPE_BULK_GET                 0x2dcUL</div><div class='del'>-	#define HWRM_TF_EM_INSERT                         0x2eaUL</div><div class='del'>-	#define HWRM_TF_EM_DELETE                         0x2ebUL</div><div class='del'>-	#define HWRM_TF_EM_HASH_INSERT                    0x2ecUL</div><div class='del'>-	#define HWRM_TF_EM_MOVE                           0x2edUL</div><div class='del'>-	#define HWRM_TF_TCAM_SET                          0x2f8UL</div><div class='del'>-	#define HWRM_TF_TCAM_GET                          0x2f9UL</div><div class='del'>-	#define HWRM_TF_TCAM_MOVE                         0x2faUL</div><div class='del'>-	#define HWRM_TF_TCAM_FREE                         0x2fbUL</div><div class='del'>-	#define HWRM_TF_GLOBAL_CFG_SET                    0x2fcUL</div><div class='del'>-	#define HWRM_TF_GLOBAL_CFG_GET                    0x2fdUL</div><div class='del'>-	#define HWRM_TF_IF_TBL_SET                        0x2feUL</div><div class='del'>-	#define HWRM_TF_IF_TBL_GET                        0x2ffUL</div><div class='del'>-	#define HWRM_TF_RESC_USAGE_SET                    0x300UL</div><div class='del'>-	#define HWRM_TF_RESC_USAGE_QUERY                  0x301UL</div><div class='del'>-	#define HWRM_TF_TBL_TYPE_ALLOC                    0x302UL</div><div class='del'>-	#define HWRM_TF_TBL_TYPE_FREE                     0x303UL</div><div class='del'>-	#define HWRM_TFC_TBL_SCOPE_QCAPS                  0x380UL</div><div class='del'>-	#define HWRM_TFC_TBL_SCOPE_ID_ALLOC               0x381UL</div><div class='del'>-	#define HWRM_TFC_TBL_SCOPE_CONFIG                 0x382UL</div><div class='del'>-	#define HWRM_TFC_TBL_SCOPE_DECONFIG               0x383UL</div><div class='del'>-	#define HWRM_TFC_TBL_SCOPE_FID_ADD                0x384UL</div><div class='del'>-	#define HWRM_TFC_TBL_SCOPE_FID_REM                0x385UL</div><div class='del'>-	#define HWRM_TFC_TBL_SCOPE_POOL_ALLOC             0x386UL</div><div class='del'>-	#define HWRM_TFC_TBL_SCOPE_POOL_FREE              0x387UL</div><div class='del'>-	#define HWRM_TFC_SESSION_ID_ALLOC                 0x388UL</div><div class='del'>-	#define HWRM_TFC_SESSION_FID_ADD                  0x389UL</div><div class='del'>-	#define HWRM_TFC_SESSION_FID_REM                  0x38aUL</div><div class='del'>-	#define HWRM_TFC_IDENT_ALLOC                      0x38bUL</div><div class='del'>-	#define HWRM_TFC_IDENT_FREE                       0x38cUL</div><div class='del'>-	#define HWRM_TFC_IDX_TBL_ALLOC                    0x38dUL</div><div class='del'>-	#define HWRM_TFC_IDX_TBL_ALLOC_SET                0x38eUL</div><div class='del'>-	#define HWRM_TFC_IDX_TBL_SET                      0x38fUL</div><div class='del'>-	#define HWRM_TFC_IDX_TBL_GET                      0x390UL</div><div class='del'>-	#define HWRM_TFC_IDX_TBL_FREE                     0x391UL</div><div class='del'>-	#define HWRM_TFC_GLOBAL_ID_ALLOC                  0x392UL</div><div class='del'>-	#define HWRM_TFC_TCAM_SET                         0x393UL</div><div class='del'>-	#define HWRM_TFC_TCAM_GET                         0x394UL</div><div class='del'>-	#define HWRM_TFC_TCAM_ALLOC                       0x395UL</div><div class='del'>-	#define HWRM_TFC_TCAM_ALLOC_SET                   0x396UL</div><div class='del'>-	#define HWRM_TFC_TCAM_FREE                        0x397UL</div><div class='del'>-	#define HWRM_TFC_IF_TBL_SET                       0x398UL</div><div class='del'>-	#define HWRM_TFC_IF_TBL_GET                       0x399UL</div><div class='del'>-	#define HWRM_TFC_TBL_SCOPE_CONFIG_GET             0x39aUL</div><div class='del'>-	#define HWRM_TFC_RESC_USAGE_QUERY                 0x39bUL</div><div class='del'>-	#define HWRM_SV                                   0x400UL</div><div class='del'>-	#define HWRM_DBG_SERDES_TEST                      0xff0eUL</div><div class='del'>-	#define HWRM_DBG_LOG_BUFFER_FLUSH                 0xff0fUL</div><div class='del'>-	#define HWRM_DBG_READ_DIRECT                      0xff10UL</div><div class='del'>-	#define HWRM_DBG_READ_INDIRECT                    0xff11UL</div><div class='del'>-	#define HWRM_DBG_WRITE_DIRECT                     0xff12UL</div><div class='del'>-	#define HWRM_DBG_WRITE_INDIRECT                   0xff13UL</div><div class='del'>-	#define HWRM_DBG_DUMP                             0xff14UL</div><div class='del'>-	#define HWRM_DBG_ERASE_NVM                        0xff15UL</div><div class='del'>-	#define HWRM_DBG_CFG                              0xff16UL</div><div class='del'>-	#define HWRM_DBG_COREDUMP_LIST                    0xff17UL</div><div class='del'>-	#define HWRM_DBG_COREDUMP_INITIATE                0xff18UL</div><div class='del'>-	#define HWRM_DBG_COREDUMP_RETRIEVE                0xff19UL</div><div class='del'>-	#define HWRM_DBG_FW_CLI                           0xff1aUL</div><div class='del'>-	#define HWRM_DBG_I2C_CMD                          0xff1bUL</div><div class='del'>-	#define HWRM_DBG_RING_INFO_GET                    0xff1cUL</div><div class='del'>-	#define HWRM_DBG_CRASHDUMP_HEADER                 0xff1dUL</div><div class='del'>-	#define HWRM_DBG_CRASHDUMP_ERASE                  0xff1eUL</div><div class='del'>-	#define HWRM_DBG_DRV_TRACE                        0xff1fUL</div><div class='del'>-	#define HWRM_DBG_QCAPS                            0xff20UL</div><div class='del'>-	#define HWRM_DBG_QCFG                             0xff21UL</div><div class='del'>-	#define HWRM_DBG_CRASHDUMP_MEDIUM_CFG             0xff22UL</div><div class='del'>-	#define HWRM_DBG_USEQ_ALLOC                       0xff23UL</div><div class='del'>-	#define HWRM_DBG_USEQ_FREE                        0xff24UL</div><div class='del'>-	#define HWRM_DBG_USEQ_FLUSH                       0xff25UL</div><div class='del'>-	#define HWRM_DBG_USEQ_QCAPS                       0xff26UL</div><div class='del'>-	#define HWRM_DBG_USEQ_CW_CFG                      0xff27UL</div><div class='del'>-	#define HWRM_DBG_USEQ_SCHED_CFG                   0xff28UL</div><div class='del'>-	#define HWRM_DBG_USEQ_RUN                         0xff29UL</div><div class='del'>-	#define HWRM_DBG_USEQ_DELIVERY_REQ                0xff2aUL</div><div class='del'>-	#define HWRM_DBG_USEQ_RESP_HDR                    0xff2bUL</div><div class='del'>-	#define HWRM_DBG_COREDUMP_CAPTURE                 0xff2cUL</div><div class='del'>-	#define HWRM_DBG_PTRACE                           0xff2dUL</div><div class='del'>-	#define HWRM_DBG_SIM_CABLE_STATE                  0xff2eUL</div><div class='del'>-	#define HWRM_NVM_GET_VPD_FIELD_INFO               0xffeaUL</div><div class='del'>-	#define HWRM_NVM_SET_VPD_FIELD_INFO               0xffebUL</div><div class='del'>-	#define HWRM_NVM_DEFRAG                           0xffecUL</div><div class='del'>-	#define HWRM_NVM_REQ_ARBITRATION                  0xffedUL</div><div class='del'>-	#define HWRM_NVM_FACTORY_DEFAULTS                 0xffeeUL</div><div class='del'>-	#define HWRM_NVM_VALIDATE_OPTION                  0xffefUL</div><div class='del'>-	#define HWRM_NVM_FLUSH                            0xfff0UL</div><div class='del'>-	#define HWRM_NVM_GET_VARIABLE                     0xfff1UL</div><div class='del'>-	#define HWRM_NVM_SET_VARIABLE                     0xfff2UL</div><div class='del'>-	#define HWRM_NVM_INSTALL_UPDATE                   0xfff3UL</div><div class='del'>-	#define HWRM_NVM_MODIFY                           0xfff4UL</div><div class='del'>-	#define HWRM_NVM_VERIFY_UPDATE                    0xfff5UL</div><div class='del'>-	#define HWRM_NVM_GET_DEV_INFO                     0xfff6UL</div><div class='del'>-	#define HWRM_NVM_ERASE_DIR_ENTRY                  0xfff7UL</div><div class='del'>-	#define HWRM_NVM_MOD_DIR_ENTRY                    0xfff8UL</div><div class='del'>-	#define HWRM_NVM_FIND_DIR_ENTRY                   0xfff9UL</div><div class='del'>-	#define HWRM_NVM_GET_DIR_ENTRIES                  0xfffaUL</div><div class='del'>-	#define HWRM_NVM_GET_DIR_INFO                     0xfffbUL</div><div class='del'>-	#define HWRM_NVM_RAW_DUMP                         0xfffcUL</div><div class='del'>-	#define HWRM_NVM_READ                             0xfffdUL</div><div class='del'>-	#define HWRM_NVM_WRITE                            0xfffeUL</div><div class='del'>-	#define HWRM_NVM_RAW_WRITE_BLK                    0xffffUL</div><div class='del'>-	#define HWRM_LAST                                HWRM_NVM_RAW_WRITE_BLK</div><div class='del'>-	__le16	unused_0[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ret_codes (size:64b/8B) */</div><div class='del'>-struct ret_codes {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	#define HWRM_ERR_CODE_SUCCESS                      0x0UL</div><div class='del'>-	#define HWRM_ERR_CODE_FAIL                         0x1UL</div><div class='del'>-	#define HWRM_ERR_CODE_INVALID_PARAMS               0x2UL</div><div class='del'>-	#define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED       0x3UL</div><div class='del'>-	#define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR         0x4UL</div><div class='del'>-	#define HWRM_ERR_CODE_INVALID_FLAGS                0x5UL</div><div class='del'>-	#define HWRM_ERR_CODE_INVALID_ENABLES              0x6UL</div><div class='del'>-	#define HWRM_ERR_CODE_UNSUPPORTED_TLV              0x7UL</div><div class='del'>-	#define HWRM_ERR_CODE_NO_BUFFER                    0x8UL</div><div class='del'>-	#define HWRM_ERR_CODE_UNSUPPORTED_OPTION_ERR       0x9UL</div><div class='del'>-	#define HWRM_ERR_CODE_HOT_RESET_PROGRESS           0xaUL</div><div class='del'>-	#define HWRM_ERR_CODE_HOT_RESET_FAIL               0xbUL</div><div class='del'>-	#define HWRM_ERR_CODE_NO_FLOW_COUNTER_DURING_ALLOC 0xcUL</div><div class='del'>-	#define HWRM_ERR_CODE_KEY_HASH_COLLISION           0xdUL</div><div class='del'>-	#define HWRM_ERR_CODE_KEY_ALREADY_EXISTS           0xeUL</div><div class='del'>-	#define HWRM_ERR_CODE_HWRM_ERROR                   0xfUL</div><div class='del'>-	#define HWRM_ERR_CODE_BUSY                         0x10UL</div><div class='del'>-	#define HWRM_ERR_CODE_RESOURCE_LOCKED              0x11UL</div><div class='del'>-	#define HWRM_ERR_CODE_PF_UNAVAILABLE               0x12UL</div><div class='del'>-	#define HWRM_ERR_CODE_ENTITY_NOT_PRESENT           0x13UL</div><div class='del'>-	#define HWRM_ERR_CODE_SECURE_SOC_ERROR             0x14UL</div><div class='del'>-	#define HWRM_ERR_CODE_TLV_ENCAPSULATED_RESPONSE    0x8000UL</div><div class='del'>-	#define HWRM_ERR_CODE_UNKNOWN_ERR                  0xfffeUL</div><div class='del'>-	#define HWRM_ERR_CODE_CMD_NOT_SUPPORTED            0xffffUL</div><div class='del'>-	#define HWRM_ERR_CODE_LAST                        HWRM_ERR_CODE_CMD_NOT_SUPPORTED</div><div class='del'>-	__le16	unused_0[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_err_output (size:128b/16B) */</div><div class='del'>-struct hwrm_err_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	opaque_0;</div><div class='del'>-	__le16	opaque_1;</div><div class='del'>-	u8	cmd_err;</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-#define HWRM_NA_SIGNATURE ((__le32)(-1))</div><div class='del'>-#define HWRM_MAX_REQ_LEN 128</div><div class='del'>-#define HWRM_MAX_RESP_LEN 704</div><div class='del'>-#define HW_HASH_INDEX_SIZE 0x80</div><div class='del'>-#define HW_HASH_KEY_SIZE 40</div><div class='del'>-#define HWRM_RESP_VALID_KEY 1</div><div class='del'>-#define HWRM_TARGET_ID_BONO 0xFFF8</div><div class='del'>-#define HWRM_TARGET_ID_KONG 0xFFF9</div><div class='del'>-#define HWRM_TARGET_ID_APE 0xFFFA</div><div class='del'>-#define HWRM_TARGET_ID_TOOLS 0xFFFD</div><div class='del'>-#define HWRM_VERSION_MAJOR 1</div><div class='del'>-#define HWRM_VERSION_MINOR 10</div><div class='del'>-#define HWRM_VERSION_UPDATE 3</div><div class='del'>-#define HWRM_VERSION_RSVD 68</div><div class='del'>-#define HWRM_VERSION_STR "1.10.3.68"</div><div class='del'>-</div><div class='del'>-/* hwrm_ver_get_input (size:192b/24B) */</div><div class='del'>-struct hwrm_ver_get_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	hwrm_intf_maj;</div><div class='del'>-	u8	hwrm_intf_min;</div><div class='del'>-	u8	hwrm_intf_upd;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ver_get_output (size:1408b/176B) */</div><div class='del'>-struct hwrm_ver_get_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	hwrm_intf_maj_8b;</div><div class='del'>-	u8	hwrm_intf_min_8b;</div><div class='del'>-	u8	hwrm_intf_upd_8b;</div><div class='del'>-	u8	hwrm_intf_rsvd_8b;</div><div class='del'>-	u8	hwrm_fw_maj_8b;</div><div class='del'>-	u8	hwrm_fw_min_8b;</div><div class='del'>-	u8	hwrm_fw_bld_8b;</div><div class='del'>-	u8	hwrm_fw_rsvd_8b;</div><div class='del'>-	u8	mgmt_fw_maj_8b;</div><div class='del'>-	u8	mgmt_fw_min_8b;</div><div class='del'>-	u8	mgmt_fw_bld_8b;</div><div class='del'>-	u8	mgmt_fw_rsvd_8b;</div><div class='del'>-	u8	netctrl_fw_maj_8b;</div><div class='del'>-	u8	netctrl_fw_min_8b;</div><div class='del'>-	u8	netctrl_fw_bld_8b;</div><div class='del'>-	u8	netctrl_fw_rsvd_8b;</div><div class='del'>-	__le32	dev_caps_cfg;</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED                  0x1UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED                  0x2UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED                      0x4UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_SHORT_CMD_REQUIRED                       0x8UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_KONG_MB_CHNL_SUPPORTED                   0x10UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_FLOW_HANDLE_64BIT_SUPPORTED              0x20UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_L2_FILTER_TYPES_ROCE_OR_L2_SUPPORTED     0x40UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_VIRTIO_VSWITCH_OFFLOAD_SUPPORTED         0x80UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_TRUSTED_VF_SUPPORTED                     0x100UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_FLOW_AGING_SUPPORTED                     0x200UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_ADV_FLOW_COUNTERS_SUPPORTED              0x400UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_CFA_EEM_SUPPORTED                        0x800UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_CFA_ADV_FLOW_MGNT_SUPPORTED              0x1000UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_CFA_TFLIB_SUPPORTED                      0x2000UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_CFA_TRUFLOW_SUPPORTED                    0x4000UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_SECURE_BOOT_CAPABLE                      0x8000UL</div><div class='del'>-	#define VER_GET_RESP_DEV_CAPS_CFG_SECURE_SOC_CAPABLE                       0x10000UL</div><div class='del'>-	u8	roce_fw_maj_8b;</div><div class='del'>-	u8	roce_fw_min_8b;</div><div class='del'>-	u8	roce_fw_bld_8b;</div><div class='del'>-	u8	roce_fw_rsvd_8b;</div><div class='del'>-	char	hwrm_fw_name[16];</div><div class='del'>-	char	mgmt_fw_name[16];</div><div class='del'>-	char	netctrl_fw_name[16];</div><div class='del'>-	char	active_pkg_name[16];</div><div class='del'>-	char	roce_fw_name[16];</div><div class='del'>-	__le16	chip_num;</div><div class='del'>-	u8	chip_rev;</div><div class='del'>-	u8	chip_metal;</div><div class='del'>-	u8	chip_bond_id;</div><div class='del'>-	u8	chip_platform_type;</div><div class='del'>-	#define VER_GET_RESP_CHIP_PLATFORM_TYPE_ASIC      0x0UL</div><div class='del'>-	#define VER_GET_RESP_CHIP_PLATFORM_TYPE_FPGA      0x1UL</div><div class='del'>-	#define VER_GET_RESP_CHIP_PLATFORM_TYPE_PALLADIUM 0x2UL</div><div class='del'>-	#define VER_GET_RESP_CHIP_PLATFORM_TYPE_LAST     VER_GET_RESP_CHIP_PLATFORM_TYPE_PALLADIUM</div><div class='del'>-	__le16	max_req_win_len;</div><div class='del'>-	__le16	max_resp_len;</div><div class='del'>-	__le16	def_req_timeout;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define VER_GET_RESP_FLAGS_DEV_NOT_RDY                   0x1UL</div><div class='del'>-	#define VER_GET_RESP_FLAGS_EXT_VER_AVAIL                 0x2UL</div><div class='del'>-	#define VER_GET_RESP_FLAGS_DEV_NOT_RDY_BACKING_STORE     0x4UL</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	u8	always_1;</div><div class='del'>-	__le16	hwrm_intf_major;</div><div class='del'>-	__le16	hwrm_intf_minor;</div><div class='del'>-	__le16	hwrm_intf_build;</div><div class='del'>-	__le16	hwrm_intf_patch;</div><div class='del'>-	__le16	hwrm_fw_major;</div><div class='del'>-	__le16	hwrm_fw_minor;</div><div class='del'>-	__le16	hwrm_fw_build;</div><div class='del'>-	__le16	hwrm_fw_patch;</div><div class='del'>-	__le16	mgmt_fw_major;</div><div class='del'>-	__le16	mgmt_fw_minor;</div><div class='del'>-	__le16	mgmt_fw_build;</div><div class='del'>-	__le16	mgmt_fw_patch;</div><div class='del'>-	__le16	netctrl_fw_major;</div><div class='del'>-	__le16	netctrl_fw_minor;</div><div class='del'>-	__le16	netctrl_fw_build;</div><div class='del'>-	__le16	netctrl_fw_patch;</div><div class='del'>-	__le16	roce_fw_major;</div><div class='del'>-	__le16	roce_fw_minor;</div><div class='del'>-	__le16	roce_fw_build;</div><div class='del'>-	__le16	roce_fw_patch;</div><div class='del'>-	__le16	max_ext_req_len;</div><div class='del'>-	__le16	max_req_timeout;</div><div class='del'>-	u8	unused_1[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* eject_cmpl (size:128b/16B) */</div><div class='del'>-struct eject_cmpl {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define EJECT_CMPL_TYPE_MASK       0x3fUL</div><div class='del'>-	#define EJECT_CMPL_TYPE_SFT        0</div><div class='del'>-	#define EJECT_CMPL_TYPE_STAT_EJECT   0x1aUL</div><div class='del'>-	#define EJECT_CMPL_TYPE_LAST        EJECT_CMPL_TYPE_STAT_EJECT</div><div class='del'>-	#define EJECT_CMPL_FLAGS_MASK      0xffc0UL</div><div class='del'>-	#define EJECT_CMPL_FLAGS_SFT       6</div><div class='del'>-	#define EJECT_CMPL_FLAGS_ERROR      0x40UL</div><div class='del'>-	__le16	len;</div><div class='del'>-	__le32	opaque;</div><div class='del'>-	__le16	v;</div><div class='del'>-	#define EJECT_CMPL_V                              0x1UL</div><div class='del'>-	#define EJECT_CMPL_ERRORS_MASK                    0xfffeUL</div><div class='del'>-	#define EJECT_CMPL_ERRORS_SFT                     1</div><div class='del'>-	#define EJECT_CMPL_ERRORS_BUFFER_ERROR_MASK        0xeUL</div><div class='del'>-	#define EJECT_CMPL_ERRORS_BUFFER_ERROR_SFT         1</div><div class='del'>-	#define EJECT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER     (0x0UL &lt;&lt; 1)</div><div class='del'>-	#define EJECT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT   (0x1UL &lt;&lt; 1)</div><div class='del'>-	#define EJECT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT    (0x3UL &lt;&lt; 1)</div><div class='del'>-	#define EJECT_CMPL_ERRORS_BUFFER_ERROR_FLUSH         (0x5UL &lt;&lt; 1)</div><div class='del'>-	#define EJECT_CMPL_ERRORS_BUFFER_ERROR_LAST         EJECT_CMPL_ERRORS_BUFFER_ERROR_FLUSH</div><div class='del'>-	__le16	reserved16;</div><div class='del'>-	__le32	unused_2;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cmpl (size:128b/16B) */</div><div class='del'>-struct hwrm_cmpl {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define CMPL_TYPE_MASK     0x3fUL</div><div class='del'>-	#define CMPL_TYPE_SFT      0</div><div class='del'>-	#define CMPL_TYPE_HWRM_DONE  0x20UL</div><div class='del'>-	#define CMPL_TYPE_LAST      CMPL_TYPE_HWRM_DONE</div><div class='del'>-	__le16	sequence_id;</div><div class='del'>-	__le32	unused_1;</div><div class='del'>-	__le32	v;</div><div class='del'>-	#define CMPL_V     0x1UL</div><div class='del'>-	__le32	unused_3;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fwd_req_cmpl (size:128b/16B) */</div><div class='del'>-struct hwrm_fwd_req_cmpl {</div><div class='del'>-	__le16	req_len_type;</div><div class='del'>-	#define FWD_REQ_CMPL_TYPE_MASK        0x3fUL</div><div class='del'>-	#define FWD_REQ_CMPL_TYPE_SFT         0</div><div class='del'>-	#define FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ  0x22UL</div><div class='del'>-	#define FWD_REQ_CMPL_TYPE_LAST         FWD_REQ_CMPL_TYPE_HWRM_FWD_REQ</div><div class='del'>-	#define FWD_REQ_CMPL_REQ_LEN_MASK     0xffc0UL</div><div class='del'>-	#define FWD_REQ_CMPL_REQ_LEN_SFT      6</div><div class='del'>-	__le16	source_id;</div><div class='del'>-	__le32	unused0;</div><div class='del'>-	__le32	req_buf_addr_v[2];</div><div class='del'>-	#define FWD_REQ_CMPL_V                0x1UL</div><div class='del'>-	#define FWD_REQ_CMPL_REQ_BUF_ADDR_MASK 0xfffffffeUL</div><div class='del'>-	#define FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fwd_resp_cmpl (size:128b/16B) */</div><div class='del'>-struct hwrm_fwd_resp_cmpl {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define FWD_RESP_CMPL_TYPE_MASK         0x3fUL</div><div class='del'>-	#define FWD_RESP_CMPL_TYPE_SFT          0</div><div class='del'>-	#define FWD_RESP_CMPL_TYPE_HWRM_FWD_RESP  0x24UL</div><div class='del'>-	#define FWD_RESP_CMPL_TYPE_LAST          FWD_RESP_CMPL_TYPE_HWRM_FWD_RESP</div><div class='del'>-	__le16	source_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	unused_1;</div><div class='del'>-	__le32	resp_buf_addr_v[2];</div><div class='del'>-	#define FWD_RESP_CMPL_V                 0x1UL</div><div class='del'>-	#define FWD_RESP_CMPL_RESP_BUF_ADDR_MASK 0xfffffffeUL</div><div class='del'>-	#define FWD_RESP_CMPL_RESP_BUF_ADDR_SFT 1</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_TYPE_LAST             ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE              0x0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE                 0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE               0x2UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE               0x3UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED           0x4UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED      0x5UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE           0x6UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE             0x7UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_RESET_NOTIFY                    0x8UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_ERROR_RECOVERY                  0x9UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_RING_MONITOR_MSG                0xaUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD                0x10UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD                  0x11UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_FUNC_FLR_PROC_CMPLT             0x12UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD                  0x20UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD                    0x21UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR                          0x30UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE              0x31UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE        0x32UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE                   0x33UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_LLFC_PFC_CHANGE                 0x34UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_DEFAULT_VNIC_CHANGE             0x35UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_HW_FLOW_AGED                    0x36UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_DEBUG_NOTIFICATION              0x37UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_EEM_CACHE_FLUSH_REQ             0x38UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_EEM_CACHE_FLUSH_DONE            0x39UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_TCP_FLAG_ACTION_CHANGE          0x3aUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_EEM_FLOW_ACTIVE                 0x3bUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_EEM_CFG_CHANGE                  0x3cUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_TFLIB_DEFAULT_VNIC_CHANGE       0x3dUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_TFLIB_LINK_STATUS_CHANGE        0x3eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_QUIESCE_DONE                    0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_DEFERRED_RESPONSE               0x40UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_PFC_WATCHDOG_CFG_CHANGE         0x41UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_ECHO_REQUEST                    0x42UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_PHC_UPDATE                      0x43UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_PPS_TIMESTAMP                   0x44UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_ERROR_REPORT                    0x45UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_DOORBELL_PACING_THRESHOLD       0x46UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_RSS_CHANGE                      0x47UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_DOORBELL_PACING_NQ_UPDATE       0x48UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_HW_DOORBELL_RECOVERY_READ_ERROR 0x49UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_CTX_ERROR                       0x4aUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_UDCC_SESSION_CHANGE             0x4bUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_DBG_BUF_PRODUCER                0x4cUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_PEER_MMAP_CHANGE                0x4dUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_REPRESENTOR_PAIR_CHANGE         0x4eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_VF_STAT_CHANGE                  0x4fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_HOST_COREDUMP                   0x50UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_MAX_RGTR_EVENT_ID               0x51UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_FW_TRACE_MSG                    0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR                      0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EVENT_ID_LAST                           ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_link_status_change (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_link_status_change {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_TYPE_LAST             ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_ID_LINK_STATUS_CHANGE 0x0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_ID_LAST              ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_ID_LINK_STATUS_CHANGE</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_LINK_CHANGE     0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_LINK_CHANGE_DOWN  0x0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_LINK_CHANGE_UP    0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_LINK_CHANGE_LAST ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_LINK_CHANGE_UP</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PORT_MASK       0xeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PORT_SFT        1</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PORT_ID_MASK    0xffff0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PORT_ID_SFT     4</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PF_ID_MASK      0xff00000UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_STATUS_CHANGE_EVENT_DATA1_PF_ID_SFT       20</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_port_conn_not_allowed (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_port_conn_not_allowed {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_TYPE_LAST             ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_ID_PORT_CONN_NOT_ALLOWED 0x4UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_ID_LAST                 ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_ID_PORT_CONN_NOT_ALLOWED</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_PORT_ID_MASK                 0xffffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_PORT_ID_SFT                  0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_MASK      0xff0000UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_SFT       16</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_NONE        (0x0UL &lt;&lt; 16)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_DISABLETX   (0x1UL &lt;&lt; 16)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_WARNINGMSG  (0x2UL &lt;&lt; 16)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_PWRDOWN     (0x3UL &lt;&lt; 16)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_LAST       ASYNC_EVENT_CMPL_PORT_CONN_NOT_ALLOWED_EVENT_DATA1_ENFORCEMENT_POLICY_PWRDOWN</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_link_speed_cfg_change (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_link_speed_cfg_change {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_TYPE_LAST             ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_ID_LINK_SPEED_CFG_CHANGE 0x6UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_ID_LAST                 ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_ID_LINK_SPEED_CFG_CHANGE</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_DATA1_PORT_ID_MASK                     0xffffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_DATA1_PORT_ID_SFT                      0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_DATA1_SUPPORTED_LINK_SPEEDS_CHANGE     0x10000UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_LINK_SPEED_CFG_CHANGE_EVENT_DATA1_ILLEGAL_LINK_SPEED_CFG           0x20000UL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_reset_notify (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_reset_notify {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_TYPE_LAST             ASYNC_EVENT_CMPL_RESET_NOTIFY_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_ID_RESET_NOTIFY 0x8UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_ID_LAST        ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_ID_RESET_NOTIFY</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA2_FW_STATUS_CODE_MASK 0xffffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA2_FW_STATUS_CODE_SFT 0</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_DRIVER_ACTION_MASK                  0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_DRIVER_ACTION_SFT                   0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_DRIVER_ACTION_DRIVER_STOP_TX_QUEUE    0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_DRIVER_ACTION_DRIVER_IFDOWN           0x2UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_DRIVER_ACTION_LAST                   ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_DRIVER_ACTION_DRIVER_IFDOWN</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_REASON_CODE_MASK                    0xff00UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_REASON_CODE_SFT                     8</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_REASON_CODE_MANAGEMENT_RESET_REQUEST  (0x1UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_REASON_CODE_FW_EXCEPTION_FATAL        (0x2UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_REASON_CODE_FW_EXCEPTION_NON_FATAL    (0x3UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_REASON_CODE_FAST_RESET                (0x4UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_REASON_CODE_FW_ACTIVATION             (0x5UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_REASON_CODE_LAST                     ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_REASON_CODE_FW_ACTIVATION</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_DELAY_IN_100MS_TICKS_MASK           0xffff0000UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RESET_NOTIFY_EVENT_DATA1_DELAY_IN_100MS_TICKS_SFT            16</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_error_recovery (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_error_recovery {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_TYPE_LAST             ASYNC_EVENT_CMPL_ERROR_RECOVERY_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_EVENT_ID_ERROR_RECOVERY 0x9UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_EVENT_ID_LAST          ASYNC_EVENT_CMPL_ERROR_RECOVERY_EVENT_ID_ERROR_RECOVERY</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_EVENT_DATA1_FLAGS_MASK                 0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_EVENT_DATA1_FLAGS_SFT                  0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_EVENT_DATA1_FLAGS_MASTER_FUNC           0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_RECOVERY_EVENT_DATA1_FLAGS_RECOVERY_ENABLED      0x2UL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_ring_monitor_msg (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_ring_monitor_msg {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_TYPE_LAST             ASYNC_EVENT_CMPL_RING_MONITOR_MSG_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_EVENT_ID_RING_MONITOR_MSG 0xaUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_EVENT_ID_LAST            ASYNC_EVENT_CMPL_RING_MONITOR_MSG_EVENT_ID_RING_MONITOR_MSG</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_EVENT_DATA2_DISABLE_RING_TYPE_MASK 0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_EVENT_DATA2_DISABLE_RING_TYPE_SFT 0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_EVENT_DATA2_DISABLE_RING_TYPE_TX    0x0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_EVENT_DATA2_DISABLE_RING_TYPE_RX    0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_EVENT_DATA2_DISABLE_RING_TYPE_CMPL  0x2UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_EVENT_DATA2_DISABLE_RING_TYPE_LAST ASYNC_EVENT_CMPL_RING_MONITOR_MSG_EVENT_DATA2_DISABLE_RING_TYPE_CMPL</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_RING_MONITOR_MSG_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_vf_cfg_change (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_vf_cfg_change {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_TYPE_LAST             ASYNC_EVENT_CMPL_VF_CFG_CHANGE_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_ID_VF_CFG_CHANGE 0x33UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_ID_LAST         ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_ID_VF_CFG_CHANGE</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA2_VF_ID_MASK 0xffffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA2_VF_ID_SFT 0</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_MTU_CHANGE                0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_MRU_CHANGE                0x2UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_DFLT_MAC_ADDR_CHANGE      0x4UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_DFLT_VLAN_CHANGE          0x8UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_TRUSTED_VF_CFG_CHANGE     0x10UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_VF_CFG_CHANGE_EVENT_DATA1_TF_OWNERSHIP_RELEASE      0x20UL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_default_vnic_change (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_default_vnic_change {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_TYPE_LAST             ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_UNUSED1_MASK         0xffc0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_UNUSED1_SFT          6</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_ID_ALLOC_FREE_NOTIFICATION 0x35UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_ID_LAST                   ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_ID_ALLOC_FREE_NOTIFICATION</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_MASK          0x3UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_SFT           0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_DEF_VNIC_ALLOC  0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_DEF_VNIC_FREE   0x2UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_LAST           ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_DEF_VNIC_STATE_DEF_VNIC_FREE</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_PF_ID_MASK                   0x3fcUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_PF_ID_SFT                    2</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_VF_ID_MASK                   0x3fffc00UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFAULT_VNIC_CHANGE_EVENT_DATA1_VF_ID_SFT                    10</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_hw_flow_aged (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_hw_flow_aged {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_TYPE_LAST             ASYNC_EVENT_CMPL_HW_FLOW_AGED_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_EVENT_ID_HW_FLOW_AGED 0x36UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_EVENT_ID_LAST        ASYNC_EVENT_CMPL_HW_FLOW_AGED_EVENT_ID_HW_FLOW_AGED</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_EVENT_DATA1_FLOW_ID_MASK       0x7fffffffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_EVENT_DATA1_FLOW_ID_SFT        0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_EVENT_DATA1_FLOW_DIRECTION     0x80000000UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_EVENT_DATA1_FLOW_DIRECTION_RX    (0x0UL &lt;&lt; 31)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_EVENT_DATA1_FLOW_DIRECTION_TX    (0x1UL &lt;&lt; 31)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HW_FLOW_AGED_EVENT_DATA1_FLOW_DIRECTION_LAST ASYNC_EVENT_CMPL_HW_FLOW_AGED_EVENT_DATA1_FLOW_DIRECTION_TX</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_eem_cache_flush_req (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_eem_cache_flush_req {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_TYPE_LAST             ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_EVENT_ID_EEM_CACHE_FLUSH_REQ 0x38UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_EVENT_ID_LAST               ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_EVENT_ID_EEM_CACHE_FLUSH_REQ</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_REQ_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_eem_cache_flush_done (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_eem_cache_flush_done {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_TYPE_LAST             ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_EVENT_ID_EEM_CACHE_FLUSH_DONE 0x39UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_EVENT_ID_LAST                ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_EVENT_ID_EEM_CACHE_FLUSH_DONE</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_EVENT_DATA1_FID_MASK 0xffffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_EEM_CACHE_FLUSH_DONE_EVENT_DATA1_FID_SFT 0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_deferred_response (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_deferred_response {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_TYPE_LAST             ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_EVENT_ID_DEFERRED_RESPONSE 0x40UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_EVENT_ID_LAST             ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_EVENT_ID_DEFERRED_RESPONSE</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_EVENT_DATA2_SEQ_ID_MASK 0xffffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_EVENT_DATA2_SEQ_ID_SFT 0</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_DEFERRED_RESPONSE_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_echo_request (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_echo_request {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ECHO_REQUEST_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ECHO_REQUEST_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ECHO_REQUEST_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ECHO_REQUEST_TYPE_LAST             ASYNC_EVENT_CMPL_ECHO_REQUEST_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ECHO_REQUEST_EVENT_ID_ECHO_REQUEST 0x42UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ECHO_REQUEST_EVENT_ID_LAST        ASYNC_EVENT_CMPL_ECHO_REQUEST_EVENT_ID_ECHO_REQUEST</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ECHO_REQUEST_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ECHO_REQUEST_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ECHO_REQUEST_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_phc_update (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_phc_update {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_TYPE_LAST             ASYNC_EVENT_CMPL_PHC_UPDATE_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_ID_PHC_UPDATE 0x43UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_ID_LAST      ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_ID_PHC_UPDATE</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA2_PHC_MASTER_FID_MASK 0xffffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA2_PHC_MASTER_FID_SFT 0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA2_PHC_SEC_FID_MASK   0xffff0000UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA2_PHC_SEC_FID_SFT    16</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_FLAGS_MASK          0xfUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_FLAGS_SFT           0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_FLAGS_PHC_MASTER      0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_FLAGS_PHC_SECONDARY   0x2UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_FLAGS_PHC_FAILOVER    0x3UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_FLAGS_PHC_RTC_UPDATE  0x4UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_FLAGS_LAST           ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_FLAGS_PHC_RTC_UPDATE</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_PHC_TIME_MSB_MASK   0xffff0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PHC_UPDATE_EVENT_DATA1_PHC_TIME_MSB_SFT    4</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_pps_timestamp (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_pps_timestamp {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_TYPE_LAST             ASYNC_EVENT_CMPL_PPS_TIMESTAMP_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_ID_PPS_TIMESTAMP 0x44UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_ID_LAST         ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_ID_PPS_TIMESTAMP</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE              0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_INTERNAL       0x0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_EXTERNAL       0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_LAST          ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_EXTERNAL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_MASK         0xeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PIN_NUMBER_SFT          1</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_MASK 0xffff0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_PPS_TIMESTAMP_UPPER_SFT 4</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_MASK 0xffffffffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA1_PPS_TIMESTAMP_LOWER_SFT 0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_error_report (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_error_report {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_TYPE_LAST             ASYNC_EVENT_CMPL_ERROR_REPORT_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_EVENT_ID_ERROR_REPORT 0x45UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_EVENT_ID_LAST        ASYNC_EVENT_CMPL_ERROR_REPORT_EVENT_ID_ERROR_REPORT</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_EVENT_DATA1_ERROR_TYPE_MASK 0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_EVENT_DATA1_ERROR_TYPE_SFT 0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_hwrm_error (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_hwrm_error {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_TYPE_LAST             ASYNC_EVENT_CMPL_HWRM_ERROR_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_ID_HWRM_ERROR 0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_ID_LAST      ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_ID_HWRM_ERROR</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_MASK    0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_SFT     0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_WARNING   0x0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_NONFATAL  0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_FATAL     0x2UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_LAST     ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA2_SEVERITY_FATAL</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_HWRM_ERROR_EVENT_DATA1_TIMESTAMP     0x1UL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_error_report_base (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_error_report_base {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_TYPE_LAST             ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_ID_ERROR_REPORT 0x45UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_ID_LAST        ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_ID_ERROR_REPORT</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_MASK                        0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_SFT                         0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_RESERVED                      0x0UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_PAUSE_STORM                   0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_INVALID_SIGNAL                0x2UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_NVM                           0x3UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_DOORBELL_DROP_THRESHOLD       0x4UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_THERMAL_THRESHOLD             0x5UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_DUAL_DATA_RATE_NOT_SUPPORTED  0x6UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_LAST                         ASYNC_EVENT_CMPL_ERROR_REPORT_BASE_EVENT_DATA1_ERROR_TYPE_DUAL_DATA_RATE_NOT_SUPPORTED</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_error_report_pause_storm (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_error_report_pause_storm {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_TYPE_LAST             ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_EVENT_ID_ERROR_REPORT 0x45UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_EVENT_ID_LAST        ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_EVENT_ID_ERROR_REPORT</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_EVENT_DATA1_ERROR_TYPE_MASK       0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_EVENT_DATA1_ERROR_TYPE_SFT        0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_EVENT_DATA1_ERROR_TYPE_PAUSE_STORM  0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_EVENT_DATA1_ERROR_TYPE_LAST        ASYNC_EVENT_CMPL_ERROR_REPORT_PAUSE_STORM_EVENT_DATA1_ERROR_TYPE_PAUSE_STORM</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_error_report_invalid_signal (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_error_report_invalid_signal {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_TYPE_LAST             ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_EVENT_ID_ERROR_REPORT 0x45UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_EVENT_ID_LAST        ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_EVENT_ID_ERROR_REPORT</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_EVENT_DATA2_PIN_ID_MASK 0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_EVENT_DATA2_PIN_ID_SFT 0</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_EVENT_DATA1_ERROR_TYPE_MASK          0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_EVENT_DATA1_ERROR_TYPE_SFT           0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_EVENT_DATA1_ERROR_TYPE_INVALID_SIGNAL  0x2UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_EVENT_DATA1_ERROR_TYPE_LAST           ASYNC_EVENT_CMPL_ERROR_REPORT_INVALID_SIGNAL_EVENT_DATA1_ERROR_TYPE_INVALID_SIGNAL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_error_report_nvm (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_error_report_nvm {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_TYPE_LAST             ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_ID_ERROR_REPORT 0x45UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_ID_LAST        ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_ID_ERROR_REPORT</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA2_ERR_ADDR_MASK 0xffffffffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA2_ERR_ADDR_SFT 0</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_ERROR_TYPE_MASK     0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_ERROR_TYPE_SFT      0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_ERROR_TYPE_NVM_ERROR  0x3UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_ERROR_TYPE_LAST      ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_ERROR_TYPE_NVM_ERROR</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_NVM_ERR_TYPE_MASK   0xff00UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_NVM_ERR_TYPE_SFT    8</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_NVM_ERR_TYPE_WRITE    (0x1UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_NVM_ERR_TYPE_ERASE    (0x2UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_NVM_ERR_TYPE_LAST    ASYNC_EVENT_CMPL_ERROR_REPORT_NVM_EVENT_DATA1_NVM_ERR_TYPE_ERASE</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_error_report_doorbell_drop_threshold (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_error_report_doorbell_drop_threshold {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_TYPE_LAST             ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_EVENT_ID_ERROR_REPORT 0x45UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_EVENT_ID_LAST        ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_EVENT_ID_ERROR_REPORT</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_EVENT_DATA1_ERROR_TYPE_MASK                   0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_EVENT_DATA1_ERROR_TYPE_SFT                    0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_EVENT_DATA1_ERROR_TYPE_DOORBELL_DROP_THRESHOLD  0x4UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_EVENT_DATA1_ERROR_TYPE_LAST                    ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_EVENT_DATA1_ERROR_TYPE_DOORBELL_DROP_THRESHOLD</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_EVENT_DATA1_EPOCH_MASK                        0xffffff00UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DOORBELL_DROP_THRESHOLD_EVENT_DATA1_EPOCH_SFT                         8</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_error_report_thermal (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_error_report_thermal {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_TYPE_LAST             ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_ID_ERROR_REPORT 0x45UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_ID_LAST        ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_ID_ERROR_REPORT</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA2_CURRENT_TEMP_MASK  0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA2_CURRENT_TEMP_SFT   0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA2_THRESHOLD_TEMP_MASK 0xff00UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA2_THRESHOLD_TEMP_SFT 8</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_ERROR_TYPE_MASK          0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_ERROR_TYPE_SFT           0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_ERROR_TYPE_THERMAL_EVENT   0x5UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_ERROR_TYPE_LAST           ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_ERROR_TYPE_THERMAL_EVENT</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_THRESHOLD_TYPE_MASK      0x700UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_THRESHOLD_TYPE_SFT       8</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_THRESHOLD_TYPE_WARN        (0x0UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_THRESHOLD_TYPE_CRITICAL    (0x1UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_THRESHOLD_TYPE_FATAL       (0x2UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_THRESHOLD_TYPE_SHUTDOWN    (0x3UL &lt;&lt; 8)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_THRESHOLD_TYPE_LAST       ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_THRESHOLD_TYPE_SHUTDOWN</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_TRANSITION_DIR           0x800UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_TRANSITION_DIR_DECREASING  (0x0UL &lt;&lt; 11)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_TRANSITION_DIR_INCREASING  (0x1UL &lt;&lt; 11)</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_TRANSITION_DIR_LAST       ASYNC_EVENT_CMPL_ERROR_REPORT_THERMAL_EVENT_DATA1_TRANSITION_DIR_INCREASING</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_async_event_cmpl_error_report_dual_data_rate_not_supported (size:128b/16B) */</div><div class='del'>-struct hwrm_async_event_cmpl_error_report_dual_data_rate_not_supported {</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_TYPE_MASK            0x3fUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_TYPE_SFT             0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_TYPE_HWRM_ASYNC_EVENT  0x2eUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_TYPE_LAST             ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_TYPE_HWRM_ASYNC_EVENT</div><div class='del'>-	__le16	event_id;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_EVENT_ID_ERROR_REPORT 0x45UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_EVENT_ID_LAST        ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_EVENT_ID_ERROR_REPORT</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-	u8	opaque_v;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_V          0x1UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_OPAQUE_MASK 0xfeUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_OPAQUE_SFT 1</div><div class='del'>-	u8	timestamp_lo;</div><div class='del'>-	__le16	timestamp_hi;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_EVENT_DATA1_ERROR_TYPE_MASK                        0xffUL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_EVENT_DATA1_ERROR_TYPE_SFT                         0</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_EVENT_DATA1_ERROR_TYPE_DUAL_DATA_RATE_NOT_SUPPORTED  0x6UL</div><div class='del'>-	#define ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_EVENT_DATA1_ERROR_TYPE_LAST                         ASYNC_EVENT_CMPL_ERROR_REPORT_DUAL_DATA_RATE_NOT_SUPPORTED_EVENT_DATA1_ERROR_TYPE_DUAL_DATA_RATE_NOT_SUPPORTED</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_reset_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_reset_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_RESET_REQ_ENABLES_VF_ID_VALID     0x1UL</div><div class='del'>-	__le16	vf_id;</div><div class='del'>-	u8	func_reset_level;</div><div class='del'>-	#define FUNC_RESET_REQ_FUNC_RESET_LEVEL_RESETALL      0x0UL</div><div class='del'>-	#define FUNC_RESET_REQ_FUNC_RESET_LEVEL_RESETME       0x1UL</div><div class='del'>-	#define FUNC_RESET_REQ_FUNC_RESET_LEVEL_RESETCHILDREN 0x2UL</div><div class='del'>-	#define FUNC_RESET_REQ_FUNC_RESET_LEVEL_RESETVF       0x3UL</div><div class='del'>-	#define FUNC_RESET_REQ_FUNC_RESET_LEVEL_LAST         FUNC_RESET_REQ_FUNC_RESET_LEVEL_RESETVF</div><div class='del'>-	u8	unused_0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_reset_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_reset_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_getfid_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_getfid_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_GETFID_REQ_ENABLES_PCI_ID     0x1UL</div><div class='del'>-	__le16	pci_id;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_getfid_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_getfid_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_vf_alloc_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_vf_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_VF_ALLOC_REQ_ENABLES_FIRST_VF_ID     0x1UL</div><div class='del'>-	__le16	first_vf_id;</div><div class='del'>-	__le16	num_vfs;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_vf_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_vf_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	first_vf_id;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_vf_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_vf_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_VF_FREE_REQ_ENABLES_FIRST_VF_ID     0x1UL</div><div class='del'>-	__le16	first_vf_id;</div><div class='del'>-	__le16	num_vfs;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_vf_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_vf_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_vf_cfg_input (size:576b/72B) */</div><div class='del'>-struct hwrm_func_vf_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_MTU                      0x1UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_GUEST_VLAN               0x2UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_ASYNC_EVENT_CR           0x4UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_DFLT_MAC_ADDR            0x8UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS          0x10UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_CMPL_RINGS           0x20UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_TX_RINGS             0x40UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_RX_RINGS             0x80UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_L2_CTXS              0x100UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_VNICS                0x200UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_STAT_CTXS            0x400UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_HW_RING_GRPS         0x800UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_KTLS_TX_KEY_CTXS     0x1000UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_KTLS_RX_KEY_CTXS     0x2000UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_QUIC_TX_KEY_CTXS     0x4000UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_ENABLES_NUM_QUIC_RX_KEY_CTXS     0x8000UL</div><div class='del'>-	__le16	mtu;</div><div class='del'>-	__le16	guest_vlan;</div><div class='del'>-	__le16	async_event_cr;</div><div class='del'>-	u8	dflt_mac_addr[6];</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_VF_CFG_REQ_FLAGS_TX_ASSETS_TEST             0x1UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_FLAGS_RX_ASSETS_TEST             0x2UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_FLAGS_CMPL_ASSETS_TEST           0x4UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_FLAGS_RSSCOS_CTX_ASSETS_TEST     0x8UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_FLAGS_RING_GRP_ASSETS_TEST       0x10UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_FLAGS_STAT_CTX_ASSETS_TEST       0x20UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_FLAGS_VNIC_ASSETS_TEST           0x40UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_FLAGS_L2_CTX_ASSETS_TEST         0x80UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_FLAGS_PPP_PUSH_MODE_ENABLE       0x100UL</div><div class='del'>-	#define FUNC_VF_CFG_REQ_FLAGS_PPP_PUSH_MODE_DISABLE      0x200UL</div><div class='del'>-	__le16	num_rsscos_ctxs;</div><div class='del'>-	__le16	num_cmpl_rings;</div><div class='del'>-	__le16	num_tx_rings;</div><div class='del'>-	__le16	num_rx_rings;</div><div class='del'>-	__le16	num_l2_ctxs;</div><div class='del'>-	__le16	num_vnics;</div><div class='del'>-	__le16	num_stat_ctxs;</div><div class='del'>-	__le16	num_hw_ring_grps;</div><div class='del'>-	__le32	num_ktls_tx_key_ctxs;</div><div class='del'>-	__le32	num_ktls_rx_key_ctxs;</div><div class='del'>-	__le16	num_msix;</div><div class='del'>-	u8	unused[2];</div><div class='del'>-	__le32	num_quic_tx_key_ctxs;</div><div class='del'>-	__le32	num_quic_rx_key_ctxs;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_vf_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_vf_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_qcaps_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_qcaps_output (size:1152b/144B) */</div><div class='del'>-struct hwrm_func_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED                   0x1UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_GLOBAL_MSIX_AUTOMASKING               0x2UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_PTP_SUPPORTED                         0x4UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_ROCE_V1_SUPPORTED                     0x8UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_ROCE_V2_SUPPORTED                     0x10UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_WOL_MAGICPKT_SUPPORTED                0x20UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_WOL_BMP_SUPPORTED                     0x40UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_TX_RING_RL_SUPPORTED                  0x80UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_TX_BW_CFG_SUPPORTED                   0x100UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_VF_TX_RING_RL_SUPPORTED               0x200UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_VF_BW_CFG_SUPPORTED                   0x400UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_STD_TX_RING_MODE_SUPPORTED            0x800UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_GENEVE_TUN_FLAGS_SUPPORTED            0x1000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_NVGRE_TUN_FLAGS_SUPPORTED             0x2000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_GRE_TUN_FLAGS_SUPPORTED               0x4000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_MPLS_TUN_FLAGS_SUPPORTED              0x8000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_PCIE_STATS_SUPPORTED                  0x10000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_ADOPTED_PF_SUPPORTED                  0x20000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_ADMIN_PF_SUPPORTED                    0x40000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_LINK_ADMIN_STATUS_SUPPORTED           0x80000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_WCB_PUSH_MODE                         0x100000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_DYNAMIC_TX_RING_ALLOC                 0x200000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_HOT_RESET_CAPABLE                     0x400000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_ERROR_RECOVERY_CAPABLE                0x800000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_STATS_SUPPORTED                   0x1000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_ERR_RECOVER_RELOAD                    0x2000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_NOTIFY_VF_DEF_VNIC_CHNG_SUPPORTED     0x4000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_VLAN_ACCELERATION_TX_DISABLED         0x8000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_COREDUMP_CMD_SUPPORTED                0x10000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_CRASHDUMP_CMD_SUPPORTED               0x20000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_PFC_WD_STATS_SUPPORTED                0x40000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_DBG_QCAPS_CMD_SUPPORTED               0x80000000UL</div><div class='del'>-	u8	mac_address[6];</div><div class='del'>-	__le16	max_rsscos_ctx;</div><div class='del'>-	__le16	max_cmpl_rings;</div><div class='del'>-	__le16	max_tx_rings;</div><div class='del'>-	__le16	max_rx_rings;</div><div class='del'>-	__le16	max_l2_ctxs;</div><div class='del'>-	__le16	max_vnics;</div><div class='del'>-	__le16	first_vf_id;</div><div class='del'>-	__le16	max_vfs;</div><div class='del'>-	__le16	max_stat_ctx;</div><div class='del'>-	__le32	max_encap_records;</div><div class='del'>-	__le32	max_decap_records;</div><div class='del'>-	__le32	max_tx_em_flows;</div><div class='del'>-	__le32	max_tx_wm_flows;</div><div class='del'>-	__le32	max_rx_em_flows;</div><div class='del'>-	__le32	max_rx_wm_flows;</div><div class='del'>-	__le32	max_mcast_filters;</div><div class='del'>-	__le32	max_flow_id;</div><div class='del'>-	__le32	max_hw_ring_grps;</div><div class='del'>-	__le16	max_sp_tx_rings;</div><div class='del'>-	__le16	max_msix_vfs;</div><div class='del'>-	__le32	flags_ext;</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_ECN_MARK_SUPPORTED                          0x1UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_ECN_STATS_SUPPORTED                         0x2UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_EXT_HW_STATS_SUPPORTED                      0x4UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_HOT_RESET_IF_SUPPORT                        0x8UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_PROXY_MODE_SUPPORT                          0x10UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_TX_PROXY_SRC_INTF_OVERRIDE_SUPPORT          0x20UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_SCHQ_SUPPORTED                              0x40UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_PPP_PUSH_MODE_SUPPORTED                     0x80UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_EVB_MODE_CFG_NOT_SUPPORTED                  0x100UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_SOC_SPD_SUPPORTED                           0x200UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_FW_LIVEPATCH_SUPPORTED                      0x400UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_FAST_RESET_CAPABLE                          0x800UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_TX_METADATA_CFG_CAPABLE                     0x1000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_NVM_OPTION_ACTION_SUPPORTED                 0x2000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_BD_METADATA_SUPPORTED                       0x4000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_ECHO_REQUEST_SUPPORTED                      0x8000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_NPAR_1_2_SUPPORTED                          0x10000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_PTP_PTM_SUPPORTED                           0x20000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_PTP_PPS_SUPPORTED                           0x40000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_VF_CFG_ASYNC_FOR_PF_SUPPORTED               0x80000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_PARTITION_BW_SUPPORTED                      0x100000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_DFLT_VLAN_TPID_PCP_SUPPORTED                0x200000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_KTLS_SUPPORTED                              0x400000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_EP_RATE_CONTROL                             0x800000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_MIN_BW_SUPPORTED                            0x1000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_TX_COAL_CMPL_CAP                            0x2000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_BS_V2_SUPPORTED                             0x4000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_BS_V2_REQUIRED                              0x8000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_PTP_64BIT_RTC_SUPPORTED                     0x10000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_DBR_PACING_SUPPORTED                        0x20000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_HW_DBR_DROP_RECOV_SUPPORTED                 0x40000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT_DISABLE_CQ_OVERFLOW_DETECTION_SUPPORTED     0x80000000UL</div><div class='del'>-	u8	max_schqs;</div><div class='del'>-	u8	mpc_chnls_cap;</div><div class='del'>-	#define FUNC_QCAPS_RESP_MPC_CHNLS_CAP_TCE         0x1UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_MPC_CHNLS_CAP_RCE         0x2UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_MPC_CHNLS_CAP_TE_CFA      0x4UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_MPC_CHNLS_CAP_RE_CFA      0x8UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_MPC_CHNLS_CAP_PRIMATE     0x10UL</div><div class='del'>-	__le16	max_key_ctxs_alloc;</div><div class='del'>-	__le32	flags_ext2;</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_RX_ALL_PKTS_TIMESTAMPS_SUPPORTED      0x1UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_QUIC_SUPPORTED                        0x2UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_KDNET_SUPPORTED                       0x4UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_DBR_PACING_EXT_SUPPORTED              0x8UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_SW_DBR_DROP_RECOVERY_SUPPORTED        0x10UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_GENERIC_STATS_SUPPORTED               0x20UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_UDP_GSO_SUPPORTED                     0x40UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_SYNCE_SUPPORTED                       0x80UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_DBR_PACING_V0_SUPPORTED               0x100UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_TX_PKT_TS_CMPL_SUPPORTED              0x200UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_HW_LAG_SUPPORTED                      0x400UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_ON_CHIP_CTX_SUPPORTED                 0x800UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_STEERING_TAG_SUPPORTED                0x1000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_ENHANCED_VF_SCALE_SUPPORTED           0x2000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_KEY_XID_PARTITION_SUPPORTED           0x4000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_CONCURRENT_KTLS_QUIC_SUPPORTED        0x8000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_SCHQ_CROSS_TC_CAP_SUPPORTED           0x10000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_SCHQ_PER_TC_CAP_SUPPORTED             0x20000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_SCHQ_PER_TC_RESERVATION_SUPPORTED     0x40000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_DB_ERROR_STATS_SUPPORTED              0x80000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_ROCE_VF_RESOURCE_MGMT_SUPPORTED       0x100000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_UDCC_SUPPORTED                        0x200000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_TIMED_TX_SO_TXTIME_SUPPORTED          0x400000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_SW_MAX_RESOURCE_LIMITS_SUPPORTED      0x800000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_TF_INGRESS_NIC_FLOW_SUPPORTED         0x1000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_LPBK_STATS_SUPPORTED                  0x2000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_TF_EGRESS_NIC_FLOW_SUPPORTED          0x4000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_MULTI_LOSSLESS_QUEUES_SUPPORTED       0x8000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_PEER_MMAP_SUPPORTED                   0x10000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_TIMED_TX_PACING_SUPPORTED             0x20000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_VF_STAT_EJECTION_SUPPORTED            0x40000000UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT2_HOST_COREDUMP_SUPPORTED               0x80000000UL</div><div class='del'>-	__le16	tunnel_disable_flag;</div><div class='del'>-	#define FUNC_QCAPS_RESP_TUNNEL_DISABLE_FLAG_DISABLE_VXLAN      0x1UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_TUNNEL_DISABLE_FLAG_DISABLE_NGE        0x2UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_TUNNEL_DISABLE_FLAG_DISABLE_NVGRE      0x4UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_TUNNEL_DISABLE_FLAG_DISABLE_L2GRE      0x8UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_TUNNEL_DISABLE_FLAG_DISABLE_GRE        0x10UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_TUNNEL_DISABLE_FLAG_DISABLE_IPINIP     0x20UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_TUNNEL_DISABLE_FLAG_DISABLE_MPLS       0x40UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_TUNNEL_DISABLE_FLAG_DISABLE_PPPOE      0x80UL</div><div class='del'>-	__le16	xid_partition_cap;</div><div class='del'>-	#define FUNC_QCAPS_RESP_XID_PARTITION_CAP_TX_CK     0x1UL</div><div class='del'>-	#define FUNC_QCAPS_RESP_XID_PARTITION_CAP_RX_CK     0x2UL</div><div class='del'>-	u8	device_serial_number[8];</div><div class='del'>-	__le16	ctxs_per_partition;</div><div class='del'>-	__le16	max_tso_segs;</div><div class='del'>-	__le32	roce_vf_max_av;</div><div class='del'>-	__le32	roce_vf_max_cq;</div><div class='del'>-	__le32	roce_vf_max_mrw;</div><div class='del'>-	__le32	roce_vf_max_qp;</div><div class='del'>-	__le32	roce_vf_max_srq;</div><div class='del'>-	__le32	roce_vf_max_gid;</div><div class='del'>-	__le32	flags_ext3;</div><div class='del'>-	#define FUNC_QCAPS_RESP_FLAGS_EXT3_RM_RSV_WHILE_ALLOC_CAP     0x1UL</div><div class='del'>-	u8	unused_3[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_qcfg_output (size:1280b/160B) */</div><div class='del'>-struct hwrm_func_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	__le16	vlan;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_OOB_WOL_MAGICPKT_ENABLED     0x1UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_OOB_WOL_BMP_ENABLED          0x2UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_FW_DCBX_AGENT_ENABLED        0x4UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_STD_TX_RING_MODE_ENABLED     0x8UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_FW_LLDP_AGENT_ENABLED        0x10UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_MULTI_HOST                   0x20UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_TRUSTED_VF                   0x40UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_SECURE_MODE_ENABLED          0x80UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_PREBOOT_LEGACY_L2_RINGS      0x100UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_HOT_RESET_ALLOWED            0x200UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_PPP_PUSH_MODE_ENABLED        0x400UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_RING_MONITOR_ENABLED         0x800UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_FAST_RESET_ALLOWED           0x1000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_MULTI_ROOT                   0x2000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_ENABLE_RDMA_SRIOV            0x4000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS_ROCE_VNIC_ID_VALID           0x8000UL</div><div class='del'>-	u8	mac_address[6];</div><div class='del'>-	__le16	pci_id;</div><div class='del'>-	__le16	alloc_rsscos_ctx;</div><div class='del'>-	__le16	alloc_cmpl_rings;</div><div class='del'>-	__le16	alloc_tx_rings;</div><div class='del'>-	__le16	alloc_rx_rings;</div><div class='del'>-	__le16	alloc_l2_ctx;</div><div class='del'>-	__le16	alloc_vnics;</div><div class='del'>-	__le16	admin_mtu;</div><div class='del'>-	__le16	mru;</div><div class='del'>-	__le16	stat_ctx_id;</div><div class='del'>-	u8	port_partition_type;</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_PARTITION_TYPE_SPF     0x0UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_PARTITION_TYPE_MPFS    0x1UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_0 0x2UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_5 0x3UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR2_0 0x4UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_PARTITION_TYPE_NPAR1_2 0x5UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_PARTITION_TYPE_UNKNOWN 0xffUL</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_PARTITION_TYPE_LAST   FUNC_QCFG_RESP_PORT_PARTITION_TYPE_UNKNOWN</div><div class='del'>-	u8	port_pf_cnt;</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_PF_CNT_UNAVAIL 0x0UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_PF_CNT_LAST   FUNC_QCFG_RESP_PORT_PF_CNT_UNAVAIL</div><div class='del'>-	__le16	dflt_vnic_id;</div><div class='del'>-	__le16	max_mtu_configured;</div><div class='del'>-	__le32	min_bw;</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_SCALE_LAST                 FUNC_QCFG_RESP_MIN_BW_SCALE_BYTES</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MIN_BW_BW_VALUE_UNIT_LAST         FUNC_QCFG_RESP_MIN_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-	__le32	max_bw;</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_SCALE_LAST                 FUNC_QCFG_RESP_MAX_BW_SCALE_BYTES</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_MAX_BW_BW_VALUE_UNIT_LAST         FUNC_QCFG_RESP_MAX_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-	u8	evb_mode;</div><div class='del'>-	#define FUNC_QCFG_RESP_EVB_MODE_NO_EVB 0x0UL</div><div class='del'>-	#define FUNC_QCFG_RESP_EVB_MODE_VEB    0x1UL</div><div class='del'>-	#define FUNC_QCFG_RESP_EVB_MODE_VEPA   0x2UL</div><div class='del'>-	#define FUNC_QCFG_RESP_EVB_MODE_LAST  FUNC_QCFG_RESP_EVB_MODE_VEPA</div><div class='del'>-	u8	options;</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_CACHE_LINESIZE_MASK         0x3UL</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_CACHE_LINESIZE_SFT          0</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_CACHE_LINESIZE_SIZE_64        0x0UL</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_CACHE_LINESIZE_SIZE_128       0x1UL</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_CACHE_LINESIZE_LAST          FUNC_QCFG_RESP_OPTIONS_CACHE_LINESIZE_SIZE_128</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_LINK_ADMIN_STATE_MASK       0xcUL</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_LINK_ADMIN_STATE_SFT        2</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_LINK_ADMIN_STATE_FORCED_DOWN  (0x0UL &lt;&lt; 2)</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_LINK_ADMIN_STATE_FORCED_UP    (0x1UL &lt;&lt; 2)</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_LINK_ADMIN_STATE_AUTO         (0x2UL &lt;&lt; 2)</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_LINK_ADMIN_STATE_LAST        FUNC_QCFG_RESP_OPTIONS_LINK_ADMIN_STATE_AUTO</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_RSVD_MASK                   0xf0UL</div><div class='del'>-	#define FUNC_QCFG_RESP_OPTIONS_RSVD_SFT                    4</div><div class='del'>-	__le16	alloc_vfs;</div><div class='del'>-	__le32	alloc_mcast_filters;</div><div class='del'>-	__le32	alloc_hw_ring_grps;</div><div class='del'>-	__le16	alloc_sp_tx_rings;</div><div class='del'>-	__le16	alloc_stat_ctx;</div><div class='del'>-	__le16	alloc_msix;</div><div class='del'>-	__le16	registered_vfs;</div><div class='del'>-	__le16	l2_doorbell_bar_size_kb;</div><div class='del'>-	u8	active_endpoints;</div><div class='del'>-	u8	always_1;</div><div class='del'>-	__le32	reset_addr_poll;</div><div class='del'>-	__le16	legacy_l2_db_size_kb;</div><div class='del'>-	__le16	svif_info;</div><div class='del'>-	#define FUNC_QCFG_RESP_SVIF_INFO_SVIF_MASK      0x7fffUL</div><div class='del'>-	#define FUNC_QCFG_RESP_SVIF_INFO_SVIF_SFT       0</div><div class='del'>-	#define FUNC_QCFG_RESP_SVIF_INFO_SVIF_VALID     0x8000UL</div><div class='del'>-	u8	mpc_chnls;</div><div class='del'>-	#define FUNC_QCFG_RESP_MPC_CHNLS_TCE_ENABLED         0x1UL</div><div class='del'>-	#define FUNC_QCFG_RESP_MPC_CHNLS_RCE_ENABLED         0x2UL</div><div class='del'>-	#define FUNC_QCFG_RESP_MPC_CHNLS_TE_CFA_ENABLED      0x4UL</div><div class='del'>-	#define FUNC_QCFG_RESP_MPC_CHNLS_RE_CFA_ENABLED      0x8UL</div><div class='del'>-	#define FUNC_QCFG_RESP_MPC_CHNLS_PRIMATE_ENABLED     0x10UL</div><div class='del'>-	u8	db_page_size;</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_4KB   0x0UL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_8KB   0x1UL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_16KB  0x2UL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_32KB  0x3UL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_64KB  0x4UL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_128KB 0x5UL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_256KB 0x6UL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_512KB 0x7UL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_1MB   0x8UL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_2MB   0x9UL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_4MB   0xaUL</div><div class='del'>-	#define FUNC_QCFG_RESP_DB_PAGE_SIZE_LAST FUNC_QCFG_RESP_DB_PAGE_SIZE_4MB</div><div class='del'>-	__le16	roce_vnic_id;</div><div class='del'>-	__le32	partition_min_bw;</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MIN_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MIN_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MIN_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MIN_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MIN_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MIN_BW_SCALE_LAST                 FUNC_QCFG_RESP_PARTITION_MIN_BW_SCALE_BYTES</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MIN_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MIN_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MIN_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MIN_BW_BW_VALUE_UNIT_LAST         FUNC_QCFG_RESP_PARTITION_MIN_BW_BW_VALUE_UNIT_PERCENT1_100</div><div class='del'>-	__le32	partition_max_bw;</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MAX_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MAX_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MAX_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MAX_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MAX_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MAX_BW_SCALE_LAST                 FUNC_QCFG_RESP_PARTITION_MAX_BW_SCALE_BYTES</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MAX_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MAX_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MAX_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_QCFG_RESP_PARTITION_MAX_BW_BW_VALUE_UNIT_LAST         FUNC_QCFG_RESP_PARTITION_MAX_BW_BW_VALUE_UNIT_PERCENT1_100</div><div class='del'>-	__le16	host_mtu;</div><div class='del'>-	__le16	flags2;</div><div class='del'>-	#define FUNC_QCFG_RESP_FLAGS2_SRIOV_DSCP_INSERT_ENABLED     0x1UL</div><div class='del'>-	u8	unused_4[2];</div><div class='del'>-	u8	port_kdnet_mode;</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_KDNET_MODE_DISABLED 0x0UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_KDNET_MODE_ENABLED  0x1UL</div><div class='del'>-	#define FUNC_QCFG_RESP_PORT_KDNET_MODE_LAST    FUNC_QCFG_RESP_PORT_KDNET_MODE_ENABLED</div><div class='del'>-	u8	kdnet_pcie_function;</div><div class='del'>-	__le16	port_kdnet_fid;</div><div class='del'>-	u8	unused_5[2];</div><div class='del'>-	__le32	num_ktls_tx_key_ctxs;</div><div class='del'>-	__le32	num_ktls_rx_key_ctxs;</div><div class='del'>-	u8	lag_id;</div><div class='del'>-	u8	parif;</div><div class='del'>-	u8	fw_lag_id;</div><div class='del'>-	u8	unused_6;</div><div class='del'>-	__le32	num_quic_tx_key_ctxs;</div><div class='del'>-	__le32	num_quic_rx_key_ctxs;</div><div class='del'>-	__le32	roce_max_av_per_vf;</div><div class='del'>-	__le32	roce_max_cq_per_vf;</div><div class='del'>-	__le32	roce_max_mrw_per_vf;</div><div class='del'>-	__le32	roce_max_qp_per_vf;</div><div class='del'>-	__le32	roce_max_srq_per_vf;</div><div class='del'>-	__le32	roce_max_gid_per_vf;</div><div class='del'>-	__le16	xid_partition_cfg;</div><div class='del'>-	#define FUNC_QCFG_RESP_XID_PARTITION_CFG_TX_CK     0x1UL</div><div class='del'>-	#define FUNC_QCFG_RESP_XID_PARTITION_CFG_RX_CK     0x2UL</div><div class='del'>-	u8	unused_7;</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_cfg_input (size:1280b/160B) */</div><div class='del'>-struct hwrm_func_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	__le16	num_msix;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE     0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE      0x2UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_RSVD_MASK                      0x1fcUL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_RSVD_SFT                       2</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_STD_TX_RING_MODE_ENABLE        0x200UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_STD_TX_RING_MODE_DISABLE       0x400UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_VIRT_MAC_PERSIST               0x800UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_NO_AUTOCLEAR_STATISTIC         0x1000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_TX_ASSETS_TEST                 0x2000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_RX_ASSETS_TEST                 0x4000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_CMPL_ASSETS_TEST               0x8000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_RSSCOS_CTX_ASSETS_TEST         0x10000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_RING_GRP_ASSETS_TEST           0x20000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_STAT_CTX_ASSETS_TEST           0x40000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_VNIC_ASSETS_TEST               0x80000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_L2_CTX_ASSETS_TEST             0x100000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_TRUSTED_VF_ENABLE              0x200000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_DYNAMIC_TX_RING_ALLOC          0x400000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_NQ_ASSETS_TEST                 0x800000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_TRUSTED_VF_DISABLE             0x1000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_PREBOOT_LEGACY_L2_RINGS        0x2000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_HOT_RESET_IF_EN_DIS            0x4000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_PPP_PUSH_MODE_ENABLE           0x8000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_PPP_PUSH_MODE_DISABLE          0x10000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_BD_METADATA_ENABLE             0x20000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS_BD_METADATA_DISABLE            0x40000000UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_ADMIN_MTU                0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_MRU                      0x2UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_NUM_RSSCOS_CTXS          0x4UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_NUM_CMPL_RINGS           0x8UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_NUM_TX_RINGS             0x10UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_NUM_RX_RINGS             0x20UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_NUM_L2_CTXS              0x40UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_NUM_VNICS                0x80UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_NUM_STAT_CTXS            0x100UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_DFLT_MAC_ADDR            0x200UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_DFLT_VLAN                0x400UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_DFLT_IP_ADDR             0x800UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_MIN_BW                   0x1000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_MAX_BW                   0x2000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_ASYNC_EVENT_CR           0x4000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_VLAN_ANTISPOOF_MODE      0x8000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_ALLOWED_VLAN_PRIS        0x10000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_EVB_MODE                 0x20000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_NUM_MCAST_FILTERS        0x40000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS         0x80000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_CACHE_LINESIZE           0x100000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_NUM_MSIX                 0x200000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_ADMIN_LINK_STATE         0x400000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_HOT_RESET_IF_SUPPORT     0x800000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_SCHQ_ID                  0x1000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_MPC_CHNLS                0x2000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_PARTITION_MIN_BW         0x4000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_PARTITION_MAX_BW         0x8000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_TPID                     0x10000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_HOST_MTU                 0x20000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_KTLS_TX_KEY_CTXS         0x40000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES_KTLS_RX_KEY_CTXS         0x80000000UL</div><div class='del'>-	__le16	admin_mtu;</div><div class='del'>-	__le16	mru;</div><div class='del'>-	__le16	num_rsscos_ctxs;</div><div class='del'>-	__le16	num_cmpl_rings;</div><div class='del'>-	__le16	num_tx_rings;</div><div class='del'>-	__le16	num_rx_rings;</div><div class='del'>-	__le16	num_l2_ctxs;</div><div class='del'>-	__le16	num_vnics;</div><div class='del'>-	__le16	num_stat_ctxs;</div><div class='del'>-	__le16	num_hw_ring_grps;</div><div class='del'>-	u8	dflt_mac_addr[6];</div><div class='del'>-	__le16	dflt_vlan;</div><div class='del'>-	__be32	dflt_ip_addr[4];</div><div class='del'>-	__le32	min_bw;</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_SCALE_LAST                 FUNC_CFG_REQ_MIN_BW_SCALE_BYTES</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MIN_BW_BW_VALUE_UNIT_LAST         FUNC_CFG_REQ_MIN_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-	__le32	max_bw;</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_SCALE_LAST                 FUNC_CFG_REQ_MAX_BW_SCALE_BYTES</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_MAX_BW_BW_VALUE_UNIT_LAST         FUNC_CFG_REQ_MAX_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-	__le16	async_event_cr;</div><div class='del'>-	u8	vlan_antispoof_mode;</div><div class='del'>-	#define FUNC_CFG_REQ_VLAN_ANTISPOOF_MODE_NOCHECK                 0x0UL</div><div class='del'>-	#define FUNC_CFG_REQ_VLAN_ANTISPOOF_MODE_VALIDATE_VLAN           0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_VLAN_ANTISPOOF_MODE_INSERT_IF_VLANDNE       0x2UL</div><div class='del'>-	#define FUNC_CFG_REQ_VLAN_ANTISPOOF_MODE_INSERT_OR_OVERRIDE_VLAN 0x3UL</div><div class='del'>-	#define FUNC_CFG_REQ_VLAN_ANTISPOOF_MODE_LAST                   FUNC_CFG_REQ_VLAN_ANTISPOOF_MODE_INSERT_OR_OVERRIDE_VLAN</div><div class='del'>-	u8	allowed_vlan_pris;</div><div class='del'>-	u8	evb_mode;</div><div class='del'>-	#define FUNC_CFG_REQ_EVB_MODE_NO_EVB 0x0UL</div><div class='del'>-	#define FUNC_CFG_REQ_EVB_MODE_VEB    0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_EVB_MODE_VEPA   0x2UL</div><div class='del'>-	#define FUNC_CFG_REQ_EVB_MODE_LAST  FUNC_CFG_REQ_EVB_MODE_VEPA</div><div class='del'>-	u8	options;</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_MASK         0x3UL</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_SFT          0</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_SIZE_64        0x0UL</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_SIZE_128       0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_LAST          FUNC_CFG_REQ_OPTIONS_CACHE_LINESIZE_SIZE_128</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_MASK       0xcUL</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_SFT        2</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_FORCED_DOWN  (0x0UL &lt;&lt; 2)</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_FORCED_UP    (0x1UL &lt;&lt; 2)</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_AUTO         (0x2UL &lt;&lt; 2)</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_LAST        FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_AUTO</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_RSVD_MASK                   0xf0UL</div><div class='del'>-	#define FUNC_CFG_REQ_OPTIONS_RSVD_SFT                    4</div><div class='del'>-	__le16	num_mcast_filters;</div><div class='del'>-	__le16	schq_id;</div><div class='del'>-	__le16	mpc_chnls;</div><div class='del'>-	#define FUNC_CFG_REQ_MPC_CHNLS_TCE_ENABLE          0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_MPC_CHNLS_TCE_DISABLE         0x2UL</div><div class='del'>-	#define FUNC_CFG_REQ_MPC_CHNLS_RCE_ENABLE          0x4UL</div><div class='del'>-	#define FUNC_CFG_REQ_MPC_CHNLS_RCE_DISABLE         0x8UL</div><div class='del'>-	#define FUNC_CFG_REQ_MPC_CHNLS_TE_CFA_ENABLE       0x10UL</div><div class='del'>-	#define FUNC_CFG_REQ_MPC_CHNLS_TE_CFA_DISABLE      0x20UL</div><div class='del'>-	#define FUNC_CFG_REQ_MPC_CHNLS_RE_CFA_ENABLE       0x40UL</div><div class='del'>-	#define FUNC_CFG_REQ_MPC_CHNLS_RE_CFA_DISABLE      0x80UL</div><div class='del'>-	#define FUNC_CFG_REQ_MPC_CHNLS_PRIMATE_ENABLE      0x100UL</div><div class='del'>-	#define FUNC_CFG_REQ_MPC_CHNLS_PRIMATE_DISABLE     0x200UL</div><div class='del'>-	__le32	partition_min_bw;</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MIN_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MIN_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MIN_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MIN_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MIN_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MIN_BW_SCALE_LAST                 FUNC_CFG_REQ_PARTITION_MIN_BW_SCALE_BYTES</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MIN_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MIN_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MIN_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MIN_BW_BW_VALUE_UNIT_LAST         FUNC_CFG_REQ_PARTITION_MIN_BW_BW_VALUE_UNIT_PERCENT1_100</div><div class='del'>-	__le32	partition_max_bw;</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MAX_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MAX_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MAX_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MAX_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MAX_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MAX_BW_SCALE_LAST                 FUNC_CFG_REQ_PARTITION_MAX_BW_SCALE_BYTES</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MAX_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MAX_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MAX_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define FUNC_CFG_REQ_PARTITION_MAX_BW_BW_VALUE_UNIT_LAST         FUNC_CFG_REQ_PARTITION_MAX_BW_BW_VALUE_UNIT_PERCENT1_100</div><div class='del'>-	__be16	tpid;</div><div class='del'>-	__le16	host_mtu;</div><div class='del'>-	__le32	flags2;</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS2_KTLS_KEY_CTX_ASSETS_TEST     0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_FLAGS2_QUIC_KEY_CTX_ASSETS_TEST     0x2UL</div><div class='del'>-	__le32	enables2;</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_KDNET                   0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_DB_PAGE_SIZE            0x2UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_QUIC_TX_KEY_CTXS        0x4UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_QUIC_RX_KEY_CTXS        0x8UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_ROCE_MAX_AV_PER_VF      0x10UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_ROCE_MAX_CQ_PER_VF      0x20UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_ROCE_MAX_MRW_PER_VF     0x40UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_ROCE_MAX_QP_PER_VF      0x80UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_ROCE_MAX_SRQ_PER_VF     0x100UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_ROCE_MAX_GID_PER_VF     0x200UL</div><div class='del'>-	#define FUNC_CFG_REQ_ENABLES2_XID_PARTITION_CFG       0x400UL</div><div class='del'>-	u8	port_kdnet_mode;</div><div class='del'>-	#define FUNC_CFG_REQ_PORT_KDNET_MODE_DISABLED 0x0UL</div><div class='del'>-	#define FUNC_CFG_REQ_PORT_KDNET_MODE_ENABLED  0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_PORT_KDNET_MODE_LAST    FUNC_CFG_REQ_PORT_KDNET_MODE_ENABLED</div><div class='del'>-	u8	db_page_size;</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_4KB   0x0UL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_8KB   0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_16KB  0x2UL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_32KB  0x3UL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_64KB  0x4UL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_128KB 0x5UL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_256KB 0x6UL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_512KB 0x7UL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_1MB   0x8UL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_2MB   0x9UL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_4MB   0xaUL</div><div class='del'>-	#define FUNC_CFG_REQ_DB_PAGE_SIZE_LAST FUNC_CFG_REQ_DB_PAGE_SIZE_4MB</div><div class='del'>-	u8	unused_1[2];</div><div class='del'>-	__le32	num_ktls_tx_key_ctxs;</div><div class='del'>-	__le32	num_ktls_rx_key_ctxs;</div><div class='del'>-	__le32	num_quic_tx_key_ctxs;</div><div class='del'>-	__le32	num_quic_rx_key_ctxs;</div><div class='del'>-	__le32	roce_max_av_per_vf;</div><div class='del'>-	__le32	roce_max_cq_per_vf;</div><div class='del'>-	__le32	roce_max_mrw_per_vf;</div><div class='del'>-	__le32	roce_max_qp_per_vf;</div><div class='del'>-	__le32	roce_max_srq_per_vf;</div><div class='del'>-	__le32	roce_max_gid_per_vf;</div><div class='del'>-	__le16	xid_partition_cfg;</div><div class='del'>-	#define FUNC_CFG_REQ_XID_PARTITION_CFG_TX_CK     0x1UL</div><div class='del'>-	#define FUNC_CFG_REQ_XID_PARTITION_CFG_RX_CK     0x2UL</div><div class='del'>-	__le16	unused_2;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_cfg_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_func_cfg_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define FUNC_CFG_CMD_ERR_CODE_UNKNOWN                      0x0UL</div><div class='del'>-	#define FUNC_CFG_CMD_ERR_CODE_PARTITION_MIN_BW_RANGE       0x1UL</div><div class='del'>-	#define FUNC_CFG_CMD_ERR_CODE_PARTITION_MIN_MORE_THAN_MAX  0x2UL</div><div class='del'>-	#define FUNC_CFG_CMD_ERR_CODE_PARTITION_MIN_BW_UNSUPPORTED 0x3UL</div><div class='del'>-	#define FUNC_CFG_CMD_ERR_CODE_PARTITION_BW_PERCENT         0x4UL</div><div class='del'>-	#define FUNC_CFG_CMD_ERR_CODE_LAST                        FUNC_CFG_CMD_ERR_CODE_PARTITION_BW_PERCENT</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_qstats_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_qstats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define FUNC_QSTATS_REQ_FLAGS_ROCE_ONLY        0x1UL</div><div class='del'>-	#define FUNC_QSTATS_REQ_FLAGS_COUNTER_MASK     0x2UL</div><div class='del'>-	#define FUNC_QSTATS_REQ_FLAGS_L2_ONLY          0x4UL</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_qstats_output (size:1408b/176B) */</div><div class='del'>-struct hwrm_func_qstats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	tx_ucast_pkts;</div><div class='del'>-	__le64	tx_mcast_pkts;</div><div class='del'>-	__le64	tx_bcast_pkts;</div><div class='del'>-	__le64	tx_discard_pkts;</div><div class='del'>-	__le64	tx_drop_pkts;</div><div class='del'>-	__le64	tx_ucast_bytes;</div><div class='del'>-	__le64	tx_mcast_bytes;</div><div class='del'>-	__le64	tx_bcast_bytes;</div><div class='del'>-	__le64	rx_ucast_pkts;</div><div class='del'>-	__le64	rx_mcast_pkts;</div><div class='del'>-	__le64	rx_bcast_pkts;</div><div class='del'>-	__le64	rx_discard_pkts;</div><div class='del'>-	__le64	rx_drop_pkts;</div><div class='del'>-	__le64	rx_ucast_bytes;</div><div class='del'>-	__le64	rx_mcast_bytes;</div><div class='del'>-	__le64	rx_bcast_bytes;</div><div class='del'>-	__le64	rx_agg_pkts;</div><div class='del'>-	__le64	rx_agg_bytes;</div><div class='del'>-	__le64	rx_agg_events;</div><div class='del'>-	__le64	rx_agg_aborts;</div><div class='del'>-	u8	clear_seq;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_qstats_ext_input (size:256b/32B) */</div><div class='del'>-struct hwrm_func_qstats_ext_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define FUNC_QSTATS_EXT_REQ_FLAGS_ROCE_ONLY        0x1UL</div><div class='del'>-	#define FUNC_QSTATS_EXT_REQ_FLAGS_COUNTER_MASK     0x2UL</div><div class='del'>-	u8	unused_0[1];</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_QSTATS_EXT_REQ_ENABLES_SCHQ_ID     0x1UL</div><div class='del'>-	__le16	schq_id;</div><div class='del'>-	__le16	traffic_class;</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_qstats_ext_output (size:1536b/192B) */</div><div class='del'>-struct hwrm_func_qstats_ext_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	rx_ucast_pkts;</div><div class='del'>-	__le64	rx_mcast_pkts;</div><div class='del'>-	__le64	rx_bcast_pkts;</div><div class='del'>-	__le64	rx_discard_pkts;</div><div class='del'>-	__le64	rx_error_pkts;</div><div class='del'>-	__le64	rx_ucast_bytes;</div><div class='del'>-	__le64	rx_mcast_bytes;</div><div class='del'>-	__le64	rx_bcast_bytes;</div><div class='del'>-	__le64	tx_ucast_pkts;</div><div class='del'>-	__le64	tx_mcast_pkts;</div><div class='del'>-	__le64	tx_bcast_pkts;</div><div class='del'>-	__le64	tx_error_pkts;</div><div class='del'>-	__le64	tx_discard_pkts;</div><div class='del'>-	__le64	tx_ucast_bytes;</div><div class='del'>-	__le64	tx_mcast_bytes;</div><div class='del'>-	__le64	tx_bcast_bytes;</div><div class='del'>-	__le64	rx_tpa_eligible_pkt;</div><div class='del'>-	__le64	rx_tpa_eligible_bytes;</div><div class='del'>-	__le64	rx_tpa_pkt;</div><div class='del'>-	__le64	rx_tpa_bytes;</div><div class='del'>-	__le64	rx_tpa_errors;</div><div class='del'>-	__le64	rx_tpa_events;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_clr_stats_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_clr_stats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_clr_stats_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_clr_stats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_vf_resc_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_vf_resc_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	vf_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_vf_resc_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_vf_resc_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_drv_rgtr_input (size:896b/112B) */</div><div class='del'>-struct hwrm_func_drv_rgtr_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_FWD_ALL_MODE                     0x1UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_FWD_NONE_MODE                    0x2UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_16BIT_VER_MODE                   0x4UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_FLOW_HANDLE_64BIT_MODE           0x8UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_HOT_RESET_SUPPORT                0x10UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_ERROR_RECOVERY_SUPPORT           0x20UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_MASTER_SUPPORT                   0x40UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_FAST_RESET_SUPPORT               0x80UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_RSS_STRICT_HASH_TYPE_SUPPORT     0x100UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_NPAR_1_2_SUPPORT                 0x200UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_ASYM_QUEUE_CFG_SUPPORT           0x400UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_TF_INGRESS_NIC_FLOW_MODE         0x800UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_FLAGS_TF_EGRESS_NIC_FLOW_MODE          0x1000UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_ENABLES_OS_TYPE             0x1UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_ENABLES_VER                 0x2UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_ENABLES_TIMESTAMP           0x4UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_ENABLES_VF_REQ_FWD          0x8UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_ENABLES_ASYNC_EVENT_FWD     0x10UL</div><div class='del'>-	__le16	os_type;</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_UNKNOWN   0x0UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_OTHER     0x1UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_MSDOS     0xeUL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_WINDOWS   0x12UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_SOLARIS   0x1dUL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_LINUX     0x24UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_FREEBSD   0x2aUL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_ESXI      0x68UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_WIN864    0x73UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_WIN2012R2 0x74UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_UEFI      0x8000UL</div><div class='del'>-	#define FUNC_DRV_RGTR_REQ_OS_TYPE_LAST     FUNC_DRV_RGTR_REQ_OS_TYPE_UEFI</div><div class='del'>-	u8	ver_maj_8b;</div><div class='del'>-	u8	ver_min_8b;</div><div class='del'>-	u8	ver_upd_8b;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	__le32	timestamp;</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-	__le32	vf_req_fwd[8];</div><div class='del'>-	__le32	async_event_fwd[8];</div><div class='del'>-	__le16	ver_maj;</div><div class='del'>-	__le16	ver_min;</div><div class='del'>-	__le16	ver_upd;</div><div class='del'>-	__le16	ver_patch;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_drv_rgtr_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_drv_rgtr_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_DRV_RGTR_RESP_FLAGS_IF_CHANGE_SUPPORTED     0x1UL</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_drv_unrgtr_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_drv_unrgtr_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_DRV_UNRGTR_REQ_FLAGS_PREPARE_FOR_SHUTDOWN     0x1UL</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_drv_unrgtr_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_drv_unrgtr_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_buf_rgtr_input (size:1024b/128B) */</div><div class='del'>-struct hwrm_func_buf_rgtr_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_BUF_RGTR_REQ_ENABLES_VF_ID            0x1UL</div><div class='del'>-	#define FUNC_BUF_RGTR_REQ_ENABLES_ERR_BUF_ADDR     0x2UL</div><div class='del'>-	__le16	vf_id;</div><div class='del'>-	__le16	req_buf_num_pages;</div><div class='del'>-	__le16	req_buf_page_size;</div><div class='del'>-	#define FUNC_BUF_RGTR_REQ_REQ_BUF_PAGE_SIZE_16B 0x4UL</div><div class='del'>-	#define FUNC_BUF_RGTR_REQ_REQ_BUF_PAGE_SIZE_4K  0xcUL</div><div class='del'>-	#define FUNC_BUF_RGTR_REQ_REQ_BUF_PAGE_SIZE_8K  0xdUL</div><div class='del'>-	#define FUNC_BUF_RGTR_REQ_REQ_BUF_PAGE_SIZE_64K 0x10UL</div><div class='del'>-	#define FUNC_BUF_RGTR_REQ_REQ_BUF_PAGE_SIZE_2M  0x15UL</div><div class='del'>-	#define FUNC_BUF_RGTR_REQ_REQ_BUF_PAGE_SIZE_4M  0x16UL</div><div class='del'>-	#define FUNC_BUF_RGTR_REQ_REQ_BUF_PAGE_SIZE_1G  0x1eUL</div><div class='del'>-	#define FUNC_BUF_RGTR_REQ_REQ_BUF_PAGE_SIZE_LAST FUNC_BUF_RGTR_REQ_REQ_BUF_PAGE_SIZE_1G</div><div class='del'>-	__le16	req_buf_len;</div><div class='del'>-	__le16	resp_buf_len;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	__le64	req_buf_page_addr0;</div><div class='del'>-	__le64	req_buf_page_addr1;</div><div class='del'>-	__le64	req_buf_page_addr2;</div><div class='del'>-	__le64	req_buf_page_addr3;</div><div class='del'>-	__le64	req_buf_page_addr4;</div><div class='del'>-	__le64	req_buf_page_addr5;</div><div class='del'>-	__le64	req_buf_page_addr6;</div><div class='del'>-	__le64	req_buf_page_addr7;</div><div class='del'>-	__le64	req_buf_page_addr8;</div><div class='del'>-	__le64	req_buf_page_addr9;</div><div class='del'>-	__le64	error_buf_addr;</div><div class='del'>-	__le64	resp_buf_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_buf_rgtr_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_buf_rgtr_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_drv_qver_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_drv_qver_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	reserved;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	driver_type;</div><div class='del'>-	#define FUNC_DRV_QVER_REQ_DRIVER_TYPE_L2   0x0UL</div><div class='del'>-	#define FUNC_DRV_QVER_REQ_DRIVER_TYPE_ROCE 0x1UL</div><div class='del'>-	#define FUNC_DRV_QVER_REQ_DRIVER_TYPE_LAST FUNC_DRV_QVER_REQ_DRIVER_TYPE_ROCE</div><div class='del'>-	u8	unused_0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_drv_qver_output (size:256b/32B) */</div><div class='del'>-struct hwrm_func_drv_qver_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	os_type;</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_UNKNOWN   0x0UL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_OTHER     0x1UL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_MSDOS     0xeUL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_WINDOWS   0x12UL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_SOLARIS   0x1dUL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_LINUX     0x24UL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_FREEBSD   0x2aUL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_ESXI      0x68UL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_WIN864    0x73UL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_WIN2012R2 0x74UL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_UEFI      0x8000UL</div><div class='del'>-	#define FUNC_DRV_QVER_RESP_OS_TYPE_LAST     FUNC_DRV_QVER_RESP_OS_TYPE_UEFI</div><div class='del'>-	u8	ver_maj_8b;</div><div class='del'>-	u8	ver_min_8b;</div><div class='del'>-	u8	ver_upd_8b;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	__le16	ver_maj;</div><div class='del'>-	__le16	ver_min;</div><div class='del'>-	__le16	ver_upd;</div><div class='del'>-	__le16	ver_patch;</div><div class='del'>-	u8	unused_1[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_resource_qcaps_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_resource_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_resource_qcaps_output (size:704b/88B) */</div><div class='del'>-struct hwrm_func_resource_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	max_vfs;</div><div class='del'>-	__le16	max_msix;</div><div class='del'>-	__le16	vf_reservation_strategy;</div><div class='del'>-	#define FUNC_RESOURCE_QCAPS_RESP_VF_RESERVATION_STRATEGY_MAXIMAL        0x0UL</div><div class='del'>-	#define FUNC_RESOURCE_QCAPS_RESP_VF_RESERVATION_STRATEGY_MINIMAL        0x1UL</div><div class='del'>-	#define FUNC_RESOURCE_QCAPS_RESP_VF_RESERVATION_STRATEGY_MINIMAL_STATIC 0x2UL</div><div class='del'>-	#define FUNC_RESOURCE_QCAPS_RESP_VF_RESERVATION_STRATEGY_LAST          FUNC_RESOURCE_QCAPS_RESP_VF_RESERVATION_STRATEGY_MINIMAL_STATIC</div><div class='del'>-	__le16	min_rsscos_ctx;</div><div class='del'>-	__le16	max_rsscos_ctx;</div><div class='del'>-	__le16	min_cmpl_rings;</div><div class='del'>-	__le16	max_cmpl_rings;</div><div class='del'>-	__le16	min_tx_rings;</div><div class='del'>-	__le16	max_tx_rings;</div><div class='del'>-	__le16	min_rx_rings;</div><div class='del'>-	__le16	max_rx_rings;</div><div class='del'>-	__le16	min_l2_ctxs;</div><div class='del'>-	__le16	max_l2_ctxs;</div><div class='del'>-	__le16	min_vnics;</div><div class='del'>-	__le16	max_vnics;</div><div class='del'>-	__le16	min_stat_ctx;</div><div class='del'>-	__le16	max_stat_ctx;</div><div class='del'>-	__le16	min_hw_ring_grps;</div><div class='del'>-	__le16	max_hw_ring_grps;</div><div class='del'>-	__le16	max_tx_scheduler_inputs;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define FUNC_RESOURCE_QCAPS_RESP_FLAGS_MIN_GUARANTEED     0x1UL</div><div class='del'>-	__le16	min_msix;</div><div class='del'>-	__le32	min_ktls_tx_key_ctxs;</div><div class='del'>-	__le32	max_ktls_tx_key_ctxs;</div><div class='del'>-	__le32	min_ktls_rx_key_ctxs;</div><div class='del'>-	__le32	max_ktls_rx_key_ctxs;</div><div class='del'>-	__le32	min_quic_tx_key_ctxs;</div><div class='del'>-	__le32	max_quic_tx_key_ctxs;</div><div class='del'>-	__le32	min_quic_rx_key_ctxs;</div><div class='del'>-	__le32	max_quic_rx_key_ctxs;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_vf_resource_cfg_input (size:704b/88B) */</div><div class='del'>-struct hwrm_func_vf_resource_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	vf_id;</div><div class='del'>-	__le16	max_msix;</div><div class='del'>-	__le16	min_rsscos_ctx;</div><div class='del'>-	__le16	max_rsscos_ctx;</div><div class='del'>-	__le16	min_cmpl_rings;</div><div class='del'>-	__le16	max_cmpl_rings;</div><div class='del'>-	__le16	min_tx_rings;</div><div class='del'>-	__le16	max_tx_rings;</div><div class='del'>-	__le16	min_rx_rings;</div><div class='del'>-	__le16	max_rx_rings;</div><div class='del'>-	__le16	min_l2_ctxs;</div><div class='del'>-	__le16	max_l2_ctxs;</div><div class='del'>-	__le16	min_vnics;</div><div class='del'>-	__le16	max_vnics;</div><div class='del'>-	__le16	min_stat_ctx;</div><div class='del'>-	__le16	max_stat_ctx;</div><div class='del'>-	__le16	min_hw_ring_grps;</div><div class='del'>-	__le16	max_hw_ring_grps;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define FUNC_VF_RESOURCE_CFG_REQ_FLAGS_MIN_GUARANTEED     0x1UL</div><div class='del'>-	__le16	min_msix;</div><div class='del'>-	__le32	min_ktls_tx_key_ctxs;</div><div class='del'>-	__le32	max_ktls_tx_key_ctxs;</div><div class='del'>-	__le32	min_ktls_rx_key_ctxs;</div><div class='del'>-	__le32	max_ktls_rx_key_ctxs;</div><div class='del'>-	__le32	min_quic_tx_key_ctxs;</div><div class='del'>-	__le32	max_quic_tx_key_ctxs;</div><div class='del'>-	__le32	min_quic_rx_key_ctxs;</div><div class='del'>-	__le32	max_quic_rx_key_ctxs;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_vf_resource_cfg_output (size:384b/48B) */</div><div class='del'>-struct hwrm_func_vf_resource_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	reserved_rsscos_ctx;</div><div class='del'>-	__le16	reserved_cmpl_rings;</div><div class='del'>-	__le16	reserved_tx_rings;</div><div class='del'>-	__le16	reserved_rx_rings;</div><div class='del'>-	__le16	reserved_l2_ctxs;</div><div class='del'>-	__le16	reserved_vnics;</div><div class='del'>-	__le16	reserved_stat_ctx;</div><div class='del'>-	__le16	reserved_hw_ring_grps;</div><div class='del'>-	__le32	reserved_ktls_tx_key_ctxs;</div><div class='del'>-	__le32	reserved_ktls_rx_key_ctxs;</div><div class='del'>-	__le32	reserved_quic_tx_key_ctxs;</div><div class='del'>-	__le32	reserved_quic_rx_key_ctxs;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_backing_store_qcaps_input (size:128b/16B) */</div><div class='del'>-struct hwrm_func_backing_store_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_backing_store_qcaps_output (size:832b/104B) */</div><div class='del'>-struct hwrm_func_backing_store_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	qp_max_entries;</div><div class='del'>-	__le16	qp_min_qp1_entries;</div><div class='del'>-	__le16	qp_max_l2_entries;</div><div class='del'>-	__le16	qp_entry_size;</div><div class='del'>-	__le16	srq_max_l2_entries;</div><div class='del'>-	__le32	srq_max_entries;</div><div class='del'>-	__le16	srq_entry_size;</div><div class='del'>-	__le16	cq_max_l2_entries;</div><div class='del'>-	__le32	cq_max_entries;</div><div class='del'>-	__le16	cq_entry_size;</div><div class='del'>-	__le16	vnic_max_vnic_entries;</div><div class='del'>-	__le16	vnic_max_ring_table_entries;</div><div class='del'>-	__le16	vnic_entry_size;</div><div class='del'>-	__le32	stat_max_entries;</div><div class='del'>-	__le16	stat_entry_size;</div><div class='del'>-	__le16	tqm_entry_size;</div><div class='del'>-	__le32	tqm_min_entries_per_ring;</div><div class='del'>-	__le32	tqm_max_entries_per_ring;</div><div class='del'>-	__le32	mrav_max_entries;</div><div class='del'>-	__le16	mrav_entry_size;</div><div class='del'>-	__le16	tim_entry_size;</div><div class='del'>-	__le32	tim_max_entries;</div><div class='del'>-	__le16	mrav_num_entries_units;</div><div class='del'>-	u8	tqm_entries_multiple;</div><div class='del'>-	u8	ctx_kind_initializer;</div><div class='del'>-	__le16	ctx_init_mask;</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_RESP_CTX_INIT_MASK_QP       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_RESP_CTX_INIT_MASK_SRQ      0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_RESP_CTX_INIT_MASK_CQ       0x4UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_RESP_CTX_INIT_MASK_VNIC     0x8UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_RESP_CTX_INIT_MASK_STAT     0x10UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_RESP_CTX_INIT_MASK_MRAV     0x20UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_RESP_CTX_INIT_MASK_TKC      0x40UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_RESP_CTX_INIT_MASK_RKC      0x80UL</div><div class='del'>-	u8	qp_init_offset;</div><div class='del'>-	u8	srq_init_offset;</div><div class='del'>-	u8	cq_init_offset;</div><div class='del'>-	u8	vnic_init_offset;</div><div class='del'>-	u8	tqm_fp_rings_count;</div><div class='del'>-	u8	stat_init_offset;</div><div class='del'>-	u8	mrav_init_offset;</div><div class='del'>-	u8	tqm_fp_rings_count_ext;</div><div class='del'>-	u8	tkc_init_offset;</div><div class='del'>-	u8	rkc_init_offset;</div><div class='del'>-	__le16	tkc_entry_size;</div><div class='del'>-	__le16	rkc_entry_size;</div><div class='del'>-	__le32	tkc_max_entries;</div><div class='del'>-	__le32	rkc_max_entries;</div><div class='del'>-	__le16	fast_qpmd_qp_num_entries;</div><div class='del'>-	u8	rsvd1[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* tqm_fp_ring_cfg (size:128b/16B) */</div><div class='del'>-struct tqm_fp_ring_cfg {</div><div class='del'>-	u8	tqm_ring_pg_size_tqm_ring_lvl;</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_LVL_MASK      0xfUL</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_LVL_SFT       0</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_LVL_LVL_0       0x0UL</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_LVL_LVL_1       0x1UL</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_LVL_LVL_2       0x2UL</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_LVL_LAST       TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_LVL_LVL_2</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_SFT   4</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_LAST   TQM_FP_RING_CFG_TQM_RING_CFG_TQM_RING_PG_SIZE_PG_1G</div><div class='del'>-	u8	unused[3];</div><div class='del'>-	__le32	tqm_ring_num_entries;</div><div class='del'>-	__le64	tqm_ring_page_dir;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_backing_store_cfg_input (size:2688b/336B) */</div><div class='del'>-struct hwrm_func_backing_store_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_FLAGS_PREBOOT_MODE               0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_FLAGS_MRAV_RESERVATION_SPLIT     0x2UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_QP               0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_SRQ              0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_CQ               0x4UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_VNIC             0x8UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_STAT             0x10UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_SP           0x20UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING0        0x40UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING1        0x80UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING2        0x100UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING3        0x200UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING4        0x400UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING5        0x800UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING6        0x1000UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING7        0x2000UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_MRAV             0x4000UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TIM              0x8000UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING8        0x10000UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING9        0x20000UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TQM_RING10       0x40000UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_TKC              0x80000UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_RKC              0x100000UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_ENABLES_QP_FAST_QPMD     0x200000UL</div><div class='del'>-	u8	qpc_pg_size_qpc_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_QPC_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_QPC_PG_SIZE_PG_1G</div><div class='del'>-	u8	srq_pg_size_srq_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_SRQ_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_SRQ_PG_SIZE_PG_1G</div><div class='del'>-	u8	cq_pg_size_cq_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_CQ_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_CQ_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_CQ_PG_SIZE_PG_1G</div><div class='del'>-	u8	vnic_pg_size_vnic_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_VNIC_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_VNIC_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_VNIC_PG_SIZE_PG_1G</div><div class='del'>-	u8	stat_pg_size_stat_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_STAT_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_STAT_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_STAT_PG_SIZE_PG_1G</div><div class='del'>-	u8	tqm_sp_pg_size_tqm_sp_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TQM_SP_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_SP_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TQM_SP_PG_SIZE_PG_1G</div><div class='del'>-	u8	tqm_ring0_pg_size_tqm_ring0_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TQM_RING0_PG_SIZE_PG_1G</div><div class='del'>-	u8	tqm_ring1_pg_size_tqm_ring1_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TQM_RING1_PG_SIZE_PG_1G</div><div class='del'>-	u8	tqm_ring2_pg_size_tqm_ring2_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TQM_RING2_PG_SIZE_PG_1G</div><div class='del'>-	u8	tqm_ring3_pg_size_tqm_ring3_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TQM_RING3_PG_SIZE_PG_1G</div><div class='del'>-	u8	tqm_ring4_pg_size_tqm_ring4_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TQM_RING4_PG_SIZE_PG_1G</div><div class='del'>-	u8	tqm_ring5_pg_size_tqm_ring5_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TQM_RING5_PG_SIZE_PG_1G</div><div class='del'>-	u8	tqm_ring6_pg_size_tqm_ring6_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TQM_RING6_PG_SIZE_PG_1G</div><div class='del'>-	u8	tqm_ring7_pg_size_tqm_ring7_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TQM_RING7_PG_SIZE_PG_1G</div><div class='del'>-	u8	mrav_pg_size_mrav_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_MRAV_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_MRAV_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_MRAV_PG_SIZE_PG_1G</div><div class='del'>-	u8	tim_pg_size_tim_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TIM_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TIM_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TIM_PG_SIZE_PG_1G</div><div class='del'>-	__le64	qpc_page_dir;</div><div class='del'>-	__le64	srq_page_dir;</div><div class='del'>-	__le64	cq_page_dir;</div><div class='del'>-	__le64	vnic_page_dir;</div><div class='del'>-	__le64	stat_page_dir;</div><div class='del'>-	__le64	tqm_sp_page_dir;</div><div class='del'>-	__le64	tqm_ring0_page_dir;</div><div class='del'>-	__le64	tqm_ring1_page_dir;</div><div class='del'>-	__le64	tqm_ring2_page_dir;</div><div class='del'>-	__le64	tqm_ring3_page_dir;</div><div class='del'>-	__le64	tqm_ring4_page_dir;</div><div class='del'>-	__le64	tqm_ring5_page_dir;</div><div class='del'>-	__le64	tqm_ring6_page_dir;</div><div class='del'>-	__le64	tqm_ring7_page_dir;</div><div class='del'>-	__le64	mrav_page_dir;</div><div class='del'>-	__le64	tim_page_dir;</div><div class='del'>-	__le32	qp_num_entries;</div><div class='del'>-	__le32	srq_num_entries;</div><div class='del'>-	__le32	cq_num_entries;</div><div class='del'>-	__le32	stat_num_entries;</div><div class='del'>-	__le32	tqm_sp_num_entries;</div><div class='del'>-	__le32	tqm_ring0_num_entries;</div><div class='del'>-	__le32	tqm_ring1_num_entries;</div><div class='del'>-	__le32	tqm_ring2_num_entries;</div><div class='del'>-	__le32	tqm_ring3_num_entries;</div><div class='del'>-	__le32	tqm_ring4_num_entries;</div><div class='del'>-	__le32	tqm_ring5_num_entries;</div><div class='del'>-	__le32	tqm_ring6_num_entries;</div><div class='del'>-	__le32	tqm_ring7_num_entries;</div><div class='del'>-	__le32	mrav_num_entries;</div><div class='del'>-	__le32	tim_num_entries;</div><div class='del'>-	__le16	qp_num_qp1_entries;</div><div class='del'>-	__le16	qp_num_l2_entries;</div><div class='del'>-	__le16	qp_entry_size;</div><div class='del'>-	__le16	srq_num_l2_entries;</div><div class='del'>-	__le16	srq_entry_size;</div><div class='del'>-	__le16	cq_num_l2_entries;</div><div class='del'>-	__le16	cq_entry_size;</div><div class='del'>-	__le16	vnic_num_vnic_entries;</div><div class='del'>-	__le16	vnic_num_ring_table_entries;</div><div class='del'>-	__le16	vnic_entry_size;</div><div class='del'>-	__le16	stat_entry_size;</div><div class='del'>-	__le16	tqm_entry_size;</div><div class='del'>-	__le16	mrav_entry_size;</div><div class='del'>-	__le16	tim_entry_size;</div><div class='del'>-	u8	tqm_ring8_pg_size_tqm_ring_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_RING8_TQM_RING_PG_SIZE_PG_1G</div><div class='del'>-	u8	ring8_unused[3];</div><div class='del'>-	__le32	tqm_ring8_num_entries;</div><div class='del'>-	__le64	tqm_ring8_page_dir;</div><div class='del'>-	u8	tqm_ring9_pg_size_tqm_ring_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_RING9_TQM_RING_PG_SIZE_PG_1G</div><div class='del'>-	u8	ring9_unused[3];</div><div class='del'>-	__le32	tqm_ring9_num_entries;</div><div class='del'>-	__le64	tqm_ring9_page_dir;</div><div class='del'>-	u8	tqm_ring10_pg_size_tqm_ring_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_RING10_TQM_RING_PG_SIZE_PG_1G</div><div class='del'>-	u8	ring10_unused[3];</div><div class='del'>-	__le32	tqm_ring10_num_entries;</div><div class='del'>-	__le64	tqm_ring10_page_dir;</div><div class='del'>-	__le32	tkc_num_entries;</div><div class='del'>-	__le32	rkc_num_entries;</div><div class='del'>-	__le64	tkc_page_dir;</div><div class='del'>-	__le64	rkc_page_dir;</div><div class='del'>-	__le16	tkc_entry_size;</div><div class='del'>-	__le16	rkc_entry_size;</div><div class='del'>-	u8	tkc_pg_size_tkc_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_TKC_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_TKC_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_TKC_PG_SIZE_PG_1G</div><div class='del'>-	u8	rkc_pg_size_rkc_lvl;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_LVL_MASK      0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_LVL_SFT       0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_LVL_LVL_0       0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_LVL_LVL_1       0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_LVL_LVL_2       0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_LVL_LAST       FUNC_BACKING_STORE_CFG_REQ_RKC_LVL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_PG_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_PG_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_REQ_RKC_PG_SIZE_LAST   FUNC_BACKING_STORE_CFG_REQ_RKC_PG_SIZE_PG_1G</div><div class='del'>-	__le16	qp_num_fast_qpmd_entries;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_backing_store_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_backing_store_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_error_recovery_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_error_recovery_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	unused_0[8];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_error_recovery_qcfg_output (size:1664b/208B) */</div><div class='del'>-struct hwrm_error_recovery_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FLAGS_HOST       0x1UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FLAGS_CO_CPU     0x2UL</div><div class='del'>-	__le32	driver_polling_freq;</div><div class='del'>-	__le32	master_func_wait_period;</div><div class='del'>-	__le32	normal_func_wait_period;</div><div class='del'>-	__le32	master_func_wait_period_after_reset;</div><div class='del'>-	__le32	max_bailout_time_after_reset;</div><div class='del'>-	__le32	fw_health_status_reg;</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_MASK    0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_SFT     0</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_PCIE_CFG  0x0UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_GRC       0x1UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_BAR0      0x2UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_BAR1      0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_LAST     ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SPACE_BAR1</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_MASK          0xfffffffcUL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEALTH_STATUS_REG_ADDR_SFT           2</div><div class='del'>-	__le32	fw_heartbeat_reg;</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_MASK    0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_SFT     0</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_PCIE_CFG  0x0UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_GRC       0x1UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_BAR0      0x2UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_BAR1      0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_LAST     ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SPACE_BAR1</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_MASK          0xfffffffcUL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_HEARTBEAT_REG_ADDR_SFT           2</div><div class='del'>-	__le32	fw_reset_cnt_reg;</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_MASK    0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_SFT     0</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_PCIE_CFG  0x0UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_GRC       0x1UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_BAR0      0x2UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_BAR1      0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_LAST     ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SPACE_BAR1</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_MASK          0xfffffffcUL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_FW_RESET_CNT_REG_ADDR_SFT           2</div><div class='del'>-	__le32	reset_inprogress_reg;</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_MASK    0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_SFT     0</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_PCIE_CFG  0x0UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_GRC       0x1UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_BAR0      0x2UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_BAR1      0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_LAST     ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SPACE_BAR1</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_MASK          0xfffffffcUL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_INPROGRESS_REG_ADDR_SFT           2</div><div class='del'>-	__le32	reset_inprogress_reg_mask;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	reg_array_cnt;</div><div class='del'>-	__le32	reset_reg[16];</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_MASK    0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_SFT     0</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_PCIE_CFG  0x0UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_GRC       0x1UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_BAR0      0x2UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_BAR1      0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_LAST     ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SPACE_BAR1</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_MASK          0xfffffffcUL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SFT           2</div><div class='del'>-	__le32	reset_reg_val[16];</div><div class='del'>-	u8	delay_after_reset[16];</div><div class='del'>-	__le32	err_recovery_cnt_reg;</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_MASK    0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_SFT     0</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_PCIE_CFG  0x0UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_GRC       0x1UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_BAR0      0x2UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_BAR1      0x3UL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_LAST     ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_BAR1</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_MASK          0xfffffffcUL</div><div class='del'>-	#define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SFT           2</div><div class='del'>-	u8	unused_1[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_echo_response_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_echo_response_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	event_data1;</div><div class='del'>-	__le32	event_data2;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_echo_response_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_echo_response_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_pin_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_ptp_pin_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	unused_0[8];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_pin_qcfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_ptp_pin_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	num_pins;</div><div class='del'>-	u8	state;</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_STATE_PIN0_ENABLED     0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_STATE_PIN1_ENABLED     0x2UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_STATE_PIN2_ENABLED     0x4UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_STATE_PIN3_ENABLED     0x8UL</div><div class='del'>-	u8	pin0_usage;</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN0_USAGE_NONE     0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN0_USAGE_PPS_IN   0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN0_USAGE_PPS_OUT  0x2UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN0_USAGE_SYNC_IN  0x3UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN0_USAGE_SYNC_OUT 0x4UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN0_USAGE_LAST    FUNC_PTP_PIN_QCFG_RESP_PIN0_USAGE_SYNC_OUT</div><div class='del'>-	u8	pin1_usage;</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN1_USAGE_NONE     0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN1_USAGE_PPS_IN   0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN1_USAGE_PPS_OUT  0x2UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN1_USAGE_SYNC_IN  0x3UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN1_USAGE_SYNC_OUT 0x4UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN1_USAGE_LAST    FUNC_PTP_PIN_QCFG_RESP_PIN1_USAGE_SYNC_OUT</div><div class='del'>-	u8	pin2_usage;</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN2_USAGE_NONE                      0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN2_USAGE_PPS_IN                    0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN2_USAGE_PPS_OUT                   0x2UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN2_USAGE_SYNC_IN                   0x3UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN2_USAGE_SYNC_OUT                  0x4UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN2_USAGE_SYNCE_PRIMARY_CLOCK_OUT   0x5UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN2_USAGE_SYNCE_SECONDARY_CLOCK_OUT 0x6UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN2_USAGE_LAST                     FUNC_PTP_PIN_QCFG_RESP_PIN2_USAGE_SYNCE_SECONDARY_CLOCK_OUT</div><div class='del'>-	u8	pin3_usage;</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN3_USAGE_NONE                      0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN3_USAGE_PPS_IN                    0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN3_USAGE_PPS_OUT                   0x2UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN3_USAGE_SYNC_IN                   0x3UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN3_USAGE_SYNC_OUT                  0x4UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN3_USAGE_SYNCE_PRIMARY_CLOCK_OUT   0x5UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN3_USAGE_SYNCE_SECONDARY_CLOCK_OUT 0x6UL</div><div class='del'>-	#define FUNC_PTP_PIN_QCFG_RESP_PIN3_USAGE_LAST                     FUNC_PTP_PIN_QCFG_RESP_PIN3_USAGE_SYNCE_SECONDARY_CLOCK_OUT</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_pin_cfg_input (size:256b/32B) */</div><div class='del'>-struct hwrm_func_ptp_pin_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN0_STATE     0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN0_USAGE     0x2UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN1_STATE     0x4UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN1_USAGE     0x8UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN2_STATE     0x10UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN2_USAGE     0x20UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN3_STATE     0x40UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN3_USAGE     0x80UL</div><div class='del'>-	u8	pin0_state;</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN0_STATE_DISABLED 0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN0_STATE_ENABLED  0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN0_STATE_LAST    FUNC_PTP_PIN_CFG_REQ_PIN0_STATE_ENABLED</div><div class='del'>-	u8	pin0_usage;</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN0_USAGE_NONE     0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN0_USAGE_PPS_IN   0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN0_USAGE_PPS_OUT  0x2UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN0_USAGE_SYNC_IN  0x3UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN0_USAGE_SYNC_OUT 0x4UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN0_USAGE_LAST    FUNC_PTP_PIN_CFG_REQ_PIN0_USAGE_SYNC_OUT</div><div class='del'>-	u8	pin1_state;</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN1_STATE_DISABLED 0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN1_STATE_ENABLED  0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN1_STATE_LAST    FUNC_PTP_PIN_CFG_REQ_PIN1_STATE_ENABLED</div><div class='del'>-	u8	pin1_usage;</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN1_USAGE_NONE     0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN1_USAGE_PPS_IN   0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN1_USAGE_PPS_OUT  0x2UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN1_USAGE_SYNC_IN  0x3UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN1_USAGE_SYNC_OUT 0x4UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN1_USAGE_LAST    FUNC_PTP_PIN_CFG_REQ_PIN1_USAGE_SYNC_OUT</div><div class='del'>-	u8	pin2_state;</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_STATE_DISABLED 0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_STATE_ENABLED  0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_STATE_LAST    FUNC_PTP_PIN_CFG_REQ_PIN2_STATE_ENABLED</div><div class='del'>-	u8	pin2_usage;</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_USAGE_NONE                      0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_USAGE_PPS_IN                    0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_USAGE_PPS_OUT                   0x2UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_USAGE_SYNC_IN                   0x3UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_USAGE_SYNC_OUT                  0x4UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_USAGE_SYNCE_PRIMARY_CLOCK_OUT   0x5UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_USAGE_SYNCE_SECONDARY_CLOCK_OUT 0x6UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN2_USAGE_LAST                     FUNC_PTP_PIN_CFG_REQ_PIN2_USAGE_SYNCE_SECONDARY_CLOCK_OUT</div><div class='del'>-	u8	pin3_state;</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_STATE_DISABLED 0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_STATE_ENABLED  0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_STATE_LAST    FUNC_PTP_PIN_CFG_REQ_PIN3_STATE_ENABLED</div><div class='del'>-	u8	pin3_usage;</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_USAGE_NONE                      0x0UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_USAGE_PPS_IN                    0x1UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_USAGE_PPS_OUT                   0x2UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_USAGE_SYNC_IN                   0x3UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_USAGE_SYNC_OUT                  0x4UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_USAGE_SYNCE_PRIMARY_CLOCK_OUT   0x5UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_USAGE_SYNCE_SECONDARY_CLOCK_OUT 0x6UL</div><div class='del'>-	#define FUNC_PTP_PIN_CFG_REQ_PIN3_USAGE_LAST                     FUNC_PTP_PIN_CFG_REQ_PIN3_USAGE_SYNCE_SECONDARY_CLOCK_OUT</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_pin_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_ptp_pin_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_cfg_input (size:384b/48B) */</div><div class='del'>-struct hwrm_func_ptp_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	enables;</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_ENABLES_PTP_PPS_EVENT               0x1UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_DLL_SOURCE     0x2UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_DLL_PHASE      0x4UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_PERIOD     0x8UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_UP         0x10UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_PHASE      0x20UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_ENABLES_PTP_SET_TIME                0x40UL</div><div class='del'>-	u8	ptp_pps_event;</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_PPS_EVENT_INTERNAL     0x1UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_PPS_EVENT_EXTERNAL     0x2UL</div><div class='del'>-	u8	ptp_freq_adj_dll_source;</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_NONE    0x0UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_TSIO_0  0x1UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_TSIO_1  0x2UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_TSIO_2  0x3UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_TSIO_3  0x4UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_PORT_0  0x5UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_PORT_1  0x6UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_PORT_2  0x7UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_PORT_3  0x8UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_INVALID 0xffUL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_LAST   FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_SOURCE_INVALID</div><div class='del'>-	u8	ptp_freq_adj_dll_phase;</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_PHASE_NONE 0x0UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_PHASE_4K   0x1UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_PHASE_8K   0x2UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_PHASE_10M  0x3UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_PHASE_25M  0x4UL</div><div class='del'>-	#define FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_PHASE_LAST FUNC_PTP_CFG_REQ_PTP_FREQ_ADJ_DLL_PHASE_25M</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	__le32	ptp_freq_adj_ext_period;</div><div class='del'>-	__le32	ptp_freq_adj_ext_up;</div><div class='del'>-	__le32	ptp_freq_adj_ext_phase_lower;</div><div class='del'>-	__le32	ptp_freq_adj_ext_phase_upper;</div><div class='del'>-	__le64	ptp_set_time;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_ptp_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_ts_query_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_ptp_ts_query_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_PTP_TS_QUERY_REQ_FLAGS_PPS_TIME     0x1UL</div><div class='del'>-	#define FUNC_PTP_TS_QUERY_REQ_FLAGS_PTM_TIME     0x2UL</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_ts_query_output (size:320b/40B) */</div><div class='del'>-struct hwrm_func_ptp_ts_query_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	pps_event_ts;</div><div class='del'>-	__le64	ptm_local_ts;</div><div class='del'>-	__le64	ptm_system_ts;</div><div class='del'>-	__le32	ptm_link_delay;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_ext_cfg_input (size:256b/32B) */</div><div class='del'>-struct hwrm_func_ptp_ext_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	enables;</div><div class='del'>-	#define FUNC_PTP_EXT_CFG_REQ_ENABLES_PHC_MASTER_FID     0x1UL</div><div class='del'>-	#define FUNC_PTP_EXT_CFG_REQ_ENABLES_PHC_SEC_FID        0x2UL</div><div class='del'>-	#define FUNC_PTP_EXT_CFG_REQ_ENABLES_PHC_SEC_MODE       0x4UL</div><div class='del'>-	#define FUNC_PTP_EXT_CFG_REQ_ENABLES_FAILOVER_TIMER     0x8UL</div><div class='del'>-	__le16	phc_master_fid;</div><div class='del'>-	__le16	phc_sec_fid;</div><div class='del'>-	u8	phc_sec_mode;</div><div class='del'>-	#define FUNC_PTP_EXT_CFG_REQ_PHC_SEC_MODE_SWITCH  0x0UL</div><div class='del'>-	#define FUNC_PTP_EXT_CFG_REQ_PHC_SEC_MODE_ALL     0x1UL</div><div class='del'>-	#define FUNC_PTP_EXT_CFG_REQ_PHC_SEC_MODE_PF_ONLY 0x2UL</div><div class='del'>-	#define FUNC_PTP_EXT_CFG_REQ_PHC_SEC_MODE_LAST   FUNC_PTP_EXT_CFG_REQ_PHC_SEC_MODE_PF_ONLY</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le32	failover_timer;</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_ext_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_ptp_ext_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_ext_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_ptp_ext_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	unused_0[8];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_ptp_ext_qcfg_output (size:256b/32B) */</div><div class='del'>-struct hwrm_func_ptp_ext_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	phc_master_fid;</div><div class='del'>-	__le16	phc_sec_fid;</div><div class='del'>-	__le16	phc_active_fid0;</div><div class='del'>-	__le16	phc_active_fid1;</div><div class='del'>-	__le32	last_failover_event;</div><div class='del'>-	__le16	from_fid;</div><div class='del'>-	__le16	to_fid;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_backing_store_cfg_v2_input (size:448b/56B) */</div><div class='del'>-struct hwrm_func_backing_store_cfg_v2_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_QP                  0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_SRQ                 0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_CQ                  0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_VNIC                0x3UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_STAT                0x4UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_SP_TQM_RING         0x5UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_FP_TQM_RING         0x6UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_MRAV                0xeUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_TIM                 0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_TX_CK               0x13UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_RX_CK               0x14UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_MP_TQM_RING         0x15UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_SQ_DB_SHADOW        0x16UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_RQ_DB_SHADOW        0x17UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_SRQ_DB_SHADOW       0x18UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_CQ_DB_SHADOW        0x19UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_TBL_SCOPE           0x1cUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_XID_PARTITION       0x1dUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_SRT_TRACE           0x1eUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_SRT2_TRACE          0x1fUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_CRT_TRACE           0x20UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_CRT2_TRACE          0x21UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_RIGP0_TRACE         0x22UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_L2_HWRM_TRACE       0x23UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_ROCE_HWRM_TRACE     0x24UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_TTX_PACING_TQM_RING 0x25UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_CA0_TRACE           0x26UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_CA1_TRACE           0x27UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_CA2_TRACE           0x28UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_RIGP1_TRACE         0x29UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_INVALID             0xffffUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_LAST               FUNC_BACKING_STORE_CFG_V2_REQ_TYPE_INVALID</div><div class='del'>-	__le16	instance;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_FLAGS_PREBOOT_MODE        0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_FLAGS_BS_CFG_ALL_DONE     0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_FLAGS_BS_EXTEND           0x4UL</div><div class='del'>-	__le64	page_dir;</div><div class='del'>-	__le32	num_entries;</div><div class='del'>-	__le16	entry_size;</div><div class='del'>-	u8	page_size_pbl_level;</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PBL_LEVEL_MASK  0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PBL_LEVEL_SFT   0</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PBL_LEVEL_LVL_0   0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PBL_LEVEL_LVL_1   0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PBL_LEVEL_LVL_2   0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PBL_LEVEL_LAST   FUNC_BACKING_STORE_CFG_V2_REQ_PBL_LEVEL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PAGE_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PAGE_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PAGE_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PAGE_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PAGE_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PAGE_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PAGE_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PAGE_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_CFG_V2_REQ_PAGE_SIZE_LAST   FUNC_BACKING_STORE_CFG_V2_REQ_PAGE_SIZE_PG_1G</div><div class='del'>-	u8	subtype_valid_cnt;</div><div class='del'>-	__le32	split_entry_0;</div><div class='del'>-	__le32	split_entry_1;</div><div class='del'>-	__le32	split_entry_2;</div><div class='del'>-	__le32	split_entry_3;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_backing_store_cfg_v2_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_backing_store_cfg_v2_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	rsvd0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_backing_store_qcfg_v2_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_backing_store_qcfg_v2_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_QP                  0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_SRQ                 0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_CQ                  0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_VNIC                0x3UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_STAT                0x4UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_SP_TQM_RING         0x5UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_FP_TQM_RING         0x6UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_MRAV                0xeUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_TIM                 0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_TX_CK               0x13UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_RX_CK               0x14UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_MP_TQM_RING         0x15UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_SQ_DB_SHADOW        0x16UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_RQ_DB_SHADOW        0x17UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_SRQ_DB_SHADOW       0x18UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_CQ_DB_SHADOW        0x19UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_TBL_SCOPE           0x1cUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_XID_PARTITION_TABLE 0x1dUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_SRT_TRACE           0x1eUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_SRT2_TRACE          0x1fUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_CRT_TRACE           0x20UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_CRT2_TRACE          0x21UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_RIGP0_TRACE         0x22UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_L2_HWRM_TRACE       0x23UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_ROCE_HWRM_TRACE     0x24UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_TTX_PACING_TQM_RING 0x25UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_CA0_TRACE           0x26UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_CA1_TRACE           0x27UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_CA2_TRACE           0x28UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_RIGP1_TRACE         0x29UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_INVALID             0xffffUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_LAST               FUNC_BACKING_STORE_QCFG_V2_REQ_TYPE_INVALID</div><div class='del'>-	__le16	instance;</div><div class='del'>-	u8	rsvd[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_backing_store_qcfg_v2_output (size:448b/56B) */</div><div class='del'>-struct hwrm_func_backing_store_qcfg_v2_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_QP                  0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_SRQ                 0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_CQ                  0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_VNIC                0x3UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_STAT                0x4UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_SP_TQM_RING         0x5UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_FP_TQM_RING         0x6UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_MRAV                0xeUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_TIM                 0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_TX_CK               0x13UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_RX_CK               0x14UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_MP_TQM_RING         0x15UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_TBL_SCOPE           0x1cUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_XID_PARTITION       0x1dUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_SRT_TRACE           0x1eUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_SRT2_TRACE          0x1fUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_CRT_TRACE           0x20UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_CRT2_TRACE          0x21UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_RIGP0_TRACE         0x22UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_L2_HWRM_TRACE       0x23UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_ROCE_HWRM_TRACE     0x24UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_TTX_PACING_TQM_RING 0x25UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_CA0_TRACE           0x26UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_CA1_TRACE           0x27UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_CA2_TRACE           0x28UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_RIGP1_TRACE         0x29UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_INVALID             0xffffUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_LAST               FUNC_BACKING_STORE_QCFG_V2_RESP_TYPE_INVALID</div><div class='del'>-	__le16	instance;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	__le64	page_dir;</div><div class='del'>-	__le32	num_entries;</div><div class='del'>-	u8	page_size_pbl_level;</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PBL_LEVEL_MASK  0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PBL_LEVEL_SFT   0</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PBL_LEVEL_LVL_0   0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PBL_LEVEL_LVL_1   0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PBL_LEVEL_LVL_2   0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PBL_LEVEL_LAST   FUNC_BACKING_STORE_QCFG_V2_RESP_PBL_LEVEL_LVL_2</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PAGE_SIZE_MASK  0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PAGE_SIZE_SFT   4</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PAGE_SIZE_PG_4K   (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PAGE_SIZE_PG_8K   (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PAGE_SIZE_PG_64K  (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PAGE_SIZE_PG_2M   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PAGE_SIZE_PG_8M   (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PAGE_SIZE_PG_1G   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define FUNC_BACKING_STORE_QCFG_V2_RESP_PAGE_SIZE_LAST   FUNC_BACKING_STORE_QCFG_V2_RESP_PAGE_SIZE_PG_1G</div><div class='del'>-	u8	subtype_valid_cnt;</div><div class='del'>-	u8	rsvd[2];</div><div class='del'>-	__le32	split_entry_0;</div><div class='del'>-	__le32	split_entry_1;</div><div class='del'>-	__le32	split_entry_2;</div><div class='del'>-	__le32	split_entry_3;</div><div class='del'>-	u8	rsvd2[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* qpc_split_entries (size:128b/16B) */</div><div class='del'>-struct qpc_split_entries {</div><div class='del'>-	__le32	qp_num_l2_entries;</div><div class='del'>-	__le32	qp_num_qp1_entries;</div><div class='del'>-	__le32	qp_num_fast_qpmd_entries;</div><div class='del'>-	__le32	rsvd;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* srq_split_entries (size:128b/16B) */</div><div class='del'>-struct srq_split_entries {</div><div class='del'>-	__le32	srq_num_l2_entries;</div><div class='del'>-	__le32	rsvd;</div><div class='del'>-	__le32	rsvd2[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* cq_split_entries (size:128b/16B) */</div><div class='del'>-struct cq_split_entries {</div><div class='del'>-	__le32	cq_num_l2_entries;</div><div class='del'>-	__le32	rsvd;</div><div class='del'>-	__le32	rsvd2[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* vnic_split_entries (size:128b/16B) */</div><div class='del'>-struct vnic_split_entries {</div><div class='del'>-	__le32	vnic_num_vnic_entries;</div><div class='del'>-	__le32	rsvd;</div><div class='del'>-	__le32	rsvd2[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* mrav_split_entries (size:128b/16B) */</div><div class='del'>-struct mrav_split_entries {</div><div class='del'>-	__le32	mrav_num_av_entries;</div><div class='del'>-	__le32	rsvd;</div><div class='del'>-	__le32	rsvd2[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ts_split_entries (size:128b/16B) */</div><div class='del'>-struct ts_split_entries {</div><div class='del'>-	__le32	region_num_entries;</div><div class='del'>-	u8	tsid;</div><div class='del'>-	u8	lkup_static_bkt_cnt_exp[2];</div><div class='del'>-	u8	rsvd;</div><div class='del'>-	__le32	rsvd2[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ck_split_entries (size:128b/16B) */</div><div class='del'>-struct ck_split_entries {</div><div class='del'>-	__le32	num_quic_entries;</div><div class='del'>-	__le32	rsvd;</div><div class='del'>-	__le32	rsvd2[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_backing_store_qcaps_v2_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_backing_store_qcaps_v2_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_QP                  0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRQ                 0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CQ                  0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_VNIC                0x3UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_STAT                0x4UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SP_TQM_RING         0x5UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_FP_TQM_RING         0x6UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_MRAV                0xeUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_TIM                 0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_TX_CK               0x13UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RX_CK               0x14UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_MP_TQM_RING         0x15UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SQ_DB_SHADOW        0x16UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RQ_DB_SHADOW        0x17UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRQ_DB_SHADOW       0x18UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CQ_DB_SHADOW        0x19UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_TBL_SCOPE           0x1cUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_XID_PARTITION       0x1dUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRT_TRACE           0x1eUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_SRT2_TRACE          0x1fUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CRT_TRACE           0x20UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CRT2_TRACE          0x21UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RIGP0_TRACE         0x22UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_L2_HWRM_TRACE       0x23UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_ROCE_HWRM_TRACE     0x24UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_TTX_PACING_TQM_RING 0x25UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CA0_TRACE           0x26UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CA1_TRACE           0x27UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_CA2_TRACE           0x28UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_RIGP1_TRACE         0x29UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_INVALID             0xffffUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_LAST               FUNC_BACKING_STORE_QCAPS_V2_REQ_TYPE_INVALID</div><div class='del'>-	u8	rsvd[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_backing_store_qcaps_v2_output (size:448b/56B) */</div><div class='del'>-struct hwrm_func_backing_store_qcaps_v2_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	type;</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_QP                  0x0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_SRQ                 0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_CQ                  0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_VNIC                0x3UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_STAT                0x4UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_SP_TQM_RING         0x5UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_FP_TQM_RING         0x6UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_MRAV                0xeUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_TIM                 0xfUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_TX_CK               0x13UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_RX_CK               0x14UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_MP_TQM_RING         0x15UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_SQ_DB_SHADOW        0x16UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_RQ_DB_SHADOW        0x17UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_SRQ_DB_SHADOW       0x18UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_CQ_DB_SHADOW        0x19UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_TBL_SCOPE           0x1cUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_XID_PARTITION       0x1dUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_SRT_TRACE           0x1eUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_SRT2_TRACE          0x1fUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_CRT_TRACE           0x20UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_CRT2_TRACE          0x21UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_RIGP0_TRACE         0x22UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_L2_HWRM_TRACE       0x23UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_ROCE_HWRM_TRACE     0x24UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_TTX_PACING_TQM_RING 0x25UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_CA0_TRACE           0x26UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_CA1_TRACE           0x27UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_CA2_TRACE           0x28UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_RIGP1_TRACE         0x29UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_INVALID             0xffffUL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_LAST               FUNC_BACKING_STORE_QCAPS_V2_RESP_TYPE_INVALID</div><div class='del'>-	__le16	entry_size;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_ENABLE_CTX_KIND_INIT            0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_TYPE_VALID                      0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_DRIVER_MANAGED_MEMORY           0x4UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_ROCE_QP_PSEUDO_STATIC_ALLOC     0x8UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_FLAGS_FW_DBG_TRACE                    0x10UL</div><div class='del'>-	__le32	instance_bit_map;</div><div class='del'>-	u8	ctx_init_value;</div><div class='del'>-	u8	ctx_init_offset;</div><div class='del'>-	u8	entry_multiple;</div><div class='del'>-	u8	rsvd;</div><div class='del'>-	__le32	max_num_entries;</div><div class='del'>-	__le32	min_num_entries;</div><div class='del'>-	__le16	next_valid_type;</div><div class='del'>-	u8	subtype_valid_cnt;</div><div class='del'>-	u8	exact_cnt_bit_map;</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_EXACT_CNT_BIT_MAP_SPLIT_ENTRY_0_EXACT     0x1UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_EXACT_CNT_BIT_MAP_SPLIT_ENTRY_1_EXACT     0x2UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_EXACT_CNT_BIT_MAP_SPLIT_ENTRY_2_EXACT     0x4UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_EXACT_CNT_BIT_MAP_SPLIT_ENTRY_3_EXACT     0x8UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_EXACT_CNT_BIT_MAP_UNUSED_MASK             0xf0UL</div><div class='del'>-	#define FUNC_BACKING_STORE_QCAPS_V2_RESP_EXACT_CNT_BIT_MAP_UNUSED_SFT              4</div><div class='del'>-	__le32	split_entry_0;</div><div class='del'>-	__le32	split_entry_1;</div><div class='del'>-	__le32	split_entry_2;</div><div class='del'>-	__le32	split_entry_3;</div><div class='del'>-	u8	rsvd3[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_dbr_pacing_qcfg_input (size:128b/16B) */</div><div class='del'>-struct hwrm_func_dbr_pacing_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_dbr_pacing_qcfg_output (size:512b/64B) */</div><div class='del'>-struct hwrm_func_dbr_pacing_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_FLAGS_DBR_NQ_EVENT_ENABLED     0x1UL</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	__le32	dbr_stat_db_fifo_reg;</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_STAT_DB_FIFO_REG_ADDR_SPACE_MASK    0x3UL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_STAT_DB_FIFO_REG_ADDR_SPACE_SFT     0</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_STAT_DB_FIFO_REG_ADDR_SPACE_PCIE_CFG  0x0UL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_STAT_DB_FIFO_REG_ADDR_SPACE_GRC       0x1UL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_STAT_DB_FIFO_REG_ADDR_SPACE_BAR0      0x2UL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_STAT_DB_FIFO_REG_ADDR_SPACE_BAR1      0x3UL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_STAT_DB_FIFO_REG_ADDR_SPACE_LAST     FUNC_DBR_PACING_QCFG_RESP_DBR_STAT_DB_FIFO_REG_ADDR_SPACE_BAR1</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_STAT_DB_FIFO_REG_ADDR_MASK          0xfffffffcUL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_STAT_DB_FIFO_REG_ADDR_SFT           2</div><div class='del'>-	__le32	dbr_stat_db_fifo_reg_watermark_mask;</div><div class='del'>-	u8	dbr_stat_db_fifo_reg_watermark_shift;</div><div class='del'>-	u8	unused_1[3];</div><div class='del'>-	__le32	dbr_stat_db_fifo_reg_fifo_room_mask;</div><div class='del'>-	u8	dbr_stat_db_fifo_reg_fifo_room_shift;</div><div class='del'>-	u8	unused_2[3];</div><div class='del'>-	__le32	dbr_throttling_aeq_arm_reg;</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_THROTTLING_AEQ_ARM_REG_ADDR_SPACE_MASK    0x3UL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_THROTTLING_AEQ_ARM_REG_ADDR_SPACE_SFT     0</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_THROTTLING_AEQ_ARM_REG_ADDR_SPACE_PCIE_CFG  0x0UL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_THROTTLING_AEQ_ARM_REG_ADDR_SPACE_GRC       0x1UL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_THROTTLING_AEQ_ARM_REG_ADDR_SPACE_BAR0      0x2UL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_THROTTLING_AEQ_ARM_REG_ADDR_SPACE_BAR1      0x3UL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_THROTTLING_AEQ_ARM_REG_ADDR_SPACE_LAST     FUNC_DBR_PACING_QCFG_RESP_DBR_THROTTLING_AEQ_ARM_REG_ADDR_SPACE_BAR1</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_THROTTLING_AEQ_ARM_REG_ADDR_MASK          0xfffffffcUL</div><div class='del'>-	#define FUNC_DBR_PACING_QCFG_RESP_DBR_THROTTLING_AEQ_ARM_REG_ADDR_SFT           2</div><div class='del'>-	u8	dbr_throttling_aeq_arm_reg_val;</div><div class='del'>-	u8	unused_3[3];</div><div class='del'>-	__le32	dbr_stat_db_max_fifo_depth;</div><div class='del'>-	__le32	primary_nq_id;</div><div class='del'>-	__le32	pacing_threshold;</div><div class='del'>-	u8	unused_4[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_drv_if_change_input (size:192b/24B) */</div><div class='del'>-struct hwrm_func_drv_if_change_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_DRV_IF_CHANGE_REQ_FLAGS_UP     0x1UL</div><div class='del'>-	__le32	unused;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_func_drv_if_change_output (size:128b/16B) */</div><div class='del'>-struct hwrm_func_drv_if_change_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define FUNC_DRV_IF_CHANGE_RESP_FLAGS_RESC_CHANGE           0x1UL</div><div class='del'>-	#define FUNC_DRV_IF_CHANGE_RESP_FLAGS_HOT_FW_RESET_DONE     0x2UL</div><div class='del'>-	#define FUNC_DRV_IF_CHANGE_RESP_FLAGS_CAPS_CHANGE           0x4UL</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_cfg_input (size:512b/64B) */</div><div class='del'>-struct hwrm_port_phy_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_RESET_PHY                  0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_DEPRECATED                 0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FORCE                      0x4UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_RESTART_AUTONEG            0x8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_EEE_ENABLE                 0x10UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_EEE_DISABLE                0x20UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_EEE_TX_LPI_ENABLE          0x40UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_EEE_TX_LPI_DISABLE         0x80UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_ENABLE         0x100UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_AUTONEG_DISABLE        0x200UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_CLAUSE74_ENABLE        0x400UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_CLAUSE74_DISABLE       0x800UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_CLAUSE91_ENABLE        0x1000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_CLAUSE91_DISABLE       0x2000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FORCE_LINK_DWN             0x4000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_RS544_1XN_ENABLE       0x8000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_RS544_1XN_DISABLE      0x10000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_RS544_IEEE_ENABLE      0x20000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_RS544_IEEE_DISABLE     0x40000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_RS272_1XN_ENABLE       0x80000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_RS272_1XN_DISABLE      0x100000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_RS272_IEEE_ENABLE      0x200000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FLAGS_FEC_RS272_IEEE_DISABLE     0x400000UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_AUTO_MODE                     0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_AUTO_DUPLEX                   0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_AUTO_PAUSE                    0x4UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_AUTO_LINK_SPEED               0x8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_AUTO_LINK_SPEED_MASK          0x10UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_WIRESPEED                     0x20UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_LPBK                          0x40UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_PREEMPHASIS                   0x80UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_FORCE_PAUSE                   0x100UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_EEE_LINK_SPEED_MASK           0x200UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_TX_LPI_TIMER                  0x400UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_FORCE_PAM4_LINK_SPEED         0x800UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_AUTO_PAM4_LINK_SPEED_MASK     0x1000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_FORCE_LINK_SPEEDS2            0x2000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_ENABLES_AUTO_LINK_SPEEDS2_MASK        0x4000UL</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	__le16	force_link_speed;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100MB 0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB   0xaUL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2GB   0x14UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_2_5GB 0x19UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB  0x64UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_20GB  0xc8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB  0xfaUL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB  0x190UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB  0x1f4UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_100GB 0x3e8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10MB  0xffffUL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_LAST PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10MB</div><div class='del'>-	u8	auto_mode;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_MODE_NONE         0x0UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_MODE_ALL_SPEEDS   0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_MODE_ONE_SPEED    0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_MODE_ONE_OR_BELOW 0x3UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_MODE_SPEED_MASK   0x4UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_MODE_LAST        PORT_PHY_CFG_REQ_AUTO_MODE_SPEED_MASK</div><div class='del'>-	u8	auto_duplex;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_DUPLEX_HALF 0x0UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_DUPLEX_FULL 0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_DUPLEX_BOTH 0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_DUPLEX_LAST PORT_PHY_CFG_REQ_AUTO_DUPLEX_BOTH</div><div class='del'>-	u8	auto_pause;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_PAUSE_TX                0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_PAUSE_RX                0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE     0x4UL</div><div class='del'>-	u8	mgmt_flag;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_MGMT_FLAG_LINK_RELEASE     0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_MGMT_FLAG_MGMT_VALID       0x80UL</div><div class='del'>-	__le16	auto_link_speed;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB 0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB   0xaUL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2GB   0x14UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB 0x19UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB  0x64UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB  0xc8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB  0xfaUL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB  0x190UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB  0x1f4UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB 0x3e8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10MB  0xffffUL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_LAST PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10MB</div><div class='del'>-	__le16	auto_link_speed_mask;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_100MBHD     0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_100MB       0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_1GBHD       0x4UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_1GB         0x8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_2GB         0x10UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_2_5GB       0x20UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_10GB        0x40UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_20GB        0x80UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_25GB        0x100UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_40GB        0x200UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_50GB        0x400UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_100GB       0x800UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_10MBHD      0x1000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_MASK_10MB        0x2000UL</div><div class='del'>-	u8	wirespeed;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_WIRESPEED_OFF 0x0UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_WIRESPEED_ON  0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_WIRESPEED_LAST PORT_PHY_CFG_REQ_WIRESPEED_ON</div><div class='del'>-	u8	lpbk;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_LPBK_NONE     0x0UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_LPBK_LOCAL    0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_LPBK_REMOTE   0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_LPBK_EXTERNAL 0x3UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_LPBK_LAST    PORT_PHY_CFG_REQ_LPBK_EXTERNAL</div><div class='del'>-	u8	force_pause;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_PAUSE_TX     0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_PAUSE_RX     0x2UL</div><div class='del'>-	u8	unused_1;</div><div class='del'>-	__le32	preemphasis;</div><div class='del'>-	__le16	eee_link_speed_mask;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_EEE_LINK_SPEED_MASK_RSVD1     0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_EEE_LINK_SPEED_MASK_100MB     0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_EEE_LINK_SPEED_MASK_RSVD2     0x4UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_EEE_LINK_SPEED_MASK_1GB       0x8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_EEE_LINK_SPEED_MASK_RSVD3     0x10UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_EEE_LINK_SPEED_MASK_RSVD4     0x20UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_EEE_LINK_SPEED_MASK_10GB      0x40UL</div><div class='del'>-	__le16	force_pam4_link_speed;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_50GB  0x1f4UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_100GB 0x3e8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB 0x7d0UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_LAST PORT_PHY_CFG_REQ_FORCE_PAM4_LINK_SPEED_200GB</div><div class='del'>-	__le32	tx_lpi_timer;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_TX_LPI_TIMER_MASK 0xffffffUL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_TX_LPI_TIMER_SFT 0</div><div class='del'>-	__le16	auto_link_pam4_speed_mask;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_PAM4_SPEED_MASK_50G      0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_PAM4_SPEED_MASK_100G     0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_PAM4_SPEED_MASK_200G     0x4UL</div><div class='del'>-	__le16	force_link_speeds2;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_1GB            0xaUL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_10GB           0x64UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_25GB           0xfaUL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_40GB           0x190UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_50GB           0x1f4UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_100GB          0x3e8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_50GB_PAM4_56   0x1f5UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_100GB_PAM4_56  0x3e9UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_200GB_PAM4_56  0x7d1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_400GB_PAM4_56  0xfa1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_100GB_PAM4_112 0x3eaUL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_200GB_PAM4_112 0x7d2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_400GB_PAM4_112 0xfa2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_800GB_PAM4_112 0x1f42UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_LAST          PORT_PHY_CFG_REQ_FORCE_LINK_SPEEDS2_800GB_PAM4_112</div><div class='del'>-	__le16	auto_link_speeds2_mask;</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_1GB                0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_10GB               0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_25GB               0x4UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_40GB               0x8UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_50GB               0x10UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_100GB              0x20UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_50GB_PAM4_56       0x40UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_100GB_PAM4_56      0x80UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_200GB_PAM4_56      0x100UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_400GB_PAM4_56      0x200UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_100GB_PAM4_112     0x400UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_200GB_PAM4_112     0x800UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_400GB_PAM4_112     0x1000UL</div><div class='del'>-	#define PORT_PHY_CFG_REQ_AUTO_LINK_SPEEDS2_MASK_800GB_PAM4_112     0x2000UL</div><div class='del'>-	u8	unused_2[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_phy_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_cfg_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_port_phy_cfg_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define PORT_PHY_CFG_CMD_ERR_CODE_UNKNOWN       0x0UL</div><div class='del'>-	#define PORT_PHY_CFG_CMD_ERR_CODE_ILLEGAL_SPEED 0x1UL</div><div class='del'>-	#define PORT_PHY_CFG_CMD_ERR_CODE_RETRY         0x2UL</div><div class='del'>-	#define PORT_PHY_CFG_CMD_ERR_CODE_LAST         PORT_PHY_CFG_CMD_ERR_CODE_RETRY</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_port_phy_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_qcfg_output (size:832b/104B) */</div><div class='del'>-struct hwrm_port_phy_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	link;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_NO_LINK 0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SIGNAL  0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_LINK    0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_LAST   PORT_PHY_QCFG_RESP_LINK_LINK</div><div class='del'>-	u8	active_fec_signal_mode;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SIGNAL_MODE_MASK                0xfUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SIGNAL_MODE_SFT                 0</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SIGNAL_MODE_NRZ                   0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SIGNAL_MODE_PAM4                  0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SIGNAL_MODE_PAM4_112              0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SIGNAL_MODE_LAST                 PORT_PHY_QCFG_RESP_SIGNAL_MODE_PAM4_112</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ACTIVE_FEC_MASK                 0xf0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ACTIVE_FEC_SFT                  4</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_NONE_ACTIVE        (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE74_ACTIVE    (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_CLAUSE91_ACTIVE    (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_1XN_ACTIVE   (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS544_IEEE_ACTIVE  (0x4UL &lt;&lt; 4)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_1XN_ACTIVE   (0x5UL &lt;&lt; 4)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE  (0x6UL &lt;&lt; 4)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ACTIVE_FEC_LAST                  PORT_PHY_QCFG_RESP_ACTIVE_FEC_FEC_RS272_IEEE_ACTIVE</div><div class='del'>-	__le16	link_speed;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_100MB 0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_1GB   0xaUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_2GB   0x14UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_2_5GB 0x19UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_10GB  0x64UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_20GB  0xc8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_25GB  0xfaUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_40GB  0x190UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_50GB  0x1f4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_100GB 0x3e8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_200GB 0x7d0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_400GB 0xfa0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_800GB 0x1f40UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_10MB  0xffffUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_SPEED_LAST PORT_PHY_QCFG_RESP_LINK_SPEED_10MB</div><div class='del'>-	u8	duplex_cfg;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_DUPLEX_CFG_HALF 0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_DUPLEX_CFG_FULL 0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_DUPLEX_CFG_LAST PORT_PHY_QCFG_RESP_DUPLEX_CFG_FULL</div><div class='del'>-	u8	pause;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PAUSE_TX     0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PAUSE_RX     0x2UL</div><div class='del'>-	__le16	support_speeds;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_100MBHD     0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_100MB       0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_1GBHD       0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_1GB         0x8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_2GB         0x10UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_2_5GB       0x20UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_10GB        0x40UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_20GB        0x80UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_25GB        0x100UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_40GB        0x200UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_50GB        0x400UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_100GB       0x800UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_10MBHD      0x1000UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS_10MB        0x2000UL</div><div class='del'>-	__le16	force_link_speed;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_100MB 0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_1GB   0xaUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_2GB   0x14UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_2_5GB 0x19UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_10GB  0x64UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_20GB  0xc8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_25GB  0xfaUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_40GB  0x190UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_50GB  0x1f4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_100GB 0x3e8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_10MB  0xffffUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_LAST PORT_PHY_QCFG_RESP_FORCE_LINK_SPEED_10MB</div><div class='del'>-	u8	auto_mode;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_MODE_NONE         0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_MODE_ALL_SPEEDS   0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_MODE_ONE_SPEED    0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_MODE_ONE_OR_BELOW 0x3UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_MODE_SPEED_MASK   0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_MODE_LAST        PORT_PHY_QCFG_RESP_AUTO_MODE_SPEED_MASK</div><div class='del'>-	u8	auto_pause;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_PAUSE_TX                0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_PAUSE_RX                0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_PAUSE_AUTONEG_PAUSE     0x4UL</div><div class='del'>-	__le16	auto_link_speed;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_100MB 0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_1GB   0xaUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_2GB   0x14UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_2_5GB 0x19UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_10GB  0x64UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_20GB  0xc8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_25GB  0xfaUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_40GB  0x190UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_50GB  0x1f4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_100GB 0x3e8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_10MB  0xffffUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_LAST PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_10MB</div><div class='del'>-	__le16	auto_link_speed_mask;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_100MBHD     0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_100MB       0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_1GBHD       0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_1GB         0x8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_2GB         0x10UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_2_5GB       0x20UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_10GB        0x40UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_20GB        0x80UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_25GB        0x100UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_40GB        0x200UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_50GB        0x400UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_100GB       0x800UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_10MBHD      0x1000UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEED_MASK_10MB        0x2000UL</div><div class='del'>-	u8	wirespeed;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_WIRESPEED_OFF 0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_WIRESPEED_ON  0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_WIRESPEED_LAST PORT_PHY_QCFG_RESP_WIRESPEED_ON</div><div class='del'>-	u8	lpbk;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LPBK_NONE     0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LPBK_LOCAL    0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LPBK_REMOTE   0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LPBK_EXTERNAL 0x3UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LPBK_LAST    PORT_PHY_QCFG_RESP_LPBK_EXTERNAL</div><div class='del'>-	u8	force_pause;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_PAUSE_TX     0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_PAUSE_RX     0x2UL</div><div class='del'>-	u8	module_status;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MODULE_STATUS_NONE          0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MODULE_STATUS_DISABLETX     0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG    0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MODULE_STATUS_PWRDOWN       0x3UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MODULE_STATUS_NOTINSERTED   0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MODULE_STATUS_CURRENTFAULT  0x5UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MODULE_STATUS_OVERHEATED    0x6UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MODULE_STATUS_NOTAPPLICABLE 0xffUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MODULE_STATUS_LAST         PORT_PHY_QCFG_RESP_MODULE_STATUS_NOTAPPLICABLE</div><div class='del'>-	__le32	preemphasis;</div><div class='del'>-	u8	phy_maj;</div><div class='del'>-	u8	phy_min;</div><div class='del'>-	u8	phy_bld;</div><div class='del'>-	u8	phy_type;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_UNKNOWN          0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_BASECR           0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR4          0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_BASELR           0x3UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_BASESR           0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR2          0x5UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKX           0x6UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_BASEKR           0x7UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_BASET            0x8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE           0x9UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_SGMIIEXTPHY      0xaUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_L  0xbUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_S  0xcUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASECR_CA_N  0xdUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_25G_BASESR       0xeUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR4     0xfUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR4     0x10UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR4     0x11UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER4     0x12UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR10    0x13UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASECR4      0x14UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASESR4      0x15UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASELR4      0x16UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_40G_BASEER4      0x17UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_40G_ACTIVE_CABLE 0x18UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASET         0x19UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASESX        0x1aUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_1G_BASECX        0x1bUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASECR4     0x1cUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR4     0x1dUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR4     0x1eUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER4     0x1fUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASECR       0x20UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASESR       0x21UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASELR       0x22UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASEER       0x23UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR2     0x24UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR2     0x25UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR2     0x26UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER2     0x27UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR      0x28UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR      0x29UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR      0x2aUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER      0x2bUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASECR2     0x2cUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR2     0x2dUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR2     0x2eUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER2     0x2fUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASECR8     0x30UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASESR8     0x31UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASELR8     0x32UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASEER8     0x33UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASECR4     0x34UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASESR4     0x35UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASELR4     0x36UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_400G_BASEER4     0x37UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_800G_BASECR8     0x38UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_800G_BASESR8     0x39UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_800G_BASELR8     0x3aUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_800G_BASEER8     0x3bUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_800G_BASEFR8     0x3cUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_800G_BASEDR8     0x3dUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_TYPE_LAST            PORT_PHY_QCFG_RESP_PHY_TYPE_800G_BASEDR8</div><div class='del'>-	u8	media_type;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MEDIA_TYPE_UNKNOWN 0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP      0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC     0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE   0x3UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_MEDIA_TYPE_LAST   PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE</div><div class='del'>-	u8	xcvr_pkg_type;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_PKG_TYPE_XCVR_INTERNAL 0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_PKG_TYPE_XCVR_EXTERNAL 0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_PKG_TYPE_LAST         PORT_PHY_QCFG_RESP_XCVR_PKG_TYPE_XCVR_EXTERNAL</div><div class='del'>-	u8	eee_config_phy_addr;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_ADDR_MASK              0x1fUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PHY_ADDR_SFT               0</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_EEE_CONFIG_MASK            0xe0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_EEE_CONFIG_SFT             5</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_EEE_CONFIG_EEE_ENABLED      0x20UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_EEE_CONFIG_EEE_ACTIVE       0x40UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_EEE_CONFIG_EEE_TX_LPI       0x80UL</div><div class='del'>-	u8	parallel_detect;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_PARALLEL_DETECT     0x1UL</div><div class='del'>-	__le16	link_partner_adv_speeds;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_100MBHD     0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_100MB       0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_1GBHD       0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_1GB         0x8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_2GB         0x10UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_2_5GB       0x20UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_10GB        0x40UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_20GB        0x80UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_25GB        0x100UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_40GB        0x200UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_50GB        0x400UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_100GB       0x800UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_10MBHD      0x1000UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_SPEEDS_10MB        0x2000UL</div><div class='del'>-	u8	link_partner_adv_auto_mode;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_AUTO_MODE_NONE         0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS   0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED    0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW 0x3UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK   0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_AUTO_MODE_LAST        PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK</div><div class='del'>-	u8	link_partner_adv_pause;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_PAUSE_TX     0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_PAUSE_RX     0x2UL</div><div class='del'>-	__le16	adv_eee_link_speed_mask;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ADV_EEE_LINK_SPEED_MASK_RSVD1     0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ADV_EEE_LINK_SPEED_MASK_100MB     0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ADV_EEE_LINK_SPEED_MASK_RSVD2     0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ADV_EEE_LINK_SPEED_MASK_1GB       0x8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ADV_EEE_LINK_SPEED_MASK_RSVD3     0x10UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ADV_EEE_LINK_SPEED_MASK_RSVD4     0x20UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_ADV_EEE_LINK_SPEED_MASK_10GB      0x40UL</div><div class='del'>-	__le16	link_partner_adv_eee_link_speed_mask;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1     0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB     0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2     0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB       0x8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3     0x10UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4     0x20UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB      0x40UL</div><div class='del'>-	__le32	xcvr_identifier_type_tx_lpi_timer;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_TX_LPI_TIMER_MASK            0xffffffUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_TX_LPI_TIMER_SFT             0</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_MASK    0xff000000UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_SFT     24</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_UNKNOWN   (0x0UL &lt;&lt; 24)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_SFP       (0x3UL &lt;&lt; 24)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_QSFP      (0xcUL &lt;&lt; 24)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_QSFPPLUS  (0xdUL &lt;&lt; 24)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_QSFP28    (0x11UL &lt;&lt; 24)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_QSFPDD    (0x18UL &lt;&lt; 24)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_QSFP112   (0x1eUL &lt;&lt; 24)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_SFPDD     (0x1fUL &lt;&lt; 24)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_CSFP      (0x20UL &lt;&lt; 24)</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_LAST     PORT_PHY_QCFG_RESP_XCVR_IDENTIFIER_TYPE_CSFP</div><div class='del'>-	__le16	fec_cfg;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_NONE_SUPPORTED           0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_AUTONEG_SUPPORTED        0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_AUTONEG_ENABLED          0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_CLAUSE74_SUPPORTED       0x8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_CLAUSE74_ENABLED         0x10UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_CLAUSE91_SUPPORTED       0x20UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_CLAUSE91_ENABLED         0x40UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_RS544_1XN_SUPPORTED      0x80UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_RS544_1XN_ENABLED        0x100UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_RS544_IEEE_SUPPORTED     0x200UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_RS544_IEEE_ENABLED       0x400UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_RS272_1XN_SUPPORTED      0x800UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_RS272_1XN_ENABLED        0x1000UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_RS272_IEEE_SUPPORTED     0x2000UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FEC_CFG_FEC_RS272_IEEE_ENABLED       0x4000UL</div><div class='del'>-	u8	duplex_state;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_DUPLEX_STATE_HALF 0x0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_DUPLEX_STATE_FULL 0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_DUPLEX_STATE_LAST PORT_PHY_QCFG_RESP_DUPLEX_STATE_FULL</div><div class='del'>-	u8	option_flags;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_OPTION_FLAGS_MEDIA_AUTO_DETECT     0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_OPTION_FLAGS_SIGNAL_MODE_KNOWN     0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_OPTION_FLAGS_SPEEDS2_SUPPORTED     0x4UL</div><div class='del'>-	char	phy_vendor_name[16];</div><div class='del'>-	char	phy_vendor_partnumber[16];</div><div class='del'>-	__le16	support_pam4_speeds;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_PAM4_SPEEDS_50G      0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_PAM4_SPEEDS_100G     0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_PAM4_SPEEDS_200G     0x4UL</div><div class='del'>-	__le16	force_pam4_link_speed;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_PAM4_LINK_SPEED_50GB  0x1f4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_PAM4_LINK_SPEED_100GB 0x3e8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_PAM4_LINK_SPEED_200GB 0x7d0UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_PAM4_LINK_SPEED_LAST PORT_PHY_QCFG_RESP_FORCE_PAM4_LINK_SPEED_200GB</div><div class='del'>-	__le16	auto_pam4_link_speed_mask;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_PAM4_LINK_SPEED_MASK_50G      0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_PAM4_LINK_SPEED_MASK_100G     0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_PAM4_LINK_SPEED_MASK_200G     0x4UL</div><div class='del'>-	u8	link_partner_pam4_adv_speeds;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_PAM4_ADV_SPEEDS_50GB      0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_PAM4_ADV_SPEEDS_100GB     0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_PARTNER_PAM4_ADV_SPEEDS_200GB     0x4UL</div><div class='del'>-	u8	link_down_reason;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_LINK_DOWN_REASON_RF     0x1UL</div><div class='del'>-	__le16	support_speeds2;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_1GB                0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_10GB               0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_25GB               0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_40GB               0x8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_50GB               0x10UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_100GB              0x20UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_50GB_PAM4_56       0x40UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_100GB_PAM4_56      0x80UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_200GB_PAM4_56      0x100UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_400GB_PAM4_56      0x200UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_100GB_PAM4_112     0x400UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_200GB_PAM4_112     0x800UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_400GB_PAM4_112     0x1000UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_SUPPORT_SPEEDS2_800GB_PAM4_112     0x2000UL</div><div class='del'>-	__le16	force_link_speeds2;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_1GB            0xaUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_10GB           0x64UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_25GB           0xfaUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_40GB           0x190UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_50GB           0x1f4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_100GB          0x3e8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_50GB_PAM4_56   0x1f5UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_100GB_PAM4_56  0x3e9UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_200GB_PAM4_56  0x7d1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_400GB_PAM4_56  0xfa1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_100GB_PAM4_112 0x3eaUL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_200GB_PAM4_112 0x7d2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_400GB_PAM4_112 0xfa2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_800GB_PAM4_112 0x1f42UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_LAST          PORT_PHY_QCFG_RESP_FORCE_LINK_SPEEDS2_800GB_PAM4_112</div><div class='del'>-	__le16	auto_link_speeds2;</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_1GB                0x1UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_10GB               0x2UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_25GB               0x4UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_40GB               0x8UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_50GB               0x10UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_100GB              0x20UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_50GB_PAM4_56       0x40UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_100GB_PAM4_56      0x80UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_200GB_PAM4_56      0x100UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_400GB_PAM4_56      0x200UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_100GB_PAM4_112     0x400UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_200GB_PAM4_112     0x800UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_400GB_PAM4_112     0x1000UL</div><div class='del'>-	#define PORT_PHY_QCFG_RESP_AUTO_LINK_SPEEDS2_800GB_PAM4_112     0x2000UL</div><div class='del'>-	u8	active_lanes;</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_mac_cfg_input (size:448b/56B) */</div><div class='del'>-struct hwrm_port_mac_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_MATCH_LINK                    0x1UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_VLAN_PRI2COS_ENABLE           0x2UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_TUNNEL_PRI2COS_ENABLE         0x4UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_IP_DSCP2COS_ENABLE            0x8UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_ENABLE      0x10UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_DISABLE     0x20UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_ENABLE      0x40UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_DISABLE     0x80UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_OOB_WOL_ENABLE                0x100UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_OOB_WOL_DISABLE               0x200UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_VLAN_PRI2COS_DISABLE          0x400UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_TUNNEL_PRI2COS_DISABLE        0x800UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_IP_DSCP2COS_DISABLE           0x1000UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_PTP_ONE_STEP_TX_TS            0x2000UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_ENABLE      0x4000UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_DISABLE     0x8000UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_IPG                            0x1UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_LPBK                           0x2UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_VLAN_PRI2COS_MAP_PRI           0x4UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_TUNNEL_PRI2COS_MAP_PRI         0x10UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_DSCP2COS_MAP_PRI               0x20UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_RX_TS_CAPTURE_PTP_MSG_TYPE     0x40UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_TX_TS_CAPTURE_PTP_MSG_TYPE     0x80UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_COS_FIELD_CFG                  0x100UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_PTP_FREQ_ADJ_PPB               0x200UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_PTP_ADJ_PHASE                  0x400UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_ENABLES_PTP_LOAD_CONTROL               0x800UL</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	ipg;</div><div class='del'>-	u8	lpbk;</div><div class='del'>-	#define PORT_MAC_CFG_REQ_LPBK_NONE   0x0UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_LPBK_LOCAL  0x1UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_LPBK_REMOTE 0x2UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_LPBK_LAST  PORT_MAC_CFG_REQ_LPBK_REMOTE</div><div class='del'>-	u8	vlan_pri2cos_map_pri;</div><div class='del'>-	u8	reserved1;</div><div class='del'>-	u8	tunnel_pri2cos_map_pri;</div><div class='del'>-	u8	dscp2pri_map_pri;</div><div class='del'>-	__le16	rx_ts_capture_ptp_msg_type;</div><div class='del'>-	__le16	tx_ts_capture_ptp_msg_type;</div><div class='del'>-	u8	cos_field_cfg;</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_RSVD1                     0x1UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_MASK         0x6UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_SFT          1</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_INNERMOST      (0x0UL &lt;&lt; 1)</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_OUTER          (0x1UL &lt;&lt; 1)</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_OUTERMOST      (0x2UL &lt;&lt; 1)</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_UNSPECIFIED    (0x3UL &lt;&lt; 1)</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_LAST          PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_UNSPECIFIED</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_MASK       0x18UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_SFT        3</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_INNERMOST    (0x0UL &lt;&lt; 3)</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_OUTER        (0x1UL &lt;&lt; 3)</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_OUTERMOST    (0x2UL &lt;&lt; 3)</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_UNSPECIFIED  (0x3UL &lt;&lt; 3)</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_LAST        PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_UNSPECIFIED</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_DEFAULT_COS_MASK          0xe0UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_COS_FIELD_CFG_DEFAULT_COS_SFT           5</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	__le32	ptp_freq_adj_ppb;</div><div class='del'>-	u8	unused_1[3];</div><div class='del'>-	u8	ptp_load_control;</div><div class='del'>-	#define PORT_MAC_CFG_REQ_PTP_LOAD_CONTROL_NONE      0x0UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_PTP_LOAD_CONTROL_IMMEDIATE 0x1UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_PTP_LOAD_CONTROL_PPS_EVENT 0x2UL</div><div class='del'>-	#define PORT_MAC_CFG_REQ_PTP_LOAD_CONTROL_LAST     PORT_MAC_CFG_REQ_PTP_LOAD_CONTROL_PPS_EVENT</div><div class='del'>-	__le64	ptp_adj_phase;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_mac_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_mac_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	mru;</div><div class='del'>-	__le16	mtu;</div><div class='del'>-	u8	ipg;</div><div class='del'>-	u8	lpbk;</div><div class='del'>-	#define PORT_MAC_CFG_RESP_LPBK_NONE   0x0UL</div><div class='del'>-	#define PORT_MAC_CFG_RESP_LPBK_LOCAL  0x1UL</div><div class='del'>-	#define PORT_MAC_CFG_RESP_LPBK_REMOTE 0x2UL</div><div class='del'>-	#define PORT_MAC_CFG_RESP_LPBK_LAST  PORT_MAC_CFG_RESP_LPBK_REMOTE</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_mac_ptp_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_port_mac_ptp_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_mac_ptp_qcfg_output (size:704b/88B) */</div><div class='del'>-struct hwrm_port_mac_ptp_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define PORT_MAC_PTP_QCFG_RESP_FLAGS_DIRECT_ACCESS                       0x1UL</div><div class='del'>-	#define PORT_MAC_PTP_QCFG_RESP_FLAGS_ONE_STEP_TX_TS                      0x4UL</div><div class='del'>-	#define PORT_MAC_PTP_QCFG_RESP_FLAGS_HWRM_ACCESS                         0x8UL</div><div class='del'>-	#define PORT_MAC_PTP_QCFG_RESP_FLAGS_PARTIAL_DIRECT_ACCESS_REF_CLOCK     0x10UL</div><div class='del'>-	#define PORT_MAC_PTP_QCFG_RESP_FLAGS_RTC_CONFIGURED                      0x20UL</div><div class='del'>-	#define PORT_MAC_PTP_QCFG_RESP_FLAGS_64B_PHC_TIME                        0x40UL</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	__le32	rx_ts_reg_off_lower;</div><div class='del'>-	__le32	rx_ts_reg_off_upper;</div><div class='del'>-	__le32	rx_ts_reg_off_seq_id;</div><div class='del'>-	__le32	rx_ts_reg_off_src_id_0;</div><div class='del'>-	__le32	rx_ts_reg_off_src_id_1;</div><div class='del'>-	__le32	rx_ts_reg_off_src_id_2;</div><div class='del'>-	__le32	rx_ts_reg_off_domain_id;</div><div class='del'>-	__le32	rx_ts_reg_off_fifo;</div><div class='del'>-	__le32	rx_ts_reg_off_fifo_adv;</div><div class='del'>-	__le32	rx_ts_reg_off_granularity;</div><div class='del'>-	__le32	tx_ts_reg_off_lower;</div><div class='del'>-	__le32	tx_ts_reg_off_upper;</div><div class='del'>-	__le32	tx_ts_reg_off_seq_id;</div><div class='del'>-	__le32	tx_ts_reg_off_fifo;</div><div class='del'>-	__le32	tx_ts_reg_off_granularity;</div><div class='del'>-	__le32	ts_ref_clock_reg_lower;</div><div class='del'>-	__le32	ts_ref_clock_reg_upper;</div><div class='del'>-	u8	unused_1[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* tx_port_stats (size:3264b/408B) */</div><div class='del'>-struct tx_port_stats {</div><div class='del'>-	__le64	tx_64b_frames;</div><div class='del'>-	__le64	tx_65b_127b_frames;</div><div class='del'>-	__le64	tx_128b_255b_frames;</div><div class='del'>-	__le64	tx_256b_511b_frames;</div><div class='del'>-	__le64	tx_512b_1023b_frames;</div><div class='del'>-	__le64	tx_1024b_1518b_frames;</div><div class='del'>-	__le64	tx_good_vlan_frames;</div><div class='del'>-	__le64	tx_1519b_2047b_frames;</div><div class='del'>-	__le64	tx_2048b_4095b_frames;</div><div class='del'>-	__le64	tx_4096b_9216b_frames;</div><div class='del'>-	__le64	tx_9217b_16383b_frames;</div><div class='del'>-	__le64	tx_good_frames;</div><div class='del'>-	__le64	tx_total_frames;</div><div class='del'>-	__le64	tx_ucast_frames;</div><div class='del'>-	__le64	tx_mcast_frames;</div><div class='del'>-	__le64	tx_bcast_frames;</div><div class='del'>-	__le64	tx_pause_frames;</div><div class='del'>-	__le64	tx_pfc_frames;</div><div class='del'>-	__le64	tx_jabber_frames;</div><div class='del'>-	__le64	tx_fcs_err_frames;</div><div class='del'>-	__le64	tx_control_frames;</div><div class='del'>-	__le64	tx_oversz_frames;</div><div class='del'>-	__le64	tx_single_dfrl_frames;</div><div class='del'>-	__le64	tx_multi_dfrl_frames;</div><div class='del'>-	__le64	tx_single_coll_frames;</div><div class='del'>-	__le64	tx_multi_coll_frames;</div><div class='del'>-	__le64	tx_late_coll_frames;</div><div class='del'>-	__le64	tx_excessive_coll_frames;</div><div class='del'>-	__le64	tx_frag_frames;</div><div class='del'>-	__le64	tx_err;</div><div class='del'>-	__le64	tx_tagged_frames;</div><div class='del'>-	__le64	tx_dbl_tagged_frames;</div><div class='del'>-	__le64	tx_runt_frames;</div><div class='del'>-	__le64	tx_fifo_underruns;</div><div class='del'>-	__le64	tx_pfc_ena_frames_pri0;</div><div class='del'>-	__le64	tx_pfc_ena_frames_pri1;</div><div class='del'>-	__le64	tx_pfc_ena_frames_pri2;</div><div class='del'>-	__le64	tx_pfc_ena_frames_pri3;</div><div class='del'>-	__le64	tx_pfc_ena_frames_pri4;</div><div class='del'>-	__le64	tx_pfc_ena_frames_pri5;</div><div class='del'>-	__le64	tx_pfc_ena_frames_pri6;</div><div class='del'>-	__le64	tx_pfc_ena_frames_pri7;</div><div class='del'>-	__le64	tx_eee_lpi_events;</div><div class='del'>-	__le64	tx_eee_lpi_duration;</div><div class='del'>-	__le64	tx_llfc_logical_msgs;</div><div class='del'>-	__le64	tx_hcfc_msgs;</div><div class='del'>-	__le64	tx_total_collisions;</div><div class='del'>-	__le64	tx_bytes;</div><div class='del'>-	__le64	tx_xthol_frames;</div><div class='del'>-	__le64	tx_stat_discard;</div><div class='del'>-	__le64	tx_stat_error;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* rx_port_stats (size:4224b/528B) */</div><div class='del'>-struct rx_port_stats {</div><div class='del'>-	__le64	rx_64b_frames;</div><div class='del'>-	__le64	rx_65b_127b_frames;</div><div class='del'>-	__le64	rx_128b_255b_frames;</div><div class='del'>-	__le64	rx_256b_511b_frames;</div><div class='del'>-	__le64	rx_512b_1023b_frames;</div><div class='del'>-	__le64	rx_1024b_1518b_frames;</div><div class='del'>-	__le64	rx_good_vlan_frames;</div><div class='del'>-	__le64	rx_1519b_2047b_frames;</div><div class='del'>-	__le64	rx_2048b_4095b_frames;</div><div class='del'>-	__le64	rx_4096b_9216b_frames;</div><div class='del'>-	__le64	rx_9217b_16383b_frames;</div><div class='del'>-	__le64	rx_total_frames;</div><div class='del'>-	__le64	rx_ucast_frames;</div><div class='del'>-	__le64	rx_mcast_frames;</div><div class='del'>-	__le64	rx_bcast_frames;</div><div class='del'>-	__le64	rx_fcs_err_frames;</div><div class='del'>-	__le64	rx_ctrl_frames;</div><div class='del'>-	__le64	rx_pause_frames;</div><div class='del'>-	__le64	rx_pfc_frames;</div><div class='del'>-	__le64	rx_unsupported_opcode_frames;</div><div class='del'>-	__le64	rx_unsupported_da_pausepfc_frames;</div><div class='del'>-	__le64	rx_wrong_sa_frames;</div><div class='del'>-	__le64	rx_align_err_frames;</div><div class='del'>-	__le64	rx_oor_len_frames;</div><div class='del'>-	__le64	rx_code_err_frames;</div><div class='del'>-	__le64	rx_false_carrier_frames;</div><div class='del'>-	__le64	rx_ovrsz_frames;</div><div class='del'>-	__le64	rx_jbr_frames;</div><div class='del'>-	__le64	rx_mtu_err_frames;</div><div class='del'>-	__le64	rx_match_crc_frames;</div><div class='del'>-	__le64	rx_promiscuous_frames;</div><div class='del'>-	__le64	rx_tagged_frames;</div><div class='del'>-	__le64	rx_double_tagged_frames;</div><div class='del'>-	__le64	rx_trunc_frames;</div><div class='del'>-	__le64	rx_good_frames;</div><div class='del'>-	__le64	rx_pfc_xon2xoff_frames_pri0;</div><div class='del'>-	__le64	rx_pfc_xon2xoff_frames_pri1;</div><div class='del'>-	__le64	rx_pfc_xon2xoff_frames_pri2;</div><div class='del'>-	__le64	rx_pfc_xon2xoff_frames_pri3;</div><div class='del'>-	__le64	rx_pfc_xon2xoff_frames_pri4;</div><div class='del'>-	__le64	rx_pfc_xon2xoff_frames_pri5;</div><div class='del'>-	__le64	rx_pfc_xon2xoff_frames_pri6;</div><div class='del'>-	__le64	rx_pfc_xon2xoff_frames_pri7;</div><div class='del'>-	__le64	rx_pfc_ena_frames_pri0;</div><div class='del'>-	__le64	rx_pfc_ena_frames_pri1;</div><div class='del'>-	__le64	rx_pfc_ena_frames_pri2;</div><div class='del'>-	__le64	rx_pfc_ena_frames_pri3;</div><div class='del'>-	__le64	rx_pfc_ena_frames_pri4;</div><div class='del'>-	__le64	rx_pfc_ena_frames_pri5;</div><div class='del'>-	__le64	rx_pfc_ena_frames_pri6;</div><div class='del'>-	__le64	rx_pfc_ena_frames_pri7;</div><div class='del'>-	__le64	rx_sch_crc_err_frames;</div><div class='del'>-	__le64	rx_undrsz_frames;</div><div class='del'>-	__le64	rx_frag_frames;</div><div class='del'>-	__le64	rx_eee_lpi_events;</div><div class='del'>-	__le64	rx_eee_lpi_duration;</div><div class='del'>-	__le64	rx_llfc_physical_msgs;</div><div class='del'>-	__le64	rx_llfc_logical_msgs;</div><div class='del'>-	__le64	rx_llfc_msgs_with_crc_err;</div><div class='del'>-	__le64	rx_hcfc_msgs;</div><div class='del'>-	__le64	rx_hcfc_msgs_with_crc_err;</div><div class='del'>-	__le64	rx_bytes;</div><div class='del'>-	__le64	rx_runt_bytes;</div><div class='del'>-	__le64	rx_runt_frames;</div><div class='del'>-	__le64	rx_stat_discard;</div><div class='del'>-	__le64	rx_stat_err;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_qstats_input (size:320b/40B) */</div><div class='del'>-struct hwrm_port_qstats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define PORT_QSTATS_REQ_FLAGS_COUNTER_MASK     0x1UL</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	__le64	tx_stat_host_addr;</div><div class='del'>-	__le64	rx_stat_host_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_qstats_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_qstats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	tx_stat_size;</div><div class='del'>-	__le16	rx_stat_size;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define PORT_QSTATS_RESP_FLAGS_CLEARED     0x1UL</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* tx_port_stats_ext (size:2048b/256B) */</div><div class='del'>-struct tx_port_stats_ext {</div><div class='del'>-	__le64	tx_bytes_cos0;</div><div class='del'>-	__le64	tx_bytes_cos1;</div><div class='del'>-	__le64	tx_bytes_cos2;</div><div class='del'>-	__le64	tx_bytes_cos3;</div><div class='del'>-	__le64	tx_bytes_cos4;</div><div class='del'>-	__le64	tx_bytes_cos5;</div><div class='del'>-	__le64	tx_bytes_cos6;</div><div class='del'>-	__le64	tx_bytes_cos7;</div><div class='del'>-	__le64	tx_packets_cos0;</div><div class='del'>-	__le64	tx_packets_cos1;</div><div class='del'>-	__le64	tx_packets_cos2;</div><div class='del'>-	__le64	tx_packets_cos3;</div><div class='del'>-	__le64	tx_packets_cos4;</div><div class='del'>-	__le64	tx_packets_cos5;</div><div class='del'>-	__le64	tx_packets_cos6;</div><div class='del'>-	__le64	tx_packets_cos7;</div><div class='del'>-	__le64	pfc_pri0_tx_duration_us;</div><div class='del'>-	__le64	pfc_pri0_tx_transitions;</div><div class='del'>-	__le64	pfc_pri1_tx_duration_us;</div><div class='del'>-	__le64	pfc_pri1_tx_transitions;</div><div class='del'>-	__le64	pfc_pri2_tx_duration_us;</div><div class='del'>-	__le64	pfc_pri2_tx_transitions;</div><div class='del'>-	__le64	pfc_pri3_tx_duration_us;</div><div class='del'>-	__le64	pfc_pri3_tx_transitions;</div><div class='del'>-	__le64	pfc_pri4_tx_duration_us;</div><div class='del'>-	__le64	pfc_pri4_tx_transitions;</div><div class='del'>-	__le64	pfc_pri5_tx_duration_us;</div><div class='del'>-	__le64	pfc_pri5_tx_transitions;</div><div class='del'>-	__le64	pfc_pri6_tx_duration_us;</div><div class='del'>-	__le64	pfc_pri6_tx_transitions;</div><div class='del'>-	__le64	pfc_pri7_tx_duration_us;</div><div class='del'>-	__le64	pfc_pri7_tx_transitions;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* rx_port_stats_ext (size:3904b/488B) */</div><div class='del'>-struct rx_port_stats_ext {</div><div class='del'>-	__le64	link_down_events;</div><div class='del'>-	__le64	continuous_pause_events;</div><div class='del'>-	__le64	resume_pause_events;</div><div class='del'>-	__le64	continuous_roce_pause_events;</div><div class='del'>-	__le64	resume_roce_pause_events;</div><div class='del'>-	__le64	rx_bytes_cos0;</div><div class='del'>-	__le64	rx_bytes_cos1;</div><div class='del'>-	__le64	rx_bytes_cos2;</div><div class='del'>-	__le64	rx_bytes_cos3;</div><div class='del'>-	__le64	rx_bytes_cos4;</div><div class='del'>-	__le64	rx_bytes_cos5;</div><div class='del'>-	__le64	rx_bytes_cos6;</div><div class='del'>-	__le64	rx_bytes_cos7;</div><div class='del'>-	__le64	rx_packets_cos0;</div><div class='del'>-	__le64	rx_packets_cos1;</div><div class='del'>-	__le64	rx_packets_cos2;</div><div class='del'>-	__le64	rx_packets_cos3;</div><div class='del'>-	__le64	rx_packets_cos4;</div><div class='del'>-	__le64	rx_packets_cos5;</div><div class='del'>-	__le64	rx_packets_cos6;</div><div class='del'>-	__le64	rx_packets_cos7;</div><div class='del'>-	__le64	pfc_pri0_rx_duration_us;</div><div class='del'>-	__le64	pfc_pri0_rx_transitions;</div><div class='del'>-	__le64	pfc_pri1_rx_duration_us;</div><div class='del'>-	__le64	pfc_pri1_rx_transitions;</div><div class='del'>-	__le64	pfc_pri2_rx_duration_us;</div><div class='del'>-	__le64	pfc_pri2_rx_transitions;</div><div class='del'>-	__le64	pfc_pri3_rx_duration_us;</div><div class='del'>-	__le64	pfc_pri3_rx_transitions;</div><div class='del'>-	__le64	pfc_pri4_rx_duration_us;</div><div class='del'>-	__le64	pfc_pri4_rx_transitions;</div><div class='del'>-	__le64	pfc_pri5_rx_duration_us;</div><div class='del'>-	__le64	pfc_pri5_rx_transitions;</div><div class='del'>-	__le64	pfc_pri6_rx_duration_us;</div><div class='del'>-	__le64	pfc_pri6_rx_transitions;</div><div class='del'>-	__le64	pfc_pri7_rx_duration_us;</div><div class='del'>-	__le64	pfc_pri7_rx_transitions;</div><div class='del'>-	__le64	rx_bits;</div><div class='del'>-	__le64	rx_buffer_passed_threshold;</div><div class='del'>-	__le64	rx_pcs_symbol_err;</div><div class='del'>-	__le64	rx_corrected_bits;</div><div class='del'>-	__le64	rx_discard_bytes_cos0;</div><div class='del'>-	__le64	rx_discard_bytes_cos1;</div><div class='del'>-	__le64	rx_discard_bytes_cos2;</div><div class='del'>-	__le64	rx_discard_bytes_cos3;</div><div class='del'>-	__le64	rx_discard_bytes_cos4;</div><div class='del'>-	__le64	rx_discard_bytes_cos5;</div><div class='del'>-	__le64	rx_discard_bytes_cos6;</div><div class='del'>-	__le64	rx_discard_bytes_cos7;</div><div class='del'>-	__le64	rx_discard_packets_cos0;</div><div class='del'>-	__le64	rx_discard_packets_cos1;</div><div class='del'>-	__le64	rx_discard_packets_cos2;</div><div class='del'>-	__le64	rx_discard_packets_cos3;</div><div class='del'>-	__le64	rx_discard_packets_cos4;</div><div class='del'>-	__le64	rx_discard_packets_cos5;</div><div class='del'>-	__le64	rx_discard_packets_cos6;</div><div class='del'>-	__le64	rx_discard_packets_cos7;</div><div class='del'>-	__le64	rx_fec_corrected_blocks;</div><div class='del'>-	__le64	rx_fec_uncorrectable_blocks;</div><div class='del'>-	__le64	rx_filter_miss;</div><div class='del'>-	__le64	rx_fec_symbol_err;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_qstats_ext_input (size:320b/40B) */</div><div class='del'>-struct hwrm_port_qstats_ext_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	__le16	tx_stat_size;</div><div class='del'>-	__le16	rx_stat_size;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define PORT_QSTATS_EXT_REQ_FLAGS_COUNTER_MASK     0x1UL</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le64	tx_stat_host_addr;</div><div class='del'>-	__le64	rx_stat_host_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_qstats_ext_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_qstats_ext_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	tx_stat_size;</div><div class='del'>-	__le16	rx_stat_size;</div><div class='del'>-	__le16	total_active_cos_queues;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define PORT_QSTATS_EXT_RESP_FLAGS_CLEAR_ROCE_COUNTERS_SUPPORTED     0x1UL</div><div class='del'>-	#define PORT_QSTATS_EXT_RESP_FLAGS_CLEARED                           0x2UL</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_lpbk_qstats_input (size:256b/32B) */</div><div class='del'>-struct hwrm_port_lpbk_qstats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	lpbk_stat_size;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define PORT_LPBK_QSTATS_REQ_FLAGS_COUNTER_MASK     0x1UL</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	__le64	lpbk_stat_host_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_lpbk_qstats_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_lpbk_qstats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	lpbk_stat_size;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* port_lpbk_stats (size:640b/80B) */</div><div class='del'>-struct port_lpbk_stats {</div><div class='del'>-	__le64	lpbk_ucast_frames;</div><div class='del'>-	__le64	lpbk_mcast_frames;</div><div class='del'>-	__le64	lpbk_bcast_frames;</div><div class='del'>-	__le64	lpbk_ucast_bytes;</div><div class='del'>-	__le64	lpbk_mcast_bytes;</div><div class='del'>-	__le64	lpbk_bcast_bytes;</div><div class='del'>-	__le64	lpbk_tx_discards;</div><div class='del'>-	__le64	lpbk_tx_errors;</div><div class='del'>-	__le64	lpbk_rx_discards;</div><div class='del'>-	__le64	lpbk_rx_errors;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_ecn_qstats_input (size:256b/32B) */</div><div class='del'>-struct hwrm_port_ecn_qstats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	__le16	ecn_stat_buf_size;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define PORT_ECN_QSTATS_REQ_FLAGS_COUNTER_MASK     0x1UL</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	__le64	ecn_stat_host_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_ecn_qstats_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_ecn_qstats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	ecn_stat_buf_size;</div><div class='del'>-	u8	mark_en;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* port_stats_ecn (size:512b/64B) */</div><div class='del'>-struct port_stats_ecn {</div><div class='del'>-	__le64	mark_cnt_cos0;</div><div class='del'>-	__le64	mark_cnt_cos1;</div><div class='del'>-	__le64	mark_cnt_cos2;</div><div class='del'>-	__le64	mark_cnt_cos3;</div><div class='del'>-	__le64	mark_cnt_cos4;</div><div class='del'>-	__le64	mark_cnt_cos5;</div><div class='del'>-	__le64	mark_cnt_cos6;</div><div class='del'>-	__le64	mark_cnt_cos7;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_clr_stats_input (size:192b/24B) */</div><div class='del'>-struct hwrm_port_clr_stats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define PORT_CLR_STATS_REQ_FLAGS_ROCE_COUNTERS     0x1UL</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_clr_stats_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_clr_stats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_lpbk_clr_stats_input (size:192b/24B) */</div><div class='del'>-struct hwrm_port_lpbk_clr_stats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_lpbk_clr_stats_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_lpbk_clr_stats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_ts_query_input (size:320b/40B) */</div><div class='del'>-struct hwrm_port_ts_query_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define PORT_TS_QUERY_REQ_FLAGS_PATH             0x1UL</div><div class='del'>-	#define PORT_TS_QUERY_REQ_FLAGS_PATH_TX            0x0UL</div><div class='del'>-	#define PORT_TS_QUERY_REQ_FLAGS_PATH_RX            0x1UL</div><div class='del'>-	#define PORT_TS_QUERY_REQ_FLAGS_PATH_LAST         PORT_TS_QUERY_REQ_FLAGS_PATH_RX</div><div class='del'>-	#define PORT_TS_QUERY_REQ_FLAGS_CURRENT_TIME     0x2UL</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	__le16	enables;</div><div class='del'>-	#define PORT_TS_QUERY_REQ_ENABLES_TS_REQ_TIMEOUT     0x1UL</div><div class='del'>-	#define PORT_TS_QUERY_REQ_ENABLES_PTP_SEQ_ID         0x2UL</div><div class='del'>-	#define PORT_TS_QUERY_REQ_ENABLES_PTP_HDR_OFFSET     0x4UL</div><div class='del'>-	__le16	ts_req_timeout;</div><div class='del'>-	__le32	ptp_seq_id;</div><div class='del'>-	__le16	ptp_hdr_offset;</div><div class='del'>-	u8	unused_1[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_ts_query_output (size:192b/24B) */</div><div class='del'>-struct hwrm_port_ts_query_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	ptp_msg_ts;</div><div class='del'>-	__le16	ptp_msg_seqid;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_qcaps_input (size:192b/24B) */</div><div class='del'>-struct hwrm_port_phy_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_qcaps_output (size:320b/40B) */</div><div class='del'>-struct hwrm_port_phy_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS_EEE_SUPPORTED                    0x1UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS_EXTERNAL_LPBK_SUPPORTED          0x2UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS_AUTONEG_LPBK_SUPPORTED           0x4UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS_SHARED_PHY_CFG_SUPPORTED         0x8UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS_CUMULATIVE_COUNTERS_ON_RESET     0x10UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS_LOCAL_LPBK_NOT_SUPPORTED         0x20UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS_FW_MANAGED_LINK_DOWN             0x40UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS_NO_FCS                           0x80UL</div><div class='del'>-	u8	port_cnt;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_PORT_CNT_UNKNOWN 0x0UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_PORT_CNT_1       0x1UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_PORT_CNT_2       0x2UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_PORT_CNT_3       0x3UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_PORT_CNT_4       0x4UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_PORT_CNT_12      0xcUL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_PORT_CNT_LAST   PORT_PHY_QCAPS_RESP_PORT_CNT_12</div><div class='del'>-	__le16	supported_speeds_force_mode;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_100MBHD     0x1UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_100MB       0x2UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_1GBHD       0x4UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_1GB         0x8UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_2GB         0x10UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_2_5GB       0x20UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_10GB        0x40UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_20GB        0x80UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_25GB        0x100UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_40GB        0x200UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_50GB        0x400UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_100GB       0x800UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_10MBHD      0x1000UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_FORCE_MODE_10MB        0x2000UL</div><div class='del'>-	__le16	supported_speeds_auto_mode;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_100MBHD     0x1UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_100MB       0x2UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_1GBHD       0x4UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_1GB         0x8UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_2GB         0x10UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_2_5GB       0x20UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_10GB        0x40UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_20GB        0x80UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_25GB        0x100UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_40GB        0x200UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_50GB        0x400UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_100GB       0x800UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_10MBHD      0x1000UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_AUTO_MODE_10MB        0x2000UL</div><div class='del'>-	__le16	supported_speeds_eee_mode;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_EEE_MODE_RSVD1     0x1UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_EEE_MODE_100MB     0x2UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_EEE_MODE_RSVD2     0x4UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_EEE_MODE_1GB       0x8UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_EEE_MODE_RSVD3     0x10UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_EEE_MODE_RSVD4     0x20UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS_EEE_MODE_10GB      0x40UL</div><div class='del'>-	__le32	tx_lpi_timer_low;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_TX_LPI_TIMER_LOW_MASK 0xffffffUL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_TX_LPI_TIMER_LOW_SFT 0</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_RSVD2_MASK           0xff000000UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_RSVD2_SFT            24</div><div class='del'>-	__le32	valid_tx_lpi_timer_high;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_TX_LPI_TIMER_HIGH_MASK 0xffffffUL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_TX_LPI_TIMER_HIGH_SFT 0</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_RSVD_MASK             0xff000000UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_RSVD_SFT              24</div><div class='del'>-	__le16	supported_pam4_speeds_auto_mode;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_AUTO_MODE_50G      0x1UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_AUTO_MODE_100G     0x2UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_AUTO_MODE_200G     0x4UL</div><div class='del'>-	__le16	supported_pam4_speeds_force_mode;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_FORCE_MODE_50G      0x1UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_FORCE_MODE_100G     0x2UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_FORCE_MODE_200G     0x4UL</div><div class='del'>-	__le16	flags2;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS2_PAUSE_UNSUPPORTED           0x1UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS2_PFC_UNSUPPORTED             0x2UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS2_BANK_ADDR_SUPPORTED         0x4UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS2_SPEEDS2_SUPPORTED           0x8UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_FLAGS2_REMOTE_LPBK_UNSUPPORTED     0x10UL</div><div class='del'>-	u8	internal_port_cnt;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	supported_speeds2_force_mode;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_1GB                0x1UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_10GB               0x2UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_25GB               0x4UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_40GB               0x8UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_50GB               0x10UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_100GB              0x20UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_50GB_PAM4_56       0x40UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_100GB_PAM4_56      0x80UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_200GB_PAM4_56      0x100UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_400GB_PAM4_56      0x200UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_100GB_PAM4_112     0x400UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_200GB_PAM4_112     0x800UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_400GB_PAM4_112     0x1000UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_FORCE_MODE_800GB_PAM4_112     0x2000UL</div><div class='del'>-	__le16	supported_speeds2_auto_mode;</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_1GB                0x1UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_10GB               0x2UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_25GB               0x4UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_40GB               0x8UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_50GB               0x10UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_100GB              0x20UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_50GB_PAM4_56       0x40UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_100GB_PAM4_56      0x80UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_200GB_PAM4_56      0x100UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_400GB_PAM4_56      0x200UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_100GB_PAM4_112     0x400UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_200GB_PAM4_112     0x800UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_400GB_PAM4_112     0x1000UL</div><div class='del'>-	#define PORT_PHY_QCAPS_RESP_SUPPORTED_SPEEDS2_AUTO_MODE_800GB_PAM4_112     0x2000UL</div><div class='del'>-	u8	unused_1[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_i2c_read_input (size:320b/40B) */</div><div class='del'>-struct hwrm_port_phy_i2c_read_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET     0x1UL</div><div class='del'>-	#define PORT_PHY_I2C_READ_REQ_ENABLES_BANK_NUMBER     0x2UL</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	i2c_slave_addr;</div><div class='del'>-	u8	bank_number;</div><div class='del'>-	__le16	page_number;</div><div class='del'>-	__le16	page_offset;</div><div class='del'>-	u8	data_length;</div><div class='del'>-	u8	unused_1[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_i2c_read_output (size:640b/80B) */</div><div class='del'>-struct hwrm_port_phy_i2c_read_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	data[16];</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_mdio_write_input (size:320b/40B) */</div><div class='del'>-struct hwrm_port_phy_mdio_write_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	unused_0[2];</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	phy_addr;</div><div class='del'>-	u8	dev_addr;</div><div class='del'>-	__le16	reg_addr;</div><div class='del'>-	__le16	reg_data;</div><div class='del'>-	u8	cl45_mdio;</div><div class='del'>-	u8	unused_1[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_mdio_write_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_phy_mdio_write_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_mdio_read_input (size:256b/32B) */</div><div class='del'>-struct hwrm_port_phy_mdio_read_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	unused_0[2];</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	phy_addr;</div><div class='del'>-	u8	dev_addr;</div><div class='del'>-	__le16	reg_addr;</div><div class='del'>-	u8	cl45_mdio;</div><div class='del'>-	u8	unused_1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_phy_mdio_read_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_phy_mdio_read_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	reg_data;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_led_cfg_input (size:512b/64B) */</div><div class='del'>-struct hwrm_port_led_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED0_ID            0x1UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED0_STATE         0x2UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED0_COLOR         0x4UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED0_BLINK_ON      0x8UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED0_BLINK_OFF     0x10UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED0_GROUP_ID      0x20UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED1_ID            0x40UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED1_STATE         0x80UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED1_COLOR         0x100UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED1_BLINK_ON      0x200UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED1_BLINK_OFF     0x400UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED1_GROUP_ID      0x800UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED2_ID            0x1000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED2_STATE         0x2000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED2_COLOR         0x4000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED2_BLINK_ON      0x8000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED2_BLINK_OFF     0x10000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED2_GROUP_ID      0x20000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED3_ID            0x40000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED3_STATE         0x80000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED3_COLOR         0x100000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED3_BLINK_ON      0x200000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED3_BLINK_OFF     0x400000UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_ENABLES_LED3_GROUP_ID      0x800000UL</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	num_leds;</div><div class='del'>-	u8	rsvd;</div><div class='del'>-	u8	led0_id;</div><div class='del'>-	u8	led0_state;</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_STATE_DEFAULT  0x0UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_STATE_OFF      0x1UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_STATE_ON       0x2UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_STATE_BLINK    0x3UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_STATE_BLINKALT 0x4UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_STATE_LAST    PORT_LED_CFG_REQ_LED0_STATE_BLINKALT</div><div class='del'>-	u8	led0_color;</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_COLOR_DEFAULT    0x0UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_COLOR_AMBER      0x1UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_COLOR_GREEN      0x2UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_COLOR_GREENAMBER 0x3UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED0_COLOR_LAST      PORT_LED_CFG_REQ_LED0_COLOR_GREENAMBER</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	led0_blink_on;</div><div class='del'>-	__le16	led0_blink_off;</div><div class='del'>-	u8	led0_group_id;</div><div class='del'>-	u8	rsvd0;</div><div class='del'>-	u8	led1_id;</div><div class='del'>-	u8	led1_state;</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_STATE_DEFAULT  0x0UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_STATE_OFF      0x1UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_STATE_ON       0x2UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_STATE_BLINK    0x3UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_STATE_BLINKALT 0x4UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_STATE_LAST    PORT_LED_CFG_REQ_LED1_STATE_BLINKALT</div><div class='del'>-	u8	led1_color;</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_COLOR_DEFAULT    0x0UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_COLOR_AMBER      0x1UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_COLOR_GREEN      0x2UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_COLOR_GREENAMBER 0x3UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED1_COLOR_LAST      PORT_LED_CFG_REQ_LED1_COLOR_GREENAMBER</div><div class='del'>-	u8	unused_1;</div><div class='del'>-	__le16	led1_blink_on;</div><div class='del'>-	__le16	led1_blink_off;</div><div class='del'>-	u8	led1_group_id;</div><div class='del'>-	u8	rsvd1;</div><div class='del'>-	u8	led2_id;</div><div class='del'>-	u8	led2_state;</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_STATE_DEFAULT  0x0UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_STATE_OFF      0x1UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_STATE_ON       0x2UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_STATE_BLINK    0x3UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_STATE_BLINKALT 0x4UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_STATE_LAST    PORT_LED_CFG_REQ_LED2_STATE_BLINKALT</div><div class='del'>-	u8	led2_color;</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_COLOR_DEFAULT    0x0UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_COLOR_AMBER      0x1UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_COLOR_GREEN      0x2UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_COLOR_GREENAMBER 0x3UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED2_COLOR_LAST      PORT_LED_CFG_REQ_LED2_COLOR_GREENAMBER</div><div class='del'>-	u8	unused_2;</div><div class='del'>-	__le16	led2_blink_on;</div><div class='del'>-	__le16	led2_blink_off;</div><div class='del'>-	u8	led2_group_id;</div><div class='del'>-	u8	rsvd2;</div><div class='del'>-	u8	led3_id;</div><div class='del'>-	u8	led3_state;</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_STATE_DEFAULT  0x0UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_STATE_OFF      0x1UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_STATE_ON       0x2UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_STATE_BLINK    0x3UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_STATE_BLINKALT 0x4UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_STATE_LAST    PORT_LED_CFG_REQ_LED3_STATE_BLINKALT</div><div class='del'>-	u8	led3_color;</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_COLOR_DEFAULT    0x0UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_COLOR_AMBER      0x1UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_COLOR_GREEN      0x2UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_COLOR_GREENAMBER 0x3UL</div><div class='del'>-	#define PORT_LED_CFG_REQ_LED3_COLOR_LAST      PORT_LED_CFG_REQ_LED3_COLOR_GREENAMBER</div><div class='del'>-	u8	unused_3;</div><div class='del'>-	__le16	led3_blink_on;</div><div class='del'>-	__le16	led3_blink_off;</div><div class='del'>-	u8	led3_group_id;</div><div class='del'>-	u8	rsvd3;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_led_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_led_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_led_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_port_led_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_led_qcfg_output (size:448b/56B) */</div><div class='del'>-struct hwrm_port_led_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	num_leds;</div><div class='del'>-	u8	led0_id;</div><div class='del'>-	u8	led0_type;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_TYPE_SPEED    0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_TYPE_ACTIVITY 0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_TYPE_INVALID  0xffUL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_TYPE_LAST    PORT_LED_QCFG_RESP_LED0_TYPE_INVALID</div><div class='del'>-	u8	led0_state;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_STATE_DEFAULT  0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_STATE_OFF      0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_STATE_ON       0x2UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_STATE_BLINK    0x3UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_STATE_BLINKALT 0x4UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_STATE_LAST    PORT_LED_QCFG_RESP_LED0_STATE_BLINKALT</div><div class='del'>-	u8	led0_color;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_COLOR_DEFAULT    0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_COLOR_AMBER      0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_COLOR_GREEN      0x2UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_COLOR_GREENAMBER 0x3UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED0_COLOR_LAST      PORT_LED_QCFG_RESP_LED0_COLOR_GREENAMBER</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	led0_blink_on;</div><div class='del'>-	__le16	led0_blink_off;</div><div class='del'>-	u8	led0_group_id;</div><div class='del'>-	u8	led1_id;</div><div class='del'>-	u8	led1_type;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_TYPE_SPEED    0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_TYPE_ACTIVITY 0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_TYPE_INVALID  0xffUL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_TYPE_LAST    PORT_LED_QCFG_RESP_LED1_TYPE_INVALID</div><div class='del'>-	u8	led1_state;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_STATE_DEFAULT  0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_STATE_OFF      0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_STATE_ON       0x2UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_STATE_BLINK    0x3UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_STATE_BLINKALT 0x4UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_STATE_LAST    PORT_LED_QCFG_RESP_LED1_STATE_BLINKALT</div><div class='del'>-	u8	led1_color;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_COLOR_DEFAULT    0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_COLOR_AMBER      0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_COLOR_GREEN      0x2UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_COLOR_GREENAMBER 0x3UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED1_COLOR_LAST      PORT_LED_QCFG_RESP_LED1_COLOR_GREENAMBER</div><div class='del'>-	u8	unused_1;</div><div class='del'>-	__le16	led1_blink_on;</div><div class='del'>-	__le16	led1_blink_off;</div><div class='del'>-	u8	led1_group_id;</div><div class='del'>-	u8	led2_id;</div><div class='del'>-	u8	led2_type;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_TYPE_SPEED    0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_TYPE_ACTIVITY 0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_TYPE_INVALID  0xffUL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_TYPE_LAST    PORT_LED_QCFG_RESP_LED2_TYPE_INVALID</div><div class='del'>-	u8	led2_state;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_STATE_DEFAULT  0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_STATE_OFF      0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_STATE_ON       0x2UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_STATE_BLINK    0x3UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_STATE_BLINKALT 0x4UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_STATE_LAST    PORT_LED_QCFG_RESP_LED2_STATE_BLINKALT</div><div class='del'>-	u8	led2_color;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_COLOR_DEFAULT    0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_COLOR_AMBER      0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_COLOR_GREEN      0x2UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_COLOR_GREENAMBER 0x3UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED2_COLOR_LAST      PORT_LED_QCFG_RESP_LED2_COLOR_GREENAMBER</div><div class='del'>-	u8	unused_2;</div><div class='del'>-	__le16	led2_blink_on;</div><div class='del'>-	__le16	led2_blink_off;</div><div class='del'>-	u8	led2_group_id;</div><div class='del'>-	u8	led3_id;</div><div class='del'>-	u8	led3_type;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_TYPE_SPEED    0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_TYPE_ACTIVITY 0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_TYPE_INVALID  0xffUL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_TYPE_LAST    PORT_LED_QCFG_RESP_LED3_TYPE_INVALID</div><div class='del'>-	u8	led3_state;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_STATE_DEFAULT  0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_STATE_OFF      0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_STATE_ON       0x2UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_STATE_BLINK    0x3UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_STATE_BLINKALT 0x4UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_STATE_LAST    PORT_LED_QCFG_RESP_LED3_STATE_BLINKALT</div><div class='del'>-	u8	led3_color;</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_COLOR_DEFAULT    0x0UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_COLOR_AMBER      0x1UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_COLOR_GREEN      0x2UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_COLOR_GREENAMBER 0x3UL</div><div class='del'>-	#define PORT_LED_QCFG_RESP_LED3_COLOR_LAST      PORT_LED_QCFG_RESP_LED3_COLOR_GREENAMBER</div><div class='del'>-	u8	unused_3;</div><div class='del'>-	__le16	led3_blink_on;</div><div class='del'>-	__le16	led3_blink_off;</div><div class='del'>-	u8	led3_group_id;</div><div class='del'>-	u8	unused_4[6];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_led_qcaps_input (size:192b/24B) */</div><div class='del'>-struct hwrm_port_led_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_led_qcaps_output (size:384b/48B) */</div><div class='del'>-struct hwrm_port_led_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	num_leds;</div><div class='del'>-	u8	unused[3];</div><div class='del'>-	u8	led0_id;</div><div class='del'>-	u8	led0_type;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_TYPE_SPEED    0x0UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_TYPE_ACTIVITY 0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_TYPE_INVALID  0xffUL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_TYPE_LAST    PORT_LED_QCAPS_RESP_LED0_TYPE_INVALID</div><div class='del'>-	u8	led0_group_id;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	led0_state_caps;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_ENABLED                 0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_OFF_SUPPORTED           0x2UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_ON_SUPPORTED            0x4UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_BLINK_SUPPORTED         0x8UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_STATE_CAPS_BLINK_ALT_SUPPORTED     0x10UL</div><div class='del'>-	__le16	led0_color_caps;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_COLOR_CAPS_RSVD                0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_COLOR_CAPS_AMBER_SUPPORTED     0x2UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED0_COLOR_CAPS_GREEN_SUPPORTED     0x4UL</div><div class='del'>-	u8	led1_id;</div><div class='del'>-	u8	led1_type;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_TYPE_SPEED    0x0UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_TYPE_ACTIVITY 0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_TYPE_INVALID  0xffUL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_TYPE_LAST    PORT_LED_QCAPS_RESP_LED1_TYPE_INVALID</div><div class='del'>-	u8	led1_group_id;</div><div class='del'>-	u8	unused_1;</div><div class='del'>-	__le16	led1_state_caps;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_STATE_CAPS_ENABLED                 0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_STATE_CAPS_OFF_SUPPORTED           0x2UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_STATE_CAPS_ON_SUPPORTED            0x4UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_STATE_CAPS_BLINK_SUPPORTED         0x8UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_STATE_CAPS_BLINK_ALT_SUPPORTED     0x10UL</div><div class='del'>-	__le16	led1_color_caps;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_COLOR_CAPS_RSVD                0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_COLOR_CAPS_AMBER_SUPPORTED     0x2UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED1_COLOR_CAPS_GREEN_SUPPORTED     0x4UL</div><div class='del'>-	u8	led2_id;</div><div class='del'>-	u8	led2_type;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_TYPE_SPEED    0x0UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_TYPE_ACTIVITY 0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_TYPE_INVALID  0xffUL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_TYPE_LAST    PORT_LED_QCAPS_RESP_LED2_TYPE_INVALID</div><div class='del'>-	u8	led2_group_id;</div><div class='del'>-	u8	unused_2;</div><div class='del'>-	__le16	led2_state_caps;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_STATE_CAPS_ENABLED                 0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_STATE_CAPS_OFF_SUPPORTED           0x2UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_STATE_CAPS_ON_SUPPORTED            0x4UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_STATE_CAPS_BLINK_SUPPORTED         0x8UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_STATE_CAPS_BLINK_ALT_SUPPORTED     0x10UL</div><div class='del'>-	__le16	led2_color_caps;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_COLOR_CAPS_RSVD                0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_COLOR_CAPS_AMBER_SUPPORTED     0x2UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED2_COLOR_CAPS_GREEN_SUPPORTED     0x4UL</div><div class='del'>-	u8	led3_id;</div><div class='del'>-	u8	led3_type;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_TYPE_SPEED    0x0UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_TYPE_ACTIVITY 0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_TYPE_INVALID  0xffUL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_TYPE_LAST    PORT_LED_QCAPS_RESP_LED3_TYPE_INVALID</div><div class='del'>-	u8	led3_group_id;</div><div class='del'>-	u8	unused_3;</div><div class='del'>-	__le16	led3_state_caps;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_STATE_CAPS_ENABLED                 0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_STATE_CAPS_OFF_SUPPORTED           0x2UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_STATE_CAPS_ON_SUPPORTED            0x4UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_STATE_CAPS_BLINK_SUPPORTED         0x8UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_STATE_CAPS_BLINK_ALT_SUPPORTED     0x10UL</div><div class='del'>-	__le16	led3_color_caps;</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_COLOR_CAPS_RSVD                0x1UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_COLOR_CAPS_AMBER_SUPPORTED     0x2UL</div><div class='del'>-	#define PORT_LED_QCAPS_RESP_LED3_COLOR_CAPS_GREEN_SUPPORTED     0x4UL</div><div class='del'>-	u8	unused_4[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_mac_qcaps_input (size:192b/24B) */</div><div class='del'>-struct hwrm_port_mac_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_port_mac_qcaps_output (size:128b/16B) */</div><div class='del'>-struct hwrm_port_mac_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define PORT_MAC_QCAPS_RESP_FLAGS_LOCAL_LPBK_NOT_SUPPORTED     0x1UL</div><div class='del'>-	#define PORT_MAC_QCAPS_RESP_FLAGS_REMOTE_LPBK_SUPPORTED        0x2UL</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_qportcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_queue_qportcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define QUEUE_QPORTCFG_REQ_FLAGS_PATH     0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_REQ_FLAGS_PATH_TX    0x0UL</div><div class='del'>-	#define QUEUE_QPORTCFG_REQ_FLAGS_PATH_RX    0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_REQ_FLAGS_PATH_LAST QUEUE_QPORTCFG_REQ_FLAGS_PATH_RX</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	drv_qmap_cap;</div><div class='del'>-	#define QUEUE_QPORTCFG_REQ_DRV_QMAP_CAP_DISABLED 0x0UL</div><div class='del'>-	#define QUEUE_QPORTCFG_REQ_DRV_QMAP_CAP_ENABLED  0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_REQ_DRV_QMAP_CAP_LAST    QUEUE_QPORTCFG_REQ_DRV_QMAP_CAP_ENABLED</div><div class='del'>-	u8	unused_0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_qportcfg_output (size:1344b/168B) */</div><div class='del'>-struct hwrm_queue_qportcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	max_configurable_queues;</div><div class='del'>-	u8	max_configurable_lossless_queues;</div><div class='del'>-	u8	queue_cfg_allowed;</div><div class='del'>-	u8	queue_cfg_info;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_CFG_INFO_ASYM_CFG             0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_CFG_INFO_USE_PROFILE_TYPE     0x2UL</div><div class='del'>-	u8	queue_pfcenable_cfg_allowed;</div><div class='del'>-	u8	queue_pri2cos_cfg_allowed;</div><div class='del'>-	u8	queue_cos2bw_cfg_allowed;</div><div class='del'>-	u8	queue_id0;</div><div class='del'>-	u8	queue_id0_service_profile;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_LOSSY          0x0UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS       0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS_ROCE  0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_LOSSY_ROCE_CNP 0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS_NIC   0x3UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN        0xffUL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_LAST          QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN</div><div class='del'>-	u8	queue_id1;</div><div class='del'>-	u8	queue_id1_service_profile;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_LOSSY          0x0UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS       0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS_ROCE  0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_LOSSY_ROCE_CNP 0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS_NIC   0x3UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN        0xffUL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_LAST          QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN</div><div class='del'>-	u8	queue_id2;</div><div class='del'>-	u8	queue_id2_service_profile;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_LOSSY          0x0UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS       0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS_ROCE  0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_LOSSY_ROCE_CNP 0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS_NIC   0x3UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN        0xffUL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_LAST          QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN</div><div class='del'>-	u8	queue_id3;</div><div class='del'>-	u8	queue_id3_service_profile;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_LOSSY          0x0UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS       0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS_ROCE  0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_LOSSY_ROCE_CNP 0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS_NIC   0x3UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN        0xffUL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_LAST          QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN</div><div class='del'>-	u8	queue_id4;</div><div class='del'>-	u8	queue_id4_service_profile;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_LOSSY          0x0UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS       0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS_ROCE  0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_LOSSY_ROCE_CNP 0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS_NIC   0x3UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN        0xffUL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_LAST          QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN</div><div class='del'>-	u8	queue_id5;</div><div class='del'>-	u8	queue_id5_service_profile;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_LOSSY          0x0UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS       0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS_ROCE  0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_LOSSY_ROCE_CNP 0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS_NIC   0x3UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN        0xffUL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_LAST          QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN</div><div class='del'>-	u8	queue_id6;</div><div class='del'>-	u8	queue_id6_service_profile;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_LOSSY          0x0UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS       0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS_ROCE  0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_LOSSY_ROCE_CNP 0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS_NIC   0x3UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN        0xffUL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_LAST          QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN</div><div class='del'>-	u8	queue_id7;</div><div class='del'>-	u8	queue_id7_service_profile;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_LOSSY          0x0UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS       0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS_ROCE  0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_LOSSY_ROCE_CNP 0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS_NIC   0x3UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN        0xffUL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_LAST          QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN</div><div class='del'>-	u8	queue_id0_service_profile_type;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_TYPE_ROCE     0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_TYPE_NIC      0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID0_SERVICE_PROFILE_TYPE_CNP      0x4UL</div><div class='del'>-	char	qid0_name[16];</div><div class='del'>-	char	qid1_name[16];</div><div class='del'>-	char	qid2_name[16];</div><div class='del'>-	char	qid3_name[16];</div><div class='del'>-	char	qid4_name[16];</div><div class='del'>-	char	qid5_name[16];</div><div class='del'>-	char	qid6_name[16];</div><div class='del'>-	char	qid7_name[16];</div><div class='del'>-	u8	queue_id1_service_profile_type;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_TYPE_ROCE     0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_TYPE_NIC      0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID1_SERVICE_PROFILE_TYPE_CNP      0x4UL</div><div class='del'>-	u8	queue_id2_service_profile_type;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_TYPE_ROCE     0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_TYPE_NIC      0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID2_SERVICE_PROFILE_TYPE_CNP      0x4UL</div><div class='del'>-	u8	queue_id3_service_profile_type;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_TYPE_ROCE     0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_TYPE_NIC      0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID3_SERVICE_PROFILE_TYPE_CNP      0x4UL</div><div class='del'>-	u8	queue_id4_service_profile_type;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_TYPE_ROCE     0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_TYPE_NIC      0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID4_SERVICE_PROFILE_TYPE_CNP      0x4UL</div><div class='del'>-	u8	queue_id5_service_profile_type;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_TYPE_ROCE     0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_TYPE_NIC      0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID5_SERVICE_PROFILE_TYPE_CNP      0x4UL</div><div class='del'>-	u8	queue_id6_service_profile_type;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_TYPE_ROCE     0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_TYPE_NIC      0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID6_SERVICE_PROFILE_TYPE_CNP      0x4UL</div><div class='del'>-	u8	queue_id7_service_profile_type;</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_TYPE_ROCE     0x1UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_TYPE_NIC      0x2UL</div><div class='del'>-	#define QUEUE_QPORTCFG_RESP_QUEUE_ID7_SERVICE_PROFILE_TYPE_CNP      0x4UL</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_queue_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define QUEUE_QCFG_REQ_FLAGS_PATH     0x1UL</div><div class='del'>-	#define QUEUE_QCFG_REQ_FLAGS_PATH_TX    0x0UL</div><div class='del'>-	#define QUEUE_QCFG_REQ_FLAGS_PATH_RX    0x1UL</div><div class='del'>-	#define QUEUE_QCFG_REQ_FLAGS_PATH_LAST QUEUE_QCFG_REQ_FLAGS_PATH_RX</div><div class='del'>-	__le32	queue_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_qcfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_queue_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	queue_len;</div><div class='del'>-	u8	service_profile;</div><div class='del'>-	#define QUEUE_QCFG_RESP_SERVICE_PROFILE_LOSSY    0x0UL</div><div class='del'>-	#define QUEUE_QCFG_RESP_SERVICE_PROFILE_LOSSLESS 0x1UL</div><div class='del'>-	#define QUEUE_QCFG_RESP_SERVICE_PROFILE_UNKNOWN  0xffUL</div><div class='del'>-	#define QUEUE_QCFG_RESP_SERVICE_PROFILE_LAST    QUEUE_QCFG_RESP_SERVICE_PROFILE_UNKNOWN</div><div class='del'>-	u8	queue_cfg_info;</div><div class='del'>-	#define QUEUE_QCFG_RESP_QUEUE_CFG_INFO_ASYM_CFG     0x1UL</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_cfg_input (size:320b/40B) */</div><div class='del'>-struct hwrm_queue_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define QUEUE_CFG_REQ_FLAGS_PATH_MASK 0x3UL</div><div class='del'>-	#define QUEUE_CFG_REQ_FLAGS_PATH_SFT  0</div><div class='del'>-	#define QUEUE_CFG_REQ_FLAGS_PATH_TX     0x0UL</div><div class='del'>-	#define QUEUE_CFG_REQ_FLAGS_PATH_RX     0x1UL</div><div class='del'>-	#define QUEUE_CFG_REQ_FLAGS_PATH_BIDIR  0x2UL</div><div class='del'>-	#define QUEUE_CFG_REQ_FLAGS_PATH_LAST  QUEUE_CFG_REQ_FLAGS_PATH_BIDIR</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define QUEUE_CFG_REQ_ENABLES_DFLT_LEN            0x1UL</div><div class='del'>-	#define QUEUE_CFG_REQ_ENABLES_SERVICE_PROFILE     0x2UL</div><div class='del'>-	__le32	queue_id;</div><div class='del'>-	__le32	dflt_len;</div><div class='del'>-	u8	service_profile;</div><div class='del'>-	#define QUEUE_CFG_REQ_SERVICE_PROFILE_LOSSY    0x0UL</div><div class='del'>-	#define QUEUE_CFG_REQ_SERVICE_PROFILE_LOSSLESS 0x1UL</div><div class='del'>-	#define QUEUE_CFG_REQ_SERVICE_PROFILE_UNKNOWN  0xffUL</div><div class='del'>-	#define QUEUE_CFG_REQ_SERVICE_PROFILE_LAST    QUEUE_CFG_REQ_SERVICE_PROFILE_UNKNOWN</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_queue_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_pfcenable_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_queue_pfcenable_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_pfcenable_qcfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_queue_pfcenable_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI0_PFC_ENABLED              0x1UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI1_PFC_ENABLED              0x2UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI2_PFC_ENABLED              0x4UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI3_PFC_ENABLED              0x8UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI4_PFC_ENABLED              0x10UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI5_PFC_ENABLED              0x20UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI6_PFC_ENABLED              0x40UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI7_PFC_ENABLED              0x80UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI0_PFC_WATCHDOG_ENABLED     0x100UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI1_PFC_WATCHDOG_ENABLED     0x200UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI2_PFC_WATCHDOG_ENABLED     0x400UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI3_PFC_WATCHDOG_ENABLED     0x800UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI4_PFC_WATCHDOG_ENABLED     0x1000UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI5_PFC_WATCHDOG_ENABLED     0x2000UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI6_PFC_WATCHDOG_ENABLED     0x4000UL</div><div class='del'>-	#define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI7_PFC_WATCHDOG_ENABLED     0x8000UL</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_pfcenable_cfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_queue_pfcenable_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI0_PFC_ENABLED              0x1UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI1_PFC_ENABLED              0x2UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI2_PFC_ENABLED              0x4UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI3_PFC_ENABLED              0x8UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI4_PFC_ENABLED              0x10UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI5_PFC_ENABLED              0x20UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI6_PFC_ENABLED              0x40UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI7_PFC_ENABLED              0x80UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI0_PFC_WATCHDOG_ENABLED     0x100UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI1_PFC_WATCHDOG_ENABLED     0x200UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI2_PFC_WATCHDOG_ENABLED     0x400UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI3_PFC_WATCHDOG_ENABLED     0x800UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI4_PFC_WATCHDOG_ENABLED     0x1000UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI5_PFC_WATCHDOG_ENABLED     0x2000UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI6_PFC_WATCHDOG_ENABLED     0x4000UL</div><div class='del'>-	#define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI7_PFC_WATCHDOG_ENABLED     0x8000UL</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_pfcenable_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_queue_pfcenable_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_pri2cos_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_queue_pri2cos_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define QUEUE_PRI2COS_QCFG_REQ_FLAGS_PATH      0x1UL</div><div class='del'>-	#define QUEUE_PRI2COS_QCFG_REQ_FLAGS_PATH_TX     0x0UL</div><div class='del'>-	#define QUEUE_PRI2COS_QCFG_REQ_FLAGS_PATH_RX     0x1UL</div><div class='del'>-	#define QUEUE_PRI2COS_QCFG_REQ_FLAGS_PATH_LAST  QUEUE_PRI2COS_QCFG_REQ_FLAGS_PATH_RX</div><div class='del'>-	#define QUEUE_PRI2COS_QCFG_REQ_FLAGS_IVLAN     0x2UL</div><div class='del'>-	u8	port_id;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_pri2cos_qcfg_output (size:192b/24B) */</div><div class='del'>-struct hwrm_queue_pri2cos_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	pri0_cos_queue_id;</div><div class='del'>-	u8	pri1_cos_queue_id;</div><div class='del'>-	u8	pri2_cos_queue_id;</div><div class='del'>-	u8	pri3_cos_queue_id;</div><div class='del'>-	u8	pri4_cos_queue_id;</div><div class='del'>-	u8	pri5_cos_queue_id;</div><div class='del'>-	u8	pri6_cos_queue_id;</div><div class='del'>-	u8	pri7_cos_queue_id;</div><div class='del'>-	u8	queue_cfg_info;</div><div class='del'>-	#define QUEUE_PRI2COS_QCFG_RESP_QUEUE_CFG_INFO_ASYM_CFG     0x1UL</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_pri2cos_cfg_input (size:320b/40B) */</div><div class='del'>-struct hwrm_queue_pri2cos_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_MASK 0x3UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_SFT  0</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_TX     0x0UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_RX     0x1UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_BIDIR  0x2UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_LAST  QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_BIDIR</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_FLAGS_IVLAN     0x4UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI0_COS_QUEUE_ID     0x1UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI1_COS_QUEUE_ID     0x2UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI2_COS_QUEUE_ID     0x4UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI3_COS_QUEUE_ID     0x8UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI4_COS_QUEUE_ID     0x10UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI5_COS_QUEUE_ID     0x20UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI6_COS_QUEUE_ID     0x40UL</div><div class='del'>-	#define QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI7_COS_QUEUE_ID     0x80UL</div><div class='del'>-	u8	port_id;</div><div class='del'>-	u8	pri0_cos_queue_id;</div><div class='del'>-	u8	pri1_cos_queue_id;</div><div class='del'>-	u8	pri2_cos_queue_id;</div><div class='del'>-	u8	pri3_cos_queue_id;</div><div class='del'>-	u8	pri4_cos_queue_id;</div><div class='del'>-	u8	pri5_cos_queue_id;</div><div class='del'>-	u8	pri6_cos_queue_id;</div><div class='del'>-	u8	pri7_cos_queue_id;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_pri2cos_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_queue_pri2cos_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_cos2bw_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_queue_cos2bw_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_cos2bw_qcfg_output (size:896b/112B) */</div><div class='del'>-struct hwrm_queue_cos2bw_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	queue_id0;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	unused_1;</div><div class='del'>-	__le32	queue_id0_min_bw;</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_SCALE_LAST                 QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_SCALE_BYTES</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_LAST         QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-	__le32	queue_id0_max_bw;</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_SCALE_LAST                 QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_SCALE_BYTES</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_LAST         QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-	u8	queue_id0_tsa_assign;</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_TSA_ASSIGN_SP             0x0UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_TSA_ASSIGN_ETS            0x1UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_TSA_ASSIGN_RESERVED_FIRST 0x2UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_TSA_ASSIGN_RESERVED_LAST  0xffUL</div><div class='del'>-	u8	queue_id0_pri_lvl;</div><div class='del'>-	u8	queue_id0_bw_weight;</div><div class='del'>-	struct {</div><div class='del'>-		u8	queue_id;</div><div class='del'>-		__le32	queue_id_min_bw;</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_SCALE_LAST                 QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_SCALE_BYTES</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_LAST         QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-		__le32	queue_id_max_bw;</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_SCALE_LAST                 QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_SCALE_BYTES</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_LAST         QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-		u8	queue_id_tsa_assign;</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_TSA_ASSIGN_SP             0x0UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_TSA_ASSIGN_ETS            0x1UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_TSA_ASSIGN_RESERVED_FIRST 0x2UL</div><div class='del'>-	#define QUEUE_COS2BW_QCFG_RESP_QUEUE_ID_TSA_ASSIGN_RESERVED_LAST  0xffUL</div><div class='del'>-		u8	queue_id_pri_lvl;</div><div class='del'>-		u8	queue_id_bw_weight;</div><div class='del'>-	} __packed cfg[7];</div><div class='del'>-	u8	unused_2[4];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_cos2bw_cfg_input (size:1024b/128B) */</div><div class='del'>-struct hwrm_queue_cos2bw_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID0_VALID     0x1UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID1_VALID     0x2UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID2_VALID     0x4UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID3_VALID     0x8UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID4_VALID     0x10UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID5_VALID     0x20UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID6_VALID     0x40UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID7_VALID     0x80UL</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	queue_id0;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le32	queue_id0_min_bw;</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_SCALE_LAST                 QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_SCALE_BYTES</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_LAST         QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MIN_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-	__le32	queue_id0_max_bw;</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_SCALE_LAST                 QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_SCALE_BYTES</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_LAST         QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_MAX_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-	u8	queue_id0_tsa_assign;</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_TSA_ASSIGN_SP             0x0UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_TSA_ASSIGN_ETS            0x1UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_TSA_ASSIGN_RESERVED_FIRST 0x2UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID0_TSA_ASSIGN_RESERVED_LAST  0xffUL</div><div class='del'>-	u8	queue_id0_pri_lvl;</div><div class='del'>-	u8	queue_id0_bw_weight;</div><div class='del'>-	struct {</div><div class='del'>-		u8	queue_id;</div><div class='del'>-		__le32	queue_id_min_bw;</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_SCALE_LAST                 QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_SCALE_BYTES</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_LAST         QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MIN_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-		__le32	queue_id_max_bw;</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_SCALE_LAST                 QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_SCALE_BYTES</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_LAST         QUEUE_COS2BW_CFG_REQ_QUEUE_ID_MAX_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-		u8	queue_id_tsa_assign;</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_TSA_ASSIGN_SP             0x0UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_TSA_ASSIGN_ETS            0x1UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_TSA_ASSIGN_RESERVED_FIRST 0x2UL</div><div class='del'>-	#define QUEUE_COS2BW_CFG_REQ_QUEUE_ID_TSA_ASSIGN_RESERVED_LAST  0xffUL</div><div class='del'>-		u8	queue_id_pri_lvl;</div><div class='del'>-		u8	queue_id_bw_weight;</div><div class='del'>-	} __packed cfg[7];</div><div class='del'>-	u8	unused_1[5];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_cos2bw_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_queue_cos2bw_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_dscp_qcaps_input (size:192b/24B) */</div><div class='del'>-struct hwrm_queue_dscp_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	port_id;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_dscp_qcaps_output (size:128b/16B) */</div><div class='del'>-struct hwrm_queue_dscp_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	num_dscp_bits;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	max_entries;</div><div class='del'>-	u8	unused_1[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_dscp2pri_qcfg_input (size:256b/32B) */</div><div class='del'>-struct hwrm_queue_dscp2pri_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	dest_data_addr;</div><div class='del'>-	u8	port_id;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	dest_data_buffer_size;</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_dscp2pri_qcfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_queue_dscp2pri_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	entry_cnt;</div><div class='del'>-	u8	default_pri;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_dscp2pri_cfg_input (size:320b/40B) */</div><div class='del'>-struct hwrm_queue_dscp2pri_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	src_data_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define QUEUE_DSCP2PRI_CFG_REQ_FLAGS_USE_HW_DEFAULT_PRI     0x1UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define QUEUE_DSCP2PRI_CFG_REQ_ENABLES_DEFAULT_PRI     0x1UL</div><div class='del'>-	u8	port_id;</div><div class='del'>-	u8	default_pri;</div><div class='del'>-	__le16	entry_cnt;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_queue_dscp2pri_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_queue_dscp2pri_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_alloc_input (size:192b/24B) */</div><div class='del'>-struct hwrm_vnic_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define VNIC_ALLOC_REQ_FLAGS_DEFAULT                  0x1UL</div><div class='del'>-	#define VNIC_ALLOC_REQ_FLAGS_VIRTIO_NET_FID_VALID     0x2UL</div><div class='del'>-	__le16	virtio_net_fid;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_vnic_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	vnic_id;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_update_input (size:256b/32B) */</div><div class='del'>-struct hwrm_vnic_update_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	vnic_id;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define VNIC_UPDATE_REQ_ENABLES_VNIC_STATE_VALID               0x1UL</div><div class='del'>-	#define VNIC_UPDATE_REQ_ENABLES_MRU_VALID                      0x2UL</div><div class='del'>-	#define VNIC_UPDATE_REQ_ENABLES_METADATA_FORMAT_TYPE_VALID     0x4UL</div><div class='del'>-	u8	vnic_state;</div><div class='del'>-	#define VNIC_UPDATE_REQ_VNIC_STATE_NORMAL 0x0UL</div><div class='del'>-	#define VNIC_UPDATE_REQ_VNIC_STATE_DROP   0x1UL</div><div class='del'>-	#define VNIC_UPDATE_REQ_VNIC_STATE_LAST  VNIC_UPDATE_REQ_VNIC_STATE_DROP</div><div class='del'>-	u8	metadata_format_type;</div><div class='del'>-	#define VNIC_UPDATE_REQ_METADATA_FORMAT_TYPE_0 0x0UL</div><div class='del'>-	#define VNIC_UPDATE_REQ_METADATA_FORMAT_TYPE_1 0x1UL</div><div class='del'>-	#define VNIC_UPDATE_REQ_METADATA_FORMAT_TYPE_2 0x2UL</div><div class='del'>-	#define VNIC_UPDATE_REQ_METADATA_FORMAT_TYPE_3 0x3UL</div><div class='del'>-	#define VNIC_UPDATE_REQ_METADATA_FORMAT_TYPE_4 0x4UL</div><div class='del'>-	#define VNIC_UPDATE_REQ_METADATA_FORMAT_TYPE_LAST VNIC_UPDATE_REQ_METADATA_FORMAT_TYPE_4</div><div class='del'>-	__le16	mru;</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_update_output (size:128b/16B) */</div><div class='del'>-struct hwrm_vnic_update_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_vnic_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	vnic_id;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_vnic_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_cfg_input (size:384b/48B) */</div><div class='del'>-struct hwrm_vnic_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define VNIC_CFG_REQ_FLAGS_DEFAULT                              0x1UL</div><div class='del'>-	#define VNIC_CFG_REQ_FLAGS_VLAN_STRIP_MODE                      0x2UL</div><div class='del'>-	#define VNIC_CFG_REQ_FLAGS_BD_STALL_MODE                        0x4UL</div><div class='del'>-	#define VNIC_CFG_REQ_FLAGS_ROCE_DUAL_VNIC_MODE                  0x8UL</div><div class='del'>-	#define VNIC_CFG_REQ_FLAGS_ROCE_ONLY_VNIC_MODE                  0x10UL</div><div class='del'>-	#define VNIC_CFG_REQ_FLAGS_RSS_DFLT_CR_MODE                     0x20UL</div><div class='del'>-	#define VNIC_CFG_REQ_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_MODE     0x40UL</div><div class='del'>-	#define VNIC_CFG_REQ_FLAGS_PORTCOS_MAPPING_MODE                 0x80UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define VNIC_CFG_REQ_ENABLES_DFLT_RING_GRP            0x1UL</div><div class='del'>-	#define VNIC_CFG_REQ_ENABLES_RSS_RULE                 0x2UL</div><div class='del'>-	#define VNIC_CFG_REQ_ENABLES_COS_RULE                 0x4UL</div><div class='del'>-	#define VNIC_CFG_REQ_ENABLES_LB_RULE                  0x8UL</div><div class='del'>-	#define VNIC_CFG_REQ_ENABLES_MRU                      0x10UL</div><div class='del'>-	#define VNIC_CFG_REQ_ENABLES_DEFAULT_RX_RING_ID       0x20UL</div><div class='del'>-	#define VNIC_CFG_REQ_ENABLES_DEFAULT_CMPL_RING_ID     0x40UL</div><div class='del'>-	#define VNIC_CFG_REQ_ENABLES_QUEUE_ID                 0x80UL</div><div class='del'>-	#define VNIC_CFG_REQ_ENABLES_RX_CSUM_V2_MODE          0x100UL</div><div class='del'>-	#define VNIC_CFG_REQ_ENABLES_L2_CQE_MODE              0x200UL</div><div class='del'>-	__le16	vnic_id;</div><div class='del'>-	__le16	dflt_ring_grp;</div><div class='del'>-	__le16	rss_rule;</div><div class='del'>-	__le16	cos_rule;</div><div class='del'>-	__le16	lb_rule;</div><div class='del'>-	__le16	mru;</div><div class='del'>-	__le16	default_rx_ring_id;</div><div class='del'>-	__le16	default_cmpl_ring_id;</div><div class='del'>-	__le16	queue_id;</div><div class='del'>-	u8	rx_csum_v2_mode;</div><div class='del'>-	#define VNIC_CFG_REQ_RX_CSUM_V2_MODE_DEFAULT 0x0UL</div><div class='del'>-	#define VNIC_CFG_REQ_RX_CSUM_V2_MODE_ALL_OK  0x1UL</div><div class='del'>-	#define VNIC_CFG_REQ_RX_CSUM_V2_MODE_MAX     0x2UL</div><div class='del'>-	#define VNIC_CFG_REQ_RX_CSUM_V2_MODE_LAST   VNIC_CFG_REQ_RX_CSUM_V2_MODE_MAX</div><div class='del'>-	u8	l2_cqe_mode;</div><div class='del'>-	#define VNIC_CFG_REQ_L2_CQE_MODE_DEFAULT    0x0UL</div><div class='del'>-	#define VNIC_CFG_REQ_L2_CQE_MODE_COMPRESSED 0x1UL</div><div class='del'>-	#define VNIC_CFG_REQ_L2_CQE_MODE_MIXED      0x2UL</div><div class='del'>-	#define VNIC_CFG_REQ_L2_CQE_MODE_LAST      VNIC_CFG_REQ_L2_CQE_MODE_MIXED</div><div class='del'>-	u8	unused0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_vnic_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_qcaps_input (size:192b/24B) */</div><div class='del'>-struct hwrm_vnic_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_qcaps_output (size:192b/24B) */</div><div class='del'>-struct hwrm_vnic_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	mru;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_UNUSED                                  0x1UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_VLAN_STRIP_CAP                          0x2UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_BD_STALL_CAP                            0x4UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_ROCE_DUAL_VNIC_CAP                      0x8UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_ROCE_ONLY_VNIC_CAP                      0x10UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RSS_DFLT_CR_CAP                         0x20UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_CAP         0x40UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_OUTERMOST_RSS_CAP                       0x80UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_COS_ASSIGNMENT_CAP                      0x100UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RX_CMPL_V2_CAP                          0x200UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_VNIC_STATE_CAP                          0x400UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_VIRTIO_NET_VNIC_ALLOC_CAP               0x800UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_METADATA_FORMAT_CAP                     0x1000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RSS_STRICT_HASH_TYPE_CAP                0x2000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RSS_HASH_TYPE_DELTA_CAP                 0x4000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RING_SELECT_MODE_TOEPLITZ_CAP           0x8000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RING_SELECT_MODE_XOR_CAP                0x10000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RING_SELECT_MODE_TOEPLITZ_CHKSM_CAP     0x20000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RSS_IPV6_FLOW_LABEL_CAP                 0x40000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RX_CMPL_V3_CAP                          0x80000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_L2_CQE_MODE_CAP                         0x100000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RSS_IPSEC_AH_SPI_IPV4_CAP               0x200000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RSS_IPSEC_ESP_SPI_IPV4_CAP              0x400000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RSS_IPSEC_AH_SPI_IPV6_CAP               0x800000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RSS_IPSEC_ESP_SPI_IPV6_CAP              0x1000000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_OUTERMOST_RSS_TRUSTED_VF_CAP            0x2000000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_PORTCOS_MAPPING_MODE                    0x4000000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RSS_PROF_TCAM_MODE_ENABLED              0x8000000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_VNIC_RSS_HASH_MODE_CAP                  0x10000000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_HW_TUNNEL_TPA_CAP                       0x20000000UL</div><div class='del'>-	#define VNIC_QCAPS_RESP_FLAGS_RE_FLUSH_CAP                            0x40000000UL</div><div class='del'>-	__le16	max_aggs_supported;</div><div class='del'>-	u8	unused_1[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_tpa_cfg_input (size:384b/48B) */</div><div class='del'>-struct hwrm_vnic_tpa_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_FLAGS_TPA                       0x1UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_FLAGS_ENCAP_TPA                 0x2UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_FLAGS_RSC_WND_UPDATE            0x4UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_FLAGS_GRO                       0x8UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_FLAGS_AGG_WITH_ECN              0x10UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_FLAGS_AGG_WITH_SAME_GRE_SEQ     0x20UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_FLAGS_GRO_IPID_CHECK            0x40UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_FLAGS_GRO_TTL_CHECK             0x80UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_FLAGS_AGG_PACK_AS_GRO           0x100UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_ENABLES_MAX_AGG_SEGS      0x1UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_ENABLES_MAX_AGGS          0x2UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_ENABLES_MAX_AGG_TIMER     0x4UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_ENABLES_MIN_AGG_LEN       0x8UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_ENABLES_TNL_TPA_EN        0x10UL</div><div class='del'>-	__le16	vnic_id;</div><div class='del'>-	__le16	max_agg_segs;</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGG_SEGS_1   0x0UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGG_SEGS_2   0x1UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGG_SEGS_4   0x2UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGG_SEGS_8   0x3UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGG_SEGS_MAX 0x1fUL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGG_SEGS_LAST VNIC_TPA_CFG_REQ_MAX_AGG_SEGS_MAX</div><div class='del'>-	__le16	max_aggs;</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGGS_1   0x0UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGGS_2   0x1UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGGS_4   0x2UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGGS_8   0x3UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGGS_16  0x4UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGGS_MAX 0x7UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_MAX_AGGS_LAST VNIC_TPA_CFG_REQ_MAX_AGGS_MAX</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	__le32	max_agg_timer;</div><div class='del'>-	__le32	min_agg_len;</div><div class='del'>-	__le32	tnl_tpa_en_bitmap;</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_VXLAN           0x1UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_GENEVE          0x2UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_NVGRE           0x4UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_GRE             0x8UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_IPV4            0x10UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_IPV6            0x20UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_VXLAN_GPE       0x40UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_VXLAN_CUST1     0x80UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_GRE_CUST1       0x100UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_UPAR1           0x200UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_UPAR2           0x400UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_UPAR3           0x800UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_UPAR4           0x1000UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_UPAR5           0x2000UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_UPAR6           0x4000UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_UPAR7           0x8000UL</div><div class='del'>-	#define VNIC_TPA_CFG_REQ_TNL_TPA_EN_BITMAP_UPAR8           0x10000UL</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_tpa_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_vnic_tpa_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_tpa_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_vnic_tpa_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	vnic_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_tpa_qcfg_output (size:256b/32B) */</div><div class='del'>-struct hwrm_vnic_tpa_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_FLAGS_TPA                       0x1UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_FLAGS_ENCAP_TPA                 0x2UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_FLAGS_RSC_WND_UPDATE            0x4UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_FLAGS_GRO                       0x8UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_FLAGS_AGG_WITH_ECN              0x10UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_FLAGS_AGG_WITH_SAME_GRE_SEQ     0x20UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_FLAGS_GRO_IPID_CHECK            0x40UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_FLAGS_GRO_TTL_CHECK             0x80UL</div><div class='del'>-	__le16	max_agg_segs;</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGG_SEGS_1   0x0UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGG_SEGS_2   0x1UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGG_SEGS_4   0x2UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGG_SEGS_8   0x3UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGG_SEGS_MAX 0x1fUL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGG_SEGS_LAST VNIC_TPA_QCFG_RESP_MAX_AGG_SEGS_MAX</div><div class='del'>-	__le16	max_aggs;</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGGS_1   0x0UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGGS_2   0x1UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGGS_4   0x2UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGGS_8   0x3UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGGS_16  0x4UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGGS_MAX 0x7UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_MAX_AGGS_LAST VNIC_TPA_QCFG_RESP_MAX_AGGS_MAX</div><div class='del'>-	__le32	max_agg_timer;</div><div class='del'>-	__le32	min_agg_len;</div><div class='del'>-	__le32	tnl_tpa_en_bitmap;</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_VXLAN           0x1UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_GENEVE          0x2UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_NVGRE           0x4UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_GRE             0x8UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_IPV4            0x10UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_IPV6            0x20UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_VXLAN_GPE       0x40UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_VXLAN_CUST1     0x80UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_GRE_CUST1       0x100UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_UPAR1           0x200UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_UPAR2           0x400UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_UPAR3           0x800UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_UPAR4           0x1000UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_UPAR5           0x2000UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_UPAR6           0x4000UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_UPAR7           0x8000UL</div><div class='del'>-	#define VNIC_TPA_QCFG_RESP_TNL_TPA_EN_BITMAP_UPAR8           0x10000UL</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_rss_cfg_input (size:384b/48B) */</div><div class='del'>-struct hwrm_vnic_rss_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	hash_type;</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4                0x1UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4            0x2UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4            0x4UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6                0x8UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6            0x10UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6            0x20UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6_FLOW_LABEL     0x40UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV4         0x80UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV4        0x100UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_AH_SPI_IPV6         0x200UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_TYPE_ESP_SPI_IPV6        0x400UL</div><div class='del'>-	__le16	vnic_id;</div><div class='del'>-	u8	ring_table_pair_index;</div><div class='del'>-	u8	hash_mode_flags;</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_DEFAULT         0x1UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_INNERMOST_4     0x2UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_INNERMOST_2     0x4UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_OUTERMOST_4     0x8UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_HASH_MODE_FLAGS_OUTERMOST_2     0x10UL</div><div class='del'>-	__le64	ring_grp_tbl_addr;</div><div class='del'>-	__le64	hash_key_tbl_addr;</div><div class='del'>-	__le16	rss_ctx_idx;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_INCLUDE               0x1UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_EXCLUDE               0x2UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_FLAGS_IPSEC_HASH_TYPE_CFG_SUPPORT     0x4UL</div><div class='del'>-	u8	ring_select_mode;</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_RING_SELECT_MODE_TOEPLITZ          0x0UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_RING_SELECT_MODE_XOR               0x1UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_RING_SELECT_MODE_TOEPLITZ_CHECKSUM 0x2UL</div><div class='del'>-	#define VNIC_RSS_CFG_REQ_RING_SELECT_MODE_LAST             VNIC_RSS_CFG_REQ_RING_SELECT_MODE_TOEPLITZ_CHECKSUM</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_rss_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_vnic_rss_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_rss_cfg_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_vnic_rss_cfg_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define VNIC_RSS_CFG_CMD_ERR_CODE_UNKNOWN             0x0UL</div><div class='del'>-	#define VNIC_RSS_CFG_CMD_ERR_CODE_INTERFACE_NOT_READY 0x1UL</div><div class='del'>-	#define VNIC_RSS_CFG_CMD_ERR_CODE_LAST               VNIC_RSS_CFG_CMD_ERR_CODE_INTERFACE_NOT_READY</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_rss_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_vnic_rss_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	rss_ctx_idx;</div><div class='del'>-	__le16	vnic_id;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_rss_qcfg_output (size:512b/64B) */</div><div class='del'>-struct hwrm_vnic_rss_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	hash_type;</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_IPV4                0x1UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_TCP_IPV4            0x2UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_UDP_IPV4            0x4UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_IPV6                0x8UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_TCP_IPV6            0x10UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_UDP_IPV6            0x20UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_IPV6_FLOW_LABEL     0x40UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_AH_SPI_IPV4         0x80UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_ESP_SPI_IPV4        0x100UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_AH_SPI_IPV6         0x200UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_TYPE_ESP_SPI_IPV6        0x400UL</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-	__le32	hash_key[10];</div><div class='del'>-	u8	hash_mode_flags;</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_MODE_FLAGS_DEFAULT         0x1UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_MODE_FLAGS_INNERMOST_4     0x2UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_MODE_FLAGS_INNERMOST_2     0x4UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_MODE_FLAGS_OUTERMOST_4     0x8UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_HASH_MODE_FLAGS_OUTERMOST_2     0x10UL</div><div class='del'>-	u8	ring_select_mode;</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_RING_SELECT_MODE_TOEPLITZ          0x0UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_RING_SELECT_MODE_XOR               0x1UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_RING_SELECT_MODE_TOEPLITZ_CHECKSUM 0x2UL</div><div class='del'>-	#define VNIC_RSS_QCFG_RESP_RING_SELECT_MODE_LAST             VNIC_RSS_QCFG_RESP_RING_SELECT_MODE_TOEPLITZ_CHECKSUM</div><div class='del'>-	u8	unused_1[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_plcmodes_cfg_input (size:320b/40B) */</div><div class='del'>-struct hwrm_vnic_plcmodes_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_FLAGS_REGULAR_PLACEMENT     0x1UL</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_FLAGS_JUMBO_PLACEMENT       0x2UL</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV4              0x4UL</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_IPV6              0x8UL</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_FCOE              0x10UL</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_FLAGS_HDS_ROCE              0x20UL</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_FLAGS_VIRTIO_PLACEMENT      0x40UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_ENABLES_JUMBO_THRESH_VALID      0x1UL</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_ENABLES_HDS_OFFSET_VALID        0x2UL</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_ENABLES_HDS_THRESHOLD_VALID     0x4UL</div><div class='del'>-	#define VNIC_PLCMODES_CFG_REQ_ENABLES_MAX_BDS_VALID           0x8UL</div><div class='del'>-	__le32	vnic_id;</div><div class='del'>-	__le16	jumbo_thresh;</div><div class='del'>-	__le16	hds_offset;</div><div class='del'>-	__le16	hds_threshold;</div><div class='del'>-	__le16	max_bds;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_plcmodes_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_vnic_plcmodes_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_rss_cos_lb_ctx_alloc_input (size:128b/16B) */</div><div class='del'>-struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_rss_cos_lb_ctx_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	rss_cos_lb_ctx_id;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_rss_cos_lb_ctx_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_vnic_rss_cos_lb_ctx_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	rss_cos_lb_ctx_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vnic_rss_cos_lb_ctx_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_vnic_rss_cos_lb_ctx_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_alloc_input (size:704b/88B) */</div><div class='del'>-struct hwrm_ring_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define RING_ALLOC_REQ_ENABLES_RING_ARB_CFG           0x2UL</div><div class='del'>-	#define RING_ALLOC_REQ_ENABLES_STAT_CTX_ID_VALID      0x8UL</div><div class='del'>-	#define RING_ALLOC_REQ_ENABLES_MAX_BW_VALID           0x20UL</div><div class='del'>-	#define RING_ALLOC_REQ_ENABLES_RX_RING_ID_VALID       0x40UL</div><div class='del'>-	#define RING_ALLOC_REQ_ENABLES_NQ_RING_ID_VALID       0x80UL</div><div class='del'>-	#define RING_ALLOC_REQ_ENABLES_RX_BUF_SIZE_VALID      0x100UL</div><div class='del'>-	#define RING_ALLOC_REQ_ENABLES_SCHQ_ID                0x200UL</div><div class='del'>-	#define RING_ALLOC_REQ_ENABLES_MPC_CHNLS_TYPE         0x400UL</div><div class='del'>-	#define RING_ALLOC_REQ_ENABLES_STEERING_TAG_VALID     0x800UL</div><div class='del'>-	u8	ring_type;</div><div class='del'>-	#define RING_ALLOC_REQ_RING_TYPE_L2_CMPL   0x0UL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_TYPE_TX        0x1UL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_TYPE_RX        0x2UL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_TYPE_ROCE_CMPL 0x3UL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_TYPE_RX_AGG    0x4UL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_TYPE_NQ        0x5UL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_TYPE_LAST     RING_ALLOC_REQ_RING_TYPE_NQ</div><div class='del'>-	u8	cmpl_coal_cnt;</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_OFF 0x0UL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_4   0x1UL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_8   0x2UL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_12  0x3UL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_16  0x4UL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_24  0x5UL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_32  0x6UL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_48  0x7UL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_64  0x8UL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_96  0x9UL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_128 0xaUL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_192 0xbUL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_256 0xcUL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_320 0xdUL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_384 0xeUL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_MAX 0xfUL</div><div class='del'>-	#define RING_ALLOC_REQ_CMPL_COAL_CNT_LAST    RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_MAX</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define RING_ALLOC_REQ_FLAGS_RX_SOP_PAD                        0x1UL</div><div class='del'>-	#define RING_ALLOC_REQ_FLAGS_DISABLE_CQ_OVERFLOW_DETECTION     0x2UL</div><div class='del'>-	#define RING_ALLOC_REQ_FLAGS_NQ_DBR_PACING                     0x4UL</div><div class='del'>-	#define RING_ALLOC_REQ_FLAGS_TX_PKT_TS_CMPL_ENABLE             0x8UL</div><div class='del'>-	__le64	page_tbl_addr;</div><div class='del'>-	__le32	fbo;</div><div class='del'>-	u8	page_size;</div><div class='del'>-	u8	page_tbl_depth;</div><div class='del'>-	__le16	schq_id;</div><div class='del'>-	__le32	length;</div><div class='del'>-	__le16	logical_id;</div><div class='del'>-	__le16	cmpl_ring_id;</div><div class='del'>-	__le16	queue_id;</div><div class='del'>-	__le16	rx_buf_size;</div><div class='del'>-	__le16	rx_ring_id;</div><div class='del'>-	__le16	nq_ring_id;</div><div class='del'>-	__le16	ring_arb_cfg;</div><div class='del'>-	#define RING_ALLOC_REQ_RING_ARB_CFG_ARB_POLICY_MASK      0xfUL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_ARB_CFG_ARB_POLICY_SFT       0</div><div class='del'>-	#define RING_ALLOC_REQ_RING_ARB_CFG_ARB_POLICY_SP          0x1UL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_ARB_CFG_ARB_POLICY_WFQ         0x2UL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_ARB_CFG_ARB_POLICY_LAST       RING_ALLOC_REQ_RING_ARB_CFG_ARB_POLICY_WFQ</div><div class='del'>-	#define RING_ALLOC_REQ_RING_ARB_CFG_RSVD_MASK            0xf0UL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_ARB_CFG_RSVD_SFT             4</div><div class='del'>-	#define RING_ALLOC_REQ_RING_ARB_CFG_ARB_POLICY_PARAM_MASK 0xff00UL</div><div class='del'>-	#define RING_ALLOC_REQ_RING_ARB_CFG_ARB_POLICY_PARAM_SFT 8</div><div class='del'>-	__le16	steering_tag;</div><div class='del'>-	__le32	reserved3;</div><div class='del'>-	__le32	stat_ctx_id;</div><div class='del'>-	__le32	reserved4;</div><div class='del'>-	__le32	max_bw;</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_MASK             0xfffffffUL</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_SFT              0</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_SCALE                     0x10000000UL</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_SCALE_BITS                  (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_SCALE_BYTES                 (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_SCALE_LAST                 RING_ALLOC_REQ_MAX_BW_SCALE_BYTES</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_UNIT_MASK        0xe0000000UL</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_UNIT_SFT         29</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_UNIT_MEGA          (0x0UL &lt;&lt; 29)</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_UNIT_KILO          (0x2UL &lt;&lt; 29)</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_UNIT_BASE          (0x4UL &lt;&lt; 29)</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_UNIT_GIGA          (0x6UL &lt;&lt; 29)</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_UNIT_PERCENT1_100  (0x1UL &lt;&lt; 29)</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_UNIT_INVALID       (0x7UL &lt;&lt; 29)</div><div class='del'>-	#define RING_ALLOC_REQ_MAX_BW_BW_VALUE_UNIT_LAST         RING_ALLOC_REQ_MAX_BW_BW_VALUE_UNIT_INVALID</div><div class='del'>-	u8	int_mode;</div><div class='del'>-	#define RING_ALLOC_REQ_INT_MODE_LEGACY 0x0UL</div><div class='del'>-	#define RING_ALLOC_REQ_INT_MODE_RSVD   0x1UL</div><div class='del'>-	#define RING_ALLOC_REQ_INT_MODE_MSIX   0x2UL</div><div class='del'>-	#define RING_ALLOC_REQ_INT_MODE_POLL   0x3UL</div><div class='del'>-	#define RING_ALLOC_REQ_INT_MODE_LAST  RING_ALLOC_REQ_INT_MODE_POLL</div><div class='del'>-	u8	mpc_chnls_type;</div><div class='del'>-	#define RING_ALLOC_REQ_MPC_CHNLS_TYPE_TCE     0x0UL</div><div class='del'>-	#define RING_ALLOC_REQ_MPC_CHNLS_TYPE_RCE     0x1UL</div><div class='del'>-	#define RING_ALLOC_REQ_MPC_CHNLS_TYPE_TE_CFA  0x2UL</div><div class='del'>-	#define RING_ALLOC_REQ_MPC_CHNLS_TYPE_RE_CFA  0x3UL</div><div class='del'>-	#define RING_ALLOC_REQ_MPC_CHNLS_TYPE_PRIMATE 0x4UL</div><div class='del'>-	#define RING_ALLOC_REQ_MPC_CHNLS_TYPE_LAST   RING_ALLOC_REQ_MPC_CHNLS_TYPE_PRIMATE</div><div class='del'>-	u8	unused_4[2];</div><div class='del'>-	__le64	cq_handle;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_ring_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	ring_id;</div><div class='del'>-	__le16	logical_ring_id;</div><div class='del'>-	u8	push_buffer_index;</div><div class='del'>-	#define RING_ALLOC_RESP_PUSH_BUFFER_INDEX_PING_BUFFER 0x0UL</div><div class='del'>-	#define RING_ALLOC_RESP_PUSH_BUFFER_INDEX_PONG_BUFFER 0x1UL</div><div class='del'>-	#define RING_ALLOC_RESP_PUSH_BUFFER_INDEX_LAST       RING_ALLOC_RESP_PUSH_BUFFER_INDEX_PONG_BUFFER</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_free_input (size:256b/32B) */</div><div class='del'>-struct hwrm_ring_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	ring_type;</div><div class='del'>-	#define RING_FREE_REQ_RING_TYPE_L2_CMPL   0x0UL</div><div class='del'>-	#define RING_FREE_REQ_RING_TYPE_TX        0x1UL</div><div class='del'>-	#define RING_FREE_REQ_RING_TYPE_RX        0x2UL</div><div class='del'>-	#define RING_FREE_REQ_RING_TYPE_ROCE_CMPL 0x3UL</div><div class='del'>-	#define RING_FREE_REQ_RING_TYPE_RX_AGG    0x4UL</div><div class='del'>-	#define RING_FREE_REQ_RING_TYPE_NQ        0x5UL</div><div class='del'>-	#define RING_FREE_REQ_RING_TYPE_LAST     RING_FREE_REQ_RING_TYPE_NQ</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define RING_FREE_REQ_FLAGS_VIRTIO_RING_VALID 0x1UL</div><div class='del'>-	#define RING_FREE_REQ_FLAGS_LAST             RING_FREE_REQ_FLAGS_VIRTIO_RING_VALID</div><div class='del'>-	__le16	ring_id;</div><div class='del'>-	__le32	prod_idx;</div><div class='del'>-	__le32	opaque;</div><div class='del'>-	__le32	unused_1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_ring_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_reset_input (size:192b/24B) */</div><div class='del'>-struct hwrm_ring_reset_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	ring_type;</div><div class='del'>-	#define RING_RESET_REQ_RING_TYPE_L2_CMPL     0x0UL</div><div class='del'>-	#define RING_RESET_REQ_RING_TYPE_TX          0x1UL</div><div class='del'>-	#define RING_RESET_REQ_RING_TYPE_RX          0x2UL</div><div class='del'>-	#define RING_RESET_REQ_RING_TYPE_ROCE_CMPL   0x3UL</div><div class='del'>-	#define RING_RESET_REQ_RING_TYPE_RX_RING_GRP 0x6UL</div><div class='del'>-	#define RING_RESET_REQ_RING_TYPE_LAST       RING_RESET_REQ_RING_TYPE_RX_RING_GRP</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	ring_id;</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_reset_output (size:128b/16B) */</div><div class='del'>-struct hwrm_ring_reset_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	push_buffer_index;</div><div class='del'>-	#define RING_RESET_RESP_PUSH_BUFFER_INDEX_PING_BUFFER 0x0UL</div><div class='del'>-	#define RING_RESET_RESP_PUSH_BUFFER_INDEX_PONG_BUFFER 0x1UL</div><div class='del'>-	#define RING_RESET_RESP_PUSH_BUFFER_INDEX_LAST       RING_RESET_RESP_PUSH_BUFFER_INDEX_PONG_BUFFER</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	consumer_idx[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_aggint_qcaps_input (size:128b/16B) */</div><div class='del'>-struct hwrm_ring_aggint_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_aggint_qcaps_output (size:384b/48B) */</div><div class='del'>-struct hwrm_ring_aggint_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	cmpl_params;</div><div class='del'>-	#define RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_INT_LAT_TMR_MIN                  0x1UL</div><div class='del'>-	#define RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_INT_LAT_TMR_MAX                  0x2UL</div><div class='del'>-	#define RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_TIMER_RESET                      0x4UL</div><div class='del'>-	#define RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_RING_IDLE                        0x8UL</div><div class='del'>-	#define RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_NUM_CMPL_DMA_AGGR                0x10UL</div><div class='del'>-	#define RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_NUM_CMPL_DMA_AGGR_DURING_INT     0x20UL</div><div class='del'>-	#define RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_CMPL_AGGR_DMA_TMR                0x40UL</div><div class='del'>-	#define RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_CMPL_AGGR_DMA_TMR_DURING_INT     0x80UL</div><div class='del'>-	#define RING_AGGINT_QCAPS_RESP_CMPL_PARAMS_NUM_CMPL_AGGR_INT                0x100UL</div><div class='del'>-	__le32	nq_params;</div><div class='del'>-	#define RING_AGGINT_QCAPS_RESP_NQ_PARAMS_INT_LAT_TMR_MIN     0x1UL</div><div class='del'>-	__le16	num_cmpl_dma_aggr_min;</div><div class='del'>-	__le16	num_cmpl_dma_aggr_max;</div><div class='del'>-	__le16	num_cmpl_dma_aggr_during_int_min;</div><div class='del'>-	__le16	num_cmpl_dma_aggr_during_int_max;</div><div class='del'>-	__le16	cmpl_aggr_dma_tmr_min;</div><div class='del'>-	__le16	cmpl_aggr_dma_tmr_max;</div><div class='del'>-	__le16	cmpl_aggr_dma_tmr_during_int_min;</div><div class='del'>-	__le16	cmpl_aggr_dma_tmr_during_int_max;</div><div class='del'>-	__le16	int_lat_tmr_min_min;</div><div class='del'>-	__le16	int_lat_tmr_min_max;</div><div class='del'>-	__le16	int_lat_tmr_max_min;</div><div class='del'>-	__le16	int_lat_tmr_max_max;</div><div class='del'>-	__le16	num_cmpl_aggr_int_min;</div><div class='del'>-	__le16	num_cmpl_aggr_int_max;</div><div class='del'>-	__le16	timer_units;</div><div class='del'>-	u8	unused_0[1];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_cmpl_ring_qaggint_params_input (size:192b/24B) */</div><div class='del'>-struct hwrm_ring_cmpl_ring_qaggint_params_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	ring_id;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define RING_CMPL_RING_QAGGINT_PARAMS_REQ_FLAGS_UNUSED_0_MASK 0x3UL</div><div class='del'>-	#define RING_CMPL_RING_QAGGINT_PARAMS_REQ_FLAGS_UNUSED_0_SFT 0</div><div class='del'>-	#define RING_CMPL_RING_QAGGINT_PARAMS_REQ_FLAGS_IS_NQ        0x4UL</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_cmpl_ring_qaggint_params_output (size:256b/32B) */</div><div class='del'>-struct hwrm_ring_cmpl_ring_qaggint_params_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define RING_CMPL_RING_QAGGINT_PARAMS_RESP_FLAGS_TIMER_RESET     0x1UL</div><div class='del'>-	#define RING_CMPL_RING_QAGGINT_PARAMS_RESP_FLAGS_RING_IDLE       0x2UL</div><div class='del'>-	__le16	num_cmpl_dma_aggr;</div><div class='del'>-	__le16	num_cmpl_dma_aggr_during_int;</div><div class='del'>-	__le16	cmpl_aggr_dma_tmr;</div><div class='del'>-	__le16	cmpl_aggr_dma_tmr_during_int;</div><div class='del'>-	__le16	int_lat_tmr_min;</div><div class='del'>-	__le16	int_lat_tmr_max;</div><div class='del'>-	__le16	num_cmpl_aggr_int;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_cmpl_ring_cfg_aggint_params_input (size:320b/40B) */</div><div class='del'>-struct hwrm_ring_cmpl_ring_cfg_aggint_params_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	ring_id;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_TIMER_RESET     0x1UL</div><div class='del'>-	#define RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_RING_IDLE       0x2UL</div><div class='del'>-	#define RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_FLAGS_IS_NQ           0x4UL</div><div class='del'>-	__le16	num_cmpl_dma_aggr;</div><div class='del'>-	__le16	num_cmpl_dma_aggr_during_int;</div><div class='del'>-	__le16	cmpl_aggr_dma_tmr;</div><div class='del'>-	__le16	cmpl_aggr_dma_tmr_during_int;</div><div class='del'>-	__le16	int_lat_tmr_min;</div><div class='del'>-	__le16	int_lat_tmr_max;</div><div class='del'>-	__le16	num_cmpl_aggr_int;</div><div class='del'>-	__le16	enables;</div><div class='del'>-	#define RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_ENABLES_NUM_CMPL_DMA_AGGR                0x1UL</div><div class='del'>-	#define RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_ENABLES_NUM_CMPL_DMA_AGGR_DURING_INT     0x2UL</div><div class='del'>-	#define RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_ENABLES_CMPL_AGGR_DMA_TMR                0x4UL</div><div class='del'>-	#define RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_ENABLES_INT_LAT_TMR_MIN                  0x8UL</div><div class='del'>-	#define RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_ENABLES_INT_LAT_TMR_MAX                  0x10UL</div><div class='del'>-	#define RING_CMPL_RING_CFG_AGGINT_PARAMS_REQ_ENABLES_NUM_CMPL_AGGR_INT                0x20UL</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_cmpl_ring_cfg_aggint_params_output (size:128b/16B) */</div><div class='del'>-struct hwrm_ring_cmpl_ring_cfg_aggint_params_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_grp_alloc_input (size:192b/24B) */</div><div class='del'>-struct hwrm_ring_grp_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	cr;</div><div class='del'>-	__le16	rr;</div><div class='del'>-	__le16	ar;</div><div class='del'>-	__le16	sc;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_grp_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_ring_grp_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	ring_group_id;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_grp_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_ring_grp_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	ring_group_id;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_ring_grp_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_ring_grp_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define DEFAULT_FLOW_ID 0xFFFFFFFFUL</div><div class='del'>-#define ROCEV1_FLOW_ID 0xFFFFFFFEUL</div><div class='del'>-#define ROCEV2_FLOW_ID 0xFFFFFFFDUL</div><div class='del'>-#define ROCEV2_CNP_FLOW_ID 0xFFFFFFFCUL</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_l2_filter_alloc_input (size:768b/96B) */</div><div class='del'>-struct hwrm_cfa_l2_filter_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH              0x1UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_TX             0x0UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_RX             0x1UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_LAST          CFA_L2_FILTER_ALLOC_REQ_FLAGS_PATH_RX</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_LOOPBACK          0x2UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_DROP              0x4UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_OUTERMOST         0x8UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_MASK      0x30UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_SFT       4</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_NO_ROCE_L2  (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_L2          (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_ROCE        (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_LAST       CFA_L2_FILTER_ALLOC_REQ_FLAGS_TRAFFIC_ROCE</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_XDP_DISABLE       0x40UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_FLAGS_SOURCE_VALID      0x80UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR             0x1UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_ADDR_MASK        0x2UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_OVLAN            0x4UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_OVLAN_MASK       0x8UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_IVLAN            0x10UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_L2_IVLAN_MASK       0x20UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_ADDR           0x40UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_ADDR_MASK      0x80UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_OVLAN          0x100UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_OVLAN_MASK     0x200UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_IVLAN          0x400UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_L2_IVLAN_MASK     0x800UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_SRC_TYPE            0x1000UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_SRC_ID              0x2000UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_TUNNEL_TYPE         0x4000UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_DST_ID              0x8000UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_MIRROR_VNIC_ID      0x10000UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_NUM_VLANS           0x20000UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_ENABLES_T_NUM_VLANS         0x40000UL</div><div class='del'>-	u8	l2_addr[6];</div><div class='del'>-	u8	num_vlans;</div><div class='del'>-	u8	t_num_vlans;</div><div class='del'>-	u8	l2_addr_mask[6];</div><div class='del'>-	__le16	l2_ovlan;</div><div class='del'>-	__le16	l2_ovlan_mask;</div><div class='del'>-	__le16	l2_ivlan;</div><div class='del'>-	__le16	l2_ivlan_mask;</div><div class='del'>-	u8	unused_1[2];</div><div class='del'>-	u8	t_l2_addr[6];</div><div class='del'>-	u8	unused_2[2];</div><div class='del'>-	u8	t_l2_addr_mask[6];</div><div class='del'>-	__le16	t_l2_ovlan;</div><div class='del'>-	__le16	t_l2_ovlan_mask;</div><div class='del'>-	__le16	t_l2_ivlan;</div><div class='del'>-	__le16	t_l2_ivlan_mask;</div><div class='del'>-	u8	src_type;</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_NPORT 0x0UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_PF    0x1UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_VF    0x2UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_VNIC  0x3UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_KONG  0x4UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_APE   0x5UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_BONO  0x6UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_TANG  0x7UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_LAST CFA_L2_FILTER_ALLOC_REQ_SRC_TYPE_TANG</div><div class='del'>-	u8	unused_3;</div><div class='del'>-	__le32	src_id;</div><div class='del'>-	u8	tunnel_type;</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_NONTUNNEL    0x0UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN        0x1UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE        0x2UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2GRE        0x3UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPIP         0x4UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_GENEVE       0x5UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_MPLS         0x6UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_STT          0x7UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE        0x8UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4     0x9UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1     0xaUL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE     0xbUL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6 0xcUL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE    0x10UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL    0xffUL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_LAST        CFA_L2_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL</div><div class='del'>-	u8	unused_4;</div><div class='del'>-	__le16	dst_id;</div><div class='del'>-	__le16	mirror_vnic_id;</div><div class='del'>-	u8	pri_hint;</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_NO_PREFER    0x0UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_ABOVE_FILTER 0x1UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_BELOW_FILTER 0x2UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_MAX          0x3UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_MIN          0x4UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_LAST        CFA_L2_FILTER_ALLOC_REQ_PRI_HINT_MIN</div><div class='del'>-	u8	unused_5;</div><div class='del'>-	__le32	unused_6;</div><div class='del'>-	__le64	l2_filter_id_hint;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_l2_filter_alloc_output (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_l2_filter_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	l2_filter_id;</div><div class='del'>-	__le32	flow_id;</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_VALUE_MASK 0x3fffffffUL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_VALUE_SFT 0</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_TYPE      0x40000000UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_TYPE_INT    (0x0UL &lt;&lt; 30)</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_TYPE_EXT    (0x1UL &lt;&lt; 30)</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_TYPE_LAST  CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_TYPE_EXT</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_DIR       0x80000000UL</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_DIR_RX      (0x0UL &lt;&lt; 31)</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_DIR_TX      (0x1UL &lt;&lt; 31)</div><div class='del'>-	#define CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_DIR_LAST   CFA_L2_FILTER_ALLOC_RESP_FLOW_ID_DIR_TX</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_l2_filter_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_l2_filter_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	l2_filter_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_l2_filter_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_l2_filter_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_l2_filter_cfg_input (size:384b/48B) */</div><div class='del'>-struct hwrm_cfa_l2_filter_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_PATH                  0x1UL</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_PATH_TX                 0x0UL</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_PATH_RX                 0x1UL</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_PATH_LAST              CFA_L2_FILTER_CFG_REQ_FLAGS_PATH_RX</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_DROP                  0x2UL</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_MASK          0xcUL</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_SFT           2</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_NO_ROCE_L2      (0x0UL &lt;&lt; 2)</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_L2              (0x1UL &lt;&lt; 2)</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_ROCE            (0x2UL &lt;&lt; 2)</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_LAST           CFA_L2_FILTER_CFG_REQ_FLAGS_TRAFFIC_ROCE</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_REMAP_OP_MASK         0x30UL</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_REMAP_OP_SFT          4</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_REMAP_OP_NO_UPDATE      (0x0UL &lt;&lt; 4)</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_REMAP_OP_BYPASS_LKUP    (0x1UL &lt;&lt; 4)</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_REMAP_OP_ENABLE_LKUP    (0x2UL &lt;&lt; 4)</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_REMAP_OP_RESTORE_FW_OP  (0x3UL &lt;&lt; 4)</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_FLAGS_REMAP_OP_LAST          CFA_L2_FILTER_CFG_REQ_FLAGS_REMAP_OP_RESTORE_FW_OP</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_ENABLES_DST_ID                 0x1UL</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_ENABLES_NEW_MIRROR_VNIC_ID     0x2UL</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_ENABLES_PROF_FUNC              0x4UL</div><div class='del'>-	#define CFA_L2_FILTER_CFG_REQ_ENABLES_L2_CONTEXT_ID          0x8UL</div><div class='del'>-	__le64	l2_filter_id;</div><div class='del'>-	__le32	dst_id;</div><div class='del'>-	__le32	new_mirror_vnic_id;</div><div class='del'>-	__le32	prof_func;</div><div class='del'>-	__le32	l2_context_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_l2_filter_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_l2_filter_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_l2_set_rx_mask_input (size:448b/56B) */</div><div class='del'>-struct hwrm_cfa_l2_set_rx_mask_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	vnic_id;</div><div class='del'>-	__le32	mask;</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_REQ_MASK_MCAST               0x2UL</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_REQ_MASK_ALL_MCAST           0x4UL</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_REQ_MASK_BCAST               0x8UL</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_REQ_MASK_PROMISCUOUS         0x10UL</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_REQ_MASK_OUTERMOST           0x20UL</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_REQ_MASK_VLANONLY            0x40UL</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_REQ_MASK_VLAN_NONVLAN        0x80UL</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_REQ_MASK_ANYVLAN_NONVLAN     0x100UL</div><div class='del'>-	__le64	mc_tbl_addr;</div><div class='del'>-	__le32	num_mc_entries;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-	__le64	vlan_tag_tbl_addr;</div><div class='del'>-	__le32	num_vlan_tags;</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_l2_set_rx_mask_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_l2_set_rx_mask_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_l2_set_rx_mask_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_cfa_l2_set_rx_mask_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_CMD_ERR_CODE_UNKNOWN                    0x0UL</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_CMD_ERR_CODE_NTUPLE_FILTER_CONFLICT_ERR 0x1UL</div><div class='del'>-	#define CFA_L2_SET_RX_MASK_CMD_ERR_CODE_LAST                      CFA_L2_SET_RX_MASK_CMD_ERR_CODE_NTUPLE_FILTER_CONFLICT_ERR</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_tunnel_filter_alloc_input (size:704b/88B) */</div><div class='del'>-struct hwrm_cfa_tunnel_filter_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_FLAGS_LOOPBACK     0x1UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_L2_FILTER_ID       0x1UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_L2_ADDR            0x2UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_L2_IVLAN           0x4UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_L3_ADDR            0x8UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_L3_ADDR_TYPE       0x10UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_T_L3_ADDR_TYPE     0x20UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_T_L3_ADDR          0x40UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_TUNNEL_TYPE        0x80UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_VNI                0x100UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_DST_VNIC_ID        0x200UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_ENABLES_MIRROR_VNIC_ID     0x400UL</div><div class='del'>-	__le64	l2_filter_id;</div><div class='del'>-	u8	l2_addr[6];</div><div class='del'>-	__le16	l2_ivlan;</div><div class='del'>-	__le32	l3_addr[4];</div><div class='del'>-	__le32	t_l3_addr[4];</div><div class='del'>-	u8	l3_addr_type;</div><div class='del'>-	u8	t_l3_addr_type;</div><div class='del'>-	u8	tunnel_type;</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_NONTUNNEL    0x0UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN        0x1UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE        0x2UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2GRE        0x3UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPIP         0x4UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_GENEVE       0x5UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_MPLS         0x6UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_STT          0x7UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE        0x8UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4     0x9UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1     0xaUL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE     0xbUL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6 0xcUL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE    0x10UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL    0xffUL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_LAST        CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL</div><div class='del'>-	u8	tunnel_flags;</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_FLAGS_TUN_FLAGS_OAM_CHECKSUM_EXPLHDR     0x1UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_FLAGS_TUN_FLAGS_CRITICAL_OPT_S1          0x2UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_REQ_TUNNEL_FLAGS_TUN_FLAGS_EXTHDR_SEQNUM_S0         0x4UL</div><div class='del'>-	__le32	vni;</div><div class='del'>-	__le32	dst_vnic_id;</div><div class='del'>-	__le32	mirror_vnic_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_tunnel_filter_alloc_output (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_tunnel_filter_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	tunnel_filter_id;</div><div class='del'>-	__le32	flow_id;</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_VALUE_MASK 0x3fffffffUL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_VALUE_SFT 0</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_TYPE      0x40000000UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_TYPE_INT    (0x0UL &lt;&lt; 30)</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_TYPE_EXT    (0x1UL &lt;&lt; 30)</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_TYPE_LAST  CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_TYPE_EXT</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_DIR       0x80000000UL</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_DIR_RX      (0x0UL &lt;&lt; 31)</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_DIR_TX      (0x1UL &lt;&lt; 31)</div><div class='del'>-	#define CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_DIR_LAST   CFA_TUNNEL_FILTER_ALLOC_RESP_FLOW_ID_DIR_TX</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_tunnel_filter_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_tunnel_filter_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	tunnel_filter_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_tunnel_filter_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_tunnel_filter_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vxlan_ipv4_hdr (size:128b/16B) */</div><div class='del'>-struct hwrm_vxlan_ipv4_hdr {</div><div class='del'>-	u8	ver_hlen;</div><div class='del'>-	#define VXLAN_IPV4_HDR_VER_HLEN_HEADER_LENGTH_MASK 0xfUL</div><div class='del'>-	#define VXLAN_IPV4_HDR_VER_HLEN_HEADER_LENGTH_SFT 0</div><div class='del'>-	#define VXLAN_IPV4_HDR_VER_HLEN_VERSION_MASK      0xf0UL</div><div class='del'>-	#define VXLAN_IPV4_HDR_VER_HLEN_VERSION_SFT       4</div><div class='del'>-	u8	tos;</div><div class='del'>-	__be16	ip_id;</div><div class='del'>-	__be16	flags_frag_offset;</div><div class='del'>-	u8	ttl;</div><div class='del'>-	u8	protocol;</div><div class='del'>-	__be32	src_ip_addr;</div><div class='del'>-	__be32	dest_ip_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_vxlan_ipv6_hdr (size:320b/40B) */</div><div class='del'>-struct hwrm_vxlan_ipv6_hdr {</div><div class='del'>-	__be32	ver_tc_flow_label;</div><div class='del'>-	#define VXLAN_IPV6_HDR_VER_TC_FLOW_LABEL_VER_SFT         0x1cUL</div><div class='del'>-	#define VXLAN_IPV6_HDR_VER_TC_FLOW_LABEL_VER_MASK        0xf0000000UL</div><div class='del'>-	#define VXLAN_IPV6_HDR_VER_TC_FLOW_LABEL_TC_SFT          0x14UL</div><div class='del'>-	#define VXLAN_IPV6_HDR_VER_TC_FLOW_LABEL_TC_MASK         0xff00000UL</div><div class='del'>-	#define VXLAN_IPV6_HDR_VER_TC_FLOW_LABEL_FLOW_LABEL_SFT  0x0UL</div><div class='del'>-	#define VXLAN_IPV6_HDR_VER_TC_FLOW_LABEL_FLOW_LABEL_MASK 0xfffffUL</div><div class='del'>-	#define VXLAN_IPV6_HDR_VER_TC_FLOW_LABEL_LAST           VXLAN_IPV6_HDR_VER_TC_FLOW_LABEL_FLOW_LABEL_MASK</div><div class='del'>-	__be16	payload_len;</div><div class='del'>-	u8	next_hdr;</div><div class='del'>-	u8	ttl;</div><div class='del'>-	__be32	src_ip_addr[4];</div><div class='del'>-	__be32	dest_ip_addr[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_encap_data_vxlan (size:640b/80B) */</div><div class='del'>-struct hwrm_cfa_encap_data_vxlan {</div><div class='del'>-	u8	src_mac_addr[6];</div><div class='del'>-	__le16	unused_0;</div><div class='del'>-	u8	dst_mac_addr[6];</div><div class='del'>-	u8	num_vlan_tags;</div><div class='del'>-	u8	unused_1;</div><div class='del'>-	__be16	ovlan_tpid;</div><div class='del'>-	__be16	ovlan_tci;</div><div class='del'>-	__be16	ivlan_tpid;</div><div class='del'>-	__be16	ivlan_tci;</div><div class='del'>-	__le32	l3[10];</div><div class='del'>-	#define CFA_ENCAP_DATA_VXLAN_L3_VER_MASK 0xfUL</div><div class='del'>-	#define CFA_ENCAP_DATA_VXLAN_L3_VER_IPV4 0x4UL</div><div class='del'>-	#define CFA_ENCAP_DATA_VXLAN_L3_VER_IPV6 0x6UL</div><div class='del'>-	#define CFA_ENCAP_DATA_VXLAN_L3_LAST    CFA_ENCAP_DATA_VXLAN_L3_VER_IPV6</div><div class='del'>-	__be16	src_port;</div><div class='del'>-	__be16	dst_port;</div><div class='del'>-	__be32	vni;</div><div class='del'>-	u8	hdr_rsvd0[3];</div><div class='del'>-	u8	hdr_rsvd1;</div><div class='del'>-	u8	hdr_flags;</div><div class='del'>-	u8	unused[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_encap_record_alloc_input (size:832b/104B) */</div><div class='del'>-struct hwrm_cfa_encap_record_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_FLAGS_LOOPBACK     0x1UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_FLAGS_EXTERNAL     0x2UL</div><div class='del'>-	u8	encap_type;</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VXLAN        0x1UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_NVGRE        0x2UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_L2GRE        0x3UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_IPIP         0x4UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_GENEVE       0x5UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_MPLS         0x6UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VLAN         0x7UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_IPGRE        0x8UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VXLAN_V4     0x9UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_IPGRE_V1     0xaUL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_L2_ETYPE     0xbUL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VXLAN_GPE_V6 0xcUL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VXLAN_GPE    0x10UL</div><div class='del'>-	#define CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_LAST        CFA_ENCAP_RECORD_ALLOC_REQ_ENCAP_TYPE_VXLAN_GPE</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	__le32	encap_data[20];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_encap_record_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_encap_record_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	encap_record_id;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_encap_record_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_encap_record_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	encap_record_id;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_encap_record_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_encap_record_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_ntuple_filter_alloc_input (size:1024b/128B) */</div><div class='del'>-struct hwrm_cfa_ntuple_filter_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_LOOPBACK              0x1UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_DROP                  0x2UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_METER                 0x4UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_DEST_FID              0x8UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_ARP_REPLY             0x10UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_DEST_RFS_RING_IDX     0x20UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_NO_L2_CONTEXT         0x40UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_L2_FILTER_ID         0x1UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_ETHERTYPE            0x2UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_TUNNEL_TYPE          0x4UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_SRC_MACADDR          0x8UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_IPADDR_TYPE          0x10UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_SRC_IPADDR           0x20UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_SRC_IPADDR_MASK      0x40UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_IPADDR           0x80UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_IPADDR_MASK      0x100UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_IP_PROTOCOL          0x200UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_SRC_PORT             0x400UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_SRC_PORT_MASK        0x800UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_PORT             0x1000UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_PORT_MASK        0x2000UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_PRI_HINT             0x4000UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_NTUPLE_FILTER_ID     0x8000UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_ID               0x10000UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_MIRROR_VNIC_ID       0x20000UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_DST_MACADDR          0x40000UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_RFS_RING_TBL_IDX     0x80000UL</div><div class='del'>-	__le64	l2_filter_id;</div><div class='del'>-	u8	src_macaddr[6];</div><div class='del'>-	__be16	ethertype;</div><div class='del'>-	u8	ip_addr_type;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_UNKNOWN 0x0UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV4    0x4UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV6    0x6UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_LAST   CFA_NTUPLE_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV6</div><div class='del'>-	u8	ip_protocol;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_UNKNOWN 0x0UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_TCP     0x6UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_UDP     0x11UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_ICMP    0x1UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_ICMPV6  0x3aUL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_RSVD    0xffUL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_LAST   CFA_NTUPLE_FILTER_ALLOC_REQ_IP_PROTOCOL_RSVD</div><div class='del'>-	__le16	dst_id;</div><div class='del'>-	__le16	rfs_ring_tbl_idx;</div><div class='del'>-	u8	tunnel_type;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NONTUNNEL    0x0UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN        0x1UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE        0x2UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2GRE        0x3UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPIP         0x4UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_GENEVE       0x5UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_MPLS         0x6UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_STT          0x7UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE        0x8UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4     0x9UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1     0xaUL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE     0xbUL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6 0xcUL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE    0x10UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL    0xffUL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_LAST        CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL</div><div class='del'>-	u8	pri_hint;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_NO_PREFER 0x0UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_ABOVE     0x1UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_BELOW     0x2UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_HIGHEST   0x3UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_LOWEST    0x4UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_LAST     CFA_NTUPLE_FILTER_ALLOC_REQ_PRI_HINT_LOWEST</div><div class='del'>-	__be32	src_ipaddr[4];</div><div class='del'>-	__be32	src_ipaddr_mask[4];</div><div class='del'>-	__be32	dst_ipaddr[4];</div><div class='del'>-	__be32	dst_ipaddr_mask[4];</div><div class='del'>-	__be16	src_port;</div><div class='del'>-	__be16	src_port_mask;</div><div class='del'>-	__be16	dst_port;</div><div class='del'>-	__be16	dst_port_mask;</div><div class='del'>-	__le64	ntuple_filter_id_hint;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_ntuple_filter_alloc_output (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_ntuple_filter_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	ntuple_filter_id;</div><div class='del'>-	__le32	flow_id;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_VALUE_MASK 0x3fffffffUL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_VALUE_SFT 0</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_TYPE      0x40000000UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_TYPE_INT    (0x0UL &lt;&lt; 30)</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_TYPE_EXT    (0x1UL &lt;&lt; 30)</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_TYPE_LAST  CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_TYPE_EXT</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_DIR       0x80000000UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_DIR_RX      (0x0UL &lt;&lt; 31)</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_DIR_TX      (0x1UL &lt;&lt; 31)</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_DIR_LAST   CFA_NTUPLE_FILTER_ALLOC_RESP_FLOW_ID_DIR_TX</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_ntuple_filter_alloc_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_cfa_ntuple_filter_alloc_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_UNKNOWN                   0x0UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_RX_MASK_VLAN_CONFLICT_ERR 0x1UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_LAST                     CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_RX_MASK_VLAN_CONFLICT_ERR</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_ntuple_filter_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_ntuple_filter_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	ntuple_filter_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_ntuple_filter_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_ntuple_filter_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_ntuple_filter_cfg_input (size:384b/48B) */</div><div class='del'>-struct hwrm_cfa_ntuple_filter_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_CFG_REQ_ENABLES_NEW_DST_ID                0x1UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_CFG_REQ_ENABLES_NEW_MIRROR_VNIC_ID        0x2UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_CFG_REQ_ENABLES_NEW_METER_INSTANCE_ID     0x4UL</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_CFG_REQ_FLAGS_DEST_FID              0x1UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_CFG_REQ_FLAGS_DEST_RFS_RING_IDX     0x2UL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_CFG_REQ_FLAGS_NO_L2_CONTEXT         0x4UL</div><div class='del'>-	__le64	ntuple_filter_id;</div><div class='del'>-	__le32	new_dst_id;</div><div class='del'>-	__le32	new_mirror_vnic_id;</div><div class='del'>-	__le16	new_meter_instance_id;</div><div class='del'>-	#define CFA_NTUPLE_FILTER_CFG_REQ_NEW_METER_INSTANCE_ID_INVALID 0xffffUL</div><div class='del'>-	#define CFA_NTUPLE_FILTER_CFG_REQ_NEW_METER_INSTANCE_ID_LAST   CFA_NTUPLE_FILTER_CFG_REQ_NEW_METER_INSTANCE_ID_INVALID</div><div class='del'>-	u8	unused_1[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_ntuple_filter_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_ntuple_filter_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_decap_filter_alloc_input (size:832b/104B) */</div><div class='del'>-struct hwrm_cfa_decap_filter_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_FLAGS_OVS_TUNNEL     0x1UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_TUNNEL_TYPE        0x1UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_TUNNEL_ID          0x2UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_SRC_MACADDR        0x4UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_MACADDR        0x8UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_OVLAN_VID          0x10UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_IVLAN_VID          0x20UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_T_OVLAN_VID        0x40UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_T_IVLAN_VID        0x80UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_ETHERTYPE          0x100UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_SRC_IPADDR         0x200UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_IPADDR         0x400UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_IPADDR_TYPE        0x800UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_IP_PROTOCOL        0x1000UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_SRC_PORT           0x2000UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_PORT           0x4000UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_DST_ID             0x8000UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_ENABLES_MIRROR_VNIC_ID     0x10000UL</div><div class='del'>-	__be32	tunnel_id;</div><div class='del'>-	u8	tunnel_type;</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_NONTUNNEL    0x0UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN        0x1UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE        0x2UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2GRE        0x3UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPIP         0x4UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_GENEVE       0x5UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_MPLS         0x6UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_STT          0x7UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE        0x8UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4     0x9UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1     0xaUL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE     0xbUL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6 0xcUL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE    0x10UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL    0xffUL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_LAST        CFA_DECAP_FILTER_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	unused_1;</div><div class='del'>-	u8	src_macaddr[6];</div><div class='del'>-	u8	unused_2[2];</div><div class='del'>-	u8	dst_macaddr[6];</div><div class='del'>-	__be16	ovlan_vid;</div><div class='del'>-	__be16	ivlan_vid;</div><div class='del'>-	__be16	t_ovlan_vid;</div><div class='del'>-	__be16	t_ivlan_vid;</div><div class='del'>-	__be16	ethertype;</div><div class='del'>-	u8	ip_addr_type;</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_UNKNOWN 0x0UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV4    0x4UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV6    0x6UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_LAST   CFA_DECAP_FILTER_ALLOC_REQ_IP_ADDR_TYPE_IPV6</div><div class='del'>-	u8	ip_protocol;</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_UNKNOWN 0x0UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_TCP     0x6UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_UDP     0x11UL</div><div class='del'>-	#define CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_LAST   CFA_DECAP_FILTER_ALLOC_REQ_IP_PROTOCOL_UDP</div><div class='del'>-	__le16	unused_3;</div><div class='del'>-	__le32	unused_4;</div><div class='del'>-	__be32	src_ipaddr[4];</div><div class='del'>-	__be32	dst_ipaddr[4];</div><div class='del'>-	__be16	src_port;</div><div class='del'>-	__be16	dst_port;</div><div class='del'>-	__le16	dst_id;</div><div class='del'>-	__le16	l2_ctxt_ref_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_decap_filter_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_decap_filter_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	decap_filter_id;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_decap_filter_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_decap_filter_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	decap_filter_id;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_decap_filter_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_decap_filter_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_flow_alloc_input (size:1024b/128B) */</div><div class='del'>-struct hwrm_cfa_flow_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_TUNNEL                 0x1UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_MASK          0x6UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_SFT           1</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_NONE            (0x0UL &lt;&lt; 1)</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_ONE             (0x1UL &lt;&lt; 1)</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_TWO             (0x2UL &lt;&lt; 1)</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_LAST           CFA_FLOW_ALLOC_REQ_FLAGS_NUM_VLAN_TWO</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_MASK          0x38UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_SFT           3</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_L2              (0x0UL &lt;&lt; 3)</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_IPV4            (0x1UL &lt;&lt; 3)</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_IPV6            (0x2UL &lt;&lt; 3)</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_LAST           CFA_FLOW_ALLOC_REQ_FLAGS_FLOWTYPE_IPV6</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_PATH_TX                0x40UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_PATH_RX                0x80UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_MATCH_VXLAN_IP_VNI     0x100UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_FLAGS_VHOST_ID_USE_VLAN      0x200UL</div><div class='del'>-	__le16	src_fid;</div><div class='del'>-	__le32	tunnel_handle;</div><div class='del'>-	__le16	action_flags;</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_FWD                       0x1UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_RECYCLE                   0x2UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_DROP                      0x4UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_METER                     0x8UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_TUNNEL                    0x10UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NAT_SRC                   0x20UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NAT_DEST                  0x40UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NAT_IPV4_ADDRESS          0x80UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_L2_HEADER_REWRITE         0x100UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_TTL_DECREMENT             0x200UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_TUNNEL_IP                 0x400UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_FLOW_AGING_ENABLED        0x800UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_PRI_HINT                  0x1000UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_ACTION_FLAGS_NO_FLOW_COUNTER_ALLOC     0x2000UL</div><div class='del'>-	__le16	dst_fid;</div><div class='del'>-	__be16	l2_rewrite_vlan_tpid;</div><div class='del'>-	__be16	l2_rewrite_vlan_tci;</div><div class='del'>-	__le16	act_meter_id;</div><div class='del'>-	__le16	ref_flow_handle;</div><div class='del'>-	__be16	ethertype;</div><div class='del'>-	__be16	outer_vlan_tci;</div><div class='del'>-	__be16	dmac[3];</div><div class='del'>-	__be16	inner_vlan_tci;</div><div class='del'>-	__be16	smac[3];</div><div class='del'>-	u8	ip_dst_mask_len;</div><div class='del'>-	u8	ip_src_mask_len;</div><div class='del'>-	__be32	ip_dst[4];</div><div class='del'>-	__be32	ip_src[4];</div><div class='del'>-	__be16	l4_src_port;</div><div class='del'>-	__be16	l4_src_port_mask;</div><div class='del'>-	__be16	l4_dst_port;</div><div class='del'>-	__be16	l4_dst_port_mask;</div><div class='del'>-	__be32	nat_ip_address[4];</div><div class='del'>-	__be16	l2_rewrite_dmac[3];</div><div class='del'>-	__be16	nat_port;</div><div class='del'>-	__be16	l2_rewrite_smac[3];</div><div class='del'>-	u8	ip_proto;</div><div class='del'>-	u8	tunnel_type;</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_NONTUNNEL    0x0UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_VXLAN        0x1UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_NVGRE        0x2UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_L2GRE        0x3UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_IPIP         0x4UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_GENEVE       0x5UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_MPLS         0x6UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_STT          0x7UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_IPGRE        0x8UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4     0x9UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1     0xaUL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE     0xbUL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6 0xcUL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE    0x10UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL    0xffUL</div><div class='del'>-	#define CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_LAST        CFA_FLOW_ALLOC_REQ_TUNNEL_TYPE_ANYTUNNEL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_flow_alloc_output (size:256b/32B) */</div><div class='del'>-struct hwrm_cfa_flow_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	flow_handle;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	__le32	flow_id;</div><div class='del'>-	#define CFA_FLOW_ALLOC_RESP_FLOW_ID_VALUE_MASK 0x3fffffffUL</div><div class='del'>-	#define CFA_FLOW_ALLOC_RESP_FLOW_ID_VALUE_SFT 0</div><div class='del'>-	#define CFA_FLOW_ALLOC_RESP_FLOW_ID_TYPE      0x40000000UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_RESP_FLOW_ID_TYPE_INT    (0x0UL &lt;&lt; 30)</div><div class='del'>-	#define CFA_FLOW_ALLOC_RESP_FLOW_ID_TYPE_EXT    (0x1UL &lt;&lt; 30)</div><div class='del'>-	#define CFA_FLOW_ALLOC_RESP_FLOW_ID_TYPE_LAST  CFA_FLOW_ALLOC_RESP_FLOW_ID_TYPE_EXT</div><div class='del'>-	#define CFA_FLOW_ALLOC_RESP_FLOW_ID_DIR       0x80000000UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_RESP_FLOW_ID_DIR_RX      (0x0UL &lt;&lt; 31)</div><div class='del'>-	#define CFA_FLOW_ALLOC_RESP_FLOW_ID_DIR_TX      (0x1UL &lt;&lt; 31)</div><div class='del'>-	#define CFA_FLOW_ALLOC_RESP_FLOW_ID_DIR_LAST   CFA_FLOW_ALLOC_RESP_FLOW_ID_DIR_TX</div><div class='del'>-	__le64	ext_flow_handle;</div><div class='del'>-	__le32	flow_counter_id;</div><div class='del'>-	u8	unused_1[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_flow_alloc_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_cfa_flow_alloc_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define CFA_FLOW_ALLOC_CMD_ERR_CODE_UNKNOWN         0x0UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_CMD_ERR_CODE_L2_CONTEXT_TCAM 0x1UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_CMD_ERR_CODE_ACTION_RECORD   0x2UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_COUNTER    0x3UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_CMD_ERR_CODE_WILD_CARD_TCAM  0x4UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_CMD_ERR_CODE_HASH_COLLISION  0x5UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_CMD_ERR_CODE_KEY_EXISTS      0x6UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_CTXT_DB    0x7UL</div><div class='del'>-	#define CFA_FLOW_ALLOC_CMD_ERR_CODE_LAST           CFA_FLOW_ALLOC_CMD_ERR_CODE_FLOW_CTXT_DB</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_flow_free_input (size:256b/32B) */</div><div class='del'>-struct hwrm_cfa_flow_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	flow_handle;</div><div class='del'>-	__le16	unused_0;</div><div class='del'>-	__le32	flow_counter_id;</div><div class='del'>-	__le64	ext_flow_handle;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_flow_free_output (size:256b/32B) */</div><div class='del'>-struct hwrm_cfa_flow_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	packet;</div><div class='del'>-	__le64	byte;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_flow_info_input (size:256b/32B) */</div><div class='del'>-struct hwrm_cfa_flow_info_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	flow_handle;</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_MAX_MASK      0xfffUL</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_CNP_CNT       0x1000UL</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_ROCEV1_CNT    0x2000UL</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_NIC_TX        0x3000UL</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_ROCEV2_CNT    0x4000UL</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_DIR_RX        0x8000UL</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_CNP_CNT_RX    0x9000UL</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_ROCEV1_CNT_RX 0xa000UL</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_NIC_RX        0xb000UL</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_ROCEV2_CNT_RX 0xc000UL</div><div class='del'>-	#define CFA_FLOW_INFO_REQ_FLOW_HANDLE_LAST         CFA_FLOW_INFO_REQ_FLOW_HANDLE_ROCEV2_CNT_RX</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	__le64	ext_flow_handle;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_flow_info_output (size:5632b/704B) */</div><div class='del'>-struct hwrm_cfa_flow_info_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define CFA_FLOW_INFO_RESP_FLAGS_PATH_TX     0x1UL</div><div class='del'>-	#define CFA_FLOW_INFO_RESP_FLAGS_PATH_RX     0x2UL</div><div class='del'>-	u8	profile;</div><div class='del'>-	__le16	src_fid;</div><div class='del'>-	__le16	dst_fid;</div><div class='del'>-	__le16	l2_ctxt_id;</div><div class='del'>-	__le64	em_info;</div><div class='del'>-	__le64	tcam_info;</div><div class='del'>-	__le64	vfp_tcam_info;</div><div class='del'>-	__le16	ar_id;</div><div class='del'>-	__le16	flow_handle;</div><div class='del'>-	__le32	tunnel_handle;</div><div class='del'>-	__le16	flow_timer;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	__le32	flow_key_data[130];</div><div class='del'>-	__le32	flow_action_info[30];</div><div class='del'>-	u8	unused_1[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_flow_stats_input (size:640b/80B) */</div><div class='del'>-struct hwrm_cfa_flow_stats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	num_flows;</div><div class='del'>-	__le16	flow_handle_0;</div><div class='del'>-	__le16	flow_handle_1;</div><div class='del'>-	__le16	flow_handle_2;</div><div class='del'>-	__le16	flow_handle_3;</div><div class='del'>-	__le16	flow_handle_4;</div><div class='del'>-	__le16	flow_handle_5;</div><div class='del'>-	__le16	flow_handle_6;</div><div class='del'>-	__le16	flow_handle_7;</div><div class='del'>-	__le16	flow_handle_8;</div><div class='del'>-	__le16	flow_handle_9;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	__le32	flow_id_0;</div><div class='del'>-	__le32	flow_id_1;</div><div class='del'>-	__le32	flow_id_2;</div><div class='del'>-	__le32	flow_id_3;</div><div class='del'>-	__le32	flow_id_4;</div><div class='del'>-	__le32	flow_id_5;</div><div class='del'>-	__le32	flow_id_6;</div><div class='del'>-	__le32	flow_id_7;</div><div class='del'>-	__le32	flow_id_8;</div><div class='del'>-	__le32	flow_id_9;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_flow_stats_output (size:1408b/176B) */</div><div class='del'>-struct hwrm_cfa_flow_stats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	packet_0;</div><div class='del'>-	__le64	packet_1;</div><div class='del'>-	__le64	packet_2;</div><div class='del'>-	__le64	packet_3;</div><div class='del'>-	__le64	packet_4;</div><div class='del'>-	__le64	packet_5;</div><div class='del'>-	__le64	packet_6;</div><div class='del'>-	__le64	packet_7;</div><div class='del'>-	__le64	packet_8;</div><div class='del'>-	__le64	packet_9;</div><div class='del'>-	__le64	byte_0;</div><div class='del'>-	__le64	byte_1;</div><div class='del'>-	__le64	byte_2;</div><div class='del'>-	__le64	byte_3;</div><div class='del'>-	__le64	byte_4;</div><div class='del'>-	__le64	byte_5;</div><div class='del'>-	__le64	byte_6;</div><div class='del'>-	__le64	byte_7;</div><div class='del'>-	__le64	byte_8;</div><div class='del'>-	__le64	byte_9;</div><div class='del'>-	__le16	flow_hits;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_vfr_alloc_input (size:448b/56B) */</div><div class='del'>-struct hwrm_cfa_vfr_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	vf_id;</div><div class='del'>-	__le16	reserved;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-	char	vfr_name[32];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_vfr_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_vfr_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	rx_cfa_code;</div><div class='del'>-	__le16	tx_cfa_action;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_vfr_free_input (size:448b/56B) */</div><div class='del'>-struct hwrm_cfa_vfr_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	char	vfr_name[32];</div><div class='del'>-	__le16	vf_id;</div><div class='del'>-	__le16	reserved;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_vfr_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_vfr_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_eem_qcaps_input (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_eem_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_EEM_QCAPS_REQ_FLAGS_PATH_TX               0x1UL</div><div class='del'>-	#define CFA_EEM_QCAPS_REQ_FLAGS_PATH_RX               0x2UL</div><div class='del'>-	#define CFA_EEM_QCAPS_REQ_FLAGS_PREFERRED_OFFLOAD     0x4UL</div><div class='del'>-	__le32	unused_0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_eem_qcaps_output (size:320b/40B) */</div><div class='del'>-struct hwrm_cfa_eem_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_EEM_QCAPS_RESP_FLAGS_PATH_TX                                         0x1UL</div><div class='del'>-	#define CFA_EEM_QCAPS_RESP_FLAGS_PATH_RX                                         0x2UL</div><div class='del'>-	#define CFA_EEM_QCAPS_RESP_FLAGS_CENTRALIZED_MEMORY_MODEL_SUPPORTED              0x4UL</div><div class='del'>-	#define CFA_EEM_QCAPS_RESP_FLAGS_DETACHED_CENTRALIZED_MEMORY_MODEL_SUPPORTED     0x8UL</div><div class='del'>-	__le32	unused_0;</div><div class='del'>-	__le32	supported;</div><div class='del'>-	#define CFA_EEM_QCAPS_RESP_SUPPORTED_KEY0_TABLE                       0x1UL</div><div class='del'>-	#define CFA_EEM_QCAPS_RESP_SUPPORTED_KEY1_TABLE                       0x2UL</div><div class='del'>-	#define CFA_EEM_QCAPS_RESP_SUPPORTED_EXTERNAL_RECORD_TABLE            0x4UL</div><div class='del'>-	#define CFA_EEM_QCAPS_RESP_SUPPORTED_EXTERNAL_FLOW_COUNTERS_TABLE     0x8UL</div><div class='del'>-	#define CFA_EEM_QCAPS_RESP_SUPPORTED_FID_TABLE                        0x10UL</div><div class='del'>-	__le32	max_entries_supported;</div><div class='del'>-	__le16	key_entry_size;</div><div class='del'>-	__le16	record_entry_size;</div><div class='del'>-	__le16	efc_entry_size;</div><div class='del'>-	__le16	fid_entry_size;</div><div class='del'>-	u8	unused_1[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_eem_cfg_input (size:384b/48B) */</div><div class='del'>-struct hwrm_cfa_eem_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_EEM_CFG_REQ_FLAGS_PATH_TX               0x1UL</div><div class='del'>-	#define CFA_EEM_CFG_REQ_FLAGS_PATH_RX               0x2UL</div><div class='del'>-	#define CFA_EEM_CFG_REQ_FLAGS_PREFERRED_OFFLOAD     0x4UL</div><div class='del'>-	#define CFA_EEM_CFG_REQ_FLAGS_SECONDARY_PF          0x8UL</div><div class='del'>-	__le16	group_id;</div><div class='del'>-	__le16	unused_0;</div><div class='del'>-	__le32	num_entries;</div><div class='del'>-	__le32	unused_1;</div><div class='del'>-	__le16	key0_ctx_id;</div><div class='del'>-	__le16	key1_ctx_id;</div><div class='del'>-	__le16	record_ctx_id;</div><div class='del'>-	__le16	efc_ctx_id;</div><div class='del'>-	__le16	fid_ctx_id;</div><div class='del'>-	__le16	unused_2;</div><div class='del'>-	__le32	unused_3;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_eem_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_eem_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_eem_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_eem_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_EEM_QCFG_REQ_FLAGS_PATH_TX     0x1UL</div><div class='del'>-	#define CFA_EEM_QCFG_REQ_FLAGS_PATH_RX     0x2UL</div><div class='del'>-	__le32	unused_0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_eem_qcfg_output (size:256b/32B) */</div><div class='del'>-struct hwrm_cfa_eem_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_EEM_QCFG_RESP_FLAGS_PATH_TX               0x1UL</div><div class='del'>-	#define CFA_EEM_QCFG_RESP_FLAGS_PATH_RX               0x2UL</div><div class='del'>-	#define CFA_EEM_QCFG_RESP_FLAGS_PREFERRED_OFFLOAD     0x4UL</div><div class='del'>-	__le32	num_entries;</div><div class='del'>-	__le16	key0_ctx_id;</div><div class='del'>-	__le16	key1_ctx_id;</div><div class='del'>-	__le16	record_ctx_id;</div><div class='del'>-	__le16	efc_ctx_id;</div><div class='del'>-	__le16	fid_ctx_id;</div><div class='del'>-	u8	unused_2[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_eem_op_input (size:192b/24B) */</div><div class='del'>-struct hwrm_cfa_eem_op_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_EEM_OP_REQ_FLAGS_PATH_TX     0x1UL</div><div class='del'>-	#define CFA_EEM_OP_REQ_FLAGS_PATH_RX     0x2UL</div><div class='del'>-	__le16	unused_0;</div><div class='del'>-	__le16	op;</div><div class='del'>-	#define CFA_EEM_OP_REQ_OP_RESERVED    0x0UL</div><div class='del'>-	#define CFA_EEM_OP_REQ_OP_EEM_DISABLE 0x1UL</div><div class='del'>-	#define CFA_EEM_OP_REQ_OP_EEM_ENABLE  0x2UL</div><div class='del'>-	#define CFA_EEM_OP_REQ_OP_EEM_CLEANUP 0x3UL</div><div class='del'>-	#define CFA_EEM_OP_REQ_OP_LAST       CFA_EEM_OP_REQ_OP_EEM_CLEANUP</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_eem_op_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_eem_op_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_adv_flow_mgnt_qcaps_input (size:256b/32B) */</div><div class='del'>-struct hwrm_cfa_adv_flow_mgnt_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_cfa_adv_flow_mgnt_qcaps_output (size:128b/16B) */</div><div class='del'>-struct hwrm_cfa_adv_flow_mgnt_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_FLOW_HND_16BIT_SUPPORTED                     0x1UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_FLOW_HND_64BIT_SUPPORTED                     0x2UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_FLOW_BATCH_DELETE_SUPPORTED                  0x4UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_FLOW_RESET_ALL_SUPPORTED                     0x8UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_NTUPLE_FLOW_DEST_FUNC_SUPPORTED              0x10UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_TX_EEM_FLOW_SUPPORTED                        0x20UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_RX_EEM_FLOW_SUPPORTED                        0x40UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_FLOW_COUNTER_ALLOC_SUPPORTED                 0x80UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_RFS_RING_TBL_IDX_SUPPORTED                   0x100UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_UNTAGGED_VLAN_SUPPORTED                      0x200UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_XDP_SUPPORTED                                0x400UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_L2_HEADER_SOURCE_FIELDS_SUPPORTED            0x800UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_NTUPLE_FLOW_RX_ARP_SUPPORTED                 0x1000UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_RFS_RING_TBL_IDX_V2_SUPPORTED                0x2000UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_NTUPLE_FLOW_RX_ETHERTYPE_IP_SUPPORTED        0x4000UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_TRUFLOW_CAPABLE                              0x8000UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_L2_FILTER_TRAFFIC_TYPE_L2_ROCE_SUPPORTED     0x10000UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_LAG_SUPPORTED                                0x20000UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_NTUPLE_FLOW_NO_L2CTX_SUPPORTED               0x40000UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_NIC_FLOW_STATS_SUPPORTED                     0x80000UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_NTUPLE_FLOW_RX_EXT_IP_PROTO_SUPPORTED        0x100000UL</div><div class='del'>-	#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_RFS_RING_TBL_IDX_V3_SUPPORTED                0x200000UL</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_tunnel_dst_port_query_input (size:192b/24B) */</div><div class='del'>-struct hwrm_tunnel_dst_port_query_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	tunnel_type;</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_VXLAN              0x1UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_GENEVE             0x5UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_VXLAN_V4           0x9UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_IPGRE_V1           0xaUL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_L2_ETYPE           0xbUL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_VXLAN_GPE_V6       0xcUL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_CUSTOM_GRE         0xdUL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_ECPRI              0xeUL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_SRV6               0xfUL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_VXLAN_GPE          0x10UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_GRE                0x11UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_ULP_DYN_UPAR       0x12UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES01 0x13UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES02 0x14UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES03 0x15UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES04 0x16UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES05 0x17UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES06 0x18UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES07 0x19UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_LAST              TUNNEL_DST_PORT_QUERY_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES07</div><div class='del'>-	u8	tunnel_next_proto;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_tunnel_dst_port_query_output (size:128b/16B) */</div><div class='del'>-struct hwrm_tunnel_dst_port_query_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	tunnel_dst_port_id;</div><div class='del'>-	__be16	tunnel_dst_port_val;</div><div class='del'>-	u8	upar_in_use;</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_RESP_UPAR_IN_USE_UPAR0     0x1UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_RESP_UPAR_IN_USE_UPAR1     0x2UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_RESP_UPAR_IN_USE_UPAR2     0x4UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_RESP_UPAR_IN_USE_UPAR3     0x8UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_RESP_UPAR_IN_USE_UPAR4     0x10UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_RESP_UPAR_IN_USE_UPAR5     0x20UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_RESP_UPAR_IN_USE_UPAR6     0x40UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_RESP_UPAR_IN_USE_UPAR7     0x80UL</div><div class='del'>-	u8	status;</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_RESP_STATUS_CHIP_LEVEL     0x1UL</div><div class='del'>-	#define TUNNEL_DST_PORT_QUERY_RESP_STATUS_FUNC_LEVEL     0x2UL</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_tunnel_dst_port_alloc_input (size:192b/24B) */</div><div class='del'>-struct hwrm_tunnel_dst_port_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	tunnel_type;</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_VXLAN              0x1UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_GENEVE             0x5UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_VXLAN_V4           0x9UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_IPGRE_V1           0xaUL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_L2_ETYPE           0xbUL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE_V6       0xcUL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_CUSTOM_GRE         0xdUL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_ECPRI              0xeUL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_SRV6               0xfUL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_VXLAN_GPE          0x10UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_GRE                0x11UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_ULP_DYN_UPAR       0x12UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES01 0x13UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES02 0x14UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES03 0x15UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES04 0x16UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES05 0x17UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES06 0x18UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES07 0x19UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_LAST              TUNNEL_DST_PORT_ALLOC_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES07</div><div class='del'>-	u8	tunnel_next_proto;</div><div class='del'>-	__be16	tunnel_dst_port_val;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_tunnel_dst_port_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_tunnel_dst_port_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	tunnel_dst_port_id;</div><div class='del'>-	u8	error_info;</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_ERROR_INFO_SUCCESS         0x0UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_ERROR_INFO_ERR_ALLOCATED   0x1UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_ERROR_INFO_ERR_NO_RESOURCE 0x2UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_ERROR_INFO_ERR_ENABLED     0x3UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_ERROR_INFO_LAST           TUNNEL_DST_PORT_ALLOC_RESP_ERROR_INFO_ERR_ENABLED</div><div class='del'>-	u8	upar_in_use;</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_UPAR_IN_USE_UPAR0     0x1UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_UPAR_IN_USE_UPAR1     0x2UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_UPAR_IN_USE_UPAR2     0x4UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_UPAR_IN_USE_UPAR3     0x8UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_UPAR_IN_USE_UPAR4     0x10UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_UPAR_IN_USE_UPAR5     0x20UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_UPAR_IN_USE_UPAR6     0x40UL</div><div class='del'>-	#define TUNNEL_DST_PORT_ALLOC_RESP_UPAR_IN_USE_UPAR7     0x80UL</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_tunnel_dst_port_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_tunnel_dst_port_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	tunnel_type;</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_VXLAN              0x1UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_GENEVE             0x5UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_VXLAN_V4           0x9UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_IPGRE_V1           0xaUL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_L2_ETYPE           0xbUL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_VXLAN_GPE_V6       0xcUL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_CUSTOM_GRE         0xdUL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_ECPRI              0xeUL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_SRV6               0xfUL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_VXLAN_GPE          0x10UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_GRE                0x11UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_ULP_DYN_UPAR       0x12UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES01 0x13UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES02 0x14UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES03 0x15UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES04 0x16UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES05 0x17UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES06 0x18UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES07 0x19UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_LAST              TUNNEL_DST_PORT_FREE_REQ_TUNNEL_TYPE_ULP_DYN_UPAR_RES07</div><div class='del'>-	u8	tunnel_next_proto;</div><div class='del'>-	__le16	tunnel_dst_port_id;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_tunnel_dst_port_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_tunnel_dst_port_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	error_info;</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_RESP_ERROR_INFO_SUCCESS           0x0UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_RESP_ERROR_INFO_ERR_NOT_OWNER     0x1UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_RESP_ERROR_INFO_ERR_NOT_ALLOCATED 0x2UL</div><div class='del'>-	#define TUNNEL_DST_PORT_FREE_RESP_ERROR_INFO_LAST             TUNNEL_DST_PORT_FREE_RESP_ERROR_INFO_ERR_NOT_ALLOCATED</div><div class='del'>-	u8	unused_1[6];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ctx_hw_stats (size:1280b/160B) */</div><div class='del'>-struct ctx_hw_stats {</div><div class='del'>-	__le64	rx_ucast_pkts;</div><div class='del'>-	__le64	rx_mcast_pkts;</div><div class='del'>-	__le64	rx_bcast_pkts;</div><div class='del'>-	__le64	rx_discard_pkts;</div><div class='del'>-	__le64	rx_error_pkts;</div><div class='del'>-	__le64	rx_ucast_bytes;</div><div class='del'>-	__le64	rx_mcast_bytes;</div><div class='del'>-	__le64	rx_bcast_bytes;</div><div class='del'>-	__le64	tx_ucast_pkts;</div><div class='del'>-	__le64	tx_mcast_pkts;</div><div class='del'>-	__le64	tx_bcast_pkts;</div><div class='del'>-	__le64	tx_error_pkts;</div><div class='del'>-	__le64	tx_discard_pkts;</div><div class='del'>-	__le64	tx_ucast_bytes;</div><div class='del'>-	__le64	tx_mcast_bytes;</div><div class='del'>-	__le64	tx_bcast_bytes;</div><div class='del'>-	__le64	tpa_pkts;</div><div class='del'>-	__le64	tpa_bytes;</div><div class='del'>-	__le64	tpa_events;</div><div class='del'>-	__le64	tpa_aborts;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ctx_hw_stats_ext (size:1408b/176B) */</div><div class='del'>-struct ctx_hw_stats_ext {</div><div class='del'>-	__le64	rx_ucast_pkts;</div><div class='del'>-	__le64	rx_mcast_pkts;</div><div class='del'>-	__le64	rx_bcast_pkts;</div><div class='del'>-	__le64	rx_discard_pkts;</div><div class='del'>-	__le64	rx_error_pkts;</div><div class='del'>-	__le64	rx_ucast_bytes;</div><div class='del'>-	__le64	rx_mcast_bytes;</div><div class='del'>-	__le64	rx_bcast_bytes;</div><div class='del'>-	__le64	tx_ucast_pkts;</div><div class='del'>-	__le64	tx_mcast_pkts;</div><div class='del'>-	__le64	tx_bcast_pkts;</div><div class='del'>-	__le64	tx_error_pkts;</div><div class='del'>-	__le64	tx_discard_pkts;</div><div class='del'>-	__le64	tx_ucast_bytes;</div><div class='del'>-	__le64	tx_mcast_bytes;</div><div class='del'>-	__le64	tx_bcast_bytes;</div><div class='del'>-	__le64	rx_tpa_eligible_pkt;</div><div class='del'>-	__le64	rx_tpa_eligible_bytes;</div><div class='del'>-	__le64	rx_tpa_pkt;</div><div class='del'>-	__le64	rx_tpa_bytes;</div><div class='del'>-	__le64	rx_tpa_errors;</div><div class='del'>-	__le64	rx_tpa_events;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_ctx_alloc_input (size:384b/48B) */</div><div class='del'>-struct hwrm_stat_ctx_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	stats_dma_addr;</div><div class='del'>-	__le32	update_period_ms;</div><div class='del'>-	u8	stat_ctx_flags;</div><div class='del'>-	#define STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE             0x1UL</div><div class='del'>-	#define STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_DUP_HOST_BUF     0x2UL</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	stats_dma_length;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define STAT_CTX_ALLOC_REQ_FLAGS_STEERING_TAG_VALID     0x1UL</div><div class='del'>-	__le16	steering_tag;</div><div class='del'>-	__le32	stat_ctx_id;</div><div class='del'>-	__le16	alloc_seq_id;</div><div class='del'>-	u8	unused_1[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_ctx_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_stat_ctx_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	stat_ctx_id;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_ctx_free_input (size:192b/24B) */</div><div class='del'>-struct hwrm_stat_ctx_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	stat_ctx_id;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_ctx_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_stat_ctx_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	stat_ctx_id;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_ctx_query_input (size:192b/24B) */</div><div class='del'>-struct hwrm_stat_ctx_query_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	stat_ctx_id;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define STAT_CTX_QUERY_REQ_FLAGS_COUNTER_MASK     0x1UL</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_ctx_query_output (size:1408b/176B) */</div><div class='del'>-struct hwrm_stat_ctx_query_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	tx_ucast_pkts;</div><div class='del'>-	__le64	tx_mcast_pkts;</div><div class='del'>-	__le64	tx_bcast_pkts;</div><div class='del'>-	__le64	tx_discard_pkts;</div><div class='del'>-	__le64	tx_error_pkts;</div><div class='del'>-	__le64	tx_ucast_bytes;</div><div class='del'>-	__le64	tx_mcast_bytes;</div><div class='del'>-	__le64	tx_bcast_bytes;</div><div class='del'>-	__le64	rx_ucast_pkts;</div><div class='del'>-	__le64	rx_mcast_pkts;</div><div class='del'>-	__le64	rx_bcast_pkts;</div><div class='del'>-	__le64	rx_discard_pkts;</div><div class='del'>-	__le64	rx_error_pkts;</div><div class='del'>-	__le64	rx_ucast_bytes;</div><div class='del'>-	__le64	rx_mcast_bytes;</div><div class='del'>-	__le64	rx_bcast_bytes;</div><div class='del'>-	__le64	rx_agg_pkts;</div><div class='del'>-	__le64	rx_agg_bytes;</div><div class='del'>-	__le64	rx_agg_events;</div><div class='del'>-	__le64	rx_agg_aborts;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_ext_ctx_query_input (size:192b/24B) */</div><div class='del'>-struct hwrm_stat_ext_ctx_query_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	stat_ctx_id;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define STAT_EXT_CTX_QUERY_REQ_FLAGS_COUNTER_MASK     0x1UL</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_ext_ctx_query_output (size:1536b/192B) */</div><div class='del'>-struct hwrm_stat_ext_ctx_query_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	rx_ucast_pkts;</div><div class='del'>-	__le64	rx_mcast_pkts;</div><div class='del'>-	__le64	rx_bcast_pkts;</div><div class='del'>-	__le64	rx_discard_pkts;</div><div class='del'>-	__le64	rx_error_pkts;</div><div class='del'>-	__le64	rx_ucast_bytes;</div><div class='del'>-	__le64	rx_mcast_bytes;</div><div class='del'>-	__le64	rx_bcast_bytes;</div><div class='del'>-	__le64	tx_ucast_pkts;</div><div class='del'>-	__le64	tx_mcast_pkts;</div><div class='del'>-	__le64	tx_bcast_pkts;</div><div class='del'>-	__le64	tx_error_pkts;</div><div class='del'>-	__le64	tx_discard_pkts;</div><div class='del'>-	__le64	tx_ucast_bytes;</div><div class='del'>-	__le64	tx_mcast_bytes;</div><div class='del'>-	__le64	tx_bcast_bytes;</div><div class='del'>-	__le64	rx_tpa_eligible_pkt;</div><div class='del'>-	__le64	rx_tpa_eligible_bytes;</div><div class='del'>-	__le64	rx_tpa_pkt;</div><div class='del'>-	__le64	rx_tpa_bytes;</div><div class='del'>-	__le64	rx_tpa_errors;</div><div class='del'>-	__le64	rx_tpa_events;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_ctx_clr_stats_input (size:192b/24B) */</div><div class='del'>-struct hwrm_stat_ctx_clr_stats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	stat_ctx_id;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_ctx_clr_stats_output (size:128b/16B) */</div><div class='del'>-struct hwrm_stat_ctx_clr_stats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_pcie_qstats_input (size:256b/32B) */</div><div class='del'>-struct hwrm_pcie_qstats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	pcie_stat_size;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	__le64	pcie_stat_host_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_pcie_qstats_output (size:128b/16B) */</div><div class='del'>-struct hwrm_pcie_qstats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	pcie_stat_size;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* pcie_ctx_hw_stats (size:768b/96B) */</div><div class='del'>-struct pcie_ctx_hw_stats {</div><div class='del'>-	__le64	pcie_pl_signal_integrity;</div><div class='del'>-	__le64	pcie_dl_signal_integrity;</div><div class='del'>-	__le64	pcie_tl_signal_integrity;</div><div class='del'>-	__le64	pcie_link_integrity;</div><div class='del'>-	__le64	pcie_tx_traffic_rate;</div><div class='del'>-	__le64	pcie_rx_traffic_rate;</div><div class='del'>-	__le64	pcie_tx_dllp_statistics;</div><div class='del'>-	__le64	pcie_rx_dllp_statistics;</div><div class='del'>-	__le64	pcie_equalization_time;</div><div class='del'>-	__le32	pcie_ltssm_histogram[4];</div><div class='del'>-	__le64	pcie_recovery_histogram;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_generic_qstats_input (size:256b/32B) */</div><div class='del'>-struct hwrm_stat_generic_qstats_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	generic_stat_size;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define STAT_GENERIC_QSTATS_REQ_FLAGS_COUNTER_MASK     0x1UL</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	__le64	generic_stat_host_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_stat_generic_qstats_output (size:128b/16B) */</div><div class='del'>-struct hwrm_stat_generic_qstats_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	generic_stat_size;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* generic_sw_hw_stats (size:1472b/184B) */</div><div class='del'>-struct generic_sw_hw_stats {</div><div class='del'>-	__le64	pcie_statistics_tx_tlp;</div><div class='del'>-	__le64	pcie_statistics_rx_tlp;</div><div class='del'>-	__le64	pcie_credit_fc_hdr_posted;</div><div class='del'>-	__le64	pcie_credit_fc_hdr_nonposted;</div><div class='del'>-	__le64	pcie_credit_fc_hdr_cmpl;</div><div class='del'>-	__le64	pcie_credit_fc_data_posted;</div><div class='del'>-	__le64	pcie_credit_fc_data_nonposted;</div><div class='del'>-	__le64	pcie_credit_fc_data_cmpl;</div><div class='del'>-	__le64	pcie_credit_fc_tgt_nonposted;</div><div class='del'>-	__le64	pcie_credit_fc_tgt_data_posted;</div><div class='del'>-	__le64	pcie_credit_fc_tgt_hdr_posted;</div><div class='del'>-	__le64	pcie_credit_fc_cmpl_hdr_posted;</div><div class='del'>-	__le64	pcie_credit_fc_cmpl_data_posted;</div><div class='del'>-	__le64	pcie_cmpl_longest;</div><div class='del'>-	__le64	pcie_cmpl_shortest;</div><div class='del'>-	__le64	cache_miss_count_cfcq;</div><div class='del'>-	__le64	cache_miss_count_cfcs;</div><div class='del'>-	__le64	cache_miss_count_cfcc;</div><div class='del'>-	__le64	cache_miss_count_cfcm;</div><div class='del'>-	__le64	hw_db_recov_dbs_dropped;</div><div class='del'>-	__le64	hw_db_recov_drops_serviced;</div><div class='del'>-	__le64	hw_db_recov_dbs_recovered;</div><div class='del'>-	__le64	hw_db_recov_oo_drop_count;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_reset_input (size:192b/24B) */</div><div class='del'>-struct hwrm_fw_reset_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	embedded_proc_type;</div><div class='del'>-	#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT                  0x0UL</div><div class='del'>-	#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT                  0x1UL</div><div class='del'>-	#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL               0x2UL</div><div class='del'>-	#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE                  0x3UL</div><div class='del'>-	#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_HOST                  0x4UL</div><div class='del'>-	#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP                    0x5UL</div><div class='del'>-	#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP                  0x6UL</div><div class='del'>-	#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_HOST_RESOURCE_REINIT  0x7UL</div><div class='del'>-	#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_IMPACTLESS_ACTIVATION 0x8UL</div><div class='del'>-	#define FW_RESET_REQ_EMBEDDED_PROC_TYPE_LAST                 FW_RESET_REQ_EMBEDDED_PROC_TYPE_IMPACTLESS_ACTIVATION</div><div class='del'>-	u8	selfrst_status;</div><div class='del'>-	#define FW_RESET_REQ_SELFRST_STATUS_SELFRSTNONE      0x0UL</div><div class='del'>-	#define FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP      0x1UL</div><div class='del'>-	#define FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST   0x2UL</div><div class='del'>-	#define FW_RESET_REQ_SELFRST_STATUS_SELFRSTIMMEDIATE 0x3UL</div><div class='del'>-	#define FW_RESET_REQ_SELFRST_STATUS_LAST            FW_RESET_REQ_SELFRST_STATUS_SELFRSTIMMEDIATE</div><div class='del'>-	u8	host_idx;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define FW_RESET_REQ_FLAGS_RESET_GRACEFUL     0x1UL</div><div class='del'>-	#define FW_RESET_REQ_FLAGS_FW_ACTIVATION      0x2UL</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_reset_output (size:128b/16B) */</div><div class='del'>-struct hwrm_fw_reset_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	selfrst_status;</div><div class='del'>-	#define FW_RESET_RESP_SELFRST_STATUS_SELFRSTNONE      0x0UL</div><div class='del'>-	#define FW_RESET_RESP_SELFRST_STATUS_SELFRSTASAP      0x1UL</div><div class='del'>-	#define FW_RESET_RESP_SELFRST_STATUS_SELFRSTPCIERST   0x2UL</div><div class='del'>-	#define FW_RESET_RESP_SELFRST_STATUS_SELFRSTIMMEDIATE 0x3UL</div><div class='del'>-	#define FW_RESET_RESP_SELFRST_STATUS_LAST            FW_RESET_RESP_SELFRST_STATUS_SELFRSTIMMEDIATE</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_qstatus_input (size:192b/24B) */</div><div class='del'>-struct hwrm_fw_qstatus_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	embedded_proc_type;</div><div class='del'>-	#define FW_QSTATUS_REQ_EMBEDDED_PROC_TYPE_BOOT    0x0UL</div><div class='del'>-	#define FW_QSTATUS_REQ_EMBEDDED_PROC_TYPE_MGMT    0x1UL</div><div class='del'>-	#define FW_QSTATUS_REQ_EMBEDDED_PROC_TYPE_NETCTRL 0x2UL</div><div class='del'>-	#define FW_QSTATUS_REQ_EMBEDDED_PROC_TYPE_ROCE    0x3UL</div><div class='del'>-	#define FW_QSTATUS_REQ_EMBEDDED_PROC_TYPE_HOST    0x4UL</div><div class='del'>-	#define FW_QSTATUS_REQ_EMBEDDED_PROC_TYPE_AP      0x5UL</div><div class='del'>-	#define FW_QSTATUS_REQ_EMBEDDED_PROC_TYPE_CHIP    0x6UL</div><div class='del'>-	#define FW_QSTATUS_REQ_EMBEDDED_PROC_TYPE_LAST   FW_QSTATUS_REQ_EMBEDDED_PROC_TYPE_CHIP</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_qstatus_output (size:128b/16B) */</div><div class='del'>-struct hwrm_fw_qstatus_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	selfrst_status;</div><div class='del'>-	#define FW_QSTATUS_RESP_SELFRST_STATUS_SELFRSTNONE    0x0UL</div><div class='del'>-	#define FW_QSTATUS_RESP_SELFRST_STATUS_SELFRSTASAP    0x1UL</div><div class='del'>-	#define FW_QSTATUS_RESP_SELFRST_STATUS_SELFRSTPCIERST 0x2UL</div><div class='del'>-	#define FW_QSTATUS_RESP_SELFRST_STATUS_SELFRSTPOWER   0x3UL</div><div class='del'>-	#define FW_QSTATUS_RESP_SELFRST_STATUS_LAST          FW_QSTATUS_RESP_SELFRST_STATUS_SELFRSTPOWER</div><div class='del'>-	u8	nvm_option_action_status;</div><div class='del'>-	#define FW_QSTATUS_RESP_NVM_OPTION_ACTION_STATUS_NVMOPT_ACTION_NONE     0x0UL</div><div class='del'>-	#define FW_QSTATUS_RESP_NVM_OPTION_ACTION_STATUS_NVMOPT_ACTION_HOTRESET 0x1UL</div><div class='del'>-	#define FW_QSTATUS_RESP_NVM_OPTION_ACTION_STATUS_NVMOPT_ACTION_WARMBOOT 0x2UL</div><div class='del'>-	#define FW_QSTATUS_RESP_NVM_OPTION_ACTION_STATUS_NVMOPT_ACTION_COLDBOOT 0x3UL</div><div class='del'>-	#define FW_QSTATUS_RESP_NVM_OPTION_ACTION_STATUS_LAST                  FW_QSTATUS_RESP_NVM_OPTION_ACTION_STATUS_NVMOPT_ACTION_COLDBOOT</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_set_time_input (size:256b/32B) */</div><div class='del'>-struct hwrm_fw_set_time_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	year;</div><div class='del'>-	#define FW_SET_TIME_REQ_YEAR_UNKNOWN 0x0UL</div><div class='del'>-	#define FW_SET_TIME_REQ_YEAR_LAST   FW_SET_TIME_REQ_YEAR_UNKNOWN</div><div class='del'>-	u8	month;</div><div class='del'>-	u8	day;</div><div class='del'>-	u8	hour;</div><div class='del'>-	u8	minute;</div><div class='del'>-	u8	second;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	millisecond;</div><div class='del'>-	__le16	zone;</div><div class='del'>-	#define FW_SET_TIME_REQ_ZONE_UTC     0</div><div class='del'>-	#define FW_SET_TIME_REQ_ZONE_UNKNOWN 65535</div><div class='del'>-	#define FW_SET_TIME_REQ_ZONE_LAST   FW_SET_TIME_REQ_ZONE_UNKNOWN</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_set_time_output (size:128b/16B) */</div><div class='del'>-struct hwrm_fw_set_time_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_struct_hdr (size:128b/16B) */</div><div class='del'>-struct hwrm_struct_hdr {</div><div class='del'>-	__le16	struct_id;</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_LLDP_CFG           0x41bUL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_DCBX_ETS           0x41dUL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_DCBX_PFC           0x41fUL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_DCBX_APP           0x421UL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_DCBX_FEATURE_STATE 0x422UL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_LLDP_GENERIC       0x424UL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_LLDP_DEVICE        0x426UL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_POWER_BKUP         0x427UL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_PEER_MMAP          0x429UL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_AFM_OPAQUE         0x1UL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_PORT_DESCRIPTION   0xaUL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_RSS_V2             0x64UL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_MSIX_PER_VF        0xc8UL</div><div class='del'>-	#define STRUCT_HDR_STRUCT_ID_LAST              STRUCT_HDR_STRUCT_ID_MSIX_PER_VF</div><div class='del'>-	__le16	len;</div><div class='del'>-	u8	version;</div><div class='del'>-	u8	count;</div><div class='del'>-	__le16	subtype;</div><div class='del'>-	__le16	next_offset;</div><div class='del'>-	#define STRUCT_HDR_NEXT_OFFSET_LAST 0x0UL</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_struct_data_dcbx_app (size:64b/8B) */</div><div class='del'>-struct hwrm_struct_data_dcbx_app {</div><div class='del'>-	__be16	protocol_id;</div><div class='del'>-	u8	protocol_selector;</div><div class='del'>-	#define STRUCT_DATA_DCBX_APP_PROTOCOL_SELECTOR_ETHER_TYPE   0x1UL</div><div class='del'>-	#define STRUCT_DATA_DCBX_APP_PROTOCOL_SELECTOR_TCP_PORT     0x2UL</div><div class='del'>-	#define STRUCT_DATA_DCBX_APP_PROTOCOL_SELECTOR_UDP_PORT     0x3UL</div><div class='del'>-	#define STRUCT_DATA_DCBX_APP_PROTOCOL_SELECTOR_TCP_UDP_PORT 0x4UL</div><div class='del'>-	#define STRUCT_DATA_DCBX_APP_PROTOCOL_SELECTOR_LAST        STRUCT_DATA_DCBX_APP_PROTOCOL_SELECTOR_TCP_UDP_PORT</div><div class='del'>-	u8	priority;</div><div class='del'>-	u8	valid;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_set_structured_data_input (size:256b/32B) */</div><div class='del'>-struct hwrm_fw_set_structured_data_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	src_data_addr;</div><div class='del'>-	__le16	data_len;</div><div class='del'>-	u8	hdr_cnt;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_set_structured_data_output (size:128b/16B) */</div><div class='del'>-struct hwrm_fw_set_structured_data_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_set_structured_data_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_fw_set_structured_data_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define FW_SET_STRUCTURED_DATA_CMD_ERR_CODE_UNKNOWN     0x0UL</div><div class='del'>-	#define FW_SET_STRUCTURED_DATA_CMD_ERR_CODE_BAD_HDR_CNT 0x1UL</div><div class='del'>-	#define FW_SET_STRUCTURED_DATA_CMD_ERR_CODE_BAD_FMT     0x2UL</div><div class='del'>-	#define FW_SET_STRUCTURED_DATA_CMD_ERR_CODE_BAD_ID      0x3UL</div><div class='del'>-	#define FW_SET_STRUCTURED_DATA_CMD_ERR_CODE_LAST       FW_SET_STRUCTURED_DATA_CMD_ERR_CODE_BAD_ID</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_get_structured_data_input (size:256b/32B) */</div><div class='del'>-struct hwrm_fw_get_structured_data_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	dest_data_addr;</div><div class='del'>-	__le16	data_len;</div><div class='del'>-	__le16	structure_id;</div><div class='del'>-	__le16	subtype;</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_UNUSED                  0x0UL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_ALL                     0xffffUL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_NEAR_BRIDGE_ADMIN       0x100UL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_NEAR_BRIDGE_PEER        0x101UL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_NEAR_BRIDGE_OPERATIONAL 0x102UL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_NON_TPMR_ADMIN          0x200UL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_NON_TPMR_PEER           0x201UL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_NON_TPMR_OPERATIONAL    0x202UL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_HOST_OPERATIONAL        0x300UL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_LAST                   FW_GET_STRUCTURED_DATA_REQ_SUBTYPE_HOST_OPERATIONAL</div><div class='del'>-	u8	count;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_get_structured_data_output (size:128b/16B) */</div><div class='del'>-struct hwrm_fw_get_structured_data_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	hdr_cnt;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_get_structured_data_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_fw_get_structured_data_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_CMD_ERR_CODE_UNKNOWN 0x0UL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_CMD_ERR_CODE_BAD_ID  0x3UL</div><div class='del'>-	#define FW_GET_STRUCTURED_DATA_CMD_ERR_CODE_LAST   FW_GET_STRUCTURED_DATA_CMD_ERR_CODE_BAD_ID</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_livepatch_query_input (size:192b/24B) */</div><div class='del'>-struct hwrm_fw_livepatch_query_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	fw_target;</div><div class='del'>-	#define FW_LIVEPATCH_QUERY_REQ_FW_TARGET_COMMON_FW 0x1UL</div><div class='del'>-	#define FW_LIVEPATCH_QUERY_REQ_FW_TARGET_SECURE_FW 0x2UL</div><div class='del'>-	#define FW_LIVEPATCH_QUERY_REQ_FW_TARGET_LAST     FW_LIVEPATCH_QUERY_REQ_FW_TARGET_SECURE_FW</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_livepatch_query_output (size:640b/80B) */</div><div class='del'>-struct hwrm_fw_livepatch_query_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	char	install_ver[32];</div><div class='del'>-	char	active_ver[32];</div><div class='del'>-	__le16	status_flags;</div><div class='del'>-	#define FW_LIVEPATCH_QUERY_RESP_STATUS_FLAGS_INSTALL     0x1UL</div><div class='del'>-	#define FW_LIVEPATCH_QUERY_RESP_STATUS_FLAGS_ACTIVE      0x2UL</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_livepatch_input (size:256b/32B) */</div><div class='del'>-struct hwrm_fw_livepatch_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	opcode;</div><div class='del'>-	#define FW_LIVEPATCH_REQ_OPCODE_ACTIVATE   0x1UL</div><div class='del'>-	#define FW_LIVEPATCH_REQ_OPCODE_DEACTIVATE 0x2UL</div><div class='del'>-	#define FW_LIVEPATCH_REQ_OPCODE_LAST      FW_LIVEPATCH_REQ_OPCODE_DEACTIVATE</div><div class='del'>-	u8	fw_target;</div><div class='del'>-	#define FW_LIVEPATCH_REQ_FW_TARGET_COMMON_FW 0x1UL</div><div class='del'>-	#define FW_LIVEPATCH_REQ_FW_TARGET_SECURE_FW 0x2UL</div><div class='del'>-	#define FW_LIVEPATCH_REQ_FW_TARGET_LAST     FW_LIVEPATCH_REQ_FW_TARGET_SECURE_FW</div><div class='del'>-	u8	loadtype;</div><div class='del'>-	#define FW_LIVEPATCH_REQ_LOADTYPE_NVM_INSTALL   0x1UL</div><div class='del'>-	#define FW_LIVEPATCH_REQ_LOADTYPE_MEMORY_DIRECT 0x2UL</div><div class='del'>-	#define FW_LIVEPATCH_REQ_LOADTYPE_LAST         FW_LIVEPATCH_REQ_LOADTYPE_MEMORY_DIRECT</div><div class='del'>-	u8	flags;</div><div class='del'>-	__le32	patch_len;</div><div class='del'>-	__le64	host_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_livepatch_output (size:128b/16B) */</div><div class='del'>-struct hwrm_fw_livepatch_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fw_livepatch_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_fw_livepatch_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_UNKNOWN         0x0UL</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_OPCODE  0x1UL</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_TARGET  0x2UL</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_NOT_SUPPORTED   0x3UL</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_NOT_INSTALLED   0x4UL</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_NOT_PATCHED     0x5UL</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_AUTH_FAIL       0x6UL</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_HEADER  0x7UL</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_SIZE    0x8UL</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_ALREADY_PATCHED 0x9UL</div><div class='del'>-	#define FW_LIVEPATCH_CMD_ERR_CODE_LAST           FW_LIVEPATCH_CMD_ERR_CODE_ALREADY_PATCHED</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_exec_fwd_resp_input (size:1024b/128B) */</div><div class='del'>-struct hwrm_exec_fwd_resp_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	encap_request[26];</div><div class='del'>-	__le16	encap_resp_target_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_exec_fwd_resp_output (size:128b/16B) */</div><div class='del'>-struct hwrm_exec_fwd_resp_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_reject_fwd_resp_input (size:1024b/128B) */</div><div class='del'>-struct hwrm_reject_fwd_resp_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	encap_request[26];</div><div class='del'>-	__le16	encap_resp_target_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_reject_fwd_resp_output (size:128b/16B) */</div><div class='del'>-struct hwrm_reject_fwd_resp_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fwd_resp_input (size:1024b/128B) */</div><div class='del'>-struct hwrm_fwd_resp_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	encap_resp_target_id;</div><div class='del'>-	__le16	encap_resp_cmpl_ring;</div><div class='del'>-	__le16	encap_resp_len;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	u8	unused_1;</div><div class='del'>-	__le64	encap_resp_addr;</div><div class='del'>-	__le32	encap_resp[24];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fwd_resp_output (size:128b/16B) */</div><div class='del'>-struct hwrm_fwd_resp_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fwd_async_event_cmpl_input (size:320b/40B) */</div><div class='del'>-struct hwrm_fwd_async_event_cmpl_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	encap_async_event_target_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	__le32	encap_async_event_cmpl[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_fwd_async_event_cmpl_output (size:128b/16B) */</div><div class='del'>-struct hwrm_fwd_async_event_cmpl_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_temp_monitor_query_input (size:128b/16B) */</div><div class='del'>-struct hwrm_temp_monitor_query_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_temp_monitor_query_output (size:192b/24B) */</div><div class='del'>-struct hwrm_temp_monitor_query_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	temp;</div><div class='del'>-	u8	phy_temp;</div><div class='del'>-	u8	om_temp;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define TEMP_MONITOR_QUERY_RESP_FLAGS_TEMP_NOT_AVAILABLE             0x1UL</div><div class='del'>-	#define TEMP_MONITOR_QUERY_RESP_FLAGS_PHY_TEMP_NOT_AVAILABLE         0x2UL</div><div class='del'>-	#define TEMP_MONITOR_QUERY_RESP_FLAGS_OM_NOT_PRESENT                 0x4UL</div><div class='del'>-	#define TEMP_MONITOR_QUERY_RESP_FLAGS_OM_TEMP_NOT_AVAILABLE          0x8UL</div><div class='del'>-	#define TEMP_MONITOR_QUERY_RESP_FLAGS_EXT_TEMP_FIELDS_AVAILABLE      0x10UL</div><div class='del'>-	#define TEMP_MONITOR_QUERY_RESP_FLAGS_THRESHOLD_VALUES_AVAILABLE     0x20UL</div><div class='del'>-	u8	temp2;</div><div class='del'>-	u8	phy_temp2;</div><div class='del'>-	u8	om_temp2;</div><div class='del'>-	u8	warn_threshold;</div><div class='del'>-	u8	critical_threshold;</div><div class='del'>-	u8	fatal_threshold;</div><div class='del'>-	u8	shutdown_threshold;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_wol_filter_alloc_input (size:512b/64B) */</div><div class='del'>-struct hwrm_wol_filter_alloc_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define WOL_FILTER_ALLOC_REQ_ENABLES_MAC_ADDRESS           0x1UL</div><div class='del'>-	#define WOL_FILTER_ALLOC_REQ_ENABLES_PATTERN_OFFSET        0x2UL</div><div class='del'>-	#define WOL_FILTER_ALLOC_REQ_ENABLES_PATTERN_BUF_SIZE      0x4UL</div><div class='del'>-	#define WOL_FILTER_ALLOC_REQ_ENABLES_PATTERN_BUF_ADDR      0x8UL</div><div class='del'>-	#define WOL_FILTER_ALLOC_REQ_ENABLES_PATTERN_MASK_ADDR     0x10UL</div><div class='del'>-	#define WOL_FILTER_ALLOC_REQ_ENABLES_PATTERN_MASK_SIZE     0x20UL</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	wol_type;</div><div class='del'>-	#define WOL_FILTER_ALLOC_REQ_WOL_TYPE_MAGICPKT 0x0UL</div><div class='del'>-	#define WOL_FILTER_ALLOC_REQ_WOL_TYPE_BMP      0x1UL</div><div class='del'>-	#define WOL_FILTER_ALLOC_REQ_WOL_TYPE_INVALID  0xffUL</div><div class='del'>-	#define WOL_FILTER_ALLOC_REQ_WOL_TYPE_LAST    WOL_FILTER_ALLOC_REQ_WOL_TYPE_INVALID</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	mac_address[6];</div><div class='del'>-	__le16	pattern_offset;</div><div class='del'>-	__le16	pattern_buf_size;</div><div class='del'>-	__le16	pattern_mask_size;</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-	__le64	pattern_buf_addr;</div><div class='del'>-	__le64	pattern_mask_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_wol_filter_alloc_output (size:128b/16B) */</div><div class='del'>-struct hwrm_wol_filter_alloc_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	wol_filter_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_wol_filter_free_input (size:256b/32B) */</div><div class='del'>-struct hwrm_wol_filter_free_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define WOL_FILTER_FREE_REQ_FLAGS_FREE_ALL_WOL_FILTERS     0x1UL</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define WOL_FILTER_FREE_REQ_ENABLES_WOL_FILTER_ID     0x1UL</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	wol_filter_id;</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_wol_filter_free_output (size:128b/16B) */</div><div class='del'>-struct hwrm_wol_filter_free_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_wol_filter_qcfg_input (size:448b/56B) */</div><div class='del'>-struct hwrm_wol_filter_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	__le16	handle;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-	__le64	pattern_buf_addr;</div><div class='del'>-	__le16	pattern_buf_size;</div><div class='del'>-	u8	unused_1[6];</div><div class='del'>-	__le64	pattern_mask_addr;</div><div class='del'>-	__le16	pattern_mask_size;</div><div class='del'>-	u8	unused_2[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_wol_filter_qcfg_output (size:256b/32B) */</div><div class='del'>-struct hwrm_wol_filter_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	next_handle;</div><div class='del'>-	u8	wol_filter_id;</div><div class='del'>-	u8	wol_type;</div><div class='del'>-	#define WOL_FILTER_QCFG_RESP_WOL_TYPE_MAGICPKT 0x0UL</div><div class='del'>-	#define WOL_FILTER_QCFG_RESP_WOL_TYPE_BMP      0x1UL</div><div class='del'>-	#define WOL_FILTER_QCFG_RESP_WOL_TYPE_INVALID  0xffUL</div><div class='del'>-	#define WOL_FILTER_QCFG_RESP_WOL_TYPE_LAST    WOL_FILTER_QCFG_RESP_WOL_TYPE_INVALID</div><div class='del'>-	__le32	unused_0;</div><div class='del'>-	u8	mac_address[6];</div><div class='del'>-	__le16	pattern_offset;</div><div class='del'>-	__le16	pattern_size;</div><div class='del'>-	__le16	pattern_mask_size;</div><div class='del'>-	u8	unused_1[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_wol_reason_qcfg_input (size:320b/40B) */</div><div class='del'>-struct hwrm_wol_reason_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	port_id;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-	__le64	wol_pkt_buf_addr;</div><div class='del'>-	__le16	wol_pkt_buf_size;</div><div class='del'>-	u8	unused_1[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_wol_reason_qcfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_wol_reason_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	wol_filter_id;</div><div class='del'>-	u8	wol_reason;</div><div class='del'>-	#define WOL_REASON_QCFG_RESP_WOL_REASON_MAGICPKT 0x0UL</div><div class='del'>-	#define WOL_REASON_QCFG_RESP_WOL_REASON_BMP      0x1UL</div><div class='del'>-	#define WOL_REASON_QCFG_RESP_WOL_REASON_INVALID  0xffUL</div><div class='del'>-	#define WOL_REASON_QCFG_RESP_WOL_REASON_LAST    WOL_REASON_QCFG_RESP_WOL_REASON_INVALID</div><div class='del'>-	u8	wol_pkt_len;</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_read_direct_input (size:256b/32B) */</div><div class='del'>-struct hwrm_dbg_read_direct_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	host_dest_addr;</div><div class='del'>-	__le32	read_addr;</div><div class='del'>-	__le32	read_len32;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_read_direct_output (size:128b/16B) */</div><div class='del'>-struct hwrm_dbg_read_direct_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	crc32;</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_qcaps_input (size:192b/24B) */</div><div class='del'>-struct hwrm_dbg_qcaps_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_qcaps_output (size:192b/24B) */</div><div class='del'>-struct hwrm_dbg_qcaps_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	__le32	coredump_component_disable_caps;</div><div class='del'>-	#define DBG_QCAPS_RESP_COREDUMP_COMPONENT_DISABLE_CAPS_NVRAM     0x1UL</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define DBG_QCAPS_RESP_FLAGS_CRASHDUMP_NVM             0x1UL</div><div class='del'>-	#define DBG_QCAPS_RESP_FLAGS_CRASHDUMP_HOST_DDR        0x2UL</div><div class='del'>-	#define DBG_QCAPS_RESP_FLAGS_CRASHDUMP_SOC_DDR         0x4UL</div><div class='del'>-	#define DBG_QCAPS_RESP_FLAGS_USEQ                      0x8UL</div><div class='del'>-	#define DBG_QCAPS_RESP_FLAGS_COREDUMP_HOST_DDR         0x10UL</div><div class='del'>-	#define DBG_QCAPS_RESP_FLAGS_COREDUMP_HOST_CAPTURE     0x20UL</div><div class='del'>-	#define DBG_QCAPS_RESP_FLAGS_PTRACE                    0x40UL</div><div class='del'>-	u8	unused_1[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_qcfg_input (size:192b/24B) */</div><div class='del'>-struct hwrm_dbg_qcfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define DBG_QCFG_REQ_FLAGS_CRASHDUMP_SIZE_FOR_DEST_MASK         0x3UL</div><div class='del'>-	#define DBG_QCFG_REQ_FLAGS_CRASHDUMP_SIZE_FOR_DEST_SFT          0</div><div class='del'>-	#define DBG_QCFG_REQ_FLAGS_CRASHDUMP_SIZE_FOR_DEST_DEST_NVM       0x0UL</div><div class='del'>-	#define DBG_QCFG_REQ_FLAGS_CRASHDUMP_SIZE_FOR_DEST_DEST_HOST_DDR  0x1UL</div><div class='del'>-	#define DBG_QCFG_REQ_FLAGS_CRASHDUMP_SIZE_FOR_DEST_DEST_SOC_DDR   0x2UL</div><div class='del'>-	#define DBG_QCFG_REQ_FLAGS_CRASHDUMP_SIZE_FOR_DEST_LAST          DBG_QCFG_REQ_FLAGS_CRASHDUMP_SIZE_FOR_DEST_DEST_SOC_DDR</div><div class='del'>-	__le32	coredump_component_disable_flags;</div><div class='del'>-	#define DBG_QCFG_REQ_COREDUMP_COMPONENT_DISABLE_FLAGS_NVRAM     0x1UL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_qcfg_output (size:256b/32B) */</div><div class='del'>-struct hwrm_dbg_qcfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	fid;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	__le32	coredump_size;</div><div class='del'>-	__le32	flags;</div><div class='del'>-	#define DBG_QCFG_RESP_FLAGS_UART_LOG               0x1UL</div><div class='del'>-	#define DBG_QCFG_RESP_FLAGS_UART_LOG_SECONDARY     0x2UL</div><div class='del'>-	#define DBG_QCFG_RESP_FLAGS_FW_TRACE               0x4UL</div><div class='del'>-	#define DBG_QCFG_RESP_FLAGS_FW_TRACE_SECONDARY     0x8UL</div><div class='del'>-	#define DBG_QCFG_RESP_FLAGS_DEBUG_NOTIFY           0x10UL</div><div class='del'>-	#define DBG_QCFG_RESP_FLAGS_JTAG_DEBUG             0x20UL</div><div class='del'>-	__le16	async_cmpl_ring;</div><div class='del'>-	u8	unused_2[2];</div><div class='del'>-	__le32	crashdump_size;</div><div class='del'>-	u8	unused_3[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_crashdump_medium_cfg_input (size:320b/40B) */</div><div class='del'>-struct hwrm_dbg_crashdump_medium_cfg_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	output_dest_flags;</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_TYPE_DDR     0x1UL</div><div class='del'>-	__le16	pg_size_lvl;</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_LVL_MASK      0x3UL</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_LVL_SFT       0</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_LVL_LVL_0       0x0UL</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_LVL_LVL_1       0x1UL</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_LVL_LVL_2       0x2UL</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_LVL_LAST       DBG_CRASHDUMP_MEDIUM_CFG_REQ_LVL_LVL_2</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_PG_SIZE_MASK  0x1cUL</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_PG_SIZE_SFT   2</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_PG_SIZE_PG_4K   (0x0UL &lt;&lt; 2)</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_PG_SIZE_PG_8K   (0x1UL &lt;&lt; 2)</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_PG_SIZE_PG_64K  (0x2UL &lt;&lt; 2)</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_PG_SIZE_PG_2M   (0x3UL &lt;&lt; 2)</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_PG_SIZE_PG_8M   (0x4UL &lt;&lt; 2)</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_PG_SIZE_PG_1G   (0x5UL &lt;&lt; 2)</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_PG_SIZE_LAST   DBG_CRASHDUMP_MEDIUM_CFG_REQ_PG_SIZE_PG_1G</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_UNUSED11_MASK 0xffe0UL</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_UNUSED11_SFT  5</div><div class='del'>-	__le32	size;</div><div class='del'>-	__le32	coredump_component_disable_flags;</div><div class='del'>-	#define DBG_CRASHDUMP_MEDIUM_CFG_REQ_NVRAM     0x1UL</div><div class='del'>-	__le32	unused_0;</div><div class='del'>-	__le64	pbl;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_crashdump_medium_cfg_output (size:128b/16B) */</div><div class='del'>-struct hwrm_dbg_crashdump_medium_cfg_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_1[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* coredump_segment_record (size:128b/16B) */</div><div class='del'>-struct coredump_segment_record {</div><div class='del'>-	__le16	component_id;</div><div class='del'>-	__le16	segment_id;</div><div class='del'>-	__le16	max_instances;</div><div class='del'>-	u8	version_hi;</div><div class='del'>-	u8	version_low;</div><div class='del'>-	u8	seg_flags;</div><div class='del'>-	u8	compress_flags;</div><div class='del'>-	#define SFLAG_COMPRESSED_ZLIB     0x1UL</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	__le32	segment_len;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_coredump_list_input (size:256b/32B) */</div><div class='del'>-struct hwrm_dbg_coredump_list_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	host_dest_addr;</div><div class='del'>-	__le32	host_buf_len;</div><div class='del'>-	__le16	seq_no;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define DBG_COREDUMP_LIST_REQ_FLAGS_CRASHDUMP     0x1UL</div><div class='del'>-	u8	unused_0[1];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_coredump_list_output (size:128b/16B) */</div><div class='del'>-struct hwrm_dbg_coredump_list_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define DBG_COREDUMP_LIST_RESP_FLAGS_MORE     0x1UL</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	total_segments;</div><div class='del'>-	__le16	data_len;</div><div class='del'>-	u8	unused_1;</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_coredump_initiate_input (size:256b/32B) */</div><div class='del'>-struct hwrm_dbg_coredump_initiate_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	component_id;</div><div class='del'>-	__le16	segment_id;</div><div class='del'>-	__le16	instance;</div><div class='del'>-	__le16	unused_0;</div><div class='del'>-	u8	seg_flags;</div><div class='del'>-	#define DBG_COREDUMP_INITIATE_REQ_SEG_FLAGS_LIVE_DATA                0x1UL</div><div class='del'>-	#define DBG_COREDUMP_INITIATE_REQ_SEG_FLAGS_CRASH_DATA               0x2UL</div><div class='del'>-	#define DBG_COREDUMP_INITIATE_REQ_SEG_FLAGS_COLLECT_CTX_L1_CACHE     0x4UL</div><div class='del'>-	u8	unused_1[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_coredump_initiate_output (size:128b/16B) */</div><div class='del'>-struct hwrm_dbg_coredump_initiate_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* coredump_data_hdr (size:128b/16B) */</div><div class='del'>-struct coredump_data_hdr {</div><div class='del'>-	__le32	address;</div><div class='del'>-	__le32	flags_length;</div><div class='del'>-	#define COREDUMP_DATA_HDR_FLAGS_LENGTH_ACTUAL_LEN_MASK     0xffffffUL</div><div class='del'>-	#define COREDUMP_DATA_HDR_FLAGS_LENGTH_ACTUAL_LEN_SFT      0</div><div class='del'>-	#define COREDUMP_DATA_HDR_FLAGS_LENGTH_INDIRECT_ACCESS     0x1000000UL</div><div class='del'>-	__le32	instance;</div><div class='del'>-	__le32	next_offset;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_coredump_retrieve_input (size:448b/56B) */</div><div class='del'>-struct hwrm_dbg_coredump_retrieve_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	host_dest_addr;</div><div class='del'>-	__le32	host_buf_len;</div><div class='del'>-	__le32	unused_0;</div><div class='del'>-	__le16	component_id;</div><div class='del'>-	__le16	segment_id;</div><div class='del'>-	__le16	instance;</div><div class='del'>-	__le16	unused_1;</div><div class='del'>-	u8	seg_flags;</div><div class='del'>-	u8	unused_2;</div><div class='del'>-	__le16	unused_3;</div><div class='del'>-	__le32	unused_4;</div><div class='del'>-	__le32	seq_no;</div><div class='del'>-	__le32	unused_5;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_coredump_retrieve_output (size:128b/16B) */</div><div class='del'>-struct hwrm_dbg_coredump_retrieve_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define DBG_COREDUMP_RETRIEVE_RESP_FLAGS_MORE     0x1UL</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	data_len;</div><div class='del'>-	u8	unused_1[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_ring_info_get_input (size:192b/24B) */</div><div class='del'>-struct hwrm_dbg_ring_info_get_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	ring_type;</div><div class='del'>-	#define DBG_RING_INFO_GET_REQ_RING_TYPE_L2_CMPL 0x0UL</div><div class='del'>-	#define DBG_RING_INFO_GET_REQ_RING_TYPE_TX      0x1UL</div><div class='del'>-	#define DBG_RING_INFO_GET_REQ_RING_TYPE_RX      0x2UL</div><div class='del'>-	#define DBG_RING_INFO_GET_REQ_RING_TYPE_NQ      0x3UL</div><div class='del'>-	#define DBG_RING_INFO_GET_REQ_RING_TYPE_LAST   DBG_RING_INFO_GET_REQ_RING_TYPE_NQ</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	__le32	fw_ring_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_dbg_ring_info_get_output (size:192b/24B) */</div><div class='del'>-struct hwrm_dbg_ring_info_get_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	producer_index;</div><div class='del'>-	__le32	consumer_index;</div><div class='del'>-	__le32	cag_vector_ctrl;</div><div class='del'>-	__le16	st_tag;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_read_input (size:320b/40B) */</div><div class='del'>-struct hwrm_nvm_read_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	host_dest_addr;</div><div class='del'>-	__le16	dir_idx;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-	__le32	offset;</div><div class='del'>-	__le32	len;</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_read_output (size:128b/16B) */</div><div class='del'>-struct hwrm_nvm_read_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_get_dir_entries_input (size:192b/24B) */</div><div class='del'>-struct hwrm_nvm_get_dir_entries_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	host_dest_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_get_dir_entries_output (size:128b/16B) */</div><div class='del'>-struct hwrm_nvm_get_dir_entries_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_get_dir_info_input (size:128b/16B) */</div><div class='del'>-struct hwrm_nvm_get_dir_info_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_get_dir_info_output (size:192b/24B) */</div><div class='del'>-struct hwrm_nvm_get_dir_info_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	entries;</div><div class='del'>-	__le32	entry_length;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_write_input (size:448b/56B) */</div><div class='del'>-struct hwrm_nvm_write_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	host_src_addr;</div><div class='del'>-	__le16	dir_type;</div><div class='del'>-	__le16	dir_ordinal;</div><div class='del'>-	__le16	dir_ext;</div><div class='del'>-	__le16	dir_attr;</div><div class='del'>-	__le32	dir_data_length;</div><div class='del'>-	__le16	option;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define NVM_WRITE_REQ_FLAGS_KEEP_ORIG_ACTIVE_IMG     0x1UL</div><div class='del'>-	#define NVM_WRITE_REQ_FLAGS_BATCH_MODE               0x2UL</div><div class='del'>-	#define NVM_WRITE_REQ_FLAGS_BATCH_LAST               0x4UL</div><div class='del'>-	__le32	dir_item_length;</div><div class='del'>-	__le32	offset;</div><div class='del'>-	__le32	len;</div><div class='del'>-	__le32	unused_0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_write_output (size:128b/16B) */</div><div class='del'>-struct hwrm_nvm_write_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	dir_item_length;</div><div class='del'>-	__le16	dir_idx;</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_write_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_nvm_write_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define NVM_WRITE_CMD_ERR_CODE_UNKNOWN  0x0UL</div><div class='del'>-	#define NVM_WRITE_CMD_ERR_CODE_FRAG_ERR 0x1UL</div><div class='del'>-	#define NVM_WRITE_CMD_ERR_CODE_NO_SPACE 0x2UL</div><div class='del'>-	#define NVM_WRITE_CMD_ERR_CODE_LAST    NVM_WRITE_CMD_ERR_CODE_NO_SPACE</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_modify_input (size:320b/40B) */</div><div class='del'>-struct hwrm_nvm_modify_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	host_src_addr;</div><div class='del'>-	__le16	dir_idx;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define NVM_MODIFY_REQ_FLAGS_BATCH_MODE     0x1UL</div><div class='del'>-	#define NVM_MODIFY_REQ_FLAGS_BATCH_LAST     0x2UL</div><div class='del'>-	__le32	offset;</div><div class='del'>-	__le32	len;</div><div class='del'>-	u8	unused_1[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_modify_output (size:128b/16B) */</div><div class='del'>-struct hwrm_nvm_modify_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_find_dir_entry_input (size:256b/32B) */</div><div class='del'>-struct hwrm_nvm_find_dir_entry_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define NVM_FIND_DIR_ENTRY_REQ_ENABLES_DIR_IDX_VALID     0x1UL</div><div class='del'>-	__le16	dir_idx;</div><div class='del'>-	__le16	dir_type;</div><div class='del'>-	__le16	dir_ordinal;</div><div class='del'>-	__le16	dir_ext;</div><div class='del'>-	u8	opt_ordinal;</div><div class='del'>-	#define NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_MASK 0x3UL</div><div class='del'>-	#define NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_SFT 0</div><div class='del'>-	#define NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ    0x0UL</div><div class='del'>-	#define NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_GE    0x1UL</div><div class='del'>-	#define NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_GT    0x2UL</div><div class='del'>-	#define NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_LAST NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_GT</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_find_dir_entry_output (size:256b/32B) */</div><div class='del'>-struct hwrm_nvm_find_dir_entry_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le32	dir_item_length;</div><div class='del'>-	__le32	dir_data_length;</div><div class='del'>-	__le32	fw_ver;</div><div class='del'>-	__le16	dir_ordinal;</div><div class='del'>-	__le16	dir_idx;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_erase_dir_entry_input (size:192b/24B) */</div><div class='del'>-struct hwrm_nvm_erase_dir_entry_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	dir_idx;</div><div class='del'>-	u8	unused_0[6];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_erase_dir_entry_output (size:128b/16B) */</div><div class='del'>-struct hwrm_nvm_erase_dir_entry_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_get_dev_info_input (size:192b/24B) */</div><div class='del'>-struct hwrm_nvm_get_dev_info_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define NVM_GET_DEV_INFO_REQ_FLAGS_SECURITY_SOC_NVM     0x1UL</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_get_dev_info_output (size:768b/96B) */</div><div class='del'>-struct hwrm_nvm_get_dev_info_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	manufacturer_id;</div><div class='del'>-	__le16	device_id;</div><div class='del'>-	__le32	sector_size;</div><div class='del'>-	__le32	nvram_size;</div><div class='del'>-	__le32	reserved_size;</div><div class='del'>-	__le32	available_size;</div><div class='del'>-	u8	nvm_cfg_ver_maj;</div><div class='del'>-	u8	nvm_cfg_ver_min;</div><div class='del'>-	u8	nvm_cfg_ver_upd;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define NVM_GET_DEV_INFO_RESP_FLAGS_FW_VER_VALID     0x1UL</div><div class='del'>-	char	pkg_name[16];</div><div class='del'>-	__le16	hwrm_fw_major;</div><div class='del'>-	__le16	hwrm_fw_minor;</div><div class='del'>-	__le16	hwrm_fw_build;</div><div class='del'>-	__le16	hwrm_fw_patch;</div><div class='del'>-	__le16	mgmt_fw_major;</div><div class='del'>-	__le16	mgmt_fw_minor;</div><div class='del'>-	__le16	mgmt_fw_build;</div><div class='del'>-	__le16	mgmt_fw_patch;</div><div class='del'>-	__le16	roce_fw_major;</div><div class='del'>-	__le16	roce_fw_minor;</div><div class='del'>-	__le16	roce_fw_build;</div><div class='del'>-	__le16	roce_fw_patch;</div><div class='del'>-	__le16	netctrl_fw_major;</div><div class='del'>-	__le16	netctrl_fw_minor;</div><div class='del'>-	__le16	netctrl_fw_build;</div><div class='del'>-	__le16	netctrl_fw_patch;</div><div class='del'>-	__le16	srt2_fw_major;</div><div class='del'>-	__le16	srt2_fw_minor;</div><div class='del'>-	__le16	srt2_fw_build;</div><div class='del'>-	__le16	srt2_fw_patch;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_mod_dir_entry_input (size:256b/32B) */</div><div class='del'>-struct hwrm_nvm_mod_dir_entry_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	enables;</div><div class='del'>-	#define NVM_MOD_DIR_ENTRY_REQ_ENABLES_CHECKSUM     0x1UL</div><div class='del'>-	__le16	dir_idx;</div><div class='del'>-	__le16	dir_ordinal;</div><div class='del'>-	__le16	dir_ext;</div><div class='del'>-	__le16	dir_attr;</div><div class='del'>-	__le32	checksum;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_mod_dir_entry_output (size:128b/16B) */</div><div class='del'>-struct hwrm_nvm_mod_dir_entry_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_verify_update_input (size:192b/24B) */</div><div class='del'>-struct hwrm_nvm_verify_update_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le16	dir_type;</div><div class='del'>-	__le16	dir_ordinal;</div><div class='del'>-	__le16	dir_ext;</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_verify_update_output (size:128b/16B) */</div><div class='del'>-struct hwrm_nvm_verify_update_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_install_update_input (size:192b/24B) */</div><div class='del'>-struct hwrm_nvm_install_update_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le32	install_type;</div><div class='del'>-	#define NVM_INSTALL_UPDATE_REQ_INSTALL_TYPE_NORMAL 0x0UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_REQ_INSTALL_TYPE_ALL    0xffffffffUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_REQ_INSTALL_TYPE_LAST  NVM_INSTALL_UPDATE_REQ_INSTALL_TYPE_ALL</div><div class='del'>-	__le16	flags;</div><div class='del'>-	#define NVM_INSTALL_UPDATE_REQ_FLAGS_ERASE_UNUSED_SPACE     0x1UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_REQ_FLAGS_REMOVE_UNUSED_PKG      0x2UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG      0x4UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_REQ_FLAGS_VERIFY_ONLY            0x8UL</div><div class='del'>-	u8	unused_0[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_install_update_output (size:192b/24B) */</div><div class='del'>-struct hwrm_nvm_install_update_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le64	installed_items;</div><div class='del'>-	u8	result;</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_SUCCESS                      0x0UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_FAILURE                      0xffUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_MALLOC_FAILURE               0xfdUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_INDEX_PARAMETER      0xfbUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_TYPE_PARAMETER       0xf3UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PREREQUISITE         0xf2UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_FILE_HEADER          0xecUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_SIGNATURE            0xebUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PROP_STREAM          0xeaUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_PROP_LENGTH          0xe9UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_MANIFEST             0xe8UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_TRAILER              0xe7UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_CHECKSUM             0xe6UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_ITEM_CHECKSUM        0xe5UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_DATA_LENGTH          0xe4UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INVALID_DIRECTIVE            0xe1UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_CHIP_REV         0xceUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_DEVICE_ID        0xcdUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_SUBSYS_VENDOR    0xccUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_SUBSYS_ID        0xcbUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_UNSUPPORTED_PLATFORM         0xc5UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_DUPLICATE_ITEM               0xc4UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_ZERO_LENGTH_ITEM             0xc3UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_CHECKSUM_ERROR       0xb9UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_DATA_ERROR           0xb8UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_INSTALL_AUTHENTICATION_ERROR 0xb7UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_NOT_FOUND               0xb0UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_LOCKED                  0xa7UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESULT_LAST                        NVM_INSTALL_UPDATE_RESP_RESULT_ITEM_LOCKED</div><div class='del'>-	u8	problem_item;</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_PROBLEM_ITEM_NONE    0x0UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_PROBLEM_ITEM_PACKAGE 0xffUL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_PROBLEM_ITEM_LAST   NVM_INSTALL_UPDATE_RESP_PROBLEM_ITEM_PACKAGE</div><div class='del'>-	u8	reset_required;</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESET_REQUIRED_NONE  0x0UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESET_REQUIRED_PCI   0x1UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESET_REQUIRED_POWER 0x2UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_RESP_RESET_REQUIRED_LAST NVM_INSTALL_UPDATE_RESP_RESET_REQUIRED_POWER</div><div class='del'>-	u8	unused_0[4];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_install_update_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_nvm_install_update_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define NVM_INSTALL_UPDATE_CMD_ERR_CODE_UNKNOWN            0x0UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR           0x1UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_SPACE           0x2UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_CMD_ERR_CODE_ANTI_ROLLBACK      0x3UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_VOLTREG_SUPPORT 0x4UL</div><div class='del'>-	#define NVM_INSTALL_UPDATE_CMD_ERR_CODE_LAST              NVM_INSTALL_UPDATE_CMD_ERR_CODE_NO_VOLTREG_SUPPORT</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_get_variable_input (size:320b/40B) */</div><div class='del'>-struct hwrm_nvm_get_variable_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	dest_data_addr;</div><div class='del'>-	__le16	data_len;</div><div class='del'>-	__le16	option_num;</div><div class='del'>-	#define NVM_GET_VARIABLE_REQ_OPTION_NUM_RSVD_0    0x0UL</div><div class='del'>-	#define NVM_GET_VARIABLE_REQ_OPTION_NUM_RSVD_FFFF 0xffffUL</div><div class='del'>-	#define NVM_GET_VARIABLE_REQ_OPTION_NUM_LAST     NVM_GET_VARIABLE_REQ_OPTION_NUM_RSVD_FFFF</div><div class='del'>-	__le16	dimensions;</div><div class='del'>-	__le16	index_0;</div><div class='del'>-	__le16	index_1;</div><div class='del'>-	__le16	index_2;</div><div class='del'>-	__le16	index_3;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define NVM_GET_VARIABLE_REQ_FLAGS_FACTORY_DFLT     0x1UL</div><div class='del'>-	u8	unused_0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_get_variable_output (size:128b/16B) */</div><div class='del'>-struct hwrm_nvm_get_variable_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	__le16	data_len;</div><div class='del'>-	__le16	option_num;</div><div class='del'>-	#define NVM_GET_VARIABLE_RESP_OPTION_NUM_RSVD_0    0x0UL</div><div class='del'>-	#define NVM_GET_VARIABLE_RESP_OPTION_NUM_RSVD_FFFF 0xffffUL</div><div class='del'>-	#define NVM_GET_VARIABLE_RESP_OPTION_NUM_LAST     NVM_GET_VARIABLE_RESP_OPTION_NUM_RSVD_FFFF</div><div class='del'>-	u8	unused_0[3];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_get_variable_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_nvm_get_variable_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define NVM_GET_VARIABLE_CMD_ERR_CODE_UNKNOWN       0x0UL</div><div class='del'>-	#define NVM_GET_VARIABLE_CMD_ERR_CODE_VAR_NOT_EXIST 0x1UL</div><div class='del'>-	#define NVM_GET_VARIABLE_CMD_ERR_CODE_CORRUPT_VAR   0x2UL</div><div class='del'>-	#define NVM_GET_VARIABLE_CMD_ERR_CODE_LEN_TOO_SHORT 0x3UL</div><div class='del'>-	#define NVM_GET_VARIABLE_CMD_ERR_CODE_LAST         NVM_GET_VARIABLE_CMD_ERR_CODE_LEN_TOO_SHORT</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_set_variable_input (size:320b/40B) */</div><div class='del'>-struct hwrm_nvm_set_variable_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	__le64	src_data_addr;</div><div class='del'>-	__le16	data_len;</div><div class='del'>-	__le16	option_num;</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_OPTION_NUM_RSVD_0    0x0UL</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_OPTION_NUM_RSVD_FFFF 0xffffUL</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_OPTION_NUM_LAST     NVM_SET_VARIABLE_REQ_OPTION_NUM_RSVD_FFFF</div><div class='del'>-	__le16	dimensions;</div><div class='del'>-	__le16	index_0;</div><div class='del'>-	__le16	index_1;</div><div class='del'>-	__le16	index_2;</div><div class='del'>-	__le16	index_3;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_FORCE_FLUSH                0x1UL</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_ENCRYPT_MODE_MASK          0xeUL</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_ENCRYPT_MODE_SFT           1</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_ENCRYPT_MODE_NONE            (0x0UL &lt;&lt; 1)</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_ENCRYPT_MODE_HMAC_SHA1       (0x1UL &lt;&lt; 1)</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_ENCRYPT_MODE_AES256          (0x2UL &lt;&lt; 1)</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_ENCRYPT_MODE_HMAC_SHA1_AUTH  (0x3UL &lt;&lt; 1)</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_ENCRYPT_MODE_LAST           NVM_SET_VARIABLE_REQ_FLAGS_ENCRYPT_MODE_HMAC_SHA1_AUTH</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_FLAGS_UNUSED_0_MASK        0x70UL</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_FLAGS_UNUSED_0_SFT         4</div><div class='del'>-	#define NVM_SET_VARIABLE_REQ_FLAGS_FACTORY_DEFAULT            0x80UL</div><div class='del'>-	u8	unused_0;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_set_variable_output (size:128b/16B) */</div><div class='del'>-struct hwrm_nvm_set_variable_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_nvm_set_variable_cmd_err (size:64b/8B) */</div><div class='del'>-struct hwrm_nvm_set_variable_cmd_err {</div><div class='del'>-	u8	code;</div><div class='del'>-	#define NVM_SET_VARIABLE_CMD_ERR_CODE_UNKNOWN       0x0UL</div><div class='del'>-	#define NVM_SET_VARIABLE_CMD_ERR_CODE_VAR_NOT_EXIST 0x1UL</div><div class='del'>-	#define NVM_SET_VARIABLE_CMD_ERR_CODE_CORRUPT_VAR   0x2UL</div><div class='del'>-	#define NVM_SET_VARIABLE_CMD_ERR_CODE_LAST         NVM_SET_VARIABLE_CMD_ERR_CODE_CORRUPT_VAR</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_selftest_qlist_input (size:128b/16B) */</div><div class='del'>-struct hwrm_selftest_qlist_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_selftest_qlist_output (size:2240b/280B) */</div><div class='del'>-struct hwrm_selftest_qlist_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	num_tests;</div><div class='del'>-	u8	available_tests;</div><div class='del'>-	#define SELFTEST_QLIST_RESP_AVAILABLE_TESTS_NVM_TEST                 0x1UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_AVAILABLE_TESTS_LINK_TEST                0x2UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_AVAILABLE_TESTS_REGISTER_TEST            0x4UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_AVAILABLE_TESTS_MEMORY_TEST              0x8UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_AVAILABLE_TESTS_PCIE_SERDES_TEST         0x10UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_AVAILABLE_TESTS_ETHERNET_SERDES_TEST     0x20UL</div><div class='del'>-	u8	offline_tests;</div><div class='del'>-	#define SELFTEST_QLIST_RESP_OFFLINE_TESTS_NVM_TEST                 0x1UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_OFFLINE_TESTS_LINK_TEST                0x2UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_OFFLINE_TESTS_REGISTER_TEST            0x4UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_OFFLINE_TESTS_MEMORY_TEST              0x8UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_OFFLINE_TESTS_PCIE_SERDES_TEST         0x10UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_OFFLINE_TESTS_ETHERNET_SERDES_TEST     0x20UL</div><div class='del'>-	u8	unused_0;</div><div class='del'>-	__le16	test_timeout;</div><div class='del'>-	u8	unused_1[2];</div><div class='del'>-	char	test_name[8][32];</div><div class='del'>-	u8	eyescope_target_BER_support;</div><div class='del'>-	#define SELFTEST_QLIST_RESP_EYESCOPE_TARGET_BER_SUPPORT_BER_1E8_SUPPORTED  0x0UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_EYESCOPE_TARGET_BER_SUPPORT_BER_1E9_SUPPORTED  0x1UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_EYESCOPE_TARGET_BER_SUPPORT_BER_1E10_SUPPORTED 0x2UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_EYESCOPE_TARGET_BER_SUPPORT_BER_1E11_SUPPORTED 0x3UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_EYESCOPE_TARGET_BER_SUPPORT_BER_1E12_SUPPORTED 0x4UL</div><div class='del'>-	#define SELFTEST_QLIST_RESP_EYESCOPE_TARGET_BER_SUPPORT_LAST              SELFTEST_QLIST_RESP_EYESCOPE_TARGET_BER_SUPPORT_BER_1E12_SUPPORTED</div><div class='del'>-	u8	unused_2[6];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_selftest_exec_input (size:192b/24B) */</div><div class='del'>-struct hwrm_selftest_exec_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-	u8	flags;</div><div class='del'>-	#define SELFTEST_EXEC_REQ_FLAGS_NVM_TEST                 0x1UL</div><div class='del'>-	#define SELFTEST_EXEC_REQ_FLAGS_LINK_TEST                0x2UL</div><div class='del'>-	#define SELFTEST_EXEC_REQ_FLAGS_REGISTER_TEST            0x4UL</div><div class='del'>-	#define SELFTEST_EXEC_REQ_FLAGS_MEMORY_TEST              0x8UL</div><div class='del'>-	#define SELFTEST_EXEC_REQ_FLAGS_PCIE_SERDES_TEST         0x10UL</div><div class='del'>-	#define SELFTEST_EXEC_REQ_FLAGS_ETHERNET_SERDES_TEST     0x20UL</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_selftest_exec_output (size:128b/16B) */</div><div class='del'>-struct hwrm_selftest_exec_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	requested_tests;</div><div class='del'>-	#define SELFTEST_EXEC_RESP_REQUESTED_TESTS_NVM_TEST                 0x1UL</div><div class='del'>-	#define SELFTEST_EXEC_RESP_REQUESTED_TESTS_LINK_TEST                0x2UL</div><div class='del'>-	#define SELFTEST_EXEC_RESP_REQUESTED_TESTS_REGISTER_TEST            0x4UL</div><div class='del'>-	#define SELFTEST_EXEC_RESP_REQUESTED_TESTS_MEMORY_TEST              0x8UL</div><div class='del'>-	#define SELFTEST_EXEC_RESP_REQUESTED_TESTS_PCIE_SERDES_TEST         0x10UL</div><div class='del'>-	#define SELFTEST_EXEC_RESP_REQUESTED_TESTS_ETHERNET_SERDES_TEST     0x20UL</div><div class='del'>-	u8	test_success;</div><div class='del'>-	#define SELFTEST_EXEC_RESP_TEST_SUCCESS_NVM_TEST                 0x1UL</div><div class='del'>-	#define SELFTEST_EXEC_RESP_TEST_SUCCESS_LINK_TEST                0x2UL</div><div class='del'>-	#define SELFTEST_EXEC_RESP_TEST_SUCCESS_REGISTER_TEST            0x4UL</div><div class='del'>-	#define SELFTEST_EXEC_RESP_TEST_SUCCESS_MEMORY_TEST              0x8UL</div><div class='del'>-	#define SELFTEST_EXEC_RESP_TEST_SUCCESS_PCIE_SERDES_TEST         0x10UL</div><div class='del'>-	#define SELFTEST_EXEC_RESP_TEST_SUCCESS_ETHERNET_SERDES_TEST     0x20UL</div><div class='del'>-	u8	unused_0[5];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_selftest_irq_input (size:128b/16B) */</div><div class='del'>-struct hwrm_selftest_irq_input {</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	cmpl_ring;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	target_id;</div><div class='del'>-	__le64	resp_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hwrm_selftest_irq_output (size:128b/16B) */</div><div class='del'>-struct hwrm_selftest_irq_output {</div><div class='del'>-	__le16	error_code;</div><div class='del'>-	__le16	req_type;</div><div class='del'>-	__le16	seq_id;</div><div class='del'>-	__le16	resp_len;</div><div class='del'>-	u8	unused_0[7];</div><div class='del'>-	u8	valid;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* dbc_dbc (size:64b/8B) */</div><div class='del'>-struct dbc_dbc {</div><div class='del'>-	__le32	index;</div><div class='del'>-	#define DBC_DBC_INDEX_MASK 0xffffffUL</div><div class='del'>-	#define DBC_DBC_INDEX_SFT  0</div><div class='del'>-	#define DBC_DBC_EPOCH      0x1000000UL</div><div class='del'>-	#define DBC_DBC_TOGGLE_MASK 0x6000000UL</div><div class='del'>-	#define DBC_DBC_TOGGLE_SFT 25</div><div class='del'>-	__le32	type_path_xid;</div><div class='del'>-	#define DBC_DBC_XID_MASK          0xfffffUL</div><div class='del'>-	#define DBC_DBC_XID_SFT           0</div><div class='del'>-	#define DBC_DBC_PATH_MASK         0x3000000UL</div><div class='del'>-	#define DBC_DBC_PATH_SFT          24</div><div class='del'>-	#define DBC_DBC_PATH_ROCE           (0x0UL &lt;&lt; 24)</div><div class='del'>-	#define DBC_DBC_PATH_L2             (0x1UL &lt;&lt; 24)</div><div class='del'>-	#define DBC_DBC_PATH_ENGINE         (0x2UL &lt;&lt; 24)</div><div class='del'>-	#define DBC_DBC_PATH_LAST          DBC_DBC_PATH_ENGINE</div><div class='del'>-	#define DBC_DBC_VALID             0x4000000UL</div><div class='del'>-	#define DBC_DBC_DEBUG_TRACE       0x8000000UL</div><div class='del'>-	#define DBC_DBC_TYPE_MASK         0xf0000000UL</div><div class='del'>-	#define DBC_DBC_TYPE_SFT          28</div><div class='del'>-	#define DBC_DBC_TYPE_SQ             (0x0UL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_RQ             (0x1UL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_SRQ            (0x2UL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_SRQ_ARM        (0x3UL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_CQ             (0x4UL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_CQ_ARMSE       (0x5UL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_CQ_ARMALL      (0x6UL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_CQ_ARMENA      (0x7UL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_SRQ_ARMENA     (0x8UL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_CQ_CUTOFF_ACK  (0x9UL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_NQ             (0xaUL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_NQ_ARM         (0xbUL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_NQ_MASK        (0xeUL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_NULL           (0xfUL &lt;&lt; 28)</div><div class='del'>-	#define DBC_DBC_TYPE_LAST          DBC_DBC_TYPE_NULL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* db_push_start (size:64b/8B) */</div><div class='del'>-struct db_push_start {</div><div class='del'>-	u64	db;</div><div class='del'>-	#define DB_PUSH_START_DB_INDEX_MASK     0xffffffUL</div><div class='del'>-	#define DB_PUSH_START_DB_INDEX_SFT      0</div><div class='del'>-	#define DB_PUSH_START_DB_PI_LO_MASK     0xff000000UL</div><div class='del'>-	#define DB_PUSH_START_DB_PI_LO_SFT      24</div><div class='del'>-	#define DB_PUSH_START_DB_XID_MASK       0xfffff00000000ULL</div><div class='del'>-	#define DB_PUSH_START_DB_XID_SFT        32</div><div class='del'>-	#define DB_PUSH_START_DB_PI_HI_MASK     0xf0000000000000ULL</div><div class='del'>-	#define DB_PUSH_START_DB_PI_HI_SFT      52</div><div class='del'>-	#define DB_PUSH_START_DB_TYPE_MASK      0xf000000000000000ULL</div><div class='del'>-	#define DB_PUSH_START_DB_TYPE_SFT       60</div><div class='del'>-	#define DB_PUSH_START_DB_TYPE_PUSH_START  (0xcULL &lt;&lt; 60)</div><div class='del'>-	#define DB_PUSH_START_DB_TYPE_PUSH_END    (0xdULL &lt;&lt; 60)</div><div class='del'>-	#define DB_PUSH_START_DB_TYPE_LAST       DB_PUSH_START_DB_TYPE_PUSH_END</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* db_push_end (size:64b/8B) */</div><div class='del'>-struct db_push_end {</div><div class='del'>-	u64	db;</div><div class='del'>-	#define DB_PUSH_END_DB_INDEX_MASK      0xffffffUL</div><div class='del'>-	#define DB_PUSH_END_DB_INDEX_SFT       0</div><div class='del'>-	#define DB_PUSH_END_DB_PI_LO_MASK      0xff000000UL</div><div class='del'>-	#define DB_PUSH_END_DB_PI_LO_SFT       24</div><div class='del'>-	#define DB_PUSH_END_DB_XID_MASK        0xfffff00000000ULL</div><div class='del'>-	#define DB_PUSH_END_DB_XID_SFT         32</div><div class='del'>-	#define DB_PUSH_END_DB_PI_HI_MASK      0xf0000000000000ULL</div><div class='del'>-	#define DB_PUSH_END_DB_PI_HI_SFT       52</div><div class='del'>-	#define DB_PUSH_END_DB_PATH_MASK       0x300000000000000ULL</div><div class='del'>-	#define DB_PUSH_END_DB_PATH_SFT        56</div><div class='del'>-	#define DB_PUSH_END_DB_PATH_ROCE         (0x0ULL &lt;&lt; 56)</div><div class='del'>-	#define DB_PUSH_END_DB_PATH_L2           (0x1ULL &lt;&lt; 56)</div><div class='del'>-	#define DB_PUSH_END_DB_PATH_ENGINE       (0x2ULL &lt;&lt; 56)</div><div class='del'>-	#define DB_PUSH_END_DB_PATH_LAST        DB_PUSH_END_DB_PATH_ENGINE</div><div class='del'>-	#define DB_PUSH_END_DB_DEBUG_TRACE     0x800000000000000ULL</div><div class='del'>-	#define DB_PUSH_END_DB_TYPE_MASK       0xf000000000000000ULL</div><div class='del'>-	#define DB_PUSH_END_DB_TYPE_SFT        60</div><div class='del'>-	#define DB_PUSH_END_DB_TYPE_PUSH_START   (0xcULL &lt;&lt; 60)</div><div class='del'>-	#define DB_PUSH_END_DB_TYPE_PUSH_END     (0xdULL &lt;&lt; 60)</div><div class='del'>-	#define DB_PUSH_END_DB_TYPE_LAST        DB_PUSH_END_DB_TYPE_PUSH_END</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* db_push_info (size:64b/8B) */</div><div class='del'>-struct db_push_info {</div><div class='del'>-	u32	push_size_push_index;</div><div class='del'>-	#define DB_PUSH_INFO_PUSH_INDEX_MASK 0xffffffUL</div><div class='del'>-	#define DB_PUSH_INFO_PUSH_INDEX_SFT 0</div><div class='del'>-	#define DB_PUSH_INFO_PUSH_SIZE_MASK 0x1f000000UL</div><div class='del'>-	#define DB_PUSH_INFO_PUSH_SIZE_SFT  24</div><div class='del'>-	u32	reserved32;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* fw_status_reg (size:32b/4B) */</div><div class='del'>-struct fw_status_reg {</div><div class='del'>-	u32	fw_status;</div><div class='del'>-	#define FW_STATUS_REG_CODE_MASK              0xffffUL</div><div class='del'>-	#define FW_STATUS_REG_CODE_SFT               0</div><div class='del'>-	#define FW_STATUS_REG_CODE_READY               0x8000UL</div><div class='del'>-	#define FW_STATUS_REG_CODE_LAST               FW_STATUS_REG_CODE_READY</div><div class='del'>-	#define FW_STATUS_REG_IMAGE_DEGRADED         0x10000UL</div><div class='del'>-	#define FW_STATUS_REG_RECOVERABLE            0x20000UL</div><div class='del'>-	#define FW_STATUS_REG_CRASHDUMP_ONGOING      0x40000UL</div><div class='del'>-	#define FW_STATUS_REG_CRASHDUMP_COMPLETE     0x80000UL</div><div class='del'>-	#define FW_STATUS_REG_SHUTDOWN               0x100000UL</div><div class='del'>-	#define FW_STATUS_REG_CRASHED_NO_MASTER      0x200000UL</div><div class='del'>-	#define FW_STATUS_REG_RECOVERING             0x400000UL</div><div class='del'>-	#define FW_STATUS_REG_MANU_DEBUG_STATUS      0x800000UL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* hcomm_status (size:64b/8B) */</div><div class='del'>-struct hcomm_status {</div><div class='del'>-	u32	sig_ver;</div><div class='del'>-	#define HCOMM_STATUS_VER_MASK      0xffUL</div><div class='del'>-	#define HCOMM_STATUS_VER_SFT       0</div><div class='del'>-	#define HCOMM_STATUS_VER_LATEST      0x1UL</div><div class='del'>-	#define HCOMM_STATUS_VER_LAST       HCOMM_STATUS_VER_LATEST</div><div class='del'>-	#define HCOMM_STATUS_SIGNATURE_MASK 0xffffff00UL</div><div class='del'>-	#define HCOMM_STATUS_SIGNATURE_SFT 8</div><div class='del'>-	#define HCOMM_STATUS_SIGNATURE_VAL   (0x484353UL &lt;&lt; 8)</div><div class='del'>-	#define HCOMM_STATUS_SIGNATURE_LAST HCOMM_STATUS_SIGNATURE_VAL</div><div class='del'>-	u32	fw_status_loc;</div><div class='del'>-	#define HCOMM_STATUS_TRUE_ADDR_SPACE_MASK    0x3UL</div><div class='del'>-	#define HCOMM_STATUS_TRUE_ADDR_SPACE_SFT     0</div><div class='del'>-	#define HCOMM_STATUS_FW_STATUS_LOC_ADDR_SPACE_PCIE_CFG  0x0UL</div><div class='del'>-	#define HCOMM_STATUS_FW_STATUS_LOC_ADDR_SPACE_GRC       0x1UL</div><div class='del'>-	#define HCOMM_STATUS_FW_STATUS_LOC_ADDR_SPACE_BAR0      0x2UL</div><div class='del'>-	#define HCOMM_STATUS_FW_STATUS_LOC_ADDR_SPACE_BAR1      0x3UL</div><div class='del'>-	#define HCOMM_STATUS_FW_STATUS_LOC_ADDR_SPACE_LAST     HCOMM_STATUS_FW_STATUS_LOC_ADDR_SPACE_BAR1</div><div class='del'>-	#define HCOMM_STATUS_TRUE_OFFSET_MASK        0xfffffffcUL</div><div class='del'>-	#define HCOMM_STATUS_TRUE_OFFSET_SFT         2</div><div class='del'>-};</div><div class='del'>-#define HCOMM_STATUS_STRUCT_LOC 0x31001F0UL</div><div class='del'>-</div><div class='del'>-#endif /* _BNXT_HSI_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.c<br/>index 669d24ba0e87..de3427c6c6aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.c</a></div><div class='hunk'>@@ -12,8 +12,8 @@</div><div class='ctx'> #include &lt;linux/hwmon.h&gt;</div><div class='ctx'> #include &lt;linux/hwmon-sysfs.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "bnxt_hsi.h"</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_hwmon.h"</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c<br/>index d2fd2d04ed47..5ce190f50120 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c</a></div><div class='hunk'>@@ -20,8 +20,8 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "bnxt_hsi.h"</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h<br/>index 15ca51b5d204..791b3a0cdb83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h</a></div><div class='hunk'>@@ -10,7 +10,7 @@</div><div class='ctx'> #ifndef BNXT_HWRM_H</div><div class='ctx'> #define BNXT_HWRM_H</div><div class='ctx'> </div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> </div><div class='ctx'> enum bnxt_hwrm_ctx_flags {</div><div class='ctx'> 	/* Update the HWRM_API_FLAGS right below for any new non-internal bit added here */</div><div class='hunk'>@@ -58,7 +58,7 @@ void hwrm_update_token(struct bnxt *bp, u16 seq, enum bnxt_hwrm_wait_state s);</div><div class='ctx'> </div><div class='ctx'> #define BNXT_HWRM_MAX_REQ_LEN		(bp-&gt;hwrm_max_req_len)</div><div class='ctx'> #define BNXT_HWRM_SHORT_REQ_LEN		sizeof(struct hwrm_short_input)</div><div class='del'>-#define HWRM_CMD_MAX_TIMEOUT		40000U</div><div class='add'>+#define HWRM_CMD_MAX_TIMEOUT		60000U</div><div class='ctx'> #define SHORT_HWRM_CMD_TIMEOUT		20</div><div class='ctx'> #define HWRM_CMD_TIMEOUT		(bp-&gt;hwrm_cmd_timeout)</div><div class='ctx'> #define HWRM_RESET_TIMEOUT		((HWRM_CMD_TIMEOUT) * 4)</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c<br/>index fa514be87650..a8a74f07bb54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #include &lt;linux/timekeeping.h&gt;</div><div class='ctx'> #include &lt;linux/ptp_classify.h&gt;</div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_ptp.h"</div><div class='hunk'>@@ -67,15 +67,15 @@ static int bnxt_ptp_settime(struct ptp_clock_info *ptp_info,</div><div class='ctx'> 	if (BNXT_PTP_USE_RTC(ptp-&gt;bp))</div><div class='ctx'> 		return bnxt_ptp_cfg_settime(ptp-&gt;bp, ns);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	write_seqlock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 	timecounter_init(&amp;ptp-&gt;tc, &amp;ptp-&gt;cc, ns);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	write_sequnlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Caller holds ptp_lock */</div><div class='del'>-static int bnxt_refclk_read(struct bnxt *bp, struct ptp_system_timestamp *sts,</div><div class='del'>-			    u64 *ns)</div><div class='add'>+static int __bnxt_refclk_read(struct bnxt *bp, struct ptp_system_timestamp *sts,</div><div class='add'>+			      u64 *ns)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='ctx'> 	u32 high_before, high_now, low;</div><div class='hunk'>@@ -98,17 +98,50 @@ static int bnxt_refclk_read(struct bnxt *bp, struct ptp_system_timestamp *sts,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bnxt_ptp_get_current_time(struct bnxt *bp)</div><div class='add'>+static int bnxt_refclk_read(struct bnxt *bp, struct ptp_system_timestamp *sts,</div><div class='add'>+			    u64 *ns)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* We have to serialize reg access and FW reset */</div><div class='add'>+	read_seqlock_excl_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	rc = __bnxt_refclk_read(bp, sts, ns);</div><div class='add'>+	read_sequnlock_excl_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bnxt_refclk_read_low(struct bnxt *bp, struct ptp_system_timestamp *sts,</div><div class='add'>+				u32 *low)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* We have to serialize reg access and FW reset */</div><div class='add'>+	read_seqlock_excl_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (test_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state)) {</div><div class='add'>+		read_sequnlock_excl_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ptp_read_system_prets(sts);</div><div class='add'>+	*low = readl(bp-&gt;bar0 + ptp-&gt;refclk_mapped_regs[0]);</div><div class='add'>+	ptp_read_system_postts(sts);</div><div class='add'>+</div><div class='add'>+	read_sequnlock_excl_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_ptp_get_current_time(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='ctx'> </div><div class='ctx'> 	if (!ptp)</div><div class='ctx'> 		return;</div><div class='del'>-	spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='del'>-	WRITE_ONCE(ptp-&gt;old_time, ptp-&gt;current_time);</div><div class='add'>+	WRITE_ONCE(ptp-&gt;old_time, ptp-&gt;current_time &gt;&gt; BNXT_HI_TIMER_SHIFT);</div><div class='ctx'> 	bnxt_refclk_read(bp, NULL, &amp;ptp-&gt;current_time);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnxt_hwrm_port_ts_query(struct bnxt *bp, u32 flags, u64 *ts,</div><div class='hunk'>@@ -151,36 +184,32 @@ static int bnxt_ptp_gettimex(struct ptp_clock_info *ptp_info,</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,</div><div class='ctx'> 						ptp_info);</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	u64 ns, cycles;</div><div class='add'>+	u32 low;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='del'>-	rc = bnxt_refclk_read(ptp-&gt;bp, sts, &amp;cycles);</div><div class='del'>-	if (rc) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	rc = bnxt_refclk_read_low(ptp-&gt;bp, sts, &amp;low);</div><div class='add'>+	if (rc)</div><div class='ctx'> 		return rc;</div><div class='del'>-	}</div><div class='del'>-	ns = timecounter_cyc2time(&amp;ptp-&gt;tc, cycles);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+</div><div class='add'>+	cycles = bnxt_extend_cycles_32b_to_48b(ptp, low);</div><div class='add'>+	ns = bnxt_timecounter_cyc2time(ptp, cycles);</div><div class='ctx'> 	*ts = ns_to_timespec64(ns);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Caller holds ptp_lock */</div><div class='ctx'> void bnxt_ptp_update_current_time(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='ctx'> </div><div class='ctx'> 	bnxt_refclk_read(ptp-&gt;bp, NULL, &amp;ptp-&gt;current_time);</div><div class='del'>-	WRITE_ONCE(ptp-&gt;old_time, ptp-&gt;current_time);</div><div class='add'>+	WRITE_ONCE(ptp-&gt;old_time, ptp-&gt;current_time &gt;&gt; BNXT_HI_TIMER_SHIFT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnxt_ptp_adjphc(struct bnxt_ptp_cfg *ptp, s64 delta)</div><div class='ctx'> {</div><div class='ctx'> 	struct hwrm_port_mac_cfg_input *req;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	rc = hwrm_req_init(ptp-&gt;bp, req, HWRM_PORT_MAC_CFG);</div><div class='hunk'>@@ -194,9 +223,7 @@ static int bnxt_ptp_adjphc(struct bnxt_ptp_cfg *ptp, s64 delta)</div><div class='ctx'> 	if (rc) {</div><div class='ctx'> 		netdev_err(ptp-&gt;bp-&gt;dev, "ptp adjphc failed. rc = %x\n", rc);</div><div class='ctx'> 	} else {</div><div class='del'>-		spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 		bnxt_ptp_update_current_time(ptp-&gt;bp);</div><div class='del'>-		spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -211,9 +238,9 @@ static int bnxt_ptp_adjtime(struct ptp_clock_info *ptp_info, s64 delta)</div><div class='ctx'> 	if (BNXT_PTP_USE_RTC(ptp-&gt;bp))</div><div class='ctx'> 		return bnxt_ptp_adjphc(ptp, delta);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	write_seqlock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 	timecounter_adjtime(&amp;ptp-&gt;tc, delta);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	write_sequnlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -246,10 +273,10 @@ static int bnxt_ptp_adjfine(struct ptp_clock_info *ptp_info, long scaled_ppm)</div><div class='ctx'> 	if (!BNXT_MH(bp))</div><div class='ctx'> 		return bnxt_ptp_adjfine_rtc(bp, scaled_ppm);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	write_seqlock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 	timecounter_read(&amp;ptp-&gt;tc);</div><div class='ctx'> 	ptp-&gt;cc.mult = adjust_by_scaled_ppm(ptp-&gt;cmult, scaled_ppm);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	write_sequnlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -257,13 +284,10 @@ void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='ctx'> 	struct ptp_clock_event event;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	u64 ns, pps_ts;</div><div class='ctx'> </div><div class='ctx'> 	pps_ts = EVENT_PPS_TS(data2, data1);</div><div class='del'>-	spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='del'>-	ns = timecounter_cyc2time(&amp;ptp-&gt;tc, pps_ts);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	ns = bnxt_timecounter_cyc2time(ptp, pps_ts);</div><div class='ctx'> </div><div class='ctx'> 	switch (EVENT_DATA2_PPS_EVENT_TYPE(data2)) {</div><div class='ctx'> 	case ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_INTERNAL:</div><div class='hunk'>@@ -400,17 +424,13 @@ static int bnxt_get_target_cycles(struct bnxt_ptp_cfg *ptp, u64 target_ns,</div><div class='ctx'> {</div><div class='ctx'> 	u64 cycles_now;</div><div class='ctx'> 	u64 nsec_now, nsec_delta;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 	rc = bnxt_refclk_read(ptp-&gt;bp, NULL, &amp;cycles_now);</div><div class='del'>-	if (rc) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	if (rc)</div><div class='ctx'> 		return rc;</div><div class='del'>-	}</div><div class='del'>-	nsec_now = timecounter_cyc2time(&amp;ptp-&gt;tc, cycles_now);</div><div class='del'>-	spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+</div><div class='add'>+	nsec_now = bnxt_timecounter_cyc2time(ptp, cycles_now);</div><div class='ctx'> </div><div class='ctx'> 	nsec_delta = target_ns - nsec_now;</div><div class='ctx'> 	*cycles_delta = div64_u64(nsec_delta &lt;&lt; ptp-&gt;cc.shift, ptp-&gt;cc.mult);</div><div class='hunk'>@@ -540,10 +560,11 @@ static int bnxt_hwrm_ptp_cfg(struct bnxt *bp)</div><div class='ctx'> 	return bnxt_ptp_cfg_tstamp_filters(bp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+int bnxt_hwtstamp_set(struct net_device *dev,</div><div class='add'>+		      struct kernel_hwtstamp_config *stmpconf,</div><div class='add'>+		      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='del'>-	struct hwtstamp_config stmpconf;</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp;</div><div class='ctx'> 	u16 old_rxctl;</div><div class='ctx'> 	int old_rx_filter, rc;</div><div class='hunk'>@@ -553,17 +574,14 @@ int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 	if (!ptp)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;stmpconf, ifr-&gt;ifr_data, sizeof(stmpconf)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (stmpconf.tx_type != HWTSTAMP_TX_ON &amp;&amp;</div><div class='del'>-	    stmpconf.tx_type != HWTSTAMP_TX_OFF)</div><div class='add'>+	if (stmpconf-&gt;tx_type != HWTSTAMP_TX_ON &amp;&amp;</div><div class='add'>+	    stmpconf-&gt;tx_type != HWTSTAMP_TX_OFF)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='ctx'> 	old_rx_filter = ptp-&gt;rx_filter;</div><div class='ctx'> 	old_rxctl = ptp-&gt;rxctl;</div><div class='ctx'> 	old_tx_tstamp_en = ptp-&gt;tx_tstamp_en;</div><div class='del'>-	switch (stmpconf.rx_filter) {</div><div class='add'>+	switch (stmpconf-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		ptp-&gt;rxctl = 0;</div><div class='ctx'> 		ptp-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='hunk'>@@ -596,7 +614,7 @@ int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (stmpconf.tx_type == HWTSTAMP_TX_ON)</div><div class='add'>+	if (stmpconf-&gt;tx_type == HWTSTAMP_TX_ON)</div><div class='ctx'> 		ptp-&gt;tx_tstamp_en = 1;</div><div class='ctx'> 	else</div><div class='ctx'> 		ptp-&gt;tx_tstamp_en = 0;</div><div class='hunk'>@@ -605,9 +623,8 @@ int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto ts_set_err;</div><div class='ctx'> </div><div class='del'>-	stmpconf.rx_filter = ptp-&gt;rx_filter;</div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;stmpconf, sizeof(stmpconf)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	stmpconf-&gt;rx_filter = ptp-&gt;rx_filter;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> ts_set_err:</div><div class='ctx'> 	ptp-&gt;rx_filter = old_rx_filter;</div><div class='hunk'>@@ -616,22 +633,22 @@ ts_set_err:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int bnxt_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+int bnxt_hwtstamp_get(struct net_device *dev,</div><div class='add'>+		      struct kernel_hwtstamp_config *stmpconf)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='del'>-	struct hwtstamp_config stmpconf;</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp;</div><div class='ctx'> </div><div class='ctx'> 	ptp = bp-&gt;ptp_cfg;</div><div class='ctx'> 	if (!ptp)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	stmpconf.flags = 0;</div><div class='del'>-	stmpconf.tx_type = ptp-&gt;tx_tstamp_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='add'>+	stmpconf-&gt;flags = 0;</div><div class='add'>+	stmpconf-&gt;tx_type = ptp-&gt;tx_tstamp_en ? HWTSTAMP_TX_ON</div><div class='add'>+					      : HWTSTAMP_TX_OFF;</div><div class='ctx'> </div><div class='del'>-	stmpconf.rx_filter = ptp-&gt;rx_filter;</div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;stmpconf, sizeof(stmpconf)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	stmpconf-&gt;rx_filter = ptp-&gt;rx_filter;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bnxt_map_regs(struct bnxt *bp, u32 *reg_arr, int count, int reg_win)</div><div class='hunk'>@@ -682,12 +699,12 @@ static void bnxt_unmap_ptp_regs(struct bnxt *bp)</div><div class='ctx'> 		  (BNXT_PTP_GRC_WIN - 1) * 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 bnxt_cc_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 bnxt_cc_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = container_of(cc, struct bnxt_ptp_cfg, cc);</div><div class='ctx'> 	u64 ns = 0;</div><div class='ctx'> </div><div class='del'>-	bnxt_refclk_read(ptp-&gt;bp, NULL, &amp;ns);</div><div class='add'>+	__bnxt_refclk_read(ptp-&gt;bp, NULL, &amp;ns);</div><div class='ctx'> 	return ns;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -697,7 +714,6 @@ static int bnxt_stamp_tx_skb(struct bnxt *bp, int slot)</div><div class='ctx'> 	struct skb_shared_hwtstamps timestamp;</div><div class='ctx'> 	struct bnxt_ptp_tx_req *txts_req;</div><div class='ctx'> 	unsigned long now = jiffies;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	u64 ts = 0, ns = 0;</div><div class='ctx'> 	u32 tmo = 0;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -711,9 +727,7 @@ static int bnxt_stamp_tx_skb(struct bnxt *bp, int slot)</div><div class='ctx'> 				     tmo, slot);</div><div class='ctx'> 	if (!rc) {</div><div class='ctx'> 		memset(&amp;timestamp, 0, sizeof(timestamp));</div><div class='del'>-		spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='del'>-		ns = timecounter_cyc2time(&amp;ptp-&gt;tc, ts);</div><div class='del'>-		spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+		ns = bnxt_timecounter_cyc2time(ptp, ts);</div><div class='ctx'> 		timestamp.hwtstamp = ns_to_ktime(ns);</div><div class='ctx'> 		skb_tstamp_tx(txts_req-&gt;tx_skb, &amp;timestamp);</div><div class='ctx'> 		ptp-&gt;stats.ts_pkts++;</div><div class='hunk'>@@ -767,9 +781,9 @@ next_slot:</div><div class='ctx'> 	bnxt_ptp_get_current_time(bp);</div><div class='ctx'> 	ptp-&gt;next_period = now + HZ;</div><div class='ctx'> 	if (time_after_eq(now, ptp-&gt;next_overflow_check)) {</div><div class='del'>-		spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+		write_seqlock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 		timecounter_read(&amp;ptp-&gt;tc);</div><div class='del'>-		spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+		write_sequnlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 		ptp-&gt;next_overflow_check = now + BNXT_PHC_OVERFLOW_PERIOD;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (rc == -EAGAIN)</div><div class='hunk'>@@ -777,6 +791,27 @@ next_slot:</div><div class='ctx'> 	return HZ;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void bnxt_ptp_free_txts_skbs(struct bnxt_ptp_cfg *ptp)</div><div class='add'>+{</div><div class='add'>+	struct bnxt_ptp_tx_req *txts_req;</div><div class='add'>+	u16 cons = ptp-&gt;txts_cons;</div><div class='add'>+</div><div class='add'>+	/* make sure ptp aux worker finished with</div><div class='add'>+	 * possible BNXT_STATE_OPEN set</div><div class='add'>+	 */</div><div class='add'>+	ptp_cancel_worker_sync(ptp-&gt;ptp_clock);</div><div class='add'>+</div><div class='add'>+	ptp-&gt;tx_avail = BNXT_MAX_TX_TS;</div><div class='add'>+	while (cons != ptp-&gt;txts_prod) {</div><div class='add'>+		txts_req = &amp;ptp-&gt;txts_req[cons];</div><div class='add'>+		if (!IS_ERR_OR_NULL(txts_req-&gt;tx_skb))</div><div class='add'>+			dev_kfree_skb_any(txts_req-&gt;tx_skb);</div><div class='add'>+		cons = NEXT_TXTS(cons);</div><div class='add'>+	}</div><div class='add'>+	ptp-&gt;txts_cons = cons;</div><div class='add'>+	ptp_schedule_worker(ptp-&gt;ptp_clock, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int bnxt_ptp_get_txts_prod(struct bnxt_ptp_cfg *ptp, u16 *prod)</div><div class='ctx'> {</div><div class='ctx'> 	spin_lock_bh(&amp;ptp-&gt;ptp_tx_lock);</div><div class='hunk'>@@ -808,15 +843,11 @@ void bnxt_get_tx_ts_p5(struct bnxt *bp, struct sk_buff *skb, u16 prod)</div><div class='ctx'> int bnxt_get_rx_ts_p5(struct bnxt *bp, u64 *ts, u32 pkt_ts)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='del'>-	u64 time;</div><div class='ctx'> </div><div class='ctx'> 	if (!ptp)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	BNXT_READ_TIME64(ptp, time, ptp-&gt;old_time);</div><div class='del'>-	*ts = (time &amp; BNXT_HI_TIMER_MASK) | pkt_ts;</div><div class='del'>-	if (pkt_ts &lt; (time &amp; BNXT_LO_TIMER_MASK))</div><div class='del'>-		*ts += BNXT_LO_TIMER_MASK + 1;</div><div class='add'>+	*ts = bnxt_extend_cycles_32b_to_48b(ptp, pkt_ts);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -829,7 +860,6 @@ void bnxt_tx_ts_cmp(struct bnxt *bp, struct bnxt_napi *bnapi,</div><div class='ctx'> 	u32 opaque = tscmp-&gt;tx_ts_cmp_opaque;</div><div class='ctx'> 	struct bnxt_tx_ring_info *txr;</div><div class='ctx'> 	struct bnxt_sw_tx_bd *tx_buf;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	u64 ts, ns;</div><div class='ctx'> 	u16 cons;</div><div class='ctx'> </div><div class='hunk'>@@ -844,9 +874,7 @@ void bnxt_tx_ts_cmp(struct bnxt *bp, struct bnxt_napi *bnapi,</div><div class='ctx'> 				   le32_to_cpu(tscmp-&gt;tx_ts_cmp_flags_type),</div><div class='ctx'> 				   le32_to_cpu(tscmp-&gt;tx_ts_cmp_errors_v));</div><div class='ctx'> 		} else {</div><div class='del'>-			spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='del'>-			ns = timecounter_cyc2time(&amp;ptp-&gt;tc, ts);</div><div class='del'>-			spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+			ns = bnxt_timecounter_cyc2time(ptp, ts);</div><div class='ctx'> 			timestamp.hwtstamp = ns_to_ktime(ns);</div><div class='ctx'> 			skb_tstamp_tx(tx_buf-&gt;skb, &amp;timestamp);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -924,7 +952,6 @@ static int bnxt_ptp_pps_init(struct bnxt *bp)</div><div class='ctx'> 		snprintf(ptp_info-&gt;pin_config[i].name,</div><div class='ctx'> 			 sizeof(ptp_info-&gt;pin_config[i].name), "bnxt_pps%d", i);</div><div class='ctx'> 		ptp_info-&gt;pin_config[i].index = i;</div><div class='del'>-		ptp_info-&gt;pin_config[i].chan = i;</div><div class='ctx'> 		if (*pin_usg == BNXT_PPS_PIN_PPS_IN)</div><div class='ctx'> 			ptp_info-&gt;pin_config[i].func = PTP_PF_EXTTS;</div><div class='ctx'> 		else if (*pin_usg == BNXT_PPS_PIN_PPS_OUT)</div><div class='hunk'>@@ -941,6 +968,8 @@ static int bnxt_ptp_pps_init(struct bnxt *bp)</div><div class='ctx'> 	ptp_info-&gt;n_per_out = 1;</div><div class='ctx'> 	ptp_info-&gt;pps = 1;</div><div class='ctx'> 	ptp_info-&gt;verify = bnxt_ptp_verify;</div><div class='add'>+	ptp_info-&gt;supported_extts_flags = PTP_RISING_EDGE | PTP_STRICT_FLAGS;</div><div class='add'>+	ptp_info-&gt;supported_perout_flags = PTP_PEROUT_DUTY_CYCLE;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -955,6 +984,7 @@ static bool bnxt_pps_config_ok(struct bnxt *bp)</div><div class='ctx'> static void bnxt_ptp_timecounter_init(struct bnxt *bp, bool init_tc)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!ptp-&gt;ptp_clock) {</div><div class='ctx'> 		memset(&amp;ptp-&gt;cc, 0, sizeof(ptp-&gt;cc));</div><div class='hunk'>@@ -971,8 +1001,11 @@ static void bnxt_ptp_timecounter_init(struct bnxt *bp, bool init_tc)</div><div class='ctx'> 		}</div><div class='ctx'> 		ptp-&gt;next_overflow_check = jiffies + BNXT_PHC_OVERFLOW_PERIOD;</div><div class='ctx'> 	}</div><div class='del'>-	if (init_tc)</div><div class='add'>+	if (init_tc) {</div><div class='add'>+		write_seqlock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 		timecounter_init(&amp;ptp-&gt;tc, &amp;ptp-&gt;cc, ktime_to_ns(ktime_get_real()));</div><div class='add'>+		write_sequnlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Caller holds ptp_lock */</div><div class='hunk'>@@ -1005,9 +1038,9 @@ int bnxt_ptp_init_rtc(struct bnxt *bp, bool phc_cfg)</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			return rc;</div><div class='ctx'> 	}</div><div class='del'>-	spin_lock_irqsave(&amp;bp-&gt;ptp_cfg-&gt;ptp_lock, flags);</div><div class='add'>+	write_seqlock_irqsave(&amp;bp-&gt;ptp_cfg-&gt;ptp_lock, flags);</div><div class='ctx'> 	bnxt_ptp_rtc_timecounter_init(bp-&gt;ptp_cfg, ns);</div><div class='del'>-	spin_unlock_irqrestore(&amp;bp-&gt;ptp_cfg-&gt;ptp_lock, flags);</div><div class='add'>+	write_sequnlock_irqrestore(&amp;bp-&gt;ptp_cfg-&gt;ptp_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1019,12 +1052,12 @@ static void bnxt_ptp_free(struct bnxt *bp)</div><div class='ctx'> 	if (ptp-&gt;ptp_clock) {</div><div class='ctx'> 		ptp_clock_unregister(ptp-&gt;ptp_clock);</div><div class='ctx'> 		ptp-&gt;ptp_clock = NULL;</div><div class='del'>-		kfree(ptp-&gt;ptp_info.pin_config);</div><div class='del'>-		ptp-&gt;ptp_info.pin_config = NULL;</div><div class='ctx'> 	}</div><div class='add'>+	kfree(ptp-&gt;ptp_info.pin_config);</div><div class='add'>+	ptp-&gt;ptp_info.pin_config = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg)</div><div class='add'>+int bnxt_ptp_init(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -1042,12 +1075,12 @@ int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg)</div><div class='ctx'> 	bnxt_ptp_free(bp);</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(ptp-&gt;tx_avail, BNXT_MAX_TX_TS);</div><div class='del'>-	spin_lock_init(&amp;ptp-&gt;ptp_lock);</div><div class='add'>+	seqlock_init(&amp;ptp-&gt;ptp_lock);</div><div class='ctx'> 	spin_lock_init(&amp;ptp-&gt;ptp_tx_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (BNXT_PTP_USE_RTC(bp)) {</div><div class='ctx'> 		bnxt_ptp_timecounter_init(bp, false);</div><div class='del'>-		rc = bnxt_ptp_init_rtc(bp, phc_cfg);</div><div class='add'>+		rc = bnxt_ptp_init_rtc(bp, ptp-&gt;rtc_configured);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1075,12 +1108,8 @@ int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg)</div><div class='ctx'> 	atomic64_set(&amp;ptp-&gt;stats.ts_err, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (bp-&gt;flags &amp; BNXT_FLAG_CHIP_P5_PLUS) {</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-		spin_lock_irqsave(&amp;ptp-&gt;ptp_lock, flags);</div><div class='ctx'> 		bnxt_refclk_read(bp, NULL, &amp;ptp-&gt;current_time);</div><div class='del'>-		WRITE_ONCE(ptp-&gt;old_time, ptp-&gt;current_time);</div><div class='del'>-		spin_unlock_irqrestore(&amp;ptp-&gt;ptp_lock, flags);</div><div class='add'>+		WRITE_ONCE(ptp-&gt;old_time, ptp-&gt;current_time &gt;&gt; BNXT_HI_TIMER_SHIFT);</div><div class='ctx'> 		ptp_schedule_worker(ptp-&gt;ptp_clock, 0);</div><div class='ctx'> 	}</div><div class='ctx'> 	ptp-&gt;txts_tmo = BNXT_PTP_DFLT_TX_TMO;</div><div class='hunk'>@@ -1095,7 +1124,6 @@ out:</div><div class='ctx'> void bnxt_ptp_clear(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_ptp_cfg *ptp = bp-&gt;ptp_cfg;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!ptp)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1107,12 +1135,5 @@ void bnxt_ptp_clear(struct bnxt *bp)</div><div class='ctx'> 	kfree(ptp-&gt;ptp_info.pin_config);</div><div class='ctx'> 	ptp-&gt;ptp_info.pin_config = NULL;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; BNXT_MAX_TX_TS; i++) {</div><div class='del'>-		if (ptp-&gt;txts_req[i].tx_skb) {</div><div class='del'>-			dev_kfree_skb_any(ptp-&gt;txts_req[i].tx_skb);</div><div class='del'>-			ptp-&gt;txts_req[i].tx_skb = NULL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	bnxt_unmap_ptp_regs(bp);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h<br/>index f322466ecad3..8cc2fae47644 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #define BNXT_DEVCLK_FREQ	1000000</div><div class='ctx'> #define BNXT_LO_TIMER_MASK	0x0000ffffffffUL</div><div class='ctx'> #define BNXT_HI_TIMER_MASK	0xffff00000000UL</div><div class='add'>+#define BNXT_HI_TIMER_SHIFT	24</div><div class='ctx'> </div><div class='ctx'> #define BNXT_PTP_DFLT_TX_TMO	1000 /* ms */</div><div class='ctx'> #define BNXT_PTP_QTS_TIMEOUT	1000</div><div class='hunk'>@@ -102,14 +103,15 @@ struct bnxt_ptp_cfg {</div><div class='ctx'> 	struct timecounter	tc;</div><div class='ctx'> 	struct bnxt_pps		pps_info;</div><div class='ctx'> 	/* serialize timecounter access */</div><div class='del'>-	spinlock_t		ptp_lock;</div><div class='add'>+	seqlock_t		ptp_lock;</div><div class='ctx'> 	/* serialize ts tx request queuing */</div><div class='ctx'> 	spinlock_t		ptp_tx_lock;</div><div class='ctx'> 	u64			current_time;</div><div class='del'>-	u64			old_time;</div><div class='ctx'> 	unsigned long		next_period;</div><div class='ctx'> 	unsigned long		next_overflow_check;</div><div class='ctx'> 	u32			cmult;</div><div class='add'>+	/* cache of upper 24 bits of cyclecoutner. 8 bits are used to check for roll-over */</div><div class='add'>+	u32			old_time;</div><div class='ctx'> 	/* a 23b shift cyclecounter will overflow in ~36 mins.  Check overflow every 18 mins. */</div><div class='ctx'> 	#define BNXT_PHC_OVERFLOW_PERIOD	(18 * 60 * HZ)</div><div class='ctx'> </div><div class='hunk'>@@ -133,6 +135,7 @@ struct bnxt_ptp_cfg {</div><div class='ctx'> 					 BNXT_PTP_MSG_PDELAY_REQ |	\</div><div class='ctx'> 					 BNXT_PTP_MSG_PDELAY_RESP)</div><div class='ctx'> 	u8			tx_tstamp_en:1;</div><div class='add'>+	u8			rtc_configured:1;</div><div class='ctx'> 	int			rx_filter;</div><div class='ctx'> 	u32			tstamp_filters;</div><div class='ctx'> </div><div class='hunk'>@@ -145,20 +148,6 @@ struct bnxt_ptp_cfg {</div><div class='ctx'> 	struct bnxt_ptp_stats	stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#if BITS_PER_LONG == 32</div><div class='del'>-#define BNXT_READ_TIME64(ptp, dst, src)				\</div><div class='del'>-do {								\</div><div class='del'>-	unsigned long flags;					\</div><div class='del'>-								\</div><div class='del'>-	spin_lock_irqsave(&amp;(ptp)-&gt;ptp_lock, flags);		\</div><div class='del'>-	(dst) = (src);						\</div><div class='del'>-	spin_unlock_irqrestore(&amp;(ptp)-&gt;ptp_lock, flags);	\</div><div class='del'>-} while (0)</div><div class='del'>-#else</div><div class='del'>-#define BNXT_READ_TIME64(ptp, dst, src)		\</div><div class='del'>-	((dst) = READ_ONCE(src))</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define BNXT_PTP_INC_TX_AVAIL(ptp)		\</div><div class='ctx'> do {						\</div><div class='ctx'> 	spin_lock_bh(&amp;(ptp)-&gt;ptp_tx_lock);	\</div><div class='hunk'>@@ -171,8 +160,12 @@ void bnxt_ptp_update_current_time(struct bnxt *bp);</div><div class='ctx'> void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2);</div><div class='ctx'> int bnxt_ptp_cfg_tstamp_filters(struct bnxt *bp);</div><div class='ctx'> void bnxt_ptp_reapply_pps(struct bnxt *bp);</div><div class='del'>-int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr);</div><div class='del'>-int bnxt_hwtstamp_get(struct net_device *dev, struct ifreq *ifr);</div><div class='add'>+int bnxt_hwtstamp_set(struct net_device *dev,</div><div class='add'>+		      struct kernel_hwtstamp_config *stmpconf,</div><div class='add'>+		      struct netlink_ext_ack *extack);</div><div class='add'>+int bnxt_hwtstamp_get(struct net_device *dev,</div><div class='add'>+		      struct kernel_hwtstamp_config *stmpconf);</div><div class='add'>+void bnxt_ptp_free_txts_skbs(struct bnxt_ptp_cfg *ptp);</div><div class='ctx'> int bnxt_ptp_get_txts_prod(struct bnxt_ptp_cfg *ptp, u16 *prod);</div><div class='ctx'> void bnxt_get_tx_ts_p5(struct bnxt *bp, struct sk_buff *skb, u16 prod);</div><div class='ctx'> int bnxt_get_rx_ts_p5(struct bnxt *bp, u64 *ts, u32 pkt_ts);</div><div class='hunk'>@@ -180,6 +173,29 @@ void bnxt_tx_ts_cmp(struct bnxt *bp, struct bnxt_napi *bnapi,</div><div class='ctx'> 		    struct tx_ts_cmp *tscmp);</div><div class='ctx'> void bnxt_ptp_rtc_timecounter_init(struct bnxt_ptp_cfg *ptp, u64 ns);</div><div class='ctx'> int bnxt_ptp_init_rtc(struct bnxt *bp, bool phc_cfg);</div><div class='del'>-int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg);</div><div class='add'>+int bnxt_ptp_init(struct bnxt *bp);</div><div class='ctx'> void bnxt_ptp_clear(struct bnxt *bp);</div><div class='add'>+static inline u64 bnxt_timecounter_cyc2time(struct bnxt_ptp_cfg *ptp, u64 ts)</div><div class='add'>+{</div><div class='add'>+	unsigned int seq;</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		seq = read_seqbegin(&amp;ptp-&gt;ptp_lock);</div><div class='add'>+		ns = timecounter_cyc2time(&amp;ptp-&gt;tc, ts);</div><div class='add'>+	} while (read_seqretry(&amp;ptp-&gt;ptp_lock, seq));</div><div class='add'>+</div><div class='add'>+	return ns;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 bnxt_extend_cycles_32b_to_48b(struct bnxt_ptp_cfg *ptp, u32 ts)</div><div class='add'>+{</div><div class='add'>+	u64 time, cycles;</div><div class='add'>+</div><div class='add'>+	time = (u64)READ_ONCE(ptp-&gt;old_time) &lt;&lt; BNXT_HI_TIMER_SHIFT;</div><div class='add'>+	cycles = (time &amp; BNXT_HI_TIMER_MASK) | ts;</div><div class='add'>+	if (ts &lt; (time &amp; BNXT_LO_TIMER_MASK))</div><div class='add'>+		cycles += BNXT_LO_TIMER_MASK + 1;</div><div class='add'>+	return cycles;</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c<br/>index 7bb8a5d74430..be7deb9cc410 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;net/dcbnl.h&gt;</div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_ulp.h"</div><div class='hunk'>@@ -332,6 +332,38 @@ int bnxt_set_vf_bw(struct net_device *dev, int vf_id, int min_tx_rate,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bnxt_set_vf_link_admin_state(struct bnxt *bp, int vf_id)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_cfg_input *req;</div><div class='add'>+	struct bnxt_vf_info *vf;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!(bp-&gt;fw_cap &amp; BNXT_FW_CAP_LINK_ADMIN))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vf = &amp;bp-&gt;pf.vf[vf_id];</div><div class='add'>+</div><div class='add'>+	rc = bnxt_hwrm_func_cfg_short_req_init(bp, &amp;req);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	req-&gt;fid = cpu_to_le16(vf-&gt;fw_fid);</div><div class='add'>+	switch (vf-&gt;flags &amp; (BNXT_VF_LINK_FORCED | BNXT_VF_LINK_UP)) {</div><div class='add'>+	case BNXT_VF_LINK_FORCED:</div><div class='add'>+		req-&gt;options =</div><div class='add'>+			FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_FORCED_DOWN;</div><div class='add'>+		break;</div><div class='add'>+	case (BNXT_VF_LINK_FORCED | BNXT_VF_LINK_UP):</div><div class='add'>+		req-&gt;options = FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_FORCED_UP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		req-&gt;options = FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_AUTO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	req-&gt;enables = cpu_to_le32(FUNC_CFG_REQ_ENABLES_ADMIN_LINK_STATE);</div><div class='add'>+	return hwrm_req_send(bp, req);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int bnxt_set_vf_link_state(struct net_device *dev, int vf_id, int link)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='hunk'>@@ -357,10 +389,11 @@ int bnxt_set_vf_link_state(struct net_device *dev, int vf_id, int link)</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		netdev_err(bp-&gt;dev, "Invalid link option\n");</div><div class='del'>-		rc = -EINVAL;</div><div class='del'>-		break;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	if (vf-&gt;flags &amp; (BNXT_VF_LINK_UP | BNXT_VF_LINK_FORCED))</div><div class='add'>+	if (bp-&gt;fw_cap &amp; BNXT_FW_CAP_LINK_ADMIN)</div><div class='add'>+		rc = bnxt_set_vf_link_admin_state(bp, vf_id);</div><div class='add'>+	else if (vf-&gt;flags &amp; (BNXT_VF_LINK_UP | BNXT_VF_LINK_FORCED))</div><div class='ctx'> 		rc = bnxt_hwrm_fwd_async_event_cmpl(bp, vf,</div><div class='ctx'> 			ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE);</div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -520,6 +553,63 @@ static int __bnxt_set_vf_params(struct bnxt *bp, int vf_id)</div><div class='ctx'> 	return hwrm_req_send(bp, req);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bnxt_hwrm_roce_sriov_cfg(struct bnxt *bp, int num_vfs)</div><div class='add'>+{</div><div class='add'>+	struct hwrm_func_qcaps_output *resp;</div><div class='add'>+	struct hwrm_func_cfg_input *cfg_req;</div><div class='add'>+	struct hwrm_func_qcaps_input *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_req_init(bp, req, HWRM_FUNC_QCAPS);</div><div class='add'>+	if (rc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	req-&gt;fid = cpu_to_le16(0xffff);</div><div class='add'>+	resp = hwrm_req_hold(bp, req);</div><div class='add'>+	rc = hwrm_req_send(bp, req);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	rc = hwrm_req_init(bp, cfg_req, HWRM_FUNC_CFG);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* In case of VF Dynamic resource allocation, driver will provision</div><div class='add'>+	 * maximum resources to all the VFs. FW will dynamically allocate</div><div class='add'>+	 * resources to VFs on the fly, so always divide the resources by 1.</div><div class='add'>+	 */</div><div class='add'>+	if (BNXT_ROCE_VF_DYN_ALLOC_CAP(bp))</div><div class='add'>+		num_vfs = 1;</div><div class='add'>+</div><div class='add'>+	cfg_req-&gt;fid = cpu_to_le16(0xffff);</div><div class='add'>+	cfg_req-&gt;enables2 =</div><div class='add'>+		cpu_to_le32(FUNC_CFG_REQ_ENABLES2_ROCE_MAX_AV_PER_VF |</div><div class='add'>+			    FUNC_CFG_REQ_ENABLES2_ROCE_MAX_CQ_PER_VF |</div><div class='add'>+			    FUNC_CFG_REQ_ENABLES2_ROCE_MAX_MRW_PER_VF |</div><div class='add'>+			    FUNC_CFG_REQ_ENABLES2_ROCE_MAX_QP_PER_VF |</div><div class='add'>+			    FUNC_CFG_REQ_ENABLES2_ROCE_MAX_SRQ_PER_VF |</div><div class='add'>+			    FUNC_CFG_REQ_ENABLES2_ROCE_MAX_GID_PER_VF);</div><div class='add'>+	cfg_req-&gt;roce_max_av_per_vf =</div><div class='add'>+		cpu_to_le32(le32_to_cpu(resp-&gt;roce_vf_max_av) / num_vfs);</div><div class='add'>+	cfg_req-&gt;roce_max_cq_per_vf =</div><div class='add'>+		cpu_to_le32(le32_to_cpu(resp-&gt;roce_vf_max_cq) / num_vfs);</div><div class='add'>+	cfg_req-&gt;roce_max_mrw_per_vf =</div><div class='add'>+		cpu_to_le32(le32_to_cpu(resp-&gt;roce_vf_max_mrw) / num_vfs);</div><div class='add'>+	cfg_req-&gt;roce_max_qp_per_vf =</div><div class='add'>+		cpu_to_le32(le32_to_cpu(resp-&gt;roce_vf_max_qp) / num_vfs);</div><div class='add'>+	cfg_req-&gt;roce_max_srq_per_vf =</div><div class='add'>+		cpu_to_le32(le32_to_cpu(resp-&gt;roce_vf_max_srq) / num_vfs);</div><div class='add'>+	cfg_req-&gt;roce_max_gid_per_vf =</div><div class='add'>+		cpu_to_le32(le32_to_cpu(resp-&gt;roce_vf_max_gid) / num_vfs);</div><div class='add'>+</div><div class='add'>+	rc = hwrm_req_send(bp, cfg_req);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	hwrm_req_drop(bp, req);</div><div class='add'>+	if (rc)</div><div class='add'>+		netdev_err(bp-&gt;dev, "RoCE sriov configuration failed\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Only called by PF to reserve resources for VFs, returns actual number of</div><div class='ctx'>  * VFs configured, or &lt; 0 on error.</div><div class='ctx'>  */</div><div class='hunk'>@@ -609,15 +699,21 @@ static int bnxt_hwrm_func_vf_resc_cfg(struct bnxt *bp, int num_vfs, bool reset)</div><div class='ctx'> </div><div class='ctx'> 	hwrm_req_hold(bp, req);</div><div class='ctx'> 	for (i = 0; i &lt; num_vfs; i++) {</div><div class='add'>+		struct bnxt_vf_info *vf = &amp;pf-&gt;vf[i];</div><div class='add'>+</div><div class='add'>+		vf-&gt;fw_fid = pf-&gt;first_vf_id + i;</div><div class='add'>+		rc = bnxt_set_vf_link_admin_state(bp, i);</div><div class='add'>+		if (rc)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		if (reset)</div><div class='ctx'> 			__bnxt_set_vf_params(bp, i);</div><div class='ctx'> </div><div class='del'>-		req-&gt;vf_id = cpu_to_le16(pf-&gt;first_vf_id + i);</div><div class='add'>+		req-&gt;vf_id = cpu_to_le16(vf-&gt;fw_fid);</div><div class='ctx'> 		rc = hwrm_req_send(bp, req);</div><div class='ctx'> 		if (rc)</div><div class='ctx'> 			break;</div><div class='ctx'> 		pf-&gt;active_vfs = i + 1;</div><div class='del'>-		pf-&gt;vf[i].fw_fid = pf-&gt;first_vf_id + i;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pf-&gt;active_vfs) {</div><div class='hunk'>@@ -684,7 +780,13 @@ static int bnxt_hwrm_func_cfg(struct bnxt *bp, int num_vfs)</div><div class='ctx'> 				   FUNC_CFG_REQ_ENABLES_NUM_VNICS |</div><div class='ctx'> 				   FUNC_CFG_REQ_ENABLES_NUM_HW_RING_GRPS);</div><div class='ctx'> </div><div class='del'>-	mtu = bp-&gt;dev-&gt;mtu + ETH_HLEN + VLAN_HLEN;</div><div class='add'>+	if (bp-&gt;fw_cap &amp; BNXT_FW_CAP_LINK_ADMIN) {</div><div class='add'>+		req-&gt;options = FUNC_CFG_REQ_OPTIONS_LINK_ADMIN_STATE_AUTO;</div><div class='add'>+		req-&gt;enables |=</div><div class='add'>+			cpu_to_le32(FUNC_CFG_REQ_ENABLES_ADMIN_LINK_STATE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mtu = bp-&gt;dev-&gt;mtu + VLAN_ETH_HLEN;</div><div class='ctx'> 	req-&gt;mru = cpu_to_le16(mtu);</div><div class='ctx'> 	req-&gt;admin_mtu = cpu_to_le16(mtu);</div><div class='ctx'> </div><div class='hunk'>@@ -759,6 +861,9 @@ int bnxt_cfg_hw_sriov(struct bnxt *bp, int *num_vfs, bool reset)</div><div class='ctx'> 		*num_vfs = rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (BNXT_RDMA_SRIOV_EN(bp) &amp;&amp; BNXT_ROCE_VF_RESC_CAP(bp))</div><div class='add'>+		bnxt_hwrm_roce_sriov_cfg(bp, *num_vfs);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -770,7 +875,7 @@ static int bnxt_sriov_enable(struct bnxt *bp, int *num_vfs)</div><div class='ctx'> 	int tx_ok = 0, rx_ok = 0, rss_ok = 0;</div><div class='ctx'> 	int avail_cp, avail_stat;</div><div class='ctx'> </div><div class='del'>-	/* Check if we can enable requested num of vf's. At a mininum</div><div class='add'>+	/* Check if we can enable requested num of vf's. At a minimum</div><div class='ctx'> 	 * we require 1 RX 1 TX rings for each VF. In this minimum conf</div><div class='ctx'> 	 * features like TPA will not be available.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -866,7 +971,7 @@ err_out1:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bnxt_sriov_disable(struct bnxt *bp)</div><div class='add'>+void __bnxt_sriov_disable(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	u16 num_vfs = pci_num_vf(bp-&gt;pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -890,10 +995,20 @@ void bnxt_sriov_disable(struct bnxt *bp)</div><div class='ctx'> 	devl_unlock(bp-&gt;dl);</div><div class='ctx'> </div><div class='ctx'> 	bnxt_free_vf_resources(bp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bnxt_sriov_disable(struct bnxt *bp)</div><div class='add'>+{</div><div class='add'>+	if (!pci_num_vf(bp-&gt;pdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	__bnxt_sriov_disable(bp);</div><div class='ctx'> </div><div class='ctx'> 	/* Reclaim all resources for the PF. */</div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(bp-&gt;dev);</div><div class='ctx'> 	bnxt_restore_pf_fw_resources(bp);</div><div class='add'>+	netdev_unlock(bp-&gt;dev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -903,17 +1018,21 @@ int bnxt_sriov_configure(struct pci_dev *pdev, int num_vfs)</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	if (!netif_running(dev)) {</div><div class='ctx'> 		netdev_warn(dev, "Reject SRIOV config request since if is down!\n");</div><div class='add'>+		netdev_unlock(dev);</div><div class='ctx'> 		rtnl_unlock();</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (test_bit(BNXT_STATE_IN_FW_RESET, &amp;bp-&gt;state)) {</div><div class='ctx'> 		netdev_warn(dev, "Reject SRIOV config request when FW reset is in progress\n");</div><div class='add'>+		netdev_unlock(dev);</div><div class='ctx'> 		rtnl_unlock();</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	bp-&gt;sriov_cfg = true;</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	if (pci_vfs_assigned(bp-&gt;pdev)) {</div><div class='hunk'>@@ -1066,7 +1185,7 @@ static int bnxt_vf_validate_set_mac(struct bnxt *bp, struct bnxt_vf_info *vf)</div><div class='ctx'> 		/* There are two cases:</div><div class='ctx'> 		 * 1.If firmware spec &lt; 0x10202,VF MAC address is not forwarded</div><div class='ctx'> 		 *   to the PF and so it doesn't have to match</div><div class='del'>-		 * 2.Allow VF to modify it's own MAC when PF has not assigned a</div><div class='add'>+		 * 2.Allow VF to modify its own MAC when PF has not assigned a</div><div class='ctx'> 		 *   valid MAC address and firmware spec &gt;= 0x10202</div><div class='ctx'> 		 */</div><div class='ctx'> 		mac_ok = true;</div><div class='hunk'>@@ -1262,7 +1381,7 @@ int bnxt_cfg_hw_sriov(struct bnxt *bp, int *num_vfs, bool reset)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bnxt_sriov_disable(struct bnxt *bp)</div><div class='add'>+void __bnxt_sriov_disable(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h<br/>index 9a4bacba477b..e4979d729312 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h</a></div><div class='hunk'>@@ -38,7 +38,7 @@ bool bnxt_is_trusted_vf(struct bnxt *bp, struct bnxt_vf_info *vf);</div><div class='ctx'> int bnxt_set_vf_trust(struct net_device *dev, int vf_id, bool trust);</div><div class='ctx'> int bnxt_sriov_configure(struct pci_dev *pdev, int num_vfs);</div><div class='ctx'> int bnxt_cfg_hw_sriov(struct bnxt *bp, int *num_vfs, bool reset);</div><div class='del'>-void bnxt_sriov_disable(struct bnxt *);</div><div class='add'>+void __bnxt_sriov_disable(struct bnxt *bp);</div><div class='ctx'> void bnxt_hwrm_exec_fwd_req(struct bnxt *);</div><div class='ctx'> void bnxt_update_vf_mac(struct bnxt *);</div><div class='ctx'> int bnxt_approve_mac(struct bnxt *, const u8 *, bool);</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c<br/>index d2ca90407cce..2d66bf59cd64 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c</a></div><div class='hunk'>@@ -19,8 +19,8 @@</div><div class='ctx'> #include &lt;net/tc_act/tc_pedit.h&gt;</div><div class='ctx'> #include &lt;net/tc_act/tc_tunnel_key.h&gt;</div><div class='ctx'> #include &lt;net/vxlan.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "bnxt_hsi.h"</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_sriov.h"</div><div class='hunk'>@@ -244,7 +244,7 @@ bnxt_tc_parse_pedit(struct bnxt *bp, struct bnxt_tc_actions *actions,</div><div class='ctx'> 			   offset &lt; offset_of_ip6_daddr + 16) {</div><div class='ctx'> 			actions-&gt;nat.src_xlate = false;</div><div class='ctx'> 			idx = (offset - offset_of_ip6_daddr) / 4;</div><div class='del'>-			actions-&gt;nat.l3.ipv6.saddr.s6_addr32[idx] = htonl(val);</div><div class='add'>+			actions-&gt;nat.l3.ipv6.daddr.s6_addr32[idx] = htonl(val);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			netdev_err(bp-&gt;dev,</div><div class='ctx'> 				   "%s: IPv6_hdr: Invalid pedit field\n",</div><div class='hunk'>@@ -1316,7 +1316,7 @@ static int bnxt_tc_get_decap_handle(struct bnxt *bp, struct bnxt_tc_flow *flow,</div><div class='ctx'> </div><div class='ctx'> 	/* Check if there's another flow using the same tunnel decap.</div><div class='ctx'> 	 * If not, add this tunnel to the table and resolve the other</div><div class='del'>-	 * tunnel header fileds. Ignore src_port in the tunnel_key,</div><div class='add'>+	 * tunnel header fields. Ignore src_port in the tunnel_key,</div><div class='ctx'> 	 * since it is not required for decap filters.</div><div class='ctx'> 	 */</div><div class='ctx'> 	decap_key-&gt;tp_src = 0;</div><div class='hunk'>@@ -1410,7 +1410,7 @@ static int bnxt_tc_get_encap_handle(struct bnxt *bp, struct bnxt_tc_flow *flow,</div><div class='ctx'> </div><div class='ctx'> 	/* Check if there's another flow using the same tunnel encap.</div><div class='ctx'> 	 * If not, add this tunnel to the table and resolve the other</div><div class='del'>-	 * tunnel header fileds</div><div class='add'>+	 * tunnel header fields</div><div class='ctx'> 	 */</div><div class='ctx'> 	encap_node = bnxt_tc_get_tunnel_node(bp, &amp;tc_info-&gt;encap_table,</div><div class='ctx'> 					     &amp;tc_info-&gt;encap_ht_params,</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c<br/>index fdd6356f21ef..927971c362f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c</a></div><div class='hunk'>@@ -20,8 +20,9 @@</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> #include &lt;linux/bitmap.h&gt;</div><div class='ctx'> #include &lt;linux/auxiliary_bus.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "bnxt_hsi.h"</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_ulp.h"</div><div class='hunk'>@@ -99,6 +100,12 @@ void bnxt_set_dflt_ulp_stat_ctxs(struct bnxt *bp)</div><div class='ctx'> 		if (BNXT_PF(bp) &amp;&amp; !bp-&gt;pf.port_id &amp;&amp;</div><div class='ctx'> 		    bp-&gt;port_count &gt; 1)</div><div class='ctx'> 			bp-&gt;edev-&gt;ulp_num_ctxs++;</div><div class='add'>+</div><div class='add'>+		/* Reserve one additional stat_ctx when the device is capable</div><div class='add'>+		 * of supporting port mirroring on RDMA device.</div><div class='add'>+		 */</div><div class='add'>+		if (BNXT_MIRROR_ON_ROCE_CAP(bp))</div><div class='add'>+			bp-&gt;edev-&gt;ulp_num_ctxs++;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -112,7 +119,7 @@ int bnxt_register_dev(struct bnxt_en_dev *edev,</div><div class='ctx'> 	struct bnxt_ulp *ulp;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	mutex_lock(&amp;edev-&gt;en_dev_lock);</div><div class='ctx'> 	if (!bp-&gt;irq_tbl) {</div><div class='ctx'> 		rc = -ENODEV;</div><div class='hunk'>@@ -135,10 +142,9 @@ int bnxt_register_dev(struct bnxt_en_dev *edev,</div><div class='ctx'> 	edev-&gt;ulp_tbl-&gt;msix_requested = bnxt_get_ulp_msix_num(bp);</div><div class='ctx'> </div><div class='ctx'> 	bnxt_fill_msix_vecs(bp, bp-&gt;edev-&gt;msix_entries);</div><div class='del'>-	edev-&gt;flags |= BNXT_EN_FLAG_MSIX_REQUESTED;</div><div class='ctx'> exit:</div><div class='ctx'> 	mutex_unlock(&amp;edev-&gt;en_dev_lock);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bnxt_register_dev);</div><div class='hunk'>@@ -148,13 +154,10 @@ void bnxt_unregister_dev(struct bnxt_en_dev *edev)</div><div class='ctx'> 	struct net_device *dev = edev-&gt;net;</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='ctx'> 	struct bnxt_ulp *ulp;</div><div class='del'>-	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	ulp = edev-&gt;ulp_tbl;</div><div class='del'>-	rtnl_lock();</div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	mutex_lock(&amp;edev-&gt;en_dev_lock);</div><div class='del'>-	if (ulp-&gt;msix_requested)</div><div class='del'>-		edev-&gt;flags &amp;= ~BNXT_EN_FLAG_MSIX_REQUESTED;</div><div class='ctx'> 	edev-&gt;ulp_tbl-&gt;msix_requested = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (ulp-&gt;max_async_event_id)</div><div class='hunk'>@@ -164,12 +167,8 @@ void bnxt_unregister_dev(struct bnxt_en_dev *edev)</div><div class='ctx'> 	synchronize_rcu();</div><div class='ctx'> 	ulp-&gt;max_async_event_id = 0;</div><div class='ctx'> 	ulp-&gt;async_events_bmap = NULL;</div><div class='del'>-	while (atomic_read(&amp;ulp-&gt;ref_count) != 0 &amp;&amp; i &lt; 10) {</div><div class='del'>-		msleep(100);</div><div class='del'>-		i++;</div><div class='del'>-	}</div><div class='ctx'> 	mutex_unlock(&amp;edev-&gt;en_dev_lock);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> 	return;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bnxt_unregister_dev);</div><div class='hunk'>@@ -208,7 +207,7 @@ int bnxt_send_msg(struct bnxt_en_dev *edev,</div><div class='ctx'> </div><div class='ctx'> 	rc = hwrm_req_replace(bp, req, fw_msg-&gt;msg, fw_msg-&gt;msg_len);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+		goto drop_req;</div><div class='ctx'> </div><div class='ctx'> 	hwrm_req_timeout(bp, req, fw_msg-&gt;timeout);</div><div class='ctx'> 	resp = hwrm_req_hold(bp, req);</div><div class='hunk'>@@ -220,6 +219,7 @@ int bnxt_send_msg(struct bnxt_en_dev *edev,</div><div class='ctx'> </div><div class='ctx'> 		memcpy(fw_msg-&gt;resp, resp, resp_len);</div><div class='ctx'> 	}</div><div class='add'>+drop_req:</div><div class='ctx'> 	hwrm_req_drop(bp, req);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -234,10 +234,9 @@ void bnxt_ulp_stop(struct bnxt *bp)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;edev-&gt;en_dev_lock);</div><div class='del'>-	if (!bnxt_ulp_registered(edev)) {</div><div class='del'>-		mutex_unlock(&amp;edev-&gt;en_dev_lock);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	if (!bnxt_ulp_registered(edev) ||</div><div class='add'>+	    (edev-&gt;flags &amp; BNXT_EN_FLAG_ULP_STOPPED))</div><div class='add'>+		goto ulp_stop_exit;</div><div class='ctx'> </div><div class='ctx'> 	edev-&gt;flags |= BNXT_EN_FLAG_ULP_STOPPED;</div><div class='ctx'> 	if (aux_priv) {</div><div class='hunk'>@@ -253,6 +252,7 @@ void bnxt_ulp_stop(struct bnxt *bp)</div><div class='ctx'> 			adrv-&gt;suspend(adev, pm);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+ulp_stop_exit:</div><div class='ctx'> 	mutex_unlock(&amp;edev-&gt;en_dev_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -261,19 +261,13 @@ void bnxt_ulp_start(struct bnxt *bp, int err)</div><div class='ctx'> 	struct bnxt_aux_priv *aux_priv = bp-&gt;aux_priv;</div><div class='ctx'> 	struct bnxt_en_dev *edev = bp-&gt;edev;</div><div class='ctx'> </div><div class='del'>-	if (!edev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	edev-&gt;flags &amp;= ~BNXT_EN_FLAG_ULP_STOPPED;</div><div class='del'>-</div><div class='del'>-	if (err)</div><div class='add'>+	if (!edev || err)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;edev-&gt;en_dev_lock);</div><div class='del'>-	if (!bnxt_ulp_registered(edev)) {</div><div class='del'>-		mutex_unlock(&amp;edev-&gt;en_dev_lock);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	if (!bnxt_ulp_registered(edev) ||</div><div class='add'>+	    !(edev-&gt;flags &amp; BNXT_EN_FLAG_ULP_STOPPED))</div><div class='add'>+		goto ulp_start_exit;</div><div class='ctx'> </div><div class='ctx'> 	if (edev-&gt;ulp_tbl-&gt;msix_requested)</div><div class='ctx'> 		bnxt_fill_msix_vecs(bp, edev-&gt;msix_entries);</div><div class='hunk'>@@ -290,6 +284,8 @@ void bnxt_ulp_start(struct bnxt *bp, int err)</div><div class='ctx'> 			adrv-&gt;resume(adev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+ulp_start_exit:</div><div class='add'>+	edev-&gt;flags &amp;= ~BNXT_EN_FLAG_ULP_STOPPED;</div><div class='ctx'> 	mutex_unlock(&amp;edev-&gt;en_dev_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -297,8 +293,9 @@ void bnxt_ulp_irq_stop(struct bnxt *bp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bnxt_en_dev *edev = bp-&gt;edev;</div><div class='ctx'> 	struct bnxt_ulp_ops *ops;</div><div class='add'>+	bool reset = false;</div><div class='ctx'> </div><div class='del'>-	if (!edev || !(edev-&gt;flags &amp; BNXT_EN_FLAG_MSIX_REQUESTED))</div><div class='add'>+	if (!edev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (bnxt_ulp_registered(bp-&gt;edev)) {</div><div class='hunk'>@@ -307,10 +304,12 @@ void bnxt_ulp_irq_stop(struct bnxt *bp)</div><div class='ctx'> 		if (!ulp-&gt;msix_requested)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		ops = rtnl_dereference(ulp-&gt;ulp_ops);</div><div class='add'>+		ops = netdev_lock_dereference(ulp-&gt;ulp_ops, bp-&gt;dev);</div><div class='ctx'> 		if (!ops || !ops-&gt;ulp_irq_stop)</div><div class='ctx'> 			return;</div><div class='del'>-		ops-&gt;ulp_irq_stop(ulp-&gt;handle);</div><div class='add'>+		if (test_bit(BNXT_STATE_FW_RESET_DET, &amp;bp-&gt;state))</div><div class='add'>+			reset = true;</div><div class='add'>+		ops-&gt;ulp_irq_stop(ulp-&gt;handle, reset);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -319,7 +318,7 @@ void bnxt_ulp_irq_restart(struct bnxt *bp, int err)</div><div class='ctx'> 	struct bnxt_en_dev *edev = bp-&gt;edev;</div><div class='ctx'> 	struct bnxt_ulp_ops *ops;</div><div class='ctx'> </div><div class='del'>-	if (!edev || !(edev-&gt;flags &amp; BNXT_EN_FLAG_MSIX_REQUESTED))</div><div class='add'>+	if (!edev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (bnxt_ulp_registered(bp-&gt;edev)) {</div><div class='hunk'>@@ -329,7 +328,7 @@ void bnxt_ulp_irq_restart(struct bnxt *bp, int err)</div><div class='ctx'> 		if (!ulp-&gt;msix_requested)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		ops = rtnl_dereference(ulp-&gt;ulp_ops);</div><div class='add'>+		ops = netdev_lock_dereference(ulp-&gt;ulp_ops, bp-&gt;dev);</div><div class='ctx'> 		if (!ops || !ops-&gt;ulp_irq_restart)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='hunk'>@@ -345,9 +344,36 @@ void bnxt_ulp_irq_restart(struct bnxt *bp, int err)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int bnxt_register_async_events(struct bnxt_en_dev *edev,</div><div class='del'>-			       unsigned long *events_bmap,</div><div class='del'>-			       u16 max_id)</div><div class='add'>+void bnxt_ulp_async_events(struct bnxt *bp, struct hwrm_async_event_cmpl *cmpl)</div><div class='add'>+{</div><div class='add'>+	u16 event_id = le16_to_cpu(cmpl-&gt;event_id);</div><div class='add'>+	struct bnxt_en_dev *edev = bp-&gt;edev;</div><div class='add'>+	struct bnxt_ulp_ops *ops;</div><div class='add'>+	struct bnxt_ulp *ulp;</div><div class='add'>+</div><div class='add'>+	if (!bnxt_ulp_registered(edev))</div><div class='add'>+		return;</div><div class='add'>+	ulp = edev-&gt;ulp_tbl;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+</div><div class='add'>+	ops = rcu_dereference(ulp-&gt;ulp_ops);</div><div class='add'>+	if (!ops || !ops-&gt;ulp_async_notifier)</div><div class='add'>+		goto exit_unlock_rcu;</div><div class='add'>+	if (!ulp-&gt;async_events_bmap || event_id &gt; ulp-&gt;max_async_event_id)</div><div class='add'>+		goto exit_unlock_rcu;</div><div class='add'>+</div><div class='add'>+	/* Read max_async_event_id first before testing the bitmap. */</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='add'>+	if (test_bit(event_id, ulp-&gt;async_events_bmap))</div><div class='add'>+		ops-&gt;ulp_async_notifier(ulp-&gt;handle, cmpl);</div><div class='add'>+exit_unlock_rcu:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bnxt_register_async_events(struct bnxt_en_dev *edev,</div><div class='add'>+				unsigned long *events_bmap, u16 max_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = edev-&gt;net;</div><div class='ctx'> 	struct bnxt *bp = netdev_priv(dev);</div><div class='hunk'>@@ -359,7 +385,6 @@ int bnxt_register_async_events(struct bnxt_en_dev *edev,</div><div class='ctx'> 	smp_wmb();</div><div class='ctx'> 	ulp-&gt;max_async_event_id = max_id;</div><div class='ctx'> 	bnxt_hwrm_func_drv_rgtr(bp, events_bmap, max_id + 1, true);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(bnxt_register_async_events);</div><div class='ctx'> </div><div class='hunk'>@@ -414,6 +439,10 @@ static void bnxt_set_edev_info(struct bnxt_en_dev *edev, struct bnxt *bp)</div><div class='ctx'> 		edev-&gt;flags |= BNXT_EN_FLAG_ROCEV2_CAP;</div><div class='ctx'> 	if (bp-&gt;flags &amp; BNXT_FLAG_VF)</div><div class='ctx'> 		edev-&gt;flags |= BNXT_EN_FLAG_VF;</div><div class='add'>+	if (BNXT_ROCE_VF_RESC_CAP(bp))</div><div class='add'>+		edev-&gt;flags |= BNXT_EN_FLAG_ROCE_VF_RES_MGMT;</div><div class='add'>+	if (BNXT_SW_RES_LMT(bp))</div><div class='add'>+		edev-&gt;flags |= BNXT_EN_FLAG_SW_RES_LMT;</div><div class='ctx'> </div><div class='ctx'> 	edev-&gt;chip_num = bp-&gt;chip_num;</div><div class='ctx'> 	edev-&gt;hw_ring_stats_size = bp-&gt;hw_ring_stats_size;</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h<br/>index 4f4914f5c84c..3c5b8a53f715 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h</a></div><div class='hunk'>@@ -10,9 +10,6 @@</div><div class='ctx'> #ifndef BNXT_ULP_H</div><div class='ctx'> #define BNXT_ULP_H</div><div class='ctx'> </div><div class='del'>-#define BNXT_ROCE_ULP	0</div><div class='del'>-#define BNXT_MAX_ULP	1</div><div class='del'>-</div><div class='ctx'> #define BNXT_MIN_ROCE_CP_RINGS	2</div><div class='ctx'> #define BNXT_MIN_ROCE_STAT_CTXS	1</div><div class='ctx'> </div><div class='hunk'>@@ -30,7 +27,9 @@ struct bnxt_msix_entry {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bnxt_ulp_ops {</div><div class='del'>-	void (*ulp_irq_stop)(void *);</div><div class='add'>+	/* async_notifier() cannot sleep (in BH context) */</div><div class='add'>+	void (*ulp_async_notifier)(void *, struct hwrm_async_event_cmpl *);</div><div class='add'>+	void (*ulp_irq_stop)(void *, bool);</div><div class='ctx'> 	void (*ulp_irq_restart)(void *, struct bnxt_msix_entry *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -48,7 +47,6 @@ struct bnxt_ulp {</div><div class='ctx'> 	unsigned long	*async_events_bmap;</div><div class='ctx'> 	u16		max_async_event_id;</div><div class='ctx'> 	u16		msix_requested;</div><div class='del'>-	atomic_t	ref_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bnxt_en_dev {</div><div class='hunk'>@@ -60,10 +58,12 @@ struct bnxt_en_dev {</div><div class='ctx'> 	#define BNXT_EN_FLAG_ROCEV2_CAP		0x2</div><div class='ctx'> 	#define BNXT_EN_FLAG_ROCE_CAP		(BNXT_EN_FLAG_ROCEV1_CAP | \</div><div class='ctx'> 						 BNXT_EN_FLAG_ROCEV2_CAP)</div><div class='del'>-	#define BNXT_EN_FLAG_MSIX_REQUESTED	0x4</div><div class='ctx'> 	#define BNXT_EN_FLAG_ULP_STOPPED	0x8</div><div class='ctx'> 	#define BNXT_EN_FLAG_VF			0x10</div><div class='ctx'> #define BNXT_EN_VF(edev)	((edev)-&gt;flags &amp; BNXT_EN_FLAG_VF)</div><div class='add'>+	#define BNXT_EN_FLAG_ROCE_VF_RES_MGMT	0x20</div><div class='add'>+	#define BNXT_EN_FLAG_SW_RES_LMT		0x40</div><div class='add'>+#define BNXT_EN_SW_RES_LMT(edev) ((edev)-&gt;flags &amp; BNXT_EN_FLAG_SW_RES_LMT)</div><div class='ctx'> </div><div class='ctx'> 	struct bnxt_ulp			*ulp_tbl;</div><div class='ctx'> 	int				l2_db_size;	/* Doorbell BAR size in</div><div class='hunk'>@@ -123,6 +123,6 @@ int bnxt_register_dev(struct bnxt_en_dev *edev, struct bnxt_ulp_ops *ulp_ops,</div><div class='ctx'> 		      void *handle);</div><div class='ctx'> void bnxt_unregister_dev(struct bnxt_en_dev *edev);</div><div class='ctx'> int bnxt_send_msg(struct bnxt_en_dev *edev, struct bnxt_fw_msg *fw_msg);</div><div class='del'>-int bnxt_register_async_events(struct bnxt_en_dev *edev,</div><div class='del'>-			       unsigned long *events_bmap, u16 max_id);</div><div class='add'>+void bnxt_register_async_events(struct bnxt_en_dev *edev,</div><div class='add'>+				unsigned long *events_bmap, u16 max_id);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c<br/>index 1467b94a6427..bd116fd578d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c</a></div><div class='hunk'>@@ -12,8 +12,8 @@</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;linux/jhash.h&gt;</div><div class='ctx'> #include &lt;net/pkt_cls.h&gt;</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "bnxt_hsi.h"</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_hwrm.h"</div><div class='ctx'> #include "bnxt_vfr.h"</div><div class='hunk'>@@ -257,8 +257,7 @@ bool bnxt_dev_is_vf_rep(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> /* Called when the parent PF interface is closed:</div><div class='ctx'>  * As the mode transition from SWITCHDEV to LEGACY</div><div class='del'>- * happens under the rtnl_lock() this routine is safe</div><div class='del'>- * under the rtnl_lock()</div><div class='add'>+ * happens under the netdev instance lock this routine is safe</div><div class='ctx'>  */</div><div class='ctx'> void bnxt_vf_reps_close(struct bnxt *bp)</div><div class='ctx'> {</div><div class='hunk'>@@ -278,8 +277,7 @@ void bnxt_vf_reps_close(struct bnxt *bp)</div><div class='ctx'> </div><div class='ctx'> /* Called when the parent PF interface is opened (re-opened):</div><div class='ctx'>  * As the mode transition from SWITCHDEV to LEGACY</div><div class='del'>- * happen under the rtnl_lock() this routine is safe</div><div class='del'>- * under the rtnl_lock()</div><div class='add'>+ * happen under the netdev instance lock this routine is safe</div><div class='ctx'>  */</div><div class='ctx'> void bnxt_vf_reps_open(struct bnxt *bp)</div><div class='ctx'> {</div><div class='hunk'>@@ -348,7 +346,7 @@ void bnxt_vf_reps_destroy(struct bnxt *bp)</div><div class='ctx'> 	/* Ensure that parent PF's and VF-reps' RX/TX has been quiesced</div><div class='ctx'> 	 * before proceeding with VF-rep cleanup.</div><div class='ctx'> 	 */</div><div class='del'>-	rtnl_lock();</div><div class='add'>+	netdev_lock(bp-&gt;dev);</div><div class='ctx'> 	if (netif_running(bp-&gt;dev)) {</div><div class='ctx'> 		bnxt_close_nic(bp, false, false);</div><div class='ctx'> 		closed = true;</div><div class='hunk'>@@ -365,10 +363,10 @@ void bnxt_vf_reps_destroy(struct bnxt *bp)</div><div class='ctx'> 		bnxt_open_nic(bp, false, false);</div><div class='ctx'> 		bp-&gt;eswitch_mode = DEVLINK_ESWITCH_MODE_SWITCHDEV;</div><div class='ctx'> 	}</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	netdev_unlock(bp-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	/* Need to call vf_reps_destroy() outside of rntl_lock</div><div class='del'>-	 * as unregister_netdev takes rtnl_lock</div><div class='add'>+	/* Need to call vf_reps_destroy() outside of netdev instance lock</div><div class='add'>+	 * as unregister_netdev takes it</div><div class='ctx'> 	 */</div><div class='ctx'> 	__bnxt_vf_reps_destroy(bp);</div><div class='ctx'> }</div><div class='hunk'>@@ -376,7 +374,7 @@ void bnxt_vf_reps_destroy(struct bnxt *bp)</div><div class='ctx'> /* Free the VF-Reps in firmware, during firmware hot-reset processing.</div><div class='ctx'>  * Note that the VF-Rep netdevs are still active (not unregistered) during</div><div class='ctx'>  * this process. As the mode transition from SWITCHDEV to LEGACY happens</div><div class='del'>- * under the rtnl_lock() this routine is safe under the rtnl_lock().</div><div class='add'>+ * under the netdev instance lock this routine is safe.</div><div class='ctx'>  */</div><div class='ctx'> void bnxt_vf_reps_free(struct bnxt *bp)</div><div class='ctx'> {</div><div class='hunk'>@@ -413,7 +411,7 @@ static int bnxt_alloc_vf_rep(struct bnxt *bp, struct bnxt_vf_rep *vf_rep,</div><div class='ctx'> /* Allocate the VF-Reps in firmware, during firmware hot-reset processing.</div><div class='ctx'>  * Note that the VF-Rep netdevs are still active (not unregistered) during</div><div class='ctx'>  * this process. As the mode transition from SWITCHDEV to LEGACY happens</div><div class='del'>- * under the rtnl_lock() this routine is safe under the rtnl_lock().</div><div class='add'>+ * under the netdev instance lock this routine is safe.</div><div class='ctx'>  */</div><div class='ctx'> int bnxt_vf_reps_alloc(struct bnxt *bp)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c<br/>index f88b641533fc..3e77a96e5a3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c</a></div><div class='hunk'>@@ -15,8 +15,9 @@</div><div class='ctx'> #include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/bpf_trace.h&gt;</div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='del'>-#include "bnxt_hsi.h"</div><div class='add'>+#include &lt;linux/bnxt/hsi.h&gt;</div><div class='ctx'> #include "bnxt.h"</div><div class='ctx'> #include "bnxt_xdp.h"</div><div class='ctx'> </div><div class='hunk'>@@ -48,8 +49,7 @@ struct bnxt_sw_tx_bd *bnxt_xmit_bd(struct bnxt *bp,</div><div class='ctx'> 		tx_buf-&gt;page = virt_to_head_page(xdp-&gt;data);</div><div class='ctx'> </div><div class='ctx'> 	txbd = &amp;txr-&gt;tx_desc_ring[TX_RING(bp, prod)][TX_IDX(prod)];</div><div class='del'>-	flags = (len &lt;&lt; TX_BD_LEN_SHIFT) |</div><div class='del'>-		((num_frags + 1) &lt;&lt; TX_BD_FLAGS_BD_CNT_SHIFT) |</div><div class='add'>+	flags = (len &lt;&lt; TX_BD_LEN_SHIFT) | TX_BD_CNT(num_frags + 1) |</div><div class='ctx'> 		bnxt_lhint_arr[len &gt;&gt; 9];</div><div class='ctx'> 	txbd-&gt;tx_bd_len_flags_type = cpu_to_le32(flags);</div><div class='ctx'> 	txbd-&gt;tx_bd_opaque = SET_TX_OPAQUE(bp, txr, prod, 1 + num_frags);</div><div class='hunk'>@@ -115,7 +115,7 @@ static void __bnxt_xmit_xdp_redirect(struct bnxt *bp,</div><div class='ctx'> 	tx_buf-&gt;action = XDP_REDIRECT;</div><div class='ctx'> 	tx_buf-&gt;xdpf = xdpf;</div><div class='ctx'> 	dma_unmap_addr_set(tx_buf, mapping, mapping);</div><div class='del'>-	dma_unmap_len_set(tx_buf, len, 0);</div><div class='add'>+	dma_unmap_len_set(tx_buf, len, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void bnxt_tx_int_xdp(struct bnxt *bp, struct bnxt_napi *bnapi, int budget)</div><div class='hunk'>@@ -382,19 +382,24 @@ int bnxt_xdp_xmit(struct net_device *dev, int num_frames,</div><div class='ctx'> 	return nxmit;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Under rtnl_lock */</div><div class='ctx'> static int bnxt_xdp_set(struct bnxt *bp, struct bpf_prog *prog)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = bp-&gt;dev;</div><div class='ctx'> 	int tx_xdp = 0, tx_cp, rc, tc;</div><div class='ctx'> 	struct bpf_prog *old;</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(dev);</div><div class='add'>+</div><div class='ctx'> 	if (prog &amp;&amp; !prog-&gt;aux-&gt;xdp_has_frags &amp;&amp;</div><div class='ctx'> 	    bp-&gt;dev-&gt;mtu &gt; BNXT_MAX_PAGE_MODE_MTU) {</div><div class='ctx'> 		netdev_warn(dev, "MTU %d larger than %d without XDP frag support.\n",</div><div class='ctx'> 			    bp-&gt;dev-&gt;mtu, BNXT_MAX_PAGE_MODE_MTU);</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='add'>+	if (prog &amp;&amp; bp-&gt;flags &amp; BNXT_FLAG_HDS) {</div><div class='add'>+		netdev_warn(dev, "XDP is disallowed when HDS is enabled.\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> 	if (!(bp-&gt;flags &amp; BNXT_FLAG_SHARED_RINGS)) {</div><div class='ctx'> 		netdev_warn(dev, "ethtool rx/tx channels must be combined to support XDP.\n");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -420,17 +425,10 @@ static int bnxt_xdp_set(struct bnxt *bp, struct bpf_prog *prog)</div><div class='ctx'> </div><div class='ctx'> 	if (prog) {</div><div class='ctx'> 		bnxt_set_rx_skb_mode(bp, true);</div><div class='del'>-		xdp_features_set_redirect_target(dev, true);</div><div class='add'>+		xdp_features_set_redirect_target_locked(dev, true);</div><div class='ctx'> 	} else {</div><div class='del'>-		int rx, tx;</div><div class='del'>-</div><div class='del'>-		xdp_features_clear_redirect_target(dev);</div><div class='add'>+		xdp_features_clear_redirect_target_locked(dev);</div><div class='ctx'> 		bnxt_set_rx_skb_mode(bp, false);</div><div class='del'>-		bnxt_get_max_rings(bp, &amp;rx, &amp;tx, true);</div><div class='del'>-		if (rx &gt; 1) {</div><div class='del'>-			bp-&gt;flags &amp;= ~BNXT_FLAG_NO_AGG_RINGS;</div><div class='del'>-			bp-&gt;dev-&gt;hw_features |= NETIF_F_LRO;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> 	bp-&gt;tx_nr_rings_xdp = tx_xdp;</div><div class='ctx'> 	bp-&gt;tx_nr_rings = bp-&gt;tx_nr_rings_per_tc * tc + tx_xdp;</div><div class='hunk'>@@ -463,23 +461,15 @@ int bnxt_xdp(struct net_device *dev, struct netdev_bpf *xdp)</div><div class='ctx'> </div><div class='ctx'> struct sk_buff *</div><div class='ctx'> bnxt_xdp_build_skb(struct bnxt *bp, struct sk_buff *skb, u8 num_frags,</div><div class='del'>-		   struct page_pool *pool, struct xdp_buff *xdp,</div><div class='del'>-		   struct rx_cmp_ext *rxcmp1)</div><div class='add'>+		   struct page_pool *pool, struct xdp_buff *xdp)</div><div class='ctx'> {</div><div class='ctx'> 	struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);</div><div class='ctx'> </div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return NULL;</div><div class='del'>-	skb_checksum_none_assert(skb);</div><div class='del'>-	if (RX_CMP_L4_CS_OK(rxcmp1)) {</div><div class='del'>-		if (bp-&gt;dev-&gt;features &amp; NETIF_F_RXCSUM) {</div><div class='del'>-			skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='del'>-			skb-&gt;csum_level = RX_CMP_ENCAP(rxcmp1);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	xdp_update_skb_shared_info(skb, num_frags,</div><div class='del'>-				   sinfo-&gt;xdp_frags_size,</div><div class='del'>-				   BNXT_RX_PAGE_SIZE * sinfo-&gt;nr_frags,</div><div class='del'>-				   xdp_buff_is_frag_pfmemalloc(xdp));</div><div class='add'>+</div><div class='add'>+	xdp_update_skb_frags_info(skb, num_frags, sinfo-&gt;xdp_frags_size,</div><div class='add'>+				  BNXT_RX_PAGE_SIZE * num_frags,</div><div class='add'>+				  xdp_buff_get_skb_flags(xdp));</div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h<br/>index 0122782400b8..220285e190fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h</a></div><div class='hunk'>@@ -33,6 +33,5 @@ void bnxt_xdp_buff_frags_free(struct bnxt_rx_ring_info *rxr,</div><div class='ctx'> 			      struct xdp_buff *xdp);</div><div class='ctx'> struct sk_buff *bnxt_xdp_build_skb(struct bnxt *bp, struct sk_buff *skb,</div><div class='ctx'> 				   u8 num_frags, struct page_pool *pool,</div><div class='del'>-				   struct xdp_buff *xdp,</div><div class='del'>-				   struct rx_cmp_ext *rxcmp1);</div><div class='add'>+				   struct xdp_buff *xdp);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/cnic.c b/drivers/net/ethernet/broadcom/cnic.c<br/>index a9040c42d2ff..6e97a5a7daaf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/cnic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/cnic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/cnic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/cnic.c</a></div><div class='hunk'>@@ -4230,8 +4230,7 @@ static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	cnic_bnx2x_delete_wait(dev, 0);</div><div class='ctx'> </div><div class='del'>-	cancel_delayed_work(&amp;cp-&gt;delete_task);</div><div class='del'>-	flush_workqueue(cnic_wq);</div><div class='add'>+	cancel_delayed_work_sync(&amp;cp-&gt;delete_task);</div><div class='ctx'> </div><div class='ctx'> 	if (atomic_read(&amp;cp-&gt;iscsi_conn) != 0)</div><div class='ctx'> 		netdev_warn(dev-&gt;netdev, "%d iSCSI connections not destroyed\n",</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c<br/>index 53a949eb9180..05512aa10c20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/genet/bcmgenet.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/genet/bcmgenet.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/genet/bcmgenet.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/genet/bcmgenet.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Broadcom GENET (Gigabit Ethernet) controller driver</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2014-2024 Broadcom</div><div class='add'>+ * Copyright (c) 2014-2025 Broadcom</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt)				"bcmgenet: " fmt</div><div class='hunk'>@@ -35,21 +35,18 @@</div><div class='ctx'> #include &lt;linux/ip.h&gt;</div><div class='ctx'> #include &lt;linux/ipv6.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;linux/platform_data/bcmgenet.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "bcmgenet.h"</div><div class='ctx'> </div><div class='del'>-/* Maximum number of hardware queues, downsized if needed */</div><div class='del'>-#define GENET_MAX_MQ_CNT	4</div><div class='del'>-</div><div class='ctx'> /* Default highest priority queue for multi queue support */</div><div class='del'>-#define GENET_Q0_PRIORITY	0</div><div class='add'>+#define GENET_Q1_PRIORITY	0</div><div class='add'>+#define GENET_Q0_PRIORITY	1</div><div class='ctx'> </div><div class='del'>-#define GENET_Q16_RX_BD_CNT	\</div><div class='add'>+#define GENET_Q0_RX_BD_CNT	\</div><div class='ctx'> 	(TOTAL_DESC - priv-&gt;hw_params-&gt;rx_queues * priv-&gt;hw_params-&gt;rx_bds_per_q)</div><div class='del'>-#define GENET_Q16_TX_BD_CNT	\</div><div class='add'>+#define GENET_Q0_TX_BD_CNT	\</div><div class='ctx'> 	(TOTAL_DESC - priv-&gt;hw_params-&gt;tx_queues * priv-&gt;hw_params-&gt;tx_bds_per_q)</div><div class='ctx'> </div><div class='ctx'> #define RX_BUF_LENGTH		2048</div><div class='hunk'>@@ -104,7 +101,7 @@ static inline void dmadesc_set_addr(struct bcmgenet_priv *priv,</div><div class='ctx'> 	 * the platform is explicitly configured for 64-bits/LPAE.</div><div class='ctx'> 	 */</div><div class='ctx'> #ifdef CONFIG_PHYS_ADDR_T_64BIT</div><div class='del'>-	if (priv-&gt;hw_params-&gt;flags &amp; GENET_HAS_40BITS)</div><div class='add'>+	if (bcmgenet_has_40bits(priv))</div><div class='ctx'> 		bcmgenet_writel(upper_32_bits(addr), d + DMA_DESC_ADDRESS_HI);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='hunk'>@@ -446,33 +443,48 @@ static void bcmgenet_hfb_enable_filter(struct bcmgenet_priv *priv, u32 f_index)</div><div class='ctx'> 	u32 offset;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	offset = HFB_FLT_ENABLE_V3PLUS + (f_index &lt; 32) * sizeof(u32);</div><div class='del'>-	reg = bcmgenet_hfb_reg_readl(priv, offset);</div><div class='del'>-	reg |= (1 &lt;&lt; (f_index % 32));</div><div class='del'>-	bcmgenet_hfb_reg_writel(priv, reg, offset);</div><div class='del'>-	reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);</div><div class='del'>-	reg |= RBUF_HFB_EN;</div><div class='del'>-	bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);</div><div class='add'>+	if (GENET_IS_V1(priv) || GENET_IS_V2(priv)) {</div><div class='add'>+		reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);</div><div class='add'>+		reg |= (1 &lt;&lt; ((f_index % 32) + RBUF_HFB_FILTER_EN_SHIFT)) |</div><div class='add'>+			RBUF_HFB_EN;</div><div class='add'>+		bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);</div><div class='add'>+	} else {</div><div class='add'>+		offset = HFB_FLT_ENABLE_V3PLUS + (f_index &lt; 32) * sizeof(u32);</div><div class='add'>+		reg = bcmgenet_hfb_reg_readl(priv, offset);</div><div class='add'>+		reg |= (1 &lt;&lt; (f_index % 32));</div><div class='add'>+		bcmgenet_hfb_reg_writel(priv, reg, offset);</div><div class='add'>+		reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);</div><div class='add'>+		reg |= RBUF_HFB_EN;</div><div class='add'>+		bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcmgenet_hfb_disable_filter(struct bcmgenet_priv *priv, u32 f_index)</div><div class='ctx'> {</div><div class='ctx'> 	u32 offset, reg, reg1;</div><div class='ctx'> </div><div class='del'>-	offset = HFB_FLT_ENABLE_V3PLUS;</div><div class='del'>-	reg = bcmgenet_hfb_reg_readl(priv, offset);</div><div class='del'>-	reg1 = bcmgenet_hfb_reg_readl(priv, offset + sizeof(u32));</div><div class='del'>-	if  (f_index &lt; 32) {</div><div class='del'>-		reg1 &amp;= ~(1 &lt;&lt; (f_index % 32));</div><div class='del'>-		bcmgenet_hfb_reg_writel(priv, reg1, offset + sizeof(u32));</div><div class='del'>-	} else {</div><div class='del'>-		reg &amp;= ~(1 &lt;&lt; (f_index % 32));</div><div class='del'>-		bcmgenet_hfb_reg_writel(priv, reg, offset);</div><div class='del'>-	}</div><div class='del'>-	if (!reg &amp;&amp; !reg1) {</div><div class='add'>+	if (GENET_IS_V1(priv) || GENET_IS_V2(priv)) {</div><div class='ctx'> 		reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);</div><div class='del'>-		reg &amp;= ~RBUF_HFB_EN;</div><div class='add'>+		reg &amp;= ~(1 &lt;&lt; ((f_index % 32) + RBUF_HFB_FILTER_EN_SHIFT));</div><div class='add'>+		if (!(reg &amp; RBUF_HFB_FILTER_EN_MASK))</div><div class='add'>+			reg &amp;= ~RBUF_HFB_EN;</div><div class='ctx'> 		bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);</div><div class='add'>+	} else {</div><div class='add'>+		offset = HFB_FLT_ENABLE_V3PLUS;</div><div class='add'>+		reg = bcmgenet_hfb_reg_readl(priv, offset);</div><div class='add'>+		reg1 = bcmgenet_hfb_reg_readl(priv, offset + sizeof(u32));</div><div class='add'>+		if  (f_index &lt; 32) {</div><div class='add'>+			reg1 &amp;= ~(1 &lt;&lt; (f_index % 32));</div><div class='add'>+			bcmgenet_hfb_reg_writel(priv, reg1, offset + sizeof(u32));</div><div class='add'>+		} else {</div><div class='add'>+			reg &amp;= ~(1 &lt;&lt; (f_index % 32));</div><div class='add'>+			bcmgenet_hfb_reg_writel(priv, reg, offset);</div><div class='add'>+		}</div><div class='add'>+		if (!reg &amp;&amp; !reg1) {</div><div class='add'>+			reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);</div><div class='add'>+			reg &amp;= ~RBUF_HFB_EN;</div><div class='add'>+			bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -482,6 +494,9 @@ static void bcmgenet_hfb_set_filter_rx_queue_mapping(struct bcmgenet_priv *priv,</div><div class='ctx'> 	u32 offset;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='add'>+	if (GENET_IS_V1(priv) || GENET_IS_V2(priv))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	offset = f_index / 8;</div><div class='ctx'> 	reg = bcmgenet_rdma_readl(priv, DMA_INDEX2RING_0 + offset);</div><div class='ctx'> 	reg &amp;= ~(0xF &lt;&lt; (4 * (f_index % 8)));</div><div class='hunk'>@@ -495,9 +510,13 @@ static void bcmgenet_hfb_set_filter_length(struct bcmgenet_priv *priv,</div><div class='ctx'> 	u32 offset;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	offset = HFB_FLT_LEN_V3PLUS +</div><div class='del'>-		 ((priv-&gt;hw_params-&gt;hfb_filter_cnt - 1 - f_index) / 4) *</div><div class='del'>-		 sizeof(u32);</div><div class='add'>+	if (GENET_IS_V1(priv) || GENET_IS_V2(priv))</div><div class='add'>+		offset = HFB_FLT_LEN_V2;</div><div class='add'>+	else</div><div class='add'>+		offset = HFB_FLT_LEN_V3PLUS;</div><div class='add'>+</div><div class='add'>+	offset += sizeof(u32) *</div><div class='add'>+		  ((priv-&gt;hw_params-&gt;hfb_filter_cnt - 1 - f_index) / 4);</div><div class='ctx'> 	reg = bcmgenet_hfb_reg_readl(priv, offset);</div><div class='ctx'> 	reg &amp;= ~(0xFF &lt;&lt; (8 * (f_index % 4)));</div><div class='ctx'> 	reg |= ((f_length &amp; 0xFF) &lt;&lt; (8 * (f_index % 4)));</div><div class='hunk'>@@ -579,13 +598,13 @@ static void bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv,</div><div class='ctx'> 					     struct bcmgenet_rxnfc_rule *rule)</div><div class='ctx'> {</div><div class='ctx'> 	struct ethtool_rx_flow_spec *fs = &amp;rule-&gt;fs;</div><div class='del'>-	u32 offset = 0, f_length = 0, f;</div><div class='add'>+	u32 offset = 0, f_length = 0, f, q;</div><div class='ctx'> 	u8 val_8, mask_8;</div><div class='ctx'> 	__be16 val_16;</div><div class='ctx'> 	u16 mask_16;</div><div class='ctx'> 	size_t size;</div><div class='ctx'> </div><div class='del'>-	f = fs-&gt;location;</div><div class='add'>+	f = fs-&gt;location + 1;</div><div class='ctx'> 	if (fs-&gt;flow_type &amp; FLOW_MAC_EXT) {</div><div class='ctx'> 		bcmgenet_hfb_insert_data(priv, f, 0,</div><div class='ctx'> 					 &amp;fs-&gt;h_ext.h_dest, &amp;fs-&gt;m_ext.h_dest,</div><div class='hunk'>@@ -667,19 +686,16 @@ static void bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bcmgenet_hfb_set_filter_length(priv, f, 2 * f_length);</div><div class='del'>-	if (!fs-&gt;ring_cookie || fs-&gt;ring_cookie == RX_CLS_FLOW_WAKE) {</div><div class='del'>-		/* Ring 0 flows can be handled by the default Descriptor Ring</div><div class='del'>-		 * We'll map them to ring 0, but don't enable the filter</div><div class='del'>-		 */</div><div class='del'>-		bcmgenet_hfb_set_filter_rx_queue_mapping(priv, f, 0);</div><div class='del'>-		rule-&gt;state = BCMGENET_RXNFC_STATE_DISABLED;</div><div class='del'>-	} else {</div><div class='add'>+	if (fs-&gt;ring_cookie == RX_CLS_FLOW_WAKE)</div><div class='add'>+		q = 0;</div><div class='add'>+	else if (fs-&gt;ring_cookie == RX_CLS_FLOW_DISC)</div><div class='add'>+		q = priv-&gt;hw_params-&gt;rx_queues + 1;</div><div class='add'>+	else</div><div class='ctx'> 		/* Other Rx rings are direct mapped here */</div><div class='del'>-		bcmgenet_hfb_set_filter_rx_queue_mapping(priv, f,</div><div class='del'>-							 fs-&gt;ring_cookie);</div><div class='del'>-		bcmgenet_hfb_enable_filter(priv, f);</div><div class='del'>-		rule-&gt;state = BCMGENET_RXNFC_STATE_ENABLED;</div><div class='del'>-	}</div><div class='add'>+		q = fs-&gt;ring_cookie;</div><div class='add'>+	bcmgenet_hfb_set_filter_rx_queue_mapping(priv, f, q);</div><div class='add'>+	bcmgenet_hfb_enable_filter(priv, f);</div><div class='add'>+	rule-&gt;state = BCMGENET_RXNFC_STATE_ENABLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* bcmgenet_hfb_clear</div><div class='hunk'>@@ -690,6 +706,7 @@ static void bcmgenet_hfb_clear_filter(struct bcmgenet_priv *priv, u32 f_index)</div><div class='ctx'> {</div><div class='ctx'> 	u32 base, i;</div><div class='ctx'> </div><div class='add'>+	bcmgenet_hfb_set_filter_length(priv, f_index, 0);</div><div class='ctx'> 	base = f_index * priv-&gt;hw_params-&gt;hfb_filter_size;</div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;hw_params-&gt;hfb_filter_size; i++)</div><div class='ctx'> 		bcmgenet_hfb_writel(priv, 0x0, (base + i) * sizeof(u32));</div><div class='hunk'>@@ -699,22 +716,23 @@ static void bcmgenet_hfb_clear(struct bcmgenet_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	if (GENET_IS_V1(priv) || GENET_IS_V2(priv))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	bcmgenet_hfb_reg_writel(priv, 0x0, HFB_CTRL);</div><div class='del'>-	bcmgenet_hfb_reg_writel(priv, 0x0, HFB_FLT_ENABLE_V3PLUS);</div><div class='del'>-	bcmgenet_hfb_reg_writel(priv, 0x0, HFB_FLT_ENABLE_V3PLUS + 4);</div><div class='del'>-</div><div class='del'>-	for (i = DMA_INDEX2RING_0; i &lt;= DMA_INDEX2RING_7; i++)</div><div class='del'>-		bcmgenet_rdma_writel(priv, 0x0, i);</div><div class='add'>+	bcmgenet_hfb_reg_writel(priv, 0, HFB_CTRL);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; (priv-&gt;hw_params-&gt;hfb_filter_cnt / 4); i++)</div><div class='del'>-		bcmgenet_hfb_reg_writel(priv, 0x0,</div><div class='del'>-					HFB_FLT_LEN_V3PLUS + i * sizeof(u32));</div><div class='add'>+	if (!GENET_IS_V1(priv) &amp;&amp; !GENET_IS_V2(priv)) {</div><div class='add'>+		bcmgenet_hfb_reg_writel(priv, 0,</div><div class='add'>+					HFB_FLT_ENABLE_V3PLUS);</div><div class='add'>+		bcmgenet_hfb_reg_writel(priv, 0,</div><div class='add'>+					HFB_FLT_ENABLE_V3PLUS + 4);</div><div class='add'>+		for (i = DMA_INDEX2RING_0; i &lt;= DMA_INDEX2RING_7; i++)</div><div class='add'>+			bcmgenet_rdma_writel(priv, 0, i);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;hw_params-&gt;hfb_filter_cnt; i++)</div><div class='ctx'> 		bcmgenet_hfb_clear_filter(priv, i);</div><div class='add'>+</div><div class='add'>+	/* Enable filter 0 to send default flow to ring 0 */</div><div class='add'>+	bcmgenet_hfb_set_filter_length(priv, 0, 4);</div><div class='add'>+	bcmgenet_hfb_enable_filter(priv, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcmgenet_hfb_init(struct bcmgenet_priv *priv)</div><div class='hunk'>@@ -722,9 +740,6 @@ static void bcmgenet_hfb_init(struct bcmgenet_priv *priv)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;priv-&gt;rxnfc_list);</div><div class='del'>-	if (GENET_IS_V1(priv) || GENET_IS_V2(priv))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; MAX_NUM_OF_FS_RULES; i++) {</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;priv-&gt;rxnfc_rules[i].list);</div><div class='ctx'> 		priv-&gt;rxnfc_rules[i].state = BCMGENET_RXNFC_STATE_UNUSED;</div><div class='hunk'>@@ -819,20 +834,16 @@ static int bcmgenet_get_coalesce(struct net_device *dev,</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	ec-&gt;tx_max_coalesced_frames =</div><div class='del'>-		bcmgenet_tdma_ring_readl(priv, DESC_INDEX,</div><div class='del'>-					 DMA_MBUF_DONE_THRESH);</div><div class='add'>+		bcmgenet_tdma_ring_readl(priv, 0, DMA_MBUF_DONE_THRESH);</div><div class='ctx'> 	ec-&gt;rx_max_coalesced_frames =</div><div class='del'>-		bcmgenet_rdma_ring_readl(priv, DESC_INDEX,</div><div class='del'>-					 DMA_MBUF_DONE_THRESH);</div><div class='add'>+		bcmgenet_rdma_ring_readl(priv, 0, DMA_MBUF_DONE_THRESH);</div><div class='ctx'> 	ec-&gt;rx_coalesce_usecs =</div><div class='del'>-		bcmgenet_rdma_readl(priv, DMA_RING16_TIMEOUT) * 8192 / 1000;</div><div class='add'>+		bcmgenet_rdma_readl(priv, DMA_RING0_TIMEOUT) * 8192 / 1000;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;rx_queues; i++) {</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;rx_queues; i++) {</div><div class='ctx'> 		ring = &amp;priv-&gt;rx_rings[i];</div><div class='ctx'> 		ec-&gt;use_adaptive_rx_coalesce |= ring-&gt;dim.use_dim;</div><div class='ctx'> 	}</div><div class='del'>-	ring = &amp;priv-&gt;rx_rings[DESC_INDEX];</div><div class='del'>-	ec-&gt;use_adaptive_rx_coalesce |= ring-&gt;dim.use_dim;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -902,17 +913,13 @@ static int bcmgenet_set_coalesce(struct net_device *dev,</div><div class='ctx'> 	/* Program all TX queues with the same values, as there is no</div><div class='ctx'> 	 * ethtool knob to do coalescing on a per-queue basis</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;tx_queues; i++)</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;tx_queues; i++)</div><div class='ctx'> 		bcmgenet_tdma_ring_writel(priv, i,</div><div class='ctx'> 					  ec-&gt;tx_max_coalesced_frames,</div><div class='ctx'> 					  DMA_MBUF_DONE_THRESH);</div><div class='del'>-	bcmgenet_tdma_ring_writel(priv, DESC_INDEX,</div><div class='del'>-				  ec-&gt;tx_max_coalesced_frames,</div><div class='del'>-				  DMA_MBUF_DONE_THRESH);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;rx_queues; i++)</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;rx_queues; i++)</div><div class='ctx'> 		bcmgenet_set_ring_rx_coalesce(&amp;priv-&gt;rx_rings[i], ec);</div><div class='del'>-	bcmgenet_set_ring_rx_coalesce(&amp;priv-&gt;rx_rings[DESC_INDEX], ec);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -961,12 +968,13 @@ static int bcmgenet_set_pauseparam(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> /* standard ethtool support functions. */</div><div class='ctx'> enum bcmgenet_stat_type {</div><div class='del'>-	BCMGENET_STAT_NETDEV = -1,</div><div class='add'>+	BCMGENET_STAT_RTNL = -1,</div><div class='ctx'> 	BCMGENET_STAT_MIB_RX,</div><div class='ctx'> 	BCMGENET_STAT_MIB_TX,</div><div class='ctx'> 	BCMGENET_STAT_RUNT,</div><div class='ctx'> 	BCMGENET_STAT_MISC,</div><div class='ctx'> 	BCMGENET_STAT_SOFT,</div><div class='add'>+	BCMGENET_STAT_SOFT64,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bcmgenet_stats {</div><div class='hunk'>@@ -976,13 +984,15 @@ struct bcmgenet_stats {</div><div class='ctx'> 	enum bcmgenet_stat_type type;</div><div class='ctx'> 	/* reg offset from UMAC base for misc counters */</div><div class='ctx'> 	u16 reg_offset;</div><div class='add'>+	/* sync for u64 stats counters */</div><div class='add'>+	int syncp_offset;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define STAT_NETDEV(m) { \</div><div class='add'>+#define STAT_RTNL(m) { \</div><div class='ctx'> 	.stat_string = __stringify(m), \</div><div class='del'>-	.stat_sizeof = sizeof(((struct net_device_stats *)0)-&gt;m), \</div><div class='del'>-	.stat_offset = offsetof(struct net_device_stats, m), \</div><div class='del'>-	.type = BCMGENET_STAT_NETDEV, \</div><div class='add'>+	.stat_sizeof = sizeof(((struct rtnl_link_stats64 *)0)-&gt;m), \</div><div class='add'>+	.stat_offset = offsetof(struct rtnl_link_stats64, m), \</div><div class='add'>+	.type = BCMGENET_STAT_RTNL, \</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define STAT_GENET_MIB(str, m, _type) { \</div><div class='hunk'>@@ -992,6 +1002,14 @@ struct bcmgenet_stats {</div><div class='ctx'> 	.type = _type, \</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define STAT_GENET_SOFT_MIB64(str, s, m) { \</div><div class='add'>+	.stat_string = str, \</div><div class='add'>+	.stat_sizeof = sizeof(((struct bcmgenet_priv *)0)-&gt;s.m), \</div><div class='add'>+	.stat_offset = offsetof(struct bcmgenet_priv, s.m), \</div><div class='add'>+	.type = BCMGENET_STAT_SOFT64, \</div><div class='add'>+	.syncp_offset = offsetof(struct bcmgenet_priv, s.syncp), \</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define STAT_GENET_MIB_RX(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_MIB_RX)</div><div class='ctx'> #define STAT_GENET_MIB_TX(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_MIB_TX)</div><div class='ctx'> #define STAT_GENET_RUNT(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_RUNT)</div><div class='hunk'>@@ -1006,18 +1024,38 @@ struct bcmgenet_stats {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define STAT_GENET_Q(num) \</div><div class='del'>-	STAT_GENET_SOFT_MIB("txq" __stringify(num) "_packets", \</div><div class='del'>-			tx_rings[num].packets), \</div><div class='del'>-	STAT_GENET_SOFT_MIB("txq" __stringify(num) "_bytes", \</div><div class='del'>-			tx_rings[num].bytes), \</div><div class='del'>-	STAT_GENET_SOFT_MIB("rxq" __stringify(num) "_bytes", \</div><div class='del'>-			rx_rings[num].bytes),	 \</div><div class='del'>-	STAT_GENET_SOFT_MIB("rxq" __stringify(num) "_packets", \</div><div class='del'>-			rx_rings[num].packets), \</div><div class='del'>-	STAT_GENET_SOFT_MIB("rxq" __stringify(num) "_errors", \</div><div class='del'>-			rx_rings[num].errors), \</div><div class='del'>-	STAT_GENET_SOFT_MIB("rxq" __stringify(num) "_dropped", \</div><div class='del'>-			rx_rings[num].dropped)</div><div class='add'>+	STAT_GENET_SOFT_MIB64("txq" __stringify(num) "_packets", \</div><div class='add'>+			tx_rings[num].stats64, packets), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("txq" __stringify(num) "_bytes", \</div><div class='add'>+			tx_rings[num].stats64, bytes), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("txq" __stringify(num) "_errors", \</div><div class='add'>+			tx_rings[num].stats64, errors), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("txq" __stringify(num) "_dropped", \</div><div class='add'>+			tx_rings[num].stats64, dropped), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_bytes", \</div><div class='add'>+			rx_rings[num].stats64, bytes),	 \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_packets", \</div><div class='add'>+			rx_rings[num].stats64, packets), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_errors", \</div><div class='add'>+			rx_rings[num].stats64, errors), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_dropped", \</div><div class='add'>+			rx_rings[num].stats64, dropped), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_multicast", \</div><div class='add'>+			rx_rings[num].stats64, multicast), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_missed", \</div><div class='add'>+			rx_rings[num].stats64, missed), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_length_errors", \</div><div class='add'>+			rx_rings[num].stats64, length_errors), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_over_errors", \</div><div class='add'>+			rx_rings[num].stats64, over_errors), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_crc_errors", \</div><div class='add'>+			rx_rings[num].stats64, crc_errors), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_frame_errors", \</div><div class='add'>+			rx_rings[num].stats64, frame_errors), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_fragmented_errors", \</div><div class='add'>+			rx_rings[num].stats64, fragmented_errors), \</div><div class='add'>+	STAT_GENET_SOFT_MIB64("rxq" __stringify(num) "_broadcast", \</div><div class='add'>+			rx_rings[num].stats64, broadcast)</div><div class='ctx'> </div><div class='ctx'> /* There is a 0xC gap between the end of RX and beginning of TX stats and then</div><div class='ctx'>  * between the end of TX stats and the beginning of the RX RUNT</div><div class='hunk'>@@ -1029,15 +1067,20 @@ struct bcmgenet_stats {</div><div class='ctx'>  */</div><div class='ctx'> static const struct bcmgenet_stats bcmgenet_gstrings_stats[] = {</div><div class='ctx'> 	/* general stats */</div><div class='del'>-	STAT_NETDEV(rx_packets),</div><div class='del'>-	STAT_NETDEV(tx_packets),</div><div class='del'>-	STAT_NETDEV(rx_bytes),</div><div class='del'>-	STAT_NETDEV(tx_bytes),</div><div class='del'>-	STAT_NETDEV(rx_errors),</div><div class='del'>-	STAT_NETDEV(tx_errors),</div><div class='del'>-	STAT_NETDEV(rx_dropped),</div><div class='del'>-	STAT_NETDEV(tx_dropped),</div><div class='del'>-	STAT_NETDEV(multicast),</div><div class='add'>+	STAT_RTNL(rx_packets),</div><div class='add'>+	STAT_RTNL(tx_packets),</div><div class='add'>+	STAT_RTNL(rx_bytes),</div><div class='add'>+	STAT_RTNL(tx_bytes),</div><div class='add'>+	STAT_RTNL(rx_errors),</div><div class='add'>+	STAT_RTNL(tx_errors),</div><div class='add'>+	STAT_RTNL(rx_dropped),</div><div class='add'>+	STAT_RTNL(tx_dropped),</div><div class='add'>+	STAT_RTNL(multicast),</div><div class='add'>+	STAT_RTNL(rx_missed_errors),</div><div class='add'>+	STAT_RTNL(rx_length_errors),</div><div class='add'>+	STAT_RTNL(rx_over_errors),</div><div class='add'>+	STAT_RTNL(rx_crc_errors),</div><div class='add'>+	STAT_RTNL(rx_frame_errors),</div><div class='ctx'> 	/* UniMAC RSV counters */</div><div class='ctx'> 	STAT_GENET_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),</div><div class='ctx'> 	STAT_GENET_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),</div><div class='hunk'>@@ -1120,11 +1163,25 @@ static const struct bcmgenet_stats bcmgenet_gstrings_stats[] = {</div><div class='ctx'> 	STAT_GENET_Q(1),</div><div class='ctx'> 	STAT_GENET_Q(2),</div><div class='ctx'> 	STAT_GENET_Q(3),</div><div class='del'>-	STAT_GENET_Q(16),</div><div class='add'>+	STAT_GENET_Q(4),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define BCMGENET_STATS_LEN	ARRAY_SIZE(bcmgenet_gstrings_stats)</div><div class='ctx'> </div><div class='add'>+#define BCMGENET_STATS64_ADD(stats, m, v) \</div><div class='add'>+	do { \</div><div class='add'>+		u64_stats_update_begin(&amp;stats-&gt;syncp); \</div><div class='add'>+		u64_stats_add(&amp;stats-&gt;m, v); \</div><div class='add'>+		u64_stats_update_end(&amp;stats-&gt;syncp); \</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='add'>+#define BCMGENET_STATS64_INC(stats, m) \</div><div class='add'>+	do { \</div><div class='add'>+		u64_stats_update_begin(&amp;stats-&gt;syncp); \</div><div class='add'>+		u64_stats_inc(&amp;stats-&gt;m); \</div><div class='add'>+		u64_stats_update_end(&amp;stats-&gt;syncp); \</div><div class='add'>+	} while (0)</div><div class='add'>+</div><div class='ctx'> static void bcmgenet_get_drvinfo(struct net_device *dev,</div><div class='ctx'> 				 struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='hunk'>@@ -1144,14 +1201,14 @@ static int bcmgenet_get_sset_count(struct net_device *dev, int string_set)</div><div class='ctx'> static void bcmgenet_get_strings(struct net_device *dev, u32 stringset,</div><div class='ctx'> 				 u8 *data)</div><div class='ctx'> {</div><div class='add'>+	const char *str;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	switch (stringset) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='ctx'> 		for (i = 0; i &lt; BCMGENET_STATS_LEN; i++) {</div><div class='del'>-			memcpy(data + i * ETH_GSTRING_LEN,</div><div class='del'>-			       bcmgenet_gstrings_stats[i].stat_string,</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='add'>+			str = bcmgenet_gstrings_stats[i].stat_string;</div><div class='add'>+			ethtool_puts(&amp;data, str);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1208,8 +1265,9 @@ static void bcmgenet_update_mib_counters(struct bcmgenet_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 		s = &amp;bcmgenet_gstrings_stats[i];</div><div class='ctx'> 		switch (s-&gt;type) {</div><div class='del'>-		case BCMGENET_STAT_NETDEV:</div><div class='add'>+		case BCMGENET_STAT_RTNL:</div><div class='ctx'> 		case BCMGENET_STAT_SOFT:</div><div class='add'>+		case BCMGENET_STAT_SOFT64:</div><div class='ctx'> 			continue;</div><div class='ctx'> 		case BCMGENET_STAT_RUNT:</div><div class='ctx'> 			offset += BCMGENET_STAT_OFFSET;</div><div class='hunk'>@@ -1247,28 +1305,40 @@ static void bcmgenet_get_ethtool_stats(struct net_device *dev,</div><div class='ctx'> 				       u64 *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct rtnl_link_stats64 stats64;</div><div class='add'>+	struct u64_stats_sync *syncp;</div><div class='add'>+	unsigned int start;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev))</div><div class='ctx'> 		bcmgenet_update_mib_counters(priv);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;netdev_ops-&gt;ndo_get_stats(dev);</div><div class='add'>+	dev_get_stats(dev, &amp;stats64);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; BCMGENET_STATS_LEN; i++) {</div><div class='ctx'> 		const struct bcmgenet_stats *s;</div><div class='ctx'> 		char *p;</div><div class='ctx'> </div><div class='ctx'> 		s = &amp;bcmgenet_gstrings_stats[i];</div><div class='del'>-		if (s-&gt;type == BCMGENET_STAT_NETDEV)</div><div class='del'>-			p = (char *)&amp;dev-&gt;stats;</div><div class='del'>-		else</div><div class='del'>-			p = (char *)priv;</div><div class='del'>-		p += s-&gt;stat_offset;</div><div class='del'>-		if (sizeof(unsigned long) != sizeof(u32) &amp;&amp;</div><div class='del'>-		    s-&gt;stat_sizeof == sizeof(unsigned long))</div><div class='del'>-			data[i] = *(unsigned long *)p;</div><div class='del'>-		else</div><div class='del'>-			data[i] = *(u32 *)p;</div><div class='add'>+		p = (char *)priv;</div><div class='add'>+</div><div class='add'>+		if (s-&gt;type == BCMGENET_STAT_SOFT64) {</div><div class='add'>+			syncp = (struct u64_stats_sync *)(p + s-&gt;syncp_offset);</div><div class='add'>+			do {</div><div class='add'>+				start = u64_stats_fetch_begin(syncp);</div><div class='add'>+				data[i] = u64_stats_read((u64_stats_t *)(p + s-&gt;stat_offset));</div><div class='add'>+			} while (u64_stats_fetch_retry(syncp, start));</div><div class='add'>+		} else {</div><div class='add'>+			if (s-&gt;type == BCMGENET_STAT_RTNL)</div><div class='add'>+				p = (char *)&amp;stats64;</div><div class='add'>+</div><div class='add'>+			p += s-&gt;stat_offset;</div><div class='add'>+			if (sizeof(unsigned long) != sizeof(u32) &amp;&amp;</div><div class='add'>+				s-&gt;stat_sizeof == sizeof(unsigned long))</div><div class='add'>+				data[i] = *(unsigned long *)p;</div><div class='add'>+			else</div><div class='add'>+				data[i] = *(u32 *)p;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1438,7 +1508,8 @@ static int bcmgenet_insert_flow(struct net_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cmd-&gt;fs.ring_cookie &gt; priv-&gt;hw_params-&gt;rx_queues &amp;&amp;</div><div class='del'>-	    cmd-&gt;fs.ring_cookie != RX_CLS_FLOW_WAKE) {</div><div class='add'>+	    cmd-&gt;fs.ring_cookie != RX_CLS_FLOW_WAKE &amp;&amp;</div><div class='add'>+	    cmd-&gt;fs.ring_cookie != RX_CLS_FLOW_DISC) {</div><div class='ctx'> 		netdev_err(dev, "rxnfc: Unsupported action (%llu)\n",</div><div class='ctx'> 			   cmd-&gt;fs.ring_cookie);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1472,10 +1543,10 @@ static int bcmgenet_insert_flow(struct net_device *dev,</div><div class='ctx'> 		loc_rule = &amp;priv-&gt;rxnfc_rules[cmd-&gt;fs.location];</div><div class='ctx'> 	}</div><div class='ctx'> 	if (loc_rule-&gt;state == BCMGENET_RXNFC_STATE_ENABLED)</div><div class='del'>-		bcmgenet_hfb_disable_filter(priv, cmd-&gt;fs.location);</div><div class='add'>+		bcmgenet_hfb_disable_filter(priv, cmd-&gt;fs.location + 1);</div><div class='ctx'> 	if (loc_rule-&gt;state != BCMGENET_RXNFC_STATE_UNUSED) {</div><div class='ctx'> 		list_del(&amp;loc_rule-&gt;list);</div><div class='del'>-		bcmgenet_hfb_clear_filter(priv, cmd-&gt;fs.location);</div><div class='add'>+		bcmgenet_hfb_clear_filter(priv, cmd-&gt;fs.location + 1);</div><div class='ctx'> 	}</div><div class='ctx'> 	loc_rule-&gt;state = BCMGENET_RXNFC_STATE_UNUSED;</div><div class='ctx'> 	memcpy(&amp;loc_rule-&gt;fs, &amp;cmd-&gt;fs,</div><div class='hunk'>@@ -1505,10 +1576,10 @@ static int bcmgenet_delete_flow(struct net_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rule-&gt;state == BCMGENET_RXNFC_STATE_ENABLED)</div><div class='del'>-		bcmgenet_hfb_disable_filter(priv, cmd-&gt;fs.location);</div><div class='add'>+		bcmgenet_hfb_disable_filter(priv, cmd-&gt;fs.location + 1);</div><div class='ctx'> 	if (rule-&gt;state != BCMGENET_RXNFC_STATE_UNUSED) {</div><div class='ctx'> 		list_del(&amp;rule-&gt;list);</div><div class='del'>-		bcmgenet_hfb_clear_filter(priv, cmd-&gt;fs.location);</div><div class='add'>+		bcmgenet_hfb_clear_filter(priv, cmd-&gt;fs.location + 1);</div><div class='ctx'> 	}</div><div class='ctx'> 	rule-&gt;state = BCMGENET_RXNFC_STATE_UNUSED;</div><div class='ctx'> 	memset(&amp;rule-&gt;fs, 0, sizeof(struct ethtool_rx_flow_spec));</div><div class='hunk'>@@ -1569,6 +1640,13 @@ static int bcmgenet_get_num_flows(struct bcmgenet_priv *priv)</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 bcmgenet_get_rx_ring_count(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return priv-&gt;hw_params-&gt;rx_queues ?: 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bcmgenet_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 			      u32 *rule_locs)</div><div class='ctx'> {</div><div class='hunk'>@@ -1578,9 +1656,6 @@ static int bcmgenet_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = priv-&gt;hw_params-&gt;rx_queues ?: 1;</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		cmd-&gt;rule_cnt = bcmgenet_get_num_flows(priv);</div><div class='ctx'> 		cmd-&gt;data = MAX_NUM_OF_FS_RULES | RX_CLS_LOC_SPECIAL;</div><div class='hunk'>@@ -1629,6 +1704,7 @@ static const struct ethtool_ops bcmgenet_ethtool_ops = {</div><div class='ctx'> 	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> 	.get_rxnfc		= bcmgenet_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= bcmgenet_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= bcmgenet_get_rx_ring_count,</div><div class='ctx'> 	.get_pauseparam		= bcmgenet_get_pauseparam,</div><div class='ctx'> 	.set_pauseparam		= bcmgenet_set_pauseparam,</div><div class='ctx'> };</div><div class='hunk'>@@ -1651,9 +1727,9 @@ static int bcmgenet_power_down(struct bcmgenet_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	case GENET_POWER_PASSIVE:</div><div class='ctx'> 		/* Power down LED */</div><div class='del'>-		if (priv-&gt;hw_params-&gt;flags &amp; GENET_HAS_EXT) {</div><div class='add'>+		if (bcmgenet_has_ext(priv)) {</div><div class='ctx'> 			reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT);</div><div class='del'>-			if (GENET_IS_V5(priv) &amp;&amp; !priv-&gt;ephy_16nm)</div><div class='add'>+			if (GENET_IS_V5(priv) &amp;&amp; !bcmgenet_has_ephy_16nm(priv))</div><div class='ctx'> 				reg |= EXT_PWR_DOWN_PHY_EN |</div><div class='ctx'> 				       EXT_PWR_DOWN_PHY_RD |</div><div class='ctx'> 				       EXT_PWR_DOWN_PHY_SD |</div><div class='hunk'>@@ -1676,13 +1752,14 @@ static int bcmgenet_power_down(struct bcmgenet_priv *priv,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcmgenet_power_up(struct bcmgenet_priv *priv,</div><div class='del'>-			      enum bcmgenet_power_mode mode)</div><div class='add'>+static int bcmgenet_power_up(struct bcmgenet_priv *priv,</div><div class='add'>+			     enum bcmgenet_power_mode mode)</div><div class='ctx'> {</div><div class='add'>+	int ret = 0;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	if (!(priv-&gt;hw_params-&gt;flags &amp; GENET_HAS_EXT))</div><div class='del'>-		return;</div><div class='add'>+	if (!bcmgenet_has_ext(priv))</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT);</div><div class='ctx'> </div><div class='hunk'>@@ -1690,7 +1767,7 @@ static void bcmgenet_power_up(struct bcmgenet_priv *priv,</div><div class='ctx'> 	case GENET_POWER_PASSIVE:</div><div class='ctx'> 		reg &amp;= ~(EXT_PWR_DOWN_DLL | EXT_PWR_DOWN_BIAS |</div><div class='ctx'> 			 EXT_ENERGY_DET_MASK);</div><div class='del'>-		if (GENET_IS_V5(priv) &amp;&amp; !priv-&gt;ephy_16nm) {</div><div class='add'>+		if (GENET_IS_V5(priv) &amp;&amp; !bcmgenet_has_ephy_16nm(priv)) {</div><div class='ctx'> 			reg &amp;= ~(EXT_PWR_DOWN_PHY_EN |</div><div class='ctx'> 				 EXT_PWR_DOWN_PHY_RD |</div><div class='ctx'> 				 EXT_PWR_DOWN_PHY_SD |</div><div class='hunk'>@@ -1718,11 +1795,13 @@ static void bcmgenet_power_up(struct bcmgenet_priv *priv,</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case GENET_POWER_WOL_MAGIC:</div><div class='del'>-		bcmgenet_wol_power_up_cfg(priv, mode);</div><div class='del'>-		return;</div><div class='add'>+		ret = bcmgenet_wol_power_up_cfg(priv, mode);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct enet_cb *bcmgenet_get_txcb(struct bcmgenet_priv *priv,</div><div class='hunk'>@@ -1759,18 +1838,6 @@ static struct enet_cb *bcmgenet_put_txcb(struct bcmgenet_priv *priv,</div><div class='ctx'> 	return tx_cb_ptr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bcmgenet_rx_ring16_int_disable(struct bcmgenet_rx_ring *ring)</div><div class='del'>-{</div><div class='del'>-	bcmgenet_intrl2_0_writel(ring-&gt;priv, UMAC_IRQ_RXDMA_DONE,</div><div class='del'>-				 INTRL2_CPU_MASK_SET);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void bcmgenet_rx_ring16_int_enable(struct bcmgenet_rx_ring *ring)</div><div class='del'>-{</div><div class='del'>-	bcmgenet_intrl2_0_writel(ring-&gt;priv, UMAC_IRQ_RXDMA_DONE,</div><div class='del'>-				 INTRL2_CPU_MASK_CLEAR);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void bcmgenet_rx_ring_int_disable(struct bcmgenet_rx_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	bcmgenet_intrl2_1_writel(ring-&gt;priv,</div><div class='hunk'>@@ -1785,18 +1852,6 @@ static inline void bcmgenet_rx_ring_int_enable(struct bcmgenet_rx_ring *ring)</div><div class='ctx'> 				 INTRL2_CPU_MASK_CLEAR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void bcmgenet_tx_ring16_int_disable(struct bcmgenet_tx_ring *ring)</div><div class='del'>-{</div><div class='del'>-	bcmgenet_intrl2_0_writel(ring-&gt;priv, UMAC_IRQ_TXDMA_DONE,</div><div class='del'>-				 INTRL2_CPU_MASK_SET);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void bcmgenet_tx_ring16_int_enable(struct bcmgenet_tx_ring *ring)</div><div class='del'>-{</div><div class='del'>-	bcmgenet_intrl2_0_writel(ring-&gt;priv, UMAC_IRQ_TXDMA_DONE,</div><div class='del'>-				 INTRL2_CPU_MASK_CLEAR);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void bcmgenet_tx_ring_int_enable(struct bcmgenet_tx_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	bcmgenet_intrl2_1_writel(ring-&gt;priv, 1 &lt;&lt; ring-&gt;index,</div><div class='hunk'>@@ -1868,6 +1923,7 @@ static struct sk_buff *bcmgenet_free_rx_cb(struct device *dev,</div><div class='ctx'> static unsigned int __bcmgenet_tx_reclaim(struct net_device *dev,</div><div class='ctx'> 					  struct bcmgenet_tx_ring *ring)</div><div class='ctx'> {</div><div class='add'>+	struct bcmgenet_tx_stats64 *stats = &amp;ring-&gt;stats64;</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	unsigned int txbds_processed = 0;</div><div class='ctx'> 	unsigned int bytes_compl = 0;</div><div class='hunk'>@@ -1877,12 +1933,7 @@ static unsigned int __bcmgenet_tx_reclaim(struct net_device *dev,</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear status before servicing to reduce spurious interrupts */</div><div class='del'>-	if (ring-&gt;index == DESC_INDEX)</div><div class='del'>-		bcmgenet_intrl2_0_writel(priv, UMAC_IRQ_TXDMA_DONE,</div><div class='del'>-					 INTRL2_CPU_CLEAR);</div><div class='del'>-	else</div><div class='del'>-		bcmgenet_intrl2_1_writel(priv, (1 &lt;&lt; ring-&gt;index),</div><div class='del'>-					 INTRL2_CPU_CLEAR);</div><div class='add'>+	bcmgenet_intrl2_1_writel(priv, (1 &lt;&lt; ring-&gt;index), INTRL2_CPU_CLEAR);</div><div class='ctx'> </div><div class='ctx'> 	/* Compute how many buffers are transmitted since last xmit call */</div><div class='ctx'> 	c_index = bcmgenet_tdma_ring_readl(priv, ring-&gt;index, TDMA_CONS_INDEX)</div><div class='hunk'>@@ -1913,22 +1964,51 @@ static unsigned int __bcmgenet_tx_reclaim(struct net_device *dev,</div><div class='ctx'> 	ring-&gt;free_bds += txbds_processed;</div><div class='ctx'> 	ring-&gt;c_index = c_index;</div><div class='ctx'> </div><div class='del'>-	ring-&gt;packets += pkts_compl;</div><div class='del'>-	ring-&gt;bytes += bytes_compl;</div><div class='add'>+	u64_stats_update_begin(&amp;stats-&gt;syncp);</div><div class='add'>+	u64_stats_add(&amp;stats-&gt;packets, pkts_compl);</div><div class='add'>+	u64_stats_add(&amp;stats-&gt;bytes, bytes_compl);</div><div class='add'>+	u64_stats_update_end(&amp;stats-&gt;syncp);</div><div class='ctx'> </div><div class='del'>-	netdev_tx_completed_queue(netdev_get_tx_queue(dev, ring-&gt;queue),</div><div class='add'>+	netdev_tx_completed_queue(netdev_get_tx_queue(dev, ring-&gt;index),</div><div class='ctx'> 				  pkts_compl, bytes_compl);</div><div class='ctx'> </div><div class='ctx'> 	return txbds_processed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int bcmgenet_tx_reclaim(struct net_device *dev,</div><div class='del'>-				struct bcmgenet_tx_ring *ring)</div><div class='add'>+				struct bcmgenet_tx_ring *ring,</div><div class='add'>+				bool all)</div><div class='ctx'> {</div><div class='del'>-	unsigned int released;</div><div class='add'>+	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct device *kdev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	unsigned int released, drop, wr_ptr;</div><div class='add'>+	struct enet_cb *cb_ptr;</div><div class='add'>+	struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;ring-&gt;lock);</div><div class='ctx'> 	released = __bcmgenet_tx_reclaim(dev, ring);</div><div class='add'>+	if (all) {</div><div class='add'>+		skb = NULL;</div><div class='add'>+		drop = (ring-&gt;prod_index - ring-&gt;c_index) &amp; DMA_C_INDEX_MASK;</div><div class='add'>+		released += drop;</div><div class='add'>+		ring-&gt;prod_index = ring-&gt;c_index &amp; DMA_C_INDEX_MASK;</div><div class='add'>+		while (drop--) {</div><div class='add'>+			cb_ptr = bcmgenet_put_txcb(priv, ring);</div><div class='add'>+			skb = cb_ptr-&gt;skb;</div><div class='add'>+			bcmgenet_free_tx_cb(kdev, cb_ptr);</div><div class='add'>+			if (skb &amp;&amp; cb_ptr == GENET_CB(skb)-&gt;first_cb) {</div><div class='add'>+				dev_consume_skb_any(skb);</div><div class='add'>+				skb = NULL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (skb)</div><div class='add'>+			dev_consume_skb_any(skb);</div><div class='add'>+		bcmgenet_tdma_ring_writel(priv, ring-&gt;index,</div><div class='add'>+					  ring-&gt;prod_index, TDMA_PROD_INDEX);</div><div class='add'>+		wr_ptr = ring-&gt;write_ptr * WORDS_PER_BD(priv);</div><div class='add'>+		bcmgenet_tdma_ring_writel(priv, ring-&gt;index, wr_ptr,</div><div class='add'>+					  TDMA_WRITE_PTR);</div><div class='add'>+	}</div><div class='ctx'> 	spin_unlock_bh(&amp;ring-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return released;</div><div class='hunk'>@@ -1944,14 +2024,14 @@ static int bcmgenet_tx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	spin_lock(&amp;ring-&gt;lock);</div><div class='ctx'> 	work_done = __bcmgenet_tx_reclaim(ring-&gt;priv-&gt;dev, ring);</div><div class='ctx'> 	if (ring-&gt;free_bds &gt; (MAX_SKB_FRAGS + 1)) {</div><div class='del'>-		txq = netdev_get_tx_queue(ring-&gt;priv-&gt;dev, ring-&gt;queue);</div><div class='add'>+		txq = netdev_get_tx_queue(ring-&gt;priv-&gt;dev, ring-&gt;index);</div><div class='ctx'> 		netif_tx_wake_queue(txq);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock(&amp;ring-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (work_done == 0) {</div><div class='ctx'> 		napi_complete(napi);</div><div class='del'>-		ring-&gt;int_enable(ring);</div><div class='add'>+		bcmgenet_tx_ring_int_enable(ring);</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1962,22 +2042,21 @@ static int bcmgenet_tx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> static void bcmgenet_tx_reclaim_all(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (netif_is_multiqueue(dev)) {</div><div class='del'>-		for (i = 0; i &lt; priv-&gt;hw_params-&gt;tx_queues; i++)</div><div class='del'>-			bcmgenet_tx_reclaim(dev, &amp;priv-&gt;tx_rings[i]);</div><div class='del'>-	}</div><div class='add'>+	int i = 0;</div><div class='ctx'> </div><div class='del'>-	bcmgenet_tx_reclaim(dev, &amp;priv-&gt;tx_rings[DESC_INDEX]);</div><div class='add'>+	do {</div><div class='add'>+		bcmgenet_tx_reclaim(dev, &amp;priv-&gt;tx_rings[i++], true);</div><div class='add'>+	} while (i &lt;= priv-&gt;hw_params-&gt;tx_queues &amp;&amp; netif_is_multiqueue(dev));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Reallocate the SKB to put enough headroom in front of it and insert</div><div class='ctx'>  * the transmit checksum offsets in the descriptors</div><div class='ctx'>  */</div><div class='ctx'> static struct sk_buff *bcmgenet_add_tsb(struct net_device *dev,</div><div class='del'>-					struct sk_buff *skb)</div><div class='add'>+					struct sk_buff *skb,</div><div class='add'>+					struct bcmgenet_tx_ring *ring)</div><div class='ctx'> {</div><div class='add'>+	struct bcmgenet_tx_stats64 *stats = &amp;ring-&gt;stats64;</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct status_64 *status = NULL;</div><div class='ctx'> 	struct sk_buff *new_skb;</div><div class='hunk'>@@ -1994,7 +2073,7 @@ static struct sk_buff *bcmgenet_add_tsb(struct net_device *dev,</div><div class='ctx'> 		if (!new_skb) {</div><div class='ctx'> 			dev_kfree_skb_any(skb);</div><div class='ctx'> 			priv-&gt;mib.tx_realloc_tsb_failed++;</div><div class='del'>-			dev-&gt;stats.tx_dropped++;</div><div class='add'>+			BCMGENET_STATS64_INC(stats, dropped);</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 		dev_consume_skb_any(skb);</div><div class='hunk'>@@ -2057,19 +2136,14 @@ static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	index = skb_get_queue_mapping(skb);</div><div class='ctx'> 	/* Mapping strategy:</div><div class='del'>-	 * queue_mapping = 0, unclassified, packet xmited through ring16</div><div class='del'>-	 * queue_mapping = 1, goes to ring 0. (highest priority queue</div><div class='del'>-	 * queue_mapping = 2, goes to ring 1.</div><div class='del'>-	 * queue_mapping = 3, goes to ring 2.</div><div class='del'>-	 * queue_mapping = 4, goes to ring 3.</div><div class='add'>+	 * queue_mapping = 0, unclassified, packet xmited through ring 0</div><div class='add'>+	 * queue_mapping = 1, goes to ring 1. (highest priority queue)</div><div class='add'>+	 * queue_mapping = 2, goes to ring 2.</div><div class='add'>+	 * queue_mapping = 3, goes to ring 3.</div><div class='add'>+	 * queue_mapping = 4, goes to ring 4.</div><div class='ctx'> 	 */</div><div class='del'>-	if (index == 0)</div><div class='del'>-		index = DESC_INDEX;</div><div class='del'>-	else</div><div class='del'>-		index -= 1;</div><div class='del'>-</div><div class='ctx'> 	ring = &amp;priv-&gt;tx_rings[index];</div><div class='del'>-	txq = netdev_get_tx_queue(dev, ring-&gt;queue);</div><div class='add'>+	txq = netdev_get_tx_queue(dev, index);</div><div class='ctx'> </div><div class='ctx'> 	nr_frags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='ctx'> </div><div class='hunk'>@@ -2087,7 +2161,7 @@ static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	GENET_CB(skb)-&gt;bytes_sent = skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	/* add the Transmit Status Block */</div><div class='del'>-	skb = bcmgenet_add_tsb(dev, skb);</div><div class='add'>+	skb = bcmgenet_add_tsb(dev, skb, ring);</div><div class='ctx'> 	if (!skb) {</div><div class='ctx'> 		ret = NETDEV_TX_OK;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -2229,6 +2303,7 @@ static struct sk_buff *bcmgenet_rx_refill(struct bcmgenet_priv *priv,</div><div class='ctx'> static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,</div><div class='ctx'> 				     unsigned int budget)</div><div class='ctx'> {</div><div class='add'>+	struct bcmgenet_rx_stats64 *stats = &amp;ring-&gt;stats64;</div><div class='ctx'> 	struct bcmgenet_priv *priv = ring-&gt;priv;</div><div class='ctx'> 	struct net_device *dev = priv-&gt;dev;</div><div class='ctx'> 	struct enet_cb *cb;</div><div class='hunk'>@@ -2242,15 +2317,8 @@ static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,</div><div class='ctx'> 	unsigned int discards;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear status before servicing to reduce spurious interrupts */</div><div class='del'>-	if (ring-&gt;index == DESC_INDEX) {</div><div class='del'>-		bcmgenet_intrl2_0_writel(priv, UMAC_IRQ_RXDMA_DONE,</div><div class='del'>-					 INTRL2_CPU_CLEAR);</div><div class='del'>-	} else {</div><div class='del'>-		mask = 1 &lt;&lt; (UMAC_IRQ1_RX_INTR_SHIFT + ring-&gt;index);</div><div class='del'>-		bcmgenet_intrl2_1_writel(priv,</div><div class='del'>-					 mask,</div><div class='del'>-					 INTRL2_CPU_CLEAR);</div><div class='del'>-	}</div><div class='add'>+	mask = 1 &lt;&lt; (UMAC_IRQ1_RX_INTR_SHIFT + ring-&gt;index);</div><div class='add'>+	bcmgenet_intrl2_1_writel(priv, mask, INTRL2_CPU_CLEAR);</div><div class='ctx'> </div><div class='ctx'> 	p_index = bcmgenet_rdma_ring_readl(priv, ring-&gt;index, RDMA_PROD_INDEX);</div><div class='ctx'> </div><div class='hunk'>@@ -2258,7 +2326,7 @@ static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,</div><div class='ctx'> 		   DMA_P_INDEX_DISCARD_CNT_MASK;</div><div class='ctx'> 	if (discards &gt; ring-&gt;old_discards) {</div><div class='ctx'> 		discards = discards - ring-&gt;old_discards;</div><div class='del'>-		ring-&gt;errors += discards;</div><div class='add'>+		BCMGENET_STATS64_ADD(stats, missed, discards);</div><div class='ctx'> 		ring-&gt;old_discards += discards;</div><div class='ctx'> </div><div class='ctx'> 		/* Clear HW register when we reach 75% of maximum 0xFFFF */</div><div class='hunk'>@@ -2284,7 +2352,7 @@ static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,</div><div class='ctx'> 		skb = bcmgenet_rx_refill(priv, cb);</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(!skb)) {</div><div class='del'>-			ring-&gt;dropped++;</div><div class='add'>+			BCMGENET_STATS64_INC(stats, dropped);</div><div class='ctx'> 			goto next;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2311,8 +2379,7 @@ static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(len &gt; RX_BUF_LENGTH)) {</div><div class='ctx'> 			netif_err(priv, rx_status, dev, "oversized packet\n");</div><div class='del'>-			dev-&gt;stats.rx_length_errors++;</div><div class='del'>-			dev-&gt;stats.rx_errors++;</div><div class='add'>+			BCMGENET_STATS64_INC(stats, length_errors);</div><div class='ctx'> 			dev_kfree_skb_any(skb);</div><div class='ctx'> 			goto next;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2320,7 +2387,7 @@ static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,</div><div class='ctx'> 		if (unlikely(!(dma_flag &amp; DMA_EOP) || !(dma_flag &amp; DMA_SOP))) {</div><div class='ctx'> 			netif_err(priv, rx_status, dev,</div><div class='ctx'> 				  "dropping fragmented packet!\n");</div><div class='del'>-			ring-&gt;errors++;</div><div class='add'>+			BCMGENET_STATS64_INC(stats, fragmented_errors);</div><div class='ctx'> 			dev_kfree_skb_any(skb);</div><div class='ctx'> 			goto next;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2333,15 +2400,22 @@ static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,</div><div class='ctx'> 						DMA_RX_RXER))) {</div><div class='ctx'> 			netif_err(priv, rx_status, dev, "dma_flag=0x%x\n",</div><div class='ctx'> 				  (unsigned int)dma_flag);</div><div class='add'>+			u64_stats_update_begin(&amp;stats-&gt;syncp);</div><div class='ctx'> 			if (dma_flag &amp; DMA_RX_CRC_ERROR)</div><div class='del'>-				dev-&gt;stats.rx_crc_errors++;</div><div class='add'>+				u64_stats_inc(&amp;stats-&gt;crc_errors);</div><div class='ctx'> 			if (dma_flag &amp; DMA_RX_OV)</div><div class='del'>-				dev-&gt;stats.rx_over_errors++;</div><div class='add'>+				u64_stats_inc(&amp;stats-&gt;over_errors);</div><div class='ctx'> 			if (dma_flag &amp; DMA_RX_NO)</div><div class='del'>-				dev-&gt;stats.rx_frame_errors++;</div><div class='add'>+				u64_stats_inc(&amp;stats-&gt;frame_errors);</div><div class='ctx'> 			if (dma_flag &amp; DMA_RX_LG)</div><div class='del'>-				dev-&gt;stats.rx_length_errors++;</div><div class='del'>-			dev-&gt;stats.rx_errors++;</div><div class='add'>+				u64_stats_inc(&amp;stats-&gt;length_errors);</div><div class='add'>+			if ((dma_flag &amp; (DMA_RX_CRC_ERROR |</div><div class='add'>+						DMA_RX_OV |</div><div class='add'>+						DMA_RX_NO |</div><div class='add'>+						DMA_RX_LG |</div><div class='add'>+						DMA_RX_RXER)) == DMA_RX_RXER)</div><div class='add'>+				u64_stats_inc(&amp;stats-&gt;errors);</div><div class='add'>+			u64_stats_update_end(&amp;stats-&gt;syncp);</div><div class='ctx'> 			dev_kfree_skb_any(skb);</div><div class='ctx'> 			goto next;</div><div class='ctx'> 		} /* error packet */</div><div class='hunk'>@@ -2361,10 +2435,15 @@ static unsigned int bcmgenet_desc_rx(struct bcmgenet_rx_ring *ring,</div><div class='ctx'> </div><div class='ctx'> 		/*Finish setting up the received SKB and send it to the kernel*/</div><div class='ctx'> 		skb-&gt;protocol = eth_type_trans(skb, priv-&gt;dev);</div><div class='del'>-		ring-&gt;packets++;</div><div class='del'>-		ring-&gt;bytes += len;</div><div class='add'>+</div><div class='add'>+		u64_stats_update_begin(&amp;stats-&gt;syncp);</div><div class='add'>+		u64_stats_inc(&amp;stats-&gt;packets);</div><div class='add'>+		u64_stats_add(&amp;stats-&gt;bytes, len);</div><div class='ctx'> 		if (dma_flag &amp; DMA_RX_MULT)</div><div class='del'>-			dev-&gt;stats.multicast++;</div><div class='add'>+			u64_stats_inc(&amp;stats-&gt;multicast);</div><div class='add'>+		else if (dma_flag &amp; DMA_RX_BRDCAST)</div><div class='add'>+			u64_stats_inc(&amp;stats-&gt;broadcast);</div><div class='add'>+		u64_stats_update_end(&amp;stats-&gt;syncp);</div><div class='ctx'> </div><div class='ctx'> 		/* Notify kernel */</div><div class='ctx'> 		napi_gro_receive(&amp;ring-&gt;napi, skb);</div><div class='hunk'>@@ -2397,10 +2476,8 @@ static int bcmgenet_rx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	work_done = bcmgenet_desc_rx(ring, budget);</div><div class='ctx'> </div><div class='del'>-	if (work_done &lt; budget) {</div><div class='del'>-		napi_complete_done(napi, work_done);</div><div class='del'>-		ring-&gt;int_enable(ring);</div><div class='del'>-	}</div><div class='add'>+	if (work_done &lt; budget &amp;&amp; napi_complete_done(napi, work_done))</div><div class='add'>+		bcmgenet_rx_ring_int_enable(ring);</div><div class='ctx'> </div><div class='ctx'> 	if (ring-&gt;dim.use_dim) {</div><div class='ctx'> 		dim_update_sample(ring-&gt;dim.event_ctr, ring-&gt;dim.packets,</div><div class='hunk'>@@ -2523,7 +2600,7 @@ static void bcmgenet_link_intr_enable(struct bcmgenet_priv *priv)</div><div class='ctx'> 	} else if (priv-&gt;ext_phy) {</div><div class='ctx'> 		int0_enable |= UMAC_IRQ_LINK_EVENT;</div><div class='ctx'> 	} else if (priv-&gt;phy_interface == PHY_INTERFACE_MODE_MOCA) {</div><div class='del'>-		if (priv-&gt;hw_params-&gt;flags &amp; GENET_HAS_MOCA_LINK_DET)</div><div class='add'>+		if (bcmgenet_has_moca_link_det(priv))</div><div class='ctx'> 			int0_enable |= UMAC_IRQ_LINK_EVENT;</div><div class='ctx'> 	}</div><div class='ctx'> 	bcmgenet_intrl2_0_writel(priv, int0_enable, INTRL2_CPU_MASK_CLEAR);</div><div class='hunk'>@@ -2588,8 +2665,8 @@ static void init_umac(struct bcmgenet_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable MDIO interrupts on GENET v3+ */</div><div class='del'>-	if (priv-&gt;hw_params-&gt;flags &amp; GENET_HAS_MDIO_INTR)</div><div class='del'>-		int0_enable |= (UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR);</div><div class='add'>+	if (bcmgenet_has_mdio_intr(priv))</div><div class='add'>+		int0_enable |= UMAC_IRQ_MDIO_EVENT;</div><div class='ctx'> </div><div class='ctx'> 	bcmgenet_intrl2_0_writel(priv, int0_enable, INTRL2_CPU_MASK_CLEAR);</div><div class='ctx'> </div><div class='hunk'>@@ -2639,15 +2716,6 @@ static void bcmgenet_init_tx_ring(struct bcmgenet_priv *priv,</div><div class='ctx'> 	spin_lock_init(&amp;ring-&gt;lock);</div><div class='ctx'> 	ring-&gt;priv = priv;</div><div class='ctx'> 	ring-&gt;index = index;</div><div class='del'>-	if (index == DESC_INDEX) {</div><div class='del'>-		ring-&gt;queue = 0;</div><div class='del'>-		ring-&gt;int_enable = bcmgenet_tx_ring16_int_enable;</div><div class='del'>-		ring-&gt;int_disable = bcmgenet_tx_ring16_int_disable;</div><div class='del'>-	} else {</div><div class='del'>-		ring-&gt;queue = index + 1;</div><div class='del'>-		ring-&gt;int_enable = bcmgenet_tx_ring_int_enable;</div><div class='del'>-		ring-&gt;int_disable = bcmgenet_tx_ring_int_disable;</div><div class='del'>-	}</div><div class='ctx'> 	ring-&gt;cbs = priv-&gt;tx_cbs + start_ptr;</div><div class='ctx'> 	ring-&gt;size = size;</div><div class='ctx'> 	ring-&gt;clean_ptr = start_ptr;</div><div class='hunk'>@@ -2658,8 +2726,8 @@ static void bcmgenet_init_tx_ring(struct bcmgenet_priv *priv,</div><div class='ctx'> 	ring-&gt;end_ptr = end_ptr - 1;</div><div class='ctx'> 	ring-&gt;prod_index = 0;</div><div class='ctx'> </div><div class='del'>-	/* Set flow period for ring != 16 */</div><div class='del'>-	if (index != DESC_INDEX)</div><div class='add'>+	/* Set flow period for ring != 0 */</div><div class='add'>+	if (index)</div><div class='ctx'> 		flow_period_val = ENET_MAX_MTU_SIZE &lt;&lt; 16;</div><div class='ctx'> </div><div class='ctx'> 	bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_PROD_INDEX);</div><div class='hunk'>@@ -2697,13 +2765,6 @@ static int bcmgenet_init_rx_ring(struct bcmgenet_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	ring-&gt;priv = priv;</div><div class='ctx'> 	ring-&gt;index = index;</div><div class='del'>-	if (index == DESC_INDEX) {</div><div class='del'>-		ring-&gt;int_enable = bcmgenet_rx_ring16_int_enable;</div><div class='del'>-		ring-&gt;int_disable = bcmgenet_rx_ring16_int_disable;</div><div class='del'>-	} else {</div><div class='del'>-		ring-&gt;int_enable = bcmgenet_rx_ring_int_enable;</div><div class='del'>-		ring-&gt;int_disable = bcmgenet_rx_ring_int_disable;</div><div class='del'>-	}</div><div class='ctx'> 	ring-&gt;cbs = priv-&gt;rx_cbs + start_ptr;</div><div class='ctx'> 	ring-&gt;size = size;</div><div class='ctx'> 	ring-&gt;c_index = 0;</div><div class='hunk'>@@ -2749,15 +2810,11 @@ static void bcmgenet_enable_tx_napi(struct bcmgenet_priv *priv)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	struct bcmgenet_tx_ring *ring;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;tx_queues; ++i) {</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;tx_queues; ++i) {</div><div class='ctx'> 		ring = &amp;priv-&gt;tx_rings[i];</div><div class='ctx'> 		napi_enable(&amp;ring-&gt;napi);</div><div class='del'>-		ring-&gt;int_enable(ring);</div><div class='add'>+		bcmgenet_tx_ring_int_enable(ring);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	ring = &amp;priv-&gt;tx_rings[DESC_INDEX];</div><div class='del'>-	napi_enable(&amp;ring-&gt;napi);</div><div class='del'>-	ring-&gt;int_enable(ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcmgenet_disable_tx_napi(struct bcmgenet_priv *priv)</div><div class='hunk'>@@ -2765,13 +2822,10 @@ static void bcmgenet_disable_tx_napi(struct bcmgenet_priv *priv)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	struct bcmgenet_tx_ring *ring;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;tx_queues; ++i) {</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;tx_queues; ++i) {</div><div class='ctx'> 		ring = &amp;priv-&gt;tx_rings[i];</div><div class='ctx'> 		napi_disable(&amp;ring-&gt;napi);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	ring = &amp;priv-&gt;tx_rings[DESC_INDEX];</div><div class='del'>-	napi_disable(&amp;ring-&gt;napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcmgenet_fini_tx_napi(struct bcmgenet_priv *priv)</div><div class='hunk'>@@ -2779,82 +2833,104 @@ static void bcmgenet_fini_tx_napi(struct bcmgenet_priv *priv)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	struct bcmgenet_tx_ring *ring;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;tx_queues; ++i) {</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;tx_queues; ++i) {</div><div class='ctx'> 		ring = &amp;priv-&gt;tx_rings[i];</div><div class='ctx'> 		netif_napi_del(&amp;ring-&gt;napi);</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcmgenet_tdma_disable(struct bcmgenet_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int timeout = 0;</div><div class='add'>+	u32 reg, mask;</div><div class='add'>+</div><div class='add'>+	reg = bcmgenet_tdma_readl(priv, DMA_CTRL);</div><div class='add'>+	mask = (1 &lt;&lt; (priv-&gt;hw_params-&gt;tx_queues + 1)) - 1;</div><div class='add'>+	mask = (mask &lt;&lt; DMA_RING_BUF_EN_SHIFT) | DMA_EN;</div><div class='add'>+	reg &amp;= ~mask;</div><div class='add'>+	bcmgenet_tdma_writel(priv, reg, DMA_CTRL);</div><div class='add'>+</div><div class='add'>+	/* Check DMA status register to confirm DMA is disabled */</div><div class='add'>+	while (timeout++ &lt; DMA_TIMEOUT_VAL) {</div><div class='add'>+		reg = bcmgenet_tdma_readl(priv, DMA_STATUS);</div><div class='add'>+		if ((reg &amp; mask) == mask)</div><div class='add'>+			return 0;</div><div class='ctx'> </div><div class='del'>-	ring = &amp;priv-&gt;tx_rings[DESC_INDEX];</div><div class='del'>-	netif_napi_del(&amp;ring-&gt;napi);</div><div class='add'>+		udelay(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcmgenet_rdma_disable(struct bcmgenet_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int timeout = 0;</div><div class='add'>+	u32 reg, mask;</div><div class='add'>+</div><div class='add'>+	reg = bcmgenet_rdma_readl(priv, DMA_CTRL);</div><div class='add'>+	mask = (1 &lt;&lt; (priv-&gt;hw_params-&gt;rx_queues + 1)) - 1;</div><div class='add'>+	mask = (mask &lt;&lt; DMA_RING_BUF_EN_SHIFT) | DMA_EN;</div><div class='add'>+	reg &amp;= ~mask;</div><div class='add'>+	bcmgenet_rdma_writel(priv, reg, DMA_CTRL);</div><div class='add'>+</div><div class='add'>+	/* Check DMA status register to confirm DMA is disabled */</div><div class='add'>+	while (timeout++ &lt; DMA_TIMEOUT_VAL) {</div><div class='add'>+		reg = bcmgenet_rdma_readl(priv, DMA_STATUS);</div><div class='add'>+		if ((reg &amp; mask) == mask)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		udelay(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initialize Tx queues</div><div class='ctx'>  *</div><div class='del'>- * Queues 0-3 are priority-based, each one has 32 descriptors,</div><div class='del'>- * with queue 0 being the highest priority queue.</div><div class='add'>+ * Queues 1-4 are priority-based, each one has 32 descriptors,</div><div class='add'>+ * with queue 1 being the highest priority queue.</div><div class='ctx'>  *</div><div class='del'>- * Queue 16 is the default Tx queue with</div><div class='del'>- * GENET_Q16_TX_BD_CNT = 256 - 4 * 32 = 128 descriptors.</div><div class='add'>+ * Queue 0 is the default Tx queue with</div><div class='add'>+ * GENET_Q0_TX_BD_CNT = 256 - 4 * 32 = 128 descriptors.</div><div class='ctx'>  *</div><div class='ctx'>  * The transmit control block pool is then partitioned as follows:</div><div class='del'>- * - Tx queue 0 uses tx_cbs[0..31]</div><div class='del'>- * - Tx queue 1 uses tx_cbs[32..63]</div><div class='del'>- * - Tx queue 2 uses tx_cbs[64..95]</div><div class='del'>- * - Tx queue 3 uses tx_cbs[96..127]</div><div class='del'>- * - Tx queue 16 uses tx_cbs[128..255]</div><div class='add'>+ * - Tx queue 0 uses tx_cbs[0..127]</div><div class='add'>+ * - Tx queue 1 uses tx_cbs[128..159]</div><div class='add'>+ * - Tx queue 2 uses tx_cbs[160..191]</div><div class='add'>+ * - Tx queue 3 uses tx_cbs[192..223]</div><div class='add'>+ * - Tx queue 4 uses tx_cbs[224..255]</div><div class='ctx'>  */</div><div class='ctx'> static void bcmgenet_init_tx_queues(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 i, dma_enable;</div><div class='del'>-	u32 dma_ctrl, ring_cfg;</div><div class='del'>-	u32 dma_priority[3] = {0, 0, 0};</div><div class='del'>-</div><div class='del'>-	dma_ctrl = bcmgenet_tdma_readl(priv, DMA_CTRL);</div><div class='del'>-	dma_enable = dma_ctrl &amp; DMA_EN;</div><div class='del'>-	dma_ctrl &amp;= ~DMA_EN;</div><div class='del'>-	bcmgenet_tdma_writel(priv, dma_ctrl, DMA_CTRL);</div><div class='del'>-</div><div class='del'>-	dma_ctrl = 0;</div><div class='del'>-	ring_cfg = 0;</div><div class='add'>+	unsigned int start = 0, end = GENET_Q0_TX_BD_CNT;</div><div class='add'>+	u32 i, ring_mask, dma_priority[3] = {0, 0, 0};</div><div class='ctx'> </div><div class='ctx'> 	/* Enable strict priority arbiter mode */</div><div class='ctx'> 	bcmgenet_tdma_writel(priv, DMA_ARBITER_SP, DMA_ARB_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize Tx priority queues */</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;tx_queues; i++) {</div><div class='del'>-		bcmgenet_init_tx_ring(priv, i, priv-&gt;hw_params-&gt;tx_bds_per_q,</div><div class='del'>-				      i * priv-&gt;hw_params-&gt;tx_bds_per_q,</div><div class='del'>-				      (i + 1) * priv-&gt;hw_params-&gt;tx_bds_per_q);</div><div class='del'>-		ring_cfg |= (1 &lt;&lt; i);</div><div class='del'>-		dma_ctrl |= (1 &lt;&lt; (i + DMA_RING_BUF_EN_SHIFT));</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;tx_queues; i++) {</div><div class='add'>+		bcmgenet_init_tx_ring(priv, i, end - start, start, end);</div><div class='add'>+		start = end;</div><div class='add'>+		end += priv-&gt;hw_params-&gt;tx_bds_per_q;</div><div class='ctx'> 		dma_priority[DMA_PRIO_REG_INDEX(i)] |=</div><div class='del'>-			((GENET_Q0_PRIORITY + i) &lt;&lt; DMA_PRIO_REG_SHIFT(i));</div><div class='add'>+			(i ? GENET_Q1_PRIORITY : GENET_Q0_PRIORITY)</div><div class='add'>+			&lt;&lt; DMA_PRIO_REG_SHIFT(i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Initialize Tx default queue 16 */</div><div class='del'>-	bcmgenet_init_tx_ring(priv, DESC_INDEX, GENET_Q16_TX_BD_CNT,</div><div class='del'>-			      priv-&gt;hw_params-&gt;tx_queues *</div><div class='del'>-			      priv-&gt;hw_params-&gt;tx_bds_per_q,</div><div class='del'>-			      TOTAL_DESC);</div><div class='del'>-	ring_cfg |= (1 &lt;&lt; DESC_INDEX);</div><div class='del'>-	dma_ctrl |= (1 &lt;&lt; (DESC_INDEX + DMA_RING_BUF_EN_SHIFT));</div><div class='del'>-	dma_priority[DMA_PRIO_REG_INDEX(DESC_INDEX)] |=</div><div class='del'>-		((GENET_Q0_PRIORITY + priv-&gt;hw_params-&gt;tx_queues) &lt;&lt;</div><div class='del'>-		 DMA_PRIO_REG_SHIFT(DESC_INDEX));</div><div class='del'>-</div><div class='ctx'> 	/* Set Tx queue priorities */</div><div class='ctx'> 	bcmgenet_tdma_writel(priv, dma_priority[0], DMA_PRIORITY_0);</div><div class='ctx'> 	bcmgenet_tdma_writel(priv, dma_priority[1], DMA_PRIORITY_1);</div><div class='ctx'> 	bcmgenet_tdma_writel(priv, dma_priority[2], DMA_PRIORITY_2);</div><div class='ctx'> </div><div class='del'>-	/* Enable Tx queues */</div><div class='del'>-	bcmgenet_tdma_writel(priv, ring_cfg, DMA_RING_CFG);</div><div class='add'>+	/* Configure Tx queues as descriptor rings */</div><div class='add'>+	ring_mask = (1 &lt;&lt; (priv-&gt;hw_params-&gt;tx_queues + 1)) - 1;</div><div class='add'>+	bcmgenet_tdma_writel(priv, ring_mask, DMA_RING_CFG);</div><div class='ctx'> </div><div class='del'>-	/* Enable Tx DMA */</div><div class='del'>-	if (dma_enable)</div><div class='del'>-		dma_ctrl |= DMA_EN;</div><div class='del'>-	bcmgenet_tdma_writel(priv, dma_ctrl, DMA_CTRL);</div><div class='add'>+	/* Enable Tx rings */</div><div class='add'>+	ring_mask &lt;&lt;= DMA_RING_BUF_EN_SHIFT;</div><div class='add'>+	bcmgenet_tdma_writel(priv, ring_mask, DMA_CTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcmgenet_enable_rx_napi(struct bcmgenet_priv *priv)</div><div class='hunk'>@@ -2862,15 +2938,11 @@ static void bcmgenet_enable_rx_napi(struct bcmgenet_priv *priv)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	struct bcmgenet_rx_ring *ring;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;rx_queues; ++i) {</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;rx_queues; ++i) {</div><div class='ctx'> 		ring = &amp;priv-&gt;rx_rings[i];</div><div class='ctx'> 		napi_enable(&amp;ring-&gt;napi);</div><div class='del'>-		ring-&gt;int_enable(ring);</div><div class='add'>+		bcmgenet_rx_ring_int_enable(ring);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	ring = &amp;priv-&gt;rx_rings[DESC_INDEX];</div><div class='del'>-	napi_enable(&amp;ring-&gt;napi);</div><div class='del'>-	ring-&gt;int_enable(ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcmgenet_disable_rx_napi(struct bcmgenet_priv *priv)</div><div class='hunk'>@@ -2878,15 +2950,11 @@ static void bcmgenet_disable_rx_napi(struct bcmgenet_priv *priv)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	struct bcmgenet_rx_ring *ring;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;rx_queues; ++i) {</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;rx_queues; ++i) {</div><div class='ctx'> 		ring = &amp;priv-&gt;rx_rings[i];</div><div class='ctx'> 		napi_disable(&amp;ring-&gt;napi);</div><div class='ctx'> 		cancel_work_sync(&amp;ring-&gt;dim.dim.work);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	ring = &amp;priv-&gt;rx_rings[DESC_INDEX];</div><div class='del'>-	napi_disable(&amp;ring-&gt;napi);</div><div class='del'>-	cancel_work_sync(&amp;ring-&gt;dim.dim.work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcmgenet_fini_rx_napi(struct bcmgenet_priv *priv)</div><div class='hunk'>@@ -2894,13 +2962,10 @@ static void bcmgenet_fini_rx_napi(struct bcmgenet_priv *priv)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	struct bcmgenet_rx_ring *ring;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;rx_queues; ++i) {</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;rx_queues; ++i) {</div><div class='ctx'> 		ring = &amp;priv-&gt;rx_rings[i];</div><div class='ctx'> 		netif_napi_del(&amp;ring-&gt;napi);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	ring = &amp;priv-&gt;rx_rings[DESC_INDEX];</div><div class='del'>-	netif_napi_del(&amp;ring-&gt;napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initialize Rx queues</div><div class='hunk'>@@ -2908,57 +2973,32 @@ static void bcmgenet_fini_rx_napi(struct bcmgenet_priv *priv)</div><div class='ctx'>  * Queues 0-15 are priority queues. Hardware Filtering Block (HFB) can be</div><div class='ctx'>  * used to direct traffic to these queues.</div><div class='ctx'>  *</div><div class='del'>- * Queue 16 is the default Rx queue with GENET_Q16_RX_BD_CNT descriptors.</div><div class='add'>+ * Queue 0 is also the default Rx queue with GENET_Q0_RX_BD_CNT descriptors.</div><div class='ctx'>  */</div><div class='ctx'> static int bcmgenet_init_rx_queues(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 i;</div><div class='del'>-	u32 dma_enable;</div><div class='del'>-	u32 dma_ctrl;</div><div class='del'>-	u32 ring_cfg;</div><div class='add'>+	unsigned int start = 0, end = GENET_Q0_RX_BD_CNT;</div><div class='add'>+	u32 i, ring_mask;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	dma_ctrl = bcmgenet_rdma_readl(priv, DMA_CTRL);</div><div class='del'>-	dma_enable = dma_ctrl &amp; DMA_EN;</div><div class='del'>-	dma_ctrl &amp;= ~DMA_EN;</div><div class='del'>-	bcmgenet_rdma_writel(priv, dma_ctrl, DMA_CTRL);</div><div class='del'>-</div><div class='del'>-	dma_ctrl = 0;</div><div class='del'>-	ring_cfg = 0;</div><div class='del'>-</div><div class='ctx'> 	/* Initialize Rx priority queues */</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;rx_queues; i++) {</div><div class='del'>-		ret = bcmgenet_init_rx_ring(priv, i,</div><div class='del'>-					    priv-&gt;hw_params-&gt;rx_bds_per_q,</div><div class='del'>-					    i * priv-&gt;hw_params-&gt;rx_bds_per_q,</div><div class='del'>-					    (i + 1) *</div><div class='del'>-					    priv-&gt;hw_params-&gt;rx_bds_per_q);</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;rx_queues; i++) {</div><div class='add'>+		ret = bcmgenet_init_rx_ring(priv, i, end - start, start, end);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		ring_cfg |= (1 &lt;&lt; i);</div><div class='del'>-		dma_ctrl |= (1 &lt;&lt; (i + DMA_RING_BUF_EN_SHIFT));</div><div class='add'>+		start = end;</div><div class='add'>+		end += priv-&gt;hw_params-&gt;rx_bds_per_q;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Initialize Rx default queue 16 */</div><div class='del'>-	ret = bcmgenet_init_rx_ring(priv, DESC_INDEX, GENET_Q16_RX_BD_CNT,</div><div class='del'>-				    priv-&gt;hw_params-&gt;rx_queues *</div><div class='del'>-				    priv-&gt;hw_params-&gt;rx_bds_per_q,</div><div class='del'>-				    TOTAL_DESC);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ring_cfg |= (1 &lt;&lt; DESC_INDEX);</div><div class='del'>-	dma_ctrl |= (1 &lt;&lt; (DESC_INDEX + DMA_RING_BUF_EN_SHIFT));</div><div class='add'>+	/* Configure Rx queues as descriptor rings */</div><div class='add'>+	ring_mask = (1 &lt;&lt; (priv-&gt;hw_params-&gt;rx_queues + 1)) - 1;</div><div class='add'>+	bcmgenet_rdma_writel(priv, ring_mask, DMA_RING_CFG);</div><div class='ctx'> </div><div class='del'>-	/* Enable rings */</div><div class='del'>-	bcmgenet_rdma_writel(priv, ring_cfg, DMA_RING_CFG);</div><div class='del'>-</div><div class='del'>-	/* Configure ring as descriptor ring and re-enable DMA if enabled */</div><div class='del'>-	if (dma_enable)</div><div class='del'>-		dma_ctrl |= DMA_EN;</div><div class='del'>-	bcmgenet_rdma_writel(priv, dma_ctrl, DMA_CTRL);</div><div class='add'>+	/* Enable Rx rings */</div><div class='add'>+	ring_mask &lt;&lt;= DMA_RING_BUF_EN_SHIFT;</div><div class='add'>+	bcmgenet_rdma_writel(priv, ring_mask, DMA_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2966,26 +3006,9 @@ static int bcmgenet_init_rx_queues(struct net_device *dev)</div><div class='ctx'> static int bcmgenet_dma_teardown(struct bcmgenet_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	int timeout = 0;</div><div class='del'>-	u32 reg;</div><div class='del'>-	u32 dma_ctrl;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable TDMA to stop add more frames in TX DMA */</div><div class='del'>-	reg = bcmgenet_tdma_readl(priv, DMA_CTRL);</div><div class='del'>-	reg &amp;= ~DMA_EN;</div><div class='del'>-	bcmgenet_tdma_writel(priv, reg, DMA_CTRL);</div><div class='del'>-</div><div class='del'>-	/* Check TDMA status register to confirm TDMA is disabled */</div><div class='del'>-	while (timeout++ &lt; DMA_TIMEOUT_VAL) {</div><div class='del'>-		reg = bcmgenet_tdma_readl(priv, DMA_STATUS);</div><div class='del'>-		if (reg &amp; DMA_DISABLED)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (timeout == DMA_TIMEOUT_VAL) {</div><div class='add'>+	if (-ETIMEDOUT == bcmgenet_tdma_disable(priv)) {</div><div class='ctx'> 		netdev_warn(priv-&gt;dev, "Timed out while disabling TX DMA\n");</div><div class='ctx'> 		ret = -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2994,39 +3017,11 @@ static int bcmgenet_dma_teardown(struct bcmgenet_priv *priv)</div><div class='ctx'> 	usleep_range(10000, 20000);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable RDMA */</div><div class='del'>-	reg = bcmgenet_rdma_readl(priv, DMA_CTRL);</div><div class='del'>-	reg &amp;= ~DMA_EN;</div><div class='del'>-	bcmgenet_rdma_writel(priv, reg, DMA_CTRL);</div><div class='del'>-</div><div class='del'>-	timeout = 0;</div><div class='del'>-	/* Check RDMA status register to confirm RDMA is disabled */</div><div class='del'>-	while (timeout++ &lt; DMA_TIMEOUT_VAL) {</div><div class='del'>-		reg = bcmgenet_rdma_readl(priv, DMA_STATUS);</div><div class='del'>-		if (reg &amp; DMA_DISABLED)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (timeout == DMA_TIMEOUT_VAL) {</div><div class='add'>+	if (-ETIMEDOUT == bcmgenet_rdma_disable(priv)) {</div><div class='ctx'> 		netdev_warn(priv-&gt;dev, "Timed out while disabling RX DMA\n");</div><div class='ctx'> 		ret = -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dma_ctrl = 0;</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;rx_queues; i++)</div><div class='del'>-		dma_ctrl |= (1 &lt;&lt; (i + DMA_RING_BUF_EN_SHIFT));</div><div class='del'>-	reg = bcmgenet_rdma_readl(priv, DMA_CTRL);</div><div class='del'>-	reg &amp;= ~dma_ctrl;</div><div class='del'>-	bcmgenet_rdma_writel(priv, reg, DMA_CTRL);</div><div class='del'>-</div><div class='del'>-	dma_ctrl = 0;</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;tx_queues; i++)</div><div class='del'>-		dma_ctrl |= (1 &lt;&lt; (i + DMA_RING_BUF_EN_SHIFT));</div><div class='del'>-	reg = bcmgenet_tdma_readl(priv, DMA_CTRL);</div><div class='del'>-	reg &amp;= ~dma_ctrl;</div><div class='del'>-	bcmgenet_tdma_writel(priv, reg, DMA_CTRL);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3038,32 +3033,53 @@ static void bcmgenet_fini_dma(struct bcmgenet_priv *priv)</div><div class='ctx'> 	bcmgenet_fini_rx_napi(priv);</div><div class='ctx'> 	bcmgenet_fini_tx_napi(priv);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;num_tx_bds; i++)</div><div class='del'>-		dev_kfree_skb(bcmgenet_free_tx_cb(&amp;priv-&gt;pdev-&gt;dev,</div><div class='del'>-						  priv-&gt;tx_cbs + i));</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;tx_queues; i++) {</div><div class='del'>-		txq = netdev_get_tx_queue(priv-&gt;dev, priv-&gt;tx_rings[i].queue);</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;tx_queues; i++) {</div><div class='add'>+		txq = netdev_get_tx_queue(priv-&gt;dev, i);</div><div class='ctx'> 		netdev_tx_reset_queue(txq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	txq = netdev_get_tx_queue(priv-&gt;dev, priv-&gt;tx_rings[DESC_INDEX].queue);</div><div class='del'>-	netdev_tx_reset_queue(txq);</div><div class='del'>-</div><div class='ctx'> 	bcmgenet_free_rx_buffers(priv);</div><div class='ctx'> 	kfree(priv-&gt;rx_cbs);</div><div class='ctx'> 	kfree(priv-&gt;tx_cbs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* init_edma: Initialize DMA control register */</div><div class='del'>-static int bcmgenet_init_dma(struct bcmgenet_priv *priv)</div><div class='add'>+static int bcmgenet_init_dma(struct bcmgenet_priv *priv, bool flush_rx)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	unsigned int i;</div><div class='ctx'> 	struct enet_cb *cb;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 reg;</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(priv, hw, priv-&gt;dev, "%s\n", __func__);</div><div class='ctx'> </div><div class='add'>+	/* Disable TX DMA */</div><div class='add'>+	ret = bcmgenet_tdma_disable(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(priv-&gt;dev, "failed to halt Tx DMA\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable RX DMA */</div><div class='add'>+	ret = bcmgenet_rdma_disable(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(priv-&gt;dev, "failed to halt Rx DMA\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Flush TX queues */</div><div class='add'>+	bcmgenet_umac_writel(priv, 1, UMAC_TX_FLUSH);</div><div class='add'>+	udelay(10);</div><div class='add'>+	bcmgenet_umac_writel(priv, 0, UMAC_TX_FLUSH);</div><div class='add'>+</div><div class='add'>+	if (flush_rx) {</div><div class='add'>+		reg = bcmgenet_rbuf_ctrl_get(priv);</div><div class='add'>+		bcmgenet_rbuf_ctrl_set(priv, reg | BIT(0));</div><div class='add'>+		udelay(10);</div><div class='add'>+		bcmgenet_rbuf_ctrl_set(priv, reg);</div><div class='add'>+		udelay(10);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Initialize common Rx ring structures */</div><div class='ctx'> 	priv-&gt;rx_bds = priv-&gt;base + priv-&gt;hw_params-&gt;rdma_offset;</div><div class='ctx'> 	priv-&gt;num_rx_bds = TOTAL_DESC;</div><div class='hunk'>@@ -3113,6 +3129,15 @@ static int bcmgenet_init_dma(struct bcmgenet_priv *priv)</div><div class='ctx'> 	/* Initialize Tx queues */</div><div class='ctx'> 	bcmgenet_init_tx_queues(priv-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	/* Enable RX/TX DMA */</div><div class='add'>+	reg = bcmgenet_rdma_readl(priv, DMA_CTRL);</div><div class='add'>+	reg |= DMA_EN;</div><div class='add'>+	bcmgenet_rdma_writel(priv, reg, DMA_CTRL);</div><div class='add'>+</div><div class='add'>+	reg = bcmgenet_tdma_readl(priv, DMA_CTRL);</div><div class='add'>+	reg |= DMA_EN;</div><div class='add'>+	bcmgenet_tdma_writel(priv, reg, DMA_CTRL);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3142,7 +3167,7 @@ static void bcmgenet_irq_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* bcmgenet_isr1: handle Rx and Tx priority queues */</div><div class='add'>+/* bcmgenet_isr1: handle Rx and Tx queues */</div><div class='ctx'> static irqreturn_t bcmgenet_isr1(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = dev_id;</div><div class='hunk'>@@ -3161,7 +3186,7 @@ static irqreturn_t bcmgenet_isr1(int irq, void *dev_id)</div><div class='ctx'> 		  "%s: IRQ=0x%x\n", __func__, status);</div><div class='ctx'> </div><div class='ctx'> 	/* Check Rx priority queue interrupts */</div><div class='del'>-	for (index = 0; index &lt; priv-&gt;hw_params-&gt;rx_queues; index++) {</div><div class='add'>+	for (index = 0; index &lt;= priv-&gt;hw_params-&gt;rx_queues; index++) {</div><div class='ctx'> 		if (!(status &amp; BIT(UMAC_IRQ1_RX_INTR_SHIFT + index)))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -3169,20 +3194,20 @@ static irqreturn_t bcmgenet_isr1(int irq, void *dev_id)</div><div class='ctx'> 		rx_ring-&gt;dim.event_ctr++;</div><div class='ctx'> </div><div class='ctx'> 		if (likely(napi_schedule_prep(&amp;rx_ring-&gt;napi))) {</div><div class='del'>-			rx_ring-&gt;int_disable(rx_ring);</div><div class='add'>+			bcmgenet_rx_ring_int_disable(rx_ring);</div><div class='ctx'> 			__napi_schedule_irqoff(&amp;rx_ring-&gt;napi);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check Tx priority queue interrupts */</div><div class='del'>-	for (index = 0; index &lt; priv-&gt;hw_params-&gt;tx_queues; index++) {</div><div class='add'>+	for (index = 0; index &lt;= priv-&gt;hw_params-&gt;tx_queues; index++) {</div><div class='ctx'> 		if (!(status &amp; BIT(index)))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		tx_ring = &amp;priv-&gt;tx_rings[index];</div><div class='ctx'> </div><div class='ctx'> 		if (likely(napi_schedule_prep(&amp;tx_ring-&gt;napi))) {</div><div class='del'>-			tx_ring-&gt;int_disable(tx_ring);</div><div class='add'>+			bcmgenet_tx_ring_int_disable(tx_ring);</div><div class='ctx'> 			__napi_schedule_irqoff(&amp;tx_ring-&gt;napi);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3190,12 +3215,10 @@ static irqreturn_t bcmgenet_isr1(int irq, void *dev_id)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* bcmgenet_isr0: handle Rx and Tx default queues + other stuff */</div><div class='add'>+/* bcmgenet_isr0: handle other stuff */</div><div class='ctx'> static irqreturn_t bcmgenet_isr0(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = dev_id;</div><div class='del'>-	struct bcmgenet_rx_ring *rx_ring;</div><div class='del'>-	struct bcmgenet_tx_ring *tx_ring;</div><div class='ctx'> 	unsigned int status;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -3209,29 +3232,8 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id)</div><div class='ctx'> 	netif_dbg(priv, intr, priv-&gt;dev,</div><div class='ctx'> 		  "IRQ=0x%x\n", status);</div><div class='ctx'> </div><div class='del'>-	if (status &amp; UMAC_IRQ_RXDMA_DONE) {</div><div class='del'>-		rx_ring = &amp;priv-&gt;rx_rings[DESC_INDEX];</div><div class='del'>-		rx_ring-&gt;dim.event_ctr++;</div><div class='del'>-</div><div class='del'>-		if (likely(napi_schedule_prep(&amp;rx_ring-&gt;napi))) {</div><div class='del'>-			rx_ring-&gt;int_disable(rx_ring);</div><div class='del'>-			__napi_schedule_irqoff(&amp;rx_ring-&gt;napi);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (status &amp; UMAC_IRQ_TXDMA_DONE) {</div><div class='del'>-		tx_ring = &amp;priv-&gt;tx_rings[DESC_INDEX];</div><div class='del'>-</div><div class='del'>-		if (likely(napi_schedule_prep(&amp;tx_ring-&gt;napi))) {</div><div class='del'>-			tx_ring-&gt;int_disable(tx_ring);</div><div class='del'>-			__napi_schedule_irqoff(&amp;tx_ring-&gt;napi);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((priv-&gt;hw_params-&gt;flags &amp; GENET_HAS_MDIO_INTR) &amp;&amp;</div><div class='del'>-		status &amp; (UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR)) {</div><div class='add'>+	if (bcmgenet_has_mdio_intr(priv) &amp;&amp; status &amp; UMAC_IRQ_MDIO_EVENT)</div><div class='ctx'> 		wake_up(&amp;priv-&gt;wq);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* all other interested interrupts handled in bottom half */</div><div class='ctx'> 	status &amp;= (UMAC_IRQ_LINK_EVENT | UMAC_IRQ_PHY_DET_R);</div><div class='hunk'>@@ -3285,56 +3287,6 @@ static void bcmgenet_get_hw_addr(struct bcmgenet_priv *priv,</div><div class='ctx'> 	put_unaligned_be16(addr_tmp, &amp;addr[4]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Returns a reusable dma control register value */</div><div class='del'>-static u32 bcmgenet_dma_disable(struct bcmgenet_priv *priv, bool flush_rx)</div><div class='del'>-{</div><div class='del'>-	unsigned int i;</div><div class='del'>-	u32 reg;</div><div class='del'>-	u32 dma_ctrl;</div><div class='del'>-</div><div class='del'>-	/* disable DMA */</div><div class='del'>-	dma_ctrl = 1 &lt;&lt; (DESC_INDEX + DMA_RING_BUF_EN_SHIFT) | DMA_EN;</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;tx_queues; i++)</div><div class='del'>-		dma_ctrl |= (1 &lt;&lt; (i + DMA_RING_BUF_EN_SHIFT));</div><div class='del'>-	reg = bcmgenet_tdma_readl(priv, DMA_CTRL);</div><div class='del'>-	reg &amp;= ~dma_ctrl;</div><div class='del'>-	bcmgenet_tdma_writel(priv, reg, DMA_CTRL);</div><div class='del'>-</div><div class='del'>-	dma_ctrl = 1 &lt;&lt; (DESC_INDEX + DMA_RING_BUF_EN_SHIFT) | DMA_EN;</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;rx_queues; i++)</div><div class='del'>-		dma_ctrl |= (1 &lt;&lt; (i + DMA_RING_BUF_EN_SHIFT));</div><div class='del'>-	reg = bcmgenet_rdma_readl(priv, DMA_CTRL);</div><div class='del'>-	reg &amp;= ~dma_ctrl;</div><div class='del'>-	bcmgenet_rdma_writel(priv, reg, DMA_CTRL);</div><div class='del'>-</div><div class='del'>-	bcmgenet_umac_writel(priv, 1, UMAC_TX_FLUSH);</div><div class='del'>-	udelay(10);</div><div class='del'>-	bcmgenet_umac_writel(priv, 0, UMAC_TX_FLUSH);</div><div class='del'>-</div><div class='del'>-	if (flush_rx) {</div><div class='del'>-		reg = bcmgenet_rbuf_ctrl_get(priv);</div><div class='del'>-		bcmgenet_rbuf_ctrl_set(priv, reg | BIT(0));</div><div class='del'>-		udelay(10);</div><div class='del'>-		bcmgenet_rbuf_ctrl_set(priv, reg);</div><div class='del'>-		udelay(10);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return dma_ctrl;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bcmgenet_enable_dma(struct bcmgenet_priv *priv, u32 dma_ctrl)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = bcmgenet_rdma_readl(priv, DMA_CTRL);</div><div class='del'>-	reg |= dma_ctrl;</div><div class='del'>-	bcmgenet_rdma_writel(priv, reg, DMA_CTRL);</div><div class='del'>-</div><div class='del'>-	reg = bcmgenet_tdma_readl(priv, DMA_CTRL);</div><div class='del'>-	reg |= dma_ctrl;</div><div class='del'>-	bcmgenet_tdma_writel(priv, reg, DMA_CTRL);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void bcmgenet_netif_start(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='hunk'>@@ -3358,7 +3310,6 @@ static void bcmgenet_netif_start(struct net_device *dev)</div><div class='ctx'> static int bcmgenet_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='del'>-	unsigned long dma_ctrl;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(priv, ifup, dev, "bcmgenet_open\n");</div><div class='hunk'>@@ -3384,22 +3335,16 @@ static int bcmgenet_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	bcmgenet_set_hw_addr(priv, dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='del'>-	/* Disable RX/TX DMA and flush TX and RX queues */</div><div class='del'>-	dma_ctrl = bcmgenet_dma_disable(priv, true);</div><div class='add'>+	/* HFB init */</div><div class='add'>+	bcmgenet_hfb_init(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Reinitialize TDMA and RDMA and SW housekeeping */</div><div class='del'>-	ret = bcmgenet_init_dma(priv);</div><div class='add'>+	ret = bcmgenet_init_dma(priv, true);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_err(dev, "failed to initialize DMA\n");</div><div class='ctx'> 		goto err_clk_disable;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Always enable ring 16 - descriptor ring */</div><div class='del'>-	bcmgenet_enable_dma(priv, dma_ctrl);</div><div class='del'>-</div><div class='del'>-	/* HFB init */</div><div class='del'>-	bcmgenet_hfb_init(priv);</div><div class='del'>-</div><div class='ctx'> 	ret = request_irq(priv-&gt;irq0, bcmgenet_isr0, IRQF_SHARED,</div><div class='ctx'> 			  dev-&gt;name, priv);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='hunk'>@@ -3446,19 +3391,21 @@ static void bcmgenet_netif_stop(struct net_device *dev, bool stop_phy)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	bcmgenet_disable_tx_napi(priv);</div><div class='ctx'> 	netif_tx_disable(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable MAC receive */</div><div class='add'>+	bcmgenet_hfb_reg_writel(priv, 0, HFB_CTRL);</div><div class='ctx'> 	umac_enable_set(priv, CMD_RX_EN, false);</div><div class='ctx'> </div><div class='add'>+	if (stop_phy)</div><div class='add'>+		phy_stop(dev-&gt;phydev);</div><div class='add'>+</div><div class='ctx'> 	bcmgenet_dma_teardown(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable MAC transmit. TX DMA disabled must be done before this */</div><div class='ctx'> 	umac_enable_set(priv, CMD_TX_EN, false);</div><div class='ctx'> </div><div class='del'>-	if (stop_phy)</div><div class='del'>-		phy_stop(dev-&gt;phydev);</div><div class='add'>+	bcmgenet_disable_tx_napi(priv);</div><div class='ctx'> 	bcmgenet_disable_rx_napi(priv);</div><div class='ctx'> 	bcmgenet_intr_disable(priv);</div><div class='ctx'> </div><div class='hunk'>@@ -3506,16 +3453,11 @@ static void bcmgenet_dump_tx_queue(struct bcmgenet_tx_ring *ring)</div><div class='ctx'> 	if (!netif_msg_tx_err(priv))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	txq = netdev_get_tx_queue(priv-&gt;dev, ring-&gt;queue);</div><div class='add'>+	txq = netdev_get_tx_queue(priv-&gt;dev, ring-&gt;index);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;ring-&gt;lock);</div><div class='del'>-	if (ring-&gt;index == DESC_INDEX) {</div><div class='del'>-		intsts = ~bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);</div><div class='del'>-		intmsk = UMAC_IRQ_TXDMA_DONE | UMAC_IRQ_TXDMA_MBDONE;</div><div class='del'>-	} else {</div><div class='del'>-		intsts = ~bcmgenet_intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);</div><div class='del'>-		intmsk = 1 &lt;&lt; ring-&gt;index;</div><div class='del'>-	}</div><div class='add'>+	intsts = ~bcmgenet_intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);</div><div class='add'>+	intmsk = 1 &lt;&lt; ring-&gt;index;</div><div class='ctx'> 	c_index = bcmgenet_tdma_ring_readl(priv, ring-&gt;index, TDMA_CONS_INDEX);</div><div class='ctx'> 	p_index = bcmgenet_tdma_ring_readl(priv, ring-&gt;index, TDMA_PROD_INDEX);</div><div class='ctx'> 	txq_stopped = netif_tx_queue_stopped(txq);</div><div class='hunk'>@@ -3529,7 +3471,7 @@ static void bcmgenet_dump_tx_queue(struct bcmgenet_tx_ring *ring)</div><div class='ctx'> 		  "(sw)c_index: %d (hw)c_index: %d\n"</div><div class='ctx'> 		  "(sw)clean_p: %d (sw)write_p: %d\n"</div><div class='ctx'> 		  "(sw)cb_ptr: %d (sw)end_ptr: %d\n",</div><div class='del'>-		  ring-&gt;index, ring-&gt;queue,</div><div class='add'>+		  ring-&gt;index, ring-&gt;index,</div><div class='ctx'> 		  txq_stopped ? "stopped" : "active",</div><div class='ctx'> 		  intsts &amp; intmsk ? "enabled" : "disabled",</div><div class='ctx'> 		  free_bds, ring-&gt;size,</div><div class='hunk'>@@ -3542,30 +3484,25 @@ static void bcmgenet_dump_tx_queue(struct bcmgenet_tx_ring *ring)</div><div class='ctx'> static void bcmgenet_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 int0_enable = 0;</div><div class='ctx'> 	u32 int1_enable = 0;</div><div class='ctx'> 	unsigned int q;</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(priv, tx_err, dev, "bcmgenet_timeout\n");</div><div class='ctx'> </div><div class='del'>-	for (q = 0; q &lt; priv-&gt;hw_params-&gt;tx_queues; q++)</div><div class='add'>+	for (q = 0; q &lt;= priv-&gt;hw_params-&gt;tx_queues; q++)</div><div class='ctx'> 		bcmgenet_dump_tx_queue(&amp;priv-&gt;tx_rings[q]);</div><div class='del'>-	bcmgenet_dump_tx_queue(&amp;priv-&gt;tx_rings[DESC_INDEX]);</div><div class='ctx'> </div><div class='ctx'> 	bcmgenet_tx_reclaim_all(dev);</div><div class='ctx'> </div><div class='del'>-	for (q = 0; q &lt; priv-&gt;hw_params-&gt;tx_queues; q++)</div><div class='add'>+	for (q = 0; q &lt;= priv-&gt;hw_params-&gt;tx_queues; q++)</div><div class='ctx'> 		int1_enable |= (1 &lt;&lt; q);</div><div class='ctx'> </div><div class='del'>-	int0_enable = UMAC_IRQ_TXDMA_DONE;</div><div class='del'>-</div><div class='ctx'> 	/* Re-enable TX interrupts if disabled */</div><div class='del'>-	bcmgenet_intrl2_0_writel(priv, int0_enable, INTRL2_CPU_MASK_CLEAR);</div><div class='ctx'> 	bcmgenet_intrl2_1_writel(priv, int1_enable, INTRL2_CPU_MASK_CLEAR);</div><div class='ctx'> </div><div class='ctx'> 	netif_trans_update(dev);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;stats.tx_errors++;</div><div class='add'>+	BCMGENET_STATS64_INC((&amp;priv-&gt;tx_rings[txqueue].stats64), errors);</div><div class='ctx'> </div><div class='ctx'> 	netif_tx_wake_all_queues(dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -3654,47 +3591,72 @@ static int bcmgenet_set_mac_addr(struct net_device *dev, void *p)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct net_device_stats *bcmgenet_get_stats(struct net_device *dev)</div><div class='add'>+static void bcmgenet_get_stats64(struct net_device *dev,</div><div class='add'>+				 struct rtnl_link_stats64 *stats)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='del'>-	unsigned long tx_bytes = 0, tx_packets = 0;</div><div class='del'>-	unsigned long rx_bytes = 0, rx_packets = 0;</div><div class='del'>-	unsigned long rx_errors = 0, rx_dropped = 0;</div><div class='del'>-	struct bcmgenet_tx_ring *tx_ring;</div><div class='del'>-	struct bcmgenet_rx_ring *rx_ring;</div><div class='add'>+	struct bcmgenet_tx_stats64 *tx_stats;</div><div class='add'>+	struct bcmgenet_rx_stats64 *rx_stats;</div><div class='add'>+	u64 rx_length_errors, rx_over_errors;</div><div class='add'>+	u64 rx_missed, rx_fragmented_errors;</div><div class='add'>+	u64 rx_crc_errors, rx_frame_errors;</div><div class='add'>+	u64 tx_errors, tx_dropped;</div><div class='add'>+	u64 rx_errors, rx_dropped;</div><div class='add'>+	u64 tx_bytes, tx_packets;</div><div class='add'>+	u64 rx_bytes, rx_packets;</div><div class='add'>+	unsigned int start;</div><div class='ctx'> 	unsigned int q;</div><div class='del'>-</div><div class='del'>-	for (q = 0; q &lt; priv-&gt;hw_params-&gt;tx_queues; q++) {</div><div class='del'>-		tx_ring = &amp;priv-&gt;tx_rings[q];</div><div class='del'>-		tx_bytes += tx_ring-&gt;bytes;</div><div class='del'>-		tx_packets += tx_ring-&gt;packets;</div><div class='add'>+	u64 multicast;</div><div class='add'>+</div><div class='add'>+	for (q = 0; q &lt;= priv-&gt;hw_params-&gt;tx_queues; q++) {</div><div class='add'>+		tx_stats = &amp;priv-&gt;tx_rings[q].stats64;</div><div class='add'>+		do {</div><div class='add'>+			start = u64_stats_fetch_begin(&amp;tx_stats-&gt;syncp);</div><div class='add'>+			tx_bytes = u64_stats_read(&amp;tx_stats-&gt;bytes);</div><div class='add'>+			tx_packets = u64_stats_read(&amp;tx_stats-&gt;packets);</div><div class='add'>+			tx_errors = u64_stats_read(&amp;tx_stats-&gt;errors);</div><div class='add'>+			tx_dropped = u64_stats_read(&amp;tx_stats-&gt;dropped);</div><div class='add'>+		} while (u64_stats_fetch_retry(&amp;tx_stats-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_bytes += tx_bytes;</div><div class='add'>+		stats-&gt;tx_packets += tx_packets;</div><div class='add'>+		stats-&gt;tx_errors += tx_errors;</div><div class='add'>+		stats-&gt;tx_dropped += tx_dropped;</div><div class='ctx'> 	}</div><div class='del'>-	tx_ring = &amp;priv-&gt;tx_rings[DESC_INDEX];</div><div class='del'>-	tx_bytes += tx_ring-&gt;bytes;</div><div class='del'>-	tx_packets += tx_ring-&gt;packets;</div><div class='ctx'> </div><div class='del'>-	for (q = 0; q &lt; priv-&gt;hw_params-&gt;rx_queues; q++) {</div><div class='del'>-		rx_ring = &amp;priv-&gt;rx_rings[q];</div><div class='del'>-</div><div class='del'>-		rx_bytes += rx_ring-&gt;bytes;</div><div class='del'>-		rx_packets += rx_ring-&gt;packets;</div><div class='del'>-		rx_errors += rx_ring-&gt;errors;</div><div class='del'>-		rx_dropped += rx_ring-&gt;dropped;</div><div class='add'>+	for (q = 0; q &lt;= priv-&gt;hw_params-&gt;rx_queues; q++) {</div><div class='add'>+		rx_stats = &amp;priv-&gt;rx_rings[q].stats64;</div><div class='add'>+		do {</div><div class='add'>+			start = u64_stats_fetch_begin(&amp;rx_stats-&gt;syncp);</div><div class='add'>+			rx_bytes = u64_stats_read(&amp;rx_stats-&gt;bytes);</div><div class='add'>+			rx_packets = u64_stats_read(&amp;rx_stats-&gt;packets);</div><div class='add'>+			rx_errors = u64_stats_read(&amp;rx_stats-&gt;errors);</div><div class='add'>+			rx_dropped = u64_stats_read(&amp;rx_stats-&gt;dropped);</div><div class='add'>+			rx_missed = u64_stats_read(&amp;rx_stats-&gt;missed);</div><div class='add'>+			rx_length_errors = u64_stats_read(&amp;rx_stats-&gt;length_errors);</div><div class='add'>+			rx_over_errors = u64_stats_read(&amp;rx_stats-&gt;over_errors);</div><div class='add'>+			rx_crc_errors = u64_stats_read(&amp;rx_stats-&gt;crc_errors);</div><div class='add'>+			rx_frame_errors = u64_stats_read(&amp;rx_stats-&gt;frame_errors);</div><div class='add'>+			rx_fragmented_errors = u64_stats_read(&amp;rx_stats-&gt;fragmented_errors);</div><div class='add'>+			multicast = u64_stats_read(&amp;rx_stats-&gt;multicast);</div><div class='add'>+		} while (u64_stats_fetch_retry(&amp;rx_stats-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+		rx_errors += rx_length_errors;</div><div class='add'>+		rx_errors += rx_crc_errors;</div><div class='add'>+		rx_errors += rx_frame_errors;</div><div class='add'>+		rx_errors += rx_fragmented_errors;</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += rx_bytes;</div><div class='add'>+		stats-&gt;rx_packets += rx_packets;</div><div class='add'>+		stats-&gt;rx_errors += rx_errors;</div><div class='add'>+		stats-&gt;rx_dropped += rx_dropped;</div><div class='add'>+		stats-&gt;rx_missed_errors += rx_missed;</div><div class='add'>+		stats-&gt;rx_length_errors += rx_length_errors;</div><div class='add'>+		stats-&gt;rx_over_errors += rx_over_errors;</div><div class='add'>+		stats-&gt;rx_crc_errors += rx_crc_errors;</div><div class='add'>+		stats-&gt;rx_frame_errors += rx_frame_errors;</div><div class='add'>+		stats-&gt;multicast += multicast;</div><div class='ctx'> 	}</div><div class='del'>-	rx_ring = &amp;priv-&gt;rx_rings[DESC_INDEX];</div><div class='del'>-	rx_bytes += rx_ring-&gt;bytes;</div><div class='del'>-	rx_packets += rx_ring-&gt;packets;</div><div class='del'>-	rx_errors += rx_ring-&gt;errors;</div><div class='del'>-	rx_dropped += rx_ring-&gt;dropped;</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.tx_bytes = tx_bytes;</div><div class='del'>-	dev-&gt;stats.tx_packets = tx_packets;</div><div class='del'>-	dev-&gt;stats.rx_bytes = rx_bytes;</div><div class='del'>-	dev-&gt;stats.rx_packets = rx_packets;</div><div class='del'>-	dev-&gt;stats.rx_errors = rx_errors;</div><div class='del'>-	dev-&gt;stats.rx_missed_errors = rx_errors;</div><div class='del'>-	dev-&gt;stats.rx_dropped = rx_dropped;</div><div class='del'>-	return &amp;dev-&gt;stats;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bcmgenet_change_carrier(struct net_device *dev, bool new_carrier)</div><div class='hunk'>@@ -3722,132 +3684,113 @@ static const struct net_device_ops bcmgenet_netdev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address	= bcmgenet_set_mac_addr,</div><div class='ctx'> 	.ndo_eth_ioctl		= phy_do_ioctl_running,</div><div class='ctx'> 	.ndo_set_features	= bcmgenet_set_features,</div><div class='del'>-	.ndo_get_stats		= bcmgenet_get_stats,</div><div class='add'>+	.ndo_get_stats64	= bcmgenet_get_stats64,</div><div class='ctx'> 	.ndo_change_carrier	= bcmgenet_change_carrier,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Array of GENET hardware parameters/characteristics */</div><div class='del'>-static struct bcmgenet_hw_params bcmgenet_hw_params[] = {</div><div class='del'>-	[GENET_V1] = {</div><div class='del'>-		.tx_queues = 0,</div><div class='del'>-		.tx_bds_per_q = 0,</div><div class='del'>-		.rx_queues = 0,</div><div class='del'>-		.rx_bds_per_q = 0,</div><div class='del'>-		.bp_in_en_shift = 16,</div><div class='del'>-		.bp_in_mask = 0xffff,</div><div class='del'>-		.hfb_filter_cnt = 16,</div><div class='del'>-		.qtag_mask = 0x1F,</div><div class='del'>-		.hfb_offset = 0x1000,</div><div class='del'>-		.rdma_offset = 0x2000,</div><div class='del'>-		.tdma_offset = 0x3000,</div><div class='del'>-		.words_per_bd = 2,</div><div class='del'>-	},</div><div class='del'>-	[GENET_V2] = {</div><div class='del'>-		.tx_queues = 4,</div><div class='del'>-		.tx_bds_per_q = 32,</div><div class='del'>-		.rx_queues = 0,</div><div class='del'>-		.rx_bds_per_q = 0,</div><div class='del'>-		.bp_in_en_shift = 16,</div><div class='del'>-		.bp_in_mask = 0xffff,</div><div class='del'>-		.hfb_filter_cnt = 16,</div><div class='del'>-		.qtag_mask = 0x1F,</div><div class='del'>-		.tbuf_offset = 0x0600,</div><div class='del'>-		.hfb_offset = 0x1000,</div><div class='del'>-		.hfb_reg_offset = 0x2000,</div><div class='del'>-		.rdma_offset = 0x3000,</div><div class='del'>-		.tdma_offset = 0x4000,</div><div class='del'>-		.words_per_bd = 2,</div><div class='del'>-		.flags = GENET_HAS_EXT,</div><div class='del'>-	},</div><div class='del'>-	[GENET_V3] = {</div><div class='del'>-		.tx_queues = 4,</div><div class='del'>-		.tx_bds_per_q = 32,</div><div class='del'>-		.rx_queues = 0,</div><div class='del'>-		.rx_bds_per_q = 0,</div><div class='del'>-		.bp_in_en_shift = 17,</div><div class='del'>-		.bp_in_mask = 0x1ffff,</div><div class='del'>-		.hfb_filter_cnt = 48,</div><div class='del'>-		.hfb_filter_size = 128,</div><div class='del'>-		.qtag_mask = 0x3F,</div><div class='del'>-		.tbuf_offset = 0x0600,</div><div class='del'>-		.hfb_offset = 0x8000,</div><div class='del'>-		.hfb_reg_offset = 0xfc00,</div><div class='del'>-		.rdma_offset = 0x10000,</div><div class='del'>-		.tdma_offset = 0x11000,</div><div class='del'>-		.words_per_bd = 2,</div><div class='del'>-		.flags = GENET_HAS_EXT | GENET_HAS_MDIO_INTR |</div><div class='del'>-			 GENET_HAS_MOCA_LINK_DET,</div><div class='del'>-	},</div><div class='del'>-	[GENET_V4] = {</div><div class='del'>-		.tx_queues = 4,</div><div class='del'>-		.tx_bds_per_q = 32,</div><div class='del'>-		.rx_queues = 0,</div><div class='del'>-		.rx_bds_per_q = 0,</div><div class='del'>-		.bp_in_en_shift = 17,</div><div class='del'>-		.bp_in_mask = 0x1ffff,</div><div class='del'>-		.hfb_filter_cnt = 48,</div><div class='del'>-		.hfb_filter_size = 128,</div><div class='del'>-		.qtag_mask = 0x3F,</div><div class='del'>-		.tbuf_offset = 0x0600,</div><div class='del'>-		.hfb_offset = 0x8000,</div><div class='del'>-		.hfb_reg_offset = 0xfc00,</div><div class='del'>-		.rdma_offset = 0x2000,</div><div class='del'>-		.tdma_offset = 0x4000,</div><div class='del'>-		.words_per_bd = 3,</div><div class='del'>-		.flags = GENET_HAS_40BITS | GENET_HAS_EXT |</div><div class='del'>-			 GENET_HAS_MDIO_INTR | GENET_HAS_MOCA_LINK_DET,</div><div class='del'>-	},</div><div class='del'>-	[GENET_V5] = {</div><div class='del'>-		.tx_queues = 4,</div><div class='del'>-		.tx_bds_per_q = 32,</div><div class='del'>-		.rx_queues = 0,</div><div class='del'>-		.rx_bds_per_q = 0,</div><div class='del'>-		.bp_in_en_shift = 17,</div><div class='del'>-		.bp_in_mask = 0x1ffff,</div><div class='del'>-		.hfb_filter_cnt = 48,</div><div class='del'>-		.hfb_filter_size = 128,</div><div class='del'>-		.qtag_mask = 0x3F,</div><div class='del'>-		.tbuf_offset = 0x0600,</div><div class='del'>-		.hfb_offset = 0x8000,</div><div class='del'>-		.hfb_reg_offset = 0xfc00,</div><div class='del'>-		.rdma_offset = 0x2000,</div><div class='del'>-		.tdma_offset = 0x4000,</div><div class='del'>-		.words_per_bd = 3,</div><div class='del'>-		.flags = GENET_HAS_40BITS | GENET_HAS_EXT |</div><div class='del'>-			 GENET_HAS_MDIO_INTR | GENET_HAS_MOCA_LINK_DET,</div><div class='del'>-	},</div><div class='add'>+/* GENET hardware parameters/characteristics */</div><div class='add'>+static const struct bcmgenet_hw_params bcmgenet_hw_params_v1 = {</div><div class='add'>+	.tx_queues = 0,</div><div class='add'>+	.tx_bds_per_q = 0,</div><div class='add'>+	.rx_queues = 0,</div><div class='add'>+	.rx_bds_per_q = 0,</div><div class='add'>+	.bp_in_en_shift = 16,</div><div class='add'>+	.bp_in_mask = 0xffff,</div><div class='add'>+	.hfb_filter_cnt = 16,</div><div class='add'>+	.hfb_filter_size = 64,</div><div class='add'>+	.qtag_mask = 0x1F,</div><div class='add'>+	.hfb_offset = 0x1000,</div><div class='add'>+	.hfb_reg_offset = GENET_RBUF_OFF + RBUF_HFB_CTRL_V1,</div><div class='add'>+	.rdma_offset = 0x2000,</div><div class='add'>+	.tdma_offset = 0x3000,</div><div class='add'>+	.words_per_bd = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct bcmgenet_hw_params bcmgenet_hw_params_v2 = {</div><div class='add'>+	.tx_queues = 4,</div><div class='add'>+	.tx_bds_per_q = 32,</div><div class='add'>+	.rx_queues = 0,</div><div class='add'>+	.rx_bds_per_q = 0,</div><div class='add'>+	.bp_in_en_shift = 16,</div><div class='add'>+	.bp_in_mask = 0xffff,</div><div class='add'>+	.hfb_filter_cnt = 16,</div><div class='add'>+	.hfb_filter_size = 64,</div><div class='add'>+	.qtag_mask = 0x1F,</div><div class='add'>+	.tbuf_offset = 0x0600,</div><div class='add'>+	.hfb_offset = 0x1000,</div><div class='add'>+	.hfb_reg_offset = 0x2000,</div><div class='add'>+	.rdma_offset = 0x3000,</div><div class='add'>+	.tdma_offset = 0x4000,</div><div class='add'>+	.words_per_bd = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct bcmgenet_hw_params bcmgenet_hw_params_v3 = {</div><div class='add'>+	.tx_queues = 4,</div><div class='add'>+	.tx_bds_per_q = 32,</div><div class='add'>+	.rx_queues = 0,</div><div class='add'>+	.rx_bds_per_q = 0,</div><div class='add'>+	.bp_in_en_shift = 17,</div><div class='add'>+	.bp_in_mask = 0x1ffff,</div><div class='add'>+	.hfb_filter_cnt = 48,</div><div class='add'>+	.hfb_filter_size = 128,</div><div class='add'>+	.qtag_mask = 0x3F,</div><div class='add'>+	.tbuf_offset = 0x0600,</div><div class='add'>+	.hfb_offset = 0x8000,</div><div class='add'>+	.hfb_reg_offset = 0xfc00,</div><div class='add'>+	.rdma_offset = 0x10000,</div><div class='add'>+	.tdma_offset = 0x11000,</div><div class='add'>+	.words_per_bd = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct bcmgenet_hw_params bcmgenet_hw_params_v4 = {</div><div class='add'>+	.tx_queues = 4,</div><div class='add'>+	.tx_bds_per_q = 32,</div><div class='add'>+	.rx_queues = 0,</div><div class='add'>+	.rx_bds_per_q = 0,</div><div class='add'>+	.bp_in_en_shift = 17,</div><div class='add'>+	.bp_in_mask = 0x1ffff,</div><div class='add'>+	.hfb_filter_cnt = 48,</div><div class='add'>+	.hfb_filter_size = 128,</div><div class='add'>+	.qtag_mask = 0x3F,</div><div class='add'>+	.tbuf_offset = 0x0600,</div><div class='add'>+	.hfb_offset = 0x8000,</div><div class='add'>+	.hfb_reg_offset = 0xfc00,</div><div class='add'>+	.rdma_offset = 0x2000,</div><div class='add'>+	.tdma_offset = 0x4000,</div><div class='add'>+	.words_per_bd = 3,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Infer hardware parameters from the detected GENET version */</div><div class='ctx'> static void bcmgenet_set_hw_params(struct bcmgenet_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct bcmgenet_hw_params *params;</div><div class='add'>+	const struct bcmgenet_hw_params *params;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> 	u8 major;</div><div class='ctx'> 	u16 gphy_rev;</div><div class='ctx'> </div><div class='del'>-	if (GENET_IS_V5(priv) || GENET_IS_V4(priv)) {</div><div class='del'>-		bcmgenet_dma_regs = bcmgenet_dma_regs_v3plus;</div><div class='del'>-		genet_dma_ring_regs = genet_dma_ring_regs_v4;</div><div class='del'>-	} else if (GENET_IS_V3(priv)) {</div><div class='add'>+	/* default to latest values */</div><div class='add'>+	params = &amp;bcmgenet_hw_params_v4;</div><div class='add'>+	bcmgenet_dma_regs = bcmgenet_dma_regs_v3plus;</div><div class='add'>+	genet_dma_ring_regs = genet_dma_ring_regs_v4;</div><div class='add'>+	if (GENET_IS_V3(priv)) {</div><div class='add'>+		params = &amp;bcmgenet_hw_params_v3;</div><div class='ctx'> 		bcmgenet_dma_regs = bcmgenet_dma_regs_v3plus;</div><div class='ctx'> 		genet_dma_ring_regs = genet_dma_ring_regs_v123;</div><div class='ctx'> 	} else if (GENET_IS_V2(priv)) {</div><div class='add'>+		params = &amp;bcmgenet_hw_params_v2;</div><div class='ctx'> 		bcmgenet_dma_regs = bcmgenet_dma_regs_v2;</div><div class='ctx'> 		genet_dma_ring_regs = genet_dma_ring_regs_v123;</div><div class='ctx'> 	} else if (GENET_IS_V1(priv)) {</div><div class='add'>+		params = &amp;bcmgenet_hw_params_v1;</div><div class='ctx'> 		bcmgenet_dma_regs = bcmgenet_dma_regs_v1;</div><div class='ctx'> 		genet_dma_ring_regs = genet_dma_ring_regs_v123;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/* enum genet_version starts at 1 */</div><div class='del'>-	priv-&gt;hw_params = &amp;bcmgenet_hw_params[priv-&gt;version];</div><div class='del'>-	params = priv-&gt;hw_params;</div><div class='add'>+	priv-&gt;hw_params = params;</div><div class='ctx'> </div><div class='ctx'> 	/* Read GENET HW version */</div><div class='ctx'> 	reg = bcmgenet_sys_readl(priv, SYS_REV_CTRL);</div><div class='ctx'> 	major = (reg &gt;&gt; 24 &amp; 0x0f);</div><div class='del'>-	if (major == 6)</div><div class='add'>+	if (major == 6 || major == 7)</div><div class='ctx'> 		major = 5;</div><div class='ctx'> 	else if (major == 5)</div><div class='ctx'> 		major = 4;</div><div class='hunk'>@@ -3898,7 +3841,7 @@ static void bcmgenet_set_hw_params(struct bcmgenet_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PHYS_ADDR_T_64BIT</div><div class='del'>-	if (!(params-&gt;flags &amp; GENET_HAS_40BITS))</div><div class='add'>+	if (!bcmgenet_has_40bits(priv))</div><div class='ctx'> 		pr_warn("GENET does not support 40-bits PA\n");</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -3923,7 +3866,7 @@ static void bcmgenet_set_hw_params(struct bcmgenet_priv *priv)</div><div class='ctx'> struct bcmgenet_plat_data {</div><div class='ctx'> 	enum bcmgenet_version version;</div><div class='ctx'> 	u32 dma_max_burst_length;</div><div class='del'>-	bool ephy_16nm;</div><div class='add'>+	u32 flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bcmgenet_plat_data v1_plat_data = {</div><div class='hunk'>@@ -3934,32 +3877,43 @@ static const struct bcmgenet_plat_data v1_plat_data = {</div><div class='ctx'> static const struct bcmgenet_plat_data v2_plat_data = {</div><div class='ctx'> 	.version = GENET_V2,</div><div class='ctx'> 	.dma_max_burst_length = DMA_MAX_BURST_LENGTH,</div><div class='add'>+	.flags = GENET_HAS_EXT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bcmgenet_plat_data v3_plat_data = {</div><div class='ctx'> 	.version = GENET_V3,</div><div class='ctx'> 	.dma_max_burst_length = DMA_MAX_BURST_LENGTH,</div><div class='add'>+	.flags = GENET_HAS_EXT | GENET_HAS_MDIO_INTR |</div><div class='add'>+		 GENET_HAS_MOCA_LINK_DET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bcmgenet_plat_data v4_plat_data = {</div><div class='ctx'> 	.version = GENET_V4,</div><div class='ctx'> 	.dma_max_burst_length = DMA_MAX_BURST_LENGTH,</div><div class='add'>+	.flags = GENET_HAS_40BITS | GENET_HAS_EXT |</div><div class='add'>+		 GENET_HAS_MDIO_INTR | GENET_HAS_MOCA_LINK_DET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bcmgenet_plat_data v5_plat_data = {</div><div class='ctx'> 	.version = GENET_V5,</div><div class='ctx'> 	.dma_max_burst_length = DMA_MAX_BURST_LENGTH,</div><div class='add'>+	.flags = GENET_HAS_40BITS | GENET_HAS_EXT |</div><div class='add'>+		 GENET_HAS_MDIO_INTR | GENET_HAS_MOCA_LINK_DET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bcmgenet_plat_data bcm2711_plat_data = {</div><div class='ctx'> 	.version = GENET_V5,</div><div class='ctx'> 	.dma_max_burst_length = 0x08,</div><div class='add'>+	.flags = GENET_HAS_40BITS | GENET_HAS_EXT |</div><div class='add'>+		 GENET_HAS_MDIO_INTR | GENET_HAS_MOCA_LINK_DET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bcmgenet_plat_data bcm7712_plat_data = {</div><div class='ctx'> 	.version = GENET_V5,</div><div class='ctx'> 	.dma_max_burst_length = DMA_MAX_BURST_LENGTH,</div><div class='del'>-	.ephy_16nm = true,</div><div class='add'>+	.flags = GENET_HAS_40BITS | GENET_HAS_EXT |</div><div class='add'>+		 GENET_HAS_MDIO_INTR | GENET_HAS_MOCA_LINK_DET |</div><div class='add'>+		 GENET_HAS_EPHY_16NM,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id bcmgenet_match[] = {</div><div class='hunk'>@@ -3976,7 +3930,6 @@ MODULE_DEVICE_TABLE(of, bcmgenet_match);</div><div class='ctx'> </div><div class='ctx'> static int bcmgenet_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct bcmgenet_platform_data *pd = pdev-&gt;dev.platform_data;</div><div class='ctx'> 	const struct bcmgenet_plat_data *pdata;</div><div class='ctx'> 	struct bcmgenet_priv *priv;</div><div class='ctx'> 	struct net_device *dev;</div><div class='hunk'>@@ -4036,6 +3989,8 @@ static int bcmgenet_probe(struct platform_device *pdev)</div><div class='ctx'> 	dev-&gt;hw_features |= dev-&gt;features;</div><div class='ctx'> 	dev-&gt;vlan_features |= dev-&gt;features;</div><div class='ctx'> </div><div class='add'>+	netdev_sw_irq_coalesce_default_on(dev);</div><div class='add'>+</div><div class='ctx'> 	/* Request the WOL interrupt and advertise suspend if available */</div><div class='ctx'> 	priv-&gt;wol_irq_disabled = true;</div><div class='ctx'> 	if (priv-&gt;wol_irq &gt; 0) {</div><div class='hunk'>@@ -4057,10 +4012,7 @@ static int bcmgenet_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (pdata) {</div><div class='ctx'> 		priv-&gt;version = pdata-&gt;version;</div><div class='ctx'> 		priv-&gt;dma_max_burst_length = pdata-&gt;dma_max_burst_length;</div><div class='del'>-		priv-&gt;ephy_16nm = pdata-&gt;ephy_16nm;</div><div class='del'>-	} else {</div><div class='del'>-		priv-&gt;version = pd-&gt;genet_version;</div><div class='del'>-		priv-&gt;dma_max_burst_length = DMA_MAX_BURST_LENGTH;</div><div class='add'>+		priv-&gt;flags = pdata-&gt;flags;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;clk = devm_clk_get_optional(&amp;priv-&gt;pdev-&gt;dev, "enet");</div><div class='hunk'>@@ -4077,7 +4029,7 @@ static int bcmgenet_probe(struct platform_device *pdev)</div><div class='ctx'> 	bcmgenet_set_hw_params(priv);</div><div class='ctx'> </div><div class='ctx'> 	err = -EIO;</div><div class='del'>-	if (priv-&gt;hw_params-&gt;flags &amp; GENET_HAS_40BITS)</div><div class='add'>+	if (bcmgenet_has_40bits(priv))</div><div class='ctx'> 		err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(40));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(32));</div><div class='hunk'>@@ -4110,16 +4062,13 @@ static int bcmgenet_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (device_get_phy_mode(&amp;pdev-&gt;dev) == PHY_INTERFACE_MODE_INTERNAL)</div><div class='ctx'> 		bcmgenet_power_up(priv, GENET_POWER_PASSIVE);</div><div class='ctx'> </div><div class='del'>-	if (pd &amp;&amp; !IS_ERR_OR_NULL(pd-&gt;mac_address))</div><div class='del'>-		eth_hw_addr_set(dev, pd-&gt;mac_address);</div><div class='del'>-	else</div><div class='del'>-		if (device_get_ethdev_address(&amp;pdev-&gt;dev, dev))</div><div class='del'>-			if (has_acpi_companion(&amp;pdev-&gt;dev)) {</div><div class='del'>-				u8 addr[ETH_ALEN];</div><div class='add'>+	if (device_get_ethdev_address(&amp;pdev-&gt;dev, dev))</div><div class='add'>+		if (has_acpi_companion(&amp;pdev-&gt;dev)) {</div><div class='add'>+			u8 addr[ETH_ALEN];</div><div class='ctx'> </div><div class='del'>-				bcmgenet_get_hw_addr(priv, addr);</div><div class='del'>-				eth_hw_addr_set(dev, addr);</div><div class='del'>-			}</div><div class='add'>+			bcmgenet_get_hw_addr(priv, addr);</div><div class='add'>+			eth_hw_addr_set(dev, addr);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 	if (!is_valid_ether_addr(dev-&gt;dev_addr)) {</div><div class='ctx'> 		dev_warn(&amp;pdev-&gt;dev, "using random Ethernet MAC\n");</div><div class='hunk'>@@ -4132,16 +4081,19 @@ static int bcmgenet_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_clk_disable;</div><div class='ctx'> </div><div class='del'>-	/* setup number of real queues  + 1 (GENET_V1 has 0 hardware queues</div><div class='del'>-	 * just the ring 16 descriptor based TX</div><div class='del'>-	 */</div><div class='add'>+	/* setup number of real queues + 1 */</div><div class='ctx'> 	netif_set_real_num_tx_queues(priv-&gt;dev, priv-&gt;hw_params-&gt;tx_queues + 1);</div><div class='ctx'> 	netif_set_real_num_rx_queues(priv-&gt;dev, priv-&gt;hw_params-&gt;rx_queues + 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Set default coalescing parameters */</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params-&gt;rx_queues; i++)</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;rx_queues; i++)</div><div class='ctx'> 		priv-&gt;rx_rings[i].rx_max_coalesced_frames = 1;</div><div class='del'>-	priv-&gt;rx_rings[DESC_INDEX].rx_max_coalesced_frames = 1;</div><div class='add'>+</div><div class='add'>+	/* Initialize u64 stats seq counter for 32bit machines */</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;rx_queues; i++)</div><div class='add'>+		u64_stats_init(&amp;priv-&gt;rx_rings[i].stats64.syncp);</div><div class='add'>+	for (i = 0; i &lt;= priv-&gt;hw_params-&gt;tx_queues; i++)</div><div class='add'>+		u64_stats_init(&amp;priv-&gt;tx_rings[i].stats64.syncp);</div><div class='ctx'> </div><div class='ctx'> 	/* libphy will determine the link state */</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='hunk'>@@ -4205,9 +4157,22 @@ static int bcmgenet_resume_noirq(struct device *d)</div><div class='ctx'> 		reg = bcmgenet_intrl2_0_readl(priv, INTRL2_CPU_STAT);</div><div class='ctx'> 		if (reg &amp; UMAC_IRQ_WAKE_EVENT)</div><div class='ctx'> 			pm_wakeup_event(&amp;priv-&gt;pdev-&gt;dev, 0);</div><div class='add'>+</div><div class='add'>+		/* From WOL-enabled suspend, switch to regular clock */</div><div class='add'>+		if (!bcmgenet_power_up(priv, GENET_POWER_WOL_MAGIC))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		/* Failed so fall through to reset MAC */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bcmgenet_intrl2_0_writel(priv, UMAC_IRQ_WAKE_EVENT, INTRL2_CPU_CLEAR);</div><div class='add'>+	/* If this is an internal GPHY, power it back on now, before UniMAC is</div><div class='add'>+	 * brought out of reset as absolutely no UniMAC activity is allowed</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;internal_phy)</div><div class='add'>+		bcmgenet_power_up(priv, GENET_POWER_PASSIVE);</div><div class='add'>+</div><div class='add'>+	/* take MAC out of reset */</div><div class='add'>+	bcmgenet_umac_reset(priv);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -4217,23 +4182,46 @@ static int bcmgenet_resume(struct device *d)</div><div class='ctx'> 	struct net_device *dev = dev_get_drvdata(d);</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct bcmgenet_rxnfc_rule *rule;</div><div class='del'>-	unsigned long dma_ctrl;</div><div class='ctx'> 	int ret;</div><div class='add'>+	u32 reg;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* From WOL-enabled suspend, switch to regular clock */</div><div class='del'>-	if (device_may_wakeup(d) &amp;&amp; priv-&gt;wolopts)</div><div class='del'>-		bcmgenet_power_up(priv, GENET_POWER_WOL_MAGIC);</div><div class='del'>-</div><div class='del'>-	/* If this is an internal GPHY, power it back on now, before UniMAC is</div><div class='del'>-	 * brought out of reset as absolutely no UniMAC activity is allowed</div><div class='del'>-	 */</div><div class='del'>-	if (priv-&gt;internal_phy)</div><div class='del'>-		bcmgenet_power_up(priv, GENET_POWER_PASSIVE);</div><div class='del'>-</div><div class='del'>-	bcmgenet_umac_reset(priv);</div><div class='add'>+	if (device_may_wakeup(d) &amp;&amp; priv-&gt;wolopts) {</div><div class='add'>+		reg = bcmgenet_umac_readl(priv, UMAC_CMD);</div><div class='add'>+		if (reg &amp; CMD_RX_EN) {</div><div class='add'>+			/* Successfully exited WoL, just resume data flows */</div><div class='add'>+			list_for_each_entry(rule, &amp;priv-&gt;rxnfc_list, list)</div><div class='add'>+				if (rule-&gt;state == BCMGENET_RXNFC_STATE_ENABLED)</div><div class='add'>+					bcmgenet_hfb_enable_filter(priv,</div><div class='add'>+							rule-&gt;fs.location + 1);</div><div class='add'>+			bcmgenet_hfb_enable_filter(priv, 0);</div><div class='add'>+			bcmgenet_set_rx_mode(dev);</div><div class='add'>+			bcmgenet_enable_rx_napi(priv);</div><div class='add'>+</div><div class='add'>+			/* Reinitialize Tx flows */</div><div class='add'>+			bcmgenet_tdma_disable(priv);</div><div class='add'>+			bcmgenet_init_tx_queues(priv-&gt;dev);</div><div class='add'>+			reg = bcmgenet_tdma_readl(priv, DMA_CTRL);</div><div class='add'>+			reg |= DMA_EN;</div><div class='add'>+			bcmgenet_tdma_writel(priv, reg, DMA_CTRL);</div><div class='add'>+			bcmgenet_enable_tx_napi(priv);</div><div class='add'>+</div><div class='add'>+			bcmgenet_link_intr_enable(priv);</div><div class='add'>+			phy_start_machine(dev-&gt;phydev);</div><div class='add'>+</div><div class='add'>+			netif_device_attach(dev);</div><div class='add'>+			enable_irq(priv-&gt;irq1);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		/* MAC was reset so complete bcmgenet_netif_stop() */</div><div class='add'>+		umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, false);</div><div class='add'>+		bcmgenet_rdma_disable(priv);</div><div class='add'>+		bcmgenet_intr_disable(priv);</div><div class='add'>+		bcmgenet_fini_dma(priv);</div><div class='add'>+		enable_irq(priv-&gt;irq1);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	init_umac(priv);</div><div class='ctx'> </div><div class='hunk'>@@ -4254,19 +4242,13 @@ static int bcmgenet_resume(struct device *d)</div><div class='ctx'> 		if (rule-&gt;state != BCMGENET_RXNFC_STATE_UNUSED)</div><div class='ctx'> 			bcmgenet_hfb_create_rxnfc_filter(priv, rule);</div><div class='ctx'> </div><div class='del'>-	/* Disable RX/TX DMA and flush TX queues */</div><div class='del'>-	dma_ctrl = bcmgenet_dma_disable(priv, false);</div><div class='del'>-</div><div class='ctx'> 	/* Reinitialize TDMA and RDMA and SW housekeeping */</div><div class='del'>-	ret = bcmgenet_init_dma(priv);</div><div class='add'>+	ret = bcmgenet_init_dma(priv, false);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_err(dev, "failed to initialize DMA\n");</div><div class='ctx'> 		goto out_clk_disable;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Always enable ring 16 - descriptor ring */</div><div class='del'>-	bcmgenet_enable_dma(priv, dma_ctrl);</div><div class='del'>-</div><div class='ctx'> 	if (!device_may_wakeup(d))</div><div class='ctx'> 		phy_resume(dev-&gt;phydev);</div><div class='ctx'> </div><div class='hunk'>@@ -4287,19 +4269,52 @@ static int bcmgenet_suspend(struct device *d)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = dev_get_drvdata(d);</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct bcmgenet_rxnfc_rule *rule;</div><div class='add'>+	u32 reg, hfb_enable = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(dev);</div><div class='ctx'> </div><div class='del'>-	bcmgenet_netif_stop(dev, true);</div><div class='add'>+	if (device_may_wakeup(d) &amp;&amp; priv-&gt;wolopts) {</div><div class='add'>+		netif_tx_disable(dev);</div><div class='add'>+</div><div class='add'>+		/* Suspend non-wake Rx data flows */</div><div class='add'>+		if (priv-&gt;wolopts &amp; WAKE_FILTER)</div><div class='add'>+			list_for_each_entry(rule, &amp;priv-&gt;rxnfc_list, list)</div><div class='add'>+				if (rule-&gt;fs.ring_cookie == RX_CLS_FLOW_WAKE &amp;&amp;</div><div class='add'>+				    rule-&gt;state == BCMGENET_RXNFC_STATE_ENABLED)</div><div class='add'>+					hfb_enable |= 1 &lt;&lt; rule-&gt;fs.location;</div><div class='add'>+		reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);</div><div class='add'>+		if (GENET_IS_V1(priv) || GENET_IS_V2(priv)) {</div><div class='add'>+			reg &amp;= ~RBUF_HFB_FILTER_EN_MASK;</div><div class='add'>+			reg |= hfb_enable &lt;&lt; (RBUF_HFB_FILTER_EN_SHIFT + 1);</div><div class='add'>+		} else {</div><div class='add'>+			bcmgenet_hfb_reg_writel(priv, hfb_enable &lt;&lt; 1,</div><div class='add'>+						HFB_FLT_ENABLE_V3PLUS + 4);</div><div class='add'>+		}</div><div class='add'>+		if (!hfb_enable)</div><div class='add'>+			reg &amp;= ~RBUF_HFB_EN;</div><div class='add'>+		bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);</div><div class='ctx'> </div><div class='del'>-	if (!device_may_wakeup(d))</div><div class='del'>-		phy_suspend(dev-&gt;phydev);</div><div class='add'>+		/* Clear any old filter matches so only new matches wake */</div><div class='add'>+		bcmgenet_intrl2_0_writel(priv, 0xFFFFFFFF, INTRL2_CPU_MASK_SET);</div><div class='add'>+		bcmgenet_intrl2_0_writel(priv, 0xFFFFFFFF, INTRL2_CPU_CLEAR);</div><div class='ctx'> </div><div class='del'>-	/* Disable filtering */</div><div class='del'>-	bcmgenet_hfb_reg_writel(priv, 0, HFB_CTRL);</div><div class='add'>+		if (-ETIMEDOUT == bcmgenet_tdma_disable(priv))</div><div class='add'>+			netdev_warn(priv-&gt;dev,</div><div class='add'>+				    "Timed out while disabling TX DMA\n");</div><div class='add'>+</div><div class='add'>+		bcmgenet_disable_tx_napi(priv);</div><div class='add'>+		bcmgenet_disable_rx_napi(priv);</div><div class='add'>+		disable_irq(priv-&gt;irq1);</div><div class='add'>+		bcmgenet_tx_reclaim_all(dev);</div><div class='add'>+		bcmgenet_fini_tx_napi(priv);</div><div class='add'>+	} else {</div><div class='add'>+		/* Teardown the interface */</div><div class='add'>+		bcmgenet_netif_stop(dev, true);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.h b/drivers/net/ethernet/broadcom/genet/bcmgenet.h<br/>index 43b923c48b14..5ec3979779ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/genet/bcmgenet.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/genet/bcmgenet.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/genet/bcmgenet.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/genet/bcmgenet.h</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2014-2024 Broadcom</div><div class='add'>+ * Copyright (c) 2014-2025 Broadcom</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __BCMGENET_H__</div><div class='hunk'>@@ -18,6 +18,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "../unimac.h"</div><div class='ctx'> </div><div class='add'>+/* Maximum number of hardware queues, downsized if needed */</div><div class='add'>+#define GENET_MAX_MQ_CNT	4</div><div class='add'>+</div><div class='ctx'> /* total number of Buffer Descriptors, same for Rx/Tx */</div><div class='ctx'> #define TOTAL_DESC				256</div><div class='ctx'> </div><div class='hunk'>@@ -152,6 +155,30 @@ struct bcmgenet_mib_counters {</div><div class='ctx'> 	u32	tx_realloc_tsb_failed;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct bcmgenet_tx_stats64 {</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+	u64_stats_t	packets;</div><div class='add'>+	u64_stats_t	bytes;</div><div class='add'>+	u64_stats_t	errors;</div><div class='add'>+	u64_stats_t	dropped;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bcmgenet_rx_stats64 {</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+	u64_stats_t	bytes;</div><div class='add'>+	u64_stats_t	packets;</div><div class='add'>+	u64_stats_t	errors;</div><div class='add'>+	u64_stats_t	dropped;</div><div class='add'>+	u64_stats_t	multicast;</div><div class='add'>+	u64_stats_t	broadcast;</div><div class='add'>+	u64_stats_t	missed;</div><div class='add'>+	u64_stats_t	length_errors;</div><div class='add'>+	u64_stats_t	over_errors;</div><div class='add'>+	u64_stats_t	crc_errors;</div><div class='add'>+	u64_stats_t	frame_errors;</div><div class='add'>+	u64_stats_t	fragmented_errors;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define UMAC_MIB_START			0x400</div><div class='ctx'> </div><div class='ctx'> #define UMAC_MDIO_CMD			0x614</div><div class='hunk'>@@ -271,6 +298,8 @@ struct bcmgenet_mib_counters {</div><div class='ctx'> /* Only valid for GENETv3+ */</div><div class='ctx'> #define UMAC_IRQ_MDIO_DONE		(1 &lt;&lt; 23)</div><div class='ctx'> #define UMAC_IRQ_MDIO_ERROR		(1 &lt;&lt; 24)</div><div class='add'>+#define UMAC_IRQ_MDIO_EVENT		(UMAC_IRQ_MDIO_DONE | \</div><div class='add'>+					 UMAC_IRQ_MDIO_ERROR)</div><div class='ctx'> </div><div class='ctx'> /* INTRL2 instance 1 definitions */</div><div class='ctx'> #define UMAC_IRQ1_TX_INTR_MASK		0xFFFF</div><div class='hunk'>@@ -476,6 +505,7 @@ enum bcmgenet_version {</div><div class='ctx'> #define GENET_HAS_EXT		(1 &lt;&lt; 1)</div><div class='ctx'> #define GENET_HAS_MDIO_INTR	(1 &lt;&lt; 2)</div><div class='ctx'> #define GENET_HAS_MOCA_LINK_DET	(1 &lt;&lt; 3)</div><div class='add'>+#define GENET_HAS_EPHY_16NM	(1 &lt;&lt; 4)</div><div class='ctx'> </div><div class='ctx'> /* BCMGENET hardware parameters, keep this structure nicely aligned</div><div class='ctx'>  * since it is going to be used in hot paths</div><div class='hunk'>@@ -496,7 +526,6 @@ struct bcmgenet_hw_params {</div><div class='ctx'> 	u32		rdma_offset;</div><div class='ctx'> 	u32		tdma_offset;</div><div class='ctx'> 	u32		words_per_bd;</div><div class='del'>-	u32		flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bcmgenet_skb_cb {</div><div class='hunk'>@@ -510,10 +539,8 @@ struct bcmgenet_skb_cb {</div><div class='ctx'> struct bcmgenet_tx_ring {</div><div class='ctx'> 	spinlock_t	lock;		/* ring lock */</div><div class='ctx'> 	struct napi_struct napi;	/* NAPI per tx queue */</div><div class='del'>-	unsigned long	packets;</div><div class='del'>-	unsigned long	bytes;</div><div class='add'>+	struct bcmgenet_tx_stats64 stats64;</div><div class='ctx'> 	unsigned int	index;		/* ring index */</div><div class='del'>-	unsigned int	queue;		/* queue index */</div><div class='ctx'> 	struct enet_cb	*cbs;		/* tx ring buffer control block*/</div><div class='ctx'> 	unsigned int	size;		/* size of each tx ring */</div><div class='ctx'> 	unsigned int    clean_ptr;      /* Tx ring clean pointer */</div><div class='hunk'>@@ -523,8 +550,6 @@ struct bcmgenet_tx_ring {</div><div class='ctx'> 	unsigned int	prod_index;	/* Tx ring producer index SW copy */</div><div class='ctx'> 	unsigned int	cb_ptr;		/* Tx ring initial CB ptr */</div><div class='ctx'> 	unsigned int	end_ptr;	/* Tx ring end CB ptr */</div><div class='del'>-	void (*int_enable)(struct bcmgenet_tx_ring *);</div><div class='del'>-	void (*int_disable)(struct bcmgenet_tx_ring *);</div><div class='ctx'> 	struct bcmgenet_priv *priv;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -538,10 +563,7 @@ struct bcmgenet_net_dim {</div><div class='ctx'> </div><div class='ctx'> struct bcmgenet_rx_ring {</div><div class='ctx'> 	struct napi_struct napi;	/* Rx NAPI struct */</div><div class='del'>-	unsigned long	bytes;</div><div class='del'>-	unsigned long	packets;</div><div class='del'>-	unsigned long	errors;</div><div class='del'>-	unsigned long	dropped;</div><div class='add'>+	struct bcmgenet_rx_stats64 stats64;</div><div class='ctx'> 	unsigned int	index;		/* Rx ring index */</div><div class='ctx'> 	struct enet_cb	*cbs;		/* Rx ring buffer control block */</div><div class='ctx'> 	unsigned int	size;		/* Rx ring size */</div><div class='hunk'>@@ -553,8 +575,6 @@ struct bcmgenet_rx_ring {</div><div class='ctx'> 	struct bcmgenet_net_dim dim;</div><div class='ctx'> 	u32		rx_max_coalesced_frames;</div><div class='ctx'> 	u32		rx_coalesce_usecs;</div><div class='del'>-	void (*int_enable)(struct bcmgenet_rx_ring *);</div><div class='del'>-	void (*int_disable)(struct bcmgenet_rx_ring *);</div><div class='ctx'> 	struct bcmgenet_priv *priv;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -583,7 +603,7 @@ struct bcmgenet_priv {</div><div class='ctx'> 	struct enet_cb *tx_cbs;</div><div class='ctx'> 	unsigned int num_tx_bds;</div><div class='ctx'> </div><div class='del'>-	struct bcmgenet_tx_ring tx_rings[DESC_INDEX + 1];</div><div class='add'>+	struct bcmgenet_tx_ring tx_rings[GENET_MAX_MQ_CNT + 1];</div><div class='ctx'> </div><div class='ctx'> 	/* receive variables */</div><div class='ctx'> 	void __iomem *rx_bds;</div><div class='hunk'>@@ -593,10 +613,11 @@ struct bcmgenet_priv {</div><div class='ctx'> 	struct bcmgenet_rxnfc_rule rxnfc_rules[MAX_NUM_OF_FS_RULES];</div><div class='ctx'> 	struct list_head rxnfc_list;</div><div class='ctx'> </div><div class='del'>-	struct bcmgenet_rx_ring rx_rings[DESC_INDEX + 1];</div><div class='add'>+	struct bcmgenet_rx_ring rx_rings[GENET_MAX_MQ_CNT + 1];</div><div class='ctx'> </div><div class='ctx'> 	/* other misc variables */</div><div class='del'>-	struct bcmgenet_hw_params *hw_params;</div><div class='add'>+	const struct bcmgenet_hw_params *hw_params;</div><div class='add'>+	u32 flags;</div><div class='ctx'> 	unsigned autoneg_pause:1;</div><div class='ctx'> 	unsigned tx_pause:1;</div><div class='ctx'> 	unsigned rx_pause:1;</div><div class='hunk'>@@ -615,7 +636,6 @@ struct bcmgenet_priv {</div><div class='ctx'> 	phy_interface_t phy_interface;</div><div class='ctx'> 	int phy_addr;</div><div class='ctx'> 	int ext_phy;</div><div class='del'>-	bool ephy_16nm;</div><div class='ctx'> </div><div class='ctx'> 	/* Interrupt variables */</div><div class='ctx'> 	struct work_struct bcmgenet_irq_work;</div><div class='hunk'>@@ -643,13 +663,37 @@ struct bcmgenet_priv {</div><div class='ctx'> 	struct clk *clk_wol;</div><div class='ctx'> 	u32 wolopts;</div><div class='ctx'> 	u8 sopass[SOPASS_MAX];</div><div class='del'>-	bool wol_active;</div><div class='ctx'> </div><div class='ctx'> 	struct bcmgenet_mib_counters mib;</div><div class='ctx'> </div><div class='ctx'> 	struct ethtool_keee eee;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static inline bool bcmgenet_has_40bits(struct bcmgenet_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return !!(priv-&gt;flags &amp; GENET_HAS_40BITS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool bcmgenet_has_ext(struct bcmgenet_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return !!(priv-&gt;flags &amp; GENET_HAS_EXT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool bcmgenet_has_mdio_intr(struct bcmgenet_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return !!(priv-&gt;flags &amp; GENET_HAS_MDIO_INTR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool bcmgenet_has_moca_link_det(struct bcmgenet_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return !!(priv-&gt;flags &amp; GENET_HAS_MOCA_LINK_DET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool bcmgenet_has_ephy_16nm(struct bcmgenet_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return !!(priv-&gt;flags &amp; GENET_HAS_EPHY_16NM);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define GENET_IO_MACRO(name, offset)					\</div><div class='ctx'> static inline u32 bcmgenet_##name##_readl(struct bcmgenet_priv *priv,	\</div><div class='ctx'> 					u32 off)			\</div><div class='hunk'>@@ -702,8 +746,8 @@ void bcmgenet_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol);</div><div class='ctx'> int bcmgenet_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol);</div><div class='ctx'> int bcmgenet_wol_power_down_cfg(struct bcmgenet_priv *priv,</div><div class='ctx'> 				enum bcmgenet_power_mode mode);</div><div class='del'>-void bcmgenet_wol_power_up_cfg(struct bcmgenet_priv *priv,</div><div class='del'>-			       enum bcmgenet_power_mode mode);</div><div class='add'>+int bcmgenet_wol_power_up_cfg(struct bcmgenet_priv *priv,</div><div class='add'>+			      enum bcmgenet_power_mode mode);</div><div class='ctx'> </div><div class='ctx'> void bcmgenet_eee_enable_set(struct net_device *dev, bool enable,</div><div class='ctx'> 			     bool tx_lpi_enabled);</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c b/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c<br/>index 0715ea5bf13e..8fb551288298 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Broadcom GENET (Gigabit Ethernet) Wake-on-LAN support</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2014-2024 Broadcom</div><div class='add'>+ * Copyright (c) 2014-2025 Broadcom</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt)				"bcmgenet_wol: " fmt</div><div class='hunk'>@@ -41,9 +41,12 @@ void bcmgenet_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct device *kdev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	u32 phy_wolopts = 0;</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;phydev)</div><div class='add'>+	if (dev-&gt;phydev) {</div><div class='ctx'> 		phy_ethtool_get_wol(dev-&gt;phydev, wol);</div><div class='add'>+		phy_wolopts = wol-&gt;wolopts;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* MAC is not wake-up capable, return what the PHY does */</div><div class='ctx'> 	if (!device_can_wakeup(kdev))</div><div class='hunk'>@@ -51,9 +54,14 @@ void bcmgenet_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> </div><div class='ctx'> 	/* Overlay MAC capabilities with that of the PHY queried before */</div><div class='ctx'> 	wol-&gt;supported |= WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;</div><div class='del'>-	wol-&gt;wolopts = priv-&gt;wolopts;</div><div class='del'>-	memset(wol-&gt;sopass, 0, sizeof(wol-&gt;sopass));</div><div class='add'>+	wol-&gt;wolopts |= priv-&gt;wolopts;</div><div class='add'>+</div><div class='add'>+	/* Return the PHY configured magic password */</div><div class='add'>+	if (phy_wolopts &amp; WAKE_MAGICSECURE)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='add'>+	/* Otherwise the MAC one */</div><div class='add'>+	memset(wol-&gt;sopass, 0, sizeof(wol-&gt;sopass));</div><div class='ctx'> 	if (wol-&gt;wolopts &amp; WAKE_MAGICSECURE)</div><div class='ctx'> 		memcpy(wol-&gt;sopass, priv-&gt;sopass, sizeof(priv-&gt;sopass));</div><div class='ctx'> }</div><div class='hunk'>@@ -70,7 +78,7 @@ int bcmgenet_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> 	/* Try Wake-on-LAN from the PHY first */</div><div class='ctx'> 	if (dev-&gt;phydev) {</div><div class='ctx'> 		ret = phy_ethtool_set_wol(dev-&gt;phydev, wol);</div><div class='del'>-		if (ret != -EOPNOTSUPP)</div><div class='add'>+		if (ret != -EOPNOTSUPP &amp;&amp; wol-&gt;wolopts)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -137,8 +145,7 @@ int bcmgenet_wol_power_down_cfg(struct bcmgenet_priv *priv,</div><div class='ctx'> 				enum bcmgenet_power_mode mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = priv-&gt;dev;</div><div class='del'>-	struct bcmgenet_rxnfc_rule *rule;</div><div class='del'>-	u32 reg, hfb_ctrl_reg, hfb_enable = 0;</div><div class='add'>+	u32 reg, hfb_ctrl_reg;</div><div class='ctx'> 	int retries = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (mode != GENET_POWER_WOL_MAGIC) {</div><div class='hunk'>@@ -146,18 +153,6 @@ int bcmgenet_wol_power_down_cfg(struct bcmgenet_priv *priv,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Can't suspend with WoL if MAC is still in reset */</div><div class='del'>-	spin_lock_bh(&amp;priv-&gt;reg_lock);</div><div class='del'>-	reg = bcmgenet_umac_readl(priv, UMAC_CMD);</div><div class='del'>-	if (reg &amp; CMD_SW_RESET)</div><div class='del'>-		reg &amp;= ~CMD_SW_RESET;</div><div class='del'>-</div><div class='del'>-	/* disable RX */</div><div class='del'>-	reg &amp;= ~CMD_RX_EN;</div><div class='del'>-	bcmgenet_umac_writel(priv, reg, UMAC_CMD);</div><div class='del'>-	spin_unlock_bh(&amp;priv-&gt;reg_lock);</div><div class='del'>-	mdelay(10);</div><div class='del'>-</div><div class='ctx'> 	if (priv-&gt;wolopts &amp; (WAKE_MAGIC | WAKE_MAGICSECURE)) {</div><div class='ctx'> 		reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);</div><div class='ctx'> 		reg |= MPD_EN;</div><div class='hunk'>@@ -169,13 +164,8 @@ int bcmgenet_wol_power_down_cfg(struct bcmgenet_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hfb_ctrl_reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);</div><div class='del'>-	if (priv-&gt;wolopts &amp; WAKE_FILTER) {</div><div class='del'>-		list_for_each_entry(rule, &amp;priv-&gt;rxnfc_list, list)</div><div class='del'>-			if (rule-&gt;fs.ring_cookie == RX_CLS_FLOW_WAKE)</div><div class='del'>-				hfb_enable |= (1 &lt;&lt; rule-&gt;fs.location);</div><div class='del'>-		reg = (hfb_ctrl_reg &amp; ~RBUF_HFB_EN) | RBUF_ACPI_EN;</div><div class='del'>-		bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);</div><div class='del'>-	}</div><div class='add'>+	reg = hfb_ctrl_reg | RBUF_ACPI_EN;</div><div class='add'>+	bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* Do not leave UniMAC in MPD mode only */</div><div class='ctx'> 	retries = bcmgenet_poll_wol_status(priv);</div><div class='hunk'>@@ -190,15 +180,12 @@ int bcmgenet_wol_power_down_cfg(struct bcmgenet_priv *priv,</div><div class='ctx'> 	netif_dbg(priv, wol, dev, "MPD WOL-ready status set after %d msec\n",</div><div class='ctx'> 		  retries);</div><div class='ctx'> </div><div class='del'>-	clk_prepare_enable(priv-&gt;clk_wol);</div><div class='del'>-	priv-&gt;wol_active = 1;</div><div class='add'>+	/* Disable phy status updates while suspending */</div><div class='add'>+	mutex_lock(&amp;dev-&gt;phydev-&gt;lock);</div><div class='add'>+	dev-&gt;phydev-&gt;state = PHY_READY;</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;phydev-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	if (hfb_enable) {</div><div class='del'>-		bcmgenet_hfb_reg_writel(priv, hfb_enable,</div><div class='del'>-					HFB_FLT_ENABLE_V3PLUS + 4);</div><div class='del'>-		hfb_ctrl_reg = RBUF_HFB_EN | RBUF_ACPI_EN;</div><div class='del'>-		bcmgenet_hfb_reg_writel(priv, hfb_ctrl_reg, HFB_CTRL);</div><div class='del'>-	}</div><div class='add'>+	clk_prepare_enable(priv-&gt;clk_wol);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable CRC forward */</div><div class='ctx'> 	spin_lock_bh(&amp;priv-&gt;reg_lock);</div><div class='hunk'>@@ -206,13 +193,17 @@ int bcmgenet_wol_power_down_cfg(struct bcmgenet_priv *priv,</div><div class='ctx'> 	priv-&gt;crc_fwd_en = 1;</div><div class='ctx'> 	reg |= CMD_CRC_FWD;</div><div class='ctx'> </div><div class='add'>+	/* Can't suspend with WoL if MAC is still in reset */</div><div class='add'>+	if (reg &amp; CMD_SW_RESET)</div><div class='add'>+		reg &amp;= ~CMD_SW_RESET;</div><div class='add'>+</div><div class='ctx'> 	/* Receiver must be enabled for WOL MP detection */</div><div class='ctx'> 	reg |= CMD_RX_EN;</div><div class='ctx'> 	bcmgenet_umac_writel(priv, reg, UMAC_CMD);</div><div class='ctx'> 	spin_unlock_bh(&amp;priv-&gt;reg_lock);</div><div class='ctx'> </div><div class='ctx'> 	reg = UMAC_IRQ_MPD_R;</div><div class='del'>-	if (hfb_enable)</div><div class='add'>+	if (hfb_ctrl_reg &amp; RBUF_HFB_EN)</div><div class='ctx'> 		reg |=  UMAC_IRQ_HFB_SM | UMAC_IRQ_HFB_MM;</div><div class='ctx'> </div><div class='ctx'> 	bcmgenet_intrl2_0_writel(priv, reg, INTRL2_CPU_MASK_CLEAR);</div><div class='hunk'>@@ -220,40 +211,42 @@ int bcmgenet_wol_power_down_cfg(struct bcmgenet_priv *priv,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bcmgenet_wol_power_up_cfg(struct bcmgenet_priv *priv,</div><div class='del'>-			       enum bcmgenet_power_mode mode)</div><div class='add'>+int bcmgenet_wol_power_up_cfg(struct bcmgenet_priv *priv,</div><div class='add'>+			      enum bcmgenet_power_mode mode)</div><div class='ctx'> {</div><div class='add'>+	struct net_device *dev = priv-&gt;dev;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='ctx'> 	if (mode != GENET_POWER_WOL_MAGIC) {</div><div class='ctx'> 		netif_err(priv, wol, priv-&gt;dev, "invalid mode: %d\n", mode);</div><div class='del'>-		return;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;wol_active)</div><div class='del'>-		return;	/* failed to suspend so skip the rest */</div><div class='del'>-</div><div class='del'>-	priv-&gt;wol_active = 0;</div><div class='ctx'> 	clk_disable_unprepare(priv-&gt;clk_wol);</div><div class='ctx'> 	priv-&gt;crc_fwd_en = 0;</div><div class='ctx'> </div><div class='add'>+	bcmgenet_intrl2_0_writel(priv, UMAC_IRQ_WAKE_EVENT,</div><div class='add'>+				 INTRL2_CPU_MASK_SET);</div><div class='add'>+	if (bcmgenet_has_mdio_intr(priv))</div><div class='add'>+		bcmgenet_intrl2_0_writel(priv,</div><div class='add'>+					 UMAC_IRQ_MDIO_EVENT,</div><div class='add'>+					 INTRL2_CPU_MASK_CLEAR);</div><div class='add'>+</div><div class='ctx'> 	/* Disable Magic Packet Detection */</div><div class='ctx'> 	if (priv-&gt;wolopts &amp; (WAKE_MAGIC | WAKE_MAGICSECURE)) {</div><div class='ctx'> 		reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);</div><div class='ctx'> 		if (!(reg &amp; MPD_EN))</div><div class='del'>-			return;	/* already reset so skip the rest */</div><div class='add'>+			return -EPERM;	/* already reset so skip the rest */</div><div class='ctx'> 		reg &amp;= ~(MPD_EN | MPD_PW_EN);</div><div class='ctx'> 		bcmgenet_umac_writel(priv, reg, UMAC_MPD_CTRL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Disable WAKE_FILTER Detection */</div><div class='del'>-	if (priv-&gt;wolopts &amp; WAKE_FILTER) {</div><div class='del'>-		reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);</div><div class='del'>-		if (!(reg &amp; RBUF_ACPI_EN))</div><div class='del'>-			return;	/* already reset so skip the rest */</div><div class='del'>-		reg &amp;= ~(RBUF_HFB_EN | RBUF_ACPI_EN);</div><div class='del'>-		bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);</div><div class='del'>-	}</div><div class='add'>+	/* Disable ACPI mode */</div><div class='add'>+	reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);</div><div class='add'>+	if (!(reg &amp; RBUF_ACPI_EN))</div><div class='add'>+		return -EPERM;	/* already reset so skip the rest */</div><div class='add'>+	reg &amp;= ~RBUF_ACPI_EN;</div><div class='add'>+	bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable CRC Forward */</div><div class='ctx'> 	spin_lock_bh(&amp;priv-&gt;reg_lock);</div><div class='hunk'>@@ -261,4 +254,14 @@ void bcmgenet_wol_power_up_cfg(struct bcmgenet_priv *priv,</div><div class='ctx'> 	reg &amp;= ~CMD_CRC_FWD;</div><div class='ctx'> 	bcmgenet_umac_writel(priv, reg, UMAC_CMD);</div><div class='ctx'> 	spin_unlock_bh(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	/* Resume link status tracking */</div><div class='add'>+	mutex_lock(&amp;dev-&gt;phydev-&gt;lock);</div><div class='add'>+	if (dev-&gt;phydev-&gt;link)</div><div class='add'>+		dev-&gt;phydev-&gt;state = PHY_RUNNING;</div><div class='add'>+	else</div><div class='add'>+		dev-&gt;phydev-&gt;state = PHY_NOLINK;</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;phydev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/genet/bcmmii.c b/drivers/net/ethernet/broadcom/genet/bcmmii.c<br/>index c4a3698cef66..38f854b94a79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/genet/bcmmii.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/genet/bcmmii.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/genet/bcmmii.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/genet/bcmmii.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Broadcom GENET MDIO routines</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2014-2024 Broadcom</div><div class='add'>+ * Copyright (c) 2014-2025 Broadcom</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='hunk'>@@ -20,7 +20,6 @@</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='del'>-#include &lt;linux/platform_data/bcmgenet.h&gt;</div><div class='ctx'> #include &lt;linux/platform_data/mdio-bcm-unimac.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "bcmgenet.h"</div><div class='hunk'>@@ -154,7 +153,7 @@ void bcmgenet_phy_power_set(struct net_device *dev, bool enable)</div><div class='ctx'> 	u32 reg = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* EXT_GPHY_CTRL is only valid for GENETv4 and onward */</div><div class='del'>-	if (GENET_IS_V4(priv) || priv-&gt;ephy_16nm) {</div><div class='add'>+	if (GENET_IS_V4(priv) || bcmgenet_has_ephy_16nm(priv)) {</div><div class='ctx'> 		reg = bcmgenet_ext_readl(priv, EXT_GPHY_CTRL);</div><div class='ctx'> 		if (enable) {</div><div class='ctx'> 			reg &amp;= ~EXT_CK25_DIS;</div><div class='hunk'>@@ -169,10 +168,15 @@ void bcmgenet_phy_power_set(struct net_device *dev, bool enable)</div><div class='ctx'> </div><div class='ctx'> 			reg &amp;= ~EXT_GPHY_RESET;</div><div class='ctx'> 		} else {</div><div class='add'>+			reg |= EXT_GPHY_RESET;</div><div class='add'>+			bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL);</div><div class='add'>+			mdelay(1);</div><div class='add'>+</div><div class='ctx'> 			reg |= EXT_CFG_IDDQ_BIAS | EXT_CFG_PWR_DOWN |</div><div class='del'>-			       EXT_GPHY_RESET | EXT_CFG_IDDQ_GLOBAL_PWR;</div><div class='add'>+			       EXT_CFG_IDDQ_GLOBAL_PWR;</div><div class='ctx'> 			bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL);</div><div class='ctx'> 			mdelay(1);</div><div class='add'>+</div><div class='ctx'> 			reg |= EXT_CK25_DIS;</div><div class='ctx'> 		}</div><div class='ctx'> 		bcmgenet_ext_writel(priv, reg, EXT_GPHY_CTRL);</div><div class='hunk'>@@ -184,7 +188,7 @@ void bcmgenet_phy_power_set(struct net_device *dev, bool enable)</div><div class='ctx'> </div><div class='ctx'> static void bcmgenet_moca_phy_setup(struct bcmgenet_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	if (priv-&gt;hw_params-&gt;flags &amp; GENET_HAS_MOCA_LINK_DET)</div><div class='add'>+	if (bcmgenet_has_moca_link_det(priv))</div><div class='ctx'> 		fixed_phy_set_link_update(priv-&gt;dev-&gt;phydev,</div><div class='ctx'> 					  bcmgenet_fixed_phy_link_update);</div><div class='ctx'> }</div><div class='hunk'>@@ -431,23 +435,6 @@ static struct device_node *bcmgenet_mii_of_find_mdio(struct bcmgenet_priv *priv)</div><div class='ctx'> 	return priv-&gt;mdio_dn;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcmgenet_mii_pdata_init(struct bcmgenet_priv *priv,</div><div class='del'>-				    struct unimac_mdio_pdata *ppd)</div><div class='del'>-{</div><div class='del'>-	struct device *kdev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='del'>-	struct bcmgenet_platform_data *pd = kdev-&gt;platform_data;</div><div class='del'>-</div><div class='del'>-	if (pd-&gt;phy_interface != PHY_INTERFACE_MODE_MOCA &amp;&amp; pd-&gt;mdio_enabled) {</div><div class='del'>-		/*</div><div class='del'>-		 * Internal or external PHY with MDIO access</div><div class='del'>-		 */</div><div class='del'>-		if (pd-&gt;phy_address &gt;= 0 &amp;&amp; pd-&gt;phy_address &lt; PHY_MAX_ADDR)</div><div class='del'>-			ppd-&gt;phy_mask = 1 &lt;&lt; pd-&gt;phy_address;</div><div class='del'>-		else</div><div class='del'>-			ppd-&gt;phy_mask = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int bcmgenet_mii_wait(void *wait_func_data)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcmgenet_priv *priv = wait_func_data;</div><div class='hunk'>@@ -462,7 +449,6 @@ static int bcmgenet_mii_wait(void *wait_func_data)</div><div class='ctx'> static int bcmgenet_mii_register(struct bcmgenet_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev = priv-&gt;pdev;</div><div class='del'>-	struct bcmgenet_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='ctx'> 	struct device_node *dn = pdev-&gt;dev.of_node;</div><div class='ctx'> 	struct unimac_mdio_pdata ppd;</div><div class='ctx'> 	struct platform_device *ppdev;</div><div class='hunk'>@@ -506,8 +492,6 @@ static int bcmgenet_mii_register(struct bcmgenet_priv *priv)</div><div class='ctx'> 	ppdev-&gt;dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> 	if (dn)</div><div class='ctx'> 		ppdev-&gt;dev.of_node = bcmgenet_mii_of_find_mdio(priv);</div><div class='del'>-	else if (pdata)</div><div class='del'>-		bcmgenet_mii_pdata_init(priv, &amp;ppd);</div><div class='ctx'> 	else</div><div class='ctx'> 		ppd.phy_mask = ~0;</div><div class='ctx'> </div><div class='hunk'>@@ -589,58 +573,6 @@ static int bcmgenet_mii_of_init(struct bcmgenet_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcmgenet_mii_pd_init(struct bcmgenet_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct device *kdev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='del'>-	struct bcmgenet_platform_data *pd = kdev-&gt;platform_data;</div><div class='del'>-	char phy_name[MII_BUS_ID_SIZE + 3];</div><div class='del'>-	char mdio_bus_id[MII_BUS_ID_SIZE];</div><div class='del'>-	struct phy_device *phydev;</div><div class='del'>-</div><div class='del'>-	snprintf(mdio_bus_id, MII_BUS_ID_SIZE, "%s-%d",</div><div class='del'>-		 UNIMAC_MDIO_DRV_NAME, priv-&gt;pdev-&gt;id);</div><div class='del'>-</div><div class='del'>-	if (pd-&gt;phy_interface != PHY_INTERFACE_MODE_MOCA &amp;&amp; pd-&gt;mdio_enabled) {</div><div class='del'>-		snprintf(phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT,</div><div class='del'>-			 mdio_bus_id, pd-&gt;phy_address);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Internal or external PHY with MDIO access</div><div class='del'>-		 */</div><div class='del'>-		phydev = phy_attach(priv-&gt;dev, phy_name, pd-&gt;phy_interface);</div><div class='del'>-		if (IS_ERR(phydev)) {</div><div class='del'>-			dev_err(kdev, "failed to register PHY device\n");</div><div class='del'>-			return PTR_ERR(phydev);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		/*</div><div class='del'>-		 * MoCA port or no MDIO access.</div><div class='del'>-		 * Use fixed PHY to represent the link layer.</div><div class='del'>-		 */</div><div class='del'>-		struct fixed_phy_status fphy_status = {</div><div class='del'>-			.link = 1,</div><div class='del'>-			.speed = pd-&gt;phy_speed,</div><div class='del'>-			.duplex = pd-&gt;phy_duplex,</div><div class='del'>-			.pause = 0,</div><div class='del'>-			.asym_pause = 0,</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		phydev = fixed_phy_register(PHY_POLL, &amp;fphy_status, NULL);</div><div class='del'>-		if (IS_ERR(phydev)) {</div><div class='del'>-			dev_err(kdev, "failed to register fixed PHY device\n");</div><div class='del'>-			return PTR_ERR(phydev);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Make sure we initialize MoCA PHYs with a link down */</div><div class='del'>-		phydev-&gt;link = 0;</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;phy_interface = pd-&gt;phy_interface;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int bcmgenet_mii_bus_init(struct bcmgenet_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *kdev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='hunk'>@@ -651,7 +583,7 @@ static int bcmgenet_mii_bus_init(struct bcmgenet_priv *priv)</div><div class='ctx'> 	else if (has_acpi_companion(kdev))</div><div class='ctx'> 		return bcmgenet_phy_interface_init(priv);</div><div class='ctx'> 	else</div><div class='del'>-		return bcmgenet_mii_pd_init(priv);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int bcmgenet_mii_init(struct net_device *dev)</div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c<br/>index 01dfec115942..75f66587983d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/tg3.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/tg3.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/tg3.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/tg3.c</a></div><div class='hunk'>@@ -54,7 +54,8 @@</div><div class='ctx'> #include &lt;linux/ssb/ssb_driver_gige.h&gt;</div><div class='ctx'> #include &lt;linux/hwmon.h&gt;</div><div class='ctx'> #include &lt;linux/hwmon-sysfs.h&gt;</div><div class='del'>-#include &lt;linux/crc32poly.h&gt;</div><div class='add'>+#include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;linux/dmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/checksum.h&gt;</div><div class='ctx'> #include &lt;net/gso.h&gt;</div><div class='hunk'>@@ -5802,7 +5803,7 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, bool force_reset)</div><div class='ctx'> 	u32 current_speed = SPEED_UNKNOWN;</div><div class='ctx'> 	u8 current_duplex = DUPLEX_UNKNOWN;</div><div class='ctx'> 	bool current_link_up = false;</div><div class='del'>-	u32 local_adv, remote_adv, sgsr;</div><div class='add'>+	u32 local_adv = 0, remote_adv = 0, sgsr;</div><div class='ctx'> </div><div class='ctx'> 	if ((tg3_asic_rev(tp) == ASIC_REV_5719 ||</div><div class='ctx'> 	     tg3_asic_rev(tp) == ASIC_REV_5720) &amp;&amp;</div><div class='hunk'>@@ -5943,9 +5944,6 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, bool force_reset)</div><div class='ctx'> 		else</div><div class='ctx'> 			current_duplex = DUPLEX_HALF;</div><div class='ctx'> </div><div class='del'>-		local_adv = 0;</div><div class='del'>-		remote_adv = 0;</div><div class='del'>-</div><div class='ctx'> 		if (bmcr &amp; BMCR_ANENABLE) {</div><div class='ctx'> 			u32 common;</div><div class='ctx'> </div><div class='hunk'>@@ -6685,7 +6683,7 @@ static void tg3_rx_data_free(struct tg3 *tp, struct ring_info *ri, u32 map_sz)</div><div class='ctx'>  * We only need to fill in the address because the other members</div><div class='ctx'>  * of the RX descriptor are invariant, see tg3_init_rings.</div><div class='ctx'>  *</div><div class='del'>- * Note the purposeful assymetry of cpu vs. chip accesses.  For</div><div class='add'>+ * Note the purposeful asymmetry of cpu vs. chip accesses.  For</div><div class='ctx'>  * posting buffers we only dirty the first cache line of the RX</div><div class='ctx'>  * descriptor (containing the address).  Whereas for the RX status</div><div class='ctx'>  * buffers the cpu only reads the last cacheline of the RX descriptor</div><div class='hunk'>@@ -7424,7 +7422,7 @@ static void tg3_napi_enable(struct tg3 *tp)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; tp-&gt;irq_cnt; i++) {</div><div class='ctx'> 		tnapi = &amp;tp-&gt;napi[i];</div><div class='del'>-		napi_enable(&amp;tnapi-&gt;napi);</div><div class='add'>+		napi_enable_locked(&amp;tnapi-&gt;napi);</div><div class='ctx'> 		if (tnapi-&gt;tx_buffers) {</div><div class='ctx'> 			netif_queue_set_napi(tp-&gt;dev, txq_idx,</div><div class='ctx'> 					     NETDEV_QUEUE_TYPE_TX,</div><div class='hunk'>@@ -7445,9 +7443,10 @@ static void tg3_napi_init(struct tg3 *tp)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; tp-&gt;irq_cnt; i++) {</div><div class='del'>-		netif_napi_add(tp-&gt;dev, &amp;tp-&gt;napi[i].napi,</div><div class='del'>-			       i ? tg3_poll_msix : tg3_poll);</div><div class='del'>-		netif_napi_set_irq(&amp;tp-&gt;napi[i].napi, tp-&gt;napi[i].irq_vec);</div><div class='add'>+		netif_napi_add_locked(tp-&gt;dev, &amp;tp-&gt;napi[i].napi,</div><div class='add'>+				      i ? tg3_poll_msix : tg3_poll);</div><div class='add'>+		netif_napi_set_irq_locked(&amp;tp-&gt;napi[i].napi,</div><div class='add'>+					  tp-&gt;napi[i].irq_vec);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -9807,26 +9806,7 @@ static void tg3_setup_rxbd_thresholds(struct tg3 *tp)</div><div class='ctx'> </div><div class='ctx'> static inline u32 calc_crc(unsigned char *buf, int len)</div><div class='ctx'> {</div><div class='del'>-	u32 reg;</div><div class='del'>-	u32 tmp;</div><div class='del'>-	int j, k;</div><div class='del'>-</div><div class='del'>-	reg = 0xffffffff;</div><div class='del'>-</div><div class='del'>-	for (j = 0; j &lt; len; j++) {</div><div class='del'>-		reg ^= buf[j];</div><div class='del'>-</div><div class='del'>-		for (k = 0; k &lt; 8; k++) {</div><div class='del'>-			tmp = reg &amp; 0x01;</div><div class='del'>-</div><div class='del'>-			reg &gt;&gt;= 1;</div><div class='del'>-</div><div class='del'>-			if (tmp)</div><div class='del'>-				reg ^= CRC32_POLY_LE;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ~reg;</div><div class='add'>+	return ~crc32(~0, buf, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void tg3_set_multi(struct tg3 *tp, unsigned int accept_all)</div><div class='hunk'>@@ -10162,7 +10142,7 @@ static int tg3_reset_hw(struct tg3 *tp, bool reset_phy)</div><div class='ctx'> 	tp-&gt;grc_mode |= GRC_MODE_HOST_SENDBDS;</div><div class='ctx'> </div><div class='ctx'> 	/* Pseudo-header checksum is done by hardware logic and not</div><div class='del'>-	 * the offload processers, so make the chip do the pseudo-</div><div class='add'>+	 * the offload processors, so make the chip do the pseudo-</div><div class='ctx'> 	 * header checksums on receive.  For transmit it is more</div><div class='ctx'> 	 * convenient to do the pseudo-header checksum in software</div><div class='ctx'> 	 * as Linux does that on transmit for us in all cases.</div><div class='hunk'>@@ -11079,7 +11059,7 @@ static void tg3_chk_missed_msi(struct tg3 *tp)</div><div class='ctx'> </div><div class='ctx'> static void tg3_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tg3 *tp = from_timer(tp, t, timer);</div><div class='add'>+	struct tg3 *tp = timer_container_of(tp, t, timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;tp-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -11250,7 +11230,7 @@ static void tg3_timer_start(struct tg3 *tp)</div><div class='ctx'> </div><div class='ctx'> static void tg3_timer_stop(struct tg3 *tp)</div><div class='ctx'> {</div><div class='del'>-	del_timer_sync(&amp;tp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;tp-&gt;timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Restart hardware after configuration changes, self-test, etc.</div><div class='hunk'>@@ -11259,6 +11239,8 @@ static void tg3_timer_stop(struct tg3 *tp)</div><div class='ctx'> static int tg3_restart_hw(struct tg3 *tp, bool reset_phy)</div><div class='ctx'> 	__releases(tp-&gt;lock)</div><div class='ctx'> 	__acquires(tp-&gt;lock)</div><div class='add'>+	__releases(tp-&gt;dev-&gt;lock)</div><div class='add'>+	__acquires(tp-&gt;dev-&gt;lock)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -11271,7 +11253,9 @@ static int tg3_restart_hw(struct tg3 *tp, bool reset_phy)</div><div class='ctx'> 		tg3_timer_stop(tp);</div><div class='ctx'> 		tp-&gt;irq_sync = 0;</div><div class='ctx'> 		tg3_napi_enable(tp);</div><div class='add'>+		netdev_unlock(tp-&gt;dev);</div><div class='ctx'> 		dev_close(tp-&gt;dev);</div><div class='add'>+		netdev_lock(tp-&gt;dev);</div><div class='ctx'> 		tg3_full_lock(tp, 0);</div><div class='ctx'> 	}</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -11299,6 +11283,7 @@ static void tg3_reset_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	tg3_netif_stop(tp);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(tp-&gt;dev);</div><div class='ctx'> 	tg3_full_lock(tp, 1);</div><div class='ctx'> </div><div class='ctx'> 	if (tg3_flag(tp, TX_RECOVERY_PENDING)) {</div><div class='hunk'>@@ -11318,12 +11303,14 @@ static void tg3_reset_task(struct work_struct *work)</div><div class='ctx'> 		 * call cancel_work_sync() and wait forever.</div><div class='ctx'> 		 */</div><div class='ctx'> 		tg3_flag_clear(tp, RESET_TASK_PENDING);</div><div class='add'>+		netdev_unlock(tp-&gt;dev);</div><div class='ctx'> 		dev_close(tp-&gt;dev);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tg3_netif_start(tp);</div><div class='ctx'> 	tg3_full_unlock(tp);</div><div class='add'>+	netdev_unlock(tp-&gt;dev);</div><div class='ctx'> 	tg3_phy_start(tp);</div><div class='ctx'> 	tg3_flag_clear(tp, RESET_TASK_PENDING);</div><div class='ctx'> out:</div><div class='hunk'>@@ -11683,9 +11670,11 @@ static int tg3_start(struct tg3 *tp, bool reset_phy, bool test_irq,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_ints_fini;</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	tg3_napi_init(tp);</div><div class='ctx'> </div><div class='ctx'> 	tg3_napi_enable(tp);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; tp-&gt;irq_cnt; i++) {</div><div class='ctx'> 		err = tg3_request_irq(tp, i);</div><div class='hunk'>@@ -12569,6 +12558,7 @@ static int tg3_set_ringparam(struct net_device *dev,</div><div class='ctx'> 		irq_sync = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	tg3_full_lock(tp, irq_sync);</div><div class='ctx'> </div><div class='ctx'> 	tp-&gt;rx_pending = ering-&gt;rx_pending;</div><div class='hunk'>@@ -12597,6 +12587,7 @@ static int tg3_set_ringparam(struct net_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tg3_full_unlock(tp);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (irq_sync &amp;&amp; !err)</div><div class='ctx'> 		tg3_phy_start(tp);</div><div class='hunk'>@@ -12678,6 +12669,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam</div><div class='ctx'> 			irq_sync = 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		netdev_lock(dev);</div><div class='ctx'> 		tg3_full_lock(tp, irq_sync);</div><div class='ctx'> </div><div class='ctx'> 		if (epause-&gt;autoneg)</div><div class='hunk'>@@ -12707,6 +12699,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		tg3_full_unlock(tp);</div><div class='add'>+		netdev_unlock(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tp-&gt;phy_flags |= TG3_PHYFLG_USER_CONFIGURED;</div><div class='hunk'>@@ -12726,29 +12719,17 @@ static int tg3_get_sset_count(struct net_device *dev, int sset)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tg3_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='del'>-			 u32 *rules __always_unused)</div><div class='add'>+static u32 tg3_get_rx_ring_count(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tg3 *tp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!tg3_flag(tp, SUPPORT_MSIX))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		if (netif_running(tp-&gt;dev))</div><div class='del'>-			info-&gt;data = tp-&gt;rxq_cnt;</div><div class='del'>-		else {</div><div class='del'>-			info-&gt;data = num_online_cpus();</div><div class='del'>-			if (info-&gt;data &gt; TG3_RSS_MAX_NUM_QS)</div><div class='del'>-				info-&gt;data = TG3_RSS_MAX_NUM_QS;</div><div class='del'>-		}</div><div class='add'>+		return 1;</div><div class='ctx'> </div><div class='del'>-		return 0;</div><div class='add'>+	if (netif_running(tp-&gt;dev))</div><div class='add'>+		return tp-&gt;rxq_cnt;</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	return min_t(u32, netif_get_num_default_rss_queues(), tp-&gt;rxq_max);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 tg3_get_rxfh_indir_size(struct net_device *dev)</div><div class='hunk'>@@ -13911,6 +13892,7 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,</div><div class='ctx'> 			data[TG3_INTERRUPT_TEST] = 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		netdev_lock(dev);</div><div class='ctx'> 		tg3_full_lock(tp, 0);</div><div class='ctx'> </div><div class='ctx'> 		tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);</div><div class='hunk'>@@ -13922,6 +13904,7 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		tg3_full_unlock(tp);</div><div class='add'>+		netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 		if (irq_sync &amp;&amp; !err2)</div><div class='ctx'> 			tg3_phy_start(tp);</div><div class='hunk'>@@ -13931,22 +13914,20 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tg3_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+static int tg3_hwtstamp_set(struct net_device *dev,</div><div class='add'>+			    struct kernel_hwtstamp_config *stmpconf,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct tg3 *tp = netdev_priv(dev);</div><div class='del'>-	struct hwtstamp_config stmpconf;</div><div class='ctx'> </div><div class='ctx'> 	if (!tg3_flag(tp, PTP_CAPABLE))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;stmpconf, ifr-&gt;ifr_data, sizeof(stmpconf)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (stmpconf.tx_type != HWTSTAMP_TX_ON &amp;&amp;</div><div class='del'>-	    stmpconf.tx_type != HWTSTAMP_TX_OFF)</div><div class='add'>+	if (stmpconf-&gt;tx_type != HWTSTAMP_TX_ON &amp;&amp;</div><div class='add'>+	    stmpconf-&gt;tx_type != HWTSTAMP_TX_OFF)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='del'>-	switch (stmpconf.rx_filter) {</div><div class='add'>+	switch (stmpconf-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		tp-&gt;rxptpctl = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -14006,74 +13987,72 @@ static int tg3_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 		tw32(TG3_RX_PTP_CTL,</div><div class='ctx'> 		     tp-&gt;rxptpctl | TG3_RX_PTP_CTL_HWTS_INTERLOCK);</div><div class='ctx'> </div><div class='del'>-	if (stmpconf.tx_type == HWTSTAMP_TX_ON)</div><div class='add'>+	if (stmpconf-&gt;tx_type == HWTSTAMP_TX_ON)</div><div class='ctx'> 		tg3_flag_set(tp, TX_TSTAMP_EN);</div><div class='ctx'> 	else</div><div class='ctx'> 		tg3_flag_clear(tp, TX_TSTAMP_EN);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;stmpconf, sizeof(stmpconf)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tg3_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+static int tg3_hwtstamp_get(struct net_device *dev,</div><div class='add'>+			    struct kernel_hwtstamp_config *stmpconf)</div><div class='ctx'> {</div><div class='ctx'> 	struct tg3 *tp = netdev_priv(dev);</div><div class='del'>-	struct hwtstamp_config stmpconf;</div><div class='ctx'> </div><div class='ctx'> 	if (!tg3_flag(tp, PTP_CAPABLE))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	stmpconf.flags = 0;</div><div class='del'>-	stmpconf.tx_type = (tg3_flag(tp, TX_TSTAMP_EN) ?</div><div class='del'>-			    HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF);</div><div class='add'>+	stmpconf-&gt;flags = 0;</div><div class='add'>+	stmpconf-&gt;tx_type = tg3_flag(tp, TX_TSTAMP_EN) ?</div><div class='add'>+			    HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='ctx'> </div><div class='ctx'> 	switch (tp-&gt;rxptpctl) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V1_EN | TG3_RX_PTP_CTL_ALL_V1_EVENTS:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V1_EN | TG3_RX_PTP_CTL_SYNC_EVNT:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_SYNC;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_SYNC;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V1_EN | TG3_RX_PTP_CTL_DELAY_REQ:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V2_EN | TG3_RX_PTP_CTL_ALL_V2_EVENTS:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN | TG3_RX_PTP_CTL_ALL_V2_EVENTS:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN | TG3_RX_PTP_CTL_ALL_V2_EVENTS:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V2_EN | TG3_RX_PTP_CTL_SYNC_EVNT:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_SYNC;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_SYNC;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN | TG3_RX_PTP_CTL_SYNC_EVNT:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_SYNC;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_SYNC;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN | TG3_RX_PTP_CTL_SYNC_EVNT:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_SYNC;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_SYNC;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V2_EN | TG3_RX_PTP_CTL_DELAY_REQ:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_DELAY_REQ;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_DELAY_REQ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V2_L2_EN | TG3_RX_PTP_CTL_DELAY_REQ:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TG3_RX_PTP_CTL_RX_PTP_V2_L4_EN | TG3_RX_PTP_CTL_DELAY_REQ:</div><div class='del'>-		stmpconf.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ;</div><div class='add'>+		stmpconf-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ON_ONCE(1);</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;stmpconf, sizeof(stmpconf)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='hunk'>@@ -14128,12 +14107,6 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='ctx'> </div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return tg3_hwtstamp_set(dev, ifr);</div><div class='del'>-</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return tg3_hwtstamp_get(dev, ifr);</div><div class='del'>-</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* do nothing */</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -14283,7 +14256,7 @@ static const struct ethtool_ops tg3_ethtool_ops = {</div><div class='ctx'> 	.get_coalesce		= tg3_get_coalesce,</div><div class='ctx'> 	.set_coalesce		= tg3_set_coalesce,</div><div class='ctx'> 	.get_sset_count		= tg3_get_sset_count,</div><div class='del'>-	.get_rxnfc		= tg3_get_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= tg3_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_indir_size    = tg3_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= tg3_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= tg3_set_rxfh,</div><div class='hunk'>@@ -14365,6 +14338,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> </div><div class='ctx'> 	tg3_set_mtu(dev, tp, new_mtu);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	tg3_full_lock(tp, 1);</div><div class='ctx'> </div><div class='ctx'> 	tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);</div><div class='hunk'>@@ -14384,6 +14358,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 		tg3_netif_start(tp);</div><div class='ctx'> </div><div class='ctx'> 	tg3_full_unlock(tp);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		tg3_phy_start(tp);</div><div class='hunk'>@@ -14407,6 +14382,8 @@ static const struct net_device_ops tg3_netdev_ops = {</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	= tg3_poll_controller,</div><div class='ctx'> #endif</div><div class='add'>+	.ndo_hwtstamp_get	= tg3_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= tg3_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void tg3_get_eeprom_size(struct tg3 *tp)</div><div class='hunk'>@@ -16610,7 +16587,7 @@ static int tg3_get_invariants(struct tg3 *tp, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 			tg3_flag_set(tp, PCIX_TARGET_HWBUG);</div><div class='ctx'> </div><div class='del'>-			/* The chip can have it's power management PCI config</div><div class='add'>+			/* The chip can have its power management PCI config</div><div class='ctx'> 			 * space registers clobbered due to this bug.</div><div class='ctx'> 			 * So explicitly force the chip into D0 here.</div><div class='ctx'> 			 */</div><div class='hunk'>@@ -17839,6 +17816,9 @@ static int tg3_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	} else</div><div class='ctx'> 		persist_dma_mask = dma_mask = DMA_BIT_MASK(64);</div><div class='ctx'> </div><div class='add'>+	if (tg3_asic_rev(tp) == ASIC_REV_57766)</div><div class='add'>+		persist_dma_mask = DMA_BIT_MASK(31);</div><div class='add'>+</div><div class='ctx'> 	/* Configure DMA attributes. */</div><div class='ctx'> 	if (dma_mask &gt; DMA_BIT_MASK(32)) {</div><div class='ctx'> 		err = dma_set_mask(&amp;pdev-&gt;dev, dma_mask);</div><div class='hunk'>@@ -18161,6 +18141,7 @@ static int tg3_resume(struct device *device)</div><div class='ctx'> </div><div class='ctx'> 	netif_device_attach(dev);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	tg3_full_lock(tp, 0);</div><div class='ctx'> </div><div class='ctx'> 	tg3_ape_driver_state_change(tp, RESET_KIND_INIT);</div><div class='hunk'>@@ -18177,6 +18158,7 @@ static int tg3_resume(struct device *device)</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	tg3_full_unlock(tp);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		tg3_phy_start(tp);</div><div class='hunk'>@@ -18189,6 +18171,50 @@ unlock:</div><div class='ctx'> </div><div class='ctx'> static SIMPLE_DEV_PM_OPS(tg3_pm_ops, tg3_suspend, tg3_resume);</div><div class='ctx'> </div><div class='add'>+/* Systems where ACPI _PTS (Prepare To Sleep) S5 will result in a fatal</div><div class='add'>+ * PCIe AER event on the tg3 device if the tg3 device is not, or cannot</div><div class='add'>+ * be, powered down.</div><div class='add'>+ */</div><div class='add'>+static const struct dmi_system_id tg3_restart_aer_quirk_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R440"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R540"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R640"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R650"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R740"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.matches = {</div><div class='add'>+			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R750"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void tg3_shutdown(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='hunk'>@@ -18205,6 +18231,19 @@ static void tg3_shutdown(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	if (system_state == SYSTEM_POWER_OFF)</div><div class='ctx'> 		tg3_power_down(tp);</div><div class='add'>+	else if (system_state == SYSTEM_RESTART &amp;&amp;</div><div class='add'>+		 dmi_first_match(tg3_restart_aer_quirk_table) &amp;&amp;</div><div class='add'>+		 pdev-&gt;current_state != PCI_D3cold &amp;&amp;</div><div class='add'>+		 pdev-&gt;current_state != PCI_UNKNOWN) {</div><div class='add'>+		/* Disable PCIe AER on the tg3 to avoid a fatal</div><div class='add'>+		 * error during this system restart.</div><div class='add'>+		 */</div><div class='add'>+		pcie_capability_clear_word(pdev, PCI_EXP_DEVCTL,</div><div class='add'>+					   PCI_EXP_DEVCTL_CERE |</div><div class='add'>+					   PCI_EXP_DEVCTL_NFERE |</div><div class='add'>+					   PCI_EXP_DEVCTL_FERE |</div><div class='add'>+					   PCI_EXP_DEVCTL_URRE);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='hunk'>@@ -18257,7 +18296,9 @@ static pci_ers_result_t tg3_io_error_detected(struct pci_dev *pdev,</div><div class='ctx'> done:</div><div class='ctx'> 	if (state == pci_channel_io_perm_failure) {</div><div class='ctx'> 		if (netdev) {</div><div class='add'>+			netdev_lock(netdev);</div><div class='ctx'> 			tg3_napi_enable(tp);</div><div class='add'>+			netdev_unlock(netdev);</div><div class='ctx'> 			dev_close(netdev);</div><div class='ctx'> 		}</div><div class='ctx'> 		err = PCI_ERS_RESULT_DISCONNECT;</div><div class='hunk'>@@ -18296,7 +18337,6 @@ static pci_ers_result_t tg3_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 	if (!netdev || !netif_running(netdev)) {</div><div class='ctx'> 		rc = PCI_ERS_RESULT_RECOVERED;</div><div class='hunk'>@@ -18311,7 +18351,9 @@ static pci_ers_result_t tg3_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='ctx'> 	if (rc != PCI_ERS_RESULT_RECOVERED &amp;&amp; netdev &amp;&amp; netif_running(netdev)) {</div><div class='add'>+		netdev_lock(netdev);</div><div class='ctx'> 		tg3_napi_enable(tp);</div><div class='add'>+		netdev_unlock(netdev);</div><div class='ctx'> 		dev_close(netdev);</div><div class='ctx'> 	}</div><div class='ctx'> 	rtnl_unlock();</div><div class='hunk'>@@ -18337,12 +18379,14 @@ static void tg3_io_resume(struct pci_dev *pdev)</div><div class='ctx'> 	if (!netdev || !netif_running(netdev))</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> 	tg3_full_lock(tp, 0);</div><div class='ctx'> 	tg3_ape_driver_state_change(tp, RESET_KIND_INIT);</div><div class='ctx'> 	tg3_flag_set(tp, INIT_COMPLETE);</div><div class='ctx'> 	err = tg3_restart_hw(tp, true);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		tg3_full_unlock(tp);</div><div class='add'>+		netdev_unlock(netdev);</div><div class='ctx'> 		netdev_err(netdev, "Cannot restart hardware after reset.\n");</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -18354,6 +18398,7 @@ static void tg3_io_resume(struct pci_dev *pdev)</div><div class='ctx'> 	tg3_netif_start(tp);</div><div class='ctx'> </div><div class='ctx'> 	tg3_full_unlock(tp);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	tg3_phy_start(tp);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/broadcom/tg3.h b/drivers/net/ethernet/broadcom/tg3.h<br/>index b473f8014d9c..a9e7f88fa26d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/tg3.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/broadcom/tg3.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/broadcom/tg3.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/broadcom/tg3.h</a></div><div class='hunk'>@@ -2390,7 +2390,7 @@</div><div class='ctx'> #define TG3_CL45_D7_EEERES_STAT_LP_1000T	0x0004</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-/* Fast Ethernet Tranceiver definitions */</div><div class='add'>+/* Fast Ethernet Transceiver definitions */</div><div class='ctx'> #define MII_TG3_FET_PTEST		0x17</div><div class='ctx'> #define  MII_TG3_FET_PTEST_TRIM_SEL	0x0010</div><div class='ctx'> #define  MII_TG3_FET_PTEST_TRIM_2	0x0002</div><div class='head'>diff --git a/drivers/net/ethernet/brocade/bna/bfa_ioc.c b/drivers/net/ethernet/brocade/bna/bfa_ioc.c<br/>index 9c80ab07a735..92c7639d1fc7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/brocade/bna/bfa_ioc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/brocade/bna/bfa_ioc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/brocade/bna/bfa_ioc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/brocade/bna/bfa_ioc.c</a></div><div class='hunk'>@@ -314,13 +314,13 @@ bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event)</div><div class='ctx'> {</div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case IOC_E_FWRSP_GETATTR:</div><div class='del'>-		del_timer(&amp;ioc-&gt;ioc_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;ioc_timer);</div><div class='ctx'> 		bfa_fsm_set_state(ioc, bfa_ioc_sm_op);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IOC_E_PFFAILED:</div><div class='ctx'> 	case IOC_E_HWERROR:</div><div class='del'>-		del_timer(&amp;ioc-&gt;ioc_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;ioc_timer);</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case IOC_E_TIMEOUT:</div><div class='ctx'> 		ioc-&gt;cbfn-&gt;enable_cbfn(ioc-&gt;bfa, BFA_STATUS_IOC_FAILURE);</div><div class='hunk'>@@ -330,7 +330,7 @@ bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IOC_E_DISABLE:</div><div class='del'>-		del_timer(&amp;ioc-&gt;ioc_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;ioc_timer);</div><div class='ctx'> 		bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -659,13 +659,13 @@ bfa_iocpf_sm_mismatch(struct bfa_iocpf *iocpf, enum iocpf_event event)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IOCPF_E_DISABLE:</div><div class='del'>-		del_timer(&amp;ioc-&gt;iocpf_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;iocpf_timer);</div><div class='ctx'> 		bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);</div><div class='ctx'> 		bfa_ioc_pf_disabled(ioc);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IOCPF_E_STOP:</div><div class='del'>-		del_timer(&amp;ioc-&gt;iocpf_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;iocpf_timer);</div><div class='ctx'> 		bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -741,7 +741,7 @@ bfa_iocpf_sm_hwinit(struct bfa_iocpf *iocpf, enum iocpf_event event)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IOCPF_E_DISABLE:</div><div class='del'>-		del_timer(&amp;ioc-&gt;iocpf_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;iocpf_timer);</div><div class='ctx'> 		bfa_ioc_sync_leave(ioc);</div><div class='ctx'> 		bfa_nw_ioc_hw_sem_release(ioc);</div><div class='ctx'> 		bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);</div><div class='hunk'>@@ -774,13 +774,13 @@ bfa_iocpf_sm_enabling(struct bfa_iocpf *iocpf, enum iocpf_event event)</div><div class='ctx'> </div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case IOCPF_E_FWRSP_ENABLE:</div><div class='del'>-		del_timer(&amp;ioc-&gt;iocpf_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;iocpf_timer);</div><div class='ctx'> 		bfa_nw_ioc_hw_sem_release(ioc);</div><div class='ctx'> 		bfa_fsm_set_state(iocpf, bfa_iocpf_sm_ready);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IOCPF_E_INITFAIL:</div><div class='del'>-		del_timer(&amp;ioc-&gt;iocpf_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;iocpf_timer);</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> </div><div class='ctx'> 	case IOCPF_E_TIMEOUT:</div><div class='hunk'>@@ -791,7 +791,7 @@ bfa_iocpf_sm_enabling(struct bfa_iocpf *iocpf, enum iocpf_event event)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IOCPF_E_DISABLE:</div><div class='del'>-		del_timer(&amp;ioc-&gt;iocpf_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;iocpf_timer);</div><div class='ctx'> 		bfa_nw_ioc_hw_sem_release(ioc);</div><div class='ctx'> 		bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -844,12 +844,12 @@ bfa_iocpf_sm_disabling(struct bfa_iocpf *iocpf, enum iocpf_event event)</div><div class='ctx'> </div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case IOCPF_E_FWRSP_DISABLE:</div><div class='del'>-		del_timer(&amp;ioc-&gt;iocpf_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;iocpf_timer);</div><div class='ctx'> 		bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case IOCPF_E_FAIL:</div><div class='del'>-		del_timer(&amp;ioc-&gt;iocpf_timer);</div><div class='add'>+		timer_delete(&amp;ioc-&gt;iocpf_timer);</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> </div><div class='ctx'> 	case IOCPF_E_TIMEOUT:</div><div class='hunk'>@@ -1210,7 +1210,7 @@ bfa_nw_ioc_hw_sem_release(struct bfa_ioc *ioc)</div><div class='ctx'> static void</div><div class='ctx'> bfa_ioc_hw_sem_get_cancel(struct bfa_ioc *ioc)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;ioc-&gt;sem_timer);</div><div class='add'>+	timer_delete(&amp;ioc-&gt;sem_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initialize LPU local memory (aka secondary memory / SRAM) */</div><div class='hunk'>@@ -1982,7 +1982,7 @@ bfa_ioc_hb_monitor(struct bfa_ioc *ioc)</div><div class='ctx'> static void</div><div class='ctx'> bfa_ioc_hb_stop(struct bfa_ioc *ioc)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;ioc-&gt;hb_timer);</div><div class='add'>+	timer_delete(&amp;ioc-&gt;hb_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initiate a full firmware download. */</div><div class='head'>diff --git a/drivers/net/ethernet/brocade/bna/bnad.c b/drivers/net/ethernet/brocade/bna/bnad.c<br/>index ece6f3b48327..9bed33295839 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/brocade/bna/bnad.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/brocade/bna/bnad.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/brocade/bna/bnad.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/brocade/bna/bnad.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/ip.h&gt;</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;net/gro.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "bnad.h"</div><div class='ctx'> #include "bna.h"</div><div class='hunk'>@@ -1687,7 +1688,8 @@ err_return:</div><div class='ctx'> static void</div><div class='ctx'> bnad_ioc_timeout(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bnad *bnad = from_timer(bnad, t, bna.ioceth.ioc.ioc_timer);</div><div class='add'>+	struct bnad *bnad = timer_container_of(bnad, t,</div><div class='add'>+					       bna.ioceth.ioc.ioc_timer);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='hunk'>@@ -1698,7 +1700,8 @@ bnad_ioc_timeout(struct timer_list *t)</div><div class='ctx'> static void</div><div class='ctx'> bnad_ioc_hb_check(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bnad *bnad = from_timer(bnad, t, bna.ioceth.ioc.hb_timer);</div><div class='add'>+	struct bnad *bnad = timer_container_of(bnad, t,</div><div class='add'>+					       bna.ioceth.ioc.hb_timer);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='hunk'>@@ -1709,7 +1712,8 @@ bnad_ioc_hb_check(struct timer_list *t)</div><div class='ctx'> static void</div><div class='ctx'> bnad_iocpf_timeout(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bnad *bnad = from_timer(bnad, t, bna.ioceth.ioc.iocpf_timer);</div><div class='add'>+	struct bnad *bnad = timer_container_of(bnad, t,</div><div class='add'>+					       bna.ioceth.ioc.iocpf_timer);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='hunk'>@@ -1720,7 +1724,8 @@ bnad_iocpf_timeout(struct timer_list *t)</div><div class='ctx'> static void</div><div class='ctx'> bnad_iocpf_sem_timeout(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bnad *bnad = from_timer(bnad, t, bna.ioceth.ioc.sem_timer);</div><div class='add'>+	struct bnad *bnad = timer_container_of(bnad, t,</div><div class='add'>+					       bna.ioceth.ioc.sem_timer);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='hunk'>@@ -1734,7 +1739,7 @@ bnad_iocpf_sem_timeout(struct timer_list *t)</div><div class='ctx'>  *	Time	CPU m	CPU n</div><div class='ctx'>  *	0       1 = test_bit</div><div class='ctx'>  *	1			clear_bit</div><div class='del'>- *	2			del_timer_sync</div><div class='add'>+ *	2			timer_delete_sync</div><div class='ctx'>  *	3	mod_timer</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -1742,7 +1747,7 @@ bnad_iocpf_sem_timeout(struct timer_list *t)</div><div class='ctx'> static void</div><div class='ctx'> bnad_dim_timeout(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bnad *bnad = from_timer(bnad, t, dim_timer);</div><div class='add'>+	struct bnad *bnad = timer_container_of(bnad, t, dim_timer);</div><div class='ctx'> 	struct bnad_rx_info *rx_info;</div><div class='ctx'> 	struct bnad_rx_ctrl *rx_ctrl;</div><div class='ctx'> 	int i, j;</div><div class='hunk'>@@ -1775,7 +1780,7 @@ bnad_dim_timeout(struct timer_list *t)</div><div class='ctx'> static void</div><div class='ctx'> bnad_stats_timeout(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bnad *bnad = from_timer(bnad, t, stats_timer);</div><div class='add'>+	struct bnad *bnad = timer_container_of(bnad, t, stats_timer);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(bnad-&gt;netdev) ||</div><div class='hunk'>@@ -1836,7 +1841,7 @@ bnad_stats_timer_stop(struct bnad *bnad)</div><div class='ctx'> 		to_del = 1;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bnad-&gt;bna_lock, flags);</div><div class='ctx'> 	if (to_del)</div><div class='del'>-		del_timer_sync(&amp;bnad-&gt;stats_timer);</div><div class='add'>+		timer_delete_sync(&amp;bnad-&gt;stats_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Utilities */</div><div class='hunk'>@@ -2159,7 +2164,7 @@ bnad_destroy_rx(struct bnad *bnad, u32 rx_id)</div><div class='ctx'> 		}</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;bnad-&gt;bna_lock, flags);</div><div class='ctx'> 		if (to_del)</div><div class='del'>-			del_timer_sync(&amp;bnad-&gt;dim_timer);</div><div class='add'>+			timer_delete_sync(&amp;bnad-&gt;dim_timer);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	init_completion(&amp;bnad-&gt;bnad_completions.rx_comp);</div><div class='hunk'>@@ -3725,9 +3730,9 @@ probe_uninit:</div><div class='ctx'> 	bnad_res_free(bnad, &amp;bnad-&gt;mod_res_info[0], BNA_MOD_RES_T_MAX);</div><div class='ctx'> disable_ioceth:</div><div class='ctx'> 	bnad_ioceth_disable(bnad);</div><div class='del'>-	del_timer_sync(&amp;bnad-&gt;bna.ioceth.ioc.ioc_timer);</div><div class='del'>-	del_timer_sync(&amp;bnad-&gt;bna.ioceth.ioc.sem_timer);</div><div class='del'>-	del_timer_sync(&amp;bnad-&gt;bna.ioceth.ioc.hb_timer);</div><div class='add'>+	timer_delete_sync(&amp;bnad-&gt;bna.ioceth.ioc.ioc_timer);</div><div class='add'>+	timer_delete_sync(&amp;bnad-&gt;bna.ioceth.ioc.sem_timer);</div><div class='add'>+	timer_delete_sync(&amp;bnad-&gt;bna.ioceth.ioc.hb_timer);</div><div class='ctx'> 	spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='ctx'> 	bna_uninit(bna);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bnad-&gt;bna_lock, flags);</div><div class='hunk'>@@ -3768,9 +3773,9 @@ bnad_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;bnad-&gt;conf_mutex);</div><div class='ctx'> 	bnad_ioceth_disable(bnad);</div><div class='del'>-	del_timer_sync(&amp;bnad-&gt;bna.ioceth.ioc.ioc_timer);</div><div class='del'>-	del_timer_sync(&amp;bnad-&gt;bna.ioceth.ioc.sem_timer);</div><div class='del'>-	del_timer_sync(&amp;bnad-&gt;bna.ioceth.ioc.hb_timer);</div><div class='add'>+	timer_delete_sync(&amp;bnad-&gt;bna.ioceth.ioc.ioc_timer);</div><div class='add'>+	timer_delete_sync(&amp;bnad-&gt;bna.ioceth.ioc.sem_timer);</div><div class='add'>+	timer_delete_sync(&amp;bnad-&gt;bna.ioceth.ioc.hb_timer);</div><div class='ctx'> 	spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='ctx'> 	bna_uninit(bna);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bnad-&gt;bna_lock, flags);</div><div class='head'>diff --git a/drivers/net/ethernet/brocade/bna/bnad_ethtool.c b/drivers/net/ethernet/brocade/bna/bnad_ethtool.c<br/>index d1ad6c9f8140..216e25f26dbb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/brocade/bna/bnad_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/brocade/bna/bnad_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/brocade/bna/bnad_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/brocade/bna/bnad_ethtool.c</a></div><div class='hunk'>@@ -373,7 +373,7 @@ static int bnad_set_coalesce(struct net_device *netdev,</div><div class='ctx'> 			}</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;bnad-&gt;bna_lock, flags);</div><div class='ctx'> 			if (to_del)</div><div class='del'>-				del_timer_sync(&amp;bnad-&gt;dim_timer);</div><div class='add'>+				timer_delete_sync(&amp;bnad-&gt;dim_timer);</div><div class='ctx'> 			spin_lock_irqsave(&amp;bnad-&gt;bna_lock, flags);</div><div class='ctx'> 			bnad_rx_coalescing_timeo_set(bnad);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h<br/>index 5740c98d8c9f..87414a2ddf6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cadence/macb.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cadence/macb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cadence/macb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cadence/macb.h</a></div><div class='hunk'>@@ -15,10 +15,6 @@</div><div class='ctx'> #include &lt;linux/phy/phy.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) || defined(CONFIG_MACB_USE_HWSTAMP)</div><div class='del'>-#define MACB_EXT_DESC</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define MACB_GREGS_NBR 16</div><div class='ctx'> #define MACB_GREGS_VERSION 2</div><div class='ctx'> #define MACB_MAX_QUEUES 8</div><div class='hunk'>@@ -184,6 +180,13 @@</div><div class='ctx'> #define GEM_DCFG8		0x029C /* Design Config 8 */</div><div class='ctx'> #define GEM_DCFG10		0x02A4 /* Design Config 10 */</div><div class='ctx'> #define GEM_DCFG12		0x02AC /* Design Config 12 */</div><div class='add'>+#define GEM_ENST_START_TIME_Q0	0x0800 /* ENST Q0 start time */</div><div class='add'>+#define GEM_ENST_START_TIME_Q1	0x0804 /* ENST Q1 start time */</div><div class='add'>+#define GEM_ENST_ON_TIME_Q0	0x0820 /* ENST Q0 on time */</div><div class='add'>+#define GEM_ENST_ON_TIME_Q1	0x0824 /* ENST Q1 on time */</div><div class='add'>+#define GEM_ENST_OFF_TIME_Q0	0x0840 /* ENST Q0 off time */</div><div class='add'>+#define GEM_ENST_OFF_TIME_Q1	0x0844 /* ENST Q1 off time */</div><div class='add'>+#define GEM_ENST_CONTROL	0x0880 /* ENST control register */</div><div class='ctx'> #define GEM_USX_CONTROL		0x0A80 /* High speed PCS control register */</div><div class='ctx'> #define GEM_USX_STATUS		0x0A88 /* High speed PCS status register */</div><div class='ctx'> </div><div class='hunk'>@@ -213,14 +216,19 @@</div><div class='ctx'> </div><div class='ctx'> #define GEM_ISR(hw_q)		(0x0400 + ((hw_q) &lt;&lt; 2))</div><div class='ctx'> #define GEM_TBQP(hw_q)		(0x0440 + ((hw_q) &lt;&lt; 2))</div><div class='del'>-#define GEM_TBQPH(hw_q)		(0x04C8)</div><div class='ctx'> #define GEM_RBQP(hw_q)		(0x0480 + ((hw_q) &lt;&lt; 2))</div><div class='ctx'> #define GEM_RBQS(hw_q)		(0x04A0 + ((hw_q) &lt;&lt; 2))</div><div class='del'>-#define GEM_RBQPH(hw_q)		(0x04D4)</div><div class='ctx'> #define GEM_IER(hw_q)		(0x0600 + ((hw_q) &lt;&lt; 2))</div><div class='ctx'> #define GEM_IDR(hw_q)		(0x0620 + ((hw_q) &lt;&lt; 2))</div><div class='ctx'> #define GEM_IMR(hw_q)		(0x0640 + ((hw_q) &lt;&lt; 2))</div><div class='ctx'> </div><div class='add'>+#define GEM_ENST_START_TIME(hw_q)	(0x0800 + ((hw_q) &lt;&lt; 2))</div><div class='add'>+#define GEM_ENST_ON_TIME(hw_q)		(0x0820 + ((hw_q) &lt;&lt; 2))</div><div class='add'>+#define GEM_ENST_OFF_TIME(hw_q)		(0x0840 + ((hw_q) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+/* Bitfields in ENST_CONTROL */</div><div class='add'>+#define GEM_ENST_DISABLE_QUEUE_OFFSET	16</div><div class='add'>+</div><div class='ctx'> /* Bitfields in NCR */</div><div class='ctx'> #define MACB_LB_OFFSET		0 /* reserved */</div><div class='ctx'> #define MACB_LB_SIZE		1</div><div class='hunk'>@@ -529,6 +537,8 @@</div><div class='ctx'> /* Bitfields in DCFG6. */</div><div class='ctx'> #define GEM_PBUF_LSO_OFFSET			27</div><div class='ctx'> #define GEM_PBUF_LSO_SIZE			1</div><div class='add'>+#define GEM_PBUF_RSC_OFFSET			26</div><div class='add'>+#define GEM_PBUF_RSC_SIZE			1</div><div class='ctx'> #define GEM_PBUF_CUTTHRU_OFFSET			25</div><div class='ctx'> #define GEM_PBUF_CUTTHRU_SIZE			1</div><div class='ctx'> #define GEM_DAW64_OFFSET			23</div><div class='hunk'>@@ -554,6 +564,23 @@</div><div class='ctx'> #define GEM_HIGH_SPEED_OFFSET			26</div><div class='ctx'> #define GEM_HIGH_SPEED_SIZE			1</div><div class='ctx'> </div><div class='add'>+/* Bitfields in ENST_START_TIME_Qx. */</div><div class='add'>+#define GEM_START_TIME_SEC_OFFSET		30</div><div class='add'>+#define GEM_START_TIME_SEC_SIZE			2</div><div class='add'>+#define GEM_START_TIME_NSEC_OFFSET		0</div><div class='add'>+#define GEM_START_TIME_NSEC_SIZE		30</div><div class='add'>+</div><div class='add'>+/* Bitfields in ENST_ON_TIME_Qx. */</div><div class='add'>+#define GEM_ON_TIME_OFFSET			0</div><div class='add'>+#define GEM_ON_TIME_SIZE			17</div><div class='add'>+</div><div class='add'>+/* Bitfields in ENST_OFF_TIME_Qx. */</div><div class='add'>+#define GEM_OFF_TIME_OFFSET			0</div><div class='add'>+#define GEM_OFF_TIME_SIZE			17</div><div class='add'>+</div><div class='add'>+/* Hardware ENST timing registers granularity */</div><div class='add'>+#define ENST_TIME_GRANULARITY_NS		8</div><div class='add'>+</div><div class='ctx'> /* Bitfields in USX_CONTROL. */</div><div class='ctx'> #define GEM_USX_CTRL_SPEED_OFFSET		14</div><div class='ctx'> #define GEM_USX_CTRL_SPEED_SIZE			3</div><div class='hunk'>@@ -727,26 +754,31 @@</div><div class='ctx'> #define MACB_MAN_C45_CODE			2</div><div class='ctx'> </div><div class='ctx'> /* Capability mask bits */</div><div class='del'>-#define MACB_CAPS_ISR_CLEAR_ON_WRITE		0x00000001</div><div class='del'>-#define MACB_CAPS_USRIO_HAS_CLKEN		0x00000002</div><div class='del'>-#define MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII	0x00000004</div><div class='del'>-#define MACB_CAPS_NO_GIGABIT_HALF		0x00000008</div><div class='del'>-#define MACB_CAPS_USRIO_DISABLED		0x00000010</div><div class='del'>-#define MACB_CAPS_JUMBO				0x00000020</div><div class='del'>-#define MACB_CAPS_GEM_HAS_PTP			0x00000040</div><div class='del'>-#define MACB_CAPS_BD_RD_PREFETCH		0x00000080</div><div class='del'>-#define MACB_CAPS_NEEDS_RSTONUBR		0x00000100</div><div class='del'>-#define MACB_CAPS_MIIONRGMII			0x00000200</div><div class='del'>-#define MACB_CAPS_NEED_TSUCLK			0x00000400</div><div class='del'>-#define MACB_CAPS_QUEUE_DISABLE			0x00000800</div><div class='del'>-#define MACB_CAPS_PCS				0x01000000</div><div class='del'>-#define MACB_CAPS_HIGH_SPEED			0x02000000</div><div class='del'>-#define MACB_CAPS_CLK_HW_CHG			0x04000000</div><div class='del'>-#define MACB_CAPS_MACB_IS_EMAC			0x08000000</div><div class='del'>-#define MACB_CAPS_FIFO_MODE			0x10000000</div><div class='del'>-#define MACB_CAPS_GIGABIT_MODE_AVAILABLE	0x20000000</div><div class='del'>-#define MACB_CAPS_SG_DISABLED			0x40000000</div><div class='del'>-#define MACB_CAPS_MACB_IS_GEM			0x80000000</div><div class='add'>+#define MACB_CAPS_ISR_CLEAR_ON_WRITE		BIT(0)</div><div class='add'>+#define MACB_CAPS_USRIO_HAS_CLKEN		BIT(1)</div><div class='add'>+#define MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII	BIT(2)</div><div class='add'>+#define MACB_CAPS_NO_GIGABIT_HALF		BIT(3)</div><div class='add'>+#define MACB_CAPS_USRIO_DISABLED		BIT(4)</div><div class='add'>+#define MACB_CAPS_JUMBO				BIT(5)</div><div class='add'>+#define MACB_CAPS_GEM_HAS_PTP			BIT(6)</div><div class='add'>+#define MACB_CAPS_BD_RD_PREFETCH		BIT(7)</div><div class='add'>+#define MACB_CAPS_NEEDS_RSTONUBR		BIT(8)</div><div class='add'>+#define MACB_CAPS_MIIONRGMII			BIT(9)</div><div class='add'>+#define MACB_CAPS_NEED_TSUCLK			BIT(10)</div><div class='add'>+#define MACB_CAPS_QUEUE_DISABLE			BIT(11)</div><div class='add'>+#define MACB_CAPS_QBV				BIT(12)</div><div class='add'>+#define MACB_CAPS_PCS				BIT(13)</div><div class='add'>+#define MACB_CAPS_HIGH_SPEED			BIT(14)</div><div class='add'>+#define MACB_CAPS_CLK_HW_CHG			BIT(15)</div><div class='add'>+#define MACB_CAPS_MACB_IS_EMAC			BIT(16)</div><div class='add'>+#define MACB_CAPS_FIFO_MODE			BIT(17)</div><div class='add'>+#define MACB_CAPS_GIGABIT_MODE_AVAILABLE	BIT(18)</div><div class='add'>+#define MACB_CAPS_SG_DISABLED			BIT(19)</div><div class='add'>+#define MACB_CAPS_MACB_IS_GEM			BIT(20)</div><div class='add'>+#define MACB_CAPS_DMA_64B			BIT(21)</div><div class='add'>+#define MACB_CAPS_DMA_PTP			BIT(22)</div><div class='add'>+#define MACB_CAPS_RSC				BIT(23)</div><div class='add'>+#define MACB_CAPS_NO_LSO			BIT(24)</div><div class='ctx'> </div><div class='ctx'> /* LSO settings */</div><div class='ctx'> #define MACB_LSO_UFO_ENABLE			0x01</div><div class='hunk'>@@ -823,12 +855,6 @@ struct macb_dma_desc {</div><div class='ctx'> 	u32	ctrl;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#ifdef MACB_EXT_DESC</div><div class='del'>-#define HW_DMA_CAP_32B		0</div><div class='del'>-#define HW_DMA_CAP_64B		(1 &lt;&lt; 0)</div><div class='del'>-#define HW_DMA_CAP_PTP		(1 &lt;&lt; 1)</div><div class='del'>-#define HW_DMA_CAP_64B_PTP	(HW_DMA_CAP_64B | HW_DMA_CAP_PTP)</div><div class='del'>-</div><div class='ctx'> struct macb_dma_desc_64 {</div><div class='ctx'> 	u32 addrh;</div><div class='ctx'> 	u32 resvd;</div><div class='hunk'>@@ -838,7 +864,6 @@ struct macb_dma_desc_ptp {</div><div class='ctx'> 	u32	ts_1;</div><div class='ctx'> 	u32	ts_2;</div><div class='ctx'> };</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /* DMA descriptor bitfields */</div><div class='ctx'> #define MACB_RX_USED_OFFSET			0</div><div class='hunk'>@@ -951,75 +976,73 @@ struct macb_tx_skb {</div><div class='ctx'>  * device stats by a periodic timer.</div><div class='ctx'>  */</div><div class='ctx'> struct macb_stats {</div><div class='del'>-	u32	rx_pause_frames;</div><div class='del'>-	u32	tx_ok;</div><div class='del'>-	u32	tx_single_cols;</div><div class='del'>-	u32	tx_multiple_cols;</div><div class='del'>-	u32	rx_ok;</div><div class='del'>-	u32	rx_fcs_errors;</div><div class='del'>-	u32	rx_align_errors;</div><div class='del'>-	u32	tx_deferred;</div><div class='del'>-	u32	tx_late_cols;</div><div class='del'>-	u32	tx_excessive_cols;</div><div class='del'>-	u32	tx_underruns;</div><div class='del'>-	u32	tx_carrier_errors;</div><div class='del'>-	u32	rx_resource_errors;</div><div class='del'>-	u32	rx_overruns;</div><div class='del'>-	u32	rx_symbol_errors;</div><div class='del'>-	u32	rx_oversize_pkts;</div><div class='del'>-	u32	rx_jabbers;</div><div class='del'>-	u32	rx_undersize_pkts;</div><div class='del'>-	u32	sqe_test_errors;</div><div class='del'>-	u32	rx_length_mismatch;</div><div class='del'>-	u32	tx_pause_frames;</div><div class='add'>+	u64	rx_pause_frames;</div><div class='add'>+	u64	tx_ok;</div><div class='add'>+	u64	tx_single_cols;</div><div class='add'>+	u64	tx_multiple_cols;</div><div class='add'>+	u64	rx_ok;</div><div class='add'>+	u64	rx_fcs_errors;</div><div class='add'>+	u64	rx_align_errors;</div><div class='add'>+	u64	tx_deferred;</div><div class='add'>+	u64	tx_late_cols;</div><div class='add'>+	u64	tx_excessive_cols;</div><div class='add'>+	u64	tx_underruns;</div><div class='add'>+	u64	tx_carrier_errors;</div><div class='add'>+	u64	rx_resource_errors;</div><div class='add'>+	u64	rx_overruns;</div><div class='add'>+	u64	rx_symbol_errors;</div><div class='add'>+	u64	rx_oversize_pkts;</div><div class='add'>+	u64	rx_jabbers;</div><div class='add'>+	u64	rx_undersize_pkts;</div><div class='add'>+	u64	sqe_test_errors;</div><div class='add'>+	u64	rx_length_mismatch;</div><div class='add'>+	u64	tx_pause_frames;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct gem_stats {</div><div class='del'>-	u32	tx_octets_31_0;</div><div class='del'>-	u32	tx_octets_47_32;</div><div class='del'>-	u32	tx_frames;</div><div class='del'>-	u32	tx_broadcast_frames;</div><div class='del'>-	u32	tx_multicast_frames;</div><div class='del'>-	u32	tx_pause_frames;</div><div class='del'>-	u32	tx_64_byte_frames;</div><div class='del'>-	u32	tx_65_127_byte_frames;</div><div class='del'>-	u32	tx_128_255_byte_frames;</div><div class='del'>-	u32	tx_256_511_byte_frames;</div><div class='del'>-	u32	tx_512_1023_byte_frames;</div><div class='del'>-	u32	tx_1024_1518_byte_frames;</div><div class='del'>-	u32	tx_greater_than_1518_byte_frames;</div><div class='del'>-	u32	tx_underrun;</div><div class='del'>-	u32	tx_single_collision_frames;</div><div class='del'>-	u32	tx_multiple_collision_frames;</div><div class='del'>-	u32	tx_excessive_collisions;</div><div class='del'>-	u32	tx_late_collisions;</div><div class='del'>-	u32	tx_deferred_frames;</div><div class='del'>-	u32	tx_carrier_sense_errors;</div><div class='del'>-	u32	rx_octets_31_0;</div><div class='del'>-	u32	rx_octets_47_32;</div><div class='del'>-	u32	rx_frames;</div><div class='del'>-	u32	rx_broadcast_frames;</div><div class='del'>-	u32	rx_multicast_frames;</div><div class='del'>-	u32	rx_pause_frames;</div><div class='del'>-	u32	rx_64_byte_frames;</div><div class='del'>-	u32	rx_65_127_byte_frames;</div><div class='del'>-	u32	rx_128_255_byte_frames;</div><div class='del'>-	u32	rx_256_511_byte_frames;</div><div class='del'>-	u32	rx_512_1023_byte_frames;</div><div class='del'>-	u32	rx_1024_1518_byte_frames;</div><div class='del'>-	u32	rx_greater_than_1518_byte_frames;</div><div class='del'>-	u32	rx_undersized_frames;</div><div class='del'>-	u32	rx_oversize_frames;</div><div class='del'>-	u32	rx_jabbers;</div><div class='del'>-	u32	rx_frame_check_sequence_errors;</div><div class='del'>-	u32	rx_length_field_frame_errors;</div><div class='del'>-	u32	rx_symbol_errors;</div><div class='del'>-	u32	rx_alignment_errors;</div><div class='del'>-	u32	rx_resource_errors;</div><div class='del'>-	u32	rx_overruns;</div><div class='del'>-	u32	rx_ip_header_checksum_errors;</div><div class='del'>-	u32	rx_tcp_checksum_errors;</div><div class='del'>-	u32	rx_udp_checksum_errors;</div><div class='add'>+	u64	tx_octets;</div><div class='add'>+	u64	tx_frames;</div><div class='add'>+	u64	tx_broadcast_frames;</div><div class='add'>+	u64	tx_multicast_frames;</div><div class='add'>+	u64	tx_pause_frames;</div><div class='add'>+	u64	tx_64_byte_frames;</div><div class='add'>+	u64	tx_65_127_byte_frames;</div><div class='add'>+	u64	tx_128_255_byte_frames;</div><div class='add'>+	u64	tx_256_511_byte_frames;</div><div class='add'>+	u64	tx_512_1023_byte_frames;</div><div class='add'>+	u64	tx_1024_1518_byte_frames;</div><div class='add'>+	u64	tx_greater_than_1518_byte_frames;</div><div class='add'>+	u64	tx_underrun;</div><div class='add'>+	u64	tx_single_collision_frames;</div><div class='add'>+	u64	tx_multiple_collision_frames;</div><div class='add'>+	u64	tx_excessive_collisions;</div><div class='add'>+	u64	tx_late_collisions;</div><div class='add'>+	u64	tx_deferred_frames;</div><div class='add'>+	u64	tx_carrier_sense_errors;</div><div class='add'>+	u64	rx_octets;</div><div class='add'>+	u64	rx_frames;</div><div class='add'>+	u64	rx_broadcast_frames;</div><div class='add'>+	u64	rx_multicast_frames;</div><div class='add'>+	u64	rx_pause_frames;</div><div class='add'>+	u64	rx_64_byte_frames;</div><div class='add'>+	u64	rx_65_127_byte_frames;</div><div class='add'>+	u64	rx_128_255_byte_frames;</div><div class='add'>+	u64	rx_256_511_byte_frames;</div><div class='add'>+	u64	rx_512_1023_byte_frames;</div><div class='add'>+	u64	rx_1024_1518_byte_frames;</div><div class='add'>+	u64	rx_greater_than_1518_byte_frames;</div><div class='add'>+	u64	rx_undersized_frames;</div><div class='add'>+	u64	rx_oversize_frames;</div><div class='add'>+	u64	rx_jabbers;</div><div class='add'>+	u64	rx_frame_check_sequence_errors;</div><div class='add'>+	u64	rx_length_field_frame_errors;</div><div class='add'>+	u64	rx_symbol_errors;</div><div class='add'>+	u64	rx_alignment_errors;</div><div class='add'>+	u64	rx_resource_errors;</div><div class='add'>+	u64	rx_overruns;</div><div class='add'>+	u64	rx_ip_header_checksum_errors;</div><div class='add'>+	u64	rx_tcp_checksum_errors;</div><div class='add'>+	u64	rx_udp_checksum_errors;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Describes the name and offset of an individual statistic register, as</div><div class='hunk'>@@ -1027,7 +1050,7 @@ struct gem_stats {</div><div class='ctx'>  * this register should contribute to.</div><div class='ctx'>  */</div><div class='ctx'> struct gem_statistic {</div><div class='del'>-	char stat_string[ETH_GSTRING_LEN];</div><div class='add'>+	char stat_string[ETH_GSTRING_LEN] __nonstring;</div><div class='ctx'> 	int offset;</div><div class='ctx'> 	u32 stat_bits;</div><div class='ctx'> };</div><div class='hunk'>@@ -1216,10 +1239,13 @@ struct macb_queue {</div><div class='ctx'> 	unsigned int		IDR;</div><div class='ctx'> 	unsigned int		IMR;</div><div class='ctx'> 	unsigned int		TBQP;</div><div class='del'>-	unsigned int		TBQPH;</div><div class='ctx'> 	unsigned int		RBQS;</div><div class='ctx'> 	unsigned int		RBQP;</div><div class='del'>-	unsigned int		RBQPH;</div><div class='add'>+</div><div class='add'>+	/* ENST register offsets for this queue */</div><div class='add'>+	unsigned int		ENST_START_TIME;</div><div class='add'>+	unsigned int		ENST_ON_TIME;</div><div class='add'>+	unsigned int		ENST_OFF_TIME;</div><div class='ctx'> </div><div class='ctx'> 	/* Lock to protect tx_head and tx_tail */</div><div class='ctx'> 	spinlock_t		tx_ptr_lock;</div><div class='hunk'>@@ -1268,7 +1294,6 @@ struct macb {</div><div class='ctx'> 	unsigned int		tx_ring_size;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int		num_queues;</div><div class='del'>-	unsigned int		queue_mask;</div><div class='ctx'> 	struct macb_queue	queues[MACB_MAX_QUEUES];</div><div class='ctx'> </div><div class='ctx'> 	spinlock_t		lock;</div><div class='hunk'>@@ -1279,6 +1304,8 @@ struct macb {</div><div class='ctx'> 	struct clk		*rx_clk;</div><div class='ctx'> 	struct clk		*tsu_clk;</div><div class='ctx'> 	struct net_device	*dev;</div><div class='add'>+	/* Protects hw_stats and ethtool_stats */</div><div class='add'>+	spinlock_t		stats_lock;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct macb_stats	macb;</div><div class='ctx'> 		struct gem_stats	gem;</div><div class='hunk'>@@ -1314,11 +1341,8 @@ struct macb {</div><div class='ctx'> </div><div class='ctx'> 	struct macb_ptp_info	*ptp_info;	/* macb-ptp interface */</div><div class='ctx'> </div><div class='del'>-	struct phy		*sgmii_phy;	/* for ZynqMP SGMII mode */</div><div class='add'>+	struct phy		*phy;</div><div class='ctx'> </div><div class='del'>-#ifdef MACB_EXT_DESC</div><div class='del'>-	uint8_t hw_dma_cap;</div><div class='del'>-#endif</div><div class='ctx'> 	spinlock_t tsu_clk_lock; /* gem tsu clock locking */</div><div class='ctx'> 	unsigned int tsu_rate;</div><div class='ctx'> 	struct ptp_clock *ptp_clock;</div><div class='hunk'>@@ -1397,6 +1421,31 @@ static inline bool gem_has_ptp(struct macb *bp)</div><div class='ctx'> 	return IS_ENABLED(CONFIG_MACB_USE_HWSTAMP) &amp;&amp; (bp-&gt;caps &amp; MACB_CAPS_GEM_HAS_PTP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* ENST Helper functions */</div><div class='add'>+static inline u64 enst_ns_to_hw_units(size_t ns, u32 speed_mbps)</div><div class='add'>+{</div><div class='add'>+	return DIV_ROUND_UP((ns) * (speed_mbps),</div><div class='add'>+			    (ENST_TIME_GRANULARITY_NS * 1000));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 enst_max_hw_interval(u32 speed_mbps)</div><div class='add'>+{</div><div class='add'>+	return DIV_ROUND_UP(GENMASK(GEM_ON_TIME_SIZE - 1, 0) *</div><div class='add'>+			    ENST_TIME_GRANULARITY_NS * 1000, (speed_mbps));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool macb_dma64(struct macb *bp)</div><div class='add'>+{</div><div class='add'>+	return IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) &amp;&amp;</div><div class='add'>+	       bp-&gt;caps &amp; MACB_CAPS_DMA_64B;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool macb_dma_ptp(struct macb *bp)</div><div class='add'>+{</div><div class='add'>+	return IS_ENABLED(CONFIG_MACB_USE_HWSTAMP) &amp;&amp;</div><div class='add'>+	       bp-&gt;caps &amp; MACB_CAPS_DMA_PTP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct macb_platform_data - platform data for MACB Ethernet used for PCI registration</div><div class='ctx'>  * @pclk:		platform clock</div><div class='hunk'>@@ -1407,4 +1456,21 @@ struct macb_platform_data {</div><div class='ctx'> 	struct clk	*hclk;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * struct macb_queue_enst_config - Configuration for Enhanced Scheduled Traffic</div><div class='add'>+ * @start_time_mask:  Bitmask representing the start time for the queue</div><div class='add'>+ * @on_time_bytes:    "on" time nsec expressed in bytes</div><div class='add'>+ * @off_time_bytes:   "off" time nsec expressed in bytes</div><div class='add'>+ * @queue_id:         Identifier for the queue</div><div class='add'>+ *</div><div class='add'>+ * This structure holds the configuration parameters for an ENST queue,</div><div class='add'>+ * used to control time-based transmission scheduling in the MACB driver.</div><div class='add'>+ */</div><div class='add'>+struct macb_queue_enst_config {</div><div class='add'>+	u32 start_time_mask;</div><div class='add'>+	u32 on_time_bytes;</div><div class='add'>+	u32 off_time_bytes;</div><div class='add'>+	u8 queue_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* _MACB_H */</div><div class='head'>diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c<br/>index daa416fb1724..e461f5072884 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cadence/macb_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cadence/macb_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cadence/macb_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cadence/macb_main.c</a></div><div class='hunk'>@@ -6,39 +6,37 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/circ_buf.h&gt;</div><div class='ctx'> #include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/moduleparam.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/circ_buf.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/firmware/xlnx-zynqmp.h&gt;</div><div class='add'>+#include &lt;linux/inetdevice.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/gpio/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='del'>-#include &lt;linux/ip.h&gt;</div><div class='del'>-#include &lt;linux/udp.h&gt;</div><div class='del'>-#include &lt;linux/tcp.h&gt;</div><div class='del'>-#include &lt;linux/iopoll.h&gt;</div><div class='ctx'> #include &lt;linux/phy/phy.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/ptp_classify.h&gt;</div><div class='ctx'> #include &lt;linux/reset.h&gt;</div><div class='del'>-#include &lt;linux/firmware/xlnx-zynqmp.h&gt;</div><div class='del'>-#include &lt;linux/inetdevice.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/tcp.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/udp.h&gt;</div><div class='add'>+#include &lt;net/pkt_sched.h&gt;</div><div class='ctx'> #include "macb.h"</div><div class='ctx'> </div><div class='ctx'> /* This structure is only used for MACB on SiFive FU540 devices */</div><div class='hunk'>@@ -54,14 +52,10 @@ struct sifive_fu540_macb_mgmt {</div><div class='ctx'> #define DEFAULT_RX_RING_SIZE	512 /* must be power of 2 */</div><div class='ctx'> #define MIN_RX_RING_SIZE	64</div><div class='ctx'> #define MAX_RX_RING_SIZE	8192</div><div class='del'>-#define RX_RING_BYTES(bp)	(macb_dma_desc_get_size(bp)	\</div><div class='del'>-				 * (bp)-&gt;rx_ring_size)</div><div class='ctx'> </div><div class='ctx'> #define DEFAULT_TX_RING_SIZE	512 /* must be power of 2 */</div><div class='ctx'> #define MIN_TX_RING_SIZE	64</div><div class='ctx'> #define MAX_TX_RING_SIZE	4096</div><div class='del'>-#define TX_RING_BYTES(bp)	(macb_dma_desc_get_size(bp)	\</div><div class='del'>-				 * (bp)-&gt;tx_ring_size)</div><div class='ctx'> </div><div class='ctx'> /* level of occupied TX descriptors under which we wake up TX process */</div><div class='ctx'> #define MACB_TX_WAKEUP_THRESH(bp)	(3 * (bp)-&gt;tx_ring_size / 4)</div><div class='hunk'>@@ -127,56 +121,26 @@ struct sifive_fu540_macb_mgmt {</div><div class='ctx'>  */</div><div class='ctx'> static unsigned int macb_dma_desc_get_size(struct macb *bp)</div><div class='ctx'> {</div><div class='del'>-#ifdef MACB_EXT_DESC</div><div class='del'>-	unsigned int desc_size;</div><div class='add'>+	unsigned int desc_size = sizeof(struct macb_dma_desc);</div><div class='add'>+</div><div class='add'>+	if (macb_dma64(bp))</div><div class='add'>+		desc_size += sizeof(struct macb_dma_desc_64);</div><div class='add'>+	if (macb_dma_ptp(bp))</div><div class='add'>+		desc_size += sizeof(struct macb_dma_desc_ptp);</div><div class='ctx'> </div><div class='del'>-	switch (bp-&gt;hw_dma_cap) {</div><div class='del'>-	case HW_DMA_CAP_64B:</div><div class='del'>-		desc_size = sizeof(struct macb_dma_desc)</div><div class='del'>-			+ sizeof(struct macb_dma_desc_64);</div><div class='del'>-		break;</div><div class='del'>-	case HW_DMA_CAP_PTP:</div><div class='del'>-		desc_size = sizeof(struct macb_dma_desc)</div><div class='del'>-			+ sizeof(struct macb_dma_desc_ptp);</div><div class='del'>-		break;</div><div class='del'>-	case HW_DMA_CAP_64B_PTP:</div><div class='del'>-		desc_size = sizeof(struct macb_dma_desc)</div><div class='del'>-			+ sizeof(struct macb_dma_desc_64)</div><div class='del'>-			+ sizeof(struct macb_dma_desc_ptp);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		desc_size = sizeof(struct macb_dma_desc);</div><div class='del'>-	}</div><div class='ctx'> 	return desc_size;</div><div class='del'>-#endif</div><div class='del'>-	return sizeof(struct macb_dma_desc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int macb_adj_dma_desc_idx(struct macb *bp, unsigned int desc_idx)</div><div class='ctx'> {</div><div class='del'>-#ifdef MACB_EXT_DESC</div><div class='del'>-	switch (bp-&gt;hw_dma_cap) {</div><div class='del'>-	case HW_DMA_CAP_64B:</div><div class='del'>-	case HW_DMA_CAP_PTP:</div><div class='del'>-		desc_idx &lt;&lt;= 1;</div><div class='del'>-		break;</div><div class='del'>-	case HW_DMA_CAP_64B_PTP:</div><div class='del'>-		desc_idx *= 3;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	return desc_idx;</div><div class='add'>+	return desc_idx * (1 + macb_dma64(bp) + macb_dma_ptp(bp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='ctx'> static struct macb_dma_desc_64 *macb_64b_desc(struct macb *bp, struct macb_dma_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	return (struct macb_dma_desc_64 *)((void *)desc</div><div class='ctx'> 		+ sizeof(struct macb_dma_desc));</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /* Ring buffer accessors */</div><div class='ctx'> static unsigned int macb_tx_ring_wrap(struct macb *bp, unsigned int index)</div><div class='hunk'>@@ -281,9 +245,9 @@ static void macb_set_hwaddr(struct macb *bp)</div><div class='ctx'> 	u32 bottom;</div><div class='ctx'> 	u16 top;</div><div class='ctx'> </div><div class='del'>-	bottom = cpu_to_le32(*((u32 *)bp-&gt;dev-&gt;dev_addr));</div><div class='add'>+	bottom = get_unaligned_le32(bp-&gt;dev-&gt;dev_addr);</div><div class='ctx'> 	macb_or_gem_writel(bp, SA1B, bottom);</div><div class='del'>-	top = cpu_to_le16(*((u16 *)(bp-&gt;dev-&gt;dev_addr + 4)));</div><div class='add'>+	top = get_unaligned_le16(bp-&gt;dev-&gt;dev_addr + 4);</div><div class='ctx'> 	macb_or_gem_writel(bp, SA1T, top);</div><div class='ctx'> </div><div class='ctx'> 	if (gem_has_ptp(bp)) {</div><div class='hunk'>@@ -363,7 +327,6 @@ static int macb_mdio_read_c22(struct mii_bus *bus, int mii_id, int regnum)</div><div class='ctx'> 	status = MACB_BFEXT(DATA, macb_readl(bp, MAN));</div><div class='ctx'> </div><div class='ctx'> mdio_read_exit:</div><div class='del'>-	pm_runtime_mark_last_busy(&amp;bp-&gt;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(&amp;bp-&gt;pdev-&gt;dev);</div><div class='ctx'> mdio_pm_exit:</div><div class='ctx'> 	return status;</div><div class='hunk'>@@ -409,7 +372,6 @@ static int macb_mdio_read_c45(struct mii_bus *bus, int mii_id, int devad,</div><div class='ctx'> 	status = MACB_BFEXT(DATA, macb_readl(bp, MAN));</div><div class='ctx'> </div><div class='ctx'> mdio_read_exit:</div><div class='del'>-	pm_runtime_mark_last_busy(&amp;bp-&gt;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(&amp;bp-&gt;pdev-&gt;dev);</div><div class='ctx'> mdio_pm_exit:</div><div class='ctx'> 	return status;</div><div class='hunk'>@@ -441,7 +403,6 @@ static int macb_mdio_write_c22(struct mii_bus *bus, int mii_id, int regnum,</div><div class='ctx'> 		goto mdio_write_exit;</div><div class='ctx'> </div><div class='ctx'> mdio_write_exit:</div><div class='del'>-	pm_runtime_mark_last_busy(&amp;bp-&gt;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(&amp;bp-&gt;pdev-&gt;dev);</div><div class='ctx'> mdio_pm_exit:</div><div class='ctx'> 	return status;</div><div class='hunk'>@@ -487,7 +448,6 @@ static int macb_mdio_write_c45(struct mii_bus *bus, int mii_id,</div><div class='ctx'> 		goto mdio_write_exit;</div><div class='ctx'> </div><div class='ctx'> mdio_write_exit:</div><div class='del'>-	pm_runtime_mark_last_busy(&amp;bp-&gt;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(&amp;bp-&gt;pdev-&gt;dev);</div><div class='ctx'> mdio_pm_exit:</div><div class='ctx'> 	return status;</div><div class='hunk'>@@ -498,19 +458,17 @@ static void macb_init_buffers(struct macb *bp)</div><div class='ctx'> 	struct macb_queue *queue;</div><div class='ctx'> 	unsigned int q;</div><div class='ctx'> </div><div class='add'>+	/* Single register for all queues' high 32 bits. */</div><div class='add'>+	if (macb_dma64(bp)) {</div><div class='add'>+		macb_writel(bp, RBQPH,</div><div class='add'>+			    upper_32_bits(bp-&gt;queues[0].rx_ring_dma));</div><div class='add'>+		macb_writel(bp, TBQPH,</div><div class='add'>+			    upper_32_bits(bp-&gt;queues[0].tx_ring_dma));</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (q = 0, queue = bp-&gt;queues; q &lt; bp-&gt;num_queues; ++q, ++queue) {</div><div class='ctx'> 		queue_writel(queue, RBQP, lower_32_bits(queue-&gt;rx_ring_dma));</div><div class='del'>-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='del'>-		if (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_64B)</div><div class='del'>-			queue_writel(queue, RBQPH,</div><div class='del'>-				     upper_32_bits(queue-&gt;rx_ring_dma));</div><div class='del'>-#endif</div><div class='ctx'> 		queue_writel(queue, TBQP, lower_32_bits(queue-&gt;tx_ring_dma));</div><div class='del'>-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='del'>-		if (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_64B)</div><div class='del'>-			queue_writel(queue, TBQPH,</div><div class='del'>-				     upper_32_bits(queue-&gt;tx_ring_dma));</div><div class='del'>-#endif</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -530,19 +488,9 @@ static void macb_set_tx_clk(struct macb *bp, int speed)</div><div class='ctx'> 	if (bp-&gt;phy_interface == PHY_INTERFACE_MODE_MII)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	switch (speed) {</div><div class='del'>-	case SPEED_10:</div><div class='del'>-		rate = 2500000;</div><div class='del'>-		break;</div><div class='del'>-	case SPEED_100:</div><div class='del'>-		rate = 25000000;</div><div class='del'>-		break;</div><div class='del'>-	case SPEED_1000:</div><div class='del'>-		rate = 125000000;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='add'>+	rate = rgmii_clock(speed);</div><div class='add'>+	if (rate &lt; 0)</div><div class='ctx'> 		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	rate_rounded = clk_round_rate(bp-&gt;tx_clk, rate);</div><div class='ctx'> 	if (rate_rounded &lt; 0)</div><div class='hunk'>@@ -578,6 +526,7 @@ static void macb_usx_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void macb_usx_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				   unsigned int neg_mode,</div><div class='ctx'> 				   struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct macb *bp = container_of(pcs, struct macb, phylink_usx_pcs);</div><div class='hunk'>@@ -608,7 +557,7 @@ static int macb_usx_pcs_config(struct phylink_pcs *pcs,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void macb_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+static void macb_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 			       struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	state-&gt;link = 0;</div><div class='hunk'>@@ -862,9 +811,7 @@ static int macb_mii_probe(struct net_device *dev)</div><div class='ctx'> 	struct macb *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;phylink_sgmii_pcs.ops = &amp;macb_phylink_pcs_ops;</div><div class='del'>-	bp-&gt;phylink_sgmii_pcs.neg_mode = true;</div><div class='ctx'> 	bp-&gt;phylink_usx_pcs.ops = &amp;macb_phylink_usx_pcs_ops;</div><div class='del'>-	bp-&gt;phylink_usx_pcs.neg_mode = true;</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;phylink_config.dev = &amp;dev-&gt;dev;</div><div class='ctx'> 	bp-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='hunk'>@@ -999,8 +946,8 @@ err_out:</div><div class='ctx'> </div><div class='ctx'> static void macb_update_stats(struct macb *bp)</div><div class='ctx'> {</div><div class='del'>-	u32 *p = &amp;bp-&gt;hw_stats.macb.rx_pause_frames;</div><div class='del'>-	u32 *end = &amp;bp-&gt;hw_stats.macb.tx_pause_frames + 1;</div><div class='add'>+	u64 *p = &amp;bp-&gt;hw_stats.macb.rx_pause_frames;</div><div class='add'>+	u64 *end = &amp;bp-&gt;hw_stats.macb.tx_pause_frames + 1;</div><div class='ctx'> 	int offset = MACB_PFR;</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);</div><div class='hunk'>@@ -1011,22 +958,15 @@ static void macb_update_stats(struct macb *bp)</div><div class='ctx'> </div><div class='ctx'> static int macb_halt_tx(struct macb *bp)</div><div class='ctx'> {</div><div class='del'>-	unsigned long	halt_time, timeout;</div><div class='del'>-	u32		status;</div><div class='add'>+	u32 status;</div><div class='ctx'> </div><div class='ctx'> 	macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(THALT));</div><div class='ctx'> </div><div class='del'>-	timeout = jiffies + usecs_to_jiffies(MACB_HALT_TIMEOUT);</div><div class='del'>-	do {</div><div class='del'>-		halt_time = jiffies;</div><div class='del'>-		status = macb_readl(bp, TSR);</div><div class='del'>-		if (!(status &amp; MACB_BIT(TGO)))</div><div class='del'>-			return 0;</div><div class='del'>-</div><div class='del'>-		udelay(250);</div><div class='del'>-	} while (time_before(halt_time, timeout));</div><div class='del'>-</div><div class='del'>-	return -ETIMEDOUT;</div><div class='add'>+	/* Poll TSR until TGO is cleared or timeout. */</div><div class='add'>+	return read_poll_timeout_atomic(macb_readl, status,</div><div class='add'>+					!(status &amp; MACB_BIT(TGO)),</div><div class='add'>+					250, MACB_HALT_TIMEOUT, false,</div><div class='add'>+					bp, TSR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void macb_tx_unmap(struct macb *bp, struct macb_tx_skb *tx_skb, int budget)</div><div class='hunk'>@@ -1049,10 +989,9 @@ static void macb_tx_unmap(struct macb *bp, struct macb_tx_skb *tx_skb, int budge</div><div class='ctx'> </div><div class='ctx'> static void macb_set_addr(struct macb *bp, struct macb_dma_desc *desc, dma_addr_t addr)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='del'>-	struct macb_dma_desc_64 *desc_64;</div><div class='add'>+	if (macb_dma64(bp)) {</div><div class='add'>+		struct macb_dma_desc_64 *desc_64;</div><div class='ctx'> </div><div class='del'>-	if (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_64B) {</div><div class='ctx'> 		desc_64 = macb_64b_desc(bp, desc);</div><div class='ctx'> 		desc_64-&gt;addrh = upper_32_bits(addr);</div><div class='ctx'> 		/* The low bits of RX address contain the RX_USED bit, clearing</div><div class='hunk'>@@ -1061,26 +1000,23 @@ static void macb_set_addr(struct macb *bp, struct macb_dma_desc *desc, dma_addr_</div><div class='ctx'> 		 */</div><div class='ctx'> 		dma_wmb();</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='add'>+</div><div class='ctx'> 	desc-&gt;addr = lower_32_bits(addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static dma_addr_t macb_get_addr(struct macb *bp, struct macb_dma_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	dma_addr_t addr = 0;</div><div class='del'>-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='del'>-	struct macb_dma_desc_64 *desc_64;</div><div class='ctx'> </div><div class='del'>-	if (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_64B) {</div><div class='add'>+	if (macb_dma64(bp)) {</div><div class='add'>+		struct macb_dma_desc_64 *desc_64;</div><div class='add'>+</div><div class='ctx'> 		desc_64 = macb_64b_desc(bp, desc);</div><div class='ctx'> 		addr = ((u64)(desc_64-&gt;addrh) &lt;&lt; 32);</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> 	addr |= MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc-&gt;addr));</div><div class='del'>-#ifdef CONFIG_MACB_USE_HWSTAMP</div><div class='del'>-	if (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_PTP)</div><div class='add'>+	if (macb_dma_ptp(bp))</div><div class='ctx'> 		addr &amp;= ~GEM_BIT(DMA_RXVALID);</div><div class='del'>-#endif</div><div class='ctx'> 	return addr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1090,15 +1026,18 @@ static void macb_tx_error_task(struct work_struct *work)</div><div class='ctx'> 						      tx_error_task);</div><div class='ctx'> 	bool			halt_timeout = false;</div><div class='ctx'> 	struct macb		*bp = queue-&gt;bp;</div><div class='add'>+	u32			queue_index;</div><div class='add'>+	u32			packets = 0;</div><div class='add'>+	u32			bytes = 0;</div><div class='ctx'> 	struct macb_tx_skb	*tx_skb;</div><div class='ctx'> 	struct macb_dma_desc	*desc;</div><div class='ctx'> 	struct sk_buff		*skb;</div><div class='ctx'> 	unsigned int		tail;</div><div class='ctx'> 	unsigned long		flags;</div><div class='ctx'> </div><div class='add'>+	queue_index = queue - bp-&gt;queues;</div><div class='ctx'> 	netdev_vdbg(bp-&gt;dev, "macb_tx_error_task: q = %u, t = %u, h = %u\n",</div><div class='del'>-		    (unsigned int)(queue - bp-&gt;queues),</div><div class='del'>-		    queue-&gt;tx_tail, queue-&gt;tx_head);</div><div class='add'>+		    queue_index, queue-&gt;tx_tail, queue-&gt;tx_head);</div><div class='ctx'> </div><div class='ctx'> 	/* Prevent the queue NAPI TX poll from running, as it calls</div><div class='ctx'> 	 * macb_tx_complete(), which in turn may call netif_wake_subqueue().</div><div class='hunk'>@@ -1151,8 +1090,10 @@ static void macb_tx_error_task(struct work_struct *work)</div><div class='ctx'> 					    skb-&gt;data);</div><div class='ctx'> 				bp-&gt;dev-&gt;stats.tx_packets++;</div><div class='ctx'> 				queue-&gt;stats.tx_packets++;</div><div class='add'>+				packets++;</div><div class='ctx'> 				bp-&gt;dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='ctx'> 				queue-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='add'>+				bytes += skb-&gt;len;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* "Buffers exhausted mid-frame" errors may only happen</div><div class='hunk'>@@ -1169,6 +1110,9 @@ static void macb_tx_error_task(struct work_struct *work)</div><div class='ctx'> 		macb_tx_unmap(bp, tx_skb, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_tx_completed_queue(netdev_get_tx_queue(bp-&gt;dev, queue_index),</div><div class='add'>+				  packets, bytes);</div><div class='add'>+</div><div class='ctx'> 	/* Set end of TX queue */</div><div class='ctx'> 	desc = macb_tx_desc(queue, 0);</div><div class='ctx'> 	macb_set_addr(bp, desc, 0);</div><div class='hunk'>@@ -1179,10 +1123,6 @@ static void macb_tx_error_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	/* Reinitialize the TX desc queue */</div><div class='ctx'> 	queue_writel(queue, TBQP, lower_32_bits(queue-&gt;tx_ring_dma));</div><div class='del'>-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='del'>-	if (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_64B)</div><div class='del'>-		queue_writel(queue, TBQPH, upper_32_bits(queue-&gt;tx_ring_dma));</div><div class='del'>-#endif</div><div class='ctx'> 	/* Make TX ring reflect state of hardware */</div><div class='ctx'> 	queue-&gt;tx_head = 0;</div><div class='ctx'> 	queue-&gt;tx_tail = 0;</div><div class='hunk'>@@ -1236,11 +1176,13 @@ static int macb_tx_complete(struct macb_queue *queue, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct macb *bp = queue-&gt;bp;</div><div class='ctx'> 	u16 queue_index = queue - bp-&gt;queues;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	unsigned int tail;</div><div class='ctx'> 	unsigned int head;</div><div class='ctx'> 	int packets = 0;</div><div class='add'>+	u32 bytes = 0;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;queue-&gt;tx_ptr_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;queue-&gt;tx_ptr_lock, flags);</div><div class='ctx'> 	head = queue-&gt;tx_head;</div><div class='ctx'> 	for (tail = queue-&gt;tx_tail; tail != head &amp;&amp; packets &lt; budget; tail++) {</div><div class='ctx'> 		struct macb_tx_skb	*tx_skb;</div><div class='hunk'>@@ -1280,6 +1222,7 @@ static int macb_tx_complete(struct macb_queue *queue, int budget)</div><div class='ctx'> 				bp-&gt;dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='ctx'> 				queue-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='ctx'> 				packets++;</div><div class='add'>+				bytes += skb-&gt;len;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* Now we can safely release resources */</div><div class='hunk'>@@ -1294,12 +1237,15 @@ static int macb_tx_complete(struct macb_queue *queue, int budget)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_tx_completed_queue(netdev_get_tx_queue(bp-&gt;dev, queue_index),</div><div class='add'>+				  packets, bytes);</div><div class='add'>+</div><div class='ctx'> 	queue-&gt;tx_tail = tail;</div><div class='ctx'> 	if (__netif_subqueue_stopped(bp-&gt;dev, queue_index) &amp;&amp;</div><div class='ctx'> 	    CIRC_CNT(queue-&gt;tx_head, queue-&gt;tx_tail,</div><div class='ctx'> 		     bp-&gt;tx_ring_size) &lt;= MACB_TX_WAKEUP_THRESH(bp))</div><div class='ctx'> 		netif_wake_subqueue(bp-&gt;dev, queue_index);</div><div class='del'>-	spin_unlock(&amp;queue-&gt;tx_ptr_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;queue-&gt;tx_ptr_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return packets;</div><div class='ctx'> }</div><div class='hunk'>@@ -1350,8 +1296,19 @@ static void gem_rx_refill(struct macb_queue *queue)</div><div class='ctx'> 			dma_wmb();</div><div class='ctx'> 			macb_set_addr(bp, desc, paddr);</div><div class='ctx'> </div><div class='del'>-			/* properly align Ethernet header */</div><div class='del'>-			skb_reserve(skb, NET_IP_ALIGN);</div><div class='add'>+			/* Properly align Ethernet header.</div><div class='add'>+			 *</div><div class='add'>+			 * Hardware can add dummy bytes if asked using the RBOF</div><div class='add'>+			 * field inside the NCFGR register. That feature isn't</div><div class='add'>+			 * available if hardware is RSC capable.</div><div class='add'>+			 *</div><div class='add'>+			 * We cannot fallback to doing the 2-byte shift before</div><div class='add'>+			 * DMA mapping because the address field does not allow</div><div class='add'>+			 * setting the low 2/3 bits.</div><div class='add'>+			 * It is 3 bits if HW_DMA_CAP_PTP, else 2 bits.</div><div class='add'>+			 */</div><div class='add'>+			if (!(bp-&gt;caps &amp; MACB_CAPS_RSC))</div><div class='add'>+				skb_reserve(skb, NET_IP_ALIGN);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			desc-&gt;ctrl = 0;</div><div class='ctx'> 			dma_wmb();</div><div class='hunk'>@@ -1715,8 +1672,9 @@ static void macb_tx_restart(struct macb_queue *queue)</div><div class='ctx'> {</div><div class='ctx'> 	struct macb *bp = queue-&gt;bp;</div><div class='ctx'> 	unsigned int head_idx, tbqp;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;queue-&gt;tx_ptr_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;queue-&gt;tx_ptr_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (queue-&gt;tx_head == queue-&gt;tx_tail)</div><div class='ctx'> 		goto out_tx_ptr_unlock;</div><div class='hunk'>@@ -1728,19 +1686,20 @@ static void macb_tx_restart(struct macb_queue *queue)</div><div class='ctx'> 	if (tbqp == head_idx)</div><div class='ctx'> 		goto out_tx_ptr_unlock;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(&amp;bp-&gt;lock);</div><div class='add'>+	spin_lock(&amp;bp-&gt;lock);</div><div class='ctx'> 	macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));</div><div class='del'>-	spin_unlock_irq(&amp;bp-&gt;lock);</div><div class='add'>+	spin_unlock(&amp;bp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> out_tx_ptr_unlock:</div><div class='del'>-	spin_unlock(&amp;queue-&gt;tx_ptr_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;queue-&gt;tx_ptr_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool macb_tx_complete_pending(struct macb_queue *queue)</div><div class='ctx'> {</div><div class='ctx'> 	bool retval = false;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;queue-&gt;tx_ptr_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;queue-&gt;tx_ptr_lock, flags);</div><div class='ctx'> 	if (queue-&gt;tx_head != queue-&gt;tx_tail) {</div><div class='ctx'> 		/* Make hw descriptor updates visible to CPU */</div><div class='ctx'> 		rmb();</div><div class='hunk'>@@ -1748,7 +1707,7 @@ static bool macb_tx_complete_pending(struct macb_queue *queue)</div><div class='ctx'> 		if (macb_tx_desc(queue, queue-&gt;tx_tail)-&gt;ctrl &amp; MACB_BIT(TX_USED))</div><div class='ctx'> 			retval = true;</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock(&amp;queue-&gt;tx_ptr_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;queue-&gt;tx_ptr_lock, flags);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1987,10 +1946,12 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 		if (status &amp; MACB_BIT(ISR_ROVR)) {</div><div class='ctx'> 			/* We missed at least one packet */</div><div class='add'>+			spin_lock(&amp;bp-&gt;stats_lock);</div><div class='ctx'> 			if (macb_is_gem(bp))</div><div class='ctx'> 				bp-&gt;hw_stats.gem.rx_overruns++;</div><div class='ctx'> 			else</div><div class='ctx'> 				bp-&gt;hw_stats.macb.rx_overruns++;</div><div class='add'>+			spin_unlock(&amp;bp-&gt;stats_lock);</div><div class='ctx'> </div><div class='ctx'> 			if (bp-&gt;caps &amp; MACB_CAPS_ISR_CLEAR_ON_WRITE)</div><div class='ctx'> 				queue_writel(queue, ISR, MACB_BIT(ISR_ROVR));</div><div class='hunk'>@@ -2034,14 +1995,14 @@ static unsigned int macb_tx_map(struct macb *bp,</div><div class='ctx'> 				struct sk_buff *skb,</div><div class='ctx'> 				unsigned int hdrlen)</div><div class='ctx'> {</div><div class='del'>-	dma_addr_t mapping;</div><div class='del'>-	unsigned int len, entry, i, tx_head = queue-&gt;tx_head;</div><div class='del'>-	struct macb_tx_skb *tx_skb = NULL;</div><div class='del'>-	struct macb_dma_desc *desc;</div><div class='del'>-	unsigned int offset, size, count = 0;</div><div class='ctx'> 	unsigned int f, nr_frags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='del'>-	unsigned int eof = 1, mss_mfs = 0;</div><div class='add'>+	unsigned int len, i, tx_head = queue-&gt;tx_head;</div><div class='ctx'> 	u32 ctrl, lso_ctrl = 0, seq_ctrl = 0;</div><div class='add'>+	unsigned int eof = 1, mss_mfs = 0;</div><div class='add'>+	struct macb_tx_skb *tx_skb = NULL;</div><div class='add'>+	struct macb_dma_desc *desc;</div><div class='add'>+	unsigned int offset, size;</div><div class='add'>+	dma_addr_t mapping;</div><div class='ctx'> </div><div class='ctx'> 	/* LSO */</div><div class='ctx'> 	if (skb_shinfo(skb)-&gt;gso_size != 0) {</div><div class='hunk'>@@ -2061,8 +2022,7 @@ static unsigned int macb_tx_map(struct macb *bp,</div><div class='ctx'> </div><div class='ctx'> 	offset = 0;</div><div class='ctx'> 	while (len) {</div><div class='del'>-		entry = macb_tx_ring_wrap(bp, tx_head);</div><div class='del'>-		tx_skb = &amp;queue-&gt;tx_skb[entry];</div><div class='add'>+		tx_skb = macb_tx_skb(queue, tx_head);</div><div class='ctx'> </div><div class='ctx'> 		mapping = dma_map_single(&amp;bp-&gt;pdev-&gt;dev,</div><div class='ctx'> 					 skb-&gt;data + offset,</div><div class='hunk'>@@ -2078,10 +2038,9 @@ static unsigned int macb_tx_map(struct macb *bp,</div><div class='ctx'> </div><div class='ctx'> 		len -= size;</div><div class='ctx'> 		offset += size;</div><div class='del'>-		count++;</div><div class='ctx'> 		tx_head++;</div><div class='ctx'> </div><div class='del'>-		size = min(len, bp-&gt;max_tx_length);</div><div class='add'>+		size = umin(len, bp-&gt;max_tx_length);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Then, map paged data from fragments */</div><div class='hunk'>@@ -2091,9 +2050,8 @@ static unsigned int macb_tx_map(struct macb *bp,</div><div class='ctx'> 		len = skb_frag_size(frag);</div><div class='ctx'> 		offset = 0;</div><div class='ctx'> 		while (len) {</div><div class='del'>-			size = min(len, bp-&gt;max_tx_length);</div><div class='del'>-			entry = macb_tx_ring_wrap(bp, tx_head);</div><div class='del'>-			tx_skb = &amp;queue-&gt;tx_skb[entry];</div><div class='add'>+			size = umin(len, bp-&gt;max_tx_length);</div><div class='add'>+			tx_skb = macb_tx_skb(queue, tx_head);</div><div class='ctx'> </div><div class='ctx'> 			mapping = skb_frag_dma_map(&amp;bp-&gt;pdev-&gt;dev, frag,</div><div class='ctx'> 						   offset, size, DMA_TO_DEVICE);</div><div class='hunk'>@@ -2108,7 +2066,6 @@ static unsigned int macb_tx_map(struct macb *bp,</div><div class='ctx'> </div><div class='ctx'> 			len -= size;</div><div class='ctx'> 			offset += size;</div><div class='del'>-			count++;</div><div class='ctx'> 			tx_head++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2130,9 +2087,8 @@ static unsigned int macb_tx_map(struct macb *bp,</div><div class='ctx'> 	 * to set the end of TX queue</div><div class='ctx'> 	 */</div><div class='ctx'> 	i = tx_head;</div><div class='del'>-	entry = macb_tx_ring_wrap(bp, i);</div><div class='ctx'> 	ctrl = MACB_BIT(TX_USED);</div><div class='del'>-	desc = macb_tx_desc(queue, entry);</div><div class='add'>+	desc = macb_tx_desc(queue, i);</div><div class='ctx'> 	desc-&gt;ctrl = ctrl;</div><div class='ctx'> </div><div class='ctx'> 	if (lso_ctrl) {</div><div class='hunk'>@@ -2152,16 +2108,15 @@ static unsigned int macb_tx_map(struct macb *bp,</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		i--;</div><div class='del'>-		entry = macb_tx_ring_wrap(bp, i);</div><div class='del'>-		tx_skb = &amp;queue-&gt;tx_skb[entry];</div><div class='del'>-		desc = macb_tx_desc(queue, entry);</div><div class='add'>+		tx_skb = macb_tx_skb(queue, i);</div><div class='add'>+		desc = macb_tx_desc(queue, i);</div><div class='ctx'> </div><div class='ctx'> 		ctrl = (u32)tx_skb-&gt;size;</div><div class='ctx'> 		if (eof) {</div><div class='ctx'> 			ctrl |= MACB_BIT(TX_LAST);</div><div class='ctx'> 			eof = 0;</div><div class='ctx'> 		}</div><div class='del'>-		if (unlikely(entry == (bp-&gt;tx_ring_size - 1)))</div><div class='add'>+		if (unlikely(macb_tx_ring_wrap(bp, i) == bp-&gt;tx_ring_size - 1))</div><div class='ctx'> 			ctrl |= MACB_BIT(TX_WRAP);</div><div class='ctx'> </div><div class='ctx'> 		/* First descriptor is header descriptor */</div><div class='hunk'>@@ -2189,7 +2144,7 @@ static unsigned int macb_tx_map(struct macb *bp,</div><div class='ctx'> </div><div class='ctx'> 	queue-&gt;tx_head = tx_head;</div><div class='ctx'> </div><div class='del'>-	return count;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> dma_error:</div><div class='ctx'> 	netdev_err(bp-&gt;dev, "TX DMA map failed\n");</div><div class='hunk'>@@ -2200,7 +2155,7 @@ dma_error:</div><div class='ctx'> 		macb_tx_unmap(bp, tx_skb, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_features_t macb_features_check(struct sk_buff *skb,</div><div class='hunk'>@@ -2314,6 +2269,7 @@ static netdev_tx_t macb_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	struct macb_queue *queue = &amp;bp-&gt;queues[queue_index];</div><div class='ctx'> 	unsigned int desc_cnt, nr_frags, frag_size, f;</div><div class='ctx'> 	unsigned int hdrlen;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	bool is_lso;</div><div class='ctx'> 	netdev_tx_t ret = NETDEV_TX_OK;</div><div class='ctx'> </div><div class='hunk'>@@ -2327,11 +2283,9 @@ static netdev_tx_t macb_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MACB_USE_HWSTAMP</div><div class='del'>-	if ((skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP) &amp;&amp;</div><div class='del'>-	    (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_PTP))</div><div class='add'>+	if (macb_dma_ptp(bp) &amp;&amp;</div><div class='add'>+	    (skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP))</div><div class='ctx'> 		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	is_lso = (skb_shinfo(skb)-&gt;gso_size != 0);</div><div class='ctx'> </div><div class='hunk'>@@ -2348,7 +2302,7 @@ static netdev_tx_t macb_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 			return NETDEV_TX_BUSY;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else</div><div class='del'>-		hdrlen = min(skb_headlen(skb), bp-&gt;max_tx_length);</div><div class='add'>+		hdrlen = umin(skb_headlen(skb), bp-&gt;max_tx_length);</div><div class='ctx'> </div><div class='ctx'> #if defined(DEBUG) &amp;&amp; defined(VERBOSE_DEBUG)</div><div class='ctx'> 	netdev_vdbg(bp-&gt;dev,</div><div class='hunk'>@@ -2374,7 +2328,7 @@ static netdev_tx_t macb_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		desc_cnt += DIV_ROUND_UP(frag_size, bp-&gt;max_tx_length);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_lock_bh(&amp;queue-&gt;tx_ptr_lock);</div><div class='add'>+	spin_lock_irqsave(&amp;queue-&gt;tx_ptr_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* This is a hard error, log it. */</div><div class='ctx'> 	if (CIRC_SPACE(queue-&gt;tx_head, queue-&gt;tx_tail,</div><div class='hunk'>@@ -2387,7 +2341,7 @@ static netdev_tx_t macb_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Map socket buffer for DMA transfer */</div><div class='del'>-	if (!macb_tx_map(bp, queue, skb, hdrlen)) {</div><div class='add'>+	if (macb_tx_map(bp, queue, skb, hdrlen)) {</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2395,16 +2349,18 @@ static netdev_tx_t macb_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	/* Make newly initialized descriptor visible to hardware */</div><div class='ctx'> 	wmb();</div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='add'>+	netdev_tx_sent_queue(netdev_get_tx_queue(bp-&gt;dev, queue_index),</div><div class='add'>+			     skb-&gt;len);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irq(&amp;bp-&gt;lock);</div><div class='add'>+	spin_lock(&amp;bp-&gt;lock);</div><div class='ctx'> 	macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));</div><div class='del'>-	spin_unlock_irq(&amp;bp-&gt;lock);</div><div class='add'>+	spin_unlock(&amp;bp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (CIRC_SPACE(queue-&gt;tx_head, queue-&gt;tx_tail, bp-&gt;tx_ring_size) &lt; 1)</div><div class='ctx'> 		netif_stop_subqueue(dev, queue_index);</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='del'>-	spin_unlock_bh(&amp;queue-&gt;tx_ptr_lock);</div><div class='add'>+	spin_unlock_irqrestore(&amp;queue-&gt;tx_ptr_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2474,35 +2430,42 @@ static void macb_free_rx_buffers(struct macb *bp)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int macb_tx_ring_size_per_queue(struct macb *bp)</div><div class='add'>+{</div><div class='add'>+	return macb_dma_desc_get_size(bp) * bp-&gt;tx_ring_size + bp-&gt;tx_bd_rd_prefetch;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int macb_rx_ring_size_per_queue(struct macb *bp)</div><div class='add'>+{</div><div class='add'>+	return macb_dma_desc_get_size(bp) * bp-&gt;rx_ring_size + bp-&gt;rx_bd_rd_prefetch;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void macb_free_consistent(struct macb *bp)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = &amp;bp-&gt;pdev-&gt;dev;</div><div class='ctx'> 	struct macb_queue *queue;</div><div class='ctx'> 	unsigned int q;</div><div class='del'>-	int size;</div><div class='add'>+	size_t size;</div><div class='ctx'> </div><div class='ctx'> 	if (bp-&gt;rx_ring_tieoff) {</div><div class='del'>-		dma_free_coherent(&amp;bp-&gt;pdev-&gt;dev, macb_dma_desc_get_size(bp),</div><div class='add'>+		dma_free_coherent(dev, macb_dma_desc_get_size(bp),</div><div class='ctx'> 				  bp-&gt;rx_ring_tieoff, bp-&gt;rx_ring_tieoff_dma);</div><div class='ctx'> 		bp-&gt;rx_ring_tieoff = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bp-&gt;macbgem_ops.mog_free_rx_buffers(bp);</div><div class='ctx'> </div><div class='add'>+	size = bp-&gt;num_queues * macb_tx_ring_size_per_queue(bp);</div><div class='add'>+	dma_free_coherent(dev, size, bp-&gt;queues[0].tx_ring, bp-&gt;queues[0].tx_ring_dma);</div><div class='add'>+</div><div class='add'>+	size = bp-&gt;num_queues * macb_rx_ring_size_per_queue(bp);</div><div class='add'>+	dma_free_coherent(dev, size, bp-&gt;queues[0].rx_ring, bp-&gt;queues[0].rx_ring_dma);</div><div class='add'>+</div><div class='ctx'> 	for (q = 0, queue = bp-&gt;queues; q &lt; bp-&gt;num_queues; ++q, ++queue) {</div><div class='ctx'> 		kfree(queue-&gt;tx_skb);</div><div class='ctx'> 		queue-&gt;tx_skb = NULL;</div><div class='del'>-		if (queue-&gt;tx_ring) {</div><div class='del'>-			size = TX_RING_BYTES(bp) + bp-&gt;tx_bd_rd_prefetch;</div><div class='del'>-			dma_free_coherent(&amp;bp-&gt;pdev-&gt;dev, size,</div><div class='del'>-					  queue-&gt;tx_ring, queue-&gt;tx_ring_dma);</div><div class='del'>-			queue-&gt;tx_ring = NULL;</div><div class='del'>-		}</div><div class='del'>-		if (queue-&gt;rx_ring) {</div><div class='del'>-			size = RX_RING_BYTES(bp) + bp-&gt;rx_bd_rd_prefetch;</div><div class='del'>-			dma_free_coherent(&amp;bp-&gt;pdev-&gt;dev, size,</div><div class='del'>-					  queue-&gt;rx_ring, queue-&gt;rx_ring_dma);</div><div class='del'>-			queue-&gt;rx_ring = NULL;</div><div class='del'>-		}</div><div class='add'>+		queue-&gt;tx_ring = NULL;</div><div class='add'>+		queue-&gt;rx_ring = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2544,35 +2507,45 @@ static int macb_alloc_rx_buffers(struct macb *bp)</div><div class='ctx'> </div><div class='ctx'> static int macb_alloc_consistent(struct macb *bp)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = &amp;bp-&gt;pdev-&gt;dev;</div><div class='add'>+	dma_addr_t tx_dma, rx_dma;</div><div class='ctx'> 	struct macb_queue *queue;</div><div class='ctx'> 	unsigned int q;</div><div class='del'>-	int size;</div><div class='add'>+	void *tx, *rx;</div><div class='add'>+	size_t size;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Upper 32-bits of Tx/Rx DMA descriptor for each queues much match!</div><div class='add'>+	 * We cannot enforce this guarantee, the best we can do is do a single</div><div class='add'>+	 * allocation and hope it will land into alloc_pages() that guarantees</div><div class='add'>+	 * natural alignment of physical addresses.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	size = bp-&gt;num_queues * macb_tx_ring_size_per_queue(bp);</div><div class='add'>+	tx = dma_alloc_coherent(dev, size, &amp;tx_dma, GFP_KERNEL);</div><div class='add'>+	if (!tx || upper_32_bits(tx_dma) != upper_32_bits(tx_dma + size - 1))</div><div class='add'>+		goto out_err;</div><div class='add'>+	netdev_dbg(bp-&gt;dev, "Allocated %zu bytes for %u TX rings at %08lx (mapped %p)\n",</div><div class='add'>+		   size, bp-&gt;num_queues, (unsigned long)tx_dma, tx);</div><div class='add'>+</div><div class='add'>+	size = bp-&gt;num_queues * macb_rx_ring_size_per_queue(bp);</div><div class='add'>+	rx = dma_alloc_coherent(dev, size, &amp;rx_dma, GFP_KERNEL);</div><div class='add'>+	if (!rx || upper_32_bits(rx_dma) != upper_32_bits(rx_dma + size - 1))</div><div class='add'>+		goto out_err;</div><div class='add'>+	netdev_dbg(bp-&gt;dev, "Allocated %zu bytes for %u RX rings at %08lx (mapped %p)\n",</div><div class='add'>+		   size, bp-&gt;num_queues, (unsigned long)rx_dma, rx);</div><div class='ctx'> </div><div class='ctx'> 	for (q = 0, queue = bp-&gt;queues; q &lt; bp-&gt;num_queues; ++q, ++queue) {</div><div class='del'>-		size = TX_RING_BYTES(bp) + bp-&gt;tx_bd_rd_prefetch;</div><div class='del'>-		queue-&gt;tx_ring = dma_alloc_coherent(&amp;bp-&gt;pdev-&gt;dev, size,</div><div class='del'>-						    &amp;queue-&gt;tx_ring_dma,</div><div class='del'>-						    GFP_KERNEL);</div><div class='del'>-		if (!queue-&gt;tx_ring)</div><div class='del'>-			goto out_err;</div><div class='del'>-		netdev_dbg(bp-&gt;dev,</div><div class='del'>-			   "Allocated TX ring for queue %u of %d bytes at %08lx (mapped %p)\n",</div><div class='del'>-			   q, size, (unsigned long)queue-&gt;tx_ring_dma,</div><div class='del'>-			   queue-&gt;tx_ring);</div><div class='add'>+		queue-&gt;tx_ring = tx + macb_tx_ring_size_per_queue(bp) * q;</div><div class='add'>+		queue-&gt;tx_ring_dma = tx_dma + macb_tx_ring_size_per_queue(bp) * q;</div><div class='add'>+</div><div class='add'>+		queue-&gt;rx_ring = rx + macb_rx_ring_size_per_queue(bp) * q;</div><div class='add'>+		queue-&gt;rx_ring_dma = rx_dma + macb_rx_ring_size_per_queue(bp) * q;</div><div class='ctx'> </div><div class='ctx'> 		size = bp-&gt;tx_ring_size * sizeof(struct macb_tx_skb);</div><div class='ctx'> 		queue-&gt;tx_skb = kmalloc(size, GFP_KERNEL);</div><div class='ctx'> 		if (!queue-&gt;tx_skb)</div><div class='ctx'> 			goto out_err;</div><div class='del'>-</div><div class='del'>-		size = RX_RING_BYTES(bp) + bp-&gt;rx_bd_rd_prefetch;</div><div class='del'>-		queue-&gt;rx_ring = dma_alloc_coherent(&amp;bp-&gt;pdev-&gt;dev, size,</div><div class='del'>-						 &amp;queue-&gt;rx_ring_dma, GFP_KERNEL);</div><div class='del'>-		if (!queue-&gt;rx_ring)</div><div class='del'>-			goto out_err;</div><div class='del'>-		netdev_dbg(bp-&gt;dev,</div><div class='del'>-			   "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",</div><div class='del'>-			   size, (unsigned long)queue-&gt;rx_ring_dma, queue-&gt;rx_ring);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (bp-&gt;macbgem_ops.mog_alloc_rx_buffers(bp))</div><div class='ctx'> 		goto out_err;</div><div class='hunk'>@@ -2789,14 +2762,10 @@ static void macb_configure_dma(struct macb *bp)</div><div class='ctx'> 			dmacfg &amp;= ~GEM_BIT(TXCOEN);</div><div class='ctx'> </div><div class='ctx'> 		dmacfg &amp;= ~GEM_BIT(ADDR64);</div><div class='del'>-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='del'>-		if (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_64B)</div><div class='add'>+		if (macb_dma64(bp))</div><div class='ctx'> 			dmacfg |= GEM_BIT(ADDR64);</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_MACB_USE_HWSTAMP</div><div class='del'>-		if (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_PTP)</div><div class='add'>+		if (macb_dma_ptp(bp))</div><div class='ctx'> 			dmacfg |= GEM_BIT(RXEXT) | GEM_BIT(TXEXT);</div><div class='del'>-#endif</div><div class='ctx'> 		netdev_dbg(bp-&gt;dev, "Cadence configure DMA with 0x%08x\n",</div><div class='ctx'> 			   dmacfg);</div><div class='ctx'> 		gem_writel(bp, DMACFG, dmacfg);</div><div class='hunk'>@@ -2811,7 +2780,11 @@ static void macb_init_hw(struct macb *bp)</div><div class='ctx'> 	macb_set_hwaddr(bp);</div><div class='ctx'> </div><div class='ctx'> 	config = macb_mdc_clk_div(bp);</div><div class='del'>-	config |= MACB_BF(RBOF, NET_IP_ALIGN);	/* Make eth data aligned */</div><div class='add'>+	/* Make eth data aligned.</div><div class='add'>+	 * If RSC capable, that offset is ignored by HW.</div><div class='add'>+	 */</div><div class='add'>+	if (!(bp-&gt;caps &amp; MACB_CAPS_RSC))</div><div class='add'>+		config |= MACB_BF(RBOF, NET_IP_ALIGN);</div><div class='ctx'> 	config |= MACB_BIT(DRFCS);		/* Discard Rx FCS */</div><div class='ctx'> 	if (bp-&gt;caps &amp; MACB_CAPS_JUMBO)</div><div class='ctx'> 		config |= MACB_BIT(JFRAME);	/* Enable jumbo frames */</div><div class='hunk'>@@ -2988,7 +2961,11 @@ static int macb_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	macb_init_hw(bp);</div><div class='ctx'> </div><div class='del'>-	err = phy_power_on(bp-&gt;sgmii_phy);</div><div class='add'>+	err = phy_set_mode_ext(bp-&gt;phy, PHY_MODE_ETHERNET, bp-&gt;phy_interface);</div><div class='add'>+	if (err)</div><div class='add'>+		goto reset_hw;</div><div class='add'>+</div><div class='add'>+	err = phy_power_on(bp-&gt;phy);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto reset_hw;</div><div class='ctx'> </div><div class='hunk'>@@ -3004,7 +2981,7 @@ static int macb_open(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> phy_off:</div><div class='del'>-	phy_power_off(bp-&gt;sgmii_phy);</div><div class='add'>+	phy_power_off(bp-&gt;phy);</div><div class='ctx'> </div><div class='ctx'> reset_hw:</div><div class='ctx'> 	macb_reset_hw(bp);</div><div class='hunk'>@@ -3030,12 +3007,13 @@ static int macb_close(struct net_device *dev)</div><div class='ctx'> 	for (q = 0, queue = bp-&gt;queues; q &lt; bp-&gt;num_queues; ++q, ++queue) {</div><div class='ctx'> 		napi_disable(&amp;queue-&gt;napi_rx);</div><div class='ctx'> 		napi_disable(&amp;queue-&gt;napi_tx);</div><div class='add'>+		netdev_tx_reset_queue(netdev_get_tx_queue(dev, q));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	phylink_stop(bp-&gt;phylink);</div><div class='ctx'> 	phylink_disconnect_phy(bp-&gt;phylink);</div><div class='ctx'> </div><div class='del'>-	phy_power_off(bp-&gt;sgmii_phy);</div><div class='add'>+	phy_power_off(bp-&gt;phy);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bp-&gt;lock, flags);</div><div class='ctx'> 	macb_reset_hw(bp);</div><div class='hunk'>@@ -3080,7 +3058,7 @@ static void gem_update_stats(struct macb *bp)</div><div class='ctx'> 	unsigned int i, q, idx;</div><div class='ctx'> 	unsigned long *stat;</div><div class='ctx'> </div><div class='del'>-	u32 *p = &amp;bp-&gt;hw_stats.gem.tx_octets_31_0;</div><div class='add'>+	u64 *p = &amp;bp-&gt;hw_stats.gem.tx_octets;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; GEM_STATS_LEN; ++i, ++p) {</div><div class='ctx'> 		u32 offset = gem_statistics[i].offset;</div><div class='hunk'>@@ -3093,7 +3071,7 @@ static void gem_update_stats(struct macb *bp)</div><div class='ctx'> 			/* Add GEM_OCTTXH, GEM_OCTRXH */</div><div class='ctx'> 			val = bp-&gt;macb_reg_readl(bp, offset + 4);</div><div class='ctx'> 			bp-&gt;ethtool_stats[i] += ((u64)val) &lt;&lt; 32;</div><div class='del'>-			*(++p) += val;</div><div class='add'>+			*p += ((u64)val) &lt;&lt; 32;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3103,15 +3081,13 @@ static void gem_update_stats(struct macb *bp)</div><div class='ctx'> 			bp-&gt;ethtool_stats[idx++] = *stat;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct net_device_stats *gem_get_stats(struct macb *bp)</div><div class='add'>+static void gem_get_stats(struct macb *bp, struct rtnl_link_stats64 *nstat)</div><div class='ctx'> {</div><div class='ctx'> 	struct gem_stats *hwstat = &amp;bp-&gt;hw_stats.gem;</div><div class='del'>-	struct net_device_stats *nstat = &amp;bp-&gt;dev-&gt;stats;</div><div class='del'>-</div><div class='del'>-	if (!netif_running(bp-&gt;dev))</div><div class='del'>-		return nstat;</div><div class='ctx'> </div><div class='del'>-	gem_update_stats(bp);</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+	if (netif_running(bp-&gt;dev))</div><div class='add'>+		gem_update_stats(bp);</div><div class='ctx'> </div><div class='ctx'> 	nstat-&gt;rx_errors = (hwstat-&gt;rx_frame_check_sequence_errors +</div><div class='ctx'> 			    hwstat-&gt;rx_alignment_errors +</div><div class='hunk'>@@ -3140,19 +3116,19 @@ static struct net_device_stats *gem_get_stats(struct macb *bp)</div><div class='ctx'> 	nstat-&gt;tx_aborted_errors = hwstat-&gt;tx_excessive_collisions;</div><div class='ctx'> 	nstat-&gt;tx_carrier_errors = hwstat-&gt;tx_carrier_sense_errors;</div><div class='ctx'> 	nstat-&gt;tx_fifo_errors = hwstat-&gt;tx_underrun;</div><div class='del'>-</div><div class='del'>-	return nstat;</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gem_get_ethtool_stats(struct net_device *dev,</div><div class='ctx'> 				  struct ethtool_stats *stats, u64 *data)</div><div class='ctx'> {</div><div class='del'>-	struct macb *bp;</div><div class='add'>+	struct macb *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	bp = netdev_priv(dev);</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='ctx'> 	gem_update_stats(bp);</div><div class='ctx'> 	memcpy(data, &amp;bp-&gt;ethtool_stats, sizeof(u64)</div><div class='ctx'> 			* (GEM_STATS_LEN + QUEUE_STATS_LEN * MACB_MAX_QUEUES));</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gem_get_sset_count(struct net_device *dev, int sset)</div><div class='hunk'>@@ -3192,16 +3168,20 @@ static void gem_get_ethtool_strings(struct net_device *dev, u32 sset, u8 *p)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct net_device_stats *macb_get_stats(struct net_device *dev)</div><div class='add'>+static void macb_get_stats(struct net_device *dev,</div><div class='add'>+			   struct rtnl_link_stats64 *nstat)</div><div class='ctx'> {</div><div class='ctx'> 	struct macb *bp = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *nstat = &amp;bp-&gt;dev-&gt;stats;</div><div class='ctx'> 	struct macb_stats *hwstat = &amp;bp-&gt;hw_stats.macb;</div><div class='ctx'> </div><div class='del'>-	if (macb_is_gem(bp))</div><div class='del'>-		return gem_get_stats(bp);</div><div class='add'>+	netdev_stats_to_stats64(nstat, &amp;bp-&gt;dev-&gt;stats);</div><div class='add'>+	if (macb_is_gem(bp)) {</div><div class='add'>+		gem_get_stats(bp, nstat);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* read stats from hardware */</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='ctx'> 	macb_update_stats(bp);</div><div class='ctx'> </div><div class='ctx'> 	/* Convert HW stats into netdevice stats */</div><div class='hunk'>@@ -3235,8 +3215,171 @@ static struct net_device_stats *macb_get_stats(struct net_device *dev)</div><div class='ctx'> 	nstat-&gt;tx_carrier_errors = hwstat-&gt;tx_carrier_errors;</div><div class='ctx'> 	nstat-&gt;tx_fifo_errors = hwstat-&gt;tx_underruns;</div><div class='ctx'> 	/* Don't know about heartbeat or window errors... */</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void macb_get_pause_stats(struct net_device *dev,</div><div class='add'>+				 struct ethtool_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	struct macb *bp = netdev_priv(dev);</div><div class='add'>+	struct macb_stats *hwstat = &amp;bp-&gt;hw_stats.macb;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+	macb_update_stats(bp);</div><div class='add'>+	pause_stats-&gt;tx_pause_frames = hwstat-&gt;tx_pause_frames;</div><div class='add'>+	pause_stats-&gt;rx_pause_frames = hwstat-&gt;rx_pause_frames;</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gem_get_pause_stats(struct net_device *dev,</div><div class='add'>+				struct ethtool_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	struct macb *bp = netdev_priv(dev);</div><div class='add'>+	struct gem_stats *hwstat = &amp;bp-&gt;hw_stats.gem;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+	gem_update_stats(bp);</div><div class='add'>+	pause_stats-&gt;tx_pause_frames = hwstat-&gt;tx_pause_frames;</div><div class='add'>+	pause_stats-&gt;rx_pause_frames = hwstat-&gt;rx_pause_frames;</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void macb_get_eth_mac_stats(struct net_device *dev,</div><div class='add'>+				   struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct macb *bp = netdev_priv(dev);</div><div class='add'>+	struct macb_stats *hwstat = &amp;bp-&gt;hw_stats.macb;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+	macb_update_stats(bp);</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK = hwstat-&gt;tx_ok;</div><div class='add'>+	mac_stats-&gt;SingleCollisionFrames = hwstat-&gt;tx_single_cols;</div><div class='add'>+	mac_stats-&gt;MultipleCollisionFrames = hwstat-&gt;tx_multiple_cols;</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK = hwstat-&gt;rx_ok;</div><div class='add'>+	mac_stats-&gt;FrameCheckSequenceErrors = hwstat-&gt;rx_fcs_errors;</div><div class='add'>+	mac_stats-&gt;AlignmentErrors = hwstat-&gt;rx_align_errors;</div><div class='add'>+	mac_stats-&gt;FramesWithDeferredXmissions = hwstat-&gt;tx_deferred;</div><div class='add'>+	mac_stats-&gt;LateCollisions = hwstat-&gt;tx_late_cols;</div><div class='add'>+	mac_stats-&gt;FramesAbortedDueToXSColls = hwstat-&gt;tx_excessive_cols;</div><div class='add'>+	mac_stats-&gt;FramesLostDueToIntMACXmitError = hwstat-&gt;tx_underruns;</div><div class='add'>+	mac_stats-&gt;CarrierSenseErrors = hwstat-&gt;tx_carrier_errors;</div><div class='add'>+	mac_stats-&gt;FramesLostDueToIntMACRcvError = hwstat-&gt;rx_overruns;</div><div class='add'>+	mac_stats-&gt;InRangeLengthErrors = hwstat-&gt;rx_length_mismatch;</div><div class='add'>+	mac_stats-&gt;FrameTooLongErrors = hwstat-&gt;rx_oversize_pkts;</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gem_get_eth_mac_stats(struct net_device *dev,</div><div class='add'>+				  struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct macb *bp = netdev_priv(dev);</div><div class='add'>+	struct gem_stats *hwstat = &amp;bp-&gt;hw_stats.gem;</div><div class='ctx'> </div><div class='del'>-	return nstat;</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+	gem_update_stats(bp);</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK = hwstat-&gt;tx_frames;</div><div class='add'>+	mac_stats-&gt;SingleCollisionFrames = hwstat-&gt;tx_single_collision_frames;</div><div class='add'>+	mac_stats-&gt;MultipleCollisionFrames =</div><div class='add'>+		hwstat-&gt;tx_multiple_collision_frames;</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK = hwstat-&gt;rx_frames;</div><div class='add'>+	mac_stats-&gt;FrameCheckSequenceErrors =</div><div class='add'>+		hwstat-&gt;rx_frame_check_sequence_errors;</div><div class='add'>+	mac_stats-&gt;AlignmentErrors = hwstat-&gt;rx_alignment_errors;</div><div class='add'>+	mac_stats-&gt;OctetsTransmittedOK = hwstat-&gt;tx_octets;</div><div class='add'>+	mac_stats-&gt;FramesWithDeferredXmissions = hwstat-&gt;tx_deferred_frames;</div><div class='add'>+	mac_stats-&gt;LateCollisions = hwstat-&gt;tx_late_collisions;</div><div class='add'>+	mac_stats-&gt;FramesAbortedDueToXSColls = hwstat-&gt;tx_excessive_collisions;</div><div class='add'>+	mac_stats-&gt;FramesLostDueToIntMACXmitError = hwstat-&gt;tx_underrun;</div><div class='add'>+	mac_stats-&gt;CarrierSenseErrors = hwstat-&gt;tx_carrier_sense_errors;</div><div class='add'>+	mac_stats-&gt;OctetsReceivedOK = hwstat-&gt;rx_octets;</div><div class='add'>+	mac_stats-&gt;MulticastFramesXmittedOK = hwstat-&gt;tx_multicast_frames;</div><div class='add'>+	mac_stats-&gt;BroadcastFramesXmittedOK = hwstat-&gt;tx_broadcast_frames;</div><div class='add'>+	mac_stats-&gt;MulticastFramesReceivedOK = hwstat-&gt;rx_multicast_frames;</div><div class='add'>+	mac_stats-&gt;BroadcastFramesReceivedOK = hwstat-&gt;rx_broadcast_frames;</div><div class='add'>+	mac_stats-&gt;InRangeLengthErrors = hwstat-&gt;rx_length_field_frame_errors;</div><div class='add'>+	mac_stats-&gt;FrameTooLongErrors = hwstat-&gt;rx_oversize_frames;</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* TODO: Report SQE test errors when added to phy_stats */</div><div class='add'>+static void macb_get_eth_phy_stats(struct net_device *dev,</div><div class='add'>+				   struct ethtool_eth_phy_stats *phy_stats)</div><div class='add'>+{</div><div class='add'>+	struct macb *bp = netdev_priv(dev);</div><div class='add'>+	struct macb_stats *hwstat = &amp;bp-&gt;hw_stats.macb;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+	macb_update_stats(bp);</div><div class='add'>+	phy_stats-&gt;SymbolErrorDuringCarrier = hwstat-&gt;rx_symbol_errors;</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gem_get_eth_phy_stats(struct net_device *dev,</div><div class='add'>+				  struct ethtool_eth_phy_stats *phy_stats)</div><div class='add'>+{</div><div class='add'>+	struct macb *bp = netdev_priv(dev);</div><div class='add'>+	struct gem_stats *hwstat = &amp;bp-&gt;hw_stats.gem;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+	gem_update_stats(bp);</div><div class='add'>+	phy_stats-&gt;SymbolErrorDuringCarrier = hwstat-&gt;rx_symbol_errors;</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void macb_get_rmon_stats(struct net_device *dev,</div><div class='add'>+				struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+				const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct macb *bp = netdev_priv(dev);</div><div class='add'>+	struct macb_stats *hwstat = &amp;bp-&gt;hw_stats.macb;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+	macb_update_stats(bp);</div><div class='add'>+	rmon_stats-&gt;undersize_pkts = hwstat-&gt;rx_undersize_pkts;</div><div class='add'>+	rmon_stats-&gt;oversize_pkts = hwstat-&gt;rx_oversize_pkts;</div><div class='add'>+	rmon_stats-&gt;jabbers = hwstat-&gt;rx_jabbers;</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range gem_rmon_ranges[] = {</div><div class='add'>+	{   64,    64 },</div><div class='add'>+	{   65,   127 },</div><div class='add'>+	{  128,   255 },</div><div class='add'>+	{  256,   511 },</div><div class='add'>+	{  512,  1023 },</div><div class='add'>+	{ 1024,  1518 },</div><div class='add'>+	{ 1519, 16384 },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void gem_get_rmon_stats(struct net_device *dev,</div><div class='add'>+			       struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+			       const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct macb *bp = netdev_priv(dev);</div><div class='add'>+	struct gem_stats *hwstat = &amp;bp-&gt;hw_stats.gem;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+	gem_update_stats(bp);</div><div class='add'>+	rmon_stats-&gt;undersize_pkts = hwstat-&gt;rx_undersized_frames;</div><div class='add'>+	rmon_stats-&gt;oversize_pkts = hwstat-&gt;rx_oversize_frames;</div><div class='add'>+	rmon_stats-&gt;jabbers = hwstat-&gt;rx_jabbers;</div><div class='add'>+	rmon_stats-&gt;hist[0] = hwstat-&gt;rx_64_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist[1] = hwstat-&gt;rx_65_127_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist[2] = hwstat-&gt;rx_128_255_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist[3] = hwstat-&gt;rx_256_511_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist[4] = hwstat-&gt;rx_512_1023_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist[5] = hwstat-&gt;rx_1024_1518_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist[6] = hwstat-&gt;rx_greater_than_1518_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist_tx[0] = hwstat-&gt;tx_64_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist_tx[1] = hwstat-&gt;tx_65_127_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist_tx[2] = hwstat-&gt;tx_128_255_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist_tx[3] = hwstat-&gt;tx_256_511_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist_tx[4] = hwstat-&gt;tx_512_1023_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist_tx[5] = hwstat-&gt;tx_1024_1518_byte_frames;</div><div class='add'>+	rmon_stats-&gt;hist_tx[6] = hwstat-&gt;tx_greater_than_1518_byte_frames;</div><div class='add'>+	spin_unlock_irq(&amp;bp-&gt;stats_lock);</div><div class='add'>+	*ranges = gem_rmon_ranges;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int macb_get_regs_len(struct net_device *netdev)</div><div class='hunk'>@@ -3406,7 +3549,7 @@ static int gem_get_ts_info(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct macb *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if ((bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_PTP) == 0) {</div><div class='add'>+	if (!macb_dma_ptp(bp)) {</div><div class='ctx'> 		ethtool_op_get_ts_info(dev, info);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3765,6 +3908,10 @@ static const struct ethtool_ops macb_ethtool_ops = {</div><div class='ctx'> 	.get_regs		= macb_get_regs,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='ctx'> 	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='add'>+	.get_pause_stats	= macb_get_pause_stats,</div><div class='add'>+	.get_eth_mac_stats	= macb_get_eth_mac_stats,</div><div class='add'>+	.get_eth_phy_stats	= macb_get_eth_phy_stats,</div><div class='add'>+	.get_rmon_stats		= macb_get_rmon_stats,</div><div class='ctx'> 	.get_wol		= macb_get_wol,</div><div class='ctx'> 	.set_wol		= macb_set_wol,</div><div class='ctx'> 	.get_link_ksettings     = macb_get_link_ksettings,</div><div class='hunk'>@@ -3783,6 +3930,10 @@ static const struct ethtool_ops gem_ethtool_ops = {</div><div class='ctx'> 	.get_ethtool_stats	= gem_get_ethtool_stats,</div><div class='ctx'> 	.get_strings		= gem_get_ethtool_strings,</div><div class='ctx'> 	.get_sset_count		= gem_get_sset_count,</div><div class='add'>+	.get_pause_stats	= gem_get_pause_stats,</div><div class='add'>+	.get_eth_mac_stats	= gem_get_eth_mac_stats,</div><div class='add'>+	.get_eth_phy_stats	= gem_get_eth_phy_stats,</div><div class='add'>+	.get_rmon_stats		= gem_get_rmon_stats,</div><div class='ctx'> 	.get_link_ksettings     = macb_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings     = macb_set_link_ksettings,</div><div class='ctx'> 	.get_ringparam		= macb_get_ringparam,</div><div class='hunk'>@@ -3914,12 +4065,234 @@ static void macb_restore_features(struct macb *bp)</div><div class='ctx'> 	macb_set_rxflow_feature(bp, features);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int macb_taprio_setup_replace(struct net_device *ndev,</div><div class='add'>+				     struct tc_taprio_qopt_offload *conf)</div><div class='add'>+{</div><div class='add'>+	u64 total_on_time = 0, start_time_sec = 0, start_time = conf-&gt;base_time;</div><div class='add'>+	u32 configured_queues = 0, speed = 0, start_time_nsec;</div><div class='add'>+	struct macb_queue_enst_config *enst_queue;</div><div class='add'>+	struct tc_taprio_sched_entry *entry;</div><div class='add'>+	struct macb *bp = netdev_priv(ndev);</div><div class='add'>+	struct ethtool_link_ksettings kset;</div><div class='add'>+	struct macb_queue *queue;</div><div class='add'>+	u32 queue_mask;</div><div class='add'>+	u8 queue_id;</div><div class='add'>+	size_t i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (conf-&gt;num_entries &gt; bp-&gt;num_queues) {</div><div class='add'>+		netdev_err(ndev, "Too many TAPRIO entries: %zu &gt; %d queues\n",</div><div class='add'>+			   conf-&gt;num_entries, bp-&gt;num_queues);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (conf-&gt;base_time &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "Invalid base_time: must be 0 or positive, got %lld\n",</div><div class='add'>+			   conf-&gt;base_time);</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get the current link speed */</div><div class='add'>+	err = phylink_ethtool_ksettings_get(bp-&gt;phylink, &amp;kset);</div><div class='add'>+	if (unlikely(err)) {</div><div class='add'>+		netdev_err(ndev, "Failed to get link settings: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	speed = kset.base.speed;</div><div class='add'>+	if (unlikely(speed &lt;= 0)) {</div><div class='add'>+		netdev_err(ndev, "Invalid speed: %d\n", speed);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enst_queue = kcalloc(conf-&gt;num_entries, sizeof(*enst_queue), GFP_KERNEL);</div><div class='add'>+	if (unlikely(!enst_queue))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Pre-validate all entries before making any hardware changes */</div><div class='add'>+	for (i = 0; i &lt; conf-&gt;num_entries; i++) {</div><div class='add'>+		entry = &amp;conf-&gt;entries[i];</div><div class='add'>+</div><div class='add'>+		if (entry-&gt;command != TC_TAPRIO_CMD_SET_GATES) {</div><div class='add'>+			netdev_err(ndev, "Entry %zu: unsupported command %d\n",</div><div class='add'>+				   i, entry-&gt;command);</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+			goto cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Validate gate_mask: must be nonzero, single queue, and within range */</div><div class='add'>+		if (!is_power_of_2(entry-&gt;gate_mask)) {</div><div class='add'>+			netdev_err(ndev, "Entry %zu: gate_mask 0x%x is not a power of 2 (only one queue per entry allowed)\n",</div><div class='add'>+				   i, entry-&gt;gate_mask);</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* gate_mask must not select queues outside the valid queues */</div><div class='add'>+		queue_id = order_base_2(entry-&gt;gate_mask);</div><div class='add'>+		if (queue_id &gt;= bp-&gt;num_queues) {</div><div class='add'>+			netdev_err(ndev, "Entry %zu: gate_mask 0x%x exceeds queue range (max_queues=%d)\n",</div><div class='add'>+				   i, entry-&gt;gate_mask, bp-&gt;num_queues);</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Check for start time limits */</div><div class='add'>+		start_time_sec = start_time;</div><div class='add'>+		start_time_nsec = do_div(start_time_sec, NSEC_PER_SEC);</div><div class='add'>+		if (start_time_sec &gt; GENMASK(GEM_START_TIME_SEC_SIZE - 1, 0)) {</div><div class='add'>+			netdev_err(ndev, "Entry %zu: Start time %llu s exceeds hardware limit\n",</div><div class='add'>+				   i, start_time_sec);</div><div class='add'>+			err = -ERANGE;</div><div class='add'>+			goto cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Check for on time limit */</div><div class='add'>+		if (entry-&gt;interval &gt; enst_max_hw_interval(speed)) {</div><div class='add'>+			netdev_err(ndev, "Entry %zu: interval %u ns exceeds hardware limit %llu ns\n",</div><div class='add'>+				   i, entry-&gt;interval, enst_max_hw_interval(speed));</div><div class='add'>+			err = -ERANGE;</div><div class='add'>+			goto cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Check for off time limit*/</div><div class='add'>+		if ((conf-&gt;cycle_time - entry-&gt;interval) &gt; enst_max_hw_interval(speed)) {</div><div class='add'>+			netdev_err(ndev, "Entry %zu: off_time %llu ns exceeds hardware limit %llu ns\n",</div><div class='add'>+				   i, conf-&gt;cycle_time - entry-&gt;interval,</div><div class='add'>+				   enst_max_hw_interval(speed));</div><div class='add'>+			err = -ERANGE;</div><div class='add'>+			goto cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		enst_queue[i].queue_id = queue_id;</div><div class='add'>+		enst_queue[i].start_time_mask =</div><div class='add'>+			(start_time_sec &lt;&lt; GEM_START_TIME_SEC_OFFSET) |</div><div class='add'>+			start_time_nsec;</div><div class='add'>+		enst_queue[i].on_time_bytes =</div><div class='add'>+			enst_ns_to_hw_units(entry-&gt;interval, speed);</div><div class='add'>+		enst_queue[i].off_time_bytes =</div><div class='add'>+			enst_ns_to_hw_units(conf-&gt;cycle_time - entry-&gt;interval, speed);</div><div class='add'>+</div><div class='add'>+		configured_queues |= entry-&gt;gate_mask;</div><div class='add'>+		total_on_time += entry-&gt;interval;</div><div class='add'>+		start_time += entry-&gt;interval;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check total interval doesn't exceed cycle time */</div><div class='add'>+	if (total_on_time &gt; conf-&gt;cycle_time) {</div><div class='add'>+		netdev_err(ndev, "Total ON %llu ns exceeds cycle time %llu ns\n",</div><div class='add'>+			   total_on_time, conf-&gt;cycle_time);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ndev, "TAPRIO setup: %zu entries, base_time=%lld ns, cycle_time=%llu ns\n",</div><div class='add'>+		   conf-&gt;num_entries, conf-&gt;base_time, conf-&gt;cycle_time);</div><div class='add'>+</div><div class='add'>+	/* All validations passed - proceed with hardware configuration */</div><div class='add'>+	scoped_guard(spinlock_irqsave, &amp;bp-&gt;lock) {</div><div class='add'>+		/* Disable ENST queues if running before configuring */</div><div class='add'>+		queue_mask = BIT_U32(bp-&gt;num_queues) - 1;</div><div class='add'>+		gem_writel(bp, ENST_CONTROL,</div><div class='add'>+			   queue_mask &lt;&lt; GEM_ENST_DISABLE_QUEUE_OFFSET);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; conf-&gt;num_entries; i++) {</div><div class='add'>+			queue = &amp;bp-&gt;queues[enst_queue[i].queue_id];</div><div class='add'>+			/* Configure queue timing registers */</div><div class='add'>+			queue_writel(queue, ENST_START_TIME,</div><div class='add'>+				     enst_queue[i].start_time_mask);</div><div class='add'>+			queue_writel(queue, ENST_ON_TIME,</div><div class='add'>+				     enst_queue[i].on_time_bytes);</div><div class='add'>+			queue_writel(queue, ENST_OFF_TIME,</div><div class='add'>+				     enst_queue[i].off_time_bytes);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Enable ENST for all configured queues in one write */</div><div class='add'>+		gem_writel(bp, ENST_CONTROL, configured_queues);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_info(ndev, "TAPRIO configuration completed successfully: %zu entries, %d queues configured\n",</div><div class='add'>+		    conf-&gt;num_entries, hweight32(configured_queues));</div><div class='add'>+</div><div class='add'>+cleanup:</div><div class='add'>+	kfree(enst_queue);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void macb_taprio_destroy(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct macb *bp = netdev_priv(ndev);</div><div class='add'>+	struct macb_queue *queue;</div><div class='add'>+	u32 queue_mask;</div><div class='add'>+	unsigned int q;</div><div class='add'>+</div><div class='add'>+	netdev_reset_tc(ndev);</div><div class='add'>+	queue_mask = BIT_U32(bp-&gt;num_queues) - 1;</div><div class='add'>+</div><div class='add'>+	scoped_guard(spinlock_irqsave, &amp;bp-&gt;lock) {</div><div class='add'>+		/* Single disable command for all queues */</div><div class='add'>+		gem_writel(bp, ENST_CONTROL,</div><div class='add'>+			   queue_mask &lt;&lt; GEM_ENST_DISABLE_QUEUE_OFFSET);</div><div class='add'>+</div><div class='add'>+		/* Clear all queue ENST registers in batch */</div><div class='add'>+		for (q = 0, queue = bp-&gt;queues; q &lt; bp-&gt;num_queues; ++q, ++queue) {</div><div class='add'>+			queue_writel(queue, ENST_START_TIME, 0);</div><div class='add'>+			queue_writel(queue, ENST_ON_TIME, 0);</div><div class='add'>+			queue_writel(queue, ENST_OFF_TIME, 0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	netdev_info(ndev, "TAPRIO destroy: All gates disabled\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int macb_setup_taprio(struct net_device *ndev,</div><div class='add'>+			     struct tc_taprio_qopt_offload *taprio)</div><div class='add'>+{</div><div class='add'>+	struct macb *bp = netdev_priv(ndev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!(ndev-&gt;hw_features &amp; NETIF_F_HW_TC)))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Check if Device is in runtime suspend */</div><div class='add'>+	if (unlikely(pm_runtime_suspended(&amp;bp-&gt;pdev-&gt;dev))) {</div><div class='add'>+		netdev_err(ndev, "Device is in runtime suspend\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (taprio-&gt;cmd) {</div><div class='add'>+	case TAPRIO_CMD_REPLACE:</div><div class='add'>+		err = macb_taprio_setup_replace(ndev, taprio);</div><div class='add'>+		break;</div><div class='add'>+	case TAPRIO_CMD_DESTROY:</div><div class='add'>+		macb_taprio_destroy(ndev);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int macb_setup_tc(struct net_device *dev, enum tc_setup_type type,</div><div class='add'>+			 void *type_data)</div><div class='add'>+{</div><div class='add'>+	if (!dev || !type_data)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_QDISC_TAPRIO:</div><div class='add'>+		return macb_setup_taprio(dev, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops macb_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= macb_open,</div><div class='ctx'> 	.ndo_stop		= macb_close,</div><div class='ctx'> 	.ndo_start_xmit		= macb_start_xmit,</div><div class='ctx'> 	.ndo_set_rx_mode	= macb_set_rx_mode,</div><div class='del'>-	.ndo_get_stats		= macb_get_stats,</div><div class='add'>+	.ndo_get_stats64	= macb_get_stats,</div><div class='ctx'> 	.ndo_eth_ioctl		= macb_ioctl,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_change_mtu		= macb_change_mtu,</div><div class='hunk'>@@ -3931,6 +4304,7 @@ static const struct net_device_ops macb_netdev_ops = {</div><div class='ctx'> 	.ndo_features_check	= macb_features_check,</div><div class='ctx'> 	.ndo_hwtstamp_set	= macb_hwtstamp_set,</div><div class='ctx'> 	.ndo_hwtstamp_get	= macb_hwtstamp_get,</div><div class='add'>+	.ndo_setup_tc		= macb_setup_tc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Configure peripheral capabilities according to device tree</div><div class='hunk'>@@ -3939,8 +4313,12 @@ static const struct net_device_ops macb_netdev_ops = {</div><div class='ctx'> static void macb_configure_caps(struct macb *bp,</div><div class='ctx'> 				const struct macb_config *dt_conf)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *np = bp-&gt;pdev-&gt;dev.of_node;</div><div class='add'>+	bool refclk_ext;</div><div class='ctx'> 	u32 dcfg;</div><div class='ctx'> </div><div class='add'>+	refclk_ext = of_property_read_bool(np, "cdns,refclk-ext");</div><div class='add'>+</div><div class='ctx'> 	if (dt_conf)</div><div class='ctx'> 		bp-&gt;caps = dt_conf-&gt;caps;</div><div class='ctx'> </div><div class='hunk'>@@ -3958,42 +4336,46 @@ static void macb_configure_caps(struct macb *bp,</div><div class='ctx'> 		dcfg = gem_readl(bp, DCFG2);</div><div class='ctx'> 		if ((dcfg &amp; (GEM_BIT(RX_PKT_BUFF) | GEM_BIT(TX_PKT_BUFF))) == 0)</div><div class='ctx'> 			bp-&gt;caps |= MACB_CAPS_FIFO_MODE;</div><div class='add'>+		if (GEM_BFEXT(PBUF_RSC, gem_readl(bp, DCFG6)))</div><div class='add'>+			bp-&gt;caps |= MACB_CAPS_RSC;</div><div class='ctx'> 		if (gem_has_ptp(bp)) {</div><div class='ctx'> 			if (!GEM_BFEXT(TSU, gem_readl(bp, DCFG5)))</div><div class='ctx'> 				dev_err(&amp;bp-&gt;pdev-&gt;dev,</div><div class='ctx'> 					"GEM doesn't support hardware ptp.\n");</div><div class='ctx'> 			else {</div><div class='ctx'> #ifdef CONFIG_MACB_USE_HWSTAMP</div><div class='del'>-				bp-&gt;hw_dma_cap |= HW_DMA_CAP_PTP;</div><div class='add'>+				bp-&gt;caps |= MACB_CAPS_DMA_PTP;</div><div class='ctx'> 				bp-&gt;ptp_info = &amp;gem_ptp_info;</div><div class='ctx'> #endif</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (refclk_ext)</div><div class='add'>+		bp-&gt;caps |= MACB_CAPS_USRIO_HAS_CLKEN;</div><div class='add'>+</div><div class='ctx'> 	dev_dbg(&amp;bp-&gt;pdev-&gt;dev, "Cadence caps 0x%08x\n", bp-&gt;caps);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void macb_probe_queues(void __iomem *mem,</div><div class='del'>-			      bool native_io,</div><div class='del'>-			      unsigned int *queue_mask,</div><div class='del'>-			      unsigned int *num_queues)</div><div class='add'>+static int macb_probe_queues(struct device *dev, void __iomem *mem, bool native_io)</div><div class='ctx'> {</div><div class='del'>-	*queue_mask = 0x1;</div><div class='del'>-	*num_queues = 1;</div><div class='add'>+	/* BIT(0) is never set but queue 0 always exists. */</div><div class='add'>+	unsigned int queue_mask = 0x1;</div><div class='ctx'> </div><div class='del'>-	/* is it macb or gem ?</div><div class='del'>-	 *</div><div class='del'>-	 * We need to read directly from the hardware here because</div><div class='del'>-	 * we are early in the probe process and don't have the</div><div class='del'>-	 * MACB_CAPS_MACB_IS_GEM flag positioned</div><div class='del'>-	 */</div><div class='del'>-	if (!hw_is_gem(mem, native_io))</div><div class='del'>-		return;</div><div class='add'>+	/* Use hw_is_gem() as MACB_CAPS_MACB_IS_GEM is not yet positioned. */</div><div class='add'>+	if (hw_is_gem(mem, native_io)) {</div><div class='add'>+		if (native_io)</div><div class='add'>+			queue_mask |= __raw_readl(mem + GEM_DCFG6) &amp; 0xFF;</div><div class='add'>+		else</div><div class='add'>+			queue_mask |= readl_relaxed(mem + GEM_DCFG6) &amp; 0xFF;</div><div class='add'>+</div><div class='add'>+		if (fls(queue_mask) != ffz(queue_mask)) {</div><div class='add'>+			dev_err(dev, "queue mask %#x has a hole\n", queue_mask);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* bit 0 is never set but queue 0 always exists */</div><div class='del'>-	*queue_mask |= readl_relaxed(mem + GEM_DCFG6) &amp; 0xff;</div><div class='del'>-	*num_queues = hweight32(*queue_mask);</div><div class='add'>+	return hweight32(queue_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void macb_clks_disable(struct clk *pclk, struct clk *hclk, struct clk *tx_clk,</div><div class='hunk'>@@ -4111,10 +4493,7 @@ static int macb_init(struct platform_device *pdev)</div><div class='ctx'> 	 * register mapping but we don't want to test the queue index then</div><div class='ctx'> 	 * compute the corresponding register offset at run time.</div><div class='ctx'> 	 */</div><div class='del'>-	for (hw_q = 0, q = 0; hw_q &lt; MACB_MAX_QUEUES; ++hw_q) {</div><div class='del'>-		if (!(bp-&gt;queue_mask &amp; (1 &lt;&lt; hw_q)))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='add'>+	for (hw_q = 0, q = 0; hw_q &lt; bp-&gt;num_queues; ++hw_q) {</div><div class='ctx'> 		queue = &amp;bp-&gt;queues[q];</div><div class='ctx'> 		queue-&gt;bp = bp;</div><div class='ctx'> 		spin_lock_init(&amp;queue-&gt;tx_ptr_lock);</div><div class='hunk'>@@ -4128,12 +4507,6 @@ static int macb_init(struct platform_device *pdev)</div><div class='ctx'> 			queue-&gt;TBQP = GEM_TBQP(hw_q - 1);</div><div class='ctx'> 			queue-&gt;RBQP = GEM_RBQP(hw_q - 1);</div><div class='ctx'> 			queue-&gt;RBQS = GEM_RBQS(hw_q - 1);</div><div class='del'>-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='del'>-			if (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_64B) {</div><div class='del'>-				queue-&gt;TBQPH = GEM_TBQPH(hw_q - 1);</div><div class='del'>-				queue-&gt;RBQPH = GEM_RBQPH(hw_q - 1);</div><div class='del'>-			}</div><div class='del'>-#endif</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* queue0 uses legacy registers */</div><div class='ctx'> 			queue-&gt;ISR  = MACB_ISR;</div><div class='hunk'>@@ -4142,14 +4515,12 @@ static int macb_init(struct platform_device *pdev)</div><div class='ctx'> 			queue-&gt;IMR  = MACB_IMR;</div><div class='ctx'> 			queue-&gt;TBQP = MACB_TBQP;</div><div class='ctx'> 			queue-&gt;RBQP = MACB_RBQP;</div><div class='del'>-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='del'>-			if (bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_64B) {</div><div class='del'>-				queue-&gt;TBQPH = MACB_TBQPH;</div><div class='del'>-				queue-&gt;RBQPH = MACB_RBQPH;</div><div class='del'>-			}</div><div class='del'>-#endif</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		queue-&gt;ENST_START_TIME = GEM_ENST_START_TIME(hw_q);</div><div class='add'>+		queue-&gt;ENST_ON_TIME = GEM_ENST_ON_TIME(hw_q);</div><div class='add'>+		queue-&gt;ENST_OFF_TIME = GEM_ENST_OFF_TIME(hw_q);</div><div class='add'>+</div><div class='ctx'> 		/* get irq: here we use the linux queue index, not the hardware</div><div class='ctx'> 		 * queue index. the queue irq definitions in the device tree</div><div class='ctx'> 		 * must remove the optional gaps that could exist in the</div><div class='hunk'>@@ -4193,8 +4564,11 @@ static int macb_init(struct platform_device *pdev)</div><div class='ctx'> 	/* Set features */</div><div class='ctx'> 	dev-&gt;hw_features = NETIF_F_SG;</div><div class='ctx'> </div><div class='del'>-	/* Check LSO capability */</div><div class='del'>-	if (GEM_BFEXT(PBUF_LSO, gem_readl(bp, DCFG6)))</div><div class='add'>+	/* Check LSO capability; runtime detection can be overridden by a cap</div><div class='add'>+	 * flag if the hardware is known to be buggy</div><div class='add'>+	 */</div><div class='add'>+	if (!(bp-&gt;caps &amp; MACB_CAPS_NO_LSO) &amp;&amp;</div><div class='add'>+	    GEM_BFEXT(PBUF_LSO, gem_readl(bp, DCFG6)))</div><div class='ctx'> 		dev-&gt;hw_features |= MACB_NETIF_LSO;</div><div class='ctx'> </div><div class='ctx'> 	/* Checksum offload is only available on gem with packet buffer */</div><div class='hunk'>@@ -4202,6 +4576,10 @@ static int macb_init(struct platform_device *pdev)</div><div class='ctx'> 		dev-&gt;hw_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM;</div><div class='ctx'> 	if (bp-&gt;caps &amp; MACB_CAPS_SG_DISABLED)</div><div class='ctx'> 		dev-&gt;hw_features &amp;= ~NETIF_F_SG;</div><div class='add'>+	/* Enable HW_TC if hardware supports QBV */</div><div class='add'>+	if (bp-&gt;caps &amp; MACB_CAPS_QBV)</div><div class='add'>+		dev-&gt;hw_features |= NETIF_F_HW_TC;</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;features = dev-&gt;hw_features;</div><div class='ctx'> </div><div class='ctx'> 	/* Check RX Flow Filters support.</div><div class='hunk'>@@ -4209,8 +4587,8 @@ static int macb_init(struct platform_device *pdev)</div><div class='ctx'> 	 * each 4-tuple define requires 1 T2 screener reg + 3 compare regs</div><div class='ctx'> 	 */</div><div class='ctx'> 	reg = gem_readl(bp, DCFG8);</div><div class='del'>-	bp-&gt;max_tuples = min((GEM_BFEXT(SCR2CMP, reg) / 3),</div><div class='del'>-			GEM_BFEXT(T2SCR, reg));</div><div class='add'>+	bp-&gt;max_tuples = umin((GEM_BFEXT(SCR2CMP, reg) / 3),</div><div class='add'>+			      GEM_BFEXT(T2SCR, reg));</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;bp-&gt;rx_fs_list.list);</div><div class='ctx'> 	if (bp-&gt;max_tuples &gt; 0) {</div><div class='ctx'> 		/* also needs one ethtype match to check IPv4 */</div><div class='hunk'>@@ -4580,7 +4958,7 @@ static const struct net_device_ops at91ether_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= at91ether_open,</div><div class='ctx'> 	.ndo_stop		= at91ether_close,</div><div class='ctx'> 	.ndo_start_xmit		= at91ether_start_xmit,</div><div class='del'>-	.ndo_get_stats		= macb_get_stats,</div><div class='add'>+	.ndo_get_stats64	= macb_get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= macb_set_rx_mode,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> 	.ndo_eth_ioctl		= macb_ioctl,</div><div class='hunk'>@@ -4645,36 +5023,45 @@ static unsigned long fu540_macb_tx_recalc_rate(struct clk_hw *hw,</div><div class='ctx'> 	return mgmt-&gt;rate;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static long fu540_macb_tx_round_rate(struct clk_hw *hw, unsigned long rate,</div><div class='del'>-				     unsigned long *parent_rate)</div><div class='del'>-{</div><div class='del'>-	if (WARN_ON(rate &lt; 2500000))</div><div class='del'>-		return 2500000;</div><div class='del'>-	else if (rate == 2500000)</div><div class='del'>-		return 2500000;</div><div class='del'>-	else if (WARN_ON(rate &lt; 13750000))</div><div class='del'>-		return 2500000;</div><div class='del'>-	else if (WARN_ON(rate &lt; 25000000))</div><div class='del'>-		return 25000000;</div><div class='del'>-	else if (rate == 25000000)</div><div class='del'>-		return 25000000;</div><div class='del'>-	else if (WARN_ON(rate &lt; 75000000))</div><div class='del'>-		return 25000000;</div><div class='del'>-	else if (WARN_ON(rate &lt; 125000000))</div><div class='del'>-		return 125000000;</div><div class='del'>-	else if (rate == 125000000)</div><div class='del'>-		return 125000000;</div><div class='del'>-</div><div class='del'>-	WARN_ON(rate &gt; 125000000);</div><div class='add'>+static int fu540_macb_tx_determine_rate(struct clk_hw *hw,</div><div class='add'>+					struct clk_rate_request *req)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON(req-&gt;rate &lt; 2500000))</div><div class='add'>+		req-&gt;rate = 2500000;</div><div class='add'>+	else if (req-&gt;rate == 2500000)</div><div class='add'>+		req-&gt;rate = 2500000;</div><div class='add'>+	else if (WARN_ON(req-&gt;rate &lt; 13750000))</div><div class='add'>+		req-&gt;rate = 2500000;</div><div class='add'>+	else if (WARN_ON(req-&gt;rate &lt; 25000000))</div><div class='add'>+		req-&gt;rate = 25000000;</div><div class='add'>+	else if (req-&gt;rate == 25000000)</div><div class='add'>+		req-&gt;rate = 25000000;</div><div class='add'>+	else if (WARN_ON(req-&gt;rate &lt; 75000000))</div><div class='add'>+		req-&gt;rate = 25000000;</div><div class='add'>+	else if (WARN_ON(req-&gt;rate &lt; 125000000))</div><div class='add'>+		req-&gt;rate = 125000000;</div><div class='add'>+	else if (req-&gt;rate == 125000000)</div><div class='add'>+		req-&gt;rate = 125000000;</div><div class='add'>+	else if (WARN_ON(req-&gt;rate &gt; 125000000))</div><div class='add'>+		req-&gt;rate = 125000000;</div><div class='add'>+	else</div><div class='add'>+		req-&gt;rate = 125000000;</div><div class='ctx'> </div><div class='del'>-	return 125000000;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int fu540_macb_tx_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='ctx'> 				  unsigned long parent_rate)</div><div class='ctx'> {</div><div class='del'>-	rate = fu540_macb_tx_round_rate(hw, rate, &amp;parent_rate);</div><div class='del'>-	if (rate != 125000000)</div><div class='add'>+	struct clk_rate_request req;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	clk_hw_init_rate_request(hw, &amp;req, rate);</div><div class='add'>+	ret = fu540_macb_tx_determine_rate(hw, &amp;req);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (req.rate != 125000000)</div><div class='ctx'> 		iowrite32(1, mgmt-&gt;reg);</div><div class='ctx'> 	else</div><div class='ctx'> 		iowrite32(0, mgmt-&gt;reg);</div><div class='hunk'>@@ -4685,7 +5072,7 @@ static int fu540_macb_tx_set_rate(struct clk_hw *hw, unsigned long rate,</div><div class='ctx'> </div><div class='ctx'> static const struct clk_ops fu540_c000_ops = {</div><div class='ctx'> 	.recalc_rate = fu540_macb_tx_recalc_rate,</div><div class='del'>-	.round_rate = fu540_macb_tx_round_rate,</div><div class='add'>+	.determine_rate = fu540_macb_tx_determine_rate,</div><div class='ctx'> 	.set_rate = fu540_macb_tx_set_rate,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -4754,13 +5141,13 @@ static int init_reset_optional(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	if (bp-&gt;phy_interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='ctx'> 		/* Ensure PHY device used in SGMII mode is ready */</div><div class='del'>-		bp-&gt;sgmii_phy = devm_phy_optional_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+		bp-&gt;phy = devm_phy_optional_get(&amp;pdev-&gt;dev, NULL);</div><div class='ctx'> </div><div class='del'>-		if (IS_ERR(bp-&gt;sgmii_phy))</div><div class='del'>-			return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(bp-&gt;sgmii_phy),</div><div class='add'>+		if (IS_ERR(bp-&gt;phy))</div><div class='add'>+			return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(bp-&gt;phy),</div><div class='ctx'> 					     "failed to get SGMII PHY\n");</div><div class='ctx'> </div><div class='del'>-		ret = phy_init(bp-&gt;sgmii_phy);</div><div class='add'>+		ret = phy_init(bp-&gt;phy);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return dev_err_probe(&amp;pdev-&gt;dev, ret,</div><div class='ctx'> 					     "failed to init SGMII PHY\n");</div><div class='hunk'>@@ -4789,7 +5176,7 @@ static int init_reset_optional(struct platform_device *pdev)</div><div class='ctx'> 	/* Fully reset controller at hardware level if mapped in device tree */</div><div class='ctx'> 	ret = device_reset_optional(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		phy_exit(bp-&gt;sgmii_phy);</div><div class='add'>+		phy_exit(bp-&gt;phy);</div><div class='ctx'> 		return dev_err_probe(&amp;pdev-&gt;dev, ret, "failed to reset controller");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4797,8 +5184,30 @@ static int init_reset_optional(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> err_out_phy_exit:</div><div class='ctx'> 	if (ret)</div><div class='del'>-		phy_exit(bp-&gt;sgmii_phy);</div><div class='add'>+		phy_exit(bp-&gt;phy);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int eyeq5_init(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = platform_get_drvdata(pdev);</div><div class='add'>+	struct macb *bp = netdev_priv(netdev);</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	bp-&gt;phy = devm_phy_get(dev, NULL);</div><div class='add'>+	if (IS_ERR(bp-&gt;phy))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(bp-&gt;phy),</div><div class='add'>+				     "failed to get PHY\n");</div><div class='add'>+</div><div class='add'>+	ret = phy_init(bp-&gt;phy);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "failed to init PHY\n");</div><div class='ctx'> </div><div class='add'>+	ret = macb_init(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		phy_exit(bp-&gt;phy);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4926,6 +5335,7 @@ static const struct macb_config mpfs_config = {</div><div class='ctx'> </div><div class='ctx'> static const struct macb_config sama7g5_gem_config = {</div><div class='ctx'> 	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG |</div><div class='add'>+		MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII |</div><div class='ctx'> 		MACB_CAPS_MIIONRGMII | MACB_CAPS_GEM_HAS_PTP,</div><div class='ctx'> 	.dma_burst_length = 16,</div><div class='ctx'> 	.clk_init = macb_clk_init,</div><div class='hunk'>@@ -4945,8 +5355,9 @@ static const struct macb_config sama7g5_emac_config = {</div><div class='ctx'> </div><div class='ctx'> static const struct macb_config versal_config = {</div><div class='ctx'> 	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |</div><div class='del'>-		MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH | MACB_CAPS_NEED_TSUCLK |</div><div class='del'>-		MACB_CAPS_QUEUE_DISABLE,</div><div class='add'>+		MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH |</div><div class='add'>+		MACB_CAPS_NEED_TSUCLK | MACB_CAPS_QUEUE_DISABLE |</div><div class='add'>+		MACB_CAPS_QBV,</div><div class='ctx'> 	.dma_burst_length = 16,</div><div class='ctx'> 	.clk_init = macb_clk_init,</div><div class='ctx'> 	.init = init_reset_optional,</div><div class='hunk'>@@ -4954,6 +5365,28 @@ static const struct macb_config versal_config = {</div><div class='ctx'> 	.usrio = &amp;macb_default_usrio,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct macb_config eyeq5_config = {</div><div class='add'>+	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |</div><div class='add'>+		MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_QUEUE_DISABLE |</div><div class='add'>+		MACB_CAPS_NO_LSO,</div><div class='add'>+	.dma_burst_length = 16,</div><div class='add'>+	.clk_init = macb_clk_init,</div><div class='add'>+	.init = eyeq5_init,</div><div class='add'>+	.jumbo_max_len = 10240,</div><div class='add'>+	.usrio = &amp;macb_default_usrio,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct macb_config raspberrypi_rp1_config = {</div><div class='add'>+	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG |</div><div class='add'>+		MACB_CAPS_JUMBO |</div><div class='add'>+		MACB_CAPS_GEM_HAS_PTP,</div><div class='add'>+	.dma_burst_length = 16,</div><div class='add'>+	.clk_init = macb_clk_init,</div><div class='add'>+	.init = macb_init,</div><div class='add'>+	.usrio = &amp;macb_default_usrio,</div><div class='add'>+	.jumbo_max_len = 10240,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct of_device_id macb_dt_ids[] = {</div><div class='ctx'> 	{ .compatible = "cdns,at91sam9260-macb", .data = &amp;at91sam9260_config },</div><div class='ctx'> 	{ .compatible = "cdns,macb" },</div><div class='hunk'>@@ -4974,6 +5407,8 @@ static const struct of_device_id macb_dt_ids[] = {</div><div class='ctx'> 	{ .compatible = "microchip,mpfs-macb", .data = &amp;mpfs_config },</div><div class='ctx'> 	{ .compatible = "microchip,sama7g5-gem", .data = &amp;sama7g5_gem_config },</div><div class='ctx'> 	{ .compatible = "microchip,sama7g5-emac", .data = &amp;sama7g5_emac_config },</div><div class='add'>+	{ .compatible = "mobileye,eyeq5-gem", .data = &amp;eyeq5_config },</div><div class='add'>+	{ .compatible = "raspberrypi,rp1-gem", .data = &amp;raspberrypi_rp1_config },</div><div class='ctx'> 	{ .compatible = "xlnx,zynqmp-gem", .data = &amp;zynqmp_config},</div><div class='ctx'> 	{ .compatible = "xlnx,zynq-gem", .data = &amp;zynq_config },</div><div class='ctx'> 	{ .compatible = "xlnx,versal-gem", .data = &amp;versal_config},</div><div class='hunk'>@@ -4996,21 +5431,17 @@ static const struct macb_config default_gem_config = {</div><div class='ctx'> static int macb_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct macb_config *macb_config = &amp;default_gem_config;</div><div class='del'>-	int (*clk_init)(struct platform_device *, struct clk **,</div><div class='del'>-			struct clk **, struct clk **,  struct clk **,</div><div class='del'>-			struct clk **) = macb_config-&gt;clk_init;</div><div class='del'>-	int (*init)(struct platform_device *) = macb_config-&gt;init;</div><div class='ctx'> 	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='ctx'> 	struct clk *pclk, *hclk = NULL, *tx_clk = NULL, *rx_clk = NULL;</div><div class='ctx'> 	struct clk *tsu_clk = NULL;</div><div class='del'>-	unsigned int queue_mask, num_queues;</div><div class='del'>-	bool native_io;</div><div class='ctx'> 	phy_interface_t interface;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct resource *regs;</div><div class='ctx'> 	u32 wtrmrk_rst_val;</div><div class='ctx'> 	void __iomem *mem;</div><div class='ctx'> 	struct macb *bp;</div><div class='add'>+	int num_queues;</div><div class='add'>+	bool native_io;</div><div class='ctx'> 	int err, val;</div><div class='ctx'> </div><div class='ctx'> 	mem = devm_platform_get_and_ioremap_resource(pdev, 0, &amp;regs);</div><div class='hunk'>@@ -5021,14 +5452,11 @@ static int macb_probe(struct platform_device *pdev)</div><div class='ctx'> 		const struct of_device_id *match;</div><div class='ctx'> </div><div class='ctx'> 		match = of_match_node(macb_dt_ids, np);</div><div class='del'>-		if (match &amp;&amp; match-&gt;data) {</div><div class='add'>+		if (match &amp;&amp; match-&gt;data)</div><div class='ctx'> 			macb_config = match-&gt;data;</div><div class='del'>-			clk_init = macb_config-&gt;clk_init;</div><div class='del'>-			init = macb_config-&gt;init;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = clk_init(pdev, &amp;pclk, &amp;hclk, &amp;tx_clk, &amp;rx_clk, &amp;tsu_clk);</div><div class='add'>+	err = macb_config-&gt;clk_init(pdev, &amp;pclk, &amp;hclk, &amp;tx_clk, &amp;rx_clk, &amp;tsu_clk);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -5039,7 +5467,12 @@ static int macb_probe(struct platform_device *pdev)</div><div class='ctx'> 	pm_runtime_enable(&amp;pdev-&gt;dev);</div><div class='ctx'> 	native_io = hw_is_native_io(mem);</div><div class='ctx'> </div><div class='del'>-	macb_probe_queues(mem, native_io, &amp;queue_mask, &amp;num_queues);</div><div class='add'>+	num_queues = macb_probe_queues(&amp;pdev-&gt;dev, mem, native_io);</div><div class='add'>+	if (num_queues &lt; 0) {</div><div class='add'>+		err = num_queues;</div><div class='add'>+		goto err_disable_clocks;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	dev = alloc_etherdev_mq(sizeof(*bp), num_queues);</div><div class='ctx'> 	if (!dev) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -5063,16 +5496,13 @@ static int macb_probe(struct platform_device *pdev)</div><div class='ctx'> 		bp-&gt;macb_reg_writel = hw_writel;</div><div class='ctx'> 	}</div><div class='ctx'> 	bp-&gt;num_queues = num_queues;</div><div class='del'>-	bp-&gt;queue_mask = queue_mask;</div><div class='del'>-	if (macb_config)</div><div class='del'>-		bp-&gt;dma_burst_length = macb_config-&gt;dma_burst_length;</div><div class='add'>+	bp-&gt;dma_burst_length = macb_config-&gt;dma_burst_length;</div><div class='ctx'> 	bp-&gt;pclk = pclk;</div><div class='ctx'> 	bp-&gt;hclk = hclk;</div><div class='ctx'> 	bp-&gt;tx_clk = tx_clk;</div><div class='ctx'> 	bp-&gt;rx_clk = rx_clk;</div><div class='ctx'> 	bp-&gt;tsu_clk = tsu_clk;</div><div class='del'>-	if (macb_config)</div><div class='del'>-		bp-&gt;jumbo_max_len = macb_config-&gt;jumbo_max_len;</div><div class='add'>+	bp-&gt;jumbo_max_len = macb_config-&gt;jumbo_max_len;</div><div class='ctx'> </div><div class='ctx'> 	if (!hw_is_gem(bp-&gt;regs, bp-&gt;native_io))</div><div class='ctx'> 		bp-&gt;max_tx_length = MACB_MAX_TX_LEN;</div><div class='hunk'>@@ -5106,14 +5536,19 @@ static int macb_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_lock_init(&amp;bp-&gt;lock);</div><div class='add'>+	spin_lock_init(&amp;bp-&gt;stats_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* setup capabilities */</div><div class='ctx'> 	macb_configure_caps(bp, macb_config);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='ctx'> 	if (GEM_BFEXT(DAW64, gem_readl(bp, DCFG6))) {</div><div class='del'>-		dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(44));</div><div class='del'>-		bp-&gt;hw_dma_cap |= HW_DMA_CAP_64B;</div><div class='add'>+		err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(44));</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "failed to set DMA mask\n");</div><div class='add'>+			goto err_out_free_netdev;</div><div class='add'>+		}</div><div class='add'>+		bp-&gt;caps |= MACB_CAPS_DMA_64B;</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	platform_set_drvdata(pdev, dev);</div><div class='hunk'>@@ -5161,7 +5596,7 @@ static int macb_probe(struct platform_device *pdev)</div><div class='ctx'> 		bp-&gt;phy_interface = interface;</div><div class='ctx'> </div><div class='ctx'> 	/* IP specific init */</div><div class='del'>-	err = init(pdev);</div><div class='add'>+	err = macb_config-&gt;init(pdev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_out_free_netdev;</div><div class='ctx'> </div><div class='hunk'>@@ -5183,7 +5618,6 @@ static int macb_probe(struct platform_device *pdev)</div><div class='ctx'> 		    macb_is_gem(bp) ? "GEM" : "MACB", macb_readl(bp, MID),</div><div class='ctx'> 		    dev-&gt;base_addr, dev-&gt;irq, dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(&amp;bp-&gt;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(&amp;bp-&gt;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -5193,7 +5627,7 @@ err_out_unregister_mdio:</div><div class='ctx'> 	mdiobus_free(bp-&gt;mii_bus);</div><div class='ctx'> </div><div class='ctx'> err_out_phy_exit:</div><div class='del'>-	phy_exit(bp-&gt;sgmii_phy);</div><div class='add'>+	phy_exit(bp-&gt;phy);</div><div class='ctx'> </div><div class='ctx'> err_out_free_netdev:</div><div class='ctx'> 	free_netdev(dev);</div><div class='hunk'>@@ -5216,19 +5650,16 @@ static void macb_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	if (dev) {</div><div class='ctx'> 		bp = netdev_priv(dev);</div><div class='del'>-		phy_exit(bp-&gt;sgmii_phy);</div><div class='add'>+		unregister_netdev(dev);</div><div class='add'>+		phy_exit(bp-&gt;phy);</div><div class='ctx'> 		mdiobus_unregister(bp-&gt;mii_bus);</div><div class='ctx'> 		mdiobus_free(bp-&gt;mii_bus);</div><div class='ctx'> </div><div class='del'>-		unregister_netdev(dev);</div><div class='add'>+		device_set_wakeup_enable(&amp;bp-&gt;pdev-&gt;dev, 0);</div><div class='ctx'> 		cancel_work_sync(&amp;bp-&gt;hresp_err_bh_work);</div><div class='ctx'> 		pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='ctx'> 		pm_runtime_dont_use_autosuspend(&amp;pdev-&gt;dev);</div><div class='del'>-		if (!pm_runtime_suspended(&amp;pdev-&gt;dev)) {</div><div class='del'>-			macb_clks_disable(bp-&gt;pclk, bp-&gt;hclk, bp-&gt;tx_clk,</div><div class='del'>-					  bp-&gt;rx_clk, bp-&gt;tsu_clk);</div><div class='del'>-			pm_runtime_set_suspended(&amp;pdev-&gt;dev);</div><div class='del'>-		}</div><div class='add'>+		pm_runtime_set_suspended(&amp;pdev-&gt;dev);</div><div class='ctx'> 		phylink_destroy(bp-&gt;phylink);</div><div class='ctx'> 		free_netdev(dev);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5247,7 +5678,7 @@ static int __maybe_unused macb_suspend(struct device *dev)</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (!device_may_wakeup(&amp;bp-&gt;dev-&gt;dev))</div><div class='del'>-		phy_exit(bp-&gt;sgmii_phy);</div><div class='add'>+		phy_exit(bp-&gt;phy);</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(netdev))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -5268,6 +5699,11 @@ static int __maybe_unused macb_suspend(struct device *dev)</div><div class='ctx'> 		 */</div><div class='ctx'> 		tmp = macb_readl(bp, NCR);</div><div class='ctx'> 		macb_writel(bp, NCR, tmp &amp; ~(MACB_BIT(TE) | MACB_BIT(RE)));</div><div class='add'>+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='add'>+		if (!(bp-&gt;caps &amp; MACB_CAPS_QUEUE_DISABLE))</div><div class='add'>+			macb_writel(bp, RBQPH,</div><div class='add'>+				    upper_32_bits(bp-&gt;rx_ring_tieoff_dma));</div><div class='add'>+#endif</div><div class='ctx'> 		for (q = 0, queue = bp-&gt;queues; q &lt; bp-&gt;num_queues;</div><div class='ctx'> 		     ++q, ++queue) {</div><div class='ctx'> 			/* Disable RX queues */</div><div class='hunk'>@@ -5277,10 +5713,6 @@ static int __maybe_unused macb_suspend(struct device *dev)</div><div class='ctx'> 				/* Tie off RX queues */</div><div class='ctx'> 				queue_writel(queue, RBQP,</div><div class='ctx'> 					     lower_32_bits(bp-&gt;rx_ring_tieoff_dma));</div><div class='del'>-#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='del'>-				queue_writel(queue, RBQPH,</div><div class='del'>-					     upper_32_bits(bp-&gt;rx_ring_tieoff_dma));</div><div class='del'>-#endif</div><div class='ctx'> 			}</div><div class='ctx'> 			/* Disable all interrupts */</div><div class='ctx'> 			queue_writel(queue, IDR, -1);</div><div class='hunk'>@@ -5375,7 +5807,7 @@ static int __maybe_unused macb_resume(struct device *dev)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!device_may_wakeup(&amp;bp-&gt;dev-&gt;dev))</div><div class='del'>-		phy_init(bp-&gt;sgmii_phy);</div><div class='add'>+		phy_init(bp-&gt;phy);</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(netdev))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -5479,6 +5911,20 @@ static int __maybe_unused macb_runtime_resume(struct device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void macb_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev))</div><div class='add'>+		dev_close(netdev);</div><div class='add'>+</div><div class='add'>+	netif_device_detach(netdev);</div><div class='add'>+</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct dev_pm_ops macb_pm_ops = {</div><div class='ctx'> 	SET_SYSTEM_SLEEP_PM_OPS(macb_suspend, macb_resume)</div><div class='ctx'> 	SET_RUNTIME_PM_OPS(macb_runtime_suspend, macb_runtime_resume, NULL)</div><div class='hunk'>@@ -5492,6 +5938,7 @@ static struct platform_driver macb_driver = {</div><div class='ctx'> 		.of_match_table	= of_match_ptr(macb_dt_ids),</div><div class='ctx'> 		.pm	= &amp;macb_pm_ops,</div><div class='ctx'> 	},</div><div class='add'>+	.shutdown	= macb_shutdown,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_platform_driver(macb_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/cadence/macb_ptp.c b/drivers/net/ethernet/cadence/macb_ptp.c<br/>index a63bf29c4fa8..c9e77819196e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cadence/macb_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cadence/macb_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cadence/macb_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cadence/macb_ptp.c</a></div><div class='hunk'>@@ -28,14 +28,16 @@</div><div class='ctx'> static struct macb_dma_desc_ptp *macb_ptp_desc(struct macb *bp,</div><div class='ctx'> 					       struct macb_dma_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	if (bp-&gt;hw_dma_cap == HW_DMA_CAP_PTP)</div><div class='del'>-		return (struct macb_dma_desc_ptp *)</div><div class='del'>-				((u8 *)desc + sizeof(struct macb_dma_desc));</div><div class='del'>-	if (bp-&gt;hw_dma_cap == HW_DMA_CAP_64B_PTP)</div><div class='add'>+	if (!macb_dma_ptp(bp))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (macb_dma64(bp))</div><div class='ctx'> 		return (struct macb_dma_desc_ptp *)</div><div class='ctx'> 				((u8 *)desc + sizeof(struct macb_dma_desc)</div><div class='ctx'> 				+ sizeof(struct macb_dma_desc_64));</div><div class='del'>-	return NULL;</div><div class='add'>+	else</div><div class='add'>+		return (struct macb_dma_desc_ptp *)</div><div class='add'>+				((u8 *)desc + sizeof(struct macb_dma_desc));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gem_tsu_get_time(struct ptp_clock_info *ptp, struct timespec64 *ts,</div><div class='hunk'>@@ -380,7 +382,7 @@ int gem_get_hwtst(struct net_device *dev,</div><div class='ctx'> 	struct macb *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	*tstamp_config = bp-&gt;tstamp_config;</div><div class='del'>-	if ((bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_PTP) == 0)</div><div class='add'>+	if (!macb_dma_ptp(bp))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -407,7 +409,7 @@ int gem_set_hwtst(struct net_device *dev,</div><div class='ctx'> 	struct macb *bp = netdev_priv(dev);</div><div class='ctx'> 	u32 regval;</div><div class='ctx'> </div><div class='del'>-	if ((bp-&gt;hw_dma_cap &amp; HW_DMA_CAP_PTP) == 0)</div><div class='add'>+	if (!macb_dma_ptp(bp))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (tstamp_config-&gt;tx_type) {</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/Kconfig b/drivers/net/ethernet/cavium/Kconfig<br/>index ca742cc146d7..7dae5aad3689 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/Kconfig</a></div><div class='hunk'>@@ -70,8 +70,8 @@ config LIQUIDIO</div><div class='ctx'> 	depends on 64BIT &amp;&amp; PCI</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select CRC32</div><div class='ctx'> 	select FW_LOADER</div><div class='del'>-	select LIBCRC32C</div><div class='ctx'> 	select LIQUIDIO_CORE</div><div class='ctx'> 	select NET_DEVLINK</div><div class='ctx'> 	help</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/common/cavium_ptp.c b/drivers/net/ethernet/cavium/common/cavium_ptp.c<br/>index 9fd717b9cf69..61e261657073 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/common/cavium_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/common/cavium_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/common/cavium_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/common/cavium_ptp.c</a></div><div class='hunk'>@@ -209,7 +209,7 @@ static int cavium_ptp_enable(struct ptp_clock_info *ptp_info,</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 cavium_ptp_cc_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 cavium_ptp_cc_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct cavium_ptp *clock =</div><div class='ctx'> 		container_of(cc, struct cavium_ptp, cycle_counter);</div><div class='hunk'>@@ -239,12 +239,11 @@ static int cavium_ptp_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto error_free;</div><div class='ctx'> </div><div class='del'>-	err = pcim_iomap_regions(pdev, 1 &lt;&lt; PCI_PTP_BAR_NO, pci_name(pdev));</div><div class='add'>+	clock-&gt;reg_base = pcim_iomap_region(pdev, PCI_PTP_BAR_NO, pci_name(pdev));</div><div class='add'>+	err = PTR_ERR_OR_ZERO(clock-&gt;reg_base);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto error_free;</div><div class='ctx'> </div><div class='del'>-	clock-&gt;reg_base = pcim_iomap_table(pdev)[PCI_PTP_BAR_NO];</div><div class='del'>-</div><div class='ctx'> 	spin_lock_init(&amp;clock-&gt;spin_lock);</div><div class='ctx'> </div><div class='ctx'> 	cc = &amp;clock-&gt;cycle_counter;</div><div class='hunk'>@@ -292,7 +291,7 @@ error_stop:</div><div class='ctx'> 	clock_cfg = readq(clock-&gt;reg_base + PTP_CLOCK_CFG);</div><div class='ctx'> 	clock_cfg &amp;= ~PTP_CLOCK_CFG_PTP_EN;</div><div class='ctx'> 	writeq(clock_cfg, clock-&gt;reg_base + PTP_CLOCK_CFG);</div><div class='del'>-	pcim_iounmap_regions(pdev, 1 &lt;&lt; PCI_PTP_BAR_NO);</div><div class='add'>+	pcim_iounmap_region(pdev, PCI_PTP_BAR_NO);</div><div class='ctx'> </div><div class='ctx'> error_free:</div><div class='ctx'> 	devm_kfree(dev, clock);</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c b/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c<br/>index 9ad49aea2673..75f22f74774c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c</a></div><div class='hunk'>@@ -49,7 +49,7 @@ static int cn23xx_pf_soft_reset(struct octeon_device *oct)</div><div class='ctx'> 	lio_pci_readq(oct, CN23XX_RST_SOFT_RST);</div><div class='ctx'> 	lio_pci_writeq(oct, 1, CN23XX_RST_SOFT_RST);</div><div class='ctx'> </div><div class='del'>-	/* Wait for 100ms as Octeon resets. */</div><div class='add'>+	/* Wait for 100ms as Octeon resets */</div><div class='ctx'> 	mdelay(100);</div><div class='ctx'> </div><div class='ctx'> 	if (octeon_read_csr64(oct, CN23XX_SLI_SCRATCH1)) {</div><div class='hunk'>@@ -61,7 +61,7 @@ static int cn23xx_pf_soft_reset(struct octeon_device *oct)</div><div class='ctx'> 	dev_dbg(&amp;oct-&gt;pci_dev-&gt;dev, "OCTEON[%d]: Reset completed\n",</div><div class='ctx'> 		oct-&gt;octeon_id);</div><div class='ctx'> </div><div class='del'>-	/* restore the  reset value*/</div><div class='add'>+	/* Restore the reset value */</div><div class='ctx'> 	octeon_write_csr64(oct, CN23XX_WIN_WR_MASK_REG, 0xFF);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -121,7 +121,7 @@ u32 cn23xx_pf_get_oq_ticks(struct octeon_device *oct, u32 time_intr_in_us)</div><div class='ctx'> 	oqticks_per_us /= 1024;</div><div class='ctx'> </div><div class='ctx'> 	/* time_intr is in microseconds. The next 2 steps gives the oq ticks</div><div class='del'>-	 *  corressponding to time_intr.</div><div class='add'>+	 * corresponding to time_intr.</div><div class='ctx'> 	 */</div><div class='ctx'> 	oqticks_per_us *= time_intr_in_us;</div><div class='ctx'> 	oqticks_per_us /= 1000;</div><div class='hunk'>@@ -136,11 +136,11 @@ static void cn23xx_setup_global_mac_regs(struct octeon_device *oct)</div><div class='ctx'> 	u64 reg_val;</div><div class='ctx'> 	u64 temp;</div><div class='ctx'> </div><div class='del'>-	/* programming SRN and TRS for each MAC(0..3)  */</div><div class='add'>+	/* Programming SRN and TRS for each MAC(0..3) */</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;oct-&gt;pci_dev-&gt;dev, "%s:Using pcie port %d\n",</div><div class='ctx'> 		__func__, mac_no);</div><div class='del'>-	/* By default, mapping all 64 IOQs to  a single MACs */</div><div class='add'>+	/* By default, map all 64 IOQs to a single MAC */</div><div class='ctx'> </div><div class='ctx'> 	reg_val =</div><div class='ctx'> 	    octeon_read_csr64(oct, CN23XX_SLI_PKT_MAC_RINFO64(mac_no, pf_num));</div><div class='hunk'>@@ -164,7 +164,7 @@ static void cn23xx_setup_global_mac_regs(struct octeon_device *oct)</div><div class='ctx'> 	temp = oct-&gt;sriov_info.max_vfs &amp; 0xff;</div><div class='ctx'> 	reg_val |= (temp &lt;&lt; CN23XX_PKT_MAC_CTL_RINFO_NVFS_BIT_POS);</div><div class='ctx'> </div><div class='del'>-	/* write these settings to MAC register */</div><div class='add'>+	/* Write these settings to MAC register */</div><div class='ctx'> 	octeon_write_csr64(oct, CN23XX_SLI_PKT_MAC_RINFO64(mac_no, pf_num),</div><div class='ctx'> 			   reg_val);</div><div class='ctx'> </div><div class='hunk'>@@ -183,10 +183,10 @@ static int cn23xx_reset_io_queues(struct octeon_device *oct)</div><div class='ctx'> 	srn = oct-&gt;sriov_info.pf_srn;</div><div class='ctx'> 	ern = srn + oct-&gt;sriov_info.num_pf_rings;</div><div class='ctx'> </div><div class='del'>-	/*As per HRM reg description, s/w cant write 0 to ENB. */</div><div class='del'>-	/*to make the queue off, need to set the RST bit. */</div><div class='add'>+	/* As per HRM reg description, s/w can't write 0 to ENB. */</div><div class='add'>+	/* We need to set the RST bit, to turn the queue off. */</div><div class='ctx'> </div><div class='del'>-	/* Reset the Enable bit for all the 64 IQs.  */</div><div class='add'>+	/* Reset the enable bit for all the 64 IQs. */</div><div class='ctx'> 	for (q_no = srn; q_no &lt; ern; q_no++) {</div><div class='ctx'> 		/* set RST bit to 1. This bit applies to both IQ and OQ */</div><div class='ctx'> 		d64 = octeon_read_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no));</div><div class='hunk'>@@ -194,7 +194,7 @@ static int cn23xx_reset_io_queues(struct octeon_device *oct)</div><div class='ctx'> 		octeon_write_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no), d64);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*wait until the RST bit is clear or the RST and quite bits are set*/</div><div class='add'>+	/* Wait until the RST bit is clear or the RST and quiet bits are set */</div><div class='ctx'> 	for (q_no = srn; q_no &lt; ern; q_no++) {</div><div class='ctx'> 		u64 reg_val = octeon_read_csr64(oct,</div><div class='ctx'> 					CN23XX_SLI_IQ_PKT_CONTROL64(q_no));</div><div class='hunk'>@@ -245,15 +245,15 @@ static int cn23xx_pf_setup_global_input_regs(struct octeon_device *oct)</div><div class='ctx'> 	if (cn23xx_reset_io_queues(oct))</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	/** Set the MAC_NUM and PVF_NUM in IQ_PKT_CONTROL reg</div><div class='del'>-	 * for all queues.Only PF can set these bits.</div><div class='add'>+	/* Set the MAC_NUM and PVF_NUM in IQ_PKT_CONTROL reg</div><div class='add'>+	 * for all queues. Only PF can set these bits.</div><div class='ctx'> 	 * bits 29:30 indicate the MAC num.</div><div class='ctx'> 	 * bits 32:47 indicate the PVF num.</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (q_no = 0; q_no &lt; ern; q_no++) {</div><div class='ctx'> 		reg_val = (u64)oct-&gt;pcie_port &lt;&lt; CN23XX_PKT_INPUT_CTL_MAC_NUM_POS;</div><div class='ctx'> </div><div class='del'>-		/* for VF assigned queues. */</div><div class='add'>+		/* For VF assigned queues. */</div><div class='ctx'> 		if (q_no &lt; oct-&gt;sriov_info.pf_srn) {</div><div class='ctx'> 			vf_num = q_no / oct-&gt;sriov_info.rings_per_vf;</div><div class='ctx'> 			vf_num += 1; /* VF1, VF2,........ */</div><div class='hunk'>@@ -268,7 +268,7 @@ static int cn23xx_pf_setup_global_input_regs(struct octeon_device *oct)</div><div class='ctx'> 				   reg_val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Select ES, RO, NS, RDSIZE,DPTR Fomat#0 for</div><div class='add'>+	/* Select ES, RO, NS, RDSIZE,DPTR Format#0 for</div><div class='ctx'> 	 * pf queues</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (q_no = srn; q_no &lt; ern; q_no++) {</div><div class='hunk'>@@ -289,7 +289,7 @@ static int cn23xx_pf_setup_global_input_regs(struct octeon_device *oct)</div><div class='ctx'> 		octeon_write_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no),</div><div class='ctx'> 				   reg_val);</div><div class='ctx'> </div><div class='del'>-		/* Set WMARK level for triggering PI_INT */</div><div class='add'>+		/* Set WMARK level to trigger PI_INT */</div><div class='ctx'> 		/* intr_threshold = CN23XX_DEF_IQ_INTR_THRESHOLD &amp; */</div><div class='ctx'> 		intr_threshold = CFG_GET_IQ_INTR_PKT(cn23xx-&gt;conf) &amp;</div><div class='ctx'> 				 CN23XX_PKT_IN_DONE_WMARK_MASK;</div><div class='hunk'>@@ -354,7 +354,7 @@ static void cn23xx_pf_setup_global_output_regs(struct octeon_device *oct)</div><div class='ctx'> 		/* set the ES bit */</div><div class='ctx'> 		reg_val |= (CN23XX_PKT_OUTPUT_CTL_ES);</div><div class='ctx'> </div><div class='del'>-		/* write all the selected settings */</div><div class='add'>+		/* Write all the selected settings */</div><div class='ctx'> 		octeon_write_csr(oct, CN23XX_SLI_OQ_PKT_CONTROL(q_no), reg_val);</div><div class='ctx'> </div><div class='ctx'> 		/* Enabling these interrupt in oct-&gt;fn_list.enable_interrupt()</div><div class='hunk'>@@ -373,7 +373,7 @@ static void cn23xx_pf_setup_global_output_regs(struct octeon_device *oct)</div><div class='ctx'> 	/** Setting the water mark level for pko back pressure **/</div><div class='ctx'> 	writeq(0x40, (u8 *)oct-&gt;mmio[0].hw_addr + CN23XX_SLI_OQ_WMARK);</div><div class='ctx'> </div><div class='del'>-	/** Disabling setting OQs in reset when ring has no dorebells</div><div class='add'>+	/* Disabling setting OQs in reset when ring has no doorbells</div><div class='ctx'> 	 * enabling this will cause of head of line blocking</div><div class='ctx'> 	 */</div><div class='ctx'> 	/* Do it only for pass1.1. and pass1.2 */</div><div class='hunk'>@@ -383,7 +383,7 @@ static void cn23xx_pf_setup_global_output_regs(struct octeon_device *oct)</div><div class='ctx'> 				     CN23XX_SLI_GBL_CONTROL) | 0x2,</div><div class='ctx'> 		       (u8 *)oct-&gt;mmio[0].hw_addr + CN23XX_SLI_GBL_CONTROL);</div><div class='ctx'> </div><div class='del'>-	/** Enable channel-level backpressure */</div><div class='add'>+	/** Enable channel-level backpressure **/</div><div class='ctx'> 	if (oct-&gt;pf_num)</div><div class='ctx'> 		writeq(0xffffffffffffffffULL,</div><div class='ctx'> 		       (u8 *)oct-&gt;mmio[0].hw_addr + CN23XX_SLI_OUT_BP_EN2_W1S);</div><div class='hunk'>@@ -396,7 +396,7 @@ static int cn23xx_setup_pf_device_regs(struct octeon_device *oct)</div><div class='ctx'> {</div><div class='ctx'> 	cn23xx_enable_error_reporting(oct);</div><div class='ctx'> </div><div class='del'>-	/* program the MAC(0..3)_RINFO before setting up input/output regs */</div><div class='add'>+	/* Program the MAC(0..3)_RINFO before setting up input/output regs */</div><div class='ctx'> 	cn23xx_setup_global_mac_regs(oct);</div><div class='ctx'> </div><div class='ctx'> 	if (cn23xx_pf_setup_global_input_regs(oct))</div><div class='hunk'>@@ -410,7 +410,7 @@ static int cn23xx_setup_pf_device_regs(struct octeon_device *oct)</div><div class='ctx'> 	octeon_write_csr64(oct, CN23XX_SLI_WINDOW_CTL,</div><div class='ctx'> 			   CN23XX_SLI_WINDOW_CTL_DEFAULT);</div><div class='ctx'> </div><div class='del'>-	/* set SLI_PKT_IN_JABBER to handle large VXLAN packets */</div><div class='add'>+	/* Set SLI_PKT_IN_JABBER to handle large VXLAN packets */</div><div class='ctx'> 	octeon_write_csr64(oct, CN23XX_SLI_PKT_IN_JABBER, CN23XX_INPUT_JABBER);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -574,7 +574,7 @@ static int cn23xx_setup_pf_mbox(struct octeon_device *oct)</div><div class='ctx'> 		mbox-&gt;mbox_read_reg = (u8 *)oct-&gt;mmio[0].hw_addr +</div><div class='ctx'> 				      CN23XX_SLI_PKT_PF_VF_MBOX_SIG(q_no, 1);</div><div class='ctx'> </div><div class='del'>-		/*Mail Box Thread creation*/</div><div class='add'>+		/* Mail Box Thread creation */</div><div class='ctx'> 		INIT_DELAYED_WORK(&amp;mbox-&gt;mbox_poll_wk.work,</div><div class='ctx'> 				  cn23xx_pf_mbox_thread);</div><div class='ctx'> 		mbox-&gt;mbox_poll_wk.ctxptr = (void *)mbox;</div><div class='hunk'>@@ -626,7 +626,7 @@ static int cn23xx_enable_io_queues(struct octeon_device *oct)</div><div class='ctx'> 	ern = srn + oct-&gt;num_iqs;</div><div class='ctx'> </div><div class='ctx'> 	for (q_no = srn; q_no &lt; ern; q_no++) {</div><div class='del'>-		/* set the corresponding IQ IS_64B bit */</div><div class='add'>+		/* Set the corresponding IQ IS_64B bit */</div><div class='ctx'> 		if (oct-&gt;io_qmask.iq64B &amp; BIT_ULL(q_no - srn)) {</div><div class='ctx'> 			reg_val = octeon_read_csr64(</div><div class='ctx'> 			    oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no));</div><div class='hunk'>@@ -635,7 +635,7 @@ static int cn23xx_enable_io_queues(struct octeon_device *oct)</div><div class='ctx'> 			    oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no), reg_val);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* set the corresponding IQ ENB bit */</div><div class='add'>+		/* Set the corresponding IQ ENB bit */</div><div class='ctx'> 		if (oct-&gt;io_qmask.iq &amp; BIT_ULL(q_no - srn)) {</div><div class='ctx'> 			/* IOQs are in reset by default in PEM2 mode,</div><div class='ctx'> 			 * clearing reset bit</div><div class='hunk'>@@ -681,7 +681,7 @@ static int cn23xx_enable_io_queues(struct octeon_device *oct)</div><div class='ctx'> 	}</div><div class='ctx'> 	for (q_no = srn; q_no &lt; ern; q_no++) {</div><div class='ctx'> 		u32 reg_val;</div><div class='del'>-		/* set the corresponding OQ ENB bit */</div><div class='add'>+		/* Set the corresponding OQ ENB bit */</div><div class='ctx'> 		if (oct-&gt;io_qmask.oq &amp; BIT_ULL(q_no - srn)) {</div><div class='ctx'> 			reg_val = octeon_read_csr(</div><div class='ctx'> 			    oct, CN23XX_SLI_OQ_PKT_CONTROL(q_no));</div><div class='hunk'>@@ -707,7 +707,7 @@ static void cn23xx_disable_io_queues(struct octeon_device *oct)</div><div class='ctx'> 	for (q_no = srn; q_no &lt; ern; q_no++) {</div><div class='ctx'> 		loop = HZ;</div><div class='ctx'> </div><div class='del'>-		/* start the Reset for a particular ring */</div><div class='add'>+		/* Start the Reset for a particular ring */</div><div class='ctx'> 		WRITE_ONCE(d64, octeon_read_csr64(</div><div class='ctx'> 			   oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no)));</div><div class='ctx'> 		WRITE_ONCE(d64, READ_ONCE(d64) &amp;</div><div class='hunk'>@@ -740,7 +740,7 @@ static void cn23xx_disable_io_queues(struct octeon_device *oct)</div><div class='ctx'> 		loop = HZ;</div><div class='ctx'> </div><div class='ctx'> 		/* Wait until hardware indicates that the particular IQ</div><div class='del'>-		 * is out of reset.It given that SLI_PKT_RING_RST is</div><div class='add'>+		 * is out of reset. Given that SLI_PKT_RING_RST is</div><div class='ctx'> 		 * common for both IQs and OQs</div><div class='ctx'> 		 */</div><div class='ctx'> 		WRITE_ONCE(d64, octeon_read_csr64(</div><div class='hunk'>@@ -760,7 +760,7 @@ static void cn23xx_disable_io_queues(struct octeon_device *oct)</div><div class='ctx'> 			schedule_timeout_uninterruptible(1);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* clear the SLI_PKT(0..63)_CNTS[CNT] reg value */</div><div class='add'>+		/* Clear the SLI_PKT(0..63)_CNTS[CNT] reg value */</div><div class='ctx'> 		WRITE_ONCE(d32, octeon_read_csr(</div><div class='ctx'> 					oct, CN23XX_SLI_OQ_PKTS_SENT(q_no)));</div><div class='ctx'> 		octeon_write_csr(oct, CN23XX_SLI_OQ_PKTS_SENT(q_no),</div><div class='hunk'>@@ -793,7 +793,7 @@ static u64 cn23xx_pf_msix_interrupt_handler(void *dev)</div><div class='ctx'> 	if (!pkts_sent || (pkts_sent == 0xFFFFFFFFFFFFFFFFULL))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	/* Write count reg in sli_pkt_cnts to clear these int.*/</div><div class='add'>+	/* Write count reg in sli_pkt_cnts to clear these int. */</div><div class='ctx'> 	if ((pkts_sent &amp; CN23XX_INTR_PO_INT) ||</div><div class='ctx'> 	    (pkts_sent &amp; CN23XX_INTR_PI_INT)) {</div><div class='ctx'> 		if (pkts_sent &amp; CN23XX_INTR_PO_INT)</div><div class='hunk'>@@ -908,7 +908,7 @@ static u32 cn23xx_bar1_idx_read(struct octeon_device *oct, u32 idx)</div><div class='ctx'> 	    oct, CN23XX_PEM_BAR1_INDEX_REG(oct-&gt;pcie_port, idx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* always call with lock held */</div><div class='add'>+/* Always call with lock held */</div><div class='ctx'> static u32 cn23xx_update_read_index(struct octeon_instr_queue *iq)</div><div class='ctx'> {</div><div class='ctx'> 	u32 new_idx;</div><div class='hunk'>@@ -919,7 +919,7 @@ static u32 cn23xx_update_read_index(struct octeon_instr_queue *iq)</div><div class='ctx'> 	iq-&gt;pkt_in_done = pkt_in_done;</div><div class='ctx'> </div><div class='ctx'> 	/* Modulo of the new index with the IQ size will give us</div><div class='del'>-	 * the new index.  The iq-&gt;reset_instr_cnt is always zero for</div><div class='add'>+	 * the new index. The iq-&gt;reset_instr_cnt is always zero for</div><div class='ctx'> 	 * cn23xx, so no extra adjustments are needed.</div><div class='ctx'> 	 */</div><div class='ctx'> 	new_idx = (iq-&gt;octeon_read_index +</div><div class='hunk'>@@ -934,8 +934,8 @@ static void cn23xx_enable_pf_interrupt(struct octeon_device *oct, u8 intr_flag)</div><div class='ctx'> 	struct octeon_cn23xx_pf *cn23xx = (struct octeon_cn23xx_pf *)oct-&gt;chip;</div><div class='ctx'> 	u64 intr_val = 0;</div><div class='ctx'> </div><div class='del'>-	/*  Divide the single write to multiple writes based on the flag. */</div><div class='del'>-	/* Enable Interrupt */</div><div class='add'>+	/* Divide the single write to multiple writes based on the flag. */</div><div class='add'>+	/* Enable Interrupts */</div><div class='ctx'> 	if (intr_flag == OCTEON_ALL_INTR) {</div><div class='ctx'> 		writeq(cn23xx-&gt;intr_mask64, cn23xx-&gt;intr_enb_reg64);</div><div class='ctx'> 	} else if (intr_flag &amp; OCTEON_OUTPUT_INTR) {</div><div class='hunk'>@@ -990,7 +990,7 @@ static int cn23xx_get_pf_num(struct octeon_device *oct)</div><div class='ctx'> </div><div class='ctx'> 	ret = 0;</div><div class='ctx'> </div><div class='del'>-	/** Read Function Dependency Link reg to get the function number */</div><div class='add'>+	/* Read Function Dependency Link reg to get the function number */</div><div class='ctx'> 	if (pci_read_config_dword(oct-&gt;pci_dev, CN23XX_PCIE_SRIOV_FDL,</div><div class='ctx'> 				  &amp;fdl_bit) == 0) {</div><div class='ctx'> 		oct-&gt;pf_num = ((fdl_bit &gt;&gt; CN23XX_PCIE_SRIOV_FDL_BIT_POS) &amp;</div><div class='hunk'>@@ -1003,13 +1003,13 @@ static int cn23xx_get_pf_num(struct octeon_device *oct)</div><div class='ctx'> 		 * In this case, read the PF number from the</div><div class='ctx'> 		 * SLI_PKT0_INPUT_CONTROL reg (written by f/w)</div><div class='ctx'> 		 */</div><div class='del'>-		pkt0_in_ctl = octeon_read_csr64(oct,</div><div class='del'>-						CN23XX_SLI_IQ_PKT_CONTROL64(0));</div><div class='add'>+		pkt0_in_ctl =</div><div class='add'>+			octeon_read_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(0));</div><div class='ctx'> 		pfnum = (pkt0_in_ctl &gt;&gt; CN23XX_PKT_INPUT_CTL_PF_NUM_POS) &amp;</div><div class='ctx'> 			CN23XX_PKT_INPUT_CTL_PF_NUM_MASK;</div><div class='ctx'> 		mac = (octeon_read_csr(oct, CN23XX_SLI_MAC_NUMBER)) &amp; 0xff;</div><div class='ctx'> </div><div class='del'>-		/* validate PF num by reading RINFO; f/w writes RINFO.trs == 1*/</div><div class='add'>+		/* Validate PF num by reading RINFO; f/w writes RINFO.trs == 1 */</div><div class='ctx'> 		d64 = octeon_read_csr64(oct,</div><div class='ctx'> 					CN23XX_SLI_PKT_MAC_RINFO64(mac, pfnum));</div><div class='ctx'> 		trs = (int)(d64 &gt;&gt; CN23XX_PKT_MAC_CTL_RINFO_TRS_BIT_POS) &amp; 0xff;</div><div class='hunk'>@@ -1208,53 +1208,14 @@ int setup_cn23xx_octeon_pf_device(struct octeon_device *oct)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(setup_cn23xx_octeon_pf_device);</div><div class='ctx'> </div><div class='del'>-int validate_cn23xx_pf_config_info(struct octeon_device *oct,</div><div class='del'>-				   struct octeon_config *conf23xx)</div><div class='del'>-{</div><div class='del'>-	if (CFG_GET_IQ_MAX_Q(conf23xx) &gt; CN23XX_MAX_INPUT_QUEUES) {</div><div class='del'>-		dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "%s: Num IQ (%d) exceeds Max (%d)\n",</div><div class='del'>-			__func__, CFG_GET_IQ_MAX_Q(conf23xx),</div><div class='del'>-			CN23XX_MAX_INPUT_QUEUES);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (CFG_GET_OQ_MAX_Q(conf23xx) &gt; CN23XX_MAX_OUTPUT_QUEUES) {</div><div class='del'>-		dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "%s: Num OQ (%d) exceeds Max (%d)\n",</div><div class='del'>-			__func__, CFG_GET_OQ_MAX_Q(conf23xx),</div><div class='del'>-			CN23XX_MAX_OUTPUT_QUEUES);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (CFG_GET_IQ_INSTR_TYPE(conf23xx) != OCTEON_32BYTE_INSTR &amp;&amp;</div><div class='del'>-	    CFG_GET_IQ_INSTR_TYPE(conf23xx) != OCTEON_64BYTE_INSTR) {</div><div class='del'>-		dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "%s: Invalid instr type for IQ\n",</div><div class='del'>-			__func__);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!CFG_GET_OQ_REFILL_THRESHOLD(conf23xx)) {</div><div class='del'>-		dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "%s: Invalid parameter for OQ\n",</div><div class='del'>-			__func__);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(CFG_GET_OQ_INTR_TIME(conf23xx))) {</div><div class='del'>-		dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "%s: Invalid parameter for OQ\n",</div><div class='del'>-			__func__);</div><div class='del'>-		return 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int cn23xx_fw_loaded(struct octeon_device *oct)</div><div class='ctx'> {</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='ctx'> 	/* If there's more than one active PF on this NIC, then that</div><div class='del'>-	 * implies that the NIC firmware is loaded and running.  This check</div><div class='add'>+	 * implies that the NIC firmware is loaded and running. This check</div><div class='ctx'> 	 * prevents a rare false negative that might occur if we only relied</div><div class='del'>-	 * on checking the SCR2_BIT_FW_LOADED flag.  The false negative would</div><div class='add'>+	 * on checking the SCR2_BIT_FW_LOADED flag. The false negative would</div><div class='ctx'> 	 * happen if the PF driver sees SCR2_BIT_FW_LOADED as cleared even</div><div class='ctx'> 	 * though the firmware was already loaded but still booting and has yet</div><div class='ctx'> 	 * to set SCR2_BIT_FW_LOADED.</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.h b/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.h<br/>index 234b96b4f488..bbe9f3133b07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.h</a></div><div class='hunk'>@@ -54,9 +54,6 @@ struct oct_vf_stats {</div><div class='ctx'> </div><div class='ctx'> int setup_cn23xx_octeon_pf_device(struct octeon_device *oct);</div><div class='ctx'> </div><div class='del'>-int validate_cn23xx_pf_config_info(struct octeon_device *oct,</div><div class='del'>-				   struct octeon_config *conf23xx);</div><div class='del'>-</div><div class='ctx'> u32 cn23xx_pf_get_oq_ticks(struct octeon_device *oct, u32 time_intr_in_us);</div><div class='ctx'> </div><div class='ctx'> int cn23xx_sriov_config(struct octeon_device *oct);</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/lio_core.c b/drivers/net/ethernet/cavium/liquidio/lio_core.c<br/>index 674c54831875..215dac201b4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/lio_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/lio_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/lio_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/lio_core.c</a></div><div class='hunk'>@@ -472,7 +472,7 @@ int setup_rx_oom_poll_fn(struct net_device *netdev)</div><div class='ctx'> 		q_no = lio-&gt;linfo.rxpciq[q].s.q_no;</div><div class='ctx'> 		wq = &amp;lio-&gt;rxq_status_wq[q_no];</div><div class='ctx'> 		wq-&gt;wq = alloc_workqueue("rxq-oom-status",</div><div class='del'>-					 WQ_MEM_RECLAIM, 0);</div><div class='add'>+					 WQ_MEM_RECLAIM | WQ_PERCPU, 0);</div><div class='ctx'> 		if (!wq-&gt;wq) {</div><div class='ctx'> 			dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "unable to create cavium rxq oom status wq\n");</div><div class='ctx'> 			return -ENOMEM;</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/lio_main.c b/drivers/net/ethernet/cavium/liquidio/lio_main.c<br/>index 1d79f6eaa41f..0732440eeacd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/lio_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/lio_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/lio_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/lio_main.c</a></div><div class='hunk'>@@ -526,7 +526,8 @@ static inline int setup_link_status_change_wq(struct net_device *netdev)</div><div class='ctx'> 	struct octeon_device *oct = lio-&gt;oct_dev;</div><div class='ctx'> </div><div class='ctx'> 	lio-&gt;link_status_wq.wq = alloc_workqueue("link-status",</div><div class='del'>-						 WQ_MEM_RECLAIM, 0);</div><div class='add'>+						 WQ_MEM_RECLAIM | WQ_PERCPU,</div><div class='add'>+						 0);</div><div class='ctx'> 	if (!lio-&gt;link_status_wq.wq) {</div><div class='ctx'> 		dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "unable to create cavium link status wq\n");</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -659,7 +660,8 @@ static inline int setup_sync_octeon_time_wq(struct net_device *netdev)</div><div class='ctx'> 	struct octeon_device *oct = lio-&gt;oct_dev;</div><div class='ctx'> </div><div class='ctx'> 	lio-&gt;sync_octeon_time_wq.wq =</div><div class='del'>-		alloc_workqueue("update-octeon-time", WQ_MEM_RECLAIM, 0);</div><div class='add'>+		alloc_workqueue("update-octeon-time",</div><div class='add'>+				WQ_MEM_RECLAIM | WQ_PERCPU, 0);</div><div class='ctx'> 	if (!lio-&gt;sync_octeon_time_wq.wq) {</div><div class='ctx'> 		dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "Unable to create wq to update octeon time\n");</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -1734,7 +1736,7 @@ static inline int setup_tx_poll_fn(struct net_device *netdev)</div><div class='ctx'> 	struct octeon_device *oct = lio-&gt;oct_dev;</div><div class='ctx'> </div><div class='ctx'> 	lio-&gt;txq_status_wq.wq = alloc_workqueue("txq-status",</div><div class='del'>-						WQ_MEM_RECLAIM, 0);</div><div class='add'>+						WQ_MEM_RECLAIM | WQ_PERCPU, 0);</div><div class='ctx'> 	if (!lio-&gt;txq_status_wq.wq) {</div><div class='ctx'> 		dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "unable to create cavium txq status wq\n");</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -2105,20 +2107,16 @@ liquidio_get_stats64(struct net_device *netdev,</div><div class='ctx'> 		lstats-&gt;tx_fifo_errors;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * hwtstamp_ioctl - Handler for SIOCSHWTSTAMP ioctl</div><div class='del'>- * @netdev: network device</div><div class='del'>- * @ifr: interface request</div><div class='del'>- */</div><div class='del'>-static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+static int liquidio_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+				 struct kernel_hwtstamp_config *conf,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config conf;</div><div class='ctx'> 	struct lio *lio = GET_LIO(netdev);</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;conf, ifr-&gt;ifr_data, sizeof(conf)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	if (!lio-&gt;oct_dev-&gt;ptp_enable)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	switch (conf.tx_type) {</div><div class='add'>+	switch (conf-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2126,7 +2124,7 @@ static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (conf.rx_filter) {</div><div class='add'>+	switch (conf-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_ALL:</div><div class='hunk'>@@ -2144,39 +2142,32 @@ static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='del'>-		conf.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		conf-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (conf.rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='add'>+	if (conf-&gt;rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='ctx'> 		ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);</div><div class='ctx'> </div><div class='ctx'> 	else</div><div class='ctx'> 		ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;conf, sizeof(conf)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * liquidio_ioctl - ioctl handler</div><div class='del'>- * @netdev: network device</div><div class='del'>- * @ifr: interface request</div><div class='del'>- * @cmd: command</div><div class='del'>- */</div><div class='del'>-static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='add'>+static int liquidio_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+				 struct kernel_hwtstamp_config *conf)</div><div class='ctx'> {</div><div class='ctx'> 	struct lio *lio = GET_LIO(netdev);</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		if (lio-&gt;oct_dev-&gt;ptp_enable)</div><div class='del'>-			return hwtstamp_ioctl(netdev, ifr);</div><div class='del'>-		fallthrough;</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	/* TX timestamping is technically always on */</div><div class='add'>+	conf-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+	conf-&gt;rx_filter = ifstate_check(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED) ?</div><div class='add'>+			  HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3225,7 +3216,6 @@ static const struct net_device_ops lionetdevops = {</div><div class='ctx'> 	.ndo_vlan_rx_add_vid    = liquidio_vlan_rx_add_vid,</div><div class='ctx'> 	.ndo_vlan_rx_kill_vid   = liquidio_vlan_rx_kill_vid,</div><div class='ctx'> 	.ndo_change_mtu		= liquidio_change_mtu,</div><div class='del'>-	.ndo_eth_ioctl		= liquidio_ioctl,</div><div class='ctx'> 	.ndo_fix_features	= liquidio_fix_features,</div><div class='ctx'> 	.ndo_set_features	= liquidio_set_features,</div><div class='ctx'> 	.ndo_set_vf_mac		= liquidio_set_vf_mac,</div><div class='hunk'>@@ -3236,6 +3226,8 @@ static const struct net_device_ops lionetdevops = {</div><div class='ctx'> 	.ndo_set_vf_link_state  = liquidio_set_vf_link_state,</div><div class='ctx'> 	.ndo_get_vf_stats	= liquidio_get_vf_stats,</div><div class='ctx'> 	.ndo_get_port_parent_id	= liquidio_get_port_parent_id,</div><div class='add'>+	.ndo_hwtstamp_get	= liquidio_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= liquidio_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c<br/>index 62c2eadc33e3..e02942dbbcce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/lio_vf_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/lio_vf_main.c</a></div><div class='hunk'>@@ -304,7 +304,8 @@ static int setup_link_status_change_wq(struct net_device *netdev)</div><div class='ctx'> 	struct octeon_device *oct = lio-&gt;oct_dev;</div><div class='ctx'> </div><div class='ctx'> 	lio-&gt;link_status_wq.wq = alloc_workqueue("link-status",</div><div class='del'>-						 WQ_MEM_RECLAIM, 0);</div><div class='add'>+						 WQ_MEM_RECLAIM | WQ_PERCPU,</div><div class='add'>+						 0);</div><div class='ctx'> 	if (!lio-&gt;link_status_wq.wq) {</div><div class='ctx'> 		dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "unable to create cavium link status wq\n");</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -1235,20 +1236,13 @@ liquidio_get_stats64(struct net_device *netdev,</div><div class='ctx'> 		lstats-&gt;tx_carrier_errors;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * hwtstamp_ioctl - Handler for SIOCSHWTSTAMP ioctl</div><div class='del'>- * @netdev: network device</div><div class='del'>- * @ifr: interface request</div><div class='del'>- */</div><div class='del'>-static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+static int liquidio_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+				 struct kernel_hwtstamp_config *conf,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct lio *lio = GET_LIO(netdev);</div><div class='del'>-	struct hwtstamp_config conf;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;conf, ifr-&gt;ifr_data, sizeof(conf)))</div><div class='del'>-		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	switch (conf.tx_type) {</div><div class='add'>+	switch (conf-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1256,7 +1250,7 @@ static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (conf.rx_filter) {</div><div class='add'>+	switch (conf-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_ALL:</div><div class='hunk'>@@ -1274,35 +1268,31 @@ static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='del'>-		conf.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		conf-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (conf.rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='add'>+	if (conf-&gt;rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='ctx'> 		ifstate_set(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);</div><div class='ctx'> </div><div class='ctx'> 	else</div><div class='ctx'> 		ifstate_reset(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;conf, sizeof(conf)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * liquidio_ioctl - ioctl handler</div><div class='del'>- * @netdev: network device</div><div class='del'>- * @ifr: interface request</div><div class='del'>- * @cmd: command</div><div class='del'>- */</div><div class='del'>-static int liquidio_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='add'>+static int liquidio_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+				 struct kernel_hwtstamp_config *conf)</div><div class='ctx'> {</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return hwtstamp_ioctl(netdev, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	struct lio *lio = GET_LIO(netdev);</div><div class='add'>+</div><div class='add'>+	/* TX timestamping is techically always on */</div><div class='add'>+	conf-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+	conf-&gt;rx_filter = ifstate_check(lio, LIO_IFSTATE_RX_TIMESTAMP_ENABLED) ?</div><div class='add'>+			  HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void handle_timestamp(struct octeon_device *oct, u32 status, void *buf)</div><div class='hunk'>@@ -1880,9 +1870,10 @@ static const struct net_device_ops lionetdevops = {</div><div class='ctx'> 	.ndo_vlan_rx_add_vid    = liquidio_vlan_rx_add_vid,</div><div class='ctx'> 	.ndo_vlan_rx_kill_vid   = liquidio_vlan_rx_kill_vid,</div><div class='ctx'> 	.ndo_change_mtu		= liquidio_change_mtu,</div><div class='del'>-	.ndo_eth_ioctl		= liquidio_ioctl,</div><div class='ctx'> 	.ndo_fix_features	= liquidio_fix_features,</div><div class='ctx'> 	.ndo_set_features	= liquidio_set_features,</div><div class='add'>+	.ndo_hwtstamp_get	= liquidio_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= liquidio_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int lio_nic_info(struct octeon_recv_info *recv_info, void *buf)</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/octeon_device.c b/drivers/net/ethernet/cavium/liquidio/octeon_device.c<br/>index 6b6cb73482d7..1753bb87dfbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/octeon_device.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/octeon_device.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/octeon_device.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/octeon_device.c</a></div><div class='hunk'>@@ -1433,22 +1433,6 @@ int octeon_wait_for_ddr_init(struct octeon_device *oct, u32 *timeout)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(octeon_wait_for_ddr_init);</div><div class='ctx'> </div><div class='del'>-/* Get the octeon id assigned to the octeon device passed as argument.</div><div class='del'>- *  This function is exported to other modules.</div><div class='del'>- *  @param dev - octeon device pointer passed as a void *.</div><div class='del'>- *  @return octeon device id</div><div class='del'>- */</div><div class='del'>-int lio_get_device_id(void *dev)</div><div class='del'>-{</div><div class='del'>-	struct octeon_device *octeon_dev = (struct octeon_device *)dev;</div><div class='del'>-	u32 i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MAX_OCTEON_DEVICES; i++)</div><div class='del'>-		if (octeon_device[i] == octeon_dev)</div><div class='del'>-			return octeon_dev-&gt;octeon_id;</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void lio_enable_irq(struct octeon_droq *droq, struct octeon_instr_queue *iq)</div><div class='ctx'> {</div><div class='ctx'> 	u64 instr_cnt;</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/octeon_device.h b/drivers/net/ethernet/cavium/liquidio/octeon_device.h<br/>index d26364c2ac81..19344b21f8fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/octeon_device.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/octeon_device.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/octeon_device.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/octeon_device.h</a></div><div class='hunk'>@@ -705,13 +705,6 @@ octeon_get_dispatch(struct octeon_device *octeon_dev, u16 opcode,</div><div class='ctx'>  */</div><div class='ctx'> struct octeon_device *lio_get_device(u32 octeon_id);</div><div class='ctx'> </div><div class='del'>-/** Get the octeon id assigned to the octeon device passed as argument.</div><div class='del'>- *  This function is exported to other modules.</div><div class='del'>- *  @param dev - octeon device pointer passed as a void *.</div><div class='del'>- *  @return octeon device id</div><div class='del'>- */</div><div class='del'>-int lio_get_device_id(void *dev);</div><div class='del'>-</div><div class='ctx'> /** Read windowed register.</div><div class='ctx'>  *  @param  oct   -  pointer to the Octeon device.</div><div class='ctx'>  *  @param  addr  -  Address of the register to read.</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/octeon_main.h b/drivers/net/ethernet/cavium/liquidio/octeon_main.h<br/>index 5b4cb725f60f..953edf0c7096 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/octeon_main.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/octeon_main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/octeon_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/octeon_main.h</a></div><div class='hunk'>@@ -157,7 +157,7 @@ err_release_region:</div><div class='ctx'> 	    response of the request.</div><div class='ctx'>  *          0: the request will wait until its response gets back</div><div class='ctx'>  *	       from the firmware within LIO_SC_MAX_TMO_MS milli sec.</div><div class='del'>- *	       It the response does not return within</div><div class='add'>+ *	       If the response does not return within</div><div class='ctx'>  *	       LIO_SC_MAX_TMO_MS milli sec, lio_process_ordered_list()</div><div class='ctx'>  *	       will move the request to zombie response list.</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/octeon_nic.h b/drivers/net/ethernet/cavium/liquidio/octeon_nic.h<br/>index 87dd6f89ce51..c139fc423764 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/octeon_nic.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/octeon_nic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/octeon_nic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/octeon_nic.h</a></div><div class='hunk'>@@ -268,7 +268,7 @@ octeon_alloc_soft_command_resp(struct octeon_device    *oct,</div><div class='ctx'>  * @param oct - octeon device pointer</div><div class='ctx'>  * @param ndata - control structure with queueing, and buffer information</div><div class='ctx'>  *</div><div class='del'>- * @returns IQ_FAILED if it failed to add to the input queue. IQ_STOP if it the</div><div class='add'>+ * @returns IQ_FAILED if it failed to add to the input queue. IQ_STOP if the</div><div class='ctx'>  * queue should be stopped, and IQ_SEND_OK if it sent okay.</div><div class='ctx'>  */</div><div class='ctx'> int octnet_send_nic_data_pkt(struct octeon_device *oct,</div><div class='hunk'>@@ -278,7 +278,7 @@ int octnet_send_nic_data_pkt(struct octeon_device *oct,</div><div class='ctx'> /** Send a NIC control packet to the device</div><div class='ctx'>  * @param oct - octeon device pointer</div><div class='ctx'>  * @param nctrl - control structure with command, timout, and callback info</div><div class='del'>- * @returns IQ_FAILED if it failed to add to the input queue. IQ_STOP if it the</div><div class='add'>+ * @returns IQ_FAILED if it failed to add to the input queue. IQ_STOP if the</div><div class='ctx'>  * queue should be stopped, and IQ_SEND_OK if it sent okay.</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/request_manager.c b/drivers/net/ethernet/cavium/liquidio/request_manager.c<br/>index de8a6ce86ad7..d7cfb20eea00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/request_manager.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/request_manager.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/request_manager.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/request_manager.c</a></div><div class='hunk'>@@ -126,13 +126,13 @@ int octeon_init_instr_queue(struct octeon_device *oct,</div><div class='ctx'> 	oct-&gt;io_qmask.iq |= BIT_ULL(iq_no);</div><div class='ctx'> </div><div class='ctx'> 	/* Set the 32B/64B mode for each input queue */</div><div class='del'>-	oct-&gt;io_qmask.iq64B |= ((conf-&gt;instr_type == 64) &lt;&lt; iq_no);</div><div class='add'>+	oct-&gt;io_qmask.iq64B |= ((u64)(conf-&gt;instr_type == 64) &lt;&lt; iq_no);</div><div class='ctx'> 	iq-&gt;iqcmd_64B = (conf-&gt;instr_type == 64);</div><div class='ctx'> </div><div class='ctx'> 	oct-&gt;fn_list.setup_iq_regs(oct, iq_no);</div><div class='ctx'> </div><div class='ctx'> 	oct-&gt;check_db_wq[iq_no].wq = alloc_workqueue("check_iq_db",</div><div class='del'>-						     WQ_MEM_RECLAIM,</div><div class='add'>+						     WQ_MEM_RECLAIM | WQ_PERCPU,</div><div class='ctx'> 						     0);</div><div class='ctx'> 	if (!oct-&gt;check_db_wq[iq_no].wq) {</div><div class='ctx'> 		vfree(iq-&gt;request_list);</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/liquidio/response_manager.c b/drivers/net/ethernet/cavium/liquidio/response_manager.c<br/>index 861050966e18..de1a8335b545 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/response_manager.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/liquidio/response_manager.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/liquidio/response_manager.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/liquidio/response_manager.c</a></div><div class='hunk'>@@ -39,7 +39,8 @@ int octeon_setup_response_list(struct octeon_device *oct)</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_lock_init(&amp;oct-&gt;cmd_resp_wqlock);</div><div class='ctx'> </div><div class='del'>-	oct-&gt;dma_comp_wq.wq = alloc_workqueue("dma-comp", WQ_MEM_RECLAIM, 0);</div><div class='add'>+	oct-&gt;dma_comp_wq.wq = alloc_workqueue("dma-comp",</div><div class='add'>+					      WQ_MEM_RECLAIM | WQ_PERCPU, 0);</div><div class='ctx'> 	if (!oct-&gt;dma_comp_wq.wq) {</div><div class='ctx'> 		dev_err(&amp;oct-&gt;pci_dev-&gt;dev, "failed to create wq thread\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c b/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c<br/>index 393b9951490a..c190fc6538d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/octeon/octeon_mgmt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/octeon/octeon_mgmt.c</a></div><div class='hunk'>@@ -690,19 +690,16 @@ static irqreturn_t octeon_mgmt_interrupt(int cpl, void *dev_id)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int octeon_mgmt_ioctl_hwtstamp(struct net_device *netdev,</div><div class='del'>-				      struct ifreq *rq, int cmd)</div><div class='add'>+static int octeon_mgmt_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+				    struct kernel_hwtstamp_config *config,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct octeon_mgmt *p = netdev_priv(netdev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-	union cvmx_mio_ptp_clock_cfg ptp;</div><div class='ctx'> 	union cvmx_agl_gmx_rxx_frm_ctl rxx_frm_ctl;</div><div class='add'>+	union cvmx_mio_ptp_clock_cfg ptp;</div><div class='ctx'> 	bool have_hw_timestamps = false;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, rq-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	/* Check the status of hardware for tiemstamps */</div><div class='add'>+	/* Check the status of hardware for timestamps */</div><div class='ctx'> 	if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {</div><div class='ctx'> 		/* Get the current state of the PTP clock */</div><div class='ctx'> 		ptp.u64 = cvmx_read_csr(CVMX_MIO_PTP_CLOCK_CFG);</div><div class='hunk'>@@ -733,10 +730,12 @@ static int octeon_mgmt_ioctl_hwtstamp(struct net_device *netdev,</div><div class='ctx'> 		have_hw_timestamps = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!have_hw_timestamps)</div><div class='add'>+	if (!have_hw_timestamps) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "HW doesn't support timestamping");</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -744,7 +743,7 @@ static int octeon_mgmt_ioctl_hwtstamp(struct net_device *netdev,</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		p-&gt;has_rx_tstamp = false;</div><div class='ctx'> 		rxx_frm_ctl.u64 = cvmx_read_csr(p-&gt;agl + AGL_GMX_RX_FRM_CTL);</div><div class='hunk'>@@ -766,33 +765,34 @@ static int octeon_mgmt_ioctl_hwtstamp(struct net_device *netdev,</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='del'>-		p-&gt;has_rx_tstamp = have_hw_timestamps;</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-		if (p-&gt;has_rx_tstamp) {</div><div class='del'>-			rxx_frm_ctl.u64 = cvmx_read_csr(p-&gt;agl + AGL_GMX_RX_FRM_CTL);</div><div class='del'>-			rxx_frm_ctl.s.ptp_mode = 1;</div><div class='del'>-			cvmx_write_csr(p-&gt;agl + AGL_GMX_RX_FRM_CTL, rxx_frm_ctl.u64);</div><div class='del'>-		}</div><div class='add'>+		p-&gt;has_rx_tstamp = true;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		rxx_frm_ctl.u64 = cvmx_read_csr(p-&gt;agl + AGL_GMX_RX_FRM_CTL);</div><div class='add'>+		rxx_frm_ctl.s.ptp_mode = 1;</div><div class='add'>+		cvmx_write_csr(p-&gt;agl + AGL_GMX_RX_FRM_CTL, rxx_frm_ctl.u64);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (copy_to_user(rq-&gt;ifr_data, &amp;config, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int octeon_mgmt_ioctl(struct net_device *netdev,</div><div class='del'>-			     struct ifreq *rq, int cmd)</div><div class='add'>+static int octeon_mgmt_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+				    struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return octeon_mgmt_ioctl_hwtstamp(netdev, rq, cmd);</div><div class='del'>-	default:</div><div class='del'>-		return phy_do_ioctl(netdev, rq, cmd);</div><div class='del'>-	}</div><div class='add'>+	struct octeon_mgmt *p = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	/* Check the status of hardware for timestamps */</div><div class='add'>+	if (!OCTEON_IS_MODEL(OCTEON_CN6XXX))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	config-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+	config-&gt;rx_filter = p-&gt;has_rx_tstamp ?</div><div class='add'>+			    HWTSTAMP_FILTER_ALL :</div><div class='add'>+			    HWTSTAMP_FILTER_NONE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void octeon_mgmt_disable_link(struct octeon_mgmt *p)</div><div class='hunk'>@@ -1370,11 +1370,13 @@ static const struct net_device_ops octeon_mgmt_ops = {</div><div class='ctx'> 	.ndo_start_xmit =		octeon_mgmt_xmit,</div><div class='ctx'> 	.ndo_set_rx_mode =		octeon_mgmt_set_rx_filtering,</div><div class='ctx'> 	.ndo_set_mac_address =		octeon_mgmt_set_mac_address,</div><div class='del'>-	.ndo_eth_ioctl =			octeon_mgmt_ioctl,</div><div class='add'>+	.ndo_eth_ioctl =		phy_do_ioctl,</div><div class='ctx'> 	.ndo_change_mtu =		octeon_mgmt_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller =		octeon_mgmt_poll_controller,</div><div class='ctx'> #endif</div><div class='add'>+	.ndo_hwtstamp_get =		octeon_mgmt_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set =		octeon_mgmt_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int octeon_mgmt_probe(struct platform_device *pdev)</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c b/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c<br/>index d0ff0c170b1a..413028bdcacb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c</a></div><div class='hunk'>@@ -516,8 +516,8 @@ static int nicvf_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nicvf_get_rss_hash_opts(struct nicvf *nic,</div><div class='del'>-				   struct ethtool_rxnfc *info)</div><div class='add'>+static int nicvf_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 struct ethtool_rxfh_fields *info)</div><div class='ctx'> {</div><div class='ctx'> 	info-&gt;data = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -541,36 +541,29 @@ static int nicvf_get_rss_hash_opts(struct nicvf *nic,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nicvf_get_rxnfc(struct net_device *dev,</div><div class='del'>-			   struct ethtool_rxnfc *info, u32 *rules)</div><div class='add'>+static u32 nicvf_get_rx_ring_count(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct nicvf *nic = netdev_priv(dev);</div><div class='del'>-	int ret = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		info-&gt;data = nic-&gt;rx_queues;</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		return nicvf_get_rss_hash_opts(nic, info);</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='add'>+	return nic-&gt;rx_queues;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nicvf_set_rss_hash_opts(struct nicvf *nic,</div><div class='del'>-				   struct ethtool_rxnfc *info)</div><div class='add'>+static int nicvf_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 const struct ethtool_rxfh_fields *info,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct nicvf_rss_info *rss = &amp;nic-&gt;rss_info;</div><div class='del'>-	u64 rss_cfg = nicvf_reg_read(nic, NIC_VNIC_RSS_CFG);</div><div class='add'>+	struct nicvf *nic = netdev_priv(dev);</div><div class='add'>+	struct nicvf_rss_info *rss;</div><div class='add'>+	u64 rss_cfg;</div><div class='add'>+</div><div class='add'>+	rss = &amp;nic-&gt;rss_info;</div><div class='add'>+	rss_cfg = nicvf_reg_read(nic, NIC_VNIC_RSS_CFG);</div><div class='ctx'> </div><div class='ctx'> 	if (!rss-&gt;enable)</div><div class='ctx'> 		netdev_err(nic-&gt;netdev,</div><div class='ctx'> 			   "RSS is disabled, hash cannot be set\n");</div><div class='ctx'> </div><div class='del'>-	netdev_info(nic-&gt;netdev, "Set RSS flow type = %d, data = %lld\n",</div><div class='add'>+	netdev_info(nic-&gt;netdev, "Set RSS flow type = %d, data = %u\n",</div><div class='ctx'> 		    info-&gt;flow_type, info-&gt;data);</div><div class='ctx'> </div><div class='ctx'> 	if (!(info-&gt;data &amp; RXH_IP_SRC) || !(info-&gt;data &amp; RXH_IP_DST))</div><div class='hunk'>@@ -628,19 +621,6 @@ static int nicvf_set_rss_hash_opts(struct nicvf *nic,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nicvf_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)</div><div class='del'>-{</div><div class='del'>-	struct nicvf *nic = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		return nicvf_set_rss_hash_opts(nic, info);</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u32 nicvf_get_rxfh_key_size(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	return RSS_HASH_KEY_SIZE * sizeof(u64);</div><div class='hunk'>@@ -871,12 +851,13 @@ static const struct ethtool_ops nicvf_ethtool_ops = {</div><div class='ctx'> 	.get_coalesce		= nicvf_get_coalesce,</div><div class='ctx'> 	.get_ringparam		= nicvf_get_ringparam,</div><div class='ctx'> 	.set_ringparam		= nicvf_set_ringparam,</div><div class='del'>-	.get_rxnfc		= nicvf_get_rxnfc,</div><div class='del'>-	.set_rxnfc		= nicvf_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= nicvf_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_key_size	= nicvf_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh_indir_size	= nicvf_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= nicvf_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= nicvf_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= nicvf_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= nicvf_set_rxfh_fields,</div><div class='ctx'> 	.get_channels		= nicvf_get_channels,</div><div class='ctx'> 	.set_channels		= nicvf_set_channels,</div><div class='ctx'> 	.get_pauseparam         = nicvf_get_pauseparam,</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_main.c b/drivers/net/ethernet/cavium/thunder/nicvf_main.c<br/>index aebb9fef3f6e..0b6e30a8feb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/thunder/nicvf_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/thunder/nicvf_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/thunder/nicvf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/thunder/nicvf_main.c</a></div><div class='hunk'>@@ -1578,7 +1578,6 @@ napi_del:</div><div class='ctx'> static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> {</div><div class='ctx'> 	struct nicvf *nic = netdev_priv(netdev);</div><div class='del'>-	int orig_mtu = netdev-&gt;mtu;</div><div class='ctx'> </div><div class='ctx'> 	/* For now just support only the usual MTU sized frames,</div><div class='ctx'> 	 * plus some headroom for VLAN, QinQ.</div><div class='hunk'>@@ -1589,15 +1588,10 @@ static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	WRITE_ONCE(netdev-&gt;mtu, new_mtu);</div><div class='del'>-</div><div class='del'>-	if (!netif_running(netdev))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (nicvf_update_hw_max_frs(nic, new_mtu)) {</div><div class='del'>-		netdev-&gt;mtu = orig_mtu;</div><div class='add'>+	if (netif_running(netdev) &amp;&amp; nicvf_update_hw_max_frs(nic, new_mtu))</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(netdev-&gt;mtu, new_mtu);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1905,18 +1899,18 @@ static int nicvf_xdp(struct net_device *netdev, struct netdev_bpf *xdp)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nicvf_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+static int nicvf_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			      struct kernel_hwtstamp_config *config,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	struct nicvf *nic = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	if (!nic-&gt;ptp_clock)</div><div class='add'>+	if (!nic-&gt;ptp_clock) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "HW timestamping is not supported");</div><div class='ctx'> 		return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1924,7 +1918,7 @@ static int nicvf_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		nic-&gt;hw_rx_tstamp = false;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1943,7 +1937,7 @@ static int nicvf_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 		nic-&gt;hw_rx_tstamp = true;</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='hunk'>@@ -1952,20 +1946,24 @@ static int nicvf_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		nicvf_config_hw_rx_tstamp(nic, nic-&gt;hw_rx_tstamp);</div><div class='ctx'> </div><div class='del'>-	if (copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nicvf_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)</div><div class='add'>+static int nicvf_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			      struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return nicvf_config_hwtstamp(netdev, req);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	struct nicvf *nic = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (!nic-&gt;ptp_clock)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* TX timestamping is technically always on */</div><div class='add'>+	config-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+	config-&gt;rx_filter = nic-&gt;hw_rx_tstamp ?</div><div class='add'>+			    HWTSTAMP_FILTER_ALL :</div><div class='add'>+			    HWTSTAMP_FILTER_NONE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __nicvf_set_rx_mode_task(u8 mode, struct xcast_addr_list *mc_addrs,</div><div class='hunk'>@@ -2087,8 +2085,9 @@ static const struct net_device_ops nicvf_netdev_ops = {</div><div class='ctx'> 	.ndo_fix_features       = nicvf_fix_features,</div><div class='ctx'> 	.ndo_set_features       = nicvf_set_features,</div><div class='ctx'> 	.ndo_bpf		= nicvf_xdp,</div><div class='del'>-	.ndo_eth_ioctl           = nicvf_ioctl,</div><div class='ctx'> 	.ndo_set_rx_mode        = nicvf_set_rx_mode,</div><div class='add'>+	.ndo_hwtstamp_get	= nicvf_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= nicvf_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='head'>diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c b/drivers/net/ethernet/cavium/thunder/nicvf_queues.c<br/>index 06397cc8bb36..5211759bfe47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/thunder/nicvf_queues.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/thunder/nicvf_queues.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/thunder/nicvf_queues.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/thunder/nicvf_queues.c</a></div><div class='hunk'>@@ -1389,11 +1389,9 @@ nicvf_sq_add_hdr_subdesc(struct nicvf *nic, struct snd_queue *sq, int qentry,</div><div class='ctx'> 		this_cpu_inc(nic-&gt;pnicvf-&gt;drv_stats-&gt;tx_tso);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Check if timestamp is requested */</div><div class='del'>-	if (!(skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP)) {</div><div class='del'>-		skb_tx_timestamp(skb);</div><div class='add'>+	/* Check if hw timestamp is requested */</div><div class='add'>+	if (!(skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP))</div><div class='ctx'> 		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* Tx timestamping not supported along with TSO, so ignore request */</div><div class='ctx'> 	if (skb_shinfo(skb)-&gt;gso_size)</div><div class='hunk'>@@ -1472,6 +1470,8 @@ static inline void nicvf_sq_doorbell(struct nicvf *nic, struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	netdev_tx_sent_queue(txq, skb-&gt;len);</div><div class='ctx'> </div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 	/* make sure all memory stores are done before ringing doorbell */</div><div class='ctx'> 	smp_wmb();</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/cavium/thunder/thunder_bgx.c b/drivers/net/ethernet/cavium/thunder/thunder_bgx.c<br/>index 608cc6af5af1..9efb60842ad1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/thunder/thunder_bgx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cavium/thunder/thunder_bgx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cavium/thunder/thunder_bgx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cavium/thunder/thunder_bgx.c</a></div><div class='hunk'>@@ -1429,9 +1429,9 @@ static acpi_status bgx_acpi_match_id(acpi_handle handle, u32 lvl,</div><div class='ctx'> {</div><div class='ctx'> 	struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL };</div><div class='ctx'> 	struct bgx *bgx = context;</div><div class='del'>-	char bgx_sel[5];</div><div class='add'>+	char bgx_sel[7];</div><div class='ctx'> </div><div class='del'>-	snprintf(bgx_sel, 5, "BGX%d", bgx-&gt;bgx_id);</div><div class='add'>+	snprintf(bgx_sel, sizeof(bgx_sel), "BGX%d", bgx-&gt;bgx_id);</div><div class='ctx'> 	if (ACPI_FAILURE(acpi_get_name(handle, ACPI_SINGLE_NAME, &amp;string))) {</div><div class='ctx'> 		pr_warn("Invalid link device\n");</div><div class='ctx'> 		return AE_OK;</div><div class='hunk'>@@ -1493,13 +1493,17 @@ static int bgx_init_of_phy(struct bgx *bgx)</div><div class='ctx'> 		 * this cortina phy, for which there is no driver</div><div class='ctx'> 		 * support, ignore it.</div><div class='ctx'> 		 */</div><div class='del'>-		if (phy_np &amp;&amp;</div><div class='del'>-		    !of_device_is_compatible(phy_np, "cortina,cs4223-slice")) {</div><div class='del'>-			/* Wait until the phy drivers are available */</div><div class='del'>-			pd = of_phy_find_device(phy_np);</div><div class='del'>-			if (!pd)</div><div class='del'>-				goto defer;</div><div class='del'>-			bgx-&gt;lmac[lmac].phydev = pd;</div><div class='add'>+		if (phy_np) {</div><div class='add'>+			if (!of_device_is_compatible(phy_np, "cortina,cs4223-slice")) {</div><div class='add'>+				/* Wait until the phy drivers are available */</div><div class='add'>+				pd = of_phy_find_device(phy_np);</div><div class='add'>+				if (!pd) {</div><div class='add'>+					of_node_put(phy_np);</div><div class='add'>+					goto defer;</div><div class='add'>+				}</div><div class='add'>+				bgx-&gt;lmac[lmac].phydev = pd;</div><div class='add'>+			}</div><div class='add'>+			of_node_put(phy_np);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		lmac++;</div><div class='hunk'>@@ -1515,11 +1519,11 @@ defer:</div><div class='ctx'> 	 * for phy devices we may have already found.</div><div class='ctx'> 	 */</div><div class='ctx'> 	while (lmac) {</div><div class='add'>+		lmac--;</div><div class='ctx'> 		if (bgx-&gt;lmac[lmac].phydev) {</div><div class='ctx'> 			put_device(&amp;bgx-&gt;lmac[lmac].phydev-&gt;mdio.dev);</div><div class='ctx'> 			bgx-&gt;lmac[lmac].phydev = NULL;</div><div class='ctx'> 		}</div><div class='del'>-		lmac--;</div><div class='ctx'> 	}</div><div class='ctx'> 	of_node_put(node);</div><div class='ctx'> 	return -EPROBE_DEFER;</div><div class='hunk'>@@ -1605,10 +1609,10 @@ static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		return dev_err_probe(dev, err, "Failed to enable PCI device\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = pci_request_regions(pdev, DRV_NAME);</div><div class='add'>+	err = pcim_request_all_regions(pdev, DRV_NAME);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "PCI request regions failed 0x%x\n", err);</div><div class='del'>-		goto err_disable_device;</div><div class='add'>+		goto err_zero_drv_data;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* MAP configuration registers */</div><div class='hunk'>@@ -1616,7 +1620,7 @@ static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	if (!bgx-&gt;reg_base) {</div><div class='ctx'> 		dev_err(dev, "BGX: Cannot map CSR memory space, aborting\n");</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		goto err_release_regions;</div><div class='add'>+		goto err_zero_drv_data;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	set_max_bgx_per_node(pdev);</div><div class='hunk'>@@ -1688,10 +1692,7 @@ static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> err_enable:</div><div class='ctx'> 	bgx_vnic[bgx-&gt;bgx_id] = NULL;</div><div class='ctx'> 	pci_free_irq(pdev, GMPX_GMI_TX_INT, bgx);</div><div class='del'>-err_release_regions:</div><div class='del'>-	pci_release_regions(pdev);</div><div class='del'>-err_disable_device:</div><div class='del'>-	pci_disable_device(pdev);</div><div class='add'>+err_zero_drv_data:</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1710,8 +1711,6 @@ static void bgx_remove(struct pci_dev *pdev)</div><div class='ctx'> 	pci_free_irq(pdev, GMPX_GMI_TX_INT, bgx);</div><div class='ctx'> </div><div class='ctx'> 	bgx_vnic[bgx-&gt;bgx_id] = NULL;</div><div class='del'>-	pci_release_regions(pdev);</div><div class='del'>-	pci_disable_device(pdev);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb/cxgb2.c b/drivers/net/ethernet/chelsio/cxgb/cxgb2.c<br/>index 3b7068832f95..4a0e2d2eb60a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb/cxgb2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb/cxgb2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb/cxgb2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb/cxgb2.c</a></div><div class='hunk'>@@ -351,7 +351,7 @@ static void set_msglevel(struct net_device *dev, u32 val)</div><div class='ctx'> 	adapter-&gt;msg_enable = val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const char stats_strings[][ETH_GSTRING_LEN] = {</div><div class='add'>+static const char stats_strings[][ETH_GSTRING_LEN] __nonstring_array = {</div><div class='ctx'> 	"TxOctetsOK",</div><div class='ctx'> 	"TxOctetsBad",</div><div class='ctx'> 	"TxUnicastFramesOK",</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb/pm3393.c b/drivers/net/ethernet/chelsio/cxgb/pm3393.c<br/>index cbfa03d5663a..f3ada6e7cdc5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb/pm3393.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb/pm3393.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb/pm3393.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb/pm3393.c</a></div><div class='hunk'>@@ -141,7 +141,7 @@ static int pm3393_interrupt_enable(struct cmac *cmac)</div><div class='ctx'> 	pmwrite(cmac, SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE,</div><div class='ctx'> 		0 /*SUNI1x10GEXP_BITMSK_TOP_INTE */ );</div><div class='ctx'> </div><div class='del'>-	/* TERMINATOR - PL_INTERUPTS_EXT */</div><div class='add'>+	/* TERMINATOR - PL_INTERRUPTS_EXT */</div><div class='ctx'> 	pl_intr = readl(cmac-&gt;adapter-&gt;regs + A_PL_ENABLE);</div><div class='ctx'> 	pl_intr |= F_PL_INTR_EXT;</div><div class='ctx'> 	writel(pl_intr, cmac-&gt;adapter-&gt;regs + A_PL_ENABLE);</div><div class='hunk'>@@ -179,7 +179,7 @@ static int pm3393_interrupt_disable(struct cmac *cmac)</div><div class='ctx'> 	elmer &amp;= ~ELMER0_GP_BIT1;</div><div class='ctx'> 	t1_tpi_write(cmac-&gt;adapter, A_ELMER0_INT_ENABLE, elmer);</div><div class='ctx'> </div><div class='del'>-	/* TERMINATOR - PL_INTERUPTS_EXT */</div><div class='add'>+	/* TERMINATOR - PL_INTERRUPTS_EXT */</div><div class='ctx'> 	/* DO NOT DISABLE TERMINATOR's EXTERNAL INTERRUPTS. ANOTHER CHIP</div><div class='ctx'> 	 * COULD WANT THEM ENABLED. We disable PM3393 at the ELMER level.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -222,7 +222,7 @@ static int pm3393_interrupt_clear(struct cmac *cmac)</div><div class='ctx'> 	elmer |= ELMER0_GP_BIT1;</div><div class='ctx'> 	t1_tpi_write(cmac-&gt;adapter, A_ELMER0_INT_CAUSE, elmer);</div><div class='ctx'> </div><div class='del'>-	/* TERMINATOR - PL_INTERUPTS_EXT</div><div class='add'>+	/* TERMINATOR - PL_INTERRUPTS_EXT</div><div class='ctx'> 	 */</div><div class='ctx'> 	pl_intr = readl(cmac-&gt;adapter-&gt;regs + A_PL_CAUSE);</div><div class='ctx'> 	pl_intr |= F_PL_INTR_EXT;</div><div class='hunk'>@@ -756,7 +756,7 @@ static int pm3393_mac_reset(adapter_t * adapter)</div><div class='ctx'> </div><div class='ctx'> 		/* ??? If this fails, might be able to software reset the XAUI part</div><div class='ctx'> 		 *     and try to recover... thus saving us from doing another HW reset */</div><div class='del'>-		/* Has the XAUI MABC PLL circuitry stablized? */</div><div class='add'>+		/* Has the XAUI MABC PLL circuitry stabilized? */</div><div class='ctx'> 		is_xaui_mabc_pll_locked =</div><div class='ctx'> 		    (val &amp; SUNI1x10GEXP_BITMSK_TOP_SXRA_EXPIRED);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb/sge.c b/drivers/net/ethernet/chelsio/cxgb/sge.c<br/>index 861edff5ed89..5f354cf62cdd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb/sge.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb/sge.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb/sge.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb/sge.c</a></div><div class='hunk'>@@ -1922,7 +1922,7 @@ send:</div><div class='ctx'> static void sge_tx_reclaim_cb(struct timer_list *t)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	struct sge *sge = from_timer(sge, t, tx_reclaim_timer);</div><div class='add'>+	struct sge *sge = timer_container_of(sge, t, tx_reclaim_timer);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; SGE_CMDQ_N; ++i) {</div><div class='ctx'> 		struct cmdQ *q = &amp;sge-&gt;cmdQ[i];</div><div class='hunk'>@@ -1984,9 +1984,9 @@ void t1_sge_stop(struct sge *sge)</div><div class='ctx'> 	readl(sge-&gt;adapter-&gt;regs + A_SG_CONTROL); /* flush */</div><div class='ctx'> </div><div class='ctx'> 	if (is_T2(sge-&gt;adapter))</div><div class='del'>-		del_timer_sync(&amp;sge-&gt;espibug_timer);</div><div class='add'>+		timer_delete_sync(&amp;sge-&gt;espibug_timer);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;sge-&gt;tx_reclaim_timer);</div><div class='add'>+	timer_delete_sync(&amp;sge-&gt;tx_reclaim_timer);</div><div class='ctx'> 	if (sge-&gt;tx_sched)</div><div class='ctx'> 		tx_sched_stop(sge);</div><div class='ctx'> </div><div class='hunk'>@@ -2017,7 +2017,7 @@ void t1_sge_start(struct sge *sge)</div><div class='ctx'>  */</div><div class='ctx'> static void espibug_workaround_t204(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sge *sge = from_timer(sge, t, espibug_timer);</div><div class='add'>+	struct sge *sge = timer_container_of(sge, t, espibug_timer);</div><div class='ctx'> 	struct adapter *adapter = sge-&gt;adapter;</div><div class='ctx'> 	unsigned int nports = adapter-&gt;params.nports;</div><div class='ctx'> 	u32 seop[MAX_NPORTS];</div><div class='hunk'>@@ -2060,7 +2060,7 @@ static void espibug_workaround_t204(struct timer_list *t)</div><div class='ctx'> </div><div class='ctx'> static void espibug_workaround(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sge *sge = from_timer(sge, t, espibug_timer);</div><div class='add'>+	struct sge *sge = timer_container_of(sge, t, espibug_timer);</div><div class='ctx'> 	struct adapter *adapter = sge-&gt;adapter;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(adapter-&gt;port[0].dev)) {</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c b/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c<br/>index f92a3550e480..3b1321c8ed14 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c</a></div><div class='hunk'>@@ -2933,7 +2933,6 @@ static int t3_reenable_adapter(struct adapter *adapter)</div><div class='ctx'> 	}</div><div class='ctx'> 	pci_set_master(adapter-&gt;pdev);</div><div class='ctx'> 	pci_restore_state(adapter-&gt;pdev);</div><div class='del'>-	pci_save_state(adapter-&gt;pdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Free sge resources */</div><div class='ctx'> 	t3_free_sge_resources(adapter);</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb3/l2t.c b/drivers/net/ethernet/chelsio/cxgb3/l2t.c<br/>index 9749d1239f58..5d5f3380ecca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb3/l2t.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb3/l2t.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb3/l2t.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb3/l2t.c</a></div><div class='hunk'>@@ -176,43 +176,6 @@ again:</div><div class='ctx'> </div><div class='ctx'> EXPORT_SYMBOL(t3_l2t_send_slow);</div><div class='ctx'> </div><div class='del'>-void t3_l2t_send_event(struct t3cdev *dev, struct l2t_entry *e)</div><div class='del'>-{</div><div class='del'>-again:</div><div class='del'>-	switch (e-&gt;state) {</div><div class='del'>-	case L2T_STATE_STALE:	/* entry is stale, kick off revalidation */</div><div class='del'>-		neigh_event_send(e-&gt;neigh, NULL);</div><div class='del'>-		spin_lock_bh(&amp;e-&gt;lock);</div><div class='del'>-		if (e-&gt;state == L2T_STATE_STALE) {</div><div class='del'>-			e-&gt;state = L2T_STATE_VALID;</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_bh(&amp;e-&gt;lock);</div><div class='del'>-		return;</div><div class='del'>-	case L2T_STATE_VALID:	/* fast-path, send the packet on */</div><div class='del'>-		return;</div><div class='del'>-	case L2T_STATE_RESOLVING:</div><div class='del'>-		spin_lock_bh(&amp;e-&gt;lock);</div><div class='del'>-		if (e-&gt;state != L2T_STATE_RESOLVING) {</div><div class='del'>-			/* ARP already completed */</div><div class='del'>-			spin_unlock_bh(&amp;e-&gt;lock);</div><div class='del'>-			goto again;</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_bh(&amp;e-&gt;lock);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Only the first packet added to the arpq should kick off</div><div class='del'>-		 * resolution.  However, because the alloc_skb below can fail,</div><div class='del'>-		 * we allow each packet added to the arpq to retry resolution</div><div class='del'>-		 * as a way of recovering from transient memory exhaustion.</div><div class='del'>-		 * A better way would be to use a work request to retry L2T</div><div class='del'>-		 * entries when there's no memory.</div><div class='del'>-		 */</div><div class='del'>-		neigh_event_send(e-&gt;neigh, NULL);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(t3_l2t_send_event);</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Allocate a free L2T entry.  Must be called with l2t_data.lock held.</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb3/l2t.h b/drivers/net/ethernet/chelsio/cxgb3/l2t.h<br/>index 646ca0bc25bd..33558f177497 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb3/l2t.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb3/l2t.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb3/l2t.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb3/l2t.h</a></div><div class='hunk'>@@ -113,7 +113,6 @@ struct l2t_entry *t3_l2t_get(struct t3cdev *cdev, struct dst_entry *dst,</div><div class='ctx'> 			     struct net_device *dev, const void *daddr);</div><div class='ctx'> int t3_l2t_send_slow(struct t3cdev *dev, struct sk_buff *skb,</div><div class='ctx'> 		     struct l2t_entry *e);</div><div class='del'>-void t3_l2t_send_event(struct t3cdev *dev, struct l2t_entry *e);</div><div class='ctx'> struct l2t_data *t3_init_l2t(unsigned int l2t_capacity);</div><div class='ctx'> </div><div class='ctx'> int cxgb3_ofld_send(struct t3cdev *dev, struct sk_buff *skb);</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb3/sge.c b/drivers/net/ethernet/chelsio/cxgb3/sge.c<br/>index 6268f96cb4aa..b59735d0e065 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb3/sge.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb3/sge.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb3/sge.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb3/sge.c</a></div><div class='hunk'>@@ -2906,7 +2906,7 @@ void t3_sge_err_intr_handler(struct adapter *adapter)</div><div class='ctx'>  */</div><div class='ctx'> static void sge_timer_tx(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sge_qset *qs = from_timer(qs, t, tx_reclaim_timer);</div><div class='add'>+	struct sge_qset *qs = timer_container_of(qs, t, tx_reclaim_timer);</div><div class='ctx'> 	struct port_info *pi = netdev_priv(qs-&gt;netdev);</div><div class='ctx'> 	struct adapter *adap = pi-&gt;adapter;</div><div class='ctx'> 	unsigned int tbd[SGE_TXQ_PER_SET] = {0, 0};</div><div class='hunk'>@@ -2947,7 +2947,7 @@ static void sge_timer_tx(struct timer_list *t)</div><div class='ctx'> static void sge_timer_rx(struct timer_list *t)</div><div class='ctx'> {</div><div class='ctx'> 	spinlock_t *lock;</div><div class='del'>-	struct sge_qset *qs = from_timer(qs, t, rx_reclaim_timer);</div><div class='add'>+	struct sge_qset *qs = timer_container_of(qs, t, rx_reclaim_timer);</div><div class='ctx'> 	struct port_info *pi = netdev_priv(qs-&gt;netdev);</div><div class='ctx'> 	struct adapter *adap = pi-&gt;adapter;</div><div class='ctx'> 	u32 status;</div><div class='hunk'>@@ -3223,9 +3223,9 @@ void t3_stop_sge_timers(struct adapter *adap)</div><div class='ctx'> 		struct sge_qset *q = &amp;adap-&gt;sge.qs[i];</div><div class='ctx'> </div><div class='ctx'> 		if (q-&gt;tx_reclaim_timer.function)</div><div class='del'>-			del_timer_sync(&amp;q-&gt;tx_reclaim_timer);</div><div class='add'>+			timer_delete_sync(&amp;q-&gt;tx_reclaim_timer);</div><div class='ctx'> 		if (q-&gt;rx_reclaim_timer.function)</div><div class='del'>-			del_timer_sync(&amp;q-&gt;rx_reclaim_timer);</div><div class='add'>+			timer_delete_sync(&amp;q-&gt;rx_reclaim_timer);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h<br/>index 75bd69ff61a8..f20f4bc58492 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/cxgb4.h</a></div><div class='hunk'>@@ -674,7 +674,7 @@ struct port_info {</div><div class='ctx'> 	struct cxgb_fcoe fcoe;</div><div class='ctx'> #endif /* CONFIG_CHELSIO_T4_FCOE */</div><div class='ctx'> 	bool rxtstamp;  /* Enable TS */</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> 	bool ptp_enable;</div><div class='ctx'> 	struct sched_table *sched_tbl;</div><div class='ctx'> 	u32 eth_flags;</div><div class='hunk'>@@ -1211,9 +1211,6 @@ struct adapter {</div><div class='ctx'> 	struct timer_list flower_stats_timer;</div><div class='ctx'> 	struct work_struct flower_stats_work;</div><div class='ctx'> </div><div class='del'>-	/* Ethtool Dump */</div><div class='del'>-	struct ethtool_dump eth_dump;</div><div class='del'>-</div><div class='ctx'> 	/* HMA */</div><div class='ctx'> 	struct hma_data hma;</div><div class='ctx'> </div><div class='hunk'>@@ -1233,6 +1230,10 @@ struct adapter {</div><div class='ctx'> </div><div class='ctx'> 	/* Ethtool n-tuple */</div><div class='ctx'> 	struct cxgb4_ethtool_filter *ethtool_filters;</div><div class='add'>+</div><div class='add'>+	/* Ethtool Dump */</div><div class='add'>+	/* Must be last - ends in a flex-array member. */</div><div class='add'>+	struct ethtool_dump eth_dump;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Support for "sched-class" command to allow a TX Scheduling Class to be</div><div class='hunk'>@@ -1315,7 +1316,7 @@ struct ch_sched_flowc {</div><div class='ctx'>  * (value, mask) tuples.  The associated ingress packet field matches the</div><div class='ctx'>  * tuple when ((field &amp; mask) == value).  (Thus a wildcard "don't care" field</div><div class='ctx'>  * rule can be constructed by specifying a tuple of (0, 0).)  A filter rule</div><div class='del'>- * matches an ingress packet when all of the individual individual field</div><div class='add'>+ * matches an ingress packet when all of the individual field</div><div class='ctx'>  * matching rules are true.</div><div class='ctx'>  *</div><div class='ctx'>  * Partial field masks are always valid, however, while it may be easy to</div><div class='hunk'>@@ -2076,7 +2077,7 @@ void t4_idma_monitor(struct adapter *adapter,</div><div class='ctx'> 		     struct sge_idma_monitor_state *idma,</div><div class='ctx'> 		     int hz, int ticks);</div><div class='ctx'> int t4_set_vf_mac_acl(struct adapter *adapter, unsigned int vf,</div><div class='del'>-		      unsigned int naddr, u8 *addr);</div><div class='add'>+		      u8 start, unsigned int naddr, u8 *addr);</div><div class='ctx'> void t4_tp_pio_read(struct adapter *adap, u32 *buff, u32 nregs,</div><div class='ctx'> 		    u32 start_index, bool sleep_ok);</div><div class='ctx'> void t4_tp_tm_pio_read(struct adapter *adap, u32 *buff, u32 nregs,</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c<br/>index 45d28a65347e..23326235d4ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c</a></div><div class='hunk'>@@ -662,8 +662,8 @@ static unsigned int lmm_to_fw_caps(const unsigned long *link_mode_mask)</div><div class='ctx'> static int get_link_ksettings(struct net_device *dev,</div><div class='ctx'> 			      struct ethtool_link_ksettings *link_ksettings)</div><div class='ctx'> {</div><div class='del'>-	struct ethtool_link_settings_hdr *base = &amp;link_ksettings-&gt;base;</div><div class='ctx'> 	struct port_info *pi = netdev_priv(dev);</div><div class='add'>+	struct ethtool_link_settings *base = &amp;link_ksettings-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	/* For the nonce, the Firmware doesn't send up Port State changes</div><div class='ctx'> 	 * when the Virtual Interface attached to the Port is down.  So</div><div class='hunk'>@@ -717,9 +717,9 @@ static int get_link_ksettings(struct net_device *dev,</div><div class='ctx'> static int set_link_ksettings(struct net_device *dev,</div><div class='ctx'> 			    const struct ethtool_link_ksettings *link_ksettings)</div><div class='ctx'> {</div><div class='del'>-	const struct ethtool_link_settings_hdr *base = &amp;link_ksettings-&gt;base;</div><div class='ctx'> 	struct port_info *pi = netdev_priv(dev);</div><div class='ctx'> 	struct link_config *lc = &amp;pi-&gt;link_cfg;</div><div class='add'>+	const struct ethtool_link_settings *base = &amp;link_ksettings-&gt;base;</div><div class='ctx'> 	struct link_config old_lc;</div><div class='ctx'> 	unsigned int fw_caps;</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -1730,6 +1730,60 @@ static int cxgb4_ntuple_get_filter(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int cxgb4_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 struct ethtool_rxfh_fields *info)</div><div class='add'>+{</div><div class='add'>+	const struct port_info *pi = netdev_priv(dev);</div><div class='add'>+	unsigned int v = pi-&gt;rss_mode;</div><div class='add'>+</div><div class='add'>+	info-&gt;data = 0;</div><div class='add'>+	switch (info-&gt;flow_type) {</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+		if (v &amp; FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F)</div><div class='add'>+			info-&gt;data = RXH_IP_SRC | RXH_IP_DST |</div><div class='add'>+				RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='add'>+		else if (v &amp; FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)</div><div class='add'>+			info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+		if ((v &amp; FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) &amp;&amp;</div><div class='add'>+		    (v &amp; FW_RSS_VI_CONFIG_CMD_UDPEN_F))</div><div class='add'>+			info-&gt;data = RXH_IP_SRC | RXH_IP_DST |</div><div class='add'>+				RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='add'>+		else if (v &amp; FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)</div><div class='add'>+			info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	case SCTP_V4_FLOW:</div><div class='add'>+	case AH_ESP_V4_FLOW:</div><div class='add'>+	case IPV4_FLOW:</div><div class='add'>+		if (v &amp; FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)</div><div class='add'>+			info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+		if (v &amp; FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F)</div><div class='add'>+			info-&gt;data = RXH_IP_SRC | RXH_IP_DST |</div><div class='add'>+				RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='add'>+		else if (v &amp; FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)</div><div class='add'>+			info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+		if ((v &amp; FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) &amp;&amp;</div><div class='add'>+		    (v &amp; FW_RSS_VI_CONFIG_CMD_UDPEN_F))</div><div class='add'>+			info-&gt;data = RXH_IP_SRC | RXH_IP_DST |</div><div class='add'>+				RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='add'>+		else if (v &amp; FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)</div><div class='add'>+			info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	case SCTP_V6_FLOW:</div><div class='add'>+	case AH_ESP_V6_FLOW:</div><div class='add'>+	case IPV6_FLOW:</div><div class='add'>+		if (v &amp; FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)</div><div class='add'>+			info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='ctx'> 		     u32 *rules)</div><div class='ctx'> {</div><div class='hunk'>@@ -1739,56 +1793,6 @@ static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXFH: {</div><div class='del'>-		unsigned int v = pi-&gt;rss_mode;</div><div class='del'>-</div><div class='del'>-		info-&gt;data = 0;</div><div class='del'>-		switch (info-&gt;flow_type) {</div><div class='del'>-		case TCP_V4_FLOW:</div><div class='del'>-			if (v &amp; FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F)</div><div class='del'>-				info-&gt;data = RXH_IP_SRC | RXH_IP_DST |</div><div class='del'>-					     RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='del'>-			else if (v &amp; FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)</div><div class='del'>-				info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		case UDP_V4_FLOW:</div><div class='del'>-			if ((v &amp; FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN_F) &amp;&amp;</div><div class='del'>-			    (v &amp; FW_RSS_VI_CONFIG_CMD_UDPEN_F))</div><div class='del'>-				info-&gt;data = RXH_IP_SRC | RXH_IP_DST |</div><div class='del'>-					     RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='del'>-			else if (v &amp; FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)</div><div class='del'>-				info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		case SCTP_V4_FLOW:</div><div class='del'>-		case AH_ESP_V4_FLOW:</div><div class='del'>-		case IPV4_FLOW:</div><div class='del'>-			if (v &amp; FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN_F)</div><div class='del'>-				info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		case TCP_V6_FLOW:</div><div class='del'>-			if (v &amp; FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F)</div><div class='del'>-				info-&gt;data = RXH_IP_SRC | RXH_IP_DST |</div><div class='del'>-					     RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='del'>-			else if (v &amp; FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)</div><div class='del'>-				info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		case UDP_V6_FLOW:</div><div class='del'>-			if ((v &amp; FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN_F) &amp;&amp;</div><div class='del'>-			    (v &amp; FW_RSS_VI_CONFIG_CMD_UDPEN_F))</div><div class='del'>-				info-&gt;data = RXH_IP_SRC | RXH_IP_DST |</div><div class='del'>-					     RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='del'>-			else if (v &amp; FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)</div><div class='del'>-				info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		case SCTP_V6_FLOW:</div><div class='del'>-		case AH_ESP_V6_FLOW:</div><div class='del'>-		case IPV6_FLOW:</div><div class='del'>-			if (v &amp; FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN_F)</div><div class='del'>-				info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='ctx'> 	case ETHTOOL_GRXRINGS:</div><div class='ctx'> 		info-&gt;data = pi-&gt;nqsets;</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2199,6 +2203,7 @@ static const struct ethtool_ops cxgb_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size = get_rss_table_size,</div><div class='ctx'> 	.get_rxfh	   = get_rss_table,</div><div class='ctx'> 	.set_rxfh	   = set_rss_table,</div><div class='add'>+	.get_rxfh_fields   = cxgb4_get_rxfh_fields,</div><div class='ctx'> 	.self_test	   = cxgb4_self_test,</div><div class='ctx'> 	.flash_device      = set_flash,</div><div class='ctx'> 	.get_ts_info       = get_ts_info,</div><div class='hunk'>@@ -2270,6 +2275,7 @@ int cxgb4_init_ethtool_filters(struct adapter *adap)</div><div class='ctx'> 		eth_filter-&gt;port[i].bmap = bitmap_zalloc(nentries, GFP_KERNEL);</div><div class='ctx'> 		if (!eth_filter-&gt;port[i].bmap) {</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='add'>+			kvfree(eth_filter-&gt;port[i].loc_array);</div><div class='ctx'> 			goto free_eth_finfo;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c<br/>index 97a261d5357e..043733c5c812 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c</a></div><div class='hunk'>@@ -1799,7 +1799,10 @@ void cxgb4_remove_tid(struct tid_info *t, unsigned int chan, unsigned int tid,</div><div class='ctx'> 	struct adapter *adap = container_of(t, struct adapter, tids);</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(tid_out_of_range(&amp;adap-&gt;tids, tid));</div><div class='add'>+	if (tid_out_of_range(&amp;adap-&gt;tids, tid)) {</div><div class='add'>+		dev_err(adap-&gt;pdev_dev, "tid %d out of range\n", tid);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (t-&gt;tid_tab[tid - adap-&gt;tids.tid_base]) {</div><div class='ctx'> 		t-&gt;tid_tab[tid - adap-&gt;tids.tid_base] = NULL;</div><div class='hunk'>@@ -3039,12 +3042,87 @@ static void cxgb_get_stats(struct net_device *dev,</div><div class='ctx'> 		ns-&gt;rx_length_errors + stats.rx_len_err + ns-&gt;rx_fifo_errors;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int cxgb_hwtstamp_get(struct net_device *dev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct port_info *pi = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	*config = pi-&gt;tstamp_config;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cxgb_hwtstamp_set(struct net_device *dev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct port_info *pi = netdev_priv(dev);</div><div class='add'>+	struct adapter *adapter = pi-&gt;adapter;</div><div class='add'>+</div><div class='add'>+	if (is_t4(adapter-&gt;params.chip)) {</div><div class='add'>+		/* For T4 Adapters */</div><div class='add'>+		switch (config-&gt;rx_filter) {</div><div class='add'>+		case HWTSTAMP_FILTER_NONE:</div><div class='add'>+			pi-&gt;rxtstamp = false;</div><div class='add'>+			break;</div><div class='add'>+		case HWTSTAMP_FILTER_ALL:</div><div class='add'>+			pi-&gt;rxtstamp = true;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -ERANGE;</div><div class='add'>+		}</div><div class='add'>+		pi-&gt;tstamp_config = *config;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		pi-&gt;rxtstamp = false;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+		cxgb4_ptprx_timestamping(pi, pi-&gt;port_id, PTP_TS_L4);</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+		cxgb4_ptprx_timestamping(pi, pi-&gt;port_id, PTP_TS_L2_L4);</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_ALL:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='add'>+		pi-&gt;rxtstamp = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (config-&gt;tx_type == HWTSTAMP_TX_OFF &amp;&amp;</div><div class='add'>+	    config-&gt;rx_filter == HWTSTAMP_FILTER_NONE) {</div><div class='add'>+		if (cxgb4_ptp_txtype(adapter, pi-&gt;port_id) &gt;= 0)</div><div class='add'>+			pi-&gt;ptp_enable = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (config-&gt;rx_filter != HWTSTAMP_FILTER_NONE) {</div><div class='add'>+		if (cxgb4_ptp_redirect_rx_packet(adapter, pi) &gt;= 0)</div><div class='add'>+			pi-&gt;ptp_enable = true;</div><div class='add'>+	}</div><div class='add'>+	pi-&gt;tstamp_config = *config;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int cxgb_ioctl(struct net_device *dev, struct ifreq *req, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int mbox;</div><div class='ctx'> 	int ret = 0, prtad, devad;</div><div class='ctx'> 	struct port_info *pi = netdev_priv(dev);</div><div class='del'>-	struct adapter *adapter = pi-&gt;adapter;</div><div class='ctx'> 	struct mii_ioctl_data *data = (struct mii_ioctl_data *)&amp;req-&gt;ifr_data;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='hunk'>@@ -3073,81 +3151,6 @@ static int cxgb_ioctl(struct net_device *dev, struct ifreq *req, int cmd)</div><div class='ctx'> 			ret = t4_mdio_wr(pi-&gt;adapter, mbox, prtad, devad,</div><div class='ctx'> 					 data-&gt;reg_num, data-&gt;val_in);</div><div class='ctx'> 		break;</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return copy_to_user(req-&gt;ifr_data, &amp;pi-&gt;tstamp_config,</div><div class='del'>-				    sizeof(pi-&gt;tstamp_config)) ?</div><div class='del'>-			-EFAULT : 0;</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		if (copy_from_user(&amp;pi-&gt;tstamp_config, req-&gt;ifr_data,</div><div class='del'>-				   sizeof(pi-&gt;tstamp_config)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-</div><div class='del'>-		if (!is_t4(adapter-&gt;params.chip)) {</div><div class='del'>-			switch (pi-&gt;tstamp_config.tx_type) {</div><div class='del'>-			case HWTSTAMP_TX_OFF:</div><div class='del'>-			case HWTSTAMP_TX_ON:</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				return -ERANGE;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			switch (pi-&gt;tstamp_config.rx_filter) {</div><div class='del'>-			case HWTSTAMP_FILTER_NONE:</div><div class='del'>-				pi-&gt;rxtstamp = false;</div><div class='del'>-				break;</div><div class='del'>-			case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='del'>-			case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='del'>-				cxgb4_ptprx_timestamping(pi, pi-&gt;port_id,</div><div class='del'>-							 PTP_TS_L4);</div><div class='del'>-				break;</div><div class='del'>-			case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='del'>-				cxgb4_ptprx_timestamping(pi, pi-&gt;port_id,</div><div class='del'>-							 PTP_TS_L2_L4);</div><div class='del'>-				break;</div><div class='del'>-			case HWTSTAMP_FILTER_ALL:</div><div class='del'>-			case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='del'>-			case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='del'>-			case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='del'>-			case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='del'>-				pi-&gt;rxtstamp = true;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				pi-&gt;tstamp_config.rx_filter =</div><div class='del'>-					HWTSTAMP_FILTER_NONE;</div><div class='del'>-				return -ERANGE;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if ((pi-&gt;tstamp_config.tx_type == HWTSTAMP_TX_OFF) &amp;&amp;</div><div class='del'>-			    (pi-&gt;tstamp_config.rx_filter ==</div><div class='del'>-				HWTSTAMP_FILTER_NONE)) {</div><div class='del'>-				if (cxgb4_ptp_txtype(adapter, pi-&gt;port_id) &gt;= 0)</div><div class='del'>-					pi-&gt;ptp_enable = false;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (pi-&gt;tstamp_config.rx_filter !=</div><div class='del'>-				HWTSTAMP_FILTER_NONE) {</div><div class='del'>-				if (cxgb4_ptp_redirect_rx_packet(adapter,</div><div class='del'>-								 pi) &gt;= 0)</div><div class='del'>-					pi-&gt;ptp_enable = true;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			/* For T4 Adapters */</div><div class='del'>-			switch (pi-&gt;tstamp_config.rx_filter) {</div><div class='del'>-			case HWTSTAMP_FILTER_NONE:</div><div class='del'>-			pi-&gt;rxtstamp = false;</div><div class='del'>-			break;</div><div class='del'>-			case HWTSTAMP_FILTER_ALL:</div><div class='del'>-			pi-&gt;rxtstamp = true;</div><div class='del'>-			break;</div><div class='del'>-			default:</div><div class='del'>-			pi-&gt;tstamp_config.rx_filter =</div><div class='del'>-			HWTSTAMP_FILTER_NONE;</div><div class='del'>-			return -ERANGE;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		return copy_to_user(req-&gt;ifr_data, &amp;pi-&gt;tstamp_config,</div><div class='del'>-				    sizeof(pi-&gt;tstamp_config)) ?</div><div class='del'>-			-EFAULT : 0;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3234,7 +3237,7 @@ static int cxgb4_mgmt_set_vf_mac(struct net_device *dev, int vf, u8 *mac)</div><div class='ctx'> </div><div class='ctx'> 	dev_info(pi-&gt;adapter-&gt;pdev_dev,</div><div class='ctx'> 		 "Setting MAC %pM on VF %d\n", mac, vf);</div><div class='del'>-	ret = t4_set_vf_mac_acl(adap, vf + 1, 1, mac);</div><div class='add'>+	ret = t4_set_vf_mac_acl(adap, vf + 1, pi-&gt;lport, 1, mac);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ether_addr_copy(adap-&gt;vfinfo[vf].vf_mac_addr, mac);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -3294,7 +3297,7 @@ static int cxgb4_mgmt_set_vf_rate(struct net_device *dev, int vf,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (max_tx_rate == 0) {</div><div class='del'>-		/* unbind VF to to any Traffic Class */</div><div class='add'>+		/* unbind VF to any Traffic Class */</div><div class='ctx'> 		fw_pfvf =</div><div class='ctx'> 		    (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) |</div><div class='ctx'> 		     FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_SCHEDCLASS_ETH));</div><div class='hunk'>@@ -3482,7 +3485,7 @@ static int cxgb_set_tx_maxrate(struct net_device *dev, int index, u32 rate)</div><div class='ctx'> 	struct adapter *adap = pi-&gt;adapter;</div><div class='ctx'> 	struct ch_sched_queue qe = { 0 };</div><div class='ctx'> 	struct ch_sched_params p = { 0 };</div><div class='del'>-	struct sched_class *e;</div><div class='add'>+	struct ch_sched_class *e;</div><div class='ctx'> 	u32 req_rate;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -3872,6 +3875,8 @@ static const struct net_device_ops cxgb4_netdev_ops = {</div><div class='ctx'> 	.ndo_setup_tc         = cxgb_setup_tc,</div><div class='ctx'> 	.ndo_features_check   = cxgb_features_check,</div><div class='ctx'> 	.ndo_fix_features     = cxgb_fix_features,</div><div class='add'>+	.ndo_hwtstamp_get     = cxgb_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set     = cxgb_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='hunk'>@@ -4813,7 +4818,7 @@ static int adap_init0(struct adapter *adap, int vpd_skip)</div><div class='ctx'> 			goto bye;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* Get FW from from /lib/firmware/ */</div><div class='add'>+		/* Get FW from /lib/firmware/ */</div><div class='ctx'> 		ret = request_firmware(&amp;fw, fw_info-&gt;fw_mod_name,</div><div class='ctx'> 				       adap-&gt;pdev_dev);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='hunk'>@@ -5453,7 +5458,6 @@ static pci_ers_result_t eeh_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	if (!adap) {</div><div class='ctx'> 		pci_restore_state(pdev);</div><div class='del'>-		pci_save_state(pdev);</div><div class='ctx'> 		return PCI_ERS_RESULT_RECOVERED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5468,7 +5472,6 @@ static pci_ers_result_t eeh_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 	if (t4_wait_dev_ready(adap-&gt;regs) &lt; 0)</div><div class='ctx'> 		return PCI_ERS_RESULT_DISCONNECT;</div><div class='hunk'>@@ -6477,10 +6480,11 @@ static const struct tlsdev_ops cxgb4_ktls_ops = {</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_CHELSIO_IPSEC_INLINE)</div><div class='ctx'> </div><div class='del'>-static int cxgb4_xfrm_add_state(struct xfrm_state *x,</div><div class='add'>+static int cxgb4_xfrm_add_state(struct net_device *dev,</div><div class='add'>+				struct xfrm_state *x,</div><div class='ctx'> 				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct adapter *adap = netdev2adap(x-&gt;xso.dev);</div><div class='add'>+	struct adapter *adap = netdev2adap(dev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!mutex_trylock(&amp;uld_mutex)) {</div><div class='hunk'>@@ -6491,7 +6495,8 @@ static int cxgb4_xfrm_add_state(struct xfrm_state *x,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> </div><div class='del'>-	ret = adap-&gt;uld[CXGB4_ULD_IPSEC].xfrmdev_ops-&gt;xdo_dev_state_add(x, extack);</div><div class='add'>+	ret = adap-&gt;uld[CXGB4_ULD_IPSEC].xfrmdev_ops-&gt;xdo_dev_state_add(dev, x,</div><div class='add'>+									extack);</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;uld_mutex);</div><div class='hunk'>@@ -6499,9 +6504,9 @@ out_unlock:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cxgb4_xfrm_del_state(struct xfrm_state *x)</div><div class='add'>+static void cxgb4_xfrm_del_state(struct net_device *dev, struct xfrm_state *x)</div><div class='ctx'> {</div><div class='del'>-	struct adapter *adap = netdev2adap(x-&gt;xso.dev);</div><div class='add'>+	struct adapter *adap = netdev2adap(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!mutex_trylock(&amp;uld_mutex)) {</div><div class='ctx'> 		dev_dbg(adap-&gt;pdev_dev,</div><div class='hunk'>@@ -6511,15 +6516,15 @@ static void cxgb4_xfrm_del_state(struct xfrm_state *x)</div><div class='ctx'> 	if (chcr_offload_state(adap, CXGB4_XFRMDEV_OPS))</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> </div><div class='del'>-	adap-&gt;uld[CXGB4_ULD_IPSEC].xfrmdev_ops-&gt;xdo_dev_state_delete(x);</div><div class='add'>+	adap-&gt;uld[CXGB4_ULD_IPSEC].xfrmdev_ops-&gt;xdo_dev_state_delete(dev, x);</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;uld_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cxgb4_xfrm_free_state(struct xfrm_state *x)</div><div class='add'>+static void cxgb4_xfrm_free_state(struct net_device *dev, struct xfrm_state *x)</div><div class='ctx'> {</div><div class='del'>-	struct adapter *adap = netdev2adap(x-&gt;xso.dev);</div><div class='add'>+	struct adapter *adap = netdev2adap(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!mutex_trylock(&amp;uld_mutex)) {</div><div class='ctx'> 		dev_dbg(adap-&gt;pdev_dev,</div><div class='hunk'>@@ -6529,36 +6534,19 @@ static void cxgb4_xfrm_free_state(struct xfrm_state *x)</div><div class='ctx'> 	if (chcr_offload_state(adap, CXGB4_XFRMDEV_OPS))</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> </div><div class='del'>-	adap-&gt;uld[CXGB4_ULD_IPSEC].xfrmdev_ops-&gt;xdo_dev_state_free(x);</div><div class='del'>-</div><div class='del'>-out_unlock:</div><div class='del'>-	mutex_unlock(&amp;uld_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool cxgb4_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *x)</div><div class='del'>-{</div><div class='del'>-	struct adapter *adap = netdev2adap(x-&gt;xso.dev);</div><div class='del'>-	bool ret = false;</div><div class='del'>-</div><div class='del'>-	if (!mutex_trylock(&amp;uld_mutex)) {</div><div class='del'>-		dev_dbg(adap-&gt;pdev_dev,</div><div class='del'>-			"crypto uld critical resource is under use\n");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-	if (chcr_offload_state(adap, CXGB4_XFRMDEV_OPS))</div><div class='del'>-		goto out_unlock;</div><div class='del'>-</div><div class='del'>-	ret = adap-&gt;uld[CXGB4_ULD_IPSEC].xfrmdev_ops-&gt;xdo_dev_offload_ok(skb, x);</div><div class='add'>+	adap-&gt;uld[CXGB4_ULD_IPSEC].xfrmdev_ops-&gt;xdo_dev_state_free(dev, x);</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;uld_mutex);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void cxgb4_advance_esn_state(struct xfrm_state *x)</div><div class='ctx'> {</div><div class='ctx'> 	struct adapter *adap = netdev2adap(x-&gt;xso.dev);</div><div class='ctx'> </div><div class='add'>+	if (x-&gt;xso.dir != XFRM_DEV_OFFLOAD_IN)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (!mutex_trylock(&amp;uld_mutex)) {</div><div class='ctx'> 		dev_dbg(adap-&gt;pdev_dev,</div><div class='ctx'> 			"crypto uld critical resource is under use\n");</div><div class='hunk'>@@ -6577,7 +6565,6 @@ static const struct xfrmdev_ops cxgb4_xfrmdev_ops = {</div><div class='ctx'> 	.xdo_dev_state_add      = cxgb4_xfrm_add_state,</div><div class='ctx'> 	.xdo_dev_state_delete   = cxgb4_xfrm_del_state,</div><div class='ctx'> 	.xdo_dev_state_free     = cxgb4_xfrm_free_state,</div><div class='del'>-	.xdo_dev_offload_ok     = cxgb4_ipsec_offload_ok,</div><div class='ctx'> 	.xdo_dev_state_advance_esn = cxgb4_advance_esn_state,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c<br/>index 69d045d769c4..e2b5554531b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c</a></div><div class='hunk'>@@ -161,20 +161,9 @@ static struct ch_tc_flower_entry *ch_flower_lookup(struct adapter *adap,</div><div class='ctx'> </div><div class='ctx'> static void cxgb4_process_flow_match(struct net_device *dev,</div><div class='ctx'> 				     struct flow_rule *rule,</div><div class='add'>+				     u16 addr_type,</div><div class='ctx'> 				     struct ch_filter_specification *fs)</div><div class='ctx'> {</div><div class='del'>-	u16 addr_type = 0;</div><div class='del'>-</div><div class='del'>-	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {</div><div class='del'>-		struct flow_match_control match;</div><div class='del'>-</div><div class='del'>-		flow_rule_match_control(rule, &amp;match);</div><div class='del'>-		addr_type = match.key-&gt;addr_type;</div><div class='del'>-	} else if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IPV4_ADDRS)) {</div><div class='del'>-		addr_type = FLOW_DISSECTOR_KEY_IPV4_ADDRS;</div><div class='del'>-	} else if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IPV6_ADDRS)) {</div><div class='del'>-		addr_type = FLOW_DISSECTOR_KEY_IPV6_ADDRS;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {</div><div class='ctx'> 		struct flow_match_basic match;</div><div class='hunk'>@@ -327,9 +316,6 @@ static int cxgb4_validate_flow_match(struct netlink_ext_ack *extack,</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (flow_rule_match_has_control_flags(rule, extack))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {</div><div class='ctx'> 		struct flow_match_basic match;</div><div class='ctx'> </div><div class='hunk'>@@ -858,6 +844,7 @@ int cxgb4_flow_rule_replace(struct net_device *dev, struct flow_rule *rule,</div><div class='ctx'> {</div><div class='ctx'> 	struct adapter *adap = netdev2adap(dev);</div><div class='ctx'> 	struct filter_ctx ctx;</div><div class='add'>+	u16 addr_type = 0;</div><div class='ctx'> 	u8 inet_family;</div><div class='ctx'> 	int fidx, ret;</div><div class='ctx'> </div><div class='hunk'>@@ -867,7 +854,28 @@ int cxgb4_flow_rule_replace(struct net_device *dev, struct flow_rule *rule,</div><div class='ctx'> 	if (cxgb4_validate_flow_match(extack, rule))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	cxgb4_process_flow_match(dev, rule, fs);</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {</div><div class='add'>+		struct flow_match_control match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_control(rule, &amp;match);</div><div class='add'>+		addr_type = match.key-&gt;addr_type;</div><div class='add'>+</div><div class='add'>+		if (match.mask-&gt;flags &amp; FLOW_DIS_IS_FRAGMENT) {</div><div class='add'>+			fs-&gt;val.frag = match.key-&gt;flags &amp; FLOW_DIS_IS_FRAGMENT;</div><div class='add'>+			fs-&gt;mask.frag = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!flow_rule_is_supp_control_flags(FLOW_DIS_IS_FRAGMENT,</div><div class='add'>+						     match.mask-&gt;flags, extack))</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	} else if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IPV4_ADDRS)) {</div><div class='add'>+		addr_type = FLOW_DISSECTOR_KEY_IPV4_ADDRS;</div><div class='add'>+	} else if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IPV6_ADDRS)) {</div><div class='add'>+		addr_type = FLOW_DISSECTOR_KEY_IPV6_ADDRS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cxgb4_process_flow_match(dev, rule, addr_type, fs);</div><div class='ctx'> 	cxgb4_process_flow_actions(dev, &amp;rule-&gt;action, fs);</div><div class='ctx'> </div><div class='ctx'> 	fs-&gt;hash = is_filter_exact_match(adap, fs);</div><div class='hunk'>@@ -1051,7 +1059,7 @@ static void ch_flower_stats_handler(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void ch_flower_stats_cb(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct adapter *adap = from_timer(adap, t, flower_stats_timer);</div><div class='add'>+	struct adapter *adap = timer_container_of(adap, t, flower_stats_timer);</div><div class='ctx'> </div><div class='ctx'> 	schedule_work(&amp;adap-&gt;flower_stats_work);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c<br/>index 1672d3afe5be..f8dcf0b4abcd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c</a></div><div class='hunk'>@@ -56,7 +56,7 @@ static int cxgb4_matchall_egress_validate(struct net_device *dev,</div><div class='ctx'> 	struct port_info *pi = netdev2pinfo(dev);</div><div class='ctx'> 	struct flow_action_entry *entry;</div><div class='ctx'> 	struct ch_sched_queue qe;</div><div class='del'>-	struct sched_class *e;</div><div class='add'>+	struct ch_sched_class *e;</div><div class='ctx'> 	u64 max_link_rate;</div><div class='ctx'> 	u32 i, speed;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -180,7 +180,7 @@ static int cxgb4_matchall_alloc_tc(struct net_device *dev,</div><div class='ctx'> 	struct port_info *pi = netdev2pinfo(dev);</div><div class='ctx'> 	struct adapter *adap = netdev2adap(dev);</div><div class='ctx'> 	struct flow_action_entry *entry;</div><div class='del'>-	struct sched_class *e;</div><div class='add'>+	struct ch_sched_class *e;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c<br/>index 338b04f339b3..a2dcd2e24263 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c</a></div><div class='hunk'>@@ -330,7 +330,7 @@ static int cxgb4_mqprio_alloc_tc(struct net_device *dev,</div><div class='ctx'> 	struct cxgb4_tc_port_mqprio *tc_port_mqprio;</div><div class='ctx'> 	struct port_info *pi = netdev2pinfo(dev);</div><div class='ctx'> 	struct adapter *adap = netdev2adap(dev);</div><div class='del'>-	struct sched_class *e;</div><div class='add'>+	struct ch_sched_class *e;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u8 i;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c<br/>index a5d2f84dcdd5..8524246fd67e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c</a></div><div class='hunk'>@@ -186,7 +186,7 @@ int cxgb4_config_knode(struct net_device *dev, struct tc_cls_u32_offload *cls)</div><div class='ctx'> 	link_uhtid = TC_U32_USERHTID(cls-&gt;knode.link_handle);</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure that uhtid is either root u32 (i.e. 0x800)</div><div class='del'>-	 * or a a valid linked bucket.</div><div class='add'>+	 * or a valid linked bucket.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (uhtid != 0x800 &amp;&amp; uhtid &gt;= t-&gt;size)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -422,7 +422,7 @@ int cxgb4_delete_knode(struct net_device *dev, struct tc_cls_u32_offload *cls)</div><div class='ctx'> 	uhtid = TC_U32_USERHTID(cls-&gt;knode.handle);</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure that uhtid is either root u32 (i.e. 0x800)</div><div class='del'>-	 * or a a valid linked bucket.</div><div class='add'>+	 * or a valid linked bucket.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (uhtid != 0x800 &amp;&amp; uhtid &gt;= t-&gt;size)</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c<br/>index b08356060fb4..7bab8da8f6e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c</a></div><div class='hunk'>@@ -29,7 +29,7 @@ static int cxgb4_thermal_get_temp(struct thermal_zone_device *tzdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct thermal_zone_device_ops cxgb4_thermal_ops = {</div><div class='add'>+static const struct thermal_zone_device_ops cxgb4_thermal_ops = {</div><div class='ctx'> 	.get_temp = cxgb4_thermal_get_temp,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/sched.c b/drivers/net/ethernet/chelsio/cxgb4/sched.c<br/>index a1b14468d1ff..38a30aeee122 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/sched.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/sched.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/sched.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/sched.c</a></div><div class='hunk'>@@ -44,7 +44,7 @@ static int t4_sched_class_fw_cmd(struct port_info *pi,</div><div class='ctx'> {</div><div class='ctx'> 	struct adapter *adap = pi-&gt;adapter;</div><div class='ctx'> 	struct sched_table *s = pi-&gt;sched_tbl;</div><div class='del'>-	struct sched_class *e;</div><div class='add'>+	struct ch_sched_class *e;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	e = &amp;s-&gt;tab[p-&gt;u.params.class];</div><div class='hunk'>@@ -122,7 +122,7 @@ static void *t4_sched_entry_lookup(struct port_info *pi,</div><div class='ctx'> 				   const u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	struct sched_table *s = pi-&gt;sched_tbl;</div><div class='del'>-	struct sched_class *e, *end;</div><div class='add'>+	struct ch_sched_class *e, *end;</div><div class='ctx'> 	void *found = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* Look for an entry with matching @val */</div><div class='hunk'>@@ -166,8 +166,8 @@ static void *t4_sched_entry_lookup(struct port_info *pi,</div><div class='ctx'> 	return found;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct sched_class *cxgb4_sched_queue_lookup(struct net_device *dev,</div><div class='del'>-					     struct ch_sched_queue *p)</div><div class='add'>+struct ch_sched_class *cxgb4_sched_queue_lookup(struct net_device *dev,</div><div class='add'>+						struct ch_sched_queue *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct port_info *pi = netdev2pinfo(dev);</div><div class='ctx'> 	struct sched_queue_entry *qe = NULL;</div><div class='hunk'>@@ -187,7 +187,7 @@ static int t4_sched_queue_unbind(struct port_info *pi, struct ch_sched_queue *p)</div><div class='ctx'> 	struct sched_queue_entry *qe = NULL;</div><div class='ctx'> 	struct adapter *adap = pi-&gt;adapter;</div><div class='ctx'> 	struct sge_eth_txq *txq;</div><div class='del'>-	struct sched_class *e;</div><div class='add'>+	struct ch_sched_class *e;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;queue &lt; 0 || p-&gt;queue &gt;= pi-&gt;nqsets)</div><div class='hunk'>@@ -218,7 +218,7 @@ static int t4_sched_queue_bind(struct port_info *pi, struct ch_sched_queue *p)</div><div class='ctx'> 	struct sched_queue_entry *qe = NULL;</div><div class='ctx'> 	struct adapter *adap = pi-&gt;adapter;</div><div class='ctx'> 	struct sge_eth_txq *txq;</div><div class='del'>-	struct sched_class *e;</div><div class='add'>+	struct ch_sched_class *e;</div><div class='ctx'> 	unsigned int qid;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -260,7 +260,7 @@ static int t4_sched_flowc_unbind(struct port_info *pi, struct ch_sched_flowc *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct sched_flowc_entry *fe = NULL;</div><div class='ctx'> 	struct adapter *adap = pi-&gt;adapter;</div><div class='del'>-	struct sched_class *e;</div><div class='add'>+	struct ch_sched_class *e;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;tid &lt; 0 || p-&gt;tid &gt;= adap-&gt;tids.neotids)</div><div class='hunk'>@@ -288,7 +288,7 @@ static int t4_sched_flowc_bind(struct port_info *pi, struct ch_sched_flowc *p)</div><div class='ctx'> 	struct sched_table *s = pi-&gt;sched_tbl;</div><div class='ctx'> 	struct sched_flowc_entry *fe = NULL;</div><div class='ctx'> 	struct adapter *adap = pi-&gt;adapter;</div><div class='del'>-	struct sched_class *e;</div><div class='add'>+	struct ch_sched_class *e;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;tid &lt; 0 || p-&gt;tid &gt;= adap-&gt;tids.neotids)</div><div class='hunk'>@@ -322,7 +322,7 @@ out_err:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void t4_sched_class_unbind_all(struct port_info *pi,</div><div class='del'>-				      struct sched_class *e,</div><div class='add'>+				      struct ch_sched_class *e,</div><div class='ctx'> 				      enum sched_bind_type type)</div><div class='ctx'> {</div><div class='ctx'> 	if (!e)</div><div class='hunk'>@@ -476,12 +476,12 @@ int cxgb4_sched_class_unbind(struct net_device *dev, void *arg,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* If @p is NULL, fetch any available unused class */</div><div class='del'>-static struct sched_class *t4_sched_class_lookup(struct port_info *pi,</div><div class='del'>-						const struct ch_sched_params *p)</div><div class='add'>+static struct ch_sched_class *t4_sched_class_lookup(struct port_info *pi,</div><div class='add'>+						    const struct ch_sched_params *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct sched_table *s = pi-&gt;sched_tbl;</div><div class='del'>-	struct sched_class *found = NULL;</div><div class='del'>-	struct sched_class *e, *end;</div><div class='add'>+	struct ch_sched_class *found = NULL;</div><div class='add'>+	struct ch_sched_class *e, *end;</div><div class='ctx'> </div><div class='ctx'> 	if (!p) {</div><div class='ctx'> 		/* Get any available unused class */</div><div class='hunk'>@@ -522,10 +522,10 @@ static struct sched_class *t4_sched_class_lookup(struct port_info *pi,</div><div class='ctx'> 	return found;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct sched_class *t4_sched_class_alloc(struct port_info *pi,</div><div class='del'>-						struct ch_sched_params *p)</div><div class='add'>+static struct ch_sched_class *t4_sched_class_alloc(struct port_info *pi,</div><div class='add'>+						   struct ch_sched_params *p)</div><div class='ctx'> {</div><div class='del'>-	struct sched_class *e = NULL;</div><div class='add'>+	struct ch_sched_class *e = NULL;</div><div class='ctx'> 	u8 class_id;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -579,8 +579,8 @@ static struct sched_class *t4_sched_class_alloc(struct port_info *pi,</div><div class='ctx'>  * scheduling class with matching @p is found, then the matching class is</div><div class='ctx'>  * returned.</div><div class='ctx'>  */</div><div class='del'>-struct sched_class *cxgb4_sched_class_alloc(struct net_device *dev,</div><div class='del'>-					    struct ch_sched_params *p)</div><div class='add'>+struct ch_sched_class *cxgb4_sched_class_alloc(struct net_device *dev,</div><div class='add'>+					       struct ch_sched_params *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct port_info *pi = netdev2pinfo(dev);</div><div class='ctx'> 	u8 class_id;</div><div class='hunk'>@@ -607,7 +607,7 @@ void cxgb4_sched_class_free(struct net_device *dev, u8 classid)</div><div class='ctx'> 	struct port_info *pi = netdev2pinfo(dev);</div><div class='ctx'> 	struct sched_table *s = pi-&gt;sched_tbl;</div><div class='ctx'> 	struct ch_sched_params p;</div><div class='del'>-	struct sched_class *e;</div><div class='add'>+	struct ch_sched_class *e;</div><div class='ctx'> 	u32 speed;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -640,7 +640,7 @@ void cxgb4_sched_class_free(struct net_device *dev, u8 classid)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void t4_sched_class_free(struct net_device *dev, struct sched_class *e)</div><div class='add'>+static void t4_sched_class_free(struct net_device *dev, struct ch_sched_class *e)</div><div class='ctx'> {</div><div class='ctx'> 	struct port_info *pi = netdev2pinfo(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -660,7 +660,7 @@ struct sched_table *t4_init_sched(unsigned int sched_size)</div><div class='ctx'> 	s-&gt;sched_size = sched_size;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; s-&gt;sched_size; i++) {</div><div class='del'>-		memset(&amp;s-&gt;tab[i], 0, sizeof(struct sched_class));</div><div class='add'>+		memset(&amp;s-&gt;tab[i], 0, sizeof(struct ch_sched_class));</div><div class='ctx'> 		s-&gt;tab[i].idx = i;</div><div class='ctx'> 		s-&gt;tab[i].state = SCHED_STATE_UNUSED;</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;s-&gt;tab[i].entry_list);</div><div class='hunk'>@@ -682,7 +682,7 @@ void t4_cleanup_sched(struct adapter *adap)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; s-&gt;sched_size; i++) {</div><div class='del'>-			struct sched_class *e;</div><div class='add'>+			struct ch_sched_class *e;</div><div class='ctx'> </div><div class='ctx'> 			e = &amp;s-&gt;tab[i];</div><div class='ctx'> 			if (e-&gt;state == SCHED_STATE_ACTIVE)</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/sched.h b/drivers/net/ethernet/chelsio/cxgb4/sched.h<br/>index 6b3c778815f0..4d3b5a757536 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/sched.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/sched.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/sched.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/sched.h</a></div><div class='hunk'>@@ -71,7 +71,7 @@ struct sched_flowc_entry {</div><div class='ctx'> 	struct ch_sched_flowc param;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct sched_class {</div><div class='add'>+struct ch_sched_class {</div><div class='ctx'> 	u8 state;</div><div class='ctx'> 	u8 idx;</div><div class='ctx'> 	struct ch_sched_params info;</div><div class='hunk'>@@ -82,7 +82,7 @@ struct sched_class {</div><div class='ctx'> </div><div class='ctx'> struct sched_table {      /* per port scheduling table */</div><div class='ctx'> 	u8 sched_size;</div><div class='del'>-	struct sched_class tab[] __counted_by(sched_size);</div><div class='add'>+	struct ch_sched_class tab[] __counted_by(sched_size);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline bool can_sched(struct net_device *dev)</div><div class='hunk'>@@ -103,15 +103,15 @@ static inline bool valid_class_id(struct net_device *dev, u8 class_id)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct sched_class *cxgb4_sched_queue_lookup(struct net_device *dev,</div><div class='del'>-					     struct ch_sched_queue *p);</div><div class='add'>+struct ch_sched_class *cxgb4_sched_queue_lookup(struct net_device *dev,</div><div class='add'>+						struct ch_sched_queue *p);</div><div class='ctx'> int cxgb4_sched_class_bind(struct net_device *dev, void *arg,</div><div class='ctx'> 			   enum sched_bind_type type);</div><div class='ctx'> int cxgb4_sched_class_unbind(struct net_device *dev, void *arg,</div><div class='ctx'> 			     enum sched_bind_type type);</div><div class='ctx'> </div><div class='del'>-struct sched_class *cxgb4_sched_class_alloc(struct net_device *dev,</div><div class='del'>-					    struct ch_sched_params *p);</div><div class='add'>+struct ch_sched_class *cxgb4_sched_class_alloc(struct net_device *dev,</div><div class='add'>+					       struct ch_sched_params *p);</div><div class='ctx'> void cxgb4_sched_class_free(struct net_device *dev, u8 classid);</div><div class='ctx'> </div><div class='ctx'> struct sched_table *t4_init_sched(unsigned int size);</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c<br/>index a7d76a8ed050..9fccb8ea9bcd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/sge.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/sge.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/sge.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/sge.c</a></div><div class='hunk'>@@ -163,7 +163,7 @@ static inline unsigned int fl_mtu_bufsize(struct adapter *adapter,</div><div class='ctx'>  * for DMA, but this is of course never sent to the hardware and is only used</div><div class='ctx'>  * to prevent double unmappings.  All of the above requires that the Free List</div><div class='ctx'>  * Buffers which we allocate have the bottom 5 bits free (0) -- i.e. are</div><div class='del'>- * 32-byte or or a power of 2 greater in alignment.  Since the SGE's minimal</div><div class='add'>+ * 32-byte or a power of 2 greater in alignment.  Since the SGE's minimal</div><div class='ctx'>  * Free List Buffer alignment is 32 bytes, this works out for us ...</div><div class='ctx'>  */</div><div class='ctx'> enum {</div><div class='hunk'>@@ -1533,7 +1533,6 @@ static netdev_tx_t cxgb4_eth_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		q = &amp;adap-&gt;sge.ethtxq[qidx + pi-&gt;first_qset];</div><div class='ctx'> 	}</div><div class='del'>-	skb_tx_timestamp(skb);</div><div class='ctx'> </div><div class='ctx'> 	reclaim_completed_tx(adap, &amp;q-&gt;q, -1, true);</div><div class='ctx'> 	cntrl = TXPKT_L4CSUM_DIS_F | TXPKT_IPCSUM_DIS_F;</div><div class='hunk'>@@ -1706,6 +1705,8 @@ static netdev_tx_t cxgb4_eth_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	cpl-&gt;len = htons(skb-&gt;len);</div><div class='ctx'> 	cpl-&gt;ctrl1 = cpu_to_be64(cntrl);</div><div class='ctx'> </div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 	if (immediate) {</div><div class='ctx'> 		cxgb4_inline_tx_skb(skb, &amp;q-&gt;q, sgl);</div><div class='ctx'> 		dev_consume_skb_any(skb);</div><div class='hunk'>@@ -2268,7 +2269,6 @@ static int ethofld_hard_xmit(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	d = &amp;eosw_txq-&gt;desc[eosw_txq-&gt;last_pidx];</div><div class='ctx'> 	skb = d-&gt;skb;</div><div class='del'>-	skb_tx_timestamp(skb);</div><div class='ctx'> </div><div class='ctx'> 	wr = (struct fw_eth_tx_eo_wr *)&amp;eohw_txq-&gt;q.desc[eohw_txq-&gt;q.pidx];</div><div class='ctx'> 	if (unlikely(eosw_txq-&gt;state != CXGB4_EO_STATE_ACTIVE &amp;&amp;</div><div class='hunk'>@@ -2373,6 +2373,7 @@ write_wr_headers:</div><div class='ctx'> 		eohw_txq-&gt;vlan_ins++;</div><div class='ctx'> </div><div class='ctx'> 	txq_advance(&amp;eohw_txq-&gt;q, ndesc);</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='ctx'> 	cxgb4_ring_tx_db(adap, &amp;eohw_txq-&gt;q, ndesc);</div><div class='ctx'> 	eosw_txq_advance_index(&amp;eosw_txq-&gt;last_pidx, 1, eosw_txq-&gt;ndesc);</div><div class='ctx'> </div><div class='hunk'>@@ -4233,7 +4234,7 @@ static void sge_rx_timer_cb(struct timer_list *t)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long m;</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-	struct adapter *adap = from_timer(adap, t, sge.rx_timer);</div><div class='add'>+	struct adapter *adap = timer_container_of(adap, t, sge.rx_timer);</div><div class='ctx'> 	struct sge *s = &amp;adap-&gt;sge;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; BITS_TO_LONGS(s-&gt;egr_sz); i++)</div><div class='hunk'>@@ -4268,7 +4269,7 @@ done:</div><div class='ctx'> </div><div class='ctx'> static void sge_tx_timer_cb(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct adapter *adap = from_timer(adap, t, sge.tx_timer);</div><div class='add'>+	struct adapter *adap = timer_container_of(adap, t, sge.tx_timer);</div><div class='ctx'> 	struct sge *s = &amp;adap-&gt;sge;</div><div class='ctx'> 	unsigned long m, period;</div><div class='ctx'> 	unsigned int i, budget;</div><div class='hunk'>@@ -4996,9 +4997,9 @@ void t4_sge_stop(struct adapter *adap)</div><div class='ctx'> 	struct sge *s = &amp;adap-&gt;sge;</div><div class='ctx'> </div><div class='ctx'> 	if (s-&gt;rx_timer.function)</div><div class='del'>-		del_timer_sync(&amp;s-&gt;rx_timer);</div><div class='add'>+		timer_delete_sync(&amp;s-&gt;rx_timer);</div><div class='ctx'> 	if (s-&gt;tx_timer.function)</div><div class='del'>-		del_timer_sync(&amp;s-&gt;tx_timer);</div><div class='add'>+		timer_delete_sync(&amp;s-&gt;tx_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (is_offload(adap)) {</div><div class='ctx'> 		struct sge_uld_txq_info *txq_info;</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c<br/>index 76de55306c4d..171750fad44f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4/t4_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4/t4_hw.c</a></div><div class='hunk'>@@ -9348,7 +9348,7 @@ int t4_init_devlog_params(struct adapter *adap)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Otherwise, ask the firmware for it's Device Log Parameters.</div><div class='add'>+	/* Otherwise, ask the firmware for its Device Log Parameters.</div><div class='ctx'> 	 */</div><div class='ctx'> 	memset(&amp;devlog_cmd, 0, sizeof(devlog_cmd));</div><div class='ctx'> 	devlog_cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_DEVLOG_CMD) |</div><div class='hunk'>@@ -10215,11 +10215,12 @@ out:</div><div class='ctx'>  *	t4_set_vf_mac_acl - Set MAC address for the specified VF</div><div class='ctx'>  *	@adapter: The adapter</div><div class='ctx'>  *	@vf: one of the VFs instantiated by the specified PF</div><div class='add'>+ *	@start: The start port id associated with specified VF</div><div class='ctx'>  *	@naddr: the number of MAC addresses</div><div class='ctx'>  *	@addr: the MAC address(es) to be set to the specified VF</div><div class='ctx'>  */</div><div class='ctx'> int t4_set_vf_mac_acl(struct adapter *adapter, unsigned int vf,</div><div class='del'>-		      unsigned int naddr, u8 *addr)</div><div class='add'>+		      u8 start, unsigned int naddr, u8 *addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct fw_acl_mac_cmd cmd;</div><div class='ctx'> </div><div class='hunk'>@@ -10234,7 +10235,7 @@ int t4_set_vf_mac_acl(struct adapter *adapter, unsigned int vf,</div><div class='ctx'> 	cmd.en_to_len16 = cpu_to_be32((unsigned int)FW_LEN16(cmd));</div><div class='ctx'> 	cmd.nmac = naddr;</div><div class='ctx'> </div><div class='del'>-	switch (adapter-&gt;pf) {</div><div class='add'>+	switch (start) {</div><div class='ctx'> 	case 3:</div><div class='ctx'> 		memcpy(cmd.macaddr3, addr, sizeof(cmd.macaddr3));</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c b/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c<br/>index 61d08547e3f9..2fbe0f059a0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c</a></div><div class='hunk'>@@ -1436,8 +1436,8 @@ static void fw_caps_to_lmm(enum fw_port_type port_type,</div><div class='ctx'> static int cxgb4vf_get_link_ksettings(struct net_device *dev,</div><div class='ctx'> 				  struct ethtool_link_ksettings *link_ksettings)</div><div class='ctx'> {</div><div class='del'>-	struct ethtool_link_settings_hdr *base = &amp;link_ksettings-&gt;base;</div><div class='ctx'> 	struct port_info *pi = netdev_priv(dev);</div><div class='add'>+	struct ethtool_link_settings *base = &amp;link_ksettings-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	/* For the nonce, the Firmware doesn't send up Port State changes</div><div class='ctx'> 	 * when the Virtual Interface attached to the Port is down.  So</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/sge.c b/drivers/net/ethernet/chelsio/cxgb4vf/sge.c<br/>index 5b1d746e6563..31fab2415743 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4vf/sge.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4vf/sge.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4vf/sge.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4vf/sge.c</a></div><div class='hunk'>@@ -2062,7 +2062,7 @@ irq_handler_t t4vf_intr_handler(struct adapter *adapter)</div><div class='ctx'>  */</div><div class='ctx'> static void sge_rx_timer_cb(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct adapter *adapter = from_timer(adapter, t, sge.rx_timer);</div><div class='add'>+	struct adapter *adapter = timer_container_of(adapter, t, sge.rx_timer);</div><div class='ctx'> 	struct sge *s = &amp;adapter-&gt;sge;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='hunk'>@@ -2121,7 +2121,7 @@ static void sge_rx_timer_cb(struct timer_list *t)</div><div class='ctx'>  */</div><div class='ctx'> static void sge_tx_timer_cb(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct adapter *adapter = from_timer(adapter, t, sge.tx_timer);</div><div class='add'>+	struct adapter *adapter = timer_container_of(adapter, t, sge.tx_timer);</div><div class='ctx'> 	struct sge *s = &amp;adapter-&gt;sge;</div><div class='ctx'> 	unsigned int i, budget;</div><div class='ctx'> </div><div class='hunk'>@@ -2191,7 +2191,7 @@ static void __iomem *bar2_address(struct adapter *adapter,</div><div class='ctx'> /**</div><div class='ctx'>  *	t4vf_sge_alloc_rxq - allocate an SGE RX Queue</div><div class='ctx'>  *	@adapter: the adapter</div><div class='del'>- *	@rspq: pointer to to the new rxq's Response Queue to be filled in</div><div class='add'>+ *	@rspq: pointer to the new rxq's Response Queue to be filled in</div><div class='ctx'>  *	@iqasynch: if 0, a normal rspq; if 1, an asynchronous event queue</div><div class='ctx'>  *	@dev: the network device associated with the new rspq</div><div class='ctx'>  *	@intr_dest: MSI-X vector index (overriden in MSI mode)</div><div class='hunk'>@@ -2609,9 +2609,9 @@ void t4vf_sge_stop(struct adapter *adapter)</div><div class='ctx'> 	struct sge *s = &amp;adapter-&gt;sge;</div><div class='ctx'> </div><div class='ctx'> 	if (s-&gt;rx_timer.function)</div><div class='del'>-		del_timer_sync(&amp;s-&gt;rx_timer);</div><div class='add'>+		timer_delete_sync(&amp;s-&gt;rx_timer);</div><div class='ctx'> 	if (s-&gt;tx_timer.function)</div><div class='del'>-		del_timer_sync(&amp;s-&gt;tx_timer);</div><div class='add'>+		timer_delete_sync(&amp;s-&gt;tx_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c<br/>index 1c52592d3b65..56fcc531af2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c</a></div><div class='hunk'>@@ -706,7 +706,7 @@ int t4vf_fl_pkt_align(struct adapter *adapter)</div><div class='ctx'> 	 * separately.  The actual Ingress Packet Data alignment boundary</div><div class='ctx'> 	 * within Packed Buffer Mode is the maximum of these two</div><div class='ctx'> 	 * specifications.  (Note that it makes no real practical sense to</div><div class='del'>-	 * have the Pading Boudary be larger than the Packing Boundary but you</div><div class='add'>+	 * have the Padding Boundary be larger than the Packing Boundary but you</div><div class='ctx'> 	 * could set the chip up that way and, in fact, legacy T4 code would</div><div class='ctx'> 	 * end doing this because it would initialize the Padding Boundary and</div><div class='ctx'> 	 * leave the Packing Boundary initialized to 0 (16 bytes).)</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c b/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c<br/>index c7338ac6a5bb..49b57bb5fac1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c</a></div><div class='hunk'>@@ -71,21 +71,22 @@</div><div class='ctx'> static LIST_HEAD(uld_ctx_list);</div><div class='ctx'> static DEFINE_MUTEX(dev_mutex);</div><div class='ctx'> </div><div class='del'>-static bool ch_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *x);</div><div class='ctx'> static int ch_ipsec_uld_state_change(void *handle, enum cxgb4_state new_state);</div><div class='ctx'> static int ch_ipsec_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> static void *ch_ipsec_uld_add(const struct cxgb4_lld_info *infop);</div><div class='ctx'> static void ch_ipsec_advance_esn_state(struct xfrm_state *x);</div><div class='del'>-static void ch_ipsec_xfrm_free_state(struct xfrm_state *x);</div><div class='del'>-static void ch_ipsec_xfrm_del_state(struct xfrm_state *x);</div><div class='del'>-static int ch_ipsec_xfrm_add_state(struct xfrm_state *x,</div><div class='add'>+static void ch_ipsec_xfrm_free_state(struct net_device *dev,</div><div class='add'>+				     struct xfrm_state *x);</div><div class='add'>+static void ch_ipsec_xfrm_del_state(struct net_device *dev,</div><div class='add'>+				    struct xfrm_state *x);</div><div class='add'>+static int ch_ipsec_xfrm_add_state(struct net_device *dev,</div><div class='add'>+				   struct xfrm_state *x,</div><div class='ctx'> 				   struct netlink_ext_ack *extack);</div><div class='ctx'> </div><div class='ctx'> static const struct xfrmdev_ops ch_ipsec_xfrmdev_ops = {</div><div class='ctx'> 	.xdo_dev_state_add      = ch_ipsec_xfrm_add_state,</div><div class='ctx'> 	.xdo_dev_state_delete   = ch_ipsec_xfrm_del_state,</div><div class='ctx'> 	.xdo_dev_state_free     = ch_ipsec_xfrm_free_state,</div><div class='del'>-	.xdo_dev_offload_ok     = ch_ipsec_offload_ok,</div><div class='ctx'> 	.xdo_dev_state_advance_esn = ch_ipsec_advance_esn_state,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -225,7 +226,8 @@ out:</div><div class='ctx'>  * returns 0 on success, negative error if failed to send message to FPGA</div><div class='ctx'>  * positive error if FPGA returned a bad response</div><div class='ctx'>  */</div><div class='del'>-static int ch_ipsec_xfrm_add_state(struct xfrm_state *x,</div><div class='add'>+static int ch_ipsec_xfrm_add_state(struct net_device *dev,</div><div class='add'>+				   struct xfrm_state *x,</div><div class='ctx'> 				   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipsec_sa_entry *sa_entry;</div><div class='hunk'>@@ -288,9 +290,15 @@ static int ch_ipsec_xfrm_add_state(struct xfrm_state *x,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (unlikely(!try_module_get(THIS_MODULE))) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to acquire module reference");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	sa_entry = kzalloc(sizeof(*sa_entry), GFP_KERNEL);</div><div class='ctx'> 	if (!sa_entry) {</div><div class='ctx'> 		res = -ENOMEM;</div><div class='add'>+		module_put(THIS_MODULE);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -299,19 +307,20 @@ static int ch_ipsec_xfrm_add_state(struct xfrm_state *x,</div><div class='ctx'> 		sa_entry-&gt;esn = 1;</div><div class='ctx'> 	ch_ipsec_setkey(x, sa_entry);</div><div class='ctx'> 	x-&gt;xso.offload_handle = (unsigned long)sa_entry;</div><div class='del'>-	try_module_get(THIS_MODULE);</div><div class='ctx'> out:</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ch_ipsec_xfrm_del_state(struct xfrm_state *x)</div><div class='add'>+static void ch_ipsec_xfrm_del_state(struct net_device *dev,</div><div class='add'>+				    struct xfrm_state *x)</div><div class='ctx'> {</div><div class='ctx'> 	/* do nothing */</div><div class='ctx'> 	if (!x-&gt;xso.offload_handle)</div><div class='ctx'> 		return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ch_ipsec_xfrm_free_state(struct xfrm_state *x)</div><div class='add'>+static void ch_ipsec_xfrm_free_state(struct net_device *dev,</div><div class='add'>+				     struct xfrm_state *x)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipsec_sa_entry *sa_entry;</div><div class='ctx'> </div><div class='hunk'>@@ -323,20 +332,6 @@ static void ch_ipsec_xfrm_free_state(struct xfrm_state *x)</div><div class='ctx'> 	module_put(THIS_MODULE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool ch_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *x)</div><div class='del'>-{</div><div class='del'>-	if (x-&gt;props.family == AF_INET) {</div><div class='del'>-		/* Offload with IP options is not supported yet */</div><div class='del'>-		if (ip_hdr(skb)-&gt;ihl &gt; 5)</div><div class='del'>-			return false;</div><div class='del'>-	} else {</div><div class='del'>-		/* Offload with IPv6 extension headers is not support yet */</div><div class='del'>-		if (ipv6_ext_hdr(ipv6_hdr(skb)-&gt;nexthdr))</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void ch_ipsec_advance_esn_state(struct xfrm_state *x)</div><div class='ctx'> {</div><div class='ctx'> 	/* do nothing */</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c b/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c<br/>index e8e460a92e0e..4e2096e49684 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c</a></div><div class='hunk'>@@ -1640,6 +1640,7 @@ static int chcr_ktls_tunnel_pkt(struct chcr_ktls_info *tx_info,</div><div class='ctx'> 	cxgb4_write_sgl(skb, &amp;q-&gt;q, pos, end, 0, sgl_sdesc-&gt;addr);</div><div class='ctx'> 	sgl_sdesc-&gt;skb = skb;</div><div class='ctx'> 	chcr_txq_advance(&amp;q-&gt;q, ndesc);</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='ctx'> 	cxgb4_ring_tx_db(tx_info-&gt;adap, &amp;q-&gt;q, ndesc);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1903,7 +1904,6 @@ static int chcr_ktls_sw_fallback(struct sk_buff *skb,</div><div class='ctx'> 	th = tcp_hdr(nskb);</div><div class='ctx'> 	skb_offset = skb_tcp_all_headers(nskb);</div><div class='ctx'> 	data_len = nskb-&gt;len - skb_offset;</div><div class='del'>-	skb_tx_timestamp(nskb);</div><div class='ctx'> </div><div class='ctx'> 	if (chcr_ktls_tunnel_pkt(tx_info, nskb, q))</div><div class='ctx'> 		goto out;</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.c b/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.c<br/>index 6f6525983130..ee0154337a9c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.c</a></div><div class='hunk'>@@ -171,7 +171,7 @@ static void chtls_purge_receive_queue(struct sock *sk)</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 	while ((skb = __skb_dequeue(&amp;sk-&gt;sk_receive_queue)) != NULL) {</div><div class='del'>-		skb_dst_set(skb, (void *)NULL);</div><div class='add'>+		skb_dstref_steal(skb);</div><div class='ctx'> 		kfree_skb(skb);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -194,7 +194,7 @@ static void chtls_purge_recv_queue(struct sock *sk)</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 	while ((skb = __skb_dequeue(&amp;tlsk-&gt;sk_recv_queue)) != NULL) {</div><div class='del'>-		skb_dst_set(skb, NULL);</div><div class='add'>+		skb_dstref_steal(skb);</div><div class='ctx'> 		kfree_skb(skb);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -505,7 +505,7 @@ static void reset_listen_child(struct sock *child)</div><div class='ctx'> </div><div class='ctx'> 	chtls_send_reset(child, CPL_ABORT_SEND_RST, skb);</div><div class='ctx'> 	sock_orphan(child);</div><div class='del'>-	INC_ORPHAN_COUNT(child);</div><div class='add'>+	tcp_orphan_count_inc();</div><div class='ctx'> 	if (child-&gt;sk_state == TCP_CLOSE)</div><div class='ctx'> 		inet_csk_destroy_sock(child);</div><div class='ctx'> }</div><div class='hunk'>@@ -870,7 +870,7 @@ static void do_abort_syn_rcv(struct sock *child, struct sock *parent)</div><div class='ctx'> 		 * created only after 3 way handshake is done.</div><div class='ctx'> 		 */</div><div class='ctx'> 		sock_orphan(child);</div><div class='del'>-		INC_ORPHAN_COUNT(child);</div><div class='add'>+		tcp_orphan_count_inc();</div><div class='ctx'> 		chtls_release_resources(child);</div><div class='ctx'> 		chtls_conn_done(child);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -951,6 +951,7 @@ static unsigned int chtls_select_mss(const struct chtls_sock *csk,</div><div class='ctx'> 	struct tcp_sock *tp;</div><div class='ctx'> 	unsigned int mss;</div><div class='ctx'> 	struct sock *sk;</div><div class='add'>+	u16 user_mss;</div><div class='ctx'> </div><div class='ctx'> 	mss = ntohs(req-&gt;tcpopt.mss);</div><div class='ctx'> 	sk = csk-&gt;sk;</div><div class='hunk'>@@ -969,8 +970,9 @@ static unsigned int chtls_select_mss(const struct chtls_sock *csk,</div><div class='ctx'> 		tcpoptsz += round_up(TCPOLEN_TIMESTAMP, 4);</div><div class='ctx'> </div><div class='ctx'> 	tp-&gt;advmss = dst_metric_advmss(dst);</div><div class='del'>-	if (USER_MSS(tp) &amp;&amp; tp-&gt;advmss &gt; USER_MSS(tp))</div><div class='del'>-		tp-&gt;advmss = USER_MSS(tp);</div><div class='add'>+	user_mss = USER_MSS(tp);</div><div class='add'>+	if (user_mss &amp;&amp; tp-&gt;advmss &gt; user_mss)</div><div class='add'>+		tp-&gt;advmss = user_mss;</div><div class='ctx'> 	if (tp-&gt;advmss &gt; pmtu - iphdrsz)</div><div class='ctx'> 		tp-&gt;advmss = pmtu - iphdrsz;</div><div class='ctx'> 	if (mss &amp;&amp; tp-&gt;advmss &gt; mss)</div><div class='hunk'>@@ -1197,12 +1199,12 @@ static struct sock *chtls_recv_sock(struct sock *lsk,</div><div class='ctx'> 		struct ipv6_pinfo *newnp = inet6_sk(newsk);</div><div class='ctx'> 		struct ipv6_pinfo *np = inet6_sk(lsk);</div><div class='ctx'> </div><div class='del'>-		inet_sk(newsk)-&gt;pinet6 = &amp;newtcp6sk-&gt;inet6;</div><div class='add'>+		newinet-&gt;pinet6 = &amp;newtcp6sk-&gt;inet6;</div><div class='add'>+		newinet-&gt;ipv6_fl_list = NULL;</div><div class='ctx'> 		memcpy(newnp, np, sizeof(struct ipv6_pinfo));</div><div class='ctx'> 		newsk-&gt;sk_v6_daddr = treq-&gt;ir_v6_rmt_addr;</div><div class='ctx'> 		newsk-&gt;sk_v6_rcv_saddr = treq-&gt;ir_v6_loc_addr;</div><div class='ctx'> 		inet6_sk(newsk)-&gt;saddr = treq-&gt;ir_v6_loc_addr;</div><div class='del'>-		newnp-&gt;ipv6_fl_list = NULL;</div><div class='ctx'> 		newnp-&gt;pktoptions = NULL;</div><div class='ctx'> 		newsk-&gt;sk_bound_dev_if = treq-&gt;ir_iif;</div><div class='ctx'> 		newinet-&gt;inet_opt = NULL;</div><div class='hunk'>@@ -1734,7 +1736,7 @@ static int chtls_rx_data(struct chtls_dev *cdev, struct sk_buff *skb)</div><div class='ctx'> 		pr_err("can't find conn. for hwtid %u.\n", hwtid);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	skb_dst_set(skb, NULL);</div><div class='add'>+	skb_dstref_steal(skb);</div><div class='ctx'> 	process_cpl_msg(chtls_recv_data, sk, skb);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1786,7 +1788,7 @@ static int chtls_rx_pdu(struct chtls_dev *cdev, struct sk_buff *skb)</div><div class='ctx'> 		pr_err("can't find conn. for hwtid %u.\n", hwtid);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	skb_dst_set(skb, NULL);</div><div class='add'>+	skb_dstref_steal(skb);</div><div class='ctx'> 	process_cpl_msg(chtls_recv_pdu, sk, skb);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1855,7 +1857,7 @@ static int chtls_rx_cmp(struct chtls_dev *cdev, struct sk_buff *skb)</div><div class='ctx'> 		pr_err("can't find conn. for hwtid %u.\n", hwtid);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	skb_dst_set(skb, NULL);</div><div class='add'>+	skb_dstref_steal(skb);</div><div class='ctx'> 	process_cpl_msg(chtls_rx_hdr, sk, skb);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h b/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h<br/>index f61ca657601c..29ceff5a5fcb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h</a></div><div class='hunk'>@@ -90,12 +90,11 @@ struct deferred_skb_cb {</div><div class='ctx'> </div><div class='ctx'> #define SND_WSCALE(tp) ((tp)-&gt;rx_opt.snd_wscale)</div><div class='ctx'> #define RCV_WSCALE(tp) ((tp)-&gt;rx_opt.rcv_wscale)</div><div class='del'>-#define USER_MSS(tp) ((tp)-&gt;rx_opt.user_mss)</div><div class='add'>+#define USER_MSS(tp) (READ_ONCE((tp)-&gt;rx_opt.user_mss))</div><div class='ctx'> #define TS_RECENT_STAMP(tp) ((tp)-&gt;rx_opt.ts_recent_stamp)</div><div class='ctx'> #define WSCALE_OK(tp) ((tp)-&gt;rx_opt.wscale_ok)</div><div class='ctx'> #define TSTAMP_OK(tp) ((tp)-&gt;rx_opt.tstamp_ok)</div><div class='ctx'> #define SACK_OK(tp) ((tp)-&gt;rx_opt.sack_ok)</div><div class='del'>-#define INC_ORPHAN_COUNT(sk) this_cpu_inc(*(sk)-&gt;sk_prot-&gt;orphan_count)</div><div class='ctx'> </div><div class='ctx'> /* TLS SKB */</div><div class='ctx'> #define skb_ulp_tls_inline(skb)      (ULP_SKB_CB(skb)-&gt;ulp.tls.ofld)</div><div class='hunk'>@@ -171,14 +170,14 @@ static inline void chtls_set_req_addr(struct request_sock *oreq,</div><div class='ctx'> </div><div class='ctx'> static inline void chtls_free_skb(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	skb_dst_set(skb, NULL);</div><div class='add'>+	skb_dstref_steal(skb);</div><div class='ctx'> 	__skb_unlink(skb, &amp;sk-&gt;sk_receive_queue);</div><div class='ctx'> 	__kfree_skb(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void chtls_kfree_skb(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	skb_dst_set(skb, NULL);</div><div class='add'>+	skb_dstref_steal(skb);</div><div class='ctx'> 	__skb_unlink(skb, &amp;sk-&gt;sk_receive_queue);</div><div class='ctx'> 	kfree_skb(skb);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_io.c b/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_io.c<br/>index d567e42e1760..ee19933e2cca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_io.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_io.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_io.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_io.c</a></div><div class='hunk'>@@ -159,19 +159,13 @@ static u8 tcp_state_to_flowc_state(u8 state)</div><div class='ctx'> int send_tx_flowc_wr(struct sock *sk, int compl,</div><div class='ctx'> 		     u32 snd_nxt, u32 rcv_nxt)</div><div class='ctx'> {</div><div class='del'>-	struct flowc_packed {</div><div class='del'>-		struct fw_flowc_wr fc;</div><div class='del'>-		struct fw_flowc_mnemval mnemval[FW_FLOWC_MNEM_MAX];</div><div class='del'>-	} __packed sflowc;</div><div class='add'>+	DEFINE_RAW_FLEX(struct fw_flowc_wr, flowc, mnemval, FW_FLOWC_MNEM_MAX);</div><div class='ctx'> 	int nparams, paramidx, flowclen16, flowclen;</div><div class='del'>-	struct fw_flowc_wr *flowc;</div><div class='ctx'> 	struct chtls_sock *csk;</div><div class='ctx'> 	struct tcp_sock *tp;</div><div class='ctx'> </div><div class='ctx'> 	csk = rcu_dereference_sk_user_data(sk);</div><div class='ctx'> 	tp = tcp_sk(sk);</div><div class='del'>-	memset(&amp;sflowc, 0, sizeof(sflowc));</div><div class='del'>-	flowc = &amp;sflowc.fc;</div><div class='ctx'> </div><div class='ctx'> #define FLOWC_PARAM(__m, __v) \</div><div class='ctx'> 	do { \</div><div class='hunk'>@@ -1096,8 +1090,7 @@ new_buf:</div><div class='ctx'> 			copy = size;</div><div class='ctx'> </div><div class='ctx'> 		if (msg-&gt;msg_flags &amp; MSG_SPLICE_PAGES) {</div><div class='del'>-			err = skb_splice_from_iter(skb, &amp;msg-&gt;msg_iter, copy,</div><div class='del'>-						   sk-&gt;sk_allocation);</div><div class='add'>+			err = skb_splice_from_iter(skb, &amp;msg-&gt;msg_iter, copy);</div><div class='ctx'> 			if (err &lt; 0) {</div><div class='ctx'> 				if (err == -EMSGSIZE)</div><div class='ctx'> 					goto new_buf;</div><div class='hunk'>@@ -1435,7 +1428,7 @@ static int chtls_pt_recvmsg(struct sock *sk, struct msghdr *msg, size_t len,</div><div class='ctx'> 		continue;</div><div class='ctx'> found_ok_skb:</div><div class='ctx'> 		if (!skb-&gt;len) {</div><div class='del'>-			skb_dst_set(skb, NULL);</div><div class='add'>+			skb_dstref_steal(skb);</div><div class='ctx'> 			__skb_unlink(skb, &amp;sk-&gt;sk_receive_queue);</div><div class='ctx'> 			kfree_skb(skb);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_main.c b/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_main.c<br/>index 96fd31d75dfd..daa1ebaef511 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_main.c</a></div><div class='hunk'>@@ -346,8 +346,9 @@ static struct sk_buff *copy_gl_to_skb_pkt(const struct pkt_gl *gl,</div><div class='ctx'> 	 * driver. Once driver synthesizes cpl_pass_accept_req the skb will go</div><div class='ctx'> 	 * through the regular cpl_pass_accept_req processing in TOM.</div><div class='ctx'> 	 */</div><div class='del'>-	skb = alloc_skb(gl-&gt;tot_len + sizeof(struct cpl_pass_accept_req)</div><div class='del'>-			- pktshift, GFP_ATOMIC);</div><div class='add'>+	skb = alloc_skb(size_add(gl-&gt;tot_len,</div><div class='add'>+				 sizeof(struct cpl_pass_accept_req)) -</div><div class='add'>+			pktshift, GFP_ATOMIC);</div><div class='ctx'> 	if (unlikely(!skb))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	__skb_put(skb, gl-&gt;tot_len + sizeof(struct cpl_pass_accept_req)</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/Kconfig b/drivers/net/ethernet/cisco/enic/Kconfig<br/>index ad80c0fa96a6..96709875fe4f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/Kconfig</a></div><div class='hunk'>@@ -6,5 +6,6 @@</div><div class='ctx'> config ENIC</div><div class='ctx'> 	tristate "Cisco VIC Ethernet NIC Support"</div><div class='ctx'> 	depends on PCI</div><div class='add'>+	select PAGE_POOL</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables the support for the Cisco VIC Ethernet card.</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/Makefile b/drivers/net/ethernet/cisco/enic/Makefile<br/>index c3b6febfdbe4..a96b8332e6e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/Makefile</a></div><div class='hunk'>@@ -3,5 +3,5 @@ obj-$(CONFIG_ENIC) := enic.o</div><div class='ctx'> </div><div class='ctx'> enic-y := enic_main.o vnic_cq.o vnic_intr.o vnic_wq.o \</div><div class='ctx'> 	enic_res.o enic_dev.o enic_pp.o vnic_dev.o vnic_rq.o vnic_vic.o \</div><div class='del'>-	enic_ethtool.o enic_api.o enic_clsf.o</div><div class='add'>+	enic_ethtool.o enic_api.o enic_clsf.o enic_rq.o enic_wq.o</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/cq_desc.h b/drivers/net/ethernet/cisco/enic/cq_desc.h<br/>index 462c5435a206..bfb3f14e89f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/cq_desc.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/cq_desc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/cq_desc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/cq_desc.h</a></div><div class='hunk'>@@ -40,28 +40,7 @@ struct cq_desc {</div><div class='ctx'> #define CQ_DESC_COMP_NDX_BITS    12</div><div class='ctx'> #define CQ_DESC_COMP_NDX_MASK    ((1 &lt;&lt; CQ_DESC_COMP_NDX_BITS) - 1)</div><div class='ctx'> </div><div class='del'>-static inline void cq_desc_dec(const struct cq_desc *desc_arg,</div><div class='del'>-	u8 *type, u8 *color, u16 *q_number, u16 *completed_index)</div><div class='del'>-{</div><div class='del'>-	const struct cq_desc *desc = desc_arg;</div><div class='del'>-	const u8 type_color = desc-&gt;type_color;</div><div class='del'>-</div><div class='del'>-	*color = (type_color &gt;&gt; CQ_DESC_COLOR_SHIFT) &amp; CQ_DESC_COLOR_MASK;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Make sure color bit is read from desc *before* other fields</div><div class='del'>-	 * are read from desc.  Hardware guarantees color bit is last</div><div class='del'>-	 * bit (byte) written.  Adding the rmb() prevents the compiler</div><div class='del'>-	 * and/or CPU from reordering the reads which would potentially</div><div class='del'>-	 * result in reading stale values.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	rmb();</div><div class='del'>-</div><div class='del'>-	*type = type_color &amp; CQ_DESC_TYPE_MASK;</div><div class='del'>-	*q_number = le16_to_cpu(desc-&gt;q_number) &amp; CQ_DESC_Q_NUM_MASK;</div><div class='del'>-	*completed_index = le16_to_cpu(desc-&gt;completed_index) &amp;</div><div class='del'>-		CQ_DESC_COMP_NDX_MASK;</div><div class='del'>-}</div><div class='add'>+#define CQ_DESC_32_FI_MASK (BIT(0) | BIT(1))</div><div class='add'>+#define CQ_DESC_64_FI_MASK (BIT(0) | BIT(1))</div><div class='ctx'> </div><div class='ctx'> #endif /* _CQ_DESC_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/cq_enet_desc.h b/drivers/net/ethernet/cisco/enic/cq_enet_desc.h<br/>index d25426470a29..50787cff29db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/cq_enet_desc.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/cq_enet_desc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/cq_enet_desc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/cq_enet_desc.h</a></div><div class='hunk'>@@ -17,12 +17,22 @@ struct cq_enet_wq_desc {</div><div class='ctx'> 	u8 type_color;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,</div><div class='del'>-	u8 *type, u8 *color, u16 *q_number, u16 *completed_index)</div><div class='del'>-{</div><div class='del'>-	cq_desc_dec((struct cq_desc *)desc, type,</div><div class='del'>-		color, q_number, completed_index);</div><div class='del'>-}</div><div class='add'>+/*</div><div class='add'>+ * Defines and Capabilities for CMD_CQ_ENTRY_SIZE_SET</div><div class='add'>+ */</div><div class='add'>+#define VNIC_RQ_ALL (~0ULL)</div><div class='add'>+</div><div class='add'>+#define VNIC_RQ_CQ_ENTRY_SIZE_16 0</div><div class='add'>+#define VNIC_RQ_CQ_ENTRY_SIZE_32 1</div><div class='add'>+#define VNIC_RQ_CQ_ENTRY_SIZE_64 2</div><div class='add'>+</div><div class='add'>+#define VNIC_RQ_CQ_ENTRY_SIZE_16_CAPABLE BIT(VNIC_RQ_CQ_ENTRY_SIZE_16)</div><div class='add'>+#define VNIC_RQ_CQ_ENTRY_SIZE_32_CAPABLE BIT(VNIC_RQ_CQ_ENTRY_SIZE_32)</div><div class='add'>+#define VNIC_RQ_CQ_ENTRY_SIZE_64_CAPABLE BIT(VNIC_RQ_CQ_ENTRY_SIZE_64)</div><div class='add'>+</div><div class='add'>+#define VNIC_RQ_CQ_ENTRY_SIZE_ALL_BIT  (VNIC_RQ_CQ_ENTRY_SIZE_16_CAPABLE | \</div><div class='add'>+					VNIC_RQ_CQ_ENTRY_SIZE_32_CAPABLE | \</div><div class='add'>+					VNIC_RQ_CQ_ENTRY_SIZE_64_CAPABLE)</div><div class='ctx'> </div><div class='ctx'> /* Completion queue descriptor: Ethernet receive queue, 16B */</div><div class='ctx'> struct cq_enet_rq_desc {</div><div class='hunk'>@@ -36,6 +46,45 @@ struct cq_enet_rq_desc {</div><div class='ctx'> 	u8 type_color;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Completion queue descriptor: Ethernet receive queue, 32B */</div><div class='add'>+struct cq_enet_rq_desc_32 {</div><div class='add'>+	__le16 completed_index_flags;</div><div class='add'>+	__le16 q_number_rss_type_flags;</div><div class='add'>+	__le32 rss_hash;</div><div class='add'>+	__le16 bytes_written_flags;</div><div class='add'>+	__le16 vlan;</div><div class='add'>+	__le16 checksum_fcoe;</div><div class='add'>+	u8 flags;</div><div class='add'>+	u8 fetch_index_flags;</div><div class='add'>+	__le32 time_stamp;</div><div class='add'>+	__le16 time_stamp2;</div><div class='add'>+	__le16 pie_info;</div><div class='add'>+	__le32 pie_info2;</div><div class='add'>+	__le16 pie_info3;</div><div class='add'>+	u8 pie_info4;</div><div class='add'>+	u8 type_color;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Completion queue descriptor: Ethernet receive queue, 64B */</div><div class='add'>+struct cq_enet_rq_desc_64 {</div><div class='add'>+	__le16 completed_index_flags;</div><div class='add'>+	__le16 q_number_rss_type_flags;</div><div class='add'>+	__le32 rss_hash;</div><div class='add'>+	__le16 bytes_written_flags;</div><div class='add'>+	__le16 vlan;</div><div class='add'>+	__le16 checksum_fcoe;</div><div class='add'>+	u8 flags;</div><div class='add'>+	u8 fetch_index_flags;</div><div class='add'>+	__le32 time_stamp;</div><div class='add'>+	__le16 time_stamp2;</div><div class='add'>+	__le16 pie_info;</div><div class='add'>+	__le32 pie_info2;</div><div class='add'>+	__le16 pie_info3;</div><div class='add'>+	u8 pie_info4;</div><div class='add'>+	u8 reserved[32];</div><div class='add'>+	u8 type_color;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT          (0x1 &lt;&lt; 12)</div><div class='ctx'> #define CQ_ENET_RQ_DESC_FLAGS_FCOE                  (0x1 &lt;&lt; 13)</div><div class='ctx'> #define CQ_ENET_RQ_DESC_FLAGS_EOP                   (0x1 &lt;&lt; 14)</div><div class='hunk'>@@ -88,85 +137,4 @@ struct cq_enet_rq_desc {</div><div class='ctx'> #define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT         (0x1 &lt;&lt; 6)</div><div class='ctx'> #define CQ_ENET_RQ_DESC_FLAGS_FCS_OK                (0x1 &lt;&lt; 7)</div><div class='ctx'> </div><div class='del'>-static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,</div><div class='del'>-	u8 *type, u8 *color, u16 *q_number, u16 *completed_index,</div><div class='del'>-	u8 *ingress_port, u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type,</div><div class='del'>-	u8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error,</div><div class='del'>-	u8 *vlan_stripped, u16 *vlan_tci, u16 *checksum, u8 *fcoe_sof,</div><div class='del'>-	u8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, u8 *fcoe_eof,</div><div class='del'>-	u8 *tcp_udp_csum_ok, u8 *udp, u8 *tcp, u8 *ipv4_csum_ok,</div><div class='del'>-	u8 *ipv6, u8 *ipv4, u8 *ipv4_fragment, u8 *fcs_ok)</div><div class='del'>-{</div><div class='del'>-	u16 completed_index_flags;</div><div class='del'>-	u16 q_number_rss_type_flags;</div><div class='del'>-	u16 bytes_written_flags;</div><div class='del'>-</div><div class='del'>-	cq_desc_dec((struct cq_desc *)desc, type,</div><div class='del'>-		color, q_number, completed_index);</div><div class='del'>-</div><div class='del'>-	completed_index_flags = le16_to_cpu(desc-&gt;completed_index_flags);</div><div class='del'>-	q_number_rss_type_flags =</div><div class='del'>-		le16_to_cpu(desc-&gt;q_number_rss_type_flags);</div><div class='del'>-	bytes_written_flags = le16_to_cpu(desc-&gt;bytes_written_flags);</div><div class='del'>-</div><div class='del'>-	*ingress_port = (completed_index_flags &amp;</div><div class='del'>-		CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;</div><div class='del'>-	*fcoe = (completed_index_flags &amp; CQ_ENET_RQ_DESC_FLAGS_FCOE) ?</div><div class='del'>-		1 : 0;</div><div class='del'>-	*eop = (completed_index_flags &amp; CQ_ENET_RQ_DESC_FLAGS_EOP) ?</div><div class='del'>-		1 : 0;</div><div class='del'>-	*sop = (completed_index_flags &amp; CQ_ENET_RQ_DESC_FLAGS_SOP) ?</div><div class='del'>-		1 : 0;</div><div class='del'>-</div><div class='del'>-	*rss_type = (u8)((q_number_rss_type_flags &gt;&gt; CQ_DESC_Q_NUM_BITS) &amp;</div><div class='del'>-		CQ_ENET_RQ_DESC_RSS_TYPE_MASK);</div><div class='del'>-	*csum_not_calc = (q_number_rss_type_flags &amp;</div><div class='del'>-		CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;</div><div class='del'>-</div><div class='del'>-	*rss_hash = le32_to_cpu(desc-&gt;rss_hash);</div><div class='del'>-</div><div class='del'>-	*bytes_written = bytes_written_flags &amp;</div><div class='del'>-		CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;</div><div class='del'>-	*packet_error = (bytes_written_flags &amp;</div><div class='del'>-		CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;</div><div class='del'>-	*vlan_stripped = (bytes_written_flags &amp;</div><div class='del'>-		CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Tag Control Information(16) = user_priority(3) + cfi(1) + vlan(12)</div><div class='del'>-	 */</div><div class='del'>-	*vlan_tci = le16_to_cpu(desc-&gt;vlan);</div><div class='del'>-</div><div class='del'>-	if (*fcoe) {</div><div class='del'>-		*fcoe_sof = (u8)(le16_to_cpu(desc-&gt;checksum_fcoe) &amp;</div><div class='del'>-			CQ_ENET_RQ_DESC_FCOE_SOF_MASK);</div><div class='del'>-		*fcoe_fc_crc_ok = (desc-&gt;flags &amp;</div><div class='del'>-			CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;</div><div class='del'>-		*fcoe_enc_error = (desc-&gt;flags &amp;</div><div class='del'>-			CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;</div><div class='del'>-		*fcoe_eof = (u8)((le16_to_cpu(desc-&gt;checksum_fcoe) &gt;&gt;</div><div class='del'>-			CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &amp;</div><div class='del'>-			CQ_ENET_RQ_DESC_FCOE_EOF_MASK);</div><div class='del'>-		*checksum = 0;</div><div class='del'>-	} else {</div><div class='del'>-		*fcoe_sof = 0;</div><div class='del'>-		*fcoe_fc_crc_ok = 0;</div><div class='del'>-		*fcoe_enc_error = 0;</div><div class='del'>-		*fcoe_eof = 0;</div><div class='del'>-		*checksum = le16_to_cpu(desc-&gt;checksum_fcoe);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*tcp_udp_csum_ok =</div><div class='del'>-		(desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;</div><div class='del'>-	*udp = (desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;</div><div class='del'>-	*tcp = (desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;</div><div class='del'>-	*ipv4_csum_ok =</div><div class='del'>-		(desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;</div><div class='del'>-	*ipv6 = (desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;</div><div class='del'>-	*ipv4 = (desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;</div><div class='del'>-	*ipv4_fragment =</div><div class='del'>-		(desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;</div><div class='del'>-	*fcs_ok = (desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif /* _CQ_ENET_DESC_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic.h b/drivers/net/ethernet/cisco/enic/enic.h<br/>index 0cc3644ee855..301b3f3114af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic.h</a></div><div class='hunk'>@@ -17,21 +17,28 @@</div><div class='ctx'> #include "vnic_nic.h"</div><div class='ctx'> #include "vnic_rss.h"</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME		"enic"</div><div class='ctx'> #define DRV_DESCRIPTION		"Cisco VIC Ethernet NIC Driver"</div><div class='ctx'> </div><div class='ctx'> #define ENIC_BARS_MAX		6</div><div class='ctx'> </div><div class='del'>-#define ENIC_WQ_MAX		8</div><div class='del'>-#define ENIC_RQ_MAX		8</div><div class='del'>-#define ENIC_CQ_MAX		(ENIC_WQ_MAX + ENIC_RQ_MAX)</div><div class='del'>-#define ENIC_INTR_MAX		(ENIC_CQ_MAX + 2)</div><div class='add'>+#define ENIC_WQ_MAX		256</div><div class='add'>+#define ENIC_RQ_MAX		256</div><div class='add'>+#define ENIC_RQ_MIN_DEFAULT	8</div><div class='ctx'> </div><div class='ctx'> #define ENIC_WQ_NAPI_BUDGET	256</div><div class='ctx'> </div><div class='ctx'> #define ENIC_AIC_LARGE_PKT_DIFF	3</div><div class='ctx'> </div><div class='add'>+enum ext_cq {</div><div class='add'>+	ENIC_RQ_CQ_ENTRY_SIZE_16,</div><div class='add'>+	ENIC_RQ_CQ_ENTRY_SIZE_32,</div><div class='add'>+	ENIC_RQ_CQ_ENTRY_SIZE_64,</div><div class='add'>+	ENIC_RQ_CQ_ENTRY_SIZE_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct enic_msix_entry {</div><div class='ctx'> 	int requested;</div><div class='ctx'> 	char devname[IFNAMSIZ + 8];</div><div class='hunk'>@@ -77,6 +84,10 @@ struct enic_rx_coal {</div><div class='ctx'> #define ENIC_SET_INSTANCE		(1 &lt;&lt; 3)</div><div class='ctx'> #define ENIC_SET_HOST			(1 &lt;&lt; 4)</div><div class='ctx'> </div><div class='add'>+#define MAX_TSO			BIT(16)</div><div class='add'>+#define WQ_ENET_MAX_DESC_LEN	BIT(WQ_ENET_LEN_BITS)</div><div class='add'>+#define ENIC_DESC_MAX_SPLITS	(MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)</div><div class='add'>+</div><div class='ctx'> struct enic_port_profile {</div><div class='ctx'> 	u32 set;</div><div class='ctx'> 	u8 request;</div><div class='hunk'>@@ -160,8 +171,21 @@ struct enic_rq_stats {</div><div class='ctx'> 	u64 pkt_truncated;		/* truncated pkts */</div><div class='ctx'> 	u64 no_skb;			/* out of skbs */</div><div class='ctx'> 	u64 desc_skip;			/* Rx pkt went into later buffer */</div><div class='add'>+	u64 pp_alloc_fail;		/* page pool alloc failure */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct enic_wq {</div><div class='add'>+	spinlock_t lock;		/* spinlock for wq */</div><div class='add'>+	struct vnic_wq vwq;</div><div class='add'>+	struct enic_wq_stats stats;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct enic_rq {</div><div class='add'>+	struct vnic_rq vrq;</div><div class='add'>+	struct enic_rq_stats stats;</div><div class='add'>+	struct page_pool *pool;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='ctx'> /* Per-instance private data structure */</div><div class='ctx'> struct enic {</div><div class='ctx'> 	struct net_device *netdev;</div><div class='hunk'>@@ -173,8 +197,8 @@ struct enic {</div><div class='ctx'> 	struct work_struct reset;</div><div class='ctx'> 	struct work_struct tx_hang_reset;</div><div class='ctx'> 	struct work_struct change_mtu_work;</div><div class='del'>-	struct msix_entry msix_entry[ENIC_INTR_MAX];</div><div class='del'>-	struct enic_msix_entry msix[ENIC_INTR_MAX];</div><div class='add'>+	struct msix_entry *msix_entry;</div><div class='add'>+	struct enic_msix_entry *msix;</div><div class='ctx'> 	u32 msg_enable;</div><div class='ctx'> 	spinlock_t devcmd_lock;</div><div class='ctx'> 	u8 mac_addr[ETH_ALEN];</div><div class='hunk'>@@ -193,33 +217,30 @@ struct enic {</div><div class='ctx'> 	bool enic_api_busy;</div><div class='ctx'> 	struct enic_port_profile *pp;</div><div class='ctx'> </div><div class='del'>-	/* work queue cache line section */</div><div class='del'>-	____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX];</div><div class='del'>-	spinlock_t wq_lock[ENIC_WQ_MAX];</div><div class='del'>-	struct enic_wq_stats wq_stats[ENIC_WQ_MAX];</div><div class='add'>+	struct enic_wq *wq;</div><div class='add'>+	unsigned int wq_avail;</div><div class='ctx'> 	unsigned int wq_count;</div><div class='ctx'> 	u16 loop_enable;</div><div class='ctx'> 	u16 loop_tag;</div><div class='ctx'> </div><div class='del'>-	/* receive queue cache line section */</div><div class='del'>-	____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX];</div><div class='del'>-	struct enic_rq_stats rq_stats[ENIC_RQ_MAX];</div><div class='add'>+	struct enic_rq *rq;</div><div class='add'>+	unsigned int rq_avail;</div><div class='ctx'> 	unsigned int rq_count;</div><div class='ctx'> 	struct vxlan_offload vxlan;</div><div class='del'>-	struct napi_struct napi[ENIC_RQ_MAX + ENIC_WQ_MAX];</div><div class='add'>+	struct napi_struct *napi;</div><div class='ctx'> </div><div class='del'>-	/* interrupt resource cache line section */</div><div class='del'>-	____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX];</div><div class='add'>+	struct vnic_intr *intr;</div><div class='add'>+	unsigned int intr_avail;</div><div class='ctx'> 	unsigned int intr_count;</div><div class='ctx'> 	u32 __iomem *legacy_pba;		/* memory-mapped */</div><div class='ctx'> </div><div class='del'>-	/* completion queue cache line section */</div><div class='del'>-	____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX];</div><div class='add'>+	struct vnic_cq *cq;</div><div class='add'>+	unsigned int cq_avail;</div><div class='ctx'> 	unsigned int cq_count;</div><div class='ctx'> 	struct enic_rfs_flw_tbl rfs_h;</div><div class='del'>-	u32 rx_copybreak;</div><div class='ctx'> 	u8 rss_key[ENIC_RSS_LEN];</div><div class='ctx'> 	struct vnic_gen_stats gen_stats;</div><div class='add'>+	enum ext_cq ext_cq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline struct net_device *vnic_get_netdev(struct vnic_dev *vdev)</div><div class='hunk'>@@ -272,18 +293,28 @@ static inline unsigned int enic_msix_wq_intr(struct enic *enic,</div><div class='ctx'> 	return enic-&gt;cq[enic_cq_wq(enic, wq)].interrupt_offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int enic_msix_err_intr(struct enic *enic)</div><div class='del'>-{</div><div class='del'>-	return enic-&gt;rq_count + enic-&gt;wq_count;</div><div class='del'>-}</div><div class='add'>+/* MSIX interrupts are organized as the error interrupt, then the notify</div><div class='add'>+ * interrupt followed by all the I/O interrupts.  The error interrupt needs</div><div class='add'>+ * to fit in 7 bits due to hardware constraints</div><div class='add'>+ */</div><div class='add'>+#define ENIC_MSIX_RESERVED_INTR 2</div><div class='add'>+#define ENIC_MSIX_ERR_INTR	0</div><div class='add'>+#define ENIC_MSIX_NOTIFY_INTR	1</div><div class='add'>+#define ENIC_MSIX_IO_INTR_BASE	ENIC_MSIX_RESERVED_INTR</div><div class='add'>+#define ENIC_MSIX_MIN_INTR	(ENIC_MSIX_RESERVED_INTR + 2)</div><div class='ctx'> </div><div class='ctx'> #define ENIC_LEGACY_IO_INTR	0</div><div class='ctx'> #define ENIC_LEGACY_ERR_INTR	1</div><div class='ctx'> #define ENIC_LEGACY_NOTIFY_INTR	2</div><div class='ctx'> </div><div class='add'>+static inline unsigned int enic_msix_err_intr(struct enic *enic)</div><div class='add'>+{</div><div class='add'>+	return ENIC_MSIX_ERR_INTR;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline unsigned int enic_msix_notify_intr(struct enic *enic)</div><div class='ctx'> {</div><div class='del'>-	return enic-&gt;rq_count + enic-&gt;wq_count + 1;</div><div class='add'>+	return ENIC_MSIX_NOTIFY_INTR;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool enic_is_err_intr(struct enic *enic, int intr)</div><div class='hunk'>@@ -331,5 +362,6 @@ int enic_is_valid_vf(struct enic *enic, int vf);</div><div class='ctx'> int enic_is_dynamic(struct enic *enic);</div><div class='ctx'> void enic_set_ethtool_ops(struct net_device *netdev);</div><div class='ctx'> int __enic_set_rsskey(struct enic *enic);</div><div class='add'>+void enic_ext_cq(struct enic *enic);</div><div class='ctx'> </div><div class='ctx'> #endif /* _ENIC_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_clsf.c b/drivers/net/ethernet/cisco/enic/enic_clsf.c<br/>index 9900993b6aea..837f954873ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_clsf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_clsf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_clsf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic_clsf.c</a></div><div class='hunk'>@@ -125,7 +125,7 @@ struct enic_rfs_fltr_node *htbl_fltr_search(struct enic *enic, u16 fltr_id)</div><div class='ctx'> #ifdef CONFIG_RFS_ACCEL</div><div class='ctx'> void enic_flow_may_expire(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct enic *enic = from_timer(enic, t, rfs_h.rfs_may_expire);</div><div class='add'>+	struct enic *enic = timer_container_of(enic, t, rfs_h.rfs_may_expire);</div><div class='ctx'> 	bool res;</div><div class='ctx'> 	int j;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_clsf.h b/drivers/net/ethernet/cisco/enic/enic_clsf.h<br/>index 8c4ce50da6e1..5f5284102fb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_clsf.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_clsf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_clsf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic_clsf.h</a></div><div class='hunk'>@@ -26,7 +26,7 @@ static inline void enic_rfs_timer_start(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> static inline void enic_rfs_timer_stop(struct enic *enic)</div><div class='ctx'> {</div><div class='del'>-	del_timer_sync(&amp;enic-&gt;rfs_h.rfs_may_expire);</div><div class='add'>+	timer_delete_sync(&amp;enic-&gt;rfs_h.rfs_may_expire);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='ctx'> static inline void enic_rfs_timer_start(struct enic *enic) {}</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_ethtool.c b/drivers/net/ethernet/cisco/enic/enic_ethtool.c<br/>index 4fe85780a950..a50f5dad34d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic_ethtool.c</a></div><div class='hunk'>@@ -129,8 +129,8 @@ static void enic_intr_coal_set_rx(struct enic *enic, u32 timer)</div><div class='ctx'> static int enic_get_ksettings(struct net_device *netdev,</div><div class='ctx'> 			      struct ethtool_link_ksettings *ecmd)</div><div class='ctx'> {</div><div class='del'>-	struct ethtool_link_settings_hdr *base = &amp;ecmd-&gt;base;</div><div class='ctx'> 	struct enic *enic = netdev_priv(netdev);</div><div class='add'>+	struct ethtool_link_settings *base = &amp;ecmd-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	ethtool_link_ksettings_add_link_mode(ecmd, supported,</div><div class='ctx'> 					     10000baseT_Full);</div><div class='hunk'>@@ -222,9 +222,9 @@ static void enic_get_ringparam(struct net_device *netdev,</div><div class='ctx'> 	struct enic *enic = netdev_priv(netdev);</div><div class='ctx'> 	struct vnic_enet_config *c = &amp;enic-&gt;config;</div><div class='ctx'> </div><div class='del'>-	ring-&gt;rx_max_pending = ENIC_MAX_RQ_DESCS;</div><div class='add'>+	ring-&gt;rx_max_pending = c-&gt;max_rq_ring;</div><div class='ctx'> 	ring-&gt;rx_pending = c-&gt;rq_desc_count;</div><div class='del'>-	ring-&gt;tx_max_pending = ENIC_MAX_WQ_DESCS;</div><div class='add'>+	ring-&gt;tx_max_pending = c-&gt;max_wq_ring;</div><div class='ctx'> 	ring-&gt;tx_pending = c-&gt;wq_desc_count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -252,18 +252,18 @@ static int enic_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	rx_pending = c-&gt;rq_desc_count;</div><div class='ctx'> 	tx_pending = c-&gt;wq_desc_count;</div><div class='del'>-	if (ring-&gt;rx_pending &gt; ENIC_MAX_RQ_DESCS ||</div><div class='add'>+	if (ring-&gt;rx_pending &gt; c-&gt;max_rq_ring ||</div><div class='ctx'> 	    ring-&gt;rx_pending &lt; ENIC_MIN_RQ_DESCS) {</div><div class='ctx'> 		netdev_info(netdev, "rx pending (%u) not in range [%u,%u]",</div><div class='ctx'> 			    ring-&gt;rx_pending, ENIC_MIN_RQ_DESCS,</div><div class='del'>-			    ENIC_MAX_RQ_DESCS);</div><div class='add'>+	      c-&gt;max_rq_ring);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	if (ring-&gt;tx_pending &gt; ENIC_MAX_WQ_DESCS ||</div><div class='add'>+	if (ring-&gt;tx_pending &gt; c-&gt;max_wq_ring ||</div><div class='ctx'> 	    ring-&gt;tx_pending &lt; ENIC_MIN_WQ_DESCS) {</div><div class='ctx'> 		netdev_info(netdev, "tx pending (%u) not in range [%u,%u]",</div><div class='ctx'> 			    ring-&gt;tx_pending, ENIC_MIN_WQ_DESCS,</div><div class='del'>-			    ENIC_MAX_WQ_DESCS);</div><div class='add'>+			c-&gt;max_wq_ring);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (running)</div><div class='hunk'>@@ -337,7 +337,7 @@ static void enic_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 	for (i = 0; i &lt; NUM_ENIC_GEN_STATS; i++)</div><div class='ctx'> 		*(data++) = ((u64 *)&amp;enic-&gt;gen_stats)[enic_gen_stats[i].index];</div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;rq_count; i++) {</div><div class='del'>-		struct enic_rq_stats *rqstats = &amp;enic-&gt;rq_stats[i];</div><div class='add'>+		struct enic_rq_stats *rqstats = &amp;enic-&gt;rq[i].stats;</div><div class='ctx'> 		int index;</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; NUM_ENIC_PER_RQ_STATS; j++) {</div><div class='hunk'>@@ -346,7 +346,7 @@ static void enic_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;wq_count; i++) {</div><div class='del'>-		struct enic_wq_stats *wqstats = &amp;enic-&gt;wq_stats[i];</div><div class='add'>+		struct enic_wq_stats *wqstats = &amp;enic-&gt;wq[i].stats;</div><div class='ctx'> 		int index;</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; NUM_ENIC_PER_WQ_STATS; j++) {</div><div class='hunk'>@@ -528,8 +528,10 @@ static int enic_grxclsrule(struct enic *enic, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int enic_get_rx_flow_hash(struct enic *enic, struct ethtool_rxnfc *cmd)</div><div class='add'>+static int enic_get_rx_flow_hash(struct net_device *dev,</div><div class='add'>+				 struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct enic *enic = netdev_priv(dev);</div><div class='ctx'> 	u8 rss_hash_type = 0;</div><div class='ctx'> 	cmd-&gt;data = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -597,9 +599,6 @@ static int enic_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 		ret = enic_grxclsrule(enic, cmd);</div><div class='ctx'> 		spin_unlock_bh(&amp;enic-&gt;rfs_h.lock);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ret = enic_get_rx_flow_hash(enic, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = -EOPNOTSUPP;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -608,43 +607,6 @@ static int enic_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int enic_get_tunable(struct net_device *dev,</div><div class='del'>-			    const struct ethtool_tunable *tuna, void *data)</div><div class='del'>-{</div><div class='del'>-	struct enic *enic = netdev_priv(dev);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (tuna-&gt;id) {</div><div class='del'>-	case ETHTOOL_RX_COPYBREAK:</div><div class='del'>-		*(u32 *)data = enic-&gt;rx_copybreak;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enic_set_tunable(struct net_device *dev,</div><div class='del'>-			    const struct ethtool_tunable *tuna,</div><div class='del'>-			    const void *data)</div><div class='del'>-{</div><div class='del'>-	struct enic *enic = netdev_priv(dev);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (tuna-&gt;id) {</div><div class='del'>-	case ETHTOOL_RX_COPYBREAK:</div><div class='del'>-		enic-&gt;rx_copybreak = *(u32 *)data;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u32 enic_get_rxfh_key_size(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	return ENIC_RSS_LEN;</div><div class='hunk'>@@ -695,8 +657,8 @@ static void enic_get_channels(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	switch (vnic_dev_get_intr_mode(enic-&gt;vdev)) {</div><div class='ctx'> 	case VNIC_DEV_INTR_MODE_MSIX:</div><div class='del'>-		channels-&gt;max_rx = ENIC_RQ_MAX;</div><div class='del'>-		channels-&gt;max_tx = ENIC_WQ_MAX;</div><div class='add'>+		channels-&gt;max_rx = min(enic-&gt;rq_avail, ENIC_RQ_MAX);</div><div class='add'>+		channels-&gt;max_tx = min(enic-&gt;wq_avail, ENIC_WQ_MAX);</div><div class='ctx'> 		channels-&gt;rx_count = enic-&gt;rq_count;</div><div class='ctx'> 		channels-&gt;tx_count = enic-&gt;wq_count;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -727,11 +689,10 @@ static const struct ethtool_ops enic_ethtool_ops = {</div><div class='ctx'> 	.get_coalesce = enic_get_coalesce,</div><div class='ctx'> 	.set_coalesce = enic_set_coalesce,</div><div class='ctx'> 	.get_rxnfc = enic_get_rxnfc,</div><div class='del'>-	.get_tunable = enic_get_tunable,</div><div class='del'>-	.set_tunable = enic_set_tunable,</div><div class='ctx'> 	.get_rxfh_key_size = enic_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh = enic_get_rxfh,</div><div class='ctx'> 	.set_rxfh = enic_set_rxfh,</div><div class='add'>+	.get_rxfh_fields = enic_get_rx_flow_hash,</div><div class='ctx'> 	.get_link_ksettings = enic_get_ksettings,</div><div class='ctx'> 	.get_ts_info = enic_get_ts_info,</div><div class='ctx'> 	.get_channels = enic_get_channels,</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c<br/>index ffed14b63d41..6bc8dfdb3d4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic_main.c</a></div><div class='hunk'>@@ -58,18 +58,15 @@</div><div class='ctx'> #include "enic_dev.h"</div><div class='ctx'> #include "enic_pp.h"</div><div class='ctx'> #include "enic_clsf.h"</div><div class='add'>+#include "enic_rq.h"</div><div class='add'>+#include "enic_wq.h"</div><div class='ctx'> </div><div class='ctx'> #define ENIC_NOTIFY_TIMER_PERIOD	(2 * HZ)</div><div class='del'>-#define WQ_ENET_MAX_DESC_LEN		(1 &lt;&lt; WQ_ENET_LEN_BITS)</div><div class='del'>-#define MAX_TSO				(1 &lt;&lt; 16)</div><div class='del'>-#define ENIC_DESC_MAX_SPLITS		(MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)</div><div class='ctx'> </div><div class='ctx'> #define PCI_DEVICE_ID_CISCO_VIC_ENET         0x0043  /* ethernet vnic */</div><div class='ctx'> #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN     0x0044  /* enet dynamic vnic */</div><div class='ctx'> #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF      0x0071  /* enet SRIOV VF */</div><div class='ctx'> </div><div class='del'>-#define RX_COPYBREAK_DEFAULT		256</div><div class='del'>-</div><div class='ctx'> /* Supported devices */</div><div class='ctx'> static const struct pci_device_id enic_id_table[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },</div><div class='hunk'>@@ -109,7 +106,7 @@ static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = {</div><div class='ctx'> static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = {</div><div class='ctx'> 	{0,  0}, /* 0  - 4  Gbps */</div><div class='ctx'> 	{0,  3}, /* 4  - 10 Gbps */</div><div class='del'>-	{3,  6}, /* 10 - 40 Gbps */</div><div class='add'>+	{3,  6}, /* 10+ Gbps */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void enic_init_affinity_hint(struct enic *enic)</div><div class='hunk'>@@ -322,54 +319,6 @@ int enic_is_valid_vf(struct enic *enic, int vf)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)</div><div class='del'>-{</div><div class='del'>-	struct enic *enic = vnic_dev_priv(wq-&gt;vdev);</div><div class='del'>-</div><div class='del'>-	if (buf-&gt;sop)</div><div class='del'>-		dma_unmap_single(&amp;enic-&gt;pdev-&gt;dev, buf-&gt;dma_addr, buf-&gt;len,</div><div class='del'>-				 DMA_TO_DEVICE);</div><div class='del'>-	else</div><div class='del'>-		dma_unmap_page(&amp;enic-&gt;pdev-&gt;dev, buf-&gt;dma_addr, buf-&gt;len,</div><div class='del'>-			       DMA_TO_DEVICE);</div><div class='del'>-</div><div class='del'>-	if (buf-&gt;os_buf)</div><div class='del'>-		dev_kfree_skb_any(buf-&gt;os_buf);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enic_wq_free_buf(struct vnic_wq *wq,</div><div class='del'>-	struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)</div><div class='del'>-{</div><div class='del'>-	struct enic *enic = vnic_dev_priv(wq-&gt;vdev);</div><div class='del'>-</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].cq_work++;</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].cq_bytes += buf-&gt;len;</div><div class='del'>-	enic_free_wq_buf(wq, buf);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,</div><div class='del'>-	u8 type, u16 q_number, u16 completed_index, void *opaque)</div><div class='del'>-{</div><div class='del'>-	struct enic *enic = vnic_dev_priv(vdev);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;enic-&gt;wq_lock[q_number]);</div><div class='del'>-</div><div class='del'>-	vnic_wq_service(&amp;enic-&gt;wq[q_number], cq_desc,</div><div class='del'>-		completed_index, enic_wq_free_buf,</div><div class='del'>-		opaque);</div><div class='del'>-</div><div class='del'>-	if (netif_tx_queue_stopped(netdev_get_tx_queue(enic-&gt;netdev, q_number)) &amp;&amp;</div><div class='del'>-	    vnic_wq_desc_avail(&amp;enic-&gt;wq[q_number]) &gt;=</div><div class='del'>-	    (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) {</div><div class='del'>-		netif_wake_subqueue(enic-&gt;netdev, q_number);</div><div class='del'>-		enic-&gt;wq_stats[q_number].wake++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;enic-&gt;wq_lock[q_number]);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool enic_log_q_error(struct enic *enic)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='hunk'>@@ -377,7 +326,7 @@ static bool enic_log_q_error(struct enic *enic)</div><div class='ctx'> 	bool err = false;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;wq_count; i++) {</div><div class='del'>-		error_status = vnic_wq_error_status(&amp;enic-&gt;wq[i]);</div><div class='add'>+		error_status = vnic_wq_error_status(&amp;enic-&gt;wq[i].vwq);</div><div class='ctx'> 		err |= error_status;</div><div class='ctx'> 		if (error_status)</div><div class='ctx'> 			netdev_err(enic-&gt;netdev, "WQ[%d] error_status %d\n",</div><div class='hunk'>@@ -385,7 +334,7 @@ static bool enic_log_q_error(struct enic *enic)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;rq_count; i++) {</div><div class='del'>-		error_status = vnic_rq_error_status(&amp;enic-&gt;rq[i]);</div><div class='add'>+		error_status = vnic_rq_error_status(&amp;enic-&gt;rq[i].vrq);</div><div class='ctx'> 		err |= error_status;</div><div class='ctx'> 		if (error_status)</div><div class='ctx'> 			netdev_err(enic-&gt;netdev, "RQ[%d] error_status %d\n",</div><div class='hunk'>@@ -428,6 +377,36 @@ static void enic_mtu_check(struct enic *enic)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void enic_set_rx_coal_setting(struct enic *enic)</div><div class='add'>+{</div><div class='add'>+	unsigned int speed;</div><div class='add'>+	int index = -1;</div><div class='add'>+	struct enic_rx_coal *rx_coal = &amp;enic-&gt;rx_coalesce_setting;</div><div class='add'>+</div><div class='add'>+	/* 1. Read the link speed from fw</div><div class='add'>+	 * 2. Pick the default range for the speed</div><div class='add'>+	 * 3. Update it in enic-&gt;rx_coalesce_setting</div><div class='add'>+	 */</div><div class='add'>+	speed = vnic_dev_port_speed(enic-&gt;vdev);</div><div class='add'>+	if (speed &gt; ENIC_LINK_SPEED_10G)</div><div class='add'>+		index = ENIC_LINK_40G_INDEX;</div><div class='add'>+	else if (speed &gt; ENIC_LINK_SPEED_4G)</div><div class='add'>+		index = ENIC_LINK_10G_INDEX;</div><div class='add'>+	else</div><div class='add'>+		index = ENIC_LINK_4G_INDEX;</div><div class='add'>+</div><div class='add'>+	rx_coal-&gt;small_pkt_range_start = mod_range[index].small_pkt_range_start;</div><div class='add'>+	rx_coal-&gt;large_pkt_range_start = mod_range[index].large_pkt_range_start;</div><div class='add'>+	rx_coal-&gt;range_end = ENIC_RX_COALESCE_RANGE_END;</div><div class='add'>+</div><div class='add'>+	/* Start with the value provided by UCSM */</div><div class='add'>+	for (index = 0; index &lt; enic-&gt;rq_count; index++)</div><div class='add'>+		enic-&gt;cq[index].cur_rx_coal_timeval =</div><div class='add'>+				enic-&gt;config.intr_timer_usec;</div><div class='add'>+</div><div class='add'>+	rx_coal-&gt;use_adaptive_rx_coalesce = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void enic_link_check(struct enic *enic)</div><div class='ctx'> {</div><div class='ctx'> 	int link_status = vnic_dev_link_status(enic-&gt;vdev);</div><div class='hunk'>@@ -436,6 +415,7 @@ static void enic_link_check(struct enic *enic)</div><div class='ctx'> 	if (link_status &amp;&amp; !carrier_ok) {</div><div class='ctx'> 		netdev_info(enic-&gt;netdev, "Link UP\n");</div><div class='ctx'> 		netif_carrier_on(enic-&gt;netdev);</div><div class='add'>+		enic_set_rx_coal_setting(enic);</div><div class='ctx'> 	} else if (!link_status &amp;&amp; carrier_ok) {</div><div class='ctx'> 		netdev_info(enic-&gt;netdev, "Link DOWN\n");</div><div class='ctx'> 		netif_carrier_off(enic-&gt;netdev);</div><div class='hunk'>@@ -598,9 +578,9 @@ static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq,</div><div class='ctx'> 		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);</div><div class='ctx'> </div><div class='ctx'> 	/* The enic_queue_wq_desc() above does not do HW checksum */</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].csum_none++;</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].packets++;</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].bytes += skb-&gt;len;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.csum_none++;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.packets++;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.bytes += skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -634,9 +614,9 @@ static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq,</div><div class='ctx'> 	if (!eop)</div><div class='ctx'> 		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);</div><div class='ctx'> </div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].csum_partial++;</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].packets++;</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].bytes += skb-&gt;len;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.csum_partial++;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.packets++;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.bytes += skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -699,11 +679,11 @@ static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq,</div><div class='ctx'> 	if (skb-&gt;encapsulation) {</div><div class='ctx'> 		hdr_len = skb_inner_tcp_all_headers(skb);</div><div class='ctx'> 		enic_preload_tcp_csum_encap(skb);</div><div class='del'>-		enic-&gt;wq_stats[wq-&gt;index].encap_tso++;</div><div class='add'>+		enic-&gt;wq[wq-&gt;index].stats.encap_tso++;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		hdr_len = skb_tcp_all_headers(skb);</div><div class='ctx'> 		enic_preload_tcp_csum(skb);</div><div class='del'>-		enic-&gt;wq_stats[wq-&gt;index].tso++;</div><div class='add'>+		enic-&gt;wq[wq-&gt;index].stats.tso++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Queue WQ_ENET_MAX_DESC_LEN length descriptors</div><div class='hunk'>@@ -757,8 +737,8 @@ tso_out_stats:</div><div class='ctx'> 	pkts = len / mss;</div><div class='ctx'> 	if ((len % mss) &gt; 0)</div><div class='ctx'> 		pkts++;</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].packets += pkts;</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].bytes += (len + (pkts * hdr_len));</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.packets += pkts;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.bytes += (len + (pkts * hdr_len));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -792,9 +772,9 @@ static inline int enic_queue_wq_skb_encap(struct enic *enic, struct vnic_wq *wq,</div><div class='ctx'> 	if (!eop)</div><div class='ctx'> 		err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);</div><div class='ctx'> </div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].encap_csum++;</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].packets++;</div><div class='del'>-	enic-&gt;wq_stats[wq-&gt;index].bytes += skb-&gt;len;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.encap_csum++;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.packets++;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.bytes += skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -812,7 +792,7 @@ static inline int enic_queue_wq_skb(struct enic *enic,</div><div class='ctx'> 		/* VLAN tag from trunking driver */</div><div class='ctx'> 		vlan_tag_insert = 1;</div><div class='ctx'> 		vlan_tag = skb_vlan_tag_get(skb);</div><div class='del'>-		enic-&gt;wq_stats[wq-&gt;index].add_vlan++;</div><div class='add'>+		enic-&gt;wq[wq-&gt;index].stats.add_vlan++;</div><div class='ctx'> 	} else if (enic-&gt;loop_enable) {</div><div class='ctx'> 		vlan_tag = enic-&gt;loop_tag;</div><div class='ctx'> 		loopback = 1;</div><div class='hunk'>@@ -859,11 +839,11 @@ static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	struct netdev_queue *txq;</div><div class='ctx'> </div><div class='ctx'> 	txq_map = skb_get_queue_mapping(skb) % enic-&gt;wq_count;</div><div class='del'>-	wq = &amp;enic-&gt;wq[txq_map];</div><div class='add'>+	wq = &amp;enic-&gt;wq[txq_map].vwq;</div><div class='ctx'> </div><div class='ctx'> 	if (skb-&gt;len &lt;= 0) {</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='del'>-		enic-&gt;wq_stats[wq-&gt;index].null_pkt++;</div><div class='add'>+		enic-&gt;wq[wq-&gt;index].stats.null_pkt++;</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -878,19 +858,19 @@ static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	    skb_shinfo(skb)-&gt;nr_frags + 1 &gt; ENIC_NON_TSO_MAX_DESC &amp;&amp;</div><div class='ctx'> 	    skb_linearize(skb)) {</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='del'>-		enic-&gt;wq_stats[wq-&gt;index].skb_linear_fail++;</div><div class='add'>+		enic-&gt;wq[wq-&gt;index].stats.skb_linear_fail++;</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;enic-&gt;wq_lock[txq_map]);</div><div class='add'>+	spin_lock(&amp;enic-&gt;wq[txq_map].lock);</div><div class='ctx'> </div><div class='ctx'> 	if (vnic_wq_desc_avail(wq) &lt;</div><div class='ctx'> 	    skb_shinfo(skb)-&gt;nr_frags + ENIC_DESC_MAX_SPLITS) {</div><div class='ctx'> 		netif_tx_stop_queue(txq);</div><div class='ctx'> 		/* This is a hard error, log it */</div><div class='ctx'> 		netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");</div><div class='del'>-		spin_unlock(&amp;enic-&gt;wq_lock[txq_map]);</div><div class='del'>-		enic-&gt;wq_stats[wq-&gt;index].desc_full_awake++;</div><div class='add'>+		spin_unlock(&amp;enic-&gt;wq[txq_map].lock);</div><div class='add'>+		enic-&gt;wq[wq-&gt;index].stats.desc_full_awake++;</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -899,14 +879,14 @@ static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	if (vnic_wq_desc_avail(wq) &lt; MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS) {</div><div class='ctx'> 		netif_tx_stop_queue(txq);</div><div class='del'>-		enic-&gt;wq_stats[wq-&gt;index].stopped++;</div><div class='add'>+		enic-&gt;wq[wq-&gt;index].stats.stopped++;</div><div class='ctx'> 	}</div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='ctx'> 	if (!netdev_xmit_more() || netif_xmit_stopped(txq))</div><div class='ctx'> 		vnic_wq_doorbell(wq);</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='del'>-	spin_unlock(&amp;enic-&gt;wq_lock[txq_map]);</div><div class='add'>+	spin_unlock(&amp;enic-&gt;wq[txq_map].lock);</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -940,10 +920,10 @@ static void enic_get_stats(struct net_device *netdev,</div><div class='ctx'> 	net_stats-&gt;rx_errors = stats-&gt;rx.rx_errors;</div><div class='ctx'> 	net_stats-&gt;multicast = stats-&gt;rx.rx_multicast_frames_ok;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ENIC_RQ_MAX; i++) {</div><div class='del'>-		struct enic_rq_stats *rqs = &amp;enic-&gt;rq_stats[i];</div><div class='add'>+	for (i = 0; i &lt; enic-&gt;rq_count; i++) {</div><div class='add'>+		struct enic_rq_stats *rqs = &amp;enic-&gt;rq[i].stats;</div><div class='ctx'> </div><div class='del'>-		if (!enic-&gt;rq-&gt;ctrl)</div><div class='add'>+		if (!enic-&gt;rq[i].vrq.ctrl)</div><div class='ctx'> 			break;</div><div class='ctx'> 		pkt_truncated += rqs-&gt;pkt_truncated;</div><div class='ctx'> 		bad_fcs += rqs-&gt;bad_fcs;</div><div class='hunk'>@@ -1282,243 +1262,6 @@ nla_put_failure:</div><div class='ctx'> 	return -EMSGSIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)</div><div class='del'>-{</div><div class='del'>-	struct enic *enic = vnic_dev_priv(rq-&gt;vdev);</div><div class='del'>-</div><div class='del'>-	if (!buf-&gt;os_buf)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	dma_unmap_single(&amp;enic-&gt;pdev-&gt;dev, buf-&gt;dma_addr, buf-&gt;len,</div><div class='del'>-			 DMA_FROM_DEVICE);</div><div class='del'>-	dev_kfree_skb_any(buf-&gt;os_buf);</div><div class='del'>-	buf-&gt;os_buf = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enic_rq_alloc_buf(struct vnic_rq *rq)</div><div class='del'>-{</div><div class='del'>-	struct enic *enic = vnic_dev_priv(rq-&gt;vdev);</div><div class='del'>-	struct net_device *netdev = enic-&gt;netdev;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	unsigned int len = netdev-&gt;mtu + VLAN_ETH_HLEN;</div><div class='del'>-	unsigned int os_buf_index = 0;</div><div class='del'>-	dma_addr_t dma_addr;</div><div class='del'>-	struct vnic_rq_buf *buf = rq-&gt;to_use;</div><div class='del'>-</div><div class='del'>-	if (buf-&gt;os_buf) {</div><div class='del'>-		enic_queue_rq_desc(rq, buf-&gt;os_buf, os_buf_index, buf-&gt;dma_addr,</div><div class='del'>-				   buf-&gt;len);</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	skb = netdev_alloc_skb_ip_align(netdev, len);</div><div class='del'>-	if (!skb) {</div><div class='del'>-		enic-&gt;rq_stats[rq-&gt;index].no_skb++;</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dma_addr = dma_map_single(&amp;enic-&gt;pdev-&gt;dev, skb-&gt;data, len,</div><div class='del'>-				  DMA_FROM_DEVICE);</div><div class='del'>-	if (unlikely(enic_dma_map_check(enic, dma_addr))) {</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	enic_queue_rq_desc(rq, skb, os_buf_index,</div><div class='del'>-		dma_addr, len);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size,</div><div class='del'>-				      u32 pkt_len)</div><div class='del'>-{</div><div class='del'>-	if (ENIC_LARGE_PKT_THRESHOLD &lt;= pkt_len)</div><div class='del'>-		pkt_size-&gt;large_pkt_bytes_cnt += pkt_len;</div><div class='del'>-	else</div><div class='del'>-		pkt_size-&gt;small_pkt_bytes_cnt += pkt_len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb,</div><div class='del'>-			     struct vnic_rq_buf *buf, u16 len)</div><div class='del'>-{</div><div class='del'>-	struct enic *enic = netdev_priv(netdev);</div><div class='del'>-	struct sk_buff *new_skb;</div><div class='del'>-</div><div class='del'>-	if (len &gt; enic-&gt;rx_copybreak)</div><div class='del'>-		return false;</div><div class='del'>-	new_skb = netdev_alloc_skb_ip_align(netdev, len);</div><div class='del'>-	if (!new_skb)</div><div class='del'>-		return false;</div><div class='del'>-	dma_sync_single_for_cpu(&amp;enic-&gt;pdev-&gt;dev, buf-&gt;dma_addr, len,</div><div class='del'>-				DMA_FROM_DEVICE);</div><div class='del'>-	memcpy(new_skb-&gt;data, (*skb)-&gt;data, len);</div><div class='del'>-	*skb = new_skb;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enic_rq_indicate_buf(struct vnic_rq *rq,</div><div class='del'>-	struct cq_desc *cq_desc, struct vnic_rq_buf *buf,</div><div class='del'>-	int skipped, void *opaque)</div><div class='del'>-{</div><div class='del'>-	struct enic *enic = vnic_dev_priv(rq-&gt;vdev);</div><div class='del'>-	struct net_device *netdev = enic-&gt;netdev;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct vnic_cq *cq = &amp;enic-&gt;cq[enic_cq_rq(enic, rq-&gt;index)];</div><div class='del'>-	struct enic_rq_stats *rqstats = &amp;enic-&gt;rq_stats[rq-&gt;index];</div><div class='del'>-</div><div class='del'>-	u8 type, color, eop, sop, ingress_port, vlan_stripped;</div><div class='del'>-	u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;</div><div class='del'>-	u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;</div><div class='del'>-	u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;</div><div class='del'>-	u8 packet_error;</div><div class='del'>-	u16 q_number, completed_index, bytes_written, vlan_tci, checksum;</div><div class='del'>-	u32 rss_hash;</div><div class='del'>-	bool outer_csum_ok = true, encap = false;</div><div class='del'>-</div><div class='del'>-	rqstats-&gt;packets++;</div><div class='del'>-	if (skipped) {</div><div class='del'>-		rqstats-&gt;desc_skip++;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	skb = buf-&gt;os_buf;</div><div class='del'>-</div><div class='del'>-	cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,</div><div class='del'>-		&amp;type, &amp;color, &amp;q_number, &amp;completed_index,</div><div class='del'>-		&amp;ingress_port, &amp;fcoe, &amp;eop, &amp;sop, &amp;rss_type,</div><div class='del'>-		&amp;csum_not_calc, &amp;rss_hash, &amp;bytes_written,</div><div class='del'>-		&amp;packet_error, &amp;vlan_stripped, &amp;vlan_tci, &amp;checksum,</div><div class='del'>-		&amp;fcoe_sof, &amp;fcoe_fc_crc_ok, &amp;fcoe_enc_error,</div><div class='del'>-		&amp;fcoe_eof, &amp;tcp_udp_csum_ok, &amp;udp, &amp;tcp,</div><div class='del'>-		&amp;ipv4_csum_ok, &amp;ipv6, &amp;ipv4, &amp;ipv4_fragment,</div><div class='del'>-		&amp;fcs_ok);</div><div class='del'>-</div><div class='del'>-	if (packet_error) {</div><div class='del'>-</div><div class='del'>-		if (!fcs_ok) {</div><div class='del'>-			if (bytes_written &gt; 0)</div><div class='del'>-				rqstats-&gt;bad_fcs++;</div><div class='del'>-			else if (bytes_written == 0)</div><div class='del'>-				rqstats-&gt;pkt_truncated++;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		dma_unmap_single(&amp;enic-&gt;pdev-&gt;dev, buf-&gt;dma_addr, buf-&gt;len,</div><div class='del'>-				 DMA_FROM_DEVICE);</div><div class='del'>-		dev_kfree_skb_any(skb);</div><div class='del'>-		buf-&gt;os_buf = NULL;</div><div class='del'>-</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (eop &amp;&amp; bytes_written &gt; 0) {</div><div class='del'>-</div><div class='del'>-		/* Good receive</div><div class='del'>-		 */</div><div class='del'>-		rqstats-&gt;bytes += bytes_written;</div><div class='del'>-		if (!enic_rxcopybreak(netdev, &amp;skb, buf, bytes_written)) {</div><div class='del'>-			buf-&gt;os_buf = NULL;</div><div class='del'>-			dma_unmap_single(&amp;enic-&gt;pdev-&gt;dev, buf-&gt;dma_addr,</div><div class='del'>-					 buf-&gt;len, DMA_FROM_DEVICE);</div><div class='del'>-		}</div><div class='del'>-		prefetch(skb-&gt;data - NET_IP_ALIGN);</div><div class='del'>-</div><div class='del'>-		skb_put(skb, bytes_written);</div><div class='del'>-		skb-&gt;protocol = eth_type_trans(skb, netdev);</div><div class='del'>-		skb_record_rx_queue(skb, q_number);</div><div class='del'>-		if ((netdev-&gt;features &amp; NETIF_F_RXHASH) &amp;&amp; rss_hash &amp;&amp;</div><div class='del'>-		    (type == 3)) {</div><div class='del'>-			switch (rss_type) {</div><div class='del'>-			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4:</div><div class='del'>-			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6:</div><div class='del'>-			case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX:</div><div class='del'>-				skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L4);</div><div class='del'>-				rqstats-&gt;l4_rss_hash++;</div><div class='del'>-				break;</div><div class='del'>-			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv4:</div><div class='del'>-			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6:</div><div class='del'>-			case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX:</div><div class='del'>-				skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L3);</div><div class='del'>-				rqstats-&gt;l3_rss_hash++;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if (enic-&gt;vxlan.vxlan_udp_port_number) {</div><div class='del'>-			switch (enic-&gt;vxlan.patch_level) {</div><div class='del'>-			case 0:</div><div class='del'>-				if (fcoe) {</div><div class='del'>-					encap = true;</div><div class='del'>-					outer_csum_ok = fcoe_fc_crc_ok;</div><div class='del'>-				}</div><div class='del'>-				break;</div><div class='del'>-			case 2:</div><div class='del'>-				if ((type == 7) &amp;&amp;</div><div class='del'>-				    (rss_hash &amp; BIT(0))) {</div><div class='del'>-					encap = true;</div><div class='del'>-					outer_csum_ok = (rss_hash &amp; BIT(1)) &amp;&amp;</div><div class='del'>-							(rss_hash &amp; BIT(2));</div><div class='del'>-				}</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Hardware does not provide whole packet checksum. It only</div><div class='del'>-		 * provides pseudo checksum. Since hw validates the packet</div><div class='del'>-		 * checksum but not provide us the checksum value. use</div><div class='del'>-		 * CHECSUM_UNNECESSARY.</div><div class='del'>-		 *</div><div class='del'>-		 * In case of encap pkt tcp_udp_csum_ok/tcp_udp_csum_ok is</div><div class='del'>-		 * inner csum_ok. outer_csum_ok is set by hw when outer udp</div><div class='del'>-		 * csum is correct or is zero.</div><div class='del'>-		 */</div><div class='del'>-		if ((netdev-&gt;features &amp; NETIF_F_RXCSUM) &amp;&amp; !csum_not_calc &amp;&amp;</div><div class='del'>-		    tcp_udp_csum_ok &amp;&amp; outer_csum_ok &amp;&amp;</div><div class='del'>-		    (ipv4_csum_ok || ipv6)) {</div><div class='del'>-			skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='del'>-			skb-&gt;csum_level = encap;</div><div class='del'>-			if (encap)</div><div class='del'>-				rqstats-&gt;csum_unnecessary_encap++;</div><div class='del'>-			else</div><div class='del'>-				rqstats-&gt;csum_unnecessary++;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (vlan_stripped) {</div><div class='del'>-			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);</div><div class='del'>-			rqstats-&gt;vlan_stripped++;</div><div class='del'>-		}</div><div class='del'>-		skb_mark_napi_id(skb, &amp;enic-&gt;napi[rq-&gt;index]);</div><div class='del'>-		if (!(netdev-&gt;features &amp; NETIF_F_GRO))</div><div class='del'>-			netif_receive_skb(skb);</div><div class='del'>-		else</div><div class='del'>-			napi_gro_receive(&amp;enic-&gt;napi[q_number], skb);</div><div class='del'>-		if (enic-&gt;rx_coalesce_setting.use_adaptive_rx_coalesce)</div><div class='del'>-			enic_intr_update_pkt_size(&amp;cq-&gt;pkt_size_counter,</div><div class='del'>-						  bytes_written);</div><div class='del'>-	} else {</div><div class='del'>-</div><div class='del'>-		/* Buffer overflow</div><div class='del'>-		 */</div><div class='del'>-		rqstats-&gt;pkt_truncated++;</div><div class='del'>-		dma_unmap_single(&amp;enic-&gt;pdev-&gt;dev, buf-&gt;dma_addr, buf-&gt;len,</div><div class='del'>-				 DMA_FROM_DEVICE);</div><div class='del'>-		dev_kfree_skb_any(skb);</div><div class='del'>-		buf-&gt;os_buf = NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,</div><div class='del'>-	u8 type, u16 q_number, u16 completed_index, void *opaque)</div><div class='del'>-{</div><div class='del'>-	struct enic *enic = vnic_dev_priv(vdev);</div><div class='del'>-</div><div class='del'>-	vnic_rq_service(&amp;enic-&gt;rq[q_number], cq_desc,</div><div class='del'>-		completed_index, VNIC_RQ_RETURN_DESC,</div><div class='del'>-		enic_rq_indicate_buf, opaque);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int intr = enic_msix_rq_intr(enic, rq-&gt;index);</div><div class='hunk'>@@ -1589,12 +1332,10 @@ static int enic_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	unsigned int  work_done, rq_work_done = 0, wq_work_done;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	wq_work_done = vnic_cq_service(&amp;enic-&gt;cq[cq_wq], wq_work_to_do,</div><div class='del'>-				       enic_wq_service, NULL);</div><div class='add'>+	wq_work_done = enic_wq_cq_service(enic, cq_wq, wq_work_to_do);</div><div class='ctx'> </div><div class='ctx'> 	if (budget &gt; 0)</div><div class='del'>-		rq_work_done = vnic_cq_service(&amp;enic-&gt;cq[cq_rq],</div><div class='del'>-			rq_work_to_do, enic_rq_service, NULL);</div><div class='add'>+		rq_work_done = enic_rq_cq_service(enic, cq_rq, rq_work_to_do);</div><div class='ctx'> </div><div class='ctx'> 	/* Accumulate intr event credits for this polling</div><div class='ctx'> 	 * cycle.  An intr event is the completion of a</div><div class='hunk'>@@ -1609,7 +1350,7 @@ static int enic_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 			0 /* don't unmask intr */,</div><div class='ctx'> 			0 /* don't reset intr timer */);</div><div class='ctx'> </div><div class='del'>-	err = vnic_rq_fill(&amp;enic-&gt;rq[0], enic_rq_alloc_buf);</div><div class='add'>+	err = vnic_rq_fill(&amp;enic-&gt;rq[0].vrq, enic_rq_alloc_buf);</div><div class='ctx'> </div><div class='ctx'> 	/* Buffer allocation failed. Stay in polling</div><div class='ctx'> 	 * mode so we can try to fill the ring again.</div><div class='hunk'>@@ -1621,7 +1362,7 @@ static int enic_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		/* Call the function which refreshes the intr coalescing timer</div><div class='ctx'> 		 * value based on the traffic.</div><div class='ctx'> 		 */</div><div class='del'>-		enic_calc_int_moderation(enic, &amp;enic-&gt;rq[0]);</div><div class='add'>+		enic_calc_int_moderation(enic, &amp;enic-&gt;rq[0].vrq);</div><div class='ctx'> </div><div class='ctx'> 	if ((rq_work_done &lt; budget) &amp;&amp; napi_complete_done(napi, rq_work_done)) {</div><div class='ctx'> </div><div class='hunk'>@@ -1630,11 +1371,11 @@ static int enic_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='ctx'> 		if (enic-&gt;rx_coalesce_setting.use_adaptive_rx_coalesce)</div><div class='del'>-			enic_set_int_moderation(enic, &amp;enic-&gt;rq[0]);</div><div class='add'>+			enic_set_int_moderation(enic, &amp;enic-&gt;rq[0].vrq);</div><div class='ctx'> 		vnic_intr_unmask(&amp;enic-&gt;intr[intr]);</div><div class='del'>-		enic-&gt;rq_stats[0].napi_complete++;</div><div class='add'>+		enic-&gt;rq[0].stats.napi_complete++;</div><div class='ctx'> 	} else {</div><div class='del'>-		enic-&gt;rq_stats[0].napi_repoll++;</div><div class='add'>+		enic-&gt;rq[0].stats.napi_repoll++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rq_work_done;</div><div class='hunk'>@@ -1683,7 +1424,7 @@ static int enic_poll_msix_wq(struct napi_struct *napi, int budget)</div><div class='ctx'> 	struct net_device *netdev = napi-&gt;dev;</div><div class='ctx'> 	struct enic *enic = netdev_priv(netdev);</div><div class='ctx'> 	unsigned int wq_index = (napi - &amp;enic-&gt;napi[0]) - enic-&gt;rq_count;</div><div class='del'>-	struct vnic_wq *wq = &amp;enic-&gt;wq[wq_index];</div><div class='add'>+	struct vnic_wq *wq = &amp;enic-&gt;wq[wq_index].vwq;</div><div class='ctx'> 	unsigned int cq;</div><div class='ctx'> 	unsigned int intr;</div><div class='ctx'> 	unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET;</div><div class='hunk'>@@ -1693,8 +1434,8 @@ static int enic_poll_msix_wq(struct napi_struct *napi, int budget)</div><div class='ctx'> 	wq_irq = wq-&gt;index;</div><div class='ctx'> 	cq = enic_cq_wq(enic, wq_irq);</div><div class='ctx'> 	intr = enic_msix_wq_intr(enic, wq_irq);</div><div class='del'>-	wq_work_done = vnic_cq_service(&amp;enic-&gt;cq[cq], wq_work_to_do,</div><div class='del'>-				       enic_wq_service, NULL);</div><div class='add'>+</div><div class='add'>+	wq_work_done = enic_wq_cq_service(enic, cq, wq_work_to_do);</div><div class='ctx'> </div><div class='ctx'> 	vnic_intr_return_credits(&amp;enic-&gt;intr[intr], wq_work_done,</div><div class='ctx'> 				 0 /* don't unmask intr */,</div><div class='hunk'>@@ -1723,8 +1464,7 @@ static int enic_poll_msix_rq(struct napi_struct *napi, int budget)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	if (budget &gt; 0)</div><div class='del'>-		work_done = vnic_cq_service(&amp;enic-&gt;cq[cq],</div><div class='del'>-			work_to_do, enic_rq_service, NULL);</div><div class='add'>+		work_done = enic_rq_cq_service(enic, cq, work_to_do);</div><div class='ctx'> </div><div class='ctx'> 	/* Return intr event credits for this polling</div><div class='ctx'> 	 * cycle.  An intr event is the completion of a</div><div class='hunk'>@@ -1737,7 +1477,7 @@ static int enic_poll_msix_rq(struct napi_struct *napi, int budget)</div><div class='ctx'> 			0 /* don't unmask intr */,</div><div class='ctx'> 			0 /* don't reset intr timer */);</div><div class='ctx'> </div><div class='del'>-	err = vnic_rq_fill(&amp;enic-&gt;rq[rq], enic_rq_alloc_buf);</div><div class='add'>+	err = vnic_rq_fill(&amp;enic-&gt;rq[rq].vrq, enic_rq_alloc_buf);</div><div class='ctx'> </div><div class='ctx'> 	/* Buffer allocation failed. Stay in polling mode</div><div class='ctx'> 	 * so we can try to fill the ring again.</div><div class='hunk'>@@ -1749,7 +1489,7 @@ static int enic_poll_msix_rq(struct napi_struct *napi, int budget)</div><div class='ctx'> 		/* Call the function which refreshes the intr coalescing timer</div><div class='ctx'> 		 * value based on the traffic.</div><div class='ctx'> 		 */</div><div class='del'>-		enic_calc_int_moderation(enic, &amp;enic-&gt;rq[rq]);</div><div class='add'>+		enic_calc_int_moderation(enic, &amp;enic-&gt;rq[rq].vrq);</div><div class='ctx'> </div><div class='ctx'> 	if ((work_done &lt; budget) &amp;&amp; napi_complete_done(napi, work_done)) {</div><div class='ctx'> </div><div class='hunk'>@@ -1758,11 +1498,11 @@ static int enic_poll_msix_rq(struct napi_struct *napi, int budget)</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='ctx'> 		if (enic-&gt;rx_coalesce_setting.use_adaptive_rx_coalesce)</div><div class='del'>-			enic_set_int_moderation(enic, &amp;enic-&gt;rq[rq]);</div><div class='add'>+			enic_set_int_moderation(enic, &amp;enic-&gt;rq[rq].vrq);</div><div class='ctx'> 		vnic_intr_unmask(&amp;enic-&gt;intr[intr]);</div><div class='del'>-		enic-&gt;rq_stats[rq].napi_complete++;</div><div class='add'>+		enic-&gt;rq[rq].stats.napi_complete++;</div><div class='ctx'> 	} else {</div><div class='del'>-		enic-&gt;rq_stats[rq].napi_repoll++;</div><div class='add'>+		enic-&gt;rq[rq].stats.napi_repoll++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return work_done;</div><div class='hunk'>@@ -1770,7 +1510,7 @@ static int enic_poll_msix_rq(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> static void enic_notify_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct enic *enic = from_timer(enic, t, notify_timer);</div><div class='add'>+	struct enic *enic = timer_container_of(enic, t, notify_timer);</div><div class='ctx'> </div><div class='ctx'> 	enic_notify_check(enic);</div><div class='ctx'> </div><div class='hunk'>@@ -1792,7 +1532,7 @@ static void enic_free_intr(struct enic *enic)</div><div class='ctx'> 		free_irq(enic-&gt;pdev-&gt;irq, enic);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case VNIC_DEV_INTR_MODE_MSIX:</div><div class='del'>-		for (i = 0; i &lt; ARRAY_SIZE(enic-&gt;msix); i++)</div><div class='add'>+		for (i = 0; i &lt; enic-&gt;intr_count; i++)</div><div class='ctx'> 			if (enic-&gt;msix[i].requested)</div><div class='ctx'> 				free_irq(enic-&gt;msix_entry[i].vector,</div><div class='ctx'> 					enic-&gt;msix[i].devid);</div><div class='hunk'>@@ -1859,7 +1599,7 @@ static int enic_request_intr(struct enic *enic)</div><div class='ctx'> 		enic-&gt;msix[intr].isr = enic_isr_msix_notify;</div><div class='ctx'> 		enic-&gt;msix[intr].devid = enic;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; ARRAY_SIZE(enic-&gt;msix); i++)</div><div class='add'>+		for (i = 0; i &lt; enic-&gt;intr_count; i++)</div><div class='ctx'> 			enic-&gt;msix[i].requested = 0;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; enic-&gt;intr_count; i++) {</div><div class='hunk'>@@ -1901,36 +1641,6 @@ static void enic_synchronize_irqs(struct enic *enic)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void enic_set_rx_coal_setting(struct enic *enic)</div><div class='del'>-{</div><div class='del'>-	unsigned int speed;</div><div class='del'>-	int index = -1;</div><div class='del'>-	struct enic_rx_coal *rx_coal = &amp;enic-&gt;rx_coalesce_setting;</div><div class='del'>-</div><div class='del'>-	/* 1. Read the link speed from fw</div><div class='del'>-	 * 2. Pick the default range for the speed</div><div class='del'>-	 * 3. Update it in enic-&gt;rx_coalesce_setting</div><div class='del'>-	 */</div><div class='del'>-	speed = vnic_dev_port_speed(enic-&gt;vdev);</div><div class='del'>-	if (ENIC_LINK_SPEED_10G &lt; speed)</div><div class='del'>-		index = ENIC_LINK_40G_INDEX;</div><div class='del'>-	else if (ENIC_LINK_SPEED_4G &lt; speed)</div><div class='del'>-		index = ENIC_LINK_10G_INDEX;</div><div class='del'>-	else</div><div class='del'>-		index = ENIC_LINK_4G_INDEX;</div><div class='del'>-</div><div class='del'>-	rx_coal-&gt;small_pkt_range_start = mod_range[index].small_pkt_range_start;</div><div class='del'>-	rx_coal-&gt;large_pkt_range_start = mod_range[index].large_pkt_range_start;</div><div class='del'>-	rx_coal-&gt;range_end = ENIC_RX_COALESCE_RANGE_END;</div><div class='del'>-</div><div class='del'>-	/* Start with the value provided by UCSM */</div><div class='del'>-	for (index = 0; index &lt; enic-&gt;rq_count; index++)</div><div class='del'>-		enic-&gt;cq[index].cur_rx_coal_timeval =</div><div class='del'>-				enic-&gt;config.intr_timer_usec;</div><div class='del'>-</div><div class='del'>-	rx_coal-&gt;use_adaptive_rx_coalesce = 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int enic_dev_notify_set(struct enic *enic)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1971,6 +1681,17 @@ static int enic_open(struct net_device *netdev)</div><div class='ctx'> 	struct enic *enic = netdev_priv(netdev);</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int err, ret;</div><div class='add'>+	unsigned int max_pkt_len = netdev-&gt;mtu + VLAN_ETH_HLEN;</div><div class='add'>+	struct page_pool_params pp_params = {</div><div class='add'>+		.order = get_order(max_pkt_len),</div><div class='add'>+		.pool_size = enic-&gt;config.rq_desc_count,</div><div class='add'>+		.nid = dev_to_node(&amp;enic-&gt;pdev-&gt;dev),</div><div class='add'>+		.dev = &amp;enic-&gt;pdev-&gt;dev,</div><div class='add'>+		.dma_dir = DMA_FROM_DEVICE,</div><div class='add'>+		.max_len = (max_pkt_len &gt; PAGE_SIZE) ? max_pkt_len : PAGE_SIZE,</div><div class='add'>+		.netdev = netdev,</div><div class='add'>+		.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	err = enic_request_intr(enic);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -1988,11 +1709,21 @@ static int enic_open(struct net_device *netdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;rq_count; i++) {</div><div class='add'>+		/* create a page pool for each RQ */</div><div class='add'>+		pp_params.napi = &amp;enic-&gt;napi[i];</div><div class='add'>+		pp_params.queue_idx = i;</div><div class='add'>+		enic-&gt;rq[i].pool = page_pool_create(&amp;pp_params);</div><div class='add'>+		if (IS_ERR(enic-&gt;rq[i].pool)) {</div><div class='add'>+			err = PTR_ERR(enic-&gt;rq[i].pool);</div><div class='add'>+			enic-&gt;rq[i].pool = NULL;</div><div class='add'>+			goto err_out_free_rq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* enable rq before updating rq desc */</div><div class='del'>-		vnic_rq_enable(&amp;enic-&gt;rq[i]);</div><div class='del'>-		vnic_rq_fill(&amp;enic-&gt;rq[i], enic_rq_alloc_buf);</div><div class='add'>+		vnic_rq_enable(&amp;enic-&gt;rq[i].vrq);</div><div class='add'>+		vnic_rq_fill(&amp;enic-&gt;rq[i].vrq, enic_rq_alloc_buf);</div><div class='ctx'> 		/* Need at least one buffer on ring to get going */</div><div class='del'>-		if (vnic_rq_desc_used(&amp;enic-&gt;rq[i]) == 0) {</div><div class='add'>+		if (vnic_rq_desc_used(&amp;enic-&gt;rq[i].vrq) == 0) {</div><div class='ctx'> 			netdev_err(netdev, "Unable to alloc receive buffers\n");</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto err_out_free_rq;</div><div class='hunk'>@@ -2000,7 +1731,7 @@ static int enic_open(struct net_device *netdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;wq_count; i++)</div><div class='del'>-		vnic_wq_enable(&amp;enic-&gt;wq[i]);</div><div class='add'>+		vnic_wq_enable(&amp;enic-&gt;wq[i].vwq);</div><div class='ctx'> </div><div class='ctx'> 	if (!enic_is_dynamic(enic) &amp;&amp; !enic_is_sriov_vf(enic))</div><div class='ctx'> 		enic_dev_add_station_addr(enic);</div><div class='hunk'>@@ -2027,9 +1758,12 @@ static int enic_open(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> err_out_free_rq:</div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;rq_count; i++) {</div><div class='del'>-		ret = vnic_rq_disable(&amp;enic-&gt;rq[i]);</div><div class='del'>-		if (!ret)</div><div class='del'>-			vnic_rq_clean(&amp;enic-&gt;rq[i], enic_free_rq_buf);</div><div class='add'>+		ret = vnic_rq_disable(&amp;enic-&gt;rq[i].vrq);</div><div class='add'>+		if (!ret) {</div><div class='add'>+			vnic_rq_clean(&amp;enic-&gt;rq[i].vrq, enic_free_rq_buf);</div><div class='add'>+			page_pool_destroy(enic-&gt;rq[i].pool);</div><div class='add'>+			enic-&gt;rq[i].pool = NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	enic_dev_notify_unset(enic);</div><div class='ctx'> err_out_free_intr:</div><div class='hunk'>@@ -2053,7 +1787,7 @@ static int enic_stop(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	enic_synchronize_irqs(enic);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;enic-&gt;notify_timer);</div><div class='add'>+	timer_delete_sync(&amp;enic-&gt;notify_timer);</div><div class='ctx'> 	enic_rfs_flw_tbl_free(enic);</div><div class='ctx'> </div><div class='ctx'> 	enic_dev_disable(enic);</div><div class='hunk'>@@ -2071,12 +1805,12 @@ static int enic_stop(struct net_device *netdev)</div><div class='ctx'> 		enic_dev_del_station_addr(enic);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;wq_count; i++) {</div><div class='del'>-		err = vnic_wq_disable(&amp;enic-&gt;wq[i]);</div><div class='add'>+		err = vnic_wq_disable(&amp;enic-&gt;wq[i].vwq);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;rq_count; i++) {</div><div class='del'>-		err = vnic_rq_disable(&amp;enic-&gt;rq[i]);</div><div class='add'>+		err = vnic_rq_disable(&amp;enic-&gt;rq[i].vrq);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2086,9 +1820,12 @@ static int enic_stop(struct net_device *netdev)</div><div class='ctx'> 	enic_free_intr(enic);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;wq_count; i++)</div><div class='del'>-		vnic_wq_clean(&amp;enic-&gt;wq[i], enic_free_wq_buf);</div><div class='del'>-	for (i = 0; i &lt; enic-&gt;rq_count; i++)</div><div class='del'>-		vnic_rq_clean(&amp;enic-&gt;rq[i], enic_free_rq_buf);</div><div class='add'>+		vnic_wq_clean(&amp;enic-&gt;wq[i].vwq, enic_free_wq_buf);</div><div class='add'>+	for (i = 0; i &lt; enic-&gt;rq_count; i++) {</div><div class='add'>+		vnic_rq_clean(&amp;enic-&gt;rq[i].vrq, enic_free_rq_buf);</div><div class='add'>+		page_pool_destroy(enic-&gt;rq[i].pool);</div><div class='add'>+		enic-&gt;rq[i].pool = NULL;</div><div class='add'>+	}</div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;cq_count; i++)</div><div class='ctx'> 		vnic_cq_clean(&amp;enic-&gt;cq[i]);</div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;intr_count; i++)</div><div class='hunk'>@@ -2127,10 +1864,10 @@ static int enic_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 	if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (netdev-&gt;mtu &gt; enic-&gt;port_mtu)</div><div class='add'>+	if (new_mtu &gt; enic-&gt;port_mtu)</div><div class='ctx'> 		netdev_warn(netdev,</div><div class='ctx'> 			    "interface MTU (%d) set higher than port MTU (%d)\n",</div><div class='del'>-			    netdev-&gt;mtu, enic-&gt;port_mtu);</div><div class='add'>+			    new_mtu, enic-&gt;port_mtu);</div><div class='ctx'> </div><div class='ctx'> 	return _enic_change_mtu(netdev, new_mtu);</div><div class='ctx'> }</div><div class='hunk'>@@ -2404,6 +2141,7 @@ static void enic_reset(struct work_struct *work)</div><div class='ctx'> 	enic_init_vnic_resources(enic);</div><div class='ctx'> 	enic_set_rss_nic_cfg(enic);</div><div class='ctx'> 	enic_dev_set_ig_vlan_rewrite_mode(enic);</div><div class='add'>+	enic_ext_cq(enic);</div><div class='ctx'> 	enic_open(enic-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Allow infiniband to fiddle with the device again */</div><div class='hunk'>@@ -2430,6 +2168,7 @@ static void enic_tx_hang_reset(struct work_struct *work)</div><div class='ctx'> 	enic_init_vnic_resources(enic);</div><div class='ctx'> 	enic_set_rss_nic_cfg(enic);</div><div class='ctx'> 	enic_dev_set_ig_vlan_rewrite_mode(enic);</div><div class='add'>+	enic_ext_cq(enic);</div><div class='ctx'> 	enic_open(enic-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Allow infiniband to fiddle with the device again */</div><div class='hunk'>@@ -2442,112 +2181,56 @@ static void enic_tx_hang_reset(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static int enic_set_intr_mode(struct enic *enic)</div><div class='ctx'> {</div><div class='del'>-	unsigned int n = min_t(unsigned int, enic-&gt;rq_count, ENIC_RQ_MAX);</div><div class='del'>-	unsigned int m = min_t(unsigned int, enic-&gt;wq_count, ENIC_WQ_MAX);</div><div class='ctx'> 	unsigned int i;</div><div class='add'>+	int num_intr;</div><div class='ctx'> </div><div class='ctx'> 	/* Set interrupt mode (INTx, MSI, MSI-X) depending</div><div class='ctx'> 	 * on system capabilities.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * Try MSI-X first</div><div class='del'>-	 *</div><div class='del'>-	 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs</div><div class='del'>-	 * (the second to last INTR is used for WQ/RQ errors)</div><div class='del'>-	 * (the last INTR is used for notifications)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	BUG_ON(ARRAY_SIZE(enic-&gt;msix_entry) &lt; n + m + 2);</div><div class='del'>-	for (i = 0; i &lt; n + m + 2; i++)</div><div class='del'>-		enic-&gt;msix_entry[i].entry = i;</div><div class='del'>-</div><div class='del'>-	/* Use multiple RQs if RSS is enabled</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if (ENIC_SETTING(enic, RSS) &amp;&amp;</div><div class='del'>-	    enic-&gt;config.intr_mode &lt; 1 &amp;&amp;</div><div class='del'>-	    enic-&gt;rq_count &gt;= n &amp;&amp;</div><div class='del'>-	    enic-&gt;wq_count &gt;= m &amp;&amp;</div><div class='del'>-	    enic-&gt;cq_count &gt;= n + m &amp;&amp;</div><div class='del'>-	    enic-&gt;intr_count &gt;= n + m + 2) {</div><div class='del'>-</div><div class='del'>-		if (pci_enable_msix_range(enic-&gt;pdev, enic-&gt;msix_entry,</div><div class='del'>-					  n + m + 2, n + m + 2) &gt; 0) {</div><div class='del'>-</div><div class='del'>-			enic-&gt;rq_count = n;</div><div class='del'>-			enic-&gt;wq_count = m;</div><div class='del'>-			enic-&gt;cq_count = n + m;</div><div class='del'>-			enic-&gt;intr_count = n + m + 2;</div><div class='del'>-</div><div class='del'>-			vnic_dev_set_intr_mode(enic-&gt;vdev,</div><div class='del'>-				VNIC_DEV_INTR_MODE_MSIX);</div><div class='del'>-</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (enic-&gt;config.intr_mode &lt; 1 &amp;&amp;</div><div class='del'>-	    enic-&gt;rq_count &gt;= 1 &amp;&amp;</div><div class='del'>-	    enic-&gt;wq_count &gt;= m &amp;&amp;</div><div class='del'>-	    enic-&gt;cq_count &gt;= 1 + m &amp;&amp;</div><div class='del'>-	    enic-&gt;intr_count &gt;= 1 + m + 2) {</div><div class='del'>-		if (pci_enable_msix_range(enic-&gt;pdev, enic-&gt;msix_entry,</div><div class='del'>-					  1 + m + 2, 1 + m + 2) &gt; 0) {</div><div class='del'>-</div><div class='del'>-			enic-&gt;rq_count = 1;</div><div class='del'>-			enic-&gt;wq_count = m;</div><div class='del'>-			enic-&gt;cq_count = 1 + m;</div><div class='del'>-			enic-&gt;intr_count = 1 + m + 2;</div><div class='del'>-</div><div class='add'>+	    enic-&gt;intr_avail &gt;= ENIC_MSIX_MIN_INTR) {</div><div class='add'>+		for (i = 0; i &lt; enic-&gt;intr_avail; i++)</div><div class='add'>+			enic-&gt;msix_entry[i].entry = i;</div><div class='add'>+</div><div class='add'>+		num_intr = pci_enable_msix_range(enic-&gt;pdev, enic-&gt;msix_entry,</div><div class='add'>+						 ENIC_MSIX_MIN_INTR,</div><div class='add'>+						 enic-&gt;intr_avail);</div><div class='add'>+		if (num_intr &gt; 0) {</div><div class='ctx'> 			vnic_dev_set_intr_mode(enic-&gt;vdev,</div><div class='del'>-				VNIC_DEV_INTR_MODE_MSIX);</div><div class='del'>-</div><div class='add'>+					       VNIC_DEV_INTR_MODE_MSIX);</div><div class='add'>+			enic-&gt;intr_avail = num_intr;</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Next try MSI</div><div class='ctx'> 	 *</div><div class='del'>-	 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR</div><div class='add'>+	 * We need 1 INTR</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	if (enic-&gt;config.intr_mode &lt; 2 &amp;&amp;</div><div class='del'>-	    enic-&gt;rq_count &gt;= 1 &amp;&amp;</div><div class='del'>-	    enic-&gt;wq_count &gt;= 1 &amp;&amp;</div><div class='del'>-	    enic-&gt;cq_count &gt;= 2 &amp;&amp;</div><div class='del'>-	    enic-&gt;intr_count &gt;= 1 &amp;&amp;</div><div class='add'>+	    enic-&gt;intr_avail &gt;= 1 &amp;&amp;</div><div class='ctx'> 	    !pci_enable_msi(enic-&gt;pdev)) {</div><div class='del'>-</div><div class='del'>-		enic-&gt;rq_count = 1;</div><div class='del'>-		enic-&gt;wq_count = 1;</div><div class='del'>-		enic-&gt;cq_count = 2;</div><div class='del'>-		enic-&gt;intr_count = 1;</div><div class='del'>-</div><div class='add'>+		enic-&gt;intr_avail = 1;</div><div class='ctx'> 		vnic_dev_set_intr_mode(enic-&gt;vdev, VNIC_DEV_INTR_MODE_MSI);</div><div class='del'>-</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Next try INTx</div><div class='ctx'> 	 *</div><div class='del'>-	 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs</div><div class='add'>+	 * We need 3 INTRs</div><div class='ctx'> 	 * (the first INTR is used for WQ/RQ)</div><div class='ctx'> 	 * (the second INTR is used for WQ/RQ errors)</div><div class='ctx'> 	 * (the last INTR is used for notifications)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	if (enic-&gt;config.intr_mode &lt; 3 &amp;&amp;</div><div class='del'>-	    enic-&gt;rq_count &gt;= 1 &amp;&amp;</div><div class='del'>-	    enic-&gt;wq_count &gt;= 1 &amp;&amp;</div><div class='del'>-	    enic-&gt;cq_count &gt;= 2 &amp;&amp;</div><div class='del'>-	    enic-&gt;intr_count &gt;= 3) {</div><div class='del'>-</div><div class='del'>-		enic-&gt;rq_count = 1;</div><div class='del'>-		enic-&gt;wq_count = 1;</div><div class='del'>-		enic-&gt;cq_count = 2;</div><div class='del'>-		enic-&gt;intr_count = 3;</div><div class='del'>-</div><div class='add'>+	    enic-&gt;intr_avail &gt;= 3) {</div><div class='add'>+		enic-&gt;intr_avail = 3;</div><div class='ctx'> 		vnic_dev_set_intr_mode(enic-&gt;vdev, VNIC_DEV_INTR_MODE_INTX);</div><div class='del'>-</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2572,11 +2255,82 @@ static void enic_clear_intr_mode(struct enic *enic)</div><div class='ctx'> 	vnic_dev_set_intr_mode(enic-&gt;vdev, VNIC_DEV_INTR_MODE_UNKNOWN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int enic_adjust_resources(struct enic *enic)</div><div class='add'>+{</div><div class='add'>+	unsigned int max_queues;</div><div class='add'>+	unsigned int rq_default;</div><div class='add'>+	unsigned int rq_avail;</div><div class='add'>+	unsigned int wq_avail;</div><div class='add'>+</div><div class='add'>+	if (enic-&gt;rq_avail &lt; 1 || enic-&gt;wq_avail &lt; 1 || enic-&gt;cq_avail &lt; 2) {</div><div class='add'>+		dev_err(enic_get_dev(enic),</div><div class='add'>+			"Not enough resources available rq: %d wq: %d cq: %d\n",</div><div class='add'>+			enic-&gt;rq_avail, enic-&gt;wq_avail,</div><div class='add'>+			enic-&gt;cq_avail);</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_kdump_kernel()) {</div><div class='add'>+		dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n");</div><div class='add'>+		enic-&gt;rq_avail = 1;</div><div class='add'>+		enic-&gt;wq_avail = 1;</div><div class='add'>+		enic-&gt;config.rq_desc_count = ENIC_MIN_RQ_DESCS;</div><div class='add'>+		enic-&gt;config.wq_desc_count = ENIC_MIN_WQ_DESCS;</div><div class='add'>+		enic-&gt;config.mtu = min_t(u16, 1500, enic-&gt;config.mtu);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* if RSS isn't set, then we can only use one RQ */</div><div class='add'>+	if (!ENIC_SETTING(enic, RSS))</div><div class='add'>+		enic-&gt;rq_avail = 1;</div><div class='add'>+</div><div class='add'>+	switch (vnic_dev_get_intr_mode(enic-&gt;vdev)) {</div><div class='add'>+	case VNIC_DEV_INTR_MODE_INTX:</div><div class='add'>+	case VNIC_DEV_INTR_MODE_MSI:</div><div class='add'>+		enic-&gt;rq_count = 1;</div><div class='add'>+		enic-&gt;wq_count = 1;</div><div class='add'>+		enic-&gt;cq_count = 2;</div><div class='add'>+		enic-&gt;intr_count = enic-&gt;intr_avail;</div><div class='add'>+		break;</div><div class='add'>+	case VNIC_DEV_INTR_MODE_MSIX:</div><div class='add'>+		/* Adjust the number of wqs/rqs/cqs/interrupts that will be</div><div class='add'>+		 * used based on which resource is the most constrained</div><div class='add'>+		 */</div><div class='add'>+		wq_avail = min(enic-&gt;wq_avail, ENIC_WQ_MAX);</div><div class='add'>+		rq_default = max(netif_get_num_default_rss_queues(),</div><div class='add'>+				 ENIC_RQ_MIN_DEFAULT);</div><div class='add'>+		rq_avail = min3(enic-&gt;rq_avail, ENIC_RQ_MAX, rq_default);</div><div class='add'>+		max_queues = min(enic-&gt;cq_avail,</div><div class='add'>+				 enic-&gt;intr_avail - ENIC_MSIX_RESERVED_INTR);</div><div class='add'>+		if (wq_avail + rq_avail &lt;= max_queues) {</div><div class='add'>+			enic-&gt;rq_count = rq_avail;</div><div class='add'>+			enic-&gt;wq_count = wq_avail;</div><div class='add'>+		} else {</div><div class='add'>+			/* recalculate wq/rq count */</div><div class='add'>+			if (rq_avail &lt; wq_avail) {</div><div class='add'>+				enic-&gt;rq_count = min(rq_avail, max_queues / 2);</div><div class='add'>+				enic-&gt;wq_count = max_queues - enic-&gt;rq_count;</div><div class='add'>+			} else {</div><div class='add'>+				enic-&gt;wq_count = min(wq_avail, max_queues / 2);</div><div class='add'>+				enic-&gt;rq_count = max_queues - enic-&gt;wq_count;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		enic-&gt;cq_count = enic-&gt;rq_count + enic-&gt;wq_count;</div><div class='add'>+		enic-&gt;intr_count = enic-&gt;cq_count + ENIC_MSIX_RESERVED_INTR;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(enic_get_dev(enic), "Unknown interrupt mode\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void enic_get_queue_stats_rx(struct net_device *dev, int idx,</div><div class='ctx'> 				    struct netdev_queue_stats_rx *rxs)</div><div class='ctx'> {</div><div class='ctx'> 	struct enic *enic = netdev_priv(dev);</div><div class='del'>-	struct enic_rq_stats *rqstats = &amp;enic-&gt;rq_stats[idx];</div><div class='add'>+	struct enic_rq_stats *rqstats = &amp;enic-&gt;rq[idx].stats;</div><div class='ctx'> </div><div class='ctx'> 	rxs-&gt;bytes = rqstats-&gt;bytes;</div><div class='ctx'> 	rxs-&gt;packets = rqstats-&gt;packets;</div><div class='hunk'>@@ -2584,13 +2338,14 @@ static void enic_get_queue_stats_rx(struct net_device *dev, int idx,</div><div class='ctx'> 	rxs-&gt;hw_drop_overruns = rqstats-&gt;pkt_truncated;</div><div class='ctx'> 	rxs-&gt;csum_unnecessary = rqstats-&gt;csum_unnecessary +</div><div class='ctx'> 				rqstats-&gt;csum_unnecessary_encap;</div><div class='add'>+	rxs-&gt;alloc_fail = rqstats-&gt;pp_alloc_fail;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void enic_get_queue_stats_tx(struct net_device *dev, int idx,</div><div class='ctx'> 				    struct netdev_queue_stats_tx *txs)</div><div class='ctx'> {</div><div class='ctx'> 	struct enic *enic = netdev_priv(dev);</div><div class='del'>-	struct enic_wq_stats *wqstats = &amp;enic-&gt;wq_stats[idx];</div><div class='add'>+	struct enic_wq_stats *wqstats = &amp;enic-&gt;wq[idx].stats;</div><div class='ctx'> </div><div class='ctx'> 	txs-&gt;bytes = wqstats-&gt;bytes;</div><div class='ctx'> 	txs-&gt;packets = wqstats-&gt;packets;</div><div class='hunk'>@@ -2611,6 +2366,7 @@ static void enic_get_base_stats(struct net_device *dev,</div><div class='ctx'> 	rxs-&gt;hw_drops = 0;</div><div class='ctx'> 	rxs-&gt;hw_drop_overruns = 0;</div><div class='ctx'> 	rxs-&gt;csum_unnecessary = 0;</div><div class='add'>+	rxs-&gt;alloc_fail = 0;</div><div class='ctx'> 	txs-&gt;bytes = 0;</div><div class='ctx'> 	txs-&gt;packets = 0;</div><div class='ctx'> 	txs-&gt;csum_none = 0;</div><div class='hunk'>@@ -2674,6 +2430,71 @@ static const struct netdev_stat_ops enic_netdev_stat_ops = {</div><div class='ctx'> 	.get_base_stats		= enic_get_base_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void enic_free_enic_resources(struct enic *enic)</div><div class='add'>+{</div><div class='add'>+	kfree(enic-&gt;wq);</div><div class='add'>+	enic-&gt;wq = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(enic-&gt;rq);</div><div class='add'>+	enic-&gt;rq = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(enic-&gt;cq);</div><div class='add'>+	enic-&gt;cq = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(enic-&gt;napi);</div><div class='add'>+	enic-&gt;napi = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(enic-&gt;msix_entry);</div><div class='add'>+	enic-&gt;msix_entry = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(enic-&gt;msix);</div><div class='add'>+	enic-&gt;msix = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(enic-&gt;intr);</div><div class='add'>+	enic-&gt;intr = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enic_alloc_enic_resources(struct enic *enic)</div><div class='add'>+{</div><div class='add'>+	enic-&gt;wq = kcalloc(enic-&gt;wq_avail, sizeof(struct enic_wq), GFP_KERNEL);</div><div class='add'>+	if (!enic-&gt;wq)</div><div class='add'>+		goto free_queues;</div><div class='add'>+</div><div class='add'>+	enic-&gt;rq = kcalloc(enic-&gt;rq_avail, sizeof(struct enic_rq), GFP_KERNEL);</div><div class='add'>+	if (!enic-&gt;rq)</div><div class='add'>+		goto free_queues;</div><div class='add'>+</div><div class='add'>+	enic-&gt;cq = kcalloc(enic-&gt;cq_avail, sizeof(struct vnic_cq), GFP_KERNEL);</div><div class='add'>+	if (!enic-&gt;cq)</div><div class='add'>+		goto free_queues;</div><div class='add'>+</div><div class='add'>+	enic-&gt;napi = kcalloc(enic-&gt;wq_avail + enic-&gt;rq_avail,</div><div class='add'>+			     sizeof(struct napi_struct), GFP_KERNEL);</div><div class='add'>+	if (!enic-&gt;napi)</div><div class='add'>+		goto free_queues;</div><div class='add'>+</div><div class='add'>+	enic-&gt;msix_entry = kcalloc(enic-&gt;intr_avail, sizeof(struct msix_entry),</div><div class='add'>+				   GFP_KERNEL);</div><div class='add'>+	if (!enic-&gt;msix_entry)</div><div class='add'>+		goto free_queues;</div><div class='add'>+</div><div class='add'>+	enic-&gt;msix = kcalloc(enic-&gt;intr_avail, sizeof(struct enic_msix_entry),</div><div class='add'>+			     GFP_KERNEL);</div><div class='add'>+	if (!enic-&gt;msix)</div><div class='add'>+		goto free_queues;</div><div class='add'>+</div><div class='add'>+	enic-&gt;intr = kcalloc(enic-&gt;intr_avail, sizeof(struct vnic_intr),</div><div class='add'>+			     GFP_KERNEL);</div><div class='add'>+	if (!enic-&gt;intr)</div><div class='add'>+		goto free_queues;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_queues:</div><div class='add'>+	enic_free_enic_resources(enic);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void enic_dev_deinit(struct enic *enic)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='hunk'>@@ -2691,18 +2512,7 @@ static void enic_dev_deinit(struct enic *enic)</div><div class='ctx'> 	enic_free_vnic_resources(enic);</div><div class='ctx'> 	enic_clear_intr_mode(enic);</div><div class='ctx'> 	enic_free_affinity_hint(enic);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enic_kdump_kernel_config(struct enic *enic)</div><div class='del'>-{</div><div class='del'>-	if (is_kdump_kernel()) {</div><div class='del'>-		dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n");</div><div class='del'>-		enic-&gt;rq_count = 1;</div><div class='del'>-		enic-&gt;wq_count = 1;</div><div class='del'>-		enic-&gt;config.rq_desc_count = ENIC_MIN_RQ_DESCS;</div><div class='del'>-		enic-&gt;config.wq_desc_count = ENIC_MIN_WQ_DESCS;</div><div class='del'>-		enic-&gt;config.mtu = min_t(u16, 1500, enic-&gt;config.mtu);</div><div class='del'>-	}</div><div class='add'>+	enic_free_enic_resources(enic);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int enic_dev_init(struct enic *enic)</div><div class='hunk'>@@ -2734,19 +2544,28 @@ static int enic_dev_init(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> 	enic_get_res_counts(enic);</div><div class='ctx'> </div><div class='del'>-	/* modify resource count if we are in kdump_kernel</div><div class='del'>-	 */</div><div class='del'>-	enic_kdump_kernel_config(enic);</div><div class='add'>+	enic_ext_cq(enic);</div><div class='ctx'> </div><div class='del'>-	/* Set interrupt mode based on resource counts and system</div><div class='del'>-	 * capabilities</div><div class='del'>-	 */</div><div class='add'>+	err = enic_alloc_enic_resources(enic);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to allocate enic resources\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set interrupt mode based on system capabilities */</div><div class='ctx'> </div><div class='ctx'> 	err = enic_set_intr_mode(enic);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Failed to set intr mode based on resource "</div><div class='ctx'> 			"counts and system capabilities, aborting\n");</div><div class='del'>-		return err;</div><div class='add'>+		goto err_out_free_vnic_resources;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Adjust resource counts based on most constrained resources */</div><div class='add'>+	err = enic_adjust_resources(enic);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to adjust resources\n");</div><div class='add'>+		goto err_out_free_vnic_resources;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate and configure vNIC resources</div><div class='hunk'>@@ -2788,6 +2607,7 @@ err_out_free_vnic_resources:</div><div class='ctx'> 	enic_free_affinity_hint(enic);</div><div class='ctx'> 	enic_clear_intr_mode(enic);</div><div class='ctx'> 	enic_free_vnic_resources(enic);</div><div class='add'>+	enic_free_enic_resources(enic);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -2987,13 +2807,12 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	timer_setup(&amp;enic-&gt;notify_timer, enic_notify_timer, 0);</div><div class='ctx'> </div><div class='ctx'> 	enic_rfs_flw_tbl_init(enic);</div><div class='del'>-	enic_set_rx_coal_setting(enic);</div><div class='ctx'> 	INIT_WORK(&amp;enic-&gt;reset, enic_reset);</div><div class='ctx'> 	INIT_WORK(&amp;enic-&gt;tx_hang_reset, enic_tx_hang_reset);</div><div class='ctx'> 	INIT_WORK(&amp;enic-&gt;change_mtu_work, enic_change_mtu_work);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;wq_count; i++)</div><div class='del'>-		spin_lock_init(&amp;enic-&gt;wq_lock[i]);</div><div class='add'>+		spin_lock_init(&amp;enic-&gt;wq[i].lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Register net device</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -3103,7 +2922,6 @@ static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		dev_err(dev, "Cannot register net device, aborting\n");</div><div class='ctx'> 		goto err_out_dev_deinit;</div><div class='ctx'> 	}</div><div class='del'>-	enic-&gt;rx_copybreak = RX_COPYBREAK_DEFAULT;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_res.c b/drivers/net/ethernet/cisco/enic/enic_res.c<br/>index 1c48aebdbab0..bbd3143ed73e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_res.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_res.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_res.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic_res.c</a></div><div class='hunk'>@@ -59,31 +59,38 @@ int enic_get_vnic_config(struct enic *enic)</div><div class='ctx'> 	GET_CONFIG(intr_timer_usec);</div><div class='ctx'> 	GET_CONFIG(loop_tag);</div><div class='ctx'> 	GET_CONFIG(num_arfs);</div><div class='add'>+	GET_CONFIG(max_rq_ring);</div><div class='add'>+	GET_CONFIG(max_wq_ring);</div><div class='add'>+	GET_CONFIG(max_cq_ring);</div><div class='add'>+</div><div class='add'>+	if (!c-&gt;max_wq_ring)</div><div class='add'>+		c-&gt;max_wq_ring = ENIC_MAX_WQ_DESCS_DEFAULT;</div><div class='add'>+	if (!c-&gt;max_rq_ring)</div><div class='add'>+		c-&gt;max_rq_ring = ENIC_MAX_RQ_DESCS_DEFAULT;</div><div class='add'>+	if (!c-&gt;max_cq_ring)</div><div class='add'>+		c-&gt;max_cq_ring = ENIC_MAX_CQ_DESCS_DEFAULT;</div><div class='ctx'> </div><div class='ctx'> 	c-&gt;wq_desc_count =</div><div class='del'>-		min_t(u32, ENIC_MAX_WQ_DESCS,</div><div class='del'>-		max_t(u32, ENIC_MIN_WQ_DESCS,</div><div class='del'>-		c-&gt;wq_desc_count));</div><div class='add'>+		min_t(u32, c-&gt;max_wq_ring,</div><div class='add'>+		      max_t(u32, ENIC_MIN_WQ_DESCS, c-&gt;wq_desc_count));</div><div class='ctx'> 	c-&gt;wq_desc_count &amp;= 0xffffffe0; /* must be aligned to groups of 32 */</div><div class='ctx'> </div><div class='ctx'> 	c-&gt;rq_desc_count =</div><div class='del'>-		min_t(u32, ENIC_MAX_RQ_DESCS,</div><div class='del'>-		max_t(u32, ENIC_MIN_RQ_DESCS,</div><div class='del'>-		c-&gt;rq_desc_count));</div><div class='add'>+		min_t(u32, c-&gt;max_rq_ring,</div><div class='add'>+		      max_t(u32, ENIC_MIN_RQ_DESCS, c-&gt;rq_desc_count));</div><div class='ctx'> 	c-&gt;rq_desc_count &amp;= 0xffffffe0; /* must be aligned to groups of 32 */</div><div class='ctx'> </div><div class='ctx'> 	if (c-&gt;mtu == 0)</div><div class='ctx'> 		c-&gt;mtu = 1500;</div><div class='del'>-	c-&gt;mtu = min_t(u16, ENIC_MAX_MTU,</div><div class='del'>-		max_t(u16, ENIC_MIN_MTU,</div><div class='del'>-		c-&gt;mtu));</div><div class='add'>+	c-&gt;mtu = min_t(u16, ENIC_MAX_MTU, max_t(u16, ENIC_MIN_MTU, c-&gt;mtu));</div><div class='ctx'> </div><div class='ctx'> 	c-&gt;intr_timer_usec = min_t(u32, c-&gt;intr_timer_usec,</div><div class='ctx'> 		vnic_dev_get_intr_coal_timer_max(enic-&gt;vdev));</div><div class='ctx'> </div><div class='ctx'> 	dev_info(enic_get_dev(enic),</div><div class='del'>-		"vNIC MAC addr %pM wq/rq %d/%d mtu %d\n",</div><div class='del'>-		enic-&gt;mac_addr, c-&gt;wq_desc_count, c-&gt;rq_desc_count, c-&gt;mtu);</div><div class='add'>+		 "vNIC MAC addr %pM wq/rq %d/%d max wq/rq/cq %d/%d/%d mtu %d\n",</div><div class='add'>+		 enic-&gt;mac_addr, c-&gt;wq_desc_count, c-&gt;rq_desc_count,</div><div class='add'>+		 c-&gt;max_wq_ring, c-&gt;max_rq_ring, c-&gt;max_cq_ring, c-&gt;mtu);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(enic_get_dev(enic), "vNIC csum tx/rx %s/%s "</div><div class='ctx'> 		"tso/lro %s/%s rss %s intr mode %s type %s timer %d usec "</div><div class='hunk'>@@ -176,9 +183,9 @@ void enic_free_vnic_resources(struct enic *enic)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;wq_count; i++)</div><div class='del'>-		vnic_wq_free(&amp;enic-&gt;wq[i]);</div><div class='add'>+		vnic_wq_free(&amp;enic-&gt;wq[i].vwq);</div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;rq_count; i++)</div><div class='del'>-		vnic_rq_free(&amp;enic-&gt;rq[i]);</div><div class='add'>+		vnic_rq_free(&amp;enic-&gt;rq[i].vrq);</div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;cq_count; i++)</div><div class='ctx'> 		vnic_cq_free(&amp;enic-&gt;cq[i]);</div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;intr_count; i++)</div><div class='hunk'>@@ -187,16 +194,21 @@ void enic_free_vnic_resources(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> void enic_get_res_counts(struct enic *enic)</div><div class='ctx'> {</div><div class='del'>-	enic-&gt;wq_count = vnic_dev_get_res_count(enic-&gt;vdev, RES_TYPE_WQ);</div><div class='del'>-	enic-&gt;rq_count = vnic_dev_get_res_count(enic-&gt;vdev, RES_TYPE_RQ);</div><div class='del'>-	enic-&gt;cq_count = vnic_dev_get_res_count(enic-&gt;vdev, RES_TYPE_CQ);</div><div class='del'>-	enic-&gt;intr_count = vnic_dev_get_res_count(enic-&gt;vdev,</div><div class='del'>-		RES_TYPE_INTR_CTRL);</div><div class='add'>+	enic-&gt;wq_avail = vnic_dev_get_res_count(enic-&gt;vdev, RES_TYPE_WQ);</div><div class='add'>+	enic-&gt;rq_avail = vnic_dev_get_res_count(enic-&gt;vdev, RES_TYPE_RQ);</div><div class='add'>+	enic-&gt;cq_avail = vnic_dev_get_res_count(enic-&gt;vdev, RES_TYPE_CQ);</div><div class='add'>+	enic-&gt;intr_avail = vnic_dev_get_res_count(enic-&gt;vdev,</div><div class='add'>+						  RES_TYPE_INTR_CTRL);</div><div class='add'>+</div><div class='add'>+	enic-&gt;wq_count = enic-&gt;wq_avail;</div><div class='add'>+	enic-&gt;rq_count = enic-&gt;rq_avail;</div><div class='add'>+	enic-&gt;cq_count = enic-&gt;cq_avail;</div><div class='add'>+	enic-&gt;intr_count = enic-&gt;intr_avail;</div><div class='ctx'> </div><div class='ctx'> 	dev_info(enic_get_dev(enic),</div><div class='ctx'> 		"vNIC resources avail: wq %d rq %d cq %d intr %d\n",</div><div class='del'>-		enic-&gt;wq_count, enic-&gt;rq_count,</div><div class='del'>-		enic-&gt;cq_count, enic-&gt;intr_count);</div><div class='add'>+		enic-&gt;wq_avail, enic-&gt;rq_avail,</div><div class='add'>+		enic-&gt;cq_avail, enic-&gt;intr_avail);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void enic_init_vnic_resources(struct enic *enic)</div><div class='hunk'>@@ -221,9 +233,12 @@ void enic_init_vnic_resources(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> 	switch (intr_mode) {</div><div class='ctx'> 	case VNIC_DEV_INTR_MODE_INTX:</div><div class='add'>+		error_interrupt_enable = 1;</div><div class='add'>+		error_interrupt_offset = ENIC_LEGACY_ERR_INTR;</div><div class='add'>+		break;</div><div class='ctx'> 	case VNIC_DEV_INTR_MODE_MSIX:</div><div class='ctx'> 		error_interrupt_enable = 1;</div><div class='del'>-		error_interrupt_offset = enic-&gt;intr_count - 2;</div><div class='add'>+		error_interrupt_offset = enic_msix_err_intr(enic);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		error_interrupt_enable = 0;</div><div class='hunk'>@@ -233,7 +248,7 @@ void enic_init_vnic_resources(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;rq_count; i++) {</div><div class='ctx'> 		cq_index = i;</div><div class='del'>-		vnic_rq_init(&amp;enic-&gt;rq[i],</div><div class='add'>+		vnic_rq_init(&amp;enic-&gt;rq[i].vrq,</div><div class='ctx'> 			cq_index,</div><div class='ctx'> 			error_interrupt_enable,</div><div class='ctx'> 			error_interrupt_offset);</div><div class='hunk'>@@ -241,7 +256,7 @@ void enic_init_vnic_resources(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;wq_count; i++) {</div><div class='ctx'> 		cq_index = enic-&gt;rq_count + i;</div><div class='del'>-		vnic_wq_init(&amp;enic-&gt;wq[i],</div><div class='add'>+		vnic_wq_init(&amp;enic-&gt;wq[i].vwq,</div><div class='ctx'> 			cq_index,</div><div class='ctx'> 			error_interrupt_enable,</div><div class='ctx'> 			error_interrupt_offset);</div><div class='hunk'>@@ -249,15 +264,15 @@ void enic_init_vnic_resources(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> 	/* Init CQ resources</div><div class='ctx'> 	 *</div><div class='del'>-	 * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI</div><div class='del'>-	 * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X</div><div class='add'>+	 * All CQs point to INTR[0] for INTx, MSI</div><div class='add'>+	 * CQ[i] point to INTR[ENIC_MSIX_IO_INTR_BASE + i] for MSI-X</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;cq_count; i++) {</div><div class='ctx'> </div><div class='ctx'> 		switch (intr_mode) {</div><div class='ctx'> 		case VNIC_DEV_INTR_MODE_MSIX:</div><div class='del'>-			interrupt_offset = i;</div><div class='add'>+			interrupt_offset = ENIC_MSIX_IO_INTR_BASE + i;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			interrupt_offset = 0;</div><div class='hunk'>@@ -304,6 +319,7 @@ void enic_init_vnic_resources(struct enic *enic)</div><div class='ctx'> int enic_alloc_vnic_resources(struct enic *enic)</div><div class='ctx'> {</div><div class='ctx'> 	enum vnic_dev_intr_mode intr_mode;</div><div class='add'>+	int rq_cq_desc_size;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -318,11 +334,29 @@ int enic_alloc_vnic_resources(struct enic *enic)</div><div class='ctx'> 		intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :</div><div class='ctx'> 		"unknown");</div><div class='ctx'> </div><div class='add'>+	switch (enic-&gt;ext_cq) {</div><div class='add'>+	case ENIC_RQ_CQ_ENTRY_SIZE_16:</div><div class='add'>+		rq_cq_desc_size = 16;</div><div class='add'>+		break;</div><div class='add'>+	case ENIC_RQ_CQ_ENTRY_SIZE_32:</div><div class='add'>+		rq_cq_desc_size = 32;</div><div class='add'>+		break;</div><div class='add'>+	case ENIC_RQ_CQ_ENTRY_SIZE_64:</div><div class='add'>+		rq_cq_desc_size = 64;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(enic_get_dev(enic),</div><div class='add'>+			"Unable to determine rq cq desc size: %d",</div><div class='add'>+			enic-&gt;ext_cq);</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Allocate queue resources</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;wq_count; i++) {</div><div class='del'>-		err = vnic_wq_alloc(enic-&gt;vdev, &amp;enic-&gt;wq[i], i,</div><div class='add'>+		err = vnic_wq_alloc(enic-&gt;vdev, &amp;enic-&gt;wq[i].vwq, i,</div><div class='ctx'> 			enic-&gt;config.wq_desc_count,</div><div class='ctx'> 			sizeof(struct wq_enet_desc));</div><div class='ctx'> 		if (err)</div><div class='hunk'>@@ -330,7 +364,7 @@ int enic_alloc_vnic_resources(struct enic *enic)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;rq_count; i++) {</div><div class='del'>-		err = vnic_rq_alloc(enic-&gt;vdev, &amp;enic-&gt;rq[i], i,</div><div class='add'>+		err = vnic_rq_alloc(enic-&gt;vdev, &amp;enic-&gt;rq[i].vrq, i,</div><div class='ctx'> 			enic-&gt;config.rq_desc_count,</div><div class='ctx'> 			sizeof(struct rq_enet_desc));</div><div class='ctx'> 		if (err)</div><div class='hunk'>@@ -340,8 +374,8 @@ int enic_alloc_vnic_resources(struct enic *enic)</div><div class='ctx'> 	for (i = 0; i &lt; enic-&gt;cq_count; i++) {</div><div class='ctx'> 		if (i &lt; enic-&gt;rq_count)</div><div class='ctx'> 			err = vnic_cq_alloc(enic-&gt;vdev, &amp;enic-&gt;cq[i], i,</div><div class='del'>-				enic-&gt;config.rq_desc_count,</div><div class='del'>-				sizeof(struct cq_enet_rq_desc));</div><div class='add'>+					enic-&gt;config.rq_desc_count,</div><div class='add'>+					rq_cq_desc_size);</div><div class='ctx'> 		else</div><div class='ctx'> 			err = vnic_cq_alloc(enic-&gt;vdev, &amp;enic-&gt;cq[i], i,</div><div class='ctx'> 				enic-&gt;config.wq_desc_count,</div><div class='hunk'>@@ -372,6 +406,39 @@ int enic_alloc_vnic_resources(struct enic *enic)</div><div class='ctx'> </div><div class='ctx'> err_out_cleanup:</div><div class='ctx'> 	enic_free_vnic_resources(enic);</div><div class='del'>-</div><div class='add'>+err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * CMD_CQ_ENTRY_SIZE_SET can fail on older hw generations that don't support</div><div class='add'>+ * that command</div><div class='add'>+ */</div><div class='add'>+void enic_ext_cq(struct enic *enic)</div><div class='add'>+{</div><div class='add'>+	u64 a0 = CMD_CQ_ENTRY_SIZE_SET, a1 = 0;</div><div class='add'>+	int wait = 1000;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;enic-&gt;devcmd_lock);</div><div class='add'>+	ret = vnic_dev_cmd(enic-&gt;vdev, CMD_CAPABILITY, &amp;a0, &amp;a1, wait);</div><div class='add'>+	if (ret || a0) {</div><div class='add'>+		dev_info(&amp;enic-&gt;pdev-&gt;dev,</div><div class='add'>+			 "CMD_CQ_ENTRY_SIZE_SET not supported.");</div><div class='add'>+		enic-&gt;ext_cq = ENIC_RQ_CQ_ENTRY_SIZE_16;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	a1 &amp;= VNIC_RQ_CQ_ENTRY_SIZE_ALL_BIT;</div><div class='add'>+	enic-&gt;ext_cq = fls(a1) - 1;</div><div class='add'>+	a0 = VNIC_RQ_ALL;</div><div class='add'>+	a1 = enic-&gt;ext_cq;</div><div class='add'>+	ret = vnic_dev_cmd(enic-&gt;vdev, CMD_CQ_ENTRY_SIZE_SET, &amp;a0, &amp;a1, wait);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_info(&amp;enic-&gt;pdev-&gt;dev, "CMD_CQ_ENTRY_SIZE_SET failed.");</div><div class='add'>+		enic-&gt;ext_cq = ENIC_RQ_CQ_ENTRY_SIZE_16;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	spin_unlock_bh(&amp;enic-&gt;devcmd_lock);</div><div class='add'>+	dev_info(&amp;enic-&gt;pdev-&gt;dev, "CQ entry size set to %d bytes",</div><div class='add'>+		 16 &lt;&lt; enic-&gt;ext_cq);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_res.h b/drivers/net/ethernet/cisco/enic/enic_res.h<br/>index b8ee42d297aa..02dca1ae4a22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_res.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/enic_res.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_res.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic_res.h</a></div><div class='hunk'>@@ -12,10 +12,13 @@</div><div class='ctx'> #include "vnic_wq.h"</div><div class='ctx'> #include "vnic_rq.h"</div><div class='ctx'> </div><div class='del'>-#define ENIC_MIN_WQ_DESCS		64</div><div class='del'>-#define ENIC_MAX_WQ_DESCS		4096</div><div class='del'>-#define ENIC_MIN_RQ_DESCS		64</div><div class='del'>-#define ENIC_MAX_RQ_DESCS		4096</div><div class='add'>+#define ENIC_MIN_WQ_DESCS 64</div><div class='add'>+#define ENIC_MAX_WQ_DESCS_DEFAULT 4096</div><div class='add'>+#define ENIC_MAX_WQ_DESCS 16384</div><div class='add'>+#define ENIC_MIN_RQ_DESCS 64</div><div class='add'>+#define ENIC_MAX_RQ_DESCS 16384</div><div class='add'>+#define ENIC_MAX_RQ_DESCS_DEFAULT 4096</div><div class='add'>+#define ENIC_MAX_CQ_DESCS_DEFAULT (64 * 1024)</div><div class='ctx'> </div><div class='ctx'> #define ENIC_MIN_MTU			ETH_MIN_MTU</div><div class='ctx'> #define ENIC_MAX_MTU			9000</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_rq.c b/drivers/net/ethernet/cisco/enic/enic_rq.c<br/>new file mode 100644<br/>index 000000000000..ccbf5c9a21d0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_rq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic_rq.c</a></div><div class='hunk'>@@ -0,0 +1,436 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// Copyright 2024 Cisco Systems, Inc.  All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;net/busy_poll.h&gt;</div><div class='add'>+#include "enic.h"</div><div class='add'>+#include "enic_res.h"</div><div class='add'>+#include "enic_rq.h"</div><div class='add'>+#include "vnic_rq.h"</div><div class='add'>+#include "cq_enet_desc.h"</div><div class='add'>+</div><div class='add'>+#define ENIC_LARGE_PKT_THRESHOLD                1000</div><div class='add'>+</div><div class='add'>+static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size,</div><div class='add'>+				      u32 pkt_len)</div><div class='add'>+{</div><div class='add'>+	if (pkt_len &gt; ENIC_LARGE_PKT_THRESHOLD)</div><div class='add'>+		pkt_size-&gt;large_pkt_bytes_cnt += pkt_len;</div><div class='add'>+	else</div><div class='add'>+		pkt_size-&gt;small_pkt_bytes_cnt += pkt_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enic_rq_cq_desc_dec(void *cq_desc, u8 cq_desc_size, u8 *type,</div><div class='add'>+				u8 *color, u16 *q_number, u16 *completed_index)</div><div class='add'>+{</div><div class='add'>+	/* type_color is the last field for all cq structs */</div><div class='add'>+	u8 type_color;</div><div class='add'>+</div><div class='add'>+	switch (cq_desc_size) {</div><div class='add'>+	case VNIC_RQ_CQ_ENTRY_SIZE_16: {</div><div class='add'>+		struct cq_enet_rq_desc *desc =</div><div class='add'>+			(struct cq_enet_rq_desc *)cq_desc;</div><div class='add'>+		type_color = desc-&gt;type_color;</div><div class='add'>+</div><div class='add'>+		/* Make sure color bit is read from desc *before* other fields</div><div class='add'>+		 * are read from desc.  Hardware guarantees color bit is last</div><div class='add'>+		 * bit (byte) written.  Adding the rmb() prevents the compiler</div><div class='add'>+		 * and/or CPU from reordering the reads which would potentially</div><div class='add'>+		 * result in reading stale values.</div><div class='add'>+		 */</div><div class='add'>+		rmb();</div><div class='add'>+</div><div class='add'>+		*q_number = le16_to_cpu(desc-&gt;q_number_rss_type_flags) &amp;</div><div class='add'>+			    CQ_DESC_Q_NUM_MASK;</div><div class='add'>+		*completed_index = le16_to_cpu(desc-&gt;completed_index_flags) &amp;</div><div class='add'>+				   CQ_DESC_COMP_NDX_MASK;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case VNIC_RQ_CQ_ENTRY_SIZE_32: {</div><div class='add'>+		struct cq_enet_rq_desc_32 *desc =</div><div class='add'>+			(struct cq_enet_rq_desc_32 *)cq_desc;</div><div class='add'>+		type_color = desc-&gt;type_color;</div><div class='add'>+</div><div class='add'>+		/* Make sure color bit is read from desc *before* other fields</div><div class='add'>+		 * are read from desc.  Hardware guarantees color bit is last</div><div class='add'>+		 * bit (byte) written.  Adding the rmb() prevents the compiler</div><div class='add'>+		 * and/or CPU from reordering the reads which would potentially</div><div class='add'>+		 * result in reading stale values.</div><div class='add'>+		 */</div><div class='add'>+		rmb();</div><div class='add'>+</div><div class='add'>+		*q_number = le16_to_cpu(desc-&gt;q_number_rss_type_flags) &amp;</div><div class='add'>+			    CQ_DESC_Q_NUM_MASK;</div><div class='add'>+		*completed_index = le16_to_cpu(desc-&gt;completed_index_flags) &amp;</div><div class='add'>+				   CQ_DESC_COMP_NDX_MASK;</div><div class='add'>+		*completed_index |= (desc-&gt;fetch_index_flags &amp; CQ_DESC_32_FI_MASK) &lt;&lt;</div><div class='add'>+				CQ_DESC_COMP_NDX_BITS;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case VNIC_RQ_CQ_ENTRY_SIZE_64: {</div><div class='add'>+		struct cq_enet_rq_desc_64 *desc =</div><div class='add'>+			(struct cq_enet_rq_desc_64 *)cq_desc;</div><div class='add'>+		type_color = desc-&gt;type_color;</div><div class='add'>+</div><div class='add'>+		/* Make sure color bit is read from desc *before* other fields</div><div class='add'>+		 * are read from desc.  Hardware guarantees color bit is last</div><div class='add'>+		 * bit (byte) written.  Adding the rmb() prevents the compiler</div><div class='add'>+		 * and/or CPU from reordering the reads which would potentially</div><div class='add'>+		 * result in reading stale values.</div><div class='add'>+		 */</div><div class='add'>+		rmb();</div><div class='add'>+</div><div class='add'>+		*q_number = le16_to_cpu(desc-&gt;q_number_rss_type_flags) &amp;</div><div class='add'>+			    CQ_DESC_Q_NUM_MASK;</div><div class='add'>+		*completed_index = le16_to_cpu(desc-&gt;completed_index_flags) &amp;</div><div class='add'>+				   CQ_DESC_COMP_NDX_MASK;</div><div class='add'>+		*completed_index |= (desc-&gt;fetch_index_flags &amp; CQ_DESC_64_FI_MASK) &lt;&lt;</div><div class='add'>+				CQ_DESC_COMP_NDX_BITS;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*color = (type_color &gt;&gt; CQ_DESC_COLOR_SHIFT) &amp; CQ_DESC_COLOR_MASK;</div><div class='add'>+	*type = type_color &amp; CQ_DESC_TYPE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enic_rq_set_skb_flags(struct vnic_rq *vrq, u8 type, u32 rss_hash,</div><div class='add'>+				  u8 rss_type, u8 fcoe, u8 fcoe_fc_crc_ok,</div><div class='add'>+				  u8 vlan_stripped, u8 csum_not_calc,</div><div class='add'>+				  u8 tcp_udp_csum_ok, u8 ipv6, u8 ipv4_csum_ok,</div><div class='add'>+				  u16 vlan_tci, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct enic *enic = vnic_dev_priv(vrq-&gt;vdev);</div><div class='add'>+	struct net_device *netdev = enic-&gt;netdev;</div><div class='add'>+	struct enic_rq_stats *rqstats =  &amp;enic-&gt;rq[vrq-&gt;index].stats;</div><div class='add'>+	bool outer_csum_ok = true, encap = false;</div><div class='add'>+</div><div class='add'>+	if ((netdev-&gt;features &amp; NETIF_F_RXHASH) &amp;&amp; rss_hash &amp;&amp; type == 3) {</div><div class='add'>+		switch (rss_type) {</div><div class='add'>+		case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4:</div><div class='add'>+		case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6:</div><div class='add'>+		case CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX:</div><div class='add'>+			skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L4);</div><div class='add'>+			rqstats-&gt;l4_rss_hash++;</div><div class='add'>+			break;</div><div class='add'>+		case CQ_ENET_RQ_DESC_RSS_TYPE_IPv4:</div><div class='add'>+		case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6:</div><div class='add'>+		case CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX:</div><div class='add'>+			skb_set_hash(skb, rss_hash, PKT_HASH_TYPE_L3);</div><div class='add'>+			rqstats-&gt;l3_rss_hash++;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (enic-&gt;vxlan.vxlan_udp_port_number) {</div><div class='add'>+		switch (enic-&gt;vxlan.patch_level) {</div><div class='add'>+		case 0:</div><div class='add'>+			if (fcoe) {</div><div class='add'>+				encap = true;</div><div class='add'>+				outer_csum_ok = fcoe_fc_crc_ok;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			if (type == 7 &amp;&amp; (rss_hash &amp; BIT(0))) {</div><div class='add'>+				encap = true;</div><div class='add'>+				outer_csum_ok = (rss_hash &amp; BIT(1)) &amp;&amp;</div><div class='add'>+						(rss_hash &amp; BIT(2));</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Hardware does not provide whole packet checksum. It only</div><div class='add'>+	 * provides pseudo checksum. Since hw validates the packet</div><div class='add'>+	 * checksum but not provide us the checksum value. use</div><div class='add'>+	 * CHECSUM_UNNECESSARY.</div><div class='add'>+	 *</div><div class='add'>+	 * In case of encap pkt tcp_udp_csum_ok/tcp_udp_csum_ok is</div><div class='add'>+	 * inner csum_ok. outer_csum_ok is set by hw when outer udp</div><div class='add'>+	 * csum is correct or is zero.</div><div class='add'>+	 */</div><div class='add'>+	if ((netdev-&gt;features &amp; NETIF_F_RXCSUM) &amp;&amp; !csum_not_calc &amp;&amp;</div><div class='add'>+	    tcp_udp_csum_ok &amp;&amp; outer_csum_ok &amp;&amp; (ipv4_csum_ok || ipv6)) {</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+		skb-&gt;csum_level = encap;</div><div class='add'>+		if (encap)</div><div class='add'>+			rqstats-&gt;csum_unnecessary_encap++;</div><div class='add'>+		else</div><div class='add'>+			rqstats-&gt;csum_unnecessary++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vlan_stripped) {</div><div class='add'>+		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);</div><div class='add'>+		rqstats-&gt;vlan_stripped++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * cq_enet_rq_desc accesses section uses only the 1st 15 bytes of the cq which</div><div class='add'>+ * is identical for all type (16,32 and 64 byte) of cqs.</div><div class='add'>+ */</div><div class='add'>+static void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc, u8 *ingress_port,</div><div class='add'>+				u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type,</div><div class='add'>+				u8 *csum_not_calc, u32 *rss_hash,</div><div class='add'>+				u16 *bytes_written, u8 *packet_error,</div><div class='add'>+				u8 *vlan_stripped, u16 *vlan_tci,</div><div class='add'>+				u16 *checksum, u8 *fcoe_sof,</div><div class='add'>+				u8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error,</div><div class='add'>+				u8 *fcoe_eof, u8 *tcp_udp_csum_ok, u8 *udp,</div><div class='add'>+				u8 *tcp, u8 *ipv4_csum_ok, u8 *ipv6, u8 *ipv4,</div><div class='add'>+				u8 *ipv4_fragment, u8 *fcs_ok)</div><div class='add'>+{</div><div class='add'>+	u16 completed_index_flags;</div><div class='add'>+	u16 q_number_rss_type_flags;</div><div class='add'>+	u16 bytes_written_flags;</div><div class='add'>+</div><div class='add'>+	completed_index_flags = le16_to_cpu(desc-&gt;completed_index_flags);</div><div class='add'>+	q_number_rss_type_flags =</div><div class='add'>+		le16_to_cpu(desc-&gt;q_number_rss_type_flags);</div><div class='add'>+	bytes_written_flags = le16_to_cpu(desc-&gt;bytes_written_flags);</div><div class='add'>+</div><div class='add'>+	*ingress_port = (completed_index_flags &amp;</div><div class='add'>+		CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;</div><div class='add'>+	*fcoe = (completed_index_flags &amp; CQ_ENET_RQ_DESC_FLAGS_FCOE) ?</div><div class='add'>+		1 : 0;</div><div class='add'>+	*eop = (completed_index_flags &amp; CQ_ENET_RQ_DESC_FLAGS_EOP) ?</div><div class='add'>+		1 : 0;</div><div class='add'>+	*sop = (completed_index_flags &amp; CQ_ENET_RQ_DESC_FLAGS_SOP) ?</div><div class='add'>+		1 : 0;</div><div class='add'>+</div><div class='add'>+	*rss_type = (u8)((q_number_rss_type_flags &gt;&gt; CQ_DESC_Q_NUM_BITS) &amp;</div><div class='add'>+		CQ_ENET_RQ_DESC_RSS_TYPE_MASK);</div><div class='add'>+	*csum_not_calc = (q_number_rss_type_flags &amp;</div><div class='add'>+		CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	*rss_hash = le32_to_cpu(desc-&gt;rss_hash);</div><div class='add'>+</div><div class='add'>+	*bytes_written = bytes_written_flags &amp;</div><div class='add'>+		CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;</div><div class='add'>+	*packet_error = (bytes_written_flags &amp;</div><div class='add'>+		CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;</div><div class='add'>+	*vlan_stripped = (bytes_written_flags &amp;</div><div class='add'>+		CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Tag Control Information(16) = user_priority(3) + cfi(1) + vlan(12)</div><div class='add'>+	 */</div><div class='add'>+	*vlan_tci = le16_to_cpu(desc-&gt;vlan);</div><div class='add'>+</div><div class='add'>+	if (*fcoe) {</div><div class='add'>+		*fcoe_sof = (u8)(le16_to_cpu(desc-&gt;checksum_fcoe) &amp;</div><div class='add'>+			CQ_ENET_RQ_DESC_FCOE_SOF_MASK);</div><div class='add'>+		*fcoe_fc_crc_ok = (desc-&gt;flags &amp;</div><div class='add'>+			CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;</div><div class='add'>+		*fcoe_enc_error = (desc-&gt;flags &amp;</div><div class='add'>+			CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;</div><div class='add'>+		*fcoe_eof = (u8)((le16_to_cpu(desc-&gt;checksum_fcoe) &gt;&gt;</div><div class='add'>+			CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &amp;</div><div class='add'>+			CQ_ENET_RQ_DESC_FCOE_EOF_MASK);</div><div class='add'>+		*checksum = 0;</div><div class='add'>+	} else {</div><div class='add'>+		*fcoe_sof = 0;</div><div class='add'>+		*fcoe_fc_crc_ok = 0;</div><div class='add'>+		*fcoe_enc_error = 0;</div><div class='add'>+		*fcoe_eof = 0;</div><div class='add'>+		*checksum = le16_to_cpu(desc-&gt;checksum_fcoe);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*tcp_udp_csum_ok =</div><div class='add'>+		(desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;</div><div class='add'>+	*udp = (desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;</div><div class='add'>+	*tcp = (desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;</div><div class='add'>+	*ipv4_csum_ok =</div><div class='add'>+		(desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;</div><div class='add'>+	*ipv6 = (desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;</div><div class='add'>+	*ipv4 = (desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;</div><div class='add'>+	*ipv4_fragment =</div><div class='add'>+		(desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;</div><div class='add'>+	*fcs_ok = (desc-&gt;flags &amp; CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool enic_rq_pkt_error(struct vnic_rq *vrq, u8 packet_error, u8 fcs_ok,</div><div class='add'>+			      u16 bytes_written)</div><div class='add'>+{</div><div class='add'>+	struct enic *enic = vnic_dev_priv(vrq-&gt;vdev);</div><div class='add'>+	struct enic_rq_stats *rqstats = &amp;enic-&gt;rq[vrq-&gt;index].stats;</div><div class='add'>+</div><div class='add'>+	if (packet_error) {</div><div class='add'>+		if (!fcs_ok) {</div><div class='add'>+			if (bytes_written &gt; 0)</div><div class='add'>+				rqstats-&gt;bad_fcs++;</div><div class='add'>+			else if (bytes_written == 0)</div><div class='add'>+				rqstats-&gt;pkt_truncated++;</div><div class='add'>+		}</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int enic_rq_alloc_buf(struct vnic_rq *rq)</div><div class='add'>+{</div><div class='add'>+	struct enic *enic = vnic_dev_priv(rq-&gt;vdev);</div><div class='add'>+	struct net_device *netdev = enic-&gt;netdev;</div><div class='add'>+	struct enic_rq *erq = &amp;enic-&gt;rq[rq-&gt;index];</div><div class='add'>+	struct enic_rq_stats *rqstats = &amp;erq-&gt;stats;</div><div class='add'>+	unsigned int offset = 0;</div><div class='add'>+	unsigned int len = netdev-&gt;mtu + VLAN_ETH_HLEN;</div><div class='add'>+	unsigned int os_buf_index = 0;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	struct vnic_rq_buf *buf = rq-&gt;to_use;</div><div class='add'>+	struct page *page;</div><div class='add'>+	unsigned int truesize = len;</div><div class='add'>+</div><div class='add'>+	if (buf-&gt;os_buf) {</div><div class='add'>+		enic_queue_rq_desc(rq, buf-&gt;os_buf, os_buf_index, buf-&gt;dma_addr,</div><div class='add'>+				   buf-&gt;len);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	page = page_pool_dev_alloc(erq-&gt;pool, &amp;offset, &amp;truesize);</div><div class='add'>+	if (unlikely(!page)) {</div><div class='add'>+		rqstats-&gt;pp_alloc_fail++;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	buf-&gt;offset = offset;</div><div class='add'>+	buf-&gt;truesize = truesize;</div><div class='add'>+	dma_addr = page_pool_get_dma_addr(page) + offset;</div><div class='add'>+	enic_queue_rq_desc(rq, (void *)page, os_buf_index, dma_addr, len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)</div><div class='add'>+{</div><div class='add'>+	struct enic *enic = vnic_dev_priv(rq-&gt;vdev);</div><div class='add'>+	struct enic_rq *erq = &amp;enic-&gt;rq[rq-&gt;index];</div><div class='add'>+</div><div class='add'>+	if (!buf-&gt;os_buf)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	page_pool_put_full_page(erq-&gt;pool, (struct page *)buf-&gt;os_buf, true);</div><div class='add'>+	buf-&gt;os_buf = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enic_rq_indicate_buf(struct enic *enic, struct vnic_rq *rq,</div><div class='add'>+				 struct vnic_rq_buf *buf, void *cq_desc,</div><div class='add'>+				 u8 type, u16 q_number, u16 completed_index)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct vnic_cq *cq = &amp;enic-&gt;cq[enic_cq_rq(enic, rq-&gt;index)];</div><div class='add'>+	struct enic_rq_stats *rqstats = &amp;enic-&gt;rq[rq-&gt;index].stats;</div><div class='add'>+	struct napi_struct *napi;</div><div class='add'>+</div><div class='add'>+	u8 eop, sop, ingress_port, vlan_stripped;</div><div class='add'>+	u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;</div><div class='add'>+	u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;</div><div class='add'>+	u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;</div><div class='add'>+	u8 packet_error;</div><div class='add'>+	u16 bytes_written, vlan_tci, checksum;</div><div class='add'>+	u32 rss_hash;</div><div class='add'>+</div><div class='add'>+	rqstats-&gt;packets++;</div><div class='add'>+</div><div class='add'>+	cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc, &amp;ingress_port,</div><div class='add'>+			    &amp;fcoe, &amp;eop, &amp;sop, &amp;rss_type, &amp;csum_not_calc,</div><div class='add'>+			    &amp;rss_hash, &amp;bytes_written, &amp;packet_error,</div><div class='add'>+			    &amp;vlan_stripped, &amp;vlan_tci, &amp;checksum, &amp;fcoe_sof,</div><div class='add'>+			    &amp;fcoe_fc_crc_ok, &amp;fcoe_enc_error, &amp;fcoe_eof,</div><div class='add'>+			    &amp;tcp_udp_csum_ok, &amp;udp, &amp;tcp, &amp;ipv4_csum_ok, &amp;ipv6,</div><div class='add'>+			    &amp;ipv4, &amp;ipv4_fragment, &amp;fcs_ok);</div><div class='add'>+</div><div class='add'>+	if (enic_rq_pkt_error(rq, packet_error, fcs_ok, bytes_written))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (eop &amp;&amp; bytes_written &gt; 0) {</div><div class='add'>+		/* Good receive</div><div class='add'>+		 */</div><div class='add'>+		rqstats-&gt;bytes += bytes_written;</div><div class='add'>+		napi = &amp;enic-&gt;napi[rq-&gt;index];</div><div class='add'>+		skb = napi_get_frags(napi);</div><div class='add'>+		if (unlikely(!skb)) {</div><div class='add'>+			net_warn_ratelimited("%s: skb alloc error rq[%d], desc[%d]\n",</div><div class='add'>+					     enic-&gt;netdev-&gt;name, rq-&gt;index,</div><div class='add'>+					     completed_index);</div><div class='add'>+			rqstats-&gt;no_skb++;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		prefetch(skb-&gt;data - NET_IP_ALIGN);</div><div class='add'>+</div><div class='add'>+		dma_sync_single_for_cpu(&amp;enic-&gt;pdev-&gt;dev, buf-&gt;dma_addr,</div><div class='add'>+					bytes_written, DMA_FROM_DEVICE);</div><div class='add'>+		skb_add_rx_frag(skb, skb_shinfo(skb)-&gt;nr_frags,</div><div class='add'>+				(struct page *)buf-&gt;os_buf, buf-&gt;offset,</div><div class='add'>+				bytes_written, buf-&gt;truesize);</div><div class='add'>+		skb_record_rx_queue(skb, q_number);</div><div class='add'>+		enic_rq_set_skb_flags(rq, type, rss_hash, rss_type, fcoe,</div><div class='add'>+				      fcoe_fc_crc_ok, vlan_stripped,</div><div class='add'>+				      csum_not_calc, tcp_udp_csum_ok, ipv6,</div><div class='add'>+				      ipv4_csum_ok, vlan_tci, skb);</div><div class='add'>+		skb_mark_for_recycle(skb);</div><div class='add'>+		napi_gro_frags(napi);</div><div class='add'>+		if (enic-&gt;rx_coalesce_setting.use_adaptive_rx_coalesce)</div><div class='add'>+			enic_intr_update_pkt_size(&amp;cq-&gt;pkt_size_counter,</div><div class='add'>+						  bytes_written);</div><div class='add'>+		buf-&gt;os_buf = NULL;</div><div class='add'>+		buf-&gt;dma_addr = 0;</div><div class='add'>+		buf = buf-&gt;next;</div><div class='add'>+	} else {</div><div class='add'>+		/* Buffer overflow</div><div class='add'>+		 */</div><div class='add'>+		rqstats-&gt;pkt_truncated++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enic_rq_service(struct enic *enic, void *cq_desc, u8 type,</div><div class='add'>+			    u16 q_number, u16 completed_index)</div><div class='add'>+{</div><div class='add'>+	struct enic_rq_stats *rqstats = &amp;enic-&gt;rq[q_number].stats;</div><div class='add'>+	struct vnic_rq *vrq = &amp;enic-&gt;rq[q_number].vrq;</div><div class='add'>+	struct vnic_rq_buf *vrq_buf = vrq-&gt;to_clean;</div><div class='add'>+	int skipped;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		skipped = (vrq_buf-&gt;index != completed_index);</div><div class='add'>+		if (!skipped)</div><div class='add'>+			enic_rq_indicate_buf(enic, vrq, vrq_buf, cq_desc, type,</div><div class='add'>+					     q_number, completed_index);</div><div class='add'>+		else</div><div class='add'>+			rqstats-&gt;desc_skip++;</div><div class='add'>+</div><div class='add'>+		vrq-&gt;ring.desc_avail++;</div><div class='add'>+		vrq-&gt;to_clean = vrq_buf-&gt;next;</div><div class='add'>+		vrq_buf = vrq_buf-&gt;next;</div><div class='add'>+		if (!skipped)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int enic_rq_cq_service(struct enic *enic, unsigned int cq_index,</div><div class='add'>+				unsigned int work_to_do)</div><div class='add'>+{</div><div class='add'>+	struct vnic_cq *cq = &amp;enic-&gt;cq[cq_index];</div><div class='add'>+	void *cq_desc = vnic_cq_to_clean(cq);</div><div class='add'>+	u16 q_number, completed_index;</div><div class='add'>+	unsigned int work_done = 0;</div><div class='add'>+	u8 type, color;</div><div class='add'>+</div><div class='add'>+	enic_rq_cq_desc_dec(cq_desc, enic-&gt;ext_cq, &amp;type, &amp;color, &amp;q_number,</div><div class='add'>+			    &amp;completed_index);</div><div class='add'>+</div><div class='add'>+	while (color != cq-&gt;last_color) {</div><div class='add'>+		enic_rq_service(enic, cq_desc, type, q_number, completed_index);</div><div class='add'>+		vnic_cq_inc_to_clean(cq);</div><div class='add'>+</div><div class='add'>+		if (++work_done &gt;= work_to_do)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		cq_desc = vnic_cq_to_clean(cq);</div><div class='add'>+		enic_rq_cq_desc_dec(cq_desc, enic-&gt;ext_cq, &amp;type, &amp;color,</div><div class='add'>+				    &amp;q_number, &amp;completed_index);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_rq.h b/drivers/net/ethernet/cisco/enic/enic_rq.h<br/>new file mode 100644<br/>index 000000000000..98476a7297af<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_rq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic_rq.h</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+ * Copyright 2024 Cisco Systems, Inc.  All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+unsigned int enic_rq_cq_service(struct enic *enic, unsigned int cq_index,</div><div class='add'>+				unsigned int work_to_do);</div><div class='add'>+int enic_rq_alloc_buf(struct vnic_rq *rq);</div><div class='add'>+void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf);</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_wq.c b/drivers/net/ethernet/cisco/enic/enic_wq.c<br/>new file mode 100644<br/>index 000000000000..07936f8b4231<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_wq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic_wq.c</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// Copyright 2025 Cisco Systems, Inc.  All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;net/netdev_queues.h&gt;</div><div class='add'>+#include "enic_res.h"</div><div class='add'>+#include "enic.h"</div><div class='add'>+#include "enic_wq.h"</div><div class='add'>+</div><div class='add'>+#define ENET_CQ_DESC_COMP_NDX_BITS 14</div><div class='add'>+#define ENET_CQ_DESC_COMP_NDX_MASK GENMASK(ENET_CQ_DESC_COMP_NDX_BITS - 1, 0)</div><div class='add'>+</div><div class='add'>+static void enic_wq_cq_desc_dec(const struct cq_desc *desc_arg, bool ext_wq,</div><div class='add'>+				u8 *type, u8 *color, u16 *q_number,</div><div class='add'>+				u16 *completed_index)</div><div class='add'>+{</div><div class='add'>+	const struct cq_desc *desc = desc_arg;</div><div class='add'>+	const u8 type_color = desc-&gt;type_color;</div><div class='add'>+</div><div class='add'>+	*color = (type_color &gt;&gt; CQ_DESC_COLOR_SHIFT) &amp; CQ_DESC_COLOR_MASK;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure color bit is read from desc *before* other fields</div><div class='add'>+	 * are read from desc.  Hardware guarantees color bit is last</div><div class='add'>+	 * bit (byte) written.  Adding the rmb() prevents the compiler</div><div class='add'>+	 * and/or CPU from reordering the reads which would potentially</div><div class='add'>+	 * result in reading stale values.</div><div class='add'>+	 */</div><div class='add'>+	rmb();</div><div class='add'>+</div><div class='add'>+	*type = type_color &amp; CQ_DESC_TYPE_MASK;</div><div class='add'>+	*q_number = le16_to_cpu(desc-&gt;q_number) &amp; CQ_DESC_Q_NUM_MASK;</div><div class='add'>+</div><div class='add'>+	if (ext_wq)</div><div class='add'>+		*completed_index = le16_to_cpu(desc-&gt;completed_index) &amp;</div><div class='add'>+			ENET_CQ_DESC_COMP_NDX_MASK;</div><div class='add'>+	else</div><div class='add'>+		*completed_index = le16_to_cpu(desc-&gt;completed_index) &amp;</div><div class='add'>+			CQ_DESC_COMP_NDX_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)</div><div class='add'>+{</div><div class='add'>+	struct enic *enic = vnic_dev_priv(wq-&gt;vdev);</div><div class='add'>+</div><div class='add'>+	if (buf-&gt;sop)</div><div class='add'>+		dma_unmap_single(&amp;enic-&gt;pdev-&gt;dev, buf-&gt;dma_addr, buf-&gt;len,</div><div class='add'>+				 DMA_TO_DEVICE);</div><div class='add'>+	else</div><div class='add'>+		dma_unmap_page(&amp;enic-&gt;pdev-&gt;dev, buf-&gt;dma_addr, buf-&gt;len,</div><div class='add'>+			       DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+	if (buf-&gt;os_buf)</div><div class='add'>+		dev_kfree_skb_any(buf-&gt;os_buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enic_wq_free_buf(struct vnic_wq *wq, struct cq_desc *cq_desc,</div><div class='add'>+			     struct vnic_wq_buf *buf, void *opaque)</div><div class='add'>+{</div><div class='add'>+	struct enic *enic = vnic_dev_priv(wq-&gt;vdev);</div><div class='add'>+</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.cq_work++;</div><div class='add'>+	enic-&gt;wq[wq-&gt;index].stats.cq_bytes += buf-&gt;len;</div><div class='add'>+	enic_free_wq_buf(wq, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,</div><div class='add'>+			    u8 type, u16 q_number, u16 completed_index)</div><div class='add'>+{</div><div class='add'>+	struct enic *enic = vnic_dev_priv(vdev);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;enic-&gt;wq[q_number].lock);</div><div class='add'>+</div><div class='add'>+	vnic_wq_service(&amp;enic-&gt;wq[q_number].vwq, cq_desc,</div><div class='add'>+			completed_index, enic_wq_free_buf, NULL);</div><div class='add'>+</div><div class='add'>+	if (netif_tx_queue_stopped(netdev_get_tx_queue(enic-&gt;netdev, q_number))</div><div class='add'>+	    &amp;&amp; vnic_wq_desc_avail(&amp;enic-&gt;wq[q_number].vwq) &gt;=</div><div class='add'>+	    (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) {</div><div class='add'>+		netif_wake_subqueue(enic-&gt;netdev, q_number);</div><div class='add'>+		enic-&gt;wq[q_number].stats.wake++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;enic-&gt;wq[q_number].lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int enic_wq_cq_service(struct enic *enic, unsigned int cq_index,</div><div class='add'>+				unsigned int work_to_do)</div><div class='add'>+{</div><div class='add'>+	struct vnic_cq *cq = &amp;enic-&gt;cq[cq_index];</div><div class='add'>+	u16 q_number, completed_index;</div><div class='add'>+	unsigned int work_done = 0;</div><div class='add'>+	struct cq_desc *cq_desc;</div><div class='add'>+	u8 type, color;</div><div class='add'>+	bool ext_wq;</div><div class='add'>+</div><div class='add'>+	ext_wq = cq-&gt;ring.size &gt; ENIC_MAX_WQ_DESCS_DEFAULT;</div><div class='add'>+</div><div class='add'>+	cq_desc = (struct cq_desc *)vnic_cq_to_clean(cq);</div><div class='add'>+	enic_wq_cq_desc_dec(cq_desc, ext_wq, &amp;type, &amp;color,</div><div class='add'>+			    &amp;q_number, &amp;completed_index);</div><div class='add'>+</div><div class='add'>+	while (color != cq-&gt;last_color) {</div><div class='add'>+		enic_wq_service(cq-&gt;vdev, cq_desc, type, q_number,</div><div class='add'>+				completed_index);</div><div class='add'>+</div><div class='add'>+		vnic_cq_inc_to_clean(cq);</div><div class='add'>+</div><div class='add'>+		if (++work_done &gt;= work_to_do)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		cq_desc = (struct cq_desc *)vnic_cq_to_clean(cq);</div><div class='add'>+		enic_wq_cq_desc_dec(cq_desc, ext_wq, &amp;type, &amp;color,</div><div class='add'>+				    &amp;q_number, &amp;completed_index);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/enic_wq.h b/drivers/net/ethernet/cisco/enic/enic_wq.h<br/>new file mode 100644<br/>index 000000000000..12acb3f2fbc9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/enic_wq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/enic_wq.h</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+ * Copyright 2025 Cisco Systems, Inc.  All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf);</div><div class='add'>+unsigned int enic_wq_cq_service(struct enic *enic, unsigned int cq_index,</div><div class='add'>+				unsigned int work_to_do);</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/vnic_cq.h b/drivers/net/ethernet/cisco/enic/vnic_cq.h<br/>index eed5bf59e5d2..0e37f5d5e527 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/vnic_cq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/vnic_cq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/vnic_cq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/vnic_cq.h</a></div><div class='hunk'>@@ -56,45 +56,18 @@ struct vnic_cq {</div><div class='ctx'> 	ktime_t prev_ts;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline unsigned int vnic_cq_service(struct vnic_cq *cq,</div><div class='del'>-	unsigned int work_to_do,</div><div class='del'>-	int (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc,</div><div class='del'>-	u8 type, u16 q_number, u16 completed_index, void *opaque),</div><div class='del'>-	void *opaque)</div><div class='add'>+static inline void *vnic_cq_to_clean(struct vnic_cq *cq)</div><div class='ctx'> {</div><div class='del'>-	struct cq_desc *cq_desc;</div><div class='del'>-	unsigned int work_done = 0;</div><div class='del'>-	u16 q_number, completed_index;</div><div class='del'>-	u8 type, color;</div><div class='del'>-</div><div class='del'>-	cq_desc = (struct cq_desc *)((u8 *)cq-&gt;ring.descs +</div><div class='del'>-		cq-&gt;ring.desc_size * cq-&gt;to_clean);</div><div class='del'>-	cq_desc_dec(cq_desc, &amp;type, &amp;color,</div><div class='del'>-		&amp;q_number, &amp;completed_index);</div><div class='del'>-</div><div class='del'>-	while (color != cq-&gt;last_color) {</div><div class='del'>-</div><div class='del'>-		if ((*q_service)(cq-&gt;vdev, cq_desc, type,</div><div class='del'>-			q_number, completed_index, opaque))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		cq-&gt;to_clean++;</div><div class='del'>-		if (cq-&gt;to_clean == cq-&gt;ring.desc_count) {</div><div class='del'>-			cq-&gt;to_clean = 0;</div><div class='del'>-			cq-&gt;last_color = cq-&gt;last_color ? 0 : 1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cq_desc = (struct cq_desc *)((u8 *)cq-&gt;ring.descs +</div><div class='del'>-			cq-&gt;ring.desc_size * cq-&gt;to_clean);</div><div class='del'>-		cq_desc_dec(cq_desc, &amp;type, &amp;color,</div><div class='del'>-			&amp;q_number, &amp;completed_index);</div><div class='add'>+	return ((u8 *)cq-&gt;ring.descs + cq-&gt;ring.desc_size * cq-&gt;to_clean);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		work_done++;</div><div class='del'>-		if (work_done &gt;= work_to_do)</div><div class='del'>-			break;</div><div class='add'>+static inline void vnic_cq_inc_to_clean(struct vnic_cq *cq)</div><div class='add'>+{</div><div class='add'>+	cq-&gt;to_clean++;</div><div class='add'>+	if (cq-&gt;to_clean == cq-&gt;ring.desc_count) {</div><div class='add'>+		cq-&gt;to_clean = 0;</div><div class='add'>+		cq-&gt;last_color = cq-&gt;last_color ? 0 : 1;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vnic_cq_free(struct vnic_cq *cq);</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/vnic_devcmd.h b/drivers/net/ethernet/cisco/enic/vnic_devcmd.h<br/>index db56d778877a..605ef17f967e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/vnic_devcmd.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/vnic_devcmd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/vnic_devcmd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/vnic_devcmd.h</a></div><div class='hunk'>@@ -436,6 +436,25 @@ enum vnic_devcmd_cmd {</div><div class='ctx'> 	 * in: (u16) a2 = unsigned short int port information</div><div class='ctx'> 	 */</div><div class='ctx'> 	CMD_OVERLAY_OFFLOAD_CFG = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 73),</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Set extended CQ field in MREGS of RQ (or all RQs)</div><div class='add'>+	 * for given vNIC</div><div class='add'>+	 * in: (u64) a0 = RQ selection (VNIC_RQ_ALL for all RQs)</div><div class='add'>+	 *     (u32) a1 = CQ entry size</div><div class='add'>+	 *         VNIC_RQ_CQ_ENTRY_SIZE_16 --&gt; 16 bytes</div><div class='add'>+	 *         VNIC_RQ_CQ_ENTRY_SIZE_32 --&gt; 32 bytes</div><div class='add'>+	 *         VNIC_RQ_CQ_ENTRY_SIZE_64 --&gt; 64 bytes</div><div class='add'>+	 *</div><div class='add'>+	 * Capability query:</div><div class='add'>+	 * out: (u32) a0 = errno, 0:valid cmd</div><div class='add'>+	 *      (u32) a1 = value consisting of supported entries</div><div class='add'>+	 *         bit 0: 16 bytes</div><div class='add'>+	 *         bit 1: 32 bytes</div><div class='add'>+	 *         bit 2: 64 bytes</div><div class='add'>+	 */</div><div class='add'>+	CMD_CQ_ENTRY_SIZE_SET = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 90),</div><div class='add'>+</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* CMD_ENABLE2 flags */</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/vnic_enet.h b/drivers/net/ethernet/cisco/enic/vnic_enet.h<br/>index 5acc236069de..9e8e86262a3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/vnic_enet.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/vnic_enet.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/vnic_enet.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/vnic_enet.h</a></div><div class='hunk'>@@ -21,6 +21,11 @@ struct vnic_enet_config {</div><div class='ctx'> 	u16 loop_tag;</div><div class='ctx'> 	u16 vf_rq_count;</div><div class='ctx'> 	u16 num_arfs;</div><div class='add'>+	u8 reserved[66];</div><div class='add'>+	u32 max_rq_ring;	// MAX RQ ring size</div><div class='add'>+	u32 max_wq_ring;	// MAX WQ ring size</div><div class='add'>+	u32 max_cq_ring;	// MAX CQ ring size</div><div class='add'>+	u32 rdma_rsvd_lkey;	// Reserved (privileged) LKey</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define VENETF_TSO		0x1	/* TSO enabled */</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/vnic_rq.h b/drivers/net/ethernet/cisco/enic/vnic_rq.h<br/>index 0bc595abc03b..a1cdd729caec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/vnic_rq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/vnic_rq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/vnic_rq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/vnic_rq.h</a></div><div class='hunk'>@@ -50,7 +50,7 @@ struct vnic_rq_ctrl {</div><div class='ctx'> 	(VNIC_RQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_rq_buf))</div><div class='ctx'> #define VNIC_RQ_BUF_BLKS_NEEDED(entries) \</div><div class='ctx'> 	DIV_ROUND_UP(entries, VNIC_RQ_BUF_BLK_ENTRIES(entries))</div><div class='del'>-#define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(4096)</div><div class='add'>+#define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(16384)</div><div class='ctx'> </div><div class='ctx'> struct vnic_rq_buf {</div><div class='ctx'> 	struct vnic_rq_buf *next;</div><div class='hunk'>@@ -61,6 +61,8 @@ struct vnic_rq_buf {</div><div class='ctx'> 	unsigned int index;</div><div class='ctx'> 	void *desc;</div><div class='ctx'> 	uint64_t wr_id;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	unsigned int truesize;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum enic_poll_state {</div><div class='head'>diff --git a/drivers/net/ethernet/cisco/enic/vnic_wq.h b/drivers/net/ethernet/cisco/enic/vnic_wq.h<br/>index 75c526911074..3bb4758100ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/vnic_wq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cisco/enic/vnic_wq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cisco/enic/vnic_wq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cisco/enic/vnic_wq.h</a></div><div class='hunk'>@@ -62,7 +62,7 @@ struct vnic_wq_buf {</div><div class='ctx'> 	(VNIC_WQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_wq_buf))</div><div class='ctx'> #define VNIC_WQ_BUF_BLKS_NEEDED(entries) \</div><div class='ctx'> 	DIV_ROUND_UP(entries, VNIC_WQ_BUF_BLK_ENTRIES(entries))</div><div class='del'>-#define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(4096)</div><div class='add'>+#define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(16384)</div><div class='ctx'> </div><div class='ctx'> struct vnic_wq {</div><div class='ctx'> 	unsigned int index;</div><div class='head'>diff --git a/drivers/net/ethernet/cortina/gemini.c b/drivers/net/ethernet/cortina/gemini.c<br/>index 991e3839858b..6a2004bbe87f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cortina/gemini.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/cortina/gemini.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/cortina/gemini.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/cortina/gemini.c</a></div><div class='hunk'>@@ -40,6 +40,7 @@</div><div class='ctx'> #include &lt;linux/in.h&gt;</div><div class='ctx'> #include &lt;linux/ip.h&gt;</div><div class='ctx'> #include &lt;linux/ipv6.h&gt;</div><div class='add'>+#include &lt;net/gro.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "gemini.h"</div><div class='ctx'> </div><div class='hunk'>@@ -1143,6 +1144,7 @@ static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb,</div><div class='ctx'> 	struct gmac_txdesc *txd;</div><div class='ctx'> 	skb_frag_t *skb_frag;</div><div class='ctx'> 	dma_addr_t mapping;</div><div class='add'>+	bool tcp = false;</div><div class='ctx'> 	void *buffer;</div><div class='ctx'> 	u16 mss;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1150,6 +1152,13 @@ static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb,</div><div class='ctx'> 	word1 = skb-&gt;len;</div><div class='ctx'> 	word3 = SOF_BIT;</div><div class='ctx'> </div><div class='add'>+	/* Determine if we are doing TCP */</div><div class='add'>+	if (skb-&gt;protocol == htons(ETH_P_IP))</div><div class='add'>+		tcp = (ip_hdr(skb)-&gt;protocol == IPPROTO_TCP);</div><div class='add'>+	else</div><div class='add'>+		/* IPv6 */</div><div class='add'>+		tcp = (ipv6_hdr(skb)-&gt;nexthdr == IPPROTO_TCP);</div><div class='add'>+</div><div class='ctx'> 	mss = skb_shinfo(skb)-&gt;gso_size;</div><div class='ctx'> 	if (mss) {</div><div class='ctx'> 		/* This means we are dealing with TCP and skb-&gt;len is the</div><div class='hunk'>@@ -1162,8 +1171,26 @@ static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb,</div><div class='ctx'> 			   mss, skb-&gt;len);</div><div class='ctx'> 		word1 |= TSS_MTU_ENABLE_BIT;</div><div class='ctx'> 		word3 |= mss;</div><div class='add'>+	} else if (tcp) {</div><div class='add'>+		/* Even if we are not using TSO, use the hardware offloader</div><div class='add'>+		 * for transferring the TCP frame: this hardware has partial</div><div class='add'>+		 * TCP awareness (called TOE - TCP Offload Engine) and will</div><div class='add'>+		 * according to the datasheet put packets belonging to the</div><div class='add'>+		 * same TCP connection in the same queue for the TOE/TSO</div><div class='add'>+		 * engine to process. The engine will deal with chopping</div><div class='add'>+		 * up frames that exceed ETH_DATA_LEN which the</div><div class='add'>+		 * checksumming engine cannot handle (see below) into</div><div class='add'>+		 * manageable chunks. It flawlessly deals with quite big</div><div class='add'>+		 * frames and frames containing custom DSA EtherTypes.</div><div class='add'>+		 */</div><div class='add'>+		mss = netdev-&gt;mtu + skb_tcp_all_headers(skb);</div><div class='add'>+		mss = min(mss, skb-&gt;len);</div><div class='add'>+		netdev_dbg(netdev, "TOE/TSO len %04x mtu %04x mss %04x\n",</div><div class='add'>+			   skb-&gt;len, netdev-&gt;mtu, mss);</div><div class='add'>+		word1 |= TSS_MTU_ENABLE_BIT;</div><div class='add'>+		word3 |= mss;</div><div class='ctx'> 	} else if (skb-&gt;len &gt;= ETH_FRAME_LEN) {</div><div class='del'>-		/* Hardware offloaded checksumming isn't working on frames</div><div class='add'>+		/* Hardware offloaded checksumming isn't working on non-TCP frames</div><div class='ctx'> 		 * bigger than 1514 bytes. A hypothesis about this is that the</div><div class='ctx'> 		 * checksum buffer is only 1518 bytes, so when the frames get</div><div class='ctx'> 		 * bigger they get truncated, or the last few bytes get</div><div class='hunk'>@@ -1180,21 +1207,16 @@ static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (skb-&gt;ip_summed == CHECKSUM_PARTIAL) {</div><div class='del'>-		int tcp = 0;</div><div class='del'>-</div><div class='ctx'> 		/* We do not switch off the checksumming on non TCP/UDP</div><div class='ctx'> 		 * frames: as is shown from tests, the checksumming engine</div><div class='ctx'> 		 * is smart enough to see that a frame is not actually TCP</div><div class='ctx'> 		 * or UDP and then just pass it through without any changes</div><div class='ctx'> 		 * to the frame.</div><div class='ctx'> 		 */</div><div class='del'>-		if (skb-&gt;protocol == htons(ETH_P_IP)) {</div><div class='add'>+		if (skb-&gt;protocol == htons(ETH_P_IP))</div><div class='ctx'> 			word1 |= TSS_IP_CHKSUM_BIT;</div><div class='del'>-			tcp = ip_hdr(skb)-&gt;protocol == IPPROTO_TCP;</div><div class='del'>-		} else { /* IPv6 */</div><div class='add'>+		else</div><div class='ctx'> 			word1 |= TSS_IPV6_ENABLE_BIT;</div><div class='del'>-			tcp = ipv6_hdr(skb)-&gt;nexthdr == IPPROTO_TCP;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		word1 |= tcp ? TSS_TCP_CHKSUM_BIT : TSS_UDP_CHKSUM_BIT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1833,9 +1855,8 @@ static int gmac_open(struct net_device *netdev)</div><div class='ctx'> 	gmac_enable_tx_rx(netdev);</div><div class='ctx'> 	netif_tx_start_all_queues(netdev);</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;port-&gt;rx_coalesce_timer, CLOCK_MONOTONIC,</div><div class='del'>-		     HRTIMER_MODE_REL);</div><div class='del'>-	port-&gt;rx_coalesce_timer.function = &amp;gmac_coalesce_delay_expired;</div><div class='add'>+	hrtimer_setup(&amp;port-&gt;rx_coalesce_timer, &amp;gmac_coalesce_delay_expired, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(netdev, "opened\n");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/davicom/dm9000.c b/drivers/net/ethernet/davicom/dm9000.c<br/>index 8735e333034c..b87eaf0c250c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/davicom/dm9000.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/davicom/dm9000.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/davicom/dm9000.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/davicom/dm9000.c</a></div><div class='hunk'>@@ -1777,10 +1777,11 @@ static void dm9000_drv_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(ndev);</div><div class='ctx'> 	dm9000_release_board(pdev, dm);</div><div class='del'>-	free_netdev(ndev);		/* free device structure */</div><div class='ctx'> 	if (dm-&gt;power_supply)</div><div class='ctx'> 		regulator_disable(dm-&gt;power_supply);</div><div class='ctx'> </div><div class='add'>+	free_netdev(ndev);		/* free device structure */</div><div class='add'>+</div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "released and freed device\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/21142.c b/drivers/net/ethernet/dec/tulip/21142.c<br/>index 369858272650..76767dec216d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/21142.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/21142.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/21142.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/21142.c</a></div><div class='hunk'>@@ -216,7 +216,7 @@ void t21142_lnk_change(struct net_device *dev, int csr5)</div><div class='ctx'> 		    (csr12 &amp; 2) == 2) ||</div><div class='ctx'> 		   (tp-&gt;nway &amp;&amp; (csr5 &amp; (TPLnkFail)))) {</div><div class='ctx'> 		/* Link blew? Maybe restart NWay. */</div><div class='del'>-		del_timer_sync(&amp;tp-&gt;timer);</div><div class='add'>+		timer_delete_sync(&amp;tp-&gt;timer);</div><div class='ctx'> 		t21142_start_nway(dev);</div><div class='ctx'> 		tp-&gt;timer.expires = RUN_AT(3*HZ);</div><div class='ctx'> 		add_timer(&amp;tp-&gt;timer);</div><div class='hunk'>@@ -226,7 +226,7 @@ void t21142_lnk_change(struct net_device *dev, int csr5)</div><div class='ctx'> 				 medianame[dev-&gt;if_port],</div><div class='ctx'> 				 (csr12 &amp; 2) ? "failed" : "good");</div><div class='ctx'> 		if ((csr12 &amp; 2)  &amp;&amp;  ! tp-&gt;medialock) {</div><div class='del'>-			del_timer_sync(&amp;tp-&gt;timer);</div><div class='add'>+			timer_delete_sync(&amp;tp-&gt;timer);</div><div class='ctx'> 			t21142_start_nway(dev);</div><div class='ctx'> 			tp-&gt;timer.expires = RUN_AT(3*HZ);</div><div class='ctx'> 			add_timer(&amp;tp-&gt;timer);</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/de2104x.c b/drivers/net/ethernet/dec/tulip/de2104x.c<br/>index 0a161a4db242..f9504f340c4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/de2104x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/de2104x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/de2104x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/de2104x.c</a></div><div class='hunk'>@@ -963,7 +963,7 @@ static void de_next_media (struct de_private *de, const u32 *media,</div><div class='ctx'> </div><div class='ctx'> static void de21040_media_timer (struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct de_private *de = from_timer(de, t, media_timer);</div><div class='add'>+	struct de_private *de = timer_container_of(de, t, media_timer);</div><div class='ctx'> 	struct net_device *dev = de-&gt;dev;</div><div class='ctx'> 	u32 status = dr32(SIAStatus);</div><div class='ctx'> 	unsigned int carrier;</div><div class='hunk'>@@ -1044,7 +1044,7 @@ static unsigned int de_ok_to_advertise (struct de_private *de, u32 new_media)</div><div class='ctx'> </div><div class='ctx'> static void de21041_media_timer (struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct de_private *de = from_timer(de, t, media_timer);</div><div class='add'>+	struct de_private *de = timer_container_of(de, t, media_timer);</div><div class='ctx'> 	struct net_device *dev = de-&gt;dev;</div><div class='ctx'> 	u32 status = dr32(SIAStatus);</div><div class='ctx'> 	unsigned int carrier;</div><div class='hunk'>@@ -1428,7 +1428,7 @@ static int de_close (struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(de, ifdown, dev, "disabling interface\n");</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;de-&gt;media_timer);</div><div class='add'>+	timer_delete_sync(&amp;de-&gt;media_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;de-&gt;lock, flags);</div><div class='ctx'> 	de_stop_hw(de);</div><div class='hunk'>@@ -1452,7 +1452,7 @@ static void de_tx_timeout (struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> 		   dr32(MacStatus), dr32(MacMode), dr32(SIAStatus),</div><div class='ctx'> 		   de-&gt;rx_tail, de-&gt;tx_head, de-&gt;tx_tail);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;de-&gt;media_timer);</div><div class='add'>+	timer_delete_sync(&amp;de-&gt;media_timer);</div><div class='ctx'> </div><div class='ctx'> 	disable_irq(irq);</div><div class='ctx'> 	spin_lock_irq(&amp;de-&gt;lock);</div><div class='hunk'>@@ -2126,7 +2126,7 @@ static int __maybe_unused de_suspend(struct device *dev_d)</div><div class='ctx'> 	if (netif_running (dev)) {</div><div class='ctx'> 		const int irq = pdev-&gt;irq;</div><div class='ctx'> </div><div class='del'>-		del_timer_sync(&amp;de-&gt;media_timer);</div><div class='add'>+		timer_delete_sync(&amp;de-&gt;media_timer);</div><div class='ctx'> </div><div class='ctx'> 		disable_irq(irq);</div><div class='ctx'> 		spin_lock_irq(&amp;de-&gt;lock);</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/dmfe.c b/drivers/net/ethernet/dec/tulip/dmfe.c<br/>index 3188ba7b450f..2d3bd343b6e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/dmfe.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/dmfe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/dmfe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/dmfe.c</a></div><div class='hunk'>@@ -745,7 +745,7 @@ static int dmfe_stop(struct net_device *dev)</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* deleted timer */</div><div class='del'>-	del_timer_sync(&amp;db-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;db-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset &amp; stop DM910X board */</div><div class='ctx'> 	dw32(DCR0, DM910X_RESET);</div><div class='hunk'>@@ -1115,7 +1115,7 @@ static const struct ethtool_ops netdev_ethtool_ops = {</div><div class='ctx'> </div><div class='ctx'> static void dmfe_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct dmfe_board_info *db = from_timer(db, t, timer);</div><div class='add'>+	struct dmfe_board_info *db = timer_container_of(db, t, timer);</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(db-&gt;pdev);</div><div class='ctx'> 	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='ctx'> 	u32 tmp_cr8;</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/interrupt.c b/drivers/net/ethernet/dec/tulip/interrupt.c<br/>index 54560f9a1651..0a12cb9b3ba7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/interrupt.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/interrupt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/interrupt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/interrupt.c</a></div><div class='hunk'>@@ -104,7 +104,7 @@ int tulip_refill_rx(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> void oom_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tulip_private *tp = from_timer(tp, t, oom_timer);</div><div class='add'>+	struct tulip_private *tp = timer_container_of(tp, t, oom_timer);</div><div class='ctx'> </div><div class='ctx'> 	napi_schedule(&amp;tp-&gt;napi);</div><div class='ctx'> }</div><div class='hunk'>@@ -699,8 +699,8 @@ irqreturn_t tulip_interrupt(int irq, void *dev_instance)</div><div class='ctx'> 				tulip_start_rxtx(tp);</div><div class='ctx'> 			}</div><div class='ctx'> 			/*</div><div class='del'>-			 * NB: t21142_lnk_change() does a del_timer_sync(), so be careful if this</div><div class='del'>-			 * call is ever done under the spinlock</div><div class='add'>+			 * NB: t21142_lnk_change() does a timer_delete_sync(), so be careful</div><div class='add'>+			 * if this call is ever done under the spinlock</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (csr5 &amp; (TPLnkPass | TPLnkFail | 0x08000000)) {</div><div class='ctx'> 				if (tp-&gt;link_change)</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/pnic.c b/drivers/net/ethernet/dec/tulip/pnic.c<br/>index 653bde48ef44..1de5ed967070 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/pnic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/pnic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/pnic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/pnic.c</a></div><div class='hunk'>@@ -86,7 +86,7 @@ void pnic_lnk_change(struct net_device *dev, int csr5)</div><div class='ctx'> </div><div class='ctx'> void pnic_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tulip_private *tp = from_timer(tp, t, timer);</div><div class='add'>+	struct tulip_private *tp = timer_container_of(tp, t, timer);</div><div class='ctx'> 	struct net_device *dev = tp-&gt;dev;</div><div class='ctx'> 	void __iomem *ioaddr = tp-&gt;base_addr;</div><div class='ctx'> 	int next_tick = 60*HZ;</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/pnic2.c b/drivers/net/ethernet/dec/tulip/pnic2.c<br/>index 72a09156b48b..39c410bf224e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/pnic2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/pnic2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/pnic2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/pnic2.c</a></div><div class='hunk'>@@ -78,7 +78,7 @@</div><div class='ctx'> </div><div class='ctx'> void pnic2_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tulip_private *tp = from_timer(tp, t, timer);</div><div class='add'>+	struct tulip_private *tp = timer_container_of(tp, t, timer);</div><div class='ctx'> 	struct net_device *dev = tp-&gt;dev;</div><div class='ctx'> 	void __iomem *ioaddr = tp-&gt;base_addr;</div><div class='ctx'> 	int next_tick = 60*HZ;</div><div class='hunk'>@@ -323,7 +323,7 @@ void pnic2_lnk_change(struct net_device *dev, int csr5)</div><div class='ctx'> 		if (tulip_debug &gt; 2)</div><div class='ctx'> 			netdev_dbg(dev, "Ugh! Link blew?\n");</div><div class='ctx'> </div><div class='del'>-		del_timer_sync(&amp;tp-&gt;timer);</div><div class='add'>+		timer_delete_sync(&amp;tp-&gt;timer);</div><div class='ctx'> 		pnic2_start_nway(dev);</div><div class='ctx'> 		tp-&gt;timer.expires = RUN_AT(3*HZ);</div><div class='ctx'> 		add_timer(&amp;tp-&gt;timer);</div><div class='hunk'>@@ -348,7 +348,7 @@ void pnic2_lnk_change(struct net_device *dev, int csr5)</div><div class='ctx'> </div><div class='ctx'>                 /* if failed then try doing an nway to get in sync */</div><div class='ctx'> 		if ((csr12 &amp; 2)  &amp;&amp;  ! tp-&gt;medialock) {</div><div class='del'>-			del_timer_sync(&amp;tp-&gt;timer);</div><div class='add'>+			timer_delete_sync(&amp;tp-&gt;timer);</div><div class='ctx'> 			pnic2_start_nway(dev);</div><div class='ctx'> 			tp-&gt;timer.expires = RUN_AT(3*HZ);</div><div class='ctx'> 			add_timer(&amp;tp-&gt;timer);</div><div class='hunk'>@@ -372,7 +372,7 @@ void pnic2_lnk_change(struct net_device *dev, int csr5)</div><div class='ctx'> </div><div class='ctx'>                 /* if failed, try doing an nway to get in sync */</div><div class='ctx'> 		if ((csr12 &amp; 4)  &amp;&amp;  ! tp-&gt;medialock) {</div><div class='del'>-			del_timer_sync(&amp;tp-&gt;timer);</div><div class='add'>+			timer_delete_sync(&amp;tp-&gt;timer);</div><div class='ctx'> 			pnic2_start_nway(dev);</div><div class='ctx'> 			tp-&gt;timer.expires = RUN_AT(3*HZ);</div><div class='ctx'> 			add_timer(&amp;tp-&gt;timer);</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/timer.c b/drivers/net/ethernet/dec/tulip/timer.c<br/>index 642e9dfc5451..ca0c509b601c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/timer.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/timer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/timer.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/timer.c</a></div><div class='hunk'>@@ -139,7 +139,7 @@ void tulip_media_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> void mxic_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tulip_private *tp = from_timer(tp, t, timer);</div><div class='add'>+	struct tulip_private *tp = timer_container_of(tp, t, timer);</div><div class='ctx'> 	struct net_device *dev = tp-&gt;dev;</div><div class='ctx'> 	void __iomem *ioaddr = tp-&gt;base_addr;</div><div class='ctx'> 	int next_tick = 60*HZ;</div><div class='hunk'>@@ -156,7 +156,7 @@ void mxic_timer(struct timer_list *t)</div><div class='ctx'> </div><div class='ctx'> void comet_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tulip_private *tp = from_timer(tp, t, timer);</div><div class='add'>+	struct tulip_private *tp = timer_container_of(tp, t, timer);</div><div class='ctx'> 	struct net_device *dev = tp-&gt;dev;</div><div class='ctx'> 	int next_tick = 2*HZ;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/tulip_core.c b/drivers/net/ethernet/dec/tulip/tulip_core.c<br/>index 27e01d780cd0..b608585f1954 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/tulip_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/tulip_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/tulip_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/tulip_core.c</a></div><div class='hunk'>@@ -114,7 +114,7 @@ int tulip_debug = 1;</div><div class='ctx'> </div><div class='ctx'> static void tulip_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tulip_private *tp = from_timer(tp, t, timer);</div><div class='add'>+	struct tulip_private *tp = timer_container_of(tp, t, timer);</div><div class='ctx'> 	struct net_device *dev = tp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev))</div><div class='hunk'>@@ -747,9 +747,9 @@ static void tulip_down (struct net_device *dev)</div><div class='ctx'> 	napi_disable(&amp;tp-&gt;napi);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	del_timer_sync (&amp;tp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;tp-&gt;timer);</div><div class='ctx'> #ifdef CONFIG_TULIP_NAPI</div><div class='del'>-	del_timer_sync (&amp;tp-&gt;oom_timer);</div><div class='add'>+	timer_delete_sync(&amp;tp-&gt;oom_timer);</div><div class='ctx'> #endif</div><div class='ctx'> 	spin_lock_irqsave (&amp;tp-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1177,7 +1177,6 @@ static void set_rx_mode(struct net_device *dev)</div><div class='ctx'> 	iowrite32(csr6, ioaddr + CSR6);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TULIP_MWI</div><div class='ctx'> static void tulip_mwi_config(struct pci_dev *pdev, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tulip_private *tp = netdev_priv(dev);</div><div class='hunk'>@@ -1251,7 +1250,6 @@ out:</div><div class='ctx'> 		netdev_dbg(dev, "MWI config cacheline=%d, csr0=%08x\n",</div><div class='ctx'> 			   cache, csr0);</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  *	Chips that have the MRM/reserved bit quirk and the burst quirk. That</div><div class='hunk'>@@ -1413,7 +1411,7 @@ static int tulip_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	/* grab all resources from both PIO and MMIO regions, as we</div><div class='ctx'> 	 * don't want anyone else messing around with our hardware */</div><div class='del'>-	if (pci_request_regions(pdev, DRV_NAME))</div><div class='add'>+	if (pcim_request_all_regions(pdev, DRV_NAME))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	ioaddr = pcim_iomap(pdev, TULIP_BAR, tulip_tbl[chip_idx].io_size);</div><div class='hunk'>@@ -1463,10 +1461,9 @@ static int tulip_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;tp-&gt;media_work, tulip_tbl[tp-&gt;chip_id].media_task);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TULIP_MWI</div><div class='del'>-	if (!force_csr0 &amp;&amp; (tp-&gt;flags &amp; HAS_PCI_MWI))</div><div class='add'>+	if (IS_ENABLED(CONFIG_TULIP_MWI) &amp;&amp; !force_csr0 &amp;&amp;</div><div class='add'>+	    (tp-&gt;flags &amp; HAS_PCI_MWI))</div><div class='ctx'> 		tulip_mwi_config (pdev, dev);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the chip's Tx and Rx processes. */</div><div class='ctx'> 	tulip_stop_rxtx(tp);</div><div class='hunk'>@@ -1553,7 +1550,7 @@ static int tulip_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'>                     (PCI_SLOT(pdev-&gt;devfn) == 12))) {</div><div class='ctx'>                        /* Cobalt MAC address in first EEPROM locations. */</div><div class='ctx'>                        sa_offset = 0;</div><div class='del'>-		       /* Ensure our media table fixup get's applied */</div><div class='add'>+		       /* Ensure our media table fixup gets applied */</div><div class='ctx'> 		       memcpy(ee_data + 16, ee_data, 8);</div><div class='ctx'>                }</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/uli526x.c b/drivers/net/ethernet/dec/tulip/uli526x.c<br/>index ff080ab0f116..6e4d8d31aba9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/uli526x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/uli526x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/uli526x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/uli526x.c</a></div><div class='hunk'>@@ -656,7 +656,7 @@ static int uli526x_stop(struct net_device *dev)</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* deleted timer */</div><div class='del'>-	del_timer_sync(&amp;db-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;db-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset &amp; stop ULI526X board */</div><div class='ctx'> 	uw32(DCR0, ULI526X_RESET);</div><div class='hunk'>@@ -1014,7 +1014,7 @@ static const struct ethtool_ops netdev_ethtool_ops = {</div><div class='ctx'> </div><div class='ctx'> static void uli526x_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct uli526x_board_info *db = from_timer(db, t, timer);</div><div class='add'>+	struct uli526x_board_info *db = timer_container_of(db, t, timer);</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(db-&gt;pdev);</div><div class='ctx'> 	struct uli_phy_ops *phy = &amp;db-&gt;phy;</div><div class='ctx'> 	void __iomem *ioaddr = db-&gt;ioaddr;</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/winbond-840.c b/drivers/net/ethernet/dec/tulip/winbond-840.c<br/>index 37fba39c0056..a24a25a5f73d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/winbond-840.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/winbond-840.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/winbond-840.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/winbond-840.c</a></div><div class='hunk'>@@ -375,7 +375,7 @@ static int w840_probe1(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	if (pci_request_regions(pdev, DRV_NAME))</div><div class='add'>+	if (pcim_request_all_regions(pdev, DRV_NAME))</div><div class='ctx'> 		goto err_out_netdev;</div><div class='ctx'> </div><div class='ctx'> 	ioaddr = pci_iomap(pdev, TULIP_BAR, netdev_res_size);</div><div class='hunk'>@@ -763,7 +763,7 @@ static inline void update_csr6(struct net_device *dev, int new)</div><div class='ctx'> </div><div class='ctx'> static void netdev_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_private *np = from_timer(np, t, timer);</div><div class='add'>+	struct netdev_private *np = timer_container_of(np, t, timer);</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(np-&gt;pci_dev);</div><div class='ctx'> 	void __iomem *ioaddr = np-&gt;base_addr;</div><div class='ctx'> </div><div class='hunk'>@@ -1509,7 +1509,7 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* __i386__ debugging only */</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;np-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	free_rxtx_rings(np);</div><div class='ctx'> 	free_ringdesc(np);</div><div class='hunk'>@@ -1560,7 +1560,7 @@ static int __maybe_unused w840_suspend(struct device *dev_d)</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	if (netif_running (dev)) {</div><div class='del'>-		del_timer_sync(&amp;np-&gt;timer);</div><div class='add'>+		timer_delete_sync(&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 		netif_device_detach(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/dec/tulip/xircom_cb.c b/drivers/net/ethernet/dec/tulip/xircom_cb.c<br/>index 8759f9f76b62..e5d2ede13845 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/xircom_cb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dec/tulip/xircom_cb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dec/tulip/xircom_cb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dec/tulip/xircom_cb.c</a></div><div class='hunk'>@@ -143,7 +143,7 @@ static const struct pci_device_id xircom_pci_table[] = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, xircom_pci_table);</div><div class='ctx'> </div><div class='del'>-static struct pci_driver xircom_ops = {</div><div class='add'>+static struct pci_driver xircom_driver = {</div><div class='ctx'> 	.name		= "xircom_cb",</div><div class='ctx'> 	.id_table	= xircom_pci_table,</div><div class='ctx'> 	.probe		= xircom_probe,</div><div class='hunk'>@@ -1169,4 +1169,4 @@ investigate_write_descriptor(struct net_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-module_pci_driver(xircom_ops);</div><div class='add'>+module_pci_driver(xircom_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/dlink/Kconfig b/drivers/net/ethernet/dlink/Kconfig<br/>index e9e13654812c..0d77f84c8e7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dlink/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dlink/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dlink/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dlink/Kconfig</a></div><div class='hunk'>@@ -32,4 +32,24 @@ config DL2K</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called dl2k.</div><div class='ctx'> </div><div class='add'>+config SUNDANCE</div><div class='add'>+	tristate "Sundance Alta support"</div><div class='add'>+	depends on PCI</div><div class='add'>+	select CRC32</div><div class='add'>+	select MII</div><div class='add'>+	help</div><div class='add'>+	  This driver is for the Sundance "Alta" chip.</div><div class='add'>+	  More specific information and updates are available from</div><div class='add'>+	  &lt;http://www.scyld.com/network/sundance.html&gt;.</div><div class='add'>+</div><div class='add'>+config SUNDANCE_MMIO</div><div class='add'>+	bool "Use MMIO instead of PIO"</div><div class='add'>+	depends on SUNDANCE</div><div class='add'>+	help</div><div class='add'>+	  Enable memory-mapped I/O for interaction with Sundance NIC registers.</div><div class='add'>+	  Do NOT enable this by default, PIO (enabled when MMIO is disabled)</div><div class='add'>+	  is known to solve bugs on certain chips.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='ctx'> endif # NET_VENDOR_DLINK</div><div class='head'>diff --git a/drivers/net/ethernet/dlink/Makefile b/drivers/net/ethernet/dlink/Makefile<br/>index 38c236eb6007..3ff503c747db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dlink/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dlink/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dlink/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dlink/Makefile</a></div><div class='hunk'>@@ -4,3 +4,4 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_DL2K) += dl2k.o</div><div class='add'>+obj-$(CONFIG_SUNDANCE) += sundance.o</div><div class='head'>diff --git a/drivers/net/ethernet/dlink/dl2k.c b/drivers/net/ethernet/dlink/dl2k.c<br/>index d0ea92607870..846d58c769ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dlink/dl2k.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dlink/dl2k.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dlink/dl2k.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dlink/dl2k.c</a></div><div class='hunk'>@@ -41,7 +41,7 @@ module_param(tx_flow, int, 0);</div><div class='ctx'> module_param(rx_flow, int, 0);</div><div class='ctx'> module_param(copy_thresh, int, 0);</div><div class='ctx'> module_param(rx_coalesce, int, 0);	/* Rx frame count each interrupt */</div><div class='del'>-module_param(rx_timeout, int, 0);	/* Rx DMA wait time in 64ns increments */</div><div class='add'>+module_param(rx_timeout, int, 0);  /* Rx DMA wait time in 640ns increments */</div><div class='ctx'> module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -99,6 +99,13 @@ static const struct net_device_ops netdev_ops = {</div><div class='ctx'> 	.ndo_tx_timeout		= rio_tx_timeout,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static bool is_support_rmon_mmio(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	return pdev-&gt;vendor == PCI_VENDOR_ID_DLINK &amp;&amp;</div><div class='add'>+	       pdev-&gt;device == 0x4000 &amp;&amp;</div><div class='add'>+	       pdev-&gt;revision == 0x0c;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='hunk'>@@ -131,21 +138,27 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	np = netdev_priv(dev);</div><div class='ctx'> </div><div class='add'>+	if (is_support_rmon_mmio(pdev))</div><div class='add'>+		np-&gt;rmon_enable = true;</div><div class='add'>+</div><div class='ctx'> 	/* IO registers range. */</div><div class='ctx'> 	ioaddr = pci_iomap(pdev, 0, 0);</div><div class='ctx'> 	if (!ioaddr)</div><div class='ctx'> 		goto err_out_dev;</div><div class='ctx'> 	np-&gt;eeprom_addr = ioaddr;</div><div class='ctx'> </div><div class='del'>-#ifdef MEM_MAPPING</div><div class='del'>-	/* MM registers range. */</div><div class='del'>-	ioaddr = pci_iomap(pdev, 1, 0);</div><div class='del'>-	if (!ioaddr)</div><div class='del'>-		goto err_out_iounmap;</div><div class='del'>-#endif</div><div class='add'>+	if (np-&gt;rmon_enable) {</div><div class='add'>+		/* MM registers range. */</div><div class='add'>+		ioaddr = pci_iomap(pdev, 1, 0);</div><div class='add'>+		if (!ioaddr)</div><div class='add'>+			goto err_out_iounmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	np-&gt;ioaddr = ioaddr;</div><div class='ctx'> 	np-&gt;chip_id = chip_idx;</div><div class='ctx'> 	np-&gt;pdev = pdev;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;np-&gt;stats_lock);</div><div class='ctx'> 	spin_lock_init (&amp;np-&gt;tx_lock);</div><div class='ctx'> 	spin_lock_init (&amp;np-&gt;rx_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -249,7 +262,7 @@ rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	np-&gt;link_status = 0;</div><div class='ctx'> 	/* Set media and reset PHY */</div><div class='ctx'> 	if (np-&gt;phy_media) {</div><div class='del'>-		/* default Auto-Negotiation for fiber deivices */</div><div class='add'>+		/* default Auto-Negotiation for fiber devices */</div><div class='ctx'> 	 	if (np-&gt;an_enable == 2) {</div><div class='ctx'> 			np-&gt;an_enable = 1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -287,9 +300,8 @@ err_out_unmap_tx:</div><div class='ctx'> 	dma_free_coherent(&amp;pdev-&gt;dev, TX_TOTAL_SIZE, np-&gt;tx_ring,</div><div class='ctx'> 			  np-&gt;tx_ring_dma);</div><div class='ctx'> err_out_iounmap:</div><div class='del'>-#ifdef MEM_MAPPING</div><div class='del'>-	pci_iounmap(pdev, np-&gt;ioaddr);</div><div class='del'>-#endif</div><div class='add'>+	if (np-&gt;rmon_enable)</div><div class='add'>+		pci_iounmap(pdev, np-&gt;ioaddr);</div><div class='ctx'> 	pci_iounmap(pdev, np-&gt;eeprom_addr);</div><div class='ctx'> err_out_dev:</div><div class='ctx'> 	free_netdev (dev);</div><div class='hunk'>@@ -352,7 +364,7 @@ parse_eeprom (struct net_device *dev)</div><div class='ctx'> 	eth_hw_addr_set(dev, psrom-&gt;mac_addr);</div><div class='ctx'> </div><div class='ctx'> 	if (np-&gt;chip_id == CHIP_IP1000A) {</div><div class='del'>-		np-&gt;led_mode = psrom-&gt;led_mode;</div><div class='add'>+		np-&gt;led_mode = le16_to_cpu(psrom-&gt;led_mode);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -496,25 +508,34 @@ static int alloc_list(struct net_device *dev)</div><div class='ctx'> 	for (i = 0; i &lt; RX_RING_SIZE; i++) {</div><div class='ctx'> 		/* Allocated fixed size of skbuff */</div><div class='ctx'> 		struct sk_buff *skb;</div><div class='add'>+		dma_addr_t addr;</div><div class='ctx'> </div><div class='ctx'> 		skb = netdev_alloc_skb_ip_align(dev, np-&gt;rx_buf_sz);</div><div class='ctx'> 		np-&gt;rx_skbuff[i] = skb;</div><div class='del'>-		if (!skb) {</div><div class='del'>-			free_list(dev);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='add'>+		if (!skb)</div><div class='add'>+			goto err_free_list;</div><div class='add'>+</div><div class='add'>+		addr = dma_map_single(&amp;np-&gt;pdev-&gt;dev, skb-&gt;data,</div><div class='add'>+				      np-&gt;rx_buf_sz, DMA_FROM_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;np-&gt;pdev-&gt;dev, addr))</div><div class='add'>+			goto err_kfree_skb;</div><div class='ctx'> </div><div class='ctx'> 		np-&gt;rx_ring[i].next_desc = cpu_to_le64(np-&gt;rx_ring_dma +</div><div class='ctx'> 						((i + 1) % RX_RING_SIZE) *</div><div class='ctx'> 						sizeof(struct netdev_desc));</div><div class='ctx'> 		/* Rubicon now supports 40 bits of addressing space. */</div><div class='del'>-		np-&gt;rx_ring[i].fraginfo =</div><div class='del'>-		    cpu_to_le64(dma_map_single(&amp;np-&gt;pdev-&gt;dev, skb-&gt;data,</div><div class='del'>-					       np-&gt;rx_buf_sz, DMA_FROM_DEVICE));</div><div class='add'>+		np-&gt;rx_ring[i].fraginfo = cpu_to_le64(addr);</div><div class='ctx'> 		np-&gt;rx_ring[i].fraginfo |= cpu_to_le64((u64)np-&gt;rx_buf_sz &lt;&lt; 48);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_kfree_skb:</div><div class='add'>+	dev_kfree_skb(np-&gt;rx_skbuff[i]);</div><div class='add'>+	np-&gt;rx_skbuff[i] = NULL;</div><div class='add'>+err_free_list:</div><div class='add'>+	free_list(dev);</div><div class='add'>+	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rio_hw_init(struct net_device *dev)</div><div class='hunk'>@@ -576,7 +597,8 @@ static void rio_hw_init(struct net_device *dev)</div><div class='ctx'> 	dw8(TxDMAPollPeriod, 0xff);</div><div class='ctx'> 	dw8(RxDMABurstThresh, 0x30);</div><div class='ctx'> 	dw8(RxDMAUrgentThresh, 0x30);</div><div class='del'>-	dw32(RmonStatMask, 0x0007ffff);</div><div class='add'>+	if (!np-&gt;rmon_enable)</div><div class='add'>+		dw32(RmonStatMask, 0x0007ffff);</div><div class='ctx'> 	/* clear statistics */</div><div class='ctx'> 	clear_stats (dev);</div><div class='ctx'> </div><div class='hunk'>@@ -648,7 +670,7 @@ static int rio_open(struct net_device *dev)</div><div class='ctx'> static void</div><div class='ctx'> rio_timer (struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_private *np = from_timer(np, t, timer);</div><div class='add'>+	struct netdev_private *np = timer_container_of(np, t, timer);</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(np-&gt;pdev);</div><div class='ctx'> 	unsigned int entry;</div><div class='ctx'> 	int next_tick = 1*HZ;</div><div class='hunk'>@@ -711,7 +733,7 @@ start_xmit (struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	u64 tfc_vlan_tag = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (np-&gt;link_status == 0) {	/* Link Down */</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> 	}</div><div class='ctx'> 	entry = np-&gt;cur_tx % TX_RING_SIZE;</div><div class='hunk'>@@ -865,8 +887,7 @@ tx_error (struct net_device *dev, int tx_status)</div><div class='ctx'> 	frame_id = (tx_status &amp; 0xffff0000);</div><div class='ctx'> 	printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",</div><div class='ctx'> 		dev-&gt;name, tx_status, frame_id);</div><div class='del'>-	dev-&gt;stats.tx_errors++;</div><div class='del'>-	/* Ttransmit Underrun */</div><div class='add'>+	/* Transmit Underrun */</div><div class='ctx'> 	if (tx_status &amp; 0x10) {</div><div class='ctx'> 		dev-&gt;stats.tx_fifo_errors++;</div><div class='ctx'> 		dw16(TxStartThresh, dr16(TxStartThresh) + 0x10);</div><div class='hunk'>@@ -902,9 +923,15 @@ tx_error (struct net_device *dev, int tx_status)</div><div class='ctx'> 		rio_set_led_mode(dev);</div><div class='ctx'> 		/* Let TxStartThresh stay default value */</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;np-&gt;stats_lock);</div><div class='ctx'> 	/* Maximum Collisions */</div><div class='ctx'> 	if (tx_status &amp; 0x08)</div><div class='ctx'> 		dev-&gt;stats.collisions++;</div><div class='add'>+</div><div class='add'>+	dev-&gt;stats.tx_errors++;</div><div class='add'>+	spin_unlock(&amp;np-&gt;stats_lock);</div><div class='add'>+</div><div class='ctx'> 	/* Restart the Tx */</div><div class='ctx'> 	dw32(MACCtrl, dr16(MACCtrl) | TxEnable);</div><div class='ctx'> }</div><div class='hunk'>@@ -946,15 +973,18 @@ receive_packet (struct net_device *dev)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			struct sk_buff *skb;</div><div class='ctx'> </div><div class='add'>+			skb = NULL;</div><div class='ctx'> 			/* Small skbuffs for short packets */</div><div class='del'>-			if (pkt_len &gt; copy_thresh) {</div><div class='add'>+			if (pkt_len &lt;= copy_thresh)</div><div class='add'>+				skb = netdev_alloc_skb_ip_align(dev, pkt_len);</div><div class='add'>+			if (!skb) {</div><div class='ctx'> 				dma_unmap_single(&amp;np-&gt;pdev-&gt;dev,</div><div class='ctx'> 						 desc_to_dma(desc),</div><div class='ctx'> 						 np-&gt;rx_buf_sz,</div><div class='ctx'> 						 DMA_FROM_DEVICE);</div><div class='ctx'> 				skb_put (skb = np-&gt;rx_skbuff[entry], pkt_len);</div><div class='ctx'> 				np-&gt;rx_skbuff[entry] = NULL;</div><div class='del'>-			} else if ((skb = netdev_alloc_skb_ip_align(dev, pkt_len))) {</div><div class='add'>+			} else {</div><div class='ctx'> 				dma_sync_single_for_cpu(&amp;np-&gt;pdev-&gt;dev,</div><div class='ctx'> 							desc_to_dma(desc),</div><div class='ctx'> 							np-&gt;rx_buf_sz,</div><div class='hunk'>@@ -1053,7 +1083,7 @@ rio_error (struct net_device *dev, int int_status)</div><div class='ctx'> 		get_stats (dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* PCI Error, a catastronphic error related to the bus interface</div><div class='add'>+	/* PCI Error, a catastrophic error related to the bus interface</div><div class='ctx'> 	   occurs, set GlobalReset and HostReset to reset. */</div><div class='ctx'> 	if (int_status &amp; HostError) {</div><div class='ctx'> 		printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",</div><div class='hunk'>@@ -1069,11 +1099,10 @@ get_stats (struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='del'>-#ifdef MEM_MAPPING</div><div class='del'>-	int i;</div><div class='del'>-#endif</div><div class='ctx'> 	unsigned int stat_reg;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;np-&gt;stats_lock, flags);</div><div class='ctx'> 	/* All statistics registers need to be acknowledged,</div><div class='ctx'> 	   else statistic overflow could cause problems */</div><div class='ctx'> </div><div class='hunk'>@@ -1082,7 +1111,7 @@ get_stats (struct net_device *dev)</div><div class='ctx'> 	dev-&gt;stats.rx_bytes += dr32(OctetRcvOk);</div><div class='ctx'> 	dev-&gt;stats.tx_bytes += dr32(OctetXmtOk);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;stats.multicast = dr32(McstFramesRcvdOk);</div><div class='add'>+	dev-&gt;stats.multicast += dr32(McstFramesRcvdOk);</div><div class='ctx'> 	dev-&gt;stats.collisions += dr32(SingleColFrames)</div><div class='ctx'> 			     +  dr32(MultiColFrames);</div><div class='ctx'> </div><div class='hunk'>@@ -1114,15 +1143,18 @@ get_stats (struct net_device *dev)</div><div class='ctx'> 	dr16(MacControlFramesXmtd);</div><div class='ctx'> 	dr16(FramesWEXDeferal);</div><div class='ctx'> </div><div class='del'>-#ifdef MEM_MAPPING</div><div class='del'>-	for (i = 0x100; i &lt;= 0x150; i += 4)</div><div class='del'>-		dr32(i);</div><div class='del'>-#endif</div><div class='add'>+	if (np-&gt;rmon_enable)</div><div class='add'>+		for (int i = 0x100; i &lt;= 0x150; i += 4)</div><div class='add'>+			dr32(i);</div><div class='add'>+</div><div class='ctx'> 	dr16(TxJumboFrames);</div><div class='ctx'> 	dr16(RxJumboFrames);</div><div class='ctx'> 	dr16(TCPCheckSumErrors);</div><div class='ctx'> 	dr16(UDPCheckSumErrors);</div><div class='ctx'> 	dr16(IPCheckSumErrors);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;np-&gt;stats_lock, flags);</div><div class='add'>+</div><div class='ctx'> 	return &amp;dev-&gt;stats;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1131,9 +1163,6 @@ clear_stats (struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = np-&gt;ioaddr;</div><div class='del'>-#ifdef MEM_MAPPING</div><div class='del'>-	int i;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	/* All statistics registers need to be acknowledged,</div><div class='ctx'> 	   else statistic overflow could cause problems */</div><div class='hunk'>@@ -1169,10 +1198,9 @@ clear_stats (struct net_device *dev)</div><div class='ctx'> 	dr16(BcstFramesXmtdOk);</div><div class='ctx'> 	dr16(MacControlFramesXmtd);</div><div class='ctx'> 	dr16(FramesWEXDeferal);</div><div class='del'>-#ifdef MEM_MAPPING</div><div class='del'>-	for (i = 0x100; i &lt;= 0x150; i += 4)</div><div class='del'>-		dr32(i);</div><div class='del'>-#endif</div><div class='add'>+	if (np-&gt;rmon_enable)</div><div class='add'>+		for (int i = 0x100; i &lt;= 0x150; i += 4)</div><div class='add'>+			dr32(i);</div><div class='ctx'> 	dr16(TxJumboFrames);</div><div class='ctx'> 	dr16(RxJumboFrames);</div><div class='ctx'> 	dr16(TCPCheckSumErrors);</div><div class='hunk'>@@ -1778,7 +1806,7 @@ rio_close (struct net_device *dev)</div><div class='ctx'> 	rio_hw_stop(dev);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(pdev-&gt;irq, dev);</div><div class='del'>-	del_timer_sync (&amp;np-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	free_list(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1798,9 +1826,8 @@ rio_remove1 (struct pci_dev *pdev)</div><div class='ctx'> 				  np-&gt;rx_ring_dma);</div><div class='ctx'> 		dma_free_coherent(&amp;pdev-&gt;dev, TX_TOTAL_SIZE, np-&gt;tx_ring,</div><div class='ctx'> 				  np-&gt;tx_ring_dma);</div><div class='del'>-#ifdef MEM_MAPPING</div><div class='del'>-		pci_iounmap(pdev, np-&gt;ioaddr);</div><div class='del'>-#endif</div><div class='add'>+		if (np-&gt;rmon_enable)</div><div class='add'>+			pci_iounmap(pdev, np-&gt;ioaddr);</div><div class='ctx'> 		pci_iounmap(pdev, np-&gt;eeprom_addr);</div><div class='ctx'> 		free_netdev (dev);</div><div class='ctx'> 		pci_release_regions (pdev);</div><div class='hunk'>@@ -1818,7 +1845,7 @@ static int rio_suspend(struct device *device)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(dev);</div><div class='del'>-	del_timer_sync(&amp;np-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;timer);</div><div class='ctx'> 	rio_hw_stop(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/dlink/dl2k.h b/drivers/net/ethernet/dlink/dl2k.h<br/>index 195dc6cfd895..9ebf7a6db93e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dlink/dl2k.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/dlink/dl2k.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dlink/dl2k.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dlink/dl2k.h</a></div><div class='hunk'>@@ -270,7 +270,7 @@ enum _pcs_reg {</div><div class='ctx'> 	PCS_ESR = 15,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* IEEE Extened Status Register */</div><div class='add'>+/* IEEE Extended Status Register */</div><div class='ctx'> enum _mii_esr {</div><div class='ctx'> 	MII_ESR_1000BX_FD = 0x8000,</div><div class='ctx'> 	MII_ESR_1000BX_HD = 0x4000,</div><div class='hunk'>@@ -329,18 +329,18 @@ enum _pcs_anlpar {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> typedef struct t_SROM {</div><div class='del'>-	u16 config_param;	/* 0x00 */</div><div class='del'>-	u16 asic_ctrl;		/* 0x02 */</div><div class='del'>-	u16 sub_vendor_id;	/* 0x04 */</div><div class='del'>-	u16 sub_system_id;	/* 0x06 */</div><div class='del'>-	u16 pci_base_1;		/* 0x08 (IP1000A only) */</div><div class='del'>-	u16 pci_base_2;		/* 0x0a (IP1000A only) */</div><div class='del'>-	u16 led_mode;		/* 0x0c (IP1000A only) */</div><div class='del'>-	u16 reserved1[9];	/* 0x0e-0x1f */</div><div class='add'>+	__le16 config_param;	/* 0x00 */</div><div class='add'>+	__le16 asic_ctrl;	/* 0x02 */</div><div class='add'>+	__le16 sub_vendor_id;	/* 0x04 */</div><div class='add'>+	__le16 sub_system_id;	/* 0x06 */</div><div class='add'>+	__le16 pci_base_1;	/* 0x08 (IP1000A only) */</div><div class='add'>+	__le16 pci_base_2;	/* 0x0a (IP1000A only) */</div><div class='add'>+	__le16 led_mode;	/* 0x0c (IP1000A only) */</div><div class='add'>+	__le16 reserved1[9];	/* 0x0e-0x1f */</div><div class='ctx'> 	u8 mac_addr[6];		/* 0x20-0x25 */</div><div class='ctx'> 	u8 reserved2[10];	/* 0x26-0x2f */</div><div class='ctx'> 	u8 sib[204];		/* 0x30-0xfb */</div><div class='del'>-	u32 crc;		/* 0xfc-0xff */</div><div class='add'>+	__le32 crc;		/* 0xfc-0xff */</div><div class='ctx'> } SROM_t, *PSROM_t;</div><div class='ctx'> </div><div class='ctx'> /* Ioctl custom data */</div><div class='hunk'>@@ -372,6 +372,8 @@ struct netdev_private {</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	void __iomem *ioaddr;</div><div class='ctx'> 	void __iomem *eeprom_addr;</div><div class='add'>+	// To ensure synchronization when stats are updated.</div><div class='add'>+	spinlock_t stats_lock;</div><div class='ctx'> 	spinlock_t tx_lock;</div><div class='ctx'> 	spinlock_t rx_lock;</div><div class='ctx'> 	unsigned int rx_buf_sz;		/* Based on MTU+slack. */</div><div class='hunk'>@@ -401,6 +403,8 @@ struct netdev_private {</div><div class='ctx'> 	u16 negotiate;		/* Negotiated media */</div><div class='ctx'> 	int phy_addr;		/* PHY addresses. */</div><div class='ctx'> 	u16 led_mode;		/* LED mode read from EEPROM (IP1000A only) */</div><div class='add'>+</div><div class='add'>+	bool rmon_enable;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* The station address location in the EEPROM. */</div><div class='head'>diff --git a/drivers/net/ethernet/dlink/sundance.c b/drivers/net/ethernet/dlink/sundance.c<br/>new file mode 100644<br/>index 000000000000..277c50ef773f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/dlink/sundance.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/dlink/sundance.c</a></div><div class='hunk'>@@ -0,0 +1,1990 @@</div><div class='add'>+/* sundance.c: A Linux device driver for the Sundance ST201 "Alta". */</div><div class='add'>+/*</div><div class='add'>+	Written 1999-2000 by Donald Becker.</div><div class='add'>+</div><div class='add'>+	This software may be used and distributed according to the terms of</div><div class='add'>+	the GNU General Public License (GPL), incorporated herein by reference.</div><div class='add'>+	Drivers based on or derived from this code fall under the GPL and must</div><div class='add'>+	retain the authorship, copyright and license notice.  This file is not</div><div class='add'>+	a complete program and may only be used when the entire operating</div><div class='add'>+	system is licensed under the GPL.</div><div class='add'>+</div><div class='add'>+	The author may be reached as becker@scyld.com, or C/O</div><div class='add'>+	Scyld Computing Corporation</div><div class='add'>+	410 Severn Ave., Suite 210</div><div class='add'>+	Annapolis MD 21403</div><div class='add'>+</div><div class='add'>+	Support and updates available at</div><div class='add'>+	http://www.scyld.com/network/sundance.html</div><div class='add'>+	[link no longer provides useful info -jgarzik]</div><div class='add'>+	Archives of the mailing list are still available at</div><div class='add'>+	https://www.beowulf.org/pipermail/netdrivers/</div><div class='add'>+</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+#define DRV_NAME	"sundance"</div><div class='add'>+</div><div class='add'>+/* The user-configurable values.</div><div class='add'>+   These may be modified when a driver module is loaded.*/</div><div class='add'>+static int debug = 1;			/* 1 normal messages, 0 quiet .. 7 verbose. */</div><div class='add'>+/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).</div><div class='add'>+   Typical is a 64 element hash table based on the Ethernet CRC.  */</div><div class='add'>+static const int multicast_filter_limit = 32;</div><div class='add'>+</div><div class='add'>+/* Set the copy breakpoint for the copy-only-tiny-frames scheme.</div><div class='add'>+   Setting to &gt; 1518 effectively disables this feature.</div><div class='add'>+   This chip can receive into offset buffers, so the Alpha does not</div><div class='add'>+   need a copy-align. */</div><div class='add'>+static int rx_copybreak;</div><div class='add'>+static int flowctrl=1;</div><div class='add'>+</div><div class='add'>+/* media[] specifies the media type the NIC operates at.</div><div class='add'>+		 autosense	Autosensing active media.</div><div class='add'>+		 10mbps_hd 	10Mbps half duplex.</div><div class='add'>+		 10mbps_fd 	10Mbps full duplex.</div><div class='add'>+		 100mbps_hd 	100Mbps half duplex.</div><div class='add'>+		 100mbps_fd 	100Mbps full duplex.</div><div class='add'>+		 0		Autosensing active media.</div><div class='add'>+		 1	 	10Mbps half duplex.</div><div class='add'>+		 2	 	10Mbps full duplex.</div><div class='add'>+		 3	 	100Mbps half duplex.</div><div class='add'>+		 4	 	100Mbps full duplex.</div><div class='add'>+*/</div><div class='add'>+#define MAX_UNITS 8</div><div class='add'>+static char *media[MAX_UNITS];</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Operational parameters that are set at compile time. */</div><div class='add'>+</div><div class='add'>+/* Keep the ring sizes a power of two for compile efficiency.</div><div class='add'>+   The compiler will convert &lt;unsigned&gt;'%'&lt;2^N&gt; into a bit mask.</div><div class='add'>+   Making the Tx ring too large decreases the effectiveness of channel</div><div class='add'>+   bonding and packet priority, and more than 128 requires modifying the</div><div class='add'>+   Tx error recovery.</div><div class='add'>+   Large receive rings merely waste memory. */</div><div class='add'>+#define TX_RING_SIZE	32</div><div class='add'>+#define TX_QUEUE_LEN	(TX_RING_SIZE - 1) /* Limit ring entries actually used.  */</div><div class='add'>+#define RX_RING_SIZE	64</div><div class='add'>+#define RX_BUDGET	32</div><div class='add'>+#define TX_TOTAL_SIZE	TX_RING_SIZE*sizeof(struct netdev_desc)</div><div class='add'>+#define RX_TOTAL_SIZE	RX_RING_SIZE*sizeof(struct netdev_desc)</div><div class='add'>+</div><div class='add'>+/* Operational parameters that usually are not changed. */</div><div class='add'>+/* Time in jiffies before concluding the transmitter is hung. */</div><div class='add'>+#define TX_TIMEOUT  (4*HZ)</div><div class='add'>+#define PKT_BUF_SZ		1536	/* Size of each temporary Rx buffer.*/</div><div class='add'>+</div><div class='add'>+/* Include files, designed to support most kernel versions 2.0.0 and later. */</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;asm/processor.h&gt;		/* Processor type for cache alignment. */</div><div class='add'>+#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/mii.h&gt;</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Donald Becker &lt;becker@scyld.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Sundance Alta Ethernet driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+module_param(debug, int, 0);</div><div class='add'>+module_param(rx_copybreak, int, 0);</div><div class='add'>+module_param_array(media, charp, NULL, 0);</div><div class='add'>+module_param(flowctrl, int, 0);</div><div class='add'>+MODULE_PARM_DESC(debug, "Sundance Alta debug level (0-5)");</div><div class='add'>+MODULE_PARM_DESC(rx_copybreak, "Sundance Alta copy breakpoint for copy-only-tiny-frames");</div><div class='add'>+MODULE_PARM_DESC(flowctrl, "Sundance Alta flow control [0|1]");</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+				Theory of Operation</div><div class='add'>+</div><div class='add'>+I. Board Compatibility</div><div class='add'>+</div><div class='add'>+This driver is designed for the Sundance Technologies "Alta" ST201 chip.</div><div class='add'>+</div><div class='add'>+II. Board-specific settings</div><div class='add'>+</div><div class='add'>+III. Driver operation</div><div class='add'>+</div><div class='add'>+IIIa. Ring buffers</div><div class='add'>+</div><div class='add'>+This driver uses two statically allocated fixed-size descriptor lists</div><div class='add'>+formed into rings by a branch from the final descriptor to the beginning of</div><div class='add'>+the list.  The ring sizes are set at compile time by RX/TX_RING_SIZE.</div><div class='add'>+Some chips explicitly use only 2^N sized rings, while others use a</div><div class='add'>+'next descriptor' pointer that the driver forms into rings.</div><div class='add'>+</div><div class='add'>+IIIb/c. Transmit/Receive Structure</div><div class='add'>+</div><div class='add'>+This driver uses a zero-copy receive and transmit scheme.</div><div class='add'>+The driver allocates full frame size skbuffs for the Rx ring buffers at</div><div class='add'>+open() time and passes the skb-&gt;data field to the chip as receive data</div><div class='add'>+buffers.  When an incoming frame is less than RX_COPYBREAK bytes long,</div><div class='add'>+a fresh skbuff is allocated and the frame is copied to the new skbuff.</div><div class='add'>+When the incoming frame is larger, the skbuff is passed directly up the</div><div class='add'>+protocol stack.  Buffers consumed this way are replaced by newly allocated</div><div class='add'>+skbuffs in a later phase of receives.</div><div class='add'>+</div><div class='add'>+The RX_COPYBREAK value is chosen to trade-off the memory wasted by</div><div class='add'>+using a full-sized skbuff for small frames vs. the copying costs of larger</div><div class='add'>+frames.  New boards are typically used in generously configured machines</div><div class='add'>+and the underfilled buffers have negligible impact compared to the benefit of</div><div class='add'>+a single allocation size, so the default value of zero results in never</div><div class='add'>+copying packets.  When copying is done, the cost is usually mitigated by using</div><div class='add'>+a combined copy/checksum routine.  Copying also preloads the cache, which is</div><div class='add'>+most useful with small frames.</div><div class='add'>+</div><div class='add'>+A subtle aspect of the operation is that the IP header at offset 14 in an</div><div class='add'>+ethernet frame isn't longword aligned for further processing.</div><div class='add'>+Unaligned buffers are permitted by the Sundance hardware, so</div><div class='add'>+frames are received into the skbuff at an offset of "+2", 16-byte aligning</div><div class='add'>+the IP header.</div><div class='add'>+</div><div class='add'>+IIId. Synchronization</div><div class='add'>+</div><div class='add'>+The driver runs as two independent, single-threaded flows of control.  One</div><div class='add'>+is the send-packet routine, which enforces single-threaded use by the</div><div class='add'>+dev-&gt;tbusy flag.  The other thread is the interrupt handler, which is single</div><div class='add'>+threaded by the hardware and interrupt handling software.</div><div class='add'>+</div><div class='add'>+The send packet thread has partial control over the Tx ring and 'dev-&gt;tbusy'</div><div class='add'>+flag.  It sets the tbusy flag whenever it's queuing a Tx packet. If the next</div><div class='add'>+queue slot is empty, it clears the tbusy flag when finished otherwise it sets</div><div class='add'>+the 'lp-&gt;tx_full' flag.</div><div class='add'>+</div><div class='add'>+The interrupt handler has exclusive control over the Rx ring and records stats</div><div class='add'>+from the Tx ring.  After reaping the stats, it marks the Tx queue entry as</div><div class='add'>+empty by incrementing the dirty_tx mark. Iff the 'lp-&gt;tx_full' flag is set, it</div><div class='add'>+clears both the tx_full and tbusy flags.</div><div class='add'>+</div><div class='add'>+IV. Notes</div><div class='add'>+</div><div class='add'>+IVb. References</div><div class='add'>+</div><div class='add'>+The Sundance ST201 datasheet, preliminary version.</div><div class='add'>+The Kendin KS8723 datasheet, preliminary version.</div><div class='add'>+The ICplus IP100 datasheet, preliminary version.</div><div class='add'>+http://www.scyld.com/expert/100mbps.html</div><div class='add'>+http://www.scyld.com/expert/NWay.html</div><div class='add'>+</div><div class='add'>+IVc. Errata</div><div class='add'>+</div><div class='add'>+*/</div><div class='add'>+</div><div class='add'>+/* Work-around for Kendin chip bugs. */</div><div class='add'>+#ifndef CONFIG_SUNDANCE_MMIO</div><div class='add'>+#define USE_IO_OPS 1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id sundance_pci_tbl[] = {</div><div class='add'>+	{ 0x1186, 0x1002, 0x1186, 0x1002, 0, 0, 0 },</div><div class='add'>+	{ 0x1186, 0x1002, 0x1186, 0x1003, 0, 0, 1 },</div><div class='add'>+	{ 0x1186, 0x1002, 0x1186, 0x1012, 0, 0, 2 },</div><div class='add'>+	{ 0x1186, 0x1002, 0x1186, 0x1040, 0, 0, 3 },</div><div class='add'>+	{ 0x1186, 0x1002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },</div><div class='add'>+	{ 0x13F0, 0x0201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },</div><div class='add'>+	{ 0x13F0, 0x0200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, sundance_pci_tbl);</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	netdev_io_size = 128</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pci_id_info {</div><div class='add'>+        const char *name;</div><div class='add'>+};</div><div class='add'>+static const struct pci_id_info pci_id_tbl[] = {</div><div class='add'>+	{"D-Link DFE-550TX FAST Ethernet Adapter"},</div><div class='add'>+	{"D-Link DFE-550FX 100Mbps Fiber-optics Adapter"},</div><div class='add'>+	{"D-Link DFE-580TX 4 port Server Adapter"},</div><div class='add'>+	{"D-Link DFE-530TXS FAST Ethernet Adapter"},</div><div class='add'>+	{"D-Link DL10050-based FAST Ethernet Adapter"},</div><div class='add'>+	{"Sundance Technology Alta"},</div><div class='add'>+	{"IC Plus Corporation IP100A FAST Ethernet Adapter"},</div><div class='add'>+	{ }	/* terminate list. */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This driver was written to use PCI memory space, however x86-oriented</div><div class='add'>+   hardware often uses I/O space accesses. */</div><div class='add'>+</div><div class='add'>+/* Offsets to the device registers.</div><div class='add'>+   Unlike software-only systems, device drivers interact with complex hardware.</div><div class='add'>+   It's not useful to define symbolic names for every register bit in the</div><div class='add'>+   device.  The name can only partially document the semantics and make</div><div class='add'>+   the driver longer and more difficult to read.</div><div class='add'>+   In general, only the important configuration values or bits changed</div><div class='add'>+   multiple times should be defined symbolically.</div><div class='add'>+*/</div><div class='add'>+enum alta_offsets {</div><div class='add'>+	DMACtrl = 0x00,</div><div class='add'>+	TxListPtr = 0x04,</div><div class='add'>+	TxDMABurstThresh = 0x08,</div><div class='add'>+	TxDMAUrgentThresh = 0x09,</div><div class='add'>+	TxDMAPollPeriod = 0x0a,</div><div class='add'>+	RxDMAStatus = 0x0c,</div><div class='add'>+	RxListPtr = 0x10,</div><div class='add'>+	DebugCtrl0 = 0x1a,</div><div class='add'>+	DebugCtrl1 = 0x1c,</div><div class='add'>+	RxDMABurstThresh = 0x14,</div><div class='add'>+	RxDMAUrgentThresh = 0x15,</div><div class='add'>+	RxDMAPollPeriod = 0x16,</div><div class='add'>+	LEDCtrl = 0x1a,</div><div class='add'>+	ASICCtrl = 0x30,</div><div class='add'>+	EEData = 0x34,</div><div class='add'>+	EECtrl = 0x36,</div><div class='add'>+	FlashAddr = 0x40,</div><div class='add'>+	FlashData = 0x44,</div><div class='add'>+	WakeEvent = 0x45,</div><div class='add'>+	TxStatus = 0x46,</div><div class='add'>+	TxFrameId = 0x47,</div><div class='add'>+	DownCounter = 0x18,</div><div class='add'>+	IntrClear = 0x4a,</div><div class='add'>+	IntrEnable = 0x4c,</div><div class='add'>+	IntrStatus = 0x4e,</div><div class='add'>+	MACCtrl0 = 0x50,</div><div class='add'>+	MACCtrl1 = 0x52,</div><div class='add'>+	StationAddr = 0x54,</div><div class='add'>+	MaxFrameSize = 0x5A,</div><div class='add'>+	RxMode = 0x5c,</div><div class='add'>+	MIICtrl = 0x5e,</div><div class='add'>+	MulticastFilter0 = 0x60,</div><div class='add'>+	MulticastFilter1 = 0x64,</div><div class='add'>+	RxOctetsLow = 0x68,</div><div class='add'>+	RxOctetsHigh = 0x6a,</div><div class='add'>+	TxOctetsLow = 0x6c,</div><div class='add'>+	TxOctetsHigh = 0x6e,</div><div class='add'>+	TxFramesOK = 0x70,</div><div class='add'>+	RxFramesOK = 0x72,</div><div class='add'>+	StatsCarrierError = 0x74,</div><div class='add'>+	StatsLateColl = 0x75,</div><div class='add'>+	StatsMultiColl = 0x76,</div><div class='add'>+	StatsOneColl = 0x77,</div><div class='add'>+	StatsTxDefer = 0x78,</div><div class='add'>+	RxMissed = 0x79,</div><div class='add'>+	StatsTxXSDefer = 0x7a,</div><div class='add'>+	StatsTxAbort = 0x7b,</div><div class='add'>+	StatsBcastTx = 0x7c,</div><div class='add'>+	StatsBcastRx = 0x7d,</div><div class='add'>+	StatsMcastTx = 0x7e,</div><div class='add'>+	StatsMcastRx = 0x7f,</div><div class='add'>+	/* Aliased and bogus values! */</div><div class='add'>+	RxStatus = 0x0c,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ASIC_HI_WORD(x)	((x) + 2)</div><div class='add'>+</div><div class='add'>+enum ASICCtrl_HiWord_bit {</div><div class='add'>+	GlobalReset = 0x0001,</div><div class='add'>+	RxReset = 0x0002,</div><div class='add'>+	TxReset = 0x0004,</div><div class='add'>+	DMAReset = 0x0008,</div><div class='add'>+	FIFOReset = 0x0010,</div><div class='add'>+	NetworkReset = 0x0020,</div><div class='add'>+	HostReset = 0x0040,</div><div class='add'>+	ResetBusy = 0x0400,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Bits in the interrupt status/mask registers. */</div><div class='add'>+enum intr_status_bits {</div><div class='add'>+	IntrSummary=0x0001, IntrPCIErr=0x0002, IntrMACCtrl=0x0008,</div><div class='add'>+	IntrTxDone=0x0004, IntrRxDone=0x0010, IntrRxStart=0x0020,</div><div class='add'>+	IntrDrvRqst=0x0040,</div><div class='add'>+	StatsMax=0x0080, LinkChange=0x0100,</div><div class='add'>+	IntrTxDMADone=0x0200, IntrRxDMADone=0x0400,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Bits in the RxMode register. */</div><div class='add'>+enum rx_mode_bits {</div><div class='add'>+	AcceptAllIPMulti=0x20, AcceptMultiHash=0x10, AcceptAll=0x08,</div><div class='add'>+	AcceptBroadcast=0x04, AcceptMulticast=0x02, AcceptMyPhys=0x01,</div><div class='add'>+};</div><div class='add'>+/* Bits in MACCtrl. */</div><div class='add'>+enum mac_ctrl0_bits {</div><div class='add'>+	EnbFullDuplex=0x20, EnbRcvLargeFrame=0x40,</div><div class='add'>+	EnbFlowCtrl=0x100, EnbPassRxCRC=0x200,</div><div class='add'>+};</div><div class='add'>+enum mac_ctrl1_bits {</div><div class='add'>+	StatsEnable=0x0020,	StatsDisable=0x0040, StatsEnabled=0x0080,</div><div class='add'>+	TxEnable=0x0100, TxDisable=0x0200, TxEnabled=0x0400,</div><div class='add'>+	RxEnable=0x0800, RxDisable=0x1000, RxEnabled=0x2000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Bits in WakeEvent register. */</div><div class='add'>+enum wake_event_bits {</div><div class='add'>+	WakePktEnable = 0x01,</div><div class='add'>+	MagicPktEnable = 0x02,</div><div class='add'>+	LinkEventEnable = 0x04,</div><div class='add'>+	WolEnable = 0x80,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The Rx and Tx buffer descriptors. */</div><div class='add'>+/* Note that using only 32 bit fields simplifies conversion to big-endian</div><div class='add'>+   architectures. */</div><div class='add'>+struct netdev_desc {</div><div class='add'>+	__le32 next_desc;</div><div class='add'>+	__le32 status;</div><div class='add'>+	struct desc_frag { __le32 addr, length; } frag;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Bits in netdev_desc.status */</div><div class='add'>+enum desc_status_bits {</div><div class='add'>+	DescOwn=0x8000,</div><div class='add'>+	DescEndPacket=0x4000,</div><div class='add'>+	DescEndRing=0x2000,</div><div class='add'>+	LastFrag=0x80000000,</div><div class='add'>+	DescIntrOnTx=0x8000,</div><div class='add'>+	DescIntrOnDMADone=0x80000000,</div><div class='add'>+	DisableAlign = 0x00000001,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define PRIV_ALIGN	15 	/* Required alignment mask */</div><div class='add'>+/* Use  __attribute__((aligned (L1_CACHE_BYTES)))  to maintain alignment</div><div class='add'>+   within the structure. */</div><div class='add'>+#define MII_CNT		4</div><div class='add'>+struct netdev_private {</div><div class='add'>+	/* Descriptor rings first for alignment. */</div><div class='add'>+	struct netdev_desc *rx_ring;</div><div class='add'>+	struct netdev_desc *tx_ring;</div><div class='add'>+	struct sk_buff* rx_skbuff[RX_RING_SIZE];</div><div class='add'>+	struct sk_buff* tx_skbuff[TX_RING_SIZE];</div><div class='add'>+        dma_addr_t tx_ring_dma;</div><div class='add'>+        dma_addr_t rx_ring_dma;</div><div class='add'>+	struct timer_list timer;		/* Media monitoring timer. */</div><div class='add'>+	struct net_device *ndev;		/* backpointer */</div><div class='add'>+	/* ethtool extra stats */</div><div class='add'>+	struct {</div><div class='add'>+		u64 tx_multiple_collisions;</div><div class='add'>+		u64 tx_single_collisions;</div><div class='add'>+		u64 tx_late_collisions;</div><div class='add'>+		u64 tx_deferred;</div><div class='add'>+		u64 tx_deferred_excessive;</div><div class='add'>+		u64 tx_aborted;</div><div class='add'>+		u64 tx_bcasts;</div><div class='add'>+		u64 rx_bcasts;</div><div class='add'>+		u64 tx_mcasts;</div><div class='add'>+		u64 rx_mcasts;</div><div class='add'>+	} xstats;</div><div class='add'>+	/* Frequently used values: keep some adjacent for cache effect. */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	int msg_enable;</div><div class='add'>+	int chip_id;</div><div class='add'>+	unsigned int cur_rx, dirty_rx;		/* Producer/consumer ring indices */</div><div class='add'>+	unsigned int rx_buf_sz;			/* Based on MTU+slack. */</div><div class='add'>+	struct netdev_desc *last_tx;		/* Last Tx descriptor used. */</div><div class='add'>+	unsigned int cur_tx, dirty_tx;</div><div class='add'>+	/* These values are keep track of the transceiver/media in use. */</div><div class='add'>+	unsigned int flowctrl:1;</div><div class='add'>+	unsigned int default_port:4;		/* Last dev-&gt;if_port value. */</div><div class='add'>+	unsigned int an_enable:1;</div><div class='add'>+	unsigned int speed;</div><div class='add'>+	unsigned int wol_enabled:1;			/* Wake on LAN enabled */</div><div class='add'>+	struct tasklet_struct rx_tasklet;</div><div class='add'>+	struct tasklet_struct tx_tasklet;</div><div class='add'>+	int budget;</div><div class='add'>+	int cur_task;</div><div class='add'>+	/* Multicast and receive mode. */</div><div class='add'>+	spinlock_t mcastlock;			/* SMP lock multicast updates. */</div><div class='add'>+	u16 mcast_filter[4];</div><div class='add'>+	/* MII transceiver section. */</div><div class='add'>+	struct mii_if_info mii_if;</div><div class='add'>+	int mii_preamble_required;</div><div class='add'>+	unsigned char phys[MII_CNT];		/* MII device addresses, only first one used. */</div><div class='add'>+	struct pci_dev *pci_dev;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	spinlock_t statlock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The station address location in the EEPROM. */</div><div class='add'>+#define EEPROM_SA_OFFSET	0x10</div><div class='add'>+#define DEFAULT_INTR (IntrRxDMADone | IntrPCIErr | \</div><div class='add'>+			IntrDrvRqst | IntrTxDone | StatsMax | \</div><div class='add'>+			LinkChange)</div><div class='add'>+</div><div class='add'>+static int  change_mtu(struct net_device *dev, int new_mtu);</div><div class='add'>+static int  eeprom_read(void __iomem *ioaddr, int location);</div><div class='add'>+static int  mdio_read(struct net_device *dev, int phy_id, int location);</div><div class='add'>+static void mdio_write(struct net_device *dev, int phy_id, int location, int value);</div><div class='add'>+static int  mdio_wait_link(struct net_device *dev, int wait);</div><div class='add'>+static int  netdev_open(struct net_device *dev);</div><div class='add'>+static void check_duplex(struct net_device *dev);</div><div class='add'>+static void netdev_timer(struct timer_list *t);</div><div class='add'>+static void tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='add'>+static void init_ring(struct net_device *dev);</div><div class='add'>+static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev);</div><div class='add'>+static int reset_tx (struct net_device *dev);</div><div class='add'>+static irqreturn_t intr_handler(int irq, void *dev_instance);</div><div class='add'>+static void rx_poll(struct tasklet_struct *t);</div><div class='add'>+static void tx_poll(struct tasklet_struct *t);</div><div class='add'>+static void refill_rx (struct net_device *dev);</div><div class='add'>+static void netdev_error(struct net_device *dev, int intr_status);</div><div class='add'>+static void netdev_error(struct net_device *dev, int intr_status);</div><div class='add'>+static void set_rx_mode(struct net_device *dev);</div><div class='add'>+static int __set_mac_addr(struct net_device *dev);</div><div class='add'>+static int sundance_set_mac_addr(struct net_device *dev, void *data);</div><div class='add'>+static struct net_device_stats *get_stats(struct net_device *dev);</div><div class='add'>+static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);</div><div class='add'>+static int  netdev_close(struct net_device *dev);</div><div class='add'>+static const struct ethtool_ops ethtool_ops;</div><div class='add'>+</div><div class='add'>+static void sundance_reset(struct net_device *dev, unsigned long reset_cmd)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base + ASICCtrl;</div><div class='add'>+	int countdown;</div><div class='add'>+</div><div class='add'>+	/* ST201 documentation states ASICCtrl is a 32bit register */</div><div class='add'>+	iowrite32 (reset_cmd | ioread32 (ioaddr), ioaddr);</div><div class='add'>+	/* ST201 documentation states reset can take up to 1 ms */</div><div class='add'>+	countdown = 10 + 1;</div><div class='add'>+	while (ioread32 (ioaddr) &amp; (ResetBusy &lt;&lt; 16)) {</div><div class='add'>+		if (--countdown == 0) {</div><div class='add'>+			printk(KERN_WARNING "%s : reset not completed !!\n", dev-&gt;name);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		udelay(100);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='add'>+static void sundance_poll_controller(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	disable_irq(np-&gt;pci_dev-&gt;irq);</div><div class='add'>+	intr_handler(np-&gt;pci_dev-&gt;irq, dev);</div><div class='add'>+	enable_irq(np-&gt;pci_dev-&gt;irq);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops netdev_ops = {</div><div class='add'>+	.ndo_open		= netdev_open,</div><div class='add'>+	.ndo_stop		= netdev_close,</div><div class='add'>+	.ndo_start_xmit		= start_tx,</div><div class='add'>+	.ndo_get_stats 		= get_stats,</div><div class='add'>+	.ndo_set_rx_mode	= set_rx_mode,</div><div class='add'>+	.ndo_eth_ioctl		= netdev_ioctl,</div><div class='add'>+	.ndo_tx_timeout		= tx_timeout,</div><div class='add'>+	.ndo_change_mtu		= change_mtu,</div><div class='add'>+	.ndo_set_mac_address 	= sundance_set_mac_addr,</div><div class='add'>+	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='add'>+	.ndo_poll_controller 	= sundance_poll_controller,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int sundance_probe1(struct pci_dev *pdev,</div><div class='add'>+			   const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct netdev_private *np;</div><div class='add'>+	static int card_idx;</div><div class='add'>+	int chip_idx = ent-&gt;driver_data;</div><div class='add'>+	int irq;</div><div class='add'>+	int i;</div><div class='add'>+	void __iomem *ioaddr;</div><div class='add'>+	u16 mii_ctl;</div><div class='add'>+	void *ring_space;</div><div class='add'>+	dma_addr_t ring_dma;</div><div class='add'>+#ifdef USE_IO_OPS</div><div class='add'>+	int bar = 0;</div><div class='add'>+#else</div><div class='add'>+	int bar = 1;</div><div class='add'>+#endif</div><div class='add'>+	int phy, phy_end, phy_idx = 0;</div><div class='add'>+	__le16 addr[ETH_ALEN / 2];</div><div class='add'>+</div><div class='add'>+	if (pci_enable_device(pdev))</div><div class='add'>+		return -EIO;</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	irq = pdev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	dev = alloc_etherdev(sizeof(*np));</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (pci_request_regions(pdev, DRV_NAME))</div><div class='add'>+		goto err_out_netdev;</div><div class='add'>+</div><div class='add'>+	ioaddr = pci_iomap(pdev, bar, netdev_io_size);</div><div class='add'>+	if (!ioaddr)</div><div class='add'>+		goto err_out_res;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++)</div><div class='add'>+		addr[i] =</div><div class='add'>+			cpu_to_le16(eeprom_read(ioaddr, i + EEPROM_SA_OFFSET));</div><div class='add'>+	eth_hw_addr_set(dev, (u8 *)addr);</div><div class='add'>+</div><div class='add'>+	np = netdev_priv(dev);</div><div class='add'>+	np-&gt;ndev = dev;</div><div class='add'>+	np-&gt;base = ioaddr;</div><div class='add'>+	np-&gt;pci_dev = pdev;</div><div class='add'>+	np-&gt;chip_id = chip_idx;</div><div class='add'>+	np-&gt;msg_enable = (1 &lt;&lt; debug) - 1;</div><div class='add'>+	spin_lock_init(&amp;np-&gt;lock);</div><div class='add'>+	spin_lock_init(&amp;np-&gt;statlock);</div><div class='add'>+	tasklet_setup(&amp;np-&gt;rx_tasklet, rx_poll);</div><div class='add'>+	tasklet_setup(&amp;np-&gt;tx_tasklet, tx_poll);</div><div class='add'>+</div><div class='add'>+	ring_space = dma_alloc_coherent(&amp;pdev-&gt;dev, TX_TOTAL_SIZE,</div><div class='add'>+			&amp;ring_dma, GFP_KERNEL);</div><div class='add'>+	if (!ring_space)</div><div class='add'>+		goto err_out_cleardev;</div><div class='add'>+	np-&gt;tx_ring = (struct netdev_desc *)ring_space;</div><div class='add'>+	np-&gt;tx_ring_dma = ring_dma;</div><div class='add'>+</div><div class='add'>+	ring_space = dma_alloc_coherent(&amp;pdev-&gt;dev, RX_TOTAL_SIZE,</div><div class='add'>+			&amp;ring_dma, GFP_KERNEL);</div><div class='add'>+	if (!ring_space)</div><div class='add'>+		goto err_out_unmap_tx;</div><div class='add'>+	np-&gt;rx_ring = (struct netdev_desc *)ring_space;</div><div class='add'>+	np-&gt;rx_ring_dma = ring_dma;</div><div class='add'>+</div><div class='add'>+	np-&gt;mii_if.dev = dev;</div><div class='add'>+	np-&gt;mii_if.mdio_read = mdio_read;</div><div class='add'>+	np-&gt;mii_if.mdio_write = mdio_write;</div><div class='add'>+	np-&gt;mii_if.phy_id_mask = 0x1f;</div><div class='add'>+	np-&gt;mii_if.reg_num_mask = 0x1f;</div><div class='add'>+</div><div class='add'>+	/* The chip-specific entries in the device structure. */</div><div class='add'>+	dev-&gt;netdev_ops = &amp;netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;ethtool_ops;</div><div class='add'>+	dev-&gt;watchdog_timeo = TX_TIMEOUT;</div><div class='add'>+</div><div class='add'>+	/* MTU range: 68 - 8191 */</div><div class='add'>+	dev-&gt;min_mtu = ETH_MIN_MTU;</div><div class='add'>+	dev-&gt;max_mtu = 8191;</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, dev);</div><div class='add'>+</div><div class='add'>+	i = register_netdev(dev);</div><div class='add'>+	if (i)</div><div class='add'>+		goto err_out_unmap_rx;</div><div class='add'>+</div><div class='add'>+	printk(KERN_INFO "%s: %s at %p, %pM, IRQ %d.\n",</div><div class='add'>+	       dev-&gt;name, pci_id_tbl[chip_idx].name, ioaddr,</div><div class='add'>+	       dev-&gt;dev_addr, irq);</div><div class='add'>+</div><div class='add'>+	np-&gt;phys[0] = 1;		/* Default setting */</div><div class='add'>+	np-&gt;mii_preamble_required++;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * It seems some phys doesn't deal well with address 0 being accessed</div><div class='add'>+	 * first</div><div class='add'>+	 */</div><div class='add'>+	if (sundance_pci_tbl[np-&gt;chip_id].device == 0x0200) {</div><div class='add'>+		phy = 0;</div><div class='add'>+		phy_end = 31;</div><div class='add'>+	} else {</div><div class='add'>+		phy = 1;</div><div class='add'>+		phy_end = 32;	/* wraps to zero, due to 'phy &amp; 0x1f' */</div><div class='add'>+	}</div><div class='add'>+	for (; phy &lt;= phy_end &amp;&amp; phy_idx &lt; MII_CNT; phy++) {</div><div class='add'>+		int phyx = phy &amp; 0x1f;</div><div class='add'>+		int mii_status = mdio_read(dev, phyx, MII_BMSR);</div><div class='add'>+		if (mii_status != 0xffff  &amp;&amp;  mii_status != 0x0000) {</div><div class='add'>+			np-&gt;phys[phy_idx++] = phyx;</div><div class='add'>+			np-&gt;mii_if.advertising = mdio_read(dev, phyx, MII_ADVERTISE);</div><div class='add'>+			if ((mii_status &amp; 0x0040) == 0)</div><div class='add'>+				np-&gt;mii_preamble_required++;</div><div class='add'>+			printk(KERN_INFO "%s: MII PHY found at address %d, status "</div><div class='add'>+				   "0x%4.4x advertising %4.4x.\n",</div><div class='add'>+				   dev-&gt;name, phyx, mii_status, np-&gt;mii_if.advertising);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	np-&gt;mii_preamble_required--;</div><div class='add'>+</div><div class='add'>+	if (phy_idx == 0) {</div><div class='add'>+		printk(KERN_INFO "%s: No MII transceiver found, aborting.  ASIC status %x\n",</div><div class='add'>+			   dev-&gt;name, ioread32(ioaddr + ASICCtrl));</div><div class='add'>+		goto err_out_unregister;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	np-&gt;mii_if.phy_id = np-&gt;phys[0];</div><div class='add'>+</div><div class='add'>+	/* Parse override configuration */</div><div class='add'>+	np-&gt;an_enable = 1;</div><div class='add'>+	if (card_idx &lt; MAX_UNITS) {</div><div class='add'>+		if (media[card_idx] != NULL) {</div><div class='add'>+			np-&gt;an_enable = 0;</div><div class='add'>+			if (strcmp (media[card_idx], "100mbps_fd") == 0 ||</div><div class='add'>+			    strcmp (media[card_idx], "4") == 0) {</div><div class='add'>+				np-&gt;speed = 100;</div><div class='add'>+				np-&gt;mii_if.full_duplex = 1;</div><div class='add'>+			} else if (strcmp (media[card_idx], "100mbps_hd") == 0 ||</div><div class='add'>+				   strcmp (media[card_idx], "3") == 0) {</div><div class='add'>+				np-&gt;speed = 100;</div><div class='add'>+				np-&gt;mii_if.full_duplex = 0;</div><div class='add'>+			} else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||</div><div class='add'>+				   strcmp (media[card_idx], "2") == 0) {</div><div class='add'>+				np-&gt;speed = 10;</div><div class='add'>+				np-&gt;mii_if.full_duplex = 1;</div><div class='add'>+			} else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||</div><div class='add'>+				   strcmp (media[card_idx], "1") == 0) {</div><div class='add'>+				np-&gt;speed = 10;</div><div class='add'>+				np-&gt;mii_if.full_duplex = 0;</div><div class='add'>+			} else {</div><div class='add'>+				np-&gt;an_enable = 1;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (flowctrl == 1)</div><div class='add'>+			np-&gt;flowctrl = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Fibre PHY? */</div><div class='add'>+	if (ioread32 (ioaddr + ASICCtrl) &amp; 0x80) {</div><div class='add'>+		/* Default 100Mbps Full */</div><div class='add'>+		if (np-&gt;an_enable) {</div><div class='add'>+			np-&gt;speed = 100;</div><div class='add'>+			np-&gt;mii_if.full_duplex = 1;</div><div class='add'>+			np-&gt;an_enable = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* Reset PHY */</div><div class='add'>+	mdio_write (dev, np-&gt;phys[0], MII_BMCR, BMCR_RESET);</div><div class='add'>+	mdelay (300);</div><div class='add'>+	/* If flow control enabled, we need to advertise it.*/</div><div class='add'>+	if (np-&gt;flowctrl)</div><div class='add'>+		mdio_write (dev, np-&gt;phys[0], MII_ADVERTISE, np-&gt;mii_if.advertising | 0x0400);</div><div class='add'>+	mdio_write (dev, np-&gt;phys[0], MII_BMCR, BMCR_ANENABLE|BMCR_ANRESTART);</div><div class='add'>+	/* Force media type */</div><div class='add'>+	if (!np-&gt;an_enable) {</div><div class='add'>+		mii_ctl = 0;</div><div class='add'>+		mii_ctl |= (np-&gt;speed == 100) ? BMCR_SPEED100 : 0;</div><div class='add'>+		mii_ctl |= (np-&gt;mii_if.full_duplex) ? BMCR_FULLDPLX : 0;</div><div class='add'>+		mdio_write (dev, np-&gt;phys[0], MII_BMCR, mii_ctl);</div><div class='add'>+		printk (KERN_INFO "Override speed=%d, %s duplex\n",</div><div class='add'>+			np-&gt;speed, np-&gt;mii_if.full_duplex ? "Full" : "Half");</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Perhaps move the reset here? */</div><div class='add'>+	/* Reset the chip to erase previous misconfiguration. */</div><div class='add'>+	if (netif_msg_hw(np))</div><div class='add'>+		printk("ASIC Control is %x.\n", ioread32(ioaddr + ASICCtrl));</div><div class='add'>+	sundance_reset(dev, 0x00ff &lt;&lt; 16);</div><div class='add'>+	if (netif_msg_hw(np))</div><div class='add'>+		printk("ASIC Control is now %x.\n", ioread32(ioaddr + ASICCtrl));</div><div class='add'>+</div><div class='add'>+	card_idx++;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out_unregister:</div><div class='add'>+	unregister_netdev(dev);</div><div class='add'>+err_out_unmap_rx:</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, RX_TOTAL_SIZE,</div><div class='add'>+		np-&gt;rx_ring, np-&gt;rx_ring_dma);</div><div class='add'>+err_out_unmap_tx:</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, TX_TOTAL_SIZE,</div><div class='add'>+		np-&gt;tx_ring, np-&gt;tx_ring_dma);</div><div class='add'>+err_out_cleardev:</div><div class='add'>+	pci_iounmap(pdev, ioaddr);</div><div class='add'>+err_out_res:</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+err_out_netdev:</div><div class='add'>+	free_netdev (dev);</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int change_mtu(struct net_device *dev, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	if (netif_running(dev))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define eeprom_delay(ee_addr)	ioread32(ee_addr)</div><div class='add'>+/* Read the EEPROM and MII Management Data I/O (MDIO) interfaces. */</div><div class='add'>+static int eeprom_read(void __iomem *ioaddr, int location)</div><div class='add'>+{</div><div class='add'>+	int boguscnt = 10000;		/* Typical 1900 ticks. */</div><div class='add'>+	iowrite16(0x0200 | (location &amp; 0xff), ioaddr + EECtrl);</div><div class='add'>+	do {</div><div class='add'>+		eeprom_delay(ioaddr + EECtrl);</div><div class='add'>+		if (! (ioread16(ioaddr + EECtrl) &amp; 0x8000)) {</div><div class='add'>+			return ioread16(ioaddr + EEData);</div><div class='add'>+		}</div><div class='add'>+	} while (--boguscnt &gt; 0);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*  MII transceiver control section.</div><div class='add'>+	Read and write the MII registers using software-generated serial</div><div class='add'>+	MDIO protocol.  See the MII specifications or DP83840A data sheet</div><div class='add'>+	for details.</div><div class='add'>+</div><div class='add'>+	The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually</div><div class='add'>+	met by back-to-back 33Mhz PCI cycles. */</div><div class='add'>+#define mdio_delay() ioread8(mdio_addr)</div><div class='add'>+</div><div class='add'>+enum mii_reg_bits {</div><div class='add'>+	MDIO_ShiftClk=0x0001, MDIO_Data=0x0002, MDIO_EnbOutput=0x0004,</div><div class='add'>+};</div><div class='add'>+#define MDIO_EnbIn  (0)</div><div class='add'>+#define MDIO_WRITE0 (MDIO_EnbOutput)</div><div class='add'>+#define MDIO_WRITE1 (MDIO_Data | MDIO_EnbOutput)</div><div class='add'>+</div><div class='add'>+/* Generate the preamble required for initial synchronization and</div><div class='add'>+   a few older transceivers. */</div><div class='add'>+static void mdio_sync(void __iomem *mdio_addr)</div><div class='add'>+{</div><div class='add'>+	int bits = 32;</div><div class='add'>+</div><div class='add'>+	/* Establish sync by sending at least 32 logic ones. */</div><div class='add'>+	while (--bits &gt;= 0) {</div><div class='add'>+		iowrite8(MDIO_WRITE1, mdio_addr);</div><div class='add'>+		mdio_delay();</div><div class='add'>+		iowrite8(MDIO_WRITE1 | MDIO_ShiftClk, mdio_addr);</div><div class='add'>+		mdio_delay();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mdio_read(struct net_device *dev, int phy_id, int location)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *mdio_addr = np-&gt;base + MIICtrl;</div><div class='add'>+	int mii_cmd = (0xf6 &lt;&lt; 10) | (phy_id &lt;&lt; 5) | location;</div><div class='add'>+	int i, retval = 0;</div><div class='add'>+</div><div class='add'>+	if (np-&gt;mii_preamble_required)</div><div class='add'>+		mdio_sync(mdio_addr);</div><div class='add'>+</div><div class='add'>+	/* Shift the read command bits out. */</div><div class='add'>+	for (i = 15; i &gt;= 0; i--) {</div><div class='add'>+		int dataval = (mii_cmd &amp; (1 &lt;&lt; i)) ? MDIO_WRITE1 : MDIO_WRITE0;</div><div class='add'>+</div><div class='add'>+		iowrite8(dataval, mdio_addr);</div><div class='add'>+		mdio_delay();</div><div class='add'>+		iowrite8(dataval | MDIO_ShiftClk, mdio_addr);</div><div class='add'>+		mdio_delay();</div><div class='add'>+	}</div><div class='add'>+	/* Read the two transition, 16 data, and wire-idle bits. */</div><div class='add'>+	for (i = 19; i &gt; 0; i--) {</div><div class='add'>+		iowrite8(MDIO_EnbIn, mdio_addr);</div><div class='add'>+		mdio_delay();</div><div class='add'>+		retval = (retval &lt;&lt; 1) | ((ioread8(mdio_addr) &amp; MDIO_Data) ? 1 : 0);</div><div class='add'>+		iowrite8(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);</div><div class='add'>+		mdio_delay();</div><div class='add'>+	}</div><div class='add'>+	return (retval&gt;&gt;1) &amp; 0xffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mdio_write(struct net_device *dev, int phy_id, int location, int value)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *mdio_addr = np-&gt;base + MIICtrl;</div><div class='add'>+	int mii_cmd = (0x5002 &lt;&lt; 16) | (phy_id &lt;&lt; 23) | (location&lt;&lt;18) | value;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (np-&gt;mii_preamble_required)</div><div class='add'>+		mdio_sync(mdio_addr);</div><div class='add'>+</div><div class='add'>+	/* Shift the command bits out. */</div><div class='add'>+	for (i = 31; i &gt;= 0; i--) {</div><div class='add'>+		int dataval = (mii_cmd &amp; (1 &lt;&lt; i)) ? MDIO_WRITE1 : MDIO_WRITE0;</div><div class='add'>+</div><div class='add'>+		iowrite8(dataval, mdio_addr);</div><div class='add'>+		mdio_delay();</div><div class='add'>+		iowrite8(dataval | MDIO_ShiftClk, mdio_addr);</div><div class='add'>+		mdio_delay();</div><div class='add'>+	}</div><div class='add'>+	/* Clear out extra bits. */</div><div class='add'>+	for (i = 2; i &gt; 0; i--) {</div><div class='add'>+		iowrite8(MDIO_EnbIn, mdio_addr);</div><div class='add'>+		mdio_delay();</div><div class='add'>+		iowrite8(MDIO_EnbIn | MDIO_ShiftClk, mdio_addr);</div><div class='add'>+		mdio_delay();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mdio_wait_link(struct net_device *dev, int wait)</div><div class='add'>+{</div><div class='add'>+	int bmsr;</div><div class='add'>+	int phy_id;</div><div class='add'>+	struct netdev_private *np;</div><div class='add'>+</div><div class='add'>+	np = netdev_priv(dev);</div><div class='add'>+	phy_id = np-&gt;phys[0];</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		bmsr = mdio_read(dev, phy_id, MII_BMSR);</div><div class='add'>+		if (bmsr &amp; 0x0004)</div><div class='add'>+			return 0;</div><div class='add'>+		mdelay(1);</div><div class='add'>+	} while (--wait &gt; 0);</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netdev_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	sundance_reset(dev, 0x00ff &lt;&lt; 16);</div><div class='add'>+</div><div class='add'>+	i = request_irq(irq, intr_handler, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	if (i)</div><div class='add'>+		return i;</div><div class='add'>+</div><div class='add'>+	if (netif_msg_ifup(np))</div><div class='add'>+		printk(KERN_DEBUG "%s: netdev_open() irq %d\n", dev-&gt;name, irq);</div><div class='add'>+</div><div class='add'>+	init_ring(dev);</div><div class='add'>+</div><div class='add'>+	iowrite32(np-&gt;rx_ring_dma, ioaddr + RxListPtr);</div><div class='add'>+	/* The Tx list pointer is written as packets are queued. */</div><div class='add'>+</div><div class='add'>+	/* Initialize other registers. */</div><div class='add'>+	__set_mac_addr(dev);</div><div class='add'>+#if IS_ENABLED(CONFIG_VLAN_8021Q)</div><div class='add'>+	iowrite16(dev-&gt;mtu + 18, ioaddr + MaxFrameSize);</div><div class='add'>+#else</div><div class='add'>+	iowrite16(dev-&gt;mtu + 14, ioaddr + MaxFrameSize);</div><div class='add'>+#endif</div><div class='add'>+	if (dev-&gt;mtu &gt; 2047)</div><div class='add'>+		iowrite32(ioread32(ioaddr + ASICCtrl) | 0x0C, ioaddr + ASICCtrl);</div><div class='add'>+</div><div class='add'>+	/* Configure the PCI bus bursts and FIFO thresholds. */</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;if_port == 0)</div><div class='add'>+		dev-&gt;if_port = np-&gt;default_port;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;np-&gt;mcastlock);</div><div class='add'>+</div><div class='add'>+	set_rx_mode(dev);</div><div class='add'>+	iowrite16(0, ioaddr + IntrEnable);</div><div class='add'>+	iowrite16(0, ioaddr + DownCounter);</div><div class='add'>+	/* Set the chip to poll every N*320nsec. */</div><div class='add'>+	iowrite8(100, ioaddr + RxDMAPollPeriod);</div><div class='add'>+	iowrite8(127, ioaddr + TxDMAPollPeriod);</div><div class='add'>+	/* Fix DFE-580TX packet drop issue */</div><div class='add'>+	if (np-&gt;pci_dev-&gt;revision &gt;= 0x14)</div><div class='add'>+		iowrite8(0x01, ioaddr + DebugCtrl1);</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;np-&gt;lock, flags);</div><div class='add'>+	reset_tx(dev);</div><div class='add'>+	spin_unlock_irqrestore(&amp;np-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);</div><div class='add'>+</div><div class='add'>+	/* Disable Wol */</div><div class='add'>+	iowrite8(ioread8(ioaddr + WakeEvent) | 0x00, ioaddr + WakeEvent);</div><div class='add'>+	np-&gt;wol_enabled = 0;</div><div class='add'>+</div><div class='add'>+	if (netif_msg_ifup(np))</div><div class='add'>+		printk(KERN_DEBUG "%s: Done netdev_open(), status: Rx %x Tx %x "</div><div class='add'>+			   "MAC Control %x, %4.4x %4.4x.\n",</div><div class='add'>+			   dev-&gt;name, ioread32(ioaddr + RxStatus), ioread8(ioaddr + TxStatus),</div><div class='add'>+			   ioread32(ioaddr + MACCtrl0),</div><div class='add'>+			   ioread16(ioaddr + MACCtrl1), ioread16(ioaddr + MACCtrl0));</div><div class='add'>+</div><div class='add'>+	/* Set the timer to check for link beat. */</div><div class='add'>+	timer_setup(&amp;np-&gt;timer, netdev_timer, 0);</div><div class='add'>+	np-&gt;timer.expires = jiffies + 3*HZ;</div><div class='add'>+	add_timer(&amp;np-&gt;timer);</div><div class='add'>+</div><div class='add'>+	/* Enable interrupts by setting the interrupt mask. */</div><div class='add'>+	iowrite16(DEFAULT_INTR, ioaddr + IntrEnable);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_duplex(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	int mii_lpa = mdio_read(dev, np-&gt;phys[0], MII_LPA);</div><div class='add'>+	int negotiated = mii_lpa &amp; np-&gt;mii_if.advertising;</div><div class='add'>+	int duplex;</div><div class='add'>+</div><div class='add'>+	/* Force media */</div><div class='add'>+	if (!np-&gt;an_enable || mii_lpa == 0xffff) {</div><div class='add'>+		if (np-&gt;mii_if.full_duplex)</div><div class='add'>+			iowrite16 (ioread16 (ioaddr + MACCtrl0) | EnbFullDuplex,</div><div class='add'>+				ioaddr + MACCtrl0);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Autonegotiation */</div><div class='add'>+	duplex = (negotiated &amp; 0x0100) || (negotiated &amp; 0x01C0) == 0x0040;</div><div class='add'>+	if (np-&gt;mii_if.full_duplex != duplex) {</div><div class='add'>+		np-&gt;mii_if.full_duplex = duplex;</div><div class='add'>+		if (netif_msg_link(np))</div><div class='add'>+			printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d "</div><div class='add'>+				   "negotiated capability %4.4x.\n", dev-&gt;name,</div><div class='add'>+				   duplex ? "full" : "half", np-&gt;phys[0], negotiated);</div><div class='add'>+		iowrite16(ioread16(ioaddr + MACCtrl0) | (duplex ? 0x20 : 0), ioaddr + MACCtrl0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void netdev_timer(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = timer_container_of(np, t, timer);</div><div class='add'>+	struct net_device *dev = np-&gt;mii_if.dev;</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	int next_tick = 10*HZ;</div><div class='add'>+</div><div class='add'>+	if (netif_msg_timer(np)) {</div><div class='add'>+		printk(KERN_DEBUG "%s: Media selection timer tick, intr status %4.4x, "</div><div class='add'>+			   "Tx %x Rx %x.\n",</div><div class='add'>+			   dev-&gt;name, ioread16(ioaddr + IntrEnable),</div><div class='add'>+			   ioread8(ioaddr + TxStatus), ioread32(ioaddr + RxStatus));</div><div class='add'>+	}</div><div class='add'>+	check_duplex(dev);</div><div class='add'>+	np-&gt;timer.expires = jiffies + next_tick;</div><div class='add'>+	add_timer(&amp;np-&gt;timer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	unsigned long flag;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+	tasklet_disable_in_atomic(&amp;np-&gt;tx_tasklet);</div><div class='add'>+	iowrite16(0, ioaddr + IntrEnable);</div><div class='add'>+	printk(KERN_WARNING "%s: Transmit timed out, TxStatus %2.2x "</div><div class='add'>+		   "TxFrameId %2.2x,"</div><div class='add'>+		   " resetting...\n", dev-&gt;name, ioread8(ioaddr + TxStatus),</div><div class='add'>+		   ioread8(ioaddr + TxFrameId));</div><div class='add'>+</div><div class='add'>+	{</div><div class='add'>+		int i;</div><div class='add'>+		for (i=0; i&lt;TX_RING_SIZE; i++) {</div><div class='add'>+			printk(KERN_DEBUG "%02x %08llx %08x %08x(%02x) %08x %08x\n", i,</div><div class='add'>+				(unsigned long long)(np-&gt;tx_ring_dma + i*sizeof(*np-&gt;tx_ring)),</div><div class='add'>+				le32_to_cpu(np-&gt;tx_ring[i].next_desc),</div><div class='add'>+				le32_to_cpu(np-&gt;tx_ring[i].status),</div><div class='add'>+				(le32_to_cpu(np-&gt;tx_ring[i].status) &gt;&gt; 2) &amp; 0xff,</div><div class='add'>+				le32_to_cpu(np-&gt;tx_ring[i].frag.addr),</div><div class='add'>+				le32_to_cpu(np-&gt;tx_ring[i].frag.length));</div><div class='add'>+		}</div><div class='add'>+		printk(KERN_DEBUG "TxListPtr=%08x netif_queue_stopped=%d\n",</div><div class='add'>+			ioread32(np-&gt;base + TxListPtr),</div><div class='add'>+			netif_queue_stopped(dev));</div><div class='add'>+		printk(KERN_DEBUG "cur_tx=%d(%02x) dirty_tx=%d(%02x)\n",</div><div class='add'>+			np-&gt;cur_tx, np-&gt;cur_tx % TX_RING_SIZE,</div><div class='add'>+			np-&gt;dirty_tx, np-&gt;dirty_tx % TX_RING_SIZE);</div><div class='add'>+		printk(KERN_DEBUG "cur_rx=%d dirty_rx=%d\n", np-&gt;cur_rx, np-&gt;dirty_rx);</div><div class='add'>+		printk(KERN_DEBUG "cur_task=%d\n", np-&gt;cur_task);</div><div class='add'>+	}</div><div class='add'>+	spin_lock_irqsave(&amp;np-&gt;lock, flag);</div><div class='add'>+</div><div class='add'>+	/* Stop and restart the chip's Tx processes . */</div><div class='add'>+	reset_tx(dev);</div><div class='add'>+	spin_unlock_irqrestore(&amp;np-&gt;lock, flag);</div><div class='add'>+</div><div class='add'>+	dev-&gt;if_port = 0;</div><div class='add'>+</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='add'>+	dev-&gt;stats.tx_errors++;</div><div class='add'>+	if (np-&gt;cur_tx - np-&gt;dirty_tx &lt; TX_QUEUE_LEN - 4) {</div><div class='add'>+		netif_wake_queue(dev);</div><div class='add'>+	}</div><div class='add'>+	iowrite16(DEFAULT_INTR, ioaddr + IntrEnable);</div><div class='add'>+	tasklet_enable(&amp;np-&gt;tx_tasklet);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* Initialize the Rx and Tx rings, along with various 'dev' bits. */</div><div class='add'>+static void init_ring(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	np-&gt;cur_rx = np-&gt;cur_tx = 0;</div><div class='add'>+	np-&gt;dirty_rx = np-&gt;dirty_tx = 0;</div><div class='add'>+	np-&gt;cur_task = 0;</div><div class='add'>+</div><div class='add'>+	np-&gt;rx_buf_sz = (dev-&gt;mtu &lt;= 1520 ? PKT_BUF_SZ : dev-&gt;mtu + 16);</div><div class='add'>+</div><div class='add'>+	/* Initialize all Rx descriptors. */</div><div class='add'>+	for (i = 0; i &lt; RX_RING_SIZE; i++) {</div><div class='add'>+		np-&gt;rx_ring[i].next_desc = cpu_to_le32(np-&gt;rx_ring_dma +</div><div class='add'>+			((i+1)%RX_RING_SIZE)*sizeof(*np-&gt;rx_ring));</div><div class='add'>+		np-&gt;rx_ring[i].status = 0;</div><div class='add'>+		np-&gt;rx_ring[i].frag.length = 0;</div><div class='add'>+		np-&gt;rx_skbuff[i] = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Fill in the Rx buffers.  Handle allocation failure gracefully. */</div><div class='add'>+	for (i = 0; i &lt; RX_RING_SIZE; i++) {</div><div class='add'>+		dma_addr_t addr;</div><div class='add'>+</div><div class='add'>+		struct sk_buff *skb =</div><div class='add'>+			netdev_alloc_skb(dev, np-&gt;rx_buf_sz + 2);</div><div class='add'>+		np-&gt;rx_skbuff[i] = skb;</div><div class='add'>+		if (skb == NULL)</div><div class='add'>+			break;</div><div class='add'>+		skb_reserve(skb, 2);	/* 16 byte align the IP header. */</div><div class='add'>+		addr = dma_map_single(&amp;np-&gt;pci_dev-&gt;dev, skb-&gt;data,</div><div class='add'>+				      np-&gt;rx_buf_sz, DMA_FROM_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;np-&gt;pci_dev-&gt;dev, addr)) {</div><div class='add'>+			dev_kfree_skb(skb);</div><div class='add'>+			np-&gt;rx_skbuff[i] = NULL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		np-&gt;rx_ring[i].frag.addr = cpu_to_le32(addr);</div><div class='add'>+		np-&gt;rx_ring[i].frag.length = cpu_to_le32(np-&gt;rx_buf_sz | LastFrag);</div><div class='add'>+	}</div><div class='add'>+	np-&gt;dirty_rx = (unsigned int)(i - RX_RING_SIZE);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; TX_RING_SIZE; i++) {</div><div class='add'>+		np-&gt;tx_skbuff[i] = NULL;</div><div class='add'>+		np-&gt;tx_ring[i].status = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tx_poll(struct tasklet_struct *t)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = from_tasklet(np, t, tx_tasklet);</div><div class='add'>+	unsigned head = np-&gt;cur_task % TX_RING_SIZE;</div><div class='add'>+	struct netdev_desc *txdesc =</div><div class='add'>+		&amp;np-&gt;tx_ring[(np-&gt;cur_tx - 1) % TX_RING_SIZE];</div><div class='add'>+</div><div class='add'>+	/* Chain the next pointer */</div><div class='add'>+	for (; np-&gt;cur_tx - np-&gt;cur_task &gt; 0; np-&gt;cur_task++) {</div><div class='add'>+		int entry = np-&gt;cur_task % TX_RING_SIZE;</div><div class='add'>+		txdesc = &amp;np-&gt;tx_ring[entry];</div><div class='add'>+		if (np-&gt;last_tx) {</div><div class='add'>+			np-&gt;last_tx-&gt;next_desc = cpu_to_le32(np-&gt;tx_ring_dma +</div><div class='add'>+				entry*sizeof(struct netdev_desc));</div><div class='add'>+		}</div><div class='add'>+		np-&gt;last_tx = txdesc;</div><div class='add'>+	}</div><div class='add'>+	/* Indicate the latest descriptor of tx ring */</div><div class='add'>+	txdesc-&gt;status |= cpu_to_le32(DescIntrOnTx);</div><div class='add'>+</div><div class='add'>+	if (ioread32 (np-&gt;base + TxListPtr) == 0)</div><div class='add'>+		iowrite32 (np-&gt;tx_ring_dma + head * sizeof(struct netdev_desc),</div><div class='add'>+			np-&gt;base + TxListPtr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t</div><div class='add'>+start_tx (struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	struct netdev_desc *txdesc;</div><div class='add'>+	dma_addr_t addr;</div><div class='add'>+	unsigned entry;</div><div class='add'>+</div><div class='add'>+	/* Calculate the next Tx descriptor entry. */</div><div class='add'>+	entry = np-&gt;cur_tx % TX_RING_SIZE;</div><div class='add'>+	np-&gt;tx_skbuff[entry] = skb;</div><div class='add'>+	txdesc = &amp;np-&gt;tx_ring[entry];</div><div class='add'>+</div><div class='add'>+	addr = dma_map_single(&amp;np-&gt;pci_dev-&gt;dev, skb-&gt;data, skb-&gt;len,</div><div class='add'>+			      DMA_TO_DEVICE);</div><div class='add'>+	if (dma_mapping_error(&amp;np-&gt;pci_dev-&gt;dev, addr))</div><div class='add'>+		goto drop_frame;</div><div class='add'>+</div><div class='add'>+	txdesc-&gt;next_desc = 0;</div><div class='add'>+	txdesc-&gt;status = cpu_to_le32 ((entry &lt;&lt; 2) | DisableAlign);</div><div class='add'>+	txdesc-&gt;frag.addr = cpu_to_le32(addr);</div><div class='add'>+	txdesc-&gt;frag.length = cpu_to_le32 (skb-&gt;len | LastFrag);</div><div class='add'>+</div><div class='add'>+	/* Increment cur_tx before tasklet_schedule() */</div><div class='add'>+	np-&gt;cur_tx++;</div><div class='add'>+	mb();</div><div class='add'>+	/* Schedule a tx_poll() task */</div><div class='add'>+	tasklet_schedule(&amp;np-&gt;tx_tasklet);</div><div class='add'>+</div><div class='add'>+	/* On some architectures: explicitly flush cache lines here. */</div><div class='add'>+	if (np-&gt;cur_tx - np-&gt;dirty_tx &lt; TX_QUEUE_LEN - 1 &amp;&amp;</div><div class='add'>+	    !netif_queue_stopped(dev)) {</div><div class='add'>+		/* do nothing */</div><div class='add'>+	} else {</div><div class='add'>+		netif_stop_queue (dev);</div><div class='add'>+	}</div><div class='add'>+	if (netif_msg_tx_queued(np)) {</div><div class='add'>+		printk (KERN_DEBUG</div><div class='add'>+			"%s: Transmit frame #%d queued in slot %d.\n",</div><div class='add'>+			dev-&gt;name, np-&gt;cur_tx, entry);</div><div class='add'>+	}</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+drop_frame:</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+	np-&gt;tx_skbuff[entry] = NULL;</div><div class='add'>+	dev-&gt;stats.tx_dropped++;</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Reset hardware tx and free all of tx buffers */</div><div class='add'>+static int</div><div class='add'>+reset_tx (struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Reset tx logic, TxListPtr will be cleaned */</div><div class='add'>+	iowrite16 (TxDisable, ioaddr + MACCtrl1);</div><div class='add'>+	sundance_reset(dev, (NetworkReset|FIFOReset|DMAReset|TxReset) &lt;&lt; 16);</div><div class='add'>+</div><div class='add'>+	/* free all tx skbuff */</div><div class='add'>+	for (i = 0; i &lt; TX_RING_SIZE; i++) {</div><div class='add'>+		np-&gt;tx_ring[i].next_desc = 0;</div><div class='add'>+</div><div class='add'>+		skb = np-&gt;tx_skbuff[i];</div><div class='add'>+		if (skb) {</div><div class='add'>+			dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+				le32_to_cpu(np-&gt;tx_ring[i].frag.addr),</div><div class='add'>+				skb-&gt;len, DMA_TO_DEVICE);</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+			np-&gt;tx_skbuff[i] = NULL;</div><div class='add'>+			dev-&gt;stats.tx_dropped++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	np-&gt;cur_tx = np-&gt;dirty_tx = 0;</div><div class='add'>+	np-&gt;cur_task = 0;</div><div class='add'>+</div><div class='add'>+	np-&gt;last_tx = NULL;</div><div class='add'>+	iowrite8(127, ioaddr + TxDMAPollPeriod);</div><div class='add'>+</div><div class='add'>+	iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The interrupt handler cleans up after the Tx thread,</div><div class='add'>+   and schedule a Rx thread work */</div><div class='add'>+static irqreturn_t intr_handler(int irq, void *dev_instance)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = (struct net_device *)dev_instance;</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	int hw_frame_id;</div><div class='add'>+	int tx_cnt;</div><div class='add'>+	int tx_status;</div><div class='add'>+	int handled = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		int intr_status = ioread16(ioaddr + IntrStatus);</div><div class='add'>+		iowrite16(intr_status, ioaddr + IntrStatus);</div><div class='add'>+</div><div class='add'>+		if (netif_msg_intr(np))</div><div class='add'>+			printk(KERN_DEBUG "%s: Interrupt, status %4.4x.\n",</div><div class='add'>+				   dev-&gt;name, intr_status);</div><div class='add'>+</div><div class='add'>+		if (!(intr_status &amp; DEFAULT_INTR))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		handled = 1;</div><div class='add'>+</div><div class='add'>+		if (intr_status &amp; (IntrRxDMADone)) {</div><div class='add'>+			iowrite16(DEFAULT_INTR &amp; ~(IntrRxDone|IntrRxDMADone),</div><div class='add'>+					ioaddr + IntrEnable);</div><div class='add'>+			if (np-&gt;budget &lt; 0)</div><div class='add'>+				np-&gt;budget = RX_BUDGET;</div><div class='add'>+			tasklet_schedule(&amp;np-&gt;rx_tasklet);</div><div class='add'>+		}</div><div class='add'>+		if (intr_status &amp; (IntrTxDone | IntrDrvRqst)) {</div><div class='add'>+			tx_status = ioread16 (ioaddr + TxStatus);</div><div class='add'>+			for (tx_cnt=32; tx_status &amp; 0x80; --tx_cnt) {</div><div class='add'>+				if (netif_msg_tx_done(np))</div><div class='add'>+					printk</div><div class='add'>+					    ("%s: Transmit status is %2.2x.\n",</div><div class='add'>+				     	dev-&gt;name, tx_status);</div><div class='add'>+				if (tx_status &amp; 0x1e) {</div><div class='add'>+					if (netif_msg_tx_err(np))</div><div class='add'>+						printk("%s: Transmit error status %4.4x.\n",</div><div class='add'>+							   dev-&gt;name, tx_status);</div><div class='add'>+					dev-&gt;stats.tx_errors++;</div><div class='add'>+					if (tx_status &amp; 0x10)</div><div class='add'>+						dev-&gt;stats.tx_fifo_errors++;</div><div class='add'>+					if (tx_status &amp; 0x08)</div><div class='add'>+						dev-&gt;stats.collisions++;</div><div class='add'>+					if (tx_status &amp; 0x04)</div><div class='add'>+						dev-&gt;stats.tx_fifo_errors++;</div><div class='add'>+					if (tx_status &amp; 0x02)</div><div class='add'>+						dev-&gt;stats.tx_window_errors++;</div><div class='add'>+</div><div class='add'>+					/*</div><div class='add'>+					** This reset has been verified on</div><div class='add'>+					** DFE-580TX boards ! phdm@macqel.be.</div><div class='add'>+					*/</div><div class='add'>+					if (tx_status &amp; 0x10) {	/* TxUnderrun */</div><div class='add'>+						/* Restart Tx FIFO and transmitter */</div><div class='add'>+						sundance_reset(dev, (NetworkReset|FIFOReset|TxReset) &lt;&lt; 16);</div><div class='add'>+						/* No need to reset the Tx pointer here */</div><div class='add'>+					}</div><div class='add'>+					/* Restart the Tx. Need to make sure tx enabled */</div><div class='add'>+					i = 10;</div><div class='add'>+					do {</div><div class='add'>+						iowrite16(ioread16(ioaddr + MACCtrl1) | TxEnable, ioaddr + MACCtrl1);</div><div class='add'>+						if (ioread16(ioaddr + MACCtrl1) &amp; TxEnabled)</div><div class='add'>+							break;</div><div class='add'>+						mdelay(1);</div><div class='add'>+					} while (--i);</div><div class='add'>+				}</div><div class='add'>+				/* Yup, this is a documentation bug.  It cost me *hours*. */</div><div class='add'>+				iowrite16 (0, ioaddr + TxStatus);</div><div class='add'>+				if (tx_cnt &lt; 0) {</div><div class='add'>+					iowrite32(5000, ioaddr + DownCounter);</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+				tx_status = ioread16 (ioaddr + TxStatus);</div><div class='add'>+			}</div><div class='add'>+			hw_frame_id = (tx_status &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+		} else 	{</div><div class='add'>+			hw_frame_id = ioread8(ioaddr + TxFrameId);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (np-&gt;pci_dev-&gt;revision &gt;= 0x14) {</div><div class='add'>+			spin_lock(&amp;np-&gt;lock);</div><div class='add'>+			for (; np-&gt;cur_tx - np-&gt;dirty_tx &gt; 0; np-&gt;dirty_tx++) {</div><div class='add'>+				int entry = np-&gt;dirty_tx % TX_RING_SIZE;</div><div class='add'>+				struct sk_buff *skb;</div><div class='add'>+				int sw_frame_id;</div><div class='add'>+				sw_frame_id = (le32_to_cpu(</div><div class='add'>+					np-&gt;tx_ring[entry].status) &gt;&gt; 2) &amp; 0xff;</div><div class='add'>+				if (sw_frame_id == hw_frame_id &amp;&amp;</div><div class='add'>+					!(le32_to_cpu(np-&gt;tx_ring[entry].status)</div><div class='add'>+					&amp; 0x00010000))</div><div class='add'>+						break;</div><div class='add'>+				if (sw_frame_id == (hw_frame_id + 1) %</div><div class='add'>+					TX_RING_SIZE)</div><div class='add'>+						break;</div><div class='add'>+				skb = np-&gt;tx_skbuff[entry];</div><div class='add'>+				/* Free the original skb. */</div><div class='add'>+				dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+					le32_to_cpu(np-&gt;tx_ring[entry].frag.addr),</div><div class='add'>+					skb-&gt;len, DMA_TO_DEVICE);</div><div class='add'>+				dev_consume_skb_irq(np-&gt;tx_skbuff[entry]);</div><div class='add'>+				np-&gt;tx_skbuff[entry] = NULL;</div><div class='add'>+				np-&gt;tx_ring[entry].frag.addr = 0;</div><div class='add'>+				np-&gt;tx_ring[entry].frag.length = 0;</div><div class='add'>+			}</div><div class='add'>+			spin_unlock(&amp;np-&gt;lock);</div><div class='add'>+		} else {</div><div class='add'>+			spin_lock(&amp;np-&gt;lock);</div><div class='add'>+			for (; np-&gt;cur_tx - np-&gt;dirty_tx &gt; 0; np-&gt;dirty_tx++) {</div><div class='add'>+				int entry = np-&gt;dirty_tx % TX_RING_SIZE;</div><div class='add'>+				struct sk_buff *skb;</div><div class='add'>+				if (!(le32_to_cpu(np-&gt;tx_ring[entry].status)</div><div class='add'>+							&amp; 0x00010000))</div><div class='add'>+					break;</div><div class='add'>+				skb = np-&gt;tx_skbuff[entry];</div><div class='add'>+				/* Free the original skb. */</div><div class='add'>+				dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+					le32_to_cpu(np-&gt;tx_ring[entry].frag.addr),</div><div class='add'>+					skb-&gt;len, DMA_TO_DEVICE);</div><div class='add'>+				dev_consume_skb_irq(np-&gt;tx_skbuff[entry]);</div><div class='add'>+				np-&gt;tx_skbuff[entry] = NULL;</div><div class='add'>+				np-&gt;tx_ring[entry].frag.addr = 0;</div><div class='add'>+				np-&gt;tx_ring[entry].frag.length = 0;</div><div class='add'>+			}</div><div class='add'>+			spin_unlock(&amp;np-&gt;lock);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (netif_queue_stopped(dev) &amp;&amp;</div><div class='add'>+			np-&gt;cur_tx - np-&gt;dirty_tx &lt; TX_QUEUE_LEN - 4) {</div><div class='add'>+			/* The ring is no longer full, clear busy flag. */</div><div class='add'>+			netif_wake_queue (dev);</div><div class='add'>+		}</div><div class='add'>+		/* Abnormal error summary/uncommon events handlers. */</div><div class='add'>+		if (intr_status &amp; (IntrPCIErr | LinkChange | StatsMax))</div><div class='add'>+			netdev_error(dev, intr_status);</div><div class='add'>+	} while (0);</div><div class='add'>+	if (netif_msg_intr(np))</div><div class='add'>+		printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",</div><div class='add'>+			   dev-&gt;name, ioread16(ioaddr + IntrStatus));</div><div class='add'>+	return IRQ_RETVAL(handled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rx_poll(struct tasklet_struct *t)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = from_tasklet(np, t, rx_tasklet);</div><div class='add'>+	struct net_device *dev = np-&gt;ndev;</div><div class='add'>+	int entry = np-&gt;cur_rx % RX_RING_SIZE;</div><div class='add'>+	int boguscnt = np-&gt;budget;</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	int received = 0;</div><div class='add'>+</div><div class='add'>+	/* If EOP is set on the next entry, it's a new packet. Send it up. */</div><div class='add'>+	while (1) {</div><div class='add'>+		struct netdev_desc *desc = &amp;(np-&gt;rx_ring[entry]);</div><div class='add'>+		u32 frame_status = le32_to_cpu(desc-&gt;status);</div><div class='add'>+		int pkt_len;</div><div class='add'>+</div><div class='add'>+		if (--boguscnt &lt; 0) {</div><div class='add'>+			goto not_done;</div><div class='add'>+		}</div><div class='add'>+		if (!(frame_status &amp; DescOwn))</div><div class='add'>+			break;</div><div class='add'>+		pkt_len = frame_status &amp; 0x1fff;	/* Chip omits the CRC. */</div><div class='add'>+		if (netif_msg_rx_status(np))</div><div class='add'>+			printk(KERN_DEBUG "  netdev_rx() status was %8.8x.\n",</div><div class='add'>+				   frame_status);</div><div class='add'>+		if (frame_status &amp; 0x001f4000) {</div><div class='add'>+			/* There was a error. */</div><div class='add'>+			if (netif_msg_rx_err(np))</div><div class='add'>+				printk(KERN_DEBUG "  netdev_rx() Rx error was %8.8x.\n",</div><div class='add'>+					   frame_status);</div><div class='add'>+			dev-&gt;stats.rx_errors++;</div><div class='add'>+			if (frame_status &amp; 0x00100000)</div><div class='add'>+				dev-&gt;stats.rx_length_errors++;</div><div class='add'>+			if (frame_status &amp; 0x00010000)</div><div class='add'>+				dev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+			if (frame_status &amp; 0x00060000)</div><div class='add'>+				dev-&gt;stats.rx_frame_errors++;</div><div class='add'>+			if (frame_status &amp; 0x00080000)</div><div class='add'>+				dev-&gt;stats.rx_crc_errors++;</div><div class='add'>+			if (frame_status &amp; 0x00100000) {</div><div class='add'>+				printk(KERN_WARNING "%s: Oversized Ethernet frame,"</div><div class='add'>+					   " status %8.8x.\n",</div><div class='add'>+					   dev-&gt;name, frame_status);</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			struct sk_buff *skb;</div><div class='add'>+#ifndef final_version</div><div class='add'>+			if (netif_msg_rx_status(np))</div><div class='add'>+				printk(KERN_DEBUG "  netdev_rx() normal Rx pkt length %d"</div><div class='add'>+					   ", bogus_cnt %d.\n",</div><div class='add'>+					   pkt_len, boguscnt);</div><div class='add'>+#endif</div><div class='add'>+			/* Check if the packet is long enough to accept without copying</div><div class='add'>+			   to a minimally-sized skbuff. */</div><div class='add'>+			if (pkt_len &lt; rx_copybreak &amp;&amp;</div><div class='add'>+			    (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) {</div><div class='add'>+				skb_reserve(skb, 2);	/* 16 byte align the IP header */</div><div class='add'>+				dma_sync_single_for_cpu(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+						le32_to_cpu(desc-&gt;frag.addr),</div><div class='add'>+						np-&gt;rx_buf_sz, DMA_FROM_DEVICE);</div><div class='add'>+				skb_copy_to_linear_data(skb, np-&gt;rx_skbuff[entry]-&gt;data, pkt_len);</div><div class='add'>+				dma_sync_single_for_device(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+						le32_to_cpu(desc-&gt;frag.addr),</div><div class='add'>+						np-&gt;rx_buf_sz, DMA_FROM_DEVICE);</div><div class='add'>+				skb_put(skb, pkt_len);</div><div class='add'>+			} else {</div><div class='add'>+				dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+					le32_to_cpu(desc-&gt;frag.addr),</div><div class='add'>+					np-&gt;rx_buf_sz, DMA_FROM_DEVICE);</div><div class='add'>+				skb_put(skb = np-&gt;rx_skbuff[entry], pkt_len);</div><div class='add'>+				np-&gt;rx_skbuff[entry] = NULL;</div><div class='add'>+			}</div><div class='add'>+			skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='add'>+			/* Note: checksum -&gt; skb-&gt;ip_summed = CHECKSUM_UNNECESSARY; */</div><div class='add'>+			netif_rx(skb);</div><div class='add'>+		}</div><div class='add'>+		entry = (entry + 1) % RX_RING_SIZE;</div><div class='add'>+		received++;</div><div class='add'>+	}</div><div class='add'>+	np-&gt;cur_rx = entry;</div><div class='add'>+	refill_rx (dev);</div><div class='add'>+	np-&gt;budget -= received;</div><div class='add'>+	iowrite16(DEFAULT_INTR, ioaddr + IntrEnable);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+not_done:</div><div class='add'>+	np-&gt;cur_rx = entry;</div><div class='add'>+	refill_rx (dev);</div><div class='add'>+	if (!received)</div><div class='add'>+		received = 1;</div><div class='add'>+	np-&gt;budget -= received;</div><div class='add'>+	if (np-&gt;budget &lt;= 0)</div><div class='add'>+		np-&gt;budget = RX_BUDGET;</div><div class='add'>+	tasklet_schedule(&amp;np-&gt;rx_tasklet);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void refill_rx (struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	int entry;</div><div class='add'>+</div><div class='add'>+	/* Refill the Rx ring buffers. */</div><div class='add'>+	for (;(np-&gt;cur_rx - np-&gt;dirty_rx + RX_RING_SIZE) % RX_RING_SIZE &gt; 0;</div><div class='add'>+		np-&gt;dirty_rx = (np-&gt;dirty_rx + 1) % RX_RING_SIZE) {</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+		dma_addr_t addr;</div><div class='add'>+</div><div class='add'>+		entry = np-&gt;dirty_rx % RX_RING_SIZE;</div><div class='add'>+		if (np-&gt;rx_skbuff[entry] == NULL) {</div><div class='add'>+			skb = netdev_alloc_skb(dev, np-&gt;rx_buf_sz + 2);</div><div class='add'>+			np-&gt;rx_skbuff[entry] = skb;</div><div class='add'>+			if (skb == NULL)</div><div class='add'>+				break;		/* Better luck next round. */</div><div class='add'>+			skb_reserve(skb, 2);	/* Align IP on 16 byte boundaries */</div><div class='add'>+			addr = dma_map_single(&amp;np-&gt;pci_dev-&gt;dev, skb-&gt;data,</div><div class='add'>+					      np-&gt;rx_buf_sz, DMA_FROM_DEVICE);</div><div class='add'>+			if (dma_mapping_error(&amp;np-&gt;pci_dev-&gt;dev, addr)) {</div><div class='add'>+			    dev_kfree_skb_irq(skb);</div><div class='add'>+			    np-&gt;rx_skbuff[entry] = NULL;</div><div class='add'>+			    break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			np-&gt;rx_ring[entry].frag.addr = cpu_to_le32(addr);</div><div class='add'>+		}</div><div class='add'>+		/* Perhaps we need not reset this field. */</div><div class='add'>+		np-&gt;rx_ring[entry].frag.length =</div><div class='add'>+			cpu_to_le32(np-&gt;rx_buf_sz | LastFrag);</div><div class='add'>+		np-&gt;rx_ring[entry].status = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+static void netdev_error(struct net_device *dev, int intr_status)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	u16 mii_ctl, mii_advertise, mii_lpa;</div><div class='add'>+	int speed;</div><div class='add'>+</div><div class='add'>+	if (intr_status &amp; LinkChange) {</div><div class='add'>+		if (mdio_wait_link(dev, 10) == 0) {</div><div class='add'>+			printk(KERN_INFO "%s: Link up\n", dev-&gt;name);</div><div class='add'>+			if (np-&gt;an_enable) {</div><div class='add'>+				mii_advertise = mdio_read(dev, np-&gt;phys[0],</div><div class='add'>+							   MII_ADVERTISE);</div><div class='add'>+				mii_lpa = mdio_read(dev, np-&gt;phys[0], MII_LPA);</div><div class='add'>+				mii_advertise &amp;= mii_lpa;</div><div class='add'>+				printk(KERN_INFO "%s: Link changed: ",</div><div class='add'>+					dev-&gt;name);</div><div class='add'>+				if (mii_advertise &amp; ADVERTISE_100FULL) {</div><div class='add'>+					np-&gt;speed = 100;</div><div class='add'>+					printk("100Mbps, full duplex\n");</div><div class='add'>+				} else if (mii_advertise &amp; ADVERTISE_100HALF) {</div><div class='add'>+					np-&gt;speed = 100;</div><div class='add'>+					printk("100Mbps, half duplex\n");</div><div class='add'>+				} else if (mii_advertise &amp; ADVERTISE_10FULL) {</div><div class='add'>+					np-&gt;speed = 10;</div><div class='add'>+					printk("10Mbps, full duplex\n");</div><div class='add'>+				} else if (mii_advertise &amp; ADVERTISE_10HALF) {</div><div class='add'>+					np-&gt;speed = 10;</div><div class='add'>+					printk("10Mbps, half duplex\n");</div><div class='add'>+				} else</div><div class='add'>+					printk("\n");</div><div class='add'>+</div><div class='add'>+			} else {</div><div class='add'>+				mii_ctl = mdio_read(dev, np-&gt;phys[0], MII_BMCR);</div><div class='add'>+				speed = (mii_ctl &amp; BMCR_SPEED100) ? 100 : 10;</div><div class='add'>+				np-&gt;speed = speed;</div><div class='add'>+				printk(KERN_INFO "%s: Link changed: %dMbps ,",</div><div class='add'>+					dev-&gt;name, speed);</div><div class='add'>+				printk("%s duplex.\n",</div><div class='add'>+					(mii_ctl &amp; BMCR_FULLDPLX) ?</div><div class='add'>+						"full" : "half");</div><div class='add'>+			}</div><div class='add'>+			check_duplex(dev);</div><div class='add'>+			if (np-&gt;flowctrl &amp;&amp; np-&gt;mii_if.full_duplex) {</div><div class='add'>+				iowrite16(ioread16(ioaddr + MulticastFilter1+2) | 0x0200,</div><div class='add'>+					ioaddr + MulticastFilter1+2);</div><div class='add'>+				iowrite16(ioread16(ioaddr + MACCtrl0) | EnbFlowCtrl,</div><div class='add'>+					ioaddr + MACCtrl0);</div><div class='add'>+			}</div><div class='add'>+			netif_carrier_on(dev);</div><div class='add'>+		} else {</div><div class='add'>+			printk(KERN_INFO "%s: Link down\n", dev-&gt;name);</div><div class='add'>+			netif_carrier_off(dev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (intr_status &amp; StatsMax) {</div><div class='add'>+		get_stats(dev);</div><div class='add'>+	}</div><div class='add'>+	if (intr_status &amp; IntrPCIErr) {</div><div class='add'>+		printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",</div><div class='add'>+			   dev-&gt;name, intr_status);</div><div class='add'>+		/* We must do a global reset of DMA to continue. */</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct net_device_stats *get_stats(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u8 late_coll, single_coll, mult_coll;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;np-&gt;statlock, flags);</div><div class='add'>+	/* The chip only need report frame silently dropped. */</div><div class='add'>+	dev-&gt;stats.rx_missed_errors	+= ioread8(ioaddr + RxMissed);</div><div class='add'>+	dev-&gt;stats.tx_packets += ioread16(ioaddr + TxFramesOK);</div><div class='add'>+	dev-&gt;stats.rx_packets += ioread16(ioaddr + RxFramesOK);</div><div class='add'>+	dev-&gt;stats.tx_carrier_errors += ioread8(ioaddr + StatsCarrierError);</div><div class='add'>+</div><div class='add'>+	mult_coll = ioread8(ioaddr + StatsMultiColl);</div><div class='add'>+	np-&gt;xstats.tx_multiple_collisions += mult_coll;</div><div class='add'>+	single_coll = ioread8(ioaddr + StatsOneColl);</div><div class='add'>+	np-&gt;xstats.tx_single_collisions += single_coll;</div><div class='add'>+	late_coll = ioread8(ioaddr + StatsLateColl);</div><div class='add'>+	np-&gt;xstats.tx_late_collisions += late_coll;</div><div class='add'>+	dev-&gt;stats.collisions += mult_coll</div><div class='add'>+		+ single_coll</div><div class='add'>+		+ late_coll;</div><div class='add'>+</div><div class='add'>+	np-&gt;xstats.tx_deferred += ioread8(ioaddr + StatsTxDefer);</div><div class='add'>+	np-&gt;xstats.tx_deferred_excessive += ioread8(ioaddr + StatsTxXSDefer);</div><div class='add'>+	np-&gt;xstats.tx_aborted += ioread8(ioaddr + StatsTxAbort);</div><div class='add'>+	np-&gt;xstats.tx_bcasts += ioread8(ioaddr + StatsBcastTx);</div><div class='add'>+	np-&gt;xstats.rx_bcasts += ioread8(ioaddr + StatsBcastRx);</div><div class='add'>+	np-&gt;xstats.tx_mcasts += ioread8(ioaddr + StatsMcastTx);</div><div class='add'>+	np-&gt;xstats.rx_mcasts += ioread8(ioaddr + StatsMcastRx);</div><div class='add'>+</div><div class='add'>+	dev-&gt;stats.tx_bytes += ioread16(ioaddr + TxOctetsLow);</div><div class='add'>+	dev-&gt;stats.tx_bytes += ioread16(ioaddr + TxOctetsHigh) &lt;&lt; 16;</div><div class='add'>+	dev-&gt;stats.rx_bytes += ioread16(ioaddr + RxOctetsLow);</div><div class='add'>+	dev-&gt;stats.rx_bytes += ioread16(ioaddr + RxOctetsHigh) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;np-&gt;statlock, flags);</div><div class='add'>+</div><div class='add'>+	return &amp;dev-&gt;stats;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_rx_mode(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	u16 mc_filter[4];			/* Multicast hash filter */</div><div class='add'>+	u32 rx_mode;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;flags &amp; IFF_PROMISC) {			/* Set promiscuous. */</div><div class='add'>+		memset(mc_filter, 0xff, sizeof(mc_filter));</div><div class='add'>+		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptAll | AcceptMyPhys;</div><div class='add'>+	} else if ((netdev_mc_count(dev) &gt; multicast_filter_limit) ||</div><div class='add'>+		   (dev-&gt;flags &amp; IFF_ALLMULTI)) {</div><div class='add'>+		/* Too many to match, or accept all multicasts. */</div><div class='add'>+		memset(mc_filter, 0xff, sizeof(mc_filter));</div><div class='add'>+		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;</div><div class='add'>+	} else if (!netdev_mc_empty(dev)) {</div><div class='add'>+		struct netdev_hw_addr *ha;</div><div class='add'>+		int bit;</div><div class='add'>+		int index;</div><div class='add'>+		int crc;</div><div class='add'>+		memset (mc_filter, 0, sizeof (mc_filter));</div><div class='add'>+		netdev_for_each_mc_addr(ha, dev) {</div><div class='add'>+			crc = ether_crc_le(ETH_ALEN, ha-&gt;addr);</div><div class='add'>+			for (index=0, bit=0; bit &lt; 6; bit++, crc &lt;&lt;= 1)</div><div class='add'>+				if (crc &amp; 0x80000000) index |= 1 &lt;&lt; bit;</div><div class='add'>+			mc_filter[index/16] |= (1 &lt;&lt; (index % 16));</div><div class='add'>+		}</div><div class='add'>+		rx_mode = AcceptBroadcast | AcceptMultiHash | AcceptMyPhys;</div><div class='add'>+	} else {</div><div class='add'>+		iowrite8(AcceptBroadcast | AcceptMyPhys, ioaddr + RxMode);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (np-&gt;mii_if.full_duplex &amp;&amp; np-&gt;flowctrl)</div><div class='add'>+		mc_filter[3] |= 0x0200;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++)</div><div class='add'>+		iowrite16(mc_filter[i], ioaddr + MulticastFilter0 + i*2);</div><div class='add'>+	iowrite8(rx_mode, ioaddr + RxMode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __set_mac_addr(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	u16 addr16;</div><div class='add'>+</div><div class='add'>+	addr16 = (dev-&gt;dev_addr[0] | (dev-&gt;dev_addr[1] &lt;&lt; 8));</div><div class='add'>+	iowrite16(addr16, np-&gt;base + StationAddr);</div><div class='add'>+	addr16 = (dev-&gt;dev_addr[2] | (dev-&gt;dev_addr[3] &lt;&lt; 8));</div><div class='add'>+	iowrite16(addr16, np-&gt;base + StationAddr+2);</div><div class='add'>+	addr16 = (dev-&gt;dev_addr[4] | (dev-&gt;dev_addr[5] &lt;&lt; 8));</div><div class='add'>+	iowrite16(addr16, np-&gt;base + StationAddr+4);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Invoked with rtnl_lock held */</div><div class='add'>+static int sundance_set_mac_addr(struct net_device *dev, void *data)</div><div class='add'>+{</div><div class='add'>+	const struct sockaddr *addr = data;</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(addr-&gt;sa_data))</div><div class='add'>+		return -EADDRNOTAVAIL;</div><div class='add'>+	eth_hw_addr_set(dev, addr-&gt;sa_data);</div><div class='add'>+	__set_mac_addr(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct {</div><div class='add'>+	const char name[ETH_GSTRING_LEN];</div><div class='add'>+} sundance_stats[] = {</div><div class='add'>+	{ "tx_multiple_collisions" },</div><div class='add'>+	{ "tx_single_collisions" },</div><div class='add'>+	{ "tx_late_collisions" },</div><div class='add'>+	{ "tx_deferred" },</div><div class='add'>+	{ "tx_deferred_excessive" },</div><div class='add'>+	{ "tx_aborted" },</div><div class='add'>+	{ "tx_bcasts" },</div><div class='add'>+	{ "rx_bcasts" },</div><div class='add'>+	{ "tx_mcasts" },</div><div class='add'>+	{ "rx_mcasts" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int check_if_running(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (!netif_running(dev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;bus_info, pci_name(np-&gt;pci_dev), sizeof(info-&gt;bus_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_link_ksettings(struct net_device *dev,</div><div class='add'>+			      struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	spin_lock_irq(&amp;np-&gt;lock);</div><div class='add'>+	mii_ethtool_get_link_ksettings(&amp;np-&gt;mii_if, cmd);</div><div class='add'>+	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_link_ksettings(struct net_device *dev,</div><div class='add'>+			      const struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	int res;</div><div class='add'>+	spin_lock_irq(&amp;np-&gt;lock);</div><div class='add'>+	res = mii_ethtool_set_link_ksettings(&amp;np-&gt;mii_if, cmd);</div><div class='add'>+	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nway_reset(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	return mii_nway_restart(&amp;np-&gt;mii_if);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_link(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	return mii_link_ok(&amp;np-&gt;mii_if);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_msglevel(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	return np-&gt;msg_enable;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_msglevel(struct net_device *dev, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	np-&gt;msg_enable = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void get_strings(struct net_device *dev, u32 stringset,</div><div class='add'>+		u8 *data)</div><div class='add'>+{</div><div class='add'>+	if (stringset == ETH_SS_STATS)</div><div class='add'>+		memcpy(data, sundance_stats, sizeof(sundance_stats));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_sset_count(struct net_device *dev, int sset)</div><div class='add'>+{</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		return ARRAY_SIZE(sundance_stats);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void get_ethtool_stats(struct net_device *dev,</div><div class='add'>+		struct ethtool_stats *stats, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	get_stats(dev);</div><div class='add'>+	data[i++] = np-&gt;xstats.tx_multiple_collisions;</div><div class='add'>+	data[i++] = np-&gt;xstats.tx_single_collisions;</div><div class='add'>+	data[i++] = np-&gt;xstats.tx_late_collisions;</div><div class='add'>+	data[i++] = np-&gt;xstats.tx_deferred;</div><div class='add'>+	data[i++] = np-&gt;xstats.tx_deferred_excessive;</div><div class='add'>+	data[i++] = np-&gt;xstats.tx_aborted;</div><div class='add'>+	data[i++] = np-&gt;xstats.tx_bcasts;</div><div class='add'>+	data[i++] = np-&gt;xstats.rx_bcasts;</div><div class='add'>+	data[i++] = np-&gt;xstats.tx_mcasts;</div><div class='add'>+	data[i++] = np-&gt;xstats.rx_mcasts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+</div><div class='add'>+static void sundance_get_wol(struct net_device *dev,</div><div class='add'>+		struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	u8 wol_bits;</div><div class='add'>+</div><div class='add'>+	wol-&gt;wolopts = 0;</div><div class='add'>+</div><div class='add'>+	wol-&gt;supported = (WAKE_PHY | WAKE_MAGIC);</div><div class='add'>+	if (!np-&gt;wol_enabled)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	wol_bits = ioread8(ioaddr + WakeEvent);</div><div class='add'>+	if (wol_bits &amp; MagicPktEnable)</div><div class='add'>+		wol-&gt;wolopts |= WAKE_MAGIC;</div><div class='add'>+	if (wol_bits &amp; LinkEventEnable)</div><div class='add'>+		wol-&gt;wolopts |= WAKE_PHY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sundance_set_wol(struct net_device *dev,</div><div class='add'>+	struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	u8 wol_bits;</div><div class='add'>+</div><div class='add'>+	if (!device_can_wakeup(&amp;np-&gt;pci_dev-&gt;dev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	np-&gt;wol_enabled = !!(wol-&gt;wolopts);</div><div class='add'>+	wol_bits = ioread8(ioaddr + WakeEvent);</div><div class='add'>+	wol_bits &amp;= ~(WakePktEnable | MagicPktEnable |</div><div class='add'>+			LinkEventEnable | WolEnable);</div><div class='add'>+</div><div class='add'>+	if (np-&gt;wol_enabled) {</div><div class='add'>+		if (wol-&gt;wolopts &amp; WAKE_MAGIC)</div><div class='add'>+			wol_bits |= (MagicPktEnable | WolEnable);</div><div class='add'>+		if (wol-&gt;wolopts &amp; WAKE_PHY)</div><div class='add'>+			wol_bits |= (LinkEventEnable | WolEnable);</div><div class='add'>+	}</div><div class='add'>+	iowrite8(wol_bits, ioaddr + WakeEvent);</div><div class='add'>+</div><div class='add'>+	device_set_wakeup_enable(&amp;np-&gt;pci_dev-&gt;dev, np-&gt;wol_enabled);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+#define sundance_get_wol NULL</div><div class='add'>+#define sundance_set_wol NULL</div><div class='add'>+#endif /* CONFIG_PM */</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops ethtool_ops = {</div><div class='add'>+	.begin = check_if_running,</div><div class='add'>+	.get_drvinfo = get_drvinfo,</div><div class='add'>+	.nway_reset = nway_reset,</div><div class='add'>+	.get_link = get_link,</div><div class='add'>+	.get_wol = sundance_get_wol,</div><div class='add'>+	.set_wol = sundance_set_wol,</div><div class='add'>+	.get_msglevel = get_msglevel,</div><div class='add'>+	.set_msglevel = set_msglevel,</div><div class='add'>+	.get_strings = get_strings,</div><div class='add'>+	.get_sset_count = get_sset_count,</div><div class='add'>+	.get_ethtool_stats = get_ethtool_stats,</div><div class='add'>+	.get_link_ksettings = get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = set_link_ksettings,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(dev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;np-&gt;lock);</div><div class='add'>+	rc = generic_mii_ioctl(&amp;np-&gt;mii_if, if_mii(rq), cmd, NULL);</div><div class='add'>+	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netdev_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Wait and kill tasklet */</div><div class='add'>+	tasklet_kill(&amp;np-&gt;rx_tasklet);</div><div class='add'>+	tasklet_kill(&amp;np-&gt;tx_tasklet);</div><div class='add'>+	np-&gt;cur_tx = 0;</div><div class='add'>+	np-&gt;dirty_tx = 0;</div><div class='add'>+	np-&gt;cur_task = 0;</div><div class='add'>+	np-&gt;last_tx = NULL;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_ifdown(np)) {</div><div class='add'>+		printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %2.2x "</div><div class='add'>+			   "Rx %4.4x Int %2.2x.\n",</div><div class='add'>+			   dev-&gt;name, ioread8(ioaddr + TxStatus),</div><div class='add'>+			   ioread32(ioaddr + RxStatus), ioread16(ioaddr + IntrStatus));</div><div class='add'>+		printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d,  Rx %d / %d.\n",</div><div class='add'>+			   dev-&gt;name, np-&gt;cur_tx, np-&gt;dirty_tx, np-&gt;cur_rx, np-&gt;dirty_rx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable interrupts by clearing the interrupt mask. */</div><div class='add'>+	iowrite16(0x0000, ioaddr + IntrEnable);</div><div class='add'>+</div><div class='add'>+	/* Disable Rx and Tx DMA for safely release resource */</div><div class='add'>+	iowrite32(0x500, ioaddr + DMACtrl);</div><div class='add'>+</div><div class='add'>+	/* Stop the chip's Tx and Rx processes. */</div><div class='add'>+	iowrite16(TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl1);</div><div class='add'>+</div><div class='add'>+	for (i = 2000; i &gt; 0; i--) {</div><div class='add'>+		if ((ioread32(ioaddr + DMACtrl) &amp; 0xc000) == 0)</div><div class='add'>+			break;</div><div class='add'>+		mdelay(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iowrite16(GlobalReset | DMAReset | FIFOReset | NetworkReset,</div><div class='add'>+			ioaddr + ASIC_HI_WORD(ASICCtrl));</div><div class='add'>+</div><div class='add'>+	for (i = 2000; i &gt; 0; i--) {</div><div class='add'>+		if ((ioread16(ioaddr + ASIC_HI_WORD(ASICCtrl)) &amp; ResetBusy) == 0)</div><div class='add'>+			break;</div><div class='add'>+		mdelay(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#ifdef __i386__</div><div class='add'>+	if (netif_msg_hw(np)) {</div><div class='add'>+		printk(KERN_DEBUG "  Tx ring at %8.8x:\n",</div><div class='add'>+			   (int)(np-&gt;tx_ring_dma));</div><div class='add'>+		for (i = 0; i &lt; TX_RING_SIZE; i++)</div><div class='add'>+			printk(KERN_DEBUG " #%d desc. %4.4x %8.8x %8.8x.\n",</div><div class='add'>+				   i, np-&gt;tx_ring[i].status, np-&gt;tx_ring[i].frag.addr,</div><div class='add'>+				   np-&gt;tx_ring[i].frag.length);</div><div class='add'>+		printk(KERN_DEBUG "  Rx ring %8.8x:\n",</div><div class='add'>+			   (int)(np-&gt;rx_ring_dma));</div><div class='add'>+		for (i = 0; i &lt; /*RX_RING_SIZE*/4 ; i++) {</div><div class='add'>+			printk(KERN_DEBUG " #%d desc. %4.4x %4.4x %8.8x\n",</div><div class='add'>+				   i, np-&gt;rx_ring[i].status, np-&gt;rx_ring[i].frag.addr,</div><div class='add'>+				   np-&gt;rx_ring[i].frag.length);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#endif /* __i386__ debugging only */</div><div class='add'>+</div><div class='add'>+	free_irq(np-&gt;pci_dev-&gt;irq, dev);</div><div class='add'>+</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;timer);</div><div class='add'>+</div><div class='add'>+	/* Free all the skbuffs in the Rx queue. */</div><div class='add'>+	for (i = 0; i &lt; RX_RING_SIZE; i++) {</div><div class='add'>+		np-&gt;rx_ring[i].status = 0;</div><div class='add'>+		skb = np-&gt;rx_skbuff[i];</div><div class='add'>+		if (skb) {</div><div class='add'>+			dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+				le32_to_cpu(np-&gt;rx_ring[i].frag.addr),</div><div class='add'>+				np-&gt;rx_buf_sz, DMA_FROM_DEVICE);</div><div class='add'>+			dev_kfree_skb(skb);</div><div class='add'>+			np-&gt;rx_skbuff[i] = NULL;</div><div class='add'>+		}</div><div class='add'>+		np-&gt;rx_ring[i].frag.addr = cpu_to_le32(0xBADF00D0); /* poison */</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; TX_RING_SIZE; i++) {</div><div class='add'>+		np-&gt;tx_ring[i].next_desc = 0;</div><div class='add'>+		skb = np-&gt;tx_skbuff[i];</div><div class='add'>+		if (skb) {</div><div class='add'>+			dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+				le32_to_cpu(np-&gt;tx_ring[i].frag.addr),</div><div class='add'>+				skb-&gt;len, DMA_TO_DEVICE);</div><div class='add'>+			dev_kfree_skb(skb);</div><div class='add'>+			np-&gt;tx_skbuff[i] = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sundance_remove1(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (dev) {</div><div class='add'>+	    struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	    unregister_netdev(dev);</div><div class='add'>+	    dma_free_coherent(&amp;pdev-&gt;dev, RX_TOTAL_SIZE,</div><div class='add'>+		    np-&gt;rx_ring, np-&gt;rx_ring_dma);</div><div class='add'>+	    dma_free_coherent(&amp;pdev-&gt;dev, TX_TOTAL_SIZE,</div><div class='add'>+		    np-&gt;tx_ring, np-&gt;tx_ring_dma);</div><div class='add'>+	    pci_iounmap(pdev, np-&gt;base);</div><div class='add'>+	    pci_release_regions(pdev);</div><div class='add'>+	    free_netdev(dev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused sundance_suspend(struct device *dev_d)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(dev_d);</div><div class='add'>+	struct netdev_private *np = netdev_priv(dev);</div><div class='add'>+	void __iomem *ioaddr = np-&gt;base;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netdev_close(dev);</div><div class='add'>+	netif_device_detach(dev);</div><div class='add'>+</div><div class='add'>+	if (np-&gt;wol_enabled) {</div><div class='add'>+		iowrite8(AcceptBroadcast | AcceptMyPhys, ioaddr + RxMode);</div><div class='add'>+		iowrite16(RxEnable, ioaddr + MACCtrl1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	device_set_wakeup_enable(dev_d, np-&gt;wol_enabled);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused sundance_resume(struct device *dev_d)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(dev_d);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = netdev_open(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		printk(KERN_ERR "%s: Can't resume interface!\n",</div><div class='add'>+				dev-&gt;name);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_device_attach(dev);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(sundance_pm_ops, sundance_suspend, sundance_resume);</div><div class='add'>+</div><div class='add'>+static struct pci_driver sundance_driver = {</div><div class='add'>+	.name		= DRV_NAME,</div><div class='add'>+	.id_table	= sundance_pci_tbl,</div><div class='add'>+	.probe		= sundance_probe1,</div><div class='add'>+	.remove		= sundance_remove1,</div><div class='add'>+	.driver.pm	= &amp;sundance_pm_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_pci_driver(sundance_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/ec_bhf.c b/drivers/net/ethernet/ec_bhf.c<br/>index 44af1d13d931..67275aa4f65b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ec_bhf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ec_bhf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ec_bhf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ec_bhf.c</a></div><div class='hunk'>@@ -416,8 +416,7 @@ static int ec_bhf_open(struct net_device *net_dev)</div><div class='ctx'> </div><div class='ctx'> 	netif_start_queue(net_dev);</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;priv-&gt;hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-	priv-&gt;hrtimer.function = ec_bhf_timer_fun;</div><div class='add'>+	hrtimer_setup(&amp;priv-&gt;hrtimer, ec_bhf_timer_fun, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='ctx'> 	hrtimer_start(&amp;priv-&gt;hrtimer, polling_frequency, HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be.h b/drivers/net/ethernet/emulex/benet/be.h<br/>index e48b861e4ce1..270ff9aab335 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/emulex/benet/be.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/emulex/benet/be.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/emulex/benet/be.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/emulex/benet/be.h</a></div><div class='hunk'>@@ -562,7 +562,7 @@ struct be_adapter {</div><div class='ctx'> 	struct be_dma_mem mbox_mem_alloced;</div><div class='ctx'> </div><div class='ctx'> 	struct be_mcc_obj mcc_obj;</div><div class='del'>-	struct mutex mcc_lock;	/* For serializing mcc cmds to BE card */</div><div class='add'>+	spinlock_t mcc_lock;	/* For serializing mcc cmds to BE card */</div><div class='ctx'> 	spinlock_t mcc_cq_lock;</div><div class='ctx'> </div><div class='ctx'> 	u16 cfg_num_rx_irqs;		/* configured via set-channels */</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_cmds.c b/drivers/net/ethernet/emulex/benet/be_cmds.c<br/>index 61adcebeef01..bb5d2fa15736 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/emulex/benet/be_cmds.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/emulex/benet/be_cmds.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/emulex/benet/be_cmds.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/emulex/benet/be_cmds.c</a></div><div class='hunk'>@@ -575,7 +575,7 @@ int be_process_mcc(struct be_adapter *adapter)</div><div class='ctx'> /* Wait till no more pending mcc requests are present */</div><div class='ctx'> static int be_mcc_wait_compl(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-#define mcc_timeout		12000 /* 12s timeout */</div><div class='add'>+#define mcc_timeout		120000 /* 12s timeout */</div><div class='ctx'> 	int i, status = 0;</div><div class='ctx'> 	struct be_mcc_obj *mcc_obj = &amp;adapter-&gt;mcc_obj;</div><div class='ctx'> </div><div class='hunk'>@@ -589,7 +589,7 @@ static int be_mcc_wait_compl(struct be_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		if (atomic_read(&amp;mcc_obj-&gt;q.used) == 0)</div><div class='ctx'> 			break;</div><div class='del'>-		usleep_range(500, 1000);</div><div class='add'>+		udelay(100);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (i == mcc_timeout) {</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "FW not responding\n");</div><div class='hunk'>@@ -866,7 +866,7 @@ static bool use_mcc(struct be_adapter *adapter)</div><div class='ctx'> static int be_cmd_lock(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	if (use_mcc(adapter)) {</div><div class='del'>-		mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+		spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		return mutex_lock_interruptible(&amp;adapter-&gt;mbox_lock);</div><div class='hunk'>@@ -877,7 +877,7 @@ static int be_cmd_lock(struct be_adapter *adapter)</div><div class='ctx'> static void be_cmd_unlock(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	if (use_mcc(adapter))</div><div class='del'>-		return mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+		return spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	else</div><div class='ctx'> 		return mutex_unlock(&amp;adapter-&gt;mbox_lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -1047,7 +1047,7 @@ int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,</div><div class='ctx'> 	struct be_cmd_req_mac_query *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1076,7 +1076,7 @@ int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1088,7 +1088,7 @@ int be_cmd_pmac_add(struct be_adapter *adapter, const u8 *mac_addr,</div><div class='ctx'> 	struct be_cmd_req_pmac_add *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1113,7 +1113,7 @@ int be_cmd_pmac_add(struct be_adapter *adapter, const u8 *mac_addr,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (base_status(status) == MCC_STATUS_UNAUTHORIZED_REQUEST)</div><div class='ctx'> 		status = -EPERM;</div><div class='hunk'>@@ -1131,7 +1131,7 @@ int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom)</div><div class='ctx'> 	if (pmac_id == -1)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1151,7 +1151,7 @@ int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id, u32 dom)</div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1414,7 +1414,7 @@ int be_cmd_rxq_create(struct be_adapter *adapter,</div><div class='ctx'> 	struct be_dma_mem *q_mem = &amp;rxq-&gt;dma_mem;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1444,7 +1444,7 @@ int be_cmd_rxq_create(struct be_adapter *adapter,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1508,7 +1508,7 @@ int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q)</div><div class='ctx'> 	struct be_cmd_req_q_destroy *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1525,7 +1525,7 @@ int be_cmd_rxq_destroy(struct be_adapter *adapter, struct be_queue_info *q)</div><div class='ctx'> 	q-&gt;created = false;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1593,7 +1593,7 @@ int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd)</div><div class='ctx'> 	struct be_cmd_req_hdr *hdr;</div><div class='ctx'> 	int status = 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1609,7 +1609,7 @@ int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd)</div><div class='ctx'> 	/* version 1 of the cmd is not supported only by BE2 */</div><div class='ctx'> 	if (BE2_chip(adapter))</div><div class='ctx'> 		hdr-&gt;version = 0;</div><div class='del'>-	if (BE3_chip(adapter) || lancer_chip(adapter))</div><div class='add'>+	else if (BE3_chip(adapter) || lancer_chip(adapter))</div><div class='ctx'> 		hdr-&gt;version = 1;</div><div class='ctx'> 	else</div><div class='ctx'> 		hdr-&gt;version = 2;</div><div class='hunk'>@@ -1621,7 +1621,7 @@ int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd)</div><div class='ctx'> 	adapter-&gt;stats_cmd_sent = true;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1637,7 +1637,7 @@ int lancer_cmd_get_pport_stats(struct be_adapter *adapter,</div><div class='ctx'> 			    CMD_SUBSYSTEM_ETH))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1660,7 +1660,7 @@ int lancer_cmd_get_pport_stats(struct be_adapter *adapter,</div><div class='ctx'> 	adapter-&gt;stats_cmd_sent = true;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1697,7 +1697,7 @@ int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,</div><div class='ctx'> 	struct be_cmd_req_link_status *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (link_status)</div><div class='ctx'> 		*link_status = LINK_DOWN;</div><div class='hunk'>@@ -1736,7 +1736,7 @@ int be_cmd_link_status_query(struct be_adapter *adapter, u16 *link_speed,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1747,7 +1747,7 @@ int be_cmd_get_die_temperature(struct be_adapter *adapter)</div><div class='ctx'> 	struct be_cmd_req_get_cntl_addnl_attribs *req;</div><div class='ctx'> 	int status = 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1762,7 +1762,7 @@ int be_cmd_get_die_temperature(struct be_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	status = be_mcc_notify(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1811,7 +1811,7 @@ int be_cmd_get_fat_dump(struct be_adapter *adapter, u32 buf_len, void *buf)</div><div class='ctx'> 	if (!get_fat_cmd.va)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	while (total_size) {</div><div class='ctx'> 		buf_size = min(total_size, (u32)60 * 1024);</div><div class='hunk'>@@ -1849,9 +1849,9 @@ int be_cmd_get_fat_dump(struct be_adapter *adapter, u32 buf_len, void *buf)</div><div class='ctx'> 		log_offset += buf_size;</div><div class='ctx'> 	}</div><div class='ctx'> err:</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	dma_free_coherent(&amp;adapter-&gt;pdev-&gt;dev, get_fat_cmd.size,</div><div class='ctx'> 			  get_fat_cmd.va, get_fat_cmd.dma);</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1862,7 +1862,7 @@ int be_cmd_get_fw_ver(struct be_adapter *adapter)</div><div class='ctx'> 	struct be_cmd_req_get_fw_version *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1885,7 +1885,7 @@ int be_cmd_get_fw_ver(struct be_adapter *adapter)</div><div class='ctx'> 			sizeof(adapter-&gt;fw_on_flash));</div><div class='ctx'> 	}</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1899,7 +1899,7 @@ static int __be_cmd_modify_eqd(struct be_adapter *adapter,</div><div class='ctx'> 	struct be_cmd_req_modify_eq_delay *req;</div><div class='ctx'> 	int status = 0, i;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1922,7 +1922,7 @@ static int __be_cmd_modify_eqd(struct be_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	status = be_mcc_notify(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1949,7 +1949,7 @@ int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,</div><div class='ctx'> 	struct be_cmd_req_vlan_config *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -1971,7 +1971,7 @@ int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array,</div><div class='ctx'> </div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1982,7 +1982,7 @@ static int __be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value)</div><div class='ctx'> 	struct be_cmd_req_rx_filter *req = mem-&gt;va;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -2015,7 +2015,7 @@ static int __be_cmd_rx_filter(struct be_adapter *adapter, u32 flags, u32 value)</div><div class='ctx'> </div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2046,7 +2046,7 @@ int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc)</div><div class='ctx'> 			    CMD_SUBSYSTEM_COMMON))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -2066,7 +2066,7 @@ int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc)</div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (base_status(status) == MCC_STATUS_FEATURE_NOT_SUPPORTED)</div><div class='ctx'> 		return  -EOPNOTSUPP;</div><div class='hunk'>@@ -2085,7 +2085,7 @@ int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc)</div><div class='ctx'> 			    CMD_SUBSYSTEM_COMMON))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -2108,7 +2108,7 @@ int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2189,7 +2189,7 @@ int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,</div><div class='ctx'> 	if (!(be_if_cap_flags(adapter) &amp; BE_IF_FLAGS_RSS))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -2214,7 +2214,7 @@ int be_cmd_rss_config(struct be_adapter *adapter, u8 *rsstable,</div><div class='ctx'> </div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2226,7 +2226,7 @@ int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num,</div><div class='ctx'> 	struct be_cmd_req_enable_disable_beacon *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -2247,7 +2247,7 @@ int be_cmd_set_beacon_state(struct be_adapter *adapter, u8 port_num,</div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2258,7 +2258,7 @@ int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state)</div><div class='ctx'> 	struct be_cmd_req_get_beacon_state *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -2282,7 +2282,7 @@ int be_cmd_get_beacon_state(struct be_adapter *adapter, u8 port_num, u32 *state)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2306,7 +2306,7 @@ int be_cmd_read_port_transceiver_data(struct be_adapter *adapter,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -2328,7 +2328,7 @@ int be_cmd_read_port_transceiver_data(struct be_adapter *adapter,</div><div class='ctx'> 		memcpy(data, resp-&gt;page_data + off, len);</div><div class='ctx'> 	}</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	dma_free_coherent(&amp;adapter-&gt;pdev-&gt;dev, cmd.size, cmd.va, cmd.dma);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -2345,7 +2345,7 @@ static int lancer_cmd_write_object(struct be_adapter *adapter,</div><div class='ctx'> 	void *ctxt = NULL;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	adapter-&gt;flash_status = 0;</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='hunk'>@@ -2387,7 +2387,7 @@ static int lancer_cmd_write_object(struct be_adapter *adapter,</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto err_unlock;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!wait_for_completion_timeout(&amp;adapter-&gt;et_cmd_compl,</div><div class='ctx'> 					 msecs_to_jiffies(60000)))</div><div class='hunk'>@@ -2406,7 +2406,7 @@ static int lancer_cmd_write_object(struct be_adapter *adapter,</div><div class='ctx'> 	return status;</div><div class='ctx'> </div><div class='ctx'> err_unlock:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2460,7 +2460,7 @@ static int lancer_cmd_delete_object(struct be_adapter *adapter,</div><div class='ctx'> 	struct be_mcc_wrb *wrb;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -2478,7 +2478,7 @@ static int lancer_cmd_delete_object(struct be_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2491,7 +2491,7 @@ int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,</div><div class='ctx'> 	struct lancer_cmd_resp_read_object *resp;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -2525,7 +2525,7 @@ int lancer_cmd_read_object(struct be_adapter *adapter, struct be_dma_mem *cmd,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err_unlock:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2537,7 +2537,7 @@ static int be_cmd_write_flashrom(struct be_adapter *adapter,</div><div class='ctx'> 	struct be_cmd_write_flashrom *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	adapter-&gt;flash_status = 0;</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='hunk'>@@ -2562,7 +2562,7 @@ static int be_cmd_write_flashrom(struct be_adapter *adapter,</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto err_unlock;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!wait_for_completion_timeout(&amp;adapter-&gt;et_cmd_compl,</div><div class='ctx'> 					 msecs_to_jiffies(40000)))</div><div class='hunk'>@@ -2573,7 +2573,7 @@ static int be_cmd_write_flashrom(struct be_adapter *adapter,</div><div class='ctx'> 	return status;</div><div class='ctx'> </div><div class='ctx'> err_unlock:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2584,7 +2584,7 @@ static int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,</div><div class='ctx'> 	struct be_mcc_wrb *wrb;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -2611,11 +2611,15 @@ static int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc,</div><div class='ctx'> 		memcpy(flashed_crc, req-&gt;crc, 4);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static char flash_cookie[2][16] = {"*** SE FLAS", "H DIRECTORY *** "};</div><div class='add'>+/*</div><div class='add'>+ * Since the cookie is text, add a parsing-skipped space to keep it from</div><div class='add'>+ * ever being matched on storage holding this source file.</div><div class='add'>+ */</div><div class='add'>+static const char flash_cookie[32] __nonstring = "*** SE FLAS" "H DIRECTORY *** ";</div><div class='ctx'> </div><div class='ctx'> static bool phy_flashing_required(struct be_adapter *adapter)</div><div class='ctx'> {</div><div class='hunk'>@@ -3217,7 +3221,7 @@ int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,</div><div class='ctx'> 	struct be_cmd_req_acpi_wol_magic_config *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3234,7 +3238,7 @@ int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,</div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3249,7 +3253,7 @@ int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,</div><div class='ctx'> 			    CMD_SUBSYSTEM_LOWLEVEL))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3272,7 +3276,7 @@ int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto err_unlock;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!wait_for_completion_timeout(&amp;adapter-&gt;et_cmd_compl,</div><div class='ctx'> 					 msecs_to_jiffies(SET_LB_MODE_TIMEOUT)))</div><div class='hunk'>@@ -3281,7 +3285,7 @@ int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,</div><div class='ctx'> 	return status;</div><div class='ctx'> </div><div class='ctx'> err_unlock:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3298,7 +3302,7 @@ int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,</div><div class='ctx'> 			    CMD_SUBSYSTEM_LOWLEVEL))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3324,7 +3328,7 @@ int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wait_for_completion(&amp;adapter-&gt;et_cmd_compl);</div><div class='ctx'> 	resp = embedded_payload(wrb);</div><div class='hunk'>@@ -3332,7 +3336,7 @@ int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3348,7 +3352,7 @@ int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,</div><div class='ctx'> 			    CMD_SUBSYSTEM_LOWLEVEL))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3382,7 +3386,7 @@ int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3393,7 +3397,7 @@ int be_cmd_get_seeprom_data(struct be_adapter *adapter,</div><div class='ctx'> 	struct be_cmd_req_seeprom_read *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3409,7 +3413,7 @@ int be_cmd_get_seeprom_data(struct be_adapter *adapter,</div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3424,7 +3428,7 @@ int be_cmd_get_phy_info(struct be_adapter *adapter)</div><div class='ctx'> 			    CMD_SUBSYSTEM_COMMON))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3469,7 +3473,7 @@ int be_cmd_get_phy_info(struct be_adapter *adapter)</div><div class='ctx'> 	}</div><div class='ctx'> 	dma_free_coherent(&amp;adapter-&gt;pdev-&gt;dev, cmd.size, cmd.va, cmd.dma);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3479,7 +3483,7 @@ static int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain)</div><div class='ctx'> 	struct be_cmd_req_set_qos *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3499,7 +3503,7 @@ static int be_cmd_set_qos(struct be_adapter *adapter, u32 bps, u32 domain)</div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3611,7 +3615,7 @@ int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege,</div><div class='ctx'> 	struct be_cmd_req_get_fn_privileges *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3643,7 +3647,7 @@ int be_cmd_get_fn_privileges(struct be_adapter *adapter, u32 *privilege,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3655,7 +3659,7 @@ int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges,</div><div class='ctx'> 	struct be_cmd_req_set_fn_privileges *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3675,7 +3679,7 @@ int be_cmd_set_fn_privileges(struct be_adapter *adapter, u32 privileges,</div><div class='ctx'> </div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3707,7 +3711,7 @@ int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3771,7 +3775,7 @@ int be_cmd_get_mac_from_list(struct be_adapter *adapter, u8 *mac,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	dma_free_coherent(&amp;adapter-&gt;pdev-&gt;dev, get_mac_list_cmd.size,</div><div class='ctx'> 			  get_mac_list_cmd.va, get_mac_list_cmd.dma);</div><div class='ctx'> 	return status;</div><div class='hunk'>@@ -3831,7 +3835,7 @@ int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,</div><div class='ctx'> 	if (!cmd.va)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3852,8 +3856,8 @@ int be_cmd_set_mac_list(struct be_adapter *adapter, u8 *mac_array,</div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	dma_free_coherent(&amp;adapter-&gt;pdev-&gt;dev, cmd.size, cmd.va, cmd.dma);</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3889,7 +3893,7 @@ int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid,</div><div class='ctx'> 			    CMD_SUBSYSTEM_COMMON))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3930,7 +3934,7 @@ int be_cmd_set_hsw_config(struct be_adapter *adapter, u16 pvid,</div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3944,7 +3948,7 @@ int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,</div><div class='ctx'> 	int status;</div><div class='ctx'> 	u16 vid;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -3991,7 +3995,7 @@ int be_cmd_get_hsw_config(struct be_adapter *adapter, u16 *pvid,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4190,7 +4194,7 @@ int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,</div><div class='ctx'> 	struct be_cmd_req_set_ext_fat_caps *req;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -4206,7 +4210,7 @@ int be_cmd_set_ext_fat_capabilites(struct be_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4684,7 +4688,7 @@ int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op)</div><div class='ctx'> 	if (iface == 0xFFFFFFFF)</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -4701,7 +4705,7 @@ int be_cmd_manage_iface(struct be_adapter *adapter, u32 iface, u8 op)</div><div class='ctx'> </div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4735,7 +4739,7 @@ int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg,</div><div class='ctx'> 	struct be_cmd_resp_get_iface_list *resp;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -4756,7 +4760,7 @@ int be_cmd_get_if_id(struct be_adapter *adapter, struct be_vf_cfg *vf_cfg,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4850,7 +4854,7 @@ int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain)</div><div class='ctx'> 	if (BEx_chip(adapter))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -4868,7 +4872,7 @@ int be_cmd_enable_vf(struct be_adapter *adapter, u8 domain)</div><div class='ctx'> 	req-&gt;enable = 1;</div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4941,7 +4945,7 @@ __be_cmd_set_logical_link_config(struct be_adapter *adapter,</div><div class='ctx'> 	u32 link_config = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -4969,7 +4973,7 @@ __be_cmd_set_logical_link_config(struct be_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	status = be_mcc_notify_wait(adapter);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5000,8 +5004,7 @@ int be_cmd_set_features(struct be_adapter *adapter)</div><div class='ctx'> 	struct be_mcc_wrb *wrb;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	if (mutex_lock_interruptible(&amp;adapter-&gt;mcc_lock))</div><div class='del'>-		return -1;</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -5039,7 +5042,7 @@ err:</div><div class='ctx'> 		dev_info(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Adapter does not support HW error recovery\n");</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5053,7 +5056,7 @@ int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload,</div><div class='ctx'> 	struct be_cmd_resp_hdr *resp;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_lock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> </div><div class='ctx'> 	wrb = wrb_from_mccq(adapter);</div><div class='ctx'> 	if (!wrb) {</div><div class='hunk'>@@ -5076,7 +5079,7 @@ int be_roce_mcc_cmd(void *netdev_handle, void *wrb_payload,</div><div class='ctx'> 	memcpy(wrb_payload, resp, sizeof(*resp) + resp-&gt;response_length);</div><div class='ctx'> 	be_dws_le_to_cpu(wrb_payload, sizeof(*resp) + resp-&gt;response_length);</div><div class='ctx'> err:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;mcc_lock);</div><div class='add'>+	spin_unlock_bh(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(be_roce_mcc_cmd);</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_cmds.h b/drivers/net/ethernet/emulex/benet/be_cmds.h<br/>index d70818f06be7..5e2d3ddb5d43 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/emulex/benet/be_cmds.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/emulex/benet/be_cmds.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/emulex/benet/be_cmds.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/emulex/benet/be_cmds.h</a></div><div class='hunk'>@@ -1415,7 +1415,7 @@ struct flash_section_entry {</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct flash_section_info {</div><div class='del'>-	u8 cookie[32];</div><div class='add'>+	u8 cookie[32] __nonstring;</div><div class='ctx'> 	struct flash_section_hdr fsec_hdr;</div><div class='ctx'> 	struct flash_section_entry fsec_entry[32];</div><div class='ctx'> } __packed;</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_ethtool.c b/drivers/net/ethernet/emulex/benet/be_ethtool.c<br/>index f001a649f58f..f9216326bdfe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/emulex/benet/be_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/emulex/benet/be_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/emulex/benet/be_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/emulex/benet/be_ethtool.c</a></div><div class='hunk'>@@ -1073,10 +1073,19 @@ static void be_set_msg_level(struct net_device *netdev, u32 level)</div><div class='ctx'> 	adapter-&gt;msg_enable = level;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 be_get_rss_hash_opts(struct be_adapter *adapter, u64 flow_type)</div><div class='add'>+static int be_get_rxfh_fields(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct be_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	u64 flow_type = cmd-&gt;flow_type;</div><div class='ctx'> 	u64 data = 0;</div><div class='ctx'> </div><div class='add'>+	if (!be_multi_rxq(adapter)) {</div><div class='add'>+		dev_info(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+			 "ethtool::get_rxfh: RX flow hashing is disabled\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (flow_type) {</div><div class='ctx'> 	case TCP_V4_FLOW:</div><div class='ctx'> 		if (adapter-&gt;rss_info.rss_flags &amp; RSS_ENABLE_IPV4)</div><div class='hunk'>@@ -1104,7 +1113,8 @@ static u64 be_get_rss_hash_opts(struct be_adapter *adapter, u64 flow_type)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return data;</div><div class='add'>+	cmd-&gt;data = data;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int be_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,</div><div class='hunk'>@@ -1119,9 +1129,6 @@ static int be_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		cmd-&gt;data = be_get_rss_hash_opts(adapter, cmd-&gt;flow_type);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXRINGS:</div><div class='ctx'> 		cmd-&gt;data = adapter-&gt;num_rx_qs;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1132,11 +1139,19 @@ static int be_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int be_set_rss_hash_opts(struct be_adapter *adapter,</div><div class='del'>-				struct ethtool_rxnfc *cmd)</div><div class='add'>+static int be_set_rxfh_fields(struct net_device *netdev,</div><div class='add'>+			      const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	int status;</div><div class='add'>+	struct be_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	u32 rss_flags = adapter-&gt;rss_info.rss_flags;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	if (!be_multi_rxq(adapter)) {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+			"ethtool::set_rxfh: RX flow hashing is disabled\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (cmd-&gt;data != L3_RSS_FLAGS &amp;&amp;</div><div class='ctx'> 	    cmd-&gt;data != (L3_RSS_FLAGS | L4_RSS_FLAGS))</div><div class='hunk'>@@ -1195,28 +1210,6 @@ static int be_set_rss_hash_opts(struct be_adapter *adapter,</div><div class='ctx'> 	return be_cmd_status(status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int be_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='del'>-{</div><div class='del'>-	struct be_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	int status = 0;</div><div class='del'>-</div><div class='del'>-	if (!be_multi_rxq(adapter)) {</div><div class='del'>-		dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='del'>-			"ethtool::set_rxnfc: RX flow hashing is disabled\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		status = be_set_rss_hash_opts(adapter, cmd);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void be_get_channels(struct net_device *netdev,</div><div class='ctx'> 			    struct ethtool_channels *ch)</div><div class='ctx'> {</div><div class='hunk'>@@ -1449,7 +1442,8 @@ const struct ethtool_ops be_ethtool_ops = {</div><div class='ctx'> 	.flash_device = be_do_flash,</div><div class='ctx'> 	.self_test = be_self_test,</div><div class='ctx'> 	.get_rxnfc = be_get_rxnfc,</div><div class='del'>-	.set_rxnfc = be_set_rxnfc,</div><div class='add'>+	.get_rxfh_fields = be_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields = be_set_rxfh_fields,</div><div class='ctx'> 	.get_rxfh_indir_size = be_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh_key_size = be_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh = be_get_rxfh,</div><div class='head'>diff --git a/drivers/net/ethernet/emulex/benet/be_main.c b/drivers/net/ethernet/emulex/benet/be_main.c<br/>index 875fe379eea2..5bb31c8fab39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/emulex/benet/be_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/emulex/benet/be_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/emulex/benet/be_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/emulex/benet/be_main.c</a></div><div class='hunk'>@@ -1296,7 +1296,8 @@ static void be_xmit_flush(struct be_adapter *adapter, struct be_tx_obj *txo)</div><div class='ctx'> 		(adapter-&gt;bmc_filt_mask &amp; BMC_FILT_MULTICAST)</div><div class='ctx'> </div><div class='ctx'> static bool be_send_pkt_to_bmc(struct be_adapter *adapter,</div><div class='del'>-			       struct sk_buff **skb)</div><div class='add'>+			       struct sk_buff **skb,</div><div class='add'>+			       struct be_wrb_params *wrb_params)</div><div class='ctx'> {</div><div class='ctx'> 	struct ethhdr *eh = (struct ethhdr *)(*skb)-&gt;data;</div><div class='ctx'> 	bool os2bmc = false;</div><div class='hunk'>@@ -1360,7 +1361,7 @@ done:</div><div class='ctx'> 	 * to BMC, asic expects the vlan to be inline in the packet.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (os2bmc)</div><div class='del'>-		*skb = be_insert_vlan_in_pkt(adapter, *skb, NULL);</div><div class='add'>+		*skb = be_insert_vlan_in_pkt(adapter, *skb, wrb_params);</div><div class='ctx'> </div><div class='ctx'> 	return os2bmc;</div><div class='ctx'> }</div><div class='hunk'>@@ -1387,7 +1388,7 @@ static netdev_tx_t be_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	/* if os2bmc is enabled and if the pkt is destined to bmc,</div><div class='ctx'> 	 * enqueue the pkt a 2nd time with mgmt bit set.</div><div class='ctx'> 	 */</div><div class='del'>-	if (be_send_pkt_to_bmc(adapter, &amp;skb)) {</div><div class='add'>+	if (be_send_pkt_to_bmc(adapter, &amp;skb, &amp;wrb_params)) {</div><div class='ctx'> 		BE_WRB_F_SET(wrb_params.features, OS2BMC, 1);</div><div class='ctx'> 		wrb_cnt = be_xmit_enqueue(adapter, txo, skb, &amp;wrb_params);</div><div class='ctx'> 		if (unlikely(!wrb_cnt))</div><div class='hunk'>@@ -1465,10 +1466,10 @@ static void be_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='ctx'> 						 ntohs(tcphdr-&gt;source));</div><div class='ctx'> 					dev_info(dev, "TCP dest port %d\n",</div><div class='ctx'> 						 ntohs(tcphdr-&gt;dest));</div><div class='del'>-					dev_info(dev, "TCP sequence num %d\n",</div><div class='del'>-						 ntohs(tcphdr-&gt;seq));</div><div class='del'>-					dev_info(dev, "TCP ack_seq %d\n",</div><div class='del'>-						 ntohs(tcphdr-&gt;ack_seq));</div><div class='add'>+					dev_info(dev, "TCP sequence num %u\n",</div><div class='add'>+						 ntohl(tcphdr-&gt;seq));</div><div class='add'>+					dev_info(dev, "TCP ack_seq %u\n",</div><div class='add'>+						 ntohl(tcphdr-&gt;ack_seq));</div><div class='ctx'> 				} else if (ip_hdr(skb)-&gt;protocol ==</div><div class='ctx'> 					   IPPROTO_UDP) {</div><div class='ctx'> 					udphdr = udp_hdr(skb);</div><div class='hunk'>@@ -4031,8 +4032,7 @@ static int be_vxlan_unset_port(struct net_device *netdev, unsigned int table,</div><div class='ctx'> static const struct udp_tunnel_nic_info be_udp_tunnels = {</div><div class='ctx'> 	.set_port	= be_vxlan_set_port,</div><div class='ctx'> 	.unset_port	= be_vxlan_unset_port,</div><div class='del'>-	.flags		= UDP_TUNNEL_NIC_INFO_MAY_SLEEP |</div><div class='del'>-			  UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='add'>+	.flags		= UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='ctx'> 	.tables		= {</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },</div><div class='ctx'> 	},</div><div class='hunk'>@@ -5667,8 +5667,8 @@ static int be_drv_init(struct be_adapter *adapter)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;adapter-&gt;mbox_lock);</div><div class='del'>-	mutex_init(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	mutex_init(&amp;adapter-&gt;rx_filter_lock);</div><div class='add'>+	spin_lock_init(&amp;adapter-&gt;mcc_lock);</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;mcc_cq_lock);</div><div class='ctx'> 	init_completion(&amp;adapter-&gt;et_cmd_compl);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/engleder/tsnep.h b/drivers/net/ethernet/engleder/tsnep.h<br/>index f188fba021a6..03e19aea9ea4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/engleder/tsnep.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/engleder/tsnep.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/engleder/tsnep.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/engleder/tsnep.h</a></div><div class='hunk'>@@ -176,7 +176,7 @@ struct tsnep_adapter {</div><div class='ctx'> 	struct tsnep_gcl gcl[2];</div><div class='ctx'> 	int next_gcl;</div><div class='ctx'> </div><div class='del'>-	struct hwtstamp_config hwtstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config hwtstamp_config;</div><div class='ctx'> 	struct ptp_clock *ptp_clock;</div><div class='ctx'> 	struct ptp_clock_info ptp_clock_info;</div><div class='ctx'> 	/* ptp clock lock */</div><div class='hunk'>@@ -203,7 +203,11 @@ extern const struct ethtool_ops tsnep_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> int tsnep_ptp_init(struct tsnep_adapter *adapter);</div><div class='ctx'> void tsnep_ptp_cleanup(struct tsnep_adapter *adapter);</div><div class='del'>-int tsnep_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);</div><div class='add'>+int tsnep_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			   struct kernel_hwtstamp_config *config);</div><div class='add'>+int tsnep_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			   struct kernel_hwtstamp_config *config,</div><div class='add'>+			   struct netlink_ext_ack *extack);</div><div class='ctx'> </div><div class='ctx'> int tsnep_tc_init(struct tsnep_adapter *adapter);</div><div class='ctx'> void tsnep_tc_cleanup(struct tsnep_adapter *adapter);</div><div class='head'>diff --git a/drivers/net/ethernet/engleder/tsnep_main.c b/drivers/net/ethernet/engleder/tsnep_main.c<br/>index 95a5295d0361..b118407c30e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/engleder/tsnep_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/engleder/tsnep_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/engleder/tsnep_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/engleder/tsnep_main.c</a></div><div class='hunk'>@@ -67,6 +67,8 @@</div><div class='ctx'> #define TSNEP_TX_TYPE_XDP_NDO_MAP_PAGE	(TSNEP_TX_TYPE_XDP_NDO | TSNEP_TX_TYPE_MAP_PAGE)</div><div class='ctx'> #define TSNEP_TX_TYPE_XDP		(TSNEP_TX_TYPE_XDP_TX | TSNEP_TX_TYPE_XDP_NDO)</div><div class='ctx'> #define TSNEP_TX_TYPE_XSK		BIT(12)</div><div class='add'>+#define TSNEP_TX_TYPE_TSTAMP		BIT(13)</div><div class='add'>+#define TSNEP_TX_TYPE_SKB_TSTAMP	(TSNEP_TX_TYPE_SKB | TSNEP_TX_TYPE_TSTAMP)</div><div class='ctx'> </div><div class='ctx'> #define TSNEP_XDP_TX		BIT(0)</div><div class='ctx'> #define TSNEP_XDP_REDIRECT	BIT(1)</div><div class='hunk'>@@ -221,20 +223,19 @@ static void tsnep_phy_link_status_change(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> static int tsnep_phy_loopback(struct tsnep_adapter *adapter, bool enable)</div><div class='ctx'> {</div><div class='del'>-	int retval;</div><div class='del'>-</div><div class='del'>-	retval = phy_loopback(adapter-&gt;phydev, enable);</div><div class='add'>+	int speed;</div><div class='ctx'> </div><div class='del'>-	/* PHY link state change is not signaled if loopback is enabled, it</div><div class='del'>-	 * would delay a working loopback anyway, let's ensure that loopback</div><div class='del'>-	 * is working immediately by setting link mode directly</div><div class='del'>-	 */</div><div class='del'>-	if (!retval &amp;&amp; enable) {</div><div class='del'>-		netif_carrier_on(adapter-&gt;netdev);</div><div class='del'>-		tsnep_set_link_mode(adapter);</div><div class='add'>+	if (enable) {</div><div class='add'>+		if (adapter-&gt;phydev-&gt;autoneg == AUTONEG_DISABLE &amp;&amp;</div><div class='add'>+		    adapter-&gt;phydev-&gt;speed == SPEED_100)</div><div class='add'>+			speed = SPEED_100;</div><div class='add'>+		else</div><div class='add'>+			speed = SPEED_1000;</div><div class='add'>+	} else {</div><div class='add'>+		speed = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return retval;</div><div class='add'>+	return phy_loopback(adapter-&gt;phydev, enable, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tsnep_phy_open(struct tsnep_adapter *adapter)</div><div class='hunk'>@@ -387,8 +388,7 @@ static void tsnep_tx_activate(struct tsnep_tx *tx, int index, int length,</div><div class='ctx'> 	if (entry-&gt;skb) {</div><div class='ctx'> 		entry-&gt;properties = length &amp; TSNEP_DESC_LENGTH_MASK;</div><div class='ctx'> 		entry-&gt;properties |= TSNEP_DESC_INTERRUPT_FLAG;</div><div class='del'>-		if ((entry-&gt;type &amp; TSNEP_TX_TYPE_SKB) &amp;&amp;</div><div class='del'>-		    (skb_shinfo(entry-&gt;skb)-&gt;tx_flags &amp; SKBTX_IN_PROGRESS))</div><div class='add'>+		if ((entry-&gt;type &amp; TSNEP_TX_TYPE_SKB_TSTAMP) == TSNEP_TX_TYPE_SKB_TSTAMP)</div><div class='ctx'> 			entry-&gt;properties |= TSNEP_DESC_EXTENDED_WRITEBACK_FLAG;</div><div class='ctx'> </div><div class='ctx'> 		/* toggle user flag to prevent false acknowledge</div><div class='hunk'>@@ -480,7 +480,8 @@ static int tsnep_tx_map_frag(skb_frag_t *frag, struct tsnep_tx_entry *entry,</div><div class='ctx'> 	return mapped;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tsnep_tx_map(struct sk_buff *skb, struct tsnep_tx *tx, int count)</div><div class='add'>+static int tsnep_tx_map(struct sk_buff *skb, struct tsnep_tx *tx, int count,</div><div class='add'>+			bool do_tstamp)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dmadev = tx-&gt;adapter-&gt;dmadev;</div><div class='ctx'> 	struct tsnep_tx_entry *entry;</div><div class='hunk'>@@ -506,6 +507,9 @@ static int tsnep_tx_map(struct sk_buff *skb, struct tsnep_tx *tx, int count)</div><div class='ctx'> 				entry-&gt;type = TSNEP_TX_TYPE_SKB_INLINE;</div><div class='ctx'> 				mapped = 0;</div><div class='ctx'> 			}</div><div class='add'>+</div><div class='add'>+			if (do_tstamp)</div><div class='add'>+				entry-&gt;type |= TSNEP_TX_TYPE_TSTAMP;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[i - 1];</div><div class='ctx'> </div><div class='hunk'>@@ -559,11 +563,12 @@ static int tsnep_tx_unmap(struct tsnep_tx *tx, int index, int count)</div><div class='ctx'> static netdev_tx_t tsnep_xmit_frame_ring(struct sk_buff *skb,</div><div class='ctx'> 					 struct tsnep_tx *tx)</div><div class='ctx'> {</div><div class='del'>-	int count = 1;</div><div class='ctx'> 	struct tsnep_tx_entry *entry;</div><div class='add'>+	bool do_tstamp = false;</div><div class='add'>+	int count = 1;</div><div class='ctx'> 	int length;</div><div class='del'>-	int i;</div><div class='ctx'> 	int retval;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (skb_shinfo(skb)-&gt;nr_frags &gt; 0)</div><div class='ctx'> 		count += skb_shinfo(skb)-&gt;nr_frags;</div><div class='hunk'>@@ -580,7 +585,13 @@ static netdev_tx_t tsnep_xmit_frame_ring(struct sk_buff *skb,</div><div class='ctx'> 	entry = &amp;tx-&gt;entry[tx-&gt;write];</div><div class='ctx'> 	entry-&gt;skb = skb;</div><div class='ctx'> </div><div class='del'>-	retval = tsnep_tx_map(skb, tx, count);</div><div class='add'>+	if (unlikely(skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP) &amp;&amp;</div><div class='add'>+	    tx-&gt;adapter-&gt;hwtstamp_config.tx_type == HWTSTAMP_TX_ON) {</div><div class='add'>+		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+		do_tstamp = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	retval = tsnep_tx_map(skb, tx, count, do_tstamp);</div><div class='ctx'> 	if (retval &lt; 0) {</div><div class='ctx'> 		tsnep_tx_unmap(tx, tx-&gt;write, count);</div><div class='ctx'> 		dev_kfree_skb_any(entry-&gt;skb);</div><div class='hunk'>@@ -592,9 +603,6 @@ static netdev_tx_t tsnep_xmit_frame_ring(struct sk_buff *skb,</div><div class='ctx'> 	}</div><div class='ctx'> 	length = retval;</div><div class='ctx'> </div><div class='del'>-	if (skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP)</div><div class='del'>-		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; count; i++)</div><div class='ctx'> 		tsnep_tx_activate(tx, (tx-&gt;write + i) &amp; TSNEP_RING_MASK, length,</div><div class='ctx'> 				  i == count - 1);</div><div class='hunk'>@@ -845,15 +853,14 @@ static bool tsnep_tx_poll(struct tsnep_tx *tx, int napi_budget)</div><div class='ctx'> </div><div class='ctx'> 		length = tsnep_tx_unmap(tx, tx-&gt;read, count);</div><div class='ctx'> </div><div class='del'>-		if ((entry-&gt;type &amp; TSNEP_TX_TYPE_SKB) &amp;&amp;</div><div class='del'>-		    (skb_shinfo(entry-&gt;skb)-&gt;tx_flags &amp; SKBTX_IN_PROGRESS) &amp;&amp;</div><div class='add'>+		if (((entry-&gt;type &amp; TSNEP_TX_TYPE_SKB_TSTAMP) == TSNEP_TX_TYPE_SKB_TSTAMP) &amp;&amp;</div><div class='ctx'> 		    (__le32_to_cpu(entry-&gt;desc_wb-&gt;properties) &amp;</div><div class='ctx'> 		     TSNEP_DESC_EXTENDED_WRITEBACK_FLAG)) {</div><div class='ctx'> 			struct skb_shared_hwtstamps hwtstamps;</div><div class='ctx'> 			u64 timestamp;</div><div class='ctx'> </div><div class='del'>-			if (skb_shinfo(entry-&gt;skb)-&gt;tx_flags &amp;</div><div class='del'>-			    SKBTX_HW_TSTAMP_USE_CYCLES)</div><div class='add'>+			if (entry-&gt;skb-&gt;sk &amp;&amp;</div><div class='add'>+			    READ_ONCE(entry-&gt;skb-&gt;sk-&gt;sk_tsflags) &amp; SOF_TIMESTAMPING_BIND_PHC)</div><div class='ctx'> 				timestamp =</div><div class='ctx'> 					__le64_to_cpu(entry-&gt;desc_wb-&gt;counter);</div><div class='ctx'> 			else</div><div class='hunk'>@@ -1966,23 +1973,41 @@ failed:</div><div class='ctx'> </div><div class='ctx'> static void tsnep_queue_enable(struct tsnep_queue *queue)</div><div class='ctx'> {</div><div class='add'>+	struct tsnep_adapter *adapter = queue-&gt;adapter;</div><div class='add'>+</div><div class='add'>+	netif_napi_set_irq(&amp;queue-&gt;napi, queue-&gt;irq);</div><div class='ctx'> 	napi_enable(&amp;queue-&gt;napi);</div><div class='del'>-	tsnep_enable_irq(queue-&gt;adapter, queue-&gt;irq_mask);</div><div class='add'>+	tsnep_enable_irq(adapter, queue-&gt;irq_mask);</div><div class='ctx'> </div><div class='del'>-	if (queue-&gt;tx)</div><div class='add'>+	if (queue-&gt;tx) {</div><div class='add'>+		netif_queue_set_napi(adapter-&gt;netdev, queue-&gt;tx-&gt;queue_index,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_TX, &amp;queue-&gt;napi);</div><div class='ctx'> 		tsnep_tx_enable(queue-&gt;tx);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (queue-&gt;rx)</div><div class='add'>+	if (queue-&gt;rx) {</div><div class='add'>+		netif_queue_set_napi(adapter-&gt;netdev, queue-&gt;rx-&gt;queue_index,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_RX, &amp;queue-&gt;napi);</div><div class='ctx'> 		tsnep_rx_enable(queue-&gt;rx);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void tsnep_queue_disable(struct tsnep_queue *queue)</div><div class='ctx'> {</div><div class='del'>-	if (queue-&gt;tx)</div><div class='add'>+	struct tsnep_adapter *adapter = queue-&gt;adapter;</div><div class='add'>+</div><div class='add'>+	if (queue-&gt;rx)</div><div class='add'>+		netif_queue_set_napi(adapter-&gt;netdev, queue-&gt;rx-&gt;queue_index,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_RX, NULL);</div><div class='add'>+</div><div class='add'>+	if (queue-&gt;tx) {</div><div class='ctx'> 		tsnep_tx_disable(queue-&gt;tx, &amp;queue-&gt;napi);</div><div class='add'>+		netif_queue_set_napi(adapter-&gt;netdev, queue-&gt;tx-&gt;queue_index,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	napi_disable(&amp;queue-&gt;napi);</div><div class='del'>-	tsnep_disable_irq(queue-&gt;adapter, queue-&gt;irq_mask);</div><div class='add'>+	tsnep_disable_irq(adapter, queue-&gt;irq_mask);</div><div class='ctx'> </div><div class='ctx'> 	/* disable RX after NAPI polling has been disabled, because RX can be</div><div class='ctx'> 	 * enabled during NAPI polling</div><div class='hunk'>@@ -2143,16 +2168,6 @@ static netdev_tx_t tsnep_netdev_xmit_frame(struct sk_buff *skb,</div><div class='ctx'> 	return tsnep_xmit_frame_ring(skb, &amp;adapter-&gt;tx[queue_mapping]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tsnep_netdev_ioctl(struct net_device *netdev, struct ifreq *ifr,</div><div class='del'>-			      int cmd)</div><div class='del'>-{</div><div class='del'>-	if (!netif_running(netdev))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (cmd == SIOCSHWTSTAMP || cmd == SIOCGHWTSTAMP)</div><div class='del'>-		return tsnep_ptp_ioctl(netdev, ifr, cmd);</div><div class='del'>-	return phy_mii_ioctl(netdev-&gt;phydev, ifr, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void tsnep_netdev_set_multicast(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tsnep_adapter *adapter = netdev_priv(netdev);</div><div class='hunk'>@@ -2359,7 +2374,7 @@ static const struct net_device_ops tsnep_netdev_ops = {</div><div class='ctx'> 	.ndo_open = tsnep_netdev_open,</div><div class='ctx'> 	.ndo_stop = tsnep_netdev_close,</div><div class='ctx'> 	.ndo_start_xmit = tsnep_netdev_xmit_frame,</div><div class='del'>-	.ndo_eth_ioctl = tsnep_netdev_ioctl,</div><div class='add'>+	.ndo_eth_ioctl = phy_do_ioctl_running,</div><div class='ctx'> 	.ndo_set_rx_mode = tsnep_netdev_set_multicast,</div><div class='ctx'> 	.ndo_get_stats64 = tsnep_netdev_get_stats64,</div><div class='ctx'> 	.ndo_set_mac_address = tsnep_netdev_set_mac_address,</div><div class='hunk'>@@ -2369,6 +2384,8 @@ static const struct net_device_ops tsnep_netdev_ops = {</div><div class='ctx'> 	.ndo_bpf = tsnep_netdev_bpf,</div><div class='ctx'> 	.ndo_xdp_xmit = tsnep_netdev_xdp_xmit,</div><div class='ctx'> 	.ndo_xsk_wakeup = tsnep_netdev_xsk_wakeup,</div><div class='add'>+	.ndo_hwtstamp_get = tsnep_ptp_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = tsnep_ptp_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int tsnep_mac_init(struct tsnep_adapter *adapter)</div><div class='head'>diff --git a/drivers/net/ethernet/engleder/tsnep_ptp.c b/drivers/net/ethernet/engleder/tsnep_ptp.c<br/>index 54fbf0126815..ae1308eb813d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/engleder/tsnep_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/engleder/tsnep_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/engleder/tsnep_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/engleder/tsnep_ptp.c</a></div><div class='hunk'>@@ -19,57 +19,53 @@ void tsnep_get_system_time(struct tsnep_adapter *adapter, u64 *time)</div><div class='ctx'> 	*time = (((u64)high) &lt;&lt; 32) | ((u64)low);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int tsnep_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='add'>+int tsnep_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			   struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct tsnep_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-</div><div class='del'>-	if (!ifr)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (cmd == SIOCSHWTSTAMP) {</div><div class='del'>-		if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-</div><div class='del'>-		switch (config.tx_type) {</div><div class='del'>-		case HWTSTAMP_TX_OFF:</div><div class='del'>-		case HWTSTAMP_TX_ON:</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			return -ERANGE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		switch (config.rx_filter) {</div><div class='del'>-		case HWTSTAMP_FILTER_NONE:</div><div class='del'>-			break;</div><div class='del'>-		case HWTSTAMP_FILTER_ALL:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='del'>-		case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='del'>-		case HWTSTAMP_FILTER_NTP_ALL:</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			return -ERANGE;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		memcpy(&amp;adapter-&gt;hwtstamp_config, &amp;config,</div><div class='del'>-		       sizeof(adapter-&gt;hwtstamp_config));</div><div class='add'>+</div><div class='add'>+	*config = adapter-&gt;hwtstamp_config;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tsnep_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			   struct kernel_hwtstamp_config *config,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct tsnep_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (copy_to_user(ifr-&gt;ifr_data, &amp;adapter-&gt;hwtstamp_config,</div><div class='del'>-			 sizeof(adapter-&gt;hwtstamp_config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_ALL:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	adapter-&gt;hwtstamp_config = *config;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/faraday/Kconfig b/drivers/net/ethernet/faraday/Kconfig<br/>index c699bd6bcbb9..474073c7f94d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/faraday/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/faraday/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/faraday/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/faraday/Kconfig</a></div><div class='hunk'>@@ -31,6 +31,7 @@ config FTGMAC100</div><div class='ctx'> 	depends on ARM || COMPILE_TEST</div><div class='ctx'> 	depends on !64BIT || BROKEN</div><div class='ctx'> 	select PHYLIB</div><div class='add'>+	select FIXED_PHY</div><div class='ctx'> 	select MDIO_ASPEED if MACH_ASPEED_G6</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	help</div><div class='head'>diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/ethernet/faraday/ftgmac100.c<br/>index 17ec35e75a65..a863f7841210 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/faraday/ftgmac100.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/faraday/ftgmac100.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/faraday/ftgmac100.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/faraday/ftgmac100.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='hunk'>@@ -101,6 +102,8 @@ struct ftgmac100 {</div><div class='ctx'> </div><div class='ctx'> 	/* AST2500/AST2600 RMII ref clock gate */</div><div class='ctx'> 	struct clk *rclk;</div><div class='add'>+	/* Aspeed reset control */</div><div class='add'>+	struct reset_control *rst;</div><div class='ctx'> </div><div class='ctx'> 	/* Link management */</div><div class='ctx'> 	int cur_speed;</div><div class='hunk'>@@ -148,6 +151,23 @@ static int ftgmac100_reset_and_config_mac(struct ftgmac100 *priv)</div><div class='ctx'> {</div><div class='ctx'> 	u32 maccr = 0;</div><div class='ctx'> </div><div class='add'>+	/* Aspeed RMII needs SCU reset to clear status */</div><div class='add'>+	if (priv-&gt;is_aspeed &amp;&amp; priv-&gt;netdev-&gt;phydev-&gt;interface == PHY_INTERFACE_MODE_RMII) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = reset_control_assert(priv-&gt;rst);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev, "Failed to reset mac (%d)\n", err);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+		usleep_range(10000, 20000);</div><div class='add'>+		err = reset_control_deassert(priv-&gt;rst);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev, "Failed to deassert mac reset (%d)\n", err);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (priv-&gt;cur_speed) {</div><div class='ctx'> 	case SPEED_10:</div><div class='ctx'> 	case 0: /* no link */</div><div class='hunk'>@@ -1428,7 +1448,7 @@ static void ftgmac100_adjust_link(struct net_device *netdev)</div><div class='ctx'> 	/* Disable all interrupts */</div><div class='ctx'> 	iowrite32(0, priv-&gt;base + FTGMAC100_OFFSET_IER);</div><div class='ctx'> </div><div class='del'>-	/* Release phy lock to allow ftgmac100_reset to aquire it, keeping lock</div><div class='add'>+	/* Release phy lock to allow ftgmac100_reset to acquire it, keeping lock</div><div class='ctx'> 	 * order consistent to prevent dead lock.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (netdev-&gt;phydev)</div><div class='hunk'>@@ -1730,16 +1750,17 @@ err_register_mdiobus:</div><div class='ctx'> static void ftgmac100_phy_disconnect(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ftgmac100 *priv = netdev_priv(netdev);</div><div class='add'>+	struct phy_device *phydev = netdev-&gt;phydev;</div><div class='ctx'> </div><div class='del'>-	if (!netdev-&gt;phydev)</div><div class='add'>+	if (!phydev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	phy_disconnect(netdev-&gt;phydev);</div><div class='add'>+	phy_disconnect(phydev);</div><div class='ctx'> 	if (of_phy_is_fixed_link(priv-&gt;dev-&gt;of_node))</div><div class='ctx'> 		of_phy_deregister_fixed_link(priv-&gt;dev-&gt;of_node);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;use_ncsi)</div><div class='del'>-		fixed_phy_unregister(netdev-&gt;phydev);</div><div class='add'>+		fixed_phy_unregister(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ftgmac100_destroy_mdio(struct net_device *netdev)</div><div class='hunk'>@@ -1906,7 +1927,7 @@ static int ftgmac100_probe(struct platform_device *pdev)</div><div class='ctx'> 			goto err_phy_connect;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		phydev = fixed_phy_register(PHY_POLL, &amp;ncsi_phy_status, np);</div><div class='add'>+		phydev = fixed_phy_register(&amp;ncsi_phy_status, np);</div><div class='ctx'> 		if (IS_ERR(phydev)) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev, "failed to register fixed PHY device\n");</div><div class='ctx'> 			err = PTR_ERR(phydev);</div><div class='hunk'>@@ -1968,6 +1989,12 @@ static int ftgmac100_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	priv-&gt;rst = devm_reset_control_get_optional_exclusive(priv-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(priv-&gt;rst)) {</div><div class='add'>+		err = PTR_ERR(priv-&gt;rst);</div><div class='add'>+		goto err_phy_connect;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (priv-&gt;is_aspeed) {</div><div class='ctx'> 		err = ftgmac100_setup_clk(priv);</div><div class='ctx'> 		if (err)</div><div class='head'>diff --git a/drivers/net/ethernet/fealnx.c b/drivers/net/ethernet/fealnx.c<br/>index ed18450fd2cc..3c9961806f75 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fealnx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fealnx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fealnx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/fealnx.c</a></div><div class='hunk'>@@ -196,7 +196,7 @@ enum intr_status_bits {</div><div class='ctx'> 	ERI = 0x00000080,	/* receive early int */</div><div class='ctx'> 	CNTOVF = 0x00000040,	/* counter overflow */</div><div class='ctx'> 	RBU = 0x00000020,	/* receive buffer unavailable */</div><div class='del'>-	TBU = 0x00000010,	/* transmit buffer unavilable */</div><div class='add'>+	TBU = 0x00000010,	/* transmit buffer unavailable */</div><div class='ctx'> 	TI = 0x00000008,	/* transmit interrupt */</div><div class='ctx'> 	RI = 0x00000004,	/* receive interrupt */</div><div class='ctx'> 	RxErr = 0x00000002,	/* receive error */</div><div class='hunk'>@@ -215,7 +215,7 @@ enum rx_mode_bits {</div><div class='ctx'> 	CR_W_RXMODEMASK	= 0x000000e0,</div><div class='ctx'> 	CR_W_PROM	= 0x00000080,	/* promiscuous mode */</div><div class='ctx'> 	CR_W_AB		= 0x00000040,	/* accept broadcast */</div><div class='del'>-	CR_W_AM		= 0x00000020,	/* accept mutlicast */</div><div class='add'>+	CR_W_AM		= 0x00000020,	/* accept multicast */</div><div class='ctx'> 	CR_W_ARP	= 0x00000008,	/* receive runt pkt */</div><div class='ctx'> 	CR_W_ALP	= 0x00000004,	/* receive long pkt */</div><div class='ctx'> 	CR_W_SEP	= 0x00000002,	/* receive error pkt */</div><div class='hunk'>@@ -1074,7 +1074,7 @@ static void allocate_rx_buffers(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void netdev_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_private *np = from_timer(np, t, timer);</div><div class='add'>+	struct netdev_private *np = timer_container_of(np, t, timer);</div><div class='ctx'> 	struct net_device *dev = np-&gt;mii.dev;</div><div class='ctx'> 	void __iomem *ioaddr = np-&gt;mem;</div><div class='ctx'> 	int old_crvalue = np-&gt;crvalue;</div><div class='hunk'>@@ -1163,7 +1163,7 @@ static void enable_rxtx(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void reset_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_private *np = from_timer(np, t, reset_timer);</div><div class='add'>+	struct netdev_private *np = timer_container_of(np, t, reset_timer);</div><div class='ctx'> 	struct net_device *dev = np-&gt;mii.dev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -1900,8 +1900,8 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 	/* Stop the chip's Tx and Rx processes. */</div><div class='ctx'> 	stop_nic_rxtx(ioaddr, 0);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;np-&gt;timer);</div><div class='del'>-	del_timer_sync(&amp;np-&gt;reset_timer);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;reset_timer);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(np-&gt;pci_dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/freescale/Kconfig b/drivers/net/ethernet/freescale/Kconfig<br/>index 75401d2a5fb4..e2a591cf9601 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/Kconfig</a></div><div class='hunk'>@@ -28,6 +28,7 @@ config FEC</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select PHYLIB</div><div class='add'>+	select FIXED_PHY if M5272</div><div class='ctx'> 	select PAGE_POOL</div><div class='ctx'> 	imply PAGE_POOL_STATS</div><div class='ctx'> 	imply NET_SELFTESTS</div><div class='hunk'>@@ -71,7 +72,6 @@ config FSL_XGMAC_MDIO</div><div class='ctx'> 	tristate "Freescale XGMAC MDIO"</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	depends on OF</div><div class='del'>-	select MDIO_DEVRES</div><div class='ctx'> 	select OF_MDIO</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the MDIO bus on the Fman 10G Ethernet MACs, and</div><div class='hunk'>@@ -81,8 +81,7 @@ config UCC_GETH</div><div class='ctx'> 	tristate "Freescale QE Gigabit Ethernet"</div><div class='ctx'> 	depends on QUICC_ENGINE &amp;&amp; PPC32</div><div class='ctx'> 	select FSL_PQ_MDIO</div><div class='del'>-	select PHYLIB</div><div class='del'>-	select FIXED_PHY</div><div class='add'>+	select PHYLINK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the Gigabit Ethernet mode of the QUICC Engine,</div><div class='ctx'> 	  which is available on some Freescale SOCs.</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c<br/>index ac06b01fe934..3edc8d142dd5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa/dpaa_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/dpaa/dpaa_eth.c</a></div><div class='hunk'>@@ -28,7 +28,6 @@</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/sort.h&gt;</div><div class='del'>-#include &lt;linux/phy_fixed.h&gt;</div><div class='ctx'> #include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/bpf_trace.h&gt;</div><div class='ctx'> #include &lt;soc/fsl/bman.h&gt;</div><div class='hunk'>@@ -1820,7 +1819,6 @@ static struct sk_buff *sg_fd_to_skb(const struct dpaa_priv *priv,</div><div class='ctx'> 	struct page *page, *head_page;</div><div class='ctx'> 	struct dpaa_bp *dpaa_bp;</div><div class='ctx'> 	void *vaddr, *sg_vaddr;</div><div class='del'>-	int frag_off, frag_len;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	dma_addr_t sg_addr;</div><div class='ctx'> 	int page_offset;</div><div class='hunk'>@@ -1863,6 +1861,11 @@ static struct sk_buff *sg_fd_to_skb(const struct dpaa_priv *priv,</div><div class='ctx'> 			 * on Tx, if extra headers are added.</div><div class='ctx'> 			 */</div><div class='ctx'> 			WARN_ON(fd_off != priv-&gt;rx_headroom);</div><div class='add'>+			/* The offset to data start within the buffer holding</div><div class='add'>+			 * the SGT should always be equal to the offset to data</div><div class='add'>+			 * start within the first buffer holding the frame.</div><div class='add'>+			 */</div><div class='add'>+			WARN_ON_ONCE(fd_off != qm_sg_entry_get_off(&amp;sgt[i]));</div><div class='ctx'> 			skb_reserve(skb, fd_off);</div><div class='ctx'> 			skb_put(skb, qm_sg_entry_get_len(&amp;sgt[i]));</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1876,21 +1879,23 @@ static struct sk_buff *sg_fd_to_skb(const struct dpaa_priv *priv,</div><div class='ctx'> 			page = virt_to_page(sg_vaddr);</div><div class='ctx'> 			head_page = virt_to_head_page(sg_vaddr);</div><div class='ctx'> </div><div class='del'>-			/* Compute offset in (possibly tail) page */</div><div class='add'>+			/* Compute offset of sg_vaddr in (possibly tail) page */</div><div class='ctx'> 			page_offset = ((unsigned long)sg_vaddr &amp;</div><div class='ctx'> 					(PAGE_SIZE - 1)) +</div><div class='ctx'> 				(page_address(page) - page_address(head_page));</div><div class='del'>-			/* page_offset only refers to the beginning of sgt[i];</div><div class='del'>-			 * but the buffer itself may have an internal offset.</div><div class='add'>+</div><div class='add'>+			/* Non-initial SGT entries should not have a buffer</div><div class='add'>+			 * offset.</div><div class='ctx'> 			 */</div><div class='del'>-			frag_off = qm_sg_entry_get_off(&amp;sgt[i]) + page_offset;</div><div class='del'>-			frag_len = qm_sg_entry_get_len(&amp;sgt[i]);</div><div class='add'>+			WARN_ON_ONCE(qm_sg_entry_get_off(&amp;sgt[i]));</div><div class='add'>+</div><div class='ctx'> 			/* skb_add_rx_frag() does no checking on the page; if</div><div class='ctx'> 			 * we pass it a tail page, we'll end up with</div><div class='del'>-			 * bad page accounting and eventually with segafults.</div><div class='add'>+			 * bad page accounting and eventually with segfaults.</div><div class='ctx'> 			 */</div><div class='del'>-			skb_add_rx_frag(skb, i - 1, head_page, frag_off,</div><div class='del'>-					frag_len, dpaa_bp-&gt;size);</div><div class='add'>+			skb_add_rx_frag(skb, i - 1, head_page, page_offset,</div><div class='add'>+					qm_sg_entry_get_len(&amp;sgt[i]),</div><div class='add'>+					dpaa_bp-&gt;size);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Update the pool count for the current {cpu x bpool} */</div><div class='hunk'>@@ -2275,7 +2280,7 @@ static int dpaa_a050385_wa_xdpf(struct dpaa_priv *priv,</div><div class='ctx'> 	new_xdpf-&gt;len = xdpf-&gt;len;</div><div class='ctx'> 	new_xdpf-&gt;headroom = priv-&gt;tx_headroom;</div><div class='ctx'> 	new_xdpf-&gt;frame_sz = DPAA_BP_RAW_SIZE;</div><div class='del'>-	new_xdpf-&gt;mem.type = MEM_TYPE_PAGE_ORDER0;</div><div class='add'>+	new_xdpf-&gt;mem_type = MEM_TYPE_PAGE_ORDER0;</div><div class='ctx'> </div><div class='ctx'> 	/* Release the initial buffer */</div><div class='ctx'> 	xdp_return_frame_rx_napi(xdpf);</div><div class='hunk'>@@ -2766,7 +2771,7 @@ static enum qman_cb_dqrr_result rx_default_dqrr(struct qman_portal *portal,</div><div class='ctx'> 	if (net_dev-&gt;features &amp; NETIF_F_RXHASH &amp;&amp; priv-&gt;keygen_in_use &amp;&amp;</div><div class='ctx'> 	    !fman_port_get_hash_result_offset(priv-&gt;mac_dev-&gt;port[RX],</div><div class='ctx'> 					      &amp;hash_offset)) {</div><div class='del'>-		hash = be32_to_cpu(*(u32 *)(vaddr + hash_offset));</div><div class='add'>+		hash = be32_to_cpu(*(__be32 *)(vaddr + hash_offset));</div><div class='ctx'> 		hash_valid = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3083,15 +3088,25 @@ static int dpaa_xdp_xmit(struct net_device *net_dev, int n,</div><div class='ctx'> 	return nxmit;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dpaa_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='add'>+static int dpaa_hwtstamp_get(struct net_device *dev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct dpaa_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, rq-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	config-&gt;tx_type = priv-&gt;tx_tstamp ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='add'>+	config-&gt;rx_filter = priv-&gt;rx_tstamp ? HWTSTAMP_FILTER_ALL :</div><div class='add'>+			    HWTSTAMP_FILTER_NONE;</div><div class='ctx'> </div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dpaa_hwtstamp_set(struct net_device *dev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct dpaa_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 		/* Couldn't disable rx/tx timestamping separately.</div><div class='ctx'> 		 * Do nothing here.</div><div class='hunk'>@@ -3106,7 +3121,7 @@ static int dpaa_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (config.rx_filter == HWTSTAMP_FILTER_NONE) {</div><div class='add'>+	if (config-&gt;rx_filter == HWTSTAMP_FILTER_NONE) {</div><div class='ctx'> 		/* Couldn't disable rx/tx timestamping separately.</div><div class='ctx'> 		 * Do nothing here.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -3115,28 +3130,17 @@ static int dpaa_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> 		priv-&gt;mac_dev-&gt;set_tstamp(priv-&gt;mac_dev-&gt;fman_mac, true);</div><div class='ctx'> 		priv-&gt;rx_tstamp = true;</div><div class='ctx'> 		/* TS is set for all frame types, not only those requested */</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(rq-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-			-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dpaa_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)</div><div class='ctx'> {</div><div class='del'>-	int ret = -EINVAL;</div><div class='ctx'> 	struct dpaa_priv *priv = netdev_priv(net_dev);</div><div class='ctx'> </div><div class='del'>-	if (cmd == SIOCGMIIREG) {</div><div class='del'>-		if (net_dev-&gt;phydev)</div><div class='del'>-			return phylink_mii_ioctl(priv-&gt;mac_dev-&gt;phylink, rq,</div><div class='del'>-						 cmd);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cmd == SIOCSHWTSTAMP)</div><div class='del'>-		return dpaa_ts_ioctl(net_dev, rq, cmd);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return phylink_mii_ioctl(priv-&gt;mac_dev-&gt;phylink, rq, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops dpaa_ops = {</div><div class='hunk'>@@ -3145,7 +3149,6 @@ static const struct net_device_ops dpaa_ops = {</div><div class='ctx'> 	.ndo_stop = dpaa_eth_stop,</div><div class='ctx'> 	.ndo_tx_timeout = dpaa_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats64 = dpaa_get_stats64,</div><div class='del'>-	.ndo_change_carrier = fixed_phy_change_carrier,</div><div class='ctx'> 	.ndo_set_mac_address = dpaa_set_mac_address,</div><div class='ctx'> 	.ndo_validate_addr = eth_validate_addr,</div><div class='ctx'> 	.ndo_set_rx_mode = dpaa_set_rx_mode,</div><div class='hunk'>@@ -3154,6 +3157,8 @@ static const struct net_device_ops dpaa_ops = {</div><div class='ctx'> 	.ndo_change_mtu = dpaa_change_mtu,</div><div class='ctx'> 	.ndo_bpf = dpaa_xdp,</div><div class='ctx'> 	.ndo_xdp_xmit = dpaa_xdp_xmit,</div><div class='add'>+	.ndo_hwtstamp_get = dpaa_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = dpaa_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int dpaa_napi_add(struct net_device *net_dev)</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h b/drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h<br/>index 6f0e58a2a58a..9e1d44ae92cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h</a></div><div class='hunk'>@@ -56,7 +56,7 @@ DECLARE_EVENT_CLASS(dpaa_eth_fd,</div><div class='ctx'> 		__entry-&gt;fd_format = qm_fd_get_format(fd);</div><div class='ctx'> 		__entry-&gt;fd_offset = qm_fd_get_offset(fd);</div><div class='ctx'> 		__entry-&gt;fd_length = qm_fd_get_length(fd);</div><div class='del'>-		__entry-&gt;fd_status = fd-&gt;status;</div><div class='add'>+		__entry-&gt;fd_status = __be32_to_cpu(fd-&gt;status);</div><div class='ctx'> 		__assign_str(name);</div><div class='ctx'> 	),</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c b/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c<br/>index 9986f6e1f587..ed3fa80af8c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c</a></div><div class='hunk'>@@ -263,8 +263,8 @@ static void dpaa_get_strings(struct net_device *net_dev, u32 stringset,</div><div class='ctx'> 		ethtool_puts(&amp;data, dpaa_stats_global[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dpaa_get_hash_opts(struct net_device *dev,</div><div class='del'>-			      struct ethtool_rxnfc *cmd)</div><div class='add'>+static int dpaa_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct dpaa_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -299,22 +299,6 @@ static int dpaa_get_hash_opts(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dpaa_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='del'>-			  u32 *unused)</div><div class='del'>-{</div><div class='del'>-	int ret = -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ret = dpaa_get_hash_opts(dev, cmd);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void dpaa_set_hash(struct net_device *net_dev, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac_device *mac_dev;</div><div class='hunk'>@@ -329,8 +313,9 @@ static void dpaa_set_hash(struct net_device *net_dev, bool enable)</div><div class='ctx'> 	priv-&gt;keygen_in_use = enable;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dpaa_set_hash_opts(struct net_device *dev,</div><div class='del'>-			      struct ethtool_rxnfc *nfc)</div><div class='add'>+static int dpaa_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -364,21 +349,6 @@ static int dpaa_set_hash_opts(struct net_device *dev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dpaa_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='del'>-{</div><div class='del'>-	int ret = -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = dpaa_set_hash_opts(dev, cmd);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int dpaa_get_ts_info(struct net_device *net_dev,</div><div class='ctx'> 			    struct kernel_ethtool_ts_info *info)</div><div class='ctx'> {</div><div class='hunk'>@@ -401,8 +371,10 @@ static int dpaa_get_ts_info(struct net_device *net_dev,</div><div class='ctx'> 		of_node_put(ptp_node);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ptp_dev)</div><div class='add'>+	if (ptp_dev) {</div><div class='ctx'> 		ptp = platform_get_drvdata(ptp_dev);</div><div class='add'>+		put_device(&amp;ptp_dev-&gt;dev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (ptp)</div><div class='ctx'> 		info-&gt;phc_index = ptp-&gt;phc_index;</div><div class='hunk'>@@ -495,6 +467,47 @@ revert_values:</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dpaa_get_pause_stats(struct net_device *net_dev,</div><div class='add'>+				 struct ethtool_pause_stats *s)</div><div class='add'>+{</div><div class='add'>+	struct dpaa_priv *priv = netdev_priv(net_dev);</div><div class='add'>+	struct mac_device *mac_dev = priv-&gt;mac_dev;</div><div class='add'>+</div><div class='add'>+	if (mac_dev-&gt;get_pause_stats)</div><div class='add'>+		mac_dev-&gt;get_pause_stats(mac_dev-&gt;fman_mac, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dpaa_get_rmon_stats(struct net_device *net_dev,</div><div class='add'>+				struct ethtool_rmon_stats *s,</div><div class='add'>+				const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct dpaa_priv *priv = netdev_priv(net_dev);</div><div class='add'>+	struct mac_device *mac_dev = priv-&gt;mac_dev;</div><div class='add'>+</div><div class='add'>+	if (mac_dev-&gt;get_rmon_stats)</div><div class='add'>+		mac_dev-&gt;get_rmon_stats(mac_dev-&gt;fman_mac, s, ranges);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dpaa_get_eth_ctrl_stats(struct net_device *net_dev,</div><div class='add'>+				    struct ethtool_eth_ctrl_stats *s)</div><div class='add'>+{</div><div class='add'>+	struct dpaa_priv *priv = netdev_priv(net_dev);</div><div class='add'>+	struct mac_device *mac_dev = priv-&gt;mac_dev;</div><div class='add'>+</div><div class='add'>+	if (mac_dev-&gt;get_eth_ctrl_stats)</div><div class='add'>+		mac_dev-&gt;get_eth_ctrl_stats(mac_dev-&gt;fman_mac, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dpaa_get_eth_mac_stats(struct net_device *net_dev,</div><div class='add'>+				   struct ethtool_eth_mac_stats *s)</div><div class='add'>+{</div><div class='add'>+	struct dpaa_priv *priv = netdev_priv(net_dev);</div><div class='add'>+	struct mac_device *mac_dev = priv-&gt;mac_dev;</div><div class='add'>+</div><div class='add'>+	if (mac_dev-&gt;get_eth_mac_stats)</div><div class='add'>+		mac_dev-&gt;get_eth_mac_stats(mac_dev-&gt;fman_mac, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct ethtool_ops dpaa_ethtool_ops = {</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_RX_MAX_FRAMES,</div><div class='hunk'>@@ -510,9 +523,13 @@ const struct ethtool_ops dpaa_ethtool_ops = {</div><div class='ctx'> 	.get_strings = dpaa_get_strings,</div><div class='ctx'> 	.get_link_ksettings = dpaa_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings = dpaa_set_link_ksettings,</div><div class='del'>-	.get_rxnfc = dpaa_get_rxnfc,</div><div class='del'>-	.set_rxnfc = dpaa_set_rxnfc,</div><div class='add'>+	.get_rxfh_fields = dpaa_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields = dpaa_set_rxfh_fields,</div><div class='ctx'> 	.get_ts_info = dpaa_get_ts_info,</div><div class='ctx'> 	.get_coalesce = dpaa_get_coalesce,</div><div class='ctx'> 	.set_coalesce = dpaa_set_coalesce,</div><div class='add'>+	.get_pause_stats = dpaa_get_pause_stats,</div><div class='add'>+	.get_rmon_stats = dpaa_get_rmon_stats,</div><div class='add'>+	.get_eth_ctrl_stats = dpaa_get_eth_ctrl_stats,</div><div class='add'>+	.get_eth_mac_stats = dpaa_get_eth_mac_stats,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c<br/>index 29886a8ba73f..18d86badd6ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c</a></div><div class='hunk'>@@ -1077,8 +1077,7 @@ static int dpaa2_eth_build_single_fd(struct dpaa2_eth_priv *priv,</div><div class='ctx'> 	dma_addr_t addr;</div><div class='ctx'> </div><div class='ctx'> 	buffer_start = skb-&gt;data - dpaa2_eth_needed_headroom(skb);</div><div class='del'>-	aligned_start = PTR_ALIGN(buffer_start - DPAA2_ETH_TX_BUF_ALIGN,</div><div class='del'>-				  DPAA2_ETH_TX_BUF_ALIGN);</div><div class='add'>+	aligned_start = PTR_ALIGN(buffer_start, DPAA2_ETH_TX_BUF_ALIGN);</div><div class='ctx'> 	if (aligned_start &gt;= skb-&gt;head)</div><div class='ctx'> 		buffer_start = aligned_start;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -2585,40 +2584,52 @@ static int dpaa2_eth_set_features(struct net_device *net_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dpaa2_eth_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='add'>+static int dpaa2_eth_hwtstamp_set(struct net_device *dev,</div><div class='add'>+				  struct kernel_hwtstamp_config *config,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct dpaa2_eth_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> </div><div class='ctx'> 	if (!dpaa2_ptp)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, rq-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='ctx'> 	case HWTSTAMP_TX_ONESTEP_SYNC:</div><div class='del'>-		priv-&gt;tx_tstamp_type = config.tx_type;</div><div class='add'>+		priv-&gt;tx_tstamp_type = config-&gt;tx_type;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (config.rx_filter == HWTSTAMP_FILTER_NONE) {</div><div class='add'>+	if (config-&gt;rx_filter == HWTSTAMP_FILTER_NONE) {</div><div class='ctx'> 		priv-&gt;rx_tstamp = false;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		priv-&gt;rx_tstamp = true;</div><div class='ctx'> 		/* TS is set for all frame types, not only those requested */</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;tx_tstamp_type == HWTSTAMP_TX_ONESTEP_SYNC)</div><div class='ctx'> 		dpaa2_ptp_onestep_reg_update_method(priv);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(rq-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-			-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dpaa2_eth_hwtstamp_get(struct net_device *dev,</div><div class='add'>+				  struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct dpaa2_eth_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!dpaa2_ptp)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	config-&gt;tx_type = priv-&gt;tx_tstamp_type;</div><div class='add'>+	config-&gt;rx_filter = priv-&gt;rx_tstamp ? HWTSTAMP_FILTER_ALL :</div><div class='add'>+			    HWTSTAMP_FILTER_NONE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dpaa2_eth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='hunk'>@@ -2626,9 +2637,6 @@ static int dpaa2_eth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> 	struct dpaa2_eth_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (cmd == SIOCSHWTSTAMP)</div><div class='del'>-		return dpaa2_eth_ts_ioctl(dev, rq, cmd);</div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;mac_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (dpaa2_eth_is_type_phy(priv)) {</div><div class='hunk'>@@ -3034,7 +3042,9 @@ static const struct net_device_ops dpaa2_eth_ops = {</div><div class='ctx'> 	.ndo_xsk_wakeup = dpaa2_xsk_wakeup,</div><div class='ctx'> 	.ndo_setup_tc = dpaa2_eth_setup_tc,</div><div class='ctx'> 	.ndo_vlan_rx_add_vid = dpaa2_eth_rx_add_vid,</div><div class='del'>-	.ndo_vlan_rx_kill_vid = dpaa2_eth_rx_kill_vid</div><div class='add'>+	.ndo_vlan_rx_kill_vid = dpaa2_eth_rx_kill_vid,</div><div class='add'>+	.ndo_hwtstamp_get = dpaa2_eth_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = dpaa2_eth_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void dpaa2_eth_cdan_cb(struct dpaa2_io_notification_ctx *ctx)</div><div class='hunk'>@@ -3928,6 +3938,7 @@ static int dpaa2_eth_setup_rx_flow(struct dpaa2_eth_priv *priv,</div><div class='ctx'> 					 MEM_TYPE_PAGE_ORDER0, NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "xdp_rxq_info_reg_mem_model failed\n");</div><div class='add'>+		xdp_rxq_info_unreg(&amp;fq-&gt;channel-&gt;xdp_rxq);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4421,17 +4432,25 @@ static int dpaa2_eth_bind_dpni(struct dpaa2_eth_priv *priv)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (err)</div><div class='del'>-			return err;</div><div class='add'>+			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = dpni_get_qdid(priv-&gt;mc_io, 0, priv-&gt;mc_token,</div><div class='ctx'> 			    DPNI_QUEUE_TX, &amp;priv-&gt;tx_qdid);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "dpni_get_qdid() failed\n");</div><div class='del'>-		return err;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	while (i--) {</div><div class='add'>+		if (priv-&gt;fq[i].type == DPAA2_RX_FQ &amp;&amp;</div><div class='add'>+		    xdp_rxq_info_is_reg(&amp;priv-&gt;fq[i].channel-&gt;xdp_rxq))</div><div class='add'>+			xdp_rxq_info_unreg(&amp;priv-&gt;fq[i].channel-&gt;xdp_rxq);</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Allocate rings for storing incoming frame descriptors */</div><div class='hunk'>@@ -4646,12 +4665,19 @@ static int dpaa2_eth_connect_mac(struct dpaa2_eth_priv *priv)</div><div class='ctx'> 		return PTR_ERR(dpmac_dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(dpmac_dev) || dpmac_dev-&gt;dev.type != &amp;fsl_mc_bus_dpmac_type)</div><div class='add'>+	if (IS_ERR(dpmac_dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (dpmac_dev-&gt;dev.type != &amp;fsl_mc_bus_dpmac_type) {</div><div class='add'>+		err = 0;</div><div class='add'>+		goto out_put_device;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mac = kzalloc(sizeof(struct dpaa2_mac), GFP_KERNEL);</div><div class='del'>-	if (!mac)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (!mac) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out_put_device;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mac-&gt;mc_dev = dpmac_dev;</div><div class='ctx'> 	mac-&gt;mc_io = priv-&gt;mc_io;</div><div class='hunk'>@@ -4685,6 +4711,8 @@ err_close_mac:</div><div class='ctx'> 	dpaa2_mac_close(mac);</div><div class='ctx'> err_free_mac:</div><div class='ctx'> 	kfree(mac);</div><div class='add'>+out_put_device:</div><div class='add'>+	put_device(&amp;dpmac_dev-&gt;dev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4814,6 +4842,17 @@ static void dpaa2_eth_del_ch_napi(struct dpaa2_eth_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dpaa2_eth_free_rx_xdp_rxq(struct dpaa2_eth_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_fqs; i++) {</div><div class='add'>+		if (priv-&gt;fq[i].type == DPAA2_RX_FQ &amp;&amp;</div><div class='add'>+		    xdp_rxq_info_is_reg(&amp;priv-&gt;fq[i].channel-&gt;xdp_rxq))</div><div class='add'>+			xdp_rxq_info_unreg(&amp;priv-&gt;fq[i].channel-&gt;xdp_rxq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev;</div><div class='hunk'>@@ -4844,7 +4883,7 @@ static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev)</div><div class='ctx'> 	priv-&gt;tx_tstamp_type = HWTSTAMP_TX_OFF;</div><div class='ctx'> 	priv-&gt;rx_tstamp = false;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;dpaa2_ptp_wq = alloc_workqueue("dpaa2_ptp_wq", 0, 0);</div><div class='add'>+	priv-&gt;dpaa2_ptp_wq = alloc_workqueue("dpaa2_ptp_wq", WQ_PERCPU, 0);</div><div class='ctx'> 	if (!priv-&gt;dpaa2_ptp_wq) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_wq_alloc;</div><div class='hunk'>@@ -5017,6 +5056,7 @@ err_alloc_percpu_extras:</div><div class='ctx'> 	free_percpu(priv-&gt;percpu_stats);</div><div class='ctx'> err_alloc_percpu_stats:</div><div class='ctx'> 	dpaa2_eth_del_ch_napi(priv);</div><div class='add'>+	dpaa2_eth_free_rx_xdp_rxq(priv);</div><div class='ctx'> err_bind:</div><div class='ctx'> 	dpaa2_eth_free_dpbps(priv);</div><div class='ctx'> err_dpbp_setup:</div><div class='hunk'>@@ -5069,6 +5109,7 @@ static void dpaa2_eth_remove(struct fsl_mc_device *ls_dev)</div><div class='ctx'> 	free_percpu(priv-&gt;percpu_extras);</div><div class='ctx'> </div><div class='ctx'> 	dpaa2_eth_del_ch_napi(priv);</div><div class='add'>+	dpaa2_eth_free_rx_xdp_rxq(priv);</div><div class='ctx'> 	dpaa2_eth_free_dpbps(priv);</div><div class='ctx'> 	dpaa2_eth_free_dpio(priv);</div><div class='ctx'> 	dpaa2_eth_free_dpni(priv);</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-ethtool.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-ethtool.c<br/>index 74ef77cb7078..baab4f1c908d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa2/dpaa2-ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa2/dpaa2-ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa2/dpaa2-ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/dpaa2/dpaa2-ethtool.c</a></div><div class='hunk'>@@ -711,6 +711,13 @@ static int dpaa2_eth_update_cls_rule(struct net_device *net_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 dpaa2_eth_get_rx_ring_count(struct net_device *net_dev)</div><div class='add'>+{</div><div class='add'>+	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);</div><div class='add'>+</div><div class='add'>+	return dpaa2_eth_queue_count(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int dpaa2_eth_get_rxnfc(struct net_device *net_dev,</div><div class='ctx'> 			       struct ethtool_rxnfc *rxnfc, u32 *rule_locs)</div><div class='ctx'> {</div><div class='hunk'>@@ -719,16 +726,6 @@ static int dpaa2_eth_get_rxnfc(struct net_device *net_dev,</div><div class='ctx'> 	int i, j = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (rxnfc-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		/* we purposely ignore cmd-&gt;flow_type for now, because the</div><div class='del'>-		 * classifier only supports a single set of fields for all</div><div class='del'>-		 * protocols</div><div class='del'>-		 */</div><div class='del'>-		rxnfc-&gt;data = priv-&gt;rx_hash_fields;</div><div class='del'>-		break;</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		rxnfc-&gt;data = dpaa2_eth_queue_count(priv);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		rxnfc-&gt;rule_cnt = 0;</div><div class='ctx'> 		rxnfc-&gt;rule_cnt = dpaa2_eth_num_cls_rules(priv);</div><div class='hunk'>@@ -767,11 +764,6 @@ static int dpaa2_eth_set_rxnfc(struct net_device *net_dev,</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (rxnfc-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		if ((rxnfc-&gt;data &amp; DPAA2_RXH_SUPPORTED) != rxnfc-&gt;data)</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-		err = dpaa2_eth_set_hash(net_dev, rxnfc-&gt;data);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		err = dpaa2_eth_update_cls_rule(net_dev, &amp;rxnfc-&gt;fs, rxnfc-&gt;fs.location);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -785,6 +777,28 @@ static int dpaa2_eth_set_rxnfc(struct net_device *net_dev,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int dpaa2_eth_get_rxfh_fields(struct net_device *net_dev,</div><div class='add'>+				     struct ethtool_rxfh_fields *rxnfc)</div><div class='add'>+{</div><div class='add'>+	struct dpaa2_eth_priv *priv = netdev_priv(net_dev);</div><div class='add'>+</div><div class='add'>+	/* we purposely ignore cmd-&gt;flow_type for now, because the</div><div class='add'>+	 * classifier only supports a single set of fields for all</div><div class='add'>+	 * protocols</div><div class='add'>+	 */</div><div class='add'>+	rxnfc-&gt;data = priv-&gt;rx_hash_fields;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dpaa2_eth_set_rxfh_fields(struct net_device *net_dev,</div><div class='add'>+				     const struct ethtool_rxfh_fields *rxnfc,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if ((rxnfc-&gt;data &amp; DPAA2_RXH_SUPPORTED) != rxnfc-&gt;data)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	return dpaa2_eth_set_hash(net_dev, rxnfc-&gt;data);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int dpaa2_phc_index = -1;</div><div class='ctx'> EXPORT_SYMBOL(dpaa2_phc_index);</div><div class='ctx'> </div><div class='hunk'>@@ -939,6 +953,9 @@ const struct ethtool_ops dpaa2_ethtool_ops = {</div><div class='ctx'> 	.get_strings = dpaa2_eth_get_strings,</div><div class='ctx'> 	.get_rxnfc = dpaa2_eth_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc = dpaa2_eth_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count = dpaa2_eth_get_rx_ring_count,</div><div class='add'>+	.get_rxfh_fields = dpaa2_eth_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields = dpaa2_eth_set_rxfh_fields,</div><div class='ctx'> 	.get_ts_info = dpaa2_eth_get_ts_info,</div><div class='ctx'> 	.get_tunable = dpaa2_eth_get_tunable,</div><div class='ctx'> 	.set_tunable = dpaa2_eth_set_tunable,</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c<br/>index a293b08f36d4..b1e1ad9e4b48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c</a></div><div class='hunk'>@@ -780,13 +780,14 @@ struct ethsw_dump_ctx {</div><div class='ctx'> static int dpaa2_switch_fdb_dump_nl(struct fdb_dump_entry *entry,</div><div class='ctx'> 				    struct ethsw_dump_ctx *dump)</div><div class='ctx'> {</div><div class='add'>+	struct ndo_fdb_dump_context *ctx = (void *)dump-&gt;cb-&gt;ctx;</div><div class='ctx'> 	int is_dynamic = entry-&gt;type &amp; DPSW_FDB_ENTRY_DINAMIC;</div><div class='ctx'> 	u32 portid = NETLINK_CB(dump-&gt;cb-&gt;skb).portid;</div><div class='ctx'> 	u32 seq = dump-&gt;cb-&gt;nlh-&gt;nlmsg_seq;</div><div class='ctx'> 	struct nlmsghdr *nlh;</div><div class='ctx'> 	struct ndmsg *ndm;</div><div class='ctx'> </div><div class='del'>-	if (dump-&gt;idx &lt; dump-&gt;cb-&gt;args[2])</div><div class='add'>+	if (dump-&gt;idx &lt; ctx-&gt;fdb_idx)</div><div class='ctx'> 		goto skip;</div><div class='ctx'> </div><div class='ctx'> 	nlh = nlmsg_put(dump-&gt;skb, portid, seq, RTM_NEWNEIGH,</div><div class='hunk'>@@ -1447,12 +1448,19 @@ static int dpaa2_switch_port_connect_mac(struct ethsw_port_priv *port_priv)</div><div class='ctx'> 	if (PTR_ERR(dpmac_dev) == -EPROBE_DEFER)</div><div class='ctx'> 		return PTR_ERR(dpmac_dev);</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(dpmac_dev) || dpmac_dev-&gt;dev.type != &amp;fsl_mc_bus_dpmac_type)</div><div class='add'>+	if (IS_ERR(dpmac_dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (dpmac_dev-&gt;dev.type != &amp;fsl_mc_bus_dpmac_type) {</div><div class='add'>+		err = 0;</div><div class='add'>+		goto out_put_device;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mac = kzalloc(sizeof(*mac), GFP_KERNEL);</div><div class='del'>-	if (!mac)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (!mac) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out_put_device;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mac-&gt;mc_dev = dpmac_dev;</div><div class='ctx'> 	mac-&gt;mc_io = port_priv-&gt;ethsw_data-&gt;mc_io;</div><div class='hunk'>@@ -1482,6 +1490,8 @@ err_close_mac:</div><div class='ctx'> 	dpaa2_mac_close(mac);</div><div class='ctx'> err_free_mac:</div><div class='ctx'> 	kfree(mac);</div><div class='add'>+out_put_device:</div><div class='add'>+	put_device(&amp;dpmac_dev-&gt;dev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2726,7 +2736,7 @@ static int dpaa2_switch_setup_dpbp(struct ethsw_core *ethsw)</div><div class='ctx'> 		dev_err(dev, "dpsw_ctrl_if_set_pools() failed\n");</div><div class='ctx'> 		goto err_get_attr;</div><div class='ctx'> 	}</div><div class='del'>-	ethsw-&gt;bpid = dpbp_attrs.id;</div><div class='add'>+	ethsw-&gt;bpid = dpbp_attrs.bpid;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-xsk.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-xsk.c<br/>index a466c2379146..4b0ae7d9af92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa2/dpaa2-xsk.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/dpaa2/dpaa2-xsk.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/dpaa2/dpaa2-xsk.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/dpaa2/dpaa2-xsk.c</a></div><div class='hunk'>@@ -448,7 +448,5 @@ bool dpaa2_xsk_tx(struct dpaa2_eth_priv *priv,</div><div class='ctx'> 		percpu_stats-&gt;tx_errors++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	xsk_tx_release(ch-&gt;xsk_pool);</div><div class='del'>-</div><div class='ctx'> 	return total_enqueued == budget;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/Kconfig b/drivers/net/ethernet/freescale/enetc/Kconfig<br/>index 4d75e6807e92..117038104b69 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/Kconfig</a></div><div class='hunk'>@@ -1,19 +1,39 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> config FSL_ENETC_CORE</div><div class='ctx'> 	tristate</div><div class='add'>+	select NXP_NETC_LIB if NXP_NTMP</div><div class='ctx'> 	help</div><div class='ctx'> 	  This module supports common functionality between the PF and VF</div><div class='ctx'> 	  drivers for the NXP ENETC controller.</div><div class='ctx'> </div><div class='ctx'> 	  If compiled as module (M), the module name is fsl-enetc-core.</div><div class='ctx'> </div><div class='add'>+config NXP_ENETC_PF_COMMON</div><div class='add'>+	tristate</div><div class='add'>+	help</div><div class='add'>+	  This module supports common functionality between drivers of</div><div class='add'>+	  different versions of NXP ENETC PF controllers.</div><div class='add'>+</div><div class='add'>+	  If compiled as module (M), the module name is nxp-enetc-pf-common.</div><div class='add'>+</div><div class='add'>+config NXP_NETC_LIB</div><div class='add'>+	tristate</div><div class='add'>+	help</div><div class='add'>+	  This module provides common functionalities for both ENETC and NETC</div><div class='add'>+	  Switch, such as NETC Table Management Protocol (NTMP) 2.0, common tc</div><div class='add'>+	  flower and debugfs interfaces and so on.</div><div class='add'>+</div><div class='add'>+config NXP_NTMP</div><div class='add'>+	bool</div><div class='add'>+</div><div class='ctx'> config FSL_ENETC</div><div class='ctx'> 	tristate "ENETC PF driver"</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	depends on PCI_MSI</div><div class='del'>-	select MDIO_DEVRES</div><div class='ctx'> 	select FSL_ENETC_CORE</div><div class='ctx'> 	select FSL_ENETC_IERB</div><div class='ctx'> 	select FSL_ENETC_MDIO</div><div class='add'>+	select NXP_ENETC_PF_COMMON</div><div class='ctx'> 	select PHYLINK</div><div class='ctx'> 	select PCS_LYNX</div><div class='ctx'> 	select DIMLIB</div><div class='hunk'>@@ -24,8 +44,27 @@ config FSL_ENETC</div><div class='ctx'> </div><div class='ctx'> 	  If compiled as module (M), the module name is fsl-enetc.</div><div class='ctx'> </div><div class='add'>+config NXP_ENETC4</div><div class='add'>+	tristate "ENETC4 PF driver"</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	depends on PCI_MSI</div><div class='add'>+	select FSL_ENETC_CORE</div><div class='add'>+	select FSL_ENETC_MDIO</div><div class='add'>+	select NXP_ENETC_PF_COMMON</div><div class='add'>+	select NXP_NTMP</div><div class='add'>+	select PHYLINK</div><div class='add'>+	select DIMLIB</div><div class='add'>+	help</div><div class='add'>+	  This driver supports NXP ENETC devices with major revision 4. ENETC is</div><div class='add'>+	  as the NIC functionality in NETC, it supports virtualization/isolation</div><div class='add'>+	  based on PCIe Single Root IO Virtualization (SR-IOV) and a full range</div><div class='add'>+	  of TSN standards and NIC offload capabilities.</div><div class='add'>+</div><div class='add'>+	  If compiled as module (M), the module name is nxp-enetc4.</div><div class='add'>+</div><div class='ctx'> config FSL_ENETC_VF</div><div class='ctx'> 	tristate "ENETC VF driver"</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	depends on PCI_MSI</div><div class='ctx'> 	select FSL_ENETC_CORE</div><div class='ctx'> 	select FSL_ENETC_MDIO</div><div class='hunk'>@@ -47,7 +86,7 @@ config FSL_ENETC_IERB</div><div class='ctx'> </div><div class='ctx'> config FSL_ENETC_MDIO</div><div class='ctx'> 	tristate "ENETC MDIO driver"</div><div class='del'>-	depends on PCI &amp;&amp; MDIO_DEVRES &amp;&amp; MDIO_BUS</div><div class='add'>+	depends on PCI &amp;&amp; PHYLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports NXP ENETC Central MDIO controller as a PCIe</div><div class='ctx'> 	  physical function (PF) device.</div><div class='hunk'>@@ -75,3 +114,17 @@ config FSL_ENETC_QOS</div><div class='ctx'> 	  enable/disable from user space via Qos commands(tc). In the kernel</div><div class='ctx'> 	  side, it can be loaded by Qos driver. Currently, it is only support</div><div class='ctx'> 	  taprio(802.1Qbv) and Credit Based Shaper(802.1Qbu).</div><div class='add'>+</div><div class='add'>+config NXP_NETC_BLK_CTRL</div><div class='add'>+	tristate "NETC blocks control driver"</div><div class='add'>+	help</div><div class='add'>+	  This driver configures Integrated Endpoint Register Block (IERB) and</div><div class='add'>+	  Privileged Register Block (PRB) of NETC. For i.MX platforms, it also</div><div class='add'>+	  includes the configuration of NETCMIX block.</div><div class='add'>+	  The IERB contains registers that are used for pre-boot initialization,</div><div class='add'>+	  debug, and non-customer configuration. The PRB controls global reset</div><div class='add'>+	  and global error handling for NETC. The NETCMIX block is mainly used</div><div class='add'>+	  to set MII protocol and PCS protocol of the links, it also contains</div><div class='add'>+	  settings for some other functions.</div><div class='add'>+</div><div class='add'>+	  If compiled as module (M), the module name is nxp-netc-blk-ctrl.</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/Makefile b/drivers/net/ethernet/freescale/enetc/Makefile<br/>index b13cbbabb2ea..f1c5ad45fd76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/Makefile</a></div><div class='hunk'>@@ -3,11 +3,21 @@</div><div class='ctx'> obj-$(CONFIG_FSL_ENETC_CORE) += fsl-enetc-core.o</div><div class='ctx'> fsl-enetc-core-y := enetc.o enetc_cbdr.o enetc_ethtool.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_NXP_ENETC_PF_COMMON) += nxp-enetc-pf-common.o</div><div class='add'>+nxp-enetc-pf-common-y := enetc_pf_common.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_NXP_NETC_LIB) += nxp-netc-lib.o</div><div class='add'>+nxp-netc-lib-y := ntmp.o</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_FSL_ENETC) += fsl-enetc.o</div><div class='ctx'> fsl-enetc-y := enetc_pf.o</div><div class='ctx'> fsl-enetc-$(CONFIG_PCI_IOV) += enetc_msg.o</div><div class='ctx'> fsl-enetc-$(CONFIG_FSL_ENETC_QOS) += enetc_qos.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_NXP_ENETC4) += nxp-enetc4.o</div><div class='add'>+nxp-enetc4-y := enetc4_pf.o</div><div class='add'>+nxp-enetc4-$(CONFIG_DEBUG_FS) += enetc4_debugfs.o</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_FSL_ENETC_VF) += fsl-enetc-vf.o</div><div class='ctx'> fsl-enetc-vf-y := enetc_vf.o</div><div class='ctx'> </div><div class='hunk'>@@ -19,3 +29,6 @@ fsl-enetc-mdio-y := enetc_pci_mdio.o enetc_mdio.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_FSL_ENETC_PTP_CLOCK) += fsl-enetc-ptp.o</div><div class='ctx'> fsl-enetc-ptp-y := enetc_ptp.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_NXP_NETC_BLK_CTRL) += nxp-netc-blk-ctrl.o</div><div class='add'>+nxp-netc-blk-ctrl-y := netc_blk_ctrl.o</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc.c b/drivers/net/ethernet/freescale/enetc/enetc.c<br/>index 05dedea6185a..d5e5800b84ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "enetc.h"</div><div class='ctx'> #include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/tcp.h&gt;</div><div class='ctx'> #include &lt;linux/udp.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='hunk'>@@ -13,25 +14,73 @@</div><div class='ctx'> </div><div class='ctx'> u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg)</div><div class='ctx'> {</div><div class='add'>+	/* ENETC with pseudo MAC does not have Ethernet MAC</div><div class='add'>+	 * port registers.</div><div class='add'>+	 */</div><div class='add'>+	if (enetc_is_pseudo_mac(si))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	return enetc_port_rd(&amp;si-&gt;hw, reg);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_port_mac_rd);</div><div class='ctx'> </div><div class='ctx'> void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val)</div><div class='ctx'> {</div><div class='add'>+	if (enetc_is_pseudo_mac(si))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	enetc_port_wr(&amp;si-&gt;hw, reg, val);</div><div class='ctx'> 	if (si-&gt;hw_features &amp; ENETC_SI_F_QBU)</div><div class='del'>-		enetc_port_wr(&amp;si-&gt;hw, reg + ENETC_PMAC_OFFSET, val);</div><div class='add'>+		enetc_port_wr(&amp;si-&gt;hw, reg + si-&gt;drvdata-&gt;pmac_offset, val);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_port_mac_wr);</div><div class='ctx'> </div><div class='ctx'> static void enetc_change_preemptible_tcs(struct enetc_ndev_priv *priv,</div><div class='ctx'> 					 u8 preemptible_tcs)</div><div class='ctx'> {</div><div class='add'>+	if (!(priv-&gt;si-&gt;hw_features &amp; ENETC_SI_F_QBU))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;preemptible_tcs = preemptible_tcs;</div><div class='ctx'> 	enetc_mm_commit_preemptible_tcs(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int enetc_mac_addr_hash_idx(const u8 *addr)</div><div class='add'>+{</div><div class='add'>+	u64 fold = __swab64(ether_addr_to_u64(addr)) &gt;&gt; 16;</div><div class='add'>+	u64 mask = 0;</div><div class='add'>+	int res = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++)</div><div class='add'>+		mask |= BIT_ULL(i * 6);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 6; i++)</div><div class='add'>+		res |= (hweight64(fold &amp; (mask &lt;&lt; i)) &amp; 0x1) &lt;&lt; i;</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter,</div><div class='add'>+				  const unsigned char *addr)</div><div class='add'>+{</div><div class='add'>+	int idx = enetc_mac_addr_hash_idx(addr);</div><div class='add'>+</div><div class='add'>+	/* add hash table entry */</div><div class='add'>+	__set_bit(idx, filter-&gt;mac_hash_table);</div><div class='add'>+	filter-&gt;mac_addr_cnt++;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_add_mac_addr_ht_filter);</div><div class='add'>+</div><div class='add'>+void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter)</div><div class='add'>+{</div><div class='add'>+	filter-&gt;mac_addr_cnt = 0;</div><div class='add'>+</div><div class='add'>+	bitmap_zero(filter-&gt;mac_hash_table,</div><div class='add'>+		    ENETC_MADDR_HASH_TBL_SZ);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_reset_mac_addr_filter);</div><div class='add'>+</div><div class='ctx'> static int enetc_num_stack_tx_queues(struct enetc_ndev_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int num_tx_rings = priv-&gt;num_tx_rings;</div><div class='hunk'>@@ -142,22 +191,181 @@ static int enetc_ptp_parse(struct sk_buff *skb, u8 *udp,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool enetc_tx_csum_offload_check(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	switch (skb-&gt;csum_offset) {</div><div class='add'>+	case offsetof(struct tcphdr, check):</div><div class='add'>+	case offsetof(struct udphdr, check):</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool enetc_skb_is_ipv6(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	return vlan_get_protocol(skb) == htons(ETH_P_IPV6);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool enetc_skb_is_tcp(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	return skb-&gt;csum_offset == offsetof(struct tcphdr, check);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enetc_unwind_tx_frame() - Unwind the DMA mappings of a multi-buffer Tx frame</div><div class='add'>+ * @tx_ring: Pointer to the Tx ring on which the buffer descriptors are located</div><div class='add'>+ * @count: Number of Tx buffer descriptors which need to be unmapped</div><div class='add'>+ * @i: Index of the last successfully mapped Tx buffer descriptor</div><div class='add'>+ */</div><div class='add'>+static void enetc_unwind_tx_frame(struct enetc_bdr *tx_ring, int count, int i)</div><div class='add'>+{</div><div class='add'>+	while (count--) {</div><div class='add'>+		struct enetc_tx_swbd *tx_swbd = &amp;tx_ring-&gt;tx_swbd[i];</div><div class='add'>+</div><div class='add'>+		enetc_free_tx_frame(tx_ring, tx_swbd);</div><div class='add'>+		if (i == 0)</div><div class='add'>+			i = tx_ring-&gt;bd_count;</div><div class='add'>+		i--;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_set_one_step_ts(struct enetc_si *si, bool udp, int offset)</div><div class='add'>+{</div><div class='add'>+	u32 val = ENETC_PM0_SINGLE_STEP_EN;</div><div class='add'>+</div><div class='add'>+	val |= ENETC_SET_SINGLE_STEP_OFFSET(offset);</div><div class='add'>+	if (udp)</div><div class='add'>+		val |= ENETC_PM0_SINGLE_STEP_CH;</div><div class='add'>+</div><div class='add'>+	/* The "Correction" field of a packet is updated based on the</div><div class='add'>+	 * current time and the timestamp provided</div><div class='add'>+	 */</div><div class='add'>+	enetc_port_mac_wr(si, ENETC_PM0_SINGLE_STEP, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_set_one_step_ts(struct enetc_si *si, bool udp, int offset)</div><div class='add'>+{</div><div class='add'>+	u32 val = PM_SINGLE_STEP_EN;</div><div class='add'>+</div><div class='add'>+	val |= PM_SINGLE_STEP_OFFSET_SET(offset);</div><div class='add'>+	if (udp)</div><div class='add'>+		val |= PM_SINGLE_STEP_CH;</div><div class='add'>+</div><div class='add'>+	enetc_port_mac_wr(si, ENETC4_PM_SINGLE_STEP(0), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 enetc_update_ptp_sync_msg(struct enetc_ndev_priv *priv,</div><div class='add'>+				     struct sk_buff *skb, bool csum_offload)</div><div class='add'>+{</div><div class='add'>+	struct enetc_skb_cb *enetc_cb = ENETC_SKB_CB(skb);</div><div class='add'>+	u16 tstamp_off = enetc_cb-&gt;origin_tstamp_off;</div><div class='add'>+	u16 corr_off = enetc_cb-&gt;correction_off;</div><div class='add'>+	struct enetc_si *si = priv-&gt;si;</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='add'>+	__be32 new_sec_l, new_nsec;</div><div class='add'>+	__be16 new_sec_h;</div><div class='add'>+	u32 lo, hi, nsec;</div><div class='add'>+	u8 *data;</div><div class='add'>+	u64 sec;</div><div class='add'>+</div><div class='add'>+	lo = enetc_rd_hot(hw, ENETC_SICTR0);</div><div class='add'>+	hi = enetc_rd_hot(hw, ENETC_SICTR1);</div><div class='add'>+	sec = (u64)hi &lt;&lt; 32 | lo;</div><div class='add'>+	nsec = do_div(sec, 1000000000);</div><div class='add'>+</div><div class='add'>+	/* Update originTimestamp field of Sync packet</div><div class='add'>+	 * - 48 bits seconds field</div><div class='add'>+	 * - 32 bits nanseconds field</div><div class='add'>+	 *</div><div class='add'>+	 * In addition, if csum_offload is false, the UDP checksum needs</div><div class='add'>+	 * to be updated by software after updating originTimestamp field,</div><div class='add'>+	 * otherwise the hardware will calculate the wrong checksum when</div><div class='add'>+	 * updating the correction field and update it to the packet.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	data = skb_mac_header(skb);</div><div class='add'>+	new_sec_h = htons((sec &gt;&gt; 32) &amp; 0xffff);</div><div class='add'>+	new_sec_l = htonl(sec &amp; 0xffffffff);</div><div class='add'>+	new_nsec = htonl(nsec);</div><div class='add'>+	if (enetc_cb-&gt;udp &amp;&amp; !csum_offload) {</div><div class='add'>+		struct udphdr *uh = udp_hdr(skb);</div><div class='add'>+		__be32 old_sec_l, old_nsec;</div><div class='add'>+		__be16 old_sec_h;</div><div class='add'>+</div><div class='add'>+		old_sec_h = *(__be16 *)(data + tstamp_off);</div><div class='add'>+		inet_proto_csum_replace2(&amp;uh-&gt;check, skb, old_sec_h,</div><div class='add'>+					 new_sec_h, false);</div><div class='add'>+</div><div class='add'>+		old_sec_l = *(__be32 *)(data + tstamp_off + 2);</div><div class='add'>+		inet_proto_csum_replace4(&amp;uh-&gt;check, skb, old_sec_l,</div><div class='add'>+					 new_sec_l, false);</div><div class='add'>+</div><div class='add'>+		old_nsec = *(__be32 *)(data + tstamp_off + 6);</div><div class='add'>+		inet_proto_csum_replace4(&amp;uh-&gt;check, skb, old_nsec,</div><div class='add'>+					 new_nsec, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*(__be16 *)(data + tstamp_off) = new_sec_h;</div><div class='add'>+	*(__be32 *)(data + tstamp_off + 2) = new_sec_l;</div><div class='add'>+	*(__be32 *)(data + tstamp_off + 6) = new_nsec;</div><div class='add'>+</div><div class='add'>+	/* Configure single-step register */</div><div class='add'>+	if (is_enetc_rev1(si))</div><div class='add'>+		enetc_set_one_step_ts(si, enetc_cb-&gt;udp, corr_off);</div><div class='add'>+	else</div><div class='add'>+		enetc4_set_one_step_ts(si, enetc_cb-&gt;udp, corr_off);</div><div class='add'>+</div><div class='add'>+	return lo &amp; ENETC_TXBD_TSTAMP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	bool do_vlan, do_onestep_tstamp = false, do_twostep_tstamp = false;</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(tx_ring-&gt;ndev);</div><div class='del'>-	struct enetc_hw *hw = &amp;priv-&gt;si-&gt;hw;</div><div class='add'>+	struct enetc_skb_cb *enetc_cb = ENETC_SKB_CB(skb);</div><div class='ctx'> 	struct enetc_tx_swbd *tx_swbd;</div><div class='ctx'> 	int len = skb_headlen(skb);</div><div class='ctx'> 	union enetc_tx_bd temp_bd;</div><div class='del'>-	u8 msgtype, twostep, udp;</div><div class='add'>+	bool csum_offload = false;</div><div class='ctx'> 	union enetc_tx_bd *txbd;</div><div class='del'>-	u16 offset1, offset2;</div><div class='ctx'> 	int i, count = 0;</div><div class='ctx'> 	skb_frag_t *frag;</div><div class='ctx'> 	unsigned int f;</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> 	u8 flags = 0;</div><div class='add'>+	u32 tstamp;</div><div class='add'>+</div><div class='add'>+	enetc_clear_tx_bd(&amp;temp_bd);</div><div class='add'>+	if (skb-&gt;ip_summed == CHECKSUM_PARTIAL) {</div><div class='add'>+		/* Can not support TSD and checksum offload at the same time */</div><div class='add'>+		if (priv-&gt;active_offloads &amp; ENETC_F_TXCSUM &amp;&amp;</div><div class='add'>+		    enetc_tx_csum_offload_check(skb) &amp;&amp; !tx_ring-&gt;tsd_enable) {</div><div class='add'>+			temp_bd.l3_aux0 = FIELD_PREP(ENETC_TX_BD_L3_START,</div><div class='add'>+						     skb_network_offset(skb));</div><div class='add'>+			temp_bd.l3_aux1 = FIELD_PREP(ENETC_TX_BD_L3_HDR_LEN,</div><div class='add'>+						     skb_network_header_len(skb) / 4);</div><div class='add'>+			temp_bd.l3_aux1 |= FIELD_PREP(ENETC_TX_BD_L3T,</div><div class='add'>+						      enetc_skb_is_ipv6(skb));</div><div class='add'>+			if (enetc_skb_is_tcp(skb))</div><div class='add'>+				temp_bd.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T,</div><div class='add'>+							    ENETC_TXBD_L4T_TCP);</div><div class='add'>+			else</div><div class='add'>+				temp_bd.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T,</div><div class='add'>+							    ENETC_TXBD_L4T_UDP);</div><div class='add'>+			flags |= ENETC_TXBD_FLAGS_CSUM_LSO | ENETC_TXBD_FLAGS_L4CS;</div><div class='add'>+			csum_offload = true;</div><div class='add'>+		} else if (skb_checksum_help(skb)) {</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enetc_cb-&gt;flag &amp; ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {</div><div class='add'>+		do_onestep_tstamp = true;</div><div class='add'>+		tstamp = enetc_update_ptp_sync_msg(priv, skb, csum_offload);</div><div class='add'>+	} else if (enetc_cb-&gt;flag &amp; ENETC_F_TX_TSTAMP) {</div><div class='add'>+		do_twostep_tstamp = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	i = tx_ring-&gt;next_to_use;</div><div class='ctx'> 	txbd = ENETC_TXBD(*tx_ring, i);</div><div class='hunk'>@@ -169,7 +377,6 @@ static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	temp_bd.addr = cpu_to_le64(dma);</div><div class='ctx'> 	temp_bd.buf_len = cpu_to_le16(len);</div><div class='del'>-	temp_bd.lstatus = 0;</div><div class='ctx'> </div><div class='ctx'> 	tx_swbd = &amp;tx_ring-&gt;tx_swbd[i];</div><div class='ctx'> 	tx_swbd-&gt;dma = dma;</div><div class='hunk'>@@ -179,17 +386,6 @@ static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb)</div><div class='ctx'> 	count++;</div><div class='ctx'> </div><div class='ctx'> 	do_vlan = skb_vlan_tag_present(skb);</div><div class='del'>-	if (skb-&gt;cb[0] &amp; ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {</div><div class='del'>-		if (enetc_ptp_parse(skb, &amp;udp, &amp;msgtype, &amp;twostep, &amp;offset1,</div><div class='del'>-				    &amp;offset2) ||</div><div class='del'>-		    msgtype != PTP_MSGTYPE_SYNC || twostep)</div><div class='del'>-			WARN_ONCE(1, "Bad packet for one-step timestamping\n");</div><div class='del'>-		else</div><div class='del'>-			do_onestep_tstamp = true;</div><div class='del'>-	} else if (skb-&gt;cb[0] &amp; ENETC_F_TX_TSTAMP) {</div><div class='del'>-		do_twostep_tstamp = true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	tx_swbd-&gt;do_twostep_tstamp = do_twostep_tstamp;</div><div class='ctx'> 	tx_swbd-&gt;qbv_en = !!(priv-&gt;active_offloads &amp; ENETC_F_QBV);</div><div class='ctx'> 	tx_swbd-&gt;check_wb = tx_swbd-&gt;do_twostep_tstamp || tx_swbd-&gt;qbv_en;</div><div class='hunk'>@@ -232,38 +428,9 @@ static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (do_onestep_tstamp) {</div><div class='del'>-			u32 lo, hi, val;</div><div class='del'>-			u64 sec, nsec;</div><div class='del'>-			u8 *data;</div><div class='del'>-</div><div class='del'>-			lo = enetc_rd_hot(hw, ENETC_SICTR0);</div><div class='del'>-			hi = enetc_rd_hot(hw, ENETC_SICTR1);</div><div class='del'>-			sec = (u64)hi &lt;&lt; 32 | lo;</div><div class='del'>-			nsec = do_div(sec, 1000000000);</div><div class='del'>-</div><div class='ctx'> 			/* Configure extension BD */</div><div class='del'>-			temp_bd.ext.tstamp = cpu_to_le32(lo &amp; 0x3fffffff);</div><div class='add'>+			temp_bd.ext.tstamp = cpu_to_le32(tstamp);</div><div class='ctx'> 			e_flags |= ENETC_TXBD_E_FLAGS_ONE_STEP_PTP;</div><div class='del'>-</div><div class='del'>-			/* Update originTimestamp field of Sync packet</div><div class='del'>-			 * - 48 bits seconds field</div><div class='del'>-			 * - 32 bits nanseconds field</div><div class='del'>-			 */</div><div class='del'>-			data = skb_mac_header(skb);</div><div class='del'>-			*(__be16 *)(data + offset2) =</div><div class='del'>-				htons((sec &gt;&gt; 32) &amp; 0xffff);</div><div class='del'>-			*(__be32 *)(data + offset2 + 2) =</div><div class='del'>-				htonl(sec &amp; 0xffffffff);</div><div class='del'>-			*(__be32 *)(data + offset2 + 6) = htonl(nsec);</div><div class='del'>-</div><div class='del'>-			/* Configure single-step register */</div><div class='del'>-			val = ENETC_PM0_SINGLE_STEP_EN;</div><div class='del'>-			val |= ENETC_SET_SINGLE_STEP_OFFSET(offset1);</div><div class='del'>-			if (udp)</div><div class='del'>-				val |= ENETC_PM0_SINGLE_STEP_CH;</div><div class='del'>-</div><div class='del'>-			enetc_port_mac_wr(priv-&gt;si, ENETC_PM0_SINGLE_STEP,</div><div class='del'>-					  val);</div><div class='ctx'> 		} else if (do_twostep_tstamp) {</div><div class='ctx'> 			skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='ctx'> 			e_flags |= ENETC_TXBD_E_FLAGS_TWO_STEP_PTP;</div><div class='hunk'>@@ -325,25 +492,20 @@ static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb)</div><div class='ctx'> dma_err:</div><div class='ctx'> 	dev_err(tx_ring-&gt;dev, "DMA map error");</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		tx_swbd = &amp;tx_ring-&gt;tx_swbd[i];</div><div class='del'>-		enetc_free_tx_frame(tx_ring, tx_swbd);</div><div class='del'>-		if (i == 0)</div><div class='del'>-			i = tx_ring-&gt;bd_count;</div><div class='del'>-		i--;</div><div class='del'>-	} while (count--);</div><div class='add'>+	enetc_unwind_tx_frame(tx_ring, count, i);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void enetc_map_tx_tso_hdr(struct enetc_bdr *tx_ring, struct sk_buff *skb,</div><div class='del'>-				 struct enetc_tx_swbd *tx_swbd,</div><div class='del'>-				 union enetc_tx_bd *txbd, int *i, int hdr_len,</div><div class='del'>-				 int data_len)</div><div class='add'>+static int enetc_map_tx_tso_hdr(struct enetc_bdr *tx_ring, struct sk_buff *skb,</div><div class='add'>+				struct enetc_tx_swbd *tx_swbd,</div><div class='add'>+				union enetc_tx_bd *txbd, int *i, int hdr_len,</div><div class='add'>+				int data_len)</div><div class='ctx'> {</div><div class='ctx'> 	union enetc_tx_bd txbd_tmp;</div><div class='ctx'> 	u8 flags = 0, e_flags = 0;</div><div class='ctx'> 	dma_addr_t addr;</div><div class='add'>+	int count = 1;</div><div class='ctx'> </div><div class='ctx'> 	enetc_clear_tx_bd(&amp;txbd_tmp);</div><div class='ctx'> 	addr = tx_ring-&gt;tso_headers_dma + *i * TSO_HEADER_SIZE;</div><div class='hunk'>@@ -386,7 +548,10 @@ static void enetc_map_tx_tso_hdr(struct enetc_bdr *tx_ring, struct sk_buff *skb,</div><div class='ctx'> 		/* Write the BD */</div><div class='ctx'> 		txbd_tmp.ext.e_flags = e_flags;</div><div class='ctx'> 		*txbd = txbd_tmp;</div><div class='add'>+		count++;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int enetc_map_tx_tso_data(struct enetc_bdr *tx_ring, struct sk_buff *skb,</div><div class='hunk'>@@ -485,8 +650,233 @@ static void enetc_tso_complete_csum(struct enetc_bdr *tx_ring, struct tso_t *tso</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int enetc_lso_count_descs(const struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	/* 4 BDs: 1 BD for LSO header + 1 BD for extended BD + 1 BD</div><div class='add'>+	 * for linear area data but not include LSO header, namely</div><div class='add'>+	 * skb_headlen(skb) - lso_hdr_len (it may be 0, but that's</div><div class='add'>+	 * okay, we only need to consider the worst case). And 1 BD</div><div class='add'>+	 * for gap.</div><div class='add'>+	 */</div><div class='add'>+	return skb_shinfo(skb)-&gt;nr_frags + 4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc_lso_get_hdr_len(const struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	int hdr_len, tlen;</div><div class='add'>+</div><div class='add'>+	tlen = skb_is_gso_tcp(skb) ? tcp_hdrlen(skb) : sizeof(struct udphdr);</div><div class='add'>+	hdr_len = skb_transport_offset(skb) + tlen;</div><div class='add'>+</div><div class='add'>+	return hdr_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_lso_start(struct sk_buff *skb, struct enetc_lso_t *lso)</div><div class='add'>+{</div><div class='add'>+	lso-&gt;lso_seg_size = skb_shinfo(skb)-&gt;gso_size;</div><div class='add'>+	lso-&gt;ipv6 = enetc_skb_is_ipv6(skb);</div><div class='add'>+	lso-&gt;tcp = skb_is_gso_tcp(skb);</div><div class='add'>+	lso-&gt;l3_hdr_len = skb_network_header_len(skb);</div><div class='add'>+	lso-&gt;l3_start = skb_network_offset(skb);</div><div class='add'>+	lso-&gt;hdr_len = enetc_lso_get_hdr_len(skb);</div><div class='add'>+	lso-&gt;total_len = skb-&gt;len - lso-&gt;hdr_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_lso_map_hdr(struct enetc_bdr *tx_ring, struct sk_buff *skb,</div><div class='add'>+			      int *i, struct enetc_lso_t *lso)</div><div class='add'>+{</div><div class='add'>+	union enetc_tx_bd txbd_tmp, *txbd;</div><div class='add'>+	struct enetc_tx_swbd *tx_swbd;</div><div class='add'>+	u16 frm_len, frm_len_ext;</div><div class='add'>+	u8 flags, e_flags = 0;</div><div class='add'>+	dma_addr_t addr;</div><div class='add'>+	char *hdr;</div><div class='add'>+</div><div class='add'>+	/* Get the first BD of the LSO BDs chain */</div><div class='add'>+	txbd = ENETC_TXBD(*tx_ring, *i);</div><div class='add'>+	tx_swbd = &amp;tx_ring-&gt;tx_swbd[*i];</div><div class='add'>+	prefetchw(txbd);</div><div class='add'>+</div><div class='add'>+	/* Prepare LSO header: MAC + IP + TCP/UDP */</div><div class='add'>+	hdr = tx_ring-&gt;tso_headers + *i * TSO_HEADER_SIZE;</div><div class='add'>+	memcpy(hdr, skb-&gt;data, lso-&gt;hdr_len);</div><div class='add'>+	addr = tx_ring-&gt;tso_headers_dma + *i * TSO_HEADER_SIZE;</div><div class='add'>+</div><div class='add'>+	/* {frm_len_ext, frm_len} indicates the total length of</div><div class='add'>+	 * large transmit data unit. frm_len contains the 16 least</div><div class='add'>+	 * significant bits and frm_len_ext contains the 4 most</div><div class='add'>+	 * significant bits.</div><div class='add'>+	 */</div><div class='add'>+	frm_len = lso-&gt;total_len &amp; 0xffff;</div><div class='add'>+	frm_len_ext = (lso-&gt;total_len &gt;&gt; 16) &amp; 0xf;</div><div class='add'>+</div><div class='add'>+	/* Set the flags of the first BD */</div><div class='add'>+	flags = ENETC_TXBD_FLAGS_EX | ENETC_TXBD_FLAGS_CSUM_LSO |</div><div class='add'>+		ENETC_TXBD_FLAGS_LSO | ENETC_TXBD_FLAGS_L4CS;</div><div class='add'>+</div><div class='add'>+	enetc_clear_tx_bd(&amp;txbd_tmp);</div><div class='add'>+	txbd_tmp.addr = cpu_to_le64(addr);</div><div class='add'>+	txbd_tmp.hdr_len = cpu_to_le16(lso-&gt;hdr_len);</div><div class='add'>+</div><div class='add'>+	/* first BD needs frm_len and offload flags set */</div><div class='add'>+	txbd_tmp.frm_len = cpu_to_le16(frm_len);</div><div class='add'>+	txbd_tmp.flags = flags;</div><div class='add'>+</div><div class='add'>+	txbd_tmp.l3_aux0 = FIELD_PREP(ENETC_TX_BD_L3_START, lso-&gt;l3_start);</div><div class='add'>+	/* l3_hdr_size in 32-bits (4 bytes) */</div><div class='add'>+	txbd_tmp.l3_aux1 = FIELD_PREP(ENETC_TX_BD_L3_HDR_LEN,</div><div class='add'>+				      lso-&gt;l3_hdr_len / 4);</div><div class='add'>+	if (lso-&gt;ipv6)</div><div class='add'>+		txbd_tmp.l3_aux1 |= ENETC_TX_BD_L3T;</div><div class='add'>+	else</div><div class='add'>+		txbd_tmp.l3_aux0 |= ENETC_TX_BD_IPCS;</div><div class='add'>+</div><div class='add'>+	txbd_tmp.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T, lso-&gt;tcp ?</div><div class='add'>+				     ENETC_TXBD_L4T_TCP : ENETC_TXBD_L4T_UDP);</div><div class='add'>+</div><div class='add'>+	/* For the LSO header we do not set the dma address since</div><div class='add'>+	 * we do not want it unmapped when we do cleanup. We still</div><div class='add'>+	 * set len so that we count the bytes sent.</div><div class='add'>+	 */</div><div class='add'>+	tx_swbd-&gt;len = lso-&gt;hdr_len;</div><div class='add'>+	tx_swbd-&gt;do_twostep_tstamp = false;</div><div class='add'>+	tx_swbd-&gt;check_wb = false;</div><div class='add'>+</div><div class='add'>+	/* Actually write the header in the BD */</div><div class='add'>+	*txbd = txbd_tmp;</div><div class='add'>+</div><div class='add'>+	/* Get the next BD, and the next BD is extended BD */</div><div class='add'>+	enetc_bdr_idx_inc(tx_ring, i);</div><div class='add'>+	txbd = ENETC_TXBD(*tx_ring, *i);</div><div class='add'>+	tx_swbd = &amp;tx_ring-&gt;tx_swbd[*i];</div><div class='add'>+	prefetchw(txbd);</div><div class='add'>+</div><div class='add'>+	enetc_clear_tx_bd(&amp;txbd_tmp);</div><div class='add'>+	if (skb_vlan_tag_present(skb)) {</div><div class='add'>+		/* Setup the VLAN fields */</div><div class='add'>+		txbd_tmp.ext.vid = cpu_to_le16(skb_vlan_tag_get(skb));</div><div class='add'>+		txbd_tmp.ext.tpid = ENETC_TPID_8021Q;</div><div class='add'>+		e_flags = ENETC_TXBD_E_FLAGS_VLAN_INS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write the BD */</div><div class='add'>+	txbd_tmp.ext.e_flags = e_flags;</div><div class='add'>+	txbd_tmp.ext.lso_sg_size = cpu_to_le16(lso-&gt;lso_seg_size);</div><div class='add'>+	txbd_tmp.ext.frm_len_ext = cpu_to_le16(frm_len_ext);</div><div class='add'>+	*txbd = txbd_tmp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc_lso_map_data(struct enetc_bdr *tx_ring, struct sk_buff *skb,</div><div class='add'>+			      int *i, struct enetc_lso_t *lso, int *count)</div><div class='add'>+{</div><div class='add'>+	union enetc_tx_bd txbd_tmp, *txbd = NULL;</div><div class='add'>+	struct enetc_tx_swbd *tx_swbd;</div><div class='add'>+	skb_frag_t *frag;</div><div class='add'>+	dma_addr_t dma;</div><div class='add'>+	u8 flags = 0;</div><div class='add'>+	int len, f;</div><div class='add'>+</div><div class='add'>+	len = skb_headlen(skb) - lso-&gt;hdr_len;</div><div class='add'>+	if (len &gt; 0) {</div><div class='add'>+		dma = dma_map_single(tx_ring-&gt;dev, skb-&gt;data + lso-&gt;hdr_len,</div><div class='add'>+				     len, DMA_TO_DEVICE);</div><div class='add'>+		if (dma_mapping_error(tx_ring-&gt;dev, dma))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		enetc_bdr_idx_inc(tx_ring, i);</div><div class='add'>+		txbd = ENETC_TXBD(*tx_ring, *i);</div><div class='add'>+		tx_swbd = &amp;tx_ring-&gt;tx_swbd[*i];</div><div class='add'>+		prefetchw(txbd);</div><div class='add'>+		*count += 1;</div><div class='add'>+</div><div class='add'>+		enetc_clear_tx_bd(&amp;txbd_tmp);</div><div class='add'>+		txbd_tmp.addr = cpu_to_le64(dma);</div><div class='add'>+		txbd_tmp.buf_len = cpu_to_le16(len);</div><div class='add'>+</div><div class='add'>+		tx_swbd-&gt;dma = dma;</div><div class='add'>+		tx_swbd-&gt;len = len;</div><div class='add'>+		tx_swbd-&gt;is_dma_page = 0;</div><div class='add'>+		tx_swbd-&gt;dir = DMA_TO_DEVICE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	frag = &amp;skb_shinfo(skb)-&gt;frags[0];</div><div class='add'>+	for (f = 0; f &lt; skb_shinfo(skb)-&gt;nr_frags; f++, frag++) {</div><div class='add'>+		if (txbd)</div><div class='add'>+			*txbd = txbd_tmp;</div><div class='add'>+</div><div class='add'>+		len = skb_frag_size(frag);</div><div class='add'>+		dma = skb_frag_dma_map(tx_ring-&gt;dev, frag);</div><div class='add'>+		if (dma_mapping_error(tx_ring-&gt;dev, dma))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		/* Get the next BD */</div><div class='add'>+		enetc_bdr_idx_inc(tx_ring, i);</div><div class='add'>+		txbd = ENETC_TXBD(*tx_ring, *i);</div><div class='add'>+		tx_swbd = &amp;tx_ring-&gt;tx_swbd[*i];</div><div class='add'>+		prefetchw(txbd);</div><div class='add'>+		*count += 1;</div><div class='add'>+</div><div class='add'>+		enetc_clear_tx_bd(&amp;txbd_tmp);</div><div class='add'>+		txbd_tmp.addr = cpu_to_le64(dma);</div><div class='add'>+		txbd_tmp.buf_len = cpu_to_le16(len);</div><div class='add'>+</div><div class='add'>+		tx_swbd-&gt;dma = dma;</div><div class='add'>+		tx_swbd-&gt;len = len;</div><div class='add'>+		tx_swbd-&gt;is_dma_page = 1;</div><div class='add'>+		tx_swbd-&gt;dir = DMA_TO_DEVICE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Last BD needs 'F' bit set */</div><div class='add'>+	flags |= ENETC_TXBD_FLAGS_F;</div><div class='add'>+	txbd_tmp.flags = flags;</div><div class='add'>+	*txbd = txbd_tmp;</div><div class='add'>+</div><div class='add'>+	tx_swbd-&gt;is_eof = 1;</div><div class='add'>+	tx_swbd-&gt;skb = skb;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc_lso_hw_offload(struct enetc_bdr *tx_ring, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct enetc_tx_swbd *tx_swbd;</div><div class='add'>+	struct enetc_lso_t lso = {0};</div><div class='add'>+	int err, i, count = 0;</div><div class='add'>+</div><div class='add'>+	/* Initialize the LSO handler */</div><div class='add'>+	enetc_lso_start(skb, &amp;lso);</div><div class='add'>+	i = tx_ring-&gt;next_to_use;</div><div class='add'>+</div><div class='add'>+	enetc_lso_map_hdr(tx_ring, skb, &amp;i, &amp;lso);</div><div class='add'>+	/* First BD and an extend BD */</div><div class='add'>+	count += 2;</div><div class='add'>+</div><div class='add'>+	err = enetc_lso_map_data(tx_ring, skb, &amp;i, &amp;lso, &amp;count);</div><div class='add'>+	if (err)</div><div class='add'>+		goto dma_err;</div><div class='add'>+</div><div class='add'>+	/* Go to the next BD */</div><div class='add'>+	enetc_bdr_idx_inc(tx_ring, &amp;i);</div><div class='add'>+	tx_ring-&gt;next_to_use = i;</div><div class='add'>+	enetc_update_tx_ring_tail(tx_ring);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+</div><div class='add'>+dma_err:</div><div class='add'>+	do {</div><div class='add'>+		tx_swbd = &amp;tx_ring-&gt;tx_swbd[i];</div><div class='add'>+		enetc_free_tx_frame(tx_ring, tx_swbd);</div><div class='add'>+		if (i == 0)</div><div class='add'>+			i = tx_ring-&gt;bd_count;</div><div class='add'>+		i--;</div><div class='add'>+	} while (--count);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int enetc_map_tx_tso_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(tx_ring-&gt;ndev);</div><div class='ctx'> 	int hdr_len, total_len, data_len;</div><div class='ctx'> 	struct enetc_tx_swbd *tx_swbd;</div><div class='ctx'> 	union enetc_tx_bd *txbd;</div><div class='hunk'>@@ -518,9 +908,9 @@ static int enetc_map_tx_tso_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb</div><div class='ctx'> </div><div class='ctx'> 		/* compute the csum over the L4 header */</div><div class='ctx'> 		csum = enetc_tso_hdr_csum(&amp;tso, skb, hdr, hdr_len, &amp;pos);</div><div class='del'>-		enetc_map_tx_tso_hdr(tx_ring, skb, tx_swbd, txbd, &amp;i, hdr_len, data_len);</div><div class='add'>+		count += enetc_map_tx_tso_hdr(tx_ring, skb, tx_swbd, txbd,</div><div class='add'>+					      &amp;i, hdr_len, data_len);</div><div class='ctx'> 		bd_data_num = 0;</div><div class='del'>-		count++;</div><div class='ctx'> </div><div class='ctx'> 		while (data_len &gt; 0) {</div><div class='ctx'> 			int size;</div><div class='hunk'>@@ -544,15 +934,20 @@ static int enetc_map_tx_tso_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb</div><div class='ctx'> 			err = enetc_map_tx_tso_data(tx_ring, skb, tx_swbd, txbd,</div><div class='ctx'> 						    tso.data, size,</div><div class='ctx'> 						    size == data_len);</div><div class='del'>-			if (err)</div><div class='add'>+			if (err) {</div><div class='add'>+				if (i == 0)</div><div class='add'>+					i = tx_ring-&gt;bd_count;</div><div class='add'>+				i--;</div><div class='add'>+</div><div class='ctx'> 				goto err_map_data;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			data_len -= size;</div><div class='ctx'> 			count++;</div><div class='ctx'> 			bd_data_num++;</div><div class='ctx'> 			tso_build_data(skb, &amp;tso, size);</div><div class='ctx'> </div><div class='del'>-			if (unlikely(bd_data_num &gt;= ENETC_MAX_SKB_FRAGS &amp;&amp; data_len))</div><div class='add'>+			if (unlikely(bd_data_num &gt;= priv-&gt;max_frags &amp;&amp; data_len))</div><div class='ctx'> 				goto err_chained_bd;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -574,13 +969,7 @@ err_map_data:</div><div class='ctx'> 	dev_err(tx_ring-&gt;dev, "DMA map error");</div><div class='ctx'> </div><div class='ctx'> err_chained_bd:</div><div class='del'>-	do {</div><div class='del'>-		tx_swbd = &amp;tx_ring-&gt;tx_swbd[i];</div><div class='del'>-		enetc_free_tx_frame(tx_ring, tx_swbd);</div><div class='del'>-		if (i == 0)</div><div class='del'>-			i = tx_ring-&gt;bd_count;</div><div class='del'>-		i--;</div><div class='del'>-	} while (count--);</div><div class='add'>+	enetc_unwind_tx_frame(tx_ring, count, i);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -588,12 +977,13 @@ err_chained_bd:</div><div class='ctx'> static netdev_tx_t enetc_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 				    struct net_device *ndev)</div><div class='ctx'> {</div><div class='add'>+	struct enetc_skb_cb *enetc_cb = ENETC_SKB_CB(skb);</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct enetc_bdr *tx_ring;</div><div class='del'>-	int count, err;</div><div class='add'>+	int count;</div><div class='ctx'> </div><div class='ctx'> 	/* Queue one-step Sync packet if already locked */</div><div class='del'>-	if (skb-&gt;cb[0] &amp; ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {</div><div class='add'>+	if (enetc_cb-&gt;flag &amp; ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {</div><div class='ctx'> 		if (test_and_set_bit_lock(ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS,</div><div class='ctx'> 					  &amp;priv-&gt;flags)) {</div><div class='ctx'> 			skb_queue_tail(&amp;priv-&gt;tx_skbs, skb);</div><div class='hunk'>@@ -604,16 +994,28 @@ static netdev_tx_t enetc_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	tx_ring = priv-&gt;tx_ring[skb-&gt;queue_mapping];</div><div class='ctx'> </div><div class='ctx'> 	if (skb_is_gso(skb)) {</div><div class='del'>-		if (enetc_bd_unused(tx_ring) &lt; tso_count_descs(skb)) {</div><div class='del'>-			netif_stop_subqueue(ndev, tx_ring-&gt;index);</div><div class='del'>-			return NETDEV_TX_BUSY;</div><div class='del'>-		}</div><div class='add'>+		/* LSO data unit lengths of up to 256KB are supported */</div><div class='add'>+		if (priv-&gt;active_offloads &amp; ENETC_F_LSO &amp;&amp;</div><div class='add'>+		    (skb-&gt;len - enetc_lso_get_hdr_len(skb)) &lt;=</div><div class='add'>+		    ENETC_LSO_MAX_DATA_LEN) {</div><div class='add'>+			if (enetc_bd_unused(tx_ring) &lt; enetc_lso_count_descs(skb)) {</div><div class='add'>+				netif_stop_subqueue(ndev, tx_ring-&gt;index);</div><div class='add'>+				return NETDEV_TX_BUSY;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-		enetc_lock_mdio();</div><div class='del'>-		count = enetc_map_tx_tso_buffs(tx_ring, skb);</div><div class='del'>-		enetc_unlock_mdio();</div><div class='add'>+			count = enetc_lso_hw_offload(tx_ring, skb);</div><div class='add'>+		} else {</div><div class='add'>+			if (enetc_bd_unused(tx_ring) &lt; tso_count_descs(skb)) {</div><div class='add'>+				netif_stop_subqueue(ndev, tx_ring-&gt;index);</div><div class='add'>+				return NETDEV_TX_BUSY;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			enetc_lock_mdio();</div><div class='add'>+			count = enetc_map_tx_tso_buffs(tx_ring, skb);</div><div class='add'>+			enetc_unlock_mdio();</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='del'>-		if (unlikely(skb_shinfo(skb)-&gt;nr_frags &gt; ENETC_MAX_SKB_FRAGS))</div><div class='add'>+		if (unlikely(skb_shinfo(skb)-&gt;nr_frags &gt; priv-&gt;max_frags))</div><div class='ctx'> 			if (unlikely(skb_linearize(skb)))</div><div class='ctx'> 				goto drop_packet_err;</div><div class='ctx'> </div><div class='hunk'>@@ -623,11 +1025,6 @@ static netdev_tx_t enetc_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 			return NETDEV_TX_BUSY;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (skb-&gt;ip_summed == CHECKSUM_PARTIAL) {</div><div class='del'>-			err = skb_checksum_help(skb);</div><div class='del'>-			if (err)</div><div class='del'>-				goto drop_packet_err;</div><div class='del'>-		}</div><div class='ctx'> 		enetc_lock_mdio();</div><div class='ctx'> 		count = enetc_map_tx_buffs(tx_ring, skb);</div><div class='ctx'> 		enetc_unlock_mdio();</div><div class='hunk'>@@ -636,7 +1033,7 @@ static netdev_tx_t enetc_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	if (unlikely(!count))</div><div class='ctx'> 		goto drop_packet_err;</div><div class='ctx'> </div><div class='del'>-	if (enetc_bd_unused(tx_ring) &lt; ENETC_TXBDS_MAX_NEEDED)</div><div class='add'>+	if (enetc_bd_unused(tx_ring) &lt; ENETC_TXBDS_MAX_NEEDED(priv-&gt;max_frags))</div><div class='ctx'> 		netif_stop_subqueue(ndev, tx_ring-&gt;index);</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='hunk'>@@ -648,24 +1045,29 @@ drop_packet_err:</div><div class='ctx'> </div><div class='ctx'> netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> {</div><div class='add'>+	struct enetc_skb_cb *enetc_cb = ENETC_SKB_CB(skb);</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	u8 udp, msgtype, twostep;</div><div class='ctx'> 	u16 offset1, offset2;</div><div class='ctx'> </div><div class='del'>-	/* Mark tx timestamp type on skb-&gt;cb[0] if requires */</div><div class='add'>+	/* Mark tx timestamp type on enetc_cb-&gt;flag if requires */</div><div class='ctx'> 	if ((skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP) &amp;&amp;</div><div class='del'>-	    (priv-&gt;active_offloads &amp; ENETC_F_TX_TSTAMP_MASK)) {</div><div class='del'>-		skb-&gt;cb[0] = priv-&gt;active_offloads &amp; ENETC_F_TX_TSTAMP_MASK;</div><div class='del'>-	} else {</div><div class='del'>-		skb-&gt;cb[0] = 0;</div><div class='del'>-	}</div><div class='add'>+	    (priv-&gt;active_offloads &amp; ENETC_F_TX_TSTAMP_MASK))</div><div class='add'>+		enetc_cb-&gt;flag = priv-&gt;active_offloads &amp; ENETC_F_TX_TSTAMP_MASK;</div><div class='add'>+	else</div><div class='add'>+		enetc_cb-&gt;flag = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Fall back to two-step timestamp if not one-step Sync packet */</div><div class='del'>-	if (skb-&gt;cb[0] &amp; ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {</div><div class='add'>+	if (enetc_cb-&gt;flag &amp; ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {</div><div class='ctx'> 		if (enetc_ptp_parse(skb, &amp;udp, &amp;msgtype, &amp;twostep,</div><div class='ctx'> 				    &amp;offset1, &amp;offset2) ||</div><div class='del'>-		    msgtype != PTP_MSGTYPE_SYNC || twostep != 0)</div><div class='del'>-			skb-&gt;cb[0] = ENETC_F_TX_TSTAMP;</div><div class='add'>+		    msgtype != PTP_MSGTYPE_SYNC || twostep != 0) {</div><div class='add'>+			enetc_cb-&gt;flag = ENETC_F_TX_TSTAMP;</div><div class='add'>+		} else {</div><div class='add'>+			enetc_cb-&gt;udp = !!udp;</div><div class='add'>+			enetc_cb-&gt;correction_off = offset1;</div><div class='add'>+			enetc_cb-&gt;origin_tstamp_off = offset2;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return enetc_start_xmit(skb, ndev);</div><div class='hunk'>@@ -700,8 +1102,9 @@ static void enetc_rx_dim_work(struct work_struct *w)</div><div class='ctx'> 		net_dim_get_rx_moderation(dim-&gt;mode, dim-&gt;profile_ix);</div><div class='ctx'> 	struct enetc_int_vector	*v =</div><div class='ctx'> 		container_of(dim, struct enetc_int_vector, rx_dim);</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(v-&gt;rx_ring.ndev);</div><div class='ctx'> </div><div class='del'>-	v-&gt;rx_ictt = enetc_usecs_to_cycles(moder.usec);</div><div class='add'>+	v-&gt;rx_ictt = enetc_usecs_to_cycles(moder.usec, priv-&gt;sysclk_freq);</div><div class='ctx'> 	dim-&gt;state = DIM_START_MEASURE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -856,7 +1259,9 @@ static bool enetc_clean_tx_ring(struct enetc_bdr *tx_ring, int napi_budget)</div><div class='ctx'> 		if (xdp_frame) {</div><div class='ctx'> 			xdp_return_frame(xdp_frame);</div><div class='ctx'> 		} else if (skb) {</div><div class='del'>-			if (unlikely(skb-&gt;cb[0] &amp; ENETC_F_TX_ONESTEP_SYNC_TSTAMP)) {</div><div class='add'>+			struct enetc_skb_cb *enetc_cb = ENETC_SKB_CB(skb);</div><div class='add'>+</div><div class='add'>+			if (unlikely(enetc_cb-&gt;flag &amp; ENETC_F_TX_ONESTEP_SYNC_TSTAMP)) {</div><div class='ctx'> 				/* Start work to release lock for next one-step</div><div class='ctx'> 				 * timestamping packet. And send one skb in</div><div class='ctx'> 				 * tx_skbs queue if has.</div><div class='hunk'>@@ -903,7 +1308,8 @@ static bool enetc_clean_tx_ring(struct enetc_bdr *tx_ring, int napi_budget)</div><div class='ctx'> 	if (unlikely(tx_frm_cnt &amp;&amp; netif_carrier_ok(ndev) &amp;&amp;</div><div class='ctx'> 		     __netif_subqueue_stopped(ndev, tx_ring-&gt;index) &amp;&amp;</div><div class='ctx'> 		     !test_bit(ENETC_TX_DOWN, &amp;priv-&gt;flags) &amp;&amp;</div><div class='del'>-		     (enetc_bd_unused(tx_ring) &gt;= ENETC_TXBDS_MAX_NEEDED))) {</div><div class='add'>+		     (enetc_bd_unused(tx_ring) &gt;=</div><div class='add'>+		      ENETC_TXBDS_MAX_NEEDED(priv-&gt;max_frags)))) {</div><div class='ctx'> 		netif_wake_subqueue(ndev, tx_ring-&gt;index);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1016,6 +1422,7 @@ static void enetc_get_offloads(struct enetc_bdr *rx_ring,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (le16_to_cpu(rxbd-&gt;r.flags) &amp; ENETC_RXBD_FLAG_VLAN) {</div><div class='add'>+		struct enetc_hw *hw = &amp;priv-&gt;si-&gt;hw;</div><div class='ctx'> 		__be16 tpid = 0;</div><div class='ctx'> </div><div class='ctx'> 		switch (le16_to_cpu(rxbd-&gt;r.flags) &amp; ENETC_RXBD_FLAG_TPID) {</div><div class='hunk'>@@ -1026,22 +1433,18 @@ static void enetc_get_offloads(struct enetc_bdr *rx_ring,</div><div class='ctx'> 			tpid = htons(ETH_P_8021AD);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 2:</div><div class='del'>-			tpid = htons(enetc_port_rd(&amp;priv-&gt;si-&gt;hw,</div><div class='del'>-						   ENETC_PCVLANR1));</div><div class='add'>+			tpid = htons(enetc_rd_hot(hw, ENETC_SICVLANR1) &amp;</div><div class='add'>+				     SICVLANR_ETYPE);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 3:</div><div class='del'>-			tpid = htons(enetc_port_rd(&amp;priv-&gt;si-&gt;hw,</div><div class='del'>-						   ENETC_PCVLANR2));</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='add'>+			tpid = htons(enetc_rd_hot(hw, ENETC_SICVLANR2) &amp;</div><div class='add'>+				     SICVLANR_ETYPE);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		__vlan_hwaccel_put_tag(skb, tpid, le16_to_cpu(rxbd-&gt;r.vlan_opt));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK) &amp;&amp;</div><div class='del'>-	    (priv-&gt;active_offloads &amp; ENETC_F_RX_TSTAMP))</div><div class='add'>+	if (priv-&gt;active_offloads &amp; ENETC_F_RX_TSTAMP)</div><div class='ctx'> 		enetc_get_rx_tstamp(rx_ring-&gt;ndev, rxbd, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1201,6 +1604,8 @@ static int enetc_clean_rx_ring(struct enetc_bdr *rx_ring,</div><div class='ctx'> 	/* next descriptor to process */</div><div class='ctx'> 	i = rx_ring-&gt;next_to_clean;</div><div class='ctx'> </div><div class='add'>+	enetc_lock_mdio();</div><div class='add'>+</div><div class='ctx'> 	while (likely(rx_frm_cnt &lt; work_limit)) {</div><div class='ctx'> 		union enetc_rx_bd *rxbd;</div><div class='ctx'> 		struct sk_buff *skb;</div><div class='hunk'>@@ -1236,7 +1641,9 @@ static int enetc_clean_rx_ring(struct enetc_bdr *rx_ring,</div><div class='ctx'> 		rx_byte_cnt += skb-&gt;len + ETH_HLEN;</div><div class='ctx'> 		rx_frm_cnt++;</div><div class='ctx'> </div><div class='add'>+		enetc_unlock_mdio();</div><div class='ctx'> 		napi_gro_receive(napi, skb);</div><div class='add'>+		enetc_lock_mdio();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rx_ring-&gt;next_to_clean = i;</div><div class='hunk'>@@ -1244,6 +1651,8 @@ static int enetc_clean_rx_ring(struct enetc_bdr *rx_ring,</div><div class='ctx'> 	rx_ring-&gt;stats.packets += rx_frm_cnt;</div><div class='ctx'> 	rx_ring-&gt;stats.bytes += rx_byte_cnt;</div><div class='ctx'> </div><div class='add'>+	enetc_unlock_mdio();</div><div class='add'>+</div><div class='ctx'> 	return rx_frm_cnt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1527,6 +1936,16 @@ static void enetc_xdp_drop(struct enetc_bdr *rx_ring, int rx_ring_first,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void enetc_bulk_flip_buff(struct enetc_bdr *rx_ring, int rx_ring_first,</div><div class='add'>+				 int rx_ring_last)</div><div class='add'>+{</div><div class='add'>+	while (rx_ring_first != rx_ring_last) {</div><div class='add'>+		enetc_flip_rx_buff(rx_ring,</div><div class='add'>+				   &amp;rx_ring-&gt;rx_swbd[rx_ring_first]);</div><div class='add'>+		enetc_bdr_idx_inc(rx_ring, &amp;rx_ring_first);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int enetc_clean_rx_ring_xdp(struct enetc_bdr *rx_ring,</div><div class='ctx'> 				   struct napi_struct *napi, int work_limit,</div><div class='ctx'> 				   struct bpf_prog *prog)</div><div class='hunk'>@@ -1543,13 +1962,14 @@ static int enetc_clean_rx_ring_xdp(struct enetc_bdr *rx_ring,</div><div class='ctx'> 	/* next descriptor to process */</div><div class='ctx'> 	i = rx_ring-&gt;next_to_clean;</div><div class='ctx'> </div><div class='add'>+	enetc_lock_mdio();</div><div class='add'>+</div><div class='ctx'> 	while (likely(rx_frm_cnt &lt; work_limit)) {</div><div class='ctx'> 		union enetc_rx_bd *rxbd, *orig_rxbd;</div><div class='del'>-		int orig_i, orig_cleaned_cnt;</div><div class='ctx'> 		struct xdp_buff xdp_buff;</div><div class='ctx'> 		struct sk_buff *skb;</div><div class='add'>+		int orig_i, err;</div><div class='ctx'> 		u32 bd_status;</div><div class='del'>-		int err;</div><div class='ctx'> </div><div class='ctx'> 		rxbd = enetc_rxbd(rx_ring, i);</div><div class='ctx'> 		bd_status = le32_to_cpu(rxbd-&gt;r.lstatus);</div><div class='hunk'>@@ -1564,7 +1984,6 @@ static int enetc_clean_rx_ring_xdp(struct enetc_bdr *rx_ring,</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		orig_rxbd = rxbd;</div><div class='del'>-		orig_cleaned_cnt = cleaned_cnt;</div><div class='ctx'> 		orig_i = i;</div><div class='ctx'> </div><div class='ctx'> 		enetc_build_xdp_buff(rx_ring, bd_status, &amp;rxbd, &amp;i,</div><div class='hunk'>@@ -1592,17 +2011,25 @@ static int enetc_clean_rx_ring_xdp(struct enetc_bdr *rx_ring,</div><div class='ctx'> 			rx_ring-&gt;stats.xdp_drops++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case XDP_PASS:</div><div class='del'>-			rxbd = orig_rxbd;</div><div class='del'>-			cleaned_cnt = orig_cleaned_cnt;</div><div class='del'>-			i = orig_i;</div><div class='del'>-</div><div class='del'>-			skb = enetc_build_skb(rx_ring, bd_status, &amp;rxbd,</div><div class='del'>-					      &amp;i, &amp;cleaned_cnt,</div><div class='del'>-					      ENETC_RXB_DMA_SIZE_XDP);</div><div class='del'>-			if (unlikely(!skb))</div><div class='add'>+			skb = xdp_build_skb_from_buff(&amp;xdp_buff);</div><div class='add'>+			/* Probably under memory pressure, stop NAPI */</div><div class='add'>+			if (unlikely(!skb)) {</div><div class='add'>+				enetc_xdp_drop(rx_ring, orig_i, i);</div><div class='add'>+				rx_ring-&gt;stats.xdp_drops++;</div><div class='ctx'> 				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			enetc_get_offloads(rx_ring, orig_rxbd, skb);</div><div class='ctx'> </div><div class='add'>+			/* These buffers are about to be owned by the stack.</div><div class='add'>+			 * Update our buffer cache (the rx_swbd array elements)</div><div class='add'>+			 * with their other page halves.</div><div class='add'>+			 */</div><div class='add'>+			enetc_bulk_flip_buff(rx_ring, orig_i, i);</div><div class='add'>+</div><div class='add'>+			enetc_unlock_mdio();</div><div class='ctx'> 			napi_gro_receive(napi, skb);</div><div class='add'>+			enetc_lock_mdio();</div><div class='ctx'> 			break;</div><div class='ctx'> 		case XDP_TX:</div><div class='ctx'> 			tx_ring = priv-&gt;xdp_tx_ring[rx_ring-&gt;index];</div><div class='hunk'>@@ -1620,7 +2047,7 @@ static int enetc_clean_rx_ring_xdp(struct enetc_bdr *rx_ring,</div><div class='ctx'> 				enetc_xdp_drop(rx_ring, orig_i, i);</div><div class='ctx'> 				tx_ring-&gt;stats.xdp_tx_drops++;</div><div class='ctx'> 			} else {</div><div class='del'>-				tx_ring-&gt;stats.xdp_tx += xdp_tx_bd_cnt;</div><div class='add'>+				tx_ring-&gt;stats.xdp_tx++;</div><div class='ctx'> 				rx_ring-&gt;xdp.xdp_tx_in_flight += xdp_tx_bd_cnt;</div><div class='ctx'> 				xdp_tx_frm_cnt++;</div><div class='ctx'> 				/* The XDP_TX enqueue was successful, so we</div><div class='hunk'>@@ -1637,16 +2064,14 @@ static int enetc_clean_rx_ring_xdp(struct enetc_bdr *rx_ring,</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case XDP_REDIRECT:</div><div class='add'>+			enetc_unlock_mdio();</div><div class='ctx'> 			err = xdp_do_redirect(rx_ring-&gt;ndev, &amp;xdp_buff, prog);</div><div class='add'>+			enetc_lock_mdio();</div><div class='ctx'> 			if (unlikely(err)) {</div><div class='ctx'> 				enetc_xdp_drop(rx_ring, orig_i, i);</div><div class='ctx'> 				rx_ring-&gt;stats.xdp_redirect_failures++;</div><div class='ctx'> 			} else {</div><div class='del'>-				while (orig_i != i) {</div><div class='del'>-					enetc_flip_rx_buff(rx_ring,</div><div class='del'>-							   &amp;rx_ring-&gt;rx_swbd[orig_i]);</div><div class='del'>-					enetc_bdr_idx_inc(rx_ring, &amp;orig_i);</div><div class='del'>-				}</div><div class='add'>+				enetc_bulk_flip_buff(rx_ring, orig_i, i);</div><div class='ctx'> 				xdp_redirect_frm_cnt++;</div><div class='ctx'> 				rx_ring-&gt;stats.xdp_redirect++;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1661,8 +2086,11 @@ out:</div><div class='ctx'> 	rx_ring-&gt;stats.packets += rx_frm_cnt;</div><div class='ctx'> 	rx_ring-&gt;stats.bytes += rx_byte_cnt;</div><div class='ctx'> </div><div class='del'>-	if (xdp_redirect_frm_cnt)</div><div class='add'>+	if (xdp_redirect_frm_cnt) {</div><div class='add'>+		enetc_unlock_mdio();</div><div class='ctx'> 		xdp_do_flush();</div><div class='add'>+		enetc_lock_mdio();</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (xdp_tx_frm_cnt)</div><div class='ctx'> 		enetc_update_tx_ring_tail(tx_ring);</div><div class='hunk'>@@ -1671,6 +2099,8 @@ out:</div><div class='ctx'> 		enetc_refill_rx_ring(rx_ring, enetc_bd_unused(rx_ring) -</div><div class='ctx'> 				     rx_ring-&gt;xdp.xdp_tx_in_flight);</div><div class='ctx'> </div><div class='add'>+	enetc_unlock_mdio();</div><div class='add'>+</div><div class='ctx'> 	return rx_frm_cnt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1689,6 +2119,7 @@ static int enetc_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	for (i = 0; i &lt; v-&gt;count_tx_rings; i++)</div><div class='ctx'> 		if (!enetc_clean_tx_ring(&amp;v-&gt;tx_ring[i], budget))</div><div class='ctx'> 			complete = false;</div><div class='add'>+	enetc_unlock_mdio();</div><div class='ctx'> </div><div class='ctx'> 	prog = rx_ring-&gt;xdp.prog;</div><div class='ctx'> 	if (prog)</div><div class='hunk'>@@ -1700,10 +2131,8 @@ static int enetc_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	if (work_done)</div><div class='ctx'> 		v-&gt;rx_napi_work = true;</div><div class='ctx'> </div><div class='del'>-	if (!complete) {</div><div class='del'>-		enetc_unlock_mdio();</div><div class='add'>+	if (!complete)</div><div class='ctx'> 		return budget;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	napi_complete_done(napi, work_done);</div><div class='ctx'> </div><div class='hunk'>@@ -1712,6 +2141,7 @@ static int enetc_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	v-&gt;rx_napi_work = false;</div><div class='ctx'> </div><div class='add'>+	enetc_lock_mdio();</div><div class='ctx'> 	/* enable interrupts */</div><div class='ctx'> 	enetc_wr_reg_hot(v-&gt;rbier, ENETC_RBIER_RXTIE);</div><div class='ctx'> </div><div class='hunk'>@@ -1736,9 +2166,15 @@ void enetc_get_si_caps(struct enetc_si *si)</div><div class='ctx'> 	si-&gt;num_rx_rings = (val &gt;&gt; 16) &amp; 0xff;</div><div class='ctx'> 	si-&gt;num_tx_rings = val &amp; 0xff;</div><div class='ctx'> </div><div class='del'>-	val = enetc_rd(hw, ENETC_SIRFSCAPR);</div><div class='del'>-	si-&gt;num_fs_entries = ENETC_SIRFSCAPR_GET_NUM_RFS(val);</div><div class='del'>-	si-&gt;num_fs_entries = min(si-&gt;num_fs_entries, ENETC_MAX_RFS_SIZE);</div><div class='add'>+	val = enetc_rd(hw, ENETC_SIPCAPR0);</div><div class='add'>+	if (val &amp; ENETC_SIPCAPR0_RFS) {</div><div class='add'>+		val = enetc_rd(hw, ENETC_SIRFSCAPR);</div><div class='add'>+		si-&gt;num_fs_entries = ENETC_SIRFSCAPR_GET_NUM_RFS(val);</div><div class='add'>+		si-&gt;num_fs_entries = min(si-&gt;num_fs_entries, ENETC_MAX_RFS_SIZE);</div><div class='add'>+	} else {</div><div class='add'>+		/* ENETC which not supports RFS */</div><div class='add'>+		si-&gt;num_fs_entries = 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	si-&gt;num_rss = 0;</div><div class='ctx'> 	val = enetc_rd(hw, ENETC_SIPCAPR0);</div><div class='hunk'>@@ -1749,14 +2185,8 @@ void enetc_get_si_caps(struct enetc_si *si)</div><div class='ctx'> 		si-&gt;num_rss = ENETC_SIRSSCAPR_GET_NUM_RSS(rss);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (val &amp; ENETC_SIPCAPR0_QBV)</div><div class='del'>-		si-&gt;hw_features |= ENETC_SI_F_QBV;</div><div class='del'>-</div><div class='del'>-	if (val &amp; ENETC_SIPCAPR0_QBU)</div><div class='del'>-		si-&gt;hw_features |= ENETC_SI_F_QBU;</div><div class='del'>-</div><div class='del'>-	if (val &amp; ENETC_SIPCAPR0_PSFP)</div><div class='del'>-		si-&gt;hw_features |= ENETC_SI_F_PSFP;</div><div class='add'>+	if (val &amp; ENETC_SIPCAPR0_LSO)</div><div class='add'>+		si-&gt;hw_features |= ENETC_SI_F_LSO;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_get_si_caps);</div><div class='ctx'> </div><div class='hunk'>@@ -2046,13 +2476,35 @@ static int enetc_setup_default_rss_table(struct enetc_si *si, int num_groups)</div><div class='ctx'> 	for (i = 0; i &lt; si-&gt;num_rss; i++)</div><div class='ctx'> 		rss_table[i] = i % num_groups;</div><div class='ctx'> </div><div class='del'>-	enetc_set_rss_table(si, rss_table, si-&gt;num_rss);</div><div class='add'>+	si-&gt;ops-&gt;set_rss_table(si, rss_table, si-&gt;num_rss);</div><div class='ctx'> </div><div class='ctx'> 	kfree(rss_table);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void enetc_set_lso_flags_mask(struct enetc_hw *hw)</div><div class='add'>+{</div><div class='add'>+	enetc_wr(hw, ENETC4_SILSOSFMR0,</div><div class='add'>+		 SILSOSFMR0_VAL_SET(ENETC4_TCP_NL_SEG_FLAGS_DMASK,</div><div class='add'>+				    ENETC4_TCP_NL_SEG_FLAGS_DMASK));</div><div class='add'>+	enetc_wr(hw, ENETC4_SILSOSFMR1, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_set_rss(struct net_device *ndev, int en)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct enetc_hw *hw = &amp;priv-&gt;si-&gt;hw;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	enetc_wr(hw, ENETC_SIRBGCR, priv-&gt;num_rx_rings);</div><div class='add'>+</div><div class='add'>+	reg = enetc_rd(hw, ENETC_SIMR);</div><div class='add'>+	reg &amp;= ~ENETC_SIMR_RSSE;</div><div class='add'>+	reg |= (en) ? ENETC_SIMR_RSSE : 0;</div><div class='add'>+	enetc_wr(hw, ENETC_SIMR, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int enetc_configure_si(struct enetc_ndev_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_si *si = priv-&gt;si;</div><div class='hunk'>@@ -2066,10 +2518,16 @@ int enetc_configure_si(struct enetc_ndev_priv *priv)</div><div class='ctx'> 	/* enable SI */</div><div class='ctx'> 	enetc_wr(hw, ENETC_SIMR, ENETC_SIMR_EN);</div><div class='ctx'> </div><div class='add'>+	if (si-&gt;hw_features &amp; ENETC_SI_F_LSO)</div><div class='add'>+		enetc_set_lso_flags_mask(hw);</div><div class='add'>+</div><div class='ctx'> 	if (si-&gt;num_rss) {</div><div class='ctx'> 		err = enetc_setup_default_rss_table(si, priv-&gt;num_rx_rings);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;ndev-&gt;features &amp; NETIF_F_RXHASH)</div><div class='add'>+			enetc_set_rss(priv-&gt;ndev, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2090,9 +2548,9 @@ void enetc_init_si_rings_params(struct enetc_ndev_priv *priv)</div><div class='ctx'> 	 */</div><div class='ctx'> 	priv-&gt;num_rx_rings = min_t(int, cpus, si-&gt;num_rx_rings);</div><div class='ctx'> 	priv-&gt;num_tx_rings = si-&gt;num_tx_rings;</div><div class='del'>-	priv-&gt;bdr_int_num = cpus;</div><div class='add'>+	priv-&gt;bdr_int_num = priv-&gt;num_rx_rings;</div><div class='ctx'> 	priv-&gt;ic_mode = ENETC_IC_RX_ADAPTIVE | ENETC_IC_TX_MANUAL;</div><div class='del'>-	priv-&gt;tx_ictt = ENETC_TXIC_TIMETHR;</div><div class='add'>+	priv-&gt;tx_ictt = enetc_usecs_to_cycles(600, priv-&gt;sysclk_freq);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_init_si_rings_params);</div><div class='ctx'> </div><div class='hunk'>@@ -2501,10 +2959,14 @@ int enetc_open(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	extended = !!(priv-&gt;active_offloads &amp; ENETC_F_RX_TSTAMP);</div><div class='ctx'> </div><div class='del'>-	err = enetc_setup_irqs(priv);</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;ref_clk);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	err = enetc_setup_irqs(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_setup_irqs;</div><div class='add'>+</div><div class='ctx'> 	err = enetc_phylink_connect(ndev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_phy_connect;</div><div class='hunk'>@@ -2536,6 +2998,8 @@ err_alloc_tx:</div><div class='ctx'> 		phylink_disconnect_phy(priv-&gt;phylink);</div><div class='ctx'> err_phy_connect:</div><div class='ctx'> 	enetc_free_irqs(priv);</div><div class='add'>+err_setup_irqs:</div><div class='add'>+	clk_disable_unprepare(priv-&gt;ref_clk);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -2589,6 +3053,7 @@ int enetc_close(struct net_device *ndev)</div><div class='ctx'> 	enetc_assign_tx_resources(priv, NULL);</div><div class='ctx'> </div><div class='ctx'> 	enetc_free_irqs(priv);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;ref_clk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2855,22 +3320,6 @@ struct net_device_stats *enetc_get_stats(struct net_device *ndev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_get_stats);</div><div class='ctx'> </div><div class='del'>-static int enetc_set_rss(struct net_device *ndev, int en)</div><div class='del'>-{</div><div class='del'>-	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct enetc_hw *hw = &amp;priv-&gt;si-&gt;hw;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	enetc_wr(hw, ENETC_SIRBGCR, priv-&gt;num_rx_rings);</div><div class='del'>-</div><div class='del'>-	reg = enetc_rd(hw, ENETC_SIMR);</div><div class='del'>-	reg &amp;= ~ENETC_SIMR_RSSE;</div><div class='del'>-	reg |= (en) ? ENETC_SIMR_RSSE : 0;</div><div class='del'>-	enetc_wr(hw, ENETC_SIMR, reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void enetc_enable_rxvlan(struct net_device *ndev, bool en)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='hunk'>@@ -2908,16 +3357,17 @@ void enetc_set_features(struct net_device *ndev, netdev_features_t features)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_set_features);</div><div class='ctx'> </div><div class='del'>-static int enetc_hwtstamp_set(struct net_device *ndev, struct ifreq *ifr)</div><div class='add'>+int enetc_hwtstamp_set(struct net_device *ndev,</div><div class='add'>+		       struct kernel_hwtstamp_config *config,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	int err, new_offloads = priv-&gt;active_offloads;</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	if (!enetc_ptp_clock_is_enabled(priv-&gt;si))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 		new_offloads &amp;= ~ENETC_F_TX_TSTAMP_MASK;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2926,6 +3376,10 @@ static int enetc_hwtstamp_set(struct net_device *ndev, struct ifreq *ifr)</div><div class='ctx'> 		new_offloads |= ENETC_F_TX_TSTAMP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_TX_ONESTEP_SYNC:</div><div class='add'>+		if (!enetc_si_is_pf(priv-&gt;si) ||</div><div class='add'>+		    enetc_is_pseudo_mac(priv-&gt;si))</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 		new_offloads &amp;= ~ENETC_F_TX_TSTAMP_MASK;</div><div class='ctx'> 		new_offloads |= ENETC_F_TX_ONESTEP_SYNC_TSTAMP;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2933,13 +3387,13 @@ static int enetc_hwtstamp_set(struct net_device *ndev, struct ifreq *ifr)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		new_offloads &amp;= ~ENETC_F_RX_TSTAMP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		new_offloads |= ENETC_F_RX_TSTAMP;</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((new_offloads ^ priv-&gt;active_offloads) &amp; ENETC_F_RX_TSTAMP) {</div><div class='hunk'>@@ -2952,42 +3406,36 @@ static int enetc_hwtstamp_set(struct net_device *ndev, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;active_offloads = new_offloads;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-	       -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_hwtstamp_set);</div><div class='ctx'> </div><div class='del'>-static int enetc_hwtstamp_get(struct net_device *ndev, struct ifreq *ifr)</div><div class='add'>+int enetc_hwtstamp_get(struct net_device *ndev,</div><div class='add'>+		       struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> </div><div class='del'>-	config.flags = 0;</div><div class='add'>+	if (!enetc_ptp_clock_is_enabled(priv-&gt;si))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;active_offloads &amp; ENETC_F_TX_ONESTEP_SYNC_TSTAMP)</div><div class='del'>-		config.tx_type = HWTSTAMP_TX_ONESTEP_SYNC;</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_ONESTEP_SYNC;</div><div class='ctx'> 	else if (priv-&gt;active_offloads &amp; ENETC_F_TX_TSTAMP)</div><div class='del'>-		config.tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='ctx'> 	else</div><div class='del'>-		config.tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='ctx'> </div><div class='del'>-	config.rx_filter = (priv-&gt;active_offloads &amp; ENETC_F_RX_TSTAMP) ?</div><div class='del'>-			    HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;</div><div class='add'>+	config-&gt;rx_filter = (priv-&gt;active_offloads &amp; ENETC_F_RX_TSTAMP) ?</div><div class='add'>+			     HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-	       -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_hwtstamp_get);</div><div class='ctx'> </div><div class='ctx'> int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK)) {</div><div class='del'>-		if (cmd == SIOCSHWTSTAMP)</div><div class='del'>-			return enetc_hwtstamp_set(ndev, rq);</div><div class='del'>-		if (cmd == SIOCGHWTSTAMP)</div><div class='del'>-			return enetc_hwtstamp_get(ndev, rq);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (!priv-&gt;phylink)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='hunk'>@@ -2995,13 +3443,100 @@ int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_ioctl);</div><div class='ctx'> </div><div class='add'>+static int enetc_int_vector_init(struct enetc_ndev_priv *priv, int i,</div><div class='add'>+				 int v_tx_rings)</div><div class='add'>+{</div><div class='add'>+	struct enetc_int_vector *v;</div><div class='add'>+	struct enetc_bdr *bdr;</div><div class='add'>+	int j, err;</div><div class='add'>+</div><div class='add'>+	v = kzalloc(struct_size(v, tx_ring, v_tx_rings), GFP_KERNEL);</div><div class='add'>+	if (!v)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;int_vector[i] = v;</div><div class='add'>+	bdr = &amp;v-&gt;rx_ring;</div><div class='add'>+	bdr-&gt;index = i;</div><div class='add'>+	bdr-&gt;ndev = priv-&gt;ndev;</div><div class='add'>+	bdr-&gt;dev = priv-&gt;dev;</div><div class='add'>+	bdr-&gt;bd_count = priv-&gt;rx_bd_count;</div><div class='add'>+	bdr-&gt;buffer_offset = ENETC_RXB_PAD;</div><div class='add'>+	priv-&gt;rx_ring[i] = bdr;</div><div class='add'>+</div><div class='add'>+	err = __xdp_rxq_info_reg(&amp;bdr-&gt;xdp.rxq, priv-&gt;ndev, i, 0,</div><div class='add'>+				 ENETC_RXB_DMA_SIZE_XDP);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_vector;</div><div class='add'>+</div><div class='add'>+	err = xdp_rxq_info_reg_mem_model(&amp;bdr-&gt;xdp.rxq, MEM_TYPE_PAGE_SHARED,</div><div class='add'>+					 NULL);</div><div class='add'>+	if (err) {</div><div class='add'>+		xdp_rxq_info_unreg(&amp;bdr-&gt;xdp.rxq);</div><div class='add'>+		goto free_vector;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* init defaults for adaptive IC */</div><div class='add'>+	if (priv-&gt;ic_mode &amp; ENETC_IC_RX_ADAPTIVE) {</div><div class='add'>+		v-&gt;rx_ictt = 0x1;</div><div class='add'>+		v-&gt;rx_dim_en = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;v-&gt;rx_dim.work, enetc_rx_dim_work);</div><div class='add'>+	netif_napi_add(priv-&gt;ndev, &amp;v-&gt;napi, enetc_poll);</div><div class='add'>+	v-&gt;count_tx_rings = v_tx_rings;</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; v_tx_rings; j++) {</div><div class='add'>+		int idx;</div><div class='add'>+</div><div class='add'>+		/* default tx ring mapping policy */</div><div class='add'>+		idx = priv-&gt;bdr_int_num * j + i;</div><div class='add'>+		__set_bit(idx, &amp;v-&gt;tx_rings_map);</div><div class='add'>+		bdr = &amp;v-&gt;tx_ring[j];</div><div class='add'>+		bdr-&gt;index = idx;</div><div class='add'>+		bdr-&gt;ndev = priv-&gt;ndev;</div><div class='add'>+		bdr-&gt;dev = priv-&gt;dev;</div><div class='add'>+		bdr-&gt;bd_count = priv-&gt;tx_bd_count;</div><div class='add'>+		priv-&gt;tx_ring[idx] = bdr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_vector:</div><div class='add'>+	priv-&gt;rx_ring[i] = NULL;</div><div class='add'>+	priv-&gt;int_vector[i] = NULL;</div><div class='add'>+	kfree(v);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_int_vector_destroy(struct enetc_ndev_priv *priv, int i)</div><div class='add'>+{</div><div class='add'>+	struct enetc_int_vector *v = priv-&gt;int_vector[i];</div><div class='add'>+	struct enetc_bdr *rx_ring = &amp;v-&gt;rx_ring;</div><div class='add'>+	int j, tx_ring_index;</div><div class='add'>+</div><div class='add'>+	xdp_rxq_info_unreg_mem_model(&amp;rx_ring-&gt;xdp.rxq);</div><div class='add'>+	xdp_rxq_info_unreg(&amp;rx_ring-&gt;xdp.rxq);</div><div class='add'>+	netif_napi_del(&amp;v-&gt;napi);</div><div class='add'>+	cancel_work_sync(&amp;v-&gt;rx_dim.work);</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; v-&gt;count_tx_rings; j++) {</div><div class='add'>+		tx_ring_index = priv-&gt;bdr_int_num * j + i;</div><div class='add'>+		priv-&gt;tx_ring[tx_ring_index] = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;rx_ring[i] = NULL;</div><div class='add'>+	priv-&gt;int_vector[i] = NULL;</div><div class='add'>+	kfree(v);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int enetc_alloc_msix(struct enetc_ndev_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = priv-&gt;si-&gt;pdev;</div><div class='add'>+	int v_tx_rings, v_remainder;</div><div class='ctx'> 	int num_stack_tx_queues;</div><div class='ctx'> 	int first_xdp_tx_ring;</div><div class='ctx'> 	int i, n, err, nvec;</div><div class='del'>-	int v_tx_rings;</div><div class='ctx'> </div><div class='ctx'> 	nvec = ENETC_BDR_INT_BASE_IDX + priv-&gt;bdr_int_num;</div><div class='ctx'> 	/* allocate MSIX for both messaging and Rx/Tx interrupts */</div><div class='hunk'>@@ -3015,64 +3550,17 @@ int enetc_alloc_msix(struct enetc_ndev_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	/* # of tx rings per int vector */</div><div class='ctx'> 	v_tx_rings = priv-&gt;num_tx_rings / priv-&gt;bdr_int_num;</div><div class='add'>+	v_remainder = priv-&gt;num_tx_rings % priv-&gt;bdr_int_num;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;bdr_int_num; i++) {</div><div class='del'>-		struct enetc_int_vector *v;</div><div class='del'>-		struct enetc_bdr *bdr;</div><div class='del'>-		int j;</div><div class='del'>-</div><div class='del'>-		v = kzalloc(struct_size(v, tx_ring, v_tx_rings), GFP_KERNEL);</div><div class='del'>-		if (!v) {</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			goto fail;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		priv-&gt;int_vector[i] = v;</div><div class='del'>-</div><div class='del'>-		bdr = &amp;v-&gt;rx_ring;</div><div class='del'>-		bdr-&gt;index = i;</div><div class='del'>-		bdr-&gt;ndev = priv-&gt;ndev;</div><div class='del'>-		bdr-&gt;dev = priv-&gt;dev;</div><div class='del'>-		bdr-&gt;bd_count = priv-&gt;rx_bd_count;</div><div class='del'>-		bdr-&gt;buffer_offset = ENETC_RXB_PAD;</div><div class='del'>-		priv-&gt;rx_ring[i] = bdr;</div><div class='del'>-</div><div class='del'>-		err = xdp_rxq_info_reg(&amp;bdr-&gt;xdp.rxq, priv-&gt;ndev, i, 0);</div><div class='del'>-		if (err) {</div><div class='del'>-			kfree(v);</div><div class='del'>-			goto fail;</div><div class='del'>-		}</div><div class='add'>+		/* Distribute the remaining TX rings to the first v_remainder</div><div class='add'>+		 * interrupt vectors</div><div class='add'>+		 */</div><div class='add'>+		int num_tx_rings = i &lt; v_remainder ? v_tx_rings + 1 : v_tx_rings;</div><div class='ctx'> </div><div class='del'>-		err = xdp_rxq_info_reg_mem_model(&amp;bdr-&gt;xdp.rxq,</div><div class='del'>-						 MEM_TYPE_PAGE_SHARED, NULL);</div><div class='del'>-		if (err) {</div><div class='del'>-			xdp_rxq_info_unreg(&amp;bdr-&gt;xdp.rxq);</div><div class='del'>-			kfree(v);</div><div class='add'>+		err = enetc_int_vector_init(priv, i, num_tx_rings);</div><div class='add'>+		if (err)</div><div class='ctx'> 			goto fail;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* init defaults for adaptive IC */</div><div class='del'>-		if (priv-&gt;ic_mode &amp; ENETC_IC_RX_ADAPTIVE) {</div><div class='del'>-			v-&gt;rx_ictt = 0x1;</div><div class='del'>-			v-&gt;rx_dim_en = true;</div><div class='del'>-		}</div><div class='del'>-		INIT_WORK(&amp;v-&gt;rx_dim.work, enetc_rx_dim_work);</div><div class='del'>-		netif_napi_add(priv-&gt;ndev, &amp;v-&gt;napi, enetc_poll);</div><div class='del'>-		v-&gt;count_tx_rings = v_tx_rings;</div><div class='del'>-</div><div class='del'>-		for (j = 0; j &lt; v_tx_rings; j++) {</div><div class='del'>-			int idx;</div><div class='del'>-</div><div class='del'>-			/* default tx ring mapping policy */</div><div class='del'>-			idx = priv-&gt;bdr_int_num * j + i;</div><div class='del'>-			__set_bit(idx, &amp;v-&gt;tx_rings_map);</div><div class='del'>-			bdr = &amp;v-&gt;tx_ring[j];</div><div class='del'>-			bdr-&gt;index = idx;</div><div class='del'>-			bdr-&gt;ndev = priv-&gt;ndev;</div><div class='del'>-			bdr-&gt;dev = priv-&gt;dev;</div><div class='del'>-			bdr-&gt;bd_count = priv-&gt;tx_bd_count;</div><div class='del'>-			priv-&gt;tx_ring[idx] = bdr;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	num_stack_tx_queues = enetc_num_stack_tx_queues(priv);</div><div class='hunk'>@@ -3092,16 +3580,8 @@ int enetc_alloc_msix(struct enetc_ndev_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> fail:</div><div class='del'>-	while (i--) {</div><div class='del'>-		struct enetc_int_vector *v = priv-&gt;int_vector[i];</div><div class='del'>-		struct enetc_bdr *rx_ring = &amp;v-&gt;rx_ring;</div><div class='del'>-</div><div class='del'>-		xdp_rxq_info_unreg_mem_model(&amp;rx_ring-&gt;xdp.rxq);</div><div class='del'>-		xdp_rxq_info_unreg(&amp;rx_ring-&gt;xdp.rxq);</div><div class='del'>-		netif_napi_del(&amp;v-&gt;napi);</div><div class='del'>-		cancel_work_sync(&amp;v-&gt;rx_dim.work);</div><div class='del'>-		kfree(v);</div><div class='del'>-	}</div><div class='add'>+	while (i--)</div><div class='add'>+		enetc_int_vector_destroy(priv, i);</div><div class='ctx'> </div><div class='ctx'> 	pci_free_irq_vectors(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -3113,26 +3593,8 @@ void enetc_free_msix(struct enetc_ndev_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;bdr_int_num; i++) {</div><div class='del'>-		struct enetc_int_vector *v = priv-&gt;int_vector[i];</div><div class='del'>-		struct enetc_bdr *rx_ring = &amp;v-&gt;rx_ring;</div><div class='del'>-</div><div class='del'>-		xdp_rxq_info_unreg_mem_model(&amp;rx_ring-&gt;xdp.rxq);</div><div class='del'>-		xdp_rxq_info_unreg(&amp;rx_ring-&gt;xdp.rxq);</div><div class='del'>-		netif_napi_del(&amp;v-&gt;napi);</div><div class='del'>-		cancel_work_sync(&amp;v-&gt;rx_dim.work);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;num_rx_rings; i++)</div><div class='del'>-		priv-&gt;rx_ring[i] = NULL;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;num_tx_rings; i++)</div><div class='del'>-		priv-&gt;tx_ring[i] = NULL;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;bdr_int_num; i++) {</div><div class='del'>-		kfree(priv-&gt;int_vector[i]);</div><div class='del'>-		priv-&gt;int_vector[i] = NULL;</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;bdr_int_num; i++)</div><div class='add'>+		enetc_int_vector_destroy(priv, i);</div><div class='ctx'> </div><div class='ctx'> 	/* disable all MSIX for this device */</div><div class='ctx'> 	pci_free_irq_vectors(priv-&gt;si-&gt;pdev);</div><div class='hunk'>@@ -3241,5 +3703,75 @@ void enetc_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_pci_remove);</div><div class='ctx'> </div><div class='add'>+static const struct enetc_drvdata enetc_pf_data = {</div><div class='add'>+	.sysclk_freq = ENETC_CLK_400M,</div><div class='add'>+	.pmac_offset = ENETC_PMAC_OFFSET,</div><div class='add'>+	.max_frags = ENETC_MAX_SKB_FRAGS,</div><div class='add'>+	.eth_ops = &amp;enetc_pf_ethtool_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct enetc_drvdata enetc4_pf_data = {</div><div class='add'>+	.sysclk_freq = ENETC_CLK_333M,</div><div class='add'>+	.tx_csum = true,</div><div class='add'>+	.max_frags = ENETC4_MAX_SKB_FRAGS,</div><div class='add'>+	.pmac_offset = ENETC4_PMAC_OFFSET,</div><div class='add'>+	.eth_ops = &amp;enetc4_pf_ethtool_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct enetc_drvdata enetc4_ppm_data = {</div><div class='add'>+	.sysclk_freq = ENETC_CLK_333M,</div><div class='add'>+	.tx_csum = true,</div><div class='add'>+	.max_frags = ENETC4_MAX_SKB_FRAGS,</div><div class='add'>+	.eth_ops = &amp;enetc4_ppm_ethtool_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct enetc_drvdata enetc_vf_data = {</div><div class='add'>+	.sysclk_freq = ENETC_CLK_400M,</div><div class='add'>+	.max_frags = ENETC_MAX_SKB_FRAGS,</div><div class='add'>+	.eth_ops = &amp;enetc_vf_ethtool_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct enetc_platform_info enetc_info[] = {</div><div class='add'>+	{ .revision = ENETC_REV_1_0,</div><div class='add'>+	  .dev_id = ENETC_DEV_ID_PF,</div><div class='add'>+	  .data = &amp;enetc_pf_data,</div><div class='add'>+	},</div><div class='add'>+	{ .revision = ENETC_REV_4_1,</div><div class='add'>+	  .dev_id = NXP_ENETC_PF_DEV_ID,</div><div class='add'>+	  .data = &amp;enetc4_pf_data,</div><div class='add'>+	},</div><div class='add'>+	{ .revision = ENETC_REV_1_0,</div><div class='add'>+	  .dev_id = ENETC_DEV_ID_VF,</div><div class='add'>+	  .data = &amp;enetc_vf_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+	  .revision = ENETC_REV_4_3,</div><div class='add'>+	  .dev_id = NXP_ENETC_PPM_DEV_ID,</div><div class='add'>+	  .data = &amp;enetc4_ppm_data,</div><div class='add'>+	},</div><div class='add'>+	{ .revision = ENETC_REV_4_3,</div><div class='add'>+	  .dev_id = NXP_ENETC_PF_DEV_ID,</div><div class='add'>+	  .data = &amp;enetc4_pf_data,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int enetc_get_driver_data(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	u16 dev_id = si-&gt;pdev-&gt;device;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(enetc_info); i++) {</div><div class='add'>+		if (si-&gt;revision == enetc_info[i].revision &amp;&amp;</div><div class='add'>+		    dev_id == enetc_info[i].dev_id) {</div><div class='add'>+			si-&gt;drvdata = enetc_info[i].data;</div><div class='add'>+</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ERANGE;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_get_driver_data);</div><div class='add'>+</div><div class='ctx'> MODULE_DESCRIPTION("NXP ENETC Ethernet driver");</div><div class='ctx'> MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc.h b/drivers/net/ethernet/freescale/enetc/enetc.h<br/>index fb7d98d57783..dce27bd67a7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc.h</a></div><div class='hunk'>@@ -8,12 +8,14 @@</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/fsl/ntmp.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/dim.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "enetc_hw.h"</div><div class='add'>+#include "enetc4_hw.h"</div><div class='ctx'> </div><div class='ctx'> #define ENETC_MAC_MAXFRM_SIZE	9600</div><div class='ctx'> #define ENETC_MAX_MTU		(ENETC_MAC_MAXFRM_SIZE - \</div><div class='hunk'>@@ -21,6 +23,18 @@</div><div class='ctx'> </div><div class='ctx'> #define ENETC_CBD_DATA_MEM_ALIGN 64</div><div class='ctx'> </div><div class='add'>+#define ENETC_MADDR_HASH_TBL_SZ	64</div><div class='add'>+</div><div class='add'>+enum enetc_mac_addr_type {UC, MC, MADDR_TYPE};</div><div class='add'>+</div><div class='add'>+struct enetc_mac_filter {</div><div class='add'>+	union {</div><div class='add'>+		char mac_addr[ETH_ALEN];</div><div class='add'>+		DECLARE_BITMAP(mac_hash_table, ENETC_MADDR_HASH_TBL_SZ);</div><div class='add'>+	};</div><div class='add'>+	int mac_addr_cnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct enetc_tx_swbd {</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct sk_buff *skb;</div><div class='hunk'>@@ -40,8 +54,29 @@ struct enetc_tx_swbd {</div><div class='ctx'> 	u8 qbv_en:1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct enetc_skb_cb {</div><div class='add'>+	u8 flag;</div><div class='add'>+	bool udp;</div><div class='add'>+	u16 correction_off;</div><div class='add'>+	u16 origin_tstamp_off;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ENETC_SKB_CB(skb) ((struct enetc_skb_cb *)((skb)-&gt;cb))</div><div class='add'>+</div><div class='add'>+struct enetc_lso_t {</div><div class='add'>+	bool	ipv6;</div><div class='add'>+	bool	tcp;</div><div class='add'>+	u8	l3_hdr_len;</div><div class='add'>+	u8	hdr_len; /* LSO header length */</div><div class='add'>+	u8	l3_start;</div><div class='add'>+	u16	lso_seg_size;</div><div class='add'>+	int	total_len; /* total data length, not include LSO header */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ENETC_LSO_MAX_DATA_LEN		SZ_256K</div><div class='add'>+</div><div class='ctx'> #define ENETC_RX_MAXFRM_SIZE	ENETC_MAC_MAXFRM_SIZE</div><div class='del'>-#define ENETC_RXB_TRUESIZE	2048 /* PAGE_SIZE &gt;&gt; 1 */</div><div class='add'>+#define ENETC_RXB_TRUESIZE	(PAGE_SIZE &gt;&gt; 1)</div><div class='ctx'> #define ENETC_RXB_PAD		NET_SKB_PAD /* add extra space if needed */</div><div class='ctx'> #define ENETC_RXB_DMA_SIZE	\</div><div class='ctx'> 	(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)</div><div class='hunk'>@@ -58,22 +93,29 @@ struct enetc_rx_swbd {</div><div class='ctx'> </div><div class='ctx'> /* ENETC overhead: optional extension BD + 1 BD gap */</div><div class='ctx'> #define ENETC_TXBDS_NEEDED(val)	((val) + 2)</div><div class='del'>-/* max # of chained Tx BDs is 15, including head and extension BD */</div><div class='add'>+/* For LS1028A, max # of chained Tx BDs is 15, including head and</div><div class='add'>+ * extension BD.</div><div class='add'>+ */</div><div class='ctx'> #define ENETC_MAX_SKB_FRAGS	13</div><div class='del'>-#define ENETC_TXBDS_MAX_NEEDED	ENETC_TXBDS_NEEDED(ENETC_MAX_SKB_FRAGS + 1)</div><div class='add'>+/* For ENETC v4 and later versions, max # of chained Tx BDs is 63,</div><div class='add'>+ * including head and extension BD, but the range of MAX_SKB_FRAGS</div><div class='add'>+ * is 17 ~ 45, so set ENETC4_MAX_SKB_FRAGS to MAX_SKB_FRAGS.</div><div class='add'>+ */</div><div class='add'>+#define ENETC4_MAX_SKB_FRAGS		MAX_SKB_FRAGS</div><div class='add'>+#define ENETC_TXBDS_MAX_NEEDED(x)	ENETC_TXBDS_NEEDED((x) + 1)</div><div class='ctx'> </div><div class='ctx'> struct enetc_ring_stats {</div><div class='del'>-	unsigned int packets;</div><div class='del'>-	unsigned int bytes;</div><div class='del'>-	unsigned int rx_alloc_errs;</div><div class='del'>-	unsigned int xdp_drops;</div><div class='del'>-	unsigned int xdp_tx;</div><div class='del'>-	unsigned int xdp_tx_drops;</div><div class='del'>-	unsigned int xdp_redirect;</div><div class='del'>-	unsigned int xdp_redirect_failures;</div><div class='del'>-	unsigned int recycles;</div><div class='del'>-	unsigned int recycle_failures;</div><div class='del'>-	unsigned int win_drop;</div><div class='add'>+	unsigned long packets;</div><div class='add'>+	unsigned long bytes;</div><div class='add'>+	unsigned long rx_alloc_errs;</div><div class='add'>+	unsigned long xdp_drops;</div><div class='add'>+	unsigned long xdp_tx;</div><div class='add'>+	unsigned long xdp_tx_drops;</div><div class='add'>+	unsigned long xdp_redirect;</div><div class='add'>+	unsigned long xdp_redirect_failures;</div><div class='add'>+	unsigned long recycles;</div><div class='add'>+	unsigned long recycle_failures;</div><div class='add'>+	unsigned long win_drop;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct enetc_xdp_data {</div><div class='hunk'>@@ -184,7 +226,7 @@ static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)</div><div class='ctx'> {</div><div class='ctx'> 	int hw_idx = i;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK) &amp;&amp; rx_ring-&gt;ext_en)</div><div class='add'>+	if (rx_ring-&gt;ext_en)</div><div class='ctx'> 		hw_idx = 2 * i;</div><div class='ctx'> </div><div class='ctx'> 	return &amp;(((union enetc_rx_bd *)rx_ring-&gt;bd_base)[hw_idx]);</div><div class='hunk'>@@ -198,7 +240,7 @@ static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,</div><div class='ctx'> </div><div class='ctx'> 	new_rxbd++;</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK) &amp;&amp; rx_ring-&gt;ext_en)</div><div class='add'>+	if (rx_ring-&gt;ext_en)</div><div class='ctx'> 		new_rxbd++;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(++new_index == rx_ring-&gt;bd_count)) {</div><div class='hunk'>@@ -230,6 +272,35 @@ enum enetc_errata {</div><div class='ctx'> #define ENETC_SI_F_PSFP BIT(0)</div><div class='ctx'> #define ENETC_SI_F_QBV  BIT(1)</div><div class='ctx'> #define ENETC_SI_F_QBU  BIT(2)</div><div class='add'>+#define ENETC_SI_F_LSO	BIT(3)</div><div class='add'>+#define ENETC_SI_F_PPM	BIT(4) /* pseudo MAC */</div><div class='add'>+</div><div class='add'>+struct enetc_drvdata {</div><div class='add'>+	u32 pmac_offset; /* Only valid for PSI which supports 802.1Qbu */</div><div class='add'>+	u8 tx_csum:1;</div><div class='add'>+	u8 max_frags;</div><div class='add'>+	u64 sysclk_freq;</div><div class='add'>+	const struct ethtool_ops *eth_ops;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct enetc_platform_info {</div><div class='add'>+	u16 revision;</div><div class='add'>+	u16 dev_id;</div><div class='add'>+	const struct enetc_drvdata *data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct enetc_si;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * This structure defines the some common hooks for ENETC PSI and VSI.</div><div class='add'>+ * In addition, since VSI only uses the struct enetc_si as its private</div><div class='add'>+ * driver data, so this structure also define some hooks specifically</div><div class='add'>+ * for VSI. For VSI-specific hooks, the format is ‘vf_*()’.</div><div class='add'>+ */</div><div class='add'>+struct enetc_si_ops {</div><div class='add'>+	int (*get_rss_table)(struct enetc_si *si, u32 *table, int count);</div><div class='add'>+	int (*set_rss_table)(struct enetc_si *si, const u32 *table, int count);</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* PCI IEP device data */</div><div class='ctx'> struct enetc_si {</div><div class='hunk'>@@ -239,18 +310,33 @@ struct enetc_si {</div><div class='ctx'> </div><div class='ctx'> 	struct net_device *ndev; /* back ref. */</div><div class='ctx'> </div><div class='del'>-	struct enetc_cbdr cbd_ring;</div><div class='add'>+	union {</div><div class='add'>+		struct enetc_cbdr cbd_ring; /* Only ENETC 1.0 */</div><div class='add'>+		struct ntmp_user ntmp_user; /* ENETC 4.1 and later */</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	int num_rx_rings; /* how many rings are available in the SI */</div><div class='ctx'> 	int num_tx_rings;</div><div class='ctx'> 	int num_fs_entries;</div><div class='ctx'> 	int num_rss; /* number of RSS buckets */</div><div class='ctx'> 	unsigned short pad;</div><div class='add'>+	u16 revision;</div><div class='ctx'> 	int hw_features;</div><div class='add'>+	const struct enetc_drvdata *drvdata;</div><div class='add'>+	const struct enetc_si_ops *ops;</div><div class='add'>+</div><div class='add'>+	struct workqueue_struct *workqueue;</div><div class='add'>+	struct work_struct rx_mode_task;</div><div class='add'>+	struct dentry *debugfs_root;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define ENETC_SI_ALIGN	32</div><div class='ctx'> </div><div class='add'>+static inline bool is_enetc_rev1(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	return si-&gt;pdev-&gt;revision == ENETC_REV1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void *enetc_si_priv(const struct enetc_si *si)</div><div class='ctx'> {</div><div class='ctx'> 	return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);</div><div class='hunk'>@@ -277,6 +363,11 @@ static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool enetc_is_pseudo_mac(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	return si-&gt;hw_features &amp; ENETC_SI_F_PPM;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define ENETC_MAX_NUM_TXQS	8</div><div class='ctx'> #define ENETC_INT_NAME_MAX	(IFNAMSIZ + 8)</div><div class='ctx'> </div><div class='hunk'>@@ -302,7 +393,7 @@ struct enetc_cls_rule {</div><div class='ctx'> 	int used;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define ENETC_MAX_BDR_INT	2 /* fixed to max # of available cpus */</div><div class='add'>+#define ENETC_MAX_BDR_INT	6 /* fixed to max # of available cpus */</div><div class='ctx'> struct psfp_cap {</div><div class='ctx'> 	u32 max_streamid;</div><div class='ctx'> 	u32 max_psfp_filter;</div><div class='hunk'>@@ -321,6 +412,8 @@ enum enetc_active_offloads {</div><div class='ctx'> 	ENETC_F_QBV			= BIT(9),</div><div class='ctx'> 	ENETC_F_QCI			= BIT(10),</div><div class='ctx'> 	ENETC_F_QBU			= BIT(11),</div><div class='add'>+	ENETC_F_TXCSUM			= BIT(12),</div><div class='add'>+	ENETC_F_LSO			= BIT(13),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum enetc_flags_bit {</div><div class='hunk'>@@ -341,7 +434,6 @@ enum enetc_ic_mode {</div><div class='ctx'> </div><div class='ctx'> #define ENETC_RXIC_PKTTHR	min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)</div><div class='ctx'> #define ENETC_TXIC_PKTTHR	min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)</div><div class='del'>-#define ENETC_TXIC_TIMETHR	enetc_usecs_to_cycles(600)</div><div class='ctx'> </div><div class='ctx'> struct enetc_ndev_priv {</div><div class='ctx'> 	struct net_device *ndev;</div><div class='hunk'>@@ -356,6 +448,7 @@ struct enetc_ndev_priv {</div><div class='ctx'> 	u16 msg_enable;</div><div class='ctx'> </div><div class='ctx'> 	u8 preemptible_tcs;</div><div class='add'>+	u8 max_frags; /* The maximum number of BDs for fragments */</div><div class='ctx'> </div><div class='ctx'> 	enum enetc_active_offloads active_offloads;</div><div class='ctx'> </div><div class='hunk'>@@ -389,6 +482,9 @@ struct enetc_ndev_priv {</div><div class='ctx'> 	 * and link state updates</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct mutex		mm_lock;</div><div class='add'>+</div><div class='add'>+	struct clk *ref_clk; /* RGMII/RMII reference clock */</div><div class='add'>+	u64 sysclk_freq; /* NETC system clock frequency */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Messaging */</div><div class='hunk'>@@ -403,9 +499,6 @@ struct enetc_msg_cmd_set_primary_mac {</div><div class='ctx'> </div><div class='ctx'> #define ENETC_CBDR_TIMEOUT	1000 /* usecs */</div><div class='ctx'> </div><div class='del'>-/* PTP driver exports */</div><div class='del'>-extern int enetc_phc_index;</div><div class='del'>-</div><div class='ctx'> /* SI common */</div><div class='ctx'> u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg);</div><div class='ctx'> void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val);</div><div class='hunk'>@@ -418,6 +511,10 @@ void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);</div><div class='ctx'> int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);</div><div class='ctx'> void enetc_free_si_resources(struct enetc_ndev_priv *priv);</div><div class='ctx'> int enetc_configure_si(struct enetc_ndev_priv *priv);</div><div class='add'>+int enetc_get_driver_data(struct enetc_si *si);</div><div class='add'>+void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter,</div><div class='add'>+				  const unsigned char *addr);</div><div class='add'>+void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter);</div><div class='ctx'> </div><div class='ctx'> int enetc_open(struct net_device *ndev);</div><div class='ctx'> int enetc_close(struct net_device *ndev);</div><div class='hunk'>@@ -433,7 +530,18 @@ int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf);</div><div class='ctx'> int enetc_xdp_xmit(struct net_device *ndev, int num_frames,</div><div class='ctx'> 		   struct xdp_frame **frames, u32 flags);</div><div class='ctx'> </div><div class='add'>+int enetc_hwtstamp_get(struct net_device *ndev,</div><div class='add'>+		       struct kernel_hwtstamp_config *config);</div><div class='add'>+int enetc_hwtstamp_set(struct net_device *ndev,</div><div class='add'>+		       struct kernel_hwtstamp_config *config,</div><div class='add'>+		       struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='ctx'> /* ethtool */</div><div class='add'>+extern const struct ethtool_ops enetc_pf_ethtool_ops;</div><div class='add'>+extern const struct ethtool_ops enetc4_pf_ethtool_ops;</div><div class='add'>+extern const struct ethtool_ops enetc_vf_ethtool_ops;</div><div class='add'>+extern const struct ethtool_ops enetc4_ppm_ethtool_ops;</div><div class='add'>+</div><div class='ctx'> void enetc_set_ethtool_ops(struct net_device *ndev);</div><div class='ctx'> void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link);</div><div class='ctx'> void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv);</div><div class='hunk'>@@ -442,15 +550,19 @@ void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv);</div><div class='ctx'> int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count,</div><div class='ctx'> 		     struct enetc_cbdr *cbdr);</div><div class='ctx'> void enetc_teardown_cbdr(struct enetc_cbdr *cbdr);</div><div class='add'>+int enetc4_setup_cbdr(struct enetc_si *si);</div><div class='add'>+void enetc4_teardown_cbdr(struct enetc_si *si);</div><div class='ctx'> int enetc_set_mac_flt_entry(struct enetc_si *si, int index,</div><div class='ctx'> 			    char *mac_addr, int si_map);</div><div class='ctx'> int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);</div><div class='ctx'> int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,</div><div class='ctx'> 		       int index);</div><div class='del'>-void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes);</div><div class='add'>+void enetc_set_rss_key(struct enetc_si *si, const u8 *bytes);</div><div class='ctx'> int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);</div><div class='ctx'> int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);</div><div class='ctx'> int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);</div><div class='add'>+int enetc4_get_rss_table(struct enetc_si *si, u32 *table, int count);</div><div class='add'>+int enetc4_set_rss_table(struct enetc_si *si, const u32 *table, int count);</div><div class='ctx'> </div><div class='ctx'> static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si,</div><div class='ctx'> 					     struct enetc_cbd *cbd,</div><div class='hunk'>@@ -491,6 +603,14 @@ static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size,</div><div class='ctx'> void enetc_reset_ptcmsdur(struct enetc_hw *hw);</div><div class='ctx'> void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu);</div><div class='ctx'> </div><div class='add'>+static inline bool enetc_ptp_clock_is_enabled(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	if (is_enetc_rev1(si))</div><div class='add'>+		return IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK);</div><div class='add'>+</div><div class='add'>+	return IS_ENABLED(CONFIG_PTP_NETC_V4_TIMER);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_FSL_ENETC_QOS</div><div class='ctx'> int enetc_qos_query_caps(struct net_device *ndev, void *type_data);</div><div class='ctx'> int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.c b/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.c<br/>new file mode 100644<br/>index 000000000000..1b1591dce73d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc4_debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/* Copyright 2025 NXP */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='add'>+</div><div class='add'>+#include "enetc_pf.h"</div><div class='add'>+#include "enetc4_debugfs.h"</div><div class='add'>+</div><div class='add'>+static void enetc_show_si_mac_hash_filter(struct seq_file *s, int i)</div><div class='add'>+{</div><div class='add'>+	struct enetc_si *si = s-&gt;private;</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='add'>+	u32 hash_h, hash_l;</div><div class='add'>+</div><div class='add'>+	hash_l = enetc_port_rd(hw, ENETC4_PSIUMHFR0(i));</div><div class='add'>+	hash_h = enetc_port_rd(hw, ENETC4_PSIUMHFR1(i));</div><div class='add'>+	seq_printf(s, "SI %d unicast MAC hash filter: 0x%08x%08x\n",</div><div class='add'>+		   i, hash_h, hash_l);</div><div class='add'>+</div><div class='add'>+	hash_l = enetc_port_rd(hw, ENETC4_PSIMMHFR0(i));</div><div class='add'>+	hash_h = enetc_port_rd(hw, ENETC4_PSIMMHFR1(i));</div><div class='add'>+	seq_printf(s, "SI %d multicast MAC hash filter: 0x%08x%08x\n",</div><div class='add'>+		   i, hash_h, hash_l);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc_mac_filter_show(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	struct enetc_si *si = s-&gt;private;</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='add'>+	struct maft_entry_data maft;</div><div class='add'>+	struct enetc_pf *pf;</div><div class='add'>+	int i, err, num_si;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	pf = enetc_si_priv(si);</div><div class='add'>+	num_si = pf-&gt;caps.num_vsi + 1;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_rd(hw, ENETC4_PSIPMMR);</div><div class='add'>+	for (i = 0; i &lt; num_si; i++) {</div><div class='add'>+		seq_printf(s, "SI %d Unicast Promiscuous mode: %s\n", i,</div><div class='add'>+			   str_enabled_disabled(PSIPMMR_SI_MAC_UP(i) &amp; val));</div><div class='add'>+		seq_printf(s, "SI %d Multicast Promiscuous mode: %s\n", i,</div><div class='add'>+			   str_enabled_disabled(PSIPMMR_SI_MAC_MP(i) &amp; val));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* MAC hash filter table */</div><div class='add'>+	for (i = 0; i &lt; num_si; i++)</div><div class='add'>+		enetc_show_si_mac_hash_filter(s, i);</div><div class='add'>+</div><div class='add'>+	if (!pf-&gt;num_mfe)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* MAC address filter table */</div><div class='add'>+	seq_puts(s, "MAC address filter table\n");</div><div class='add'>+	for (i = 0; i &lt; pf-&gt;num_mfe; i++) {</div><div class='add'>+		memset(&amp;maft, 0, sizeof(maft));</div><div class='add'>+		err = ntmp_maft_query_entry(&amp;si-&gt;ntmp_user, i, &amp;maft);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		seq_printf(s, "Entry %d, MAC: %pM, SI bitmap: 0x%04x\n", i,</div><div class='add'>+			   maft.keye.mac_addr, le16_to_cpu(maft.cfge.si_bitmap));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(enetc_mac_filter);</div><div class='add'>+</div><div class='add'>+void enetc_create_debugfs(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = si-&gt;ndev;</div><div class='add'>+	struct dentry *root;</div><div class='add'>+</div><div class='add'>+	root = debugfs_create_dir(netdev_name(ndev), NULL);</div><div class='add'>+	if (IS_ERR(root))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	si-&gt;debugfs_root = root;</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("mac_filter", 0444, root, si, &amp;enetc_mac_filter_fops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void enetc_remove_debugfs(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove(si-&gt;debugfs_root);</div><div class='add'>+	si-&gt;debugfs_root = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.h b/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.h<br/>new file mode 100644<br/>index 000000000000..96caca35f79d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc4_debugfs.h</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */</div><div class='add'>+/* Copyright 2025 NXP */</div><div class='add'>+</div><div class='add'>+#ifndef __ENETC4_DEBUGFS_H</div><div class='add'>+#define __ENETC4_DEBUGFS_H</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_DEBUG_FS)</div><div class='add'>+void enetc_create_debugfs(struct enetc_si *si);</div><div class='add'>+void enetc_remove_debugfs(struct enetc_si *si);</div><div class='add'>+#else</div><div class='add'>+static inline void enetc_create_debugfs(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void enetc_remove_debugfs(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc4_hw.h b/drivers/net/ethernet/freescale/enetc/enetc4_hw.h<br/>new file mode 100644<br/>index 000000000000..3ed0f7a02767<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc4_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc4_hw.h</a></div><div class='hunk'>@@ -0,0 +1,232 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */</div><div class='add'>+/*</div><div class='add'>+ * This header file defines the register offsets and bit fields</div><div class='add'>+ * of ENETC4 PF and VFs. Note that the same registers as ENETC</div><div class='add'>+ * version 1.0 are defined in the enetc_hw.h file.</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ */</div><div class='add'>+#ifndef __ENETC4_HW_H_</div><div class='add'>+#define __ENETC4_HW_H_</div><div class='add'>+</div><div class='add'>+#define NXP_ENETC_VENDOR_ID		0x1131</div><div class='add'>+#define NXP_ENETC_PF_DEV_ID		0xe101</div><div class='add'>+#define NXP_ENETC_PPM_DEV_ID		0xe110</div><div class='add'>+</div><div class='add'>+/**********************Station interface registers************************/</div><div class='add'>+/* Station interface LSO segmentation flag mask register 0/1 */</div><div class='add'>+#define ENETC4_SILSOSFMR0		0x1300</div><div class='add'>+#define  SILSOSFMR0_TCP_MID_SEG		GENMASK(27, 16)</div><div class='add'>+#define  SILSOSFMR0_TCP_1ST_SEG		GENMASK(11, 0)</div><div class='add'>+#define  SILSOSFMR0_VAL_SET(first, mid)	(FIELD_PREP(SILSOSFMR0_TCP_MID_SEG, mid) | \</div><div class='add'>+					 FIELD_PREP(SILSOSFMR0_TCP_1ST_SEG, first))</div><div class='add'>+</div><div class='add'>+#define ENETC4_SILSOSFMR1		0x1304</div><div class='add'>+#define  SILSOSFMR1_TCP_LAST_SEG	GENMASK(11, 0)</div><div class='add'>+#define   ENETC4_TCP_FLAGS_FIN		BIT(0)</div><div class='add'>+#define   ENETC4_TCP_FLAGS_SYN		BIT(1)</div><div class='add'>+#define   ENETC4_TCP_FLAGS_RST		BIT(2)</div><div class='add'>+#define   ENETC4_TCP_FLAGS_PSH		BIT(3)</div><div class='add'>+#define   ENETC4_TCP_FLAGS_ACK		BIT(4)</div><div class='add'>+#define   ENETC4_TCP_FLAGS_URG		BIT(5)</div><div class='add'>+#define   ENETC4_TCP_FLAGS_ECE		BIT(6)</div><div class='add'>+#define   ENETC4_TCP_FLAGS_CWR		BIT(7)</div><div class='add'>+#define   ENETC4_TCP_FLAGS_NS		BIT(8)</div><div class='add'>+/* According to tso_build_hdr(), clear all special flags for not last packet. */</div><div class='add'>+#define ENETC4_TCP_NL_SEG_FLAGS_DMASK	(ENETC4_TCP_FLAGS_FIN | \</div><div class='add'>+					 ENETC4_TCP_FLAGS_RST | ENETC4_TCP_FLAGS_PSH)</div><div class='add'>+</div><div class='add'>+/***************************ENETC port registers**************************/</div><div class='add'>+#define ENETC4_ECAPR0			0x0</div><div class='add'>+#define  ECAPR0_RFS			BIT(2)</div><div class='add'>+#define  ECAPR0_TSD			BIT(5)</div><div class='add'>+#define  ECAPR0_RSS			BIT(8)</div><div class='add'>+#define  ECAPR0_RSC			BIT(9)</div><div class='add'>+#define  ECAPR0_LSO			BIT(10)</div><div class='add'>+#define  ECAPR0_WO			BIT(13)</div><div class='add'>+</div><div class='add'>+#define ENETC4_ECAPR1			0x4</div><div class='add'>+#define  ECAPR1_NUM_TCS			GENMASK(6, 4)</div><div class='add'>+#define  ECAPR1_NUM_MCH			GENMASK(9, 8)</div><div class='add'>+#define  ECAPR1_NUM_UCH			GENMASK(11, 10)</div><div class='add'>+#define  ECAPR1_NUM_MSIX		GENMASK(22, 12)</div><div class='add'>+#define  ECAPR1_NUM_VSI			GENMASK(27, 24)</div><div class='add'>+#define  ECAPR1_NUM_IPV			BIT(31)</div><div class='add'>+</div><div class='add'>+#define ENETC4_ECAPR2			0x8</div><div class='add'>+#define  ECAPR2_NUM_TX_BDR		GENMASK(9, 0)</div><div class='add'>+#define  ECAPR2_NUM_RX_BDR		GENMASK(25, 16)</div><div class='add'>+</div><div class='add'>+#define ENETC4_PMR			0x10</div><div class='add'>+#define  PMR_SI_EN(a)			BIT((16 + (a)))</div><div class='add'>+</div><div class='add'>+/* Port Pause ON/OFF threshold register */</div><div class='add'>+#define ENETC4_PPAUONTR			0x108</div><div class='add'>+#define ENETC4_PPAUOFFTR		0x10c</div><div class='add'>+</div><div class='add'>+/* Port Station interface promiscuous MAC mode register */</div><div class='add'>+#define ENETC4_PSIPMMR			0x200</div><div class='add'>+#define  PSIPMMR_SI_MAC_UP(a)		BIT(a) /* a = SI index */</div><div class='add'>+#define  PSIPMMR_SI_MAC_MP(a)		BIT((a) + 16)</div><div class='add'>+</div><div class='add'>+/* Port Station interface promiscuous VLAN mode register */</div><div class='add'>+#define ENETC4_PSIPVMR			0x204</div><div class='add'>+</div><div class='add'>+/* Port RSS key register n. n = 0,1,2,...,9 */</div><div class='add'>+#define ENETC4_PRSSKR(n)		((n) * 0x4 + 0x250)</div><div class='add'>+</div><div class='add'>+/* Port station interface MAC address filtering capability register */</div><div class='add'>+#define ENETC4_PSIMAFCAPR		0x280</div><div class='add'>+#define  PSIMAFCAPR_NUM_MAC_AFTE	GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+/* Port station interface VLAN filtering capability register */</div><div class='add'>+#define ENETC4_PSIVLANFCAPR		0x2c0</div><div class='add'>+#define  PSIVLANFCAPR_NUM_VLAN_FTE	GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+/* Port station interface VLAN filtering mode register */</div><div class='add'>+#define ENETC4_PSIVLANFMR		0x2c4</div><div class='add'>+#define  PSIVLANFMR_VS			BIT(0)</div><div class='add'>+</div><div class='add'>+/* Port Station interface a primary MAC address registers */</div><div class='add'>+#define ENETC4_PSIPMAR0(a)		((a) * 0x80 + 0x2000)</div><div class='add'>+#define ENETC4_PSIPMAR1(a)		((a) * 0x80 + 0x2004)</div><div class='add'>+</div><div class='add'>+/* Port station interface a configuration register 0/2 */</div><div class='add'>+#define ENETC4_PSICFGR0(a)		((a) * 0x80 + 0x2010)</div><div class='add'>+#define  PSICFGR0_VASE			BIT(13)</div><div class='add'>+#define  PSICFGR0_ASE			BIT(15)</div><div class='add'>+#define  PSICFGR0_ANTI_SPOOFING		(PSICFGR0_VASE | PSICFGR0_ASE)</div><div class='add'>+</div><div class='add'>+#define ENETC4_PSICFGR2(a)		((a) * 0x80 + 0x2018)</div><div class='add'>+#define  PSICFGR2_NUM_MSIX		GENMASK(5, 0)</div><div class='add'>+</div><div class='add'>+/* Port station interface a unicast MAC hash filter register 0/1 */</div><div class='add'>+#define ENETC4_PSIUMHFR0(a)		((a) * 0x80 + 0x2050)</div><div class='add'>+#define ENETC4_PSIUMHFR1(a)		((a) * 0x80 + 0x2054)</div><div class='add'>+</div><div class='add'>+/* Port station interface a multicast MAC hash filter register 0/1 */</div><div class='add'>+#define ENETC4_PSIMMHFR0(a)		((a) * 0x80 + 0x2058)</div><div class='add'>+#define ENETC4_PSIMMHFR1(a)		((a) * 0x80 + 0x205c)</div><div class='add'>+</div><div class='add'>+/* Port station interface a VLAN hash filter register 0/1 */</div><div class='add'>+#define ENETC4_PSIVHFR0(a)		((a) * 0x80 + 0x2060)</div><div class='add'>+#define ENETC4_PSIVHFR1(a)		((a) * 0x80 + 0x2064)</div><div class='add'>+</div><div class='add'>+#define ENETC4_PMCAPR			0x4004</div><div class='add'>+#define  PMCAPR_HD			BIT(8)</div><div class='add'>+#define  PMCAPR_FP			GENMASK(10, 9)</div><div class='add'>+</div><div class='add'>+/* Port capability register */</div><div class='add'>+#define ENETC4_PCAPR			0x4000</div><div class='add'>+#define  PCAPR_LINK_TYPE		BIT(4)</div><div class='add'>+</div><div class='add'>+/* Port configuration register */</div><div class='add'>+#define ENETC4_PCR			0x4010</div><div class='add'>+#define  PCR_HDR_FMT			BIT(0)</div><div class='add'>+#define  PCR_L2DOSE			BIT(4)</div><div class='add'>+#define  PCR_TIMER_CS			BIT(8)</div><div class='add'>+#define  PCR_PSPEED			GENMASK(29, 16)</div><div class='add'>+#define  PCR_PSPEED_VAL(speed)		(((speed) / 10 - 1) &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+/* Port MAC address register 0/1 */</div><div class='add'>+#define ENETC4_PMAR0			0x4020</div><div class='add'>+#define ENETC4_PMAR1			0x4024</div><div class='add'>+</div><div class='add'>+/* Port operational register */</div><div class='add'>+#define ENETC4_POR			0x4100</div><div class='add'>+</div><div class='add'>+/* Port traffic class a transmit maximum SDU register */</div><div class='add'>+#define ENETC4_PTCTMSDUR(a)		((a) * 0x20 + 0x4208)</div><div class='add'>+#define  PTCTMSDUR_MAXSDU		GENMASK(15, 0)</div><div class='add'>+#define  PTCTMSDUR_SDU_TYPE		GENMASK(17, 16)</div><div class='add'>+#define   SDU_TYPE_PPDU			0</div><div class='add'>+#define   SDU_TYPE_MPDU			1</div><div class='add'>+#define   SDU_TYPE_MSDU			2</div><div class='add'>+</div><div class='add'>+#define ENETC4_PMAC_OFFSET		0x400</div><div class='add'>+#define ENETC4_PM_CMD_CFG(mac)		(0x5008 + (mac) * 0x400)</div><div class='add'>+#define  PM_CMD_CFG_TX_EN		BIT(0)</div><div class='add'>+#define  PM_CMD_CFG_RX_EN		BIT(1)</div><div class='add'>+#define  PM_CMD_CFG_PAUSE_FWD		BIT(7)</div><div class='add'>+#define  PM_CMD_CFG_PAUSE_IGN		BIT(8)</div><div class='add'>+#define  PM_CMD_CFG_TX_ADDR_INS		BIT(9)</div><div class='add'>+#define  PM_CMD_CFG_LOOP_EN		BIT(10)</div><div class='add'>+#define  PM_CMD_CFG_LPBK_MODE		GENMASK(12, 11)</div><div class='add'>+#define   LPBCK_MODE_EXT_TX_CLK		0</div><div class='add'>+#define   LPBCK_MODE_MAC_LEVEL		1</div><div class='add'>+#define   LPBCK_MODE_INT_TX_CLK		2</div><div class='add'>+#define  PM_CMD_CFG_CNT_FRM_EN		BIT(13)</div><div class='add'>+#define  PM_CMD_CFG_TXP			BIT(15)</div><div class='add'>+#define  PM_CMD_CFG_SEND_IDLE		BIT(16)</div><div class='add'>+#define  PM_CMD_CFG_HD_FCEN		BIT(18)</div><div class='add'>+#define  PM_CMD_CFG_SFD			BIT(21)</div><div class='add'>+#define  PM_CMD_CFG_TX_FLUSH		BIT(22)</div><div class='add'>+#define  PM_CMD_CFG_TX_LOWP_EN		BIT(23)</div><div class='add'>+#define  PM_CMD_CFG_RX_LOWP_EMPTY	BIT(24)</div><div class='add'>+#define  PM_CMD_CFG_SWR			BIT(26)</div><div class='add'>+#define  PM_CMD_CFG_TS_MODE		BIT(30)</div><div class='add'>+#define  PM_CMD_CFG_MG			BIT(31)</div><div class='add'>+</div><div class='add'>+/* Port MAC 0/1 Maximum Frame Length Register */</div><div class='add'>+#define ENETC4_PM_MAXFRM(mac)		(0x5014 + (mac) * 0x400)</div><div class='add'>+</div><div class='add'>+/* Port internal MDIO base address, use to access PCS */</div><div class='add'>+#define ENETC4_PM_IMDIO_BASE		0x5030</div><div class='add'>+</div><div class='add'>+/* Port MAC 0/1 Pause Quanta Register */</div><div class='add'>+#define ENETC4_PM_PAUSE_QUANTA(mac)	(0x5054 + (mac) * 0x400)</div><div class='add'>+</div><div class='add'>+/* Port MAC 0/1 Pause Quanta Threshold Register */</div><div class='add'>+#define ENETC4_PM_PAUSE_THRESH(mac)	(0x5064 + (mac) * 0x400)</div><div class='add'>+</div><div class='add'>+#define ENETC4_PM_SINGLE_STEP(mac)	(0x50c0 + (mac) * 0x400)</div><div class='add'>+#define  PM_SINGLE_STEP_CH		BIT(6)</div><div class='add'>+#define  PM_SINGLE_STEP_OFFSET		GENMASK(15, 7)</div><div class='add'>+#define  PM_SINGLE_STEP_OFFSET_SET(o)	FIELD_PREP(PM_SINGLE_STEP_OFFSET, o)</div><div class='add'>+#define  PM_SINGLE_STEP_EN		BIT(31)</div><div class='add'>+</div><div class='add'>+/* Port MAC 0 Interface Mode Control Register */</div><div class='add'>+#define ENETC4_PM_IF_MODE(mac)		(0x5300 + (mac) * 0x400)</div><div class='add'>+#define  PM_IF_MODE_IFMODE		GENMASK(2, 0)</div><div class='add'>+#define   IFMODE_XGMII			0</div><div class='add'>+#define   IFMODE_RMII			3</div><div class='add'>+#define   IFMODE_RGMII			4</div><div class='add'>+#define   IFMODE_SGMII			5</div><div class='add'>+#define  PM_IF_MODE_REVMII		BIT(3)</div><div class='add'>+#define  PM_IF_MODE_M10			BIT(4)</div><div class='add'>+#define  PM_IF_MODE_HD			BIT(6)</div><div class='add'>+#define  PM_IF_MODE_SSP			GENMASK(14, 13)</div><div class='add'>+#define   SSP_100M			0</div><div class='add'>+#define   SSP_10M			1</div><div class='add'>+#define   SSP_1G			2</div><div class='add'>+#define  PM_IF_MODE_ENA			BIT(15)</div><div class='add'>+</div><div class='add'>+/* Port external MDIO Base address, use to access off-chip PHY */</div><div class='add'>+#define ENETC4_EMDIO_BASE		0x5c00</div><div class='add'>+</div><div class='add'>+/**********************ENETC Pseudo MAC port registers************************/</div><div class='add'>+/* Port pseudo MAC receive octets counter (64-bit) */</div><div class='add'>+#define ENETC4_PPMROCR			0x5080</div><div class='add'>+</div><div class='add'>+/* Port pseudo MAC receive unicast frame counter register (64-bit) */</div><div class='add'>+#define ENETC4_PPMRUFCR			0x5088</div><div class='add'>+</div><div class='add'>+/* Port pseudo MAC receive multicast frame counter register (64-bit) */</div><div class='add'>+#define ENETC4_PPMRMFCR			0x5090</div><div class='add'>+</div><div class='add'>+/* Port pseudo MAC receive broadcast frame counter register (64-bit) */</div><div class='add'>+#define ENETC4_PPMRBFCR			0x5098</div><div class='add'>+</div><div class='add'>+/* Port pseudo MAC transmit octets counter (64-bit) */</div><div class='add'>+#define ENETC4_PPMTOCR			0x50c0</div><div class='add'>+</div><div class='add'>+/* Port pseudo MAC transmit unicast frame counter register (64-bit) */</div><div class='add'>+#define ENETC4_PPMTUFCR			0x50c8</div><div class='add'>+</div><div class='add'>+/* Port pseudo MAC transmit multicast frame counter register (64-bit) */</div><div class='add'>+#define ENETC4_PPMTMFCR			0x50d0</div><div class='add'>+</div><div class='add'>+/* Port pseudo MAC transmit broadcast frame counter register (64-bit) */</div><div class='add'>+#define ENETC4_PPMTBFCR			0x50d8</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc4_pf.c b/drivers/net/ethernet/freescale/enetc/enetc4_pf.c<br/>new file mode 100644<br/>index 000000000000..498346dd996a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc4_pf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc4_pf.c</a></div><div class='hunk'>@@ -0,0 +1,1102 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/* Copyright 2024 NXP */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+#include "enetc_pf_common.h"</div><div class='add'>+#include "enetc4_debugfs.h"</div><div class='add'>+</div><div class='add'>+#define ENETC_SI_MAX_RING_NUM	8</div><div class='add'>+</div><div class='add'>+#define ENETC_MAC_FILTER_TYPE_UC	BIT(0)</div><div class='add'>+#define ENETC_MAC_FILTER_TYPE_MC	BIT(1)</div><div class='add'>+#define ENETC_MAC_FILTER_TYPE_ALL	(ENETC_MAC_FILTER_TYPE_UC | \</div><div class='add'>+					 ENETC_MAC_FILTER_TYPE_MC)</div><div class='add'>+</div><div class='add'>+struct enetc_mac_addr {</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void enetc4_get_port_caps(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_rd(hw, ENETC4_ECAPR1);</div><div class='add'>+	pf-&gt;caps.num_vsi = (val &amp; ECAPR1_NUM_VSI) &gt;&gt; 24;</div><div class='add'>+	pf-&gt;caps.num_msix = ((val &amp; ECAPR1_NUM_MSIX) &gt;&gt; 12) + 1;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_rd(hw, ENETC4_ECAPR2);</div><div class='add'>+	pf-&gt;caps.num_rx_bdr = (val &amp; ECAPR2_NUM_RX_BDR) &gt;&gt; 16;</div><div class='add'>+	pf-&gt;caps.num_tx_bdr = val &amp; ECAPR2_NUM_TX_BDR;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_rd(hw, ENETC4_PMCAPR);</div><div class='add'>+	pf-&gt;caps.half_duplex = (val &amp; PMCAPR_HD) ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_rd(hw, ENETC4_PSIMAFCAPR);</div><div class='add'>+	pf-&gt;caps.mac_filter_num = val &amp; PSIMAFCAPR_NUM_MAC_AFTE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_get_psi_hw_features(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_rd(hw, ENETC4_PCAPR);</div><div class='add'>+	if (val &amp; PCAPR_LINK_TYPE)</div><div class='add'>+		si-&gt;hw_features |= ENETC_SI_F_PPM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_set_si_primary_mac(struct enetc_hw *hw, int si,</div><div class='add'>+					 const u8 *addr)</div><div class='add'>+{</div><div class='add'>+	u16 lower = get_unaligned_le16(addr + 4);</div><div class='add'>+	u32 upper = get_unaligned_le32(addr);</div><div class='add'>+</div><div class='add'>+	if (si != 0) {</div><div class='add'>+		__raw_writel(upper, hw-&gt;port + ENETC4_PSIPMAR0(si));</div><div class='add'>+		__raw_writew(lower, hw-&gt;port + ENETC4_PSIPMAR1(si));</div><div class='add'>+	} else {</div><div class='add'>+		__raw_writel(upper, hw-&gt;port + ENETC4_PMAR0);</div><div class='add'>+		__raw_writew(lower, hw-&gt;port + ENETC4_PMAR1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_get_si_primary_mac(struct enetc_hw *hw, int si,</div><div class='add'>+					 u8 *addr)</div><div class='add'>+{</div><div class='add'>+	u32 upper;</div><div class='add'>+	u16 lower;</div><div class='add'>+</div><div class='add'>+	upper = __raw_readl(hw-&gt;port + ENETC4_PSIPMAR0(si));</div><div class='add'>+	lower = __raw_readw(hw-&gt;port + ENETC4_PSIPMAR1(si));</div><div class='add'>+</div><div class='add'>+	put_unaligned_le32(upper, addr);</div><div class='add'>+	put_unaligned_le16(lower, addr + 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_set_si_mac_promisc(struct enetc_hw *hw, int si,</div><div class='add'>+					 bool uc_promisc, bool mc_promisc)</div><div class='add'>+{</div><div class='add'>+	u32 val = enetc_port_rd(hw, ENETC4_PSIPMMR);</div><div class='add'>+</div><div class='add'>+	if (uc_promisc)</div><div class='add'>+		val |= PSIPMMR_SI_MAC_UP(si);</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~PSIPMMR_SI_MAC_UP(si);</div><div class='add'>+</div><div class='add'>+	if (mc_promisc)</div><div class='add'>+		val |= PSIPMMR_SI_MAC_MP(si);</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~PSIPMMR_SI_MAC_MP(si);</div><div class='add'>+</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PSIPMMR, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_set_si_uc_hash_filter(struct enetc_hw *hw, int si,</div><div class='add'>+					    u64 hash)</div><div class='add'>+{</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PSIUMHFR0(si), lower_32_bits(hash));</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PSIUMHFR1(si), upper_32_bits(hash));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_set_si_mc_hash_filter(struct enetc_hw *hw, int si,</div><div class='add'>+					    u64 hash)</div><div class='add'>+{</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PSIMMHFR0(si), lower_32_bits(hash));</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PSIMMHFR1(si), upper_32_bits(hash));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_set_loopback(struct net_device *ndev, bool en)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct enetc_si *si = priv-&gt;si;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_mac_rd(si, ENETC4_PM_CMD_CFG(0));</div><div class='add'>+	val = u32_replace_bits(val, en ? 1 : 0, PM_CMD_CFG_LOOP_EN);</div><div class='add'>+	/* Default to select MAC level loopback mode if loopback is enabled. */</div><div class='add'>+	val = u32_replace_bits(val, en ? LPBCK_MODE_MAC_LEVEL : 0,</div><div class='add'>+			       PM_CMD_CFG_LPBK_MODE);</div><div class='add'>+</div><div class='add'>+	enetc_port_mac_wr(si, ENETC4_PM_CMD_CFG(0), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_clear_maft_entries(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pf-&gt;num_mfe; i++)</div><div class='add'>+		ntmp_maft_delete_entry(&amp;pf-&gt;si-&gt;ntmp_user, i);</div><div class='add'>+</div><div class='add'>+	pf-&gt;num_mfe = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc4_pf_add_maft_entries(struct enetc_pf *pf,</div><div class='add'>+				      struct enetc_mac_addr *mac,</div><div class='add'>+				      int mac_cnt)</div><div class='add'>+{</div><div class='add'>+	struct maft_entry_data maft = {};</div><div class='add'>+	u16 si_bit = BIT(0);</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	maft.cfge.si_bitmap = cpu_to_le16(si_bit);</div><div class='add'>+	for (i = 0; i &lt; mac_cnt; i++) {</div><div class='add'>+		ether_addr_copy(maft.keye.mac_addr, mac[i].addr);</div><div class='add'>+		err = ntmp_maft_add_entry(&amp;pf-&gt;si-&gt;ntmp_user, i, &amp;maft);</div><div class='add'>+		if (unlikely(err)) {</div><div class='add'>+			pf-&gt;num_mfe = i;</div><div class='add'>+			goto clear_maft_entries;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pf-&gt;num_mfe = mac_cnt;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+clear_maft_entries:</div><div class='add'>+	enetc4_pf_clear_maft_entries(pf);</div><div class='add'>+</div><div class='add'>+	return  err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc4_pf_set_uc_exact_filter(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	int max_num_mfe = pf-&gt;caps.mac_filter_num;</div><div class='add'>+	struct enetc_mac_filter mac_filter = {};</div><div class='add'>+	struct net_device *ndev = pf-&gt;si-&gt;ndev;</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+	struct enetc_mac_addr *mac_tbl;</div><div class='add'>+	struct netdev_hw_addr *ha;</div><div class='add'>+	int i = 0, err;</div><div class='add'>+	int mac_cnt;</div><div class='add'>+</div><div class='add'>+	netif_addr_lock_bh(ndev);</div><div class='add'>+</div><div class='add'>+	mac_cnt = netdev_uc_count(ndev);</div><div class='add'>+	if (!mac_cnt) {</div><div class='add'>+		netif_addr_unlock_bh(ndev);</div><div class='add'>+		/* clear both MAC hash and exact filters */</div><div class='add'>+		enetc4_pf_set_si_uc_hash_filter(hw, 0, 0);</div><div class='add'>+		enetc4_pf_clear_maft_entries(pf);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mac_cnt &gt; max_num_mfe) {</div><div class='add'>+		err = -ENOSPC;</div><div class='add'>+		goto unlock_netif_addr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mac_tbl = kcalloc(mac_cnt, sizeof(*mac_tbl), GFP_ATOMIC);</div><div class='add'>+	if (!mac_tbl) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto unlock_netif_addr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_for_each_uc_addr(ha, ndev) {</div><div class='add'>+		enetc_add_mac_addr_ht_filter(&amp;mac_filter, ha-&gt;addr);</div><div class='add'>+		ether_addr_copy(mac_tbl[i++].addr, ha-&gt;addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_addr_unlock_bh(ndev);</div><div class='add'>+</div><div class='add'>+	/* Set temporary unicast hash filters in case of Rx loss when</div><div class='add'>+	 * updating MAC address filter table</div><div class='add'>+	 */</div><div class='add'>+	enetc4_pf_set_si_uc_hash_filter(hw, 0, *mac_filter.mac_hash_table);</div><div class='add'>+	enetc4_pf_clear_maft_entries(pf);</div><div class='add'>+</div><div class='add'>+	if (!enetc4_pf_add_maft_entries(pf, mac_tbl, i))</div><div class='add'>+		enetc4_pf_set_si_uc_hash_filter(hw, 0, 0);</div><div class='add'>+</div><div class='add'>+	kfree(mac_tbl);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unlock_netif_addr:</div><div class='add'>+	netif_addr_unlock_bh(ndev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_set_mac_hash_filter(struct enetc_pf *pf, int type)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = pf-&gt;si-&gt;ndev;</div><div class='add'>+	struct enetc_mac_filter *mac_filter;</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+	struct netdev_hw_addr *ha;</div><div class='add'>+</div><div class='add'>+	netif_addr_lock_bh(ndev);</div><div class='add'>+	if (type &amp; ENETC_MAC_FILTER_TYPE_UC) {</div><div class='add'>+		mac_filter = &amp;pf-&gt;mac_filter[UC];</div><div class='add'>+		enetc_reset_mac_addr_filter(mac_filter);</div><div class='add'>+		netdev_for_each_uc_addr(ha, ndev)</div><div class='add'>+			enetc_add_mac_addr_ht_filter(mac_filter, ha-&gt;addr);</div><div class='add'>+</div><div class='add'>+		enetc4_pf_set_si_uc_hash_filter(hw, 0,</div><div class='add'>+						*mac_filter-&gt;mac_hash_table);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type &amp; ENETC_MAC_FILTER_TYPE_MC) {</div><div class='add'>+		mac_filter = &amp;pf-&gt;mac_filter[MC];</div><div class='add'>+		enetc_reset_mac_addr_filter(mac_filter);</div><div class='add'>+		netdev_for_each_mc_addr(ha, ndev)</div><div class='add'>+			enetc_add_mac_addr_ht_filter(mac_filter, ha-&gt;addr);</div><div class='add'>+</div><div class='add'>+		enetc4_pf_set_si_mc_hash_filter(hw, 0,</div><div class='add'>+						*mac_filter-&gt;mac_hash_table);</div><div class='add'>+	}</div><div class='add'>+	netif_addr_unlock_bh(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_set_mac_filter(struct enetc_pf *pf, int type)</div><div class='add'>+{</div><div class='add'>+	/* Currently, the MAC address filter table (MAFT) only has 4 entries,</div><div class='add'>+	 * and multiple multicast addresses for filtering will be configured</div><div class='add'>+	 * in the default network configuration, so MAFT is only suitable for</div><div class='add'>+	 * unicast filtering. If the number of unicast addresses exceeds the</div><div class='add'>+	 * table capacity, the MAC hash filter will be used.</div><div class='add'>+	 */</div><div class='add'>+	if (type &amp; ENETC_MAC_FILTER_TYPE_UC &amp;&amp; enetc4_pf_set_uc_exact_filter(pf)) {</div><div class='add'>+		/* Fall back to the MAC hash filter */</div><div class='add'>+		enetc4_pf_set_mac_hash_filter(pf, ENETC_MAC_FILTER_TYPE_UC);</div><div class='add'>+		/* Clear the old MAC exact filter */</div><div class='add'>+		enetc4_pf_clear_maft_entries(pf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type &amp; ENETC_MAC_FILTER_TYPE_MC)</div><div class='add'>+		enetc4_pf_set_mac_hash_filter(pf, ENETC_MAC_FILTER_TYPE_MC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct enetc_pf_ops enetc4_pf_ops = {</div><div class='add'>+	.set_si_primary_mac = enetc4_pf_set_si_primary_mac,</div><div class='add'>+	.get_si_primary_mac = enetc4_pf_get_si_primary_mac,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int enetc4_pf_struct_init(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	struct enetc_pf *pf = enetc_si_priv(si);</div><div class='add'>+</div><div class='add'>+	pf-&gt;si = si;</div><div class='add'>+	pf-&gt;total_vfs = pci_sriov_get_totalvfs(si-&gt;pdev);</div><div class='add'>+	pf-&gt;ops = &amp;enetc4_pf_ops;</div><div class='add'>+</div><div class='add'>+	enetc4_get_port_caps(pf);</div><div class='add'>+	enetc4_get_psi_hw_features(si);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 enetc4_psicfgr0_val_construct(bool is_vf, u32 num_tx_bdr, u32 num_rx_bdr)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = ENETC_PSICFGR0_SET_TXBDR(num_tx_bdr);</div><div class='add'>+	val |= ENETC_PSICFGR0_SET_RXBDR(num_rx_bdr);</div><div class='add'>+	val |= ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S);</div><div class='add'>+</div><div class='add'>+	if (is_vf)</div><div class='add'>+		val |= ENETC_PSICFGR0_VTE | ENETC_PSICFGR0_SIVIE;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_default_rings_allocation(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+	u32 num_rx_bdr, num_tx_bdr, val;</div><div class='add'>+	u32 vf_tx_bdr, vf_rx_bdr;</div><div class='add'>+	int i, rx_rem, tx_rem;</div><div class='add'>+</div><div class='add'>+	if (pf-&gt;caps.num_rx_bdr &lt; ENETC_SI_MAX_RING_NUM + pf-&gt;caps.num_vsi)</div><div class='add'>+		num_rx_bdr = pf-&gt;caps.num_rx_bdr - pf-&gt;caps.num_vsi;</div><div class='add'>+	else</div><div class='add'>+		num_rx_bdr = ENETC_SI_MAX_RING_NUM;</div><div class='add'>+</div><div class='add'>+	if (pf-&gt;caps.num_tx_bdr &lt; ENETC_SI_MAX_RING_NUM + pf-&gt;caps.num_vsi)</div><div class='add'>+		num_tx_bdr = pf-&gt;caps.num_tx_bdr - pf-&gt;caps.num_vsi;</div><div class='add'>+	else</div><div class='add'>+		num_tx_bdr = ENETC_SI_MAX_RING_NUM;</div><div class='add'>+</div><div class='add'>+	val = enetc4_psicfgr0_val_construct(false, num_tx_bdr, num_rx_bdr);</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PSICFGR0(0), val);</div><div class='add'>+</div><div class='add'>+	num_rx_bdr = pf-&gt;caps.num_rx_bdr - num_rx_bdr;</div><div class='add'>+	rx_rem = num_rx_bdr % pf-&gt;caps.num_vsi;</div><div class='add'>+	num_rx_bdr = num_rx_bdr / pf-&gt;caps.num_vsi;</div><div class='add'>+</div><div class='add'>+	num_tx_bdr = pf-&gt;caps.num_tx_bdr - num_tx_bdr;</div><div class='add'>+	tx_rem = num_tx_bdr % pf-&gt;caps.num_vsi;</div><div class='add'>+	num_tx_bdr = num_tx_bdr / pf-&gt;caps.num_vsi;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pf-&gt;caps.num_vsi; i++) {</div><div class='add'>+		vf_tx_bdr = (i &lt; tx_rem) ? num_tx_bdr + 1 : num_tx_bdr;</div><div class='add'>+		vf_rx_bdr = (i &lt; rx_rem) ? num_rx_bdr + 1 : num_rx_bdr;</div><div class='add'>+		val = enetc4_psicfgr0_val_construct(true, vf_tx_bdr, vf_rx_bdr);</div><div class='add'>+		enetc_port_wr(hw, ENETC4_PSICFGR0(i + 1), val);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_allocate_si_rings(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	enetc4_default_rings_allocation(pf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_set_si_vlan_promisc(struct enetc_hw *hw, int si, bool en)</div><div class='add'>+{</div><div class='add'>+	u32 val = enetc_port_rd(hw, ENETC4_PSIPVMR);</div><div class='add'>+</div><div class='add'>+	if (en)</div><div class='add'>+		val |= BIT(si);</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~BIT(si);</div><div class='add'>+</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PSIPVMR, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_set_default_si_vlan_promisc(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+	int num_si = pf-&gt;caps.num_vsi + 1;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* enforce VLAN promiscuous mode for all SIs */</div><div class='add'>+	for (i = 0; i &lt; num_si; i++)</div><div class='add'>+		enetc4_pf_set_si_vlan_promisc(hw, i, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Allocate the number of MSI-X vectors for per SI. */</div><div class='add'>+static void enetc4_set_si_msix_num(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+	int i, num_msix, total_si;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	total_si = pf-&gt;caps.num_vsi + 1;</div><div class='add'>+</div><div class='add'>+	num_msix = pf-&gt;caps.num_msix / total_si +</div><div class='add'>+		   pf-&gt;caps.num_msix % total_si - 1;</div><div class='add'>+	val = num_msix &amp; PSICFGR2_NUM_MSIX;</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PSICFGR2(0), val);</div><div class='add'>+</div><div class='add'>+	num_msix = pf-&gt;caps.num_msix / total_si - 1;</div><div class='add'>+	val = num_msix &amp; PSICFGR2_NUM_MSIX;</div><div class='add'>+	for (i = 0; i &lt; pf-&gt;caps.num_vsi; i++)</div><div class='add'>+		enetc_port_wr(hw, ENETC4_PSICFGR2(i + 1), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_enable_all_si(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+	int num_si = pf-&gt;caps.num_vsi + 1;</div><div class='add'>+	u32 si_bitmap = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Master enable for all SIs */</div><div class='add'>+	for (i = 0; i &lt; num_si; i++)</div><div class='add'>+		si_bitmap |= PMR_SI_EN(i);</div><div class='add'>+</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PMR, si_bitmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_configure_port_si(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+</div><div class='add'>+	enetc4_allocate_si_rings(pf);</div><div class='add'>+</div><div class='add'>+	/* Outer VLAN tag will be used for VLAN filtering */</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PSIVLANFMR, PSIVLANFMR_VS);</div><div class='add'>+</div><div class='add'>+	enetc4_set_default_si_vlan_promisc(pf);</div><div class='add'>+</div><div class='add'>+	/* Disable SI MAC multicast &amp; unicast promiscuous */</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PSIPMMR, 0);</div><div class='add'>+</div><div class='add'>+	enetc4_set_si_msix_num(pf);</div><div class='add'>+</div><div class='add'>+	enetc4_enable_all_si(pf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_reset_tc_msdu(struct enetc_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 val = ENETC_MAC_MAXFRM_SIZE;</div><div class='add'>+	int tc;</div><div class='add'>+</div><div class='add'>+	val = u32_replace_bits(val, SDU_TYPE_MPDU, PTCTMSDUR_SDU_TYPE);</div><div class='add'>+</div><div class='add'>+	for (tc = 0; tc &lt; ENETC_NUM_TC; tc++)</div><div class='add'>+		enetc_port_wr(hw, ENETC4_PTCTMSDUR(tc), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_set_trx_frame_size(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct enetc_si *si = pf-&gt;si;</div><div class='add'>+</div><div class='add'>+	enetc_port_mac_wr(si, ENETC4_PM_MAXFRM(0),</div><div class='add'>+			  ENETC_SET_MAXFRM(ENETC_MAC_MAXFRM_SIZE));</div><div class='add'>+</div><div class='add'>+	enetc4_pf_reset_tc_msdu(&amp;si-&gt;hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_enable_trx(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+</div><div class='add'>+	/* Enable port transmit/receive */</div><div class='add'>+	enetc_port_wr(hw, ENETC4_POR, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_configure_port(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	enetc4_configure_port_si(pf);</div><div class='add'>+	enetc4_set_trx_frame_size(pf);</div><div class='add'>+	enetc_set_default_rss_key(pf);</div><div class='add'>+	enetc4_enable_trx(pf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc4_init_ntmp_user(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	struct ntmp_user *user = &amp;si-&gt;ntmp_user;</div><div class='add'>+</div><div class='add'>+	/* For ENETC 4.1, all table versions are 0 */</div><div class='add'>+	memset(&amp;user-&gt;tbl, 0, sizeof(user-&gt;tbl));</div><div class='add'>+</div><div class='add'>+	return enetc4_setup_cbdr(si);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_free_ntmp_user(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	enetc4_teardown_cbdr(si);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc4_pf_init(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pf-&gt;si-&gt;pdev-&gt;dev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Initialize the MAC address for PF and VFs */</div><div class='add'>+	err = enetc_setup_mac_addresses(dev-&gt;of_node, pf);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to set MAC addresses\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = enetc4_init_ntmp_user(pf-&gt;si);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to init CBDR\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enetc4_configure_port(pf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_free(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	enetc4_free_ntmp_user(pf-&gt;si);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_psi_do_set_rx_mode(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct enetc_si *si = container_of(work, struct enetc_si, rx_mode_task);</div><div class='add'>+	struct enetc_pf *pf = enetc_si_priv(si);</div><div class='add'>+	struct net_device *ndev = si-&gt;ndev;</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='add'>+	bool uc_promisc = false;</div><div class='add'>+	bool mc_promisc = false;</div><div class='add'>+	int type = 0;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	if (ndev-&gt;flags &amp; IFF_PROMISC) {</div><div class='add'>+		uc_promisc = true;</div><div class='add'>+		mc_promisc = true;</div><div class='add'>+	} else if (ndev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='add'>+		mc_promisc = true;</div><div class='add'>+		type = ENETC_MAC_FILTER_TYPE_UC;</div><div class='add'>+	} else {</div><div class='add'>+		type = ENETC_MAC_FILTER_TYPE_ALL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enetc4_pf_set_si_mac_promisc(hw, 0, uc_promisc, mc_promisc);</div><div class='add'>+</div><div class='add'>+	if (uc_promisc) {</div><div class='add'>+		enetc4_pf_set_si_uc_hash_filter(hw, 0, 0);</div><div class='add'>+		enetc4_pf_clear_maft_entries(pf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mc_promisc)</div><div class='add'>+		enetc4_pf_set_si_mc_hash_filter(hw, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* Set new MAC filter */</div><div class='add'>+	enetc4_pf_set_mac_filter(pf, type);</div><div class='add'>+</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_set_rx_mode(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct enetc_si *si = priv-&gt;si;</div><div class='add'>+</div><div class='add'>+	queue_work(si-&gt;workqueue, &amp;si-&gt;rx_mode_task);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc4_pf_set_features(struct net_device *ndev,</div><div class='add'>+				  netdev_features_t features)</div><div class='add'>+{</div><div class='add'>+	netdev_features_t changed = ndev-&gt;features ^ features;</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct enetc_hw *hw = &amp;priv-&gt;si-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (changed &amp; NETIF_F_HW_VLAN_CTAG_FILTER) {</div><div class='add'>+		bool promisc_en = !(features &amp; NETIF_F_HW_VLAN_CTAG_FILTER);</div><div class='add'>+</div><div class='add'>+		enetc4_pf_set_si_vlan_promisc(hw, 0, promisc_en);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (changed &amp; NETIF_F_LOOPBACK)</div><div class='add'>+		enetc4_pf_set_loopback(ndev, !!(features &amp; NETIF_F_LOOPBACK));</div><div class='add'>+</div><div class='add'>+	enetc_set_features(ndev, features);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops enetc4_ndev_ops = {</div><div class='add'>+	.ndo_open		= enetc_open,</div><div class='add'>+	.ndo_stop		= enetc_close,</div><div class='add'>+	.ndo_start_xmit		= enetc_xmit,</div><div class='add'>+	.ndo_get_stats		= enetc_get_stats,</div><div class='add'>+	.ndo_set_mac_address	= enetc_pf_set_mac_addr,</div><div class='add'>+	.ndo_set_rx_mode	= enetc4_pf_set_rx_mode,</div><div class='add'>+	.ndo_set_features	= enetc4_pf_set_features,</div><div class='add'>+	.ndo_vlan_rx_add_vid	= enetc_vlan_rx_add_vid,</div><div class='add'>+	.ndo_vlan_rx_kill_vid	= enetc_vlan_rx_del_vid,</div><div class='add'>+	.ndo_eth_ioctl		= enetc_ioctl,</div><div class='add'>+	.ndo_hwtstamp_get	= enetc_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= enetc_hwtstamp_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *</div><div class='add'>+enetc4_pl_mac_select_pcs(struct phylink_config *config, phy_interface_t iface)</div><div class='add'>+{</div><div class='add'>+	struct enetc_pf *pf = phylink_to_enetc_pf(config);</div><div class='add'>+</div><div class='add'>+	return pf-&gt;pcs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_mac_config(struct enetc_pf *pf, unsigned int mode,</div><div class='add'>+			      phy_interface_t phy_mode)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(pf-&gt;si-&gt;ndev);</div><div class='add'>+	struct enetc_si *si = pf-&gt;si;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (enetc_is_pseudo_mac(si))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_mac_rd(si, ENETC4_PM_IF_MODE(0));</div><div class='add'>+	val &amp;= ~(PM_IF_MODE_IFMODE | PM_IF_MODE_ENA);</div><div class='add'>+</div><div class='add'>+	switch (phy_mode) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		val |= IFMODE_RGMII;</div><div class='add'>+		/* We need to enable auto-negotiation for the MAC</div><div class='add'>+		 * if its RGMII interface support In-Band status.</div><div class='add'>+		 */</div><div class='add'>+		if (phylink_autoneg_inband(mode))</div><div class='add'>+			val |= PM_IF_MODE_ENA;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+		val |= IFMODE_RMII;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		val |= IFMODE_SGMII;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_10GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_XGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+		val |= IFMODE_XGMII;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"Unsupported PHY mode:%d\n", phy_mode);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enetc_port_mac_wr(si, ENETC4_PM_IF_MODE(0), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pl_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+				 const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct enetc_pf *pf = phylink_to_enetc_pf(config);</div><div class='add'>+</div><div class='add'>+	enetc4_mac_config(pf, mode, state-&gt;interface);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_set_port_speed(struct enetc_ndev_priv *priv, int speed)</div><div class='add'>+{</div><div class='add'>+	u32 old_speed = priv-&gt;speed;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (speed == old_speed)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_rd(&amp;priv-&gt;si-&gt;hw, ENETC4_PCR);</div><div class='add'>+	val &amp;= ~PCR_PSPEED;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_100:</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		val |= (PCR_PSPEED &amp; PCR_PSPEED_VAL(speed));</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10:</div><div class='add'>+	default:</div><div class='add'>+		val |= (PCR_PSPEED &amp; PCR_PSPEED_VAL(SPEED_10));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;speed = speed;</div><div class='add'>+	enetc_port_wr(&amp;priv-&gt;si-&gt;hw, ENETC4_PCR, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_set_rgmii_mac(struct enetc_pf *pf, int speed, int duplex)</div><div class='add'>+{</div><div class='add'>+	struct enetc_si *si = pf-&gt;si;</div><div class='add'>+	u32 old_val, val;</div><div class='add'>+</div><div class='add'>+	old_val = enetc_port_mac_rd(si, ENETC4_PM_IF_MODE(0));</div><div class='add'>+	val = old_val &amp; ~(PM_IF_MODE_ENA | PM_IF_MODE_M10 | PM_IF_MODE_REVMII);</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		val = u32_replace_bits(val, SSP_1G, PM_IF_MODE_SSP);</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		val = u32_replace_bits(val, SSP_100M, PM_IF_MODE_SSP);</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		val = u32_replace_bits(val, SSP_10M, PM_IF_MODE_SSP);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = u32_replace_bits(val, duplex == DUPLEX_FULL ? 0 : 1,</div><div class='add'>+			       PM_IF_MODE_HD);</div><div class='add'>+</div><div class='add'>+	if (val == old_val)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	enetc_port_mac_wr(si, ENETC4_PM_IF_MODE(0), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_set_rmii_mac(struct enetc_pf *pf, int speed, int duplex)</div><div class='add'>+{</div><div class='add'>+	struct enetc_si *si = pf-&gt;si;</div><div class='add'>+	u32 old_val, val;</div><div class='add'>+</div><div class='add'>+	old_val = enetc_port_mac_rd(si, ENETC4_PM_IF_MODE(0));</div><div class='add'>+	val = old_val &amp; ~(PM_IF_MODE_ENA | PM_IF_MODE_SSP);</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		val &amp;= ~PM_IF_MODE_M10;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		val |= PM_IF_MODE_M10;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = u32_replace_bits(val, duplex == DUPLEX_FULL ? 0 : 1,</div><div class='add'>+			       PM_IF_MODE_HD);</div><div class='add'>+</div><div class='add'>+	if (val == old_val)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	enetc_port_mac_wr(si, ENETC4_PM_IF_MODE(0), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_set_hd_flow_control(struct enetc_pf *pf, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct enetc_si *si = pf-&gt;si;</div><div class='add'>+	u32 old_val, val;</div><div class='add'>+</div><div class='add'>+	if (!pf-&gt;caps.half_duplex)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	old_val = enetc_port_mac_rd(si, ENETC4_PM_CMD_CFG(0));</div><div class='add'>+	val = u32_replace_bits(old_val, enable ? 1 : 0, PM_CMD_CFG_HD_FCEN);</div><div class='add'>+	if (val == old_val)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	enetc_port_mac_wr(si, ENETC4_PM_CMD_CFG(0), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_set_rx_pause(struct enetc_pf *pf, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct enetc_si *si = pf-&gt;si;</div><div class='add'>+	u32 old_val, val;</div><div class='add'>+</div><div class='add'>+	old_val = enetc_port_mac_rd(si, ENETC4_PM_CMD_CFG(0));</div><div class='add'>+	val = u32_replace_bits(old_val, rx_pause ? 0 : 1, PM_CMD_CFG_PAUSE_IGN);</div><div class='add'>+	if (val == old_val)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	enetc_port_mac_wr(si, ENETC4_PM_CMD_CFG(0), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_set_tx_pause(struct enetc_pf *pf, int num_rxbdr, bool tx_pause)</div><div class='add'>+{</div><div class='add'>+	u32 pause_off_thresh = 0, pause_on_thresh = 0;</div><div class='add'>+	u32 init_quanta = 0, refresh_quanta = 0;</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+	u32 rbmr, old_rbmr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_rxbdr; i++) {</div><div class='add'>+		old_rbmr = enetc_rxbdr_rd(hw, i, ENETC_RBMR);</div><div class='add'>+		rbmr = u32_replace_bits(old_rbmr, tx_pause ? 1 : 0, ENETC_RBMR_CM);</div><div class='add'>+		if (rbmr == old_rbmr)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		enetc_rxbdr_wr(hw, i, ENETC_RBMR, rbmr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tx_pause) {</div><div class='add'>+		/* When the port first enters congestion, send a PAUSE request</div><div class='add'>+		 * with the maximum number of quanta. When the port exits</div><div class='add'>+		 * congestion, it will automatically send a PAUSE frame with</div><div class='add'>+		 * zero quanta.</div><div class='add'>+		 */</div><div class='add'>+		init_quanta = 0xffff;</div><div class='add'>+</div><div class='add'>+		/* Also, set up the refresh timer to send follow-up PAUSE</div><div class='add'>+		 * frames at half the quanta value, in case the congestion</div><div class='add'>+		 * condition persists.</div><div class='add'>+		 */</div><div class='add'>+		refresh_quanta = 0xffff / 2;</div><div class='add'>+</div><div class='add'>+		/* Start emitting PAUSE frames when 3 large frames (or more</div><div class='add'>+		 * smaller frames) have accumulated in the FIFO waiting to be</div><div class='add'>+		 * DMAed to the RX ring.</div><div class='add'>+		 */</div><div class='add'>+		pause_on_thresh = 3 * ENETC_MAC_MAXFRM_SIZE;</div><div class='add'>+		pause_off_thresh = 1 * ENETC_MAC_MAXFRM_SIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enetc_port_mac_wr(pf-&gt;si, ENETC4_PM_PAUSE_QUANTA(0), init_quanta);</div><div class='add'>+	enetc_port_mac_wr(pf-&gt;si, ENETC4_PM_PAUSE_THRESH(0), refresh_quanta);</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PPAUONTR, pause_on_thresh);</div><div class='add'>+	enetc_port_wr(hw, ENETC4_PPAUOFFTR, pause_off_thresh);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_enable_mac(struct enetc_pf *pf, bool en)</div><div class='add'>+{</div><div class='add'>+	struct enetc_si *si = pf-&gt;si;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_mac_rd(si, ENETC4_PM_CMD_CFG(0));</div><div class='add'>+	val &amp;= ~(PM_CMD_CFG_TX_EN | PM_CMD_CFG_RX_EN);</div><div class='add'>+	val |= en ? (PM_CMD_CFG_TX_EN | PM_CMD_CFG_RX_EN) : 0;</div><div class='add'>+</div><div class='add'>+	enetc_port_mac_wr(si, ENETC4_PM_CMD_CFG(0), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pl_mac_link_up(struct phylink_config *config,</div><div class='add'>+				  struct phy_device *phy, unsigned int mode,</div><div class='add'>+				  phy_interface_t interface, int speed,</div><div class='add'>+				  int duplex, bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct enetc_pf *pf = phylink_to_enetc_pf(config);</div><div class='add'>+	struct enetc_si *si = pf-&gt;si;</div><div class='add'>+	struct enetc_ndev_priv *priv;</div><div class='add'>+	bool hd_fc = false;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(si-&gt;ndev);</div><div class='add'>+	enetc4_set_port_speed(priv, speed);</div><div class='add'>+</div><div class='add'>+	if (!phylink_autoneg_inband(mode) &amp;&amp;</div><div class='add'>+	    phy_interface_mode_is_rgmii(interface))</div><div class='add'>+		enetc4_set_rgmii_mac(pf, speed, duplex);</div><div class='add'>+</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_RMII)</div><div class='add'>+		enetc4_set_rmii_mac(pf, speed, duplex);</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_FULL) {</div><div class='add'>+		/* When preemption is enabled, generation of PAUSE frames</div><div class='add'>+		 * must be disabled, as stated in the IEEE 802.3 standard.</div><div class='add'>+		 */</div><div class='add'>+		if (priv-&gt;active_offloads &amp; ENETC_F_QBU)</div><div class='add'>+			tx_pause = false;</div><div class='add'>+	} else { /* DUPLEX_HALF */</div><div class='add'>+		if (tx_pause || rx_pause)</div><div class='add'>+			hd_fc = true;</div><div class='add'>+</div><div class='add'>+		/* As per 802.3 annex 31B, PAUSE frames are only supported</div><div class='add'>+		 * when the link is configured for full duplex operation.</div><div class='add'>+		 */</div><div class='add'>+		tx_pause = false;</div><div class='add'>+		rx_pause = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enetc4_set_hd_flow_control(pf, hd_fc);</div><div class='add'>+	enetc4_set_tx_pause(pf, priv-&gt;num_rx_rings, tx_pause);</div><div class='add'>+	enetc4_set_rx_pause(pf, rx_pause);</div><div class='add'>+	enetc4_enable_mac(pf, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pl_mac_link_down(struct phylink_config *config,</div><div class='add'>+				    unsigned int mode,</div><div class='add'>+				    phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct enetc_pf *pf = phylink_to_enetc_pf(config);</div><div class='add'>+</div><div class='add'>+	enetc4_enable_mac(pf, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops enetc_pl_mac_ops = {</div><div class='add'>+	.mac_select_pcs = enetc4_pl_mac_select_pcs,</div><div class='add'>+	.mac_config = enetc4_pl_mac_config,</div><div class='add'>+	.mac_link_up = enetc4_pl_mac_link_up,</div><div class='add'>+	.mac_link_down = enetc4_pl_mac_link_down,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void enetc4_pci_remove(void *data)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = data;</div><div class='add'>+</div><div class='add'>+	enetc_pci_remove(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc4_link_init(struct enetc_ndev_priv *priv,</div><div class='add'>+			    struct device_node *node)</div><div class='add'>+{</div><div class='add'>+	struct enetc_pf *pf = enetc_si_priv(priv-&gt;si);</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = of_get_phy_mode(node, &amp;pf-&gt;if_mode);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to get PHY mode\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = enetc_mdiobus_create(pf, node);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to create MDIO bus\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = enetc_phylink_create(priv, node, &amp;enetc_pl_mac_ops);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to create phylink\n");</div><div class='add'>+		goto err_phylink_create;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_phylink_create:</div><div class='add'>+	enetc_mdiobus_destroy(pf);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_link_deinit(struct enetc_ndev_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct enetc_pf *pf = enetc_si_priv(priv-&gt;si);</div><div class='add'>+</div><div class='add'>+	enetc_phylink_destroy(priv);</div><div class='add'>+	enetc_mdiobus_destroy(pf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc4_psi_wq_task_init(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	char wq_name[24];</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;si-&gt;rx_mode_task, enetc4_psi_do_set_rx_mode);</div><div class='add'>+	snprintf(wq_name, sizeof(wq_name), "enetc-%s", pci_name(si-&gt;pdev));</div><div class='add'>+	si-&gt;workqueue = create_singlethread_workqueue(wq_name);</div><div class='add'>+	if (!si-&gt;workqueue)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc4_pf_netdev_create(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;si-&gt;pdev-&gt;dev;</div><div class='add'>+	struct enetc_ndev_priv *priv;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ndev = alloc_etherdev_mqs(sizeof(struct enetc_ndev_priv),</div><div class='add'>+				  si-&gt;num_tx_rings, si-&gt;num_rx_rings);</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return  -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+	priv-&gt;ref_clk = devm_clk_get_optional(dev, "ref");</div><div class='add'>+	if (IS_ERR(priv-&gt;ref_clk)) {</div><div class='add'>+		dev_err(dev, "Get reference clock failed\n");</div><div class='add'>+		err = PTR_ERR(priv-&gt;ref_clk);</div><div class='add'>+		goto err_clk_get;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enetc_pf_netdev_setup(si, ndev, &amp;enetc4_ndev_ops);</div><div class='add'>+</div><div class='add'>+	enetc_init_si_rings_params(priv);</div><div class='add'>+</div><div class='add'>+	err = enetc_configure_si(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to configure SI\n");</div><div class='add'>+		goto err_config_si;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = enetc_alloc_msix(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to alloc MSI-X\n");</div><div class='add'>+		goto err_alloc_msix;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = enetc4_link_init(priv, dev-&gt;of_node);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_link_init;</div><div class='add'>+</div><div class='add'>+	err = enetc4_psi_wq_task_init(si);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to init workqueue\n");</div><div class='add'>+		goto err_wq_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = register_netdev(ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to register netdev\n");</div><div class='add'>+		goto err_reg_netdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_reg_netdev:</div><div class='add'>+	destroy_workqueue(si-&gt;workqueue);</div><div class='add'>+err_wq_init:</div><div class='add'>+	enetc4_link_deinit(priv);</div><div class='add'>+err_link_init:</div><div class='add'>+	enetc_free_msix(priv);</div><div class='add'>+err_alloc_msix:</div><div class='add'>+err_config_si:</div><div class='add'>+err_clk_get:</div><div class='add'>+	free_netdev(ndev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_netdev_destroy(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(si-&gt;ndev);</div><div class='add'>+	struct net_device *ndev = si-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	unregister_netdev(ndev);</div><div class='add'>+	cancel_work(&amp;si-&gt;rx_mode_task);</div><div class='add'>+	destroy_workqueue(si-&gt;workqueue);</div><div class='add'>+	enetc4_link_deinit(priv);</div><div class='add'>+	enetc_free_msix(priv);</div><div class='add'>+	free_netdev(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct enetc_si_ops enetc4_psi_ops = {</div><div class='add'>+	.get_rss_table = enetc4_get_rss_table,</div><div class='add'>+	.set_rss_table = enetc4_set_rss_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int enetc4_pf_probe(struct pci_dev *pdev,</div><div class='add'>+			   const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct enetc_si *si;</div><div class='add'>+	struct enetc_pf *pf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = enetc_pci_probe(pdev, KBUILD_MODNAME, sizeof(*pf));</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(dev, err, "PCIe probing failed\n");</div><div class='add'>+</div><div class='add'>+	err = devm_add_action_or_reset(dev, enetc4_pci_remove, pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* si is the private data. */</div><div class='add'>+	si = pci_get_drvdata(pdev);</div><div class='add'>+	if (!si-&gt;hw.port || !si-&gt;hw.global)</div><div class='add'>+		return dev_err_probe(dev, -ENODEV,</div><div class='add'>+				     "Couldn't map PF only space\n");</div><div class='add'>+</div><div class='add'>+	si-&gt;revision = enetc_get_ip_revision(&amp;si-&gt;hw);</div><div class='add'>+	si-&gt;ops = &amp;enetc4_psi_ops;</div><div class='add'>+	err = enetc_get_driver_data(si);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(dev, err,</div><div class='add'>+				     "Could not get PF driver data\n");</div><div class='add'>+</div><div class='add'>+	err = enetc4_pf_struct_init(si);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	pf = enetc_si_priv(si);</div><div class='add'>+	err = enetc4_pf_init(pf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	enetc_get_si_caps(si);</div><div class='add'>+</div><div class='add'>+	err = enetc4_pf_netdev_create(si);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_netdev_create;</div><div class='add'>+</div><div class='add'>+	enetc_create_debugfs(si);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_netdev_create:</div><div class='add'>+	enetc4_pf_free(pf);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc4_pf_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct enetc_si *si = pci_get_drvdata(pdev);</div><div class='add'>+	struct enetc_pf *pf = enetc_si_priv(si);</div><div class='add'>+</div><div class='add'>+	enetc_remove_debugfs(si);</div><div class='add'>+	enetc4_pf_netdev_destroy(si);</div><div class='add'>+	enetc4_pf_free(pf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id enetc4_pf_id_table[] = {</div><div class='add'>+	{ PCI_DEVICE(NXP_ENETC_VENDOR_ID, NXP_ENETC_PF_DEV_ID) },</div><div class='add'>+	{ PCI_DEVICE(NXP_ENETC_VENDOR_ID, NXP_ENETC_PPM_DEV_ID) },</div><div class='add'>+	{ 0, } /* End of table. */</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, enetc4_pf_id_table);</div><div class='add'>+</div><div class='add'>+static struct pci_driver enetc4_pf_driver = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.id_table = enetc4_pf_id_table,</div><div class='add'>+	.probe = enetc4_pf_probe,</div><div class='add'>+	.remove = enetc4_pf_remove,</div><div class='add'>+};</div><div class='add'>+module_pci_driver(enetc4_pf_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("ENETC4 PF Driver");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_cbdr.c b/drivers/net/ethernet/freescale/enetc/enetc_cbdr.c<br/>index 20bfdf7fb4b4..3d5f31879d5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_cbdr.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_cbdr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_cbdr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_cbdr.c</a></div><div class='hunk'>@@ -60,6 +60,44 @@ void enetc_teardown_cbdr(struct enetc_cbdr *cbdr)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_teardown_cbdr);</div><div class='ctx'> </div><div class='add'>+int enetc4_setup_cbdr(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	struct ntmp_user *user = &amp;si-&gt;ntmp_user;</div><div class='add'>+	struct device *dev = &amp;si-&gt;pdev-&gt;dev;</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='add'>+	struct netc_cbdr_regs regs;</div><div class='add'>+</div><div class='add'>+	user-&gt;cbdr_num = 1;</div><div class='add'>+	user-&gt;dev = dev;</div><div class='add'>+	user-&gt;ring = devm_kcalloc(dev, user-&gt;cbdr_num,</div><div class='add'>+				  sizeof(struct netc_cbdr), GFP_KERNEL);</div><div class='add'>+	if (!user-&gt;ring)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* set CBDR cache attributes */</div><div class='add'>+	enetc_wr(hw, ENETC_SICAR2,</div><div class='add'>+		 ENETC_SICAR_RD_COHERENT | ENETC_SICAR_WR_COHERENT);</div><div class='add'>+</div><div class='add'>+	regs.pir = hw-&gt;reg + ENETC_SICBDRPIR;</div><div class='add'>+	regs.cir = hw-&gt;reg + ENETC_SICBDRCIR;</div><div class='add'>+	regs.mr = hw-&gt;reg + ENETC_SICBDRMR;</div><div class='add'>+	regs.bar0 = hw-&gt;reg + ENETC_SICBDRBAR0;</div><div class='add'>+	regs.bar1 = hw-&gt;reg + ENETC_SICBDRBAR1;</div><div class='add'>+	regs.lenr = hw-&gt;reg + ENETC_SICBDRLENR;</div><div class='add'>+</div><div class='add'>+	return ntmp_init_cbdr(user-&gt;ring, dev, &amp;regs);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc4_setup_cbdr);</div><div class='add'>+</div><div class='add'>+void enetc4_teardown_cbdr(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	struct ntmp_user *user = &amp;si-&gt;ntmp_user;</div><div class='add'>+</div><div class='add'>+	ntmp_free_cbdr(user-&gt;ring);</div><div class='add'>+	user-&gt;dev = NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc4_teardown_cbdr);</div><div class='add'>+</div><div class='ctx'> static void enetc_clean_cbdr(struct enetc_cbdr *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_cbd *dest_cbd;</div><div class='hunk'>@@ -256,3 +294,15 @@ int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count)</div><div class='ctx'> 	return enetc_cmd_rss_table(si, (u32 *)table, count, false);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_set_rss_table);</div><div class='add'>+</div><div class='add'>+int enetc4_get_rss_table(struct enetc_si *si, u32 *table, int count)</div><div class='add'>+{</div><div class='add'>+	return ntmp_rsst_query_entry(&amp;si-&gt;ntmp_user, table, count);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc4_get_rss_table);</div><div class='add'>+</div><div class='add'>+int enetc4_set_rss_table(struct enetc_si *si, const u32 *table, int count)</div><div class='add'>+{</div><div class='add'>+	return ntmp_rsst_update_entry(&amp;si-&gt;ntmp_user, table, count);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc4_set_rss_table);</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c b/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c<br/>index e1745b89362d..fed89d4f1e1d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_ethtool.c</a></div><div class='hunk'>@@ -4,6 +4,9 @@</div><div class='ctx'> #include &lt;linux/ethtool_netlink.h&gt;</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "enetc.h"</div><div class='ctx'> </div><div class='ctx'> static const u32 enetc_si_regs[] = {</div><div class='hunk'>@@ -141,8 +144,8 @@ static const struct {</div><div class='ctx'> </div><div class='ctx'> static const struct {</div><div class='ctx'> 	int reg;</div><div class='del'>-	char name[ETH_GSTRING_LEN];</div><div class='del'>-} enetc_port_counters[] = {</div><div class='add'>+	char name[ETH_GSTRING_LEN] __nonstring;</div><div class='add'>+} enetc_pm_counters[] = {</div><div class='ctx'> 	{ ENETC_PM_REOCT(0),	"MAC rx ethernet octets" },</div><div class='ctx'> 	{ ENETC_PM_RALN(0),	"MAC rx alignment errors" },</div><div class='ctx'> 	{ ENETC_PM_RXPF(0),	"MAC rx valid pause frames" },</div><div class='hunk'>@@ -194,6 +197,12 @@ static const struct {</div><div class='ctx'> 	{ ENETC_PM_TSCOL(0),	"MAC tx single collisions" },</div><div class='ctx'> 	{ ENETC_PM_TLCOL(0),	"MAC tx late collisions" },</div><div class='ctx'> 	{ ENETC_PM_TECOL(0),	"MAC tx excessive collisions" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct {</div><div class='add'>+	int reg;</div><div class='add'>+	char name[ETH_GSTRING_LEN] __nonstring;</div><div class='add'>+} enetc_port_counters[] = {</div><div class='ctx'> 	{ ENETC_UFDMF,		"SI MAC nomatch u-cast discards" },</div><div class='ctx'> 	{ ENETC_MFDMF,		"SI MAC nomatch m-cast discards" },</div><div class='ctx'> 	{ ENETC_PBFDSIR,	"SI MAC nomatch b-cast discards" },</div><div class='hunk'>@@ -240,6 +249,7 @@ static int enetc_get_sset_count(struct net_device *ndev, int sset)</div><div class='ctx'> 		return len;</div><div class='ctx'> </div><div class='ctx'> 	len += ARRAY_SIZE(enetc_port_counters);</div><div class='add'>+	len += ARRAY_SIZE(enetc_pm_counters);</div><div class='ctx'> </div><div class='ctx'> 	return len;</div><div class='ctx'> }</div><div class='hunk'>@@ -264,7 +274,10 @@ static void enetc_get_strings(struct net_device *ndev, u32 stringset, u8 *data)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(enetc_port_counters); i++)</div><div class='del'>-			ethtool_puts(&amp;data, enetc_port_counters[i].name);</div><div class='add'>+			ethtool_cpy(&amp;data, enetc_port_counters[i].name);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(enetc_pm_counters); i++)</div><div class='add'>+			ethtool_cpy(&amp;data, enetc_pm_counters[i].name);</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -302,13 +315,16 @@ static void enetc_get_ethtool_stats(struct net_device *ndev,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(enetc_port_counters); i++)</div><div class='ctx'> 		data[o++] = enetc_port_rd(hw, enetc_port_counters[i].reg);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(enetc_pm_counters); i++)</div><div class='add'>+		data[o++] = enetc_port_rd64(hw, enetc_pm_counters[i].reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void enetc_pause_stats(struct enetc_hw *hw, int mac,</div><div class='ctx'> 			      struct ethtool_pause_stats *pause_stats)</div><div class='ctx'> {</div><div class='del'>-	pause_stats-&gt;tx_pause_frames = enetc_port_rd(hw, ENETC_PM_TXPF(mac));</div><div class='del'>-	pause_stats-&gt;rx_pause_frames = enetc_port_rd(hw, ENETC_PM_RXPF(mac));</div><div class='add'>+	pause_stats-&gt;tx_pause_frames = enetc_port_rd64(hw, ENETC_PM_TXPF(mac));</div><div class='add'>+	pause_stats-&gt;rx_pause_frames = enetc_port_rd64(hw, ENETC_PM_RXPF(mac));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void enetc_get_pause_stats(struct net_device *ndev,</div><div class='hunk'>@@ -335,31 +351,31 @@ static void enetc_get_pause_stats(struct net_device *ndev,</div><div class='ctx'> static void enetc_mac_stats(struct enetc_hw *hw, int mac,</div><div class='ctx'> 			    struct ethtool_eth_mac_stats *s)</div><div class='ctx'> {</div><div class='del'>-	s-&gt;FramesTransmittedOK = enetc_port_rd(hw, ENETC_PM_TFRM(mac));</div><div class='del'>-	s-&gt;SingleCollisionFrames = enetc_port_rd(hw, ENETC_PM_TSCOL(mac));</div><div class='del'>-	s-&gt;MultipleCollisionFrames = enetc_port_rd(hw, ENETC_PM_TMCOL(mac));</div><div class='del'>-	s-&gt;FramesReceivedOK = enetc_port_rd(hw, ENETC_PM_RFRM(mac));</div><div class='del'>-	s-&gt;FrameCheckSequenceErrors = enetc_port_rd(hw, ENETC_PM_RFCS(mac));</div><div class='del'>-	s-&gt;AlignmentErrors = enetc_port_rd(hw, ENETC_PM_RALN(mac));</div><div class='del'>-	s-&gt;OctetsTransmittedOK = enetc_port_rd(hw, ENETC_PM_TEOCT(mac));</div><div class='del'>-	s-&gt;FramesWithDeferredXmissions = enetc_port_rd(hw, ENETC_PM_TDFR(mac));</div><div class='del'>-	s-&gt;LateCollisions = enetc_port_rd(hw, ENETC_PM_TLCOL(mac));</div><div class='del'>-	s-&gt;FramesAbortedDueToXSColls = enetc_port_rd(hw, ENETC_PM_TECOL(mac));</div><div class='del'>-	s-&gt;FramesLostDueToIntMACXmitError = enetc_port_rd(hw, ENETC_PM_TERR(mac));</div><div class='del'>-	s-&gt;CarrierSenseErrors = enetc_port_rd(hw, ENETC_PM_TCRSE(mac));</div><div class='del'>-	s-&gt;OctetsReceivedOK = enetc_port_rd(hw, ENETC_PM_REOCT(mac));</div><div class='del'>-	s-&gt;FramesLostDueToIntMACRcvError = enetc_port_rd(hw, ENETC_PM_RDRNTP(mac));</div><div class='del'>-	s-&gt;MulticastFramesXmittedOK = enetc_port_rd(hw, ENETC_PM_TMCA(mac));</div><div class='del'>-	s-&gt;BroadcastFramesXmittedOK = enetc_port_rd(hw, ENETC_PM_TBCA(mac));</div><div class='del'>-	s-&gt;MulticastFramesReceivedOK = enetc_port_rd(hw, ENETC_PM_RMCA(mac));</div><div class='del'>-	s-&gt;BroadcastFramesReceivedOK = enetc_port_rd(hw, ENETC_PM_RBCA(mac));</div><div class='add'>+	s-&gt;FramesTransmittedOK = enetc_port_rd64(hw, ENETC_PM_TFRM(mac));</div><div class='add'>+	s-&gt;SingleCollisionFrames = enetc_port_rd64(hw, ENETC_PM_TSCOL(mac));</div><div class='add'>+	s-&gt;MultipleCollisionFrames = enetc_port_rd64(hw, ENETC_PM_TMCOL(mac));</div><div class='add'>+	s-&gt;FramesReceivedOK = enetc_port_rd64(hw, ENETC_PM_RFRM(mac));</div><div class='add'>+	s-&gt;FrameCheckSequenceErrors = enetc_port_rd64(hw, ENETC_PM_RFCS(mac));</div><div class='add'>+	s-&gt;AlignmentErrors = enetc_port_rd64(hw, ENETC_PM_RALN(mac));</div><div class='add'>+	s-&gt;OctetsTransmittedOK = enetc_port_rd64(hw, ENETC_PM_TEOCT(mac));</div><div class='add'>+	s-&gt;FramesWithDeferredXmissions = enetc_port_rd64(hw, ENETC_PM_TDFR(mac));</div><div class='add'>+	s-&gt;LateCollisions = enetc_port_rd64(hw, ENETC_PM_TLCOL(mac));</div><div class='add'>+	s-&gt;FramesAbortedDueToXSColls = enetc_port_rd64(hw, ENETC_PM_TECOL(mac));</div><div class='add'>+	s-&gt;FramesLostDueToIntMACXmitError = enetc_port_rd64(hw, ENETC_PM_TERR(mac));</div><div class='add'>+	s-&gt;CarrierSenseErrors = enetc_port_rd64(hw, ENETC_PM_TCRSE(mac));</div><div class='add'>+	s-&gt;OctetsReceivedOK = enetc_port_rd64(hw, ENETC_PM_REOCT(mac));</div><div class='add'>+	s-&gt;FramesLostDueToIntMACRcvError = enetc_port_rd64(hw, ENETC_PM_RDRNTP(mac));</div><div class='add'>+	s-&gt;MulticastFramesXmittedOK = enetc_port_rd64(hw, ENETC_PM_TMCA(mac));</div><div class='add'>+	s-&gt;BroadcastFramesXmittedOK = enetc_port_rd64(hw, ENETC_PM_TBCA(mac));</div><div class='add'>+	s-&gt;MulticastFramesReceivedOK = enetc_port_rd64(hw, ENETC_PM_RMCA(mac));</div><div class='add'>+	s-&gt;BroadcastFramesReceivedOK = enetc_port_rd64(hw, ENETC_PM_RBCA(mac));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void enetc_ctrl_stats(struct enetc_hw *hw, int mac,</div><div class='ctx'> 			     struct ethtool_eth_ctrl_stats *s)</div><div class='ctx'> {</div><div class='del'>-	s-&gt;MACControlFramesTransmitted = enetc_port_rd(hw, ENETC_PM_TCNP(mac));</div><div class='del'>-	s-&gt;MACControlFramesReceived = enetc_port_rd(hw, ENETC_PM_RCNP(mac));</div><div class='add'>+	s-&gt;MACControlFramesTransmitted = enetc_port_rd64(hw, ENETC_PM_TCNP(mac));</div><div class='add'>+	s-&gt;MACControlFramesReceived = enetc_port_rd64(hw, ENETC_PM_RCNP(mac));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_rmon_hist_range enetc_rmon_ranges[] = {</div><div class='hunk'>@@ -376,26 +392,26 @@ static const struct ethtool_rmon_hist_range enetc_rmon_ranges[] = {</div><div class='ctx'> static void enetc_rmon_stats(struct enetc_hw *hw, int mac,</div><div class='ctx'> 			     struct ethtool_rmon_stats *s)</div><div class='ctx'> {</div><div class='del'>-	s-&gt;undersize_pkts = enetc_port_rd(hw, ENETC_PM_RUND(mac));</div><div class='del'>-	s-&gt;oversize_pkts = enetc_port_rd(hw, ENETC_PM_ROVR(mac));</div><div class='del'>-	s-&gt;fragments = enetc_port_rd(hw, ENETC_PM_RFRG(mac));</div><div class='del'>-	s-&gt;jabbers = enetc_port_rd(hw, ENETC_PM_RJBR(mac));</div><div class='del'>-</div><div class='del'>-	s-&gt;hist[0] = enetc_port_rd(hw, ENETC_PM_R64(mac));</div><div class='del'>-	s-&gt;hist[1] = enetc_port_rd(hw, ENETC_PM_R127(mac));</div><div class='del'>-	s-&gt;hist[2] = enetc_port_rd(hw, ENETC_PM_R255(mac));</div><div class='del'>-	s-&gt;hist[3] = enetc_port_rd(hw, ENETC_PM_R511(mac));</div><div class='del'>-	s-&gt;hist[4] = enetc_port_rd(hw, ENETC_PM_R1023(mac));</div><div class='del'>-	s-&gt;hist[5] = enetc_port_rd(hw, ENETC_PM_R1522(mac));</div><div class='del'>-	s-&gt;hist[6] = enetc_port_rd(hw, ENETC_PM_R1523X(mac));</div><div class='del'>-</div><div class='del'>-	s-&gt;hist_tx[0] = enetc_port_rd(hw, ENETC_PM_T64(mac));</div><div class='del'>-	s-&gt;hist_tx[1] = enetc_port_rd(hw, ENETC_PM_T127(mac));</div><div class='del'>-	s-&gt;hist_tx[2] = enetc_port_rd(hw, ENETC_PM_T255(mac));</div><div class='del'>-	s-&gt;hist_tx[3] = enetc_port_rd(hw, ENETC_PM_T511(mac));</div><div class='del'>-	s-&gt;hist_tx[4] = enetc_port_rd(hw, ENETC_PM_T1023(mac));</div><div class='del'>-	s-&gt;hist_tx[5] = enetc_port_rd(hw, ENETC_PM_T1522(mac));</div><div class='del'>-	s-&gt;hist_tx[6] = enetc_port_rd(hw, ENETC_PM_T1523X(mac));</div><div class='add'>+	s-&gt;undersize_pkts = enetc_port_rd64(hw, ENETC_PM_RUND(mac));</div><div class='add'>+	s-&gt;oversize_pkts = enetc_port_rd64(hw, ENETC_PM_ROVR(mac));</div><div class='add'>+	s-&gt;fragments = enetc_port_rd64(hw, ENETC_PM_RFRG(mac));</div><div class='add'>+	s-&gt;jabbers = enetc_port_rd64(hw, ENETC_PM_RJBR(mac));</div><div class='add'>+</div><div class='add'>+	s-&gt;hist[0] = enetc_port_rd64(hw, ENETC_PM_R64(mac));</div><div class='add'>+	s-&gt;hist[1] = enetc_port_rd64(hw, ENETC_PM_R127(mac));</div><div class='add'>+	s-&gt;hist[2] = enetc_port_rd64(hw, ENETC_PM_R255(mac));</div><div class='add'>+	s-&gt;hist[3] = enetc_port_rd64(hw, ENETC_PM_R511(mac));</div><div class='add'>+	s-&gt;hist[4] = enetc_port_rd64(hw, ENETC_PM_R1023(mac));</div><div class='add'>+	s-&gt;hist[5] = enetc_port_rd64(hw, ENETC_PM_R1522(mac));</div><div class='add'>+	s-&gt;hist[6] = enetc_port_rd64(hw, ENETC_PM_R1523X(mac));</div><div class='add'>+</div><div class='add'>+	s-&gt;hist_tx[0] = enetc_port_rd64(hw, ENETC_PM_T64(mac));</div><div class='add'>+	s-&gt;hist_tx[1] = enetc_port_rd64(hw, ENETC_PM_T127(mac));</div><div class='add'>+	s-&gt;hist_tx[2] = enetc_port_rd64(hw, ENETC_PM_T255(mac));</div><div class='add'>+	s-&gt;hist_tx[3] = enetc_port_rd64(hw, ENETC_PM_T511(mac));</div><div class='add'>+	s-&gt;hist_tx[4] = enetc_port_rd64(hw, ENETC_PM_T1023(mac));</div><div class='add'>+	s-&gt;hist_tx[5] = enetc_port_rd64(hw, ENETC_PM_T1522(mac));</div><div class='add'>+	s-&gt;hist_tx[6] = enetc_port_rd64(hw, ENETC_PM_T1523X(mac));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void enetc_get_eth_mac_stats(struct net_device *ndev,</div><div class='hunk'>@@ -419,6 +435,48 @@ static void enetc_get_eth_mac_stats(struct net_device *ndev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void enetc_ppm_mac_stats(struct enetc_si *si,</div><div class='add'>+				struct ethtool_eth_mac_stats *s)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='add'>+	u64 rufcr, rmfcr, rbfcr;</div><div class='add'>+	u64 tufcr, tmfcr, tbfcr;</div><div class='add'>+</div><div class='add'>+	rufcr = enetc_port_rd64(hw, ENETC4_PPMRUFCR);</div><div class='add'>+	rmfcr = enetc_port_rd64(hw, ENETC4_PPMRMFCR);</div><div class='add'>+	rbfcr = enetc_port_rd64(hw, ENETC4_PPMRBFCR);</div><div class='add'>+</div><div class='add'>+	tufcr = enetc_port_rd64(hw, ENETC4_PPMTUFCR);</div><div class='add'>+	tmfcr = enetc_port_rd64(hw, ENETC4_PPMTMFCR);</div><div class='add'>+	tbfcr = enetc_port_rd64(hw, ENETC4_PPMTBFCR);</div><div class='add'>+</div><div class='add'>+	s-&gt;FramesTransmittedOK = tufcr + tmfcr + tbfcr;</div><div class='add'>+	s-&gt;FramesReceivedOK = rufcr + rmfcr + rbfcr;</div><div class='add'>+	s-&gt;OctetsTransmittedOK = enetc_port_rd64(hw, ENETC4_PPMTOCR);</div><div class='add'>+	s-&gt;OctetsReceivedOK = enetc_port_rd64(hw, ENETC4_PPMROCR);</div><div class='add'>+	s-&gt;MulticastFramesXmittedOK = tmfcr;</div><div class='add'>+	s-&gt;BroadcastFramesXmittedOK = tbfcr;</div><div class='add'>+	s-&gt;MulticastFramesReceivedOK = rmfcr;</div><div class='add'>+	s-&gt;BroadcastFramesReceivedOK = rbfcr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_ppm_get_eth_mac_stats(struct net_device *ndev,</div><div class='add'>+					struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	switch (mac_stats-&gt;src) {</div><div class='add'>+	case ETHTOOL_MAC_STATS_SRC_EMAC:</div><div class='add'>+		enetc_ppm_mac_stats(priv-&gt;si, mac_stats);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_MAC_STATS_SRC_PMAC:</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_MAC_STATS_SRC_AGGREGATE:</div><div class='add'>+		ethtool_aggregate_mac_stats(ndev, mac_stats);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void enetc_get_eth_ctrl_stats(struct net_device *ndev,</div><div class='ctx'> 				     struct ethtool_eth_ctrl_stats *ctrl_stats)</div><div class='ctx'> {</div><div class='hunk'>@@ -467,7 +525,8 @@ static void enetc_get_rmon_stats(struct net_device *ndev,</div><div class='ctx'> #define ENETC_RSSHASH_L3 (RXH_L2DA | RXH_VLAN | RXH_L3_PROTO | RXH_IP_SRC | \</div><div class='ctx'> 			  RXH_IP_DST)</div><div class='ctx'> #define ENETC_RSSHASH_L4 (ENETC_RSSHASH_L3 | RXH_L4_B_0_1 | RXH_L4_B_2_3)</div><div class='del'>-static int enetc_get_rsshash(struct ethtool_rxnfc *rxnfc)</div><div class='add'>+static int enetc_get_rxfh_fields(struct net_device *netdev,</div><div class='add'>+				 struct ethtool_rxfh_fields *rxnfc)</div><div class='ctx'> {</div><div class='ctx'> 	static const u32 rsshash[] = {</div><div class='ctx'> 			[TCP_V4_FLOW]    = ENETC_RSSHASH_L4,</div><div class='hunk'>@@ -574,6 +633,13 @@ done:</div><div class='ctx'> 	return enetc_set_fs_entry(si, &amp;rfse, fs-&gt;location);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 enetc_get_rx_ring_count(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	return priv-&gt;num_rx_rings;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int enetc_get_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc,</div><div class='ctx'> 			   u32 *rule_locs)</div><div class='ctx'> {</div><div class='hunk'>@@ -581,12 +647,6 @@ static int enetc_get_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc,</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='ctx'> 	switch (rxnfc-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		rxnfc-&gt;data = priv-&gt;num_rx_rings;</div><div class='del'>-		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		/* get RSS hash config */</div><div class='del'>-		return enetc_get_rsshash(rxnfc);</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		/* total number of entries */</div><div class='ctx'> 		rxnfc-&gt;data = priv-&gt;si-&gt;num_fs_entries;</div><div class='hunk'>@@ -677,36 +737,53 @@ static u32 enetc_get_rxfh_indir_size(struct net_device *ndev)</div><div class='ctx'> 	return priv-&gt;si-&gt;num_rss;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int enetc_get_rss_key_base(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	if (is_enetc_rev1(si))</div><div class='add'>+		return ENETC_PRSSK(0);</div><div class='add'>+</div><div class='add'>+	return ENETC4_PRSSKR(0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_get_rss_key(struct enetc_si *si, const u8 *key)</div><div class='add'>+{</div><div class='add'>+	int base = enetc_get_rss_key_base(si);</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ENETC_RSSHASH_KEY_SIZE / 4; i++)</div><div class='add'>+		((u32 *)key)[i] = enetc_port_rd(hw, base + i * 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int enetc_get_rxfh(struct net_device *ndev,</div><div class='ctx'> 			  struct ethtool_rxfh_param *rxfh)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct enetc_hw *hw = &amp;priv-&gt;si-&gt;hw;</div><div class='del'>-	int err = 0, i;</div><div class='add'>+	struct enetc_si *si = priv-&gt;si;</div><div class='add'>+	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* return hash function */</div><div class='ctx'> 	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='ctx'> </div><div class='ctx'> 	/* return hash key */</div><div class='del'>-	if (rxfh-&gt;key &amp;&amp; hw-&gt;port)</div><div class='del'>-		for (i = 0; i &lt; ENETC_RSSHASH_KEY_SIZE / 4; i++)</div><div class='del'>-			((u32 *)rxfh-&gt;key)[i] = enetc_port_rd(hw,</div><div class='del'>-							      ENETC_PRSSK(i));</div><div class='add'>+	if (rxfh-&gt;key &amp;&amp; enetc_si_is_pf(si))</div><div class='add'>+		enetc_get_rss_key(si, rxfh-&gt;key);</div><div class='ctx'> </div><div class='ctx'> 	/* return RSS table */</div><div class='ctx'> 	if (rxfh-&gt;indir)</div><div class='del'>-		err = enetc_get_rss_table(priv-&gt;si, rxfh-&gt;indir,</div><div class='del'>-					  priv-&gt;si-&gt;num_rss);</div><div class='add'>+		err = si-&gt;ops-&gt;get_rss_table(si, rxfh-&gt;indir, si-&gt;num_rss);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes)</div><div class='add'>+void enetc_set_rss_key(struct enetc_si *si, const u8 *bytes)</div><div class='ctx'> {</div><div class='add'>+	int base = enetc_get_rss_key_base(si);</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ENETC_RSSHASH_KEY_SIZE / 4; i++)</div><div class='del'>-		enetc_port_wr(hw, ENETC_PRSSK(i), ((u32 *)bytes)[i]);</div><div class='add'>+		enetc_port_wr(hw, base + i * 4, ((u32 *)bytes)[i]);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_set_rss_key);</div><div class='ctx'> </div><div class='hunk'>@@ -715,17 +792,16 @@ static int enetc_set_rxfh(struct net_device *ndev,</div><div class='ctx'> 			  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct enetc_hw *hw = &amp;priv-&gt;si-&gt;hw;</div><div class='add'>+	struct enetc_si *si = priv-&gt;si;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* set hash key, if PF */</div><div class='del'>-	if (rxfh-&gt;key &amp;&amp; hw-&gt;port)</div><div class='del'>-		enetc_set_rss_key(hw, rxfh-&gt;key);</div><div class='add'>+	if (rxfh-&gt;key &amp;&amp; enetc_si_is_pf(si))</div><div class='add'>+		enetc_set_rss_key(si, rxfh-&gt;key);</div><div class='ctx'> </div><div class='ctx'> 	/* set RSS table */</div><div class='ctx'> 	if (rxfh-&gt;indir)</div><div class='del'>-		err = enetc_set_rss_table(priv-&gt;si, rxfh-&gt;indir,</div><div class='del'>-					  priv-&gt;si-&gt;num_rss);</div><div class='add'>+		err = si-&gt;ops-&gt;set_rss_table(si, rxfh-&gt;indir, si-&gt;num_rss);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -762,9 +838,10 @@ static int enetc_get_coalesce(struct net_device *ndev,</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct enetc_int_vector *v = priv-&gt;int_vector[0];</div><div class='add'>+	u64 clk_freq = priv-&gt;sysclk_freq;</div><div class='ctx'> </div><div class='del'>-	ic-&gt;tx_coalesce_usecs = enetc_cycles_to_usecs(priv-&gt;tx_ictt);</div><div class='del'>-	ic-&gt;rx_coalesce_usecs = enetc_cycles_to_usecs(v-&gt;rx_ictt);</div><div class='add'>+	ic-&gt;tx_coalesce_usecs = enetc_cycles_to_usecs(priv-&gt;tx_ictt, clk_freq);</div><div class='add'>+	ic-&gt;rx_coalesce_usecs = enetc_cycles_to_usecs(v-&gt;rx_ictt, clk_freq);</div><div class='ctx'> </div><div class='ctx'> 	ic-&gt;tx_max_coalesced_frames = ENETC_TXIC_PKTTHR;</div><div class='ctx'> 	ic-&gt;rx_max_coalesced_frames = ENETC_RXIC_PKTTHR;</div><div class='hunk'>@@ -780,12 +857,13 @@ static int enetc_set_coalesce(struct net_device *ndev,</div><div class='ctx'> 			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u64 clk_freq = priv-&gt;sysclk_freq;</div><div class='ctx'> 	u32 rx_ictt, tx_ictt;</div><div class='ctx'> 	int i, ic_mode;</div><div class='ctx'> 	bool changed;</div><div class='ctx'> </div><div class='del'>-	tx_ictt = enetc_usecs_to_cycles(ic-&gt;tx_coalesce_usecs);</div><div class='del'>-	rx_ictt = enetc_usecs_to_cycles(ic-&gt;rx_coalesce_usecs);</div><div class='add'>+	tx_ictt = enetc_usecs_to_cycles(ic-&gt;tx_coalesce_usecs, clk_freq);</div><div class='add'>+	rx_ictt = enetc_usecs_to_cycles(ic-&gt;rx_coalesce_usecs, clk_freq);</div><div class='ctx'> </div><div class='ctx'> 	if (ic-&gt;rx_max_coalesced_frames != ENETC_RXIC_PKTTHR)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -827,22 +905,61 @@ static int enetc_set_coalesce(struct net_device *ndev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int enetc_get_ts_info(struct net_device *ndev,</div><div class='del'>-			     struct kernel_ethtool_ts_info *info)</div><div class='add'>+static int enetc_get_phc_index_by_pdev(struct enetc_si *si)</div><div class='ctx'> {</div><div class='del'>-	int *phc_idx;</div><div class='del'>-</div><div class='del'>-	phc_idx = symbol_get(enetc_phc_index);</div><div class='del'>-	if (phc_idx) {</div><div class='del'>-		info-&gt;phc_index = *phc_idx;</div><div class='del'>-		symbol_put(enetc_phc_index);</div><div class='add'>+	struct pci_bus *bus = si-&gt;pdev-&gt;bus;</div><div class='add'>+	struct pci_dev *timer_pdev;</div><div class='add'>+	unsigned int devfn;</div><div class='add'>+	int phc_index;</div><div class='add'>+</div><div class='add'>+	switch (si-&gt;revision) {</div><div class='add'>+	case ENETC_REV_1_0:</div><div class='add'>+		devfn = PCI_DEVFN(0, 4);</div><div class='add'>+		break;</div><div class='add'>+	case ENETC_REV_4_1:</div><div class='add'>+		devfn = PCI_DEVFN(24, 0);</div><div class='add'>+		break;</div><div class='add'>+	case ENETC_REV_4_3:</div><div class='add'>+		devfn = PCI_DEVFN(0, 1);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK)) {</div><div class='del'>-		info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE;</div><div class='add'>+	timer_pdev = pci_get_domain_bus_and_slot(pci_domain_nr(bus),</div><div class='add'>+						 bus-&gt;number, devfn);</div><div class='add'>+	if (!timer_pdev)</div><div class='add'>+		return -1;</div><div class='ctx'> </div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	phc_index = ptp_clock_index_by_dev(&amp;timer_pdev-&gt;dev);</div><div class='add'>+	pci_dev_put(timer_pdev);</div><div class='add'>+</div><div class='add'>+	return phc_index;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc_get_phc_index(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = si-&gt;pdev-&gt;dev.of_node;</div><div class='add'>+	struct device_node *timer_np;</div><div class='add'>+	int phc_index;</div><div class='add'>+</div><div class='add'>+	if (!np)</div><div class='add'>+		return enetc_get_phc_index_by_pdev(si);</div><div class='add'>+</div><div class='add'>+	timer_np = of_parse_phandle(np, "ptp-timer", 0);</div><div class='add'>+	if (!timer_np)</div><div class='add'>+		return enetc_get_phc_index_by_pdev(si);</div><div class='add'>+</div><div class='add'>+	phc_index = ptp_clock_index_by_of_node(timer_np);</div><div class='add'>+	of_node_put(timer_np);</div><div class='add'>+</div><div class='add'>+	return phc_index;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_get_ts_generic_info(struct net_device *ndev,</div><div class='add'>+				      struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='ctx'> 				SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='hunk'>@@ -850,11 +967,34 @@ static int enetc_get_ts_info(struct net_device *ndev,</div><div class='ctx'> 				SOF_TIMESTAMPING_TX_SOFTWARE;</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;tx_types = (1 &lt;&lt; HWTSTAMP_TX_OFF) |</div><div class='del'>-			 (1 &lt;&lt; HWTSTAMP_TX_ON) |</div><div class='del'>-			 (1 &lt;&lt; HWTSTAMP_TX_ONESTEP_SYNC);</div><div class='add'>+			 (1 &lt;&lt; HWTSTAMP_TX_ON);</div><div class='add'>+</div><div class='add'>+	if (enetc_si_is_pf(priv-&gt;si))</div><div class='add'>+		info-&gt;tx_types |= (1 &lt;&lt; HWTSTAMP_TX_ONESTEP_SYNC);</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;rx_filters = (1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='ctx'> 			   (1 &lt;&lt; HWTSTAMP_FILTER_ALL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc_get_ts_info(struct net_device *ndev,</div><div class='add'>+			     struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct enetc_si *si = priv-&gt;si;</div><div class='add'>+</div><div class='add'>+	if (!enetc_ptp_clock_is_enabled(si))</div><div class='add'>+		goto timestamp_tx_sw;</div><div class='add'>+</div><div class='add'>+	info-&gt;phc_index = enetc_get_phc_index(si);</div><div class='add'>+	if (info-&gt;phc_index &lt; 0)</div><div class='add'>+		goto timestamp_tx_sw;</div><div class='add'>+</div><div class='add'>+	enetc_get_ts_generic_info(ndev, info);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+timestamp_tx_sw:</div><div class='add'>+	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1165,7 +1305,7 @@ void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_mm_link_state_update);</div><div class='ctx'> </div><div class='del'>-static const struct ethtool_ops enetc_pf_ethtool_ops = {</div><div class='add'>+const struct ethtool_ops enetc_pf_ethtool_ops = {</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_MAX_FRAMES |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX,</div><div class='hunk'>@@ -1178,12 +1318,14 @@ static const struct ethtool_ops enetc_pf_ethtool_ops = {</div><div class='ctx'> 	.get_rmon_stats = enetc_get_rmon_stats,</div><div class='ctx'> 	.get_eth_ctrl_stats = enetc_get_eth_ctrl_stats,</div><div class='ctx'> 	.get_eth_mac_stats = enetc_get_eth_mac_stats,</div><div class='add'>+	.get_rx_ring_count = enetc_get_rx_ring_count,</div><div class='ctx'> 	.get_rxnfc = enetc_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc = enetc_set_rxnfc,</div><div class='ctx'> 	.get_rxfh_key_size = enetc_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh_indir_size = enetc_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh = enetc_get_rxfh,</div><div class='ctx'> 	.set_rxfh = enetc_set_rxfh,</div><div class='add'>+	.get_rxfh_fields = enetc_get_rxfh_fields,</div><div class='ctx'> 	.get_ringparam = enetc_get_ringparam,</div><div class='ctx'> 	.get_coalesce = enetc_get_coalesce,</div><div class='ctx'> 	.set_coalesce = enetc_set_coalesce,</div><div class='hunk'>@@ -1200,7 +1342,26 @@ static const struct ethtool_ops enetc_pf_ethtool_ops = {</div><div class='ctx'> 	.get_mm_stats = enetc_get_mm_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct ethtool_ops enetc_vf_ethtool_ops = {</div><div class='add'>+const struct ethtool_ops enetc4_ppm_ethtool_ops = {</div><div class='add'>+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='add'>+				     ETHTOOL_COALESCE_MAX_FRAMES |</div><div class='add'>+				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX,</div><div class='add'>+	.get_eth_mac_stats = enetc_ppm_get_eth_mac_stats,</div><div class='add'>+	.get_rx_ring_count = enetc_get_rx_ring_count,</div><div class='add'>+	.get_rxfh_key_size = enetc_get_rxfh_key_size,</div><div class='add'>+	.get_rxfh_indir_size = enetc_get_rxfh_indir_size,</div><div class='add'>+	.get_rxfh = enetc_get_rxfh,</div><div class='add'>+	.set_rxfh = enetc_set_rxfh,</div><div class='add'>+	.get_rxfh_fields = enetc_get_rxfh_fields,</div><div class='add'>+	.get_ringparam = enetc_get_ringparam,</div><div class='add'>+	.get_coalesce = enetc_get_coalesce,</div><div class='add'>+	.set_coalesce = enetc_set_coalesce,</div><div class='add'>+	.get_link_ksettings = enetc_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = enetc_set_link_ksettings,</div><div class='add'>+	.get_link = ethtool_op_get_link,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct ethtool_ops enetc_vf_ethtool_ops = {</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_MAX_FRAMES |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX,</div><div class='hunk'>@@ -1209,15 +1370,40 @@ static const struct ethtool_ops enetc_vf_ethtool_ops = {</div><div class='ctx'> 	.get_sset_count = enetc_get_sset_count,</div><div class='ctx'> 	.get_strings = enetc_get_strings,</div><div class='ctx'> 	.get_ethtool_stats = enetc_get_ethtool_stats,</div><div class='add'>+	.get_rx_ring_count = enetc_get_rx_ring_count,</div><div class='ctx'> 	.get_rxnfc = enetc_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc = enetc_set_rxnfc,</div><div class='ctx'> 	.get_rxfh_indir_size = enetc_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh = enetc_get_rxfh,</div><div class='ctx'> 	.set_rxfh = enetc_set_rxfh,</div><div class='add'>+	.get_rxfh_fields = enetc_get_rxfh_fields,</div><div class='add'>+	.get_ringparam = enetc_get_ringparam,</div><div class='add'>+	.get_coalesce = enetc_get_coalesce,</div><div class='add'>+	.set_coalesce = enetc_set_coalesce,</div><div class='add'>+	.get_link = ethtool_op_get_link,</div><div class='add'>+	.get_ts_info = enetc_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct ethtool_ops enetc4_pf_ethtool_ops = {</div><div class='add'>+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='add'>+				     ETHTOOL_COALESCE_MAX_FRAMES |</div><div class='add'>+				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX,</div><div class='ctx'> 	.get_ringparam = enetc_get_ringparam,</div><div class='ctx'> 	.get_coalesce = enetc_get_coalesce,</div><div class='ctx'> 	.set_coalesce = enetc_set_coalesce,</div><div class='add'>+	.get_link_ksettings = enetc_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = enetc_set_link_ksettings,</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='add'>+	.get_wol = enetc_get_wol,</div><div class='add'>+	.set_wol = enetc_set_wol,</div><div class='add'>+	.get_pauseparam = enetc_get_pauseparam,</div><div class='add'>+	.set_pauseparam = enetc_set_pauseparam,</div><div class='add'>+	.get_rx_ring_count = enetc_get_rx_ring_count,</div><div class='add'>+	.get_rxfh_key_size = enetc_get_rxfh_key_size,</div><div class='add'>+	.get_rxfh_indir_size = enetc_get_rxfh_indir_size,</div><div class='add'>+	.get_rxfh = enetc_get_rxfh,</div><div class='add'>+	.set_rxfh = enetc_set_rxfh,</div><div class='add'>+	.get_rxfh_fields = enetc_get_rxfh_fields,</div><div class='ctx'> 	.get_ts_info = enetc_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1225,9 +1411,6 @@ void enetc_set_ethtool_ops(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='del'>-	if (enetc_si_is_pf(priv-&gt;si))</div><div class='del'>-		ndev-&gt;ethtool_ops = &amp;enetc_pf_ethtool_ops;</div><div class='del'>-	else</div><div class='del'>-		ndev-&gt;ethtool_ops = &amp;enetc_vf_ethtool_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = priv-&gt;si-&gt;drvdata-&gt;eth_ops;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(enetc_set_ethtool_ops);</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_hw.h b/drivers/net/ethernet/freescale/enetc/enetc_hw.h<br/>index 1619943fb263..7b882b8921fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_hw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_hw.h</a></div><div class='hunk'>@@ -6,6 +6,8 @@</div><div class='ctx'> #define ENETC_MM_VERIFY_SLEEP_US	USEC_PER_MSEC</div><div class='ctx'> #define ENETC_MM_VERIFY_RETRIES		3</div><div class='ctx'> </div><div class='add'>+#define ENETC_NUM_TC			8</div><div class='add'>+</div><div class='ctx'> /* ENETC device IDs */</div><div class='ctx'> #define ENETC_DEV_ID_PF		0xe100</div><div class='ctx'> #define ENETC_DEV_ID_VF		0xef00</div><div class='hunk'>@@ -21,10 +23,9 @@</div><div class='ctx'> #define ENETC_SICTR0	0x18</div><div class='ctx'> #define ENETC_SICTR1	0x1c</div><div class='ctx'> #define ENETC_SIPCAPR0	0x20</div><div class='del'>-#define ENETC_SIPCAPR0_PSFP	BIT(9)</div><div class='ctx'> #define ENETC_SIPCAPR0_RSS	BIT(8)</div><div class='del'>-#define ENETC_SIPCAPR0_QBV	BIT(4)</div><div class='del'>-#define ENETC_SIPCAPR0_QBU	BIT(3)</div><div class='add'>+#define ENETC_SIPCAPR0_RFS	BIT(2)</div><div class='add'>+#define ENETC_SIPCAPR0_LSO	BIT(1)</div><div class='ctx'> #define ENETC_SIPCAPR1	0x24</div><div class='ctx'> #define ENETC_SITGTGR	0x30</div><div class='ctx'> #define ENETC_SIRBGCR	0x38</div><div class='hunk'>@@ -42,6 +43,9 @@</div><div class='ctx'> </div><div class='ctx'> #define ENETC_SIPMAR0	0x80</div><div class='ctx'> #define ENETC_SIPMAR1	0x84</div><div class='add'>+#define ENETC_SICVLANR1	0x90</div><div class='add'>+#define ENETC_SICVLANR2	0x94</div><div class='add'>+#define  SICVLANR_ETYPE	GENMASK(15, 0)</div><div class='ctx'> </div><div class='ctx'> /* VF-PF Message passing */</div><div class='ctx'> #define ENETC_DEFAULT_MSG_SIZE	1024	/* and max size */</div><div class='hunk'>@@ -191,6 +195,9 @@ enum enetc_bdr_type {TX, RX};</div><div class='ctx'> #define ENETC_PCAPR0		0x0900</div><div class='ctx'> #define ENETC_PCAPR0_RXBDR(val)	((val) &gt;&gt; 24)</div><div class='ctx'> #define ENETC_PCAPR0_TXBDR(val)	(((val) &gt;&gt; 16) &amp; 0xff)</div><div class='add'>+#define ENETC_PCAPR0_PSFP	BIT(9)</div><div class='add'>+#define ENETC_PCAPR0_QBV	BIT(4)</div><div class='add'>+#define ENETC_PCAPR0_QBU	BIT(3)</div><div class='ctx'> #define ENETC_PCAPR1		0x0904</div><div class='ctx'> #define ENETC_PSICFGR0(n)	(0x0940 + (n) * 0xc)  /* n = SI index */</div><div class='ctx'> #define ENETC_PSICFGR0_SET_TXBDR(val)	((val) &amp; 0xff)</div><div class='hunk'>@@ -368,6 +375,11 @@ enum enetc_bdr_type {TX, RX};</div><div class='ctx'> /** Global regs, offset: 2_0000h */</div><div class='ctx'> #define ENETC_GLOBAL_BASE	0x20000</div><div class='ctx'> #define ENETC_G_EIPBRR0		0x0bf8</div><div class='add'>+#define EIPBRR0_REVISION	GENMASK(15, 0)</div><div class='add'>+#define ENETC_REV_1_0		0x0100</div><div class='add'>+#define ENETC_REV_4_1		0X0401</div><div class='add'>+#define ENETC_REV_4_3		0x0403</div><div class='add'>+</div><div class='ctx'> #define ENETC_G_EIPBRR1		0x0bfc</div><div class='ctx'> #define ENETC_G_EPFBLPR(n)	(0xd00 + 4 * (n))</div><div class='ctx'> #define ENETC_G_EPFBLPR1_XGMII	0x80000000</div><div class='hunk'>@@ -396,18 +408,22 @@ struct enetc_hw {</div><div class='ctx'>  */</div><div class='ctx'> extern rwlock_t enetc_mdio_lock;</div><div class='ctx'> </div><div class='add'>+DECLARE_STATIC_KEY_FALSE(enetc_has_err050089);</div><div class='add'>+</div><div class='ctx'> /* use this locking primitive only on the fast datapath to</div><div class='ctx'>  * group together multiple non-MDIO register accesses to</div><div class='ctx'>  * minimize the overhead of the lock</div><div class='ctx'>  */</div><div class='ctx'> static inline void enetc_lock_mdio(void)</div><div class='ctx'> {</div><div class='del'>-	read_lock(&amp;enetc_mdio_lock);</div><div class='add'>+	if (static_branch_unlikely(&amp;enetc_has_err050089))</div><div class='add'>+		read_lock(&amp;enetc_mdio_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void enetc_unlock_mdio(void)</div><div class='ctx'> {</div><div class='del'>-	read_unlock(&amp;enetc_mdio_lock);</div><div class='add'>+	if (static_branch_unlikely(&amp;enetc_has_err050089))</div><div class='add'>+		read_unlock(&amp;enetc_mdio_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* use these accessors only on the fast datapath under</div><div class='hunk'>@@ -416,14 +432,16 @@ static inline void enetc_unlock_mdio(void)</div><div class='ctx'>  */</div><div class='ctx'> static inline u32 enetc_rd_reg_hot(void __iomem *reg)</div><div class='ctx'> {</div><div class='del'>-	lockdep_assert_held(&amp;enetc_mdio_lock);</div><div class='add'>+	if (static_branch_unlikely(&amp;enetc_has_err050089))</div><div class='add'>+		lockdep_assert_held(&amp;enetc_mdio_lock);</div><div class='ctx'> </div><div class='ctx'> 	return ioread32(reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void enetc_wr_reg_hot(void __iomem *reg, u32 val)</div><div class='ctx'> {</div><div class='del'>-	lockdep_assert_held(&amp;enetc_mdio_lock);</div><div class='add'>+	if (static_branch_unlikely(&amp;enetc_has_err050089))</div><div class='add'>+		lockdep_assert_held(&amp;enetc_mdio_lock);</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(val, reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -452,9 +470,13 @@ static inline u32 _enetc_rd_mdio_reg_wa(void __iomem *reg)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	write_lock_irqsave(&amp;enetc_mdio_lock, flags);</div><div class='del'>-	val = ioread32(reg);</div><div class='del'>-	write_unlock_irqrestore(&amp;enetc_mdio_lock, flags);</div><div class='add'>+	if (static_branch_unlikely(&amp;enetc_has_err050089)) {</div><div class='add'>+		write_lock_irqsave(&amp;enetc_mdio_lock, flags);</div><div class='add'>+		val = ioread32(reg);</div><div class='add'>+		write_unlock_irqrestore(&amp;enetc_mdio_lock, flags);</div><div class='add'>+	} else {</div><div class='add'>+		val = ioread32(reg);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='hunk'>@@ -463,9 +485,13 @@ static inline void _enetc_wr_mdio_reg_wa(void __iomem *reg, u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	write_lock_irqsave(&amp;enetc_mdio_lock, flags);</div><div class='del'>-	iowrite32(val, reg);</div><div class='del'>-	write_unlock_irqrestore(&amp;enetc_mdio_lock, flags);</div><div class='add'>+	if (static_branch_unlikely(&amp;enetc_has_err050089)) {</div><div class='add'>+		write_lock_irqsave(&amp;enetc_mdio_lock, flags);</div><div class='add'>+		iowrite32(val, reg);</div><div class='add'>+		write_unlock_irqrestore(&amp;enetc_mdio_lock, flags);</div><div class='add'>+	} else {</div><div class='add'>+		iowrite32(val, reg);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef ioread64</div><div class='hunk'>@@ -485,7 +511,7 @@ static inline u64 _enetc_rd_reg64(void __iomem *reg)</div><div class='ctx'> 		tmp = ioread32(reg + 4);</div><div class='ctx'> 	} while (high != tmp);</div><div class='ctx'> </div><div class='del'>-	return le64_to_cpu((__le64)high &lt;&lt; 32 | low);</div><div class='add'>+	return (u64)high &lt;&lt; 32 | low;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -511,6 +537,7 @@ static inline u64 _enetc_rd_reg64_wa(void __iomem *reg)</div><div class='ctx'> /* port register accessors - PF only */</div><div class='ctx'> #define enetc_port_rd(hw, off)		enetc_rd_reg((hw)-&gt;port + (off))</div><div class='ctx'> #define enetc_port_wr(hw, off, val)	enetc_wr_reg((hw)-&gt;port + (off), val)</div><div class='add'>+#define enetc_port_rd64(hw, off)	_enetc_rd_reg64_wa((hw)-&gt;port + (off))</div><div class='ctx'> #define enetc_port_rd_mdio(hw, off)	_enetc_rd_mdio_reg_wa((hw)-&gt;port + (off))</div><div class='ctx'> #define enetc_port_wr_mdio(hw, off, val)	_enetc_wr_mdio_reg_wa(\</div><div class='ctx'> 							(hw)-&gt;port + (off), val)</div><div class='hunk'>@@ -533,11 +560,23 @@ static inline u64 _enetc_rd_reg64_wa(void __iomem *reg)</div><div class='ctx'> union enetc_tx_bd {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		__le64 addr;</div><div class='del'>-		__le16 buf_len;</div><div class='add'>+		union {</div><div class='add'>+			__le16 buf_len;</div><div class='add'>+			__le16 hdr_len;	/* For LSO, ENETC 4.1 and later */</div><div class='add'>+		};</div><div class='ctx'> 		__le16 frm_len;</div><div class='ctx'> 		union {</div><div class='ctx'> 			struct {</div><div class='del'>-				u8 reserved[3];</div><div class='add'>+				u8 l3_aux0;</div><div class='add'>+#define ENETC_TX_BD_L3_START	GENMASK(6, 0)</div><div class='add'>+#define ENETC_TX_BD_IPCS	BIT(7)</div><div class='add'>+				u8 l3_aux1;</div><div class='add'>+#define ENETC_TX_BD_L3_HDR_LEN	GENMASK(6, 0)</div><div class='add'>+#define ENETC_TX_BD_L3T		BIT(7)</div><div class='add'>+				u8 l4_aux;</div><div class='add'>+#define ENETC_TX_BD_L4T		GENMASK(7, 5)</div><div class='add'>+#define ENETC_TXBD_L4T_UDP	1</div><div class='add'>+#define ENETC_TXBD_L4T_TCP	2</div><div class='ctx'> 				u8 flags;</div><div class='ctx'> 			}; /* default layout */</div><div class='ctx'> 			__le32 txstart;</div><div class='hunk'>@@ -548,23 +587,27 @@ union enetc_tx_bd {</div><div class='ctx'> 		__le32 tstamp;</div><div class='ctx'> 		__le16 tpid;</div><div class='ctx'> 		__le16 vid;</div><div class='del'>-		u8 reserved[6];</div><div class='add'>+		__le16 lso_sg_size; /* For ENETC 4.1 and later */</div><div class='add'>+		__le16 frm_len_ext; /* For ENETC 4.1 and later */</div><div class='add'>+		u8 reserved[2];</div><div class='ctx'> 		u8 e_flags;</div><div class='ctx'> 		u8 flags;</div><div class='ctx'> 	} ext; /* Tx BD extension */</div><div class='ctx'> 	struct {</div><div class='ctx'> 		__le32 tstamp;</div><div class='del'>-		u8 reserved[10];</div><div class='add'>+		u8 reserved[8];</div><div class='add'>+		__le16 lso_err_count; /* For ENETC 4.1 and later */</div><div class='ctx'> 		u8 status;</div><div class='ctx'> 		u8 flags;</div><div class='ctx'> 	} wb; /* writeback descriptor */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum enetc_txbd_flags {</div><div class='del'>-	ENETC_TXBD_FLAGS_RES0 = BIT(0), /* reserved */</div><div class='add'>+	ENETC_TXBD_FLAGS_L4CS = BIT(0), /* For ENETC 4.1 and later */</div><div class='ctx'> 	ENETC_TXBD_FLAGS_TSE = BIT(1),</div><div class='add'>+	ENETC_TXBD_FLAGS_LSO = BIT(1), /* For ENETC 4.1 and later */</div><div class='ctx'> 	ENETC_TXBD_FLAGS_W = BIT(2),</div><div class='del'>-	ENETC_TXBD_FLAGS_RES3 = BIT(3), /* reserved */</div><div class='add'>+	ENETC_TXBD_FLAGS_CSUM_LSO = BIT(3), /* For ENETC 4.1 and later */</div><div class='ctx'> 	ENETC_TXBD_FLAGS_TXSTART = BIT(4),</div><div class='ctx'> 	ENETC_TXBD_FLAGS_EX = BIT(6),</div><div class='ctx'> 	ENETC_TXBD_FLAGS_F = BIT(7)</div><div class='hunk'>@@ -572,6 +615,7 @@ enum enetc_txbd_flags {</div><div class='ctx'> #define ENETC_TXBD_STATS_WIN	BIT(7)</div><div class='ctx'> #define ENETC_TXBD_TXSTART_MASK GENMASK(24, 0)</div><div class='ctx'> #define ENETC_TXBD_FLAGS_OFFSET 24</div><div class='add'>+#define ENETC_TXBD_TSTAMP	GENMASK(29, 0)</div><div class='ctx'> </div><div class='ctx'> static inline __le32 enetc_txbd_set_tx_start(u64 tx_start, u8 flags)</div><div class='ctx'> {</div><div class='hunk'>@@ -633,6 +677,8 @@ union enetc_rx_bd {</div><div class='ctx'> #define ENETC_CBD_FLAGS_SF	BIT(7) /* short format */</div><div class='ctx'> #define ENETC_CBD_STATUS_MASK	0xf</div><div class='ctx'> </div><div class='add'>+#define ENETC_TPID_8021Q	0</div><div class='add'>+</div><div class='ctx'> struct enetc_cmd_rfse {</div><div class='ctx'> 	u8 smac_h[6];</div><div class='ctx'> 	u8 smac_m[6];</div><div class='hunk'>@@ -957,15 +1003,17 @@ struct enetc_cbd {</div><div class='ctx'> 	u8 status_flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define ENETC_CLK  400000000ULL</div><div class='del'>-static inline u32 enetc_cycles_to_usecs(u32 cycles)</div><div class='add'>+#define ENETC_CLK_400M		400000000ULL</div><div class='add'>+#define ENETC_CLK_333M		333000000ULL</div><div class='add'>+</div><div class='add'>+static inline u32 enetc_cycles_to_usecs(u32 cycles, u64 clk_freq)</div><div class='ctx'> {</div><div class='del'>-	return (u32)div_u64(cycles * 1000000ULL, ENETC_CLK);</div><div class='add'>+	return (u32)div_u64(cycles * 1000000ULL, clk_freq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 enetc_usecs_to_cycles(u32 usecs)</div><div class='add'>+static inline u32 enetc_usecs_to_cycles(u32 usecs, u64 clk_freq)</div><div class='ctx'> {</div><div class='del'>-	return (u32)div_u64(usecs * ENETC_CLK, 1000000ULL);</div><div class='add'>+	return (u32)div_u64(usecs * clk_freq, 1000000ULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Port traffic class frame preemption register */</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c b/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c<br/>index a1b595bd7993..e108cac8288d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c</a></div><div class='hunk'>@@ -4,11 +4,35 @@</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='ctx'> #include "enetc_pf.h"</div><div class='ctx'> </div><div class='add'>+#define NETC_EMDIO_VEN_ID	0x1131</div><div class='add'>+#define NETC_EMDIO_DEV_ID	0xee00</div><div class='ctx'> #define ENETC_MDIO_DEV_ID	0xee01</div><div class='ctx'> #define ENETC_MDIO_DEV_NAME	"FSL PCIe IE Central MDIO"</div><div class='ctx'> #define ENETC_MDIO_BUS_NAME	ENETC_MDIO_DEV_NAME " Bus"</div><div class='ctx'> #define ENETC_MDIO_DRV_NAME	ENETC_MDIO_DEV_NAME " driver"</div><div class='ctx'> </div><div class='add'>+DEFINE_STATIC_KEY_FALSE(enetc_has_err050089);</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_has_err050089);</div><div class='add'>+</div><div class='add'>+static void enetc_emdio_enable_err050089(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	if (pdev-&gt;vendor == PCI_VENDOR_ID_FREESCALE &amp;&amp;</div><div class='add'>+	    pdev-&gt;device == ENETC_MDIO_DEV_ID) {</div><div class='add'>+		static_branch_inc(&amp;enetc_has_err050089);</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Enabled ERR050089 workaround\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_emdio_disable_err050089(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	if (pdev-&gt;vendor == PCI_VENDOR_ID_FREESCALE &amp;&amp;</div><div class='add'>+	    pdev-&gt;device == ENETC_MDIO_DEV_ID) {</div><div class='add'>+		static_branch_dec(&amp;enetc_has_err050089);</div><div class='add'>+		if (!static_key_enabled(&amp;enetc_has_err050089.key))</div><div class='add'>+			dev_info(&amp;pdev-&gt;dev, "Disabled ERR050089 workaround\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int enetc_pci_mdio_probe(struct pci_dev *pdev,</div><div class='ctx'> 				const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='hunk'>@@ -62,6 +86,8 @@ static int enetc_pci_mdio_probe(struct pci_dev *pdev,</div><div class='ctx'> 		goto err_pci_mem_reg;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	enetc_emdio_enable_err050089(pdev);</div><div class='add'>+</div><div class='ctx'> 	err = of_mdiobus_register(bus, dev-&gt;of_node);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_mdiobus_reg;</div><div class='hunk'>@@ -71,6 +97,7 @@ static int enetc_pci_mdio_probe(struct pci_dev *pdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_mdiobus_reg:</div><div class='add'>+	enetc_emdio_disable_err050089(pdev);</div><div class='ctx'> 	pci_release_region(pdev, 0);</div><div class='ctx'> err_pci_mem_reg:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='hunk'>@@ -88,6 +115,9 @@ static void enetc_pci_mdio_remove(struct pci_dev *pdev)</div><div class='ctx'> 	struct enetc_mdio_priv *mdio_priv;</div><div class='ctx'> </div><div class='ctx'> 	mdiobus_unregister(bus);</div><div class='add'>+</div><div class='add'>+	enetc_emdio_disable_err050089(pdev);</div><div class='add'>+</div><div class='ctx'> 	mdio_priv = bus-&gt;priv;</div><div class='ctx'> 	iounmap(mdio_priv-&gt;hw-&gt;port);</div><div class='ctx'> 	pci_release_region(pdev, 0);</div><div class='hunk'>@@ -96,6 +126,7 @@ static void enetc_pci_mdio_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> static const struct pci_device_id enetc_pci_mdio_id_table[] = {</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_MDIO_DEV_ID) },</div><div class='add'>+	{ PCI_DEVICE(NETC_EMDIO_VEN_ID, NETC_EMDIO_DEV_ID) },</div><div class='ctx'> 	{ 0, } /* End of table. */</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, enetc_pci_mdio_id_table);</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pf.c b/drivers/net/ethernet/freescale/enetc/enetc_pf.c<br/>index 8f6b0bf48139..de0fb272c847 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_pf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_pf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_pf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_pf.c</a></div><div class='hunk'>@@ -2,15 +2,13 @@</div><div class='ctx'> /* Copyright 2017-2019 NXP */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='del'>-#include &lt;linux/mdio.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/fsl/enetc_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='del'>-#include &lt;linux/of_mdio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='ctx'> #include &lt;linux/pcs-lynx.h&gt;</div><div class='ctx'> #include "enetc_ierb.h"</div><div class='del'>-#include "enetc_pf.h"</div><div class='add'>+#include "enetc_pf_common.h"</div><div class='ctx'> </div><div class='ctx'> #define ENETC_DRV_NAME_STR "ENETC PF driver"</div><div class='ctx'> </div><div class='hunk'>@@ -33,18 +31,15 @@ static void enetc_pf_set_primary_mac_addr(struct enetc_hw *hw, int si,</div><div class='ctx'> 	__raw_writew(lower, hw-&gt;port + ENETC_PSIPMAR1(si));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr)</div><div class='add'>+static struct phylink_pcs *enetc_pf_create_pcs(struct enetc_pf *pf,</div><div class='add'>+					       struct mii_bus *bus)</div><div class='ctx'> {</div><div class='del'>-	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct sockaddr *saddr = addr;</div><div class='del'>-</div><div class='del'>-	if (!is_valid_ether_addr(saddr-&gt;sa_data))</div><div class='del'>-		return -EADDRNOTAVAIL;</div><div class='del'>-</div><div class='del'>-	eth_hw_addr_set(ndev, saddr-&gt;sa_data);</div><div class='del'>-	enetc_pf_set_primary_mac_addr(&amp;priv-&gt;si-&gt;hw, 0, saddr-&gt;sa_data);</div><div class='add'>+	return lynx_pcs_create_mdiodev(bus, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+static void enetc_pf_destroy_pcs(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	lynx_pcs_destroy(pcs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void enetc_set_vlan_promisc(struct enetc_hw *hw, char si_map)</div><div class='hunk'>@@ -77,30 +72,6 @@ static void enetc_set_isol_vlan(struct enetc_hw *hw, int si, u16 vlan, u8 qos)</div><div class='ctx'> 	enetc_port_wr(hw, ENETC_PSIVLANR(si), val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int enetc_mac_addr_hash_idx(const u8 *addr)</div><div class='del'>-{</div><div class='del'>-	u64 fold = __swab64(ether_addr_to_u64(addr)) &gt;&gt; 16;</div><div class='del'>-	u64 mask = 0;</div><div class='del'>-	int res = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		mask |= BIT_ULL(i * 6);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		res |= (hweight64(fold &amp; (mask &lt;&lt; i)) &amp; 0x1) &lt;&lt; i;</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter)</div><div class='del'>-{</div><div class='del'>-	filter-&gt;mac_addr_cnt = 0;</div><div class='del'>-</div><div class='del'>-	bitmap_zero(filter-&gt;mac_hash_table,</div><div class='del'>-		    ENETC_MADDR_HASH_TBL_SZ);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void enetc_add_mac_addr_em_filter(struct enetc_mac_filter *filter,</div><div class='ctx'> 					 const unsigned char *addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -109,16 +80,6 @@ static void enetc_add_mac_addr_em_filter(struct enetc_mac_filter *filter,</div><div class='ctx'> 	filter-&gt;mac_addr_cnt++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter,</div><div class='del'>-					 const unsigned char *addr)</div><div class='del'>-{</div><div class='del'>-	int idx = enetc_mac_addr_hash_idx(addr);</div><div class='del'>-</div><div class='del'>-	/* add hash table entry */</div><div class='del'>-	__set_bit(idx, filter-&gt;mac_hash_table);</div><div class='del'>-	filter-&gt;mac_addr_cnt++;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void enetc_clear_mac_ht_flt(struct enetc_si *si, int si_idx, int type)</div><div class='ctx'> {</div><div class='ctx'> 	bool err = si-&gt;errata &amp; ENETC_ERR_UCMCSWP;</div><div class='hunk'>@@ -255,67 +216,6 @@ static void enetc_pf_set_rx_mode(struct net_device *ndev)</div><div class='ctx'> 	enetc_port_wr(hw, ENETC_PSIPMR, psipmr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void enetc_set_vlan_ht_filter(struct enetc_hw *hw, int si_idx,</div><div class='del'>-				     unsigned long hash)</div><div class='del'>-{</div><div class='del'>-	enetc_port_wr(hw, ENETC_PSIVHFR0(si_idx), lower_32_bits(hash));</div><div class='del'>-	enetc_port_wr(hw, ENETC_PSIVHFR1(si_idx), upper_32_bits(hash));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enetc_vid_hash_idx(unsigned int vid)</div><div class='del'>-{</div><div class='del'>-	int res = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		res |= (hweight8(vid &amp; (BIT(i) | BIT(i + 6))) &amp; 0x1) &lt;&lt; i;</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enetc_sync_vlan_ht_filter(struct enetc_pf *pf, bool rehash)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (rehash) {</div><div class='del'>-		bitmap_zero(pf-&gt;vlan_ht_filter, ENETC_VLAN_HT_SIZE);</div><div class='del'>-</div><div class='del'>-		for_each_set_bit(i, pf-&gt;active_vlans, VLAN_N_VID) {</div><div class='del'>-			int hidx = enetc_vid_hash_idx(i);</div><div class='del'>-</div><div class='del'>-			__set_bit(hidx, pf-&gt;vlan_ht_filter);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	enetc_set_vlan_ht_filter(&amp;pf-&gt;si-&gt;hw, 0, *pf-&gt;vlan_ht_filter);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enetc_vlan_rx_add_vid(struct net_device *ndev, __be16 prot, u16 vid)</div><div class='del'>-{</div><div class='del'>-	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct enetc_pf *pf = enetc_si_priv(priv-&gt;si);</div><div class='del'>-	int idx;</div><div class='del'>-</div><div class='del'>-	__set_bit(vid, pf-&gt;active_vlans);</div><div class='del'>-</div><div class='del'>-	idx = enetc_vid_hash_idx(vid);</div><div class='del'>-	if (!__test_and_set_bit(idx, pf-&gt;vlan_ht_filter))</div><div class='del'>-		enetc_sync_vlan_ht_filter(pf, false);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enetc_vlan_rx_del_vid(struct net_device *ndev, __be16 prot, u16 vid)</div><div class='del'>-{</div><div class='del'>-	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct enetc_pf *pf = enetc_si_priv(priv-&gt;si);</div><div class='del'>-</div><div class='del'>-	__clear_bit(vid, pf-&gt;active_vlans);</div><div class='del'>-	enetc_sync_vlan_ht_filter(pf, true);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void enetc_set_loopback(struct net_device *ndev, bool en)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='hunk'>@@ -393,56 +293,6 @@ static int enetc_pf_set_vf_spoofchk(struct net_device *ndev, int vf, bool en)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int enetc_setup_mac_address(struct device_node *np, struct enetc_pf *pf,</div><div class='del'>-				   int si)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;pf-&gt;si-&gt;pdev-&gt;dev;</div><div class='del'>-	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='del'>-	u8 mac_addr[ETH_ALEN] = { 0 };</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* (1) try to get the MAC address from the device tree */</div><div class='del'>-	if (np) {</div><div class='del'>-		err = of_get_mac_address(np, mac_addr);</div><div class='del'>-		if (err == -EPROBE_DEFER)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* (2) bootloader supplied MAC address */</div><div class='del'>-	if (is_zero_ether_addr(mac_addr))</div><div class='del'>-		enetc_pf_get_primary_mac_addr(hw, si, mac_addr);</div><div class='del'>-</div><div class='del'>-	/* (3) choose a random one */</div><div class='del'>-	if (is_zero_ether_addr(mac_addr)) {</div><div class='del'>-		eth_random_addr(mac_addr);</div><div class='del'>-		dev_info(dev, "no MAC address specified for SI%d, using %pM\n",</div><div class='del'>-			 si, mac_addr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	enetc_pf_set_primary_mac_addr(hw, si, mac_addr);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enetc_setup_mac_addresses(struct device_node *np,</div><div class='del'>-				     struct enetc_pf *pf)</div><div class='del'>-{</div><div class='del'>-	int err, i;</div><div class='del'>-</div><div class='del'>-	/* The PF might take its MAC from the device tree */</div><div class='del'>-	err = enetc_setup_mac_address(np, pf, 0);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; pf-&gt;total_vfs; i++) {</div><div class='del'>-		err = enetc_setup_mac_address(NULL, pf, i + 1);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void enetc_port_assign_rfs_entries(struct enetc_si *si)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_pf *pf = enetc_si_priv(si);</div><div class='hunk'>@@ -464,6 +314,23 @@ static void enetc_port_assign_rfs_entries(struct enetc_si *si)</div><div class='ctx'> 	enetc_port_wr(hw, ENETC_PRFSMR, ENETC_PRFSMR_RFSE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void enetc_port_get_caps(struct enetc_si *si)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = enetc_port_rd(hw, ENETC_PCAPR0);</div><div class='add'>+</div><div class='add'>+	if (val &amp; ENETC_PCAPR0_QBV)</div><div class='add'>+		si-&gt;hw_features |= ENETC_SI_F_QBV;</div><div class='add'>+</div><div class='add'>+	if (val &amp; ENETC_PCAPR0_QBU)</div><div class='add'>+		si-&gt;hw_features |= ENETC_SI_F_QBU;</div><div class='add'>+</div><div class='add'>+	if (val &amp; ENETC_PCAPR0_PSFP)</div><div class='add'>+		si-&gt;hw_features |= ENETC_SI_F_PSFP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void enetc_port_si_configure(struct enetc_si *si)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_pf *pf = enetc_si_priv(si);</div><div class='hunk'>@@ -471,6 +338,8 @@ static void enetc_port_si_configure(struct enetc_si *si)</div><div class='ctx'> 	int num_rings, i;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='add'>+	enetc_port_get_caps(si);</div><div class='add'>+</div><div class='ctx'> 	val = enetc_port_rd(hw, ENETC_PCAPR0);</div><div class='ctx'> 	num_rings = min(ENETC_PCAPR0_RXBDR(val), ENETC_PCAPR0_TXBDR(val));</div><div class='ctx'> </div><div class='hunk'>@@ -585,7 +454,6 @@ static void enetc_mac_enable(struct enetc_si *si, bool en)</div><div class='ctx'> </div><div class='ctx'> static void enetc_configure_port(struct enetc_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	u8 hash_key[ENETC_RSSHASH_KEY_SIZE];</div><div class='ctx'> 	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	enetc_configure_port_mac(pf-&gt;si);</div><div class='hunk'>@@ -593,8 +461,7 @@ static void enetc_configure_port(struct enetc_pf *pf)</div><div class='ctx'> 	enetc_port_si_configure(pf-&gt;si);</div><div class='ctx'> </div><div class='ctx'> 	/* set up hash key */</div><div class='del'>-	get_random_bytes(hash_key, ENETC_RSSHASH_KEY_SIZE);</div><div class='del'>-	enetc_set_rss_key(hw, hash_key);</div><div class='add'>+	enetc_set_default_rss_key(pf);</div><div class='ctx'> </div><div class='ctx'> 	/* split up RFS entries */</div><div class='ctx'> 	enetc_port_assign_rfs_entries(pf-&gt;si);</div><div class='hunk'>@@ -665,19 +532,11 @@ static int enetc_sriov_configure(struct pci_dev *pdev, int num_vfs)</div><div class='ctx'> </div><div class='ctx'> 	if (!num_vfs) {</div><div class='ctx'> 		enetc_msg_psi_free(pf);</div><div class='del'>-		kfree(pf-&gt;vf_state);</div><div class='ctx'> 		pf-&gt;num_vfs = 0;</div><div class='ctx'> 		pci_disable_sriov(pdev);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pf-&gt;num_vfs = num_vfs;</div><div class='ctx'> </div><div class='del'>-		pf-&gt;vf_state = kcalloc(num_vfs, sizeof(struct enetc_vf_state),</div><div class='del'>-				       GFP_KERNEL);</div><div class='del'>-		if (!pf-&gt;vf_state) {</div><div class='del'>-			pf-&gt;num_vfs = 0;</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		err = enetc_msg_psi_init(pf);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev, "enetc_msg_psi_init (%d)\n", err);</div><div class='hunk'>@@ -696,7 +555,6 @@ static int enetc_sriov_configure(struct pci_dev *pdev, int num_vfs)</div><div class='ctx'> err_en_sriov:</div><div class='ctx'> 	enetc_msg_psi_free(pf);</div><div class='ctx'> err_msg_psi:</div><div class='del'>-	kfree(pf-&gt;vf_state);</div><div class='ctx'> 	pf-&gt;num_vfs = 0;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -773,189 +631,10 @@ static const struct net_device_ops enetc_ndev_ops = {</div><div class='ctx'> 	.ndo_setup_tc		= enetc_pf_setup_tc,</div><div class='ctx'> 	.ndo_bpf		= enetc_setup_bpf,</div><div class='ctx'> 	.ndo_xdp_xmit		= enetc_xdp_xmit,</div><div class='add'>+	.ndo_hwtstamp_get	= enetc_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= enetc_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev,</div><div class='del'>-				  const struct net_device_ops *ndev_ops)</div><div class='del'>-{</div><div class='del'>-	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	SET_NETDEV_DEV(ndev, &amp;si-&gt;pdev-&gt;dev);</div><div class='del'>-	priv-&gt;ndev = ndev;</div><div class='del'>-	priv-&gt;si = si;</div><div class='del'>-	priv-&gt;dev = &amp;si-&gt;pdev-&gt;dev;</div><div class='del'>-	si-&gt;ndev = ndev;</div><div class='del'>-</div><div class='del'>-	priv-&gt;msg_enable = (NETIF_MSG_WOL &lt;&lt; 1) - 1;</div><div class='del'>-	ndev-&gt;netdev_ops = ndev_ops;</div><div class='del'>-	enetc_set_ethtool_ops(ndev);</div><div class='del'>-	ndev-&gt;watchdog_timeo = 5 * HZ;</div><div class='del'>-	ndev-&gt;max_mtu = ENETC_MAX_MTU;</div><div class='del'>-</div><div class='del'>-	ndev-&gt;hw_features = NETIF_F_SG | NETIF_F_RXCSUM |</div><div class='del'>-			    NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |</div><div class='del'>-			    NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK |</div><div class='del'>-			    NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6;</div><div class='del'>-	ndev-&gt;features = NETIF_F_HIGHDMA | NETIF_F_SG | NETIF_F_RXCSUM |</div><div class='del'>-			 NETIF_F_HW_VLAN_CTAG_TX |</div><div class='del'>-			 NETIF_F_HW_VLAN_CTAG_RX |</div><div class='del'>-			 NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6;</div><div class='del'>-	ndev-&gt;vlan_features = NETIF_F_SG | NETIF_F_HW_CSUM |</div><div class='del'>-			      NETIF_F_TSO | NETIF_F_TSO6;</div><div class='del'>-</div><div class='del'>-	if (si-&gt;num_rss)</div><div class='del'>-		ndev-&gt;hw_features |= NETIF_F_RXHASH;</div><div class='del'>-</div><div class='del'>-	ndev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='del'>-	ndev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |</div><div class='del'>-			     NETDEV_XDP_ACT_NDO_XMIT | NETDEV_XDP_ACT_RX_SG |</div><div class='del'>-			     NETDEV_XDP_ACT_NDO_XMIT_SG;</div><div class='del'>-</div><div class='del'>-	if (si-&gt;hw_features &amp; ENETC_SI_F_PSFP &amp;&amp; !enetc_psfp_enable(priv)) {</div><div class='del'>-		priv-&gt;active_offloads |= ENETC_F_QCI;</div><div class='del'>-		ndev-&gt;features |= NETIF_F_HW_TC;</div><div class='del'>-		ndev-&gt;hw_features |= NETIF_F_HW_TC;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* pick up primary MAC address from SI */</div><div class='del'>-	enetc_load_primary_mac_addr(&amp;si-&gt;hw, ndev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;pf-&gt;si-&gt;pdev-&gt;dev;</div><div class='del'>-	struct enetc_mdio_priv *mdio_priv;</div><div class='del'>-	struct mii_bus *bus;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv));</div><div class='del'>-	if (!bus)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	bus-&gt;name = "Freescale ENETC MDIO Bus";</div><div class='del'>-	bus-&gt;read = enetc_mdio_read_c22;</div><div class='del'>-	bus-&gt;write = enetc_mdio_write_c22;</div><div class='del'>-	bus-&gt;read_c45 = enetc_mdio_read_c45;</div><div class='del'>-	bus-&gt;write_c45 = enetc_mdio_write_c45;</div><div class='del'>-	bus-&gt;parent = dev;</div><div class='del'>-	mdio_priv = bus-&gt;priv;</div><div class='del'>-	mdio_priv-&gt;hw = &amp;pf-&gt;si-&gt;hw;</div><div class='del'>-	mdio_priv-&gt;mdio_base = ENETC_EMDIO_BASE;</div><div class='del'>-	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s", dev_name(dev));</div><div class='del'>-</div><div class='del'>-	err = of_mdiobus_register(bus, np);</div><div class='del'>-	if (err)</div><div class='del'>-		return dev_err_probe(dev, err, "cannot register MDIO bus\n");</div><div class='del'>-</div><div class='del'>-	pf-&gt;mdio = bus;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enetc_mdio_remove(struct enetc_pf *pf)</div><div class='del'>-{</div><div class='del'>-	if (pf-&gt;mdio)</div><div class='del'>-		mdiobus_unregister(pf-&gt;mdio);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enetc_imdio_create(struct enetc_pf *pf)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;pf-&gt;si-&gt;pdev-&gt;dev;</div><div class='del'>-	struct enetc_mdio_priv *mdio_priv;</div><div class='del'>-	struct phylink_pcs *phylink_pcs;</div><div class='del'>-	struct mii_bus *bus;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	bus = mdiobus_alloc_size(sizeof(*mdio_priv));</div><div class='del'>-	if (!bus)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	bus-&gt;name = "Freescale ENETC internal MDIO Bus";</div><div class='del'>-	bus-&gt;read = enetc_mdio_read_c22;</div><div class='del'>-	bus-&gt;write = enetc_mdio_write_c22;</div><div class='del'>-	bus-&gt;read_c45 = enetc_mdio_read_c45;</div><div class='del'>-	bus-&gt;write_c45 = enetc_mdio_write_c45;</div><div class='del'>-	bus-&gt;parent = dev;</div><div class='del'>-	bus-&gt;phy_mask = ~0;</div><div class='del'>-	mdio_priv = bus-&gt;priv;</div><div class='del'>-	mdio_priv-&gt;hw = &amp;pf-&gt;si-&gt;hw;</div><div class='del'>-	mdio_priv-&gt;mdio_base = ENETC_PM_IMDIO_BASE;</div><div class='del'>-	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev));</div><div class='del'>-</div><div class='del'>-	err = mdiobus_register(bus);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "cannot register internal MDIO bus (%d)\n", err);</div><div class='del'>-		goto free_mdio_bus;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	phylink_pcs = lynx_pcs_create_mdiodev(bus, 0);</div><div class='del'>-	if (IS_ERR(phylink_pcs)) {</div><div class='del'>-		err = PTR_ERR(phylink_pcs);</div><div class='del'>-		dev_err(dev, "cannot create lynx pcs (%d)\n", err);</div><div class='del'>-		goto unregister_mdiobus;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pf-&gt;imdio = bus;</div><div class='del'>-	pf-&gt;pcs = phylink_pcs;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-unregister_mdiobus:</div><div class='del'>-	mdiobus_unregister(bus);</div><div class='del'>-free_mdio_bus:</div><div class='del'>-	mdiobus_free(bus);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enetc_imdio_remove(struct enetc_pf *pf)</div><div class='del'>-{</div><div class='del'>-	if (pf-&gt;pcs)</div><div class='del'>-		lynx_pcs_destroy(pf-&gt;pcs);</div><div class='del'>-	if (pf-&gt;imdio) {</div><div class='del'>-		mdiobus_unregister(pf-&gt;imdio);</div><div class='del'>-		mdiobus_free(pf-&gt;imdio);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool enetc_port_has_pcs(struct enetc_pf *pf)</div><div class='del'>-{</div><div class='del'>-	return (pf-&gt;if_mode == PHY_INTERFACE_MODE_SGMII ||</div><div class='del'>-		pf-&gt;if_mode == PHY_INTERFACE_MODE_1000BASEX ||</div><div class='del'>-		pf-&gt;if_mode == PHY_INTERFACE_MODE_2500BASEX ||</div><div class='del'>-		pf-&gt;if_mode == PHY_INTERFACE_MODE_USXGMII);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node)</div><div class='del'>-{</div><div class='del'>-	struct device_node *mdio_np;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	mdio_np = of_get_child_by_name(node, "mdio");</div><div class='del'>-	if (mdio_np) {</div><div class='del'>-		err = enetc_mdio_probe(pf, mdio_np);</div><div class='del'>-</div><div class='del'>-		of_node_put(mdio_np);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (enetc_port_has_pcs(pf)) {</div><div class='del'>-		err = enetc_imdio_create(pf);</div><div class='del'>-		if (err) {</div><div class='del'>-			enetc_mdio_remove(pf);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enetc_mdiobus_destroy(struct enetc_pf *pf)</div><div class='del'>-{</div><div class='del'>-	enetc_mdio_remove(pf);</div><div class='del'>-	enetc_imdio_remove(pf);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct phylink_pcs *</div><div class='ctx'> enetc_pl_mac_select_pcs(struct phylink_config *config, phy_interface_t iface)</div><div class='ctx'> {</div><div class='hunk'>@@ -1101,47 +780,6 @@ static const struct phylink_mac_ops enetc_mac_phylink_ops = {</div><div class='ctx'> 	.mac_link_down = enetc_pl_mac_link_down,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int enetc_phylink_create(struct enetc_ndev_priv *priv,</div><div class='del'>-				struct device_node *node)</div><div class='del'>-{</div><div class='del'>-	struct enetc_pf *pf = enetc_si_priv(priv-&gt;si);</div><div class='del'>-	struct phylink *phylink;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	pf-&gt;phylink_config.dev = &amp;priv-&gt;ndev-&gt;dev;</div><div class='del'>-	pf-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='del'>-	pf-&gt;phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='del'>-		MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD;</div><div class='del'>-</div><div class='del'>-	__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='del'>-		  pf-&gt;phylink_config.supported_interfaces);</div><div class='del'>-	__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='del'>-		  pf-&gt;phylink_config.supported_interfaces);</div><div class='del'>-	__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='del'>-		  pf-&gt;phylink_config.supported_interfaces);</div><div class='del'>-	__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='del'>-		  pf-&gt;phylink_config.supported_interfaces);</div><div class='del'>-	__set_bit(PHY_INTERFACE_MODE_USXGMII,</div><div class='del'>-		  pf-&gt;phylink_config.supported_interfaces);</div><div class='del'>-	phy_interface_set_rgmii(pf-&gt;phylink_config.supported_interfaces);</div><div class='del'>-</div><div class='del'>-	phylink = phylink_create(&amp;pf-&gt;phylink_config, of_fwnode_handle(node),</div><div class='del'>-				 pf-&gt;if_mode, &amp;enetc_mac_phylink_ops);</div><div class='del'>-	if (IS_ERR(phylink)) {</div><div class='del'>-		err = PTR_ERR(phylink);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;phylink = phylink;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void enetc_phylink_destroy(struct enetc_ndev_priv *priv)</div><div class='del'>-{</div><div class='del'>-	phylink_destroy(priv-&gt;phylink);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Initialize the entire shared memory for the flow steering entries</div><div class='ctx'>  * of this port (PF + VFs)</div><div class='ctx'>  */</div><div class='hunk'>@@ -1191,21 +829,36 @@ static int enetc_pf_register_with_ierb(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *ierb_pdev;</div><div class='ctx'> 	struct device_node *ierb_node;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ierb_node = of_find_compatible_node(NULL, NULL,</div><div class='ctx'> 					    "fsl,ls1028a-enetc-ierb");</div><div class='del'>-	if (!ierb_node || !of_device_is_available(ierb_node))</div><div class='add'>+	if (!ierb_node)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='add'>+	if (!of_device_is_available(ierb_node)) {</div><div class='add'>+		of_node_put(ierb_node);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ierb_pdev = of_find_device_by_node(ierb_node);</div><div class='ctx'> 	of_node_put(ierb_node);</div><div class='ctx'> </div><div class='ctx'> 	if (!ierb_pdev)</div><div class='ctx'> 		return -EPROBE_DEFER;</div><div class='ctx'> </div><div class='del'>-	return enetc_ierb_register_pf(ierb_pdev, pdev);</div><div class='add'>+	ret = enetc_ierb_register_pf(ierb_pdev, pdev);</div><div class='add'>+</div><div class='add'>+	put_device(&amp;ierb_pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct enetc_si_ops enetc_psi_ops = {</div><div class='add'>+	.get_rss_table = enetc_get_rss_table,</div><div class='add'>+	.set_rss_table = enetc_set_rss_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct enetc_si *enetc_psi_create(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_si *si;</div><div class='hunk'>@@ -1224,6 +877,14 @@ static struct enetc_si *enetc_psi_create(struct pci_dev *pdev)</div><div class='ctx'> 		goto out_pci_remove;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	si-&gt;revision = enetc_get_ip_revision(&amp;si-&gt;hw);</div><div class='add'>+	si-&gt;ops = &amp;enetc_psi_ops;</div><div class='add'>+	err = enetc_get_driver_data(si);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Could not get PF driver data\n");</div><div class='add'>+		goto out_pci_remove;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = enetc_setup_cbdr(&amp;pdev-&gt;dev, &amp;si-&gt;hw, ENETC_CBDR_DEFAULT_SIZE,</div><div class='ctx'> 			       &amp;si-&gt;cbd_ring);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1259,6 +920,14 @@ static void enetc_psi_destroy(struct pci_dev *pdev)</div><div class='ctx'> 	enetc_pci_remove(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct enetc_pf_ops enetc_pf_ops = {</div><div class='add'>+	.set_si_primary_mac = enetc_pf_set_primary_mac_addr,</div><div class='add'>+	.get_si_primary_mac = enetc_pf_get_primary_mac_addr,</div><div class='add'>+	.create_pcs = enetc_pf_create_pcs,</div><div class='add'>+	.destroy_pcs = enetc_pf_destroy_pcs,</div><div class='add'>+	.enable_psfp = enetc_psfp_enable,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int enetc_pf_probe(struct pci_dev *pdev,</div><div class='ctx'> 			  const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='hunk'>@@ -1285,7 +954,15 @@ static int enetc_pf_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	pf = enetc_si_priv(si);</div><div class='ctx'> 	pf-&gt;si = si;</div><div class='add'>+	pf-&gt;ops = &amp;enetc_pf_ops;</div><div class='add'>+</div><div class='ctx'> 	pf-&gt;total_vfs = pci_sriov_get_totalvfs(pdev);</div><div class='add'>+	if (pf-&gt;total_vfs) {</div><div class='add'>+		pf-&gt;vf_state = kcalloc(pf-&gt;total_vfs, sizeof(struct enetc_vf_state),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+		if (!pf-&gt;vf_state)</div><div class='add'>+			goto err_alloc_vf_state;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = enetc_setup_mac_addresses(node, pf);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1338,7 +1015,7 @@ static int enetc_pf_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_mdiobus_create;</div><div class='ctx'> </div><div class='del'>-	err = enetc_phylink_create(priv, node);</div><div class='add'>+	err = enetc_phylink_create(priv, node, &amp;enetc_mac_phylink_ops);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_phylink_create;</div><div class='ctx'> </div><div class='hunk'>@@ -1363,6 +1040,8 @@ err_alloc_si_res:</div><div class='ctx'> 	free_netdev(ndev);</div><div class='ctx'> err_alloc_netdev:</div><div class='ctx'> err_setup_mac_addresses:</div><div class='add'>+	kfree(pf-&gt;vf_state);</div><div class='add'>+err_alloc_vf_state:</div><div class='ctx'> 	enetc_psi_destroy(pdev);</div><div class='ctx'> err_psi_create:</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1389,6 +1068,7 @@ static void enetc_pf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	enetc_free_si_resources(priv);</div><div class='ctx'> </div><div class='ctx'> 	free_netdev(si-&gt;ndev);</div><div class='add'>+	kfree(pf-&gt;vf_state);</div><div class='ctx'> </div><div class='ctx'> 	enetc_psi_destroy(pdev);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pf.h b/drivers/net/ethernet/freescale/enetc/enetc_pf.h<br/>index c26bd66e4597..ae407e9e9ee7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_pf.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_pf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_pf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_pf.h</a></div><div class='hunk'>@@ -5,19 +5,8 @@</div><div class='ctx'> #include &lt;linux/phylink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define ENETC_PF_NUM_RINGS	8</div><div class='del'>-</div><div class='del'>-enum enetc_mac_addr_type {UC, MC, MADDR_TYPE};</div><div class='ctx'> #define ENETC_MAX_NUM_MAC_FLT	((ENETC_MAX_NUM_VFS + 1) * MADDR_TYPE)</div><div class='ctx'> </div><div class='del'>-#define ENETC_MADDR_HASH_TBL_SZ	64</div><div class='del'>-struct enetc_mac_filter {</div><div class='del'>-	union {</div><div class='del'>-		char mac_addr[ETH_ALEN];</div><div class='del'>-		DECLARE_BITMAP(mac_hash_table, ENETC_MADDR_HASH_TBL_SZ);</div><div class='del'>-	};</div><div class='del'>-	int mac_addr_cnt;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define ENETC_VLAN_HT_SIZE	64</div><div class='ctx'> </div><div class='ctx'> enum enetc_vf_flags {</div><div class='hunk'>@@ -28,6 +17,25 @@ struct enetc_vf_state {</div><div class='ctx'> 	enum enetc_vf_flags flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct enetc_port_caps {</div><div class='add'>+	u32 half_duplex:1;</div><div class='add'>+	int num_vsi;</div><div class='add'>+	int num_msix;</div><div class='add'>+	int num_rx_bdr;</div><div class='add'>+	int num_tx_bdr;</div><div class='add'>+	int mac_filter_num;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct enetc_pf;</div><div class='add'>+</div><div class='add'>+struct enetc_pf_ops {</div><div class='add'>+	void (*set_si_primary_mac)(struct enetc_hw *hw, int si, const u8 *addr);</div><div class='add'>+	void (*get_si_primary_mac)(struct enetc_hw *hw, int si, u8 *addr);</div><div class='add'>+	struct phylink_pcs *(*create_pcs)(struct enetc_pf *pf, struct mii_bus *bus);</div><div class='add'>+	void (*destroy_pcs)(struct phylink_pcs *pcs);</div><div class='add'>+	int (*enable_psfp)(struct enetc_ndev_priv *priv);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct enetc_pf {</div><div class='ctx'> 	struct enetc_si *si;</div><div class='ctx'> 	int num_vfs; /* number of active VFs, after sriov_init */</div><div class='hunk'>@@ -50,6 +58,11 @@ struct enetc_pf {</div><div class='ctx'> </div><div class='ctx'> 	phy_interface_t if_mode;</div><div class='ctx'> 	struct phylink_config phylink_config;</div><div class='add'>+</div><div class='add'>+	struct enetc_port_caps caps;</div><div class='add'>+	const struct enetc_pf_ops *ops;</div><div class='add'>+</div><div class='add'>+	int num_mfe;	/* number of mac address filter table entries */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define phylink_to_enetc_pf(config) \</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c b/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c<br/>new file mode 100644<br/>index 000000000000..76263b8566bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_pf_common.c</a></div><div class='hunk'>@@ -0,0 +1,439 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/* Copyright 2024 NXP */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/fsl/enetc_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+</div><div class='add'>+#include "enetc_pf_common.h"</div><div class='add'>+</div><div class='add'>+static void enetc_set_si_hw_addr(struct enetc_pf *pf, int si,</div><div class='add'>+				 const u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+</div><div class='add'>+	pf-&gt;ops-&gt;set_si_primary_mac(hw, si, mac_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_get_si_hw_addr(struct enetc_pf *pf, int si, u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+</div><div class='add'>+	pf-&gt;ops-&gt;get_si_primary_mac(hw, si, mac_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct enetc_pf *pf = enetc_si_priv(priv-&gt;si);</div><div class='add'>+	struct sockaddr *saddr = addr;</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(saddr-&gt;sa_data))</div><div class='add'>+		return -EADDRNOTAVAIL;</div><div class='add'>+</div><div class='add'>+	eth_hw_addr_set(ndev, saddr-&gt;sa_data);</div><div class='add'>+	enetc_set_si_hw_addr(pf, 0, saddr-&gt;sa_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_pf_set_mac_addr);</div><div class='add'>+</div><div class='add'>+static int enetc_setup_mac_address(struct device_node *np, struct enetc_pf *pf,</div><div class='add'>+				   int si)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pf-&gt;si-&gt;pdev-&gt;dev;</div><div class='add'>+	u8 mac_addr[ETH_ALEN] = { 0 };</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* (1) try to get the MAC address from the device tree */</div><div class='add'>+	if (np) {</div><div class='add'>+		err = of_get_mac_address(np, mac_addr);</div><div class='add'>+		if (err == -EPROBE_DEFER)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* (2) bootloader supplied MAC address */</div><div class='add'>+	if (is_zero_ether_addr(mac_addr))</div><div class='add'>+		enetc_get_si_hw_addr(pf, si, mac_addr);</div><div class='add'>+</div><div class='add'>+	/* (3) choose a random one */</div><div class='add'>+	if (is_zero_ether_addr(mac_addr)) {</div><div class='add'>+		eth_random_addr(mac_addr);</div><div class='add'>+		dev_info(dev, "no MAC address specified for SI%d, using %pM\n",</div><div class='add'>+			 si, mac_addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enetc_set_si_hw_addr(pf, si, mac_addr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int enetc_setup_mac_addresses(struct device_node *np, struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	/* The PF might take its MAC from the device tree */</div><div class='add'>+	err = enetc_setup_mac_address(np, pf, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pf-&gt;total_vfs; i++) {</div><div class='add'>+		err = enetc_setup_mac_address(NULL, pf, i + 1);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_setup_mac_addresses);</div><div class='add'>+</div><div class='add'>+void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev,</div><div class='add'>+			   const struct net_device_ops *ndev_ops)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct enetc_pf *pf = enetc_si_priv(si);</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(ndev, &amp;si-&gt;pdev-&gt;dev);</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+	priv-&gt;si = si;</div><div class='add'>+	priv-&gt;dev = &amp;si-&gt;pdev-&gt;dev;</div><div class='add'>+	si-&gt;ndev = ndev;</div><div class='add'>+</div><div class='add'>+	priv-&gt;msg_enable = (NETIF_MSG_WOL &lt;&lt; 1) - 1;</div><div class='add'>+	priv-&gt;sysclk_freq = si-&gt;drvdata-&gt;sysclk_freq;</div><div class='add'>+	priv-&gt;max_frags = si-&gt;drvdata-&gt;max_frags;</div><div class='add'>+	ndev-&gt;netdev_ops = ndev_ops;</div><div class='add'>+	enetc_set_ethtool_ops(ndev);</div><div class='add'>+	ndev-&gt;watchdog_timeo = 5 * HZ;</div><div class='add'>+	ndev-&gt;max_mtu = ENETC_MAX_MTU;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;hw_features = NETIF_F_SG | NETIF_F_RXCSUM |</div><div class='add'>+			    NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |</div><div class='add'>+			    NETIF_F_HW_VLAN_CTAG_FILTER |</div><div class='add'>+			    NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6 |</div><div class='add'>+			    NETIF_F_GSO_UDP_L4;</div><div class='add'>+	ndev-&gt;features = NETIF_F_HIGHDMA | NETIF_F_SG | NETIF_F_RXCSUM |</div><div class='add'>+			 NETIF_F_HW_VLAN_CTAG_TX |</div><div class='add'>+			 NETIF_F_HW_VLAN_CTAG_RX |</div><div class='add'>+			 NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6 |</div><div class='add'>+			 NETIF_F_GSO_UDP_L4;</div><div class='add'>+	ndev-&gt;vlan_features = NETIF_F_SG | NETIF_F_HW_CSUM |</div><div class='add'>+			      NETIF_F_TSO | NETIF_F_TSO6;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='add'>+</div><div class='add'>+	if (si-&gt;drvdata-&gt;tx_csum)</div><div class='add'>+		priv-&gt;active_offloads |= ENETC_F_TXCSUM;</div><div class='add'>+</div><div class='add'>+	if (si-&gt;hw_features &amp; ENETC_SI_F_LSO)</div><div class='add'>+		priv-&gt;active_offloads |= ENETC_F_LSO;</div><div class='add'>+</div><div class='add'>+	if (si-&gt;num_rss) {</div><div class='add'>+		ndev-&gt;hw_features |= NETIF_F_RXHASH;</div><div class='add'>+		ndev-&gt;features |= NETIF_F_RXHASH;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!enetc_is_pseudo_mac(si))</div><div class='add'>+		ndev-&gt;hw_features |= NETIF_F_LOOPBACK;</div><div class='add'>+</div><div class='add'>+	/* TODO: currently, i.MX95 ENETC driver does not support advanced features */</div><div class='add'>+	if (!is_enetc_rev1(si))</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |</div><div class='add'>+			     NETDEV_XDP_ACT_NDO_XMIT | NETDEV_XDP_ACT_RX_SG |</div><div class='add'>+			     NETDEV_XDP_ACT_NDO_XMIT_SG;</div><div class='add'>+</div><div class='add'>+	if (si-&gt;hw_features &amp; ENETC_SI_F_PSFP &amp;&amp; pf-&gt;ops-&gt;enable_psfp &amp;&amp;</div><div class='add'>+	    !pf-&gt;ops-&gt;enable_psfp(priv)) {</div><div class='add'>+		priv-&gt;active_offloads |= ENETC_F_QCI;</div><div class='add'>+		ndev-&gt;features |= NETIF_F_HW_TC;</div><div class='add'>+		ndev-&gt;hw_features |= NETIF_F_HW_TC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	/* pick up primary MAC address from SI */</div><div class='add'>+	enetc_load_primary_mac_addr(&amp;si-&gt;hw, ndev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_pf_netdev_setup);</div><div class='add'>+</div><div class='add'>+static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pf-&gt;si-&gt;pdev-&gt;dev;</div><div class='add'>+	struct enetc_mdio_priv *mdio_priv;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv));</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bus-&gt;name = "Freescale ENETC MDIO Bus";</div><div class='add'>+	bus-&gt;read = enetc_mdio_read_c22;</div><div class='add'>+	bus-&gt;write = enetc_mdio_write_c22;</div><div class='add'>+	bus-&gt;read_c45 = enetc_mdio_read_c45;</div><div class='add'>+	bus-&gt;write_c45 = enetc_mdio_write_c45;</div><div class='add'>+	bus-&gt;parent = dev;</div><div class='add'>+	mdio_priv = bus-&gt;priv;</div><div class='add'>+	mdio_priv-&gt;hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (is_enetc_rev1(pf-&gt;si))</div><div class='add'>+		mdio_priv-&gt;mdio_base = ENETC_EMDIO_BASE;</div><div class='add'>+	else</div><div class='add'>+		mdio_priv-&gt;mdio_base = ENETC4_EMDIO_BASE;</div><div class='add'>+</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s", dev_name(dev));</div><div class='add'>+</div><div class='add'>+	err = of_mdiobus_register(bus, np);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(dev, err, "cannot register MDIO bus\n");</div><div class='add'>+</div><div class='add'>+	pf-&gt;mdio = bus;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_mdio_remove(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	if (pf-&gt;mdio)</div><div class='add'>+		mdiobus_unregister(pf-&gt;mdio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int enetc_imdio_create(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pf-&gt;si-&gt;pdev-&gt;dev;</div><div class='add'>+	struct enetc_mdio_priv *mdio_priv;</div><div class='add'>+	struct phylink_pcs *phylink_pcs;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!pf-&gt;ops-&gt;create_pcs) {</div><div class='add'>+		dev_err(dev, "Creating PCS is not supported\n");</div><div class='add'>+</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus = mdiobus_alloc_size(sizeof(*mdio_priv));</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bus-&gt;name = "Freescale ENETC internal MDIO Bus";</div><div class='add'>+	bus-&gt;read = enetc_mdio_read_c22;</div><div class='add'>+	bus-&gt;write = enetc_mdio_write_c22;</div><div class='add'>+	bus-&gt;read_c45 = enetc_mdio_read_c45;</div><div class='add'>+	bus-&gt;write_c45 = enetc_mdio_write_c45;</div><div class='add'>+	bus-&gt;parent = dev;</div><div class='add'>+	bus-&gt;phy_mask = ~0;</div><div class='add'>+	mdio_priv = bus-&gt;priv;</div><div class='add'>+	mdio_priv-&gt;hw = &amp;pf-&gt;si-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (is_enetc_rev1(pf-&gt;si))</div><div class='add'>+		mdio_priv-&gt;mdio_base = ENETC_PM_IMDIO_BASE;</div><div class='add'>+	else</div><div class='add'>+		mdio_priv-&gt;mdio_base = ENETC4_PM_IMDIO_BASE;</div><div class='add'>+</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev));</div><div class='add'>+</div><div class='add'>+	err = mdiobus_register(bus);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "cannot register internal MDIO bus (%d)\n", err);</div><div class='add'>+		goto free_mdio_bus;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phylink_pcs = pf-&gt;ops-&gt;create_pcs(pf, bus);</div><div class='add'>+	if (IS_ERR(phylink_pcs)) {</div><div class='add'>+		err = PTR_ERR(phylink_pcs);</div><div class='add'>+		dev_err(dev, "cannot create lynx pcs (%d)\n", err);</div><div class='add'>+		goto unregister_mdiobus;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pf-&gt;imdio = bus;</div><div class='add'>+	pf-&gt;pcs = phylink_pcs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unregister_mdiobus:</div><div class='add'>+	mdiobus_unregister(bus);</div><div class='add'>+free_mdio_bus:</div><div class='add'>+	mdiobus_free(bus);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_imdio_remove(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	if (pf-&gt;pcs &amp;&amp; pf-&gt;ops-&gt;destroy_pcs)</div><div class='add'>+		pf-&gt;ops-&gt;destroy_pcs(pf-&gt;pcs);</div><div class='add'>+</div><div class='add'>+	if (pf-&gt;imdio) {</div><div class='add'>+		mdiobus_unregister(pf-&gt;imdio);</div><div class='add'>+		mdiobus_free(pf-&gt;imdio);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool enetc_port_has_pcs(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	return (pf-&gt;if_mode == PHY_INTERFACE_MODE_SGMII ||</div><div class='add'>+		pf-&gt;if_mode == PHY_INTERFACE_MODE_1000BASEX ||</div><div class='add'>+		pf-&gt;if_mode == PHY_INTERFACE_MODE_2500BASEX ||</div><div class='add'>+		pf-&gt;if_mode == PHY_INTERFACE_MODE_USXGMII);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node)</div><div class='add'>+{</div><div class='add'>+	struct device_node *mdio_np;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mdio_np = of_get_child_by_name(node, "mdio");</div><div class='add'>+	if (mdio_np) {</div><div class='add'>+		err = enetc_mdio_probe(pf, mdio_np);</div><div class='add'>+</div><div class='add'>+		of_node_put(mdio_np);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enetc_port_has_pcs(pf)) {</div><div class='add'>+		err = enetc_imdio_create(pf);</div><div class='add'>+		if (err) {</div><div class='add'>+			enetc_mdio_remove(pf);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_mdiobus_create);</div><div class='add'>+</div><div class='add'>+void enetc_mdiobus_destroy(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	enetc_mdio_remove(pf);</div><div class='add'>+	enetc_imdio_remove(pf);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_mdiobus_destroy);</div><div class='add'>+</div><div class='add'>+int enetc_phylink_create(struct enetc_ndev_priv *priv, struct device_node *node,</div><div class='add'>+			 const struct phylink_mac_ops *ops)</div><div class='add'>+{</div><div class='add'>+	struct enetc_pf *pf = enetc_si_priv(priv-&gt;si);</div><div class='add'>+	struct phylink *phylink;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pf-&gt;phylink_config.dev = &amp;priv-&gt;ndev-&gt;dev;</div><div class='add'>+	pf-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='add'>+	pf-&gt;phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+		MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD;</div><div class='add'>+</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+		  pf-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+		  pf-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+		  pf-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+		  pf-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_USXGMII,</div><div class='add'>+		  pf-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	phy_interface_set_rgmii(pf-&gt;phylink_config.supported_interfaces);</div><div class='add'>+</div><div class='add'>+	phylink = phylink_create(&amp;pf-&gt;phylink_config, of_fwnode_handle(node),</div><div class='add'>+				 pf-&gt;if_mode, ops);</div><div class='add'>+	if (IS_ERR(phylink)) {</div><div class='add'>+		err = PTR_ERR(phylink);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;phylink = phylink;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_phylink_create);</div><div class='add'>+</div><div class='add'>+void enetc_phylink_destroy(struct enetc_ndev_priv *priv)</div><div class='add'>+{</div><div class='add'>+	phylink_destroy(priv-&gt;phylink);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_phylink_destroy);</div><div class='add'>+</div><div class='add'>+void enetc_set_default_rss_key(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	u8 hash_key[ENETC_RSSHASH_KEY_SIZE] = {0};</div><div class='add'>+</div><div class='add'>+	/* set up hash key */</div><div class='add'>+	get_random_bytes(hash_key, ENETC_RSSHASH_KEY_SIZE);</div><div class='add'>+	enetc_set_rss_key(pf-&gt;si, hash_key);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_set_default_rss_key);</div><div class='add'>+</div><div class='add'>+static int enetc_vid_hash_idx(unsigned int vid)</div><div class='add'>+{</div><div class='add'>+	int res = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 6; i++)</div><div class='add'>+		res |= (hweight8(vid &amp; (BIT(i) | BIT(i + 6))) &amp; 0x1) &lt;&lt; i;</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_refresh_vlan_ht_filter(struct enetc_pf *pf)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	bitmap_zero(pf-&gt;vlan_ht_filter, ENETC_VLAN_HT_SIZE);</div><div class='add'>+	for_each_set_bit(i, pf-&gt;active_vlans, VLAN_N_VID) {</div><div class='add'>+		int hidx = enetc_vid_hash_idx(i);</div><div class='add'>+</div><div class='add'>+		__set_bit(hidx, pf-&gt;vlan_ht_filter);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void enetc_set_si_vlan_ht_filter(struct enetc_si *si,</div><div class='add'>+					int si_id, u64 hash)</div><div class='add'>+{</div><div class='add'>+	struct enetc_hw *hw = &amp;si-&gt;hw;</div><div class='add'>+	int high_reg_off, low_reg_off;</div><div class='add'>+</div><div class='add'>+	if (is_enetc_rev1(si)) {</div><div class='add'>+		low_reg_off = ENETC_PSIVHFR0(si_id);</div><div class='add'>+		high_reg_off = ENETC_PSIVHFR1(si_id);</div><div class='add'>+	} else {</div><div class='add'>+		low_reg_off = ENETC4_PSIVHFR0(si_id);</div><div class='add'>+		high_reg_off = ENETC4_PSIVHFR1(si_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enetc_port_wr(hw, low_reg_off, lower_32_bits(hash));</div><div class='add'>+	enetc_port_wr(hw, high_reg_off, upper_32_bits(hash));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int enetc_vlan_rx_add_vid(struct net_device *ndev, __be16 prot, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct enetc_pf *pf = enetc_si_priv(priv-&gt;si);</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	__set_bit(vid, pf-&gt;active_vlans);</div><div class='add'>+</div><div class='add'>+	idx = enetc_vid_hash_idx(vid);</div><div class='add'>+	if (!__test_and_set_bit(idx, pf-&gt;vlan_ht_filter))</div><div class='add'>+		enetc_set_si_vlan_ht_filter(pf-&gt;si, 0, *pf-&gt;vlan_ht_filter);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_vlan_rx_add_vid);</div><div class='add'>+</div><div class='add'>+int enetc_vlan_rx_del_vid(struct net_device *ndev, __be16 prot, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct enetc_pf *pf = enetc_si_priv(priv-&gt;si);</div><div class='add'>+</div><div class='add'>+	if (__test_and_clear_bit(vid, pf-&gt;active_vlans)) {</div><div class='add'>+		enetc_refresh_vlan_ht_filter(pf);</div><div class='add'>+		enetc_set_si_vlan_ht_filter(pf-&gt;si, 0, *pf-&gt;vlan_ht_filter);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(enetc_vlan_rx_del_vid);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("NXP ENETC PF common functionality driver");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pf_common.h b/drivers/net/ethernet/freescale/enetc/enetc_pf_common.h<br/>new file mode 100644<br/>index 000000000000..96d4840a3107<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_pf_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_pf_common.h</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */</div><div class='add'>+/* Copyright 2024 NXP */</div><div class='add'>+</div><div class='add'>+#include "enetc_pf.h"</div><div class='add'>+</div><div class='add'>+int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr);</div><div class='add'>+int enetc_setup_mac_addresses(struct device_node *np, struct enetc_pf *pf);</div><div class='add'>+void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev,</div><div class='add'>+			   const struct net_device_ops *ndev_ops);</div><div class='add'>+int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node);</div><div class='add'>+void enetc_mdiobus_destroy(struct enetc_pf *pf);</div><div class='add'>+int enetc_phylink_create(struct enetc_ndev_priv *priv, struct device_node *node,</div><div class='add'>+			 const struct phylink_mac_ops *ops);</div><div class='add'>+void enetc_phylink_destroy(struct enetc_ndev_priv *priv);</div><div class='add'>+void enetc_set_default_rss_key(struct enetc_pf *pf);</div><div class='add'>+int enetc_vlan_rx_add_vid(struct net_device *ndev, __be16 prot, u16 vid);</div><div class='add'>+int enetc_vlan_rx_del_vid(struct net_device *ndev, __be16 prot, u16 vid);</div><div class='add'>+</div><div class='add'>+static inline u16 enetc_get_ip_revision(struct enetc_hw *hw)</div><div class='add'>+{</div><div class='add'>+	return enetc_global_rd(hw, ENETC_G_EIPBRR0) &amp; EIPBRR0_REVISION;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_ptp.c b/drivers/net/ethernet/freescale/enetc/enetc_ptp.c<br/>index 5243fc031058..b8413d3b4f16 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_ptp.c</a></div><div class='hunk'>@@ -7,9 +7,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "enetc.h"</div><div class='ctx'> </div><div class='del'>-int enetc_phc_index = -1;</div><div class='del'>-EXPORT_SYMBOL_GPL(enetc_phc_index);</div><div class='del'>-</div><div class='ctx'> static struct ptp_clock_info enetc_ptp_caps = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='ctx'> 	.name		= "ENETC PTP clock",</div><div class='hunk'>@@ -92,7 +89,6 @@ static int enetc_ptp_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_no_clock;</div><div class='ctx'> </div><div class='del'>-	enetc_phc_index = ptp_qoriq-&gt;phc_index;</div><div class='ctx'> 	pci_set_drvdata(pdev, ptp_qoriq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -118,7 +114,6 @@ static void enetc_ptp_remove(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ptp_qoriq *ptp_qoriq = pci_get_drvdata(pdev);</div><div class='ctx'> </div><div class='del'>-	enetc_phc_index = -1;</div><div class='ctx'> 	ptp_qoriq_free(ptp_qoriq);</div><div class='ctx'> 	pci_free_irq_vectors(pdev);</div><div class='ctx'> 	kfree(ptp_qoriq);</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_qos.c b/drivers/net/ethernet/freescale/enetc/enetc_qos.c<br/>index b65da49dd926..ccf86651455c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_qos.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_qos.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_qos.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_qos.c</a></div><div class='hunk'>@@ -336,7 +336,7 @@ int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data)</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * (enetClockFrequency / portTransmitRate) * 100</div><div class='ctx'> 	 */</div><div class='del'>-	hi_credit_reg = (u32)div_u64((ENETC_CLK * 100ULL) * hi_credit_bit,</div><div class='add'>+	hi_credit_reg = (u32)div_u64((priv-&gt;sysclk_freq * 100ULL) * hi_credit_bit,</div><div class='ctx'> 				     port_transmit_rate * 1000000ULL);</div><div class='ctx'> </div><div class='ctx'> 	enetc_port_wr(hw, ENETC_PTCCBSR1(tc), hi_credit_reg);</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/enetc_vf.c b/drivers/net/ethernet/freescale/enetc/enetc_vf.c<br/>index dfcaac302e24..6c4b374bcb0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_vf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/enetc/enetc_vf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/enetc_vf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/enetc_vf.c</a></div><div class='hunk'>@@ -78,11 +78,18 @@ static int enetc_vf_set_mac_addr(struct net_device *ndev, void *addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct enetc_ndev_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct sockaddr *saddr = addr;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_valid_ether_addr(saddr-&gt;sa_data))</div><div class='ctx'> 		return -EADDRNOTAVAIL;</div><div class='ctx'> </div><div class='del'>-	return enetc_msg_vsi_set_primary_mac_addr(priv, saddr);</div><div class='add'>+	err = enetc_msg_vsi_set_primary_mac_addr(priv, saddr);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	eth_hw_addr_set(ndev, saddr-&gt;sa_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int enetc_vf_set_features(struct net_device *ndev,</div><div class='hunk'>@@ -114,6 +121,8 @@ static const struct net_device_ops enetc_ndev_ops = {</div><div class='ctx'> 	.ndo_set_features	= enetc_vf_set_features,</div><div class='ctx'> 	.ndo_eth_ioctl		= enetc_ioctl,</div><div class='ctx'> 	.ndo_setup_tc		= enetc_vf_setup_tc,</div><div class='add'>+	.ndo_hwtstamp_get	= enetc_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= enetc_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void enetc_vf_netdev_setup(struct enetc_si *si, struct net_device *ndev,</div><div class='hunk'>@@ -128,6 +137,8 @@ static void enetc_vf_netdev_setup(struct enetc_si *si, struct net_device *ndev,</div><div class='ctx'> 	si-&gt;ndev = ndev;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;msg_enable = (NETIF_MSG_IFUP &lt;&lt; 1) - 1;</div><div class='add'>+	priv-&gt;sysclk_freq = si-&gt;drvdata-&gt;sysclk_freq;</div><div class='add'>+	priv-&gt;max_frags = si-&gt;drvdata-&gt;max_frags;</div><div class='ctx'> 	ndev-&gt;netdev_ops = ndev_ops;</div><div class='ctx'> 	enetc_set_ethtool_ops(ndev);</div><div class='ctx'> 	ndev-&gt;watchdog_timeo = 5 * HZ;</div><div class='hunk'>@@ -136,21 +147,30 @@ static void enetc_vf_netdev_setup(struct enetc_si *si, struct net_device *ndev,</div><div class='ctx'> 	ndev-&gt;hw_features = NETIF_F_SG | NETIF_F_RXCSUM |</div><div class='ctx'> 			    NETIF_F_HW_VLAN_CTAG_TX |</div><div class='ctx'> 			    NETIF_F_HW_VLAN_CTAG_RX |</div><div class='del'>-			    NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6;</div><div class='add'>+			    NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6 |</div><div class='add'>+			    NETIF_F_GSO_UDP_L4;</div><div class='ctx'> 	ndev-&gt;features = NETIF_F_HIGHDMA | NETIF_F_SG | NETIF_F_RXCSUM |</div><div class='ctx'> 			 NETIF_F_HW_VLAN_CTAG_TX |</div><div class='ctx'> 			 NETIF_F_HW_VLAN_CTAG_RX |</div><div class='del'>-			 NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6;</div><div class='add'>+			 NETIF_F_HW_CSUM | NETIF_F_TSO | NETIF_F_TSO6 |</div><div class='add'>+			 NETIF_F_GSO_UDP_L4;</div><div class='ctx'> 	ndev-&gt;vlan_features = NETIF_F_SG | NETIF_F_HW_CSUM |</div><div class='ctx'> 			      NETIF_F_TSO | NETIF_F_TSO6;</div><div class='ctx'> </div><div class='del'>-	if (si-&gt;num_rss)</div><div class='add'>+	if (si-&gt;num_rss) {</div><div class='ctx'> 		ndev-&gt;hw_features |= NETIF_F_RXHASH;</div><div class='add'>+		ndev-&gt;features |= NETIF_F_RXHASH;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* pick up primary MAC address from SI */</div><div class='ctx'> 	enetc_load_primary_mac_addr(&amp;si-&gt;hw, ndev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct enetc_si_ops enetc_vsi_ops = {</div><div class='add'>+	.get_rss_table = enetc_get_rss_table,</div><div class='add'>+	.set_rss_table = enetc_set_rss_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int enetc_vf_probe(struct pci_dev *pdev,</div><div class='ctx'> 			  const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='hunk'>@@ -164,6 +184,14 @@ static int enetc_vf_probe(struct pci_dev *pdev,</div><div class='ctx'> 		return dev_err_probe(&amp;pdev-&gt;dev, err, "PCI probing failed\n");</div><div class='ctx'> </div><div class='ctx'> 	si = pci_get_drvdata(pdev);</div><div class='add'>+	si-&gt;revision = ENETC_REV_1_0;</div><div class='add'>+	si-&gt;ops = &amp;enetc_vsi_ops;</div><div class='add'>+	err = enetc_get_driver_data(si);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;pdev-&gt;dev, err,</div><div class='add'>+			      "Could not get VF driver data\n");</div><div class='add'>+		goto err_alloc_netdev;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	enetc_get_si_caps(si);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c b/drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c<br/>new file mode 100644<br/>index 000000000000..443983fdecd9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c</a></div><div class='hunk'>@@ -0,0 +1,845 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * NXP NETC Blocks Control Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2024 NXP</div><div class='add'>+ *</div><div class='add'>+ * This driver is used for pre-initialization of NETC, such as PCS and MII</div><div class='add'>+ * protocols, LDID, warm reset, etc. Therefore, all NETC device drivers can</div><div class='add'>+ * only be probed after the netc-blk-crtl driver has completed initialization.</div><div class='add'>+ * In addition, when the system enters suspend mode, IERB, PRB, and NETCMIX</div><div class='add'>+ * will be powered off, except for WOL. Therefore, when the system resumes,</div><div class='add'>+ * these blocks need to be reinitialized.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/fsl/netc_global.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+</div><div class='add'>+/* NETCMIX registers */</div><div class='add'>+#define IMX95_CFG_LINK_IO_VAR		0x0</div><div class='add'>+#define  IO_VAR_16FF_16G_SERDES		0x1</div><div class='add'>+#define  IO_VAR(port, var)		(((var) &amp; 0xf) &lt;&lt; ((port) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define IMX95_CFG_LINK_MII_PROT		0x4</div><div class='add'>+#define CFG_LINK_MII_PORT_0		GENMASK(3, 0)</div><div class='add'>+#define CFG_LINK_MII_PORT_1		GENMASK(7, 4)</div><div class='add'>+#define  MII_PROT_MII			0x0</div><div class='add'>+#define  MII_PROT_RMII			0x1</div><div class='add'>+#define  MII_PROT_RGMII			0x2</div><div class='add'>+#define  MII_PROT_SERIAL		0x3</div><div class='add'>+#define  MII_PROT(port, prot)		(((prot) &amp; 0xf) &lt;&lt; ((port) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define IMX95_CFG_LINK_PCS_PROT(a)	(0x8 + (a) * 4)</div><div class='add'>+#define PCS_PROT_1G_SGMII		BIT(0)</div><div class='add'>+#define PCS_PROT_2500M_SGMII		BIT(1)</div><div class='add'>+#define PCS_PROT_XFI			BIT(3)</div><div class='add'>+#define PCS_PROT_SFI			BIT(4)</div><div class='add'>+#define PCS_PROT_10G_SXGMII		BIT(6)</div><div class='add'>+</div><div class='add'>+#define IMX94_EXT_PIN_CONTROL		0x10</div><div class='add'>+#define  MAC2_MAC3_SEL			BIT(1)</div><div class='add'>+</div><div class='add'>+#define IMX94_NETC_LINK_CFG(a)		(0x4c + (a) * 4)</div><div class='add'>+#define  NETC_LINK_CFG_MII_PROT		GENMASK(3, 0)</div><div class='add'>+#define  NETC_LINK_CFG_IO_VAR		GENMASK(19, 16)</div><div class='add'>+</div><div class='add'>+/* NETC privileged register block register */</div><div class='add'>+#define PRB_NETCRR			0x100</div><div class='add'>+#define  NETCRR_SR			BIT(0)</div><div class='add'>+#define  NETCRR_LOCK			BIT(1)</div><div class='add'>+</div><div class='add'>+#define PRB_NETCSR			0x104</div><div class='add'>+#define  NETCSR_ERROR			BIT(0)</div><div class='add'>+#define  NETCSR_STATE			BIT(1)</div><div class='add'>+</div><div class='add'>+/* NETC integrated endpoint register block register */</div><div class='add'>+#define IERB_EMDIOFAUXR			0x344</div><div class='add'>+#define IERB_T0FAUXR			0x444</div><div class='add'>+#define IERB_ETBCR(a)			(0x300c + 0x100 * (a))</div><div class='add'>+#define IERB_LBCR(a)			(0x1010 + 0x40 * (a))</div><div class='add'>+#define  LBCR_MDIO_PHYAD_PRTAD(addr)	(((addr) &amp; 0x1f) &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+#define IERB_EFAUXR(a)			(0x3044 + 0x100 * (a))</div><div class='add'>+#define IERB_VFAUXR(a)			(0x4004 + 0x40 * (a))</div><div class='add'>+#define FAUXR_LDID			GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+/* Platform information */</div><div class='add'>+#define IMX95_ENETC0_BUS_DEVFN		0x0</div><div class='add'>+#define IMX95_ENETC1_BUS_DEVFN		0x40</div><div class='add'>+#define IMX95_ENETC2_BUS_DEVFN		0x80</div><div class='add'>+</div><div class='add'>+#define IMX94_ENETC0_BUS_DEVFN		0x100</div><div class='add'>+#define IMX94_ENETC1_BUS_DEVFN		0x140</div><div class='add'>+#define IMX94_ENETC2_BUS_DEVFN		0x180</div><div class='add'>+#define IMX94_TIMER0_BUS_DEVFN		0x1</div><div class='add'>+#define IMX94_TIMER1_BUS_DEVFN		0x101</div><div class='add'>+#define IMX94_TIMER2_BUS_DEVFN		0x181</div><div class='add'>+#define IMX94_ENETC0_LINK		3</div><div class='add'>+#define IMX94_ENETC1_LINK		4</div><div class='add'>+#define IMX94_ENETC2_LINK		5</div><div class='add'>+</div><div class='add'>+#define NETC_ENETC_ID(a)		(a)</div><div class='add'>+#define NETC_TIMER_ID(a)		(a)</div><div class='add'>+</div><div class='add'>+/* Flags for different platforms */</div><div class='add'>+#define NETC_HAS_NETCMIX		BIT(0)</div><div class='add'>+</div><div class='add'>+struct netc_devinfo {</div><div class='add'>+	u32 flags;</div><div class='add'>+	int (*netcmix_init)(struct platform_device *pdev);</div><div class='add'>+	int (*ierb_init)(struct platform_device *pdev);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct netc_blk_ctrl {</div><div class='add'>+	void __iomem *prb;</div><div class='add'>+	void __iomem *ierb;</div><div class='add'>+	void __iomem *netcmix;</div><div class='add'>+</div><div class='add'>+	const struct netc_devinfo *devinfo;</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct dentry *debugfs_root;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void netc_reg_write(void __iomem *base, u32 offset, u32 val)</div><div class='add'>+{</div><div class='add'>+	netc_write(base + offset, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 netc_reg_read(void __iomem *base, u32 offset)</div><div class='add'>+{</div><div class='add'>+	return netc_read(base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netc_of_pci_get_bus_devfn(struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	u32 reg[5];</div><div class='add'>+	int error;</div><div class='add'>+</div><div class='add'>+	error = of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg));</div><div class='add'>+	if (error)</div><div class='add'>+		return error;</div><div class='add'>+</div><div class='add'>+	return (reg[0] &gt;&gt; 8) &amp; 0xffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netc_get_link_mii_protocol(phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+		return MII_PROT_MII;</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+		return MII_PROT_RMII;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		return MII_PROT_RGMII;</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_10GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_XGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+		return MII_PROT_SERIAL;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx95_netcmix_init(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct netc_blk_ctrl *priv = platform_get_drvdata(pdev);</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	int bus_devfn, mii_proto;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Default setting of MII protocol */</div><div class='add'>+	val = MII_PROT(0, MII_PROT_RGMII) | MII_PROT(1, MII_PROT_RGMII) |</div><div class='add'>+	      MII_PROT(2, MII_PROT_SERIAL);</div><div class='add'>+</div><div class='add'>+	/* Update the link MII protocol through parsing phy-mode */</div><div class='add'>+	for_each_available_child_of_node_scoped(np, child) {</div><div class='add'>+		for_each_available_child_of_node_scoped(child, gchild) {</div><div class='add'>+			if (!of_device_is_compatible(gchild, "pci1131,e101"))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			bus_devfn = netc_of_pci_get_bus_devfn(gchild);</div><div class='add'>+			if (bus_devfn &lt; 0)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			if (bus_devfn == IMX95_ENETC2_BUS_DEVFN)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			err = of_get_phy_mode(gchild, &amp;interface);</div><div class='add'>+			if (err)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			mii_proto = netc_get_link_mii_protocol(interface);</div><div class='add'>+			if (mii_proto &lt; 0)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			switch (bus_devfn) {</div><div class='add'>+			case IMX95_ENETC0_BUS_DEVFN:</div><div class='add'>+				val = u32_replace_bits(val, mii_proto,</div><div class='add'>+						       CFG_LINK_MII_PORT_0);</div><div class='add'>+				break;</div><div class='add'>+			case IMX95_ENETC1_BUS_DEVFN:</div><div class='add'>+				val = u32_replace_bits(val, mii_proto,</div><div class='add'>+						       CFG_LINK_MII_PORT_1);</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure Link I/O variant */</div><div class='add'>+	netc_reg_write(priv-&gt;netcmix, IMX95_CFG_LINK_IO_VAR,</div><div class='add'>+		       IO_VAR(2, IO_VAR_16FF_16G_SERDES));</div><div class='add'>+	/* Configure Link 2 PCS protocol */</div><div class='add'>+	netc_reg_write(priv-&gt;netcmix, IMX95_CFG_LINK_PCS_PROT(2),</div><div class='add'>+		       PCS_PROT_10G_SXGMII);</div><div class='add'>+	netc_reg_write(priv-&gt;netcmix, IMX95_CFG_LINK_MII_PROT, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx94_enetc_get_link_id(struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	int bus_devfn = netc_of_pci_get_bus_devfn(np);</div><div class='add'>+</div><div class='add'>+	/* Parse ENETC link number */</div><div class='add'>+	switch (bus_devfn) {</div><div class='add'>+	case IMX94_ENETC0_BUS_DEVFN:</div><div class='add'>+		return IMX94_ENETC0_LINK;</div><div class='add'>+	case IMX94_ENETC1_BUS_DEVFN:</div><div class='add'>+		return IMX94_ENETC1_LINK;</div><div class='add'>+	case IMX94_ENETC2_BUS_DEVFN:</div><div class='add'>+		return IMX94_ENETC2_LINK;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx94_link_config(struct netc_blk_ctrl *priv,</div><div class='add'>+			     struct device_node *np, int link_id)</div><div class='add'>+{</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	int mii_proto;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* The node may be disabled and does not have a 'phy-mode'</div><div class='add'>+	 * or 'phy-connection-type' property.</div><div class='add'>+	 */</div><div class='add'>+	if (of_get_phy_mode(np, &amp;interface))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mii_proto = netc_get_link_mii_protocol(interface);</div><div class='add'>+	if (mii_proto &lt; 0)</div><div class='add'>+		return mii_proto;</div><div class='add'>+</div><div class='add'>+	val = mii_proto &amp; NETC_LINK_CFG_MII_PROT;</div><div class='add'>+	if (val == MII_PROT_SERIAL)</div><div class='add'>+		val = u32_replace_bits(val, IO_VAR_16FF_16G_SERDES,</div><div class='add'>+				       NETC_LINK_CFG_IO_VAR);</div><div class='add'>+</div><div class='add'>+	netc_reg_write(priv-&gt;netcmix, IMX94_NETC_LINK_CFG(link_id), val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx94_enetc_link_config(struct netc_blk_ctrl *priv,</div><div class='add'>+				   struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	int link_id = imx94_enetc_get_link_id(np);</div><div class='add'>+</div><div class='add'>+	if (link_id &lt; 0)</div><div class='add'>+		return link_id;</div><div class='add'>+</div><div class='add'>+	return imx94_link_config(priv, np, link_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx94_netcmix_init(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct netc_blk_ctrl *priv = platform_get_drvdata(pdev);</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node_scoped(np, child) {</div><div class='add'>+		for_each_child_of_node_scoped(child, gchild) {</div><div class='add'>+			if (!of_device_is_compatible(gchild, "pci1131,e101"))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			err = imx94_enetc_link_config(priv, gchild);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* ENETC 0 and switch port 2 share the same parallel interface.</div><div class='add'>+	 * Currently, the switch is not supported, so this interface is</div><div class='add'>+	 * used by ENETC 0 by default.</div><div class='add'>+	 */</div><div class='add'>+	val = netc_reg_read(priv-&gt;netcmix, IMX94_EXT_PIN_CONTROL);</div><div class='add'>+	val |= MAC2_MAC3_SEL;</div><div class='add'>+	netc_reg_write(priv-&gt;netcmix, IMX94_EXT_PIN_CONTROL, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool netc_ierb_is_locked(struct netc_blk_ctrl *priv)</div><div class='add'>+{</div><div class='add'>+	return !!(netc_reg_read(priv-&gt;prb, PRB_NETCRR) &amp; NETCRR_LOCK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netc_lock_ierb(struct netc_blk_ctrl *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	netc_reg_write(priv-&gt;prb, PRB_NETCRR, NETCRR_LOCK);</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout(netc_reg_read, val, !(val &amp; NETCSR_STATE),</div><div class='add'>+				 100, 2000, false, priv-&gt;prb, PRB_NETCSR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netc_unlock_ierb_with_warm_reset(struct netc_blk_ctrl *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	netc_reg_write(priv-&gt;prb, PRB_NETCRR, 0);</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout(netc_reg_read, val, !(val &amp; NETCRR_LOCK),</div><div class='add'>+				 1000, 100000, true, priv-&gt;prb, PRB_NETCRR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netc_get_phy_addr(struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	struct device_node *mdio_node, *phy_node;</div><div class='add'>+	u32 addr = 0;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	mdio_node = of_get_child_by_name(np, "mdio");</div><div class='add'>+	if (!mdio_node)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	phy_node = of_get_next_child(mdio_node, NULL);</div><div class='add'>+	if (!phy_node)</div><div class='add'>+		goto of_put_mdio_node;</div><div class='add'>+</div><div class='add'>+	err = of_property_read_u32(phy_node, "reg", &amp;addr);</div><div class='add'>+	if (err)</div><div class='add'>+		goto of_put_phy_node;</div><div class='add'>+</div><div class='add'>+	if (addr &gt;= PHY_MAX_ADDR)</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+</div><div class='add'>+of_put_phy_node:</div><div class='add'>+	of_node_put(phy_node);</div><div class='add'>+</div><div class='add'>+of_put_mdio_node:</div><div class='add'>+	of_node_put(mdio_node);</div><div class='add'>+</div><div class='add'>+	return err ? err : addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netc_parse_emdio_phy_mask(struct device_node *np, u32 *phy_mask)</div><div class='add'>+{</div><div class='add'>+	u32 mask = 0;</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node_scoped(np, child) {</div><div class='add'>+		u32 addr;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = of_property_read_u32(child, "reg", &amp;addr);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (addr &gt;= PHY_MAX_ADDR)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		mask |= BIT(addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*phy_mask = mask;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netc_get_emdio_phy_mask(struct device_node *np, u32 *phy_mask)</div><div class='add'>+{</div><div class='add'>+	for_each_child_of_node_scoped(np, child) {</div><div class='add'>+		for_each_child_of_node_scoped(child, gchild) {</div><div class='add'>+			if (!of_device_is_compatible(gchild, "pci1131,ee00"))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			return netc_parse_emdio_phy_mask(gchild, phy_mask);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx95_enetc_mdio_phyaddr_config(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct netc_blk_ctrl *priv = platform_get_drvdata(pdev);</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	int bus_devfn, addr, err;</div><div class='add'>+	u32 phy_mask = 0;</div><div class='add'>+</div><div class='add'>+	err = netc_get_emdio_phy_mask(np, &amp;phy_mask);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to get PHY address mask\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update the port EMDIO PHY address through parsing phy properties.</div><div class='add'>+	 * This is needed when using the port EMDIO but it's harmless when</div><div class='add'>+	 * using the central EMDIO. So apply it on all cases.</div><div class='add'>+	 */</div><div class='add'>+	for_each_child_of_node_scoped(np, child) {</div><div class='add'>+		for_each_child_of_node_scoped(child, gchild) {</div><div class='add'>+			if (!of_device_is_compatible(gchild, "pci1131,e101"))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			bus_devfn = netc_of_pci_get_bus_devfn(gchild);</div><div class='add'>+			if (bus_devfn &lt; 0) {</div><div class='add'>+				dev_err(dev, "Failed to get BDF number\n");</div><div class='add'>+				return bus_devfn;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			addr = netc_get_phy_addr(gchild);</div><div class='add'>+			if (addr &lt; 0) {</div><div class='add'>+				dev_err(dev, "Failed to get PHY address\n");</div><div class='add'>+				return addr;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (phy_mask &amp; BIT(addr)) {</div><div class='add'>+				dev_err(dev,</div><div class='add'>+					"Find same PHY address in EMDIO and ENETC node\n");</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* The default value of LaBCR[MDIO_PHYAD_PRTAD ] is</div><div class='add'>+			 * 0, so no need to set the register.</div><div class='add'>+			 */</div><div class='add'>+			if (!addr)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			switch (bus_devfn) {</div><div class='add'>+			case IMX95_ENETC0_BUS_DEVFN:</div><div class='add'>+				netc_reg_write(priv-&gt;ierb, IERB_LBCR(0),</div><div class='add'>+					       LBCR_MDIO_PHYAD_PRTAD(addr));</div><div class='add'>+				break;</div><div class='add'>+			case IMX95_ENETC1_BUS_DEVFN:</div><div class='add'>+				netc_reg_write(priv-&gt;ierb, IERB_LBCR(1),</div><div class='add'>+					       LBCR_MDIO_PHYAD_PRTAD(addr));</div><div class='add'>+				break;</div><div class='add'>+			case IMX95_ENETC2_BUS_DEVFN:</div><div class='add'>+				netc_reg_write(priv-&gt;ierb, IERB_LBCR(2),</div><div class='add'>+					       LBCR_MDIO_PHYAD_PRTAD(addr));</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx95_ierb_init(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct netc_blk_ctrl *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	/* EMDIO : No MSI-X intterupt */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_EMDIOFAUXR, 0);</div><div class='add'>+	/* ENETC0 PF */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_EFAUXR(0), 0);</div><div class='add'>+	/* ENETC0 VF0 */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_VFAUXR(0), 1);</div><div class='add'>+	/* ENETC0 VF1 */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_VFAUXR(1), 2);</div><div class='add'>+	/* ENETC1 PF */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_EFAUXR(1), 3);</div><div class='add'>+	/* ENETC1 VF0 */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_VFAUXR(2), 5);</div><div class='add'>+	/* ENETC1 VF1 */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_VFAUXR(3), 6);</div><div class='add'>+	/* ENETC2 PF */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_EFAUXR(2), 4);</div><div class='add'>+	/* ENETC2 VF0 */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_VFAUXR(4), 5);</div><div class='add'>+	/* ENETC2 VF1 */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_VFAUXR(5), 6);</div><div class='add'>+	/* NETC TIMER */</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_T0FAUXR, 7);</div><div class='add'>+</div><div class='add'>+	return imx95_enetc_mdio_phyaddr_config(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx94_get_enetc_id(struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	int bus_devfn = netc_of_pci_get_bus_devfn(np);</div><div class='add'>+</div><div class='add'>+	/* Parse ENETC offset */</div><div class='add'>+	switch (bus_devfn) {</div><div class='add'>+	case IMX94_ENETC0_BUS_DEVFN:</div><div class='add'>+		return NETC_ENETC_ID(0);</div><div class='add'>+	case IMX94_ENETC1_BUS_DEVFN:</div><div class='add'>+		return NETC_ENETC_ID(1);</div><div class='add'>+	case IMX94_ENETC2_BUS_DEVFN:</div><div class='add'>+		return NETC_ENETC_ID(2);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx94_get_timer_id(struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	int bus_devfn = netc_of_pci_get_bus_devfn(np);</div><div class='add'>+</div><div class='add'>+	/* Parse NETC PTP timer ID, the timer0 is on bus 0,</div><div class='add'>+	 * the timer 1 and timer2 is on bus 1.</div><div class='add'>+	 */</div><div class='add'>+	switch (bus_devfn) {</div><div class='add'>+	case IMX94_TIMER0_BUS_DEVFN:</div><div class='add'>+		return NETC_TIMER_ID(0);</div><div class='add'>+	case IMX94_TIMER1_BUS_DEVFN:</div><div class='add'>+		return NETC_TIMER_ID(1);</div><div class='add'>+	case IMX94_TIMER2_BUS_DEVFN:</div><div class='add'>+		return NETC_TIMER_ID(2);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx94_enetc_update_tid(struct netc_blk_ctrl *priv,</div><div class='add'>+				  struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	struct device_node *timer_np;</div><div class='add'>+	int eid, tid;</div><div class='add'>+</div><div class='add'>+	eid = imx94_get_enetc_id(np);</div><div class='add'>+	if (eid &lt; 0) {</div><div class='add'>+		dev_err(dev, "Failed to get ENETC ID\n");</div><div class='add'>+		return eid;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	timer_np = of_parse_phandle(np, "ptp-timer", 0);</div><div class='add'>+	if (!timer_np) {</div><div class='add'>+		/* If 'ptp-timer' is not present, the timer1 is the default</div><div class='add'>+		 * timer of all standalone ENETCs, which is on the same PCIe</div><div class='add'>+		 * bus as these ENETCs.</div><div class='add'>+		 */</div><div class='add'>+		tid = NETC_TIMER_ID(1);</div><div class='add'>+		goto end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tid = imx94_get_timer_id(timer_np);</div><div class='add'>+	of_node_put(timer_np);</div><div class='add'>+	if (tid &lt; 0) {</div><div class='add'>+		dev_err(dev, "Failed to get NETC Timer ID\n");</div><div class='add'>+		return tid;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	netc_reg_write(priv-&gt;ierb, IERB_ETBCR(eid), tid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx94_enetc_mdio_phyaddr_config(struct netc_blk_ctrl *priv,</div><div class='add'>+					   struct device_node *np,</div><div class='add'>+					   u32 phy_mask)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	int bus_devfn, addr;</div><div class='add'>+</div><div class='add'>+	bus_devfn = netc_of_pci_get_bus_devfn(np);</div><div class='add'>+	if (bus_devfn &lt; 0) {</div><div class='add'>+		dev_err(dev, "Failed to get BDF number\n");</div><div class='add'>+		return bus_devfn;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	addr = netc_get_phy_addr(np);</div><div class='add'>+	if (addr &lt;= 0) {</div><div class='add'>+		dev_err(dev, "Failed to get PHY address\n");</div><div class='add'>+		return addr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_mask &amp; BIT(addr)) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Find same PHY address in EMDIO and ENETC node\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (bus_devfn) {</div><div class='add'>+	case IMX94_ENETC0_BUS_DEVFN:</div><div class='add'>+		netc_reg_write(priv-&gt;ierb, IERB_LBCR(IMX94_ENETC0_LINK),</div><div class='add'>+			       LBCR_MDIO_PHYAD_PRTAD(addr));</div><div class='add'>+		break;</div><div class='add'>+	case IMX94_ENETC1_BUS_DEVFN:</div><div class='add'>+		netc_reg_write(priv-&gt;ierb, IERB_LBCR(IMX94_ENETC1_LINK),</div><div class='add'>+			       LBCR_MDIO_PHYAD_PRTAD(addr));</div><div class='add'>+		break;</div><div class='add'>+	case IMX94_ENETC2_BUS_DEVFN:</div><div class='add'>+		netc_reg_write(priv-&gt;ierb, IERB_LBCR(IMX94_ENETC2_LINK),</div><div class='add'>+			       LBCR_MDIO_PHYAD_PRTAD(addr));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int imx94_ierb_init(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct netc_blk_ctrl *priv = platform_get_drvdata(pdev);</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	u32 phy_mask = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = netc_get_emdio_phy_mask(np, &amp;phy_mask);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to get PHY address mask\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node_scoped(np, child) {</div><div class='add'>+		for_each_child_of_node_scoped(child, gchild) {</div><div class='add'>+			if (!of_device_is_compatible(gchild, "pci1131,e101"))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			err = imx94_enetc_update_tid(priv, gchild);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+</div><div class='add'>+			err = imx94_enetc_mdio_phyaddr_config(priv, gchild,</div><div class='add'>+							      phy_mask);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netc_ierb_init(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct netc_blk_ctrl *priv = platform_get_drvdata(pdev);</div><div class='add'>+	const struct netc_devinfo *devinfo = priv-&gt;devinfo;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (netc_ierb_is_locked(priv)) {</div><div class='add'>+		err = netc_unlock_ierb_with_warm_reset(priv);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "Unlock IERB failed.\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (devinfo-&gt;ierb_init) {</div><div class='add'>+		err = devinfo-&gt;ierb_init(pdev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = netc_lock_ierb(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Lock IERB failed.\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_DEBUG_FS)</div><div class='add'>+static int netc_prb_show(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	struct netc_blk_ctrl *priv = s-&gt;private;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = netc_reg_read(priv-&gt;prb, PRB_NETCRR);</div><div class='add'>+	seq_printf(s, "[PRB NETCRR] Lock:%d SR:%d\n",</div><div class='add'>+		   (val &amp; NETCRR_LOCK) ? 1 : 0,</div><div class='add'>+		   (val &amp; NETCRR_SR) ? 1 : 0);</div><div class='add'>+</div><div class='add'>+	val = netc_reg_read(priv-&gt;prb, PRB_NETCSR);</div><div class='add'>+	seq_printf(s, "[PRB NETCSR] State:%d Error:%d\n",</div><div class='add'>+		   (val &amp; NETCSR_STATE) ? 1 : 0,</div><div class='add'>+		   (val &amp; NETCSR_ERROR) ? 1 : 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(netc_prb);</div><div class='add'>+</div><div class='add'>+static void netc_blk_ctrl_create_debugfs(struct netc_blk_ctrl *priv)</div><div class='add'>+{</div><div class='add'>+	struct dentry *root;</div><div class='add'>+</div><div class='add'>+	root = debugfs_create_dir("netc_blk_ctrl", NULL);</div><div class='add'>+	if (IS_ERR(root))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	priv-&gt;debugfs_root = root;</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("prb", 0444, root, priv, &amp;netc_prb_fops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void netc_blk_ctrl_remove_debugfs(struct netc_blk_ctrl *priv)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(priv-&gt;debugfs_root);</div><div class='add'>+	priv-&gt;debugfs_root = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static void netc_blk_ctrl_create_debugfs(struct netc_blk_ctrl *priv)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void netc_blk_ctrl_remove_debugfs(struct netc_blk_ctrl *priv)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int netc_prb_check_error(struct netc_blk_ctrl *priv)</div><div class='add'>+{</div><div class='add'>+	if (netc_reg_read(priv-&gt;prb, PRB_NETCSR) &amp; NETCSR_ERROR)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct netc_devinfo imx95_devinfo = {</div><div class='add'>+	.flags = NETC_HAS_NETCMIX,</div><div class='add'>+	.netcmix_init = imx95_netcmix_init,</div><div class='add'>+	.ierb_init = imx95_ierb_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct netc_devinfo imx94_devinfo = {</div><div class='add'>+	.flags = NETC_HAS_NETCMIX,</div><div class='add'>+	.netcmix_init = imx94_netcmix_init,</div><div class='add'>+	.ierb_init = imx94_ierb_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id netc_blk_ctrl_match[] = {</div><div class='add'>+	{ .compatible = "nxp,imx95-netc-blk-ctrl", .data = &amp;imx95_devinfo },</div><div class='add'>+	{ .compatible = "nxp,imx94-netc-blk-ctrl", .data = &amp;imx94_devinfo },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, netc_blk_ctrl_match);</div><div class='add'>+</div><div class='add'>+static int netc_blk_ctrl_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *node = pdev-&gt;dev.of_node;</div><div class='add'>+	const struct netc_devinfo *devinfo;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	const struct of_device_id *id;</div><div class='add'>+	struct netc_blk_ctrl *priv;</div><div class='add'>+	struct clk *ipg_clk;</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;pdev = pdev;</div><div class='add'>+	ipg_clk = devm_clk_get_optional_enabled(dev, "ipg");</div><div class='add'>+	if (IS_ERR(ipg_clk))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(ipg_clk),</div><div class='add'>+				     "Set ipg clock failed\n");</div><div class='add'>+</div><div class='add'>+	id = of_match_device(netc_blk_ctrl_match, dev);</div><div class='add'>+	if (!id)</div><div class='add'>+		return dev_err_probe(dev, -EINVAL, "Cannot match device\n");</div><div class='add'>+</div><div class='add'>+	devinfo = (struct netc_devinfo *)id-&gt;data;</div><div class='add'>+	if (!devinfo)</div><div class='add'>+		return dev_err_probe(dev, -EINVAL, "No device information\n");</div><div class='add'>+</div><div class='add'>+	priv-&gt;devinfo = devinfo;</div><div class='add'>+	regs = devm_platform_ioremap_resource_byname(pdev, "ierb");</div><div class='add'>+	if (IS_ERR(regs))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(regs),</div><div class='add'>+				     "Missing IERB resource\n");</div><div class='add'>+</div><div class='add'>+	priv-&gt;ierb = regs;</div><div class='add'>+	regs = devm_platform_ioremap_resource_byname(pdev, "prb");</div><div class='add'>+	if (IS_ERR(regs))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(regs),</div><div class='add'>+				     "Missing PRB resource\n");</div><div class='add'>+</div><div class='add'>+	priv-&gt;prb = regs;</div><div class='add'>+	if (devinfo-&gt;flags &amp; NETC_HAS_NETCMIX) {</div><div class='add'>+		regs = devm_platform_ioremap_resource_byname(pdev, "netcmix");</div><div class='add'>+		if (IS_ERR(regs))</div><div class='add'>+			return dev_err_probe(dev, PTR_ERR(regs),</div><div class='add'>+					     "Missing NETCMIX resource\n");</div><div class='add'>+		priv-&gt;netcmix = regs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, priv);</div><div class='add'>+	if (devinfo-&gt;netcmix_init) {</div><div class='add'>+		err = devinfo-&gt;netcmix_init(pdev);</div><div class='add'>+		if (err)</div><div class='add'>+			return dev_err_probe(dev, err,</div><div class='add'>+					     "Initializing NETCMIX failed\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = netc_ierb_init(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(dev, err, "Initializing IERB failed\n");</div><div class='add'>+</div><div class='add'>+	if (netc_prb_check_error(priv) &lt; 0)</div><div class='add'>+		dev_warn(dev, "The current IERB configuration is invalid\n");</div><div class='add'>+</div><div class='add'>+	netc_blk_ctrl_create_debugfs(priv);</div><div class='add'>+</div><div class='add'>+	err = of_platform_populate(node, NULL, NULL, dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netc_blk_ctrl_remove_debugfs(priv);</div><div class='add'>+		return dev_err_probe(dev, err, "of_platform_populate failed\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void netc_blk_ctrl_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct netc_blk_ctrl *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	of_platform_depopulate(&amp;pdev-&gt;dev);</div><div class='add'>+	netc_blk_ctrl_remove_debugfs(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver netc_blk_ctrl_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "nxp-netc-blk-ctrl",</div><div class='add'>+		.of_match_table = netc_blk_ctrl_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = netc_blk_ctrl_probe,</div><div class='add'>+	.remove = netc_blk_ctrl_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(netc_blk_ctrl_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("NXP NETC Blocks Control Driver");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/ntmp.c b/drivers/net/ethernet/freescale/enetc/ntmp.c<br/>new file mode 100644<br/>index 000000000000..0c1d343253bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/ntmp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/ntmp.c</a></div><div class='hunk'>@@ -0,0 +1,457 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * NETC NTMP (NETC Table Management Protocol) 2.0 Library</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/fsl/netc_global.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ntmp_private.h"</div><div class='add'>+</div><div class='add'>+#define NETC_CBDR_TIMEOUT		1000 /* us */</div><div class='add'>+#define NETC_CBDR_DELAY_US		10</div><div class='add'>+#define NETC_CBDR_MR_EN			BIT(31)</div><div class='add'>+</div><div class='add'>+#define NTMP_BASE_ADDR_ALIGN		128</div><div class='add'>+#define NTMP_DATA_ADDR_ALIGN		32</div><div class='add'>+</div><div class='add'>+/* Define NTMP Table ID */</div><div class='add'>+#define NTMP_MAFT_ID			1</div><div class='add'>+#define NTMP_RSST_ID			3</div><div class='add'>+</div><div class='add'>+/* Generic Update Actions for most tables */</div><div class='add'>+#define NTMP_GEN_UA_CFGEU		BIT(0)</div><div class='add'>+#define NTMP_GEN_UA_STSEU		BIT(1)</div><div class='add'>+</div><div class='add'>+#define NTMP_ENTRY_ID_SIZE		4</div><div class='add'>+#define RSST_ENTRY_NUM			64</div><div class='add'>+#define RSST_STSE_DATA_SIZE(n)		((n) * 8)</div><div class='add'>+#define RSST_CFGE_DATA_SIZE(n)		(n)</div><div class='add'>+</div><div class='add'>+int ntmp_init_cbdr(struct netc_cbdr *cbdr, struct device *dev,</div><div class='add'>+		   const struct netc_cbdr_regs *regs)</div><div class='add'>+{</div><div class='add'>+	int cbd_num = NETC_CBDR_BD_NUM;</div><div class='add'>+	size_t size;</div><div class='add'>+</div><div class='add'>+	size = cbd_num * sizeof(union netc_cbd) + NTMP_BASE_ADDR_ALIGN;</div><div class='add'>+	cbdr-&gt;addr_base = dma_alloc_coherent(dev, size, &amp;cbdr-&gt;dma_base,</div><div class='add'>+					     GFP_KERNEL);</div><div class='add'>+	if (!cbdr-&gt;addr_base)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cbdr-&gt;dma_size = size;</div><div class='add'>+	cbdr-&gt;bd_num = cbd_num;</div><div class='add'>+	cbdr-&gt;regs = *regs;</div><div class='add'>+	cbdr-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	/* The base address of the Control BD Ring must be 128 bytes aligned */</div><div class='add'>+	cbdr-&gt;dma_base_align =  ALIGN(cbdr-&gt;dma_base,  NTMP_BASE_ADDR_ALIGN);</div><div class='add'>+	cbdr-&gt;addr_base_align = PTR_ALIGN(cbdr-&gt;addr_base,</div><div class='add'>+					  NTMP_BASE_ADDR_ALIGN);</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;cbdr-&gt;ring_lock);</div><div class='add'>+</div><div class='add'>+	cbdr-&gt;next_to_use = netc_read(cbdr-&gt;regs.pir);</div><div class='add'>+	cbdr-&gt;next_to_clean = netc_read(cbdr-&gt;regs.cir);</div><div class='add'>+</div><div class='add'>+	/* Step 1: Configure the base address of the Control BD Ring */</div><div class='add'>+	netc_write(cbdr-&gt;regs.bar0, lower_32_bits(cbdr-&gt;dma_base_align));</div><div class='add'>+	netc_write(cbdr-&gt;regs.bar1, upper_32_bits(cbdr-&gt;dma_base_align));</div><div class='add'>+</div><div class='add'>+	/* Step 2: Configure the number of BDs of the Control BD Ring */</div><div class='add'>+	netc_write(cbdr-&gt;regs.lenr, cbdr-&gt;bd_num);</div><div class='add'>+</div><div class='add'>+	/* Step 3: Enable the Control BD Ring */</div><div class='add'>+	netc_write(cbdr-&gt;regs.mr, NETC_CBDR_MR_EN);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ntmp_init_cbdr);</div><div class='add'>+</div><div class='add'>+void ntmp_free_cbdr(struct netc_cbdr *cbdr)</div><div class='add'>+{</div><div class='add'>+	/* Disable the Control BD Ring */</div><div class='add'>+	netc_write(cbdr-&gt;regs.mr, 0);</div><div class='add'>+	dma_free_coherent(cbdr-&gt;dev, cbdr-&gt;dma_size, cbdr-&gt;addr_base,</div><div class='add'>+			  cbdr-&gt;dma_base);</div><div class='add'>+	memset(cbdr, 0, sizeof(*cbdr));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ntmp_free_cbdr);</div><div class='add'>+</div><div class='add'>+static int ntmp_get_free_cbd_num(struct netc_cbdr *cbdr)</div><div class='add'>+{</div><div class='add'>+	return (cbdr-&gt;next_to_clean - cbdr-&gt;next_to_use - 1 +</div><div class='add'>+		cbdr-&gt;bd_num) % cbdr-&gt;bd_num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static union netc_cbd *ntmp_get_cbd(struct netc_cbdr *cbdr, int index)</div><div class='add'>+{</div><div class='add'>+	return &amp;((union netc_cbd *)(cbdr-&gt;addr_base_align))[index];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ntmp_clean_cbdr(struct netc_cbdr *cbdr)</div><div class='add'>+{</div><div class='add'>+	union netc_cbd *cbd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	i = cbdr-&gt;next_to_clean;</div><div class='add'>+	while (netc_read(cbdr-&gt;regs.cir) != i) {</div><div class='add'>+		cbd = ntmp_get_cbd(cbdr, i);</div><div class='add'>+		memset(cbd, 0, sizeof(*cbd));</div><div class='add'>+		i = (i + 1) % cbdr-&gt;bd_num;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cbdr-&gt;next_to_clean = i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netc_xmit_ntmp_cmd(struct ntmp_user *user, union netc_cbd *cbd)</div><div class='add'>+{</div><div class='add'>+	union netc_cbd *cur_cbd;</div><div class='add'>+	struct netc_cbdr *cbdr;</div><div class='add'>+	int i, err;</div><div class='add'>+	u16 status;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Currently only i.MX95 ENETC is supported, and it only has one</div><div class='add'>+	 * command BD ring</div><div class='add'>+	 */</div><div class='add'>+	cbdr = &amp;user-&gt;ring[0];</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;cbdr-&gt;ring_lock);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!ntmp_get_free_cbd_num(cbdr)))</div><div class='add'>+		ntmp_clean_cbdr(cbdr);</div><div class='add'>+</div><div class='add'>+	i = cbdr-&gt;next_to_use;</div><div class='add'>+	cur_cbd = ntmp_get_cbd(cbdr, i);</div><div class='add'>+	*cur_cbd = *cbd;</div><div class='add'>+	dma_wmb();</div><div class='add'>+</div><div class='add'>+	/* Update producer index of both software and hardware */</div><div class='add'>+	i = (i + 1) % cbdr-&gt;bd_num;</div><div class='add'>+	cbdr-&gt;next_to_use = i;</div><div class='add'>+	netc_write(cbdr-&gt;regs.pir, i);</div><div class='add'>+</div><div class='add'>+	err = read_poll_timeout_atomic(netc_read, val, val == i,</div><div class='add'>+				       NETC_CBDR_DELAY_US, NETC_CBDR_TIMEOUT,</div><div class='add'>+				       true, cbdr-&gt;regs.cir);</div><div class='add'>+	if (unlikely(err))</div><div class='add'>+		goto cbdr_unlock;</div><div class='add'>+</div><div class='add'>+	dma_rmb();</div><div class='add'>+	/* Get the writeback command BD, because the caller may need</div><div class='add'>+	 * to check some other fields of the response header.</div><div class='add'>+	 */</div><div class='add'>+	*cbd = *cur_cbd;</div><div class='add'>+</div><div class='add'>+	/* Check the writeback error status */</div><div class='add'>+	status = le16_to_cpu(cbd-&gt;resp_hdr.error_rr) &amp; NTMP_RESP_ERROR;</div><div class='add'>+	if (unlikely(status)) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		dev_err(user-&gt;dev, "Command BD error: 0x%04x\n", status);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ntmp_clean_cbdr(cbdr);</div><div class='add'>+	dma_wmb();</div><div class='add'>+</div><div class='add'>+cbdr_unlock:</div><div class='add'>+	spin_unlock_bh(&amp;cbdr-&gt;ring_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ntmp_alloc_data_mem(struct ntmp_dma_buf *data, void **buf_align)</div><div class='add'>+{</div><div class='add'>+	void *buf;</div><div class='add'>+</div><div class='add'>+	buf = dma_alloc_coherent(data-&gt;dev, data-&gt;size + NTMP_DATA_ADDR_ALIGN,</div><div class='add'>+				 &amp;data-&gt;dma, GFP_KERNEL);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	data-&gt;buf = buf;</div><div class='add'>+	*buf_align = PTR_ALIGN(buf, NTMP_DATA_ADDR_ALIGN);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ntmp_free_data_mem(struct ntmp_dma_buf *data)</div><div class='add'>+{</div><div class='add'>+	dma_free_coherent(data-&gt;dev, data-&gt;size + NTMP_DATA_ADDR_ALIGN,</div><div class='add'>+			  data-&gt;buf, data-&gt;dma);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ntmp_fill_request_hdr(union netc_cbd *cbd, dma_addr_t dma,</div><div class='add'>+				  int len, int table_id, int cmd,</div><div class='add'>+				  int access_method)</div><div class='add'>+{</div><div class='add'>+	dma_addr_t dma_align;</div><div class='add'>+</div><div class='add'>+	memset(cbd, 0, sizeof(*cbd));</div><div class='add'>+	dma_align = ALIGN(dma, NTMP_DATA_ADDR_ALIGN);</div><div class='add'>+	cbd-&gt;req_hdr.addr = cpu_to_le64(dma_align);</div><div class='add'>+	cbd-&gt;req_hdr.len = cpu_to_le32(len);</div><div class='add'>+	cbd-&gt;req_hdr.cmd = cmd;</div><div class='add'>+	cbd-&gt;req_hdr.access_method = FIELD_PREP(NTMP_ACCESS_METHOD,</div><div class='add'>+						access_method);</div><div class='add'>+	cbd-&gt;req_hdr.table_id = table_id;</div><div class='add'>+	cbd-&gt;req_hdr.ver_cci_rr = FIELD_PREP(NTMP_HDR_VERSION,</div><div class='add'>+					     NTMP_HDR_VER2);</div><div class='add'>+	/* For NTMP version 2.0 or later version */</div><div class='add'>+	cbd-&gt;req_hdr.npf = cpu_to_le32(NTMP_NPF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ntmp_fill_crd(struct ntmp_cmn_req_data *crd, u8 tblv,</div><div class='add'>+			  u8 qa, u16 ua)</div><div class='add'>+{</div><div class='add'>+	crd-&gt;update_act = cpu_to_le16(ua);</div><div class='add'>+	crd-&gt;tblv_qact = NTMP_TBLV_QACT(tblv, qa);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ntmp_fill_crd_eid(struct ntmp_req_by_eid *rbe, u8 tblv,</div><div class='add'>+			      u8 qa, u16 ua, u32 entry_id)</div><div class='add'>+{</div><div class='add'>+	ntmp_fill_crd(&amp;rbe-&gt;crd, tblv, qa, ua);</div><div class='add'>+	rbe-&gt;entry_id = cpu_to_le32(entry_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *ntmp_table_name(int tbl_id)</div><div class='add'>+{</div><div class='add'>+	switch (tbl_id) {</div><div class='add'>+	case NTMP_MAFT_ID:</div><div class='add'>+		return "MAC Address Filter Table";</div><div class='add'>+	case NTMP_RSST_ID:</div><div class='add'>+		return "RSS Table";</div><div class='add'>+	default:</div><div class='add'>+		return "Unknown Table";</div><div class='add'>+	};</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ntmp_delete_entry_by_id(struct ntmp_user *user, int tbl_id,</div><div class='add'>+				   u8 tbl_ver, u32 entry_id, u32 req_len,</div><div class='add'>+				   u32 resp_len)</div><div class='add'>+{</div><div class='add'>+	struct ntmp_dma_buf data = {</div><div class='add'>+		.dev = user-&gt;dev,</div><div class='add'>+		.size = max(req_len, resp_len),</div><div class='add'>+	};</div><div class='add'>+	struct ntmp_req_by_eid *req;</div><div class='add'>+	union netc_cbd cbd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ntmp_alloc_data_mem(&amp;data, (void **)&amp;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ntmp_fill_crd_eid(req, tbl_ver, 0, 0, entry_id);</div><div class='add'>+	ntmp_fill_request_hdr(&amp;cbd, data.dma, NTMP_LEN(req_len, resp_len),</div><div class='add'>+			      tbl_id, NTMP_CMD_DELETE, NTMP_AM_ENTRY_ID);</div><div class='add'>+</div><div class='add'>+	err = netc_xmit_ntmp_cmd(user, &amp;cbd);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(user-&gt;dev,</div><div class='add'>+			"Failed to delete entry 0x%x of %s, err: %pe",</div><div class='add'>+			entry_id, ntmp_table_name(tbl_id), ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	ntmp_free_data_mem(&amp;data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ntmp_query_entry_by_id(struct ntmp_user *user, int tbl_id,</div><div class='add'>+				  u32 len, struct ntmp_req_by_eid *req,</div><div class='add'>+				  dma_addr_t dma, bool compare_eid)</div><div class='add'>+{</div><div class='add'>+	struct ntmp_cmn_resp_query *resp;</div><div class='add'>+	int cmd = NTMP_CMD_QUERY;</div><div class='add'>+	union netc_cbd cbd;</div><div class='add'>+	u32 entry_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	entry_id = le32_to_cpu(req-&gt;entry_id);</div><div class='add'>+	if (le16_to_cpu(req-&gt;crd.update_act))</div><div class='add'>+		cmd = NTMP_CMD_QU;</div><div class='add'>+</div><div class='add'>+	/* Request header */</div><div class='add'>+	ntmp_fill_request_hdr(&amp;cbd, dma, len, tbl_id, cmd, NTMP_AM_ENTRY_ID);</div><div class='add'>+	err = netc_xmit_ntmp_cmd(user, &amp;cbd);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(user-&gt;dev,</div><div class='add'>+			"Failed to query entry 0x%x of %s, err: %pe\n",</div><div class='add'>+			entry_id, ntmp_table_name(tbl_id), ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* For a few tables, the first field of their response data is not</div><div class='add'>+	 * entry_id, so directly return success.</div><div class='add'>+	 */</div><div class='add'>+	if (!compare_eid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	resp = (struct ntmp_cmn_resp_query *)req;</div><div class='add'>+	if (unlikely(le32_to_cpu(resp-&gt;entry_id) != entry_id)) {</div><div class='add'>+		dev_err(user-&gt;dev,</div><div class='add'>+			"%s: query EID 0x%x doesn't match response EID 0x%x\n",</div><div class='add'>+			ntmp_table_name(tbl_id), entry_id, le32_to_cpu(resp-&gt;entry_id));</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ntmp_maft_add_entry(struct ntmp_user *user, u32 entry_id,</div><div class='add'>+			struct maft_entry_data *maft)</div><div class='add'>+{</div><div class='add'>+	struct ntmp_dma_buf data = {</div><div class='add'>+		.dev = user-&gt;dev,</div><div class='add'>+		.size = sizeof(struct maft_req_add),</div><div class='add'>+	};</div><div class='add'>+	struct maft_req_add *req;</div><div class='add'>+	union netc_cbd cbd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ntmp_alloc_data_mem(&amp;data, (void **)&amp;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Set mac address filter table request data buffer */</div><div class='add'>+	ntmp_fill_crd_eid(&amp;req-&gt;rbe, user-&gt;tbl.maft_ver, 0, 0, entry_id);</div><div class='add'>+	req-&gt;keye = maft-&gt;keye;</div><div class='add'>+	req-&gt;cfge = maft-&gt;cfge;</div><div class='add'>+</div><div class='add'>+	ntmp_fill_request_hdr(&amp;cbd, data.dma, NTMP_LEN(data.size, 0),</div><div class='add'>+			      NTMP_MAFT_ID, NTMP_CMD_ADD, NTMP_AM_ENTRY_ID);</div><div class='add'>+	err = netc_xmit_ntmp_cmd(user, &amp;cbd);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(user-&gt;dev, "Failed to add MAFT entry 0x%x, err: %pe\n",</div><div class='add'>+			entry_id, ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	ntmp_free_data_mem(&amp;data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ntmp_maft_add_entry);</div><div class='add'>+</div><div class='add'>+int ntmp_maft_query_entry(struct ntmp_user *user, u32 entry_id,</div><div class='add'>+			  struct maft_entry_data *maft)</div><div class='add'>+{</div><div class='add'>+	struct ntmp_dma_buf data = {</div><div class='add'>+		.dev = user-&gt;dev,</div><div class='add'>+		.size = sizeof(struct maft_resp_query),</div><div class='add'>+	};</div><div class='add'>+	struct maft_resp_query *resp;</div><div class='add'>+	struct ntmp_req_by_eid *req;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ntmp_alloc_data_mem(&amp;data, (void **)&amp;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ntmp_fill_crd_eid(req, user-&gt;tbl.maft_ver, 0, 0, entry_id);</div><div class='add'>+	err = ntmp_query_entry_by_id(user, NTMP_MAFT_ID,</div><div class='add'>+				     NTMP_LEN(sizeof(*req), data.size),</div><div class='add'>+				     req, data.dma, true);</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	resp = (struct maft_resp_query *)req;</div><div class='add'>+	maft-&gt;keye = resp-&gt;keye;</div><div class='add'>+	maft-&gt;cfge = resp-&gt;cfge;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	ntmp_free_data_mem(&amp;data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ntmp_maft_query_entry);</div><div class='add'>+</div><div class='add'>+int ntmp_maft_delete_entry(struct ntmp_user *user, u32 entry_id)</div><div class='add'>+{</div><div class='add'>+	return ntmp_delete_entry_by_id(user, NTMP_MAFT_ID, user-&gt;tbl.maft_ver,</div><div class='add'>+				       entry_id, NTMP_EID_REQ_LEN, 0);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ntmp_maft_delete_entry);</div><div class='add'>+</div><div class='add'>+int ntmp_rsst_update_entry(struct ntmp_user *user, const u32 *table,</div><div class='add'>+			   int count)</div><div class='add'>+{</div><div class='add'>+	struct ntmp_dma_buf data = {.dev = user-&gt;dev};</div><div class='add'>+	struct rsst_req_update *req;</div><div class='add'>+	union netc_cbd cbd;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	if (count != RSST_ENTRY_NUM)</div><div class='add'>+		/* HW only takes in a full 64 entry table */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	data.size = struct_size(req, groups, count);</div><div class='add'>+	err = ntmp_alloc_data_mem(&amp;data, (void **)&amp;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Set the request data buffer */</div><div class='add'>+	ntmp_fill_crd_eid(&amp;req-&gt;rbe, user-&gt;tbl.rsst_ver, 0,</div><div class='add'>+			  NTMP_GEN_UA_CFGEU | NTMP_GEN_UA_STSEU, 0);</div><div class='add'>+	for (i = 0; i &lt; count; i++)</div><div class='add'>+		req-&gt;groups[i] = (u8)(table[i]);</div><div class='add'>+</div><div class='add'>+	ntmp_fill_request_hdr(&amp;cbd, data.dma, NTMP_LEN(data.size, 0),</div><div class='add'>+			      NTMP_RSST_ID, NTMP_CMD_UPDATE, NTMP_AM_ENTRY_ID);</div><div class='add'>+</div><div class='add'>+	err = netc_xmit_ntmp_cmd(user, &amp;cbd);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(user-&gt;dev, "Failed to update RSST entry, err: %pe\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	ntmp_free_data_mem(&amp;data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ntmp_rsst_update_entry);</div><div class='add'>+</div><div class='add'>+int ntmp_rsst_query_entry(struct ntmp_user *user, u32 *table, int count)</div><div class='add'>+{</div><div class='add'>+	struct ntmp_dma_buf data = {.dev = user-&gt;dev};</div><div class='add'>+	struct ntmp_req_by_eid *req;</div><div class='add'>+	union netc_cbd cbd;</div><div class='add'>+	int err, i;</div><div class='add'>+	u8 *group;</div><div class='add'>+</div><div class='add'>+	if (count != RSST_ENTRY_NUM)</div><div class='add'>+		/* HW only takes in a full 64 entry table */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	data.size = NTMP_ENTRY_ID_SIZE + RSST_STSE_DATA_SIZE(count) +</div><div class='add'>+		    RSST_CFGE_DATA_SIZE(count);</div><div class='add'>+	err = ntmp_alloc_data_mem(&amp;data, (void **)&amp;req);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Set the request data buffer */</div><div class='add'>+	ntmp_fill_crd_eid(req, user-&gt;tbl.rsst_ver, 0, 0, 0);</div><div class='add'>+	ntmp_fill_request_hdr(&amp;cbd, data.dma, NTMP_LEN(sizeof(*req), data.size),</div><div class='add'>+			      NTMP_RSST_ID, NTMP_CMD_QUERY, NTMP_AM_ENTRY_ID);</div><div class='add'>+	err = netc_xmit_ntmp_cmd(user, &amp;cbd);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(user-&gt;dev, "Failed to query RSST entry, err: %pe\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+		goto end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	group = (u8 *)req;</div><div class='add'>+	group += NTMP_ENTRY_ID_SIZE + RSST_STSE_DATA_SIZE(count);</div><div class='add'>+	for (i = 0; i &lt; count; i++)</div><div class='add'>+		table[i] = group[i];</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	ntmp_free_data_mem(&amp;data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ntmp_rsst_query_entry);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("NXP NETC Library");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/enetc/ntmp_private.h b/drivers/net/ethernet/freescale/enetc/ntmp_private.h<br/>new file mode 100644<br/>index 000000000000..34394e40fddd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/enetc/ntmp_private.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/enetc/ntmp_private.h</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */</div><div class='add'>+/*</div><div class='add'>+ * NTMP table request and response data buffer formats</div><div class='add'>+ * Copyright 2025 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __NTMP_PRIVATE_H</div><div class='add'>+#define __NTMP_PRIVATE_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/fsl/ntmp.h&gt;</div><div class='add'>+</div><div class='add'>+#define NTMP_EID_REQ_LEN	8</div><div class='add'>+#define NETC_CBDR_BD_NUM	256</div><div class='add'>+</div><div class='add'>+union netc_cbd {</div><div class='add'>+	struct {</div><div class='add'>+		__le64 addr;</div><div class='add'>+		__le32 len;</div><div class='add'>+#define NTMP_RESP_LEN		GENMASK(19, 0)</div><div class='add'>+#define NTMP_REQ_LEN		GENMASK(31, 20)</div><div class='add'>+#define NTMP_LEN(req, resp)	(FIELD_PREP(NTMP_REQ_LEN, (req)) | \</div><div class='add'>+				((resp) &amp; NTMP_RESP_LEN))</div><div class='add'>+		u8 cmd;</div><div class='add'>+#define NTMP_CMD_DELETE		BIT(0)</div><div class='add'>+#define NTMP_CMD_UPDATE		BIT(1)</div><div class='add'>+#define NTMP_CMD_QUERY		BIT(2)</div><div class='add'>+#define NTMP_CMD_ADD		BIT(3)</div><div class='add'>+#define NTMP_CMD_QU		(NTMP_CMD_QUERY | NTMP_CMD_UPDATE)</div><div class='add'>+		u8 access_method;</div><div class='add'>+#define NTMP_ACCESS_METHOD	GENMASK(7, 4)</div><div class='add'>+#define NTMP_AM_ENTRY_ID	0</div><div class='add'>+#define NTMP_AM_EXACT_KEY	1</div><div class='add'>+#define NTMP_AM_SEARCH		2</div><div class='add'>+#define NTMP_AM_TERNARY_KEY	3</div><div class='add'>+		u8 table_id;</div><div class='add'>+		u8 ver_cci_rr;</div><div class='add'>+#define NTMP_HDR_VERSION	GENMASK(5, 0)</div><div class='add'>+#define NTMP_HDR_VER2		2</div><div class='add'>+#define NTMP_CCI		BIT(6)</div><div class='add'>+#define NTMP_RR			BIT(7)</div><div class='add'>+		__le32 resv[3];</div><div class='add'>+		__le32 npf;</div><div class='add'>+#define NTMP_NPF		BIT(15)</div><div class='add'>+	} req_hdr;	/* NTMP Request Message Header Format */</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		__le32 resv0[3];</div><div class='add'>+		__le16 num_matched;</div><div class='add'>+		__le16 error_rr;</div><div class='add'>+#define NTMP_RESP_ERROR		GENMASK(11, 0)</div><div class='add'>+#define NTMP_RESP_RR		BIT(15)</div><div class='add'>+		__le32 resv1[4];</div><div class='add'>+	} resp_hdr; /* NTMP Response Message Header Format */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ntmp_dma_buf {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	size_t size;</div><div class='add'>+	void *buf;</div><div class='add'>+	dma_addr_t dma;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ntmp_cmn_req_data {</div><div class='add'>+	__le16 update_act;</div><div class='add'>+	u8 dbg_opt;</div><div class='add'>+	u8 tblv_qact;</div><div class='add'>+#define NTMP_QUERY_ACT		GENMASK(3, 0)</div><div class='add'>+#define NTMP_TBL_VER		GENMASK(7, 4)</div><div class='add'>+#define NTMP_TBLV_QACT(v, a)	(FIELD_PREP(NTMP_TBL_VER, (v)) | \</div><div class='add'>+				 ((a) &amp; NTMP_QUERY_ACT))</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ntmp_cmn_resp_query {</div><div class='add'>+	__le32 entry_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Generic structure for request data by entry ID  */</div><div class='add'>+struct ntmp_req_by_eid {</div><div class='add'>+	struct ntmp_cmn_req_data crd;</div><div class='add'>+	__le32 entry_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MAC Address Filter Table Request Data Buffer Format of Add action */</div><div class='add'>+struct maft_req_add {</div><div class='add'>+	struct ntmp_req_by_eid rbe;</div><div class='add'>+	struct maft_keye_data keye;</div><div class='add'>+	struct maft_cfge_data cfge;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MAC Address Filter Table Response Data Buffer Format of Query action */</div><div class='add'>+struct maft_resp_query {</div><div class='add'>+	__le32 entry_id;</div><div class='add'>+	struct maft_keye_data keye;</div><div class='add'>+	struct maft_cfge_data cfge;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RSS Table Request Data Buffer Format of Update action */</div><div class='add'>+struct rsst_req_update {</div><div class='add'>+	struct ntmp_req_by_eid rbe;</div><div class='add'>+	u8 groups[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fec.h b/drivers/net/ethernet/freescale/fec.h<br/>index 1cca0425d493..fd9a93d02f8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fec.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fec.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fec.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/fec.h</a></div><div class='hunk'>@@ -14,19 +14,17 @@</div><div class='ctx'> #define	FEC_H</div><div class='ctx'> /****************************************************************************/</div><div class='ctx'> </div><div class='add'>+#include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+#include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/clocksource.h&gt;</div><div class='add'>+#include &lt;linux/firmware/imx/sci.h&gt;</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/pm_qos.h&gt;</div><div class='del'>-#include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='ctx'> #include &lt;linux/timecounter.h&gt;</div><div class='del'>-#include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='del'>-#include &lt;linux/firmware/imx/sci.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \</div><div class='del'>-    defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM) || \</div><div class='del'>-    defined(CONFIG_ARM64) || defined(CONFIG_COMPILE_TEST)</div><div class='add'>+#if !defined(CONFIG_M5272) || defined(CONFIG_COMPILE_TEST)</div><div class='ctx'> /*</div><div class='ctx'>  *	Just figures, Motorola would have to change the offsets for</div><div class='ctx'>  *	registers in the same peripheral device on different models</div><div class='hunk'>@@ -115,7 +113,7 @@</div><div class='ctx'> #define IEEE_T_MCOL		0x254 /* Frames tx'd with multiple collision */</div><div class='ctx'> #define IEEE_T_DEF		0x258 /* Frames tx'd after deferral delay */</div><div class='ctx'> #define IEEE_T_LCOL		0x25c /* Frames tx'd with late collision */</div><div class='del'>-#define IEEE_T_EXCOL		0x260 /* Frames tx'd with excesv collisions */</div><div class='add'>+#define IEEE_T_EXCOL		0x260 /* Frames tx'd with excessive collisions */</div><div class='ctx'> #define IEEE_T_MACERR		0x264 /* Frames tx'd with TX FIFO underrun */</div><div class='ctx'> #define IEEE_T_CSERR		0x268 /* Frames tx'd with carrier sense err */</div><div class='ctx'> #define IEEE_T_SQE		0x26c /* Frames tx'd with SQE err */</div><div class='hunk'>@@ -242,23 +240,6 @@ struct bufdesc_ex {</div><div class='ctx'> 	__fec16 res0[4];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- *	The following definitions courtesy of commproc.h, which where</div><div class='del'>- *	Copyright (c) 1997 Dan Malek (dmalek@jlc.net).</div><div class='del'>- */</div><div class='del'>-#define BD_SC_EMPTY	((ushort)0x8000)	/* Receive is empty */</div><div class='del'>-#define BD_SC_READY	((ushort)0x8000)	/* Transmit is ready */</div><div class='del'>-#define BD_SC_WRAP	((ushort)0x2000)	/* Last buffer descriptor */</div><div class='del'>-#define BD_SC_INTRPT	((ushort)0x1000)	/* Interrupt on change */</div><div class='del'>-#define BD_SC_CM	((ushort)0x0200)	/* Continuous mode */</div><div class='del'>-#define BD_SC_ID	((ushort)0x0100)	/* Rec'd too many idles */</div><div class='del'>-#define BD_SC_P		((ushort)0x0100)	/* xmt preamble */</div><div class='del'>-#define BD_SC_BR	((ushort)0x0020)	/* Break received */</div><div class='del'>-#define BD_SC_FR	((ushort)0x0010)	/* Framing error */</div><div class='del'>-#define BD_SC_PR	((ushort)0x0008)	/* Parity error */</div><div class='del'>-#define BD_SC_OV	((ushort)0x0002)	/* Overrun */</div><div class='del'>-#define BD_SC_CD	((ushort)0x0001)	/* ?? */</div><div class='del'>-</div><div class='ctx'> /* Buffer descriptor control/status used by Ethernet receive.</div><div class='ctx'>  */</div><div class='ctx'> #define BD_ENET_RX_EMPTY	((ushort)0x8000)</div><div class='hunk'>@@ -342,16 +323,17 @@ struct bufdesc_ex {</div><div class='ctx'> #define FEC_TX_BD_FTYPE(X)	(((X) &amp; 0xf) &lt;&lt; 20)</div><div class='ctx'> </div><div class='ctx'> /* The number of Tx and Rx buffers.  These are allocated from the page</div><div class='del'>- * pool.  The code may assume these are power of two, so it it best</div><div class='add'>+ * pool.  The code may assume these are power of two, so it is best</div><div class='ctx'>  * to keep them that size.</div><div class='ctx'>  * We don't need to allocate pages for the transmitter.  We just use</div><div class='ctx'>  * the skbuffer directly.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define FEC_DRV_RESERVE_SPACE (XDP_PACKET_HEADROOM + \</div><div class='add'>+		SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))</div><div class='ctx'> #define FEC_ENET_XDP_HEADROOM	(XDP_PACKET_HEADROOM)</div><div class='ctx'> #define FEC_ENET_RX_PAGES	256</div><div class='del'>-#define FEC_ENET_RX_FRSIZE	(PAGE_SIZE - FEC_ENET_XDP_HEADROOM \</div><div class='del'>-		- SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))</div><div class='add'>+#define FEC_ENET_RX_FRSIZE	(PAGE_SIZE - FEC_DRV_RESERVE_SPACE)</div><div class='ctx'> #define FEC_ENET_RX_FRPPG	(PAGE_SIZE / FEC_ENET_RX_FRSIZE)</div><div class='ctx'> #define RX_RING_SIZE		(FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)</div><div class='ctx'> #define FEC_ENET_TX_FRSIZE	2048</div><div class='hunk'>@@ -460,7 +442,7 @@ struct bufdesc_ex {</div><div class='ctx'> #define FEC_QUIRK_SINGLE_MDIO		(1 &lt;&lt; 11)</div><div class='ctx'> /* Controller supports RACC register */</div><div class='ctx'> #define FEC_QUIRK_HAS_RACC		(1 &lt;&lt; 12)</div><div class='del'>-/* Controller supports interrupt coalesc */</div><div class='add'>+/* Controller supports interrupt coalesce */</div><div class='ctx'> #define FEC_QUIRK_HAS_COALESCE		(1 &lt;&lt; 13)</div><div class='ctx'> /* Interrupt doesn't wake CPU from deep idle */</div><div class='ctx'> #define FEC_QUIRK_ERR006687		(1 &lt;&lt; 14)</div><div class='hunk'>@@ -495,7 +477,7 @@ struct bufdesc_ex {</div><div class='ctx'>  */</div><div class='ctx'> #define FEC_QUIRK_HAS_EEE		(1 &lt;&lt; 20)</div><div class='ctx'> </div><div class='del'>-/* i.MX8QM ENET IP version add new feture to generate delayed TXC/RXC</div><div class='add'>+/* i.MX8QM ENET IP version add new feature to generate delayed TXC/RXC</div><div class='ctx'>  * as an alternative option to make sure it works well with various PHYs.</div><div class='ctx'>  * For the implementation of delayed clock, ENET takes synchronized 250MHz</div><div class='ctx'>  * clocks to generate 2ns delay.</div><div class='hunk'>@@ -513,6 +495,9 @@ struct bufdesc_ex {</div><div class='ctx'>  */</div><div class='ctx'> #define FEC_QUIRK_HAS_MDIO_C45		BIT(24)</div><div class='ctx'> </div><div class='add'>+/* Jumbo Frame support */</div><div class='add'>+#define FEC_QUIRK_JUMBO_FRAME		BIT(25)</div><div class='add'>+</div><div class='ctx'> struct bufdesc_prop {</div><div class='ctx'> 	int qid;</div><div class='ctx'> 	/* Address of Rx and Tx buffers */</div><div class='hunk'>@@ -526,12 +511,6 @@ struct bufdesc_prop {</div><div class='ctx'> 	unsigned char dsize_log2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct fec_enet_priv_txrx_info {</div><div class='del'>-	int	offset;</div><div class='del'>-	struct	page *page;</div><div class='del'>-	struct  sk_buff *skb;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum {</div><div class='ctx'> 	RX_XDP_REDIRECT = 0,</div><div class='ctx'> 	RX_XDP_PASS,</div><div class='hunk'>@@ -571,7 +550,7 @@ struct fec_enet_priv_tx_q {</div><div class='ctx'> </div><div class='ctx'> struct fec_enet_priv_rx_q {</div><div class='ctx'> 	struct bufdesc_prop bd;</div><div class='del'>-	struct  fec_enet_priv_txrx_info rx_skb_info[RX_RING_SIZE];</div><div class='add'>+	struct page *rx_buf[RX_RING_SIZE];</div><div class='ctx'> </div><div class='ctx'> 	/* page_pool */</div><div class='ctx'> 	struct page_pool *page_pool;</div><div class='hunk'>@@ -614,12 +593,14 @@ struct fec_enet_private {</div><div class='ctx'> 	unsigned int num_tx_queues;</div><div class='ctx'> 	unsigned int num_rx_queues;</div><div class='ctx'> </div><div class='del'>-	/* The saved address of a sent-in-place packet/buffer, for skfree(). */</div><div class='ctx'> 	struct fec_enet_priv_tx_q *tx_queue[FEC_ENET_MAX_TX_QS];</div><div class='ctx'> 	struct fec_enet_priv_rx_q *rx_queue[FEC_ENET_MAX_RX_QS];</div><div class='ctx'> </div><div class='ctx'> 	unsigned int total_tx_ring_size;</div><div class='ctx'> 	unsigned int total_rx_ring_size;</div><div class='add'>+	unsigned int max_buf_size;</div><div class='add'>+	unsigned int pagepool_order;</div><div class='add'>+	unsigned int rx_frame_size;</div><div class='ctx'> </div><div class='ctx'> 	struct	platform_device *pdev;</div><div class='ctx'> </div><div class='hunk'>@@ -662,7 +643,6 @@ struct fec_enet_private {</div><div class='ctx'> 	struct pm_qos_request pm_qos_req;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int tx_align;</div><div class='del'>-	unsigned int rx_align;</div><div class='ctx'> </div><div class='ctx'> 	/* hw interrupt coalesce */</div><div class='ctx'> 	unsigned int rx_pkts_itr;</div><div class='hunk'>@@ -671,8 +651,6 @@ struct fec_enet_private {</div><div class='ctx'> 	unsigned int tx_time_itr;</div><div class='ctx'> 	unsigned int itr_clk_rate;</div><div class='ctx'> </div><div class='del'>-	/* tx lpi eee mode */</div><div class='del'>-	struct ethtool_keee eee;</div><div class='ctx'> 	unsigned int clk_ref_rate;</div><div class='ctx'> </div><div class='ctx'> 	/* ptp clock period in ns*/</div><div class='hunk'>@@ -683,6 +661,7 @@ struct fec_enet_private {</div><div class='ctx'> 	unsigned int reload_period;</div><div class='ctx'> 	int pps_enable;</div><div class='ctx'> 	unsigned int next_counter;</div><div class='add'>+	bool perout_enable;</div><div class='ctx'> 	struct hrtimer perout_timer;</div><div class='ctx'> 	u64 perout_stime;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c<br/>index 1b55047c0237..c685a5c0cc51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fec_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fec_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fec_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/fec_main.c</a></div><div class='hunk'>@@ -22,56 +22,56 @@</div><div class='ctx'>  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/pm_runtime.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/bpf.h&gt;</div><div class='add'>+#include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+#include &lt;linux/cacheflush.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/crc32.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/ip.h&gt;</div><div class='del'>-#include &lt;net/ip.h&gt;</div><div class='del'>-#include &lt;net/page_pool/helpers.h&gt;</div><div class='del'>-#include &lt;net/selftests.h&gt;</div><div class='del'>-#include &lt;net/tso.h&gt;</div><div class='del'>-#include &lt;linux/tcp.h&gt;</div><div class='del'>-#include &lt;linux/udp.h&gt;</div><div class='add'>+#include &lt;linux/fec.h&gt;</div><div class='add'>+#include &lt;linux/filter.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/icmp.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/workqueue.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/in.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/crc32.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mdio.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;linux/fec.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='del'>-#include &lt;linux/regulator/consumer.h&gt;</div><div class='del'>-#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/consumer.h&gt;</div><div class='del'>-#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/phy_fixed.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;</div><div class='del'>-#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/tcp.h&gt;</div><div class='add'>+#include &lt;linux/udp.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;net/ip.h&gt;</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='add'>+#include &lt;net/selftests.h&gt;</div><div class='add'>+#include &lt;net/tso.h&gt;</div><div class='ctx'> #include &lt;soc/imx/cpuidle.h&gt;</div><div class='del'>-#include &lt;linux/filter.h&gt;</div><div class='del'>-#include &lt;linux/bpf.h&gt;</div><div class='del'>-#include &lt;linux/bpf_trace.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fec.h"</div><div class='ctx'> </div><div class='hunk'>@@ -131,7 +131,7 @@ static const struct fec_devinfo fec_mvf600_info = {</div><div class='ctx'> 		  FEC_QUIRK_HAS_MDIO_C45,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct fec_devinfo fec_imx6x_info = {</div><div class='add'>+static const struct fec_devinfo fec_imx6sx_info = {</div><div class='ctx'> 	.quirks = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |</div><div class='ctx'> 		  FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |</div><div class='ctx'> 		  FEC_QUIRK_HAS_VLAN | FEC_QUIRK_HAS_AVB |</div><div class='hunk'>@@ -168,7 +168,8 @@ static const struct fec_devinfo fec_imx8qm_info = {</div><div class='ctx'> 		  FEC_QUIRK_ERR007885 | FEC_QUIRK_BUG_CAPTURE |</div><div class='ctx'> 		  FEC_QUIRK_HAS_RACC | FEC_QUIRK_HAS_COALESCE |</div><div class='ctx'> 		  FEC_QUIRK_CLEAR_SETUP_MII | FEC_QUIRK_HAS_MULTI_QUEUES |</div><div class='del'>-		  FEC_QUIRK_DELAYED_CLKS_SUPPORT | FEC_QUIRK_HAS_MDIO_C45,</div><div class='add'>+		  FEC_QUIRK_DELAYED_CLKS_SUPPORT | FEC_QUIRK_HAS_MDIO_C45 |</div><div class='add'>+		  FEC_QUIRK_JUMBO_FRAME,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct fec_devinfo fec_s32v234_info = {</div><div class='hunk'>@@ -196,7 +197,7 @@ static const struct of_device_id fec_dt_ids[] = {</div><div class='ctx'> 	{ .compatible = "fsl,imx28-fec", .data = &amp;fec_imx28_info, },</div><div class='ctx'> 	{ .compatible = "fsl,imx6q-fec", .data = &amp;fec_imx6q_info, },</div><div class='ctx'> 	{ .compatible = "fsl,mvf600-fec", .data = &amp;fec_mvf600_info, },</div><div class='del'>-	{ .compatible = "fsl,imx6sx-fec", .data = &amp;fec_imx6x_info, },</div><div class='add'>+	{ .compatible = "fsl,imx6sx-fec", .data = &amp;fec_imx6sx_info, },</div><div class='ctx'> 	{ .compatible = "fsl,imx6ul-fec", .data = &amp;fec_imx6ul_info, },</div><div class='ctx'> 	{ .compatible = "fsl,imx8mq-fec", .data = &amp;fec_imx8mq_info, },</div><div class='ctx'> 	{ .compatible = "fsl,imx8qm-fec", .data = &amp;fec_imx8qm_info, },</div><div class='hunk'>@@ -234,6 +235,7 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");</div><div class='ctx'>  * 2048 byte skbufs are allocated. However, alignment requirements</div><div class='ctx'>  * varies between FEC variants. Worst case is 64, so round down by 64.</div><div class='ctx'>  */</div><div class='add'>+#define MAX_JUMBO_BUF_SIZE	(round_down(16384 - FEC_DRV_RESERVE_SPACE - 64, 64))</div><div class='ctx'> #define PKT_MAXBUF_SIZE		(round_down(2048 - 64, 64))</div><div class='ctx'> #define PKT_MINBUF_SIZE		64</div><div class='ctx'> </div><div class='hunk'>@@ -251,12 +253,10 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");</div><div class='ctx'>  * size bits. Other FEC hardware does not, so we need to take that into</div><div class='ctx'>  * account when setting it.</div><div class='ctx'>  */</div><div class='del'>-#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \</div><div class='del'>-    defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM) || \</div><div class='del'>-    defined(CONFIG_ARM64)</div><div class='del'>-#define	OPT_FRAME_SIZE	(PKT_MAXBUF_SIZE &lt;&lt; 16)</div><div class='add'>+#ifndef CONFIG_M5272</div><div class='add'>+#define	OPT_ARCH_HAS_MAX_FL	1</div><div class='ctx'> #else</div><div class='del'>-#define	OPT_FRAME_SIZE	0</div><div class='add'>+#define	OPT_ARCH_HAS_MAX_FL	0</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> /* FEC MII MMFR bits definition */</div><div class='hunk'>@@ -276,16 +276,19 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");</div><div class='ctx'> #define FEC_ECR_MAGICEN         BIT(2)</div><div class='ctx'> #define FEC_ECR_SLEEP           BIT(3)</div><div class='ctx'> #define FEC_ECR_EN1588          BIT(4)</div><div class='add'>+#define FEC_ECR_SPEED           BIT(5)</div><div class='ctx'> #define FEC_ECR_BYTESWP         BIT(8)</div><div class='ctx'> /* FEC RCR bits definition */</div><div class='ctx'> #define FEC_RCR_LOOP            BIT(0)</div><div class='del'>-#define FEC_RCR_HALFDPX         BIT(1)</div><div class='add'>+#define FEC_RCR_DRT		BIT(1)</div><div class='ctx'> #define FEC_RCR_MII             BIT(2)</div><div class='ctx'> #define FEC_RCR_PROMISC         BIT(3)</div><div class='ctx'> #define FEC_RCR_BC_REJ          BIT(4)</div><div class='ctx'> #define FEC_RCR_FLOWCTL         BIT(5)</div><div class='add'>+#define FEC_RCR_RGMII		BIT(6)</div><div class='ctx'> #define FEC_RCR_RMII            BIT(8)</div><div class='ctx'> #define FEC_RCR_10BASET         BIT(9)</div><div class='add'>+#define FEC_RCR_NLC		BIT(30)</div><div class='ctx'> /* TX WMARK bits */</div><div class='ctx'> #define FEC_TXWMRK_STRFWD       BIT(8)</div><div class='ctx'> </div><div class='hunk'>@@ -468,14 +471,14 @@ fec_enet_create_page_pool(struct fec_enet_private *fep,</div><div class='ctx'> {</div><div class='ctx'> 	struct bpf_prog *xdp_prog = READ_ONCE(fep-&gt;xdp_prog);</div><div class='ctx'> 	struct page_pool_params pp_params = {</div><div class='del'>-		.order = 0,</div><div class='add'>+		.order = fep-&gt;pagepool_order,</div><div class='ctx'> 		.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV,</div><div class='ctx'> 		.pool_size = size,</div><div class='ctx'> 		.nid = dev_to_node(&amp;fep-&gt;pdev-&gt;dev),</div><div class='ctx'> 		.dev = &amp;fep-&gt;pdev-&gt;dev,</div><div class='ctx'> 		.dma_dir = xdp_prog ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE,</div><div class='ctx'> 		.offset = FEC_ENET_XDP_HEADROOM,</div><div class='del'>-		.max_len = FEC_ENET_RX_FRSIZE,</div><div class='add'>+		.max_len = fep-&gt;rx_frame_size,</div><div class='ctx'> 	};</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -714,7 +717,12 @@ static int fec_enet_txq_submit_skb(struct fec_enet_priv_tx_q *txq,</div><div class='ctx'> 	txq-&gt;bd.cur = bdp;</div><div class='ctx'> </div><div class='ctx'> 	/* Trigger transmission start */</div><div class='del'>-	writel(0, txq-&gt;bd.reg_desc_active);</div><div class='add'>+	if (!(fep-&gt;quirks &amp; FEC_QUIRK_ERR007885) ||</div><div class='add'>+	    !readl(txq-&gt;bd.reg_desc_active) ||</div><div class='add'>+	    !readl(txq-&gt;bd.reg_desc_active) ||</div><div class='add'>+	    !readl(txq-&gt;bd.reg_desc_active) ||</div><div class='add'>+	    !readl(txq-&gt;bd.reg_desc_active))</div><div class='add'>+		writel(0, txq-&gt;bd.reg_desc_active);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -840,6 +848,8 @@ static int fec_enet_txq_submit_tso(struct fec_enet_priv_tx_q *txq,</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='ctx'> 	int hdr_len, total_len, data_left;</div><div class='ctx'> 	struct bufdesc *bdp = txq-&gt;bd.cur;</div><div class='add'>+	struct bufdesc *tmp_bdp;</div><div class='add'>+	struct bufdesc_ex *ebdp;</div><div class='ctx'> 	struct tso_t tso;</div><div class='ctx'> 	unsigned int index = 0;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -913,7 +923,34 @@ static int fec_enet_txq_submit_tso(struct fec_enet_priv_tx_q *txq,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_release:</div><div class='del'>-	/* TODO: Release all used data descriptors for TSO */</div><div class='add'>+	/* Release all used data descriptors for TSO */</div><div class='add'>+	tmp_bdp = txq-&gt;bd.cur;</div><div class='add'>+</div><div class='add'>+	while (tmp_bdp != bdp) {</div><div class='add'>+		/* Unmap data buffers */</div><div class='add'>+		if (tmp_bdp-&gt;cbd_bufaddr &amp;&amp;</div><div class='add'>+		    !IS_TSO_HEADER(txq, fec32_to_cpu(tmp_bdp-&gt;cbd_bufaddr)))</div><div class='add'>+			dma_unmap_single(&amp;fep-&gt;pdev-&gt;dev,</div><div class='add'>+					 fec32_to_cpu(tmp_bdp-&gt;cbd_bufaddr),</div><div class='add'>+					 fec16_to_cpu(tmp_bdp-&gt;cbd_datlen),</div><div class='add'>+					 DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+		/* Clear standard buffer descriptor fields */</div><div class='add'>+		tmp_bdp-&gt;cbd_sc = 0;</div><div class='add'>+		tmp_bdp-&gt;cbd_datlen = 0;</div><div class='add'>+		tmp_bdp-&gt;cbd_bufaddr = 0;</div><div class='add'>+</div><div class='add'>+		/* Handle extended descriptor if enabled */</div><div class='add'>+		if (fep-&gt;bufdesc_ex) {</div><div class='add'>+			ebdp = (struct bufdesc_ex *)tmp_bdp;</div><div class='add'>+			ebdp-&gt;cbd_esc = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tmp_bdp = fec_enet_get_nextdesc(tmp_bdp, &amp;txq-&gt;bd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -973,7 +1010,7 @@ static void fec_enet_bd_init(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		/* Set the last buffer to wrap */</div><div class='ctx'> 		bdp = fec_enet_get_prevdesc(bdp, &amp;rxq-&gt;bd);</div><div class='del'>-		bdp-&gt;cbd_sc |= cpu_to_fec16(BD_SC_WRAP);</div><div class='add'>+		bdp-&gt;cbd_sc |= cpu_to_fec16(BD_ENET_RX_WRAP);</div><div class='ctx'> </div><div class='ctx'> 		rxq-&gt;bd.cur = rxq-&gt;bd.base;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1009,7 +1046,9 @@ static void fec_enet_bd_init(struct net_device *dev)</div><div class='ctx'> 				struct page *page = txq-&gt;tx_buf[i].buf_p;</div><div class='ctx'> </div><div class='ctx'> 				if (page)</div><div class='del'>-					page_pool_put_page(page-&gt;pp, page, 0, false);</div><div class='add'>+					page_pool_put_page(pp_page_to_nmdesc(page)-&gt;pp,</div><div class='add'>+							   page, 0,</div><div class='add'>+							   false);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			txq-&gt;tx_buf[i].buf_p = NULL;</div><div class='hunk'>@@ -1021,7 +1060,7 @@ static void fec_enet_bd_init(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		/* Set the last buffer to wrap */</div><div class='ctx'> 		bdp = fec_enet_get_prevdesc(bdp, &amp;txq-&gt;bd);</div><div class='del'>-		bdp-&gt;cbd_sc |= cpu_to_fec16(BD_SC_WRAP);</div><div class='add'>+		bdp-&gt;cbd_sc |= cpu_to_fec16(BD_ENET_TX_WRAP);</div><div class='ctx'> 		txq-&gt;dirty_tx = bdp;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1045,7 +1084,7 @@ static void fec_enet_enable_ring(struct net_device *ndev)</div><div class='ctx'> 	for (i = 0; i &lt; fep-&gt;num_rx_queues; i++) {</div><div class='ctx'> 		rxq = fep-&gt;rx_queue[i];</div><div class='ctx'> 		writel(rxq-&gt;bd.dma, fep-&gt;hwp + FEC_R_DES_START(i));</div><div class='del'>-		writel(PKT_MAXBUF_SIZE, fep-&gt;hwp + FEC_R_BUFF_SIZE(i));</div><div class='add'>+		writel(fep-&gt;max_buf_size, fep-&gt;hwp + FEC_R_BUFF_SIZE(i));</div><div class='ctx'> </div><div class='ctx'> 		/* enable DMA1/2 */</div><div class='ctx'> 		if (i)</div><div class='hunk'>@@ -1064,6 +1103,40 @@ static void fec_enet_enable_ring(struct net_device *ndev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Whack a reset.  We should wait for this.</div><div class='add'>+ * For i.MX6SX SOC, enet use AXI bus, we use disable MAC</div><div class='add'>+ * instead of reset MAC itself.</div><div class='add'>+ */</div><div class='add'>+static void fec_ctrl_reset(struct fec_enet_private *fep, bool allow_wol)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (!allow_wol || !(fep-&gt;wol_flag &amp; FEC_WOL_FLAG_SLEEP_ON)) {</div><div class='add'>+		if (fep-&gt;quirks &amp; FEC_QUIRK_HAS_MULTI_QUEUES ||</div><div class='add'>+		    ((fep-&gt;quirks &amp; FEC_QUIRK_NO_HARD_RESET) &amp;&amp; fep-&gt;link)) {</div><div class='add'>+			writel(0, fep-&gt;hwp + FEC_ECNTRL);</div><div class='add'>+		} else {</div><div class='add'>+			writel(FEC_ECR_RESET, fep-&gt;hwp + FEC_ECNTRL);</div><div class='add'>+			udelay(10);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		val = readl(fep-&gt;hwp + FEC_ECNTRL);</div><div class='add'>+		val |= (FEC_ECR_MAGICEN | FEC_ECR_SLEEP);</div><div class='add'>+		writel(val, fep-&gt;hwp + FEC_ECNTRL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fec_set_hw_mac_addr(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	writel(ndev-&gt;dev_addr[3] | (ndev-&gt;dev_addr[2] &lt;&lt; 8) |</div><div class='add'>+	       (ndev-&gt;dev_addr[1] &lt;&lt; 16) | (ndev-&gt;dev_addr[0] &lt;&lt; 24),</div><div class='add'>+	       fep-&gt;hwp + FEC_ADDR_LOW);</div><div class='add'>+	writel((ndev-&gt;dev_addr[5] &lt;&lt; 16) | (ndev-&gt;dev_addr[4] &lt;&lt; 24),</div><div class='add'>+	       fep-&gt;hwp + FEC_ADDR_HIGH);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This function is called to start or restart the FEC during a link</div><div class='ctx'>  * change, transmit timeout, or to reconfigure the FEC.  The network</div><div class='hunk'>@@ -1073,34 +1146,22 @@ static void</div><div class='ctx'> fec_restart(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='del'>-	u32 temp_mac[2];</div><div class='del'>-	u32 rcntl = OPT_FRAME_SIZE | 0x04;</div><div class='ctx'> 	u32 ecntl = FEC_ECR_ETHEREN;</div><div class='add'>+	u32 rcntl = FEC_RCR_MII;</div><div class='add'>+</div><div class='add'>+	if (OPT_ARCH_HAS_MAX_FL)</div><div class='add'>+		rcntl |= (fep-&gt;netdev-&gt;mtu + ETH_HLEN + ETH_FCS_LEN) &lt;&lt; 16;</div><div class='ctx'> </div><div class='ctx'> 	if (fep-&gt;bufdesc_ex)</div><div class='ctx'> 		fec_ptp_save_state(fep);</div><div class='ctx'> </div><div class='del'>-	/* Whack a reset.  We should wait for this.</div><div class='del'>-	 * For i.MX6SX SOC, enet use AXI bus, we use disable MAC</div><div class='del'>-	 * instead of reset MAC itself.</div><div class='del'>-	 */</div><div class='del'>-	if (fep-&gt;quirks &amp; FEC_QUIRK_HAS_MULTI_QUEUES ||</div><div class='del'>-	    ((fep-&gt;quirks &amp; FEC_QUIRK_NO_HARD_RESET) &amp;&amp; fep-&gt;link)) {</div><div class='del'>-		writel(0, fep-&gt;hwp + FEC_ECNTRL);</div><div class='del'>-	} else {</div><div class='del'>-		writel(1, fep-&gt;hwp + FEC_ECNTRL);</div><div class='del'>-		udelay(10);</div><div class='del'>-	}</div><div class='add'>+	fec_ctrl_reset(fep, false);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * enet-mac reset will reset mac address registers too,</div><div class='ctx'> 	 * so need to reconfigure it.</div><div class='ctx'> 	 */</div><div class='del'>-	memcpy(&amp;temp_mac, ndev-&gt;dev_addr, ETH_ALEN);</div><div class='del'>-	writel((__force u32)cpu_to_be32(temp_mac[0]),</div><div class='del'>-	       fep-&gt;hwp + FEC_ADDR_LOW);</div><div class='del'>-	writel((__force u32)cpu_to_be32(temp_mac[1]),</div><div class='del'>-	       fep-&gt;hwp + FEC_ADDR_HIGH);</div><div class='add'>+	fec_set_hw_mac_addr(ndev);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear any outstanding interrupt, except MDIO. */</div><div class='ctx'> 	writel((0xffffffff &amp; ~FEC_ENET_MII), fep-&gt;hwp + FEC_IEVENT);</div><div class='hunk'>@@ -1115,7 +1176,7 @@ fec_restart(struct net_device *ndev)</div><div class='ctx'> 		writel(0x04, fep-&gt;hwp + FEC_X_CNTRL);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* No Rcv on Xmit */</div><div class='del'>-		rcntl |= 0x02;</div><div class='add'>+		rcntl |= FEC_RCR_DRT;</div><div class='ctx'> 		writel(0x0, fep-&gt;hwp + FEC_X_CNTRL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1134,7 +1195,7 @@ fec_restart(struct net_device *ndev)</div><div class='ctx'> 		else</div><div class='ctx'> 			val &amp;= ~FEC_RACC_OPTIONS;</div><div class='ctx'> 		writel(val, fep-&gt;hwp + FEC_RACC);</div><div class='del'>-		writel(PKT_MAXBUF_SIZE, fep-&gt;hwp + FEC_FTRL);</div><div class='add'>+		writel(min(fep-&gt;rx_frame_size, fep-&gt;max_buf_size), fep-&gt;hwp + FEC_FTRL);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -1144,14 +1205,11 @@ fec_restart(struct net_device *ndev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (fep-&gt;quirks &amp; FEC_QUIRK_ENET_MAC) {</div><div class='ctx'> 		/* Enable flow control and length check */</div><div class='del'>-		rcntl |= 0x40000000 | 0x00000020;</div><div class='add'>+		rcntl |= FEC_RCR_NLC | FEC_RCR_FLOWCTL;</div><div class='ctx'> </div><div class='ctx'> 		/* RGMII, RMII or MII */</div><div class='del'>-		if (fep-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII ||</div><div class='del'>-		    fep-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||</div><div class='del'>-		    fep-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII_RXID ||</div><div class='del'>-		    fep-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII_TXID)</div><div class='del'>-			rcntl |= (1 &lt;&lt; 6);</div><div class='add'>+		if (phy_interface_mode_is_rgmii(fep-&gt;phy_interface))</div><div class='add'>+			rcntl |= FEC_RCR_RGMII;</div><div class='ctx'> 		else if (fep-&gt;phy_interface == PHY_INTERFACE_MODE_RMII)</div><div class='ctx'> 			rcntl |= FEC_RCR_RMII;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -1160,7 +1218,7 @@ fec_restart(struct net_device *ndev)</div><div class='ctx'> 		/* 1G, 100M or 10M */</div><div class='ctx'> 		if (ndev-&gt;phydev) {</div><div class='ctx'> 			if (ndev-&gt;phydev-&gt;speed == SPEED_1000)</div><div class='del'>-				ecntl |= (1 &lt;&lt; 5);</div><div class='add'>+				ecntl |= FEC_ECR_SPEED;</div><div class='ctx'> 			else if (ndev-&gt;phydev-&gt;speed == SPEED_100)</div><div class='ctx'> 				rcntl &amp;= ~FEC_RCR_10BASET;</div><div class='ctx'> 			else</div><div class='hunk'>@@ -1224,8 +1282,18 @@ fec_restart(struct net_device *ndev)</div><div class='ctx'> 	if (fep-&gt;quirks &amp; FEC_QUIRK_ENET_MAC) {</div><div class='ctx'> 		/* enable ENET endian swap */</div><div class='ctx'> 		ecntl |= FEC_ECR_BYTESWP;</div><div class='del'>-		/* enable ENET store and forward mode */</div><div class='del'>-		writel(FEC_TXWMRK_STRFWD, fep-&gt;hwp + FEC_X_WMRK);</div><div class='add'>+</div><div class='add'>+		/* When Jumbo Frame is enabled, the FIFO may not be large enough</div><div class='add'>+		 * to hold an entire frame. In such cases, if the MTU exceeds</div><div class='add'>+		 * (PKT_MAXBUF_SIZE - ETH_HLEN - ETH_FCS_LEN), configure the interface</div><div class='add'>+		 * to operate in cut-through mode, triggered by the FIFO threshold.</div><div class='add'>+		 * Otherwise, enable the ENET store-and-forward mode.</div><div class='add'>+		 */</div><div class='add'>+		if ((fep-&gt;quirks &amp; FEC_QUIRK_JUMBO_FRAME) &amp;&amp;</div><div class='add'>+		    (ndev-&gt;mtu &gt; (PKT_MAXBUF_SIZE - ETH_HLEN - ETH_FCS_LEN)))</div><div class='add'>+			writel(0xF, fep-&gt;hwp + FEC_X_WMRK);</div><div class='add'>+		else</div><div class='add'>+			writel(FEC_TXWMRK_STRFWD, fep-&gt;hwp + FEC_X_WMRK);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (fep-&gt;bufdesc_ex)</div><div class='hunk'>@@ -1344,22 +1412,7 @@ fec_stop(struct net_device *ndev)</div><div class='ctx'> 	if (fep-&gt;bufdesc_ex)</div><div class='ctx'> 		fec_ptp_save_state(fep);</div><div class='ctx'> </div><div class='del'>-	/* Whack a reset.  We should wait for this.</div><div class='del'>-	 * For i.MX6SX SOC, enet use AXI bus, we use disable MAC</div><div class='del'>-	 * instead of reset MAC itself.</div><div class='del'>-	 */</div><div class='del'>-	if (!(fep-&gt;wol_flag &amp; FEC_WOL_FLAG_SLEEP_ON)) {</div><div class='del'>-		if (fep-&gt;quirks &amp; FEC_QUIRK_HAS_MULTI_QUEUES) {</div><div class='del'>-			writel(0, fep-&gt;hwp + FEC_ECNTRL);</div><div class='del'>-		} else {</div><div class='del'>-			writel(FEC_ECR_RESET, fep-&gt;hwp + FEC_ECNTRL);</div><div class='del'>-			udelay(10);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		val = readl(fep-&gt;hwp + FEC_ECNTRL);</div><div class='del'>-		val |= (FEC_ECR_MAGICEN | FEC_ECR_SLEEP);</div><div class='del'>-		writel(val, fep-&gt;hwp + FEC_ECNTRL);</div><div class='del'>-	}</div><div class='add'>+	fec_ctrl_reset(fep, true);</div><div class='ctx'> 	writel(fep-&gt;phy_speed, fep-&gt;hwp + FEC_MII_SPEED);</div><div class='ctx'> 	writel(FEC_DEFAULT_IMASK, fep-&gt;hwp + FEC_IMASK);</div><div class='ctx'> </div><div class='hunk'>@@ -1549,7 +1602,8 @@ fec_enet_tx_queue(struct net_device *ndev, u16 queue_id, int budget)</div><div class='ctx'> 			xdp_return_frame_rx_napi(xdpf);</div><div class='ctx'> 		} else { /* recycle pages of XDP_TX frames */</div><div class='ctx'> 			/* The dma_sync_size = 0 as XDP_TX has already synced DMA for_device */</div><div class='del'>-			page_pool_put_page(page-&gt;pp, page, 0, true);</div><div class='add'>+			page_pool_put_page(pp_page_to_nmdesc(page)-&gt;pp, page,</div><div class='add'>+					   0, true);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		txq-&gt;tx_buf[index].buf_p = NULL;</div><div class='hunk'>@@ -1591,19 +1645,21 @@ static void fec_enet_tx(struct net_device *ndev, int budget)</div><div class='ctx'> 		fec_enet_tx_queue(ndev, i, budget);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fec_enet_update_cbd(struct fec_enet_priv_rx_q *rxq,</div><div class='add'>+static int fec_enet_update_cbd(struct fec_enet_priv_rx_q *rxq,</div><div class='ctx'> 				struct bufdesc *bdp, int index)</div><div class='ctx'> {</div><div class='ctx'> 	struct page *new_page;</div><div class='ctx'> 	dma_addr_t phys_addr;</div><div class='ctx'> </div><div class='ctx'> 	new_page = page_pool_dev_alloc_pages(rxq-&gt;page_pool);</div><div class='del'>-	WARN_ON(!new_page);</div><div class='del'>-	rxq-&gt;rx_skb_info[index].page = new_page;</div><div class='add'>+	if (unlikely(!new_page))</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	rxq-&gt;rx_skb_info[index].offset = FEC_ENET_XDP_HEADROOM;</div><div class='add'>+	rxq-&gt;rx_buf[index] = new_page;</div><div class='ctx'> 	phys_addr = page_pool_get_dma_addr(new_page) + FEC_ENET_XDP_HEADROOM;</div><div class='ctx'> 	bdp-&gt;cbd_bufaddr = cpu_to_fec32(phys_addr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32</div><div class='hunk'>@@ -1671,13 +1727,29 @@ xdp_err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void fec_enet_rx_vlan(const struct net_device *ndev, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (ndev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_RX) {</div><div class='add'>+		const struct vlan_ethhdr *vlan_header = skb_vlan_eth_hdr(skb);</div><div class='add'>+		const u16 vlan_tag = ntohs(vlan_header-&gt;h_vlan_TCI);</div><div class='add'>+</div><div class='add'>+		/* Push and remove the vlan tag */</div><div class='add'>+</div><div class='add'>+		memmove(skb-&gt;data + VLAN_HLEN, skb-&gt;data, ETH_ALEN * 2);</div><div class='add'>+		skb_pull(skb, VLAN_HLEN);</div><div class='add'>+		__vlan_hwaccel_put_tag(skb,</div><div class='add'>+				       htons(ETH_P_8021Q),</div><div class='add'>+				       vlan_tag);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* During a receive, the bd_rx.cur points to the current incoming buffer.</div><div class='ctx'>  * When we update through the ring, if the next incoming buffer has</div><div class='ctx'>  * not been given to the system, we just set the empty indicator,</div><div class='ctx'>  * effectively tossing the packet.</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='del'>-fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)</div><div class='add'>+fec_enet_rx_queue(struct net_device *ndev, u16 queue_id, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='ctx'> 	struct fec_enet_priv_rx_q *rxq;</div><div class='hunk'>@@ -1685,11 +1757,8 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)</div><div class='ctx'> 	unsigned short status;</div><div class='ctx'> 	struct  sk_buff *skb;</div><div class='ctx'> 	ushort	pkt_len;</div><div class='del'>-	__u8 *data;</div><div class='ctx'> 	int	pkt_received = 0;</div><div class='ctx'> 	struct	bufdesc_ex *ebdp = NULL;</div><div class='del'>-	bool	vlan_packet_rcvd = false;</div><div class='del'>-	u16	vlan_tag;</div><div class='ctx'> 	int	index = 0;</div><div class='ctx'> 	bool	need_swap = fep-&gt;quirks &amp; FEC_QUIRK_SWAP_FRAME;</div><div class='ctx'> 	struct bpf_prog *xdp_prog = READ_ONCE(fep-&gt;xdp_prog);</div><div class='hunk'>@@ -1698,9 +1767,9 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='ctx'> 	struct xdp_buff xdp;</div><div class='ctx'> 	struct page *page;</div><div class='add'>+	__fec32 cbd_bufaddr;</div><div class='ctx'> 	u32 sub_len = 4;</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_M5272)</div><div class='ctx'> 	/*If it has the FEC_QUIRK_HAS_RACC quirk property, the bit of</div><div class='ctx'> 	 * FEC_RACC_SHIFT16 is set by default in the probe function.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1708,7 +1777,6 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)</div><div class='ctx'> 		data_start += 2;</div><div class='ctx'> 		sub_len += 2;</div><div class='ctx'> 	}</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> #if defined(CONFIG_COLDFIRE) &amp;&amp; !defined(CONFIG_COLDFIRE_COHERENT_DMA)</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1723,7 +1791,7 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)</div><div class='ctx'> 	 * These get messed up if we get called due to a busy condition.</div><div class='ctx'> 	 */</div><div class='ctx'> 	bdp = rxq-&gt;bd.cur;</div><div class='del'>-	xdp_init_buff(&amp;xdp, PAGE_SIZE, &amp;rxq-&gt;xdp_rxq);</div><div class='add'>+	xdp_init_buff(&amp;xdp, PAGE_SIZE &lt;&lt; fep-&gt;pagepool_order, &amp;rxq-&gt;xdp_rxq);</div><div class='ctx'> </div><div class='ctx'> 	while (!((status = fec16_to_cpu(bdp-&gt;cbd_sc)) &amp; BD_ENET_RX_EMPTY)) {</div><div class='ctx'> </div><div class='hunk'>@@ -1763,15 +1831,22 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)</div><div class='ctx'> 		ndev-&gt;stats.rx_packets++;</div><div class='ctx'> 		pkt_len = fec16_to_cpu(bdp-&gt;cbd_datlen);</div><div class='ctx'> 		ndev-&gt;stats.rx_bytes += pkt_len;</div><div class='add'>+		if (fep-&gt;quirks &amp; FEC_QUIRK_HAS_RACC)</div><div class='add'>+			ndev-&gt;stats.rx_bytes -= 2;</div><div class='ctx'> </div><div class='ctx'> 		index = fec_enet_get_bd_index(bdp, &amp;rxq-&gt;bd);</div><div class='del'>-		page = rxq-&gt;rx_skb_info[index].page;</div><div class='add'>+		page = rxq-&gt;rx_buf[index];</div><div class='add'>+		cbd_bufaddr = bdp-&gt;cbd_bufaddr;</div><div class='add'>+		if (fec_enet_update_cbd(rxq, bdp, index)) {</div><div class='add'>+			ndev-&gt;stats.rx_dropped++;</div><div class='add'>+			goto rx_processing_done;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		dma_sync_single_for_cpu(&amp;fep-&gt;pdev-&gt;dev,</div><div class='del'>-					fec32_to_cpu(bdp-&gt;cbd_bufaddr),</div><div class='add'>+					fec32_to_cpu(cbd_bufaddr),</div><div class='ctx'> 					pkt_len,</div><div class='ctx'> 					DMA_FROM_DEVICE);</div><div class='ctx'> 		prefetch(page_address(page));</div><div class='del'>-		fec_enet_update_cbd(rxq, bdp, index);</div><div class='ctx'> </div><div class='ctx'> 		if (xdp_prog) {</div><div class='ctx'> 			xdp_buff_clear_frags_flag(&amp;xdp);</div><div class='hunk'>@@ -1788,7 +1863,8 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)</div><div class='ctx'> 		 * include that when passing upstream as it messes up</div><div class='ctx'> 		 * bridging applications.</div><div class='ctx'> 		 */</div><div class='del'>-		skb = build_skb(page_address(page), PAGE_SIZE);</div><div class='add'>+		skb = build_skb(page_address(page),</div><div class='add'>+				PAGE_SIZE &lt;&lt; fep-&gt;pagepool_order);</div><div class='ctx'> 		if (unlikely(!skb)) {</div><div class='ctx'> 			page_pool_recycle_direct(rxq-&gt;page_pool, page);</div><div class='ctx'> 			ndev-&gt;stats.rx_dropped++;</div><div class='hunk'>@@ -1802,10 +1878,11 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)</div><div class='ctx'> 		skb_mark_for_recycle(skb);</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(need_swap)) {</div><div class='add'>+			u8 *data;</div><div class='add'>+</div><div class='ctx'> 			data = page_address(page) + FEC_ENET_XDP_HEADROOM;</div><div class='ctx'> 			swap_buffer(data, pkt_len);</div><div class='ctx'> 		}</div><div class='del'>-		data = skb-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 		/* Extract the enhanced buffer descriptor */</div><div class='ctx'> 		ebdp = NULL;</div><div class='hunk'>@@ -1813,20 +1890,9 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)</div><div class='ctx'> 			ebdp = (struct bufdesc_ex *)bdp;</div><div class='ctx'> </div><div class='ctx'> 		/* If this is a VLAN packet remove the VLAN Tag */</div><div class='del'>-		vlan_packet_rcvd = false;</div><div class='del'>-		if ((ndev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_RX) &amp;&amp;</div><div class='del'>-		    fep-&gt;bufdesc_ex &amp;&amp;</div><div class='del'>-		    (ebdp-&gt;cbd_esc &amp; cpu_to_fec32(BD_ENET_RX_VLAN))) {</div><div class='del'>-			/* Push and remove the vlan tag */</div><div class='del'>-			struct vlan_hdr *vlan_header =</div><div class='del'>-					(struct vlan_hdr *) (data + ETH_HLEN);</div><div class='del'>-			vlan_tag = ntohs(vlan_header-&gt;h_vlan_TCI);</div><div class='del'>-</div><div class='del'>-			vlan_packet_rcvd = true;</div><div class='del'>-</div><div class='del'>-			memmove(skb-&gt;data + VLAN_HLEN, data, ETH_ALEN * 2);</div><div class='del'>-			skb_pull(skb, VLAN_HLEN);</div><div class='del'>-		}</div><div class='add'>+		if (fep-&gt;bufdesc_ex &amp;&amp;</div><div class='add'>+		    (ebdp-&gt;cbd_esc &amp; cpu_to_fec32(BD_ENET_RX_VLAN)))</div><div class='add'>+			fec_enet_rx_vlan(ndev, skb);</div><div class='ctx'> </div><div class='ctx'> 		skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -1845,12 +1911,6 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* Handle received VLAN packets */</div><div class='del'>-		if (vlan_packet_rcvd)</div><div class='del'>-			__vlan_hwaccel_put_tag(skb,</div><div class='del'>-					       htons(ETH_P_8021Q),</div><div class='del'>-					       vlan_tag);</div><div class='del'>-</div><div class='ctx'> 		skb_record_rx_queue(skb, queue_id);</div><div class='ctx'> 		napi_gro_receive(&amp;fep-&gt;napi, skb);</div><div class='ctx'> </div><div class='hunk'>@@ -1898,7 +1958,7 @@ static int fec_enet_rx(struct net_device *ndev, int budget)</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure that AVB queues are processed first. */</div><div class='ctx'> 	for (i = fep-&gt;num_rx_queues - 1; i &gt;= 0; i--)</div><div class='del'>-		done += fec_enet_rx_queue(ndev, budget - done, i);</div><div class='add'>+		done += fec_enet_rx_queue(ndev, i, budget - done);</div><div class='ctx'> </div><div class='ctx'> 	return done;</div><div class='ctx'> }</div><div class='hunk'>@@ -2045,14 +2105,14 @@ static int fec_enet_us_to_tx_cycle(struct net_device *ndev, int us)</div><div class='ctx'> 	return us * (fep-&gt;clk_ref_rate / 1000) / 1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fec_enet_eee_mode_set(struct net_device *ndev, bool enable)</div><div class='add'>+static int fec_enet_eee_mode_set(struct net_device *ndev, u32 lpi_timer,</div><div class='add'>+				 bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='del'>-	struct ethtool_keee *p = &amp;fep-&gt;eee;</div><div class='ctx'> 	unsigned int sleep_cycle, wake_cycle;</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='del'>-		sleep_cycle = fec_enet_us_to_tx_cycle(ndev, p-&gt;tx_lpi_timer);</div><div class='add'>+		sleep_cycle = fec_enet_us_to_tx_cycle(ndev, lpi_timer);</div><div class='ctx'> 		wake_cycle = sleep_cycle;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		sleep_cycle = 0;</div><div class='hunk'>@@ -2105,7 +2165,9 @@ static void fec_enet_adjust_link(struct net_device *ndev)</div><div class='ctx'> 			napi_enable(&amp;fep-&gt;napi);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (fep-&gt;quirks &amp; FEC_QUIRK_HAS_EEE)</div><div class='del'>-			fec_enet_eee_mode_set(ndev, phy_dev-&gt;enable_tx_lpi);</div><div class='add'>+			fec_enet_eee_mode_set(ndev,</div><div class='add'>+					      phy_dev-&gt;eee_cfg.tx_lpi_timer,</div><div class='add'>+					      phy_dev-&gt;enable_tx_lpi);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (fep-&gt;link) {</div><div class='ctx'> 			netif_stop_queue(ndev);</div><div class='hunk'>@@ -2167,7 +2229,6 @@ static int fec_enet_mdio_read_c22(struct mii_bus *bus, int mii_id, int regnum)</div><div class='ctx'> 	ret = FEC_MMFR_DATA(readl(fep-&gt;hwp + FEC_MII_DATA));</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2216,7 +2277,6 @@ static int fec_enet_mdio_read_c45(struct mii_bus *bus, int mii_id,</div><div class='ctx'> 	ret = FEC_MMFR_DATA(readl(fep-&gt;hwp + FEC_MII_DATA));</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2248,7 +2308,6 @@ static int fec_enet_mdio_write_c22(struct mii_bus *bus, int mii_id, int regnum,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		netdev_err(fep-&gt;netdev, "MDIO write timeout\n");</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2292,7 +2351,6 @@ static int fec_enet_mdio_write_c45(struct mii_bus *bus, int mii_id,</div><div class='ctx'> 		netdev_err(fep-&gt;netdev, "MDIO write timeout\n");</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2315,7 +2373,8 @@ static void fec_enet_phy_reset_after_clk_enable(struct net_device *ndev)</div><div class='ctx'> 		 */</div><div class='ctx'> 		phy_dev = of_phy_find_device(fep-&gt;phy_node);</div><div class='ctx'> 		phy_reset_after_clk_enable(phy_dev);</div><div class='del'>-		put_device(&amp;phy_dev-&gt;mdio.dev);</div><div class='add'>+		if (phy_dev)</div><div class='add'>+			put_device(&amp;phy_dev-&gt;mdio.dev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2411,11 +2470,8 @@ static int fec_enet_parse_rgmii_delay(struct fec_enet_private *fep,</div><div class='ctx'> static int fec_enet_mii_probe(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='del'>-	struct phy_device *phy_dev = NULL;</div><div class='del'>-	char mdio_bus_id[MII_BUS_ID_SIZE];</div><div class='del'>-	char phy_name[MII_BUS_ID_SIZE + 3];</div><div class='del'>-	int phy_id;</div><div class='del'>-	int dev_id = fep-&gt;dev_id;</div><div class='add'>+	struct phy_device *phy_dev;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (fep-&gt;phy_node) {</div><div class='ctx'> 		phy_dev = of_phy_connect(ndev, fep-&gt;phy_node,</div><div class='hunk'>@@ -2427,30 +2483,28 @@ static int fec_enet_mii_probe(struct net_device *ndev)</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* check for attached phy */</div><div class='del'>-		for (phy_id = 0; (phy_id &lt; PHY_MAX_ADDR); phy_id++) {</div><div class='del'>-			if (!mdiobus_is_registered_device(fep-&gt;mii_bus, phy_id))</div><div class='del'>-				continue;</div><div class='del'>-			if (dev_id--)</div><div class='del'>-				continue;</div><div class='del'>-			strscpy(mdio_bus_id, fep-&gt;mii_bus-&gt;id, MII_BUS_ID_SIZE);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+		phy_dev = phy_find_first(fep-&gt;mii_bus);</div><div class='add'>+		if (fep-&gt;dev_id &amp;&amp; phy_dev)</div><div class='add'>+			phy_dev = phy_find_next(fep-&gt;mii_bus, phy_dev);</div><div class='ctx'> </div><div class='del'>-		if (phy_id &gt;= PHY_MAX_ADDR) {</div><div class='add'>+		if (!phy_dev) {</div><div class='ctx'> 			netdev_info(ndev, "no PHY, assuming direct connection to switch\n");</div><div class='del'>-			strscpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE);</div><div class='del'>-			phy_id = 0;</div><div class='add'>+			phy_dev = fixed_phy_register_100fd();</div><div class='add'>+			if (IS_ERR(phy_dev)) {</div><div class='add'>+				netdev_err(ndev, "could not register fixed PHY\n");</div><div class='add'>+				return PTR_ERR(phy_dev);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		snprintf(phy_name, sizeof(phy_name),</div><div class='del'>-			 PHY_ID_FMT, mdio_bus_id, phy_id);</div><div class='del'>-		phy_dev = phy_connect(ndev, phy_name, &amp;fec_enet_adjust_link,</div><div class='del'>-				      fep-&gt;phy_interface);</div><div class='del'>-	}</div><div class='add'>+		ret = phy_connect_direct(ndev, phy_dev, &amp;fec_enet_adjust_link,</div><div class='add'>+					 fep-&gt;phy_interface);</div><div class='add'>+		if (ret) {</div><div class='add'>+			if (phy_is_pseudo_fixed_link(phy_dev))</div><div class='add'>+				fixed_phy_unregister(phy_dev);</div><div class='add'>+			netdev_err(ndev, "could not attach to PHY\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(phy_dev)) {</div><div class='del'>-		netdev_err(ndev, "could not attach to PHY\n");</div><div class='del'>-		return PTR_ERR(phy_dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* mask with MAC supported features */</div><div class='hunk'>@@ -2458,9 +2512,7 @@ static int fec_enet_mii_probe(struct net_device *ndev)</div><div class='ctx'> 		phy_set_max_speed(phy_dev, 1000);</div><div class='ctx'> 		phy_remove_link_mode(phy_dev,</div><div class='ctx'> 				     ETHTOOL_LINK_MODE_1000baseT_Half_BIT);</div><div class='del'>-#if !defined(CONFIG_M5272)</div><div class='ctx'> 		phy_support_sym_pause(phy_dev);</div><div class='del'>-#endif</div><div class='ctx'> 	}</div><div class='ctx'> 	else</div><div class='ctx'> 		phy_set_max_speed(phy_dev, 100);</div><div class='hunk'>@@ -2487,7 +2539,6 @@ static int fec_enet_mii_init(struct platform_device *pdev)</div><div class='ctx'> 	int err = -ENXIO;</div><div class='ctx'> 	u32 mii_speed, holdtime;</div><div class='ctx'> 	u32 bus_freq;</div><div class='del'>-	int addr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * The i.MX28 dual fec interfaces are not equal.</div><div class='hunk'>@@ -2602,11 +2653,8 @@ static int fec_enet_mii_init(struct platform_device *pdev)</div><div class='ctx'> 	of_node_put(node);</div><div class='ctx'> </div><div class='ctx'> 	/* find all the PHY devices on the bus and set mac_managed_pm to true */</div><div class='del'>-	for (addr = 0; addr &lt; PHY_MAX_ADDR; addr++) {</div><div class='del'>-		phydev = mdiobus_get_phy(fep-&gt;mii_bus, addr);</div><div class='del'>-		if (phydev)</div><div class='del'>-			phydev-&gt;mac_managed_pm = true;</div><div class='del'>-	}</div><div class='add'>+	mdiobus_for_each_phy(fep-&gt;mii_bus, phydev)</div><div class='add'>+		phydev-&gt;mac_managed_pm = true;</div><div class='ctx'> </div><div class='ctx'> 	mii_cnt++;</div><div class='ctx'> </div><div class='hunk'>@@ -2655,9 +2703,7 @@ static int fec_enet_get_regs_len(struct net_device *ndev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* List of registers that can be safety be read to dump them with ethtool */</div><div class='del'>-#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \</div><div class='del'>-	defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM) || \</div><div class='del'>-	defined(CONFIG_ARM64) || defined(CONFIG_COMPILE_TEST)</div><div class='add'>+#if !defined(CONFIG_M5272) || defined(CONFIG_COMPILE_TEST)</div><div class='ctx'> static __u32 fec_enet_register_version = 2;</div><div class='ctx'> static u32 fec_enet_register_offset[] = {</div><div class='ctx'> 	FEC_IEVENT, FEC_IMASK, FEC_R_DES_ACTIVE_0, FEC_X_DES_ACTIVE_0,</div><div class='hunk'>@@ -2731,30 +2777,22 @@ static u32 fec_enet_register_offset[] = {</div><div class='ctx'> static void fec_enet_get_regs(struct net_device *ndev,</div><div class='ctx'> 			      struct ethtool_regs *regs, void *regbuf)</div><div class='ctx'> {</div><div class='add'>+	u32 reg_cnt = ARRAY_SIZE(fec_enet_register_offset);</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='ctx'> 	u32 __iomem *theregs = (u32 __iomem *)fep-&gt;hwp;</div><div class='add'>+	u32 *reg_list = fec_enet_register_offset;</div><div class='ctx'> 	struct device *dev = &amp;fep-&gt;pdev-&gt;dev;</div><div class='ctx'> 	u32 *buf = (u32 *)regbuf;</div><div class='ctx'> 	u32 i, off;</div><div class='ctx'> 	int ret;</div><div class='del'>-#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \</div><div class='del'>-	defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM) || \</div><div class='del'>-	defined(CONFIG_ARM64) || defined(CONFIG_COMPILE_TEST)</div><div class='del'>-	u32 *reg_list;</div><div class='del'>-	u32 reg_cnt;</div><div class='del'>-</div><div class='del'>-	if (!of_machine_is_compatible("fsl,imx6ul")) {</div><div class='del'>-		reg_list = fec_enet_register_offset;</div><div class='del'>-		reg_cnt = ARRAY_SIZE(fec_enet_register_offset);</div><div class='del'>-	} else {</div><div class='add'>+</div><div class='add'>+#if !defined(CONFIG_M5272) || defined(CONFIG_COMPILE_TEST)</div><div class='add'>+	if (of_machine_is_compatible("fsl,imx6ul")) {</div><div class='ctx'> 		reg_list = fec_enet_register_offset_6ul;</div><div class='ctx'> 		reg_cnt = ARRAY_SIZE(fec_enet_register_offset_6ul);</div><div class='ctx'> 	}</div><div class='del'>-#else</div><div class='del'>-	/* coldfire */</div><div class='del'>-	static u32 *reg_list = fec_enet_register_offset;</div><div class='del'>-	static const u32 reg_cnt = ARRAY_SIZE(fec_enet_register_offset);</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='ctx'> 	ret = pm_runtime_resume_and_get(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2774,7 +2812,6 @@ static void fec_enet_get_regs(struct net_device *ndev,</div><div class='ctx'> 		buf[off] = readl(&amp;theregs[off]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3081,27 +3118,25 @@ static int fec_enet_us_to_itr_clock(struct net_device *ndev, int us)</div><div class='ctx'> static void fec_enet_itr_coal_set(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='del'>-	int rx_itr, tx_itr;</div><div class='add'>+	u32 rx_itr = 0, tx_itr = 0;</div><div class='add'>+	int rx_ictt, tx_ictt;</div><div class='ctx'> </div><div class='del'>-	/* Must be greater than zero to avoid unpredictable behavior */</div><div class='del'>-	if (!fep-&gt;rx_time_itr || !fep-&gt;rx_pkts_itr ||</div><div class='del'>-	    !fep-&gt;tx_time_itr || !fep-&gt;tx_pkts_itr)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Select enet system clock as Interrupt Coalescing</div><div class='del'>-	 * timer Clock Source</div><div class='del'>-	 */</div><div class='del'>-	rx_itr = FEC_ITR_CLK_SEL;</div><div class='del'>-	tx_itr = FEC_ITR_CLK_SEL;</div><div class='add'>+	rx_ictt = fec_enet_us_to_itr_clock(ndev, fep-&gt;rx_time_itr);</div><div class='add'>+	tx_ictt = fec_enet_us_to_itr_clock(ndev, fep-&gt;tx_time_itr);</div><div class='ctx'> </div><div class='del'>-	/* set ICFT and ICTT */</div><div class='del'>-	rx_itr |= FEC_ITR_ICFT(fep-&gt;rx_pkts_itr);</div><div class='del'>-	rx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep-&gt;rx_time_itr));</div><div class='del'>-	tx_itr |= FEC_ITR_ICFT(fep-&gt;tx_pkts_itr);</div><div class='del'>-	tx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep-&gt;tx_time_itr));</div><div class='add'>+	if (rx_ictt &gt; 0 &amp;&amp; fep-&gt;rx_pkts_itr &gt; 1) {</div><div class='add'>+		/* Enable with enet system clock as Interrupt Coalescing timer Clock Source */</div><div class='add'>+		rx_itr = FEC_ITR_EN | FEC_ITR_CLK_SEL;</div><div class='add'>+		rx_itr |= FEC_ITR_ICFT(fep-&gt;rx_pkts_itr);</div><div class='add'>+		rx_itr |= FEC_ITR_ICTT(rx_ictt);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	rx_itr |= FEC_ITR_EN;</div><div class='del'>-	tx_itr |= FEC_ITR_EN;</div><div class='add'>+	if (tx_ictt &gt; 0 &amp;&amp; fep-&gt;tx_pkts_itr &gt; 1) {</div><div class='add'>+		/* Enable with enet system clock as Interrupt Coalescing timer Clock Source */</div><div class='add'>+		tx_itr = FEC_ITR_EN | FEC_ITR_CLK_SEL;</div><div class='add'>+		tx_itr |= FEC_ITR_ICFT(fep-&gt;tx_pkts_itr);</div><div class='add'>+		tx_itr |= FEC_ITR_ICTT(tx_ictt);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	writel(tx_itr, fep-&gt;hwp + FEC_TXIC0);</div><div class='ctx'> 	writel(rx_itr, fep-&gt;hwp + FEC_RXIC0);</div><div class='hunk'>@@ -3181,7 +3216,6 @@ static int</div><div class='ctx'> fec_enet_get_eee(struct net_device *ndev, struct ethtool_keee *edata)</div><div class='ctx'> {</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='del'>-	struct ethtool_keee *p = &amp;fep-&gt;eee;</div><div class='ctx'> </div><div class='ctx'> 	if (!(fep-&gt;quirks &amp; FEC_QUIRK_HAS_EEE))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -3189,8 +3223,6 @@ fec_enet_get_eee(struct net_device *ndev, struct ethtool_keee *edata)</div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return -ENETDOWN;</div><div class='ctx'> </div><div class='del'>-	edata-&gt;tx_lpi_timer = p-&gt;tx_lpi_timer;</div><div class='del'>-</div><div class='ctx'> 	return phy_ethtool_get_eee(ndev-&gt;phydev, edata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3198,7 +3230,6 @@ static int</div><div class='ctx'> fec_enet_set_eee(struct net_device *ndev, struct ethtool_keee *edata)</div><div class='ctx'> {</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='del'>-	struct ethtool_keee *p = &amp;fep-&gt;eee;</div><div class='ctx'> </div><div class='ctx'> 	if (!(fep-&gt;quirks &amp; FEC_QUIRK_HAS_EEE))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -3206,8 +3237,6 @@ fec_enet_set_eee(struct net_device *ndev, struct ethtool_keee *edata)</div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return -ENETDOWN;</div><div class='ctx'> </div><div class='del'>-	p-&gt;tx_lpi_timer = edata-&gt;tx_lpi_timer;</div><div class='del'>-</div><div class='ctx'> 	return phy_ethtool_set_eee(ndev-&gt;phydev, edata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3282,7 +3311,8 @@ static void fec_enet_free_buffers(struct net_device *ndev)</div><div class='ctx'> 	for (q = 0; q &lt; fep-&gt;num_rx_queues; q++) {</div><div class='ctx'> 		rxq = fep-&gt;rx_queue[q];</div><div class='ctx'> 		for (i = 0; i &lt; rxq-&gt;bd.ring_size; i++)</div><div class='del'>-			page_pool_put_full_page(rxq-&gt;page_pool, rxq-&gt;rx_skb_info[i].page, false);</div><div class='add'>+			page_pool_put_full_page(rxq-&gt;page_pool, rxq-&gt;rx_buf[i],</div><div class='add'>+						false);</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; XDP_STATS_TOTAL; i++)</div><div class='ctx'> 			rxq-&gt;stats[i] = 0;</div><div class='hunk'>@@ -3311,7 +3341,8 @@ static void fec_enet_free_buffers(struct net_device *ndev)</div><div class='ctx'> 			} else {</div><div class='ctx'> 				struct page *page = txq-&gt;tx_buf[i].buf_p;</div><div class='ctx'> </div><div class='del'>-				page_pool_put_page(page-&gt;pp, page, 0, false);</div><div class='add'>+				page_pool_put_page(pp_page_to_nmdesc(page)-&gt;pp,</div><div class='add'>+						   page, 0, false);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			txq-&gt;tx_buf[i].buf_p = NULL;</div><div class='hunk'>@@ -3407,6 +3438,19 @@ fec_enet_alloc_rxq_buffers(struct net_device *ndev, unsigned int queue)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Some platforms require the RX buffer must be 64 bytes alignment.</div><div class='add'>+	 * Some platforms require 16 bytes alignment. And some platforms</div><div class='add'>+	 * require 4 bytes alignment. But since the page pool have been</div><div class='add'>+	 * introduced into the driver, the address of RX buffer is always</div><div class='add'>+	 * the page address plus FEC_ENET_XDP_HEADROOM, and</div><div class='add'>+	 * FEC_ENET_XDP_HEADROOM is 256 bytes. Therefore, this address can</div><div class='add'>+	 * satisfy all platforms. To prevent future modifications to</div><div class='add'>+	 * FEC_ENET_XDP_HEADROOM from ignoring this hardware limitation, a</div><div class='add'>+	 * BUILD_BUG_ON() test has been added, which ensures that</div><div class='add'>+	 * FEC_ENET_XDP_HEADROOM provides the required alignment.</div><div class='add'>+	 */</div><div class='add'>+	BUILD_BUG_ON(FEC_ENET_XDP_HEADROOM &amp; 0x3f);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; rxq-&gt;bd.ring_size; i++) {</div><div class='ctx'> 		page = page_pool_dev_alloc_pages(rxq-&gt;page_pool);</div><div class='ctx'> 		if (!page)</div><div class='hunk'>@@ -3415,8 +3459,7 @@ fec_enet_alloc_rxq_buffers(struct net_device *ndev, unsigned int queue)</div><div class='ctx'> 		phys_addr = page_pool_get_dma_addr(page) + FEC_ENET_XDP_HEADROOM;</div><div class='ctx'> 		bdp-&gt;cbd_bufaddr = cpu_to_fec32(phys_addr);</div><div class='ctx'> </div><div class='del'>-		rxq-&gt;rx_skb_info[i].page = page;</div><div class='del'>-		rxq-&gt;rx_skb_info[i].offset = FEC_ENET_XDP_HEADROOM;</div><div class='add'>+		rxq-&gt;rx_buf[i] = page;</div><div class='ctx'> 		bdp-&gt;cbd_sc = cpu_to_fec16(BD_ENET_RX_EMPTY);</div><div class='ctx'> </div><div class='ctx'> 		if (fep-&gt;bufdesc_ex) {</div><div class='hunk'>@@ -3429,7 +3472,7 @@ fec_enet_alloc_rxq_buffers(struct net_device *ndev, unsigned int queue)</div><div class='ctx'> </div><div class='ctx'> 	/* Set the last buffer to wrap. */</div><div class='ctx'> 	bdp = fec_enet_get_prevdesc(bdp, &amp;rxq-&gt;bd);</div><div class='del'>-	bdp-&gt;cbd_sc |= cpu_to_fec16(BD_SC_WRAP);</div><div class='add'>+	bdp-&gt;cbd_sc |= cpu_to_fec16(BD_ENET_RX_WRAP);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'>  err_alloc:</div><div class='hunk'>@@ -3465,7 +3508,7 @@ fec_enet_alloc_txq_buffers(struct net_device *ndev, unsigned int queue)</div><div class='ctx'> </div><div class='ctx'> 	/* Set the last buffer to wrap. */</div><div class='ctx'> 	bdp = fec_enet_get_prevdesc(bdp, &amp;txq-&gt;bd);</div><div class='del'>-	bdp-&gt;cbd_sc |= cpu_to_fec16(BD_SC_WRAP);</div><div class='add'>+	bdp-&gt;cbd_sc |= cpu_to_fec16(BD_ENET_TX_WRAP);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -3558,7 +3601,6 @@ err_enet_mii_probe:</div><div class='ctx'> err_enet_alloc:</div><div class='ctx'> 	fec_enet_clk_enable(ndev, false);</div><div class='ctx'> clk_enable:</div><div class='del'>-	pm_runtime_mark_last_busy(&amp;fep-&gt;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(&amp;fep-&gt;pdev-&gt;dev);</div><div class='ctx'> 	pinctrl_pm_select_sleep_state(&amp;fep-&gt;pdev-&gt;dev);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -3568,8 +3610,9 @@ static int</div><div class='ctx'> fec_enet_close(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='add'>+	struct phy_device *phy_dev = ndev-&gt;phydev;</div><div class='ctx'> </div><div class='del'>-	phy_stop(ndev-&gt;phydev);</div><div class='add'>+	phy_stop(phy_dev);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_device_present(ndev)) {</div><div class='ctx'> 		napi_disable(&amp;fep-&gt;napi);</div><div class='hunk'>@@ -3577,7 +3620,10 @@ fec_enet_close(struct net_device *ndev)</div><div class='ctx'> 		fec_stop(ndev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phy_disconnect(ndev-&gt;phydev);</div><div class='add'>+	phy_disconnect(phy_dev);</div><div class='add'>+</div><div class='add'>+	if (!fep-&gt;phy_node &amp;&amp; phy_is_pseudo_fixed_link(phy_dev))</div><div class='add'>+		fixed_phy_unregister(phy_dev);</div><div class='ctx'> </div><div class='ctx'> 	if (fep-&gt;quirks &amp; FEC_QUIRK_ERR006687)</div><div class='ctx'> 		imx6q_cpuidle_fec_irqs_unused();</div><div class='hunk'>@@ -3589,7 +3635,6 @@ fec_enet_close(struct net_device *ndev)</div><div class='ctx'> 		cpu_latency_qos_remove_request(&amp;fep-&gt;pm_qos_req);</div><div class='ctx'> </div><div class='ctx'> 	pinctrl_pm_select_sleep_state(&amp;fep-&gt;pdev-&gt;dev);</div><div class='del'>-	pm_runtime_mark_last_busy(&amp;fep-&gt;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(&amp;fep-&gt;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	fec_enet_free_buffers(ndev);</div><div class='hunk'>@@ -3662,7 +3707,6 @@ static void set_multicast_list(struct net_device *ndev)</div><div class='ctx'> static int</div><div class='ctx'> fec_set_mac_address(struct net_device *ndev, void *p)</div><div class='ctx'> {</div><div class='del'>-	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='ctx'> 	struct sockaddr *addr = p;</div><div class='ctx'> </div><div class='ctx'> 	if (addr) {</div><div class='hunk'>@@ -3679,11 +3723,8 @@ fec_set_mac_address(struct net_device *ndev, void *p)</div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	writel(ndev-&gt;dev_addr[3] | (ndev-&gt;dev_addr[2] &lt;&lt; 8) |</div><div class='del'>-		(ndev-&gt;dev_addr[1] &lt;&lt; 16) | (ndev-&gt;dev_addr[0] &lt;&lt; 24),</div><div class='del'>-		fep-&gt;hwp + FEC_ADDR_LOW);</div><div class='del'>-	writel((ndev-&gt;dev_addr[5] &lt;&lt; 16) | (ndev-&gt;dev_addr[4] &lt;&lt; 24),</div><div class='del'>-		fep-&gt;hwp + FEC_ADDR_HIGH);</div><div class='add'>+	fec_set_hw_mac_addr(ndev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3983,6 +4024,23 @@ static int fec_hwtstamp_set(struct net_device *ndev,</div><div class='ctx'> 	return fec_ptp_set(ndev, config, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int fec_change_mtu(struct net_device *ndev, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct fec_enet_private *fep = netdev_priv(ndev);</div><div class='add'>+	int order;</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	order = get_order(new_mtu + ETH_HLEN + ETH_FCS_LEN</div><div class='add'>+			  + FEC_DRV_RESERVE_SPACE);</div><div class='add'>+	fep-&gt;rx_frame_size = (PAGE_SIZE &lt;&lt; order) - FEC_DRV_RESERVE_SPACE;</div><div class='add'>+	fep-&gt;pagepool_order = order;</div><div class='add'>+	WRITE_ONCE(ndev-&gt;mtu, new_mtu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops fec_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= fec_enet_open,</div><div class='ctx'> 	.ndo_stop		= fec_enet_close,</div><div class='hunk'>@@ -3992,6 +4050,7 @@ static const struct net_device_ops fec_netdev_ops = {</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_tx_timeout		= fec_timeout,</div><div class='ctx'> 	.ndo_set_mac_address	= fec_set_mac_address,</div><div class='add'>+	.ndo_change_mtu		= fec_change_mtu,</div><div class='ctx'> 	.ndo_eth_ioctl		= phy_do_ioctl_running,</div><div class='ctx'> 	.ndo_set_features	= fec_set_features,</div><div class='ctx'> 	.ndo_bpf		= fec_enet_bpf,</div><div class='hunk'>@@ -4026,10 +4085,8 @@ static int fec_enet_init(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(dsize != (1 &lt;&lt; dsize_log2));</div><div class='ctx'> #if defined(CONFIG_ARM) || defined(CONFIG_ARM64)</div><div class='del'>-	fep-&gt;rx_align = 0xf;</div><div class='ctx'> 	fep-&gt;tx_align = 0xf;</div><div class='ctx'> #else</div><div class='del'>-	fep-&gt;rx_align = 0x3;</div><div class='ctx'> 	fep-&gt;tx_align = 0x3;</div><div class='ctx'> #endif</div><div class='ctx'> 	fep-&gt;rx_pkts_itr = FEC_ITR_ICFT_DEFAULT;</div><div class='hunk'>@@ -4118,10 +4175,8 @@ static int fec_enet_init(struct net_device *ndev)</div><div class='ctx'> 		fep-&gt;csum_flags |= FLAG_RX_CSUM_ENABLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (fep-&gt;quirks &amp; FEC_QUIRK_HAS_MULTI_QUEUES) {</div><div class='add'>+	if (fep-&gt;quirks &amp; FEC_QUIRK_HAS_MULTI_QUEUES)</div><div class='ctx'> 		fep-&gt;tx_align = 0;</div><div class='del'>-		fep-&gt;rx_align = 0x3f;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ndev-&gt;hw_features = ndev-&gt;features;</div><div class='ctx'> </div><div class='hunk'>@@ -4339,11 +4394,9 @@ fec_probe(struct platform_device *pdev)</div><div class='ctx'> 	fep-&gt;num_rx_queues = num_rx_qs;</div><div class='ctx'> 	fep-&gt;num_tx_queues = num_tx_qs;</div><div class='ctx'> </div><div class='del'>-#if !defined(CONFIG_M5272)</div><div class='ctx'> 	/* default enable pause frame auto negotiation */</div><div class='ctx'> 	if (fep-&gt;quirks &amp; FEC_QUIRK_HAS_GBIT)</div><div class='ctx'> 		fep-&gt;pause_flag |= FEC_PAUSE_FLAG_AUTONEG;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> 	/* Select default pin state */</div><div class='ctx'> 	pinctrl_pm_select_default_state(&amp;pdev-&gt;dev);</div><div class='hunk'>@@ -4522,7 +4575,15 @@ fec_probe(struct platform_device *pdev)</div><div class='ctx'> 	fec_enet_clk_enable(ndev, false);</div><div class='ctx'> 	pinctrl_pm_select_sleep_state(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	ndev-&gt;max_mtu = PKT_MAXBUF_SIZE - ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+	fep-&gt;pagepool_order = 0;</div><div class='add'>+	fep-&gt;rx_frame_size = FEC_ENET_RX_FRSIZE;</div><div class='add'>+</div><div class='add'>+	if (fep-&gt;quirks &amp; FEC_QUIRK_JUMBO_FRAME)</div><div class='add'>+		fep-&gt;max_buf_size = MAX_JUMBO_BUF_SIZE;</div><div class='add'>+	else</div><div class='add'>+		fep-&gt;max_buf_size = PKT_MAXBUF_SIZE;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;max_mtu = fep-&gt;max_buf_size - ETH_HLEN - ETH_FCS_LEN;</div><div class='ctx'> </div><div class='ctx'> 	ret = register_netdev(ndev);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -4536,7 +4597,6 @@ fec_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;fep-&gt;tx_timeout_work, fec_enet_timeout_work);</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(&amp;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fec_mpc52xx.c b/drivers/net/ethernet/freescale/fec_mpc52xx.c<br/>index 2bfaf14f65c8..3fc29afc9854 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fec_mpc52xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fec_mpc52xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fec_mpc52xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/fec_mpc52xx.c</a></div><div class='hunk'>@@ -619,7 +619,7 @@ static void mpc52xx_fec_hw_init(struct net_device *dev)</div><div class='ctx'> 	out_be32(&amp;fec-&gt;rfifo_alarm, 0x0000030c);</div><div class='ctx'> 	out_be32(&amp;fec-&gt;tfifo_alarm, 0x00000100);</div><div class='ctx'> </div><div class='del'>-	/* begin transmittion when 256 bytes are in FIFO (or EOF or FIFO full) */</div><div class='add'>+	/* begin transmission when 256 bytes are in FIFO (or EOF or FIFO full) */</div><div class='ctx'> 	out_be32(&amp;fec-&gt;x_wmrk, FEC_FIFO_WMRK_256B);</div><div class='ctx'> </div><div class='ctx'> 	/* enable crc generation */</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c<br/>index 7f6b57432071..4b7bad9a485d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fec_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fec_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fec_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/fec_ptp.c</a></div><div class='hunk'>@@ -7,31 +7,30 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/workqueue.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/fec.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;linux/fec.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/ptrace.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fec.h"</div><div class='ctx'> </div><div class='hunk'>@@ -97,7 +96,7 @@</div><div class='ctx'>  * cyclecounter structure used to construct a ns counter from the</div><div class='ctx'>  * arbitrary fixed point registers</div><div class='ctx'>  */</div><div class='del'>-static u64 fec_ptp_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 fec_ptp_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct fec_enet_private *fep =</div><div class='ctx'> 		container_of(cc, struct fec_enet_private, cc);</div><div class='hunk'>@@ -118,7 +117,7 @@ static u64 fec_ptp_read(const struct cyclecounter *cc)</div><div class='ctx'>  * @fep: the fec_enet_private structure handle</div><div class='ctx'>  * @enable: enable the channel pps output</div><div class='ctx'>  *</div><div class='del'>- * This function enble the PPS ouput on the timer channel.</div><div class='add'>+ * This function enables the PPS output on the timer channel.</div><div class='ctx'>  */</div><div class='ctx'> static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)</div><div class='ctx'> {</div><div class='hunk'>@@ -129,6 +128,12 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;fep-&gt;tmreg_lock, flags);</div><div class='ctx'> </div><div class='add'>+	if (fep-&gt;perout_enable) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;fep-&gt;tmreg_lock, flags);</div><div class='add'>+		dev_err(&amp;fep-&gt;pdev-&gt;dev, "PEROUT is running");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (fep-&gt;pps_enable == enable) {</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;fep-&gt;tmreg_lock, flags);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -173,7 +178,7 @@ static int fec_ptp_enable_pps(struct fec_enet_private *fep, uint enable)</div><div class='ctx'> 		 * very close to the second point, which means NSEC_PER_SEC</div><div class='ctx'> 		 * - ts.tv_nsec is close to be zero(For example 20ns); Since the timer</div><div class='ctx'> 		 * is still running when we calculate the first compare event, it is</div><div class='del'>-		 * possible that the remaining nanoseonds run out before the compare</div><div class='add'>+		 * possible that the remaining nanoseconds run out before the compare</div><div class='ctx'> 		 * counter is calculated and written into TCCR register. To avoid</div><div class='ctx'> 		 * this possibility, we will set the compare event to be the next</div><div class='ctx'> 		 * of next second. The current setting is 31-bit timer and wrap</div><div class='hunk'>@@ -244,6 +249,7 @@ static int fec_ptp_pps_perout(struct fec_enet_private *fep)</div><div class='ctx'> 	 * the FEC_TCCR register in time and missed the start time.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (fep-&gt;perout_stime &lt; curr_time + 100 * NSEC_PER_MSEC) {</div><div class='add'>+		fep-&gt;perout_enable = false;</div><div class='ctx'> 		dev_err(&amp;fep-&gt;pdev-&gt;dev, "Current time is too close to the start time!\n");</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;fep-&gt;tmreg_lock, flags);</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -498,7 +504,10 @@ static int fec_ptp_pps_disable(struct fec_enet_private *fep, uint channel)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	hrtimer_cancel(&amp;fep-&gt;perout_timer);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;fep-&gt;tmreg_lock, flags);</div><div class='add'>+	fep-&gt;perout_enable = false;</div><div class='ctx'> 	writel(0, fep-&gt;hwp + FEC_TCSR(channel));</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;fep-&gt;tmreg_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -530,6 +539,8 @@ static int fec_ptp_enable(struct ptp_clock_info *ptp,</div><div class='ctx'> </div><div class='ctx'> 		return ret;</div><div class='ctx'> 	} else if (rq-&gt;type == PTP_CLK_REQ_PEROUT) {</div><div class='add'>+		u32 reload_period;</div><div class='add'>+</div><div class='ctx'> 		/* Reject requests with unsupported flags */</div><div class='ctx'> 		if (rq-&gt;perout.flags)</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='hunk'>@@ -549,12 +560,14 @@ static int fec_ptp_enable(struct ptp_clock_info *ptp,</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		fep-&gt;reload_period = div_u64(period_ns, 2);</div><div class='del'>-		if (on &amp;&amp; fep-&gt;reload_period) {</div><div class='add'>+		reload_period = div_u64(period_ns, 2);</div><div class='add'>+		if (on &amp;&amp; reload_period) {</div><div class='add'>+			u64 perout_stime;</div><div class='add'>+</div><div class='ctx'> 			/* Convert 1588 timestamp to ns*/</div><div class='ctx'> 			start_time.tv_sec = rq-&gt;perout.start.sec;</div><div class='ctx'> 			start_time.tv_nsec = rq-&gt;perout.start.nsec;</div><div class='del'>-			fep-&gt;perout_stime = timespec64_to_ns(&amp;start_time);</div><div class='add'>+			perout_stime = timespec64_to_ns(&amp;start_time);</div><div class='ctx'> </div><div class='ctx'> 			mutex_lock(&amp;fep-&gt;ptp_clk_mutex);</div><div class='ctx'> 			if (!fep-&gt;ptp_clk_on) {</div><div class='hunk'>@@ -563,18 +576,41 @@ static int fec_ptp_enable(struct ptp_clock_info *ptp,</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='ctx'> 			}</div><div class='ctx'> 			spin_lock_irqsave(&amp;fep-&gt;tmreg_lock, flags);</div><div class='add'>+</div><div class='add'>+			if (fep-&gt;pps_enable) {</div><div class='add'>+				dev_err(&amp;fep-&gt;pdev-&gt;dev, "PPS is running");</div><div class='add'>+				ret = -EBUSY;</div><div class='add'>+				goto unlock;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (fep-&gt;perout_enable) {</div><div class='add'>+				dev_err(&amp;fep-&gt;pdev-&gt;dev,</div><div class='add'>+					"PEROUT has been enabled\n");</div><div class='add'>+				ret = -EBUSY;</div><div class='add'>+				goto unlock;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			/* Read current timestamp */</div><div class='ctx'> 			curr_time = timecounter_read(&amp;fep-&gt;tc);</div><div class='del'>-			spin_unlock_irqrestore(&amp;fep-&gt;tmreg_lock, flags);</div><div class='del'>-			mutex_unlock(&amp;fep-&gt;ptp_clk_mutex);</div><div class='add'>+			if (perout_stime &lt;= curr_time) {</div><div class='add'>+				dev_err(&amp;fep-&gt;pdev-&gt;dev,</div><div class='add'>+					"Start time must be greater than current time\n");</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto unlock;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			/* Calculate time difference */</div><div class='del'>-			delta = fep-&gt;perout_stime - curr_time;</div><div class='add'>+			delta = perout_stime - curr_time;</div><div class='add'>+			fep-&gt;reload_period = reload_period;</div><div class='add'>+			fep-&gt;perout_stime = perout_stime;</div><div class='add'>+			fep-&gt;perout_enable = true;</div><div class='ctx'> </div><div class='del'>-			if (fep-&gt;perout_stime &lt;= curr_time) {</div><div class='del'>-				dev_err(&amp;fep-&gt;pdev-&gt;dev, "Start time must larger than current time!\n");</div><div class='del'>-				return -EINVAL;</div><div class='del'>-			}</div><div class='add'>+unlock:</div><div class='add'>+			spin_unlock_irqrestore(&amp;fep-&gt;tmreg_lock, flags);</div><div class='add'>+			mutex_unlock(&amp;fep-&gt;ptp_clk_mutex);</div><div class='add'>+</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='ctx'> </div><div class='ctx'> 			/* Because the timer counter of FEC only has 31-bits, correspondingly,</div><div class='ctx'> 			 * the time comparison register FEC_TCCR also only low 31 bits can be</div><div class='hunk'>@@ -682,8 +718,11 @@ static irqreturn_t fec_pps_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		fep-&gt;next_counter = (fep-&gt;next_counter + fep-&gt;reload_period) &amp;</div><div class='ctx'> 				fep-&gt;cc.mask;</div><div class='ctx'> </div><div class='del'>-		event.type = PTP_CLOCK_PPS;</div><div class='del'>-		ptp_clock_event(fep-&gt;ptp_clock, &amp;event);</div><div class='add'>+		if (fep-&gt;pps_enable) {</div><div class='add'>+			event.type = PTP_CLOCK_PPS;</div><div class='add'>+			ptp_clock_event(fep-&gt;ptp_clock, &amp;event);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		return IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -739,8 +778,8 @@ void fec_ptp_init(struct platform_device *pdev, int irq_idx)</div><div class='ctx'> </div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;fep-&gt;time_keep, fec_time_keep);</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;fep-&gt;perout_timer, CLOCK_REALTIME, HRTIMER_MODE_REL);</div><div class='del'>-	fep-&gt;perout_timer.function = fec_ptp_pps_perout_handler;</div><div class='add'>+	hrtimer_setup(&amp;fep-&gt;perout_timer, fec_ptp_pps_perout_handler, CLOCK_REALTIME,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='ctx'> 	irq = platform_get_irq_byname_optional(pdev, "pps");</div><div class='ctx'> 	if (irq &lt; 0)</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fman/fman.c b/drivers/net/ethernet/freescale/fman/fman.c<br/>index fb416d60dcd7..11887458f050 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fman/fman.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fman/fman.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fman/fman.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/fman/fman.c</a></div><div class='hunk'>@@ -2690,13 +2690,12 @@ static struct fman *read_dts_node(struct platform_device *of_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fman *fman;</div><div class='ctx'> 	struct device_node *fm_node, *muram_node;</div><div class='add'>+	void __iomem *base_addr;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	u32 val, range[2];</div><div class='ctx'> 	int err, irq;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	u32 clk_rate;</div><div class='del'>-	phys_addr_t phys_base_addr;</div><div class='del'>-	resource_size_t mem_size;</div><div class='ctx'> </div><div class='ctx'> 	fman = kzalloc(sizeof(*fman), GFP_KERNEL);</div><div class='ctx'> 	if (!fman)</div><div class='hunk'>@@ -2724,18 +2723,6 @@ static struct fman *read_dts_node(struct platform_device *of_dev)</div><div class='ctx'> 		goto fman_node_put;</div><div class='ctx'> 	fman-&gt;dts_params.err_irq = err;</div><div class='ctx'> </div><div class='del'>-	/* Get the FM address */</div><div class='del'>-	res = platform_get_resource(of_dev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (!res) {</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-		dev_err(&amp;of_dev-&gt;dev, "%s: Can't get FMan memory resource\n",</div><div class='del'>-			__func__);</div><div class='del'>-		goto fman_node_put;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	phys_base_addr = res-&gt;start;</div><div class='del'>-	mem_size = resource_size(res);</div><div class='del'>-</div><div class='ctx'> 	clk = of_clk_get(fm_node, 0);</div><div class='ctx'> 	if (IS_ERR(clk)) {</div><div class='ctx'> 		err = PTR_ERR(clk);</div><div class='hunk'>@@ -2803,24 +2790,16 @@ static struct fman *read_dts_node(struct platform_device *of_dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fman-&gt;dts_params.res =</div><div class='del'>-		devm_request_mem_region(&amp;of_dev-&gt;dev, phys_base_addr,</div><div class='del'>-					mem_size, "fman");</div><div class='del'>-	if (!fman-&gt;dts_params.res) {</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		dev_err(&amp;of_dev-&gt;dev, "%s: request_mem_region() failed\n",</div><div class='del'>-			__func__);</div><div class='del'>-		goto fman_free;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	fman-&gt;dts_params.base_addr =</div><div class='del'>-		devm_ioremap(&amp;of_dev-&gt;dev, phys_base_addr, mem_size);</div><div class='del'>-	if (!fman-&gt;dts_params.base_addr) {</div><div class='del'>-		err = -ENOMEM;</div><div class='add'>+	base_addr = devm_platform_get_and_ioremap_resource(of_dev, 0, &amp;res);</div><div class='add'>+	if (IS_ERR(base_addr)) {</div><div class='add'>+		err = PTR_ERR(base_addr);</div><div class='ctx'> 		dev_err(&amp;of_dev-&gt;dev, "%s: devm_ioremap() failed\n", __func__);</div><div class='ctx'> 		goto fman_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	fman-&gt;dts_params.base_addr = base_addr;</div><div class='add'>+	fman-&gt;dts_params.res = res;</div><div class='add'>+</div><div class='ctx'> 	fman-&gt;dev = &amp;of_dev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	err = of_platform_populate(fm_node, NULL, NULL, &amp;of_dev-&gt;dev);</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c<br/>index 85617bb94959..51402dff72c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fman/fman_dtsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fman/fman_dtsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fman/fman_dtsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/fman/fman_dtsec.c</a></div><div class='hunk'>@@ -755,12 +755,12 @@ static struct fman_mac *pcs_to_dtsec(struct phylink_pcs *pcs)</div><div class='ctx'> 	return container_of(pcs, struct fman_mac, pcs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dtsec_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+static void dtsec_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 				struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct fman_mac *dtsec = pcs_to_dtsec(pcs);</div><div class='ctx'> </div><div class='del'>-	phylink_mii_c22_pcs_get_state(dtsec-&gt;tbidev, state);</div><div class='add'>+	phylink_mii_c22_pcs_get_state(dtsec-&gt;tbidev, neg_mode, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dtsec_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='hunk'>@@ -1446,7 +1446,6 @@ int dtsec_initialization(struct mac_device *mac_dev,</div><div class='ctx'> 		goto _return_fm_mac_free;</div><div class='ctx'> 	}</div><div class='ctx'> 	dtsec-&gt;pcs.ops = &amp;dtsec_pcs_ops;</div><div class='del'>-	dtsec-&gt;pcs.neg_mode = true;</div><div class='ctx'> 	dtsec-&gt;pcs.poll = true;</div><div class='ctx'> </div><div class='ctx'> 	supported = mac_dev-&gt;phylink_config.supported_interfaces;</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fman/fman_memac.c b/drivers/net/ethernet/freescale/fman/fman_memac.c<br/>index 3925441143fa..c84f0336c94c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fman/fman_memac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fman/fman_memac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fman/fman_memac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/fman/fman_memac.c</a></div><div class='hunk'>@@ -649,6 +649,7 @@ static u32 memac_if_mode(phy_interface_t interface)</div><div class='ctx'> 		return IF_MODE_GMII | IF_MODE_RGMII;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_SGMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_QSGMII:</div><div class='ctx'> 		return IF_MODE_GMII;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_10GBASER:</div><div class='hunk'>@@ -667,6 +668,7 @@ static struct phylink_pcs *memac_select_pcs(struct phylink_config *config,</div><div class='ctx'> 	switch (iface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_SGMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='ctx'> 		return memac-&gt;sgmii_pcs;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_QSGMII:</div><div class='ctx'> 		return memac-&gt;qsgmii_pcs;</div><div class='hunk'>@@ -685,6 +687,7 @@ static int memac_prepare(struct phylink_config *config, unsigned int mode,</div><div class='ctx'> 	switch (iface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_SGMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_QSGMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_10GBASER:</div><div class='ctx'> 		return phy_set_mode_ext(memac-&gt;serdes, PHY_MODE_ETHERNET,</div><div class='hunk'>@@ -897,6 +900,89 @@ static int memac_set_exception(struct fman_mac *memac,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u64 memac_read64(void __iomem *reg)</div><div class='add'>+{</div><div class='add'>+	u32 low, high, tmp;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		high = ioread32be(reg + 4);</div><div class='add'>+		low = ioread32be(reg);</div><div class='add'>+		tmp = ioread32be(reg + 4);</div><div class='add'>+	} while (high != tmp);</div><div class='add'>+</div><div class='add'>+	return ((u64)high &lt;&lt; 32) | low;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void memac_get_pause_stats(struct fman_mac *memac,</div><div class='add'>+				  struct ethtool_pause_stats *s)</div><div class='add'>+{</div><div class='add'>+	s-&gt;tx_pause_frames = memac_read64(&amp;memac-&gt;regs-&gt;txpf_l);</div><div class='add'>+	s-&gt;rx_pause_frames = memac_read64(&amp;memac-&gt;regs-&gt;rxpf_l);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range memac_rmon_ranges[] = {</div><div class='add'>+	{   64,   64 },</div><div class='add'>+	{   65,  127 },</div><div class='add'>+	{  128,  255 },</div><div class='add'>+	{  256,  511 },</div><div class='add'>+	{  512, 1023 },</div><div class='add'>+	{ 1024, 1518 },</div><div class='add'>+	{ 1519, 9600 },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void memac_get_rmon_stats(struct fman_mac *memac,</div><div class='add'>+				 struct ethtool_rmon_stats *s,</div><div class='add'>+				 const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	s-&gt;undersize_pkts = memac_read64(&amp;memac-&gt;regs-&gt;rund_l);</div><div class='add'>+	s-&gt;oversize_pkts = memac_read64(&amp;memac-&gt;regs-&gt;rovr_l);</div><div class='add'>+	s-&gt;fragments = memac_read64(&amp;memac-&gt;regs-&gt;rfrg_l);</div><div class='add'>+	s-&gt;jabbers = memac_read64(&amp;memac-&gt;regs-&gt;rjbr_l);</div><div class='add'>+</div><div class='add'>+	s-&gt;hist[0] = memac_read64(&amp;memac-&gt;regs-&gt;r64_l);</div><div class='add'>+	s-&gt;hist[1] = memac_read64(&amp;memac-&gt;regs-&gt;r127_l);</div><div class='add'>+	s-&gt;hist[2] = memac_read64(&amp;memac-&gt;regs-&gt;r255_l);</div><div class='add'>+	s-&gt;hist[3] = memac_read64(&amp;memac-&gt;regs-&gt;r511_l);</div><div class='add'>+	s-&gt;hist[4] = memac_read64(&amp;memac-&gt;regs-&gt;r1023_l);</div><div class='add'>+	s-&gt;hist[5] = memac_read64(&amp;memac-&gt;regs-&gt;r1518_l);</div><div class='add'>+	s-&gt;hist[6] = memac_read64(&amp;memac-&gt;regs-&gt;r1519x_l);</div><div class='add'>+</div><div class='add'>+	s-&gt;hist_tx[0] = memac_read64(&amp;memac-&gt;regs-&gt;t64_l);</div><div class='add'>+	s-&gt;hist_tx[1] = memac_read64(&amp;memac-&gt;regs-&gt;t127_l);</div><div class='add'>+	s-&gt;hist_tx[2] = memac_read64(&amp;memac-&gt;regs-&gt;t255_l);</div><div class='add'>+	s-&gt;hist_tx[3] = memac_read64(&amp;memac-&gt;regs-&gt;t511_l);</div><div class='add'>+	s-&gt;hist_tx[4] = memac_read64(&amp;memac-&gt;regs-&gt;t1023_l);</div><div class='add'>+	s-&gt;hist_tx[5] = memac_read64(&amp;memac-&gt;regs-&gt;t1518_l);</div><div class='add'>+	s-&gt;hist_tx[6] = memac_read64(&amp;memac-&gt;regs-&gt;t1519x_l);</div><div class='add'>+</div><div class='add'>+	*ranges = memac_rmon_ranges;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void memac_get_eth_ctrl_stats(struct fman_mac *memac,</div><div class='add'>+				     struct ethtool_eth_ctrl_stats *s)</div><div class='add'>+{</div><div class='add'>+	s-&gt;MACControlFramesTransmitted = memac_read64(&amp;memac-&gt;regs-&gt;tcnp_l);</div><div class='add'>+	s-&gt;MACControlFramesReceived = memac_read64(&amp;memac-&gt;regs-&gt;rcnp_l);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void memac_get_eth_mac_stats(struct fman_mac *memac,</div><div class='add'>+				    struct ethtool_eth_mac_stats *s)</div><div class='add'>+{</div><div class='add'>+	s-&gt;FramesTransmittedOK = memac_read64(&amp;memac-&gt;regs-&gt;tfrm_l);</div><div class='add'>+	s-&gt;FramesReceivedOK = memac_read64(&amp;memac-&gt;regs-&gt;rfrm_l);</div><div class='add'>+	s-&gt;FrameCheckSequenceErrors = memac_read64(&amp;memac-&gt;regs-&gt;rfcs_l);</div><div class='add'>+	s-&gt;AlignmentErrors = memac_read64(&amp;memac-&gt;regs-&gt;raln_l);</div><div class='add'>+	s-&gt;OctetsTransmittedOK = memac_read64(&amp;memac-&gt;regs-&gt;teoct_l);</div><div class='add'>+	s-&gt;FramesLostDueToIntMACXmitError = memac_read64(&amp;memac-&gt;regs-&gt;terr_l);</div><div class='add'>+	s-&gt;OctetsReceivedOK = memac_read64(&amp;memac-&gt;regs-&gt;reoct_l);</div><div class='add'>+	s-&gt;FramesLostDueToIntMACRcvError = memac_read64(&amp;memac-&gt;regs-&gt;rdrntp_l);</div><div class='add'>+	s-&gt;MulticastFramesXmittedOK = memac_read64(&amp;memac-&gt;regs-&gt;tmca_l);</div><div class='add'>+	s-&gt;BroadcastFramesXmittedOK = memac_read64(&amp;memac-&gt;regs-&gt;tbca_l);</div><div class='add'>+	s-&gt;MulticastFramesReceivedOK = memac_read64(&amp;memac-&gt;regs-&gt;rmca_l);</div><div class='add'>+	s-&gt;BroadcastFramesReceivedOK = memac_read64(&amp;memac-&gt;regs-&gt;rbca_l);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int memac_init(struct fman_mac *memac)</div><div class='ctx'> {</div><div class='ctx'> 	struct memac_cfg *memac_drv_param;</div><div class='hunk'>@@ -1089,6 +1175,10 @@ int memac_initialization(struct mac_device *mac_dev,</div><div class='ctx'> 	mac_dev-&gt;set_tstamp		= memac_set_tstamp;</div><div class='ctx'> 	mac_dev-&gt;enable			= memac_enable;</div><div class='ctx'> 	mac_dev-&gt;disable		= memac_disable;</div><div class='add'>+	mac_dev-&gt;get_pause_stats	= memac_get_pause_stats;</div><div class='add'>+	mac_dev-&gt;get_rmon_stats		= memac_get_rmon_stats;</div><div class='add'>+	mac_dev-&gt;get_eth_ctrl_stats	= memac_get_eth_ctrl_stats;</div><div class='add'>+	mac_dev-&gt;get_eth_mac_stats	= memac_get_eth_mac_stats;</div><div class='ctx'> </div><div class='ctx'> 	mac_dev-&gt;fman_mac = memac_config(mac_dev, params);</div><div class='ctx'> 	if (!mac_dev-&gt;fman_mac)</div><div class='hunk'>@@ -1225,7 +1315,8 @@ int memac_initialization(struct mac_device *mac_dev,</div><div class='ctx'> 	 * be careful and not enable this if we are using MII or RGMII, since</div><div class='ctx'> 	 * those configurations modes don't use in-band autonegotiation.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!of_property_read_bool(mac_node, "managed") &amp;&amp;</div><div class='add'>+	if (!of_property_present(mac_node, "managed") &amp;&amp;</div><div class='add'>+	    mac_dev-&gt;phy_if != PHY_INTERFACE_MODE_2500BASEX &amp;&amp;</div><div class='ctx'> 	    mac_dev-&gt;phy_if != PHY_INTERFACE_MODE_MII &amp;&amp;</div><div class='ctx'> 	    !phy_interface_mode_is_rgmii(mac_dev-&gt;phy_if))</div><div class='ctx'> 		mac_dev-&gt;phylink_config.default_an_inband = true;</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fman/mac.c b/drivers/net/ethernet/freescale/fman/mac.c<br/>index a39fcea6a77a..f27ff625fe29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fman/mac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fman/mac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fman/mac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/fman/mac.c</a></div><div class='hunk'>@@ -14,8 +14,6 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/phy_fixed.h&gt;</div><div class='del'>-#include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/libfdt_env.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fman/mac.h b/drivers/net/ethernet/freescale/fman/mac.h<br/>index 955ace338965..63c2c5b4f99e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fman/mac.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fman/mac.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fman/mac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/fman/mac.h</a></div><div class='hunk'>@@ -16,6 +16,11 @@</div><div class='ctx'> #include "fman.h"</div><div class='ctx'> #include "fman_mac.h"</div><div class='ctx'> </div><div class='add'>+struct ethtool_eth_ctrl_stats;</div><div class='add'>+struct ethtool_eth_mac_stats;</div><div class='add'>+struct ethtool_pause_stats;</div><div class='add'>+struct ethtool_rmon_stats;</div><div class='add'>+struct ethtool_rmon_hist_range;</div><div class='ctx'> struct fman_mac;</div><div class='ctx'> struct mac_priv_s;</div><div class='ctx'> </div><div class='hunk'>@@ -46,6 +51,15 @@ struct mac_device {</div><div class='ctx'> 				 enet_addr_t *eth_addr);</div><div class='ctx'> 	int (*remove_hash_mac_addr)(struct fman_mac *mac_dev,</div><div class='ctx'> 				    enet_addr_t *eth_addr);</div><div class='add'>+	void (*get_pause_stats)(struct fman_mac *memac,</div><div class='add'>+				struct ethtool_pause_stats *s);</div><div class='add'>+	void (*get_rmon_stats)(struct fman_mac *memac,</div><div class='add'>+			       struct ethtool_rmon_stats *s,</div><div class='add'>+			       const struct ethtool_rmon_hist_range **ranges);</div><div class='add'>+	void (*get_eth_ctrl_stats)(struct fman_mac *memac,</div><div class='add'>+				   struct ethtool_eth_ctrl_stats *s);</div><div class='add'>+	void (*get_eth_mac_stats)(struct fman_mac *memac,</div><div class='add'>+				  struct ethtool_eth_mac_stats *s);</div><div class='ctx'> </div><div class='ctx'> 	void (*update_speed)(struct mac_device *mac_dev, int speed);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/freescale/fsl_pq_mdio.c b/drivers/net/ethernet/freescale/fsl_pq_mdio.c<br/>index 56d2f79fb7e3..de88776dd2a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fsl_pq_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/fsl_pq_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/fsl_pq_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/fsl_pq_mdio.c</a></div><div class='hunk'>@@ -479,10 +479,12 @@ static int fsl_pq_mdio_probe(struct platform_device *pdev)</div><div class='ctx'> 					"missing 'reg' property in node %pOF\n",</div><div class='ctx'> 					tbi);</div><div class='ctx'> 				err = -EBUSY;</div><div class='add'>+				of_node_put(tbi);</div><div class='ctx'> 				goto error;</div><div class='ctx'> 			}</div><div class='ctx'> 			set_tbipa(*prop, pdev,</div><div class='ctx'> 				  data-&gt;get_tbipa, priv-&gt;map, &amp;res);</div><div class='add'>+			of_node_put(tbi);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -491,8 +493,8 @@ static int fsl_pq_mdio_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	err = of_mdiobus_register(new_bus, np);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "cannot register %s as MDIO bus\n",</div><div class='del'>-			new_bus-&gt;name);</div><div class='add'>+		dev_err_probe(&amp;pdev-&gt;dev, err, "cannot register %s as MDIO bus\n",</div><div class='add'>+			      new_bus-&gt;name);</div><div class='ctx'> 		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c<br/>index 435138f4699d..7c0f049f0938 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/gianfar.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/gianfar.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/gianfar.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/gianfar.c</a></div><div class='hunk'>@@ -97,6 +97,7 @@</div><div class='ctx'> #include &lt;linux/phy_fixed.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "gianfar.h"</div><div class='ctx'> </div><div class='hunk'>@@ -571,18 +572,6 @@ static int gfar_parse_group(struct device_node *np,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gfar_of_group_count(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	struct device_node *child;</div><div class='del'>-	int num = 0;</div><div class='del'>-</div><div class='del'>-	for_each_available_child_of_node(np, child)</div><div class='del'>-		if (of_node_name_eq(child, "queue-group"))</div><div class='del'>-			num++;</div><div class='del'>-</div><div class='del'>-	return num;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Reads the controller's registers to determine what interface</div><div class='ctx'>  * connects it to the PHY.</div><div class='ctx'>  */</div><div class='hunk'>@@ -654,8 +643,10 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev)</div><div class='ctx'> 		num_rx_qs = 1;</div><div class='ctx'> 	} else { /* MQ_MG_MODE */</div><div class='ctx'> 		/* get the actual number of supported groups */</div><div class='del'>-		unsigned int num_grps = gfar_of_group_count(np);</div><div class='add'>+		unsigned int num_grps;</div><div class='ctx'> </div><div class='add'>+		num_grps = device_get_named_child_node_count(&amp;ofdev-&gt;dev,</div><div class='add'>+							     "queue-group");</div><div class='ctx'> 		if (num_grps == 0 || num_grps &gt; MAXGROUPS) {</div><div class='ctx'> 			dev_err(&amp;ofdev-&gt;dev, "Invalid # of int groups(%d)\n",</div><div class='ctx'> 				num_grps);</div><div class='hunk'>@@ -1647,20 +1638,11 @@ static void gfar_configure_serdes(struct net_device *dev)</div><div class='ctx'>  */</div><div class='ctx'> static int init_phy(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };</div><div class='ctx'> 	struct gfar_private *priv = netdev_priv(dev);</div><div class='ctx'> 	phy_interface_t interface = priv-&gt;interface;</div><div class='ctx'> 	struct phy_device *phydev;</div><div class='ctx'> 	struct ethtool_keee edata;</div><div class='ctx'> </div><div class='del'>-	linkmode_set_bit_array(phy_10_100_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_10_100_features_array),</div><div class='del'>-			       mask);</div><div class='del'>-	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask);</div><div class='del'>-	linkmode_set_bit(ETHTOOL_LINK_MODE_MII_BIT, mask);</div><div class='del'>-	if (priv-&gt;device_flags &amp; FSL_GIANFAR_DEV_HAS_GIGABIT)</div><div class='del'>-		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, mask);</div><div class='del'>-</div><div class='ctx'> 	priv-&gt;oldlink = 0;</div><div class='ctx'> 	priv-&gt;oldspeed = 0;</div><div class='ctx'> 	priv-&gt;oldduplex = -1;</div><div class='hunk'>@@ -1675,9 +1657,8 @@ static int init_phy(struct net_device *dev)</div><div class='ctx'> 	if (interface == PHY_INTERFACE_MODE_SGMII)</div><div class='ctx'> 		gfar_configure_serdes(dev);</div><div class='ctx'> </div><div class='del'>-	/* Remove any features not supported by the controller */</div><div class='del'>-	linkmode_and(phydev-&gt;supported, phydev-&gt;supported, mask);</div><div class='del'>-	linkmode_copy(phydev-&gt;advertising, phydev-&gt;supported);</div><div class='add'>+	if (!(priv-&gt;device_flags &amp; FSL_GIANFAR_DEV_HAS_GIGABIT))</div><div class='add'>+		phy_set_max_speed(phydev, SPEED_100);</div><div class='ctx'> </div><div class='ctx'> 	/* Add support for flow control */</div><div class='ctx'> 	phy_support_asym_pause(phydev);</div><div class='hunk'>@@ -2071,15 +2052,13 @@ static void gfar_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> 	schedule_work(&amp;priv-&gt;reset_task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gfar_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+static int gfar_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	struct gfar_private *priv = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 		priv-&gt;hwts_tx_en = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2092,7 +2071,7 @@ static int gfar_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		if (priv-&gt;hwts_rx_en) {</div><div class='ctx'> 			priv-&gt;hwts_rx_en = 0;</div><div class='hunk'>@@ -2106,44 +2085,23 @@ static int gfar_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 			priv-&gt;hwts_rx_en = 1;</div><div class='ctx'> 			reset_gfar(netdev);</div><div class='ctx'> 		}</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gfar_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+static int gfar_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	struct gfar_private *priv = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	config.flags = 0;</div><div class='del'>-	config.tx_type = priv-&gt;hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='del'>-	config.rx_filter = (priv-&gt;hwts_rx_en ?</div><div class='del'>-			    HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE);</div><div class='del'>-</div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct phy_device *phydev = dev-&gt;phydev;</div><div class='del'>-</div><div class='del'>-	if (!netif_running(dev))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (cmd == SIOCSHWTSTAMP)</div><div class='del'>-		return gfar_hwtstamp_set(dev, rq);</div><div class='del'>-	if (cmd == SIOCGHWTSTAMP)</div><div class='del'>-		return gfar_hwtstamp_get(dev, rq);</div><div class='add'>+	config-&gt;tx_type = priv-&gt;hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='add'>+	config-&gt;rx_filter = priv-&gt;hwts_rx_en ? HWTSTAMP_FILTER_ALL :</div><div class='add'>+			    HWTSTAMP_FILTER_NONE;</div><div class='ctx'> </div><div class='del'>-	if (!phydev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return phy_mii_ioctl(phydev, rq, cmd);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Interrupt Handler for Transmit complete */</div><div class='hunk'>@@ -3184,7 +3142,7 @@ static const struct net_device_ops gfar_netdev_ops = {</div><div class='ctx'> 	.ndo_set_features = gfar_set_features,</div><div class='ctx'> 	.ndo_set_rx_mode = gfar_set_multi,</div><div class='ctx'> 	.ndo_tx_timeout = gfar_timeout,</div><div class='del'>-	.ndo_eth_ioctl = gfar_ioctl,</div><div class='add'>+	.ndo_eth_ioctl = phy_do_ioctl_running,</div><div class='ctx'> 	.ndo_get_stats64 = gfar_get_stats64,</div><div class='ctx'> 	.ndo_change_carrier = fixed_phy_change_carrier,</div><div class='ctx'> 	.ndo_set_mac_address = gfar_set_mac_addr,</div><div class='hunk'>@@ -3192,6 +3150,8 @@ static const struct net_device_ops gfar_netdev_ops = {</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller = gfar_netpoll,</div><div class='ctx'> #endif</div><div class='add'>+	.ndo_hwtstamp_get = gfar_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = gfar_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Set up the ethernet device structure, private data,</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/gianfar_ethtool.c b/drivers/net/ethernet/freescale/gianfar_ethtool.c<br/>index 781d92e703cb..6fa752d3b60d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/gianfar_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/gianfar_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/gianfar_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/gianfar_ethtool.c</a></div><div class='hunk'>@@ -781,14 +781,26 @@ err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gfar_set_hash_opts(struct gfar_private *priv,</div><div class='del'>-			      struct ethtool_rxnfc *cmd)</div><div class='add'>+static int gfar_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct gfar_private *priv = netdev_priv(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (test_bit(GFAR_RESETTING, &amp;priv-&gt;state))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;rx_queue_access);</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='ctx'> 	/* write the filer rules here */</div><div class='ctx'> 	if (!gfar_ethflow_to_filer_table(priv, cmd-&gt;data, cmd-&gt;flow_type))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;rx_queue_access);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gfar_check_filer_hardware(struct gfar_private *priv)</div><div class='hunk'>@@ -1398,9 +1410,6 @@ static int gfar_set_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;rx_queue_access);</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = gfar_set_hash_opts(priv, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		if ((cmd-&gt;fs.ring_cookie != RX_CLS_FLOW_DISC &amp;&amp;</div><div class='ctx'> 		     cmd-&gt;fs.ring_cookie &gt;= priv-&gt;num_rx_queues) ||</div><div class='hunk'>@@ -1422,6 +1431,13 @@ static int gfar_set_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 gfar_get_rx_ring_count(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct gfar_private *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return priv-&gt;num_rx_queues;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gfar_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 			u32 *rule_locs)</div><div class='ctx'> {</div><div class='hunk'>@@ -1429,9 +1445,6 @@ static int gfar_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = priv-&gt;num_rx_queues;</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		cmd-&gt;rule_cnt = priv-&gt;rx_list.count;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1466,8 +1479,10 @@ static int gfar_get_ts_info(struct net_device *dev,</div><div class='ctx'> 	if (ptp_node) {</div><div class='ctx'> 		ptp_dev = of_find_device_by_node(ptp_node);</div><div class='ctx'> 		of_node_put(ptp_node);</div><div class='del'>-		if (ptp_dev)</div><div class='add'>+		if (ptp_dev) {</div><div class='ctx'> 			ptp = platform_get_drvdata(ptp_dev);</div><div class='add'>+			put_device(&amp;ptp_dev-&gt;dev);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ptp)</div><div class='hunk'>@@ -1508,6 +1523,8 @@ const struct ethtool_ops gfar_ethtool_ops = {</div><div class='ctx'> #endif</div><div class='ctx'> 	.set_rxnfc = gfar_set_nfc,</div><div class='ctx'> 	.get_rxnfc = gfar_get_nfc,</div><div class='add'>+	.get_rx_ring_count = gfar_get_rx_ring_count,</div><div class='add'>+	.set_rxfh_fields = gfar_set_rxfh_fields,</div><div class='ctx'> 	.get_ts_info = gfar_get_ts_info,</div><div class='ctx'> 	.get_link_ksettings = phy_ethtool_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings = phy_ethtool_set_link_ksettings,</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/ucc_geth.c b/drivers/net/ethernet/freescale/ucc_geth.c<br/>index d3ddca22d6b0..affd5a6c44e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/ucc_geth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/ucc_geth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/ucc_geth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/ucc_geth.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/mii.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;linux/phy_fixed.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='hunk'>@@ -132,7 +133,6 @@ static const struct ucc_geth_info ugeth_primary_info = {</div><div class='ctx'> 	.transmitFlowControl = 1,</div><div class='ctx'> 	.maxGroupAddrInHash = 4,</div><div class='ctx'> 	.maxIndAddrInHash = 4,</div><div class='del'>-	.prel = 7,</div><div class='ctx'> 	.maxFrameLength = 1518+16, /* Add extra bytes for VLANs etc. */</div><div class='ctx'> 	.minFrameLength = 64,</div><div class='ctx'> 	.maxD1Length = 1520+16, /* Add extra bytes for VLANs etc. */</div><div class='hunk'>@@ -1205,34 +1205,6 @@ static int init_mac_station_addr_regs(u8 address_byte_0,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int init_check_frame_length_mode(int length_check,</div><div class='del'>-					u32 __iomem *maccfg2_register)</div><div class='del'>-{</div><div class='del'>-	u32 value = 0;</div><div class='del'>-</div><div class='del'>-	value = in_be32(maccfg2_register);</div><div class='del'>-</div><div class='del'>-	if (length_check)</div><div class='del'>-		value |= MACCFG2_LC;</div><div class='del'>-	else</div><div class='del'>-		value &amp;= ~MACCFG2_LC;</div><div class='del'>-</div><div class='del'>-	out_be32(maccfg2_register, value);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int init_preamble_length(u8 preamble_length,</div><div class='del'>-				u32 __iomem *maccfg2_register)</div><div class='del'>-{</div><div class='del'>-	if ((preamble_length &lt; 3) || (preamble_length &gt; 7))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	clrsetbits_be32(maccfg2_register, MACCFG2_PREL_MASK,</div><div class='del'>-			preamble_length &lt;&lt; MACCFG2_PREL_SHIFT);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int init_rx_parameters(int reject_broadcast,</div><div class='ctx'> 			      int receive_short_frames,</div><div class='ctx'> 			      int promiscuous, u32 __iomem *upsmr_register)</div><div class='hunk'>@@ -1287,94 +1259,11 @@ static int init_min_frame_len(u16 min_frame_length,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int adjust_enet_interface(struct ucc_geth_private *ugeth)</div><div class='add'>+static bool phy_interface_mode_is_reduced(phy_interface_t interface)</div><div class='ctx'> {</div><div class='del'>-	struct ucc_geth_info *ug_info;</div><div class='del'>-	struct ucc_geth __iomem *ug_regs;</div><div class='del'>-	struct ucc_fast __iomem *uf_regs;</div><div class='del'>-	int ret_val;</div><div class='del'>-	u32 upsmr, maccfg2;</div><div class='del'>-	u16 value;</div><div class='del'>-</div><div class='del'>-	ugeth_vdbg("%s: IN", __func__);</div><div class='del'>-</div><div class='del'>-	ug_info = ugeth-&gt;ug_info;</div><div class='del'>-	ug_regs = ugeth-&gt;ug_regs;</div><div class='del'>-	uf_regs = ugeth-&gt;uccf-&gt;uf_regs;</div><div class='del'>-</div><div class='del'>-	/*                    Set MACCFG2                    */</div><div class='del'>-	maccfg2 = in_be32(&amp;ug_regs-&gt;maccfg2);</div><div class='del'>-	maccfg2 &amp;= ~MACCFG2_INTERFACE_MODE_MASK;</div><div class='del'>-	if ((ugeth-&gt;max_speed == SPEED_10) ||</div><div class='del'>-	    (ugeth-&gt;max_speed == SPEED_100))</div><div class='del'>-		maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE;</div><div class='del'>-	else if (ugeth-&gt;max_speed == SPEED_1000)</div><div class='del'>-		maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE;</div><div class='del'>-	maccfg2 |= ug_info-&gt;padAndCrc;</div><div class='del'>-	out_be32(&amp;ug_regs-&gt;maccfg2, maccfg2);</div><div class='del'>-</div><div class='del'>-	/*                    Set UPSMR                      */</div><div class='del'>-	upsmr = in_be32(&amp;uf_regs-&gt;upsmr);</div><div class='del'>-	upsmr &amp;= ~(UCC_GETH_UPSMR_RPM | UCC_GETH_UPSMR_R10M |</div><div class='del'>-		   UCC_GETH_UPSMR_TBIM | UCC_GETH_UPSMR_RMM);</div><div class='del'>-	if ((ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RMII) ||</div><div class='del'>-	    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII) ||</div><div class='del'>-	    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII_ID) ||</div><div class='del'>-	    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) ||</div><div class='del'>-	    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) ||</div><div class='del'>-	    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RTBI)) {</div><div class='del'>-		if (ugeth-&gt;phy_interface != PHY_INTERFACE_MODE_RMII)</div><div class='del'>-			upsmr |= UCC_GETH_UPSMR_RPM;</div><div class='del'>-		switch (ugeth-&gt;max_speed) {</div><div class='del'>-		case SPEED_10:</div><div class='del'>-			upsmr |= UCC_GETH_UPSMR_R10M;</div><div class='del'>-			fallthrough;</div><div class='del'>-		case SPEED_100:</div><div class='del'>-			if (ugeth-&gt;phy_interface != PHY_INTERFACE_MODE_RTBI)</div><div class='del'>-				upsmr |= UCC_GETH_UPSMR_RMM;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if ((ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_TBI) ||</div><div class='del'>-	    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RTBI)) {</div><div class='del'>-		upsmr |= UCC_GETH_UPSMR_TBIM;</div><div class='del'>-	}</div><div class='del'>-	if (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_SGMII)</div><div class='del'>-		upsmr |= UCC_GETH_UPSMR_SGMM;</div><div class='del'>-</div><div class='del'>-	out_be32(&amp;uf_regs-&gt;upsmr, upsmr);</div><div class='del'>-</div><div class='del'>-	/* Disable autonegotiation in tbi mode, because by default it</div><div class='del'>-	comes up in autonegotiation mode. */</div><div class='del'>-	/* Note that this depends on proper setting in utbipar register. */</div><div class='del'>-	if ((ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_TBI) ||</div><div class='del'>-	    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RTBI)) {</div><div class='del'>-		struct ucc_geth_info *ug_info = ugeth-&gt;ug_info;</div><div class='del'>-		struct phy_device *tbiphy;</div><div class='del'>-</div><div class='del'>-		if (!ug_info-&gt;tbi_node)</div><div class='del'>-			pr_warn("TBI mode requires that the device tree specify a tbi-handle\n");</div><div class='del'>-</div><div class='del'>-		tbiphy = of_phy_find_device(ug_info-&gt;tbi_node);</div><div class='del'>-		if (!tbiphy)</div><div class='del'>-			pr_warn("Could not get TBI device\n");</div><div class='del'>-</div><div class='del'>-		value = phy_read(tbiphy, ENET_TBI_MII_CR);</div><div class='del'>-		value &amp;= ~0x1000;	/* Turn off autonegotiation */</div><div class='del'>-		phy_write(tbiphy, ENET_TBI_MII_CR, value);</div><div class='del'>-</div><div class='del'>-		put_device(&amp;tbiphy-&gt;mdio.dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	init_check_frame_length_mode(ug_info-&gt;lengthCheckRx, &amp;ug_regs-&gt;maccfg2);</div><div class='del'>-</div><div class='del'>-	ret_val = init_preamble_length(ug_info-&gt;prel, &amp;ug_regs-&gt;maccfg2);</div><div class='del'>-	if (ret_val != 0) {</div><div class='del'>-		if (netif_msg_probe(ugeth))</div><div class='del'>-			pr_err("Preamble length must be between 3 and 7 inclusive\n");</div><div class='del'>-		return ret_val;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return phy_interface_mode_is_rgmii(interface) ||</div><div class='add'>+	       interface == PHY_INTERFACE_MODE_RMII ||</div><div class='add'>+	       interface == PHY_INTERFACE_MODE_RTBI;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ugeth_graceful_stop_tx(struct ucc_geth_private *ugeth)</div><div class='hunk'>@@ -1545,108 +1434,7 @@ static void ugeth_activate(struct ucc_geth_private *ugeth)</div><div class='ctx'> </div><div class='ctx'> 	/* allow to xmit again  */</div><div class='ctx'> 	netif_tx_wake_all_queues(ugeth-&gt;ndev);</div><div class='del'>-	__netdev_watchdog_up(ugeth-&gt;ndev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Called every time the controller might need to be made</div><div class='del'>- * aware of new link state.  The PHY code conveys this</div><div class='del'>- * information through variables in the ugeth structure, and this</div><div class='del'>- * function converts those variables into the appropriate</div><div class='del'>- * register values, and can bring down the device if needed.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void adjust_link(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct ucc_geth_private *ugeth = netdev_priv(dev);</div><div class='del'>-	struct ucc_geth __iomem *ug_regs;</div><div class='del'>-	struct ucc_fast __iomem *uf_regs;</div><div class='del'>-	struct phy_device *phydev = ugeth-&gt;phydev;</div><div class='del'>-	int new_state = 0;</div><div class='del'>-</div><div class='del'>-	ug_regs = ugeth-&gt;ug_regs;</div><div class='del'>-	uf_regs = ugeth-&gt;uccf-&gt;uf_regs;</div><div class='del'>-</div><div class='del'>-	if (phydev-&gt;link) {</div><div class='del'>-		u32 tempval = in_be32(&amp;ug_regs-&gt;maccfg2);</div><div class='del'>-		u32 upsmr = in_be32(&amp;uf_regs-&gt;upsmr);</div><div class='del'>-		/* Now we make sure that we can be in full duplex mode.</div><div class='del'>-		 * If not, we operate in half-duplex mode. */</div><div class='del'>-		if (phydev-&gt;duplex != ugeth-&gt;oldduplex) {</div><div class='del'>-			new_state = 1;</div><div class='del'>-			if (!(phydev-&gt;duplex))</div><div class='del'>-				tempval &amp;= ~(MACCFG2_FDX);</div><div class='del'>-			else</div><div class='del'>-				tempval |= MACCFG2_FDX;</div><div class='del'>-			ugeth-&gt;oldduplex = phydev-&gt;duplex;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (phydev-&gt;speed != ugeth-&gt;oldspeed) {</div><div class='del'>-			new_state = 1;</div><div class='del'>-			switch (phydev-&gt;speed) {</div><div class='del'>-			case SPEED_1000:</div><div class='del'>-				tempval = ((tempval &amp;</div><div class='del'>-					    ~(MACCFG2_INTERFACE_MODE_MASK)) |</div><div class='del'>-					    MACCFG2_INTERFACE_MODE_BYTE);</div><div class='del'>-				break;</div><div class='del'>-			case SPEED_100:</div><div class='del'>-			case SPEED_10:</div><div class='del'>-				tempval = ((tempval &amp;</div><div class='del'>-					    ~(MACCFG2_INTERFACE_MODE_MASK)) |</div><div class='del'>-					    MACCFG2_INTERFACE_MODE_NIBBLE);</div><div class='del'>-				/* if reduced mode, re-set UPSMR.R10M */</div><div class='del'>-				if ((ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RMII) ||</div><div class='del'>-				    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII) ||</div><div class='del'>-				    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII_ID) ||</div><div class='del'>-				    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) ||</div><div class='del'>-				    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) ||</div><div class='del'>-				    (ugeth-&gt;phy_interface == PHY_INTERFACE_MODE_RTBI)) {</div><div class='del'>-					if (phydev-&gt;speed == SPEED_10)</div><div class='del'>-						upsmr |= UCC_GETH_UPSMR_R10M;</div><div class='del'>-					else</div><div class='del'>-						upsmr &amp;= ~UCC_GETH_UPSMR_R10M;</div><div class='del'>-				}</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				if (netif_msg_link(ugeth))</div><div class='del'>-					pr_warn(</div><div class='del'>-						"%s: Ack!  Speed (%d) is not 10/100/1000!",</div><div class='del'>-						dev-&gt;name, phydev-&gt;speed);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			ugeth-&gt;oldspeed = phydev-&gt;speed;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!ugeth-&gt;oldlink) {</div><div class='del'>-			new_state = 1;</div><div class='del'>-			ugeth-&gt;oldlink = 1;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (new_state) {</div><div class='del'>-			/*</div><div class='del'>-			 * To change the MAC configuration we need to disable</div><div class='del'>-			 * the controller. To do so, we have to either grab</div><div class='del'>-			 * ugeth-&gt;lock, which is a bad idea since 'graceful</div><div class='del'>-			 * stop' commands might take quite a while, or we can</div><div class='del'>-			 * quiesce driver's activity.</div><div class='del'>-			 */</div><div class='del'>-			ugeth_quiesce(ugeth);</div><div class='del'>-			ugeth_disable(ugeth, COMM_DIR_RX_AND_TX);</div><div class='del'>-</div><div class='del'>-			out_be32(&amp;ug_regs-&gt;maccfg2, tempval);</div><div class='del'>-			out_be32(&amp;uf_regs-&gt;upsmr, upsmr);</div><div class='del'>-</div><div class='del'>-			ugeth_enable(ugeth, COMM_DIR_RX_AND_TX);</div><div class='del'>-			ugeth_activate(ugeth);</div><div class='del'>-		}</div><div class='del'>-	} else if (ugeth-&gt;oldlink) {</div><div class='del'>-			new_state = 1;</div><div class='del'>-			ugeth-&gt;oldlink = 0;</div><div class='del'>-			ugeth-&gt;oldspeed = 0;</div><div class='del'>-			ugeth-&gt;oldduplex = -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (new_state &amp;&amp; netif_msg_link(ugeth))</div><div class='del'>-		phy_print_status(phydev);</div><div class='add'>+	netdev_watchdog_up(ugeth-&gt;ndev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initialize TBI PHY interface for communicating with the</div><div class='hunk'>@@ -1664,8 +1452,7 @@ static void uec_configure_serdes(struct net_device *dev)</div><div class='ctx'> 	struct phy_device *tbiphy;</div><div class='ctx'> </div><div class='ctx'> 	if (!ug_info-&gt;tbi_node) {</div><div class='del'>-		dev_warn(&amp;dev-&gt;dev, "SGMII mode requires that the device "</div><div class='del'>-			"tree specify a tbi-handle\n");</div><div class='add'>+		dev_warn(&amp;dev-&gt;dev, "SGMII mode requires that the device tree specify a tbi-handle\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1696,34 +1483,145 @@ static void uec_configure_serdes(struct net_device *dev)</div><div class='ctx'> 	put_device(&amp;tbiphy-&gt;mdio.dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Configure the PHY for dev.</div><div class='del'>- * returns 0 if success.  -1 if failure</div><div class='del'>- */</div><div class='del'>-static int init_phy(struct net_device *dev)</div><div class='add'>+static void ugeth_mac_link_up(struct phylink_config *config, struct phy_device *phy,</div><div class='add'>+			      unsigned int mode, phy_interface_t interface,</div><div class='add'>+			      int speed, int duplex, bool tx_pause, bool rx_pause)</div><div class='ctx'> {</div><div class='del'>-	struct ucc_geth_private *priv = netdev_priv(dev);</div><div class='del'>-	struct ucc_geth_info *ug_info = priv-&gt;ug_info;</div><div class='del'>-	struct phy_device *phydev;</div><div class='add'>+	struct net_device *ndev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct ucc_geth_private *ugeth = netdev_priv(ndev);</div><div class='add'>+	struct ucc_geth_info *ug_info = ugeth-&gt;ug_info;</div><div class='add'>+	struct ucc_geth __iomem *ug_regs = ugeth-&gt;ug_regs;</div><div class='add'>+	struct ucc_fast __iomem *uf_regs = ugeth-&gt;uccf-&gt;uf_regs;</div><div class='add'>+	u32 old_maccfg2, maccfg2 = in_be32(&amp;ug_regs-&gt;maccfg2);</div><div class='add'>+	u32 old_upsmr, upsmr = in_be32(&amp;uf_regs-&gt;upsmr);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;oldlink = 0;</div><div class='del'>-	priv-&gt;oldspeed = 0;</div><div class='del'>-	priv-&gt;oldduplex = -1;</div><div class='add'>+	old_maccfg2 = maccfg2;</div><div class='add'>+	old_upsmr = upsmr;</div><div class='ctx'> </div><div class='del'>-	phydev = of_phy_connect(dev, ug_info-&gt;phy_node, &amp;adjust_link, 0,</div><div class='del'>-				priv-&gt;phy_interface);</div><div class='del'>-	if (!phydev) {</div><div class='del'>-		dev_err(&amp;dev-&gt;dev, "Could not attach to PHY\n");</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	/* No length check */</div><div class='add'>+	maccfg2 &amp;= ~MACCFG2_LC;</div><div class='add'>+	maccfg2 &amp;= ~MACCFG2_INTERFACE_MODE_MASK;</div><div class='add'>+	upsmr &amp;= ~(UCC_GETH_UPSMR_RPM | UCC_GETH_UPSMR_R10M |</div><div class='add'>+		   UCC_GETH_UPSMR_TBIM | UCC_GETH_UPSMR_RMM);</div><div class='add'>+</div><div class='add'>+	if (speed == SPEED_10 || speed == SPEED_100)</div><div class='add'>+		maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE;</div><div class='add'>+	else if (speed == SPEED_1000)</div><div class='add'>+		maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE;</div><div class='add'>+</div><div class='add'>+	maccfg2 |= ug_info-&gt;padAndCrc;</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_reduced(interface)) {</div><div class='add'>+</div><div class='add'>+		if (interface != PHY_INTERFACE_MODE_RMII)</div><div class='add'>+			upsmr |= UCC_GETH_UPSMR_RPM;</div><div class='add'>+</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			upsmr |= UCC_GETH_UPSMR_R10M;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			if (interface != PHY_INTERFACE_MODE_RTBI)</div><div class='add'>+				upsmr |= UCC_GETH_UPSMR_RMM;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;phy_interface == PHY_INTERFACE_MODE_SGMII)</div><div class='del'>-		uec_configure_serdes(dev);</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_TBI ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_RTBI)</div><div class='add'>+		upsmr |= UCC_GETH_UPSMR_TBIM;</div><div class='ctx'> </div><div class='del'>-	phy_set_max_speed(phydev, priv-&gt;max_speed);</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		upsmr |= UCC_GETH_UPSMR_SGMM;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;phydev = phydev;</div><div class='add'>+	if (duplex == DUPLEX_HALF)</div><div class='add'>+		maccfg2 &amp;= ~(MACCFG2_FDX);</div><div class='add'>+	else</div><div class='add'>+		maccfg2 |= MACCFG2_FDX;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (maccfg2 != old_maccfg2 || upsmr != old_upsmr) {</div><div class='add'>+		/*</div><div class='add'>+		 * To change the MAC configuration we need to disable</div><div class='add'>+		 * the controller. To do so, we have to either grab</div><div class='add'>+		 * ugeth-&gt;lock, which is a bad idea since 'graceful</div><div class='add'>+		 * stop' commands might take quite a while, or we can</div><div class='add'>+		 * quiesce driver's activity.</div><div class='add'>+		 */</div><div class='add'>+		ugeth_quiesce(ugeth);</div><div class='add'>+		ugeth_disable(ugeth, COMM_DIR_RX_AND_TX);</div><div class='add'>+</div><div class='add'>+		out_be32(&amp;ug_regs-&gt;maccfg2, maccfg2);</div><div class='add'>+		out_be32(&amp;uf_regs-&gt;upsmr, upsmr);</div><div class='add'>+</div><div class='add'>+		ugeth_enable(ugeth, COMM_DIR_RX_AND_TX);</div><div class='add'>+		ugeth_activate(ugeth);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		uec_configure_serdes(ndev);</div><div class='add'>+</div><div class='add'>+	if (!phylink_autoneg_inband(mode)) {</div><div class='add'>+		ug_info-&gt;aufc = 0;</div><div class='add'>+		ug_info-&gt;receiveFlowControl = rx_pause;</div><div class='add'>+		ug_info-&gt;transmitFlowControl = tx_pause;</div><div class='add'>+</div><div class='add'>+		init_flow_control_params(ug_info-&gt;aufc,</div><div class='add'>+					 ug_info-&gt;receiveFlowControl,</div><div class='add'>+					 ug_info-&gt;transmitFlowControl,</div><div class='add'>+					 ug_info-&gt;pausePeriod,</div><div class='add'>+					 ug_info-&gt;extensionField,</div><div class='add'>+					 &amp;ugeth-&gt;uccf-&gt;uf_regs-&gt;upsmr,</div><div class='add'>+					 &amp;ugeth-&gt;ug_regs-&gt;uempr,</div><div class='add'>+					 &amp;ugeth-&gt;ug_regs-&gt;maccfg1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ugeth_enable(ugeth, COMM_DIR_RX_AND_TX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ugeth_mac_link_down(struct phylink_config *config,</div><div class='add'>+				unsigned int mode, phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct ucc_geth_private *ugeth = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	ugeth_disable(ugeth, COMM_DIR_RX_AND_TX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ugeth_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			     const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct ucc_geth_private *ugeth = netdev_priv(ndev);</div><div class='add'>+	struct ucc_geth_info *ug_info = ugeth-&gt;ug_info;</div><div class='add'>+	u16 value;</div><div class='add'>+</div><div class='add'>+	if (state-&gt;interface == PHY_INTERFACE_MODE_TBI ||</div><div class='add'>+	    state-&gt;interface == PHY_INTERFACE_MODE_RTBI) {</div><div class='add'>+		struct phy_device *tbiphy;</div><div class='add'>+</div><div class='add'>+		if (!ug_info-&gt;tbi_node)</div><div class='add'>+			pr_warn("TBI mode requires that the device tree specify a tbi-handle\n");</div><div class='add'>+</div><div class='add'>+		tbiphy = of_phy_find_device(ug_info-&gt;tbi_node);</div><div class='add'>+		if (!tbiphy)</div><div class='add'>+			pr_warn("Could not get TBI device\n");</div><div class='add'>+</div><div class='add'>+		value = phy_read(tbiphy, ENET_TBI_MII_CR);</div><div class='add'>+		value &amp;= ~0x1000;	/* Turn off autonegotiation */</div><div class='add'>+		phy_write(tbiphy, ENET_TBI_MII_CR, value);</div><div class='add'>+</div><div class='add'>+		put_device(&amp;tbiphy-&gt;mdio.dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phylink_autoneg_inband(mode)) {</div><div class='add'>+		ug_info-&gt;aufc = 1;</div><div class='add'>+</div><div class='add'>+		init_flow_control_params(ug_info-&gt;aufc, 1, 1,</div><div class='add'>+					 ug_info-&gt;pausePeriod,</div><div class='add'>+					 ug_info-&gt;extensionField,</div><div class='add'>+					 &amp;ugeth-&gt;uccf-&gt;uf_regs-&gt;upsmr,</div><div class='add'>+					 &amp;ugeth-&gt;ug_regs-&gt;uempr,</div><div class='add'>+					 &amp;ugeth-&gt;ug_regs-&gt;maccfg1);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ugeth_dump_regs(struct ucc_geth_private *ugeth)</div><div class='hunk'>@@ -1995,7 +1893,6 @@ static void ucc_geth_set_multi(struct net_device *dev)</div><div class='ctx'> static void ucc_geth_stop(struct ucc_geth_private *ugeth)</div><div class='ctx'> {</div><div class='ctx'> 	struct ucc_geth __iomem *ug_regs = ugeth-&gt;ug_regs;</div><div class='del'>-	struct phy_device *phydev = ugeth-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	ugeth_vdbg("%s: IN", __func__);</div><div class='ctx'> </div><div class='hunk'>@@ -2004,7 +1901,7 @@ static void ucc_geth_stop(struct ucc_geth_private *ugeth)</div><div class='ctx'> 	 * Must be done before disabling the controller</div><div class='ctx'> 	 * or deadlock may happen.</div><div class='ctx'> 	 */</div><div class='del'>-	phy_stop(phydev);</div><div class='add'>+	phylink_stop(ugeth-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable the controller */</div><div class='ctx'> 	ugeth_disable(ugeth, COMM_DIR_RX_AND_TX);</div><div class='hunk'>@@ -3246,12 +3143,6 @@ static int ucc_geth_init_mac(struct ucc_geth_private *ugeth)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = adjust_enet_interface(ugeth);</div><div class='del'>-	if (err) {</div><div class='del'>-		netif_err(ugeth, ifup, dev, "Cannot configure net device, aborting\n");</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/*       Set MACSTNADDR1, MACSTNADDR2                */</div><div class='ctx'> 	/* For more details see the hardware spec.           */</div><div class='ctx'> 	init_mac_station_addr_regs(dev-&gt;dev_addr[0],</div><div class='hunk'>@@ -3263,12 +3154,6 @@ static int ucc_geth_init_mac(struct ucc_geth_private *ugeth)</div><div class='ctx'> 				   &amp;ugeth-&gt;ug_regs-&gt;macstnaddr1,</div><div class='ctx'> 				   &amp;ugeth-&gt;ug_regs-&gt;macstnaddr2);</div><div class='ctx'> </div><div class='del'>-	err = ugeth_enable(ugeth, COMM_DIR_RX_AND_TX);</div><div class='del'>-	if (err) {</div><div class='del'>-		netif_err(ugeth, ifup, dev, "Cannot enable net device, aborting\n");</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> err:</div><div class='ctx'> 	ucc_geth_stop(ugeth);</div><div class='hunk'>@@ -3291,10 +3176,10 @@ static int ucc_geth_open(struct net_device *dev)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = init_phy(dev);</div><div class='add'>+	err = phylink_of_phy_connect(ugeth-&gt;phylink, ugeth-&gt;dev-&gt;of_node, 0);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netif_err(ugeth, ifup, dev, "Cannot initialize PHY, aborting\n");</div><div class='del'>-		return err;</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "Could not attach to PHY\n");</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = ucc_geth_init_mac(ugeth);</div><div class='hunk'>@@ -3310,13 +3195,13 @@ static int ucc_geth_open(struct net_device *dev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phy_start(ugeth-&gt;phydev);</div><div class='add'>+	phylink_start(ugeth-&gt;phylink);</div><div class='ctx'> 	napi_enable(&amp;ugeth-&gt;napi);</div><div class='ctx'> 	netdev_reset_queue(dev);</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	device_set_wakeup_capable(&amp;dev-&gt;dev,</div><div class='del'>-			qe_alive_during_sleep() || ugeth-&gt;phydev-&gt;irq);</div><div class='add'>+			qe_alive_during_sleep() || dev-&gt;phydev-&gt;irq);</div><div class='ctx'> 	device_set_wakeup_enable(&amp;dev-&gt;dev, ugeth-&gt;wol_en);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -3337,8 +3222,7 @@ static int ucc_geth_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	cancel_work_sync(&amp;ugeth-&gt;timeout_work);</div><div class='ctx'> 	ucc_geth_stop(ugeth);</div><div class='del'>-	phy_disconnect(ugeth-&gt;phydev);</div><div class='del'>-	ugeth-&gt;phydev = NULL;</div><div class='add'>+	phylink_disconnect_phy(ugeth-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(ugeth-&gt;ug_info-&gt;uf_info.irq, ugeth-&gt;ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -3372,7 +3256,7 @@ static void ucc_geth_timeout_work(struct work_struct *work)</div><div class='ctx'> 		ucc_geth_stop(ugeth);</div><div class='ctx'> 		ucc_geth_init_mac(ugeth);</div><div class='ctx'> 		/* Must start PHY here */</div><div class='del'>-		phy_start(ugeth-&gt;phydev);</div><div class='add'>+		phylink_start(ugeth-&gt;phylink);</div><div class='ctx'> 		netif_tx_start_all_queues(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3397,6 +3281,7 @@ static int ucc_geth_suspend(struct platform_device *ofdev, pm_message_t state)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = platform_get_drvdata(ofdev);</div><div class='ctx'> 	struct ucc_geth_private *ugeth = netdev_priv(ndev);</div><div class='add'>+	bool mac_wol = false;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -3410,14 +3295,17 @@ static int ucc_geth_suspend(struct platform_device *ofdev, pm_message_t state)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ugeth_disable(ugeth, COMM_DIR_RX_AND_TX);</div><div class='ctx'> </div><div class='del'>-	if (ugeth-&gt;wol_en &amp; WAKE_MAGIC) {</div><div class='add'>+	if (ugeth-&gt;wol_en &amp; WAKE_MAGIC &amp;&amp; !ugeth-&gt;phy_wol_en) {</div><div class='ctx'> 		setbits32(ugeth-&gt;uccf-&gt;p_uccm, UCC_GETH_UCCE_MPD);</div><div class='ctx'> 		setbits32(&amp;ugeth-&gt;ug_regs-&gt;maccfg2, MACCFG2_MPE);</div><div class='ctx'> 		ucc_fast_enable(ugeth-&gt;uccf, COMM_DIR_RX_AND_TX);</div><div class='del'>-	} else if (!(ugeth-&gt;wol_en &amp; WAKE_PHY)) {</div><div class='del'>-		phy_stop(ugeth-&gt;phydev);</div><div class='add'>+		mac_wol = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='add'>+	phylink_suspend(ugeth-&gt;phylink, mac_wol);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3451,12 +3339,9 @@ static int ucc_geth_resume(struct platform_device *ofdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ugeth-&gt;oldlink = 0;</div><div class='del'>-	ugeth-&gt;oldspeed = 0;</div><div class='del'>-	ugeth-&gt;oldduplex = -1;</div><div class='del'>-</div><div class='del'>-	phy_stop(ugeth-&gt;phydev);</div><div class='del'>-	phy_start(ugeth-&gt;phydev);</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	phylink_resume(ugeth-&gt;phylink);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	napi_enable(&amp;ugeth-&gt;napi);</div><div class='ctx'> 	netif_device_attach(ndev);</div><div class='hunk'>@@ -3469,32 +3354,6 @@ static int ucc_geth_resume(struct platform_device *ofdev)</div><div class='ctx'> #define ucc_geth_resume NULL</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static phy_interface_t to_phy_interface(const char *phy_connection_type)</div><div class='del'>-{</div><div class='del'>-	if (strcasecmp(phy_connection_type, "mii") == 0)</div><div class='del'>-		return PHY_INTERFACE_MODE_MII;</div><div class='del'>-	if (strcasecmp(phy_connection_type, "gmii") == 0)</div><div class='del'>-		return PHY_INTERFACE_MODE_GMII;</div><div class='del'>-	if (strcasecmp(phy_connection_type, "tbi") == 0)</div><div class='del'>-		return PHY_INTERFACE_MODE_TBI;</div><div class='del'>-	if (strcasecmp(phy_connection_type, "rmii") == 0)</div><div class='del'>-		return PHY_INTERFACE_MODE_RMII;</div><div class='del'>-	if (strcasecmp(phy_connection_type, "rgmii") == 0)</div><div class='del'>-		return PHY_INTERFACE_MODE_RGMII;</div><div class='del'>-	if (strcasecmp(phy_connection_type, "rgmii-id") == 0)</div><div class='del'>-		return PHY_INTERFACE_MODE_RGMII_ID;</div><div class='del'>-	if (strcasecmp(phy_connection_type, "rgmii-txid") == 0)</div><div class='del'>-		return PHY_INTERFACE_MODE_RGMII_TXID;</div><div class='del'>-	if (strcasecmp(phy_connection_type, "rgmii-rxid") == 0)</div><div class='del'>-		return PHY_INTERFACE_MODE_RGMII_RXID;</div><div class='del'>-	if (strcasecmp(phy_connection_type, "rtbi") == 0)</div><div class='del'>-		return PHY_INTERFACE_MODE_RTBI;</div><div class='del'>-	if (strcasecmp(phy_connection_type, "sgmii") == 0)</div><div class='del'>-		return PHY_INTERFACE_MODE_SGMII;</div><div class='del'>-</div><div class='del'>-	return PHY_INTERFACE_MODE_MII;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ucc_geth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ucc_geth_private *ugeth = netdev_priv(dev);</div><div class='hunk'>@@ -3502,10 +3361,7 @@ static int ucc_geth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> 	if (!netif_running(dev))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!ugeth-&gt;phydev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return phy_mii_ioctl(ugeth-&gt;phydev, rq, cmd);</div><div class='add'>+	return phylink_mii_ioctl(ugeth-&gt;phylink, rq, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops ucc_geth_netdev_ops = {</div><div class='hunk'>@@ -3513,7 +3369,6 @@ static const struct net_device_ops ucc_geth_netdev_ops = {</div><div class='ctx'> 	.ndo_stop		= ucc_geth_close,</div><div class='ctx'> 	.ndo_start_xmit		= ucc_geth_start_xmit,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_change_carrier     = fixed_phy_change_carrier,</div><div class='ctx'> 	.ndo_set_mac_address	= ucc_geth_set_mac_addr,</div><div class='ctx'> 	.ndo_set_rx_mode	= ucc_geth_set_multi,</div><div class='ctx'> 	.ndo_tx_timeout		= ucc_geth_timeout,</div><div class='hunk'>@@ -3553,6 +3408,12 @@ static int ucc_geth_parse_clock(struct device_node *np, const char *which,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct phylink_mac_ops ugeth_mac_ops = {</div><div class='add'>+	.mac_link_up = ugeth_mac_link_up,</div><div class='add'>+	.mac_link_down = ugeth_mac_link_down,</div><div class='add'>+	.mac_config = ugeth_mac_config,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int ucc_geth_probe(struct platform_device* ofdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *device = &amp;ofdev-&gt;dev;</div><div class='hunk'>@@ -3560,23 +3421,12 @@ static int ucc_geth_probe(struct platform_device* ofdev)</div><div class='ctx'> 	struct net_device *dev = NULL;</div><div class='ctx'> 	struct ucc_geth_private *ugeth = NULL;</div><div class='ctx'> 	struct ucc_geth_info *ug_info;</div><div class='add'>+	struct device_node *phy_node;</div><div class='add'>+	struct phylink *phylink;</div><div class='ctx'> 	struct resource res;</div><div class='del'>-	int err, ucc_num, max_speed = 0;</div><div class='add'>+	int err, ucc_num;</div><div class='ctx'> 	const unsigned int *prop;</div><div class='ctx'> 	phy_interface_t phy_interface;</div><div class='del'>-	static const int enet_to_speed[] = {</div><div class='del'>-		SPEED_10, SPEED_10, SPEED_10,</div><div class='del'>-		SPEED_100, SPEED_100, SPEED_100,</div><div class='del'>-		SPEED_1000, SPEED_1000, SPEED_1000, SPEED_1000,</div><div class='del'>-	};</div><div class='del'>-	static const phy_interface_t enet_to_phy_interface[] = {</div><div class='del'>-		PHY_INTERFACE_MODE_MII, PHY_INTERFACE_MODE_RMII,</div><div class='del'>-		PHY_INTERFACE_MODE_RGMII, PHY_INTERFACE_MODE_MII,</div><div class='del'>-		PHY_INTERFACE_MODE_RMII, PHY_INTERFACE_MODE_RGMII,</div><div class='del'>-		PHY_INTERFACE_MODE_GMII, PHY_INTERFACE_MODE_RGMII,</div><div class='del'>-		PHY_INTERFACE_MODE_TBI, PHY_INTERFACE_MODE_RTBI,</div><div class='del'>-		PHY_INTERFACE_MODE_SGMII,</div><div class='del'>-	};</div><div class='ctx'> </div><div class='ctx'> 	ugeth_vdbg("%s: IN", __func__);</div><div class='ctx'> </div><div class='hunk'>@@ -3591,77 +3441,56 @@ static int ucc_geth_probe(struct platform_device* ofdev)</div><div class='ctx'> 	if ((ucc_num &lt; 0) || (ucc_num &gt; 7))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	ug_info = kmemdup(&amp;ugeth_primary_info, sizeof(*ug_info), GFP_KERNEL);</div><div class='del'>-	if (ug_info == NULL)</div><div class='add'>+	ug_info = devm_kmemdup(&amp;ofdev-&gt;dev, &amp;ugeth_primary_info,</div><div class='add'>+			       sizeof(*ug_info), GFP_KERNEL);</div><div class='add'>+	if (!ug_info)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	ug_info-&gt;uf_info.ucc_num = ucc_num;</div><div class='ctx'> </div><div class='ctx'> 	err = ucc_geth_parse_clock(np, "rx", &amp;ug_info-&gt;uf_info.rx_clock);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_free_info;</div><div class='add'>+		return err;</div><div class='ctx'> 	err = ucc_geth_parse_clock(np, "tx", &amp;ug_info-&gt;uf_info.tx_clock);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_free_info;</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	err = of_address_to_resource(np, 0, &amp;res);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_free_info;</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	ug_info-&gt;uf_info.regs = res.start;</div><div class='ctx'> 	ug_info-&gt;uf_info.irq = irq_of_parse_and_map(np, 0);</div><div class='ctx'> </div><div class='del'>-	ug_info-&gt;phy_node = of_parse_phandle(np, "phy-handle", 0);</div><div class='del'>-	if (!ug_info-&gt;phy_node &amp;&amp; of_phy_is_fixed_link(np)) {</div><div class='del'>-		/*</div><div class='del'>-		 * In the case of a fixed PHY, the DT node associated</div><div class='del'>-		 * to the PHY is the Ethernet MAC DT node.</div><div class='del'>-		 */</div><div class='del'>-		err = of_phy_register_fixed_link(np);</div><div class='del'>-		if (err)</div><div class='del'>-			goto err_free_info;</div><div class='del'>-		ug_info-&gt;phy_node = of_node_get(np);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Find the TBI PHY node.  If it's not there, we don't support SGMII */</div><div class='ctx'> 	ug_info-&gt;tbi_node = of_parse_phandle(np, "tbi-handle", 0);</div><div class='ctx'> </div><div class='del'>-	/* get the phy interface type, or default to MII */</div><div class='del'>-	prop = of_get_property(np, "phy-connection-type", NULL);</div><div class='del'>-	if (!prop) {</div><div class='del'>-		/* handle interface property present in old trees */</div><div class='del'>-		prop = of_get_property(ug_info-&gt;phy_node, "interface", NULL);</div><div class='del'>-		if (prop != NULL) {</div><div class='del'>-			phy_interface = enet_to_phy_interface[*prop];</div><div class='del'>-			max_speed = enet_to_speed[*prop];</div><div class='del'>-		} else</div><div class='del'>-			phy_interface = PHY_INTERFACE_MODE_MII;</div><div class='del'>-	} else {</div><div class='del'>-		phy_interface = to_phy_interface((const char *)prop);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* get speed, or derive from PHY interface */</div><div class='del'>-	if (max_speed == 0)</div><div class='del'>-		switch (phy_interface) {</div><div class='del'>-		case PHY_INTERFACE_MODE_GMII:</div><div class='del'>-		case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-		case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-		case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-		case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		case PHY_INTERFACE_MODE_TBI:</div><div class='del'>-		case PHY_INTERFACE_MODE_RTBI:</div><div class='del'>-		case PHY_INTERFACE_MODE_SGMII:</div><div class='del'>-			max_speed = SPEED_1000;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			max_speed = SPEED_100;</div><div class='del'>-			break;</div><div class='add'>+	phy_node = of_parse_phandle(np, "phy-handle", 0);</div><div class='add'>+	if (phy_node) {</div><div class='add'>+		prop = of_get_property(phy_node, "interface", NULL);</div><div class='add'>+		if (prop) {</div><div class='add'>+			dev_err(&amp;ofdev-&gt;dev,</div><div class='add'>+				"Device-tree property 'interface' is no longer supported. Please use 'phy-connection-type' instead.");</div><div class='add'>+			of_node_put(phy_node);</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto err_put_tbi;</div><div class='ctx'> 		}</div><div class='add'>+		of_node_put(phy_node);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = of_get_phy_mode(np, &amp;phy_interface);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;ofdev-&gt;dev, "Invalid phy-connection-type");</div><div class='add'>+		goto err_put_tbi;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (max_speed == SPEED_1000) {</div><div class='add'>+	if (phy_interface == PHY_INTERFACE_MODE_GMII ||</div><div class='add'>+	    phy_interface_mode_is_rgmii(phy_interface) ||</div><div class='add'>+	    phy_interface == PHY_INTERFACE_MODE_TBI ||</div><div class='add'>+	    phy_interface == PHY_INTERFACE_MODE_RTBI ||</div><div class='add'>+	    phy_interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='ctx'> 		unsigned int snums = qe_get_num_of_snums();</div><div class='ctx'> </div><div class='del'>-		/* configure muram FIFOs for gigabit operation */</div><div class='ctx'> 		ug_info-&gt;uf_info.urfs = UCC_GETH_URFS_GIGA_INIT;</div><div class='ctx'> 		ug_info-&gt;uf_info.urfet = UCC_GETH_URFET_GIGA_INIT;</div><div class='ctx'> 		ug_info-&gt;uf_info.urfset = UCC_GETH_URFSET_GIGA_INIT;</div><div class='hunk'>@@ -3687,11 +3516,10 @@ static int ucc_geth_probe(struct platform_device* ofdev)</div><div class='ctx'> 			ug_info-&gt;uf_info.irq);</div><div class='ctx'> </div><div class='ctx'> 	/* Create an ethernet device instance */</div><div class='del'>-	dev = alloc_etherdev(sizeof(*ugeth));</div><div class='del'>-</div><div class='del'>-	if (dev == NULL) {</div><div class='add'>+	dev = devm_alloc_etherdev(&amp;ofdev-&gt;dev, sizeof(*ugeth));</div><div class='add'>+	if (!dev) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		goto err_deregister_fixed_link;</div><div class='add'>+		goto err_put_tbi;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ugeth = netdev_priv(dev);</div><div class='hunk'>@@ -3718,21 +3546,50 @@ static int ucc_geth_probe(struct platform_device* ofdev)</div><div class='ctx'> 	dev-&gt;max_mtu = 1518;</div><div class='ctx'> </div><div class='ctx'> 	ugeth-&gt;msg_enable = netif_msg_init(debug.msg_enable, UGETH_MSG_DEFAULT);</div><div class='del'>-	ugeth-&gt;phy_interface = phy_interface;</div><div class='del'>-	ugeth-&gt;max_speed = max_speed;</div><div class='ctx'> </div><div class='del'>-	/* Carrier starts down, phylib will bring it up */</div><div class='del'>-	netif_carrier_off(dev);</div><div class='add'>+	ugeth-&gt;phylink_config.dev = &amp;dev-&gt;dev;</div><div class='add'>+	ugeth-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='add'>+</div><div class='add'>+	ugeth-&gt;phylink_config.mac_capabilities =</div><div class='add'>+		MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_MII,</div><div class='add'>+		  ugeth-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+		  ugeth-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+		  ugeth-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	phy_interface_set_rgmii(ugeth-&gt;phylink_config.supported_interfaces);</div><div class='ctx'> </div><div class='del'>-	err = register_netdev(dev);</div><div class='add'>+	if (ug_info-&gt;tbi_node) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+			  ugeth-&gt;phylink_config.supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_TBI,</div><div class='add'>+			  ugeth-&gt;phylink_config.supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RTBI,</div><div class='add'>+			  ugeth-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phylink = phylink_create(&amp;ugeth-&gt;phylink_config, dev_fwnode(&amp;dev-&gt;dev),</div><div class='add'>+				 phy_interface, &amp;ugeth_mac_ops);</div><div class='add'>+	if (IS_ERR(phylink)) {</div><div class='add'>+		err = PTR_ERR(phylink);</div><div class='add'>+		goto err_put_tbi;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ugeth-&gt;phylink = phylink;</div><div class='add'>+</div><div class='add'>+	err = devm_register_netdev(&amp;ofdev-&gt;dev, dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		if (netif_msg_probe(ugeth))</div><div class='ctx'> 			pr_err("%s: Cannot register net device, aborting\n",</div><div class='ctx'> 			       dev-&gt;name);</div><div class='del'>-		goto err_free_netdev;</div><div class='add'>+		goto err_destroy_phylink;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	of_get_ethdev_address(np, dev);</div><div class='add'>+	err = of_get_ethdev_address(np, dev);</div><div class='add'>+	if (err == -EPROBE_DEFER)</div><div class='add'>+		goto err_destroy_phylink;</div><div class='ctx'> </div><div class='ctx'> 	ugeth-&gt;ug_info = ug_info;</div><div class='ctx'> 	ugeth-&gt;dev = device;</div><div class='hunk'>@@ -3741,15 +3598,10 @@ static int ucc_geth_probe(struct platform_device* ofdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_free_netdev:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-err_deregister_fixed_link:</div><div class='del'>-	if (of_phy_is_fixed_link(np))</div><div class='del'>-		of_phy_deregister_fixed_link(np);</div><div class='add'>+err_destroy_phylink:</div><div class='add'>+	phylink_destroy(phylink);</div><div class='add'>+err_put_tbi:</div><div class='ctx'> 	of_node_put(ug_info-&gt;tbi_node);</div><div class='del'>-	of_node_put(ug_info-&gt;phy_node);</div><div class='del'>-err_free_info:</div><div class='del'>-	kfree(ug_info);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -3758,16 +3610,10 @@ static void ucc_geth_remove(struct platform_device* ofdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(ofdev);</div><div class='ctx'> 	struct ucc_geth_private *ugeth = netdev_priv(dev);</div><div class='del'>-	struct device_node *np = ofdev-&gt;dev.of_node;</div><div class='ctx'> </div><div class='del'>-	unregister_netdev(dev);</div><div class='ctx'> 	ucc_geth_memclean(ugeth);</div><div class='del'>-	if (of_phy_is_fixed_link(np))</div><div class='del'>-		of_phy_deregister_fixed_link(np);</div><div class='add'>+	phylink_destroy(ugeth-&gt;phylink);</div><div class='ctx'> 	of_node_put(ugeth-&gt;ug_info-&gt;tbi_node);</div><div class='del'>-	of_node_put(ugeth-&gt;ug_info-&gt;phy_node);</div><div class='del'>-	kfree(ugeth-&gt;ug_info);</div><div class='del'>-	free_netdev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id ucc_geth_match[] = {</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/ucc_geth.h b/drivers/net/ethernet/freescale/ucc_geth.h<br/>index 4294ed096ebb..84f92f6384e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/ucc_geth.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/ucc_geth.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/ucc_geth.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/ucc_geth.h</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/if_ether.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;soc/fsl/qe/immap_qe.h&gt;</div><div class='hunk'>@@ -889,8 +890,6 @@ struct ucc_geth_hardware_statistics {</div><div class='ctx'> 							   addresses */</div><div class='ctx'> </div><div class='ctx'> #define TX_TIMEOUT                              (1*HZ)</div><div class='del'>-#define PHY_INIT_TIMEOUT                        100000</div><div class='del'>-#define PHY_CHANGE_TIME                         2</div><div class='ctx'> </div><div class='ctx'> /* Fast Ethernet (10/100 Mbps) */</div><div class='ctx'> #define UCC_GETH_URFS_INIT                      512	/* Rx virtual FIFO size</div><div class='hunk'>@@ -921,7 +920,8 @@ struct ucc_geth_hardware_statistics {</div><div class='ctx'> #define UCC_GETH_UPSMR_INIT                     UCC_GETH_UPSMR_RES1</div><div class='ctx'> </div><div class='ctx'> #define UCC_GETH_MACCFG1_INIT                   0</div><div class='del'>-#define UCC_GETH_MACCFG2_INIT                   (MACCFG2_RESERVED_1)</div><div class='add'>+#define UCC_GETH_MACCFG2_INIT                   (MACCFG2_RESERVED_1 | \</div><div class='add'>+						 (7 &lt;&lt; MACCFG2_PREL_SHIFT))</div><div class='ctx'> </div><div class='ctx'> /* Ethernet Address Type. */</div><div class='ctx'> enum enet_addr_type {</div><div class='hunk'>@@ -1073,6 +1073,9 @@ struct ucc_geth_tad_params {</div><div class='ctx'> 	u16 vid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct phylink;</div><div class='add'>+struct phylink_config;</div><div class='add'>+</div><div class='ctx'> /* GETH protocol initialization structure */</div><div class='ctx'> struct ucc_geth_info {</div><div class='ctx'> 	struct ucc_fast_info uf_info;</div><div class='hunk'>@@ -1088,7 +1091,6 @@ struct ucc_geth_info {</div><div class='ctx'> 	u8 miminumInterFrameGapEnforcement;</div><div class='ctx'> 	u8 backToBackInterFrameGap;</div><div class='ctx'> 	int ipAddressAlignment;</div><div class='del'>-	int lengthCheckRx;</div><div class='ctx'> 	u32 mblinterval;</div><div class='ctx'> 	u16 nortsrbytetime;</div><div class='ctx'> 	u8 fracsiz;</div><div class='hunk'>@@ -1114,7 +1116,6 @@ struct ucc_geth_info {</div><div class='ctx'> 	int transmitFlowControl;</div><div class='ctx'> 	u8 maxGroupAddrInHash;</div><div class='ctx'> 	u8 maxIndAddrInHash;</div><div class='del'>-	u8 prel;</div><div class='ctx'> 	u16 maxFrameLength;</div><div class='ctx'> 	u16 minFrameLength;</div><div class='ctx'> 	u16 maxD1Length;</div><div class='hunk'>@@ -1125,7 +1126,6 @@ struct ucc_geth_info {</div><div class='ctx'> 	u32 eventRegMask;</div><div class='ctx'> 	u16 pausePeriod;</div><div class='ctx'> 	u16 extensionField;</div><div class='del'>-	struct device_node *phy_node;</div><div class='ctx'> 	struct device_node *tbi_node;</div><div class='ctx'> 	u8 weightfactor[NUM_TX_QUEUES];</div><div class='ctx'> 	u8 interruptcoalescingmaxvalue[NUM_RX_QUEUES];</div><div class='hunk'>@@ -1210,14 +1210,12 @@ struct ucc_geth_private {</div><div class='ctx'> 	u16 skb_dirtytx[NUM_TX_QUEUES];</div><div class='ctx'> </div><div class='ctx'> 	struct ugeth_mii_info *mii_info;</div><div class='del'>-	struct phy_device *phydev;</div><div class='del'>-	phy_interface_t phy_interface;</div><div class='del'>-	int max_speed;</div><div class='ctx'> 	uint32_t msg_enable;</div><div class='del'>-	int oldspeed;</div><div class='del'>-	int oldduplex;</div><div class='del'>-	int oldlink;</div><div class='del'>-	int wol_en;</div><div class='add'>+	u32 wol_en;</div><div class='add'>+	u32 phy_wol_en;</div><div class='add'>+</div><div class='add'>+	struct phylink *phylink;</div><div class='add'>+	struct phylink_config phylink_config;</div><div class='ctx'> </div><div class='ctx'> 	struct device_node *node;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/freescale/ucc_geth_ethtool.c b/drivers/net/ethernet/freescale/ucc_geth_ethtool.c<br/>index 699f346faf5c..1fb49e5a414a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/ucc_geth_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/freescale/ucc_geth_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/freescale/ucc_geth_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/freescale/ucc_geth_ethtool.c</a></div><div class='hunk'>@@ -104,14 +104,8 @@ static int</div><div class='ctx'> uec_get_ksettings(struct net_device *netdev, struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ucc_geth_private *ugeth = netdev_priv(netdev);</div><div class='del'>-	struct phy_device *phydev = ugeth-&gt;phydev;</div><div class='ctx'> </div><div class='del'>-	if (!phydev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	phy_ethtool_ksettings_get(phydev, cmd);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return phylink_ethtool_ksettings_get(ugeth-&gt;phylink, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -119,12 +113,8 @@ uec_set_ksettings(struct net_device *netdev,</div><div class='ctx'> 		  const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ucc_geth_private *ugeth = netdev_priv(netdev);</div><div class='del'>-	struct phy_device *phydev = ugeth-&gt;phydev;</div><div class='ctx'> </div><div class='del'>-	if (!phydev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return phy_ethtool_ksettings_set(phydev, cmd);</div><div class='add'>+	return phylink_ethtool_ksettings_set(ugeth-&gt;phylink, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -133,12 +123,7 @@ uec_get_pauseparam(struct net_device *netdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct ucc_geth_private *ugeth = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	pause-&gt;autoneg = ugeth-&gt;phydev-&gt;autoneg;</div><div class='del'>-</div><div class='del'>-	if (ugeth-&gt;ug_info-&gt;receiveFlowControl)</div><div class='del'>-		pause-&gt;rx_pause = 1;</div><div class='del'>-	if (ugeth-&gt;ug_info-&gt;transmitFlowControl)</div><div class='del'>-		pause-&gt;tx_pause = 1;</div><div class='add'>+	return phylink_ethtool_get_pauseparam(ugeth-&gt;phylink, pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -146,30 +131,11 @@ uec_set_pauseparam(struct net_device *netdev,</div><div class='ctx'>                      struct ethtool_pauseparam *pause)</div><div class='ctx'> {</div><div class='ctx'> 	struct ucc_geth_private *ugeth = netdev_priv(netdev);</div><div class='del'>-	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	ugeth-&gt;ug_info-&gt;receiveFlowControl = pause-&gt;rx_pause;</div><div class='ctx'> 	ugeth-&gt;ug_info-&gt;transmitFlowControl = pause-&gt;tx_pause;</div><div class='ctx'> </div><div class='del'>-	if (ugeth-&gt;phydev-&gt;autoneg) {</div><div class='del'>-		if (netif_running(netdev)) {</div><div class='del'>-			/* FIXME: automatically restart */</div><div class='del'>-			netdev_info(netdev, "Please re-open the interface\n");</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		struct ucc_geth_info *ug_info = ugeth-&gt;ug_info;</div><div class='del'>-</div><div class='del'>-		ret = init_flow_control_params(ug_info-&gt;aufc,</div><div class='del'>-					ug_info-&gt;receiveFlowControl,</div><div class='del'>-					ug_info-&gt;transmitFlowControl,</div><div class='del'>-					ug_info-&gt;pausePeriod,</div><div class='del'>-					ug_info-&gt;extensionField,</div><div class='del'>-					&amp;ugeth-&gt;uccf-&gt;uf_regs-&gt;upsmr,</div><div class='del'>-					&amp;ugeth-&gt;ug_regs-&gt;uempr,</div><div class='del'>-					&amp;ugeth-&gt;ug_regs-&gt;maccfg1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return phylink_ethtool_set_pauseparam(ugeth-&gt;phylink, pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static uint32_t</div><div class='hunk'>@@ -343,28 +309,42 @@ uec_get_drvinfo(struct net_device *netdev,</div><div class='ctx'> static void uec_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='ctx'> 	struct ucc_geth_private *ugeth = netdev_priv(netdev);</div><div class='del'>-	struct phy_device *phydev = ugeth-&gt;phydev;</div><div class='ctx'> </div><div class='del'>-	if (phydev &amp;&amp; phydev-&gt;irq)</div><div class='del'>-		wol-&gt;supported |= WAKE_PHY;</div><div class='add'>+	phylink_ethtool_get_wol(ugeth-&gt;phylink, wol);</div><div class='add'>+</div><div class='ctx'> 	if (qe_alive_during_sleep())</div><div class='ctx'> 		wol-&gt;supported |= WAKE_MAGIC;</div><div class='ctx'> </div><div class='del'>-	wol-&gt;wolopts = ugeth-&gt;wol_en;</div><div class='add'>+	wol-&gt;wolopts |= ugeth-&gt;wol_en;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int uec_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='ctx'> 	struct ucc_geth_private *ugeth = netdev_priv(netdev);</div><div class='del'>-	struct phy_device *phydev = ugeth-&gt;phydev;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	if (wol-&gt;wolopts &amp; ~(WAKE_PHY | WAKE_MAGIC))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	else if (wol-&gt;wolopts &amp; WAKE_PHY &amp;&amp; (!phydev || !phydev-&gt;irq))</div><div class='add'>+	ret = phylink_ethtool_set_wol(ugeth-&gt;phylink, wol);</div><div class='add'>+	if (ret == -EOPNOTSUPP) {</div><div class='add'>+		ugeth-&gt;phy_wol_en = 0;</div><div class='add'>+	} else if (ret) {</div><div class='add'>+		return ret;</div><div class='add'>+	} else {</div><div class='add'>+		ugeth-&gt;phy_wol_en = wol-&gt;wolopts;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If the PHY isn't handling the WoL and the MAC is asked to more than</div><div class='add'>+	 * WAKE_MAGIC, error-out</div><div class='add'>+	 */</div><div class='add'>+	if (!ugeth-&gt;phy_wol_en &amp;&amp;</div><div class='add'>+	    wol-&gt;wolopts &amp; ~WAKE_MAGIC)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	else if (wol-&gt;wolopts &amp; WAKE_MAGIC &amp;&amp; !qe_alive_during_sleep())</div><div class='add'>+</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_MAGIC &amp;&amp;</div><div class='add'>+	    !qe_alive_during_sleep())</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+out:</div><div class='ctx'> 	ugeth-&gt;wol_en = wol-&gt;wolopts;</div><div class='ctx'> 	device_set_wakeup_enable(&amp;netdev-&gt;dev, ugeth-&gt;wol_en);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/fungible/funcore/fun_queue.c b/drivers/net/ethernet/fungible/funcore/fun_queue.c<br/>index 8ab9f68434f5..d07ee3e4f52a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fungible/funcore/fun_queue.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fungible/funcore/fun_queue.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fungible/funcore/fun_queue.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/fungible/funcore/fun_queue.c</a></div><div class='hunk'>@@ -482,43 +482,6 @@ free_funq:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Create a funq's CQ on the device. */</div><div class='del'>-static int fun_create_cq(struct fun_queue *funq)</div><div class='del'>-{</div><div class='del'>-	struct fun_dev *fdev = funq-&gt;fdev;</div><div class='del'>-	unsigned int rqid;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	rqid = funq-&gt;cq_flags &amp; FUN_ADMIN_EPCQ_CREATE_FLAG_RQ ?</div><div class='del'>-		funq-&gt;rqid : FUN_HCI_ID_INVALID;</div><div class='del'>-	rc = fun_cq_create(fdev, funq-&gt;cq_flags, funq-&gt;cqid, rqid,</div><div class='del'>-			   funq-&gt;cqe_size_log2, funq-&gt;cq_depth,</div><div class='del'>-			   funq-&gt;cq_dma_addr, 0, 0, funq-&gt;cq_intcoal_nentries,</div><div class='del'>-			   funq-&gt;cq_intcoal_usec, funq-&gt;cq_vector, 0, 0,</div><div class='del'>-			   &amp;funq-&gt;cqid, &amp;funq-&gt;cq_db);</div><div class='del'>-	if (!rc)</div><div class='del'>-		dev_dbg(fdev-&gt;dev, "created CQ %u\n", funq-&gt;cqid);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Create a funq's SQ on the device. */</div><div class='del'>-static int fun_create_sq(struct fun_queue *funq)</div><div class='del'>-{</div><div class='del'>-	struct fun_dev *fdev = funq-&gt;fdev;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	rc = fun_sq_create(fdev, funq-&gt;sq_flags, funq-&gt;sqid, funq-&gt;cqid,</div><div class='del'>-			   funq-&gt;sqe_size_log2, funq-&gt;sq_depth,</div><div class='del'>-			   funq-&gt;sq_dma_addr, funq-&gt;sq_intcoal_nentries,</div><div class='del'>-			   funq-&gt;sq_intcoal_usec, funq-&gt;cq_vector, 0, 0,</div><div class='del'>-			   0, &amp;funq-&gt;sqid, &amp;funq-&gt;sq_db);</div><div class='del'>-	if (!rc)</div><div class='del'>-		dev_dbg(fdev-&gt;dev, "created SQ %u\n", funq-&gt;sqid);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Create a funq's RQ on the device. */</div><div class='ctx'> int fun_create_rq(struct fun_queue *funq)</div><div class='ctx'> {</div><div class='hunk'>@@ -561,34 +524,6 @@ int fun_request_irq(struct fun_queue *funq, const char *devname,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Create all component queues of a funq  on the device. */</div><div class='del'>-int fun_create_queue(struct fun_queue *funq)</div><div class='del'>-{</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	rc = fun_create_cq(funq);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-</div><div class='del'>-	if (funq-&gt;rq_depth) {</div><div class='del'>-		rc = fun_create_rq(funq);</div><div class='del'>-		if (rc)</div><div class='del'>-			goto release_cq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rc = fun_create_sq(funq);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto release_rq;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-release_rq:</div><div class='del'>-	fun_destroy_sq(funq-&gt;fdev, funq-&gt;rqid);</div><div class='del'>-release_cq:</div><div class='del'>-	fun_destroy_cq(funq-&gt;fdev, funq-&gt;cqid);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void fun_free_irq(struct fun_queue *funq)</div><div class='ctx'> {</div><div class='ctx'> 	if (funq-&gt;irq_handler) {</div><div class='head'>diff --git a/drivers/net/ethernet/fungible/funcore/fun_queue.h b/drivers/net/ethernet/fungible/funcore/fun_queue.h<br/>index 7fb53d0ae8b0..2d966afb187a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fungible/funcore/fun_queue.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fungible/funcore/fun_queue.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fungible/funcore/fun_queue.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/fungible/funcore/fun_queue.h</a></div><div class='hunk'>@@ -163,7 +163,6 @@ static inline void fun_set_cq_callback(struct fun_queue *funq, cq_callback_t cb,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int fun_create_rq(struct fun_queue *funq);</div><div class='del'>-int fun_create_queue(struct fun_queue *funq);</div><div class='ctx'> </div><div class='ctx'> void fun_free_irq(struct fun_queue *funq);</div><div class='ctx'> int fun_request_irq(struct fun_queue *funq, const char *devname,</div><div class='head'>diff --git a/drivers/net/ethernet/fungible/funeth/funeth.h b/drivers/net/ethernet/fungible/funeth/funeth.h<br/>index 1250e10d21db..55e705e239f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fungible/funeth/funeth.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fungible/funeth/funeth.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fungible/funeth/funeth.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/fungible/funeth/funeth.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> #define _FUNETH_H</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/linux/if_ether.h&gt;</div><div class='del'>-#include &lt;uapi/linux/net_tstamp.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/seqlock.h&gt;</div><div class='ctx'> #include &lt;linux/xarray.h&gt;</div><div class='hunk'>@@ -121,7 +121,7 @@ struct funeth_priv {</div><div class='ctx'> 	u8 rx_coal_usec;</div><div class='ctx'> 	u8 rx_coal_count;</div><div class='ctx'> </div><div class='del'>-	struct hwtstamp_config hwtstamp_cfg;</div><div class='add'>+	struct kernel_hwtstamp_config hwtstamp_cfg;</div><div class='ctx'> </div><div class='ctx'> 	/* cumulative queue stats from earlier queue instances */</div><div class='ctx'> 	u64 tx_packets;</div><div class='head'>diff --git a/drivers/net/ethernet/fungible/funeth/funeth_ethtool.c b/drivers/net/ethernet/fungible/funeth/funeth_ethtool.c<br/>index ba83dbf4ed22..1966dba512f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fungible/funeth/funeth_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fungible/funeth/funeth_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fungible/funeth/funeth_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/fungible/funeth/funeth_ethtool.c</a></div><div class='hunk'>@@ -930,7 +930,8 @@ static void fun_get_rmon_stats(struct net_device *netdev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fun_get_fec_stats(struct net_device *netdev,</div><div class='del'>-			      struct ethtool_fec_stats *stats)</div><div class='add'>+			      struct ethtool_fec_stats *stats,</div><div class='add'>+			      struct ethtool_fec_hist *hist)</div><div class='ctx'> {</div><div class='ctx'> 	const struct funeth_priv *fp = netdev_priv(netdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/fungible/funeth/funeth_main.c b/drivers/net/ethernet/fungible/funeth/funeth_main.c<br/>index ac86179a0a81..792cddac6f1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fungible/funeth/funeth_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/fungible/funeth/funeth_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/fungible/funeth/funeth_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/fungible/funeth/funeth_main.c</a></div><div class='hunk'>@@ -1014,26 +1014,25 @@ static int fun_get_port_attributes(struct net_device *netdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fun_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+static int fun_hwtstamp_get(struct net_device *dev,</div><div class='add'>+			    struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	const struct funeth_priv *fp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;fp-&gt;hwtstamp_cfg,</div><div class='del'>-			    sizeof(fp-&gt;hwtstamp_cfg)) ? -EFAULT : 0;</div><div class='add'>+	*config = fp-&gt;hwtstamp_cfg;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fun_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+static int fun_hwtstamp_set(struct net_device *dev,</div><div class='add'>+			    struct kernel_hwtstamp_config *config,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct funeth_priv *fp = netdev_priv(dev);</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='del'>-		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	/* no TX HW timestamps */</div><div class='del'>-	cfg.tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+	config-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='ctx'> </div><div class='del'>-	switch (cfg.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_ALL:</div><div class='hunk'>@@ -1051,26 +1050,14 @@ static int fun_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='del'>-		cfg.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fp-&gt;hwtstamp_cfg = cfg;</div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int fun_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return fun_hwtstamp_set(dev, ifr);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return fun_hwtstamp_get(dev, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	fp-&gt;hwtstamp_cfg = *config;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Prepare the queues for XDP. */</div><div class='hunk'>@@ -1340,7 +1327,6 @@ static const struct net_device_ops fun_netdev_ops = {</div><div class='ctx'> 	.ndo_change_mtu		= fun_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address	= fun_set_macaddr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_eth_ioctl		= fun_ioctl,</div><div class='ctx'> 	.ndo_uninit		= fun_uninit,</div><div class='ctx'> 	.ndo_bpf		= fun_xdp,</div><div class='ctx'> 	.ndo_xdp_xmit		= fun_xdp_xmit_frames,</div><div class='hunk'>@@ -1348,6 +1334,8 @@ static const struct net_device_ops fun_netdev_ops = {</div><div class='ctx'> 	.ndo_set_vf_vlan	= fun_set_vf_vlan,</div><div class='ctx'> 	.ndo_set_vf_rate	= fun_set_vf_rate,</div><div class='ctx'> 	.ndo_get_vf_config	= fun_get_vf_config,</div><div class='add'>+	.ndo_hwtstamp_get	= fun_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= fun_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define GSO_ENCAP_FLAGS (NETIF_F_GSO_GRE | NETIF_F_GSO_IPXIP4 | \</div><div class='head'>diff --git a/drivers/net/ethernet/google/Kconfig b/drivers/net/ethernet/google/Kconfig<br/>index 564862a57124..14c9431e15e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/Kconfig</a></div><div class='hunk'>@@ -18,6 +18,7 @@ if NET_VENDOR_GOOGLE</div><div class='ctx'> config GVE</div><div class='ctx'> 	tristate "Google Virtual NIC (gVNIC) support"</div><div class='ctx'> 	depends on (PCI_MSI &amp;&amp; (X86 || CPU_LITTLE_ENDIAN))</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select PAGE_POOL</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Google Virtual NIC (gVNIC)"</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/Makefile b/drivers/net/ethernet/google/gve/Makefile<br/>index 4520f1c07a63..e0ec227a50f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/Makefile</a></div><div class='hunk'>@@ -1,5 +1,7 @@</div><div class='ctx'> # Makefile for the Google virtual Ethernet (gve) driver</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_GVE) += gve.o</div><div class='del'>-gve-objs := gve_main.o gve_tx.o gve_tx_dqo.o gve_rx.o gve_rx_dqo.o gve_ethtool.o gve_adminq.o gve_utils.o gve_flow_rule.o \</div><div class='add'>+gve-y := gve_main.o gve_tx.o gve_tx_dqo.o gve_rx.o gve_rx_dqo.o gve_ethtool.o gve_adminq.o gve_utils.o gve_flow_rule.o \</div><div class='ctx'> 	    gve_buffer_mgmt_dqo.o</div><div class='add'>+</div><div class='add'>+gve-$(CONFIG_PTP_1588_CLOCK) += gve_ptp.o</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve.h b/drivers/net/ethernet/google/gve/gve.h<br/>index dd92949bb214..970d5ca8cdde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve.h</a></div><div class='hunk'>@@ -11,7 +11,9 @@</div><div class='ctx'> #include &lt;linux/dmapool.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool_netlink.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='ctx'> #include &lt;linux/u64_stats_sync.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='hunk'>@@ -57,7 +59,7 @@</div><div class='ctx'> </div><div class='ctx'> #define GVE_DEFAULT_RX_BUFFER_SIZE 2048</div><div class='ctx'> </div><div class='del'>-#define GVE_MAX_RX_BUFFER_SIZE 4096</div><div class='add'>+#define GVE_XDP_RX_BUFFER_SIZE_DQO 4096</div><div class='ctx'> </div><div class='ctx'> #define GVE_DEFAULT_RX_BUFFER_OFFSET 2048</div><div class='ctx'> </div><div class='hunk'>@@ -68,6 +70,9 @@</div><div class='ctx'> #define GVE_FLOW_RULE_IDS_CACHE_SIZE \</div><div class='ctx'> 	(GVE_ADMINQ_BUFFER_SIZE / sizeof(((struct gve_adminq_queried_flow_rule *)0)-&gt;location))</div><div class='ctx'> </div><div class='add'>+#define GVE_RSS_KEY_SIZE	40</div><div class='add'>+#define GVE_RSS_INDIR_SIZE	128</div><div class='add'>+</div><div class='ctx'> #define GVE_XDP_ACTIONS 5</div><div class='ctx'> </div><div class='ctx'> #define GVE_GQ_TX_MIN_PKT_DESC_BYTES 182</div><div class='hunk'>@@ -93,6 +98,8 @@</div><div class='ctx'>  */</div><div class='ctx'> #define GVE_DQO_QPL_ONDEMAND_ALLOC_THRESHOLD 96</div><div class='ctx'> </div><div class='add'>+#define GVE_DQO_RX_HWTSTAMP_VALID 0x1</div><div class='add'>+</div><div class='ctx'> /* Each slot in the desc ring has a 1:1 mapping to a slot in the data ring */</div><div class='ctx'> struct gve_rx_desc_queue {</div><div class='ctx'> 	struct gve_rx_desc *desc_ring; /* the descriptor ring */</div><div class='hunk'>@@ -102,7 +109,13 @@ struct gve_rx_desc_queue {</div><div class='ctx'> </div><div class='ctx'> /* The page info for a single slot in the RX data queue */</div><div class='ctx'> struct gve_rx_slot_page_info {</div><div class='del'>-	struct page *page;</div><div class='add'>+	/* netmem is used for DQO RDA mode</div><div class='add'>+	 * page is used in all other modes</div><div class='add'>+	 */</div><div class='add'>+	union {</div><div class='add'>+		struct page *page;</div><div class='add'>+		netmem_ref netmem;</div><div class='add'>+	};</div><div class='ctx'> 	void *page_address;</div><div class='ctx'> 	u32 page_offset; /* offset to write to in page */</div><div class='ctx'> 	unsigned int buf_size;</div><div class='hunk'>@@ -177,6 +190,9 @@ struct gve_rx_buf_state_dqo {</div><div class='ctx'> 	/* The page posted to HW. */</div><div class='ctx'> 	struct gve_rx_slot_page_info page_info;</div><div class='ctx'> </div><div class='add'>+	/* XSK buffer */</div><div class='add'>+	struct xdp_buff *xsk_buff;</div><div class='add'>+</div><div class='ctx'> 	/* The DMA address corresponding to `page_info`. */</div><div class='ctx'> 	dma_addr_t addr;</div><div class='ctx'> </div><div class='hunk'>@@ -189,6 +205,13 @@ struct gve_rx_buf_state_dqo {</div><div class='ctx'> 	s16 next;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Wrapper for XDP Rx metadata */</div><div class='add'>+struct gve_xdp_buff {</div><div class='add'>+	struct xdp_buff xdp;</div><div class='add'>+	struct gve_priv *gve;</div><div class='add'>+	const struct gve_rx_compl_desc_dqo *compl_desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* `head` and `tail` are indices into an array, or -1 if empty. */</div><div class='ctx'> struct gve_index_list {</div><div class='ctx'> 	s16 head;</div><div class='hunk'>@@ -218,6 +241,11 @@ struct gve_rx_cnts {</div><div class='ctx'> /* Contains datapath state used to represent an RX queue. */</div><div class='ctx'> struct gve_rx_ring {</div><div class='ctx'> 	struct gve_priv *gve;</div><div class='add'>+</div><div class='add'>+	u16 packet_buffer_size;		/* Size of buffer posted to NIC */</div><div class='add'>+	u16 packet_buffer_truesize;	/* Total size of RX buffer */</div><div class='add'>+	u16 rx_headroom;</div><div class='add'>+</div><div class='ctx'> 	union {</div><div class='ctx'> 		/* GQI fields */</div><div class='ctx'> 		struct {</div><div class='hunk'>@@ -226,7 +254,6 @@ struct gve_rx_ring {</div><div class='ctx'> </div><div class='ctx'> 			/* threshold for posting new buffs and descs */</div><div class='ctx'> 			u32 db_threshold;</div><div class='del'>-			u16 packet_buffer_size;</div><div class='ctx'> </div><div class='ctx'> 			u32 qpl_copy_pool_mask;</div><div class='ctx'> 			u32 qpl_copy_pool_head;</div><div class='hunk'>@@ -314,7 +341,6 @@ struct gve_rx_ring {</div><div class='ctx'> </div><div class='ctx'> 	/* XDP stuff */</div><div class='ctx'> 	struct xdp_rxq_info xdp_rxq;</div><div class='del'>-	struct xdp_rxq_info xsk_rxq;</div><div class='ctx'> 	struct xsk_buff_pool *xsk_pool;</div><div class='ctx'> 	struct page_frag_cache page_cache; /* Page cache to allocate XDP frames */</div><div class='ctx'> };</div><div class='hunk'>@@ -383,10 +409,24 @@ enum gve_packet_state {</div><div class='ctx'> 	GVE_PACKET_STATE_PENDING_REINJECT_COMPL,</div><div class='ctx'> 	/* No valid completion received within the specified timeout. */</div><div class='ctx'> 	GVE_PACKET_STATE_TIMED_OUT_COMPL,</div><div class='add'>+	/* XSK pending packet has received a packet/reinjection completion, or</div><div class='add'>+	 * has timed out. At this point, the pending packet can be counted by</div><div class='add'>+	 * xsk_tx_complete and freed.</div><div class='add'>+	 */</div><div class='add'>+	GVE_PACKET_STATE_XSK_COMPLETE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum gve_tx_pending_packet_dqo_type {</div><div class='add'>+	GVE_TX_PENDING_PACKET_DQO_SKB,</div><div class='add'>+	GVE_TX_PENDING_PACKET_DQO_XDP_FRAME,</div><div class='add'>+	GVE_TX_PENDING_PACKET_DQO_XSK,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct gve_tx_pending_packet_dqo {</div><div class='del'>-	struct sk_buff *skb; /* skb for this packet */</div><div class='add'>+	union {</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+		struct xdp_frame *xdpf;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	/* 0th element corresponds to the linear portion of `skb`, should be</div><div class='ctx'> 	 * unmapped with `dma_unmap_single`.</div><div class='hunk'>@@ -416,7 +456,10 @@ struct gve_tx_pending_packet_dqo {</div><div class='ctx'> 	/* Identifies the current state of the packet as defined in</div><div class='ctx'> 	 * `enum gve_packet_state`.</div><div class='ctx'> 	 */</div><div class='del'>-	u8 state;</div><div class='add'>+	u8 state : 3;</div><div class='add'>+</div><div class='add'>+	/* gve_tx_pending_packet_dqo_type */</div><div class='add'>+	u8 type : 2;</div><div class='ctx'> </div><div class='ctx'> 	/* If packet is an outstanding miss completion, then the packet is</div><div class='ctx'> 	 * freed if the corresponding re-injection completion is not received</div><div class='hunk'>@@ -438,6 +481,9 @@ struct gve_tx_ring {</div><div class='ctx'> </div><div class='ctx'> 		/* DQO fields. */</div><div class='ctx'> 		struct {</div><div class='add'>+			/* Spinlock for XDP tx traffic */</div><div class='add'>+			spinlock_t xdp_lock;</div><div class='add'>+</div><div class='ctx'> 			/* Linked list of gve_tx_pending_packet_dqo. Index into</div><div class='ctx'> 			 * pending_packets, or -1 if empty.</div><div class='ctx'> 			 *</div><div class='hunk'>@@ -482,6 +528,8 @@ struct gve_tx_ring {</div><div class='ctx'> 				/* Cached value of `dqo_compl.free_tx_qpl_buf_cnt` */</div><div class='ctx'> 				u32 free_tx_qpl_buf_cnt;</div><div class='ctx'> 			};</div><div class='add'>+</div><div class='add'>+			atomic_t xsk_reorder_queue_tail;</div><div class='ctx'> 		} dqo_tx;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -515,6 +563,9 @@ struct gve_tx_ring {</div><div class='ctx'> 			/* Last TX ring index fetched by HW */</div><div class='ctx'> 			atomic_t hw_tx_head;</div><div class='ctx'> </div><div class='add'>+			u16 xsk_reorder_queue_head;</div><div class='add'>+			u16 xsk_reorder_queue_tail;</div><div class='add'>+</div><div class='ctx'> 			/* List to track pending packets which received a miss</div><div class='ctx'> 			 * completion but not a corresponding reinjection.</div><div class='ctx'> 			 */</div><div class='hunk'>@@ -568,6 +619,8 @@ struct gve_tx_ring {</div><div class='ctx'> 			struct gve_tx_pending_packet_dqo *pending_packets;</div><div class='ctx'> 			s16 num_pending_packets;</div><div class='ctx'> </div><div class='add'>+			u16 *xsk_reorder_queue;</div><div class='add'>+</div><div class='ctx'> 			u32 complq_mask; /* complq size is complq_mask + 1 */</div><div class='ctx'> </div><div class='ctx'> 			/* QPL fields */</div><div class='hunk'>@@ -604,8 +657,6 @@ struct gve_tx_ring {</div><div class='ctx'> 	dma_addr_t complq_bus_dqo; /* dma address of the dqo.compl_ring */</div><div class='ctx'> 	struct u64_stats_sync statss; /* sync stats for 32bit archs */</div><div class='ctx'> 	struct xsk_buff_pool *xsk_pool;</div><div class='del'>-	u32 xdp_xsk_wakeup;</div><div class='del'>-	u32 xdp_xsk_done;</div><div class='ctx'> 	u64 xdp_xsk_sent;</div><div class='ctx'> 	u64 xdp_xmit;</div><div class='ctx'> 	u64 xdp_xmit_errors;</div><div class='hunk'>@@ -624,10 +675,18 @@ struct gve_notify_block {</div><div class='ctx'> 	u32 irq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Tracks allowed and current queue settings */</div><div class='del'>-struct gve_queue_config {</div><div class='add'>+/* Tracks allowed and current rx queue settings */</div><div class='add'>+struct gve_rx_queue_config {</div><div class='ctx'> 	u16 max_queues;</div><div class='del'>-	u16 num_queues; /* current */</div><div class='add'>+	u16 num_queues;</div><div class='add'>+	u16 packet_buffer_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Tracks allowed and current tx queue settings */</div><div class='add'>+struct gve_tx_queue_config {</div><div class='add'>+	u16 max_queues;</div><div class='add'>+	u16 num_queues; /* number of TX queues, excluding XDP queues */</div><div class='add'>+	u16 num_xdp_queues;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Tracks the available and used qpl IDs */</div><div class='hunk'>@@ -651,11 +710,11 @@ struct gve_ptype_lut {</div><div class='ctx'> </div><div class='ctx'> /* Parameters for allocating resources for tx queues */</div><div class='ctx'> struct gve_tx_alloc_rings_cfg {</div><div class='del'>-	struct gve_queue_config *qcfg;</div><div class='add'>+	struct gve_tx_queue_config *qcfg;</div><div class='add'>+</div><div class='add'>+	u16 num_xdp_rings;</div><div class='ctx'> </div><div class='ctx'> 	u16 ring_size;</div><div class='del'>-	u16 start_idx;</div><div class='del'>-	u16 num_rings;</div><div class='ctx'> 	bool raw_addressing;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocated resources are returned here */</div><div class='hunk'>@@ -665,13 +724,15 @@ struct gve_tx_alloc_rings_cfg {</div><div class='ctx'> /* Parameters for allocating resources for rx queues */</div><div class='ctx'> struct gve_rx_alloc_rings_cfg {</div><div class='ctx'> 	/* tx config is also needed to determine QPL ids */</div><div class='del'>-	struct gve_queue_config *qcfg;</div><div class='del'>-	struct gve_queue_config *qcfg_tx;</div><div class='add'>+	struct gve_rx_queue_config *qcfg_rx;</div><div class='add'>+	struct gve_tx_queue_config *qcfg_tx;</div><div class='ctx'> </div><div class='ctx'> 	u16 ring_size;</div><div class='ctx'> 	u16 packet_buffer_size;</div><div class='ctx'> 	bool raw_addressing;</div><div class='ctx'> 	bool enable_header_split;</div><div class='add'>+	bool reset_rss;</div><div class='add'>+	bool xdp;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocated resources are returned here */</div><div class='ctx'> 	struct gve_rx_ring *rx;</div><div class='hunk'>@@ -722,6 +783,17 @@ struct gve_flow_rules_cache {</div><div class='ctx'> 	u32 rule_ids_cache_num;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct gve_rss_config {</div><div class='add'>+	u8 *hash_key;</div><div class='add'>+	u32 *hash_lut;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gve_ptp {</div><div class='add'>+	struct ptp_clock_info info;</div><div class='add'>+	struct ptp_clock *clock;</div><div class='add'>+	struct gve_priv *priv;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct gve_priv {</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct gve_tx_ring *tx; /* array of tx_cfg.num_queues */</div><div class='hunk'>@@ -751,10 +823,11 @@ struct gve_priv {</div><div class='ctx'> 	u32 rx_copybreak; /* copy packets smaller than this */</div><div class='ctx'> 	u16 default_num_queues; /* default num queues to set up */</div><div class='ctx'> </div><div class='del'>-	u16 num_xdp_queues;</div><div class='del'>-	struct gve_queue_config tx_cfg;</div><div class='del'>-	struct gve_queue_config rx_cfg;</div><div class='del'>-	u32 num_ntfy_blks; /* spilt between TX and RX so must be even */</div><div class='add'>+	struct gve_tx_queue_config tx_cfg;</div><div class='add'>+	struct gve_rx_queue_config rx_cfg;</div><div class='add'>+	unsigned long *xsk_pools; /* bitmap of RX queues with XSK pools */</div><div class='add'>+	u32 num_ntfy_blks; /* split between TX and RX so must be even */</div><div class='add'>+	int numa_node;</div><div class='ctx'> </div><div class='ctx'> 	struct gve_registers __iomem *reg_bar0; /* see gve_register.h */</div><div class='ctx'> 	__be32 __iomem *db_bar2; /* "array" of doorbells */</div><div class='hunk'>@@ -786,6 +859,7 @@ struct gve_priv {</div><div class='ctx'> 	u32 adminq_set_driver_parameter_cnt;</div><div class='ctx'> 	u32 adminq_report_stats_cnt;</div><div class='ctx'> 	u32 adminq_report_link_speed_cnt;</div><div class='add'>+	u32 adminq_report_nic_timestamp_cnt;</div><div class='ctx'> 	u32 adminq_get_ptype_map_cnt;</div><div class='ctx'> 	u32 adminq_verify_driver_compatibility_cnt;</div><div class='ctx'> 	u32 adminq_query_flow_rules_cnt;</div><div class='hunk'>@@ -823,7 +897,6 @@ struct gve_priv {</div><div class='ctx'> 	struct gve_ptype_lut *ptype_lut_dqo;</div><div class='ctx'> </div><div class='ctx'> 	/* Must be a power of two. */</div><div class='del'>-	u16 data_buffer_size_dqo;</div><div class='ctx'> 	u16 max_rx_buffer_size; /* device limit */</div><div class='ctx'> </div><div class='ctx'> 	enum gve_queue_format queue_format;</div><div class='hunk'>@@ -842,6 +915,16 @@ struct gve_priv {</div><div class='ctx'> </div><div class='ctx'> 	u16 rss_key_size;</div><div class='ctx'> 	u16 rss_lut_size;</div><div class='add'>+	bool cache_rss_config;</div><div class='add'>+	struct gve_rss_config rss_config;</div><div class='add'>+</div><div class='add'>+	/* True if the device supports reading the nic clock */</div><div class='add'>+	bool nic_timestamp_supported;</div><div class='add'>+	struct gve_ptp *ptp;</div><div class='add'>+	struct kernel_hwtstamp_config ts_config;</div><div class='add'>+	struct gve_nic_ts_report *nic_ts_report;</div><div class='add'>+	dma_addr_t nic_ts_report_bus;</div><div class='add'>+	u64 last_sync_nic_counter; /* Clock counter from last NIC TS report */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum gve_service_task_flags_bit {</div><div class='hunk'>@@ -1024,27 +1107,16 @@ static inline bool gve_is_qpl(struct gve_priv *priv)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Returns the number of tx queue page lists */</div><div class='del'>-static inline u32 gve_num_tx_qpls(const struct gve_queue_config *tx_cfg,</div><div class='del'>-				  int num_xdp_queues,</div><div class='add'>+static inline u32 gve_num_tx_qpls(const struct gve_tx_queue_config *tx_cfg,</div><div class='ctx'> 				  bool is_qpl)</div><div class='ctx'> {</div><div class='ctx'> 	if (!is_qpl)</div><div class='ctx'> 		return 0;</div><div class='del'>-	return tx_cfg-&gt;num_queues + num_xdp_queues;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Returns the number of XDP tx queue page lists</div><div class='del'>- */</div><div class='del'>-static inline u32 gve_num_xdp_qpls(struct gve_priv *priv)</div><div class='del'>-{</div><div class='del'>-	if (priv-&gt;queue_format != GVE_GQI_QPL_FORMAT)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return priv-&gt;num_xdp_queues;</div><div class='add'>+	return tx_cfg-&gt;num_queues + tx_cfg-&gt;num_xdp_queues;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Returns the number of rx queue page lists */</div><div class='del'>-static inline u32 gve_num_rx_qpls(const struct gve_queue_config *rx_cfg,</div><div class='add'>+static inline u32 gve_num_rx_qpls(const struct gve_rx_queue_config *rx_cfg,</div><div class='ctx'> 				  bool is_qpl)</div><div class='ctx'> {</div><div class='ctx'> 	if (!is_qpl)</div><div class='hunk'>@@ -1062,7 +1134,8 @@ static inline u32 gve_rx_qpl_id(struct gve_priv *priv, int rx_qid)</div><div class='ctx'> 	return priv-&gt;tx_cfg.max_queues + rx_qid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 gve_get_rx_qpl_id(const struct gve_queue_config *tx_cfg, int rx_qid)</div><div class='add'>+static inline u32 gve_get_rx_qpl_id(const struct gve_tx_queue_config *tx_cfg,</div><div class='add'>+				    int rx_qid)</div><div class='ctx'> {</div><div class='ctx'> 	return tx_cfg-&gt;max_queues + rx_qid;</div><div class='ctx'> }</div><div class='hunk'>@@ -1072,7 +1145,7 @@ static inline u32 gve_tx_start_qpl_id(struct gve_priv *priv)</div><div class='ctx'> 	return gve_tx_qpl_id(priv, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 gve_rx_start_qpl_id(const struct gve_queue_config *tx_cfg)</div><div class='add'>+static inline u32 gve_rx_start_qpl_id(const struct gve_tx_queue_config *tx_cfg)</div><div class='ctx'> {</div><div class='ctx'> 	return gve_get_rx_qpl_id(tx_cfg, 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -1101,9 +1174,15 @@ static inline bool gve_is_gqi(struct gve_priv *priv)</div><div class='ctx'> 		priv-&gt;queue_format == GVE_GQI_QPL_FORMAT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool gve_is_dqo(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;queue_format == GVE_DQO_RDA_FORMAT ||</div><div class='add'>+	       priv-&gt;queue_format == GVE_DQO_QPL_FORMAT;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u32 gve_num_tx_queues(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	return priv-&gt;tx_cfg.num_queues + priv-&gt;num_xdp_queues;</div><div class='add'>+	return priv-&gt;tx_cfg.num_queues + priv-&gt;tx_cfg.num_xdp_queues;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u32 gve_xdp_tx_queue_id(struct gve_priv *priv, u32 queue_id)</div><div class='hunk'>@@ -1116,6 +1195,17 @@ static inline u32 gve_xdp_tx_start_queue_id(struct gve_priv *priv)</div><div class='ctx'> 	return gve_xdp_tx_queue_id(priv, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool gve_supports_xdp_xmit(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	switch (priv-&gt;queue_format) {</div><div class='add'>+	case GVE_GQI_QPL_FORMAT:</div><div class='add'>+	case GVE_DQO_RDA_FORMAT:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* gqi napi handler defined in gve_main.c */</div><div class='ctx'> int gve_napi_poll(struct napi_struct *napi, int budget);</div><div class='ctx'> </div><div class='hunk'>@@ -1133,13 +1223,18 @@ void gve_free_queue_page_list(struct gve_priv *priv,</div><div class='ctx'> 			      u32 id);</div><div class='ctx'> /* tx handling */</div><div class='ctx'> netdev_tx_t gve_tx(struct sk_buff *skb, struct net_device *dev);</div><div class='del'>-int gve_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='del'>-		 u32 flags);</div><div class='add'>+int gve_xdp_xmit_gqi(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='add'>+		     u32 flags);</div><div class='add'>+int gve_xdp_xmit_dqo(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='add'>+		     u32 flags);</div><div class='ctx'> int gve_xdp_xmit_one(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='ctx'> 		     void *data, int len, void *frame_p);</div><div class='ctx'> void gve_xdp_tx_flush(struct gve_priv *priv, u32 xdp_qid);</div><div class='add'>+int gve_xdp_xmit_one_dqo(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='add'>+			 struct xdp_frame *xdpf);</div><div class='ctx'> bool gve_tx_poll(struct gve_notify_block *block, int budget);</div><div class='ctx'> bool gve_xdp_poll(struct gve_notify_block *block, int budget);</div><div class='add'>+int gve_xsk_tx_poll(struct gve_notify_block *block, int budget);</div><div class='ctx'> int gve_tx_alloc_rings_gqi(struct gve_priv *priv,</div><div class='ctx'> 			   struct gve_tx_alloc_rings_cfg *cfg);</div><div class='ctx'> void gve_tx_free_rings_gqi(struct gve_priv *priv,</div><div class='hunk'>@@ -1165,9 +1260,12 @@ void gve_rx_free_rings_gqi(struct gve_priv *priv,</div><div class='ctx'> 			   struct gve_rx_alloc_rings_cfg *cfg);</div><div class='ctx'> void gve_rx_start_ring_gqi(struct gve_priv *priv, int idx);</div><div class='ctx'> void gve_rx_stop_ring_gqi(struct gve_priv *priv, int idx);</div><div class='del'>-u16 gve_get_pkt_buf_size(const struct gve_priv *priv, bool enable_hplit);</div><div class='ctx'> bool gve_header_split_supported(const struct gve_priv *priv);</div><div class='del'>-int gve_set_hsplit_config(struct gve_priv *priv, u8 tcp_data_split);</div><div class='add'>+int gve_set_rx_buf_len_config(struct gve_priv *priv, u32 rx_buf_len,</div><div class='add'>+			      struct netlink_ext_ack *extack,</div><div class='add'>+			      struct gve_rx_alloc_rings_cfg *rx_alloc_cfg);</div><div class='add'>+int gve_set_hsplit_config(struct gve_priv *priv, u8 tcp_data_split,</div><div class='add'>+			  struct gve_rx_alloc_rings_cfg *rx_alloc_cfg);</div><div class='ctx'> /* rx buffer handling */</div><div class='ctx'> int gve_buf_ref_cnt(struct gve_rx_buf_state_dqo *bs);</div><div class='ctx'> void gve_free_page_dqo(struct gve_priv *priv, struct gve_rx_buf_state_dqo *bs,</div><div class='hunk'>@@ -1196,7 +1294,8 @@ void gve_free_buffer(struct gve_rx_ring *rx,</div><div class='ctx'> 		     struct gve_rx_buf_state_dqo *buf_state);</div><div class='ctx'> int gve_alloc_buffer(struct gve_rx_ring *rx, struct gve_rx_desc_dqo *desc);</div><div class='ctx'> struct page_pool *gve_rx_create_page_pool(struct gve_priv *priv,</div><div class='del'>-					  struct gve_rx_ring *rx);</div><div class='add'>+					  struct gve_rx_ring *rx,</div><div class='add'>+					  bool xdp);</div><div class='ctx'> </div><div class='ctx'> /* Reset */</div><div class='ctx'> void gve_schedule_reset(struct gve_priv *priv);</div><div class='hunk'>@@ -1208,14 +1307,35 @@ int gve_adjust_config(struct gve_priv *priv,</div><div class='ctx'> 		      struct gve_tx_alloc_rings_cfg *tx_alloc_cfg,</div><div class='ctx'> 		      struct gve_rx_alloc_rings_cfg *rx_alloc_cfg);</div><div class='ctx'> int gve_adjust_queues(struct gve_priv *priv,</div><div class='del'>-		      struct gve_queue_config new_rx_config,</div><div class='del'>-		      struct gve_queue_config new_tx_config);</div><div class='add'>+		      struct gve_rx_queue_config new_rx_config,</div><div class='add'>+		      struct gve_tx_queue_config new_tx_config,</div><div class='add'>+		      bool reset_rss);</div><div class='ctx'> /* flow steering rule */</div><div class='ctx'> int gve_get_flow_rule_entry(struct gve_priv *priv, struct ethtool_rxnfc *cmd);</div><div class='ctx'> int gve_get_flow_rule_ids(struct gve_priv *priv, struct ethtool_rxnfc *cmd, u32 *rule_locs);</div><div class='ctx'> int gve_add_flow_rule(struct gve_priv *priv, struct ethtool_rxnfc *cmd);</div><div class='ctx'> int gve_del_flow_rule(struct gve_priv *priv, struct ethtool_rxnfc *cmd);</div><div class='ctx'> int gve_flow_rules_reset(struct gve_priv *priv);</div><div class='add'>+/* RSS config */</div><div class='add'>+int gve_init_rss_config(struct gve_priv *priv, u16 num_queues);</div><div class='add'>+/* PTP and timestamping */</div><div class='add'>+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+int gve_clock_nic_ts_read(struct gve_priv *priv);</div><div class='add'>+int gve_init_clock(struct gve_priv *priv);</div><div class='add'>+void gve_teardown_clock(struct gve_priv *priv);</div><div class='add'>+#else /* CONFIG_PTP_1588_CLOCK */</div><div class='add'>+static inline int gve_clock_nic_ts_read(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int gve_init_clock(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void gve_teardown_clock(struct gve_priv *priv) { }</div><div class='add'>+#endif /* CONFIG_PTP_1588_CLOCK */</div><div class='ctx'> /* report stats handling */</div><div class='ctx'> void gve_handle_report_stats(struct gve_priv *priv);</div><div class='ctx'> /* exported by ethtool.c */</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_adminq.c b/drivers/net/ethernet/google/gve/gve_adminq.c<br/>index e44e8b139633..b72cc0fa2ba2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_adminq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_adminq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_adminq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_adminq.c</a></div><div class='hunk'>@@ -46,6 +46,7 @@ void gve_parse_device_option(struct gve_priv *priv,</div><div class='ctx'> 			     struct gve_device_option_buffer_sizes **dev_op_buffer_sizes,</div><div class='ctx'> 			     struct gve_device_option_flow_steering **dev_op_flow_steering,</div><div class='ctx'> 			     struct gve_device_option_rss_config **dev_op_rss_config,</div><div class='add'>+			     struct gve_device_option_nic_timestamp **dev_op_nic_timestamp,</div><div class='ctx'> 			     struct gve_device_option_modify_ring **dev_op_modify_ring)</div><div class='ctx'> {</div><div class='ctx'> 	u32 req_feat_mask = be32_to_cpu(option-&gt;required_features_mask);</div><div class='hunk'>@@ -225,6 +226,23 @@ void gve_parse_device_option(struct gve_priv *priv,</div><div class='ctx'> 				 "RSS config");</div><div class='ctx'> 		*dev_op_rss_config = (void *)(option + 1);</div><div class='ctx'> 		break;</div><div class='add'>+	case GVE_DEV_OPT_ID_NIC_TIMESTAMP:</div><div class='add'>+		if (option_length &lt; sizeof(**dev_op_nic_timestamp) ||</div><div class='add'>+		    req_feat_mask != GVE_DEV_OPT_REQ_FEAT_MASK_NIC_TIMESTAMP) {</div><div class='add'>+			dev_warn(&amp;priv-&gt;pdev-&gt;dev, GVE_DEVICE_OPTION_ERROR_FMT,</div><div class='add'>+				 "Nic Timestamp",</div><div class='add'>+				 (int)sizeof(**dev_op_nic_timestamp),</div><div class='add'>+				 GVE_DEV_OPT_REQ_FEAT_MASK_NIC_TIMESTAMP,</div><div class='add'>+				 option_length, req_feat_mask);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (option_length &gt; sizeof(**dev_op_nic_timestamp))</div><div class='add'>+			dev_warn(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+				 GVE_DEVICE_OPTION_TOO_BIG_FMT,</div><div class='add'>+				 "Nic Timestamp");</div><div class='add'>+		*dev_op_nic_timestamp = (void *)(option + 1);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* If we don't recognize the option just continue</div><div class='ctx'> 		 * without doing anything.</div><div class='hunk'>@@ -246,6 +264,7 @@ gve_process_device_options(struct gve_priv *priv,</div><div class='ctx'> 			   struct gve_device_option_buffer_sizes **dev_op_buffer_sizes,</div><div class='ctx'> 			   struct gve_device_option_flow_steering **dev_op_flow_steering,</div><div class='ctx'> 			   struct gve_device_option_rss_config **dev_op_rss_config,</div><div class='add'>+			   struct gve_device_option_nic_timestamp **dev_op_nic_timestamp,</div><div class='ctx'> 			   struct gve_device_option_modify_ring **dev_op_modify_ring)</div><div class='ctx'> {</div><div class='ctx'> 	const int num_options = be16_to_cpu(descriptor-&gt;num_device_options);</div><div class='hunk'>@@ -269,6 +288,7 @@ gve_process_device_options(struct gve_priv *priv,</div><div class='ctx'> 					dev_op_dqo_rda, dev_op_jumbo_frames,</div><div class='ctx'> 					dev_op_dqo_qpl, dev_op_buffer_sizes,</div><div class='ctx'> 					dev_op_flow_steering, dev_op_rss_config,</div><div class='add'>+					dev_op_nic_timestamp,</div><div class='ctx'> 					dev_op_modify_ring);</div><div class='ctx'> 		dev_opt = next_opt;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -306,6 +326,7 @@ int gve_adminq_alloc(struct device *dev, struct gve_priv *priv)</div><div class='ctx'> 	priv-&gt;adminq_set_driver_parameter_cnt = 0;</div><div class='ctx'> 	priv-&gt;adminq_report_stats_cnt = 0;</div><div class='ctx'> 	priv-&gt;adminq_report_link_speed_cnt = 0;</div><div class='add'>+	priv-&gt;adminq_report_nic_timestamp_cnt = 0;</div><div class='ctx'> 	priv-&gt;adminq_get_ptype_map_cnt = 0;</div><div class='ctx'> 	priv-&gt;adminq_query_flow_rules_cnt = 0;</div><div class='ctx'> 	priv-&gt;adminq_cfg_flow_rule_cnt = 0;</div><div class='hunk'>@@ -442,6 +463,8 @@ static int gve_adminq_kick_and_wait(struct gve_priv *priv)</div><div class='ctx'> 	int tail, head;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	lockdep_assert_held(&amp;priv-&gt;adminq_lock);</div><div class='add'>+</div><div class='ctx'> 	tail = ioread32be(&amp;priv-&gt;reg_bar0-&gt;adminq_event_counter);</div><div class='ctx'> 	head = priv-&gt;adminq_prod_cnt;</div><div class='ctx'> </div><div class='hunk'>@@ -467,9 +490,6 @@ static int gve_adminq_kick_and_wait(struct gve_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* This function is not threadsafe - the caller is responsible for any</div><div class='del'>- * necessary locks.</div><div class='del'>- */</div><div class='ctx'> static int gve_adminq_issue_cmd(struct gve_priv *priv,</div><div class='ctx'> 				union gve_adminq_command *cmd_orig)</div><div class='ctx'> {</div><div class='hunk'>@@ -477,6 +497,8 @@ static int gve_adminq_issue_cmd(struct gve_priv *priv,</div><div class='ctx'> 	u32 opcode;</div><div class='ctx'> 	u32 tail;</div><div class='ctx'> </div><div class='add'>+	lockdep_assert_held(&amp;priv-&gt;adminq_lock);</div><div class='add'>+</div><div class='ctx'> 	tail = ioread32be(&amp;priv-&gt;reg_bar0-&gt;adminq_event_counter);</div><div class='ctx'> </div><div class='ctx'> 	// Check if next command will overflow the buffer.</div><div class='hunk'>@@ -544,6 +566,9 @@ static int gve_adminq_issue_cmd(struct gve_priv *priv,</div><div class='ctx'> 	case GVE_ADMINQ_REPORT_LINK_SPEED:</div><div class='ctx'> 		priv-&gt;adminq_report_link_speed_cnt++;</div><div class='ctx'> 		break;</div><div class='add'>+	case GVE_ADMINQ_REPORT_NIC_TIMESTAMP:</div><div class='add'>+		priv-&gt;adminq_report_nic_timestamp_cnt++;</div><div class='add'>+		break;</div><div class='ctx'> 	case GVE_ADMINQ_GET_PTYPE_MAP:</div><div class='ctx'> 		priv-&gt;adminq_get_ptype_map_cnt++;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -564,6 +589,7 @@ static int gve_adminq_issue_cmd(struct gve_priv *priv,</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(&amp;priv-&gt;pdev-&gt;dev, "unknown AQ command opcode %d\n", opcode);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -625,7 +651,7 @@ static int gve_adminq_execute_extended_cmd(struct gve_priv *priv, u32 opcode,</div><div class='ctx'> </div><div class='ctx'> /* The device specifies that the management vector can either be the first irq</div><div class='ctx'>  * or the last irq. ntfy_blk_msix_base_idx indicates the first irq assigned to</div><div class='del'>- * the ntfy blks. It if is 0 then the management vector is last, if it is 1 then</div><div class='add'>+ * the ntfy blks. If it is 0 then the management vector is last, if it is 1 then</div><div class='ctx'>  * the management vector is first.</div><div class='ctx'>  *</div><div class='ctx'>  * gve arranges the msix vectors so that the management vector is last.</div><div class='hunk'>@@ -709,13 +735,19 @@ int gve_adminq_create_tx_queues(struct gve_priv *priv, u32 start_id, u32 num_que</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;priv-&gt;adminq_lock);</div><div class='add'>+</div><div class='ctx'> 	for (i = start_id; i &lt; start_id + num_queues; i++) {</div><div class='ctx'> 		err = gve_adminq_create_tx_queue(priv, i);</div><div class='ctx'> 		if (err)</div><div class='del'>-			return err;</div><div class='add'>+			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return gve_adminq_kick_and_wait(priv);</div><div class='add'>+	err = gve_adminq_kick_and_wait(priv);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;adminq_lock);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gve_adminq_get_create_rx_queue_cmd(struct gve_priv *priv,</div><div class='hunk'>@@ -731,6 +763,7 @@ static void gve_adminq_get_create_rx_queue_cmd(struct gve_priv *priv,</div><div class='ctx'> 		.ntfy_id = cpu_to_be32(rx-&gt;ntfy_id),</div><div class='ctx'> 		.queue_resources_addr = cpu_to_be64(rx-&gt;q_resources_bus),</div><div class='ctx'> 		.rx_ring_size = cpu_to_be16(priv-&gt;rx_desc_cnt),</div><div class='add'>+		.packet_buffer_size = cpu_to_be16(rx-&gt;packet_buffer_size),</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	if (gve_is_gqi(priv)) {</div><div class='hunk'>@@ -743,7 +776,6 @@ static void gve_adminq_get_create_rx_queue_cmd(struct gve_priv *priv,</div><div class='ctx'> 			cpu_to_be64(rx-&gt;data.data_bus);</div><div class='ctx'> 		cmd-&gt;create_rx_queue.index = cpu_to_be32(queue_index);</div><div class='ctx'> 		cmd-&gt;create_rx_queue.queue_page_list_id = cpu_to_be32(qpl_id);</div><div class='del'>-		cmd-&gt;create_rx_queue.packet_buffer_size = cpu_to_be16(rx-&gt;packet_buffer_size);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		u32 qpl_id = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -756,8 +788,6 @@ static void gve_adminq_get_create_rx_queue_cmd(struct gve_priv *priv,</div><div class='ctx'> 			cpu_to_be64(rx-&gt;dqo.complq.bus);</div><div class='ctx'> 		cmd-&gt;create_rx_queue.rx_data_ring_addr =</div><div class='ctx'> 			cpu_to_be64(rx-&gt;dqo.bufq.bus);</div><div class='del'>-		cmd-&gt;create_rx_queue.packet_buffer_size =</div><div class='del'>-			cpu_to_be16(priv-&gt;data_buffer_size_dqo);</div><div class='ctx'> 		cmd-&gt;create_rx_queue.rx_buff_ring_size =</div><div class='ctx'> 			cpu_to_be16(priv-&gt;rx_desc_cnt);</div><div class='ctx'> 		cmd-&gt;create_rx_queue.enable_rsc =</div><div class='hunk'>@@ -790,13 +820,19 @@ int gve_adminq_create_rx_queues(struct gve_priv *priv, u32 num_queues)</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;priv-&gt;adminq_lock);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; num_queues; i++) {</div><div class='ctx'> 		err = gve_adminq_create_rx_queue(priv, i);</div><div class='ctx'> 		if (err)</div><div class='del'>-			return err;</div><div class='add'>+			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return gve_adminq_kick_and_wait(priv);</div><div class='add'>+	err = gve_adminq_kick_and_wait(priv);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;adminq_lock);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gve_adminq_destroy_tx_queue(struct gve_priv *priv, u32 queue_index)</div><div class='hunk'>@@ -822,13 +858,19 @@ int gve_adminq_destroy_tx_queues(struct gve_priv *priv, u32 start_id, u32 num_qu</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;priv-&gt;adminq_lock);</div><div class='add'>+</div><div class='ctx'> 	for (i = start_id; i &lt; start_id + num_queues; i++) {</div><div class='ctx'> 		err = gve_adminq_destroy_tx_queue(priv, i);</div><div class='ctx'> 		if (err)</div><div class='del'>-			return err;</div><div class='add'>+			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return gve_adminq_kick_and_wait(priv);</div><div class='add'>+	err = gve_adminq_kick_and_wait(priv);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;adminq_lock);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gve_adminq_make_destroy_rx_queue_cmd(union gve_adminq_command *cmd,</div><div class='hunk'>@@ -863,13 +905,19 @@ int gve_adminq_destroy_rx_queues(struct gve_priv *priv, u32 num_queues)</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;priv-&gt;adminq_lock);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; num_queues; i++) {</div><div class='ctx'> 		err = gve_adminq_destroy_rx_queue(priv, i);</div><div class='ctx'> 		if (err)</div><div class='del'>-			return err;</div><div class='add'>+			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return gve_adminq_kick_and_wait(priv);</div><div class='add'>+	err = gve_adminq_kick_and_wait(priv);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;adminq_lock);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gve_set_default_desc_cnt(struct gve_priv *priv,</div><div class='hunk'>@@ -885,6 +933,15 @@ static void gve_set_default_desc_cnt(struct gve_priv *priv,</div><div class='ctx'> 	priv-&gt;min_rx_desc_cnt = priv-&gt;rx_desc_cnt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void gve_set_default_rss_sizes(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!gve_is_gqi(priv)) {</div><div class='add'>+		priv-&gt;rss_key_size = GVE_RSS_KEY_SIZE;</div><div class='add'>+		priv-&gt;rss_lut_size = GVE_RSS_INDIR_SIZE;</div><div class='add'>+		priv-&gt;cache_rss_config = true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void gve_enable_supported_features(struct gve_priv *priv,</div><div class='ctx'> 					  u32 supported_features_mask,</div><div class='ctx'> 					  const struct gve_device_option_jumbo_frames</div><div class='hunk'>@@ -897,6 +954,8 @@ static void gve_enable_supported_features(struct gve_priv *priv,</div><div class='ctx'> 					  *dev_op_flow_steering,</div><div class='ctx'> 					  const struct gve_device_option_rss_config</div><div class='ctx'> 					  *dev_op_rss_config,</div><div class='add'>+					  const struct gve_device_option_nic_timestamp</div><div class='add'>+					  *dev_op_nic_timestamp,</div><div class='ctx'> 					  const struct gve_device_option_modify_ring</div><div class='ctx'> 					  *dev_op_modify_ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -928,6 +987,10 @@ static void gve_enable_supported_features(struct gve_priv *priv,</div><div class='ctx'> 		dev_info(&amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "BUFFER SIZES device option enabled with max_rx_buffer_size of %u, header_buf_size of %u.\n",</div><div class='ctx'> 			 priv-&gt;max_rx_buffer_size, priv-&gt;header_buf_size);</div><div class='add'>+		if (gve_is_dqo(priv) &amp;&amp;</div><div class='add'>+		    priv-&gt;max_rx_buffer_size &gt; GVE_DEFAULT_RX_BUFFER_SIZE)</div><div class='add'>+			priv-&gt;rx_cfg.packet_buffer_size =</div><div class='add'>+				priv-&gt;max_rx_buffer_size;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Read and store ring size ranges given by device */</div><div class='hunk'>@@ -968,11 +1031,20 @@ static void gve_enable_supported_features(struct gve_priv *priv,</div><div class='ctx'> 			be16_to_cpu(dev_op_rss_config-&gt;hash_key_size);</div><div class='ctx'> 		priv-&gt;rss_lut_size =</div><div class='ctx'> 			be16_to_cpu(dev_op_rss_config-&gt;hash_lut_size);</div><div class='add'>+		priv-&gt;cache_rss_config = false;</div><div class='add'>+		dev_dbg(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+			"RSS device option enabled with key size of %u, lut size of %u.\n",</div><div class='add'>+			priv-&gt;rss_key_size, priv-&gt;rss_lut_size);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (dev_op_nic_timestamp &amp;&amp;</div><div class='add'>+	    (supported_features_mask &amp; GVE_SUP_NIC_TIMESTAMP_MASK))</div><div class='add'>+		priv-&gt;nic_timestamp_supported = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int gve_adminq_describe_device(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	struct gve_device_option_nic_timestamp *dev_op_nic_timestamp = NULL;</div><div class='ctx'> 	struct gve_device_option_flow_steering *dev_op_flow_steering = NULL;</div><div class='ctx'> 	struct gve_device_option_buffer_sizes *dev_op_buffer_sizes = NULL;</div><div class='ctx'> 	struct gve_device_option_jumbo_frames *dev_op_jumbo_frames = NULL;</div><div class='hunk'>@@ -1013,6 +1085,7 @@ int gve_adminq_describe_device(struct gve_priv *priv)</div><div class='ctx'> 					 &amp;dev_op_buffer_sizes,</div><div class='ctx'> 					 &amp;dev_op_flow_steering,</div><div class='ctx'> 					 &amp;dev_op_rss_config,</div><div class='add'>+					 &amp;dev_op_nic_timestamp,</div><div class='ctx'> 					 &amp;dev_op_modify_ring);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto free_device_descriptor;</div><div class='hunk'>@@ -1052,6 +1125,8 @@ int gve_adminq_describe_device(struct gve_priv *priv)</div><div class='ctx'> 	/* set default descriptor counts */</div><div class='ctx'> 	gve_set_default_desc_cnt(priv, descriptor);</div><div class='ctx'> </div><div class='add'>+	gve_set_default_rss_sizes(priv);</div><div class='add'>+</div><div class='ctx'> 	/* DQO supports LRO. */</div><div class='ctx'> 	if (!gve_is_gqi(priv))</div><div class='ctx'> 		priv-&gt;dev-&gt;hw_features |= NETIF_F_LRO;</div><div class='hunk'>@@ -1075,7 +1150,8 @@ int gve_adminq_describe_device(struct gve_priv *priv)</div><div class='ctx'> 	gve_enable_supported_features(priv, supported_features_mask,</div><div class='ctx'> 				      dev_op_jumbo_frames, dev_op_dqo_qpl,</div><div class='ctx'> 				      dev_op_buffer_sizes, dev_op_flow_steering,</div><div class='del'>-				      dev_op_rss_config, dev_op_modify_ring);</div><div class='add'>+				      dev_op_rss_config, dev_op_nic_timestamp,</div><div class='add'>+				      dev_op_modify_ring);</div><div class='ctx'> </div><div class='ctx'> free_device_descriptor:</div><div class='ctx'> 	dma_pool_free(priv-&gt;adminq_pool, descriptor, descriptor_bus);</div><div class='hunk'>@@ -1128,20 +1204,6 @@ int gve_adminq_unregister_page_list(struct gve_priv *priv, u32 page_list_id)</div><div class='ctx'> 	return gve_adminq_execute_cmd(priv, &amp;cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int gve_adminq_set_mtu(struct gve_priv *priv, u64 mtu)</div><div class='del'>-{</div><div class='del'>-	union gve_adminq_command cmd;</div><div class='del'>-</div><div class='del'>-	memset(&amp;cmd, 0, sizeof(cmd));</div><div class='del'>-	cmd.opcode = cpu_to_be32(GVE_ADMINQ_SET_DRIVER_PARAMETER);</div><div class='del'>-	cmd.set_driver_param = (struct gve_adminq_set_driver_parameter) {</div><div class='del'>-		.parameter_type = cpu_to_be32(GVE_SET_PARAM_MTU),</div><div class='del'>-		.parameter_value = cpu_to_be64(mtu),</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	return gve_adminq_execute_cmd(priv, &amp;cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int gve_adminq_report_stats(struct gve_priv *priv, u64 stats_report_len,</div><div class='ctx'> 			    dma_addr_t stats_report_addr, u64 interval)</div><div class='ctx'> {</div><div class='hunk'>@@ -1201,6 +1263,22 @@ int gve_adminq_report_link_speed(struct gve_priv *priv)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int gve_adminq_report_nic_ts(struct gve_priv *priv,</div><div class='add'>+			     dma_addr_t nic_ts_report_addr)</div><div class='add'>+{</div><div class='add'>+	union gve_adminq_command cmd;</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0, sizeof(cmd));</div><div class='add'>+	cmd.opcode = cpu_to_be32(GVE_ADMINQ_REPORT_NIC_TIMESTAMP);</div><div class='add'>+	cmd.report_nic_ts = (struct gve_adminq_report_nic_ts) {</div><div class='add'>+		.nic_ts_report_len =</div><div class='add'>+			cpu_to_be64(sizeof(struct gve_nic_ts_report)),</div><div class='add'>+		.nic_ts_report_addr = cpu_to_be64(nic_ts_report_addr),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return gve_adminq_execute_cmd(priv, &amp;cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int gve_adminq_get_ptype_map_dqo(struct gve_priv *priv,</div><div class='ctx'> 				 struct gve_ptype_lut *ptype_lut)</div><div class='ctx'> {</div><div class='hunk'>@@ -1248,10 +1326,10 @@ gve_adminq_configure_flow_rule(struct gve_priv *priv,</div><div class='ctx'> 			sizeof(struct gve_adminq_configure_flow_rule),</div><div class='ctx'> 			flow_rule_cmd);</div><div class='ctx'> </div><div class='del'>-	if (err) {</div><div class='add'>+	if (err == -ETIME) {</div><div class='ctx'> 		dev_err(&amp;priv-&gt;pdev-&gt;dev, "Timeout to configure the flow rule, trigger reset");</div><div class='ctx'> 		gve_reset(priv, true);</div><div class='del'>-	} else {</div><div class='add'>+	} else if (!err) {</div><div class='ctx'> 		priv-&gt;flow_rules_cache.rules_cache_synced = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1290,8 +1368,9 @@ int gve_adminq_reset_flow_rules(struct gve_priv *priv)</div><div class='ctx'> </div><div class='ctx'> int gve_adminq_configure_rss(struct gve_priv *priv, struct ethtool_rxfh_param *rxfh)</div><div class='ctx'> {</div><div class='add'>+	const u32 *hash_lut_to_config = NULL;</div><div class='add'>+	const u8 *hash_key_to_config = NULL;</div><div class='ctx'> 	dma_addr_t lut_bus = 0, key_bus = 0;</div><div class='del'>-	u16 key_size = 0, lut_size = 0;</div><div class='ctx'> 	union gve_adminq_command cmd;</div><div class='ctx'> 	__be32 *lut = NULL;</div><div class='ctx'> 	u8 hash_alg = 0;</div><div class='hunk'>@@ -1301,7 +1380,7 @@ int gve_adminq_configure_rss(struct gve_priv *priv, struct ethtool_rxfh_param *r</div><div class='ctx'> </div><div class='ctx'> 	switch (rxfh-&gt;hfunc) {</div><div class='ctx'> 	case ETH_RSS_HASH_NO_CHANGE:</div><div class='del'>-		break;</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case ETH_RSS_HASH_TOP:</div><div class='ctx'> 		hash_alg = ETH_RSS_HASH_TOP;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1310,27 +1389,46 @@ int gve_adminq_configure_rss(struct gve_priv *priv, struct ethtool_rxfh_param *r</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rxfh-&gt;indir) {</div><div class='del'>-		lut_size = priv-&gt;rss_lut_size;</div><div class='add'>+		if (rxfh-&gt;indir_size != priv-&gt;rss_lut_size)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		hash_lut_to_config = rxfh-&gt;indir;</div><div class='add'>+	} else if (priv-&gt;cache_rss_config) {</div><div class='add'>+		hash_lut_to_config = priv-&gt;rss_config.hash_lut;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hash_lut_to_config) {</div><div class='ctx'> 		lut = dma_alloc_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='del'>-					 lut_size * sizeof(*lut),</div><div class='add'>+					 priv-&gt;rss_lut_size * sizeof(*lut),</div><div class='ctx'> 					 &amp;lut_bus, GFP_KERNEL);</div><div class='ctx'> 		if (!lut)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; priv-&gt;rss_lut_size; i++)</div><div class='del'>-			lut[i] = cpu_to_be32(rxfh-&gt;indir[i]);</div><div class='add'>+			lut[i] = cpu_to_be32(hash_lut_to_config[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rxfh-&gt;key) {</div><div class='del'>-		key_size = priv-&gt;rss_key_size;</div><div class='add'>+		if (rxfh-&gt;key_size != priv-&gt;rss_key_size) {</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hash_key_to_config = rxfh-&gt;key;</div><div class='add'>+	} else if (priv-&gt;cache_rss_config) {</div><div class='add'>+		hash_key_to_config = priv-&gt;rss_config.hash_key;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hash_key_to_config) {</div><div class='ctx'> 		key = dma_alloc_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='del'>-					 key_size, &amp;key_bus, GFP_KERNEL);</div><div class='add'>+					 priv-&gt;rss_key_size,</div><div class='add'>+					 &amp;key_bus, GFP_KERNEL);</div><div class='ctx'> 		if (!key) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		memcpy(key, rxfh-&gt;key, key_size);</div><div class='add'>+		memcpy(key, hash_key_to_config, priv-&gt;rss_key_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Zero-valued fields in the cmd.configure_rss instruct the device to</div><div class='hunk'>@@ -1344,8 +1442,10 @@ int gve_adminq_configure_rss(struct gve_priv *priv, struct ethtool_rxfh_param *r</div><div class='ctx'> 					  BIT(GVE_RSS_HASH_TCPV6) |</div><div class='ctx'> 					  BIT(GVE_RSS_HASH_UDPV6)),</div><div class='ctx'> 		.hash_alg = hash_alg,</div><div class='del'>-		.hash_key_size = cpu_to_be16(key_size),</div><div class='del'>-		.hash_lut_size = cpu_to_be16(lut_size),</div><div class='add'>+		.hash_key_size =</div><div class='add'>+			cpu_to_be16((key_bus) ? priv-&gt;rss_key_size : 0),</div><div class='add'>+		.hash_lut_size =</div><div class='add'>+			cpu_to_be16((lut_bus) ? priv-&gt;rss_lut_size : 0),</div><div class='ctx'> 		.hash_key_addr = cpu_to_be64(key_bus),</div><div class='ctx'> 		.hash_lut_addr = cpu_to_be64(lut_bus),</div><div class='ctx'> 	};</div><div class='hunk'>@@ -1355,11 +1455,11 @@ int gve_adminq_configure_rss(struct gve_priv *priv, struct ethtool_rxfh_param *r</div><div class='ctx'> out:</div><div class='ctx'> 	if (lut)</div><div class='ctx'> 		dma_free_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='del'>-				  lut_size * sizeof(*lut),</div><div class='add'>+				  priv-&gt;rss_lut_size * sizeof(*lut),</div><div class='ctx'> 				  lut, lut_bus);</div><div class='ctx'> 	if (key)</div><div class='ctx'> 		dma_free_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='del'>-				  key_size, key, key_bus);</div><div class='add'>+				  priv-&gt;rss_key_size, key, key_bus);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1463,12 +1563,15 @@ static int gve_adminq_process_rss_query(struct gve_priv *priv,</div><div class='ctx'> 	rxfh-&gt;hfunc = descriptor-&gt;hash_alg;</div><div class='ctx'> </div><div class='ctx'> 	rss_info_addr = (void *)(descriptor + 1);</div><div class='del'>-	if (rxfh-&gt;key)</div><div class='add'>+	if (rxfh-&gt;key) {</div><div class='add'>+		rxfh-&gt;key_size = priv-&gt;rss_key_size;</div><div class='ctx'> 		memcpy(rxfh-&gt;key, rss_info_addr, priv-&gt;rss_key_size);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	rss_info_addr += priv-&gt;rss_key_size;</div><div class='ctx'> 	lut = (__be32 *)rss_info_addr;</div><div class='ctx'> 	if (rxfh-&gt;indir) {</div><div class='add'>+		rxfh-&gt;indir_size = priv-&gt;rss_lut_size;</div><div class='ctx'> 		for (i = 0; i &lt; priv-&gt;rss_lut_size; i++)</div><div class='ctx'> 			rxfh-&gt;indir[i] = be32_to_cpu(lut[i]);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_adminq.h b/drivers/net/ethernet/google/gve/gve_adminq.h<br/>index 863683de9694..22a74b6aa17e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_adminq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_adminq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_adminq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_adminq.h</a></div><div class='hunk'>@@ -27,6 +27,7 @@ enum gve_adminq_opcodes {</div><div class='ctx'> 	GVE_ADMINQ_GET_PTYPE_MAP		= 0xE,</div><div class='ctx'> 	GVE_ADMINQ_VERIFY_DRIVER_COMPATIBILITY	= 0xF,</div><div class='ctx'> 	GVE_ADMINQ_QUERY_FLOW_RULES		= 0x10,</div><div class='add'>+	GVE_ADMINQ_REPORT_NIC_TIMESTAMP		= 0x11,</div><div class='ctx'> 	GVE_ADMINQ_QUERY_RSS			= 0x12,</div><div class='ctx'> </div><div class='ctx'> 	/* For commands that are larger than 56 bytes */</div><div class='hunk'>@@ -174,6 +175,12 @@ struct gve_device_option_rss_config {</div><div class='ctx'> </div><div class='ctx'> static_assert(sizeof(struct gve_device_option_rss_config) == 8);</div><div class='ctx'> </div><div class='add'>+struct gve_device_option_nic_timestamp {</div><div class='add'>+	__be32 supported_features_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(sizeof(struct gve_device_option_nic_timestamp) == 4);</div><div class='add'>+</div><div class='ctx'> /* Terminology:</div><div class='ctx'>  *</div><div class='ctx'>  * RDA - Raw DMA Addressing - Buffers associated with SKBs are directly DMA</div><div class='hunk'>@@ -192,6 +199,7 @@ enum gve_dev_opt_id {</div><div class='ctx'> 	GVE_DEV_OPT_ID_JUMBO_FRAMES		= 0x8,</div><div class='ctx'> 	GVE_DEV_OPT_ID_BUFFER_SIZES		= 0xa,</div><div class='ctx'> 	GVE_DEV_OPT_ID_FLOW_STEERING		= 0xb,</div><div class='add'>+	GVE_DEV_OPT_ID_NIC_TIMESTAMP		= 0xd,</div><div class='ctx'> 	GVE_DEV_OPT_ID_RSS_CONFIG		= 0xe,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -206,6 +214,7 @@ enum gve_dev_opt_req_feat_mask {</div><div class='ctx'> 	GVE_DEV_OPT_REQ_FEAT_MASK_MODIFY_RING		= 0x0,</div><div class='ctx'> 	GVE_DEV_OPT_REQ_FEAT_MASK_FLOW_STEERING		= 0x0,</div><div class='ctx'> 	GVE_DEV_OPT_REQ_FEAT_MASK_RSS_CONFIG		= 0x0,</div><div class='add'>+	GVE_DEV_OPT_REQ_FEAT_MASK_NIC_TIMESTAMP		= 0x0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum gve_sup_feature_mask {</div><div class='hunk'>@@ -214,6 +223,7 @@ enum gve_sup_feature_mask {</div><div class='ctx'> 	GVE_SUP_BUFFER_SIZES_MASK	= 1 &lt;&lt; 4,</div><div class='ctx'> 	GVE_SUP_FLOW_STEERING_MASK	= 1 &lt;&lt; 5,</div><div class='ctx'> 	GVE_SUP_RSS_CONFIG_MASK		= 1 &lt;&lt; 7,</div><div class='add'>+	GVE_SUP_NIC_TIMESTAMP_MASK	= 1 &lt;&lt; 8,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define GVE_DEV_OPT_LEN_GQI_RAW_ADDRESSING 0x0</div><div class='hunk'>@@ -392,6 +402,21 @@ struct gve_adminq_report_link_speed {</div><div class='ctx'> </div><div class='ctx'> static_assert(sizeof(struct gve_adminq_report_link_speed) == 8);</div><div class='ctx'> </div><div class='add'>+struct gve_adminq_report_nic_ts {</div><div class='add'>+	__be64 nic_ts_report_len;</div><div class='add'>+	__be64 nic_ts_report_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(sizeof(struct gve_adminq_report_nic_ts) == 16);</div><div class='add'>+</div><div class='add'>+struct gve_nic_ts_report {</div><div class='add'>+	__be64 nic_timestamp; /* NIC clock in nanoseconds */</div><div class='add'>+	__be64 reserved1;</div><div class='add'>+	__be64 reserved2;</div><div class='add'>+	__be64 reserved3;</div><div class='add'>+	__be64 reserved4;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct stats {</div><div class='ctx'> 	__be32 stat_name;</div><div class='ctx'> 	__be32 queue_id;</div><div class='hunk'>@@ -451,7 +476,7 @@ struct gve_ptype_entry {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct gve_ptype_map {</div><div class='del'>-	struct gve_ptype_entry ptypes[1 &lt;&lt; 10]; /* PTYPES are always 10 bits. */</div><div class='add'>+	struct gve_ptype_entry ptypes[GVE_NUM_PTYPES]; /* PTYPES are always 10 bits. */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct gve_adminq_get_ptype_map {</div><div class='hunk'>@@ -585,6 +610,7 @@ union gve_adminq_command {</div><div class='ctx'> 			struct gve_adminq_query_flow_rules query_flow_rules;</div><div class='ctx'> 			struct gve_adminq_configure_rss configure_rss;</div><div class='ctx'> 			struct gve_adminq_query_rss query_rss;</div><div class='add'>+			struct gve_adminq_report_nic_ts report_nic_ts;</div><div class='ctx'> 			struct gve_adminq_extended_command extended_command;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='hunk'>@@ -612,7 +638,6 @@ int gve_adminq_destroy_rx_queues(struct gve_priv *priv, u32 queue_id);</div><div class='ctx'> int gve_adminq_register_page_list(struct gve_priv *priv,</div><div class='ctx'> 				  struct gve_queue_page_list *qpl);</div><div class='ctx'> int gve_adminq_unregister_page_list(struct gve_priv *priv, u32 page_list_id);</div><div class='del'>-int gve_adminq_set_mtu(struct gve_priv *priv, u64 mtu);</div><div class='ctx'> int gve_adminq_report_stats(struct gve_priv *priv, u64 stats_report_len,</div><div class='ctx'> 			    dma_addr_t stats_report_addr, u64 interval);</div><div class='ctx'> int gve_adminq_verify_driver_compatibility(struct gve_priv *priv,</div><div class='hunk'>@@ -625,6 +650,8 @@ int gve_adminq_reset_flow_rules(struct gve_priv *priv);</div><div class='ctx'> int gve_adminq_query_flow_rules(struct gve_priv *priv, u16 query_opcode, u32 starting_loc);</div><div class='ctx'> int gve_adminq_configure_rss(struct gve_priv *priv, struct ethtool_rxfh_param *rxfh);</div><div class='ctx'> int gve_adminq_query_rss_config(struct gve_priv *priv, struct ethtool_rxfh_param *rxfh);</div><div class='add'>+int gve_adminq_report_nic_ts(struct gve_priv *priv,</div><div class='add'>+			     dma_addr_t nic_ts_report_addr);</div><div class='ctx'> </div><div class='ctx'> struct gve_ptype_lut;</div><div class='ctx'> int gve_adminq_get_ptype_map_dqo(struct gve_priv *priv,</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_buffer_mgmt_dqo.c b/drivers/net/ethernet/google/gve/gve_buffer_mgmt_dqo.c<br/>index 403f0f335ba6..0e2b703c673a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_buffer_mgmt_dqo.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_buffer_mgmt_dqo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_buffer_mgmt_dqo.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_buffer_mgmt_dqo.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * Copyright (C) 2015-2024 Google, Inc.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;net/xdp_sock_drv.h&gt;</div><div class='ctx'> #include "gve.h"</div><div class='ctx'> #include "gve_utils.h"</div><div class='ctx'> </div><div class='hunk'>@@ -29,6 +30,10 @@ struct gve_rx_buf_state_dqo *gve_alloc_buf_state(struct gve_rx_ring *rx)</div><div class='ctx'> 	/* Point buf_state to itself to mark it as allocated */</div><div class='ctx'> 	buf_state-&gt;next = buffer_id;</div><div class='ctx'> </div><div class='add'>+	/* Clear the buffer pointers */</div><div class='add'>+	buf_state-&gt;page_info.page = NULL;</div><div class='add'>+	buf_state-&gt;xsk_buff = NULL;</div><div class='add'>+</div><div class='ctx'> 	return buf_state;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -139,7 +144,8 @@ int gve_alloc_qpl_page_dqo(struct gve_rx_ring *rx,</div><div class='ctx'> 	buf_state-&gt;page_info.page_offset = 0;</div><div class='ctx'> 	buf_state-&gt;page_info.page_address =</div><div class='ctx'> 		page_address(buf_state-&gt;page_info.page);</div><div class='del'>-	buf_state-&gt;page_info.buf_size = priv-&gt;data_buffer_size_dqo;</div><div class='add'>+	buf_state-&gt;page_info.buf_size = rx-&gt;packet_buffer_truesize;</div><div class='add'>+	buf_state-&gt;page_info.pad = rx-&gt;rx_headroom;</div><div class='ctx'> 	buf_state-&gt;last_single_ref_offset = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* The page already has 1 ref. */</div><div class='hunk'>@@ -162,7 +168,7 @@ void gve_free_qpl_page_dqo(struct gve_rx_buf_state_dqo *buf_state)</div><div class='ctx'> void gve_try_recycle_buf(struct gve_priv *priv, struct gve_rx_ring *rx,</div><div class='ctx'> 			 struct gve_rx_buf_state_dqo *buf_state)</div><div class='ctx'> {</div><div class='del'>-	const u16 data_buffer_size = priv-&gt;data_buffer_size_dqo;</div><div class='add'>+	const u16 data_buffer_size = rx-&gt;packet_buffer_truesize;</div><div class='ctx'> 	int pagecount;</div><div class='ctx'> </div><div class='ctx'> 	/* Can't reuse if we only fit one buffer per page */</div><div class='hunk'>@@ -205,51 +211,60 @@ void gve_free_to_page_pool(struct gve_rx_ring *rx,</div><div class='ctx'> 			   struct gve_rx_buf_state_dqo *buf_state,</div><div class='ctx'> 			   bool allow_direct)</div><div class='ctx'> {</div><div class='del'>-	struct page *page = buf_state-&gt;page_info.page;</div><div class='add'>+	netmem_ref netmem = buf_state-&gt;page_info.netmem;</div><div class='ctx'> </div><div class='del'>-	if (!page)</div><div class='add'>+	if (!netmem)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	page_pool_put_full_page(page-&gt;pp, page, allow_direct);</div><div class='del'>-	buf_state-&gt;page_info.page = NULL;</div><div class='add'>+	page_pool_put_full_netmem(netmem_get_pp(netmem), netmem, allow_direct);</div><div class='add'>+	buf_state-&gt;page_info.netmem = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gve_alloc_from_page_pool(struct gve_rx_ring *rx,</div><div class='ctx'> 				    struct gve_rx_buf_state_dqo *buf_state)</div><div class='ctx'> {</div><div class='del'>-	struct gve_priv *priv = rx-&gt;gve;</div><div class='del'>-	struct page *page;</div><div class='add'>+	netmem_ref netmem;</div><div class='ctx'> </div><div class='del'>-	buf_state-&gt;page_info.buf_size = priv-&gt;data_buffer_size_dqo;</div><div class='del'>-	page = page_pool_alloc(rx-&gt;dqo.page_pool,</div><div class='del'>-			       &amp;buf_state-&gt;page_info.page_offset,</div><div class='del'>-			       &amp;buf_state-&gt;page_info.buf_size, GFP_ATOMIC);</div><div class='add'>+	buf_state-&gt;page_info.buf_size = rx-&gt;packet_buffer_truesize;</div><div class='add'>+	netmem = page_pool_alloc_netmem(rx-&gt;dqo.page_pool,</div><div class='add'>+					&amp;buf_state-&gt;page_info.page_offset,</div><div class='add'>+					&amp;buf_state-&gt;page_info.buf_size,</div><div class='add'>+					GFP_ATOMIC);</div><div class='ctx'> </div><div class='del'>-	if (!page)</div><div class='add'>+	if (!netmem)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	buf_state-&gt;page_info.page = page;</div><div class='del'>-	buf_state-&gt;page_info.page_address = page_address(page);</div><div class='del'>-	buf_state-&gt;addr = page_pool_get_dma_addr(page);</div><div class='add'>+	buf_state-&gt;page_info.netmem = netmem;</div><div class='add'>+	buf_state-&gt;page_info.page_address = netmem_address(netmem);</div><div class='add'>+	buf_state-&gt;addr = page_pool_get_dma_addr_netmem(netmem);</div><div class='add'>+	buf_state-&gt;page_info.pad = rx-&gt;dqo.page_pool-&gt;p.offset;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct page_pool *gve_rx_create_page_pool(struct gve_priv *priv,</div><div class='del'>-					  struct gve_rx_ring *rx)</div><div class='add'>+					  struct gve_rx_ring *rx,</div><div class='add'>+					  bool xdp)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ntfy_id = gve_rx_idx_to_ntfy(priv, rx-&gt;q_num);</div><div class='ctx'> 	struct page_pool_params pp = {</div><div class='ctx'> 		.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV,</div><div class='ctx'> 		.order = 0,</div><div class='ctx'> 		.pool_size = GVE_PAGE_POOL_SIZE_MULTIPLIER * priv-&gt;rx_desc_cnt,</div><div class='add'>+		.nid = priv-&gt;numa_node,</div><div class='ctx'> 		.dev = &amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 		.netdev = priv-&gt;dev,</div><div class='ctx'> 		.napi = &amp;priv-&gt;ntfy_blocks[ntfy_id].napi,</div><div class='ctx'> 		.max_len = PAGE_SIZE,</div><div class='del'>-		.dma_dir = DMA_FROM_DEVICE,</div><div class='add'>+		.dma_dir = xdp ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE,</div><div class='add'>+		.offset = xdp ? XDP_PACKET_HEADROOM : 0,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;header_split_enabled) {</div><div class='add'>+		pp.flags |= PP_FLAG_ALLOW_UNREADABLE_NETMEM;</div><div class='add'>+		pp.queue_idx = rx-&gt;q_num;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return page_pool_create(&amp;pp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -269,7 +284,7 @@ void gve_reuse_buffer(struct gve_rx_ring *rx,</div><div class='ctx'> 		      struct gve_rx_buf_state_dqo *buf_state)</div><div class='ctx'> {</div><div class='ctx'> 	if (rx-&gt;dqo.page_pool) {</div><div class='del'>-		buf_state-&gt;page_info.page = NULL;</div><div class='add'>+		buf_state-&gt;page_info.netmem = 0;</div><div class='ctx'> 		gve_free_buf_state(rx, buf_state);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		gve_dec_pagecnt_bias(&amp;buf_state-&gt;page_info);</div><div class='hunk'>@@ -281,7 +296,24 @@ int gve_alloc_buffer(struct gve_rx_ring *rx, struct gve_rx_desc_dqo *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_rx_buf_state_dqo *buf_state;</div><div class='ctx'> </div><div class='del'>-	if (rx-&gt;dqo.page_pool) {</div><div class='add'>+	if (rx-&gt;xsk_pool) {</div><div class='add'>+		buf_state = gve_alloc_buf_state(rx);</div><div class='add'>+		if (unlikely(!buf_state))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		buf_state-&gt;xsk_buff = xsk_buff_alloc(rx-&gt;xsk_pool);</div><div class='add'>+		if (unlikely(!buf_state-&gt;xsk_buff)) {</div><div class='add'>+			xsk_set_rx_need_wakeup(rx-&gt;xsk_pool);</div><div class='add'>+			gve_free_buf_state(rx, buf_state);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+		/* Allocated xsk buffer. Clear wakeup in case it was set. */</div><div class='add'>+		xsk_clear_rx_need_wakeup(rx-&gt;xsk_pool);</div><div class='add'>+		desc-&gt;buf_id = cpu_to_le16(buf_state - rx-&gt;dqo.buf_states);</div><div class='add'>+		desc-&gt;buf_addr =</div><div class='add'>+			cpu_to_le64(xsk_buff_xdp_get_dma(buf_state-&gt;xsk_buff));</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (rx-&gt;dqo.page_pool) {</div><div class='ctx'> 		buf_state = gve_alloc_buf_state(rx);</div><div class='ctx'> 		if (WARN_ON_ONCE(!buf_state))</div><div class='ctx'> 			return -ENOMEM;</div><div class='hunk'>@@ -301,7 +333,8 @@ int gve_alloc_buffer(struct gve_rx_ring *rx, struct gve_rx_desc_dqo *desc)</div><div class='ctx'> 	}</div><div class='ctx'> 	desc-&gt;buf_id = cpu_to_le16(buf_state - rx-&gt;dqo.buf_states);</div><div class='ctx'> 	desc-&gt;buf_addr = cpu_to_le64(buf_state-&gt;addr +</div><div class='del'>-				     buf_state-&gt;page_info.page_offset);</div><div class='add'>+				     buf_state-&gt;page_info.page_offset +</div><div class='add'>+				     buf_state-&gt;page_info.pad);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_desc_dqo.h b/drivers/net/ethernet/google/gve/gve_desc_dqo.h<br/>index f79cd0591110..f7786b03c744 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_desc_dqo.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_desc_dqo.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_desc_dqo.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_desc_dqo.h</a></div><div class='hunk'>@@ -236,7 +236,8 @@ struct gve_rx_compl_desc_dqo {</div><div class='ctx'> </div><div class='ctx'> 	u8 status_error1;</div><div class='ctx'> </div><div class='del'>-	__le16 reserved5;</div><div class='add'>+	u8 reserved5;</div><div class='add'>+	u8 ts_sub_nsecs_low;</div><div class='ctx'> 	__le16 buf_id; /* Buffer ID which was sent on the buffer queue. */</div><div class='ctx'> </div><div class='ctx'> 	union {</div><div class='hunk'>@@ -247,7 +248,8 @@ struct gve_rx_compl_desc_dqo {</div><div class='ctx'> 	};</div><div class='ctx'> 	__le32 hash;</div><div class='ctx'> 	__le32 reserved6;</div><div class='del'>-	__le64 reserved7;</div><div class='add'>+	__le32 reserved7;</div><div class='add'>+	__le32 ts; /* timestamp in nanosecs */</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> static_assert(sizeof(struct gve_rx_compl_desc_dqo) == 32);</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_dqo.h b/drivers/net/ethernet/google/gve/gve_dqo.h<br/>index e83773fb891f..5871f773f0c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_dqo.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_dqo.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_dqo.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_dqo.h</a></div><div class='hunk'>@@ -36,7 +36,10 @@ netdev_tx_t gve_tx_dqo(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> netdev_features_t gve_features_check_dqo(struct sk_buff *skb,</div><div class='ctx'> 					 struct net_device *dev,</div><div class='ctx'> 					 netdev_features_t features);</div><div class='add'>+int gve_xdp_rx_timestamp(const struct xdp_md *_ctx, u64 *timestamp);</div><div class='ctx'> bool gve_tx_poll_dqo(struct gve_notify_block *block, bool do_clean);</div><div class='add'>+bool gve_xdp_poll_dqo(struct gve_notify_block *block);</div><div class='add'>+bool gve_xsk_tx_poll_dqo(struct gve_notify_block *block, int budget);</div><div class='ctx'> int gve_rx_poll_dqo(struct gve_notify_block *block, int budget);</div><div class='ctx'> int gve_tx_alloc_rings_dqo(struct gve_priv *priv,</div><div class='ctx'> 			   struct gve_tx_alloc_rings_cfg *cfg);</div><div class='hunk'>@@ -60,6 +63,7 @@ int gve_clean_tx_done_dqo(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='ctx'> 			  struct napi_struct *napi);</div><div class='ctx'> void gve_rx_post_buffers_dqo(struct gve_rx_ring *rx);</div><div class='ctx'> void gve_rx_write_doorbell_dqo(const struct gve_priv *priv, int queue_idx);</div><div class='add'>+void gve_xdp_tx_flush_dqo(struct gve_priv *priv, u32 xdp_qid);</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='ctx'> gve_tx_put_doorbell_dqo(const struct gve_priv *priv,</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_ethtool.c b/drivers/net/ethernet/google/gve/gve_ethtool.c<br/>index bdfc6e77b2af..52500ae8348e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_ethtool.c</a></div><div class='hunk'>@@ -63,11 +63,11 @@ static const char gve_gstrings_rx_stats[][ETH_GSTRING_LEN] = {</div><div class='ctx'> static const char gve_gstrings_tx_stats[][ETH_GSTRING_LEN] = {</div><div class='ctx'> 	"tx_posted_desc[%u]", "tx_completed_desc[%u]", "tx_consumed_desc[%u]", "tx_bytes[%u]",</div><div class='ctx'> 	"tx_wake[%u]", "tx_stop[%u]", "tx_event_counter[%u]",</div><div class='del'>-	"tx_dma_mapping_error[%u]", "tx_xsk_wakeup[%u]",</div><div class='del'>-	"tx_xsk_done[%u]", "tx_xsk_sent[%u]", "tx_xdp_xmit[%u]", "tx_xdp_xmit_errors[%u]"</div><div class='add'>+	"tx_dma_mapping_error[%u]",</div><div class='add'>+	"tx_xsk_sent[%u]", "tx_xdp_xmit[%u]", "tx_xdp_xmit_errors[%u]"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char gve_gstrings_adminq_stats[][ETH_GSTRING_LEN] = {</div><div class='add'>+static const char gve_gstrings_adminq_stats[][ETH_GSTRING_LEN] __nonstring_array = {</div><div class='ctx'> 	"adminq_prod_cnt", "adminq_cmd_fail", "adminq_timeouts",</div><div class='ctx'> 	"adminq_describe_device_cnt", "adminq_cfg_device_resources_cnt",</div><div class='ctx'> 	"adminq_register_page_list_cnt", "adminq_unregister_page_list_cnt",</div><div class='hunk'>@@ -76,7 +76,7 @@ static const char gve_gstrings_adminq_stats[][ETH_GSTRING_LEN] = {</div><div class='ctx'> 	"adminq_dcfg_device_resources_cnt", "adminq_set_driver_parameter_cnt",</div><div class='ctx'> 	"adminq_report_stats_cnt", "adminq_report_link_speed_cnt", "adminq_get_ptype_map_cnt",</div><div class='ctx'> 	"adminq_query_flow_rules", "adminq_cfg_flow_rule", "adminq_cfg_rss_cnt",</div><div class='del'>-	"adminq_query_rss_cnt",</div><div class='add'>+	"adminq_query_rss_cnt", "adminq_report_nic_timestamp_cnt",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const char gve_gstrings_priv_flags[][ETH_GSTRING_LEN] = {</div><div class='hunk'>@@ -113,7 +113,7 @@ static void gve_get_strings(struct net_device *netdev, u32 stringset, u8 *data)</div><div class='ctx'> 						i);</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(gve_gstrings_adminq_stats); i++)</div><div class='del'>-			ethtool_puts(&amp;s, gve_gstrings_adminq_stats[i]);</div><div class='add'>+			ethtool_cpy(&amp;s, gve_gstrings_adminq_stats[i]);</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -392,7 +392,9 @@ gve_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 				 */</div><div class='ctx'> 				data[i++] = 0;</div><div class='ctx'> 				data[i++] = 0;</div><div class='del'>-				data[i++] = tx-&gt;dqo_tx.tail - tx-&gt;dqo_tx.head;</div><div class='add'>+				data[i++] =</div><div class='add'>+					(tx-&gt;dqo_tx.tail - tx-&gt;dqo_tx.head) &amp;</div><div class='add'>+					tx-&gt;mask;</div><div class='ctx'> 			}</div><div class='ctx'> 			do {</div><div class='ctx'> 				start =</div><div class='hunk'>@@ -417,9 +419,7 @@ gve_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 					data[i++] = value;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='del'>-			/* XDP xsk counters */</div><div class='del'>-			data[i++] = tx-&gt;xdp_xsk_wakeup;</div><div class='del'>-			data[i++] = tx-&gt;xdp_xsk_done;</div><div class='add'>+			/* XDP counters */</div><div class='ctx'> 			do {</div><div class='ctx'> 				start = u64_stats_fetch_begin(&amp;priv-&gt;tx[ring].statss);</div><div class='ctx'> 				data[i] = tx-&gt;xdp_xsk_sent;</div><div class='hunk'>@@ -456,6 +456,7 @@ gve_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 	data[i++] = priv-&gt;adminq_cfg_flow_rule_cnt;</div><div class='ctx'> 	data[i++] = priv-&gt;adminq_cfg_rss_cnt;</div><div class='ctx'> 	data[i++] = priv-&gt;adminq_query_rss_cnt;</div><div class='add'>+	data[i++] = priv-&gt;adminq_report_nic_timestamp_cnt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gve_get_channels(struct net_device *netdev,</div><div class='hunk'>@@ -477,11 +478,12 @@ static int gve_set_channels(struct net_device *netdev,</div><div class='ctx'> 			    struct ethtool_channels *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct gve_queue_config new_tx_cfg = priv-&gt;tx_cfg;</div><div class='del'>-	struct gve_queue_config new_rx_cfg = priv-&gt;rx_cfg;</div><div class='add'>+	struct gve_tx_queue_config new_tx_cfg = priv-&gt;tx_cfg;</div><div class='add'>+	struct gve_rx_queue_config new_rx_cfg = priv-&gt;rx_cfg;</div><div class='ctx'> 	struct ethtool_channels old_settings;</div><div class='ctx'> 	int new_tx = cmd-&gt;tx_count;</div><div class='ctx'> 	int new_rx = cmd-&gt;rx_count;</div><div class='add'>+	bool reset_rss = false;</div><div class='ctx'> </div><div class='ctx'> 	gve_get_channels(netdev, &amp;old_settings);</div><div class='ctx'> </div><div class='hunk'>@@ -492,22 +494,27 @@ static int gve_set_channels(struct net_device *netdev,</div><div class='ctx'> 	if (!new_rx || !new_tx)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;num_xdp_queues &amp;&amp;</div><div class='del'>-	    (new_tx != new_rx || (2 * new_tx &gt; priv-&gt;tx_cfg.max_queues))) {</div><div class='del'>-		dev_err(&amp;priv-&gt;pdev-&gt;dev, "XDP load failed: The number of configured RX queues should be equal to the number of configured TX queues and the number of configured RX/TX queues should be less than or equal to half the maximum number of RX/TX queues");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	if (priv-&gt;xdp_prog) {</div><div class='add'>+		if (new_tx != new_rx ||</div><div class='add'>+		    (2 * new_tx &gt; priv-&gt;tx_cfg.max_queues)) {</div><div class='add'>+			dev_err(&amp;priv-&gt;pdev-&gt;dev, "The number of configured RX queues should be equal to the number of configured TX queues and the number of configured RX/TX queues should be less than or equal to half the maximum number of RX/TX queues when XDP program is installed");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (!netif_running(netdev)) {</div><div class='del'>-		priv-&gt;tx_cfg.num_queues = new_tx;</div><div class='del'>-		priv-&gt;rx_cfg.num_queues = new_rx;</div><div class='del'>-		return 0;</div><div class='add'>+		/* One XDP TX queue per RX queue. */</div><div class='add'>+		new_tx_cfg.num_xdp_queues = new_rx;</div><div class='add'>+	} else {</div><div class='add'>+		new_tx_cfg.num_xdp_queues = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (new_rx != priv-&gt;rx_cfg.num_queues &amp;&amp;</div><div class='add'>+	    priv-&gt;cache_rss_config &amp;&amp; !netif_is_rxfh_configured(netdev))</div><div class='add'>+		reset_rss = true;</div><div class='add'>+</div><div class='ctx'> 	new_tx_cfg.num_queues = new_tx;</div><div class='ctx'> 	new_rx_cfg.num_queues = new_rx;</div><div class='ctx'> </div><div class='del'>-	return gve_adjust_queues(priv, new_rx_cfg, new_tx_cfg);</div><div class='add'>+	return gve_adjust_queues(priv, new_rx_cfg, new_tx_cfg, reset_rss);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gve_get_ringparam(struct net_device *netdev,</div><div class='hunk'>@@ -522,6 +529,8 @@ static void gve_get_ringparam(struct net_device *netdev,</div><div class='ctx'> 	cmd-&gt;rx_pending = priv-&gt;rx_desc_cnt;</div><div class='ctx'> 	cmd-&gt;tx_pending = priv-&gt;tx_desc_cnt;</div><div class='ctx'> </div><div class='add'>+	kernel_cmd-&gt;rx_buf_len = priv-&gt;rx_cfg.packet_buffer_size;</div><div class='add'>+</div><div class='ctx'> 	if (!gve_header_split_supported(priv))</div><div class='ctx'> 		kernel_cmd-&gt;tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_UNKNOWN;</div><div class='ctx'> 	else if (priv-&gt;header_split_enabled)</div><div class='hunk'>@@ -530,34 +539,6 @@ static void gve_get_ringparam(struct net_device *netdev,</div><div class='ctx'> 		kernel_cmd-&gt;tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_DISABLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gve_adjust_ring_sizes(struct gve_priv *priv,</div><div class='del'>-				 u16 new_tx_desc_cnt,</div><div class='del'>-				 u16 new_rx_desc_cnt)</div><div class='del'>-{</div><div class='del'>-	struct gve_tx_alloc_rings_cfg tx_alloc_cfg = {0};</div><div class='del'>-	struct gve_rx_alloc_rings_cfg rx_alloc_cfg = {0};</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* get current queue configuration */</div><div class='del'>-	gve_get_curr_alloc_cfgs(priv, &amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='del'>-</div><div class='del'>-	/* copy over the new ring_size from ethtool */</div><div class='del'>-	tx_alloc_cfg.ring_size = new_tx_desc_cnt;</div><div class='del'>-	rx_alloc_cfg.ring_size = new_rx_desc_cnt;</div><div class='del'>-</div><div class='del'>-	if (netif_running(priv-&gt;dev)) {</div><div class='del'>-		err = gve_adjust_config(priv, &amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set new ring_size for the next up */</div><div class='del'>-	priv-&gt;tx_desc_cnt = new_tx_desc_cnt;</div><div class='del'>-	priv-&gt;rx_desc_cnt = new_rx_desc_cnt;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int gve_validate_req_ring_size(struct gve_priv *priv, u16 new_tx_desc_cnt,</div><div class='ctx'> 				      u16 new_rx_desc_cnt)</div><div class='ctx'> {</div><div class='hunk'>@@ -577,34 +558,68 @@ static int gve_validate_req_ring_size(struct gve_priv *priv, u16 new_tx_desc_cnt</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gve_set_ring_sizes_config(struct gve_priv *priv, u16 new_tx_desc_cnt,</div><div class='add'>+				     u16 new_rx_desc_cnt,</div><div class='add'>+				     struct gve_tx_alloc_rings_cfg *tx_alloc_cfg,</div><div class='add'>+				     struct gve_rx_alloc_rings_cfg *rx_alloc_cfg)</div><div class='add'>+{</div><div class='add'>+	if (new_tx_desc_cnt == priv-&gt;tx_desc_cnt &amp;&amp;</div><div class='add'>+	    new_rx_desc_cnt == priv-&gt;rx_desc_cnt)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;modify_ring_size_enabled) {</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev, "Modify ring size is not supported.\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (gve_validate_req_ring_size(priv, new_tx_desc_cnt, new_rx_desc_cnt))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tx_alloc_cfg-&gt;ring_size = new_tx_desc_cnt;</div><div class='add'>+	rx_alloc_cfg-&gt;ring_size = new_rx_desc_cnt;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gve_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 			     struct ethtool_ringparam *cmd,</div><div class='ctx'> 			     struct kernel_ethtool_ringparam *kernel_cmd,</div><div class='ctx'> 			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct gve_tx_alloc_rings_cfg tx_alloc_cfg = {0};</div><div class='add'>+	struct gve_rx_alloc_rings_cfg rx_alloc_cfg = {0};</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(netdev);</div><div class='del'>-	u16 new_tx_cnt, new_rx_cnt;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = gve_set_hsplit_config(priv, kernel_cmd-&gt;tcp_data_split);</div><div class='add'>+	gve_get_curr_alloc_cfgs(priv, &amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='add'>+</div><div class='add'>+	err = gve_set_rx_buf_len_config(priv, kernel_cmd-&gt;rx_buf_len, extack,</div><div class='add'>+					&amp;rx_alloc_cfg);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	if (cmd-&gt;tx_pending == priv-&gt;tx_desc_cnt &amp;&amp; cmd-&gt;rx_pending == priv-&gt;rx_desc_cnt)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;modify_ring_size_enabled) {</div><div class='del'>-		dev_err(&amp;priv-&gt;pdev-&gt;dev, "Modify ring size is not supported.\n");</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	new_tx_cnt = cmd-&gt;tx_pending;</div><div class='del'>-	new_rx_cnt = cmd-&gt;rx_pending;</div><div class='add'>+	err = gve_set_hsplit_config(priv, kernel_cmd-&gt;tcp_data_split,</div><div class='add'>+				    &amp;rx_alloc_cfg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	if (gve_validate_req_ring_size(priv, new_tx_cnt, new_rx_cnt))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	err = gve_set_ring_sizes_config(priv, cmd-&gt;tx_pending, cmd-&gt;rx_pending,</div><div class='add'>+					&amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	return gve_adjust_ring_sizes(priv, new_tx_cnt, new_rx_cnt);</div><div class='add'>+	if (netif_running(priv-&gt;dev)) {</div><div class='add'>+		err = gve_adjust_config(priv, &amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} else {</div><div class='add'>+		/* Set ring params for the next up */</div><div class='add'>+		priv-&gt;rx_cfg.packet_buffer_size =</div><div class='add'>+			rx_alloc_cfg.packet_buffer_size;</div><div class='add'>+		priv-&gt;header_split_enabled = rx_alloc_cfg.enable_header_split;</div><div class='add'>+		priv-&gt;tx_desc_cnt = tx_alloc_cfg.ring_size;</div><div class='add'>+		priv-&gt;rx_desc_cnt = rx_alloc_cfg.ring_size;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gve_user_reset(struct net_device *netdev, u32 *flags)</div><div class='hunk'>@@ -643,8 +658,7 @@ static int gve_set_tunable(struct net_device *netdev,</div><div class='ctx'> 	switch (etuna-&gt;id) {</div><div class='ctx'> 	case ETHTOOL_RX_COPYBREAK:</div><div class='ctx'> 	{</div><div class='del'>-		u32 max_copybreak = gve_is_gqi(priv) ?</div><div class='del'>-			GVE_DEFAULT_RX_BUFFER_SIZE : priv-&gt;data_buffer_size_dqo;</div><div class='add'>+		u32 max_copybreak = priv-&gt;rx_cfg.packet_buffer_size;</div><div class='ctx'> </div><div class='ctx'> 		len = *(u32 *)value;</div><div class='ctx'> 		if (len &gt; max_copybreak)</div><div class='hunk'>@@ -662,7 +676,7 @@ static u32 gve_get_priv_flags(struct net_device *netdev)</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	u32 ret_flags = 0;</div><div class='ctx'> </div><div class='del'>-	/* Only 1 flag exists currently: report-stats (BIT(O)), so set that flag. */</div><div class='add'>+	/* Only 1 flag exists currently: report-stats (BIT(0)), so set that flag. */</div><div class='ctx'> 	if (priv-&gt;ethtool_flags &amp; BIT(0))</div><div class='ctx'> 		ret_flags |= BIT(0);</div><div class='ctx'> 	return ret_flags;</div><div class='hunk'>@@ -700,7 +714,7 @@ static int gve_set_priv_flags(struct net_device *netdev, u32 flags)</div><div class='ctx'> </div><div class='ctx'> 		memset(priv-&gt;stats_report-&gt;stats, 0, (tx_stats_num + rx_stats_num) *</div><div class='ctx'> 				   sizeof(struct stats));</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;stats_report_timer);</div><div class='add'>+		timer_delete_sync(&amp;priv-&gt;stats_report_timer);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -793,9 +807,6 @@ static int gve_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLDEL:</div><div class='ctx'> 		err = gve_del_flow_rule(priv, cmd);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		err = -EOPNOTSUPP;</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EOPNOTSUPP;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -830,9 +841,6 @@ static int gve_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, u</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLALL:</div><div class='ctx'> 		err = gve_get_flow_rule_ids(priv, cmd, (u32 *)rule_locs);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		err = -EOPNOTSUPP;</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EOPNOTSUPP;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -855,6 +863,25 @@ static u32 gve_get_rxfh_indir_size(struct net_device *netdev)</div><div class='ctx'> 	return priv-&gt;rss_lut_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void gve_get_rss_config_cache(struct gve_priv *priv,</div><div class='add'>+				     struct ethtool_rxfh_param *rxfh)</div><div class='add'>+{</div><div class='add'>+	struct gve_rss_config *rss_config = &amp;priv-&gt;rss_config;</div><div class='add'>+</div><div class='add'>+	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;key) {</div><div class='add'>+		rxfh-&gt;key_size = priv-&gt;rss_key_size;</div><div class='add'>+		memcpy(rxfh-&gt;key, rss_config-&gt;hash_key, priv-&gt;rss_key_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;indir) {</div><div class='add'>+		rxfh-&gt;indir_size = priv-&gt;rss_lut_size;</div><div class='add'>+		memcpy(rxfh-&gt;indir, rss_config-&gt;hash_lut,</div><div class='add'>+		       priv-&gt;rss_lut_size * sizeof(*rxfh-&gt;indir));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gve_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(netdev);</div><div class='hunk'>@@ -862,23 +889,73 @@ static int gve_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rx</div><div class='ctx'> 	if (!priv-&gt;rss_key_size || !priv-&gt;rss_lut_size)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;cache_rss_config) {</div><div class='add'>+		gve_get_rss_config_cache(priv, rxfh);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return gve_adminq_query_rss_config(priv, rxfh);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void gve_set_rss_config_cache(struct gve_priv *priv,</div><div class='add'>+				     struct ethtool_rxfh_param *rxfh)</div><div class='add'>+{</div><div class='add'>+	struct gve_rss_config *rss_config = &amp;priv-&gt;rss_config;</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;key)</div><div class='add'>+		memcpy(rss_config-&gt;hash_key, rxfh-&gt;key, priv-&gt;rss_key_size);</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;indir)</div><div class='add'>+		memcpy(rss_config-&gt;hash_lut, rxfh-&gt;indir,</div><div class='add'>+		       priv-&gt;rss_lut_size * sizeof(*rxfh-&gt;indir));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gve_set_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh,</div><div class='ctx'> 			struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;rss_key_size || !priv-&gt;rss_lut_size)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	return gve_adminq_configure_rss(priv, rxfh);</div><div class='add'>+	err = gve_adminq_configure_rss(priv, rxfh);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Fail to configure RSS config");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;cache_rss_config)</div><div class='add'>+		gve_set_rss_config_cache(priv, rxfh);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gve_get_ts_info(struct net_device *netdev,</div><div class='add'>+			   struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct gve_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	ethtool_op_get_ts_info(netdev, info);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;nic_timestamp_supported) {</div><div class='add'>+		info-&gt;so_timestamping |= SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+					 SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+</div><div class='add'>+		info-&gt;rx_filters |= BIT(HWTSTAMP_FILTER_NONE) |</div><div class='add'>+				    BIT(HWTSTAMP_FILTER_ALL);</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;ptp)</div><div class='add'>+			info-&gt;phc_index = ptp_clock_index(priv-&gt;ptp-&gt;clock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct ethtool_ops gve_ethtool_ops = {</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS,</div><div class='del'>-	.supported_ring_params = ETHTOOL_RING_USE_TCP_DATA_SPLIT,</div><div class='add'>+	.supported_ring_params = ETHTOOL_RING_USE_TCP_DATA_SPLIT |</div><div class='add'>+				 ETHTOOL_RING_USE_RX_BUF_LEN,</div><div class='ctx'> 	.get_drvinfo = gve_get_drvinfo,</div><div class='ctx'> 	.get_strings = gve_get_strings,</div><div class='ctx'> 	.get_sset_count = gve_get_sset_count,</div><div class='hunk'>@@ -904,5 +981,5 @@ const struct ethtool_ops gve_ethtool_ops = {</div><div class='ctx'> 	.get_priv_flags = gve_get_priv_flags,</div><div class='ctx'> 	.set_priv_flags = gve_set_priv_flags,</div><div class='ctx'> 	.get_link_ksettings = gve_get_link_ksettings,</div><div class='del'>-	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+	.get_ts_info = gve_get_ts_info,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_main.c b/drivers/net/ethernet/google/gve/gve_main.c<br/>index e171ca248f9a..a5a2b18d309b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_main.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * Copyright (C) 2015-2024 Google LLC</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='ctx'> #include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/cpumask.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='hunk'>@@ -184,6 +185,43 @@ static void gve_free_flow_rule_caches(struct gve_priv *priv)</div><div class='ctx'> 	flow_rules_cache-&gt;rules_cache = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gve_alloc_rss_config_cache(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct gve_rss_config *rss_config = &amp;priv-&gt;rss_config;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;cache_rss_config)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rss_config-&gt;hash_key = kcalloc(priv-&gt;rss_key_size,</div><div class='add'>+				       sizeof(rss_config-&gt;hash_key[0]),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+	if (!rss_config-&gt;hash_key)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rss_config-&gt;hash_lut = kcalloc(priv-&gt;rss_lut_size,</div><div class='add'>+				       sizeof(rss_config-&gt;hash_lut[0]),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+	if (!rss_config-&gt;hash_lut)</div><div class='add'>+		goto free_rss_key_cache;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_rss_key_cache:</div><div class='add'>+	kfree(rss_config-&gt;hash_key);</div><div class='add'>+	rss_config-&gt;hash_key = NULL;</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gve_free_rss_config_cache(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct gve_rss_config *rss_config = &amp;priv-&gt;rss_config;</div><div class='add'>+</div><div class='add'>+	kfree(rss_config-&gt;hash_key);</div><div class='add'>+	kfree(rss_config-&gt;hash_lut);</div><div class='add'>+</div><div class='add'>+	memset(rss_config, 0, sizeof(*rss_config));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gve_alloc_counter_array(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	priv-&gt;counter_array =</div><div class='hunk'>@@ -231,7 +269,8 @@ static void gve_stats_report_schedule(struct gve_priv *priv)</div><div class='ctx'> </div><div class='ctx'> static void gve_stats_report_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct gve_priv *priv = from_timer(priv, t, stats_report_timer);</div><div class='add'>+	struct gve_priv *priv = timer_container_of(priv, t,</div><div class='add'>+						   stats_report_timer);</div><div class='ctx'> </div><div class='ctx'> 	mod_timer(&amp;priv-&gt;stats_report_timer,</div><div class='ctx'> 		  round_jiffies(jiffies +</div><div class='hunk'>@@ -265,7 +304,7 @@ static void gve_free_stats_report(struct gve_priv *priv)</div><div class='ctx'> 	if (!priv-&gt;stats_report)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;priv-&gt;stats_report_timer);</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;stats_report_timer);</div><div class='ctx'> 	dma_free_coherent(&amp;priv-&gt;pdev-&gt;dev, priv-&gt;stats_report_len,</div><div class='ctx'> 			  priv-&gt;stats_report, priv-&gt;stats_report_bus);</div><div class='ctx'> 	priv-&gt;stats_report = NULL;</div><div class='hunk'>@@ -333,6 +372,14 @@ int gve_napi_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	if (block-&gt;rx) {</div><div class='ctx'> 		work_done = gve_rx_poll(block, budget);</div><div class='add'>+</div><div class='add'>+		/* Poll XSK TX as part of RX NAPI. Setup re-poll based on max of</div><div class='add'>+		 * TX and RX work done.</div><div class='add'>+		 */</div><div class='add'>+		if (priv-&gt;xdp_prog)</div><div class='add'>+			work_done = max_t(int, work_done,</div><div class='add'>+					  gve_xsk_tx_poll(block, budget));</div><div class='add'>+</div><div class='ctx'> 		reschedule |= work_done == budget;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -368,14 +415,24 @@ int gve_napi_poll_dqo(struct napi_struct *napi, int budget)</div><div class='ctx'> 	bool reschedule = false;</div><div class='ctx'> 	int work_done = 0;</div><div class='ctx'> </div><div class='del'>-	if (block-&gt;tx)</div><div class='del'>-		reschedule |= gve_tx_poll_dqo(block, /*do_clean=*/true);</div><div class='add'>+	if (block-&gt;tx) {</div><div class='add'>+		if (block-&gt;tx-&gt;q_num &lt; priv-&gt;tx_cfg.num_queues)</div><div class='add'>+			reschedule |= gve_tx_poll_dqo(block, /*do_clean=*/true);</div><div class='add'>+		else</div><div class='add'>+			reschedule |= gve_xdp_poll_dqo(block);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!budget)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (block-&gt;rx) {</div><div class='ctx'> 		work_done = gve_rx_poll_dqo(block, budget);</div><div class='add'>+</div><div class='add'>+		/* Poll XSK TX as part of RX NAPI. Setup re-poll based on if</div><div class='add'>+		 * either datapath has more work to do.</div><div class='add'>+		 */</div><div class='add'>+		if (priv-&gt;xdp_prog)</div><div class='add'>+			reschedule |= gve_xsk_tx_poll_dqo(block, budget);</div><div class='ctx'> 		reschedule |= work_done == budget;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -411,10 +468,19 @@ int gve_napi_poll_dqo(struct napi_struct *napi, int budget)</div><div class='ctx'> 	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct cpumask *gve_get_node_mask(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;numa_node == NUMA_NO_NODE)</div><div class='add'>+		return cpu_all_mask;</div><div class='add'>+	else</div><div class='add'>+		return cpumask_of_node(priv-&gt;numa_node);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gve_alloc_notify_blocks(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int num_vecs_requested = priv-&gt;num_ntfy_blks + 1;</div><div class='del'>-	unsigned int active_cpus;</div><div class='add'>+	const struct cpumask *node_mask;</div><div class='add'>+	unsigned int cur_cpu;</div><div class='ctx'> 	int vecs_enabled;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -453,8 +519,6 @@ static int gve_alloc_notify_blocks(struct gve_priv *priv)</div><div class='ctx'> 		if (priv-&gt;rx_cfg.num_queues &gt; priv-&gt;rx_cfg.max_queues)</div><div class='ctx'> 			priv-&gt;rx_cfg.num_queues = priv-&gt;rx_cfg.max_queues;</div><div class='ctx'> 	}</div><div class='del'>-	/* Half the notification blocks go to TX and half to RX */</div><div class='del'>-	active_cpus = min_t(int, priv-&gt;num_ntfy_blks / 2, num_online_cpus());</div><div class='ctx'> </div><div class='ctx'> 	/* Setup Management Vector  - the last vector */</div><div class='ctx'> 	snprintf(priv-&gt;mgmt_msix_name, sizeof(priv-&gt;mgmt_msix_name), "gve-mgmnt@pci:%s",</div><div class='hunk'>@@ -483,6 +547,8 @@ static int gve_alloc_notify_blocks(struct gve_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup the other blocks - the first n-1 vectors */</div><div class='add'>+	node_mask = gve_get_node_mask(priv);</div><div class='add'>+	cur_cpu = cpumask_first(node_mask);</div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;num_ntfy_blks; i++) {</div><div class='ctx'> 		struct gve_notify_block *block = &amp;priv-&gt;ntfy_blocks[i];</div><div class='ctx'> 		int msix_idx = i;</div><div class='hunk'>@@ -499,9 +565,17 @@ static int gve_alloc_notify_blocks(struct gve_priv *priv)</div><div class='ctx'> 			goto abort_with_some_ntfy_blocks;</div><div class='ctx'> 		}</div><div class='ctx'> 		block-&gt;irq = priv-&gt;msix_vectors[msix_idx].vector;</div><div class='del'>-		irq_set_affinity_hint(priv-&gt;msix_vectors[msix_idx].vector,</div><div class='del'>-				      get_cpu_mask(i % active_cpus));</div><div class='add'>+		irq_set_affinity_and_hint(block-&gt;irq,</div><div class='add'>+					  cpumask_of(cur_cpu));</div><div class='ctx'> 		block-&gt;irq_db_index = &amp;priv-&gt;irq_db_indices[i].index;</div><div class='add'>+</div><div class='add'>+		cur_cpu = cpumask_next(cur_cpu, node_mask);</div><div class='add'>+		/* Wrap once CPUs in the node have been exhausted, or when</div><div class='add'>+		 * starting RX queue affinities. TX and RX queues of the same</div><div class='add'>+		 * index share affinity.</div><div class='add'>+		 */</div><div class='add'>+		if (cur_cpu &gt;= nr_cpu_ids || (i + 1) == priv-&gt;tx_cfg.max_queues)</div><div class='add'>+			cur_cpu = cpumask_first(node_mask);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> abort_with_some_ntfy_blocks:</div><div class='hunk'>@@ -567,12 +641,18 @@ static int gve_setup_device_resources(struct gve_priv *priv)</div><div class='ctx'> 	err = gve_alloc_flow_rule_caches(priv);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='del'>-	err = gve_alloc_counter_array(priv);</div><div class='add'>+	err = gve_alloc_rss_config_cache(priv);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto abort_with_flow_rule_caches;</div><div class='del'>-	err = gve_alloc_notify_blocks(priv);</div><div class='add'>+	err = gve_alloc_counter_array(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto abort_with_rss_config_cache;</div><div class='add'>+	err = gve_init_clock(priv);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto abort_with_counter;</div><div class='add'>+	err = gve_alloc_notify_blocks(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto abort_with_clock;</div><div class='ctx'> 	err = gve_alloc_stats_report(priv);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto abort_with_ntfy_blocks;</div><div class='hunk'>@@ -603,6 +683,12 @@ static int gve_setup_device_resources(struct gve_priv *priv)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = gve_init_rss_config(priv, priv-&gt;rx_cfg.num_queues);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev, "Failed to init RSS config");</div><div class='add'>+		goto abort_with_ptype_lut;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = gve_adminq_report_stats(priv, priv-&gt;stats_report_len,</div><div class='ctx'> 				      priv-&gt;stats_report_bus,</div><div class='ctx'> 				      GVE_STATS_REPORT_TIMER_PERIOD);</div><div class='hunk'>@@ -619,8 +705,12 @@ abort_with_stats_report:</div><div class='ctx'> 	gve_free_stats_report(priv);</div><div class='ctx'> abort_with_ntfy_blocks:</div><div class='ctx'> 	gve_free_notify_blocks(priv);</div><div class='add'>+abort_with_clock:</div><div class='add'>+	gve_teardown_clock(priv);</div><div class='ctx'> abort_with_counter:</div><div class='ctx'> 	gve_free_counter_array(priv);</div><div class='add'>+abort_with_rss_config_cache:</div><div class='add'>+	gve_free_rss_config_cache(priv);</div><div class='ctx'> abort_with_flow_rule_caches:</div><div class='ctx'> 	gve_free_flow_rule_caches(priv);</div><div class='ctx'> </div><div class='hunk'>@@ -661,9 +751,11 @@ static void gve_teardown_device_resources(struct gve_priv *priv)</div><div class='ctx'> 	priv-&gt;ptype_lut_dqo = NULL;</div><div class='ctx'> </div><div class='ctx'> 	gve_free_flow_rule_caches(priv);</div><div class='add'>+	gve_free_rss_config_cache(priv);</div><div class='ctx'> 	gve_free_counter_array(priv);</div><div class='ctx'> 	gve_free_notify_blocks(priv);</div><div class='ctx'> 	gve_free_stats_report(priv);</div><div class='add'>+	gve_teardown_clock(priv);</div><div class='ctx'> 	gve_clear_device_resources_ok(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -738,30 +830,13 @@ static struct gve_queue_page_list *gve_rx_get_qpl(struct gve_priv *priv, int idx</div><div class='ctx'> 		return rx-&gt;dqo.qpl;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gve_register_xdp_qpls(struct gve_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int start_id;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	start_id = gve_xdp_tx_start_queue_id(priv);</div><div class='del'>-	for (i = start_id; i &lt; start_id + gve_num_xdp_qpls(priv); i++) {</div><div class='del'>-		err = gve_register_qpl(priv, gve_tx_get_qpl(priv, i));</div><div class='del'>-		/* This failure will trigger a reset - no need to clean up */</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int gve_register_qpls(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int num_tx_qpls, num_rx_qpls;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	num_tx_qpls = gve_num_tx_qpls(&amp;priv-&gt;tx_cfg, gve_num_xdp_qpls(priv),</div><div class='del'>-				      gve_is_qpl(priv));</div><div class='add'>+	num_tx_qpls = gve_num_tx_qpls(&amp;priv-&gt;tx_cfg, gve_is_qpl(priv));</div><div class='ctx'> 	num_rx_qpls = gve_num_rx_qpls(&amp;priv-&gt;rx_cfg, gve_is_qpl(priv));</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_tx_qpls; i++) {</div><div class='hunk'>@@ -779,30 +854,13 @@ static int gve_register_qpls(struct gve_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gve_unregister_xdp_qpls(struct gve_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int start_id;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	start_id = gve_xdp_tx_start_queue_id(priv);</div><div class='del'>-	for (i = start_id; i &lt; start_id + gve_num_xdp_qpls(priv); i++) {</div><div class='del'>-		err = gve_unregister_qpl(priv, gve_tx_get_qpl(priv, i));</div><div class='del'>-		/* This failure will trigger a reset - no need to clean */</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int gve_unregister_qpls(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int num_tx_qpls, num_rx_qpls;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	num_tx_qpls = gve_num_tx_qpls(&amp;priv-&gt;tx_cfg, gve_num_xdp_qpls(priv),</div><div class='del'>-				      gve_is_qpl(priv));</div><div class='add'>+	num_tx_qpls = gve_num_tx_qpls(&amp;priv-&gt;tx_cfg, gve_is_qpl(priv));</div><div class='ctx'> 	num_rx_qpls = gve_num_rx_qpls(&amp;priv-&gt;rx_cfg, gve_is_qpl(priv));</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_tx_qpls; i++) {</div><div class='hunk'>@@ -821,27 +879,6 @@ static int gve_unregister_qpls(struct gve_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gve_create_xdp_rings(struct gve_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = gve_adminq_create_tx_queues(priv,</div><div class='del'>-					  gve_xdp_tx_start_queue_id(priv),</div><div class='del'>-					  priv-&gt;num_xdp_queues);</div><div class='del'>-	if (err) {</div><div class='del'>-		netif_err(priv, drv, priv-&gt;dev, "failed to create %d XDP tx queues\n",</div><div class='del'>-			  priv-&gt;num_xdp_queues);</div><div class='del'>-		/* This failure will trigger a reset - no need to clean</div><div class='del'>-		 * up</div><div class='del'>-		 */</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-	netif_dbg(priv, drv, priv-&gt;dev, "created %d XDP tx queues\n",</div><div class='del'>-		  priv-&gt;num_xdp_queues);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int gve_create_rings(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int num_tx_queues = gve_num_tx_queues(priv);</div><div class='hunk'>@@ -897,7 +934,7 @@ static void init_xdp_sync_stats(struct gve_priv *priv)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Init stats */</div><div class='del'>-	for (i = start_id; i &lt; start_id + priv-&gt;num_xdp_queues; i++) {</div><div class='add'>+	for (i = start_id; i &lt; start_id + priv-&gt;tx_cfg.num_xdp_queues; i++) {</div><div class='ctx'> 		int ntfy_idx = gve_tx_idx_to_ntfy(priv, i);</div><div class='ctx'> </div><div class='ctx'> 		u64_stats_init(&amp;priv-&gt;tx[i].statss);</div><div class='hunk'>@@ -925,19 +962,18 @@ static void gve_tx_get_curr_alloc_cfg(struct gve_priv *priv,</div><div class='ctx'> 	cfg-&gt;qcfg = &amp;priv-&gt;tx_cfg;</div><div class='ctx'> 	cfg-&gt;raw_addressing = !gve_is_qpl(priv);</div><div class='ctx'> 	cfg-&gt;ring_size = priv-&gt;tx_desc_cnt;</div><div class='del'>-	cfg-&gt;start_idx = 0;</div><div class='del'>-	cfg-&gt;num_rings = gve_num_tx_queues(priv);</div><div class='add'>+	cfg-&gt;num_xdp_rings = cfg-&gt;qcfg-&gt;num_xdp_queues;</div><div class='ctx'> 	cfg-&gt;tx = priv-&gt;tx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gve_tx_stop_rings(struct gve_priv *priv, int start_id, int num_rings)</div><div class='add'>+static void gve_tx_stop_rings(struct gve_priv *priv, int num_rings)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;tx)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (i = start_id; i &lt; start_id + num_rings; i++) {</div><div class='add'>+	for (i = 0; i &lt; num_rings; i++) {</div><div class='ctx'> 		if (gve_is_gqi(priv))</div><div class='ctx'> 			gve_tx_stop_ring_gqi(priv, i);</div><div class='ctx'> 		else</div><div class='hunk'>@@ -945,12 +981,11 @@ static void gve_tx_stop_rings(struct gve_priv *priv, int start_id, int num_rings</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gve_tx_start_rings(struct gve_priv *priv, int start_id,</div><div class='del'>-			       int num_rings)</div><div class='add'>+static void gve_tx_start_rings(struct gve_priv *priv, int num_rings)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = start_id; i &lt; start_id + num_rings; i++) {</div><div class='add'>+	for (i = 0; i &lt; num_rings; i++) {</div><div class='ctx'> 		if (gve_is_gqi(priv))</div><div class='ctx'> 			gve_tx_start_ring_gqi(priv, i);</div><div class='ctx'> 		else</div><div class='hunk'>@@ -958,28 +993,6 @@ static void gve_tx_start_rings(struct gve_priv *priv, int start_id,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gve_alloc_xdp_rings(struct gve_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct gve_tx_alloc_rings_cfg cfg = {0};</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;num_xdp_queues)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	gve_tx_get_curr_alloc_cfg(priv, &amp;cfg);</div><div class='del'>-	cfg.start_idx = gve_xdp_tx_start_queue_id(priv);</div><div class='del'>-	cfg.num_rings = priv-&gt;num_xdp_queues;</div><div class='del'>-</div><div class='del'>-	err = gve_tx_alloc_rings_gqi(priv, &amp;cfg);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	gve_tx_start_rings(priv, cfg.start_idx, cfg.num_rings);</div><div class='del'>-	init_xdp_sync_stats(priv);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int gve_queues_mem_alloc(struct gve_priv *priv,</div><div class='ctx'> 				struct gve_tx_alloc_rings_cfg *tx_alloc_cfg,</div><div class='ctx'> 				struct gve_rx_alloc_rings_cfg *rx_alloc_cfg)</div><div class='hunk'>@@ -1010,26 +1023,6 @@ free_tx:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gve_destroy_xdp_rings(struct gve_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int start_id;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	start_id = gve_xdp_tx_start_queue_id(priv);</div><div class='del'>-	err = gve_adminq_destroy_tx_queues(priv,</div><div class='del'>-					   start_id,</div><div class='del'>-					   priv-&gt;num_xdp_queues);</div><div class='del'>-	if (err) {</div><div class='del'>-		netif_err(priv, drv, priv-&gt;dev,</div><div class='del'>-			  "failed to destroy XDP queues\n");</div><div class='del'>-		/* This failure will trigger a reset - no need to clean up */</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-	netif_dbg(priv, drv, priv-&gt;dev, "destroyed XDP queues\n");</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int gve_destroy_rings(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int num_tx_queues = gve_num_tx_queues(priv);</div><div class='hunk'>@@ -1054,20 +1047,6 @@ static int gve_destroy_rings(struct gve_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gve_free_xdp_rings(struct gve_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct gve_tx_alloc_rings_cfg cfg = {0};</div><div class='del'>-</div><div class='del'>-	gve_tx_get_curr_alloc_cfg(priv, &amp;cfg);</div><div class='del'>-	cfg.start_idx = gve_xdp_tx_start_queue_id(priv);</div><div class='del'>-	cfg.num_rings = priv-&gt;num_xdp_queues;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;tx) {</div><div class='del'>-		gve_tx_stop_rings(priv, cfg.start_idx, cfg.num_rings);</div><div class='del'>-		gve_tx_free_rings_gqi(priv, &amp;cfg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void gve_queues_mem_free(struct gve_priv *priv,</div><div class='ctx'> 				struct gve_tx_alloc_rings_cfg *tx_cfg,</div><div class='ctx'> 				struct gve_rx_alloc_rings_cfg *rx_cfg)</div><div class='hunk'>@@ -1085,7 +1064,7 @@ int gve_alloc_page(struct gve_priv *priv, struct device *dev,</div><div class='ctx'> 		   struct page **page, dma_addr_t *dma,</div><div class='ctx'> 		   enum dma_data_direction dir, gfp_t gfp_flags)</div><div class='ctx'> {</div><div class='del'>-	*page = alloc_page(gfp_flags);</div><div class='add'>+	*page = alloc_pages_node(priv-&gt;numa_node, gfp_flags, 0);</div><div class='ctx'> 	if (!*page) {</div><div class='ctx'> 		priv-&gt;page_alloc_fail++;</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -1186,18 +1165,84 @@ static int gve_reset_recovery(struct gve_priv *priv, bool was_up);</div><div class='ctx'> static void gve_turndown(struct gve_priv *priv);</div><div class='ctx'> static void gve_turnup(struct gve_priv *priv);</div><div class='ctx'> </div><div class='add'>+static void gve_unreg_xsk_pool(struct gve_priv *priv, u16 qid)</div><div class='add'>+{</div><div class='add'>+	struct gve_rx_ring *rx;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;rx)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rx = &amp;priv-&gt;rx[qid];</div><div class='add'>+	rx-&gt;xsk_pool = NULL;</div><div class='add'>+	if (xdp_rxq_info_is_reg(&amp;rx-&gt;xdp_rxq))</div><div class='add'>+		xdp_rxq_info_unreg_mem_model(&amp;rx-&gt;xdp_rxq);</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;tx)</div><div class='add'>+		return;</div><div class='add'>+	priv-&gt;tx[gve_xdp_tx_queue_id(priv, qid)].xsk_pool = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gve_reg_xsk_pool(struct gve_priv *priv, struct net_device *dev,</div><div class='add'>+			    struct xsk_buff_pool *pool, u16 qid)</div><div class='add'>+{</div><div class='add'>+	struct gve_rx_ring *rx;</div><div class='add'>+	u16 tx_qid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	rx = &amp;priv-&gt;rx[qid];</div><div class='add'>+	err = xdp_rxq_info_reg_mem_model(&amp;rx-&gt;xdp_rxq,</div><div class='add'>+					 MEM_TYPE_XSK_BUFF_POOL, pool);</div><div class='add'>+	if (err) {</div><div class='add'>+		gve_unreg_xsk_pool(priv, qid);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx-&gt;xsk_pool = pool;</div><div class='add'>+</div><div class='add'>+	tx_qid = gve_xdp_tx_queue_id(priv, qid);</div><div class='add'>+	priv-&gt;tx[tx_qid].xsk_pool = pool;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gve_unreg_xdp_info(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;tx_cfg.num_xdp_queues || !priv-&gt;rx)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;rx_cfg.num_queues; i++) {</div><div class='add'>+		struct gve_rx_ring *rx = &amp;priv-&gt;rx[i];</div><div class='add'>+</div><div class='add'>+		if (xdp_rxq_info_is_reg(&amp;rx-&gt;xdp_rxq))</div><div class='add'>+			xdp_rxq_info_unreg(&amp;rx-&gt;xdp_rxq);</div><div class='add'>+</div><div class='add'>+		gve_unreg_xsk_pool(priv, i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct xsk_buff_pool *gve_get_xsk_pool(struct gve_priv *priv, int qid)</div><div class='add'>+{</div><div class='add'>+	if (!test_bit(qid, priv-&gt;xsk_pools))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return xsk_get_pool_from_qid(priv-&gt;dev, qid);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gve_reg_xdp_info(struct gve_priv *priv, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct napi_struct *napi;</div><div class='ctx'> 	struct gve_rx_ring *rx;</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	int i, j;</div><div class='del'>-	u32 tx_qid;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;num_xdp_queues)</div><div class='add'>+	if (!priv-&gt;tx_cfg.num_xdp_queues)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;rx_cfg.num_queues; i++) {</div><div class='add'>+		struct xsk_buff_pool *xsk_pool;</div><div class='add'>+</div><div class='ctx'> 		rx = &amp;priv-&gt;rx[i];</div><div class='ctx'> 		napi = &amp;priv-&gt;ntfy_blocks[rx-&gt;ntfy_id].napi;</div><div class='ctx'> </div><div class='hunk'>@@ -1205,64 +1250,28 @@ static int gve_reg_xdp_info(struct gve_priv *priv, struct net_device *dev)</div><div class='ctx'> 				       napi-&gt;napi_id);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err;</div><div class='del'>-		err = xdp_rxq_info_reg_mem_model(&amp;rx-&gt;xdp_rxq,</div><div class='del'>-						 MEM_TYPE_PAGE_SHARED, NULL);</div><div class='add'>+</div><div class='add'>+		xsk_pool = gve_get_xsk_pool(priv, i);</div><div class='add'>+		if (xsk_pool)</div><div class='add'>+			err = gve_reg_xsk_pool(priv, dev, xsk_pool, i);</div><div class='add'>+		else if (gve_is_qpl(priv))</div><div class='add'>+			err = xdp_rxq_info_reg_mem_model(&amp;rx-&gt;xdp_rxq,</div><div class='add'>+							 MEM_TYPE_PAGE_SHARED,</div><div class='add'>+							 NULL);</div><div class='add'>+		else</div><div class='add'>+			err = xdp_rxq_info_reg_mem_model(&amp;rx-&gt;xdp_rxq,</div><div class='add'>+							 MEM_TYPE_PAGE_POOL,</div><div class='add'>+							 rx-&gt;dqo.page_pool);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err;</div><div class='del'>-		rx-&gt;xsk_pool = xsk_get_pool_from_qid(dev, i);</div><div class='del'>-		if (rx-&gt;xsk_pool) {</div><div class='del'>-			err = xdp_rxq_info_reg(&amp;rx-&gt;xsk_rxq, dev, i,</div><div class='del'>-					       napi-&gt;napi_id);</div><div class='del'>-			if (err)</div><div class='del'>-				goto err;</div><div class='del'>-			err = xdp_rxq_info_reg_mem_model(&amp;rx-&gt;xsk_rxq,</div><div class='del'>-							 MEM_TYPE_XSK_BUFF_POOL, NULL);</div><div class='del'>-			if (err)</div><div class='del'>-				goto err;</div><div class='del'>-			xsk_pool_set_rxq_info(rx-&gt;xsk_pool,</div><div class='del'>-					      &amp;rx-&gt;xsk_rxq);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;num_xdp_queues; i++) {</div><div class='del'>-		tx_qid = gve_xdp_tx_queue_id(priv, i);</div><div class='del'>-		priv-&gt;tx[tx_qid].xsk_pool = xsk_get_pool_from_qid(dev, i);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	for (j = i; j &gt;= 0; j--) {</div><div class='del'>-		rx = &amp;priv-&gt;rx[j];</div><div class='del'>-		if (xdp_rxq_info_is_reg(&amp;rx-&gt;xdp_rxq))</div><div class='del'>-			xdp_rxq_info_unreg(&amp;rx-&gt;xdp_rxq);</div><div class='del'>-		if (xdp_rxq_info_is_reg(&amp;rx-&gt;xsk_rxq))</div><div class='del'>-			xdp_rxq_info_unreg(&amp;rx-&gt;xsk_rxq);</div><div class='del'>-	}</div><div class='add'>+	gve_unreg_xdp_info(priv);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gve_unreg_xdp_info(struct gve_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int i, tx_qid;</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;num_xdp_queues)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;rx_cfg.num_queues; i++) {</div><div class='del'>-		struct gve_rx_ring *rx = &amp;priv-&gt;rx[i];</div><div class='del'>-</div><div class='del'>-		xdp_rxq_info_unreg(&amp;rx-&gt;xdp_rxq);</div><div class='del'>-		if (rx-&gt;xsk_pool) {</div><div class='del'>-			xdp_rxq_info_unreg(&amp;rx-&gt;xsk_rxq);</div><div class='del'>-			rx-&gt;xsk_pool = NULL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;num_xdp_queues; i++) {</div><div class='del'>-		tx_qid = gve_xdp_tx_queue_id(priv, i);</div><div class='del'>-		priv-&gt;tx[tx_qid].xsk_pool = NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> static void gve_drain_page_cache(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -1275,15 +1284,14 @@ static void gve_drain_page_cache(struct gve_priv *priv)</div><div class='ctx'> static void gve_rx_get_curr_alloc_cfg(struct gve_priv *priv,</div><div class='ctx'> 				      struct gve_rx_alloc_rings_cfg *cfg)</div><div class='ctx'> {</div><div class='del'>-	cfg-&gt;qcfg = &amp;priv-&gt;rx_cfg;</div><div class='add'>+	cfg-&gt;qcfg_rx = &amp;priv-&gt;rx_cfg;</div><div class='ctx'> 	cfg-&gt;qcfg_tx = &amp;priv-&gt;tx_cfg;</div><div class='ctx'> 	cfg-&gt;raw_addressing = !gve_is_qpl(priv);</div><div class='ctx'> 	cfg-&gt;enable_header_split = priv-&gt;header_split_enabled;</div><div class='ctx'> 	cfg-&gt;ring_size = priv-&gt;rx_desc_cnt;</div><div class='del'>-	cfg-&gt;packet_buffer_size = gve_is_gqi(priv) ?</div><div class='del'>-				  GVE_DEFAULT_RX_BUFFER_SIZE :</div><div class='del'>-				  priv-&gt;data_buffer_size_dqo;</div><div class='add'>+	cfg-&gt;packet_buffer_size = priv-&gt;rx_cfg.packet_buffer_size;</div><div class='ctx'> 	cfg-&gt;rx = priv-&gt;rx;</div><div class='add'>+	cfg-&gt;xdp = !!cfg-&gt;qcfg_tx-&gt;num_xdp_queues;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void gve_get_curr_alloc_cfgs(struct gve_priv *priv,</div><div class='hunk'>@@ -1356,17 +1364,13 @@ static int gve_queues_start(struct gve_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	/* Record new configs into priv */</div><div class='ctx'> 	priv-&gt;tx_cfg = *tx_alloc_cfg-&gt;qcfg;</div><div class='del'>-	priv-&gt;rx_cfg = *rx_alloc_cfg-&gt;qcfg;</div><div class='add'>+	priv-&gt;tx_cfg.num_xdp_queues = tx_alloc_cfg-&gt;num_xdp_rings;</div><div class='add'>+	priv-&gt;rx_cfg = *rx_alloc_cfg-&gt;qcfg_rx;</div><div class='ctx'> 	priv-&gt;tx_desc_cnt = tx_alloc_cfg-&gt;ring_size;</div><div class='ctx'> 	priv-&gt;rx_desc_cnt = rx_alloc_cfg-&gt;ring_size;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;xdp_prog)</div><div class='del'>-		priv-&gt;num_xdp_queues = priv-&gt;rx_cfg.num_queues;</div><div class='del'>-	else</div><div class='del'>-		priv-&gt;num_xdp_queues = 0;</div><div class='del'>-</div><div class='del'>-	gve_tx_start_rings(priv, 0, tx_alloc_cfg-&gt;num_rings);</div><div class='del'>-	gve_rx_start_rings(priv, rx_alloc_cfg-&gt;qcfg-&gt;num_queues);</div><div class='add'>+	gve_tx_start_rings(priv, gve_num_tx_queues(priv));</div><div class='add'>+	gve_rx_start_rings(priv, rx_alloc_cfg-&gt;qcfg_rx-&gt;num_queues);</div><div class='ctx'> 	gve_init_sync_stats(priv);</div><div class='ctx'> </div><div class='ctx'> 	err = netif_set_real_num_tx_queues(dev, priv-&gt;tx_cfg.num_queues);</div><div class='hunk'>@@ -1380,12 +1384,18 @@ static int gve_queues_start(struct gve_priv *priv,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto stop_and_free_rings;</div><div class='ctx'> </div><div class='add'>+	if (rx_alloc_cfg-&gt;reset_rss) {</div><div class='add'>+		err = gve_init_rss_config(priv, priv-&gt;rx_cfg.num_queues);</div><div class='add'>+		if (err)</div><div class='add'>+			goto reset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = gve_register_qpls(priv);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto reset;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;header_split_enabled = rx_alloc_cfg-&gt;enable_header_split;</div><div class='del'>-	priv-&gt;data_buffer_size_dqo = rx_alloc_cfg-&gt;packet_buffer_size;</div><div class='add'>+	priv-&gt;rx_cfg.packet_buffer_size = rx_alloc_cfg-&gt;packet_buffer_size;</div><div class='ctx'> </div><div class='ctx'> 	err = gve_create_rings(priv);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1412,7 +1422,7 @@ reset:</div><div class='ctx'> 	/* return the original error */</div><div class='ctx'> 	return err;</div><div class='ctx'> stop_and_free_rings:</div><div class='del'>-	gve_tx_stop_rings(priv, 0, gve_num_tx_queues(priv));</div><div class='add'>+	gve_tx_stop_rings(priv, gve_num_tx_queues(priv));</div><div class='ctx'> 	gve_rx_stop_rings(priv, priv-&gt;rx_cfg.num_queues);</div><div class='ctx'> 	gve_queues_mem_remove(priv);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1457,11 +1467,11 @@ static int gve_queues_stop(struct gve_priv *priv)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		gve_clear_device_rings_ok(priv);</div><div class='ctx'> 	}</div><div class='del'>-	del_timer_sync(&amp;priv-&gt;stats_report_timer);</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;stats_report_timer);</div><div class='ctx'> </div><div class='ctx'> 	gve_unreg_xdp_info(priv);</div><div class='ctx'> </div><div class='del'>-	gve_tx_stop_rings(priv, 0, gve_num_tx_queues(priv));</div><div class='add'>+	gve_tx_stop_rings(priv, gve_num_tx_queues(priv));</div><div class='ctx'> 	gve_rx_stop_rings(priv, priv-&gt;rx_cfg.num_queues);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;interface_down_cnt++;</div><div class='hunk'>@@ -1491,56 +1501,6 @@ static int gve_close(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gve_remove_xdp_queues(struct gve_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = gve_destroy_xdp_rings(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = gve_unregister_xdp_qpls(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	gve_unreg_xdp_info(priv);</div><div class='del'>-	gve_free_xdp_rings(priv);</div><div class='del'>-</div><div class='del'>-	priv-&gt;num_xdp_queues = 0;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int gve_add_xdp_queues(struct gve_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	priv-&gt;num_xdp_queues = priv-&gt;rx_cfg.num_queues;</div><div class='del'>-</div><div class='del'>-	err = gve_alloc_xdp_rings(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	err = gve_reg_xdp_info(priv, priv-&gt;dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto free_xdp_rings;</div><div class='del'>-</div><div class='del'>-	err = gve_register_xdp_qpls(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto free_xdp_rings;</div><div class='del'>-</div><div class='del'>-	err = gve_create_xdp_rings(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto free_xdp_rings;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-free_xdp_rings:</div><div class='del'>-	gve_free_xdp_rings(priv);</div><div class='del'>-err:</div><div class='del'>-	priv-&gt;num_xdp_queues = 0;</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void gve_handle_link_status(struct gve_priv *priv, bool link_status)</div><div class='ctx'> {</div><div class='ctx'> 	if (!gve_get_napi_enabled(priv))</div><div class='hunk'>@@ -1558,6 +1518,19 @@ static void gve_handle_link_status(struct gve_priv *priv, bool link_status)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gve_configure_rings_xdp(struct gve_priv *priv,</div><div class='add'>+				   u16 num_xdp_rings)</div><div class='add'>+{</div><div class='add'>+	struct gve_tx_alloc_rings_cfg tx_alloc_cfg = {0};</div><div class='add'>+	struct gve_rx_alloc_rings_cfg rx_alloc_cfg = {0};</div><div class='add'>+</div><div class='add'>+	gve_get_curr_alloc_cfgs(priv, &amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='add'>+	tx_alloc_cfg.num_xdp_rings = num_xdp_rings;</div><div class='add'>+</div><div class='add'>+	rx_alloc_cfg.xdp = !!num_xdp_rings;</div><div class='add'>+	return gve_adjust_config(priv, &amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gve_set_xdp(struct gve_priv *priv, struct bpf_prog *prog,</div><div class='ctx'> 		       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='hunk'>@@ -1570,42 +1543,49 @@ static int gve_set_xdp(struct gve_priv *priv, struct bpf_prog *prog,</div><div class='ctx'> 		WRITE_ONCE(priv-&gt;xdp_prog, prog);</div><div class='ctx'> 		if (old_prog)</div><div class='ctx'> 			bpf_prog_put(old_prog);</div><div class='add'>+</div><div class='add'>+		/* Update priv XDP queue configuration */</div><div class='add'>+		priv-&gt;tx_cfg.num_xdp_queues = priv-&gt;xdp_prog ?</div><div class='add'>+			priv-&gt;rx_cfg.num_queues : 0;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	gve_turndown(priv);</div><div class='del'>-	if (!old_prog &amp;&amp; prog) {</div><div class='del'>-		// Allocate XDP TX queues if an XDP program is</div><div class='del'>-		// being installed</div><div class='del'>-		err = gve_add_xdp_queues(priv);</div><div class='del'>-		if (err)</div><div class='del'>-			goto out;</div><div class='del'>-	} else if (old_prog &amp;&amp; !prog) {</div><div class='del'>-		// Remove XDP TX queues if an XDP program is</div><div class='del'>-		// being uninstalled</div><div class='del'>-		err = gve_remove_xdp_queues(priv);</div><div class='del'>-		if (err)</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='add'>+	if (!old_prog &amp;&amp; prog)</div><div class='add'>+		err = gve_configure_rings_xdp(priv, priv-&gt;rx_cfg.num_queues);</div><div class='add'>+	else if (old_prog &amp;&amp; !prog)</div><div class='add'>+		err = gve_configure_rings_xdp(priv, 0);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	WRITE_ONCE(priv-&gt;xdp_prog, prog);</div><div class='ctx'> 	if (old_prog)</div><div class='ctx'> 		bpf_prog_put(old_prog);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	gve_turnup(priv);</div><div class='ctx'> 	status = ioread32be(&amp;priv-&gt;reg_bar0-&gt;device_status);</div><div class='ctx'> 	gve_handle_link_status(priv, GVE_DEVICE_STATUS_LINK_STATUS_MASK &amp; status);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gve_xdp_xmit(struct net_device *dev, int n,</div><div class='add'>+			struct xdp_frame **frames, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct gve_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;queue_format == GVE_GQI_QPL_FORMAT)</div><div class='add'>+		return gve_xdp_xmit_gqi(dev, n, frames, flags);</div><div class='add'>+	else if (priv-&gt;queue_format == GVE_DQO_RDA_FORMAT)</div><div class='add'>+		return gve_xdp_xmit_dqo(dev, n, frames, flags);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gve_xsk_pool_enable(struct net_device *dev,</div><div class='ctx'> 			       struct xsk_buff_pool *pool,</div><div class='ctx'> 			       u16 qid)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct napi_struct *napi;</div><div class='del'>-	struct gve_rx_ring *rx;</div><div class='del'>-	int tx_qid;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (qid &gt;= priv-&gt;rx_cfg.num_queues) {</div><div class='hunk'>@@ -1623,34 +1603,31 @@ static int gve_xsk_pool_enable(struct net_device *dev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* If XDP prog is not installed, return */</div><div class='del'>-	if (!priv-&gt;xdp_prog)</div><div class='del'>-		return 0;</div><div class='add'>+	set_bit(qid, priv-&gt;xsk_pools);</div><div class='ctx'> </div><div class='del'>-	rx = &amp;priv-&gt;rx[qid];</div><div class='del'>-	napi = &amp;priv-&gt;ntfy_blocks[rx-&gt;ntfy_id].napi;</div><div class='del'>-	err = xdp_rxq_info_reg(&amp;rx-&gt;xsk_rxq, dev, qid, napi-&gt;napi_id);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err;</div><div class='add'>+	/* If XDP prog is not installed or interface is down, return. */</div><div class='add'>+	if (!priv-&gt;xdp_prog || !netif_running(dev))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	err = xdp_rxq_info_reg_mem_model(&amp;rx-&gt;xsk_rxq,</div><div class='del'>-					 MEM_TYPE_XSK_BUFF_POOL, NULL);</div><div class='add'>+	err = gve_reg_xsk_pool(priv, dev, pool, qid);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	xsk_pool_set_rxq_info(pool, &amp;rx-&gt;xsk_rxq);</div><div class='del'>-	rx-&gt;xsk_pool = pool;</div><div class='del'>-</div><div class='del'>-	tx_qid = gve_xdp_tx_queue_id(priv, qid);</div><div class='del'>-	priv-&gt;tx[tx_qid].xsk_pool = pool;</div><div class='add'>+		goto err_xsk_pool_dma_mapped;</div><div class='ctx'> </div><div class='add'>+	/* Stop and start RDA queues to repost buffers. */</div><div class='add'>+	if (!gve_is_qpl(priv)) {</div><div class='add'>+		err = gve_configure_rings_xdp(priv, priv-&gt;rx_cfg.num_queues);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_xsk_pool_registered;</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='del'>-err:</div><div class='del'>-	if (xdp_rxq_info_is_reg(&amp;rx-&gt;xsk_rxq))</div><div class='del'>-		xdp_rxq_info_unreg(&amp;rx-&gt;xsk_rxq);</div><div class='ctx'> </div><div class='add'>+err_xsk_pool_registered:</div><div class='add'>+	gve_unreg_xsk_pool(priv, qid);</div><div class='add'>+err_xsk_pool_dma_mapped:</div><div class='add'>+	clear_bit(qid, priv-&gt;xsk_pools);</div><div class='ctx'> 	xsk_pool_dma_unmap(pool,</div><div class='del'>-			   DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING);</div><div class='add'>+			   DMA_ATTR_SKIP_CPU_SYNC |</div><div class='add'>+			   DMA_ATTR_WEAK_ORDERING);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1662,103 +1639,118 @@ static int gve_xsk_pool_disable(struct net_device *dev,</div><div class='ctx'> 	struct napi_struct *napi_tx;</div><div class='ctx'> 	struct xsk_buff_pool *pool;</div><div class='ctx'> 	int tx_qid;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	pool = xsk_get_pool_from_qid(dev, qid);</div><div class='del'>-	if (!pool)</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	if (qid &gt;= priv-&gt;rx_cfg.num_queues)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* If XDP prog is not installed, unmap DMA and return */</div><div class='del'>-	if (!priv-&gt;xdp_prog)</div><div class='del'>-		goto done;</div><div class='add'>+	clear_bit(qid, priv-&gt;xsk_pools);</div><div class='ctx'> </div><div class='del'>-	tx_qid = gve_xdp_tx_queue_id(priv, qid);</div><div class='del'>-	if (!netif_running(dev)) {</div><div class='del'>-		priv-&gt;rx[qid].xsk_pool = NULL;</div><div class='del'>-		xdp_rxq_info_unreg(&amp;priv-&gt;rx[qid].xsk_rxq);</div><div class='del'>-		priv-&gt;tx[tx_qid].xsk_pool = NULL;</div><div class='del'>-		goto done;</div><div class='add'>+	pool = xsk_get_pool_from_qid(dev, qid);</div><div class='add'>+	if (pool)</div><div class='add'>+		xsk_pool_dma_unmap(pool,</div><div class='add'>+				   DMA_ATTR_SKIP_CPU_SYNC |</div><div class='add'>+				   DMA_ATTR_WEAK_ORDERING);</div><div class='add'>+</div><div class='add'>+	if (!netif_running(dev) || !priv-&gt;tx_cfg.num_xdp_queues)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Stop and start RDA queues to repost buffers. */</div><div class='add'>+	if (!gve_is_qpl(priv) &amp;&amp; priv-&gt;xdp_prog) {</div><div class='add'>+		err = gve_configure_rings_xdp(priv, priv-&gt;rx_cfg.num_queues);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	napi_rx = &amp;priv-&gt;ntfy_blocks[priv-&gt;rx[qid].ntfy_id].napi;</div><div class='ctx'> 	napi_disable(napi_rx); /* make sure current rx poll is done */</div><div class='ctx'> </div><div class='add'>+	tx_qid = gve_xdp_tx_queue_id(priv, qid);</div><div class='ctx'> 	napi_tx = &amp;priv-&gt;ntfy_blocks[priv-&gt;tx[tx_qid].ntfy_id].napi;</div><div class='ctx'> 	napi_disable(napi_tx); /* make sure current tx poll is done */</div><div class='ctx'> </div><div class='del'>-	priv-&gt;rx[qid].xsk_pool = NULL;</div><div class='del'>-	xdp_rxq_info_unreg(&amp;priv-&gt;rx[qid].xsk_rxq);</div><div class='del'>-	priv-&gt;tx[tx_qid].xsk_pool = NULL;</div><div class='add'>+	gve_unreg_xsk_pool(priv, qid);</div><div class='ctx'> 	smp_mb(); /* Make sure it is visible to the workers on datapath */</div><div class='ctx'> </div><div class='ctx'> 	napi_enable(napi_rx);</div><div class='del'>-	if (gve_rx_work_pending(&amp;priv-&gt;rx[qid]))</div><div class='del'>-		napi_schedule(napi_rx);</div><div class='del'>-</div><div class='ctx'> 	napi_enable(napi_tx);</div><div class='del'>-	if (gve_tx_clean_pending(priv, &amp;priv-&gt;tx[tx_qid]))</div><div class='del'>-		napi_schedule(napi_tx);</div><div class='add'>+	if (gve_is_gqi(priv)) {</div><div class='add'>+		if (gve_rx_work_pending(&amp;priv-&gt;rx[qid]))</div><div class='add'>+			napi_schedule(napi_rx);</div><div class='add'>+</div><div class='add'>+		if (gve_tx_clean_pending(priv, &amp;priv-&gt;tx[tx_qid]))</div><div class='add'>+			napi_schedule(napi_tx);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-done:</div><div class='del'>-	xsk_pool_dma_unmap(pool,</div><div class='del'>-			   DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gve_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(dev);</div><div class='del'>-	int tx_queue_id = gve_xdp_tx_queue_id(priv, queue_id);</div><div class='add'>+	struct napi_struct *napi;</div><div class='add'>+</div><div class='add'>+	if (!gve_get_napi_enabled(priv))</div><div class='add'>+		return -ENETDOWN;</div><div class='ctx'> </div><div class='ctx'> 	if (queue_id &gt;= priv-&gt;rx_cfg.num_queues || !priv-&gt;xdp_prog)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (flags &amp; XDP_WAKEUP_TX) {</div><div class='del'>-		struct gve_tx_ring *tx = &amp;priv-&gt;tx[tx_queue_id];</div><div class='del'>-		struct napi_struct *napi =</div><div class='del'>-			&amp;priv-&gt;ntfy_blocks[tx-&gt;ntfy_id].napi;</div><div class='del'>-</div><div class='del'>-		if (!napi_if_scheduled_mark_missed(napi)) {</div><div class='del'>-			/* Call local_bh_enable to trigger SoftIRQ processing */</div><div class='del'>-			local_bh_disable();</div><div class='del'>-			napi_schedule(napi);</div><div class='del'>-			local_bh_enable();</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		tx-&gt;xdp_xsk_wakeup++;</div><div class='add'>+	napi = &amp;priv-&gt;ntfy_blocks[gve_rx_idx_to_ntfy(priv, queue_id)].napi;</div><div class='add'>+	if (!napi_if_scheduled_mark_missed(napi)) {</div><div class='add'>+		/* Call local_bh_enable to trigger SoftIRQ processing */</div><div class='add'>+		local_bh_disable();</div><div class='add'>+		napi_schedule(napi);</div><div class='add'>+		local_bh_enable();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int verify_xdp_configuration(struct net_device *dev)</div><div class='add'>+static int gve_verify_xdp_configuration(struct net_device *dev,</div><div class='add'>+					struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(dev);</div><div class='add'>+	u16 max_xdp_mtu;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;features &amp; NETIF_F_LRO) {</div><div class='del'>-		netdev_warn(dev, "XDP is not supported when LRO is on.\n");</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "XDP is not supported when LRO is on.");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;queue_format != GVE_GQI_QPL_FORMAT) {</div><div class='del'>-		netdev_warn(dev, "XDP is not supported in mode %d.\n",</div><div class='del'>-			    priv-&gt;queue_format);</div><div class='add'>+	if (priv-&gt;header_split_enabled) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "XDP is not supported when header-data split is enabled.");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;mtu &gt; GVE_DEFAULT_RX_BUFFER_SIZE - sizeof(struct ethhdr) - GVE_RX_PAD) {</div><div class='del'>-		netdev_warn(dev, "XDP is not supported for mtu %d.\n",</div><div class='del'>-			    dev-&gt;mtu);</div><div class='add'>+	if (priv-&gt;rx_cfg.packet_buffer_size != SZ_2K) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "XDP is not supported for Rx buf len %d, only %d supported.",</div><div class='add'>+				       priv-&gt;rx_cfg.packet_buffer_size, SZ_2K);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	max_xdp_mtu = priv-&gt;rx_cfg.packet_buffer_size - sizeof(struct ethhdr);</div><div class='add'>+	if (priv-&gt;queue_format == GVE_GQI_QPL_FORMAT)</div><div class='add'>+		max_xdp_mtu -= GVE_RX_PAD;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;mtu &gt; max_xdp_mtu) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "XDP is not supported for mtu %d.",</div><div class='add'>+				       dev-&gt;mtu);</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;rx_cfg.num_queues != priv-&gt;tx_cfg.num_queues ||</div><div class='ctx'> 	    (2 * priv-&gt;tx_cfg.num_queues &gt; priv-&gt;tx_cfg.max_queues)) {</div><div class='del'>-		netdev_warn(dev, "XDP load failed: The number of configured RX queues %d should be equal to the number of configured TX queues %d and the number of configured RX/TX queues should be less than or equal to half the maximum number of RX/TX queues %d",</div><div class='del'>-			    priv-&gt;rx_cfg.num_queues,</div><div class='del'>-			    priv-&gt;tx_cfg.num_queues,</div><div class='add'>+		netdev_warn(dev,</div><div class='add'>+			    "XDP load failed: The number of configured RX queues %d should be equal to the number of configured TX queues %d and the number of configured RX/TX queues should be less than or equal to half the maximum number of RX/TX queues %d.",</div><div class='add'>+			    priv-&gt;rx_cfg.num_queues, priv-&gt;tx_cfg.num_queues,</div><div class='ctx'> 			    priv-&gt;tx_cfg.max_queues);</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "XDP load failed: The number of configured RX queues should be equal to the number of configured TX queues and the number of configured RX/TX queues should be less than or equal to half the maximum number of RX/TX queues");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1769,7 +1761,7 @@ static int gve_xdp(struct net_device *dev, struct netdev_bpf *xdp)</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = verify_xdp_configuration(dev);</div><div class='add'>+	err = gve_verify_xdp_configuration(dev, xdp-&gt;extack);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	switch (xdp-&gt;command) {</div><div class='hunk'>@@ -1785,6 +1777,26 @@ static int gve_xdp(struct net_device *dev, struct netdev_bpf *xdp)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int gve_init_rss_config(struct gve_priv *priv, u16 num_queues)</div><div class='add'>+{</div><div class='add'>+	struct gve_rss_config *rss_config = &amp;priv-&gt;rss_config;</div><div class='add'>+	struct ethtool_rxfh_param rxfh = {0};</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;cache_rss_config)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;rss_lut_size; i++)</div><div class='add'>+		rss_config-&gt;hash_lut[i] =</div><div class='add'>+			ethtool_rxfh_indir_default(i, num_queues);</div><div class='add'>+</div><div class='add'>+	netdev_rss_key_fill(rss_config-&gt;hash_key, priv-&gt;rss_key_size);</div><div class='add'>+</div><div class='add'>+	rxfh.hfunc = ETH_RSS_HASH_TOP;</div><div class='add'>+</div><div class='add'>+	return gve_adminq_configure_rss(priv, &amp;rxfh);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int gve_flow_rules_reset(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	if (!priv-&gt;max_flow_rules)</div><div class='hunk'>@@ -1799,7 +1811,7 @@ int gve_adjust_config(struct gve_priv *priv,</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Allocate resources for the new confiugration */</div><div class='add'>+	/* Allocate resources for the new configuration */</div><div class='ctx'> 	err = gve_queues_mem_alloc(priv, tx_alloc_cfg, rx_alloc_cfg);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netif_err(priv, drv, priv-&gt;dev,</div><div class='hunk'>@@ -1832,8 +1844,9 @@ int gve_adjust_config(struct gve_priv *priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int gve_adjust_queues(struct gve_priv *priv,</div><div class='del'>-		      struct gve_queue_config new_rx_config,</div><div class='del'>-		      struct gve_queue_config new_tx_config)</div><div class='add'>+		      struct gve_rx_queue_config new_rx_config,</div><div class='add'>+		      struct gve_tx_queue_config new_tx_config,</div><div class='add'>+		      bool reset_rss)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_tx_alloc_rings_cfg tx_alloc_cfg = {0};</div><div class='ctx'> 	struct gve_rx_alloc_rings_cfg rx_alloc_cfg = {0};</div><div class='hunk'>@@ -1844,14 +1857,19 @@ int gve_adjust_queues(struct gve_priv *priv,</div><div class='ctx'> 	/* Relay the new config from ethtool */</div><div class='ctx'> 	tx_alloc_cfg.qcfg = &amp;new_tx_config;</div><div class='ctx'> 	rx_alloc_cfg.qcfg_tx = &amp;new_tx_config;</div><div class='del'>-	rx_alloc_cfg.qcfg = &amp;new_rx_config;</div><div class='del'>-	tx_alloc_cfg.num_rings = new_tx_config.num_queues;</div><div class='add'>+	rx_alloc_cfg.qcfg_rx = &amp;new_rx_config;</div><div class='add'>+	rx_alloc_cfg.reset_rss = reset_rss;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(priv-&gt;dev)) {</div><div class='ctx'> 		err = gve_adjust_config(priv, &amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Set the config for the next up. */</div><div class='add'>+	if (reset_rss) {</div><div class='add'>+		err = gve_init_rss_config(priv, new_rx_config.num_queues);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='ctx'> 	priv-&gt;tx_cfg = new_tx_config;</div><div class='ctx'> 	priv-&gt;rx_cfg = new_rx_config;</div><div class='ctx'> </div><div class='hunk'>@@ -1880,7 +1898,7 @@ static void gve_turndown(struct gve_priv *priv)</div><div class='ctx'> 			netif_queue_set_napi(priv-&gt;dev, idx,</div><div class='ctx'> 					     NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='ctx'> </div><div class='del'>-		napi_disable(&amp;block-&gt;napi);</div><div class='add'>+		napi_disable_locked(&amp;block-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> 	for (idx = 0; idx &lt; priv-&gt;rx_cfg.num_queues; idx++) {</div><div class='ctx'> 		int ntfy_idx = gve_rx_idx_to_ntfy(priv, idx);</div><div class='hunk'>@@ -1891,14 +1909,19 @@ static void gve_turndown(struct gve_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 		netif_queue_set_napi(priv-&gt;dev, idx, NETDEV_QUEUE_TYPE_RX,</div><div class='ctx'> 				     NULL);</div><div class='del'>-		napi_disable(&amp;block-&gt;napi);</div><div class='add'>+		napi_disable_locked(&amp;block-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Stop tx queues */</div><div class='ctx'> 	netif_tx_disable(priv-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	xdp_features_clear_redirect_target_locked(priv-&gt;dev);</div><div class='add'>+</div><div class='ctx'> 	gve_clear_napi_enabled(priv);</div><div class='ctx'> 	gve_clear_report_stats(priv);</div><div class='add'>+</div><div class='add'>+	/* Make sure that all traffic is finished processing. */</div><div class='add'>+	synchronize_net();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gve_turnup(struct gve_priv *priv)</div><div class='hunk'>@@ -1916,7 +1939,7 @@ static void gve_turnup(struct gve_priv *priv)</div><div class='ctx'> 		if (!gve_tx_was_added_to_block(priv, idx))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		napi_enable(&amp;block-&gt;napi);</div><div class='add'>+		napi_enable_locked(&amp;block-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 		if (idx &lt; priv-&gt;tx_cfg.num_queues)</div><div class='ctx'> 			netif_queue_set_napi(priv-&gt;dev, idx,</div><div class='hunk'>@@ -1944,7 +1967,7 @@ static void gve_turnup(struct gve_priv *priv)</div><div class='ctx'> 		if (!gve_rx_was_added_to_block(priv, idx))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		napi_enable(&amp;block-&gt;napi);</div><div class='add'>+		napi_enable_locked(&amp;block-&gt;napi);</div><div class='ctx'> 		netif_queue_set_napi(priv-&gt;dev, idx, NETDEV_QUEUE_TYPE_RX,</div><div class='ctx'> 				     &amp;block-&gt;napi);</div><div class='ctx'> </div><div class='hunk'>@@ -1963,6 +1986,9 @@ static void gve_turnup(struct gve_priv *priv)</div><div class='ctx'> 		napi_schedule(&amp;block-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;tx_cfg.num_xdp_queues &amp;&amp; gve_supports_xdp_xmit(priv))</div><div class='add'>+		xdp_features_set_redirect_target_locked(priv-&gt;dev, false);</div><div class='add'>+</div><div class='ctx'> 	gve_set_napi_enabled(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1975,72 +2001,104 @@ static void gve_turnup_and_check_status(struct gve_priv *priv)</div><div class='ctx'> 	gve_handle_link_status(priv, GVE_DEVICE_STATUS_LINK_STATUS_MASK &amp; status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gve_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='add'>+static struct gve_notify_block *gve_get_tx_notify_block(struct gve_priv *priv,</div><div class='add'>+							unsigned int txqueue)</div><div class='ctx'> {</div><div class='del'>-	struct gve_notify_block *block;</div><div class='del'>-	struct gve_tx_ring *tx = NULL;</div><div class='del'>-	struct gve_priv *priv;</div><div class='del'>-	u32 last_nic_done;</div><div class='del'>-	u32 current_time;</div><div class='ctx'> 	u32 ntfy_idx;</div><div class='ctx'> </div><div class='del'>-	netdev_info(dev, "Timeout on tx queue, %d", txqueue);</div><div class='del'>-	priv = netdev_priv(dev);</div><div class='ctx'> 	if (txqueue &gt; priv-&gt;tx_cfg.num_queues)</div><div class='del'>-		goto reset;</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	ntfy_idx = gve_tx_idx_to_ntfy(priv, txqueue);</div><div class='ctx'> 	if (ntfy_idx &gt;= priv-&gt;num_ntfy_blks)</div><div class='del'>-		goto reset;</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return &amp;priv-&gt;ntfy_blocks[ntfy_idx];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool gve_tx_timeout_try_q_kick(struct gve_priv *priv,</div><div class='add'>+				      unsigned int txqueue)</div><div class='add'>+{</div><div class='add'>+	struct gve_notify_block *block;</div><div class='add'>+	u32 current_time;</div><div class='ctx'> </div><div class='del'>-	block = &amp;priv-&gt;ntfy_blocks[ntfy_idx];</div><div class='del'>-	tx = block-&gt;tx;</div><div class='add'>+	block = gve_get_tx_notify_block(priv, txqueue);</div><div class='add'>+</div><div class='add'>+	if (!block)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	current_time = jiffies_to_msecs(jiffies);</div><div class='del'>-	if (tx-&gt;last_kick_msec + MIN_TX_TIMEOUT_GAP &gt; current_time)</div><div class='del'>-		goto reset;</div><div class='add'>+	if (block-&gt;tx-&gt;last_kick_msec + MIN_TX_TIMEOUT_GAP &gt; current_time)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	/* Check to see if there are missed completions, which will allow us to</div><div class='del'>-	 * kick the queue.</div><div class='del'>-	 */</div><div class='del'>-	last_nic_done = gve_tx_load_event_counter(priv, tx);</div><div class='del'>-	if (last_nic_done - tx-&gt;done) {</div><div class='del'>-		netdev_info(dev, "Kicking queue %d", txqueue);</div><div class='del'>-		iowrite32be(GVE_IRQ_MASK, gve_irq_doorbell(priv, block));</div><div class='del'>-		napi_schedule(&amp;block-&gt;napi);</div><div class='del'>-		tx-&gt;last_kick_msec = current_time;</div><div class='del'>-		goto out;</div><div class='del'>-	} // Else reset.</div><div class='add'>+	netdev_info(priv-&gt;dev, "Kicking queue %d", txqueue);</div><div class='add'>+	napi_schedule(&amp;block-&gt;napi);</div><div class='add'>+	block-&gt;tx-&gt;last_kick_msec = current_time;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-reset:</div><div class='del'>-	gve_schedule_reset(priv);</div><div class='add'>+static void gve_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='add'>+{</div><div class='add'>+	struct gve_notify_block *block;</div><div class='add'>+	struct gve_priv *priv;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	if (tx)</div><div class='del'>-		tx-&gt;queue_timeout++;</div><div class='add'>+	netdev_info(dev, "Timeout on tx queue, %d", txqueue);</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!gve_tx_timeout_try_q_kick(priv, txqueue))</div><div class='add'>+		gve_schedule_reset(priv);</div><div class='add'>+</div><div class='add'>+	block = gve_get_tx_notify_block(priv, txqueue);</div><div class='add'>+	if (block)</div><div class='add'>+		block-&gt;tx-&gt;queue_timeout++;</div><div class='ctx'> 	priv-&gt;tx_timeo_cnt++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u16 gve_get_pkt_buf_size(const struct gve_priv *priv, bool enable_hsplit)</div><div class='add'>+/* Header split is only supported on DQ RDA queue format. If XDP is enabled,</div><div class='add'>+ * header split is not allowed.</div><div class='add'>+ */</div><div class='add'>+bool gve_header_split_supported(const struct gve_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	if (enable_hsplit &amp;&amp; priv-&gt;max_rx_buffer_size &gt;= GVE_MAX_RX_BUFFER_SIZE)</div><div class='del'>-		return GVE_MAX_RX_BUFFER_SIZE;</div><div class='del'>-	else</div><div class='del'>-		return GVE_DEFAULT_RX_BUFFER_SIZE;</div><div class='add'>+	return priv-&gt;header_buf_size &amp;&amp;</div><div class='add'>+		priv-&gt;queue_format == GVE_DQO_RDA_FORMAT &amp;&amp; !priv-&gt;xdp_prog;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* header-split is not supported on non-DQO_RDA yet even if device advertises it */</div><div class='del'>-bool gve_header_split_supported(const struct gve_priv *priv)</div><div class='add'>+int gve_set_rx_buf_len_config(struct gve_priv *priv, u32 rx_buf_len,</div><div class='add'>+			      struct netlink_ext_ack *extack,</div><div class='add'>+			      struct gve_rx_alloc_rings_cfg *rx_alloc_cfg)</div><div class='ctx'> {</div><div class='del'>-	return priv-&gt;header_buf_size &amp;&amp; priv-&gt;queue_format == GVE_DQO_RDA_FORMAT;</div><div class='add'>+	u32 old_rx_buf_len = rx_alloc_cfg-&gt;packet_buffer_size;</div><div class='add'>+</div><div class='add'>+	if (rx_buf_len == old_rx_buf_len)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* device options may not always contain support for 4K buffers */</div><div class='add'>+	if (!gve_is_dqo(priv) || priv-&gt;max_rx_buffer_size &lt; SZ_4K) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Modifying Rx buf len is not supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;xdp_prog &amp;&amp; rx_buf_len != SZ_2K) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Rx buf len can only be 2048 when XDP is on");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_buf_len != SZ_2K &amp;&amp; rx_buf_len != SZ_4K) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Rx buf len can only be 2048 or 4096");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	rx_alloc_cfg-&gt;packet_buffer_size = rx_buf_len;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int gve_set_hsplit_config(struct gve_priv *priv, u8 tcp_data_split)</div><div class='add'>+int gve_set_hsplit_config(struct gve_priv *priv, u8 tcp_data_split,</div><div class='add'>+			  struct gve_rx_alloc_rings_cfg *rx_alloc_cfg)</div><div class='ctx'> {</div><div class='del'>-	struct gve_tx_alloc_rings_cfg tx_alloc_cfg = {0};</div><div class='del'>-	struct gve_rx_alloc_rings_cfg rx_alloc_cfg = {0};</div><div class='ctx'> 	bool enable_hdr_split;</div><div class='del'>-	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (tcp_data_split == ETHTOOL_TCP_DATA_SPLIT_UNKNOWN)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2058,14 +2116,9 @@ int gve_set_hsplit_config(struct gve_priv *priv, u8 tcp_data_split)</div><div class='ctx'> 	if (enable_hdr_split == priv-&gt;header_split_enabled)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	gve_get_curr_alloc_cfgs(priv, &amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='del'>-</div><div class='del'>-	rx_alloc_cfg.enable_header_split = enable_hdr_split;</div><div class='del'>-	rx_alloc_cfg.packet_buffer_size = gve_get_pkt_buf_size(priv, enable_hdr_split);</div><div class='add'>+	rx_alloc_cfg-&gt;enable_header_split = enable_hdr_split;</div><div class='ctx'> </div><div class='del'>-	if (netif_running(priv-&gt;dev))</div><div class='del'>-		err = gve_adjust_config(priv, &amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='del'>-	return err;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gve_set_features(struct net_device *netdev,</div><div class='hunk'>@@ -2081,6 +2134,12 @@ static int gve_set_features(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	if ((netdev-&gt;features &amp; NETIF_F_LRO) != (features &amp; NETIF_F_LRO)) {</div><div class='ctx'> 		netdev-&gt;features ^= NETIF_F_LRO;</div><div class='add'>+		if (priv-&gt;xdp_prog &amp;&amp; (netdev-&gt;features &amp; NETIF_F_LRO)) {</div><div class='add'>+			netdev_warn(netdev,</div><div class='add'>+				    "XDP is not supported when LRO is on.\n");</div><div class='add'>+			err =  -EOPNOTSUPP;</div><div class='add'>+			goto revert_features;</div><div class='add'>+		}</div><div class='ctx'> 		if (netif_running(netdev)) {</div><div class='ctx'> 			err = gve_adjust_config(priv, &amp;tx_alloc_cfg, &amp;rx_alloc_cfg);</div><div class='ctx'> 			if (err)</div><div class='hunk'>@@ -2100,6 +2159,42 @@ revert_features:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gve_get_ts_config(struct net_device *dev,</div><div class='add'>+			     struct kernel_hwtstamp_config *kernel_config)</div><div class='add'>+{</div><div class='add'>+	struct gve_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	*kernel_config = priv-&gt;ts_config;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gve_set_ts_config(struct net_device *dev,</div><div class='add'>+			     struct kernel_hwtstamp_config *kernel_config,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct gve_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (kernel_config-&gt;tx_type != HWTSTAMP_TX_OFF) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "TX timestamping is not supported");</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (kernel_config-&gt;rx_filter != HWTSTAMP_FILTER_NONE) {</div><div class='add'>+		if (!priv-&gt;nic_ts_report) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "RX timestamping is not supported");</div><div class='add'>+			kernel_config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		kernel_config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;ts_config.rx_filter = kernel_config-&gt;rx_filter;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops gve_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit		=	gve_start_xmit,</div><div class='ctx'> 	.ndo_features_check	=	gve_features_check,</div><div class='hunk'>@@ -2111,6 +2206,8 @@ static const struct net_device_ops gve_netdev_ops = {</div><div class='ctx'> 	.ndo_bpf		=	gve_xdp,</div><div class='ctx'> 	.ndo_xdp_xmit		=	gve_xdp_xmit,</div><div class='ctx'> 	.ndo_xsk_wakeup		=	gve_xsk_wakeup,</div><div class='add'>+	.ndo_hwtstamp_get	=	gve_get_ts_config,</div><div class='add'>+	.ndo_hwtstamp_set	=	gve_set_ts_config,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void gve_handle_status(struct gve_priv *priv, u32 status)</div><div class='hunk'>@@ -2136,7 +2233,9 @@ static void gve_handle_reset(struct gve_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	if (gve_get_do_reset(priv)) {</div><div class='ctx'> 		rtnl_lock();</div><div class='add'>+		netdev_lock(priv-&gt;dev);</div><div class='ctx'> 		gve_reset(priv, false);</div><div class='add'>+		netdev_unlock(priv-&gt;dev);</div><div class='ctx'> 		rtnl_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2210,7 +2309,7 @@ void gve_handle_report_stats(struct gve_priv *priv)</div><div class='ctx'> 			};</div><div class='ctx'> 			stats[stats_idx++] = (struct stats) {</div><div class='ctx'> 				.stat_name = cpu_to_be32(RX_BUFFERS_POSTED),</div><div class='del'>-				.value = cpu_to_be64(priv-&gt;rx[0].fill_cnt),</div><div class='add'>+				.value = cpu_to_be64(priv-&gt;rx[idx].fill_cnt),</div><div class='ctx'> 				.queue_id = cpu_to_be32(idx),</div><div class='ctx'> 			};</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2232,16 +2331,27 @@ static void gve_service_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void gve_set_netdev_xdp_features(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	xdp_features_t xdp_features;</div><div class='add'>+</div><div class='ctx'> 	if (priv-&gt;queue_format == GVE_GQI_QPL_FORMAT) {</div><div class='del'>-		priv-&gt;dev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC;</div><div class='del'>-		priv-&gt;dev-&gt;xdp_features |= NETDEV_XDP_ACT_REDIRECT;</div><div class='del'>-		priv-&gt;dev-&gt;xdp_features |= NETDEV_XDP_ACT_NDO_XMIT;</div><div class='del'>-		priv-&gt;dev-&gt;xdp_features |= NETDEV_XDP_ACT_XSK_ZEROCOPY;</div><div class='add'>+		xdp_features = NETDEV_XDP_ACT_BASIC;</div><div class='add'>+		xdp_features |= NETDEV_XDP_ACT_REDIRECT;</div><div class='add'>+		xdp_features |= NETDEV_XDP_ACT_XSK_ZEROCOPY;</div><div class='add'>+	} else if (priv-&gt;queue_format == GVE_DQO_RDA_FORMAT) {</div><div class='add'>+		xdp_features = NETDEV_XDP_ACT_BASIC;</div><div class='add'>+		xdp_features |= NETDEV_XDP_ACT_REDIRECT;</div><div class='add'>+		xdp_features |= NETDEV_XDP_ACT_XSK_ZEROCOPY;</div><div class='ctx'> 	} else {</div><div class='del'>-		priv-&gt;dev-&gt;xdp_features = 0;</div><div class='add'>+		xdp_features = 0;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	xdp_set_features_flag_locked(priv-&gt;dev, xdp_features);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct xdp_metadata_ops gve_xdp_metadata_ops = {</div><div class='add'>+	.xmo_rx_timestamp	= gve_xdp_rx_timestamp,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int gve_init_priv(struct gve_priv *priv, bool skip_describe_device)</div><div class='ctx'> {</div><div class='ctx'> 	int num_ntfy;</div><div class='hunk'>@@ -2289,7 +2399,7 @@ static int gve_init_priv(struct gve_priv *priv, bool skip_describe_device)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Big TCP is only supported on DQ*/</div><div class='add'>+	/* Big TCP is only supported on DQO */</div><div class='ctx'> 	if (!gve_is_gqi(priv))</div><div class='ctx'> 		netif_set_tso_max_size(priv-&gt;dev, GVE_DQO_TX_MAX);</div><div class='ctx'> </div><div class='hunk'>@@ -2299,6 +2409,7 @@ static int gve_init_priv(struct gve_priv *priv, bool skip_describe_device)</div><div class='ctx'> 	 */</div><div class='ctx'> 	priv-&gt;num_ntfy_blks = (num_ntfy - 1) &amp; ~0x1;</div><div class='ctx'> 	priv-&gt;mgmt_msix_idx = priv-&gt;num_ntfy_blks;</div><div class='add'>+	priv-&gt;numa_node = dev_to_node(&amp;priv-&gt;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;tx_cfg.max_queues =</div><div class='ctx'> 		min_t(int, priv-&gt;tx_cfg.max_queues, priv-&gt;num_ntfy_blks / 2);</div><div class='hunk'>@@ -2313,6 +2424,7 @@ static int gve_init_priv(struct gve_priv *priv, bool skip_describe_device)</div><div class='ctx'> 		priv-&gt;rx_cfg.num_queues = min_t(int, priv-&gt;default_num_queues,</div><div class='ctx'> 						priv-&gt;rx_cfg.num_queues);</div><div class='ctx'> 	}</div><div class='add'>+	priv-&gt;tx_cfg.num_xdp_queues = 0;</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;priv-&gt;pdev-&gt;dev, "TX queues %d, RX queues %d\n",</div><div class='ctx'> 		 priv-&gt;tx_cfg.num_queues, priv-&gt;rx_cfg.num_queues);</div><div class='hunk'>@@ -2324,11 +2436,29 @@ static int gve_init_priv(struct gve_priv *priv, bool skip_describe_device)</div><div class='ctx'> 		priv-&gt;rx_coalesce_usecs = GVE_RX_IRQ_RATELIMIT_US_DQO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	priv-&gt;ts_config.tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+	priv-&gt;ts_config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+</div><div class='ctx'> setup_device:</div><div class='add'>+	priv-&gt;xsk_pools = bitmap_zalloc(priv-&gt;rx_cfg.max_queues, GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;xsk_pools) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	gve_set_netdev_xdp_features(priv);</div><div class='add'>+	if (!gve_is_gqi(priv))</div><div class='add'>+		priv-&gt;dev-&gt;xdp_metadata_ops = &amp;gve_xdp_metadata_ops;</div><div class='add'>+</div><div class='ctx'> 	err = gve_setup_device_resources(priv);</div><div class='del'>-	if (!err)</div><div class='del'>-		return 0;</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_xsk_bitmap;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_xsk_bitmap:</div><div class='add'>+	bitmap_free(priv-&gt;xsk_pools);</div><div class='add'>+	priv-&gt;xsk_pools = NULL;</div><div class='ctx'> err:</div><div class='ctx'> 	gve_adminq_free(&amp;priv-&gt;pdev-&gt;dev, priv);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -2338,6 +2468,8 @@ static void gve_teardown_priv_resources(struct gve_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	gve_teardown_device_resources(priv);</div><div class='ctx'> 	gve_adminq_free(&amp;priv-&gt;pdev-&gt;dev, priv);</div><div class='add'>+	bitmap_free(priv-&gt;xsk_pools);</div><div class='add'>+	priv-&gt;xsk_pools = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gve_trigger_reset(struct gve_priv *priv)</div><div class='hunk'>@@ -2693,7 +2825,7 @@ static int gve_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	priv-&gt;service_task_flags = 0x0;</div><div class='ctx'> 	priv-&gt;state_flags = 0x0;</div><div class='ctx'> 	priv-&gt;ethtool_flags = 0x0;</div><div class='del'>-	priv-&gt;data_buffer_size_dqo = GVE_DEFAULT_RX_BUFFER_SIZE;</div><div class='add'>+	priv-&gt;rx_cfg.packet_buffer_size = GVE_DEFAULT_RX_BUFFER_SIZE;</div><div class='ctx'> 	priv-&gt;max_rx_buffer_size = GVE_DEFAULT_RX_BUFFER_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	gve_set_probe_in_progress(priv);</div><div class='hunk'>@@ -2712,6 +2844,9 @@ static int gve_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto abort_with_wq;</div><div class='ctx'> </div><div class='add'>+	if (!gve_is_gqi(priv) &amp;&amp; !gve_is_qpl(priv))</div><div class='add'>+		dev-&gt;netmem_tx = true;</div><div class='add'>+</div><div class='ctx'> 	err = register_netdev(dev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto abort_with_gve_init;</div><div class='hunk'>@@ -2768,7 +2903,10 @@ static void gve_shutdown(struct pci_dev *pdev)</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	bool was_up = netif_running(priv-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	netif_device_detach(netdev);</div><div class='add'>+</div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> 	if (was_up &amp;&amp; gve_close(priv-&gt;dev)) {</div><div class='ctx'> 		/* If the dev was up, attempt to close, if close fails, reset */</div><div class='ctx'> 		gve_reset_and_teardown(priv, was_up);</div><div class='hunk'>@@ -2776,6 +2914,7 @@ static void gve_shutdown(struct pci_dev *pdev)</div><div class='ctx'> 		/* If the dev wasn't up or close worked, finish tearing down */</div><div class='ctx'> 		gve_teardown_priv_resources(priv);</div><div class='ctx'> 	}</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2788,6 +2927,7 @@ static int gve_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;suspend_cnt++;</div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> 	if (was_up &amp;&amp; gve_close(priv-&gt;dev)) {</div><div class='ctx'> 		/* If the dev was up, attempt to close, if close fails, reset */</div><div class='ctx'> 		gve_reset_and_teardown(priv, was_up);</div><div class='hunk'>@@ -2796,6 +2936,7 @@ static int gve_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> 		gve_teardown_priv_resources(priv);</div><div class='ctx'> 	}</div><div class='ctx'> 	priv-&gt;up_before_suspend = was_up;</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2808,7 +2949,9 @@ static int gve_resume(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;resume_cnt++;</div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> 	err = gve_reset_recovery(priv, priv-&gt;up_before_suspend);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_ptp.c b/drivers/net/ethernet/google/gve/gve_ptp.c<br/>new file mode 100644<br/>index 000000000000..073677d82ee8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,166 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/* Google virtual Ethernet (gve) driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Google LLC</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "gve.h"</div><div class='add'>+#include "gve_adminq.h"</div><div class='add'>+</div><div class='add'>+/* Interval to schedule a nic timestamp calibration, 250ms. */</div><div class='add'>+#define GVE_NIC_TS_SYNC_INTERVAL_MS 250</div><div class='add'>+</div><div class='add'>+/* Read the nic timestamp from hardware via the admin queue. */</div><div class='add'>+int gve_clock_nic_ts_read(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u64 nic_raw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = gve_adminq_report_nic_ts(priv, priv-&gt;nic_ts_report_bus);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	nic_raw = be64_to_cpu(priv-&gt;nic_ts_report-&gt;nic_timestamp);</div><div class='add'>+	WRITE_ONCE(priv-&gt;last_sync_nic_counter, nic_raw);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gve_ptp_gettimex64(struct ptp_clock_info *info,</div><div class='add'>+			      struct timespec64 *ts,</div><div class='add'>+			      struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gve_ptp_settime64(struct ptp_clock_info *info,</div><div class='add'>+			     const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long gve_ptp_do_aux_work(struct ptp_clock_info *info)</div><div class='add'>+{</div><div class='add'>+	const struct gve_ptp *ptp = container_of(info, struct gve_ptp, info);</div><div class='add'>+	struct gve_priv *priv = ptp-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (gve_get_reset_in_progress(priv) || !gve_get_admin_queue_ok(priv))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = gve_clock_nic_ts_read(priv);</div><div class='add'>+	if (err &amp;&amp; net_ratelimit())</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+			"%s read err %d\n", __func__, err);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return msecs_to_jiffies(GVE_NIC_TS_SYNC_INTERVAL_MS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ptp_clock_info gve_ptp_caps = {</div><div class='add'>+	.owner          = THIS_MODULE,</div><div class='add'>+	.name		= "gve clock",</div><div class='add'>+	.gettimex64	= gve_ptp_gettimex64,</div><div class='add'>+	.settime64	= gve_ptp_settime64,</div><div class='add'>+	.do_aux_work	= gve_ptp_do_aux_work,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int gve_ptp_init(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct gve_ptp *ptp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;nic_timestamp_supported) {</div><div class='add'>+		dev_dbg(&amp;priv-&gt;pdev-&gt;dev, "Device does not support PTP\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;ptp = kzalloc(sizeof(*priv-&gt;ptp), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;ptp)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ptp = priv-&gt;ptp;</div><div class='add'>+	ptp-&gt;info = gve_ptp_caps;</div><div class='add'>+	ptp-&gt;clock = ptp_clock_register(&amp;ptp-&gt;info, &amp;priv-&gt;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(ptp-&gt;clock)) {</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev, "PTP clock registration failed\n");</div><div class='add'>+		err  = PTR_ERR(ptp-&gt;clock);</div><div class='add'>+		goto free_ptp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ptp-&gt;priv = priv;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_ptp:</div><div class='add'>+	kfree(ptp);</div><div class='add'>+	priv-&gt;ptp = NULL;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gve_ptp_release(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct gve_ptp *ptp = priv-&gt;ptp;</div><div class='add'>+</div><div class='add'>+	if (!ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (ptp-&gt;clock)</div><div class='add'>+		ptp_clock_unregister(ptp-&gt;clock);</div><div class='add'>+</div><div class='add'>+	kfree(ptp);</div><div class='add'>+	priv-&gt;ptp = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int gve_init_clock(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;nic_timestamp_supported)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = gve_ptp_init(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;nic_ts_report =</div><div class='add'>+		dma_alloc_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+				   sizeof(struct gve_nic_ts_report),</div><div class='add'>+				   &amp;priv-&gt;nic_ts_report_bus,</div><div class='add'>+				   GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;nic_ts_report) {</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev, "%s dma alloc error\n", __func__);</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto release_ptp;</div><div class='add'>+	}</div><div class='add'>+	err = gve_clock_nic_ts_read(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev, "failed to read NIC clock %d\n", err);</div><div class='add'>+		goto release_nic_ts_report;</div><div class='add'>+	}</div><div class='add'>+	ptp_schedule_worker(priv-&gt;ptp-&gt;clock,</div><div class='add'>+			    msecs_to_jiffies(GVE_NIC_TS_SYNC_INTERVAL_MS));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+release_nic_ts_report:</div><div class='add'>+	dma_free_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+			  sizeof(struct gve_nic_ts_report),</div><div class='add'>+			  priv-&gt;nic_ts_report, priv-&gt;nic_ts_report_bus);</div><div class='add'>+	priv-&gt;nic_ts_report = NULL;</div><div class='add'>+release_ptp:</div><div class='add'>+	gve_ptp_release(priv);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void gve_teardown_clock(struct gve_priv *priv)</div><div class='add'>+{</div><div class='add'>+	gve_ptp_release(priv);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;nic_ts_report) {</div><div class='add'>+		dma_free_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+				  sizeof(struct gve_nic_ts_report),</div><div class='add'>+				  priv-&gt;nic_ts_report, priv-&gt;nic_ts_report_bus);</div><div class='add'>+		priv-&gt;nic_ts_report = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_rx.c b/drivers/net/ethernet/google/gve/gve_rx.c<br/>index acb73d4d0de6..ec424d2f4f57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_rx.c</a></div><div class='hunk'>@@ -141,12 +141,15 @@ void gve_rx_free_ring_gqi(struct gve_priv *priv, struct gve_rx_ring *rx,</div><div class='ctx'> 	netif_dbg(priv, drv, priv-&gt;dev, "freed rx ring %d\n", idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gve_setup_rx_buffer(struct gve_rx_slot_page_info *page_info,</div><div class='del'>-			     dma_addr_t addr, struct page *page, __be64 *slot_addr)</div><div class='add'>+static void gve_setup_rx_buffer(struct gve_rx_ring *rx,</div><div class='add'>+				struct gve_rx_slot_page_info *page_info,</div><div class='add'>+				dma_addr_t addr, struct page *page,</div><div class='add'>+				__be64 *slot_addr)</div><div class='ctx'> {</div><div class='ctx'> 	page_info-&gt;page = page;</div><div class='ctx'> 	page_info-&gt;page_offset = 0;</div><div class='ctx'> 	page_info-&gt;page_address = page_address(page);</div><div class='add'>+	page_info-&gt;buf_size = rx-&gt;packet_buffer_size;</div><div class='ctx'> 	*slot_addr = cpu_to_be64(addr);</div><div class='ctx'> 	/* The page already has 1 ref */</div><div class='ctx'> 	page_ref_add(page, INT_MAX - 1);</div><div class='hunk'>@@ -171,7 +174,7 @@ static int gve_rx_alloc_buffer(struct gve_priv *priv, struct device *dev,</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	gve_setup_rx_buffer(page_info, dma, page, &amp;data_slot-&gt;addr);</div><div class='add'>+	gve_setup_rx_buffer(rx, page_info, dma, page, &amp;data_slot-&gt;addr);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -189,8 +192,8 @@ static int gve_rx_prefill_pages(struct gve_rx_ring *rx,</div><div class='ctx'> 	 */</div><div class='ctx'> 	slots = rx-&gt;mask + 1;</div><div class='ctx'> </div><div class='del'>-	rx-&gt;data.page_info = kvzalloc(slots *</div><div class='del'>-				      sizeof(*rx-&gt;data.page_info), GFP_KERNEL);</div><div class='add'>+	rx-&gt;data.page_info = kvcalloc_node(slots, sizeof(*rx-&gt;data.page_info),</div><div class='add'>+					   GFP_KERNEL, priv-&gt;numa_node);</div><div class='ctx'> 	if (!rx-&gt;data.page_info)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -199,7 +202,8 @@ static int gve_rx_prefill_pages(struct gve_rx_ring *rx,</div><div class='ctx'> 			struct page *page = rx-&gt;data.qpl-&gt;pages[i];</div><div class='ctx'> 			dma_addr_t addr = i * PAGE_SIZE;</div><div class='ctx'> </div><div class='del'>-			gve_setup_rx_buffer(&amp;rx-&gt;data.page_info[i], addr, page,</div><div class='add'>+			gve_setup_rx_buffer(rx, &amp;rx-&gt;data.page_info[i], addr,</div><div class='add'>+					    page,</div><div class='ctx'> 					    &amp;rx-&gt;data.data_ring[i].qpl_offset);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -212,7 +216,8 @@ static int gve_rx_prefill_pages(struct gve_rx_ring *rx,</div><div class='ctx'> </div><div class='ctx'> 	if (!rx-&gt;data.raw_addressing) {</div><div class='ctx'> 		for (j = 0; j &lt; rx-&gt;qpl_copy_pool_mask + 1; j++) {</div><div class='del'>-			struct page *page = alloc_page(GFP_KERNEL);</div><div class='add'>+			struct page *page = alloc_pages_node(priv-&gt;numa_node,</div><div class='add'>+							     GFP_KERNEL, 0);</div><div class='ctx'> </div><div class='ctx'> 			if (!page) {</div><div class='ctx'> 				err = -ENOMEM;</div><div class='hunk'>@@ -222,6 +227,7 @@ static int gve_rx_prefill_pages(struct gve_rx_ring *rx,</div><div class='ctx'> 			rx-&gt;qpl_copy_pool[j].page = page;</div><div class='ctx'> 			rx-&gt;qpl_copy_pool[j].page_offset = 0;</div><div class='ctx'> 			rx-&gt;qpl_copy_pool[j].page_address = page_address(page);</div><div class='add'>+			rx-&gt;qpl_copy_pool[j].buf_size = rx-&gt;packet_buffer_size;</div><div class='ctx'> </div><div class='ctx'> 			/* The page already has 1 ref. */</div><div class='ctx'> 			page_ref_add(page, INT_MAX - 1);</div><div class='hunk'>@@ -283,6 +289,7 @@ int gve_rx_alloc_ring_gqi(struct gve_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	rx-&gt;gve = priv;</div><div class='ctx'> 	rx-&gt;q_num = idx;</div><div class='add'>+	rx-&gt;packet_buffer_size = cfg-&gt;packet_buffer_size;</div><div class='ctx'> </div><div class='ctx'> 	rx-&gt;mask = slots - 1;</div><div class='ctx'> 	rx-&gt;data.raw_addressing = cfg-&gt;raw_addressing;</div><div class='hunk'>@@ -297,10 +304,9 @@ int gve_rx_alloc_ring_gqi(struct gve_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	rx-&gt;qpl_copy_pool_mask = min_t(u32, U32_MAX, slots * 2) - 1;</div><div class='ctx'> 	rx-&gt;qpl_copy_pool_head = 0;</div><div class='del'>-	rx-&gt;qpl_copy_pool = kvcalloc(rx-&gt;qpl_copy_pool_mask + 1,</div><div class='del'>-				     sizeof(rx-&gt;qpl_copy_pool[0]),</div><div class='del'>-				     GFP_KERNEL);</div><div class='del'>-</div><div class='add'>+	rx-&gt;qpl_copy_pool = kvcalloc_node(rx-&gt;qpl_copy_pool_mask + 1,</div><div class='add'>+					  sizeof(rx-&gt;qpl_copy_pool[0]),</div><div class='add'>+					  GFP_KERNEL, priv-&gt;numa_node);</div><div class='ctx'> 	if (!rx-&gt;qpl_copy_pool) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto abort_with_slots;</div><div class='hunk'>@@ -351,7 +357,6 @@ int gve_rx_alloc_ring_gqi(struct gve_priv *priv,</div><div class='ctx'> 	rx-&gt;db_threshold = slots / 2;</div><div class='ctx'> 	gve_rx_init_ring_state_gqi(rx);</div><div class='ctx'> </div><div class='del'>-	rx-&gt;packet_buffer_size = GVE_DEFAULT_RX_BUFFER_SIZE;</div><div class='ctx'> 	gve_rx_ctx_clear(&amp;rx-&gt;ctx);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -385,12 +390,12 @@ int gve_rx_alloc_rings_gqi(struct gve_priv *priv,</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='del'>-	rx = kvcalloc(cfg-&gt;qcfg-&gt;max_queues, sizeof(struct gve_rx_ring),</div><div class='add'>+	rx = kvcalloc(cfg-&gt;qcfg_rx-&gt;max_queues, sizeof(struct gve_rx_ring),</div><div class='ctx'> 		      GFP_KERNEL);</div><div class='ctx'> 	if (!rx)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; cfg-&gt;qcfg-&gt;num_queues; i++) {</div><div class='add'>+	for (i = 0; i &lt; cfg-&gt;qcfg_rx-&gt;num_queues; i++) {</div><div class='ctx'> 		err = gve_rx_alloc_ring_gqi(priv, cfg, &amp;rx[i], i);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			netif_err(priv, drv, priv-&gt;dev,</div><div class='hunk'>@@ -419,7 +424,7 @@ void gve_rx_free_rings_gqi(struct gve_priv *priv,</div><div class='ctx'> 	if (!rx)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; cfg-&gt;qcfg-&gt;num_queues;  i++)</div><div class='add'>+	for (i = 0; i &lt; cfg-&gt;qcfg_rx-&gt;num_queues;  i++)</div><div class='ctx'> 		gve_rx_free_ring_gqi(priv, &amp;rx[i], cfg);</div><div class='ctx'> </div><div class='ctx'> 	kvfree(rx);</div><div class='hunk'>@@ -590,7 +595,7 @@ static struct sk_buff *gve_rx_copy_to_pool(struct gve_rx_ring *rx,</div><div class='ctx'> 	copy_page_info-&gt;pad = page_info-&gt;pad;</div><div class='ctx'> </div><div class='ctx'> 	skb = gve_rx_add_frags(napi, copy_page_info,</div><div class='del'>-			       rx-&gt;packet_buffer_size, len, ctx);</div><div class='add'>+			       copy_page_info-&gt;buf_size, len, ctx);</div><div class='ctx'> 	if (unlikely(!skb))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -630,7 +635,8 @@ gve_rx_qpl(struct device *dev, struct net_device *netdev,</div><div class='ctx'> 	 * device.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (page_info-&gt;can_flip) {</div><div class='del'>-		skb = gve_rx_add_frags(napi, page_info, rx-&gt;packet_buffer_size, len, ctx);</div><div class='add'>+		skb = gve_rx_add_frags(napi, page_info, page_info-&gt;buf_size,</div><div class='add'>+				       len, ctx);</div><div class='ctx'> 		/* No point in recycling if we didn't get the skb */</div><div class='ctx'> 		if (skb) {</div><div class='ctx'> 			/* Make sure that the page isn't freed. */</div><div class='hunk'>@@ -680,7 +686,7 @@ static struct sk_buff *gve_rx_skb(struct gve_priv *priv, struct gve_rx_ring *rx,</div><div class='ctx'> 			skb = gve_rx_raw_addressing(&amp;priv-&gt;pdev-&gt;dev, netdev,</div><div class='ctx'> 						    page_info, len, napi,</div><div class='ctx'> 						    data_slot,</div><div class='del'>-						    rx-&gt;packet_buffer_size, ctx);</div><div class='add'>+						    page_info-&gt;buf_size, ctx);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			skb = gve_rx_qpl(&amp;priv-&gt;pdev-&gt;dev, netdev, rx,</div><div class='ctx'> 					 page_info, len, napi, data_slot);</div><div class='hunk'>@@ -855,7 +861,7 @@ static void gve_rx(struct gve_rx_ring *rx, netdev_features_t feat,</div><div class='ctx'> 		void *old_data;</div><div class='ctx'> 		int xdp_act;</div><div class='ctx'> </div><div class='del'>-		xdp_init_buff(&amp;xdp, rx-&gt;packet_buffer_size, &amp;rx-&gt;xdp_rxq);</div><div class='add'>+		xdp_init_buff(&amp;xdp, page_info-&gt;buf_size, &amp;rx-&gt;xdp_rxq);</div><div class='ctx'> 		xdp_prepare_buff(&amp;xdp, page_info-&gt;page_address +</div><div class='ctx'> 				 page_info-&gt;page_offset, GVE_RX_PAD,</div><div class='ctx'> 				 len, false);</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_rx_dqo.c b/drivers/net/ethernet/google/gve/gve_rx_dqo.c<br/>index 8ac0047f1ada..f1bd8f5d5732 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_rx_dqo.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_rx_dqo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_rx_dqo.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_rx_dqo.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include "gve_dqo.h"</div><div class='ctx'> #include "gve_adminq.h"</div><div class='ctx'> #include "gve_utils.h"</div><div class='add'>+#include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/ip.h&gt;</div><div class='ctx'> #include &lt;linux/ipv6.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='hunk'>@@ -15,6 +16,7 @@</div><div class='ctx'> #include &lt;net/ip6_checksum.h&gt;</div><div class='ctx'> #include &lt;net/ipv6.h&gt;</div><div class='ctx'> #include &lt;net/tcp.h&gt;</div><div class='add'>+#include &lt;net/xdp_sock_drv.h&gt;</div><div class='ctx'> </div><div class='ctx'> static void gve_rx_free_hdr_bufs(struct gve_priv *priv, struct gve_rx_ring *rx)</div><div class='ctx'> {</div><div class='hunk'>@@ -109,10 +111,13 @@ static void gve_rx_reset_ring_dqo(struct gve_priv *priv, int idx)</div><div class='ctx'> void gve_rx_stop_ring_dqo(struct gve_priv *priv, int idx)</div><div class='ctx'> {</div><div class='ctx'> 	int ntfy_idx = gve_rx_idx_to_ntfy(priv, idx);</div><div class='add'>+	struct gve_rx_ring *rx = &amp;priv-&gt;rx[idx];</div><div class='ctx'> </div><div class='ctx'> 	if (!gve_rx_was_added_to_block(priv, idx))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (rx-&gt;dqo.page_pool)</div><div class='add'>+		page_pool_disable_direct_recycling(rx-&gt;dqo.page_pool);</div><div class='ctx'> 	gve_remove_napi(priv, ntfy_idx);</div><div class='ctx'> 	gve_rx_remove_from_block(priv, idx);</div><div class='ctx'> 	gve_rx_reset_ring_dqo(priv, idx);</div><div class='hunk'>@@ -145,6 +150,10 @@ void gve_rx_free_ring_dqo(struct gve_priv *priv, struct gve_rx_ring *rx,</div><div class='ctx'> 			gve_free_to_page_pool(rx, bs, false);</div><div class='ctx'> 		else</div><div class='ctx'> 			gve_free_qpl_page_dqo(bs);</div><div class='add'>+		if (gve_buf_state_is_allocated(rx, bs) &amp;&amp; bs-&gt;xsk_buff) {</div><div class='add'>+			xsk_buff_free(bs-&gt;xsk_buff);</div><div class='add'>+			bs-&gt;xsk_buff = NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rx-&gt;dqo.qpl) {</div><div class='hunk'>@@ -221,12 +230,26 @@ int gve_rx_alloc_ring_dqo(struct gve_priv *priv,</div><div class='ctx'> 	memset(rx, 0, sizeof(*rx));</div><div class='ctx'> 	rx-&gt;gve = priv;</div><div class='ctx'> 	rx-&gt;q_num = idx;</div><div class='add'>+	rx-&gt;packet_buffer_size = cfg-&gt;packet_buffer_size;</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;xdp) {</div><div class='add'>+		rx-&gt;packet_buffer_truesize = GVE_XDP_RX_BUFFER_SIZE_DQO;</div><div class='add'>+		rx-&gt;rx_headroom = XDP_PACKET_HEADROOM;</div><div class='add'>+	} else {</div><div class='add'>+		rx-&gt;packet_buffer_truesize = rx-&gt;packet_buffer_size;</div><div class='add'>+		rx-&gt;rx_headroom = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* struct gve_xdp_buff is overlaid on struct xdp_buff_xsk and utilizes</div><div class='add'>+	 * the 24 byte field cb to store gve specific data.</div><div class='add'>+	 */</div><div class='add'>+	XSK_CHECK_PRIV_TYPE(struct gve_xdp_buff);</div><div class='ctx'> </div><div class='ctx'> 	rx-&gt;dqo.num_buf_states = cfg-&gt;raw_addressing ? buffer_queue_slots :</div><div class='ctx'> 		gve_get_rx_pages_per_qpl_dqo(cfg-&gt;ring_size);</div><div class='del'>-	rx-&gt;dqo.buf_states = kvcalloc(rx-&gt;dqo.num_buf_states,</div><div class='del'>-				      sizeof(rx-&gt;dqo.buf_states[0]),</div><div class='del'>-				      GFP_KERNEL);</div><div class='add'>+	rx-&gt;dqo.buf_states = kvcalloc_node(rx-&gt;dqo.num_buf_states,</div><div class='add'>+					   sizeof(rx-&gt;dqo.buf_states[0]),</div><div class='add'>+					   GFP_KERNEL, priv-&gt;numa_node);</div><div class='ctx'> 	if (!rx-&gt;dqo.buf_states)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -251,7 +274,7 @@ int gve_rx_alloc_ring_dqo(struct gve_priv *priv,</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='ctx'> 	if (cfg-&gt;raw_addressing) {</div><div class='del'>-		pool = gve_rx_create_page_pool(priv, rx);</div><div class='add'>+		pool = gve_rx_create_page_pool(priv, rx, cfg-&gt;xdp);</div><div class='ctx'> 		if (IS_ERR(pool))</div><div class='ctx'> 			goto err;</div><div class='ctx'> </div><div class='hunk'>@@ -297,12 +320,12 @@ int gve_rx_alloc_rings_dqo(struct gve_priv *priv,</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	rx = kvcalloc(cfg-&gt;qcfg-&gt;max_queues, sizeof(struct gve_rx_ring),</div><div class='add'>+	rx = kvcalloc(cfg-&gt;qcfg_rx-&gt;max_queues, sizeof(struct gve_rx_ring),</div><div class='ctx'> 		      GFP_KERNEL);</div><div class='ctx'> 	if (!rx)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; cfg-&gt;qcfg-&gt;num_queues; i++) {</div><div class='add'>+	for (i = 0; i &lt; cfg-&gt;qcfg_rx-&gt;num_queues; i++) {</div><div class='ctx'> 		err = gve_rx_alloc_ring_dqo(priv, cfg, &amp;rx[i], i);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			netif_err(priv, drv, priv-&gt;dev,</div><div class='hunk'>@@ -331,7 +354,7 @@ void gve_rx_free_rings_dqo(struct gve_priv *priv,</div><div class='ctx'> 	if (!rx)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; cfg-&gt;qcfg-&gt;num_queues;  i++)</div><div class='add'>+	for (i = 0; i &lt; cfg-&gt;qcfg_rx-&gt;num_queues;  i++)</div><div class='ctx'> 		gve_rx_free_ring_dqo(priv, &amp;rx[i], cfg);</div><div class='ctx'> </div><div class='ctx'> 	kvfree(rx);</div><div class='hunk'>@@ -425,6 +448,53 @@ static void gve_rx_skb_hash(struct sk_buff *skb,</div><div class='ctx'> 	skb_set_hash(skb, le32_to_cpu(compl_desc-&gt;hash), hash_type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Expand the hardware timestamp to the full 64 bits of width, and add it to the</div><div class='add'>+ * skb.</div><div class='add'>+ *</div><div class='add'>+ * This algorithm works by using the passed hardware timestamp to generate a</div><div class='add'>+ * diff relative to the last read of the nic clock. This diff can be positive or</div><div class='add'>+ * negative, as it is possible that we have read the clock more recently than</div><div class='add'>+ * the hardware has received this packet. To detect this, we use the high bit of</div><div class='add'>+ * the diff, and assume that the read is more recent if the high bit is set. In</div><div class='add'>+ * this case we invert the process.</div><div class='add'>+ *</div><div class='add'>+ * Note that this means if the time delta between packet reception and the last</div><div class='add'>+ * clock read is greater than ~2 seconds, this will provide invalid results.</div><div class='add'>+ */</div><div class='add'>+static ktime_t gve_rx_get_hwtstamp(struct gve_priv *gve, u32 hwts)</div><div class='add'>+{</div><div class='add'>+	u64 last_read = READ_ONCE(gve-&gt;last_sync_nic_counter);</div><div class='add'>+	u32 low = (u32)last_read;</div><div class='add'>+	s32 diff = hwts - low;</div><div class='add'>+</div><div class='add'>+	return ns_to_ktime(last_read + diff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gve_rx_skb_hwtstamp(struct gve_rx_ring *rx,</div><div class='add'>+				const struct gve_rx_compl_desc_dqo *desc)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb = rx-&gt;ctx.skb_head;</div><div class='add'>+</div><div class='add'>+	if (desc-&gt;ts_sub_nsecs_low &amp; GVE_DQO_RX_HWTSTAMP_VALID)</div><div class='add'>+		skb_hwtstamps(skb)-&gt;hwtstamp =</div><div class='add'>+			gve_rx_get_hwtstamp(rx-&gt;gve, le32_to_cpu(desc-&gt;ts));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int gve_xdp_rx_timestamp(const struct xdp_md *_ctx, u64 *timestamp)</div><div class='add'>+{</div><div class='add'>+	const struct gve_xdp_buff *ctx = (void *)_ctx;</div><div class='add'>+</div><div class='add'>+	if (!ctx-&gt;gve-&gt;nic_ts_report)</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	if (!(ctx-&gt;compl_desc-&gt;ts_sub_nsecs_low &amp; GVE_DQO_RX_HWTSTAMP_VALID))</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	*timestamp = gve_rx_get_hwtstamp(ctx-&gt;gve,</div><div class='add'>+					 le32_to_cpu(ctx-&gt;compl_desc-&gt;ts));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void gve_rx_free_skb(struct napi_struct *napi, struct gve_rx_ring *rx)</div><div class='ctx'> {</div><div class='ctx'> 	if (!rx-&gt;ctx.skb_head)</div><div class='hunk'>@@ -452,7 +522,7 @@ static int gve_rx_copy_ondemand(struct gve_rx_ring *rx,</div><div class='ctx'> 				struct gve_rx_buf_state_dqo *buf_state,</div><div class='ctx'> 				u16 buf_len)</div><div class='ctx'> {</div><div class='del'>-	struct page *page = alloc_page(GFP_ATOMIC);</div><div class='add'>+	struct page *page = alloc_pages_node(rx-&gt;gve-&gt;numa_node, GFP_ATOMIC, 0);</div><div class='ctx'> 	int num_frags;</div><div class='ctx'> </div><div class='ctx'> 	if (!page)</div><div class='hunk'>@@ -474,6 +544,25 @@ static int gve_rx_copy_ondemand(struct gve_rx_ring *rx,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void gve_skb_add_rx_frag(struct gve_rx_ring *rx,</div><div class='add'>+				struct gve_rx_buf_state_dqo *buf_state,</div><div class='add'>+				int num_frags, u16 buf_len)</div><div class='add'>+{</div><div class='add'>+	if (rx-&gt;dqo.page_pool) {</div><div class='add'>+		skb_add_rx_frag_netmem(rx-&gt;ctx.skb_tail, num_frags,</div><div class='add'>+				       buf_state-&gt;page_info.netmem,</div><div class='add'>+				       buf_state-&gt;page_info.page_offset +</div><div class='add'>+				       buf_state-&gt;page_info.pad, buf_len,</div><div class='add'>+				       buf_state-&gt;page_info.buf_size);</div><div class='add'>+	} else {</div><div class='add'>+		skb_add_rx_frag(rx-&gt;ctx.skb_tail, num_frags,</div><div class='add'>+				buf_state-&gt;page_info.page,</div><div class='add'>+				buf_state-&gt;page_info.page_offset +</div><div class='add'>+				buf_state-&gt;page_info.pad, buf_len,</div><div class='add'>+				buf_state-&gt;page_info.buf_size);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Chains multi skbs for single rx packet.</div><div class='ctx'>  * Returns 0 if buffer is appended, -1 otherwise.</div><div class='ctx'>  */</div><div class='hunk'>@@ -511,14 +600,178 @@ static int gve_rx_append_frags(struct napi_struct *napi,</div><div class='ctx'> 	if (gve_rx_should_trigger_copy_ondemand(rx))</div><div class='ctx'> 		return gve_rx_copy_ondemand(rx, buf_state, buf_len);</div><div class='ctx'> </div><div class='del'>-	skb_add_rx_frag(rx-&gt;ctx.skb_tail, num_frags,</div><div class='del'>-			buf_state-&gt;page_info.page,</div><div class='del'>-			buf_state-&gt;page_info.page_offset,</div><div class='del'>-			buf_len, buf_state-&gt;page_info.buf_size);</div><div class='add'>+	gve_skb_add_rx_frag(rx, buf_state, num_frags, buf_len);</div><div class='ctx'> 	gve_reuse_buffer(rx, buf_state);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gve_xdp_tx_dqo(struct gve_priv *priv, struct gve_rx_ring *rx,</div><div class='add'>+			  struct xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	struct gve_tx_ring *tx;</div><div class='add'>+	struct xdp_frame *xdpf;</div><div class='add'>+	u32 tx_qid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	xdpf = xdp_convert_buff_to_frame(xdp);</div><div class='add'>+	if (unlikely(!xdpf)) {</div><div class='add'>+		if (rx-&gt;xsk_pool)</div><div class='add'>+			xsk_buff_free(xdp);</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_qid = gve_xdp_tx_queue_id(priv, rx-&gt;q_num);</div><div class='add'>+	tx = &amp;priv-&gt;tx[tx_qid];</div><div class='add'>+	spin_lock(&amp;tx-&gt;dqo_tx.xdp_lock);</div><div class='add'>+	err = gve_xdp_xmit_one_dqo(priv, tx, xdpf);</div><div class='add'>+	spin_unlock(&amp;tx-&gt;dqo_tx.xdp_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gve_xsk_done_dqo(struct gve_priv *priv, struct gve_rx_ring *rx,</div><div class='add'>+			     struct xdp_buff *xdp, struct bpf_prog *xprog,</div><div class='add'>+			     int xdp_act)</div><div class='add'>+{</div><div class='add'>+	switch (xdp_act) {</div><div class='add'>+	case XDP_ABORTED:</div><div class='add'>+	case XDP_DROP:</div><div class='add'>+	default:</div><div class='add'>+		xsk_buff_free(xdp);</div><div class='add'>+		break;</div><div class='add'>+	case XDP_TX:</div><div class='add'>+		if (unlikely(gve_xdp_tx_dqo(priv, rx, xdp)))</div><div class='add'>+			goto err;</div><div class='add'>+		break;</div><div class='add'>+	case XDP_REDIRECT:</div><div class='add'>+		if (unlikely(xdp_do_redirect(priv-&gt;dev, xdp, xprog)))</div><div class='add'>+			goto err;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;rx-&gt;statss);</div><div class='add'>+	if ((u32)xdp_act &lt; GVE_XDP_ACTIONS)</div><div class='add'>+		rx-&gt;xdp_actions[xdp_act]++;</div><div class='add'>+	u64_stats_update_end(&amp;rx-&gt;statss);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	u64_stats_update_begin(&amp;rx-&gt;statss);</div><div class='add'>+	if (xdp_act == XDP_TX)</div><div class='add'>+		rx-&gt;xdp_tx_errors++;</div><div class='add'>+	if (xdp_act == XDP_REDIRECT)</div><div class='add'>+		rx-&gt;xdp_redirect_errors++;</div><div class='add'>+	u64_stats_update_end(&amp;rx-&gt;statss);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gve_xdp_done_dqo(struct gve_priv *priv, struct gve_rx_ring *rx,</div><div class='add'>+			     struct xdp_buff *xdp, struct bpf_prog *xprog,</div><div class='add'>+			     int xdp_act,</div><div class='add'>+			     struct gve_rx_buf_state_dqo *buf_state)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	switch (xdp_act) {</div><div class='add'>+	case XDP_ABORTED:</div><div class='add'>+	case XDP_DROP:</div><div class='add'>+	default:</div><div class='add'>+		gve_free_buffer(rx, buf_state);</div><div class='add'>+		break;</div><div class='add'>+	case XDP_TX:</div><div class='add'>+		err = gve_xdp_tx_dqo(priv, rx, xdp);</div><div class='add'>+		if (unlikely(err))</div><div class='add'>+			goto err;</div><div class='add'>+		gve_reuse_buffer(rx, buf_state);</div><div class='add'>+		break;</div><div class='add'>+	case XDP_REDIRECT:</div><div class='add'>+		err = xdp_do_redirect(priv-&gt;dev, xdp, xprog);</div><div class='add'>+		if (unlikely(err))</div><div class='add'>+			goto err;</div><div class='add'>+		gve_reuse_buffer(rx, buf_state);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	u64_stats_update_begin(&amp;rx-&gt;statss);</div><div class='add'>+	if ((u32)xdp_act &lt; GVE_XDP_ACTIONS)</div><div class='add'>+		rx-&gt;xdp_actions[xdp_act]++;</div><div class='add'>+	u64_stats_update_end(&amp;rx-&gt;statss);</div><div class='add'>+	return;</div><div class='add'>+err:</div><div class='add'>+	u64_stats_update_begin(&amp;rx-&gt;statss);</div><div class='add'>+	if (xdp_act == XDP_TX)</div><div class='add'>+		rx-&gt;xdp_tx_errors++;</div><div class='add'>+	else if (xdp_act == XDP_REDIRECT)</div><div class='add'>+		rx-&gt;xdp_redirect_errors++;</div><div class='add'>+	u64_stats_update_end(&amp;rx-&gt;statss);</div><div class='add'>+	gve_free_buffer(rx, buf_state);</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gve_rx_xsk_dqo(struct napi_struct *napi, struct gve_rx_ring *rx,</div><div class='add'>+			  const struct gve_rx_compl_desc_dqo *compl_desc,</div><div class='add'>+			  struct gve_rx_buf_state_dqo *buf_state,</div><div class='add'>+			  struct bpf_prog *xprog)</div><div class='add'>+{</div><div class='add'>+	struct xdp_buff *xdp = buf_state-&gt;xsk_buff;</div><div class='add'>+	int buf_len = compl_desc-&gt;packet_len;</div><div class='add'>+	struct gve_priv *priv = rx-&gt;gve;</div><div class='add'>+	struct gve_xdp_buff *gve_xdp;</div><div class='add'>+	int xdp_act;</div><div class='add'>+</div><div class='add'>+	xdp-&gt;data_end = xdp-&gt;data + buf_len;</div><div class='add'>+	xsk_buff_dma_sync_for_cpu(xdp);</div><div class='add'>+</div><div class='add'>+	gve_xdp = (void *)xdp;</div><div class='add'>+	gve_xdp-&gt;gve = priv;</div><div class='add'>+	gve_xdp-&gt;compl_desc = compl_desc;</div><div class='add'>+</div><div class='add'>+	if (xprog) {</div><div class='add'>+		xdp_act = bpf_prog_run_xdp(xprog, xdp);</div><div class='add'>+		buf_len = xdp-&gt;data_end - xdp-&gt;data;</div><div class='add'>+		if (xdp_act != XDP_PASS) {</div><div class='add'>+			gve_xsk_done_dqo(priv, rx, xdp, xprog, xdp_act);</div><div class='add'>+			gve_free_buf_state(rx, buf_state);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Copy the data to skb */</div><div class='add'>+	rx-&gt;ctx.skb_head = gve_rx_copy_data(priv-&gt;dev, napi,</div><div class='add'>+					    xdp-&gt;data, buf_len);</div><div class='add'>+	if (unlikely(!rx-&gt;ctx.skb_head)) {</div><div class='add'>+		xsk_buff_free(xdp);</div><div class='add'>+		gve_free_buf_state(rx, buf_state);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	rx-&gt;ctx.skb_tail = rx-&gt;ctx.skb_head;</div><div class='add'>+</div><div class='add'>+	/* Free XSK buffer and Buffer state */</div><div class='add'>+	xsk_buff_free(xdp);</div><div class='add'>+	gve_free_buf_state(rx, buf_state);</div><div class='add'>+</div><div class='add'>+	/* Update Stats */</div><div class='add'>+	u64_stats_update_begin(&amp;rx-&gt;statss);</div><div class='add'>+	rx-&gt;xdp_actions[XDP_PASS]++;</div><div class='add'>+	u64_stats_update_end(&amp;rx-&gt;statss);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gve_dma_sync(struct gve_priv *priv, struct gve_rx_ring *rx,</div><div class='add'>+			 struct gve_rx_buf_state_dqo *buf_state, u16 buf_len)</div><div class='add'>+{</div><div class='add'>+	struct gve_rx_slot_page_info *page_info = &amp;buf_state-&gt;page_info;</div><div class='add'>+</div><div class='add'>+	if (rx-&gt;dqo.page_pool) {</div><div class='add'>+		page_pool_dma_sync_netmem_for_cpu(rx-&gt;dqo.page_pool,</div><div class='add'>+						  page_info-&gt;netmem,</div><div class='add'>+						  page_info-&gt;page_offset,</div><div class='add'>+						  buf_len);</div><div class='add'>+	} else {</div><div class='add'>+		dma_sync_single_range_for_cpu(&amp;priv-&gt;pdev-&gt;dev, buf_state-&gt;addr,</div><div class='add'>+					      page_info-&gt;page_offset +</div><div class='add'>+					      page_info-&gt;pad,</div><div class='add'>+					      buf_len, DMA_FROM_DEVICE);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Returns 0 if descriptor is completed successfully.</div><div class='ctx'>  * Returns -EINVAL if descriptor is invalid.</div><div class='ctx'>  * Returns -ENOMEM if data cannot be copied to skb.</div><div class='hunk'>@@ -533,6 +786,7 @@ static int gve_rx_dqo(struct napi_struct *napi, struct gve_rx_ring *rx,</div><div class='ctx'> 	const bool hsplit = compl_desc-&gt;split_header;</div><div class='ctx'> 	struct gve_rx_buf_state_dqo *buf_state;</div><div class='ctx'> 	struct gve_priv *priv = rx-&gt;gve;</div><div class='add'>+	struct bpf_prog *xprog;</div><div class='ctx'> 	u16 buf_len;</div><div class='ctx'> 	u16 hdr_len;</div><div class='ctx'> </div><div class='hunk'>@@ -556,10 +810,19 @@ static int gve_rx_dqo(struct napi_struct *napi, struct gve_rx_ring *rx,</div><div class='ctx'> 	buf_len = compl_desc-&gt;packet_len;</div><div class='ctx'> 	hdr_len = compl_desc-&gt;header_len;</div><div class='ctx'> </div><div class='add'>+	xprog = READ_ONCE(priv-&gt;xdp_prog);</div><div class='add'>+	if (buf_state-&gt;xsk_buff)</div><div class='add'>+		return gve_rx_xsk_dqo(napi, rx, compl_desc, buf_state, xprog);</div><div class='add'>+</div><div class='ctx'> 	/* Page might have not been used for awhile and was likely last written</div><div class='ctx'> 	 * by a different thread.</div><div class='ctx'> 	 */</div><div class='del'>-	prefetch(buf_state-&gt;page_info.page);</div><div class='add'>+	if (rx-&gt;dqo.page_pool) {</div><div class='add'>+		if (!netmem_is_net_iov(buf_state-&gt;page_info.netmem))</div><div class='add'>+			prefetch(netmem_to_page(buf_state-&gt;page_info.netmem));</div><div class='add'>+	} else {</div><div class='add'>+		prefetch(buf_state-&gt;page_info.page);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Copy the header into the skb in the case of header split */</div><div class='ctx'> 	if (hsplit) {</div><div class='hunk'>@@ -584,12 +847,18 @@ static int gve_rx_dqo(struct napi_struct *napi, struct gve_rx_ring *rx,</div><div class='ctx'> 		rx-&gt;rx_hsplit_unsplit_pkt += unsplit;</div><div class='ctx'> 		rx-&gt;rx_hsplit_bytes += hdr_len;</div><div class='ctx'> 		u64_stats_update_end(&amp;rx-&gt;statss);</div><div class='add'>+	} else if (!rx-&gt;ctx.skb_head &amp;&amp; rx-&gt;dqo.page_pool &amp;&amp;</div><div class='add'>+		   netmem_is_net_iov(buf_state-&gt;page_info.netmem)) {</div><div class='add'>+		/* when header split is disabled, the header went to the packet</div><div class='add'>+		 * buffer. If the packet buffer is a net_iov, those can't be</div><div class='add'>+		 * easily mapped into the kernel space to access the header</div><div class='add'>+		 * required to process the packet.</div><div class='add'>+		 */</div><div class='add'>+		goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Sync the portion of dma buffer for CPU to read. */</div><div class='del'>-	dma_sync_single_range_for_cpu(&amp;priv-&gt;pdev-&gt;dev, buf_state-&gt;addr,</div><div class='del'>-				      buf_state-&gt;page_info.page_offset,</div><div class='del'>-				      buf_len, DMA_FROM_DEVICE);</div><div class='add'>+	gve_dma_sync(priv, rx, buf_state, buf_len);</div><div class='ctx'> </div><div class='ctx'> 	/* Append to current skb if one exists. */</div><div class='ctx'> 	if (rx-&gt;ctx.skb_head) {</div><div class='hunk'>@@ -600,7 +869,39 @@ static int gve_rx_dqo(struct napi_struct *napi, struct gve_rx_ring *rx,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (eop &amp;&amp; buf_len &lt;= priv-&gt;rx_copybreak) {</div><div class='add'>+	if (xprog) {</div><div class='add'>+		struct gve_xdp_buff gve_xdp;</div><div class='add'>+		void *old_data;</div><div class='add'>+		int xdp_act;</div><div class='add'>+</div><div class='add'>+		xdp_init_buff(&amp;gve_xdp.xdp, buf_state-&gt;page_info.buf_size,</div><div class='add'>+			      &amp;rx-&gt;xdp_rxq);</div><div class='add'>+		xdp_prepare_buff(&amp;gve_xdp.xdp,</div><div class='add'>+				 buf_state-&gt;page_info.page_address +</div><div class='add'>+				 buf_state-&gt;page_info.page_offset,</div><div class='add'>+				 buf_state-&gt;page_info.pad,</div><div class='add'>+				 buf_len, false);</div><div class='add'>+		gve_xdp.gve = priv;</div><div class='add'>+		gve_xdp.compl_desc = compl_desc;</div><div class='add'>+</div><div class='add'>+		old_data = gve_xdp.xdp.data;</div><div class='add'>+		xdp_act = bpf_prog_run_xdp(xprog, &amp;gve_xdp.xdp);</div><div class='add'>+		buf_state-&gt;page_info.pad += gve_xdp.xdp.data - old_data;</div><div class='add'>+		buf_len = gve_xdp.xdp.data_end - gve_xdp.xdp.data;</div><div class='add'>+		if (xdp_act != XDP_PASS) {</div><div class='add'>+			gve_xdp_done_dqo(priv, rx, &amp;gve_xdp.xdp, xprog, xdp_act,</div><div class='add'>+					 buf_state);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		u64_stats_update_begin(&amp;rx-&gt;statss);</div><div class='add'>+		rx-&gt;xdp_actions[XDP_PASS]++;</div><div class='add'>+		u64_stats_update_end(&amp;rx-&gt;statss);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (eop &amp;&amp; buf_len &lt;= priv-&gt;rx_copybreak &amp;&amp;</div><div class='add'>+	    !(rx-&gt;dqo.page_pool &amp;&amp;</div><div class='add'>+	      netmem_is_net_iov(buf_state-&gt;page_info.netmem))) {</div><div class='ctx'> 		rx-&gt;ctx.skb_head = gve_rx_copy(priv-&gt;dev, napi,</div><div class='ctx'> 					       &amp;buf_state-&gt;page_info, buf_len);</div><div class='ctx'> 		if (unlikely(!rx-&gt;ctx.skb_head))</div><div class='hunk'>@@ -630,9 +931,7 @@ static int gve_rx_dqo(struct napi_struct *napi, struct gve_rx_ring *rx,</div><div class='ctx'> 	if (rx-&gt;dqo.page_pool)</div><div class='ctx'> 		skb_mark_for_recycle(rx-&gt;ctx.skb_head);</div><div class='ctx'> </div><div class='del'>-	skb_add_rx_frag(rx-&gt;ctx.skb_head, 0, buf_state-&gt;page_info.page,</div><div class='del'>-			buf_state-&gt;page_info.page_offset, buf_len,</div><div class='del'>-			buf_state-&gt;page_info.buf_size);</div><div class='add'>+	gve_skb_add_rx_frag(rx, buf_state, 0, buf_len);</div><div class='ctx'> 	gve_reuse_buffer(rx, buf_state);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -683,6 +982,9 @@ static int gve_rx_complete_skb(struct gve_rx_ring *rx, struct napi_struct *napi,</div><div class='ctx'> 	if (feat &amp; NETIF_F_RXCSUM)</div><div class='ctx'> 		gve_rx_skb_csum(rx-&gt;ctx.skb_head, desc, ptype);</div><div class='ctx'> </div><div class='add'>+	if (rx-&gt;gve-&gt;ts_config.rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='add'>+		gve_rx_skb_hwtstamp(rx, desc);</div><div class='add'>+</div><div class='ctx'> 	/* RSC packets must set gso_size otherwise the TCP stack will complain</div><div class='ctx'> 	 * that packets are larger than MTU.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -702,16 +1004,27 @@ static int gve_rx_complete_skb(struct gve_rx_ring *rx, struct napi_struct *napi,</div><div class='ctx'> </div><div class='ctx'> int gve_rx_poll_dqo(struct gve_notify_block *block, int budget)</div><div class='ctx'> {</div><div class='del'>-	struct napi_struct *napi = &amp;block-&gt;napi;</div><div class='del'>-	netdev_features_t feat = napi-&gt;dev-&gt;features;</div><div class='del'>-</div><div class='del'>-	struct gve_rx_ring *rx = block-&gt;rx;</div><div class='del'>-	struct gve_rx_compl_queue_dqo *complq = &amp;rx-&gt;dqo.complq;</div><div class='del'>-</div><div class='add'>+	struct gve_rx_compl_queue_dqo *complq;</div><div class='add'>+	struct napi_struct *napi;</div><div class='add'>+	netdev_features_t feat;</div><div class='add'>+	struct gve_rx_ring *rx;</div><div class='add'>+	struct gve_priv *priv;</div><div class='add'>+	u64 xdp_redirects;</div><div class='ctx'> 	u32 work_done = 0;</div><div class='ctx'> 	u64 bytes = 0;</div><div class='add'>+	u64 xdp_txs;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	napi = &amp;block-&gt;napi;</div><div class='add'>+	feat = napi-&gt;dev-&gt;features;</div><div class='add'>+</div><div class='add'>+	rx = block-&gt;rx;</div><div class='add'>+	priv = rx-&gt;gve;</div><div class='add'>+	complq = &amp;rx-&gt;dqo.complq;</div><div class='add'>+</div><div class='add'>+	xdp_redirects = rx-&gt;xdp_actions[XDP_REDIRECT];</div><div class='add'>+	xdp_txs = rx-&gt;xdp_actions[XDP_TX];</div><div class='add'>+</div><div class='ctx'> 	while (work_done &lt; budget) {</div><div class='ctx'> 		struct gve_rx_compl_desc_dqo *compl_desc =</div><div class='ctx'> 			&amp;complq-&gt;desc_ring[complq-&gt;head];</div><div class='hunk'>@@ -785,6 +1098,12 @@ int gve_rx_poll_dqo(struct gve_notify_block *block, int budget)</div><div class='ctx'> 		rx-&gt;ctx.skb_tail = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (xdp_txs != rx-&gt;xdp_actions[XDP_TX])</div><div class='add'>+		gve_xdp_tx_flush_dqo(priv, rx-&gt;q_num);</div><div class='add'>+</div><div class='add'>+	if (xdp_redirects != rx-&gt;xdp_actions[XDP_REDIRECT])</div><div class='add'>+		xdp_do_flush();</div><div class='add'>+</div><div class='ctx'> 	gve_rx_post_buffers_dqo(rx);</div><div class='ctx'> </div><div class='ctx'> 	u64_stats_update_begin(&amp;rx-&gt;statss);</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_tx.c b/drivers/net/ethernet/google/gve/gve_tx.c<br/>index e7fb7d6d283d..97efc8d27e6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_tx.c</a></div><div class='hunk'>@@ -206,7 +206,10 @@ void gve_tx_stop_ring_gqi(struct gve_priv *priv, int idx)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	gve_remove_napi(priv, ntfy_idx);</div><div class='del'>-	gve_clean_tx_done(priv, tx, priv-&gt;tx_desc_cnt, false);</div><div class='add'>+	if (tx-&gt;q_num &lt; priv-&gt;tx_cfg.num_queues)</div><div class='add'>+		gve_clean_tx_done(priv, tx, priv-&gt;tx_desc_cnt, false);</div><div class='add'>+	else</div><div class='add'>+		gve_clean_xdp_done(priv, tx, priv-&gt;tx_desc_cnt);</div><div class='ctx'> 	netdev_tx_reset_queue(tx-&gt;netdev_txq);</div><div class='ctx'> 	gve_tx_remove_from_block(priv, idx);</div><div class='ctx'> }</div><div class='hunk'>@@ -331,27 +334,23 @@ int gve_tx_alloc_rings_gqi(struct gve_priv *priv,</div><div class='ctx'> 			   struct gve_tx_alloc_rings_cfg *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_tx_ring *tx = cfg-&gt;tx;</div><div class='add'>+	int total_queues;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='del'>-	if (cfg-&gt;start_idx + cfg-&gt;num_rings &gt; cfg-&gt;qcfg-&gt;max_queues) {</div><div class='add'>+	total_queues = cfg-&gt;qcfg-&gt;num_queues + cfg-&gt;num_xdp_rings;</div><div class='add'>+	if (total_queues &gt; cfg-&gt;qcfg-&gt;max_queues) {</div><div class='ctx'> 		netif_err(priv, drv, priv-&gt;dev,</div><div class='ctx'> 			  "Cannot alloc more than the max num of Tx rings\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cfg-&gt;start_idx == 0) {</div><div class='del'>-		tx = kvcalloc(cfg-&gt;qcfg-&gt;max_queues, sizeof(struct gve_tx_ring),</div><div class='del'>-			      GFP_KERNEL);</div><div class='del'>-		if (!tx)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-	} else if (!tx) {</div><div class='del'>-		netif_err(priv, drv, priv-&gt;dev,</div><div class='del'>-			  "Cannot alloc tx rings from a nonzero start idx without tx array\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	tx = kvcalloc(cfg-&gt;qcfg-&gt;max_queues, sizeof(struct gve_tx_ring),</div><div class='add'>+		      GFP_KERNEL);</div><div class='add'>+	if (!tx)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (i = cfg-&gt;start_idx; i &lt; cfg-&gt;start_idx + cfg-&gt;num_rings; i++) {</div><div class='add'>+	for (i = 0; i &lt; total_queues; i++) {</div><div class='ctx'> 		err = gve_tx_alloc_ring_gqi(priv, cfg, &amp;tx[i], i);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			netif_err(priv, drv, priv-&gt;dev,</div><div class='hunk'>@@ -367,8 +366,7 @@ int gve_tx_alloc_rings_gqi(struct gve_priv *priv,</div><div class='ctx'> cleanup:</div><div class='ctx'> 	for (j = 0; j &lt; i; j++)</div><div class='ctx'> 		gve_tx_free_ring_gqi(priv, &amp;tx[j], cfg);</div><div class='del'>-	if (cfg-&gt;start_idx == 0)</div><div class='del'>-		kvfree(tx);</div><div class='add'>+	kvfree(tx);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -381,13 +379,11 @@ void gve_tx_free_rings_gqi(struct gve_priv *priv,</div><div class='ctx'> 	if (!tx)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (i = cfg-&gt;start_idx; i &lt; cfg-&gt;start_idx + cfg-&gt;num_rings; i++)</div><div class='add'>+	for (i = 0; i &lt; cfg-&gt;qcfg-&gt;num_queues + cfg-&gt;qcfg-&gt;num_xdp_queues; i++)</div><div class='ctx'> 		gve_tx_free_ring_gqi(priv, &amp;tx[i], cfg);</div><div class='ctx'> </div><div class='del'>-	if (cfg-&gt;start_idx == 0) {</div><div class='del'>-		kvfree(tx);</div><div class='del'>-		cfg-&gt;tx = NULL;</div><div class='del'>-	}</div><div class='add'>+	kvfree(tx);</div><div class='add'>+	cfg-&gt;tx = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* gve_tx_avail - Calculates the number of slots available in the ring</div><div class='hunk'>@@ -734,7 +730,9 @@ unmap_drop:</div><div class='ctx'> 		gve_tx_unmap_buf(tx-&gt;dev, &amp;tx-&gt;info[idx &amp; tx-&gt;mask]);</div><div class='ctx'> 	}</div><div class='ctx'> drop:</div><div class='add'>+	u64_stats_update_begin(&amp;tx-&gt;statss);</div><div class='ctx'> 	tx-&gt;dropped_pkt++;</div><div class='add'>+	u64_stats_update_end(&amp;tx-&gt;statss);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -827,18 +825,21 @@ static int gve_tx_fill_xdp(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='ctx'> 	return ndescs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int gve_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='del'>-		 u32 flags)</div><div class='add'>+int gve_xdp_xmit_gqi(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='add'>+		     u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct gve_tx_ring *tx;</div><div class='ctx'> 	int i, err = 0, qid;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(flags &amp; ~XDP_XMIT_FLAGS_MASK))</div><div class='add'>+	if (unlikely(flags &amp; ~XDP_XMIT_FLAGS_MASK) || !priv-&gt;xdp_prog)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (!gve_get_napi_enabled(priv))</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='ctx'> 	qid = gve_xdp_tx_queue_id(priv,</div><div class='del'>-				  smp_processor_id() % priv-&gt;num_xdp_queues);</div><div class='add'>+				  smp_processor_id() % priv-&gt;tx_cfg.num_xdp_queues);</div><div class='ctx'> </div><div class='ctx'> 	tx = &amp;priv-&gt;tx[qid];</div><div class='ctx'> </div><div class='hunk'>@@ -953,14 +954,10 @@ static int gve_xsk_tx(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;tx-&gt;xdp_lock);</div><div class='ctx'> 	while (sent &lt; budget) {</div><div class='del'>-		if (!gve_can_tx(tx, GVE_TX_START_THRESH))</div><div class='add'>+		if (!gve_can_tx(tx, GVE_TX_START_THRESH) ||</div><div class='add'>+		    !xsk_tx_peek_desc(tx-&gt;xsk_pool, &amp;desc))</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='del'>-		if (!xsk_tx_peek_desc(tx-&gt;xsk_pool, &amp;desc)) {</div><div class='del'>-			tx-&gt;xdp_xsk_done = tx-&gt;xdp_xsk_wakeup;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		data = xsk_buff_raw_get_data(tx-&gt;xsk_pool, desc.addr);</div><div class='ctx'> 		nsegs = gve_tx_fill_xdp(priv, tx, data, desc.len, NULL, true);</div><div class='ctx'> 		tx-&gt;req += nsegs;</div><div class='hunk'>@@ -975,33 +972,41 @@ out:</div><div class='ctx'> 	return sent;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int gve_xsk_tx_poll(struct gve_notify_block *rx_block, int budget)</div><div class='add'>+{</div><div class='add'>+	struct gve_rx_ring *rx = rx_block-&gt;rx;</div><div class='add'>+	struct gve_priv *priv = rx-&gt;gve;</div><div class='add'>+	struct gve_tx_ring *tx;</div><div class='add'>+	int sent = 0;</div><div class='add'>+</div><div class='add'>+	tx = &amp;priv-&gt;tx[gve_xdp_tx_queue_id(priv, rx-&gt;q_num)];</div><div class='add'>+	if (tx-&gt;xsk_pool) {</div><div class='add'>+		sent = gve_xsk_tx(priv, tx, budget);</div><div class='add'>+</div><div class='add'>+		u64_stats_update_begin(&amp;tx-&gt;statss);</div><div class='add'>+		tx-&gt;xdp_xsk_sent += sent;</div><div class='add'>+		u64_stats_update_end(&amp;tx-&gt;statss);</div><div class='add'>+		if (xsk_uses_need_wakeup(tx-&gt;xsk_pool))</div><div class='add'>+			xsk_set_tx_need_wakeup(tx-&gt;xsk_pool);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sent;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool gve_xdp_poll(struct gve_notify_block *block, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_priv *priv = block-&gt;priv;</div><div class='ctx'> 	struct gve_tx_ring *tx = block-&gt;tx;</div><div class='ctx'> 	u32 nic_done;</div><div class='del'>-	bool repoll;</div><div class='ctx'> 	u32 to_do;</div><div class='ctx'> </div><div class='ctx'> 	/* Find out how much work there is to be done */</div><div class='ctx'> 	nic_done = gve_tx_load_event_counter(priv, tx);</div><div class='ctx'> 	to_do = min_t(u32, (nic_done - tx-&gt;done), budget);</div><div class='ctx'> 	gve_clean_xdp_done(priv, tx, to_do);</div><div class='del'>-	repoll = nic_done != tx-&gt;done;</div><div class='del'>-</div><div class='del'>-	if (tx-&gt;xsk_pool) {</div><div class='del'>-		int sent = gve_xsk_tx(priv, tx, budget);</div><div class='del'>-</div><div class='del'>-		u64_stats_update_begin(&amp;tx-&gt;statss);</div><div class='del'>-		tx-&gt;xdp_xsk_sent += sent;</div><div class='del'>-		u64_stats_update_end(&amp;tx-&gt;statss);</div><div class='del'>-		repoll |= (sent == budget);</div><div class='del'>-		if (xsk_uses_need_wakeup(tx-&gt;xsk_pool))</div><div class='del'>-			xsk_set_tx_need_wakeup(tx-&gt;xsk_pool);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* If we still have work we want to repoll */</div><div class='del'>-	return repoll;</div><div class='add'>+	return nic_done != tx-&gt;done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool gve_tx_poll(struct gve_notify_block *block, int budget)</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_tx_dqo.c b/drivers/net/ethernet/google/gve/gve_tx_dqo.c<br/>index f879426cb552..40b89b3e5a31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_tx_dqo.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_tx_dqo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_tx_dqo.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_tx_dqo.c</a></div><div class='hunk'>@@ -9,9 +9,11 @@</div><div class='ctx'> #include "gve_utils.h"</div><div class='ctx'> #include "gve_dqo.h"</div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='add'>+#include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/tcp.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;net/xdp_sock_drv.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Returns true if tx_bufs are available. */</div><div class='ctx'> static bool gve_has_free_tx_qpl_bufs(struct gve_tx_ring *tx, int count)</div><div class='hunk'>@@ -110,6 +112,14 @@ static bool gve_has_pending_packet(struct gve_tx_ring *tx)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void gve_xdp_tx_flush_dqo(struct gve_priv *priv, u32 xdp_qid)</div><div class='add'>+{</div><div class='add'>+	u32 tx_qid = gve_xdp_tx_queue_id(priv, xdp_qid);</div><div class='add'>+	struct gve_tx_ring *tx = &amp;priv-&gt;tx[tx_qid];</div><div class='add'>+</div><div class='add'>+	gve_tx_put_doorbell_dqo(priv, tx-&gt;q_resources, tx-&gt;dqo_tx.tail);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct gve_tx_pending_packet_dqo *</div><div class='ctx'> gve_alloc_pending_packet(struct gve_tx_ring *tx)</div><div class='ctx'> {</div><div class='hunk'>@@ -198,7 +208,8 @@ void gve_tx_stop_ring_dqo(struct gve_priv *priv, int idx)</div><div class='ctx'> </div><div class='ctx'> 	gve_remove_napi(priv, ntfy_idx);</div><div class='ctx'> 	gve_clean_tx_done_dqo(priv, tx, /*napi=*/NULL);</div><div class='del'>-	netdev_tx_reset_queue(tx-&gt;netdev_txq);</div><div class='add'>+	if (tx-&gt;netdev_txq)</div><div class='add'>+		netdev_tx_reset_queue(tx-&gt;netdev_txq);</div><div class='ctx'> 	gve_tx_clean_pending_packets(tx);</div><div class='ctx'> 	gve_tx_remove_from_block(priv, idx);</div><div class='ctx'> }</div><div class='hunk'>@@ -231,6 +242,9 @@ static void gve_tx_free_ring_dqo(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='ctx'> 		tx-&gt;dqo.tx_ring = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kvfree(tx-&gt;dqo.xsk_reorder_queue);</div><div class='add'>+	tx-&gt;dqo.xsk_reorder_queue = NULL;</div><div class='add'>+</div><div class='ctx'> 	kvfree(tx-&gt;dqo.pending_packets);</div><div class='ctx'> 	tx-&gt;dqo.pending_packets = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -276,7 +290,8 @@ void gve_tx_start_ring_dqo(struct gve_priv *priv, int idx)</div><div class='ctx'> </div><div class='ctx'> 	gve_tx_add_to_block(priv, idx);</div><div class='ctx'> </div><div class='del'>-	tx-&gt;netdev_txq = netdev_get_tx_queue(priv-&gt;dev, idx);</div><div class='add'>+	if (idx &lt; priv-&gt;tx_cfg.num_queues)</div><div class='add'>+		tx-&gt;netdev_txq = netdev_get_tx_queue(priv-&gt;dev, idx);</div><div class='ctx'> 	gve_add_napi(priv, ntfy_idx, gve_napi_poll_dqo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -295,6 +310,7 @@ static int gve_tx_alloc_ring_dqo(struct gve_priv *priv,</div><div class='ctx'> 	memset(tx, 0, sizeof(*tx));</div><div class='ctx'> 	tx-&gt;q_num = idx;</div><div class='ctx'> 	tx-&gt;dev = hdev;</div><div class='add'>+	spin_lock_init(&amp;tx-&gt;dqo_tx.xdp_lock);</div><div class='ctx'> 	atomic_set_release(&amp;tx-&gt;dqo_compl.hw_tx_head, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Queue sizes must be a power of 2 */</div><div class='hunk'>@@ -333,6 +349,17 @@ static int gve_tx_alloc_ring_dqo(struct gve_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	tx-&gt;dqo.pending_packets[tx-&gt;dqo.num_pending_packets - 1].next = -1;</div><div class='ctx'> 	atomic_set_release(&amp;tx-&gt;dqo_compl.free_pending_packets, -1);</div><div class='add'>+</div><div class='add'>+	/* Only alloc xsk pool for XDP queues */</div><div class='add'>+	if (idx &gt;= cfg-&gt;qcfg-&gt;num_queues &amp;&amp; cfg-&gt;num_xdp_rings) {</div><div class='add'>+		tx-&gt;dqo.xsk_reorder_queue =</div><div class='add'>+			kvcalloc(tx-&gt;dqo.complq_mask + 1,</div><div class='add'>+				 sizeof(tx-&gt;dqo.xsk_reorder_queue[0]),</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+		if (!tx-&gt;dqo.xsk_reorder_queue)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	tx-&gt;dqo_compl.miss_completions.head = -1;</div><div class='ctx'> 	tx-&gt;dqo_compl.miss_completions.tail = -1;</div><div class='ctx'> 	tx-&gt;dqo_compl.timed_out_completions.head = -1;</div><div class='hunk'>@@ -379,27 +406,23 @@ int gve_tx_alloc_rings_dqo(struct gve_priv *priv,</div><div class='ctx'> 			   struct gve_tx_alloc_rings_cfg *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_tx_ring *tx = cfg-&gt;tx;</div><div class='add'>+	int total_queues;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='del'>-	if (cfg-&gt;start_idx + cfg-&gt;num_rings &gt; cfg-&gt;qcfg-&gt;max_queues) {</div><div class='add'>+	total_queues = cfg-&gt;qcfg-&gt;num_queues + cfg-&gt;num_xdp_rings;</div><div class='add'>+	if (total_queues &gt; cfg-&gt;qcfg-&gt;max_queues) {</div><div class='ctx'> 		netif_err(priv, drv, priv-&gt;dev,</div><div class='ctx'> 			  "Cannot alloc more than the max num of Tx rings\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cfg-&gt;start_idx == 0) {</div><div class='del'>-		tx = kvcalloc(cfg-&gt;qcfg-&gt;max_queues, sizeof(struct gve_tx_ring),</div><div class='del'>-			      GFP_KERNEL);</div><div class='del'>-		if (!tx)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-	} else if (!tx) {</div><div class='del'>-		netif_err(priv, drv, priv-&gt;dev,</div><div class='del'>-			  "Cannot alloc tx rings from a nonzero start idx without tx array\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	tx = kvcalloc(cfg-&gt;qcfg-&gt;max_queues, sizeof(struct gve_tx_ring),</div><div class='add'>+		      GFP_KERNEL);</div><div class='add'>+	if (!tx)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (i = cfg-&gt;start_idx; i &lt; cfg-&gt;start_idx + cfg-&gt;num_rings; i++) {</div><div class='add'>+	for (i = 0; i &lt; total_queues; i++) {</div><div class='ctx'> 		err = gve_tx_alloc_ring_dqo(priv, cfg, &amp;tx[i], i);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			netif_err(priv, drv, priv-&gt;dev,</div><div class='hunk'>@@ -415,8 +438,7 @@ int gve_tx_alloc_rings_dqo(struct gve_priv *priv,</div><div class='ctx'> err:</div><div class='ctx'> 	for (j = 0; j &lt; i; j++)</div><div class='ctx'> 		gve_tx_free_ring_dqo(priv, &amp;tx[j], cfg);</div><div class='del'>-	if (cfg-&gt;start_idx == 0)</div><div class='del'>-		kvfree(tx);</div><div class='add'>+	kvfree(tx);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -429,13 +451,11 @@ void gve_tx_free_rings_dqo(struct gve_priv *priv,</div><div class='ctx'> 	if (!tx)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (i = cfg-&gt;start_idx; i &lt; cfg-&gt;start_idx + cfg-&gt;num_rings; i++)</div><div class='add'>+	for (i = 0; i &lt; cfg-&gt;qcfg-&gt;num_queues + cfg-&gt;qcfg-&gt;num_xdp_queues; i++)</div><div class='ctx'> 		gve_tx_free_ring_dqo(priv, &amp;tx[i], cfg);</div><div class='ctx'> </div><div class='del'>-	if (cfg-&gt;start_idx == 0) {</div><div class='del'>-		kvfree(tx);</div><div class='del'>-		cfg-&gt;tx = NULL;</div><div class='del'>-	}</div><div class='add'>+	kvfree(tx);</div><div class='add'>+	cfg-&gt;tx = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Returns the number of slots available in the ring */</div><div class='hunk'>@@ -446,12 +466,28 @@ static u32 num_avail_tx_slots(const struct gve_tx_ring *tx)</div><div class='ctx'> 	return tx-&gt;mask - num_used;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Checks if the requested number of slots are available in the ring */</div><div class='add'>+static bool gve_has_tx_slots_available(struct gve_tx_ring *tx, u32 slots_req)</div><div class='add'>+{</div><div class='add'>+	u32 num_avail = num_avail_tx_slots(tx);</div><div class='add'>+</div><div class='add'>+	slots_req += GVE_TX_MIN_DESC_PREVENT_CACHE_OVERLAP;</div><div class='add'>+</div><div class='add'>+	if (num_avail &gt;= slots_req)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/* Update cached TX head pointer */</div><div class='add'>+	tx-&gt;dqo_tx.head = atomic_read_acquire(&amp;tx-&gt;dqo_compl.hw_tx_head);</div><div class='add'>+</div><div class='add'>+	return num_avail_tx_slots(tx) &gt;= slots_req;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool gve_has_avail_slots_tx_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> 				       int desc_count, int buf_count)</div><div class='ctx'> {</div><div class='ctx'> 	return gve_has_pending_packet(tx) &amp;&amp;</div><div class='del'>-		   num_avail_tx_slots(tx) &gt;= desc_count &amp;&amp;</div><div class='del'>-		   gve_has_free_tx_qpl_bufs(tx, buf_count);</div><div class='add'>+		gve_has_tx_slots_available(tx, desc_count) &amp;&amp;</div><div class='add'>+		gve_has_free_tx_qpl_bufs(tx, buf_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Stops the queue if available descriptors is less than 'count'.</div><div class='hunk'>@@ -463,12 +499,6 @@ static int gve_maybe_stop_tx_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> 	if (likely(gve_has_avail_slots_tx_dqo(tx, desc_count, buf_count)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* Update cached TX head pointer */</div><div class='del'>-	tx-&gt;dqo_tx.head = atomic_read_acquire(&amp;tx-&gt;dqo_compl.hw_tx_head);</div><div class='del'>-</div><div class='del'>-	if (likely(gve_has_avail_slots_tx_dqo(tx, desc_count, buf_count)))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	/* No space, so stop the queue */</div><div class='ctx'> 	tx-&gt;stop_queue++;</div><div class='ctx'> 	netif_tx_stop_queue(tx-&gt;netdev_txq);</div><div class='hunk'>@@ -479,8 +509,6 @@ static int gve_maybe_stop_tx_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> 	/* After stopping queue, check if we can transmit again in order to</div><div class='ctx'> 	 * avoid TOCTOU bug.</div><div class='ctx'> 	 */</div><div class='del'>-	tx-&gt;dqo_tx.head = atomic_read_acquire(&amp;tx-&gt;dqo_compl.hw_tx_head);</div><div class='del'>-</div><div class='ctx'> 	if (likely(!gve_has_avail_slots_tx_dqo(tx, desc_count, buf_count)))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='hunk'>@@ -507,11 +535,9 @@ static void gve_extract_tx_metadata_dqo(const struct sk_buff *skb,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gve_tx_fill_pkt_desc_dqo(struct gve_tx_ring *tx, u32 *desc_idx,</div><div class='del'>-				     struct sk_buff *skb, u32 len, u64 addr,</div><div class='add'>+				     bool enable_csum, u32 len, u64 addr,</div><div class='ctx'> 				     s16 compl_tag, bool eop, bool is_gso)</div><div class='ctx'> {</div><div class='del'>-	const bool checksum_offload_en = skb-&gt;ip_summed == CHECKSUM_PARTIAL;</div><div class='del'>-</div><div class='ctx'> 	while (len &gt; 0) {</div><div class='ctx'> 		struct gve_tx_pkt_desc_dqo *desc =</div><div class='ctx'> 			&amp;tx-&gt;dqo.tx_ring[*desc_idx].pkt;</div><div class='hunk'>@@ -522,7 +548,7 @@ static void gve_tx_fill_pkt_desc_dqo(struct gve_tx_ring *tx, u32 *desc_idx,</div><div class='ctx'> 			.buf_addr = cpu_to_le64(addr),</div><div class='ctx'> 			.dtype = GVE_TX_PKT_DESC_DTYPE_DQO,</div><div class='ctx'> 			.end_of_packet = cur_eop,</div><div class='del'>-			.checksum_offload_enable = checksum_offload_en,</div><div class='add'>+			.checksum_offload_enable = enable_csum,</div><div class='ctx'> 			.compl_tag = cpu_to_le16(compl_tag),</div><div class='ctx'> 			.buf_size = cur_len,</div><div class='ctx'> 		};</div><div class='hunk'>@@ -619,6 +645,25 @@ gve_tx_fill_general_ctx_desc(struct gve_tx_general_context_desc_dqo *desc,</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void gve_tx_update_tail(struct gve_tx_ring *tx, u32 desc_idx)</div><div class='add'>+{</div><div class='add'>+	u32 last_desc_idx = (desc_idx - 1) &amp; tx-&gt;mask;</div><div class='add'>+	u32 last_report_event_interval =</div><div class='add'>+			(last_desc_idx - tx-&gt;dqo_tx.last_re_idx) &amp; tx-&gt;mask;</div><div class='add'>+</div><div class='add'>+	/* Commit the changes to our state */</div><div class='add'>+	tx-&gt;dqo_tx.tail = desc_idx;</div><div class='add'>+</div><div class='add'>+	/* Request a descriptor completion on the last descriptor of the</div><div class='add'>+	 * packet if we are allowed to by the HW enforced interval.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (unlikely(last_report_event_interval &gt;= GVE_TX_MIN_RE_INTERVAL)) {</div><div class='add'>+		tx-&gt;dqo.tx_ring[last_desc_idx].pkt.report_event = true;</div><div class='add'>+		tx-&gt;dqo_tx.last_re_idx = last_desc_idx;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int gve_tx_add_skb_no_copy_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> 				      struct sk_buff *skb,</div><div class='ctx'> 				      struct gve_tx_pending_packet_dqo *pkt,</div><div class='hunk'>@@ -626,6 +671,7 @@ static int gve_tx_add_skb_no_copy_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> 				      u32 *desc_idx,</div><div class='ctx'> 				      bool is_gso)</div><div class='ctx'> {</div><div class='add'>+	bool enable_csum = skb-&gt;ip_summed == CHECKSUM_PARTIAL;</div><div class='ctx'> 	const struct skb_shared_info *shinfo = skb_shinfo(skb);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -651,7 +697,7 @@ static int gve_tx_add_skb_no_copy_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> 		dma_unmap_addr_set(pkt, dma[pkt-&gt;num_bufs], addr);</div><div class='ctx'> 		++pkt-&gt;num_bufs;</div><div class='ctx'> </div><div class='del'>-		gve_tx_fill_pkt_desc_dqo(tx, desc_idx, skb, len, addr,</div><div class='add'>+		gve_tx_fill_pkt_desc_dqo(tx, desc_idx, enable_csum, len, addr,</div><div class='ctx'> 					 completion_tag,</div><div class='ctx'> 					 /*eop=*/shinfo-&gt;nr_frags == 0, is_gso);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -667,10 +713,11 @@ static int gve_tx_add_skb_no_copy_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> 			goto err;</div><div class='ctx'> </div><div class='ctx'> 		dma_unmap_len_set(pkt, len[pkt-&gt;num_bufs], len);</div><div class='del'>-		dma_unmap_addr_set(pkt, dma[pkt-&gt;num_bufs], addr);</div><div class='add'>+		netmem_dma_unmap_addr_set(skb_frag_netmem(frag), pkt,</div><div class='add'>+					  dma[pkt-&gt;num_bufs], addr);</div><div class='ctx'> 		++pkt-&gt;num_bufs;</div><div class='ctx'> </div><div class='del'>-		gve_tx_fill_pkt_desc_dqo(tx, desc_idx, skb, len, addr,</div><div class='add'>+		gve_tx_fill_pkt_desc_dqo(tx, desc_idx, enable_csum, len, addr,</div><div class='ctx'> 					 completion_tag, is_eop, is_gso);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -715,6 +762,7 @@ static int gve_tx_add_skb_copy_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> 				   u32 *desc_idx,</div><div class='ctx'> 				   bool is_gso)</div><div class='ctx'> {</div><div class='add'>+	bool enable_csum = skb-&gt;ip_summed == CHECKSUM_PARTIAL;</div><div class='ctx'> 	u32 copy_offset = 0;</div><div class='ctx'> 	dma_addr_t dma_addr;</div><div class='ctx'> 	u32 copy_len;</div><div class='hunk'>@@ -736,7 +784,7 @@ static int gve_tx_add_skb_copy_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> 		copy_offset += copy_len;</div><div class='ctx'> 		dma_sync_single_for_device(tx-&gt;dev, dma_addr,</div><div class='ctx'> 					   copy_len, DMA_TO_DEVICE);</div><div class='del'>-		gve_tx_fill_pkt_desc_dqo(tx, desc_idx, skb,</div><div class='add'>+		gve_tx_fill_pkt_desc_dqo(tx, desc_idx, enable_csum,</div><div class='ctx'> 					 copy_len,</div><div class='ctx'> 					 dma_addr,</div><div class='ctx'> 					 completion_tag,</div><div class='hunk'>@@ -770,7 +818,11 @@ static int gve_tx_add_skb_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> 	s16 completion_tag;</div><div class='ctx'> </div><div class='ctx'> 	pkt = gve_alloc_pending_packet(tx);</div><div class='add'>+	if (!pkt)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	pkt-&gt;skb = skb;</div><div class='add'>+	pkt-&gt;type = GVE_TX_PENDING_PACKET_DQO_SKB;</div><div class='ctx'> 	completion_tag = pkt - tx-&gt;dqo.pending_packets;</div><div class='ctx'> </div><div class='ctx'> 	gve_extract_tx_metadata_dqo(skb, &amp;metadata);</div><div class='hunk'>@@ -803,24 +855,7 @@ static int gve_tx_add_skb_dqo(struct gve_tx_ring *tx,</div><div class='ctx'> </div><div class='ctx'> 	tx-&gt;dqo_tx.posted_packet_desc_cnt += pkt-&gt;num_bufs;</div><div class='ctx'> </div><div class='del'>-	/* Commit the changes to our state */</div><div class='del'>-	tx-&gt;dqo_tx.tail = desc_idx;</div><div class='del'>-</div><div class='del'>-	/* Request a descriptor completion on the last descriptor of the</div><div class='del'>-	 * packet if we are allowed to by the HW enforced interval.</div><div class='del'>-	 */</div><div class='del'>-	{</div><div class='del'>-		u32 last_desc_idx = (desc_idx - 1) &amp; tx-&gt;mask;</div><div class='del'>-		u32 last_report_event_interval =</div><div class='del'>-			(last_desc_idx - tx-&gt;dqo_tx.last_re_idx) &amp; tx-&gt;mask;</div><div class='del'>-</div><div class='del'>-		if (unlikely(last_report_event_interval &gt;=</div><div class='del'>-			     GVE_TX_MIN_RE_INTERVAL)) {</div><div class='del'>-			tx-&gt;dqo.tx_ring[last_desc_idx].pkt.report_event = true;</div><div class='del'>-			tx-&gt;dqo_tx.last_re_idx = last_desc_idx;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	gve_tx_update_tail(tx, desc_idx);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='hunk'>@@ -954,9 +989,8 @@ static int gve_try_tx_skb(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='ctx'> </div><div class='ctx'> 	/* Metadata + (optional TSO) + data descriptors. */</div><div class='ctx'> 	total_num_descs = 1 + skb_is_gso(skb) + num_buffer_descs;</div><div class='del'>-	if (unlikely(gve_maybe_stop_tx_dqo(tx, total_num_descs +</div><div class='del'>-			GVE_TX_MIN_DESC_PREVENT_CACHE_OVERLAP,</div><div class='del'>-			num_buffer_descs))) {</div><div class='add'>+	if (unlikely(gve_maybe_stop_tx_dqo(tx, total_num_descs,</div><div class='add'>+					   num_buffer_descs))) {</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -968,11 +1002,45 @@ static int gve_try_tx_skb(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> drop:</div><div class='add'>+	u64_stats_update_begin(&amp;tx-&gt;statss);</div><div class='ctx'> 	tx-&gt;dropped_pkt++;</div><div class='add'>+	u64_stats_update_end(&amp;tx-&gt;statss);</div><div class='ctx'> 	dev_kfree_skb_any(skb);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void gve_xsk_reorder_queue_push_dqo(struct gve_tx_ring *tx,</div><div class='add'>+					   u16 completion_tag)</div><div class='add'>+{</div><div class='add'>+	u32 tail = atomic_read(&amp;tx-&gt;dqo_tx.xsk_reorder_queue_tail);</div><div class='add'>+</div><div class='add'>+	tx-&gt;dqo.xsk_reorder_queue[tail] = completion_tag;</div><div class='add'>+	tail = (tail + 1) &amp; tx-&gt;dqo.complq_mask;</div><div class='add'>+	atomic_set_release(&amp;tx-&gt;dqo_tx.xsk_reorder_queue_tail, tail);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct gve_tx_pending_packet_dqo *</div><div class='add'>+gve_xsk_reorder_queue_head(struct gve_tx_ring *tx)</div><div class='add'>+{</div><div class='add'>+	u32 head = tx-&gt;dqo_compl.xsk_reorder_queue_head;</div><div class='add'>+</div><div class='add'>+	if (head == tx-&gt;dqo_compl.xsk_reorder_queue_tail) {</div><div class='add'>+		tx-&gt;dqo_compl.xsk_reorder_queue_tail =</div><div class='add'>+			atomic_read_acquire(&amp;tx-&gt;dqo_tx.xsk_reorder_queue_tail);</div><div class='add'>+</div><div class='add'>+		if (head == tx-&gt;dqo_compl.xsk_reorder_queue_tail)</div><div class='add'>+			return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return &amp;tx-&gt;dqo.pending_packets[tx-&gt;dqo.xsk_reorder_queue[head]];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gve_xsk_reorder_queue_pop_dqo(struct gve_tx_ring *tx)</div><div class='add'>+{</div><div class='add'>+	tx-&gt;dqo_compl.xsk_reorder_queue_head++;</div><div class='add'>+	tx-&gt;dqo_compl.xsk_reorder_queue_head &amp;= tx-&gt;dqo.complq_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Transmit a given skb and ring the doorbell. */</div><div class='ctx'> netdev_tx_t gve_tx_dqo(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -996,6 +1064,62 @@ netdev_tx_t gve_tx_dqo(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool gve_xsk_tx_dqo(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='add'>+			   int budget)</div><div class='add'>+{</div><div class='add'>+	struct xsk_buff_pool *pool = tx-&gt;xsk_pool;</div><div class='add'>+	struct xdp_desc desc;</div><div class='add'>+	bool repoll = false;</div><div class='add'>+	int sent = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;tx-&gt;dqo_tx.xdp_lock);</div><div class='add'>+	for (; sent &lt; budget; sent++) {</div><div class='add'>+		struct gve_tx_pending_packet_dqo *pkt;</div><div class='add'>+		s16 completion_tag;</div><div class='add'>+		dma_addr_t addr;</div><div class='add'>+		u32 desc_idx;</div><div class='add'>+</div><div class='add'>+		if (unlikely(!gve_has_avail_slots_tx_dqo(tx, 1, 1))) {</div><div class='add'>+			repoll = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!xsk_tx_peek_desc(pool, &amp;desc))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		pkt = gve_alloc_pending_packet(tx);</div><div class='add'>+		pkt-&gt;type = GVE_TX_PENDING_PACKET_DQO_XSK;</div><div class='add'>+		pkt-&gt;num_bufs = 0;</div><div class='add'>+		completion_tag = pkt - tx-&gt;dqo.pending_packets;</div><div class='add'>+</div><div class='add'>+		addr = xsk_buff_raw_get_dma(pool, desc.addr);</div><div class='add'>+		xsk_buff_raw_dma_sync_for_device(pool, addr, desc.len);</div><div class='add'>+</div><div class='add'>+		desc_idx = tx-&gt;dqo_tx.tail;</div><div class='add'>+		gve_tx_fill_pkt_desc_dqo(tx, &amp;desc_idx,</div><div class='add'>+					 true, desc.len,</div><div class='add'>+					 addr, completion_tag, true,</div><div class='add'>+					 false);</div><div class='add'>+		++pkt-&gt;num_bufs;</div><div class='add'>+		gve_tx_update_tail(tx, desc_idx);</div><div class='add'>+		tx-&gt;dqo_tx.posted_packet_desc_cnt += pkt-&gt;num_bufs;</div><div class='add'>+		gve_xsk_reorder_queue_push_dqo(tx, completion_tag);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sent) {</div><div class='add'>+		gve_tx_put_doorbell_dqo(priv, tx-&gt;q_resources, tx-&gt;dqo_tx.tail);</div><div class='add'>+		xsk_tx_release(pool);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;tx-&gt;dqo_tx.xdp_lock);</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;tx-&gt;statss);</div><div class='add'>+	tx-&gt;xdp_xsk_sent += sent;</div><div class='add'>+	u64_stats_update_end(&amp;tx-&gt;statss);</div><div class='add'>+</div><div class='add'>+	return (sent == budget) || repoll;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void add_to_list(struct gve_tx_ring *tx, struct gve_index_list *list,</div><div class='ctx'> 			struct gve_tx_pending_packet_dqo *pending_packet)</div><div class='ctx'> {</div><div class='hunk'>@@ -1045,8 +1169,9 @@ static void gve_unmap_packet(struct device *dev,</div><div class='ctx'> 	dma_unmap_single(dev, dma_unmap_addr(pkt, dma[0]),</div><div class='ctx'> 			 dma_unmap_len(pkt, len[0]), DMA_TO_DEVICE);</div><div class='ctx'> 	for (i = 1; i &lt; pkt-&gt;num_bufs; i++) {</div><div class='del'>-		dma_unmap_page(dev, dma_unmap_addr(pkt, dma[i]),</div><div class='del'>-			       dma_unmap_len(pkt, len[i]), DMA_TO_DEVICE);</div><div class='add'>+		netmem_dma_unmap_page_attrs(dev, dma_unmap_addr(pkt, dma[i]),</div><div class='add'>+					    dma_unmap_len(pkt, len[i]),</div><div class='add'>+					    DMA_TO_DEVICE, 0);</div><div class='ctx'> 	}</div><div class='ctx'> 	pkt-&gt;num_bufs = 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1109,16 +1234,35 @@ static void gve_handle_packet_completion(struct gve_priv *priv,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	tx-&gt;dqo_tx.completed_packet_desc_cnt += pending_packet-&gt;num_bufs;</div><div class='del'>-	if (tx-&gt;dqo.qpl)</div><div class='del'>-		gve_free_tx_qpl_bufs(tx, pending_packet);</div><div class='del'>-	else</div><div class='add'>+</div><div class='add'>+	switch (pending_packet-&gt;type) {</div><div class='add'>+	case GVE_TX_PENDING_PACKET_DQO_SKB:</div><div class='add'>+		if (tx-&gt;dqo.qpl)</div><div class='add'>+			gve_free_tx_qpl_bufs(tx, pending_packet);</div><div class='add'>+		else</div><div class='add'>+			gve_unmap_packet(tx-&gt;dev, pending_packet);</div><div class='add'>+		(*pkts)++;</div><div class='add'>+		*bytes += pending_packet-&gt;skb-&gt;len;</div><div class='add'>+</div><div class='add'>+		napi_consume_skb(pending_packet-&gt;skb, is_napi);</div><div class='add'>+		pending_packet-&gt;skb = NULL;</div><div class='add'>+		gve_free_pending_packet(tx, pending_packet);</div><div class='add'>+		break;</div><div class='add'>+	case GVE_TX_PENDING_PACKET_DQO_XDP_FRAME:</div><div class='ctx'> 		gve_unmap_packet(tx-&gt;dev, pending_packet);</div><div class='add'>+		(*pkts)++;</div><div class='add'>+		*bytes += pending_packet-&gt;xdpf-&gt;len;</div><div class='ctx'> </div><div class='del'>-	*bytes += pending_packet-&gt;skb-&gt;len;</div><div class='del'>-	(*pkts)++;</div><div class='del'>-	napi_consume_skb(pending_packet-&gt;skb, is_napi);</div><div class='del'>-	pending_packet-&gt;skb = NULL;</div><div class='del'>-	gve_free_pending_packet(tx, pending_packet);</div><div class='add'>+		xdp_return_frame(pending_packet-&gt;xdpf);</div><div class='add'>+		pending_packet-&gt;xdpf = NULL;</div><div class='add'>+		gve_free_pending_packet(tx, pending_packet);</div><div class='add'>+		break;</div><div class='add'>+	case GVE_TX_PENDING_PACKET_DQO_XSK:</div><div class='add'>+		pending_packet-&gt;state = GVE_PACKET_STATE_XSK_COMPLETE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gve_handle_miss_completion(struct gve_priv *priv,</div><div class='hunk'>@@ -1146,8 +1290,7 @@ static void gve_handle_miss_completion(struct gve_priv *priv,</div><div class='ctx'> 	/* jiffies can wraparound but time comparisons can handle overflows. */</div><div class='ctx'> 	pending_packet-&gt;timeout_jiffies =</div><div class='ctx'> 			jiffies +</div><div class='del'>-			msecs_to_jiffies(GVE_REINJECT_COMPL_TIMEOUT *</div><div class='del'>-					 MSEC_PER_SEC);</div><div class='add'>+			secs_to_jiffies(GVE_REINJECT_COMPL_TIMEOUT);</div><div class='ctx'> 	add_to_list(tx, &amp;tx-&gt;dqo_compl.miss_completions, pending_packet);</div><div class='ctx'> </div><div class='ctx'> 	*bytes += pending_packet-&gt;skb-&gt;len;</div><div class='hunk'>@@ -1183,7 +1326,11 @@ static void remove_miss_completions(struct gve_priv *priv,</div><div class='ctx'> 		/* This indicates the packet was dropped. */</div><div class='ctx'> 		dev_kfree_skb_any(pending_packet-&gt;skb);</div><div class='ctx'> 		pending_packet-&gt;skb = NULL;</div><div class='add'>+</div><div class='add'>+		u64_stats_update_begin(&amp;tx-&gt;statss);</div><div class='ctx'> 		tx-&gt;dropped_pkt++;</div><div class='add'>+		u64_stats_update_end(&amp;tx-&gt;statss);</div><div class='add'>+</div><div class='ctx'> 		net_err_ratelimited("%s: No reinjection completion was received for: %d.\n",</div><div class='ctx'> 				    priv-&gt;dev-&gt;name,</div><div class='ctx'> 				    (int)(pending_packet - tx-&gt;dqo.pending_packets));</div><div class='hunk'>@@ -1191,8 +1338,7 @@ static void remove_miss_completions(struct gve_priv *priv,</div><div class='ctx'> 		pending_packet-&gt;state = GVE_PACKET_STATE_TIMED_OUT_COMPL;</div><div class='ctx'> 		pending_packet-&gt;timeout_jiffies =</div><div class='ctx'> 				jiffies +</div><div class='del'>-				msecs_to_jiffies(GVE_DEALLOCATE_COMPL_TIMEOUT *</div><div class='del'>-						 MSEC_PER_SEC);</div><div class='add'>+				secs_to_jiffies(GVE_DEALLOCATE_COMPL_TIMEOUT);</div><div class='ctx'> 		/* Maintain pending packet in another list so the packet can be</div><div class='ctx'> 		 * unallocated at a later time.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -1217,8 +1363,34 @@ static void remove_timed_out_completions(struct gve_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 		remove_from_list(tx, &amp;tx-&gt;dqo_compl.timed_out_completions,</div><div class='ctx'> 				 pending_packet);</div><div class='add'>+</div><div class='add'>+		/* Need to count XSK packets in xsk_tx_completed. */</div><div class='add'>+		if (pending_packet-&gt;type == GVE_TX_PENDING_PACKET_DQO_XSK)</div><div class='add'>+			pending_packet-&gt;state = GVE_PACKET_STATE_XSK_COMPLETE;</div><div class='add'>+		else</div><div class='add'>+			gve_free_pending_packet(tx, pending_packet);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gve_tx_process_xsk_completions(struct gve_tx_ring *tx)</div><div class='add'>+{</div><div class='add'>+	u32 num_xsks = 0;</div><div class='add'>+</div><div class='add'>+	while (true) {</div><div class='add'>+		struct gve_tx_pending_packet_dqo *pending_packet =</div><div class='add'>+			gve_xsk_reorder_queue_head(tx);</div><div class='add'>+</div><div class='add'>+		if (!pending_packet ||</div><div class='add'>+		    pending_packet-&gt;state != GVE_PACKET_STATE_XSK_COMPLETE)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		num_xsks++;</div><div class='add'>+		gve_xsk_reorder_queue_pop_dqo(tx);</div><div class='ctx'> 		gve_free_pending_packet(tx, pending_packet);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (num_xsks)</div><div class='add'>+		xsk_tx_completed(tx-&gt;xsk_pool, num_xsks);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int gve_clean_tx_done_dqo(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='hunk'>@@ -1291,13 +1463,17 @@ int gve_clean_tx_done_dqo(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='ctx'> 		num_descs_cleaned++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev_tx_completed_queue(tx-&gt;netdev_txq,</div><div class='del'>-				  pkt_compl_pkts + miss_compl_pkts,</div><div class='del'>-				  pkt_compl_bytes + miss_compl_bytes);</div><div class='add'>+	if (tx-&gt;netdev_txq)</div><div class='add'>+		netdev_tx_completed_queue(tx-&gt;netdev_txq,</div><div class='add'>+					  pkt_compl_pkts + miss_compl_pkts,</div><div class='add'>+					  pkt_compl_bytes + miss_compl_bytes);</div><div class='ctx'> </div><div class='ctx'> 	remove_miss_completions(priv, tx);</div><div class='ctx'> 	remove_timed_out_completions(priv, tx);</div><div class='ctx'> </div><div class='add'>+	if (tx-&gt;xsk_pool)</div><div class='add'>+		gve_tx_process_xsk_completions(tx);</div><div class='add'>+</div><div class='ctx'> 	u64_stats_update_begin(&amp;tx-&gt;statss);</div><div class='ctx'> 	tx-&gt;bytes_done += pkt_compl_bytes + reinject_compl_bytes;</div><div class='ctx'> 	tx-&gt;pkt_done += pkt_compl_pkts + reinject_compl_pkts;</div><div class='hunk'>@@ -1329,3 +1505,111 @@ bool gve_tx_poll_dqo(struct gve_notify_block *block, bool do_clean)</div><div class='ctx'> 	compl_desc = &amp;tx-&gt;dqo.compl_ring[tx-&gt;dqo_compl.head];</div><div class='ctx'> 	return compl_desc-&gt;generation != tx-&gt;dqo_compl.cur_gen_bit;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool gve_xsk_tx_poll_dqo(struct gve_notify_block *rx_block, int budget)</div><div class='add'>+{</div><div class='add'>+	struct gve_rx_ring *rx = rx_block-&gt;rx;</div><div class='add'>+	struct gve_priv *priv = rx-&gt;gve;</div><div class='add'>+	struct gve_tx_ring *tx;</div><div class='add'>+</div><div class='add'>+	tx = &amp;priv-&gt;tx[gve_xdp_tx_queue_id(priv, rx-&gt;q_num)];</div><div class='add'>+	if (tx-&gt;xsk_pool)</div><div class='add'>+		return gve_xsk_tx_dqo(priv, tx, budget);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool gve_xdp_poll_dqo(struct gve_notify_block *block)</div><div class='add'>+{</div><div class='add'>+	struct gve_tx_compl_desc *compl_desc;</div><div class='add'>+	struct gve_tx_ring *tx = block-&gt;tx;</div><div class='add'>+	struct gve_priv *priv = block-&gt;priv;</div><div class='add'>+</div><div class='add'>+	gve_clean_tx_done_dqo(priv, tx, &amp;block-&gt;napi);</div><div class='add'>+</div><div class='add'>+	/* Return true if we still have work. */</div><div class='add'>+	compl_desc = &amp;tx-&gt;dqo.compl_ring[tx-&gt;dqo_compl.head];</div><div class='add'>+	return compl_desc-&gt;generation != tx-&gt;dqo_compl.cur_gen_bit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int gve_xdp_xmit_one_dqo(struct gve_priv *priv, struct gve_tx_ring *tx,</div><div class='add'>+			 struct xdp_frame *xdpf)</div><div class='add'>+{</div><div class='add'>+	struct gve_tx_pending_packet_dqo *pkt;</div><div class='add'>+	u32 desc_idx = tx-&gt;dqo_tx.tail;</div><div class='add'>+	s16 completion_tag;</div><div class='add'>+	int num_descs = 1;</div><div class='add'>+	dma_addr_t addr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!gve_has_tx_slots_available(tx, num_descs)))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	pkt = gve_alloc_pending_packet(tx);</div><div class='add'>+	if (unlikely(!pkt))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	pkt-&gt;type = GVE_TX_PENDING_PACKET_DQO_XDP_FRAME;</div><div class='add'>+	pkt-&gt;num_bufs = 0;</div><div class='add'>+	pkt-&gt;xdpf = xdpf;</div><div class='add'>+	completion_tag = pkt - tx-&gt;dqo.pending_packets;</div><div class='add'>+</div><div class='add'>+	/* Generate Packet Descriptor */</div><div class='add'>+	addr = dma_map_single(tx-&gt;dev, xdpf-&gt;data, xdpf-&gt;len, DMA_TO_DEVICE);</div><div class='add'>+	err = dma_mapping_error(tx-&gt;dev, addr);</div><div class='add'>+	if (unlikely(err))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	dma_unmap_len_set(pkt, len[pkt-&gt;num_bufs], xdpf-&gt;len);</div><div class='add'>+	dma_unmap_addr_set(pkt, dma[pkt-&gt;num_bufs], addr);</div><div class='add'>+	pkt-&gt;num_bufs++;</div><div class='add'>+</div><div class='add'>+	gve_tx_fill_pkt_desc_dqo(tx, &amp;desc_idx,</div><div class='add'>+				 false, xdpf-&gt;len,</div><div class='add'>+				 addr, completion_tag, true,</div><div class='add'>+				 false);</div><div class='add'>+</div><div class='add'>+	gve_tx_update_tail(tx, desc_idx);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	pkt-&gt;xdpf = NULL;</div><div class='add'>+	pkt-&gt;num_bufs = 0;</div><div class='add'>+	gve_free_pending_packet(tx, pkt);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int gve_xdp_xmit_dqo(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='add'>+		     u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct gve_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct gve_tx_ring *tx;</div><div class='add'>+	int i, err = 0, qid;</div><div class='add'>+</div><div class='add'>+	if (unlikely(flags &amp; ~XDP_XMIT_FLAGS_MASK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	qid = gve_xdp_tx_queue_id(priv,</div><div class='add'>+				  smp_processor_id() % priv-&gt;tx_cfg.num_xdp_queues);</div><div class='add'>+</div><div class='add'>+	tx = &amp;priv-&gt;tx[qid];</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;tx-&gt;dqo_tx.xdp_lock);</div><div class='add'>+	for (i = 0; i &lt; n; i++) {</div><div class='add'>+		err = gve_xdp_xmit_one_dqo(priv, tx, frames[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; XDP_XMIT_FLUSH)</div><div class='add'>+		gve_tx_put_doorbell_dqo(priv, tx-&gt;q_resources, tx-&gt;dqo_tx.tail);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;tx-&gt;dqo_tx.xdp_lock);</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;tx-&gt;statss);</div><div class='add'>+	tx-&gt;xdp_xmit += n;</div><div class='add'>+	tx-&gt;xdp_xmit_errors += n - i;</div><div class='add'>+	u64_stats_update_end(&amp;tx-&gt;statss);</div><div class='add'>+</div><div class='add'>+	return i ? i : err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/google/gve/gve_utils.c b/drivers/net/ethernet/google/gve/gve_utils.c<br/>index 30fef100257e..ace9b8698021 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_utils.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/google/gve/gve_utils.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/google/gve/gve_utils.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/google/gve/gve_utils.c</a></div><div class='hunk'>@@ -110,13 +110,13 @@ void gve_add_napi(struct gve_priv *priv, int ntfy_idx,</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_notify_block *block = &amp;priv-&gt;ntfy_blocks[ntfy_idx];</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(priv-&gt;dev, &amp;block-&gt;napi, gve_poll);</div><div class='del'>-	netif_napi_set_irq(&amp;block-&gt;napi, block-&gt;irq);</div><div class='add'>+	netif_napi_add_locked(priv-&gt;dev, &amp;block-&gt;napi, gve_poll);</div><div class='add'>+	netif_napi_set_irq_locked(&amp;block-&gt;napi, block-&gt;irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void gve_remove_napi(struct gve_priv *priv, int ntfy_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct gve_notify_block *block = &amp;priv-&gt;ntfy_blocks[ntfy_idx];</div><div class='ctx'> </div><div class='del'>-	netif_napi_del(&amp;block-&gt;napi);</div><div class='add'>+	netif_napi_del_locked(&amp;block-&gt;napi);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/Kconfig b/drivers/net/ethernet/hisilicon/Kconfig<br/>index 65302c41bfb1..18eca7d12c20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/Kconfig</a></div><div class='hunk'>@@ -148,8 +148,10 @@ config HIBMCGE</div><div class='ctx'> 	tristate "Hisilicon BMC Gigabit Ethernet Device Support"</div><div class='ctx'> 	depends on PCI &amp;&amp; PCI_MSI</div><div class='ctx'> 	select PHYLIB</div><div class='add'>+	select FIXED_PHY</div><div class='ctx'> 	select MOTORCOMM_PHY</div><div class='ctx'> 	select REALTEK_PHY</div><div class='add'>+	select PAGE_POOL</div><div class='ctx'> 	help</div><div class='ctx'> 	  If you wish to compile a kernel for a BMC with HIBMC-xx_gmac</div><div class='ctx'> 	  then you should answer Y to this. This makes this driver suitable for use</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/Makefile b/drivers/net/ethernet/hisilicon/hibmcge/Makefile<br/>index ae58ac38c206..d6610ba16855 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/Makefile</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'> # Makefile for the HISILICON BMC GE network device drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+ccflags-y += -I$(src)</div><div class='ctx'> obj-$(CONFIG_HIBMCGE) += hibmcge.o</div><div class='ctx'> </div><div class='del'>-hibmcge-objs = hbg_main.o hbg_hw.o hbg_mdio.o hbg_irq.o hbg_txrx.o hbg_ethtool.o</div><div class='add'>+hibmcge-objs = hbg_main.o hbg_hw.o hbg_mdio.o hbg_irq.o hbg_txrx.o hbg_ethtool.o \</div><div class='add'>+		hbg_debugfs.o hbg_err.o hbg_diagnose.o</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h<br/>index 96daf058d387..8e134da3e217 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h</a></div><div class='hunk'>@@ -4,8 +4,10 @@</div><div class='ctx'> #ifndef __HBG_COMMON_H</div><div class='ctx'> #define __HBG_COMMON_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> #include "hbg_reg.h"</div><div class='ctx'> </div><div class='ctx'> #define HBG_STATUS_DISABLE		0x0</div><div class='hunk'>@@ -16,6 +18,7 @@</div><div class='ctx'> #define HBG_PCU_CACHE_LINE_SIZE		32</div><div class='ctx'> #define HBG_TX_TIMEOUT_BUF_LEN		1024</div><div class='ctx'> #define HBG_RX_DESCR			0x01</div><div class='add'>+#define HBG_NO_PHY			0xFF</div><div class='ctx'> </div><div class='ctx'> #define HBG_PACKET_HEAD_SIZE	((HBG_RX_SKIP1 + HBG_RX_SKIP2 + \</div><div class='ctx'> 				  HBG_RX_DESCR) * HBG_PCU_CACHE_LINE_SIZE)</div><div class='hunk'>@@ -33,6 +36,16 @@ enum hbg_tx_state {</div><div class='ctx'> </div><div class='ctx'> enum hbg_nic_state {</div><div class='ctx'> 	HBG_NIC_STATE_EVENT_HANDLING = 0,</div><div class='add'>+	HBG_NIC_STATE_RESETTING,</div><div class='add'>+	HBG_NIC_STATE_RESET_FAIL,</div><div class='add'>+	HBG_NIC_STATE_NEED_RESET, /* trigger a reset in scheduled task */</div><div class='add'>+	HBG_NIC_STATE_NP_LINK_FAIL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hbg_reset_type {</div><div class='add'>+	HBG_RESET_TYPE_NONE = 0,</div><div class='add'>+	HBG_RESET_TYPE_FLR,</div><div class='add'>+	HBG_RESET_TYPE_FUNCTION,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct hbg_buffer {</div><div class='hunk'>@@ -43,6 +56,12 @@ struct hbg_buffer {</div><div class='ctx'> 	dma_addr_t skb_dma;</div><div class='ctx'> 	u32 skb_len;</div><div class='ctx'> </div><div class='add'>+	struct page *page;</div><div class='add'>+	void *page_addr;</div><div class='add'>+	dma_addr_t page_dma;</div><div class='add'>+	u32 page_size;</div><div class='add'>+	u32 page_offset;</div><div class='add'>+</div><div class='ctx'> 	enum hbg_dir dir;</div><div class='ctx'> 	struct hbg_ring *ring;</div><div class='ctx'> 	struct hbg_priv *priv;</div><div class='hunk'>@@ -66,12 +85,14 @@ struct hbg_ring {</div><div class='ctx'> 	struct hbg_priv *priv;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	char *tout_log_buf; /* tx timeout log buffer */</div><div class='add'>+	struct page_pool *page_pool; /* only for rx */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum hbg_hw_event_type {</div><div class='ctx'> 	HBG_HW_EVENT_NONE = 0,</div><div class='ctx'> 	HBG_HW_EVENT_INIT, /* driver is loading */</div><div class='ctx'> 	HBG_HW_EVENT_RESET,</div><div class='add'>+	HBG_HW_EVENT_CORE_RESET,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct hbg_dev_specs {</div><div class='hunk'>@@ -84,6 +105,7 @@ struct hbg_dev_specs {</div><div class='ctx'> 	u32 vlan_layers;</div><div class='ctx'> 	u32 max_mtu;</div><div class='ctx'> 	u32 min_mtu;</div><div class='add'>+	u32 uc_mac_num;</div><div class='ctx'> </div><div class='ctx'> 	u32 max_frame_len;</div><div class='ctx'> 	u32 rx_buf_size;</div><div class='hunk'>@@ -94,14 +116,17 @@ struct hbg_irq_info {</div><div class='ctx'> 	u32 mask;</div><div class='ctx'> 	bool re_enable;</div><div class='ctx'> 	bool need_print;</div><div class='del'>-	u64 count;</div><div class='add'>+	bool need_reset;</div><div class='ctx'> </div><div class='del'>-	void (*irq_handle)(struct hbg_priv *priv, struct hbg_irq_info *info);</div><div class='add'>+	void (*irq_handle)(struct hbg_priv *priv,</div><div class='add'>+			   const struct hbg_irq_info *info);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct hbg_vector {</div><div class='ctx'> 	char name[HBG_VECTOR_NUM][32];</div><div class='del'>-	struct hbg_irq_info *info_array;</div><div class='add'>+</div><div class='add'>+	u64 *stats_array;</div><div class='add'>+	const struct hbg_irq_info *info_array;</div><div class='ctx'> 	u32 info_array_len;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -114,6 +139,135 @@ struct hbg_mac {</div><div class='ctx'> 	u32 duplex;</div><div class='ctx'> 	u32 autoneg;</div><div class='ctx'> 	u32 link_status;</div><div class='add'>+	u32 pause_autoneg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hbg_mac_table_entry {</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hbg_mac_filter {</div><div class='add'>+	struct hbg_mac_table_entry *mac_table;</div><div class='add'>+	u32 table_max_len;</div><div class='add'>+	bool enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* saved for restore after rest */</div><div class='add'>+struct hbg_user_def {</div><div class='add'>+	struct ethtool_pauseparam pause_param;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hbg_stats {</div><div class='add'>+	u64 rx_desc_drop;</div><div class='add'>+	u64 rx_desc_l2_err_cnt;</div><div class='add'>+	u64 rx_desc_pkt_len_err_cnt;</div><div class='add'>+	u64 rx_desc_l3l4_err_cnt;</div><div class='add'>+	u64 rx_desc_l3_wrong_head_cnt;</div><div class='add'>+	u64 rx_desc_l3_csum_err_cnt;</div><div class='add'>+	u64 rx_desc_l3_len_err_cnt;</div><div class='add'>+	u64 rx_desc_l3_zero_ttl_cnt;</div><div class='add'>+	u64 rx_desc_l3_other_cnt;</div><div class='add'>+	u64 rx_desc_l4_err_cnt;</div><div class='add'>+	u64 rx_desc_l4_wrong_head_cnt;</div><div class='add'>+	u64 rx_desc_l4_len_err_cnt;</div><div class='add'>+	u64 rx_desc_l4_csum_err_cnt;</div><div class='add'>+	u64 rx_desc_l4_zero_port_num_cnt;</div><div class='add'>+	u64 rx_desc_l4_other_cnt;</div><div class='add'>+	u64 rx_desc_frag_cnt;</div><div class='add'>+	u64 rx_desc_ip_ver_err_cnt;</div><div class='add'>+	u64 rx_desc_ipv4_pkt_cnt;</div><div class='add'>+	u64 rx_desc_ipv6_pkt_cnt;</div><div class='add'>+	u64 rx_desc_no_ip_pkt_cnt;</div><div class='add'>+	u64 rx_desc_ip_pkt_cnt;</div><div class='add'>+	u64 rx_desc_tcp_pkt_cnt;</div><div class='add'>+	u64 rx_desc_udp_pkt_cnt;</div><div class='add'>+	u64 rx_desc_vlan_pkt_cnt;</div><div class='add'>+	u64 rx_desc_icmp_pkt_cnt;</div><div class='add'>+	u64 rx_desc_arp_pkt_cnt;</div><div class='add'>+	u64 rx_desc_rarp_pkt_cnt;</div><div class='add'>+	u64 rx_desc_multicast_pkt_cnt;</div><div class='add'>+	u64 rx_desc_broadcast_pkt_cnt;</div><div class='add'>+	u64 rx_desc_ipsec_pkt_cnt;</div><div class='add'>+	u64 rx_desc_ip_opt_pkt_cnt;</div><div class='add'>+	u64 rx_desc_key_not_match_cnt;</div><div class='add'>+</div><div class='add'>+	u64 rx_octets_total_ok_cnt;</div><div class='add'>+	u64 rx_uc_pkt_cnt;</div><div class='add'>+	u64 rx_mc_pkt_cnt;</div><div class='add'>+	u64 rx_bc_pkt_cnt;</div><div class='add'>+	u64 rx_vlan_pkt_cnt;</div><div class='add'>+	u64 rx_octets_bad_cnt;</div><div class='add'>+	u64 rx_octets_total_filt_cnt;</div><div class='add'>+	u64 rx_filt_pkt_cnt;</div><div class='add'>+	u64 rx_trans_pkt_cnt;</div><div class='add'>+	u64 rx_framesize_64;</div><div class='add'>+	u64 rx_framesize_65_127;</div><div class='add'>+	u64 rx_framesize_128_255;</div><div class='add'>+	u64 rx_framesize_256_511;</div><div class='add'>+	u64 rx_framesize_512_1023;</div><div class='add'>+	u64 rx_framesize_1024_1518;</div><div class='add'>+	u64 rx_framesize_bt_1518;</div><div class='add'>+	u64 rx_fcs_error_cnt;</div><div class='add'>+	u64 rx_data_error_cnt;</div><div class='add'>+	u64 rx_align_error_cnt;</div><div class='add'>+	u64 rx_pause_macctl_frame_cnt;</div><div class='add'>+	u64 rx_unknown_macctl_frame_cnt;</div><div class='add'>+	/* crc ok, &gt; max_frm_size, &lt; 2max_frm_size */</div><div class='add'>+	u64 rx_frame_long_err_cnt;</div><div class='add'>+	/* crc fail, &gt; max_frm_size, &lt; 2max_frm_size */</div><div class='add'>+	u64 rx_jabber_err_cnt;</div><div class='add'>+	/* &gt; 2max_frm_size */</div><div class='add'>+	u64 rx_frame_very_long_err_cnt;</div><div class='add'>+	/* &lt; 64byte, &gt;= short_runts_thr */</div><div class='add'>+	u64 rx_frame_runt_err_cnt;</div><div class='add'>+	/* &lt; short_runts_thr */</div><div class='add'>+	u64 rx_frame_short_err_cnt;</div><div class='add'>+	/* PCU: dropped when the RX FIFO is full.*/</div><div class='add'>+	u64 rx_overflow_cnt;</div><div class='add'>+	/* GMAC: the count of overflows of the RX FIFO */</div><div class='add'>+	u64 rx_overrun_cnt;</div><div class='add'>+	/* PCU: the count of buffer alloc errors in RX */</div><div class='add'>+	u64 rx_bufrq_err_cnt;</div><div class='add'>+	/* PCU: the count of write descriptor errors in RX */</div><div class='add'>+	u64 rx_we_err_cnt;</div><div class='add'>+	/* GMAC: the count of pkts that contain PAD but length is not 64 */</div><div class='add'>+	u64 rx_lengthfield_err_cnt;</div><div class='add'>+	u64 rx_fail_comma_cnt;</div><div class='add'>+</div><div class='add'>+	u64 rx_dma_err_cnt;</div><div class='add'>+	u64 rx_fifo_less_empty_thrsld_cnt;</div><div class='add'>+</div><div class='add'>+	u64 tx_octets_total_ok_cnt;</div><div class='add'>+	u64 tx_uc_pkt_cnt;</div><div class='add'>+	u64 tx_mc_pkt_cnt;</div><div class='add'>+	u64 tx_bc_pkt_cnt;</div><div class='add'>+	u64 tx_vlan_pkt_cnt;</div><div class='add'>+	u64 tx_octets_bad_cnt;</div><div class='add'>+	u64 tx_trans_pkt_cnt;</div><div class='add'>+	u64 tx_pause_frame_cnt;</div><div class='add'>+	u64 tx_framesize_64;</div><div class='add'>+	u64 tx_framesize_65_127;</div><div class='add'>+	u64 tx_framesize_128_255;</div><div class='add'>+	u64 tx_framesize_256_511;</div><div class='add'>+	u64 tx_framesize_512_1023;</div><div class='add'>+	u64 tx_framesize_1024_1518;</div><div class='add'>+	u64 tx_framesize_bt_1518;</div><div class='add'>+	/* GMAC: the count of times that frames fail to be transmitted</div><div class='add'>+	 *       due to internal errors.</div><div class='add'>+	 */</div><div class='add'>+	u64 tx_underrun_err_cnt;</div><div class='add'>+	u64 tx_add_cs_fail_cnt;</div><div class='add'>+	/* PCU: the count of buffer free errors in TX */</div><div class='add'>+	u64 tx_bufrl_err_cnt;</div><div class='add'>+	u64 tx_crc_err_cnt;</div><div class='add'>+	u64 tx_drop_cnt;</div><div class='add'>+	u64 tx_excessive_length_drop_cnt;</div><div class='add'>+</div><div class='add'>+	u64 tx_timeout_cnt;</div><div class='add'>+	u64 tx_dma_err_cnt;</div><div class='add'>+</div><div class='add'>+	u64 np_link_fail_cnt;</div><div class='add'>+	u64 reset_fail_cnt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct hbg_priv {</div><div class='hunk'>@@ -126,6 +280,15 @@ struct hbg_priv {</div><div class='ctx'> 	struct hbg_vector vectors;</div><div class='ctx'> 	struct hbg_ring tx_ring;</div><div class='ctx'> 	struct hbg_ring rx_ring;</div><div class='add'>+	struct hbg_mac_filter filter;</div><div class='add'>+	enum hbg_reset_type reset_type;</div><div class='add'>+	struct hbg_user_def user_def;</div><div class='add'>+	struct hbg_stats stats;</div><div class='add'>+	unsigned long last_update_stats_time;</div><div class='add'>+	struct delayed_work service_task;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+void hbg_err_reset_task_schedule(struct hbg_priv *priv);</div><div class='add'>+void hbg_np_link_fail_task_schedule(struct hbg_priv *priv);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c<br/>new file mode 100644<br/>index 000000000000..01ad82d2f5cc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,168 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+// Copyright (c) 2024 Hisilicon Limited.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='add'>+#include "hbg_common.h"</div><div class='add'>+#include "hbg_debugfs.h"</div><div class='add'>+#include "hbg_hw.h"</div><div class='add'>+#include "hbg_irq.h"</div><div class='add'>+#include "hbg_txrx.h"</div><div class='add'>+</div><div class='add'>+static struct dentry *hbg_dbgfs_root;</div><div class='add'>+</div><div class='add'>+struct hbg_dbg_info {</div><div class='add'>+	const char *name;</div><div class='add'>+	int (*read)(struct seq_file *seq, void *data);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define state_str_true_false(p, s) str_true_false(test_bit(s, &amp;(p)-&gt;state))</div><div class='add'>+</div><div class='add'>+static void hbg_dbg_ring(struct hbg_priv *priv, struct hbg_ring *ring,</div><div class='add'>+			 struct seq_file *s)</div><div class='add'>+{</div><div class='add'>+	u32 irq_mask = ring-&gt;dir == HBG_DIR_TX ? HBG_INT_MSK_TX_B :</div><div class='add'>+						 HBG_INT_MSK_RX_B;</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "ring used num: %u\n",</div><div class='add'>+		   hbg_get_queue_used_num(ring));</div><div class='add'>+	seq_printf(s, "ring max num: %u\n", ring-&gt;len);</div><div class='add'>+	seq_printf(s, "ring head: %u, tail: %u\n", ring-&gt;head, ring-&gt;tail);</div><div class='add'>+	seq_printf(s, "fifo used num: %u\n",</div><div class='add'>+		   hbg_hw_get_fifo_used_num(priv, ring-&gt;dir));</div><div class='add'>+	seq_printf(s, "fifo max num: %u\n",</div><div class='add'>+		   hbg_get_spec_fifo_max_num(priv, ring-&gt;dir));</div><div class='add'>+	seq_printf(s, "irq enabled: %s\n",</div><div class='add'>+		   str_true_false(hbg_hw_irq_is_enabled(priv, irq_mask)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_dbg_tx_ring(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = dev_get_drvdata(s-&gt;private);</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	hbg_dbg_ring(priv, &amp;priv-&gt;tx_ring, s);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_dbg_rx_ring(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = dev_get_drvdata(s-&gt;private);</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	hbg_dbg_ring(priv, &amp;priv-&gt;rx_ring, s);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_dbg_irq_info(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = dev_get_drvdata(s-&gt;private);</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+	const struct hbg_irq_info *info;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;vectors.info_array_len; i++) {</div><div class='add'>+		info = &amp;priv-&gt;vectors.info_array[i];</div><div class='add'>+		seq_printf(s,</div><div class='add'>+			   "%-20s: enabled: %-5s, reset: %-5s, logged: %-5s, count: %llu\n",</div><div class='add'>+			   info-&gt;name,</div><div class='add'>+			   str_true_false(hbg_hw_irq_is_enabled(priv,</div><div class='add'>+								info-&gt;mask)),</div><div class='add'>+			   str_true_false(info-&gt;need_reset),</div><div class='add'>+			   str_true_false(info-&gt;need_print),</div><div class='add'>+			   priv-&gt;vectors.stats_array[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_dbg_mac_table(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = dev_get_drvdata(s-&gt;private);</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct hbg_mac_filter *filter;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	filter = &amp;priv-&gt;filter;</div><div class='add'>+	seq_printf(s, "mac addr max count: %u\n", filter-&gt;table_max_len);</div><div class='add'>+	seq_printf(s, "filter enabled: %s\n", str_true_false(filter-&gt;enabled));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; filter-&gt;table_max_len; i++) {</div><div class='add'>+		if (is_zero_ether_addr(filter-&gt;mac_table[i].addr))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		seq_printf(s, "[%u] %pM\n", i, filter-&gt;mac_table[i].addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const reset_type_str[] = {"None", "FLR", "Function"};</div><div class='add'>+</div><div class='add'>+static int hbg_dbg_nic_state(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = dev_get_drvdata(s-&gt;private);</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+	bool np_link_fail;</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "event handling state: %s\n",</div><div class='add'>+		   state_str_true_false(priv, HBG_NIC_STATE_EVENT_HANDLING));</div><div class='add'>+	seq_printf(s, "resetting state: %s\n",</div><div class='add'>+		   state_str_true_false(priv, HBG_NIC_STATE_RESETTING));</div><div class='add'>+	seq_printf(s, "reset fail state: %s\n",</div><div class='add'>+		   state_str_true_false(priv, HBG_NIC_STATE_RESET_FAIL));</div><div class='add'>+	seq_printf(s, "last reset type: %s\n",</div><div class='add'>+		   reset_type_str[priv-&gt;reset_type]);</div><div class='add'>+	seq_printf(s, "need reset state: %s\n",</div><div class='add'>+		   state_str_true_false(priv, HBG_NIC_STATE_NEED_RESET));</div><div class='add'>+</div><div class='add'>+	np_link_fail = !hbg_reg_read_field(priv, HBG_REG_AN_NEG_STATE_ADDR,</div><div class='add'>+					   HBG_REG_AN_NEG_STATE_NP_LINK_OK_B);</div><div class='add'>+	seq_printf(s, "np_link fail state: %s\n", str_true_false(np_link_fail));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct hbg_dbg_info hbg_dbg_infos[] = {</div><div class='add'>+	{ "tx_ring", hbg_dbg_tx_ring },</div><div class='add'>+	{ "rx_ring", hbg_dbg_rx_ring },</div><div class='add'>+	{ "irq_info", hbg_dbg_irq_info },</div><div class='add'>+	{ "mac_table", hbg_dbg_mac_table },</div><div class='add'>+	{ "nic_state", hbg_dbg_nic_state },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void hbg_debugfs_uninit(void *data)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive((struct dentry *)data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_debugfs_init(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const char *name = pci_name(priv-&gt;pdev);</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	struct dentry *root;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	root = debugfs_create_dir(name, hbg_dbgfs_root);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hbg_dbg_infos); i++)</div><div class='add'>+		debugfs_create_devm_seqfile(dev, hbg_dbg_infos[i].name,</div><div class='add'>+					    root, hbg_dbg_infos[i].read);</div><div class='add'>+</div><div class='add'>+	/* Ignore the failure because debugfs is not a key feature. */</div><div class='add'>+	devm_add_action_or_reset(dev, hbg_debugfs_uninit, root);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_debugfs_register(void)</div><div class='add'>+{</div><div class='add'>+	hbg_dbgfs_root = debugfs_create_dir("hibmcge", NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_debugfs_unregister(void)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(hbg_dbgfs_root);</div><div class='add'>+	hbg_dbgfs_root = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.h<br/>new file mode 100644<br/>index 000000000000..80670d66bbeb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.h</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0+ */</div><div class='add'>+/* Copyright (c) 2024 Hisilicon Limited. */</div><div class='add'>+</div><div class='add'>+#ifndef __HBG_DEBUGFS_H</div><div class='add'>+#define __HBG_DEBUGFS_H</div><div class='add'>+</div><div class='add'>+void hbg_debugfs_register(void);</div><div class='add'>+void hbg_debugfs_unregister(void);</div><div class='add'>+</div><div class='add'>+void hbg_debugfs_init(struct hbg_priv *priv);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c<br/>new file mode 100644<br/>index 000000000000..c0ce74cf7382<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c</a></div><div class='hunk'>@@ -0,0 +1,349 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+// Copyright (c) 2025 Hisilicon Limited.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include "hbg_common.h"</div><div class='add'>+#include "hbg_ethtool.h"</div><div class='add'>+#include "hbg_hw.h"</div><div class='add'>+#include "hbg_diagnose.h"</div><div class='add'>+</div><div class='add'>+#define HBG_MSG_DATA_MAX_NUM	64</div><div class='add'>+</div><div class='add'>+struct hbg_diagnose_message {</div><div class='add'>+	u32 opcode;</div><div class='add'>+	u32 status;</div><div class='add'>+	u32 data_num;</div><div class='add'>+	struct hbg_priv *priv;</div><div class='add'>+</div><div class='add'>+	u32 data[HBG_MSG_DATA_MAX_NUM];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HBG_HW_PUSH_WAIT_TIMEOUT_US	(2 * 1000 * 1000)</div><div class='add'>+#define HBG_HW_PUSH_WAIT_INTERVAL_US	(1 * 1000)</div><div class='add'>+</div><div class='add'>+enum hbg_push_cmd {</div><div class='add'>+	HBG_PUSH_CMD_IRQ = 0,</div><div class='add'>+	HBG_PUSH_CMD_STATS,</div><div class='add'>+	HBG_PUSH_CMD_LINK,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hbg_push_stats_info {</div><div class='add'>+	/* id is used to match the name of the current stats item.</div><div class='add'>+	 * and is used for pretty print on BMC</div><div class='add'>+	 */</div><div class='add'>+	u32 id;</div><div class='add'>+	u64 offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hbg_push_irq_info {</div><div class='add'>+	/* id is used to match the name of the current irq.</div><div class='add'>+	 * and is used for pretty print on BMC</div><div class='add'>+	 */</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HBG_PUSH_IRQ_I(name, id) {id, HBG_INT_MSK_##name##_B}</div><div class='add'>+static const struct hbg_push_irq_info hbg_push_irq_list[] = {</div><div class='add'>+	HBG_PUSH_IRQ_I(RX, 0),</div><div class='add'>+	HBG_PUSH_IRQ_I(TX, 1),</div><div class='add'>+	HBG_PUSH_IRQ_I(TX_PKT_CPL, 2),</div><div class='add'>+	HBG_PUSH_IRQ_I(MAC_MII_FIFO_ERR, 3),</div><div class='add'>+	HBG_PUSH_IRQ_I(MAC_PCS_RX_FIFO_ERR, 4),</div><div class='add'>+	HBG_PUSH_IRQ_I(MAC_PCS_TX_FIFO_ERR, 5),</div><div class='add'>+	HBG_PUSH_IRQ_I(MAC_APP_RX_FIFO_ERR, 6),</div><div class='add'>+	HBG_PUSH_IRQ_I(MAC_APP_TX_FIFO_ERR, 7),</div><div class='add'>+	HBG_PUSH_IRQ_I(SRAM_PARITY_ERR, 8),</div><div class='add'>+	HBG_PUSH_IRQ_I(TX_AHB_ERR, 9),</div><div class='add'>+	HBG_PUSH_IRQ_I(RX_BUF_AVL, 10),</div><div class='add'>+	HBG_PUSH_IRQ_I(REL_BUF_ERR, 11),</div><div class='add'>+	HBG_PUSH_IRQ_I(TXCFG_AVL, 12),</div><div class='add'>+	HBG_PUSH_IRQ_I(TX_DROP, 13),</div><div class='add'>+	HBG_PUSH_IRQ_I(RX_DROP, 14),</div><div class='add'>+	HBG_PUSH_IRQ_I(RX_AHB_ERR, 15),</div><div class='add'>+	HBG_PUSH_IRQ_I(MAC_FIFO_ERR, 16),</div><div class='add'>+	HBG_PUSH_IRQ_I(RBREQ_ERR, 17),</div><div class='add'>+	HBG_PUSH_IRQ_I(WE_ERR, 18),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HBG_PUSH_STATS_I(name, id) {id, HBG_STATS_FIELD_OFF(name)}</div><div class='add'>+static const struct hbg_push_stats_info hbg_push_stats_list[] = {</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_drop, 0),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l2_err_cnt, 1),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_pkt_len_err_cnt, 2),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l3_wrong_head_cnt, 3),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l3_csum_err_cnt, 4),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l3_len_err_cnt, 5),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l3_zero_ttl_cnt, 6),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l3_other_cnt, 7),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l4_err_cnt, 8),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l4_wrong_head_cnt, 9),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l4_len_err_cnt, 10),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l4_csum_err_cnt, 11),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l4_zero_port_num_cnt, 12),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_l4_other_cnt, 13),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_frag_cnt, 14),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_ip_ver_err_cnt, 15),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_ipv4_pkt_cnt, 16),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_ipv6_pkt_cnt, 17),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_no_ip_pkt_cnt, 18),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_ip_pkt_cnt, 19),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_tcp_pkt_cnt, 20),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_udp_pkt_cnt, 21),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_vlan_pkt_cnt, 22),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_icmp_pkt_cnt, 23),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_arp_pkt_cnt, 24),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_rarp_pkt_cnt, 25),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_multicast_pkt_cnt, 26),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_broadcast_pkt_cnt, 27),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_ipsec_pkt_cnt, 28),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_ip_opt_pkt_cnt, 29),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_desc_key_not_match_cnt, 30),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_octets_total_ok_cnt, 31),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_uc_pkt_cnt, 32),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_mc_pkt_cnt, 33),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_bc_pkt_cnt, 34),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_vlan_pkt_cnt, 35),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_octets_bad_cnt, 36),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_octets_total_filt_cnt, 37),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_filt_pkt_cnt, 38),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_trans_pkt_cnt, 39),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_framesize_64, 40),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_framesize_65_127, 41),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_framesize_128_255, 42),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_framesize_256_511, 43),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_framesize_512_1023, 44),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_framesize_1024_1518, 45),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_framesize_bt_1518, 46),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_fcs_error_cnt, 47),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_data_error_cnt, 48),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_align_error_cnt, 49),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_frame_long_err_cnt, 50),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_jabber_err_cnt, 51),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_pause_macctl_frame_cnt, 52),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_unknown_macctl_frame_cnt, 53),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_frame_very_long_err_cnt, 54),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_frame_runt_err_cnt, 55),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_frame_short_err_cnt, 56),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_overflow_cnt, 57),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_bufrq_err_cnt, 58),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_we_err_cnt, 59),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_overrun_cnt, 60),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_lengthfield_err_cnt, 61),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_fail_comma_cnt, 62),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_dma_err_cnt, 63),</div><div class='add'>+	HBG_PUSH_STATS_I(rx_fifo_less_empty_thrsld_cnt, 64),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_octets_total_ok_cnt, 65),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_uc_pkt_cnt, 66),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_mc_pkt_cnt, 67),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_bc_pkt_cnt, 68),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_vlan_pkt_cnt, 69),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_octets_bad_cnt, 70),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_trans_pkt_cnt, 71),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_pause_frame_cnt, 72),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_framesize_64, 73),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_framesize_65_127, 74),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_framesize_128_255, 75),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_framesize_256_511, 76),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_framesize_512_1023, 77),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_framesize_1024_1518, 78),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_framesize_bt_1518, 79),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_underrun_err_cnt, 80),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_add_cs_fail_cnt, 81),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_bufrl_err_cnt, 82),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_crc_err_cnt, 83),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_drop_cnt, 84),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_excessive_length_drop_cnt, 85),</div><div class='add'>+	HBG_PUSH_STATS_I(tx_dma_err_cnt, 86),</div><div class='add'>+	HBG_PUSH_STATS_I(reset_fail_cnt, 87),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hbg_push_msg_send(struct hbg_priv *priv,</div><div class='add'>+			     struct hbg_diagnose_message *msg)</div><div class='add'>+{</div><div class='add'>+	u32 header = 0;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	if (msg-&gt;data_num == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; msg-&gt;data_num &amp;&amp; i &lt; HBG_MSG_DATA_MAX_NUM; i++)</div><div class='add'>+		hbg_reg_write(priv,</div><div class='add'>+			      HBG_REG_MSG_DATA_BASE_ADDR + i * sizeof(u32),</div><div class='add'>+			      msg-&gt;data[i]);</div><div class='add'>+</div><div class='add'>+	hbg_field_modify(header, HBG_REG_MSG_HEADER_OPCODE_M, msg-&gt;opcode);</div><div class='add'>+	hbg_field_modify(header, HBG_REG_MSG_HEADER_DATA_NUM_M,  msg-&gt;data_num);</div><div class='add'>+	hbg_field_modify(header, HBG_REG_MSG_HEADER_RESP_CODE_M, ETIMEDOUT);</div><div class='add'>+</div><div class='add'>+	/* start status */</div><div class='add'>+	hbg_field_modify(header, HBG_REG_MSG_HEADER_STATUS_M, 1);</div><div class='add'>+</div><div class='add'>+	/* write header msg to start push */</div><div class='add'>+	hbg_reg_write(priv, HBG_REG_MSG_HEADER_ADDR, header);</div><div class='add'>+</div><div class='add'>+	/* wait done */</div><div class='add'>+	readl_poll_timeout(priv-&gt;io_base + HBG_REG_MSG_HEADER_ADDR, header,</div><div class='add'>+			   !FIELD_GET(HBG_REG_MSG_HEADER_STATUS_M, header),</div><div class='add'>+			   HBG_HW_PUSH_WAIT_INTERVAL_US,</div><div class='add'>+			   HBG_HW_PUSH_WAIT_TIMEOUT_US);</div><div class='add'>+</div><div class='add'>+	msg-&gt;status = FIELD_GET(HBG_REG_MSG_HEADER_STATUS_M, header);</div><div class='add'>+	return -(int)FIELD_GET(HBG_REG_MSG_HEADER_RESP_CODE_M, header);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_push_data(struct hbg_priv *priv,</div><div class='add'>+			 u32 opcode, u32 *data, u32 data_num)</div><div class='add'>+{</div><div class='add'>+	struct hbg_diagnose_message msg = {0};</div><div class='add'>+	u32 data_left_num;</div><div class='add'>+	u32 i, j;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	msg.priv = priv;</div><div class='add'>+	msg.opcode = opcode;</div><div class='add'>+	for (i = 0; i &lt; data_num / HBG_MSG_DATA_MAX_NUM + 1; i++) {</div><div class='add'>+		if (i * HBG_MSG_DATA_MAX_NUM &gt;= data_num)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		data_left_num = data_num - i * HBG_MSG_DATA_MAX_NUM;</div><div class='add'>+		for (j = 0; j &lt; data_left_num &amp;&amp; j &lt; HBG_MSG_DATA_MAX_NUM; j++)</div><div class='add'>+			msg.data[j] = data[i * HBG_MSG_DATA_MAX_NUM + j];</div><div class='add'>+</div><div class='add'>+		msg.data_num = j;</div><div class='add'>+		ret = hbg_push_msg_send(priv, &amp;msg);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_push_data_u64(struct hbg_priv *priv, u32 opcode,</div><div class='add'>+			     u64 *data, u32 data_num)</div><div class='add'>+{</div><div class='add'>+	/* The length of u64 is twice that of u32,</div><div class='add'>+	 * the data_num must be multiplied by 2.</div><div class='add'>+	 */</div><div class='add'>+	return hbg_push_data(priv, opcode, (u32 *)data, data_num * 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 hbg_get_irq_stats(struct hbg_vector *vectors, u32 mask)</div><div class='add'>+{</div><div class='add'>+	u32 i = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; vectors-&gt;info_array_len; i++)</div><div class='add'>+		if (vectors-&gt;info_array[i].mask == mask)</div><div class='add'>+			return vectors-&gt;stats_array[i];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_push_irq_cnt(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* An id needs to be added for each data.</div><div class='add'>+	 * Therefore, the data_num must be multiplied by 2.</div><div class='add'>+	 */</div><div class='add'>+	u32 data_num = ARRAY_SIZE(hbg_push_irq_list) * 2;</div><div class='add'>+	struct hbg_vector *vectors = &amp;priv-&gt;vectors;</div><div class='add'>+	const struct hbg_push_irq_info *info;</div><div class='add'>+	u32 i, j = 0;</div><div class='add'>+	u64 *data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	data = kcalloc(data_num, sizeof(u64), GFP_KERNEL);</div><div class='add'>+	if (!data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* An id needs to be added for each data.</div><div class='add'>+	 * So i + 2 for each loop.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; data_num; i += 2) {</div><div class='add'>+		info = &amp;hbg_push_irq_list[j++];</div><div class='add'>+		data[i] = info-&gt;id;</div><div class='add'>+		data[i + 1] = hbg_get_irq_stats(vectors, info-&gt;mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hbg_push_data_u64(priv, HBG_PUSH_CMD_IRQ, data, data_num);</div><div class='add'>+	kfree(data);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_push_link_status(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 link_status[2];</div><div class='add'>+</div><div class='add'>+	/* phy link status */</div><div class='add'>+	link_status[0] = priv-&gt;mac.phydev-&gt;link;</div><div class='add'>+	/* mac link status */</div><div class='add'>+	link_status[1] = hbg_reg_read_field(priv, HBG_REG_AN_NEG_STATE_ADDR,</div><div class='add'>+					    HBG_REG_AN_NEG_STATE_NP_LINK_OK_B);</div><div class='add'>+</div><div class='add'>+	return hbg_push_data(priv, HBG_PUSH_CMD_LINK,</div><div class='add'>+			     link_status, ARRAY_SIZE(link_status));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_push_stats(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* An id needs to be added for each data.</div><div class='add'>+	 * Therefore, the data_num must be multiplied by 2.</div><div class='add'>+	 */</div><div class='add'>+	u64 data_num = ARRAY_SIZE(hbg_push_stats_list) * 2;</div><div class='add'>+	struct hbg_stats *stats = &amp;priv-&gt;stats;</div><div class='add'>+	const struct hbg_push_stats_info *info;</div><div class='add'>+	u32 i, j = 0;</div><div class='add'>+	u64 *data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	data = kcalloc(data_num, sizeof(u64), GFP_KERNEL);</div><div class='add'>+	if (!data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* An id needs to be added for each data.</div><div class='add'>+	 * So i + 2 for each loop.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; data_num; i += 2) {</div><div class='add'>+		info = &amp;hbg_push_stats_list[j++];</div><div class='add'>+		data[i] = info-&gt;id;</div><div class='add'>+		data[i + 1] = HBG_STATS_R(stats, info-&gt;offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hbg_push_data_u64(priv, HBG_PUSH_CMD_STATS, data, data_num);</div><div class='add'>+	kfree(data);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_diagnose_message_push(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (test_bit(HBG_NIC_STATE_RESETTING, &amp;priv-&gt;state))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* only 1 is the right value */</div><div class='add'>+	if (hbg_reg_read(priv, HBG_REG_PUSH_REQ_ADDR) != 1)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = hbg_push_irq_cnt(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+			"failed to push irq cnt, ret = %d\n", ret);</div><div class='add'>+		goto push_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hbg_push_link_status(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+			"failed to push link status, ret = %d\n", ret);</div><div class='add'>+		goto push_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hbg_push_stats(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+			"failed to push stats, ret = %d\n", ret);</div><div class='add'>+</div><div class='add'>+push_done:</div><div class='add'>+	hbg_reg_write(priv, HBG_REG_PUSH_REQ_ADDR, 0);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.h<br/>new file mode 100644<br/>index 000000000000..ba04c6d8c03d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.h</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0+ */</div><div class='add'>+/* Copyright (c) 2025 Hisilicon Limited. */</div><div class='add'>+</div><div class='add'>+#ifndef __HBG_DIAGNOSE_H</div><div class='add'>+#define __HBG_DIAGNOSE_H</div><div class='add'>+</div><div class='add'>+#include "hbg_common.h"</div><div class='add'>+</div><div class='add'>+void hbg_diagnose_message_push(struct hbg_priv *priv);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c<br/>new file mode 100644<br/>index 000000000000..7234618e8e81<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c</a></div><div class='hunk'>@@ -0,0 +1,194 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+// Copyright (c) 2024 Hisilicon Limited.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+#include "hbg_common.h"</div><div class='add'>+#include "hbg_err.h"</div><div class='add'>+#include "hbg_hw.h"</div><div class='add'>+</div><div class='add'>+static void hbg_restore_mac_table(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct hbg_mac_filter *filter = &amp;priv-&gt;filter;</div><div class='add'>+	u64 addr;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; filter-&gt;table_max_len; i++)</div><div class='add'>+		if (!is_zero_ether_addr(filter-&gt;mac_table[i].addr)) {</div><div class='add'>+			addr = ether_addr_to_u64(filter-&gt;mac_table[i].addr);</div><div class='add'>+			hbg_hw_set_uc_addr(priv, addr, i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	hbg_hw_set_mac_filter_enable(priv, priv-&gt;filter.enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_restore_user_def_settings(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* The index of host mac is always 0. */</div><div class='add'>+	u64 rx_pause_addr = ether_addr_to_u64(priv-&gt;filter.mac_table[0].addr);</div><div class='add'>+	struct ethtool_pauseparam *pause_param = &amp;priv-&gt;user_def.pause_param;</div><div class='add'>+</div><div class='add'>+	hbg_restore_mac_table(priv);</div><div class='add'>+	hbg_hw_set_mtu(priv, priv-&gt;netdev-&gt;mtu);</div><div class='add'>+	hbg_hw_set_pause_enable(priv, pause_param-&gt;tx_pause,</div><div class='add'>+				pause_param-&gt;rx_pause);</div><div class='add'>+	hbg_hw_set_rx_pause_mac_addr(priv, rx_pause_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hbg_rebuild(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = hbg_hw_init(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	hbg_restore_user_def_settings(priv);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_reset_prepare(struct hbg_priv *priv, enum hbg_reset_type type)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (test_and_set_bit(HBG_NIC_STATE_RESETTING, &amp;priv-&gt;state))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (netif_running(priv-&gt;netdev)) {</div><div class='add'>+		clear_bit(HBG_NIC_STATE_RESETTING, &amp;priv-&gt;state);</div><div class='add'>+		dev_warn(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+			 "failed to reset because port is up\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_device_detach(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;reset_type = type;</div><div class='add'>+	clear_bit(HBG_NIC_STATE_RESET_FAIL, &amp;priv-&gt;state);</div><div class='add'>+	ret = hbg_hw_event_notify(priv, HBG_HW_EVENT_RESET);</div><div class='add'>+	if (ret) {</div><div class='add'>+		priv-&gt;stats.reset_fail_cnt++;</div><div class='add'>+		set_bit(HBG_NIC_STATE_RESET_FAIL, &amp;priv-&gt;state);</div><div class='add'>+		clear_bit(HBG_NIC_STATE_RESETTING, &amp;priv-&gt;state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_reset_done(struct hbg_priv *priv, enum hbg_reset_type type)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(HBG_NIC_STATE_RESETTING, &amp;priv-&gt;state) ||</div><div class='add'>+	    type != priv-&gt;reset_type)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = hbg_rebuild(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		priv-&gt;stats.reset_fail_cnt++;</div><div class='add'>+		set_bit(HBG_NIC_STATE_RESET_FAIL, &amp;priv-&gt;state);</div><div class='add'>+		clear_bit(HBG_NIC_STATE_RESETTING, &amp;priv-&gt;state);</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev, "failed to rebuild after reset\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_device_attach(priv-&gt;netdev);</div><div class='add'>+	clear_bit(HBG_NIC_STATE_RESETTING, &amp;priv-&gt;state);</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;priv-&gt;pdev-&gt;dev, "reset done\n");</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hbg_reset(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = hbg_reset_prepare(priv, HBG_RESET_TYPE_FUNCTION);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return hbg_reset_done(priv, HBG_RESET_TYPE_FUNCTION);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_err_reset(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	bool running;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	running = netif_running(priv-&gt;netdev);</div><div class='add'>+	if (running)</div><div class='add'>+		dev_close(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	if (hbg_reset(priv))</div><div class='add'>+		goto err_unlock;</div><div class='add'>+</div><div class='add'>+	if (running)</div><div class='add'>+		dev_open(priv-&gt;netdev, NULL);</div><div class='add'>+</div><div class='add'>+err_unlock:</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static pci_ers_result_t hbg_pci_err_detected(struct pci_dev *pdev,</div><div class='add'>+					     pci_channel_state_t state)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (state == pci_channel_io_perm_failure) {</div><div class='add'>+		netif_device_detach(netdev);</div><div class='add'>+		return PCI_ERS_RESULT_DISCONNECT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return PCI_ERS_RESULT_NEED_RESET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static pci_ers_result_t hbg_pci_err_slot_reset(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	netif_device_detach(netdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	if (pci_enable_device(pdev)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"failed to re-enable PCI device after reset\n");</div><div class='add'>+		return PCI_ERS_RESULT_DISCONNECT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+	pci_restore_state(pdev);</div><div class='add'>+</div><div class='add'>+	hbg_err_reset(priv);</div><div class='add'>+	return PCI_ERS_RESULT_RECOVERED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_pci_err_reset_prepare(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	hbg_reset_prepare(priv, HBG_RESET_TYPE_FLR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_pci_err_reset_done(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	hbg_reset_done(priv, HBG_RESET_TYPE_FLR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pci_error_handlers hbg_pci_err_handler = {</div><div class='add'>+	.error_detected = hbg_pci_err_detected,</div><div class='add'>+	.slot_reset = hbg_pci_err_slot_reset,</div><div class='add'>+	.reset_prepare = hbg_pci_err_reset_prepare,</div><div class='add'>+	.reset_done = hbg_pci_err_reset_done,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void hbg_set_pci_err_handler(struct pci_driver *pdrv)</div><div class='add'>+{</div><div class='add'>+	pdrv-&gt;err_handler = &amp;hbg_pci_err_handler;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.h<br/>new file mode 100644<br/>index 000000000000..fb9fbe7004e8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_err.h</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0+ */</div><div class='add'>+/* Copyright (c) 2024 Hisilicon Limited. */</div><div class='add'>+</div><div class='add'>+#ifndef __HBG_ERR_H</div><div class='add'>+#define __HBG_ERR_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+void hbg_set_pci_err_handler(struct pci_driver *pdrv);</div><div class='add'>+int hbg_reset(struct hbg_priv *priv);</div><div class='add'>+int hbg_rebuild(struct hbg_priv *priv);</div><div class='add'>+void hbg_err_reset(struct hbg_priv *priv);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c<br/>index c3370114aef3..1d62ff913737 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c</a></div><div class='hunk'>@@ -3,12 +3,495 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+#include "hbg_common.h"</div><div class='add'>+#include "hbg_err.h"</div><div class='ctx'> #include "hbg_ethtool.h"</div><div class='add'>+#include "hbg_hw.h"</div><div class='add'>+</div><div class='add'>+struct hbg_ethtool_stats {</div><div class='add'>+	char name[ETH_GSTRING_LEN];</div><div class='add'>+	unsigned long offset;</div><div class='add'>+	u32 reg; /* set to 0 if stats is not updated via dump reg */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HBG_STATS_I(stats) { #stats, HBG_STATS_FIELD_OFF(stats), 0}</div><div class='add'>+#define HBG_STATS_REG_I(stats, reg) { #stats, HBG_STATS_FIELD_OFF(stats), reg}</div><div class='add'>+</div><div class='add'>+static const struct hbg_ethtool_stats hbg_ethtool_stats_info[] = {</div><div class='add'>+	HBG_STATS_I(rx_desc_l2_err_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_pkt_len_err_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_l3_wrong_head_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_l3_csum_err_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_l3_len_err_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_l3_zero_ttl_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_l3_other_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_l4_wrong_head_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_l4_len_err_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_l4_csum_err_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_l4_zero_port_num_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_l4_other_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_ip_ver_err_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_ipv4_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_ipv6_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_no_ip_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_ip_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_tcp_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_udp_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_vlan_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_icmp_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_arp_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_rarp_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_multicast_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_broadcast_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_ipsec_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_ip_opt_pkt_cnt),</div><div class='add'>+	HBG_STATS_I(rx_desc_key_not_match_cnt),</div><div class='add'>+</div><div class='add'>+	HBG_STATS_REG_I(rx_octets_bad_cnt, HBG_REG_RX_OCTETS_BAD_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_octets_total_filt_cnt,</div><div class='add'>+			HBG_REG_RX_OCTETS_TOTAL_FILT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_uc_pkt_cnt, HBG_REG_RX_UC_PKTS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_vlan_pkt_cnt, HBG_REG_RX_TAGGED_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_filt_pkt_cnt, HBG_REG_RX_FILT_PKT_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_data_error_cnt, HBG_REG_RX_DATA_ERR_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_frame_long_err_cnt, HBG_REG_RX_LONG_ERRORS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_jabber_err_cnt, HBG_REG_RX_JABBER_ERRORS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_frame_very_long_err_cnt,</div><div class='add'>+			HBG_REG_RX_VERY_LONG_ERR_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_frame_runt_err_cnt, HBG_REG_RX_RUNT_ERR_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_frame_short_err_cnt, HBG_REG_RX_SHORT_ERR_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_overflow_cnt, HBG_REG_RX_OVER_FLOW_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_bufrq_err_cnt, HBG_REG_RX_BUFRQ_ERR_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_we_err_cnt, HBG_REG_RX_WE_ERR_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_overrun_cnt, HBG_REG_RX_OVERRUN_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_lengthfield_err_cnt,</div><div class='add'>+			HBG_REG_RX_LENGTHFIELD_ERR_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_fail_comma_cnt, HBG_REG_RX_FAIL_COMMA_CNT_ADDR),</div><div class='add'>+	HBG_STATS_I(rx_dma_err_cnt),</div><div class='add'>+	HBG_STATS_I(rx_fifo_less_empty_thrsld_cnt),</div><div class='add'>+</div><div class='add'>+	HBG_STATS_REG_I(tx_uc_pkt_cnt, HBG_REG_TX_UC_PKTS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_vlan_pkt_cnt, HBG_REG_TX_TAGGED_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_octets_bad_cnt, HBG_REG_OCTETS_TRANSMITTED_BAD_ADDR),</div><div class='add'>+</div><div class='add'>+	HBG_STATS_REG_I(tx_underrun_err_cnt, HBG_REG_TX_UNDERRUN_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_add_cs_fail_cnt, HBG_REG_TX_CS_FAIL_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_bufrl_err_cnt, HBG_REG_TX_BUFRL_ERR_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_crc_err_cnt, HBG_REG_TX_CRC_ERROR_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_drop_cnt, HBG_REG_TX_DROP_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_excessive_length_drop_cnt,</div><div class='add'>+			HBG_REG_TX_EXCESSIVE_LENGTH_DROP_ADDR),</div><div class='add'>+	HBG_STATS_I(tx_dma_err_cnt),</div><div class='add'>+	HBG_STATS_I(tx_timeout_cnt),</div><div class='add'>+	HBG_STATS_I(reset_fail_cnt),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hbg_ethtool_stats hbg_ethtool_rmon_stats_info[] = {</div><div class='add'>+	HBG_STATS_I(rx_desc_frag_cnt),</div><div class='add'>+	HBG_STATS_REG_I(rx_framesize_64, HBG_REG_RX_PKTS_64OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_framesize_65_127,</div><div class='add'>+			HBG_REG_RX_PKTS_65TO127OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_framesize_128_255,</div><div class='add'>+			HBG_REG_RX_PKTS_128TO255OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_framesize_256_511,</div><div class='add'>+			HBG_REG_RX_PKTS_256TO511OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_framesize_512_1023,</div><div class='add'>+			HBG_REG_RX_PKTS_512TO1023OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_framesize_1024_1518,</div><div class='add'>+			HBG_REG_RX_PKTS_1024TO1518OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_framesize_bt_1518,</div><div class='add'>+			HBG_REG_RX_PKTS_1519TOMAXOCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_framesize_64, HBG_REG_TX_PKTS_64OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_framesize_65_127,</div><div class='add'>+			HBG_REG_TX_PKTS_65TO127OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_framesize_128_255,</div><div class='add'>+			HBG_REG_TX_PKTS_128TO255OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_framesize_256_511,</div><div class='add'>+			HBG_REG_TX_PKTS_256TO511OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_framesize_512_1023,</div><div class='add'>+			HBG_REG_TX_PKTS_512TO1023OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_framesize_1024_1518,</div><div class='add'>+			HBG_REG_TX_PKTS_1024TO1518OCTETS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_framesize_bt_1518,</div><div class='add'>+			HBG_REG_TX_PKTS_1519TOMAXOCTETS_ADDR),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hbg_ethtool_stats hbg_ethtool_mac_stats_info[] = {</div><div class='add'>+	HBG_STATS_REG_I(rx_mc_pkt_cnt, HBG_REG_RX_MC_PKTS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_bc_pkt_cnt, HBG_REG_RX_BC_PKTS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_align_error_cnt, HBG_REG_RX_ALIGN_ERRORS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_octets_total_ok_cnt,</div><div class='add'>+			HBG_REG_RX_OCTETS_TOTAL_OK_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_trans_pkt_cnt, HBG_REG_RX_TRANS_PKG_CNT_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_fcs_error_cnt, HBG_REG_RX_FCS_ERRORS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_mc_pkt_cnt, HBG_REG_TX_MC_PKTS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_bc_pkt_cnt, HBG_REG_TX_BC_PKTS_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_octets_total_ok_cnt,</div><div class='add'>+			HBG_REG_OCTETS_TRANSMITTED_OK_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_trans_pkt_cnt, HBG_REG_TX_TRANS_PKG_CNT_ADDR),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hbg_ethtool_stats hbg_ethtool_ctrl_stats_info[] = {</div><div class='add'>+	HBG_STATS_REG_I(rx_pause_macctl_frame_cnt,</div><div class='add'>+			HBG_REG_RX_PAUSE_MACCTL_FRAMCOUNTER_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(tx_pause_frame_cnt, HBG_REG_TX_PAUSE_FRAMES_ADDR),</div><div class='add'>+	HBG_STATS_REG_I(rx_unknown_macctl_frame_cnt,</div><div class='add'>+			HBG_REG_RX_UNKNOWN_MACCTL_FRAMCOUNTER_ADDR),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hbg_reg_dump_type {</div><div class='add'>+	HBG_DUMP_REG_TYPE_SPEC = 0,</div><div class='add'>+	HBG_DUMP_REG_TYPE_MDIO,</div><div class='add'>+	HBG_DUMP_REG_TYPE_GMAC,</div><div class='add'>+	HBG_DUMP_REG_TYPE_PCU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hbg_reg_info {</div><div class='add'>+	u32 type;</div><div class='add'>+	u32 offset;</div><div class='add'>+	u32 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HBG_DUMP_SPEC_I(offset) {HBG_DUMP_REG_TYPE_SPEC, offset, 0}</div><div class='add'>+#define HBG_DUMP_MDIO_I(offset) {HBG_DUMP_REG_TYPE_MDIO, offset, 0}</div><div class='add'>+#define HBG_DUMP_GMAC_I(offset) {HBG_DUMP_REG_TYPE_GMAC, offset, 0}</div><div class='add'>+#define HBG_DUMP_PCU_I(offset) {HBG_DUMP_REG_TYPE_PCU, offset, 0}</div><div class='add'>+</div><div class='add'>+static const struct hbg_reg_info hbg_dump_reg_infos[] = {</div><div class='add'>+	/* dev specs */</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_SPEC_VALID_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_EVENT_REQ_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_MAC_ID_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_PHY_ID_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_MAC_ADDR_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_MAC_ADDR_HIGH_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_UC_MAC_NUM_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_MDIO_FREQ_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_MAX_MTU_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_MIN_MTU_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_TX_FIFO_NUM_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_RX_FIFO_NUM_ADDR),</div><div class='add'>+	HBG_DUMP_SPEC_I(HBG_REG_VLAN_LAYERS_ADDR),</div><div class='add'>+</div><div class='add'>+	/* mdio */</div><div class='add'>+	HBG_DUMP_MDIO_I(HBG_REG_MDIO_COMMAND_ADDR),</div><div class='add'>+	HBG_DUMP_MDIO_I(HBG_REG_MDIO_ADDR_ADDR),</div><div class='add'>+	HBG_DUMP_MDIO_I(HBG_REG_MDIO_WDATA_ADDR),</div><div class='add'>+	HBG_DUMP_MDIO_I(HBG_REG_MDIO_RDATA_ADDR),</div><div class='add'>+	HBG_DUMP_MDIO_I(HBG_REG_MDIO_STA_ADDR),</div><div class='add'>+</div><div class='add'>+	/* gmac */</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_DUPLEX_TYPE_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_FD_FC_TYPE_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_FC_TX_TIMER_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_FD_FC_ADDR_LOW_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_FD_FC_ADDR_HIGH_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_MAX_FRAME_SIZE_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_PORT_MODE_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_PORT_ENABLE_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_PAUSE_ENABLE_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_AN_NEG_STATE_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_TRANSMIT_CTRL_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_REC_FILT_CTRL_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_LINE_LOOP_BACK_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_CF_CRC_STRIP_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_MODE_CHANGE_EN_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_LOOP_REG_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_RECV_CTRL_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_VLAN_CODE_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_LOW_0_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_HIGH_0_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_LOW_1_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_HIGH_1_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_LOW_2_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_HIGH_2_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_LOW_3_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_HIGH_3_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_LOW_4_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_HIGH_4_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_LOW_5_ADDR),</div><div class='add'>+	HBG_DUMP_GMAC_I(HBG_REG_STATION_ADDR_HIGH_5_ADDR),</div><div class='add'>+</div><div class='add'>+	/* pcu */</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_TX_FIFO_THRSLD_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_RX_FIFO_THRSLD_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CFG_FIFO_THRSLD_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_INTRPT_MSK_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_INTRPT_STAT_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_INTRPT_CLR_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_TX_BUS_ERR_ADDR_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_RX_BUS_ERR_ADDR_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_MAX_FRAME_LEN_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_DEBUG_ST_MCH_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_FIFO_CURR_STATUS_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_FIFO_HIST_STATUS_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_CFF_DATA_NUM_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_TX_PAUSE_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_RX_CFF_ADDR_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_RX_BUF_SIZE_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_BUS_CTRL_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_RX_CTRL_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_RX_PKT_MODE_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_DBG_ST0_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_DBG_ST1_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_DBG_ST2_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_BUS_RST_EN_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_IND_TXINT_MSK_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_IND_TXINT_STAT_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_IND_TXINT_CLR_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_IND_RXINT_MSK_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_IND_RXINT_STAT_ADDR),</div><div class='add'>+	HBG_DUMP_PCU_I(HBG_REG_CF_IND_RXINT_CLR_ADDR),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 hbg_dump_type_base_array[] = {</div><div class='add'>+	[HBG_DUMP_REG_TYPE_SPEC] = 0,</div><div class='add'>+	[HBG_DUMP_REG_TYPE_MDIO] = HBG_REG_MDIO_BASE,</div><div class='add'>+	[HBG_DUMP_REG_TYPE_GMAC] = HBG_REG_SGMII_BASE,</div><div class='add'>+	[HBG_DUMP_REG_TYPE_PCU] = HBG_REG_SGMII_BASE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hbg_ethtool_get_regs_len(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return ARRAY_SIZE(hbg_dump_reg_infos) * sizeof(struct hbg_reg_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_ethtool_get_regs(struct net_device *netdev,</div><div class='add'>+				 struct ethtool_regs *regs, void *data)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct hbg_reg_info *info;</div><div class='add'>+	u32 i, offset = 0;</div><div class='add'>+</div><div class='add'>+	regs-&gt;version = 0;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hbg_dump_reg_infos); i++) {</div><div class='add'>+		info = data + offset;</div><div class='add'>+</div><div class='add'>+		*info = hbg_dump_reg_infos[i];</div><div class='add'>+		info-&gt;val = hbg_reg_read(priv, info-&gt;offset);</div><div class='add'>+		info-&gt;offset -= hbg_dump_type_base_array[info-&gt;type];</div><div class='add'>+</div><div class='add'>+		offset += sizeof(*info);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_ethtool_get_pauseparam(struct net_device *net_dev,</div><div class='add'>+				       struct ethtool_pauseparam *param)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(net_dev);</div><div class='add'>+</div><div class='add'>+	param-&gt;autoneg = priv-&gt;mac.pause_autoneg;</div><div class='add'>+	hbg_hw_get_pause_enable(priv, &amp;param-&gt;tx_pause, &amp;param-&gt;rx_pause);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_ethtool_set_pauseparam(struct net_device *net_dev,</div><div class='add'>+				      struct ethtool_pauseparam *param)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(net_dev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;mac.pause_autoneg = param-&gt;autoneg;</div><div class='add'>+	phy_set_asym_pause(priv-&gt;mac.phydev, param-&gt;rx_pause, param-&gt;tx_pause);</div><div class='add'>+</div><div class='add'>+	if (!param-&gt;autoneg)</div><div class='add'>+		hbg_hw_set_pause_enable(priv, param-&gt;tx_pause, param-&gt;rx_pause);</div><div class='add'>+</div><div class='add'>+	priv-&gt;user_def.pause_param = *param;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_ethtool_reset(struct net_device *netdev, u32 *flags)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (*flags != ETH_RESET_DEDICATED)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	*flags = 0;</div><div class='add'>+	return hbg_reset(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_update_stats_by_info(struct hbg_priv *priv,</div><div class='add'>+				     const struct hbg_ethtool_stats *info,</div><div class='add'>+				     u32 info_len)</div><div class='add'>+{</div><div class='add'>+	const struct hbg_ethtool_stats *stats;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	if (test_bit(HBG_NIC_STATE_RESETTING, &amp;priv-&gt;state))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; info_len; i++) {</div><div class='add'>+		stats = &amp;info[i];</div><div class='add'>+		if (!stats-&gt;reg)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		HBG_STATS_U(&amp;priv-&gt;stats, stats-&gt;offset,</div><div class='add'>+			    hbg_reg_read(priv, stats-&gt;reg));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_update_stats(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	hbg_update_stats_by_info(priv, hbg_ethtool_stats_info,</div><div class='add'>+				 ARRAY_SIZE(hbg_ethtool_stats_info));</div><div class='add'>+	hbg_update_stats_by_info(priv, hbg_ethtool_rmon_stats_info,</div><div class='add'>+				 ARRAY_SIZE(hbg_ethtool_rmon_stats_info));</div><div class='add'>+	hbg_update_stats_by_info(priv, hbg_ethtool_mac_stats_info,</div><div class='add'>+				 ARRAY_SIZE(hbg_ethtool_mac_stats_info));</div><div class='add'>+	hbg_update_stats_by_info(priv, hbg_ethtool_ctrl_stats_info,</div><div class='add'>+				 ARRAY_SIZE(hbg_ethtool_ctrl_stats_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_ethtool_get_sset_count(struct net_device *netdev, int stringset)</div><div class='add'>+{</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(hbg_ethtool_stats_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_ethtool_get_strings(struct net_device *netdev,</div><div class='add'>+				    u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hbg_ethtool_stats_info); i++)</div><div class='add'>+		ethtool_puts(&amp;data, hbg_ethtool_stats_info[i].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_ethtool_get_stats(struct net_device *netdev,</div><div class='add'>+				  struct ethtool_stats *stats, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	hbg_update_stats(priv);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hbg_ethtool_stats_info); i++)</div><div class='add'>+		*data++ = HBG_STATS_R(&amp;priv-&gt;stats,</div><div class='add'>+				      hbg_ethtool_stats_info[i].offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_ethtool_get_pause_stats(struct net_device *netdev,</div><div class='add'>+					struct ethtool_pause_stats *epstats)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct hbg_stats *stats = &amp;priv-&gt;stats;</div><div class='add'>+</div><div class='add'>+	hbg_update_stats(priv);</div><div class='add'>+	epstats-&gt;rx_pause_frames = stats-&gt;rx_pause_macctl_frame_cnt;</div><div class='add'>+	epstats-&gt;tx_pause_frames = stats-&gt;tx_pause_frame_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_ethtool_get_eth_mac_stats(struct net_device *netdev,</div><div class='add'>+					  struct ethtool_eth_mac_stats *emstats)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct hbg_stats *stats = &amp;priv-&gt;stats;</div><div class='add'>+</div><div class='add'>+	hbg_update_stats(priv);</div><div class='add'>+	emstats-&gt;FramesTransmittedOK = stats-&gt;tx_trans_pkt_cnt;</div><div class='add'>+	emstats-&gt;FramesReceivedOK = stats-&gt;rx_trans_pkt_cnt;</div><div class='add'>+	emstats-&gt;FrameCheckSequenceErrors = stats-&gt;rx_fcs_error_cnt;</div><div class='add'>+	emstats-&gt;AlignmentErrors = stats-&gt;rx_align_error_cnt;</div><div class='add'>+	emstats-&gt;OctetsTransmittedOK = stats-&gt;tx_octets_total_ok_cnt;</div><div class='add'>+	emstats-&gt;OctetsReceivedOK = stats-&gt;rx_octets_total_ok_cnt;</div><div class='add'>+</div><div class='add'>+	emstats-&gt;MulticastFramesXmittedOK = stats-&gt;tx_mc_pkt_cnt;</div><div class='add'>+	emstats-&gt;BroadcastFramesXmittedOK = stats-&gt;tx_bc_pkt_cnt;</div><div class='add'>+	emstats-&gt;MulticastFramesReceivedOK = stats-&gt;rx_mc_pkt_cnt;</div><div class='add'>+	emstats-&gt;BroadcastFramesReceivedOK = stats-&gt;rx_bc_pkt_cnt;</div><div class='add'>+	emstats-&gt;InRangeLengthErrors = stats-&gt;rx_fcs_error_cnt +</div><div class='add'>+				       stats-&gt;rx_jabber_err_cnt +</div><div class='add'>+				       stats-&gt;rx_unknown_macctl_frame_cnt +</div><div class='add'>+				       stats-&gt;rx_bufrq_err_cnt +</div><div class='add'>+				       stats-&gt;rx_we_err_cnt;</div><div class='add'>+	emstats-&gt;OutOfRangeLengthField = stats-&gt;rx_frame_short_err_cnt +</div><div class='add'>+					 stats-&gt;rx_frame_runt_err_cnt +</div><div class='add'>+					 stats-&gt;rx_lengthfield_err_cnt +</div><div class='add'>+					 stats-&gt;rx_frame_long_err_cnt +</div><div class='add'>+					 stats-&gt;rx_frame_very_long_err_cnt;</div><div class='add'>+	emstats-&gt;FrameTooLongErrors = stats-&gt;rx_frame_long_err_cnt +</div><div class='add'>+				      stats-&gt;rx_frame_very_long_err_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+hbg_ethtool_get_eth_ctrl_stats(struct net_device *netdev,</div><div class='add'>+			       struct ethtool_eth_ctrl_stats *ecstats)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct hbg_stats *s = &amp;priv-&gt;stats;</div><div class='add'>+</div><div class='add'>+	hbg_update_stats(priv);</div><div class='add'>+	ecstats-&gt;MACControlFramesTransmitted = s-&gt;tx_pause_frame_cnt;</div><div class='add'>+	ecstats-&gt;MACControlFramesReceived = s-&gt;rx_pause_macctl_frame_cnt;</div><div class='add'>+	ecstats-&gt;UnsupportedOpcodesReceived = s-&gt;rx_unknown_macctl_frame_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range hbg_rmon_ranges[] = {</div><div class='add'>+	{    0,    64 },</div><div class='add'>+	{   65,   127 },</div><div class='add'>+	{  128,   255 },</div><div class='add'>+	{  256,   511 },</div><div class='add'>+	{  512,  1023 },</div><div class='add'>+	{ 1024,  1518 },</div><div class='add'>+	{ 1519,  4095 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+hbg_ethtool_get_rmon_stats(struct net_device *netdev,</div><div class='add'>+			   struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+			   const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct hbg_stats *stats = &amp;priv-&gt;stats;</div><div class='add'>+</div><div class='add'>+	hbg_update_stats(priv);</div><div class='add'>+	rmon_stats-&gt;undersize_pkts = stats-&gt;rx_frame_short_err_cnt +</div><div class='add'>+				     stats-&gt;rx_frame_runt_err_cnt +</div><div class='add'>+				     stats-&gt;rx_lengthfield_err_cnt;</div><div class='add'>+	rmon_stats-&gt;oversize_pkts = stats-&gt;rx_frame_long_err_cnt +</div><div class='add'>+				    stats-&gt;rx_frame_very_long_err_cnt;</div><div class='add'>+	rmon_stats-&gt;fragments = stats-&gt;rx_desc_frag_cnt;</div><div class='add'>+	rmon_stats-&gt;hist[0] = stats-&gt;rx_framesize_64;</div><div class='add'>+	rmon_stats-&gt;hist[1] = stats-&gt;rx_framesize_65_127;</div><div class='add'>+	rmon_stats-&gt;hist[2] = stats-&gt;rx_framesize_128_255;</div><div class='add'>+	rmon_stats-&gt;hist[3] = stats-&gt;rx_framesize_256_511;</div><div class='add'>+	rmon_stats-&gt;hist[4] = stats-&gt;rx_framesize_512_1023;</div><div class='add'>+	rmon_stats-&gt;hist[5] = stats-&gt;rx_framesize_1024_1518;</div><div class='add'>+	rmon_stats-&gt;hist[6] = stats-&gt;rx_framesize_bt_1518;</div><div class='add'>+</div><div class='add'>+	rmon_stats-&gt;hist_tx[0] = stats-&gt;tx_framesize_64;</div><div class='add'>+	rmon_stats-&gt;hist_tx[1] = stats-&gt;tx_framesize_65_127;</div><div class='add'>+	rmon_stats-&gt;hist_tx[2] = stats-&gt;tx_framesize_128_255;</div><div class='add'>+	rmon_stats-&gt;hist_tx[3] = stats-&gt;tx_framesize_256_511;</div><div class='add'>+	rmon_stats-&gt;hist_tx[4] = stats-&gt;tx_framesize_512_1023;</div><div class='add'>+	rmon_stats-&gt;hist_tx[5] = stats-&gt;tx_framesize_1024_1518;</div><div class='add'>+	rmon_stats-&gt;hist_tx[6] = stats-&gt;tx_framesize_bt_1518;</div><div class='add'>+</div><div class='add'>+	*ranges = hbg_rmon_ranges;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops hbg_ethtool_ops = {</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='ctx'> 	.get_link_ksettings	= phy_ethtool_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings	= phy_ethtool_set_link_ksettings,</div><div class='add'>+	.get_regs_len		= hbg_ethtool_get_regs_len,</div><div class='add'>+	.get_regs		= hbg_ethtool_get_regs,</div><div class='add'>+	.get_pauseparam         = hbg_ethtool_get_pauseparam,</div><div class='add'>+	.set_pauseparam         = hbg_ethtool_set_pauseparam,</div><div class='add'>+	.reset			= hbg_ethtool_reset,</div><div class='add'>+	.nway_reset		= phy_ethtool_nway_reset,</div><div class='add'>+	.get_sset_count		= hbg_ethtool_get_sset_count,</div><div class='add'>+	.get_strings		= hbg_ethtool_get_strings,</div><div class='add'>+	.get_ethtool_stats	= hbg_ethtool_get_stats,</div><div class='add'>+	.get_pause_stats	= hbg_ethtool_get_pause_stats,</div><div class='add'>+	.get_eth_mac_stats	= hbg_ethtool_get_eth_mac_stats,</div><div class='add'>+	.get_eth_ctrl_stats	= hbg_ethtool_get_eth_ctrl_stats,</div><div class='add'>+	.get_rmon_stats		= hbg_ethtool_get_rmon_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void hbg_ethtool_set_ops(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.h<br/>index 628707ec2686..e173155b146a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.h</a></div><div class='hunk'>@@ -6,6 +6,11 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> </div><div class='add'>+#define HBG_STATS_FIELD_OFF(f) (offsetof(struct hbg_stats, f))</div><div class='add'>+#define HBG_STATS_R(p, offset) (*(u64 *)((u8 *)(p) + (offset)))</div><div class='add'>+#define HBG_STATS_U(p, offset, val) (HBG_STATS_R(p, offset) += (val))</div><div class='add'>+</div><div class='ctx'> void hbg_ethtool_set_ops(struct net_device *netdev);</div><div class='add'>+void hbg_update_stats(struct hbg_priv *priv);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c<br/>index 05295c2ad439..d6e8ce8e351a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/iopoll.h&gt;</div><div class='ctx'> #include &lt;linux/minmax.h&gt;</div><div class='ctx'> #include "hbg_common.h"</div><div class='hunk'>@@ -11,12 +12,21 @@</div><div class='ctx'> </div><div class='ctx'> #define HBG_HW_EVENT_WAIT_TIMEOUT_US	(2 * 1000 * 1000)</div><div class='ctx'> #define HBG_HW_EVENT_WAIT_INTERVAL_US	(10 * 1000)</div><div class='add'>+#define HBG_MAC_LINK_WAIT_TIMEOUT_US	(500 * 1000)</div><div class='add'>+#define HBG_MAC_LINK_WAIT_INTERVAL_US	(5 * 1000)</div><div class='ctx'> /* little endian or big endian.</div><div class='ctx'>  * ctrl means packet description, data means skb packet data</div><div class='ctx'>  */</div><div class='ctx'> #define HBG_ENDIAN_CTRL_LE_DATA_BE	0x0</div><div class='ctx'> #define HBG_PCU_FRAME_LEN_PLUS 4</div><div class='ctx'> </div><div class='add'>+#define HBG_FIFO_TX_FULL_THRSLD		0x3F0</div><div class='add'>+#define HBG_FIFO_TX_EMPTY_THRSLD	0x1F0</div><div class='add'>+#define HBG_FIFO_RX_FULL_THRSLD		0x240</div><div class='add'>+#define HBG_FIFO_RX_EMPTY_THRSLD	0x190</div><div class='add'>+#define HBG_CFG_FIFO_FULL_THRSLD	0x10</div><div class='add'>+#define HBG_CFG_FIFO_EMPTY_THRSLD	0x01</div><div class='add'>+</div><div class='ctx'> static bool hbg_hw_spec_is_valid(struct hbg_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	return hbg_reg_read(priv, HBG_REG_SPEC_VALID_ADDR) &amp;&amp;</div><div class='hunk'>@@ -67,6 +77,8 @@ static int hbg_hw_dev_specs_init(struct hbg_priv *priv)</div><div class='ctx'> 	specs-&gt;vlan_layers = hbg_reg_read(priv, HBG_REG_VLAN_LAYERS_ADDR);</div><div class='ctx'> 	specs-&gt;rx_fifo_num = hbg_reg_read(priv, HBG_REG_RX_FIFO_NUM_ADDR);</div><div class='ctx'> 	specs-&gt;tx_fifo_num = hbg_reg_read(priv, HBG_REG_TX_FIFO_NUM_ADDR);</div><div class='add'>+	specs-&gt;uc_mac_num = hbg_reg_read(priv, HBG_REG_UC_MAC_NUM_ADDR);</div><div class='add'>+</div><div class='ctx'> 	mac_addr = hbg_reg_read64(priv, HBG_REG_MAC_ADDR_ADDR);</div><div class='ctx'> 	u64_to_ether_addr(mac_addr, (u8 *)specs-&gt;mac_addr.sa_data);</div><div class='ctx'> </div><div class='hunk'>@@ -135,9 +147,13 @@ void hbg_hw_irq_enable(struct hbg_priv *priv, u32 mask, bool enable)</div><div class='ctx'> 	hbg_reg_write(priv, HBG_REG_CF_INTRPT_MSK_ADDR, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void hbg_hw_set_uc_addr(struct hbg_priv *priv, u64 mac_addr)</div><div class='add'>+void hbg_hw_set_uc_addr(struct hbg_priv *priv, u64 mac_addr, u32 index)</div><div class='ctx'> {</div><div class='del'>-	hbg_reg_write64(priv, HBG_REG_STATION_ADDR_LOW_2_ADDR, mac_addr);</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	/* mac addr is u64, so the addr offset is 0x8 */</div><div class='add'>+	addr = HBG_REG_STATION_ADDR_LOW_2_ADDR + (index * 0x8);</div><div class='add'>+	hbg_reg_write64(priv, addr, mac_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hbg_hw_set_pcu_max_frame_len(struct hbg_priv *priv,</div><div class='hunk'>@@ -161,8 +177,21 @@ static void hbg_hw_set_mac_max_frame_len(struct hbg_priv *priv,</div><div class='ctx'> </div><div class='ctx'> void hbg_hw_set_mtu(struct hbg_priv *priv, u16 mtu)</div><div class='ctx'> {</div><div class='del'>-	hbg_hw_set_pcu_max_frame_len(priv, mtu);</div><div class='del'>-	hbg_hw_set_mac_max_frame_len(priv, mtu);</div><div class='add'>+	/* burst_len BIT(29) set to 1 can improve the TX performance.</div><div class='add'>+	 * But packet drop occurs when mtu &gt; 2000.</div><div class='add'>+	 * So, BIT(29) reset to 0 when mtu &gt; 2000.</div><div class='add'>+	 */</div><div class='add'>+	u32 burst_len_bit = (mtu &gt; 2000) ? 0 : 1;</div><div class='add'>+	u32 frame_len;</div><div class='add'>+</div><div class='add'>+	frame_len = mtu + VLAN_HLEN * priv-&gt;dev_specs.vlan_layers +</div><div class='add'>+		    ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	hbg_hw_set_pcu_max_frame_len(priv, frame_len);</div><div class='add'>+	hbg_hw_set_mac_max_frame_len(priv, frame_len);</div><div class='add'>+</div><div class='add'>+	hbg_reg_write_field(priv, HBG_REG_BRUST_LENGTH_ADDR,</div><div class='add'>+			    HBG_REG_BRUST_LENGTH_B, burst_len_bit);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void hbg_hw_mac_enable(struct hbg_priv *priv, u32 enable)</div><div class='hunk'>@@ -201,10 +230,102 @@ void hbg_hw_fill_buffer(struct hbg_priv *priv, u32 buffer_dma_addr)</div><div class='ctx'> </div><div class='ctx'> void hbg_hw_adjust_link(struct hbg_priv *priv, u32 speed, u32 duplex)</div><div class='ctx'> {</div><div class='add'>+	u32 link_status;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	hbg_hw_mac_enable(priv, HBG_STATUS_DISABLE);</div><div class='add'>+</div><div class='ctx'> 	hbg_reg_write_field(priv, HBG_REG_PORT_MODE_ADDR,</div><div class='ctx'> 			    HBG_REG_PORT_MODE_M, speed);</div><div class='ctx'> 	hbg_reg_write_field(priv, HBG_REG_DUPLEX_TYPE_ADDR,</div><div class='ctx'> 			    HBG_REG_DUPLEX_B, duplex);</div><div class='add'>+</div><div class='add'>+	hbg_hw_event_notify(priv, HBG_HW_EVENT_CORE_RESET);</div><div class='add'>+</div><div class='add'>+	hbg_hw_mac_enable(priv, HBG_STATUS_ENABLE);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;mac.phy_addr == HBG_NO_PHY)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* wait MAC link up */</div><div class='add'>+	ret = readl_poll_timeout(priv-&gt;io_base + HBG_REG_AN_NEG_STATE_ADDR,</div><div class='add'>+				 link_status,</div><div class='add'>+				 FIELD_GET(HBG_REG_AN_NEG_STATE_NP_LINK_OK_B,</div><div class='add'>+					   link_status),</div><div class='add'>+				 HBG_MAC_LINK_WAIT_INTERVAL_US,</div><div class='add'>+				 HBG_MAC_LINK_WAIT_TIMEOUT_US);</div><div class='add'>+	if (ret)</div><div class='add'>+		hbg_np_link_fail_task_schedule(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* only support uc filter */</div><div class='add'>+void hbg_hw_set_mac_filter_enable(struct hbg_priv *priv, u32 enable)</div><div class='add'>+{</div><div class='add'>+	hbg_reg_write_field(priv, HBG_REG_REC_FILT_CTRL_ADDR,</div><div class='add'>+			    HBG_REG_REC_FILT_CTRL_UC_MATCH_EN_B, enable);</div><div class='add'>+</div><div class='add'>+	/* only uc filter is supported, so set all bits of mc mask reg to 1 */</div><div class='add'>+	hbg_reg_write64(priv, HBG_REG_STATION_ADDR_LOW_MSK_0, U64_MAX);</div><div class='add'>+	hbg_reg_write64(priv, HBG_REG_STATION_ADDR_LOW_MSK_1, U64_MAX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en)</div><div class='add'>+{</div><div class='add'>+	hbg_reg_write_field(priv, HBG_REG_PAUSE_ENABLE_ADDR,</div><div class='add'>+			    HBG_REG_PAUSE_ENABLE_TX_B, tx_en);</div><div class='add'>+	hbg_reg_write_field(priv, HBG_REG_PAUSE_ENABLE_ADDR,</div><div class='add'>+			    HBG_REG_PAUSE_ENABLE_RX_B, rx_en);</div><div class='add'>+</div><div class='add'>+	hbg_reg_write_field(priv, HBG_REG_REC_FILT_CTRL_ADDR,</div><div class='add'>+			    HBG_REG_REC_FILT_CTRL_PAUSE_FRM_PASS_B, rx_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en)</div><div class='add'>+{</div><div class='add'>+	*tx_en = hbg_reg_read_field(priv, HBG_REG_PAUSE_ENABLE_ADDR,</div><div class='add'>+				    HBG_REG_PAUSE_ENABLE_TX_B);</div><div class='add'>+	*rx_en = hbg_reg_read_field(priv, HBG_REG_PAUSE_ENABLE_ADDR,</div><div class='add'>+				    HBG_REG_PAUSE_ENABLE_RX_B);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_hw_set_rx_pause_mac_addr(struct hbg_priv *priv, u64 mac_addr)</div><div class='add'>+{</div><div class='add'>+	hbg_reg_write64(priv, HBG_REG_FD_FC_ADDR_LOW_ADDR, mac_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_hw_set_fifo_thrsld(struct hbg_priv *priv,</div><div class='add'>+				   u32 full, u32 empty, enum hbg_dir dir)</div><div class='add'>+{</div><div class='add'>+	u32 value = 0;</div><div class='add'>+</div><div class='add'>+	value |= FIELD_PREP(HBG_REG_FIFO_THRSLD_FULL_M, full);</div><div class='add'>+	value |= FIELD_PREP(HBG_REG_FIFO_THRSLD_EMPTY_M, empty);</div><div class='add'>+</div><div class='add'>+	if (dir &amp; HBG_DIR_TX)</div><div class='add'>+		hbg_reg_write(priv, HBG_REG_TX_FIFO_THRSLD_ADDR, value);</div><div class='add'>+</div><div class='add'>+	if (dir &amp; HBG_DIR_RX)</div><div class='add'>+		hbg_reg_write(priv, HBG_REG_RX_FIFO_THRSLD_ADDR, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_hw_set_cfg_fifo_thrsld(struct hbg_priv *priv,</div><div class='add'>+				       u32 full, u32 empty, enum hbg_dir dir)</div><div class='add'>+{</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	value = hbg_reg_read(priv, HBG_REG_CFG_FIFO_THRSLD_ADDR);</div><div class='add'>+</div><div class='add'>+	if (dir &amp; HBG_DIR_TX) {</div><div class='add'>+		value |= FIELD_PREP(HBG_REG_CFG_FIFO_THRSLD_TX_FULL_M, full);</div><div class='add'>+		value |= FIELD_PREP(HBG_REG_CFG_FIFO_THRSLD_TX_EMPTY_M, empty);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dir &amp; HBG_DIR_RX) {</div><div class='add'>+		value |= FIELD_PREP(HBG_REG_CFG_FIFO_THRSLD_RX_FULL_M, full);</div><div class='add'>+		value |= FIELD_PREP(HBG_REG_CFG_FIFO_THRSLD_RX_EMPTY_M, empty);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hbg_reg_write(priv, HBG_REG_CFG_FIFO_THRSLD_ADDR, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hbg_hw_init_transmit_ctrl(struct hbg_priv *priv)</div><div class='hunk'>@@ -267,5 +388,12 @@ int hbg_hw_init(struct hbg_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	hbg_hw_init_rx_control(priv);</div><div class='ctx'> 	hbg_hw_init_transmit_ctrl(priv);</div><div class='add'>+</div><div class='add'>+	hbg_hw_set_fifo_thrsld(priv, HBG_FIFO_TX_FULL_THRSLD,</div><div class='add'>+			       HBG_FIFO_TX_EMPTY_THRSLD, HBG_DIR_TX);</div><div class='add'>+	hbg_hw_set_fifo_thrsld(priv, HBG_FIFO_RX_FULL_THRSLD,</div><div class='add'>+			       HBG_FIFO_RX_EMPTY_THRSLD, HBG_DIR_RX);</div><div class='add'>+	hbg_hw_set_cfg_fifo_thrsld(priv, HBG_CFG_FIFO_FULL_THRSLD,</div><div class='add'>+				   HBG_CFG_FIFO_EMPTY_THRSLD, HBG_DIR_TX_RX);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h<br/>index 14fb39241c93..a4a049b5121d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h</a></div><div class='hunk'>@@ -51,9 +51,13 @@ bool hbg_hw_irq_is_enabled(struct hbg_priv *priv, u32 mask);</div><div class='ctx'> void hbg_hw_irq_enable(struct hbg_priv *priv, u32 mask, bool enable);</div><div class='ctx'> void hbg_hw_set_mtu(struct hbg_priv *priv, u16 mtu);</div><div class='ctx'> void hbg_hw_mac_enable(struct hbg_priv *priv, u32 enable);</div><div class='del'>-void hbg_hw_set_uc_addr(struct hbg_priv *priv, u64 mac_addr);</div><div class='add'>+void hbg_hw_set_uc_addr(struct hbg_priv *priv, u64 mac_addr, u32 index);</div><div class='ctx'> u32 hbg_hw_get_fifo_used_num(struct hbg_priv *priv, enum hbg_dir dir);</div><div class='ctx'> void hbg_hw_set_tx_desc(struct hbg_priv *priv, struct hbg_tx_desc *tx_desc);</div><div class='ctx'> void hbg_hw_fill_buffer(struct hbg_priv *priv, u32 buffer_dma_addr);</div><div class='add'>+void hbg_hw_set_mac_filter_enable(struct hbg_priv *priv, u32 enable);</div><div class='add'>+void hbg_hw_set_pause_enable(struct hbg_priv *priv, u32 tx_en, u32 rx_en);</div><div class='add'>+void hbg_hw_get_pause_enable(struct hbg_priv *priv, u32 *tx_en, u32 *rx_en);</div><div class='add'>+void hbg_hw_set_rx_pause_mac_addr(struct hbg_priv *priv, u64 mac_addr);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c<br/>index 25dd25f096fe..ae4cb35186d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c</a></div><div class='hunk'>@@ -6,54 +6,66 @@</div><div class='ctx'> #include "hbg_hw.h"</div><div class='ctx'> </div><div class='ctx'> static void hbg_irq_handle_err(struct hbg_priv *priv,</div><div class='del'>-			       struct hbg_irq_info *irq_info)</div><div class='add'>+			       const struct hbg_irq_info *irq_info)</div><div class='ctx'> {</div><div class='ctx'> 	if (irq_info-&gt;need_print)</div><div class='ctx'> 		dev_err(&amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"receive error interrupt: %s\n", irq_info-&gt;name);</div><div class='add'>+</div><div class='add'>+	if (irq_info-&gt;need_reset)</div><div class='add'>+		hbg_err_reset_task_schedule(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hbg_irq_handle_tx(struct hbg_priv *priv,</div><div class='del'>-			      struct hbg_irq_info *irq_info)</div><div class='add'>+			      const struct hbg_irq_info *irq_info)</div><div class='ctx'> {</div><div class='ctx'> 	napi_schedule(&amp;priv-&gt;tx_ring.napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hbg_irq_handle_rx(struct hbg_priv *priv,</div><div class='del'>-			      struct hbg_irq_info *irq_info)</div><div class='add'>+			      const struct hbg_irq_info *irq_info)</div><div class='ctx'> {</div><div class='ctx'> 	napi_schedule(&amp;priv-&gt;rx_ring.napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define HBG_TXRX_IRQ_I(name, handle) \</div><div class='del'>-	{#name, HBG_INT_MSK_##name##_B, false, false, 0, handle}</div><div class='del'>-#define HBG_ERR_IRQ_I(name, need_print) \</div><div class='del'>-	{#name, HBG_INT_MSK_##name##_B, true, need_print, 0, hbg_irq_handle_err}</div><div class='del'>-</div><div class='del'>-static struct hbg_irq_info hbg_irqs[] = {</div><div class='del'>-	HBG_TXRX_IRQ_I(RX, hbg_irq_handle_rx),</div><div class='del'>-	HBG_TXRX_IRQ_I(TX, hbg_irq_handle_tx),</div><div class='del'>-	HBG_ERR_IRQ_I(MAC_MII_FIFO_ERR, true),</div><div class='del'>-	HBG_ERR_IRQ_I(MAC_PCS_RX_FIFO_ERR, true),</div><div class='del'>-	HBG_ERR_IRQ_I(MAC_PCS_TX_FIFO_ERR, true),</div><div class='del'>-	HBG_ERR_IRQ_I(MAC_APP_RX_FIFO_ERR, true),</div><div class='del'>-	HBG_ERR_IRQ_I(MAC_APP_TX_FIFO_ERR, true),</div><div class='del'>-	HBG_ERR_IRQ_I(SRAM_PARITY_ERR, true),</div><div class='del'>-	HBG_ERR_IRQ_I(TX_AHB_ERR, true),</div><div class='del'>-	HBG_ERR_IRQ_I(RX_BUF_AVL, false),</div><div class='del'>-	HBG_ERR_IRQ_I(REL_BUF_ERR, true),</div><div class='del'>-	HBG_ERR_IRQ_I(TXCFG_AVL, false),</div><div class='del'>-	HBG_ERR_IRQ_I(TX_DROP, false),</div><div class='del'>-	HBG_ERR_IRQ_I(RX_DROP, false),</div><div class='del'>-	HBG_ERR_IRQ_I(RX_AHB_ERR, true),</div><div class='del'>-	HBG_ERR_IRQ_I(MAC_FIFO_ERR, false),</div><div class='del'>-	HBG_ERR_IRQ_I(RBREQ_ERR, false),</div><div class='del'>-	HBG_ERR_IRQ_I(WE_ERR, false),</div><div class='add'>+static void hbg_irq_handle_rx_buf_val(struct hbg_priv *priv,</div><div class='add'>+				      const struct hbg_irq_info *irq_info)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;stats.rx_fifo_less_empty_thrsld_cnt++;</div><div class='add'>+	hbg_hw_irq_enable(priv, irq_info-&gt;mask, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define HBG_IRQ_I(name, handle) \</div><div class='add'>+	{#name, HBG_INT_MSK_##name##_B, false, false, false, handle}</div><div class='add'>+#define HBG_ERR_IRQ_I(name, need_print, ndde_reset) \</div><div class='add'>+	{#name, HBG_INT_MSK_##name##_B, true, need_print, \</div><div class='add'>+	ndde_reset, hbg_irq_handle_err}</div><div class='add'>+</div><div class='add'>+static const struct hbg_irq_info hbg_irqs[] = {</div><div class='add'>+	HBG_IRQ_I(RX, hbg_irq_handle_rx),</div><div class='add'>+	HBG_IRQ_I(TX, hbg_irq_handle_tx),</div><div class='add'>+	HBG_ERR_IRQ_I(TX_PKT_CPL, true, true),</div><div class='add'>+	HBG_ERR_IRQ_I(MAC_MII_FIFO_ERR, true, true),</div><div class='add'>+	HBG_ERR_IRQ_I(MAC_PCS_RX_FIFO_ERR, true, true),</div><div class='add'>+	HBG_ERR_IRQ_I(MAC_PCS_TX_FIFO_ERR, true, true),</div><div class='add'>+	HBG_ERR_IRQ_I(MAC_APP_RX_FIFO_ERR, true, true),</div><div class='add'>+	HBG_ERR_IRQ_I(MAC_APP_TX_FIFO_ERR, true, true),</div><div class='add'>+	HBG_ERR_IRQ_I(SRAM_PARITY_ERR, true, false),</div><div class='add'>+	HBG_ERR_IRQ_I(TX_AHB_ERR, true, true),</div><div class='add'>+	HBG_IRQ_I(RX_BUF_AVL, hbg_irq_handle_rx_buf_val),</div><div class='add'>+	HBG_ERR_IRQ_I(REL_BUF_ERR, true, false),</div><div class='add'>+	HBG_ERR_IRQ_I(TXCFG_AVL, false, false),</div><div class='add'>+	HBG_ERR_IRQ_I(TX_DROP, false, false),</div><div class='add'>+	HBG_ERR_IRQ_I(RX_DROP, false, false),</div><div class='add'>+	HBG_ERR_IRQ_I(RX_AHB_ERR, true, false),</div><div class='add'>+	HBG_ERR_IRQ_I(MAC_FIFO_ERR, true, true),</div><div class='add'>+	HBG_ERR_IRQ_I(RBREQ_ERR, true, true),</div><div class='add'>+	HBG_ERR_IRQ_I(WE_ERR, true, true),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t hbg_irq_handle(int irq_num, void *p)</div><div class='ctx'> {</div><div class='del'>-	struct hbg_irq_info *info;</div><div class='add'>+	const struct hbg_irq_info *info;</div><div class='ctx'> 	struct hbg_priv *priv = p;</div><div class='ctx'> 	u32 status;</div><div class='ctx'> 	u32 i;</div><div class='hunk'>@@ -68,7 +80,7 @@ static irqreturn_t hbg_irq_handle(int irq_num, void *p)</div><div class='ctx'> 			hbg_hw_irq_enable(priv, info-&gt;mask, false);</div><div class='ctx'> 			hbg_hw_irq_clear(priv, info-&gt;mask);</div><div class='ctx'> </div><div class='del'>-			info-&gt;count++;</div><div class='add'>+			priv-&gt;vectors.stats_array[i]++;</div><div class='ctx'> 			if (info-&gt;irq_handle)</div><div class='ctx'> 				info-&gt;irq_handle(priv, info);</div><div class='ctx'> </div><div class='hunk'>@@ -121,6 +133,12 @@ int hbg_irq_init(struct hbg_priv *priv)</div><div class='ctx'> 					     irq_names_map[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	vectors-&gt;stats_array = devm_kcalloc(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+					    ARRAY_SIZE(hbg_irqs),</div><div class='add'>+					    sizeof(u64), GFP_KERNEL);</div><div class='add'>+	if (!vectors-&gt;stats_array)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	vectors-&gt;info_array = hbg_irqs;</div><div class='ctx'> 	vectors-&gt;info_array_len = ARRAY_SIZE(hbg_irqs);</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c<br/>index 75505fb5cc4a..068da2fd1fea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c</a></div><div class='hunk'>@@ -5,18 +5,23 @@</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='ctx'> #include "hbg_common.h"</div><div class='add'>+#include "hbg_diagnose.h"</div><div class='add'>+#include "hbg_err.h"</div><div class='ctx'> #include "hbg_ethtool.h"</div><div class='ctx'> #include "hbg_hw.h"</div><div class='ctx'> #include "hbg_irq.h"</div><div class='ctx'> #include "hbg_mdio.h"</div><div class='ctx'> #include "hbg_txrx.h"</div><div class='add'>+#include "hbg_debugfs.h"</div><div class='ctx'> </div><div class='del'>-static void hbg_change_mtu(struct hbg_priv *priv, int new_mtu);</div><div class='add'>+#define HBG_SUPPORT_FEATURES (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | \</div><div class='add'>+			     NETIF_F_RXCSUM)</div><div class='ctx'> </div><div class='ctx'> static void hbg_all_irq_enable(struct hbg_priv *priv, bool enabled)</div><div class='ctx'> {</div><div class='del'>-	struct hbg_irq_info *info;</div><div class='add'>+	const struct hbg_irq_info *info;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;vectors.info_array_len; i++) {</div><div class='hunk'>@@ -55,11 +60,7 @@ static int hbg_hw_txrx_clear(struct hbg_priv *priv)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* After reset, regs need to be reconfigured */</div><div class='del'>-	hbg_hw_init(priv);</div><div class='del'>-	hbg_hw_set_uc_addr(priv, ether_addr_to_u64(priv-&gt;netdev-&gt;dev_addr));</div><div class='del'>-	hbg_change_mtu(priv, priv-&gt;netdev-&gt;mtu);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return hbg_rebuild(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hbg_net_stop(struct net_device *netdev)</div><div class='hunk'>@@ -74,31 +75,127 @@ static int hbg_net_stop(struct net_device *netdev)</div><div class='ctx'> 	return hbg_hw_txrx_clear(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hbg_update_promisc_mode(struct net_device *netdev, bool overflow)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	/* Only when not table_overflow, and netdev-&gt;flags not set IFF_PROMISC,</div><div class='add'>+	 * The MAC filter will be enabled.</div><div class='add'>+	 * Otherwise the filter will be disabled.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;filter.enabled = !(overflow || (netdev-&gt;flags &amp; IFF_PROMISC));</div><div class='add'>+	hbg_hw_set_mac_filter_enable(priv, priv-&gt;filter.enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_set_mac_to_mac_table(struct hbg_priv *priv,</div><div class='add'>+				     u32 index, const u8 *addr)</div><div class='add'>+{</div><div class='add'>+	if (addr) {</div><div class='add'>+		ether_addr_copy(priv-&gt;filter.mac_table[index].addr, addr);</div><div class='add'>+		hbg_hw_set_uc_addr(priv, ether_addr_to_u64(addr), index);</div><div class='add'>+	} else {</div><div class='add'>+		eth_zero_addr(priv-&gt;filter.mac_table[index].addr);</div><div class='add'>+		hbg_hw_set_uc_addr(priv, 0, index);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_get_index_from_mac_table(struct hbg_priv *priv,</div><div class='add'>+					const u8 *addr, u32 *index)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;filter.table_max_len; i++)</div><div class='add'>+		if (ether_addr_equal(priv-&gt;filter.mac_table[i].addr, addr)) {</div><div class='add'>+			*index = i;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_add_mac_to_filter(struct hbg_priv *priv, const u8 *addr)</div><div class='add'>+{</div><div class='add'>+	u32 index;</div><div class='add'>+</div><div class='add'>+	/* already exists */</div><div class='add'>+	if (!hbg_get_index_from_mac_table(priv, addr, &amp;index))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (index = 0; index &lt; priv-&gt;filter.table_max_len; index++)</div><div class='add'>+		if (is_zero_ether_addr(priv-&gt;filter.mac_table[index].addr)) {</div><div class='add'>+			hbg_set_mac_to_mac_table(priv, index, addr);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	return -ENOSPC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_del_mac_from_filter(struct hbg_priv *priv, const u8 *addr)</div><div class='add'>+{</div><div class='add'>+	u32 index;</div><div class='add'>+</div><div class='add'>+	/* not exists */</div><div class='add'>+	if (hbg_get_index_from_mac_table(priv, addr, &amp;index))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hbg_set_mac_to_mac_table(priv, index, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_uc_sync(struct net_device *netdev, const unsigned char *addr)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return hbg_add_mac_to_filter(priv, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_uc_unsync(struct net_device *netdev, const unsigned char *addr)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (ether_addr_equal(netdev-&gt;dev_addr, (u8 *)addr))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	hbg_del_mac_from_filter(priv, addr);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_net_set_rx_mode(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = __dev_uc_sync(netdev, hbg_uc_sync, hbg_uc_unsync);</div><div class='add'>+</div><div class='add'>+	/* If ret != 0, overflow has occurred */</div><div class='add'>+	hbg_update_promisc_mode(netdev, !!ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hbg_net_set_mac_address(struct net_device *netdev, void *addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	u8 *mac_addr;</div><div class='add'>+	bool exists;</div><div class='add'>+	u32 index;</div><div class='ctx'> </div><div class='ctx'> 	mac_addr = ((struct sockaddr *)addr)-&gt;sa_data;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_valid_ether_addr(mac_addr))</div><div class='ctx'> 		return -EADDRNOTAVAIL;</div><div class='ctx'> </div><div class='del'>-	hbg_hw_set_uc_addr(priv, ether_addr_to_u64(mac_addr));</div><div class='del'>-	dev_addr_set(netdev, mac_addr);</div><div class='add'>+	/* The index of host mac is always 0.</div><div class='add'>+	 * If new mac address already exists,</div><div class='add'>+	 * delete the existing mac address and</div><div class='add'>+	 * add it to the position with index 0.</div><div class='add'>+	 */</div><div class='add'>+	exists = !hbg_get_index_from_mac_table(priv, mac_addr, &amp;index);</div><div class='add'>+	hbg_set_mac_to_mac_table(priv, 0, mac_addr);</div><div class='add'>+	if (exists)</div><div class='add'>+		hbg_set_mac_to_mac_table(priv, index, NULL);</div><div class='ctx'> </div><div class='add'>+	hbg_hw_set_rx_pause_mac_addr(priv, ether_addr_to_u64(mac_addr));</div><div class='add'>+	dev_addr_set(netdev, mac_addr);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hbg_change_mtu(struct hbg_priv *priv, int new_mtu)</div><div class='del'>-{</div><div class='del'>-	u32 frame_len;</div><div class='del'>-</div><div class='del'>-	frame_len = new_mtu + VLAN_HLEN * priv-&gt;dev_specs.vlan_layers +</div><div class='del'>-		    ETH_HLEN + ETH_FCS_LEN;</div><div class='del'>-	hbg_hw_set_mtu(priv, frame_len);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int hbg_net_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> {</div><div class='ctx'> 	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='hunk'>@@ -106,12 +203,12 @@ static int hbg_net_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	hbg_change_mtu(priv, new_mtu);</div><div class='del'>-	WRITE_ONCE(netdev-&gt;mtu, new_mtu);</div><div class='del'>-</div><div class='ctx'> 	dev_dbg(&amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 		"change mtu from %u to %u\n", netdev-&gt;mtu, new_mtu);</div><div class='ctx'> </div><div class='add'>+	hbg_hw_set_mtu(priv, new_mtu);</div><div class='add'>+	WRITE_ONCE(netdev-&gt;mtu, new_mtu);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -122,6 +219,10 @@ static void hbg_net_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='ctx'> 	char *buf = ring-&gt;tout_log_buf;</div><div class='ctx'> 	u32 pos = 0;</div><div class='ctx'> </div><div class='add'>+	priv-&gt;stats.tx_timeout_cnt++;</div><div class='add'>+</div><div class='add'>+	pos += scnprintf(buf + pos, HBG_TX_TIMEOUT_BUF_LEN - pos,</div><div class='add'>+			 "tx_timeout cnt: %llu\n", priv-&gt;stats.tx_timeout_cnt);</div><div class='ctx'> 	pos += scnprintf(buf + pos, HBG_TX_TIMEOUT_BUF_LEN - pos,</div><div class='ctx'> 			 "ring used num: %u, fifo used num: %u\n",</div><div class='ctx'> 			 hbg_get_queue_used_num(ring),</div><div class='hunk'>@@ -134,6 +235,39 @@ static void hbg_net_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='ctx'> 	netdev_info(netdev, "%s", buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hbg_net_get_stats(struct net_device *netdev,</div><div class='add'>+			      struct rtnl_link_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct hbg_stats *h_stats = &amp;priv-&gt;stats;</div><div class='add'>+</div><div class='add'>+	hbg_update_stats(priv);</div><div class='add'>+	dev_get_tstats64(netdev, stats);</div><div class='add'>+</div><div class='add'>+	/* fifo empty */</div><div class='add'>+	stats-&gt;tx_fifo_errors += h_stats-&gt;tx_drop_cnt;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_dropped += h_stats-&gt;tx_excessive_length_drop_cnt +</div><div class='add'>+			     h_stats-&gt;tx_drop_cnt;</div><div class='add'>+	stats-&gt;tx_errors += h_stats-&gt;tx_add_cs_fail_cnt +</div><div class='add'>+			    h_stats-&gt;tx_bufrl_err_cnt +</div><div class='add'>+			    h_stats-&gt;tx_underrun_err_cnt +</div><div class='add'>+			    h_stats-&gt;tx_crc_err_cnt;</div><div class='add'>+	stats-&gt;rx_errors += h_stats-&gt;rx_data_error_cnt;</div><div class='add'>+	stats-&gt;multicast += h_stats-&gt;rx_mc_pkt_cnt;</div><div class='add'>+	stats-&gt;rx_dropped += h_stats-&gt;rx_desc_drop;</div><div class='add'>+	stats-&gt;rx_length_errors += h_stats-&gt;rx_frame_very_long_err_cnt +</div><div class='add'>+				   h_stats-&gt;rx_frame_long_err_cnt +</div><div class='add'>+				   h_stats-&gt;rx_frame_runt_err_cnt +</div><div class='add'>+				   h_stats-&gt;rx_frame_short_err_cnt +</div><div class='add'>+				   h_stats-&gt;rx_lengthfield_err_cnt;</div><div class='add'>+	stats-&gt;rx_frame_errors += h_stats-&gt;rx_desc_l2_err_cnt +</div><div class='add'>+				  h_stats-&gt;rx_desc_l3l4_err_cnt;</div><div class='add'>+	stats-&gt;rx_fifo_errors += h_stats-&gt;rx_overflow_cnt +</div><div class='add'>+				 h_stats-&gt;rx_overrun_cnt;</div><div class='add'>+	stats-&gt;rx_crc_errors += h_stats-&gt;rx_fcs_error_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops hbg_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= hbg_net_open,</div><div class='ctx'> 	.ndo_stop		= hbg_net_stop,</div><div class='hunk'>@@ -142,8 +276,93 @@ static const struct net_device_ops hbg_netdev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address	= hbg_net_set_mac_address,</div><div class='ctx'> 	.ndo_change_mtu		= hbg_net_change_mtu,</div><div class='ctx'> 	.ndo_tx_timeout		= hbg_net_tx_timeout,</div><div class='add'>+	.ndo_set_rx_mode	= hbg_net_set_rx_mode,</div><div class='add'>+	.ndo_get_stats64	= hbg_net_get_stats,</div><div class='add'>+	.ndo_eth_ioctl		= phy_do_ioctl_running,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void hbg_service_task(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct hbg_priv *priv = container_of(work, struct hbg_priv,</div><div class='add'>+					     service_task.work);</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(HBG_NIC_STATE_NEED_RESET, &amp;priv-&gt;state))</div><div class='add'>+		hbg_err_reset(priv);</div><div class='add'>+</div><div class='add'>+	if (test_and_clear_bit(HBG_NIC_STATE_NP_LINK_FAIL, &amp;priv-&gt;state))</div><div class='add'>+		hbg_fix_np_link_fail(priv);</div><div class='add'>+</div><div class='add'>+	hbg_diagnose_message_push(priv);</div><div class='add'>+</div><div class='add'>+	/* The type of statistics register is u32,</div><div class='add'>+	 * To prevent the statistics register from overflowing,</div><div class='add'>+	 * the driver dumps the statistics every 30 seconds.</div><div class='add'>+	 */</div><div class='add'>+	if (time_after(jiffies, priv-&gt;last_update_stats_time + 30 * HZ)) {</div><div class='add'>+		hbg_update_stats(priv);</div><div class='add'>+		priv-&gt;last_update_stats_time = jiffies;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;service_task,</div><div class='add'>+			      msecs_to_jiffies(MSEC_PER_SEC));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_err_reset_task_schedule(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	set_bit(HBG_NIC_STATE_NEED_RESET, &amp;priv-&gt;state);</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;service_task, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_np_link_fail_task_schedule(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	set_bit(HBG_NIC_STATE_NP_LINK_FAIL, &amp;priv-&gt;state);</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;service_task, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_cancel_delayed_work_sync(void *data)</div><div class='add'>+{</div><div class='add'>+	cancel_delayed_work_sync(data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_delaywork_init(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	INIT_DELAYED_WORK(&amp;priv-&gt;service_task, hbg_service_task);</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;service_task, 0);</div><div class='add'>+	return devm_add_action_or_reset(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+					hbg_cancel_delayed_work_sync,</div><div class='add'>+					&amp;priv-&gt;service_task);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_mac_filter_init(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct hbg_dev_specs *dev_specs = &amp;priv-&gt;dev_specs;</div><div class='add'>+	struct hbg_mac_filter *filter = &amp;priv-&gt;filter;</div><div class='add'>+	struct hbg_mac_table_entry *tmp_table;</div><div class='add'>+</div><div class='add'>+	tmp_table = devm_kcalloc(&amp;priv-&gt;pdev-&gt;dev, dev_specs-&gt;uc_mac_num,</div><div class='add'>+				 sizeof(*tmp_table), GFP_KERNEL);</div><div class='add'>+	if (!tmp_table)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	filter-&gt;mac_table = tmp_table;</div><div class='add'>+	filter-&gt;table_max_len = dev_specs-&gt;uc_mac_num;</div><div class='add'>+	filter-&gt;enabled = true;</div><div class='add'>+</div><div class='add'>+	hbg_hw_set_mac_filter_enable(priv, filter-&gt;enabled);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_init_user_def(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_pauseparam *pause_param = &amp;priv-&gt;user_def.pause_param;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mac.pause_autoneg = HBG_STATUS_ENABLE;</div><div class='add'>+</div><div class='add'>+	pause_param-&gt;autoneg = priv-&gt;mac.pause_autoneg;</div><div class='add'>+	hbg_hw_get_pause_enable(priv, &amp;pause_param-&gt;tx_pause,</div><div class='add'>+				&amp;pause_param-&gt;rx_pause);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hbg_init(struct hbg_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -160,7 +379,21 @@ static int hbg_init(struct hbg_priv *priv)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return hbg_mdio_init(priv);</div><div class='add'>+	ret = hbg_mdio_init(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = hbg_mac_filter_init(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = hbg_delaywork_init(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	hbg_debugfs_init(priv);</div><div class='add'>+	hbg_init_user_def(priv);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hbg_pci_init(struct pci_dev *pdev)</div><div class='hunk'>@@ -184,7 +417,7 @@ static int hbg_pci_init(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;io_base = pcim_iomap_table(pdev)[0];</div><div class='ctx'> 	if (!priv-&gt;io_base)</div><div class='del'>-		return dev_err_probe(dev, -ENOMEM, "failed to get io base\n");</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -216,13 +449,18 @@ static int hbg_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	/* set default features */</div><div class='add'>+	netdev-&gt;features |= HBG_SUPPORT_FEATURES;</div><div class='add'>+	netdev-&gt;hw_features |= HBG_SUPPORT_FEATURES;</div><div class='add'>+	netdev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='add'>+</div><div class='ctx'> 	netdev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;</div><div class='ctx'> 	netdev-&gt;max_mtu = priv-&gt;dev_specs.max_mtu;</div><div class='ctx'> 	netdev-&gt;min_mtu = priv-&gt;dev_specs.min_mtu;</div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;hbg_netdev_ops;</div><div class='ctx'> 	netdev-&gt;watchdog_timeo = 5 * HZ;</div><div class='ctx'> </div><div class='del'>-	hbg_change_mtu(priv, ETH_DATA_LEN);</div><div class='add'>+	hbg_hw_set_mtu(priv, ETH_DATA_LEN);</div><div class='ctx'> 	hbg_net_set_mac_address(priv-&gt;netdev, &amp;priv-&gt;dev_specs.mac_addr);</div><div class='ctx'> 	hbg_ethtool_set_ops(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -234,6 +472,22 @@ static int hbg_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hbg_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	if (netif_running(netdev))</div><div class='add'>+		dev_close(netdev);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+</div><div class='add'>+	if (system_state == SYSTEM_POWER_OFF)</div><div class='add'>+		pci_set_power_state(pdev, PCI_D3hot);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct pci_device_id hbg_pci_tbl[] = {</div><div class='ctx'> 	{PCI_VDEVICE(HUAWEI, 0x3730), 0},</div><div class='ctx'> 	{ }</div><div class='hunk'>@@ -244,8 +498,29 @@ static struct pci_driver hbg_driver = {</div><div class='ctx'> 	.name		= "hibmcge",</div><div class='ctx'> 	.id_table	= hbg_pci_tbl,</div><div class='ctx'> 	.probe		= hbg_probe,</div><div class='add'>+	.shutdown	= hbg_shutdown,</div><div class='ctx'> };</div><div class='del'>-module_pci_driver(hbg_driver);</div><div class='add'>+</div><div class='add'>+static int __init hbg_module_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	hbg_debugfs_register();</div><div class='add'>+	hbg_set_pci_err_handler(&amp;hbg_driver);</div><div class='add'>+	ret = pci_register_driver(&amp;hbg_driver);</div><div class='add'>+	if (ret)</div><div class='add'>+		hbg_debugfs_unregister();</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+module_init(hbg_module_init);</div><div class='add'>+</div><div class='add'>+static void __exit hbg_module_exit(void)</div><div class='add'>+{</div><div class='add'>+	pci_unregister_driver(&amp;hbg_driver);</div><div class='add'>+	hbg_debugfs_unregister();</div><div class='add'>+}</div><div class='add'>+module_exit(hbg_module_exit);</div><div class='ctx'> </div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Huawei Tech. Co., Ltd.");</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c<br/>index a3479fba8501..b6f0a2780ea8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c</a></div><div class='hunk'>@@ -2,6 +2,8 @@</div><div class='ctx'> // Copyright (c) 2024 Hisilicon Limited.</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/phy_fixed.h&gt;</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> #include "hbg_common.h"</div><div class='ctx'> #include "hbg_hw.h"</div><div class='ctx'> #include "hbg_mdio.h"</div><div class='hunk'>@@ -17,6 +19,8 @@</div><div class='ctx'> #define HBG_MDIO_OP_TIMEOUT_US		(1 * 1000 * 1000)</div><div class='ctx'> #define HBG_MDIO_OP_INTERVAL_US		(5 * 1000)</div><div class='ctx'> </div><div class='add'>+#define HBG_NP_LINK_FAIL_RETRY_TIMES	5</div><div class='add'>+</div><div class='ctx'> static void hbg_mdio_set_command(struct hbg_mac *mac, u32 cmd)</div><div class='ctx'> {</div><div class='ctx'> 	hbg_reg_write(HBG_MAC_GET_PRIV(mac), HBG_REG_MDIO_COMMAND_ADDR, cmd);</div><div class='hunk'>@@ -114,6 +118,47 @@ static void hbg_mdio_init_hw(struct hbg_priv *priv)</div><div class='ctx'> 	hbg_mdio_set_command(mac, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hbg_flowctrl_cfg(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = priv-&gt;mac.phydev;</div><div class='add'>+	bool rx_pause;</div><div class='add'>+	bool tx_pause;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;mac.pause_autoneg)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	phy_get_pause(phydev, &amp;tx_pause, &amp;rx_pause);</div><div class='add'>+	hbg_hw_set_pause_enable(priv, tx_pause, rx_pause);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hbg_fix_np_link_fail(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;stats.np_link_fail_cnt &gt;= HBG_NP_LINK_FAIL_RETRY_TIMES) {</div><div class='add'>+		dev_err(dev, "failed to fix the MAC link status\n");</div><div class='add'>+		priv-&gt;stats.np_link_fail_cnt = 0;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;mac.phydev-&gt;link)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	priv-&gt;stats.np_link_fail_cnt++;</div><div class='add'>+	dev_err(dev, "failed to link between MAC and PHY, try to fix...\n");</div><div class='add'>+</div><div class='add'>+	/* Replace phy_reset() with phy_stop() and phy_start(),</div><div class='add'>+	 * as suggested by Andrew.</div><div class='add'>+	 */</div><div class='add'>+	hbg_phy_stop(priv);</div><div class='add'>+	hbg_phy_start(priv);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void hbg_phy_adjust_link(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct hbg_priv *priv = netdev_priv(netdev);</div><div class='hunk'>@@ -140,6 +185,7 @@ static void hbg_phy_adjust_link(struct net_device *netdev)</div><div class='ctx'> 			priv-&gt;mac.duplex = phydev-&gt;duplex;</div><div class='ctx'> 			priv-&gt;mac.autoneg = phydev-&gt;autoneg;</div><div class='ctx'> 			hbg_hw_adjust_link(priv, speed, phydev-&gt;duplex);</div><div class='add'>+			hbg_flowctrl_cfg(priv);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		priv-&gt;mac.link_status = phydev-&gt;link;</div><div class='hunk'>@@ -168,6 +214,7 @@ static int hbg_phy_connect(struct hbg_priv *priv)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);</div><div class='add'>+	phy_support_asym_pause(phydev);</div><div class='ctx'> 	phy_attached_info(phydev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -183,6 +230,39 @@ void hbg_phy_stop(struct hbg_priv *priv)</div><div class='ctx'> 	phy_stop(priv-&gt;mac.phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hbg_fixed_phy_uninit(void *data)</div><div class='add'>+{</div><div class='add'>+	fixed_phy_unregister((struct phy_device *)data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_fixed_phy_init(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct fixed_phy_status hbg_fixed_phy_status = {</div><div class='add'>+		.link = 1,</div><div class='add'>+		.speed = SPEED_1000,</div><div class='add'>+		.duplex = DUPLEX_FULL,</div><div class='add'>+		.pause = 1,</div><div class='add'>+		.asym_pause = 1,</div><div class='add'>+	};</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	phydev = fixed_phy_register(&amp;hbg_fixed_phy_status, NULL);</div><div class='add'>+	if (IS_ERR(phydev)) {</div><div class='add'>+		dev_err_probe(dev, PTR_ERR(phydev),</div><div class='add'>+			      "failed to register fixed PHY device\n");</div><div class='add'>+		return PTR_ERR(phydev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, hbg_fixed_phy_uninit, phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mac.phydev = phydev;</div><div class='add'>+	return hbg_phy_connect(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int hbg_mdio_init(struct hbg_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='hunk'>@@ -192,10 +272,12 @@ int hbg_mdio_init(struct hbg_priv *priv)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mac-&gt;phy_addr = priv-&gt;dev_specs.phy_addr;</div><div class='add'>+	if (mac-&gt;phy_addr == HBG_NO_PHY)</div><div class='add'>+		return hbg_fixed_phy_init(priv);</div><div class='add'>+</div><div class='ctx'> 	mdio_bus = devm_mdiobus_alloc(dev);</div><div class='ctx'> 	if (!mdio_bus)</div><div class='del'>-		return dev_err_probe(dev, -ENOMEM,</div><div class='del'>-				     "failed to alloc MDIO bus\n");</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	mdio_bus-&gt;parent = dev;</div><div class='ctx'> 	mdio_bus-&gt;priv = priv;</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.h<br/>index febd02a309c7..f3771c1bbd34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.h</a></div><div class='hunk'>@@ -9,4 +9,6 @@</div><div class='ctx'> int hbg_mdio_init(struct hbg_priv *priv);</div><div class='ctx'> void hbg_phy_start(struct hbg_priv *priv);</div><div class='ctx'> void hbg_phy_stop(struct hbg_priv *priv);</div><div class='add'>+void hbg_fix_np_link_fail(struct hbg_priv *priv);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h<br/>index 57d81c6d7633..30b3903c8f2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h</a></div><div class='hunk'>@@ -10,12 +10,21 @@</div><div class='ctx'> #define HBG_REG_MAC_ID_ADDR			0x0008</div><div class='ctx'> #define HBG_REG_PHY_ID_ADDR			0x000C</div><div class='ctx'> #define HBG_REG_MAC_ADDR_ADDR			0x0010</div><div class='add'>+#define HBG_REG_MAC_ADDR_HIGH_ADDR		0x0014</div><div class='add'>+#define HBG_REG_UC_MAC_NUM_ADDR			0x0018</div><div class='ctx'> #define HBG_REG_MDIO_FREQ_ADDR			0x0024</div><div class='ctx'> #define HBG_REG_MAX_MTU_ADDR			0x0028</div><div class='ctx'> #define HBG_REG_MIN_MTU_ADDR			0x002C</div><div class='ctx'> #define HBG_REG_TX_FIFO_NUM_ADDR		0x0030</div><div class='ctx'> #define HBG_REG_RX_FIFO_NUM_ADDR		0x0034</div><div class='ctx'> #define HBG_REG_VLAN_LAYERS_ADDR		0x0038</div><div class='add'>+#define HBG_REG_PUSH_REQ_ADDR			0x00F0</div><div class='add'>+#define HBG_REG_MSG_HEADER_ADDR			0x00F4</div><div class='add'>+#define HBG_REG_MSG_HEADER_OPCODE_M		GENMASK(7, 0)</div><div class='add'>+#define HBG_REG_MSG_HEADER_STATUS_M		GENMASK(11, 8)</div><div class='add'>+#define HBG_REG_MSG_HEADER_DATA_NUM_M		GENMASK(19, 12)</div><div class='add'>+#define HBG_REG_MSG_HEADER_RESP_CODE_M		GENMASK(27, 20)</div><div class='add'>+#define HBG_REG_MSG_DATA_BASE_ADDR		0x0100</div><div class='ctx'> </div><div class='ctx'> /* MDIO */</div><div class='ctx'> #define HBG_REG_MDIO_BASE			0x8000</div><div class='hunk'>@@ -28,6 +37,7 @@</div><div class='ctx'> #define HBG_REG_MDIO_COMMAND_OP_M		GENMASK(11, 10)</div><div class='ctx'> #define HBG_REG_MDIO_COMMAND_PRTAD_M		GENMASK(9, 5)</div><div class='ctx'> #define HBG_REG_MDIO_COMMAND_DEVAD_M		GENMASK(4, 0)</div><div class='add'>+#define HBG_REG_MDIO_ADDR_ADDR			(HBG_REG_MDIO_BASE + 0x0004)</div><div class='ctx'> #define HBG_REG_MDIO_WDATA_ADDR			(HBG_REG_MDIO_BASE + 0x0008)</div><div class='ctx'> #define HBG_REG_MDIO_WDATA_M			GENMASK(15, 0)</div><div class='ctx'> #define HBG_REG_MDIO_RDATA_ADDR			(HBG_REG_MDIO_BASE + 0x000C)</div><div class='hunk'>@@ -36,6 +46,10 @@</div><div class='ctx'> /* GMAC */</div><div class='ctx'> #define HBG_REG_SGMII_BASE			0x10000</div><div class='ctx'> #define HBG_REG_DUPLEX_TYPE_ADDR		(HBG_REG_SGMII_BASE + 0x0008)</div><div class='add'>+#define HBG_REG_FD_FC_TYPE_ADDR			(HBG_REG_SGMII_BASE + 0x000C)</div><div class='add'>+#define HBG_REG_FC_TX_TIMER_ADDR		(HBG_REG_SGMII_BASE + 0x001C)</div><div class='add'>+#define HBG_REG_FD_FC_ADDR_LOW_ADDR		(HBG_REG_SGMII_BASE + 0x0020)</div><div class='add'>+#define HBG_REG_FD_FC_ADDR_HIGH_ADDR		(HBG_REG_SGMII_BASE + 0x0024)</div><div class='ctx'> #define HBG_REG_DUPLEX_B			BIT(0)</div><div class='ctx'> #define HBG_REG_MAX_FRAME_SIZE_ADDR		(HBG_REG_SGMII_BASE + 0x003C)</div><div class='ctx'> #define HBG_REG_PORT_MODE_ADDR			(HBG_REG_SGMII_BASE + 0x0040)</div><div class='hunk'>@@ -43,20 +57,97 @@</div><div class='ctx'> #define HBG_REG_PORT_ENABLE_ADDR		(HBG_REG_SGMII_BASE + 0x0044)</div><div class='ctx'> #define HBG_REG_PORT_ENABLE_RX_B		BIT(1)</div><div class='ctx'> #define HBG_REG_PORT_ENABLE_TX_B		BIT(2)</div><div class='add'>+#define HBG_REG_PAUSE_ENABLE_ADDR		(HBG_REG_SGMII_BASE + 0x0048)</div><div class='add'>+#define HBG_REG_PAUSE_ENABLE_RX_B		BIT(0)</div><div class='add'>+#define HBG_REG_PAUSE_ENABLE_TX_B		BIT(1)</div><div class='add'>+#define HBG_REG_AN_NEG_STATE_ADDR		(HBG_REG_SGMII_BASE + 0x0058)</div><div class='add'>+#define HBG_REG_AN_NEG_STATE_NP_LINK_OK_B	BIT(15)</div><div class='ctx'> #define HBG_REG_TRANSMIT_CTRL_ADDR		(HBG_REG_SGMII_BASE + 0x0060)</div><div class='ctx'> #define HBG_REG_TRANSMIT_CTRL_PAD_EN_B		BIT(7)</div><div class='ctx'> #define HBG_REG_TRANSMIT_CTRL_CRC_ADD_B		BIT(6)</div><div class='ctx'> #define HBG_REG_TRANSMIT_CTRL_AN_EN_B		BIT(5)</div><div class='add'>+#define HBG_REG_REC_FILT_CTRL_ADDR		(HBG_REG_SGMII_BASE + 0x0064)</div><div class='add'>+#define HBG_REG_REC_FILT_CTRL_UC_MATCH_EN_B	BIT(0)</div><div class='add'>+#define HBG_REG_REC_FILT_CTRL_PAUSE_FRM_PASS_B	BIT(4)</div><div class='add'>+#define HBG_REG_RX_OCTETS_TOTAL_OK_ADDR		(HBG_REG_SGMII_BASE + 0x0080)</div><div class='add'>+#define HBG_REG_RX_OCTETS_BAD_ADDR		(HBG_REG_SGMII_BASE + 0x0084)</div><div class='add'>+#define HBG_REG_RX_UC_PKTS_ADDR			(HBG_REG_SGMII_BASE + 0x0088)</div><div class='add'>+#define HBG_REG_RX_MC_PKTS_ADDR			(HBG_REG_SGMII_BASE + 0x008C)</div><div class='add'>+#define HBG_REG_RX_BC_PKTS_ADDR			(HBG_REG_SGMII_BASE + 0x0090)</div><div class='add'>+#define HBG_REG_RX_PKTS_64OCTETS_ADDR		(HBG_REG_SGMII_BASE + 0x0094)</div><div class='add'>+#define HBG_REG_RX_PKTS_65TO127OCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x0098)</div><div class='add'>+#define HBG_REG_RX_PKTS_128TO255OCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x009C)</div><div class='add'>+#define HBG_REG_RX_PKTS_256TO511OCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x00A0)</div><div class='add'>+#define HBG_REG_RX_PKTS_512TO1023OCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x00A4)</div><div class='add'>+#define HBG_REG_RX_PKTS_1024TO1518OCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x00A8)</div><div class='add'>+#define HBG_REG_RX_PKTS_1519TOMAXOCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x00AC)</div><div class='add'>+#define HBG_REG_RX_FCS_ERRORS_ADDR		(HBG_REG_SGMII_BASE + 0x00B0)</div><div class='add'>+#define HBG_REG_RX_TAGGED_ADDR			(HBG_REG_SGMII_BASE + 0x00B4)</div><div class='add'>+#define HBG_REG_RX_DATA_ERR_ADDR		(HBG_REG_SGMII_BASE + 0x00B8)</div><div class='add'>+#define HBG_REG_RX_ALIGN_ERRORS_ADDR		(HBG_REG_SGMII_BASE + 0x00BC)</div><div class='add'>+#define HBG_REG_RX_LONG_ERRORS_ADDR		(HBG_REG_SGMII_BASE + 0x00C0)</div><div class='add'>+#define HBG_REG_RX_JABBER_ERRORS_ADDR		(HBG_REG_SGMII_BASE + 0x00C4)</div><div class='add'>+#define HBG_REG_RX_PAUSE_MACCTL_FRAMCOUNTER_ADDR   (HBG_REG_SGMII_BASE + 0x00C8)</div><div class='add'>+#define HBG_REG_RX_UNKNOWN_MACCTL_FRAMCOUNTER_ADDR (HBG_REG_SGMII_BASE + 0x00CC)</div><div class='add'>+#define HBG_REG_RX_VERY_LONG_ERR_CNT_ADDR	(HBG_REG_SGMII_BASE + 0x00D0)</div><div class='add'>+#define HBG_REG_RX_RUNT_ERR_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x00D4)</div><div class='add'>+#define HBG_REG_RX_SHORT_ERR_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x00D8)</div><div class='add'>+#define HBG_REG_RX_FILT_PKT_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x00E8)</div><div class='add'>+#define HBG_REG_RX_OCTETS_TOTAL_FILT_ADDR	(HBG_REG_SGMII_BASE + 0x00EC)</div><div class='add'>+#define HBG_REG_OCTETS_TRANSMITTED_OK_ADDR	(HBG_REG_SGMII_BASE + 0x0100)</div><div class='add'>+#define HBG_REG_OCTETS_TRANSMITTED_BAD_ADDR	(HBG_REG_SGMII_BASE + 0x0104)</div><div class='add'>+#define HBG_REG_TX_UC_PKTS_ADDR			(HBG_REG_SGMII_BASE + 0x0108)</div><div class='add'>+#define HBG_REG_TX_MC_PKTS_ADDR			(HBG_REG_SGMII_BASE + 0x010C)</div><div class='add'>+#define HBG_REG_TX_BC_PKTS_ADDR			(HBG_REG_SGMII_BASE + 0x0110)</div><div class='add'>+#define HBG_REG_TX_PKTS_64OCTETS_ADDR		(HBG_REG_SGMII_BASE + 0x0114)</div><div class='add'>+#define HBG_REG_TX_PKTS_65TO127OCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x0118)</div><div class='add'>+#define HBG_REG_TX_PKTS_128TO255OCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x011C)</div><div class='add'>+#define HBG_REG_TX_PKTS_256TO511OCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x0120)</div><div class='add'>+#define HBG_REG_TX_PKTS_512TO1023OCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x0124)</div><div class='add'>+#define HBG_REG_TX_PKTS_1024TO1518OCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x0128)</div><div class='add'>+#define HBG_REG_TX_PKTS_1519TOMAXOCTETS_ADDR	(HBG_REG_SGMII_BASE + 0x012C)</div><div class='add'>+#define HBG_REG_TX_EXCESSIVE_LENGTH_DROP_ADDR	(HBG_REG_SGMII_BASE + 0x014C)</div><div class='add'>+#define HBG_REG_TX_UNDERRUN_ADDR		(HBG_REG_SGMII_BASE + 0x0150)</div><div class='add'>+#define HBG_REG_TX_TAGGED_ADDR			(HBG_REG_SGMII_BASE + 0x0154)</div><div class='add'>+#define HBG_REG_TX_CRC_ERROR_ADDR		(HBG_REG_SGMII_BASE + 0x0158)</div><div class='add'>+#define HBG_REG_TX_PAUSE_FRAMES_ADDR		(HBG_REG_SGMII_BASE + 0x015C)</div><div class='add'>+#define HBG_REG_LINE_LOOP_BACK_ADDR		(HBG_REG_SGMII_BASE + 0x01A8)</div><div class='ctx'> #define HBG_REG_CF_CRC_STRIP_ADDR		(HBG_REG_SGMII_BASE + 0x01B0)</div><div class='ctx'> #define HBG_REG_CF_CRC_STRIP_B			BIT(0)</div><div class='ctx'> #define HBG_REG_MODE_CHANGE_EN_ADDR		(HBG_REG_SGMII_BASE + 0x01B4)</div><div class='ctx'> #define HBG_REG_MODE_CHANGE_EN_B		BIT(0)</div><div class='add'>+#define HBG_REG_LOOP_REG_ADDR			(HBG_REG_SGMII_BASE + 0x01DC)</div><div class='ctx'> #define HBG_REG_RECV_CTRL_ADDR			(HBG_REG_SGMII_BASE + 0x01E0)</div><div class='ctx'> #define HBG_REG_RECV_CTRL_STRIP_PAD_EN_B	BIT(3)</div><div class='add'>+#define HBG_REG_VLAN_CODE_ADDR			(HBG_REG_SGMII_BASE + 0x01E8)</div><div class='add'>+#define HBG_REG_RX_OVERRUN_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x01EC)</div><div class='add'>+#define HBG_REG_RX_LENGTHFIELD_ERR_CNT_ADDR	(HBG_REG_SGMII_BASE + 0x01F4)</div><div class='add'>+#define HBG_REG_RX_FAIL_COMMA_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x01F8)</div><div class='add'>+#define HBG_REG_STATION_ADDR_LOW_0_ADDR		(HBG_REG_SGMII_BASE + 0x0200)</div><div class='add'>+#define HBG_REG_STATION_ADDR_HIGH_0_ADDR	(HBG_REG_SGMII_BASE + 0x0204)</div><div class='add'>+#define HBG_REG_STATION_ADDR_LOW_1_ADDR		(HBG_REG_SGMII_BASE + 0x0208)</div><div class='add'>+#define HBG_REG_STATION_ADDR_HIGH_1_ADDR	(HBG_REG_SGMII_BASE + 0x020C)</div><div class='ctx'> #define HBG_REG_STATION_ADDR_LOW_2_ADDR		(HBG_REG_SGMII_BASE + 0x0210)</div><div class='ctx'> #define HBG_REG_STATION_ADDR_HIGH_2_ADDR	(HBG_REG_SGMII_BASE + 0x0214)</div><div class='add'>+#define HBG_REG_STATION_ADDR_LOW_3_ADDR		(HBG_REG_SGMII_BASE + 0x0218)</div><div class='add'>+#define HBG_REG_STATION_ADDR_HIGH_3_ADDR	(HBG_REG_SGMII_BASE + 0x021C)</div><div class='add'>+#define HBG_REG_STATION_ADDR_LOW_4_ADDR		(HBG_REG_SGMII_BASE + 0x0220)</div><div class='add'>+#define HBG_REG_STATION_ADDR_HIGH_4_ADDR	(HBG_REG_SGMII_BASE + 0x0224)</div><div class='add'>+#define HBG_REG_STATION_ADDR_LOW_5_ADDR		(HBG_REG_SGMII_BASE + 0x0228)</div><div class='add'>+#define HBG_REG_STATION_ADDR_HIGH_5_ADDR	(HBG_REG_SGMII_BASE + 0x022C)</div><div class='add'>+#define HBG_REG_STATION_ADDR_LOW_MSK_0		(HBG_REG_SGMII_BASE + 0x0230)</div><div class='add'>+#define HBG_REG_STATION_ADDR_LOW_MSK_1		(HBG_REG_SGMII_BASE + 0x0238)</div><div class='ctx'> </div><div class='ctx'> /* PCU */</div><div class='add'>+#define HBG_REG_TX_FIFO_THRSLD_ADDR		(HBG_REG_SGMII_BASE + 0x0420)</div><div class='add'>+#define HBG_REG_RX_FIFO_THRSLD_ADDR		(HBG_REG_SGMII_BASE + 0x0424)</div><div class='add'>+#define HBG_REG_FIFO_THRSLD_FULL_M		GENMASK(25, 16)</div><div class='add'>+#define HBG_REG_FIFO_THRSLD_EMPTY_M		GENMASK(9, 0)</div><div class='add'>+#define HBG_REG_CFG_FIFO_THRSLD_ADDR		(HBG_REG_SGMII_BASE + 0x0428)</div><div class='add'>+#define HBG_REG_CFG_FIFO_THRSLD_TX_FULL_M	GENMASK(31, 24)</div><div class='add'>+#define HBG_REG_CFG_FIFO_THRSLD_TX_EMPTY_M	GENMASK(23, 16)</div><div class='add'>+#define HBG_REG_CFG_FIFO_THRSLD_RX_FULL_M	GENMASK(15, 8)</div><div class='add'>+#define HBG_REG_CFG_FIFO_THRSLD_RX_EMPTY_M	GENMASK(7, 0)</div><div class='ctx'> #define HBG_REG_CF_INTRPT_MSK_ADDR		(HBG_REG_SGMII_BASE + 0x042C)</div><div class='ctx'> #define HBG_INT_MSK_WE_ERR_B			BIT(31)</div><div class='ctx'> #define HBG_INT_MSK_RBREQ_ERR_B			BIT(30)</div><div class='hunk'>@@ -74,20 +165,34 @@</div><div class='ctx'> #define HBG_INT_MSK_MAC_PCS_TX_FIFO_ERR_B	BIT(17)</div><div class='ctx'> #define HBG_INT_MSK_MAC_PCS_RX_FIFO_ERR_B	BIT(16)</div><div class='ctx'> #define HBG_INT_MSK_MAC_MII_FIFO_ERR_B		BIT(15)</div><div class='add'>+#define HBG_INT_MSK_TX_PKT_CPL_B		BIT(14)</div><div class='ctx'> #define HBG_INT_MSK_TX_B			BIT(1) /* just used in driver */</div><div class='ctx'> #define HBG_INT_MSK_RX_B			BIT(0) /* just used in driver */</div><div class='ctx'> #define HBG_REG_CF_INTRPT_STAT_ADDR		(HBG_REG_SGMII_BASE + 0x0434)</div><div class='ctx'> #define HBG_REG_CF_INTRPT_CLR_ADDR		(HBG_REG_SGMII_BASE + 0x0438)</div><div class='add'>+#define HBG_REG_TX_BUS_ERR_ADDR_ADDR		(HBG_REG_SGMII_BASE + 0x043C)</div><div class='add'>+#define HBG_REG_RX_BUS_ERR_ADDR_ADDR		(HBG_REG_SGMII_BASE + 0x0440)</div><div class='ctx'> #define HBG_REG_MAX_FRAME_LEN_ADDR		(HBG_REG_SGMII_BASE + 0x0444)</div><div class='ctx'> #define HBG_REG_MAX_FRAME_LEN_M			GENMASK(15, 0)</div><div class='add'>+#define HBG_REG_TX_DROP_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x0448)</div><div class='add'>+#define HBG_REG_RX_OVER_FLOW_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x044C)</div><div class='add'>+#define HBG_REG_DEBUG_ST_MCH_ADDR		(HBG_REG_SGMII_BASE + 0x0450)</div><div class='add'>+#define HBG_REG_FIFO_CURR_STATUS_ADDR		(HBG_REG_SGMII_BASE + 0x0454)</div><div class='add'>+#define HBG_REG_FIFO_HIST_STATUS_ADDR		(HBG_REG_SGMII_BASE + 0x0458)</div><div class='ctx'> #define HBG_REG_CF_CFF_DATA_NUM_ADDR		(HBG_REG_SGMII_BASE + 0x045C)</div><div class='ctx'> #define HBG_REG_CF_CFF_DATA_NUM_ADDR_TX_M	GENMASK(8, 0)</div><div class='ctx'> #define HBG_REG_CF_CFF_DATA_NUM_ADDR_RX_M	GENMASK(24, 16)</div><div class='add'>+#define HBG_REG_TX_CS_FAIL_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x0460)</div><div class='add'>+#define HBG_REG_RX_TRANS_PKG_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x0464)</div><div class='add'>+#define HBG_REG_TX_TRANS_PKG_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x0468)</div><div class='add'>+#define HBG_REG_CF_TX_PAUSE_ADDR		(HBG_REG_SGMII_BASE + 0x0470)</div><div class='ctx'> #define HBG_REG_TX_CFF_ADDR_0_ADDR		(HBG_REG_SGMII_BASE + 0x0488)</div><div class='ctx'> #define HBG_REG_TX_CFF_ADDR_1_ADDR		(HBG_REG_SGMII_BASE + 0x048C)</div><div class='ctx'> #define HBG_REG_TX_CFF_ADDR_2_ADDR		(HBG_REG_SGMII_BASE + 0x0490)</div><div class='ctx'> #define HBG_REG_TX_CFF_ADDR_3_ADDR		(HBG_REG_SGMII_BASE + 0x0494)</div><div class='ctx'> #define HBG_REG_RX_CFF_ADDR_ADDR		(HBG_REG_SGMII_BASE + 0x04A0)</div><div class='add'>+#define HBG_REG_BRUST_LENGTH_ADDR		(HBG_REG_SGMII_BASE + 0x04C4)</div><div class='add'>+#define HBG_REG_BRUST_LENGTH_B			BIT(29)</div><div class='ctx'> #define HBG_REG_RX_BUF_SIZE_ADDR		(HBG_REG_SGMII_BASE + 0x04E4)</div><div class='ctx'> #define HBG_REG_RX_BUF_SIZE_M			GENMASK(15, 0)</div><div class='ctx'> #define HBG_REG_BUS_CTRL_ADDR			(HBG_REG_SGMII_BASE + 0x04E8)</div><div class='hunk'>@@ -101,6 +206,13 @@</div><div class='ctx'> #define HBG_REG_RX_CTRL_RXBUF_1ST_SKIP_SIZE2_M	GENMASK(3, 0)</div><div class='ctx'> #define HBG_REG_RX_PKT_MODE_ADDR		(HBG_REG_SGMII_BASE + 0x04F4)</div><div class='ctx'> #define HBG_REG_RX_PKT_MODE_PARSE_MODE_M	GENMASK(22, 21)</div><div class='add'>+#define HBG_REG_RX_BUFRQ_ERR_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x058C)</div><div class='add'>+#define HBG_REG_TX_BUFRL_ERR_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x0590)</div><div class='add'>+#define HBG_REG_RX_WE_ERR_CNT_ADDR		(HBG_REG_SGMII_BASE + 0x0594)</div><div class='add'>+#define HBG_REG_DBG_ST0_ADDR			(HBG_REG_SGMII_BASE + 0x05E4)</div><div class='add'>+#define HBG_REG_DBG_ST1_ADDR			(HBG_REG_SGMII_BASE + 0x05E8)</div><div class='add'>+#define HBG_REG_DBG_ST2_ADDR			(HBG_REG_SGMII_BASE + 0x05EC)</div><div class='add'>+#define HBG_REG_BUS_RST_EN_ADDR			(HBG_REG_SGMII_BASE + 0x0688)</div><div class='ctx'> #define HBG_REG_CF_IND_TXINT_MSK_ADDR		(HBG_REG_SGMII_BASE + 0x0694)</div><div class='ctx'> #define HBG_REG_IND_INTR_MASK_B			BIT(0)</div><div class='ctx'> #define HBG_REG_CF_IND_TXINT_STAT_ADDR		(HBG_REG_SGMII_BASE + 0x0698)</div><div class='hunk'>@@ -139,5 +251,52 @@ struct hbg_rx_desc {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define HBG_RX_DESC_W2_PKT_LEN_M	GENMASK(31, 16)</div><div class='add'>+#define HBG_RX_DESC_W2_PORT_NUM_M	GENMASK(15, 12)</div><div class='add'>+#define HBG_RX_DESC_W3_IP_OFFSET_M	GENMASK(23, 16)</div><div class='add'>+#define HBG_RX_DESC_W3_VLAN_M		GENMASK(15, 0)</div><div class='add'>+#define HBG_RX_DESC_W4_IP_TCP_UDP_M	GENMASK(31, 30)</div><div class='add'>+#define HBG_RX_DESC_W4_IPSEC_B		BIT(29)</div><div class='add'>+#define HBG_RX_DESC_W4_IP_VERSION_B	BIT(28)</div><div class='add'>+#define HBG_RX_DESC_W4_L4_ERR_CODE_M	GENMASK(26, 23)</div><div class='add'>+#define HBG_RX_DESC_W4_FRAG_B		BIT(22)</div><div class='add'>+#define HBG_RX_DESC_W4_OPT_B		BIT(21)</div><div class='add'>+#define HBG_RX_DESC_W4_IP_VERSION_ERR_B	BIT(20)</div><div class='add'>+#define HBG_RX_DESC_W4_BRD_CST_B	BIT(19)</div><div class='add'>+#define HBG_RX_DESC_W4_MUL_CST_B	BIT(18)</div><div class='add'>+#define HBG_RX_DESC_W4_ARP_B		BIT(17)</div><div class='add'>+#define HBG_RX_DESC_W4_RARP_B		BIT(16)</div><div class='add'>+#define HBG_RX_DESC_W4_ICMP_B		BIT(15)</div><div class='add'>+#define HBG_RX_DESC_W4_VLAN_FLAG_B	BIT(14)</div><div class='add'>+#define HBG_RX_DESC_W4_DROP_B		BIT(13)</div><div class='add'>+#define HBG_RX_DESC_W4_L3_ERR_CODE_M	GENMASK(12, 9)</div><div class='add'>+#define HBG_RX_DESC_W4_L2_ERR_B		BIT(8)</div><div class='add'>+#define HBG_RX_DESC_W4_IDX_MATCH_B	BIT(7)</div><div class='add'>+#define HBG_RX_DESC_W4_PARSE_MODE_M	GENMASK(6, 5)</div><div class='add'>+#define HBG_RX_DESC_W5_VALID_SIZE_M	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+enum hbg_l3_err_code {</div><div class='add'>+	HBG_L3_OK = 0,</div><div class='add'>+	HBG_L3_WRONG_HEAD,</div><div class='add'>+	HBG_L3_CSUM_ERR,</div><div class='add'>+	HBG_L3_LEN_ERR,</div><div class='add'>+	HBG_L3_ZERO_TTL,</div><div class='add'>+	HBG_L3_RSVD,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hbg_l4_err_code {</div><div class='add'>+	HBG_L4_OK = 0,</div><div class='add'>+	HBG_L4_WRONG_HEAD,</div><div class='add'>+	HBG_L4_LEN_ERR,</div><div class='add'>+	HBG_L4_CSUM_ERR,</div><div class='add'>+	HBG_L4_ZERO_PORT_NUM,</div><div class='add'>+	HBG_L4_RSVD,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hbg_pkt_type_code {</div><div class='add'>+	HBG_NO_IP_PKT = 0,</div><div class='add'>+	HBG_IP_PKT,</div><div class='add'>+	HBG_TCP_PKT,</div><div class='add'>+	HBG_UDP_PKT,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_trace.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_trace.h<br/>new file mode 100644<br/>index 000000000000..b70fd960da8d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_trace.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_trace.h</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0+ */</div><div class='add'>+/* Copyright (c) 2025 Hisilicon Limited. */</div><div class='add'>+</div><div class='add'>+/* This must be outside ifdef _HBG_TRACE_H */</div><div class='add'>+#undef TRACE_SYSTEM</div><div class='add'>+#define TRACE_SYSTEM hibmcge</div><div class='add'>+</div><div class='add'>+#if !defined(_HBG_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ)</div><div class='add'>+#define _HBG_TRACE_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/tracepoint.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include "hbg_reg.h"</div><div class='add'>+</div><div class='add'>+TRACE_EVENT(hbg_rx_desc,</div><div class='add'>+	    TP_PROTO(struct hbg_priv *priv, u32 index,</div><div class='add'>+		     struct hbg_rx_desc *rx_desc),</div><div class='add'>+	    TP_ARGS(priv, index, rx_desc),</div><div class='add'>+</div><div class='add'>+	    TP_STRUCT__entry(__field(u32, index)</div><div class='add'>+			     __field(u8, port_num)</div><div class='add'>+			     __field(u8, ip_offset)</div><div class='add'>+			     __field(u8, parse_mode)</div><div class='add'>+			     __field(u8, l4_error_code)</div><div class='add'>+			     __field(u8, l3_error_code)</div><div class='add'>+			     __field(u8, l2_error_code)</div><div class='add'>+			     __field(u16, packet_len)</div><div class='add'>+			     __field(u16, valid_size)</div><div class='add'>+			     __field(u16, vlan)</div><div class='add'>+			     __string(pciname, pci_name(priv-&gt;pdev))</div><div class='add'>+			     __string(devname, priv-&gt;netdev-&gt;name)</div><div class='add'>+	    ),</div><div class='add'>+</div><div class='add'>+	    TP_fast_assign(__entry-&gt;index = index,</div><div class='add'>+			   __entry-&gt;packet_len =</div><div class='add'>+				FIELD_GET(HBG_RX_DESC_W2_PKT_LEN_M,</div><div class='add'>+					  rx_desc-&gt;word2);</div><div class='add'>+			   __entry-&gt;port_num =</div><div class='add'>+				FIELD_GET(HBG_RX_DESC_W2_PORT_NUM_M,</div><div class='add'>+					  rx_desc-&gt;word2);</div><div class='add'>+			   __entry-&gt;ip_offset =</div><div class='add'>+				FIELD_GET(HBG_RX_DESC_W3_IP_OFFSET_M,</div><div class='add'>+					  rx_desc-&gt;word3);</div><div class='add'>+			   __entry-&gt;vlan =</div><div class='add'>+				FIELD_GET(HBG_RX_DESC_W3_VLAN_M,</div><div class='add'>+					  rx_desc-&gt;word3);</div><div class='add'>+			   __entry-&gt;parse_mode =</div><div class='add'>+				FIELD_GET(HBG_RX_DESC_W4_PARSE_MODE_M,</div><div class='add'>+					  rx_desc-&gt;word4);</div><div class='add'>+			   __entry-&gt;l4_error_code =</div><div class='add'>+				FIELD_GET(HBG_RX_DESC_W4_L4_ERR_CODE_M,</div><div class='add'>+					  rx_desc-&gt;word4);</div><div class='add'>+			   __entry-&gt;l3_error_code =</div><div class='add'>+				FIELD_GET(HBG_RX_DESC_W4_L3_ERR_CODE_M,</div><div class='add'>+					  rx_desc-&gt;word4);</div><div class='add'>+			   __entry-&gt;l2_error_code =</div><div class='add'>+				FIELD_GET(HBG_RX_DESC_W4_L2_ERR_B,</div><div class='add'>+					  rx_desc-&gt;word4);</div><div class='add'>+			   __entry-&gt;valid_size =</div><div class='add'>+				FIELD_GET(HBG_RX_DESC_W5_VALID_SIZE_M,</div><div class='add'>+					  rx_desc-&gt;word5);</div><div class='add'>+			   __assign_str(pciname);</div><div class='add'>+			   __assign_str(devname);</div><div class='add'>+	    ),</div><div class='add'>+</div><div class='add'>+	    TP_printk("%s %s index:%u, port num:%u, len:%u, valid size:%u, ip_offset:%u, vlan:0x%04x, parse mode:%u, l4_err:0x%x, l3_err:0x%x, l2_err:0x%x",</div><div class='add'>+		      __get_str(pciname), __get_str(devname), __entry-&gt;index,</div><div class='add'>+		      __entry-&gt;port_num, __entry-&gt;packet_len,</div><div class='add'>+		      __entry-&gt;valid_size, __entry-&gt;ip_offset,  __entry-&gt;vlan,</div><div class='add'>+		      __entry-&gt;parse_mode, __entry-&gt;l4_error_code,</div><div class='add'>+		      __entry-&gt;l3_error_code, __entry-&gt;l2_error_code</div><div class='add'>+	    )</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+#endif /* _HBG_TRACE_H_ */</div><div class='add'>+</div><div class='add'>+/* This must be outside ifdef _HBG_TRACE_H */</div><div class='add'>+#undef TRACE_INCLUDE_PATH</div><div class='add'>+#define TRACE_INCLUDE_PATH .</div><div class='add'>+#undef TRACE_INCLUDE_FILE</div><div class='add'>+#define TRACE_INCLUDE_FILE hbg_trace</div><div class='add'>+#include &lt;trace/define_trace.h&gt;</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c<br/>index f4f256a0dfea..a4ea92c31c2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c</a></div><div class='hunk'>@@ -7,6 +7,9 @@</div><div class='ctx'> #include "hbg_reg.h"</div><div class='ctx'> #include "hbg_txrx.h"</div><div class='ctx'> </div><div class='add'>+#define CREATE_TRACE_POINTS</div><div class='add'>+#include "hbg_trace.h"</div><div class='add'>+</div><div class='ctx'> #define netdev_get_tx_ring(netdev) \</div><div class='ctx'> 			(&amp;(((struct hbg_priv *)netdev_priv(netdev))-&gt;tx_ring))</div><div class='ctx'> </div><div class='hunk'>@@ -28,6 +31,11 @@</div><div class='ctx'> 	typeof(ring) _ring = (ring); \</div><div class='ctx'> 	_ring-&gt;p = hbg_queue_next_prt(_ring-&gt;p, _ring); })</div><div class='ctx'> </div><div class='add'>+#define hbg_get_page_order(ring) ({ \</div><div class='add'>+	typeof(ring) _ring = (ring); \</div><div class='add'>+	get_order(hbg_spec_max_frame_len(_ring-&gt;priv, _ring-&gt;dir)); })</div><div class='add'>+#define hbg_get_page_size(ring) (PAGE_SIZE &lt;&lt; hbg_get_page_order((ring)))</div><div class='add'>+</div><div class='ctx'> #define HBG_TX_STOP_THRS	2</div><div class='ctx'> #define HBG_TX_START_THRS	(2 * HBG_TX_STOP_THRS)</div><div class='ctx'> </div><div class='hunk'>@@ -38,8 +46,14 @@ static int hbg_dma_map(struct hbg_buffer *buffer)</div><div class='ctx'> 	buffer-&gt;skb_dma = dma_map_single(&amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 					 buffer-&gt;skb-&gt;data, buffer-&gt;skb_len,</div><div class='ctx'> 					 buffer_to_dma_dir(buffer));</div><div class='del'>-	if (unlikely(dma_mapping_error(&amp;priv-&gt;pdev-&gt;dev, buffer-&gt;skb_dma)))</div><div class='add'>+	if (unlikely(dma_mapping_error(&amp;priv-&gt;pdev-&gt;dev, buffer-&gt;skb_dma))) {</div><div class='add'>+		if (buffer-&gt;dir == HBG_DIR_RX)</div><div class='add'>+			priv-&gt;stats.rx_dma_err_cnt++;</div><div class='add'>+		else</div><div class='add'>+			priv-&gt;stats.tx_dma_err_cnt++;</div><div class='add'>+</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -56,6 +70,43 @@ static void hbg_dma_unmap(struct hbg_buffer *buffer)</div><div class='ctx'> 	buffer-&gt;skb_dma = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hbg_buffer_free_page(struct hbg_buffer *buffer)</div><div class='add'>+{</div><div class='add'>+	struct hbg_ring *ring = buffer-&gt;ring;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!buffer-&gt;page))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	page_pool_put_full_page(ring-&gt;page_pool, buffer-&gt;page, false);</div><div class='add'>+</div><div class='add'>+	buffer-&gt;page = NULL;</div><div class='add'>+	buffer-&gt;page_dma = 0;</div><div class='add'>+	buffer-&gt;page_addr = NULL;</div><div class='add'>+	buffer-&gt;page_size = 0;</div><div class='add'>+	buffer-&gt;page_offset = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_buffer_alloc_page(struct hbg_buffer *buffer)</div><div class='add'>+{</div><div class='add'>+	struct hbg_ring *ring = buffer-&gt;ring;</div><div class='add'>+	u32 len = hbg_get_page_size(ring);</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!ring-&gt;page_pool))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	buffer-&gt;page = page_pool_dev_alloc_frag(ring-&gt;page_pool, &amp;offset, len);</div><div class='add'>+	if (unlikely(!buffer-&gt;page))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	buffer-&gt;page_dma = page_pool_get_dma_addr(buffer-&gt;page) + offset;</div><div class='add'>+	buffer-&gt;page_addr = page_address(buffer-&gt;page) + offset;</div><div class='add'>+	buffer-&gt;page_size = len;</div><div class='add'>+	buffer-&gt;page_offset = offset;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void hbg_init_tx_desc(struct hbg_buffer *buffer,</div><div class='ctx'> 			     struct hbg_tx_desc *tx_desc)</div><div class='ctx'> {</div><div class='hunk'>@@ -129,24 +180,14 @@ static void hbg_buffer_free_skb(struct hbg_buffer *buffer)</div><div class='ctx'> 	buffer-&gt;skb = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hbg_buffer_alloc_skb(struct hbg_buffer *buffer)</div><div class='del'>-{</div><div class='del'>-	u32 len = hbg_spec_max_frame_len(buffer-&gt;priv, buffer-&gt;dir);</div><div class='del'>-	struct hbg_priv *priv = buffer-&gt;priv;</div><div class='del'>-</div><div class='del'>-	buffer-&gt;skb = netdev_alloc_skb(priv-&gt;netdev, len);</div><div class='del'>-	if (unlikely(!buffer-&gt;skb))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	buffer-&gt;skb_len = len;</div><div class='del'>-	memset(buffer-&gt;skb-&gt;data, 0, HBG_PACKET_HEAD_SIZE);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void hbg_buffer_free(struct hbg_buffer *buffer)</div><div class='ctx'> {</div><div class='del'>-	hbg_dma_unmap(buffer);</div><div class='del'>-	hbg_buffer_free_skb(buffer);</div><div class='add'>+	if (buffer-&gt;skb) {</div><div class='add'>+		hbg_dma_unmap(buffer);</div><div class='add'>+		return hbg_buffer_free_skb(buffer);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hbg_buffer_free_page(buffer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hbg_napi_tx_recycle(struct napi_struct *napi, int budget)</div><div class='hunk'>@@ -195,31 +236,217 @@ static int hbg_napi_tx_recycle(struct napi_struct *napi, int budget)</div><div class='ctx'> 	return packet_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool hbg_rx_check_l3l4_error(struct hbg_priv *priv,</div><div class='add'>+				    struct hbg_rx_desc *desc,</div><div class='add'>+				    struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	bool rx_checksum_offload = !!(priv-&gt;netdev-&gt;features &amp; NETIF_F_RXCSUM);</div><div class='add'>+</div><div class='add'>+	skb-&gt;ip_summed = rx_checksum_offload ?</div><div class='add'>+			 CHECKSUM_UNNECESSARY : CHECKSUM_NONE;</div><div class='add'>+</div><div class='add'>+	if (likely(!FIELD_GET(HBG_RX_DESC_W4_L3_ERR_CODE_M, desc-&gt;word4) &amp;&amp;</div><div class='add'>+		   !FIELD_GET(HBG_RX_DESC_W4_L4_ERR_CODE_M, desc-&gt;word4)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	switch (FIELD_GET(HBG_RX_DESC_W4_L3_ERR_CODE_M, desc-&gt;word4)) {</div><div class='add'>+	case HBG_L3_OK:</div><div class='add'>+		break;</div><div class='add'>+	case HBG_L3_WRONG_HEAD:</div><div class='add'>+		priv-&gt;stats.rx_desc_l3_wrong_head_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	case HBG_L3_CSUM_ERR:</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		priv-&gt;stats.rx_desc_l3_csum_err_cnt++;</div><div class='add'>+</div><div class='add'>+		/* Don't drop packets on csum validation failure,</div><div class='add'>+		 * suggest by Jakub</div><div class='add'>+		 */</div><div class='add'>+		break;</div><div class='add'>+	case HBG_L3_LEN_ERR:</div><div class='add'>+		priv-&gt;stats.rx_desc_l3_len_err_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	case HBG_L3_ZERO_TTL:</div><div class='add'>+		priv-&gt;stats.rx_desc_l3_zero_ttl_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	default:</div><div class='add'>+		priv-&gt;stats.rx_desc_l3_other_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (FIELD_GET(HBG_RX_DESC_W4_L4_ERR_CODE_M, desc-&gt;word4)) {</div><div class='add'>+	case HBG_L4_OK:</div><div class='add'>+		break;</div><div class='add'>+	case HBG_L4_WRONG_HEAD:</div><div class='add'>+		priv-&gt;stats.rx_desc_l4_wrong_head_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	case HBG_L4_LEN_ERR:</div><div class='add'>+		priv-&gt;stats.rx_desc_l4_len_err_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	case HBG_L4_CSUM_ERR:</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		priv-&gt;stats.rx_desc_l4_csum_err_cnt++;</div><div class='add'>+</div><div class='add'>+		/* Don't drop packets on csum validation failure,</div><div class='add'>+		 * suggest by Jakub</div><div class='add'>+		 */</div><div class='add'>+		break;</div><div class='add'>+	case HBG_L4_ZERO_PORT_NUM:</div><div class='add'>+		priv-&gt;stats.rx_desc_l4_zero_port_num_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	default:</div><div class='add'>+		priv-&gt;stats.rx_desc_l4_other_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_update_rx_ip_protocol_stats(struct hbg_priv *priv,</div><div class='add'>+					    struct hbg_rx_desc *desc)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!FIELD_GET(HBG_RX_DESC_W4_IP_TCP_UDP_M, desc-&gt;word4))) {</div><div class='add'>+		priv-&gt;stats.rx_desc_no_ip_pkt_cnt++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(FIELD_GET(HBG_RX_DESC_W4_IP_VERSION_ERR_B, desc-&gt;word4))) {</div><div class='add'>+		priv-&gt;stats.rx_desc_ip_ver_err_cnt++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 0:ipv4, 1:ipv6 */</div><div class='add'>+	if (FIELD_GET(HBG_RX_DESC_W4_IP_VERSION_B, desc-&gt;word4))</div><div class='add'>+		priv-&gt;stats.rx_desc_ipv6_pkt_cnt++;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;stats.rx_desc_ipv4_pkt_cnt++;</div><div class='add'>+</div><div class='add'>+	switch (FIELD_GET(HBG_RX_DESC_W4_IP_TCP_UDP_M, desc-&gt;word4)) {</div><div class='add'>+	case HBG_IP_PKT:</div><div class='add'>+		priv-&gt;stats.rx_desc_ip_pkt_cnt++;</div><div class='add'>+		if (FIELD_GET(HBG_RX_DESC_W4_OPT_B, desc-&gt;word4))</div><div class='add'>+			priv-&gt;stats.rx_desc_ip_opt_pkt_cnt++;</div><div class='add'>+		if (FIELD_GET(HBG_RX_DESC_W4_FRAG_B, desc-&gt;word4))</div><div class='add'>+			priv-&gt;stats.rx_desc_frag_cnt++;</div><div class='add'>+</div><div class='add'>+		if (FIELD_GET(HBG_RX_DESC_W4_ICMP_B, desc-&gt;word4))</div><div class='add'>+			priv-&gt;stats.rx_desc_icmp_pkt_cnt++;</div><div class='add'>+		else if (FIELD_GET(HBG_RX_DESC_W4_IPSEC_B, desc-&gt;word4))</div><div class='add'>+			priv-&gt;stats.rx_desc_ipsec_pkt_cnt++;</div><div class='add'>+		break;</div><div class='add'>+	case HBG_TCP_PKT:</div><div class='add'>+		priv-&gt;stats.rx_desc_tcp_pkt_cnt++;</div><div class='add'>+		break;</div><div class='add'>+	case HBG_UDP_PKT:</div><div class='add'>+		priv-&gt;stats.rx_desc_udp_pkt_cnt++;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		priv-&gt;stats.rx_desc_no_ip_pkt_cnt++;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hbg_update_rx_protocol_stats(struct hbg_priv *priv,</div><div class='add'>+					 struct hbg_rx_desc *desc)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!FIELD_GET(HBG_RX_DESC_W4_IDX_MATCH_B, desc-&gt;word4))) {</div><div class='add'>+		priv-&gt;stats.rx_desc_key_not_match_cnt++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(HBG_RX_DESC_W4_BRD_CST_B, desc-&gt;word4))</div><div class='add'>+		priv-&gt;stats.rx_desc_broadcast_pkt_cnt++;</div><div class='add'>+	else if (FIELD_GET(HBG_RX_DESC_W4_MUL_CST_B, desc-&gt;word4))</div><div class='add'>+		priv-&gt;stats.rx_desc_multicast_pkt_cnt++;</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(HBG_RX_DESC_W4_VLAN_FLAG_B, desc-&gt;word4))</div><div class='add'>+		priv-&gt;stats.rx_desc_vlan_pkt_cnt++;</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(HBG_RX_DESC_W4_ARP_B, desc-&gt;word4)) {</div><div class='add'>+		priv-&gt;stats.rx_desc_arp_pkt_cnt++;</div><div class='add'>+		return;</div><div class='add'>+	} else if (FIELD_GET(HBG_RX_DESC_W4_RARP_B, desc-&gt;word4)) {</div><div class='add'>+		priv-&gt;stats.rx_desc_rarp_pkt_cnt++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hbg_update_rx_ip_protocol_stats(priv, desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool hbg_rx_pkt_check(struct hbg_priv *priv, struct hbg_rx_desc *desc,</div><div class='add'>+			     struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(FIELD_GET(HBG_RX_DESC_W2_PKT_LEN_M, desc-&gt;word2) &gt;</div><div class='add'>+		     priv-&gt;dev_specs.max_frame_len)) {</div><div class='add'>+		priv-&gt;stats.rx_desc_pkt_len_err_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(FIELD_GET(HBG_RX_DESC_W2_PORT_NUM_M, desc-&gt;word2) !=</div><div class='add'>+		     priv-&gt;dev_specs.mac_id ||</div><div class='add'>+		     FIELD_GET(HBG_RX_DESC_W4_DROP_B, desc-&gt;word4))) {</div><div class='add'>+		priv-&gt;stats.rx_desc_drop++;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(FIELD_GET(HBG_RX_DESC_W4_L2_ERR_B, desc-&gt;word4))) {</div><div class='add'>+		priv-&gt;stats.rx_desc_l2_err_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(!hbg_rx_check_l3l4_error(priv, desc, skb))) {</div><div class='add'>+		priv-&gt;stats.rx_desc_l3l4_err_cnt++;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hbg_update_rx_protocol_stats(priv, desc);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hbg_rx_fill_one_buffer(struct hbg_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct hbg_ring *ring = &amp;priv-&gt;rx_ring;</div><div class='ctx'> 	struct hbg_buffer *buffer;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (hbg_queue_is_full(ring-&gt;ntc, ring-&gt;ntu, ring))</div><div class='add'>+	if (hbg_queue_is_full(ring-&gt;ntc, ring-&gt;ntu, ring) ||</div><div class='add'>+	    hbg_fifo_is_full(priv, ring-&gt;dir))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	buffer = &amp;ring-&gt;queue[ring-&gt;ntu];</div><div class='del'>-	ret = hbg_buffer_alloc_skb(buffer);</div><div class='add'>+	ret = hbg_buffer_alloc_page(buffer);</div><div class='ctx'> 	if (unlikely(ret))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = hbg_dma_map(buffer);</div><div class='del'>-	if (unlikely(ret)) {</div><div class='del'>-		hbg_buffer_free_skb(buffer);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='add'>+	memset(buffer-&gt;page_addr, 0, HBG_PACKET_HEAD_SIZE);</div><div class='add'>+	dma_sync_single_for_device(&amp;priv-&gt;pdev-&gt;dev, buffer-&gt;page_dma,</div><div class='add'>+				   HBG_PACKET_HEAD_SIZE, DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='del'>-	hbg_hw_fill_buffer(priv, buffer-&gt;skb_dma);</div><div class='add'>+	hbg_hw_fill_buffer(priv, buffer-&gt;page_dma);</div><div class='ctx'> 	hbg_queue_move_next(ntu, ring);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hbg_rx_fill_buffers(struct hbg_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 remained = hbg_hw_get_fifo_used_num(priv, HBG_DIR_RX);</div><div class='add'>+	u32 max_count = priv-&gt;dev_specs.rx_fifo_num;</div><div class='add'>+	u32 refill_count;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (unlikely(remained &gt;= max_count))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	refill_count = max_count - remained;</div><div class='add'>+	while (refill_count--) {</div><div class='add'>+		ret = hbg_rx_fill_one_buffer(priv);</div><div class='add'>+		if (unlikely(ret))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool hbg_sync_data_from_hw(struct hbg_priv *priv,</div><div class='ctx'> 				  struct hbg_buffer *buffer)</div><div class='ctx'> {</div><div class='hunk'>@@ -228,13 +455,29 @@ static bool hbg_sync_data_from_hw(struct hbg_priv *priv,</div><div class='ctx'> 	/* make sure HW write desc complete */</div><div class='ctx'> 	dma_rmb();</div><div class='ctx'> </div><div class='del'>-	dma_sync_single_for_cpu(&amp;priv-&gt;pdev-&gt;dev, buffer-&gt;skb_dma,</div><div class='del'>-				buffer-&gt;skb_len, DMA_FROM_DEVICE);</div><div class='add'>+	dma_sync_single_for_cpu(&amp;priv-&gt;pdev-&gt;dev, buffer-&gt;page_dma,</div><div class='add'>+				buffer-&gt;page_size, DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='del'>-	rx_desc = (struct hbg_rx_desc *)buffer-&gt;skb-&gt;data;</div><div class='add'>+	rx_desc = (struct hbg_rx_desc *)buffer-&gt;page_addr;</div><div class='ctx'> 	return FIELD_GET(HBG_RX_DESC_W2_PKT_LEN_M, rx_desc-&gt;word2) != 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hbg_build_skb(struct hbg_priv *priv,</div><div class='add'>+			 struct hbg_buffer *buffer, u32 pkt_len)</div><div class='add'>+{</div><div class='add'>+	net_prefetch(buffer-&gt;page_addr);</div><div class='add'>+</div><div class='add'>+	buffer-&gt;skb = napi_build_skb(buffer-&gt;page_addr, buffer-&gt;page_size);</div><div class='add'>+	if (unlikely(!buffer-&gt;skb))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	skb_mark_for_recycle(buffer-&gt;skb);</div><div class='add'>+</div><div class='add'>+	/* page will be freed together with the skb */</div><div class='add'>+	buffer-&gt;page = NULL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hbg_napi_rx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct hbg_ring *ring = container_of(napi, struct hbg_ring, napi);</div><div class='hunk'>@@ -244,29 +487,39 @@ static int hbg_napi_rx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	u32 packet_done = 0;</div><div class='ctx'> 	u32 pkt_len;</div><div class='ctx'> </div><div class='add'>+	hbg_rx_fill_buffers(priv);</div><div class='ctx'> 	while (packet_done &lt; budget) {</div><div class='ctx'> 		if (unlikely(hbg_queue_is_empty(ring-&gt;ntc, ring-&gt;ntu, ring)))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		buffer = &amp;ring-&gt;queue[ring-&gt;ntc];</div><div class='del'>-		if (unlikely(!buffer-&gt;skb))</div><div class='add'>+		if (unlikely(!buffer-&gt;page))</div><div class='ctx'> 			goto next_buffer;</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(!hbg_sync_data_from_hw(priv, buffer)))</div><div class='ctx'> 			break;</div><div class='del'>-		rx_desc = (struct hbg_rx_desc *)buffer-&gt;skb-&gt;data;</div><div class='add'>+		rx_desc = (struct hbg_rx_desc *)buffer-&gt;page_addr;</div><div class='ctx'> 		pkt_len = FIELD_GET(HBG_RX_DESC_W2_PKT_LEN_M, rx_desc-&gt;word2);</div><div class='add'>+		trace_hbg_rx_desc(priv, ring-&gt;ntc, rx_desc);</div><div class='ctx'> </div><div class='del'>-		hbg_dma_unmap(buffer);</div><div class='add'>+		if (unlikely(hbg_build_skb(priv, buffer, pkt_len))) {</div><div class='add'>+			hbg_buffer_free_page(buffer);</div><div class='add'>+			goto next_buffer;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (unlikely(!hbg_rx_pkt_check(priv, rx_desc, buffer-&gt;skb))) {</div><div class='add'>+			hbg_buffer_free_skb(buffer);</div><div class='add'>+			goto next_buffer;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		skb_reserve(buffer-&gt;skb, HBG_PACKET_HEAD_SIZE + NET_IP_ALIGN);</div><div class='ctx'> 		skb_put(buffer-&gt;skb, pkt_len);</div><div class='ctx'> 		buffer-&gt;skb-&gt;protocol = eth_type_trans(buffer-&gt;skb,</div><div class='ctx'> 						       priv-&gt;netdev);</div><div class='del'>-</div><div class='ctx'> 		dev_sw_netstats_rx_add(priv-&gt;netdev, pkt_len);</div><div class='ctx'> 		napi_gro_receive(napi, buffer-&gt;skb);</div><div class='ctx'> 		buffer-&gt;skb = NULL;</div><div class='add'>+		buffer-&gt;page = NULL;</div><div class='ctx'> </div><div class='ctx'> next_buffer:</div><div class='ctx'> 		hbg_rx_fill_one_buffer(priv);</div><div class='hunk'>@@ -281,6 +534,42 @@ next_buffer:</div><div class='ctx'> 	return packet_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hbg_ring_page_pool_destory(struct hbg_ring *ring)</div><div class='add'>+{</div><div class='add'>+	if (!ring-&gt;page_pool)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	page_pool_destroy(ring-&gt;page_pool);</div><div class='add'>+	ring-&gt;page_pool = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hbg_ring_page_pool_init(struct hbg_priv *priv, struct hbg_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u32 buf_size = hbg_spec_max_frame_len(priv, ring-&gt;dir);</div><div class='add'>+	struct page_pool_params pp_params = {</div><div class='add'>+		.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV,</div><div class='add'>+		.order = hbg_get_page_order(ring),</div><div class='add'>+		.pool_size = ring-&gt;len * buf_size / hbg_get_page_size(ring),</div><div class='add'>+		.nid = dev_to_node(&amp;priv-&gt;pdev-&gt;dev),</div><div class='add'>+		.dev = &amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+		.napi = &amp;ring-&gt;napi,</div><div class='add'>+		.dma_dir = DMA_FROM_DEVICE,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.max_len = hbg_get_page_size(ring),</div><div class='add'>+	};</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ring-&gt;page_pool = page_pool_create(&amp;pp_params);</div><div class='add'>+	if (IS_ERR(ring-&gt;page_pool)) {</div><div class='add'>+		ret = PTR_ERR(ring-&gt;page_pool);</div><div class='add'>+		dev_err(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+			"failed to create page pool, ret = %d\n", ret);</div><div class='add'>+		ring-&gt;page_pool = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void hbg_ring_uninit(struct hbg_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct hbg_buffer *buffer;</div><div class='hunk'>@@ -299,6 +588,7 @@ static void hbg_ring_uninit(struct hbg_ring *ring)</div><div class='ctx'> 		buffer-&gt;priv = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	hbg_ring_page_pool_destory(ring);</div><div class='ctx'> 	dma_free_coherent(&amp;ring-&gt;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 			  ring-&gt;len * sizeof(*ring-&gt;queue),</div><div class='ctx'> 			  ring-&gt;queue, ring-&gt;queue_dma);</div><div class='hunk'>@@ -314,8 +604,19 @@ static int hbg_ring_init(struct hbg_priv *priv, struct hbg_ring *ring,</div><div class='ctx'> {</div><div class='ctx'> 	struct hbg_buffer *buffer;</div><div class='ctx'> 	u32 i, len;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	len = hbg_get_spec_fifo_max_num(priv, dir) + 1;</div><div class='add'>+	/* To improve receiving performance under high-stress scenarios,</div><div class='add'>+	 * in the `hbg_napi_rx_poll()`, we first use the other half of</div><div class='add'>+	 * the buffer to receive packets from the hardware via the</div><div class='add'>+	 * `hbg_rx_fill_buffers()`, and then process the packets in the</div><div class='add'>+	 * original half of the buffer to avoid packet loss caused by</div><div class='add'>+	 * hardware overflow as much as possible.</div><div class='add'>+	 */</div><div class='add'>+	if (dir == HBG_DIR_RX)</div><div class='add'>+		len += hbg_get_spec_fifo_max_num(priv, dir);</div><div class='add'>+</div><div class='ctx'> 	ring-&gt;queue = dma_alloc_coherent(&amp;priv-&gt;pdev-&gt;dev,</div><div class='ctx'> 					 len * sizeof(*ring-&gt;queue),</div><div class='ctx'> 					 &amp;ring-&gt;queue_dma, GFP_KERNEL);</div><div class='hunk'>@@ -337,11 +638,23 @@ static int hbg_ring_init(struct hbg_priv *priv, struct hbg_ring *ring,</div><div class='ctx'> 	ring-&gt;ntu = 0;</div><div class='ctx'> 	ring-&gt;len = len;</div><div class='ctx'> </div><div class='del'>-	if (dir == HBG_DIR_TX)</div><div class='add'>+	if (dir == HBG_DIR_TX) {</div><div class='ctx'> 		netif_napi_add_tx(priv-&gt;netdev, &amp;ring-&gt;napi, napi_poll);</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='ctx'> 		netif_napi_add(priv-&gt;netdev, &amp;ring-&gt;napi, napi_poll);</div><div class='ctx'> </div><div class='add'>+		ret = hbg_ring_page_pool_init(priv, ring);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netif_napi_del(&amp;ring-&gt;napi);</div><div class='add'>+			dma_free_coherent(&amp;ring-&gt;priv-&gt;pdev-&gt;dev,</div><div class='add'>+					  ring-&gt;len * sizeof(*ring-&gt;queue),</div><div class='add'>+					  ring-&gt;queue, ring-&gt;queue_dma);</div><div class='add'>+			ring-&gt;queue = NULL;</div><div class='add'>+			ring-&gt;len = 0;</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	napi_enable(&amp;ring-&gt;napi);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -364,21 +677,16 @@ static int hbg_tx_ring_init(struct hbg_priv *priv)</div><div class='ctx'> static int hbg_rx_ring_init(struct hbg_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	ret = hbg_ring_init(priv, &amp;priv-&gt;rx_ring, hbg_napi_rx_poll, HBG_DIR_RX);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;rx_ring.len - 1; i++) {</div><div class='del'>-		ret = hbg_rx_fill_one_buffer(priv);</div><div class='del'>-		if (ret) {</div><div class='del'>-			hbg_ring_uninit(&amp;priv-&gt;rx_ring);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	ret = hbg_rx_fill_buffers(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		hbg_ring_uninit(&amp;priv-&gt;rx_ring);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int hbg_txrx_init(struct hbg_priv *priv)</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.h<br/>index 2883a5899ae2..8b6110599e10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.h</a></div><div class='hunk'>@@ -29,7 +29,12 @@ static inline bool hbg_fifo_is_full(struct hbg_priv *priv, enum hbg_dir dir)</div><div class='ctx'> </div><div class='ctx'> static inline u32 hbg_get_queue_used_num(struct hbg_ring *ring)</div><div class='ctx'> {</div><div class='del'>-	return (ring-&gt;ntu + ring-&gt;len - ring-&gt;ntc) % ring-&gt;len;</div><div class='add'>+	u32 len = READ_ONCE(ring-&gt;len);</div><div class='add'>+</div><div class='add'>+	if (!len)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return (READ_ONCE(ring-&gt;ntu) + len - READ_ONCE(ring-&gt;ntc)) % len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> netdev_tx_t hbg_net_start_xmit(struct sk_buff *skb, struct net_device *netdev);</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hip04_eth.c b/drivers/net/ethernet/hisilicon/hip04_eth.c<br/>index a376d4bdf281..18376bcc718a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hip04_eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hip04_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hip04_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hip04_eth.c</a></div><div class='hunk'>@@ -934,8 +934,6 @@ static int hip04_mac_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv-&gt;chan = arg.args[1] * RX_DESC_NUM;</div><div class='ctx'> 	priv-&gt;group = arg.args[2];</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;priv-&gt;tx_coalesce_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-</div><div class='ctx'> 	/* BQL will try to keep the TX queue as short as possible, but it can't</div><div class='ctx'> 	 * be faster than tx_coalesce_usecs, so we need a fast timeout here,</div><div class='ctx'> 	 * but also long enough to gather up enough frames to ensure we don't</div><div class='hunk'>@@ -944,7 +942,7 @@ static int hip04_mac_probe(struct platform_device *pdev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	priv-&gt;tx_coalesce_frames = TX_DESC_NUM * 3 / 4;</div><div class='ctx'> 	priv-&gt;tx_coalesce_usecs = 200;</div><div class='del'>-	priv-&gt;tx_coalesce_timer.function = tx_done;</div><div class='add'>+	hrtimer_setup(&amp;priv-&gt;tx_coalesce_timer, tx_done, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;map = syscon_node_to_regmap(arg.np);</div><div class='ctx'> 	of_node_put(arg.np);</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hnae.h b/drivers/net/ethernet/hisilicon/hns/hnae.h<br/>index d72657444ef3..2ae34d01fd36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hnae.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hnae.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hnae.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hnae.h</a></div><div class='hunk'>@@ -512,7 +512,7 @@ struct hnae_ae_ops {</div><div class='ctx'> 			     struct net_device_stats *net_stats);</div><div class='ctx'> 	void (*get_stats)(struct hnae_handle *handle, u64 *data);</div><div class='ctx'> 	void (*get_strings)(struct hnae_handle *handle,</div><div class='del'>-			    u32 stringset, u8 *data);</div><div class='add'>+			    u32 stringset, u8 **data);</div><div class='ctx'> 	int (*get_sset_count)(struct hnae_handle *handle, int stringset);</div><div class='ctx'> 	void (*update_led_status)(struct hnae_handle *handle);</div><div class='ctx'> 	int (*set_led_id)(struct hnae_handle *handle,</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c b/drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c<br/>index bc3e406f0139..8ce910f8d0cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c</a></div><div class='hunk'>@@ -730,15 +730,14 @@ static void hns_ae_get_stats(struct hnae_handle *handle, u64 *data)</div><div class='ctx'> 		hns_dsaf_get_stats(vf_cb-&gt;dsaf_dev, p, vf_cb-&gt;port_index);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hns_ae_get_strings(struct hnae_handle *handle,</div><div class='del'>-			       u32 stringset, u8 *data)</div><div class='add'>+static void hns_ae_get_strings(struct hnae_handle *handle, u32 stringset,</div><div class='add'>+			       u8 **data)</div><div class='ctx'> {</div><div class='ctx'> 	int port;</div><div class='ctx'> 	int idx;</div><div class='ctx'> 	struct hns_mac_cb *mac_cb;</div><div class='ctx'> 	struct hns_ppe_cb *ppe_cb;</div><div class='ctx'> 	struct dsaf_device *dsaf_dev = hns_ae_get_dsaf_dev(handle-&gt;dev);</div><div class='del'>-	u8 *p = data;</div><div class='ctx'> 	struct	hnae_vf_cb *vf_cb;</div><div class='ctx'> </div><div class='ctx'> 	assert(handle);</div><div class='hunk'>@@ -748,19 +747,14 @@ static void hns_ae_get_strings(struct hnae_handle *handle,</div><div class='ctx'> 	mac_cb = hns_get_mac_cb(handle);</div><div class='ctx'> 	ppe_cb = hns_get_ppe_cb(handle);</div><div class='ctx'> </div><div class='del'>-	for (idx = 0; idx &lt; handle-&gt;q_num; idx++) {</div><div class='del'>-		hns_rcb_get_strings(stringset, p, idx);</div><div class='del'>-		p += ETH_GSTRING_LEN * hns_rcb_get_ring_sset_count(stringset);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	hns_ppe_get_strings(ppe_cb, stringset, p);</div><div class='del'>-	p += ETH_GSTRING_LEN * hns_ppe_get_sset_count(stringset);</div><div class='add'>+	for (idx = 0; idx &lt; handle-&gt;q_num; idx++)</div><div class='add'>+		hns_rcb_get_strings(stringset, data, idx);</div><div class='ctx'> </div><div class='del'>-	hns_mac_get_strings(mac_cb, stringset, p);</div><div class='del'>-	p += ETH_GSTRING_LEN * hns_mac_get_sset_count(mac_cb, stringset);</div><div class='add'>+	hns_ppe_get_strings(ppe_cb, stringset, data);</div><div class='add'>+	hns_mac_get_strings(mac_cb, stringset, data);</div><div class='ctx'> </div><div class='ctx'> 	if (mac_cb-&gt;mac_type == HNAE_PORT_SERVICE)</div><div class='del'>-		hns_dsaf_get_strings(stringset, p, port, dsaf_dev);</div><div class='add'>+		hns_dsaf_get_strings(stringset, data, port, dsaf_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hns_ae_get_sset_count(struct hnae_handle *handle, int stringset)</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c<br/>index bdb7afaabdd0..400933ca1a29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c</a></div><div class='hunk'>@@ -669,16 +669,15 @@ static void hns_gmac_get_stats(void *mac_drv, u64 *data)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hns_gmac_get_strings(u32 stringset, u8 *data)</div><div class='add'>+static void hns_gmac_get_strings(u32 stringset, u8 **data)</div><div class='ctx'> {</div><div class='del'>-	u8 *buff = data;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	if (stringset != ETH_SS_STATS)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(g_gmac_stats_string); i++)</div><div class='del'>-		ethtool_puts(&amp;buff, g_gmac_stats_string[i].desc);</div><div class='add'>+		ethtool_puts(data, g_gmac_stats_string[i].desc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hns_gmac_get_sset_count(int stringset)</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c<br/>index 5fa9b2eeb929..bc6b269be299 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c</a></div><div class='hunk'>@@ -1190,8 +1190,7 @@ void hns_mac_get_stats(struct hns_mac_cb *mac_cb, u64 *data)</div><div class='ctx'> 	mac_ctrl_drv-&gt;get_ethtool_stats(mac_ctrl_drv, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void hns_mac_get_strings(struct hns_mac_cb *mac_cb,</div><div class='del'>-			 int stringset, u8 *data)</div><div class='add'>+void hns_mac_get_strings(struct hns_mac_cb *mac_cb, int stringset, u8 **data)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac_driver *mac_ctrl_drv = hns_mac_get_drv(mac_cb);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h<br/>index edf0bcf76ac9..630f01cf7a71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h</a></div><div class='hunk'>@@ -378,7 +378,7 @@ struct mac_driver {</div><div class='ctx'> 	void (*get_regs)(void *mac_drv, void *data);</div><div class='ctx'> 	int (*get_regs_count)(void);</div><div class='ctx'> 	/* get strings name for ethtool statistic */</div><div class='del'>-	void (*get_strings)(u32 stringset, u8 *data);</div><div class='add'>+	void (*get_strings)(u32 stringset, u8 **data);</div><div class='ctx'> 	/* get the number of strings*/</div><div class='ctx'> 	int (*get_sset_count)(int stringset);</div><div class='ctx'> </div><div class='hunk'>@@ -445,7 +445,7 @@ int hns_mac_config_mac_loopback(struct hns_mac_cb *mac_cb,</div><div class='ctx'> 				enum hnae_loop loop, int en);</div><div class='ctx'> void hns_mac_update_stats(struct hns_mac_cb *mac_cb);</div><div class='ctx'> void hns_mac_get_stats(struct hns_mac_cb *mac_cb, u64 *data);</div><div class='del'>-void hns_mac_get_strings(struct hns_mac_cb *mac_cb, int stringset, u8 *data);</div><div class='add'>+void hns_mac_get_strings(struct hns_mac_cb *mac_cb, int stringset, u8 **data);</div><div class='ctx'> int hns_mac_get_sset_count(struct hns_mac_cb *mac_cb, int stringset);</div><div class='ctx'> void hns_mac_get_regs(struct hns_mac_cb *mac_cb, void *data);</div><div class='ctx'> int hns_mac_get_regs_count(struct hns_mac_cb *mac_cb);</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c<br/>index eb60f45a3460..6b6ced37e490 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c</a></div><div class='hunk'>@@ -2590,55 +2590,34 @@ void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)</div><div class='ctx'> 		p[i] = 0xdddddddd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static char *hns_dsaf_get_node_stats_strings(char *data, int node,</div><div class='del'>-					     struct dsaf_device *dsaf_dev)</div><div class='add'>+static void hns_dsaf_get_node_stats_strings(u8 **data, int node,</div><div class='add'>+					    struct dsaf_device *dsaf_dev)</div><div class='ctx'> {</div><div class='del'>-	char *buff = data;</div><div class='del'>-	int i;</div><div class='ctx'> 	bool is_ver1 = AE_IS_VER1(dsaf_dev-&gt;dsaf_ver);</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='add'>+	ethtool_sprintf(data, "innod%d_pad_drop_pkts", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_manage_pkts", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_rx_pkts", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_rx_pkt_id", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_rx_pause_frame", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_release_buf_num", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_sbm_drop_pkts", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_crc_false_pkts", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_bp_drop_pkts", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_lookup_rslt_drop_pkts", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_local_rslt_fail_pkts", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_vlan_drop_pkts", node);</div><div class='add'>+	ethtool_sprintf(data, "innod%d_stp_drop_pkts", node);</div><div class='ctx'> 	if (node &lt; DSAF_SERVICE_NW_NUM &amp;&amp; !is_ver1) {</div><div class='ctx'> 		for (i = 0; i &lt; DSAF_PRIO_NR; i++) {</div><div class='del'>-			snprintf(buff + 0 * ETH_GSTRING_LEN * DSAF_PRIO_NR,</div><div class='del'>-				 ETH_GSTRING_LEN, "inod%d_pfc_prio%d_pkts",</div><div class='del'>-				 node, i);</div><div class='del'>-			snprintf(buff + 1 * ETH_GSTRING_LEN * DSAF_PRIO_NR,</div><div class='del'>-				 ETH_GSTRING_LEN, "onod%d_pfc_prio%d_pkts",</div><div class='del'>-				 node, i);</div><div class='del'>-			buff += ETH_GSTRING_LEN;</div><div class='add'>+			ethtool_sprintf(data, "inod%d_pfc_prio%d_pkts", node,</div><div class='add'>+					i);</div><div class='add'>+			ethtool_sprintf(data, "onod%d_pfc_prio%d_pkts", node,</div><div class='add'>+					i);</div><div class='ctx'> 		}</div><div class='del'>-		buff += 1 * DSAF_PRIO_NR * ETH_GSTRING_LEN;</div><div class='ctx'> 	}</div><div class='del'>-	snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);</div><div class='del'>-	buff += ETH_GSTRING_LEN;</div><div class='del'>-</div><div class='del'>-	return buff;</div><div class='add'>+	ethtool_sprintf(data, "onnod%d_tx_pkts", node);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,</div><div class='hunk'>@@ -2720,21 +2699,20 @@ int hns_dsaf_get_sset_count(struct dsaf_device *dsaf_dev, int stringset)</div><div class='ctx'>  *@port:port index</div><div class='ctx'>  *@dsaf_dev: dsaf device</div><div class='ctx'>  */</div><div class='del'>-void hns_dsaf_get_strings(int stringset, u8 *data, int port,</div><div class='add'>+void hns_dsaf_get_strings(int stringset, u8 **data, int port,</div><div class='ctx'> 			  struct dsaf_device *dsaf_dev)</div><div class='ctx'> {</div><div class='del'>-	char *buff = (char *)data;</div><div class='ctx'> 	int node = port;</div><div class='ctx'> </div><div class='ctx'> 	if (stringset != ETH_SS_STATS)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* for ge/xge node info */</div><div class='del'>-	buff = hns_dsaf_get_node_stats_strings(buff, node, dsaf_dev);</div><div class='add'>+	hns_dsaf_get_node_stats_strings(data, node, dsaf_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* for ppe node info */</div><div class='ctx'> 	node = port + DSAF_PPE_INODE_BASE;</div><div class='del'>-	(void)hns_dsaf_get_node_stats_strings(buff, node, dsaf_dev);</div><div class='add'>+	hns_dsaf_get_node_stats_strings(data, node, dsaf_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3041,115 +3019,6 @@ static struct platform_driver g_dsaf_driver = {</div><div class='ctx'> </div><div class='ctx'> module_platform_driver(g_dsaf_driver);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * hns_dsaf_roce_reset - reset dsaf and roce</div><div class='del'>- * @dsaf_fwnode: Pointer to framework node for the dasf</div><div class='del'>- * @dereset: false - request reset , true - drop reset</div><div class='del'>- * return 0 - success , negative -fail</div><div class='del'>- */</div><div class='del'>-int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, bool dereset)</div><div class='del'>-{</div><div class='del'>-	struct dsaf_device *dsaf_dev;</div><div class='del'>-	struct platform_device *pdev;</div><div class='del'>-	u32 mp;</div><div class='del'>-	u32 sl;</div><div class='del'>-	u32 credit;</div><div class='del'>-	int i;</div><div class='del'>-	static const u32 port_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE_NUM] = {</div><div class='del'>-		{DSAF_ROCE_PORT_0, DSAF_ROCE_PORT_0, DSAF_ROCE_PORT_0},</div><div class='del'>-		{DSAF_ROCE_PORT_1, DSAF_ROCE_PORT_0, DSAF_ROCE_PORT_0},</div><div class='del'>-		{DSAF_ROCE_PORT_2, DSAF_ROCE_PORT_1, DSAF_ROCE_PORT_0},</div><div class='del'>-		{DSAF_ROCE_PORT_3, DSAF_ROCE_PORT_1, DSAF_ROCE_PORT_0},</div><div class='del'>-		{DSAF_ROCE_PORT_4, DSAF_ROCE_PORT_2, DSAF_ROCE_PORT_1},</div><div class='del'>-		{DSAF_ROCE_PORT_4, DSAF_ROCE_PORT_2, DSAF_ROCE_PORT_1},</div><div class='del'>-		{DSAF_ROCE_PORT_5, DSAF_ROCE_PORT_3, DSAF_ROCE_PORT_1},</div><div class='del'>-		{DSAF_ROCE_PORT_5, DSAF_ROCE_PORT_3, DSAF_ROCE_PORT_1},</div><div class='del'>-	};</div><div class='del'>-	static const u32 sl_map[DSAF_ROCE_CREDIT_CHN][DSAF_ROCE_CHAN_MODE_NUM] = {</div><div class='del'>-		{DSAF_ROCE_SL_0, DSAF_ROCE_SL_0, DSAF_ROCE_SL_0},</div><div class='del'>-		{DSAF_ROCE_SL_0, DSAF_ROCE_SL_1, DSAF_ROCE_SL_1},</div><div class='del'>-		{DSAF_ROCE_SL_0, DSAF_ROCE_SL_0, DSAF_ROCE_SL_2},</div><div class='del'>-		{DSAF_ROCE_SL_0, DSAF_ROCE_SL_1, DSAF_ROCE_SL_3},</div><div class='del'>-		{DSAF_ROCE_SL_0, DSAF_ROCE_SL_0, DSAF_ROCE_SL_0},</div><div class='del'>-		{DSAF_ROCE_SL_1, DSAF_ROCE_SL_1, DSAF_ROCE_SL_1},</div><div class='del'>-		{DSAF_ROCE_SL_0, DSAF_ROCE_SL_0, DSAF_ROCE_SL_2},</div><div class='del'>-		{DSAF_ROCE_SL_1, DSAF_ROCE_SL_1, DSAF_ROCE_SL_3},</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* find the platform device corresponding to fwnode */</div><div class='del'>-	if (is_of_node(dsaf_fwnode)) {</div><div class='del'>-		pdev = of_find_device_by_node(to_of_node(dsaf_fwnode));</div><div class='del'>-	} else if (is_acpi_device_node(dsaf_fwnode)) {</div><div class='del'>-		pdev = hns_dsaf_find_platform_device(dsaf_fwnode);</div><div class='del'>-	} else {</div><div class='del'>-		pr_err("fwnode is neither OF or ACPI type\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* check if we were a success in fetching pdev */</div><div class='del'>-	if (!pdev) {</div><div class='del'>-		pr_err("couldn't find platform device for node\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* retrieve the dsaf_device from the driver data */</div><div class='del'>-	dsaf_dev = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='del'>-	if (!dsaf_dev) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "dsaf_dev is NULL\n");</div><div class='del'>-		put_device(&amp;pdev-&gt;dev);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* now, make sure we are running on compatible SoC */</div><div class='del'>-	if (AE_IS_VER1(dsaf_dev-&gt;dsaf_ver)) {</div><div class='del'>-		dev_err(dsaf_dev-&gt;dev, "%s v1 chip doesn't support RoCE!\n",</div><div class='del'>-			dsaf_dev-&gt;ae_dev.name);</div><div class='del'>-		put_device(&amp;pdev-&gt;dev);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* do reset or de-reset according to the flag */</div><div class='del'>-	if (!dereset) {</div><div class='del'>-		/* reset rocee-channels in dsaf and rocee */</div><div class='del'>-		dsaf_dev-&gt;misc_op-&gt;hns_dsaf_srst_chns(dsaf_dev, DSAF_CHNS_MASK,</div><div class='del'>-						      false);</div><div class='del'>-		dsaf_dev-&gt;misc_op-&gt;hns_dsaf_roce_srst(dsaf_dev, false);</div><div class='del'>-	} else {</div><div class='del'>-		/* configure dsaf tx roce correspond to port map and sl map */</div><div class='del'>-		mp = dsaf_read_dev(dsaf_dev, DSAF_ROCE_PORT_MAP_REG);</div><div class='del'>-		for (i = 0; i &lt; DSAF_ROCE_CREDIT_CHN; i++)</div><div class='del'>-			dsaf_set_field(mp, 7 &lt;&lt; i * 3, i * 3,</div><div class='del'>-				       port_map[i][DSAF_ROCE_6PORT_MODE]);</div><div class='del'>-		dsaf_set_field(mp, 3 &lt;&lt; i * 3, i * 3, 0);</div><div class='del'>-		dsaf_write_dev(dsaf_dev, DSAF_ROCE_PORT_MAP_REG, mp);</div><div class='del'>-</div><div class='del'>-		sl = dsaf_read_dev(dsaf_dev, DSAF_ROCE_SL_MAP_REG);</div><div class='del'>-		for (i = 0; i &lt; DSAF_ROCE_CREDIT_CHN; i++)</div><div class='del'>-			dsaf_set_field(sl, 3 &lt;&lt; i * 2, i * 2,</div><div class='del'>-				       sl_map[i][DSAF_ROCE_6PORT_MODE]);</div><div class='del'>-		dsaf_write_dev(dsaf_dev, DSAF_ROCE_SL_MAP_REG, sl);</div><div class='del'>-</div><div class='del'>-		/* de-reset rocee-channels in dsaf and rocee */</div><div class='del'>-		dsaf_dev-&gt;misc_op-&gt;hns_dsaf_srst_chns(dsaf_dev, DSAF_CHNS_MASK,</div><div class='del'>-						      true);</div><div class='del'>-		msleep(SRST_TIME_INTERVAL);</div><div class='del'>-		dsaf_dev-&gt;misc_op-&gt;hns_dsaf_roce_srst(dsaf_dev, true);</div><div class='del'>-</div><div class='del'>-		/* enable dsaf channel rocee credit */</div><div class='del'>-		credit = dsaf_read_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG);</div><div class='del'>-		dsaf_set_bit(credit, DSAF_SBM_ROCEE_CFG_CRD_EN_B, 0);</div><div class='del'>-		dsaf_write_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG, credit);</div><div class='del'>-</div><div class='del'>-		dsaf_set_bit(credit, DSAF_SBM_ROCEE_CFG_CRD_EN_B, 1);</div><div class='del'>-		dsaf_write_dev(dsaf_dev, DSAF_SBM_ROCEE_CFG_REG_REG, credit);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	put_device(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(hns_dsaf_roce_reset);</div><div class='del'>-</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Huawei Tech. Co., Ltd.");</div><div class='ctx'> MODULE_DESCRIPTION("HNS DSAF driver");</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h<br/>index 5526a10caac5..653dfbb25d1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h</a></div><div class='hunk'>@@ -42,29 +42,6 @@ struct hns_mac_cb;</div><div class='ctx'> </div><div class='ctx'> #define HNS_MAX_WAIT_CNT 10000</div><div class='ctx'> </div><div class='del'>-enum dsaf_roce_port_mode {</div><div class='del'>-	DSAF_ROCE_6PORT_MODE,</div><div class='del'>-	DSAF_ROCE_4PORT_MODE,</div><div class='del'>-	DSAF_ROCE_2PORT_MODE,</div><div class='del'>-	DSAF_ROCE_CHAN_MODE_NUM,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum dsaf_roce_port_num {</div><div class='del'>-	DSAF_ROCE_PORT_0,</div><div class='del'>-	DSAF_ROCE_PORT_1,</div><div class='del'>-	DSAF_ROCE_PORT_2,</div><div class='del'>-	DSAF_ROCE_PORT_3,</div><div class='del'>-	DSAF_ROCE_PORT_4,</div><div class='del'>-	DSAF_ROCE_PORT_5,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum dsaf_roce_qos_sl {</div><div class='del'>-	DSAF_ROCE_SL_0,</div><div class='del'>-	DSAF_ROCE_SL_1,</div><div class='del'>-	DSAF_ROCE_SL_2,</div><div class='del'>-	DSAF_ROCE_SL_3,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define DSAF_STATS_READ(p, offset) (*((u64 *)((u8 *)(p) + (offset))))</div><div class='ctx'> #define HNS_DSAF_IS_DEBUG(dev) ((dev)-&gt;dsaf_mode == DSAF_MODE_DISABLE_SP)</div><div class='ctx'> </div><div class='hunk'>@@ -307,9 +284,6 @@ struct dsaf_misc_op {</div><div class='ctx'> 	void (*ge_srst)(struct dsaf_device *dsaf_dev, u32 port, bool dereset);</div><div class='ctx'> 	void (*ppe_srst)(struct dsaf_device *dsaf_dev, u32 port, bool dereset);</div><div class='ctx'> 	void (*ppe_comm_srst)(struct dsaf_device *dsaf_dev, bool dereset);</div><div class='del'>-	void (*hns_dsaf_srst_chns)(struct dsaf_device *dsaf_dev, u32 msk,</div><div class='del'>-				   bool dereset);</div><div class='del'>-	void (*hns_dsaf_roce_srst)(struct dsaf_device *dsaf_dev, bool dereset);</div><div class='ctx'> </div><div class='ctx'> 	phy_interface_t (*get_phy_if)(struct hns_mac_cb *mac_cb);</div><div class='ctx'> 	int (*get_sfp_prsnt)(struct hns_mac_cb *mac_cb, int *sfp_prsnt);</div><div class='hunk'>@@ -442,7 +416,7 @@ void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 inode_num);</div><div class='ctx'> </div><div class='ctx'> int hns_dsaf_get_sset_count(struct dsaf_device *dsaf_dev, int stringset);</div><div class='ctx'> void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port);</div><div class='del'>-void hns_dsaf_get_strings(int stringset, u8 *data, int port,</div><div class='add'>+void hns_dsaf_get_strings(int stringset, u8 **data, int port,</div><div class='ctx'> 			  struct dsaf_device *dsaf_dev);</div><div class='ctx'> </div><div class='ctx'> void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data);</div><div class='hunk'>@@ -463,6 +437,4 @@ int hns_dsaf_clr_mac_mc_port(struct dsaf_device *dsaf_dev,</div><div class='ctx'> 			     u8 mac_id, u8 port_num);</div><div class='ctx'> int hns_dsaf_wait_pkt_clean(struct dsaf_device *dsaf_dev, int port);</div><div class='ctx'> </div><div class='del'>-int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, bool dereset);</div><div class='del'>-</div><div class='ctx'> #endif /* __HNS_DSAF_MAIN_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c<br/>index 5df19c604d09..91391a49fcea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c</a></div><div class='hunk'>@@ -326,69 +326,6 @@ static void hns_dsaf_xge_srst_by_port_acpi(struct dsaf_device *dsaf_dev,</div><div class='ctx'> 				   HNS_XGE_RESET_FUNC, port, dereset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * hns_dsaf_srst_chns - reset dsaf channels</div><div class='del'>- * @dsaf_dev: dsaf device struct pointer</div><div class='del'>- * @msk: xbar channels mask value:</div><div class='del'>- * @dereset: false - request reset , true - drop reset</div><div class='del'>- *</div><div class='del'>- * bit0-5 for xge0-5</div><div class='del'>- * bit6-11 for ppe0-5</div><div class='del'>- * bit12-17 for roce0-5</div><div class='del'>- * bit18-19 for com/dfx</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-hns_dsaf_srst_chns(struct dsaf_device *dsaf_dev, u32 msk, bool dereset)</div><div class='del'>-{</div><div class='del'>-	u32 reg_addr;</div><div class='del'>-</div><div class='del'>-	if (!dereset)</div><div class='del'>-		reg_addr = DSAF_SUB_SC_DSAF_RESET_REQ_REG;</div><div class='del'>-	else</div><div class='del'>-		reg_addr = DSAF_SUB_SC_DSAF_RESET_DREQ_REG;</div><div class='del'>-</div><div class='del'>-	dsaf_write_sub(dsaf_dev, reg_addr, msk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * hns_dsaf_srst_chns_acpi - reset dsaf channels</div><div class='del'>- * @dsaf_dev: dsaf device struct pointer</div><div class='del'>- * @msk: xbar channels mask value:</div><div class='del'>- * @dereset: false - request reset , true - drop reset</div><div class='del'>- *</div><div class='del'>- * bit0-5 for xge0-5</div><div class='del'>- * bit6-11 for ppe0-5</div><div class='del'>- * bit12-17 for roce0-5</div><div class='del'>- * bit18-19 for com/dfx</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-hns_dsaf_srst_chns_acpi(struct dsaf_device *dsaf_dev, u32 msk, bool dereset)</div><div class='del'>-{</div><div class='del'>-	hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,</div><div class='del'>-				   HNS_DSAF_CHN_RESET_FUNC,</div><div class='del'>-				   msk, dereset);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hns_dsaf_roce_srst(struct dsaf_device *dsaf_dev, bool dereset)</div><div class='del'>-{</div><div class='del'>-	if (!dereset) {</div><div class='del'>-		dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_ROCEE_RESET_REQ_REG, 1);</div><div class='del'>-	} else {</div><div class='del'>-		dsaf_write_sub(dsaf_dev,</div><div class='del'>-			       DSAF_SUB_SC_ROCEE_CLK_DIS_REG, 1);</div><div class='del'>-		dsaf_write_sub(dsaf_dev,</div><div class='del'>-			       DSAF_SUB_SC_ROCEE_RESET_DREQ_REG, 1);</div><div class='del'>-		msleep(20);</div><div class='del'>-		dsaf_write_sub(dsaf_dev, DSAF_SUB_SC_ROCEE_CLK_EN_REG, 1);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hns_dsaf_roce_srst_acpi(struct dsaf_device *dsaf_dev, bool dereset)</div><div class='del'>-{</div><div class='del'>-	hns_dsaf_acpi_srst_by_port(dsaf_dev, HNS_OP_RESET_FUNC,</div><div class='del'>-				   HNS_ROCE_RESET_FUNC, 0, dereset);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void hns_dsaf_ge_srst_by_port(struct dsaf_device *dsaf_dev, u32 port,</div><div class='ctx'> 				     bool dereset)</div><div class='ctx'> {</div><div class='hunk'>@@ -729,8 +666,6 @@ struct dsaf_misc_op *hns_misc_op_get(struct dsaf_device *dsaf_dev)</div><div class='ctx'> 		misc_op-&gt;ge_srst = hns_dsaf_ge_srst_by_port;</div><div class='ctx'> 		misc_op-&gt;ppe_srst = hns_ppe_srst_by_port;</div><div class='ctx'> 		misc_op-&gt;ppe_comm_srst = hns_ppe_com_srst;</div><div class='del'>-		misc_op-&gt;hns_dsaf_srst_chns = hns_dsaf_srst_chns;</div><div class='del'>-		misc_op-&gt;hns_dsaf_roce_srst = hns_dsaf_roce_srst;</div><div class='ctx'> </div><div class='ctx'> 		misc_op-&gt;get_phy_if = hns_mac_get_phy_if;</div><div class='ctx'> 		misc_op-&gt;get_sfp_prsnt = hns_mac_get_sfp_prsnt;</div><div class='hunk'>@@ -746,8 +681,6 @@ struct dsaf_misc_op *hns_misc_op_get(struct dsaf_device *dsaf_dev)</div><div class='ctx'> 		misc_op-&gt;ge_srst = hns_dsaf_ge_srst_by_port_acpi;</div><div class='ctx'> 		misc_op-&gt;ppe_srst = hns_ppe_srst_by_port_acpi;</div><div class='ctx'> 		misc_op-&gt;ppe_comm_srst = hns_ppe_com_srst;</div><div class='del'>-		misc_op-&gt;hns_dsaf_srst_chns = hns_dsaf_srst_chns_acpi;</div><div class='del'>-		misc_op-&gt;hns_dsaf_roce_srst = hns_dsaf_roce_srst_acpi;</div><div class='ctx'> </div><div class='ctx'> 		misc_op-&gt;get_phy_if = hns_mac_get_phy_if_acpi;</div><div class='ctx'> 		misc_op-&gt;get_sfp_prsnt = hns_mac_get_sfp_prsnt_acpi;</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c<br/>index a08d1f0a5a16..5013beb4d282 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c</a></div><div class='hunk'>@@ -457,24 +457,23 @@ int hns_ppe_get_regs_count(void)</div><div class='ctx'>  * @stringset: string set type</div><div class='ctx'>  * @data: output string</div><div class='ctx'>  */</div><div class='del'>-void hns_ppe_get_strings(struct hns_ppe_cb *ppe_cb, int stringset, u8 *data)</div><div class='add'>+void hns_ppe_get_strings(struct hns_ppe_cb *ppe_cb, int stringset, u8 **data)</div><div class='ctx'> {</div><div class='ctx'> 	int index = ppe_cb-&gt;index;</div><div class='del'>-	u8 *buff = data;</div><div class='del'>-</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_rx_sw_pkt", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_rx_pkt_ok", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_rx_drop_pkt_no_bd", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_rx_alloc_buf_fail", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_rx_alloc_buf_wait", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_rx_pkt_drop_no_buf", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_rx_pkt_err_fifo_full", index);</div><div class='del'>-</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_tx_bd", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_tx_pkt", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_tx_pkt_ok", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_tx_pkt_err_fifo_empty", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "ppe%d_tx_pkt_err_csum_fail", index);</div><div class='add'>+</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_rx_sw_pkt", index);</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_rx_pkt_ok", index);</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_rx_drop_pkt_no_bd", index);</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_rx_alloc_buf_fail", index);</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_rx_alloc_buf_wait", index);</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_rx_pkt_drop_no_buf", index);</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_rx_pkt_err_fifo_full", index);</div><div class='add'>+</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_tx_bd", index);</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_tx_pkt", index);</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_tx_pkt_ok", index);</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_tx_pkt_err_fifo_empty", index);</div><div class='add'>+	ethtool_sprintf(data, "ppe%d_tx_pkt_err_csum_fail", index);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void hns_ppe_get_stats(struct hns_ppe_cb *ppe_cb, u64 *data)</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h<br/>index 7e00231c1acf..602c8e971fe4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h</a></div><div class='hunk'>@@ -109,7 +109,7 @@ int hns_ppe_get_sset_count(int stringset);</div><div class='ctx'> int hns_ppe_get_regs_count(void);</div><div class='ctx'> void hns_ppe_get_regs(struct hns_ppe_cb *ppe_cb, void *data);</div><div class='ctx'> </div><div class='del'>-void hns_ppe_get_strings(struct hns_ppe_cb *ppe_cb, int stringset, u8 *data);</div><div class='add'>+void hns_ppe_get_strings(struct hns_ppe_cb *ppe_cb, int stringset, u8 **data);</div><div class='ctx'> void hns_ppe_get_stats(struct hns_ppe_cb *ppe_cb, u64 *data);</div><div class='ctx'> void hns_ppe_set_tso_enable(struct hns_ppe_cb *ppe_cb, u32 value);</div><div class='ctx'> void hns_ppe_set_rss_key(struct hns_ppe_cb *ppe_cb,</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c<br/>index 93344563a259..635b3a95dd82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c</a></div><div class='hunk'>@@ -195,11 +195,6 @@ void hns_rcb_ring_enable_hw(struct hnae_queue *q, u32 val)</div><div class='ctx'> 	dsaf_write_dev(q, RCB_RING_PREFETCH_EN_REG, !!val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void hns_rcb_start(struct hnae_queue *q, u32 val)</div><div class='del'>-{</div><div class='del'>-	hns_rcb_ring_enable_hw(q, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  *hns_rcb_common_init_commit_hw - make rcb common init completed</div><div class='ctx'>  *@rcb_common: rcb common device</div><div class='hunk'>@@ -923,44 +918,42 @@ int hns_rcb_get_ring_regs_count(void)</div><div class='ctx'>  *@data:strings name value</div><div class='ctx'>  *@index:queue index</div><div class='ctx'>  */</div><div class='del'>-void hns_rcb_get_strings(int stringset, u8 *data, int index)</div><div class='add'>+void hns_rcb_get_strings(int stringset, u8 **data, int index)</div><div class='ctx'> {</div><div class='del'>-	u8 *buff = data;</div><div class='del'>-</div><div class='ctx'> 	if (stringset != ETH_SS_STATS)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_rcb_pkt_num", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_ppe_tx_pkt_num", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_ppe_drop_pkt_num", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_fbd_num", index);</div><div class='del'>-</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_pkt_num", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_bytes", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_err_cnt", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_io_err", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_sw_err", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_seg_pkt", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_restart_queue", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "tx_ring%d_tx_busy", index);</div><div class='del'>-</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_rcb_pkt_num", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_ppe_pkt_num", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_ppe_drop_pkt_num", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_fbd_num", index);</div><div class='del'>-</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_pkt_num", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_bytes", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_err_cnt", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_io_err", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_sw_err", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_seg_pkt", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_reuse_pg", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_len_err", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_non_vld_desc_err", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_bd_num_err", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_l2_err", index);</div><div class='del'>-	ethtool_sprintf(&amp;buff, "rx_ring%d_l3l4csum_err", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_rcb_pkt_num", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_ppe_tx_pkt_num", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_ppe_drop_pkt_num", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_fbd_num", index);</div><div class='add'>+</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_pkt_num", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_bytes", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_err_cnt", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_io_err", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_sw_err", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_seg_pkt", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_restart_queue", index);</div><div class='add'>+	ethtool_sprintf(data, "tx_ring%d_tx_busy", index);</div><div class='add'>+</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_rcb_pkt_num", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_ppe_pkt_num", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_ppe_drop_pkt_num", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_fbd_num", index);</div><div class='add'>+</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_pkt_num", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_bytes", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_err_cnt", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_io_err", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_sw_err", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_seg_pkt", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_reuse_pg", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_len_err", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_non_vld_desc_err", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_bd_num_err", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_l2_err", index);</div><div class='add'>+	ethtool_sprintf(data, "rx_ring%d_l3l4csum_err", index);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void hns_rcb_get_common_regs(struct rcb_common_cb *rcb_com, void *data)</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h<br/>index c1e9b6997853..68f81547dfb4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h</a></div><div class='hunk'>@@ -116,7 +116,6 @@ int hns_rcb_buf_size2type(u32 buf_size);</div><div class='ctx'> int hns_rcb_common_get_cfg(struct dsaf_device *dsaf_dev, int comm_index);</div><div class='ctx'> void hns_rcb_common_free_cfg(struct dsaf_device *dsaf_dev, u32 comm_index);</div><div class='ctx'> int hns_rcb_common_init_hw(struct rcb_common_cb *rcb_common);</div><div class='del'>-void hns_rcb_start(struct hnae_queue *q, u32 val);</div><div class='ctx'> int hns_rcb_get_cfg(struct rcb_common_cb *rcb_common);</div><div class='ctx'> void hns_rcb_get_queue_mode(enum dsaf_mode dsaf_mode,</div><div class='ctx'> 			    u16 *max_vfn, u16 *max_q_per_vf);</div><div class='hunk'>@@ -157,7 +156,7 @@ int hns_rcb_get_ring_regs_count(void);</div><div class='ctx'> </div><div class='ctx'> void hns_rcb_get_ring_regs(struct hnae_queue *queue, void *data);</div><div class='ctx'> </div><div class='del'>-void hns_rcb_get_strings(int stringset, u8 *data, int index);</div><div class='add'>+void hns_rcb_get_strings(int stringset, u8 **data, int index);</div><div class='ctx'> void hns_rcb_set_rx_ring_bs(struct hnae_queue *q, u32 buf_size);</div><div class='ctx'> void hns_rcb_set_tx_ring_bs(struct hnae_queue *q, u32 buf_size);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c<br/>index c58833eb4830..dbc44c2c26c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c</a></div><div class='hunk'>@@ -743,16 +743,15 @@ static void hns_xgmac_get_stats(void *mac_drv, u64 *data)</div><div class='ctx'>  *@stringset: type of values in data</div><div class='ctx'>  *@data:data for value of string name</div><div class='ctx'>  */</div><div class='del'>-static void hns_xgmac_get_strings(u32 stringset, u8 *data)</div><div class='add'>+static void hns_xgmac_get_strings(u32 stringset, u8 **data)</div><div class='ctx'> {</div><div class='del'>-	u8 *buff = data;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	if (stringset != ETH_SS_STATS)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(g_xgmac_stats_string); i++)</div><div class='del'>-		ethtool_puts(&amp;buff, g_xgmac_stats_string[i].desc);</div><div class='add'>+		ethtool_puts(data, g_xgmac_stats_string[i].desc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_enet.c b/drivers/net/ethernet/hisilicon/hns/hns_enet.c<br/>index 42bb341fd80b..e905f10b894e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_enet.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_enet.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_enet.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_enet.c</a></div><div class='hunk'>@@ -1402,7 +1402,7 @@ static void hns_nic_net_down(struct net_device *ndev)</div><div class='ctx'> 	if (test_and_set_bit(NIC_STATE_DOWN, &amp;priv-&gt;state))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	(void)del_timer_sync(&amp;priv-&gt;service_timer);</div><div class='add'>+	(void) timer_delete_sync(&amp;priv-&gt;service_timer);</div><div class='ctx'> 	netif_tx_stop_all_queues(ndev);</div><div class='ctx'> 	netif_carrier_off(ndev);</div><div class='ctx'> 	netif_tx_disable(ndev);</div><div class='hunk'>@@ -2075,7 +2075,7 @@ static void hns_nic_task_schedule(struct hns_nic_priv *priv)</div><div class='ctx'> </div><div class='ctx'> static void hns_nic_service_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct hns_nic_priv *priv = from_timer(priv, t, service_timer);</div><div class='add'>+	struct hns_nic_priv *priv = timer_container_of(priv, t, service_timer);</div><div class='ctx'> </div><div class='ctx'> 	(void)mod_timer(&amp;priv-&gt;service_timer, jiffies + SERVICE_TIMER_HZ);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c b/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c<br/>index a5bb306b2cf1..60a586a951a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns/hns_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns/hns_ethtool.c</a></div><div class='hunk'>@@ -266,9 +266,9 @@ static int hns_nic_config_phy_loopback(struct phy_device *phy_dev, u8 en)</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='del'>-		err = phy_loopback(phy_dev, true);</div><div class='add'>+		err = phy_loopback(phy_dev, true, 0);</div><div class='ctx'> 	} else {</div><div class='del'>-		err = phy_loopback(phy_dev, false);</div><div class='add'>+		err = phy_loopback(phy_dev, false, 0);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -903,7 +903,6 @@ static void hns_get_strings(struct net_device *netdev, u32 stringset, u8 *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct hns_nic_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	struct hnae_handle *h = priv-&gt;ae_handle;</div><div class='del'>-	u8 *buff = data;</div><div class='ctx'> </div><div class='ctx'> 	if (!h-&gt;dev-&gt;ops-&gt;get_strings) {</div><div class='ctx'> 		netdev_err(netdev, "h-&gt;dev-&gt;ops-&gt;get_strings is null!\n");</div><div class='hunk'>@@ -912,43 +911,43 @@ static void hns_get_strings(struct net_device *netdev, u32 stringset, u8 *data)</div><div class='ctx'> </div><div class='ctx'> 	if (stringset == ETH_SS_TEST) {</div><div class='ctx'> 		if (priv-&gt;ae_handle-&gt;phy_if != PHY_INTERFACE_MODE_XGMII)</div><div class='del'>-			ethtool_puts(&amp;buff,</div><div class='add'>+			ethtool_puts(&amp;data,</div><div class='ctx'> 				     hns_nic_test_strs[MAC_INTERNALLOOP_MAC]);</div><div class='del'>-		ethtool_puts(&amp;buff, hns_nic_test_strs[MAC_INTERNALLOOP_SERDES]);</div><div class='add'>+		ethtool_puts(&amp;data, hns_nic_test_strs[MAC_INTERNALLOOP_SERDES]);</div><div class='ctx'> 		if ((netdev-&gt;phydev) &amp;&amp; (!netdev-&gt;phydev-&gt;is_c45))</div><div class='del'>-			ethtool_puts(&amp;buff,</div><div class='add'>+			ethtool_puts(&amp;data,</div><div class='ctx'> 				     hns_nic_test_strs[MAC_INTERNALLOOP_PHY]);</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_packets");</div><div class='del'>-		ethtool_puts(&amp;buff, "tx_packets");</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_bytes");</div><div class='del'>-		ethtool_puts(&amp;buff, "tx_bytes");</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "tx_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_dropped");</div><div class='del'>-		ethtool_puts(&amp;buff, "tx_dropped");</div><div class='del'>-		ethtool_puts(&amp;buff, "multicast");</div><div class='del'>-		ethtool_puts(&amp;buff, "collisions");</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_over_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_crc_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_frame_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_fifo_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_missed_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "tx_aborted_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "tx_carrier_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "tx_fifo_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "tx_heartbeat_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_length_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "tx_window_errors");</div><div class='del'>-		ethtool_puts(&amp;buff, "rx_compressed");</div><div class='del'>-		ethtool_puts(&amp;buff, "tx_compressed");</div><div class='del'>-		ethtool_puts(&amp;buff, "netdev_rx_dropped");</div><div class='del'>-		ethtool_puts(&amp;buff, "netdev_tx_dropped");</div><div class='del'>-</div><div class='del'>-		ethtool_puts(&amp;buff, "netdev_tx_timeout");</div><div class='del'>-</div><div class='del'>-		h-&gt;dev-&gt;ops-&gt;get_strings(h, stringset, buff);</div><div class='add'>+		ethtool_puts(&amp;data, "rx_packets");</div><div class='add'>+		ethtool_puts(&amp;data, "tx_packets");</div><div class='add'>+		ethtool_puts(&amp;data, "rx_bytes");</div><div class='add'>+		ethtool_puts(&amp;data, "tx_bytes");</div><div class='add'>+		ethtool_puts(&amp;data, "rx_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "tx_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "rx_dropped");</div><div class='add'>+		ethtool_puts(&amp;data, "tx_dropped");</div><div class='add'>+		ethtool_puts(&amp;data, "multicast");</div><div class='add'>+		ethtool_puts(&amp;data, "collisions");</div><div class='add'>+		ethtool_puts(&amp;data, "rx_over_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "rx_crc_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "rx_frame_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "rx_fifo_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "rx_missed_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "tx_aborted_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "tx_carrier_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "tx_fifo_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "tx_heartbeat_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "rx_length_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "tx_window_errors");</div><div class='add'>+		ethtool_puts(&amp;data, "rx_compressed");</div><div class='add'>+		ethtool_puts(&amp;data, "tx_compressed");</div><div class='add'>+		ethtool_puts(&amp;data, "netdev_rx_dropped");</div><div class='add'>+		ethtool_puts(&amp;data, "netdev_tx_dropped");</div><div class='add'>+</div><div class='add'>+		ethtool_puts(&amp;data, "netdev_tx_timeout");</div><div class='add'>+</div><div class='add'>+		h-&gt;dev-&gt;ops-&gt;get_strings(h, stringset, &amp;data);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -970,7 +969,7 @@ static int hns_get_sset_count(struct net_device *netdev, int stringset)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (stringset == ETH_SS_TEST) {</div><div class='del'>-		u32 cnt = (sizeof(hns_nic_test_strs) / ETH_GSTRING_LEN);</div><div class='add'>+		u32 cnt = ARRAY_SIZE(hns_nic_test_strs);</div><div class='ctx'> </div><div class='ctx'> 		if (priv-&gt;ae_handle-&gt;phy_if == PHY_INTERFACE_MODE_XGMII)</div><div class='ctx'> 			cnt--;</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.c b/drivers/net/ethernet/hisilicon/hns3/hnae3.c<br/>index 67b0bf310daa..b25fb400f476 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hnae3.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hnae3.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hnae3.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hnae3.c</a></div><div class='hunk'>@@ -25,8 +25,11 @@ void hnae3_unregister_ae_algo_prepare(struct hnae3_ae_algo *ae_algo)</div><div class='ctx'> 		pci_id = pci_match_id(ae_algo-&gt;pdev_id_table, ae_dev-&gt;pdev);</div><div class='ctx'> 		if (!pci_id)</div><div class='ctx'> 			continue;</div><div class='del'>-		if (IS_ENABLED(CONFIG_PCI_IOV))</div><div class='add'>+		if (IS_ENABLED(CONFIG_PCI_IOV)) {</div><div class='add'>+			device_lock(&amp;ae_dev-&gt;pdev-&gt;dev);</div><div class='ctx'> 			pci_disable_sriov(ae_dev-&gt;pdev);</div><div class='add'>+			device_unlock(&amp;ae_dev-&gt;pdev-&gt;dev);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(hnae3_unregister_ae_algo_prepare);</div><div class='hunk'>@@ -37,6 +40,21 @@ EXPORT_SYMBOL(hnae3_unregister_ae_algo_prepare);</div><div class='ctx'>  */</div><div class='ctx'> static DEFINE_MUTEX(hnae3_common_lock);</div><div class='ctx'> </div><div class='add'>+/* ensure the drivers being unloaded one by one */</div><div class='add'>+static DEFINE_MUTEX(hnae3_unload_lock);</div><div class='add'>+</div><div class='add'>+void hnae3_acquire_unload_lock(void)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;hnae3_unload_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(hnae3_acquire_unload_lock);</div><div class='add'>+</div><div class='add'>+void hnae3_release_unload_lock(void)</div><div class='add'>+{</div><div class='add'>+	mutex_unlock(&amp;hnae3_unload_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(hnae3_release_unload_lock);</div><div class='add'>+</div><div class='ctx'> static bool hnae3_client_match(enum hnae3_client_type client_type)</div><div class='ctx'> {</div><div class='ctx'> 	if (client_type == HNAE3_CLIENT_KNIC ||</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h<br/>index 27dbe367f3d3..d7c3df1958f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hnae3.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hnae3.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hnae3.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hnae3.h</a></div><div class='hunk'>@@ -339,6 +339,10 @@ enum hnae3_dbg_cmd {</div><div class='ctx'> 	HNAE3_DBG_CMD_UNKNOWN,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define hnae3_seq_file_to_ae_dev(s)	(dev_get_drvdata((s)-&gt;private))</div><div class='add'>+#define hnae3_seq_file_to_handle(s)	\</div><div class='add'>+		(((struct hnae3_ae_dev *)hnae3_seq_file_to_ae_dev(s))-&gt;handle)</div><div class='add'>+</div><div class='ctx'> enum hnae3_tc_map_mode {</div><div class='ctx'> 	HNAE3_TC_MAP_MODE_PRIO,</div><div class='ctx'> 	HNAE3_TC_MAP_MODE_DSCP,</div><div class='hunk'>@@ -434,8 +438,11 @@ struct hnae3_ae_dev {</div><div class='ctx'> 	u32 dev_version;</div><div class='ctx'> 	DECLARE_BITMAP(caps, HNAE3_DEV_CAPS_MAX_NUM);</div><div class='ctx'> 	void *priv;</div><div class='add'>+	struct hnae3_handle *handle;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+typedef int (*read_func)(struct seq_file *s, void *data);</div><div class='add'>+</div><div class='ctx'> /* This struct defines the operation on the handle.</div><div class='ctx'>  *</div><div class='ctx'>  * init_ae_dev(): (mandatory)</div><div class='hunk'>@@ -580,8 +587,6 @@ struct hnae3_ae_dev {</div><div class='ctx'>  *   Delete clsflower rule</div><div class='ctx'>  * cls_flower_active</div><div class='ctx'>  *   Check if any cls flower rule exist</div><div class='del'>- * dbg_read_cmd</div><div class='del'>- *   Execute debugfs read command.</div><div class='ctx'>  * set_tx_hwts_info</div><div class='ctx'>  *   Save information for 1588 tx packet</div><div class='ctx'>  * get_rx_hwts</div><div class='hunk'>@@ -594,6 +599,8 @@ struct hnae3_ae_dev {</div><div class='ctx'>  *   Get wake on lan info</div><div class='ctx'>  * set_wol</div><div class='ctx'>  *   Config wake on lan</div><div class='add'>+ * dbg_get_read_func</div><div class='add'>+ *   Return the read func for debugfs seq file</div><div class='ctx'>  */</div><div class='ctx'> struct hnae3_ae_ops {</div><div class='ctx'> 	int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);</div><div class='hunk'>@@ -677,7 +684,7 @@ struct hnae3_ae_ops {</div><div class='ctx'> 	void (*get_mac_stats)(struct hnae3_handle *handle,</div><div class='ctx'> 			      struct hns3_mac_stats *mac_stats);</div><div class='ctx'> 	void (*get_strings)(struct hnae3_handle *handle,</div><div class='del'>-			    u32 stringset, u8 *data);</div><div class='add'>+			    u32 stringset, u8 **data);</div><div class='ctx'> 	int (*get_sset_count)(struct hnae3_handle *handle, int stringset);</div><div class='ctx'> </div><div class='ctx'> 	void (*get_regs)(struct hnae3_handle *handle, u32 *version,</div><div class='hunk'>@@ -690,9 +697,9 @@ struct hnae3_ae_ops {</div><div class='ctx'> 	int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,</div><div class='ctx'> 		       const u8 *key, const u8 hfunc);</div><div class='ctx'> 	int (*set_rss_tuple)(struct hnae3_handle *handle,</div><div class='del'>-			     struct ethtool_rxnfc *cmd);</div><div class='add'>+			     const struct ethtool_rxfh_fields *cmd);</div><div class='ctx'> 	int (*get_rss_tuple)(struct hnae3_handle *handle,</div><div class='del'>-			     struct ethtool_rxnfc *cmd);</div><div class='add'>+			     struct ethtool_rxfh_fields *cmd);</div><div class='ctx'> </div><div class='ctx'> 	int (*get_tc_size)(struct hnae3_handle *handle);</div><div class='ctx'> </div><div class='hunk'>@@ -748,8 +755,6 @@ struct hnae3_ae_ops {</div><div class='ctx'> 	void (*enable_fd)(struct hnae3_handle *handle, bool enable);</div><div class='ctx'> 	int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,</div><div class='ctx'> 			      u16 flow_id, struct flow_keys *fkeys);</div><div class='del'>-	int (*dbg_read_cmd)(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,</div><div class='del'>-			    char *buf, int len);</div><div class='ctx'> 	pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);</div><div class='ctx'> 	bool (*get_hw_reset_stat)(struct hnae3_handle *handle);</div><div class='ctx'> 	bool (*ae_dev_resetting)(struct hnae3_handle *handle);</div><div class='hunk'>@@ -796,6 +801,14 @@ struct hnae3_ae_ops {</div><div class='ctx'> 			struct ethtool_wolinfo *wol);</div><div class='ctx'> 	int (*set_wol)(struct hnae3_handle *handle,</div><div class='ctx'> 		       struct ethtool_wolinfo *wol);</div><div class='add'>+	int (*dbg_get_read_func)(struct hnae3_handle *handle,</div><div class='add'>+				 enum hnae3_dbg_cmd cmd,</div><div class='add'>+				 read_func *func);</div><div class='add'>+	int (*hwtstamp_get)(struct hnae3_handle *handle,</div><div class='add'>+			    struct kernel_hwtstamp_config *config);</div><div class='add'>+	int (*hwtstamp_set)(struct hnae3_handle *handle,</div><div class='add'>+			    struct kernel_hwtstamp_config *config,</div><div class='add'>+			    struct netlink_ext_ack *extack);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct hnae3_dcb_ops {</div><div class='hunk'>@@ -916,9 +929,6 @@ struct hnae3_handle {</div><div class='ctx'> </div><div class='ctx'> 	u8 netdev_flags;</div><div class='ctx'> 	struct dentry *hnae3_dbgfs;</div><div class='del'>-	/* protects concurrent contention between debugfs commands */</div><div class='del'>-	struct mutex dbgfs_lock;</div><div class='del'>-	char **dbgfs_buf;</div><div class='ctx'> </div><div class='ctx'> 	/* Network interface message level enabled bits */</div><div class='ctx'> 	u32 msg_enable;</div><div class='hunk'>@@ -966,4 +976,6 @@ int hnae3_register_client(struct hnae3_client *client);</div><div class='ctx'> void hnae3_set_client_init_flag(struct hnae3_client *client,</div><div class='ctx'> 				struct hnae3_ae_dev *ae_dev,</div><div class='ctx'> 				unsigned int inited);</div><div class='add'>+void hnae3_acquire_unload_lock(void);</div><div class='add'>+void hnae3_release_unload_lock(void);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c<br/>index 4ad4e8ab2f1f..37396ca4ecfc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c</a></div><div class='hunk'>@@ -348,7 +348,7 @@ static int hclge_comm_cmd_csq_clean(struct hclge_comm_hw *hw)</div><div class='ctx'> static int hclge_comm_cmd_csq_done(struct hclge_comm_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u32 head = hclge_comm_read_dev(hw, HCLGE_COMM_NIC_CSQ_HEAD_REG);</div><div class='del'>-	return head == hw-&gt;cmq.csq.next_to_use;</div><div class='add'>+	return head == (u32)hw-&gt;cmq.csq.next_to_use;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 hclge_get_cmdq_tx_timeout(u16 opcode, u32 tx_timeout)</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.c<br/>index 4e2bb6556b1c..1eca53aaf598 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.c</a></div><div class='hunk'>@@ -151,7 +151,7 @@ EXPORT_SYMBOL_GPL(hclge_comm_set_rss_hash_key);</div><div class='ctx'> int hclge_comm_set_rss_tuple(struct hnae3_ae_dev *ae_dev,</div><div class='ctx'> 			     struct hclge_comm_hw *hw,</div><div class='ctx'> 			     struct hclge_comm_rss_cfg *rss_cfg,</div><div class='del'>-			     struct ethtool_rxnfc *nfc)</div><div class='add'>+			     const struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_comm_rss_input_tuple_cmd *req;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='hunk'>@@ -422,7 +422,7 @@ int hclge_comm_set_rss_algo_key(struct hclge_comm_hw *hw, const u8 hfunc,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hclge_comm_set_rss_algo_key);</div><div class='ctx'> </div><div class='del'>-static u8 hclge_comm_get_rss_hash_bits(struct ethtool_rxnfc *nfc)</div><div class='add'>+static u8 hclge_comm_get_rss_hash_bits(const struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='ctx'> 	u8 hash_sets = nfc-&gt;data &amp; RXH_L4_B_0_1 ? HCLGE_COMM_S_PORT_BIT : 0;</div><div class='ctx'> </div><div class='hunk'>@@ -448,7 +448,7 @@ static u8 hclge_comm_get_rss_hash_bits(struct ethtool_rxnfc *nfc)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int hclge_comm_init_rss_tuple_cmd(struct hclge_comm_rss_cfg *rss_cfg,</div><div class='del'>-				  struct ethtool_rxnfc *nfc,</div><div class='add'>+				  const struct ethtool_rxfh_fields *nfc,</div><div class='ctx'> 				  struct hnae3_ae_dev *ae_dev,</div><div class='ctx'> 				  struct hclge_comm_rss_input_tuple_cmd *req)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.h<br/>index cdafa63fe38b..cbc02b50c6e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.h</a></div><div class='hunk'>@@ -108,7 +108,7 @@ void hclge_comm_get_rss_indir_tbl(struct hclge_comm_rss_cfg *rss_cfg,</div><div class='ctx'> int hclge_comm_set_rss_algo_key(struct hclge_comm_hw *hw, const u8 hfunc,</div><div class='ctx'> 				const u8 *key);</div><div class='ctx'> int hclge_comm_init_rss_tuple_cmd(struct hclge_comm_rss_cfg *rss_cfg,</div><div class='del'>-				  struct ethtool_rxnfc *nfc,</div><div class='add'>+				  const struct ethtool_rxfh_fields *nfc,</div><div class='ctx'> 				  struct hnae3_ae_dev *ae_dev,</div><div class='ctx'> 				  struct hclge_comm_rss_input_tuple_cmd *req);</div><div class='ctx'> u64 hclge_comm_convert_rss_tuple(u8 tuple_sets);</div><div class='hunk'>@@ -129,5 +129,5 @@ int hclge_comm_set_rss_hash_key(struct hclge_comm_rss_cfg *rss_cfg,</div><div class='ctx'> int hclge_comm_set_rss_tuple(struct hnae3_ae_dev *ae_dev,</div><div class='ctx'> 			     struct hclge_comm_hw *hw,</div><div class='ctx'> 			     struct hclge_comm_rss_cfg *rss_cfg,</div><div class='del'>-			     struct ethtool_rxnfc *nfc);</div><div class='add'>+			     const struct ethtool_rxfh_fields *nfc);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c<br/>index 2b31188ff555..f9a3d6fc4416 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c</a></div><div class='hunk'>@@ -36,27 +36,22 @@ int hclge_comm_tqps_get_sset_count(struct hnae3_handle *handle)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hclge_comm_tqps_get_sset_count);</div><div class='ctx'> </div><div class='del'>-u8 *hclge_comm_tqps_get_strings(struct hnae3_handle *handle, u8 *data)</div><div class='add'>+void hclge_comm_tqps_get_strings(struct hnae3_handle *handle, u8 **data)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_knic_private_info *kinfo = &amp;handle-&gt;kinfo;</div><div class='del'>-	u8 *buff = data;</div><div class='ctx'> 	u16 i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; kinfo-&gt;num_tqps; i++) {</div><div class='ctx'> 		struct hclge_comm_tqp *tqp =</div><div class='ctx'> 			container_of(kinfo-&gt;tqp[i], struct hclge_comm_tqp, q);</div><div class='del'>-		snprintf(buff, ETH_GSTRING_LEN, "txq%u_pktnum_rcd", tqp-&gt;index);</div><div class='del'>-		buff += ETH_GSTRING_LEN;</div><div class='add'>+		ethtool_sprintf(data, "txq%u_pktnum_rcd", tqp-&gt;index);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; kinfo-&gt;num_tqps; i++) {</div><div class='ctx'> 		struct hclge_comm_tqp *tqp =</div><div class='ctx'> 			container_of(kinfo-&gt;tqp[i], struct hclge_comm_tqp, q);</div><div class='del'>-		snprintf(buff, ETH_GSTRING_LEN, "rxq%u_pktnum_rcd", tqp-&gt;index);</div><div class='del'>-		buff += ETH_GSTRING_LEN;</div><div class='add'>+		ethtool_sprintf(data, "rxq%u_pktnum_rcd", tqp-&gt;index);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return buff;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(hclge_comm_tqps_get_strings);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.h<br/>index a46350162ee8..b9ff424c0bc2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.h</a></div><div class='hunk'>@@ -32,7 +32,7 @@ struct hclge_comm_tqp {</div><div class='ctx'> </div><div class='ctx'> u64 *hclge_comm_tqps_get_stats(struct hnae3_handle *handle, u64 *data);</div><div class='ctx'> int hclge_comm_tqps_get_sset_count(struct hnae3_handle *handle);</div><div class='del'>-u8 *hclge_comm_tqps_get_strings(struct hnae3_handle *handle, u8 *data);</div><div class='add'>+void hclge_comm_tqps_get_strings(struct hnae3_handle *handle, u8 **data);</div><div class='ctx'> void hclge_comm_reset_tqp_stats(struct hnae3_handle *handle);</div><div class='ctx'> int hclge_comm_tqps_update_stats(struct hnae3_handle *handle,</div><div class='ctx'> 				 struct hclge_comm_hw *hw);</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c<br/>index 841e5af7b2be..4cce4f4ba6b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c</a></div><div class='hunk'>@@ -3,6 +3,8 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "hnae3.h"</div><div class='ctx'> #include "hns3_debugfs.h"</div><div class='hunk'>@@ -39,323 +41,279 @@ static struct hns3_dbg_dentry_info hns3_dbg_dentry[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int hns3_dbg_bd_file_init(struct hnae3_handle *handle, u32 cmd);</div><div class='del'>-static int hns3_dbg_common_file_init(struct hnae3_handle *handle, u32 cmd);</div><div class='add'>+static int hns3_dbg_common_init_t1(struct hnae3_handle *handle, u32 cmd);</div><div class='add'>+static int hns3_dbg_common_init_t2(struct hnae3_handle *handle, u32 cmd);</div><div class='ctx'> </div><div class='ctx'> static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "tm_nodes",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_NODES,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "tm_priority",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_PRI,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "tm_qset",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_QSET,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "tm_map",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_MAP,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN_1MB,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "tm_pg",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_PG,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "tm_port",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_PORT,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "tc_sch_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TC_SCH_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "qos_pause_cfg",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_QOS_PAUSE_CFG,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "qos_pri_map",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_QOS_PRI_MAP,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "qos_dscp_map",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_QOS_DSCP_MAP,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "qos_buf_cfg",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_QOS_BUF_CFG,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TM,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "dev_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_DEV_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t1,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "tx_bd_queue",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TX_BD,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_TX_BD,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN_5MB,</div><div class='ctx'> 		.init = hns3_dbg_bd_file_init,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "rx_bd_queue",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_RX_BD,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_RX_BD,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN_4MB,</div><div class='ctx'> 		.init = hns3_dbg_bd_file_init,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "uc",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_MAC_UC,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_MAC,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN_128KB,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "mc",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_MAC_MC,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_MAC,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "mng_tbl",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_MNG_TBL,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "loopback",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_LOOPBACK,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "interrupt_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_INTERRUPT_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "reset_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_RESET_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "imp_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_IMP_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "ncl_config",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_NCL_CONFIG,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN_128KB,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "mac_tnl_status",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_MAC_TNL_STATUS,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "bios_common",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_BIOS_COMMON,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "ssu",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_SSU,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "igu_egu",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_IGU_EGU,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "rpu",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_RPU,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "ncsi",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_NCSI,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "rtc",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_RTC,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "ppp",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_PPP,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "rcb",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_RCB,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "tqp",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_TQP,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN_128KB,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "mac",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_MAC,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "dcb",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_DCB,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_REG,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "queue_map",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_QUEUE_MAP,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_QUEUE,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t1,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "rx_queue_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_RX_QUEUE_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_QUEUE,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN_1MB,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t1,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "tx_queue_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TX_QUEUE_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_QUEUE,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN_1MB,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t1,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "fd_tcam",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_FD_TCAM,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_FD,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN_1MB,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "service_task_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_SERV_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "vlan_config",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_VLAN_CONFIG,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "ptp_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_PTP_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "fd_counter",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_FD_COUNTER,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_FD,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "umv_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_UMV_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t2,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "page_pool_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_PAGE_POOL_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t1,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "coalesce_info",</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_COAL_INFO,</div><div class='ctx'> 		.dentry = HNS3_DBG_DENTRY_COMMON,</div><div class='del'>-		.buf_len = HNS3_DBG_READ_LEN_1MB,</div><div class='del'>-		.init = hns3_dbg_common_file_init,</div><div class='add'>+		.init = hns3_dbg_common_init_t1,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -420,71 +378,17 @@ static struct hns3_dbg_cap_info hns3_dbg_cap[] = {</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct hns3_dbg_item coal_info_items[] = {</div><div class='del'>-	{ "VEC_ID", 2 },</div><div class='del'>-	{ "ALGO_STATE", 2 },</div><div class='del'>-	{ "PROFILE_ID", 2 },</div><div class='del'>-	{ "CQE_MODE", 2 },</div><div class='del'>-	{ "TUNE_STATE", 2 },</div><div class='del'>-	{ "STEPS_LEFT", 2 },</div><div class='del'>-	{ "STEPS_RIGHT", 2 },</div><div class='del'>-	{ "TIRED", 2 },</div><div class='del'>-	{ "SW_GL", 2 },</div><div class='del'>-	{ "SW_QL", 2 },</div><div class='del'>-	{ "HW_GL", 2 },</div><div class='del'>-	{ "HW_QL", 2 },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const char * const dim_cqe_mode_str[] = { "EQE", "CQE" };</div><div class='ctx'> static const char * const dim_state_str[] = { "START", "IN_PROG", "APPLY" };</div><div class='ctx'> static const char * const</div><div class='ctx'> dim_tune_stat_str[] = { "ON_TOP", "TIRED", "RIGHT", "LEFT" };</div><div class='ctx'> </div><div class='del'>-static void hns3_dbg_fill_content(char *content, u16 len,</div><div class='del'>-				  const struct hns3_dbg_item *items,</div><div class='del'>-				  const char **result, u16 size)</div><div class='del'>-{</div><div class='del'>-#define HNS3_DBG_LINE_END_LEN	2</div><div class='del'>-	char *pos = content;</div><div class='del'>-	u16 item_len;</div><div class='del'>-	u16 i;</div><div class='del'>-</div><div class='del'>-	if (!len) {</div><div class='del'>-		return;</div><div class='del'>-	} else if (len &lt;= HNS3_DBG_LINE_END_LEN) {</div><div class='del'>-		*pos++ = '\0';</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(content, ' ', len);</div><div class='del'>-	len -= HNS3_DBG_LINE_END_LEN;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; size; i++) {</div><div class='del'>-		item_len = strlen(items[i].name) + items[i].interval;</div><div class='del'>-		if (len &lt; item_len)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (result) {</div><div class='del'>-			if (item_len &lt; strlen(result[i]))</div><div class='del'>-				break;</div><div class='del'>-			memcpy(pos, result[i], strlen(result[i]));</div><div class='del'>-		} else {</div><div class='del'>-			memcpy(pos, items[i].name, strlen(items[i].name));</div><div class='del'>-		}</div><div class='del'>-		pos += item_len;</div><div class='del'>-		len -= item_len;</div><div class='del'>-	}</div><div class='del'>-	*pos++ = '\n';</div><div class='del'>-	*pos++ = '\0';</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void hns3_get_coal_info(struct hns3_enet_tqp_vector *tqp_vector,</div><div class='del'>-			       char **result, int i, bool is_tx)</div><div class='add'>+			       struct seq_file *s, int i, bool is_tx)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int gl_offset, ql_offset;</div><div class='ctx'> 	struct hns3_enet_coalesce *coal;</div><div class='ctx'> 	unsigned int reg_val;</div><div class='del'>-	unsigned int j = 0;</div><div class='ctx'> 	struct dim *dim;</div><div class='ctx'> 	bool ql_enable;</div><div class='ctx'> </div><div class='hunk'>@@ -502,191 +406,96 @@ static void hns3_get_coal_info(struct hns3_enet_tqp_vector *tqp_vector,</div><div class='ctx'> 		ql_enable = tqp_vector-&gt;rx_group.coal.ql_enable;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sprintf(result[j++], "%d", i);</div><div class='del'>-	sprintf(result[j++], "%s", dim-&gt;state &lt; ARRAY_SIZE(dim_state_str) ?</div><div class='del'>-		dim_state_str[dim-&gt;state] : "unknown");</div><div class='del'>-	sprintf(result[j++], "%u", dim-&gt;profile_ix);</div><div class='del'>-	sprintf(result[j++], "%s", dim-&gt;mode &lt; ARRAY_SIZE(dim_cqe_mode_str) ?</div><div class='del'>-		dim_cqe_mode_str[dim-&gt;mode] : "unknown");</div><div class='del'>-	sprintf(result[j++], "%s",</div><div class='del'>-		dim-&gt;tune_state &lt; ARRAY_SIZE(dim_tune_stat_str) ?</div><div class='del'>-		dim_tune_stat_str[dim-&gt;tune_state] : "unknown");</div><div class='del'>-	sprintf(result[j++], "%u", dim-&gt;steps_left);</div><div class='del'>-	sprintf(result[j++], "%u", dim-&gt;steps_right);</div><div class='del'>-	sprintf(result[j++], "%u", dim-&gt;tired);</div><div class='del'>-	sprintf(result[j++], "%u", coal-&gt;int_gl);</div><div class='del'>-	sprintf(result[j++], "%u", coal-&gt;int_ql);</div><div class='add'>+	seq_printf(s, "%-8d", i);</div><div class='add'>+	seq_printf(s, "%-12s", dim-&gt;state &lt; ARRAY_SIZE(dim_state_str) ?</div><div class='add'>+		   dim_state_str[dim-&gt;state] : "unknown");</div><div class='add'>+	seq_printf(s, "%-12u", dim-&gt;profile_ix);</div><div class='add'>+	seq_printf(s, "%-10s", dim-&gt;mode &lt; ARRAY_SIZE(dim_cqe_mode_str) ?</div><div class='add'>+		   dim_cqe_mode_str[dim-&gt;mode] : "unknown");</div><div class='add'>+	seq_printf(s, "%-12s", dim-&gt;tune_state &lt; ARRAY_SIZE(dim_tune_stat_str) ?</div><div class='add'>+		   dim_tune_stat_str[dim-&gt;tune_state] : "unknown");</div><div class='add'>+	seq_printf(s, "%-12u%-13u%-7u%-7u%-7u", dim-&gt;steps_left,</div><div class='add'>+		   dim-&gt;steps_right, dim-&gt;tired, coal-&gt;int_gl, coal-&gt;int_ql);</div><div class='ctx'> 	reg_val = readl(tqp_vector-&gt;mask_addr + gl_offset) &amp;</div><div class='ctx'> 		  HNS3_VECTOR_GL_MASK;</div><div class='del'>-	sprintf(result[j++], "%u", reg_val);</div><div class='add'>+	seq_printf(s, "%-7u", reg_val);</div><div class='ctx'> 	if (ql_enable) {</div><div class='ctx'> 		reg_val = readl(tqp_vector-&gt;mask_addr + ql_offset) &amp;</div><div class='ctx'> 			  HNS3_VECTOR_QL_MASK;</div><div class='del'>-		sprintf(result[j++], "%u", reg_val);</div><div class='add'>+		seq_printf(s, "%u\n", reg_val);</div><div class='ctx'> 	} else {</div><div class='del'>-		sprintf(result[j++], "NA");</div><div class='add'>+		seq_puts(s, "NA\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hns3_dump_coal_info(struct hnae3_handle *h, char *buf, int len,</div><div class='del'>-				int *pos, bool is_tx)</div><div class='add'>+static void hns3_dump_coal_info(struct seq_file *s, bool is_tx)</div><div class='ctx'> {</div><div class='del'>-	char data_str[ARRAY_SIZE(coal_info_items)][HNS3_DBG_DATA_STR_LEN];</div><div class='del'>-	char *result[ARRAY_SIZE(coal_info_items)];</div><div class='add'>+	struct hnae3_handle *h = hnae3_seq_file_to_handle(s);</div><div class='ctx'> 	struct hns3_enet_tqp_vector *tqp_vector;</div><div class='ctx'> 	struct hns3_nic_priv *priv = h-&gt;priv;</div><div class='del'>-	char content[HNS3_DBG_INFO_LEN];</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(coal_info_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i][0];</div><div class='add'>+	seq_printf(s, "%s interrupt coalesce info:\n", is_tx ? "tx" : "rx");</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "%s interrupt coalesce info:\n",</div><div class='del'>-			  is_tx ? "tx" : "rx");</div><div class='del'>-	hns3_dbg_fill_content(content, sizeof(content), coal_info_items,</div><div class='del'>-			      NULL, ARRAY_SIZE(coal_info_items));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "%s", content);</div><div class='add'>+	seq_puts(s, "VEC_ID  ALGO_STATE  PROFILE_ID  CQE_MODE  TUNE_STATE  ");</div><div class='add'>+	seq_puts(s, "STEPS_LEFT  STEPS_RIGHT  TIRED  SW_GL  SW_QL  ");</div><div class='add'>+	seq_puts(s, "HW_GL  HW_QL\n");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;vector_num; i++) {</div><div class='ctx'> 		tqp_vector = &amp;priv-&gt;tqp_vector[i];</div><div class='del'>-		hns3_get_coal_info(tqp_vector, result, i, is_tx);</div><div class='del'>-		hns3_dbg_fill_content(content, sizeof(content), coal_info_items,</div><div class='del'>-				      (const char **)result,</div><div class='del'>-				      ARRAY_SIZE(coal_info_items));</div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "%s", content);</div><div class='add'>+		hns3_get_coal_info(tqp_vector, s, i, is_tx);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hns3_dbg_coal_info(struct hnae3_handle *h, char *buf, int len)</div><div class='add'>+static int hns3_dbg_coal_info(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	int pos = 0;</div><div class='del'>-</div><div class='del'>-	hns3_dump_coal_info(h, buf, len, &amp;pos, true);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "\n");</div><div class='del'>-	hns3_dump_coal_info(h, buf, len, &amp;pos, false);</div><div class='add'>+	hns3_dump_coal_info(s, true);</div><div class='add'>+	seq_puts(s, "\n");</div><div class='add'>+	hns3_dump_coal_info(s, false);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hns3_dbg_item tx_spare_info_items[] = {</div><div class='del'>-	{ "QUEUE_ID", 2 },</div><div class='del'>-	{ "COPYBREAK", 2 },</div><div class='del'>-	{ "LEN", 7 },</div><div class='del'>-	{ "NTU", 4 },</div><div class='del'>-	{ "NTC", 4 },</div><div class='del'>-	{ "LTC", 4 },</div><div class='del'>-	{ "DMA", 17 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void hns3_dbg_tx_spare_info(struct hns3_enet_ring *ring, char *buf,</div><div class='del'>-				   int len, u32 ring_num, int *pos)</div><div class='del'>-{</div><div class='del'>-	char data_str[ARRAY_SIZE(tx_spare_info_items)][HNS3_DBG_DATA_STR_LEN];</div><div class='del'>-	struct hns3_tx_spare *tx_spare = ring-&gt;tx_spare;</div><div class='del'>-	char *result[ARRAY_SIZE(tx_spare_info_items)];</div><div class='del'>-	char content[HNS3_DBG_INFO_LEN];</div><div class='del'>-	u32 i, j;</div><div class='del'>-</div><div class='del'>-	if (!tx_spare) {</div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-				  "tx spare buffer is not enabled\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(tx_spare_info_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i][0];</div><div class='del'>-</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "tx spare buffer info\n");</div><div class='del'>-	hns3_dbg_fill_content(content, sizeof(content), tx_spare_info_items,</div><div class='del'>-			      NULL, ARRAY_SIZE(tx_spare_info_items));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "%s", content);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ring_num; i++) {</div><div class='del'>-		j = 0;</div><div class='del'>-		sprintf(result[j++], "%u", i);</div><div class='del'>-		sprintf(result[j++], "%u", ring-&gt;tx_copybreak);</div><div class='del'>-		sprintf(result[j++], "%u", tx_spare-&gt;len);</div><div class='del'>-		sprintf(result[j++], "%u", tx_spare-&gt;next_to_use);</div><div class='del'>-		sprintf(result[j++], "%u", tx_spare-&gt;next_to_clean);</div><div class='del'>-		sprintf(result[j++], "%u", tx_spare-&gt;last_to_clean);</div><div class='del'>-		sprintf(result[j++], "%pad", &amp;tx_spare-&gt;dma);</div><div class='del'>-		hns3_dbg_fill_content(content, sizeof(content),</div><div class='del'>-				      tx_spare_info_items,</div><div class='del'>-				      (const char **)result,</div><div class='del'>-				      ARRAY_SIZE(tx_spare_info_items));</div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "%s", content);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct hns3_dbg_item rx_queue_info_items[] = {</div><div class='del'>-	{ "QUEUE_ID", 2 },</div><div class='del'>-	{ "BD_NUM", 2 },</div><div class='del'>-	{ "BD_LEN", 2 },</div><div class='del'>-	{ "TAIL", 2 },</div><div class='del'>-	{ "HEAD", 2 },</div><div class='del'>-	{ "FBDNUM", 2 },</div><div class='del'>-	{ "PKTNUM", 5 },</div><div class='del'>-	{ "COPYBREAK", 2 },</div><div class='del'>-	{ "RING_EN", 2 },</div><div class='del'>-	{ "RX_RING_EN", 2 },</div><div class='del'>-	{ "BASE_ADDR", 10 },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void hns3_dump_rx_queue_info(struct hns3_enet_ring *ring,</div><div class='del'>-				    struct hnae3_ae_dev *ae_dev, char **result,</div><div class='del'>-				    u32 index)</div><div class='add'>+				    struct seq_file *s, u32 index)</div><div class='ctx'> {</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hnae3_seq_file_to_ae_dev(s);</div><div class='add'>+	void __iomem *base = ring-&gt;tqp-&gt;io_base;</div><div class='ctx'> 	u32 base_add_l, base_add_h;</div><div class='del'>-	u32 j = 0;</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", index);</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_RX_RING_BD_NUM_REG));</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_RX_RING_BD_LEN_REG));</div><div class='ctx'> </div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_RX_RING_TAIL_REG));</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_RX_RING_HEAD_REG));</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_RX_RING_FBDNUM_REG));</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_RX_RING_PKTNUM_RECORD_REG));</div><div class='del'>-	sprintf(result[j++], "%u", ring-&gt;rx_copybreak);</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%s", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_EN_REG) ? "on" : "off");</div><div class='add'>+	seq_printf(s, "%-10u", index);</div><div class='add'>+	seq_printf(s, "%-8u",</div><div class='add'>+		   readl_relaxed(base + HNS3_RING_RX_RING_BD_NUM_REG));</div><div class='add'>+	seq_printf(s, "%-8u",</div><div class='add'>+		   readl_relaxed(base + HNS3_RING_RX_RING_BD_LEN_REG));</div><div class='add'>+	seq_printf(s, "%-6u",</div><div class='add'>+		   readl_relaxed(base + HNS3_RING_RX_RING_TAIL_REG));</div><div class='add'>+	seq_printf(s, "%-6u",</div><div class='add'>+		   readl_relaxed(base + HNS3_RING_RX_RING_HEAD_REG));</div><div class='add'>+	seq_printf(s, "%-8u",</div><div class='add'>+		   readl_relaxed(base + HNS3_RING_RX_RING_FBDNUM_REG));</div><div class='add'>+	seq_printf(s, "%-11u", readl_relaxed(base +</div><div class='add'>+		   HNS3_RING_RX_RING_PKTNUM_RECORD_REG));</div><div class='add'>+	seq_printf(s, "%-11u", ring-&gt;rx_copybreak);</div><div class='add'>+	seq_printf(s, "%-9s",</div><div class='add'>+		   str_on_off(readl_relaxed(base + HNS3_RING_EN_REG)));</div><div class='ctx'> </div><div class='ctx'> 	if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev))</div><div class='del'>-		sprintf(result[j++], "%s", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-			HNS3_RING_RX_EN_REG) ? "on" : "off");</div><div class='add'>+		seq_printf(s, "%-12s", str_on_off(readl_relaxed(base +</div><div class='add'>+						  HNS3_RING_RX_EN_REG)));</div><div class='ctx'> 	else</div><div class='del'>-		sprintf(result[j++], "%s", "NA");</div><div class='add'>+		seq_printf(s, "%-12s", "NA");</div><div class='ctx'> </div><div class='del'>-	base_add_h = readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-					HNS3_RING_RX_RING_BASEADDR_H_REG);</div><div class='del'>-	base_add_l = readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-					HNS3_RING_RX_RING_BASEADDR_L_REG);</div><div class='del'>-	sprintf(result[j++], "0x%08x%08x", base_add_h, base_add_l);</div><div class='add'>+	base_add_h = readl_relaxed(base + HNS3_RING_RX_RING_BASEADDR_H_REG);</div><div class='add'>+	base_add_l = readl_relaxed(base + HNS3_RING_RX_RING_BASEADDR_L_REG);</div><div class='add'>+	seq_printf(s, "0x%08x%08x\n", base_add_h, base_add_l);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hns3_dbg_rx_queue_info(struct hnae3_handle *h,</div><div class='del'>-				  char *buf, int len)</div><div class='add'>+static int hns3_dbg_rx_queue_info(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	char data_str[ARRAY_SIZE(rx_queue_info_items)][HNS3_DBG_DATA_STR_LEN];</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='del'>-	char *result[ARRAY_SIZE(rx_queue_info_items)];</div><div class='add'>+	struct hnae3_handle *h = hnae3_seq_file_to_handle(s);</div><div class='ctx'> 	struct hns3_nic_priv *priv = h-&gt;priv;</div><div class='del'>-	char content[HNS3_DBG_INFO_LEN];</div><div class='ctx'> 	struct hns3_enet_ring *ring;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;ring) {</div><div class='hunk'>@@ -694,12 +503,9 @@ static int hns3_dbg_rx_queue_info(struct hnae3_handle *h,</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(rx_queue_info_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i][0];</div><div class='add'>+	seq_puts(s, "QUEUE_ID  BD_NUM  BD_LEN  TAIL  HEAD  FBDNUM  ");</div><div class='add'>+	seq_puts(s, "PKTNUM     COPYBREAK  RING_EN  RX_RING_EN  BASE_ADDR\n");</div><div class='ctx'> </div><div class='del'>-	hns3_dbg_fill_content(content, sizeof(content), rx_queue_info_items,</div><div class='del'>-			      NULL, ARRAY_SIZE(rx_queue_info_items));</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='ctx'> 	for (i = 0; i &lt; h-&gt;kinfo.num_tqps; i++) {</div><div class='ctx'> 		/* Each cycle needs to determine whether the instance is reset,</div><div class='ctx'> 		 * to prevent reference to invalid memory. And need to ensure</div><div class='hunk'>@@ -710,86 +516,51 @@ static int hns3_dbg_rx_queue_info(struct hnae3_handle *h,</div><div class='ctx'> 			return -EPERM;</div><div class='ctx'> </div><div class='ctx'> 		ring = &amp;priv-&gt;ring[(u32)(i + h-&gt;kinfo.num_tqps)];</div><div class='del'>-		hns3_dump_rx_queue_info(ring, ae_dev, result, i);</div><div class='del'>-		hns3_dbg_fill_content(content, sizeof(content),</div><div class='del'>-				      rx_queue_info_items,</div><div class='del'>-				      (const char **)result,</div><div class='del'>-				      ARRAY_SIZE(rx_queue_info_items));</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+		hns3_dump_rx_queue_info(ring, s, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hns3_dbg_item tx_queue_info_items[] = {</div><div class='del'>-	{ "QUEUE_ID", 2 },</div><div class='del'>-	{ "BD_NUM", 2 },</div><div class='del'>-	{ "TC", 2 },</div><div class='del'>-	{ "TAIL", 2 },</div><div class='del'>-	{ "HEAD", 2 },</div><div class='del'>-	{ "FBDNUM", 2 },</div><div class='del'>-	{ "OFFSET", 2 },</div><div class='del'>-	{ "PKTNUM", 5 },</div><div class='del'>-	{ "RING_EN", 2 },</div><div class='del'>-	{ "TX_RING_EN", 2 },</div><div class='del'>-	{ "BASE_ADDR", 10 },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void hns3_dump_tx_queue_info(struct hns3_enet_ring *ring,</div><div class='del'>-				    struct hnae3_ae_dev *ae_dev, char **result,</div><div class='del'>-				    u32 index)</div><div class='add'>+				    struct seq_file *s, u32 index)</div><div class='ctx'> {</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hnae3_seq_file_to_ae_dev(s);</div><div class='add'>+	void __iomem *base = ring-&gt;tqp-&gt;io_base;</div><div class='ctx'> 	u32 base_add_l, base_add_h;</div><div class='del'>-	u32 j = 0;</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", index);</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_TX_RING_BD_NUM_REG));</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_TX_RING_TC_REG));</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_TX_RING_TAIL_REG));</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_TX_RING_HEAD_REG));</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_TX_RING_FBDNUM_REG));</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_TX_RING_OFFSET_REG));</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_TX_RING_PKTNUM_RECORD_REG));</div><div class='ctx'> </div><div class='del'>-	sprintf(result[j++], "%s", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-		HNS3_RING_EN_REG) ? "on" : "off");</div><div class='add'>+	seq_printf(s, "%-10u", index);</div><div class='add'>+	seq_printf(s, "%-8u",</div><div class='add'>+		   readl_relaxed(base + HNS3_RING_TX_RING_BD_NUM_REG));</div><div class='add'>+	seq_printf(s, "%-4u", readl_relaxed(base + HNS3_RING_TX_RING_TC_REG));</div><div class='add'>+	seq_printf(s, "%-6u", readl_relaxed(base + HNS3_RING_TX_RING_TAIL_REG));</div><div class='add'>+	seq_printf(s, "%-6u", readl_relaxed(base + HNS3_RING_TX_RING_HEAD_REG));</div><div class='add'>+	seq_printf(s, "%-8u",</div><div class='add'>+		   readl_relaxed(base + HNS3_RING_TX_RING_FBDNUM_REG));</div><div class='add'>+	seq_printf(s, "%-8u",</div><div class='add'>+		   readl_relaxed(base + HNS3_RING_TX_RING_OFFSET_REG));</div><div class='add'>+	seq_printf(s, "%-11u",</div><div class='add'>+		   readl_relaxed(base + HNS3_RING_TX_RING_PKTNUM_RECORD_REG));</div><div class='add'>+	seq_printf(s, "%-9s",</div><div class='add'>+		   str_on_off(readl_relaxed(base + HNS3_RING_EN_REG)));</div><div class='ctx'> </div><div class='ctx'> 	if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev))</div><div class='del'>-		sprintf(result[j++], "%s", readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-			HNS3_RING_TX_EN_REG) ? "on" : "off");</div><div class='add'>+		seq_printf(s, "%-12s",</div><div class='add'>+			   str_on_off(readl_relaxed(base +</div><div class='add'>+						    HNS3_RING_TX_EN_REG)));</div><div class='ctx'> 	else</div><div class='del'>-		sprintf(result[j++], "%s", "NA");</div><div class='add'>+		seq_printf(s, "%-12s", "NA");</div><div class='ctx'> </div><div class='del'>-	base_add_h = readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-					HNS3_RING_TX_RING_BASEADDR_H_REG);</div><div class='del'>-	base_add_l = readl_relaxed(ring-&gt;tqp-&gt;io_base +</div><div class='del'>-					HNS3_RING_TX_RING_BASEADDR_L_REG);</div><div class='del'>-	sprintf(result[j++], "0x%08x%08x", base_add_h, base_add_l);</div><div class='add'>+	base_add_h = readl_relaxed(base + HNS3_RING_TX_RING_BASEADDR_H_REG);</div><div class='add'>+	base_add_l = readl_relaxed(base + HNS3_RING_TX_RING_BASEADDR_L_REG);</div><div class='add'>+	seq_printf(s, "0x%08x%08x\n", base_add_h, base_add_l);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hns3_dbg_tx_queue_info(struct hnae3_handle *h,</div><div class='del'>-				  char *buf, int len)</div><div class='add'>+static int hns3_dbg_tx_queue_info(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	char data_str[ARRAY_SIZE(tx_queue_info_items)][HNS3_DBG_DATA_STR_LEN];</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='del'>-	char *result[ARRAY_SIZE(tx_queue_info_items)];</div><div class='add'>+	struct hnae3_handle *h = hnae3_seq_file_to_handle(s);</div><div class='ctx'> 	struct hns3_nic_priv *priv = h-&gt;priv;</div><div class='del'>-	char content[HNS3_DBG_INFO_LEN];</div><div class='ctx'> 	struct hns3_enet_ring *ring;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;ring) {</div><div class='hunk'>@@ -797,12 +568,8 @@ static int hns3_dbg_tx_queue_info(struct hnae3_handle *h,</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(tx_queue_info_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i][0];</div><div class='del'>-</div><div class='del'>-	hns3_dbg_fill_content(content, sizeof(content), tx_queue_info_items,</div><div class='del'>-			      NULL, ARRAY_SIZE(tx_queue_info_items));</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+	seq_puts(s, "QUEUE_ID  BD_NUM  TC  TAIL  HEAD  FBDNUM  OFFSET  ");</div><div class='add'>+	seq_puts(s, "PKTNUM     RING_EN  TX_RING_EN  BASE_ADDR\n");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; h-&gt;kinfo.num_tqps; i++) {</div><div class='ctx'> 		/* Each cycle needs to determine whether the instance is reset,</div><div class='hunk'>@@ -814,339 +581,213 @@ static int hns3_dbg_tx_queue_info(struct hnae3_handle *h,</div><div class='ctx'> 			return -EPERM;</div><div class='ctx'> </div><div class='ctx'> 		ring = &amp;priv-&gt;ring[i];</div><div class='del'>-		hns3_dump_tx_queue_info(ring, ae_dev, result, i);</div><div class='del'>-		hns3_dbg_fill_content(content, sizeof(content),</div><div class='del'>-				      tx_queue_info_items,</div><div class='del'>-				      (const char **)result,</div><div class='del'>-				      ARRAY_SIZE(tx_queue_info_items));</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+		hns3_dump_tx_queue_info(ring, s, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hns3_dbg_tx_spare_info(ring, buf, len, h-&gt;kinfo.num_tqps, &amp;pos);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hns3_dbg_item queue_map_items[] = {</div><div class='del'>-	{ "local_queue_id", 2 },</div><div class='del'>-	{ "global_queue_id", 2 },</div><div class='del'>-	{ "vector_id", 2 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int hns3_dbg_queue_map(struct hnae3_handle *h, char *buf, int len)</div><div class='add'>+static int hns3_dbg_queue_map(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	char data_str[ARRAY_SIZE(queue_map_items)][HNS3_DBG_DATA_STR_LEN];</div><div class='del'>-	char *result[ARRAY_SIZE(queue_map_items)];</div><div class='add'>+	struct hnae3_handle *h = hnae3_seq_file_to_handle(s);</div><div class='ctx'> 	struct hns3_nic_priv *priv = h-&gt;priv;</div><div class='del'>-	char content[HNS3_DBG_INFO_LEN];</div><div class='del'>-	int pos = 0;</div><div class='del'>-	int j;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	if (!h-&gt;ae_algo-&gt;ops-&gt;get_global_queue_id)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(queue_map_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i][0];</div><div class='add'>+	seq_puts(s, "local_queue_id  global_queue_id  vector_id\n");</div><div class='ctx'> </div><div class='del'>-	hns3_dbg_fill_content(content, sizeof(content), queue_map_items,</div><div class='del'>-			      NULL, ARRAY_SIZE(queue_map_items));</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='ctx'> 	for (i = 0; i &lt; h-&gt;kinfo.num_tqps; i++) {</div><div class='ctx'> 		if (!priv-&gt;ring || !priv-&gt;ring[i].tqp_vector)</div><div class='ctx'> 			continue;</div><div class='del'>-		j = 0;</div><div class='del'>-		sprintf(result[j++], "%u", i);</div><div class='del'>-		sprintf(result[j++], "%u",</div><div class='del'>-			h-&gt;ae_algo-&gt;ops-&gt;get_global_queue_id(h, i));</div><div class='del'>-		sprintf(result[j++], "%d",</div><div class='del'>-			priv-&gt;ring[i].tqp_vector-&gt;vector_irq);</div><div class='del'>-		hns3_dbg_fill_content(content, sizeof(content), queue_map_items,</div><div class='del'>-				      (const char **)result,</div><div class='del'>-				      ARRAY_SIZE(queue_map_items));</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+		seq_printf(s, "%-16u%-17u%d\n", i,</div><div class='add'>+			   h-&gt;ae_algo-&gt;ops-&gt;get_global_queue_id(h, i),</div><div class='add'>+			   priv-&gt;ring[i].tqp_vector-&gt;vector_irq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hns3_dbg_item rx_bd_info_items[] = {</div><div class='del'>-	{ "BD_IDX", 3 },</div><div class='del'>-	{ "L234_INFO", 2 },</div><div class='del'>-	{ "PKT_LEN", 3 },</div><div class='del'>-	{ "SIZE", 4 },</div><div class='del'>-	{ "RSS_HASH", 4 },</div><div class='del'>-	{ "FD_ID", 2 },</div><div class='del'>-	{ "VLAN_TAG", 2 },</div><div class='del'>-	{ "O_DM_VLAN_ID_FB", 2 },</div><div class='del'>-	{ "OT_VLAN_TAG", 2 },</div><div class='del'>-	{ "BD_BASE_INFO", 2 },</div><div class='del'>-	{ "PTYPE", 2 },</div><div class='del'>-	{ "HW_CSUM", 2 },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void hns3_dump_rx_bd_info(struct hns3_nic_priv *priv,</div><div class='del'>-				 struct hns3_desc *desc, char **result, int idx)</div><div class='add'>+				 struct hns3_desc *desc, struct seq_file *s,</div><div class='add'>+				 int idx)</div><div class='ctx'> {</div><div class='del'>-	unsigned int j = 0;</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%d", idx);</div><div class='del'>-	sprintf(result[j++], "%#x", le32_to_cpu(desc-&gt;rx.l234_info));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;rx.pkt_len));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;rx.size));</div><div class='del'>-	sprintf(result[j++], "%#x", le32_to_cpu(desc-&gt;rx.rss_hash));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;rx.fd_id));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;rx.vlan_tag));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;rx.o_dm_vlan_id_fb));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;rx.ot_vlan_tag));</div><div class='del'>-	sprintf(result[j++], "%#x", le32_to_cpu(desc-&gt;rx.bd_base_info));</div><div class='add'>+	seq_printf(s, "%-9d%#-11x%-10u%-8u%#-12x%-7u%-10u%-17u%-13u%#-14x",</div><div class='add'>+		   idx, le32_to_cpu(desc-&gt;rx.l234_info),</div><div class='add'>+		   le16_to_cpu(desc-&gt;rx.pkt_len), le16_to_cpu(desc-&gt;rx.size),</div><div class='add'>+		   le32_to_cpu(desc-&gt;rx.rss_hash), le16_to_cpu(desc-&gt;rx.fd_id),</div><div class='add'>+		   le16_to_cpu(desc-&gt;rx.vlan_tag),</div><div class='add'>+		   le16_to_cpu(desc-&gt;rx.o_dm_vlan_id_fb),</div><div class='add'>+		   le16_to_cpu(desc-&gt;rx.ot_vlan_tag),</div><div class='add'>+		   le32_to_cpu(desc-&gt;rx.bd_base_info));</div><div class='add'>+</div><div class='ctx'> 	if (test_bit(HNS3_NIC_STATE_RXD_ADV_LAYOUT_ENABLE, &amp;priv-&gt;state)) {</div><div class='ctx'> 		u32 ol_info = le32_to_cpu(desc-&gt;rx.ol_info);</div><div class='ctx'> </div><div class='del'>-		sprintf(result[j++], "%5lu", hnae3_get_field(ol_info,</div><div class='del'>-							     HNS3_RXD_PTYPE_M,</div><div class='del'>-							     HNS3_RXD_PTYPE_S));</div><div class='del'>-		sprintf(result[j++], "%7u", le16_to_cpu(desc-&gt;csum));</div><div class='add'>+		seq_printf(s, "%-7lu%-9u\n",</div><div class='add'>+			   hnae3_get_field(ol_info, HNS3_RXD_PTYPE_M,</div><div class='add'>+					   HNS3_RXD_PTYPE_S),</div><div class='add'>+			   le16_to_cpu(desc-&gt;csum));</div><div class='ctx'> 	} else {</div><div class='del'>-		sprintf(result[j++], "NA");</div><div class='del'>-		sprintf(result[j++], "NA");</div><div class='add'>+		seq_puts(s, "NA     NA\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hns3_dbg_rx_bd_info(struct hns3_dbg_data *d, char *buf, int len)</div><div class='add'>+static int hns3_dbg_rx_bd_info(struct seq_file *s, void *private)</div><div class='ctx'> {</div><div class='del'>-	char data_str[ARRAY_SIZE(rx_bd_info_items)][HNS3_DBG_DATA_STR_LEN];</div><div class='del'>-	struct hns3_nic_priv *priv = d-&gt;handle-&gt;priv;</div><div class='del'>-	char *result[ARRAY_SIZE(rx_bd_info_items)];</div><div class='del'>-	char content[HNS3_DBG_INFO_LEN];</div><div class='add'>+	struct hns3_dbg_data *data = s-&gt;private;</div><div class='add'>+	struct hnae3_handle *h = data-&gt;handle;</div><div class='add'>+	struct hns3_nic_priv *priv = h-&gt;priv;</div><div class='ctx'> 	struct hns3_enet_ring *ring;</div><div class='ctx'> 	struct hns3_desc *desc;</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> </div><div class='del'>-	if (d-&gt;qid &gt;= d-&gt;handle-&gt;kinfo.num_tqps) {</div><div class='del'>-		dev_err(&amp;d-&gt;handle-&gt;pdev-&gt;dev,</div><div class='del'>-			"queue%u is not in use\n", d-&gt;qid);</div><div class='add'>+	if (data-&gt;qid &gt;= h-&gt;kinfo.num_tqps) {</div><div class='add'>+		dev_err(&amp;h-&gt;pdev-&gt;dev, "queue%u is not in use\n", data-&gt;qid);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(rx_bd_info_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i][0];</div><div class='del'>-</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			  "Queue %u rx bd info:\n", d-&gt;qid);</div><div class='del'>-	hns3_dbg_fill_content(content, sizeof(content), rx_bd_info_items,</div><div class='del'>-			      NULL, ARRAY_SIZE(rx_bd_info_items));</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+	seq_printf(s, "Queue %u rx bd info:\n", data-&gt;qid);</div><div class='add'>+	seq_puts(s, "BD_IDX   L234_INFO  PKT_LEN   SIZE    ");</div><div class='add'>+	seq_puts(s, "RSS_HASH    FD_ID  VLAN_TAG  O_DM_VLAN_ID_FB  ");</div><div class='add'>+	seq_puts(s, "OT_VLAN_TAG  BD_BASE_INFO  PTYPE  HW_CSUM\n");</div><div class='ctx'> </div><div class='del'>-	ring = &amp;priv-&gt;ring[d-&gt;qid + d-&gt;handle-&gt;kinfo.num_tqps];</div><div class='add'>+	ring = &amp;priv-&gt;ring[data-&gt;qid + data-&gt;handle-&gt;kinfo.num_tqps];</div><div class='ctx'> 	for (i = 0; i &lt; ring-&gt;desc_num; i++) {</div><div class='ctx'> 		desc = &amp;ring-&gt;desc[i];</div><div class='ctx'> </div><div class='del'>-		hns3_dump_rx_bd_info(priv, desc, result, i);</div><div class='del'>-		hns3_dbg_fill_content(content, sizeof(content),</div><div class='del'>-				      rx_bd_info_items, (const char **)result,</div><div class='del'>-				      ARRAY_SIZE(rx_bd_info_items));</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+		hns3_dump_rx_bd_info(priv, desc, s, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hns3_dbg_item tx_bd_info_items[] = {</div><div class='del'>-	{ "BD_IDX", 2 },</div><div class='del'>-	{ "ADDRESS", 13 },</div><div class='del'>-	{ "VLAN_TAG", 2 },</div><div class='del'>-	{ "SIZE", 2 },</div><div class='del'>-	{ "T_CS_VLAN_TSO", 2 },</div><div class='del'>-	{ "OT_VLAN_TAG", 3 },</div><div class='del'>-	{ "TV", 5 },</div><div class='del'>-	{ "OLT_VLAN_LEN", 2 },</div><div class='del'>-	{ "PAYLEN_OL4CS", 2 },</div><div class='del'>-	{ "BD_FE_SC_VLD", 2 },</div><div class='del'>-	{ "MSS_HW_CSUM", 0 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void hns3_dump_tx_bd_info(struct hns3_desc *desc, char **result, int idx)</div><div class='add'>+static void hns3_dump_tx_bd_info(struct hns3_desc *desc, struct seq_file *s,</div><div class='add'>+				 int idx)</div><div class='ctx'> {</div><div class='del'>-	unsigned int j = 0;</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%d", idx);</div><div class='del'>-	sprintf(result[j++], "%#llx", le64_to_cpu(desc-&gt;addr));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;tx.vlan_tag));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;tx.send_size));</div><div class='del'>-	sprintf(result[j++], "%#x",</div><div class='del'>-		le32_to_cpu(desc-&gt;tx.type_cs_vlan_tso_len));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;tx.outer_vlan_tag));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;tx.tv));</div><div class='del'>-	sprintf(result[j++], "%u",</div><div class='del'>-		le32_to_cpu(desc-&gt;tx.ol_type_vlan_len_msec));</div><div class='del'>-	sprintf(result[j++], "%#x", le32_to_cpu(desc-&gt;tx.paylen_ol4cs));</div><div class='del'>-	sprintf(result[j++], "%#x", le16_to_cpu(desc-&gt;tx.bdtp_fe_sc_vld_ra_ri));</div><div class='del'>-	sprintf(result[j++], "%u", le16_to_cpu(desc-&gt;tx.mss_hw_csum));</div><div class='add'>+	seq_printf(s, "%-8d%#-20llx%-10u%-6u%#-15x%-14u%-7u%-16u%#-14x%#-14x%-11u\n",</div><div class='add'>+		   idx, le64_to_cpu(desc-&gt;addr),</div><div class='add'>+		   le16_to_cpu(desc-&gt;tx.vlan_tag),</div><div class='add'>+		   le16_to_cpu(desc-&gt;tx.send_size),</div><div class='add'>+		   le32_to_cpu(desc-&gt;tx.type_cs_vlan_tso_len),</div><div class='add'>+		   le16_to_cpu(desc-&gt;tx.outer_vlan_tag),</div><div class='add'>+		   le16_to_cpu(desc-&gt;tx.tv),</div><div class='add'>+		   le32_to_cpu(desc-&gt;tx.ol_type_vlan_len_msec),</div><div class='add'>+		   le32_to_cpu(desc-&gt;tx.paylen_ol4cs),</div><div class='add'>+		   le16_to_cpu(desc-&gt;tx.bdtp_fe_sc_vld_ra_ri),</div><div class='add'>+		   le16_to_cpu(desc-&gt;tx.mss_hw_csum));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hns3_dbg_tx_bd_info(struct hns3_dbg_data *d, char *buf, int len)</div><div class='add'>+static int hns3_dbg_tx_bd_info(struct seq_file *s, void *private)</div><div class='ctx'> {</div><div class='del'>-	char data_str[ARRAY_SIZE(tx_bd_info_items)][HNS3_DBG_DATA_STR_LEN];</div><div class='del'>-	struct hns3_nic_priv *priv = d-&gt;handle-&gt;priv;</div><div class='del'>-	char *result[ARRAY_SIZE(tx_bd_info_items)];</div><div class='del'>-	char content[HNS3_DBG_INFO_LEN];</div><div class='add'>+	struct hns3_dbg_data *data = s-&gt;private;</div><div class='add'>+	struct hnae3_handle *h = data-&gt;handle;</div><div class='add'>+	struct hns3_nic_priv *priv = h-&gt;priv;</div><div class='ctx'> 	struct hns3_enet_ring *ring;</div><div class='ctx'> 	struct hns3_desc *desc;</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> </div><div class='del'>-	if (d-&gt;qid &gt;= d-&gt;handle-&gt;kinfo.num_tqps) {</div><div class='del'>-		dev_err(&amp;d-&gt;handle-&gt;pdev-&gt;dev,</div><div class='del'>-			"queue%u is not in use\n", d-&gt;qid);</div><div class='add'>+	if (data-&gt;qid &gt;= h-&gt;kinfo.num_tqps) {</div><div class='add'>+		dev_err(&amp;h-&gt;pdev-&gt;dev, "queue%u is not in use\n", data-&gt;qid);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(tx_bd_info_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i][0];</div><div class='add'>+	seq_printf(s, "Queue %u tx bd info:\n", data-&gt;qid);</div><div class='add'>+	seq_puts(s, "BD_IDX  ADDRESS             VLAN_TAG  SIZE  ");</div><div class='add'>+	seq_puts(s, "T_CS_VLAN_TSO  OT_VLAN_TAG   TV     OLT_VLAN_LEN  ");</div><div class='add'>+	seq_puts(s, "PAYLEN_OL4CS  BD_FE_SC_VLD   MSS_HW_CSUM\n");</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			  "Queue %u tx bd info:\n", d-&gt;qid);</div><div class='del'>-	hns3_dbg_fill_content(content, sizeof(content), tx_bd_info_items,</div><div class='del'>-			      NULL, ARRAY_SIZE(tx_bd_info_items));</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='del'>-</div><div class='del'>-	ring = &amp;priv-&gt;ring[d-&gt;qid];</div><div class='add'>+	ring = &amp;priv-&gt;ring[data-&gt;qid];</div><div class='ctx'> 	for (i = 0; i &lt; ring-&gt;desc_num; i++) {</div><div class='ctx'> 		desc = &amp;ring-&gt;desc[i];</div><div class='ctx'> </div><div class='del'>-		hns3_dump_tx_bd_info(desc, result, i);</div><div class='del'>-		hns3_dbg_fill_content(content, sizeof(content),</div><div class='del'>-				      tx_bd_info_items, (const char **)result,</div><div class='del'>-				      ARRAY_SIZE(tx_bd_info_items));</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+		hns3_dump_tx_bd_info(desc, s, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-hns3_dbg_dev_caps(struct hnae3_handle *h, char *buf, int len, int *pos)</div><div class='add'>+static void hns3_dbg_dev_caps(struct hnae3_handle *h, struct seq_file *s)</div><div class='ctx'> {</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='del'>-	const char * const str[] = {"no", "yes"};</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h);</div><div class='ctx'> 	unsigned long *caps = ae_dev-&gt;caps;</div><div class='ctx'> 	u32 i, state;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "dev capability:\n");</div><div class='add'>+	seq_puts(s, "dev capability:\n");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(hns3_dbg_cap); i++) {</div><div class='ctx'> 		state = test_bit(hns3_dbg_cap[i].cap_bit, caps);</div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "%s: %s\n",</div><div class='del'>-				  hns3_dbg_cap[i].name, str[state]);</div><div class='add'>+		seq_printf(s, "%s: %s\n", hns3_dbg_cap[i].name,</div><div class='add'>+			   str_yes_no(state));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "\n");</div><div class='add'>+	seq_puts(s, "\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-hns3_dbg_dev_specs(struct hnae3_handle *h, char *buf, int len, int *pos)</div><div class='add'>+static void hns3_dbg_dev_specs(struct hnae3_handle *h, struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='ctx'> 	struct hnae3_dev_specs *dev_specs = &amp;ae_dev-&gt;dev_specs;</div><div class='ctx'> 	struct hnae3_knic_private_info *kinfo = &amp;h-&gt;kinfo;</div><div class='ctx'> 	struct net_device *dev = kinfo-&gt;netdev;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "dev_spec:\n");</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "MAC entry num: %u\n",</div><div class='del'>-			  dev_specs-&gt;mac_entry_num);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "MNG entry num: %u\n",</div><div class='del'>-			  dev_specs-&gt;mng_entry_num);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "MAX non tso bd num: %u\n",</div><div class='del'>-			  dev_specs-&gt;max_non_tso_bd_num);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "RSS ind tbl size: %u\n",</div><div class='del'>-			  dev_specs-&gt;rss_ind_tbl_size);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "RSS key size: %u\n",</div><div class='del'>-			  dev_specs-&gt;rss_key_size);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "RSS size: %u\n",</div><div class='del'>-			  kinfo-&gt;rss_size);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "Allocated RSS size: %u\n",</div><div class='del'>-			  kinfo-&gt;req_rss_size);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "Task queue pairs numbers: %u\n",</div><div class='del'>-			  kinfo-&gt;num_tqps);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "RX buffer length: %u\n",</div><div class='del'>-			  kinfo-&gt;rx_buf_len);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "Desc num per TX queue: %u\n",</div><div class='del'>-			  kinfo-&gt;num_tx_desc);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "Desc num per RX queue: %u\n",</div><div class='del'>-			  kinfo-&gt;num_rx_desc);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "Total number of enabled TCs: %u\n",</div><div class='del'>-			  kinfo-&gt;tc_info.num_tc);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "MAX INT QL: %u\n",</div><div class='del'>-			  dev_specs-&gt;int_ql_max);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "MAX INT GL: %u\n",</div><div class='del'>-			  dev_specs-&gt;max_int_gl);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "MAX TM RATE: %u\n",</div><div class='del'>-			  dev_specs-&gt;max_tm_rate);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "MAX QSET number: %u\n",</div><div class='del'>-			  dev_specs-&gt;max_qset_num);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "umv size: %u\n",</div><div class='del'>-			  dev_specs-&gt;umv_size);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "mc mac size: %u\n",</div><div class='del'>-			  dev_specs-&gt;mc_mac_size);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "MAC statistics number: %u\n",</div><div class='del'>-			  dev_specs-&gt;mac_stats_num);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "TX timeout threshold: %d seconds\n",</div><div class='del'>-			  dev-&gt;watchdog_timeo / HZ);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "Hilink Version: %u\n",</div><div class='del'>-			  dev_specs-&gt;hilink_version);</div><div class='add'>+	seq_puts(s, "dev_spec:\n");</div><div class='add'>+	seq_printf(s, "MAC entry num: %u\n", dev_specs-&gt;mac_entry_num);</div><div class='add'>+	seq_printf(s, "MNG entry num: %u\n", dev_specs-&gt;mng_entry_num);</div><div class='add'>+	seq_printf(s, "MAX non tso bd num: %u\n",</div><div class='add'>+		   dev_specs-&gt;max_non_tso_bd_num);</div><div class='add'>+	seq_printf(s, "RSS ind tbl size: %u\n", dev_specs-&gt;rss_ind_tbl_size);</div><div class='add'>+	seq_printf(s, "RSS key size: %u\n", dev_specs-&gt;rss_key_size);</div><div class='add'>+	seq_printf(s, "RSS size: %u\n", kinfo-&gt;rss_size);</div><div class='add'>+	seq_printf(s, "Allocated RSS size: %u\n", kinfo-&gt;req_rss_size);</div><div class='add'>+	seq_printf(s, "Task queue pairs numbers: %u\n", kinfo-&gt;num_tqps);</div><div class='add'>+	seq_printf(s, "RX buffer length: %u\n", kinfo-&gt;rx_buf_len);</div><div class='add'>+	seq_printf(s, "Desc num per TX queue: %u\n", kinfo-&gt;num_tx_desc);</div><div class='add'>+	seq_printf(s, "Desc num per RX queue: %u\n", kinfo-&gt;num_rx_desc);</div><div class='add'>+	seq_printf(s, "Total number of enabled TCs: %u\n",</div><div class='add'>+		   kinfo-&gt;tc_info.num_tc);</div><div class='add'>+	seq_printf(s, "MAX INT QL: %u\n", dev_specs-&gt;int_ql_max);</div><div class='add'>+	seq_printf(s, "MAX INT GL: %u\n", dev_specs-&gt;max_int_gl);</div><div class='add'>+	seq_printf(s, "MAX TM RATE: %u\n", dev_specs-&gt;max_tm_rate);</div><div class='add'>+	seq_printf(s, "MAX QSET number: %u\n", dev_specs-&gt;max_qset_num);</div><div class='add'>+	seq_printf(s, "umv size: %u\n", dev_specs-&gt;umv_size);</div><div class='add'>+	seq_printf(s, "mc mac size: %u\n", dev_specs-&gt;mc_mac_size);</div><div class='add'>+	seq_printf(s, "MAC statistics number: %u\n", dev_specs-&gt;mac_stats_num);</div><div class='add'>+	seq_printf(s, "TX timeout threshold: %d seconds\n",</div><div class='add'>+		   dev-&gt;watchdog_timeo / HZ);</div><div class='add'>+	seq_printf(s, "mac tunnel number: %u\n", dev_specs-&gt;tnl_num);</div><div class='add'>+	seq_printf(s, "Hilink Version: %u\n", dev_specs-&gt;hilink_version);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hns3_dbg_dev_info(struct hnae3_handle *h, char *buf, int len)</div><div class='add'>+static int hns3_dbg_dev_info(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	int pos = 0;</div><div class='add'>+	struct hnae3_handle *h = hnae3_seq_file_to_handle(s);</div><div class='ctx'> </div><div class='del'>-	hns3_dbg_dev_caps(h, buf, len, &amp;pos);</div><div class='del'>-</div><div class='del'>-	hns3_dbg_dev_specs(h, buf, len, &amp;pos);</div><div class='add'>+	hns3_dbg_dev_caps(h, s);</div><div class='add'>+	hns3_dbg_dev_specs(h, s);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hns3_dbg_item page_pool_info_items[] = {</div><div class='del'>-	{ "QUEUE_ID", 2 },</div><div class='del'>-	{ "ALLOCATE_CNT", 2 },</div><div class='del'>-	{ "FREE_CNT", 6 },</div><div class='del'>-	{ "POOL_SIZE(PAGE_NUM)", 2 },</div><div class='del'>-	{ "ORDER", 2 },</div><div class='del'>-	{ "NUMA_ID", 2 },</div><div class='del'>-	{ "MAX_LEN", 2 },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void hns3_dump_page_pool_info(struct hns3_enet_ring *ring,</div><div class='del'>-				     char **result, u32 index)</div><div class='add'>+				     struct seq_file *s, u32 index)</div><div class='ctx'> {</div><div class='del'>-	u32 j = 0;</div><div class='del'>-</div><div class='del'>-	sprintf(result[j++], "%u", index);</div><div class='del'>-	sprintf(result[j++], "%u",</div><div class='del'>-		READ_ONCE(ring-&gt;page_pool-&gt;pages_state_hold_cnt));</div><div class='del'>-	sprintf(result[j++], "%d",</div><div class='del'>-		atomic_read(&amp;ring-&gt;page_pool-&gt;pages_state_release_cnt));</div><div class='del'>-	sprintf(result[j++], "%u", ring-&gt;page_pool-&gt;p.pool_size);</div><div class='del'>-	sprintf(result[j++], "%u", ring-&gt;page_pool-&gt;p.order);</div><div class='del'>-	sprintf(result[j++], "%d", ring-&gt;page_pool-&gt;p.nid);</div><div class='del'>-	sprintf(result[j++], "%uK", ring-&gt;page_pool-&gt;p.max_len / 1024);</div><div class='add'>+	seq_printf(s, "%-10u%-14u%-14d%-21u%-7u%-9d%uK\n",</div><div class='add'>+		   index,</div><div class='add'>+		   READ_ONCE(ring-&gt;page_pool-&gt;pages_state_hold_cnt),</div><div class='add'>+		   atomic_read(&amp;ring-&gt;page_pool-&gt;pages_state_release_cnt),</div><div class='add'>+		   ring-&gt;page_pool-&gt;p.pool_size,</div><div class='add'>+		   ring-&gt;page_pool-&gt;p.order,</div><div class='add'>+		   ring-&gt;page_pool-&gt;p.nid,</div><div class='add'>+		   ring-&gt;page_pool-&gt;p.max_len / 1024);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-hns3_dbg_page_pool_info(struct hnae3_handle *h, char *buf, int len)</div><div class='add'>+static int hns3_dbg_page_pool_info(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	char data_str[ARRAY_SIZE(page_pool_info_items)][HNS3_DBG_DATA_STR_LEN];</div><div class='del'>-	char *result[ARRAY_SIZE(page_pool_info_items)];</div><div class='add'>+	struct hnae3_handle *h = hnae3_seq_file_to_handle(s);</div><div class='ctx'> 	struct hns3_nic_priv *priv = h-&gt;priv;</div><div class='del'>-	char content[HNS3_DBG_INFO_LEN];</div><div class='ctx'> 	struct hns3_enet_ring *ring;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;ring) {</div><div class='hunk'>@@ -1159,184 +800,50 @@ hns3_dbg_page_pool_info(struct hnae3_handle *h, char *buf, int len)</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(page_pool_info_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i][0];</div><div class='add'>+	seq_puts(s, "QUEUE_ID  ALLOCATE_CNT  FREE_CNT      ");</div><div class='add'>+	seq_puts(s, "POOL_SIZE(PAGE_NUM)  ORDER  NUMA_ID  MAX_LEN\n");</div><div class='ctx'> </div><div class='del'>-	hns3_dbg_fill_content(content, sizeof(content), page_pool_info_items,</div><div class='del'>-			      NULL, ARRAY_SIZE(page_pool_info_items));</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='ctx'> 	for (i = 0; i &lt; h-&gt;kinfo.num_tqps; i++) {</div><div class='ctx'> 		if (!test_bit(HNS3_NIC_STATE_INITED, &amp;priv-&gt;state) ||</div><div class='ctx'> 		    test_bit(HNS3_NIC_STATE_RESETTING, &amp;priv-&gt;state))</div><div class='ctx'> 			return -EPERM;</div><div class='add'>+</div><div class='ctx'> 		ring = &amp;priv-&gt;ring[(u32)(i + h-&gt;kinfo.num_tqps)];</div><div class='del'>-		hns3_dump_page_pool_info(ring, result, i);</div><div class='del'>-		hns3_dbg_fill_content(content, sizeof(content),</div><div class='del'>-				      page_pool_info_items,</div><div class='del'>-				      (const char **)result,</div><div class='del'>-				      ARRAY_SIZE(page_pool_info_items));</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+		hns3_dump_page_pool_info(ring, s, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hns3_dbg_get_cmd_index(struct hns3_dbg_data *dbg_data, u32 *index)</div><div class='add'>+static int hns3_dbg_bd_info_show(struct seq_file *s, void *private)</div><div class='ctx'> {</div><div class='del'>-	u32 i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(hns3_dbg_cmd); i++) {</div><div class='del'>-		if (hns3_dbg_cmd[i].cmd == dbg_data-&gt;cmd) {</div><div class='del'>-			*index = i;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_err(&amp;dbg_data-&gt;handle-&gt;pdev-&gt;dev, "unknown command(%d)\n",</div><div class='del'>-		dbg_data-&gt;cmd);</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct hns3_dbg_func hns3_dbg_cmd_func[] = {</div><div class='del'>-	{</div><div class='del'>-		.cmd = HNAE3_DBG_CMD_QUEUE_MAP,</div><div class='del'>-		.dbg_dump = hns3_dbg_queue_map,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.cmd = HNAE3_DBG_CMD_DEV_INFO,</div><div class='del'>-		.dbg_dump = hns3_dbg_dev_info,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.cmd = HNAE3_DBG_CMD_TX_BD,</div><div class='del'>-		.dbg_dump_bd = hns3_dbg_tx_bd_info,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.cmd = HNAE3_DBG_CMD_RX_BD,</div><div class='del'>-		.dbg_dump_bd = hns3_dbg_rx_bd_info,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.cmd = HNAE3_DBG_CMD_RX_QUEUE_INFO,</div><div class='del'>-		.dbg_dump = hns3_dbg_rx_queue_info,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.cmd = HNAE3_DBG_CMD_TX_QUEUE_INFO,</div><div class='del'>-		.dbg_dump = hns3_dbg_tx_queue_info,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.cmd = HNAE3_DBG_CMD_PAGE_POOL_INFO,</div><div class='del'>-		.dbg_dump = hns3_dbg_page_pool_info,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.cmd = HNAE3_DBG_CMD_COAL_INFO,</div><div class='del'>-		.dbg_dump = hns3_dbg_coal_info,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int hns3_dbg_read_cmd(struct hns3_dbg_data *dbg_data,</div><div class='del'>-			     enum hnae3_dbg_cmd cmd, char *buf, int len)</div><div class='del'>-{</div><div class='del'>-	const struct hnae3_ae_ops *ops = dbg_data-&gt;handle-&gt;ae_algo-&gt;ops;</div><div class='del'>-	const struct hns3_dbg_func *cmd_func;</div><div class='del'>-	u32 i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(hns3_dbg_cmd_func); i++) {</div><div class='del'>-		if (cmd == hns3_dbg_cmd_func[i].cmd) {</div><div class='del'>-			cmd_func = &amp;hns3_dbg_cmd_func[i];</div><div class='del'>-			if (cmd_func-&gt;dbg_dump)</div><div class='del'>-				return cmd_func-&gt;dbg_dump(dbg_data-&gt;handle, buf,</div><div class='del'>-							  len);</div><div class='del'>-			else</div><div class='del'>-				return cmd_func-&gt;dbg_dump_bd(dbg_data, buf,</div><div class='del'>-							     len);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ops-&gt;dbg_read_cmd)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	return ops-&gt;dbg_read_cmd(dbg_data-&gt;handle, cmd, buf, len);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t hns3_dbg_read(struct file *filp, char __user *buffer,</div><div class='del'>-			     size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct hns3_dbg_data *dbg_data = filp-&gt;private_data;</div><div class='del'>-	struct hnae3_handle *handle = dbg_data-&gt;handle;</div><div class='del'>-	struct hns3_nic_priv *priv = handle-&gt;priv;</div><div class='del'>-	ssize_t size = 0;</div><div class='del'>-	char **save_buf;</div><div class='del'>-	char *read_buf;</div><div class='del'>-	u32 index;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = hns3_dbg_get_cmd_index(dbg_data, &amp;index);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;handle-&gt;dbgfs_lock);</div><div class='del'>-	save_buf = &amp;handle-&gt;dbgfs_buf[index];</div><div class='add'>+	struct hns3_dbg_data *data = s-&gt;private;</div><div class='add'>+	struct hnae3_handle *h = data-&gt;handle;</div><div class='add'>+	struct hns3_nic_priv *priv = h-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(HNS3_NIC_STATE_INITED, &amp;priv-&gt;state) ||</div><div class='del'>-	    test_bit(HNS3_NIC_STATE_RESETTING, &amp;priv-&gt;state)) {</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (*save_buf) {</div><div class='del'>-		read_buf = *save_buf;</div><div class='del'>-	} else {</div><div class='del'>-		read_buf = kvzalloc(hns3_dbg_cmd[index].buf_len, GFP_KERNEL);</div><div class='del'>-		if (!read_buf) {</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* save the buffer addr until the last read operation */</div><div class='del'>-		*save_buf = read_buf;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* get data ready for the first time to read */</div><div class='del'>-	if (!*ppos) {</div><div class='del'>-		ret = hns3_dbg_read_cmd(dbg_data, hns3_dbg_cmd[index].cmd,</div><div class='del'>-					read_buf, hns3_dbg_cmd[index].buf_len);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	size = simple_read_from_buffer(buffer, count, ppos, read_buf,</div><div class='del'>-				       strlen(read_buf));</div><div class='del'>-	if (size &gt; 0) {</div><div class='del'>-		mutex_unlock(&amp;handle-&gt;dbgfs_lock);</div><div class='del'>-		return size;</div><div class='del'>-	}</div><div class='add'>+	    test_bit(HNS3_NIC_STATE_RESETTING, &amp;priv-&gt;state))</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	/* free the buffer for the last read operation */</div><div class='del'>-	if (*save_buf) {</div><div class='del'>-		kvfree(*save_buf);</div><div class='del'>-		*save_buf = NULL;</div><div class='del'>-	}</div><div class='add'>+	if (data-&gt;cmd == HNAE3_DBG_CMD_TX_BD)</div><div class='add'>+		return hns3_dbg_tx_bd_info(s, private);</div><div class='add'>+	else if (data-&gt;cmd == HNAE3_DBG_CMD_RX_BD)</div><div class='add'>+		return hns3_dbg_rx_bd_info(s, private);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;handle-&gt;dbgfs_lock);</div><div class='del'>-	return ret;</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static const struct file_operations hns3_dbg_fops = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.open  = simple_open,</div><div class='del'>-	.read  = hns3_dbg_read,</div><div class='del'>-};</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(hns3_dbg_bd_info);</div><div class='ctx'> </div><div class='ctx'> static int hns3_dbg_bd_file_init(struct hnae3_handle *handle, u32 cmd)</div><div class='ctx'> {</div><div class='del'>-	struct dentry *entry_dir;</div><div class='ctx'> 	struct hns3_dbg_data *data;</div><div class='add'>+	struct dentry *entry_dir;</div><div class='ctx'> 	u16 max_queue_num;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	entry_dir = hns3_dbg_dentry[hns3_dbg_cmd[cmd].dentry].dentry;</div><div class='ctx'> 	max_queue_num = hns3_get_max_available_channels(handle);</div><div class='del'>-	data = devm_kzalloc(&amp;handle-&gt;pdev-&gt;dev, max_queue_num * sizeof(*data),</div><div class='add'>+	data = devm_kcalloc(&amp;handle-&gt;pdev-&gt;dev, max_queue_num, sizeof(*data),</div><div class='ctx'> 			    GFP_KERNEL);</div><div class='ctx'> 	if (!data)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -1349,45 +856,77 @@ static int hns3_dbg_bd_file_init(struct hnae3_handle *handle, u32 cmd)</div><div class='ctx'> 		data[i].qid = i;</div><div class='ctx'> 		sprintf(name, "%s%u", hns3_dbg_cmd[cmd].name, i);</div><div class='ctx'> 		debugfs_create_file(name, 0400, entry_dir, &amp;data[i],</div><div class='del'>-				    &amp;hns3_dbg_fops);</div><div class='add'>+				    &amp;hns3_dbg_bd_info_fops);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-hns3_dbg_common_file_init(struct hnae3_handle *handle, u32 cmd)</div><div class='add'>+static int hns3_dbg_common_init_t1(struct hnae3_handle *handle, u32 cmd)</div><div class='ctx'> {</div><div class='del'>-	struct hns3_dbg_data *data;</div><div class='add'>+	struct device *dev = &amp;handle-&gt;pdev-&gt;dev;</div><div class='ctx'> 	struct dentry *entry_dir;</div><div class='add'>+	read_func func = NULL;</div><div class='add'>+</div><div class='add'>+	switch (hns3_dbg_cmd[cmd].cmd) {</div><div class='add'>+	case HNAE3_DBG_CMD_TX_QUEUE_INFO:</div><div class='add'>+		func = hns3_dbg_tx_queue_info;</div><div class='add'>+		break;</div><div class='add'>+	case HNAE3_DBG_CMD_RX_QUEUE_INFO:</div><div class='add'>+		func = hns3_dbg_rx_queue_info;</div><div class='add'>+		break;</div><div class='add'>+	case HNAE3_DBG_CMD_QUEUE_MAP:</div><div class='add'>+		func = hns3_dbg_queue_map;</div><div class='add'>+		break;</div><div class='add'>+	case HNAE3_DBG_CMD_PAGE_POOL_INFO:</div><div class='add'>+		func = hns3_dbg_page_pool_info;</div><div class='add'>+		break;</div><div class='add'>+	case HNAE3_DBG_CMD_COAL_INFO:</div><div class='add'>+		func = hns3_dbg_coal_info;</div><div class='add'>+		break;</div><div class='add'>+	case HNAE3_DBG_CMD_DEV_INFO:</div><div class='add'>+		func = hns3_dbg_dev_info;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	data = devm_kzalloc(&amp;handle-&gt;pdev-&gt;dev, sizeof(*data), GFP_KERNEL);</div><div class='del'>-	if (!data)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	entry_dir = hns3_dbg_dentry[hns3_dbg_cmd[cmd].dentry].dentry;</div><div class='add'>+	debugfs_create_devm_seqfile(dev, hns3_dbg_cmd[cmd].name, entry_dir,</div><div class='add'>+				    func);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hns3_dbg_common_init_t2(struct hnae3_handle *handle, u32 cmd)</div><div class='add'>+{</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(handle);</div><div class='add'>+	struct device *dev = &amp;handle-&gt;pdev-&gt;dev;</div><div class='add'>+	struct dentry *entry_dir;</div><div class='add'>+	read_func func;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ops-&gt;dbg_get_read_func)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = ops-&gt;dbg_get_read_func(handle, hns3_dbg_cmd[cmd].cmd, &amp;func);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	data-&gt;handle = handle;</div><div class='del'>-	data-&gt;cmd = hns3_dbg_cmd[cmd].cmd;</div><div class='ctx'> 	entry_dir = hns3_dbg_dentry[hns3_dbg_cmd[cmd].dentry].dentry;</div><div class='del'>-	debugfs_create_file(hns3_dbg_cmd[cmd].name, 0400, entry_dir,</div><div class='del'>-			    data, &amp;hns3_dbg_fops);</div><div class='add'>+	debugfs_create_devm_seqfile(dev, hns3_dbg_cmd[cmd].name, entry_dir,</div><div class='add'>+				    func);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int hns3_dbg_init(struct hnae3_handle *handle)</div><div class='ctx'> {</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='ctx'> 	const char *name = pci_name(handle-&gt;pdev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	handle-&gt;dbgfs_buf = devm_kcalloc(&amp;handle-&gt;pdev-&gt;dev,</div><div class='del'>-					 ARRAY_SIZE(hns3_dbg_cmd),</div><div class='del'>-					 sizeof(*handle-&gt;dbgfs_buf),</div><div class='del'>-					 GFP_KERNEL);</div><div class='del'>-	if (!handle-&gt;dbgfs_buf)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry =</div><div class='ctx'> 				debugfs_create_dir(name, hns3_dbgfs_root);</div><div class='ctx'> 	handle-&gt;hnae3_dbgfs = hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry;</div><div class='hunk'>@@ -1397,8 +936,6 @@ int hns3_dbg_init(struct hnae3_handle *handle)</div><div class='ctx'> 			debugfs_create_dir(hns3_dbg_dentry[i].name,</div><div class='ctx'> 					   handle-&gt;hnae3_dbgfs);</div><div class='ctx'> </div><div class='del'>-	mutex_init(&amp;handle-&gt;dbgfs_lock);</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(hns3_dbg_cmd); i++) {</div><div class='ctx'> 		if ((hns3_dbg_cmd[i].cmd == HNAE3_DBG_CMD_TM_NODES &amp;&amp;</div><div class='ctx'> 		     ae_dev-&gt;dev_version &lt;= HNAE3_DEVICE_VERSION_V2) ||</div><div class='hunk'>@@ -1427,24 +964,13 @@ int hns3_dbg_init(struct hnae3_handle *handle)</div><div class='ctx'> out:</div><div class='ctx'> 	debugfs_remove_recursive(handle-&gt;hnae3_dbgfs);</div><div class='ctx'> 	handle-&gt;hnae3_dbgfs = NULL;</div><div class='del'>-	mutex_destroy(&amp;handle-&gt;dbgfs_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void hns3_dbg_uninit(struct hnae3_handle *handle)</div><div class='ctx'> {</div><div class='del'>-	u32 i;</div><div class='del'>-</div><div class='ctx'> 	debugfs_remove_recursive(handle-&gt;hnae3_dbgfs);</div><div class='ctx'> 	handle-&gt;hnae3_dbgfs = NULL;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(hns3_dbg_cmd); i++)</div><div class='del'>-		if (handle-&gt;dbgfs_buf[i]) {</div><div class='del'>-			kvfree(handle-&gt;dbgfs_buf[i]);</div><div class='del'>-			handle-&gt;dbgfs_buf[i] = NULL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	mutex_destroy(&amp;handle-&gt;dbgfs_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void hns3_dbg_register_debugfs(const char *debugfs_dir_name)</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h<br/>index 4a5ef8a90a10..57c9d3fc1b27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h</a></div><div class='hunk'>@@ -6,15 +6,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "hnae3.h"</div><div class='ctx'> </div><div class='del'>-#define HNS3_DBG_READ_LEN	65536</div><div class='del'>-#define HNS3_DBG_READ_LEN_128KB	0x20000</div><div class='del'>-#define HNS3_DBG_READ_LEN_1MB	0x100000</div><div class='del'>-#define HNS3_DBG_READ_LEN_4MB	0x400000</div><div class='del'>-#define HNS3_DBG_READ_LEN_5MB	0x500000</div><div class='del'>-#define HNS3_DBG_WRITE_LEN	1024</div><div class='del'>-</div><div class='del'>-#define HNS3_DBG_DATA_STR_LEN	32</div><div class='del'>-#define HNS3_DBG_INFO_LEN	256</div><div class='ctx'> #define HNS3_DBG_ITEM_NAME_LEN	32</div><div class='ctx'> #define HNS3_DBG_FILE_NAME_LEN	16</div><div class='ctx'> </div><div class='hunk'>@@ -49,16 +40,9 @@ struct hns3_dbg_cmd_info {</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	enum hnae3_dbg_cmd cmd;</div><div class='ctx'> 	enum hns3_dbg_dentry_type dentry;</div><div class='del'>-	u32 buf_len;</div><div class='ctx'> 	int (*init)(struct hnae3_handle *handle, unsigned int cmd);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct hns3_dbg_func {</div><div class='del'>-	enum hnae3_dbg_cmd cmd;</div><div class='del'>-	int (*dbg_dump)(struct hnae3_handle *handle, char *buf, int len);</div><div class='del'>-	int (*dbg_dump_bd)(struct hns3_dbg_data *data, char *buf, int len);</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct hns3_dbg_cap_info {</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	enum HNAE3_DEV_CAP_BITS cap_bit;</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c<br/>index fbfd3ee5648f..7a0654e2d3dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_enet.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3_enet.c</a></div><div class='hunk'>@@ -381,24 +381,6 @@ static const struct hns3_rx_ptype hns3_rx_ptype_tbl[] = {</div><div class='ctx'> #define HNS3_INVALID_PTYPE \</div><div class='ctx'> 		ARRAY_SIZE(hns3_rx_ptype_tbl)</div><div class='ctx'> </div><div class='del'>-static void hns3_dma_map_sync(struct device *dev, unsigned long iova)</div><div class='del'>-{</div><div class='del'>-	struct iommu_domain *domain = iommu_get_domain_for_dev(dev);</div><div class='del'>-	struct iommu_iotlb_gather iotlb_gather;</div><div class='del'>-	size_t granule;</div><div class='del'>-</div><div class='del'>-	if (!domain || !iommu_is_dma_domain(domain))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	granule = 1 &lt;&lt; __ffs(domain-&gt;pgsize_bitmap);</div><div class='del'>-	iova = ALIGN_DOWN(iova, granule);</div><div class='del'>-	iotlb_gather.start = iova;</div><div class='del'>-	iotlb_gather.end = iova + granule - 1;</div><div class='del'>-	iotlb_gather.pgsize = granule;</div><div class='del'>-</div><div class='del'>-	iommu_iotlb_sync(domain, &amp;iotlb_gather);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static irqreturn_t hns3_irq_handle(int irq, void *vector)</div><div class='ctx'> {</div><div class='ctx'> 	struct hns3_enet_tqp_vector *tqp_vector = vector;</div><div class='hunk'>@@ -492,20 +474,14 @@ static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,</div><div class='ctx'> 	writel(mask_en, tqp_vector-&gt;mask_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)</div><div class='add'>+static void hns3_irq_enable(struct hns3_enet_tqp_vector *tqp_vector)</div><div class='ctx'> {</div><div class='ctx'> 	napi_enable(&amp;tqp_vector-&gt;napi);</div><div class='ctx'> 	enable_irq(tqp_vector-&gt;vector_irq);</div><div class='del'>-</div><div class='del'>-	/* enable vector */</div><div class='del'>-	hns3_mask_vector_irq(tqp_vector, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)</div><div class='add'>+static void hns3_irq_disable(struct hns3_enet_tqp_vector *tqp_vector)</div><div class='ctx'> {</div><div class='del'>-	/* disable vector */</div><div class='del'>-	hns3_mask_vector_irq(tqp_vector, 0);</div><div class='del'>-</div><div class='ctx'> 	disable_irq(tqp_vector-&gt;vector_irq);</div><div class='ctx'> 	napi_disable(&amp;tqp_vector-&gt;napi);</div><div class='ctx'> 	cancel_work_sync(&amp;tqp_vector-&gt;rx_group.dim.work);</div><div class='hunk'>@@ -572,9 +548,9 @@ void hns3_set_vector_coalesce_rx_ql(struct hns3_enet_tqp_vector *tqp_vector,</div><div class='ctx'> static void hns3_vector_coalesce_init(struct hns3_enet_tqp_vector *tqp_vector,</div><div class='ctx'> 				      struct hns3_nic_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(priv-&gt;ae_handle-&gt;pdev);</div><div class='ctx'> 	struct hns3_enet_coalesce *tx_coal = &amp;tqp_vector-&gt;tx_group.coal;</div><div class='ctx'> 	struct hns3_enet_coalesce *rx_coal = &amp;tqp_vector-&gt;rx_group.coal;</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(priv-&gt;ae_handle);</div><div class='ctx'> 	struct hns3_enet_coalesce *ptx_coal = &amp;priv-&gt;tx_coal;</div><div class='ctx'> 	struct hns3_enet_coalesce *prx_coal = &amp;priv-&gt;rx_coal;</div><div class='ctx'> </div><div class='hunk'>@@ -726,11 +702,42 @@ static int hns3_set_rx_cpu_rmap(struct net_device *netdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hns3_enable_irqs_and_tqps(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hns3_nic_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct hnae3_handle *h = priv-&gt;ae_handle;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;vector_num; i++)</div><div class='add'>+		hns3_irq_enable(&amp;priv-&gt;tqp_vector[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;vector_num; i++)</div><div class='add'>+		hns3_mask_vector_irq(&amp;priv-&gt;tqp_vector[i], 1);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; h-&gt;kinfo.num_tqps; i++)</div><div class='add'>+		hns3_tqp_enable(h-&gt;kinfo.tqp[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hns3_disable_irqs_and_tqps(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hns3_nic_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct hnae3_handle *h = priv-&gt;ae_handle;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; h-&gt;kinfo.num_tqps; i++)</div><div class='add'>+		hns3_tqp_disable(h-&gt;kinfo.tqp[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;vector_num; i++)</div><div class='add'>+		hns3_mask_vector_irq(&amp;priv-&gt;tqp_vector[i], 0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;vector_num; i++)</div><div class='add'>+		hns3_irq_disable(&amp;priv-&gt;tqp_vector[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hns3_nic_net_up(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct hns3_nic_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	struct hnae3_handle *h = priv-&gt;ae_handle;</div><div class='del'>-	int i, j;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = hns3_nic_reset_all_ring(h);</div><div class='hunk'>@@ -739,23 +746,13 @@ static int hns3_nic_net_up(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(HNS3_NIC_STATE_DOWN, &amp;priv-&gt;state);</div><div class='ctx'> </div><div class='del'>-	/* enable the vectors */</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;vector_num; i++)</div><div class='del'>-		hns3_vector_enable(&amp;priv-&gt;tqp_vector[i]);</div><div class='del'>-</div><div class='del'>-	/* enable rcb */</div><div class='del'>-	for (j = 0; j &lt; h-&gt;kinfo.num_tqps; j++)</div><div class='del'>-		hns3_tqp_enable(h-&gt;kinfo.tqp[j]);</div><div class='add'>+	hns3_enable_irqs_and_tqps(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* start the ae_dev */</div><div class='ctx'> 	ret = h-&gt;ae_algo-&gt;ops-&gt;start ? h-&gt;ae_algo-&gt;ops-&gt;start(h) : 0;</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		set_bit(HNS3_NIC_STATE_DOWN, &amp;priv-&gt;state);</div><div class='del'>-		while (j--)</div><div class='del'>-			hns3_tqp_disable(h-&gt;kinfo.tqp[j]);</div><div class='del'>-</div><div class='del'>-		for (j = i - 1; j &gt;= 0; j--)</div><div class='del'>-			hns3_vector_disable(&amp;priv-&gt;tqp_vector[j]);</div><div class='add'>+		hns3_disable_irqs_and_tqps(netdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -842,17 +839,9 @@ static void hns3_reset_tx_queue(struct hnae3_handle *h)</div><div class='ctx'> static void hns3_nic_net_down(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct hns3_nic_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='ctx'> 	const struct hnae3_ae_ops *ops;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* disable vectors */</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;vector_num; i++)</div><div class='del'>-		hns3_vector_disable(&amp;priv-&gt;tqp_vector[i]);</div><div class='ctx'> </div><div class='del'>-	/* disable rcb */</div><div class='del'>-	for (i = 0; i &lt; h-&gt;kinfo.num_tqps; i++)</div><div class='del'>-		hns3_tqp_disable(h-&gt;kinfo.tqp[i]);</div><div class='add'>+	hns3_disable_irqs_and_tqps(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* stop ae_dev */</div><div class='ctx'> 	ops = priv-&gt;ae_handle-&gt;ae_algo-&gt;ops;</div><div class='hunk'>@@ -972,7 +961,7 @@ static void hns3_nic_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> void hns3_request_update_promisc_mode(struct hnae3_handle *handle)</div><div class='ctx'> {</div><div class='del'>-	const struct hnae3_ae_ops *ops = handle-&gt;ae_algo-&gt;ops;</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(handle);</div><div class='ctx'> </div><div class='ctx'> 	if (ops-&gt;request_update_promisc_mode)</div><div class='ctx'> 		ops-&gt;request_update_promisc_mode(handle);</div><div class='hunk'>@@ -1319,7 +1308,7 @@ static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,</div><div class='ctx'> static bool hns3_tunnel_csum_bug(struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct hns3_nic_priv *priv = netdev_priv(skb-&gt;dev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(priv-&gt;ae_handle-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(priv-&gt;ae_handle);</div><div class='ctx'> 	union l4_hdr_info l4;</div><div class='ctx'> </div><div class='ctx'> 	/* device version above V3(include V3), the hardware can</div><div class='hunk'>@@ -1519,7 +1508,7 @@ static int hns3_handle_vtags(struct hns3_enet_ring *tx_ring,</div><div class='ctx'> 	 * VLAN enabled, only one VLAN header is allowed in skb, otherwise it</div><div class='ctx'> 	 * will cause RAS error.</div><div class='ctx'> 	 */</div><div class='del'>-	ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='add'>+	ae_dev = hns3_get_ae_dev(handle);</div><div class='ctx'> 	if (unlikely(skb_vlan_tagged_multi(skb) &amp;&amp;</div><div class='ctx'> 		     ae_dev-&gt;dev_version &lt;= HNAE3_DEVICE_VERSION_V2 &amp;&amp;</div><div class='ctx'> 		     handle-&gt;port_base_vlan_state ==</div><div class='hunk'>@@ -1705,8 +1694,8 @@ static int hns3_fill_desc(struct hns3_enet_ring *ring, dma_addr_t dma,</div><div class='ctx'> #define HNS3_LIKELY_BD_NUM	1</div><div class='ctx'> </div><div class='ctx'> 	struct hns3_desc *desc = &amp;ring-&gt;desc[ring-&gt;next_to_use];</div><div class='del'>-	unsigned int frag_buf_num;</div><div class='del'>-	int k, sizeoflast;</div><div class='add'>+	unsigned int frag_buf_num, k;</div><div class='add'>+	int sizeoflast;</div><div class='ctx'> </div><div class='ctx'> 	if (likely(size &lt;= HNS3_MAX_BD_SIZE)) {</div><div class='ctx'> 		desc-&gt;addr = cpu_to_le64(dma);</div><div class='hunk'>@@ -1746,9 +1735,7 @@ static int hns3_map_and_fill_desc(struct hns3_enet_ring *ring, void *priv,</div><div class='ctx'> 				  unsigned int type)</div><div class='ctx'> {</div><div class='ctx'> 	struct hns3_desc_cb *desc_cb = &amp;ring-&gt;desc_cb[ring-&gt;next_to_use];</div><div class='del'>-	struct hnae3_handle *handle = ring-&gt;tqp-&gt;handle;</div><div class='ctx'> 	struct device *dev = ring_to_dev(ring);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev;</div><div class='ctx'> 	unsigned int size;</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> </div><div class='hunk'>@@ -1780,13 +1767,6 @@ static int hns3_map_and_fill_desc(struct hns3_enet_ring *ring, void *priv,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Add a SYNC command to sync io-pgtale to avoid errors in pgtable</div><div class='del'>-	 * prefetch</div><div class='del'>-	 */</div><div class='del'>-	ae_dev = hns3_get_ae_dev(handle);</div><div class='del'>-	if (ae_dev-&gt;dev_version &gt;= HNAE3_DEVICE_VERSION_V3)</div><div class='del'>-		hns3_dma_map_sync(dev, dma);</div><div class='del'>-</div><div class='ctx'> 	desc_cb-&gt;priv = priv;</div><div class='ctx'> 	desc_cb-&gt;length = size;</div><div class='ctx'> 	desc_cb-&gt;dma = dma;</div><div class='hunk'>@@ -1887,7 +1867,7 @@ static bool hns3_skb_need_linearized(struct sk_buff *skb, unsigned int *bd_size,</div><div class='ctx'> 				     unsigned int bd_num, u8 max_non_tso_bd_num)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int tot_len = 0;</div><div class='del'>-	int i;</div><div class='add'>+	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; max_non_tso_bd_num - 1U; i++)</div><div class='ctx'> 		tot_len += bd_size[i];</div><div class='hunk'>@@ -1915,7 +1895,7 @@ static bool hns3_skb_need_linearized(struct sk_buff *skb, unsigned int *bd_size,</div><div class='ctx'> </div><div class='ctx'> void hns3_shinfo_pack(struct skb_shared_info *shinfo, __u32 *size)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MAX_SKB_FRAGS; i++)</div><div class='ctx'> 		size[i] = skb_frag_size(&amp;shinfo-&gt;frags[i]);</div><div class='hunk'>@@ -2130,7 +2110,7 @@ static void hns3_tx_doorbell(struct hns3_enet_ring *ring, int num,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (test_bit(HNS3_NIC_STATE_TX_PUSH_ENABLE, &amp;priv-&gt;state) &amp;&amp; num &amp;&amp;</div><div class='ctx'> 	    !ring-&gt;pending_buf &amp;&amp; num &lt;= HNS3_MAX_PUSH_BD_NUM &amp;&amp; doorbell) {</div><div class='del'>-		/* This smp_store_release() pairs with smp_load_aquire() in</div><div class='add'>+		/* This smp_store_release() pairs with smp_load_acquire() in</div><div class='ctx'> 		 * hns3_nic_reclaim_desc(). Ensure that the BD valid bit</div><div class='ctx'> 		 * is updated.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -2146,7 +2126,7 @@ static void hns3_tx_doorbell(struct hns3_enet_ring *ring, int num,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* This smp_store_release() pairs with smp_load_aquire() in</div><div class='add'>+	/* This smp_store_release() pairs with smp_load_acquire() in</div><div class='ctx'> 	 * hns3_nic_reclaim_desc(). Ensure that the BD valid bit is updated.</div><div class='ctx'> 	 */</div><div class='ctx'> 	smp_store_release(&amp;ring-&gt;last_to_use, ring-&gt;next_to_use);</div><div class='hunk'>@@ -2231,9 +2211,9 @@ static int hns3_handle_tx_sgl(struct hns3_enet_ring *ring,</div><div class='ctx'> 	struct hns3_desc_cb *desc_cb = &amp;ring-&gt;desc_cb[ring-&gt;next_to_use];</div><div class='ctx'> 	u32 nfrag = skb_shinfo(skb)-&gt;nr_frags + 1;</div><div class='ctx'> 	struct sg_table *sgt;</div><div class='del'>-	int i, bd_num = 0;</div><div class='add'>+	int bd_num = 0;</div><div class='ctx'> 	dma_addr_t dma;</div><div class='del'>-	u32 cb_len;</div><div class='add'>+	u32 cb_len, i;</div><div class='ctx'> 	int nents;</div><div class='ctx'> </div><div class='ctx'> 	if (skb_has_frag_list(skb))</div><div class='hunk'>@@ -2439,6 +2419,35 @@ static int hns3_nic_do_ioctl(struct net_device *netdev,</div><div class='ctx'> 	return h-&gt;ae_algo-&gt;ops-&gt;do_ioctl(h, ifr, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hns3_nic_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+				 struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!h-&gt;ae_algo-&gt;ops-&gt;hwtstamp_get)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return h-&gt;ae_algo-&gt;ops-&gt;hwtstamp_get(h, config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hns3_nic_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+				 struct kernel_hwtstamp_config *config,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!h-&gt;ae_algo-&gt;ops-&gt;hwtstamp_set)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return h-&gt;ae_algo-&gt;ops-&gt;hwtstamp_set(h, config, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hns3_nic_set_features(struct net_device *netdev,</div><div class='ctx'> 				 netdev_features_t features)</div><div class='ctx'> {</div><div class='hunk'>@@ -2471,7 +2480,7 @@ static int hns3_nic_set_features(struct net_device *netdev,</div><div class='ctx'> 	if ((netdev-&gt;features &amp; NETIF_F_HW_TC) &gt; (features &amp; NETIF_F_HW_TC) &amp;&amp;</div><div class='ctx'> 	    h-&gt;ae_algo-&gt;ops-&gt;cls_flower_active(h)) {</div><div class='ctx'> 		netdev_err(netdev,</div><div class='del'>-			   "there are offloaded TC filters active, cannot disable HW TC offload");</div><div class='add'>+			   "there are offloaded TC filters active, cannot disable HW TC offload\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2568,7 +2577,7 @@ static void hns3_nic_get_stats64(struct net_device *netdev,</div><div class='ctx'> 	struct hnae3_handle *handle = priv-&gt;ae_handle;</div><div class='ctx'> 	struct rtnl_link_stats64 ring_total_stats;</div><div class='ctx'> 	struct hns3_enet_ring *ring;</div><div class='del'>-	unsigned int idx;</div><div class='add'>+	int idx;</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(HNS3_NIC_STATE_DOWN, &amp;priv-&gt;state))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2794,7 +2803,7 @@ static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> </div><div class='ctx'> static int hns3_get_timeout_queue(struct net_device *ndev)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Find the stopped queue the same way the stack does */</div><div class='ctx'> 	for (i = 0; i &lt; ndev-&gt;num_tx_queues; i++) {</div><div class='hunk'>@@ -2875,7 +2884,7 @@ static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)</div><div class='ctx'> 	struct hns3_nic_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(ndev);</div><div class='ctx'> 	struct hns3_enet_ring *tx_ring;</div><div class='del'>-	int timeout_queue;</div><div class='add'>+	u32 timeout_queue;</div><div class='ctx'> </div><div class='ctx'> 	timeout_queue = hns3_get_timeout_queue(ndev);</div><div class='ctx'> 	if (timeout_queue &gt;= ndev-&gt;num_tx_queues) {</div><div class='hunk'>@@ -3068,6 +3077,8 @@ static const struct net_device_ops hns3_nic_netdev_ops = {</div><div class='ctx'> 	.ndo_set_vf_rate	= hns3_nic_set_vf_rate,</div><div class='ctx'> 	.ndo_set_vf_mac		= hns3_nic_set_vf_mac,</div><div class='ctx'> 	.ndo_select_queue	= hns3_nic_select_queue,</div><div class='add'>+	.ndo_hwtstamp_get	= hns3_nic_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= hns3_nic_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> bool hns3_is_phys_func(struct pci_dev *pdev)</div><div class='hunk'>@@ -3845,7 +3856,7 @@ static int hns3_gro_complete(struct sk_buff *skb, u32 l234info)</div><div class='ctx'> {</div><div class='ctx'> 	__be16 type = skb-&gt;protocol;</div><div class='ctx'> 	struct tcphdr *th;</div><div class='del'>-	int depth = 0;</div><div class='add'>+	u32 depth = 0;</div><div class='ctx'> </div><div class='ctx'> 	while (eth_type_vlan(type)) {</div><div class='ctx'> 		struct vlan_hdr *vh;</div><div class='hunk'>@@ -4771,7 +4782,7 @@ map_ring_fail:</div><div class='ctx'> </div><div class='ctx'> static void hns3_nic_init_coal_cfg(struct hns3_nic_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(priv-&gt;ae_handle-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(priv-&gt;ae_handle);</div><div class='ctx'> 	struct hns3_enet_coalesce *tx_coal = &amp;priv-&gt;tx_coal;</div><div class='ctx'> 	struct hns3_enet_coalesce *rx_coal = &amp;priv-&gt;rx_coal;</div><div class='ctx'> </div><div class='hunk'>@@ -5275,7 +5286,7 @@ static void hns3_info_show(struct hns3_nic_priv *priv)</div><div class='ctx'> static void hns3_set_cq_period_mode(struct hns3_nic_priv *priv,</div><div class='ctx'> 				    enum dim_cq_period_mode mode, bool is_tx)</div><div class='ctx'> {</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(priv-&gt;ae_handle-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(priv-&gt;ae_handle);</div><div class='ctx'> 	struct hnae3_handle *handle = priv-&gt;ae_handle;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -5313,7 +5324,7 @@ void hns3_cq_period_mode_init(struct hns3_nic_priv *priv,</div><div class='ctx'> </div><div class='ctx'> static void hns3_state_init(struct hnae3_handle *handle)</div><div class='ctx'> {</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='ctx'> 	struct net_device *netdev = handle-&gt;kinfo.netdev;</div><div class='ctx'> 	struct hns3_nic_priv *priv = netdev_priv(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -5348,6 +5359,8 @@ static int hns3_client_init(struct hnae3_handle *handle)</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	ae_dev-&gt;handle = handle;</div><div class='add'>+</div><div class='ctx'> 	handle-&gt;ae_algo-&gt;ops-&gt;get_tqps_and_rss_info(handle, &amp;alloc_tqps,</div><div class='ctx'> 						    &amp;max_rss_size);</div><div class='ctx'> 	netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);</div><div class='hunk'>@@ -5922,8 +5935,6 @@ int hns3_set_channels(struct net_device *netdev,</div><div class='ctx'> void hns3_external_lb_prepare(struct net_device *ndev, bool if_running)</div><div class='ctx'> {</div><div class='ctx'> 	struct hns3_nic_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct hnae3_handle *h = priv-&gt;ae_handle;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!if_running)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -5934,11 +5945,7 @@ void hns3_external_lb_prepare(struct net_device *ndev, bool if_running)</div><div class='ctx'> 	netif_carrier_off(ndev);</div><div class='ctx'> 	netif_tx_disable(ndev);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;vector_num; i++)</div><div class='del'>-		hns3_vector_disable(&amp;priv-&gt;tqp_vector[i]);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; h-&gt;kinfo.num_tqps; i++)</div><div class='del'>-		hns3_tqp_disable(h-&gt;kinfo.tqp[i]);</div><div class='add'>+	hns3_disable_irqs_and_tqps(ndev);</div><div class='ctx'> </div><div class='ctx'> 	/* delay ring buffer clearing to hns3_reset_notify_uninit_enet</div><div class='ctx'> 	 * during reset process, because driver may not be able</div><div class='hunk'>@@ -5954,7 +5961,6 @@ void hns3_external_lb_restore(struct net_device *ndev, bool if_running)</div><div class='ctx'> {</div><div class='ctx'> 	struct hns3_nic_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct hnae3_handle *h = priv-&gt;ae_handle;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!if_running)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -5970,11 +5976,7 @@ void hns3_external_lb_restore(struct net_device *ndev, bool if_running)</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(HNS3_NIC_STATE_DOWN, &amp;priv-&gt;state);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; priv-&gt;vector_num; i++)</div><div class='del'>-		hns3_vector_enable(&amp;priv-&gt;tqp_vector[i]);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; h-&gt;kinfo.num_tqps; i++)</div><div class='del'>-		hns3_tqp_enable(h-&gt;kinfo.tqp[i]);</div><div class='add'>+	hns3_enable_irqs_and_tqps(ndev);</div><div class='ctx'> </div><div class='ctx'> 	netif_tx_wake_all_queues(ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -5996,7 +5998,7 @@ static const struct hns3_hw_error_info hns3_hw_err[] = {</div><div class='ctx'> static void hns3_process_hw_error(struct hnae3_handle *handle,</div><div class='ctx'> 				  enum hnae3_hw_error_type type)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(hns3_hw_err); i++) {</div><div class='ctx'> 		if (hns3_hw_err[i].type == type) {</div><div class='hunk'>@@ -6023,8 +6025,8 @@ static int __init hns3_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);</div><div class='del'>-	pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);</div><div class='add'>+	pr_debug("%s: %s - version\n", hns3_driver_name, hns3_driver_string);</div><div class='add'>+	pr_debug("%s: %s\n", hns3_driver_name, hns3_copyright);</div><div class='ctx'> </div><div class='ctx'> 	client.type = HNAE3_CLIENT_KNIC;</div><div class='ctx'> 	snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH, "%s",</div><div class='hunk'>@@ -6060,9 +6062,11 @@ module_init(hns3_init_module);</div><div class='ctx'>  */</div><div class='ctx'> static void __exit hns3_exit_module(void)</div><div class='ctx'> {</div><div class='add'>+	hnae3_acquire_unload_lock();</div><div class='ctx'> 	pci_unregister_driver(&amp;hns3_driver);</div><div class='ctx'> 	hnae3_unregister_client(&amp;client);</div><div class='ctx'> 	hns3_dbg_unregister_debugfs();</div><div class='add'>+	hnae3_release_unload_lock();</div><div class='ctx'> }</div><div class='ctx'> module_exit(hns3_exit_module);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h<br/>index caf7a4df8585..933e3527ed82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_enet.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3_enet.h</a></div><div class='hunk'>@@ -623,7 +623,7 @@ struct hns3_reset_type_map {</div><div class='ctx'> 	enum hnae3_reset_type rst_type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static inline int ring_space(struct hns3_enet_ring *ring)</div><div class='add'>+static inline u32 ring_space(struct hns3_enet_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	/* This smp_load_acquire() pairs with smp_store_release() in</div><div class='ctx'> 	 * hns3_nic_reclaim_one_desc called by hns3_clean_tx_ring.</div><div class='hunk'>@@ -694,7 +694,7 @@ static inline unsigned int hns3_page_order(struct hns3_enet_ring *ring)</div><div class='ctx'> </div><div class='ctx'> /* iterator for handling rings in ring group */</div><div class='ctx'> #define hns3_for_each_ring(pos, head) \</div><div class='del'>-	for (pos = (head).ring; (pos); pos = (pos)-&gt;next)</div><div class='add'>+	for ((pos) = (head).ring; (pos); (pos) = (pos)-&gt;next)</div><div class='ctx'> </div><div class='ctx'> #define hns3_get_handle(ndev) \</div><div class='ctx'> 	(((struct hns3_nic_priv *)netdev_priv(ndev))-&gt;ae_handle)</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c<br/>index 97eaeec1952b..a5eefa28454c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/sfp.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -85,7 +86,7 @@ static int hns3_get_sset_count(struct net_device *netdev, int stringset);</div><div class='ctx'> static int hns3_lp_setup(struct net_device *ndev, enum hnae3_loop loop, bool en)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(ndev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!h-&gt;ae_algo-&gt;ops-&gt;set_loopback ||</div><div class='hunk'>@@ -170,7 +171,7 @@ static void hns3_lp_setup_skb(struct sk_buff *skb)</div><div class='ctx'> 	 * the purpose of mac or serdes selftest.</div><div class='ctx'> 	 */</div><div class='ctx'> 	handle = hns3_get_handle(ndev);</div><div class='del'>-	ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='add'>+	ae_dev = hns3_get_ae_dev(handle);</div><div class='ctx'> 	if (ae_dev-&gt;dev_version &lt; HNAE3_DEVICE_VERSION_V2)</div><div class='ctx'> 		ethh-&gt;h_dest[5] += HNS3_NIC_LB_DST_MAC_ADDR;</div><div class='ctx'> 	eth_zero_addr(ethh-&gt;h_source);</div><div class='hunk'>@@ -435,7 +436,7 @@ static void hns3_self_test(struct net_device *ndev,</div><div class='ctx'> 		data[i] = HNS3_NIC_LB_TEST_UNEXECUTED;</div><div class='ctx'> </div><div class='ctx'> 	if (hns3_nic_resetting(ndev)) {</div><div class='del'>-		netdev_err(ndev, "dev resetting!");</div><div class='add'>+		netdev_err(ndev, "dev resetting!\n");</div><div class='ctx'> 		goto failure;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -488,7 +489,7 @@ static const struct hns3_pflag_desc hns3_priv_flags[HNAE3_PFLAG_MAX] = {</div><div class='ctx'> static int hns3_get_sset_count(struct net_device *netdev, int stringset)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = h-&gt;ae_algo-&gt;ops;</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(h);</div><div class='ctx'> </div><div class='ctx'> 	if (!ops-&gt;get_sset_count)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -509,73 +510,53 @@ static int hns3_get_sset_count(struct net_device *netdev, int stringset)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void *hns3_update_strings(u8 *data, const struct hns3_stats *stats,</div><div class='del'>-		u32 stat_count, u32 num_tqps, const char *prefix)</div><div class='add'>+static void hns3_update_strings(u8 **data, const struct hns3_stats *stats,</div><div class='add'>+				u32 stat_count, u32 num_tqps,</div><div class='add'>+				const char *prefix)</div><div class='ctx'> {</div><div class='del'>-#define MAX_PREFIX_SIZE (6 + 4)</div><div class='del'>-	u32 size_left;</div><div class='ctx'> 	u32 i, j;</div><div class='del'>-	u32 n1;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; num_tqps; i++) {</div><div class='del'>-		for (j = 0; j &lt; stat_count; j++) {</div><div class='del'>-			data[ETH_GSTRING_LEN - 1] = '\0';</div><div class='del'>-</div><div class='del'>-			/* first, prepend the prefix string */</div><div class='del'>-			n1 = scnprintf(data, MAX_PREFIX_SIZE, "%s%u_",</div><div class='del'>-				       prefix, i);</div><div class='del'>-			size_left = (ETH_GSTRING_LEN - 1) - n1;</div><div class='del'>-</div><div class='del'>-			/* now, concatenate the stats string to it */</div><div class='del'>-			strncat(data, stats[j].stats_string, size_left);</div><div class='del'>-			data += ETH_GSTRING_LEN;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return data;</div><div class='add'>+	for (i = 0; i &lt; num_tqps; i++)</div><div class='add'>+		for (j = 0; j &lt; stat_count; j++)</div><div class='add'>+			ethtool_sprintf(data, "%s%u_%s", prefix, i,</div><div class='add'>+					stats[j].stats_string);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 *hns3_get_strings_tqps(struct hnae3_handle *handle, u8 *data)</div><div class='add'>+static void hns3_get_strings_tqps(struct hnae3_handle *handle, u8 **data)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_knic_private_info *kinfo = &amp;handle-&gt;kinfo;</div><div class='ctx'> 	const char tx_prefix[] = "txq";</div><div class='ctx'> 	const char rx_prefix[] = "rxq";</div><div class='ctx'> </div><div class='ctx'> 	/* get strings for Tx */</div><div class='del'>-	data = hns3_update_strings(data, hns3_txq_stats, HNS3_TXQ_STATS_COUNT,</div><div class='del'>-				   kinfo-&gt;num_tqps, tx_prefix);</div><div class='add'>+	hns3_update_strings(data, hns3_txq_stats, HNS3_TXQ_STATS_COUNT,</div><div class='add'>+			    kinfo-&gt;num_tqps, tx_prefix);</div><div class='ctx'> </div><div class='ctx'> 	/* get strings for Rx */</div><div class='del'>-	data = hns3_update_strings(data, hns3_rxq_stats, HNS3_RXQ_STATS_COUNT,</div><div class='del'>-				   kinfo-&gt;num_tqps, rx_prefix);</div><div class='del'>-</div><div class='del'>-	return data;</div><div class='add'>+	hns3_update_strings(data, hns3_rxq_stats, HNS3_RXQ_STATS_COUNT,</div><div class='add'>+			    kinfo-&gt;num_tqps, rx_prefix);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hns3_get_strings(struct net_device *netdev, u32 stringset, u8 *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = h-&gt;ae_algo-&gt;ops;</div><div class='del'>-	char *buff = (char *)data;</div><div class='del'>-	int i;</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(h);</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	if (!ops-&gt;get_strings)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	switch (stringset) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='del'>-		buff = hns3_get_strings_tqps(h, buff);</div><div class='del'>-		ops-&gt;get_strings(h, stringset, (u8 *)buff);</div><div class='add'>+		hns3_get_strings_tqps(h, &amp;data);</div><div class='add'>+		ops-&gt;get_strings(h, stringset, &amp;data);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ETH_SS_TEST:</div><div class='del'>-		ops-&gt;get_strings(h, stringset, data);</div><div class='add'>+		ops-&gt;get_strings(h, stringset, &amp;data);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ETH_SS_PRIV_FLAGS:</div><div class='del'>-		for (i = 0; i &lt; HNS3_PRIV_FLAGS_LEN; i++) {</div><div class='del'>-			snprintf(buff, ETH_GSTRING_LEN, "%s",</div><div class='del'>-				 hns3_priv_flags[i].name);</div><div class='del'>-			buff += ETH_GSTRING_LEN;</div><div class='del'>-		}</div><div class='add'>+		for (i = 0; i &lt; HNS3_PRIV_FLAGS_LEN; i++)</div><div class='add'>+			ethtool_puts(&amp;data, hns3_priv_flags[i].name);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -588,7 +569,7 @@ static u64 *hns3_get_stats_tqps(struct hnae3_handle *handle, u64 *data)</div><div class='ctx'> 	struct hns3_nic_priv *nic_priv = handle-&gt;priv;</div><div class='ctx'> 	struct hns3_enet_ring *ring;</div><div class='ctx'> 	u8 *stat;</div><div class='del'>-	int i, j;</div><div class='add'>+	u32 i, j;</div><div class='ctx'> </div><div class='ctx'> 	/* get stats for Tx */</div><div class='ctx'> 	for (i = 0; i &lt; kinfo-&gt;num_tqps; i++) {</div><div class='hunk'>@@ -711,7 +692,7 @@ static void hns3_get_pauseparam(struct net_device *netdev,</div><div class='ctx'> 				struct ethtool_pauseparam *param)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h);</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(HNAE3_DEV_SUPPORT_PAUSE_B, ae_dev-&gt;caps))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -725,7 +706,7 @@ static int hns3_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> 			       struct ethtool_pauseparam *param)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h);</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(HNAE3_DEV_SUPPORT_PAUSE_B, ae_dev-&gt;caps))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -744,7 +725,7 @@ static int hns3_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> static void hns3_get_ksettings(struct hnae3_handle *h,</div><div class='ctx'> 			       struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='del'>-	const struct hnae3_ae_ops *ops = h-&gt;ae_algo-&gt;ops;</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(h);</div><div class='ctx'> </div><div class='ctx'> 	/* 1.auto_neg &amp; speed &amp; duplex from cmd */</div><div class='ctx'> 	if (ops-&gt;get_ksettings_an_result)</div><div class='hunk'>@@ -770,7 +751,7 @@ static int hns3_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 				   struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h);</div><div class='ctx'> 	const struct hnae3_ae_ops *ops;</div><div class='ctx'> 	u8 module_type;</div><div class='ctx'> 	u8 media_type;</div><div class='hunk'>@@ -813,7 +794,7 @@ static int hns3_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> </div><div class='del'>-		netdev_warn(netdev, "Unknown media type");</div><div class='add'>+		netdev_warn(netdev, "Unknown media type\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -833,7 +814,7 @@ static int hns3_check_ksettings_param(const struct net_device *netdev,</div><div class='ctx'> 				      const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = handle-&gt;ae_algo-&gt;ops;</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(handle);</div><div class='ctx'> 	u8 module_type = HNAE3_MODULE_TYPE_UNKNOWN;</div><div class='ctx'> 	u8 media_type = HNAE3_MEDIA_TYPE_UNKNOWN;</div><div class='ctx'> 	u32 lane_num;</div><div class='hunk'>@@ -861,7 +842,7 @@ static int hns3_check_ksettings_param(const struct net_device *netdev,</div><div class='ctx'> 	if (cmd-&gt;base.duplex == DUPLEX_HALF &amp;&amp;</div><div class='ctx'> 	    media_type != HNAE3_MEDIA_TYPE_COPPER) {</div><div class='ctx'> 		netdev_err(netdev,</div><div class='del'>-			   "only copper port supports half duplex!");</div><div class='add'>+			   "only copper port supports half duplex!\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -880,8 +861,8 @@ static int hns3_set_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 				   const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = handle-&gt;ae_algo-&gt;ops;</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(handle);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Chip don't support this mode. */</div><div class='hunk'>@@ -951,7 +932,7 @@ static u32 hns3_get_rss_key_size(struct net_device *netdev)</div><div class='ctx'> static u32 hns3_get_rss_indir_size(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h);</div><div class='ctx'> </div><div class='ctx'> 	return ae_dev-&gt;dev_specs.rss_ind_tbl_size;</div><div class='ctx'> }</div><div class='hunk'>@@ -973,7 +954,7 @@ static int hns3_set_rss(struct net_device *netdev,</div><div class='ctx'> 			struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h);</div><div class='ctx'> </div><div class='ctx'> 	if (!h-&gt;ae_algo-&gt;ops-&gt;set_rss)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -997,6 +978,16 @@ static int hns3_set_rss(struct net_device *netdev,</div><div class='ctx'> 					rxfh-&gt;hfunc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hns3_get_rxfh_fields(struct net_device *netdev,</div><div class='add'>+				struct ethtool_rxfh_fields *cmd)</div><div class='add'>+{</div><div class='add'>+	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='add'>+</div><div class='add'>+	if (h-&gt;ae_algo-&gt;ops-&gt;get_rss_tuple)</div><div class='add'>+		return h-&gt;ae_algo-&gt;ops-&gt;get_rss_tuple(h, cmd);</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hns3_get_rxnfc(struct net_device *netdev,</div><div class='ctx'> 			  struct ethtool_rxnfc *cmd,</div><div class='ctx'> 			  u32 *rule_locs)</div><div class='hunk'>@@ -1007,10 +998,6 @@ static int hns3_get_rxnfc(struct net_device *netdev,</div><div class='ctx'> 	case ETHTOOL_GRXRINGS:</div><div class='ctx'> 		cmd-&gt;data = h-&gt;kinfo.num_tqps;</div><div class='ctx'> 		return 0;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		if (h-&gt;ae_algo-&gt;ops-&gt;get_rss_tuple)</div><div class='del'>-			return h-&gt;ae_algo-&gt;ops-&gt;get_rss_tuple(h, cmd);</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		if (h-&gt;ae_algo-&gt;ops-&gt;get_fd_rule_cnt)</div><div class='ctx'> 			return h-&gt;ae_algo-&gt;ops-&gt;get_fd_rule_cnt(h, cmd);</div><div class='hunk'>@@ -1043,8 +1030,8 @@ static int hns3_set_reset(struct net_device *netdev, u32 *flags)</div><div class='ctx'> {</div><div class='ctx'> 	enum hnae3_reset_type rst_type = HNAE3_NONE_RESET;</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = h-&gt;ae_algo-&gt;ops;</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h);</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(h);</div><div class='ctx'> 	const struct hns3_reset_type_map *rst_type_map;</div><div class='ctx'> 	enum ethtool_reset_flags rst_flags;</div><div class='ctx'> 	u32 i, size;</div><div class='hunk'>@@ -1208,7 +1195,7 @@ static int hns3_set_tx_push(struct net_device *netdev, u32 tx_push)</div><div class='ctx'> {</div><div class='ctx'> 	struct hns3_nic_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h);</div><div class='ctx'> 	u32 old_state = test_bit(HNS3_NIC_STATE_TX_PUSH_ENABLE, &amp;priv-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, ae_dev-&gt;caps) &amp;&amp; tx_push)</div><div class='hunk'>@@ -1218,7 +1205,7 @@ static int hns3_set_tx_push(struct net_device *netdev, u32 tx_push)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(netdev, "Changing tx push from %s to %s\n",</div><div class='del'>-		   old_state ? "on" : "off", tx_push ? "on" : "off");</div><div class='add'>+		   str_on_off(old_state), str_on_off(tx_push));</div><div class='ctx'> </div><div class='ctx'> 	if (tx_push)</div><div class='ctx'> 		set_bit(HNS3_NIC_STATE_TX_PUSH_ENABLE, &amp;priv-&gt;state);</div><div class='hunk'>@@ -1294,15 +1281,22 @@ static int hns3_set_ringparam(struct net_device *ndev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hns3_set_rxfh_fields(struct net_device *netdev,</div><div class='add'>+				const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='add'>+</div><div class='add'>+	if (h-&gt;ae_algo-&gt;ops-&gt;set_rss_tuple)</div><div class='add'>+		return h-&gt;ae_algo-&gt;ops-&gt;set_rss_tuple(h, cmd);</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hns3_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *h = hns3_get_handle(netdev);</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		if (h-&gt;ae_algo-&gt;ops-&gt;set_rss_tuple)</div><div class='del'>-			return h-&gt;ae_algo-&gt;ops-&gt;set_rss_tuple(h, cmd);</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		if (h-&gt;ae_algo-&gt;ops-&gt;add_fd_entry)</div><div class='ctx'> 			return h-&gt;ae_algo-&gt;ops-&gt;add_fd_entry(h, cmd);</div><div class='hunk'>@@ -1319,7 +1313,7 @@ static int hns3_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> static int hns3_nway_reset(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = handle-&gt;ae_algo-&gt;ops;</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(handle);</div><div class='ctx'> 	struct phy_device *phy = netdev-&gt;phydev;</div><div class='ctx'> 	int autoneg;</div><div class='ctx'> </div><div class='hunk'>@@ -1327,7 +1321,7 @@ static int hns3_nway_reset(struct net_device *netdev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (hns3_nic_resetting(netdev)) {</div><div class='del'>-		netdev_err(netdev, "dev resetting!");</div><div class='add'>+		netdev_err(netdev, "dev resetting!\n");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1396,7 +1390,7 @@ static int hns3_check_gl_coalesce_para(struct net_device *netdev,</div><div class='ctx'> 				       struct ethtool_coalesce *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='ctx'> 	u32 rx_gl, tx_gl;</div><div class='ctx'> </div><div class='ctx'> 	if (cmd-&gt;rx_coalesce_usecs &gt; ae_dev-&gt;dev_specs.max_int_gl) {</div><div class='hunk'>@@ -1468,7 +1462,7 @@ static int hns3_check_ql_coalesce_param(struct net_device *netdev,</div><div class='ctx'> 					struct ethtool_coalesce *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='ctx'> </div><div class='ctx'> 	if ((cmd-&gt;tx_max_coalesced_frames || cmd-&gt;rx_max_coalesced_frames) &amp;&amp;</div><div class='ctx'> 	    !ae_dev-&gt;dev_specs.int_ql_max) {</div><div class='hunk'>@@ -1492,7 +1486,7 @@ hns3_check_cqe_coalesce_param(struct net_device *netdev,</div><div class='ctx'> 			      struct kernel_ethtool_coalesce *kernel_coal)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='ctx'> </div><div class='ctx'> 	if ((kernel_coal-&gt;use_cqe_mode_tx || kernel_coal-&gt;use_cqe_mode_rx) &amp;&amp;</div><div class='ctx'> 	    !hnae3_ae_dev_cq_supported(ae_dev)) {</div><div class='hunk'>@@ -1665,11 +1659,12 @@ static void hns3_set_msglevel(struct net_device *netdev, u32 msg_level)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hns3_get_fec_stats(struct net_device *netdev,</div><div class='del'>-			       struct ethtool_fec_stats *fec_stats)</div><div class='add'>+			       struct ethtool_fec_stats *fec_stats,</div><div class='add'>+			       struct ethtool_fec_hist *hist)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = handle-&gt;ae_algo-&gt;ops;</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(handle);</div><div class='ctx'> </div><div class='ctx'> 	if (!hnae3_ae_dev_fec_stats_supported(ae_dev) || !ops-&gt;get_fec_stats)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1719,8 +1714,8 @@ static int hns3_get_fecparam(struct net_device *netdev,</div><div class='ctx'> 			     struct ethtool_fecparam *fec)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = handle-&gt;ae_algo-&gt;ops;</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(handle);</div><div class='ctx'> 	u8 fec_ability;</div><div class='ctx'> 	u8 fec_mode;</div><div class='ctx'> </div><div class='hunk'>@@ -1744,8 +1739,8 @@ static int hns3_set_fecparam(struct net_device *netdev,</div><div class='ctx'> 			     struct ethtool_fecparam *fec)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = handle-&gt;ae_algo-&gt;ops;</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(handle);</div><div class='ctx'> 	u32 fec_mode;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(HNAE3_DEV_SUPPORT_FEC_B, ae_dev-&gt;caps))</div><div class='hunk'>@@ -1766,8 +1761,8 @@ static int hns3_get_module_info(struct net_device *netdev,</div><div class='ctx'> #define HNS3_SFF_8636_V1_3 0x03</div><div class='ctx'> </div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = handle-&gt;ae_algo-&gt;ops;</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(handle);</div><div class='ctx'> 	struct hns3_sfp_type sfp_type;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1816,8 +1811,8 @@ static int hns3_get_module_eeprom(struct net_device *netdev,</div><div class='ctx'> 				  struct ethtool_eeprom *ee, u8 *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *handle = hns3_get_handle(netdev);</div><div class='del'>-	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle-&gt;pdev);</div><div class='del'>-	const struct hnae3_ae_ops *ops = handle-&gt;ae_algo-&gt;ops;</div><div class='add'>+	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle);</div><div class='add'>+	const struct hnae3_ae_ops *ops = hns3_get_ops(handle);</div><div class='ctx'> </div><div class='ctx'> 	if (ae_dev-&gt;dev_version &lt; HNAE3_DEVICE_VERSION_V2 ||</div><div class='ctx'> 	    !ops-&gt;get_module_eeprom)</div><div class='hunk'>@@ -1968,7 +1963,7 @@ static int hns3_set_tunable(struct net_device *netdev,</div><div class='ctx'> 	int i, ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (hns3_nic_resetting(netdev) || !priv-&gt;ring) {</div><div class='del'>-		netdev_err(netdev, "failed to set tunable value, dev resetting!");</div><div class='add'>+		netdev_err(netdev, "failed to set tunable value, dev resetting!\n");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2157,6 +2152,8 @@ static const struct ethtool_ops hns3vf_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size = hns3_get_rss_indir_size,</div><div class='ctx'> 	.get_rxfh = hns3_get_rss,</div><div class='ctx'> 	.set_rxfh = hns3_set_rss,</div><div class='add'>+	.get_rxfh_fields = hns3_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields = hns3_set_rxfh_fields,</div><div class='ctx'> 	.get_link_ksettings = hns3_get_link_ksettings,</div><div class='ctx'> 	.get_channels = hns3_get_channels,</div><div class='ctx'> 	.set_channels = hns3_set_channels,</div><div class='hunk'>@@ -2194,6 +2191,8 @@ static const struct ethtool_ops hns3_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size = hns3_get_rss_indir_size,</div><div class='ctx'> 	.get_rxfh = hns3_get_rss,</div><div class='ctx'> 	.set_rxfh = hns3_set_rss,</div><div class='add'>+	.get_rxfh_fields = hns3_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields = hns3_set_rxfh_fields,</div><div class='ctx'> 	.get_link_ksettings = hns3_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings = hns3_set_link_ksettings,</div><div class='ctx'> 	.nway_reset = hns3_nway_reset,</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c<br/>index debf143e9940..b76d25074e99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/sched/clock.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "hclge_debugfs.h"</div><div class='ctx'> #include "hclge_err.h"</div><div class='hunk'>@@ -11,7 +12,9 @@</div><div class='ctx'> #include "hclge_tm.h"</div><div class='ctx'> #include "hnae3.h"</div><div class='ctx'> </div><div class='del'>-static const char * const state_str[] = { "off", "on" };</div><div class='add'>+#define hclge_seq_file_to_hdev(s)	\</div><div class='add'>+		(((struct hnae3_ae_dev *)hnae3_seq_file_to_ae_dev(s))-&gt;priv)</div><div class='add'>+</div><div class='ctx'> static const char * const hclge_mac_state_str[] = {</div><div class='ctx'> 	"TO_ADD", "TO_DEL", "ACTIVE"</div><div class='ctx'> };</div><div class='hunk'>@@ -721,48 +724,6 @@ static const struct hclge_dbg_reg_type_info hclge_dbg_reg_info[] = {</div><div class='ctx'> 		       .cmd = HCLGE_OPC_DFX_TQP_REG } },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* make sure: len(name) + interval &gt;= maxlen(item data) + 2,</div><div class='del'>- * for example, name = "pkt_num"(len: 7), the prototype of item data is u32,</div><div class='del'>- * and print as "%u"(maxlen: 10), so the interval should be at least 5.</div><div class='del'>- */</div><div class='del'>-static void hclge_dbg_fill_content(char *content, u16 len,</div><div class='del'>-				   const struct hclge_dbg_item *items,</div><div class='del'>-				   const char **result, u16 size)</div><div class='del'>-{</div><div class='del'>-#define HCLGE_DBG_LINE_END_LEN	2</div><div class='del'>-	char *pos = content;</div><div class='del'>-	u16 item_len;</div><div class='del'>-	u16 i;</div><div class='del'>-</div><div class='del'>-	if (!len) {</div><div class='del'>-		return;</div><div class='del'>-	} else if (len &lt;= HCLGE_DBG_LINE_END_LEN) {</div><div class='del'>-		*pos++ = '\0';</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(content, ' ', len);</div><div class='del'>-	len -= HCLGE_DBG_LINE_END_LEN;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; size; i++) {</div><div class='del'>-		item_len = strlen(items[i].name) + items[i].interval;</div><div class='del'>-		if (len &lt; item_len)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (result) {</div><div class='del'>-			if (item_len &lt; strlen(result[i]))</div><div class='del'>-				break;</div><div class='del'>-			memcpy(pos, result[i], strlen(result[i]));</div><div class='del'>-		} else {</div><div class='del'>-			memcpy(pos, items[i].name, strlen(items[i].name));</div><div class='del'>-		}</div><div class='del'>-		pos += item_len;</div><div class='del'>-		len -= item_len;</div><div class='del'>-	}</div><div class='del'>-	*pos++ = '\n';</div><div class='del'>-	*pos++ = '\0';</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static char *hclge_dbg_get_func_id_str(char *buf, u8 id)</div><div class='ctx'> {</div><div class='ctx'> 	if (id)</div><div class='hunk'>@@ -826,14 +787,14 @@ int hclge_dbg_cmd_send(struct hclge_dev *hdev, struct hclge_desc *desc_src,</div><div class='ctx'> static int</div><div class='ctx'> hclge_dbg_dump_reg_tqp(struct hclge_dev *hdev,</div><div class='ctx'> 		       const struct hclge_dbg_reg_type_info *reg_info,</div><div class='del'>-		       char *buf, int len, int *pos)</div><div class='add'>+		       struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	const struct hclge_dbg_dfx_message *dfx_message = reg_info-&gt;dfx_msg;</div><div class='ctx'> 	const struct hclge_dbg_reg_common_msg *reg_msg = &amp;reg_info-&gt;reg_msg;</div><div class='add'>+	u32 index, entry, i, cnt, min_num;</div><div class='ctx'> 	struct hclge_desc *desc_src;</div><div class='del'>-	u32 index, entry, i, cnt;</div><div class='del'>-	int bd_num, min_num, ret;</div><div class='ctx'> 	struct hclge_desc *desc;</div><div class='add'>+	int bd_num, ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_dbg_get_dfx_bd_num(hdev, reg_msg-&gt;offset, &amp;bd_num);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -846,13 +807,12 @@ hclge_dbg_dump_reg_tqp(struct hclge_dev *hdev,</div><div class='ctx'> 	min_num = min_t(int, bd_num * HCLGE_DESC_DATA_LEN, reg_msg-&gt;msg_num);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0, cnt = 0; i &lt; min_num; i++, dfx_message++)</div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "item%u = %s\n",</div><div class='del'>-				  cnt++, dfx_message-&gt;message);</div><div class='add'>+		seq_printf(s, "item%u = %s\n", cnt++, dfx_message-&gt;message);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; cnt; i++)</div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "item%u\t", i);</div><div class='add'>+		seq_printf(s, "item%u\t", i);</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "\n");</div><div class='add'>+	seq_puts(s, "\n");</div><div class='ctx'> </div><div class='ctx'> 	for (index = 0; index &lt; hdev-&gt;vport[0].alloc_tqps; index++) {</div><div class='ctx'> 		dfx_message = reg_info-&gt;dfx_msg;</div><div class='hunk'>@@ -867,10 +827,9 @@ hclge_dbg_dump_reg_tqp(struct hclge_dev *hdev,</div><div class='ctx'> 			if (i &gt; 0 &amp;&amp; !entry)</div><div class='ctx'> 				desc++;</div><div class='ctx'> </div><div class='del'>-			*pos += scnprintf(buf + *pos, len - *pos, "%#x\t",</div><div class='del'>-					  le32_to_cpu(desc-&gt;data[entry]));</div><div class='add'>+			seq_printf(s, "%#x\t", le32_to_cpu(desc-&gt;data[entry]));</div><div class='ctx'> 		}</div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "\n");</div><div class='add'>+		seq_puts(s, "\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(desc_src);</div><div class='hunk'>@@ -880,14 +839,14 @@ hclge_dbg_dump_reg_tqp(struct hclge_dev *hdev,</div><div class='ctx'> static int</div><div class='ctx'> hclge_dbg_dump_reg_common(struct hclge_dev *hdev,</div><div class='ctx'> 			  const struct hclge_dbg_reg_type_info *reg_info,</div><div class='del'>-			  char *buf, int len, int *pos)</div><div class='add'>+			  struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	const struct hclge_dbg_reg_common_msg *reg_msg = &amp;reg_info-&gt;reg_msg;</div><div class='ctx'> 	const struct hclge_dbg_dfx_message *dfx_message = reg_info-&gt;dfx_msg;</div><div class='ctx'> 	struct hclge_desc *desc_src;</div><div class='del'>-	int bd_num, min_num, ret;</div><div class='add'>+	int bd_num, min_num, ret, i;</div><div class='ctx'> 	struct hclge_desc *desc;</div><div class='del'>-	u32 entry, i;</div><div class='add'>+	u32 entry;</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_dbg_get_dfx_bd_num(hdev, reg_msg-&gt;offset, &amp;bd_num);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -914,9 +873,8 @@ hclge_dbg_dump_reg_common(struct hclge_dev *hdev,</div><div class='ctx'> 		if (!dfx_message-&gt;flag)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "%s: %#x\n",</div><div class='del'>-				  dfx_message-&gt;message,</div><div class='del'>-				  le32_to_cpu(desc-&gt;data[entry]));</div><div class='add'>+		seq_printf(s, "%s: %#x\n", dfx_message-&gt;message,</div><div class='add'>+			   le32_to_cpu(desc-&gt;data[entry]));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(desc_src);</div><div class='hunk'>@@ -940,8 +898,8 @@ static const struct hclge_dbg_status_dfx_info hclge_dbg_mac_en_status[] = {</div><div class='ctx'> 	{HCLGE_MAC_TX_OVERSIZE_TRUNCATE_B, "mac_tx_oversize_truncate_en"}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int  hclge_dbg_dump_mac_enable_status(struct hclge_dev *hdev, char *buf,</div><div class='del'>-					     int len, int *pos)</div><div class='add'>+static int hclge_dbg_dump_mac_enable_status(struct hclge_dev *hdev,</div><div class='add'>+					    struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_config_mac_mode_cmd *req;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='hunk'>@@ -962,16 +920,15 @@ static int  hclge_dbg_dump_mac_enable_status(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(hclge_dbg_mac_en_status); i++) {</div><div class='ctx'> 		offset = hclge_dbg_mac_en_status[i].offset;</div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "%s: %#x\n",</div><div class='del'>-				  hclge_dbg_mac_en_status[i].message,</div><div class='del'>-				  hnae3_get_bit(loop_en, offset));</div><div class='add'>+		seq_printf(s, "%s: %#x\n", hclge_dbg_mac_en_status[i].message,</div><div class='add'>+			   hnae3_get_bit(loop_en, offset));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_mac_frame_size(struct hclge_dev *hdev, char *buf,</div><div class='del'>-					 int len, int *pos)</div><div class='add'>+static int hclge_dbg_dump_mac_frame_size(struct hclge_dev *hdev,</div><div class='add'>+					 struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_config_max_frm_size_cmd *req;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='hunk'>@@ -988,16 +945,14 @@ static int hclge_dbg_dump_mac_frame_size(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> </div><div class='ctx'> 	req = (struct hclge_config_max_frm_size_cmd *)desc.data;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "max_frame_size: %u\n",</div><div class='del'>-			  le16_to_cpu(req-&gt;max_frm_size));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "min_frame_size: %u\n",</div><div class='del'>-			  req-&gt;min_frm_size);</div><div class='add'>+	seq_printf(s, "max_frame_size: %u\n", le16_to_cpu(req-&gt;max_frm_size));</div><div class='add'>+	seq_printf(s, "min_frame_size: %u\n", req-&gt;min_frm_size);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_mac_speed_duplex(struct hclge_dev *hdev, char *buf,</div><div class='del'>-					   int len, int *pos)</div><div class='add'>+static int hclge_dbg_dump_mac_speed_duplex(struct hclge_dev *hdev,</div><div class='add'>+					   struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> #define HCLGE_MAC_SPEED_SHIFT	0</div><div class='ctx'> #define HCLGE_MAC_SPEED_MASK	GENMASK(5, 0)</div><div class='hunk'>@@ -1018,33 +973,31 @@ static int hclge_dbg_dump_mac_speed_duplex(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> </div><div class='ctx'> 	req = (struct hclge_config_mac_speed_dup_cmd *)desc.data;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "speed: %#lx\n",</div><div class='del'>-			  hnae3_get_field(req-&gt;speed_dup, HCLGE_MAC_SPEED_MASK,</div><div class='del'>-					  HCLGE_MAC_SPEED_SHIFT));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "duplex: %#x\n",</div><div class='del'>-			  hnae3_get_bit(req-&gt;speed_dup,</div><div class='del'>-					HCLGE_MAC_DUPLEX_SHIFT));</div><div class='add'>+	seq_printf(s, "speed: %#lx\n",</div><div class='add'>+		   hnae3_get_field(req-&gt;speed_dup, HCLGE_MAC_SPEED_MASK,</div><div class='add'>+				   HCLGE_MAC_SPEED_SHIFT));</div><div class='add'>+	seq_printf(s, "duplex: %#x\n",</div><div class='add'>+		   hnae3_get_bit(req-&gt;speed_dup, HCLGE_MAC_DUPLEX_SHIFT));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_mac(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_mac(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	int pos = 0;</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_mac_enable_status(hdev, buf, len, &amp;pos);</div><div class='add'>+	ret = hclge_dbg_dump_mac_enable_status(hdev, s);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_mac_frame_size(hdev, buf, len, &amp;pos);</div><div class='add'>+	ret = hclge_dbg_dump_mac_frame_size(hdev, s);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return hclge_dbg_dump_mac_speed_duplex(hdev, buf, len, &amp;pos);</div><div class='add'>+	return hclge_dbg_dump_mac_speed_duplex(hdev, s);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_dcb_qset(struct hclge_dev *hdev, char *buf, int len,</div><div class='del'>-				   int *pos)</div><div class='add'>+static int hclge_dbg_dump_dcb_qset(struct hclge_dev *hdev, struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_dbg_bitmap_cmd req;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='hunk'>@@ -1055,8 +1008,8 @@ static int hclge_dbg_dump_dcb_qset(struct hclge_dev *hdev, char *buf, int len,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "qset_id  roce_qset_mask  nic_qset_mask  qset_shaping_pass  qset_bp_status\n");</div><div class='add'>+	seq_puts(s, "qset_id  roce_qset_mask  nic_qset_mask  ");</div><div class='add'>+	seq_puts(s, "qset_shaping_pass  qset_bp_status\n");</div><div class='ctx'> 	for (qset_id = 0; qset_id &lt; qset_num; qset_id++) {</div><div class='ctx'> 		ret = hclge_dbg_cmd_send(hdev, &amp;desc, qset_id, 1,</div><div class='ctx'> 					 HCLGE_OPC_QSET_DFX_STS);</div><div class='hunk'>@@ -1065,17 +1018,14 @@ static int hclge_dbg_dump_dcb_qset(struct hclge_dev *hdev, char *buf, int len,</div><div class='ctx'> </div><div class='ctx'> 		req.bitmap = (u8)le32_to_cpu(desc.data[1]);</div><div class='ctx'> </div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-				  "%04u           %#x            %#x             %#x               %#x\n",</div><div class='del'>-				  qset_id, req.bit0, req.bit1, req.bit2,</div><div class='del'>-				  req.bit3);</div><div class='add'>+		seq_printf(s, "%04u     %#-16x%#-15x%#-19x%#-x\n",</div><div class='add'>+			   qset_id, req.bit0, req.bit1, req.bit2, req.bit3);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_dcb_pri(struct hclge_dev *hdev, char *buf, int len,</div><div class='del'>-				  int *pos)</div><div class='add'>+static int hclge_dbg_dump_dcb_pri(struct hclge_dev *hdev, struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_dbg_bitmap_cmd req;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='hunk'>@@ -1086,8 +1036,7 @@ static int hclge_dbg_dump_dcb_pri(struct hclge_dev *hdev, char *buf, int len,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "pri_id  pri_mask  pri_cshaping_pass  pri_pshaping_pass\n");</div><div class='add'>+	seq_puts(s, "pri_id  pri_mask  pri_cshaping_pass  pri_pshaping_pass\n");</div><div class='ctx'> 	for (pri_id = 0; pri_id &lt; pri_num; pri_id++) {</div><div class='ctx'> 		ret = hclge_dbg_cmd_send(hdev, &amp;desc, pri_id, 1,</div><div class='ctx'> 					 HCLGE_OPC_PRI_DFX_STS);</div><div class='hunk'>@@ -1096,24 +1045,21 @@ static int hclge_dbg_dump_dcb_pri(struct hclge_dev *hdev, char *buf, int len,</div><div class='ctx'> </div><div class='ctx'> 		req.bitmap = (u8)le32_to_cpu(desc.data[1]);</div><div class='ctx'> </div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-				  "%03u       %#x           %#x                %#x\n",</div><div class='del'>-				  pri_id, req.bit0, req.bit1, req.bit2);</div><div class='add'>+		seq_printf(s, "%03u     %#-10x%#-19x%#-x\n",</div><div class='add'>+			   pri_id, req.bit0, req.bit1, req.bit2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_dcb_pg(struct hclge_dev *hdev, char *buf, int len,</div><div class='del'>-				 int *pos)</div><div class='add'>+static int hclge_dbg_dump_dcb_pg(struct hclge_dev *hdev, struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_dbg_bitmap_cmd req;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='ctx'> 	u8 pg_id;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "pg_id  pg_mask  pg_cshaping_pass  pg_pshaping_pass\n");</div><div class='add'>+	seq_puts(s, "pg_id  pg_mask  pg_cshaping_pass  pg_pshaping_pass\n");</div><div class='ctx'> 	for (pg_id = 0; pg_id &lt; hdev-&gt;tm_info.num_pg; pg_id++) {</div><div class='ctx'> 		ret = hclge_dbg_cmd_send(hdev, &amp;desc, pg_id, 1,</div><div class='ctx'> 					 HCLGE_OPC_PG_DFX_STS);</div><div class='hunk'>@@ -1122,47 +1068,41 @@ static int hclge_dbg_dump_dcb_pg(struct hclge_dev *hdev, char *buf, int len,</div><div class='ctx'> </div><div class='ctx'> 		req.bitmap = (u8)le32_to_cpu(desc.data[1]);</div><div class='ctx'> </div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-				  "%03u      %#x           %#x               %#x\n",</div><div class='del'>-				  pg_id, req.bit0, req.bit1, req.bit2);</div><div class='add'>+		seq_printf(s, "%03u    %#-9x%#-18x%#-x\n",</div><div class='add'>+			   pg_id, req.bit0, req.bit1, req.bit2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_dcb_queue(struct hclge_dev *hdev, char *buf, int len,</div><div class='del'>-				    int *pos)</div><div class='add'>+static int hclge_dbg_dump_dcb_queue(struct hclge_dev *hdev, struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='ctx'> 	u16 nq_id;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "nq_id  sch_nic_queue_cnt  sch_roce_queue_cnt\n");</div><div class='add'>+	seq_puts(s, "nq_id  sch_nic_queue_cnt  sch_roce_queue_cnt\n");</div><div class='ctx'> 	for (nq_id = 0; nq_id &lt; hdev-&gt;num_tqps; nq_id++) {</div><div class='ctx'> 		ret = hclge_dbg_cmd_send(hdev, &amp;desc, nq_id, 1,</div><div class='ctx'> 					 HCLGE_OPC_SCH_NQ_CNT);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "%04u           %#x",</div><div class='del'>-				  nq_id, le32_to_cpu(desc.data[1]));</div><div class='add'>+		seq_printf(s, "%04u   %#-19x",</div><div class='add'>+			   nq_id, le32_to_cpu(desc.data[1]));</div><div class='ctx'> </div><div class='ctx'> 		ret = hclge_dbg_cmd_send(hdev, &amp;desc, nq_id, 1,</div><div class='ctx'> 					 HCLGE_OPC_SCH_RQ_CNT);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-				  "               %#x\n",</div><div class='del'>-				  le32_to_cpu(desc.data[1]));</div><div class='add'>+		seq_printf(s, "%#-x\n", le32_to_cpu(desc.data[1]));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_dcb_port(struct hclge_dev *hdev, char *buf, int len,</div><div class='del'>-				   int *pos)</div><div class='add'>+static int hclge_dbg_dump_dcb_port(struct hclge_dev *hdev, struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_dbg_bitmap_cmd req;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='hunk'>@@ -1176,16 +1116,13 @@ static int hclge_dbg_dump_dcb_port(struct hclge_dev *hdev, char *buf, int len,</div><div class='ctx'> </div><div class='ctx'> 	req.bitmap = (u8)le32_to_cpu(desc.data[1]);</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "port_mask: %#x\n",</div><div class='del'>-			 req.bit0);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "port_shaping_pass: %#x\n",</div><div class='del'>-			 req.bit1);</div><div class='add'>+	seq_printf(s, "port_mask: %#x\n", req.bit0);</div><div class='add'>+	seq_printf(s, "port_shaping_pass: %#x\n", req.bit1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_dcb_tm(struct hclge_dev *hdev, char *buf, int len,</div><div class='del'>-				 int *pos)</div><div class='add'>+static int hclge_dbg_dump_dcb_tm(struct hclge_dev *hdev, struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_desc desc[2];</div><div class='ctx'> 	u8 port_id = 0;</div><div class='hunk'>@@ -1196,32 +1133,23 @@ static int hclge_dbg_dump_dcb_tm(struct hclge_dev *hdev, char *buf, int len,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "SCH_NIC_NUM: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[1]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "SCH_ROCE_NUM: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[2]));</div><div class='add'>+	seq_printf(s, "SCH_NIC_NUM: %#x\n", le32_to_cpu(desc[0].data[1]));</div><div class='add'>+	seq_printf(s, "SCH_ROCE_NUM: %#x\n", le32_to_cpu(desc[0].data[2]));</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_dbg_cmd_send(hdev, desc, port_id, 2,</div><div class='ctx'> 				 HCLGE_OPC_TM_INTERNAL_STS);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "pri_bp: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[1]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "fifo_dfx_info: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[2]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "sch_roce_fifo_afull_gap: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[3]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "tx_private_waterline: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[4]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "tm_bypass_en: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[5]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "SSU_TM_BYPASS_EN: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[1].data[0]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "SSU_RESERVE_CFG: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[1].data[1]));</div><div class='add'>+	seq_printf(s, "pri_bp: %#x\n", le32_to_cpu(desc[0].data[1]));</div><div class='add'>+	seq_printf(s, "fifo_dfx_info: %#x\n", le32_to_cpu(desc[0].data[2]));</div><div class='add'>+	seq_printf(s, "sch_roce_fifo_afull_gap: %#x\n",</div><div class='add'>+		   le32_to_cpu(desc[0].data[3]));</div><div class='add'>+	seq_printf(s, "tx_private_waterline: %#x\n",</div><div class='add'>+		   le32_to_cpu(desc[0].data[4]));</div><div class='add'>+	seq_printf(s, "tm_bypass_en: %#x\n", le32_to_cpu(desc[0].data[5]));</div><div class='add'>+	seq_printf(s, "SSU_TM_BYPASS_EN: %#x\n", le32_to_cpu(desc[1].data[0]));</div><div class='add'>+	seq_printf(s, "SSU_RESERVE_CFG: %#x\n", le32_to_cpu(desc[1].data[1]));</div><div class='ctx'> </div><div class='ctx'> 	if (hdev-&gt;hw.mac.media_type == HNAE3_MEDIA_TYPE_COPPER)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1231,65 +1159,60 @@ static int hclge_dbg_dump_dcb_tm(struct hclge_dev *hdev, char *buf, int len,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "TC_MAP_SEL: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[1]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "IGU_PFC_PRI_EN: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[2]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "MAC_PFC_PRI_EN: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[3]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "IGU_PRI_MAP_TC_CFG: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[4]));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-			  "IGU_TX_PRI_MAP_TC_CFG: %#x\n",</div><div class='del'>-			  le32_to_cpu(desc[0].data[5]));</div><div class='add'>+	seq_printf(s, "TC_MAP_SEL: %#x\n", le32_to_cpu(desc[0].data[1]));</div><div class='add'>+	seq_printf(s, "IGU_PFC_PRI_EN: %#x\n", le32_to_cpu(desc[0].data[2]));</div><div class='add'>+	seq_printf(s, "MAC_PFC_PRI_EN: %#x\n", le32_to_cpu(desc[0].data[3]));</div><div class='add'>+	seq_printf(s, "IGU_PRI_MAP_TC_CFG: %#x\n",</div><div class='add'>+		   le32_to_cpu(desc[0].data[4]));</div><div class='add'>+	seq_printf(s, "IGU_TX_PRI_MAP_TC_CFG: %#x\n",</div><div class='add'>+		   le32_to_cpu(desc[0].data[5]));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_dcb(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_dcb(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	int pos = 0;</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_dcb_qset(hdev, buf, len, &amp;pos);</div><div class='add'>+	ret = hclge_dbg_dump_dcb_qset(hdev, s);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_dcb_pri(hdev, buf, len, &amp;pos);</div><div class='add'>+	ret = hclge_dbg_dump_dcb_pri(hdev, s);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_dcb_pg(hdev, buf, len, &amp;pos);</div><div class='add'>+	ret = hclge_dbg_dump_dcb_pg(hdev, s);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_dcb_queue(hdev, buf, len, &amp;pos);</div><div class='add'>+	ret = hclge_dbg_dump_dcb_queue(hdev, s);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_dcb_port(hdev, buf, len, &amp;pos);</div><div class='add'>+	ret = hclge_dbg_dump_dcb_port(hdev, s);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return hclge_dbg_dump_dcb_tm(hdev, buf, len, &amp;pos);</div><div class='add'>+	return hclge_dbg_dump_dcb_tm(hdev, s);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev,</div><div class='del'>-				  enum hnae3_dbg_cmd cmd, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_reg_cmd(enum hnae3_dbg_cmd cmd, struct seq_file *s)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	const struct hclge_dbg_reg_type_info *reg_info;</div><div class='del'>-	int pos = 0, ret = 0;</div><div class='del'>-	int i;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(hclge_dbg_reg_info); i++) {</div><div class='ctx'> 		reg_info = &amp;hclge_dbg_reg_info[i];</div><div class='ctx'> 		if (cmd == reg_info-&gt;cmd) {</div><div class='ctx'> 			if (cmd == HNAE3_DBG_CMD_REG_TQP)</div><div class='del'>-				return hclge_dbg_dump_reg_tqp(hdev, reg_info,</div><div class='del'>-							      buf, len, &amp;pos);</div><div class='add'>+				return hclge_dbg_dump_reg_tqp(hdev,</div><div class='add'>+							      reg_info, s);</div><div class='ctx'> </div><div class='del'>-			ret = hclge_dbg_dump_reg_common(hdev, reg_info, buf,</div><div class='del'>-							len, &amp;pos);</div><div class='add'>+			ret = hclge_dbg_dump_reg_common(hdev, reg_info, s);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1298,12 +1221,57 @@ static int hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_tc(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_bios_reg_cmd(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_BIOS_COMMON, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hclge_dbg_dump_ssu_reg_cmd(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_SSU, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hclge_dbg_dump_igu_egu_reg_cmd(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_IGU_EGU, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hclge_dbg_dump_rpu_reg_cmd(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_RPU, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hclge_dbg_dump_ncsi_reg_cmd(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_NCSI, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hclge_dbg_dump_rtc_reg_cmd(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_RTC, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hclge_dbg_dump_ppp_reg_cmd(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_PPP, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hclge_dbg_dump_rcb_reg_cmd(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_RCB, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hclge_dbg_dump_tqp_reg_cmd(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_TQP, s);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hclge_dbg_dump_tc(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_ets_tc_weight_cmd *ets_weight;</div><div class='add'>+	const char *sch_mode_str;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='del'>-	char *sch_mode_str;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u8 i;</div><div class='ctx'> </div><div class='hunk'>@@ -1323,72 +1291,37 @@ static int hclge_dbg_dump_tc(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> </div><div class='ctx'> 	ets_weight = (struct hclge_ets_tc_weight_cmd *)desc.data;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "enabled tc number: %u\n",</div><div class='del'>-			 hdev-&gt;tm_info.num_tc);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "weight_offset: %u\n",</div><div class='del'>-			 ets_weight-&gt;weight_offset);</div><div class='add'>+	seq_printf(s, "enabled tc number: %u\n", hdev-&gt;tm_info.num_tc);</div><div class='add'>+	seq_printf(s, "weight_offset: %u\n", ets_weight-&gt;weight_offset);</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "TC    MODE  WEIGHT\n");</div><div class='add'>+	seq_puts(s, "TC    MODE  WEIGHT\n");</div><div class='ctx'> 	for (i = 0; i &lt; HNAE3_MAX_TC; i++) {</div><div class='ctx'> 		sch_mode_str = ets_weight-&gt;tc_weight[i] ? "dwrr" : "sp";</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%u     %4s    %3u\n",</div><div class='del'>-				 i, sch_mode_str, ets_weight-&gt;tc_weight[i]);</div><div class='add'>+		seq_printf(s, "%u     %4s    %3u\n", i, sch_mode_str,</div><div class='add'>+			   ets_weight-&gt;tc_weight[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hclge_dbg_item tm_pg_items[] = {</div><div class='del'>-	{ "ID", 2 },</div><div class='del'>-	{ "PRI_MAP", 2 },</div><div class='del'>-	{ "MODE", 2 },</div><div class='del'>-	{ "DWRR", 2 },</div><div class='del'>-	{ "C_IR_B", 2 },</div><div class='del'>-	{ "C_IR_U", 2 },</div><div class='del'>-	{ "C_IR_S", 2 },</div><div class='del'>-	{ "C_BS_B", 2 },</div><div class='del'>-	{ "C_BS_S", 2 },</div><div class='del'>-	{ "C_FLAG", 2 },</div><div class='del'>-	{ "C_RATE(Mbps)", 2 },</div><div class='del'>-	{ "P_IR_B", 2 },</div><div class='del'>-	{ "P_IR_U", 2 },</div><div class='del'>-	{ "P_IR_S", 2 },</div><div class='del'>-	{ "P_BS_B", 2 },</div><div class='del'>-	{ "P_BS_S", 2 },</div><div class='del'>-	{ "P_FLAG", 2 },</div><div class='del'>-	{ "P_RATE(Mbps)", 0 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void hclge_dbg_fill_shaper_content(struct hclge_tm_shaper_para *para,</div><div class='del'>-					  char **result, u8 *index)</div><div class='add'>+static void hclge_dbg_fill_shaper_content(struct seq_file *s,</div><div class='add'>+					  struct hclge_tm_shaper_para *para)</div><div class='ctx'> {</div><div class='del'>-	sprintf(result[(*index)++], "%3u", para-&gt;ir_b);</div><div class='del'>-	sprintf(result[(*index)++], "%3u", para-&gt;ir_u);</div><div class='del'>-	sprintf(result[(*index)++], "%3u", para-&gt;ir_s);</div><div class='del'>-	sprintf(result[(*index)++], "%3u", para-&gt;bs_b);</div><div class='del'>-	sprintf(result[(*index)++], "%3u", para-&gt;bs_s);</div><div class='del'>-	sprintf(result[(*index)++], "%3u", para-&gt;flag);</div><div class='del'>-	sprintf(result[(*index)++], "%6u", para-&gt;rate);</div><div class='add'>+	seq_printf(s, "%-8u%-8u%-8u%-8u%-8u%-8u%-14u", para-&gt;ir_b, para-&gt;ir_u,</div><div class='add'>+		   para-&gt;ir_s, para-&gt;bs_b, para-&gt;bs_s, para-&gt;flag, para-&gt;rate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __hclge_dbg_dump_tm_pg(struct hclge_dev *hdev, char *data_str,</div><div class='del'>-				  char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_tm_pg(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_tm_shaper_para c_shaper_para, p_shaper_para;</div><div class='del'>-	char *result[ARRAY_SIZE(tm_pg_items)], *sch_mode_str;</div><div class='del'>-	u8 pg_id, sch_mode, weight, pri_bit_map, i, j;</div><div class='del'>-	char content[HCLGE_DBG_TM_INFO_LEN];</div><div class='del'>-	int pos = 0;</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='add'>+	u8 pg_id, sch_mode, weight, pri_bit_map;</div><div class='add'>+	const char *sch_mode_str;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(tm_pg_items); i++) {</div><div class='del'>-		result[i] = data_str;</div><div class='del'>-		data_str += HCLGE_DBG_DATA_STR_LEN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	hclge_dbg_fill_content(content, sizeof(content), tm_pg_items,</div><div class='del'>-			       NULL, ARRAY_SIZE(tm_pg_items));</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+	seq_puts(s, "ID  PRI_MAP  MODE  DWRR  C_IR_B  C_IR_U  C_IR_S  C_BS_B  ");</div><div class='add'>+	seq_puts(s, "C_BS_S  C_FLAG  C_RATE(Mbps)  P_IR_B  P_IR_U  P_IR_S  ");</div><div class='add'>+	seq_puts(s, "P_BS_B  P_BS_S  P_FLAG  P_RATE(Mbps)\n");</div><div class='ctx'> </div><div class='ctx'> 	for (pg_id = 0; pg_id &lt; hdev-&gt;tm_info.num_pg; pg_id++) {</div><div class='ctx'> 		ret = hclge_tm_get_pg_to_pri_map(hdev, pg_id, &amp;pri_bit_map);</div><div class='hunk'>@@ -1418,68 +1351,41 @@ static int __hclge_dbg_dump_tm_pg(struct hclge_dev *hdev, char *data_str,</div><div class='ctx'> 		sch_mode_str = sch_mode &amp; HCLGE_TM_TX_SCHD_DWRR_MSK ? "dwrr" :</div><div class='ctx'> 				       "sp";</div><div class='ctx'> </div><div class='del'>-		j = 0;</div><div class='del'>-		sprintf(result[j++], "%02u", pg_id);</div><div class='del'>-		sprintf(result[j++], "0x%02x", pri_bit_map);</div><div class='del'>-		sprintf(result[j++], "%4s", sch_mode_str);</div><div class='del'>-		sprintf(result[j++], "%3u", weight);</div><div class='del'>-		hclge_dbg_fill_shaper_content(&amp;c_shaper_para, result, &amp;j);</div><div class='del'>-		hclge_dbg_fill_shaper_content(&amp;p_shaper_para, result, &amp;j);</div><div class='del'>-</div><div class='del'>-		hclge_dbg_fill_content(content, sizeof(content), tm_pg_items,</div><div class='del'>-				       (const char **)result,</div><div class='del'>-				       ARRAY_SIZE(tm_pg_items));</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+		seq_printf(s, "%02u  0x%-7x%-6s%-6u", pg_id, pri_bit_map,</div><div class='add'>+			   sch_mode_str, weight);</div><div class='add'>+		hclge_dbg_fill_shaper_content(s, &amp;c_shaper_para);</div><div class='add'>+		hclge_dbg_fill_shaper_content(s, &amp;p_shaper_para);</div><div class='add'>+		seq_puts(s, "\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_tm_pg(struct hclge_dev *hdev, char *buf, int len)</div><div class='del'>-{</div><div class='del'>-	char *data_str;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	data_str = kcalloc(ARRAY_SIZE(tm_pg_items),</div><div class='del'>-			   HCLGE_DBG_DATA_STR_LEN, GFP_KERNEL);</div><div class='del'>-	if (!data_str)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ret = __hclge_dbg_dump_tm_pg(hdev, data_str, buf, len);</div><div class='del'>-</div><div class='del'>-	kfree(data_str);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hclge_dbg_dump_tm_port(struct hclge_dev *hdev,  char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_tm_port(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_tm_shaper_para shaper_para;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_tm_get_port_shaper(hdev, &amp;shaper_para);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "IR_B  IR_U  IR_S  BS_B  BS_S  FLAG  RATE(Mbps)\n");</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "%3u   %3u   %3u   %3u   %3u     %1u   %6u\n",</div><div class='del'>-			 shaper_para.ir_b, shaper_para.ir_u, shaper_para.ir_s,</div><div class='del'>-			 shaper_para.bs_b, shaper_para.bs_s, shaper_para.flag,</div><div class='del'>-			 shaper_para.rate);</div><div class='add'>+	seq_puts(s, "IR_B  IR_U  IR_S  BS_B  BS_S  FLAG  RATE(Mbps)\n");</div><div class='add'>+	seq_printf(s, "%3u   %3u   %3u   %3u   %3u     %1u   %6u\n",</div><div class='add'>+		   shaper_para.ir_b, shaper_para.ir_u, shaper_para.ir_s,</div><div class='add'>+		   shaper_para.bs_b, shaper_para.bs_s, shaper_para.flag,</div><div class='add'>+		   shaper_para.rate);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hclge_dbg_dump_tm_bp_qset_map(struct hclge_dev *hdev, u8 tc_id,</div><div class='del'>-					 char *buf, int len)</div><div class='add'>+					 struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	u32 qset_mapping[HCLGE_BP_EXT_GRP_NUM];</div><div class='ctx'> 	struct hclge_bp_to_qs_map_cmd *map;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u8 group_id;</div><div class='ctx'> 	u8 grp_num;</div><div class='ctx'> 	u16 i = 0;</div><div class='hunk'>@@ -1505,27 +1411,27 @@ static int hclge_dbg_dump_tm_bp_qset_map(struct hclge_dev *hdev, u8 tc_id,</div><div class='ctx'> 		qset_mapping[group_id] = le32_to_cpu(map-&gt;qs_bit_map);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "INDEX | TM BP QSET MAPPING:\n");</div><div class='add'>+	seq_puts(s, "INDEX | TM BP QSET MAPPING:\n");</div><div class='ctx'> 	for (group_id = 0; group_id &lt; grp_num / 8; group_id++) {</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "%04d  | %08x:%08x:%08x:%08x:%08x:%08x:%08x:%08x\n",</div><div class='del'>-			 group_id * 256, qset_mapping[i + 7],</div><div class='del'>-			 qset_mapping[i + 6], qset_mapping[i + 5],</div><div class='del'>-			 qset_mapping[i + 4], qset_mapping[i + 3],</div><div class='del'>-			 qset_mapping[i + 2], qset_mapping[i + 1],</div><div class='del'>-			 qset_mapping[i]);</div><div class='add'>+		seq_printf(s,</div><div class='add'>+			   "%04d  | %08x:%08x:%08x:%08x:%08x:%08x:%08x:%08x\n",</div><div class='add'>+			   group_id * 256, qset_mapping[i + 7],</div><div class='add'>+			   qset_mapping[i + 6], qset_mapping[i + 5],</div><div class='add'>+			   qset_mapping[i + 4], qset_mapping[i + 3],</div><div class='add'>+			   qset_mapping[i + 2], qset_mapping[i + 1],</div><div class='add'>+			   qset_mapping[i]);</div><div class='ctx'> 		i += 8;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return pos;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_tm_map(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_tm_map(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	u16 queue_id;</div><div class='ctx'> 	u16 qset_id;</div><div class='ctx'> 	u8 link_vld;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u8 pri_id;</div><div class='ctx'> 	u8 tc_id;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1544,32 +1450,28 @@ static int hclge_dbg_dump_tm_map(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-				 "QUEUE_ID   QSET_ID   PRI_ID   TC_ID\n");</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-				 "%04u        %4u       %3u      %2u\n",</div><div class='del'>-				 queue_id, qset_id, pri_id, tc_id);</div><div class='add'>+		seq_puts(s, "QUEUE_ID   QSET_ID   PRI_ID   TC_ID\n");</div><div class='add'>+		seq_printf(s, "%04u        %4u       %3u      %2u\n",</div><div class='add'>+			   queue_id, qset_id, pri_id, tc_id);</div><div class='ctx'> </div><div class='ctx'> 		if (!hnae3_dev_dcb_supported(hdev))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		ret = hclge_dbg_dump_tm_bp_qset_map(hdev, tc_id, buf + pos,</div><div class='del'>-						    len - pos);</div><div class='add'>+		ret = hclge_dbg_dump_tm_bp_qset_map(hdev, tc_id, s);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='del'>-		pos += ret;</div><div class='ctx'> </div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "\n");</div><div class='add'>+		seq_puts(s, "\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_tm_nodes(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_tm_nodes(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_tm_nodes_cmd *nodes;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	hclge_cmd_setup_basic_desc(&amp;desc, HCLGE_OPC_TM_NODES, true);</div><div class='hunk'>@@ -1582,65 +1484,36 @@ static int hclge_dbg_dump_tm_nodes(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> </div><div class='ctx'> 	nodes = (struct hclge_tm_nodes_cmd *)desc.data;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "       BASE_ID  MAX_NUM\n");</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "PG      %4u      %4u\n",</div><div class='del'>-			 nodes-&gt;pg_base_id, nodes-&gt;pg_num);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "PRI     %4u      %4u\n",</div><div class='del'>-			 nodes-&gt;pri_base_id, nodes-&gt;pri_num);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "QSET    %4u      %4u\n",</div><div class='del'>-			 le16_to_cpu(nodes-&gt;qset_base_id),</div><div class='del'>-			 le16_to_cpu(nodes-&gt;qset_num));</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "QUEUE   %4u      %4u\n",</div><div class='del'>-			 le16_to_cpu(nodes-&gt;queue_base_id),</div><div class='del'>-			 le16_to_cpu(nodes-&gt;queue_num));</div><div class='add'>+	seq_puts(s, "       BASE_ID  MAX_NUM\n");</div><div class='add'>+	seq_printf(s, "PG      %4u      %4u\n", nodes-&gt;pg_base_id,</div><div class='add'>+		   nodes-&gt;pg_num);</div><div class='add'>+	seq_printf(s, "PRI     %4u      %4u\n", nodes-&gt;pri_base_id,</div><div class='add'>+		   nodes-&gt;pri_num);</div><div class='add'>+	seq_printf(s, "QSET    %4u      %4u\n",</div><div class='add'>+		   le16_to_cpu(nodes-&gt;qset_base_id),</div><div class='add'>+		   le16_to_cpu(nodes-&gt;qset_num));</div><div class='add'>+	seq_printf(s, "QUEUE   %4u      %4u\n",</div><div class='add'>+		   le16_to_cpu(nodes-&gt;queue_base_id),</div><div class='add'>+		   le16_to_cpu(nodes-&gt;queue_num));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hclge_dbg_item tm_pri_items[] = {</div><div class='del'>-	{ "ID", 4 },</div><div class='del'>-	{ "MODE", 2 },</div><div class='del'>-	{ "DWRR", 2 },</div><div class='del'>-	{ "C_IR_B", 2 },</div><div class='del'>-	{ "C_IR_U", 2 },</div><div class='del'>-	{ "C_IR_S", 2 },</div><div class='del'>-	{ "C_BS_B", 2 },</div><div class='del'>-	{ "C_BS_S", 2 },</div><div class='del'>-	{ "C_FLAG", 2 },</div><div class='del'>-	{ "C_RATE(Mbps)", 2 },</div><div class='del'>-	{ "P_IR_B", 2 },</div><div class='del'>-	{ "P_IR_U", 2 },</div><div class='del'>-	{ "P_IR_S", 2 },</div><div class='del'>-	{ "P_BS_B", 2 },</div><div class='del'>-	{ "P_BS_S", 2 },</div><div class='del'>-	{ "P_FLAG", 2 },</div><div class='del'>-	{ "P_RATE(Mbps)", 0 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int hclge_dbg_dump_tm_pri(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_tm_pri(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_tm_shaper_para c_shaper_para, p_shaper_para;</div><div class='del'>-	char *result[ARRAY_SIZE(tm_pri_items)], *sch_mode_str;</div><div class='del'>-	char content[HCLGE_DBG_TM_INFO_LEN];</div><div class='del'>-	u8 pri_num, sch_mode, weight, i, j;</div><div class='del'>-	char *data_str;</div><div class='del'>-	int pos, ret;</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='add'>+	u8 pri_num, sch_mode, weight, i;</div><div class='add'>+	const char *sch_mode_str;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_tm_get_pri_num(hdev, &amp;pri_num);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	data_str = kcalloc(ARRAY_SIZE(tm_pri_items), HCLGE_DBG_DATA_STR_LEN,</div><div class='del'>-			   GFP_KERNEL);</div><div class='del'>-	if (!data_str)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(tm_pri_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i * HCLGE_DBG_DATA_STR_LEN];</div><div class='del'>-</div><div class='del'>-	hclge_dbg_fill_content(content, sizeof(content), tm_pri_items,</div><div class='del'>-			       NULL, ARRAY_SIZE(tm_pri_items));</div><div class='del'>-	pos = scnprintf(buf, len, "%s", content);</div><div class='add'>+	seq_puts(s, "ID  MODE  DWRR  C_IR_B  C_IR_U  C_IR_S  C_BS_B  ");</div><div class='add'>+	seq_puts(s, "C_BS_S  C_FLAG  C_RATE(Mbps)  P_IR_B  P_IR_U  P_IR_S  ");</div><div class='add'>+	seq_puts(s, "P_BS_B  P_BS_S  P_FLAG  P_RATE(Mbps)\n");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pri_num; i++) {</div><div class='ctx'> 		ret = hclge_tm_get_pri_sch_mode(hdev, i, &amp;sch_mode);</div><div class='hunk'>@@ -1666,59 +1539,31 @@ static int hclge_dbg_dump_tm_pri(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 		sch_mode_str = sch_mode &amp; HCLGE_TM_TX_SCHD_DWRR_MSK ? "dwrr" :</div><div class='ctx'> 			       "sp";</div><div class='ctx'> </div><div class='del'>-		j = 0;</div><div class='del'>-		sprintf(result[j++], "%04u", i);</div><div class='del'>-		sprintf(result[j++], "%4s", sch_mode_str);</div><div class='del'>-		sprintf(result[j++], "%3u", weight);</div><div class='del'>-		hclge_dbg_fill_shaper_content(&amp;c_shaper_para, result, &amp;j);</div><div class='del'>-		hclge_dbg_fill_shaper_content(&amp;p_shaper_para, result, &amp;j);</div><div class='del'>-		hclge_dbg_fill_content(content, sizeof(content), tm_pri_items,</div><div class='del'>-				       (const char **)result,</div><div class='del'>-				       ARRAY_SIZE(tm_pri_items));</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+		seq_printf(s, "%04u  %-6s%-6u", i, sch_mode_str, weight);</div><div class='add'>+		hclge_dbg_fill_shaper_content(s, &amp;c_shaper_para);</div><div class='add'>+		hclge_dbg_fill_shaper_content(s, &amp;p_shaper_para);</div><div class='add'>+		seq_puts(s, "\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	kfree(data_str);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hclge_dbg_item tm_qset_items[] = {</div><div class='del'>-	{ "ID", 4 },</div><div class='del'>-	{ "MAP_PRI", 2 },</div><div class='del'>-	{ "LINK_VLD", 2 },</div><div class='del'>-	{ "MODE", 2 },</div><div class='del'>-	{ "DWRR", 2 },</div><div class='del'>-	{ "IR_B", 2 },</div><div class='del'>-	{ "IR_U", 2 },</div><div class='del'>-	{ "IR_S", 2 },</div><div class='del'>-	{ "BS_B", 2 },</div><div class='del'>-	{ "BS_S", 2 },</div><div class='del'>-	{ "FLAG", 2 },</div><div class='del'>-	{ "RATE(Mbps)", 0 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int hclge_dbg_dump_tm_qset(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_tm_qset(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	char data_str[ARRAY_SIZE(tm_qset_items)][HCLGE_DBG_DATA_STR_LEN];</div><div class='del'>-	char *result[ARRAY_SIZE(tm_qset_items)], *sch_mode_str;</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	u8 priority, link_vld, sch_mode, weight;</div><div class='ctx'> 	struct hclge_tm_shaper_para shaper_para;</div><div class='del'>-	char content[HCLGE_DBG_TM_INFO_LEN];</div><div class='add'>+	const char *sch_mode_str;</div><div class='ctx'> 	u16 qset_num, i;</div><div class='del'>-	int ret, pos;</div><div class='del'>-	u8 j;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_tm_get_qset_num(hdev, &amp;qset_num);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(tm_qset_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i][0];</div><div class='del'>-</div><div class='del'>-	hclge_dbg_fill_content(content, sizeof(content), tm_qset_items,</div><div class='del'>-			       NULL, ARRAY_SIZE(tm_qset_items));</div><div class='del'>-	pos = scnprintf(buf, len, "%s", content);</div><div class='add'>+	seq_puts(s, "ID    MAP_PRI  LINK_VLD  MODE  DWRR  IR_B  IR_U  IR_S  ");</div><div class='add'>+	seq_puts(s, "BS_B  BS_S  FLAG  RATE(Mbps)\n");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; qset_num; i++) {</div><div class='ctx'> 		ret = hclge_tm_get_qset_map_pri(hdev, i, &amp;priority, &amp;link_vld);</div><div class='hunk'>@@ -1740,29 +1585,22 @@ static int hclge_dbg_dump_tm_qset(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 		sch_mode_str = sch_mode &amp; HCLGE_TM_TX_SCHD_DWRR_MSK ? "dwrr" :</div><div class='ctx'> 			       "sp";</div><div class='ctx'> </div><div class='del'>-		j = 0;</div><div class='del'>-		sprintf(result[j++], "%04u", i);</div><div class='del'>-		sprintf(result[j++], "%4u", priority);</div><div class='del'>-		sprintf(result[j++], "%4u", link_vld);</div><div class='del'>-		sprintf(result[j++], "%4s", sch_mode_str);</div><div class='del'>-		sprintf(result[j++], "%3u", weight);</div><div class='del'>-		hclge_dbg_fill_shaper_content(&amp;shaper_para, result, &amp;j);</div><div class='del'>-</div><div class='del'>-		hclge_dbg_fill_content(content, sizeof(content), tm_qset_items,</div><div class='del'>-				       (const char **)result,</div><div class='del'>-				       ARRAY_SIZE(tm_qset_items));</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+		seq_printf(s, "%04u  %-9u%-10u%-6s%-6u", i, priority, link_vld,</div><div class='add'>+			   sch_mode_str, weight);</div><div class='add'>+		seq_printf(s, "%-6u%-6u%-6u%-6u%-6u%-6u%-14u\n",</div><div class='add'>+			   shaper_para.ir_b, shaper_para.ir_u, shaper_para.ir_s,</div><div class='add'>+			   shaper_para.bs_b, shaper_para.bs_s, shaper_para.flag,</div><div class='add'>+			   shaper_para.rate);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_qos_pause_cfg(struct hclge_dev *hdev, char *buf,</div><div class='del'>-					int len)</div><div class='add'>+static int hclge_dbg_dump_qos_pause_cfg(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_cfg_pause_param_cmd *pause_param;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	hclge_cmd_setup_basic_desc(&amp;desc, HCLGE_OPC_CFG_MAC_PARA, true);</div><div class='hunk'>@@ -1775,23 +1613,21 @@ static int hclge_dbg_dump_qos_pause_cfg(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> </div><div class='ctx'> 	pause_param = (struct hclge_cfg_pause_param_cmd *)desc.data;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "pause_trans_gap: 0x%x\n",</div><div class='del'>-			 pause_param-&gt;pause_trans_gap);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "pause_trans_time: 0x%x\n",</div><div class='del'>-			 le16_to_cpu(pause_param-&gt;pause_trans_time));</div><div class='add'>+	seq_printf(s, "pause_trans_gap: 0x%x\n", pause_param-&gt;pause_trans_gap);</div><div class='add'>+	seq_printf(s, "pause_trans_time: 0x%x\n",</div><div class='add'>+		   le16_to_cpu(pause_param-&gt;pause_trans_time));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define HCLGE_DBG_TC_MASK		0x0F</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev, char *buf,</div><div class='del'>-				      int len)</div><div class='add'>+static int hclge_dbg_dump_qos_pri_map(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='ctx'> #define HCLGE_DBG_TC_BIT_WIDTH		4</div><div class='ctx'> </div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_qos_pri_map_cmd *pri_map;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u8 *pri_tc;</div><div class='ctx'> 	u8 tc, i;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1806,33 +1642,33 @@ static int hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> </div><div class='ctx'> 	pri_map = (struct hclge_qos_pri_map_cmd *)desc.data;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "vlan_to_pri: 0x%x\n",</div><div class='del'>-			 pri_map-&gt;vlan_pri);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "PRI  TC\n");</div><div class='add'>+	seq_printf(s, "vlan_to_pri: 0x%x\n", pri_map-&gt;vlan_pri);</div><div class='add'>+	seq_puts(s, "PRI  TC\n");</div><div class='ctx'> </div><div class='ctx'> 	pri_tc = (u8 *)pri_map;</div><div class='ctx'> 	for (i = 0; i &lt; HNAE3_MAX_TC; i++) {</div><div class='ctx'> 		tc = pri_tc[i &gt;&gt; 1] &gt;&gt; ((i &amp; 1) * HCLGE_DBG_TC_BIT_WIDTH);</div><div class='ctx'> 		tc &amp;= HCLGE_DBG_TC_MASK;</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%u     %u\n", i, tc);</div><div class='add'>+		seq_printf(s, "%u     %u\n", i, tc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_qos_dscp_map(struct hclge_dev *hdev, char *buf,</div><div class='del'>-				       int len)</div><div class='add'>+static int hclge_dbg_dump_qos_dscp_map(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct hnae3_knic_private_info *kinfo = &amp;hdev-&gt;vport[0].nic.kinfo;</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_desc desc[HCLGE_DSCP_MAP_TC_BD_NUM];</div><div class='add'>+	struct hnae3_knic_private_info *kinfo;</div><div class='ctx'> 	u8 *req0 = (u8 *)desc[0].data;</div><div class='ctx'> 	u8 *req1 = (u8 *)desc[1].data;</div><div class='ctx'> 	u8 dscp_tc[HNAE3_MAX_DSCP];</div><div class='del'>-	int pos, ret;</div><div class='add'>+	int ret;</div><div class='ctx'> 	u8 i, j;</div><div class='ctx'> </div><div class='del'>-	pos = scnprintf(buf, len, "tc map mode: %s\n",</div><div class='del'>-			tc_map_mode_str[kinfo-&gt;tc_map_mode]);</div><div class='add'>+	kinfo = &amp;hdev-&gt;vport[0].nic.kinfo;</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "tc map mode: %s\n", tc_map_mode_str[kinfo-&gt;tc_map_mode]);</div><div class='ctx'> </div><div class='ctx'> 	if (kinfo-&gt;tc_map_mode != HNAE3_TC_MAP_MODE_DSCP)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1847,7 +1683,7 @@ static int hclge_dbg_dump_qos_dscp_map(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "\nDSCP  PRIO  TC\n");</div><div class='add'>+	seq_puts(s, "\nDSCP  PRIO  TC\n");</div><div class='ctx'> </div><div class='ctx'> 	/* The low 32 dscp setting use bd0, high 32 dscp setting use bd1 */</div><div class='ctx'> 	for (i = 0; i &lt; HNAE3_MAX_DSCP / HCLGE_DSCP_MAP_TC_BD_NUM; i++) {</div><div class='hunk'>@@ -1865,18 +1701,17 @@ static int hclge_dbg_dump_qos_dscp_map(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> 		if (kinfo-&gt;dscp_prio[i] == HNAE3_PRIO_ID_INVALID)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, " %2u    %u    %u\n",</div><div class='del'>-				 i, kinfo-&gt;dscp_prio[i], dscp_tc[i]);</div><div class='add'>+		seq_printf(s, " %2u    %u    %u\n", i, kinfo-&gt;dscp_prio[i],</div><div class='add'>+			   dscp_tc[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_tx_buf_cfg(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_tx_buf_cfg(struct hclge_dev *hdev, struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_tx_buff_alloc_cmd *tx_buf_cmd;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	hclge_cmd_setup_basic_desc(&amp;desc, HCLGE_OPC_TX_BUFF_ALLOC, true);</div><div class='hunk'>@@ -1889,19 +1724,17 @@ static int hclge_dbg_dump_tx_buf_cfg(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> </div><div class='ctx'> 	tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc.data;</div><div class='ctx'> 	for (i = 0; i &lt; HCLGE_MAX_TC_NUM; i++)</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-				 "tx_packet_buf_tc_%d: 0x%x\n", i,</div><div class='del'>-				 le16_to_cpu(tx_buf_cmd-&gt;tx_pkt_buff[i]));</div><div class='add'>+		seq_printf(s, "tx_packet_buf_tc_%d: 0x%x\n", i,</div><div class='add'>+			   le16_to_cpu(tx_buf_cmd-&gt;tx_pkt_buff[i]));</div><div class='ctx'> </div><div class='del'>-	return pos;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_rx_priv_buf_cfg(struct hclge_dev *hdev, char *buf,</div><div class='del'>-					  int len)</div><div class='add'>+static int hclge_dbg_dump_rx_priv_buf_cfg(struct hclge_dev *hdev,</div><div class='add'>+					  struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_rx_priv_buff_cmd *rx_buf_cmd;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	hclge_cmd_setup_basic_desc(&amp;desc, HCLGE_OPC_RX_PRIV_BUFF_ALLOC, true);</div><div class='hunk'>@@ -1912,26 +1745,24 @@ static int hclge_dbg_dump_rx_priv_buf_cfg(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "\n");</div><div class='add'>+	seq_puts(s, "\n");</div><div class='ctx'> </div><div class='ctx'> 	rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc.data;</div><div class='ctx'> 	for (i = 0; i &lt; HCLGE_MAX_TC_NUM; i++)</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-				 "rx_packet_buf_tc_%d: 0x%x\n", i,</div><div class='del'>-				 le16_to_cpu(rx_buf_cmd-&gt;buf_num[i]));</div><div class='add'>+		seq_printf(s, "rx_packet_buf_tc_%d: 0x%x\n", i,</div><div class='add'>+			   le16_to_cpu(rx_buf_cmd-&gt;buf_num[i]));</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "rx_share_buf: 0x%x\n",</div><div class='del'>-			 le16_to_cpu(rx_buf_cmd-&gt;shared_buf));</div><div class='add'>+	seq_printf(s, "rx_share_buf: 0x%x\n",</div><div class='add'>+		   le16_to_cpu(rx_buf_cmd-&gt;shared_buf));</div><div class='ctx'> </div><div class='del'>-	return pos;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_rx_common_wl_cfg(struct hclge_dev *hdev, char *buf,</div><div class='del'>-					   int len)</div><div class='add'>+static int hclge_dbg_dump_rx_common_wl_cfg(struct hclge_dev *hdev,</div><div class='add'>+					   struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_rx_com_wl *rx_com_wl;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	hclge_cmd_setup_basic_desc(&amp;desc, HCLGE_OPC_RX_COM_WL_ALLOC, true);</div><div class='hunk'>@@ -1943,21 +1774,19 @@ static int hclge_dbg_dump_rx_common_wl_cfg(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rx_com_wl = (struct hclge_rx_com_wl *)desc.data;</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "\n");</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "rx_com_wl: high: 0x%x, low: 0x%x\n",</div><div class='del'>-			 le16_to_cpu(rx_com_wl-&gt;com_wl.high),</div><div class='del'>-			 le16_to_cpu(rx_com_wl-&gt;com_wl.low));</div><div class='add'>+	seq_puts(s, "\n");</div><div class='add'>+	seq_printf(s, "rx_com_wl: high: 0x%x, low: 0x%x\n",</div><div class='add'>+		   le16_to_cpu(rx_com_wl-&gt;com_wl.high),</div><div class='add'>+		   le16_to_cpu(rx_com_wl-&gt;com_wl.low));</div><div class='ctx'> </div><div class='del'>-	return pos;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_rx_global_pkt_cnt(struct hclge_dev *hdev, char *buf,</div><div class='del'>-					    int len)</div><div class='add'>+static int hclge_dbg_dump_rx_global_pkt_cnt(struct hclge_dev *hdev,</div><div class='add'>+					    struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_rx_com_wl *rx_packet_cnt;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	hclge_cmd_setup_basic_desc(&amp;desc, HCLGE_OPC_RX_GBL_PKT_CNT, true);</div><div class='hunk'>@@ -1969,20 +1798,18 @@ static int hclge_dbg_dump_rx_global_pkt_cnt(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rx_packet_cnt = (struct hclge_rx_com_wl *)desc.data;</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "rx_global_packet_cnt: high: 0x%x, low: 0x%x\n",</div><div class='del'>-			 le16_to_cpu(rx_packet_cnt-&gt;com_wl.high),</div><div class='del'>-			 le16_to_cpu(rx_packet_cnt-&gt;com_wl.low));</div><div class='add'>+	seq_printf(s, "rx_global_packet_cnt: high: 0x%x, low: 0x%x\n",</div><div class='add'>+		   le16_to_cpu(rx_packet_cnt-&gt;com_wl.high),</div><div class='add'>+		   le16_to_cpu(rx_packet_cnt-&gt;com_wl.low));</div><div class='ctx'> </div><div class='del'>-	return pos;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_rx_priv_wl_buf_cfg(struct hclge_dev *hdev, char *buf,</div><div class='del'>-					     int len)</div><div class='add'>+static int hclge_dbg_dump_rx_priv_wl_buf_cfg(struct hclge_dev *hdev,</div><div class='add'>+					     struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_rx_priv_wl_buf *rx_priv_wl;</div><div class='ctx'> 	struct hclge_desc desc[2];</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	hclge_cmd_setup_basic_desc(&amp;desc[0], HCLGE_OPC_RX_PRIV_WL_ALLOC, true);</div><div class='hunk'>@@ -1997,28 +1824,25 @@ static int hclge_dbg_dump_rx_priv_wl_buf_cfg(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> </div><div class='ctx'> 	rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[0].data;</div><div class='ctx'> 	for (i = 0; i &lt; HCLGE_TC_NUM_ONE_DESC; i++)</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", i,</div><div class='del'>-			 le16_to_cpu(rx_priv_wl-&gt;tc_wl[i].high),</div><div class='del'>-			 le16_to_cpu(rx_priv_wl-&gt;tc_wl[i].low));</div><div class='add'>+		seq_printf(s, "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", i,</div><div class='add'>+			   le16_to_cpu(rx_priv_wl-&gt;tc_wl[i].high),</div><div class='add'>+			   le16_to_cpu(rx_priv_wl-&gt;tc_wl[i].low));</div><div class='ctx'> </div><div class='ctx'> 	rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[1].data;</div><div class='ctx'> 	for (i = 0; i &lt; HCLGE_TC_NUM_ONE_DESC; i++)</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n",</div><div class='del'>-			 i + HCLGE_TC_NUM_ONE_DESC,</div><div class='del'>-			 le16_to_cpu(rx_priv_wl-&gt;tc_wl[i].high),</div><div class='del'>-			 le16_to_cpu(rx_priv_wl-&gt;tc_wl[i].low));</div><div class='add'>+		seq_printf(s, "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n",</div><div class='add'>+			   i + HCLGE_TC_NUM_ONE_DESC,</div><div class='add'>+			   le16_to_cpu(rx_priv_wl-&gt;tc_wl[i].high),</div><div class='add'>+			   le16_to_cpu(rx_priv_wl-&gt;tc_wl[i].low));</div><div class='ctx'> </div><div class='del'>-	return pos;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hclge_dbg_dump_rx_common_threshold_cfg(struct hclge_dev *hdev,</div><div class='del'>-						  char *buf, int len)</div><div class='add'>+						  struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_rx_com_thrd *rx_com_thrd;</div><div class='ctx'> 	struct hclge_desc desc[2];</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	hclge_cmd_setup_basic_desc(&amp;desc[0], HCLGE_OPC_RX_COM_THRD_ALLOC, true);</div><div class='hunk'>@@ -2031,86 +1855,75 @@ static int hclge_dbg_dump_rx_common_threshold_cfg(struct hclge_dev *hdev,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "\n");</div><div class='add'>+	seq_puts(s, "\n");</div><div class='ctx'> 	rx_com_thrd = (struct hclge_rx_com_thrd *)desc[0].data;</div><div class='ctx'> 	for (i = 0; i &lt; HCLGE_TC_NUM_ONE_DESC; i++)</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n", i,</div><div class='del'>-			 le16_to_cpu(rx_com_thrd-&gt;com_thrd[i].high),</div><div class='del'>-			 le16_to_cpu(rx_com_thrd-&gt;com_thrd[i].low));</div><div class='add'>+		seq_printf(s, "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n", i,</div><div class='add'>+			   le16_to_cpu(rx_com_thrd-&gt;com_thrd[i].high),</div><div class='add'>+			   le16_to_cpu(rx_com_thrd-&gt;com_thrd[i].low));</div><div class='ctx'> </div><div class='ctx'> 	rx_com_thrd = (struct hclge_rx_com_thrd *)desc[1].data;</div><div class='ctx'> 	for (i = 0; i &lt; HCLGE_TC_NUM_ONE_DESC; i++)</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n",</div><div class='del'>-			 i + HCLGE_TC_NUM_ONE_DESC,</div><div class='del'>-			 le16_to_cpu(rx_com_thrd-&gt;com_thrd[i].high),</div><div class='del'>-			 le16_to_cpu(rx_com_thrd-&gt;com_thrd[i].low));</div><div class='add'>+		seq_printf(s, "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n",</div><div class='add'>+			   i + HCLGE_TC_NUM_ONE_DESC,</div><div class='add'>+			   le16_to_cpu(rx_com_thrd-&gt;com_thrd[i].high),</div><div class='add'>+			   le16_to_cpu(rx_com_thrd-&gt;com_thrd[i].low));</div><div class='ctx'> </div><div class='del'>-	return pos;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev, char *buf,</div><div class='del'>-				      int len)</div><div class='add'>+static int hclge_dbg_dump_qos_buf_cfg(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	int pos = 0;</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_tx_buf_cfg(hdev, buf + pos, len - pos);</div><div class='add'>+	ret = hclge_dbg_dump_tx_buf_cfg(hdev, s);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='del'>-	pos += ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_rx_priv_buf_cfg(hdev, buf + pos, len - pos);</div><div class='add'>+	ret = hclge_dbg_dump_rx_priv_buf_cfg(hdev, s);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='del'>-	pos += ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_rx_common_wl_cfg(hdev, buf + pos, len - pos);</div><div class='add'>+	ret = hclge_dbg_dump_rx_common_wl_cfg(hdev, s);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='del'>-	pos += ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_rx_global_pkt_cnt(hdev, buf + pos, len - pos);</div><div class='add'>+	ret = hclge_dbg_dump_rx_global_pkt_cnt(hdev, s);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='del'>-	pos += ret;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "\n");</div><div class='add'>+	seq_puts(s, "\n");</div><div class='ctx'> 	if (!hnae3_dev_dcb_supported(hdev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_rx_priv_wl_buf_cfg(hdev, buf + pos, len - pos);</div><div class='add'>+	ret = hclge_dbg_dump_rx_priv_wl_buf_cfg(hdev, s);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='del'>-	pos += ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_rx_common_threshold_cfg(hdev, buf + pos,</div><div class='del'>-						     len - pos);</div><div class='add'>+	ret = hclge_dbg_dump_rx_common_threshold_cfg(hdev, s);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_mng_table(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_mng_table(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_mac_ethertype_idx_rd_cmd *req0;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='ctx'> 	u32 msg_egress_port;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "entry  mac_addr          mask  ether  ");</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "mask  vlan  mask  i_map  i_dir  e_type  ");</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "pf_id  vf_id  q_id  drop\n");</div><div class='add'>+	seq_puts(s, "entry  mac_addr          mask  ether  ");</div><div class='add'>+	seq_puts(s, "mask  vlan  mask  i_map  i_dir  e_type  ");</div><div class='add'>+	seq_puts(s, "pf_id  vf_id  q_id  drop\n");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; HCLGE_DBG_MNG_TBL_MAX; i++) {</div><div class='ctx'> 		hclge_cmd_setup_basic_desc(&amp;desc, HCLGE_MAC_ETHERTYPE_IDX_RD,</div><div class='ctx'> 					   true);</div><div class='del'>-		req0 = (struct hclge_mac_ethertype_idx_rd_cmd *)&amp;desc.data;</div><div class='add'>+		req0 = (struct hclge_mac_ethertype_idx_rd_cmd *)desc.data;</div><div class='ctx'> 		req0-&gt;index = cpu_to_le16(i);</div><div class='ctx'> </div><div class='ctx'> 		ret = hclge_cmd_send(&amp;hdev-&gt;hw, &amp;desc, 1);</div><div class='hunk'>@@ -2123,46 +1936,40 @@ static int hclge_dbg_dump_mng_table(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 		if (!req0-&gt;resp_code)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%02u     %pM ",</div><div class='del'>-				 le16_to_cpu(req0-&gt;index), req0-&gt;mac_addr);</div><div class='add'>+		seq_printf(s, "%02u     %pM ",</div><div class='add'>+			   le16_to_cpu(req0-&gt;index), req0-&gt;mac_addr);</div><div class='ctx'> </div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-				 "%x     %04x   %x     %04x  ",</div><div class='del'>-				 !!(req0-&gt;flags &amp; HCLGE_DBG_MNG_MAC_MASK_B),</div><div class='del'>-				 le16_to_cpu(req0-&gt;ethter_type),</div><div class='del'>-				 !!(req0-&gt;flags &amp; HCLGE_DBG_MNG_ETHER_MASK_B),</div><div class='del'>-				 le16_to_cpu(req0-&gt;vlan_tag) &amp;</div><div class='del'>-				 HCLGE_DBG_MNG_VLAN_TAG);</div><div class='add'>+		seq_printf(s, "%x     %04x   %x     %04x  ",</div><div class='add'>+			   !!(req0-&gt;flags &amp; HCLGE_DBG_MNG_MAC_MASK_B),</div><div class='add'>+			   le16_to_cpu(req0-&gt;ethter_type),</div><div class='add'>+			   !!(req0-&gt;flags &amp; HCLGE_DBG_MNG_ETHER_MASK_B),</div><div class='add'>+			   le16_to_cpu(req0-&gt;vlan_tag) &amp;</div><div class='add'>+			   HCLGE_DBG_MNG_VLAN_TAG);</div><div class='ctx'> </div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-				 "%x     %02x     %02x     ",</div><div class='del'>-				 !!(req0-&gt;flags &amp; HCLGE_DBG_MNG_VLAN_MASK_B),</div><div class='del'>-				 req0-&gt;i_port_bitmap, req0-&gt;i_port_direction);</div><div class='add'>+		seq_printf(s, "%x     %02x     %02x     ",</div><div class='add'>+			   !!(req0-&gt;flags &amp; HCLGE_DBG_MNG_VLAN_MASK_B),</div><div class='add'>+			   req0-&gt;i_port_bitmap, req0-&gt;i_port_direction);</div><div class='ctx'> </div><div class='ctx'> 		msg_egress_port = le16_to_cpu(req0-&gt;egress_port);</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-				 "%x       %x      %02x     %04x  %x\n",</div><div class='del'>-				 !!(msg_egress_port &amp; HCLGE_DBG_MNG_E_TYPE_B),</div><div class='del'>-				 msg_egress_port &amp; HCLGE_DBG_MNG_PF_ID,</div><div class='del'>-				 (msg_egress_port &gt;&gt; 3) &amp; HCLGE_DBG_MNG_VF_ID,</div><div class='del'>-				 le16_to_cpu(req0-&gt;egress_queue),</div><div class='del'>-				 !!(msg_egress_port &amp; HCLGE_DBG_MNG_DROP_B));</div><div class='add'>+		seq_printf(s, "%x       %x      %02x     %04x  %x\n",</div><div class='add'>+			   !!(msg_egress_port &amp; HCLGE_DBG_MNG_E_TYPE_B),</div><div class='add'>+			   msg_egress_port &amp; HCLGE_DBG_MNG_PF_ID,</div><div class='add'>+			   (msg_egress_port &gt;&gt; 3) &amp; HCLGE_DBG_MNG_VF_ID,</div><div class='add'>+			   le16_to_cpu(req0-&gt;egress_queue),</div><div class='add'>+			   !!(msg_egress_port &amp; HCLGE_DBG_MNG_DROP_B));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define HCLGE_DBG_TCAM_BUF_SIZE 256</div><div class='del'>-</div><div class='ctx'> static int hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, bool sel_x,</div><div class='del'>-				  char *tcam_buf,</div><div class='add'>+				  struct seq_file *s,</div><div class='ctx'> 				  struct hclge_dbg_tcam_msg tcam_msg)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_fd_tcam_config_1_cmd *req1;</div><div class='ctx'> 	struct hclge_fd_tcam_config_2_cmd *req2;</div><div class='ctx'> 	struct hclge_fd_tcam_config_3_cmd *req3;</div><div class='ctx'> 	struct hclge_desc desc[3];</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> 	__le32 *req;</div><div class='ctx'> </div><div class='hunk'>@@ -2184,27 +1991,23 @@ static int hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, bool sel_x,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos,</div><div class='del'>-			 "read result tcam key %s(%u):\n", sel_x ? "x" : "y",</div><div class='del'>-			 tcam_msg.loc);</div><div class='add'>+	seq_printf(s, "read result tcam key %s(%u):\n",</div><div class='add'>+		   sel_x ? "x" : "y", tcam_msg.loc);</div><div class='ctx'> </div><div class='ctx'> 	/* tcam_data0 ~ tcam_data1 */</div><div class='ctx'> 	req = (__le32 *)req1-&gt;tcam_data;</div><div class='ctx'> 	for (i = 0; i &lt; 2; i++)</div><div class='del'>-		pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos,</div><div class='del'>-				 "%08x\n", le32_to_cpu(*req++));</div><div class='add'>+		seq_printf(s, "%08x\n", le32_to_cpu(*req++));</div><div class='ctx'> </div><div class='ctx'> 	/* tcam_data2 ~ tcam_data7 */</div><div class='ctx'> 	req = (__le32 *)req2-&gt;tcam_data;</div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos,</div><div class='del'>-				 "%08x\n", le32_to_cpu(*req++));</div><div class='add'>+		seq_printf(s, "%08x\n", le32_to_cpu(*req++));</div><div class='ctx'> </div><div class='ctx'> 	/* tcam_data8 ~ tcam_data12 */</div><div class='ctx'> 	req = (__le32 *)req3-&gt;tcam_data;</div><div class='ctx'> 	for (i = 0; i &lt; 5; i++)</div><div class='del'>-		pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos,</div><div class='del'>-				 "%08x\n", le32_to_cpu(*req++));</div><div class='add'>+		seq_printf(s, "%08x\n", le32_to_cpu(*req++));</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2228,14 +2031,13 @@ static int hclge_dbg_get_rules_location(struct hclge_dev *hdev, u16 *rule_locs)</div><div class='ctx'> 	return cnt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_fd_tcam(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_fd_tcam(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	u32 rule_num = hdev-&gt;fd_cfg.rule_num[HCLGE_FD_STAGE_1];</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_dbg_tcam_msg tcam_msg;</div><div class='ctx'> 	int i, ret, rule_cnt;</div><div class='ctx'> 	u16 *rule_locs;</div><div class='del'>-	char *tcam_buf;</div><div class='del'>-	int pos = 0;</div><div class='add'>+	u32 rule_num;</div><div class='ctx'> </div><div class='ctx'> 	if (!hnae3_ae_dev_fd_supported(hdev-&gt;ae_dev)) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='hunk'>@@ -2243,6 +2045,7 @@ static int hclge_dbg_dump_fd_tcam(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	rule_num = hdev-&gt;fd_cfg.rule_num[HCLGE_FD_STAGE_1];</div><div class='ctx'> 	if (!hdev-&gt;hclge_fd_rule_num || !rule_num)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2250,12 +2053,6 @@ static int hclge_dbg_dump_fd_tcam(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 	if (!rule_locs)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	tcam_buf = kzalloc(HCLGE_DBG_TCAM_BUF_SIZE, GFP_KERNEL);</div><div class='del'>-	if (!tcam_buf) {</div><div class='del'>-		kfree(rule_locs);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	rule_cnt = hclge_dbg_get_rules_location(hdev, rule_locs);</div><div class='ctx'> 	if (rule_cnt &lt; 0) {</div><div class='ctx'> 		ret = rule_cnt;</div><div class='hunk'>@@ -2269,38 +2066,34 @@ static int hclge_dbg_dump_fd_tcam(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 		tcam_msg.stage = HCLGE_FD_STAGE_1;</div><div class='ctx'> 		tcam_msg.loc = rule_locs[i];</div><div class='ctx'> </div><div class='del'>-		ret = hclge_dbg_fd_tcam_read(hdev, true, tcam_buf, tcam_msg);</div><div class='add'>+		ret = hclge_dbg_fd_tcam_read(hdev, true, s, tcam_msg);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"failed to get fd tcam key x, ret = %d\n", ret);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", tcam_buf);</div><div class='del'>-</div><div class='del'>-		ret = hclge_dbg_fd_tcam_read(hdev, false, tcam_buf, tcam_msg);</div><div class='add'>+		ret = hclge_dbg_fd_tcam_read(hdev, false, s, tcam_msg);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"failed to get fd tcam key y, ret = %d\n", ret);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "%s", tcam_buf);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	kfree(tcam_buf);</div><div class='ctx'> 	kfree(rule_locs);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_fd_counter(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_fd_counter(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	u8 func_num = pci_num_vf(hdev-&gt;pdev) + 1; /* pf and enabled vf num */</div><div class='ctx'> 	struct hclge_fd_ad_cnt_read_cmd *req;</div><div class='ctx'> 	char str_id[HCLGE_DBG_ID_LEN];</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u64 cnt;</div><div class='ctx'> 	u8 i;</div><div class='hunk'>@@ -2308,8 +2101,7 @@ static int hclge_dbg_dump_fd_counter(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 	if (!hnae3_ae_dev_fd_supported(hdev-&gt;ae_dev))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "func_id\thit_times\n");</div><div class='add'>+	seq_puts(s, "func_id\thit_times\n");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; func_num; i++) {</div><div class='ctx'> 		hclge_cmd_setup_basic_desc(&amp;desc, HCLGE_OPC_FD_CNT_OP, true);</div><div class='hunk'>@@ -2323,8 +2115,7 @@ static int hclge_dbg_dump_fd_counter(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 		}</div><div class='ctx'> 		cnt = le64_to_cpu(req-&gt;cnt);</div><div class='ctx'> 		hclge_dbg_get_func_id_str(str_id, i);</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-				 "%s\t%llu\n", str_id, cnt);</div><div class='add'>+		seq_printf(s, "%s\t%llu\n", str_id, cnt);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2375,74 +2166,95 @@ int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_serv_info(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_seq_dump_rst_info(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='add'>+	u32 i, offset;</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "PF reset count: %u\n", hdev-&gt;rst_stats.pf_rst_cnt);</div><div class='add'>+	seq_printf(s, "FLR reset count: %u\n", hdev-&gt;rst_stats.flr_rst_cnt);</div><div class='add'>+	seq_printf(s, "GLOBAL reset count: %u\n",</div><div class='add'>+		   hdev-&gt;rst_stats.global_rst_cnt);</div><div class='add'>+	seq_printf(s, "IMP reset count: %u\n", hdev-&gt;rst_stats.imp_rst_cnt);</div><div class='add'>+	seq_printf(s, "reset done count: %u\n", hdev-&gt;rst_stats.reset_done_cnt);</div><div class='add'>+	seq_printf(s, "HW reset done count: %u\n",</div><div class='add'>+		   hdev-&gt;rst_stats.hw_reset_done_cnt);</div><div class='add'>+	seq_printf(s, "reset count: %u\n", hdev-&gt;rst_stats.reset_cnt);</div><div class='add'>+	seq_printf(s, "reset fail count: %u\n", hdev-&gt;rst_stats.reset_fail_cnt);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hclge_dbg_rst_info); i++) {</div><div class='add'>+		offset = hclge_dbg_rst_info[i].offset;</div><div class='add'>+		seq_printf(s, "%s: 0x%x\n",</div><div class='add'>+			   hclge_dbg_rst_info[i].message,</div><div class='add'>+			   hclge_read_dev(&amp;hdev-&gt;hw, offset));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "hdev state: 0x%lx\n", hdev-&gt;state);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hclge_dbg_dump_serv_info(struct seq_file *s, void *data)</div><div class='add'>+{</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	unsigned long rem_nsec;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u64 lc;</div><div class='ctx'> </div><div class='ctx'> 	lc = local_clock();</div><div class='ctx'> 	rem_nsec = do_div(lc, HCLGE_BILLION_NANO_SECONDS);</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "local_clock: [%5lu.%06lu]\n",</div><div class='del'>-			 (unsigned long)lc, rem_nsec / 1000);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "delta: %u(ms)\n",</div><div class='del'>-			 jiffies_to_msecs(jiffies - hdev-&gt;last_serv_processed));</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "last_service_task_processed: %lu(jiffies)\n",</div><div class='del'>-			 hdev-&gt;last_serv_processed);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "last_service_task_cnt: %lu\n",</div><div class='del'>-			 hdev-&gt;serv_processed_cnt);</div><div class='add'>+	seq_printf(s, "local_clock: [%5lu.%06lu]\n",</div><div class='add'>+		   (unsigned long)lc, rem_nsec / 1000);</div><div class='add'>+	seq_printf(s, "delta: %u(ms)\n",</div><div class='add'>+		   jiffies_to_msecs(jiffies - hdev-&gt;last_serv_processed));</div><div class='add'>+	seq_printf(s, "last_service_task_processed: %lu(jiffies)\n",</div><div class='add'>+		   hdev-&gt;last_serv_processed);</div><div class='add'>+	seq_printf(s, "last_service_task_cnt: %lu\n", hdev-&gt;serv_processed_cnt);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_interrupt(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_interrupt(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	int pos = 0;</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "num_nic_msi: %u\n",</div><div class='del'>-			 hdev-&gt;num_nic_msi);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "num_roce_msi: %u\n",</div><div class='del'>-			 hdev-&gt;num_roce_msi);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "num_msi_used: %u\n",</div><div class='del'>-			 hdev-&gt;num_msi_used);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "num_msi_left: %u\n",</div><div class='del'>-			 hdev-&gt;num_msi_left);</div><div class='add'>+	seq_printf(s, "num_nic_msi: %u\n", hdev-&gt;num_nic_msi);</div><div class='add'>+	seq_printf(s, "num_roce_msi: %u\n", hdev-&gt;num_roce_msi);</div><div class='add'>+	seq_printf(s, "num_msi_used: %u\n", hdev-&gt;num_msi_used);</div><div class='add'>+	seq_printf(s, "num_msi_left: %u\n", hdev-&gt;num_msi_left);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hclge_dbg_imp_info_data_print(struct hclge_desc *desc_src,</div><div class='del'>-					  char *buf, int len, u32 bd_num)</div><div class='add'>+static void hclge_dbg_imp_info_data_print(struct seq_file *s,</div><div class='add'>+					  struct hclge_desc *desc_src,</div><div class='add'>+					  u32 bd_num)</div><div class='ctx'> {</div><div class='ctx'> #define HCLGE_DBG_IMP_INFO_PRINT_OFFSET 0x2</div><div class='ctx'> </div><div class='ctx'> 	struct hclge_desc *desc_index = desc_src;</div><div class='ctx'> 	u32 offset = 0;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u32 i, j;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "offset | data\n");</div><div class='add'>+	seq_puts(s, "offset | data\n");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; bd_num; i++) {</div><div class='ctx'> 		j = 0;</div><div class='ctx'> 		while (j &lt; HCLGE_DESC_DATA_LEN - 1) {</div><div class='del'>-			pos += scnprintf(buf + pos, len - pos, "0x%04x | ",</div><div class='del'>-					 offset);</div><div class='del'>-			pos += scnprintf(buf + pos, len - pos, "0x%08x  ",</div><div class='del'>-					 le32_to_cpu(desc_index-&gt;data[j++]));</div><div class='del'>-			pos += scnprintf(buf + pos, len - pos, "0x%08x\n",</div><div class='del'>-					 le32_to_cpu(desc_index-&gt;data[j++]));</div><div class='add'>+			seq_printf(s, "0x%04x | ", offset);</div><div class='add'>+			seq_printf(s, "0x%08x  ",</div><div class='add'>+				   le32_to_cpu(desc_index-&gt;data[j++]));</div><div class='add'>+			seq_printf(s, "0x%08x\n",</div><div class='add'>+				   le32_to_cpu(desc_index-&gt;data[j++]));</div><div class='ctx'> 			offset += sizeof(u32) * HCLGE_DBG_IMP_INFO_PRINT_OFFSET;</div><div class='ctx'> 		}</div><div class='ctx'> 		desc_index++;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-hclge_dbg_get_imp_stats_info(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_get_imp_stats_info(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_get_imp_bd_cmd *req;</div><div class='ctx'> 	struct hclge_desc *desc_src;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='hunk'>@@ -2479,7 +2291,7 @@ hclge_dbg_get_imp_stats_info(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hclge_dbg_imp_info_data_print(desc_src, buf, len, bd_num);</div><div class='add'>+	hclge_dbg_imp_info_data_print(s, desc_src, bd_num);</div><div class='ctx'> </div><div class='ctx'> 	kfree(desc_src);</div><div class='ctx'> </div><div class='hunk'>@@ -2490,7 +2302,7 @@ hclge_dbg_get_imp_stats_info(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> #define HCLGE_MAX_NCL_CONFIG_LENGTH	16384</div><div class='ctx'> </div><div class='ctx'> static void hclge_ncl_config_data_print(struct hclge_desc *desc, int *index,</div><div class='del'>-					char *buf, int len, int *pos)</div><div class='add'>+					struct seq_file *s)</div><div class='ctx'> {</div><div class='ctx'> #define HCLGE_CMD_DATA_NUM		6</div><div class='ctx'> </div><div class='hunk'>@@ -2502,9 +2314,8 @@ static void hclge_ncl_config_data_print(struct hclge_desc *desc, int *index,</div><div class='ctx'> 			if (i == 0 &amp;&amp; j == 0)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			*pos += scnprintf(buf + *pos, len - *pos,</div><div class='del'>-					  "0x%04x | 0x%08x\n", offset,</div><div class='del'>-					  le32_to_cpu(desc[i].data[j]));</div><div class='add'>+			seq_printf(s, "0x%04x | 0x%08x\n", offset,</div><div class='add'>+				   le32_to_cpu(desc[i].data[j]));</div><div class='ctx'> </div><div class='ctx'> 			offset += sizeof(u32);</div><div class='ctx'> 			*index -= sizeof(u32);</div><div class='hunk'>@@ -2515,19 +2326,18 @@ static void hclge_ncl_config_data_print(struct hclge_desc *desc, int *index,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-hclge_dbg_dump_ncl_config(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_ncl_config(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='ctx'> #define HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD	(20 + 24 * 4)</div><div class='ctx'> </div><div class='ctx'> 	struct hclge_desc desc[HCLGE_CMD_NCL_CONFIG_BD_NUM];</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	int bd_num = HCLGE_CMD_NCL_CONFIG_BD_NUM;</div><div class='ctx'> 	int index = HCLGE_MAX_NCL_CONFIG_LENGTH;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u32 data0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "offset | data\n");</div><div class='add'>+	seq_puts(s, "offset | data\n");</div><div class='ctx'> </div><div class='ctx'> 	while (index &gt; 0) {</div><div class='ctx'> 		data0 = HCLGE_MAX_NCL_CONFIG_LENGTH - index;</div><div class='hunk'>@@ -2540,27 +2350,26 @@ hclge_dbg_dump_ncl_config(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		hclge_ncl_config_data_print(desc, &amp;index, buf, len, &amp;pos);</div><div class='add'>+		hclge_ncl_config_data_print(desc, &amp;index, s);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_loopback(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_loopback(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct phy_device *phydev = hdev-&gt;hw.mac.phydev;</div><div class='ctx'> 	struct hclge_config_mac_mode_cmd *req_app;</div><div class='ctx'> 	struct hclge_common_lb_cmd *req_common;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='ctx'> 	u8 loopback_en;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	req_app = (struct hclge_config_mac_mode_cmd *)desc.data;</div><div class='ctx'> 	req_common = (struct hclge_common_lb_cmd *)desc.data;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "mac id: %u\n",</div><div class='del'>-			 hdev-&gt;hw.mac.mac_id);</div><div class='add'>+	seq_printf(s, "mac id: %u\n", hdev-&gt;hw.mac.mac_id);</div><div class='ctx'> </div><div class='ctx'> 	hclge_cmd_setup_basic_desc(&amp;desc, HCLGE_OPC_CONFIG_MAC_MODE, true);</div><div class='ctx'> 	ret = hclge_cmd_send(&amp;hdev-&gt;hw, &amp;desc, 1);</div><div class='hunk'>@@ -2572,8 +2381,7 @@ static int hclge_dbg_dump_loopback(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> </div><div class='ctx'> 	loopback_en = hnae3_get_bit(le32_to_cpu(req_app-&gt;txrx_pad_fcs_loop_en),</div><div class='ctx'> 				    HCLGE_MAC_APP_LP_B);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "app loopback: %s\n",</div><div class='del'>-			 state_str[loopback_en]);</div><div class='add'>+	seq_printf(s, "app loopback: %s\n", str_on_off(loopback_en));</div><div class='ctx'> </div><div class='ctx'> 	hclge_cmd_setup_basic_desc(&amp;desc, HCLGE_OPC_COMMON_LOOPBACK, true);</div><div class='ctx'> 	ret = hclge_cmd_send(&amp;hdev-&gt;hw, &amp;desc, 1);</div><div class='hunk'>@@ -2584,24 +2392,22 @@ static int hclge_dbg_dump_loopback(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	loopback_en = req_common-&gt;enable &amp; HCLGE_CMD_SERDES_SERIAL_INNER_LOOP_B;</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "serdes serial loopback: %s\n",</div><div class='del'>-			 state_str[loopback_en]);</div><div class='add'>+	loopback_en = req_common-&gt;enable &amp;</div><div class='add'>+		      HCLGE_CMD_SERDES_SERIAL_INNER_LOOP_B;</div><div class='add'>+	seq_printf(s, "serdes serial loopback: %s\n", str_on_off(loopback_en));</div><div class='ctx'> </div><div class='ctx'> 	loopback_en = req_common-&gt;enable &amp;</div><div class='del'>-			HCLGE_CMD_SERDES_PARALLEL_INNER_LOOP_B ? 1 : 0;</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "serdes parallel loopback: %s\n",</div><div class='del'>-			 state_str[loopback_en]);</div><div class='add'>+		      HCLGE_CMD_SERDES_PARALLEL_INNER_LOOP_B ? 1 : 0;</div><div class='add'>+	seq_printf(s, "serdes parallel loopback: %s\n",</div><div class='add'>+		   str_on_off(loopback_en));</div><div class='ctx'> </div><div class='ctx'> 	if (phydev) {</div><div class='ctx'> 		loopback_en = phydev-&gt;loopback_enabled;</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "phy loopback: %s\n",</div><div class='del'>-				 state_str[loopback_en]);</div><div class='add'>+		seq_printf(s, "phy loopback: %s\n", str_on_off(loopback_en));</div><div class='ctx'> 	} else if (hnae3_dev_phy_imp_supported(hdev)) {</div><div class='ctx'> 		loopback_en = req_common-&gt;enable &amp;</div><div class='ctx'> 			      HCLGE_CMD_GE_PHY_INNER_LOOP_B;</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos, "phy loopback: %s\n",</div><div class='del'>-				 state_str[loopback_en]);</div><div class='add'>+		seq_printf(s, "phy loopback: %s\n", str_on_off(loopback_en));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2610,107 +2416,75 @@ static int hclge_dbg_dump_loopback(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> /* hclge_dbg_dump_mac_tnl_status: print message about mac tnl interrupt</div><div class='ctx'>  * @hdev: pointer to struct hclge_dev</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='del'>-hclge_dbg_dump_mac_tnl_status(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_mac_tnl_status(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_mac_tnl_stats stats;</div><div class='ctx'> 	unsigned long rem_nsec;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-			 "Recently generated mac tnl interruption:\n");</div><div class='add'>+	seq_puts(s, "Recently generated mac tnl interruption:\n");</div><div class='ctx'> </div><div class='ctx'> 	while (kfifo_get(&amp;hdev-&gt;mac_tnl_log, &amp;stats)) {</div><div class='ctx'> 		rem_nsec = do_div(stats.time, HCLGE_BILLION_NANO_SECONDS);</div><div class='ctx'> </div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-				 "[%07lu.%03lu] status = 0x%x\n",</div><div class='del'>-				 (unsigned long)stats.time, rem_nsec / 1000,</div><div class='del'>-				 stats.status);</div><div class='add'>+		seq_printf(s, "[%07lu.%03lu] status = 0x%x\n",</div><div class='add'>+			   (unsigned long)stats.time, rem_nsec / 1000,</div><div class='add'>+			   stats.status);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static const struct hclge_dbg_item mac_list_items[] = {</div><div class='del'>-	{ "FUNC_ID", 2 },</div><div class='del'>-	{ "MAC_ADDR", 12 },</div><div class='del'>-	{ "STATE", 2 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void hclge_dbg_dump_mac_list(struct hclge_dev *hdev, char *buf, int len,</div><div class='del'>-				    bool is_unicast)</div><div class='add'>+static void hclge_dbg_dump_mac_list(struct seq_file *s, bool is_unicast)</div><div class='ctx'> {</div><div class='del'>-	char data_str[ARRAY_SIZE(mac_list_items)][HCLGE_DBG_DATA_STR_LEN];</div><div class='del'>-	char content[HCLGE_DBG_INFO_LEN], str_id[HCLGE_DBG_ID_LEN];</div><div class='del'>-	char *result[ARRAY_SIZE(mac_list_items)];</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_mac_node *mac_node, *tmp;</div><div class='ctx'> 	struct hclge_vport *vport;</div><div class='ctx'> 	struct list_head *list;</div><div class='ctx'> 	u32 func_id;</div><div class='del'>-	int pos = 0;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(mac_list_items); i++)</div><div class='del'>-		result[i] = &amp;data_str[i][0];</div><div class='del'>-</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "%s MAC_LIST:\n",</div><div class='del'>-			 is_unicast ? "UC" : "MC");</div><div class='del'>-	hclge_dbg_fill_content(content, sizeof(content), mac_list_items,</div><div class='del'>-			       NULL, ARRAY_SIZE(mac_list_items));</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+	seq_printf(s, "%s MAC_LIST:\n", is_unicast ? "UC" : "MC");</div><div class='add'>+	seq_puts(s, "FUNC_ID  MAC_ADDR            STATE\n");</div><div class='ctx'> </div><div class='ctx'> 	for (func_id = 0; func_id &lt; hdev-&gt;num_alloc_vport; func_id++) {</div><div class='ctx'> 		vport = &amp;hdev-&gt;vport[func_id];</div><div class='ctx'> 		list = is_unicast ? &amp;vport-&gt;uc_mac_list : &amp;vport-&gt;mc_mac_list;</div><div class='ctx'> 		spin_lock_bh(&amp;vport-&gt;mac_list_lock);</div><div class='ctx'> 		list_for_each_entry_safe(mac_node, tmp, list, node) {</div><div class='del'>-			i = 0;</div><div class='del'>-			result[i++] = hclge_dbg_get_func_id_str(str_id,</div><div class='del'>-								func_id);</div><div class='del'>-			sprintf(result[i++], "%pM", mac_node-&gt;mac_addr);</div><div class='del'>-			sprintf(result[i++], "%5s",</div><div class='del'>-				hclge_mac_state_str[mac_node-&gt;state]);</div><div class='del'>-			hclge_dbg_fill_content(content, sizeof(content),</div><div class='del'>-					       mac_list_items,</div><div class='del'>-					       (const char **)result,</div><div class='del'>-					       ARRAY_SIZE(mac_list_items));</div><div class='del'>-			pos += scnprintf(buf + pos, len - pos, "%s", content);</div><div class='add'>+			if (func_id)</div><div class='add'>+				seq_printf(s, "vf%-7u", func_id - 1U);</div><div class='add'>+			else</div><div class='add'>+				seq_puts(s, "pf       ");</div><div class='add'>+			seq_printf(s, "%pM   ", mac_node-&gt;mac_addr);</div><div class='add'>+			seq_printf(s, "%5s\n",</div><div class='add'>+				   hclge_mac_state_str[mac_node-&gt;state]);</div><div class='ctx'> 		}</div><div class='ctx'> 		spin_unlock_bh(&amp;vport-&gt;mac_list_lock);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_umv_info(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_umv_info(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	u8 func_num = pci_num_vf(hdev-&gt;pdev) + 1;</div><div class='ctx'> 	struct hclge_vport *vport;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u8 i;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf, len, "num_alloc_vport   : %u\n",</div><div class='del'>-			  hdev-&gt;num_alloc_vport);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "max_umv_size     : %u\n",</div><div class='del'>-			 hdev-&gt;max_umv_size);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "wanted_umv_size  : %u\n",</div><div class='del'>-			 hdev-&gt;wanted_umv_size);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "priv_umv_size    : %u\n",</div><div class='del'>-			 hdev-&gt;priv_umv_size);</div><div class='add'>+	seq_printf(s, "num_alloc_vport   : %u\n", hdev-&gt;num_alloc_vport);</div><div class='add'>+	seq_printf(s, "max_umv_size     : %u\n", hdev-&gt;max_umv_size);</div><div class='add'>+	seq_printf(s, "wanted_umv_size  : %u\n", hdev-&gt;wanted_umv_size);</div><div class='add'>+	seq_printf(s, "priv_umv_size    : %u\n", hdev-&gt;priv_umv_size);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;hdev-&gt;vport_lock);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "share_umv_size   : %u\n",</div><div class='del'>-			 hdev-&gt;share_umv_size);</div><div class='add'>+	seq_printf(s, "share_umv_size   : %u\n", hdev-&gt;share_umv_size);</div><div class='ctx'> 	for (i = 0; i &lt; func_num; i++) {</div><div class='ctx'> 		vport = &amp;hdev-&gt;vport[i];</div><div class='del'>-		pos += scnprintf(buf + pos, len - pos,</div><div class='del'>-				 "vport(%u) used_umv_num : %u\n",</div><div class='del'>-				 i, vport-&gt;used_umv_num);</div><div class='add'>+		seq_printf(s, "vport(%u) used_umv_num : %u\n",</div><div class='add'>+			   i, vport-&gt;used_umv_num);</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;hdev-&gt;vport_lock);</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "used_mc_mac_num  : %u\n",</div><div class='del'>-			 hdev-&gt;used_mc_mac_num);</div><div class='add'>+	seq_printf(s, "used_mc_mac_num  : %u\n", hdev-&gt;used_mc_mac_num);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2852,38 +2626,12 @@ static int hclge_get_port_vlan_filter_bypass_state(struct hclge_dev *hdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct hclge_dbg_item vlan_filter_items[] = {</div><div class='del'>-	{ "FUNC_ID", 2 },</div><div class='del'>-	{ "I_VF_VLAN_FILTER", 2 },</div><div class='del'>-	{ "E_VF_VLAN_FILTER", 2 },</div><div class='del'>-	{ "PORT_VLAN_FILTER_BYPASS", 0 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hclge_dbg_item vlan_offload_items[] = {</div><div class='del'>-	{ "FUNC_ID", 2 },</div><div class='del'>-	{ "PVID", 4 },</div><div class='del'>-	{ "ACCEPT_TAG1", 2 },</div><div class='del'>-	{ "ACCEPT_TAG2", 2 },</div><div class='del'>-	{ "ACCEPT_UNTAG1", 2 },</div><div class='del'>-	{ "ACCEPT_UNTAG2", 2 },</div><div class='del'>-	{ "INSERT_TAG1", 2 },</div><div class='del'>-	{ "INSERT_TAG2", 2 },</div><div class='del'>-	{ "SHIFT_TAG", 2 },</div><div class='del'>-	{ "STRIP_TAG1", 2 },</div><div class='del'>-	{ "STRIP_TAG2", 2 },</div><div class='del'>-	{ "DROP_TAG1", 2 },</div><div class='del'>-	{ "DROP_TAG2", 2 },</div><div class='del'>-	{ "PRI_ONLY_TAG1", 2 },</div><div class='del'>-	{ "PRI_ONLY_TAG2", 0 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int hclge_dbg_dump_vlan_filter_config(struct hclge_dev *hdev, char *buf,</div><div class='del'>-					     int len, int *pos)</div><div class='add'>+static int hclge_dbg_dump_vlan_filter_config(struct hclge_dev *hdev,</div><div class='add'>+					     struct seq_file *s)</div><div class='ctx'> {</div><div class='del'>-	char content[HCLGE_DBG_VLAN_FLTR_INFO_LEN], str_id[HCLGE_DBG_ID_LEN];</div><div class='del'>-	const char *result[ARRAY_SIZE(vlan_filter_items)];</div><div class='del'>-	u8 i, j, vlan_fe, bypass, ingress, egress;</div><div class='ctx'> 	u8 func_num = pci_num_vf(hdev-&gt;pdev) + 1; /* pf and enabled vf num */</div><div class='add'>+	u8 i, vlan_fe, bypass, ingress, egress;</div><div class='add'>+	char str_id[HCLGE_DBG_ID_LEN];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_get_vlan_filter_state(hdev, HCLGE_FILTER_TYPE_PORT, 0,</div><div class='hunk'>@@ -2893,14 +2641,11 @@ static int hclge_dbg_dump_vlan_filter_config(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> 	ingress = vlan_fe &amp; HCLGE_FILTER_FE_NIC_INGRESS_B;</div><div class='ctx'> 	egress = vlan_fe &amp; HCLGE_FILTER_FE_NIC_EGRESS_B ? 1 : 0;</div><div class='ctx'> </div><div class='del'>-	*pos += scnprintf(buf, len, "I_PORT_VLAN_FILTER: %s\n",</div><div class='del'>-			  state_str[ingress]);</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "E_PORT_VLAN_FILTER: %s\n",</div><div class='del'>-			  state_str[egress]);</div><div class='add'>+	seq_printf(s, "I_PORT_VLAN_FILTER: %s\n", str_on_off(ingress));</div><div class='add'>+	seq_printf(s, "E_PORT_VLAN_FILTER: %s\n", str_on_off(egress));</div><div class='ctx'> </div><div class='del'>-	hclge_dbg_fill_content(content, sizeof(content), vlan_filter_items,</div><div class='del'>-			       NULL, ARRAY_SIZE(vlan_filter_items));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "%s", content);</div><div class='add'>+	seq_puts(s, "FUNC_ID  I_VF_VLAN_FILTER  E_VF_VLAN_FILTER  ");</div><div class='add'>+	seq_puts(s, "PORT_VLAN_FILTER_BYPASS\n");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; func_num; i++) {</div><div class='ctx'> 		ret = hclge_get_vlan_filter_state(hdev, HCLGE_FILTER_TYPE_VF, i,</div><div class='hunk'>@@ -2913,37 +2658,32 @@ static int hclge_dbg_dump_vlan_filter_config(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> 		ret = hclge_get_port_vlan_filter_bypass_state(hdev, i, &amp;bypass);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='del'>-		j = 0;</div><div class='del'>-		result[j++] = hclge_dbg_get_func_id_str(str_id, i);</div><div class='del'>-		result[j++] = state_str[ingress];</div><div class='del'>-		result[j++] = state_str[egress];</div><div class='del'>-		result[j++] =</div><div class='del'>-			test_bit(HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,</div><div class='del'>-				 hdev-&gt;ae_dev-&gt;caps) ? state_str[bypass] : "NA";</div><div class='del'>-		hclge_dbg_fill_content(content, sizeof(content),</div><div class='del'>-				       vlan_filter_items, result,</div><div class='del'>-				       ARRAY_SIZE(vlan_filter_items));</div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "%s", content);</div><div class='add'>+</div><div class='add'>+		seq_printf(s, "%-9s%-18s%-18s%s\n",</div><div class='add'>+			   hclge_dbg_get_func_id_str(str_id, i),</div><div class='add'>+			   str_on_off(ingress), str_on_off(egress),</div><div class='add'>+			   test_bit(HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B,</div><div class='add'>+				    hdev-&gt;ae_dev-&gt;caps) ?</div><div class='add'>+						str_on_off(bypass) : "NA");</div><div class='ctx'> 	}</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "\n");</div><div class='add'>+	seq_puts(s, "\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_vlan_offload_config(struct hclge_dev *hdev, char *buf,</div><div class='del'>-					      int len, int *pos)</div><div class='add'>+static int hclge_dbg_dump_vlan_offload_config(struct hclge_dev *hdev,</div><div class='add'>+					      struct seq_file *s)</div><div class='ctx'> {</div><div class='del'>-	char str_id[HCLGE_DBG_ID_LEN], str_pvid[HCLGE_DBG_ID_LEN];</div><div class='del'>-	const char *result[ARRAY_SIZE(vlan_offload_items)];</div><div class='del'>-	char content[HCLGE_DBG_VLAN_OFFLOAD_INFO_LEN];</div><div class='ctx'> 	u8 func_num = pci_num_vf(hdev-&gt;pdev) + 1; /* pf and enabled vf num */</div><div class='ctx'> 	struct hclge_dbg_vlan_cfg vlan_cfg;</div><div class='add'>+	char str_id[HCLGE_DBG_ID_LEN];</div><div class='ctx'> 	int ret;</div><div class='del'>-	u8 i, j;</div><div class='add'>+	u8 i;</div><div class='ctx'> </div><div class='del'>-	hclge_dbg_fill_content(content, sizeof(content), vlan_offload_items,</div><div class='del'>-			       NULL, ARRAY_SIZE(vlan_offload_items));</div><div class='del'>-	*pos += scnprintf(buf + *pos, len - *pos, "%s", content);</div><div class='add'>+	seq_puts(s, "FUNC_ID  PVID  ACCEPT_TAG1  ACCEPT_TAG2 ACCEPT_UNTAG1  ");</div><div class='add'>+	seq_puts(s, "ACCEPT_UNTAG2  INSERT_TAG1  INSERT_TAG2  SHIFT_TAG  ");</div><div class='add'>+	seq_puts(s, "STRIP_TAG1  STRIP_TAG2  DROP_TAG1  DROP_TAG2  ");</div><div class='add'>+	seq_puts(s, "PRI_ONLY_TAG1  PRI_ONLY_TAG2\n");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; func_num; i++) {</div><div class='ctx'> 		ret = hclge_get_vlan_tx_offload_cfg(hdev, i, &amp;vlan_cfg);</div><div class='hunk'>@@ -2954,107 +2694,92 @@ static int hclge_dbg_dump_vlan_offload_config(struct hclge_dev *hdev, char *buf,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		sprintf(str_pvid, "%u", vlan_cfg.pvid);</div><div class='del'>-		j = 0;</div><div class='del'>-		result[j++] = hclge_dbg_get_func_id_str(str_id, i);</div><div class='del'>-		result[j++] = str_pvid;</div><div class='del'>-		result[j++] = state_str[vlan_cfg.accept_tag1];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.accept_tag2];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.accept_untag1];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.accept_untag2];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.insert_tag1];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.insert_tag2];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.shift_tag];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.strip_tag1];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.strip_tag2];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.drop_tag1];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.drop_tag2];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.pri_only1];</div><div class='del'>-		result[j++] = state_str[vlan_cfg.pri_only2];</div><div class='del'>-</div><div class='del'>-		hclge_dbg_fill_content(content, sizeof(content),</div><div class='del'>-				       vlan_offload_items, result,</div><div class='del'>-				       ARRAY_SIZE(vlan_offload_items));</div><div class='del'>-		*pos += scnprintf(buf + *pos, len - *pos, "%s", content);</div><div class='add'>+		seq_printf(s, "%-9s", hclge_dbg_get_func_id_str(str_id, i));</div><div class='add'>+		seq_printf(s, "%-6u", vlan_cfg.pvid);</div><div class='add'>+		seq_printf(s, "%-13s", str_on_off(vlan_cfg.accept_tag1));</div><div class='add'>+		seq_printf(s, "%-12s", str_on_off(vlan_cfg.accept_tag2));</div><div class='add'>+		seq_printf(s, "%-15s", str_on_off(vlan_cfg.accept_untag1));</div><div class='add'>+		seq_printf(s, "%-15s", str_on_off(vlan_cfg.accept_untag2));</div><div class='add'>+		seq_printf(s, "%-13s", str_on_off(vlan_cfg.insert_tag1));</div><div class='add'>+		seq_printf(s, "%-13s", str_on_off(vlan_cfg.insert_tag2));</div><div class='add'>+		seq_printf(s, "%-11s", str_on_off(vlan_cfg.shift_tag));</div><div class='add'>+		seq_printf(s, "%-12s", str_on_off(vlan_cfg.strip_tag1));</div><div class='add'>+		seq_printf(s, "%-12s", str_on_off(vlan_cfg.strip_tag2));</div><div class='add'>+		seq_printf(s, "%-11s", str_on_off(vlan_cfg.drop_tag1));</div><div class='add'>+		seq_printf(s, "%-11s", str_on_off(vlan_cfg.drop_tag2));</div><div class='add'>+		seq_printf(s, "%-15s", str_on_off(vlan_cfg.pri_only1));</div><div class='add'>+		seq_printf(s, "%s\n", str_on_off(vlan_cfg.pri_only2));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_vlan_config(struct hclge_dev *hdev, char *buf,</div><div class='del'>-				      int len)</div><div class='add'>+static int hclge_dbg_dump_vlan_config(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	int pos = 0;</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclge_dbg_dump_vlan_filter_config(hdev, buf, len, &amp;pos);</div><div class='add'>+	ret = hclge_dbg_dump_vlan_filter_config(hdev, s);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return hclge_dbg_dump_vlan_offload_config(hdev, buf, len, &amp;pos);</div><div class='add'>+	return hclge_dbg_dump_vlan_offload_config(hdev, s);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_ptp_info(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_ptp_info(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_dev *hdev = hclge_seq_file_to_hdev(s);</div><div class='ctx'> 	struct hclge_ptp *ptp = hdev-&gt;ptp;</div><div class='ctx'> 	u32 sw_cfg = ptp-&gt;ptp_cfg;</div><div class='ctx'> 	unsigned int tx_start;</div><div class='ctx'> 	unsigned int last_rx;</div><div class='del'>-	int pos = 0;</div><div class='ctx'> 	u32 hw_cfg;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "phc %s's debug info:\n",</div><div class='del'>-			 ptp-&gt;info.name);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "ptp enable: %s\n",</div><div class='del'>-			 test_bit(HCLGE_PTP_FLAG_EN, &amp;ptp-&gt;flags) ?</div><div class='del'>-			 "yes" : "no");</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "ptp tx enable: %s\n",</div><div class='del'>-			 test_bit(HCLGE_PTP_FLAG_TX_EN, &amp;ptp-&gt;flags) ?</div><div class='del'>-			 "yes" : "no");</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "ptp rx enable: %s\n",</div><div class='del'>-			 test_bit(HCLGE_PTP_FLAG_RX_EN, &amp;ptp-&gt;flags) ?</div><div class='del'>-			 "yes" : "no");</div><div class='add'>+	seq_printf(s, "phc %s's debug info:\n", ptp-&gt;info.name);</div><div class='add'>+	seq_printf(s, "ptp enable: %s\n",</div><div class='add'>+		   str_yes_no(test_bit(HCLGE_PTP_FLAG_EN, &amp;ptp-&gt;flags)));</div><div class='add'>+	seq_printf(s, "ptp tx enable: %s\n",</div><div class='add'>+		   str_yes_no(test_bit(HCLGE_PTP_FLAG_TX_EN, &amp;ptp-&gt;flags)));</div><div class='add'>+	seq_printf(s, "ptp rx enable: %s\n",</div><div class='add'>+		   str_yes_no(test_bit(HCLGE_PTP_FLAG_RX_EN, &amp;ptp-&gt;flags)));</div><div class='ctx'> </div><div class='ctx'> 	last_rx = jiffies_to_msecs(ptp-&gt;last_rx);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "last rx time: %lu.%lu\n",</div><div class='del'>-			 last_rx / MSEC_PER_SEC, last_rx % MSEC_PER_SEC);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "rx count: %lu\n", ptp-&gt;rx_cnt);</div><div class='add'>+	seq_printf(s, "last rx time: %lu.%lu\n",</div><div class='add'>+		   last_rx / MSEC_PER_SEC, last_rx % MSEC_PER_SEC);</div><div class='add'>+	seq_printf(s, "rx count: %lu\n", ptp-&gt;rx_cnt);</div><div class='ctx'> </div><div class='ctx'> 	tx_start = jiffies_to_msecs(ptp-&gt;tx_start);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "last tx start time: %lu.%lu\n",</div><div class='del'>-			 tx_start / MSEC_PER_SEC, tx_start % MSEC_PER_SEC);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "tx count: %lu\n", ptp-&gt;tx_cnt);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "tx skipped count: %lu\n",</div><div class='del'>-			 ptp-&gt;tx_skipped);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "tx timeout count: %lu\n",</div><div class='del'>-			 ptp-&gt;tx_timeout);</div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "last tx seqid: %u\n",</div><div class='del'>-			 ptp-&gt;last_tx_seqid);</div><div class='add'>+	seq_printf(s, "last tx start time: %lu.%lu\n",</div><div class='add'>+		   tx_start / MSEC_PER_SEC, tx_start % MSEC_PER_SEC);</div><div class='add'>+	seq_printf(s, "tx count: %lu\n", ptp-&gt;tx_cnt);</div><div class='add'>+	seq_printf(s, "tx skipped count: %lu\n", ptp-&gt;tx_skipped);</div><div class='add'>+	seq_printf(s, "tx timeout count: %lu\n", ptp-&gt;tx_timeout);</div><div class='add'>+	seq_printf(s, "last tx seqid: %u\n", ptp-&gt;last_tx_seqid);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_ptp_cfg_qry(hdev, &amp;hw_cfg);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "sw_cfg: %#x, hw_cfg: %#x\n",</div><div class='del'>-			 sw_cfg, hw_cfg);</div><div class='add'>+	seq_printf(s, "sw_cfg: %#x, hw_cfg: %#x\n", sw_cfg, hw_cfg);</div><div class='ctx'> </div><div class='del'>-	pos += scnprintf(buf + pos, len - pos, "tx type: %d, rx filter: %d\n",</div><div class='del'>-			 ptp-&gt;ts_cfg.tx_type, ptp-&gt;ts_cfg.rx_filter);</div><div class='add'>+	seq_printf(s, "tx type: %d, rx filter: %d\n",</div><div class='add'>+		   ptp-&gt;ts_cfg.tx_type, ptp-&gt;ts_cfg.rx_filter);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_mac_uc(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_mac_uc(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	hclge_dbg_dump_mac_list(hdev, buf, len, true);</div><div class='add'>+	hclge_dbg_dump_mac_list(s, true);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_dbg_dump_mac_mc(struct hclge_dev *hdev, char *buf, int len)</div><div class='add'>+static int hclge_dbg_dump_mac_mc(struct seq_file *s, void *data)</div><div class='ctx'> {</div><div class='del'>-	hclge_dbg_dump_mac_list(hdev, buf, len, false);</div><div class='add'>+	hclge_dbg_dump_mac_list(s, false);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3062,156 +2787,156 @@ static int hclge_dbg_dump_mac_mc(struct hclge_dev *hdev, char *buf, int len)</div><div class='ctx'> static const struct hclge_dbg_func hclge_dbg_cmd_func[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_NODES,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_tm_nodes,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_tm_nodes,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_PRI,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_tm_pri,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_tm_pri,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_QSET,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_tm_qset,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_tm_qset,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_MAP,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_tm_map,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_tm_map,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_PG,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_tm_pg,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_tm_pg,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TM_PORT,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_tm_port,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_tm_port,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_TC_SCH_INFO,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_tc,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_tc,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_QOS_PAUSE_CFG,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_qos_pause_cfg,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_qos_pause_cfg,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_QOS_PRI_MAP,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_qos_pri_map,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_qos_pri_map,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_QOS_DSCP_MAP,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_qos_dscp_map,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_qos_dscp_map,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_QOS_BUF_CFG,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_qos_buf_cfg,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_qos_buf_cfg,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_MAC_UC,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_mac_uc,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_mac_uc,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_MAC_MC,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_mac_mc,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_mac_mc,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_MNG_TBL,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_mng_table,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_mng_table,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_LOOPBACK,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_loopback,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_loopback,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_PTP_INFO,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_ptp_info,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_ptp_info,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_INTERRUPT_INFO,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_interrupt,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_interrupt,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_RESET_INFO,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_rst_info,</div><div class='add'>+		.dbg_read_func = hclge_dbg_seq_dump_rst_info,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_IMP_INFO,</div><div class='del'>-		.dbg_dump = hclge_dbg_get_imp_stats_info,</div><div class='add'>+		.dbg_read_func = hclge_dbg_get_imp_stats_info,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_NCL_CONFIG,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_ncl_config,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_ncl_config,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_BIOS_COMMON,</div><div class='del'>-		.dbg_dump_reg = hclge_dbg_dump_reg_cmd,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_bios_reg_cmd,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_SSU,</div><div class='del'>-		.dbg_dump_reg = hclge_dbg_dump_reg_cmd,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_ssu_reg_cmd,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_IGU_EGU,</div><div class='del'>-		.dbg_dump_reg = hclge_dbg_dump_reg_cmd,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_igu_egu_reg_cmd,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_RPU,</div><div class='del'>-		.dbg_dump_reg = hclge_dbg_dump_reg_cmd,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_rpu_reg_cmd,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_NCSI,</div><div class='del'>-		.dbg_dump_reg = hclge_dbg_dump_reg_cmd,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_ncsi_reg_cmd,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_RTC,</div><div class='del'>-		.dbg_dump_reg = hclge_dbg_dump_reg_cmd,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_rtc_reg_cmd,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_PPP,</div><div class='del'>-		.dbg_dump_reg = hclge_dbg_dump_reg_cmd,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_ppp_reg_cmd,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_RCB,</div><div class='del'>-		.dbg_dump_reg = hclge_dbg_dump_reg_cmd,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_rcb_reg_cmd,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_TQP,</div><div class='del'>-		.dbg_dump_reg = hclge_dbg_dump_reg_cmd,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_tqp_reg_cmd,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_MAC,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_mac,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_mac,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_REG_DCB,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_dcb,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_dcb,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_FD_TCAM,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_fd_tcam,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_fd_tcam,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_MAC_TNL_STATUS,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_mac_tnl_status,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_mac_tnl_status,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_SERV_INFO,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_serv_info,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_serv_info,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_VLAN_CONFIG,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_vlan_config,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_vlan_config,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_FD_COUNTER,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_fd_counter,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_fd_counter,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.cmd = HNAE3_DBG_CMD_UMV_INFO,</div><div class='del'>-		.dbg_dump = hclge_dbg_dump_umv_info,</div><div class='add'>+		.dbg_read_func = hclge_dbg_dump_umv_info,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,</div><div class='del'>-		       char *buf, int len)</div><div class='add'>+int hclge_dbg_get_read_func(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,</div><div class='add'>+			    read_func *func)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_vport *vport = hclge_get_vport(handle);</div><div class='ctx'> 	const struct hclge_dbg_func *cmd_func;</div><div class='hunk'>@@ -3221,11 +2946,8 @@ int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(hclge_dbg_cmd_func); i++) {</div><div class='ctx'> 		if (cmd == hclge_dbg_cmd_func[i].cmd) {</div><div class='ctx'> 			cmd_func = &amp;hclge_dbg_cmd_func[i];</div><div class='del'>-			if (cmd_func-&gt;dbg_dump)</div><div class='del'>-				return cmd_func-&gt;dbg_dump(hdev, buf, len);</div><div class='del'>-			else</div><div class='del'>-				return cmd_func-&gt;dbg_dump_reg(hdev, cmd, buf,</div><div class='del'>-							      len);</div><div class='add'>+			*func = cmd_func-&gt;dbg_read_func;</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h<br/>index 2b998cbed826..317f79efd54c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h</a></div><div class='hunk'>@@ -92,6 +92,7 @@ struct hclge_dbg_func {</div><div class='ctx'> 	int (*dbg_dump)(struct hclge_dev *hdev, char *buf, int len);</div><div class='ctx'> 	int (*dbg_dump_reg)(struct hclge_dev *hdev, enum hnae3_dbg_cmd cmd,</div><div class='ctx'> 			    char *buf, int len);</div><div class='add'>+	read_func dbg_read_func;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct hclge_dbg_status_dfx_info {</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c<br/>index 728f4777e51f..cf8abbe01840 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c</a></div><div class='hunk'>@@ -490,7 +490,7 @@ static int hclge_mac_update_stats_complete(struct hclge_dev *hdev)</div><div class='ctx'> 	desc_num = reg_num / HCLGE_REG_NUM_PER_DESC + 1;</div><div class='ctx'> </div><div class='ctx'> 	/* This may be called inside atomic sections,</div><div class='del'>-	 * so GFP_ATOMIC is more suitalbe here</div><div class='add'>+	 * so GFP_ATOMIC is more suitable here</div><div class='ctx'> 	 */</div><div class='ctx'> 	desc = kcalloc(desc_num, sizeof(struct hclge_desc), GFP_ATOMIC);</div><div class='ctx'> 	if (!desc)</div><div class='hunk'>@@ -582,7 +582,7 @@ static u64 *hclge_comm_get_stats(struct hclge_dev *hdev,</div><div class='ctx'> 				 int size, u64 *data)</div><div class='ctx'> {</div><div class='ctx'> 	u64 *buf = data;</div><div class='del'>-	u32 i;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; size; i++) {</div><div class='ctx'> 		if (strs[i].stats_num &gt; hdev-&gt;ae_dev-&gt;dev_specs.mac_stats_num)</div><div class='hunk'>@@ -595,25 +595,21 @@ static u64 *hclge_comm_get_stats(struct hclge_dev *hdev,</div><div class='ctx'> 	return buf;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 *hclge_comm_get_strings(struct hclge_dev *hdev, u32 stringset,</div><div class='del'>-				  const struct hclge_comm_stats_str strs[],</div><div class='del'>-				  int size, u8 *data)</div><div class='add'>+static void hclge_comm_get_strings(struct hclge_dev *hdev, u32 stringset,</div><div class='add'>+				   const struct hclge_comm_stats_str strs[],</div><div class='add'>+				   int size, u8 **data)</div><div class='ctx'> {</div><div class='del'>-	char *buff = (char *)data;</div><div class='del'>-	u32 i;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (stringset != ETH_SS_STATS)</div><div class='del'>-		return buff;</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; size; i++) {</div><div class='ctx'> 		if (strs[i].stats_num &gt; hdev-&gt;ae_dev-&gt;dev_specs.mac_stats_num)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		snprintf(buff, ETH_GSTRING_LEN, "%s", strs[i].desc);</div><div class='del'>-		buff = buff + ETH_GSTRING_LEN;</div><div class='add'>+		ethtool_puts(data, strs[i].desc);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return (u8 *)buff;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hclge_update_stats_for_all(struct hclge_dev *hdev)</div><div class='hunk'>@@ -718,44 +714,38 @@ static int hclge_get_sset_count(struct hnae3_handle *handle, int stringset)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hclge_get_strings(struct hnae3_handle *handle, u32 stringset,</div><div class='del'>-			      u8 *data)</div><div class='add'>+			      u8 **data)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_vport *vport = hclge_get_vport(handle);</div><div class='ctx'> 	struct hclge_dev *hdev = vport-&gt;back;</div><div class='del'>-	u8 *p = (char *)data;</div><div class='add'>+	const char *str;</div><div class='ctx'> 	int size;</div><div class='ctx'> </div><div class='ctx'> 	if (stringset == ETH_SS_STATS) {</div><div class='ctx'> 		size = ARRAY_SIZE(g_mac_stats_string);</div><div class='del'>-		p = hclge_comm_get_strings(hdev, stringset, g_mac_stats_string,</div><div class='del'>-					   size, p);</div><div class='del'>-		p = hclge_comm_tqps_get_strings(handle, p);</div><div class='add'>+		hclge_comm_get_strings(hdev, stringset, g_mac_stats_string,</div><div class='add'>+				       size, data);</div><div class='add'>+		hclge_comm_tqps_get_strings(handle, data);</div><div class='ctx'> 	} else if (stringset == ETH_SS_TEST) {</div><div class='ctx'> 		if (handle-&gt;flags &amp; HNAE3_SUPPORT_EXTERNAL_LOOPBACK) {</div><div class='del'>-			memcpy(p, hns3_nic_test_strs[HNAE3_LOOP_EXTERNAL],</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='del'>-			p += ETH_GSTRING_LEN;</div><div class='add'>+			str = hns3_nic_test_strs[HNAE3_LOOP_EXTERNAL];</div><div class='add'>+			ethtool_puts(data, str);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (handle-&gt;flags &amp; HNAE3_SUPPORT_APP_LOOPBACK) {</div><div class='del'>-			memcpy(p, hns3_nic_test_strs[HNAE3_LOOP_APP],</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='del'>-			p += ETH_GSTRING_LEN;</div><div class='add'>+			str = hns3_nic_test_strs[HNAE3_LOOP_APP];</div><div class='add'>+			ethtool_puts(data, str);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (handle-&gt;flags &amp; HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK) {</div><div class='del'>-			memcpy(p, hns3_nic_test_strs[HNAE3_LOOP_SERIAL_SERDES],</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='del'>-			p += ETH_GSTRING_LEN;</div><div class='add'>+			str = hns3_nic_test_strs[HNAE3_LOOP_SERIAL_SERDES];</div><div class='add'>+			ethtool_puts(data, str);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (handle-&gt;flags &amp; HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK) {</div><div class='del'>-			memcpy(p,</div><div class='del'>-			       hns3_nic_test_strs[HNAE3_LOOP_PARALLEL_SERDES],</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='del'>-			p += ETH_GSTRING_LEN;</div><div class='add'>+			str = hns3_nic_test_strs[HNAE3_LOOP_PARALLEL_SERDES];</div><div class='add'>+			ethtool_puts(data, str);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (handle-&gt;flags &amp; HNAE3_SUPPORT_PHY_LOOPBACK) {</div><div class='del'>-			memcpy(p, hns3_nic_test_strs[HNAE3_LOOP_PHY],</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='del'>-			p += ETH_GSTRING_LEN;</div><div class='add'>+			str = hns3_nic_test_strs[HNAE3_LOOP_PHY];</div><div class='add'>+			ethtool_puts(data, str);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2192,8 +2182,8 @@ static bool hclge_drop_pfc_buf_till_fit(struct hclge_dev *hdev,</div><div class='ctx'> 	return hclge_is_rx_buf_ok(hdev, buf_alloc, rx_all);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_only_alloc_priv_buff(struct hclge_dev *hdev,</div><div class='del'>-				      struct hclge_pkt_buf_alloc *buf_alloc)</div><div class='add'>+static bool hclge_only_alloc_priv_buff(struct hclge_dev *hdev,</div><div class='add'>+				       struct hclge_pkt_buf_alloc *buf_alloc)</div><div class='ctx'> {</div><div class='ctx'> #define COMPENSATE_BUFFER	0x3C00</div><div class='ctx'> #define COMPENSATE_HALF_MPS_NUM	5</div><div class='hunk'>@@ -2368,7 +2358,7 @@ static int hclge_common_thrd_config(struct hclge_dev *hdev,</div><div class='ctx'> 	for (i = 0; i &lt; 2; i++) {</div><div class='ctx'> 		hclge_cmd_setup_basic_desc(&amp;desc[i],</div><div class='ctx'> 					   HCLGE_OPC_RX_COM_THRD_ALLOC, false);</div><div class='del'>-		req = (struct hclge_rx_com_thrd *)&amp;desc[i].data;</div><div class='add'>+		req = (struct hclge_rx_com_thrd *)desc[i].data;</div><div class='ctx'> </div><div class='ctx'> 		/* The first descriptor set the NEXT bit to 1 */</div><div class='ctx'> 		if (i == 0)</div><div class='hunk'>@@ -2634,7 +2624,7 @@ int hclge_cfg_mac_speed_dup(struct hclge_dev *hdev, int speed, u8 duplex, u8 lan</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	duplex = hclge_check_speed_dup(duplex, speed);</div><div class='del'>-	if (!mac-&gt;support_autoneg &amp;&amp; mac-&gt;speed == speed &amp;&amp;</div><div class='add'>+	if (!mac-&gt;support_autoneg &amp;&amp; mac-&gt;speed == (u32)speed &amp;&amp;</div><div class='ctx'> 	    mac-&gt;duplex == duplex &amp;&amp; (mac-&gt;lane_num == lane_num || lane_num == 0))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2662,7 +2652,7 @@ static int hclge_cfg_mac_speed_dup_h(struct hnae3_handle *handle, int speed,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	hdev-&gt;hw.mac.req_speed = speed;</div><div class='add'>+	hdev-&gt;hw.mac.req_speed = (u32)speed;</div><div class='ctx'> 	hdev-&gt;hw.mac.req_duplex = duplex;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3456,7 +3446,7 @@ static int hclge_tp_port_init(struct hclge_dev *hdev)</div><div class='ctx'> static int hclge_update_port_info(struct hclge_dev *hdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_mac *mac = &amp;hdev-&gt;hw.mac;</div><div class='del'>-	int speed;</div><div class='add'>+	u32 speed;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* get the port info from SFP cmd if not copper port */</div><div class='hunk'>@@ -3781,7 +3771,7 @@ static int hclge_misc_irq_init(struct hclge_dev *hdev)</div><div class='ctx'> 	snprintf(hdev-&gt;misc_vector.name, HNAE3_INT_NAME_LEN, "%s-misc-%s",</div><div class='ctx'> 		 HCLGE_NAME, pci_name(hdev-&gt;pdev));</div><div class='ctx'> 	ret = request_irq(hdev-&gt;misc_vector.vector_irq, hclge_misc_irq_handle,</div><div class='del'>-			  IRQ_NOAUTOEN, hdev-&gt;misc_vector.name, hdev);</div><div class='add'>+			  IRQF_NO_AUTOEN, hdev-&gt;misc_vector.name, hdev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		hclge_free_vector(hdev, 0);</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev, "request misc irq(%d) fail\n",</div><div class='hunk'>@@ -4513,7 +4503,7 @@ static void hclge_set_def_reset_request(struct hnae3_ae_dev *ae_dev,</div><div class='ctx'> </div><div class='ctx'> static void hclge_reset_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct hclge_dev *hdev = from_timer(hdev, t, reset_timer);</div><div class='add'>+	struct hclge_dev *hdev = timer_container_of(hdev, t, reset_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* if default_reset_request has no value, it means that this reset</div><div class='ctx'> 	 * request has already be handled, so just return here</div><div class='hunk'>@@ -4882,7 +4872,7 @@ static int hclge_set_rss(struct hnae3_handle *handle, const u32 *indir,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hclge_set_rss_tuple(struct hnae3_handle *handle,</div><div class='del'>-			       struct ethtool_rxnfc *nfc)</div><div class='add'>+			       const struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_vport *vport = hclge_get_vport(handle);</div><div class='ctx'> 	struct hclge_dev *hdev = vport-&gt;back;</div><div class='hunk'>@@ -4900,7 +4890,7 @@ static int hclge_set_rss_tuple(struct hnae3_handle *handle,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hclge_get_rss_tuple(struct hnae3_handle *handle,</div><div class='del'>-			       struct ethtool_rxnfc *nfc)</div><div class='add'>+			       struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_vport *vport = hclge_get_vport(handle);</div><div class='ctx'> 	u8 tuple_sets;</div><div class='hunk'>@@ -6999,7 +6989,7 @@ static int hclge_get_all_rules(struct hnae3_handle *handle,</div><div class='ctx'> 	struct hclge_dev *hdev = vport-&gt;back;</div><div class='ctx'> 	struct hclge_fd_rule *rule;</div><div class='ctx'> 	struct hlist_node *node2;</div><div class='del'>-	int cnt = 0;</div><div class='add'>+	u32 cnt = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!hnae3_ae_dev_fd_supported(hdev-&gt;ae_dev))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -7885,7 +7875,7 @@ static int hclge_enable_phy_loopback(struct hclge_dev *hdev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return phy_loopback(phydev, true);</div><div class='add'>+	return phy_loopback(phydev, true, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hclge_disable_phy_loopback(struct hclge_dev *hdev,</div><div class='hunk'>@@ -7893,7 +7883,7 @@ static int hclge_disable_phy_loopback(struct hclge_dev *hdev,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = phy_loopback(phydev, false);</div><div class='add'>+	ret = phy_loopback(phydev, false, 0);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -8010,7 +8000,7 @@ static int hclge_set_loopback(struct hnae3_handle *handle,</div><div class='ctx'> 	ret = hclge_tqp_enable(handle, en);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev, "failed to %s tqp in loopback, ret = %d\n",</div><div class='del'>-			en ? "enable" : "disable", ret);</div><div class='add'>+			str_enable_disable(en), ret);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -8233,14 +8223,14 @@ static int hclge_update_desc_vfid(struct hclge_desc *desc, int vfid, bool clr)</div><div class='ctx'> 		word_num = vfid / 32;</div><div class='ctx'> 		bit_num  = vfid % 32;</div><div class='ctx'> 		if (clr)</div><div class='del'>-			desc[1].data[word_num] &amp;= cpu_to_le32(~(1 &lt;&lt; bit_num));</div><div class='add'>+			desc[1].data[word_num] &amp;= cpu_to_le32(~(1U &lt;&lt; bit_num));</div><div class='ctx'> 		else</div><div class='ctx'> 			desc[1].data[word_num] |= cpu_to_le32(1 &lt;&lt; bit_num);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		word_num = (vfid - HCLGE_VF_NUM_IN_FIRST_DESC) / 32;</div><div class='ctx'> 		bit_num  = vfid % 32;</div><div class='ctx'> 		if (clr)</div><div class='del'>-			desc[2].data[word_num] &amp;= cpu_to_le32(~(1 &lt;&lt; bit_num));</div><div class='add'>+			desc[2].data[word_num] &amp;= cpu_to_le32(~(1U &lt;&lt; bit_num));</div><div class='ctx'> 		else</div><div class='ctx'> 			desc[2].data[word_num] |= cpu_to_le32(1 &lt;&lt; bit_num);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -9302,7 +9292,7 @@ static int hclge_add_mgr_tbl(struct hclge_dev *hdev,</div><div class='ctx'> static int init_mgr_tbl(struct hclge_dev *hdev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	int i;</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(hclge_mgr_table); i++) {</div><div class='ctx'> 		ret = hclge_add_mgr_tbl(hdev, &amp;hclge_mgr_table[i]);</div><div class='hunk'>@@ -9439,8 +9429,7 @@ static int hclge_mii_ioctl(struct hclge_dev *hdev, struct ifreq *ifr, int cmd)</div><div class='ctx'> 		/* this command reads phy id and register at the same time */</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case SIOCGMIIREG:</div><div class='del'>-		data-&gt;val_out = hclge_read_phy_reg(hdev, data-&gt;reg_num);</div><div class='del'>-		return 0;</div><div class='add'>+		return hclge_read_phy_reg(hdev, data-&gt;reg_num, &amp;data-&gt;val_out);</div><div class='ctx'> </div><div class='ctx'> 	case SIOCSMIIREG:</div><div class='ctx'> 		return hclge_write_phy_reg(hdev, data-&gt;reg_num, data-&gt;val_in);</div><div class='hunk'>@@ -9455,15 +9444,8 @@ static int hclge_do_ioctl(struct hnae3_handle *handle, struct ifreq *ifr,</div><div class='ctx'> 	struct hclge_vport *vport = hclge_get_vport(handle);</div><div class='ctx'> 	struct hclge_dev *hdev = vport-&gt;back;</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return hclge_ptp_get_cfg(hdev, ifr);</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return hclge_ptp_set_cfg(hdev, ifr);</div><div class='del'>-	default:</div><div class='del'>-		if (!hdev-&gt;hw.mac.phydev)</div><div class='del'>-			return hclge_mii_ioctl(hdev, ifr, cmd);</div><div class='del'>-	}</div><div class='add'>+	if (!hdev-&gt;hw.mac.phydev)</div><div class='add'>+		return hclge_mii_ioctl(hdev, ifr, cmd);</div><div class='ctx'> </div><div class='ctx'> 	return phy_mii_ioctl(hdev-&gt;hw.mac.phydev, ifr, cmd);</div><div class='ctx'> }</div><div class='hunk'>@@ -9586,33 +9568,36 @@ static bool hclge_need_enable_vport_vlan_filter(struct hclge_vport *vport)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int hclge_enable_vport_vlan_filter(struct hclge_vport *vport, bool request_en)</div><div class='add'>+static int __hclge_enable_vport_vlan_filter(struct hclge_vport *vport,</div><div class='add'>+					    bool request_en)</div><div class='ctx'> {</div><div class='del'>-	struct hclge_dev *hdev = vport-&gt;back;</div><div class='ctx'> 	bool need_en;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;hdev-&gt;vport_lock);</div><div class='del'>-</div><div class='del'>-	vport-&gt;req_vlan_fltr_en = request_en;</div><div class='del'>-</div><div class='ctx'> 	need_en = hclge_need_enable_vport_vlan_filter(vport);</div><div class='del'>-	if (need_en == vport-&gt;cur_vlan_fltr_en) {</div><div class='del'>-		mutex_unlock(&amp;hdev-&gt;vport_lock);</div><div class='add'>+	if (need_en == vport-&gt;cur_vlan_fltr_en)</div><div class='ctx'> 		return 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_set_vport_vlan_filter(vport, need_en);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mutex_unlock(&amp;hdev-&gt;vport_lock);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	vport-&gt;cur_vlan_fltr_en = need_en;</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hclge_enable_vport_vlan_filter(struct hclge_vport *vport, bool request_en)</div><div class='add'>+{</div><div class='add'>+	struct hclge_dev *hdev = vport-&gt;back;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hdev-&gt;vport_lock);</div><div class='add'>+	vport-&gt;req_vlan_fltr_en = request_en;</div><div class='add'>+	ret = __hclge_enable_vport_vlan_filter(vport, request_en);</div><div class='ctx'> 	mutex_unlock(&amp;hdev-&gt;vport_lock);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hclge_enable_vlan_filter(struct hnae3_handle *handle, bool enable)</div><div class='hunk'>@@ -10633,16 +10618,19 @@ static void hclge_sync_vlan_fltr_state(struct hclge_dev *hdev)</div><div class='ctx'> 					&amp;vport-&gt;state))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		ret = hclge_enable_vport_vlan_filter(vport,</div><div class='del'>-						     vport-&gt;req_vlan_fltr_en);</div><div class='add'>+		mutex_lock(&amp;hdev-&gt;vport_lock);</div><div class='add'>+		ret = __hclge_enable_vport_vlan_filter(vport,</div><div class='add'>+						       vport-&gt;req_vlan_fltr_en);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"failed to sync vlan filter state for vport%u, ret = %d\n",</div><div class='ctx'> 				vport-&gt;vport_id, ret);</div><div class='ctx'> 			set_bit(HCLGE_VPORT_STATE_VLAN_FLTR_CHANGE,</div><div class='ctx'> 				&amp;vport-&gt;state);</div><div class='add'>+			mutex_unlock(&amp;hdev-&gt;vport_lock);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='add'>+		mutex_unlock(&amp;hdev-&gt;vport_lock);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -10723,7 +10711,7 @@ int hclge_set_vport_mtu(struct hclge_vport *vport, int new_mtu)</div><div class='ctx'> 	max_frm_size = max(max_frm_size, HCLGE_MAC_DEFAULT_FRAME);</div><div class='ctx'> 	mutex_lock(&amp;hdev-&gt;vport_lock);</div><div class='ctx'> 	/* VF's mps must fit within hdev-&gt;mps */</div><div class='del'>-	if (vport-&gt;vport_id &amp;&amp; max_frm_size &gt; hdev-&gt;mps) {</div><div class='add'>+	if (vport-&gt;vport_id &amp;&amp; (u32)max_frm_size &gt; hdev-&gt;mps) {</div><div class='ctx'> 		mutex_unlock(&amp;hdev-&gt;vport_lock);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	} else if (vport-&gt;vport_id) {</div><div class='hunk'>@@ -10734,7 +10722,7 @@ int hclge_set_vport_mtu(struct hclge_vport *vport, int new_mtu)</div><div class='ctx'> </div><div class='ctx'> 	/* PF's mps must be greater then VF's mps */</div><div class='ctx'> 	for (i = 1; i &lt; hdev-&gt;num_alloc_vport; i++)</div><div class='del'>-		if (max_frm_size &lt; hdev-&gt;vport[i].mps) {</div><div class='add'>+		if ((u32)max_frm_size &lt; hdev-&gt;vport[i].mps) {</div><div class='ctx'> 			dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"failed to set pf mtu for less than vport %d, mps = %u.\n",</div><div class='ctx'> 				i, hdev-&gt;vport[i].mps);</div><div class='hunk'>@@ -11210,9 +11198,9 @@ static void hclge_info_show(struct hclge_dev *hdev)</div><div class='ctx'> 	dev_info(dev, "This is %s PF\n",</div><div class='ctx'> 		 hdev-&gt;flag &amp; HCLGE_FLAG_MAIN ? "main" : "not main");</div><div class='ctx'> 	dev_info(dev, "DCB %s\n",</div><div class='del'>-		 handle-&gt;kinfo.tc_info.dcb_ets_active ? "enable" : "disable");</div><div class='add'>+		 str_enable_disable(handle-&gt;kinfo.tc_info.dcb_ets_active));</div><div class='ctx'> 	dev_info(dev, "MQPRIO %s\n",</div><div class='del'>-		 handle-&gt;kinfo.tc_info.mqprio_active ? "enable" : "disable");</div><div class='add'>+		 str_enable_disable(handle-&gt;kinfo.tc_info.mqprio_active));</div><div class='ctx'> 	dev_info(dev, "Default tx spare buffer size: %u\n",</div><div class='ctx'> 		 hdev-&gt;tx_spare_buf_size);</div><div class='ctx'> </div><div class='hunk'>@@ -11224,7 +11212,7 @@ static int hclge_init_nic_client_instance(struct hnae3_ae_dev *ae_dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_client *client = vport-&gt;nic.client;</div><div class='ctx'> 	struct hclge_dev *hdev = ae_dev-&gt;priv;</div><div class='del'>-	int rst_cnt = hdev-&gt;rst_stats.reset_cnt;</div><div class='add'>+	u32 rst_cnt = hdev-&gt;rst_stats.reset_cnt;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = client-&gt;ops-&gt;init_instance(&amp;vport-&gt;nic);</div><div class='hunk'>@@ -11268,7 +11256,7 @@ static int hclge_init_roce_client_instance(struct hnae3_ae_dev *ae_dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_dev *hdev = ae_dev-&gt;priv;</div><div class='ctx'> 	struct hnae3_client *client;</div><div class='del'>-	int rst_cnt;</div><div class='add'>+	u32 rst_cnt;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!hnae3_dev_roce_supported(hdev) || !hdev-&gt;roce_client ||</div><div class='hunk'>@@ -11433,7 +11421,7 @@ static int hclge_pci_init(struct hclge_dev *hdev)</div><div class='ctx'> 		ret = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(32));</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-				"can't set consistent PCI DMA");</div><div class='add'>+				"can't set consistent PCI DMA\n");</div><div class='ctx'> 			goto err_disable_device;</div><div class='ctx'> 		}</div><div class='ctx'> 		dev_warn(&amp;pdev-&gt;dev, "set DMA mask to 32 bits\n");</div><div class='hunk'>@@ -11502,7 +11490,7 @@ static void hclge_state_uninit(struct hclge_dev *hdev)</div><div class='ctx'> 	set_bit(HCLGE_STATE_REMOVING, &amp;hdev-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 	if (hdev-&gt;reset_timer.function)</div><div class='del'>-		del_timer_sync(&amp;hdev-&gt;reset_timer);</div><div class='add'>+		timer_delete_sync(&amp;hdev-&gt;reset_timer);</div><div class='ctx'> 	if (hdev-&gt;service_task.work.func)</div><div class='ctx'> 		cancel_delayed_work_sync(&amp;hdev-&gt;service_task);</div><div class='ctx'> }</div><div class='hunk'>@@ -11986,7 +11974,7 @@ static int hclge_set_vf_spoofchk_hw(struct hclge_dev *hdev, int vf, bool enable)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"Set vf %d mac spoof check %s failed, ret=%d\n",</div><div class='del'>-			vf, enable ? "on" : "off", ret);</div><div class='add'>+			vf, str_on_off(enable), ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -11994,7 +11982,7 @@ static int hclge_set_vf_spoofchk_hw(struct hclge_dev *hdev, int vf, bool enable)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"Set vf %d vlan spoof check %s failed, ret=%d\n",</div><div class='del'>-			vf, enable ? "on" : "off", ret);</div><div class='add'>+			vf, str_on_off(enable), ret);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -12098,7 +12086,7 @@ static int hclge_vf_rate_param_check(struct hclge_dev *hdev,</div><div class='ctx'> 				     int min_tx_rate, int max_tx_rate)</div><div class='ctx'> {</div><div class='ctx'> 	if (min_tx_rate != 0 ||</div><div class='del'>-	    max_tx_rate &lt; 0 || max_tx_rate &gt; hdev-&gt;hw.mac.max_speed) {</div><div class='add'>+	    max_tx_rate &lt; 0 || (u32)max_tx_rate &gt; hdev-&gt;hw.mac.max_speed) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"min_tx_rate:%d [0], max_tx_rate:%d [0, %u]\n",</div><div class='ctx'> 			min_tx_rate, max_tx_rate, hdev-&gt;hw.mac.max_speed);</div><div class='hunk'>@@ -12123,7 +12111,7 @@ static int hclge_set_vf_rate(struct hnae3_handle *handle, int vf,</div><div class='ctx'> 	if (!vport)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!force &amp;&amp; max_tx_rate == vport-&gt;vf_info.max_tx_rate)</div><div class='add'>+	if (!force &amp;&amp; (u32)max_tx_rate == vport-&gt;vf_info.max_tx_rate)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_tm_qs_shaper_cfg(vport, max_tx_rate);</div><div class='hunk'>@@ -12874,7 +12862,7 @@ static const struct hnae3_ae_ops hclge_ops = {</div><div class='ctx'> 	.get_fd_all_rules = hclge_get_all_rules,</div><div class='ctx'> 	.enable_fd = hclge_enable_fd,</div><div class='ctx'> 	.add_arfs_entry = hclge_add_fd_entry_by_arfs,</div><div class='del'>-	.dbg_read_cmd = hclge_dbg_read_cmd,</div><div class='add'>+	.dbg_get_read_func = hclge_dbg_get_read_func,</div><div class='ctx'> 	.handle_hw_ras_error = hclge_handle_hw_ras_error,</div><div class='ctx'> 	.get_hw_reset_stat = hclge_get_hw_reset_stat,</div><div class='ctx'> 	.ae_dev_resetting = hclge_ae_dev_resetting,</div><div class='hunk'>@@ -12905,6 +12893,8 @@ static const struct hnae3_ae_ops hclge_ops = {</div><div class='ctx'> 	.get_dscp_prio = hclge_get_dscp_prio,</div><div class='ctx'> 	.get_wol = hclge_get_wol,</div><div class='ctx'> 	.set_wol = hclge_set_wol,</div><div class='add'>+	.hwtstamp_get = hclge_ptp_get_cfg,</div><div class='add'>+	.hwtstamp_set = hclge_ptp_set_cfg,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct hnae3_ae_algo ae_algo = {</div><div class='hunk'>@@ -12914,9 +12904,10 @@ static struct hnae3_ae_algo ae_algo = {</div><div class='ctx'> </div><div class='ctx'> static int __init hclge_init(void)</div><div class='ctx'> {</div><div class='del'>-	pr_info("%s is initializing\n", HCLGE_NAME);</div><div class='add'>+	pr_debug("%s is initializing\n", HCLGE_NAME);</div><div class='ctx'> </div><div class='del'>-	hclge_wq = alloc_workqueue("%s", WQ_UNBOUND, 0, HCLGE_NAME);</div><div class='add'>+	hclge_wq = alloc_workqueue("%s", WQ_UNBOUND, 0,</div><div class='add'>+				   HCLGE_NAME);</div><div class='ctx'> 	if (!hclge_wq) {</div><div class='ctx'> 		pr_err("%s: failed to create workqueue\n", HCLGE_NAME);</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -12929,9 +12920,11 @@ static int __init hclge_init(void)</div><div class='ctx'> </div><div class='ctx'> static void __exit hclge_exit(void)</div><div class='ctx'> {</div><div class='add'>+	hnae3_acquire_unload_lock();</div><div class='ctx'> 	hnae3_unregister_ae_algo_prepare(&amp;ae_algo);</div><div class='ctx'> 	hnae3_unregister_ae_algo(&amp;ae_algo);</div><div class='ctx'> 	destroy_workqueue(hclge_wq);</div><div class='add'>+	hnae3_release_unload_lock();</div><div class='ctx'> }</div><div class='ctx'> module_init(hclge_init);</div><div class='ctx'> module_exit(hclge_exit);</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h<br/>index b9fc719880bb..032b472d2368 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h</a></div><div class='hunk'>@@ -1142,8 +1142,8 @@ int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id);</div><div class='ctx'> int hclge_vport_start(struct hclge_vport *vport);</div><div class='ctx'> void hclge_vport_stop(struct hclge_vport *vport);</div><div class='ctx'> int hclge_set_vport_mtu(struct hclge_vport *vport, int new_mtu);</div><div class='del'>-int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,</div><div class='del'>-		       char *buf, int len);</div><div class='add'>+int hclge_dbg_get_read_func(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,</div><div class='add'>+			    read_func *func);</div><div class='ctx'> u16 hclge_covert_handle_qid_global(struct hnae3_handle *handle, u16 queue_id);</div><div class='ctx'> int hclge_notify_client(struct hclge_dev *hdev,</div><div class='ctx'> 			enum hnae3_reset_notify_type type);</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c<br/>index 59c863306657..c7ff12a6c076 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c</a></div><div class='hunk'>@@ -749,16 +749,17 @@ static int hclge_get_rss_key(struct hclge_vport *vport,</div><div class='ctx'> #define HCLGE_RSS_MBX_RESP_LEN	8</div><div class='ctx'> 	struct hclge_dev *hdev = vport-&gt;back;</div><div class='ctx'> 	struct hclge_comm_rss_cfg *rss_cfg;</div><div class='add'>+	int rss_hash_key_size;</div><div class='ctx'> 	u8 index;</div><div class='ctx'> </div><div class='ctx'> 	index = mbx_req-&gt;msg.data[0];</div><div class='ctx'> 	rss_cfg = &amp;hdev-&gt;rss_cfg;</div><div class='add'>+	rss_hash_key_size = sizeof(rss_cfg-&gt;rss_hash_key);</div><div class='ctx'> </div><div class='ctx'> 	/* Check the query index of rss_hash_key from VF, make sure no</div><div class='ctx'> 	 * more than the size of rss_hash_key.</div><div class='ctx'> 	 */</div><div class='del'>-	if (((index + 1) * HCLGE_RSS_MBX_RESP_LEN) &gt;</div><div class='del'>-	      sizeof(rss_cfg-&gt;rss_hash_key)) {</div><div class='add'>+	if (((index + 1) * HCLGE_RSS_MBX_RESP_LEN) &gt; rss_hash_key_size) {</div><div class='ctx'> 		dev_warn(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "failed to get the rss hash key, the index(%u) invalid !\n",</div><div class='ctx'> 			 index);</div><div class='hunk'>@@ -800,7 +801,7 @@ static void hclge_handle_link_change_event(struct hclge_dev *hdev,</div><div class='ctx'> </div><div class='ctx'> static bool hclge_cmd_crq_empty(struct hclge_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	u32 tail = hclge_read_dev(hw, HCLGE_COMM_NIC_CRQ_TAIL_REG);</div><div class='add'>+	int tail = hclge_read_dev(hw, HCLGE_COMM_NIC_CRQ_TAIL_REG);</div><div class='ctx'> </div><div class='ctx'> 	return tail == hw-&gt;hw.cmq.crq.next_to_use;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c<br/>index 80079657afeb..cf881108fa57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c</a></div><div class='hunk'>@@ -151,7 +151,7 @@ int hclge_mac_mdio_config(struct hclge_dev *hdev)</div><div class='ctx'> </div><div class='ctx'> 	mdio_bus-&gt;parent = &amp;hdev-&gt;pdev-&gt;dev;</div><div class='ctx'> 	mdio_bus-&gt;priv = hdev;</div><div class='del'>-	mdio_bus-&gt;phy_mask = ~(1 &lt;&lt; mac-&gt;phy_addr);</div><div class='add'>+	mdio_bus-&gt;phy_mask = ~(1U &lt;&lt; mac-&gt;phy_addr);</div><div class='ctx'> 	ret = mdiobus_register(mdio_bus);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(mdio_bus-&gt;parent,</div><div class='hunk'>@@ -258,7 +258,7 @@ void hclge_mac_start_phy(struct hclge_dev *hdev)</div><div class='ctx'> 	if (!phydev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	phy_loopback(phydev, false);</div><div class='add'>+	phy_loopback(phydev, false, 0);</div><div class='ctx'> </div><div class='ctx'> 	phy_start(phydev);</div><div class='ctx'> }</div><div class='hunk'>@@ -274,7 +274,7 @@ void hclge_mac_stop_phy(struct hclge_dev *hdev)</div><div class='ctx'> 	phy_stop(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u16 hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr)</div><div class='add'>+int hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 *val)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclge_phy_reg_cmd *req;</div><div class='ctx'> 	struct hclge_desc desc;</div><div class='hunk'>@@ -286,11 +286,14 @@ u16 hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr)</div><div class='ctx'> 	req-&gt;reg_addr = cpu_to_le16(reg_addr);</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_cmd_send(&amp;hdev-&gt;hw, &amp;desc, 1);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"failed to read phy reg, ret = %d.\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return le16_to_cpu(req-&gt;reg_val);</div><div class='add'>+	*val = le16_to_cpu(req-&gt;reg_val);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int hclge_write_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 val)</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h<br/>index 4200d0b6d931..21d434c82475 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@ int hclge_mac_connect_phy(struct hnae3_handle *handle);</div><div class='ctx'> void hclge_mac_disconnect_phy(struct hnae3_handle *handle);</div><div class='ctx'> void hclge_mac_start_phy(struct hclge_dev *hdev);</div><div class='ctx'> void hclge_mac_stop_phy(struct hclge_dev *hdev);</div><div class='del'>-u16 hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr);</div><div class='add'>+int hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 *val);</div><div class='ctx'> int hclge_write_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 val);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c<br/>index bab16c2191b2..0081c5281455 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> // Copyright (c) 2021 Hisilicon Limited.</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include "hclge_main.h"</div><div class='ctx'> #include "hnae3.h"</div><div class='ctx'> </div><div class='hunk'>@@ -203,13 +204,17 @@ static int hclge_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int hclge_ptp_get_cfg(struct hclge_dev *hdev, struct ifreq *ifr)</div><div class='add'>+int hclge_ptp_get_cfg(struct hnae3_handle *handle,</div><div class='add'>+		      struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='add'>+	struct hclge_vport *vport = hclge_get_vport(handle);</div><div class='add'>+	struct hclge_dev *hdev = vport-&gt;back;</div><div class='add'>+</div><div class='ctx'> 	if (!test_bit(HCLGE_STATE_PTP_EN, &amp;hdev-&gt;state))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;hdev-&gt;ptp-&gt;ts_cfg,</div><div class='del'>-		sizeof(struct hwtstamp_config)) ? -EFAULT : 0;</div><div class='add'>+	*config = hdev-&gt;ptp-&gt;ts_cfg;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hclge_ptp_int_en(struct hclge_dev *hdev, bool en)</div><div class='hunk'>@@ -226,7 +231,7 @@ static int hclge_ptp_int_en(struct hclge_dev *hdev, bool en)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"failed to %s ptp interrupt, ret = %d\n",</div><div class='del'>-			en ? "enable" : "disable", ret);</div><div class='add'>+			str_enable_disable(en), ret);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -268,7 +273,7 @@ static int hclge_ptp_cfg(struct hclge_dev *hdev, u32 cfg)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_ptp_set_tx_mode(struct hwtstamp_config *cfg,</div><div class='add'>+static int hclge_ptp_set_tx_mode(struct kernel_hwtstamp_config *cfg,</div><div class='ctx'> 				 unsigned long *flags, u32 *ptp_cfg)</div><div class='ctx'> {</div><div class='ctx'> 	switch (cfg-&gt;tx_type) {</div><div class='hunk'>@@ -286,7 +291,7 @@ static int hclge_ptp_set_tx_mode(struct hwtstamp_config *cfg,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclge_ptp_set_rx_mode(struct hwtstamp_config *cfg,</div><div class='add'>+static int hclge_ptp_set_rx_mode(struct kernel_hwtstamp_config *cfg,</div><div class='ctx'> 				 unsigned long *flags, u32 *ptp_cfg)</div><div class='ctx'> {</div><div class='ctx'> 	int rx_filter = cfg-&gt;rx_filter;</div><div class='hunk'>@@ -331,7 +336,7 @@ static int hclge_ptp_set_rx_mode(struct hwtstamp_config *cfg,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hclge_ptp_set_ts_mode(struct hclge_dev *hdev,</div><div class='del'>-				 struct hwtstamp_config *cfg)</div><div class='add'>+				 struct kernel_hwtstamp_config *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags = hdev-&gt;ptp-&gt;flags;</div><div class='ctx'> 	u32 ptp_cfg = 0;</div><div class='hunk'>@@ -358,9 +363,12 @@ static int hclge_ptp_set_ts_mode(struct hclge_dev *hdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int hclge_ptp_set_cfg(struct hclge_dev *hdev, struct ifreq *ifr)</div><div class='add'>+int hclge_ptp_set_cfg(struct hnae3_handle *handle,</div><div class='add'>+		      struct kernel_hwtstamp_config *config,</div><div class='add'>+		      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='add'>+	struct hclge_vport *vport = hclge_get_vport(handle);</div><div class='add'>+	struct hclge_dev *hdev = vport-&gt;back;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(HCLGE_STATE_PTP_EN, &amp;hdev-&gt;state)) {</div><div class='hunk'>@@ -368,16 +376,13 @@ int hclge_ptp_set_cfg(struct hclge_dev *hdev, struct ifreq *ifr)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	ret = hclge_ptp_set_ts_mode(hdev, &amp;cfg);</div><div class='add'>+	ret = hclge_ptp_set_ts_mode(hdev, config);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	hdev-&gt;ptp-&gt;ts_cfg = cfg;</div><div class='add'>+	hdev-&gt;ptp-&gt;ts_cfg = *config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int hclge_ptp_get_ts_info(struct hnae3_handle *handle,</div><div class='hunk'>@@ -439,6 +444,13 @@ static int hclge_ptp_create_clock(struct hclge_dev *hdev)</div><div class='ctx'> 	ptp-&gt;info.settime64 = hclge_ptp_settime;</div><div class='ctx'> </div><div class='ctx'> 	ptp-&gt;info.n_alarm = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;ptp-&gt;lock);</div><div class='add'>+	ptp-&gt;io_base = hdev-&gt;hw.hw.io_base + HCLGE_PTP_REG_OFFSET;</div><div class='add'>+	ptp-&gt;ts_cfg.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+	ptp-&gt;ts_cfg.tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+	hdev-&gt;ptp = ptp;</div><div class='add'>+</div><div class='ctx'> 	ptp-&gt;clock = ptp_clock_register(&amp;ptp-&gt;info, &amp;hdev-&gt;pdev-&gt;dev);</div><div class='ctx'> 	if (IS_ERR(ptp-&gt;clock)) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='hunk'>@@ -450,12 +462,6 @@ static int hclge_ptp_create_clock(struct hclge_dev *hdev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;ptp-&gt;lock);</div><div class='del'>-	ptp-&gt;io_base = hdev-&gt;hw.hw.io_base + HCLGE_PTP_REG_OFFSET;</div><div class='del'>-	ptp-&gt;ts_cfg.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='del'>-	ptp-&gt;ts_cfg.tx_type = HWTSTAMP_TX_OFF;</div><div class='del'>-	hdev-&gt;ptp = ptp;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -483,7 +489,7 @@ int hclge_ptp_init(struct hclge_dev *hdev)</div><div class='ctx'> </div><div class='ctx'> 		ret = hclge_ptp_get_cycle(hdev);</div><div class='ctx'> 		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_ptp_int_en(hdev, true);</div><div class='hunk'>@@ -495,14 +501,14 @@ int hclge_ptp_init(struct hclge_dev *hdev)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"failed to init freq, ret = %d\n", ret);</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_clear_int;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = hclge_ptp_set_ts_mode(hdev, &amp;hdev-&gt;ptp-&gt;ts_cfg);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"failed to init ts mode, ret = %d\n", ret);</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_clear_int;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ktime_get_real_ts64(&amp;ts);</div><div class='hunk'>@@ -510,7 +516,7 @@ int hclge_ptp_init(struct hclge_dev *hdev)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"failed to init ts time, ret = %d\n", ret);</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_clear_int;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	set_bit(HCLGE_STATE_PTP_EN, &amp;hdev-&gt;state);</div><div class='hunk'>@@ -518,6 +524,9 @@ int hclge_ptp_init(struct hclge_dev *hdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+out_clear_int:</div><div class='add'>+	clear_bit(HCLGE_PTP_FLAG_EN, &amp;hdev-&gt;ptp-&gt;flags);</div><div class='add'>+	hclge_ptp_int_en(hdev, false);</div><div class='ctx'> out:</div><div class='ctx'> 	hclge_ptp_destroy_clock(hdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h<br/>index 63483636c074..0162fa5ac146 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h</a></div><div class='hunk'>@@ -25,7 +25,7 @@ struct ifreq;</div><div class='ctx'> #define HCLGE_PTP_TIME_SEC_H_MASK	GENMASK(15, 0)</div><div class='ctx'> #define HCLGE_PTP_TIME_SEC_L_REG	0x54</div><div class='ctx'> #define HCLGE_PTP_TIME_NSEC_REG		0x58</div><div class='del'>-#define HCLGE_PTP_TIME_NSEC_MASK	GENMASK(29, 0)</div><div class='add'>+#define HCLGE_PTP_TIME_NSEC_MASK	0x3fffffffLL</div><div class='ctx'> #define HCLGE_PTP_TIME_NSEC_NEG		BIT(31)</div><div class='ctx'> #define HCLGE_PTP_TIME_SYNC_REG		0x5C</div><div class='ctx'> #define HCLGE_PTP_TIME_SYNC_EN		BIT(0)</div><div class='hunk'>@@ -62,7 +62,7 @@ struct hclge_ptp {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	void __iomem *io_base;</div><div class='ctx'> 	struct ptp_clock_info info;</div><div class='del'>-	struct hwtstamp_config ts_cfg;</div><div class='add'>+	struct kernel_hwtstamp_config ts_cfg;</div><div class='ctx'> 	spinlock_t lock;	/* protects ptp registers */</div><div class='ctx'> 	u32 ptp_cfg;</div><div class='ctx'> 	u32 last_tx_seqid;</div><div class='hunk'>@@ -133,8 +133,11 @@ bool hclge_ptp_set_tx_info(struct hnae3_handle *handle, struct sk_buff *skb);</div><div class='ctx'> void hclge_ptp_clean_tx_hwts(struct hclge_dev *hdev);</div><div class='ctx'> void hclge_ptp_get_rx_hwts(struct hnae3_handle *handle, struct sk_buff *skb,</div><div class='ctx'> 			   u32 nsec, u32 sec);</div><div class='del'>-int hclge_ptp_get_cfg(struct hclge_dev *hdev, struct ifreq *ifr);</div><div class='del'>-int hclge_ptp_set_cfg(struct hclge_dev *hdev, struct ifreq *ifr);</div><div class='add'>+int hclge_ptp_get_cfg(struct hnae3_handle *handle,</div><div class='add'>+		      struct kernel_hwtstamp_config *config);</div><div class='add'>+int hclge_ptp_set_cfg(struct hnae3_handle *handle,</div><div class='add'>+		      struct kernel_hwtstamp_config *config,</div><div class='add'>+		      struct netlink_ext_ack *extack);</div><div class='ctx'> int hclge_ptp_init(struct hclge_dev *hdev);</div><div class='ctx'> void hclge_ptp_uninit(struct hclge_dev *hdev);</div><div class='ctx'> int hclge_ptp_get_ts_info(struct hnae3_handle *handle,</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c<br/>index 896f1eb172d3..8fcf220a120d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c</a></div><div class='hunk'>@@ -130,12 +130,10 @@ static int hclgevf_get_sset_count(struct hnae3_handle *handle, int strset)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hclgevf_get_strings(struct hnae3_handle *handle, u32 strset,</div><div class='del'>-				u8 *data)</div><div class='add'>+				u8 **data)</div><div class='ctx'> {</div><div class='del'>-	u8 *p = (char *)data;</div><div class='del'>-</div><div class='ctx'> 	if (strset == ETH_SS_STATS)</div><div class='del'>-		p = hclge_comm_tqps_get_strings(handle, p);</div><div class='add'>+		hclge_comm_tqps_get_strings(handle, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hclgevf_get_stats(struct hnae3_handle *handle, u64 *data)</div><div class='hunk'>@@ -608,7 +606,7 @@ static int hclgevf_set_rss(struct hnae3_handle *handle, const u32 *indir,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hclgevf_set_rss_tuple(struct hnae3_handle *handle,</div><div class='del'>-				 struct ethtool_rxnfc *nfc)</div><div class='add'>+				 const struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -626,7 +624,7 @@ static int hclgevf_set_rss_tuple(struct hnae3_handle *handle,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hclgevf_get_rss_tuple(struct hnae3_handle *handle,</div><div class='del'>-				 struct ethtool_rxnfc *nfc)</div><div class='add'>+				 struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);</div><div class='ctx'> 	u8 tuple_sets;</div><div class='hunk'>@@ -1294,9 +1292,8 @@ static void hclgevf_sync_vlan_filter(struct hclgevf_dev *hdev)</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)</div><div class='add'>+static int hclgevf_en_hw_strip_rxvtag_cmd(struct hclgevf_dev *hdev, bool enable)</div><div class='ctx'> {</div><div class='del'>-	struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);</div><div class='ctx'> 	struct hclge_vf_to_pf_msg send_msg;</div><div class='ctx'> </div><div class='ctx'> 	hclgevf_build_send_msg(&amp;send_msg, HCLGE_MBX_SET_VLAN,</div><div class='hunk'>@@ -1305,6 +1302,19 @@ static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)</div><div class='ctx'> 	return hclgevf_send_mbx_msg(hdev, &amp;send_msg, false, NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = hclgevf_en_hw_strip_rxvtag_cmd(hdev, enable);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	hdev-&gt;rxvtag_strip_en = enable;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hclgevf_reset_tqp(struct hnae3_handle *handle)</div><div class='ctx'> {</div><div class='ctx'> #define HCLGEVF_RESET_ALL_QUEUE_DONE	1U</div><div class='hunk'>@@ -2047,7 +2057,7 @@ static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev,</div><div class='ctx'> </div><div class='ctx'> static void hclgevf_reset_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct hclgevf_dev *hdev = from_timer(hdev, t, reset_timer);</div><div class='add'>+	struct hclgevf_dev *hdev = timer_container_of(hdev, t, reset_timer);</div><div class='ctx'> </div><div class='ctx'> 	hclgevf_clear_event_cause(hdev, HCLGEVF_VECTOR0_EVENT_RST);</div><div class='ctx'> 	hclgevf_reset_task_schedule(hdev);</div><div class='hunk'>@@ -2206,12 +2216,13 @@ static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev)</div><div class='ctx'> 					  tc_valid, tc_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev)</div><div class='add'>+static int hclgevf_init_vlan_config(struct hclgevf_dev *hdev,</div><div class='add'>+				    bool rxvtag_strip_en)</div><div class='ctx'> {</div><div class='ctx'> 	struct hnae3_handle *nic = &amp;hdev-&gt;nic;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclgevf_en_hw_strip_rxvtag(nic, true);</div><div class='add'>+	ret = hclgevf_en_hw_strip_rxvtag(nic, rxvtag_strip_en);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"failed to enable rx vlan offload, ret = %d\n", ret);</div><div class='hunk'>@@ -2315,6 +2326,7 @@ static void hclgevf_state_init(struct hclgevf_dev *hdev)</div><div class='ctx'> 	clear_bit(HCLGEVF_STATE_RST_FAIL, &amp;hdev-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;hdev-&gt;service_task, hclgevf_service_task);</div><div class='add'>+	/* timer needs to be initialized before misc irq */</div><div class='ctx'> 	timer_setup(&amp;hdev-&gt;reset_timer, hclgevf_reset_timer, 0);</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;hdev-&gt;mbx_resp.mbx_mutex);</div><div class='hunk'>@@ -2453,7 +2465,7 @@ static int hclgevf_init_nic_client_instance(struct hnae3_ae_dev *ae_dev,</div><div class='ctx'> 					    struct hnae3_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	struct hclgevf_dev *hdev = ae_dev-&gt;priv;</div><div class='del'>-	int rst_cnt = hdev-&gt;rst_stats.rst_cnt;</div><div class='add'>+	u32 rst_cnt = hdev-&gt;rst_stats.rst_cnt;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = client-&gt;ops-&gt;init_instance(&amp;hdev-&gt;nic);</div><div class='hunk'>@@ -2613,7 +2625,7 @@ static int hclgevf_pci_init(struct hclgevf_dev *hdev)</div><div class='ctx'> </div><div class='ctx'> 	ret = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "can't set consistent PCI DMA, exiting");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "can't set consistent PCI DMA, exiting\n");</div><div class='ctx'> 		goto err_disable_device;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2880,7 +2892,7 @@ static int hclgevf_reset_hdev(struct hclgevf_dev *hdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = hclgevf_init_vlan_config(hdev);</div><div class='add'>+	ret = hclgevf_init_vlan_config(hdev, hdev-&gt;rxvtag_strip_en);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"failed(%d) to initialize VLAN config\n", ret);</div><div class='hunk'>@@ -2995,7 +3007,7 @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev)</div><div class='ctx'> 		goto err_config;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = hclgevf_init_vlan_config(hdev);</div><div class='add'>+	ret = hclgevf_init_vlan_config(hdev, true);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;hdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"failed(%d) to initialize VLAN config\n", ret);</div><div class='hunk'>@@ -3082,11 +3094,7 @@ static void hclgevf_uninit_ae_dev(struct hnae3_ae_dev *ae_dev)</div><div class='ctx'> </div><div class='ctx'> static u32 hclgevf_get_max_channels(struct hclgevf_dev *hdev)</div><div class='ctx'> {</div><div class='del'>-	struct hnae3_handle *nic = &amp;hdev-&gt;nic;</div><div class='del'>-	struct hnae3_knic_private_info *kinfo = &amp;nic-&gt;kinfo;</div><div class='del'>-</div><div class='del'>-	return min_t(u32, hdev-&gt;rss_size_max,</div><div class='del'>-		     hdev-&gt;num_tqps / kinfo-&gt;tc_info.num_tc);</div><div class='add'>+	return min(hdev-&gt;rss_size_max, hdev-&gt;num_tqps);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3411,8 +3419,10 @@ static int __init hclgevf_init(void)</div><div class='ctx'> </div><div class='ctx'> static void __exit hclgevf_exit(void)</div><div class='ctx'> {</div><div class='add'>+	hnae3_acquire_unload_lock();</div><div class='ctx'> 	hnae3_unregister_ae_algo(&amp;ae_algovf);</div><div class='ctx'> 	destroy_workqueue(hclgevf_wq);</div><div class='add'>+	hnae3_release_unload_lock();</div><div class='ctx'> }</div><div class='ctx'> module_init(hclgevf_init);</div><div class='ctx'> module_exit(hclgevf_exit);</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h<br/>index cccef3228461..0208425ab594 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h</a></div><div class='hunk'>@@ -253,6 +253,7 @@ struct hclgevf_dev {</div><div class='ctx'> 	int *vector_irq;</div><div class='ctx'> </div><div class='ctx'> 	bool gro_en;</div><div class='add'>+	bool rxvtag_strip_en;</div><div class='ctx'> </div><div class='ctx'> 	unsigned long vlan_del_fail_bmap[BITS_TO_LONGS(VLAN_N_VID)];</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c<br/>index 85c2a634c8f9..f5c99ca54369 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c</a></div><div class='hunk'>@@ -159,7 +159,7 @@ static bool hclgevf_cmd_crq_empty(struct hclgevf_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tail = hclgevf_read_dev(hw, HCLGE_COMM_NIC_CRQ_TAIL_REG);</div><div class='ctx'> </div><div class='del'>-	return tail == hw-&gt;hw.cmq.crq.next_to_use;</div><div class='add'>+	return tail == (u32)hw-&gt;hw.cmq.crq.next_to_use;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hclgevf_handle_mbx_response(struct hclgevf_dev *hdev,</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c<br/>index 7d9d9dbc7560..9de01e344e27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c</a></div><div class='hunk'>@@ -127,37 +127,38 @@ void hclgevf_get_regs(struct hnae3_handle *handle, u32 *version,</div><div class='ctx'> </div><div class='ctx'> 	struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);</div><div class='ctx'> 	struct hnae3_queue *tqp;</div><div class='del'>-	int i, j, reg_um;</div><div class='add'>+	int i, j, reg_num;</div><div class='ctx'> 	u32 *reg = data;</div><div class='ctx'> </div><div class='ctx'> 	*version = hdev-&gt;fw_version;</div><div class='ctx'> 	reg += hclgevf_reg_get_header(reg);</div><div class='ctx'> </div><div class='ctx'> 	/* fetching per-VF registers values from VF PCIe register space */</div><div class='del'>-	reg_um = ARRAY_SIZE(cmdq_reg_addr_list);</div><div class='del'>-	reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_CMDQ, reg_um, reg);</div><div class='del'>-	for (i = 0; i &lt; reg_um; i++)</div><div class='add'>+	reg_num = ARRAY_SIZE(cmdq_reg_addr_list);</div><div class='add'>+	reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_CMDQ, reg_num, reg);</div><div class='add'>+	for (i = 0; i &lt; reg_num; i++)</div><div class='ctx'> 		*reg++ = hclgevf_read_dev(&amp;hdev-&gt;hw, cmdq_reg_addr_list[i]);</div><div class='ctx'> </div><div class='del'>-	reg_um = ARRAY_SIZE(common_reg_addr_list);</div><div class='del'>-	reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_COMMON, reg_um, reg);</div><div class='del'>-	for (i = 0; i &lt; reg_um; i++)</div><div class='add'>+	reg_num = ARRAY_SIZE(common_reg_addr_list);</div><div class='add'>+	reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_COMMON, reg_num, reg);</div><div class='add'>+	for (i = 0; i &lt; reg_num; i++)</div><div class='ctx'> 		*reg++ = hclgevf_read_dev(&amp;hdev-&gt;hw, common_reg_addr_list[i]);</div><div class='ctx'> </div><div class='del'>-	reg_um = ARRAY_SIZE(ring_reg_addr_list);</div><div class='add'>+	reg_num = ARRAY_SIZE(ring_reg_addr_list);</div><div class='ctx'> 	for (j = 0; j &lt; hdev-&gt;num_tqps; j++) {</div><div class='del'>-		reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_RING, reg_um, reg);</div><div class='add'>+		reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_RING, reg_num, reg);</div><div class='ctx'> 		tqp = &amp;hdev-&gt;htqp[j].q;</div><div class='del'>-		for (i = 0; i &lt; reg_um; i++)</div><div class='add'>+		for (i = 0; i &lt; reg_num; i++)</div><div class='ctx'> 			*reg++ = readl_relaxed(tqp-&gt;io_base -</div><div class='ctx'> 					       HCLGEVF_TQP_REG_OFFSET +</div><div class='ctx'> 					       ring_reg_addr_list[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	reg_um = ARRAY_SIZE(tqp_intr_reg_addr_list);</div><div class='add'>+	reg_num = ARRAY_SIZE(tqp_intr_reg_addr_list);</div><div class='ctx'> 	for (j = 0; j &lt; hdev-&gt;num_msi_used - 1; j++) {</div><div class='del'>-		reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_TQP_INTR, reg_um, reg);</div><div class='del'>-		for (i = 0; i &lt; reg_um; i++)</div><div class='add'>+		reg += hclgevf_reg_get_tlv(HCLGEVF_REG_TAG_TQP_INTR,</div><div class='add'>+					   reg_num, reg);</div><div class='add'>+		for (i = 0; i &lt; reg_num; i++)</div><div class='ctx'> 			*reg++ = hclgevf_read_dev(&amp;hdev-&gt;hw,</div><div class='ctx'> 						  tqp_intr_reg_addr_list[i] +</div><div class='ctx'> 						  HCLGEVF_RING_INT_REG_OFFSET * j);</div><div class='head'>diff --git a/drivers/net/ethernet/hisilicon/hns_mdio.c b/drivers/net/ethernet/hisilicon/hns_mdio.c<br/>index a1aa6c1f966e..6812be8dc64f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/hisilicon/hns_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/hisilicon/hns_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/hisilicon/hns_mdio.c</a></div><div class='hunk'>@@ -640,7 +640,7 @@ static struct platform_driver hns_mdio_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		   .name = MDIO_DRV_NAME,</div><div class='ctx'> 		   .of_match_table = hns_mdio_match,</div><div class='del'>-		   .acpi_match_table = ACPI_PTR(hns_mdio_acpi_match),</div><div class='add'>+		   .acpi_match_table = hns_mdio_acpi_match,</div><div class='ctx'> 		   },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/huawei/Kconfig b/drivers/net/ethernet/huawei/Kconfig<br/>index c05fce15eb51..7d0feb1da158 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/Kconfig</a></div><div class='hunk'>@@ -16,5 +16,6 @@ config NET_VENDOR_HUAWEI</div><div class='ctx'> if NET_VENDOR_HUAWEI</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/ethernet/huawei/hinic/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/huawei/hinic3/Kconfig"</div><div class='ctx'> </div><div class='ctx'> endif # NET_VENDOR_HUAWEI</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/Makefile b/drivers/net/ethernet/huawei/Makefile<br/>index 2549ad5afe6d..59865b882879 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/Makefile</a></div><div class='hunk'>@@ -4,3 +4,4 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_HINIC) += hinic/</div><div class='add'>+obj-$(CONFIG_HINIC3) += hinic3/</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic/hinic_devlink.c b/drivers/net/ethernet/huawei/hinic/hinic_devlink.c<br/>index 03e42512a2d5..300bc267a259 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic/hinic_devlink.c</a></div><div class='hunk'>@@ -443,8 +443,9 @@ int hinic_health_reporters_create(struct hinic_devlink_priv *priv)</div><div class='ctx'> 	struct devlink *devlink = priv_to_devlink(priv);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;hw_fault_reporter =</div><div class='del'>-		devlink_health_reporter_create(devlink, &amp;hinic_hw_fault_reporter_ops,</div><div class='del'>-					       0, priv);</div><div class='add'>+		devlink_health_reporter_create(devlink,</div><div class='add'>+					       &amp;hinic_hw_fault_reporter_ops,</div><div class='add'>+					       priv);</div><div class='ctx'> 	if (IS_ERR(priv-&gt;hw_fault_reporter)) {</div><div class='ctx'> 		dev_warn(&amp;priv-&gt;hwdev-&gt;hwif-&gt;pdev-&gt;dev, "Failed to create hw fault reporter, err: %ld\n",</div><div class='ctx'> 			 PTR_ERR(priv-&gt;hw_fault_reporter));</div><div class='hunk'>@@ -452,8 +453,9 @@ int hinic_health_reporters_create(struct hinic_devlink_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;fw_fault_reporter =</div><div class='del'>-		devlink_health_reporter_create(devlink, &amp;hinic_fw_fault_reporter_ops,</div><div class='del'>-					       0, priv);</div><div class='add'>+		devlink_health_reporter_create(devlink,</div><div class='add'>+					       &amp;hinic_fw_fault_reporter_ops,</div><div class='add'>+					       priv);</div><div class='ctx'> 	if (IS_ERR(priv-&gt;fw_fault_reporter)) {</div><div class='ctx'> 		dev_warn(&amp;priv-&gt;hwdev-&gt;hwif-&gt;pdev-&gt;dev, "Failed to create fw fault reporter, err: %ld\n",</div><div class='ctx'> 			 PTR_ERR(priv-&gt;fw_fault_reporter));</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic/hinic_ethtool.c b/drivers/net/ethernet/huawei/hinic/hinic_ethtool.c<br/>index c559dd4291d3..e9f338e9dbe7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic/hinic_ethtool.c</a></div><div class='hunk'>@@ -919,9 +919,10 @@ static int hinic_set_channels(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hinic_get_rss_hash_opts(struct hinic_dev *nic_dev,</div><div class='del'>-				   struct ethtool_rxnfc *cmd)</div><div class='add'>+static int hinic_get_rxfh_fields(struct net_device *netdev,</div><div class='add'>+				 struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct hinic_dev *nic_dev = netdev_priv(netdev);</div><div class='ctx'> 	struct hinic_rss_type rss_type = { 0 };</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -964,7 +965,7 @@ static int hinic_get_rss_hash_opts(struct hinic_dev *nic_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int set_l4_rss_hash_ops(struct ethtool_rxnfc *cmd,</div><div class='add'>+static int set_l4_rss_hash_ops(const struct ethtool_rxfh_fields *cmd,</div><div class='ctx'> 			       struct hinic_rss_type *rss_type)</div><div class='ctx'> {</div><div class='ctx'> 	u8 rss_l4_en = 0;</div><div class='hunk'>@@ -1000,16 +1001,18 @@ static int set_l4_rss_hash_ops(struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hinic_set_rss_hash_opts(struct hinic_dev *nic_dev,</div><div class='del'>-				   struct ethtool_rxnfc *cmd)</div><div class='add'>+static int hinic_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hinic_rss_type *rss_type = &amp;nic_dev-&gt;rss_type;</div><div class='add'>+	struct hinic_dev *nic_dev = netdev_priv(dev);</div><div class='add'>+	struct hinic_rss_type *rss_type;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (!(nic_dev-&gt;flags &amp; HINIC_RSS_ENABLE)) {</div><div class='del'>-		cmd-&gt;data = 0;</div><div class='add'>+	rss_type = &amp;nic_dev-&gt;rss_type;</div><div class='add'>+</div><div class='add'>+	if (!(nic_dev-&gt;flags &amp; HINIC_RSS_ENABLE))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* RSS does not support anything other than hashing</div><div class='ctx'> 	 * to queues on src and dst IPs and ports</div><div class='hunk'>@@ -1108,26 +1111,6 @@ static int hinic_get_rxnfc(struct net_device *netdev,</div><div class='ctx'> 	case ETHTOOL_GRXRINGS:</div><div class='ctx'> 		cmd-&gt;data = nic_dev-&gt;num_qps;</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		err = hinic_get_rss_hash_opts(nic_dev, cmd);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		err = -EOPNOTSUPP;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hinic_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='del'>-{</div><div class='del'>-	struct hinic_dev *nic_dev = netdev_priv(netdev);</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		err = hinic_set_rss_hash_opts(nic_dev, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EOPNOTSUPP;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1797,11 +1780,12 @@ static const struct ethtool_ops hinic_ethtool_ops = {</div><div class='ctx'> 	.get_channels = hinic_get_channels,</div><div class='ctx'> 	.set_channels = hinic_set_channels,</div><div class='ctx'> 	.get_rxnfc = hinic_get_rxnfc,</div><div class='del'>-	.set_rxnfc = hinic_set_rxnfc,</div><div class='ctx'> 	.get_rxfh_key_size = hinic_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh_indir_size = hinic_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh = hinic_get_rxfh,</div><div class='ctx'> 	.set_rxfh = hinic_set_rxfh,</div><div class='add'>+	.get_rxfh_fields = hinic_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields = hinic_set_rxfh_fields,</div><div class='ctx'> 	.get_sset_count = hinic_get_sset_count,</div><div class='ctx'> 	.get_ethtool_stats = hinic_get_ethtool_stats,</div><div class='ctx'> 	.get_strings = hinic_get_strings,</div><div class='hunk'>@@ -1829,11 +1813,12 @@ static const struct ethtool_ops hinicvf_ethtool_ops = {</div><div class='ctx'> 	.get_channels = hinic_get_channels,</div><div class='ctx'> 	.set_channels = hinic_set_channels,</div><div class='ctx'> 	.get_rxnfc = hinic_get_rxnfc,</div><div class='del'>-	.set_rxnfc = hinic_set_rxnfc,</div><div class='ctx'> 	.get_rxfh_key_size = hinic_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh_indir_size = hinic_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh = hinic_get_rxfh,</div><div class='ctx'> 	.set_rxfh = hinic_set_rxfh,</div><div class='add'>+	.get_rxfh_fields = hinic_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields = hinic_set_rxfh_fields,</div><div class='ctx'> 	.get_sset_count = hinic_get_sset_count,</div><div class='ctx'> 	.get_ethtool_stats = hinic_get_ethtool_stats,</div><div class='ctx'> 	.get_strings = hinic_get_strings,</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c b/drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c<br/>index 045c47786a04..28114a59347e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c</a></div><div class='hunk'>@@ -605,7 +605,7 @@ static void aeq_elements_init(struct hinic_eq *eq, u32 init_val)</div><div class='ctx'> /**</div><div class='ctx'>  * ceq_elements_init - Initialize all the elements in the ceq</div><div class='ctx'>  * @eq: the event queue</div><div class='del'>- * @init_val: value to init with it the elements</div><div class='add'>+ * @init_val: value to init the elements with</div><div class='ctx'>  **/</div><div class='ctx'> static void ceq_elements_init(struct hinic_eq *eq, u32 init_val)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c b/drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c<br/>index 3f9c31d29215..97c1584dc05b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c</a></div><div class='hunk'>@@ -861,7 +861,7 @@ static int send_mbox_to_func(struct hinic_mbox_func_to_func *func_to_func,</div><div class='ctx'> 		 HINIC_MBOX_HEADER_SET(NOT_LAST_SEG, LAST) |</div><div class='ctx'> 		 HINIC_MBOX_HEADER_SET(direction, DIRECTION) |</div><div class='ctx'> 		 HINIC_MBOX_HEADER_SET(cmd, CMD) |</div><div class='del'>-		 /* The vf's offset to it's associated pf */</div><div class='add'>+		 /* The vf's offset to its associated pf */</div><div class='ctx'> 		 HINIC_MBOX_HEADER_SET(msg_info-&gt;msg_id, MSG_ID) |</div><div class='ctx'> 		 HINIC_MBOX_HEADER_SET(msg_info-&gt;status, STATUS) |</div><div class='ctx'> 		 HINIC_MBOX_HEADER_SET(hinic_global_func_id_hw(hwdev-&gt;hwif),</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic/hinic_main.c b/drivers/net/ethernet/huawei/hinic/hinic_main.c<br/>index 890f213da8d1..ae1f523d6841 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic/hinic_main.c</a></div><div class='hunk'>@@ -172,6 +172,7 @@ err_init_txq:</div><div class='ctx'> 	hinic_sq_dbgfs_uninit(nic_dev);</div><div class='ctx'> </div><div class='ctx'> 	devm_kfree(&amp;netdev-&gt;dev, nic_dev-&gt;txqs);</div><div class='add'>+	nic_dev-&gt;txqs = NULL;</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -268,6 +269,7 @@ err_init_rxq:</div><div class='ctx'> 	hinic_rq_dbgfs_uninit(nic_dev);</div><div class='ctx'> </div><div class='ctx'> 	devm_kfree(&amp;netdev-&gt;dev, nic_dev-&gt;rxqs);</div><div class='add'>+	nic_dev-&gt;rxqs = NULL;</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic/hinic_port.c b/drivers/net/ethernet/huawei/hinic/hinic_port.c<br/>index f81a43d2cdfc..486fb0e20bef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/huawei/hinic/hinic_port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic/hinic_port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic/hinic_port.c</a></div><div class='hunk'>@@ -469,7 +469,7 @@ int hinic_set_vlan_fliter(struct hinic_dev *nic_dev, u32 en)</div><div class='ctx'> 		err = HINIC_MGMT_CMD_UNSUPPORTED;</div><div class='ctx'> 	} else if (err || !out_size || vlan_filter.status) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-			"Failed to set vlan fliter, err: %d, status: 0x%x, out size: 0x%x\n",</div><div class='add'>+			"Failed to set vlan filter, err: %d, status: 0x%x, out size: 0x%x\n",</div><div class='ctx'> 			err, vlan_filter.status, out_size);</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/Kconfig b/drivers/net/ethernet/huawei/hinic3/Kconfig<br/>new file mode 100644<br/>index 000000000000..ce4331d1387b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Huawei driver configuration</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+config HINIC3</div><div class='add'>+	tristate "Huawei 3rd generation network adapters (HINIC3) support"</div><div class='add'>+	# Fields of HW and management structures are little endian and are</div><div class='add'>+	# currently not converted</div><div class='add'>+	depends on !CPU_BIG_ENDIAN</div><div class='add'>+	depends on X86 || ARM64 || COMPILE_TEST</div><div class='add'>+	depends on PCI_MSI &amp;&amp; 64BIT</div><div class='add'>+	select AUXILIARY_BUS</div><div class='add'>+	select PAGE_POOL</div><div class='add'>+	help</div><div class='add'>+	  This driver supports HiNIC 3rd gen Network Adapter (HINIC3).</div><div class='add'>+	  The driver is supported on X86_64 and ARM64 little endian.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here.</div><div class='add'>+	  The module will be called hinic3.</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/Makefile b/drivers/net/ethernet/huawei/hinic3/Makefile<br/>new file mode 100644<br/>index 000000000000..c3efa45a6a42<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/Makefile</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_HINIC3) += hinic3.o</div><div class='add'>+</div><div class='add'>+hinic3-objs := hinic3_cmdq.o \</div><div class='add'>+	       hinic3_common.o \</div><div class='add'>+	       hinic3_eqs.o \</div><div class='add'>+	       hinic3_hw_cfg.o \</div><div class='add'>+	       hinic3_hw_comm.o \</div><div class='add'>+	       hinic3_hwdev.o \</div><div class='add'>+	       hinic3_hwif.o \</div><div class='add'>+	       hinic3_irq.o \</div><div class='add'>+	       hinic3_lld.o \</div><div class='add'>+	       hinic3_main.o \</div><div class='add'>+	       hinic3_mbox.o \</div><div class='add'>+	       hinic3_mgmt.o \</div><div class='add'>+	       hinic3_netdev_ops.o \</div><div class='add'>+	       hinic3_nic_cfg.o \</div><div class='add'>+	       hinic3_nic_io.o \</div><div class='add'>+	       hinic3_queue_common.o \</div><div class='add'>+	       hinic3_rss.o \</div><div class='add'>+	       hinic3_rx.o \</div><div class='add'>+	       hinic3_tx.o \</div><div class='add'>+	       hinic3_wq.o</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c b/drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c<br/>new file mode 100644<br/>index 000000000000..ef539d1b69a3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c</a></div><div class='hunk'>@@ -0,0 +1,915 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_cmdq.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_mbox.h"</div><div class='add'>+</div><div class='add'>+#define CMDQ_BUF_SIZE             2048</div><div class='add'>+#define CMDQ_WQEBB_SIZE           64</div><div class='add'>+</div><div class='add'>+#define CMDQ_CMD_TIMEOUT          5000</div><div class='add'>+#define CMDQ_ENABLE_WAIT_TIMEOUT  300</div><div class='add'>+</div><div class='add'>+#define CMDQ_CTXT_CURR_WQE_PAGE_PFN_MASK  GENMASK_ULL(51, 0)</div><div class='add'>+#define CMDQ_CTXT_EQ_ID_MASK              GENMASK_ULL(60, 53)</div><div class='add'>+#define CMDQ_CTXT_CEQ_ARM_MASK            BIT_ULL(61)</div><div class='add'>+#define CMDQ_CTXT_CEQ_EN_MASK             BIT_ULL(62)</div><div class='add'>+#define CMDQ_CTXT_HW_BUSY_BIT_MASK        BIT_ULL(63)</div><div class='add'>+</div><div class='add'>+#define CMDQ_CTXT_WQ_BLOCK_PFN_MASK       GENMASK_ULL(51, 0)</div><div class='add'>+#define CMDQ_CTXT_CI_MASK                 GENMASK_ULL(63, 52)</div><div class='add'>+#define CMDQ_CTXT_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(CMDQ_CTXT_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define CMDQ_WQE_HDR_BUFDESC_LEN_MASK        GENMASK(7, 0)</div><div class='add'>+#define CMDQ_WQE_HDR_COMPLETE_FMT_MASK       BIT(15)</div><div class='add'>+#define CMDQ_WQE_HDR_DATA_FMT_MASK           BIT(22)</div><div class='add'>+#define CMDQ_WQE_HDR_COMPLETE_REQ_MASK       BIT(23)</div><div class='add'>+#define CMDQ_WQE_HDR_COMPLETE_SECT_LEN_MASK  GENMASK(28, 27)</div><div class='add'>+#define CMDQ_WQE_HDR_CTRL_LEN_MASK           GENMASK(30, 29)</div><div class='add'>+#define CMDQ_WQE_HDR_HW_BUSY_BIT_MASK        BIT(31)</div><div class='add'>+#define CMDQ_WQE_HDR_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(CMDQ_WQE_HDR_##member##_MASK, val)</div><div class='add'>+#define CMDQ_WQE_HDR_GET(val, member)  \</div><div class='add'>+	FIELD_GET(CMDQ_WQE_HDR_##member##_MASK, le32_to_cpu(val))</div><div class='add'>+</div><div class='add'>+#define CMDQ_CTRL_PI_MASK              GENMASK(15, 0)</div><div class='add'>+#define CMDQ_CTRL_CMD_MASK             GENMASK(23, 16)</div><div class='add'>+#define CMDQ_CTRL_MOD_MASK             GENMASK(28, 24)</div><div class='add'>+#define CMDQ_CTRL_HW_BUSY_BIT_MASK     BIT(31)</div><div class='add'>+#define CMDQ_CTRL_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(CMDQ_CTRL_##member##_MASK, val)</div><div class='add'>+#define CMDQ_CTRL_GET(val, member)  \</div><div class='add'>+	FIELD_GET(CMDQ_CTRL_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define CMDQ_WQE_ERRCODE_VAL_MASK      GENMASK(30, 0)</div><div class='add'>+#define CMDQ_WQE_ERRCODE_GET(val, member)  \</div><div class='add'>+	FIELD_GET(CMDQ_WQE_ERRCODE_##member##_MASK, le32_to_cpu(val))</div><div class='add'>+</div><div class='add'>+#define CMDQ_DB_INFO_HI_PROD_IDX_MASK  GENMASK(7, 0)</div><div class='add'>+#define CMDQ_DB_INFO_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(CMDQ_DB_INFO_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define CMDQ_DB_HEAD_QUEUE_TYPE_MASK   BIT(23)</div><div class='add'>+#define CMDQ_DB_HEAD_CMDQ_TYPE_MASK    GENMASK(26, 24)</div><div class='add'>+#define CMDQ_DB_HEAD_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(CMDQ_DB_HEAD_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define CMDQ_CEQE_TYPE_MASK            GENMASK(2, 0)</div><div class='add'>+#define CMDQ_CEQE_GET(val, member)  \</div><div class='add'>+	FIELD_GET(CMDQ_CEQE_##member##_MASK, le32_to_cpu(val))</div><div class='add'>+</div><div class='add'>+#define CMDQ_WQE_HEADER(wqe)           ((struct cmdq_header *)(wqe))</div><div class='add'>+#define CMDQ_WQE_COMPLETED(ctrl_info)  \</div><div class='add'>+	CMDQ_CTRL_GET(le32_to_cpu(ctrl_info), HW_BUSY_BIT)</div><div class='add'>+</div><div class='add'>+#define CMDQ_PFN(addr)  ((addr) &gt;&gt; 12)</div><div class='add'>+</div><div class='add'>+/* cmdq work queue's chip logical address table is up to 512B */</div><div class='add'>+#define CMDQ_WQ_CLA_SIZE  512</div><div class='add'>+</div><div class='add'>+/* Completion codes: send, direct sync, force stop */</div><div class='add'>+#define CMDQ_SEND_CMPT_CODE         10</div><div class='add'>+#define CMDQ_DIRECT_SYNC_CMPT_CODE  11</div><div class='add'>+#define CMDQ_FORCE_STOP_CMPT_CODE   12</div><div class='add'>+</div><div class='add'>+enum cmdq_data_format {</div><div class='add'>+	CMDQ_DATA_SGE    = 0,</div><div class='add'>+	CMDQ_DATA_DIRECT = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum cmdq_ctrl_sect_len {</div><div class='add'>+	CMDQ_CTRL_SECT_LEN        = 1,</div><div class='add'>+	CMDQ_CTRL_DIRECT_SECT_LEN = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum cmdq_bufdesc_len {</div><div class='add'>+	CMDQ_BUFDESC_LCMD_LEN = 2,</div><div class='add'>+	CMDQ_BUFDESC_SCMD_LEN = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum cmdq_completion_format {</div><div class='add'>+	CMDQ_COMPLETE_DIRECT = 0,</div><div class='add'>+	CMDQ_COMPLETE_SGE    = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum cmdq_cmd_type {</div><div class='add'>+	CMDQ_CMD_DIRECT_RESP,</div><div class='add'>+	CMDQ_CMD_SGE_RESP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define CMDQ_WQE_NUM_WQEBBS  1</div><div class='add'>+</div><div class='add'>+static struct cmdq_wqe *cmdq_read_wqe(struct hinic3_wq *wq, u16 *ci)</div><div class='add'>+{</div><div class='add'>+	if (hinic3_wq_get_used(wq) == 0)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	*ci = wq-&gt;cons_idx &amp; wq-&gt;idx_mask;</div><div class='add'>+</div><div class='add'>+	return get_q_element(&amp;wq-&gt;qpages, wq-&gt;cons_idx, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct hinic3_cmd_buf *hinic3_alloc_cmd_buf(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmd_buf *cmd_buf;</div><div class='add'>+	struct hinic3_cmdqs *cmdqs;</div><div class='add'>+</div><div class='add'>+	cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+</div><div class='add'>+	cmd_buf = kmalloc(sizeof(*cmd_buf), GFP_ATOMIC);</div><div class='add'>+	if (!cmd_buf)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	cmd_buf-&gt;buf = dma_pool_alloc(cmdqs-&gt;cmd_buf_pool, GFP_ATOMIC,</div><div class='add'>+				      &amp;cmd_buf-&gt;dma_addr);</div><div class='add'>+	if (!cmd_buf-&gt;buf) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to allocate cmdq cmd buf from the pool\n");</div><div class='add'>+		goto err_free_cmd_buf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd_buf-&gt;size = cpu_to_le16(CMDQ_BUF_SIZE);</div><div class='add'>+	refcount_set(&amp;cmd_buf-&gt;ref_cnt, 1);</div><div class='add'>+</div><div class='add'>+	return cmd_buf;</div><div class='add'>+</div><div class='add'>+err_free_cmd_buf:</div><div class='add'>+	kfree(cmd_buf);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_cmd_buf(struct hinic3_hwdev *hwdev,</div><div class='add'>+			 struct hinic3_cmd_buf *cmd_buf)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdqs *cmdqs;</div><div class='add'>+</div><div class='add'>+	if (!refcount_dec_and_test(&amp;cmd_buf-&gt;ref_cnt))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+</div><div class='add'>+	dma_pool_free(cmdqs-&gt;cmd_buf_pool, cmd_buf-&gt;buf, cmd_buf-&gt;dma_addr);</div><div class='add'>+	kfree(cmd_buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_clear_cmd_buf(struct hinic3_cmdq_cmd_info *cmd_info,</div><div class='add'>+			       struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	if (cmd_info-&gt;buf_in) {</div><div class='add'>+		hinic3_free_cmd_buf(hwdev, cmd_info-&gt;buf_in);</div><div class='add'>+		cmd_info-&gt;buf_in = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clear_wqe_complete_bit(struct hinic3_cmdq *cmdq,</div><div class='add'>+				   struct cmdq_wqe *wqe, u16 ci)</div><div class='add'>+{</div><div class='add'>+	struct cmdq_header *hdr = CMDQ_WQE_HEADER(wqe);</div><div class='add'>+	__le32 header_info = hdr-&gt;header_info;</div><div class='add'>+	enum cmdq_data_format df;</div><div class='add'>+	struct cmdq_ctrl *ctrl;</div><div class='add'>+</div><div class='add'>+	df = CMDQ_WQE_HDR_GET(header_info, DATA_FMT);</div><div class='add'>+	if (df == CMDQ_DATA_SGE)</div><div class='add'>+		ctrl = &amp;wqe-&gt;wqe_lcmd.ctrl;</div><div class='add'>+	else</div><div class='add'>+		ctrl = &amp;wqe-&gt;wqe_scmd.ctrl;</div><div class='add'>+</div><div class='add'>+	/* clear HW busy bit */</div><div class='add'>+	ctrl-&gt;ctrl_info = 0;</div><div class='add'>+	cmdq-&gt;cmd_infos[ci].cmd_type = HINIC3_CMD_TYPE_NONE;</div><div class='add'>+	wmb(); /* verify wqe is clear before updating ci */</div><div class='add'>+	hinic3_wq_put_wqebbs(&amp;cmdq-&gt;wq, CMDQ_WQE_NUM_WQEBBS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_update_cmd_status(struct hinic3_cmdq *cmdq, u16 prod_idx,</div><div class='add'>+				   struct cmdq_wqe *wqe)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdq_cmd_info *cmd_info;</div><div class='add'>+	struct cmdq_wqe_lcmd *wqe_lcmd;</div><div class='add'>+	__le32 status_info;</div><div class='add'>+</div><div class='add'>+	wqe_lcmd = &amp;wqe-&gt;wqe_lcmd;</div><div class='add'>+	cmd_info = &amp;cmdq-&gt;cmd_infos[prod_idx];</div><div class='add'>+	if (cmd_info-&gt;errcode) {</div><div class='add'>+		status_info = wqe_lcmd-&gt;status.status_info;</div><div class='add'>+		*cmd_info-&gt;errcode = CMDQ_WQE_ERRCODE_GET(status_info, VAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmd_info-&gt;direct_resp)</div><div class='add'>+		*cmd_info-&gt;direct_resp = wqe_lcmd-&gt;completion.resp.direct.val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_sync_cmd_handler(struct hinic3_cmdq *cmdq,</div><div class='add'>+				  struct cmdq_wqe *wqe, u16 ci)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+	cmdq_update_cmd_status(cmdq, ci, wqe);</div><div class='add'>+	if (cmdq-&gt;cmd_infos[ci].cmpt_code) {</div><div class='add'>+		*cmdq-&gt;cmd_infos[ci].cmpt_code = CMDQ_DIRECT_SYNC_CMPT_CODE;</div><div class='add'>+		cmdq-&gt;cmd_infos[ci].cmpt_code = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Ensure that completion code has been updated before updating done */</div><div class='add'>+	smp_wmb();</div><div class='add'>+	if (cmdq-&gt;cmd_infos[ci].done) {</div><div class='add'>+		complete(cmdq-&gt;cmd_infos[ci].done);</div><div class='add'>+		cmdq-&gt;cmd_infos[ci].done = NULL;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+</div><div class='add'>+	cmdq_clear_cmd_buf(&amp;cmdq-&gt;cmd_infos[ci], cmdq-&gt;hwdev);</div><div class='add'>+	clear_wqe_complete_bit(cmdq, wqe, ci);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_cmdq_ceq_handler(struct hinic3_hwdev *hwdev, __le32 ceqe_data)</div><div class='add'>+{</div><div class='add'>+	enum hinic3_cmdq_type cmdq_type = CMDQ_CEQE_GET(ceqe_data, TYPE);</div><div class='add'>+	struct hinic3_cmdqs *cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+	struct hinic3_cmdq_cmd_info *cmd_info;</div><div class='add'>+	struct cmdq_wqe_lcmd *wqe_lcmd;</div><div class='add'>+	struct hinic3_cmdq *cmdq;</div><div class='add'>+	struct cmdq_wqe *wqe;</div><div class='add'>+	__le32 ctrl_info;</div><div class='add'>+	u16 ci;</div><div class='add'>+</div><div class='add'>+	if (unlikely(cmdq_type &gt;= ARRAY_SIZE(cmdqs-&gt;cmdq)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cmdq = &amp;cmdqs-&gt;cmdq[cmdq_type];</div><div class='add'>+	while ((wqe = cmdq_read_wqe(&amp;cmdq-&gt;wq, &amp;ci)) != NULL) {</div><div class='add'>+		cmd_info = &amp;cmdq-&gt;cmd_infos[ci];</div><div class='add'>+		switch (cmd_info-&gt;cmd_type) {</div><div class='add'>+		case HINIC3_CMD_TYPE_NONE:</div><div class='add'>+			return;</div><div class='add'>+		case HINIC3_CMD_TYPE_TIMEOUT:</div><div class='add'>+			dev_warn(hwdev-&gt;dev, "Cmdq timeout, q_id: %u, ci: %u\n",</div><div class='add'>+				 cmdq_type, ci);</div><div class='add'>+			fallthrough;</div><div class='add'>+		case HINIC3_CMD_TYPE_FAKE_TIMEOUT:</div><div class='add'>+			cmdq_clear_cmd_buf(cmd_info, hwdev);</div><div class='add'>+			clear_wqe_complete_bit(cmdq, wqe, ci);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			/* only arm bit is using scmd wqe,</div><div class='add'>+			 * the other wqe is lcmd</div><div class='add'>+			 */</div><div class='add'>+			wqe_lcmd = &amp;wqe-&gt;wqe_lcmd;</div><div class='add'>+			ctrl_info = wqe_lcmd-&gt;ctrl.ctrl_info;</div><div class='add'>+			if (!CMDQ_WQE_COMPLETED(ctrl_info))</div><div class='add'>+				return;</div><div class='add'>+</div><div class='add'>+			dma_rmb();</div><div class='add'>+			/* For FORCE_STOP cmd_type, we also need to wait for</div><div class='add'>+			 * the firmware processing to complete to prevent the</div><div class='add'>+			 * firmware from accessing the released cmd_buf</div><div class='add'>+			 */</div><div class='add'>+			if (cmd_info-&gt;cmd_type == HINIC3_CMD_TYPE_FORCE_STOP) {</div><div class='add'>+				cmdq_clear_cmd_buf(cmd_info, hwdev);</div><div class='add'>+				clear_wqe_complete_bit(cmdq, wqe, ci);</div><div class='add'>+			} else {</div><div class='add'>+				cmdq_sync_cmd_handler(cmdq, wqe, ci);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wait_cmdqs_enable(struct hinic3_cmdqs *cmdqs)</div><div class='add'>+{</div><div class='add'>+	unsigned long end;</div><div class='add'>+</div><div class='add'>+	end = jiffies + msecs_to_jiffies(CMDQ_ENABLE_WAIT_TIMEOUT);</div><div class='add'>+	do {</div><div class='add'>+		if (cmdqs-&gt;status &amp; HINIC3_CMDQ_ENABLE)</div><div class='add'>+			return 0;</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+	} while (time_before(jiffies, end) &amp;&amp; !cmdqs-&gt;disable_flag);</div><div class='add'>+</div><div class='add'>+	cmdqs-&gt;disable_flag = 1;</div><div class='add'>+</div><div class='add'>+	return -EBUSY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_set_completion(struct cmdq_completion *complete,</div><div class='add'>+				struct hinic3_cmd_buf *buf_out)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_sge *sge = &amp;complete-&gt;resp.sge;</div><div class='add'>+</div><div class='add'>+	hinic3_set_sge(sge, buf_out-&gt;dma_addr, cpu_to_le32(CMDQ_BUF_SIZE));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct cmdq_wqe *cmdq_get_wqe(struct hinic3_wq *wq, u16 *pi)</div><div class='add'>+{</div><div class='add'>+	if (!hinic3_wq_free_wqebbs(wq))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return hinic3_wq_get_one_wqebb(wq, pi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_set_lcmd_bufdesc(struct cmdq_wqe_lcmd *wqe,</div><div class='add'>+				  struct hinic3_cmd_buf *buf_in)</div><div class='add'>+{</div><div class='add'>+	hinic3_set_sge(&amp;wqe-&gt;buf_desc.sge, buf_in-&gt;dma_addr,</div><div class='add'>+		       (__force __le32)buf_in-&gt;size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_set_db(struct hinic3_cmdq *cmdq,</div><div class='add'>+			enum hinic3_cmdq_type cmdq_type, u16 prod_idx)</div><div class='add'>+{</div><div class='add'>+	u8 __iomem *db_base = cmdq-&gt;hwdev-&gt;cmdqs-&gt;cmdqs_db_base;</div><div class='add'>+	u16 db_ofs = (prod_idx &amp; 0xFF) &lt;&lt; 3;</div><div class='add'>+	struct cmdq_db db;</div><div class='add'>+</div><div class='add'>+	db.db_info = cpu_to_le32(CMDQ_DB_INFO_SET(prod_idx &gt;&gt; 8, HI_PROD_IDX));</div><div class='add'>+	db.db_head = cpu_to_le32(CMDQ_DB_HEAD_SET(1, QUEUE_TYPE) |</div><div class='add'>+				 CMDQ_DB_HEAD_SET(cmdq_type, CMDQ_TYPE));</div><div class='add'>+	writeq(*(u64 *)&amp;db, db_base + db_ofs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_wqe_fill(struct cmdq_wqe *hw_wqe,</div><div class='add'>+			  const struct cmdq_wqe *shadow_wqe)</div><div class='add'>+{</div><div class='add'>+	const struct cmdq_header *src = (struct cmdq_header *)shadow_wqe;</div><div class='add'>+	struct cmdq_header *dst = (struct cmdq_header *)hw_wqe;</div><div class='add'>+	size_t len;</div><div class='add'>+</div><div class='add'>+	len = sizeof(struct cmdq_wqe) - sizeof(struct cmdq_header);</div><div class='add'>+	memcpy(dst + 1, src + 1, len);</div><div class='add'>+	/* Ensure buffer len before updating header */</div><div class='add'>+	wmb();</div><div class='add'>+	WRITE_ONCE(*dst, *src);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_prepare_wqe_ctrl(struct cmdq_wqe *wqe, u8 wrapped,</div><div class='add'>+				  u8 mod, u8 cmd, u16 prod_idx,</div><div class='add'>+				  enum cmdq_completion_format complete_format,</div><div class='add'>+				  enum cmdq_data_format data_format,</div><div class='add'>+				  enum cmdq_bufdesc_len buf_len)</div><div class='add'>+{</div><div class='add'>+	struct cmdq_header *hdr = CMDQ_WQE_HEADER(wqe);</div><div class='add'>+	enum cmdq_ctrl_sect_len ctrl_len;</div><div class='add'>+	struct cmdq_wqe_lcmd *wqe_lcmd;</div><div class='add'>+	struct cmdq_wqe_scmd *wqe_scmd;</div><div class='add'>+	struct cmdq_ctrl *ctrl;</div><div class='add'>+</div><div class='add'>+	if (data_format == CMDQ_DATA_SGE) {</div><div class='add'>+		wqe_lcmd = &amp;wqe-&gt;wqe_lcmd;</div><div class='add'>+		wqe_lcmd-&gt;status.status_info = 0;</div><div class='add'>+		ctrl = &amp;wqe_lcmd-&gt;ctrl;</div><div class='add'>+		ctrl_len = CMDQ_CTRL_SECT_LEN;</div><div class='add'>+	} else {</div><div class='add'>+		wqe_scmd = &amp;wqe-&gt;wqe_scmd;</div><div class='add'>+		wqe_scmd-&gt;status.status_info = 0;</div><div class='add'>+		ctrl = &amp;wqe_scmd-&gt;ctrl;</div><div class='add'>+		ctrl_len = CMDQ_CTRL_DIRECT_SECT_LEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctrl-&gt;ctrl_info =</div><div class='add'>+		cpu_to_le32(CMDQ_CTRL_SET(prod_idx, PI) |</div><div class='add'>+			    CMDQ_CTRL_SET(cmd, CMD) |</div><div class='add'>+			    CMDQ_CTRL_SET(mod, MOD));</div><div class='add'>+</div><div class='add'>+	hdr-&gt;header_info =</div><div class='add'>+		cpu_to_le32(CMDQ_WQE_HDR_SET(buf_len, BUFDESC_LEN) |</div><div class='add'>+			    CMDQ_WQE_HDR_SET(complete_format, COMPLETE_FMT) |</div><div class='add'>+			    CMDQ_WQE_HDR_SET(data_format, DATA_FMT) |</div><div class='add'>+			    CMDQ_WQE_HDR_SET(1, COMPLETE_REQ) |</div><div class='add'>+			    CMDQ_WQE_HDR_SET(3, COMPLETE_SECT_LEN) |</div><div class='add'>+			    CMDQ_WQE_HDR_SET(ctrl_len, CTRL_LEN) |</div><div class='add'>+			    CMDQ_WQE_HDR_SET(wrapped, HW_BUSY_BIT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_set_lcmd_wqe(struct cmdq_wqe *wqe,</div><div class='add'>+			      enum cmdq_cmd_type cmd_type,</div><div class='add'>+			      struct hinic3_cmd_buf *buf_in,</div><div class='add'>+			      struct hinic3_cmd_buf *buf_out,</div><div class='add'>+			      u8 wrapped, u8 mod, u8 cmd, u16 prod_idx)</div><div class='add'>+{</div><div class='add'>+	enum cmdq_completion_format complete_format = CMDQ_COMPLETE_DIRECT;</div><div class='add'>+	struct cmdq_wqe_lcmd *wqe_lcmd = &amp;wqe-&gt;wqe_lcmd;</div><div class='add'>+</div><div class='add'>+	switch (cmd_type) {</div><div class='add'>+	case CMDQ_CMD_DIRECT_RESP:</div><div class='add'>+		wqe_lcmd-&gt;completion.resp.direct.val = 0;</div><div class='add'>+		break;</div><div class='add'>+	case CMDQ_CMD_SGE_RESP:</div><div class='add'>+		if (buf_out) {</div><div class='add'>+			complete_format = CMDQ_COMPLETE_SGE;</div><div class='add'>+			cmdq_set_completion(&amp;wqe_lcmd-&gt;completion, buf_out);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmdq_prepare_wqe_ctrl(wqe, wrapped, mod, cmd, prod_idx, complete_format,</div><div class='add'>+			      CMDQ_DATA_SGE, CMDQ_BUFDESC_LCMD_LEN);</div><div class='add'>+	cmdq_set_lcmd_bufdesc(wqe_lcmd, buf_in);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_cmdq_sync_timeout_check(struct hinic3_cmdq *cmdq,</div><div class='add'>+					  struct cmdq_wqe *wqe, u16 pi)</div><div class='add'>+{</div><div class='add'>+	struct cmdq_wqe_lcmd *wqe_lcmd;</div><div class='add'>+	struct cmdq_ctrl *ctrl;</div><div class='add'>+	__le32 ctrl_info;</div><div class='add'>+</div><div class='add'>+	wqe_lcmd = &amp;wqe-&gt;wqe_lcmd;</div><div class='add'>+	ctrl = &amp;wqe_lcmd-&gt;ctrl;</div><div class='add'>+	ctrl_info = ctrl-&gt;ctrl_info;</div><div class='add'>+	if (!CMDQ_WQE_COMPLETED(ctrl_info)) {</div><div class='add'>+		dev_dbg(cmdq-&gt;hwdev-&gt;dev, "Cmdq sync command check busy bit not set\n");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+	cmdq_update_cmd_status(cmdq, pi, wqe);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clear_cmd_info(struct hinic3_cmdq_cmd_info *cmd_info,</div><div class='add'>+			   const struct hinic3_cmdq_cmd_info *saved_cmd_info)</div><div class='add'>+{</div><div class='add'>+	if (cmd_info-&gt;errcode == saved_cmd_info-&gt;errcode)</div><div class='add'>+		cmd_info-&gt;errcode = NULL;</div><div class='add'>+</div><div class='add'>+	if (cmd_info-&gt;done == saved_cmd_info-&gt;done)</div><div class='add'>+		cmd_info-&gt;done = NULL;</div><div class='add'>+</div><div class='add'>+	if (cmd_info-&gt;direct_resp == saved_cmd_info-&gt;direct_resp)</div><div class='add'>+		cmd_info-&gt;direct_resp = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wait_cmdq_sync_cmd_completion(struct hinic3_cmdq *cmdq,</div><div class='add'>+					 struct hinic3_cmdq_cmd_info *cmd_info,</div><div class='add'>+					 struct hinic3_cmdq_cmd_info *saved_cmd_info,</div><div class='add'>+					 u64 curr_msg_id, u16 curr_prod_idx,</div><div class='add'>+					 struct cmdq_wqe *curr_wqe,</div><div class='add'>+					 u32 timeout)</div><div class='add'>+{</div><div class='add'>+	ulong timeo = msecs_to_jiffies(timeout);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (wait_for_completion_timeout(saved_cmd_info-&gt;done, timeo))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+	if (cmd_info-&gt;cmpt_code == saved_cmd_info-&gt;cmpt_code)</div><div class='add'>+		cmd_info-&gt;cmpt_code = NULL;</div><div class='add'>+</div><div class='add'>+	if (*saved_cmd_info-&gt;cmpt_code == CMDQ_DIRECT_SYNC_CMPT_CODE) {</div><div class='add'>+		dev_dbg(cmdq-&gt;hwdev-&gt;dev, "Cmdq direct sync command has been completed\n");</div><div class='add'>+		spin_unlock_bh(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (curr_msg_id == cmd_info-&gt;cmdq_msg_id) {</div><div class='add'>+		err = hinic3_cmdq_sync_timeout_check(cmdq, curr_wqe,</div><div class='add'>+						     curr_prod_idx);</div><div class='add'>+		if (err)</div><div class='add'>+			cmd_info-&gt;cmd_type = HINIC3_CMD_TYPE_TIMEOUT;</div><div class='add'>+		else</div><div class='add'>+			cmd_info-&gt;cmd_type = HINIC3_CMD_TYPE_FAKE_TIMEOUT;</div><div class='add'>+	} else {</div><div class='add'>+		err = -ETIMEDOUT;</div><div class='add'>+		dev_err(cmdq-&gt;hwdev-&gt;dev,</div><div class='add'>+			"Cmdq sync command current msg id mismatch cmd_info msg id\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clear_cmd_info(cmd_info, saved_cmd_info);</div><div class='add'>+	spin_unlock_bh(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cmdq_sync_cmd_direct_resp(struct hinic3_cmdq *cmdq, u8 mod, u8 cmd,</div><div class='add'>+				     struct hinic3_cmd_buf *buf_in,</div><div class='add'>+				     __le64 *out_param)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdq_cmd_info *cmd_info, saved_cmd_info;</div><div class='add'>+	int cmpt_code = CMDQ_SEND_CMPT_CODE;</div><div class='add'>+	struct cmdq_wqe *curr_wqe, wqe = {};</div><div class='add'>+	struct hinic3_wq *wq = &amp;cmdq-&gt;wq;</div><div class='add'>+	u16 curr_prod_idx, next_prod_idx;</div><div class='add'>+	struct completion done;</div><div class='add'>+	u64 curr_msg_id;</div><div class='add'>+	int errcode;</div><div class='add'>+	u8 wrapped;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+	curr_wqe = cmdq_get_wqe(wq, &amp;curr_prod_idx);</div><div class='add'>+	if (!curr_wqe) {</div><div class='add'>+		spin_unlock_bh(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wrapped = cmdq-&gt;wrapped;</div><div class='add'>+	next_prod_idx = curr_prod_idx + CMDQ_WQE_NUM_WQEBBS;</div><div class='add'>+	if (next_prod_idx &gt;= wq-&gt;q_depth) {</div><div class='add'>+		cmdq-&gt;wrapped ^= 1;</div><div class='add'>+		next_prod_idx -= wq-&gt;q_depth;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd_info = &amp;cmdq-&gt;cmd_infos[curr_prod_idx];</div><div class='add'>+	init_completion(&amp;done);</div><div class='add'>+	refcount_inc(&amp;buf_in-&gt;ref_cnt);</div><div class='add'>+	cmd_info-&gt;cmd_type = HINIC3_CMD_TYPE_DIRECT_RESP;</div><div class='add'>+	cmd_info-&gt;done = &amp;done;</div><div class='add'>+	cmd_info-&gt;errcode = &amp;errcode;</div><div class='add'>+	cmd_info-&gt;direct_resp = out_param;</div><div class='add'>+	cmd_info-&gt;cmpt_code = &amp;cmpt_code;</div><div class='add'>+	cmd_info-&gt;buf_in = buf_in;</div><div class='add'>+	saved_cmd_info = *cmd_info;</div><div class='add'>+	cmdq_set_lcmd_wqe(&amp;wqe, CMDQ_CMD_DIRECT_RESP, buf_in, NULL,</div><div class='add'>+			  wrapped, mod, cmd, curr_prod_idx);</div><div class='add'>+</div><div class='add'>+	cmdq_wqe_fill(curr_wqe, &amp;wqe);</div><div class='add'>+	(cmd_info-&gt;cmdq_msg_id)++;</div><div class='add'>+	curr_msg_id = cmd_info-&gt;cmdq_msg_id;</div><div class='add'>+	cmdq_set_db(cmdq, HINIC3_CMDQ_SYNC, next_prod_idx);</div><div class='add'>+	spin_unlock_bh(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+</div><div class='add'>+	err = wait_cmdq_sync_cmd_completion(cmdq, cmd_info, &amp;saved_cmd_info,</div><div class='add'>+					    curr_msg_id, curr_prod_idx,</div><div class='add'>+					    curr_wqe, CMDQ_CMD_TIMEOUT);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(cmdq-&gt;hwdev-&gt;dev,</div><div class='add'>+			"Cmdq sync command timeout, mod: %u, cmd: %u, prod idx: 0x%x\n",</div><div class='add'>+			mod, cmd, curr_prod_idx);</div><div class='add'>+		err = -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmpt_code == CMDQ_FORCE_STOP_CMPT_CODE) {</div><div class='add'>+		dev_dbg(cmdq-&gt;hwdev-&gt;dev,</div><div class='add'>+			"Force stop cmdq cmd, mod: %u, cmd: %u\n", mod, cmd);</div><div class='add'>+		err = -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	smp_rmb(); /* read error code after completion */</div><div class='add'>+</div><div class='add'>+	return err ? err : errcode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_cmdq_direct_resp(struct hinic3_hwdev *hwdev, u8 mod, u8 cmd,</div><div class='add'>+			    struct hinic3_cmd_buf *buf_in, __le64 *out_param)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdqs *cmdqs;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+	err = wait_cmdqs_enable(cmdqs);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Cmdq is disabled\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = cmdq_sync_cmd_direct_resp(&amp;cmdqs-&gt;cmdq[HINIC3_CMDQ_SYNC],</div><div class='add'>+					mod, cmd, buf_in, out_param);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_init_queue_ctxt(struct hinic3_hwdev *hwdev, u8 cmdq_id,</div><div class='add'>+				 struct comm_cmdq_ctxt_info *ctxt_info)</div><div class='add'>+{</div><div class='add'>+	const struct hinic3_cmdqs *cmdqs;</div><div class='add'>+	u64 cmdq_first_block_paddr, pfn;</div><div class='add'>+	const struct hinic3_wq *wq;</div><div class='add'>+</div><div class='add'>+	cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+	wq = &amp;cmdqs-&gt;cmdq[cmdq_id].wq;</div><div class='add'>+	pfn = CMDQ_PFN(hinic3_wq_get_first_wqe_page_addr(wq));</div><div class='add'>+</div><div class='add'>+	ctxt_info-&gt;curr_wqe_page_pfn =</div><div class='add'>+		cpu_to_le64(CMDQ_CTXT_SET(1, HW_BUSY_BIT) |</div><div class='add'>+			    CMDQ_CTXT_SET(1, CEQ_EN)	|</div><div class='add'>+			    CMDQ_CTXT_SET(1, CEQ_ARM)	|</div><div class='add'>+			    CMDQ_CTXT_SET(0, EQ_ID) |</div><div class='add'>+			    CMDQ_CTXT_SET(pfn, CURR_WQE_PAGE_PFN));</div><div class='add'>+</div><div class='add'>+	if (!hinic3_wq_is_0_level_cla(wq)) {</div><div class='add'>+		cmdq_first_block_paddr = cmdqs-&gt;wq_block_paddr;</div><div class='add'>+		pfn = CMDQ_PFN(cmdq_first_block_paddr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctxt_info-&gt;wq_block_pfn = cpu_to_le64(CMDQ_CTXT_SET(wq-&gt;cons_idx, CI) |</div><div class='add'>+					      CMDQ_CTXT_SET(pfn, WQ_BLOCK_PFN));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_cmdq(struct hinic3_cmdq *cmdq, struct hinic3_hwdev *hwdev,</div><div class='add'>+		     enum hinic3_cmdq_type q_type)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmdq-&gt;cmdq_type = q_type;</div><div class='add'>+	cmdq-&gt;wrapped = 1;</div><div class='add'>+	cmdq-&gt;hwdev = hwdev;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+</div><div class='add'>+	cmdq-&gt;cmd_infos = kcalloc(cmdq-&gt;wq.q_depth, sizeof(*cmdq-&gt;cmd_infos),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (!cmdq-&gt;cmd_infos) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_set_cmdq_ctxt(struct hinic3_hwdev *hwdev, u8 cmdq_id)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_set_cmdq_ctxt cmdq_ctxt = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmdq_init_queue_ctxt(hwdev, cmdq_id, &amp;cmdq_ctxt.ctxt);</div><div class='add'>+	cmdq_ctxt.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	cmdq_ctxt.cmdq_id = cmdq_id;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;cmdq_ctxt,</div><div class='add'>+				     sizeof(cmdq_ctxt));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_SET_CMDQ_CTXT, &amp;msg_params);</div><div class='add'>+	if (err || cmdq_ctxt.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set cmdq ctxt, err: %d, status: 0x%x\n",</div><div class='add'>+			err, cmdq_ctxt.head.status);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_set_cmdq_ctxts(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdqs *cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+	u8 cmdq_type;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (cmdq_type = 0; cmdq_type &lt; cmdqs-&gt;cmdq_num; cmdq_type++) {</div><div class='add'>+		err = hinic3_set_cmdq_ctxt(hwdev, cmdq_type);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmdqs-&gt;status |= HINIC3_CMDQ_ENABLE;</div><div class='add'>+	cmdqs-&gt;disable_flag = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int create_cmdq_wq(struct hinic3_hwdev *hwdev,</div><div class='add'>+			  struct hinic3_cmdqs *cmdqs)</div><div class='add'>+{</div><div class='add'>+	u8 cmdq_type;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (cmdq_type = 0; cmdq_type &lt; cmdqs-&gt;cmdq_num; cmdq_type++) {</div><div class='add'>+		err = hinic3_wq_create(hwdev, &amp;cmdqs-&gt;cmdq[cmdq_type].wq,</div><div class='add'>+				       CMDQ_DEPTH, CMDQ_WQEBB_SIZE);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Failed to create cmdq wq\n");</div><div class='add'>+			goto err_destroy_wq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 1-level Chip Logical Address (CLA) must put all</div><div class='add'>+	 * cmdq's wq page addr in one wq block</div><div class='add'>+	 */</div><div class='add'>+	if (!hinic3_wq_is_0_level_cla(&amp;cmdqs-&gt;cmdq[HINIC3_CMDQ_SYNC].wq)) {</div><div class='add'>+		if (cmdqs-&gt;cmdq[HINIC3_CMDQ_SYNC].wq.qpages.num_pages &gt;</div><div class='add'>+		    CMDQ_WQ_CLA_SIZE / sizeof(u64)) {</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			dev_err(hwdev-&gt;dev,</div><div class='add'>+				"Cmdq number of wq pages exceeds limit: %lu\n",</div><div class='add'>+				CMDQ_WQ_CLA_SIZE / sizeof(u64));</div><div class='add'>+			goto err_destroy_wq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cmdqs-&gt;wq_block_vaddr =</div><div class='add'>+			dma_alloc_coherent(hwdev-&gt;dev, HINIC3_MIN_PAGE_SIZE,</div><div class='add'>+					   &amp;cmdqs-&gt;wq_block_paddr, GFP_KERNEL);</div><div class='add'>+		if (!cmdqs-&gt;wq_block_vaddr) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto err_destroy_wq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (cmdq_type = 0; cmdq_type &lt; cmdqs-&gt;cmdq_num; cmdq_type++)</div><div class='add'>+			memcpy((u8 *)cmdqs-&gt;wq_block_vaddr +</div><div class='add'>+			       CMDQ_WQ_CLA_SIZE * cmdq_type,</div><div class='add'>+			       cmdqs-&gt;cmdq[cmdq_type].wq.wq_block_vaddr,</div><div class='add'>+			       cmdqs-&gt;cmdq[cmdq_type].wq.qpages.num_pages *</div><div class='add'>+			       sizeof(__be64));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_destroy_wq:</div><div class='add'>+	while (cmdq_type &gt; 0) {</div><div class='add'>+		cmdq_type--;</div><div class='add'>+		hinic3_wq_destroy(hwdev, &amp;cmdqs-&gt;cmdq[cmdq_type].wq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void destroy_cmdq_wq(struct hinic3_hwdev *hwdev,</div><div class='add'>+			    struct hinic3_cmdqs *cmdqs)</div><div class='add'>+{</div><div class='add'>+	u8 cmdq_type;</div><div class='add'>+</div><div class='add'>+	if (cmdqs-&gt;wq_block_vaddr)</div><div class='add'>+		dma_free_coherent(hwdev-&gt;dev, HINIC3_MIN_PAGE_SIZE,</div><div class='add'>+				  cmdqs-&gt;wq_block_vaddr, cmdqs-&gt;wq_block_paddr);</div><div class='add'>+</div><div class='add'>+	for (cmdq_type = 0; cmdq_type &lt; cmdqs-&gt;cmdq_num; cmdq_type++)</div><div class='add'>+		hinic3_wq_destroy(hwdev, &amp;cmdqs-&gt;cmdq[cmdq_type].wq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_cmdqs(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdqs *cmdqs;</div><div class='add'>+</div><div class='add'>+	cmdqs = kzalloc(sizeof(*cmdqs), GFP_KERNEL);</div><div class='add'>+	if (!cmdqs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hwdev-&gt;cmdqs = cmdqs;</div><div class='add'>+	cmdqs-&gt;hwdev = hwdev;</div><div class='add'>+	cmdqs-&gt;cmdq_num = hwdev-&gt;max_cmdq;</div><div class='add'>+</div><div class='add'>+	cmdqs-&gt;cmd_buf_pool = dma_pool_create("hinic3_cmdq", hwdev-&gt;dev,</div><div class='add'>+					      CMDQ_BUF_SIZE, CMDQ_BUF_SIZE, 0);</div><div class='add'>+	if (!cmdqs-&gt;cmd_buf_pool) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to create cmdq buffer pool\n");</div><div class='add'>+		kfree(cmdqs);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cmdq_flush_sync_cmd(struct hinic3_cmdq_cmd_info *cmd_info)</div><div class='add'>+{</div><div class='add'>+	if (cmd_info-&gt;cmd_type != HINIC3_CMD_TYPE_DIRECT_RESP)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cmd_info-&gt;cmd_type = HINIC3_CMD_TYPE_FORCE_STOP;</div><div class='add'>+</div><div class='add'>+	if (cmd_info-&gt;cmpt_code &amp;&amp;</div><div class='add'>+	    *cmd_info-&gt;cmpt_code == CMDQ_SEND_CMPT_CODE)</div><div class='add'>+		*cmd_info-&gt;cmpt_code = CMDQ_FORCE_STOP_CMPT_CODE;</div><div class='add'>+</div><div class='add'>+	if (cmd_info-&gt;done) {</div><div class='add'>+		complete(cmd_info-&gt;done);</div><div class='add'>+		cmd_info-&gt;done = NULL;</div><div class='add'>+		cmd_info-&gt;cmpt_code = NULL;</div><div class='add'>+		cmd_info-&gt;direct_resp = NULL;</div><div class='add'>+		cmd_info-&gt;errcode = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_cmdq_flush_cmd(struct hinic3_cmdq *cmdq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdq_cmd_info *cmd_info;</div><div class='add'>+	u16 ci;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+	while (cmdq_read_wqe(&amp;cmdq-&gt;wq, &amp;ci)) {</div><div class='add'>+		hinic3_wq_put_wqebbs(&amp;cmdq-&gt;wq, CMDQ_WQE_NUM_WQEBBS);</div><div class='add'>+		cmd_info = &amp;cmdq-&gt;cmd_infos[ci];</div><div class='add'>+		if (cmd_info-&gt;cmd_type == HINIC3_CMD_TYPE_DIRECT_RESP)</div><div class='add'>+			cmdq_flush_sync_cmd(cmd_info);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_cmdq_flush_sync_cmd(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdq *cmdq;</div><div class='add'>+	u16 wqe_cnt, wqe_idx, i;</div><div class='add'>+	struct hinic3_wq *wq;</div><div class='add'>+</div><div class='add'>+	cmdq = &amp;hwdev-&gt;cmdqs-&gt;cmdq[HINIC3_CMDQ_SYNC];</div><div class='add'>+	spin_lock_bh(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+	wq = &amp;cmdq-&gt;wq;</div><div class='add'>+	wqe_cnt = hinic3_wq_get_used(wq);</div><div class='add'>+	for (i = 0; i &lt; wqe_cnt; i++) {</div><div class='add'>+		wqe_idx = (wq-&gt;cons_idx + i) &amp; wq-&gt;idx_mask;</div><div class='add'>+		cmdq_flush_sync_cmd(cmdq-&gt;cmd_infos + wqe_idx);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;cmdq-&gt;cmdq_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_cmdq_reset_all_cmd_buf(struct hinic3_cmdq *cmdq)</div><div class='add'>+{</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cmdq-&gt;wq.q_depth; i++)</div><div class='add'>+		cmdq_clear_cmd_buf(&amp;cmdq-&gt;cmd_infos[i], cmdq-&gt;hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_reinit_cmdq_ctxts(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdqs *cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+	u8 cmdq_type;</div><div class='add'>+</div><div class='add'>+	for (cmdq_type = 0; cmdq_type &lt; cmdqs-&gt;cmdq_num; cmdq_type++) {</div><div class='add'>+		hinic3_cmdq_flush_cmd(&amp;cmdqs-&gt;cmdq[cmdq_type]);</div><div class='add'>+		hinic3_cmdq_reset_all_cmd_buf(&amp;cmdqs-&gt;cmdq[cmdq_type]);</div><div class='add'>+		cmdqs-&gt;cmdq[cmdq_type].wrapped = 1;</div><div class='add'>+		hinic3_wq_reset(&amp;cmdqs-&gt;cmdq[cmdq_type].wq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return hinic3_set_cmdq_ctxts(hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_cmdqs_init(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdqs *cmdqs;</div><div class='add'>+	void __iomem *db_base;</div><div class='add'>+	u8 cmdq_type;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = init_cmdqs(hwdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+	err = create_cmdq_wq(hwdev, cmdqs);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_cmdqs;</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_db_addr(hwdev, &amp;db_base, NULL);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to allocate doorbell address\n");</div><div class='add'>+		goto err_destroy_cmdq_wq;</div><div class='add'>+	}</div><div class='add'>+	cmdqs-&gt;cmdqs_db_base = db_base;</div><div class='add'>+</div><div class='add'>+	for (cmdq_type = 0; cmdq_type &lt; cmdqs-&gt;cmdq_num; cmdq_type++) {</div><div class='add'>+		err = init_cmdq(&amp;cmdqs-&gt;cmdq[cmdq_type], hwdev, cmdq_type);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(hwdev-&gt;dev,</div><div class='add'>+				"Failed to initialize cmdq type : %d\n",</div><div class='add'>+				cmdq_type);</div><div class='add'>+			goto err_free_cmd_infos;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_set_cmdq_ctxts(hwdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_cmd_infos;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_cmd_infos:</div><div class='add'>+	while (cmdq_type &gt; 0) {</div><div class='add'>+		cmdq_type--;</div><div class='add'>+		kfree(cmdqs-&gt;cmdq[cmdq_type].cmd_infos);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_free_db_addr(hwdev, cmdqs-&gt;cmdqs_db_base);</div><div class='add'>+</div><div class='add'>+err_destroy_cmdq_wq:</div><div class='add'>+	destroy_cmdq_wq(hwdev, cmdqs);</div><div class='add'>+</div><div class='add'>+err_free_cmdqs:</div><div class='add'>+	dma_pool_destroy(cmdqs-&gt;cmd_buf_pool);</div><div class='add'>+	kfree(cmdqs);</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_cmdqs_free(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdqs *cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+	u8 cmdq_type;</div><div class='add'>+</div><div class='add'>+	cmdqs-&gt;status &amp;= ~HINIC3_CMDQ_ENABLE;</div><div class='add'>+</div><div class='add'>+	for (cmdq_type = 0; cmdq_type &lt; cmdqs-&gt;cmdq_num; cmdq_type++) {</div><div class='add'>+		hinic3_cmdq_flush_cmd(&amp;cmdqs-&gt;cmdq[cmdq_type]);</div><div class='add'>+		hinic3_cmdq_reset_all_cmd_buf(&amp;cmdqs-&gt;cmdq[cmdq_type]);</div><div class='add'>+		kfree(cmdqs-&gt;cmdq[cmdq_type].cmd_infos);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_free_db_addr(hwdev, cmdqs-&gt;cmdqs_db_base);</div><div class='add'>+	destroy_cmdq_wq(hwdev, cmdqs);</div><div class='add'>+	dma_pool_destroy(cmdqs-&gt;cmd_buf_pool);</div><div class='add'>+	kfree(cmdqs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool hinic3_cmdq_idle(struct hinic3_cmdq *cmdq)</div><div class='add'>+{</div><div class='add'>+	return hinic3_wq_get_used(&amp;cmdq-&gt;wq) == 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.h b/drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.h<br/>new file mode 100644<br/>index 000000000000..f99c386a2780<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.h</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_CMDQ_H_</div><div class='add'>+#define _HINIC3_CMDQ_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dmapool.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hw_intf.h"</div><div class='add'>+#include "hinic3_wq.h"</div><div class='add'>+</div><div class='add'>+#define CMDQ_DEPTH  4096</div><div class='add'>+</div><div class='add'>+struct cmdq_db {</div><div class='add'>+	__le32 db_head;</div><div class='add'>+	__le32 db_info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* hw defined cmdq wqe header */</div><div class='add'>+struct cmdq_header {</div><div class='add'>+	__le32 header_info;</div><div class='add'>+	__le32 saved_data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cmdq_lcmd_bufdesc {</div><div class='add'>+	struct hinic3_sge sge;</div><div class='add'>+	__le64            rsvd2;</div><div class='add'>+	__le64            rsvd3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cmdq_status {</div><div class='add'>+	__le32 status_info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cmdq_ctrl {</div><div class='add'>+	__le32 ctrl_info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cmdq_direct_resp {</div><div class='add'>+	__le64 val;</div><div class='add'>+	__le64 rsvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cmdq_completion {</div><div class='add'>+	union {</div><div class='add'>+		struct hinic3_sge       sge;</div><div class='add'>+		struct cmdq_direct_resp direct;</div><div class='add'>+	} resp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cmdq_wqe_scmd {</div><div class='add'>+	struct cmdq_header     header;</div><div class='add'>+	__le64                 rsvd3;</div><div class='add'>+	struct cmdq_status     status;</div><div class='add'>+	struct cmdq_ctrl       ctrl;</div><div class='add'>+	struct cmdq_completion completion;</div><div class='add'>+	__le32                 rsvd10[6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cmdq_wqe_lcmd {</div><div class='add'>+	struct cmdq_header       header;</div><div class='add'>+	struct cmdq_status       status;</div><div class='add'>+	struct cmdq_ctrl         ctrl;</div><div class='add'>+	struct cmdq_completion   completion;</div><div class='add'>+	struct cmdq_lcmd_bufdesc buf_desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cmdq_wqe {</div><div class='add'>+	union {</div><div class='add'>+		struct cmdq_wqe_scmd wqe_scmd;</div><div class='add'>+		struct cmdq_wqe_lcmd wqe_lcmd;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(sizeof(struct cmdq_wqe) == 64);</div><div class='add'>+</div><div class='add'>+enum hinic3_cmdq_type {</div><div class='add'>+	HINIC3_CMDQ_SYNC      = 0,</div><div class='add'>+	HINIC3_MAX_CMDQ_TYPES = 4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_cmdq_status {</div><div class='add'>+	HINIC3_CMDQ_ENABLE = BIT(0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_cmdq_cmd_type {</div><div class='add'>+	HINIC3_CMD_TYPE_NONE,</div><div class='add'>+	HINIC3_CMD_TYPE_DIRECT_RESP,</div><div class='add'>+	HINIC3_CMD_TYPE_FAKE_TIMEOUT,</div><div class='add'>+	HINIC3_CMD_TYPE_TIMEOUT,</div><div class='add'>+	HINIC3_CMD_TYPE_FORCE_STOP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_cmd_buf {</div><div class='add'>+	void       *buf;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	__le16     size;</div><div class='add'>+	refcount_t ref_cnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_cmdq_cmd_info {</div><div class='add'>+	enum hinic3_cmdq_cmd_type cmd_type;</div><div class='add'>+	struct completion         *done;</div><div class='add'>+	int                       *errcode;</div><div class='add'>+	/* completion code */</div><div class='add'>+	int                       *cmpt_code;</div><div class='add'>+	__le64                    *direct_resp;</div><div class='add'>+	u64                       cmdq_msg_id;</div><div class='add'>+	struct hinic3_cmd_buf     *buf_in;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_cmdq {</div><div class='add'>+	struct hinic3_wq            wq;</div><div class='add'>+	enum hinic3_cmdq_type       cmdq_type;</div><div class='add'>+	u8                          wrapped;</div><div class='add'>+	/* synchronize command submission with completions via event queue */</div><div class='add'>+	spinlock_t                  cmdq_lock;</div><div class='add'>+	struct hinic3_cmdq_cmd_info *cmd_infos;</div><div class='add'>+	struct hinic3_hwdev         *hwdev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_cmdqs {</div><div class='add'>+	struct hinic3_hwdev *hwdev;</div><div class='add'>+	struct hinic3_cmdq  cmdq[HINIC3_MAX_CMDQ_TYPES];</div><div class='add'>+	struct dma_pool     *cmd_buf_pool;</div><div class='add'>+	/* doorbell area */</div><div class='add'>+	u8 __iomem          *cmdqs_db_base;</div><div class='add'>+</div><div class='add'>+	/* When command queue uses multiple memory pages (1-level CLA), this</div><div class='add'>+	 * block will hold aggregated indirection table for all command queues</div><div class='add'>+	 * of cmdqs. Not used for small cmdq (0-level CLA).</div><div class='add'>+	 */</div><div class='add'>+	dma_addr_t          wq_block_paddr;</div><div class='add'>+	void                *wq_block_vaddr;</div><div class='add'>+</div><div class='add'>+	u32                 status;</div><div class='add'>+	u32                 disable_flag;</div><div class='add'>+	u8                  cmdq_num;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hinic3_cmdqs_init(struct hinic3_hwdev *hwdev);</div><div class='add'>+void hinic3_cmdqs_free(struct hinic3_hwdev *hwdev);</div><div class='add'>+</div><div class='add'>+struct hinic3_cmd_buf *hinic3_alloc_cmd_buf(struct hinic3_hwdev *hwdev);</div><div class='add'>+void hinic3_free_cmd_buf(struct hinic3_hwdev *hwdev,</div><div class='add'>+			 struct hinic3_cmd_buf *cmd_buf);</div><div class='add'>+void hinic3_cmdq_ceq_handler(struct hinic3_hwdev *hwdev, __le32 ceqe_data);</div><div class='add'>+</div><div class='add'>+int hinic3_cmdq_direct_resp(struct hinic3_hwdev *hwdev, u8 mod, u8 cmd,</div><div class='add'>+			    struct hinic3_cmd_buf *buf_in, __le64 *out_param);</div><div class='add'>+</div><div class='add'>+void hinic3_cmdq_flush_sync_cmd(struct hinic3_hwdev *hwdev);</div><div class='add'>+int hinic3_reinit_cmdq_ctxts(struct hinic3_hwdev *hwdev);</div><div class='add'>+bool hinic3_cmdq_idle(struct hinic3_cmdq *cmdq);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_common.c b/drivers/net/ethernet/huawei/hinic3/hinic3_common.c<br/>new file mode 100644<br/>index 000000000000..fe4778d152cf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_common.c</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_common.h"</div><div class='add'>+</div><div class='add'>+int hinic3_dma_zalloc_coherent_align(struct device *dev, u32 size, u32 align,</div><div class='add'>+				     gfp_t flag,</div><div class='add'>+				     struct hinic3_dma_addr_align *mem_align)</div><div class='add'>+{</div><div class='add'>+	dma_addr_t paddr, align_paddr;</div><div class='add'>+	void *vaddr, *align_vaddr;</div><div class='add'>+	u32 real_size = size;</div><div class='add'>+</div><div class='add'>+	vaddr = dma_alloc_coherent(dev, real_size, &amp;paddr, flag);</div><div class='add'>+	if (!vaddr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	align_paddr = ALIGN(paddr, align);</div><div class='add'>+	if (align_paddr == paddr) {</div><div class='add'>+		align_vaddr = vaddr;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(dev, real_size, vaddr, paddr);</div><div class='add'>+</div><div class='add'>+	/* realloc memory for align */</div><div class='add'>+	real_size = size + align;</div><div class='add'>+	vaddr = dma_alloc_coherent(dev, real_size, &amp;paddr, flag);</div><div class='add'>+	if (!vaddr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	align_paddr = ALIGN(paddr, align);</div><div class='add'>+	align_vaddr = vaddr + (align_paddr - paddr);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mem_align-&gt;real_size = real_size;</div><div class='add'>+	mem_align-&gt;ori_vaddr = vaddr;</div><div class='add'>+	mem_align-&gt;ori_paddr = paddr;</div><div class='add'>+	mem_align-&gt;align_vaddr = align_vaddr;</div><div class='add'>+	mem_align-&gt;align_paddr = align_paddr;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_dma_free_coherent_align(struct device *dev,</div><div class='add'>+				    struct hinic3_dma_addr_align *mem_align)</div><div class='add'>+{</div><div class='add'>+	dma_free_coherent(dev, mem_align-&gt;real_size,</div><div class='add'>+			  mem_align-&gt;ori_vaddr, mem_align-&gt;ori_paddr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_wait_for_timeout(void *priv_data, wait_cpl_handler handler,</div><div class='add'>+			    u32 wait_total_ms, u32 wait_once_us)</div><div class='add'>+{</div><div class='add'>+	enum hinic3_wait_return ret;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = read_poll_timeout(handler, ret, ret == HINIC3_WAIT_PROCESS_CPL,</div><div class='add'>+				wait_once_us, wait_total_ms * USEC_PER_MSEC,</div><div class='add'>+				false, priv_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Data provided to/by cmdq is arranged in structs with little endian fields but</div><div class='add'>+ * every dword (32bits) should be swapped since HW swaps it again when it</div><div class='add'>+ * copies it from/to host memory.</div><div class='add'>+ */</div><div class='add'>+void hinic3_cmdq_buf_swab32(void *data, int len)</div><div class='add'>+{</div><div class='add'>+	swab32_array(data, len / sizeof(u32));</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_common.h b/drivers/net/ethernet/huawei/hinic3/hinic3_common.h<br/>new file mode 100644<br/>index 000000000000..a8fabfae90fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_common.h</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_COMMON_H_</div><div class='add'>+#define _HINIC3_COMMON_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+</div><div class='add'>+#define HINIC3_MIN_PAGE_SIZE  0x1000</div><div class='add'>+</div><div class='add'>+struct hinic3_dma_addr_align {</div><div class='add'>+	u32        real_size;</div><div class='add'>+</div><div class='add'>+	void       *ori_vaddr;</div><div class='add'>+	dma_addr_t ori_paddr;</div><div class='add'>+</div><div class='add'>+	void       *align_vaddr;</div><div class='add'>+	dma_addr_t align_paddr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_wait_return {</div><div class='add'>+	HINIC3_WAIT_PROCESS_CPL     = 0,</div><div class='add'>+	HINIC3_WAIT_PROCESS_WAITING = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_sge {</div><div class='add'>+	__le32 hi_addr;</div><div class='add'>+	__le32 lo_addr;</div><div class='add'>+	__le32 len;</div><div class='add'>+	__le32 rsvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void hinic3_set_sge(struct hinic3_sge *sge, dma_addr_t addr,</div><div class='add'>+				  __le32 len)</div><div class='add'>+{</div><div class='add'>+	sge-&gt;hi_addr = cpu_to_le32(upper_32_bits(addr));</div><div class='add'>+	sge-&gt;lo_addr = cpu_to_le32(lower_32_bits(addr));</div><div class='add'>+	sge-&gt;len = len;</div><div class='add'>+	sge-&gt;rsvd = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_dma_zalloc_coherent_align(struct device *dev, u32 size, u32 align,</div><div class='add'>+				     gfp_t flag,</div><div class='add'>+				     struct hinic3_dma_addr_align *mem_align);</div><div class='add'>+void hinic3_dma_free_coherent_align(struct device *dev,</div><div class='add'>+				    struct hinic3_dma_addr_align *mem_align);</div><div class='add'>+</div><div class='add'>+typedef enum hinic3_wait_return (*wait_cpl_handler)(void *priv_data);</div><div class='add'>+int hinic3_wait_for_timeout(void *priv_data, wait_cpl_handler handler,</div><div class='add'>+			    u32 wait_total_ms, u32 wait_once_us);</div><div class='add'>+</div><div class='add'>+void hinic3_cmdq_buf_swab32(void *data, int len);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_csr.h b/drivers/net/ethernet/huawei/hinic3/hinic3_csr.h<br/>new file mode 100644<br/>index 000000000000..e7417e8efa99<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_csr.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_csr.h</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_CSR_H_</div><div class='add'>+#define _HINIC3_CSR_H_</div><div class='add'>+</div><div class='add'>+#define HINIC3_CFG_REGS_FLAG                  0x40000000</div><div class='add'>+#define HINIC3_REGS_FLAG_MASK                 0x3FFFFFFF</div><div class='add'>+</div><div class='add'>+#define HINIC3_VF_CFG_REG_OFFSET              0x2000</div><div class='add'>+</div><div class='add'>+/* HW interface registers */</div><div class='add'>+#define HINIC3_CSR_FUNC_ATTR0_ADDR            (HINIC3_CFG_REGS_FLAG + 0x0)</div><div class='add'>+#define HINIC3_CSR_FUNC_ATTR1_ADDR            (HINIC3_CFG_REGS_FLAG + 0x4)</div><div class='add'>+#define HINIC3_CSR_FUNC_ATTR2_ADDR            (HINIC3_CFG_REGS_FLAG + 0x8)</div><div class='add'>+#define HINIC3_CSR_FUNC_ATTR3_ADDR            (HINIC3_CFG_REGS_FLAG + 0xC)</div><div class='add'>+#define HINIC3_CSR_FUNC_ATTR4_ADDR            (HINIC3_CFG_REGS_FLAG + 0x10)</div><div class='add'>+#define HINIC3_CSR_FUNC_ATTR5_ADDR            (HINIC3_CFG_REGS_FLAG + 0x14)</div><div class='add'>+#define HINIC3_CSR_FUNC_ATTR6_ADDR            (HINIC3_CFG_REGS_FLAG + 0x18)</div><div class='add'>+</div><div class='add'>+#define HINIC3_FUNC_CSR_MAILBOX_DATA_OFF      0x80</div><div class='add'>+#define HINIC3_FUNC_CSR_MAILBOX_CONTROL_OFF   (HINIC3_CFG_REGS_FLAG + 0x0100)</div><div class='add'>+#define HINIC3_FUNC_CSR_MAILBOX_INT_OFF       (HINIC3_CFG_REGS_FLAG + 0x0104)</div><div class='add'>+#define HINIC3_FUNC_CSR_MAILBOX_RESULT_H_OFF  (HINIC3_CFG_REGS_FLAG + 0x0108)</div><div class='add'>+#define HINIC3_FUNC_CSR_MAILBOX_RESULT_L_OFF  (HINIC3_CFG_REGS_FLAG + 0x010C)</div><div class='add'>+</div><div class='add'>+#define HINIC3_CSR_DMA_ATTR_TBL_ADDR          (HINIC3_CFG_REGS_FLAG + 0x380)</div><div class='add'>+#define HINIC3_CSR_DMA_ATTR_INDIR_IDX_ADDR    (HINIC3_CFG_REGS_FLAG + 0x390)</div><div class='add'>+</div><div class='add'>+/* MSI-X registers */</div><div class='add'>+#define HINIC3_CSR_FUNC_MSI_CLR_WR_ADDR       (HINIC3_CFG_REGS_FLAG + 0x58)</div><div class='add'>+</div><div class='add'>+#define HINIC3_MSI_CLR_INDIR_RESEND_TIMER_CLR_MASK  BIT(0)</div><div class='add'>+#define HINIC3_MSI_CLR_INDIR_INT_MSK_SET_MASK       BIT(1)</div><div class='add'>+#define HINIC3_MSI_CLR_INDIR_INT_MSK_CLR_MASK       BIT(2)</div><div class='add'>+#define HINIC3_MSI_CLR_INDIR_AUTO_MSK_SET_MASK      BIT(3)</div><div class='add'>+#define HINIC3_MSI_CLR_INDIR_AUTO_MSK_CLR_MASK      BIT(4)</div><div class='add'>+#define HINIC3_MSI_CLR_INDIR_SIMPLE_INDIR_IDX_MASK  GENMASK(31, 22)</div><div class='add'>+#define HINIC3_MSI_CLR_INDIR_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(HINIC3_MSI_CLR_INDIR_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+/* EQ registers */</div><div class='add'>+#define HINIC3_AEQ_INDIR_IDX_ADDR      (HINIC3_CFG_REGS_FLAG + 0x210)</div><div class='add'>+#define HINIC3_CEQ_INDIR_IDX_ADDR      (HINIC3_CFG_REGS_FLAG + 0x290)</div><div class='add'>+</div><div class='add'>+#define HINIC3_EQ_INDIR_IDX_ADDR(type)  \</div><div class='add'>+	((type == HINIC3_AEQ) ? HINIC3_AEQ_INDIR_IDX_ADDR :  \</div><div class='add'>+	 HINIC3_CEQ_INDIR_IDX_ADDR)</div><div class='add'>+</div><div class='add'>+#define HINIC3_AEQ_MTT_OFF_BASE_ADDR   (HINIC3_CFG_REGS_FLAG + 0x240)</div><div class='add'>+#define HINIC3_CEQ_MTT_OFF_BASE_ADDR   (HINIC3_CFG_REGS_FLAG + 0x2C0)</div><div class='add'>+</div><div class='add'>+#define HINIC3_CSR_EQ_PAGE_OFF_STRIDE  8</div><div class='add'>+</div><div class='add'>+#define HINIC3_AEQ_HI_PHYS_ADDR_REG(pg_num)  \</div><div class='add'>+	(HINIC3_AEQ_MTT_OFF_BASE_ADDR + (pg_num) *  \</div><div class='add'>+	 HINIC3_CSR_EQ_PAGE_OFF_STRIDE)</div><div class='add'>+</div><div class='add'>+#define HINIC3_AEQ_LO_PHYS_ADDR_REG(pg_num)  \</div><div class='add'>+	(HINIC3_AEQ_MTT_OFF_BASE_ADDR + (pg_num) *  \</div><div class='add'>+	 HINIC3_CSR_EQ_PAGE_OFF_STRIDE + 4)</div><div class='add'>+</div><div class='add'>+#define HINIC3_CEQ_HI_PHYS_ADDR_REG(pg_num)  \</div><div class='add'>+	(HINIC3_CEQ_MTT_OFF_BASE_ADDR + (pg_num) *  \</div><div class='add'>+	 HINIC3_CSR_EQ_PAGE_OFF_STRIDE)</div><div class='add'>+</div><div class='add'>+#define HINIC3_CEQ_LO_PHYS_ADDR_REG(pg_num)  \</div><div class='add'>+	(HINIC3_CEQ_MTT_OFF_BASE_ADDR + (pg_num) *  \</div><div class='add'>+	 HINIC3_CSR_EQ_PAGE_OFF_STRIDE + 4)</div><div class='add'>+</div><div class='add'>+#define HINIC3_CSR_AEQ_CTRL_0_ADDR           (HINIC3_CFG_REGS_FLAG + 0x200)</div><div class='add'>+#define HINIC3_CSR_AEQ_CTRL_1_ADDR           (HINIC3_CFG_REGS_FLAG + 0x204)</div><div class='add'>+#define HINIC3_CSR_AEQ_PROD_IDX_ADDR         (HINIC3_CFG_REGS_FLAG + 0x20C)</div><div class='add'>+#define HINIC3_CSR_AEQ_CI_SIMPLE_INDIR_ADDR  (HINIC3_CFG_REGS_FLAG + 0x50)</div><div class='add'>+</div><div class='add'>+#define HINIC3_CSR_CEQ_PROD_IDX_ADDR         (HINIC3_CFG_REGS_FLAG + 0x28c)</div><div class='add'>+#define HINIC3_CSR_CEQ_CI_SIMPLE_INDIR_ADDR  (HINIC3_CFG_REGS_FLAG + 0x54)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c b/drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c<br/>new file mode 100644<br/>index 000000000000..01686472985b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c</a></div><div class='hunk'>@@ -0,0 +1,776 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_csr.h"</div><div class='add'>+#include "hinic3_eqs.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_mbox.h"</div><div class='add'>+</div><div class='add'>+#define AEQ_CTRL_0_INTR_IDX_MASK      GENMASK(9, 0)</div><div class='add'>+#define AEQ_CTRL_0_DMA_ATTR_MASK      GENMASK(17, 12)</div><div class='add'>+#define AEQ_CTRL_0_PCI_INTF_IDX_MASK  GENMASK(22, 20)</div><div class='add'>+#define AEQ_CTRL_0_INTR_MODE_MASK     BIT(31)</div><div class='add'>+#define AEQ_CTRL_0_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(AEQ_CTRL_0_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define AEQ_CTRL_1_LEN_MASK           GENMASK(20, 0)</div><div class='add'>+#define AEQ_CTRL_1_ELEM_SIZE_MASK     GENMASK(25, 24)</div><div class='add'>+#define AEQ_CTRL_1_PAGE_SIZE_MASK     GENMASK(31, 28)</div><div class='add'>+#define AEQ_CTRL_1_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(AEQ_CTRL_1_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define CEQ_CTRL_0_INTR_IDX_MASK      GENMASK(9, 0)</div><div class='add'>+#define CEQ_CTRL_0_DMA_ATTR_MASK      GENMASK(17, 12)</div><div class='add'>+#define CEQ_CTRL_0_LIMIT_KICK_MASK    GENMASK(23, 20)</div><div class='add'>+#define CEQ_CTRL_0_PCI_INTF_IDX_MASK  GENMASK(25, 24)</div><div class='add'>+#define CEQ_CTRL_0_PAGE_SIZE_MASK     GENMASK(30, 27)</div><div class='add'>+#define CEQ_CTRL_0_INTR_MODE_MASK     BIT(31)</div><div class='add'>+#define CEQ_CTRL_0_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(CEQ_CTRL_0_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define CEQ_CTRL_1_LEN_MASK           GENMASK(19, 0)</div><div class='add'>+#define CEQ_CTRL_1_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(CEQ_CTRL_1_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define CEQE_TYPE_MASK                GENMASK(25, 23)</div><div class='add'>+#define CEQE_TYPE(type)  \</div><div class='add'>+	FIELD_GET(CEQE_TYPE_MASK, le32_to_cpu(type))</div><div class='add'>+</div><div class='add'>+#define CEQE_DATA_MASK                GENMASK(25, 0)</div><div class='add'>+#define CEQE_DATA(data)               ((data) &amp; cpu_to_le32(CEQE_DATA_MASK))</div><div class='add'>+</div><div class='add'>+#define EQ_ELEM_DESC_TYPE_MASK        GENMASK(6, 0)</div><div class='add'>+#define EQ_ELEM_DESC_SRC_MASK         BIT(7)</div><div class='add'>+#define EQ_ELEM_DESC_SIZE_MASK        GENMASK(15, 8)</div><div class='add'>+#define EQ_ELEM_DESC_WRAPPED_MASK     BIT(31)</div><div class='add'>+#define EQ_ELEM_DESC_GET(val, member)  \</div><div class='add'>+	FIELD_GET(EQ_ELEM_DESC_##member##_MASK, le32_to_cpu(val))</div><div class='add'>+</div><div class='add'>+#define EQ_CI_SIMPLE_INDIR_CI_MASK       GENMASK(20, 0)</div><div class='add'>+#define EQ_CI_SIMPLE_INDIR_ARMED_MASK    BIT(21)</div><div class='add'>+#define EQ_CI_SIMPLE_INDIR_AEQ_IDX_MASK  GENMASK(31, 30)</div><div class='add'>+#define EQ_CI_SIMPLE_INDIR_CEQ_IDX_MASK  GENMASK(31, 24)</div><div class='add'>+#define EQ_CI_SIMPLE_INDIR_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(EQ_CI_SIMPLE_INDIR_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define EQ_CI_SIMPLE_INDIR_REG_ADDR(eq)  \</div><div class='add'>+	(((eq)-&gt;type == HINIC3_AEQ) ?  \</div><div class='add'>+	 HINIC3_CSR_AEQ_CI_SIMPLE_INDIR_ADDR :  \</div><div class='add'>+	 HINIC3_CSR_CEQ_CI_SIMPLE_INDIR_ADDR)</div><div class='add'>+</div><div class='add'>+#define EQ_PROD_IDX_REG_ADDR(eq)  \</div><div class='add'>+	(((eq)-&gt;type == HINIC3_AEQ) ?  \</div><div class='add'>+	 HINIC3_CSR_AEQ_PROD_IDX_ADDR : HINIC3_CSR_CEQ_PROD_IDX_ADDR)</div><div class='add'>+</div><div class='add'>+#define EQ_HI_PHYS_ADDR_REG(type, pg_num)  \</div><div class='add'>+	(((type) == HINIC3_AEQ) ?  \</div><div class='add'>+	       HINIC3_AEQ_HI_PHYS_ADDR_REG(pg_num) :  \</div><div class='add'>+	       HINIC3_CEQ_HI_PHYS_ADDR_REG(pg_num))</div><div class='add'>+</div><div class='add'>+#define EQ_LO_PHYS_ADDR_REG(type, pg_num)  \</div><div class='add'>+	(((type) == HINIC3_AEQ) ?  \</div><div class='add'>+	       HINIC3_AEQ_LO_PHYS_ADDR_REG(pg_num) :  \</div><div class='add'>+	       HINIC3_CEQ_LO_PHYS_ADDR_REG(pg_num))</div><div class='add'>+</div><div class='add'>+#define EQ_MSIX_RESEND_TIMER_CLEAR  1</div><div class='add'>+</div><div class='add'>+#define HINIC3_EQ_MAX_PAGES(eq)  \</div><div class='add'>+	((eq)-&gt;type == HINIC3_AEQ ?  \</div><div class='add'>+	 HINIC3_AEQ_MAX_PAGES : HINIC3_CEQ_MAX_PAGES)</div><div class='add'>+</div><div class='add'>+#define HINIC3_TASK_PROCESS_EQE_LIMIT  1024</div><div class='add'>+#define HINIC3_EQ_UPDATE_CI_STEP       64</div><div class='add'>+#define HINIC3_EQS_WQ_NAME             "hinic3_eqs"</div><div class='add'>+</div><div class='add'>+#define HINIC3_EQ_VALID_SHIFT          31</div><div class='add'>+#define HINIC3_EQ_WRAPPED(eq)  \</div><div class='add'>+	((eq)-&gt;wrapped &lt;&lt; HINIC3_EQ_VALID_SHIFT)</div><div class='add'>+</div><div class='add'>+#define HINIC3_EQ_WRAPPED_SHIFT        20</div><div class='add'>+#define HINIC3_EQ_CONS_IDX(eq)  \</div><div class='add'>+	((eq)-&gt;cons_idx | ((eq)-&gt;wrapped &lt;&lt; HINIC3_EQ_WRAPPED_SHIFT))</div><div class='add'>+</div><div class='add'>+static const struct hinic3_aeq_elem *get_curr_aeq_elem(const struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	return get_q_element(&amp;eq-&gt;qpages, eq-&gt;cons_idx, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const __be32 *get_curr_ceq_elem(const struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	return get_q_element(&amp;eq-&gt;qpages, eq-&gt;cons_idx, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_aeq_register_cb(struct hinic3_hwdev *hwdev,</div><div class='add'>+			   enum hinic3_aeq_type event,</div><div class='add'>+			   hinic3_aeq_event_cb hwe_cb)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_aeqs *aeqs;</div><div class='add'>+</div><div class='add'>+	aeqs = hwdev-&gt;aeqs;</div><div class='add'>+	aeqs-&gt;aeq_cb[event] = hwe_cb;</div><div class='add'>+	spin_lock_init(&amp;aeqs-&gt;aeq_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_aeq_unregister_cb(struct hinic3_hwdev *hwdev,</div><div class='add'>+			      enum hinic3_aeq_type event)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_aeqs *aeqs;</div><div class='add'>+</div><div class='add'>+	aeqs = hwdev-&gt;aeqs;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;aeqs-&gt;aeq_lock);</div><div class='add'>+	aeqs-&gt;aeq_cb[event] = NULL;</div><div class='add'>+	spin_unlock_bh(&amp;aeqs-&gt;aeq_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_ceq_register_cb(struct hinic3_hwdev *hwdev,</div><div class='add'>+			   enum hinic3_ceq_event event,</div><div class='add'>+			   hinic3_ceq_event_cb callback)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_ceqs *ceqs;</div><div class='add'>+</div><div class='add'>+	ceqs = hwdev-&gt;ceqs;</div><div class='add'>+	ceqs-&gt;ceq_cb[event] = callback;</div><div class='add'>+	spin_lock_init(&amp;ceqs-&gt;ceq_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_ceq_unregister_cb(struct hinic3_hwdev *hwdev,</div><div class='add'>+			      enum hinic3_ceq_event event)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_ceqs *ceqs;</div><div class='add'>+</div><div class='add'>+	ceqs = hwdev-&gt;ceqs;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ceqs-&gt;ceq_lock);</div><div class='add'>+	ceqs-&gt;ceq_cb[event] = NULL;</div><div class='add'>+	spin_unlock_bh(&amp;ceqs-&gt;ceq_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set consumer index in the hw. */</div><div class='add'>+static void set_eq_cons_idx(struct hinic3_eq *eq, u32 arm_state)</div><div class='add'>+{</div><div class='add'>+	u32 addr = EQ_CI_SIMPLE_INDIR_REG_ADDR(eq);</div><div class='add'>+	u32 eq_wrap_ci, val;</div><div class='add'>+</div><div class='add'>+	eq_wrap_ci = HINIC3_EQ_CONS_IDX(eq);</div><div class='add'>+	val = EQ_CI_SIMPLE_INDIR_SET(arm_state, ARMED);</div><div class='add'>+	if (eq-&gt;type == HINIC3_AEQ) {</div><div class='add'>+		val = val |</div><div class='add'>+			EQ_CI_SIMPLE_INDIR_SET(eq_wrap_ci, CI) |</div><div class='add'>+			EQ_CI_SIMPLE_INDIR_SET(eq-&gt;q_id, AEQ_IDX);</div><div class='add'>+	} else {</div><div class='add'>+		val = val |</div><div class='add'>+			EQ_CI_SIMPLE_INDIR_SET(eq_wrap_ci, CI) |</div><div class='add'>+			EQ_CI_SIMPLE_INDIR_SET(eq-&gt;q_id, CEQ_IDX);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_hwif_write_reg(eq-&gt;hwdev-&gt;hwif, addr, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct hinic3_ceqs *ceq_to_ceqs(const struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	return container_of(eq, struct hinic3_ceqs, ceq[eq-&gt;q_id]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ceq_event_handler(struct hinic3_ceqs *ceqs, __le32 ceqe)</div><div class='add'>+{</div><div class='add'>+	enum hinic3_ceq_event event = CEQE_TYPE(ceqe);</div><div class='add'>+	struct hinic3_hwdev *hwdev = ceqs-&gt;hwdev;</div><div class='add'>+	__le32 ceqe_data = CEQE_DATA(ceqe);</div><div class='add'>+</div><div class='add'>+	if (event &gt;= HINIC3_MAX_CEQ_EVENTS) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "Ceq unknown event:%d, ceqe data: 0x%x\n",</div><div class='add'>+			 event, ceqe_data);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ceqs-&gt;ceq_lock);</div><div class='add'>+	if (ceqs-&gt;ceq_cb[event])</div><div class='add'>+		ceqs-&gt;ceq_cb[event](hwdev, ceqe_data);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;ceqs-&gt;ceq_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct hinic3_aeqs *aeq_to_aeqs(const struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	return container_of(eq, struct hinic3_aeqs, aeq[eq-&gt;q_id]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aeq_event_handler(struct hinic3_aeqs *aeqs, __le32 aeqe,</div><div class='add'>+			      const struct hinic3_aeq_elem *aeqe_pos)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwdev *hwdev = aeqs-&gt;hwdev;</div><div class='add'>+	u8 data[HINIC3_AEQE_DATA_SIZE], size;</div><div class='add'>+	enum hinic3_aeq_type event;</div><div class='add'>+	hinic3_aeq_event_cb hwe_cb;</div><div class='add'>+</div><div class='add'>+	if (EQ_ELEM_DESC_GET(aeqe, SRC))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	event = EQ_ELEM_DESC_GET(aeqe, TYPE);</div><div class='add'>+	if (event &gt;= HINIC3_MAX_AEQ_EVENTS) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "Aeq unknown event:%d\n", event);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(data, aeqe_pos-&gt;aeqe_data, HINIC3_AEQE_DATA_SIZE);</div><div class='add'>+	swab32_array((u32 *)data, HINIC3_AEQE_DATA_SIZE / sizeof(u32));</div><div class='add'>+	size = EQ_ELEM_DESC_GET(aeqe, SIZE);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;aeqs-&gt;aeq_lock);</div><div class='add'>+	hwe_cb = aeqs-&gt;aeq_cb[event];</div><div class='add'>+	if (hwe_cb)</div><div class='add'>+		hwe_cb(aeqs-&gt;hwdev, data, size);</div><div class='add'>+	spin_unlock_bh(&amp;aeqs-&gt;aeq_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aeq_irq_handler(struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	const struct hinic3_aeq_elem *aeqe_pos;</div><div class='add'>+	struct hinic3_aeqs *aeqs;</div><div class='add'>+	u32 i, eqe_cnt = 0;</div><div class='add'>+	__le32 aeqe;</div><div class='add'>+</div><div class='add'>+	aeqs = aeq_to_aeqs(eq);</div><div class='add'>+	for (i = 0; i &lt; HINIC3_TASK_PROCESS_EQE_LIMIT; i++) {</div><div class='add'>+		aeqe_pos = get_curr_aeq_elem(eq);</div><div class='add'>+		aeqe = (__force __le32)swab32((__force __u32)aeqe_pos-&gt;desc);</div><div class='add'>+		/* HW updates wrapped bit, when it adds eq element event */</div><div class='add'>+		if (EQ_ELEM_DESC_GET(aeqe, WRAPPED) == eq-&gt;wrapped)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		/* Prevent speculative reads from element */</div><div class='add'>+		dma_rmb();</div><div class='add'>+		aeq_event_handler(aeqs, aeqe, aeqe_pos);</div><div class='add'>+		eq-&gt;cons_idx++;</div><div class='add'>+		if (eq-&gt;cons_idx == eq-&gt;eq_len) {</div><div class='add'>+			eq-&gt;cons_idx = 0;</div><div class='add'>+			eq-&gt;wrapped = !eq-&gt;wrapped;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (++eqe_cnt &gt;= HINIC3_EQ_UPDATE_CI_STEP) {</div><div class='add'>+			eqe_cnt = 0;</div><div class='add'>+			set_eq_cons_idx(eq, HINIC3_EQ_NOT_ARMED);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EAGAIN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ceq_irq_handler(struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_ceqs *ceqs;</div><div class='add'>+	u32 eqe_cnt = 0;</div><div class='add'>+	__be32 ceqe_raw;</div><div class='add'>+	__le32 ceqe;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	ceqs = ceq_to_ceqs(eq);</div><div class='add'>+	for (i = 0; i &lt; HINIC3_TASK_PROCESS_EQE_LIMIT; i++) {</div><div class='add'>+		ceqe_raw = *get_curr_ceq_elem(eq);</div><div class='add'>+		ceqe = (__force __le32)swab32((__force __u32)ceqe_raw);</div><div class='add'>+</div><div class='add'>+		/* HW updates wrapped bit, when it adds eq element event */</div><div class='add'>+		if (EQ_ELEM_DESC_GET(ceqe, WRAPPED) == eq-&gt;wrapped)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		ceq_event_handler(ceqs, ceqe);</div><div class='add'>+		eq-&gt;cons_idx++;</div><div class='add'>+		if (eq-&gt;cons_idx == eq-&gt;eq_len) {</div><div class='add'>+			eq-&gt;cons_idx = 0;</div><div class='add'>+			eq-&gt;wrapped = !eq-&gt;wrapped;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (++eqe_cnt &gt;= HINIC3_EQ_UPDATE_CI_STEP) {</div><div class='add'>+			eqe_cnt = 0;</div><div class='add'>+			set_eq_cons_idx(eq, HINIC3_EQ_NOT_ARMED);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EAGAIN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void reschedule_aeq_handler(struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_aeqs *aeqs = aeq_to_aeqs(eq);</div><div class='add'>+</div><div class='add'>+	queue_work(aeqs-&gt;workq, &amp;eq-&gt;aeq_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int eq_irq_handler(struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (eq-&gt;type == HINIC3_AEQ)</div><div class='add'>+		err = aeq_irq_handler(eq);</div><div class='add'>+	else</div><div class='add'>+		err = ceq_irq_handler(eq);</div><div class='add'>+</div><div class='add'>+	set_eq_cons_idx(eq, err ? HINIC3_EQ_NOT_ARMED :</div><div class='add'>+			HINIC3_EQ_ARMED);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aeq_irq_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_eq *eq = container_of(work, struct hinic3_eq, aeq_work);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = eq_irq_handler(eq);</div><div class='add'>+	if (err)</div><div class='add'>+		reschedule_aeq_handler(eq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t aeq_interrupt(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct workqueue_struct *workq;</div><div class='add'>+	struct hinic3_eq *aeq = data;</div><div class='add'>+	struct hinic3_hwdev *hwdev;</div><div class='add'>+	struct hinic3_aeqs *aeqs;</div><div class='add'>+</div><div class='add'>+	aeqs = aeq_to_aeqs(aeq);</div><div class='add'>+	hwdev = aeq-&gt;hwdev;</div><div class='add'>+</div><div class='add'>+	/* clear resend timer cnt register */</div><div class='add'>+	workq = aeqs-&gt;workq;</div><div class='add'>+	hinic3_msix_intr_clear_resend_bit(hwdev, aeq-&gt;msix_entry_idx,</div><div class='add'>+					  EQ_MSIX_RESEND_TIMER_CLEAR);</div><div class='add'>+	queue_work(workq, &amp;aeq-&gt;aeq_work);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ceq_interrupt(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_eq *ceq = data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* clear resend timer counters */</div><div class='add'>+	hinic3_msix_intr_clear_resend_bit(ceq-&gt;hwdev, ceq-&gt;msix_entry_idx,</div><div class='add'>+					  EQ_MSIX_RESEND_TIMER_CLEAR);</div><div class='add'>+	err = eq_irq_handler(ceq);</div><div class='add'>+	if (err)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_set_ceq_ctrl_reg(struct hinic3_hwdev *hwdev, u16 q_id,</div><div class='add'>+				   u32 ctrl0, u32 ctrl1)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_set_ceq_ctrl_reg ceq_ctrl = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ceq_ctrl.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	ceq_ctrl.q_id = q_id;</div><div class='add'>+	ceq_ctrl.ctrl0 = ctrl0;</div><div class='add'>+	ceq_ctrl.ctrl1 = ctrl1;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;ceq_ctrl, sizeof(ceq_ctrl));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_SET_CEQ_CTRL_REG, &amp;msg_params);</div><div class='add'>+	if (err || ceq_ctrl.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set ceq %u ctrl reg, err: %d status: 0x%x\n",</div><div class='add'>+			q_id, err, ceq_ctrl.head.status);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_eq_ctrls(struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwif *hwif = eq-&gt;hwdev-&gt;hwif;</div><div class='add'>+	struct hinic3_queue_pages *qpages;</div><div class='add'>+	u8 pci_intf_idx, elem_size;</div><div class='add'>+	u32 mask, ctrl0, ctrl1;</div><div class='add'>+	u32 page_size_val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	qpages = &amp;eq-&gt;qpages;</div><div class='add'>+	page_size_val = ilog2(qpages-&gt;page_size / HINIC3_MIN_PAGE_SIZE);</div><div class='add'>+	pci_intf_idx = hwif-&gt;attr.pci_intf_idx;</div><div class='add'>+</div><div class='add'>+	if (eq-&gt;type == HINIC3_AEQ) {</div><div class='add'>+		/* set ctrl0 using read-modify-write */</div><div class='add'>+		mask = AEQ_CTRL_0_INTR_IDX_MASK |</div><div class='add'>+		       AEQ_CTRL_0_DMA_ATTR_MASK |</div><div class='add'>+		       AEQ_CTRL_0_PCI_INTF_IDX_MASK |</div><div class='add'>+		       AEQ_CTRL_0_INTR_MODE_MASK;</div><div class='add'>+		ctrl0 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_AEQ_CTRL_0_ADDR);</div><div class='add'>+		ctrl0 = (ctrl0 &amp; ~mask) |</div><div class='add'>+			AEQ_CTRL_0_SET(eq-&gt;msix_entry_idx, INTR_IDX) |</div><div class='add'>+			AEQ_CTRL_0_SET(0, DMA_ATTR) |</div><div class='add'>+			AEQ_CTRL_0_SET(pci_intf_idx, PCI_INTF_IDX) |</div><div class='add'>+			AEQ_CTRL_0_SET(HINIC3_INTR_MODE_ARMED, INTR_MODE);</div><div class='add'>+		hinic3_hwif_write_reg(hwif, HINIC3_CSR_AEQ_CTRL_0_ADDR, ctrl0);</div><div class='add'>+</div><div class='add'>+		/* HW expects log2(number of 32 byte units). */</div><div class='add'>+		elem_size = qpages-&gt;elem_size_shift - 5;</div><div class='add'>+		ctrl1 = AEQ_CTRL_1_SET(eq-&gt;eq_len, LEN) |</div><div class='add'>+			AEQ_CTRL_1_SET(elem_size, ELEM_SIZE) |</div><div class='add'>+			AEQ_CTRL_1_SET(page_size_val, PAGE_SIZE);</div><div class='add'>+		hinic3_hwif_write_reg(hwif, HINIC3_CSR_AEQ_CTRL_1_ADDR, ctrl1);</div><div class='add'>+	} else {</div><div class='add'>+		ctrl0 = CEQ_CTRL_0_SET(eq-&gt;msix_entry_idx, INTR_IDX) |</div><div class='add'>+			CEQ_CTRL_0_SET(0, DMA_ATTR) |</div><div class='add'>+			CEQ_CTRL_0_SET(0, LIMIT_KICK) |</div><div class='add'>+			CEQ_CTRL_0_SET(pci_intf_idx, PCI_INTF_IDX) |</div><div class='add'>+			CEQ_CTRL_0_SET(page_size_val, PAGE_SIZE) |</div><div class='add'>+			CEQ_CTRL_0_SET(HINIC3_INTR_MODE_ARMED, INTR_MODE);</div><div class='add'>+</div><div class='add'>+		ctrl1 = CEQ_CTRL_1_SET(eq-&gt;eq_len, LEN);</div><div class='add'>+</div><div class='add'>+		/* set ceq ctrl reg through mgmt cpu */</div><div class='add'>+		err = hinic3_set_ceq_ctrl_reg(eq-&gt;hwdev, eq-&gt;q_id, ctrl0,</div><div class='add'>+					      ctrl1);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ceq_elements_init(struct hinic3_eq *eq, u32 init_val)</div><div class='add'>+{</div><div class='add'>+	__be32 *ceqe;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; eq-&gt;eq_len; i++) {</div><div class='add'>+		ceqe = get_q_element(&amp;eq-&gt;qpages, i, NULL);</div><div class='add'>+		*ceqe = cpu_to_be32(init_val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wmb();    /* Clear ceq elements bit */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aeq_elements_init(struct hinic3_eq *eq, u32 init_val)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_aeq_elem *aeqe;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; eq-&gt;eq_len; i++) {</div><div class='add'>+		aeqe = get_q_element(&amp;eq-&gt;qpages, i, NULL);</div><div class='add'>+		aeqe-&gt;desc = cpu_to_be32(init_val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wmb();    /* Clear aeq elements bit */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void eq_elements_init(struct hinic3_eq *eq, u32 init_val)</div><div class='add'>+{</div><div class='add'>+	if (eq-&gt;type == HINIC3_AEQ)</div><div class='add'>+		aeq_elements_init(eq, init_val);</div><div class='add'>+	else</div><div class='add'>+		ceq_elements_init(eq, init_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int alloc_eq_pages(struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwif *hwif = eq-&gt;hwdev-&gt;hwif;</div><div class='add'>+	struct hinic3_queue_pages *qpages;</div><div class='add'>+	dma_addr_t page_paddr;</div><div class='add'>+	u32 reg, init_val;</div><div class='add'>+	u16 pg_idx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	qpages = &amp;eq-&gt;qpages;</div><div class='add'>+	err = hinic3_queue_pages_alloc(eq-&gt;hwdev, qpages, HINIC3_MIN_PAGE_SIZE);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (pg_idx = 0; pg_idx &lt; qpages-&gt;num_pages; pg_idx++) {</div><div class='add'>+		page_paddr = qpages-&gt;pages[pg_idx].align_paddr;</div><div class='add'>+		reg = EQ_HI_PHYS_ADDR_REG(eq-&gt;type, pg_idx);</div><div class='add'>+		hinic3_hwif_write_reg(hwif, reg, upper_32_bits(page_paddr));</div><div class='add'>+		reg = EQ_LO_PHYS_ADDR_REG(eq-&gt;type, pg_idx);</div><div class='add'>+		hinic3_hwif_write_reg(hwif, reg, lower_32_bits(page_paddr));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	init_val = HINIC3_EQ_WRAPPED(eq);</div><div class='add'>+	eq_elements_init(eq, init_val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void eq_calc_page_size_and_num(struct hinic3_eq *eq, u32 elem_size)</div><div class='add'>+{</div><div class='add'>+	u32 max_pages, min_page_size, page_size, total_size;</div><div class='add'>+</div><div class='add'>+	/* No need for complicated arithmetic. All values must be power of 2.</div><div class='add'>+	 * Multiplications give power of 2 and divisions give power of 2 without</div><div class='add'>+	 * remainder.</div><div class='add'>+	 */</div><div class='add'>+	max_pages = HINIC3_EQ_MAX_PAGES(eq);</div><div class='add'>+	min_page_size = HINIC3_MIN_PAGE_SIZE;</div><div class='add'>+	total_size = eq-&gt;eq_len * elem_size;</div><div class='add'>+</div><div class='add'>+	if (total_size &lt;= max_pages * min_page_size)</div><div class='add'>+		page_size = min_page_size;</div><div class='add'>+	else</div><div class='add'>+		page_size = total_size / max_pages;</div><div class='add'>+</div><div class='add'>+	hinic3_queue_pages_init(&amp;eq-&gt;qpages, eq-&gt;eq_len, page_size, elem_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int request_eq_irq(struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (eq-&gt;type == HINIC3_AEQ) {</div><div class='add'>+		INIT_WORK(&amp;eq-&gt;aeq_work, aeq_irq_work);</div><div class='add'>+		snprintf(eq-&gt;irq_name, sizeof(eq-&gt;irq_name),</div><div class='add'>+			 "hinic3_aeq%u@pci:%s", eq-&gt;q_id,</div><div class='add'>+			 pci_name(eq-&gt;hwdev-&gt;pdev));</div><div class='add'>+		err = request_irq(eq-&gt;irq_id, aeq_interrupt, 0,</div><div class='add'>+				  eq-&gt;irq_name, eq);</div><div class='add'>+	} else {</div><div class='add'>+		snprintf(eq-&gt;irq_name, sizeof(eq-&gt;irq_name),</div><div class='add'>+			 "hinic3_ceq%u@pci:%s", eq-&gt;q_id,</div><div class='add'>+			 pci_name(eq-&gt;hwdev-&gt;pdev));</div><div class='add'>+		err = request_threaded_irq(eq-&gt;irq_id, NULL, ceq_interrupt,</div><div class='add'>+					   IRQF_ONESHOT, eq-&gt;irq_name, eq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void reset_eq(struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	/* clear eq_len to force eqe drop in hardware */</div><div class='add'>+	if (eq-&gt;type == HINIC3_AEQ)</div><div class='add'>+		hinic3_hwif_write_reg(eq-&gt;hwdev-&gt;hwif,</div><div class='add'>+				      HINIC3_CSR_AEQ_CTRL_1_ADDR, 0);</div><div class='add'>+	else</div><div class='add'>+		hinic3_set_ceq_ctrl_reg(eq-&gt;hwdev, eq-&gt;q_id, 0, 0);</div><div class='add'>+</div><div class='add'>+	hinic3_hwif_write_reg(eq-&gt;hwdev-&gt;hwif, EQ_PROD_IDX_REG_ADDR(eq), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_eq(struct hinic3_eq *eq, struct hinic3_hwdev *hwdev, u16 q_id,</div><div class='add'>+		   u32 q_len, enum hinic3_eq_type type,</div><div class='add'>+		   struct msix_entry *msix_entry)</div><div class='add'>+{</div><div class='add'>+	u32 elem_size;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	eq-&gt;hwdev = hwdev;</div><div class='add'>+	eq-&gt;q_id = q_id;</div><div class='add'>+	eq-&gt;type = type;</div><div class='add'>+	eq-&gt;eq_len = q_len;</div><div class='add'>+</div><div class='add'>+	/* Indirect access should set q_id first */</div><div class='add'>+	hinic3_hwif_write_reg(hwdev-&gt;hwif, HINIC3_EQ_INDIR_IDX_ADDR(eq-&gt;type),</div><div class='add'>+			      eq-&gt;q_id);</div><div class='add'>+</div><div class='add'>+	reset_eq(eq);</div><div class='add'>+</div><div class='add'>+	eq-&gt;cons_idx = 0;</div><div class='add'>+	eq-&gt;wrapped = 0;</div><div class='add'>+</div><div class='add'>+	elem_size = (type == HINIC3_AEQ) ? HINIC3_AEQE_SIZE : HINIC3_CEQE_SIZE;</div><div class='add'>+	eq_calc_page_size_and_num(eq, elem_size);</div><div class='add'>+</div><div class='add'>+	err = alloc_eq_pages(eq);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to allocate pages for eq\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	eq-&gt;msix_entry_idx = msix_entry-&gt;entry;</div><div class='add'>+	eq-&gt;irq_id = msix_entry-&gt;vector;</div><div class='add'>+</div><div class='add'>+	err = set_eq_ctrls(eq);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set ctrls for eq\n");</div><div class='add'>+		goto err_free_queue_pages;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_eq_cons_idx(eq, HINIC3_EQ_ARMED);</div><div class='add'>+</div><div class='add'>+	err = request_eq_irq(eq);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to request irq for the eq, err: %d\n", err);</div><div class='add'>+		goto err_free_queue_pages;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_set_msix_state(hwdev, eq-&gt;msix_entry_idx, HINIC3_MSIX_DISABLE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_queue_pages:</div><div class='add'>+	hinic3_queue_pages_free(hwdev, &amp;eq-&gt;qpages);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void remove_eq(struct hinic3_eq *eq)</div><div class='add'>+{</div><div class='add'>+	hinic3_set_msix_state(eq-&gt;hwdev, eq-&gt;msix_entry_idx,</div><div class='add'>+			      HINIC3_MSIX_DISABLE);</div><div class='add'>+	free_irq(eq-&gt;irq_id, eq);</div><div class='add'>+	/* Indirect access should set q_id first */</div><div class='add'>+	hinic3_hwif_write_reg(eq-&gt;hwdev-&gt;hwif,</div><div class='add'>+			      HINIC3_EQ_INDIR_IDX_ADDR(eq-&gt;type),</div><div class='add'>+			      eq-&gt;q_id);</div><div class='add'>+</div><div class='add'>+	if (eq-&gt;type == HINIC3_AEQ) {</div><div class='add'>+		disable_work_sync(&amp;eq-&gt;aeq_work);</div><div class='add'>+		/* clear eq_len to avoid hw access host memory */</div><div class='add'>+		hinic3_hwif_write_reg(eq-&gt;hwdev-&gt;hwif,</div><div class='add'>+				      HINIC3_CSR_AEQ_CTRL_1_ADDR, 0);</div><div class='add'>+	} else {</div><div class='add'>+		hinic3_set_ceq_ctrl_reg(eq-&gt;hwdev, eq-&gt;q_id, 0, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* update consumer index to avoid invalid interrupt */</div><div class='add'>+	eq-&gt;cons_idx = hinic3_hwif_read_reg(eq-&gt;hwdev-&gt;hwif,</div><div class='add'>+					    EQ_PROD_IDX_REG_ADDR(eq));</div><div class='add'>+	set_eq_cons_idx(eq, HINIC3_EQ_NOT_ARMED);</div><div class='add'>+	hinic3_queue_pages_free(eq-&gt;hwdev, &amp;eq-&gt;qpages);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_aeqs_init(struct hinic3_hwdev *hwdev, u16 num_aeqs,</div><div class='add'>+		     struct msix_entry *msix_entries)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_aeqs *aeqs;</div><div class='add'>+	u16 q_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	aeqs = kzalloc(sizeof(*aeqs), GFP_KERNEL);</div><div class='add'>+	if (!aeqs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hwdev-&gt;aeqs = aeqs;</div><div class='add'>+	aeqs-&gt;hwdev = hwdev;</div><div class='add'>+	aeqs-&gt;num_aeqs = num_aeqs;</div><div class='add'>+	aeqs-&gt;workq = alloc_workqueue(HINIC3_EQS_WQ_NAME, WQ_MEM_RECLAIM,</div><div class='add'>+				      HINIC3_MAX_AEQS);</div><div class='add'>+	if (!aeqs-&gt;workq) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to initialize aeq workqueue\n");</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_free_aeqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; num_aeqs; q_id++) {</div><div class='add'>+		err = init_eq(&amp;aeqs-&gt;aeq[q_id], hwdev, q_id,</div><div class='add'>+			      HINIC3_DEFAULT_AEQ_LEN, HINIC3_AEQ,</div><div class='add'>+			      &amp;msix_entries[q_id]);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Failed to init aeq %u\n",</div><div class='add'>+				q_id);</div><div class='add'>+			goto err_remove_eqs;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	for (q_id = 0; q_id &lt; num_aeqs; q_id++)</div><div class='add'>+		hinic3_set_msix_state(hwdev, aeqs-&gt;aeq[q_id].msix_entry_idx,</div><div class='add'>+				      HINIC3_MSIX_ENABLE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_remove_eqs:</div><div class='add'>+	while (q_id &gt; 0) {</div><div class='add'>+		q_id--;</div><div class='add'>+		remove_eq(&amp;aeqs-&gt;aeq[q_id]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	destroy_workqueue(aeqs-&gt;workq);</div><div class='add'>+</div><div class='add'>+err_free_aeqs:</div><div class='add'>+	kfree(aeqs);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_aeqs_free(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_aeqs *aeqs = hwdev-&gt;aeqs;</div><div class='add'>+	enum hinic3_aeq_type aeq_event;</div><div class='add'>+	struct hinic3_eq *eq;</div><div class='add'>+	u16 q_id;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; aeqs-&gt;num_aeqs; q_id++) {</div><div class='add'>+		eq = aeqs-&gt;aeq + q_id;</div><div class='add'>+		remove_eq(eq);</div><div class='add'>+		hinic3_free_irq(hwdev, eq-&gt;irq_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (aeq_event = 0; aeq_event &lt; HINIC3_MAX_AEQ_EVENTS; aeq_event++)</div><div class='add'>+		hinic3_aeq_unregister_cb(hwdev, aeq_event);</div><div class='add'>+</div><div class='add'>+	destroy_workqueue(aeqs-&gt;workq);</div><div class='add'>+</div><div class='add'>+	kfree(aeqs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_ceqs_init(struct hinic3_hwdev *hwdev, u16 num_ceqs,</div><div class='add'>+		     struct msix_entry *msix_entries)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_ceqs *ceqs;</div><div class='add'>+	u16 q_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ceqs = kzalloc(sizeof(*ceqs), GFP_KERNEL);</div><div class='add'>+	if (!ceqs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hwdev-&gt;ceqs = ceqs;</div><div class='add'>+	ceqs-&gt;hwdev = hwdev;</div><div class='add'>+	ceqs-&gt;num_ceqs = num_ceqs;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; num_ceqs; q_id++) {</div><div class='add'>+		err = init_eq(&amp;ceqs-&gt;ceq[q_id], hwdev, q_id,</div><div class='add'>+			      HINIC3_DEFAULT_CEQ_LEN, HINIC3_CEQ,</div><div class='add'>+			      &amp;msix_entries[q_id]);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Failed to init ceq %u\n",</div><div class='add'>+				q_id);</div><div class='add'>+			goto err_free_ceqs;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	for (q_id = 0; q_id &lt; num_ceqs; q_id++)</div><div class='add'>+		hinic3_set_msix_state(hwdev, ceqs-&gt;ceq[q_id].msix_entry_idx,</div><div class='add'>+				      HINIC3_MSIX_ENABLE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_ceqs:</div><div class='add'>+	while (q_id &gt; 0) {</div><div class='add'>+		q_id--;</div><div class='add'>+		remove_eq(&amp;ceqs-&gt;ceq[q_id]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(ceqs);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_ceqs_free(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_ceqs *ceqs = hwdev-&gt;ceqs;</div><div class='add'>+	enum hinic3_ceq_event ceq_event;</div><div class='add'>+	struct hinic3_eq *eq;</div><div class='add'>+	u16 q_id;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; ceqs-&gt;num_ceqs; q_id++) {</div><div class='add'>+		eq = ceqs-&gt;ceq + q_id;</div><div class='add'>+		remove_eq(eq);</div><div class='add'>+		hinic3_free_irq(hwdev, eq-&gt;irq_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (ceq_event = 0; ceq_event &lt; HINIC3_MAX_CEQ_EVENTS; ceq_event++)</div><div class='add'>+		hinic3_ceq_unregister_cb(hwdev, ceq_event);</div><div class='add'>+</div><div class='add'>+	kfree(ceqs);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_eqs.h b/drivers/net/ethernet/huawei/hinic3/hinic3_eqs.h<br/>new file mode 100644<br/>index 000000000000..005a6e0745b3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_eqs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_eqs.h</a></div><div class='hunk'>@@ -0,0 +1,122 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_EQS_H_</div><div class='add'>+#define _HINIC3_EQS_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hw_cfg.h"</div><div class='add'>+#include "hinic3_queue_common.h"</div><div class='add'>+</div><div class='add'>+#define HINIC3_MAX_AEQS              4</div><div class='add'>+#define HINIC3_MAX_CEQS              32</div><div class='add'>+</div><div class='add'>+#define HINIC3_AEQ_MAX_PAGES         4</div><div class='add'>+#define HINIC3_CEQ_MAX_PAGES         8</div><div class='add'>+</div><div class='add'>+#define HINIC3_AEQE_SIZE             64</div><div class='add'>+#define HINIC3_CEQE_SIZE             4</div><div class='add'>+</div><div class='add'>+#define HINIC3_AEQE_DESC_SIZE        4</div><div class='add'>+#define HINIC3_AEQE_DATA_SIZE        (HINIC3_AEQE_SIZE - HINIC3_AEQE_DESC_SIZE)</div><div class='add'>+</div><div class='add'>+#define HINIC3_DEFAULT_AEQ_LEN       0x10000</div><div class='add'>+#define HINIC3_DEFAULT_CEQ_LEN       0x10000</div><div class='add'>+</div><div class='add'>+#define HINIC3_EQ_IRQ_NAME_LEN       64</div><div class='add'>+</div><div class='add'>+#define HINIC3_EQ_USLEEP_LOW_BOUND   900</div><div class='add'>+#define HINIC3_EQ_USLEEP_HIGH_BOUND  1000</div><div class='add'>+</div><div class='add'>+enum hinic3_eq_type {</div><div class='add'>+	HINIC3_AEQ = 0,</div><div class='add'>+	HINIC3_CEQ = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_eq_intr_mode {</div><div class='add'>+	HINIC3_INTR_MODE_ARMED  = 0,</div><div class='add'>+	HINIC3_INTR_MODE_ALWAYS = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_eq_ci_arm_state {</div><div class='add'>+	HINIC3_EQ_NOT_ARMED = 0,</div><div class='add'>+	HINIC3_EQ_ARMED     = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_eq {</div><div class='add'>+	struct hinic3_hwdev       *hwdev;</div><div class='add'>+	struct hinic3_queue_pages qpages;</div><div class='add'>+	u16                       q_id;</div><div class='add'>+	enum hinic3_eq_type       type;</div><div class='add'>+	u32                       eq_len;</div><div class='add'>+	u32                       cons_idx;</div><div class='add'>+	u8                        wrapped;</div><div class='add'>+	u32                       irq_id;</div><div class='add'>+	u16                       msix_entry_idx;</div><div class='add'>+	char                      irq_name[HINIC3_EQ_IRQ_NAME_LEN];</div><div class='add'>+	struct work_struct        aeq_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_aeq_elem {</div><div class='add'>+	u8     aeqe_data[HINIC3_AEQE_DATA_SIZE];</div><div class='add'>+	__be32 desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_aeq_type {</div><div class='add'>+	HINIC3_HW_INTER_INT   = 0,</div><div class='add'>+	HINIC3_MBX_FROM_FUNC  = 1,</div><div class='add'>+	HINIC3_MSG_FROM_FW    = 2,</div><div class='add'>+	HINIC3_MAX_AEQ_EVENTS = 6,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+typedef void (*hinic3_aeq_event_cb)(struct hinic3_hwdev *hwdev, u8 *data,</div><div class='add'>+				    u8 size);</div><div class='add'>+</div><div class='add'>+struct hinic3_aeqs {</div><div class='add'>+	struct hinic3_hwdev     *hwdev;</div><div class='add'>+	hinic3_aeq_event_cb     aeq_cb[HINIC3_MAX_AEQ_EVENTS];</div><div class='add'>+	struct hinic3_eq        aeq[HINIC3_MAX_AEQS];</div><div class='add'>+	u16                     num_aeqs;</div><div class='add'>+	struct workqueue_struct *workq;</div><div class='add'>+	/* lock for aeq event flag */</div><div class='add'>+	spinlock_t              aeq_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_ceq_event {</div><div class='add'>+	HINIC3_CMDQ           = 3,</div><div class='add'>+	HINIC3_MAX_CEQ_EVENTS = 6,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+typedef void (*hinic3_ceq_event_cb)(struct hinic3_hwdev *hwdev,</div><div class='add'>+				    __le32 ceqe_data);</div><div class='add'>+</div><div class='add'>+struct hinic3_ceqs {</div><div class='add'>+	struct hinic3_hwdev *hwdev;</div><div class='add'>+</div><div class='add'>+	hinic3_ceq_event_cb ceq_cb[HINIC3_MAX_CEQ_EVENTS];</div><div class='add'>+</div><div class='add'>+	struct hinic3_eq    ceq[HINIC3_MAX_CEQS];</div><div class='add'>+	u16                 num_ceqs;</div><div class='add'>+	/* lock for ceq event flag */</div><div class='add'>+	spinlock_t          ceq_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hinic3_aeqs_init(struct hinic3_hwdev *hwdev, u16 num_aeqs,</div><div class='add'>+		     struct msix_entry *msix_entries);</div><div class='add'>+void hinic3_aeqs_free(struct hinic3_hwdev *hwdev);</div><div class='add'>+int hinic3_aeq_register_cb(struct hinic3_hwdev *hwdev,</div><div class='add'>+			   enum hinic3_aeq_type event,</div><div class='add'>+			   hinic3_aeq_event_cb hwe_cb);</div><div class='add'>+void hinic3_aeq_unregister_cb(struct hinic3_hwdev *hwdev,</div><div class='add'>+			      enum hinic3_aeq_type event);</div><div class='add'>+int hinic3_ceqs_init(struct hinic3_hwdev *hwdev, u16 num_ceqs,</div><div class='add'>+		     struct msix_entry *msix_entries);</div><div class='add'>+void hinic3_ceqs_free(struct hinic3_hwdev *hwdev);</div><div class='add'>+int hinic3_ceq_register_cb(struct hinic3_hwdev *hwdev,</div><div class='add'>+			   enum hinic3_ceq_event event,</div><div class='add'>+			   hinic3_ceq_event_cb callback);</div><div class='add'>+void hinic3_ceq_unregister_cb(struct hinic3_hwdev *hwdev,</div><div class='add'>+			      enum hinic3_ceq_event event);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.c b/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.c<br/>new file mode 100644<br/>index 000000000000..7827c1f626db<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.c</a></div><div class='hunk'>@@ -0,0 +1,236 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hw_cfg.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_mbox.h"</div><div class='add'>+</div><div class='add'>+#define HINIC3_CFG_MAX_QP  256</div><div class='add'>+</div><div class='add'>+static void hinic3_parse_pub_res_cap(struct hinic3_hwdev *hwdev,</div><div class='add'>+				     struct hinic3_dev_cap *cap,</div><div class='add'>+				     const struct cfg_cmd_dev_cap *dev_cap,</div><div class='add'>+				     enum hinic3_func_type type)</div><div class='add'>+{</div><div class='add'>+	cap-&gt;port_id = dev_cap-&gt;port_id;</div><div class='add'>+	cap-&gt;supp_svcs_bitmap = dev_cap-&gt;svc_cap_en;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_parse_l2nic_res_cap(struct hinic3_hwdev *hwdev,</div><div class='add'>+				       struct hinic3_dev_cap *cap,</div><div class='add'>+				       const struct cfg_cmd_dev_cap *dev_cap,</div><div class='add'>+				       enum hinic3_func_type type)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_service_cap *nic_svc_cap = &amp;cap-&gt;nic_svc_cap;</div><div class='add'>+</div><div class='add'>+	nic_svc_cap-&gt;max_sqs = min(dev_cap-&gt;nic_max_sq_id + 1,</div><div class='add'>+				   HINIC3_CFG_MAX_QP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_parse_dev_cap(struct hinic3_hwdev *hwdev,</div><div class='add'>+				 const struct cfg_cmd_dev_cap *dev_cap,</div><div class='add'>+				 enum hinic3_func_type type)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_dev_cap *cap = &amp;hwdev-&gt;cfg_mgmt-&gt;cap;</div><div class='add'>+</div><div class='add'>+	/* Public resource */</div><div class='add'>+	hinic3_parse_pub_res_cap(hwdev, cap, dev_cap, type);</div><div class='add'>+</div><div class='add'>+	/* L2 NIC resource */</div><div class='add'>+	if (hinic3_support_nic(hwdev))</div><div class='add'>+		hinic3_parse_l2nic_res_cap(hwdev, cap, dev_cap, type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_cap_from_fw(struct hinic3_hwdev *hwdev,</div><div class='add'>+			   enum hinic3_func_type type)</div><div class='add'>+{</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	struct cfg_cmd_dev_cap dev_cap = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	dev_cap.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;dev_cap, sizeof(dev_cap));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_CFGM,</div><div class='add'>+				       CFG_CMD_GET_DEV_CAP, &amp;msg_params);</div><div class='add'>+	if (err || dev_cap.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to get capability from FW, err: %d, status: 0x%x\n",</div><div class='add'>+			err, dev_cap.head.status);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_parse_dev_cap(hwdev, &amp;dev_cap, type);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_init_irq_info(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cfg_mgmt_info *cfg_mgmt = hwdev-&gt;cfg_mgmt;</div><div class='add'>+	struct hinic3_hwif *hwif = hwdev-&gt;hwif;</div><div class='add'>+	u16 intr_num = hwif-&gt;attr.num_irqs;</div><div class='add'>+	struct hinic3_irq_info *irq_info;</div><div class='add'>+	u16 intr_needed;</div><div class='add'>+</div><div class='add'>+	intr_needed = hwif-&gt;attr.msix_flex_en ? (hwif-&gt;attr.num_aeqs +</div><div class='add'>+		      hwif-&gt;attr.num_ceqs + hwif-&gt;attr.num_sq) : intr_num;</div><div class='add'>+	if (intr_needed &gt; intr_num) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "Irq num cfg %d is less than the needed irq num %d msix_flex_en %d\n",</div><div class='add'>+			 intr_num, intr_needed, hwdev-&gt;hwif-&gt;attr.msix_flex_en);</div><div class='add'>+		intr_needed = intr_num;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_info = &amp;cfg_mgmt-&gt;irq_info;</div><div class='add'>+	irq_info-&gt;irq = kcalloc(intr_num, sizeof(struct hinic3_irq),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!irq_info-&gt;irq)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	irq_info-&gt;num_irq_hw = intr_needed;</div><div class='add'>+	mutex_init(&amp;irq_info-&gt;irq_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_init_irq_alloc_info(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cfg_mgmt_info *cfg_mgmt = hwdev-&gt;cfg_mgmt;</div><div class='add'>+	struct hinic3_irq *irq = cfg_mgmt-&gt;irq_info.irq;</div><div class='add'>+	u16 nreq = cfg_mgmt-&gt;irq_info.num_irq_hw;</div><div class='add'>+	struct pci_dev *pdev = hwdev-&gt;pdev;</div><div class='add'>+	int actual_irq;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	actual_irq = pci_alloc_irq_vectors(pdev, 2, nreq, PCI_IRQ_MSIX);</div><div class='add'>+	if (actual_irq &lt; 0) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Alloc msix entries with threshold 2 failed. actual_irq: %d\n",</div><div class='add'>+			actual_irq);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nreq = actual_irq;</div><div class='add'>+	cfg_mgmt-&gt;irq_info.num_irq = nreq;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nreq; ++i) {</div><div class='add'>+		irq[i].msix_entry_idx = i;</div><div class='add'>+		irq[i].irq_id = pci_irq_vector(pdev, i);</div><div class='add'>+		irq[i].allocated = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_init_cfg_mgmt(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cfg_mgmt_info *cfg_mgmt;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cfg_mgmt = kzalloc(sizeof(*cfg_mgmt), GFP_KERNEL);</div><div class='add'>+	if (!cfg_mgmt)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hwdev-&gt;cfg_mgmt = cfg_mgmt;</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_irq_info(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init hinic3_irq_mgmt_info, err: %d\n",</div><div class='add'>+			err);</div><div class='add'>+		goto err_free_cfg_mgmt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_irq_alloc_info(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init hinic3_irq_info, err: %d\n",</div><div class='add'>+			err);</div><div class='add'>+		goto err_free_irq_info;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irq_info:</div><div class='add'>+	kfree(cfg_mgmt-&gt;irq_info.irq);</div><div class='add'>+	cfg_mgmt-&gt;irq_info.irq = NULL;</div><div class='add'>+err_free_cfg_mgmt:</div><div class='add'>+	kfree(cfg_mgmt);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_cfg_mgmt(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cfg_mgmt_info *cfg_mgmt = hwdev-&gt;cfg_mgmt;</div><div class='add'>+</div><div class='add'>+	pci_free_irq_vectors(hwdev-&gt;pdev);</div><div class='add'>+	kfree(cfg_mgmt-&gt;irq_info.irq);</div><div class='add'>+	cfg_mgmt-&gt;irq_info.irq = NULL;</div><div class='add'>+	kfree(cfg_mgmt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_irqs(struct hinic3_hwdev *hwdev, u16 num,</div><div class='add'>+		      struct msix_entry *alloc_arr, u16 *act_num)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_irq_info *irq_info;</div><div class='add'>+	struct hinic3_irq *curr;</div><div class='add'>+	u16 i, found = 0;</div><div class='add'>+</div><div class='add'>+	irq_info = &amp;hwdev-&gt;cfg_mgmt-&gt;irq_info;</div><div class='add'>+	mutex_lock(&amp;irq_info-&gt;irq_mutex);</div><div class='add'>+	for (i = 0; i &lt; irq_info-&gt;num_irq &amp;&amp; found &lt; num; i++) {</div><div class='add'>+		curr = irq_info-&gt;irq + i;</div><div class='add'>+		if (curr-&gt;allocated)</div><div class='add'>+			continue;</div><div class='add'>+		curr-&gt;allocated = true;</div><div class='add'>+		alloc_arr[found].vector = curr-&gt;irq_id;</div><div class='add'>+		alloc_arr[found].entry = curr-&gt;msix_entry_idx;</div><div class='add'>+		found++;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;irq_info-&gt;irq_mutex);</div><div class='add'>+</div><div class='add'>+	*act_num = found;</div><div class='add'>+</div><div class='add'>+	return found == 0 ? -ENOMEM : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_irq(struct hinic3_hwdev *hwdev, u32 irq_id)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_irq_info *irq_info;</div><div class='add'>+	struct hinic3_irq *curr;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	irq_info = &amp;hwdev-&gt;cfg_mgmt-&gt;irq_info;</div><div class='add'>+	mutex_lock(&amp;irq_info-&gt;irq_mutex);</div><div class='add'>+	for (i = 0; i &lt; irq_info-&gt;num_irq; i++) {</div><div class='add'>+		curr = irq_info-&gt;irq + i;</div><div class='add'>+		if (curr-&gt;irq_id == irq_id) {</div><div class='add'>+			curr-&gt;allocated = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;irq_info-&gt;irq_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_init_capability(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	return get_cap_from_fw(hwdev, HINIC3_FUNC_TYPE_VF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool hinic3_support_nic(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	return hwdev-&gt;cfg_mgmt-&gt;cap.supp_svcs_bitmap &amp;</div><div class='add'>+	       BIT(HINIC3_SERVICE_T_NIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 hinic3_func_max_qnum(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	return hwdev-&gt;cfg_mgmt-&gt;cap.nic_svc_cap.max_sqs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 hinic3_physical_port_id(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	return hwdev-&gt;cfg_mgmt-&gt;cap.port_id;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.h b/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.h<br/>new file mode 100644<br/>index 000000000000..58806199bf54<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.h</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_HW_CFG_H_</div><div class='add'>+#define _HINIC3_HW_CFG_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+struct hinic3_hwdev;</div><div class='add'>+</div><div class='add'>+struct hinic3_irq {</div><div class='add'>+	u32  irq_id;</div><div class='add'>+	u16  msix_entry_idx;</div><div class='add'>+	bool allocated;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_irq_info {</div><div class='add'>+	struct hinic3_irq *irq;</div><div class='add'>+	u16               num_irq;</div><div class='add'>+	/* device max irq number */</div><div class='add'>+	u16               num_irq_hw;</div><div class='add'>+	/* protect irq alloc and free */</div><div class='add'>+	struct mutex      irq_mutex;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_nic_service_cap {</div><div class='add'>+	u16 max_sqs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Device capabilities */</div><div class='add'>+struct hinic3_dev_cap {</div><div class='add'>+	/* Bitmasks of services supported by device */</div><div class='add'>+	u16                           supp_svcs_bitmap;</div><div class='add'>+	/* Physical port */</div><div class='add'>+	u8                            port_id;</div><div class='add'>+	struct hinic3_nic_service_cap nic_svc_cap;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_cfg_mgmt_info {</div><div class='add'>+	struct hinic3_irq_info irq_info;</div><div class='add'>+	struct hinic3_dev_cap  cap;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hinic3_init_cfg_mgmt(struct hinic3_hwdev *hwdev);</div><div class='add'>+void hinic3_free_cfg_mgmt(struct hinic3_hwdev *hwdev);</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_irqs(struct hinic3_hwdev *hwdev, u16 num,</div><div class='add'>+		      struct msix_entry *alloc_arr, u16 *act_num);</div><div class='add'>+void hinic3_free_irq(struct hinic3_hwdev *hwdev, u32 irq_id);</div><div class='add'>+</div><div class='add'>+int hinic3_init_capability(struct hinic3_hwdev *hwdev);</div><div class='add'>+bool hinic3_support_nic(struct hinic3_hwdev *hwdev);</div><div class='add'>+u16 hinic3_func_max_qnum(struct hinic3_hwdev *hwdev);</div><div class='add'>+u8 hinic3_physical_port_id(struct hinic3_hwdev *hwdev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c b/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c<br/>new file mode 100644<br/>index 000000000000..89638813df40<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c</a></div><div class='hunk'>@@ -0,0 +1,426 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_cmdq.h"</div><div class='add'>+#include "hinic3_hw_comm.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_mbox.h"</div><div class='add'>+</div><div class='add'>+int hinic3_set_interrupt_cfg_direct(struct hinic3_hwdev *hwdev,</div><div class='add'>+				    const struct hinic3_interrupt_info *info)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_cfg_msix_ctrl_reg msix_cfg = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	msix_cfg.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	msix_cfg.msix_index = info-&gt;msix_index;</div><div class='add'>+	msix_cfg.opcode = MGMT_MSG_CMD_OP_SET;</div><div class='add'>+</div><div class='add'>+	msix_cfg.lli_credit_cnt = info-&gt;lli_credit_limit;</div><div class='add'>+	msix_cfg.lli_timer_cnt = info-&gt;lli_timer_cfg;</div><div class='add'>+	msix_cfg.pending_cnt = info-&gt;pending_limit;</div><div class='add'>+	msix_cfg.coalesce_timer_cnt = info-&gt;coalesc_timer_cfg;</div><div class='add'>+	msix_cfg.resend_timer_cnt = info-&gt;resend_timer_cfg;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;msix_cfg, sizeof(msix_cfg));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_CFG_MSIX_CTRL_REG, &amp;msg_params);</div><div class='add'>+	if (err || msix_cfg.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to set interrupt config, err: %d, status: 0x%x\n",</div><div class='add'>+			err, msix_cfg.head.status);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_func_reset(struct hinic3_hwdev *hwdev, u16 func_id, u64 reset_flag)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_func_reset func_reset = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	func_reset.func_id = func_id;</div><div class='add'>+	func_reset.reset_flag = reset_flag;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;func_reset,</div><div class='add'>+				     sizeof(func_reset));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_FUNC_RESET, &amp;msg_params);</div><div class='add'>+	if (err || func_reset.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to reset func resources, reset_flag 0x%llx, err: %d, status: 0x%x\n",</div><div class='add'>+			reset_flag, err, func_reset.head.status);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_comm_features_nego(struct hinic3_hwdev *hwdev, u8 opcode,</div><div class='add'>+				     u64 *s_feature, u16 size)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_feature_nego feature_nego = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	feature_nego.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	feature_nego.opcode = opcode;</div><div class='add'>+	if (opcode == MGMT_MSG_CMD_OP_SET)</div><div class='add'>+		memcpy(feature_nego.s_feature, s_feature,</div><div class='add'>+		       array_size(size, sizeof(u64)));</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;feature_nego,</div><div class='add'>+				     sizeof(feature_nego));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_FEATURE_NEGO, &amp;msg_params);</div><div class='add'>+	if (err || feature_nego.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to negotiate feature, err: %d, status: 0x%x\n",</div><div class='add'>+			err, feature_nego.head.status);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (opcode == MGMT_MSG_CMD_OP_GET)</div><div class='add'>+		memcpy(s_feature, feature_nego.s_feature,</div><div class='add'>+		       array_size(size, sizeof(u64)));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_get_comm_features(struct hinic3_hwdev *hwdev, u64 *s_feature,</div><div class='add'>+			     u16 size)</div><div class='add'>+{</div><div class='add'>+	return hinic3_comm_features_nego(hwdev, MGMT_MSG_CMD_OP_GET, s_feature,</div><div class='add'>+					 size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_comm_features(struct hinic3_hwdev *hwdev, u64 *s_feature,</div><div class='add'>+			     u16 size)</div><div class='add'>+{</div><div class='add'>+	return hinic3_comm_features_nego(hwdev, MGMT_MSG_CMD_OP_SET, s_feature,</div><div class='add'>+					 size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_get_global_attr(struct hinic3_hwdev *hwdev,</div><div class='add'>+			   struct comm_global_attr *attr)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_get_glb_attr get_attr = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;get_attr, sizeof(get_attr));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_GET_GLOBAL_ATTR, &amp;msg_params);</div><div class='add'>+	if (err || get_attr.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to get global attribute, err: %d, status: 0x%x\n",</div><div class='add'>+			err, get_attr.head.status);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(attr, &amp;get_attr.attr, sizeof(*attr));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_func_svc_used_state(struct hinic3_hwdev *hwdev, u16 svc_type,</div><div class='add'>+				   u8 state)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_set_func_svc_used_state used_state = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	used_state.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	used_state.svc_type = svc_type;</div><div class='add'>+	used_state.used_state = state;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;used_state,</div><div class='add'>+				     sizeof(used_state));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_SET_FUNC_SVC_USED_STATE,</div><div class='add'>+				       &amp;msg_params);</div><div class='add'>+	if (err || used_state.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to set func service used state, err: %d, status: 0x%x\n",</div><div class='add'>+			err, used_state.head.status);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_dma_attr_tbl(struct hinic3_hwdev *hwdev, u8 entry_idx, u8 st,</div><div class='add'>+			    u8 at, u8 ph, u8 no_snooping, u8 tph_en)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_set_dma_attr dma_attr = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	dma_attr.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	dma_attr.entry_idx = entry_idx;</div><div class='add'>+	dma_attr.st = st;</div><div class='add'>+	dma_attr.at = at;</div><div class='add'>+	dma_attr.ph = ph;</div><div class='add'>+	dma_attr.no_snooping = no_snooping;</div><div class='add'>+	dma_attr.tph_en = tph_en;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;dma_attr, sizeof(dma_attr));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_SET_DMA_ATTR, &amp;msg_params);</div><div class='add'>+	if (err || dma_attr.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set dma attr, err: %d, status: 0x%x\n",</div><div class='add'>+			err, dma_attr.head.status);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_wq_page_size(struct hinic3_hwdev *hwdev, u16 func_idx,</div><div class='add'>+			    u32 page_size)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_cfg_wq_page_size page_size_info = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	page_size_info.func_id = func_idx;</div><div class='add'>+	page_size_info.page_size = ilog2(page_size / HINIC3_MIN_PAGE_SIZE);</div><div class='add'>+	page_size_info.opcode = MGMT_MSG_CMD_OP_SET;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;page_size_info,</div><div class='add'>+				     sizeof(page_size_info));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_CFG_PAGESIZE, &amp;msg_params);</div><div class='add'>+	if (err || page_size_info.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to set wq page size, err: %d, status: 0x%x\n",</div><div class='add'>+			err, page_size_info.head.status);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_cmdq_depth(struct hinic3_hwdev *hwdev, u16 cmdq_depth)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_set_root_ctxt root_ctxt = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	root_ctxt.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+</div><div class='add'>+	root_ctxt.set_cmdq_depth = 1;</div><div class='add'>+	root_ctxt.cmdq_depth = ilog2(cmdq_depth);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;root_ctxt,</div><div class='add'>+				     sizeof(root_ctxt));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_SET_VAT, &amp;msg_params);</div><div class='add'>+	if (err || root_ctxt.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to set cmdq depth, err: %d, status: 0x%x\n",</div><div class='add'>+			err, root_ctxt.head.status);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define HINIC3_WAIT_CMDQ_IDLE_TIMEOUT    5000</div><div class='add'>+</div><div class='add'>+static enum hinic3_wait_return check_cmdq_stop_handler(void *priv_data)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwdev *hwdev = priv_data;</div><div class='add'>+	enum hinic3_cmdq_type cmdq_type;</div><div class='add'>+	struct hinic3_cmdqs *cmdqs;</div><div class='add'>+</div><div class='add'>+	cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+	for (cmdq_type = 0; cmdq_type &lt; cmdqs-&gt;cmdq_num; cmdq_type++) {</div><div class='add'>+		if (!hinic3_cmdq_idle(&amp;cmdqs-&gt;cmdq[cmdq_type]))</div><div class='add'>+			return HINIC3_WAIT_PROCESS_WAITING;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return HINIC3_WAIT_PROCESS_CPL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wait_cmdq_stop(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_cmdqs *cmdqs = hwdev-&gt;cmdqs;</div><div class='add'>+	enum hinic3_cmdq_type cmdq_type;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!(cmdqs-&gt;status &amp; HINIC3_CMDQ_ENABLE))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	cmdqs-&gt;status &amp;= ~HINIC3_CMDQ_ENABLE;</div><div class='add'>+	err = hinic3_wait_for_timeout(hwdev, check_cmdq_stop_handler,</div><div class='add'>+				      HINIC3_WAIT_CMDQ_IDLE_TIMEOUT,</div><div class='add'>+				      USEC_PER_MSEC);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_reenable_cmdq;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_reenable_cmdq:</div><div class='add'>+	for (cmdq_type = 0; cmdq_type &lt; cmdqs-&gt;cmdq_num; cmdq_type++) {</div><div class='add'>+		if (!hinic3_cmdq_idle(&amp;cmdqs-&gt;cmdq[cmdq_type]))</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Cmdq %d is busy\n", cmdq_type);</div><div class='add'>+	}</div><div class='add'>+	cmdqs-&gt;status |= HINIC3_CMDQ_ENABLE;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_func_rx_tx_flush(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_clear_resource clear_db = {};</div><div class='add'>+	struct comm_cmd_clear_resource clr_res = {};</div><div class='add'>+	struct hinic3_hwif *hwif = hwdev-&gt;hwif;</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = wait_cmdq_stop(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "CMDQ is still working, CMDQ timeout value is unreasonable\n");</div><div class='add'>+		ret = err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_toggle_doorbell(hwif, DISABLE_DOORBELL);</div><div class='add'>+</div><div class='add'>+	clear_db.func_id = hwif-&gt;attr.func_global_idx;</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;clear_db, sizeof(clear_db));</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_FLUSH_DOORBELL, &amp;msg_params);</div><div class='add'>+	if (err || clear_db.head.status) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "Failed to flush doorbell, err: %d, status: 0x%x\n",</div><div class='add'>+			 err, clear_db.head.status);</div><div class='add'>+		if (err)</div><div class='add'>+			ret = err;</div><div class='add'>+		else</div><div class='add'>+			ret = -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clr_res.func_id = hwif-&gt;attr.func_global_idx;</div><div class='add'>+	msg_params.buf_in = &amp;clr_res;</div><div class='add'>+	msg_params.in_size = sizeof(clr_res);</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt_no_ack(hwdev, MGMT_MOD_COMM,</div><div class='add'>+					      COMM_CMD_START_FLUSH,</div><div class='add'>+					      &amp;msg_params);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "Failed to notice flush message, err: %d\n",</div><div class='add'>+			 err);</div><div class='add'>+		ret = err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_toggle_doorbell(hwif, ENABLE_DOORBELL);</div><div class='add'>+</div><div class='add'>+	err = hinic3_reinit_cmdq_ctxts(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "Failed to reinit cmdq\n");</div><div class='add'>+		ret = err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_hw_rx_buf_size_idx(int rx_buf_sz, u16 *buf_sz_idx)</div><div class='add'>+{</div><div class='add'>+	/* Supported RX buffer sizes in bytes. Configured by array index. */</div><div class='add'>+	static const int supported_sizes[16] = {</div><div class='add'>+		[0] = 32,     [1] = 64,     [2] = 96,     [3] = 128,</div><div class='add'>+		[4] = 192,    [5] = 256,    [6] = 384,    [7] = 512,</div><div class='add'>+		[8] = 768,    [9] = 1024,   [10] = 1536,  [11] = 2048,</div><div class='add'>+		[12] = 3072,  [13] = 4096,  [14] = 8192,  [15] = 16384,</div><div class='add'>+	};</div><div class='add'>+	u16 idx;</div><div class='add'>+</div><div class='add'>+	/* Scan from biggest to smallest. Choose supported size that is equal or</div><div class='add'>+	 * smaller. For smaller value HW will under-utilize posted buffers. For</div><div class='add'>+	 * bigger value HW may overrun posted buffers.</div><div class='add'>+	 */</div><div class='add'>+	idx = ARRAY_SIZE(supported_sizes);</div><div class='add'>+	while (idx &gt; 0) {</div><div class='add'>+		idx--;</div><div class='add'>+		if (supported_sizes[idx] &lt;= rx_buf_sz) {</div><div class='add'>+			*buf_sz_idx = idx;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_root_ctxt(struct hinic3_hwdev *hwdev, u32 rq_depth, u32 sq_depth,</div><div class='add'>+			 int rx_buf_sz)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_set_root_ctxt root_ctxt = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	u16 buf_sz_idx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = get_hw_rx_buf_size_idx(rx_buf_sz, &amp;buf_sz_idx);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	root_ctxt.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+</div><div class='add'>+	root_ctxt.set_cmdq_depth = 0;</div><div class='add'>+	root_ctxt.cmdq_depth = 0;</div><div class='add'>+</div><div class='add'>+	root_ctxt.lro_en = 1;</div><div class='add'>+</div><div class='add'>+	root_ctxt.rq_depth  = ilog2(rq_depth);</div><div class='add'>+	root_ctxt.rx_buf_sz = buf_sz_idx;</div><div class='add'>+	root_ctxt.sq_depth  = ilog2(sq_depth);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;root_ctxt,</div><div class='add'>+				     sizeof(root_ctxt));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_SET_VAT, &amp;msg_params);</div><div class='add'>+	if (err || root_ctxt.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to set root context, err: %d, status: 0x%x\n",</div><div class='add'>+			err, root_ctxt.head.status);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_clean_root_ctxt(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct comm_cmd_set_root_ctxt root_ctxt = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	root_ctxt.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;root_ctxt,</div><div class='add'>+				     sizeof(root_ctxt));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_COMM,</div><div class='add'>+				       COMM_CMD_SET_VAT, &amp;msg_params);</div><div class='add'>+	if (err || root_ctxt.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to set root context, err: %d, status: 0x%x\n",</div><div class='add'>+			err, root_ctxt.head.status);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.h b/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.h<br/>new file mode 100644<br/>index 000000000000..304f5691f0c2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.h</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_HW_COMM_H_</div><div class='add'>+#define _HINIC3_HW_COMM_H_</div><div class='add'>+</div><div class='add'>+#include "hinic3_hw_intf.h"</div><div class='add'>+</div><div class='add'>+struct hinic3_hwdev;</div><div class='add'>+</div><div class='add'>+#define HINIC3_WQ_PAGE_SIZE_ORDER  8</div><div class='add'>+</div><div class='add'>+struct hinic3_interrupt_info {</div><div class='add'>+	u32 lli_set;</div><div class='add'>+	u32 interrupt_coalesc_set;</div><div class='add'>+	u16 msix_index;</div><div class='add'>+	u8  lli_credit_limit;</div><div class='add'>+	u8  lli_timer_cfg;</div><div class='add'>+	u8  pending_limit;</div><div class='add'>+	u8  coalesc_timer_cfg;</div><div class='add'>+	u8  resend_timer_cfg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hinic3_set_interrupt_cfg_direct(struct hinic3_hwdev *hwdev,</div><div class='add'>+				    const struct hinic3_interrupt_info *info);</div><div class='add'>+int hinic3_func_reset(struct hinic3_hwdev *hwdev, u16 func_id, u64 reset_flag);</div><div class='add'>+</div><div class='add'>+int hinic3_get_comm_features(struct hinic3_hwdev *hwdev, u64 *s_feature,</div><div class='add'>+			     u16 size);</div><div class='add'>+int hinic3_set_comm_features(struct hinic3_hwdev *hwdev, u64 *s_feature,</div><div class='add'>+			     u16 size);</div><div class='add'>+int hinic3_get_global_attr(struct hinic3_hwdev *hwdev,</div><div class='add'>+			   struct comm_global_attr *attr);</div><div class='add'>+int hinic3_set_func_svc_used_state(struct hinic3_hwdev *hwdev, u16 svc_type,</div><div class='add'>+				   u8 state);</div><div class='add'>+int hinic3_set_dma_attr_tbl(struct hinic3_hwdev *hwdev, u8 entry_idx, u8 st,</div><div class='add'>+			    u8 at, u8 ph, u8 no_snooping, u8 tph_en);</div><div class='add'>+</div><div class='add'>+int hinic3_set_wq_page_size(struct hinic3_hwdev *hwdev, u16 func_idx,</div><div class='add'>+			    u32 page_size);</div><div class='add'>+int hinic3_set_cmdq_depth(struct hinic3_hwdev *hwdev, u16 cmdq_depth);</div><div class='add'>+int hinic3_func_rx_tx_flush(struct hinic3_hwdev *hwdev);</div><div class='add'>+int hinic3_set_root_ctxt(struct hinic3_hwdev *hwdev, u32 rq_depth, u32 sq_depth,</div><div class='add'>+			 int rx_buf_sz);</div><div class='add'>+int hinic3_clean_root_ctxt(struct hinic3_hwdev *hwdev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_hw_intf.h b/drivers/net/ethernet/huawei/hinic3/hinic3_hw_intf.h<br/>new file mode 100644<br/>index 000000000000..623cf2d14cbc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_hw_intf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_intf.h</a></div><div class='hunk'>@@ -0,0 +1,264 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_HW_INTF_H_</div><div class='add'>+#define _HINIC3_HW_INTF_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#define MGMT_MSG_CMD_OP_SET   1</div><div class='add'>+#define MGMT_MSG_CMD_OP_GET   0</div><div class='add'>+</div><div class='add'>+#define MGMT_STATUS_PF_SET_VF_ALREADY  0x4</div><div class='add'>+#define MGMT_STATUS_EXIST              0x6</div><div class='add'>+#define MGMT_STATUS_CMD_UNSUPPORTED    0xFF</div><div class='add'>+</div><div class='add'>+#define MGMT_MSG_POLLING_TIMEOUT 0</div><div class='add'>+</div><div class='add'>+struct mgmt_msg_head {</div><div class='add'>+	u8 status;</div><div class='add'>+	u8 version;</div><div class='add'>+	u8 rsvd0[6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mgmt_msg_params {</div><div class='add'>+	const void  *buf_in;</div><div class='add'>+	u32         in_size;</div><div class='add'>+	void        *buf_out;</div><div class='add'>+	u32         expected_out_size;</div><div class='add'>+	u32         timeout_ms;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CMDQ MODULE_TYPE */</div><div class='add'>+enum mgmt_mod_type {</div><div class='add'>+	/* HW communication module */</div><div class='add'>+	MGMT_MOD_COMM   = 0,</div><div class='add'>+	/* L2NIC module */</div><div class='add'>+	MGMT_MOD_L2NIC  = 1,</div><div class='add'>+	/* Configuration module */</div><div class='add'>+	MGMT_MOD_CFGM   = 7,</div><div class='add'>+	MGMT_MOD_HILINK = 14,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void mgmt_msg_params_init_default(struct mgmt_msg_params *msg_params,</div><div class='add'>+						void *inout_buf, u32 buf_size)</div><div class='add'>+{</div><div class='add'>+	msg_params-&gt;buf_in = inout_buf;</div><div class='add'>+	msg_params-&gt;buf_out = inout_buf;</div><div class='add'>+	msg_params-&gt;in_size = buf_size;</div><div class='add'>+	msg_params-&gt;expected_out_size = buf_size;</div><div class='add'>+	msg_params-&gt;timeout_ms = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum cfg_cmd {</div><div class='add'>+	CFG_CMD_GET_DEV_CAP = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Device capabilities, defined by hw */</div><div class='add'>+struct cfg_cmd_dev_cap {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u16                  rsvd1;</div><div class='add'>+</div><div class='add'>+	/* Public resources */</div><div class='add'>+	u8                   host_id;</div><div class='add'>+	u8                   ep_id;</div><div class='add'>+	u8                   er_id;</div><div class='add'>+	u8                   port_id;</div><div class='add'>+</div><div class='add'>+	u16                  host_total_func;</div><div class='add'>+	u8                   host_pf_num;</div><div class='add'>+	u8                   pf_id_start;</div><div class='add'>+	u16                  host_vf_num;</div><div class='add'>+	u16                  vf_id_start;</div><div class='add'>+	u8                   host_oq_id_mask_val;</div><div class='add'>+	u8                   timer_en;</div><div class='add'>+	u8                   host_valid_bitmap;</div><div class='add'>+	u8                   rsvd_host;</div><div class='add'>+</div><div class='add'>+	u16                  svc_cap_en;</div><div class='add'>+	u16                  max_vf;</div><div class='add'>+	u8                   flexq_en;</div><div class='add'>+	u8                   valid_cos_bitmap;</div><div class='add'>+	u8                   port_cos_valid_bitmap;</div><div class='add'>+	u8                   rsvd2[45];</div><div class='add'>+</div><div class='add'>+	/* l2nic */</div><div class='add'>+	u16                  nic_max_sq_id;</div><div class='add'>+	u16                  nic_max_rq_id;</div><div class='add'>+	u16                  nic_default_num_queues;</div><div class='add'>+</div><div class='add'>+	u8                   rsvd3[250];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* COMM Commands between Driver to fw */</div><div class='add'>+enum comm_cmd {</div><div class='add'>+	/* Commands for clearing FLR and resources */</div><div class='add'>+	COMM_CMD_FUNC_RESET              = 0,</div><div class='add'>+	COMM_CMD_FEATURE_NEGO            = 1,</div><div class='add'>+	COMM_CMD_FLUSH_DOORBELL          = 2,</div><div class='add'>+	COMM_CMD_START_FLUSH             = 3,</div><div class='add'>+	COMM_CMD_GET_GLOBAL_ATTR         = 5,</div><div class='add'>+	COMM_CMD_SET_FUNC_SVC_USED_STATE = 7,</div><div class='add'>+</div><div class='add'>+	/* Driver Configuration Commands */</div><div class='add'>+	COMM_CMD_SET_CMDQ_CTXT           = 20,</div><div class='add'>+	COMM_CMD_SET_VAT                 = 21,</div><div class='add'>+	COMM_CMD_CFG_PAGESIZE            = 22,</div><div class='add'>+	COMM_CMD_CFG_MSIX_CTRL_REG       = 23,</div><div class='add'>+	COMM_CMD_SET_CEQ_CTRL_REG        = 24,</div><div class='add'>+	COMM_CMD_SET_DMA_ATTR            = 25,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_cmd_cfg_msix_ctrl_reg {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u8                   opcode;</div><div class='add'>+	u8                   rsvd1;</div><div class='add'>+	u16                  msix_index;</div><div class='add'>+	u8                   pending_cnt;</div><div class='add'>+	u8                   coalesce_timer_cnt;</div><div class='add'>+	u8                   resend_timer_cnt;</div><div class='add'>+	u8                   lli_timer_cnt;</div><div class='add'>+	u8                   lli_credit_cnt;</div><div class='add'>+	u8                   rsvd2[5];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum comm_func_reset_bits {</div><div class='add'>+	COMM_FUNC_RESET_BIT_FLUSH        = BIT(0),</div><div class='add'>+	COMM_FUNC_RESET_BIT_MQM          = BIT(1),</div><div class='add'>+	COMM_FUNC_RESET_BIT_SMF          = BIT(2),</div><div class='add'>+	COMM_FUNC_RESET_BIT_PF_BW_CFG    = BIT(3),</div><div class='add'>+</div><div class='add'>+	COMM_FUNC_RESET_BIT_COMM         = BIT(10),</div><div class='add'>+	/* clear mbox and aeq, The COMM_FUNC_RESET_BIT_COMM bit must be set */</div><div class='add'>+	COMM_FUNC_RESET_BIT_COMM_MGMT_CH = BIT(11),</div><div class='add'>+	/* clear cmdq and ceq, The COMM_FUNC_RESET_BIT_COMM bit must be set */</div><div class='add'>+	COMM_FUNC_RESET_BIT_COMM_CMD_CH  = BIT(12),</div><div class='add'>+	COMM_FUNC_RESET_BIT_NIC          = BIT(13),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define COMM_FUNC_RESET_FLAG \</div><div class='add'>+	(COMM_FUNC_RESET_BIT_COMM | COMM_FUNC_RESET_BIT_COMM_CMD_CH | \</div><div class='add'>+	 COMM_FUNC_RESET_BIT_FLUSH | COMM_FUNC_RESET_BIT_MQM | \</div><div class='add'>+	 COMM_FUNC_RESET_BIT_SMF | COMM_FUNC_RESET_BIT_PF_BW_CFG)</div><div class='add'>+</div><div class='add'>+struct comm_cmd_func_reset {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u16                  rsvd1[3];</div><div class='add'>+	u64                  reset_flag;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define COMM_MAX_FEATURE_QWORD  4</div><div class='add'>+struct comm_cmd_feature_nego {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u8                   opcode;</div><div class='add'>+	u8                   rsvd;</div><div class='add'>+	u64                  s_feature[COMM_MAX_FEATURE_QWORD];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_global_attr {</div><div class='add'>+	u8  max_host_num;</div><div class='add'>+	u8  max_pf_num;</div><div class='add'>+	u16 vf_id_start;</div><div class='add'>+	/* for api cmd to mgmt cpu */</div><div class='add'>+	u8  mgmt_host_node_id;</div><div class='add'>+	u8  cmdq_num;</div><div class='add'>+	u8  rsvd1[34];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_cmd_get_glb_attr {</div><div class='add'>+	struct mgmt_msg_head    head;</div><div class='add'>+	struct comm_global_attr attr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum comm_func_svc_type {</div><div class='add'>+	COMM_FUNC_SVC_T_COMM = 0,</div><div class='add'>+	COMM_FUNC_SVC_T_NIC  = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_cmd_set_func_svc_used_state {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u16                  svc_type;</div><div class='add'>+	u8                   used_state;</div><div class='add'>+	u8                   rsvd[35];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_cmd_set_dma_attr {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u8                   entry_idx;</div><div class='add'>+	u8                   st;</div><div class='add'>+	u8                   at;</div><div class='add'>+	u8                   ph;</div><div class='add'>+	u8                   no_snooping;</div><div class='add'>+	u8                   tph_en;</div><div class='add'>+	u32                  resv1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_cmd_set_ceq_ctrl_reg {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u16                  q_id;</div><div class='add'>+	u32                  ctrl0;</div><div class='add'>+	u32                  ctrl1;</div><div class='add'>+	u32                  rsvd1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_cmd_cfg_wq_page_size {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u8                   opcode;</div><div class='add'>+	/* real_size=4KB*2^page_size, range(0~20) must be checked by driver */</div><div class='add'>+	u8                   page_size;</div><div class='add'>+	u32                  rsvd1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_cmd_set_root_ctxt {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u8                   set_cmdq_depth;</div><div class='add'>+	u8                   cmdq_depth;</div><div class='add'>+	u16                  rx_buf_sz;</div><div class='add'>+	u8                   lro_en;</div><div class='add'>+	u8                   rsvd1;</div><div class='add'>+	u16                  sq_depth;</div><div class='add'>+	u16                  rq_depth;</div><div class='add'>+	u64                  rsvd2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_cmdq_ctxt_info {</div><div class='add'>+	__le64 curr_wqe_page_pfn;</div><div class='add'>+	__le64 wq_block_pfn;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_cmd_set_cmdq_ctxt {</div><div class='add'>+	struct mgmt_msg_head       head;</div><div class='add'>+	u16                        func_id;</div><div class='add'>+	u8                         cmdq_id;</div><div class='add'>+	u8                         rsvd1[5];</div><div class='add'>+	struct comm_cmdq_ctxt_info ctxt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct comm_cmd_clear_resource {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u16                  rsvd1[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Services supported by HW. HW uses these values when delivering events.</div><div class='add'>+ * HW supports multiple services that are not yet supported by driver</div><div class='add'>+ * (e.g. RoCE).</div><div class='add'>+ */</div><div class='add'>+enum hinic3_service_type {</div><div class='add'>+	HINIC3_SERVICE_T_NIC = 0,</div><div class='add'>+	/* MAX is only used by SW for array sizes. */</div><div class='add'>+	HINIC3_SERVICE_T_MAX = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c b/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c<br/>new file mode 100644<br/>index 000000000000..95a213133be9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c</a></div><div class='hunk'>@@ -0,0 +1,557 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include "hinic3_cmdq.h"</div><div class='add'>+#include "hinic3_csr.h"</div><div class='add'>+#include "hinic3_eqs.h"</div><div class='add'>+#include "hinic3_hw_comm.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_mbox.h"</div><div class='add'>+#include "hinic3_mgmt.h"</div><div class='add'>+</div><div class='add'>+#define HINIC3_PCIE_SNOOP        0</div><div class='add'>+#define HINIC3_PCIE_TPH_DISABLE  0</div><div class='add'>+</div><div class='add'>+#define HINIC3_DMA_ATTR_INDIR_IDX_MASK          GENMASK(9, 0)</div><div class='add'>+#define HINIC3_DMA_ATTR_INDIR_IDX_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(HINIC3_DMA_ATTR_INDIR_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define HINIC3_DMA_ATTR_ENTRY_ST_MASK           GENMASK(7, 0)</div><div class='add'>+#define HINIC3_DMA_ATTR_ENTRY_AT_MASK           GENMASK(9, 8)</div><div class='add'>+#define HINIC3_DMA_ATTR_ENTRY_PH_MASK           GENMASK(11, 10)</div><div class='add'>+#define HINIC3_DMA_ATTR_ENTRY_NO_SNOOPING_MASK  BIT(12)</div><div class='add'>+#define HINIC3_DMA_ATTR_ENTRY_TPH_EN_MASK       BIT(13)</div><div class='add'>+#define HINIC3_DMA_ATTR_ENTRY_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(HINIC3_DMA_ATTR_ENTRY_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define HINIC3_PCIE_ST_DISABLE       0</div><div class='add'>+#define HINIC3_PCIE_AT_DISABLE       0</div><div class='add'>+#define HINIC3_PCIE_PH_DISABLE       0</div><div class='add'>+#define HINIC3_PCIE_MSIX_ATTR_ENTRY  0</div><div class='add'>+</div><div class='add'>+#define HINIC3_DEFAULT_EQ_MSIX_PENDING_LIMIT      0</div><div class='add'>+#define HINIC3_DEFAULT_EQ_MSIX_COALESC_TIMER_CFG  0xFF</div><div class='add'>+#define HINIC3_DEFAULT_EQ_MSIX_RESEND_TIMER_CFG   7</div><div class='add'>+</div><div class='add'>+#define HINIC3_HWDEV_WQ_NAME    "hinic3_hardware"</div><div class='add'>+#define HINIC3_WQ_MAX_REQ       10</div><div class='add'>+</div><div class='add'>+enum hinic3_hwdev_init_state {</div><div class='add'>+	HINIC3_HWDEV_MBOX_INITED = 2,</div><div class='add'>+	HINIC3_HWDEV_CMDQ_INITED = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hinic3_comm_aeqs_init(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct msix_entry aeq_msix_entries[HINIC3_MAX_AEQS];</div><div class='add'>+	u16 num_aeqs, resp_num_irq, i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	num_aeqs = hwdev-&gt;hwif-&gt;attr.num_aeqs;</div><div class='add'>+	if (num_aeqs &gt; HINIC3_MAX_AEQS) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "Adjust aeq num to %d\n",</div><div class='add'>+			 HINIC3_MAX_AEQS);</div><div class='add'>+		num_aeqs = HINIC3_MAX_AEQS;</div><div class='add'>+	}</div><div class='add'>+	err = hinic3_alloc_irqs(hwdev, num_aeqs, aeq_msix_entries,</div><div class='add'>+				&amp;resp_num_irq);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to alloc aeq irqs, num_aeqs: %u\n",</div><div class='add'>+			num_aeqs);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (resp_num_irq &lt; num_aeqs) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "Adjust aeq num to %u\n",</div><div class='add'>+			 resp_num_irq);</div><div class='add'>+		num_aeqs = resp_num_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_aeqs_init(hwdev, num_aeqs, aeq_msix_entries);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init aeqs\n");</div><div class='add'>+		goto err_free_irqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irqs:</div><div class='add'>+	for (i = 0; i &lt; num_aeqs; i++)</div><div class='add'>+		hinic3_free_irq(hwdev, aeq_msix_entries[i].vector);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_comm_ceqs_init(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct msix_entry ceq_msix_entries[HINIC3_MAX_CEQS];</div><div class='add'>+	u16 num_ceqs, resp_num_irq, i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	num_ceqs = hwdev-&gt;hwif-&gt;attr.num_ceqs;</div><div class='add'>+	if (num_ceqs &gt; HINIC3_MAX_CEQS) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "Adjust ceq num to %d\n",</div><div class='add'>+			 HINIC3_MAX_CEQS);</div><div class='add'>+		num_ceqs = HINIC3_MAX_CEQS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_irqs(hwdev, num_ceqs, ceq_msix_entries,</div><div class='add'>+				&amp;resp_num_irq);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to alloc ceq irqs, num_ceqs: %u\n",</div><div class='add'>+			num_ceqs);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (resp_num_irq &lt; num_ceqs) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "Adjust ceq num to %u\n",</div><div class='add'>+			 resp_num_irq);</div><div class='add'>+		num_ceqs = resp_num_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_ceqs_init(hwdev, num_ceqs, ceq_msix_entries);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to init ceqs, err:%d\n", err);</div><div class='add'>+		goto err_free_irqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irqs:</div><div class='add'>+	for (i = 0; i &lt; num_ceqs; i++)</div><div class='add'>+		hinic3_free_irq(hwdev, ceq_msix_entries[i].vector);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_comm_mbox_init(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_mbox(hwdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	hinic3_aeq_register_cb(hwdev, HINIC3_MBX_FROM_FUNC,</div><div class='add'>+			       hinic3_mbox_func_aeqe_handler);</div><div class='add'>+	hinic3_aeq_register_cb(hwdev, HINIC3_MSG_FROM_FW,</div><div class='add'>+			       hinic3_mgmt_msg_aeqe_handler);</div><div class='add'>+</div><div class='add'>+	set_bit(HINIC3_HWDEV_MBOX_INITED, &amp;hwdev-&gt;func_state);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_comm_mbox_free(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;hwdev-&gt;channel_lock);</div><div class='add'>+	clear_bit(HINIC3_HWDEV_MBOX_INITED, &amp;hwdev-&gt;func_state);</div><div class='add'>+	spin_unlock_bh(&amp;hwdev-&gt;channel_lock);</div><div class='add'>+	hinic3_aeq_unregister_cb(hwdev, HINIC3_MBX_FROM_FUNC);</div><div class='add'>+	hinic3_aeq_unregister_cb(hwdev, HINIC3_MSG_FROM_FW);</div><div class='add'>+	hinic3_free_mbox(hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_aeqs_msix_attr(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_aeqs *aeqs = hwdev-&gt;aeqs;</div><div class='add'>+	struct hinic3_interrupt_info info = {};</div><div class='add'>+	struct hinic3_eq *eq;</div><div class='add'>+	u16 q_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	info.interrupt_coalesc_set = 1;</div><div class='add'>+	info.pending_limit = HINIC3_DEFAULT_EQ_MSIX_PENDING_LIMIT;</div><div class='add'>+	info.coalesc_timer_cfg = HINIC3_DEFAULT_EQ_MSIX_COALESC_TIMER_CFG;</div><div class='add'>+	info.resend_timer_cfg = HINIC3_DEFAULT_EQ_MSIX_RESEND_TIMER_CFG;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; aeqs-&gt;num_aeqs; q_id++) {</div><div class='add'>+		eq = &amp;aeqs-&gt;aeq[q_id];</div><div class='add'>+		info.msix_index = eq-&gt;msix_entry_idx;</div><div class='add'>+		err = hinic3_set_interrupt_cfg_direct(hwdev, &amp;info);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Set msix attr for aeq %d failed\n",</div><div class='add'>+				q_id);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_ceqs_msix_attr(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_ceqs *ceqs = hwdev-&gt;ceqs;</div><div class='add'>+	struct hinic3_interrupt_info info = {};</div><div class='add'>+	struct hinic3_eq *eq;</div><div class='add'>+	u16 q_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	info.interrupt_coalesc_set = 1;</div><div class='add'>+	info.pending_limit = HINIC3_DEFAULT_EQ_MSIX_PENDING_LIMIT;</div><div class='add'>+	info.coalesc_timer_cfg = HINIC3_DEFAULT_EQ_MSIX_COALESC_TIMER_CFG;</div><div class='add'>+	info.resend_timer_cfg = HINIC3_DEFAULT_EQ_MSIX_RESEND_TIMER_CFG;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; ceqs-&gt;num_ceqs; q_id++) {</div><div class='add'>+		eq = &amp;ceqs-&gt;ceq[q_id];</div><div class='add'>+		info.msix_index = eq-&gt;msix_entry_idx;</div><div class='add'>+		err = hinic3_set_interrupt_cfg_direct(hwdev, &amp;info);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Set msix attr for ceq %u failed\n",</div><div class='add'>+				q_id);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_basic_mgmt_channel(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_comm_aeqs_init(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init async event queues\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_comm_mbox_init(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init mailbox\n");</div><div class='add'>+		goto err_free_comm_aeqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = init_aeqs_msix_attr(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init aeqs msix attr\n");</div><div class='add'>+		goto err_free_comm_mbox;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_comm_mbox:</div><div class='add'>+	hinic3_comm_mbox_free(hwdev);</div><div class='add'>+err_free_comm_aeqs:</div><div class='add'>+	hinic3_aeqs_free(hwdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void free_base_mgmt_channel(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	hinic3_comm_mbox_free(hwdev);</div><div class='add'>+	hinic3_aeqs_free(hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dma_attr_table_init(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	u32 addr, val, dst_attr;</div><div class='add'>+</div><div class='add'>+	/* Indirect access, set entry_idx first */</div><div class='add'>+	addr = HINIC3_CSR_DMA_ATTR_INDIR_IDX_ADDR;</div><div class='add'>+	val = hinic3_hwif_read_reg(hwdev-&gt;hwif, addr);</div><div class='add'>+	val &amp;= ~HINIC3_DMA_ATTR_ENTRY_AT_MASK;</div><div class='add'>+	val |= HINIC3_DMA_ATTR_INDIR_IDX_SET(HINIC3_PCIE_MSIX_ATTR_ENTRY, IDX);</div><div class='add'>+	hinic3_hwif_write_reg(hwdev-&gt;hwif, addr, val);</div><div class='add'>+</div><div class='add'>+	addr = HINIC3_CSR_DMA_ATTR_TBL_ADDR;</div><div class='add'>+	val = hinic3_hwif_read_reg(hwdev-&gt;hwif, addr);</div><div class='add'>+</div><div class='add'>+	dst_attr = HINIC3_DMA_ATTR_ENTRY_SET(HINIC3_PCIE_ST_DISABLE, ST) |</div><div class='add'>+		   HINIC3_DMA_ATTR_ENTRY_SET(HINIC3_PCIE_AT_DISABLE, AT) |</div><div class='add'>+		   HINIC3_DMA_ATTR_ENTRY_SET(HINIC3_PCIE_PH_DISABLE, PH) |</div><div class='add'>+		   HINIC3_DMA_ATTR_ENTRY_SET(HINIC3_PCIE_SNOOP, NO_SNOOPING) |</div><div class='add'>+		   HINIC3_DMA_ATTR_ENTRY_SET(HINIC3_PCIE_TPH_DISABLE, TPH_EN);</div><div class='add'>+	if (val == dst_attr)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return hinic3_set_dma_attr_tbl(hwdev,</div><div class='add'>+				       HINIC3_PCIE_MSIX_ATTR_ENTRY,</div><div class='add'>+				       HINIC3_PCIE_ST_DISABLE,</div><div class='add'>+				       HINIC3_PCIE_AT_DISABLE,</div><div class='add'>+				       HINIC3_PCIE_PH_DISABLE,</div><div class='add'>+				       HINIC3_PCIE_SNOOP,</div><div class='add'>+				       HINIC3_PCIE_TPH_DISABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_basic_attributes(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct comm_global_attr glb_attr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_func_reset(hwdev, hinic3_global_func_id(hwdev),</div><div class='add'>+				COMM_FUNC_RESET_FLAG);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_get_comm_features(hwdev, hwdev-&gt;features,</div><div class='add'>+				       COMM_MAX_FEATURE_QWORD);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hwdev-&gt;dev, "Comm hw features: 0x%llx\n", hwdev-&gt;features[0]);</div><div class='add'>+</div><div class='add'>+	err = hinic3_get_global_attr(hwdev, &amp;glb_attr);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_set_func_svc_used_state(hwdev, COMM_FUNC_SVC_T_COMM, 1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = dma_attr_table_init(hwdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	hwdev-&gt;max_cmdq = min(glb_attr.cmdq_num, HINIC3_MAX_CMDQ_TYPES);</div><div class='add'>+	dev_dbg(hwdev-&gt;dev,</div><div class='add'>+		"global attribute: max_host: 0x%x, max_pf: 0x%x, vf_id_start: 0x%x, mgmt node id: 0x%x, cmdq_num: 0x%x\n",</div><div class='add'>+		glb_attr.max_host_num, glb_attr.max_pf_num,</div><div class='add'>+		glb_attr.vf_id_start, glb_attr.mgmt_host_node_id,</div><div class='add'>+		glb_attr.cmdq_num);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_comm_cmdqs_init(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_cmdqs_init(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init cmd queues\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_ceq_register_cb(hwdev, HINIC3_CMDQ, hinic3_cmdq_ceq_handler);</div><div class='add'>+</div><div class='add'>+	err = hinic3_set_cmdq_depth(hwdev, CMDQ_DEPTH);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set cmdq depth\n");</div><div class='add'>+		goto err_free_cmdqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_bit(HINIC3_HWDEV_CMDQ_INITED, &amp;hwdev-&gt;func_state);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_cmdqs:</div><div class='add'>+	hinic3_cmdqs_free(hwdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_comm_cmdqs_free(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;hwdev-&gt;channel_lock);</div><div class='add'>+	clear_bit(HINIC3_HWDEV_CMDQ_INITED, &amp;hwdev-&gt;func_state);</div><div class='add'>+	spin_unlock_bh(&amp;hwdev-&gt;channel_lock);</div><div class='add'>+</div><div class='add'>+	hinic3_ceq_unregister_cb(hwdev, HINIC3_CMDQ);</div><div class='add'>+	hinic3_cmdqs_free(hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_cmdqs_channel(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_comm_ceqs_init(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init completion event queues\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = init_ceqs_msix_attr(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init ceqs msix attr\n");</div><div class='add'>+		goto err_free_ceqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hwdev-&gt;wq_page_size = HINIC3_MIN_PAGE_SIZE &lt;&lt; HINIC3_WQ_PAGE_SIZE_ORDER;</div><div class='add'>+	err = hinic3_set_wq_page_size(hwdev, hinic3_global_func_id(hwdev),</div><div class='add'>+				      hwdev-&gt;wq_page_size);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set wq page size\n");</div><div class='add'>+		goto err_free_ceqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_comm_cmdqs_init(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init cmd queues\n");</div><div class='add'>+		goto err_reset_wq_page_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_reset_wq_page_size:</div><div class='add'>+	hinic3_set_wq_page_size(hwdev, hinic3_global_func_id(hwdev),</div><div class='add'>+				HINIC3_MIN_PAGE_SIZE);</div><div class='add'>+err_free_ceqs:</div><div class='add'>+	hinic3_ceqs_free(hwdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_free_cmdqs_channel(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	hinic3_comm_cmdqs_free(hwdev);</div><div class='add'>+	hinic3_ceqs_free(hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_init_comm_ch(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = init_basic_mgmt_channel(hwdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = init_basic_attributes(hwdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_basic_mgmt_ch;</div><div class='add'>+</div><div class='add'>+	err = init_cmdqs_channel(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init cmdq channel\n");</div><div class='add'>+		goto err_clear_func_svc_used_state;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_clear_func_svc_used_state:</div><div class='add'>+	hinic3_set_func_svc_used_state(hwdev, COMM_FUNC_SVC_T_COMM, 0);</div><div class='add'>+err_free_basic_mgmt_ch:</div><div class='add'>+	free_base_mgmt_channel(hwdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_uninit_comm_ch(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	hinic3_free_cmdqs_channel(hwdev);</div><div class='add'>+	hinic3_set_func_svc_used_state(hwdev, COMM_FUNC_SVC_T_COMM, 0);</div><div class='add'>+	free_base_mgmt_channel(hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEFINE_IDA(hinic3_adev_ida);</div><div class='add'>+</div><div class='add'>+static int hinic3_adev_idx_alloc(void)</div><div class='add'>+{</div><div class='add'>+	return ida_alloc(&amp;hinic3_adev_ida, GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_adev_idx_free(int id)</div><div class='add'>+{</div><div class='add'>+	ida_free(&amp;hinic3_adev_ida, id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_init_hwdev(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter = pci_get_drvdata(pdev);</div><div class='add'>+	struct hinic3_hwdev *hwdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hwdev = kzalloc(sizeof(*hwdev), GFP_KERNEL);</div><div class='add'>+	if (!hwdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pci_adapter-&gt;hwdev = hwdev;</div><div class='add'>+	hwdev-&gt;adapter = pci_adapter;</div><div class='add'>+	hwdev-&gt;pdev = pci_adapter-&gt;pdev;</div><div class='add'>+	hwdev-&gt;dev = &amp;pci_adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	hwdev-&gt;func_state = 0;</div><div class='add'>+	hwdev-&gt;dev_id = hinic3_adev_idx_alloc();</div><div class='add'>+	spin_lock_init(&amp;hwdev-&gt;channel_lock);</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_hwif(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init hwif\n");</div><div class='add'>+		goto err_free_hwdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hwdev-&gt;workq = alloc_workqueue(HINIC3_HWDEV_WQ_NAME, WQ_MEM_RECLAIM,</div><div class='add'>+				       HINIC3_WQ_MAX_REQ);</div><div class='add'>+	if (!hwdev-&gt;workq) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to alloc hardware workq\n");</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_free_hwif;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_cfg_mgmt(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init config mgmt\n");</div><div class='add'>+		goto err_destroy_workqueue;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_comm_ch(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init communication channel\n");</div><div class='add'>+		goto err_free_cfg_mgmt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_capability(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init capability\n");</div><div class='add'>+		goto err_uninit_comm_ch;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_set_comm_features(hwdev, hwdev-&gt;features,</div><div class='add'>+				       COMM_MAX_FEATURE_QWORD);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set comm features\n");</div><div class='add'>+		goto err_uninit_comm_ch;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_uninit_comm_ch:</div><div class='add'>+	hinic3_uninit_comm_ch(hwdev);</div><div class='add'>+err_free_cfg_mgmt:</div><div class='add'>+	hinic3_free_cfg_mgmt(hwdev);</div><div class='add'>+err_destroy_workqueue:</div><div class='add'>+	destroy_workqueue(hwdev-&gt;workq);</div><div class='add'>+err_free_hwif:</div><div class='add'>+	hinic3_free_hwif(hwdev);</div><div class='add'>+err_free_hwdev:</div><div class='add'>+	pci_adapter-&gt;hwdev = NULL;</div><div class='add'>+	hinic3_adev_idx_free(hwdev-&gt;dev_id);</div><div class='add'>+	kfree(hwdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_hwdev(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	u64 drv_features[COMM_MAX_FEATURE_QWORD] = {};</div><div class='add'>+</div><div class='add'>+	hinic3_set_comm_features(hwdev, drv_features, COMM_MAX_FEATURE_QWORD);</div><div class='add'>+	hinic3_func_rx_tx_flush(hwdev);</div><div class='add'>+	hinic3_uninit_comm_ch(hwdev);</div><div class='add'>+	hinic3_free_cfg_mgmt(hwdev);</div><div class='add'>+	destroy_workqueue(hwdev-&gt;workq);</div><div class='add'>+	hinic3_free_hwif(hwdev);</div><div class='add'>+	hinic3_adev_idx_free(hwdev-&gt;dev_id);</div><div class='add'>+	kfree(hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_set_api_stop(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_mbox *mbox;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;hwdev-&gt;channel_lock);</div><div class='add'>+	if (test_bit(HINIC3_HWDEV_MBOX_INITED, &amp;hwdev-&gt;func_state)) {</div><div class='add'>+		mbox = hwdev-&gt;mbox;</div><div class='add'>+		spin_lock(&amp;mbox-&gt;mbox_lock);</div><div class='add'>+		if (mbox-&gt;event_flag == MBOX_EVENT_START)</div><div class='add'>+			mbox-&gt;event_flag = MBOX_EVENT_TIMEOUT;</div><div class='add'>+		spin_unlock(&amp;mbox-&gt;mbox_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (test_bit(HINIC3_HWDEV_CMDQ_INITED, &amp;hwdev-&gt;func_state))</div><div class='add'>+		hinic3_cmdq_flush_sync_cmd(hwdev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;hwdev-&gt;channel_lock);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h b/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h<br/>new file mode 100644<br/>index 000000000000..62e2745e9316<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_HWDEV_H_</div><div class='add'>+#define _HINIC3_HWDEV_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/auxiliary_bus.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hw_intf.h"</div><div class='add'>+</div><div class='add'>+struct hinic3_cmdqs;</div><div class='add'>+struct hinic3_hwif;</div><div class='add'>+</div><div class='add'>+enum hinic3_event_service_type {</div><div class='add'>+	HINIC3_EVENT_SRV_COMM = 0,</div><div class='add'>+	HINIC3_EVENT_SRV_NIC  = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HINIC3_SRV_EVENT_TYPE(svc, type)    (((svc) &lt;&lt; 16) | (type))</div><div class='add'>+</div><div class='add'>+/* driver-specific data of pci_dev */</div><div class='add'>+struct hinic3_pcidev {</div><div class='add'>+	struct pci_dev       *pdev;</div><div class='add'>+	struct hinic3_hwdev  *hwdev;</div><div class='add'>+	/* Auxiliary devices */</div><div class='add'>+	struct hinic3_adev   *hadev[HINIC3_SERVICE_T_MAX];</div><div class='add'>+</div><div class='add'>+	void __iomem         *cfg_reg_base;</div><div class='add'>+	void __iomem         *intr_reg_base;</div><div class='add'>+	void __iomem         *db_base;</div><div class='add'>+	u64                  db_dwqe_len;</div><div class='add'>+	u64                  db_base_phy;</div><div class='add'>+</div><div class='add'>+	/* lock for attach/detach uld */</div><div class='add'>+	struct mutex         pdev_mutex;</div><div class='add'>+	unsigned long        state;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_hwdev {</div><div class='add'>+	struct hinic3_pcidev        *adapter;</div><div class='add'>+	struct pci_dev              *pdev;</div><div class='add'>+	struct device               *dev;</div><div class='add'>+	int                         dev_id;</div><div class='add'>+	struct hinic3_hwif          *hwif;</div><div class='add'>+	struct hinic3_cfg_mgmt_info *cfg_mgmt;</div><div class='add'>+	struct hinic3_aeqs          *aeqs;</div><div class='add'>+	struct hinic3_ceqs          *ceqs;</div><div class='add'>+	struct hinic3_mbox          *mbox;</div><div class='add'>+	struct hinic3_cmdqs         *cmdqs;</div><div class='add'>+	struct workqueue_struct     *workq;</div><div class='add'>+	/* protect channel init and uninit */</div><div class='add'>+	spinlock_t                  channel_lock;</div><div class='add'>+	u64                         features[COMM_MAX_FEATURE_QWORD];</div><div class='add'>+	u32                         wq_page_size;</div><div class='add'>+	u8                          max_cmdq;</div><div class='add'>+	ulong                       func_state;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_event_info {</div><div class='add'>+	/* enum hinic3_event_service_type */</div><div class='add'>+	u16 service;</div><div class='add'>+	u16 type;</div><div class='add'>+	u8  event_data[104];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_adev {</div><div class='add'>+	struct auxiliary_device  adev;</div><div class='add'>+	struct hinic3_hwdev      *hwdev;</div><div class='add'>+	enum hinic3_service_type svc_type;</div><div class='add'>+</div><div class='add'>+	void (*event)(struct auxiliary_device *adev,</div><div class='add'>+		      struct hinic3_event_info *event);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hinic3_init_hwdev(struct pci_dev *pdev);</div><div class='add'>+void hinic3_free_hwdev(struct hinic3_hwdev *hwdev);</div><div class='add'>+</div><div class='add'>+void hinic3_set_api_stop(struct hinic3_hwdev *hwdev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c b/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c<br/>new file mode 100644<br/>index 000000000000..f76f140fb6f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c</a></div><div class='hunk'>@@ -0,0 +1,436 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_common.h"</div><div class='add'>+#include "hinic3_csr.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+</div><div class='add'>+#define HINIC3_HWIF_READY_TIMEOUT          10000</div><div class='add'>+#define HINIC3_DB_AND_OUTBOUND_EN_TIMEOUT  60000</div><div class='add'>+#define HINIC3_PCIE_LINK_DOWN              0xFFFFFFFF</div><div class='add'>+</div><div class='add'>+/* config BAR4/5 4MB, DB &amp; DWQE both 2MB */</div><div class='add'>+#define HINIC3_DB_DWQE_SIZE    0x00400000</div><div class='add'>+</div><div class='add'>+/* db/dwqe page size: 4K */</div><div class='add'>+#define HINIC3_DB_PAGE_SIZE    0x00001000</div><div class='add'>+#define HINIC3_DWQE_OFFSET     0x00000800</div><div class='add'>+#define HINIC3_DB_MAX_AREAS    (HINIC3_DB_DWQE_SIZE / HINIC3_DB_PAGE_SIZE)</div><div class='add'>+</div><div class='add'>+#define HINIC3_MAX_MSIX_ENTRY  2048</div><div class='add'>+</div><div class='add'>+#define HINIC3_AF0_FUNC_GLOBAL_IDX_MASK  GENMASK(11, 0)</div><div class='add'>+#define HINIC3_AF0_P2P_IDX_MASK          GENMASK(16, 12)</div><div class='add'>+#define HINIC3_AF0_PCI_INTF_IDX_MASK     GENMASK(19, 17)</div><div class='add'>+#define HINIC3_AF0_FUNC_TYPE_MASK        BIT(28)</div><div class='add'>+#define HINIC3_AF0_GET(val, member) \</div><div class='add'>+	FIELD_GET(HINIC3_AF0_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define HINIC3_AF1_AEQS_PER_FUNC_MASK     GENMASK(9, 8)</div><div class='add'>+#define HINIC3_AF1_MGMT_INIT_STATUS_MASK  BIT(30)</div><div class='add'>+#define HINIC3_AF1_GET(val, member) \</div><div class='add'>+	FIELD_GET(HINIC3_AF1_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define HINIC3_AF2_CEQS_PER_FUNC_MASK      GENMASK(8, 0)</div><div class='add'>+#define HINIC3_AF2_IRQS_PER_FUNC_MASK      GENMASK(26, 16)</div><div class='add'>+#define HINIC3_AF2_GET(val, member) \</div><div class='add'>+	FIELD_GET(HINIC3_AF2_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define HINIC3_AF4_DOORBELL_CTRL_MASK  BIT(0)</div><div class='add'>+#define HINIC3_AF4_GET(val, member) \</div><div class='add'>+	FIELD_GET(HINIC3_AF4_##member##_MASK, val)</div><div class='add'>+#define HINIC3_AF4_SET(val, member) \</div><div class='add'>+	FIELD_PREP(HINIC3_AF4_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define HINIC3_AF5_OUTBOUND_CTRL_MASK  BIT(0)</div><div class='add'>+#define HINIC3_AF5_GET(val, member) \</div><div class='add'>+	FIELD_GET(HINIC3_AF5_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define HINIC3_AF6_PF_STATUS_MASK     GENMASK(15, 0)</div><div class='add'>+#define HINIC3_AF6_FUNC_MAX_SQ_MASK   GENMASK(31, 23)</div><div class='add'>+#define HINIC3_AF6_MSIX_FLEX_EN_MASK  BIT(22)</div><div class='add'>+#define HINIC3_AF6_GET(val, member) \</div><div class='add'>+	FIELD_GET(HINIC3_AF6_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define HINIC3_GET_REG_ADDR(reg)  ((reg) &amp; (HINIC3_REGS_FLAG_MASK))</div><div class='add'>+</div><div class='add'>+static void __iomem *hinic3_reg_addr(struct hinic3_hwif *hwif, u32 reg)</div><div class='add'>+{</div><div class='add'>+	return hwif-&gt;cfg_regs_base + HINIC3_GET_REG_ADDR(reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hinic3_hwif_read_reg(struct hinic3_hwif *hwif, u32 reg)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = hinic3_reg_addr(hwif, reg);</div><div class='add'>+</div><div class='add'>+	return ioread32be(addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_hwif_write_reg(struct hinic3_hwif *hwif, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = hinic3_reg_addr(hwif, reg);</div><div class='add'>+</div><div class='add'>+	iowrite32be(val, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hinic3_wait_return check_hwif_ready_handler(void *priv_data)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwdev *hwdev = priv_data;</div><div class='add'>+	u32 attr1;</div><div class='add'>+</div><div class='add'>+	attr1 = hinic3_hwif_read_reg(hwdev-&gt;hwif, HINIC3_CSR_FUNC_ATTR1_ADDR);</div><div class='add'>+</div><div class='add'>+	return HINIC3_AF1_GET(attr1, MGMT_INIT_STATUS) ?</div><div class='add'>+	       HINIC3_WAIT_PROCESS_CPL : HINIC3_WAIT_PROCESS_WAITING;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wait_hwif_ready(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	return hinic3_wait_for_timeout(hwdev, check_hwif_ready_handler,</div><div class='add'>+				       HINIC3_HWIF_READY_TIMEOUT,</div><div class='add'>+				       USEC_PER_MSEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set attr struct from HW attr values. */</div><div class='add'>+static void set_hwif_attr(struct hinic3_func_attr *attr, u32 attr0, u32 attr1,</div><div class='add'>+			  u32 attr2, u32 attr3, u32 attr6)</div><div class='add'>+{</div><div class='add'>+	attr-&gt;func_global_idx = HINIC3_AF0_GET(attr0, FUNC_GLOBAL_IDX);</div><div class='add'>+	attr-&gt;port_to_port_idx = HINIC3_AF0_GET(attr0, P2P_IDX);</div><div class='add'>+	attr-&gt;pci_intf_idx = HINIC3_AF0_GET(attr0, PCI_INTF_IDX);</div><div class='add'>+	attr-&gt;func_type = HINIC3_AF0_GET(attr0, FUNC_TYPE);</div><div class='add'>+</div><div class='add'>+	attr-&gt;num_aeqs = BIT(HINIC3_AF1_GET(attr1, AEQS_PER_FUNC));</div><div class='add'>+	attr-&gt;num_ceqs = HINIC3_AF2_GET(attr2, CEQS_PER_FUNC);</div><div class='add'>+	attr-&gt;num_irqs = HINIC3_AF2_GET(attr2, IRQS_PER_FUNC);</div><div class='add'>+	if (attr-&gt;num_irqs &gt; HINIC3_MAX_MSIX_ENTRY)</div><div class='add'>+		attr-&gt;num_irqs = HINIC3_MAX_MSIX_ENTRY;</div><div class='add'>+</div><div class='add'>+	attr-&gt;num_sq = HINIC3_AF6_GET(attr6, FUNC_MAX_SQ);</div><div class='add'>+	attr-&gt;msix_flex_en = HINIC3_AF6_GET(attr6, MSIX_FLEX_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Read attributes from HW and set attribute struct. */</div><div class='add'>+static int init_hwif_attr(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	u32 attr0, attr1, attr2, attr3, attr6;</div><div class='add'>+	struct hinic3_hwif *hwif;</div><div class='add'>+</div><div class='add'>+	hwif = hwdev-&gt;hwif;</div><div class='add'>+	attr0 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_FUNC_ATTR0_ADDR);</div><div class='add'>+	if (attr0 == HINIC3_PCIE_LINK_DOWN)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	attr1 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_FUNC_ATTR1_ADDR);</div><div class='add'>+	if (attr1 == HINIC3_PCIE_LINK_DOWN)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	attr2 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_FUNC_ATTR2_ADDR);</div><div class='add'>+	if (attr2 == HINIC3_PCIE_LINK_DOWN)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	attr3 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_FUNC_ATTR3_ADDR);</div><div class='add'>+	if (attr3 == HINIC3_PCIE_LINK_DOWN)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	attr6 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_FUNC_ATTR6_ADDR);</div><div class='add'>+	if (attr6 == HINIC3_PCIE_LINK_DOWN)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	set_hwif_attr(&amp;hwif-&gt;attr, attr0, attr1, attr2, attr3, attr6);</div><div class='add'>+</div><div class='add'>+	if (!hwif-&gt;attr.num_ceqs) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Ceq num cfg in fw is zero\n");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!hwif-&gt;attr.num_irqs) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Irq num cfg in fw is zero, msix_flex_en %d\n",</div><div class='add'>+			hwif-&gt;attr.msix_flex_en);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hinic3_doorbell_ctrl hinic3_get_doorbell_ctrl_status(struct hinic3_hwif *hwif)</div><div class='add'>+{</div><div class='add'>+	u32 attr4 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_FUNC_ATTR4_ADDR);</div><div class='add'>+</div><div class='add'>+	return HINIC3_AF4_GET(attr4, DOORBELL_CTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hinic3_outbound_ctrl hinic3_get_outbound_ctrl_status(struct hinic3_hwif *hwif)</div><div class='add'>+{</div><div class='add'>+	u32 attr5 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_FUNC_ATTR5_ADDR);</div><div class='add'>+</div><div class='add'>+	return HINIC3_AF5_GET(attr5, OUTBOUND_CTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_toggle_doorbell(struct hinic3_hwif *hwif,</div><div class='add'>+			    enum hinic3_doorbell_ctrl flag)</div><div class='add'>+{</div><div class='add'>+	u32 addr, attr4;</div><div class='add'>+</div><div class='add'>+	addr = HINIC3_CSR_FUNC_ATTR4_ADDR;</div><div class='add'>+	attr4 = hinic3_hwif_read_reg(hwif, addr);</div><div class='add'>+</div><div class='add'>+	attr4 &amp;= ~HINIC3_AF4_DOORBELL_CTRL_MASK;</div><div class='add'>+	attr4 |= HINIC3_AF4_SET(flag, DOORBELL_CTRL);</div><div class='add'>+</div><div class='add'>+	hinic3_hwif_write_reg(hwif, addr, attr4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int db_area_idx_init(struct hinic3_hwif *hwif, u64 db_base_phy,</div><div class='add'>+			    u8 __iomem *db_base, u64 db_dwqe_len)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_db_area *db_area = &amp;hwif-&gt;db_area;</div><div class='add'>+	u32 db_max_areas;</div><div class='add'>+</div><div class='add'>+	hwif-&gt;db_base_phy = db_base_phy;</div><div class='add'>+	hwif-&gt;db_base = db_base;</div><div class='add'>+	hwif-&gt;db_dwqe_len = db_dwqe_len;</div><div class='add'>+</div><div class='add'>+	db_max_areas = db_dwqe_len &gt; HINIC3_DB_DWQE_SIZE ?</div><div class='add'>+		       HINIC3_DB_MAX_AREAS : db_dwqe_len / HINIC3_DB_PAGE_SIZE;</div><div class='add'>+	db_area-&gt;db_bitmap_array = bitmap_zalloc(db_max_areas, GFP_KERNEL);</div><div class='add'>+	if (!db_area-&gt;db_bitmap_array)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	db_area-&gt;db_max_areas = db_max_areas;</div><div class='add'>+	spin_lock_init(&amp;db_area-&gt;idx_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void db_area_idx_free(struct hinic3_db_area *db_area)</div><div class='add'>+{</div><div class='add'>+	bitmap_free(db_area-&gt;db_bitmap_array);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int get_db_idx(struct hinic3_hwif *hwif, u32 *idx)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_db_area *db_area = &amp;hwif-&gt;db_area;</div><div class='add'>+	u32 pg_idx;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;db_area-&gt;idx_lock);</div><div class='add'>+	pg_idx = find_first_zero_bit(db_area-&gt;db_bitmap_array,</div><div class='add'>+				     db_area-&gt;db_max_areas);</div><div class='add'>+	if (pg_idx == db_area-&gt;db_max_areas) {</div><div class='add'>+		spin_unlock(&amp;db_area-&gt;idx_lock);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	set_bit(pg_idx, db_area-&gt;db_bitmap_array);</div><div class='add'>+	spin_unlock(&amp;db_area-&gt;idx_lock);</div><div class='add'>+</div><div class='add'>+	*idx = pg_idx;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void free_db_idx(struct hinic3_hwif *hwif, u32 idx)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_db_area *db_area = &amp;hwif-&gt;db_area;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;db_area-&gt;idx_lock);</div><div class='add'>+	clear_bit(idx, db_area-&gt;db_bitmap_array);</div><div class='add'>+	spin_unlock(&amp;db_area-&gt;idx_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_db_addr(struct hinic3_hwdev *hwdev, const u8 __iomem *db_base)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwif *hwif;</div><div class='add'>+	uintptr_t distance;</div><div class='add'>+	u32 idx;</div><div class='add'>+</div><div class='add'>+	hwif = hwdev-&gt;hwif;</div><div class='add'>+	distance = db_base - hwif-&gt;db_base;</div><div class='add'>+	idx = distance / HINIC3_DB_PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	free_db_idx(hwif, idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_db_addr(struct hinic3_hwdev *hwdev, void __iomem **db_base,</div><div class='add'>+			 void __iomem **dwqe_base)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwif *hwif;</div><div class='add'>+	u8 __iomem *addr;</div><div class='add'>+	u32 idx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hwif = hwdev-&gt;hwif;</div><div class='add'>+</div><div class='add'>+	err = get_db_idx(hwif, &amp;idx);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	addr = hwif-&gt;db_base + idx * HINIC3_DB_PAGE_SIZE;</div><div class='add'>+	*db_base = addr;</div><div class='add'>+</div><div class='add'>+	if (dwqe_base)</div><div class='add'>+		*dwqe_base = addr + HINIC3_DWQE_OFFSET;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_set_msix_state(struct hinic3_hwdev *hwdev, u16 msix_idx,</div><div class='add'>+			   enum hinic3_msix_state flag)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwif *hwif;</div><div class='add'>+	u8 int_msk = 1;</div><div class='add'>+	u32 mask_bits;</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	hwif = hwdev-&gt;hwif;</div><div class='add'>+</div><div class='add'>+	if (flag)</div><div class='add'>+		mask_bits = HINIC3_MSI_CLR_INDIR_SET(int_msk, INT_MSK_SET);</div><div class='add'>+	else</div><div class='add'>+		mask_bits = HINIC3_MSI_CLR_INDIR_SET(int_msk, INT_MSK_CLR);</div><div class='add'>+	mask_bits = mask_bits |</div><div class='add'>+		    HINIC3_MSI_CLR_INDIR_SET(msix_idx, SIMPLE_INDIR_IDX);</div><div class='add'>+</div><div class='add'>+	addr = HINIC3_CSR_FUNC_MSI_CLR_WR_ADDR;</div><div class='add'>+	hinic3_hwif_write_reg(hwif, addr, mask_bits);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void disable_all_msix(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	u16 num_irqs = hwdev-&gt;hwif-&gt;attr.num_irqs;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_irqs; i++)</div><div class='add'>+		hinic3_set_msix_state(hwdev, i, HINIC3_MSIX_DISABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_msix_intr_clear_resend_bit(struct hinic3_hwdev *hwdev, u16 msix_idx,</div><div class='add'>+				       u8 clear_resend_en)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwif *hwif;</div><div class='add'>+	u32 msix_ctrl, addr;</div><div class='add'>+</div><div class='add'>+	hwif = hwdev-&gt;hwif;</div><div class='add'>+</div><div class='add'>+	msix_ctrl = HINIC3_MSI_CLR_INDIR_SET(msix_idx, SIMPLE_INDIR_IDX) |</div><div class='add'>+		    HINIC3_MSI_CLR_INDIR_SET(clear_resend_en, RESEND_TIMER_CLR);</div><div class='add'>+</div><div class='add'>+	addr = HINIC3_CSR_FUNC_MSI_CLR_WR_ADDR;</div><div class='add'>+	hinic3_hwif_write_reg(hwif, addr, msix_ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_set_msix_auto_mask_state(struct hinic3_hwdev *hwdev, u16 msix_idx,</div><div class='add'>+				     enum hinic3_msix_auto_mask flag)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwif *hwif;</div><div class='add'>+	u32 mask_bits;</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	hwif = hwdev-&gt;hwif;</div><div class='add'>+</div><div class='add'>+	if (flag)</div><div class='add'>+		mask_bits = HINIC3_MSI_CLR_INDIR_SET(1, AUTO_MSK_SET);</div><div class='add'>+	else</div><div class='add'>+		mask_bits = HINIC3_MSI_CLR_INDIR_SET(1, AUTO_MSK_CLR);</div><div class='add'>+</div><div class='add'>+	mask_bits = mask_bits |</div><div class='add'>+		    HINIC3_MSI_CLR_INDIR_SET(msix_idx, SIMPLE_INDIR_IDX);</div><div class='add'>+</div><div class='add'>+	addr = HINIC3_CSR_FUNC_MSI_CLR_WR_ADDR;</div><div class='add'>+	hinic3_hwif_write_reg(hwif, addr, mask_bits);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hinic3_wait_return check_db_outbound_enable_handler(void *priv_data)</div><div class='add'>+{</div><div class='add'>+	enum hinic3_outbound_ctrl outbound_ctrl;</div><div class='add'>+	struct hinic3_hwif *hwif = priv_data;</div><div class='add'>+	enum hinic3_doorbell_ctrl db_ctrl;</div><div class='add'>+</div><div class='add'>+	db_ctrl = hinic3_get_doorbell_ctrl_status(hwif);</div><div class='add'>+	outbound_ctrl = hinic3_get_outbound_ctrl_status(hwif);</div><div class='add'>+	if (outbound_ctrl == ENABLE_OUTBOUND &amp;&amp; db_ctrl == ENABLE_DOORBELL)</div><div class='add'>+		return HINIC3_WAIT_PROCESS_CPL;</div><div class='add'>+</div><div class='add'>+	return HINIC3_WAIT_PROCESS_WAITING;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wait_until_doorbell_and_outbound_enabled(struct hinic3_hwif *hwif)</div><div class='add'>+{</div><div class='add'>+	return hinic3_wait_for_timeout(hwif, check_db_outbound_enable_handler,</div><div class='add'>+				       HINIC3_DB_AND_OUTBOUND_EN_TIMEOUT,</div><div class='add'>+				       USEC_PER_MSEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_init_hwif(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter = hwdev-&gt;adapter;</div><div class='add'>+	struct hinic3_hwif *hwif;</div><div class='add'>+	u32 attr1, attr4, attr5;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hwif = kzalloc(sizeof(*hwif), GFP_KERNEL);</div><div class='add'>+	if (!hwif)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hwdev-&gt;hwif = hwif;</div><div class='add'>+	hwif-&gt;cfg_regs_base = (u8 __iomem *)pci_adapter-&gt;cfg_reg_base +</div><div class='add'>+			      HINIC3_VF_CFG_REG_OFFSET;</div><div class='add'>+</div><div class='add'>+	err = db_area_idx_init(hwif, pci_adapter-&gt;db_base_phy,</div><div class='add'>+			       pci_adapter-&gt;db_base,</div><div class='add'>+			       pci_adapter-&gt;db_dwqe_len);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init db area.\n");</div><div class='add'>+		goto err_free_hwif;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = wait_hwif_ready(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		attr1 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_FUNC_ATTR1_ADDR);</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Chip status is not ready, attr1:0x%x\n",</div><div class='add'>+			attr1);</div><div class='add'>+		goto err_free_db_area_idx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = init_hwif_attr(hwdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Init hwif attr failed\n");</div><div class='add'>+		goto err_free_db_area_idx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = wait_until_doorbell_and_outbound_enabled(hwif);</div><div class='add'>+	if (err) {</div><div class='add'>+		attr4 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_FUNC_ATTR4_ADDR);</div><div class='add'>+		attr5 = hinic3_hwif_read_reg(hwif, HINIC3_CSR_FUNC_ATTR5_ADDR);</div><div class='add'>+		dev_err(hwdev-&gt;dev, "HW doorbell/outbound is disabled, attr4 0x%x attr5 0x%x\n",</div><div class='add'>+			attr4, attr5);</div><div class='add'>+		goto err_free_db_area_idx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	disable_all_msix(hwdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_db_area_idx:</div><div class='add'>+	db_area_idx_free(&amp;hwif-&gt;db_area);</div><div class='add'>+err_free_hwif:</div><div class='add'>+	kfree(hwif);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_hwif(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	db_area_idx_free(&amp;hwdev-&gt;hwif-&gt;db_area);</div><div class='add'>+	kfree(hwdev-&gt;hwif);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 hinic3_global_func_id(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	return hwdev-&gt;hwif-&gt;attr.func_global_idx;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.h b/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.h<br/>new file mode 100644<br/>index 000000000000..c02904e861cc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_hwif.h</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_HWIF_H_</div><div class='add'>+#define _HINIC3_HWIF_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/build_bug.h&gt;</div><div class='add'>+#include &lt;linux/spinlock_types.h&gt;</div><div class='add'>+</div><div class='add'>+struct hinic3_hwdev;</div><div class='add'>+</div><div class='add'>+enum hinic3_func_type {</div><div class='add'>+	HINIC3_FUNC_TYPE_VF = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_db_area {</div><div class='add'>+	unsigned long *db_bitmap_array;</div><div class='add'>+	u32           db_max_areas;</div><div class='add'>+	/* protect doorbell area alloc and free */</div><div class='add'>+	spinlock_t    idx_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_func_attr {</div><div class='add'>+	enum hinic3_func_type func_type;</div><div class='add'>+	u16                   func_global_idx;</div><div class='add'>+	u16                   global_vf_id_of_pf;</div><div class='add'>+	u16                   num_irqs;</div><div class='add'>+	u16                   num_sq;</div><div class='add'>+	u8                    port_to_port_idx;</div><div class='add'>+	u8                    pci_intf_idx;</div><div class='add'>+	u8                    ppf_idx;</div><div class='add'>+	u8                    num_aeqs;</div><div class='add'>+	u8                    num_ceqs;</div><div class='add'>+	u8                    msix_flex_en;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(sizeof(struct hinic3_func_attr) == 20);</div><div class='add'>+</div><div class='add'>+struct hinic3_hwif {</div><div class='add'>+	u8 __iomem              *cfg_regs_base;</div><div class='add'>+	u64                     db_base_phy;</div><div class='add'>+	u64                     db_dwqe_len;</div><div class='add'>+	u8 __iomem              *db_base;</div><div class='add'>+	struct hinic3_db_area   db_area;</div><div class='add'>+	struct hinic3_func_attr attr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_outbound_ctrl {</div><div class='add'>+	ENABLE_OUTBOUND  = 0x0,</div><div class='add'>+	DISABLE_OUTBOUND = 0x1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_doorbell_ctrl {</div><div class='add'>+	ENABLE_DOORBELL  = 0,</div><div class='add'>+	DISABLE_DOORBELL = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_msix_state {</div><div class='add'>+	HINIC3_MSIX_ENABLE,</div><div class='add'>+	HINIC3_MSIX_DISABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_msix_auto_mask {</div><div class='add'>+	HINIC3_CLR_MSIX_AUTO_MASK,</div><div class='add'>+	HINIC3_SET_MSIX_AUTO_MASK,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u32 hinic3_hwif_read_reg(struct hinic3_hwif *hwif, u32 reg);</div><div class='add'>+void hinic3_hwif_write_reg(struct hinic3_hwif *hwif, u32 reg, u32 val);</div><div class='add'>+</div><div class='add'>+void hinic3_toggle_doorbell(struct hinic3_hwif *hwif,</div><div class='add'>+			    enum hinic3_doorbell_ctrl flag);</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_db_addr(struct hinic3_hwdev *hwdev, void __iomem **db_base,</div><div class='add'>+			 void __iomem **dwqe_base);</div><div class='add'>+void hinic3_free_db_addr(struct hinic3_hwdev *hwdev, const u8 __iomem *db_base);</div><div class='add'>+</div><div class='add'>+int hinic3_init_hwif(struct hinic3_hwdev *hwdev);</div><div class='add'>+void hinic3_free_hwif(struct hinic3_hwdev *hwdev);</div><div class='add'>+</div><div class='add'>+void hinic3_set_msix_state(struct hinic3_hwdev *hwdev, u16 msix_idx,</div><div class='add'>+			   enum hinic3_msix_state flag);</div><div class='add'>+void hinic3_msix_intr_clear_resend_bit(struct hinic3_hwdev *hwdev, u16 msix_idx,</div><div class='add'>+				       u8 clear_resend_en);</div><div class='add'>+void hinic3_set_msix_auto_mask_state(struct hinic3_hwdev *hwdev, u16 msix_idx,</div><div class='add'>+				     enum hinic3_msix_auto_mask flag);</div><div class='add'>+</div><div class='add'>+u16 hinic3_global_func_id(struct hinic3_hwdev *hwdev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_irq.c b/drivers/net/ethernet/huawei/hinic3/hinic3_irq.c<br/>new file mode 100644<br/>index 000000000000..a69b361225e9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_irq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_irq.c</a></div><div class='hunk'>@@ -0,0 +1,194 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hw_comm.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_nic_dev.h"</div><div class='add'>+#include "hinic3_rx.h"</div><div class='add'>+#include "hinic3_tx.h"</div><div class='add'>+</div><div class='add'>+static int hinic3_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_irq_cfg *irq_cfg =</div><div class='add'>+		container_of(napi, struct hinic3_irq_cfg, napi);</div><div class='add'>+	struct hinic3_nic_dev *nic_dev;</div><div class='add'>+	bool busy = false;</div><div class='add'>+	int work_done;</div><div class='add'>+</div><div class='add'>+	nic_dev = netdev_priv(irq_cfg-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	busy |= hinic3_tx_poll(irq_cfg-&gt;txq, budget);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!budget))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	work_done = hinic3_rx_poll(irq_cfg-&gt;rxq, budget);</div><div class='add'>+	busy |= work_done &gt;= budget;</div><div class='add'>+</div><div class='add'>+	if (busy)</div><div class='add'>+		return budget;</div><div class='add'>+</div><div class='add'>+	if (likely(napi_complete_done(napi, work_done)))</div><div class='add'>+		hinic3_set_msix_state(nic_dev-&gt;hwdev, irq_cfg-&gt;msix_entry_idx,</div><div class='add'>+				      HINIC3_MSIX_ENABLE);</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qp_add_napi(struct hinic3_irq_cfg *irq_cfg)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(irq_cfg-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	netif_napi_add(nic_dev-&gt;netdev, &amp;irq_cfg-&gt;napi, hinic3_poll);</div><div class='add'>+	netif_queue_set_napi(irq_cfg-&gt;netdev, irq_cfg-&gt;irq_id,</div><div class='add'>+			     NETDEV_QUEUE_TYPE_RX, &amp;irq_cfg-&gt;napi);</div><div class='add'>+	netif_queue_set_napi(irq_cfg-&gt;netdev, irq_cfg-&gt;irq_id,</div><div class='add'>+			     NETDEV_QUEUE_TYPE_TX, &amp;irq_cfg-&gt;napi);</div><div class='add'>+	napi_enable(&amp;irq_cfg-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qp_del_napi(struct hinic3_irq_cfg *irq_cfg)</div><div class='add'>+{</div><div class='add'>+	napi_disable(&amp;irq_cfg-&gt;napi);</div><div class='add'>+	netif_queue_set_napi(irq_cfg-&gt;netdev, irq_cfg-&gt;irq_id,</div><div class='add'>+			     NETDEV_QUEUE_TYPE_RX, NULL);</div><div class='add'>+	netif_queue_set_napi(irq_cfg-&gt;netdev, irq_cfg-&gt;irq_id,</div><div class='add'>+			     NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='add'>+	netif_stop_subqueue(irq_cfg-&gt;netdev, irq_cfg-&gt;irq_id);</div><div class='add'>+	netif_napi_del(&amp;irq_cfg-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t qp_irq(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_irq_cfg *irq_cfg = data;</div><div class='add'>+	struct hinic3_nic_dev *nic_dev;</div><div class='add'>+</div><div class='add'>+	nic_dev = netdev_priv(irq_cfg-&gt;netdev);</div><div class='add'>+	hinic3_msix_intr_clear_resend_bit(nic_dev-&gt;hwdev,</div><div class='add'>+					  irq_cfg-&gt;msix_entry_idx, 1);</div><div class='add'>+</div><div class='add'>+	napi_schedule(&amp;irq_cfg-&gt;napi);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_request_irq(struct hinic3_irq_cfg *irq_cfg, u16 q_id)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_interrupt_info info = {};</div><div class='add'>+	struct hinic3_nic_dev *nic_dev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	netdev = irq_cfg-&gt;netdev;</div><div class='add'>+	nic_dev = netdev_priv(netdev);</div><div class='add'>+	qp_add_napi(irq_cfg);</div><div class='add'>+</div><div class='add'>+	info.msix_index = irq_cfg-&gt;msix_entry_idx;</div><div class='add'>+	info.interrupt_coalesc_set = 1;</div><div class='add'>+	info.pending_limit = nic_dev-&gt;intr_coalesce[q_id].pending_limit;</div><div class='add'>+	info.coalesc_timer_cfg =</div><div class='add'>+		nic_dev-&gt;intr_coalesce[q_id].coalesce_timer_cfg;</div><div class='add'>+	info.resend_timer_cfg = nic_dev-&gt;intr_coalesce[q_id].resend_timer_cfg;</div><div class='add'>+	err = hinic3_set_interrupt_cfg_direct(nic_dev-&gt;hwdev, &amp;info);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to set RX interrupt coalescing attribute.\n");</div><div class='add'>+		qp_del_napi(irq_cfg);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = request_irq(irq_cfg-&gt;irq_id, qp_irq, 0, irq_cfg-&gt;irq_name,</div><div class='add'>+			  irq_cfg);</div><div class='add'>+	if (err) {</div><div class='add'>+		qp_del_napi(irq_cfg);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_set_affinity_hint(irq_cfg-&gt;irq_id, &amp;irq_cfg-&gt;affinity_mask);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_release_irq(struct hinic3_irq_cfg *irq_cfg)</div><div class='add'>+{</div><div class='add'>+	irq_set_affinity_hint(irq_cfg-&gt;irq_id, NULL);</div><div class='add'>+	free_irq(irq_cfg-&gt;irq_id, irq_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_qps_irq_init(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct pci_dev *pdev = nic_dev-&gt;pdev;</div><div class='add'>+	struct hinic3_irq_cfg *irq_cfg;</div><div class='add'>+	struct msix_entry *msix_entry;</div><div class='add'>+	u32 local_cpu;</div><div class='add'>+	u16 q_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; nic_dev-&gt;q_params.num_qps; q_id++) {</div><div class='add'>+		msix_entry = &amp;nic_dev-&gt;qps_msix_entries[q_id];</div><div class='add'>+		irq_cfg = &amp;nic_dev-&gt;q_params.irq_cfg[q_id];</div><div class='add'>+</div><div class='add'>+		irq_cfg-&gt;irq_id = msix_entry-&gt;vector;</div><div class='add'>+		irq_cfg-&gt;msix_entry_idx = msix_entry-&gt;entry;</div><div class='add'>+		irq_cfg-&gt;netdev = netdev;</div><div class='add'>+		irq_cfg-&gt;txq = &amp;nic_dev-&gt;txqs[q_id];</div><div class='add'>+		irq_cfg-&gt;rxq = &amp;nic_dev-&gt;rxqs[q_id];</div><div class='add'>+		nic_dev-&gt;rxqs[q_id].irq_cfg = irq_cfg;</div><div class='add'>+</div><div class='add'>+		local_cpu = cpumask_local_spread(q_id, dev_to_node(&amp;pdev-&gt;dev));</div><div class='add'>+		cpumask_set_cpu(local_cpu, &amp;irq_cfg-&gt;affinity_mask);</div><div class='add'>+</div><div class='add'>+		snprintf(irq_cfg-&gt;irq_name, sizeof(irq_cfg-&gt;irq_name),</div><div class='add'>+			 "%s_qp%u", netdev-&gt;name, q_id);</div><div class='add'>+</div><div class='add'>+		err = hinic3_request_irq(irq_cfg, q_id);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(netdev, "Failed to request Rx irq\n");</div><div class='add'>+			goto err_release_irqs;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hinic3_set_msix_auto_mask_state(nic_dev-&gt;hwdev,</div><div class='add'>+						irq_cfg-&gt;msix_entry_idx,</div><div class='add'>+						HINIC3_SET_MSIX_AUTO_MASK);</div><div class='add'>+		hinic3_set_msix_state(nic_dev-&gt;hwdev, irq_cfg-&gt;msix_entry_idx,</div><div class='add'>+				      HINIC3_MSIX_ENABLE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_release_irqs:</div><div class='add'>+	while (q_id &gt; 0) {</div><div class='add'>+		q_id--;</div><div class='add'>+		irq_cfg = &amp;nic_dev-&gt;q_params.irq_cfg[q_id];</div><div class='add'>+		qp_del_napi(irq_cfg);</div><div class='add'>+		hinic3_set_msix_state(nic_dev-&gt;hwdev, irq_cfg-&gt;msix_entry_idx,</div><div class='add'>+				      HINIC3_MSIX_DISABLE);</div><div class='add'>+		hinic3_set_msix_auto_mask_state(nic_dev-&gt;hwdev,</div><div class='add'>+						irq_cfg-&gt;msix_entry_idx,</div><div class='add'>+						HINIC3_CLR_MSIX_AUTO_MASK);</div><div class='add'>+		hinic3_release_irq(irq_cfg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_qps_irq_uninit(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_irq_cfg *irq_cfg;</div><div class='add'>+	u16 q_id;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; nic_dev-&gt;q_params.num_qps; q_id++) {</div><div class='add'>+		irq_cfg = &amp;nic_dev-&gt;q_params.irq_cfg[q_id];</div><div class='add'>+		qp_del_napi(irq_cfg);</div><div class='add'>+		hinic3_set_msix_state(nic_dev-&gt;hwdev, irq_cfg-&gt;msix_entry_idx,</div><div class='add'>+				      HINIC3_MSIX_DISABLE);</div><div class='add'>+		hinic3_set_msix_auto_mask_state(nic_dev-&gt;hwdev,</div><div class='add'>+						irq_cfg-&gt;msix_entry_idx,</div><div class='add'>+						HINIC3_CLR_MSIX_AUTO_MASK);</div><div class='add'>+		hinic3_release_irq(irq_cfg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_lld.c b/drivers/net/ethernet/huawei/hinic3/hinic3_lld.c<br/>new file mode 100644<br/>index 000000000000..3db8241a3b0c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_lld.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_lld.c</a></div><div class='hunk'>@@ -0,0 +1,421 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hw_cfg.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_lld.h"</div><div class='add'>+#include "hinic3_mgmt.h"</div><div class='add'>+#include "hinic3_pci_id_tbl.h"</div><div class='add'>+</div><div class='add'>+#define HINIC3_VF_PCI_CFG_REG_BAR  0</div><div class='add'>+#define HINIC3_PCI_INTR_REG_BAR    2</div><div class='add'>+#define HINIC3_PCI_DB_BAR          4</div><div class='add'>+</div><div class='add'>+#define HINIC3_EVENT_POLL_SLEEP_US   1000</div><div class='add'>+#define HINIC3_EVENT_POLL_TIMEOUT_US 10000000</div><div class='add'>+</div><div class='add'>+static struct hinic3_adev_device {</div><div class='add'>+	const char *name;</div><div class='add'>+} hinic3_adev_devices[HINIC3_SERVICE_T_MAX] = {</div><div class='add'>+	[HINIC3_SERVICE_T_NIC] = {</div><div class='add'>+		.name = "nic",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool hinic3_adev_svc_supported(struct hinic3_hwdev *hwdev,</div><div class='add'>+				      enum hinic3_service_type svc_type)</div><div class='add'>+{</div><div class='add'>+	switch (svc_type) {</div><div class='add'>+	case HINIC3_SERVICE_T_NIC:</div><div class='add'>+		return hinic3_support_nic(hwdev);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_comm_adev_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_adev *hadev = container_of(dev, struct hinic3_adev,</div><div class='add'>+						 adev.dev);</div><div class='add'>+</div><div class='add'>+	kfree(hadev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct hinic3_adev *hinic3_add_one_adev(struct hinic3_hwdev *hwdev,</div><div class='add'>+					       enum hinic3_service_type svc_type)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_adev *hadev;</div><div class='add'>+	const char *svc_name;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	hadev = kzalloc(sizeof(*hadev), GFP_KERNEL);</div><div class='add'>+	if (!hadev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	svc_name = hinic3_adev_devices[svc_type].name;</div><div class='add'>+	hadev-&gt;adev.name = svc_name;</div><div class='add'>+	hadev-&gt;adev.id = hwdev-&gt;dev_id;</div><div class='add'>+	hadev-&gt;adev.dev.parent = hwdev-&gt;dev;</div><div class='add'>+	hadev-&gt;adev.dev.release = hinic3_comm_adev_release;</div><div class='add'>+	hadev-&gt;svc_type = svc_type;</div><div class='add'>+	hadev-&gt;hwdev = hwdev;</div><div class='add'>+</div><div class='add'>+	ret = auxiliary_device_init(&amp;hadev-&gt;adev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "failed init adev %s %u\n",</div><div class='add'>+			svc_name, hwdev-&gt;dev_id);</div><div class='add'>+		kfree(hadev);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = auxiliary_device_add(&amp;hadev-&gt;adev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "failed to add adev %s %u\n",</div><div class='add'>+			svc_name, hwdev-&gt;dev_id);</div><div class='add'>+		auxiliary_device_uninit(&amp;hadev-&gt;adev);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return hadev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_del_one_adev(struct hinic3_hwdev *hwdev,</div><div class='add'>+				enum hinic3_service_type svc_type)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter = hwdev-&gt;adapter;</div><div class='add'>+	struct hinic3_adev *hadev;</div><div class='add'>+	int timeout;</div><div class='add'>+	bool state;</div><div class='add'>+</div><div class='add'>+	timeout = read_poll_timeout(test_and_set_bit, state, !state,</div><div class='add'>+				    HINIC3_EVENT_POLL_SLEEP_US,</div><div class='add'>+				    HINIC3_EVENT_POLL_TIMEOUT_US,</div><div class='add'>+				    false, svc_type, &amp;pci_adapter-&gt;state);</div><div class='add'>+</div><div class='add'>+	hadev = pci_adapter-&gt;hadev[svc_type];</div><div class='add'>+	auxiliary_device_delete(&amp;hadev-&gt;adev);</div><div class='add'>+	auxiliary_device_uninit(&amp;hadev-&gt;adev);</div><div class='add'>+	pci_adapter-&gt;hadev[svc_type] = NULL;</div><div class='add'>+	if (!timeout)</div><div class='add'>+		clear_bit(svc_type, &amp;pci_adapter-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_attach_aux_devices(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter = hwdev-&gt;adapter;</div><div class='add'>+	enum hinic3_service_type svc_type;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pci_adapter-&gt;pdev_mutex);</div><div class='add'>+</div><div class='add'>+	for (svc_type = 0; svc_type &lt; HINIC3_SERVICE_T_MAX; svc_type++) {</div><div class='add'>+		if (!hinic3_adev_svc_supported(hwdev, svc_type))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pci_adapter-&gt;hadev[svc_type] = hinic3_add_one_adev(hwdev,</div><div class='add'>+								   svc_type);</div><div class='add'>+		if (!pci_adapter-&gt;hadev[svc_type])</div><div class='add'>+			goto err_del_adevs;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;pci_adapter-&gt;pdev_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_del_adevs:</div><div class='add'>+	while (svc_type &gt; 0) {</div><div class='add'>+		svc_type--;</div><div class='add'>+		if (pci_adapter-&gt;hadev[svc_type]) {</div><div class='add'>+			hinic3_del_one_adev(hwdev, svc_type);</div><div class='add'>+			pci_adapter-&gt;hadev[svc_type] = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;pci_adapter-&gt;pdev_mutex);</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_detach_aux_devices(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter = hwdev-&gt;adapter;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pci_adapter-&gt;pdev_mutex);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hinic3_adev_devices); i++) {</div><div class='add'>+		if (pci_adapter-&gt;hadev[i])</div><div class='add'>+			hinic3_del_one_adev(hwdev, i);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;pci_adapter-&gt;pdev_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct hinic3_hwdev *hinic3_adev_get_hwdev(struct auxiliary_device *adev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_adev *hadev;</div><div class='add'>+</div><div class='add'>+	hadev = container_of(adev, struct hinic3_adev, adev);</div><div class='add'>+</div><div class='add'>+	return hadev-&gt;hwdev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_adev_event_register(struct auxiliary_device *adev,</div><div class='add'>+				void (*event_handler)(struct auxiliary_device *adev,</div><div class='add'>+						      struct hinic3_event_info *event))</div><div class='add'>+{</div><div class='add'>+	struct hinic3_adev *hadev;</div><div class='add'>+</div><div class='add'>+	hadev = container_of(adev, struct hinic3_adev, adev);</div><div class='add'>+	hadev-&gt;event = event_handler;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_adev_event_unregister(struct auxiliary_device *adev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_adev *hadev;</div><div class='add'>+</div><div class='add'>+	hadev = container_of(adev, struct hinic3_adev, adev);</div><div class='add'>+	hadev-&gt;event = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_mapping_bar(struct pci_dev *pdev,</div><div class='add'>+			      struct hinic3_pcidev *pci_adapter)</div><div class='add'>+{</div><div class='add'>+	pci_adapter-&gt;cfg_reg_base = pci_ioremap_bar(pdev,</div><div class='add'>+						    HINIC3_VF_PCI_CFG_REG_BAR);</div><div class='add'>+	if (!pci_adapter-&gt;cfg_reg_base) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to map configuration regs\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_adapter-&gt;intr_reg_base = pci_ioremap_bar(pdev,</div><div class='add'>+						     HINIC3_PCI_INTR_REG_BAR);</div><div class='add'>+	if (!pci_adapter-&gt;intr_reg_base) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to map interrupt regs\n");</div><div class='add'>+		goto err_unmap_cfg_reg_base;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_adapter-&gt;db_base_phy = pci_resource_start(pdev, HINIC3_PCI_DB_BAR);</div><div class='add'>+	pci_adapter-&gt;db_dwqe_len = pci_resource_len(pdev, HINIC3_PCI_DB_BAR);</div><div class='add'>+	pci_adapter-&gt;db_base = pci_ioremap_bar(pdev, HINIC3_PCI_DB_BAR);</div><div class='add'>+	if (!pci_adapter-&gt;db_base) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to map doorbell regs\n");</div><div class='add'>+		goto err_unmap_intr_reg_base;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unmap_intr_reg_base:</div><div class='add'>+	iounmap(pci_adapter-&gt;intr_reg_base);</div><div class='add'>+</div><div class='add'>+err_unmap_cfg_reg_base:</div><div class='add'>+	iounmap(pci_adapter-&gt;cfg_reg_base);</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_unmapping_bar(struct hinic3_pcidev *pci_adapter)</div><div class='add'>+{</div><div class='add'>+	iounmap(pci_adapter-&gt;db_base);</div><div class='add'>+	iounmap(pci_adapter-&gt;intr_reg_base);</div><div class='add'>+	iounmap(pci_adapter-&gt;cfg_reg_base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_pci_init(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pci_adapter = kzalloc(sizeof(*pci_adapter), GFP_KERNEL);</div><div class='add'>+	if (!pci_adapter)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pci_adapter-&gt;pdev = pdev;</div><div class='add'>+	mutex_init(&amp;pci_adapter-&gt;pdev_mutex);</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, pci_adapter);</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device(pdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to enable PCI device\n");</div><div class='add'>+		goto err_free_pci_adapter;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pci_request_regions(pdev, HINIC3_NIC_DRV_NAME);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to request regions\n");</div><div class='add'>+		goto err_disable_device;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to set DMA mask\n");</div><div class='add'>+		goto err_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_release_regions:</div><div class='add'>+	pci_clear_master(pdev);</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+</div><div class='add'>+err_disable_device:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+err_free_pci_adapter:</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+	mutex_destroy(&amp;pci_adapter-&gt;pdev_mutex);</div><div class='add'>+	kfree(pci_adapter);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_pci_uninit(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	pci_clear_master(pdev);</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+	mutex_destroy(&amp;pci_adapter-&gt;pdev_mutex);</div><div class='add'>+	kfree(pci_adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_func_init(struct pci_dev *pdev,</div><div class='add'>+			    struct hinic3_pcidev *pci_adapter)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_hwdev(pdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to initialize hardware device\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_attach_aux_devices(pci_adapter-&gt;hwdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_hwdev;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_hwdev:</div><div class='add'>+	hinic3_free_hwdev(pci_adapter-&gt;hwdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_func_uninit(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	hinic3_flush_mgmt_workq(pci_adapter-&gt;hwdev);</div><div class='add'>+	hinic3_detach_aux_devices(pci_adapter-&gt;hwdev);</div><div class='add'>+	hinic3_free_hwdev(pci_adapter-&gt;hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_probe_func(struct hinic3_pcidev *pci_adapter)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = pci_adapter-&gt;pdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_mapping_bar(pdev, pci_adapter);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to map bar\n");</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_func_init(pdev, pci_adapter);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_unmap_bar;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unmap_bar:</div><div class='add'>+	hinic3_unmapping_bar(pci_adapter);</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	dev_err(&amp;pdev-&gt;dev, "PCIe device probe function failed\n");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_remove_func(struct hinic3_pcidev *pci_adapter)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = pci_adapter-&gt;pdev;</div><div class='add'>+</div><div class='add'>+	hinic3_func_uninit(pdev);</div><div class='add'>+	hinic3_unmapping_bar(pci_adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_pci_init(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	pci_adapter = pci_get_drvdata(pdev);</div><div class='add'>+	err = hinic3_probe_func(pci_adapter);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_uninit_pci;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_uninit_pci:</div><div class='add'>+	hinic3_pci_uninit(pdev);</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	dev_err(&amp;pdev-&gt;dev, "PCIe device probe failed\n");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	hinic3_remove_func(pci_adapter);</div><div class='add'>+	hinic3_pci_uninit(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id hinic3_pci_table[] = {</div><div class='add'>+	{PCI_VDEVICE(HUAWEI, PCI_DEV_ID_HINIC3_VF), 0},</div><div class='add'>+	{0, 0}</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, hinic3_pci_table);</div><div class='add'>+</div><div class='add'>+static void hinic3_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_pcidev *pci_adapter = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	if (pci_adapter)</div><div class='add'>+		hinic3_set_api_stop(pci_adapter-&gt;hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_driver hinic3_driver = {</div><div class='add'>+	.name            = HINIC3_NIC_DRV_NAME,</div><div class='add'>+	.id_table        = hinic3_pci_table,</div><div class='add'>+	.probe           = hinic3_probe,</div><div class='add'>+	.remove          = hinic3_remove,</div><div class='add'>+	.shutdown        = hinic3_shutdown,</div><div class='add'>+	.sriov_configure = pci_sriov_configure_simple</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hinic3_lld_init(void)</div><div class='add'>+{</div><div class='add'>+	return pci_register_driver(&amp;hinic3_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_lld_exit(void)</div><div class='add'>+{</div><div class='add'>+	pci_unregister_driver(&amp;hinic3_driver);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_lld.h b/drivers/net/ethernet/huawei/hinic3/hinic3_lld.h<br/>new file mode 100644<br/>index 000000000000..322b44803476<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_lld.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_lld.h</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_LLD_H_</div><div class='add'>+#define _HINIC3_LLD_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/auxiliary_bus.h&gt;</div><div class='add'>+</div><div class='add'>+struct hinic3_event_info;</div><div class='add'>+</div><div class='add'>+#define HINIC3_NIC_DRV_NAME "hinic3"</div><div class='add'>+</div><div class='add'>+int hinic3_lld_init(void);</div><div class='add'>+void hinic3_lld_exit(void);</div><div class='add'>+void hinic3_adev_event_register(struct auxiliary_device *adev,</div><div class='add'>+				void (*event_handler)(struct auxiliary_device *adev,</div><div class='add'>+						      struct hinic3_event_info *event));</div><div class='add'>+void hinic3_adev_event_unregister(struct auxiliary_device *adev);</div><div class='add'>+struct hinic3_hwdev *hinic3_adev_get_hwdev(struct auxiliary_device *adev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_main.c b/drivers/net/ethernet/huawei/hinic3/hinic3_main.c<br/>new file mode 100644<br/>index 000000000000..6d87d4d895ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_main.c</a></div><div class='hunk'>@@ -0,0 +1,409 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_common.h"</div><div class='add'>+#include "hinic3_hw_comm.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_lld.h"</div><div class='add'>+#include "hinic3_nic_cfg.h"</div><div class='add'>+#include "hinic3_nic_dev.h"</div><div class='add'>+#include "hinic3_nic_io.h"</div><div class='add'>+#include "hinic3_rss.h"</div><div class='add'>+#include "hinic3_rx.h"</div><div class='add'>+#include "hinic3_tx.h"</div><div class='add'>+</div><div class='add'>+#define HINIC3_NIC_DRV_DESC  "Intelligent Network Interface Card Driver"</div><div class='add'>+</div><div class='add'>+#define HINIC3_RX_BUF_LEN          2048</div><div class='add'>+#define HINIC3_LRO_REPLENISH_THLD  256</div><div class='add'>+#define HINIC3_NIC_DEV_WQ_NAME     "hinic3_nic_dev_wq"</div><div class='add'>+</div><div class='add'>+#define HINIC3_SQ_DEPTH            1024</div><div class='add'>+#define HINIC3_RQ_DEPTH            1024</div><div class='add'>+</div><div class='add'>+#define HINIC3_DEFAULT_TXRX_MSIX_PENDING_LIMIT      2</div><div class='add'>+#define HINIC3_DEFAULT_TXRX_MSIX_COALESC_TIMER_CFG  25</div><div class='add'>+#define HINIC3_DEFAULT_TXRX_MSIX_RESEND_TIMER_CFG   7</div><div class='add'>+</div><div class='add'>+static void init_intr_coal_param(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_intr_coal_info *info;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nic_dev-&gt;max_qps; i++) {</div><div class='add'>+		info = &amp;nic_dev-&gt;intr_coalesce[i];</div><div class='add'>+		info-&gt;pending_limit = HINIC3_DEFAULT_TXRX_MSIX_PENDING_LIMIT;</div><div class='add'>+		info-&gt;coalesce_timer_cfg = HINIC3_DEFAULT_TXRX_MSIX_COALESC_TIMER_CFG;</div><div class='add'>+		info-&gt;resend_timer_cfg = HINIC3_DEFAULT_TXRX_MSIX_RESEND_TIMER_CFG;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_init_intr_coalesce(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;intr_coalesce = kcalloc(nic_dev-&gt;max_qps,</div><div class='add'>+					 sizeof(*nic_dev-&gt;intr_coalesce),</div><div class='add'>+					 GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!nic_dev-&gt;intr_coalesce)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	init_intr_coal_param(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_free_intr_coalesce(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	kfree(nic_dev-&gt;intr_coalesce);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_alloc_txrxqs(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_txqs(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to alloc txqs\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_rxqs(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to alloc rxqs\n");</div><div class='add'>+		goto err_free_txqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_intr_coalesce(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init_intr_coalesce\n");</div><div class='add'>+		goto err_free_rxqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_rxqs:</div><div class='add'>+	hinic3_free_rxqs(netdev);</div><div class='add'>+</div><div class='add'>+err_free_txqs:</div><div class='add'>+	hinic3_free_txqs(netdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_free_txrxqs(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	hinic3_free_intr_coalesce(netdev);</div><div class='add'>+	hinic3_free_rxqs(netdev);</div><div class='add'>+	hinic3_free_txqs(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_init_nic_dev(struct net_device *netdev,</div><div class='add'>+			       struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct pci_dev *pdev = hwdev-&gt;pdev;</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;netdev = netdev;</div><div class='add'>+	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='add'>+	nic_dev-&gt;hwdev = hwdev;</div><div class='add'>+	nic_dev-&gt;pdev = pdev;</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;rx_buf_len = HINIC3_RX_BUF_LEN;</div><div class='add'>+	nic_dev-&gt;lro_replenish_thld = HINIC3_LRO_REPLENISH_THLD;</div><div class='add'>+	nic_dev-&gt;nic_svc_cap = hwdev-&gt;cfg_mgmt-&gt;cap.nic_svc_cap;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_sw_init(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;q_params.sq_depth = HINIC3_SQ_DEPTH;</div><div class='add'>+	nic_dev-&gt;q_params.rq_depth = HINIC3_RQ_DEPTH;</div><div class='add'>+</div><div class='add'>+	hinic3_try_to_enable_rss(netdev);</div><div class='add'>+</div><div class='add'>+	/* VF driver always uses random MAC address. During VM migration to a</div><div class='add'>+	 * new device, the new device should learn the VMs old MAC rather than</div><div class='add'>+	 * provide its own MAC. The product design assumes that every VF is</div><div class='add'>+	 * suspectable to migration so the device avoids offering MAC address</div><div class='add'>+	 * to VFs.</div><div class='add'>+	 */</div><div class='add'>+	eth_hw_addr_random(netdev);</div><div class='add'>+	err = hinic3_set_mac(hwdev, netdev-&gt;dev_addr, 0,</div><div class='add'>+			     hinic3_global_func_id(hwdev));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set default MAC\n");</div><div class='add'>+		goto err_clear_rss_config;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_txrxqs(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to alloc qps\n");</div><div class='add'>+		goto err_del_mac;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_del_mac:</div><div class='add'>+	hinic3_del_mac(hwdev, netdev-&gt;dev_addr, 0,</div><div class='add'>+		       hinic3_global_func_id(hwdev));</div><div class='add'>+err_clear_rss_config:</div><div class='add'>+	hinic3_clear_rss_config(netdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_sw_uninit(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	hinic3_free_txrxqs(netdev);</div><div class='add'>+	hinic3_del_mac(nic_dev-&gt;hwdev, netdev-&gt;dev_addr, 0,</div><div class='add'>+		       hinic3_global_func_id(nic_dev-&gt;hwdev));</div><div class='add'>+	hinic3_clear_rss_config(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_assign_netdev_ops(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	hinic3_set_netdev_ops(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void netdev_feature_init(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	netdev_features_t cso_fts = 0;</div><div class='add'>+	netdev_features_t tso_fts = 0;</div><div class='add'>+	netdev_features_t dft_fts;</div><div class='add'>+</div><div class='add'>+	dft_fts = NETIF_F_SG | NETIF_F_HIGHDMA;</div><div class='add'>+	if (hinic3_test_support(nic_dev, HINIC3_NIC_F_CSUM))</div><div class='add'>+		cso_fts |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM;</div><div class='add'>+	if (hinic3_test_support(nic_dev, HINIC3_NIC_F_SCTP_CRC))</div><div class='add'>+		cso_fts |= NETIF_F_SCTP_CRC;</div><div class='add'>+	if (hinic3_test_support(nic_dev, HINIC3_NIC_F_TSO))</div><div class='add'>+		tso_fts |= NETIF_F_TSO | NETIF_F_TSO6;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;features |= dft_fts | cso_fts | tso_fts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_set_default_hw_feature(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_set_nic_feature_to_hw(nic_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set nic features\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_link_status_change(struct net_device *netdev,</div><div class='add'>+				      bool link_status_up)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (link_status_up) {</div><div class='add'>+		if (netif_carrier_ok(netdev))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		nic_dev-&gt;link_status_up = true;</div><div class='add'>+		netif_carrier_on(netdev);</div><div class='add'>+		netdev_dbg(netdev, "Link is up\n");</div><div class='add'>+	} else {</div><div class='add'>+		if (!netif_carrier_ok(netdev))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		nic_dev-&gt;link_status_up = false;</div><div class='add'>+		netif_carrier_off(netdev);</div><div class='add'>+		netdev_dbg(netdev, "Link is down\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_nic_event(struct auxiliary_device *adev,</div><div class='add'>+			     struct hinic3_event_info *event)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = dev_get_drvdata(&amp;adev-&gt;dev);</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+</div><div class='add'>+	netdev = nic_dev-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	switch (HINIC3_SRV_EVENT_TYPE(event-&gt;service, event-&gt;type)) {</div><div class='add'>+	case HINIC3_SRV_EVENT_TYPE(HINIC3_EVENT_SRV_NIC,</div><div class='add'>+				   HINIC3_NIC_EVENT_LINK_UP):</div><div class='add'>+		hinic3_link_status_change(netdev, true);</div><div class='add'>+		break;</div><div class='add'>+	case HINIC3_SRV_EVENT_TYPE(HINIC3_EVENT_SRV_NIC,</div><div class='add'>+				   HINIC3_NIC_EVENT_LINK_DOWN):</div><div class='add'>+		hinic3_link_status_change(netdev, false);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_nic_probe(struct auxiliary_device *adev,</div><div class='add'>+			    const struct auxiliary_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwdev *hwdev = hinic3_adev_get_hwdev(adev);</div><div class='add'>+	struct pci_dev *pdev = hwdev-&gt;pdev;</div><div class='add'>+	struct hinic3_nic_dev *nic_dev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	u16 max_qps, glb_func_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!hinic3_support_nic(hwdev)) {</div><div class='add'>+		dev_dbg(&amp;adev-&gt;dev, "HW doesn't support nic\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_adev_event_register(adev, hinic3_nic_event);</div><div class='add'>+</div><div class='add'>+	glb_func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	err = hinic3_func_reset(hwdev, glb_func_id, COMM_FUNC_RESET_BIT_NIC);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;adev-&gt;dev, "Failed to reset function\n");</div><div class='add'>+		goto err_unregister_adev_event;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	max_qps = hinic3_func_max_qnum(hwdev);</div><div class='add'>+	netdev = alloc_etherdev_mq(sizeof(*nic_dev), max_qps);</div><div class='add'>+	if (!netdev) {</div><div class='add'>+		dev_err(&amp;adev-&gt;dev, "Failed to allocate netdev\n");</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_unregister_adev_event;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nic_dev = netdev_priv(netdev);</div><div class='add'>+	dev_set_drvdata(&amp;adev-&gt;dev, nic_dev);</div><div class='add'>+	err = hinic3_init_nic_dev(netdev, hwdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_netdev;</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_nic_io(nic_dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_netdev;</div><div class='add'>+</div><div class='add'>+	err = hinic3_sw_init(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_nic_io;</div><div class='add'>+</div><div class='add'>+	hinic3_assign_netdev_ops(netdev);</div><div class='add'>+</div><div class='add'>+	netdev_feature_init(netdev);</div><div class='add'>+	err = hinic3_set_default_hw_feature(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_uninit_sw;</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(netdev);</div><div class='add'>+</div><div class='add'>+	err = register_netdev(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_uninit_nic_feature;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_uninit_nic_feature:</div><div class='add'>+	hinic3_update_nic_feature(nic_dev, 0);</div><div class='add'>+	hinic3_set_nic_feature_to_hw(nic_dev);</div><div class='add'>+</div><div class='add'>+err_uninit_sw:</div><div class='add'>+	hinic3_sw_uninit(netdev);</div><div class='add'>+</div><div class='add'>+err_free_nic_io:</div><div class='add'>+	hinic3_free_nic_io(nic_dev);</div><div class='add'>+</div><div class='add'>+err_free_netdev:</div><div class='add'>+	free_netdev(netdev);</div><div class='add'>+</div><div class='add'>+err_unregister_adev_event:</div><div class='add'>+	hinic3_adev_event_unregister(adev);</div><div class='add'>+	dev_err(&amp;pdev-&gt;dev, "NIC service probe failed\n");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_nic_remove(struct auxiliary_device *adev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = dev_get_drvdata(&amp;adev-&gt;dev);</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+</div><div class='add'>+	if (!hinic3_support_nic(nic_dev-&gt;hwdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	netdev = nic_dev-&gt;netdev;</div><div class='add'>+	unregister_netdev(netdev);</div><div class='add'>+</div><div class='add'>+	hinic3_update_nic_feature(nic_dev, 0);</div><div class='add'>+	hinic3_set_nic_feature_to_hw(nic_dev);</div><div class='add'>+	hinic3_sw_uninit(netdev);</div><div class='add'>+</div><div class='add'>+	hinic3_free_nic_io(nic_dev);</div><div class='add'>+</div><div class='add'>+	free_netdev(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct auxiliary_device_id hinic3_nic_id_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = HINIC3_NIC_DRV_NAME ".nic",</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct auxiliary_driver hinic3_nic_driver = {</div><div class='add'>+	.probe    = hinic3_nic_probe,</div><div class='add'>+	.remove   = hinic3_nic_remove,</div><div class='add'>+	.suspend  = NULL,</div><div class='add'>+	.resume   = NULL,</div><div class='add'>+	.name     = "nic",</div><div class='add'>+	.id_table = hinic3_nic_id_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int hinic3_nic_lld_init(void)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_lld_init();</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = auxiliary_driver_register(&amp;hinic3_nic_driver);</div><div class='add'>+	if (err) {</div><div class='add'>+		hinic3_lld_exit();</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __exit void hinic3_nic_lld_exit(void)</div><div class='add'>+{</div><div class='add'>+	auxiliary_driver_unregister(&amp;hinic3_nic_driver);</div><div class='add'>+</div><div class='add'>+	hinic3_lld_exit();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(hinic3_nic_lld_init);</div><div class='add'>+module_exit(hinic3_nic_lld_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Huawei Technologies CO., Ltd");</div><div class='add'>+MODULE_DESCRIPTION(HINIC3_NIC_DRV_DESC);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c b/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c<br/>new file mode 100644<br/>index 000000000000..cf67e26acece<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c</a></div><div class='hunk'>@@ -0,0 +1,860 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_common.h"</div><div class='add'>+#include "hinic3_csr.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_mbox.h"</div><div class='add'>+</div><div class='add'>+#define MBOX_INT_DST_AEQN_MASK        GENMASK(11, 10)</div><div class='add'>+#define MBOX_INT_SRC_RESP_AEQN_MASK   GENMASK(13, 12)</div><div class='add'>+#define MBOX_INT_STAT_DMA_MASK        GENMASK(19, 14)</div><div class='add'>+/* TX size, expressed in 4 bytes units */</div><div class='add'>+#define MBOX_INT_TX_SIZE_MASK         GENMASK(24, 20)</div><div class='add'>+/* SO_RO == strong order, relaxed order */</div><div class='add'>+#define MBOX_INT_STAT_DMA_SO_RO_MASK  GENMASK(26, 25)</div><div class='add'>+#define MBOX_INT_WB_EN_MASK           BIT(28)</div><div class='add'>+#define MBOX_INT_SET(val, field)  \</div><div class='add'>+	FIELD_PREP(MBOX_INT_##field##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define MBOX_CTRL_TRIGGER_AEQE_MASK   BIT(0)</div><div class='add'>+#define MBOX_CTRL_TX_STATUS_MASK      BIT(1)</div><div class='add'>+#define MBOX_CTRL_DST_FUNC_MASK       GENMASK(28, 16)</div><div class='add'>+#define MBOX_CTRL_SET(val, field)  \</div><div class='add'>+	FIELD_PREP(MBOX_CTRL_##field##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define MBOX_MSG_POLLING_TIMEOUT_MS  8000 // send msg seg timeout</div><div class='add'>+#define MBOX_COMP_POLLING_TIMEOUT_MS 40000 // response</div><div class='add'>+</div><div class='add'>+#define MBOX_MAX_BUF_SZ           2048</div><div class='add'>+#define MBOX_HEADER_SZ            8</div><div class='add'>+</div><div class='add'>+/* MBOX size is 64B, 8B for mbox_header, 8B reserved */</div><div class='add'>+#define MBOX_SEG_LEN              48</div><div class='add'>+#define MBOX_SEG_LEN_ALIGN        4</div><div class='add'>+#define MBOX_WB_STATUS_LEN        16</div><div class='add'>+</div><div class='add'>+#define MBOX_SEQ_ID_START_VAL     0</div><div class='add'>+#define MBOX_SEQ_ID_MAX_VAL       42</div><div class='add'>+#define MBOX_LAST_SEG_MAX_LEN  \</div><div class='add'>+	(MBOX_MAX_BUF_SZ - MBOX_SEQ_ID_MAX_VAL * MBOX_SEG_LEN)</div><div class='add'>+</div><div class='add'>+/* mbox write back status is 16B, only first 4B is used */</div><div class='add'>+#define MBOX_WB_STATUS_ERRCODE_MASK      0xFFFF</div><div class='add'>+#define MBOX_WB_STATUS_MASK              0xFF</div><div class='add'>+#define MBOX_WB_ERROR_CODE_MASK          0xFF00</div><div class='add'>+#define MBOX_WB_STATUS_FINISHED_SUCCESS  0xFF</div><div class='add'>+#define MBOX_WB_STATUS_NOT_FINISHED      0x00</div><div class='add'>+</div><div class='add'>+#define MBOX_STATUS_FINISHED(wb)  \</div><div class='add'>+	((FIELD_PREP(MBOX_WB_STATUS_MASK, (wb))) != MBOX_WB_STATUS_NOT_FINISHED)</div><div class='add'>+#define MBOX_STATUS_SUCCESS(wb)  \</div><div class='add'>+	((FIELD_PREP(MBOX_WB_STATUS_MASK, (wb))) ==  \</div><div class='add'>+	MBOX_WB_STATUS_FINISHED_SUCCESS)</div><div class='add'>+#define MBOX_STATUS_ERRCODE(wb)  \</div><div class='add'>+	((wb) &amp; MBOX_WB_ERROR_CODE_MASK)</div><div class='add'>+</div><div class='add'>+#define MBOX_DMA_MSG_QUEUE_DEPTH    32</div><div class='add'>+#define MBOX_AREA(hwif)  \</div><div class='add'>+	((hwif)-&gt;cfg_regs_base + HINIC3_FUNC_CSR_MAILBOX_DATA_OFF)</div><div class='add'>+</div><div class='add'>+#define MBOX_MQ_CI_OFFSET  \</div><div class='add'>+	(HINIC3_CFG_REGS_FLAG + HINIC3_FUNC_CSR_MAILBOX_DATA_OFF + \</div><div class='add'>+	 MBOX_HEADER_SZ + MBOX_SEG_LEN)</div><div class='add'>+</div><div class='add'>+#define MBOX_MQ_SYNC_CI_MASK   GENMASK(7, 0)</div><div class='add'>+#define MBOX_MQ_ASYNC_CI_MASK  GENMASK(15, 8)</div><div class='add'>+#define MBOX_MQ_CI_GET(val, field)  \</div><div class='add'>+	FIELD_GET(MBOX_MQ_##field##_CI_MASK, val)</div><div class='add'>+</div><div class='add'>+#define MBOX_MGMT_FUNC_ID         0x1FFF</div><div class='add'>+#define MBOX_COMM_F_MBOX_SEGMENT  BIT(3)</div><div class='add'>+</div><div class='add'>+static u8 *get_mobx_body_from_hdr(u8 *header)</div><div class='add'>+{</div><div class='add'>+	return header + MBOX_HEADER_SZ;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct hinic3_msg_desc *get_mbox_msg_desc(struct hinic3_mbox *mbox,</div><div class='add'>+						 enum mbox_msg_direction_type dir,</div><div class='add'>+						 u16 src_func_id)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_msg_channel *msg_ch;</div><div class='add'>+</div><div class='add'>+	msg_ch = (src_func_id == MBOX_MGMT_FUNC_ID) ?</div><div class='add'>+		&amp;mbox-&gt;mgmt_msg : mbox-&gt;func_msg;</div><div class='add'>+</div><div class='add'>+	return (dir == MBOX_MSG_SEND) ?</div><div class='add'>+		&amp;msg_ch-&gt;recv_msg : &amp;msg_ch-&gt;resp_msg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void resp_mbox_handler(struct hinic3_mbox *mbox,</div><div class='add'>+			      const struct hinic3_msg_desc *msg_desc)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;mbox-&gt;mbox_lock);</div><div class='add'>+	if (msg_desc-&gt;msg_info.msg_id == mbox-&gt;send_msg_id &amp;&amp;</div><div class='add'>+	    mbox-&gt;event_flag == MBOX_EVENT_START)</div><div class='add'>+		mbox-&gt;event_flag = MBOX_EVENT_SUCCESS;</div><div class='add'>+	spin_unlock(&amp;mbox-&gt;mbox_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mbox_segment_valid(struct hinic3_mbox *mbox,</div><div class='add'>+			       struct hinic3_msg_desc *msg_desc,</div><div class='add'>+			       __le64 mbox_header)</div><div class='add'>+{</div><div class='add'>+	u8 seq_id, seg_len, msg_id, mod;</div><div class='add'>+	__le16 src_func_idx, cmd;</div><div class='add'>+</div><div class='add'>+	seq_id = MBOX_MSG_HEADER_GET(mbox_header, SEQID);</div><div class='add'>+	seg_len = MBOX_MSG_HEADER_GET(mbox_header, SEG_LEN);</div><div class='add'>+	msg_id = MBOX_MSG_HEADER_GET(mbox_header, MSG_ID);</div><div class='add'>+	mod = MBOX_MSG_HEADER_GET(mbox_header, MODULE);</div><div class='add'>+	cmd = cpu_to_le16(MBOX_MSG_HEADER_GET(mbox_header, CMD));</div><div class='add'>+	src_func_idx = cpu_to_le16(MBOX_MSG_HEADER_GET(mbox_header,</div><div class='add'>+						       SRC_GLB_FUNC_IDX));</div><div class='add'>+</div><div class='add'>+	if (seq_id &gt; MBOX_SEQ_ID_MAX_VAL || seg_len &gt; MBOX_SEG_LEN ||</div><div class='add'>+	    (seq_id == MBOX_SEQ_ID_MAX_VAL &amp;&amp; seg_len &gt; MBOX_LAST_SEG_MAX_LEN))</div><div class='add'>+		goto err_seg;</div><div class='add'>+</div><div class='add'>+	if (seq_id == 0) {</div><div class='add'>+		msg_desc-&gt;seq_id = seq_id;</div><div class='add'>+		msg_desc-&gt;msg_info.msg_id = msg_id;</div><div class='add'>+		msg_desc-&gt;mod = mod;</div><div class='add'>+		msg_desc-&gt;cmd = cmd;</div><div class='add'>+	} else {</div><div class='add'>+		if (seq_id != msg_desc-&gt;seq_id + 1 ||</div><div class='add'>+		    msg_id != msg_desc-&gt;msg_info.msg_id ||</div><div class='add'>+		    mod != msg_desc-&gt;mod || cmd != msg_desc-&gt;cmd)</div><div class='add'>+			goto err_seg;</div><div class='add'>+</div><div class='add'>+		msg_desc-&gt;seq_id = seq_id;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+</div><div class='add'>+err_seg:</div><div class='add'>+	dev_err(mbox-&gt;hwdev-&gt;dev,</div><div class='add'>+		"Mailbox segment check failed, src func id: 0x%x, front seg info: seq id: 0x%x, msg id: 0x%x, mod: 0x%x, cmd: 0x%x\n",</div><div class='add'>+		src_func_idx, msg_desc-&gt;seq_id, msg_desc-&gt;msg_info.msg_id,</div><div class='add'>+		msg_desc-&gt;mod, msg_desc-&gt;cmd);</div><div class='add'>+	dev_err(mbox-&gt;hwdev-&gt;dev,</div><div class='add'>+		"Current seg info: seg len: 0x%x, seq id: 0x%x, msg id: 0x%x, mod: 0x%x, cmd: 0x%x\n",</div><div class='add'>+		seg_len, seq_id, msg_id, mod, cmd);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void recv_mbox_handler(struct hinic3_mbox *mbox,</div><div class='add'>+			      u8 *header, struct hinic3_msg_desc *msg_desc)</div><div class='add'>+{</div><div class='add'>+	__le64 mbox_header = *((__force __le64 *)header);</div><div class='add'>+	u8 *mbox_body = get_mobx_body_from_hdr(header);</div><div class='add'>+	u8 seq_id, seg_len;</div><div class='add'>+	int pos;</div><div class='add'>+</div><div class='add'>+	if (!mbox_segment_valid(mbox, msg_desc, mbox_header)) {</div><div class='add'>+		msg_desc-&gt;seq_id = MBOX_SEQ_ID_MAX_VAL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_id = MBOX_MSG_HEADER_GET(mbox_header, SEQID);</div><div class='add'>+	seg_len = MBOX_MSG_HEADER_GET(mbox_header, SEG_LEN);</div><div class='add'>+</div><div class='add'>+	pos = seq_id * MBOX_SEG_LEN;</div><div class='add'>+	memcpy(msg_desc-&gt;msg + pos, mbox_body, seg_len);</div><div class='add'>+</div><div class='add'>+	if (!MBOX_MSG_HEADER_GET(mbox_header, LAST))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	msg_desc-&gt;msg_len = cpu_to_le16(MBOX_MSG_HEADER_GET(mbox_header,</div><div class='add'>+							    MSG_LEN));</div><div class='add'>+	msg_desc-&gt;msg_info.status = MBOX_MSG_HEADER_GET(mbox_header, STATUS);</div><div class='add'>+</div><div class='add'>+	if (MBOX_MSG_HEADER_GET(mbox_header, DIRECTION) == MBOX_MSG_RESP)</div><div class='add'>+		resp_mbox_handler(mbox, msg_desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_mbox_func_aeqe_handler(struct hinic3_hwdev *hwdev, u8 *header,</div><div class='add'>+				   u8 size)</div><div class='add'>+{</div><div class='add'>+	__le64 mbox_header = *((__force __le64 *)header);</div><div class='add'>+	enum mbox_msg_direction_type dir;</div><div class='add'>+	struct hinic3_msg_desc *msg_desc;</div><div class='add'>+	struct hinic3_mbox *mbox;</div><div class='add'>+	u16 src_func_id;</div><div class='add'>+</div><div class='add'>+	mbox = hwdev-&gt;mbox;</div><div class='add'>+	dir = MBOX_MSG_HEADER_GET(mbox_header, DIRECTION);</div><div class='add'>+	src_func_id = MBOX_MSG_HEADER_GET(mbox_header, SRC_GLB_FUNC_IDX);</div><div class='add'>+	msg_desc = get_mbox_msg_desc(mbox, dir, src_func_id);</div><div class='add'>+	recv_mbox_handler(mbox, header, msg_desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_mbox_dma_queue(struct hinic3_hwdev *hwdev,</div><div class='add'>+			       struct mbox_dma_queue *mq)</div><div class='add'>+{</div><div class='add'>+	u32 size;</div><div class='add'>+</div><div class='add'>+	mq-&gt;depth = MBOX_DMA_MSG_QUEUE_DEPTH;</div><div class='add'>+	mq-&gt;prod_idx = 0;</div><div class='add'>+	mq-&gt;cons_idx = 0;</div><div class='add'>+</div><div class='add'>+	size = mq-&gt;depth * MBOX_MAX_BUF_SZ;</div><div class='add'>+	mq-&gt;dma_buf_vaddr = dma_alloc_coherent(hwdev-&gt;dev, size,</div><div class='add'>+					       &amp;mq-&gt;dma_buf_paddr,</div><div class='add'>+					       GFP_KERNEL);</div><div class='add'>+	if (!mq-&gt;dma_buf_vaddr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void uninit_mbox_dma_queue(struct hinic3_hwdev *hwdev,</div><div class='add'>+				  struct mbox_dma_queue *mq)</div><div class='add'>+{</div><div class='add'>+	dma_free_coherent(hwdev-&gt;dev, mq-&gt;depth * MBOX_MAX_BUF_SZ,</div><div class='add'>+			  mq-&gt;dma_buf_vaddr, mq-&gt;dma_buf_paddr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_init_mbox_dma_queue(struct hinic3_mbox *mbox)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = init_mbox_dma_queue(mbox-&gt;hwdev, &amp;mbox-&gt;sync_msg_queue);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = init_mbox_dma_queue(mbox-&gt;hwdev, &amp;mbox-&gt;async_msg_queue);</div><div class='add'>+	if (err) {</div><div class='add'>+		uninit_mbox_dma_queue(mbox-&gt;hwdev, &amp;mbox-&gt;sync_msg_queue);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = hinic3_hwif_read_reg(mbox-&gt;hwdev-&gt;hwif, MBOX_MQ_CI_OFFSET);</div><div class='add'>+	val &amp;= ~MBOX_MQ_SYNC_CI_MASK;</div><div class='add'>+	val &amp;= ~MBOX_MQ_ASYNC_CI_MASK;</div><div class='add'>+	hinic3_hwif_write_reg(mbox-&gt;hwdev-&gt;hwif, MBOX_MQ_CI_OFFSET, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_uninit_mbox_dma_queue(struct hinic3_mbox *mbox)</div><div class='add'>+{</div><div class='add'>+	uninit_mbox_dma_queue(mbox-&gt;hwdev, &amp;mbox-&gt;sync_msg_queue);</div><div class='add'>+	uninit_mbox_dma_queue(mbox-&gt;hwdev, &amp;mbox-&gt;async_msg_queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int alloc_mbox_msg_channel(struct hinic3_msg_channel *msg_ch)</div><div class='add'>+{</div><div class='add'>+	msg_ch-&gt;resp_msg.msg = kzalloc(MBOX_MAX_BUF_SZ, GFP_KERNEL);</div><div class='add'>+	if (!msg_ch-&gt;resp_msg.msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	msg_ch-&gt;recv_msg.msg = kzalloc(MBOX_MAX_BUF_SZ, GFP_KERNEL);</div><div class='add'>+	if (!msg_ch-&gt;recv_msg.msg) {</div><div class='add'>+		kfree(msg_ch-&gt;resp_msg.msg);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg_ch-&gt;resp_msg.seq_id = MBOX_SEQ_ID_MAX_VAL;</div><div class='add'>+	msg_ch-&gt;recv_msg.seq_id = MBOX_SEQ_ID_MAX_VAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void free_mbox_msg_channel(struct hinic3_msg_channel *msg_ch)</div><div class='add'>+{</div><div class='add'>+	kfree(msg_ch-&gt;recv_msg.msg);</div><div class='add'>+	kfree(msg_ch-&gt;resp_msg.msg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_mgmt_msg_channel(struct hinic3_mbox *mbox)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = alloc_mbox_msg_channel(&amp;mbox-&gt;mgmt_msg);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(mbox-&gt;hwdev-&gt;dev, "Failed to alloc mgmt message channel\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_mbox_dma_queue(mbox);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(mbox-&gt;hwdev-&gt;dev, "Failed to init mbox dma queue\n");</div><div class='add'>+		free_mbox_msg_channel(&amp;mbox-&gt;mgmt_msg);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void uninit_mgmt_msg_channel(struct hinic3_mbox *mbox)</div><div class='add'>+{</div><div class='add'>+	hinic3_uninit_mbox_dma_queue(mbox);</div><div class='add'>+	free_mbox_msg_channel(&amp;mbox-&gt;mgmt_msg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_init_func_mbox_msg_channel(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_mbox *mbox;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mbox = hwdev-&gt;mbox;</div><div class='add'>+	mbox-&gt;func_msg = kzalloc(sizeof(*mbox-&gt;func_msg), GFP_KERNEL);</div><div class='add'>+	if (!mbox-&gt;func_msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = alloc_mbox_msg_channel(mbox-&gt;func_msg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_func_msg;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_func_msg:</div><div class='add'>+	kfree(mbox-&gt;func_msg);</div><div class='add'>+	mbox-&gt;func_msg = NULL;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_uninit_func_mbox_msg_channel(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_mbox *mbox = hwdev-&gt;mbox;</div><div class='add'>+</div><div class='add'>+	free_mbox_msg_channel(mbox-&gt;func_msg);</div><div class='add'>+	kfree(mbox-&gt;func_msg);</div><div class='add'>+	mbox-&gt;func_msg = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void prepare_send_mbox(struct hinic3_mbox *mbox)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_send_mbox *send_mbox = &amp;mbox-&gt;send_mbox;</div><div class='add'>+</div><div class='add'>+	send_mbox-&gt;data = MBOX_AREA(mbox-&gt;hwdev-&gt;hwif);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int alloc_mbox_wb_status(struct hinic3_mbox *mbox)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_send_mbox *send_mbox = &amp;mbox-&gt;send_mbox;</div><div class='add'>+	struct hinic3_hwdev *hwdev = mbox-&gt;hwdev;</div><div class='add'>+	u32 addr_h, addr_l;</div><div class='add'>+</div><div class='add'>+	send_mbox-&gt;wb_vaddr = dma_alloc_coherent(hwdev-&gt;dev,</div><div class='add'>+						 MBOX_WB_STATUS_LEN,</div><div class='add'>+						 &amp;send_mbox-&gt;wb_paddr,</div><div class='add'>+						 GFP_KERNEL);</div><div class='add'>+	if (!send_mbox-&gt;wb_vaddr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	addr_h = upper_32_bits(send_mbox-&gt;wb_paddr);</div><div class='add'>+	addr_l = lower_32_bits(send_mbox-&gt;wb_paddr);</div><div class='add'>+	hinic3_hwif_write_reg(hwdev-&gt;hwif, HINIC3_FUNC_CSR_MAILBOX_RESULT_H_OFF,</div><div class='add'>+			      addr_h);</div><div class='add'>+	hinic3_hwif_write_reg(hwdev-&gt;hwif, HINIC3_FUNC_CSR_MAILBOX_RESULT_L_OFF,</div><div class='add'>+			      addr_l);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void free_mbox_wb_status(struct hinic3_mbox *mbox)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_send_mbox *send_mbox = &amp;mbox-&gt;send_mbox;</div><div class='add'>+	struct hinic3_hwdev *hwdev = mbox-&gt;hwdev;</div><div class='add'>+</div><div class='add'>+	hinic3_hwif_write_reg(hwdev-&gt;hwif, HINIC3_FUNC_CSR_MAILBOX_RESULT_H_OFF,</div><div class='add'>+			      0);</div><div class='add'>+	hinic3_hwif_write_reg(hwdev-&gt;hwif, HINIC3_FUNC_CSR_MAILBOX_RESULT_L_OFF,</div><div class='add'>+			      0);</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(hwdev-&gt;dev, MBOX_WB_STATUS_LEN,</div><div class='add'>+			  send_mbox-&gt;wb_vaddr, send_mbox-&gt;wb_paddr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_mbox_pre_init(struct hinic3_hwdev *hwdev,</div><div class='add'>+				struct hinic3_mbox *mbox)</div><div class='add'>+{</div><div class='add'>+	mbox-&gt;hwdev = hwdev;</div><div class='add'>+	mutex_init(&amp;mbox-&gt;mbox_send_lock);</div><div class='add'>+	spin_lock_init(&amp;mbox-&gt;mbox_lock);</div><div class='add'>+</div><div class='add'>+	mbox-&gt;workq = create_singlethread_workqueue(HINIC3_MBOX_WQ_NAME);</div><div class='add'>+	if (!mbox-&gt;workq) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to initialize MBOX workqueue\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	hwdev-&gt;mbox = mbox;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_init_mbox(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_mbox *mbox;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mbox = kzalloc(sizeof(*mbox), GFP_KERNEL);</div><div class='add'>+	if (!mbox)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = hinic3_mbox_pre_init(hwdev, mbox);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_mbox;</div><div class='add'>+</div><div class='add'>+	err = init_mgmt_msg_channel(mbox);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_destroy_workqueue;</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_func_mbox_msg_channel(hwdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_uninit_mgmt_msg_ch;</div><div class='add'>+</div><div class='add'>+	err = alloc_mbox_wb_status(mbox);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to alloc mbox write back status\n");</div><div class='add'>+		goto err_uninit_func_mbox_msg_ch;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prepare_send_mbox(mbox);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_uninit_func_mbox_msg_ch:</div><div class='add'>+	hinic3_uninit_func_mbox_msg_channel(hwdev);</div><div class='add'>+</div><div class='add'>+err_uninit_mgmt_msg_ch:</div><div class='add'>+	uninit_mgmt_msg_channel(mbox);</div><div class='add'>+</div><div class='add'>+err_destroy_workqueue:</div><div class='add'>+	destroy_workqueue(mbox-&gt;workq);</div><div class='add'>+</div><div class='add'>+err_free_mbox:</div><div class='add'>+	kfree(mbox);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_mbox(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_mbox *mbox = hwdev-&gt;mbox;</div><div class='add'>+</div><div class='add'>+	destroy_workqueue(mbox-&gt;workq);</div><div class='add'>+	free_mbox_wb_status(mbox);</div><div class='add'>+	hinic3_uninit_func_mbox_msg_channel(hwdev);</div><div class='add'>+	uninit_mgmt_msg_channel(mbox);</div><div class='add'>+	kfree(mbox);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MBOX_DMA_MSG_INIT_XOR_VAL    0x5a5a5a5a</div><div class='add'>+#define MBOX_XOR_DATA_ALIGN          4</div><div class='add'>+static u32 mbox_dma_msg_xor(u32 *data, u32 msg_len)</div><div class='add'>+{</div><div class='add'>+	u32 xor = MBOX_DMA_MSG_INIT_XOR_VAL;</div><div class='add'>+	u32 dw_len = msg_len / sizeof(u32);</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dw_len; i++)</div><div class='add'>+		xor ^= data[i];</div><div class='add'>+</div><div class='add'>+	return xor;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MBOX_MQ_ID_MASK(mq, idx)  ((idx) &amp; ((mq)-&gt;depth - 1))</div><div class='add'>+</div><div class='add'>+static bool is_msg_queue_full(struct mbox_dma_queue *mq)</div><div class='add'>+{</div><div class='add'>+	return MBOX_MQ_ID_MASK(mq, (mq)-&gt;prod_idx + 1) ==</div><div class='add'>+	       MBOX_MQ_ID_MASK(mq, (mq)-&gt;cons_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mbox_prepare_dma_entry(struct hinic3_mbox *mbox,</div><div class='add'>+				  struct mbox_dma_queue *mq,</div><div class='add'>+				  struct mbox_dma_msg *dma_msg,</div><div class='add'>+				  const void *msg, u32 msg_len)</div><div class='add'>+{</div><div class='add'>+	u64 dma_addr, offset;</div><div class='add'>+	void *dma_vaddr;</div><div class='add'>+</div><div class='add'>+	if (is_msg_queue_full(mq)) {</div><div class='add'>+		dev_err(mbox-&gt;hwdev-&gt;dev, "Mbox sync message queue is busy, pi: %u, ci: %u\n",</div><div class='add'>+			mq-&gt;prod_idx, MBOX_MQ_ID_MASK(mq, mq-&gt;cons_idx));</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* copy data to DMA buffer */</div><div class='add'>+	offset = mq-&gt;prod_idx * MBOX_MAX_BUF_SZ;</div><div class='add'>+	dma_vaddr = (u8 *)mq-&gt;dma_buf_vaddr + offset;</div><div class='add'>+	memcpy(dma_vaddr, msg, msg_len);</div><div class='add'>+	dma_addr = mq-&gt;dma_buf_paddr + offset;</div><div class='add'>+	dma_msg-&gt;dma_addr_high = cpu_to_le32(upper_32_bits(dma_addr));</div><div class='add'>+	dma_msg-&gt;dma_addr_low = cpu_to_le32(lower_32_bits(dma_addr));</div><div class='add'>+	dma_msg-&gt;msg_len = cpu_to_le32(msg_len);</div><div class='add'>+	/* The firmware obtains message based on 4B alignment. */</div><div class='add'>+	dma_msg-&gt;xor = cpu_to_le32(mbox_dma_msg_xor(dma_vaddr,</div><div class='add'>+						    ALIGN(msg_len, MBOX_XOR_DATA_ALIGN)));</div><div class='add'>+	mq-&gt;prod_idx++;</div><div class='add'>+	mq-&gt;prod_idx = MBOX_MQ_ID_MASK(mq, mq-&gt;prod_idx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mbox_prepare_dma_msg(struct hinic3_mbox *mbox,</div><div class='add'>+				enum mbox_msg_ack_type ack_type,</div><div class='add'>+				struct mbox_dma_msg *dma_msg, const void *msg,</div><div class='add'>+				u32 msg_len)</div><div class='add'>+{</div><div class='add'>+	struct mbox_dma_queue *mq;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = hinic3_hwif_read_reg(mbox-&gt;hwdev-&gt;hwif, MBOX_MQ_CI_OFFSET);</div><div class='add'>+	if (ack_type == MBOX_MSG_ACK) {</div><div class='add'>+		mq = &amp;mbox-&gt;sync_msg_queue;</div><div class='add'>+		mq-&gt;cons_idx = MBOX_MQ_CI_GET(val, SYNC);</div><div class='add'>+	} else {</div><div class='add'>+		mq = &amp;mbox-&gt;async_msg_queue;</div><div class='add'>+		mq-&gt;cons_idx = MBOX_MQ_CI_GET(val, ASYNC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mbox_prepare_dma_entry(mbox, mq, dma_msg, msg, msg_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void clear_mbox_status(struct hinic3_send_mbox *mbox)</div><div class='add'>+{</div><div class='add'>+	__be64 *wb_status = mbox-&gt;wb_vaddr;</div><div class='add'>+</div><div class='add'>+	*wb_status = 0;</div><div class='add'>+	/* clear mailbox write back status */</div><div class='add'>+	wmb();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mbox_dword_write(const void *src, void __iomem *dst, u32 count)</div><div class='add'>+{</div><div class='add'>+	const __le32 *src32 = src;</div><div class='add'>+	u32 __iomem *dst32 = dst;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	/* Data written to mbox is arranged in structs with little endian fields</div><div class='add'>+	 * but when written to HW every dword (32bits) should be swapped since</div><div class='add'>+	 * the HW will swap it again.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; count; i++)</div><div class='add'>+		__raw_writel(swab32((__force __u32)src32[i]), dst32 + i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mbox_copy_header(struct hinic3_hwdev *hwdev,</div><div class='add'>+			     struct hinic3_send_mbox *mbox, __le64 *header)</div><div class='add'>+{</div><div class='add'>+	mbox_dword_write(header, mbox-&gt;data, MBOX_HEADER_SZ / sizeof(__le32));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mbox_copy_send_data(struct hinic3_hwdev *hwdev,</div><div class='add'>+				struct hinic3_send_mbox *mbox, void *seg,</div><div class='add'>+				u32 seg_len)</div><div class='add'>+{</div><div class='add'>+	u32 __iomem *dst = (u32 __iomem *)(mbox-&gt;data + MBOX_HEADER_SZ);</div><div class='add'>+	u32 count, leftover, last_dword;</div><div class='add'>+	const __le32 *src = seg;</div><div class='add'>+</div><div class='add'>+	count = seg_len / sizeof(u32);</div><div class='add'>+	leftover = seg_len % sizeof(u32);</div><div class='add'>+	if (count &gt; 0)</div><div class='add'>+		mbox_dword_write(src, dst, count);</div><div class='add'>+</div><div class='add'>+	if (leftover &gt; 0) {</div><div class='add'>+		last_dword = 0;</div><div class='add'>+		memcpy(&amp;last_dword, src + count, leftover);</div><div class='add'>+		mbox_dword_write(&amp;last_dword, dst + count, 1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void write_mbox_msg_attr(struct hinic3_mbox *mbox,</div><div class='add'>+				u16 dst_func, u16 dst_aeqn, u32 seg_len)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwif *hwif = mbox-&gt;hwdev-&gt;hwif;</div><div class='add'>+	u32 mbox_int, mbox_ctrl, tx_size;</div><div class='add'>+</div><div class='add'>+	tx_size = ALIGN(seg_len + MBOX_HEADER_SZ, MBOX_SEG_LEN_ALIGN) &gt;&gt; 2;</div><div class='add'>+</div><div class='add'>+	mbox_int = MBOX_INT_SET(dst_aeqn, DST_AEQN) |</div><div class='add'>+		   MBOX_INT_SET(0, STAT_DMA) |</div><div class='add'>+		   MBOX_INT_SET(tx_size, TX_SIZE) |</div><div class='add'>+		   MBOX_INT_SET(0, STAT_DMA_SO_RO) |</div><div class='add'>+		   MBOX_INT_SET(1, WB_EN);</div><div class='add'>+</div><div class='add'>+	mbox_ctrl = MBOX_CTRL_SET(1, TX_STATUS) |</div><div class='add'>+		    MBOX_CTRL_SET(0, TRIGGER_AEQE) |</div><div class='add'>+		    MBOX_CTRL_SET(dst_func, DST_FUNC);</div><div class='add'>+</div><div class='add'>+	hinic3_hwif_write_reg(hwif, HINIC3_FUNC_CSR_MAILBOX_INT_OFF, mbox_int);</div><div class='add'>+	hinic3_hwif_write_reg(hwif, HINIC3_FUNC_CSR_MAILBOX_CONTROL_OFF,</div><div class='add'>+			      mbox_ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 get_mbox_status(const struct hinic3_send_mbox *mbox)</div><div class='add'>+{</div><div class='add'>+	__be64 *wb_status = mbox-&gt;wb_vaddr;</div><div class='add'>+	u64 wb_val;</div><div class='add'>+</div><div class='add'>+	wb_val = be64_to_cpu(*wb_status);</div><div class='add'>+	/* verify reading before check */</div><div class='add'>+	rmb();</div><div class='add'>+</div><div class='add'>+	return wb_val &amp; MBOX_WB_STATUS_ERRCODE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hinic3_wait_return check_mbox_wb_status(void *priv_data)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_mbox *mbox = priv_data;</div><div class='add'>+	u16 wb_status;</div><div class='add'>+</div><div class='add'>+	wb_status = get_mbox_status(&amp;mbox-&gt;send_mbox);</div><div class='add'>+</div><div class='add'>+	return MBOX_STATUS_FINISHED(wb_status) ?</div><div class='add'>+	       HINIC3_WAIT_PROCESS_CPL : HINIC3_WAIT_PROCESS_WAITING;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int send_mbox_seg(struct hinic3_mbox *mbox, __le64 header,</div><div class='add'>+			 u16 dst_func, void *seg, u32 seg_len, void *msg_info)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_send_mbox *send_mbox = &amp;mbox-&gt;send_mbox;</div><div class='add'>+	struct hinic3_hwdev *hwdev = mbox-&gt;hwdev;</div><div class='add'>+	u8 num_aeqs = hwdev-&gt;hwif-&gt;attr.num_aeqs;</div><div class='add'>+	enum mbox_msg_direction_type dir;</div><div class='add'>+	u16 dst_aeqn, wb_status, errcode;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* mbox to mgmt cpu, hardware doesn't care about dst aeq id */</div><div class='add'>+	if (num_aeqs &gt; MBOX_MSG_AEQ_FOR_MBOX) {</div><div class='add'>+		dir = MBOX_MSG_HEADER_GET(header, DIRECTION);</div><div class='add'>+		dst_aeqn = (dir == MBOX_MSG_SEND) ?</div><div class='add'>+			   MBOX_MSG_AEQ_FOR_EVENT : MBOX_MSG_AEQ_FOR_MBOX;</div><div class='add'>+	} else {</div><div class='add'>+		dst_aeqn = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clear_mbox_status(send_mbox);</div><div class='add'>+	mbox_copy_header(hwdev, send_mbox, &amp;header);</div><div class='add'>+	mbox_copy_send_data(hwdev, send_mbox, seg, seg_len);</div><div class='add'>+	write_mbox_msg_attr(mbox, dst_func, dst_aeqn, seg_len);</div><div class='add'>+</div><div class='add'>+	err = hinic3_wait_for_timeout(mbox, check_mbox_wb_status,</div><div class='add'>+				      MBOX_MSG_POLLING_TIMEOUT_MS,</div><div class='add'>+				      USEC_PER_MSEC);</div><div class='add'>+	wb_status = get_mbox_status(send_mbox);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Send mailbox segment timeout, wb status: 0x%x\n",</div><div class='add'>+			wb_status);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!MBOX_STATUS_SUCCESS(wb_status)) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Send mailbox segment to function %u error, wb status: 0x%x\n",</div><div class='add'>+			dst_func, wb_status);</div><div class='add'>+		errcode = MBOX_STATUS_ERRCODE(wb_status);</div><div class='add'>+		return errcode ? errcode : -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int send_mbox_msg(struct hinic3_mbox *mbox, u8 mod, u16 cmd,</div><div class='add'>+			 const void *msg, u32 msg_len, u16 dst_func,</div><div class='add'>+			 enum mbox_msg_direction_type direction,</div><div class='add'>+			 enum mbox_msg_ack_type ack_type,</div><div class='add'>+			 struct mbox_msg_info *msg_info)</div><div class='add'>+{</div><div class='add'>+	enum mbox_msg_data_type data_type = MBOX_MSG_DATA_INLINE;</div><div class='add'>+	struct hinic3_hwdev *hwdev = mbox-&gt;hwdev;</div><div class='add'>+	struct mbox_dma_msg dma_msg;</div><div class='add'>+	u32 seg_len = MBOX_SEG_LEN;</div><div class='add'>+	__le64 header = 0;</div><div class='add'>+	u32 seq_id = 0;</div><div class='add'>+	u16 rsp_aeq_id;</div><div class='add'>+	u8 *msg_seg;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 left;</div><div class='add'>+</div><div class='add'>+	if (hwdev-&gt;hwif-&gt;attr.num_aeqs &gt; MBOX_MSG_AEQ_FOR_MBOX)</div><div class='add'>+		rsp_aeq_id = MBOX_MSG_AEQ_FOR_MBOX;</div><div class='add'>+	else</div><div class='add'>+		rsp_aeq_id = 0;</div><div class='add'>+</div><div class='add'>+	if (dst_func == MBOX_MGMT_FUNC_ID &amp;&amp;</div><div class='add'>+	    !(hwdev-&gt;features[0] &amp; MBOX_COMM_F_MBOX_SEGMENT)) {</div><div class='add'>+		err = mbox_prepare_dma_msg(mbox, ack_type, &amp;dma_msg,</div><div class='add'>+					   msg, msg_len);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_send;</div><div class='add'>+</div><div class='add'>+		msg = &amp;dma_msg;</div><div class='add'>+		msg_len = sizeof(dma_msg);</div><div class='add'>+		data_type = MBOX_MSG_DATA_DMA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg_seg = (u8 *)msg;</div><div class='add'>+	left = msg_len;</div><div class='add'>+</div><div class='add'>+	header = cpu_to_le64(MBOX_MSG_HEADER_SET(msg_len, MSG_LEN) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(mod, MODULE) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(seg_len, SEG_LEN) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(ack_type, NO_ACK) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(data_type, DATA_TYPE) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(MBOX_SEQ_ID_START_VAL, SEQID) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(direction, DIRECTION) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(cmd, CMD) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(msg_info-&gt;msg_id, MSG_ID) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(rsp_aeq_id, AEQ_ID) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(MBOX_MSG_FROM_MBOX, SOURCE) |</div><div class='add'>+			     MBOX_MSG_HEADER_SET(!!msg_info-&gt;status, STATUS));</div><div class='add'>+</div><div class='add'>+	while (!(MBOX_MSG_HEADER_GET(header, LAST))) {</div><div class='add'>+		if (left &lt;= MBOX_SEG_LEN) {</div><div class='add'>+			header &amp;= cpu_to_le64(~MBOX_MSG_HEADER_SEG_LEN_MASK);</div><div class='add'>+			header |=</div><div class='add'>+				cpu_to_le64(MBOX_MSG_HEADER_SET(left, SEG_LEN) |</div><div class='add'>+					    MBOX_MSG_HEADER_SET(1, LAST));</div><div class='add'>+			seg_len = left;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = send_mbox_seg(mbox, header, dst_func, msg_seg,</div><div class='add'>+				    seg_len, msg_info);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Failed to send mbox seg, seq_id=0x%llx\n",</div><div class='add'>+				MBOX_MSG_HEADER_GET(header, SEQID));</div><div class='add'>+			goto err_send;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		left -= MBOX_SEG_LEN;</div><div class='add'>+		msg_seg += MBOX_SEG_LEN;</div><div class='add'>+		seq_id++;</div><div class='add'>+		header &amp;= cpu_to_le64(~MBOX_MSG_HEADER_SEG_LEN_MASK);</div><div class='add'>+		header |= cpu_to_le64(MBOX_MSG_HEADER_SET(seq_id, SEQID));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_send:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_mbox_to_func_event(struct hinic3_mbox *mbox,</div><div class='add'>+				   enum mbox_event_state event_flag)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;mbox-&gt;mbox_lock);</div><div class='add'>+	mbox-&gt;event_flag = event_flag;</div><div class='add'>+	spin_unlock(&amp;mbox-&gt;mbox_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hinic3_wait_return check_mbox_msg_finish(void *priv_data)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_mbox *mbox = priv_data;</div><div class='add'>+</div><div class='add'>+	return (mbox-&gt;event_flag == MBOX_EVENT_SUCCESS) ?</div><div class='add'>+		HINIC3_WAIT_PROCESS_CPL : HINIC3_WAIT_PROCESS_WAITING;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wait_mbox_msg_completion(struct hinic3_mbox *mbox,</div><div class='add'>+				    u32 timeout)</div><div class='add'>+{</div><div class='add'>+	u32 wait_time;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	wait_time = (timeout != 0) ? timeout : MBOX_COMP_POLLING_TIMEOUT_MS;</div><div class='add'>+	err = hinic3_wait_for_timeout(mbox, check_mbox_msg_finish,</div><div class='add'>+				      wait_time, USEC_PER_MSEC);</div><div class='add'>+	if (err) {</div><div class='add'>+		set_mbox_to_func_event(mbox, MBOX_EVENT_TIMEOUT);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	set_mbox_to_func_event(mbox, MBOX_EVENT_END);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_send_mbox_to_mgmt(struct hinic3_hwdev *hwdev, u8 mod, u16 cmd,</div><div class='add'>+			     const struct mgmt_msg_params *msg_params)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_mbox *mbox = hwdev-&gt;mbox;</div><div class='add'>+	struct mbox_msg_info msg_info = {};</div><div class='add'>+	struct hinic3_msg_desc *msg_desc;</div><div class='add'>+	u32 msg_len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* expect response message */</div><div class='add'>+	msg_desc = get_mbox_msg_desc(mbox, MBOX_MSG_RESP, MBOX_MGMT_FUNC_ID);</div><div class='add'>+	mutex_lock(&amp;mbox-&gt;mbox_send_lock);</div><div class='add'>+	msg_info.msg_id = (mbox-&gt;send_msg_id + 1) &amp; 0xF;</div><div class='add'>+	mbox-&gt;send_msg_id = msg_info.msg_id;</div><div class='add'>+	set_mbox_to_func_event(mbox, MBOX_EVENT_START);</div><div class='add'>+</div><div class='add'>+	err = send_mbox_msg(mbox, mod, cmd, msg_params-&gt;buf_in,</div><div class='add'>+			    msg_params-&gt;in_size, MBOX_MGMT_FUNC_ID,</div><div class='add'>+			    MBOX_MSG_SEND, MBOX_MSG_ACK, &amp;msg_info);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Send mailbox mod %u, cmd %u failed, msg_id: %u, err: %d\n",</div><div class='add'>+			mod, cmd, msg_info.msg_id, err);</div><div class='add'>+		set_mbox_to_func_event(mbox, MBOX_EVENT_FAIL);</div><div class='add'>+		goto err_send;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (wait_mbox_msg_completion(mbox, msg_params-&gt;timeout_ms)) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Send mbox msg timeout, msg_id: %u\n", msg_info.msg_id);</div><div class='add'>+		err = -ETIMEDOUT;</div><div class='add'>+		goto err_send;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mod != msg_desc-&gt;mod || cmd != le16_to_cpu(msg_desc-&gt;cmd)) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Invalid response mbox message, mod: 0x%x, cmd: 0x%x, expect mod: 0x%x, cmd: 0x%x\n",</div><div class='add'>+			msg_desc-&gt;mod, msg_desc-&gt;cmd, mod, cmd);</div><div class='add'>+		err = -EFAULT;</div><div class='add'>+		goto err_send;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (msg_desc-&gt;msg_info.status) {</div><div class='add'>+		err = msg_desc-&gt;msg_info.status;</div><div class='add'>+		goto err_send;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (msg_params-&gt;buf_out) {</div><div class='add'>+		msg_len = le16_to_cpu(msg_desc-&gt;msg_len);</div><div class='add'>+		if (msg_len != msg_params-&gt;expected_out_size) {</div><div class='add'>+			dev_err(hwdev-&gt;dev,</div><div class='add'>+				"Invalid response mbox message length: %u for mod %d cmd %u, expected length: %u\n",</div><div class='add'>+				msg_desc-&gt;msg_len, mod, cmd,</div><div class='add'>+				msg_params-&gt;expected_out_size);</div><div class='add'>+			err = -EFAULT;</div><div class='add'>+			goto err_send;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		memcpy(msg_params-&gt;buf_out, msg_desc-&gt;msg, msg_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_send:</div><div class='add'>+	mutex_unlock(&amp;mbox-&gt;mbox_send_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_send_mbox_to_mgmt_no_ack(struct hinic3_hwdev *hwdev, u8 mod, u16 cmd,</div><div class='add'>+				    const struct mgmt_msg_params *msg_params)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_mbox *mbox = hwdev-&gt;mbox;</div><div class='add'>+	struct mbox_msg_info msg_info = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mbox-&gt;mbox_send_lock);</div><div class='add'>+	err = send_mbox_msg(mbox, mod, cmd, msg_params-&gt;buf_in,</div><div class='add'>+			    msg_params-&gt;in_size, MBOX_MGMT_FUNC_ID,</div><div class='add'>+			    MBOX_MSG_SEND, MBOX_MSG_NO_ACK, &amp;msg_info);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Send mailbox no ack failed\n");</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mbox-&gt;mbox_send_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h b/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h<br/>new file mode 100644<br/>index 000000000000..e71629e95086<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h</a></div><div class='hunk'>@@ -0,0 +1,141 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_MBOX_H_</div><div class='add'>+#define _HINIC3_MBOX_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+</div><div class='add'>+struct hinic3_hwdev;</div><div class='add'>+struct mgmt_msg_params;</div><div class='add'>+</div><div class='add'>+#define MBOX_MSG_HEADER_SRC_GLB_FUNC_IDX_MASK  GENMASK_ULL(12, 0)</div><div class='add'>+#define MBOX_MSG_HEADER_STATUS_MASK            BIT_ULL(13)</div><div class='add'>+#define MBOX_MSG_HEADER_SOURCE_MASK            BIT_ULL(15)</div><div class='add'>+#define MBOX_MSG_HEADER_AEQ_ID_MASK            GENMASK_ULL(17, 16)</div><div class='add'>+#define MBOX_MSG_HEADER_MSG_ID_MASK            GENMASK_ULL(21, 18)</div><div class='add'>+#define MBOX_MSG_HEADER_CMD_MASK               GENMASK_ULL(31, 22)</div><div class='add'>+#define MBOX_MSG_HEADER_MSG_LEN_MASK           GENMASK_ULL(42, 32)</div><div class='add'>+#define MBOX_MSG_HEADER_MODULE_MASK            GENMASK_ULL(47, 43)</div><div class='add'>+#define MBOX_MSG_HEADER_SEG_LEN_MASK           GENMASK_ULL(53, 48)</div><div class='add'>+#define MBOX_MSG_HEADER_NO_ACK_MASK            BIT_ULL(54)</div><div class='add'>+#define MBOX_MSG_HEADER_DATA_TYPE_MASK         BIT_ULL(55)</div><div class='add'>+#define MBOX_MSG_HEADER_SEQID_MASK             GENMASK_ULL(61, 56)</div><div class='add'>+#define MBOX_MSG_HEADER_LAST_MASK              BIT_ULL(62)</div><div class='add'>+#define MBOX_MSG_HEADER_DIRECTION_MASK         BIT_ULL(63)</div><div class='add'>+</div><div class='add'>+#define MBOX_MSG_HEADER_SET(val, member) \</div><div class='add'>+	FIELD_PREP(MBOX_MSG_HEADER_##member##_MASK, val)</div><div class='add'>+#define MBOX_MSG_HEADER_GET(val, member) \</div><div class='add'>+	FIELD_GET(MBOX_MSG_HEADER_##member##_MASK, le64_to_cpu(val))</div><div class='add'>+</div><div class='add'>+/* identifies if a segment belongs to a message or to a response. A VF is only</div><div class='add'>+ * expected to send messages and receive responses. PF driver could receive</div><div class='add'>+ * messages and send responses.</div><div class='add'>+ */</div><div class='add'>+enum mbox_msg_direction_type {</div><div class='add'>+	MBOX_MSG_SEND = 0,</div><div class='add'>+	MBOX_MSG_RESP = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Indicates if mbox message expects a response (ack) or not */</div><div class='add'>+enum mbox_msg_ack_type {</div><div class='add'>+	MBOX_MSG_ACK    = 0,</div><div class='add'>+	MBOX_MSG_NO_ACK = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mbox_msg_data_type {</div><div class='add'>+	MBOX_MSG_DATA_INLINE = 0,</div><div class='add'>+	MBOX_MSG_DATA_DMA    = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mbox_msg_src_type {</div><div class='add'>+	MBOX_MSG_FROM_MBOX = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mbox_msg_aeq_type {</div><div class='add'>+	MBOX_MSG_AEQ_FOR_EVENT = 0,</div><div class='add'>+	MBOX_MSG_AEQ_FOR_MBOX  = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HINIC3_MBOX_WQ_NAME  "hinic3_mbox"</div><div class='add'>+</div><div class='add'>+struct mbox_msg_info {</div><div class='add'>+	u8 msg_id;</div><div class='add'>+	u8 status;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_msg_desc {</div><div class='add'>+	u8                   *msg;</div><div class='add'>+	__le16               msg_len;</div><div class='add'>+	u8                   seq_id;</div><div class='add'>+	u8                   mod;</div><div class='add'>+	__le16               cmd;</div><div class='add'>+	struct mbox_msg_info msg_info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_msg_channel {</div><div class='add'>+	struct   hinic3_msg_desc resp_msg;</div><div class='add'>+	struct   hinic3_msg_desc recv_msg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_send_mbox {</div><div class='add'>+	u8 __iomem *data;</div><div class='add'>+	void       *wb_vaddr;</div><div class='add'>+	dma_addr_t wb_paddr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mbox_event_state {</div><div class='add'>+	MBOX_EVENT_START   = 0,</div><div class='add'>+	MBOX_EVENT_FAIL    = 1,</div><div class='add'>+	MBOX_EVENT_SUCCESS = 2,</div><div class='add'>+	MBOX_EVENT_TIMEOUT = 3,</div><div class='add'>+	MBOX_EVENT_END     = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mbox_dma_msg {</div><div class='add'>+	__le32 xor;</div><div class='add'>+	__le32 dma_addr_high;</div><div class='add'>+	__le32 dma_addr_low;</div><div class='add'>+	__le32 msg_len;</div><div class='add'>+	__le64 rsvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mbox_dma_queue {</div><div class='add'>+	void       *dma_buf_vaddr;</div><div class='add'>+	dma_addr_t dma_buf_paddr;</div><div class='add'>+	u16        depth;</div><div class='add'>+	u16        prod_idx;</div><div class='add'>+	u16        cons_idx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_mbox {</div><div class='add'>+	struct hinic3_hwdev       *hwdev;</div><div class='add'>+	/* lock for send mbox message and ack message */</div><div class='add'>+	struct mutex              mbox_send_lock;</div><div class='add'>+	struct hinic3_send_mbox   send_mbox;</div><div class='add'>+	struct mbox_dma_queue     sync_msg_queue;</div><div class='add'>+	struct mbox_dma_queue     async_msg_queue;</div><div class='add'>+	struct workqueue_struct   *workq;</div><div class='add'>+	/* driver and MGMT CPU */</div><div class='add'>+	struct hinic3_msg_channel mgmt_msg;</div><div class='add'>+	/* VF to PF */</div><div class='add'>+	struct hinic3_msg_channel *func_msg;</div><div class='add'>+	u8                        send_msg_id;</div><div class='add'>+	enum mbox_event_state     event_flag;</div><div class='add'>+	/* lock for mbox event flag */</div><div class='add'>+	spinlock_t                mbox_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void hinic3_mbox_func_aeqe_handler(struct hinic3_hwdev *hwdev, u8 *header,</div><div class='add'>+				   u8 size);</div><div class='add'>+int hinic3_init_mbox(struct hinic3_hwdev *hwdev);</div><div class='add'>+void hinic3_free_mbox(struct hinic3_hwdev *hwdev);</div><div class='add'>+</div><div class='add'>+int hinic3_send_mbox_to_mgmt(struct hinic3_hwdev *hwdev, u8 mod, u16 cmd,</div><div class='add'>+			     const struct mgmt_msg_params *msg_params);</div><div class='add'>+int hinic3_send_mbox_to_mgmt_no_ack(struct hinic3_hwdev *hwdev, u8 mod, u16 cmd,</div><div class='add'>+				    const struct mgmt_msg_params *msg_params);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.c b/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.c<br/>new file mode 100644<br/>index 000000000000..c38d10cd7fac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.c</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include "hinic3_eqs.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_mbox.h"</div><div class='add'>+#include "hinic3_mgmt.h"</div><div class='add'>+</div><div class='add'>+void hinic3_flush_mgmt_workq(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	if (hwdev-&gt;aeqs)</div><div class='add'>+		flush_workqueue(hwdev-&gt;aeqs-&gt;workq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_mgmt_msg_aeqe_handler(struct hinic3_hwdev *hwdev, u8 *header,</div><div class='add'>+				  u8 size)</div><div class='add'>+{</div><div class='add'>+	if (MBOX_MSG_HEADER_GET(*(__force __le64 *)header, SOURCE) ==</div><div class='add'>+				MBOX_MSG_FROM_MBOX)</div><div class='add'>+		hinic3_mbox_func_aeqe_handler(hwdev, header, size);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.h b/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.h<br/>new file mode 100644<br/>index 000000000000..bbef3b32a6ec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.h</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_MGMT_H_</div><div class='add'>+#define _HINIC3_MGMT_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct hinic3_hwdev;</div><div class='add'>+</div><div class='add'>+void hinic3_flush_mgmt_workq(struct hinic3_hwdev *hwdev);</div><div class='add'>+void hinic3_mgmt_msg_aeqe_handler(struct hinic3_hwdev *hwdev,</div><div class='add'>+				  u8 *header, u8 size);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h b/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h<br/>new file mode 100644<br/>index 000000000000..6cc0345c39e4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h</a></div><div class='hunk'>@@ -0,0 +1,224 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_MGMT_INTERFACE_H_</div><div class='add'>+#define _HINIC3_MGMT_INTERFACE_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hw_intf.h"</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_feature_nego {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u8                   opcode;</div><div class='add'>+	u8                   rsvd;</div><div class='add'>+	u64                  s_feature[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum l2nic_func_tbl_cfg_bitmap {</div><div class='add'>+	L2NIC_FUNC_TBL_CFG_INIT        = 0,</div><div class='add'>+	L2NIC_FUNC_TBL_CFG_RX_BUF_SIZE = 1,</div><div class='add'>+	L2NIC_FUNC_TBL_CFG_MTU         = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_func_tbl_cfg {</div><div class='add'>+	u16 rx_wqe_buf_size;</div><div class='add'>+	u16 mtu;</div><div class='add'>+	u32 rsvd[9];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_set_func_tbl {</div><div class='add'>+	struct mgmt_msg_head      msg_head;</div><div class='add'>+	u16                       func_id;</div><div class='add'>+	u16                       rsvd;</div><div class='add'>+	u32                       cfg_bitmap;</div><div class='add'>+	struct l2nic_func_tbl_cfg tbl_cfg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_set_mac {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u16                  vlan_id;</div><div class='add'>+	u16                  rsvd1;</div><div class='add'>+	u8                   mac[ETH_ALEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_update_mac {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u16                  vlan_id;</div><div class='add'>+	u16                  rsvd1;</div><div class='add'>+	u8                   old_mac[ETH_ALEN];</div><div class='add'>+	u16                  rsvd2;</div><div class='add'>+	u8                   new_mac[ETH_ALEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_set_ci_attr {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u16                  func_idx;</div><div class='add'>+	u8                   dma_attr_off;</div><div class='add'>+	u8                   pending_limit;</div><div class='add'>+	u8                   coalescing_time;</div><div class='add'>+	u8                   intr_en;</div><div class='add'>+	u16                  intr_idx;</div><div class='add'>+	u32                  l2nic_sqn;</div><div class='add'>+	u32                  rsvd;</div><div class='add'>+	u64                  ci_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_clear_qp_resource {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u16                  rsvd1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_force_pkt_drop {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u8                   port;</div><div class='add'>+	u8                   rsvd1[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_set_vport_state {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u16                  rsvd1;</div><div class='add'>+	/* 0--disable, 1--enable */</div><div class='add'>+	u8                   state;</div><div class='add'>+	u8                   rsvd2[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_set_dcb_state {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	/* 0 - get dcb state, 1 - set dcb state */</div><div class='add'>+	u8                   op_code;</div><div class='add'>+	/* 0 - disable, 1 - enable dcb */</div><div class='add'>+	u8                   state;</div><div class='add'>+	/* 0 - disable, 1 - enable dcb */</div><div class='add'>+	u8                   port_state;</div><div class='add'>+	u8                   rsvd[7];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define L2NIC_RSS_TYPE_VALID_MASK         BIT(23)</div><div class='add'>+#define L2NIC_RSS_TYPE_TCP_IPV6_EXT_MASK  BIT(24)</div><div class='add'>+#define L2NIC_RSS_TYPE_IPV6_EXT_MASK      BIT(25)</div><div class='add'>+#define L2NIC_RSS_TYPE_TCP_IPV6_MASK      BIT(26)</div><div class='add'>+#define L2NIC_RSS_TYPE_IPV6_MASK          BIT(27)</div><div class='add'>+#define L2NIC_RSS_TYPE_TCP_IPV4_MASK      BIT(28)</div><div class='add'>+#define L2NIC_RSS_TYPE_IPV4_MASK          BIT(29)</div><div class='add'>+#define L2NIC_RSS_TYPE_UDP_IPV6_MASK      BIT(30)</div><div class='add'>+#define L2NIC_RSS_TYPE_UDP_IPV4_MASK      BIT(31)</div><div class='add'>+#define L2NIC_RSS_TYPE_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(L2NIC_RSS_TYPE_##member##_MASK, val)</div><div class='add'>+#define L2NIC_RSS_TYPE_GET(val, member)  \</div><div class='add'>+	FIELD_GET(L2NIC_RSS_TYPE_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define L2NIC_RSS_INDIR_SIZE  256</div><div class='add'>+#define L2NIC_RSS_KEY_SIZE    40</div><div class='add'>+</div><div class='add'>+/* IEEE 802.1Qaz std */</div><div class='add'>+#define L2NIC_DCB_COS_MAX     0x8</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_set_rss_ctx_tbl {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u16                  rsvd1;</div><div class='add'>+	u32                  context;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_cfg_rss_engine {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u8                   opcode;</div><div class='add'>+	u8                   hash_engine;</div><div class='add'>+	u8                   rsvd1[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_cfg_rss_hash_key {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u8                   opcode;</div><div class='add'>+	u8                   rsvd1;</div><div class='add'>+	u8                   key[L2NIC_RSS_KEY_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_cfg_rss {</div><div class='add'>+	struct mgmt_msg_head msg_head;</div><div class='add'>+	u16                  func_id;</div><div class='add'>+	u8                   rss_en;</div><div class='add'>+	u8                   rq_priority_number;</div><div class='add'>+	u8                   prio_tc[L2NIC_DCB_COS_MAX];</div><div class='add'>+	u16                  num_qps;</div><div class='add'>+	u16                  rsvd1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Commands between NIC to fw */</div><div class='add'>+enum l2nic_cmd {</div><div class='add'>+	/* FUNC CFG */</div><div class='add'>+	L2NIC_CMD_SET_FUNC_TBL        = 5,</div><div class='add'>+	L2NIC_CMD_SET_VPORT_ENABLE    = 6,</div><div class='add'>+	L2NIC_CMD_SET_SQ_CI_ATTR      = 8,</div><div class='add'>+	L2NIC_CMD_CLEAR_QP_RESOURCE   = 11,</div><div class='add'>+	L2NIC_CMD_FEATURE_NEGO        = 15,</div><div class='add'>+	L2NIC_CMD_SET_MAC             = 21,</div><div class='add'>+	L2NIC_CMD_DEL_MAC             = 22,</div><div class='add'>+	L2NIC_CMD_UPDATE_MAC          = 23,</div><div class='add'>+	L2NIC_CMD_CFG_RSS             = 60,</div><div class='add'>+	L2NIC_CMD_CFG_RSS_HASH_KEY    = 63,</div><div class='add'>+	L2NIC_CMD_CFG_RSS_HASH_ENGINE = 64,</div><div class='add'>+	L2NIC_CMD_SET_RSS_CTX_TBL     = 65,</div><div class='add'>+	L2NIC_CMD_QOS_DCB_STATE       = 110,</div><div class='add'>+	L2NIC_CMD_FORCE_PKT_DROP      = 113,</div><div class='add'>+	L2NIC_CMD_MAX                 = 256,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct l2nic_cmd_rss_set_indir_tbl {</div><div class='add'>+	__le32 rsvd[4];</div><div class='add'>+	__le16 entry[L2NIC_RSS_INDIR_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* NIC CMDQ MODE */</div><div class='add'>+enum l2nic_ucode_cmd {</div><div class='add'>+	L2NIC_UCODE_CMD_MODIFY_QUEUE_CTX  = 0,</div><div class='add'>+	L2NIC_UCODE_CMD_CLEAN_QUEUE_CTX   = 1,</div><div class='add'>+	L2NIC_UCODE_CMD_SET_RSS_INDIR_TBL = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* hilink mac group command */</div><div class='add'>+enum mag_cmd {</div><div class='add'>+	MAG_CMD_GET_LINK_STATUS = 7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* firmware also use this cmd report link event to driver */</div><div class='add'>+struct mag_cmd_get_link_status {</div><div class='add'>+	struct mgmt_msg_head head;</div><div class='add'>+	u8                   port_id;</div><div class='add'>+	/* 0:link down  1:link up */</div><div class='add'>+	u8                   status;</div><div class='add'>+	u8                   rsvd0[2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_nic_feature_cap {</div><div class='add'>+	HINIC3_NIC_F_CSUM           = BIT(0),</div><div class='add'>+	HINIC3_NIC_F_SCTP_CRC       = BIT(1),</div><div class='add'>+	HINIC3_NIC_F_TSO            = BIT(2),</div><div class='add'>+	HINIC3_NIC_F_LRO            = BIT(3),</div><div class='add'>+	HINIC3_NIC_F_UFO            = BIT(4),</div><div class='add'>+	HINIC3_NIC_F_RSS            = BIT(5),</div><div class='add'>+	HINIC3_NIC_F_RX_VLAN_FILTER = BIT(6),</div><div class='add'>+	HINIC3_NIC_F_RX_VLAN_STRIP  = BIT(7),</div><div class='add'>+	HINIC3_NIC_F_TX_VLAN_INSERT = BIT(8),</div><div class='add'>+	HINIC3_NIC_F_VXLAN_OFFLOAD  = BIT(9),</div><div class='add'>+	HINIC3_NIC_F_FDIR           = BIT(11),</div><div class='add'>+	HINIC3_NIC_F_PROMISC        = BIT(12),</div><div class='add'>+	HINIC3_NIC_F_ALLMULTI       = BIT(13),</div><div class='add'>+	HINIC3_NIC_F_RATE_LIMIT     = BIT(16),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HINIC3_NIC_F_ALL_MASK           0x33bff</div><div class='add'>+#define HINIC3_NIC_DRV_DEFAULT_FEATURE  0x3f03f</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c b/drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c<br/>new file mode 100644<br/>index 000000000000..bbf22811a029<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c</a></div><div class='hunk'>@@ -0,0 +1,496 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_nic_cfg.h"</div><div class='add'>+#include "hinic3_nic_dev.h"</div><div class='add'>+#include "hinic3_nic_io.h"</div><div class='add'>+#include "hinic3_rss.h"</div><div class='add'>+#include "hinic3_rx.h"</div><div class='add'>+#include "hinic3_tx.h"</div><div class='add'>+</div><div class='add'>+/* try to modify the number of irq to the target number,</div><div class='add'>+ * and return the actual number of irq.</div><div class='add'>+ */</div><div class='add'>+static u16 hinic3_qp_irq_change(struct net_device *netdev,</div><div class='add'>+				u16 dst_num_qp_irq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct msix_entry *qps_msix_entries;</div><div class='add'>+	u16 resp_irq_num, irq_num_gap, i;</div><div class='add'>+	u16 idx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	qps_msix_entries = nic_dev-&gt;qps_msix_entries;</div><div class='add'>+	if (dst_num_qp_irq &gt; nic_dev-&gt;num_qp_irq) {</div><div class='add'>+		irq_num_gap = dst_num_qp_irq - nic_dev-&gt;num_qp_irq;</div><div class='add'>+		err = hinic3_alloc_irqs(nic_dev-&gt;hwdev, irq_num_gap,</div><div class='add'>+					&amp;qps_msix_entries[nic_dev-&gt;num_qp_irq],</div><div class='add'>+					&amp;resp_irq_num);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(netdev, "Failed to alloc irqs\n");</div><div class='add'>+			return nic_dev-&gt;num_qp_irq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nic_dev-&gt;num_qp_irq += resp_irq_num;</div><div class='add'>+	} else if (dst_num_qp_irq &lt; nic_dev-&gt;num_qp_irq) {</div><div class='add'>+		irq_num_gap = nic_dev-&gt;num_qp_irq - dst_num_qp_irq;</div><div class='add'>+		for (i = 0; i &lt; irq_num_gap; i++) {</div><div class='add'>+			idx = (nic_dev-&gt;num_qp_irq - i) - 1;</div><div class='add'>+			hinic3_free_irq(nic_dev-&gt;hwdev,</div><div class='add'>+					qps_msix_entries[idx].vector);</div><div class='add'>+			qps_msix_entries[idx].vector = 0;</div><div class='add'>+			qps_msix_entries[idx].entry = 0;</div><div class='add'>+		}</div><div class='add'>+		nic_dev-&gt;num_qp_irq = dst_num_qp_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return nic_dev-&gt;num_qp_irq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_config_num_qps(struct net_device *netdev,</div><div class='add'>+				  struct hinic3_dyna_txrxq_params *q_params)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	u16 alloc_num_irq, cur_num_irq;</div><div class='add'>+	u16 dst_num_irq;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(HINIC3_RSS_ENABLE, &amp;nic_dev-&gt;flags))</div><div class='add'>+		q_params-&gt;num_qps = 1;</div><div class='add'>+</div><div class='add'>+	if (nic_dev-&gt;num_qp_irq &gt;= q_params-&gt;num_qps)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	cur_num_irq = nic_dev-&gt;num_qp_irq;</div><div class='add'>+</div><div class='add'>+	alloc_num_irq = hinic3_qp_irq_change(netdev, q_params-&gt;num_qps);</div><div class='add'>+	if (alloc_num_irq &lt; q_params-&gt;num_qps) {</div><div class='add'>+		q_params-&gt;num_qps = alloc_num_irq;</div><div class='add'>+		netdev_warn(netdev, "Can not get enough irqs, adjust num_qps to %u\n",</div><div class='add'>+			    q_params-&gt;num_qps);</div><div class='add'>+</div><div class='add'>+		/* The current irq may be in use, we must keep it */</div><div class='add'>+		dst_num_irq = max_t(u16, cur_num_irq, q_params-&gt;num_qps);</div><div class='add'>+		hinic3_qp_irq_change(netdev, dst_num_irq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	netdev_dbg(netdev, "No need to change irqs, num_qps is %u\n",</div><div class='add'>+		   q_params-&gt;num_qps);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_setup_num_qps(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;num_qp_irq = 0;</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;qps_msix_entries = kcalloc(nic_dev-&gt;max_qps,</div><div class='add'>+					    sizeof(struct msix_entry),</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+	if (!nic_dev-&gt;qps_msix_entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hinic3_config_num_qps(netdev, &amp;nic_dev-&gt;q_params);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_destroy_num_qps(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nic_dev-&gt;num_qp_irq; i++)</div><div class='add'>+		hinic3_free_irq(nic_dev-&gt;hwdev,</div><div class='add'>+				nic_dev-&gt;qps_msix_entries[i].vector);</div><div class='add'>+</div><div class='add'>+	kfree(nic_dev-&gt;qps_msix_entries);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_alloc_txrxq_resources(struct net_device *netdev,</div><div class='add'>+					struct hinic3_dyna_txrxq_params *q_params)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	q_params-&gt;txqs_res = kcalloc(q_params-&gt;num_qps,</div><div class='add'>+				     sizeof(*q_params-&gt;txqs_res), GFP_KERNEL);</div><div class='add'>+	if (!q_params-&gt;txqs_res)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	q_params-&gt;rxqs_res = kcalloc(q_params-&gt;num_qps,</div><div class='add'>+				     sizeof(*q_params-&gt;rxqs_res), GFP_KERNEL);</div><div class='add'>+	if (!q_params-&gt;rxqs_res) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_free_txqs_res_arr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	q_params-&gt;irq_cfg = kcalloc(q_params-&gt;num_qps,</div><div class='add'>+				    sizeof(*q_params-&gt;irq_cfg), GFP_KERNEL);</div><div class='add'>+	if (!q_params-&gt;irq_cfg) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_free_rxqs_res_arr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_txqs_res(netdev, q_params-&gt;num_qps,</div><div class='add'>+				    q_params-&gt;sq_depth, q_params-&gt;txqs_res);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to alloc txqs resource\n");</div><div class='add'>+		goto err_free_irq_cfg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_rxqs_res(netdev, q_params-&gt;num_qps,</div><div class='add'>+				    q_params-&gt;rq_depth, q_params-&gt;rxqs_res);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to alloc rxqs resource\n");</div><div class='add'>+		goto err_free_txqs_res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_txqs_res:</div><div class='add'>+	hinic3_free_txqs_res(netdev, q_params-&gt;num_qps, q_params-&gt;sq_depth,</div><div class='add'>+			     q_params-&gt;txqs_res);</div><div class='add'>+err_free_irq_cfg:</div><div class='add'>+	kfree(q_params-&gt;irq_cfg);</div><div class='add'>+	q_params-&gt;irq_cfg = NULL;</div><div class='add'>+err_free_rxqs_res_arr:</div><div class='add'>+	kfree(q_params-&gt;rxqs_res);</div><div class='add'>+	q_params-&gt;rxqs_res = NULL;</div><div class='add'>+err_free_txqs_res_arr:</div><div class='add'>+	kfree(q_params-&gt;txqs_res);</div><div class='add'>+	q_params-&gt;txqs_res = NULL;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_free_txrxq_resources(struct net_device *netdev,</div><div class='add'>+					struct hinic3_dyna_txrxq_params *q_params)</div><div class='add'>+{</div><div class='add'>+	hinic3_free_rxqs_res(netdev, q_params-&gt;num_qps, q_params-&gt;rq_depth,</div><div class='add'>+			     q_params-&gt;rxqs_res);</div><div class='add'>+	hinic3_free_txqs_res(netdev, q_params-&gt;num_qps, q_params-&gt;sq_depth,</div><div class='add'>+			     q_params-&gt;txqs_res);</div><div class='add'>+</div><div class='add'>+	kfree(q_params-&gt;irq_cfg);</div><div class='add'>+	q_params-&gt;irq_cfg = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(q_params-&gt;rxqs_res);</div><div class='add'>+	q_params-&gt;rxqs_res = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(q_params-&gt;txqs_res);</div><div class='add'>+	q_params-&gt;txqs_res = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_configure_txrxqs(struct net_device *netdev,</div><div class='add'>+				   struct hinic3_dyna_txrxq_params *q_params)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_configure_txqs(netdev, q_params-&gt;num_qps,</div><div class='add'>+				    q_params-&gt;sq_depth, q_params-&gt;txqs_res);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to configure txqs\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_configure_rxqs(netdev, q_params-&gt;num_qps,</div><div class='add'>+				    q_params-&gt;rq_depth, q_params-&gt;rxqs_res);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to configure rxqs\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_configure(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;min_mtu = HINIC3_MIN_MTU_SIZE;</div><div class='add'>+	netdev-&gt;max_mtu = HINIC3_MAX_JUMBO_FRAME_SIZE;</div><div class='add'>+	err = hinic3_set_port_mtu(netdev, netdev-&gt;mtu);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to set mtu\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Ensure DCB is disabled */</div><div class='add'>+	hinic3_sync_dcb_state(nic_dev-&gt;hwdev, 1, 0);</div><div class='add'>+</div><div class='add'>+	if (test_bit(HINIC3_RSS_ENABLE, &amp;nic_dev-&gt;flags)) {</div><div class='add'>+		err = hinic3_rss_init(netdev);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(netdev, "Failed to init rss\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_remove_configure(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (test_bit(HINIC3_RSS_ENABLE, &amp;nic_dev-&gt;flags))</div><div class='add'>+		hinic3_rss_uninit(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_alloc_channel_resources(struct net_device *netdev,</div><div class='add'>+					  struct hinic3_dyna_qp_params *qp_params,</div><div class='add'>+					  struct hinic3_dyna_txrxq_params *trxq_params)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	qp_params-&gt;num_qps = trxq_params-&gt;num_qps;</div><div class='add'>+	qp_params-&gt;sq_depth = trxq_params-&gt;sq_depth;</div><div class='add'>+	qp_params-&gt;rq_depth = trxq_params-&gt;rq_depth;</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_qps(nic_dev, qp_params);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to alloc qps\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_txrxq_resources(netdev, trxq_params);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to alloc txrxq resources\n");</div><div class='add'>+		hinic3_free_qps(nic_dev, qp_params);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_free_channel_resources(struct net_device *netdev,</div><div class='add'>+					  struct hinic3_dyna_qp_params *qp_params,</div><div class='add'>+					  struct hinic3_dyna_txrxq_params *trxq_params)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	hinic3_free_txrxq_resources(netdev, trxq_params);</div><div class='add'>+	hinic3_free_qps(nic_dev, qp_params);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_open_channel(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_qp_ctxts(nic_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to init qps\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_configure_txrxqs(netdev, &amp;nic_dev-&gt;q_params);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to configure txrxqs\n");</div><div class='add'>+		goto err_free_qp_ctxts;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_qps_irq_init(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to init txrxq irq\n");</div><div class='add'>+		goto err_free_qp_ctxts;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_configure(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to configure device resources\n");</div><div class='add'>+		goto err_uninit_qps_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_uninit_qps_irq:</div><div class='add'>+	hinic3_qps_irq_uninit(netdev);</div><div class='add'>+err_free_qp_ctxts:</div><div class='add'>+	hinic3_free_qp_ctxts(nic_dev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_close_channel(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	hinic3_remove_configure(netdev);</div><div class='add'>+	hinic3_qps_irq_uninit(netdev);</div><div class='add'>+	hinic3_free_qp_ctxts(nic_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_vport_up(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	bool link_status_up;</div><div class='add'>+	u16 glb_func_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	glb_func_id = hinic3_global_func_id(nic_dev-&gt;hwdev);</div><div class='add'>+	err = hinic3_set_vport_enable(nic_dev-&gt;hwdev, glb_func_id, true);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to enable vport\n");</div><div class='add'>+		goto err_flush_qps_res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = netif_set_real_num_queues(netdev, nic_dev-&gt;q_params.num_qps,</div><div class='add'>+					nic_dev-&gt;q_params.num_qps);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to set real number of queues\n");</div><div class='add'>+		goto err_flush_qps_res;</div><div class='add'>+	}</div><div class='add'>+	netif_tx_start_all_queues(netdev);</div><div class='add'>+</div><div class='add'>+	err = hinic3_get_link_status(nic_dev-&gt;hwdev, &amp;link_status_up);</div><div class='add'>+	if (!err &amp;&amp; link_status_up)</div><div class='add'>+		netif_carrier_on(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_flush_qps_res:</div><div class='add'>+	hinic3_flush_qps_res(nic_dev-&gt;hwdev);</div><div class='add'>+	/* wait to guarantee that no packets will be sent to host */</div><div class='add'>+	msleep(100);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_vport_down(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	u16 glb_func_id;</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(netdev);</div><div class='add'>+	netif_tx_disable(netdev);</div><div class='add'>+</div><div class='add'>+	glb_func_id = hinic3_global_func_id(nic_dev-&gt;hwdev);</div><div class='add'>+	hinic3_set_vport_enable(nic_dev-&gt;hwdev, glb_func_id, false);</div><div class='add'>+</div><div class='add'>+	hinic3_flush_txqs(netdev);</div><div class='add'>+	/* wait to guarantee that no packets will be sent to host */</div><div class='add'>+	msleep(100);</div><div class='add'>+	hinic3_flush_qps_res(nic_dev-&gt;hwdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_dyna_qp_params qp_params;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_nicio_res(nic_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to init nicio resources\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_setup_num_qps(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to setup num_qps\n");</div><div class='add'>+		goto err_free_nicio_res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_channel_resources(netdev, &amp;qp_params,</div><div class='add'>+					     &amp;nic_dev-&gt;q_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_destroy_num_qps;</div><div class='add'>+</div><div class='add'>+	hinic3_init_qps(nic_dev, &amp;qp_params);</div><div class='add'>+</div><div class='add'>+	err = hinic3_open_channel(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_uninit_qps;</div><div class='add'>+</div><div class='add'>+	err = hinic3_vport_up(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_close_channel;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_close_channel:</div><div class='add'>+	hinic3_close_channel(netdev);</div><div class='add'>+err_uninit_qps:</div><div class='add'>+	hinic3_uninit_qps(nic_dev, &amp;qp_params);</div><div class='add'>+	hinic3_free_channel_resources(netdev, &amp;qp_params, &amp;nic_dev-&gt;q_params);</div><div class='add'>+err_destroy_num_qps:</div><div class='add'>+	hinic3_destroy_num_qps(netdev);</div><div class='add'>+err_free_nicio_res:</div><div class='add'>+	hinic3_free_nicio_res(nic_dev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_dyna_qp_params qp_params;</div><div class='add'>+</div><div class='add'>+	hinic3_vport_down(netdev);</div><div class='add'>+	hinic3_close_channel(netdev);</div><div class='add'>+	hinic3_uninit_qps(nic_dev, &amp;qp_params);</div><div class='add'>+	hinic3_free_channel_resources(netdev, &amp;qp_params, &amp;nic_dev-&gt;q_params);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_set_port_mtu(netdev, new_mtu);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to change port mtu to %d\n",</div><div class='add'>+			   new_mtu);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(netdev, "Change mtu from %u to %d\n", netdev-&gt;mtu, new_mtu);</div><div class='add'>+	WRITE_ONCE(netdev-&gt;mtu, new_mtu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_set_mac_addr(struct net_device *netdev, void *addr)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct sockaddr *saddr = addr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(saddr-&gt;sa_data))</div><div class='add'>+		return -EADDRNOTAVAIL;</div><div class='add'>+</div><div class='add'>+	if (ether_addr_equal(netdev-&gt;dev_addr, saddr-&gt;sa_data))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = hinic3_update_mac(nic_dev-&gt;hwdev, netdev-&gt;dev_addr,</div><div class='add'>+				saddr-&gt;sa_data, 0,</div><div class='add'>+				hinic3_global_func_id(nic_dev-&gt;hwdev));</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	eth_hw_addr_set(netdev, saddr-&gt;sa_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops hinic3_netdev_ops = {</div><div class='add'>+	.ndo_open             = hinic3_open,</div><div class='add'>+	.ndo_stop             = hinic3_close,</div><div class='add'>+	.ndo_change_mtu       = hinic3_change_mtu,</div><div class='add'>+	.ndo_set_mac_address  = hinic3_set_mac_addr,</div><div class='add'>+	.ndo_start_xmit       = hinic3_xmit_frame,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void hinic3_set_netdev_ops(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;hinic3_netdev_ops;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c b/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c<br/>new file mode 100644<br/>index 000000000000..979f47ca77f9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c</a></div><div class='hunk'>@@ -0,0 +1,385 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_mbox.h"</div><div class='add'>+#include "hinic3_nic_cfg.h"</div><div class='add'>+#include "hinic3_nic_dev.h"</div><div class='add'>+#include "hinic3_nic_io.h"</div><div class='add'>+</div><div class='add'>+static int hinic3_feature_nego(struct hinic3_hwdev *hwdev, u8 opcode,</div><div class='add'>+			       u64 *s_feature, u16 size)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_feature_nego feature_nego = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	feature_nego.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	feature_nego.opcode = opcode;</div><div class='add'>+	if (opcode == MGMT_MSG_CMD_OP_SET)</div><div class='add'>+		memcpy(feature_nego.s_feature, s_feature, size * sizeof(u64));</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;feature_nego,</div><div class='add'>+				     sizeof(feature_nego));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_FEATURE_NEGO, &amp;msg_params);</div><div class='add'>+	if (err || feature_nego.msg_head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to negotiate nic feature, err:%d, status: 0x%x\n",</div><div class='add'>+			err, feature_nego.msg_head.status);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (opcode == MGMT_MSG_CMD_OP_GET)</div><div class='add'>+		memcpy(s_feature, feature_nego.s_feature, size * sizeof(u64));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_get_nic_feature_from_hw(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	return hinic3_feature_nego(nic_dev-&gt;hwdev, MGMT_MSG_CMD_OP_GET,</div><div class='add'>+				   &amp;nic_dev-&gt;nic_io-&gt;feature_cap, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_nic_feature_to_hw(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	return hinic3_feature_nego(nic_dev-&gt;hwdev, MGMT_MSG_CMD_OP_SET,</div><div class='add'>+				   &amp;nic_dev-&gt;nic_io-&gt;feature_cap, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool hinic3_test_support(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+			 enum hinic3_nic_feature_cap feature_bits)</div><div class='add'>+{</div><div class='add'>+	return (nic_dev-&gt;nic_io-&gt;feature_cap &amp; feature_bits) == feature_bits;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_update_nic_feature(struct hinic3_nic_dev *nic_dev, u64 feature_cap)</div><div class='add'>+{</div><div class='add'>+	nic_dev-&gt;nic_io-&gt;feature_cap = feature_cap;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_set_function_table(struct hinic3_hwdev *hwdev, u32 cfg_bitmap,</div><div class='add'>+				     const struct l2nic_func_tbl_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_set_func_tbl cmd_func_tbl = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd_func_tbl.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	cmd_func_tbl.cfg_bitmap = cfg_bitmap;</div><div class='add'>+	cmd_func_tbl.tbl_cfg = *cfg;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;cmd_func_tbl,</div><div class='add'>+				     sizeof(cmd_func_tbl));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_SET_FUNC_TBL, &amp;msg_params);</div><div class='add'>+	if (err || cmd_func_tbl.msg_head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to set func table, bitmap: 0x%x, err: %d, status: 0x%x\n",</div><div class='add'>+			cfg_bitmap, err, cmd_func_tbl.msg_head.status);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_init_function_table(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+	struct l2nic_func_tbl_cfg func_tbl_cfg = {};</div><div class='add'>+	u32 cfg_bitmap;</div><div class='add'>+</div><div class='add'>+	func_tbl_cfg.mtu = 0x3FFF; /* default, max mtu */</div><div class='add'>+	func_tbl_cfg.rx_wqe_buf_size = nic_io-&gt;rx_buf_len;</div><div class='add'>+</div><div class='add'>+	cfg_bitmap = BIT(L2NIC_FUNC_TBL_CFG_INIT) |</div><div class='add'>+		     BIT(L2NIC_FUNC_TBL_CFG_MTU) |</div><div class='add'>+		     BIT(L2NIC_FUNC_TBL_CFG_RX_BUF_SIZE);</div><div class='add'>+</div><div class='add'>+	return hinic3_set_function_table(nic_dev-&gt;hwdev, cfg_bitmap,</div><div class='add'>+					 &amp;func_tbl_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_port_mtu(struct net_device *netdev, u16 new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct l2nic_func_tbl_cfg func_tbl_cfg = {};</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+</div><div class='add'>+	func_tbl_cfg.mtu = new_mtu;</div><div class='add'>+</div><div class='add'>+	return hinic3_set_function_table(hwdev, BIT(L2NIC_FUNC_TBL_CFG_MTU),</div><div class='add'>+					 &amp;func_tbl_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_check_mac_info(struct hinic3_hwdev *hwdev, u8 status,</div><div class='add'>+				 u16 vlan_id)</div><div class='add'>+{</div><div class='add'>+	if ((status &amp;&amp; status != MGMT_STATUS_EXIST) ||</div><div class='add'>+	    ((vlan_id &amp; BIT(15)) &amp;&amp; status == MGMT_STATUS_EXIST)) {</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_mac(struct hinic3_hwdev *hwdev, const u8 *mac_addr, u16 vlan_id,</div><div class='add'>+		   u16 func_id)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_set_mac mac_info = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if ((vlan_id &amp; HINIC3_VLAN_ID_MASK) &gt;= VLAN_N_VID) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Invalid VLAN number: %d\n",</div><div class='add'>+			(vlan_id &amp; HINIC3_VLAN_ID_MASK));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mac_info.func_id = func_id;</div><div class='add'>+	mac_info.vlan_id = vlan_id;</div><div class='add'>+	ether_addr_copy(mac_info.mac, mac_addr);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;mac_info, sizeof(mac_info));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_SET_MAC, &amp;msg_params);</div><div class='add'>+	if (err || hinic3_check_mac_info(hwdev, mac_info.msg_head.status,</div><div class='add'>+					 mac_info.vlan_id)) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to update MAC, err: %d, status: 0x%x\n",</div><div class='add'>+			err, mac_info.msg_head.status);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mac_info.msg_head.status == MGMT_STATUS_PF_SET_VF_ALREADY) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "PF has already set VF mac, Ignore set operation\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mac_info.msg_head.status == MGMT_STATUS_EXIST) {</div><div class='add'>+		dev_warn(hwdev-&gt;dev, "MAC is repeated. Ignore update operation\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_del_mac(struct hinic3_hwdev *hwdev, const u8 *mac_addr, u16 vlan_id,</div><div class='add'>+		   u16 func_id)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_set_mac mac_info = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if ((vlan_id &amp; HINIC3_VLAN_ID_MASK) &gt;= VLAN_N_VID) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Invalid VLAN number: %d\n",</div><div class='add'>+			(vlan_id &amp; HINIC3_VLAN_ID_MASK));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mac_info.func_id = func_id;</div><div class='add'>+	mac_info.vlan_id = vlan_id;</div><div class='add'>+	ether_addr_copy(mac_info.mac, mac_addr);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;mac_info, sizeof(mac_info));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_DEL_MAC, &amp;msg_params);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to delete MAC, err: %d, status: 0x%x\n",</div><div class='add'>+			err, mac_info.msg_head.status);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_update_mac(struct hinic3_hwdev *hwdev, const u8 *old_mac,</div><div class='add'>+		      u8 *new_mac, u16 vlan_id, u16 func_id)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_update_mac mac_info = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if ((vlan_id &amp; HINIC3_VLAN_ID_MASK) &gt;= VLAN_N_VID) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Invalid VLAN number: %d\n",</div><div class='add'>+			(vlan_id &amp; HINIC3_VLAN_ID_MASK));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mac_info.func_id = func_id;</div><div class='add'>+	mac_info.vlan_id = vlan_id;</div><div class='add'>+	ether_addr_copy(mac_info.old_mac, old_mac);</div><div class='add'>+	ether_addr_copy(mac_info.new_mac, new_mac);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;mac_info, sizeof(mac_info));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_UPDATE_MAC, &amp;msg_params);</div><div class='add'>+	if (err || hinic3_check_mac_info(hwdev, mac_info.msg_head.status,</div><div class='add'>+					 mac_info.vlan_id)) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to update MAC, err: %d, status: 0x%x\n",</div><div class='add'>+			err, mac_info.msg_head.status);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_ci_table(struct hinic3_hwdev *hwdev, struct hinic3_sq_attr *attr)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_set_ci_attr cons_idx_attr = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cons_idx_attr.func_idx = hinic3_global_func_id(hwdev);</div><div class='add'>+	cons_idx_attr.dma_attr_off  = attr-&gt;dma_attr_off;</div><div class='add'>+	cons_idx_attr.pending_limit = attr-&gt;pending_limit;</div><div class='add'>+	cons_idx_attr.coalescing_time  = attr-&gt;coalescing_time;</div><div class='add'>+</div><div class='add'>+	if (attr-&gt;intr_en) {</div><div class='add'>+		cons_idx_attr.intr_en = attr-&gt;intr_en;</div><div class='add'>+		cons_idx_attr.intr_idx = attr-&gt;intr_idx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cons_idx_attr.l2nic_sqn = attr-&gt;l2nic_sqn;</div><div class='add'>+	cons_idx_attr.ci_addr = attr-&gt;ci_dma_base;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;cons_idx_attr,</div><div class='add'>+				     sizeof(cons_idx_attr));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_SET_SQ_CI_ATTR, &amp;msg_params);</div><div class='add'>+	if (err || cons_idx_attr.msg_head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to set ci attribute table, err: %d, status: 0x%x\n",</div><div class='add'>+			err, cons_idx_attr.msg_head.status);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_flush_qps_res(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_clear_qp_resource sq_res = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	sq_res.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;sq_res, sizeof(sq_res));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_CLEAR_QP_RESOURCE,</div><div class='add'>+				       &amp;msg_params);</div><div class='add'>+	if (err || sq_res.msg_head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to clear sq resources, err: %d, status: 0x%x\n",</div><div class='add'>+			err, sq_res.msg_head.status);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_force_drop_tx_pkt(struct hinic3_hwdev *hwdev)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_force_pkt_drop pkt_drop = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pkt_drop.port = hinic3_physical_port_id(hwdev);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;pkt_drop, sizeof(pkt_drop));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_FORCE_PKT_DROP, &amp;msg_params);</div><div class='add'>+	if ((pkt_drop.msg_head.status != MGMT_STATUS_CMD_UNSUPPORTED &amp;&amp;</div><div class='add'>+	     pkt_drop.msg_head.status) || err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to set force tx packets drop, err: %d, status: 0x%x\n",</div><div class='add'>+			err, pkt_drop.msg_head.status);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pkt_drop.msg_head.status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_sync_dcb_state(struct hinic3_hwdev *hwdev, u8 op_code, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_set_dcb_state dcb_state = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	dcb_state.op_code = op_code;</div><div class='add'>+	dcb_state.state = state;</div><div class='add'>+	dcb_state.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;dcb_state,</div><div class='add'>+				     sizeof(dcb_state));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_QOS_DCB_STATE, &amp;msg_params);</div><div class='add'>+	if (err || dcb_state.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev,</div><div class='add'>+			"Failed to set dcb state, err: %d, status: 0x%x\n",</div><div class='add'>+			err, dcb_state.head.status);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_get_link_status(struct hinic3_hwdev *hwdev, bool *link_status_up)</div><div class='add'>+{</div><div class='add'>+	struct mag_cmd_get_link_status get_link = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	get_link.port_id = hinic3_physical_port_id(hwdev);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;get_link, sizeof(get_link));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_HILINK,</div><div class='add'>+				       MAG_CMD_GET_LINK_STATUS, &amp;msg_params);</div><div class='add'>+	if (err || get_link.head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to get link state, err: %d, status: 0x%x\n",</div><div class='add'>+			err, get_link.head.status);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*link_status_up = !!get_link.status;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_set_vport_enable(struct hinic3_hwdev *hwdev, u16 func_id,</div><div class='add'>+			    bool enable)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_set_vport_state en_state = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	en_state.func_id = func_id;</div><div class='add'>+	en_state.state = enable ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;en_state, sizeof(en_state));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_SET_VPORT_ENABLE, &amp;msg_params);</div><div class='add'>+	if (err || en_state.msg_head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set vport state, err: %d, status: 0x%x\n",</div><div class='add'>+			err, en_state.msg_head.status);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h b/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h<br/>new file mode 100644<br/>index 000000000000..b83b567fa542<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_NIC_CFG_H_</div><div class='add'>+#define _HINIC3_NIC_CFG_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hw_intf.h"</div><div class='add'>+#include "hinic3_mgmt_interface.h"</div><div class='add'>+</div><div class='add'>+struct hinic3_hwdev;</div><div class='add'>+struct hinic3_nic_dev;</div><div class='add'>+</div><div class='add'>+#define HINIC3_MIN_MTU_SIZE          256</div><div class='add'>+#define HINIC3_MAX_JUMBO_FRAME_SIZE  9600</div><div class='add'>+</div><div class='add'>+#define HINIC3_VLAN_ID_MASK          0x7FFF</div><div class='add'>+</div><div class='add'>+enum hinic3_nic_event_type {</div><div class='add'>+	HINIC3_NIC_EVENT_LINK_DOWN = 0,</div><div class='add'>+	HINIC3_NIC_EVENT_LINK_UP   = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_sq_attr {</div><div class='add'>+	u8  dma_attr_off;</div><div class='add'>+	u8  pending_limit;</div><div class='add'>+	u8  coalescing_time;</div><div class='add'>+	u8  intr_en;</div><div class='add'>+	u16 intr_idx;</div><div class='add'>+	u32 l2nic_sqn;</div><div class='add'>+	u64 ci_dma_base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hinic3_get_nic_feature_from_hw(struct hinic3_nic_dev *nic_dev);</div><div class='add'>+int hinic3_set_nic_feature_to_hw(struct hinic3_nic_dev *nic_dev);</div><div class='add'>+bool hinic3_test_support(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+			 enum hinic3_nic_feature_cap feature_bits);</div><div class='add'>+void hinic3_update_nic_feature(struct hinic3_nic_dev *nic_dev, u64 feature_cap);</div><div class='add'>+</div><div class='add'>+int hinic3_init_function_table(struct hinic3_nic_dev *nic_dev);</div><div class='add'>+int hinic3_set_port_mtu(struct net_device *netdev, u16 new_mtu);</div><div class='add'>+</div><div class='add'>+int hinic3_set_mac(struct hinic3_hwdev *hwdev, const u8 *mac_addr, u16 vlan_id,</div><div class='add'>+		   u16 func_id);</div><div class='add'>+int hinic3_del_mac(struct hinic3_hwdev *hwdev, const u8 *mac_addr, u16 vlan_id,</div><div class='add'>+		   u16 func_id);</div><div class='add'>+int hinic3_update_mac(struct hinic3_hwdev *hwdev, const u8 *old_mac,</div><div class='add'>+		      u8 *new_mac, u16 vlan_id, u16 func_id);</div><div class='add'>+</div><div class='add'>+int hinic3_set_ci_table(struct hinic3_hwdev *hwdev,</div><div class='add'>+			struct hinic3_sq_attr *attr);</div><div class='add'>+int hinic3_flush_qps_res(struct hinic3_hwdev *hwdev);</div><div class='add'>+int hinic3_force_drop_tx_pkt(struct hinic3_hwdev *hwdev);</div><div class='add'>+</div><div class='add'>+int hinic3_sync_dcb_state(struct hinic3_hwdev *hwdev, u8 op_code, u8 state);</div><div class='add'>+int hinic3_get_link_status(struct hinic3_hwdev *hwdev, bool *link_status_up);</div><div class='add'>+int hinic3_set_vport_enable(struct hinic3_hwdev *hwdev, u16 func_id,</div><div class='add'>+			    bool enable);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h b/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h<br/>new file mode 100644<br/>index 000000000000..5ba83261616c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_NIC_DEV_H_</div><div class='add'>+#define _HINIC3_NIC_DEV_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hw_cfg.h"</div><div class='add'>+#include "hinic3_mgmt_interface.h"</div><div class='add'>+</div><div class='add'>+enum hinic3_flags {</div><div class='add'>+	HINIC3_RSS_ENABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_rss_hash_type {</div><div class='add'>+	HINIC3_RSS_HASH_ENGINE_TYPE_XOR  = 0,</div><div class='add'>+	HINIC3_RSS_HASH_ENGINE_TYPE_TOEP = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_rss_type {</div><div class='add'>+	u8 tcp_ipv6_ext;</div><div class='add'>+	u8 ipv6_ext;</div><div class='add'>+	u8 tcp_ipv6;</div><div class='add'>+	u8 ipv6;</div><div class='add'>+	u8 tcp_ipv4;</div><div class='add'>+	u8 ipv4;</div><div class='add'>+	u8 udp_ipv6;</div><div class='add'>+	u8 udp_ipv4;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_irq_cfg {</div><div class='add'>+	struct net_device  *netdev;</div><div class='add'>+	u16                msix_entry_idx;</div><div class='add'>+	/* provided by OS */</div><div class='add'>+	u32                irq_id;</div><div class='add'>+	char               irq_name[IFNAMSIZ + 16];</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	cpumask_t          affinity_mask;</div><div class='add'>+	struct hinic3_txq  *txq;</div><div class='add'>+	struct hinic3_rxq  *rxq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_dyna_txrxq_params {</div><div class='add'>+	u16                        num_qps;</div><div class='add'>+	u32                        sq_depth;</div><div class='add'>+	u32                        rq_depth;</div><div class='add'>+</div><div class='add'>+	struct hinic3_dyna_txq_res *txqs_res;</div><div class='add'>+	struct hinic3_dyna_rxq_res *rxqs_res;</div><div class='add'>+	struct hinic3_irq_cfg      *irq_cfg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_intr_coal_info {</div><div class='add'>+	u8 pending_limit;</div><div class='add'>+	u8 coalesce_timer_cfg;</div><div class='add'>+	u8 resend_timer_cfg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_nic_dev {</div><div class='add'>+	struct pci_dev                  *pdev;</div><div class='add'>+	struct net_device               *netdev;</div><div class='add'>+	struct hinic3_hwdev             *hwdev;</div><div class='add'>+	struct hinic3_nic_io            *nic_io;</div><div class='add'>+</div><div class='add'>+	u16                             max_qps;</div><div class='add'>+	u16                             rx_buf_len;</div><div class='add'>+	u32                             lro_replenish_thld;</div><div class='add'>+	unsigned long                   flags;</div><div class='add'>+	struct hinic3_nic_service_cap   nic_svc_cap;</div><div class='add'>+</div><div class='add'>+	struct hinic3_dyna_txrxq_params q_params;</div><div class='add'>+	struct hinic3_txq               *txqs;</div><div class='add'>+	struct hinic3_rxq               *rxqs;</div><div class='add'>+</div><div class='add'>+	enum hinic3_rss_hash_type       rss_hash_type;</div><div class='add'>+	struct hinic3_rss_type          rss_type;</div><div class='add'>+	u8                              *rss_hkey;</div><div class='add'>+	u16                             *rss_indir;</div><div class='add'>+</div><div class='add'>+	u16                             num_qp_irq;</div><div class='add'>+	struct msix_entry               *qps_msix_entries;</div><div class='add'>+</div><div class='add'>+	struct hinic3_intr_coal_info    *intr_coalesce;</div><div class='add'>+</div><div class='add'>+	bool                            link_status_up;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void hinic3_set_netdev_ops(struct net_device *netdev);</div><div class='add'>+int hinic3_qps_irq_init(struct net_device *netdev);</div><div class='add'>+void hinic3_qps_irq_uninit(struct net_device *netdev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c b/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c<br/>new file mode 100644<br/>index 000000000000..d86cd1ba4605<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c</a></div><div class='hunk'>@@ -0,0 +1,885 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include "hinic3_cmdq.h"</div><div class='add'>+#include "hinic3_hw_comm.h"</div><div class='add'>+#include "hinic3_hw_intf.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_nic_cfg.h"</div><div class='add'>+#include "hinic3_nic_dev.h"</div><div class='add'>+#include "hinic3_nic_io.h"</div><div class='add'>+</div><div class='add'>+#define HINIC3_DEFAULT_TX_CI_PENDING_LIMIT    1</div><div class='add'>+#define HINIC3_DEFAULT_TX_CI_COALESCING_TIME  1</div><div class='add'>+#define HINIC3_DEFAULT_DROP_THD_ON            (0xFFFF)</div><div class='add'>+#define HINIC3_DEFAULT_DROP_THD_OFF           0</div><div class='add'>+</div><div class='add'>+#define HINIC3_CI_Q_ADDR_SIZE                (64)</div><div class='add'>+</div><div class='add'>+#define HINIC3_CI_TABLE_SIZE(num_qps)  \</div><div class='add'>+	(ALIGN((num_qps) * HINIC3_CI_Q_ADDR_SIZE, HINIC3_MIN_PAGE_SIZE))</div><div class='add'>+</div><div class='add'>+#define HINIC3_CI_VADDR(base_addr, q_id)  \</div><div class='add'>+	((u8 *)(base_addr) + (q_id) * HINIC3_CI_Q_ADDR_SIZE)</div><div class='add'>+</div><div class='add'>+#define HINIC3_CI_PADDR(base_paddr, q_id)  \</div><div class='add'>+	((base_paddr) + (q_id) * HINIC3_CI_Q_ADDR_SIZE)</div><div class='add'>+</div><div class='add'>+#define SQ_WQ_PREFETCH_MAX        1</div><div class='add'>+#define SQ_WQ_PREFETCH_MIN        1</div><div class='add'>+#define SQ_WQ_PREFETCH_THRESHOLD  16</div><div class='add'>+</div><div class='add'>+#define RQ_WQ_PREFETCH_MAX        4</div><div class='add'>+#define RQ_WQ_PREFETCH_MIN        1</div><div class='add'>+#define RQ_WQ_PREFETCH_THRESHOLD  256</div><div class='add'>+</div><div class='add'>+/* (2048 - 8) / 64 */</div><div class='add'>+#define HINIC3_Q_CTXT_MAX         31</div><div class='add'>+</div><div class='add'>+enum hinic3_qp_ctxt_type {</div><div class='add'>+	HINIC3_QP_CTXT_TYPE_SQ = 0,</div><div class='add'>+	HINIC3_QP_CTXT_TYPE_RQ = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_qp_ctxt_hdr {</div><div class='add'>+	__le16 num_queues;</div><div class='add'>+	__le16 queue_type;</div><div class='add'>+	__le16 start_qid;</div><div class='add'>+	__le16 rsvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_sq_ctxt {</div><div class='add'>+	__le32 ci_pi;</div><div class='add'>+	__le32 drop_mode_sp;</div><div class='add'>+	__le32 wq_pfn_hi_owner;</div><div class='add'>+	__le32 wq_pfn_lo;</div><div class='add'>+</div><div class='add'>+	__le32 rsvd0;</div><div class='add'>+	__le32 pkt_drop_thd;</div><div class='add'>+	__le32 global_sq_id;</div><div class='add'>+	__le32 vlan_ceq_attr;</div><div class='add'>+</div><div class='add'>+	__le32 pref_cache;</div><div class='add'>+	__le32 pref_ci_owner;</div><div class='add'>+	__le32 pref_wq_pfn_hi_ci;</div><div class='add'>+	__le32 pref_wq_pfn_lo;</div><div class='add'>+</div><div class='add'>+	__le32 rsvd8;</div><div class='add'>+	__le32 rsvd9;</div><div class='add'>+	__le32 wq_block_pfn_hi;</div><div class='add'>+	__le32 wq_block_pfn_lo;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_rq_ctxt {</div><div class='add'>+	__le32 ci_pi;</div><div class='add'>+	__le32 ceq_attr;</div><div class='add'>+	__le32 wq_pfn_hi_type_owner;</div><div class='add'>+	__le32 wq_pfn_lo;</div><div class='add'>+</div><div class='add'>+	__le32 rsvd[3];</div><div class='add'>+	__le32 cqe_sge_len;</div><div class='add'>+</div><div class='add'>+	__le32 pref_cache;</div><div class='add'>+	__le32 pref_ci_owner;</div><div class='add'>+	__le32 pref_wq_pfn_hi_ci;</div><div class='add'>+	__le32 pref_wq_pfn_lo;</div><div class='add'>+</div><div class='add'>+	__le32 pi_paddr_hi;</div><div class='add'>+	__le32 pi_paddr_lo;</div><div class='add'>+	__le32 wq_block_pfn_hi;</div><div class='add'>+	__le32 wq_block_pfn_lo;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_sq_ctxt_block {</div><div class='add'>+	struct hinic3_qp_ctxt_hdr cmdq_hdr;</div><div class='add'>+	struct hinic3_sq_ctxt     sq_ctxt[HINIC3_Q_CTXT_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_rq_ctxt_block {</div><div class='add'>+	struct hinic3_qp_ctxt_hdr cmdq_hdr;</div><div class='add'>+	struct hinic3_rq_ctxt     rq_ctxt[HINIC3_Q_CTXT_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_clean_queue_ctxt {</div><div class='add'>+	struct hinic3_qp_ctxt_hdr cmdq_hdr;</div><div class='add'>+	__le32                    rsvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_SIZE(num_sqs)  \</div><div class='add'>+	(sizeof(struct hinic3_qp_ctxt_hdr) +  \</div><div class='add'>+	(num_sqs) * sizeof(struct hinic3_sq_ctxt))</div><div class='add'>+</div><div class='add'>+#define RQ_CTXT_SIZE(num_rqs)  \</div><div class='add'>+	(sizeof(struct hinic3_qp_ctxt_hdr) +  \</div><div class='add'>+	(num_rqs) * sizeof(struct hinic3_rq_ctxt))</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_PREF_CI_HI_SHIFT           12</div><div class='add'>+#define SQ_CTXT_PREF_CI_HI(val)            ((val) &gt;&gt; SQ_CTXT_PREF_CI_HI_SHIFT)</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_PI_IDX_MASK                GENMASK(15, 0)</div><div class='add'>+#define SQ_CTXT_CI_IDX_MASK                GENMASK(31, 16)</div><div class='add'>+#define SQ_CTXT_CI_PI_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(SQ_CTXT_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_MODE_SP_FLAG_MASK          BIT(0)</div><div class='add'>+#define SQ_CTXT_MODE_PKT_DROP_MASK         BIT(1)</div><div class='add'>+#define SQ_CTXT_MODE_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(SQ_CTXT_MODE_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_WQ_PAGE_HI_PFN_MASK        GENMASK(19, 0)</div><div class='add'>+#define SQ_CTXT_WQ_PAGE_OWNER_MASK         BIT(23)</div><div class='add'>+#define SQ_CTXT_WQ_PAGE_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(SQ_CTXT_WQ_PAGE_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_PKT_DROP_THD_ON_MASK       GENMASK(15, 0)</div><div class='add'>+#define SQ_CTXT_PKT_DROP_THD_OFF_MASK      GENMASK(31, 16)</div><div class='add'>+#define SQ_CTXT_PKT_DROP_THD_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(SQ_CTXT_PKT_DROP_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_GLOBAL_SQ_ID_MASK          GENMASK(12, 0)</div><div class='add'>+#define SQ_CTXT_GLOBAL_QUEUE_ID_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(SQ_CTXT_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_VLAN_INSERT_MODE_MASK      GENMASK(20, 19)</div><div class='add'>+#define SQ_CTXT_VLAN_CEQ_EN_MASK           BIT(23)</div><div class='add'>+#define SQ_CTXT_VLAN_CEQ_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(SQ_CTXT_VLAN_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_PREF_CACHE_THRESHOLD_MASK  GENMASK(13, 0)</div><div class='add'>+#define SQ_CTXT_PREF_CACHE_MAX_MASK        GENMASK(24, 14)</div><div class='add'>+#define SQ_CTXT_PREF_CACHE_MIN_MASK        GENMASK(31, 25)</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_PREF_CI_HI_MASK            GENMASK(3, 0)</div><div class='add'>+#define SQ_CTXT_PREF_OWNER_MASK            BIT(4)</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_PREF_WQ_PFN_HI_MASK        GENMASK(19, 0)</div><div class='add'>+#define SQ_CTXT_PREF_CI_LOW_MASK           GENMASK(31, 20)</div><div class='add'>+#define SQ_CTXT_PREF_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(SQ_CTXT_PREF_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define SQ_CTXT_WQ_BLOCK_PFN_HI_MASK       GENMASK(22, 0)</div><div class='add'>+#define SQ_CTXT_WQ_BLOCK_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(SQ_CTXT_WQ_BLOCK_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define RQ_CTXT_PI_IDX_MASK                GENMASK(15, 0)</div><div class='add'>+#define RQ_CTXT_CI_IDX_MASK                GENMASK(31, 16)</div><div class='add'>+#define RQ_CTXT_CI_PI_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(RQ_CTXT_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define RQ_CTXT_CEQ_ATTR_INTR_MASK         GENMASK(30, 21)</div><div class='add'>+#define RQ_CTXT_CEQ_ATTR_EN_MASK           BIT(31)</div><div class='add'>+#define RQ_CTXT_CEQ_ATTR_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(RQ_CTXT_CEQ_ATTR_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define RQ_CTXT_WQ_PAGE_HI_PFN_MASK        GENMASK(19, 0)</div><div class='add'>+#define RQ_CTXT_WQ_PAGE_WQE_TYPE_MASK      GENMASK(29, 28)</div><div class='add'>+#define RQ_CTXT_WQ_PAGE_OWNER_MASK         BIT(31)</div><div class='add'>+#define RQ_CTXT_WQ_PAGE_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(RQ_CTXT_WQ_PAGE_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define RQ_CTXT_CQE_LEN_MASK               GENMASK(29, 28)</div><div class='add'>+#define RQ_CTXT_CQE_LEN_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(RQ_CTXT_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define RQ_CTXT_PREF_CACHE_THRESHOLD_MASK  GENMASK(13, 0)</div><div class='add'>+#define RQ_CTXT_PREF_CACHE_MAX_MASK        GENMASK(24, 14)</div><div class='add'>+#define RQ_CTXT_PREF_CACHE_MIN_MASK        GENMASK(31, 25)</div><div class='add'>+</div><div class='add'>+#define RQ_CTXT_PREF_CI_HI_MASK            GENMASK(3, 0)</div><div class='add'>+#define RQ_CTXT_PREF_OWNER_MASK            BIT(4)</div><div class='add'>+</div><div class='add'>+#define RQ_CTXT_PREF_WQ_PFN_HI_MASK        GENMASK(19, 0)</div><div class='add'>+#define RQ_CTXT_PREF_CI_LOW_MASK           GENMASK(31, 20)</div><div class='add'>+#define RQ_CTXT_PREF_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(RQ_CTXT_PREF_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define RQ_CTXT_WQ_BLOCK_PFN_HI_MASK       GENMASK(22, 0)</div><div class='add'>+#define RQ_CTXT_WQ_BLOCK_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(RQ_CTXT_WQ_BLOCK_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define WQ_PAGE_PFN_SHIFT       12</div><div class='add'>+#define WQ_BLOCK_PFN_SHIFT      9</div><div class='add'>+#define WQ_PAGE_PFN(page_addr)  ((page_addr) &gt;&gt; WQ_PAGE_PFN_SHIFT)</div><div class='add'>+#define WQ_BLOCK_PFN(page_addr) ((page_addr) &gt;&gt; WQ_BLOCK_PFN_SHIFT)</div><div class='add'>+</div><div class='add'>+int hinic3_init_nic_io(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	struct hinic3_nic_io *nic_io;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	nic_io = kzalloc(sizeof(*nic_io), GFP_KERNEL);</div><div class='add'>+	if (!nic_io)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;nic_io = nic_io;</div><div class='add'>+</div><div class='add'>+	err = hinic3_set_func_svc_used_state(hwdev, COMM_FUNC_SVC_T_NIC, 1);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set function svc used state\n");</div><div class='add'>+		goto err_free_nicio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_init_function_table(nic_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init function table\n");</div><div class='add'>+		goto err_clear_func_svc_used_state;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nic_io-&gt;rx_buf_len = nic_dev-&gt;rx_buf_len;</div><div class='add'>+</div><div class='add'>+	err = hinic3_get_nic_feature_from_hw(nic_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to get nic features\n");</div><div class='add'>+		goto err_clear_func_svc_used_state;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nic_io-&gt;feature_cap &amp;= HINIC3_NIC_F_ALL_MASK;</div><div class='add'>+	nic_io-&gt;feature_cap &amp;= HINIC3_NIC_DRV_DEFAULT_FEATURE;</div><div class='add'>+	dev_dbg(hwdev-&gt;dev, "nic features: 0x%llx\n\n", nic_io-&gt;feature_cap);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_clear_func_svc_used_state:</div><div class='add'>+	hinic3_set_func_svc_used_state(hwdev, COMM_FUNC_SVC_T_NIC, 0);</div><div class='add'>+err_free_nicio:</div><div class='add'>+	nic_dev-&gt;nic_io = NULL;</div><div class='add'>+	kfree(nic_io);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_nic_io(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+</div><div class='add'>+	hinic3_set_func_svc_used_state(nic_dev-&gt;hwdev, COMM_FUNC_SVC_T_NIC, 0);</div><div class='add'>+	nic_dev-&gt;nic_io = NULL;</div><div class='add'>+	kfree(nic_io);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_init_nicio_res(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	void __iomem *db_base;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	nic_io-&gt;max_qps = hinic3_func_max_qnum(hwdev);</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_db_addr(hwdev, &amp;db_base, NULL);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to allocate doorbell for sqs\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	nic_io-&gt;sqs_db_addr = db_base;</div><div class='add'>+</div><div class='add'>+	err = hinic3_alloc_db_addr(hwdev, &amp;db_base, NULL);</div><div class='add'>+	if (err) {</div><div class='add'>+		hinic3_free_db_addr(hwdev, nic_io-&gt;sqs_db_addr);</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to allocate doorbell for rqs\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	nic_io-&gt;rqs_db_addr = db_base;</div><div class='add'>+</div><div class='add'>+	nic_io-&gt;ci_vaddr_base =</div><div class='add'>+		dma_alloc_coherent(hwdev-&gt;dev,</div><div class='add'>+				   HINIC3_CI_TABLE_SIZE(nic_io-&gt;max_qps),</div><div class='add'>+				   &amp;nic_io-&gt;ci_dma_base,</div><div class='add'>+				   GFP_KERNEL);</div><div class='add'>+	if (!nic_io-&gt;ci_vaddr_base) {</div><div class='add'>+		hinic3_free_db_addr(hwdev, nic_io-&gt;sqs_db_addr);</div><div class='add'>+		hinic3_free_db_addr(hwdev, nic_io-&gt;rqs_db_addr);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_nicio_res(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(hwdev-&gt;dev,</div><div class='add'>+			  HINIC3_CI_TABLE_SIZE(nic_io-&gt;max_qps),</div><div class='add'>+			  nic_io-&gt;ci_vaddr_base, nic_io-&gt;ci_dma_base);</div><div class='add'>+</div><div class='add'>+	hinic3_free_db_addr(hwdev, nic_io-&gt;sqs_db_addr);</div><div class='add'>+	hinic3_free_db_addr(hwdev, nic_io-&gt;rqs_db_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_create_sq(struct hinic3_hwdev *hwdev,</div><div class='add'>+			    struct hinic3_io_queue *sq,</div><div class='add'>+			    u16 q_id, u32 sq_depth, u16 sq_msix_idx)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* sq used &amp; hardware request init 1 */</div><div class='add'>+	sq-&gt;owner = 1;</div><div class='add'>+</div><div class='add'>+	sq-&gt;q_id = q_id;</div><div class='add'>+	sq-&gt;msix_entry_idx = sq_msix_idx;</div><div class='add'>+</div><div class='add'>+	err = hinic3_wq_create(hwdev, &amp;sq-&gt;wq, sq_depth,</div><div class='add'>+			       BIT(HINIC3_SQ_WQEBB_SHIFT));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to create tx queue %u wq\n",</div><div class='add'>+			q_id);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_create_rq(struct hinic3_hwdev *hwdev,</div><div class='add'>+			    struct hinic3_io_queue *rq,</div><div class='add'>+			    u16 q_id, u32 rq_depth, u16 rq_msix_idx)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	rq-&gt;q_id = q_id;</div><div class='add'>+	rq-&gt;msix_entry_idx = rq_msix_idx;</div><div class='add'>+</div><div class='add'>+	err = hinic3_wq_create(hwdev, &amp;rq-&gt;wq, rq_depth,</div><div class='add'>+			       BIT(HINIC3_RQ_WQEBB_SHIFT +</div><div class='add'>+				   HINIC3_NORMAL_RQ_WQE));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to create rx queue %u wq\n",</div><div class='add'>+			q_id);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_create_qp(struct hinic3_hwdev *hwdev,</div><div class='add'>+			    struct hinic3_io_queue *sq,</div><div class='add'>+			    struct hinic3_io_queue *rq, u16 q_id, u32 sq_depth,</div><div class='add'>+			    u32 rq_depth, u16 qp_msix_idx)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_create_sq(hwdev, sq, q_id, sq_depth, qp_msix_idx);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to create sq, qid: %u\n",</div><div class='add'>+			q_id);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hinic3_create_rq(hwdev, rq, q_id, rq_depth, qp_msix_idx);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to create rq, qid: %u\n",</div><div class='add'>+			q_id);</div><div class='add'>+		goto err_destroy_sq_wq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_destroy_sq_wq:</div><div class='add'>+	hinic3_wq_destroy(hwdev, &amp;sq-&gt;wq);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_destroy_qp(struct hinic3_hwdev *hwdev,</div><div class='add'>+			      struct hinic3_io_queue *sq,</div><div class='add'>+			      struct hinic3_io_queue *rq)</div><div class='add'>+{</div><div class='add'>+	hinic3_wq_destroy(hwdev, &amp;sq-&gt;wq);</div><div class='add'>+	hinic3_wq_destroy(hwdev, &amp;rq-&gt;wq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_qps(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+		     struct hinic3_dyna_qp_params *qp_params)</div><div class='add'>+{</div><div class='add'>+	struct msix_entry *qps_msix_entries = nic_dev-&gt;qps_msix_entries;</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	struct hinic3_io_queue *sqs;</div><div class='add'>+	struct hinic3_io_queue *rqs;</div><div class='add'>+	u16 q_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (qp_params-&gt;num_qps &gt; nic_io-&gt;max_qps || !qp_params-&gt;num_qps)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	sqs = kcalloc(qp_params-&gt;num_qps, sizeof(*sqs), GFP_KERNEL);</div><div class='add'>+	if (!sqs) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rqs = kcalloc(qp_params-&gt;num_qps, sizeof(*rqs), GFP_KERNEL);</div><div class='add'>+	if (!rqs) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_free_sqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; qp_params-&gt;num_qps; q_id++) {</div><div class='add'>+		err = hinic3_create_qp(hwdev, &amp;sqs[q_id], &amp;rqs[q_id], q_id,</div><div class='add'>+				       qp_params-&gt;sq_depth, qp_params-&gt;rq_depth,</div><div class='add'>+				       qps_msix_entries[q_id].entry);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Failed to allocate qp %u, err: %d\n",</div><div class='add'>+				q_id, err);</div><div class='add'>+			goto err_destroy_qp;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qp_params-&gt;sqs = sqs;</div><div class='add'>+	qp_params-&gt;rqs = rqs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_destroy_qp:</div><div class='add'>+	while (q_id &gt; 0) {</div><div class='add'>+		q_id--;</div><div class='add'>+		hinic3_destroy_qp(hwdev, &amp;sqs[q_id], &amp;rqs[q_id]);</div><div class='add'>+	}</div><div class='add'>+	kfree(rqs);</div><div class='add'>+err_free_sqs:</div><div class='add'>+	kfree(sqs);</div><div class='add'>+err_out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_qps(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+		     struct hinic3_dyna_qp_params *qp_params)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	u16 q_id;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; qp_params-&gt;num_qps; q_id++)</div><div class='add'>+		hinic3_destroy_qp(hwdev, &amp;qp_params-&gt;sqs[q_id],</div><div class='add'>+				  &amp;qp_params-&gt;rqs[q_id]);</div><div class='add'>+</div><div class='add'>+	kfree(qp_params-&gt;sqs);</div><div class='add'>+	kfree(qp_params-&gt;rqs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_init_qps(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+		     struct hinic3_dyna_qp_params *qp_params)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+	struct hinic3_io_queue *sqs = qp_params-&gt;sqs;</div><div class='add'>+	struct hinic3_io_queue *rqs = qp_params-&gt;rqs;</div><div class='add'>+	u16 q_id;</div><div class='add'>+</div><div class='add'>+	nic_io-&gt;num_qps = qp_params-&gt;num_qps;</div><div class='add'>+	nic_io-&gt;sq = qp_params-&gt;sqs;</div><div class='add'>+	nic_io-&gt;rq = qp_params-&gt;rqs;</div><div class='add'>+	for (q_id = 0; q_id &lt; nic_io-&gt;num_qps; q_id++) {</div><div class='add'>+		sqs[q_id].cons_idx_addr =</div><div class='add'>+			(u16 *)HINIC3_CI_VADDR(nic_io-&gt;ci_vaddr_base, q_id);</div><div class='add'>+		/* clear ci value */</div><div class='add'>+		WRITE_ONCE(*sqs[q_id].cons_idx_addr, 0);</div><div class='add'>+</div><div class='add'>+		sqs[q_id].db_addr = nic_io-&gt;sqs_db_addr;</div><div class='add'>+		rqs[q_id].db_addr = nic_io-&gt;rqs_db_addr;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_uninit_qps(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+		       struct hinic3_dyna_qp_params *qp_params)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+</div><div class='add'>+	qp_params-&gt;sqs = nic_io-&gt;sq;</div><div class='add'>+	qp_params-&gt;rqs = nic_io-&gt;rq;</div><div class='add'>+	qp_params-&gt;num_qps = nic_io-&gt;num_qps;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_qp_prepare_cmdq_header(struct hinic3_qp_ctxt_hdr *qp_ctxt_hdr,</div><div class='add'>+					  enum hinic3_qp_ctxt_type ctxt_type,</div><div class='add'>+					  u16 num_queues, u16 q_id)</div><div class='add'>+{</div><div class='add'>+	qp_ctxt_hdr-&gt;queue_type = cpu_to_le16(ctxt_type);</div><div class='add'>+	qp_ctxt_hdr-&gt;num_queues = cpu_to_le16(num_queues);</div><div class='add'>+	qp_ctxt_hdr-&gt;start_qid = cpu_to_le16(q_id);</div><div class='add'>+	qp_ctxt_hdr-&gt;rsvd = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_sq_prepare_ctxt(struct hinic3_io_queue *sq, u16 sq_id,</div><div class='add'>+				   struct hinic3_sq_ctxt *sq_ctxt)</div><div class='add'>+{</div><div class='add'>+	u64 wq_page_addr, wq_page_pfn, wq_block_pfn;</div><div class='add'>+	u32 wq_block_pfn_hi, wq_block_pfn_lo;</div><div class='add'>+	u32 wq_page_pfn_hi, wq_page_pfn_lo;</div><div class='add'>+	u16 pi_start, ci_start;</div><div class='add'>+</div><div class='add'>+	ci_start = hinic3_get_sq_local_ci(sq);</div><div class='add'>+	pi_start = hinic3_get_sq_local_pi(sq);</div><div class='add'>+</div><div class='add'>+	wq_page_addr = hinic3_wq_get_first_wqe_page_addr(&amp;sq-&gt;wq);</div><div class='add'>+</div><div class='add'>+	wq_page_pfn = WQ_PAGE_PFN(wq_page_addr);</div><div class='add'>+	wq_page_pfn_hi = upper_32_bits(wq_page_pfn);</div><div class='add'>+	wq_page_pfn_lo = lower_32_bits(wq_page_pfn);</div><div class='add'>+</div><div class='add'>+	wq_block_pfn = WQ_BLOCK_PFN(sq-&gt;wq.wq_block_paddr);</div><div class='add'>+	wq_block_pfn_hi = upper_32_bits(wq_block_pfn);</div><div class='add'>+	wq_block_pfn_lo = lower_32_bits(wq_block_pfn);</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;ci_pi =</div><div class='add'>+		cpu_to_le32(SQ_CTXT_CI_PI_SET(ci_start, CI_IDX) |</div><div class='add'>+			    SQ_CTXT_CI_PI_SET(pi_start, PI_IDX));</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;drop_mode_sp =</div><div class='add'>+		cpu_to_le32(SQ_CTXT_MODE_SET(0, SP_FLAG) |</div><div class='add'>+			    SQ_CTXT_MODE_SET(0, PKT_DROP));</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;wq_pfn_hi_owner =</div><div class='add'>+		cpu_to_le32(SQ_CTXT_WQ_PAGE_SET(wq_page_pfn_hi, HI_PFN) |</div><div class='add'>+			    SQ_CTXT_WQ_PAGE_SET(1, OWNER));</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;wq_pfn_lo = cpu_to_le32(wq_page_pfn_lo);</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;pkt_drop_thd =</div><div class='add'>+		cpu_to_le32(SQ_CTXT_PKT_DROP_THD_SET(HINIC3_DEFAULT_DROP_THD_ON, THD_ON) |</div><div class='add'>+			    SQ_CTXT_PKT_DROP_THD_SET(HINIC3_DEFAULT_DROP_THD_OFF, THD_OFF));</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;global_sq_id =</div><div class='add'>+		cpu_to_le32(SQ_CTXT_GLOBAL_QUEUE_ID_SET((u32)sq_id,</div><div class='add'>+							GLOBAL_SQ_ID));</div><div class='add'>+</div><div class='add'>+	/* enable insert c-vlan by default */</div><div class='add'>+	sq_ctxt-&gt;vlan_ceq_attr =</div><div class='add'>+		cpu_to_le32(SQ_CTXT_VLAN_CEQ_SET(0, CEQ_EN) |</div><div class='add'>+			    SQ_CTXT_VLAN_CEQ_SET(1, INSERT_MODE));</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;rsvd0 = 0;</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;pref_cache =</div><div class='add'>+		cpu_to_le32(SQ_CTXT_PREF_SET(SQ_WQ_PREFETCH_MIN, CACHE_MIN) |</div><div class='add'>+			    SQ_CTXT_PREF_SET(SQ_WQ_PREFETCH_MAX, CACHE_MAX) |</div><div class='add'>+			    SQ_CTXT_PREF_SET(SQ_WQ_PREFETCH_THRESHOLD, CACHE_THRESHOLD));</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;pref_ci_owner =</div><div class='add'>+		cpu_to_le32(SQ_CTXT_PREF_SET(SQ_CTXT_PREF_CI_HI(ci_start), CI_HI) |</div><div class='add'>+			    SQ_CTXT_PREF_SET(1, OWNER));</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;pref_wq_pfn_hi_ci =</div><div class='add'>+		cpu_to_le32(SQ_CTXT_PREF_SET(ci_start, CI_LOW) |</div><div class='add'>+			    SQ_CTXT_PREF_SET(wq_page_pfn_hi, WQ_PFN_HI));</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;pref_wq_pfn_lo = cpu_to_le32(wq_page_pfn_lo);</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;wq_block_pfn_hi =</div><div class='add'>+		cpu_to_le32(SQ_CTXT_WQ_BLOCK_SET(wq_block_pfn_hi, PFN_HI));</div><div class='add'>+</div><div class='add'>+	sq_ctxt-&gt;wq_block_pfn_lo = cpu_to_le32(wq_block_pfn_lo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_rq_prepare_ctxt_get_wq_info(struct hinic3_io_queue *rq,</div><div class='add'>+					       u32 *wq_page_pfn_hi,</div><div class='add'>+					       u32 *wq_page_pfn_lo,</div><div class='add'>+					       u32 *wq_block_pfn_hi,</div><div class='add'>+					       u32 *wq_block_pfn_lo)</div><div class='add'>+{</div><div class='add'>+	u64 wq_page_addr, wq_page_pfn, wq_block_pfn;</div><div class='add'>+</div><div class='add'>+	wq_page_addr = hinic3_wq_get_first_wqe_page_addr(&amp;rq-&gt;wq);</div><div class='add'>+</div><div class='add'>+	wq_page_pfn = WQ_PAGE_PFN(wq_page_addr);</div><div class='add'>+	*wq_page_pfn_hi = upper_32_bits(wq_page_pfn);</div><div class='add'>+	*wq_page_pfn_lo = lower_32_bits(wq_page_pfn);</div><div class='add'>+</div><div class='add'>+	wq_block_pfn = WQ_BLOCK_PFN(rq-&gt;wq.wq_block_paddr);</div><div class='add'>+	*wq_block_pfn_hi = upper_32_bits(wq_block_pfn);</div><div class='add'>+	*wq_block_pfn_lo = lower_32_bits(wq_block_pfn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_rq_prepare_ctxt(struct hinic3_io_queue *rq,</div><div class='add'>+				   struct hinic3_rq_ctxt *rq_ctxt)</div><div class='add'>+{</div><div class='add'>+	u32 wq_block_pfn_hi, wq_block_pfn_lo;</div><div class='add'>+	u32 wq_page_pfn_hi, wq_page_pfn_lo;</div><div class='add'>+	u16 pi_start, ci_start;</div><div class='add'>+</div><div class='add'>+	ci_start = (rq-&gt;wq.cons_idx &amp; rq-&gt;wq.idx_mask) &lt;&lt; HINIC3_NORMAL_RQ_WQE;</div><div class='add'>+	pi_start = (rq-&gt;wq.prod_idx &amp; rq-&gt;wq.idx_mask) &lt;&lt; HINIC3_NORMAL_RQ_WQE;</div><div class='add'>+</div><div class='add'>+	hinic3_rq_prepare_ctxt_get_wq_info(rq, &amp;wq_page_pfn_hi, &amp;wq_page_pfn_lo,</div><div class='add'>+					   &amp;wq_block_pfn_hi, &amp;wq_block_pfn_lo);</div><div class='add'>+</div><div class='add'>+	rq_ctxt-&gt;ci_pi =</div><div class='add'>+		cpu_to_le32(RQ_CTXT_CI_PI_SET(ci_start, CI_IDX) |</div><div class='add'>+			    RQ_CTXT_CI_PI_SET(pi_start, PI_IDX));</div><div class='add'>+</div><div class='add'>+	rq_ctxt-&gt;ceq_attr =</div><div class='add'>+		cpu_to_le32(RQ_CTXT_CEQ_ATTR_SET(0, EN) |</div><div class='add'>+			    RQ_CTXT_CEQ_ATTR_SET(rq-&gt;msix_entry_idx, INTR));</div><div class='add'>+</div><div class='add'>+	rq_ctxt-&gt;wq_pfn_hi_type_owner =</div><div class='add'>+		cpu_to_le32(RQ_CTXT_WQ_PAGE_SET(wq_page_pfn_hi, HI_PFN) |</div><div class='add'>+			    RQ_CTXT_WQ_PAGE_SET(1, OWNER));</div><div class='add'>+</div><div class='add'>+	/* use 16Byte WQE */</div><div class='add'>+	rq_ctxt-&gt;wq_pfn_hi_type_owner |=</div><div class='add'>+		cpu_to_le32(RQ_CTXT_WQ_PAGE_SET(2, WQE_TYPE));</div><div class='add'>+	rq_ctxt-&gt;cqe_sge_len = cpu_to_le32(RQ_CTXT_CQE_LEN_SET(1, CQE_LEN));</div><div class='add'>+</div><div class='add'>+	rq_ctxt-&gt;wq_pfn_lo = cpu_to_le32(wq_page_pfn_lo);</div><div class='add'>+</div><div class='add'>+	rq_ctxt-&gt;pref_cache =</div><div class='add'>+		cpu_to_le32(RQ_CTXT_PREF_SET(RQ_WQ_PREFETCH_MIN, CACHE_MIN) |</div><div class='add'>+			    RQ_CTXT_PREF_SET(RQ_WQ_PREFETCH_MAX, CACHE_MAX) |</div><div class='add'>+			    RQ_CTXT_PREF_SET(RQ_WQ_PREFETCH_THRESHOLD, CACHE_THRESHOLD));</div><div class='add'>+</div><div class='add'>+	rq_ctxt-&gt;pref_ci_owner =</div><div class='add'>+		cpu_to_le32(RQ_CTXT_PREF_SET(SQ_CTXT_PREF_CI_HI(ci_start), CI_HI) |</div><div class='add'>+			    RQ_CTXT_PREF_SET(1, OWNER));</div><div class='add'>+</div><div class='add'>+	rq_ctxt-&gt;pref_wq_pfn_hi_ci =</div><div class='add'>+		cpu_to_le32(RQ_CTXT_PREF_SET(wq_page_pfn_hi, WQ_PFN_HI) |</div><div class='add'>+			    RQ_CTXT_PREF_SET(ci_start, CI_LOW));</div><div class='add'>+</div><div class='add'>+	rq_ctxt-&gt;pref_wq_pfn_lo = cpu_to_le32(wq_page_pfn_lo);</div><div class='add'>+</div><div class='add'>+	rq_ctxt-&gt;wq_block_pfn_hi =</div><div class='add'>+		cpu_to_le32(RQ_CTXT_WQ_BLOCK_SET(wq_block_pfn_hi, PFN_HI));</div><div class='add'>+</div><div class='add'>+	rq_ctxt-&gt;wq_block_pfn_lo = cpu_to_le32(wq_block_pfn_lo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_sq_ctxts(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	struct hinic3_sq_ctxt_block *sq_ctxt_block;</div><div class='add'>+	u16 q_id, curr_id, max_ctxts, i;</div><div class='add'>+	struct hinic3_sq_ctxt *sq_ctxt;</div><div class='add'>+	struct hinic3_cmd_buf *cmd_buf;</div><div class='add'>+	struct hinic3_io_queue *sq;</div><div class='add'>+	__le64 out_param;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	cmd_buf = hinic3_alloc_cmd_buf(hwdev);</div><div class='add'>+	if (!cmd_buf) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to allocate cmd buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	q_id = 0;</div><div class='add'>+	while (q_id &lt; nic_io-&gt;num_qps) {</div><div class='add'>+		sq_ctxt_block = cmd_buf-&gt;buf;</div><div class='add'>+		sq_ctxt = sq_ctxt_block-&gt;sq_ctxt;</div><div class='add'>+</div><div class='add'>+		max_ctxts = (nic_io-&gt;num_qps - q_id) &gt; HINIC3_Q_CTXT_MAX ?</div><div class='add'>+			     HINIC3_Q_CTXT_MAX : (nic_io-&gt;num_qps - q_id);</div><div class='add'>+</div><div class='add'>+		hinic3_qp_prepare_cmdq_header(&amp;sq_ctxt_block-&gt;cmdq_hdr,</div><div class='add'>+					      HINIC3_QP_CTXT_TYPE_SQ, max_ctxts,</div><div class='add'>+					      q_id);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; max_ctxts; i++) {</div><div class='add'>+			curr_id = q_id + i;</div><div class='add'>+			sq = &amp;nic_io-&gt;sq[curr_id];</div><div class='add'>+			hinic3_sq_prepare_ctxt(sq, curr_id, &amp;sq_ctxt[i]);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hinic3_cmdq_buf_swab32(sq_ctxt_block, sizeof(*sq_ctxt_block));</div><div class='add'>+</div><div class='add'>+		cmd_buf-&gt;size = cpu_to_le16(SQ_CTXT_SIZE(max_ctxts));</div><div class='add'>+		err = hinic3_cmdq_direct_resp(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+					      L2NIC_UCODE_CMD_MODIFY_QUEUE_CTX,</div><div class='add'>+					      cmd_buf, &amp;out_param);</div><div class='add'>+		if (err || out_param) {</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Failed to set SQ ctxts, err: %d, out_param: 0x%llx\n",</div><div class='add'>+				err, out_param);</div><div class='add'>+			err = -EFAULT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		q_id += max_ctxts;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_free_cmd_buf(hwdev, cmd_buf);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_rq_ctxts(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	struct hinic3_rq_ctxt_block *rq_ctxt_block;</div><div class='add'>+	u16 q_id, curr_id, max_ctxts, i;</div><div class='add'>+	struct hinic3_rq_ctxt *rq_ctxt;</div><div class='add'>+	struct hinic3_cmd_buf *cmd_buf;</div><div class='add'>+	struct hinic3_io_queue *rq;</div><div class='add'>+	__le64 out_param;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	cmd_buf = hinic3_alloc_cmd_buf(hwdev);</div><div class='add'>+	if (!cmd_buf) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to allocate cmd buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	q_id = 0;</div><div class='add'>+	while (q_id &lt; nic_io-&gt;num_qps) {</div><div class='add'>+		rq_ctxt_block = cmd_buf-&gt;buf;</div><div class='add'>+		rq_ctxt = rq_ctxt_block-&gt;rq_ctxt;</div><div class='add'>+</div><div class='add'>+		max_ctxts = (nic_io-&gt;num_qps - q_id) &gt; HINIC3_Q_CTXT_MAX ?</div><div class='add'>+				HINIC3_Q_CTXT_MAX : (nic_io-&gt;num_qps - q_id);</div><div class='add'>+</div><div class='add'>+		hinic3_qp_prepare_cmdq_header(&amp;rq_ctxt_block-&gt;cmdq_hdr,</div><div class='add'>+					      HINIC3_QP_CTXT_TYPE_RQ, max_ctxts,</div><div class='add'>+					      q_id);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; max_ctxts; i++) {</div><div class='add'>+			curr_id = q_id + i;</div><div class='add'>+			rq = &amp;nic_io-&gt;rq[curr_id];</div><div class='add'>+			hinic3_rq_prepare_ctxt(rq, &amp;rq_ctxt[i]);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hinic3_cmdq_buf_swab32(rq_ctxt_block, sizeof(*rq_ctxt_block));</div><div class='add'>+</div><div class='add'>+		cmd_buf-&gt;size = cpu_to_le16(RQ_CTXT_SIZE(max_ctxts));</div><div class='add'>+</div><div class='add'>+		err = hinic3_cmdq_direct_resp(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+					      L2NIC_UCODE_CMD_MODIFY_QUEUE_CTX,</div><div class='add'>+					      cmd_buf, &amp;out_param);</div><div class='add'>+		if (err || out_param) {</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Failed to set RQ ctxts, err: %d, out_param: 0x%llx\n",</div><div class='add'>+				err, out_param);</div><div class='add'>+			err = -EFAULT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		q_id += max_ctxts;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_free_cmd_buf(hwdev, cmd_buf);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_qp_ctxts(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = init_sq_ctxts(nic_dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = init_rq_ctxts(nic_dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clean_queue_offload_ctxt(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+				    enum hinic3_qp_ctxt_type ctxt_type)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	struct hinic3_clean_queue_ctxt *ctxt_block;</div><div class='add'>+	struct hinic3_cmd_buf *cmd_buf;</div><div class='add'>+	__le64 out_param;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd_buf = hinic3_alloc_cmd_buf(hwdev);</div><div class='add'>+	if (!cmd_buf) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to allocate cmd buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctxt_block = cmd_buf-&gt;buf;</div><div class='add'>+	ctxt_block-&gt;cmdq_hdr.num_queues = cpu_to_le16(nic_io-&gt;max_qps);</div><div class='add'>+	ctxt_block-&gt;cmdq_hdr.queue_type = cpu_to_le16(ctxt_type);</div><div class='add'>+	ctxt_block-&gt;cmdq_hdr.start_qid = 0;</div><div class='add'>+	ctxt_block-&gt;cmdq_hdr.rsvd = 0;</div><div class='add'>+	ctxt_block-&gt;rsvd = 0;</div><div class='add'>+</div><div class='add'>+	hinic3_cmdq_buf_swab32(ctxt_block, sizeof(*ctxt_block));</div><div class='add'>+</div><div class='add'>+	cmd_buf-&gt;size = cpu_to_le16(sizeof(*ctxt_block));</div><div class='add'>+</div><div class='add'>+	err = hinic3_cmdq_direct_resp(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				      L2NIC_UCODE_CMD_CLEAN_QUEUE_CTX,</div><div class='add'>+				      cmd_buf, &amp;out_param);</div><div class='add'>+	if (err || out_param) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to clean queue offload ctxts, err: %d,out_param: 0x%llx\n",</div><div class='add'>+			err, out_param);</div><div class='add'>+</div><div class='add'>+		err = -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_free_cmd_buf(hwdev, cmd_buf);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int clean_qp_offload_ctxt(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	/* clean LRO/TSO context space */</div><div class='add'>+	return clean_queue_offload_ctxt(nic_dev, HINIC3_QP_CTXT_TYPE_SQ) ||</div><div class='add'>+	       clean_queue_offload_ctxt(nic_dev, HINIC3_QP_CTXT_TYPE_RQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* init qps ctxt and set sq ci attr and arm all sq */</div><div class='add'>+int hinic3_init_qp_ctxts(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_io *nic_io = nic_dev-&gt;nic_io;</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	struct hinic3_sq_attr sq_attr;</div><div class='add'>+	u32 rq_depth;</div><div class='add'>+	u16 q_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = init_qp_ctxts(nic_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to init QP ctxts\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* clean LRO/TSO context space */</div><div class='add'>+	err = clean_qp_offload_ctxt(nic_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to clean qp offload ctxts\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rq_depth = nic_io-&gt;rq[0].wq.q_depth &lt;&lt; HINIC3_NORMAL_RQ_WQE;</div><div class='add'>+</div><div class='add'>+	err = hinic3_set_root_ctxt(hwdev, rq_depth, nic_io-&gt;sq[0].wq.q_depth,</div><div class='add'>+				   nic_io-&gt;rx_buf_len);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set root context\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; nic_io-&gt;num_qps; q_id++) {</div><div class='add'>+		sq_attr.ci_dma_base =</div><div class='add'>+			HINIC3_CI_PADDR(nic_io-&gt;ci_dma_base, q_id) &gt;&gt; 0x2;</div><div class='add'>+		sq_attr.pending_limit = HINIC3_DEFAULT_TX_CI_PENDING_LIMIT;</div><div class='add'>+		sq_attr.coalescing_time = HINIC3_DEFAULT_TX_CI_COALESCING_TIME;</div><div class='add'>+		sq_attr.intr_en = 1;</div><div class='add'>+		sq_attr.intr_idx = nic_io-&gt;sq[q_id].msix_entry_idx;</div><div class='add'>+		sq_attr.l2nic_sqn = q_id;</div><div class='add'>+		sq_attr.dma_attr_off = 0;</div><div class='add'>+		err = hinic3_set_ci_table(hwdev, &amp;sq_attr);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(hwdev-&gt;dev, "Failed to set ci table\n");</div><div class='add'>+			goto err_clean_root_ctxt;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_clean_root_ctxt:</div><div class='add'>+	hinic3_clean_root_ctxt(hwdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_qp_ctxts(struct hinic3_nic_dev *nic_dev)</div><div class='add'>+{</div><div class='add'>+	hinic3_clean_root_ctxt(nic_dev-&gt;hwdev);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h b/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h<br/>new file mode 100644<br/>index 000000000000..12eefabcf1db<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h</a></div><div class='hunk'>@@ -0,0 +1,145 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_NIC_IO_H_</div><div class='add'>+#define _HINIC3_NIC_IO_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_wq.h"</div><div class='add'>+</div><div class='add'>+struct hinic3_nic_dev;</div><div class='add'>+</div><div class='add'>+#define HINIC3_SQ_WQEBB_SHIFT      4</div><div class='add'>+#define HINIC3_RQ_WQEBB_SHIFT      3</div><div class='add'>+#define HINIC3_SQ_WQEBB_SIZE       BIT(HINIC3_SQ_WQEBB_SHIFT)</div><div class='add'>+</div><div class='add'>+/* ******************** RQ_CTRL ******************** */</div><div class='add'>+enum hinic3_rq_wqe_type {</div><div class='add'>+	HINIC3_NORMAL_RQ_WQE = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ******************** SQ_CTRL ******************** */</div><div class='add'>+#define HINIC3_TX_MSS_DEFAULT  0x3E00</div><div class='add'>+#define HINIC3_TX_MSS_MIN      0x50</div><div class='add'>+#define HINIC3_MAX_SQ_SGE      18</div><div class='add'>+</div><div class='add'>+struct hinic3_io_queue {</div><div class='add'>+	struct hinic3_wq  wq;</div><div class='add'>+	u8                owner;</div><div class='add'>+	u16               q_id;</div><div class='add'>+	u16               msix_entry_idx;</div><div class='add'>+	u8 __iomem        *db_addr;</div><div class='add'>+	u16               *cons_idx_addr;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+static inline u16 hinic3_get_sq_local_ci(const struct hinic3_io_queue *sq)</div><div class='add'>+{</div><div class='add'>+	const struct hinic3_wq *wq = &amp;sq-&gt;wq;</div><div class='add'>+</div><div class='add'>+	return wq-&gt;cons_idx &amp; wq-&gt;idx_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 hinic3_get_sq_local_pi(const struct hinic3_io_queue *sq)</div><div class='add'>+{</div><div class='add'>+	const struct hinic3_wq *wq = &amp;sq-&gt;wq;</div><div class='add'>+</div><div class='add'>+	return wq-&gt;prod_idx &amp; wq-&gt;idx_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 hinic3_get_sq_hw_ci(const struct hinic3_io_queue *sq)</div><div class='add'>+{</div><div class='add'>+	const struct hinic3_wq *wq = &amp;sq-&gt;wq;</div><div class='add'>+</div><div class='add'>+	return READ_ONCE(*sq-&gt;cons_idx_addr) &amp; wq-&gt;idx_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ******************** DB INFO ******************** */</div><div class='add'>+#define DB_INFO_QID_MASK    GENMASK(12, 0)</div><div class='add'>+#define DB_INFO_CFLAG_MASK  BIT(23)</div><div class='add'>+#define DB_INFO_COS_MASK    GENMASK(26, 24)</div><div class='add'>+#define DB_INFO_TYPE_MASK   GENMASK(31, 27)</div><div class='add'>+#define DB_INFO_SET(val, member)  \</div><div class='add'>+	FIELD_PREP(DB_INFO_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define DB_PI_LOW_MASK   0xFFU</div><div class='add'>+#define DB_PI_HIGH_MASK  0xFFU</div><div class='add'>+#define DB_PI_HI_SHIFT   8</div><div class='add'>+#define DB_PI_LOW(pi)    ((pi) &amp; DB_PI_LOW_MASK)</div><div class='add'>+#define DB_PI_HIGH(pi)   (((pi) &gt;&gt; DB_PI_HI_SHIFT) &amp; DB_PI_HIGH_MASK)</div><div class='add'>+#define DB_ADDR(q, pi)   ((u64 __iomem *)((q)-&gt;db_addr) + DB_PI_LOW(pi))</div><div class='add'>+#define DB_SRC_TYPE      1</div><div class='add'>+</div><div class='add'>+/* CFLAG_DATA_PATH */</div><div class='add'>+#define DB_CFLAG_DP_SQ   0</div><div class='add'>+#define DB_CFLAG_DP_RQ   1</div><div class='add'>+</div><div class='add'>+struct hinic3_nic_db {</div><div class='add'>+	__le32 db_info;</div><div class='add'>+	__le32 pi_hi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void hinic3_write_db(struct hinic3_io_queue *queue, int cos,</div><div class='add'>+				   u8 cflag, u16 pi)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_db db;</div><div class='add'>+</div><div class='add'>+	db.db_info =</div><div class='add'>+		cpu_to_le32(DB_INFO_SET(DB_SRC_TYPE, TYPE) |</div><div class='add'>+			    DB_INFO_SET(cflag, CFLAG) |</div><div class='add'>+			    DB_INFO_SET(cos, COS) |</div><div class='add'>+			    DB_INFO_SET(queue-&gt;q_id, QID));</div><div class='add'>+	db.pi_hi = cpu_to_le32(DB_PI_HIGH(pi));</div><div class='add'>+</div><div class='add'>+	writeq(*((u64 *)&amp;db), DB_ADDR(queue, pi));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct hinic3_dyna_qp_params {</div><div class='add'>+	u16                    num_qps;</div><div class='add'>+	u32                    sq_depth;</div><div class='add'>+	u32                    rq_depth;</div><div class='add'>+</div><div class='add'>+	struct hinic3_io_queue *sqs;</div><div class='add'>+	struct hinic3_io_queue *rqs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_nic_io {</div><div class='add'>+	struct hinic3_io_queue *sq;</div><div class='add'>+	struct hinic3_io_queue *rq;</div><div class='add'>+</div><div class='add'>+	u16                    num_qps;</div><div class='add'>+	u16                    max_qps;</div><div class='add'>+</div><div class='add'>+	/* Base address for consumer index of all tx queues. Each queue is</div><div class='add'>+	 * given a full cache line to hold its consumer index. HW updates</div><div class='add'>+	 * current consumer index as it consumes tx WQEs.</div><div class='add'>+	 */</div><div class='add'>+	void                   *ci_vaddr_base;</div><div class='add'>+	dma_addr_t             ci_dma_base;</div><div class='add'>+</div><div class='add'>+	u8 __iomem             *sqs_db_addr;</div><div class='add'>+	u8 __iomem             *rqs_db_addr;</div><div class='add'>+</div><div class='add'>+	u16                    rx_buf_len;</div><div class='add'>+	u64                    feature_cap;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hinic3_init_nic_io(struct hinic3_nic_dev *nic_dev);</div><div class='add'>+void hinic3_free_nic_io(struct hinic3_nic_dev *nic_dev);</div><div class='add'>+</div><div class='add'>+int hinic3_init_nicio_res(struct hinic3_nic_dev *nic_dev);</div><div class='add'>+void hinic3_free_nicio_res(struct hinic3_nic_dev *nic_dev);</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_qps(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+		     struct hinic3_dyna_qp_params *qp_params);</div><div class='add'>+void hinic3_free_qps(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+		     struct hinic3_dyna_qp_params *qp_params);</div><div class='add'>+void hinic3_init_qps(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+		     struct hinic3_dyna_qp_params *qp_params);</div><div class='add'>+void hinic3_uninit_qps(struct hinic3_nic_dev *nic_dev,</div><div class='add'>+		       struct hinic3_dyna_qp_params *qp_params);</div><div class='add'>+</div><div class='add'>+int hinic3_init_qp_ctxts(struct hinic3_nic_dev *nic_dev);</div><div class='add'>+void hinic3_free_qp_ctxts(struct hinic3_nic_dev *nic_dev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_pci_id_tbl.h b/drivers/net/ethernet/huawei/hinic3/hinic3_pci_id_tbl.h<br/>new file mode 100644<br/>index 000000000000..86c88d0bb4bd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_pci_id_tbl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_pci_id_tbl.h</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_PCI_ID_TBL_H_</div><div class='add'>+#define _HINIC3_PCI_ID_TBL_H_</div><div class='add'>+</div><div class='add'>+#define PCI_DEV_ID_HINIC3_VF    0x375F</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.c b/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.c<br/>new file mode 100644<br/>index 000000000000..fab9011de9ad<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.c</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_queue_common.h"</div><div class='add'>+</div><div class='add'>+void hinic3_queue_pages_init(struct hinic3_queue_pages *qpages, u32 q_depth,</div><div class='add'>+			     u32 page_size, u32 elem_size)</div><div class='add'>+{</div><div class='add'>+	u32 elem_per_page;</div><div class='add'>+</div><div class='add'>+	elem_per_page = min(page_size / elem_size, q_depth);</div><div class='add'>+</div><div class='add'>+	qpages-&gt;pages = NULL;</div><div class='add'>+	qpages-&gt;page_size = page_size;</div><div class='add'>+	qpages-&gt;num_pages = max(q_depth / elem_per_page, 1);</div><div class='add'>+	qpages-&gt;elem_size_shift = ilog2(elem_size);</div><div class='add'>+	qpages-&gt;elem_per_pg_shift = ilog2(elem_per_page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __queue_pages_free(struct hinic3_hwdev *hwdev,</div><div class='add'>+			       struct hinic3_queue_pages *qpages, u32 pg_cnt)</div><div class='add'>+{</div><div class='add'>+	while (pg_cnt &gt; 0) {</div><div class='add'>+		pg_cnt--;</div><div class='add'>+		hinic3_dma_free_coherent_align(hwdev-&gt;dev,</div><div class='add'>+					       qpages-&gt;pages + pg_cnt);</div><div class='add'>+	}</div><div class='add'>+	kfree(qpages-&gt;pages);</div><div class='add'>+	qpages-&gt;pages = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_queue_pages_free(struct hinic3_hwdev *hwdev,</div><div class='add'>+			     struct hinic3_queue_pages *qpages)</div><div class='add'>+{</div><div class='add'>+	__queue_pages_free(hwdev, qpages, qpages-&gt;num_pages);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_queue_pages_alloc(struct hinic3_hwdev *hwdev,</div><div class='add'>+			     struct hinic3_queue_pages *qpages, u32 align)</div><div class='add'>+{</div><div class='add'>+	u32 pg_idx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	qpages-&gt;pages = kcalloc(qpages-&gt;num_pages, sizeof(qpages-&gt;pages[0]),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!qpages-&gt;pages)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (align == 0)</div><div class='add'>+		align = qpages-&gt;page_size;</div><div class='add'>+</div><div class='add'>+	for (pg_idx = 0; pg_idx &lt; qpages-&gt;num_pages; pg_idx++) {</div><div class='add'>+		err = hinic3_dma_zalloc_coherent_align(hwdev-&gt;dev,</div><div class='add'>+						       qpages-&gt;page_size,</div><div class='add'>+						       align,</div><div class='add'>+						       GFP_KERNEL,</div><div class='add'>+						       qpages-&gt;pages + pg_idx);</div><div class='add'>+		if (err) {</div><div class='add'>+			__queue_pages_free(hwdev, qpages, pg_idx);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h b/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h<br/>new file mode 100644<br/>index 000000000000..ec4cae0a0929<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_QUEUE_COMMON_H_</div><div class='add'>+#define _HINIC3_QUEUE_COMMON_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_common.h"</div><div class='add'>+</div><div class='add'>+struct hinic3_hwdev;</div><div class='add'>+</div><div class='add'>+struct hinic3_queue_pages {</div><div class='add'>+	/* Array of DMA-able pages that actually holds the queue entries. */</div><div class='add'>+	struct hinic3_dma_addr_align  *pages;</div><div class='add'>+	/* Page size in bytes. */</div><div class='add'>+	u32                           page_size;</div><div class='add'>+	/* Number of pages, must be power of 2. */</div><div class='add'>+	u16                           num_pages;</div><div class='add'>+	u8                            elem_size_shift;</div><div class='add'>+	u8                            elem_per_pg_shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void hinic3_queue_pages_init(struct hinic3_queue_pages *qpages, u32 q_depth,</div><div class='add'>+			     u32 page_size, u32 elem_size);</div><div class='add'>+int hinic3_queue_pages_alloc(struct hinic3_hwdev *hwdev,</div><div class='add'>+			     struct hinic3_queue_pages *qpages, u32 align);</div><div class='add'>+void hinic3_queue_pages_free(struct hinic3_hwdev *hwdev,</div><div class='add'>+			     struct hinic3_queue_pages *qpages);</div><div class='add'>+</div><div class='add'>+/* Get pointer to queue entry at the specified index. Index does not have to be</div><div class='add'>+ * masked to queue depth, only least significant bits will be used. Also</div><div class='add'>+ * provides remaining elements in same page (including the first one) in case</div><div class='add'>+ * caller needs multiple entries.</div><div class='add'>+ */</div><div class='add'>+static inline void *get_q_element(const struct hinic3_queue_pages *qpages,</div><div class='add'>+				  u32 idx, u32 *remaining_in_page)</div><div class='add'>+{</div><div class='add'>+	const struct hinic3_dma_addr_align *page;</div><div class='add'>+	u32 page_idx, elem_idx, elem_per_pg, ofs;</div><div class='add'>+	u8 shift;</div><div class='add'>+</div><div class='add'>+	shift = qpages-&gt;elem_per_pg_shift;</div><div class='add'>+	page_idx = (idx &gt;&gt; shift) &amp; (qpages-&gt;num_pages - 1);</div><div class='add'>+	elem_per_pg = 1 &lt;&lt; shift;</div><div class='add'>+	elem_idx = idx &amp; (elem_per_pg - 1);</div><div class='add'>+	if (remaining_in_page)</div><div class='add'>+		*remaining_in_page = elem_per_pg - elem_idx;</div><div class='add'>+	ofs = elem_idx &lt;&lt; qpages-&gt;elem_size_shift;</div><div class='add'>+	page = qpages-&gt;pages + page_idx;</div><div class='add'>+	return (char *)page-&gt;align_vaddr + ofs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_rss.c b/drivers/net/ethernet/huawei/hinic3/hinic3_rss.c<br/>new file mode 100644<br/>index 000000000000..4ff1b2f79838<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_rss.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_rss.c</a></div><div class='hunk'>@@ -0,0 +1,336 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_cmdq.h"</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_hwif.h"</div><div class='add'>+#include "hinic3_mbox.h"</div><div class='add'>+#include "hinic3_nic_cfg.h"</div><div class='add'>+#include "hinic3_nic_dev.h"</div><div class='add'>+#include "hinic3_rss.h"</div><div class='add'>+</div><div class='add'>+static void hinic3_fillout_indir_tbl(struct net_device *netdev, u16 *indir)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	u16 i, num_qps;</div><div class='add'>+</div><div class='add'>+	num_qps = nic_dev-&gt;q_params.num_qps;</div><div class='add'>+	for (i = 0; i &lt; L2NIC_RSS_INDIR_SIZE; i++)</div><div class='add'>+		indir[i] = ethtool_rxfh_indir_default(i, num_qps);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_rss_cfg(struct hinic3_hwdev *hwdev, u8 rss_en, u16 num_qps)</div><div class='add'>+{</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	struct l2nic_cmd_cfg_rss rss_cfg = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	rss_cfg.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	rss_cfg.rss_en = rss_en;</div><div class='add'>+	rss_cfg.rq_priority_number = 0;</div><div class='add'>+	rss_cfg.num_qps = num_qps;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;rss_cfg, sizeof(rss_cfg));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_CFG_RSS, &amp;msg_params);</div><div class='add'>+	if (err || rss_cfg.msg_head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set rss cfg, err: %d, status: 0x%x\n",</div><div class='add'>+			err, rss_cfg.msg_head.status);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_init_rss_parameters(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;rss_hash_type = HINIC3_RSS_HASH_ENGINE_TYPE_XOR;</div><div class='add'>+	nic_dev-&gt;rss_type.tcp_ipv6_ext = 1;</div><div class='add'>+	nic_dev-&gt;rss_type.ipv6_ext = 1;</div><div class='add'>+	nic_dev-&gt;rss_type.tcp_ipv6 = 1;</div><div class='add'>+	nic_dev-&gt;rss_type.ipv6 = 1;</div><div class='add'>+	nic_dev-&gt;rss_type.tcp_ipv4 = 1;</div><div class='add'>+	nic_dev-&gt;rss_type.ipv4 = 1;</div><div class='add'>+	nic_dev-&gt;rss_type.udp_ipv6 = 1;</div><div class='add'>+	nic_dev-&gt;rss_type.udp_ipv4 = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void decide_num_qps(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	unsigned int dev_cpus;</div><div class='add'>+</div><div class='add'>+	dev_cpus = netif_get_num_default_rss_queues();</div><div class='add'>+	nic_dev-&gt;q_params.num_qps = min(dev_cpus, nic_dev-&gt;max_qps);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int alloc_rss_resource(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;rss_hkey = kmalloc_array(L2NIC_RSS_KEY_SIZE,</div><div class='add'>+					  sizeof(nic_dev-&gt;rss_hkey[0]),</div><div class='add'>+					  GFP_KERNEL);</div><div class='add'>+	if (!nic_dev-&gt;rss_hkey)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	netdev_rss_key_fill(nic_dev-&gt;rss_hkey, L2NIC_RSS_KEY_SIZE);</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;rss_indir = kcalloc(L2NIC_RSS_INDIR_SIZE, sizeof(u16),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+	if (!nic_dev-&gt;rss_indir) {</div><div class='add'>+		kfree(nic_dev-&gt;rss_hkey);</div><div class='add'>+		nic_dev-&gt;rss_hkey = NULL;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_rss_set_indir_tbl(struct hinic3_hwdev *hwdev,</div><div class='add'>+				    const u16 *indir_table)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_rss_set_indir_tbl *indir_tbl;</div><div class='add'>+	struct hinic3_cmd_buf *cmd_buf;</div><div class='add'>+	__le64 out_param;</div><div class='add'>+	int err;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	cmd_buf = hinic3_alloc_cmd_buf(hwdev);</div><div class='add'>+	if (!cmd_buf) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to allocate cmd buf\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd_buf-&gt;size = cpu_to_le16(sizeof(struct l2nic_cmd_rss_set_indir_tbl));</div><div class='add'>+	indir_tbl = cmd_buf-&gt;buf;</div><div class='add'>+	memset(indir_tbl, 0, sizeof(*indir_tbl));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; L2NIC_RSS_INDIR_SIZE; i++)</div><div class='add'>+		indir_tbl-&gt;entry[i] = cpu_to_le16(indir_table[i]);</div><div class='add'>+</div><div class='add'>+	hinic3_cmdq_buf_swab32(indir_tbl, sizeof(*indir_tbl));</div><div class='add'>+</div><div class='add'>+	err = hinic3_cmdq_direct_resp(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				      L2NIC_UCODE_CMD_SET_RSS_INDIR_TBL,</div><div class='add'>+				      cmd_buf, &amp;out_param);</div><div class='add'>+	if (err || out_param) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set rss indir table\n");</div><div class='add'>+		err = -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hinic3_free_cmd_buf(hwdev, cmd_buf);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_set_rss_type(struct hinic3_hwdev *hwdev,</div><div class='add'>+			       struct hinic3_rss_type rss_type)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_set_rss_ctx_tbl ctx_tbl = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	u32 ctx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ctx_tbl.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	ctx = L2NIC_RSS_TYPE_SET(1, VALID) |</div><div class='add'>+	      L2NIC_RSS_TYPE_SET(rss_type.ipv4, IPV4) |</div><div class='add'>+	      L2NIC_RSS_TYPE_SET(rss_type.ipv6, IPV6) |</div><div class='add'>+	      L2NIC_RSS_TYPE_SET(rss_type.ipv6_ext, IPV6_EXT) |</div><div class='add'>+	      L2NIC_RSS_TYPE_SET(rss_type.tcp_ipv4, TCP_IPV4) |</div><div class='add'>+	      L2NIC_RSS_TYPE_SET(rss_type.tcp_ipv6, TCP_IPV6) |</div><div class='add'>+	      L2NIC_RSS_TYPE_SET(rss_type.tcp_ipv6_ext, TCP_IPV6_EXT) |</div><div class='add'>+	      L2NIC_RSS_TYPE_SET(rss_type.udp_ipv4, UDP_IPV4) |</div><div class='add'>+	      L2NIC_RSS_TYPE_SET(rss_type.udp_ipv6, UDP_IPV6);</div><div class='add'>+	ctx_tbl.context = ctx;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;ctx_tbl, sizeof(ctx_tbl));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_SET_RSS_CTX_TBL, &amp;msg_params);</div><div class='add'>+</div><div class='add'>+	if (ctx_tbl.msg_head.status == MGMT_STATUS_CMD_UNSUPPORTED) {</div><div class='add'>+		return MGMT_STATUS_CMD_UNSUPPORTED;</div><div class='add'>+	} else if (err || ctx_tbl.msg_head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "mgmt Failed to set rss context offload, err: %d, status: 0x%x\n",</div><div class='add'>+			err, ctx_tbl.msg_head.status);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_rss_cfg_hash_type(struct hinic3_hwdev *hwdev, u8 opcode,</div><div class='add'>+				    enum hinic3_rss_hash_type *type)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_cfg_rss_engine hash_type_cmd = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hash_type_cmd.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	hash_type_cmd.opcode = opcode;</div><div class='add'>+</div><div class='add'>+	if (opcode == MGMT_MSG_CMD_OP_SET)</div><div class='add'>+		hash_type_cmd.hash_engine = *type;</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;hash_type_cmd,</div><div class='add'>+				     sizeof(hash_type_cmd));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_CFG_RSS_HASH_ENGINE,</div><div class='add'>+				       &amp;msg_params);</div><div class='add'>+	if (err || hash_type_cmd.msg_head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to %s hash engine, err: %d, status: 0x%x\n",</div><div class='add'>+			opcode == MGMT_MSG_CMD_OP_SET ? "set" : "get",</div><div class='add'>+			err, hash_type_cmd.msg_head.status);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (opcode == MGMT_MSG_CMD_OP_GET)</div><div class='add'>+		*type = hash_type_cmd.hash_engine;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_rss_set_hash_type(struct hinic3_hwdev *hwdev,</div><div class='add'>+				    enum hinic3_rss_hash_type type)</div><div class='add'>+{</div><div class='add'>+	return hinic3_rss_cfg_hash_type(hwdev, MGMT_MSG_CMD_OP_SET, &amp;type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_config_rss_hw_resource(struct net_device *netdev,</div><div class='add'>+					 u16 *indir_tbl)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_rss_set_indir_tbl(nic_dev-&gt;hwdev, indir_tbl);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_set_rss_type(nic_dev-&gt;hwdev, nic_dev-&gt;rss_type);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return hinic3_rss_set_hash_type(nic_dev-&gt;hwdev, nic_dev-&gt;rss_hash_type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_rss_cfg_hash_key(struct hinic3_hwdev *hwdev, u8 opcode,</div><div class='add'>+				   u8 *key)</div><div class='add'>+{</div><div class='add'>+	struct l2nic_cmd_cfg_rss_hash_key hash_key = {};</div><div class='add'>+	struct mgmt_msg_params msg_params = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hash_key.func_id = hinic3_global_func_id(hwdev);</div><div class='add'>+	hash_key.opcode = opcode;</div><div class='add'>+</div><div class='add'>+	if (opcode == MGMT_MSG_CMD_OP_SET)</div><div class='add'>+		memcpy(hash_key.key, key, L2NIC_RSS_KEY_SIZE);</div><div class='add'>+</div><div class='add'>+	mgmt_msg_params_init_default(&amp;msg_params, &amp;hash_key, sizeof(hash_key));</div><div class='add'>+</div><div class='add'>+	err = hinic3_send_mbox_to_mgmt(hwdev, MGMT_MOD_L2NIC,</div><div class='add'>+				       L2NIC_CMD_CFG_RSS_HASH_KEY, &amp;msg_params);</div><div class='add'>+	if (err || hash_key.msg_head.status) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to %s hash key, err: %d, status: 0x%x\n",</div><div class='add'>+			opcode == MGMT_MSG_CMD_OP_SET ? "set" : "get",</div><div class='add'>+			err, hash_key.msg_head.status);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (opcode == MGMT_MSG_CMD_OP_GET)</div><div class='add'>+		memcpy(key, hash_key.key, L2NIC_RSS_KEY_SIZE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_rss_set_hash_key(struct hinic3_hwdev *hwdev, u8 *key)</div><div class='add'>+{</div><div class='add'>+	return hinic3_rss_cfg_hash_key(hwdev, MGMT_MSG_CMD_OP_SET, key);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_set_hw_rss_parameters(struct net_device *netdev, u8 rss_en)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_rss_set_hash_key(nic_dev-&gt;hwdev, nic_dev-&gt;rss_hkey);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	hinic3_fillout_indir_tbl(netdev, nic_dev-&gt;rss_indir);</div><div class='add'>+</div><div class='add'>+	err = hinic3_config_rss_hw_resource(netdev, nic_dev-&gt;rss_indir);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_rss_cfg(nic_dev-&gt;hwdev, rss_en, nic_dev-&gt;q_params.num_qps);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_rss_init(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return hinic3_set_hw_rss_parameters(netdev, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_rss_uninit(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	hinic3_rss_cfg(nic_dev-&gt;hwdev, 0, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_clear_rss_config(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	kfree(nic_dev-&gt;rss_hkey);</div><div class='add'>+	nic_dev-&gt;rss_hkey = NULL;</div><div class='add'>+</div><div class='add'>+	kfree(nic_dev-&gt;rss_indir);</div><div class='add'>+	nic_dev-&gt;rss_indir = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_try_to_enable_rss(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;max_qps = hinic3_func_max_qnum(hwdev);</div><div class='add'>+	if (nic_dev-&gt;max_qps &lt;= 1 ||</div><div class='add'>+	    !hinic3_test_support(nic_dev, HINIC3_NIC_F_RSS))</div><div class='add'>+		goto err_reset_q_params;</div><div class='add'>+</div><div class='add'>+	err = alloc_rss_resource(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		nic_dev-&gt;max_qps = 1;</div><div class='add'>+		goto err_reset_q_params;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_bit(HINIC3_RSS_ENABLE, &amp;nic_dev-&gt;flags);</div><div class='add'>+	decide_num_qps(netdev);</div><div class='add'>+	hinic3_init_rss_parameters(netdev);</div><div class='add'>+	err = hinic3_set_hw_rss_parameters(netdev, 0);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Failed to set hardware rss parameters\n");</div><div class='add'>+		hinic3_clear_rss_config(netdev);</div><div class='add'>+		nic_dev-&gt;max_qps = 1;</div><div class='add'>+		goto err_reset_q_params;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_reset_q_params:</div><div class='add'>+	clear_bit(HINIC3_RSS_ENABLE, &amp;nic_dev-&gt;flags);</div><div class='add'>+	nic_dev-&gt;q_params.num_qps = nic_dev-&gt;max_qps;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_rss.h b/drivers/net/ethernet/huawei/hinic3/hinic3_rss.h<br/>new file mode 100644<br/>index 000000000000..78d82c2aca06<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_rss.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_rss.h</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_RSS_H_</div><div class='add'>+#define _HINIC3_RSS_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+int hinic3_rss_init(struct net_device *netdev);</div><div class='add'>+void hinic3_rss_uninit(struct net_device *netdev);</div><div class='add'>+void hinic3_try_to_enable_rss(struct net_device *netdev);</div><div class='add'>+void hinic3_clear_rss_config(struct net_device *netdev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_rx.c b/drivers/net/ethernet/huawei/hinic3/hinic3_rx.c<br/>new file mode 100644<br/>index 000000000000..16c00c3bb1ed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_rx.c</a></div><div class='hunk'>@@ -0,0 +1,551 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;net/gro.h&gt;</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_nic_dev.h"</div><div class='add'>+#include "hinic3_nic_io.h"</div><div class='add'>+#include "hinic3_rx.h"</div><div class='add'>+</div><div class='add'>+#define HINIC3_RX_HDR_SIZE              256</div><div class='add'>+#define HINIC3_RX_BUFFER_WRITE          16</div><div class='add'>+</div><div class='add'>+#define HINIC3_RX_TCP_PKT               0x3</div><div class='add'>+#define HINIC3_RX_UDP_PKT               0x4</div><div class='add'>+#define HINIC3_RX_SCTP_PKT              0x7</div><div class='add'>+</div><div class='add'>+#define HINIC3_RX_IPV4_PKT              0</div><div class='add'>+#define HINIC3_RX_IPV6_PKT              1</div><div class='add'>+#define HINIC3_RX_INVALID_IP_TYPE       2</div><div class='add'>+</div><div class='add'>+#define HINIC3_RX_PKT_FORMAT_NON_TUNNEL 0</div><div class='add'>+#define HINIC3_RX_PKT_FORMAT_VXLAN      1</div><div class='add'>+</div><div class='add'>+#define HINIC3_LRO_PKT_HDR_LEN_IPV4     66</div><div class='add'>+#define HINIC3_LRO_PKT_HDR_LEN_IPV6     86</div><div class='add'>+#define HINIC3_LRO_PKT_HDR_LEN(cqe) \</div><div class='add'>+	(RQ_CQE_OFFOLAD_TYPE_GET((cqe)-&gt;offload_type, IP_TYPE) == \</div><div class='add'>+	 HINIC3_RX_IPV6_PKT ? HINIC3_LRO_PKT_HDR_LEN_IPV6 : \</div><div class='add'>+	 HINIC3_LRO_PKT_HDR_LEN_IPV4)</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_rxqs(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct pci_dev *pdev = nic_dev-&gt;pdev;</div><div class='add'>+	u16 num_rxqs = nic_dev-&gt;max_qps;</div><div class='add'>+	struct hinic3_rxq *rxq;</div><div class='add'>+	u16 q_id;</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;rxqs = kcalloc(num_rxqs, sizeof(*nic_dev-&gt;rxqs), GFP_KERNEL);</div><div class='add'>+	if (!nic_dev-&gt;rxqs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; num_rxqs; q_id++) {</div><div class='add'>+		rxq = &amp;nic_dev-&gt;rxqs[q_id];</div><div class='add'>+		rxq-&gt;netdev = netdev;</div><div class='add'>+		rxq-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+		rxq-&gt;q_id = q_id;</div><div class='add'>+		rxq-&gt;buf_len = nic_dev-&gt;rx_buf_len;</div><div class='add'>+		rxq-&gt;buf_len_shift = ilog2(nic_dev-&gt;rx_buf_len);</div><div class='add'>+		rxq-&gt;q_depth = nic_dev-&gt;q_params.rq_depth;</div><div class='add'>+		rxq-&gt;q_mask = nic_dev-&gt;q_params.rq_depth - 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_rxqs(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	kfree(nic_dev-&gt;rxqs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rx_alloc_mapped_page(struct page_pool *page_pool,</div><div class='add'>+				struct hinic3_rx_info *rx_info, u16 buf_len)</div><div class='add'>+{</div><div class='add'>+	struct page *page;</div><div class='add'>+	u32 page_offset;</div><div class='add'>+</div><div class='add'>+	if (likely(rx_info-&gt;page))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	page = page_pool_dev_alloc_frag(page_pool, &amp;page_offset, buf_len);</div><div class='add'>+	if (unlikely(!page))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rx_info-&gt;page = page;</div><div class='add'>+	rx_info-&gt;page_offset = page_offset;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Associate fixed completion element to every wqe in the rq. Every rq wqe will</div><div class='add'>+ * always post completion to the same place.</div><div class='add'>+ */</div><div class='add'>+static void rq_associate_cqes(struct hinic3_rxq *rxq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_queue_pages *qpages;</div><div class='add'>+	struct hinic3_rq_wqe *rq_wqe;</div><div class='add'>+	dma_addr_t cqe_dma;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	qpages = &amp;rxq-&gt;rq-&gt;wq.qpages;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; rxq-&gt;q_depth; i++) {</div><div class='add'>+		rq_wqe = get_q_element(qpages, i, NULL);</div><div class='add'>+		cqe_dma = rxq-&gt;cqe_start_paddr +</div><div class='add'>+			  i * sizeof(struct hinic3_rq_cqe);</div><div class='add'>+		rq_wqe-&gt;cqe_hi_addr = cpu_to_le32(upper_32_bits(cqe_dma));</div><div class='add'>+		rq_wqe-&gt;cqe_lo_addr = cpu_to_le32(lower_32_bits(cqe_dma));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rq_wqe_buf_set(struct hinic3_io_queue *rq, uint32_t wqe_idx,</div><div class='add'>+			   dma_addr_t dma_addr, u16 len)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_rq_wqe *rq_wqe;</div><div class='add'>+</div><div class='add'>+	rq_wqe = get_q_element(&amp;rq-&gt;wq.qpages, wqe_idx, NULL);</div><div class='add'>+	rq_wqe-&gt;buf_hi_addr = cpu_to_le32(upper_32_bits(dma_addr));</div><div class='add'>+	rq_wqe-&gt;buf_lo_addr = cpu_to_le32(lower_32_bits(dma_addr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 hinic3_rx_fill_buffers(struct hinic3_rxq *rxq)</div><div class='add'>+{</div><div class='add'>+	u32 i, free_wqebbs = rxq-&gt;delta - 1;</div><div class='add'>+	struct hinic3_rx_info *rx_info;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; free_wqebbs; i++) {</div><div class='add'>+		rx_info = &amp;rxq-&gt;rx_info[rxq-&gt;next_to_update];</div><div class='add'>+</div><div class='add'>+		err = rx_alloc_mapped_page(rxq-&gt;page_pool, rx_info,</div><div class='add'>+					   rxq-&gt;buf_len);</div><div class='add'>+		if (unlikely(err))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		dma_addr = page_pool_get_dma_addr(rx_info-&gt;page) +</div><div class='add'>+			rx_info-&gt;page_offset;</div><div class='add'>+		rq_wqe_buf_set(rxq-&gt;rq, rxq-&gt;next_to_update, dma_addr,</div><div class='add'>+			       rxq-&gt;buf_len);</div><div class='add'>+		rxq-&gt;next_to_update = (rxq-&gt;next_to_update + 1) &amp; rxq-&gt;q_mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (likely(i)) {</div><div class='add'>+		hinic3_write_db(rxq-&gt;rq, rxq-&gt;q_id &amp; 3, DB_CFLAG_DP_RQ,</div><div class='add'>+				rxq-&gt;next_to_update &lt;&lt; HINIC3_NORMAL_RQ_WQE);</div><div class='add'>+		rxq-&gt;delta -= i;</div><div class='add'>+		rxq-&gt;next_to_alloc = rxq-&gt;next_to_update;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 hinic3_alloc_rx_buffers(struct hinic3_dyna_rxq_res *rqres,</div><div class='add'>+				   u32 rq_depth, u16 buf_len)</div><div class='add'>+{</div><div class='add'>+	u32 free_wqebbs = rq_depth - 1;</div><div class='add'>+	u32 idx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; free_wqebbs; idx++) {</div><div class='add'>+		err = rx_alloc_mapped_page(rqres-&gt;page_pool,</div><div class='add'>+					   &amp;rqres-&gt;rx_info[idx], buf_len);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_free_rx_buffers(struct hinic3_dyna_rxq_res *rqres,</div><div class='add'>+				   u32 q_depth)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_rx_info *rx_info;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	/* Free all the Rx ring sk_buffs */</div><div class='add'>+	for (i = 0; i &lt; q_depth; i++) {</div><div class='add'>+		rx_info = &amp;rqres-&gt;rx_info[i];</div><div class='add'>+</div><div class='add'>+		if (rx_info-&gt;page) {</div><div class='add'>+			page_pool_put_full_page(rqres-&gt;page_pool,</div><div class='add'>+						rx_info-&gt;page, false);</div><div class='add'>+			rx_info-&gt;page = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_add_rx_frag(struct hinic3_rxq *rxq,</div><div class='add'>+			       struct hinic3_rx_info *rx_info,</div><div class='add'>+			       struct sk_buff *skb, u32 size)</div><div class='add'>+{</div><div class='add'>+	struct page *page;</div><div class='add'>+	u8 *va;</div><div class='add'>+</div><div class='add'>+	page = rx_info-&gt;page;</div><div class='add'>+	va = (u8 *)page_address(page) + rx_info-&gt;page_offset;</div><div class='add'>+	net_prefetch(va);</div><div class='add'>+</div><div class='add'>+	page_pool_dma_sync_for_cpu(rxq-&gt;page_pool, page, rx_info-&gt;page_offset,</div><div class='add'>+				   rxq-&gt;buf_len);</div><div class='add'>+</div><div class='add'>+	if (size &lt;= HINIC3_RX_HDR_SIZE &amp;&amp; !skb_is_nonlinear(skb)) {</div><div class='add'>+		memcpy(__skb_put(skb, size), va,</div><div class='add'>+		       ALIGN(size, sizeof(long)));</div><div class='add'>+		page_pool_put_full_page(rxq-&gt;page_pool, page, false);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_add_rx_frag(skb, skb_shinfo(skb)-&gt;nr_frags, page,</div><div class='add'>+			rx_info-&gt;page_offset, size, rxq-&gt;buf_len);</div><div class='add'>+	skb_mark_for_recycle(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void packaging_skb(struct hinic3_rxq *rxq, struct sk_buff *skb,</div><div class='add'>+			  u32 sge_num, u32 pkt_len)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_rx_info *rx_info;</div><div class='add'>+	u32 temp_pkt_len = pkt_len;</div><div class='add'>+	u32 temp_sge_num = sge_num;</div><div class='add'>+	u32 sw_ci;</div><div class='add'>+	u32 size;</div><div class='add'>+</div><div class='add'>+	sw_ci = rxq-&gt;cons_idx &amp; rxq-&gt;q_mask;</div><div class='add'>+	while (temp_sge_num) {</div><div class='add'>+		rx_info = &amp;rxq-&gt;rx_info[sw_ci];</div><div class='add'>+		sw_ci = (sw_ci + 1) &amp; rxq-&gt;q_mask;</div><div class='add'>+		if (unlikely(temp_pkt_len &gt; rxq-&gt;buf_len)) {</div><div class='add'>+			size = rxq-&gt;buf_len;</div><div class='add'>+			temp_pkt_len -= rxq-&gt;buf_len;</div><div class='add'>+		} else {</div><div class='add'>+			size = temp_pkt_len;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hinic3_add_rx_frag(rxq, rx_info, skb, size);</div><div class='add'>+</div><div class='add'>+		/* clear contents of buffer_info */</div><div class='add'>+		rx_info-&gt;page = NULL;</div><div class='add'>+		temp_sge_num--;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 hinic3_get_sge_num(struct hinic3_rxq *rxq, u32 pkt_len)</div><div class='add'>+{</div><div class='add'>+	u32 sge_num;</div><div class='add'>+</div><div class='add'>+	sge_num = pkt_len &gt;&gt; rxq-&gt;buf_len_shift;</div><div class='add'>+	sge_num += (pkt_len &amp; (rxq-&gt;buf_len - 1)) ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	return sge_num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *hinic3_fetch_rx_buffer(struct hinic3_rxq *rxq,</div><div class='add'>+					      u32 pkt_len)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 sge_num;</div><div class='add'>+</div><div class='add'>+	skb = napi_alloc_skb(&amp;rxq-&gt;irq_cfg-&gt;napi, HINIC3_RX_HDR_SIZE);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	sge_num = hinic3_get_sge_num(rxq, pkt_len);</div><div class='add'>+</div><div class='add'>+	net_prefetchw(skb-&gt;data);</div><div class='add'>+	packaging_skb(rxq, skb, sge_num, pkt_len);</div><div class='add'>+</div><div class='add'>+	rxq-&gt;cons_idx += sge_num;</div><div class='add'>+	rxq-&gt;delta += sge_num;</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_pull_tail(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[0];</div><div class='add'>+	unsigned int pull_len;</div><div class='add'>+	unsigned char *va;</div><div class='add'>+</div><div class='add'>+	va = skb_frag_address(frag);</div><div class='add'>+</div><div class='add'>+	/* we need the header to contain the greater of either ETH_HLEN or</div><div class='add'>+	 * 60 bytes if the skb-&gt;len is less than 60 for skb_pad.</div><div class='add'>+	 */</div><div class='add'>+	pull_len = eth_get_headlen(skb-&gt;dev, va, HINIC3_RX_HDR_SIZE);</div><div class='add'>+</div><div class='add'>+	/* align pull length to size of long to optimize memcpy performance */</div><div class='add'>+	skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));</div><div class='add'>+</div><div class='add'>+	/* update all of the pointers */</div><div class='add'>+	skb_frag_size_sub(frag, pull_len);</div><div class='add'>+	skb_frag_off_add(frag, pull_len);</div><div class='add'>+</div><div class='add'>+	skb-&gt;data_len -= pull_len;</div><div class='add'>+	skb-&gt;tail += pull_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_rx_csum(struct hinic3_rxq *rxq, u32 offload_type,</div><div class='add'>+			   u32 status, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	u32 pkt_fmt = RQ_CQE_OFFOLAD_TYPE_GET(offload_type, TUNNEL_PKT_FORMAT);</div><div class='add'>+	u32 pkt_type = RQ_CQE_OFFOLAD_TYPE_GET(offload_type, PKT_TYPE);</div><div class='add'>+	u32 ip_type = RQ_CQE_OFFOLAD_TYPE_GET(offload_type, IP_TYPE);</div><div class='add'>+	u32 csum_err = RQ_CQE_STATUS_GET(status, CSUM_ERR);</div><div class='add'>+	struct net_device *netdev = rxq-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	if (!(netdev-&gt;features &amp; NETIF_F_RXCSUM))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (unlikely(csum_err)) {</div><div class='add'>+		/* pkt type is recognized by HW, and csum is wrong */</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ip_type == HINIC3_RX_INVALID_IP_TYPE ||</div><div class='add'>+	    !(pkt_fmt == HINIC3_RX_PKT_FORMAT_NON_TUNNEL ||</div><div class='add'>+	      pkt_fmt == HINIC3_RX_PKT_FORMAT_VXLAN)) {</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (pkt_type) {</div><div class='add'>+	case HINIC3_RX_TCP_PKT:</div><div class='add'>+	case HINIC3_RX_UDP_PKT:</div><div class='add'>+	case HINIC3_RX_SCTP_PKT:</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_lro_set_gso_params(struct sk_buff *skb, u16 num_lro)</div><div class='add'>+{</div><div class='add'>+	struct ethhdr *eth = (struct ethhdr *)(skb-&gt;data);</div><div class='add'>+	__be16 proto;</div><div class='add'>+</div><div class='add'>+	proto = __vlan_get_protocol(skb, eth-&gt;h_proto, NULL);</div><div class='add'>+</div><div class='add'>+	skb_shinfo(skb)-&gt;gso_size = DIV_ROUND_UP(skb-&gt;len - skb_headlen(skb),</div><div class='add'>+						 num_lro);</div><div class='add'>+	skb_shinfo(skb)-&gt;gso_type = proto == htons(ETH_P_IP) ?</div><div class='add'>+				    SKB_GSO_TCPV4 : SKB_GSO_TCPV6;</div><div class='add'>+	skb_shinfo(skb)-&gt;gso_segs = num_lro;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int recv_one_pkt(struct hinic3_rxq *rxq, struct hinic3_rq_cqe *rx_cqe,</div><div class='add'>+			u32 pkt_len, u32 vlan_len, u32 status)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = rxq-&gt;netdev;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 offload_type;</div><div class='add'>+	u16 num_lro;</div><div class='add'>+</div><div class='add'>+	skb = hinic3_fetch_rx_buffer(rxq, pkt_len);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* place header in linear portion of buffer */</div><div class='add'>+	if (skb_is_nonlinear(skb))</div><div class='add'>+		hinic3_pull_tail(skb);</div><div class='add'>+</div><div class='add'>+	offload_type = le32_to_cpu(rx_cqe-&gt;offload_type);</div><div class='add'>+	hinic3_rx_csum(rxq, offload_type, status, skb);</div><div class='add'>+</div><div class='add'>+	num_lro = RQ_CQE_STATUS_GET(status, NUM_LRO);</div><div class='add'>+	if (num_lro)</div><div class='add'>+		hinic3_lro_set_gso_params(skb, num_lro);</div><div class='add'>+</div><div class='add'>+	skb_record_rx_queue(skb, rxq-&gt;q_id);</div><div class='add'>+	skb-&gt;protocol = eth_type_trans(skb, netdev);</div><div class='add'>+</div><div class='add'>+	if (skb_has_frag_list(skb)) {</div><div class='add'>+		napi_gro_flush(&amp;rxq-&gt;irq_cfg-&gt;napi, false);</div><div class='add'>+		netif_receive_skb(skb);</div><div class='add'>+	} else {</div><div class='add'>+		napi_gro_receive(&amp;rxq-&gt;irq_cfg-&gt;napi, skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_rxqs_res(struct net_device *netdev, u16 num_rq,</div><div class='add'>+			  u32 rq_depth, struct hinic3_dyna_rxq_res *rxqs_res)</div><div class='add'>+{</div><div class='add'>+	u64 cqe_mem_size = sizeof(struct hinic3_rq_cqe) * rq_depth;</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct page_pool_params pp_params = {};</div><div class='add'>+	struct hinic3_dyna_rxq_res *rqres;</div><div class='add'>+	u32 pkt_idx;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; num_rq; idx++) {</div><div class='add'>+		rqres = &amp;rxqs_res[idx];</div><div class='add'>+		rqres-&gt;rx_info = kcalloc(rq_depth, sizeof(*rqres-&gt;rx_info),</div><div class='add'>+					 GFP_KERNEL);</div><div class='add'>+		if (!rqres-&gt;rx_info)</div><div class='add'>+			goto err_free_rqres;</div><div class='add'>+</div><div class='add'>+		rqres-&gt;cqe_start_vaddr =</div><div class='add'>+			dma_alloc_coherent(&amp;nic_dev-&gt;pdev-&gt;dev, cqe_mem_size,</div><div class='add'>+					   &amp;rqres-&gt;cqe_start_paddr, GFP_KERNEL);</div><div class='add'>+		if (!rqres-&gt;cqe_start_vaddr) {</div><div class='add'>+			netdev_err(netdev, "Failed to alloc rxq%d rx cqe\n",</div><div class='add'>+				   idx);</div><div class='add'>+			goto err_free_rx_info;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pp_params.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;</div><div class='add'>+		pp_params.pool_size = rq_depth * nic_dev-&gt;rx_buf_len /</div><div class='add'>+				      PAGE_SIZE;</div><div class='add'>+		pp_params.nid = dev_to_node(&amp;nic_dev-&gt;pdev-&gt;dev);</div><div class='add'>+		pp_params.dev = &amp;nic_dev-&gt;pdev-&gt;dev;</div><div class='add'>+		pp_params.dma_dir = DMA_FROM_DEVICE;</div><div class='add'>+		pp_params.max_len = PAGE_SIZE;</div><div class='add'>+		rqres-&gt;page_pool = page_pool_create(&amp;pp_params);</div><div class='add'>+		if (IS_ERR(rqres-&gt;page_pool)) {</div><div class='add'>+			netdev_err(netdev, "Failed to create rxq%d page pool\n",</div><div class='add'>+				   idx);</div><div class='add'>+			goto err_free_cqe;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pkt_idx = hinic3_alloc_rx_buffers(rqres, rq_depth,</div><div class='add'>+						  nic_dev-&gt;rx_buf_len);</div><div class='add'>+		if (!pkt_idx) {</div><div class='add'>+			netdev_err(netdev, "Failed to alloc rxq%d rx buffers\n",</div><div class='add'>+				   idx);</div><div class='add'>+			goto err_destroy_page_pool;</div><div class='add'>+		}</div><div class='add'>+		rqres-&gt;next_to_alloc = pkt_idx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_destroy_page_pool:</div><div class='add'>+	page_pool_destroy(rqres-&gt;page_pool);</div><div class='add'>+err_free_cqe:</div><div class='add'>+	dma_free_coherent(&amp;nic_dev-&gt;pdev-&gt;dev, cqe_mem_size,</div><div class='add'>+			  rqres-&gt;cqe_start_vaddr,</div><div class='add'>+			  rqres-&gt;cqe_start_paddr);</div><div class='add'>+err_free_rx_info:</div><div class='add'>+	kfree(rqres-&gt;rx_info);</div><div class='add'>+err_free_rqres:</div><div class='add'>+	hinic3_free_rxqs_res(netdev, idx, rq_depth, rxqs_res);</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_rxqs_res(struct net_device *netdev, u16 num_rq,</div><div class='add'>+			  u32 rq_depth, struct hinic3_dyna_rxq_res *rxqs_res)</div><div class='add'>+{</div><div class='add'>+	u64 cqe_mem_size = sizeof(struct hinic3_rq_cqe) * rq_depth;</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_dyna_rxq_res *rqres;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; num_rq; idx++) {</div><div class='add'>+		rqres = &amp;rxqs_res[idx];</div><div class='add'>+</div><div class='add'>+		hinic3_free_rx_buffers(rqres, rq_depth);</div><div class='add'>+		page_pool_destroy(rqres-&gt;page_pool);</div><div class='add'>+		dma_free_coherent(&amp;nic_dev-&gt;pdev-&gt;dev, cqe_mem_size,</div><div class='add'>+				  rqres-&gt;cqe_start_vaddr,</div><div class='add'>+				  rqres-&gt;cqe_start_paddr);</div><div class='add'>+		kfree(rqres-&gt;rx_info);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_configure_rxqs(struct net_device *netdev, u16 num_rq,</div><div class='add'>+			  u32 rq_depth, struct hinic3_dyna_rxq_res *rxqs_res)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_dyna_rxq_res *rqres;</div><div class='add'>+	struct msix_entry *msix_entry;</div><div class='add'>+	struct hinic3_rxq *rxq;</div><div class='add'>+	u16 q_id;</div><div class='add'>+	u32 pkts;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; num_rq; q_id++) {</div><div class='add'>+		rxq = &amp;nic_dev-&gt;rxqs[q_id];</div><div class='add'>+		rqres = &amp;rxqs_res[q_id];</div><div class='add'>+		msix_entry = &amp;nic_dev-&gt;qps_msix_entries[q_id];</div><div class='add'>+</div><div class='add'>+		rxq-&gt;irq_id = msix_entry-&gt;vector;</div><div class='add'>+		rxq-&gt;msix_entry_idx = msix_entry-&gt;entry;</div><div class='add'>+		rxq-&gt;next_to_update = 0;</div><div class='add'>+		rxq-&gt;next_to_alloc = rqres-&gt;next_to_alloc;</div><div class='add'>+		rxq-&gt;q_depth = rq_depth;</div><div class='add'>+		rxq-&gt;delta = rxq-&gt;q_depth;</div><div class='add'>+		rxq-&gt;q_mask = rxq-&gt;q_depth - 1;</div><div class='add'>+		rxq-&gt;cons_idx = 0;</div><div class='add'>+</div><div class='add'>+		rxq-&gt;cqe_arr = rqres-&gt;cqe_start_vaddr;</div><div class='add'>+		rxq-&gt;cqe_start_paddr = rqres-&gt;cqe_start_paddr;</div><div class='add'>+		rxq-&gt;rx_info = rqres-&gt;rx_info;</div><div class='add'>+		rxq-&gt;page_pool = rqres-&gt;page_pool;</div><div class='add'>+</div><div class='add'>+		rxq-&gt;rq = &amp;nic_dev-&gt;nic_io-&gt;rq[rxq-&gt;q_id];</div><div class='add'>+</div><div class='add'>+		rq_associate_cqes(rxq);</div><div class='add'>+</div><div class='add'>+		pkts = hinic3_rx_fill_buffers(rxq);</div><div class='add'>+		if (!pkts) {</div><div class='add'>+			netdev_err(netdev, "Failed to fill Rx buffer\n");</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_rx_poll(struct hinic3_rxq *rxq, int budget)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(rxq-&gt;netdev);</div><div class='add'>+	u32 sw_ci, status, pkt_len, vlan_len;</div><div class='add'>+	struct hinic3_rq_cqe *rx_cqe;</div><div class='add'>+	u32 num_wqe = 0;</div><div class='add'>+	int nr_pkts = 0;</div><div class='add'>+	u16 num_lro;</div><div class='add'>+</div><div class='add'>+	while (likely(nr_pkts &lt; budget)) {</div><div class='add'>+		sw_ci = rxq-&gt;cons_idx &amp; rxq-&gt;q_mask;</div><div class='add'>+		rx_cqe = rxq-&gt;cqe_arr + sw_ci;</div><div class='add'>+		status = le32_to_cpu(rx_cqe-&gt;status);</div><div class='add'>+		if (!RQ_CQE_STATUS_GET(status, RXDONE))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* make sure we read rx_done before packet length */</div><div class='add'>+		rmb();</div><div class='add'>+</div><div class='add'>+		vlan_len = le32_to_cpu(rx_cqe-&gt;vlan_len);</div><div class='add'>+		pkt_len = RQ_CQE_SGE_GET(vlan_len, LEN);</div><div class='add'>+		if (recv_one_pkt(rxq, rx_cqe, pkt_len, vlan_len, status))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		nr_pkts++;</div><div class='add'>+		num_lro = RQ_CQE_STATUS_GET(status, NUM_LRO);</div><div class='add'>+		if (num_lro)</div><div class='add'>+			num_wqe += hinic3_get_sge_num(rxq, pkt_len);</div><div class='add'>+</div><div class='add'>+		rx_cqe-&gt;status = 0;</div><div class='add'>+</div><div class='add'>+		if (num_wqe &gt;= nic_dev-&gt;lro_replenish_thld)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rxq-&gt;delta &gt;= HINIC3_RX_BUFFER_WRITE)</div><div class='add'>+		hinic3_rx_fill_buffers(rxq);</div><div class='add'>+</div><div class='add'>+	return nr_pkts;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_rx.h b/drivers/net/ethernet/huawei/hinic3/hinic3_rx.h<br/>new file mode 100644<br/>index 000000000000..44ae841a3648<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_rx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_rx.h</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_RX_H_</div><div class='add'>+#define _HINIC3_RX_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#define RQ_CQE_OFFOLAD_TYPE_PKT_TYPE_MASK           GENMASK(4, 0)</div><div class='add'>+#define RQ_CQE_OFFOLAD_TYPE_IP_TYPE_MASK            GENMASK(6, 5)</div><div class='add'>+#define RQ_CQE_OFFOLAD_TYPE_TUNNEL_PKT_FORMAT_MASK  GENMASK(11, 8)</div><div class='add'>+#define RQ_CQE_OFFOLAD_TYPE_VLAN_EN_MASK            BIT(21)</div><div class='add'>+#define RQ_CQE_OFFOLAD_TYPE_GET(val, member) \</div><div class='add'>+	FIELD_GET(RQ_CQE_OFFOLAD_TYPE_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define RQ_CQE_SGE_VLAN_MASK  GENMASK(15, 0)</div><div class='add'>+#define RQ_CQE_SGE_LEN_MASK   GENMASK(31, 16)</div><div class='add'>+#define RQ_CQE_SGE_GET(val, member) \</div><div class='add'>+	FIELD_GET(RQ_CQE_SGE_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define RQ_CQE_STATUS_CSUM_ERR_MASK  GENMASK(15, 0)</div><div class='add'>+#define RQ_CQE_STATUS_NUM_LRO_MASK   GENMASK(23, 16)</div><div class='add'>+#define RQ_CQE_STATUS_RXDONE_MASK    BIT(31)</div><div class='add'>+#define RQ_CQE_STATUS_GET(val, member) \</div><div class='add'>+	FIELD_GET(RQ_CQE_STATUS_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+/* RX Completion information that is provided by HW for a specific RX WQE */</div><div class='add'>+struct hinic3_rq_cqe {</div><div class='add'>+	__le32 status;</div><div class='add'>+	__le32 vlan_len;</div><div class='add'>+	__le32 offload_type;</div><div class='add'>+	__le32 rsvd3;</div><div class='add'>+	__le32 rsvd4;</div><div class='add'>+	__le32 rsvd5;</div><div class='add'>+	__le32 rsvd6;</div><div class='add'>+	__le32 pkt_info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_rq_wqe {</div><div class='add'>+	__le32 buf_hi_addr;</div><div class='add'>+	__le32 buf_lo_addr;</div><div class='add'>+	__le32 cqe_hi_addr;</div><div class='add'>+	__le32 cqe_lo_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_rx_info {</div><div class='add'>+	struct page      *page;</div><div class='add'>+	u32              page_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_rxq {</div><div class='add'>+	struct net_device       *netdev;</div><div class='add'>+</div><div class='add'>+	u16                     q_id;</div><div class='add'>+	u32                     q_depth;</div><div class='add'>+	u32                     q_mask;</div><div class='add'>+</div><div class='add'>+	u16                     buf_len;</div><div class='add'>+	u32                     buf_len_shift;</div><div class='add'>+</div><div class='add'>+	u32                     cons_idx;</div><div class='add'>+	u32                     delta;</div><div class='add'>+</div><div class='add'>+	u32                     irq_id;</div><div class='add'>+	u16                     msix_entry_idx;</div><div class='add'>+</div><div class='add'>+	/* cqe_arr and rx_info are arrays of rq_depth elements. Each element is</div><div class='add'>+	 * statically associated (by index) to a specific rq_wqe.</div><div class='add'>+	 */</div><div class='add'>+	struct hinic3_rq_cqe   *cqe_arr;</div><div class='add'>+	struct hinic3_rx_info  *rx_info;</div><div class='add'>+	struct page_pool       *page_pool;</div><div class='add'>+</div><div class='add'>+	struct hinic3_io_queue *rq;</div><div class='add'>+</div><div class='add'>+	struct hinic3_irq_cfg  *irq_cfg;</div><div class='add'>+	u16                    next_to_alloc;</div><div class='add'>+	u16                    next_to_update;</div><div class='add'>+	struct device          *dev; /* device for DMA mapping */</div><div class='add'>+</div><div class='add'>+	dma_addr_t             cqe_start_paddr;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct hinic3_dyna_rxq_res {</div><div class='add'>+	u16                   next_to_alloc;</div><div class='add'>+	struct hinic3_rx_info *rx_info;</div><div class='add'>+	dma_addr_t            cqe_start_paddr;</div><div class='add'>+	void                  *cqe_start_vaddr;</div><div class='add'>+	struct page_pool      *page_pool;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_rxqs(struct net_device *netdev);</div><div class='add'>+void hinic3_free_rxqs(struct net_device *netdev);</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_rxqs_res(struct net_device *netdev, u16 num_rq,</div><div class='add'>+			  u32 rq_depth, struct hinic3_dyna_rxq_res *rxqs_res);</div><div class='add'>+void hinic3_free_rxqs_res(struct net_device *netdev, u16 num_rq,</div><div class='add'>+			  u32 rq_depth, struct hinic3_dyna_rxq_res *rxqs_res);</div><div class='add'>+int hinic3_configure_rxqs(struct net_device *netdev, u16 num_rq,</div><div class='add'>+			  u32 rq_depth, struct hinic3_dyna_rxq_res *rxqs_res);</div><div class='add'>+int hinic3_rx_poll(struct hinic3_rxq *rxq, int budget);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_tx.c b/drivers/net/ethernet/huawei/hinic3/hinic3_tx.c<br/>new file mode 100644<br/>index 000000000000..92c43c05e3f2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_tx.c</a></div><div class='hunk'>@@ -0,0 +1,779 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;net/ip6_checksum.h&gt;</div><div class='add'>+#include &lt;net/ipv6.h&gt;</div><div class='add'>+#include &lt;net/netdev_queues.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_nic_cfg.h"</div><div class='add'>+#include "hinic3_nic_dev.h"</div><div class='add'>+#include "hinic3_nic_io.h"</div><div class='add'>+#include "hinic3_tx.h"</div><div class='add'>+#include "hinic3_wq.h"</div><div class='add'>+</div><div class='add'>+#define MIN_SKB_LEN                32</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_txqs(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_hwdev *hwdev = nic_dev-&gt;hwdev;</div><div class='add'>+	u16 q_id, num_txqs = nic_dev-&gt;max_qps;</div><div class='add'>+	struct pci_dev *pdev = nic_dev-&gt;pdev;</div><div class='add'>+	struct hinic3_txq *txq;</div><div class='add'>+</div><div class='add'>+	if (!num_txqs) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Cannot allocate zero size txqs\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nic_dev-&gt;txqs = kcalloc(num_txqs, sizeof(*nic_dev-&gt;txqs),  GFP_KERNEL);</div><div class='add'>+	if (!nic_dev-&gt;txqs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; num_txqs; q_id++) {</div><div class='add'>+		txq = &amp;nic_dev-&gt;txqs[q_id];</div><div class='add'>+		txq-&gt;netdev = netdev;</div><div class='add'>+		txq-&gt;q_id = q_id;</div><div class='add'>+		txq-&gt;q_depth = nic_dev-&gt;q_params.sq_depth;</div><div class='add'>+		txq-&gt;q_mask = nic_dev-&gt;q_params.sq_depth - 1;</div><div class='add'>+		txq-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_txqs(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	kfree(nic_dev-&gt;txqs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_set_buf_desc(struct hinic3_sq_bufdesc *buf_descs,</div><div class='add'>+				dma_addr_t addr, u32 len)</div><div class='add'>+{</div><div class='add'>+	buf_descs-&gt;hi_addr = cpu_to_le32(upper_32_bits(addr));</div><div class='add'>+	buf_descs-&gt;lo_addr = cpu_to_le32(lower_32_bits(addr));</div><div class='add'>+	buf_descs-&gt;len = cpu_to_le32(len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_tx_map_skb(struct net_device *netdev, struct sk_buff *skb,</div><div class='add'>+			     struct hinic3_txq *txq,</div><div class='add'>+			     struct hinic3_tx_info *tx_info,</div><div class='add'>+			     struct hinic3_sq_wqe_combo *wqe_combo)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_sq_wqe_desc *wqe_desc = wqe_combo-&gt;ctrl_bd0;</div><div class='add'>+	struct hinic3_sq_bufdesc *buf_desc = wqe_combo-&gt;bds_head;</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_dma_info *dma_info = tx_info-&gt;dma_info;</div><div class='add'>+	struct pci_dev *pdev = nic_dev-&gt;pdev;</div><div class='add'>+	skb_frag_t *frag;</div><div class='add'>+	u32 i, idx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	dma_info[0].dma = dma_map_single(&amp;pdev-&gt;dev, skb-&gt;data,</div><div class='add'>+					 skb_headlen(skb), DMA_TO_DEVICE);</div><div class='add'>+	if (dma_mapping_error(&amp;pdev-&gt;dev, dma_info[0].dma))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	dma_info[0].len = skb_headlen(skb);</div><div class='add'>+</div><div class='add'>+	wqe_desc-&gt;hi_addr = cpu_to_le32(upper_32_bits(dma_info[0].dma));</div><div class='add'>+	wqe_desc-&gt;lo_addr = cpu_to_le32(lower_32_bits(dma_info[0].dma));</div><div class='add'>+</div><div class='add'>+	wqe_desc-&gt;ctrl_len = cpu_to_le32(dma_info[0].len);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; skb_shinfo(skb)-&gt;nr_frags; i++) {</div><div class='add'>+		frag = &amp;(skb_shinfo(skb)-&gt;frags[i]);</div><div class='add'>+		if (unlikely(i == wqe_combo-&gt;first_bds_num))</div><div class='add'>+			buf_desc = wqe_combo-&gt;bds_sec2;</div><div class='add'>+</div><div class='add'>+		idx = i + 1;</div><div class='add'>+		dma_info[idx].dma = skb_frag_dma_map(&amp;pdev-&gt;dev, frag, 0,</div><div class='add'>+						     skb_frag_size(frag),</div><div class='add'>+						     DMA_TO_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;pdev-&gt;dev, dma_info[idx].dma)) {</div><div class='add'>+			err = -EFAULT;</div><div class='add'>+			goto err_unmap_page;</div><div class='add'>+		}</div><div class='add'>+		dma_info[idx].len = skb_frag_size(frag);</div><div class='add'>+</div><div class='add'>+		hinic3_set_buf_desc(buf_desc, dma_info[idx].dma,</div><div class='add'>+				    dma_info[idx].len);</div><div class='add'>+		buf_desc++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unmap_page:</div><div class='add'>+	while (idx &gt; 1) {</div><div class='add'>+		idx--;</div><div class='add'>+		dma_unmap_page(&amp;pdev-&gt;dev, dma_info[idx].dma,</div><div class='add'>+			       dma_info[idx].len, DMA_TO_DEVICE);</div><div class='add'>+	}</div><div class='add'>+	dma_unmap_single(&amp;pdev-&gt;dev, dma_info[0].dma, dma_info[0].len,</div><div class='add'>+			 DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_tx_unmap_skb(struct net_device *netdev,</div><div class='add'>+				struct sk_buff *skb,</div><div class='add'>+				struct hinic3_dma_info *dma_info)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct pci_dev *pdev = nic_dev-&gt;pdev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; skb_shinfo(skb)-&gt;nr_frags;) {</div><div class='add'>+		i++;</div><div class='add'>+		dma_unmap_page(&amp;pdev-&gt;dev,</div><div class='add'>+			       dma_info[i].dma,</div><div class='add'>+			       dma_info[i].len, DMA_TO_DEVICE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_unmap_single(&amp;pdev-&gt;dev, dma_info[0].dma,</div><div class='add'>+			 dma_info[0].len, DMA_TO_DEVICE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void free_all_tx_skbs(struct net_device *netdev, u32 sq_depth,</div><div class='add'>+			     struct hinic3_tx_info *tx_info_arr)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_tx_info *tx_info;</div><div class='add'>+	u32 idx;</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; sq_depth; idx++) {</div><div class='add'>+		tx_info = &amp;tx_info_arr[idx];</div><div class='add'>+		if (tx_info-&gt;skb) {</div><div class='add'>+			hinic3_tx_unmap_skb(netdev, tx_info-&gt;skb,</div><div class='add'>+					    tx_info-&gt;dma_info);</div><div class='add'>+			dev_kfree_skb_any(tx_info-&gt;skb);</div><div class='add'>+			tx_info-&gt;skb = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+union hinic3_ip {</div><div class='add'>+	struct iphdr   *v4;</div><div class='add'>+	struct ipv6hdr *v6;</div><div class='add'>+	unsigned char  *hdr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union hinic3_l4 {</div><div class='add'>+	struct tcphdr *tcp;</div><div class='add'>+	struct udphdr *udp;</div><div class='add'>+	unsigned char *hdr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_l3_type {</div><div class='add'>+	HINIC3_L3_UNKNOWN         = 0,</div><div class='add'>+	HINIC3_L3_IP6_PKT         = 1,</div><div class='add'>+	HINIC3_L3_IP4_PKT_NO_CSUM = 2,</div><div class='add'>+	HINIC3_L3_IP4_PKT_CSUM    = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_l4_offload_type {</div><div class='add'>+	HINIC3_L4_OFFLOAD_DISABLE = 0,</div><div class='add'>+	HINIC3_L4_OFFLOAD_TCP     = 1,</div><div class='add'>+	HINIC3_L4_OFFLOAD_STCP    = 2,</div><div class='add'>+	HINIC3_L4_OFFLOAD_UDP     = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* initialize l4 offset and offload */</div><div class='add'>+static void get_inner_l4_info(struct sk_buff *skb, union hinic3_l4 *l4,</div><div class='add'>+			      u8 l4_proto, u32 *offset,</div><div class='add'>+			      enum hinic3_l4_offload_type *l4_offload)</div><div class='add'>+{</div><div class='add'>+	switch (l4_proto) {</div><div class='add'>+	case IPPROTO_TCP:</div><div class='add'>+		*l4_offload = HINIC3_L4_OFFLOAD_TCP;</div><div class='add'>+		/* To be same with TSO, payload offset begins from payload */</div><div class='add'>+		*offset = (l4-&gt;tcp-&gt;doff &lt;&lt; TCP_HDR_DATA_OFF_UNIT_SHIFT) +</div><div class='add'>+			   TRANSPORT_OFFSET(l4-&gt;hdr, skb);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case IPPROTO_UDP:</div><div class='add'>+		*l4_offload = HINIC3_L4_OFFLOAD_UDP;</div><div class='add'>+		*offset = TRANSPORT_OFFSET(l4-&gt;hdr, skb);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*l4_offload = HINIC3_L4_OFFLOAD_DISABLE;</div><div class='add'>+		*offset = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_tx_csum(struct hinic3_txq *txq, struct hinic3_sq_task *task,</div><div class='add'>+			  struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (skb-&gt;ip_summed != CHECKSUM_PARTIAL)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;encapsulation) {</div><div class='add'>+		union hinic3_ip ip;</div><div class='add'>+		u8 l4_proto;</div><div class='add'>+</div><div class='add'>+		task-&gt;pkt_info0 |= cpu_to_le32(SQ_TASK_INFO0_SET(1,</div><div class='add'>+								 TUNNEL_FLAG));</div><div class='add'>+</div><div class='add'>+		ip.hdr = skb_network_header(skb);</div><div class='add'>+		if (ip.v4-&gt;version == 4) {</div><div class='add'>+			l4_proto = ip.v4-&gt;protocol;</div><div class='add'>+		} else if (ip.v4-&gt;version == 6) {</div><div class='add'>+			union hinic3_l4 l4;</div><div class='add'>+			unsigned char *exthdr;</div><div class='add'>+			__be16 frag_off;</div><div class='add'>+</div><div class='add'>+			exthdr = ip.hdr + sizeof(*ip.v6);</div><div class='add'>+			l4_proto = ip.v6-&gt;nexthdr;</div><div class='add'>+			l4.hdr = skb_transport_header(skb);</div><div class='add'>+			if (l4.hdr != exthdr)</div><div class='add'>+				ipv6_skip_exthdr(skb, exthdr - skb-&gt;data,</div><div class='add'>+						 &amp;l4_proto, &amp;frag_off);</div><div class='add'>+		} else {</div><div class='add'>+			l4_proto = IPPROTO_RAW;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (l4_proto != IPPROTO_UDP ||</div><div class='add'>+		    ((struct udphdr *)skb_transport_header(skb))-&gt;dest !=</div><div class='add'>+		    VXLAN_OFFLOAD_PORT_LE) {</div><div class='add'>+			/* Unsupported tunnel packet, disable csum offload */</div><div class='add'>+			skb_checksum_help(skb);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	task-&gt;pkt_info0 |= cpu_to_le32(SQ_TASK_INFO0_SET(1, INNER_L4_EN));</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void get_inner_l3_l4_type(struct sk_buff *skb, union hinic3_ip *ip,</div><div class='add'>+				 union hinic3_l4 *l4,</div><div class='add'>+				 enum hinic3_l3_type *l3_type, u8 *l4_proto)</div><div class='add'>+{</div><div class='add'>+	unsigned char *exthdr;</div><div class='add'>+	__be16 frag_off;</div><div class='add'>+</div><div class='add'>+	if (ip-&gt;v4-&gt;version == 4) {</div><div class='add'>+		*l3_type = HINIC3_L3_IP4_PKT_CSUM;</div><div class='add'>+		*l4_proto = ip-&gt;v4-&gt;protocol;</div><div class='add'>+	} else if (ip-&gt;v4-&gt;version == 6) {</div><div class='add'>+		*l3_type = HINIC3_L3_IP6_PKT;</div><div class='add'>+		exthdr = ip-&gt;hdr + sizeof(*ip-&gt;v6);</div><div class='add'>+		*l4_proto = ip-&gt;v6-&gt;nexthdr;</div><div class='add'>+		if (exthdr != l4-&gt;hdr) {</div><div class='add'>+			ipv6_skip_exthdr(skb, exthdr - skb-&gt;data,</div><div class='add'>+					 l4_proto, &amp;frag_off);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		*l3_type = HINIC3_L3_UNKNOWN;</div><div class='add'>+		*l4_proto = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_set_tso_info(struct hinic3_sq_task *task, __le32 *queue_info,</div><div class='add'>+				enum hinic3_l4_offload_type l4_offload,</div><div class='add'>+				u32 offset, u32 mss)</div><div class='add'>+{</div><div class='add'>+	if (l4_offload == HINIC3_L4_OFFLOAD_TCP) {</div><div class='add'>+		*queue_info |= cpu_to_le32(SQ_CTRL_QUEUE_INFO_SET(1, TSO));</div><div class='add'>+		task-&gt;pkt_info0 |= cpu_to_le32(SQ_TASK_INFO0_SET(1,</div><div class='add'>+								 INNER_L4_EN));</div><div class='add'>+	} else if (l4_offload == HINIC3_L4_OFFLOAD_UDP) {</div><div class='add'>+		*queue_info |= cpu_to_le32(SQ_CTRL_QUEUE_INFO_SET(1, UFO));</div><div class='add'>+		task-&gt;pkt_info0 |= cpu_to_le32(SQ_TASK_INFO0_SET(1,</div><div class='add'>+								 INNER_L4_EN));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enable L3 calculation */</div><div class='add'>+	task-&gt;pkt_info0 |= cpu_to_le32(SQ_TASK_INFO0_SET(1, INNER_L3_EN));</div><div class='add'>+</div><div class='add'>+	*queue_info |= cpu_to_le32(SQ_CTRL_QUEUE_INFO_SET(offset &gt;&gt; 1, PLDOFF));</div><div class='add'>+</div><div class='add'>+	/* set MSS value */</div><div class='add'>+	*queue_info &amp;= cpu_to_le32(~SQ_CTRL_QUEUE_INFO_MSS_MASK);</div><div class='add'>+	*queue_info |= cpu_to_le32(SQ_CTRL_QUEUE_INFO_SET(mss, MSS));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __sum16 csum_magic(union hinic3_ip *ip, unsigned short proto)</div><div class='add'>+{</div><div class='add'>+	return (ip-&gt;v4-&gt;version == 4) ?</div><div class='add'>+		csum_tcpudp_magic(ip-&gt;v4-&gt;saddr, ip-&gt;v4-&gt;daddr, 0, proto, 0) :</div><div class='add'>+		csum_ipv6_magic(&amp;ip-&gt;v6-&gt;saddr, &amp;ip-&gt;v6-&gt;daddr, 0, proto, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hinic3_tso(struct hinic3_sq_task *task, __le32 *queue_info,</div><div class='add'>+		      struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	enum hinic3_l4_offload_type l4_offload;</div><div class='add'>+	enum hinic3_l3_type l3_type;</div><div class='add'>+	union hinic3_ip ip;</div><div class='add'>+	union hinic3_l4 l4;</div><div class='add'>+	u8 l4_proto;</div><div class='add'>+	u32 offset;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!skb_is_gso(skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = skb_cow_head(skb, 0);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;encapsulation) {</div><div class='add'>+		u32 gso_type = skb_shinfo(skb)-&gt;gso_type;</div><div class='add'>+		/* L3 checksum is always enabled */</div><div class='add'>+		task-&gt;pkt_info0 |= cpu_to_le32(SQ_TASK_INFO0_SET(1, OUT_L3_EN));</div><div class='add'>+		task-&gt;pkt_info0 |= cpu_to_le32(SQ_TASK_INFO0_SET(1,</div><div class='add'>+								 TUNNEL_FLAG));</div><div class='add'>+</div><div class='add'>+		l4.hdr = skb_transport_header(skb);</div><div class='add'>+		ip.hdr = skb_network_header(skb);</div><div class='add'>+</div><div class='add'>+		if (gso_type &amp; SKB_GSO_UDP_TUNNEL_CSUM) {</div><div class='add'>+			l4.udp-&gt;check = ~csum_magic(&amp;ip, IPPROTO_UDP);</div><div class='add'>+			task-&gt;pkt_info0 |=</div><div class='add'>+				cpu_to_le32(SQ_TASK_INFO0_SET(1, OUT_L4_EN));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ip.hdr = skb_inner_network_header(skb);</div><div class='add'>+		l4.hdr = skb_inner_transport_header(skb);</div><div class='add'>+	} else {</div><div class='add'>+		ip.hdr = skb_network_header(skb);</div><div class='add'>+		l4.hdr = skb_transport_header(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	get_inner_l3_l4_type(skb, &amp;ip, &amp;l4, &amp;l3_type, &amp;l4_proto);</div><div class='add'>+</div><div class='add'>+	if (l4_proto == IPPROTO_TCP)</div><div class='add'>+		l4.tcp-&gt;check = ~csum_magic(&amp;ip, IPPROTO_TCP);</div><div class='add'>+</div><div class='add'>+	get_inner_l4_info(skb, &amp;l4, l4_proto, &amp;offset, &amp;l4_offload);</div><div class='add'>+</div><div class='add'>+	hinic3_set_tso_info(task, queue_info, l4_offload, offset,</div><div class='add'>+			    skb_shinfo(skb)-&gt;gso_size);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_set_vlan_tx_offload(struct hinic3_sq_task *task,</div><div class='add'>+				       u16 vlan_tag, u8 vlan_tpid)</div><div class='add'>+{</div><div class='add'>+	/* vlan_tpid: 0=select TPID0 in IPSU, 1=select TPID1 in IPSU</div><div class='add'>+	 * 2=select TPID2 in IPSU, 3=select TPID3 in IPSU,</div><div class='add'>+	 * 4=select TPID4 in IPSU</div><div class='add'>+	 */</div><div class='add'>+	task-&gt;vlan_offload =</div><div class='add'>+		cpu_to_le32(SQ_TASK_INFO3_SET(vlan_tag, VLAN_TAG) |</div><div class='add'>+			    SQ_TASK_INFO3_SET(vlan_tpid, VLAN_TPID) |</div><div class='add'>+			    SQ_TASK_INFO3_SET(1, VLAN_TAG_VALID));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 hinic3_tx_offload(struct sk_buff *skb, struct hinic3_sq_task *task,</div><div class='add'>+			     __le32 *queue_info, struct hinic3_txq *txq)</div><div class='add'>+{</div><div class='add'>+	u32 offload = 0;</div><div class='add'>+	int tso_cs_en;</div><div class='add'>+</div><div class='add'>+	task-&gt;pkt_info0 = 0;</div><div class='add'>+	task-&gt;ip_identify = 0;</div><div class='add'>+	task-&gt;rsvd = 0;</div><div class='add'>+	task-&gt;vlan_offload = 0;</div><div class='add'>+</div><div class='add'>+	tso_cs_en = hinic3_tso(task, queue_info, skb);</div><div class='add'>+	if (tso_cs_en &lt; 0) {</div><div class='add'>+		offload = HINIC3_TX_OFFLOAD_INVALID;</div><div class='add'>+		return offload;</div><div class='add'>+	} else if (tso_cs_en) {</div><div class='add'>+		offload |= HINIC3_TX_OFFLOAD_TSO;</div><div class='add'>+	} else {</div><div class='add'>+		tso_cs_en = hinic3_tx_csum(txq, task, skb);</div><div class='add'>+		if (tso_cs_en)</div><div class='add'>+			offload |= HINIC3_TX_OFFLOAD_CSUM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define VLAN_INSERT_MODE_MAX 5</div><div class='add'>+	if (unlikely(skb_vlan_tag_present(skb))) {</div><div class='add'>+		/* select vlan insert mode by qid, default 802.1Q Tag type */</div><div class='add'>+		hinic3_set_vlan_tx_offload(task, skb_vlan_tag_get(skb),</div><div class='add'>+					   txq-&gt;q_id % VLAN_INSERT_MODE_MAX);</div><div class='add'>+		offload |= HINIC3_TX_OFFLOAD_VLAN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(SQ_CTRL_QUEUE_INFO_GET(*queue_info, PLDOFF) &gt;</div><div class='add'>+		     SQ_CTRL_MAX_PLDOFF)) {</div><div class='add'>+		offload = HINIC3_TX_OFFLOAD_INVALID;</div><div class='add'>+		return offload;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return offload;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 hinic3_get_and_update_sq_owner(struct hinic3_io_queue *sq,</div><div class='add'>+					  u16 curr_pi, u16 wqebb_cnt)</div><div class='add'>+{</div><div class='add'>+	u16 owner = sq-&gt;owner;</div><div class='add'>+</div><div class='add'>+	if (unlikely(curr_pi + wqebb_cnt &gt;= sq-&gt;wq.q_depth))</div><div class='add'>+		sq-&gt;owner = !sq-&gt;owner;</div><div class='add'>+</div><div class='add'>+	return owner;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 hinic3_set_wqe_combo(struct hinic3_txq *txq,</div><div class='add'>+				struct hinic3_sq_wqe_combo *wqe_combo,</div><div class='add'>+				u32 offload, u16 num_sge, u16 *curr_pi)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_sq_bufdesc *first_part_wqebbs, *second_part_wqebbs;</div><div class='add'>+	u16 first_part_wqebbs_num, tmp_pi;</div><div class='add'>+</div><div class='add'>+	wqe_combo-&gt;ctrl_bd0 = hinic3_wq_get_one_wqebb(&amp;txq-&gt;sq-&gt;wq, curr_pi);</div><div class='add'>+	if (!offload &amp;&amp; num_sge == 1) {</div><div class='add'>+		wqe_combo-&gt;wqe_type = SQ_WQE_COMPACT_TYPE;</div><div class='add'>+		return hinic3_get_and_update_sq_owner(txq-&gt;sq, *curr_pi, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wqe_combo-&gt;wqe_type = SQ_WQE_EXTENDED_TYPE;</div><div class='add'>+</div><div class='add'>+	if (offload) {</div><div class='add'>+		wqe_combo-&gt;task = hinic3_wq_get_one_wqebb(&amp;txq-&gt;sq-&gt;wq,</div><div class='add'>+							  &amp;tmp_pi);</div><div class='add'>+		wqe_combo-&gt;task_type = SQ_WQE_TASKSECT_16BYTES;</div><div class='add'>+	} else {</div><div class='add'>+		wqe_combo-&gt;task_type = SQ_WQE_TASKSECT_46BITS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (num_sge &gt; 1) {</div><div class='add'>+		/* first wqebb contain bd0, and bd size is equal to sq wqebb</div><div class='add'>+		 * size, so we use (num_sge - 1) as wanted weqbb_cnt</div><div class='add'>+		 */</div><div class='add'>+		hinic3_wq_get_multi_wqebbs(&amp;txq-&gt;sq-&gt;wq, num_sge - 1, &amp;tmp_pi,</div><div class='add'>+					   &amp;first_part_wqebbs,</div><div class='add'>+					   &amp;second_part_wqebbs,</div><div class='add'>+					   &amp;first_part_wqebbs_num);</div><div class='add'>+		wqe_combo-&gt;bds_head = first_part_wqebbs;</div><div class='add'>+		wqe_combo-&gt;bds_sec2 = second_part_wqebbs;</div><div class='add'>+		wqe_combo-&gt;first_bds_num = first_part_wqebbs_num;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return hinic3_get_and_update_sq_owner(txq-&gt;sq, *curr_pi,</div><div class='add'>+					      num_sge + !!offload);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hinic3_prepare_sq_ctrl(struct hinic3_sq_wqe_combo *wqe_combo,</div><div class='add'>+				   __le32 queue_info, int nr_descs, u16 owner)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_sq_wqe_desc *wqe_desc = wqe_combo-&gt;ctrl_bd0;</div><div class='add'>+</div><div class='add'>+	if (wqe_combo-&gt;wqe_type == SQ_WQE_COMPACT_TYPE) {</div><div class='add'>+		wqe_desc-&gt;ctrl_len |=</div><div class='add'>+			cpu_to_le32(SQ_CTRL_SET(SQ_NORMAL_WQE, DATA_FORMAT) |</div><div class='add'>+				    SQ_CTRL_SET(wqe_combo-&gt;wqe_type, EXTENDED) |</div><div class='add'>+				    SQ_CTRL_SET(owner, OWNER));</div><div class='add'>+</div><div class='add'>+		/* compact wqe queue_info will transfer to chip */</div><div class='add'>+		wqe_desc-&gt;queue_info = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wqe_desc-&gt;ctrl_len |=</div><div class='add'>+		cpu_to_le32(SQ_CTRL_SET(nr_descs, BUFDESC_NUM) |</div><div class='add'>+			    SQ_CTRL_SET(wqe_combo-&gt;task_type, TASKSECT_LEN) |</div><div class='add'>+			    SQ_CTRL_SET(SQ_NORMAL_WQE, DATA_FORMAT) |</div><div class='add'>+			    SQ_CTRL_SET(wqe_combo-&gt;wqe_type, EXTENDED) |</div><div class='add'>+			    SQ_CTRL_SET(owner, OWNER));</div><div class='add'>+</div><div class='add'>+	wqe_desc-&gt;queue_info = queue_info;</div><div class='add'>+	wqe_desc-&gt;queue_info |= cpu_to_le32(SQ_CTRL_QUEUE_INFO_SET(1, UC));</div><div class='add'>+</div><div class='add'>+	if (!SQ_CTRL_QUEUE_INFO_GET(wqe_desc-&gt;queue_info, MSS)) {</div><div class='add'>+		wqe_desc-&gt;queue_info |=</div><div class='add'>+		    cpu_to_le32(SQ_CTRL_QUEUE_INFO_SET(HINIC3_TX_MSS_DEFAULT, MSS));</div><div class='add'>+	} else if (SQ_CTRL_QUEUE_INFO_GET(wqe_desc-&gt;queue_info, MSS) &lt;</div><div class='add'>+		   HINIC3_TX_MSS_MIN) {</div><div class='add'>+		/* mss should not be less than 80 */</div><div class='add'>+		wqe_desc-&gt;queue_info &amp;=</div><div class='add'>+		    cpu_to_le32(~SQ_CTRL_QUEUE_INFO_MSS_MASK);</div><div class='add'>+		wqe_desc-&gt;queue_info |=</div><div class='add'>+		    cpu_to_le32(SQ_CTRL_QUEUE_INFO_SET(HINIC3_TX_MSS_MIN, MSS));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t hinic3_send_one_skb(struct sk_buff *skb,</div><div class='add'>+				       struct net_device *netdev,</div><div class='add'>+				       struct hinic3_txq *txq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_sq_wqe_combo wqe_combo = {};</div><div class='add'>+	struct hinic3_tx_info *tx_info;</div><div class='add'>+	struct hinic3_sq_task task;</div><div class='add'>+	u16 wqebb_cnt, num_sge;</div><div class='add'>+	__le32 queue_info = 0;</div><div class='add'>+	u16 saved_wq_prod_idx;</div><div class='add'>+	u16 owner, pi = 0;</div><div class='add'>+	u8 saved_sq_owner;</div><div class='add'>+	u32 offload;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (unlikely(skb-&gt;len &lt; MIN_SKB_LEN)) {</div><div class='add'>+		if (skb_pad(skb, MIN_SKB_LEN - skb-&gt;len))</div><div class='add'>+			goto err_out;</div><div class='add'>+</div><div class='add'>+		skb-&gt;len = MIN_SKB_LEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_sge = skb_shinfo(skb)-&gt;nr_frags + 1;</div><div class='add'>+	/* assume normal wqe format + 1 wqebb for task info */</div><div class='add'>+	wqebb_cnt = num_sge + 1;</div><div class='add'>+</div><div class='add'>+	if (unlikely(hinic3_wq_free_wqebbs(&amp;txq-&gt;sq-&gt;wq) &lt; wqebb_cnt)) {</div><div class='add'>+		if (likely(wqebb_cnt &gt; txq-&gt;tx_stop_thrs))</div><div class='add'>+			txq-&gt;tx_stop_thrs = min(wqebb_cnt, txq-&gt;tx_start_thrs);</div><div class='add'>+</div><div class='add'>+		netif_subqueue_try_stop(netdev, txq-&gt;sq-&gt;q_id,</div><div class='add'>+					hinic3_wq_free_wqebbs(&amp;txq-&gt;sq-&gt;wq),</div><div class='add'>+					txq-&gt;tx_start_thrs);</div><div class='add'>+</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	offload = hinic3_tx_offload(skb, &amp;task, &amp;queue_info, txq);</div><div class='add'>+	if (unlikely(offload == HINIC3_TX_OFFLOAD_INVALID)) {</div><div class='add'>+		goto err_drop_pkt;</div><div class='add'>+	} else if (!offload) {</div><div class='add'>+		wqebb_cnt -= 1;</div><div class='add'>+		if (unlikely(num_sge == 1 &amp;&amp;</div><div class='add'>+			     skb-&gt;len &gt; HINIC3_COMPACT_WQEE_SKB_MAX_LEN))</div><div class='add'>+			goto err_drop_pkt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	saved_wq_prod_idx = txq-&gt;sq-&gt;wq.prod_idx;</div><div class='add'>+	saved_sq_owner = txq-&gt;sq-&gt;owner;</div><div class='add'>+</div><div class='add'>+	owner = hinic3_set_wqe_combo(txq, &amp;wqe_combo, offload, num_sge, &amp;pi);</div><div class='add'>+	if (offload)</div><div class='add'>+		*wqe_combo.task = task;</div><div class='add'>+</div><div class='add'>+	tx_info = &amp;txq-&gt;tx_info[pi];</div><div class='add'>+	tx_info-&gt;skb = skb;</div><div class='add'>+	tx_info-&gt;wqebb_cnt = wqebb_cnt;</div><div class='add'>+</div><div class='add'>+	err = hinic3_tx_map_skb(netdev, skb, txq, tx_info, &amp;wqe_combo);</div><div class='add'>+	if (err) {</div><div class='add'>+		/* Rollback work queue to reclaim the wqebb we did not use */</div><div class='add'>+		txq-&gt;sq-&gt;wq.prod_idx = saved_wq_prod_idx;</div><div class='add'>+		txq-&gt;sq-&gt;owner = saved_sq_owner;</div><div class='add'>+		goto err_drop_pkt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_subqueue_sent(netdev, txq-&gt;sq-&gt;q_id, skb-&gt;len);</div><div class='add'>+	netif_subqueue_maybe_stop(netdev, txq-&gt;sq-&gt;q_id,</div><div class='add'>+				  hinic3_wq_free_wqebbs(&amp;txq-&gt;sq-&gt;wq),</div><div class='add'>+				  txq-&gt;tx_stop_thrs,</div><div class='add'>+				  txq-&gt;tx_start_thrs);</div><div class='add'>+</div><div class='add'>+	hinic3_prepare_sq_ctrl(&amp;wqe_combo, queue_info, num_sge, owner);</div><div class='add'>+	hinic3_write_db(txq-&gt;sq, 0, DB_CFLAG_DP_SQ,</div><div class='add'>+			hinic3_get_sq_local_pi(txq-&gt;sq));</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+err_drop_pkt:</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+netdev_tx_t hinic3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	u16 q_id = skb_get_queue_mapping(skb);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!netif_carrier_ok(netdev)))</div><div class='add'>+		goto err_drop_pkt;</div><div class='add'>+</div><div class='add'>+	if (unlikely(q_id &gt;= nic_dev-&gt;q_params.num_qps))</div><div class='add'>+		goto err_drop_pkt;</div><div class='add'>+</div><div class='add'>+	return hinic3_send_one_skb(skb, netdev, &amp;nic_dev-&gt;txqs[q_id]);</div><div class='add'>+</div><div class='add'>+err_drop_pkt:</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool is_hw_complete_sq_process(struct hinic3_io_queue *sq)</div><div class='add'>+{</div><div class='add'>+	u16 sw_pi, hw_ci;</div><div class='add'>+</div><div class='add'>+	sw_pi = hinic3_get_sq_local_pi(sq);</div><div class='add'>+	hw_ci = hinic3_get_sq_hw_ci(sq);</div><div class='add'>+</div><div class='add'>+	return sw_pi == hw_ci;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define HINIC3_FLUSH_QUEUE_POLL_SLEEP_US   10000</div><div class='add'>+#define HINIC3_FLUSH_QUEUE_POLL_TIMEOUT_US 10000000</div><div class='add'>+static int hinic3_stop_sq(struct hinic3_txq *txq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(txq-&gt;netdev);</div><div class='add'>+	int err, rc;</div><div class='add'>+</div><div class='add'>+	err = read_poll_timeout(hinic3_force_drop_tx_pkt, rc,</div><div class='add'>+				is_hw_complete_sq_process(txq-&gt;sq) || rc,</div><div class='add'>+				HINIC3_FLUSH_QUEUE_POLL_SLEEP_US,</div><div class='add'>+				HINIC3_FLUSH_QUEUE_POLL_TIMEOUT_US,</div><div class='add'>+				true, nic_dev-&gt;hwdev);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+	else</div><div class='add'>+		return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* packet transmission should be stopped before calling this function */</div><div class='add'>+void hinic3_flush_txqs(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	u16 qid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (qid = 0; qid &lt; nic_dev-&gt;q_params.num_qps; qid++) {</div><div class='add'>+		err = hinic3_stop_sq(&amp;nic_dev-&gt;txqs[qid]);</div><div class='add'>+		netdev_tx_reset_subqueue(netdev, qid);</div><div class='add'>+		if (err)</div><div class='add'>+			netdev_err(netdev, "Failed to stop sq%u\n", qid);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define HINIC3_BDS_PER_SQ_WQEBB \</div><div class='add'>+	(HINIC3_SQ_WQEBB_SIZE / sizeof(struct hinic3_sq_bufdesc))</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_txqs_res(struct net_device *netdev, u16 num_sq,</div><div class='add'>+			  u32 sq_depth, struct hinic3_dyna_txq_res *txqs_res)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_dyna_txq_res *tqres;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; num_sq; idx++) {</div><div class='add'>+		tqres = &amp;txqs_res[idx];</div><div class='add'>+</div><div class='add'>+		tqres-&gt;tx_info = kcalloc(sq_depth, sizeof(*tqres-&gt;tx_info),</div><div class='add'>+					 GFP_KERNEL);</div><div class='add'>+		if (!tqres-&gt;tx_info)</div><div class='add'>+			goto err_free_tqres;</div><div class='add'>+</div><div class='add'>+		tqres-&gt;bds = kcalloc(sq_depth * HINIC3_BDS_PER_SQ_WQEBB +</div><div class='add'>+				     HINIC3_MAX_SQ_SGE, sizeof(*tqres-&gt;bds),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+		if (!tqres-&gt;bds) {</div><div class='add'>+			kfree(tqres-&gt;tx_info);</div><div class='add'>+			goto err_free_tqres;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_tqres:</div><div class='add'>+	while (idx &gt; 0) {</div><div class='add'>+		idx--;</div><div class='add'>+		tqres = &amp;txqs_res[idx];</div><div class='add'>+</div><div class='add'>+		kfree(tqres-&gt;bds);</div><div class='add'>+		kfree(tqres-&gt;tx_info);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_free_txqs_res(struct net_device *netdev, u16 num_sq,</div><div class='add'>+			  u32 sq_depth, struct hinic3_dyna_txq_res *txqs_res)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_dyna_txq_res *tqres;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; num_sq; idx++) {</div><div class='add'>+		tqres = &amp;txqs_res[idx];</div><div class='add'>+</div><div class='add'>+		free_all_tx_skbs(netdev, sq_depth, tqres-&gt;tx_info);</div><div class='add'>+		kfree(tqres-&gt;bds);</div><div class='add'>+		kfree(tqres-&gt;tx_info);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_configure_txqs(struct net_device *netdev, u16 num_sq,</div><div class='add'>+			  u32 sq_depth, struct hinic3_dyna_txq_res *txqs_res)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);</div><div class='add'>+	struct hinic3_dyna_txq_res *tqres;</div><div class='add'>+	struct hinic3_txq *txq;</div><div class='add'>+	u16 q_id;</div><div class='add'>+	u32 idx;</div><div class='add'>+</div><div class='add'>+	for (q_id = 0; q_id &lt; num_sq; q_id++) {</div><div class='add'>+		txq = &amp;nic_dev-&gt;txqs[q_id];</div><div class='add'>+		tqres = &amp;txqs_res[q_id];</div><div class='add'>+</div><div class='add'>+		txq-&gt;q_depth = sq_depth;</div><div class='add'>+		txq-&gt;q_mask = sq_depth - 1;</div><div class='add'>+</div><div class='add'>+		txq-&gt;tx_stop_thrs = min(HINIC3_DEFAULT_STOP_THRS,</div><div class='add'>+					sq_depth / 20);</div><div class='add'>+		txq-&gt;tx_start_thrs = min(HINIC3_DEFAULT_START_THRS,</div><div class='add'>+					 sq_depth / 10);</div><div class='add'>+</div><div class='add'>+		txq-&gt;tx_info = tqres-&gt;tx_info;</div><div class='add'>+		for (idx = 0; idx &lt; sq_depth; idx++)</div><div class='add'>+			txq-&gt;tx_info[idx].dma_info =</div><div class='add'>+				&amp;tqres-&gt;bds[idx * HINIC3_BDS_PER_SQ_WQEBB];</div><div class='add'>+</div><div class='add'>+		txq-&gt;sq = &amp;nic_dev-&gt;nic_io-&gt;sq[q_id];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool hinic3_tx_poll(struct hinic3_txq *txq, int budget)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = txq-&gt;netdev;</div><div class='add'>+	u16 hw_ci, sw_ci, q_id = txq-&gt;sq-&gt;q_id;</div><div class='add'>+	struct hinic3_tx_info *tx_info;</div><div class='add'>+	unsigned int bytes_compl = 0;</div><div class='add'>+	unsigned int pkts = 0;</div><div class='add'>+	u16 wqebb_cnt = 0;</div><div class='add'>+</div><div class='add'>+	hw_ci = hinic3_get_sq_hw_ci(txq-&gt;sq);</div><div class='add'>+	dma_rmb();</div><div class='add'>+	sw_ci = hinic3_get_sq_local_ci(txq-&gt;sq);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		tx_info = &amp;txq-&gt;tx_info[sw_ci];</div><div class='add'>+</div><div class='add'>+		/* Did all wqebb of this wqe complete? */</div><div class='add'>+		if (hw_ci == sw_ci ||</div><div class='add'>+		    ((hw_ci - sw_ci) &amp; txq-&gt;q_mask) &lt; tx_info-&gt;wqebb_cnt)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		sw_ci = (sw_ci + tx_info-&gt;wqebb_cnt) &amp; txq-&gt;q_mask;</div><div class='add'>+		net_prefetch(&amp;txq-&gt;tx_info[sw_ci]);</div><div class='add'>+</div><div class='add'>+		wqebb_cnt += tx_info-&gt;wqebb_cnt;</div><div class='add'>+		bytes_compl += tx_info-&gt;skb-&gt;len;</div><div class='add'>+		pkts++;</div><div class='add'>+</div><div class='add'>+		hinic3_tx_unmap_skb(netdev, tx_info-&gt;skb, tx_info-&gt;dma_info);</div><div class='add'>+		napi_consume_skb(tx_info-&gt;skb, budget);</div><div class='add'>+		tx_info-&gt;skb = NULL;</div><div class='add'>+	} while (likely(pkts &lt; HINIC3_TX_POLL_WEIGHT));</div><div class='add'>+</div><div class='add'>+	hinic3_wq_put_wqebbs(&amp;txq-&gt;sq-&gt;wq, wqebb_cnt);</div><div class='add'>+</div><div class='add'>+	netif_subqueue_completed_wake(netdev, q_id, pkts, bytes_compl,</div><div class='add'>+				      hinic3_wq_free_wqebbs(&amp;txq-&gt;sq-&gt;wq),</div><div class='add'>+				      txq-&gt;tx_start_thrs);</div><div class='add'>+</div><div class='add'>+	return pkts == HINIC3_TX_POLL_WEIGHT;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_tx.h b/drivers/net/ethernet/huawei/hinic3/hinic3_tx.h<br/>new file mode 100644<br/>index 000000000000..7e1b872ba752<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_tx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_tx.h</a></div><div class='hunk'>@@ -0,0 +1,147 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_TX_H_</div><div class='add'>+#define _HINIC3_TX_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/ipv6.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;net/checksum.h&gt;</div><div class='add'>+</div><div class='add'>+#define VXLAN_OFFLOAD_PORT_LE            cpu_to_be16(4789)</div><div class='add'>+#define TCP_HDR_DATA_OFF_UNIT_SHIFT      2</div><div class='add'>+#define TRANSPORT_OFFSET(l4_hdr, skb)    ((l4_hdr) - (skb)-&gt;data)</div><div class='add'>+</div><div class='add'>+#define HINIC3_COMPACT_WQEE_SKB_MAX_LEN  16383</div><div class='add'>+#define HINIC3_TX_POLL_WEIGHT		 64</div><div class='add'>+#define HINIC3_DEFAULT_STOP_THRS	 6</div><div class='add'>+#define HINIC3_DEFAULT_START_THRS	 24</div><div class='add'>+</div><div class='add'>+enum sq_wqe_data_format {</div><div class='add'>+	SQ_NORMAL_WQE = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sq_wqe_ec_type {</div><div class='add'>+	SQ_WQE_COMPACT_TYPE  = 0,</div><div class='add'>+	SQ_WQE_EXTENDED_TYPE = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sq_wqe_tasksect_len_type {</div><div class='add'>+	SQ_WQE_TASKSECT_46BITS  = 0,</div><div class='add'>+	SQ_WQE_TASKSECT_16BYTES = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hinic3_tx_offload_type {</div><div class='add'>+	HINIC3_TX_OFFLOAD_TSO     = BIT(0),</div><div class='add'>+	HINIC3_TX_OFFLOAD_CSUM    = BIT(1),</div><div class='add'>+	HINIC3_TX_OFFLOAD_VLAN    = BIT(2),</div><div class='add'>+	HINIC3_TX_OFFLOAD_INVALID = BIT(3),</div><div class='add'>+	HINIC3_TX_OFFLOAD_ESP     = BIT(4),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define SQ_CTRL_BUFDESC_NUM_MASK   GENMASK(26, 19)</div><div class='add'>+#define SQ_CTRL_TASKSECT_LEN_MASK  BIT(27)</div><div class='add'>+#define SQ_CTRL_DATA_FORMAT_MASK   BIT(28)</div><div class='add'>+#define SQ_CTRL_EXTENDED_MASK      BIT(30)</div><div class='add'>+#define SQ_CTRL_OWNER_MASK         BIT(31)</div><div class='add'>+#define SQ_CTRL_SET(val, member) \</div><div class='add'>+	FIELD_PREP(SQ_CTRL_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define SQ_CTRL_QUEUE_INFO_PLDOFF_MASK  GENMASK(9, 2)</div><div class='add'>+#define SQ_CTRL_QUEUE_INFO_UFO_MASK     BIT(10)</div><div class='add'>+#define SQ_CTRL_QUEUE_INFO_TSO_MASK     BIT(11)</div><div class='add'>+#define SQ_CTRL_QUEUE_INFO_MSS_MASK     GENMASK(26, 13)</div><div class='add'>+#define SQ_CTRL_QUEUE_INFO_UC_MASK      BIT(28)</div><div class='add'>+</div><div class='add'>+#define SQ_CTRL_QUEUE_INFO_SET(val, member) \</div><div class='add'>+	FIELD_PREP(SQ_CTRL_QUEUE_INFO_##member##_MASK, val)</div><div class='add'>+#define SQ_CTRL_QUEUE_INFO_GET(val, member) \</div><div class='add'>+	FIELD_GET(SQ_CTRL_QUEUE_INFO_##member##_MASK, le32_to_cpu(val))</div><div class='add'>+</div><div class='add'>+#define SQ_CTRL_MAX_PLDOFF  221</div><div class='add'>+</div><div class='add'>+#define SQ_TASK_INFO0_TUNNEL_FLAG_MASK  BIT(19)</div><div class='add'>+#define SQ_TASK_INFO0_INNER_L4_EN_MASK  BIT(24)</div><div class='add'>+#define SQ_TASK_INFO0_INNER_L3_EN_MASK  BIT(25)</div><div class='add'>+#define SQ_TASK_INFO0_OUT_L4_EN_MASK    BIT(27)</div><div class='add'>+#define SQ_TASK_INFO0_OUT_L3_EN_MASK    BIT(28)</div><div class='add'>+#define SQ_TASK_INFO0_SET(val, member) \</div><div class='add'>+	FIELD_PREP(SQ_TASK_INFO0_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+#define SQ_TASK_INFO3_VLAN_TAG_MASK        GENMASK(15, 0)</div><div class='add'>+#define SQ_TASK_INFO3_VLAN_TPID_MASK       GENMASK(18, 16)</div><div class='add'>+#define SQ_TASK_INFO3_VLAN_TAG_VALID_MASK  BIT(19)</div><div class='add'>+#define SQ_TASK_INFO3_SET(val, member) \</div><div class='add'>+	FIELD_PREP(SQ_TASK_INFO3_##member##_MASK, val)</div><div class='add'>+</div><div class='add'>+struct hinic3_sq_wqe_desc {</div><div class='add'>+	__le32 ctrl_len;</div><div class='add'>+	__le32 queue_info;</div><div class='add'>+	__le32 hi_addr;</div><div class='add'>+	__le32 lo_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_sq_task {</div><div class='add'>+	__le32 pkt_info0;</div><div class='add'>+	__le32 ip_identify;</div><div class='add'>+	__le32 rsvd;</div><div class='add'>+	__le32 vlan_offload;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_sq_wqe_combo {</div><div class='add'>+	struct hinic3_sq_wqe_desc *ctrl_bd0;</div><div class='add'>+	struct hinic3_sq_task     *task;</div><div class='add'>+	struct hinic3_sq_bufdesc  *bds_head;</div><div class='add'>+	struct hinic3_sq_bufdesc  *bds_sec2;</div><div class='add'>+	u16                       first_bds_num;</div><div class='add'>+	u32                       wqe_type;</div><div class='add'>+	u32                       task_type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_dma_info {</div><div class='add'>+	dma_addr_t dma;</div><div class='add'>+	u32        len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_tx_info {</div><div class='add'>+	struct sk_buff         *skb;</div><div class='add'>+	u16                    wqebb_cnt;</div><div class='add'>+	struct hinic3_dma_info *dma_info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hinic3_txq {</div><div class='add'>+	struct net_device       *netdev;</div><div class='add'>+	struct device           *dev;</div><div class='add'>+</div><div class='add'>+	u16                     q_id;</div><div class='add'>+	u16                     tx_stop_thrs;</div><div class='add'>+	u16                     tx_start_thrs;</div><div class='add'>+	u32                     q_mask;</div><div class='add'>+	u32                     q_depth;</div><div class='add'>+</div><div class='add'>+	struct hinic3_tx_info   *tx_info;</div><div class='add'>+	struct hinic3_io_queue  *sq;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct hinic3_dyna_txq_res {</div><div class='add'>+	struct hinic3_tx_info  *tx_info;</div><div class='add'>+	struct hinic3_dma_info *bds;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_txqs(struct net_device *netdev);</div><div class='add'>+void hinic3_free_txqs(struct net_device *netdev);</div><div class='add'>+</div><div class='add'>+int hinic3_alloc_txqs_res(struct net_device *netdev, u16 num_sq,</div><div class='add'>+			  u32 sq_depth, struct hinic3_dyna_txq_res *txqs_res);</div><div class='add'>+void hinic3_free_txqs_res(struct net_device *netdev, u16 num_sq,</div><div class='add'>+			  u32 sq_depth, struct hinic3_dyna_txq_res *txqs_res);</div><div class='add'>+int hinic3_configure_txqs(struct net_device *netdev, u16 num_sq,</div><div class='add'>+			  u32 sq_depth, struct hinic3_dyna_txq_res *txqs_res);</div><div class='add'>+</div><div class='add'>+netdev_tx_t hinic3_xmit_frame(struct sk_buff *skb, struct net_device *netdev);</div><div class='add'>+bool hinic3_tx_poll(struct hinic3_txq *txq, int budget);</div><div class='add'>+void hinic3_flush_txqs(struct net_device *netdev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_wq.c b/drivers/net/ethernet/huawei/hinic3/hinic3_wq.c<br/>new file mode 100644<br/>index 000000000000..bc3ffdc25cf6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_wq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_wq.c</a></div><div class='hunk'>@@ -0,0 +1,138 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_hwdev.h"</div><div class='add'>+#include "hinic3_wq.h"</div><div class='add'>+</div><div class='add'>+#define WQ_MIN_DEPTH            64</div><div class='add'>+#define WQ_MAX_DEPTH            65536</div><div class='add'>+#define WQ_PAGE_ADDR_SIZE       sizeof(u64)</div><div class='add'>+#define WQ_MAX_NUM_PAGES        (HINIC3_MIN_PAGE_SIZE / WQ_PAGE_ADDR_SIZE)</div><div class='add'>+</div><div class='add'>+static int wq_init_wq_block(struct hinic3_hwdev *hwdev, struct hinic3_wq *wq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_queue_pages *qpages = &amp;wq-&gt;qpages;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (hinic3_wq_is_0_level_cla(wq)) {</div><div class='add'>+		wq-&gt;wq_block_paddr = qpages-&gt;pages[0].align_paddr;</div><div class='add'>+		wq-&gt;wq_block_vaddr = qpages-&gt;pages[0].align_vaddr;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (wq-&gt;qpages.num_pages &gt; WQ_MAX_NUM_PAGES) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "wq num_pages exceed limit: %lu\n",</div><div class='add'>+			WQ_MAX_NUM_PAGES);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wq-&gt;wq_block_vaddr = dma_alloc_coherent(hwdev-&gt;dev,</div><div class='add'>+						HINIC3_MIN_PAGE_SIZE,</div><div class='add'>+						&amp;wq-&gt;wq_block_paddr,</div><div class='add'>+						GFP_KERNEL);</div><div class='add'>+	if (!wq-&gt;wq_block_vaddr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; qpages-&gt;num_pages; i++)</div><div class='add'>+		wq-&gt;wq_block_vaddr[i] = cpu_to_be64(qpages-&gt;pages[i].align_paddr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wq_alloc_pages(struct hinic3_hwdev *hwdev, struct hinic3_wq *wq)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hinic3_queue_pages_alloc(hwdev, &amp;wq-&gt;qpages, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = wq_init_wq_block(hwdev, wq);</div><div class='add'>+	if (err) {</div><div class='add'>+		hinic3_queue_pages_free(hwdev, &amp;wq-&gt;qpages);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wq_free_pages(struct hinic3_hwdev *hwdev, struct hinic3_wq *wq)</div><div class='add'>+{</div><div class='add'>+	if (!hinic3_wq_is_0_level_cla(wq))</div><div class='add'>+		dma_free_coherent(hwdev-&gt;dev,</div><div class='add'>+				  HINIC3_MIN_PAGE_SIZE,</div><div class='add'>+				  wq-&gt;wq_block_vaddr,</div><div class='add'>+				  wq-&gt;wq_block_paddr);</div><div class='add'>+</div><div class='add'>+	hinic3_queue_pages_free(hwdev, &amp;wq-&gt;qpages);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_wq_create(struct hinic3_hwdev *hwdev, struct hinic3_wq *wq,</div><div class='add'>+		     u32 q_depth, u16 wqebb_size)</div><div class='add'>+{</div><div class='add'>+	u32 wq_page_size;</div><div class='add'>+</div><div class='add'>+	if (q_depth &lt; WQ_MIN_DEPTH || q_depth &gt; WQ_MAX_DEPTH ||</div><div class='add'>+	    !is_power_of_2(q_depth) || !is_power_of_2(wqebb_size)) {</div><div class='add'>+		dev_err(hwdev-&gt;dev, "Invalid WQ: q_depth %u, wqebb_size %u\n",</div><div class='add'>+			q_depth, wqebb_size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wq_page_size = ALIGN(hwdev-&gt;wq_page_size, HINIC3_MIN_PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	memset(wq, 0, sizeof(*wq));</div><div class='add'>+	wq-&gt;q_depth = q_depth;</div><div class='add'>+	wq-&gt;idx_mask = q_depth - 1;</div><div class='add'>+</div><div class='add'>+	hinic3_queue_pages_init(&amp;wq-&gt;qpages, q_depth, wq_page_size, wqebb_size);</div><div class='add'>+</div><div class='add'>+	return wq_alloc_pages(hwdev, wq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_wq_destroy(struct hinic3_hwdev *hwdev, struct hinic3_wq *wq)</div><div class='add'>+{</div><div class='add'>+	wq_free_pages(hwdev, wq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_wq_reset(struct hinic3_wq *wq)</div><div class='add'>+{</div><div class='add'>+	struct hinic3_queue_pages *qpages = &amp;wq-&gt;qpages;</div><div class='add'>+	u16 pg_idx;</div><div class='add'>+</div><div class='add'>+	wq-&gt;cons_idx = 0;</div><div class='add'>+	wq-&gt;prod_idx = 0;</div><div class='add'>+</div><div class='add'>+	for (pg_idx = 0; pg_idx &lt; qpages-&gt;num_pages; pg_idx++)</div><div class='add'>+		memset(qpages-&gt;pages[pg_idx].align_vaddr, 0, qpages-&gt;page_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hinic3_wq_get_multi_wqebbs(struct hinic3_wq *wq,</div><div class='add'>+				u16 num_wqebbs, u16 *prod_idx,</div><div class='add'>+				struct hinic3_sq_bufdesc **first_part_wqebbs,</div><div class='add'>+				struct hinic3_sq_bufdesc **second_part_wqebbs,</div><div class='add'>+				u16 *first_part_wqebbs_num)</div><div class='add'>+{</div><div class='add'>+	u32 idx, remaining;</div><div class='add'>+</div><div class='add'>+	idx = wq-&gt;prod_idx &amp; wq-&gt;idx_mask;</div><div class='add'>+	wq-&gt;prod_idx += num_wqebbs;</div><div class='add'>+	*prod_idx = idx;</div><div class='add'>+	*first_part_wqebbs = get_q_element(&amp;wq-&gt;qpages, idx, &amp;remaining);</div><div class='add'>+	if (likely(remaining &gt;= num_wqebbs)) {</div><div class='add'>+		*first_part_wqebbs_num = num_wqebbs;</div><div class='add'>+		*second_part_wqebbs = NULL;</div><div class='add'>+	} else {</div><div class='add'>+		*first_part_wqebbs_num = remaining;</div><div class='add'>+		idx += remaining;</div><div class='add'>+		*second_part_wqebbs = get_q_element(&amp;wq-&gt;qpages, idx, NULL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool hinic3_wq_is_0_level_cla(const struct hinic3_wq *wq)</div><div class='add'>+{</div><div class='add'>+	return wq-&gt;qpages.num_pages == 1;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/huawei/hinic3/hinic3_wq.h b/drivers/net/ethernet/huawei/hinic3/hinic3_wq.h<br/>new file mode 100644<br/>index 000000000000..9b3f012bec80<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/huawei/hinic3/hinic3_wq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/huawei/hinic3/hinic3_wq.h</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef _HINIC3_WQ_H_</div><div class='add'>+#define _HINIC3_WQ_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hinic3_queue_common.h"</div><div class='add'>+</div><div class='add'>+struct hinic3_sq_bufdesc {</div><div class='add'>+	/* 31-bits Length, L2NIC only uses length[17:0] */</div><div class='add'>+	__le32 len;</div><div class='add'>+	__le32 rsvd;</div><div class='add'>+	__le32 hi_addr;</div><div class='add'>+	__le32 lo_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Work queue is used to submit elements (tx, rx, cmd) to hw.</div><div class='add'>+ * Driver is the producer that advances prod_idx. cons_idx is advanced when</div><div class='add'>+ * HW reports completions of previously submitted elements.</div><div class='add'>+ */</div><div class='add'>+struct hinic3_wq {</div><div class='add'>+	struct hinic3_queue_pages qpages;</div><div class='add'>+	/* Unmasked producer/consumer indices that are advanced to natural</div><div class='add'>+	 * integer overflow regardless of queue depth.</div><div class='add'>+	 */</div><div class='add'>+	u16                       cons_idx;</div><div class='add'>+	u16                       prod_idx;</div><div class='add'>+</div><div class='add'>+	u32                       q_depth;</div><div class='add'>+	u16                       idx_mask;</div><div class='add'>+</div><div class='add'>+	/* Work Queue (logical WQEBB array) is mapped to hw via Chip Logical</div><div class='add'>+	 * Address (CLA) using 1 of 2 levels:</div><div class='add'>+	 *     level 0 - direct mapping of single wq page</div><div class='add'>+	 *     level 1 - indirect mapping of multiple pages via additional page</div><div class='add'>+	 *               table.</div><div class='add'>+	 * When wq uses level 1, wq_block will hold the allocated indirection</div><div class='add'>+	 * table.</div><div class='add'>+	 */</div><div class='add'>+	dma_addr_t                wq_block_paddr;</div><div class='add'>+	__be64                    *wq_block_vaddr;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+/* Get number of elements in work queue that are in-use. */</div><div class='add'>+static inline u16 hinic3_wq_get_used(const struct hinic3_wq *wq)</div><div class='add'>+{</div><div class='add'>+	return READ_ONCE(wq-&gt;prod_idx) - READ_ONCE(wq-&gt;cons_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 hinic3_wq_free_wqebbs(struct hinic3_wq *wq)</div><div class='add'>+{</div><div class='add'>+	/* Don't allow queue to become completely full, report (free - 1). */</div><div class='add'>+	return wq-&gt;q_depth - hinic3_wq_get_used(wq) - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void *hinic3_wq_get_one_wqebb(struct hinic3_wq *wq, u16 *pi)</div><div class='add'>+{</div><div class='add'>+	*pi = wq-&gt;prod_idx &amp; wq-&gt;idx_mask;</div><div class='add'>+	wq-&gt;prod_idx++;</div><div class='add'>+</div><div class='add'>+	return get_q_element(&amp;wq-&gt;qpages, *pi, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void hinic3_wq_put_wqebbs(struct hinic3_wq *wq, u16 num_wqebbs)</div><div class='add'>+{</div><div class='add'>+	wq-&gt;cons_idx += num_wqebbs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 hinic3_wq_get_first_wqe_page_addr(const struct hinic3_wq *wq)</div><div class='add'>+{</div><div class='add'>+	return wq-&gt;qpages.pages[0].align_paddr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hinic3_wq_create(struct hinic3_hwdev *hwdev, struct hinic3_wq *wq,</div><div class='add'>+		     u32 q_depth, u16 wqebb_size);</div><div class='add'>+void hinic3_wq_destroy(struct hinic3_hwdev *hwdev, struct hinic3_wq *wq);</div><div class='add'>+void hinic3_wq_reset(struct hinic3_wq *wq);</div><div class='add'>+void hinic3_wq_get_multi_wqebbs(struct hinic3_wq *wq,</div><div class='add'>+				u16 num_wqebbs, u16 *prod_idx,</div><div class='add'>+				struct hinic3_sq_bufdesc **first_part_wqebbs,</div><div class='add'>+				struct hinic3_sq_bufdesc **second_part_wqebbs,</div><div class='add'>+				u16 *first_part_wqebbs_num);</div><div class='add'>+bool hinic3_wq_is_0_level_cla(const struct hinic3_wq *wq);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/ibm/Kconfig b/drivers/net/ethernet/ibm/Kconfig<br/>index c0c112d95b89..4f4b23465c47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ibm/Kconfig</a></div><div class='hunk'>@@ -27,6 +27,19 @@ config IBMVETH</div><div class='ctx'> 	  To compile this driver as a module, choose M here. The module will</div><div class='ctx'> 	  be called ibmveth.</div><div class='ctx'> </div><div class='add'>+config IBMVETH_KUNIT_TEST</div><div class='add'>+	bool "KUnit test for IBM LAN Virtual Ethernet support" if !KUNIT_ALL_TESTS</div><div class='add'>+	depends on KUNIT</div><div class='add'>+	depends on KUNIT=y &amp;&amp; IBMVETH=y</div><div class='add'>+	default KUNIT_ALL_TESTS</div><div class='add'>+	help</div><div class='add'>+	  This builds unit tests for the IBM LAN Virtual Ethernet driver.</div><div class='add'>+</div><div class='add'>+	  For more information on KUnit and unit tests in general, please refer</div><div class='add'>+	  to the KUnit documentation in Documentation/dev-tools/kunit/.</div><div class='add'>+</div><div class='add'>+	  If unsure, say N.</div><div class='add'>+</div><div class='ctx'> source "drivers/net/ethernet/ibm/emac/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config EHEA</div><div class='head'>diff --git a/drivers/net/ethernet/ibm/emac/core.c b/drivers/net/ethernet/ibm/emac/core.c<br/>index 25b8a3556004..417dfa18daae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/emac/core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/emac/core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/emac/core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ibm/emac/core.c</a></div><div class='hunk'>@@ -2554,17 +2554,12 @@ static int emac_dt_mdio_probe(struct emac_instance *dev)</div><div class='ctx'> 	struct mii_bus *bus;</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='del'>-	mii_np = of_get_child_by_name(dev-&gt;ofdev-&gt;dev.of_node, "mdio");</div><div class='add'>+	mii_np = of_get_available_child_by_name(dev-&gt;ofdev-&gt;dev.of_node, "mdio");</div><div class='ctx'> 	if (!mii_np) {</div><div class='ctx'> 		dev_err(&amp;dev-&gt;ofdev-&gt;dev, "no mdio definition found.");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!of_device_is_available(mii_np)) {</div><div class='del'>-		res = -ENODEV;</div><div class='del'>-		goto put_node;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	bus = devm_mdiobus_alloc(&amp;dev-&gt;ofdev-&gt;dev);</div><div class='ctx'> 	if (!bus) {</div><div class='ctx'> 		res = -ENOMEM;</div><div class='head'>diff --git a/drivers/net/ethernet/ibm/ibmveth.c b/drivers/net/ethernet/ibm/ibmveth.c<br/>index b619a3ec245b..6f0821f1e798 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/ibmveth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/ibmveth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/ibmveth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ibm/ibmveth.c</a></div><div class='hunk'>@@ -39,8 +39,6 @@</div><div class='ctx'> #include "ibmveth.h"</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t ibmveth_interrupt(int irq, void *dev_instance);</div><div class='del'>-static void ibmveth_rxq_harvest_buffer(struct ibmveth_adapter *adapter,</div><div class='del'>-				       bool reuse);</div><div class='ctx'> static unsigned long ibmveth_get_desired_dma(struct vio_dev *vdev);</div><div class='ctx'> </div><div class='ctx'> static struct kobj_type ktype_veth_pool;</div><div class='hunk'>@@ -213,94 +211,169 @@ static inline void ibmveth_flush_buffer(void *addr, unsigned long length)</div><div class='ctx'> static void ibmveth_replenish_buffer_pool(struct ibmveth_adapter *adapter,</div><div class='ctx'> 					  struct ibmveth_buff_pool *pool)</div><div class='ctx'> {</div><div class='del'>-	u32 i;</div><div class='del'>-	u32 count = pool-&gt;size - atomic_read(&amp;pool-&gt;available);</div><div class='del'>-	u32 buffers_added = 0;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	unsigned int free_index, index;</div><div class='del'>-	u64 correlator;</div><div class='add'>+	union ibmveth_buf_desc descs[IBMVETH_MAX_RX_PER_HCALL] = {0};</div><div class='add'>+	u32 remaining = pool-&gt;size - atomic_read(&amp;pool-&gt;available);</div><div class='add'>+	u64 correlators[IBMVETH_MAX_RX_PER_HCALL] = {0};</div><div class='ctx'> 	unsigned long lpar_rc;</div><div class='add'>+	u32 buffers_added = 0;</div><div class='add'>+	u32 i, filled, batch;</div><div class='add'>+	struct vio_dev *vdev;</div><div class='ctx'> 	dma_addr_t dma_addr;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	u32 index;</div><div class='add'>+</div><div class='add'>+	vdev = adapter-&gt;vdev;</div><div class='add'>+	dev = &amp;vdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	mb();</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; count; ++i) {</div><div class='del'>-		union ibmveth_buf_desc desc;</div><div class='add'>+	batch = adapter-&gt;rx_buffers_per_hcall;</div><div class='add'>+</div><div class='add'>+	while (remaining &gt; 0) {</div><div class='add'>+		unsigned int free_index = pool-&gt;consumer_index;</div><div class='add'>+</div><div class='add'>+		/* Fill a batch of descriptors */</div><div class='add'>+		for (filled = 0; filled &lt; min(remaining, batch); filled++) {</div><div class='add'>+			index = pool-&gt;free_map[free_index];</div><div class='add'>+			if (WARN_ON(index == IBM_VETH_INVALID_MAP)) {</div><div class='add'>+				adapter-&gt;replenish_add_buff_failure++;</div><div class='add'>+				netdev_info(adapter-&gt;netdev,</div><div class='add'>+					    "Invalid map index %u, reset\n",</div><div class='add'>+					    index);</div><div class='add'>+				schedule_work(&amp;adapter-&gt;work);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-		free_index = pool-&gt;consumer_index;</div><div class='del'>-		index = pool-&gt;free_map[free_index];</div><div class='del'>-		skb = NULL;</div><div class='add'>+			if (!pool-&gt;skbuff[index]) {</div><div class='add'>+				struct sk_buff *skb = NULL;</div><div class='ctx'> </div><div class='del'>-		BUG_ON(index == IBM_VETH_INVALID_MAP);</div><div class='add'>+				skb = netdev_alloc_skb(adapter-&gt;netdev,</div><div class='add'>+						       pool-&gt;buff_size);</div><div class='add'>+				if (!skb) {</div><div class='add'>+					adapter-&gt;replenish_no_mem++;</div><div class='add'>+					adapter-&gt;replenish_add_buff_failure++;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='ctx'> </div><div class='del'>-		/* are we allocating a new buffer or recycling an old one */</div><div class='del'>-		if (pool-&gt;skbuff[index])</div><div class='del'>-			goto reuse;</div><div class='add'>+				dma_addr = dma_map_single(dev, skb-&gt;data,</div><div class='add'>+							  pool-&gt;buff_size,</div><div class='add'>+							  DMA_FROM_DEVICE);</div><div class='add'>+				if (dma_mapping_error(dev, dma_addr)) {</div><div class='add'>+					dev_kfree_skb_any(skb);</div><div class='add'>+					adapter-&gt;replenish_add_buff_failure++;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='ctx'> </div><div class='del'>-		skb = netdev_alloc_skb(adapter-&gt;netdev, pool-&gt;buff_size);</div><div class='add'>+				pool-&gt;dma_addr[index] = dma_addr;</div><div class='add'>+				pool-&gt;skbuff[index] = skb;</div><div class='add'>+			} else {</div><div class='add'>+				/* re-use case */</div><div class='add'>+				dma_addr = pool-&gt;dma_addr[index];</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-		if (!skb) {</div><div class='del'>-			netdev_dbg(adapter-&gt;netdev,</div><div class='del'>-				   "replenish: unable to allocate skb\n");</div><div class='del'>-			adapter-&gt;replenish_no_mem++;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+			if (rx_flush) {</div><div class='add'>+				unsigned int len;</div><div class='ctx'> </div><div class='del'>-		dma_addr = dma_map_single(&amp;adapter-&gt;vdev-&gt;dev, skb-&gt;data,</div><div class='del'>-				pool-&gt;buff_size, DMA_FROM_DEVICE);</div><div class='add'>+				len = adapter-&gt;netdev-&gt;mtu + IBMVETH_BUFF_OH;</div><div class='add'>+				len = min(pool-&gt;buff_size, len);</div><div class='add'>+				ibmveth_flush_buffer(pool-&gt;skbuff[index]-&gt;data,</div><div class='add'>+						     len);</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-		if (dma_mapping_error(&amp;adapter-&gt;vdev-&gt;dev, dma_addr))</div><div class='del'>-			goto failure;</div><div class='add'>+			descs[filled].fields.flags_len = IBMVETH_BUF_VALID |</div><div class='add'>+							  pool-&gt;buff_size;</div><div class='add'>+			descs[filled].fields.address = dma_addr;</div><div class='ctx'> </div><div class='del'>-		pool-&gt;dma_addr[index] = dma_addr;</div><div class='del'>-		pool-&gt;skbuff[index] = skb;</div><div class='add'>+			correlators[filled] = ((u64)pool-&gt;index &lt;&lt; 32) | index;</div><div class='add'>+			*(u64 *)pool-&gt;skbuff[index]-&gt;data = correlators[filled];</div><div class='ctx'> </div><div class='del'>-		if (rx_flush) {</div><div class='del'>-			unsigned int len = min(pool-&gt;buff_size,</div><div class='del'>-					       adapter-&gt;netdev-&gt;mtu +</div><div class='del'>-					       IBMVETH_BUFF_OH);</div><div class='del'>-			ibmveth_flush_buffer(skb-&gt;data, len);</div><div class='add'>+			free_index++;</div><div class='add'>+			if (free_index &gt;= pool-&gt;size)</div><div class='add'>+				free_index = 0;</div><div class='ctx'> 		}</div><div class='del'>-reuse:</div><div class='del'>-		dma_addr = pool-&gt;dma_addr[index];</div><div class='del'>-		desc.fields.flags_len = IBMVETH_BUF_VALID | pool-&gt;buff_size;</div><div class='del'>-		desc.fields.address = dma_addr;</div><div class='del'>-</div><div class='del'>-		correlator = ((u64)pool-&gt;index &lt;&lt; 32) | index;</div><div class='del'>-		*(u64 *)pool-&gt;skbuff[index]-&gt;data = correlator;</div><div class='ctx'> </div><div class='del'>-		lpar_rc = h_add_logical_lan_buffer(adapter-&gt;vdev-&gt;unit_address,</div><div class='del'>-						   desc.desc);</div><div class='add'>+		if (!filled)</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='add'>+		/* single buffer case*/</div><div class='add'>+		if (filled == 1)</div><div class='add'>+			lpar_rc = h_add_logical_lan_buffer(vdev-&gt;unit_address,</div><div class='add'>+							   descs[0].desc);</div><div class='add'>+		else</div><div class='add'>+			/* Multi-buffer hcall */</div><div class='add'>+			lpar_rc = h_add_logical_lan_buffers(vdev-&gt;unit_address,</div><div class='add'>+							    descs[0].desc,</div><div class='add'>+							    descs[1].desc,</div><div class='add'>+							    descs[2].desc,</div><div class='add'>+							    descs[3].desc,</div><div class='add'>+							    descs[4].desc,</div><div class='add'>+							    descs[5].desc,</div><div class='add'>+							    descs[6].desc,</div><div class='add'>+							    descs[7].desc);</div><div class='ctx'> 		if (lpar_rc != H_SUCCESS) {</div><div class='del'>-			netdev_warn(adapter-&gt;netdev,</div><div class='del'>-				    "%sadd_logical_lan failed %lu\n",</div><div class='del'>-				    skb ? "" : "When recycling: ", lpar_rc);</div><div class='del'>-			goto failure;</div><div class='add'>+			dev_warn_ratelimited(dev,</div><div class='add'>+					     "RX h_add_logical_lan failed: filled=%u, rc=%lu, batch=%u\n",</div><div class='add'>+					     filled, lpar_rc, batch);</div><div class='add'>+			goto hcall_failure;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		pool-&gt;free_map[free_index] = IBM_VETH_INVALID_MAP;</div><div class='del'>-		pool-&gt;consumer_index++;</div><div class='del'>-		if (pool-&gt;consumer_index &gt;= pool-&gt;size)</div><div class='del'>-			pool-&gt;consumer_index = 0;</div><div class='add'>+		/* Only update pool state after hcall succeeds */</div><div class='add'>+		for (i = 0; i &lt; filled; i++) {</div><div class='add'>+			free_index = pool-&gt;consumer_index;</div><div class='add'>+			pool-&gt;free_map[free_index] = IBM_VETH_INVALID_MAP;</div><div class='ctx'> </div><div class='del'>-		buffers_added++;</div><div class='del'>-		adapter-&gt;replenish_add_buff_success++;</div><div class='del'>-	}</div><div class='add'>+			pool-&gt;consumer_index++;</div><div class='add'>+			if (pool-&gt;consumer_index &gt;= pool-&gt;size)</div><div class='add'>+				pool-&gt;consumer_index = 0;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	mb();</div><div class='del'>-	atomic_add(buffers_added, &amp;(pool-&gt;available));</div><div class='del'>-	return;</div><div class='add'>+		buffers_added += filled;</div><div class='add'>+		adapter-&gt;replenish_add_buff_success += filled;</div><div class='add'>+		remaining -= filled;</div><div class='ctx'> </div><div class='del'>-failure:</div><div class='add'>+		memset(&amp;descs, 0, sizeof(descs));</div><div class='add'>+		memset(&amp;correlators, 0, sizeof(correlators));</div><div class='add'>+		continue;</div><div class='ctx'> </div><div class='del'>-	if (dma_addr &amp;&amp; !dma_mapping_error(&amp;adapter-&gt;vdev-&gt;dev, dma_addr))</div><div class='del'>-		dma_unmap_single(&amp;adapter-&gt;vdev-&gt;dev,</div><div class='del'>-		                 pool-&gt;dma_addr[index], pool-&gt;buff_size,</div><div class='del'>-		                 DMA_FROM_DEVICE);</div><div class='del'>-	dev_kfree_skb_any(pool-&gt;skbuff[index]);</div><div class='del'>-	pool-&gt;skbuff[index] = NULL;</div><div class='del'>-	adapter-&gt;replenish_add_buff_failure++;</div><div class='add'>+hcall_failure:</div><div class='add'>+		for (i = 0; i &lt; filled; i++) {</div><div class='add'>+			index = correlators[i] &amp; 0xffffffffUL;</div><div class='add'>+			dma_addr =  pool-&gt;dma_addr[index];</div><div class='add'>+</div><div class='add'>+			if (pool-&gt;skbuff[index]) {</div><div class='add'>+				if (dma_addr &amp;&amp;</div><div class='add'>+				    !dma_mapping_error(dev, dma_addr))</div><div class='add'>+					dma_unmap_single(dev, dma_addr,</div><div class='add'>+							 pool-&gt;buff_size,</div><div class='add'>+							 DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+				dev_kfree_skb_any(pool-&gt;skbuff[index]);</div><div class='add'>+				pool-&gt;skbuff[index] = NULL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		adapter-&gt;replenish_add_buff_failure += filled;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If multi rx buffers hcall is no longer supported by FW</div><div class='add'>+		 * e.g. in the case of Live Parttion Migration</div><div class='add'>+		 */</div><div class='add'>+		if (batch &gt; 1 &amp;&amp; lpar_rc == H_FUNCTION) {</div><div class='add'>+			/*</div><div class='add'>+			 * Instead of retry submit single buffer individually</div><div class='add'>+			 * here just set the max rx buffer per hcall to 1</div><div class='add'>+			 * buffers will be respleshed next time</div><div class='add'>+			 * when ibmveth_replenish_buffer_pool() is called again</div><div class='add'>+			 * with single-buffer case</div><div class='add'>+			 */</div><div class='add'>+			netdev_info(adapter-&gt;netdev,</div><div class='add'>+				    "RX Multi buffers not supported by FW, rc=%lu\n",</div><div class='add'>+				    lpar_rc);</div><div class='add'>+			adapter-&gt;rx_buffers_per_hcall = 1;</div><div class='add'>+			netdev_info(adapter-&gt;netdev,</div><div class='add'>+				    "Next rx replesh will fall back to single-buffer hcall\n");</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mb();</div><div class='ctx'> 	atomic_add(buffers_added, &amp;(pool-&gt;available));</div><div class='hunk'>@@ -370,20 +443,36 @@ static void ibmveth_free_buffer_pool(struct ibmveth_adapter *adapter,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* remove a buffer from a pool */</div><div class='del'>-static void ibmveth_remove_buffer_from_pool(struct ibmveth_adapter *adapter,</div><div class='del'>-					    u64 correlator, bool reuse)</div><div class='add'>+/**</div><div class='add'>+ * ibmveth_remove_buffer_from_pool - remove a buffer from a pool</div><div class='add'>+ * @adapter: adapter instance</div><div class='add'>+ * @correlator: identifies pool and index</div><div class='add'>+ * @reuse: whether to reuse buffer</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * %0       - success</div><div class='add'>+ * * %-EINVAL - correlator maps to pool or index out of range</div><div class='add'>+ * * %-EFAULT - pool and index map to null skb</div><div class='add'>+ */</div><div class='add'>+static int ibmveth_remove_buffer_from_pool(struct ibmveth_adapter *adapter,</div><div class='add'>+					   u64 correlator, bool reuse)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int pool  = correlator &gt;&gt; 32;</div><div class='ctx'> 	unsigned int index = correlator &amp; 0xffffffffUL;</div><div class='ctx'> 	unsigned int free_index;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(pool &gt;= IBMVETH_NUM_BUFF_POOLS);</div><div class='del'>-	BUG_ON(index &gt;= adapter-&gt;rx_buff_pool[pool].size);</div><div class='add'>+	if (WARN_ON(pool &gt;= IBMVETH_NUM_BUFF_POOLS) ||</div><div class='add'>+	    WARN_ON(index &gt;= adapter-&gt;rx_buff_pool[pool].size)) {</div><div class='add'>+		schedule_work(&amp;adapter-&gt;work);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	skb = adapter-&gt;rx_buff_pool[pool].skbuff[index];</div><div class='del'>-	BUG_ON(skb == NULL);</div><div class='add'>+	if (WARN_ON(!skb)) {</div><div class='add'>+		schedule_work(&amp;adapter-&gt;work);</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* if we are going to reuse the buffer then keep the pointers around</div><div class='ctx'> 	 * but mark index as available. replenish will see the skb pointer and</div><div class='hunk'>@@ -411,6 +500,8 @@ static void ibmveth_remove_buffer_from_pool(struct ibmveth_adapter *adapter,</div><div class='ctx'> 	mb();</div><div class='ctx'> </div><div class='ctx'> 	atomic_dec(&amp;(adapter-&gt;rx_buff_pool[pool].available));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* get the current buffer on the rx queue */</div><div class='hunk'>@@ -420,24 +511,44 @@ static inline struct sk_buff *ibmveth_rxq_get_buffer(struct ibmveth_adapter *ada</div><div class='ctx'> 	unsigned int pool = correlator &gt;&gt; 32;</div><div class='ctx'> 	unsigned int index = correlator &amp; 0xffffffffUL;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(pool &gt;= IBMVETH_NUM_BUFF_POOLS);</div><div class='del'>-	BUG_ON(index &gt;= adapter-&gt;rx_buff_pool[pool].size);</div><div class='add'>+	if (WARN_ON(pool &gt;= IBMVETH_NUM_BUFF_POOLS) ||</div><div class='add'>+	    WARN_ON(index &gt;= adapter-&gt;rx_buff_pool[pool].size)) {</div><div class='add'>+		schedule_work(&amp;adapter-&gt;work);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return adapter-&gt;rx_buff_pool[pool].skbuff[index];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ibmveth_rxq_harvest_buffer(struct ibmveth_adapter *adapter,</div><div class='del'>-				       bool reuse)</div><div class='add'>+/**</div><div class='add'>+ * ibmveth_rxq_harvest_buffer - Harvest buffer from pool</div><div class='add'>+ *</div><div class='add'>+ * @adapter: pointer to adapter</div><div class='add'>+ * @reuse:   whether to reuse buffer</div><div class='add'>+ *</div><div class='add'>+ * Context: called from ibmveth_poll</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * %0    - success</div><div class='add'>+ * * other - non-zero return from ibmveth_remove_buffer_from_pool</div><div class='add'>+ */</div><div class='add'>+static int ibmveth_rxq_harvest_buffer(struct ibmveth_adapter *adapter,</div><div class='add'>+				      bool reuse)</div><div class='ctx'> {</div><div class='ctx'> 	u64 cor;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	cor = adapter-&gt;rx_queue.queue_addr[adapter-&gt;rx_queue.index].correlator;</div><div class='del'>-	ibmveth_remove_buffer_from_pool(adapter, cor, reuse);</div><div class='add'>+	rc = ibmveth_remove_buffer_from_pool(adapter, cor, reuse);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='ctx'> 	if (++adapter-&gt;rx_queue.index == adapter-&gt;rx_queue.num_slots) {</div><div class='ctx'> 		adapter-&gt;rx_queue.index = 0;</div><div class='ctx'> 		adapter-&gt;rx_queue.toggle = !adapter-&gt;rx_queue.toggle;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ibmveth_free_tx_ltb(struct ibmveth_adapter *adapter, int idx)</div><div class='hunk'>@@ -709,6 +820,35 @@ static int ibmveth_close(struct net_device *netdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ibmveth_reset - Handle scheduled reset work</div><div class='add'>+ *</div><div class='add'>+ * @w: pointer to work_struct embedded in adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Context: This routine acquires rtnl_mutex and disables its NAPI through</div><div class='add'>+ *          ibmveth_close. It can't be called directly in a context that has</div><div class='add'>+ *          already acquired rtnl_mutex or disabled its NAPI, or directly from</div><div class='add'>+ *          a poll routine.</div><div class='add'>+ *</div><div class='add'>+ * Return: void</div><div class='add'>+ */</div><div class='add'>+static void ibmveth_reset(struct work_struct *w)</div><div class='add'>+{</div><div class='add'>+	struct ibmveth_adapter *adapter = container_of(w, struct ibmveth_adapter, work);</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(netdev, "reset starting\n");</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	dev_close(adapter-&gt;netdev);</div><div class='add'>+	dev_open(adapter-&gt;netdev, NULL);</div><div class='add'>+</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	netdev_dbg(netdev, "reset complete\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ibmveth_set_link_ksettings(struct net_device *dev,</div><div class='ctx'> 				      const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='hunk'>@@ -1324,7 +1464,8 @@ restart_poll:</div><div class='ctx'> 			wmb(); /* suggested by larson1 */</div><div class='ctx'> 			adapter-&gt;rx_invalid_buffer++;</div><div class='ctx'> 			netdev_dbg(netdev, "recycling invalid buffer\n");</div><div class='del'>-			ibmveth_rxq_harvest_buffer(adapter, true);</div><div class='add'>+			if (unlikely(ibmveth_rxq_harvest_buffer(adapter, true)))</div><div class='add'>+				break;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			struct sk_buff *skb, *new_skb;</div><div class='ctx'> 			int length = ibmveth_rxq_frame_length(adapter);</div><div class='hunk'>@@ -1334,6 +1475,8 @@ restart_poll:</div><div class='ctx'> 			__sum16 iph_check = 0;</div><div class='ctx'> </div><div class='ctx'> 			skb = ibmveth_rxq_get_buffer(adapter);</div><div class='add'>+			if (unlikely(!skb))</div><div class='add'>+				break;</div><div class='ctx'> </div><div class='ctx'> 			/* if the large packet bit is set in the rx queue</div><div class='ctx'> 			 * descriptor, the mss will be written by PHYP eight</div><div class='hunk'>@@ -1357,10 +1500,12 @@ restart_poll:</div><div class='ctx'> 				if (rx_flush)</div><div class='ctx'> 					ibmveth_flush_buffer(skb-&gt;data,</div><div class='ctx'> 						length + offset);</div><div class='del'>-				ibmveth_rxq_harvest_buffer(adapter, true);</div><div class='add'>+				if (unlikely(ibmveth_rxq_harvest_buffer(adapter, true)))</div><div class='add'>+					break;</div><div class='ctx'> 				skb = new_skb;</div><div class='ctx'> 			} else {</div><div class='del'>-				ibmveth_rxq_harvest_buffer(adapter, false);</div><div class='add'>+				if (unlikely(ibmveth_rxq_harvest_buffer(adapter, false)))</div><div class='add'>+					break;</div><div class='ctx'> 				skb_reserve(skb, offset);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -1407,7 +1552,10 @@ restart_poll:</div><div class='ctx'> 	 * then check once more to make sure we are done.</div><div class='ctx'> 	 */</div><div class='ctx'> 	lpar_rc = h_vio_signal(adapter-&gt;vdev-&gt;unit_address, VIO_IRQ_ENABLE);</div><div class='del'>-	BUG_ON(lpar_rc != H_SUCCESS);</div><div class='add'>+	if (WARN_ON(lpar_rc != H_SUCCESS)) {</div><div class='add'>+		schedule_work(&amp;adapter-&gt;work);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (ibmveth_rxq_pending_buffer(adapter) &amp;&amp; napi_schedule(napi)) {</div><div class='ctx'> 		lpar_rc = h_vio_signal(adapter-&gt;vdev-&gt;unit_address,</div><div class='hunk'>@@ -1428,7 +1576,7 @@ static irqreturn_t ibmveth_interrupt(int irq, void *dev_instance)</div><div class='ctx'> 	if (napi_schedule_prep(&amp;adapter-&gt;napi)) {</div><div class='ctx'> 		lpar_rc = h_vio_signal(adapter-&gt;vdev-&gt;unit_address,</div><div class='ctx'> 				       VIO_IRQ_DISABLE);</div><div class='del'>-		BUG_ON(lpar_rc != H_SUCCESS);</div><div class='add'>+		WARN_ON(lpar_rc != H_SUCCESS);</div><div class='ctx'> 		__napi_schedule(&amp;adapter-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='hunk'>@@ -1670,6 +1818,7 @@ static int ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;vdev = dev;</div><div class='ctx'> 	adapter-&gt;netdev = netdev;</div><div class='add'>+	INIT_WORK(&amp;adapter-&gt;work, ibmveth_reset);</div><div class='ctx'> 	adapter-&gt;mcastFilterSize = be32_to_cpu(*mcastFilterSize_p);</div><div class='ctx'> 	ibmveth_init_link_settings(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1705,6 +1854,19 @@ static int ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id)</div><div class='ctx'> 		netdev-&gt;features |= NETIF_F_FRAGLIST;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ret == H_SUCCESS &amp;&amp;</div><div class='add'>+	    (ret_attr &amp; IBMVETH_ILLAN_RX_MULTI_BUFF_SUPPORT)) {</div><div class='add'>+		adapter-&gt;rx_buffers_per_hcall = IBMVETH_MAX_RX_PER_HCALL;</div><div class='add'>+		netdev_dbg(netdev,</div><div class='add'>+			   "RX Multi-buffer hcall supported by FW, batch set to %u\n",</div><div class='add'>+			    adapter-&gt;rx_buffers_per_hcall);</div><div class='add'>+	} else {</div><div class='add'>+		adapter-&gt;rx_buffers_per_hcall = 1;</div><div class='add'>+		netdev_dbg(netdev,</div><div class='add'>+			   "RX Single-buffer hcall mode, batch set to %u\n",</div><div class='add'>+			   adapter-&gt;rx_buffers_per_hcall);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	netdev-&gt;min_mtu = IBMVETH_MIN_MTU;</div><div class='ctx'> 	netdev-&gt;max_mtu = ETH_MAX_MTU - IBMVETH_BUFF_OH;</div><div class='ctx'> </div><div class='hunk'>@@ -1762,6 +1924,8 @@ static void ibmveth_remove(struct vio_dev *dev)</div><div class='ctx'> 	struct ibmveth_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	cancel_work_sync(&amp;adapter-&gt;work);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; IBMVETH_NUM_BUFF_POOLS; i++)</div><div class='ctx'> 		kobject_put(&amp;adapter-&gt;rx_buff_pool[i].kobj);</div><div class='ctx'> </div><div class='hunk'>@@ -1791,6 +1955,26 @@ static ssize_t veth_pool_show(struct kobject *kobj,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * veth_pool_store - sysfs store handler for pool attributes</div><div class='add'>+ * @kobj: kobject embedded in pool</div><div class='add'>+ * @attr: attribute being changed</div><div class='add'>+ * @buf: value being stored</div><div class='add'>+ * @count: length of @buf in bytes</div><div class='add'>+ *</div><div class='add'>+ * Stores new value in pool attribute. Verifies the range of the new value for</div><div class='add'>+ * size and buff_size. Verifies that at least one pool remains available to</div><div class='add'>+ * receive MTU-sized packets.</div><div class='add'>+ *</div><div class='add'>+ * Context: Process context.</div><div class='add'>+ *          Takes and releases rtnl_mutex to ensure correct ordering of close</div><div class='add'>+ *	    and open calls.</div><div class='add'>+ * Return:</div><div class='add'>+ * * %-EPERM  - Not allowed to disabled all MTU-sized buffer pools</div><div class='add'>+ * * %-EINVAL - New pool size or buffer size is out of range</div><div class='add'>+ * * count    - Return count for success</div><div class='add'>+ * * other    - Return value from a failed ibmveth_open call</div><div class='add'>+ */</div><div class='ctx'> static ssize_t veth_pool_store(struct kobject *kobj, struct attribute *attr,</div><div class='ctx'> 			       const char *buf, size_t count)</div><div class='ctx'> {</div><div class='hunk'>@@ -1800,24 +1984,30 @@ static ssize_t veth_pool_store(struct kobject *kobj, struct attribute *attr,</div><div class='ctx'> 	struct net_device *netdev = dev_get_drvdata(kobj_to_dev(kobj-&gt;parent));</div><div class='ctx'> 	struct ibmveth_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	long value = simple_strtol(buf, NULL, 10);</div><div class='add'>+	bool change = false;</div><div class='add'>+	u32 newbuff_size;</div><div class='add'>+	u32 oldbuff_size;</div><div class='add'>+	int newactive;</div><div class='add'>+	int oldactive;</div><div class='add'>+	u32 newsize;</div><div class='add'>+	u32 oldsize;</div><div class='ctx'> 	long rc;</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	oldbuff_size = pool-&gt;buff_size;</div><div class='add'>+	oldactive = pool-&gt;active;</div><div class='add'>+	oldsize = pool-&gt;size;</div><div class='add'>+</div><div class='add'>+	newbuff_size = oldbuff_size;</div><div class='add'>+	newactive = oldactive;</div><div class='add'>+	newsize = oldsize;</div><div class='add'>+</div><div class='ctx'> 	if (attr == &amp;veth_active_attr) {</div><div class='del'>-		if (value &amp;&amp; !pool-&gt;active) {</div><div class='del'>-			if (netif_running(netdev)) {</div><div class='del'>-				if (ibmveth_alloc_buffer_pool(pool)) {</div><div class='del'>-					netdev_err(netdev,</div><div class='del'>-						   "unable to alloc pool\n");</div><div class='del'>-					return -ENOMEM;</div><div class='del'>-				}</div><div class='del'>-				pool-&gt;active = 1;</div><div class='del'>-				ibmveth_close(netdev);</div><div class='del'>-				if ((rc = ibmveth_open(netdev)))</div><div class='del'>-					return rc;</div><div class='del'>-			} else {</div><div class='del'>-				pool-&gt;active = 1;</div><div class='del'>-			}</div><div class='del'>-		} else if (!value &amp;&amp; pool-&gt;active) {</div><div class='add'>+		if (value &amp;&amp; !oldactive) {</div><div class='add'>+			newactive = 1;</div><div class='add'>+			change = true;</div><div class='add'>+		} else if (!value &amp;&amp; oldactive) {</div><div class='ctx'> 			int mtu = netdev-&gt;mtu + IBMVETH_BUFF_OH;</div><div class='ctx'> 			int i;</div><div class='ctx'> 			/* Make sure there is a buffer pool with buffers that</div><div class='hunk'>@@ -1833,48 +2023,60 @@ static ssize_t veth_pool_store(struct kobject *kobj, struct attribute *attr,</div><div class='ctx'> </div><div class='ctx'> 			if (i == IBMVETH_NUM_BUFF_POOLS) {</div><div class='ctx'> 				netdev_err(netdev, "no active pool &gt;= MTU\n");</div><div class='del'>-				return -EPERM;</div><div class='add'>+				rc = -EPERM;</div><div class='add'>+				goto unlock_err;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (netif_running(netdev)) {</div><div class='del'>-				ibmveth_close(netdev);</div><div class='del'>-				pool-&gt;active = 0;</div><div class='del'>-				if ((rc = ibmveth_open(netdev)))</div><div class='del'>-					return rc;</div><div class='del'>-			}</div><div class='del'>-			pool-&gt;active = 0;</div><div class='add'>+			newactive = 0;</div><div class='add'>+			change = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (attr == &amp;veth_num_attr) {</div><div class='ctx'> 		if (value &lt;= 0 || value &gt; IBMVETH_MAX_POOL_COUNT) {</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		} else {</div><div class='del'>-			if (netif_running(netdev)) {</div><div class='del'>-				ibmveth_close(netdev);</div><div class='del'>-				pool-&gt;size = value;</div><div class='del'>-				if ((rc = ibmveth_open(netdev)))</div><div class='del'>-					return rc;</div><div class='del'>-			} else {</div><div class='del'>-				pool-&gt;size = value;</div><div class='del'>-			}</div><div class='add'>+			rc = -EINVAL;</div><div class='add'>+			goto unlock_err;</div><div class='add'>+		}</div><div class='add'>+		if (value != oldsize) {</div><div class='add'>+			newsize = value;</div><div class='add'>+			change = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (attr == &amp;veth_size_attr) {</div><div class='ctx'> 		if (value &lt;= IBMVETH_BUFF_OH || value &gt; IBMVETH_MAX_BUF_SIZE) {</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		} else {</div><div class='del'>-			if (netif_running(netdev)) {</div><div class='del'>-				ibmveth_close(netdev);</div><div class='del'>-				pool-&gt;buff_size = value;</div><div class='del'>-				if ((rc = ibmveth_open(netdev)))</div><div class='del'>-					return rc;</div><div class='del'>-			} else {</div><div class='del'>-				pool-&gt;buff_size = value;</div><div class='add'>+			rc = -EINVAL;</div><div class='add'>+			goto unlock_err;</div><div class='add'>+		}</div><div class='add'>+		if (value != oldbuff_size) {</div><div class='add'>+			newbuff_size = value;</div><div class='add'>+			change = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (change) {</div><div class='add'>+		if (netif_running(netdev))</div><div class='add'>+			ibmveth_close(netdev);</div><div class='add'>+</div><div class='add'>+		pool-&gt;active = newactive;</div><div class='add'>+		pool-&gt;buff_size = newbuff_size;</div><div class='add'>+		pool-&gt;size = newsize;</div><div class='add'>+</div><div class='add'>+		if (netif_running(netdev)) {</div><div class='add'>+			rc = ibmveth_open(netdev);</div><div class='add'>+			if (rc) {</div><div class='add'>+				pool-&gt;active = oldactive;</div><div class='add'>+				pool-&gt;buff_size = oldbuff_size;</div><div class='add'>+				pool-&gt;size = oldsize;</div><div class='add'>+				goto unlock_err;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	/* kick the interrupt handler to allocate/deallocate pools */</div><div class='ctx'> 	ibmveth_interrupt(netdev-&gt;irq, netdev);</div><div class='ctx'> 	return count;</div><div class='add'>+</div><div class='add'>+unlock_err:</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1947,3 +2149,132 @@ static void __exit ibmveth_module_exit(void)</div><div class='ctx'> </div><div class='ctx'> module_init(ibmveth_module_init);</div><div class='ctx'> module_exit(ibmveth_module_exit);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_IBMVETH_KUNIT_TEST</div><div class='add'>+#include &lt;kunit/test.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ibmveth_reset_kunit - reset routine for running in KUnit environment</div><div class='add'>+ *</div><div class='add'>+ * @w: pointer to work_struct embedded in adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Context: Called in the KUnit environment. Does nothing.</div><div class='add'>+ *</div><div class='add'>+ * Return: void</div><div class='add'>+ */</div><div class='add'>+static void ibmveth_reset_kunit(struct work_struct *w)</div><div class='add'>+{</div><div class='add'>+	netdev_dbg(NULL, "reset_kunit starting\n");</div><div class='add'>+	netdev_dbg(NULL, "reset_kunit complete\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ibmveth_remove_buffer_from_pool_test - unit test for some of</div><div class='add'>+ *                                        ibmveth_remove_buffer_from_pool</div><div class='add'>+ * @test: pointer to kunit structure</div><div class='add'>+ *</div><div class='add'>+ * Tests the error returns from ibmveth_remove_buffer_from_pool.</div><div class='add'>+ * ibmveth_remove_buffer_from_pool also calls WARN_ON, so dmesg should be</div><div class='add'>+ * checked to see that these warnings happened.</div><div class='add'>+ *</div><div class='add'>+ * Return: void</div><div class='add'>+ */</div><div class='add'>+static void ibmveth_remove_buffer_from_pool_test(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	struct ibmveth_adapter *adapter = kunit_kzalloc(test, sizeof(*adapter), GFP_KERNEL);</div><div class='add'>+	struct ibmveth_buff_pool *pool;</div><div class='add'>+	u64 correlator;</div><div class='add'>+</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adapter);</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;adapter-&gt;work, ibmveth_reset_kunit);</div><div class='add'>+</div><div class='add'>+	/* Set sane values for buffer pools */</div><div class='add'>+	for (int i = 0; i &lt; IBMVETH_NUM_BUFF_POOLS; i++)</div><div class='add'>+		ibmveth_init_buffer_pool(&amp;adapter-&gt;rx_buff_pool[i], i,</div><div class='add'>+					 pool_count[i], pool_size[i],</div><div class='add'>+					 pool_active[i]);</div><div class='add'>+</div><div class='add'>+	pool = &amp;adapter-&gt;rx_buff_pool[0];</div><div class='add'>+	pool-&gt;skbuff = kunit_kcalloc(test, pool-&gt;size, sizeof(void *), GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, pool-&gt;skbuff);</div><div class='add'>+</div><div class='add'>+	correlator = ((u64)IBMVETH_NUM_BUFF_POOLS &lt;&lt; 32) | 0;</div><div class='add'>+	KUNIT_EXPECT_EQ(test, -EINVAL, ibmveth_remove_buffer_from_pool(adapter, correlator, false));</div><div class='add'>+	KUNIT_EXPECT_EQ(test, -EINVAL, ibmveth_remove_buffer_from_pool(adapter, correlator, true));</div><div class='add'>+</div><div class='add'>+	correlator = ((u64)0 &lt;&lt; 32) | adapter-&gt;rx_buff_pool[0].size;</div><div class='add'>+	KUNIT_EXPECT_EQ(test, -EINVAL, ibmveth_remove_buffer_from_pool(adapter, correlator, false));</div><div class='add'>+	KUNIT_EXPECT_EQ(test, -EINVAL, ibmveth_remove_buffer_from_pool(adapter, correlator, true));</div><div class='add'>+</div><div class='add'>+	correlator = (u64)0 | 0;</div><div class='add'>+	pool-&gt;skbuff[0] = NULL;</div><div class='add'>+	KUNIT_EXPECT_EQ(test, -EFAULT, ibmveth_remove_buffer_from_pool(adapter, correlator, false));</div><div class='add'>+	KUNIT_EXPECT_EQ(test, -EFAULT, ibmveth_remove_buffer_from_pool(adapter, correlator, true));</div><div class='add'>+</div><div class='add'>+	flush_work(&amp;adapter-&gt;work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ibmveth_rxq_get_buffer_test - unit test for ibmveth_rxq_get_buffer</div><div class='add'>+ * @test: pointer to kunit structure</div><div class='add'>+ *</div><div class='add'>+ * Tests ibmveth_rxq_get_buffer. ibmveth_rxq_get_buffer also calls WARN_ON for</div><div class='add'>+ * the NULL returns, so dmesg should be checked to see that these warnings</div><div class='add'>+ * happened.</div><div class='add'>+ *</div><div class='add'>+ * Return: void</div><div class='add'>+ */</div><div class='add'>+static void ibmveth_rxq_get_buffer_test(struct kunit *test)</div><div class='add'>+{</div><div class='add'>+	struct ibmveth_adapter *adapter = kunit_kzalloc(test, sizeof(*adapter), GFP_KERNEL);</div><div class='add'>+	struct sk_buff *skb = kunit_kzalloc(test, sizeof(*skb), GFP_KERNEL);</div><div class='add'>+	struct ibmveth_buff_pool *pool;</div><div class='add'>+</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adapter);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, skb);</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;adapter-&gt;work, ibmveth_reset_kunit);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;rx_queue.queue_len = 1;</div><div class='add'>+	adapter-&gt;rx_queue.index = 0;</div><div class='add'>+	adapter-&gt;rx_queue.queue_addr = kunit_kzalloc(test, sizeof(struct ibmveth_rx_q_entry),</div><div class='add'>+						     GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adapter-&gt;rx_queue.queue_addr);</div><div class='add'>+</div><div class='add'>+	/* Set sane values for buffer pools */</div><div class='add'>+	for (int i = 0; i &lt; IBMVETH_NUM_BUFF_POOLS; i++)</div><div class='add'>+		ibmveth_init_buffer_pool(&amp;adapter-&gt;rx_buff_pool[i], i,</div><div class='add'>+					 pool_count[i], pool_size[i],</div><div class='add'>+					 pool_active[i]);</div><div class='add'>+</div><div class='add'>+	pool = &amp;adapter-&gt;rx_buff_pool[0];</div><div class='add'>+	pool-&gt;skbuff = kunit_kcalloc(test, pool-&gt;size, sizeof(void *), GFP_KERNEL);</div><div class='add'>+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, pool-&gt;skbuff);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;rx_queue.queue_addr[0].correlator = (u64)IBMVETH_NUM_BUFF_POOLS &lt;&lt; 32 | 0;</div><div class='add'>+	KUNIT_EXPECT_PTR_EQ(test, NULL, ibmveth_rxq_get_buffer(adapter));</div><div class='add'>+</div><div class='add'>+	adapter-&gt;rx_queue.queue_addr[0].correlator = (u64)0 &lt;&lt; 32 | adapter-&gt;rx_buff_pool[0].size;</div><div class='add'>+	KUNIT_EXPECT_PTR_EQ(test, NULL, ibmveth_rxq_get_buffer(adapter));</div><div class='add'>+</div><div class='add'>+	pool-&gt;skbuff[0] = skb;</div><div class='add'>+	adapter-&gt;rx_queue.queue_addr[0].correlator = (u64)0 &lt;&lt; 32 | 0;</div><div class='add'>+	KUNIT_EXPECT_PTR_EQ(test, skb, ibmveth_rxq_get_buffer(adapter));</div><div class='add'>+</div><div class='add'>+	flush_work(&amp;adapter-&gt;work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kunit_case ibmveth_test_cases[] = {</div><div class='add'>+	KUNIT_CASE(ibmveth_remove_buffer_from_pool_test),</div><div class='add'>+	KUNIT_CASE(ibmveth_rxq_get_buffer_test),</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct kunit_suite ibmveth_test_suite = {</div><div class='add'>+	.name = "ibmveth-kunit-test",</div><div class='add'>+	.test_cases = ibmveth_test_cases,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+kunit_test_suite(ibmveth_test_suite);</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/ibm/ibmveth.h b/drivers/net/ethernet/ibm/ibmveth.h<br/>index 8468e2c59d7a..068f99df133e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/ibmveth.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/ibmveth.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/ibmveth.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ibm/ibmveth.h</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #define IbmVethMcastRemoveFilter     0x2UL</div><div class='ctx'> #define IbmVethMcastClearFilterTable 0x3UL</div><div class='ctx'> </div><div class='add'>+#define IBMVETH_ILLAN_RX_MULTI_BUFF_SUPPORT	0x0000000000040000UL</div><div class='ctx'> #define IBMVETH_ILLAN_LRG_SR_ENABLED	0x0000000000010000UL</div><div class='ctx'> #define IBMVETH_ILLAN_LRG_SND_SUPPORT	0x0000000000008000UL</div><div class='ctx'> #define IBMVETH_ILLAN_PADDED_PKT_CSUM	0x0000000000002000UL</div><div class='hunk'>@@ -46,6 +47,24 @@</div><div class='ctx'> #define h_add_logical_lan_buffer(ua, buf) \</div><div class='ctx'>   plpar_hcall_norets(H_ADD_LOGICAL_LAN_BUFFER, ua, buf)</div><div class='ctx'> </div><div class='add'>+static inline long h_add_logical_lan_buffers(unsigned long unit_address,</div><div class='add'>+					     unsigned long desc1,</div><div class='add'>+					     unsigned long desc2,</div><div class='add'>+					     unsigned long desc3,</div><div class='add'>+					     unsigned long desc4,</div><div class='add'>+					     unsigned long desc5,</div><div class='add'>+					     unsigned long desc6,</div><div class='add'>+					     unsigned long desc7,</div><div class='add'>+					     unsigned long desc8)</div><div class='add'>+{</div><div class='add'>+	unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];</div><div class='add'>+</div><div class='add'>+	return plpar_hcall9(H_ADD_LOGICAL_LAN_BUFFERS,</div><div class='add'>+			    retbuf, unit_address,</div><div class='add'>+			    desc1, desc2, desc3, desc4,</div><div class='add'>+			    desc5, desc6, desc7, desc8);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* FW allows us to send 6 descriptors but we only use one so mark</div><div class='ctx'>  * the other 5 as unused (0)</div><div class='ctx'>  */</div><div class='hunk'>@@ -101,6 +120,7 @@ static inline long h_illan_attributes(unsigned long unit_address,</div><div class='ctx'> #define IBMVETH_MAX_TX_BUF_SIZE (1024 * 64)</div><div class='ctx'> #define IBMVETH_MAX_QUEUES 16U</div><div class='ctx'> #define IBMVETH_DEFAULT_QUEUES 8U</div><div class='add'>+#define IBMVETH_MAX_RX_PER_HCALL 8U</div><div class='ctx'> </div><div class='ctx'> static int pool_size[] = { 512, 1024 * 2, 1024 * 16, 1024 * 32, 1024 * 64 };</div><div class='ctx'> static int pool_count[] = { 256, 512, 256, 256, 256 };</div><div class='hunk'>@@ -134,38 +154,40 @@ struct ibmveth_rx_q {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ibmveth_adapter {</div><div class='del'>-    struct vio_dev *vdev;</div><div class='del'>-    struct net_device *netdev;</div><div class='del'>-    struct napi_struct napi;</div><div class='del'>-    unsigned int mcastFilterSize;</div><div class='del'>-    void * buffer_list_addr;</div><div class='del'>-    void * filter_list_addr;</div><div class='del'>-    void *tx_ltb_ptr[IBMVETH_MAX_QUEUES];</div><div class='del'>-    unsigned int tx_ltb_size;</div><div class='del'>-    dma_addr_t tx_ltb_dma[IBMVETH_MAX_QUEUES];</div><div class='del'>-    dma_addr_t buffer_list_dma;</div><div class='del'>-    dma_addr_t filter_list_dma;</div><div class='del'>-    struct ibmveth_buff_pool rx_buff_pool[IBMVETH_NUM_BUFF_POOLS];</div><div class='del'>-    struct ibmveth_rx_q rx_queue;</div><div class='del'>-    int rx_csum;</div><div class='del'>-    int large_send;</div><div class='del'>-    bool is_active_trunk;</div><div class='del'>-</div><div class='del'>-    u64 fw_ipv6_csum_support;</div><div class='del'>-    u64 fw_ipv4_csum_support;</div><div class='del'>-    u64 fw_large_send_support;</div><div class='del'>-    /* adapter specific stats */</div><div class='del'>-    u64 replenish_task_cycles;</div><div class='del'>-    u64 replenish_no_mem;</div><div class='del'>-    u64 replenish_add_buff_failure;</div><div class='del'>-    u64 replenish_add_buff_success;</div><div class='del'>-    u64 rx_invalid_buffer;</div><div class='del'>-    u64 rx_no_buffer;</div><div class='del'>-    u64 tx_map_failed;</div><div class='del'>-    u64 tx_send_failed;</div><div class='del'>-    u64 tx_large_packets;</div><div class='del'>-    u64 rx_large_packets;</div><div class='del'>-    /* Ethtool settings */</div><div class='add'>+	struct vio_dev *vdev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct work_struct work;</div><div class='add'>+	unsigned int mcastFilterSize;</div><div class='add'>+	void *buffer_list_addr;</div><div class='add'>+	void *filter_list_addr;</div><div class='add'>+	void *tx_ltb_ptr[IBMVETH_MAX_QUEUES];</div><div class='add'>+	unsigned int tx_ltb_size;</div><div class='add'>+	dma_addr_t tx_ltb_dma[IBMVETH_MAX_QUEUES];</div><div class='add'>+	dma_addr_t buffer_list_dma;</div><div class='add'>+	dma_addr_t filter_list_dma;</div><div class='add'>+	struct ibmveth_buff_pool rx_buff_pool[IBMVETH_NUM_BUFF_POOLS];</div><div class='add'>+	struct ibmveth_rx_q rx_queue;</div><div class='add'>+	int rx_csum;</div><div class='add'>+	int large_send;</div><div class='add'>+	bool is_active_trunk;</div><div class='add'>+	unsigned int rx_buffers_per_hcall;</div><div class='add'>+</div><div class='add'>+	u64 fw_ipv6_csum_support;</div><div class='add'>+	u64 fw_ipv4_csum_support;</div><div class='add'>+	u64 fw_large_send_support;</div><div class='add'>+	/* adapter specific stats */</div><div class='add'>+	u64 replenish_task_cycles;</div><div class='add'>+	u64 replenish_no_mem;</div><div class='add'>+	u64 replenish_add_buff_failure;</div><div class='add'>+	u64 replenish_add_buff_success;</div><div class='add'>+	u64 rx_invalid_buffer;</div><div class='add'>+	u64 rx_no_buffer;</div><div class='add'>+	u64 tx_map_failed;</div><div class='add'>+	u64 tx_send_failed;</div><div class='add'>+	u64 tx_large_packets;</div><div class='add'>+	u64 rx_large_packets;</div><div class='add'>+	/* Ethtool settings */</div><div class='ctx'> 	u8 duplex;</div><div class='ctx'> 	u32 speed;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/ibm/ibmvnic.c b/drivers/net/ethernet/ibm/ibmvnic.c<br/>index e95ae0d39948..3808148c1fc7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/ibmvnic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/ibmvnic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/ibmvnic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ibm/ibmvnic.c</a></div><div class='hunk'>@@ -234,11 +234,17 @@ static int ibmvnic_set_queue_affinity(struct ibmvnic_sub_crq_queue *queue,</div><div class='ctx'> 		(*stragglers)--;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* atomic write is safer than writing bit by bit directly */</div><div class='del'>-	for (i = 0; i &lt; stride; i++) {</div><div class='del'>-		cpumask_set_cpu(*cpu, mask);</div><div class='del'>-		*cpu = cpumask_next_wrap(*cpu, cpu_online_mask,</div><div class='del'>-					 nr_cpu_ids, false);</div><div class='add'>+	for_each_online_cpu_wrap(i, *cpu) {</div><div class='add'>+		if (!stride--) {</div><div class='add'>+			/* For the next queue we start from the first</div><div class='add'>+			 * unused CPU in this queue</div><div class='add'>+			 */</div><div class='add'>+			*cpu = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		cpumask_set_cpu(i, mask);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	/* set queue affinity mask */</div><div class='ctx'> 	cpumask_copy(queue-&gt;affinity_mask, mask);</div><div class='ctx'> 	rc = irq_set_affinity_and_hint(queue-&gt;irq, queue-&gt;affinity_mask);</div><div class='hunk'>@@ -256,7 +262,7 @@ static void ibmvnic_set_affinity(struct ibmvnic_adapter *adapter)</div><div class='ctx'> 	int num_rxqs = adapter-&gt;num_active_rx_scrqs, i_rxqs = 0;</div><div class='ctx'> 	int num_txqs = adapter-&gt;num_active_tx_scrqs, i_txqs = 0;</div><div class='ctx'> 	int total_queues, stride, stragglers, i;</div><div class='del'>-	unsigned int num_cpu, cpu;</div><div class='add'>+	unsigned int num_cpu, cpu = 0;</div><div class='ctx'> 	bool is_rx_queue;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -274,8 +280,6 @@ static void ibmvnic_set_affinity(struct ibmvnic_adapter *adapter)</div><div class='ctx'> 	stride = max_t(int, num_cpu / total_queues, 1);</div><div class='ctx'> 	/* number of leftover cpu's */</div><div class='ctx'> 	stragglers = num_cpu &gt;= total_queues ? num_cpu % total_queues : 0;</div><div class='del'>-	/* next available cpu to assign irq to */</div><div class='del'>-	cpu = cpumask_next(-1, cpu_online_mask);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; total_queues; i++) {</div><div class='ctx'> 		is_rx_queue = false;</div><div class='hunk'>@@ -752,6 +756,17 @@ static void deactivate_rx_pools(struct ibmvnic_adapter *adapter)</div><div class='ctx'> 		adapter-&gt;rx_pool[i].active = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ibmvnic_set_safe_max_ind_descs(struct ibmvnic_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (adapter-&gt;cur_max_ind_descs &gt; IBMVNIC_SAFE_IND_DESC) {</div><div class='add'>+		netdev_info(adapter-&gt;netdev,</div><div class='add'>+			    "set max ind descs from %u to safe limit %u\n",</div><div class='add'>+			    adapter-&gt;cur_max_ind_descs,</div><div class='add'>+			    IBMVNIC_SAFE_IND_DESC);</div><div class='add'>+		adapter-&gt;cur_max_ind_descs = IBMVNIC_SAFE_IND_DESC;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void replenish_rx_pool(struct ibmvnic_adapter *adapter,</div><div class='ctx'> 			      struct ibmvnic_rx_pool *pool)</div><div class='ctx'> {</div><div class='hunk'>@@ -839,7 +854,7 @@ static void replenish_rx_pool(struct ibmvnic_adapter *adapter,</div><div class='ctx'> 		sub_crq-&gt;rx_add.len = cpu_to_be32(pool-&gt;buff_size &lt;&lt; shift);</div><div class='ctx'> </div><div class='ctx'> 		/* if send_subcrq_indirect queue is full, flush to VIOS */</div><div class='del'>-		if (ind_bufp-&gt;index == IBMVNIC_MAX_IND_DESCS ||</div><div class='add'>+		if (ind_bufp-&gt;index == adapter-&gt;cur_max_ind_descs ||</div><div class='ctx'> 		    i == count - 1) {</div><div class='ctx'> 			lpar_rc =</div><div class='ctx'> 				send_subcrq_indirect(adapter, handle,</div><div class='hunk'>@@ -858,6 +873,14 @@ static void replenish_rx_pool(struct ibmvnic_adapter *adapter,</div><div class='ctx'> failure:</div><div class='ctx'> 	if (lpar_rc != H_PARAMETER &amp;&amp; lpar_rc != H_CLOSED)</div><div class='ctx'> 		dev_err_ratelimited(dev, "rx: replenish packet buffer failed\n");</div><div class='add'>+</div><div class='add'>+	/* Detect platform limit H_PARAMETER */</div><div class='add'>+	if (lpar_rc == H_PARAMETER)</div><div class='add'>+		ibmvnic_set_safe_max_ind_descs(adapter);</div><div class='add'>+</div><div class='add'>+	/* For all error case, temporarily drop only this batch</div><div class='add'>+	 * Rely on TCP/IP retransmissions to retry and recover</div><div class='add'>+	 */</div><div class='ctx'> 	for (i = ind_bufp-&gt;index - 1; i &gt;= 0; --i) {</div><div class='ctx'> 		struct ibmvnic_rx_buff *rx_buff;</div><div class='ctx'> </div><div class='hunk'>@@ -2308,8 +2331,6 @@ static void ibmvnic_tx_scrq_clean_buffer(struct ibmvnic_adapter *adapter,</div><div class='ctx'> 					  tx_pool-&gt;num_buffers - 1 :</div><div class='ctx'> 					  tx_pool-&gt;consumer_index - 1;</div><div class='ctx'> 		tx_buff = &amp;tx_pool-&gt;tx_buff[index];</div><div class='del'>-		adapter-&gt;netdev-&gt;stats.tx_packets--;</div><div class='del'>-		adapter-&gt;netdev-&gt;stats.tx_bytes -= tx_buff-&gt;skb-&gt;len;</div><div class='ctx'> 		adapter-&gt;tx_stats_buffers[queue_num].batched_packets--;</div><div class='ctx'> 		adapter-&gt;tx_stats_buffers[queue_num].bytes -=</div><div class='ctx'> 						tx_buff-&gt;skb-&gt;len;</div><div class='hunk'>@@ -2379,16 +2400,28 @@ static int ibmvnic_tx_scrq_flush(struct ibmvnic_adapter *adapter,</div><div class='ctx'> 		rc = send_subcrq_direct(adapter, handle,</div><div class='ctx'> 					(u64 *)ind_bufp-&gt;indir_arr);</div><div class='ctx'> </div><div class='del'>-	if (rc)</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err_ratelimited(&amp;adapter-&gt;vdev-&gt;dev,</div><div class='add'>+				    "tx_flush failed, rc=%u (%llu entries dma=%pad handle=%llx)\n",</div><div class='add'>+				    rc, entries, &amp;dma_addr, handle);</div><div class='add'>+		/* Detect platform limit H_PARAMETER */</div><div class='add'>+		if (rc == H_PARAMETER)</div><div class='add'>+			ibmvnic_set_safe_max_ind_descs(adapter);</div><div class='add'>+</div><div class='add'>+		/* For all error case, temporarily drop only this batch</div><div class='add'>+		 * Rely on TCP/IP retransmissions to retry and recover</div><div class='add'>+		 */</div><div class='ctx'> 		ibmvnic_tx_scrq_clean_buffer(adapter, tx_scrq);</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='ctx'> 		ind_bufp-&gt;index = 0;</div><div class='add'>+	}</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ibmvnic_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	u32 cur_max_ind_descs = adapter-&gt;cur_max_ind_descs;</div><div class='ctx'> 	int queue_num = skb_get_queue_mapping(skb);</div><div class='ctx'> 	u8 *hdrs = (u8 *)&amp;adapter-&gt;tx_rx_desc_req;</div><div class='ctx'> 	struct device *dev = &amp;adapter-&gt;vdev-&gt;dev;</div><div class='hunk'>@@ -2408,6 +2441,7 @@ static netdev_tx_t ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	dma_addr_t data_dma_addr;</div><div class='ctx'> 	struct netdev_queue *txq;</div><div class='ctx'> 	unsigned long lpar_rc;</div><div class='add'>+	unsigned int skblen;</div><div class='ctx'> 	union sub_crq tx_crq;</div><div class='ctx'> 	unsigned int offset;</div><div class='ctx'> 	bool use_scrq_send_direct = false;</div><div class='hunk'>@@ -2522,6 +2556,7 @@ static netdev_tx_t ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	tx_buff-&gt;skb = skb;</div><div class='ctx'> 	tx_buff-&gt;index = bufidx;</div><div class='ctx'> 	tx_buff-&gt;pool_index = queue_num;</div><div class='add'>+	skblen = skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;tx_crq, 0, sizeof(tx_crq));</div><div class='ctx'> 	tx_crq.v1.first = IBMVNIC_CRQ_CMD;</div><div class='hunk'>@@ -2586,7 +2621,7 @@ static netdev_tx_t ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	tx_crq.v1.n_crq_elem = num_entries;</div><div class='ctx'> 	tx_buff-&gt;num_entries = num_entries;</div><div class='ctx'> 	/* flush buffer if current entry can not fit */</div><div class='del'>-	if (num_entries + ind_bufp-&gt;index &gt; IBMVNIC_MAX_IND_DESCS) {</div><div class='add'>+	if (num_entries + ind_bufp-&gt;index &gt; cur_max_ind_descs) {</div><div class='ctx'> 		lpar_rc = ibmvnic_tx_scrq_flush(adapter, tx_scrq, true);</div><div class='ctx'> 		if (lpar_rc != H_SUCCESS)</div><div class='ctx'> 			goto tx_flush_err;</div><div class='hunk'>@@ -2599,7 +2634,7 @@ static netdev_tx_t ibmvnic_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	ind_bufp-&gt;index += num_entries;</div><div class='ctx'> 	if (__netdev_tx_sent_queue(txq, skb-&gt;len,</div><div class='ctx'> 				   netdev_xmit_more() &amp;&amp;</div><div class='del'>-				   ind_bufp-&gt;index &lt; IBMVNIC_MAX_IND_DESCS)) {</div><div class='add'>+				   ind_bufp-&gt;index &lt; cur_max_ind_descs)) {</div><div class='ctx'> 		lpar_rc = ibmvnic_tx_scrq_flush(adapter, tx_scrq, true);</div><div class='ctx'> 		if (lpar_rc != H_SUCCESS)</div><div class='ctx'> 			goto tx_err;</div><div class='hunk'>@@ -2614,7 +2649,7 @@ early_exit:</div><div class='ctx'> 		netif_stop_subqueue(netdev, queue_num);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tx_bytes += skb-&gt;len;</div><div class='add'>+	tx_bytes += skblen;</div><div class='ctx'> 	txq_trans_cond_update(txq);</div><div class='ctx'> 	ret = NETDEV_TX_OK;</div><div class='ctx'> 	goto out;</div><div class='hunk'>@@ -2641,9 +2676,6 @@ tx_err:</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	rcu_read_unlock();</div><div class='del'>-	netdev-&gt;stats.tx_dropped += tx_dropped;</div><div class='del'>-	netdev-&gt;stats.tx_bytes += tx_bytes;</div><div class='del'>-	netdev-&gt;stats.tx_packets += tx_bpackets + tx_dpackets;</div><div class='ctx'> 	adapter-&gt;tx_send_failed += tx_send_failed;</div><div class='ctx'> 	adapter-&gt;tx_map_failed += tx_map_failed;</div><div class='ctx'> 	adapter-&gt;tx_stats_buffers[queue_num].batched_packets += tx_bpackets;</div><div class='hunk'>@@ -3446,6 +3478,25 @@ err:</div><div class='ctx'> 	return -ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ibmvnic_get_stats64(struct net_device *netdev,</div><div class='add'>+				struct rtnl_link_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct ibmvnic_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;req_rx_queues; i++) {</div><div class='add'>+		stats-&gt;rx_packets += adapter-&gt;rx_stats_buffers[i].packets;</div><div class='add'>+		stats-&gt;rx_bytes   += adapter-&gt;rx_stats_buffers[i].bytes;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;req_tx_queues; i++) {</div><div class='add'>+		stats-&gt;tx_packets += adapter-&gt;tx_stats_buffers[i].batched_packets;</div><div class='add'>+		stats-&gt;tx_packets += adapter-&gt;tx_stats_buffers[i].direct_packets;</div><div class='add'>+		stats-&gt;tx_bytes   += adapter-&gt;tx_stats_buffers[i].bytes;</div><div class='add'>+		stats-&gt;tx_dropped += adapter-&gt;tx_stats_buffers[i].dropped_packets;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ibmvnic_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct ibmvnic_adapter *adapter = netdev_priv(dev);</div><div class='hunk'>@@ -3561,8 +3612,6 @@ restart_poll:</div><div class='ctx'> </div><div class='ctx'> 		length = skb-&gt;len;</div><div class='ctx'> 		napi_gro_receive(napi, skb); /* send it up */</div><div class='del'>-		netdev-&gt;stats.rx_packets++;</div><div class='del'>-		netdev-&gt;stats.rx_bytes += length;</div><div class='ctx'> 		adapter-&gt;rx_stats_buffers[scrq_num].packets++;</div><div class='ctx'> 		adapter-&gt;rx_stats_buffers[scrq_num].bytes += length;</div><div class='ctx'> 		frames_processed++;</div><div class='hunk'>@@ -3672,6 +3721,7 @@ static const struct net_device_ops ibmvnic_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= ibmvnic_set_multi,</div><div class='ctx'> 	.ndo_set_mac_address	= ibmvnic_set_mac,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+	.ndo_get_stats64	= ibmvnic_get_stats64,</div><div class='ctx'> 	.ndo_tx_timeout		= ibmvnic_tx_timeout,</div><div class='ctx'> 	.ndo_change_mtu		= ibmvnic_change_mtu,</div><div class='ctx'> 	.ndo_features_check     = ibmvnic_features_check,</div><div class='hunk'>@@ -3987,7 +4037,7 @@ static void release_sub_crq_queue(struct ibmvnic_adapter *adapter,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dma_free_coherent(dev,</div><div class='del'>-			  IBMVNIC_IND_ARR_SZ,</div><div class='add'>+			  IBMVNIC_IND_MAX_ARR_SZ,</div><div class='ctx'> 			  scrq-&gt;ind_buf.indir_arr,</div><div class='ctx'> 			  scrq-&gt;ind_buf.indir_dma);</div><div class='ctx'> </div><div class='hunk'>@@ -4044,7 +4094,7 @@ static struct ibmvnic_sub_crq_queue *init_sub_crq_queue(struct ibmvnic_adapter</div><div class='ctx'> </div><div class='ctx'> 	scrq-&gt;ind_buf.indir_arr =</div><div class='ctx'> 		dma_alloc_coherent(dev,</div><div class='del'>-				   IBMVNIC_IND_ARR_SZ,</div><div class='add'>+				   IBMVNIC_IND_MAX_ARR_SZ,</div><div class='ctx'> 				   &amp;scrq-&gt;ind_buf.indir_dma,</div><div class='ctx'> 				   GFP_KERNEL);</div><div class='ctx'> </div><div class='hunk'>@@ -4827,6 +4877,18 @@ static void vnic_add_client_data(struct ibmvnic_adapter *adapter,</div><div class='ctx'> 	strscpy(vlcd-&gt;name, adapter-&gt;netdev-&gt;name, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ibmvnic_print_hex_dump(struct net_device *dev, void *buf,</div><div class='add'>+				   size_t len)</div><div class='add'>+{</div><div class='add'>+	unsigned char hex_str[16 * 3];</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; len; i += 16) {</div><div class='add'>+		hex_dump_to_buffer((unsigned char *)buf + i, len - i, 16, 8,</div><div class='add'>+				   hex_str, sizeof(hex_str), false);</div><div class='add'>+		netdev_dbg(dev, "%s\n", hex_str);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int send_login(struct ibmvnic_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct ibmvnic_login_rsp_buffer *login_rsp_buffer;</div><div class='hunk'>@@ -4937,10 +4999,8 @@ static int send_login(struct ibmvnic_adapter *adapter)</div><div class='ctx'> 	vnic_add_client_data(adapter, vlcd);</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(adapter-&gt;netdev, "Login Buffer:\n");</div><div class='del'>-	for (i = 0; i &lt; (adapter-&gt;login_buf_sz - 1) / 8 + 1; i++) {</div><div class='del'>-		netdev_dbg(adapter-&gt;netdev, "%016lx\n",</div><div class='del'>-			   ((unsigned long *)(adapter-&gt;login_buf))[i]);</div><div class='del'>-	}</div><div class='add'>+	ibmvnic_print_hex_dump(adapter-&gt;netdev, adapter-&gt;login_buf,</div><div class='add'>+			       adapter-&gt;login_buf_sz);</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;crq, 0, sizeof(crq));</div><div class='ctx'> 	crq.login.first = IBMVNIC_CRQ_CMD;</div><div class='hunk'>@@ -5317,15 +5377,13 @@ static void handle_query_ip_offload_rsp(struct ibmvnic_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;adapter-&gt;vdev-&gt;dev;</div><div class='ctx'> 	struct ibmvnic_query_ip_offload_buffer *buf = &amp;adapter-&gt;ip_offload_buf;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	dma_unmap_single(dev, adapter-&gt;ip_offload_tok,</div><div class='ctx'> 			 sizeof(adapter-&gt;ip_offload_buf), DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(adapter-&gt;netdev, "Query IP Offload Buffer:\n");</div><div class='del'>-	for (i = 0; i &lt; (sizeof(adapter-&gt;ip_offload_buf) - 1) / 8 + 1; i++)</div><div class='del'>-		netdev_dbg(adapter-&gt;netdev, "%016lx\n",</div><div class='del'>-			   ((unsigned long *)(buf))[i]);</div><div class='add'>+	ibmvnic_print_hex_dump(adapter-&gt;netdev, buf,</div><div class='add'>+			       sizeof(adapter-&gt;ip_offload_buf));</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(adapter-&gt;netdev, "ipv4_chksum = %d\n", buf-&gt;ipv4_chksum);</div><div class='ctx'> 	netdev_dbg(adapter-&gt;netdev, "ipv6_chksum = %d\n", buf-&gt;ipv6_chksum);</div><div class='hunk'>@@ -5556,10 +5614,8 @@ static int handle_login_rsp(union ibmvnic_crq *login_rsp_crq,</div><div class='ctx'> 	netdev-&gt;mtu = adapter-&gt;req_mtu - ETH_HLEN;</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(adapter-&gt;netdev, "Login Response Buffer:\n");</div><div class='del'>-	for (i = 0; i &lt; (adapter-&gt;login_rsp_buf_sz - 1) / 8 + 1; i++) {</div><div class='del'>-		netdev_dbg(adapter-&gt;netdev, "%016lx\n",</div><div class='del'>-			   ((unsigned long *)(adapter-&gt;login_rsp_buf))[i]);</div><div class='del'>-	}</div><div class='add'>+	ibmvnic_print_hex_dump(netdev, adapter-&gt;login_rsp_buf,</div><div class='add'>+			       adapter-&gt;login_rsp_buf_sz);</div><div class='ctx'> </div><div class='ctx'> 	/* Sanity checks */</div><div class='ctx'> 	if (login-&gt;num_txcomp_subcrqs != login_rsp-&gt;num_txsubm_subcrqs ||</div><div class='hunk'>@@ -6344,6 +6400,19 @@ static int ibmvnic_reset_init(struct ibmvnic_adapter *adapter, bool reset)</div><div class='ctx'> 			rc = reset_sub_crq_queues(adapter);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='add'>+		if (adapter-&gt;reset_reason == VNIC_RESET_MOBILITY) {</div><div class='add'>+			/* After an LPM, reset the max number of indirect</div><div class='add'>+			 * subcrq descriptors per H_SEND_SUB_CRQ_INDIRECT</div><div class='add'>+			 * hcall to the default max (e.g POWER8 -&gt; POWER10)</div><div class='add'>+			 *</div><div class='add'>+			 * If the new destination platform does not support</div><div class='add'>+			 * the higher limit max (e.g. POWER10-&gt; POWER8 LPM)</div><div class='add'>+			 * H_PARAMETER will trigger automatic fallback to the</div><div class='add'>+			 * safe minimum limit.</div><div class='add'>+			 */</div><div class='add'>+			adapter-&gt;cur_max_ind_descs = IBMVNIC_MAX_IND_DESCS;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		rc = init_sub_crqs(adapter);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6495,6 +6564,7 @@ static int ibmvnic_probe(struct vio_dev *dev, const struct vio_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;wait_for_reset = false;</div><div class='ctx'> 	adapter-&gt;last_reset_time = jiffies;</div><div class='add'>+	adapter-&gt;cur_max_ind_descs = IBMVNIC_MAX_IND_DESCS;</div><div class='ctx'> </div><div class='ctx'> 	rc = register_netdev(netdev);</div><div class='ctx'> 	if (rc) {</div><div class='head'>diff --git a/drivers/net/ethernet/ibm/ibmvnic.h b/drivers/net/ethernet/ibm/ibmvnic.h<br/>index a189038d88df..480dc587078f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/ibmvnic.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ibm/ibmvnic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ibm/ibmvnic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ibm/ibmvnic.h</a></div><div class='hunk'>@@ -29,8 +29,9 @@</div><div class='ctx'> #define IBMVNIC_BUFFS_PER_POOL	100</div><div class='ctx'> #define IBMVNIC_MAX_QUEUES	16</div><div class='ctx'> #define IBMVNIC_MAX_QUEUE_SZ   4096</div><div class='del'>-#define IBMVNIC_MAX_IND_DESCS  16</div><div class='del'>-#define IBMVNIC_IND_ARR_SZ	(IBMVNIC_MAX_IND_DESCS * 32)</div><div class='add'>+#define IBMVNIC_MAX_IND_DESCS 128</div><div class='add'>+#define IBMVNIC_SAFE_IND_DESC 16</div><div class='add'>+#define IBMVNIC_IND_MAX_ARR_SZ (IBMVNIC_MAX_IND_DESCS * 32)</div><div class='ctx'> </div><div class='ctx'> #define IBMVNIC_TSO_BUF_SZ	65536</div><div class='ctx'> #define IBMVNIC_TSO_BUFS	64</div><div class='hunk'>@@ -211,7 +212,6 @@ struct ibmvnic_statistics {</div><div class='ctx'> 	u8 reserved[72];</div><div class='ctx'> } __packed __aligned(8);</div><div class='ctx'> </div><div class='del'>-#define NUM_TX_STATS 3</div><div class='ctx'> struct ibmvnic_tx_queue_stats {</div><div class='ctx'> 	u64 batched_packets;</div><div class='ctx'> 	u64 direct_packets;</div><div class='hunk'>@@ -219,13 +219,18 @@ struct ibmvnic_tx_queue_stats {</div><div class='ctx'> 	u64 dropped_packets;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define NUM_RX_STATS 3</div><div class='add'>+#define NUM_TX_STATS \</div><div class='add'>+	(sizeof(struct ibmvnic_tx_queue_stats) / sizeof(u64))</div><div class='add'>+</div><div class='ctx'> struct ibmvnic_rx_queue_stats {</div><div class='ctx'> 	u64 packets;</div><div class='ctx'> 	u64 bytes;</div><div class='ctx'> 	u64 interrupts;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define NUM_RX_STATS \</div><div class='add'>+	(sizeof(struct ibmvnic_rx_queue_stats) / sizeof(u64))</div><div class='add'>+</div><div class='ctx'> struct ibmvnic_acl_buffer {</div><div class='ctx'> 	__be32 len;</div><div class='ctx'> 	__be32 version;</div><div class='hunk'>@@ -926,6 +931,7 @@ struct ibmvnic_adapter {</div><div class='ctx'> 	struct ibmvnic_control_ip_offload_buffer ip_offload_ctrl;</div><div class='ctx'> 	dma_addr_t ip_offload_ctrl_tok;</div><div class='ctx'> 	u32 msg_enable;</div><div class='add'>+	u32 cur_max_ind_descs;</div><div class='ctx'> </div><div class='ctx'> 	/* Vital Product Data (VPD) */</div><div class='ctx'> 	struct ibmvnic_vpd *vpd;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/Kconfig b/drivers/net/ethernet/intel/Kconfig<br/>index 20bc40eec487..288fa8ce53af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/Kconfig</a></div><div class='hunk'>@@ -146,7 +146,10 @@ config IXGBE</div><div class='ctx'> 	tristate "Intel(R) 10GbE PCI Express adapters support"</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select LIBIE_FWLOG if DEBUG_FS</div><div class='ctx'> 	select MDIO</div><div class='add'>+	select NET_DEVLINK</div><div class='add'>+	select PLDMFW</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Intel(R) 10GbE PCI Express family of</div><div class='hunk'>@@ -229,6 +232,7 @@ config I40E</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	select AUXILIARY_BUS</div><div class='ctx'> 	select LIBIE</div><div class='add'>+	select LIBIE_ADMINQ</div><div class='ctx'> 	select NET_DEVLINK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Intel(R) Ethernet Controller XL710 Family of</div><div class='hunk'>@@ -258,12 +262,14 @@ config I40E_DCB</div><div class='ctx'> config IAVF</div><div class='ctx'> 	tristate</div><div class='ctx'> 	select LIBIE</div><div class='add'>+	select LIBIE_ADMINQ</div><div class='ctx'> 	select NET_SHAPER</div><div class='ctx'> </div><div class='ctx'> config I40EVF</div><div class='ctx'> 	tristate "Intel(R) Ethernet Adaptive Virtual Function support"</div><div class='ctx'> 	select IAVF</div><div class='ctx'> 	depends on PCI_MSI</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports virtual functions for Intel XL710,</div><div class='ctx'> 	  X710, X722, XXV710, and all devices advertising support for</div><div class='hunk'>@@ -290,8 +296,12 @@ config ICE</div><div class='ctx'> 	depends on GNSS || GNSS = n</div><div class='ctx'> 	select AUXILIARY_BUS</div><div class='ctx'> 	select DIMLIB</div><div class='add'>+	select LIBETH_XDP</div><div class='ctx'> 	select LIBIE</div><div class='add'>+	select LIBIE_ADMINQ</div><div class='add'>+	select LIBIE_FWLOG if DEBUG_FS</div><div class='ctx'> 	select NET_DEVLINK</div><div class='add'>+	select PACKING</div><div class='ctx'> 	select PLDMFW</div><div class='ctx'> 	select DPLL</div><div class='ctx'> 	help</div><div class='hunk'>@@ -335,7 +345,7 @@ config ICE_SWITCHDEV</div><div class='ctx'> config ICE_HWTS</div><div class='ctx'> 	bool "Support HW cross-timestamp on platforms with PTM support"</div><div class='ctx'> 	default y</div><div class='del'>-	depends on ICE &amp;&amp; X86</div><div class='add'>+	depends on ICE &amp;&amp; X86 &amp;&amp; PCIE_PTM</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y to enable hardware supported cross-timestamping on platforms</div><div class='ctx'> 	  with PCIe PTM support. The cross-timestamp is available through</div><div class='hunk'>@@ -365,6 +375,7 @@ config IGC</div><div class='ctx'> 	default n</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	depends on ETHTOOL_NETLINK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Intel(R) Ethernet Controller I225-LM/I225-V</div><div class='ctx'> 	  family of adapters.</div><div class='head'>diff --git a/drivers/net/ethernet/intel/Makefile b/drivers/net/ethernet/intel/Makefile<br/>index 04c844ef4964..9a37dc76aef0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/Makefile</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_LIBETH) += libeth/</div><div class='del'>-obj-$(CONFIG_LIBIE) += libie/</div><div class='add'>+obj-y += libie/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_E100) += e100.o</div><div class='ctx'> obj-$(CONFIG_E1000) += e1000/</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e100.c b/drivers/net/ethernet/intel/e100.c<br/>index 3a5bbda235cb..5c56c1edd492 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e100.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e100.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e100.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e100.c</a></div><div class='hunk'>@@ -1682,7 +1682,7 @@ static void e100_adjust_adaptive_ifs(struct nic *nic, int speed, int duplex)</div><div class='ctx'> </div><div class='ctx'> static void e100_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct nic *nic = from_timer(nic, t, watchdog);</div><div class='add'>+	struct nic *nic = timer_container_of(nic, t, watchdog);</div><div class='ctx'> 	struct ethtool_cmd cmd = { .cmd = ETHTOOL_GSET };</div><div class='ctx'> 	u32 speed;</div><div class='ctx'> </div><div class='hunk'>@@ -2293,7 +2293,7 @@ static int e100_up(struct nic *nic)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_no_irq:</div><div class='del'>-	del_timer_sync(&amp;nic-&gt;watchdog);</div><div class='add'>+	timer_delete_sync(&amp;nic-&gt;watchdog);</div><div class='ctx'> err_clean_cbs:</div><div class='ctx'> 	e100_clean_cbs(nic);</div><div class='ctx'> err_rx_clean_list:</div><div class='hunk'>@@ -2308,7 +2308,7 @@ static void e100_down(struct nic *nic)</div><div class='ctx'> 	netif_stop_queue(nic-&gt;netdev);</div><div class='ctx'> 	e100_hw_reset(nic);</div><div class='ctx'> 	free_irq(nic-&gt;pdev-&gt;irq, nic-&gt;netdev);</div><div class='del'>-	del_timer_sync(&amp;nic-&gt;watchdog);</div><div class='add'>+	timer_delete_sync(&amp;nic-&gt;watchdog);</div><div class='ctx'> 	netif_carrier_off(nic-&gt;netdev);</div><div class='ctx'> 	e100_clean_cbs(nic);</div><div class='ctx'> 	e100_rx_clean_list(nic);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000/e1000.h b/drivers/net/ethernet/intel/e1000/e1000.h<br/>index 75f3fd1d8d6e..ea6ccf4b728b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000/e1000.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000/e1000.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000/e1000.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000/e1000.h</a></div><div class='hunk'>@@ -116,7 +116,7 @@ struct e1000_adapter;</div><div class='ctx'> #define E1000_MASTER_SLAVE	e1000_ms_hw_default</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define E1000_MNG_VLAN_NONE	(-1)</div><div class='add'>+#define E1000_MNG_VLAN_NONE	0xFFFF</div><div class='ctx'> </div><div class='ctx'> /* wrapper around a pointer to a socket buffer,</div><div class='ctx'>  * so a DMA handle can be stored along with the buffer</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000/e1000_ethtool.c b/drivers/net/ethernet/intel/e1000/e1000_ethtool.c<br/>index d06d29c6c037..726365c567ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000/e1000_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000/e1000_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000/e1000_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000/e1000_ethtool.c</a></div><div class='hunk'>@@ -806,7 +806,7 @@ static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* If Checksum is not Correct return error else test passed */</div><div class='del'>-	if ((checksum != (u16)EEPROM_SUM) &amp;&amp; !(*data))</div><div class='add'>+	if (checksum != EEPROM_SUM &amp;&amp; !(*data))</div><div class='ctx'> 		*data = 2;</div><div class='ctx'> </div><div class='ctx'> 	return *data;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000/e1000_hw.c b/drivers/net/ethernet/intel/e1000/e1000_hw.c<br/>index f9328f2e669f..0e5de52b1067 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000/e1000_hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000/e1000_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000/e1000_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000/e1000_hw.c</a></div><div class='hunk'>@@ -3970,7 +3970,7 @@ s32 e1000_validate_eeprom_checksum(struct e1000_hw *hw)</div><div class='ctx'> 		return E1000_SUCCESS;</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='del'>-	if (checksum == (u16)EEPROM_SUM)</div><div class='add'>+	if (checksum == EEPROM_SUM)</div><div class='ctx'> 		return E1000_SUCCESS;</div><div class='ctx'> 	else {</div><div class='ctx'> 		e_dbg("EEPROM Checksum Invalid\n");</div><div class='hunk'>@@ -3997,7 +3997,7 @@ s32 e1000_update_eeprom_checksum(struct e1000_hw *hw)</div><div class='ctx'> 		}</div><div class='ctx'> 		checksum += eeprom_data;</div><div class='ctx'> 	}</div><div class='del'>-	checksum = (u16)EEPROM_SUM - checksum;</div><div class='add'>+	checksum = EEPROM_SUM - checksum;</div><div class='ctx'> 	if (e1000_write_eeprom(hw, EEPROM_CHECKSUM_REG, 1, &amp;checksum) &lt; 0) {</div><div class='ctx'> 		e_dbg("EEPROM Write Error\n");</div><div class='ctx'> 		return -E1000_ERR_EEPROM;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000/e1000_main.c b/drivers/net/ethernet/intel/e1000/e1000_main.c<br/>index 4de9b156b2be..292389aceb2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000/e1000_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000/e1000_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000/e1000_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000/e1000_main.c</a></div><div class='hunk'>@@ -313,8 +313,7 @@ static void e1000_update_mng_vlan(struct e1000_adapter *adapter)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			adapter-&gt;mng_vlan_id = E1000_MNG_VLAN_NONE;</div><div class='ctx'> 		}</div><div class='del'>-		if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &amp;&amp;</div><div class='del'>-		    (vid != old_vid) &amp;&amp;</div><div class='add'>+		if (old_vid != E1000_MNG_VLAN_NONE &amp;&amp; vid != old_vid &amp;&amp;</div><div class='ctx'> 		    !test_bit(old_vid, adapter-&gt;active_vlans))</div><div class='ctx'> 			e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),</div><div class='ctx'> 					       old_vid);</div><div class='hunk'>@@ -477,10 +476,6 @@ static void e1000_down_and_stop(struct e1000_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adapter-&gt;phy_info_task);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adapter-&gt;fifo_stall_task);</div><div class='del'>-</div><div class='del'>-	/* Only kill reset task if adapter is not resetting */</div><div class='del'>-	if (!test_bit(__E1000_RESETTING, &amp;adapter-&gt;flags))</div><div class='del'>-		cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void e1000_down(struct e1000_adapter *adapter)</div><div class='hunk'>@@ -1266,6 +1261,10 @@ static void e1000_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='ctx'> </div><div class='add'>+	/* Only kill reset task if adapter is not resetting */</div><div class='add'>+	if (!test_bit(__E1000_RESETTING, &amp;adapter-&gt;flags))</div><div class='add'>+		cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='add'>+</div><div class='ctx'> 	e1000_phy_hw_reset(hw);</div><div class='ctx'> </div><div class='ctx'> 	kfree(adapter-&gt;tx_ring);</div><div class='hunk'>@@ -3509,7 +3508,9 @@ static void e1000_reset_task(struct work_struct *work)</div><div class='ctx'> 		container_of(work, struct e1000_adapter, reset_task);</div><div class='ctx'> </div><div class='ctx'> 	e_err(drv, "Reset adapter\n");</div><div class='add'>+	rtnl_lock();</div><div class='ctx'> 	e1000_reinit_locked(adapter);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5074,7 +5075,9 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)</div><div class='ctx'> 			usleep_range(10000, 20000);</div><div class='ctx'> </div><div class='ctx'> 		WARN_ON(test_bit(__E1000_RESETTING, &amp;adapter-&gt;flags));</div><div class='add'>+		rtnl_lock();</div><div class='ctx'> 		e1000_down(adapter);</div><div class='add'>+		rtnl_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	status = er32(STATUS);</div><div class='hunk'>@@ -5235,16 +5238,20 @@ static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,</div><div class='ctx'> 	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct e1000_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='ctx'> 	netif_device_detach(netdev);</div><div class='ctx'> </div><div class='del'>-	if (state == pci_channel_io_perm_failure)</div><div class='add'>+	if (state == pci_channel_io_perm_failure) {</div><div class='add'>+		rtnl_unlock();</div><div class='ctx'> 		return PCI_ERS_RESULT_DISCONNECT;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		e1000_down(adapter);</div><div class='ctx'> </div><div class='ctx'> 	if (!test_and_set_bit(__E1000_DISABLED, &amp;adapter-&gt;flags))</div><div class='ctx'> 		pci_disable_device(pdev);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	/* Request a slot reset. */</div><div class='ctx'> 	return PCI_ERS_RESULT_NEED_RESET;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h<br/>index 5e2cfa73f889..ba331899d186 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/defines.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/defines.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/defines.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000e/defines.h</a></div><div class='hunk'>@@ -638,6 +638,9 @@</div><div class='ctx'> /* For checksumming, the sum of all words in the NVM should equal 0xBABA. */</div><div class='ctx'> #define NVM_SUM                    0xBABA</div><div class='ctx'> </div><div class='add'>+/* Uninitialized ("empty") checksum word value */</div><div class='add'>+#define NVM_CHECKSUM_UNINITIALIZED 0xFFFF</div><div class='add'>+</div><div class='ctx'> /* PBA (printed board assembly) number words */</div><div class='ctx'> #define NVM_PBA_OFFSET_0           8</div><div class='ctx'> #define NVM_PBA_OFFSET_1           9</div><div class='hunk'>@@ -803,4 +806,7 @@</div><div class='ctx'> /* SerDes Control */</div><div class='ctx'> #define E1000_GEN_POLL_TIMEOUT          640</div><div class='ctx'> </div><div class='add'>+#define E1000_FEXTNVM12_PHYPD_CTRL_MASK	0x00C00000</div><div class='add'>+#define E1000_FEXTNVM12_PHYPD_CTRL_P1	0x00800000</div><div class='add'>+</div><div class='ctx'> #endif /* _E1000_DEFINES_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h<br/>index ba9c19e6994c..aa08f397988e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/e1000.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/e1000.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/e1000.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000e/e1000.h</a></div><div class='hunk'>@@ -64,7 +64,7 @@ struct e1000_info;</div><div class='ctx'> #define AUTO_ALL_MODES			0</div><div class='ctx'> #define E1000_EEPROM_APME		0x0400</div><div class='ctx'> </div><div class='del'>-#define E1000_MNG_VLAN_NONE		(-1)</div><div class='add'>+#define E1000_MNG_VLAN_NONE		0xFFFF</div><div class='ctx'> </div><div class='ctx'> #define DEFAULT_JUMBO			9234</div><div class='ctx'> </div><div class='hunk'>@@ -319,7 +319,7 @@ struct e1000_adapter {</div><div class='ctx'> 	u16 tx_ring_count;</div><div class='ctx'> 	u16 rx_ring_count;</div><div class='ctx'> </div><div class='del'>-	struct hwtstamp_config hwtstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config hwtstamp_config;</div><div class='ctx'> 	struct delayed_work systim_overflow_work;</div><div class='ctx'> 	struct sk_buff *tx_hwtstamp_skb;</div><div class='ctx'> 	unsigned long tx_hwtstamp_start;</div><div class='hunk'>@@ -461,6 +461,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca);</div><div class='ctx'> #define FLAG2_CHECK_RX_HWTSTAMP           BIT(13)</div><div class='ctx'> #define FLAG2_CHECK_SYSTIM_OVERFLOW       BIT(14)</div><div class='ctx'> #define FLAG2_ENABLE_S0IX_FLOWS           BIT(15)</div><div class='add'>+#define FLAG2_DISABLE_K1		   BIT(16)</div><div class='ctx'> </div><div class='ctx'> #define E1000_RX_DESC_PS(R, i)	    \</div><div class='ctx'> 	(&amp;(((union e1000_rx_desc_packet_split *)((R).desc))[i]))</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c<br/>index 9364bc2b4eb1..7b1ac90b3de4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000e/ethtool.c</a></div><div class='hunk'>@@ -26,6 +26,8 @@ struct e1000_stats {</div><div class='ctx'> static const char e1000e_priv_flags_strings[][ETH_GSTRING_LEN] = {</div><div class='ctx'> #define E1000E_PRIV_FLAGS_S0IX_ENABLED	BIT(0)</div><div class='ctx'> 	"s0ix-enabled",</div><div class='add'>+#define E1000E_PRIV_FLAGS_DISABLE_K1	BIT(1)</div><div class='add'>+	"disable-k1",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define E1000E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(e1000e_priv_flags_strings)</div><div class='hunk'>@@ -550,11 +552,11 @@ static int e1000_set_eeprom(struct net_device *netdev,</div><div class='ctx'> 	struct e1000_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u16 *eeprom_buff;</div><div class='del'>-	void *ptr;</div><div class='del'>-	int max_len;</div><div class='add'>+	int ret_val = 0;</div><div class='add'>+	size_t max_len;</div><div class='ctx'> 	int first_word;</div><div class='ctx'> 	int last_word;</div><div class='del'>-	int ret_val = 0;</div><div class='add'>+	void *ptr;</div><div class='ctx'> 	u16 i;</div><div class='ctx'> </div><div class='ctx'> 	if (eeprom-&gt;len == 0)</div><div class='hunk'>@@ -959,7 +961,7 @@ static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* If Checksum is not Correct return error else test passed */</div><div class='del'>-	if ((checksum != (u16)NVM_SUM) &amp;&amp; !(*data))</div><div class='add'>+	if (checksum != NVM_SUM &amp;&amp; !(*data))</div><div class='ctx'> 		*data = 2;</div><div class='ctx'> </div><div class='ctx'> 	return *data;</div><div class='hunk'>@@ -2096,54 +2098,47 @@ static void e1000_get_strings(struct net_device __always_unused *netdev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int e1000_get_rxnfc(struct net_device *netdev,</div><div class='del'>-			   struct ethtool_rxnfc *info,</div><div class='del'>-			   u32 __always_unused *rule_locs)</div><div class='add'>+static int e1000_get_rxfh_fields(struct net_device *netdev,</div><div class='add'>+				 struct ethtool_rxfh_fields *info)</div><div class='ctx'> {</div><div class='del'>-	info-&gt;data = 0;</div><div class='del'>-</div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXFH: {</div><div class='del'>-		struct e1000_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-		struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-		u32 mrqc;</div><div class='add'>+	struct e1000_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u32 mrqc;</div><div class='ctx'> </div><div class='del'>-		mrqc = er32(MRQC);</div><div class='add'>+	info-&gt;data = 0;</div><div class='ctx'> </div><div class='del'>-		if (!(mrqc &amp; E1000_MRQC_RSS_FIELD_MASK))</div><div class='del'>-			return 0;</div><div class='add'>+	mrqc = er32(MRQC);</div><div class='ctx'> </div><div class='del'>-		switch (info-&gt;flow_type) {</div><div class='del'>-		case TCP_V4_FLOW:</div><div class='del'>-			if (mrqc &amp; E1000_MRQC_RSS_FIELD_IPV4_TCP)</div><div class='del'>-				info-&gt;data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='del'>-			fallthrough;</div><div class='del'>-		case UDP_V4_FLOW:</div><div class='del'>-		case SCTP_V4_FLOW:</div><div class='del'>-		case AH_ESP_V4_FLOW:</div><div class='del'>-		case IPV4_FLOW:</div><div class='del'>-			if (mrqc &amp; E1000_MRQC_RSS_FIELD_IPV4)</div><div class='del'>-				info-&gt;data |= RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		case TCP_V6_FLOW:</div><div class='del'>-			if (mrqc &amp; E1000_MRQC_RSS_FIELD_IPV6_TCP)</div><div class='del'>-				info-&gt;data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='del'>-			fallthrough;</div><div class='del'>-		case UDP_V6_FLOW:</div><div class='del'>-		case SCTP_V6_FLOW:</div><div class='del'>-		case AH_ESP_V6_FLOW:</div><div class='del'>-		case IPV6_FLOW:</div><div class='del'>-			if (mrqc &amp; E1000_MRQC_RSS_FIELD_IPV6)</div><div class='del'>-				info-&gt;data |= RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+	if (!(mrqc &amp; E1000_MRQC_RSS_FIELD_MASK))</div><div class='ctx'> 		return 0;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	switch (info-&gt;flow_type) {</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+		if (mrqc &amp; E1000_MRQC_RSS_FIELD_IPV4_TCP)</div><div class='add'>+			info-&gt;data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+	case SCTP_V4_FLOW:</div><div class='add'>+	case AH_ESP_V4_FLOW:</div><div class='add'>+	case IPV4_FLOW:</div><div class='add'>+		if (mrqc &amp; E1000_MRQC_RSS_FIELD_IPV4)</div><div class='add'>+			info-&gt;data |= RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+		if (mrqc &amp; E1000_MRQC_RSS_FIELD_IPV6_TCP)</div><div class='add'>+			info-&gt;data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+	case SCTP_V6_FLOW:</div><div class='add'>+	case AH_ESP_V6_FLOW:</div><div class='add'>+	case IPV6_FLOW:</div><div class='add'>+		if (mrqc &amp; E1000_MRQC_RSS_FIELD_IPV6)</div><div class='add'>+			info-&gt;data |= RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int e1000e_get_eee(struct net_device *netdev, struct ethtool_keee *edata)</div><div class='hunk'>@@ -2304,26 +2299,59 @@ static u32 e1000e_get_priv_flags(struct net_device *netdev)</div><div class='ctx'> 	if (adapter-&gt;flags2 &amp; FLAG2_ENABLE_S0IX_FLOWS)</div><div class='ctx'> 		priv_flags |= E1000E_PRIV_FLAGS_S0IX_ENABLED;</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;flags2 &amp; FLAG2_DISABLE_K1)</div><div class='add'>+		priv_flags |= E1000E_PRIV_FLAGS_DISABLE_K1;</div><div class='add'>+</div><div class='ctx'> 	return priv_flags;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int e1000e_set_priv_flags(struct net_device *netdev, u32 priv_flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	unsigned int flags2 = adapter-&gt;flags2;</div><div class='add'>+	unsigned int changed;</div><div class='ctx'> </div><div class='del'>-	flags2 &amp;= ~FLAG2_ENABLE_S0IX_FLOWS;</div><div class='del'>-	if (priv_flags &amp; E1000E_PRIV_FLAGS_S0IX_ENABLED) {</div><div class='del'>-		struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	flags2 &amp;= ~(FLAG2_ENABLE_S0IX_FLOWS | FLAG2_DISABLE_K1);</div><div class='ctx'> </div><div class='del'>-		if (hw-&gt;mac.type &lt; e1000_pch_cnp)</div><div class='add'>+	if (priv_flags &amp; E1000E_PRIV_FLAGS_S0IX_ENABLED) {</div><div class='add'>+		if (hw-&gt;mac.type &lt; e1000_pch_cnp) {</div><div class='add'>+			e_err("S0ix is not supported on this device\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		flags2 |= FLAG2_ENABLE_S0IX_FLOWS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (flags2 != adapter-&gt;flags2)</div><div class='add'>+	if (priv_flags &amp; E1000E_PRIV_FLAGS_DISABLE_K1) {</div><div class='add'>+		if (hw-&gt;mac.type &lt; e1000_ich8lan) {</div><div class='add'>+			e_err("Disabling K1 is not supported on this device\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		flags2 |= FLAG2_DISABLE_K1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	changed = adapter-&gt;flags2 ^ flags2;</div><div class='add'>+	if (changed)</div><div class='ctx'> 		adapter-&gt;flags2 = flags2;</div><div class='ctx'> </div><div class='add'>+	if (changed &amp; FLAG2_DISABLE_K1) {</div><div class='add'>+		/* reset the hardware to apply the changes */</div><div class='add'>+		while (test_and_set_bit(__E1000_RESETTING,</div><div class='add'>+					&amp;adapter-&gt;state))</div><div class='add'>+			usleep_range(1000, 2000);</div><div class='add'>+</div><div class='add'>+		if (netif_running(adapter-&gt;netdev)) {</div><div class='add'>+			e1000e_down(adapter, true);</div><div class='add'>+			e1000e_up(adapter);</div><div class='add'>+		} else {</div><div class='add'>+			e1000e_reset(adapter);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		clear_bit(__E1000_RESETTING, &amp;adapter-&gt;state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2352,7 +2380,7 @@ static const struct ethtool_ops e1000_ethtool_ops = {</div><div class='ctx'> 	.get_sset_count		= e1000e_get_sset_count,</div><div class='ctx'> 	.get_coalesce		= e1000_get_coalesce,</div><div class='ctx'> 	.set_coalesce		= e1000_set_coalesce,</div><div class='del'>-	.get_rxnfc		= e1000_get_rxnfc,</div><div class='add'>+	.get_rxfh_fields	= e1000_get_rxfh_fields,</div><div class='ctx'> 	.get_ts_info		= e1000e_get_ts_info,</div><div class='ctx'> 	.get_eee		= e1000e_get_eee,</div><div class='ctx'> 	.set_eee		= e1000e_set_eee,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c<br/>index ce227b56cf72..0ff8688ac3b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/ich8lan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/ich8lan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/ich8lan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000e/ich8lan.c</a></div><div class='hunk'>@@ -286,6 +286,52 @@ static void e1000_toggle_lanphypc_pch_lpt(struct e1000_hw *hw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * e1000_reconfigure_k1_params - reconfigure Kumeran K1 parameters.</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * By default K1 is enabled after MAC reset, so this function only</div><div class='add'>+ * disables it.</div><div class='add'>+ *</div><div class='add'>+ * Context: PHY semaphore must be held by caller.</div><div class='add'>+ * Return: 0 on success, negative on failure</div><div class='add'>+ */</div><div class='add'>+static s32 e1000_reconfigure_k1_params(struct e1000_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u16 phy_timeout;</div><div class='add'>+	u32 fextnvm12;</div><div class='add'>+	s32 ret_val;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type &lt; e1000_pch_mtp) {</div><div class='add'>+		if (hw-&gt;adapter-&gt;flags2 &amp; FLAG2_DISABLE_K1)</div><div class='add'>+			return e1000_configure_k1_ich8lan(hw, false);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Change Kumeran K1 power down state from P0s to P1 */</div><div class='add'>+	fextnvm12 = er32(FEXTNVM12);</div><div class='add'>+	fextnvm12 &amp;= ~E1000_FEXTNVM12_PHYPD_CTRL_MASK;</div><div class='add'>+	fextnvm12 |= E1000_FEXTNVM12_PHYPD_CTRL_P1;</div><div class='add'>+	ew32(FEXTNVM12, fextnvm12);</div><div class='add'>+</div><div class='add'>+	/* Wait for the interface the settle */</div><div class='add'>+	usleep_range(1000, 1100);</div><div class='add'>+	if (hw-&gt;adapter-&gt;flags2 &amp; FLAG2_DISABLE_K1)</div><div class='add'>+		return e1000_configure_k1_ich8lan(hw, false);</div><div class='add'>+</div><div class='add'>+	/* Change K1 exit timeout */</div><div class='add'>+	ret_val = e1e_rphy_locked(hw, I217_PHY_TIMEOUTS_REG,</div><div class='add'>+				  &amp;phy_timeout);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		return ret_val;</div><div class='add'>+</div><div class='add'>+	phy_timeout &amp;= ~I217_PHY_TIMEOUTS_K1_EXIT_TO_MASK;</div><div class='add'>+	phy_timeout |= 0xF00;</div><div class='add'>+</div><div class='add'>+	return e1e_wphy_locked(hw, I217_PHY_TIMEOUTS_REG,</div><div class='add'>+				  phy_timeout);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  *  e1000_init_phy_workarounds_pchlan - PHY initialization workarounds</div><div class='ctx'>  *  @hw: pointer to the HW structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -327,15 +373,22 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)</div><div class='ctx'> 	 * LANPHYPC Value bit to force the interconnect to PCIe mode.</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='add'>+	case e1000_pch_mtp:</div><div class='add'>+	case e1000_pch_lnp:</div><div class='add'>+	case e1000_pch_ptp:</div><div class='add'>+	case e1000_pch_nvp:</div><div class='add'>+		/* At this point the PHY might be inaccessible so don't</div><div class='add'>+		 * propagate the failure</div><div class='add'>+		 */</div><div class='add'>+		if (e1000_reconfigure_k1_params(hw))</div><div class='add'>+			e_dbg("Failed to reconfigure K1 parameters\n");</div><div class='add'>+</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case e1000_pch_lpt:</div><div class='ctx'> 	case e1000_pch_spt:</div><div class='ctx'> 	case e1000_pch_cnp:</div><div class='ctx'> 	case e1000_pch_tgp:</div><div class='ctx'> 	case e1000_pch_adp:</div><div class='del'>-	case e1000_pch_mtp:</div><div class='del'>-	case e1000_pch_lnp:</div><div class='del'>-	case e1000_pch_ptp:</div><div class='del'>-	case e1000_pch_nvp:</div><div class='ctx'> 		if (e1000_phy_is_accessible_pchlan(hw))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -419,8 +472,20 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)</div><div class='ctx'> 		 *  the PHY is in.</div><div class='ctx'> 		 */</div><div class='ctx'> 		ret_val = hw-&gt;phy.ops.check_reset_block(hw);</div><div class='del'>-		if (ret_val)</div><div class='add'>+		if (ret_val) {</div><div class='ctx'> 			e_err("ME blocked access to PHY after reset\n");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (hw-&gt;mac.type &gt;= e1000_pch_mtp) {</div><div class='add'>+			ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='add'>+			if (ret_val) {</div><div class='add'>+				e_err("Failed to reconfigure K1 parameters\n");</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			ret_val = e1000_reconfigure_k1_params(hw);</div><div class='add'>+			hw-&gt;phy.ops.release(hw);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -1205,12 +1270,10 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;mac.type != e1000_pch_mtp) {</div><div class='del'>-		ret_val = e1000e_force_smbus(hw);</div><div class='del'>-		if (ret_val) {</div><div class='del'>-			e_dbg("Failed to force SMBUS: %d\n", ret_val);</div><div class='del'>-			goto release;</div><div class='del'>-		}</div><div class='add'>+	ret_val = e1000e_force_smbus(hw);</div><div class='add'>+	if (ret_val) {</div><div class='add'>+		e_dbg("Failed to force SMBUS: %d\n", ret_val);</div><div class='add'>+		goto release;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Si workaround for ULP entry flow on i127/rev6 h/w.  Enable</div><div class='hunk'>@@ -1273,13 +1336,6 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> release:</div><div class='del'>-	if (hw-&gt;mac.type == e1000_pch_mtp) {</div><div class='del'>-		ret_val = e1000e_force_smbus(hw);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			e_dbg("Failed to force SMBUS over MTL system: %d\n",</div><div class='del'>-			      ret_val);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	hw-&gt;phy.ops.release(hw);</div><div class='ctx'> out:</div><div class='ctx'> 	if (ret_val)</div><div class='hunk'>@@ -4225,6 +4281,8 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 			ret_val = e1000e_update_nvm_checksum(hw);</div><div class='ctx'> 			if (ret_val)</div><div class='ctx'> 				return ret_val;</div><div class='add'>+		} else if (hw-&gt;mac.type == e1000_pch_tgp) {</div><div class='add'>+			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4897,6 +4955,16 @@ static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw)</div><div class='ctx'> 	u16 i;</div><div class='ctx'> </div><div class='ctx'> 	e1000_initialize_hw_bits_ich8lan(hw);</div><div class='add'>+	ret_val = hw-&gt;phy.ops.acquire(hw);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		return ret_val;</div><div class='add'>+</div><div class='add'>+	ret_val = e1000_reconfigure_k1_params(hw);</div><div class='add'>+	hw-&gt;phy.ops.release(hw);</div><div class='add'>+	if (ret_val) {</div><div class='add'>+		e_dbg("Error failed to reconfigure K1 parameters\n");</div><div class='add'>+		return ret_val;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize identification LED */</div><div class='ctx'> 	ret_val = mac-&gt;ops.id_led_init(hw);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.h b/drivers/net/ethernet/intel/e1000e/ich8lan.h<br/>index 2504b11c3169..5feb589a9b5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/ich8lan.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/ich8lan.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/ich8lan.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000e/ich8lan.h</a></div><div class='hunk'>@@ -219,6 +219,10 @@</div><div class='ctx'> #define I217_PLL_CLOCK_GATE_REG	PHY_REG(772, 28)</div><div class='ctx'> #define I217_PLL_CLOCK_GATE_MASK	0x07FF</div><div class='ctx'> </div><div class='add'>+/* PHY Timeouts */</div><div class='add'>+#define I217_PHY_TIMEOUTS_REG                   PHY_REG(770, 21)</div><div class='add'>+#define I217_PHY_TIMEOUTS_K1_EXIT_TO_MASK       0x0FC0</div><div class='add'>+</div><div class='ctx'> #define SW_FLAG_TIMEOUT		1000	/* SW Semaphore flag timeout in ms */</div><div class='ctx'> </div><div class='ctx'> /* Inband Control */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c<br/>index d7df2a0ed629..44249dd91bd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/mac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/mac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/mac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000e/mac.c</a></div><div class='hunk'>@@ -331,8 +331,21 @@ void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* replace the entire MTA table */</div><div class='del'>-	for (i = hw-&gt;mac.mta_reg_count - 1; i &gt;= 0; i--)</div><div class='add'>+	for (i = hw-&gt;mac.mta_reg_count - 1; i &gt;= 0; i--) {</div><div class='ctx'> 		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw-&gt;mac.mta_shadow[i]);</div><div class='add'>+</div><div class='add'>+		if (IS_ENABLED(CONFIG_PREEMPT_RT)) {</div><div class='add'>+			/*</div><div class='add'>+			 * Do not queue up too many posted writes to prevent</div><div class='add'>+			 * increased latency for other devices on the</div><div class='add'>+			 * interconnect. Flush after each 8th posted write,</div><div class='add'>+			 * to keep additional execution time low while still</div><div class='add'>+			 * preventing increased latency.</div><div class='add'>+			 */</div><div class='add'>+			if (!(i % 8) &amp;&amp; i)</div><div class='add'>+				e1e_flush();</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	e1e_flush();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c<br/>index 286155efcedf..ddbe2f7d8112 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/netdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/netdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/netdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000e/netdev.c</a></div><div class='hunk'>@@ -2761,7 +2761,7 @@ static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)</div><div class='ctx'> 		rctl &amp;= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);</div><div class='ctx'> 		ew32(RCTL, rctl);</div><div class='ctx'> </div><div class='del'>-		if (adapter-&gt;mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {</div><div class='add'>+		if (adapter-&gt;mng_vlan_id != E1000_MNG_VLAN_NONE) {</div><div class='ctx'> 			e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),</div><div class='ctx'> 					       adapter-&gt;mng_vlan_id);</div><div class='ctx'> 			adapter-&gt;mng_vlan_id = E1000_MNG_VLAN_NONE;</div><div class='hunk'>@@ -2828,7 +2828,7 @@ static void e1000_update_mng_vlan(struct e1000_adapter *adapter)</div><div class='ctx'> 		adapter-&gt;mng_vlan_id = vid;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &amp;&amp; (vid != old_vid))</div><div class='add'>+	if (old_vid != E1000_MNG_VLAN_NONE &amp;&amp; vid != old_vid)</div><div class='ctx'> 		e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3534,9 +3534,6 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)</div><div class='ctx'> 	case e1000_pch_cnp:</div><div class='ctx'> 	case e1000_pch_tgp:</div><div class='ctx'> 	case e1000_pch_adp:</div><div class='del'>-	case e1000_pch_mtp:</div><div class='del'>-	case e1000_pch_lnp:</div><div class='del'>-	case e1000_pch_ptp:</div><div class='ctx'> 	case e1000_pch_nvp:</div><div class='ctx'> 		if (er32(TSYNCRXCTL) &amp; E1000_TSYNCRXCTL_SYSCFI) {</div><div class='ctx'> 			/* Stable 24MHz frequency */</div><div class='hunk'>@@ -3552,6 +3549,17 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)</div><div class='ctx'> 			adapter-&gt;cc.shift = shift;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case e1000_pch_mtp:</div><div class='add'>+	case e1000_pch_lnp:</div><div class='add'>+	case e1000_pch_ptp:</div><div class='add'>+		/* System firmware can misreport this value, so set it to a</div><div class='add'>+		 * stable 38400KHz frequency.</div><div class='add'>+		 */</div><div class='add'>+		incperiod = INCPERIOD_38400KHZ;</div><div class='add'>+		incvalue = INCVALUE_38400KHZ;</div><div class='add'>+		shift = INCVALUE_SHIFT_38400KHZ;</div><div class='add'>+		adapter-&gt;cc.shift = shift;</div><div class='add'>+		break;</div><div class='ctx'> 	case e1000_82574:</div><div class='ctx'> 	case e1000_82583:</div><div class='ctx'> 		/* Stable 25MHz frequency */</div><div class='hunk'>@@ -3574,6 +3582,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)</div><div class='ctx'>  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable</div><div class='ctx'>  * @adapter: board private structure</div><div class='ctx'>  * @config: timestamp configuration</div><div class='add'>+ * @extack: netlink extended ACK for error report</div><div class='ctx'>  *</div><div class='ctx'>  * Outgoing time stamping can be enabled and disabled. Play nice and</div><div class='ctx'>  * disable it when requested, although it shouldn't cause any overhead</div><div class='hunk'>@@ -3587,7 +3596,8 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)</div><div class='ctx'>  * exception of "all V2 events regardless of level 2 or 4".</div><div class='ctx'>  **/</div><div class='ctx'> static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,</div><div class='del'>-				  struct hwtstamp_config *config)</div><div class='add'>+				  struct kernel_hwtstamp_config *config,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;</div><div class='hunk'>@@ -3598,8 +3608,10 @@ static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,</div><div class='ctx'> 	bool is_l2 = false;</div><div class='ctx'> 	u32 regval;</div><div class='ctx'> </div><div class='del'>-	if (!(adapter-&gt;flags &amp; FLAG_HAS_HW_TIMESTAMP))</div><div class='add'>+	if (!(adapter-&gt;flags &amp; FLAG_HAS_HW_TIMESTAMP)) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "No HW timestamp support");</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='hunk'>@@ -3608,6 +3620,7 @@ static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='add'>+		NL_SET_ERR_MSG(extack, "Unsupported TX HW timestamp type");</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3681,6 +3694,7 @@ static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,</div><div class='ctx'> 		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='add'>+		NL_SET_ERR_MSG(extack, "Unsupported RX HW timestamp filter");</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3693,7 +3707,8 @@ static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,</div><div class='ctx'> 	ew32(TSYNCTXCTL, regval);</div><div class='ctx'> 	if ((er32(TSYNCTXCTL) &amp; E1000_TSYNCTXCTL_ENABLED) !=</div><div class='ctx'> 	    (regval &amp; E1000_TSYNCTXCTL_ENABLED)) {</div><div class='del'>-		e_err("Timesync Tx Control register not set as expected\n");</div><div class='add'>+		NL_SET_ERR_MSG(extack,</div><div class='add'>+			       "Timesync Tx Control register not set as expected");</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3706,7 +3721,8 @@ static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,</div><div class='ctx'> 				 E1000_TSYNCRXCTL_TYPE_MASK)) !=</div><div class='ctx'> 	    (regval &amp; (E1000_TSYNCRXCTL_ENABLED |</div><div class='ctx'> 		       E1000_TSYNCRXCTL_TYPE_MASK))) {</div><div class='del'>-		e_err("Timesync Rx Control register not set as expected\n");</div><div class='add'>+		NL_SET_ERR_MSG(extack,</div><div class='add'>+			       "Timesync Rx Control register not set as expected");</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3901,6 +3917,7 @@ static void e1000e_systim_reset(struct e1000_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct ptp_clock_info *info = &amp;adapter-&gt;ptp_clock_info;</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct netlink_ext_ack extack = {};</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 timinca;</div><div class='ctx'> 	s32 ret_val;</div><div class='hunk'>@@ -3932,7 +3949,12 @@ static void e1000e_systim_reset(struct e1000_adapter *adapter)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;adapter-&gt;systim_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* restore the previous hwtstamp configuration settings */</div><div class='del'>-	e1000e_config_hwtstamp(adapter, &amp;adapter-&gt;hwtstamp_config);</div><div class='add'>+	ret_val = e1000e_config_hwtstamp(adapter, &amp;adapter-&gt;hwtstamp_config,</div><div class='add'>+					 &amp;extack);</div><div class='add'>+	if (ret_val) {</div><div class='add'>+		if (extack._msg)</div><div class='add'>+			e_err("%s\n", extack._msg);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4287,8 +4309,8 @@ void e1000e_down(struct e1000_adapter *adapter, bool reset)</div><div class='ctx'> </div><div class='ctx'> 	napi_synchronize(&amp;adapter-&gt;napi);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;adapter-&gt;stats64_lock);</div><div class='ctx'> 	e1000e_update_stats(adapter);</div><div class='hunk'>@@ -4414,7 +4436,7 @@ u64 e1000e_read_systim(struct e1000_adapter *adapter,</div><div class='ctx'>  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)</div><div class='ctx'>  * @cc: cyclecounter structure</div><div class='ctx'>  **/</div><div class='del'>-static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 e1000e_cyclecounter_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,</div><div class='ctx'> 						     cc);</div><div class='hunk'>@@ -4839,7 +4861,8 @@ static void e1000e_update_phy_task(struct work_struct *work)</div><div class='ctx'>  **/</div><div class='ctx'> static void e1000_update_phy_info(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct e1000_adapter *adapter = from_timer(adapter, t, phy_info_timer);</div><div class='add'>+	struct e1000_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							   phy_info_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(__E1000_DOWN, &amp;adapter-&gt;state))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -5175,7 +5198,8 @@ static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> static void e1000_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct e1000_adapter *adapter = from_timer(adapter, t, watchdog_timer);</div><div class='add'>+	struct e1000_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							   watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Do the rest outside of interrupt context */</div><div class='ctx'> 	schedule_work(&amp;adapter-&gt;watchdog_task);</div><div class='hunk'>@@ -6079,8 +6103,7 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,</div><div class='del'>-			   int cmd)</div><div class='add'>+static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct mii_ioctl_data *data = if_mii(ifr);</div><div class='hunk'>@@ -6140,7 +6163,8 @@ static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,</div><div class='ctx'> /**</div><div class='ctx'>  * e1000e_hwtstamp_set - control hardware time stamping</div><div class='ctx'>  * @netdev: network interface device structure</div><div class='del'>- * @ifr: interface request</div><div class='add'>+ * @config: timestamp configuration</div><div class='add'>+ * @extack: netlink extended ACK report</div><div class='ctx'>  *</div><div class='ctx'>  * Outgoing time stamping can be enabled and disabled. Play nice and</div><div class='ctx'>  * disable it when requested, although it shouldn't cause any overhead</div><div class='hunk'>@@ -6153,20 +6177,18 @@ static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,</div><div class='ctx'>  * specified. Matching the kind of event packet is not supported, with the</div><div class='ctx'>  * exception of "all V2 events regardless of level 2 or 4".</div><div class='ctx'>  **/</div><div class='del'>-static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+static int e1000e_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	int ret_val;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	ret_val = e1000e_config_hwtstamp(adapter, &amp;config);</div><div class='add'>+	ret_val = e1000e_config_hwtstamp(adapter, config, extack);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		return ret_val;</div><div class='ctx'> </div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='hunk'>@@ -6178,38 +6200,23 @@ static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 		 * by hardware so notify the caller the requested packets plus</div><div class='ctx'> 		 * some others are time stamped.</div><div class='ctx'> 		 */</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_SOME;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_SOME;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config,</div><div class='del'>-			    sizeof(config)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+static int e1000e_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *kernel_config)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;adapter-&gt;hwtstamp_config,</div><div class='del'>-			    sizeof(adapter-&gt;hwtstamp_config)) ? -EFAULT : 0;</div><div class='del'>-}</div><div class='add'>+	*kernel_config = adapter-&gt;hwtstamp_config;</div><div class='ctx'> </div><div class='del'>-static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGMIIPHY:</div><div class='del'>-	case SIOCGMIIREG:</div><div class='del'>-	case SIOCSMIIREG:</div><div class='del'>-		return e1000_mii_ioctl(netdev, ifr, cmd);</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return e1000e_hwtstamp_set(netdev, ifr);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return e1000e_hwtstamp_get(netdev, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)</div><div class='hunk'>@@ -7188,7 +7195,6 @@ static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 			"Cannot re-enable PCI device after reset.\n");</div><div class='ctx'> 		result = PCI_ERS_RESULT_DISCONNECT;</div><div class='ctx'> 	} else {</div><div class='del'>-		pdev-&gt;state_saved = true;</div><div class='ctx'> 		pci_restore_state(pdev);</div><div class='ctx'> 		pci_set_master(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -7346,9 +7352,11 @@ static const struct net_device_ops e1000e_netdev_ops = {</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	= e1000_netpoll,</div><div class='ctx'> #endif</div><div class='del'>-	.ndo_set_features = e1000_set_features,</div><div class='del'>-	.ndo_fix_features = e1000_fix_features,</div><div class='add'>+	.ndo_set_features	= e1000_set_features,</div><div class='add'>+	.ndo_fix_features	= e1000_fix_features,</div><div class='ctx'> 	.ndo_features_check	= passthru_features_check,</div><div class='add'>+	.ndo_hwtstamp_get	= e1000e_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= e1000e_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -7666,6 +7674,9 @@ static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	/* init PTP hardware clock */</div><div class='ctx'> 	e1000e_ptp_init(adapter);</div><div class='ctx'> </div><div class='add'>+	if (hw-&gt;mac.type &gt;= e1000_pch_mtp)</div><div class='add'>+		adapter-&gt;flags2 |= FLAG2_DISABLE_K1;</div><div class='add'>+</div><div class='ctx'> 	/* reset the hardware with the new settings */</div><div class='ctx'> 	e1000e_reset(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -7741,8 +7752,8 @@ static void e1000_remove(struct pci_dev *pdev)</div><div class='ctx'> 	 * from being rescheduled.</div><div class='ctx'> 	 */</div><div class='ctx'> 	set_bit(__E1000_DOWN, &amp;adapter-&gt;state);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='ctx'> </div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;watchdog_task);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/nvm.c b/drivers/net/ethernet/intel/e1000e/nvm.c<br/>index e609f4df86f4..4bde1c9de1b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/nvm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/nvm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/nvm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000e/nvm.c</a></div><div class='hunk'>@@ -558,7 +558,13 @@ s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw)</div><div class='ctx'> 		checksum += nvm_data;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (checksum != (u16)NVM_SUM) {</div><div class='add'>+	if (hw-&gt;mac.type == e1000_pch_tgp &amp;&amp;</div><div class='add'>+	    nvm_data == NVM_CHECKSUM_UNINITIALIZED) {</div><div class='add'>+		e_dbg("Uninitialized NVM Checksum on TGP platform - ignoring\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (checksum != NVM_SUM) {</div><div class='ctx'> 		e_dbg("NVM Checksum Invalid\n");</div><div class='ctx'> 		return -E1000_ERR_NVM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -588,7 +594,7 @@ s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw)</div><div class='ctx'> 		}</div><div class='ctx'> 		checksum += nvm_data;</div><div class='ctx'> 	}</div><div class='del'>-	checksum = (u16)NVM_SUM - checksum;</div><div class='add'>+	checksum = NVM_SUM - checksum;</div><div class='ctx'> 	ret_val = e1000_write_nvm(hw, NVM_CHECKSUM_REG, 1, &amp;checksum);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		e_dbg("NVM Write Error while updating checksum.\n");</div><div class='head'>diff --git a/drivers/net/ethernet/intel/e1000e/ptp.c b/drivers/net/ethernet/intel/e1000e/ptp.c<br/>index 89d57dd911dc..ec39e35f3857 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/e1000e/ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/e1000e/ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/e1000e/ptp.c</a></div><div class='hunk'>@@ -229,14 +229,11 @@ static void e1000e_systim_overflow_work(struct work_struct *work)</div><div class='ctx'> 						     systim_overflow_work.work);</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct timespec64 ts;</div><div class='del'>-	u64 ns;</div><div class='ctx'> </div><div class='ctx'> 	/* Update the timecounter */</div><div class='del'>-	ns = timecounter_read(&amp;adapter-&gt;tc);</div><div class='add'>+	ts = ns_to_timespec64(timecounter_read(&amp;adapter-&gt;tc));</div><div class='ctx'> </div><div class='del'>-	ts = ns_to_timespec64(ns);</div><div class='del'>-	e_dbg("SYSTIM overflow check at %lld.%09lu\n",</div><div class='del'>-	      (long long) ts.tv_sec, ts.tv_nsec);</div><div class='add'>+	e_dbg("SYSTIM overflow check at %ptSp\n", &amp;ts);</div><div class='ctx'> </div><div class='ctx'> 	schedule_delayed_work(&amp;adapter-&gt;systim_overflow_work,</div><div class='ctx'> 			      E1000_SYSTIM_OVERFLOW_PERIOD);</div><div class='hunk'>@@ -295,15 +292,17 @@ void e1000e_ptp_init(struct e1000_adapter *adapter)</div><div class='ctx'> 	case e1000_pch_cnp:</div><div class='ctx'> 	case e1000_pch_tgp:</div><div class='ctx'> 	case e1000_pch_adp:</div><div class='del'>-	case e1000_pch_mtp:</div><div class='del'>-	case e1000_pch_lnp:</div><div class='del'>-	case e1000_pch_ptp:</div><div class='ctx'> 	case e1000_pch_nvp:</div><div class='ctx'> 		if (er32(TSYNCRXCTL) &amp; E1000_TSYNCRXCTL_SYSCFI)</div><div class='ctx'> 			adapter-&gt;ptp_clock_info.max_adj = MAX_PPB_24MHZ;</div><div class='ctx'> 		else</div><div class='ctx'> 			adapter-&gt;ptp_clock_info.max_adj = MAX_PPB_38400KHZ;</div><div class='ctx'> 		break;</div><div class='add'>+	case e1000_pch_mtp:</div><div class='add'>+	case e1000_pch_lnp:</div><div class='add'>+	case e1000_pch_ptp:</div><div class='add'>+		adapter-&gt;ptp_clock_info.max_adj = MAX_PPB_38400KHZ;</div><div class='add'>+		break;</div><div class='ctx'> 	case e1000_82574:</div><div class='ctx'> 	case e1000_82583:</div><div class='ctx'> 		adapter-&gt;ptp_clock_info.max_adj = MAX_PPB_25MHZ;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/fm10k/fm10k.h b/drivers/net/ethernet/intel/fm10k/fm10k.h<br/>index 6119a4108838..65a2816142d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/fm10k/fm10k.h</a></div><div class='hunk'>@@ -189,13 +189,14 @@ struct fm10k_q_vector {</div><div class='ctx'> 	struct fm10k_ring_container rx, tx;</div><div class='ctx'> </div><div class='ctx'> 	struct napi_struct napi;</div><div class='add'>+	struct rcu_head rcu;	/* to avoid race with update stats on free */</div><div class='add'>+</div><div class='ctx'> 	cpumask_t affinity_mask;</div><div class='ctx'> 	char name[IFNAMSIZ + 9];</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> 	struct dentry *dbg_q_vector;</div><div class='ctx'> #endif /* CONFIG_DEBUG_FS */</div><div class='del'>-	struct rcu_head rcu;	/* to avoid race with update stats on free */</div><div class='ctx'> </div><div class='ctx'> 	/* for dynamic allocation of rings associated with this q_vector */</div><div class='ctx'> 	struct fm10k_ring ring[] ____cacheline_internodealigned_in_smp;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_common.c b/drivers/net/ethernet/intel/fm10k/fm10k_common.c<br/>index f51a63fca513..1f919a50c765 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/fm10k/fm10k_common.c</a></div><div class='hunk'>@@ -447,17 +447,16 @@ void fm10k_update_hw_stats_q(struct fm10k_hw *hw, struct fm10k_hw_stats_q *q,</div><div class='ctx'> /**</div><div class='ctx'>  *  fm10k_unbind_hw_stats_q - Unbind the queue counters from their queues</div><div class='ctx'>  *  @q: pointer to the ring of hardware statistics queue</div><div class='del'>- *  @idx: index pointing to the start of the ring iteration</div><div class='ctx'>  *  @count: number of queues to iterate over</div><div class='ctx'>  *</div><div class='ctx'>  *  Function invalidates the index values for the queues so any updates that</div><div class='ctx'>  *  may have happened are ignored and the base for the queue stats is reset.</div><div class='ctx'>  **/</div><div class='del'>-void fm10k_unbind_hw_stats_q(struct fm10k_hw_stats_q *q, u32 idx, u32 count)</div><div class='add'>+void fm10k_unbind_hw_stats_q(struct fm10k_hw_stats_q *q, u32 count)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; count; i++, idx++, q++) {</div><div class='add'>+	for (i = 0; i &lt; count; i++, q++) {</div><div class='ctx'> 		q-&gt;rx_stats_idx = 0;</div><div class='ctx'> 		q-&gt;tx_stats_idx = 0;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_common.h b/drivers/net/ethernet/intel/fm10k/fm10k_common.h<br/>index 4c48fb73b3e7..13fca6a91a01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/fm10k/fm10k_common.h</a></div><div class='hunk'>@@ -43,6 +43,6 @@ u32 fm10k_read_hw_stats_32b(struct fm10k_hw *hw, u32 addr,</div><div class='ctx'> void fm10k_update_hw_stats_q(struct fm10k_hw *hw, struct fm10k_hw_stats_q *q,</div><div class='ctx'> 			     u32 idx, u32 count);</div><div class='ctx'> #define fm10k_unbind_hw_stats_32b(s) ((s)-&gt;base_h = 0)</div><div class='del'>-void fm10k_unbind_hw_stats_q(struct fm10k_hw_stats_q *q, u32 idx, u32 count);</div><div class='add'>+void fm10k_unbind_hw_stats_q(struct fm10k_hw_stats_q *q, u32 count);</div><div class='ctx'> s32 fm10k_get_host_state_generic(struct fm10k_hw *hw, bool *host_ready);</div><div class='ctx'> #endif /* _FM10K_COMMON_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c b/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c<br/>index 1bc5b6c0b897..76e42abca965 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c</a></div><div class='hunk'>@@ -560,7 +560,7 @@ static int fm10k_set_ringparam(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	/* allocate temporary buffer to store rings in */</div><div class='ctx'> 	i = max_t(int, interface-&gt;num_tx_queues, interface-&gt;num_rx_queues);</div><div class='del'>-	temp_ring = vmalloc(array_size(i, sizeof(struct fm10k_ring)));</div><div class='add'>+	temp_ring = vmalloc_array(i, sizeof(struct fm10k_ring));</div><div class='ctx'> </div><div class='ctx'> 	if (!temp_ring) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -691,9 +691,11 @@ static int fm10k_set_coalesce(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fm10k_get_rss_hash_opts(struct fm10k_intfc *interface,</div><div class='del'>-				   struct ethtool_rxnfc *cmd)</div><div class='add'>+static int fm10k_get_rssh_fields(struct net_device *dev,</div><div class='add'>+				 struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct fm10k_intfc *interface = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	cmd-&gt;data = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Report default options for RSS on fm10k */</div><div class='hunk'>@@ -732,30 +734,18 @@ static int fm10k_get_rss_hash_opts(struct fm10k_intfc *interface,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fm10k_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='del'>-			   u32 __always_unused *rule_locs)</div><div class='add'>+static u32 fm10k_get_rx_ring_count(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fm10k_intfc *interface = netdev_priv(dev);</div><div class='del'>-	int ret = -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = interface-&gt;num_rx_queues;</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ret = fm10k_get_rss_hash_opts(interface, cmd);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return interface-&gt;num_rx_queues;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fm10k_set_rss_hash_opt(struct fm10k_intfc *interface,</div><div class='del'>-				  struct ethtool_rxnfc *nfc)</div><div class='add'>+static int fm10k_set_rssh_fields(struct net_device *dev,</div><div class='add'>+				 const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct fm10k_intfc *interface = netdev_priv(dev);</div><div class='ctx'> 	int rss_ipv4_udp = test_bit(FM10K_FLAG_RSS_FIELD_IPV4_UDP,</div><div class='ctx'> 				    interface-&gt;flags);</div><div class='ctx'> 	int rss_ipv6_udp = test_bit(FM10K_FLAG_RSS_FIELD_IPV6_UDP,</div><div class='hunk'>@@ -871,22 +861,6 @@ static int fm10k_set_rss_hash_opt(struct fm10k_intfc *interface,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fm10k_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='del'>-{</div><div class='del'>-	struct fm10k_intfc *interface = netdev_priv(dev);</div><div class='del'>-	int ret = -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = fm10k_set_rss_hash_opt(interface, cmd);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int fm10k_mbx_test(struct fm10k_intfc *interface, u64 *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct fm10k_hw *hw = &amp;interface-&gt;hw;</div><div class='hunk'>@@ -1175,8 +1149,7 @@ static const struct ethtool_ops fm10k_ethtool_ops = {</div><div class='ctx'> 	.set_ringparam		= fm10k_set_ringparam,</div><div class='ctx'> 	.get_coalesce		= fm10k_get_coalesce,</div><div class='ctx'> 	.set_coalesce		= fm10k_set_coalesce,</div><div class='del'>-	.get_rxnfc		= fm10k_get_rxnfc,</div><div class='del'>-	.set_rxnfc		= fm10k_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= fm10k_get_rx_ring_count,</div><div class='ctx'> 	.get_regs               = fm10k_get_regs,</div><div class='ctx'> 	.get_regs_len           = fm10k_get_regs_len,</div><div class='ctx'> 	.self_test		= fm10k_self_test,</div><div class='hunk'>@@ -1186,6 +1159,8 @@ static const struct ethtool_ops fm10k_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_key_size	= fm10k_get_rssrk_size,</div><div class='ctx'> 	.get_rxfh		= fm10k_get_rssh,</div><div class='ctx'> 	.set_rxfh		= fm10k_set_rssh,</div><div class='add'>+	.get_rxfh_fields	= fm10k_get_rssh_fields,</div><div class='add'>+	.set_rxfh_fields	= fm10k_set_rssh_fields,</div><div class='ctx'> 	.get_channels		= fm10k_get_channels,</div><div class='ctx'> 	.set_channels		= fm10k_set_channels,</div><div class='ctx'> 	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_main.c b/drivers/net/ethernet/intel/fm10k/fm10k_main.c<br/>index 142f07ca8bc0..b8c15b837fda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/fm10k/fm10k_main.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@ static int __init fm10k_init_module(void)</div><div class='ctx'> 	pr_info("%s\n", fm10k_copyright);</div><div class='ctx'> </div><div class='ctx'> 	/* create driver workqueue */</div><div class='del'>-	fm10k_workqueue = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0,</div><div class='add'>+	fm10k_workqueue = alloc_workqueue("%s", WQ_MEM_RECLAIM | WQ_PERCPU, 0,</div><div class='ctx'> 					  fm10k_driver_name);</div><div class='ctx'> 	if (!fm10k_workqueue)</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_pci.c b/drivers/net/ethernet/intel/fm10k/fm10k_pci.c<br/>index 92de609b7218..d75b8a50413d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/fm10k/fm10k_pci.c</a></div><div class='hunk'>@@ -199,8 +199,8 @@ static void fm10k_start_service_event(struct fm10k_intfc *interface)</div><div class='ctx'>  **/</div><div class='ctx'> static void fm10k_service_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct fm10k_intfc *interface = from_timer(interface, t,</div><div class='del'>-						   service_timer);</div><div class='add'>+	struct fm10k_intfc *interface = timer_container_of(interface, t,</div><div class='add'>+							   service_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset the timer */</div><div class='ctx'> 	mod_timer(&amp;interface-&gt;service_timer, (HZ * 2) + jiffies);</div><div class='hunk'>@@ -2245,7 +2245,7 @@ static void fm10k_remove(struct pci_dev *pdev)</div><div class='ctx'> 	struct fm10k_intfc *interface = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct net_device *netdev = interface-&gt;netdev;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;interface-&gt;service_timer);</div><div class='add'>+	timer_delete_sync(&amp;interface-&gt;service_timer);</div><div class='ctx'> </div><div class='ctx'> 	fm10k_stop_service_event(interface);</div><div class='ctx'> 	fm10k_stop_macvlan_task(interface);</div><div class='hunk'>@@ -2423,12 +2423,6 @@ static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pci_set_master(pdev);</div><div class='ctx'> 		pci_restore_state(pdev);</div><div class='del'>-</div><div class='del'>-		/* After second error pci-&gt;state_saved is false, this</div><div class='del'>-		 * resets it so EEH doesn't break.</div><div class='del'>-		 */</div><div class='del'>-		pci_save_state(pdev);</div><div class='del'>-</div><div class='ctx'> 		pci_wake_from_d3(pdev, false);</div><div class='ctx'> </div><div class='ctx'> 		result = PCI_ERS_RESULT_RECOVERED;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_pf.c b/drivers/net/ethernet/intel/fm10k/fm10k_pf.c<br/>index 98861cc6df7c..3394645a18fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_pf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_pf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_pf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/fm10k/fm10k_pf.c</a></div><div class='hunk'>@@ -1180,126 +1180,6 @@ s32 fm10k_iov_select_vid(struct fm10k_vf_info *vf_info, u16 vid)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- *  fm10k_iov_msg_mac_vlan_pf - Message handler for MAC/VLAN request from VF</div><div class='del'>- *  @hw: Pointer to hardware structure</div><div class='del'>- *  @results: Pointer array to message, results[0] is pointer to message</div><div class='del'>- *  @mbx: Pointer to mailbox information structure</div><div class='del'>- *</div><div class='del'>- *  This function is a default handler for MAC/VLAN requests from the VF.</div><div class='del'>- *  The assumption is that in this case it is acceptable to just directly</div><div class='del'>- *  hand off the message from the VF to the underlying shared code.</div><div class='del'>- **/</div><div class='del'>-s32 fm10k_iov_msg_mac_vlan_pf(struct fm10k_hw *hw, u32 **results,</div><div class='del'>-			      struct fm10k_mbx_info *mbx)</div><div class='del'>-{</div><div class='del'>-	struct fm10k_vf_info *vf_info = (struct fm10k_vf_info *)mbx;</div><div class='del'>-	u8 mac[ETH_ALEN];</div><div class='del'>-	u32 *result;</div><div class='del'>-	int err = 0;</div><div class='del'>-	bool set;</div><div class='del'>-	u16 vlan;</div><div class='del'>-	u32 vid;</div><div class='del'>-</div><div class='del'>-	/* we shouldn't be updating rules on a disabled interface */</div><div class='del'>-	if (!FM10K_VF_FLAG_ENABLED(vf_info))</div><div class='del'>-		err = FM10K_ERR_PARAM;</div><div class='del'>-</div><div class='del'>-	if (!err &amp;&amp; !!results[FM10K_MAC_VLAN_MSG_VLAN]) {</div><div class='del'>-		result = results[FM10K_MAC_VLAN_MSG_VLAN];</div><div class='del'>-</div><div class='del'>-		/* record VLAN id requested */</div><div class='del'>-		err = fm10k_tlv_attr_get_u32(result, &amp;vid);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		set = !(vid &amp; FM10K_VLAN_CLEAR);</div><div class='del'>-		vid &amp;= ~FM10K_VLAN_CLEAR;</div><div class='del'>-</div><div class='del'>-		/* if the length field has been set, this is a multi-bit</div><div class='del'>-		 * update request. For multi-bit requests, simply disallow</div><div class='del'>-		 * them when the pf_vid has been set. In this case, the PF</div><div class='del'>-		 * should have already cleared the VLAN_TABLE, and if we</div><div class='del'>-		 * allowed them, it could allow a rogue VF to receive traffic</div><div class='del'>-		 * on a VLAN it was not assigned. In the single-bit case, we</div><div class='del'>-		 * need to modify requests for VLAN 0 to use the default PF or</div><div class='del'>-		 * SW vid when assigned.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		if (vid &gt;&gt; 16) {</div><div class='del'>-			/* prevent multi-bit requests when PF has</div><div class='del'>-			 * administratively set the VLAN for this VF</div><div class='del'>-			 */</div><div class='del'>-			if (vf_info-&gt;pf_vid)</div><div class='del'>-				return FM10K_ERR_PARAM;</div><div class='del'>-		} else {</div><div class='del'>-			err = fm10k_iov_select_vid(vf_info, (u16)vid);</div><div class='del'>-			if (err &lt; 0)</div><div class='del'>-				return err;</div><div class='del'>-</div><div class='del'>-			vid = err;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* update VSI info for VF in regards to VLAN table */</div><div class='del'>-		err = hw-&gt;mac.ops.update_vlan(hw, vid, vf_info-&gt;vsi, set);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!err &amp;&amp; !!results[FM10K_MAC_VLAN_MSG_MAC]) {</div><div class='del'>-		result = results[FM10K_MAC_VLAN_MSG_MAC];</div><div class='del'>-</div><div class='del'>-		/* record unicast MAC address requested */</div><div class='del'>-		err = fm10k_tlv_attr_get_mac_vlan(result, mac, &amp;vlan);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		/* block attempts to set MAC for a locked device */</div><div class='del'>-		if (is_valid_ether_addr(vf_info-&gt;mac) &amp;&amp;</div><div class='del'>-		    !ether_addr_equal(mac, vf_info-&gt;mac))</div><div class='del'>-			return FM10K_ERR_PARAM;</div><div class='del'>-</div><div class='del'>-		set = !(vlan &amp; FM10K_VLAN_CLEAR);</div><div class='del'>-		vlan &amp;= ~FM10K_VLAN_CLEAR;</div><div class='del'>-</div><div class='del'>-		err = fm10k_iov_select_vid(vf_info, vlan);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		vlan = (u16)err;</div><div class='del'>-</div><div class='del'>-		/* notify switch of request for new unicast address */</div><div class='del'>-		err = hw-&gt;mac.ops.update_uc_addr(hw, vf_info-&gt;glort,</div><div class='del'>-						 mac, vlan, set, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!err &amp;&amp; !!results[FM10K_MAC_VLAN_MSG_MULTICAST]) {</div><div class='del'>-		result = results[FM10K_MAC_VLAN_MSG_MULTICAST];</div><div class='del'>-</div><div class='del'>-		/* record multicast MAC address requested */</div><div class='del'>-		err = fm10k_tlv_attr_get_mac_vlan(result, mac, &amp;vlan);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		/* verify that the VF is allowed to request multicast */</div><div class='del'>-		if (!(vf_info-&gt;vf_flags &amp; FM10K_VF_FLAG_MULTI_ENABLED))</div><div class='del'>-			return FM10K_ERR_PARAM;</div><div class='del'>-</div><div class='del'>-		set = !(vlan &amp; FM10K_VLAN_CLEAR);</div><div class='del'>-		vlan &amp;= ~FM10K_VLAN_CLEAR;</div><div class='del'>-</div><div class='del'>-		err = fm10k_iov_select_vid(vf_info, vlan);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		vlan = (u16)err;</div><div class='del'>-</div><div class='del'>-		/* notify switch of request for new multicast address */</div><div class='del'>-		err = hw-&gt;mac.ops.update_mc_addr(hw, vf_info-&gt;glort,</div><div class='del'>-						 mac, vlan, set);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  *  fm10k_iov_supported_xcast_mode_pf - Determine best match for xcast mode</div><div class='ctx'>  *  @vf_info: VF info structure containing capability flags</div><div class='ctx'>  *  @mode: Requested xcast mode</div><div class='hunk'>@@ -1509,7 +1389,7 @@ static void fm10k_rebind_hw_stats_pf(struct fm10k_hw *hw,</div><div class='ctx'> 	fm10k_unbind_hw_stats_32b(&amp;stats-&gt;nodesc_drop);</div><div class='ctx'> </div><div class='ctx'> 	/* Unbind Queue Statistics */</div><div class='del'>-	fm10k_unbind_hw_stats_q(stats-&gt;q, 0, hw-&gt;mac.max_queues);</div><div class='add'>+	fm10k_unbind_hw_stats_q(stats-&gt;q, hw-&gt;mac.max_queues);</div><div class='ctx'> </div><div class='ctx'> 	/* Reinitialize bases for all stats */</div><div class='ctx'> 	fm10k_update_hw_stats_pf(hw, stats);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_pf.h b/drivers/net/ethernet/intel/fm10k/fm10k_pf.h<br/>index 8e814df709d2..ad3696893cb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_pf.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_pf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_pf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/fm10k/fm10k_pf.h</a></div><div class='hunk'>@@ -99,8 +99,6 @@ extern const struct fm10k_tlv_attr fm10k_err_msg_attr[];</div><div class='ctx'> </div><div class='ctx'> s32 fm10k_iov_select_vid(struct fm10k_vf_info *vf_info, u16 vid);</div><div class='ctx'> s32 fm10k_iov_msg_msix_pf(struct fm10k_hw *, u32 **, struct fm10k_mbx_info *);</div><div class='del'>-s32 fm10k_iov_msg_mac_vlan_pf(struct fm10k_hw *, u32 **,</div><div class='del'>-			      struct fm10k_mbx_info *);</div><div class='ctx'> s32 fm10k_iov_msg_lport_state_pf(struct fm10k_hw *, u32 **,</div><div class='ctx'> 				 struct fm10k_mbx_info *);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_vf.c b/drivers/net/ethernet/intel/fm10k/fm10k_vf.c<br/>index 7fb1961f2921..6861a0bdc14e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_vf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/fm10k/fm10k_vf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/fm10k/fm10k_vf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/fm10k/fm10k_vf.c</a></div><div class='hunk'>@@ -465,7 +465,7 @@ static void fm10k_rebind_hw_stats_vf(struct fm10k_hw *hw,</div><div class='ctx'> 				     struct fm10k_hw_stats *stats)</div><div class='ctx'> {</div><div class='ctx'> 	/* Unbind Queue Statistics */</div><div class='del'>-	fm10k_unbind_hw_stats_q(stats-&gt;q, 0, hw-&gt;mac.max_queues);</div><div class='add'>+	fm10k_unbind_hw_stats_q(stats-&gt;q, hw-&gt;mac.max_queues);</div><div class='ctx'> </div><div class='ctx'> 	/* Reinitialize bases for all stats */</div><div class='ctx'> 	fm10k_update_hw_stats_vf(hw, stats);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h<br/>index 2089a0e172bf..d2d03db2acec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e.h</a></div><div class='hunk'>@@ -88,6 +88,7 @@ enum i40e_state {</div><div class='ctx'> 	__I40E_SERVICE_SCHED,</div><div class='ctx'> 	__I40E_ADMINQ_EVENT_PENDING,</div><div class='ctx'> 	__I40E_MDD_EVENT_PENDING,</div><div class='add'>+	__I40E_MDD_VF_PRINT_PENDING,</div><div class='ctx'> 	__I40E_VFLR_EVENT_PENDING,</div><div class='ctx'> 	__I40E_RESET_RECOVERY_PENDING,</div><div class='ctx'> 	__I40E_TIMEOUT_RECOVERY_PENDING,</div><div class='hunk'>@@ -191,6 +192,7 @@ enum i40e_pf_flags {</div><div class='ctx'> 	 */</div><div class='ctx'> 	I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA,</div><div class='ctx'> 	I40E_FLAG_VF_VLAN_PRUNING_ENA,</div><div class='add'>+	I40E_FLAG_MDD_AUTO_RESET_VF,</div><div class='ctx'> 	I40E_PF_FLAGS_NBITS,		/* must be last */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -546,6 +548,7 @@ struct i40e_pf {</div><div class='ctx'> 	u16 empr_count; /* EMP reset count */</div><div class='ctx'> 	u16 pfr_count; /* PF reset count */</div><div class='ctx'> 	u16 sw_int_count; /* SW interrupt count */</div><div class='add'>+	u32 link_down_events;</div><div class='ctx'> </div><div class='ctx'> 	struct mutex switch_mutex;</div><div class='ctx'> 	u16 lan_vsi;       /* our default LAN VSI */</div><div class='hunk'>@@ -571,8 +574,12 @@ struct i40e_pf {</div><div class='ctx'> 	struct i40e_vf *vf;</div><div class='ctx'> 	int num_alloc_vfs;	/* actual number of VFs allocated */</div><div class='ctx'> 	u32 vf_aq_requests;</div><div class='add'>+	/* If set to non-zero, the device uses this value</div><div class='add'>+	 * as maximum number of MAC filters per VF.</div><div class='add'>+	 */</div><div class='add'>+	u32 max_mac_per_vf;</div><div class='ctx'> 	u32 arq_overflows;	/* Not fatal, possibly indicative of problems */</div><div class='del'>-</div><div class='add'>+	struct ratelimit_state mdd_message_rate_limit;</div><div class='ctx'> 	/* DCBx/DCBNL capability for PF that indicates</div><div class='ctx'> 	 * whether DCBx is managed by firmware or host</div><div class='ctx'> 	 * based agent (LLDPAD). Also, indicates what</div><div class='hunk'>@@ -658,7 +665,7 @@ struct i40e_pf {</div><div class='ctx'> 	struct ptp_clock_info ptp_caps;</div><div class='ctx'> 	struct sk_buff *ptp_tx_skb;</div><div class='ctx'> 	unsigned long ptp_tx_start;</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> 	struct timespec64 ptp_prev_hw_time;</div><div class='ctx'> 	struct work_struct ptp_extts0_work;</div><div class='ctx'> 	ktime_t ptp_reset_start;</div><div class='hunk'>@@ -755,6 +762,7 @@ enum i40e_filter_state {</div><div class='ctx'> 	I40E_FILTER_ACTIVE,		/* Added to switch by FW */</div><div class='ctx'> 	I40E_FILTER_FAILED,		/* Rejected by FW */</div><div class='ctx'> 	I40E_FILTER_REMOVE,		/* To be removed */</div><div class='add'>+	I40E_FILTER_NEW_SYNC,		/* New, not sent yet, is in i40e_sync_vsi_filters() */</div><div class='ctx'> /* There is no 'removed' state; the filter struct is freed */</div><div class='ctx'> };</div><div class='ctx'> struct i40e_mac_filter {</div><div class='hunk'>@@ -942,6 +950,7 @@ struct i40e_q_vector {</div><div class='ctx'> 	u16 reg_idx;		/* register index of the interrupt */</div><div class='ctx'> </div><div class='ctx'> 	struct napi_struct napi;</div><div class='add'>+	struct rcu_head rcu;	/* to avoid race with update stats on free */</div><div class='ctx'> </div><div class='ctx'> 	struct i40e_ring_container rx;</div><div class='ctx'> 	struct i40e_ring_container tx;</div><div class='hunk'>@@ -952,7 +961,6 @@ struct i40e_q_vector {</div><div class='ctx'> 	cpumask_t affinity_mask;</div><div class='ctx'> 	struct irq_affinity_notify affinity_notify;</div><div class='ctx'> </div><div class='del'>-	struct rcu_head rcu;	/* to avoid race with update stats on free */</div><div class='ctx'> 	char name[I40E_INT_NAME_STR_LEN];</div><div class='ctx'> 	bool arm_wb_state;</div><div class='ctx'> 	bool in_busy_poll;</div><div class='hunk'>@@ -1188,7 +1196,6 @@ int i40e_add_del_fdir(struct i40e_vsi *vsi,</div><div class='ctx'> 		      struct i40e_fdir_filter *input, bool add);</div><div class='ctx'> void i40e_fdir_check_and_reenable(struct i40e_pf *pf);</div><div class='ctx'> u32 i40e_get_current_fd_count(struct i40e_pf *pf);</div><div class='del'>-u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);</div><div class='ctx'> u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);</div><div class='ctx'> u32 i40e_get_global_fd_count(struct i40e_pf *pf);</div><div class='ctx'> bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);</div><div class='hunk'>@@ -1196,7 +1203,6 @@ void i40e_set_ethtool_ops(struct net_device *netdev);</div><div class='ctx'> struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,</div><div class='ctx'> 					const u8 *macaddr, s16 vlan);</div><div class='ctx'> void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f);</div><div class='del'>-void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan);</div><div class='ctx'> int i40e_sync_vsi_filters(struct i40e_vsi *vsi);</div><div class='ctx'> struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,</div><div class='ctx'> 				u16 uplink, u32 param1);</div><div class='hunk'>@@ -1276,7 +1282,8 @@ struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,</div><div class='ctx'> 					    const u8 *macaddr);</div><div class='ctx'> int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr);</div><div class='ctx'> bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);</div><div class='del'>-int i40e_count_filters(struct i40e_vsi *vsi);</div><div class='add'>+int i40e_count_all_filters(struct i40e_vsi *vsi);</div><div class='add'>+int i40e_count_active_filters(struct i40e_vsi *vsi);</div><div class='ctx'> struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr);</div><div class='ctx'> void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);</div><div class='ctx'> static inline bool i40e_is_sw_dcb(struct i40e_pf *pf)</div><div class='hunk'>@@ -1301,8 +1308,11 @@ void i40e_ptp_tx_hang(struct i40e_pf *pf);</div><div class='ctx'> void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);</div><div class='ctx'> void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);</div><div class='ctx'> void i40e_ptp_set_increment(struct i40e_pf *pf);</div><div class='del'>-int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);</div><div class='del'>-int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);</div><div class='add'>+int i40e_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			  struct kernel_hwtstamp_config *config);</div><div class='add'>+int i40e_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			  struct kernel_hwtstamp_config *config,</div><div class='add'>+			  struct netlink_ext_ack *extack);</div><div class='ctx'> void i40e_ptp_save_hw_time(struct i40e_pf *pf);</div><div class='ctx'> void i40e_ptp_restore_hw_time(struct i40e_pf *pf);</div><div class='ctx'> void i40e_ptp_init(struct i40e_pf *pf);</div><div class='hunk'>@@ -1312,7 +1322,6 @@ int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset);</div><div class='ctx'> int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);</div><div class='ctx'> int i40e_get_partition_bw_setting(struct i40e_pf *pf);</div><div class='ctx'> int i40e_set_partition_bw_setting(struct i40e_pf *pf);</div><div class='del'>-int i40e_commit_partition_bw_setting(struct i40e_pf *pf);</div><div class='ctx'> void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);</div><div class='ctx'> </div><div class='ctx'> void i40e_set_fec_in_flags(u8 fec_cfg, unsigned long *flags);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.c b/drivers/net/ethernet/intel/i40e/i40e_adminq.c<br/>index f73f5930fc58..096ec46bb619 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_adminq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_adminq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_adminq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_adminq.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@ static int i40e_alloc_adminq_asq_ring(struct i40e_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	ret_code = i40e_allocate_dma_mem(hw, &amp;hw-&gt;aq.asq.desc_buf,</div><div class='ctx'> 					 (hw-&gt;aq.num_asq_entries *</div><div class='del'>-					 sizeof(struct i40e_aq_desc)),</div><div class='add'>+					 sizeof(struct libie_aq_desc)),</div><div class='ctx'> 					 I40E_ADMINQ_DESC_ALIGNMENT);</div><div class='ctx'> 	if (ret_code)</div><div class='ctx'> 		return ret_code;</div><div class='hunk'>@@ -44,7 +44,7 @@ static int i40e_alloc_adminq_arq_ring(struct i40e_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	ret_code = i40e_allocate_dma_mem(hw, &amp;hw-&gt;aq.arq.desc_buf,</div><div class='ctx'> 					 (hw-&gt;aq.num_arq_entries *</div><div class='del'>-					 sizeof(struct i40e_aq_desc)),</div><div class='add'>+					 sizeof(struct libie_aq_desc)),</div><div class='ctx'> 					 I40E_ADMINQ_DESC_ALIGNMENT);</div><div class='ctx'> </div><div class='ctx'> 	return ret_code;</div><div class='hunk'>@@ -80,7 +80,7 @@ static void i40e_free_adminq_arq(struct i40e_hw *hw)</div><div class='ctx'>  **/</div><div class='ctx'> static int i40e_alloc_arq_bufs(struct i40e_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc *desc;</div><div class='add'>+	struct libie_aq_desc *desc;</div><div class='ctx'> 	struct i40e_dma_mem *bi;</div><div class='ctx'> 	int ret_code;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -108,9 +108,9 @@ static int i40e_alloc_arq_bufs(struct i40e_hw *hw)</div><div class='ctx'> 		/* now configure the descriptors for use */</div><div class='ctx'> 		desc = I40E_ADMINQ_DESC(hw-&gt;aq.arq, i);</div><div class='ctx'> </div><div class='del'>-		desc-&gt;flags = cpu_to_le16(I40E_AQ_FLAG_BUF);</div><div class='add'>+		desc-&gt;flags = cpu_to_le16(LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 		if (hw-&gt;aq.arq_buf_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-			desc-&gt;flags |= cpu_to_le16(I40E_AQ_FLAG_LB);</div><div class='add'>+			desc-&gt;flags |= cpu_to_le16(LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 		desc-&gt;opcode = 0;</div><div class='ctx'> 		/* This is in accordance with Admin queue design, there is no</div><div class='ctx'> 		 * register for buffer size configuration</div><div class='hunk'>@@ -119,12 +119,12 @@ static int i40e_alloc_arq_bufs(struct i40e_hw *hw)</div><div class='ctx'> 		desc-&gt;retval = 0;</div><div class='ctx'> 		desc-&gt;cookie_high = 0;</div><div class='ctx'> 		desc-&gt;cookie_low = 0;</div><div class='del'>-		desc-&gt;params.external.addr_high =</div><div class='add'>+		desc-&gt;params.generic.addr_high =</div><div class='ctx'> 			cpu_to_le32(upper_32_bits(bi-&gt;pa));</div><div class='del'>-		desc-&gt;params.external.addr_low =</div><div class='add'>+		desc-&gt;params.generic.addr_low =</div><div class='ctx'> 			cpu_to_le32(lower_32_bits(bi-&gt;pa));</div><div class='del'>-		desc-&gt;params.external.param0 = 0;</div><div class='del'>-		desc-&gt;params.external.param1 = 0;</div><div class='add'>+		desc-&gt;params.generic.param0 = 0;</div><div class='add'>+		desc-&gt;params.generic.param1 = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> alloc_arq_bufs:</div><div class='hunk'>@@ -691,8 +691,8 @@ static u16 i40e_clean_asq(struct i40e_hw *hw)</div><div class='ctx'> 	struct i40e_adminq_ring *asq = &amp;(hw-&gt;aq.asq);</div><div class='ctx'> 	struct i40e_asq_cmd_details *details;</div><div class='ctx'> 	u16 ntc = asq-&gt;next_to_clean;</div><div class='del'>-	struct i40e_aq_desc desc_cb;</div><div class='del'>-	struct i40e_aq_desc *desc;</div><div class='add'>+	struct libie_aq_desc desc_cb;</div><div class='add'>+	struct libie_aq_desc *desc;</div><div class='ctx'> </div><div class='ctx'> 	desc = I40E_ADMINQ_DESC(*asq, ntc);</div><div class='ctx'> 	details = I40E_ADMINQ_DETAILS(*asq, ntc);</div><div class='hunk'>@@ -750,7 +750,7 @@ static bool i40e_asq_done(struct i40e_hw *hw)</div><div class='ctx'>  **/</div><div class='ctx'> static int</div><div class='ctx'> i40e_asq_send_command_atomic_exec(struct i40e_hw *hw,</div><div class='del'>-				  struct i40e_aq_desc *desc,</div><div class='add'>+				  struct libie_aq_desc *desc,</div><div class='ctx'> 				  void *buff, /* can be NULL */</div><div class='ctx'> 				  u16  buff_size,</div><div class='ctx'> 				  struct i40e_asq_cmd_details *cmd_details,</div><div class='hunk'>@@ -758,7 +758,7 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw,</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_dma_mem *dma_buff = NULL;</div><div class='ctx'> 	struct i40e_asq_cmd_details *details;</div><div class='del'>-	struct i40e_aq_desc *desc_on_ring;</div><div class='add'>+	struct libie_aq_desc *desc_on_ring;</div><div class='ctx'> 	bool cmd_completed = false;</div><div class='ctx'> 	u16  retval = 0;</div><div class='ctx'> 	int status = 0;</div><div class='hunk'>@@ -771,7 +771,7 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw,</div><div class='ctx'> 		goto asq_send_command_error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hw-&gt;aq.asq_last_status = I40E_AQ_RC_OK;</div><div class='add'>+	hw-&gt;aq.asq_last_status = LIBIE_AQ_RC_OK;</div><div class='ctx'> </div><div class='ctx'> 	val = rd32(hw, I40E_PF_ATQH);</div><div class='ctx'> 	if (val &gt;= hw-&gt;aq.num_asq_entries) {</div><div class='hunk'>@@ -851,9 +851,9 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw,</div><div class='ctx'> 		/* Update the address values in the desc with the pa value</div><div class='ctx'> 		 * for respective buffer</div><div class='ctx'> 		 */</div><div class='del'>-		desc_on_ring-&gt;params.external.addr_high =</div><div class='add'>+		desc_on_ring-&gt;params.generic.addr_high =</div><div class='ctx'> 				cpu_to_le32(upper_32_bits(dma_buff-&gt;pa));</div><div class='del'>-		desc_on_ring-&gt;params.external.addr_low =</div><div class='add'>+		desc_on_ring-&gt;params.generic.addr_low =</div><div class='ctx'> 				cpu_to_le32(lower_32_bits(dma_buff-&gt;pa));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -905,13 +905,13 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw,</div><div class='ctx'> 			retval &amp;= 0xff;</div><div class='ctx'> 		}</div><div class='ctx'> 		cmd_completed = true;</div><div class='del'>-		if ((enum i40e_admin_queue_err)retval == I40E_AQ_RC_OK)</div><div class='add'>+		if ((enum libie_aq_err)retval == LIBIE_AQ_RC_OK)</div><div class='ctx'> 			status = 0;</div><div class='del'>-		else if ((enum i40e_admin_queue_err)retval == I40E_AQ_RC_EBUSY)</div><div class='add'>+		else if ((enum libie_aq_err)retval == LIBIE_AQ_RC_EBUSY)</div><div class='ctx'> 			status = -EBUSY;</div><div class='ctx'> 		else</div><div class='ctx'> 			status = -EIO;</div><div class='del'>-		hw-&gt;aq.asq_last_status = (enum i40e_admin_queue_err)retval;</div><div class='add'>+		hw-&gt;aq.asq_last_status = (enum libie_aq_err)retval;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	i40e_debug(hw, I40E_DEBUG_AQ_COMMAND,</div><div class='hunk'>@@ -954,7 +954,7 @@ asq_send_command_error:</div><div class='ctx'>  **/</div><div class='ctx'> int</div><div class='ctx'> i40e_asq_send_command_atomic(struct i40e_hw *hw,</div><div class='del'>-			     struct i40e_aq_desc *desc,</div><div class='add'>+			     struct libie_aq_desc *desc,</div><div class='ctx'> 			     void *buff, /* can be NULL */</div><div class='ctx'> 			     u16  buff_size,</div><div class='ctx'> 			     struct i40e_asq_cmd_details *cmd_details,</div><div class='hunk'>@@ -972,7 +972,7 @@ i40e_asq_send_command_atomic(struct i40e_hw *hw,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-i40e_asq_send_command(struct i40e_hw *hw, struct i40e_aq_desc *desc,</div><div class='add'>+i40e_asq_send_command(struct i40e_hw *hw, struct libie_aq_desc *desc,</div><div class='ctx'> 		      void *buff, /* can be NULL */ u16  buff_size,</div><div class='ctx'> 		      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='hunk'>@@ -996,12 +996,12 @@ i40e_asq_send_command(struct i40e_hw *hw, struct i40e_aq_desc *desc,</div><div class='ctx'>  **/</div><div class='ctx'> int</div><div class='ctx'> i40e_asq_send_command_atomic_v2(struct i40e_hw *hw,</div><div class='del'>-				struct i40e_aq_desc *desc,</div><div class='add'>+				struct libie_aq_desc *desc,</div><div class='ctx'> 				void *buff, /* can be NULL */</div><div class='ctx'> 				u16  buff_size,</div><div class='ctx'> 				struct i40e_asq_cmd_details *cmd_details,</div><div class='ctx'> 				bool is_atomic_context,</div><div class='del'>-				enum i40e_admin_queue_err *aq_status)</div><div class='add'>+				enum libie_aq_err *aq_status)</div><div class='ctx'> {</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='hunk'>@@ -1016,16 +1016,6 @@ i40e_asq_send_command_atomic_v2(struct i40e_hw *hw,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int</div><div class='del'>-i40e_asq_send_command_v2(struct i40e_hw *hw, struct i40e_aq_desc *desc,</div><div class='del'>-			 void *buff, /* can be NULL */ u16  buff_size,</div><div class='del'>-			 struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-			 enum i40e_admin_queue_err *aq_status)</div><div class='del'>-{</div><div class='del'>-	return i40e_asq_send_command_atomic_v2(hw, desc, buff, buff_size,</div><div class='del'>-					       cmd_details, true, aq_status);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  *  i40e_fill_default_direct_cmd_desc - AQ descriptor helper function</div><div class='ctx'>  *  @desc:     pointer to the temp descriptor (non DMA mem)</div><div class='hunk'>@@ -1033,13 +1023,13 @@ i40e_asq_send_command_v2(struct i40e_hw *hw, struct i40e_aq_desc *desc,</div><div class='ctx'>  *</div><div class='ctx'>  *  Fill the desc with default values</div><div class='ctx'>  **/</div><div class='del'>-void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc,</div><div class='add'>+void i40e_fill_default_direct_cmd_desc(struct libie_aq_desc *desc,</div><div class='ctx'> 				       u16 opcode)</div><div class='ctx'> {</div><div class='ctx'> 	/* zero out the desc */</div><div class='del'>-	memset((void *)desc, 0, sizeof(struct i40e_aq_desc));</div><div class='add'>+	memset((void *)desc, 0, sizeof(struct libie_aq_desc));</div><div class='ctx'> 	desc-&gt;opcode = cpu_to_le16(opcode);</div><div class='del'>-	desc-&gt;flags = cpu_to_le16(I40E_AQ_FLAG_SI);</div><div class='add'>+	desc-&gt;flags = cpu_to_le16(LIBIE_AQ_FLAG_SI);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1057,7 +1047,7 @@ int i40e_clean_arq_element(struct i40e_hw *hw,</div><div class='ctx'> 			   u16 *pending)</div><div class='ctx'> {</div><div class='ctx'> 	u16 ntc = hw-&gt;aq.arq.next_to_clean;</div><div class='del'>-	struct i40e_aq_desc *desc;</div><div class='add'>+	struct libie_aq_desc *desc;</div><div class='ctx'> 	struct i40e_dma_mem *bi;</div><div class='ctx'> 	int ret_code = 0;</div><div class='ctx'> 	u16 desc_idx;</div><div class='hunk'>@@ -1091,9 +1081,9 @@ int i40e_clean_arq_element(struct i40e_hw *hw,</div><div class='ctx'> 	desc_idx = ntc;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;aq.arq_last_status =</div><div class='del'>-		(enum i40e_admin_queue_err)le16_to_cpu(desc-&gt;retval);</div><div class='add'>+		(enum libie_aq_err)le16_to_cpu(desc-&gt;retval);</div><div class='ctx'> 	flags = le16_to_cpu(desc-&gt;flags);</div><div class='del'>-	if (flags &amp; I40E_AQ_FLAG_ERR) {</div><div class='add'>+	if (flags &amp; LIBIE_AQ_FLAG_ERR) {</div><div class='ctx'> 		ret_code = -EIO;</div><div class='ctx'> 		i40e_debug(hw,</div><div class='ctx'> 			   I40E_DEBUG_AQ_MESSAGE,</div><div class='hunk'>@@ -1117,14 +1107,14 @@ int i40e_clean_arq_element(struct i40e_hw *hw,</div><div class='ctx'> 	 * size</div><div class='ctx'> 	 */</div><div class='ctx'> 	bi = &amp;hw-&gt;aq.arq.r.arq_bi[ntc];</div><div class='del'>-	memset((void *)desc, 0, sizeof(struct i40e_aq_desc));</div><div class='add'>+	memset((void *)desc, 0, sizeof(struct libie_aq_desc));</div><div class='ctx'> </div><div class='del'>-	desc-&gt;flags = cpu_to_le16(I40E_AQ_FLAG_BUF);</div><div class='add'>+	desc-&gt;flags = cpu_to_le16(LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 	if (hw-&gt;aq.arq_buf_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc-&gt;flags |= cpu_to_le16(I40E_AQ_FLAG_LB);</div><div class='add'>+		desc-&gt;flags |= cpu_to_le16(LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 	desc-&gt;datalen = cpu_to_le16((u16)bi-&gt;size);</div><div class='del'>-	desc-&gt;params.external.addr_high = cpu_to_le32(upper_32_bits(bi-&gt;pa));</div><div class='del'>-	desc-&gt;params.external.addr_low = cpu_to_le32(lower_32_bits(bi-&gt;pa));</div><div class='add'>+	desc-&gt;params.generic.addr_high = cpu_to_le32(upper_32_bits(bi-&gt;pa));</div><div class='add'>+	desc-&gt;params.generic.addr_low = cpu_to_le32(lower_32_bits(bi-&gt;pa));</div><div class='ctx'> </div><div class='ctx'> 	/* set tail = the last cleaned desc index. */</div><div class='ctx'> 	wr32(hw, I40E_PF_ARQT, ntc);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq.h b/drivers/net/ethernet/intel/i40e/i40e_adminq.h<br/>index 55b5bb884d73..1be97a3a86ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_adminq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_adminq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_adminq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_adminq.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include "i40e_adminq_cmd.h"</div><div class='ctx'> </div><div class='ctx'> #define I40E_ADMINQ_DESC(R, i)   \</div><div class='del'>-	(&amp;(((struct i40e_aq_desc *)((R).desc_buf.va))[i]))</div><div class='add'>+	(&amp;(((struct libie_aq_desc *)((R).desc_buf.va))[i]))</div><div class='ctx'> </div><div class='ctx'> #define I40E_ADMINQ_DESC_ALIGNMENT 4096</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +39,7 @@ struct i40e_asq_cmd_details {</div><div class='ctx'> 	u16 flags_dis;</div><div class='ctx'> 	bool async;</div><div class='ctx'> 	bool postpone;</div><div class='del'>-	struct i40e_aq_desc *wb_desc;</div><div class='add'>+	struct libie_aq_desc *wb_desc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define I40E_ADMINQ_DETAILS(R, i)   \</div><div class='hunk'>@@ -47,7 +47,7 @@ struct i40e_asq_cmd_details {</div><div class='ctx'> </div><div class='ctx'> /* ARQ event information */</div><div class='ctx'> struct i40e_arq_event_info {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 msg_len;</div><div class='ctx'> 	u16 buf_len;</div><div class='ctx'> 	u8 *msg_buf;</div><div class='hunk'>@@ -72,8 +72,8 @@ struct i40e_adminq_info {</div><div class='ctx'> 	struct mutex arq_mutex; /* Receive queue lock */</div><div class='ctx'> </div><div class='ctx'> 	/* last status values on send and receive queues */</div><div class='del'>-	enum i40e_admin_queue_err asq_last_status;</div><div class='del'>-	enum i40e_admin_queue_err arq_last_status;</div><div class='add'>+	enum libie_aq_err asq_last_status;</div><div class='add'>+	enum libie_aq_err arq_last_status;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -119,7 +119,7 @@ static inline int i40e_aq_rc_to_posix(int aq_ret, int aq_rc)</div><div class='ctx'> #define I40E_AQ_LARGE_BUF	512</div><div class='ctx'> #define I40E_ASQ_CMD_TIMEOUT	250000  /* usecs */</div><div class='ctx'> </div><div class='del'>-void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc,</div><div class='add'>+void i40e_fill_default_direct_cmd_desc(struct libie_aq_desc *desc,</div><div class='ctx'> 				       u16 opcode);</div><div class='ctx'> </div><div class='ctx'> #endif /* _I40E_ADMINQ_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h<br/>index c8f35d4de271..cc02a85ad42b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> #ifndef _I40E_ADMINQ_CMD_H_</div><div class='ctx'> #define _I40E_ADMINQ_CMD_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/net/intel/libie/adminq.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -30,75 +32,6 @@</div><div class='ctx'> /* API version 1.10 for X722 devices adds ability to request FEC encoding */</div><div class='ctx'> #define I40E_MINOR_VER_FW_REQUEST_FEC_X722 0x000A</div><div class='ctx'> </div><div class='del'>-struct i40e_aq_desc {</div><div class='del'>-	__le16 flags;</div><div class='del'>-	__le16 opcode;</div><div class='del'>-	__le16 datalen;</div><div class='del'>-	__le16 retval;</div><div class='del'>-	__le32 cookie_high;</div><div class='del'>-	__le32 cookie_low;</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			__le32 param0;</div><div class='del'>-			__le32 param1;</div><div class='del'>-			__le32 param2;</div><div class='del'>-			__le32 param3;</div><div class='del'>-		} internal;</div><div class='del'>-		struct {</div><div class='del'>-			__le32 param0;</div><div class='del'>-			__le32 param1;</div><div class='del'>-			__le32 addr_high;</div><div class='del'>-			__le32 addr_low;</div><div class='del'>-		} external;</div><div class='del'>-		u8 raw[16];</div><div class='del'>-	} params;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Flags sub-structure</div><div class='del'>- * |0  |1  |2  |3  |4  |5  |6  |7  |8  |9  |10 |11 |12 |13 |14 |15 |</div><div class='del'>- * |DD |CMP|ERR|VFE| * *  RESERVED * * |LB |RD |VFC|BUF|SI |EI |FE |</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* command flags and offsets*/</div><div class='del'>-#define I40E_AQ_FLAG_ERR_SHIFT	2</div><div class='del'>-#define I40E_AQ_FLAG_LB_SHIFT	9</div><div class='del'>-#define I40E_AQ_FLAG_RD_SHIFT	10</div><div class='del'>-#define I40E_AQ_FLAG_BUF_SHIFT	12</div><div class='del'>-#define I40E_AQ_FLAG_SI_SHIFT	13</div><div class='del'>-</div><div class='del'>-#define I40E_AQ_FLAG_ERR	BIT(I40E_AQ_FLAG_ERR_SHIFT) /* 0x4    */</div><div class='del'>-#define I40E_AQ_FLAG_LB		BIT(I40E_AQ_FLAG_LB_SHIFT)  /* 0x200  */</div><div class='del'>-#define I40E_AQ_FLAG_RD		BIT(I40E_AQ_FLAG_RD_SHIFT)  /* 0x400  */</div><div class='del'>-#define I40E_AQ_FLAG_BUF	BIT(I40E_AQ_FLAG_BUF_SHIFT) /* 0x1000 */</div><div class='del'>-#define I40E_AQ_FLAG_SI		BIT(I40E_AQ_FLAG_SI_SHIFT)  /* 0x2000 */</div><div class='del'>-</div><div class='del'>-/* error codes */</div><div class='del'>-enum i40e_admin_queue_err {</div><div class='del'>-	I40E_AQ_RC_OK		= 0,  /* success */</div><div class='del'>-	I40E_AQ_RC_EPERM	= 1,  /* Operation not permitted */</div><div class='del'>-	I40E_AQ_RC_ENOENT	= 2,  /* No such element */</div><div class='del'>-	I40E_AQ_RC_ESRCH	= 3,  /* Bad opcode */</div><div class='del'>-	I40E_AQ_RC_EINTR	= 4,  /* operation interrupted */</div><div class='del'>-	I40E_AQ_RC_EIO		= 5,  /* I/O error */</div><div class='del'>-	I40E_AQ_RC_ENXIO	= 6,  /* No such resource */</div><div class='del'>-	I40E_AQ_RC_E2BIG	= 7,  /* Arg too long */</div><div class='del'>-	I40E_AQ_RC_EAGAIN	= 8,  /* Try again */</div><div class='del'>-	I40E_AQ_RC_ENOMEM	= 9,  /* Out of memory */</div><div class='del'>-	I40E_AQ_RC_EACCES	= 10, /* Permission denied */</div><div class='del'>-	I40E_AQ_RC_EFAULT	= 11, /* Bad address */</div><div class='del'>-	I40E_AQ_RC_EBUSY	= 12, /* Device or resource busy */</div><div class='del'>-	I40E_AQ_RC_EEXIST	= 13, /* object already exists */</div><div class='del'>-	I40E_AQ_RC_EINVAL	= 14, /* Invalid argument */</div><div class='del'>-	I40E_AQ_RC_ENOTTY	= 15, /* Not a typewriter */</div><div class='del'>-	I40E_AQ_RC_ENOSPC	= 16, /* No space left or alloc failure */</div><div class='del'>-	I40E_AQ_RC_ENOSYS	= 17, /* Function not implemented */</div><div class='del'>-	I40E_AQ_RC_ERANGE	= 18, /* Parameter out of range */</div><div class='del'>-	I40E_AQ_RC_EFLUSHED	= 19, /* Cmd flushed due to prev cmd error */</div><div class='del'>-	I40E_AQ_RC_BAD_ADDR	= 20, /* Descriptor contains a bad pointer */</div><div class='del'>-	I40E_AQ_RC_EMODE	= 21, /* Op not allowed in current dev mode */</div><div class='del'>-	I40E_AQ_RC_EFBIG	= 22, /* File too large */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Admin Queue command opcodes */</div><div class='ctx'> enum i40e_admin_queue_opc {</div><div class='ctx'> 	/* aq commands */</div><div class='hunk'>@@ -320,21 +253,6 @@ struct i40e_aqc_get_version {</div><div class='ctx'> 	__le16 api_minor;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-I40E_CHECK_CMD_LENGTH(i40e_aqc_get_version);</div><div class='del'>-</div><div class='del'>-/* Send driver version (indirect 0x0002) */</div><div class='del'>-struct i40e_aqc_driver_version {</div><div class='del'>-	u8	driver_major_ver;</div><div class='del'>-	u8	driver_minor_ver;</div><div class='del'>-	u8	driver_build_ver;</div><div class='del'>-	u8	driver_subbuild_ver;</div><div class='del'>-	u8	reserved[4];</div><div class='del'>-	__le32	address_high;</div><div class='del'>-	__le32	address_low;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-I40E_CHECK_CMD_LENGTH(i40e_aqc_driver_version);</div><div class='del'>-</div><div class='ctx'> /* Queue Shutdown (direct 0x0003) */</div><div class='ctx'> struct i40e_aqc_queue_shutdown {</div><div class='ctx'> 	__le32	driver_unloading;</div><div class='hunk'>@@ -352,75 +270,6 @@ struct i40e_aqc_set_pf_context {</div><div class='ctx'> </div><div class='ctx'> I40E_CHECK_CMD_LENGTH(i40e_aqc_set_pf_context);</div><div class='ctx'> </div><div class='del'>-/* Request resource ownership (direct 0x0008)</div><div class='del'>- * Release resource ownership (direct 0x0009)</div><div class='del'>- */</div><div class='del'>-struct i40e_aqc_request_resource {</div><div class='del'>-	__le16	resource_id;</div><div class='del'>-	__le16	access_type;</div><div class='del'>-	__le32	timeout;</div><div class='del'>-	__le32	resource_number;</div><div class='del'>-	u8	reserved[4];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-I40E_CHECK_CMD_LENGTH(i40e_aqc_request_resource);</div><div class='del'>-</div><div class='del'>-/* Get function capabilities (indirect 0x000A)</div><div class='del'>- * Get device capabilities (indirect 0x000B)</div><div class='del'>- */</div><div class='del'>-struct i40e_aqc_list_capabilites {</div><div class='del'>-	u8 command_flags;</div><div class='del'>-	u8 pf_index;</div><div class='del'>-	u8 reserved[2];</div><div class='del'>-	__le32 count;</div><div class='del'>-	__le32 addr_high;</div><div class='del'>-	__le32 addr_low;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-I40E_CHECK_CMD_LENGTH(i40e_aqc_list_capabilites);</div><div class='del'>-</div><div class='del'>-struct i40e_aqc_list_capabilities_element_resp {</div><div class='del'>-	__le16	id;</div><div class='del'>-	u8	major_rev;</div><div class='del'>-	u8	minor_rev;</div><div class='del'>-	__le32	number;</div><div class='del'>-	__le32	logical_id;</div><div class='del'>-	__le32	phys_id;</div><div class='del'>-	u8	reserved[16];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* list of caps */</div><div class='del'>-</div><div class='del'>-#define I40E_AQ_CAP_ID_SWITCH_MODE	0x0001</div><div class='del'>-#define I40E_AQ_CAP_ID_MNG_MODE		0x0002</div><div class='del'>-#define I40E_AQ_CAP_ID_NPAR_ACTIVE	0x0003</div><div class='del'>-#define I40E_AQ_CAP_ID_OS2BMC_CAP	0x0004</div><div class='del'>-#define I40E_AQ_CAP_ID_FUNCTIONS_VALID	0x0005</div><div class='del'>-#define I40E_AQ_CAP_ID_SRIOV		0x0012</div><div class='del'>-#define I40E_AQ_CAP_ID_VF		0x0013</div><div class='del'>-#define I40E_AQ_CAP_ID_VMDQ		0x0014</div><div class='del'>-#define I40E_AQ_CAP_ID_8021QBG		0x0015</div><div class='del'>-#define I40E_AQ_CAP_ID_8021QBR		0x0016</div><div class='del'>-#define I40E_AQ_CAP_ID_VSI		0x0017</div><div class='del'>-#define I40E_AQ_CAP_ID_DCB		0x0018</div><div class='del'>-#define I40E_AQ_CAP_ID_FCOE		0x0021</div><div class='del'>-#define I40E_AQ_CAP_ID_ISCSI		0x0022</div><div class='del'>-#define I40E_AQ_CAP_ID_RSS		0x0040</div><div class='del'>-#define I40E_AQ_CAP_ID_RXQ		0x0041</div><div class='del'>-#define I40E_AQ_CAP_ID_TXQ		0x0042</div><div class='del'>-#define I40E_AQ_CAP_ID_MSIX		0x0043</div><div class='del'>-#define I40E_AQ_CAP_ID_VF_MSIX		0x0044</div><div class='del'>-#define I40E_AQ_CAP_ID_FLOW_DIRECTOR	0x0045</div><div class='del'>-#define I40E_AQ_CAP_ID_1588		0x0046</div><div class='del'>-#define I40E_AQ_CAP_ID_IWARP		0x0051</div><div class='del'>-#define I40E_AQ_CAP_ID_LED		0x0061</div><div class='del'>-#define I40E_AQ_CAP_ID_SDP		0x0062</div><div class='del'>-#define I40E_AQ_CAP_ID_MDIO		0x0063</div><div class='del'>-#define I40E_AQ_CAP_ID_WSR_PROT		0x0064</div><div class='del'>-#define I40E_AQ_CAP_ID_NVM_MGMT		0x0080</div><div class='del'>-#define I40E_AQ_CAP_ID_FLEX10		0x00F1</div><div class='del'>-#define I40E_AQ_CAP_ID_CEM		0x00F2</div><div class='del'>-</div><div class='ctx'> /* Set CPPM Configuration (direct 0x0103) */</div><div class='ctx'> struct i40e_aqc_cppm_configuration {</div><div class='ctx'> 	__le16	command_flags;</div><div class='hunk'>@@ -1712,6 +1561,7 @@ I40E_CHECK_CMD_LENGTH(i40e_aq_set_phy_config);</div><div class='ctx'> struct i40e_aq_set_mac_config {</div><div class='ctx'> 	__le16	max_frame_size;</div><div class='ctx'> 	u8	params;</div><div class='add'>+#define I40E_AQ_SET_MAC_CONFIG_CRC_EN	BIT(2)</div><div class='ctx'> 	u8	tx_timer_priority; /* bitmap */</div><div class='ctx'> 	__le16	tx_timer_value;</div><div class='ctx'> 	__le16	fc_refresh_threshold;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_client.c b/drivers/net/ethernet/intel/i40e/i40e_client.c<br/>index 59263551c383..518bc738ea3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_client.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_client.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_client.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_client.c</a></div><div class='hunk'>@@ -359,8 +359,8 @@ static void i40e_client_add_instance(struct i40e_pf *pf)</div><div class='ctx'> 	if (i40e_client_get_params(vsi, &amp;cdev-&gt;lan_info.params))</div><div class='ctx'> 		goto free_cdev;</div><div class='ctx'> </div><div class='del'>-	mac = list_first_entry(&amp;cdev-&gt;lan_info.netdev-&gt;dev_addrs.list,</div><div class='del'>-			       struct netdev_hw_addr, list);</div><div class='add'>+	mac = list_first_entry_or_null(&amp;cdev-&gt;lan_info.netdev-&gt;dev_addrs.list,</div><div class='add'>+				       struct netdev_hw_addr, list);</div><div class='ctx'> 	if (mac)</div><div class='ctx'> 		ether_addr_copy(cdev-&gt;lan_info.lanmac, mac-&gt;addr);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -682,9 +682,7 @@ static int i40e_client_update_vsi_ctxt(struct i40e_info *ldev,</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "couldn't get PF vsi config, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(err),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-				     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(err), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -711,8 +709,7 @@ static int i40e_client_update_vsi_ctxt(struct i40e_info *ldev,</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "update VSI ctxt for PE failed, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(err),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return err;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c<br/>index e8031f1a9b4f..59f5c1e810eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_common.c</a></div><div class='hunk'>@@ -69,66 +69,6 @@ int i40e_set_mac_type(struct i40e_hw *hw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_aq_str - convert AQ err code to a string</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @aq_err: the AQ error code to convert</div><div class='del'>- **/</div><div class='del'>-const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)</div><div class='del'>-{</div><div class='del'>-	switch (aq_err) {</div><div class='del'>-	case I40E_AQ_RC_OK:</div><div class='del'>-		return "OK";</div><div class='del'>-	case I40E_AQ_RC_EPERM:</div><div class='del'>-		return "I40E_AQ_RC_EPERM";</div><div class='del'>-	case I40E_AQ_RC_ENOENT:</div><div class='del'>-		return "I40E_AQ_RC_ENOENT";</div><div class='del'>-	case I40E_AQ_RC_ESRCH:</div><div class='del'>-		return "I40E_AQ_RC_ESRCH";</div><div class='del'>-	case I40E_AQ_RC_EINTR:</div><div class='del'>-		return "I40E_AQ_RC_EINTR";</div><div class='del'>-	case I40E_AQ_RC_EIO:</div><div class='del'>-		return "I40E_AQ_RC_EIO";</div><div class='del'>-	case I40E_AQ_RC_ENXIO:</div><div class='del'>-		return "I40E_AQ_RC_ENXIO";</div><div class='del'>-	case I40E_AQ_RC_E2BIG:</div><div class='del'>-		return "I40E_AQ_RC_E2BIG";</div><div class='del'>-	case I40E_AQ_RC_EAGAIN:</div><div class='del'>-		return "I40E_AQ_RC_EAGAIN";</div><div class='del'>-	case I40E_AQ_RC_ENOMEM:</div><div class='del'>-		return "I40E_AQ_RC_ENOMEM";</div><div class='del'>-	case I40E_AQ_RC_EACCES:</div><div class='del'>-		return "I40E_AQ_RC_EACCES";</div><div class='del'>-	case I40E_AQ_RC_EFAULT:</div><div class='del'>-		return "I40E_AQ_RC_EFAULT";</div><div class='del'>-	case I40E_AQ_RC_EBUSY:</div><div class='del'>-		return "I40E_AQ_RC_EBUSY";</div><div class='del'>-	case I40E_AQ_RC_EEXIST:</div><div class='del'>-		return "I40E_AQ_RC_EEXIST";</div><div class='del'>-	case I40E_AQ_RC_EINVAL:</div><div class='del'>-		return "I40E_AQ_RC_EINVAL";</div><div class='del'>-	case I40E_AQ_RC_ENOTTY:</div><div class='del'>-		return "I40E_AQ_RC_ENOTTY";</div><div class='del'>-	case I40E_AQ_RC_ENOSPC:</div><div class='del'>-		return "I40E_AQ_RC_ENOSPC";</div><div class='del'>-	case I40E_AQ_RC_ENOSYS:</div><div class='del'>-		return "I40E_AQ_RC_ENOSYS";</div><div class='del'>-	case I40E_AQ_RC_ERANGE:</div><div class='del'>-		return "I40E_AQ_RC_ERANGE";</div><div class='del'>-	case I40E_AQ_RC_EFLUSHED:</div><div class='del'>-		return "I40E_AQ_RC_EFLUSHED";</div><div class='del'>-	case I40E_AQ_RC_BAD_ADDR:</div><div class='del'>-		return "I40E_AQ_RC_BAD_ADDR";</div><div class='del'>-	case I40E_AQ_RC_EMODE:</div><div class='del'>-		return "I40E_AQ_RC_EMODE";</div><div class='del'>-	case I40E_AQ_RC_EFBIG:</div><div class='del'>-		return "I40E_AQ_RC_EFBIG";</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	snprintf(hw-&gt;err_str, sizeof(hw-&gt;err_str), "%d", aq_err);</div><div class='del'>-	return hw-&gt;err_str;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_debug_aq</div><div class='ctx'>  * @hw: debug mask related to admin queue</div><div class='ctx'>  * @mask: debug mask</div><div class='hunk'>@@ -141,7 +81,7 @@ const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)</div><div class='ctx'> void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,</div><div class='ctx'> 		   void *buffer, u16 buf_len)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;</div><div class='add'>+	struct libie_aq_desc *aq_desc = (struct libie_aq_desc *)desc;</div><div class='ctx'> 	u32 effective_mask = hw-&gt;debug_mask &amp; mask;</div><div class='ctx'> 	char prefix[27];</div><div class='ctx'> 	u16 len;</div><div class='hunk'>@@ -164,12 +104,12 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,</div><div class='ctx'> 		   le32_to_cpu(aq_desc-&gt;cookie_low));</div><div class='ctx'> 	i40e_debug(hw, mask &amp; I40E_DEBUG_AQ_DESCRIPTOR,</div><div class='ctx'> 		   "\tparam (0,1)  0x%08X 0x%08X\n",</div><div class='del'>-		   le32_to_cpu(aq_desc-&gt;params.internal.param0),</div><div class='del'>-		   le32_to_cpu(aq_desc-&gt;params.internal.param1));</div><div class='add'>+		   le32_to_cpu(aq_desc-&gt;params.generic.param0),</div><div class='add'>+		   le32_to_cpu(aq_desc-&gt;params.generic.param1));</div><div class='ctx'> 	i40e_debug(hw, mask &amp; I40E_DEBUG_AQ_DESCRIPTOR,</div><div class='ctx'> 		   "\taddr (h,l)   0x%08X 0x%08X\n",</div><div class='del'>-		   le32_to_cpu(aq_desc-&gt;params.external.addr_high),</div><div class='del'>-		   le32_to_cpu(aq_desc-&gt;params.external.addr_low));</div><div class='add'>+		   le32_to_cpu(aq_desc-&gt;params.generic.addr_high),</div><div class='add'>+		   le32_to_cpu(aq_desc-&gt;params.generic.addr_low));</div><div class='ctx'> </div><div class='ctx'> 	if (buffer &amp;&amp; buf_len != 0 &amp;&amp; len != 0 &amp;&amp;</div><div class='ctx'> 	    (effective_mask &amp; I40E_DEBUG_AQ_DESC_BUFFER)) {</div><div class='hunk'>@@ -214,14 +154,14 @@ bool i40e_check_asq_alive(struct i40e_hw *hw)</div><div class='ctx'> int i40e_aq_queue_shutdown(struct i40e_hw *hw,</div><div class='ctx'> 			   bool unloading)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_queue_shutdown *cmd =</div><div class='del'>-		(struct i40e_aqc_queue_shutdown *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_queue_shutdown *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_queue_shutdown);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (unloading)</div><div class='ctx'> 		cmd-&gt;driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);</div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, NULL);</div><div class='hunk'>@@ -245,9 +185,8 @@ static int i40e_aq_get_set_rss_lut(struct i40e_hw *hw,</div><div class='ctx'> 				   u8 *lut, u16 lut_size,</div><div class='ctx'> 				   bool set)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_get_set_rss_lut *cmd_resp =</div><div class='del'>-		   (struct i40e_aqc_get_set_rss_lut *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_get_set_rss_lut *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	u16 flags;</div><div class='ctx'> </div><div class='hunk'>@@ -258,9 +197,10 @@ static int i40e_aq_get_set_rss_lut(struct i40e_hw *hw,</div><div class='ctx'> 		i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 						  i40e_aqc_opc_get_rss_lut);</div><div class='ctx'> </div><div class='add'>+	cmd_resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	/* Indirect command */</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	vsi_id = FIELD_PREP(I40E_AQC_SET_RSS_LUT_VSI_ID_MASK, vsi_id) |</div><div class='ctx'> 		 FIELD_PREP(I40E_AQC_SET_RSS_LUT_VSI_VALID, 1);</div><div class='hunk'>@@ -326,10 +266,9 @@ static int i40e_aq_get_set_rss_key(struct i40e_hw *hw,</div><div class='ctx'> 				   struct i40e_aqc_get_set_rss_key_data *key,</div><div class='ctx'> 				   bool set)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_get_set_rss_key *cmd_resp =</div><div class='del'>-			(struct i40e_aqc_get_set_rss_key *)&amp;desc.params.raw;</div><div class='ctx'> 	u16 key_size = sizeof(struct i40e_aqc_get_set_rss_key_data);</div><div class='add'>+	struct i40e_aqc_get_set_rss_key *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (set)</div><div class='hunk'>@@ -339,9 +278,10 @@ static int i40e_aq_get_set_rss_key(struct i40e_hw *hw,</div><div class='ctx'> 		i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 						  i40e_aqc_opc_get_rss_key);</div><div class='ctx'> </div><div class='add'>+	cmd_resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	/* Indirect command */</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	vsi_id = FIELD_PREP(I40E_AQC_SET_RSS_KEY_VSI_ID_MASK, vsi_id) |</div><div class='ctx'> 		 FIELD_PREP(I40E_AQC_SET_RSS_KEY_VSI_VALID, 1);</div><div class='hunk'>@@ -439,13 +379,13 @@ i40e_aq_mac_address_read(struct i40e_hw *hw,</div><div class='ctx'> 			 struct i40e_aqc_mac_address_read_data *addrs,</div><div class='ctx'> 			 struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_mac_address_read *cmd_data =</div><div class='del'>-		(struct i40e_aqc_mac_address_read *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_mac_address_read *cmd_data;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_mac_address_read);</div><div class='del'>-	desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);</div><div class='add'>+	cmd_data = libie_aq_raw(&amp;desc);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, addrs,</div><div class='ctx'> 				       sizeof(*addrs), cmd_details);</div><div class='hunk'>@@ -465,13 +405,13 @@ int i40e_aq_mac_address_write(struct i40e_hw *hw,</div><div class='ctx'> 			      u16 flags, u8 *mac_addr,</div><div class='ctx'> 			      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_mac_address_write *cmd_data =</div><div class='del'>-		(struct i40e_aqc_mac_address_write *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_mac_address_write *cmd_data;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_mac_address_write);</div><div class='add'>+	cmd_data = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd_data-&gt;command_flags = cpu_to_le16(flags);</div><div class='ctx'> 	cmd_data-&gt;mac_sah = cpu_to_le16((u16)mac_addr[0] &lt;&lt; 8 | mac_addr[1]);</div><div class='ctx'> 	cmd_data-&gt;mac_sal = cpu_to_le32(((u32)mac_addr[2] &lt;&lt; 24) |</div><div class='hunk'>@@ -817,10 +757,11 @@ int i40e_pf_reset(struct i40e_hw *hw)</div><div class='ctx'> void i40e_clear_hw(struct i40e_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u32 num_queues, base_queue;</div><div class='del'>-	u32 num_pf_int;</div><div class='del'>-	u32 num_vf_int;</div><div class='add'>+	s32 num_pf_int;</div><div class='add'>+	s32 num_vf_int;</div><div class='ctx'> 	u32 num_vfs;</div><div class='del'>-	u32 i, j;</div><div class='add'>+	s32 i;</div><div class='add'>+	u32 j;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	u32 eol = 0x7ff;</div><div class='ctx'> </div><div class='hunk'>@@ -1060,7 +1001,7 @@ i40e_aq_get_phy_capabilities(struct i40e_hw *hw,</div><div class='ctx'> {</div><div class='ctx'> 	u16 abilities_size = sizeof(struct i40e_aq_get_phy_abilities_resp);</div><div class='ctx'> 	u16 max_delay = I40E_MAX_PHY_TIMEOUT, total_delay = 0;</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (!abilities)</div><div class='hunk'>@@ -1070,36 +1011,36 @@ i40e_aq_get_phy_capabilities(struct i40e_hw *hw,</div><div class='ctx'> 		i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					       i40e_aqc_opc_get_phy_abilities);</div><div class='ctx'> </div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 		if (abilities_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-			desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+			desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 		if (qualified_modules)</div><div class='del'>-			desc.params.external.param0 |=</div><div class='add'>+			desc.params.generic.param0 |=</div><div class='ctx'> 			cpu_to_le32(I40E_AQ_PHY_REPORT_QUALIFIED_MODULES);</div><div class='ctx'> </div><div class='ctx'> 		if (report_init)</div><div class='del'>-			desc.params.external.param0 |=</div><div class='add'>+			desc.params.generic.param0 |=</div><div class='ctx'> 			cpu_to_le32(I40E_AQ_PHY_REPORT_INITIAL_VALUES);</div><div class='ctx'> </div><div class='ctx'> 		status = i40e_asq_send_command(hw, &amp;desc, abilities,</div><div class='ctx'> 					       abilities_size, cmd_details);</div><div class='ctx'> </div><div class='ctx'> 		switch (hw-&gt;aq.asq_last_status) {</div><div class='del'>-		case I40E_AQ_RC_EIO:</div><div class='add'>+		case LIBIE_AQ_RC_EIO:</div><div class='ctx'> 			status = -EIO;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_RC_EAGAIN:</div><div class='add'>+		case LIBIE_AQ_RC_EAGAIN:</div><div class='ctx'> 			usleep_range(1000, 2000);</div><div class='ctx'> 			total_delay++;</div><div class='ctx'> 			status = -EIO;</div><div class='ctx'> 			break;</div><div class='del'>-		/* also covers I40E_AQ_RC_OK */</div><div class='add'>+		/* also covers LIBIE_AQ_RC_OK */</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-	} while ((hw-&gt;aq.asq_last_status == I40E_AQ_RC_EAGAIN) &amp;&amp;</div><div class='add'>+	} while ((hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_EAGAIN) &amp;&amp;</div><div class='ctx'> 		(total_delay &lt; max_delay));</div><div class='ctx'> </div><div class='ctx'> 	if (status)</div><div class='hunk'>@@ -1136,9 +1077,8 @@ int i40e_aq_set_phy_config(struct i40e_hw *hw,</div><div class='ctx'> 			   struct i40e_aq_set_phy_config *config,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aq_set_phy_config *cmd =</div><div class='del'>-			(struct i40e_aq_set_phy_config *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aq_set_phy_config *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (!config)</div><div class='hunk'>@@ -1147,6 +1087,7 @@ int i40e_aq_set_phy_config(struct i40e_hw *hw,</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_phy_config);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	*cmd = *config;</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='hunk'>@@ -1249,6 +1190,40 @@ int i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * i40e_aq_set_mac_config - Configure MAC settings</div><div class='add'>+ * @hw: pointer to the hw struct</div><div class='add'>+ * @max_frame_size: Maximum Frame Size to be supported by the port</div><div class='add'>+ * @cmd_details: pointer to command details structure or NULL</div><div class='add'>+ *</div><div class='add'>+ * Set MAC configuration (0x0603). Note that max_frame_size must be greater</div><div class='add'>+ * than zero.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int i40e_aq_set_mac_config(struct i40e_hw *hw, u16 max_frame_size,</div><div class='add'>+			   struct i40e_asq_cmd_details *cmd_details)</div><div class='add'>+{</div><div class='add'>+	struct i40e_aq_set_mac_config *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	if (max_frame_size == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_set_mac_config);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;max_frame_size = cpu_to_le16(max_frame_size);</div><div class='add'>+	cmd-&gt;params = I40E_AQ_SET_MAC_CONFIG_CRC_EN;</div><div class='add'>+</div><div class='add'>+#define I40E_AQ_SET_MAC_CONFIG_FC_DEFAULT_THRESHOLD	0x7FFF</div><div class='add'>+	cmd-&gt;fc_refresh_threshold =</div><div class='add'>+		cpu_to_le16(I40E_AQ_SET_MAC_CONFIG_FC_DEFAULT_THRESHOLD);</div><div class='add'>+</div><div class='add'>+	return i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * i40e_aq_clear_pxe_mode</div><div class='ctx'>  * @hw: pointer to the hw struct</div><div class='ctx'>  * @cmd_details: pointer to command details structure or NULL</div><div class='hunk'>@@ -1258,14 +1233,14 @@ int i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures,</div><div class='ctx'> int i40e_aq_clear_pxe_mode(struct i40e_hw *hw,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_clear_pxe *cmd =</div><div class='del'>-		(struct i40e_aqc_clear_pxe *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_clear_pxe *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_clear_pxe_mode);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;rx_cnt = 0x2;</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='hunk'>@@ -1287,14 +1262,14 @@ int i40e_aq_set_link_restart_an(struct i40e_hw *hw,</div><div class='ctx'> 				bool enable_link,</div><div class='ctx'> 				struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_link_restart_an *cmd =</div><div class='del'>-		(struct i40e_aqc_set_link_restart_an *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_link_restart_an *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_link_restart_an);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;command = I40E_AQ_PHY_RESTART_AN;</div><div class='ctx'> 	if (enable_link)</div><div class='ctx'> 		cmd-&gt;command |= I40E_AQ_PHY_LINK_ENABLE;</div><div class='hunk'>@@ -1319,16 +1294,16 @@ int i40e_aq_get_link_info(struct i40e_hw *hw,</div><div class='ctx'> 			  bool enable_lse, struct i40e_link_status *link,</div><div class='ctx'> 			  struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_get_link_status *resp =</div><div class='del'>-		(struct i40e_aqc_get_link_status *)&amp;desc.params.raw;</div><div class='ctx'> 	struct i40e_link_status *hw_link_info = &amp;hw-&gt;phy.link_info;</div><div class='add'>+	struct i40e_aqc_get_link_status *resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	bool tx_pause, rx_pause;</div><div class='ctx'> 	u16 command_flags;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_get_link_status);</div><div class='ctx'> </div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (enable_lse)</div><div class='ctx'> 		command_flags = I40E_AQ_LSE_ENABLE;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1414,14 +1389,14 @@ int i40e_aq_set_phy_int_mask(struct i40e_hw *hw,</div><div class='ctx'> 			     u16 mask,</div><div class='ctx'> 			     struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_phy_int_mask *cmd =</div><div class='del'>-		(struct i40e_aqc_set_phy_int_mask *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_phy_int_mask *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_phy_int_mask);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;event_mask = cpu_to_le16(mask);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='hunk'>@@ -1440,11 +1415,11 @@ int i40e_aq_set_phy_int_mask(struct i40e_hw *hw,</div><div class='ctx'> int i40e_aq_set_mac_loopback(struct i40e_hw *hw, bool ena_lpbk,</div><div class='ctx'> 			     struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_lb_mode *cmd =</div><div class='del'>-		(struct i40e_aqc_set_lb_mode *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_lb_mode *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_set_lb_modes);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (ena_lpbk) {</div><div class='ctx'> 		if (hw-&gt;nvm.version &lt;= I40E_LEGACY_LOOPBACK_NVM_VER)</div><div class='ctx'> 			cmd-&gt;lb_mode = cpu_to_le16(I40E_AQ_LB_MAC_LOCAL_LEGACY);</div><div class='hunk'>@@ -1466,14 +1441,14 @@ int i40e_aq_set_mac_loopback(struct i40e_hw *hw, bool ena_lpbk,</div><div class='ctx'> int i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags,</div><div class='ctx'> 			  struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_phy_debug *cmd =</div><div class='del'>-		(struct i40e_aqc_set_phy_debug *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_phy_debug *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_phy_debug);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;command_flags = cmd_flags;</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='hunk'>@@ -1493,23 +1468,22 @@ int i40e_aq_add_vsi(struct i40e_hw *hw,</div><div class='ctx'> 		    struct i40e_vsi_context *vsi_ctx,</div><div class='ctx'> 		    struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_get_update_vsi *cmd =</div><div class='del'>-		(struct i40e_aqc_add_get_update_vsi *)&amp;desc.params.raw;</div><div class='del'>-	struct i40e_aqc_add_get_update_vsi_completion *resp =</div><div class='del'>-		(struct i40e_aqc_add_get_update_vsi_completion *)</div><div class='del'>-		&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_add_get_update_vsi_completion *resp;</div><div class='add'>+	struct i40e_aqc_add_get_update_vsi *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_add_vsi);</div><div class='ctx'> </div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;uplink_seid = cpu_to_le16(vsi_ctx-&gt;uplink_seid);</div><div class='ctx'> 	cmd-&gt;connection_type = vsi_ctx-&gt;connection_type;</div><div class='ctx'> 	cmd-&gt;vf_id = vsi_ctx-&gt;vf_num;</div><div class='ctx'> 	cmd-&gt;vsi_flags = cpu_to_le16(vsi_ctx-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command_atomic(hw, &amp;desc, &amp;vsi_ctx-&gt;info,</div><div class='ctx'> 					      sizeof(vsi_ctx-&gt;info),</div><div class='hunk'>@@ -1537,15 +1511,14 @@ int i40e_aq_set_default_vsi(struct i40e_hw *hw,</div><div class='ctx'> 			    u16 seid,</div><div class='ctx'> 			    struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_vsi_promiscuous_modes *cmd =</div><div class='del'>-		(struct i40e_aqc_set_vsi_promiscuous_modes *)</div><div class='del'>-		&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_vsi_promiscuous_modes *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_vsi_promiscuous_modes);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;promiscuous_flags = cpu_to_le16(I40E_AQC_SET_VSI_DEFAULT);</div><div class='ctx'> 	cmd-&gt;valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_DEFAULT);</div><div class='ctx'> 	cmd-&gt;seid = cpu_to_le16(seid);</div><div class='hunk'>@@ -1565,15 +1538,14 @@ int i40e_aq_clear_default_vsi(struct i40e_hw *hw,</div><div class='ctx'> 			      u16 seid,</div><div class='ctx'> 			      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_vsi_promiscuous_modes *cmd =</div><div class='del'>-		(struct i40e_aqc_set_vsi_promiscuous_modes *)</div><div class='del'>-		&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_vsi_promiscuous_modes *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_vsi_promiscuous_modes);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;promiscuous_flags = cpu_to_le16(0);</div><div class='ctx'> 	cmd-&gt;valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_DEFAULT);</div><div class='ctx'> 	cmd-&gt;seid = cpu_to_le16(seid);</div><div class='hunk'>@@ -1596,15 +1568,15 @@ int i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,</div><div class='ctx'> 					struct i40e_asq_cmd_details *cmd_details,</div><div class='ctx'> 					bool rx_only_promisc)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_vsi_promiscuous_modes *cmd =</div><div class='del'>-		(struct i40e_aqc_set_vsi_promiscuous_modes *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_vsi_promiscuous_modes *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 flags = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					i40e_aqc_opc_set_vsi_promiscuous_modes);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (set) {</div><div class='ctx'> 		flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;</div><div class='ctx'> 		if (rx_only_promisc &amp;&amp; i40e_is_aq_api_ver_ge(hw, 1, 5))</div><div class='hunk'>@@ -1635,15 +1607,15 @@ int i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,</div><div class='ctx'> 					  u16 seid, bool set,</div><div class='ctx'> 					  struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_vsi_promiscuous_modes *cmd =</div><div class='del'>-		(struct i40e_aqc_set_vsi_promiscuous_modes *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_vsi_promiscuous_modes *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 flags = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					i40e_aqc_opc_set_vsi_promiscuous_modes);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (set)</div><div class='ctx'> 		flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;</div><div class='ctx'> </div><div class='hunk'>@@ -1670,15 +1642,15 @@ int i40e_aq_set_vsi_mc_promisc_on_vlan(struct i40e_hw *hw,</div><div class='ctx'> 				       u16 vid,</div><div class='ctx'> 				       struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_vsi_promiscuous_modes *cmd =</div><div class='del'>-		(struct i40e_aqc_set_vsi_promiscuous_modes *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_vsi_promiscuous_modes *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 flags = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_vsi_promiscuous_modes);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (enable)</div><div class='ctx'> 		flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;</div><div class='ctx'> </div><div class='hunk'>@@ -1706,15 +1678,15 @@ int i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw,</div><div class='ctx'> 				       u16 vid,</div><div class='ctx'> 				       struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_vsi_promiscuous_modes *cmd =</div><div class='del'>-		(struct i40e_aqc_set_vsi_promiscuous_modes *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_vsi_promiscuous_modes *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 flags = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_vsi_promiscuous_modes);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;</div><div class='ctx'> 		if (i40e_is_aq_api_ver_ge(hw, 1, 5))</div><div class='hunk'>@@ -1747,9 +1719,8 @@ int i40e_aq_set_vsi_bc_promisc_on_vlan(struct i40e_hw *hw,</div><div class='ctx'> 				       u16 seid, bool enable, u16 vid,</div><div class='ctx'> 				       struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_vsi_promiscuous_modes *cmd =</div><div class='del'>-		(struct i40e_aqc_set_vsi_promiscuous_modes *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_vsi_promiscuous_modes *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 flags = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='hunk'>@@ -1759,6 +1730,7 @@ int i40e_aq_set_vsi_bc_promisc_on_vlan(struct i40e_hw *hw,</div><div class='ctx'> 	if (enable)</div><div class='ctx'> 		flags |= I40E_AQC_SET_VSI_PROMISC_BROADCAST;</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;promiscuous_flags = cpu_to_le16(flags);</div><div class='ctx'> 	cmd-&gt;valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);</div><div class='ctx'> 	cmd-&gt;seid = cpu_to_le16(seid);</div><div class='hunk'>@@ -1782,14 +1754,14 @@ int i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,</div><div class='ctx'> 			      u16 seid, bool set_filter,</div><div class='ctx'> 			      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_vsi_promiscuous_modes *cmd =</div><div class='del'>-		(struct i40e_aqc_set_vsi_promiscuous_modes *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_vsi_promiscuous_modes *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					i40e_aqc_opc_set_vsi_promiscuous_modes);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (set_filter)</div><div class='ctx'> 		cmd-&gt;promiscuous_flags</div><div class='ctx'> 			    |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);</div><div class='hunk'>@@ -1805,37 +1777,6 @@ int i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_aq_set_vsi_vlan_promisc - control the VLAN promiscuous setting</div><div class='del'>- * @hw: pointer to the hw struct</div><div class='del'>- * @seid: vsi number</div><div class='del'>- * @enable: set MAC L2 layer unicast promiscuous enable/disable for a given VLAN</div><div class='del'>- * @cmd_details: pointer to command details structure or NULL</div><div class='del'>- **/</div><div class='del'>-int i40e_aq_set_vsi_vlan_promisc(struct i40e_hw *hw,</div><div class='del'>-				 u16 seid, bool enable,</div><div class='del'>-				 struct i40e_asq_cmd_details *cmd_details)</div><div class='del'>-{</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_vsi_promiscuous_modes *cmd =</div><div class='del'>-		(struct i40e_aqc_set_vsi_promiscuous_modes *)&amp;desc.params.raw;</div><div class='del'>-	u16 flags = 0;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='del'>-					i40e_aqc_opc_set_vsi_promiscuous_modes);</div><div class='del'>-	if (enable)</div><div class='del'>-		flags |= I40E_AQC_SET_VSI_PROMISC_VLAN;</div><div class='del'>-</div><div class='del'>-	cmd-&gt;promiscuous_flags = cpu_to_le16(flags);</div><div class='del'>-	cmd-&gt;valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_VLAN);</div><div class='del'>-	cmd-&gt;seid = cpu_to_le16(seid);</div><div class='del'>-</div><div class='del'>-	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_aq_get_vsi_params - get VSI configuration info</div><div class='ctx'>  * @hw: pointer to the hw struct</div><div class='ctx'>  * @vsi_ctx: pointer to a vsi context struct</div><div class='hunk'>@@ -1845,20 +1786,19 @@ int i40e_aq_get_vsi_params(struct i40e_hw *hw,</div><div class='ctx'> 			   struct i40e_vsi_context *vsi_ctx,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_get_update_vsi *cmd =</div><div class='del'>-		(struct i40e_aqc_add_get_update_vsi *)&amp;desc.params.raw;</div><div class='del'>-	struct i40e_aqc_add_get_update_vsi_completion *resp =</div><div class='del'>-		(struct i40e_aqc_add_get_update_vsi_completion *)</div><div class='del'>-		&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_add_get_update_vsi_completion *resp;</div><div class='add'>+	struct i40e_aqc_add_get_update_vsi *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_get_vsi_parameters);</div><div class='ctx'> </div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;uplink_seid = cpu_to_le16(vsi_ctx-&gt;seid);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, &amp;vsi_ctx-&gt;info,</div><div class='ctx'> 				    sizeof(vsi_ctx-&gt;info), NULL);</div><div class='hunk'>@@ -1887,19 +1827,18 @@ int i40e_aq_update_vsi_params(struct i40e_hw *hw,</div><div class='ctx'> 			      struct i40e_vsi_context *vsi_ctx,</div><div class='ctx'> 			      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_get_update_vsi *cmd =</div><div class='del'>-		(struct i40e_aqc_add_get_update_vsi *)&amp;desc.params.raw;</div><div class='del'>-	struct i40e_aqc_add_get_update_vsi_completion *resp =</div><div class='del'>-		(struct i40e_aqc_add_get_update_vsi_completion *)</div><div class='del'>-		&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_add_get_update_vsi_completion *resp;</div><div class='add'>+	struct i40e_aqc_add_get_update_vsi *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_update_vsi_parameters);</div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;uplink_seid = cpu_to_le16(vsi_ctx-&gt;seid);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command_atomic(hw, &amp;desc, &amp;vsi_ctx-&gt;info,</div><div class='ctx'> 					      sizeof(vsi_ctx-&gt;info),</div><div class='hunk'>@@ -1926,16 +1865,16 @@ int i40e_aq_get_switch_config(struct i40e_hw *hw,</div><div class='ctx'> 			      u16 buf_size, u16 *start_seid,</div><div class='ctx'> 			      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_switch_seid *scfg =</div><div class='del'>-		(struct i40e_aqc_switch_seid *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_switch_seid *scfg;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_get_switch_config);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+	scfg = libie_aq_raw(&amp;desc);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 	if (buf_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 	scfg-&gt;seid = cpu_to_le16(*start_seid);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, buf, buf_size, cmd_details);</div><div class='hunk'>@@ -1960,13 +1899,13 @@ int i40e_aq_set_switch_config(struct i40e_hw *hw,</div><div class='ctx'> 			      u16 valid_flags, u8 mode,</div><div class='ctx'> 			      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_switch_config *scfg =</div><div class='del'>-		(struct i40e_aqc_set_switch_config *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_switch_config *scfg;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_switch_config);</div><div class='add'>+	scfg = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	scfg-&gt;flags = cpu_to_le16(flags);</div><div class='ctx'> 	scfg-&gt;valid_flags = cpu_to_le16(valid_flags);</div><div class='ctx'> 	scfg-&gt;mode = mode;</div><div class='hunk'>@@ -1998,11 +1937,11 @@ int i40e_aq_get_firmware_version(struct i40e_hw *hw,</div><div class='ctx'> 				 u16 *api_major_version, u16 *api_minor_version,</div><div class='ctx'> 				 struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_get_version *resp =</div><div class='del'>-		(struct i40e_aqc_get_version *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_get_version *resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_get_version);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='hunk'>@@ -2035,22 +1974,22 @@ int i40e_aq_send_driver_version(struct i40e_hw *hw,</div><div class='ctx'> 				struct i40e_driver_version *dv,</div><div class='ctx'> 				struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_driver_version *cmd =</div><div class='del'>-		(struct i40e_aqc_driver_version *)&amp;desc.params.raw;</div><div class='add'>+	struct libie_aqc_driver_ver *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	u16 len;</div><div class='ctx'> </div><div class='ctx'> 	if (dv == NULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_driver_version);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD);</div><div class='del'>-	cmd-&gt;driver_major_ver = dv-&gt;major_version;</div><div class='del'>-	cmd-&gt;driver_minor_ver = dv-&gt;minor_version;</div><div class='del'>-	cmd-&gt;driver_build_ver = dv-&gt;build_version;</div><div class='del'>-	cmd-&gt;driver_subbuild_ver = dv-&gt;subbuild_version;</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD);</div><div class='add'>+	cmd-&gt;major_ver = dv-&gt;major_version;</div><div class='add'>+	cmd-&gt;minor_ver = dv-&gt;minor_version;</div><div class='add'>+	cmd-&gt;build_ver = dv-&gt;build_version;</div><div class='add'>+	cmd-&gt;subbuild_ver = dv-&gt;subbuild_version;</div><div class='ctx'> </div><div class='ctx'> 	len = 0;</div><div class='ctx'> 	while (len &lt; sizeof(dv-&gt;driver_string) &amp;&amp;</div><div class='hunk'>@@ -2150,11 +2089,9 @@ int i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,</div><div class='ctx'> 		    bool enable_stats,</div><div class='ctx'> 		    struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_veb *cmd =</div><div class='del'>-		(struct i40e_aqc_add_veb *)&amp;desc.params.raw;</div><div class='del'>-	struct i40e_aqc_add_veb_completion *resp =</div><div class='del'>-		(struct i40e_aqc_add_veb_completion *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_add_veb_completion *resp;</div><div class='add'>+	struct i40e_aqc_add_veb *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 veb_flags = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='hunk'>@@ -2162,6 +2099,8 @@ int i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,</div><div class='ctx'> 	if (!!uplink_seid != !!downlink_seid)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_add_veb);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;uplink_seid = cpu_to_le16(uplink_seid);</div><div class='hunk'>@@ -2208,15 +2147,14 @@ int i40e_aq_get_veb_parameters(struct i40e_hw *hw,</div><div class='ctx'> 			       u16 *vebs_used, u16 *vebs_free,</div><div class='ctx'> 			       struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_get_veb_parameters_completion *cmd_resp =</div><div class='del'>-		(struct i40e_aqc_get_veb_parameters_completion *)</div><div class='del'>-		&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_get_veb_parameters_completion *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (veb_seid == 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	cmd_resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_get_veb_parameters);</div><div class='ctx'> 	cmd_resp-&gt;seid = cpu_to_le16(veb_seid);</div><div class='hunk'>@@ -2258,10 +2196,9 @@ get_veb_exit:</div><div class='ctx'>  **/</div><div class='ctx'> static u16</div><div class='ctx'> i40e_prepare_add_macvlan(struct i40e_aqc_add_macvlan_element_data *mv_list,</div><div class='del'>-			 struct i40e_aq_desc *desc, u16 count, u16 seid)</div><div class='add'>+			 struct libie_aq_desc *desc, u16 count, u16 seid)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aqc_macvlan *cmd =</div><div class='del'>-		(struct i40e_aqc_macvlan *)&amp;desc-&gt;params.raw;</div><div class='add'>+	struct i40e_aqc_macvlan *cmd = libie_aq_raw(desc);</div><div class='ctx'> 	u16 buf_size;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -2279,9 +2216,9 @@ i40e_prepare_add_macvlan(struct i40e_aqc_add_macvlan_element_data *mv_list,</div><div class='ctx'> 			mv_list[i].flags |=</div><div class='ctx'> 			       cpu_to_le16(I40E_AQC_MACVLAN_ADD_USE_SHARED_MAC);</div><div class='ctx'> </div><div class='del'>-	desc-&gt;flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc-&gt;flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 	if (buf_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc-&gt;flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc-&gt;flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	return buf_size;</div><div class='ctx'> }</div><div class='hunk'>@@ -2301,7 +2238,7 @@ i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 		    struct i40e_aqc_add_macvlan_element_data *mv_list,</div><div class='ctx'> 		    u16 count, struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buf_size;</div><div class='ctx'> </div><div class='ctx'> 	if (count == 0 || !mv_list || !hw)</div><div class='hunk'>@@ -2332,9 +2269,9 @@ int</div><div class='ctx'> i40e_aq_add_macvlan_v2(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 		       struct i40e_aqc_add_macvlan_element_data *mv_list,</div><div class='ctx'> 		       u16 count, struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-		       enum i40e_admin_queue_err *aq_status)</div><div class='add'>+		       enum libie_aq_err *aq_status)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buf_size;</div><div class='ctx'> </div><div class='ctx'> 	if (count == 0 || !mv_list || !hw)</div><div class='hunk'>@@ -2361,9 +2298,8 @@ i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 		       struct i40e_aqc_remove_macvlan_element_data *mv_list,</div><div class='ctx'> 		       u16 count, struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_macvlan *cmd =</div><div class='del'>-		(struct i40e_aqc_macvlan *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_macvlan *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buf_size;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='hunk'>@@ -2374,14 +2310,15 @@ i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> </div><div class='ctx'> 	/* prep the rest of the request */</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_remove_macvlan);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;num_addresses = cpu_to_le16(count);</div><div class='ctx'> 	cmd-&gt;seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);</div><div class='ctx'> 	cmd-&gt;seid[1] = 0;</div><div class='ctx'> 	cmd-&gt;seid[2] = 0;</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 	if (buf_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command_atomic(hw, &amp;desc, mv_list, buf_size,</div><div class='ctx'> 					      cmd_details, true);</div><div class='hunk'>@@ -2408,10 +2345,10 @@ int</div><div class='ctx'> i40e_aq_remove_macvlan_v2(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 			  struct i40e_aqc_remove_macvlan_element_data *mv_list,</div><div class='ctx'> 			  u16 count, struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-			  enum i40e_admin_queue_err *aq_status)</div><div class='add'>+			  enum libie_aq_err *aq_status)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_aqc_macvlan *cmd;</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buf_size;</div><div class='ctx'> </div><div class='ctx'> 	if (count == 0 || !mv_list || !hw)</div><div class='hunk'>@@ -2421,151 +2358,21 @@ i40e_aq_remove_macvlan_v2(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> </div><div class='ctx'> 	/* prep the rest of the request */</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_remove_macvlan);</div><div class='del'>-	cmd = (struct i40e_aqc_macvlan *)&amp;desc.params.raw;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;num_addresses = cpu_to_le16(count);</div><div class='ctx'> 	cmd-&gt;seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);</div><div class='ctx'> 	cmd-&gt;seid[1] = 0;</div><div class='ctx'> 	cmd-&gt;seid[2] = 0;</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 	if (buf_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	return i40e_asq_send_command_atomic_v2(hw, &amp;desc, mv_list, buf_size,</div><div class='ctx'> 						 cmd_details, true, aq_status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_mirrorrule_op - Internal helper function to add/delete mirror rule</div><div class='del'>- * @hw: pointer to the hw struct</div><div class='del'>- * @opcode: AQ opcode for add or delete mirror rule</div><div class='del'>- * @sw_seid: Switch SEID (to which rule refers)</div><div class='del'>- * @rule_type: Rule Type (ingress/egress/VLAN)</div><div class='del'>- * @id: Destination VSI SEID or Rule ID</div><div class='del'>- * @count: length of the list</div><div class='del'>- * @mr_list: list of mirrored VSI SEIDs or VLAN IDs</div><div class='del'>- * @cmd_details: pointer to command details structure or NULL</div><div class='del'>- * @rule_id: Rule ID returned from FW</div><div class='del'>- * @rules_used: Number of rules used in internal switch</div><div class='del'>- * @rules_free: Number of rules free in internal switch</div><div class='del'>- *</div><div class='del'>- * Add/Delete a mirror rule to a specific switch. Mirror rules are supported for</div><div class='del'>- * VEBs/VEPA elements only</div><div class='del'>- **/</div><div class='del'>-static int i40e_mirrorrule_op(struct i40e_hw *hw,</div><div class='del'>-			      u16 opcode, u16 sw_seid, u16 rule_type, u16 id,</div><div class='del'>-			      u16 count, __le16 *mr_list,</div><div class='del'>-			      struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-			      u16 *rule_id, u16 *rules_used, u16 *rules_free)</div><div class='del'>-{</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_delete_mirror_rule *cmd =</div><div class='del'>-		(struct i40e_aqc_add_delete_mirror_rule *)&amp;desc.params.raw;</div><div class='del'>-	struct i40e_aqc_add_delete_mirror_rule_completion *resp =</div><div class='del'>-	(struct i40e_aqc_add_delete_mirror_rule_completion *)&amp;desc.params.raw;</div><div class='del'>-	u16 buf_size;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	buf_size = count * sizeof(*mr_list);</div><div class='del'>-</div><div class='del'>-	/* prep the rest of the request */</div><div class='del'>-	i40e_fill_default_direct_cmd_desc(&amp;desc, opcode);</div><div class='del'>-	cmd-&gt;seid = cpu_to_le16(sw_seid);</div><div class='del'>-	cmd-&gt;rule_type = cpu_to_le16(rule_type &amp;</div><div class='del'>-				     I40E_AQC_MIRROR_RULE_TYPE_MASK);</div><div class='del'>-	cmd-&gt;num_entries = cpu_to_le16(count);</div><div class='del'>-	/* Dest VSI for add, rule_id for delete */</div><div class='del'>-	cmd-&gt;destination = cpu_to_le16(id);</div><div class='del'>-	if (mr_list) {</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |</div><div class='del'>-						I40E_AQ_FLAG_RD));</div><div class='del'>-		if (buf_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-			desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	status = i40e_asq_send_command(hw, &amp;desc, mr_list, buf_size,</div><div class='del'>-				       cmd_details);</div><div class='del'>-	if (!status ||</div><div class='del'>-	    hw-&gt;aq.asq_last_status == I40E_AQ_RC_ENOSPC) {</div><div class='del'>-		if (rule_id)</div><div class='del'>-			*rule_id = le16_to_cpu(resp-&gt;rule_id);</div><div class='del'>-		if (rules_used)</div><div class='del'>-			*rules_used = le16_to_cpu(resp-&gt;mirror_rules_used);</div><div class='del'>-		if (rules_free)</div><div class='del'>-			*rules_free = le16_to_cpu(resp-&gt;mirror_rules_free);</div><div class='del'>-	}</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i40e_aq_add_mirrorrule - add a mirror rule</div><div class='del'>- * @hw: pointer to the hw struct</div><div class='del'>- * @sw_seid: Switch SEID (to which rule refers)</div><div class='del'>- * @rule_type: Rule Type (ingress/egress/VLAN)</div><div class='del'>- * @dest_vsi: SEID of VSI to which packets will be mirrored</div><div class='del'>- * @count: length of the list</div><div class='del'>- * @mr_list: list of mirrored VSI SEIDs or VLAN IDs</div><div class='del'>- * @cmd_details: pointer to command details structure or NULL</div><div class='del'>- * @rule_id: Rule ID returned from FW</div><div class='del'>- * @rules_used: Number of rules used in internal switch</div><div class='del'>- * @rules_free: Number of rules free in internal switch</div><div class='del'>- *</div><div class='del'>- * Add mirror rule. Mirror rules are supported for VEBs or VEPA elements only</div><div class='del'>- **/</div><div class='del'>-int i40e_aq_add_mirrorrule(struct i40e_hw *hw, u16 sw_seid,</div><div class='del'>-			   u16 rule_type, u16 dest_vsi, u16 count,</div><div class='del'>-			   __le16 *mr_list,</div><div class='del'>-			   struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-			   u16 *rule_id, u16 *rules_used, u16 *rules_free)</div><div class='del'>-{</div><div class='del'>-	if (!(rule_type == I40E_AQC_MIRROR_RULE_TYPE_ALL_INGRESS ||</div><div class='del'>-	    rule_type == I40E_AQC_MIRROR_RULE_TYPE_ALL_EGRESS)) {</div><div class='del'>-		if (count == 0 || !mr_list)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return i40e_mirrorrule_op(hw, i40e_aqc_opc_add_mirror_rule, sw_seid,</div><div class='del'>-				  rule_type, dest_vsi, count, mr_list,</div><div class='del'>-				  cmd_details, rule_id, rules_used, rules_free);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i40e_aq_delete_mirrorrule - delete a mirror rule</div><div class='del'>- * @hw: pointer to the hw struct</div><div class='del'>- * @sw_seid: Switch SEID (to which rule refers)</div><div class='del'>- * @rule_type: Rule Type (ingress/egress/VLAN)</div><div class='del'>- * @count: length of the list</div><div class='del'>- * @rule_id: Rule ID that is returned in the receive desc as part of</div><div class='del'>- *		add_mirrorrule.</div><div class='del'>- * @mr_list: list of mirrored VLAN IDs to be removed</div><div class='del'>- * @cmd_details: pointer to command details structure or NULL</div><div class='del'>- * @rules_used: Number of rules used in internal switch</div><div class='del'>- * @rules_free: Number of rules free in internal switch</div><div class='del'>- *</div><div class='del'>- * Delete a mirror rule. Mirror rules are supported for VEBs/VEPA elements only</div><div class='del'>- **/</div><div class='del'>-int i40e_aq_delete_mirrorrule(struct i40e_hw *hw, u16 sw_seid,</div><div class='del'>-			      u16 rule_type, u16 rule_id, u16 count,</div><div class='del'>-			      __le16 *mr_list,</div><div class='del'>-			      struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-			      u16 *rules_used, u16 *rules_free)</div><div class='del'>-{</div><div class='del'>-	/* Rule ID has to be valid except rule_type: INGRESS VLAN mirroring */</div><div class='del'>-	if (rule_type == I40E_AQC_MIRROR_RULE_TYPE_VLAN) {</div><div class='del'>-		/* count and mr_list shall be valid for rule_type INGRESS VLAN</div><div class='del'>-		 * mirroring. For other rule_type, count and rule_type should</div><div class='del'>-		 * not matter.</div><div class='del'>-		 */</div><div class='del'>-		if (count == 0 || !mr_list)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return i40e_mirrorrule_op(hw, i40e_aqc_opc_delete_mirror_rule, sw_seid,</div><div class='del'>-				  rule_type, rule_id, count, mr_list,</div><div class='del'>-				  cmd_details, NULL, rules_used, rules_free);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_aq_send_msg_to_vf</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='ctx'>  * @vfid: VF id to send msg</div><div class='hunk'>@@ -2581,21 +2388,21 @@ int i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,</div><div class='ctx'> 			   u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_pf_vf_message *cmd =</div><div class='del'>-		(struct i40e_aqc_pf_vf_message *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_pf_vf_message *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_send_msg_to_vf);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;id = cpu_to_le32(vfid);</div><div class='ctx'> 	desc.cookie_high = cpu_to_le32(v_opcode);</div><div class='ctx'> 	desc.cookie_low = cpu_to_le32(v_retval);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_SI);</div><div class='ctx'> 	if (msglen) {</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |</div><div class='del'>-						I40E_AQ_FLAG_RD));</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF |</div><div class='add'>+						LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 		if (msglen &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-			desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+			desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 		desc.datalen = cpu_to_le16(msglen);</div><div class='ctx'> 	}</div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, msg, msglen, cmd_details);</div><div class='hunk'>@@ -2616,9 +2423,8 @@ int i40e_aq_debug_read_register(struct i40e_hw *hw,</div><div class='ctx'> 				u32 reg_addr, u64 *reg_val,</div><div class='ctx'> 				struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_debug_reg_read_write *cmd_resp =</div><div class='del'>-		(struct i40e_aqc_debug_reg_read_write *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_debug_reg_read_write *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (reg_val == NULL)</div><div class='hunk'>@@ -2626,6 +2432,7 @@ int i40e_aq_debug_read_register(struct i40e_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_debug_read_reg);</div><div class='ctx'> </div><div class='add'>+	cmd_resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd_resp-&gt;address = cpu_to_le32(reg_addr);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='hunk'>@@ -2651,13 +2458,13 @@ int i40e_aq_debug_write_register(struct i40e_hw *hw,</div><div class='ctx'> 				 u32 reg_addr, u64 reg_val,</div><div class='ctx'> 				 struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_debug_reg_read_write *cmd =</div><div class='del'>-		(struct i40e_aqc_debug_reg_read_write *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_debug_reg_read_write *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_debug_write_reg);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;address = cpu_to_le32(reg_addr);</div><div class='ctx'> 	cmd-&gt;value_high = cpu_to_le32((u32)(reg_val &gt;&gt; 32));</div><div class='ctx'> 	cmd-&gt;value_low = cpu_to_le32((u32)(reg_val &amp; 0xFFFFFFFF));</div><div class='hunk'>@@ -2684,16 +2491,16 @@ int i40e_aq_request_resource(struct i40e_hw *hw,</div><div class='ctx'> 			     u8 sdp_number, u64 *timeout,</div><div class='ctx'> 			     struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_request_resource *cmd_resp =</div><div class='del'>-		(struct i40e_aqc_request_resource *)&amp;desc.params.raw;</div><div class='add'>+	struct libie_aqc_req_res *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_request_resource);</div><div class='ctx'> </div><div class='del'>-	cmd_resp-&gt;resource_id = cpu_to_le16(resource);</div><div class='add'>+	cmd_resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd_resp-&gt;res_id = cpu_to_le16(resource);</div><div class='ctx'> 	cmd_resp-&gt;access_type = cpu_to_le16(access);</div><div class='del'>-	cmd_resp-&gt;resource_number = cpu_to_le32(sdp_number);</div><div class='add'>+	cmd_resp-&gt;res_number = cpu_to_le32(sdp_number);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='ctx'> 	/* The completion specifies the maximum time in ms that the driver</div><div class='hunk'>@@ -2702,7 +2509,7 @@ int i40e_aq_request_resource(struct i40e_hw *hw,</div><div class='ctx'> 	 * busy return value and the timeout field indicates the maximum time</div><div class='ctx'> 	 * the current owner of the resource has to free it.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!status || hw-&gt;aq.asq_last_status == I40E_AQ_RC_EBUSY)</div><div class='add'>+	if (!status || hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_EBUSY)</div><div class='ctx'> 		*timeout = le32_to_cpu(cmd_resp-&gt;timeout);</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='hunk'>@@ -2722,15 +2529,15 @@ int i40e_aq_release_resource(struct i40e_hw *hw,</div><div class='ctx'> 			     u8 sdp_number,</div><div class='ctx'> 			     struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_request_resource *cmd =</div><div class='del'>-		(struct i40e_aqc_request_resource *)&amp;desc.params.raw;</div><div class='add'>+	struct libie_aqc_req_res *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_release_resource);</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;resource_id = cpu_to_le16(resource);</div><div class='del'>-	cmd-&gt;resource_number = cpu_to_le32(sdp_number);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd-&gt;res_id = cpu_to_le16(resource);</div><div class='add'>+	cmd-&gt;res_number = cpu_to_le32(sdp_number);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='ctx'> </div><div class='hunk'>@@ -2754,9 +2561,8 @@ int i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,</div><div class='ctx'> 		     bool last_command,</div><div class='ctx'> 		     struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_nvm_update *cmd =</div><div class='del'>-		(struct i40e_aqc_nvm_update *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_nvm_update *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	/* In offset the highest byte must be zeroed. */</div><div class='hunk'>@@ -2767,6 +2573,7 @@ int i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_nvm_read);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	/* If this is the last command in a series, set the proper flag. */</div><div class='ctx'> 	if (last_command)</div><div class='ctx'> 		cmd-&gt;command_flags |= I40E_AQ_NVM_LAST_CMD;</div><div class='hunk'>@@ -2774,9 +2581,9 @@ int i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,</div><div class='ctx'> 	cmd-&gt;offset = cpu_to_le32(offset);</div><div class='ctx'> 	cmd-&gt;length = cpu_to_le16(length);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 	if (length &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, data, length, cmd_details);</div><div class='ctx'> </div><div class='hunk'>@@ -2799,9 +2606,8 @@ int i40e_aq_erase_nvm(struct i40e_hw *hw, u8 module_pointer,</div><div class='ctx'> 		      u32 offset, u16 length, bool last_command,</div><div class='ctx'> 		      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_nvm_update *cmd =</div><div class='del'>-		(struct i40e_aqc_nvm_update *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_nvm_update *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	/* In offset the highest byte must be zeroed. */</div><div class='hunk'>@@ -2812,6 +2618,7 @@ int i40e_aq_erase_nvm(struct i40e_hw *hw, u8 module_pointer,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_nvm_erase);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	/* If this is the last command in a series, set the proper flag. */</div><div class='ctx'> 	if (last_command)</div><div class='ctx'> 		cmd-&gt;command_flags |= I40E_AQ_NVM_LAST_CMD;</div><div class='hunk'>@@ -2838,7 +2645,7 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,</div><div class='ctx'> 				     u32 cap_count,</div><div class='ctx'> 				     enum i40e_admin_queue_opc list_type_opc)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aqc_list_capabilities_element_resp *cap;</div><div class='add'>+	struct libie_aqc_list_caps_elem *cap;</div><div class='ctx'> 	u32 valid_functions, num_functions;</div><div class='ctx'> 	u32 number, logical_id, phys_id;</div><div class='ctx'> 	struct i40e_hw_capabilities *p;</div><div class='hunk'>@@ -2847,7 +2654,7 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,</div><div class='ctx'> 	int status;</div><div class='ctx'> 	u32 i = 0;</div><div class='ctx'> </div><div class='del'>-	cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;</div><div class='add'>+	cap = (struct libie_aqc_list_caps_elem *)buff;</div><div class='ctx'> </div><div class='ctx'> 	if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)</div><div class='ctx'> 		p = &amp;hw-&gt;dev_caps;</div><div class='hunk'>@@ -2857,17 +2664,17 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; cap_count; i++, cap++) {</div><div class='del'>-		id = le16_to_cpu(cap-&gt;id);</div><div class='add'>+		id = le16_to_cpu(cap-&gt;cap);</div><div class='ctx'> 		number = le32_to_cpu(cap-&gt;number);</div><div class='ctx'> 		logical_id = le32_to_cpu(cap-&gt;logical_id);</div><div class='ctx'> 		phys_id = le32_to_cpu(cap-&gt;phys_id);</div><div class='del'>-		major_rev = cap-&gt;major_rev;</div><div class='add'>+		major_rev = cap-&gt;major_ver;</div><div class='ctx'> </div><div class='ctx'> 		switch (id) {</div><div class='del'>-		case I40E_AQ_CAP_ID_SWITCH_MODE:</div><div class='add'>+		case LIBIE_AQC_CAPS_SWITCH_MODE:</div><div class='ctx'> 			p-&gt;switch_mode = number;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_MNG_MODE:</div><div class='add'>+		case LIBIE_AQC_CAPS_MNG_MODE:</div><div class='ctx'> 			p-&gt;management_mode = number;</div><div class='ctx'> 			if (major_rev &gt; 1) {</div><div class='ctx'> 				p-&gt;mng_protocols_over_mctp = logical_id;</div><div class='hunk'>@@ -2878,76 +2685,76 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,</div><div class='ctx'> 				p-&gt;mng_protocols_over_mctp = 0;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_NPAR_ACTIVE:</div><div class='add'>+		case LIBIE_AQC_CAPS_NPAR_ACTIVE:</div><div class='ctx'> 			p-&gt;npar_enable = number;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_OS2BMC_CAP:</div><div class='add'>+		case LIBIE_AQC_CAPS_OS2BMC_CAP:</div><div class='ctx'> 			p-&gt;os2bmc = number;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_FUNCTIONS_VALID:</div><div class='add'>+		case LIBIE_AQC_CAPS_VALID_FUNCTIONS:</div><div class='ctx'> 			p-&gt;valid_functions = number;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_SRIOV:</div><div class='add'>+		case LIBIE_AQC_CAPS_SRIOV:</div><div class='ctx'> 			if (number == 1)</div><div class='ctx'> 				p-&gt;sr_iov_1_1 = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_VF:</div><div class='add'>+		case LIBIE_AQC_CAPS_VF:</div><div class='ctx'> 			p-&gt;num_vfs = number;</div><div class='ctx'> 			p-&gt;vf_base_id = logical_id;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_VMDQ:</div><div class='add'>+		case LIBIE_AQC_CAPS_VMDQ:</div><div class='ctx'> 			if (number == 1)</div><div class='ctx'> 				p-&gt;vmdq = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_8021QBG:</div><div class='add'>+		case LIBIE_AQC_CAPS_8021QBG:</div><div class='ctx'> 			if (number == 1)</div><div class='ctx'> 				p-&gt;evb_802_1_qbg = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_8021QBR:</div><div class='add'>+		case LIBIE_AQC_CAPS_8021QBR:</div><div class='ctx'> 			if (number == 1)</div><div class='ctx'> 				p-&gt;evb_802_1_qbh = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_VSI:</div><div class='add'>+		case LIBIE_AQC_CAPS_VSI:</div><div class='ctx'> 			p-&gt;num_vsis = number;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_DCB:</div><div class='add'>+		case LIBIE_AQC_CAPS_DCB:</div><div class='ctx'> 			if (number == 1) {</div><div class='ctx'> 				p-&gt;dcb = true;</div><div class='ctx'> 				p-&gt;enabled_tcmap = logical_id;</div><div class='ctx'> 				p-&gt;maxtc = phys_id;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_FCOE:</div><div class='add'>+		case LIBIE_AQC_CAPS_FCOE:</div><div class='ctx'> 			if (number == 1)</div><div class='ctx'> 				p-&gt;fcoe = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_ISCSI:</div><div class='add'>+		case LIBIE_AQC_CAPS_ISCSI:</div><div class='ctx'> 			if (number == 1)</div><div class='ctx'> 				p-&gt;iscsi = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_RSS:</div><div class='add'>+		case LIBIE_AQC_CAPS_RSS:</div><div class='ctx'> 			p-&gt;rss = true;</div><div class='ctx'> 			p-&gt;rss_table_size = number;</div><div class='ctx'> 			p-&gt;rss_table_entry_width = logical_id;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_RXQ:</div><div class='add'>+		case LIBIE_AQC_CAPS_RXQS:</div><div class='ctx'> 			p-&gt;num_rx_qp = number;</div><div class='ctx'> 			p-&gt;base_queue = phys_id;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_TXQ:</div><div class='add'>+		case LIBIE_AQC_CAPS_TXQS:</div><div class='ctx'> 			p-&gt;num_tx_qp = number;</div><div class='ctx'> 			p-&gt;base_queue = phys_id;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_MSIX:</div><div class='add'>+		case LIBIE_AQC_CAPS_MSIX:</div><div class='ctx'> 			p-&gt;num_msix_vectors = number;</div><div class='ctx'> 			i40e_debug(hw, I40E_DEBUG_INIT,</div><div class='ctx'> 				   "HW Capability: MSIX vector count = %d\n",</div><div class='ctx'> 				   p-&gt;num_msix_vectors);</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_VF_MSIX:</div><div class='add'>+		case LIBIE_AQC_CAPS_VF_MSIX:</div><div class='ctx'> 			p-&gt;num_msix_vectors_vf = number;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_FLEX10:</div><div class='add'>+		case LIBIE_AQC_CAPS_FLEX10:</div><div class='ctx'> 			if (major_rev == 1) {</div><div class='ctx'> 				if (number == 1) {</div><div class='ctx'> 					p-&gt;flex10_enable = true;</div><div class='hunk'>@@ -2963,42 +2770,42 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,</div><div class='ctx'> 			p-&gt;flex10_mode = logical_id;</div><div class='ctx'> 			p-&gt;flex10_status = phys_id;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_CEM:</div><div class='add'>+		case LIBIE_AQC_CAPS_CEM:</div><div class='ctx'> 			if (number == 1)</div><div class='ctx'> 				p-&gt;mgmt_cem = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_IWARP:</div><div class='add'>+		case LIBIE_AQC_CAPS_RDMA:</div><div class='ctx'> 			if (number == 1)</div><div class='ctx'> 				p-&gt;iwarp = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_LED:</div><div class='add'>+		case LIBIE_AQC_CAPS_LED:</div><div class='ctx'> 			if (phys_id &lt; I40E_HW_CAP_MAX_GPIO)</div><div class='ctx'> 				p-&gt;led[phys_id] = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_SDP:</div><div class='add'>+		case LIBIE_AQC_CAPS_SDP:</div><div class='ctx'> 			if (phys_id &lt; I40E_HW_CAP_MAX_GPIO)</div><div class='ctx'> 				p-&gt;sdp[phys_id] = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_MDIO:</div><div class='add'>+		case LIBIE_AQC_CAPS_MDIO:</div><div class='ctx'> 			if (number == 1) {</div><div class='ctx'> 				p-&gt;mdio_port_num = phys_id;</div><div class='ctx'> 				p-&gt;mdio_port_mode = logical_id;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_1588:</div><div class='add'>+		case LIBIE_AQC_CAPS_1588:</div><div class='ctx'> 			if (number == 1)</div><div class='ctx'> 				p-&gt;ieee_1588 = true;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_FLOW_DIRECTOR:</div><div class='add'>+		case LIBIE_AQC_CAPS_FD:</div><div class='ctx'> 			p-&gt;fd = true;</div><div class='ctx'> 			p-&gt;fd_filters_guaranteed = number;</div><div class='ctx'> 			p-&gt;fd_filters_best_effort = logical_id;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_WSR_PROT:</div><div class='add'>+		case LIBIE_AQC_CAPS_WSR_PROT:</div><div class='ctx'> 			p-&gt;wr_csr_prot = (u64)number;</div><div class='ctx'> 			p-&gt;wr_csr_prot |= (u64)logical_id &lt;&lt; 32;</div><div class='ctx'> 			break;</div><div class='del'>-		case I40E_AQ_CAP_ID_NVM_MGMT:</div><div class='add'>+		case LIBIE_AQC_CAPS_NVM_MGMT:</div><div class='ctx'> 			if (number &amp; I40E_NVM_MGMT_SEC_REV_DISABLED)</div><div class='ctx'> 				p-&gt;sec_rev_disabled = true;</div><div class='ctx'> 			if (number &amp; I40E_NVM_MGMT_UPDATE_DISABLED)</div><div class='hunk'>@@ -3090,11 +2897,11 @@ int i40e_aq_discover_capabilities(struct i40e_hw *hw,</div><div class='ctx'> 				  enum i40e_admin_queue_opc list_type_opc,</div><div class='ctx'> 				  struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aqc_list_capabilites *cmd;</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aqc_list_caps *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status = 0;</div><div class='ctx'> </div><div class='del'>-	cmd = (struct i40e_aqc_list_capabilites *)&amp;desc.params.raw;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	if (list_type_opc != i40e_aqc_opc_list_func_capabilities &amp;&amp;</div><div class='ctx'> 		list_type_opc != i40e_aqc_opc_list_dev_capabilities) {</div><div class='hunk'>@@ -3104,9 +2911,9 @@ int i40e_aq_discover_capabilities(struct i40e_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, list_type_opc);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 	if (buff_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, buff, buff_size, cmd_details);</div><div class='ctx'> 	*data_size = le16_to_cpu(desc.datalen);</div><div class='hunk'>@@ -3139,9 +2946,8 @@ int i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,</div><div class='ctx'> 		       bool last_command, u8 preservation_flags,</div><div class='ctx'> 		       struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_nvm_update *cmd =</div><div class='del'>-		(struct i40e_aqc_nvm_update *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_nvm_update *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	/* In offset the highest byte must be zeroed. */</div><div class='hunk'>@@ -3152,6 +2958,7 @@ int i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_nvm_update);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	/* If this is the last command in a series, set the proper flag. */</div><div class='ctx'> 	if (last_command)</div><div class='ctx'> 		cmd-&gt;command_flags |= I40E_AQ_NVM_LAST_CMD;</div><div class='hunk'>@@ -3169,9 +2976,9 @@ int i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,</div><div class='ctx'> 	cmd-&gt;offset = cpu_to_le32(offset);</div><div class='ctx'> 	cmd-&gt;length = cpu_to_le16(length);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 	if (length &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, data, length, cmd_details);</div><div class='ctx'> </div><div class='hunk'>@@ -3180,41 +2987,6 @@ i40e_aq_update_nvm_exit:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_aq_rearrange_nvm</div><div class='del'>- * @hw: pointer to the hw struct</div><div class='del'>- * @rearrange_nvm: defines direction of rearrangement</div><div class='del'>- * @cmd_details: pointer to command details structure or NULL</div><div class='del'>- *</div><div class='del'>- * Rearrange NVM structure, available only for transition FW</div><div class='del'>- **/</div><div class='del'>-int i40e_aq_rearrange_nvm(struct i40e_hw *hw,</div><div class='del'>-			  u8 rearrange_nvm,</div><div class='del'>-			  struct i40e_asq_cmd_details *cmd_details)</div><div class='del'>-{</div><div class='del'>-	struct i40e_aqc_nvm_update *cmd;</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	cmd = (struct i40e_aqc_nvm_update *)&amp;desc.params.raw;</div><div class='del'>-</div><div class='del'>-	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_nvm_update);</div><div class='del'>-</div><div class='del'>-	rearrange_nvm &amp;= (I40E_AQ_NVM_REARRANGE_TO_FLAT |</div><div class='del'>-			 I40E_AQ_NVM_REARRANGE_TO_STRUCT);</div><div class='del'>-</div><div class='del'>-	if (!rearrange_nvm) {</div><div class='del'>-		status = -EINVAL;</div><div class='del'>-		goto i40e_aq_rearrange_nvm_exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cmd-&gt;command_flags |= rearrange_nvm;</div><div class='del'>-	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='del'>-</div><div class='del'>-i40e_aq_rearrange_nvm_exit:</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_aq_get_lldp_mib</div><div class='ctx'>  * @hw: pointer to the hw struct</div><div class='ctx'>  * @bridge_type: type of bridge requested</div><div class='hunk'>@@ -3232,11 +3004,9 @@ int i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,</div><div class='ctx'> 			 u16 *local_len, u16 *remote_len,</div><div class='ctx'> 			 struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_lldp_get_mib *cmd =</div><div class='del'>-		(struct i40e_aqc_lldp_get_mib *)&amp;desc.params.raw;</div><div class='del'>-	struct i40e_aqc_lldp_get_mib *resp =</div><div class='del'>-		(struct i40e_aqc_lldp_get_mib *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_lldp_get_mib *resp;</div><div class='add'>+	struct i40e_aqc_lldp_get_mib *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (buff_size == 0 || !buff)</div><div class='hunk'>@@ -3244,16 +3014,18 @@ int i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_lldp_get_mib);</div><div class='ctx'> 	/* Indirect Command */</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> </div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;type = mib_type &amp; I40E_AQ_LLDP_MIB_TYPE_MASK;</div><div class='ctx'> 	cmd-&gt;type |= FIELD_PREP(I40E_AQ_LLDP_BRIDGE_TYPE_MASK, bridge_type);</div><div class='ctx'> </div><div class='ctx'> 	desc.datalen = cpu_to_le16(buff_size);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 	if (buff_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, buff, buff_size, cmd_details);</div><div class='ctx'> 	if (!status) {</div><div class='hunk'>@@ -3282,19 +3054,19 @@ i40e_aq_set_lldp_mib(struct i40e_hw *hw,</div><div class='ctx'> 		     struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_aqc_lldp_set_local_mib *cmd;</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = (struct i40e_aqc_lldp_set_local_mib *)&amp;desc.params.raw;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (buff_size == 0 || !buff)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_lldp_set_local_mib);</div><div class='ctx'> 	/* Indirect Command */</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 	if (buff_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 	desc.datalen = cpu_to_le16(buff_size);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;type = mib_type;</div><div class='hunk'>@@ -3319,13 +3091,13 @@ int i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,</div><div class='ctx'> 				      bool enable_update,</div><div class='ctx'> 				      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_lldp_update_mib *cmd =</div><div class='del'>-		(struct i40e_aqc_lldp_update_mib *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_lldp_update_mib *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_lldp_update_mib);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (!enable_update)</div><div class='ctx'> 		cmd-&gt;command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;</div><div class='ctx'> </div><div class='hunk'>@@ -3335,44 +3107,6 @@ int i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_aq_restore_lldp</div><div class='del'>- * @hw: pointer to the hw struct</div><div class='del'>- * @setting: pointer to factory setting variable or NULL</div><div class='del'>- * @restore: True if factory settings should be restored</div><div class='del'>- * @cmd_details: pointer to command details structure or NULL</div><div class='del'>- *</div><div class='del'>- * Restore LLDP Agent factory settings if @restore set to True. In other case</div><div class='del'>- * only returns factory setting in AQ response.</div><div class='del'>- **/</div><div class='del'>-int</div><div class='del'>-i40e_aq_restore_lldp(struct i40e_hw *hw, u8 *setting, bool restore,</div><div class='del'>-		     struct i40e_asq_cmd_details *cmd_details)</div><div class='del'>-{</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_lldp_restore *cmd =</div><div class='del'>-		(struct i40e_aqc_lldp_restore *)&amp;desc.params.raw;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(I40E_HW_CAP_FW_LLDP_PERSISTENT, hw-&gt;caps)) {</div><div class='del'>-		i40e_debug(hw, I40E_DEBUG_ALL,</div><div class='del'>-			   "Restore LLDP not supported by current FW version.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_lldp_restore);</div><div class='del'>-</div><div class='del'>-	if (restore)</div><div class='del'>-		cmd-&gt;command |= I40E_AQ_LLDP_AGENT_RESTORE;</div><div class='del'>-</div><div class='del'>-	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='del'>-</div><div class='del'>-	if (setting)</div><div class='del'>-		*setting = cmd-&gt;command &amp; 1;</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_aq_stop_lldp</div><div class='ctx'>  * @hw: pointer to the hw struct</div><div class='ctx'>  * @shutdown_agent: True if LLDP Agent needs to be Shutdown</div><div class='hunk'>@@ -3385,13 +3119,13 @@ int i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,</div><div class='ctx'> 		      bool persist,</div><div class='ctx'> 		      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_lldp_stop *cmd =</div><div class='del'>-		(struct i40e_aqc_lldp_stop *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_lldp_stop *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_lldp_stop);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (shutdown_agent)</div><div class='ctx'> 		cmd-&gt;command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;</div><div class='ctx'> </div><div class='hunk'>@@ -3419,13 +3153,13 @@ int i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,</div><div class='ctx'> int i40e_aq_start_lldp(struct i40e_hw *hw, bool persist,</div><div class='ctx'> 		       struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_lldp_start *cmd =</div><div class='del'>-		(struct i40e_aqc_lldp_start *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_lldp_start *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_lldp_start);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;command = I40E_AQ_LLDP_AGENT_START;</div><div class='ctx'> </div><div class='ctx'> 	if (persist) {</div><div class='hunk'>@@ -3452,9 +3186,8 @@ int</div><div class='ctx'> i40e_aq_set_dcb_parameters(struct i40e_hw *hw, bool dcb_enable,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_set_dcb_parameters *cmd =</div><div class='del'>-		(struct i40e_aqc_set_dcb_parameters *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_set_dcb_parameters *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, hw-&gt;caps))</div><div class='hunk'>@@ -3463,6 +3196,7 @@ i40e_aq_set_dcb_parameters(struct i40e_hw *hw, bool dcb_enable,</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_dcb_parameters);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (dcb_enable) {</div><div class='ctx'> 		cmd-&gt;valid_flags = I40E_DCB_VALID;</div><div class='ctx'> 		cmd-&gt;command = I40E_AQ_DCB_SET_AGENT;</div><div class='hunk'>@@ -3485,7 +3219,7 @@ int i40e_aq_get_cee_dcb_config(struct i40e_hw *hw,</div><div class='ctx'> 			       void *buff, u16 buff_size,</div><div class='ctx'> 			       struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (buff_size == 0 || !buff)</div><div class='hunk'>@@ -3493,7 +3227,7 @@ int i40e_aq_get_cee_dcb_config(struct i40e_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_get_cee_dcb_cfg);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, (void *)buff, buff_size,</div><div class='ctx'> 				       cmd_details);</div><div class='ctx'> </div><div class='hunk'>@@ -3517,15 +3251,15 @@ int i40e_aq_add_udp_tunnel(struct i40e_hw *hw,</div><div class='ctx'> 			   u8 *filter_index,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_udp_tunnel *cmd =</div><div class='del'>-		(struct i40e_aqc_add_udp_tunnel *)&amp;desc.params.raw;</div><div class='del'>-	struct i40e_aqc_del_udp_tunnel_completion *resp =</div><div class='del'>-		(struct i40e_aqc_del_udp_tunnel_completion *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_del_udp_tunnel_completion *resp;</div><div class='add'>+	struct i40e_aqc_add_udp_tunnel *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_add_udp_tunnel);</div><div class='ctx'> </div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;udp_port = cpu_to_le16(udp_port);</div><div class='ctx'> 	cmd-&gt;protocol_type = protocol_index;</div><div class='ctx'> </div><div class='hunk'>@@ -3546,13 +3280,13 @@ int i40e_aq_add_udp_tunnel(struct i40e_hw *hw,</div><div class='ctx'> int i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_remove_udp_tunnel *cmd =</div><div class='del'>-		(struct i40e_aqc_remove_udp_tunnel *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_remove_udp_tunnel *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_del_udp_tunnel);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;index = index;</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='hunk'>@@ -3571,9 +3305,8 @@ int i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index,</div><div class='ctx'> int i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_switch_seid *cmd =</div><div class='del'>-		(struct i40e_aqc_switch_seid *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_switch_seid *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (seid == 0)</div><div class='hunk'>@@ -3581,6 +3314,7 @@ int i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_delete_element);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;seid = cpu_to_le16(seid);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command_atomic(hw, &amp;desc, NULL, 0,</div><div class='hunk'>@@ -3601,7 +3335,7 @@ int i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> int i40e_aq_dcb_updated(struct i40e_hw *hw,</div><div class='ctx'> 			struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_dcb_updated);</div><div class='hunk'>@@ -3627,9 +3361,8 @@ static int i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 				enum i40e_admin_queue_opc opcode,</div><div class='ctx'> 				struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_tx_sched_ind *cmd =</div><div class='del'>-		(struct i40e_aqc_tx_sched_ind *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_tx_sched_ind *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	bool cmd_param_flag = false;</div><div class='ctx'> </div><div class='hunk'>@@ -3656,12 +3389,13 @@ static int i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, opcode);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	/* Indirect command */</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 	if (cmd_param_flag)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	if (buff_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	desc.datalen = cpu_to_le16(buff_size);</div><div class='ctx'> </div><div class='hunk'>@@ -3684,14 +3418,14 @@ int i40e_aq_config_vsi_bw_limit(struct i40e_hw *hw,</div><div class='ctx'> 				u16 seid, u16 credit, u8 max_credit,</div><div class='ctx'> 				struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_configure_vsi_bw_limit *cmd =</div><div class='del'>-		(struct i40e_aqc_configure_vsi_bw_limit *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_configure_vsi_bw_limit *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_configure_vsi_bw_limit);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;vsi_seid = cpu_to_le16(seid);</div><div class='ctx'> 	cmd-&gt;credit = cpu_to_le16(credit);</div><div class='ctx'> 	cmd-&gt;max_credit = max_credit;</div><div class='hunk'>@@ -4019,18 +3753,16 @@ int i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw,</div><div class='ctx'> 					  struct i40e_control_filter_stats *stats,</div><div class='ctx'> 					  struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_remove_control_packet_filter *cmd =</div><div class='del'>-		(struct i40e_aqc_add_remove_control_packet_filter *)</div><div class='del'>-		&amp;desc.params.raw;</div><div class='del'>-	struct i40e_aqc_add_remove_control_packet_filter_completion *resp =</div><div class='del'>-		(struct i40e_aqc_add_remove_control_packet_filter_completion *)</div><div class='del'>-		&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_add_remove_control_packet_filter_completion *resp;</div><div class='add'>+	struct i40e_aqc_add_remove_control_packet_filter *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (vsi_seid == 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (is_add) {</div><div class='ctx'> 		i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 				i40e_aqc_opc_add_control_packet_filter);</div><div class='hunk'>@@ -4098,15 +3830,15 @@ static int i40e_aq_alternate_read(struct i40e_hw *hw,</div><div class='ctx'> 				  u32 reg_addr0, u32 *reg_val0,</div><div class='ctx'> 				  u32 reg_addr1, u32 *reg_val1)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_alternate_write *cmd_resp =</div><div class='del'>-		(struct i40e_aqc_alternate_write *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_alternate_write *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (!reg_val0)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_alternate_read);</div><div class='add'>+	cmd_resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd_resp-&gt;address0 = cpu_to_le32(reg_addr0);</div><div class='ctx'> 	cmd_resp-&gt;address1 = cpu_to_le32(reg_addr1);</div><div class='ctx'> </div><div class='hunk'>@@ -4134,10 +3866,10 @@ int i40e_aq_suspend_port_tx(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 			    struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_aqc_tx_sched_ind *cmd;</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = (struct i40e_aqc_tx_sched_ind *)&amp;desc.params.raw;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_suspend_port_tx);</div><div class='ctx'> 	cmd-&gt;vsi_seid = cpu_to_le16(seid);</div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='hunk'>@@ -4155,7 +3887,7 @@ int i40e_aq_suspend_port_tx(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> int i40e_aq_resume_port_tx(struct i40e_hw *hw,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_resume_port_tx);</div><div class='hunk'>@@ -4232,11 +3964,9 @@ int i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id,</div><div class='ctx'> 		       u8 *ret_next_table, u32 *ret_next_index,</div><div class='ctx'> 		       struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_debug_dump_internals *cmd =</div><div class='del'>-		(struct i40e_aqc_debug_dump_internals *)&amp;desc.params.raw;</div><div class='del'>-	struct i40e_aqc_debug_dump_internals *resp =</div><div class='del'>-		(struct i40e_aqc_debug_dump_internals *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_debug_dump_internals *resp;</div><div class='add'>+	struct i40e_aqc_debug_dump_internals *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (buff_size == 0 || !buff)</div><div class='hunk'>@@ -4244,10 +3974,12 @@ int i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_debug_dump_internals);</div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	/* Indirect Command */</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 	if (buff_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;cluster_id = cluster_id;</div><div class='ctx'> 	cmd-&gt;table_id = table_id;</div><div class='hunk'>@@ -4324,18 +4056,18 @@ i40e_aq_configure_partition_bw(struct i40e_hw *hw,</div><div class='ctx'> 			       struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='ctx'> 	u16 bwd_size = sizeof(*bw_data);</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_configure_partition_bw);</div><div class='ctx'> </div><div class='ctx'> 	/* Indirect command */</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	if (bwd_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	desc.datalen = cpu_to_le16(bwd_size);</div><div class='ctx'> </div><div class='hunk'>@@ -4570,84 +4302,6 @@ phy_write_end:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_write_phy_register</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @page: registers page number</div><div class='del'>- * @reg: register address in the page</div><div class='del'>- * @phy_addr: PHY address on MDIO interface</div><div class='del'>- * @value: PHY register value</div><div class='del'>- *</div><div class='del'>- * Writes value to specified PHY register</div><div class='del'>- **/</div><div class='del'>-int i40e_write_phy_register(struct i40e_hw *hw,</div><div class='del'>-			    u8 page, u16 reg, u8 phy_addr, u16 value)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	switch (hw-&gt;device_id) {</div><div class='del'>-	case I40E_DEV_ID_1G_BASE_T_X722:</div><div class='del'>-		status = i40e_write_phy_register_clause22(hw, reg, phy_addr,</div><div class='del'>-							  value);</div><div class='del'>-		break;</div><div class='del'>-	case I40E_DEV_ID_1G_BASE_T_BC:</div><div class='del'>-	case I40E_DEV_ID_5G_BASE_T_BC:</div><div class='del'>-	case I40E_DEV_ID_10G_BASE_T:</div><div class='del'>-	case I40E_DEV_ID_10G_BASE_T4:</div><div class='del'>-	case I40E_DEV_ID_10G_BASE_T_BC:</div><div class='del'>-	case I40E_DEV_ID_10G_BASE_T_X722:</div><div class='del'>-	case I40E_DEV_ID_25G_B:</div><div class='del'>-	case I40E_DEV_ID_25G_SFP28:</div><div class='del'>-		status = i40e_write_phy_register_clause45(hw, page, reg,</div><div class='del'>-							  phy_addr, value);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		status = -EIO;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i40e_read_phy_register</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @page: registers page number</div><div class='del'>- * @reg: register address in the page</div><div class='del'>- * @phy_addr: PHY address on MDIO interface</div><div class='del'>- * @value: PHY register value</div><div class='del'>- *</div><div class='del'>- * Reads specified PHY register value</div><div class='del'>- **/</div><div class='del'>-int i40e_read_phy_register(struct i40e_hw *hw,</div><div class='del'>-			   u8 page, u16 reg, u8 phy_addr, u16 *value)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	switch (hw-&gt;device_id) {</div><div class='del'>-	case I40E_DEV_ID_1G_BASE_T_X722:</div><div class='del'>-		status = i40e_read_phy_register_clause22(hw, reg, phy_addr,</div><div class='del'>-							 value);</div><div class='del'>-		break;</div><div class='del'>-	case I40E_DEV_ID_1G_BASE_T_BC:</div><div class='del'>-	case I40E_DEV_ID_5G_BASE_T_BC:</div><div class='del'>-	case I40E_DEV_ID_10G_BASE_T:</div><div class='del'>-	case I40E_DEV_ID_10G_BASE_T4:</div><div class='del'>-	case I40E_DEV_ID_10G_BASE_T_BC:</div><div class='del'>-	case I40E_DEV_ID_10G_BASE_T_X722:</div><div class='del'>-	case I40E_DEV_ID_25G_B:</div><div class='del'>-	case I40E_DEV_ID_25G_SFP28:</div><div class='del'>-		status = i40e_read_phy_register_clause45(hw, page, reg,</div><div class='del'>-							 phy_addr, value);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		status = -EIO;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_get_phy_address</div><div class='ctx'>  * @hw: pointer to the HW structure</div><div class='ctx'>  * @dev_num: PHY port num that address we want</div><div class='hunk'>@@ -4663,80 +4317,6 @@ u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_blink_phy_link_led</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @time: time how long led will blinks in secs</div><div class='del'>- * @interval: gap between LED on and off in msecs</div><div class='del'>- *</div><div class='del'>- * Blinks PHY link LED</div><div class='del'>- **/</div><div class='del'>-int i40e_blink_phy_link_led(struct i40e_hw *hw,</div><div class='del'>-			    u32 time, u32 interval)</div><div class='del'>-{</div><div class='del'>-	u16 led_addr = I40E_PHY_LED_PROV_REG_1;</div><div class='del'>-	u16 gpio_led_port;</div><div class='del'>-	u8 phy_addr = 0;</div><div class='del'>-	int status = 0;</div><div class='del'>-	u16 led_ctl;</div><div class='del'>-	u8 port_num;</div><div class='del'>-	u16 led_reg;</div><div class='del'>-	u32 i;</div><div class='del'>-</div><div class='del'>-	i = rd32(hw, I40E_PFGEN_PORTNUM);</div><div class='del'>-	port_num = (u8)(i &amp; I40E_PFGEN_PORTNUM_PORT_NUM_MASK);</div><div class='del'>-	phy_addr = i40e_get_phy_address(hw, port_num);</div><div class='del'>-</div><div class='del'>-	for (gpio_led_port = 0; gpio_led_port &lt; 3; gpio_led_port++,</div><div class='del'>-	     led_addr++) {</div><div class='del'>-		status = i40e_read_phy_register_clause45(hw,</div><div class='del'>-							 I40E_PHY_COM_REG_PAGE,</div><div class='del'>-							 led_addr, phy_addr,</div><div class='del'>-							 &amp;led_reg);</div><div class='del'>-		if (status)</div><div class='del'>-			goto phy_blinking_end;</div><div class='del'>-		led_ctl = led_reg;</div><div class='del'>-		if (led_reg &amp; I40E_PHY_LED_LINK_MODE_MASK) {</div><div class='del'>-			led_reg = 0;</div><div class='del'>-			status = i40e_write_phy_register_clause45(hw,</div><div class='del'>-							 I40E_PHY_COM_REG_PAGE,</div><div class='del'>-							 led_addr, phy_addr,</div><div class='del'>-							 led_reg);</div><div class='del'>-			if (status)</div><div class='del'>-				goto phy_blinking_end;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (time &gt; 0 &amp;&amp; interval &gt; 0) {</div><div class='del'>-		for (i = 0; i &lt; time * 1000; i += interval) {</div><div class='del'>-			status = i40e_read_phy_register_clause45(hw,</div><div class='del'>-						I40E_PHY_COM_REG_PAGE,</div><div class='del'>-						led_addr, phy_addr, &amp;led_reg);</div><div class='del'>-			if (status)</div><div class='del'>-				goto restore_config;</div><div class='del'>-			if (led_reg &amp; I40E_PHY_LED_MANUAL_ON)</div><div class='del'>-				led_reg = 0;</div><div class='del'>-			else</div><div class='del'>-				led_reg = I40E_PHY_LED_MANUAL_ON;</div><div class='del'>-			status = i40e_write_phy_register_clause45(hw,</div><div class='del'>-						I40E_PHY_COM_REG_PAGE,</div><div class='del'>-						led_addr, phy_addr, led_reg);</div><div class='del'>-			if (status)</div><div class='del'>-				goto restore_config;</div><div class='del'>-			msleep(interval);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-restore_config:</div><div class='del'>-	status = i40e_write_phy_register_clause45(hw,</div><div class='del'>-						  I40E_PHY_COM_REG_PAGE,</div><div class='del'>-						  led_addr, phy_addr, led_ctl);</div><div class='del'>-</div><div class='del'>-phy_blinking_end:</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_led_get_reg - read LED register</div><div class='ctx'>  * @hw: pointer to the HW structure</div><div class='ctx'>  * @led_addr: LED register address</div><div class='hunk'>@@ -4919,9 +4499,8 @@ int i40e_aq_rx_ctl_read_register(struct i40e_hw *hw,</div><div class='ctx'> 				 u32 reg_addr, u32 *reg_val,</div><div class='ctx'> 				 struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_rx_ctl_reg_read_write *cmd_resp =</div><div class='del'>-		(struct i40e_aqc_rx_ctl_reg_read_write *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_rx_ctl_reg_read_write *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (!reg_val)</div><div class='hunk'>@@ -4929,6 +4508,7 @@ int i40e_aq_rx_ctl_read_register(struct i40e_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_rx_ctl_reg_read);</div><div class='ctx'> </div><div class='add'>+	cmd_resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd_resp-&gt;address = cpu_to_le32(reg_addr);</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, NULL, 0, cmd_details);</div><div class='hunk'>@@ -4957,7 +4537,7 @@ u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr)</div><div class='ctx'> 	if (!use_register) {</div><div class='ctx'> do_retry:</div><div class='ctx'> 		status = i40e_aq_rx_ctl_read_register(hw, reg_addr, &amp;val, NULL);</div><div class='del'>-		if (hw-&gt;aq.asq_last_status == I40E_AQ_RC_EAGAIN &amp;&amp; retry) {</div><div class='add'>+		if (hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_EAGAIN &amp;&amp; retry) {</div><div class='ctx'> 			usleep_range(1000, 2000);</div><div class='ctx'> 			retry--;</div><div class='ctx'> 			goto do_retry;</div><div class='hunk'>@@ -4985,13 +4565,13 @@ int i40e_aq_rx_ctl_write_register(struct i40e_hw *hw,</div><div class='ctx'> 				  u32 reg_addr, u32 reg_val,</div><div class='ctx'> 				  struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_rx_ctl_reg_read_write *cmd =</div><div class='del'>-		(struct i40e_aqc_rx_ctl_reg_read_write *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_rx_ctl_reg_read_write *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc, i40e_aqc_opc_rx_ctl_reg_write);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;address = cpu_to_le32(reg_addr);</div><div class='ctx'> 	cmd-&gt;value = cpu_to_le32(reg_val);</div><div class='ctx'> </div><div class='hunk'>@@ -5019,7 +4599,7 @@ void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)</div><div class='ctx'> do_retry:</div><div class='ctx'> 		status = i40e_aq_rx_ctl_write_register(hw, reg_addr,</div><div class='ctx'> 						       reg_val, NULL);</div><div class='del'>-		if (hw-&gt;aq.asq_last_status == I40E_AQ_RC_EAGAIN &amp;&amp; retry) {</div><div class='add'>+		if (hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_EAGAIN &amp;&amp; retry) {</div><div class='ctx'> 			usleep_range(1000, 2000);</div><div class='ctx'> 			retry--;</div><div class='ctx'> 			goto do_retry;</div><div class='hunk'>@@ -5078,14 +4658,14 @@ int i40e_aq_set_phy_register_ext(struct i40e_hw *hw,</div><div class='ctx'> 				 u32 reg_addr, u32 reg_val,</div><div class='ctx'> 				 struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_phy_register_access *cmd =</div><div class='del'>-		(struct i40e_aqc_phy_register_access *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_phy_register_access *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_set_phy_register);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;phy_interface = phy_select;</div><div class='ctx'> 	cmd-&gt;dev_address = dev_addr;</div><div class='ctx'> 	cmd-&gt;reg_address = cpu_to_le32(reg_addr);</div><div class='hunk'>@@ -5123,14 +4703,14 @@ int i40e_aq_get_phy_register_ext(struct i40e_hw *hw,</div><div class='ctx'> 				 u32 reg_addr, u32 *reg_val,</div><div class='ctx'> 				 struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_phy_register_access *cmd =</div><div class='del'>-		(struct i40e_aqc_phy_register_access *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_phy_register_access *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_get_phy_register);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;phy_interface = phy_select;</div><div class='ctx'> 	cmd-&gt;dev_address = dev_addr;</div><div class='ctx'> 	cmd-&gt;reg_address = cpu_to_le32(reg_addr);</div><div class='hunk'>@@ -5162,19 +4742,18 @@ int i40e_aq_write_ddp(struct i40e_hw *hw, void *buff,</div><div class='ctx'> 		      u32 *error_offset, u32 *error_info,</div><div class='ctx'> 		      struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_write_personalization_profile *cmd =</div><div class='del'>-		(struct i40e_aqc_write_personalization_profile *)</div><div class='del'>-		&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_write_personalization_profile *cmd;</div><div class='ctx'> 	struct i40e_aqc_write_ddp_resp *resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_write_personalization_profile);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	if (buff_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> </div><div class='ctx'> 	desc.datalen = cpu_to_le16(buff_size);</div><div class='ctx'> </div><div class='hunk'>@@ -5182,7 +4761,7 @@ int i40e_aq_write_ddp(struct i40e_hw *hw, void *buff,</div><div class='ctx'> </div><div class='ctx'> 	status = i40e_asq_send_command(hw, &amp;desc, buff, buff_size, cmd_details);</div><div class='ctx'> 	if (!status) {</div><div class='del'>-		resp = (struct i40e_aqc_write_ddp_resp *)&amp;desc.params.raw;</div><div class='add'>+		resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 		if (error_offset)</div><div class='ctx'> 			*error_offset = le32_to_cpu(resp-&gt;error_offset);</div><div class='ctx'> 		if (error_info)</div><div class='hunk'>@@ -5204,17 +4783,17 @@ int i40e_aq_get_ddp_list(struct i40e_hw *hw, void *buff,</div><div class='ctx'> 			 u16 buff_size, u8 flags,</div><div class='ctx'> 			 struct i40e_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_get_applied_profiles *cmd =</div><div class='del'>-		(struct i40e_aqc_get_applied_profiles *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_get_applied_profiles *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_get_personalization_profile_list);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 	if (buff_size &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 	desc.datalen = cpu_to_le16(buff_size);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;flags = flags;</div><div class='hunk'>@@ -5269,39 +4848,6 @@ i40e_find_segment_in_package(u32 segment_type,</div><div class='ctx'> 	(struct i40e_profile_section_header *)((u8 *)(profile) + (offset))</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_find_section_in_profile</div><div class='del'>- * @section_type: the section type to search for (i.e., SECTION_TYPE_NOTE)</div><div class='del'>- * @profile: pointer to the i40e segment header to be searched</div><div class='del'>- *</div><div class='del'>- * This function searches i40e segment for a particular section type. On</div><div class='del'>- * success it returns a pointer to the section header, otherwise it will</div><div class='del'>- * return NULL.</div><div class='del'>- **/</div><div class='del'>-struct i40e_profile_section_header *</div><div class='del'>-i40e_find_section_in_profile(u32 section_type,</div><div class='del'>-			     struct i40e_profile_segment *profile)</div><div class='del'>-{</div><div class='del'>-	struct i40e_profile_section_header *sec;</div><div class='del'>-	struct i40e_section_table *sec_tbl;</div><div class='del'>-	u32 sec_off;</div><div class='del'>-	u32 i;</div><div class='del'>-</div><div class='del'>-	if (profile-&gt;header.type != SEGMENT_TYPE_I40E)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	I40E_SECTION_TABLE(profile, sec_tbl);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; sec_tbl-&gt;section_count; i++) {</div><div class='del'>-		sec_off = sec_tbl-&gt;section_offset[i];</div><div class='del'>-		sec = I40E_SECTION_HEADER(profile, sec_off);</div><div class='del'>-		if (sec-&gt;section.type == section_type)</div><div class='del'>-			return sec;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_ddp_exec_aq_section - Execute generic AQ for DDP</div><div class='ctx'>  * @hw: pointer to the hw struct</div><div class='ctx'>  * @aq: command buffer containing all data to execute AQ</div><div class='hunk'>@@ -5309,7 +4855,7 @@ i40e_find_section_in_profile(u32 section_type,</div><div class='ctx'> static int i40e_ddp_exec_aq_section(struct i40e_hw *hw,</div><div class='ctx'> 				    struct i40e_profile_aq_section *aq)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u8 *msg = NULL;</div><div class='ctx'> 	u16 msglen;</div><div class='ctx'> 	int status;</div><div class='hunk'>@@ -5320,10 +4866,10 @@ static int i40e_ddp_exec_aq_section(struct i40e_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	msglen = aq-&gt;datalen;</div><div class='ctx'> 	if (msglen) {</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |</div><div class='del'>-						I40E_AQ_FLAG_RD));</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF |</div><div class='add'>+						LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 		if (msglen &gt; I40E_AQ_LARGE_BUF)</div><div class='del'>-			desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);</div><div class='add'>+			desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 		desc.datalen = cpu_to_le16(msglen);</div><div class='ctx'> 		msg = &amp;aq-&gt;data[0];</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5524,45 +5070,6 @@ i40e_rollback_profile(struct i40e_hw *hw, struct i40e_profile_segment *profile,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_add_pinfo_to_list</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='del'>- * @profile: pointer to the profile segment of the package</div><div class='del'>- * @profile_info_sec: buffer for information section</div><div class='del'>- * @track_id: package tracking id</div><div class='del'>- *</div><div class='del'>- * Register a profile to the list of loaded profiles.</div><div class='del'>- */</div><div class='del'>-int</div><div class='del'>-i40e_add_pinfo_to_list(struct i40e_hw *hw,</div><div class='del'>-		       struct i40e_profile_segment *profile,</div><div class='del'>-		       u8 *profile_info_sec, u32 track_id)</div><div class='del'>-{</div><div class='del'>-	struct i40e_profile_section_header *sec = NULL;</div><div class='del'>-	struct i40e_profile_info *pinfo;</div><div class='del'>-	u32 offset = 0, info = 0;</div><div class='del'>-	int status = 0;</div><div class='del'>-</div><div class='del'>-	sec = (struct i40e_profile_section_header *)profile_info_sec;</div><div class='del'>-	sec-&gt;tbl_size = 1;</div><div class='del'>-	sec-&gt;data_end = sizeof(struct i40e_profile_section_header) +</div><div class='del'>-			sizeof(struct i40e_profile_info);</div><div class='del'>-	sec-&gt;section.type = SECTION_TYPE_INFO;</div><div class='del'>-	sec-&gt;section.offset = sizeof(struct i40e_profile_section_header);</div><div class='del'>-	sec-&gt;section.size = sizeof(struct i40e_profile_info);</div><div class='del'>-	pinfo = (struct i40e_profile_info *)(profile_info_sec +</div><div class='del'>-					     sec-&gt;section.offset);</div><div class='del'>-	pinfo-&gt;track_id = track_id;</div><div class='del'>-	pinfo-&gt;version = profile-&gt;version;</div><div class='del'>-	pinfo-&gt;op = I40E_DDP_ADD_TRACKID;</div><div class='del'>-	memcpy(pinfo-&gt;name, profile-&gt;name, I40E_DDP_NAME_SIZE);</div><div class='del'>-</div><div class='del'>-	status = i40e_aq_write_ddp(hw, (void *)sec, sec-&gt;data_end,</div><div class='del'>-				   track_id, &amp;offset, &amp;info, NULL);</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_aq_add_cloud_filters</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='ctx'>  * @seid: VSI seid to add cloud filters from</div><div class='hunk'>@@ -5579,18 +5086,18 @@ i40e_aq_add_cloud_filters(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 			  struct i40e_aqc_cloud_filters_element_data *filters,</div><div class='ctx'> 			  u8 filter_count)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_remove_cloud_filters *cmd =</div><div class='del'>-	(struct i40e_aqc_add_remove_cloud_filters *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_add_remove_cloud_filters *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buff_len;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_add_cloud_filters);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	buff_len = filter_count * sizeof(*filters);</div><div class='ctx'> 	desc.datalen = cpu_to_le16(buff_len);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 	cmd-&gt;num_filters = filter_count;</div><div class='ctx'> 	cmd-&gt;seid = cpu_to_le16(seid);</div><div class='ctx'> </div><div class='hunk'>@@ -5616,9 +5123,8 @@ i40e_aq_add_cloud_filters_bb(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 			     struct i40e_aqc_cloud_filters_element_bb *filters,</div><div class='ctx'> 			     u8 filter_count)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_remove_cloud_filters *cmd =</div><div class='del'>-	(struct i40e_aqc_add_remove_cloud_filters *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_add_remove_cloud_filters *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buff_len;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -5626,9 +5132,10 @@ i40e_aq_add_cloud_filters_bb(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_add_cloud_filters);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	buff_len = filter_count * sizeof(*filters);</div><div class='ctx'> 	desc.datalen = cpu_to_le16(buff_len);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 	cmd-&gt;num_filters = filter_count;</div><div class='ctx'> 	cmd-&gt;seid = cpu_to_le16(seid);</div><div class='ctx'> 	cmd-&gt;big_buffer_flag = I40E_AQC_ADD_CLOUD_CMD_BB;</div><div class='hunk'>@@ -5672,18 +5179,18 @@ i40e_aq_rem_cloud_filters(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 			  struct i40e_aqc_cloud_filters_element_data *filters,</div><div class='ctx'> 			  u8 filter_count)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_remove_cloud_filters *cmd =</div><div class='del'>-	(struct i40e_aqc_add_remove_cloud_filters *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_add_remove_cloud_filters *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buff_len;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_remove_cloud_filters);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	buff_len = filter_count * sizeof(*filters);</div><div class='ctx'> 	desc.datalen = cpu_to_le16(buff_len);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 	cmd-&gt;num_filters = filter_count;</div><div class='ctx'> 	cmd-&gt;seid = cpu_to_le16(seid);</div><div class='ctx'> </div><div class='hunk'>@@ -5709,9 +5216,8 @@ i40e_aq_rem_cloud_filters_bb(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 			     struct i40e_aqc_cloud_filters_element_bb *filters,</div><div class='ctx'> 			     u8 filter_count)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aq_desc desc;</div><div class='del'>-	struct i40e_aqc_add_remove_cloud_filters *cmd =</div><div class='del'>-	(struct i40e_aqc_add_remove_cloud_filters *)&amp;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_add_remove_cloud_filters *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buff_len;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -5719,9 +5225,10 @@ i40e_aq_rem_cloud_filters_bb(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 	i40e_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 					  i40e_aqc_opc_remove_cloud_filters);</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	buff_len = filter_count * sizeof(*filters);</div><div class='ctx'> 	desc.datalen = cpu_to_le16(buff_len);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 	cmd-&gt;num_filters = filter_count;</div><div class='ctx'> 	cmd-&gt;seid = cpu_to_le16(seid);</div><div class='ctx'> 	cmd-&gt;big_buffer_flag = I40E_AQC_ADD_CLOUD_CMD_BB;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_dcb.c b/drivers/net/ethernet/intel/i40e/i40e_dcb.c<br/>index 8db1eb0c1768..9e0c9597aeb9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_dcb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_dcb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_dcb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_dcb.c</a></div><div class='hunk'>@@ -750,7 +750,7 @@ static int i40e_get_ieee_dcb_config(struct i40e_hw *hw)</div><div class='ctx'> 				     I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,</div><div class='ctx'> 				     &amp;hw-&gt;remote_dcbx_config);</div><div class='ctx'> 	/* Don't treat ENOENT as an error for Remote MIBs */</div><div class='del'>-	if (hw-&gt;aq.asq_last_status == I40E_AQ_RC_ENOENT)</div><div class='add'>+	if (hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_ENOENT)</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -799,7 +799,7 @@ int i40e_get_dcb_config(struct i40e_hw *hw)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* CEE mode not enabled try querying IEEE data */</div><div class='del'>-	if (hw-&gt;aq.asq_last_status == I40E_AQ_RC_ENOENT)</div><div class='add'>+	if (hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_ENOENT)</div><div class='ctx'> 		return i40e_get_ieee_dcb_config(hw);</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -816,7 +816,7 @@ int i40e_get_dcb_config(struct i40e_hw *hw)</div><div class='ctx'> 				     I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,</div><div class='ctx'> 				     &amp;hw-&gt;remote_dcbx_config);</div><div class='ctx'> 	/* Don't treat ENOENT as an error for Remote MIBs */</div><div class='del'>-	if (hw-&gt;aq.asq_last_status == I40E_AQ_RC_ENOENT)</div><div class='add'>+	if (hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_ENOENT)</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -925,11 +925,11 @@ i40e_get_fw_lldp_status(struct i40e_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		*lldp_status = I40E_GET_FW_LLDP_STATUS_ENABLED;</div><div class='del'>-	} else if (hw-&gt;aq.asq_last_status == I40E_AQ_RC_ENOENT) {</div><div class='add'>+	} else if (hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_ENOENT) {</div><div class='ctx'> 		/* MIB is not available yet but the agent is running */</div><div class='ctx'> 		*lldp_status = I40E_GET_FW_LLDP_STATUS_ENABLED;</div><div class='ctx'> 		ret = 0;</div><div class='del'>-	} else if (hw-&gt;aq.asq_last_status == I40E_AQ_RC_EPERM) {</div><div class='add'>+	} else if (hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_EPERM) {</div><div class='ctx'> 		*lldp_status = I40E_GET_FW_LLDP_STATUS_DISABLED;</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1491,19 +1491,6 @@ void i40e_dcb_hw_set_num_tc(struct i40e_hw *hw, u8 num_tc)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_dcb_hw_get_num_tc</div><div class='del'>- * @hw: pointer to the hw struct</div><div class='del'>- *</div><div class='del'>- * Returns number of traffic classes configured in HW</div><div class='del'>- **/</div><div class='del'>-u8 i40e_dcb_hw_get_num_tc(struct i40e_hw *hw)</div><div class='del'>-{</div><div class='del'>-	u32 reg = rd32(hw, I40E_PRTDCB_GENC);</div><div class='del'>-</div><div class='del'>-	return FIELD_GET(I40E_PRTDCB_GENC_NUMTC_MASK, reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_dcb_hw_rx_ets_bw_config</div><div class='ctx'>  * @hw: pointer to the hw struct</div><div class='ctx'>  * @bw_share: Bandwidth share indexed per traffic class</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_dcb.h b/drivers/net/ethernet/intel/i40e/i40e_dcb.h<br/>index d76497566e40..d5662c639c41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_dcb.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_dcb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_dcb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_dcb.h</a></div><div class='hunk'>@@ -253,7 +253,6 @@ void i40e_dcb_hw_rx_cmd_monitor_config(struct i40e_hw *hw,</div><div class='ctx'> void i40e_dcb_hw_pfc_config(struct i40e_hw *hw,</div><div class='ctx'> 			    u8 pfc_en, u8 *prio_tc);</div><div class='ctx'> void i40e_dcb_hw_set_num_tc(struct i40e_hw *hw, u8 num_tc);</div><div class='del'>-u8 i40e_dcb_hw_get_num_tc(struct i40e_hw *hw);</div><div class='ctx'> void i40e_dcb_hw_rx_ets_bw_config(struct i40e_hw *hw, u8 *bw_share,</div><div class='ctx'> 				  u8 *mode, u8 *prio_type);</div><div class='ctx'> void i40e_dcb_hw_rx_up2tc_config(struct i40e_hw *hw, u8 *prio_tc);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c b/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c<br/>index 8aa43aefe84c..a2ccf4c5e30b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c</a></div><div class='hunk'>@@ -136,7 +136,7 @@ static int i40e_dcbnl_ieee_setets(struct net_device *netdev,</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Failed setting DCB ETS configuration err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -175,7 +175,7 @@ static int i40e_dcbnl_ieee_setpfc(struct net_device *netdev,</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Failed setting DCB PFC configuration err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -226,7 +226,7 @@ static int i40e_dcbnl_ieee_setapp(struct net_device *netdev,</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Failed setting DCB configuration err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -291,7 +291,7 @@ static int i40e_dcbnl_ieee_delapp(struct net_device *netdev,</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Failed setting DCB configuration err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_debugfs.c b/drivers/net/ethernet/intel/i40e/i40e_debugfs.c<br/>index abf624d770e6..c17b5d290f0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_debugfs.c</a></div><div class='hunk'>@@ -40,48 +40,6 @@ static struct i40e_vsi *i40e_dbg_find_vsi(struct i40e_pf *pf, int seid)</div><div class='ctx'>  * setup, adding or removing filters, or other things.  Many of</div><div class='ctx'>  * these will be useful for some forms of unit testing.</div><div class='ctx'>  **************************************************************/</div><div class='del'>-static char i40e_dbg_command_buf[256] = "";</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i40e_dbg_command_read - read for command datum</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buffer: where to write the data for the user to read</div><div class='del'>- * @count: the size of the user's buffer</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- **/</div><div class='del'>-static ssize_t i40e_dbg_command_read(struct file *filp, char __user *buffer,</div><div class='del'>-				     size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct i40e_pf *pf = filp-&gt;private_data;</div><div class='del'>-	struct i40e_vsi *main_vsi;</div><div class='del'>-	int bytes_not_copied;</div><div class='del'>-	int buf_size = 256;</div><div class='del'>-	char *buf;</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	/* don't allow partial reads */</div><div class='del'>-	if (*ppos != 0)</div><div class='del'>-		return 0;</div><div class='del'>-	if (count &lt; buf_size)</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-</div><div class='del'>-	buf = kzalloc(buf_size, GFP_KERNEL);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-</div><div class='del'>-	main_vsi = i40e_pf_get_main_vsi(pf);</div><div class='del'>-	len = snprintf(buf, buf_size, "%s: %s\n", main_vsi-&gt;netdev-&gt;name,</div><div class='del'>-		       i40e_dbg_command_buf);</div><div class='del'>-</div><div class='del'>-	bytes_not_copied = copy_to_user(buffer, buf, len);</div><div class='del'>-	kfree(buf);</div><div class='del'>-</div><div class='del'>-	if (bytes_not_copied)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	*ppos = len;</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> static char *i40e_filter_state_string[] = {</div><div class='ctx'> 	"INVALID",</div><div class='hunk'>@@ -89,6 +47,7 @@ static char *i40e_filter_state_string[] = {</div><div class='ctx'> 	"ACTIVE",</div><div class='ctx'> 	"FAILED",</div><div class='ctx'> 	"REMOVE",</div><div class='add'>+	"NEW_SYNC",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -488,7 +447,7 @@ static void i40e_dbg_dump_aq_desc(struct i40e_pf *pf)</div><div class='ctx'> 	dev_info(&amp;pf-&gt;pdev-&gt;dev, "AdminQ Tx Ring\n");</div><div class='ctx'> 	ring = &amp;(hw-&gt;aq.asq);</div><div class='ctx'> 	for (i = 0; i &lt; ring-&gt;count; i++) {</div><div class='del'>-		struct i40e_aq_desc *d = I40E_ADMINQ_DESC(*ring, i);</div><div class='add'>+		struct libie_aq_desc *d = I40E_ADMINQ_DESC(*ring, i);</div><div class='ctx'> </div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "   at[%02d] flags=0x%04x op=0x%04x dlen=0x%04x ret=0x%04x cookie_h=0x%08x cookie_l=0x%08x\n",</div><div class='hunk'>@@ -501,7 +460,7 @@ static void i40e_dbg_dump_aq_desc(struct i40e_pf *pf)</div><div class='ctx'> 	dev_info(&amp;pf-&gt;pdev-&gt;dev, "AdminQ Rx Ring\n");</div><div class='ctx'> 	ring = &amp;(hw-&gt;aq.arq);</div><div class='ctx'> 	for (i = 0; i &lt; ring-&gt;count; i++) {</div><div class='del'>-		struct i40e_aq_desc *d = I40E_ADMINQ_DESC(*ring, i);</div><div class='add'>+		struct libie_aq_desc *d = I40E_ADMINQ_DESC(*ring, i);</div><div class='ctx'> </div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "   ar[%02d] flags=0x%04x op=0x%04x dlen=0x%04x ret=0x%04x cookie_h=0x%08x cookie_l=0x%08x\n",</div><div class='hunk'>@@ -721,7 +680,7 @@ static void i40e_dbg_dump_vf(struct i40e_pf *pf, int vf_id)</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "vf %2d: VSI id=%d, seid=%d, qps=%d\n",</div><div class='ctx'> 			 vf_id, vf-&gt;lan_vsi_id, vsi-&gt;seid, vf-&gt;num_queue_pairs);</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "       num MDD=%lld\n",</div><div class='del'>-			 vf-&gt;num_mdd_events);</div><div class='add'>+			 vf-&gt;mdd_tx_events.count + vf-&gt;mdd_rx_events.count);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "invalid VF id %d\n", vf_id);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1267,10 +1226,10 @@ static ssize_t i40e_dbg_command_write(struct file *filp,</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev, "clear_stats vsi [seid] or clear_stats port\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (strncmp(cmd_buf, "send aq_cmd", 11) == 0) {</div><div class='del'>-		struct i40e_aq_desc *desc;</div><div class='add'>+		struct libie_aq_desc *desc;</div><div class='ctx'> 		int ret;</div><div class='ctx'> </div><div class='del'>-		desc = kzalloc(sizeof(struct i40e_aq_desc), GFP_KERNEL);</div><div class='add'>+		desc = kzalloc(sizeof(*desc), GFP_KERNEL);</div><div class='ctx'> 		if (!desc)</div><div class='ctx'> 			goto command_write_done;</div><div class='ctx'> 		cnt = sscanf(&amp;cmd_buf[11],</div><div class='hunk'>@@ -1278,10 +1237,10 @@ static ssize_t i40e_dbg_command_write(struct file *filp,</div><div class='ctx'> 			     &amp;desc-&gt;flags,</div><div class='ctx'> 			     &amp;desc-&gt;opcode, &amp;desc-&gt;datalen, &amp;desc-&gt;retval,</div><div class='ctx'> 			     &amp;desc-&gt;cookie_high, &amp;desc-&gt;cookie_low,</div><div class='del'>-			     &amp;desc-&gt;params.internal.param0,</div><div class='del'>-			     &amp;desc-&gt;params.internal.param1,</div><div class='del'>-			     &amp;desc-&gt;params.internal.param2,</div><div class='del'>-			     &amp;desc-&gt;params.internal.param3);</div><div class='add'>+			     &amp;desc-&gt;params.generic.param0,</div><div class='add'>+			     &amp;desc-&gt;params.generic.param1,</div><div class='add'>+			     &amp;desc-&gt;params.generic.addr_high,</div><div class='add'>+			     &amp;desc-&gt;params.generic.addr_low);</div><div class='ctx'> 		if (cnt != 10) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "send aq_cmd: bad command string, cnt=%d\n",</div><div class='hunk'>@@ -1306,19 +1265,19 @@ static ssize_t i40e_dbg_command_write(struct file *filp,</div><div class='ctx'> 			 "AQ desc WB 0x%04x 0x%04x 0x%04x 0x%04x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",</div><div class='ctx'> 			 desc-&gt;flags, desc-&gt;opcode, desc-&gt;datalen, desc-&gt;retval,</div><div class='ctx'> 			 desc-&gt;cookie_high, desc-&gt;cookie_low,</div><div class='del'>-			 desc-&gt;params.internal.param0,</div><div class='del'>-			 desc-&gt;params.internal.param1,</div><div class='del'>-			 desc-&gt;params.internal.param2,</div><div class='del'>-			 desc-&gt;params.internal.param3);</div><div class='add'>+			 desc-&gt;params.generic.param0,</div><div class='add'>+			 desc-&gt;params.generic.param1,</div><div class='add'>+			 desc-&gt;params.generic.addr_high,</div><div class='add'>+			 desc-&gt;params.generic.addr_low);</div><div class='ctx'> 		kfree(desc);</div><div class='ctx'> 		desc = NULL;</div><div class='ctx'> 	} else if (strncmp(cmd_buf, "send indirect aq_cmd", 20) == 0) {</div><div class='del'>-		struct i40e_aq_desc *desc;</div><div class='add'>+		struct libie_aq_desc *desc;</div><div class='ctx'> 		u16 buffer_len;</div><div class='ctx'> 		u8 *buff;</div><div class='ctx'> 		int ret;</div><div class='ctx'> </div><div class='del'>-		desc = kzalloc(sizeof(struct i40e_aq_desc), GFP_KERNEL);</div><div class='add'>+		desc = kzalloc(sizeof(*desc), GFP_KERNEL);</div><div class='ctx'> 		if (!desc)</div><div class='ctx'> 			goto command_write_done;</div><div class='ctx'> 		cnt = sscanf(&amp;cmd_buf[20],</div><div class='hunk'>@@ -1326,10 +1285,10 @@ static ssize_t i40e_dbg_command_write(struct file *filp,</div><div class='ctx'> 			     &amp;desc-&gt;flags,</div><div class='ctx'> 			     &amp;desc-&gt;opcode, &amp;desc-&gt;datalen, &amp;desc-&gt;retval,</div><div class='ctx'> 			     &amp;desc-&gt;cookie_high, &amp;desc-&gt;cookie_low,</div><div class='del'>-			     &amp;desc-&gt;params.internal.param0,</div><div class='del'>-			     &amp;desc-&gt;params.internal.param1,</div><div class='del'>-			     &amp;desc-&gt;params.internal.param2,</div><div class='del'>-			     &amp;desc-&gt;params.internal.param3,</div><div class='add'>+			     &amp;desc-&gt;params.generic.param0,</div><div class='add'>+			     &amp;desc-&gt;params.generic.param1,</div><div class='add'>+			     &amp;desc-&gt;params.generic.addr_high,</div><div class='add'>+			     &amp;desc-&gt;params.generic.addr_low,</div><div class='ctx'> 			     &amp;buffer_len);</div><div class='ctx'> 		if (cnt != 11) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='hunk'>@@ -1349,7 +1308,7 @@ static ssize_t i40e_dbg_command_write(struct file *filp,</div><div class='ctx'> 			desc = NULL;</div><div class='ctx'> 			goto command_write_done;</div><div class='ctx'> 		}</div><div class='del'>-		desc-&gt;flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);</div><div class='add'>+		desc-&gt;flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 		ret = i40e_asq_send_command(&amp;pf-&gt;hw, desc, buff,</div><div class='ctx'> 					    buffer_len, NULL);</div><div class='ctx'> 		if (!ret) {</div><div class='hunk'>@@ -1367,10 +1326,10 @@ static ssize_t i40e_dbg_command_write(struct file *filp,</div><div class='ctx'> 			 "AQ desc WB 0x%04x 0x%04x 0x%04x 0x%04x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",</div><div class='ctx'> 			 desc-&gt;flags, desc-&gt;opcode, desc-&gt;datalen, desc-&gt;retval,</div><div class='ctx'> 			 desc-&gt;cookie_high, desc-&gt;cookie_low,</div><div class='del'>-			 desc-&gt;params.internal.param0,</div><div class='del'>-			 desc-&gt;params.internal.param1,</div><div class='del'>-			 desc-&gt;params.internal.param2,</div><div class='del'>-			 desc-&gt;params.internal.param3);</div><div class='add'>+			 desc-&gt;params.generic.param0,</div><div class='add'>+			 desc-&gt;params.generic.param1,</div><div class='add'>+			 desc-&gt;params.generic.addr_high,</div><div class='add'>+			 desc-&gt;params.generic.addr_low);</div><div class='ctx'> 		print_hex_dump(KERN_INFO, "AQ buffer WB: ",</div><div class='ctx'> 			       DUMP_PREFIX_OFFSET, 16, 1,</div><div class='ctx'> 			       buff, buffer_len, true);</div><div class='hunk'>@@ -1620,7 +1579,6 @@ command_write_done:</div><div class='ctx'> static const struct file_operations i40e_dbg_command_fops = {</div><div class='ctx'> 	.owner = THIS_MODULE,</div><div class='ctx'> 	.open =  simple_open,</div><div class='del'>-	.read =  i40e_dbg_command_read,</div><div class='ctx'> 	.write = i40e_dbg_command_write,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1629,48 +1587,6 @@ static const struct file_operations i40e_dbg_command_fops = {</div><div class='ctx'>  * The netdev_ops entry in debugfs is for giving the driver commands</div><div class='ctx'>  * to be executed from the netdev operations.</div><div class='ctx'>  **************************************************************/</div><div class='del'>-static char i40e_dbg_netdev_ops_buf[256] = "";</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * i40e_dbg_netdev_ops_read - read for netdev_ops datum</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buffer: where to write the data for the user to read</div><div class='del'>- * @count: the size of the user's buffer</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- **/</div><div class='del'>-static ssize_t i40e_dbg_netdev_ops_read(struct file *filp, char __user *buffer,</div><div class='del'>-					size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct i40e_pf *pf = filp-&gt;private_data;</div><div class='del'>-	struct i40e_vsi *main_vsi;</div><div class='del'>-	int bytes_not_copied;</div><div class='del'>-	int buf_size = 256;</div><div class='del'>-	char *buf;</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	/* don't allow partal reads */</div><div class='del'>-	if (*ppos != 0)</div><div class='del'>-		return 0;</div><div class='del'>-	if (count &lt; buf_size)</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-</div><div class='del'>-	buf = kzalloc(buf_size, GFP_KERNEL);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-</div><div class='del'>-	main_vsi = i40e_pf_get_main_vsi(pf);</div><div class='del'>-	len = snprintf(buf, buf_size, "%s: %s\n", main_vsi-&gt;netdev-&gt;name,</div><div class='del'>-		       i40e_dbg_netdev_ops_buf);</div><div class='del'>-</div><div class='del'>-	bytes_not_copied = copy_to_user(buffer, buf, len);</div><div class='del'>-	kfree(buf);</div><div class='del'>-</div><div class='del'>-	if (bytes_not_copied)</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	*ppos = len;</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * i40e_dbg_netdev_ops_write - write into netdev_ops datum</div><div class='hunk'>@@ -1684,35 +1600,36 @@ static ssize_t i40e_dbg_netdev_ops_write(struct file *filp,</div><div class='ctx'> 					 size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_pf *pf = filp-&gt;private_data;</div><div class='add'>+	char *cmd_buf, *buf_tmp;</div><div class='ctx'> 	int bytes_not_copied;</div><div class='ctx'> 	struct i40e_vsi *vsi;</div><div class='del'>-	char *buf_tmp;</div><div class='ctx'> 	int vsi_seid;</div><div class='ctx'> 	int i, cnt;</div><div class='ctx'> </div><div class='ctx'> 	/* don't allow partial writes */</div><div class='ctx'> 	if (*ppos != 0)</div><div class='ctx'> 		return 0;</div><div class='del'>-	if (count &gt;= sizeof(i40e_dbg_netdev_ops_buf))</div><div class='del'>-		return -ENOSPC;</div><div class='ctx'> </div><div class='del'>-	memset(i40e_dbg_netdev_ops_buf, 0, sizeof(i40e_dbg_netdev_ops_buf));</div><div class='del'>-	bytes_not_copied = copy_from_user(i40e_dbg_netdev_ops_buf,</div><div class='del'>-					  buffer, count);</div><div class='del'>-	if (bytes_not_copied)</div><div class='add'>+	cmd_buf = kzalloc(count + 1, GFP_KERNEL);</div><div class='add'>+	if (!cmd_buf)</div><div class='add'>+		return count;</div><div class='add'>+	bytes_not_copied = copy_from_user(cmd_buf, buffer, count);</div><div class='add'>+	if (bytes_not_copied) {</div><div class='add'>+		kfree(cmd_buf);</div><div class='ctx'> 		return -EFAULT;</div><div class='del'>-	i40e_dbg_netdev_ops_buf[count] = '\0';</div><div class='add'>+	}</div><div class='add'>+	cmd_buf[count] = '\0';</div><div class='ctx'> </div><div class='del'>-	buf_tmp = strchr(i40e_dbg_netdev_ops_buf, '\n');</div><div class='add'>+	buf_tmp = strchr(cmd_buf, '\n');</div><div class='ctx'> 	if (buf_tmp) {</div><div class='ctx'> 		*buf_tmp = '\0';</div><div class='del'>-		count = buf_tmp - i40e_dbg_netdev_ops_buf + 1;</div><div class='add'>+		count = buf_tmp - cmd_buf + 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (strncmp(i40e_dbg_netdev_ops_buf, "change_mtu", 10) == 0) {</div><div class='add'>+	if (strncmp(cmd_buf, "change_mtu", 10) == 0) {</div><div class='ctx'> 		int mtu;</div><div class='ctx'> </div><div class='del'>-		cnt = sscanf(&amp;i40e_dbg_netdev_ops_buf[11], "%i %i",</div><div class='add'>+		cnt = sscanf(&amp;cmd_buf[11], "%i %i",</div><div class='ctx'> 			     &amp;vsi_seid, &amp;mtu);</div><div class='ctx'> 		if (cnt != 2) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev, "change_mtu &lt;vsi_seid&gt; &lt;mtu&gt;\n");</div><div class='hunk'>@@ -1734,8 +1651,8 @@ static ssize_t i40e_dbg_netdev_ops_write(struct file *filp,</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev, "Could not acquire RTNL - please try again\n");</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-	} else if (strncmp(i40e_dbg_netdev_ops_buf, "set_rx_mode", 11) == 0) {</div><div class='del'>-		cnt = sscanf(&amp;i40e_dbg_netdev_ops_buf[11], "%i", &amp;vsi_seid);</div><div class='add'>+	} else if (strncmp(cmd_buf, "set_rx_mode", 11) == 0) {</div><div class='add'>+		cnt = sscanf(&amp;cmd_buf[11], "%i", &amp;vsi_seid);</div><div class='ctx'> 		if (cnt != 1) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev, "set_rx_mode &lt;vsi_seid&gt;\n");</div><div class='ctx'> 			goto netdev_ops_write_done;</div><div class='hunk'>@@ -1755,8 +1672,8 @@ static ssize_t i40e_dbg_netdev_ops_write(struct file *filp,</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev, "Could not acquire RTNL - please try again\n");</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-	} else if (strncmp(i40e_dbg_netdev_ops_buf, "napi", 4) == 0) {</div><div class='del'>-		cnt = sscanf(&amp;i40e_dbg_netdev_ops_buf[4], "%i", &amp;vsi_seid);</div><div class='add'>+	} else if (strncmp(cmd_buf, "napi", 4) == 0) {</div><div class='add'>+		cnt = sscanf(&amp;cmd_buf[4], "%i", &amp;vsi_seid);</div><div class='ctx'> 		if (cnt != 1) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev, "napi &lt;vsi_seid&gt;\n");</div><div class='ctx'> 			goto netdev_ops_write_done;</div><div class='hunk'>@@ -1774,21 +1691,20 @@ static ssize_t i40e_dbg_netdev_ops_write(struct file *filp,</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev, "napi called\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		dev_info(&amp;pf-&gt;pdev-&gt;dev, "unknown command '%s'\n",</div><div class='del'>-			 i40e_dbg_netdev_ops_buf);</div><div class='add'>+		dev_info(&amp;pf-&gt;pdev-&gt;dev, "unknown command '%s'\n", cmd_buf);</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "available commands\n");</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "  change_mtu &lt;vsi_seid&gt; &lt;mtu&gt;\n");</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "  set_rx_mode &lt;vsi_seid&gt;\n");</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "  napi &lt;vsi_seid&gt;\n");</div><div class='ctx'> 	}</div><div class='ctx'> netdev_ops_write_done:</div><div class='add'>+	kfree(cmd_buf);</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct file_operations i40e_dbg_netdev_ops_fops = {</div><div class='ctx'> 	.owner = THIS_MODULE,</div><div class='ctx'> 	.open = simple_open,</div><div class='del'>-	.read = i40e_dbg_netdev_ops_read,</div><div class='ctx'> 	.write = i40e_dbg_netdev_ops_write,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_devlink.c b/drivers/net/ethernet/intel/i40e/i40e_devlink.c<br/>index cc4e9e2addb7..229179ccc131 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_devlink.c</a></div><div class='hunk'>@@ -5,6 +5,42 @@</div><div class='ctx'> #include "i40e.h"</div><div class='ctx'> #include "i40e_devlink.h"</div><div class='ctx'> </div><div class='add'>+static int i40e_max_mac_per_vf_set(struct devlink *devlink,</div><div class='add'>+				   u32 id,</div><div class='add'>+				   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct i40e_pf *pf = devlink_priv(devlink);</div><div class='add'>+</div><div class='add'>+	if (pf-&gt;num_alloc_vfs &gt; 0) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot change max_mac_per_vf while SR-IOV is enabled");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pf-&gt;max_mac_per_vf = ctx-&gt;val.vu32;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int i40e_max_mac_per_vf_get(struct devlink *devlink,</div><div class='add'>+				   u32 id,</div><div class='add'>+				   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct i40e_pf *pf = devlink_priv(devlink);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;val.vu32 = pf-&gt;max_mac_per_vf;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_param i40e_dl_params[] = {</div><div class='add'>+	DEVLINK_PARAM_GENERIC(MAX_MAC_PER_VF,</div><div class='add'>+			      BIT(DEVLINK_PARAM_CMODE_RUNTIME),</div><div class='add'>+			      i40e_max_mac_per_vf_get,</div><div class='add'>+			      i40e_max_mac_per_vf_set,</div><div class='add'>+			      NULL),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void i40e_info_get_dsn(struct i40e_pf *pf, char *buf, size_t len)</div><div class='ctx'> {</div><div class='ctx'> 	u8 dsn[8];</div><div class='hunk'>@@ -165,7 +201,18 @@ void i40e_free_pf(struct i40e_pf *pf)</div><div class='ctx'>  **/</div><div class='ctx'> void i40e_devlink_register(struct i40e_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	devlink_register(priv_to_devlink(pf));</div><div class='add'>+	struct devlink *dl = priv_to_devlink(pf);</div><div class='add'>+	struct device *dev = &amp;pf-&gt;pdev-&gt;dev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = devlink_params_register(dl, i40e_dl_params,</div><div class='add'>+				      ARRAY_SIZE(i40e_dl_params));</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"devlink params register failed with error %d", err);</div><div class='add'>+</div><div class='add'>+	devlink_register(dl);</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -176,7 +223,11 @@ void i40e_devlink_register(struct i40e_pf *pf)</div><div class='ctx'>  **/</div><div class='ctx'> void i40e_devlink_unregister(struct i40e_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	devlink_unregister(priv_to_devlink(pf));</div><div class='add'>+	struct devlink *dl = priv_to_devlink(pf);</div><div class='add'>+</div><div class='add'>+	devlink_unregister(dl);</div><div class='add'>+	devlink_params_unregister(dl, i40e_dl_params,</div><div class='add'>+				  ARRAY_SIZE(i40e_dl_params));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c<br/>index f2506511bbff..f2c2646ea298 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_ethtool.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> /* ethtool support for i40e */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/net/intel/libie/pctype.h&gt;</div><div class='ctx'> #include "i40e_devids.h"</div><div class='ctx'> #include "i40e_diag.h"</div><div class='ctx'> #include "i40e_txrx_common.h"</div><div class='hunk'>@@ -459,6 +460,8 @@ static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {</div><div class='ctx'> 	I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0),</div><div class='ctx'> 	I40E_PRIV_FLAG("vf-vlan-pruning",</div><div class='ctx'> 		       I40E_FLAG_VF_VLAN_PRUNING_ENA, 0),</div><div class='add'>+	I40E_PRIV_FLAG("mdd-auto-reset-vf",</div><div class='add'>+		       I40E_FLAG_MDD_AUTO_RESET_VF, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)</div><div class='hunk'>@@ -1459,7 +1462,7 @@ static int i40e_set_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 			netdev_info(netdev,</div><div class='ctx'> 				    "Set phy config failed, err %pe aq_err %s\n",</div><div class='ctx'> 				    ERR_PTR(status),</div><div class='del'>-				    i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				    libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 			err = -EAGAIN;</div><div class='ctx'> 			goto done;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1469,7 +1472,7 @@ static int i40e_set_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 			netdev_dbg(netdev,</div><div class='ctx'> 				   "Updating link info failed with err %pe aq_err %s\n",</div><div class='ctx'> 				   ERR_PTR(status),</div><div class='del'>-				   i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				   libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='ctx'> 		netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");</div><div class='hunk'>@@ -1517,7 +1520,7 @@ static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg)</div><div class='ctx'> 			netdev_info(netdev,</div><div class='ctx'> 				    "Set phy config failed, err %pe aq_err %s\n",</div><div class='ctx'> 				    ERR_PTR(status),</div><div class='del'>-				    i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				    libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 			err = -EAGAIN;</div><div class='ctx'> 			goto done;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1531,7 +1534,7 @@ static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg)</div><div class='ctx'> 			netdev_dbg(netdev,</div><div class='ctx'> 				   "Updating link info failed with err %pe aq_err %s\n",</div><div class='ctx'> 				   ERR_PTR(status),</div><div class='del'>-				   i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				   libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='hunk'>@@ -1638,7 +1641,7 @@ static int i40e_nway_reset(struct net_device *netdev)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_info(netdev, "link restart failed, err %pe aq_err %s\n",</div><div class='ctx'> 			    ERR_PTR(ret),</div><div class='del'>-			    i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			    libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1755,19 +1758,19 @@ static int i40e_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> 	if (aq_failures &amp; I40E_SET_FC_AQ_FAIL_GET) {</div><div class='ctx'> 		netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %pe aq_err %s\n",</div><div class='ctx'> 			    ERR_PTR(status),</div><div class='del'>-			    i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			    libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		err = -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (aq_failures &amp; I40E_SET_FC_AQ_FAIL_SET) {</div><div class='ctx'> 		netdev_info(netdev, "Set fc failed on the set_phy_config call with err %pe aq_err %s\n",</div><div class='ctx'> 			    ERR_PTR(status),</div><div class='del'>-			    i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			    libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		err = -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (aq_failures &amp; I40E_SET_FC_AQ_FAIL_UPDATE) {</div><div class='ctx'> 		netdev_info(netdev, "Set fc failed on the get_link_info call with err %pe aq_err %s\n",</div><div class='ctx'> 			    ERR_PTR(status),</div><div class='del'>-			    i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			    libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		err = -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1915,13 +1918,13 @@ static int i40e_get_eeprom(struct net_device *netdev,</div><div class='ctx'> 		ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,</div><div class='ctx'> 				(u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),</div><div class='ctx'> 				last, NULL);</div><div class='del'>-		if (ret_val &amp;&amp; hw-&gt;aq.asq_last_status == I40E_AQ_RC_EPERM) {</div><div class='add'>+		if (ret_val &amp;&amp; hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_EPERM) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "read NVM failed, invalid offset 0x%x\n",</div><div class='ctx'> 				 offset);</div><div class='ctx'> 			break;</div><div class='ctx'> 		} else if (ret_val &amp;&amp;</div><div class='del'>-			   hw-&gt;aq.asq_last_status == I40E_AQ_RC_EACCES) {</div><div class='add'>+			   hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_EACCES) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "read NVM failed, access, offset 0x%x\n",</div><div class='ctx'> 				 offset);</div><div class='hunk'>@@ -2747,6 +2750,15 @@ skip_ol_tests:</div><div class='ctx'> 	netif_info(pf, drv, netdev, "testing failed\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void i40e_get_link_ext_stats(struct net_device *netdev,</div><div class='add'>+				    struct ethtool_link_ext_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct i40e_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct i40e_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+</div><div class='add'>+	stats-&gt;link_down_events = pf-&gt;link_down_events;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void i40e_get_wol(struct net_device *netdev,</div><div class='ctx'> 			 struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='hunk'>@@ -3127,15 +3139,12 @@ static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,</div><div class='ctx'> 	return __i40e_set_coalesce(netdev, ec, queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type</div><div class='del'>- * @pf: pointer to the physical function struct</div><div class='del'>- * @cmd: ethtool rxnfc command</div><div class='del'>- *</div><div class='del'>- * Returns Success if the flow is supported, else Invalid Input.</div><div class='del'>- **/</div><div class='del'>-static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)</div><div class='add'>+static int i40e_get_rxfh_fields(struct net_device *netdev,</div><div class='add'>+				struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct i40e_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct i40e_vsi *vsi = np-&gt;vsi;</div><div class='add'>+	struct i40e_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	struct i40e_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	u8 flow_pctype = 0;</div><div class='ctx'> 	u64 i_set = 0;</div><div class='hunk'>@@ -3144,16 +3153,16 @@ static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;flow_type) {</div><div class='ctx'> 	case TCP_V4_FLOW:</div><div class='del'>-		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;</div><div class='add'>+		flow_pctype = LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UDP_V4_FLOW:</div><div class='del'>-		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;</div><div class='add'>+		flow_pctype = LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TCP_V6_FLOW:</div><div class='del'>-		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;</div><div class='add'>+		flow_pctype = LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UDP_V6_FLOW:</div><div class='del'>-		flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;</div><div class='add'>+		flow_pctype = LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SCTP_V4_FLOW:</div><div class='ctx'> 	case AH_ESP_V4_FLOW:</div><div class='hunk'>@@ -3410,28 +3419,28 @@ static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,</div><div class='ctx'> </div><div class='ctx'> 	switch (rule-&gt;flow_type) {</div><div class='ctx'> 	case SCTP_V4_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TCP_V4_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UDP_V4_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SCTP_V6_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TCP_V6_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UDP_V6_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IP_USER_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IPV6_USER_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* If we have stored a filter with a flow type not listed here</div><div class='hunk'>@@ -3513,6 +3522,20 @@ no_input_set:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * i40e_get_rx_ring_count - get RX ring count</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: number of RX rings.</div><div class='add'>+ **/</div><div class='add'>+static u32 i40e_get_rx_ring_count(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct i40e_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct i40e_vsi *vsi = np-&gt;vsi;</div><div class='add'>+</div><div class='add'>+	return vsi-&gt;rss_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * i40e_get_rxnfc - command to get RX flow classification rules</div><div class='ctx'>  * @netdev: network interface device structure</div><div class='ctx'>  * @cmd: ethtool rxnfc command</div><div class='hunk'>@@ -3529,13 +3552,6 @@ static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	int ret = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = vsi-&gt;rss_size;</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ret = i40e_get_rss_hash_opts(pf, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		cmd-&gt;rule_cnt = pf-&gt;fdir_pf_active_filters;</div><div class='ctx'> 		/* report total rule count */</div><div class='hunk'>@@ -3564,7 +3580,7 @@ static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,</div><div class='ctx'>  * Returns value of bits to be set per user request</div><div class='ctx'>  **/</div><div class='ctx'> static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw,</div><div class='del'>-				  struct ethtool_rxnfc *nfc,</div><div class='add'>+				  const struct ethtool_rxfh_fields *nfc,</div><div class='ctx'> 				  u64 i_setc)</div><div class='ctx'> {</div><div class='ctx'> 	u64 i_set = i_setc;</div><div class='hunk'>@@ -3609,15 +3625,13 @@ static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define FLOW_PCTYPES_SIZE 64</div><div class='del'>-/**</div><div class='del'>- * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash</div><div class='del'>- * @pf: pointer to the physical function struct</div><div class='del'>- * @nfc: ethtool rxnfc command</div><div class='del'>- *</div><div class='del'>- * Returns Success if the flow input set is supported.</div><div class='del'>- **/</div><div class='del'>-static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)</div><div class='add'>+static int i40e_set_rxfh_fields(struct net_device *netdev,</div><div class='add'>+				const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct i40e_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct i40e_vsi *vsi = np-&gt;vsi;</div><div class='add'>+	struct i40e_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	struct i40e_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |</div><div class='ctx'> 		   ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) &lt;&lt; 32);</div><div class='hunk'>@@ -3641,40 +3655,40 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)</div><div class='ctx'> </div><div class='ctx'> 	switch (nfc-&gt;flow_type) {</div><div class='ctx'> 	case TCP_V4_FLOW:</div><div class='del'>-		set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, flow_pctypes);</div><div class='add'>+		set_bit(LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP, flow_pctypes);</div><div class='ctx'> 		if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,</div><div class='ctx'> 			     pf-&gt;hw.caps))</div><div class='del'>-			set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK,</div><div class='add'>+			set_bit(LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK,</div><div class='ctx'> 				flow_pctypes);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TCP_V6_FLOW:</div><div class='del'>-		set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, flow_pctypes);</div><div class='add'>+		set_bit(LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP, flow_pctypes);</div><div class='ctx'> 		if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,</div><div class='ctx'> 			     pf-&gt;hw.caps))</div><div class='del'>-			set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK,</div><div class='add'>+			set_bit(LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK,</div><div class='ctx'> 				flow_pctypes);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UDP_V4_FLOW:</div><div class='del'>-		set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, flow_pctypes);</div><div class='add'>+		set_bit(LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP, flow_pctypes);</div><div class='ctx'> 		if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,</div><div class='ctx'> 			     pf-&gt;hw.caps)) {</div><div class='del'>-			set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP,</div><div class='add'>+			set_bit(LIBIE_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP,</div><div class='ctx'> 				flow_pctypes);</div><div class='del'>-			set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP,</div><div class='add'>+			set_bit(LIBIE_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP,</div><div class='ctx'> 				flow_pctypes);</div><div class='ctx'> 		}</div><div class='del'>-		hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);</div><div class='add'>+		hena |= BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV4);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UDP_V6_FLOW:</div><div class='del'>-		set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, flow_pctypes);</div><div class='add'>+		set_bit(LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP, flow_pctypes);</div><div class='ctx'> 		if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,</div><div class='ctx'> 			     pf-&gt;hw.caps)) {</div><div class='del'>-			set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP,</div><div class='add'>+			set_bit(LIBIE_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP,</div><div class='ctx'> 				flow_pctypes);</div><div class='del'>-			set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP,</div><div class='add'>+			set_bit(LIBIE_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP,</div><div class='ctx'> 				flow_pctypes);</div><div class='ctx'> 		}</div><div class='del'>-		hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);</div><div class='add'>+		hena |= BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV6);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AH_ESP_V4_FLOW:</div><div class='ctx'> 	case AH_V4_FLOW:</div><div class='hunk'>@@ -3683,7 +3697,7 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)</div><div class='ctx'> 		if ((nfc-&gt;data &amp; RXH_L4_B_0_1) ||</div><div class='ctx'> 		    (nfc-&gt;data &amp; RXH_L4_B_2_3))</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);</div><div class='add'>+		hena |= BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AH_ESP_V6_FLOW:</div><div class='ctx'> 	case AH_V6_FLOW:</div><div class='hunk'>@@ -3692,15 +3706,15 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)</div><div class='ctx'> 		if ((nfc-&gt;data &amp; RXH_L4_B_0_1) ||</div><div class='ctx'> 		    (nfc-&gt;data &amp; RXH_L4_B_2_3))</div><div class='ctx'> 			return -EINVAL;</div><div class='del'>-		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);</div><div class='add'>+		hena |= BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IPV4_FLOW:</div><div class='del'>-		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |</div><div class='del'>-			BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);</div><div class='add'>+		hena |= BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER) |</div><div class='add'>+			BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV4);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IPV6_FLOW:</div><div class='del'>-		hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |</div><div class='del'>-			BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);</div><div class='add'>+		hena |= BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER) |</div><div class='add'>+			BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV6);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -4310,36 +4324,36 @@ static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,</div><div class='ctx'> </div><div class='ctx'> 	switch (fsp-&gt;flow_type &amp; ~FLOW_EXT) {</div><div class='ctx'> 	case SCTP_V4_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP;</div><div class='ctx'> 		fdir_filter_count = &amp;pf-&gt;fd_sctp4_filter_cnt;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TCP_V4_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP;</div><div class='ctx'> 		fdir_filter_count = &amp;pf-&gt;fd_tcp4_filter_cnt;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UDP_V4_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP;</div><div class='ctx'> 		fdir_filter_count = &amp;pf-&gt;fd_udp4_filter_cnt;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SCTP_V6_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP;</div><div class='ctx'> 		fdir_filter_count = &amp;pf-&gt;fd_sctp6_filter_cnt;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TCP_V6_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP;</div><div class='ctx'> 		fdir_filter_count = &amp;pf-&gt;fd_tcp6_filter_cnt;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case UDP_V6_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP;</div><div class='ctx'> 		fdir_filter_count = &amp;pf-&gt;fd_udp6_filter_cnt;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IP_USER_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER;</div><div class='ctx'> 		fdir_filter_count = &amp;pf-&gt;fd_ip4_filter_cnt;</div><div class='ctx'> 		flex_l3 = true;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IPV6_USER_FLOW:</div><div class='del'>-		index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;</div><div class='add'>+		index = LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER;</div><div class='ctx'> 		fdir_filter_count = &amp;pf-&gt;fd_ip6_filter_cnt;</div><div class='ctx'> 		flex_l3 = true;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -4675,8 +4689,8 @@ static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,</div><div class='ctx'> 	 * separate support, we'll always assume and enforce that the two flow</div><div class='ctx'> 	 * types must have matching input sets.</div><div class='ctx'> 	 */</div><div class='del'>-	if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER)</div><div class='del'>-		i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,</div><div class='add'>+	if (index == LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER)</div><div class='add'>+		i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_FRAG_IPV4,</div><div class='ctx'> 					new_mask);</div><div class='ctx'> </div><div class='ctx'> 	/* Add the new offset and update table, if necessary */</div><div class='hunk'>@@ -4952,13 +4966,9 @@ static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_netdev_priv *np = netdev_priv(netdev);</div><div class='ctx'> 	struct i40e_vsi *vsi = np-&gt;vsi;</div><div class='del'>-	struct i40e_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	int ret = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = i40e_set_rss_hash_opt(pf, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		ret = i40e_add_fdir_ethtool(vsi, cmd);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -5249,9 +5259,9 @@ static int i40e_set_priv_flags(struct net_device *dev, u32 flags)</div><div class='ctx'> 	DECLARE_BITMAP(orig_flags, I40E_PF_FLAGS_NBITS);</div><div class='ctx'> 	DECLARE_BITMAP(new_flags, I40E_PF_FLAGS_NBITS);</div><div class='ctx'> 	struct i40e_netdev_priv *np = netdev_priv(dev);</div><div class='del'>-	enum i40e_admin_queue_err adq_err;</div><div class='ctx'> 	struct i40e_vsi *vsi = np-&gt;vsi;</div><div class='ctx'> 	struct i40e_pf *pf = vsi-&gt;back;</div><div class='add'>+	enum libie_aq_err adq_err;</div><div class='ctx'> 	u32 reset_needed = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	u32 i, j;</div><div class='hunk'>@@ -5299,7 +5309,7 @@ static int i40e_set_priv_flags(struct net_device *dev, u32 flags)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> flags_complete:</div><div class='del'>-	bitmap_xor(changed_flags, pf-&gt;flags, orig_flags, I40E_PF_FLAGS_NBITS);</div><div class='add'>+	bitmap_xor(changed_flags, new_flags, orig_flags, I40E_PF_FLAGS_NBITS);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags))</div><div class='ctx'> 		reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG;</div><div class='hunk'>@@ -5371,12 +5381,11 @@ flags_complete:</div><div class='ctx'> 		valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;</div><div class='ctx'> 		ret = i40e_aq_set_switch_config(&amp;pf-&gt;hw, sw_flags, valid_flags,</div><div class='ctx'> 						0, NULL);</div><div class='del'>-		if (ret &amp;&amp; pf-&gt;hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {</div><div class='add'>+		if (ret &amp;&amp; pf-&gt;hw.aq.asq_last_status != LIBIE_AQ_RC_ESRCH) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "couldn't set switch config bits, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 			/* not a fatal problem, just keep going */</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5438,16 +5447,16 @@ flags_complete:</div><div class='ctx'> 			if (status) {</div><div class='ctx'> 				adq_err = pf-&gt;hw.aq.asq_last_status;</div><div class='ctx'> 				switch (adq_err) {</div><div class='del'>-				case I40E_AQ_RC_EEXIST:</div><div class='add'>+				case LIBIE_AQ_RC_EEXIST:</div><div class='ctx'> 					dev_warn(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 						 "FW LLDP agent is already running\n");</div><div class='ctx'> 					reset_needed = 0;</div><div class='ctx'> 					break;</div><div class='del'>-				case I40E_AQ_RC_EPERM:</div><div class='add'>+				case LIBIE_AQ_RC_EPERM:</div><div class='ctx'> 					dev_warn(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 						 "Device configuration forbids SW from starting the LLDP agent.\n");</div><div class='ctx'> 					return -EINVAL;</div><div class='del'>-				case I40E_AQ_RC_EAGAIN:</div><div class='add'>+				case LIBIE_AQ_RC_EAGAIN:</div><div class='ctx'> 					dev_warn(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 						 "Stop FW LLDP agent command is still being processed, please try again in a second.\n");</div><div class='ctx'> 					return -EBUSY;</div><div class='hunk'>@@ -5455,8 +5464,7 @@ flags_complete:</div><div class='ctx'> 					dev_warn(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 						 "Starting FW LLDP agent failed: error: %pe, %s\n",</div><div class='ctx'> 						 ERR_PTR(status),</div><div class='del'>-						 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-							     adq_err));</div><div class='add'>+						 libie_aq_str(adq_err));</div><div class='ctx'> 					return -EINVAL;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='hunk'>@@ -5807,6 +5815,7 @@ static const struct ethtool_ops i40e_ethtool_ops = {</div><div class='ctx'> 	.get_regs		= i40e_get_regs,</div><div class='ctx'> 	.nway_reset		= i40e_nway_reset,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_link_ext_stats	= i40e_get_link_ext_stats,</div><div class='ctx'> 	.get_wol		= i40e_get_wol,</div><div class='ctx'> 	.set_wol		= i40e_set_wol,</div><div class='ctx'> 	.set_eeprom		= i40e_set_eeprom,</div><div class='hunk'>@@ -5820,6 +5829,7 @@ static const struct ethtool_ops i40e_ethtool_ops = {</div><div class='ctx'> 	.set_msglevel		= i40e_set_msglevel,</div><div class='ctx'> 	.get_rxnfc		= i40e_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= i40e_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= i40e_get_rx_ring_count,</div><div class='ctx'> 	.self_test		= i40e_diag_test,</div><div class='ctx'> 	.get_strings		= i40e_get_strings,</div><div class='ctx'> 	.get_eee		= i40e_get_eee,</div><div class='hunk'>@@ -5833,6 +5843,8 @@ static const struct ethtool_ops i40e_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size	= i40e_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= i40e_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= i40e_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= i40e_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= i40e_set_rxfh_fields,</div><div class='ctx'> 	.get_channels		= i40e_get_channels,</div><div class='ctx'> 	.set_channels		= i40e_set_channels,</div><div class='ctx'> 	.get_module_info	= i40e_get_module_info,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c<br/>index 25295ae370b2..d8192aa23254 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_main.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;generated/utsrelease.h&gt;</div><div class='ctx'> #include &lt;linux/crash_dump.h&gt;</div><div class='add'>+#include &lt;linux/net/intel/libie/pctype.h&gt;</div><div class='ctx'> #include &lt;linux/if_bridge.h&gt;</div><div class='ctx'> #include &lt;linux/if_macvlan.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -99,7 +100,8 @@ module_param(debug, uint, 0);</div><div class='ctx'> MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");</div><div class='del'>-MODULE_IMPORT_NS(LIBIE);</div><div class='add'>+MODULE_IMPORT_NS("LIBIE");</div><div class='add'>+MODULE_IMPORT_NS("LIBIE_ADMINQ");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='ctx'> static struct workqueue_struct *i40e_wq;</div><div class='hunk'>@@ -1241,12 +1243,30 @@ void i40e_update_stats(struct i40e_vsi *vsi)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_count_filters - counts VSI mac filters</div><div class='add'>+ * i40e_count_all_filters - counts VSI MAC filters</div><div class='ctx'>  * @vsi: the VSI to be searched</div><div class='ctx'>  *</div><div class='del'>- * Returns count of mac filters</div><div class='del'>- **/</div><div class='del'>-int i40e_count_filters(struct i40e_vsi *vsi)</div><div class='add'>+ * Return: count of MAC filters in any state.</div><div class='add'>+ */</div><div class='add'>+int i40e_count_all_filters(struct i40e_vsi *vsi)</div><div class='add'>+{</div><div class='add'>+	struct i40e_mac_filter *f;</div><div class='add'>+	struct hlist_node *h;</div><div class='add'>+	int bkt, cnt = 0;</div><div class='add'>+</div><div class='add'>+	hash_for_each_safe(vsi-&gt;mac_filter_hash, bkt, h, f, hlist)</div><div class='add'>+		cnt++;</div><div class='add'>+</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * i40e_count_active_filters - counts VSI MAC filters</div><div class='add'>+ * @vsi: the VSI to be searched</div><div class='add'>+ *</div><div class='add'>+ * Return: count of active MAC filters.</div><div class='add'>+ */</div><div class='add'>+int i40e_count_active_filters(struct i40e_vsi *vsi)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_mac_filter *f;</div><div class='ctx'> 	struct hlist_node *h;</div><div class='hunk'>@@ -1255,6 +1275,7 @@ int i40e_count_filters(struct i40e_vsi *vsi)</div><div class='ctx'> </div><div class='ctx'> 	hash_for_each_safe(vsi-&gt;mac_filter_hash, bkt, h, f, hlist) {</div><div class='ctx'> 		if (f-&gt;state == I40E_FILTER_NEW ||</div><div class='add'>+		    f-&gt;state == I40E_FILTER_NEW_SYNC ||</div><div class='ctx'> 		    f-&gt;state == I40E_FILTER_ACTIVE)</div><div class='ctx'> 			++cnt;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1441,6 +1462,8 @@ static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,</div><div class='ctx'> </div><div class='ctx'> 			new-&gt;f = add_head;</div><div class='ctx'> 			new-&gt;state = add_head-&gt;state;</div><div class='add'>+			if (add_head-&gt;state == I40E_FILTER_NEW)</div><div class='add'>+				add_head-&gt;state = I40E_FILTER_NEW_SYNC;</div><div class='ctx'> </div><div class='ctx'> 			/* Add the new filter to the tmp list */</div><div class='ctx'> 			hlist_add_head(&amp;new-&gt;hlist, tmp_add_list);</div><div class='hunk'>@@ -1550,6 +1573,8 @@ static int i40e_correct_vf_mac_vlan_filters(struct i40e_vsi *vsi,</div><div class='ctx'> 				return -ENOMEM;</div><div class='ctx'> 			new_mac-&gt;f = add_head;</div><div class='ctx'> 			new_mac-&gt;state = add_head-&gt;state;</div><div class='add'>+			if (add_head-&gt;state == I40E_FILTER_NEW)</div><div class='add'>+				add_head-&gt;state = I40E_FILTER_NEW_SYNC;</div><div class='ctx'> </div><div class='ctx'> 			/* Add the new filter to the tmp list */</div><div class='ctx'> 			hlist_add_head(&amp;new_mac-&gt;hlist, tmp_add_list);</div><div class='hunk'>@@ -1661,9 +1686,8 @@ struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,</div><div class='ctx'>  * @vsi: VSI to remove from</div><div class='ctx'>  * @f: the filter to remove from the list</div><div class='ctx'>  *</div><div class='del'>- * This function should be called instead of i40e_del_filter only if you know</div><div class='del'>- * the exact filter you will remove already, such as via i40e_find_filter or</div><div class='del'>- * i40e_find_mac.</div><div class='add'>+ * This function requires you've found * the exact filter you will remove</div><div class='add'>+ * already, such as via i40e_find_filter or i40e_find_mac.</div><div class='ctx'>  *</div><div class='ctx'>  * NOTE: This function is expected to be called with mac_filter_hash_lock</div><div class='ctx'>  * being held.</div><div class='hunk'>@@ -1693,29 +1717,6 @@ void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_del_filter - Remove a MAC/VLAN filter from the VSI</div><div class='del'>- * @vsi: the VSI to be searched</div><div class='del'>- * @macaddr: the MAC address</div><div class='del'>- * @vlan: the VLAN</div><div class='del'>- *</div><div class='del'>- * NOTE: This function is expected to be called with mac_filter_hash_lock</div><div class='del'>- * being held.</div><div class='del'>- * ANOTHER NOTE: This function MUST be called from within the context of</div><div class='del'>- * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()</div><div class='del'>- * instead of list_for_each_entry().</div><div class='del'>- **/</div><div class='del'>-void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)</div><div class='del'>-{</div><div class='del'>-	struct i40e_mac_filter *f;</div><div class='del'>-</div><div class='del'>-	if (!vsi || !macaddr)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	f = i40e_find_filter(vsi, macaddr, vlan);</div><div class='del'>-	__i40e_del_filter(vsi, f);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_add_mac_filter - Add a MAC filter for all active VLANs</div><div class='ctx'>  * @vsi: the VSI to be searched</div><div class='ctx'>  * @macaddr: the mac address to be filtered</div><div class='hunk'>@@ -1832,7 +1833,7 @@ static int i40e_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			netdev_info(netdev, "Ignoring error from firmware on LAA update, status %pe, AQ ret %s\n",</div><div class='ctx'> 				    ERR_PTR(ret),</div><div class='del'>-				    i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				    libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* schedule our worker thread which will take care of</div><div class='hunk'>@@ -1864,7 +1865,7 @@ static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Cannot set RSS key, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1876,7 +1877,7 @@ static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Cannot set RSS lut, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2358,19 +2359,18 @@ void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,</div><div class='ctx'> 			  int num_del, int *retval)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='del'>-	enum i40e_admin_queue_err aq_status;</div><div class='add'>+	enum libie_aq_err aq_status;</div><div class='ctx'> 	int aq_ret;</div><div class='ctx'> </div><div class='ctx'> 	aq_ret = i40e_aq_remove_macvlan_v2(hw, vsi-&gt;seid, list, num_del, NULL,</div><div class='ctx'> 					   &amp;aq_status);</div><div class='ctx'> </div><div class='ctx'> 	/* Explicitly ignore and do not report when firmware returns ENOENT */</div><div class='del'>-	if (aq_ret &amp;&amp; !(aq_status == I40E_AQ_RC_ENOENT)) {</div><div class='add'>+	if (aq_ret &amp;&amp; !(aq_status == LIBIE_AQ_RC_ENOENT)) {</div><div class='ctx'> 		*retval = -EIO;</div><div class='ctx'> 		dev_info(&amp;vsi-&gt;back-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "ignoring delete macvlan error on %s, err %pe, aq_err %s\n",</div><div class='del'>-			 vsi_name, ERR_PTR(aq_ret),</div><div class='del'>-			 i40e_aq_str(hw, aq_status));</div><div class='add'>+			 vsi_name, ERR_PTR(aq_ret), libie_aq_str(aq_status));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2393,7 +2393,7 @@ void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,</div><div class='ctx'> 			  int num_add)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='del'>-	enum i40e_admin_queue_err aq_status;</div><div class='add'>+	enum libie_aq_err aq_status;</div><div class='ctx'> 	int fcnt;</div><div class='ctx'> </div><div class='ctx'> 	i40e_aq_add_macvlan_v2(hw, vsi-&gt;seid, list, num_add, NULL, &amp;aq_status);</div><div class='hunk'>@@ -2404,19 +2404,17 @@ void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,</div><div class='ctx'> 			set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi-&gt;state);</div><div class='ctx'> 			dev_warn(&amp;vsi-&gt;back-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Error %s adding RX filters on %s, promiscuous mode forced on\n",</div><div class='del'>-				 i40e_aq_str(hw, aq_status), vsi_name);</div><div class='add'>+				 libie_aq_str(aq_status), vsi_name);</div><div class='ctx'> 		} else if (vsi-&gt;type == I40E_VSI_SRIOV ||</div><div class='ctx'> 			   vsi-&gt;type == I40E_VSI_VMDQ1 ||</div><div class='ctx'> 			   vsi-&gt;type == I40E_VSI_VMDQ2) {</div><div class='ctx'> 			dev_warn(&amp;vsi-&gt;back-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",</div><div class='del'>-				 i40e_aq_str(hw, aq_status), vsi_name,</div><div class='del'>-					     vsi_name);</div><div class='add'>+				 libie_aq_str(aq_status), vsi_name, vsi_name);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dev_warn(&amp;vsi-&gt;back-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",</div><div class='del'>-				 i40e_aq_str(hw, aq_status), vsi_name,</div><div class='del'>-					     vsi-&gt;type);</div><div class='add'>+				 libie_aq_str(aq_status), vsi_name, vsi-&gt;type);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2437,7 +2435,8 @@ static int</div><div class='ctx'> i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,</div><div class='ctx'> 			  struct i40e_mac_filter *f)</div><div class='ctx'> {</div><div class='del'>-	bool enable = f-&gt;state == I40E_FILTER_NEW;</div><div class='add'>+	bool enable = f-&gt;state == I40E_FILTER_NEW ||</div><div class='add'>+		      f-&gt;state == I40E_FILTER_NEW_SYNC;</div><div class='ctx'> 	struct i40e_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='ctx'> 	int aq_ret;</div><div class='ctx'> </div><div class='hunk'>@@ -2458,8 +2457,7 @@ i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,</div><div class='ctx'> 		set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi-&gt;state);</div><div class='ctx'> 		dev_warn(&amp;vsi-&gt;back-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Error %s, forcing overflow promiscuous on %s\n",</div><div class='del'>-			 i40e_aq_str(hw, hw-&gt;aq.asq_last_status),</div><div class='del'>-			 vsi_name);</div><div class='add'>+			 libie_aq_str(hw-&gt;aq.asq_last_status), vsi_name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return aq_ret;</div><div class='hunk'>@@ -2500,7 +2498,7 @@ static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Set default VSI failed, err %pe, aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(aq_ret),</div><div class='del'>-				 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		aq_ret = i40e_aq_set_vsi_unicast_promiscuous(</div><div class='hunk'>@@ -2512,7 +2510,7 @@ static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "set unicast promisc failed, err %pe, aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(aq_ret),</div><div class='del'>-				 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		}</div><div class='ctx'> 		aq_ret = i40e_aq_set_vsi_multicast_promiscuous(</div><div class='ctx'> 						  hw,</div><div class='hunk'>@@ -2522,7 +2520,7 @@ static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "set multicast promisc failed, err %pe, aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(aq_ret),</div><div class='del'>-				 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2611,6 +2609,7 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi)</div><div class='ctx'> </div><div class='ctx'> 				/* Add it to the hash list */</div><div class='ctx'> 				hlist_add_head(&amp;new-&gt;hlist, &amp;tmp_add_list);</div><div class='add'>+				f-&gt;state = I40E_FILTER_NEW_SYNC;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* Count the number of active (current and new) VLAN</div><div class='hunk'>@@ -2762,7 +2761,8 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi)</div><div class='ctx'> 		spin_lock_bh(&amp;vsi-&gt;mac_filter_hash_lock);</div><div class='ctx'> 		hlist_for_each_entry_safe(new, h, &amp;tmp_add_list, hlist) {</div><div class='ctx'> 			/* Only update the state if we're still NEW */</div><div class='del'>-			if (new-&gt;f-&gt;state == I40E_FILTER_NEW)</div><div class='add'>+			if (new-&gt;f-&gt;state == I40E_FILTER_NEW ||</div><div class='add'>+			    new-&gt;f-&gt;state == I40E_FILTER_NEW_SYNC)</div><div class='ctx'> 				new-&gt;f-&gt;state = new-&gt;state;</div><div class='ctx'> 			hlist_del(&amp;new-&gt;hlist);</div><div class='ctx'> 			netdev_hw_addr_refcnt(new-&gt;f, vsi-&gt;netdev, -1);</div><div class='hunk'>@@ -2828,7 +2828,7 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi)</div><div class='ctx'> 				 "set multi promisc failed on %s, err %pe aq_err %s\n",</div><div class='ctx'> 				 vsi_name,</div><div class='ctx'> 				 ERR_PTR(aq_ret),</div><div class='del'>-				 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev, "%s allmulti mode.\n",</div><div class='ctx'> 				 cur_multipromisc ? "entering" : "leaving");</div><div class='hunk'>@@ -2849,7 +2849,7 @@ int i40e_sync_vsi_filters(struct i40e_vsi *vsi)</div><div class='ctx'> 				 cur_promisc ? "on" : "off",</div><div class='ctx'> 				 vsi_name,</div><div class='ctx'> 				 ERR_PTR(aq_ret),</div><div class='del'>-				 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='hunk'>@@ -2970,27 +2970,6 @@ static int i40e_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_ioctl - Access the hwtstamp interface</div><div class='del'>- * @netdev: network interface device structure</div><div class='del'>- * @ifr: interface request data</div><div class='del'>- * @cmd: ioctl command</div><div class='del'>- **/</div><div class='del'>-int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct i40e_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct i40e_pf *pf = np-&gt;vsi-&gt;back;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return i40e_ptp_get_ts_config(pf, ifr);</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return i40e_ptp_set_ts_config(pf, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI</div><div class='ctx'>  * @vsi: the vsi being adjusted</div><div class='ctx'>  **/</div><div class='hunk'>@@ -3019,8 +2998,7 @@ void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)</div><div class='ctx'> 		dev_info(&amp;vsi-&gt;back-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "update vlan stripping failed, err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;vsi-&gt;back-&gt;hw,</div><div class='del'>-				     vsi-&gt;back-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(vsi-&gt;back-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3054,8 +3032,7 @@ void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)</div><div class='ctx'> 		dev_info(&amp;vsi-&gt;back-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "update vlan stripping failed, err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;vsi-&gt;back-&gt;hw,</div><div class='del'>-				     vsi-&gt;back-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(vsi-&gt;back-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3299,8 +3276,7 @@ int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)</div><div class='ctx'> 		dev_info(&amp;vsi-&gt;back-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "add pvid failed, err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;vsi-&gt;back-&gt;hw,</div><div class='del'>-				     vsi-&gt;back-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(vsi-&gt;back-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4198,7 +4174,7 @@ free_queue_irqs:</div><div class='ctx'> 		irq_num = pf-&gt;msix_entries[base + vector].vector;</div><div class='ctx'> 		irq_set_affinity_notifier(irq_num, NULL);</div><div class='ctx'> 		irq_update_affinity_hint(irq_num, NULL);</div><div class='del'>-		free_irq(irq_num, &amp;vsi-&gt;q_vectors[vector]);</div><div class='add'>+		free_irq(irq_num, vsi-&gt;q_vectors[vector]);</div><div class='ctx'> 	}</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -5570,7 +5546,7 @@ static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "couldn't get PF vsi bw config, err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5581,7 +5557,7 @@ static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "couldn't get PF vsi ets bw config, err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5771,7 +5747,7 @@ int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "Update vsi config failed, err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* update the local VSI info with updated queue map */</div><div class='hunk'>@@ -5827,7 +5803,7 @@ static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Failed querying vsi bw info, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> 		if ((bw_config.tc_valid_bits &amp; enabled_tc) != enabled_tc) {</div><div class='hunk'>@@ -5894,7 +5870,7 @@ static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Update vsi tc config failed, err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* update the local VSI info with updated queue map */</div><div class='hunk'>@@ -5907,7 +5883,7 @@ static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Failed updating vsi bw info, err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6021,7 +5997,7 @@ int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)</div><div class='ctx'> 		dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"Failed set tx rate (%llu Mbps) for vsi-&gt;seid %u, err %pe aq_err %s\n",</div><div class='ctx'> 			max_tx_rate, seid, ERR_PTR(ret),</div><div class='del'>-			i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6033,8 +6009,8 @@ int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)</div><div class='ctx'>  **/</div><div class='ctx'> static void i40e_remove_queue_channels(struct i40e_vsi *vsi)</div><div class='ctx'> {</div><div class='del'>-	enum i40e_admin_queue_err last_aq_status;</div><div class='ctx'> 	struct i40e_cloud_filter *cfilter;</div><div class='add'>+	enum libie_aq_err last_aq_status;</div><div class='ctx'> 	struct i40e_channel *ch, *ch_tmp;</div><div class='ctx'> 	struct i40e_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	struct hlist_node *node;</div><div class='hunk'>@@ -6097,7 +6073,7 @@ static void i40e_remove_queue_channels(struct i40e_vsi *vsi)</div><div class='ctx'> 				dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 					 "Failed to delete cloud filter, err %pe aq_err %s\n",</div><div class='ctx'> 					 ERR_PTR(ret),</div><div class='del'>-					 i40e_aq_str(&amp;pf-&gt;hw, last_aq_status));</div><div class='add'>+					 libie_aq_str(last_aq_status));</div><div class='ctx'> 			kfree(cfilter);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -6232,7 +6208,7 @@ static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Cannot set RSS lut, err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		kfree(lut);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6331,8 +6307,7 @@ static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "add new vsi failed, err %pe aq_err %s\n",</div><div class='ctx'> 			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-				     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6575,12 +6550,10 @@ static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)</div><div class='ctx'> 	ret = i40e_aq_set_switch_config(hw, pf-&gt;last_sw_conf_flags,</div><div class='ctx'> 					pf-&gt;last_sw_conf_valid_flags,</div><div class='ctx'> 					mode, NULL);</div><div class='del'>-	if (ret &amp;&amp; hw-&gt;aq.asq_last_status != I40E_AQ_RC_ESRCH)</div><div class='add'>+	if (ret &amp;&amp; hw-&gt;aq.asq_last_status != LIBIE_AQ_RC_ESRCH)</div><div class='ctx'> 		dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"couldn't set switch config bits, err %pe aq_err %s\n",</div><div class='del'>-			ERR_PTR(ret),</div><div class='del'>-			i40e_aq_str(hw,</div><div class='del'>-				    hw-&gt;aq.asq_last_status));</div><div class='add'>+			ERR_PTR(ret), libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -6779,8 +6752,7 @@ int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "VEB bw config failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6789,8 +6761,7 @@ int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Failed getting veb bw config, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -6871,7 +6842,7 @@ static int i40e_resume_port_tx(struct i40e_pf *pf)</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Resume Port Tx failed, err %pe aq_err %s\n",</div><div class='ctx'> 			  ERR_PTR(ret),</div><div class='del'>-			  i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			  libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		/* Schedule PF reset to recover */</div><div class='ctx'> 		set_bit(__I40E_PF_RESET_REQUESTED, pf-&gt;state);</div><div class='ctx'> 		i40e_service_event_schedule(pf);</div><div class='hunk'>@@ -6895,8 +6866,7 @@ static int i40e_suspend_port_tx(struct i40e_pf *pf)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Suspend Port Tx failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		/* Schedule PF reset to recover */</div><div class='ctx'> 		set_bit(__I40E_PF_RESET_REQUESTED, pf-&gt;state);</div><div class='ctx'> 		i40e_service_event_schedule(pf);</div><div class='hunk'>@@ -6935,8 +6905,7 @@ static int i40e_hw_set_dcb_config(struct i40e_pf *pf,</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Set DCB Config failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7052,8 +7021,7 @@ int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Modify Port ETS failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7092,8 +7060,7 @@ int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "DCB Updated failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7176,8 +7143,7 @@ int i40e_dcb_sw_default_config(struct i40e_pf *pf)</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Enable Port ETS failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(err),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(err), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		err = -ENOENT;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -7250,14 +7216,13 @@ static int i40e_init_pf_dcb(struct i40e_pf *pf)</div><div class='ctx'> 			dev_dbg(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"DCBX offload is supported for this PF.\n");</div><div class='ctx'> 		}</div><div class='del'>-	} else if (pf-&gt;hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {</div><div class='add'>+	} else if (pf-&gt;hw.aq.asq_last_status == LIBIE_AQ_RC_EPERM) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "FW LLDP disabled for this PF.\n");</div><div class='ctx'> 		set_bit(I40E_FLAG_FW_LLDP_DIS, pf-&gt;flags);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Query for DCB configuration failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(err),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(err), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -7513,8 +7478,7 @@ static int i40e_force_link_state(struct i40e_pf *pf, bool is_up)</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"failed to get phy cap., ret =  %pe last_status =  %s\n",</div><div class='del'>-			ERR_PTR(err),</div><div class='del'>-			i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			ERR_PTR(err), libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> 	speed = abilities.link_speed;</div><div class='hunk'>@@ -7525,8 +7489,7 @@ static int i40e_force_link_state(struct i40e_pf *pf, bool is_up)</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"failed to get phy cap., ret =  %pe last_status =  %s\n",</div><div class='del'>-			ERR_PTR(err),</div><div class='del'>-			i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			ERR_PTR(err), libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7570,8 +7533,7 @@ static int i40e_force_link_state(struct i40e_pf *pf, bool is_up)</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"set phy config ret =  %pe last_status =  %s\n",</div><div class='del'>-			ERR_PTR(err),</div><div class='del'>-			i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			ERR_PTR(err), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7911,8 +7873,7 @@ static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,</div><div class='ctx'> 		}</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Error adding mac filter on macvlan err %pe, aq_err %s\n",</div><div class='del'>-			  ERR_PTR(ret),</div><div class='del'>-			  i40e_aq_str(hw, aq_err));</div><div class='add'>+			  ERR_PTR(ret), libie_aq_str(aq_err));</div><div class='ctx'> 		netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7984,8 +7945,7 @@ static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Update vsi tc config failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* update the local VSI info with updated queue map */</div><div class='hunk'>@@ -8200,8 +8160,7 @@ static void i40e_fwd_del(struct net_device *netdev, void *vdev)</div><div class='ctx'> 			} else {</div><div class='ctx'> 				dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 					 "Error deleting mac filter on macvlan err %pe, aq_err %s\n",</div><div class='del'>-					  ERR_PTR(ret),</div><div class='del'>-					  i40e_aq_str(hw, aq_err));</div><div class='add'>+					  ERR_PTR(ret), libie_aq_str(aq_err));</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -9204,47 +9163,47 @@ static void i40e_fdir_filter_exit(struct i40e_pf *pf)</div><div class='ctx'> 	i40e_reset_fdir_filter_cnt(pf);</div><div class='ctx'> </div><div class='ctx'> 	/* Reprogram the default input set for TCP/IPv4 */</div><div class='del'>-	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,</div><div class='add'>+	i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP,</div><div class='ctx'> 				I40E_L3_SRC_MASK | I40E_L3_DST_MASK |</div><div class='ctx'> 				I40E_L4_SRC_MASK | I40E_L4_DST_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* Reprogram the default input set for TCP/IPv6 */</div><div class='del'>-	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,</div><div class='add'>+	i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP,</div><div class='ctx'> 				I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |</div><div class='ctx'> 				I40E_L4_SRC_MASK | I40E_L4_DST_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* Reprogram the default input set for UDP/IPv4 */</div><div class='del'>-	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,</div><div class='add'>+	i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP,</div><div class='ctx'> 				I40E_L3_SRC_MASK | I40E_L3_DST_MASK |</div><div class='ctx'> 				I40E_L4_SRC_MASK | I40E_L4_DST_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* Reprogram the default input set for UDP/IPv6 */</div><div class='del'>-	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,</div><div class='add'>+	i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP,</div><div class='ctx'> 				I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |</div><div class='ctx'> 				I40E_L4_SRC_MASK | I40E_L4_DST_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* Reprogram the default input set for SCTP/IPv4 */</div><div class='del'>-	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,</div><div class='add'>+	i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP,</div><div class='ctx'> 				I40E_L3_SRC_MASK | I40E_L3_DST_MASK |</div><div class='ctx'> 				I40E_L4_SRC_MASK | I40E_L4_DST_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* Reprogram the default input set for SCTP/IPv6 */</div><div class='del'>-	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,</div><div class='add'>+	i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP,</div><div class='ctx'> 				I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |</div><div class='ctx'> 				I40E_L4_SRC_MASK | I40E_L4_DST_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* Reprogram the default input set for Other/IPv4 */</div><div class='del'>-	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,</div><div class='add'>+	i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER,</div><div class='ctx'> 				I40E_L3_SRC_MASK | I40E_L3_DST_MASK);</div><div class='ctx'> </div><div class='del'>-	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,</div><div class='add'>+	i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_FRAG_IPV4,</div><div class='ctx'> 				I40E_L3_SRC_MASK | I40E_L3_DST_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* Reprogram the default input set for Other/IPv6 */</div><div class='del'>-	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,</div><div class='add'>+	i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER,</div><div class='ctx'> 				I40E_L3_SRC_MASK | I40E_L3_DST_MASK);</div><div class='ctx'> </div><div class='del'>-	i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,</div><div class='add'>+	i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_FRAG_IPV6,</div><div class='ctx'> 				I40E_L3_SRC_MASK | I40E_L3_DST_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -9455,8 +9414,7 @@ bool i40e_dcb_need_reconfig(struct i40e_pf *pf,</div><div class='ctx'> static int i40e_handle_lldp_event(struct i40e_pf *pf,</div><div class='ctx'> 				  struct i40e_arq_event_info *e)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aqc_lldp_get_mib *mib =</div><div class='del'>-		(struct i40e_aqc_lldp_get_mib *)&amp;e-&gt;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_lldp_get_mib *mib = libie_aq_raw(&amp;e-&gt;desc);</div><div class='ctx'> 	struct i40e_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	struct i40e_dcbx_config tmp_dcbx_cfg;</div><div class='ctx'> 	bool need_reconfig = false;</div><div class='hunk'>@@ -9513,8 +9471,7 @@ static int i40e_handle_lldp_event(struct i40e_pf *pf,</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Failed querying DCB configuration data from firmware, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		}</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -9595,8 +9552,7 @@ void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)</div><div class='ctx'> static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,</div><div class='ctx'> 					   struct i40e_arq_event_info *e)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aqc_lan_overflow *data =</div><div class='del'>-		(struct i40e_aqc_lan_overflow *)&amp;e-&gt;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_lan_overflow *data = libie_aq_raw(&amp;e-&gt;desc);</div><div class='ctx'> 	u32 queue = le32_to_cpu(data-&gt;prtdcb_rupto);</div><div class='ctx'> 	u32 qtx_ctl = le32_to_cpu(data-&gt;otx_ctl);</div><div class='ctx'> 	struct i40e_hw *hw = &amp;pf-&gt;hw;</div><div class='hunk'>@@ -9621,19 +9577,6 @@ static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters</div><div class='del'>- * @pf: board private structure</div><div class='del'>- **/</div><div class='del'>-u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)</div><div class='del'>-{</div><div class='del'>-	u32 val, fcnt_prog;</div><div class='del'>-</div><div class='del'>-	val = rd32(&amp;pf-&gt;hw, I40E_PFQF_FDSTAT);</div><div class='del'>-	fcnt_prog = (val &amp; I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);</div><div class='del'>-	return fcnt_prog;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_get_current_fd_count - Get total FD filters programmed for this PF</div><div class='ctx'>  * @pf: board private structure</div><div class='ctx'>  **/</div><div class='hunk'>@@ -9685,7 +9628,7 @@ static void i40e_reenable_fdir_atr(struct i40e_pf *pf)</div><div class='ctx'> 		 * settings. It is safe to restore the default input set</div><div class='ctx'> 		 * because there are no active TCPv4 filter rules.</div><div class='ctx'> 		 */</div><div class='del'>-		i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,</div><div class='add'>+		i40e_write_fd_input_set(pf, LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP,</div><div class='ctx'> 					I40E_L3_SRC_MASK | I40E_L3_DST_MASK |</div><div class='ctx'> 					I40E_L4_SRC_MASK | I40E_L4_DST_MASK);</div><div class='ctx'> </div><div class='hunk'>@@ -9988,6 +9931,9 @@ static void i40e_link_event(struct i40e_pf *pf)</div><div class='ctx'> 	     new_link == netif_carrier_ok(vsi-&gt;netdev)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (!new_link &amp;&amp; old_link)</div><div class='add'>+		pf-&gt;link_down_events++;</div><div class='add'>+</div><div class='ctx'> 	i40e_print_link_message(vsi, new_link);</div><div class='ctx'> </div><div class='ctx'> 	/* Notify the base of the switch tree connected to</div><div class='hunk'>@@ -10126,8 +10072,7 @@ static void i40e_reset_subtask(struct i40e_pf *pf)</div><div class='ctx'> static void i40e_handle_link_event(struct i40e_pf *pf,</div><div class='ctx'> 				   struct i40e_arq_event_info *e)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aqc_get_link_status *status =</div><div class='del'>-		(struct i40e_aqc_get_link_status *)&amp;e-&gt;desc.params.raw;</div><div class='add'>+	struct i40e_aqc_get_link_status *status = libie_aq_raw(&amp;e-&gt;desc);</div><div class='ctx'> </div><div class='ctx'> 	/* Do a new status request to re-enable LSE reporting</div><div class='ctx'> 	 * and load new status information into the hw struct</div><div class='hunk'>@@ -10335,8 +10280,7 @@ static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "couldn't get PF vsi config, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	ctxt.flags = I40E_AQ_VSI_TYPE_PF;</div><div class='hunk'>@@ -10347,8 +10291,7 @@ static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "update vsi switch failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -10371,8 +10314,7 @@ static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "couldn't get PF vsi config, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	ctxt.flags = I40E_AQ_VSI_TYPE_PF;</div><div class='hunk'>@@ -10383,8 +10325,7 @@ static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "update vsi switch failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -10499,12 +10440,12 @@ static int i40e_reconstitute_veb(struct i40e_veb *veb)</div><div class='ctx'> static int i40e_get_capabilities(struct i40e_pf *pf,</div><div class='ctx'> 				 enum i40e_admin_queue_opc list_type)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_aqc_list_capabilities_element_resp *cap_buf;</div><div class='add'>+	struct libie_aqc_list_caps_elem *cap_buf;</div><div class='ctx'> 	u16 data_size;</div><div class='ctx'> 	int buf_len;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);</div><div class='add'>+	buf_len = 40 * sizeof(struct libie_aqc_list_caps_elem);</div><div class='ctx'> 	do {</div><div class='ctx'> 		cap_buf = kzalloc(buf_len, GFP_KERNEL);</div><div class='ctx'> 		if (!cap_buf)</div><div class='hunk'>@@ -10517,15 +10458,14 @@ static int i40e_get_capabilities(struct i40e_pf *pf,</div><div class='ctx'> 		/* data loaded, buffer no longer needed */</div><div class='ctx'> 		kfree(cap_buf);</div><div class='ctx'> </div><div class='del'>-		if (pf-&gt;hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {</div><div class='add'>+		if (pf-&gt;hw.aq.asq_last_status == LIBIE_AQ_RC_ENOMEM) {</div><div class='ctx'> 			/* retry with a larger buffer */</div><div class='ctx'> 			buf_len = data_size;</div><div class='del'>-		} else if (pf-&gt;hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {</div><div class='add'>+		} else if (pf-&gt;hw.aq.asq_last_status != LIBIE_AQ_RC_OK || err) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "capability discovery failed, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(err),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (err);</div><div class='hunk'>@@ -10662,8 +10602,7 @@ static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)</div><div class='ctx'> 			dev_dbg(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"Failed to rebuild cloud filter, err %pe aq_err %s\n",</div><div class='ctx'> 				ERR_PTR(ret),</div><div class='del'>-				i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					    pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -10904,8 +10843,7 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)</div><div class='ctx'> 	ret = i40e_init_adminq(&amp;pf-&gt;hw);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "Rebuild AdminQ failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		goto clear_recovery;</div><div class='ctx'> 	}</div><div class='ctx'> 	i40e_get_oem_version(&amp;pf-&gt;hw);</div><div class='hunk'>@@ -11016,8 +10954,7 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)</div><div class='ctx'> 					 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "set phy mask fail, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	/* Rebuild the VSIs and VEBs that existed before reset.</div><div class='ctx'> 	 * They are still in our local switch element arrays, so only</div><div class='hunk'>@@ -11115,8 +11052,7 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev, "link restart failed, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 	}</div><div class='ctx'> 	/* reinit the misc interrupt */</div><div class='ctx'> 	if (test_bit(I40E_FLAG_MSIX_ENA, pf-&gt;flags)) {</div><div class='hunk'>@@ -11147,8 +11083,7 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)</div><div class='ctx'> 		dev_warn(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "Failed to restore promiscuous setting: %s, err %pe aq_err %s\n",</div><div class='ctx'> 			 pf-&gt;cur_promisc ? "on" : "off",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	i40e_reset_all_vfs(pf, true);</div><div class='ctx'> </div><div class='hunk'>@@ -11209,6 +11144,67 @@ static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * i40e_print_vf_mdd_event - print VF Tx/Rx malicious driver detect event</div><div class='add'>+ * @pf: board private structure</div><div class='add'>+ * @vf: pointer to the VF structure</div><div class='add'>+ * @is_tx: true - for Tx event, false - for  Rx</div><div class='add'>+ */</div><div class='add'>+static void i40e_print_vf_mdd_event(struct i40e_pf *pf, struct i40e_vf *vf,</div><div class='add'>+				    bool is_tx)</div><div class='add'>+{</div><div class='add'>+	dev_err(&amp;pf-&gt;pdev-&gt;dev, is_tx ?</div><div class='add'>+		"%lld Tx Malicious Driver Detection events detected on PF %d VF %d MAC %pm. mdd-auto-reset-vfs=%s\n" :</div><div class='add'>+		"%lld Rx Malicious Driver Detection events detected on PF %d VF %d MAC %pm. mdd-auto-reset-vfs=%s\n",</div><div class='add'>+		is_tx ? vf-&gt;mdd_tx_events.count : vf-&gt;mdd_rx_events.count,</div><div class='add'>+		pf-&gt;hw.pf_id,</div><div class='add'>+		vf-&gt;vf_id,</div><div class='add'>+		vf-&gt;default_lan_addr.addr,</div><div class='add'>+		str_on_off(test_bit(I40E_FLAG_MDD_AUTO_RESET_VF, pf-&gt;flags)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * i40e_print_vfs_mdd_events - print VFs malicious driver detect event</div><div class='add'>+ * @pf: pointer to the PF structure</div><div class='add'>+ *</div><div class='add'>+ * Called from i40e_handle_mdd_event to rate limit and print VFs MDD events.</div><div class='add'>+ */</div><div class='add'>+static void i40e_print_vfs_mdd_events(struct i40e_pf *pf)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	/* check that there are pending MDD events to print */</div><div class='add'>+	if (!test_and_clear_bit(__I40E_MDD_VF_PRINT_PENDING, pf-&gt;state))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!__ratelimit(&amp;pf-&gt;mdd_message_rate_limit))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pf-&gt;num_alloc_vfs; i++) {</div><div class='add'>+		struct i40e_vf *vf = &amp;pf-&gt;vf[i];</div><div class='add'>+		bool is_printed = false;</div><div class='add'>+</div><div class='add'>+		/* only print Rx MDD event message if there are new events */</div><div class='add'>+		if (vf-&gt;mdd_rx_events.count != vf-&gt;mdd_rx_events.last_printed) {</div><div class='add'>+			vf-&gt;mdd_rx_events.last_printed = vf-&gt;mdd_rx_events.count;</div><div class='add'>+			i40e_print_vf_mdd_event(pf, vf, false);</div><div class='add'>+			is_printed = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* only print Tx MDD event message if there are new events */</div><div class='add'>+		if (vf-&gt;mdd_tx_events.count != vf-&gt;mdd_tx_events.last_printed) {</div><div class='add'>+			vf-&gt;mdd_tx_events.last_printed = vf-&gt;mdd_tx_events.count;</div><div class='add'>+			i40e_print_vf_mdd_event(pf, vf, true);</div><div class='add'>+			is_printed = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (is_printed &amp;&amp; !test_bit(I40E_FLAG_MDD_AUTO_RESET_VF, pf-&gt;flags))</div><div class='add'>+			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='add'>+				 "Use PF Control I/F to re-enable the VF #%d\n",</div><div class='add'>+				 i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * i40e_handle_mdd_event</div><div class='ctx'>  * @pf: pointer to the PF structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -11222,8 +11218,13 @@ static void i40e_handle_mdd_event(struct i40e_pf *pf)</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!test_bit(__I40E_MDD_EVENT_PENDING, pf-&gt;state))</div><div class='add'>+	if (!test_and_clear_bit(__I40E_MDD_EVENT_PENDING, pf-&gt;state)) {</div><div class='add'>+		/* Since the VF MDD event logging is rate limited, check if</div><div class='add'>+		 * there are pending MDD events.</div><div class='add'>+		 */</div><div class='add'>+		i40e_print_vfs_mdd_events(pf);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* find what triggered the MDD event */</div><div class='ctx'> 	reg = rd32(hw, I40E_GL_MDET_TX);</div><div class='hunk'>@@ -11267,36 +11268,48 @@ static void i40e_handle_mdd_event(struct i40e_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 	/* see if one of the VFs needs its hand slapped */</div><div class='ctx'> 	for (i = 0; i &lt; pf-&gt;num_alloc_vfs &amp;&amp; mdd_detected; i++) {</div><div class='add'>+		bool is_mdd_on_tx = false;</div><div class='add'>+		bool is_mdd_on_rx = false;</div><div class='add'>+</div><div class='ctx'> 		vf = &amp;(pf-&gt;vf[i]);</div><div class='ctx'> 		reg = rd32(hw, I40E_VP_MDET_TX(i));</div><div class='ctx'> 		if (reg &amp; I40E_VP_MDET_TX_VALID_MASK) {</div><div class='add'>+			set_bit(__I40E_MDD_VF_PRINT_PENDING, pf-&gt;state);</div><div class='ctx'> 			wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);</div><div class='del'>-			vf-&gt;num_mdd_events++;</div><div class='del'>-			dev_info(&amp;pf-&gt;pdev-&gt;dev, "TX driver issue detected on VF %d\n",</div><div class='del'>-				 i);</div><div class='del'>-			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='del'>-				 "Use PF Control I/F to re-enable the VF\n");</div><div class='add'>+			vf-&gt;mdd_tx_events.count++;</div><div class='ctx'> 			set_bit(I40E_VF_STATE_DISABLED, &amp;vf-&gt;vf_states);</div><div class='add'>+			is_mdd_on_tx = true;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		reg = rd32(hw, I40E_VP_MDET_RX(i));</div><div class='ctx'> 		if (reg &amp; I40E_VP_MDET_RX_VALID_MASK) {</div><div class='add'>+			set_bit(__I40E_MDD_VF_PRINT_PENDING, pf-&gt;state);</div><div class='ctx'> 			wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);</div><div class='del'>-			vf-&gt;num_mdd_events++;</div><div class='del'>-			dev_info(&amp;pf-&gt;pdev-&gt;dev, "RX driver issue detected on VF %d\n",</div><div class='del'>-				 i);</div><div class='del'>-			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='del'>-				 "Use PF Control I/F to re-enable the VF\n");</div><div class='add'>+			vf-&gt;mdd_rx_events.count++;</div><div class='ctx'> 			set_bit(I40E_VF_STATE_DISABLED, &amp;vf-&gt;vf_states);</div><div class='add'>+			is_mdd_on_rx = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if ((is_mdd_on_tx || is_mdd_on_rx) &amp;&amp;</div><div class='add'>+		    test_bit(I40E_FLAG_MDD_AUTO_RESET_VF, pf-&gt;flags)) {</div><div class='add'>+			/* VF MDD event counters will be cleared by</div><div class='add'>+			 * reset, so print the event prior to reset.</div><div class='add'>+			 */</div><div class='add'>+			if (is_mdd_on_rx)</div><div class='add'>+				i40e_print_vf_mdd_event(pf, vf, false);</div><div class='add'>+			if (is_mdd_on_tx)</div><div class='add'>+				i40e_print_vf_mdd_event(pf, vf, true);</div><div class='add'>+</div><div class='add'>+			i40e_vc_reset_vf(vf, true);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* re-enable mdd interrupt cause */</div><div class='del'>-	clear_bit(__I40E_MDD_EVENT_PENDING, pf-&gt;state);</div><div class='ctx'> 	reg = rd32(hw, I40E_PFINT_ICR0_ENA);</div><div class='ctx'> 	reg |=  I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;</div><div class='ctx'> 	wr32(hw, I40E_PFINT_ICR0_ENA, reg);</div><div class='ctx'> 	i40e_flush(hw);</div><div class='add'>+</div><div class='add'>+	i40e_print_vfs_mdd_events(pf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -11363,7 +11376,7 @@ static void i40e_service_task(struct work_struct *work)</div><div class='ctx'>  **/</div><div class='ctx'> static void i40e_service_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct i40e_pf *pf = from_timer(pf, t, service_timer);</div><div class='add'>+	struct i40e_pf *pf = timer_container_of(pf, t, service_timer);</div><div class='ctx'> </div><div class='ctx'> 	mod_timer(&amp;pf-&gt;service_timer,</div><div class='ctx'> 		  round_jiffies(jiffies + pf-&gt;service_timer_period));</div><div class='hunk'>@@ -12276,8 +12289,7 @@ static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Cannot get RSS key, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -12290,8 +12302,7 @@ static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Cannot get RSS lut, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -12458,7 +12469,7 @@ static int i40e_pf_config_rss(struct i40e_pf *pf)</div><div class='ctx'> 	/* By default we enable TCP/UDP with IPv4/IPv6 ptypes */</div><div class='ctx'> 	hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |</div><div class='ctx'> 		((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) &lt;&lt; 32);</div><div class='del'>-	hena |= i40e_pf_get_default_rss_hena(pf);</div><div class='add'>+	hena |= i40e_pf_get_default_rss_hashcfg(pf);</div><div class='ctx'> </div><div class='ctx'> 	i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);</div><div class='ctx'> 	i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena &gt;&gt; 32));</div><div class='hunk'>@@ -12606,89 +12617,6 @@ int i40e_set_partition_bw_setting(struct i40e_pf *pf)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition</div><div class='del'>- * @pf: board private structure</div><div class='del'>- **/</div><div class='del'>-int i40e_commit_partition_bw_setting(struct i40e_pf *pf)</div><div class='del'>-{</div><div class='del'>-	/* Commit temporary BW setting to permanent NVM image */</div><div class='del'>-	enum i40e_admin_queue_err last_aq_status;</div><div class='del'>-	u16 nvm_word;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (pf-&gt;hw.partition_id != 1) {</div><div class='del'>-		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='del'>-			 "Commit BW only works on partition 1! This is partition %d",</div><div class='del'>-			 pf-&gt;hw.partition_id);</div><div class='del'>-		ret = -EOPNOTSUPP;</div><div class='del'>-		goto bw_commit_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Acquire NVM for read access */</div><div class='del'>-	ret = i40e_acquire_nvm(&amp;pf-&gt;hw, I40E_RESOURCE_READ);</div><div class='del'>-	last_aq_status = pf-&gt;hw.aq.asq_last_status;</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='del'>-			 "Cannot acquire NVM for read access, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, last_aq_status));</div><div class='del'>-		goto bw_commit_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Read word 0x10 of NVM - SW compatibility word 1 */</div><div class='del'>-	ret = i40e_aq_read_nvm(&amp;pf-&gt;hw,</div><div class='del'>-			       I40E_SR_NVM_CONTROL_WORD,</div><div class='del'>-			       0x10, sizeof(nvm_word), &amp;nvm_word,</div><div class='del'>-			       false, NULL);</div><div class='del'>-	/* Save off last admin queue command status before releasing</div><div class='del'>-	 * the NVM</div><div class='del'>-	 */</div><div class='del'>-	last_aq_status = pf-&gt;hw.aq.asq_last_status;</div><div class='del'>-	i40e_release_nvm(&amp;pf-&gt;hw);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_info(&amp;pf-&gt;pdev-&gt;dev, "NVM read error, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, last_aq_status));</div><div class='del'>-		goto bw_commit_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Wait a bit for NVM release to complete */</div><div class='del'>-	msleep(50);</div><div class='del'>-</div><div class='del'>-	/* Acquire NVM for write access */</div><div class='del'>-	ret = i40e_acquire_nvm(&amp;pf-&gt;hw, I40E_RESOURCE_WRITE);</div><div class='del'>-	last_aq_status = pf-&gt;hw.aq.asq_last_status;</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='del'>-			 "Cannot acquire NVM for write access, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, last_aq_status));</div><div class='del'>-		goto bw_commit_out;</div><div class='del'>-	}</div><div class='del'>-	/* Write it back out unchanged to initiate update NVM,</div><div class='del'>-	 * which will force a write of the shadow (alt) RAM to</div><div class='del'>-	 * the NVM - thus storing the bandwidth values permanently.</div><div class='del'>-	 */</div><div class='del'>-	ret = i40e_aq_update_nvm(&amp;pf-&gt;hw,</div><div class='del'>-				 I40E_SR_NVM_CONTROL_WORD,</div><div class='del'>-				 0x10, sizeof(nvm_word),</div><div class='del'>-				 &amp;nvm_word, true, 0, NULL);</div><div class='del'>-	/* Save off last admin queue command status before releasing</div><div class='del'>-	 * the NVM</div><div class='del'>-	 */</div><div class='del'>-	last_aq_status = pf-&gt;hw.aq.asq_last_status;</div><div class='del'>-	i40e_release_nvm(&amp;pf-&gt;hw);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='del'>-			 "BW settings NOT SAVED, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, last_aq_status));</div><div class='del'>-bw_commit_out:</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * i40e_is_total_port_shutdown_enabled - read NVM and return value</div><div class='ctx'>  * if total port shutdown feature is enabled for this PF</div><div class='ctx'>  * @pf: board private structure</div><div class='hunk'>@@ -13035,8 +12963,7 @@ static int i40e_udp_tunnel_set_port(struct net_device *netdev,</div><div class='ctx'> 				     NULL);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_info(netdev, "add UDP port failed, err %pe aq_err %s\n",</div><div class='del'>-			    ERR_PTR(ret),</div><div class='del'>-			    i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			    ERR_PTR(ret), libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -13055,8 +12982,7 @@ static int i40e_udp_tunnel_unset_port(struct net_device *netdev,</div><div class='ctx'> 	ret = i40e_aq_del_udp_tunnel(hw, ti-&gt;hw_priv, NULL);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_info(netdev, "delete UDP port failed, err %pe aq_err %s\n",</div><div class='del'>-			    ERR_PTR(ret),</div><div class='del'>-			    i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			    ERR_PTR(ret), libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -13087,12 +13013,13 @@ static int i40e_get_phys_port_id(struct net_device *netdev,</div><div class='ctx'>  * @addr: the MAC address entry being added</div><div class='ctx'>  * @vid: VLAN ID</div><div class='ctx'>  * @flags: instructions from stack about fdb operation</div><div class='add'>+ * @notified: whether notification was emitted</div><div class='ctx'>  * @extack: netlink extended ack, unused currently</div><div class='ctx'>  */</div><div class='ctx'> static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			    struct net_device *dev,</div><div class='ctx'> 			    const unsigned char *addr, u16 vid,</div><div class='del'>-			    u16 flags,</div><div class='add'>+			    u16 flags, bool *notified,</div><div class='ctx'> 			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_netdev_priv *np = netdev_priv(dev);</div><div class='hunk'>@@ -13655,7 +13582,6 @@ static const struct net_device_ops i40e_netdev_ops = {</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= i40e_set_mac,</div><div class='ctx'> 	.ndo_change_mtu		= i40e_change_mtu,</div><div class='del'>-	.ndo_eth_ioctl		= i40e_ioctl,</div><div class='ctx'> 	.ndo_tx_timeout		= i40e_tx_timeout,</div><div class='ctx'> 	.ndo_vlan_rx_add_vid	= i40e_vlan_rx_add_vid,</div><div class='ctx'> 	.ndo_vlan_rx_kill_vid	= i40e_vlan_rx_kill_vid,</div><div class='hunk'>@@ -13683,6 +13609,8 @@ static const struct net_device_ops i40e_netdev_ops = {</div><div class='ctx'> 	.ndo_xsk_wakeup	        = i40e_xsk_wakeup,</div><div class='ctx'> 	.ndo_dfwd_add_station	= i40e_fwd_add,</div><div class='ctx'> 	.ndo_dfwd_del_station	= i40e_fwd_del,</div><div class='add'>+	.ndo_hwtstamp_get	= i40e_ptp_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= i40e_ptp_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -13944,8 +13872,7 @@ static int i40e_add_vsi(struct i40e_vsi *vsi)</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "couldn't get PF vsi config, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 			return -ENOENT;</div><div class='ctx'> 		}</div><div class='ctx'> 		vsi-&gt;info = ctxt.info;</div><div class='hunk'>@@ -13974,8 +13901,7 @@ static int i40e_add_vsi(struct i40e_vsi *vsi)</div><div class='ctx'> 				dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 					 "update vsi failed, err %d aq_err %s\n",</div><div class='ctx'> 					 ret,</div><div class='del'>-					 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-						     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+					 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 				ret = -ENOENT;</div><div class='ctx'> 				goto err;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -13994,8 +13920,7 @@ static int i40e_add_vsi(struct i40e_vsi *vsi)</div><div class='ctx'> 				dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 					 "update vsi failed, err %pe aq_err %s\n",</div><div class='ctx'> 					 ERR_PTR(ret),</div><div class='del'>-					 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-						    pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+					 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 				ret = -ENOENT;</div><div class='ctx'> 				goto err;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -14018,8 +13943,7 @@ static int i40e_add_vsi(struct i40e_vsi *vsi)</div><div class='ctx'> 					 "failed to configure TCs for main VSI tc_map 0x%08x, err %pe aq_err %s\n",</div><div class='ctx'> 					 enabled_tc,</div><div class='ctx'> 					 ERR_PTR(ret),</div><div class='del'>-					 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-						    pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+					 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -14113,8 +14037,7 @@ static int i40e_add_vsi(struct i40e_vsi *vsi)</div><div class='ctx'> 			dev_info(&amp;vsi-&gt;back-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "add vsi failed, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 			ret = -ENOENT;</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -14144,8 +14067,7 @@ static int i40e_add_vsi(struct i40e_vsi *vsi)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "couldn't get vsi bw info, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		/* VSI is already added so not tearing that up */</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -14593,8 +14515,7 @@ static int i40e_veb_get_bw_info(struct i40e_veb *veb)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "query veb bw config failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -14603,8 +14524,7 @@ static int i40e_veb_get_bw_info(struct i40e_veb *veb)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "query veb bw ets config failed, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -14792,8 +14712,7 @@ static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "couldn't add VEB, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -14803,16 +14722,14 @@ static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "couldn't get VEB statistics idx, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> 	ret = i40e_veb_get_bw_info(veb);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "couldn't get VEB bw info, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		i40e_aq_delete_element(&amp;pf-&gt;hw, veb-&gt;seid, NULL);</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -15007,9 +14924,7 @@ int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "get switch config failed err %d aq_err %s\n",</div><div class='del'>-				 ret,</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 ret, libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 			kfree(aq_buf);</div><div class='ctx'> 			return -ENOENT;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -15054,8 +14969,7 @@ static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acqui</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			 "couldn't fetch switch config, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(ret),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(ret), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	i40e_pf_reset_stats(pf);</div><div class='hunk'>@@ -15078,12 +14992,11 @@ static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acqui</div><div class='ctx'> 		valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;</div><div class='ctx'> 		ret = i40e_aq_set_switch_config(&amp;pf-&gt;hw, flags, valid_flags, 0,</div><div class='ctx'> 						NULL);</div><div class='del'>-		if (ret &amp;&amp; pf-&gt;hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {</div><div class='add'>+		if (ret &amp;&amp; pf-&gt;hw.aq.asq_last_status != LIBIE_AQ_RC_ESRCH) {</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "couldn't set switch config bits, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(ret),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 			/* not a fatal problem, just keep going */</div><div class='ctx'> 		}</div><div class='ctx'> 		pf-&gt;last_sw_conf_valid_flags = valid_flags;</div><div class='hunk'>@@ -15924,7 +15837,6 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	pf-&gt;udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;</div><div class='ctx'> 	pf-&gt;udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;</div><div class='del'>-	pf-&gt;udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;</div><div class='ctx'> 	pf-&gt;udp_tunnel_nic.shared = &amp;pf-&gt;udp_tunnel_shared;</div><div class='ctx'> 	pf-&gt;udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;</div><div class='ctx'> 	pf-&gt;udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |</div><div class='hunk'>@@ -15986,8 +15898,10 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 					 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "set phy mask fail, err %pe aq_err %s\n",</div><div class='del'>-			 ERR_PTR(err),</div><div class='del'>-			 i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			 ERR_PTR(err), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+</div><div class='add'>+	/* VF MDD event logs are rate limited to one second intervals */</div><div class='add'>+	ratelimit_state_init(&amp;pf-&gt;mdd_message_rate_limit, 1 * HZ, 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Reconfigure hardware for allowing smaller MSS in the case</div><div class='ctx'> 	 * of TSO, so that we avoid the MDD being fired and causing</div><div class='hunk'>@@ -16006,8 +15920,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev, "link restart failed, err %pe aq_err %s\n",</div><div class='ctx'> 				 ERR_PTR(err),</div><div class='del'>-				 i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					     pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				 libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 	}</div><div class='ctx'> 	/* The main driver is (mostly) up and happy. We need to set this state</div><div class='ctx'> 	 * before setting up the misc vector or we get a race and the vector</div><div class='hunk'>@@ -16138,8 +16051,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	err = i40e_aq_get_phy_capabilities(hw, false, false, &amp;abilities, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_dbg(&amp;pf-&gt;pdev-&gt;dev, "get requested speeds ret =  %pe last_status =  %s\n",</div><div class='del'>-			ERR_PTR(err),</div><div class='del'>-			i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			ERR_PTR(err), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 	pf-&gt;hw.phy.link_info.requested_speeds = abilities.link_speed;</div><div class='ctx'> </div><div class='ctx'> 	/* set the FEC config due to the board capabilities */</div><div class='hunk'>@@ -16149,16 +16061,19 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	err = i40e_aq_get_phy_capabilities(hw, false, true, &amp;abilities, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_dbg(&amp;pf-&gt;pdev-&gt;dev, "get supported phy types ret =  %pe last_status =  %s\n",</div><div class='del'>-			ERR_PTR(err),</div><div class='del'>-			i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			ERR_PTR(err), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> </div><div class='del'>-	/* make sure the MFS hasn't been set lower than the default */</div><div class='ctx'> #define MAX_FRAME_SIZE_DEFAULT 0x2600</div><div class='del'>-	val = FIELD_GET(I40E_PRTGL_SAH_MFS_MASK,</div><div class='del'>-			rd32(&amp;pf-&gt;hw, I40E_PRTGL_SAH));</div><div class='del'>-	if (val &lt; MAX_FRAME_SIZE_DEFAULT)</div><div class='del'>-		dev_warn(&amp;pdev-&gt;dev, "MFS for port %x (%d) has been set below the default (%d)\n",</div><div class='del'>-			 pf-&gt;hw.port, val, MAX_FRAME_SIZE_DEFAULT);</div><div class='add'>+</div><div class='add'>+	err = i40e_aq_set_mac_config(hw, MAX_FRAME_SIZE_DEFAULT, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "set mac config ret = %pe last_status = %s\n",</div><div class='add'>+			 ERR_PTR(err), libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+</div><div class='add'>+	/* Make sure the MFS is set to the expected value */</div><div class='add'>+	val = rd32(hw, I40E_PRTGL_SAH);</div><div class='add'>+	FIELD_MODIFY(I40E_PRTGL_SAH_MFS_MASK, &amp;val, MAX_FRAME_SIZE_DEFAULT);</div><div class='add'>+	wr32(hw, I40E_PRTGL_SAH, val);</div><div class='ctx'> </div><div class='ctx'> 	/* Add a filter to drop all Flow control frames from any VSI from being</div><div class='ctx'> 	 * transmitted. By doing so we stop a malicious VF from sending out</div><div class='hunk'>@@ -16412,7 +16327,7 @@ static int i40e_io_suspend(struct i40e_pf *pf)</div><div class='ctx'> 	set_bit(__I40E_DOWN, pf-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure service task will not be running */</div><div class='del'>-	del_timer_sync(&amp;pf-&gt;service_timer);</div><div class='add'>+	timer_delete_sync(&amp;pf-&gt;service_timer);</div><div class='ctx'> 	cancel_work_sync(&amp;pf-&gt;service_task);</div><div class='ctx'> </div><div class='ctx'> 	/* Client close must be called explicitly here because the timer</div><div class='hunk'>@@ -16540,7 +16455,6 @@ static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pci_set_master(pdev);</div><div class='ctx'> 		pci_restore_state(pdev);</div><div class='del'>-		pci_save_state(pdev);</div><div class='ctx'> 		pci_wake_from_d3(pdev, false);</div><div class='ctx'> </div><div class='ctx'> 		reg = rd32(&amp;pf-&gt;hw, I40E_GLGEN_RTRIG);</div><div class='hunk'>@@ -16611,7 +16525,7 @@ static void i40e_shutdown(struct pci_dev *pdev)</div><div class='ctx'> 	set_bit(__I40E_SUSPENDED, pf-&gt;state);</div><div class='ctx'> 	set_bit(__I40E_DOWN, pf-&gt;state);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;pf-&gt;service_timer);</div><div class='add'>+	timer_delete_sync(&amp;pf-&gt;service_timer);</div><div class='ctx'> 	cancel_work_sync(&amp;pf-&gt;service_task);</div><div class='ctx'> 	i40e_cloud_filter_exit(pf);</div><div class='ctx'> 	i40e_fdir_teardown(pf);</div><div class='hunk'>@@ -16720,7 +16634,7 @@ static int __init i40e_init_module(void)</div><div class='ctx'> 	 * since we need to be able to guarantee forward progress even under</div><div class='ctx'> 	 * memory pressure.</div><div class='ctx'> 	 */</div><div class='del'>-	i40e_wq = alloc_workqueue("%s", 0, 0, i40e_driver_name);</div><div class='add'>+	i40e_wq = alloc_workqueue("%s", WQ_PERCPU, 0, i40e_driver_name);</div><div class='ctx'> 	if (!i40e_wq) {</div><div class='ctx'> 		pr_err("%s: Failed to create workqueue\n", i40e_driver_name);</div><div class='ctx'> 		return -ENOMEM;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_nvm.c b/drivers/net/ethernet/intel/i40e/i40e_nvm.c<br/>index 7f0936f4e05e..ed3c54e36be3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_nvm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_nvm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_nvm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_nvm.c</a></div><div class='hunk'>@@ -997,7 +997,7 @@ static int i40e_nvmupd_exec_aq(struct i40e_hw *hw,</div><div class='ctx'> 			       u8 *bytes, int *perrno)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_asq_cmd_details cmd_details;</div><div class='del'>-	struct i40e_aq_desc *aq_desc;</div><div class='add'>+	struct libie_aq_desc *aq_desc;</div><div class='ctx'> 	u32 buff_size = 0;</div><div class='ctx'> 	u8 *buff = NULL;</div><div class='ctx'> 	u32 aq_desc_len;</div><div class='hunk'>@@ -1011,7 +1011,7 @@ static int i40e_nvmupd_exec_aq(struct i40e_hw *hw,</div><div class='ctx'> 	memset(&amp;cmd_details, 0, sizeof(cmd_details));</div><div class='ctx'> 	cmd_details.wb_desc = &amp;hw-&gt;nvm_wb_desc;</div><div class='ctx'> </div><div class='del'>-	aq_desc_len = sizeof(struct i40e_aq_desc);</div><div class='add'>+	aq_desc_len = sizeof(struct libie_aq_desc);</div><div class='ctx'> 	memset(&amp;hw-&gt;nvm_wb_desc, 0, aq_desc_len);</div><div class='ctx'> </div><div class='ctx'> 	/* get the aq descriptor */</div><div class='hunk'>@@ -1022,7 +1022,7 @@ static int i40e_nvmupd_exec_aq(struct i40e_hw *hw,</div><div class='ctx'> 		*perrno = -EINVAL;</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	aq_desc = (struct i40e_aq_desc *)bytes;</div><div class='add'>+	aq_desc = (struct libie_aq_desc *)bytes;</div><div class='ctx'> </div><div class='ctx'> 	/* if data buffer needed, make sure it's ready */</div><div class='ctx'> 	aq_data_len = cmd-&gt;data_size - aq_desc_len;</div><div class='hunk'>@@ -1053,7 +1053,7 @@ static int i40e_nvmupd_exec_aq(struct i40e_hw *hw,</div><div class='ctx'> 		i40e_debug(hw, I40E_DEBUG_NVM,</div><div class='ctx'> 			   "%s err %pe aq_err %s\n",</div><div class='ctx'> 			   __func__, ERR_PTR(status),</div><div class='del'>-			   i40e_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			   libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		*perrno = i40e_aq_rc_to_posix(status, hw-&gt;aq.asq_last_status);</div><div class='ctx'> 		return status;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1087,7 +1087,7 @@ static int i40e_nvmupd_get_aq_result(struct i40e_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);</div><div class='ctx'> </div><div class='del'>-	aq_desc_len = sizeof(struct i40e_aq_desc);</div><div class='add'>+	aq_desc_len = sizeof(struct libie_aq_desc);</div><div class='ctx'> 	aq_total_len = aq_desc_len + le16_to_cpu(hw-&gt;nvm_wb_desc.datalen);</div><div class='ctx'> </div><div class='ctx'> 	/* check offset range */</div><div class='hunk'>@@ -1154,7 +1154,7 @@ static int i40e_nvmupd_get_aq_event(struct i40e_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);</div><div class='ctx'> </div><div class='del'>-	aq_desc_len = sizeof(struct i40e_aq_desc);</div><div class='add'>+	aq_desc_len = sizeof(struct libie_aq_desc);</div><div class='ctx'> 	aq_total_len = aq_desc_len + le16_to_cpu(hw-&gt;nvm_aq_event_desc.datalen);</div><div class='ctx'> </div><div class='ctx'> 	/* check copylength range */</div><div class='hunk'>@@ -1442,7 +1442,7 @@ retry:</div><div class='ctx'> 	 * so here we try to reacquire the semaphore then retry the write.</div><div class='ctx'> 	 * We only do one retry, then give up.</div><div class='ctx'> 	 */</div><div class='del'>-	if (status &amp;&amp; hw-&gt;aq.asq_last_status == I40E_AQ_RC_EBUSY &amp;&amp;</div><div class='add'>+	if (status &amp;&amp; hw-&gt;aq.asq_last_status == LIBIE_AQ_RC_EBUSY &amp;&amp;</div><div class='ctx'> 	    !retry_attempt) {</div><div class='ctx'> 		u32 old_asq_status = hw-&gt;aq.asq_last_status;</div><div class='ctx'> 		int old_status = status;</div><div class='hunk'>@@ -1628,9 +1628,9 @@ void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw)</div><div class='ctx'>  * @desc: AdminQ descriptor</div><div class='ctx'>  **/</div><div class='ctx'> void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,</div><div class='del'>-				  struct i40e_aq_desc *desc)</div><div class='add'>+				  struct libie_aq_desc *desc)</div><div class='ctx'> {</div><div class='del'>-	u32 aq_desc_len = sizeof(struct i40e_aq_desc);</div><div class='add'>+	u32 aq_desc_len = sizeof(struct libie_aq_desc);</div><div class='ctx'> </div><div class='ctx'> 	if (opcode == hw-&gt;nvm_wait_opcode) {</div><div class='ctx'> 		memcpy(&amp;hw-&gt;nvm_aq_event_desc, desc, aq_desc_len);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_prototype.h b/drivers/net/ethernet/intel/i40e/i40e_prototype.h<br/>index 5a0699ca7ce5..26bb7bffe361 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_prototype.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_prototype.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_prototype.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_prototype.h</a></div><div class='hunk'>@@ -23,29 +23,22 @@ int i40e_clean_arq_element(struct i40e_hw *hw,</div><div class='ctx'> 			   struct i40e_arq_event_info *e,</div><div class='ctx'> 			   u16 *events_pending);</div><div class='ctx'> int</div><div class='del'>-i40e_asq_send_command(struct i40e_hw *hw, struct i40e_aq_desc *desc,</div><div class='add'>+i40e_asq_send_command(struct i40e_hw *hw, struct libie_aq_desc *desc,</div><div class='ctx'> 		      void *buff, /* can be NULL */ u16  buff_size,</div><div class='ctx'> 		      struct i40e_asq_cmd_details *cmd_details);</div><div class='ctx'> int</div><div class='del'>-i40e_asq_send_command_v2(struct i40e_hw *hw,</div><div class='del'>-			 struct i40e_aq_desc *desc,</div><div class='del'>-			 void *buff, /* can be NULL */</div><div class='del'>-			 u16  buff_size,</div><div class='del'>-			 struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-			 enum i40e_admin_queue_err *aq_status);</div><div class='del'>-int</div><div class='del'>-i40e_asq_send_command_atomic(struct i40e_hw *hw, struct i40e_aq_desc *desc,</div><div class='add'>+i40e_asq_send_command_atomic(struct i40e_hw *hw, struct libie_aq_desc *desc,</div><div class='ctx'> 			     void *buff, /* can be NULL */ u16  buff_size,</div><div class='ctx'> 			     struct i40e_asq_cmd_details *cmd_details,</div><div class='ctx'> 			     bool is_atomic_context);</div><div class='ctx'> int</div><div class='ctx'> i40e_asq_send_command_atomic_v2(struct i40e_hw *hw,</div><div class='del'>-				struct i40e_aq_desc *desc,</div><div class='add'>+				struct libie_aq_desc *desc,</div><div class='ctx'> 				void *buff, /* can be NULL */</div><div class='ctx'> 				u16  buff_size,</div><div class='ctx'> 				struct i40e_asq_cmd_details *cmd_details,</div><div class='ctx'> 				bool is_atomic_context,</div><div class='del'>-				enum i40e_admin_queue_err *aq_status);</div><div class='add'>+				enum libie_aq_err *aq_status);</div><div class='ctx'> </div><div class='ctx'> /* debug function for adminq */</div><div class='ctx'> void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,</div><div class='hunk'>@@ -53,7 +46,6 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,</div><div class='ctx'> </div><div class='ctx'> bool i40e_check_asq_alive(struct i40e_hw *hw);</div><div class='ctx'> int i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);</div><div class='del'>-const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err);</div><div class='ctx'> </div><div class='ctx'> int i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 			bool pf_lut, u8 *lut, u16 lut_size);</div><div class='hunk'>@@ -72,8 +64,6 @@ int i40e_led_set_phy(struct i40e_hw *hw, bool on,</div><div class='ctx'> 		     u16 led_addr, u32 mode);</div><div class='ctx'> int i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr,</div><div class='ctx'> 		     u16 *val);</div><div class='del'>-int i40e_blink_phy_link_led(struct i40e_hw *hw,</div><div class='del'>-			    u32 time, u32 interval);</div><div class='ctx'> </div><div class='ctx'> /* admin send queue commands */</div><div class='ctx'> </div><div class='hunk'>@@ -108,6 +98,8 @@ int i40e_aq_set_mac_loopback(struct i40e_hw *hw,</div><div class='ctx'> 			     struct i40e_asq_cmd_details *cmd_details);</div><div class='ctx'> int i40e_aq_set_phy_int_mask(struct i40e_hw *hw, u16 mask,</div><div class='ctx'> 			     struct i40e_asq_cmd_details *cmd_details);</div><div class='add'>+int i40e_aq_set_mac_config(struct i40e_hw *hw, u16 max_frame_size,</div><div class='add'>+			   struct i40e_asq_cmd_details *cmd_details);</div><div class='ctx'> int i40e_aq_clear_pxe_mode(struct i40e_hw *hw,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details);</div><div class='ctx'> int i40e_aq_set_link_restart_an(struct i40e_hw *hw,</div><div class='hunk'>@@ -141,9 +133,6 @@ int i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw,</div><div class='ctx'> int i40e_aq_set_vsi_bc_promisc_on_vlan(struct i40e_hw *hw,</div><div class='ctx'> 				       u16 seid, bool enable, u16 vid,</div><div class='ctx'> 				       struct i40e_asq_cmd_details *cmd_details);</div><div class='del'>-int i40e_aq_set_vsi_vlan_promisc(struct i40e_hw *hw,</div><div class='del'>-				 u16 seid, bool enable,</div><div class='del'>-				 struct i40e_asq_cmd_details *cmd_details);</div><div class='ctx'> int i40e_aq_get_vsi_params(struct i40e_hw *hw,</div><div class='ctx'> 			   struct i40e_vsi_context *vsi_ctx,</div><div class='ctx'> 			   struct i40e_asq_cmd_details *cmd_details);</div><div class='hunk'>@@ -167,7 +156,7 @@ int</div><div class='ctx'> i40e_aq_add_macvlan_v2(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 		       struct i40e_aqc_add_macvlan_element_data *mv_list,</div><div class='ctx'> 		       u16 count, struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-		       enum i40e_admin_queue_err *aq_status);</div><div class='add'>+		       enum libie_aq_err *aq_status);</div><div class='ctx'> int i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 vsi_id,</div><div class='ctx'> 			   struct i40e_aqc_remove_macvlan_element_data *mv_list,</div><div class='ctx'> 			   u16 count, struct i40e_asq_cmd_details *cmd_details);</div><div class='hunk'>@@ -175,15 +164,7 @@ int</div><div class='ctx'> i40e_aq_remove_macvlan_v2(struct i40e_hw *hw, u16 seid,</div><div class='ctx'> 			  struct i40e_aqc_remove_macvlan_element_data *mv_list,</div><div class='ctx'> 			  u16 count, struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-			  enum i40e_admin_queue_err *aq_status);</div><div class='del'>-int i40e_aq_add_mirrorrule(struct i40e_hw *hw, u16 sw_seid,</div><div class='del'>-			   u16 rule_type, u16 dest_vsi, u16 count, __le16 *mr_list,</div><div class='del'>-			   struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-			   u16 *rule_id, u16 *rules_used, u16 *rules_free);</div><div class='del'>-int i40e_aq_delete_mirrorrule(struct i40e_hw *hw, u16 sw_seid,</div><div class='del'>-			      u16 rule_type, u16 rule_id, u16 count, __le16 *mr_list,</div><div class='del'>-			      struct i40e_asq_cmd_details *cmd_details,</div><div class='del'>-			      u16 *rules_used, u16 *rules_free);</div><div class='add'>+			  enum libie_aq_err *aq_status);</div><div class='ctx'> </div><div class='ctx'> int i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,</div><div class='ctx'> 			   u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,</div><div class='hunk'>@@ -220,9 +201,6 @@ int i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,</div><div class='ctx'> 		       u32 offset, u16 length, void *data,</div><div class='ctx'> 		       bool last_command, u8 preservation_flags,</div><div class='ctx'> 		       struct i40e_asq_cmd_details *cmd_details);</div><div class='del'>-int i40e_aq_rearrange_nvm(struct i40e_hw *hw,</div><div class='del'>-			  u8 rearrange_nvm,</div><div class='del'>-			  struct i40e_asq_cmd_details *cmd_details);</div><div class='ctx'> int i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,</div><div class='ctx'> 			 u8 mib_type, void *buff, u16 buff_size,</div><div class='ctx'> 			 u16 *local_len, u16 *remote_len,</div><div class='hunk'>@@ -234,9 +212,6 @@ i40e_aq_set_lldp_mib(struct i40e_hw *hw,</div><div class='ctx'> int i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,</div><div class='ctx'> 				      bool enable_update,</div><div class='ctx'> 				      struct i40e_asq_cmd_details *cmd_details);</div><div class='del'>-int</div><div class='del'>-i40e_aq_restore_lldp(struct i40e_hw *hw, u8 *setting, bool restore,</div><div class='del'>-		     struct i40e_asq_cmd_details *cmd_details);</div><div class='ctx'> int i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,</div><div class='ctx'> 		      bool persist,</div><div class='ctx'> 		      struct i40e_asq_cmd_details *cmd_details);</div><div class='hunk'>@@ -365,7 +340,7 @@ int i40e_nvmupd_command(struct i40e_hw *hw,</div><div class='ctx'> 			struct i40e_nvm_access *cmd,</div><div class='ctx'> 			u8 *bytes, int *errno);</div><div class='ctx'> void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,</div><div class='del'>-				  struct i40e_aq_desc *desc);</div><div class='add'>+				  struct libie_aq_desc *desc);</div><div class='ctx'> void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw);</div><div class='ctx'> void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status);</div><div class='ctx'> </div><div class='hunk'>@@ -458,13 +433,7 @@ int i40e_read_phy_register_clause45(struct i40e_hw *hw,</div><div class='ctx'> 				    u8 page, u16 reg, u8 phy_addr, u16 *value);</div><div class='ctx'> int i40e_write_phy_register_clause45(struct i40e_hw *hw,</div><div class='ctx'> 				     u8 page, u16 reg, u8 phy_addr, u16 value);</div><div class='del'>-int i40e_read_phy_register(struct i40e_hw *hw, u8 page, u16 reg,</div><div class='del'>-			   u8 phy_addr, u16 *value);</div><div class='del'>-int i40e_write_phy_register(struct i40e_hw *hw, u8 page, u16 reg,</div><div class='del'>-			    u8 phy_addr, u16 value);</div><div class='ctx'> u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num);</div><div class='del'>-int i40e_blink_phy_link_led(struct i40e_hw *hw,</div><div class='del'>-			    u32 time, u32 interval);</div><div class='ctx'> int i40e_aq_write_ddp(struct i40e_hw *hw, void *buff,</div><div class='ctx'> 		      u16 buff_size, u32 track_id,</div><div class='ctx'> 		      u32 *error_offset, u32 *error_info,</div><div class='hunk'>@@ -477,20 +446,12 @@ int i40e_aq_get_ddp_list(struct i40e_hw *hw, void *buff,</div><div class='ctx'> struct i40e_generic_seg_header *</div><div class='ctx'> i40e_find_segment_in_package(u32 segment_type,</div><div class='ctx'> 			     struct i40e_package_header *pkg_header);</div><div class='del'>-struct i40e_profile_section_header *</div><div class='del'>-i40e_find_section_in_profile(u32 section_type,</div><div class='del'>-			     struct i40e_profile_segment *profile);</div><div class='ctx'> int</div><div class='ctx'> i40e_write_profile(struct i40e_hw *hw, struct i40e_profile_segment *i40e_seg,</div><div class='ctx'> 		   u32 track_id);</div><div class='ctx'> int</div><div class='ctx'> i40e_rollback_profile(struct i40e_hw *hw, struct i40e_profile_segment *i40e_seg,</div><div class='ctx'> 		      u32 track_id);</div><div class='del'>-int</div><div class='del'>-i40e_add_pinfo_to_list(struct i40e_hw *hw,</div><div class='del'>-		       struct i40e_profile_segment *profile,</div><div class='del'>-		       u8 *profile_info_sec, u32 track_id);</div><div class='del'>-</div><div class='ctx'> /* i40e_ddp */</div><div class='ctx'> int i40e_ddp_flash(struct net_device *netdev, struct ethtool_flash *flash);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c<br/>index b72a4b5d76b9..33535418178b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_ptp.c</a></div><div class='hunk'>@@ -550,7 +550,7 @@ static int i40e_ptp_enable_pin(struct i40e_pf *pf, unsigned int chan,</div><div class='ctx'> 	pins.gpio_4 = pf-&gt;ptp_pins-&gt;gpio_4;</div><div class='ctx'> </div><div class='ctx'> 	/* To turn on the pin - find the corresponding one based on</div><div class='del'>-	 * the given index. To to turn the function off - find</div><div class='add'>+	 * the given index. To turn the function off - find</div><div class='ctx'> 	 * which pin had it assigned. Don't use ptp_find_pin here</div><div class='ctx'> 	 * because it tries to lock the pincfg_mux which is locked by</div><div class='ctx'> 	 * ptp_pin_store() that calls here.</div><div class='hunk'>@@ -912,23 +912,26 @@ void i40e_ptp_set_increment(struct i40e_pf *pf)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_ptp_get_ts_config - ioctl interface to read the HW timestamping</div><div class='del'>- * @pf: Board private structure</div><div class='del'>- * @ifr: ioctl data</div><div class='add'>+ * i40e_ptp_hwtstamp_get - interface to read the HW timestamping</div><div class='add'>+ * @netdev: Network device structure</div><div class='add'>+ * @config: Timestamping configuration structure</div><div class='ctx'>  *</div><div class='ctx'>  * Obtain the current hardware timestamping settigs as requested. To do this,</div><div class='ctx'>  * keep a shadow copy of the timestamp settings rather than attempting to</div><div class='ctx'>  * deconstruct it from the registers.</div><div class='ctx'>  **/</div><div class='del'>-int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr)</div><div class='add'>+int i40e_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			  struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config *config = &amp;pf-&gt;tstamp_config;</div><div class='add'>+	struct i40e_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct i40e_pf *pf = np-&gt;vsi-&gt;back;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(I40E_FLAG_PTP_ENA, pf-&gt;flags))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, config, sizeof(*config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	*config = pf-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1167,7 +1170,7 @@ int i40e_ptp_alloc_pins(struct i40e_pf *pf)</div><div class='ctx'>  * more broad if the specific filter is not directly supported.</div><div class='ctx'>  **/</div><div class='ctx'> static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,</div><div class='del'>-				       struct hwtstamp_config *config)</div><div class='add'>+				       struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	u32 tsyntype, regval;</div><div class='hunk'>@@ -1290,9 +1293,10 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_ptp_set_ts_config - ioctl interface to control the HW timestamping</div><div class='del'>- * @pf: Board private structure</div><div class='del'>- * @ifr: ioctl data</div><div class='add'>+ * i40e_ptp_hwtstamp_set - interface to control the HW timestamping</div><div class='add'>+ * @netdev: Network device structure</div><div class='add'>+ * @config: Timestamping configuration structure</div><div class='add'>+ * @extack: Netlink extended ack structure for error reporting</div><div class='ctx'>  *</div><div class='ctx'>  * Respond to the user filter requests and make the appropriate hardware</div><div class='ctx'>  * changes here. The XL710 cannot support splitting of the Tx/Rx timestamping</div><div class='hunk'>@@ -1303,26 +1307,25 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,</div><div class='ctx'>  * as the user receives the timestamps they care about and the user is notified</div><div class='ctx'>  * the filter has been broadened.</div><div class='ctx'>  **/</div><div class='del'>-int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr)</div><div class='add'>+int i40e_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			  struct kernel_hwtstamp_config *config,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	struct i40e_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct i40e_pf *pf = np-&gt;vsi-&gt;back;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(I40E_FLAG_PTP_ENA, pf-&gt;flags))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	err = i40e_ptp_set_timestamp_mode(pf, &amp;config);</div><div class='add'>+	err = i40e_ptp_set_timestamp_mode(pf, config);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* save these settings for future reference */</div><div class='del'>-	pf-&gt;tstamp_config = config;</div><div class='add'>+	pf-&gt;tstamp_config = *config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c<br/>index c006f716a3bd..cc0b9efc2637 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_txrx.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Copyright(c) 2013 - 2018 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+#include &lt;linux/net/intel/libie/pctype.h&gt;</div><div class='ctx'> #include &lt;linux/net/intel/libie/rx.h&gt;</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;</div><div class='ctx'> #include &lt;linux/sctp.h&gt;</div><div class='hunk'>@@ -397,12 +398,12 @@ static int i40e_add_del_fdir_udp(struct i40e_vsi *vsi,</div><div class='ctx'> 		ret = i40e_prepare_fdir_filter</div><div class='ctx'> 			(pf, fd_data, add, raw_packet,</div><div class='ctx'> 			 I40E_UDPIP_DUMMY_PACKET_LEN,</div><div class='del'>-			 I40E_FILTER_PCTYPE_NONF_IPV4_UDP);</div><div class='add'>+			 LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = i40e_prepare_fdir_filter</div><div class='ctx'> 			(pf, fd_data, add, raw_packet,</div><div class='ctx'> 			 I40E_UDPIP6_DUMMY_PACKET_LEN,</div><div class='del'>-			 I40E_FILTER_PCTYPE_NONF_IPV6_UDP);</div><div class='add'>+			 LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree(raw_packet);</div><div class='hunk'>@@ -444,12 +445,12 @@ static int i40e_add_del_fdir_tcp(struct i40e_vsi *vsi,</div><div class='ctx'> 		ret = i40e_prepare_fdir_filter</div><div class='ctx'> 			(pf, fd_data, add, raw_packet,</div><div class='ctx'> 			 I40E_TCPIP_DUMMY_PACKET_LEN,</div><div class='del'>-			 I40E_FILTER_PCTYPE_NONF_IPV4_TCP);</div><div class='add'>+			 LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = i40e_prepare_fdir_filter</div><div class='ctx'> 			(pf, fd_data, add, raw_packet,</div><div class='ctx'> 			 I40E_TCPIP6_DUMMY_PACKET_LEN,</div><div class='del'>-			 I40E_FILTER_PCTYPE_NONF_IPV6_TCP);</div><div class='add'>+			 LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree(raw_packet);</div><div class='hunk'>@@ -499,12 +500,12 @@ static int i40e_add_del_fdir_sctp(struct i40e_vsi *vsi,</div><div class='ctx'> 		ret = i40e_prepare_fdir_filter</div><div class='ctx'> 			(pf, fd_data, add, raw_packet,</div><div class='ctx'> 			 I40E_SCTPIP_DUMMY_PACKET_LEN,</div><div class='del'>-			 I40E_FILTER_PCTYPE_NONF_IPV4_SCTP);</div><div class='add'>+			 LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = i40e_prepare_fdir_filter</div><div class='ctx'> 			(pf, fd_data, add, raw_packet,</div><div class='ctx'> 			 I40E_SCTPIP6_DUMMY_PACKET_LEN,</div><div class='del'>-			 I40E_FILTER_PCTYPE_NONF_IPV6_SCTP);</div><div class='add'>+			 LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree(raw_packet);</div><div class='hunk'>@@ -543,11 +544,11 @@ static int i40e_add_del_fdir_ip(struct i40e_vsi *vsi,</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (ipv4) {</div><div class='del'>-		iter_start = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;</div><div class='del'>-		iter_end = I40E_FILTER_PCTYPE_FRAG_IPV4;</div><div class='add'>+		iter_start = LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER;</div><div class='add'>+		iter_end = LIBIE_FILTER_PCTYPE_FRAG_IPV4;</div><div class='ctx'> 	} else {</div><div class='del'>-		iter_start = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;</div><div class='del'>-		iter_end = I40E_FILTER_PCTYPE_FRAG_IPV6;</div><div class='add'>+		iter_start = LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER;</div><div class='add'>+		iter_end = LIBIE_FILTER_PCTYPE_FRAG_IPV6;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = iter_start; i &lt;= iter_end; i++) {</div><div class='hunk'>@@ -947,9 +948,6 @@ static bool i40e_clean_tx_irq(struct i40e_vsi *vsi,</div><div class='ctx'> 		if (!eop_desc)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		/* prevent any other reads prior to eop_desc */</div><div class='del'>-		smp_rmb();</div><div class='del'>-</div><div class='ctx'> 		i40e_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);</div><div class='ctx'> 		/* we have caught up to head, no work left to do */</div><div class='ctx'> 		if (tx_head == tx_desc)</div><div class='hunk'>@@ -2150,10 +2148,10 @@ static struct sk_buff *i40e_construct_skb(struct i40e_ring *rx_ring,</div><div class='ctx'> 		memcpy(&amp;skinfo-&gt;frags[skinfo-&gt;nr_frags], &amp;sinfo-&gt;frags[0],</div><div class='ctx'> 		       sizeof(skb_frag_t) * nr_frags);</div><div class='ctx'> </div><div class='del'>-		xdp_update_skb_shared_info(skb, skinfo-&gt;nr_frags + nr_frags,</div><div class='del'>-					   sinfo-&gt;xdp_frags_size,</div><div class='del'>-					   nr_frags * xdp-&gt;frame_sz,</div><div class='del'>-					   xdp_buff_is_frag_pfmemalloc(xdp));</div><div class='add'>+		xdp_update_skb_frags_info(skb, skinfo-&gt;nr_frags + nr_frags,</div><div class='add'>+					  sinfo-&gt;xdp_frags_size,</div><div class='add'>+					  nr_frags * xdp-&gt;frame_sz,</div><div class='add'>+					  xdp_buff_get_skb_flags(xdp));</div><div class='ctx'> </div><div class='ctx'> 		/* First buffer has already been processed, so bump ntc */</div><div class='ctx'> 		if (++rx_ring-&gt;next_to_clean == rx_ring-&gt;count)</div><div class='hunk'>@@ -2205,10 +2203,9 @@ static struct sk_buff *i40e_build_skb(struct i40e_ring *rx_ring,</div><div class='ctx'> 		skb_metadata_set(skb, metasize);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(xdp_buff_has_frags(xdp))) {</div><div class='del'>-		xdp_update_skb_shared_info(skb, nr_frags,</div><div class='del'>-					   sinfo-&gt;xdp_frags_size,</div><div class='del'>-					   nr_frags * xdp-&gt;frame_sz,</div><div class='del'>-					   xdp_buff_is_frag_pfmemalloc(xdp));</div><div class='add'>+		xdp_update_skb_frags_info(skb, nr_frags, sinfo-&gt;xdp_frags_size,</div><div class='add'>+					  nr_frags * xdp-&gt;frame_sz,</div><div class='add'>+					  xdp_buff_get_skb_flags(xdp));</div><div class='ctx'> </div><div class='ctx'> 		i40e_process_rx_buffs(rx_ring, I40E_XDP_PASS, xdp);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -2948,9 +2945,9 @@ static void i40e_atr(struct i40e_ring *tx_ring, struct sk_buff *skb,</div><div class='ctx'> 	flex_ptype = FIELD_PREP(I40E_TXD_FLTR_QW0_QINDEX_MASK,</div><div class='ctx'> 				tx_ring-&gt;queue_index);</div><div class='ctx'> 	flex_ptype |= (tx_flags &amp; I40E_TX_FLAGS_IPV4) ?</div><div class='del'>-		      (I40E_FILTER_PCTYPE_NONF_IPV4_TCP &lt;&lt;</div><div class='add'>+		      (LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP &lt;&lt;</div><div class='ctx'> 		       I40E_TXD_FLTR_QW0_PCTYPE_SHIFT) :</div><div class='del'>-		      (I40E_FILTER_PCTYPE_NONF_IPV6_TCP &lt;&lt;</div><div class='add'>+		      (LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP &lt;&lt;</div><div class='ctx'> 		       I40E_TXD_FLTR_QW0_PCTYPE_SHIFT);</div><div class='ctx'> </div><div class='ctx'> 	flex_ptype |= tx_ring-&gt;vsi-&gt;id &lt;&lt; I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.h b/drivers/net/ethernet/intel/i40e/i40e_txrx.h<br/>index 7c26c9a2bf65..1e5fd63d47f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_txrx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_txrx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_txrx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_txrx.h</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #ifndef _I40E_TXRX_H_</div><div class='ctx'> #define _I40E_TXRX_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/net/intel/libie/pctype.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='ctx'> #include "i40e_type.h"</div><div class='ctx'> </div><div class='hunk'>@@ -71,30 +72,30 @@ enum i40e_dyn_idx {</div><div class='ctx'> #define I40E_SW_ITR    I40E_IDX_ITR2</div><div class='ctx'> </div><div class='ctx'> /* Supported RSS offloads */</div><div class='del'>-#define I40E_DEFAULT_RSS_HENA ( \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_L2_PAYLOAD))</div><div class='del'>-</div><div class='del'>-#define I40E_DEFAULT_RSS_HENA_EXPANDED (I40E_DEFAULT_RSS_HENA | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \</div><div class='del'>-	BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))</div><div class='del'>-</div><div class='del'>-#define i40e_pf_get_default_rss_hena(pf) \</div><div class='add'>+#define I40E_DEFAULT_RSS_HASHCFG ( \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV4) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV6) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_L2_PAYLOAD))</div><div class='add'>+</div><div class='add'>+#define I40E_DEFAULT_RSS_HASHCFG_EXPANDED (I40E_DEFAULT_RSS_HASHCFG | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))</div><div class='add'>+</div><div class='add'>+#define i40e_pf_get_default_rss_hashcfg(pf) \</div><div class='ctx'> 	(test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE, (pf)-&gt;hw.caps) ? \</div><div class='del'>-	 I40E_DEFAULT_RSS_HENA_EXPANDED : I40E_DEFAULT_RSS_HENA)</div><div class='add'>+	 I40E_DEFAULT_RSS_HASHCFG_EXPANDED : I40E_DEFAULT_RSS_HASHCFG)</div><div class='ctx'> </div><div class='ctx'> /* Supported Rx Buffer Sizes (a multiple of 128) */</div><div class='ctx'> #define I40E_RXBUFFER_256   256</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_type.h b/drivers/net/ethernet/intel/i40e/i40e_type.h<br/>index 28568e126850..ed8bbdb586da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_type.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_type.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_type.h</a></div><div class='hunk'>@@ -24,7 +24,7 @@</div><div class='ctx'> </div><div class='ctx'> /* forward declaration */</div><div class='ctx'> struct i40e_hw;</div><div class='del'>-typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct i40e_aq_desc *);</div><div class='add'>+typedef void (*I40E_ADMINQ_CALLBACK)(struct i40e_hw *, struct libie_aq_desc *);</div><div class='ctx'> </div><div class='ctx'> /* Data type manipulation macros. */</div><div class='ctx'> </div><div class='hunk'>@@ -555,8 +555,8 @@ struct i40e_hw {</div><div class='ctx'> </div><div class='ctx'> 	/* state of nvm update process */</div><div class='ctx'> 	enum i40e_nvmupd_state nvmupd_state;</div><div class='del'>-	struct i40e_aq_desc nvm_wb_desc;</div><div class='del'>-	struct i40e_aq_desc nvm_aq_event_desc;</div><div class='add'>+	struct libie_aq_desc nvm_wb_desc;</div><div class='add'>+	struct libie_aq_desc nvm_aq_event_desc;</div><div class='ctx'> 	struct i40e_virt_mem nvm_buff;</div><div class='ctx'> 	bool nvm_release_on_done;</div><div class='ctx'> 	u16 nvm_wait_opcode;</div><div class='hunk'>@@ -929,38 +929,6 @@ struct i40e_filter_program_desc {</div><div class='ctx'> #define I40E_TXD_FLTR_QW0_PCTYPE_MASK	(0x3FUL &lt;&lt; \</div><div class='ctx'> 					 I40E_TXD_FLTR_QW0_PCTYPE_SHIFT)</div><div class='ctx'> </div><div class='del'>-/* Packet Classifier Types for filters */</div><div class='del'>-enum i40e_filter_pctype {</div><div class='del'>-	/* Note: Values 0-28 are reserved for future use.</div><div class='del'>-	 * Value 29, 30, 32 are not supported on XL710 and X710.</div><div class='del'>-	 */</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP	= 29,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP	= 30,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_IPV4_UDP		= 31,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK	= 32,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_IPV4_TCP		= 33,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_IPV4_SCTP		= 34,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_IPV4_OTHER		= 35,</div><div class='del'>-	I40E_FILTER_PCTYPE_FRAG_IPV4			= 36,</div><div class='del'>-	/* Note: Values 37-38 are reserved for future use.</div><div class='del'>-	 * Value 39, 40, 42 are not supported on XL710 and X710.</div><div class='del'>-	 */</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP	= 39,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP	= 40,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_IPV6_UDP		= 41,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK	= 42,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_IPV6_TCP		= 43,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_IPV6_SCTP		= 44,</div><div class='del'>-	I40E_FILTER_PCTYPE_NONF_IPV6_OTHER		= 45,</div><div class='del'>-	I40E_FILTER_PCTYPE_FRAG_IPV6			= 46,</div><div class='del'>-	/* Note: Value 47 is reserved for future use */</div><div class='del'>-	I40E_FILTER_PCTYPE_FCOE_OX			= 48,</div><div class='del'>-	I40E_FILTER_PCTYPE_FCOE_RX			= 49,</div><div class='del'>-	I40E_FILTER_PCTYPE_FCOE_OTHER			= 50,</div><div class='del'>-	/* Note: Values 51-62 are reserved for future use */</div><div class='del'>-	I40E_FILTER_PCTYPE_L2_PAYLOAD			= 63,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum i40e_filter_program_desc_dest {</div><div class='ctx'> 	I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET		= 0x0,</div><div class='ctx'> 	I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX	= 0x1,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c<br/>index dfa785e39458..8b30a3accd31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c</a></div><div class='hunk'>@@ -216,7 +216,7 @@ void i40e_vc_notify_vf_reset(struct i40e_vf *vf)</div><div class='ctx'>  * @notify_vf: notify vf about reset or not</div><div class='ctx'>  * Reset VF handler.</div><div class='ctx'>  **/</div><div class='del'>-static void i40e_vc_reset_vf(struct i40e_vf *vf, bool notify_vf)</div><div class='add'>+void i40e_vc_reset_vf(struct i40e_vf *vf, bool notify_vf)</div><div class='ctx'> {</div><div class='ctx'> 	struct i40e_pf *pf = vf-&gt;pf;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -448,7 +448,7 @@ static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,</div><div class='ctx'> 		    (qtype &lt;&lt; I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |</div><div class='ctx'> 		    (pf_queue_id &lt;&lt; I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |</div><div class='ctx'> 		    BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |</div><div class='del'>-		    (itr_idx &lt;&lt; I40E_QINT_RQCTL_ITR_INDX_SHIFT);</div><div class='add'>+		    FIELD_PREP(I40E_QINT_RQCTL_ITR_INDX_MASK, itr_idx);</div><div class='ctx'> 		wr32(hw, reg_idx, reg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -653,6 +653,13 @@ static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,</div><div class='ctx'> </div><div class='ctx'> 	/* only set the required fields */</div><div class='ctx'> 	tx_ctx.base = info-&gt;dma_ring_addr / 128;</div><div class='add'>+</div><div class='add'>+	/* ring_len has to be multiple of 8 */</div><div class='add'>+	if (!IS_ALIGNED(info-&gt;ring_len, 8) ||</div><div class='add'>+	    info-&gt;ring_len &gt; I40E_MAX_NUM_DESCRIPTORS_XL710) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_context;</div><div class='add'>+	}</div><div class='ctx'> 	tx_ctx.qlen = info-&gt;ring_len;</div><div class='ctx'> 	tx_ctx.rdylist = le16_to_cpu(vsi-&gt;info.qs_handle[0]);</div><div class='ctx'> 	tx_ctx.rdylist_act = 0;</div><div class='hunk'>@@ -716,6 +723,13 @@ static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,</div><div class='ctx'> </div><div class='ctx'> 	/* only set the required fields */</div><div class='ctx'> 	rx_ctx.base = info-&gt;dma_ring_addr / 128;</div><div class='add'>+</div><div class='add'>+	/* ring_len has to be multiple of 32 */</div><div class='add'>+	if (!IS_ALIGNED(info-&gt;ring_len, 32) ||</div><div class='add'>+	    info-&gt;ring_len &gt; I40E_MAX_NUM_DESCRIPTORS_XL710) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='ctx'> 	rx_ctx.qlen = info-&gt;ring_len;</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;splithdr_enabled) {</div><div class='hunk'>@@ -812,7 +826,7 @@ static int i40e_alloc_vsi_res(struct i40e_vf *vf, u8 idx)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!idx) {</div><div class='del'>-		u64 hena = i40e_pf_get_default_rss_hena(pf);</div><div class='add'>+		u64 hashcfg = i40e_pf_get_default_rss_hashcfg(pf);</div><div class='ctx'> 		u8 broadcast[ETH_ALEN];</div><div class='ctx'> </div><div class='ctx'> 		vf-&gt;lan_vsi_idx = vsi-&gt;idx;</div><div class='hunk'>@@ -841,8 +855,9 @@ static int i40e_alloc_vsi_res(struct i40e_vf *vf, u8 idx)</div><div class='ctx'> 			dev_info(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Could not allocate VF broadcast filter\n");</div><div class='ctx'> 		spin_unlock_bh(&amp;vsi-&gt;mac_filter_hash_lock);</div><div class='del'>-		wr32(&amp;pf-&gt;hw, I40E_VFQF_HENA1(0, vf-&gt;vf_id), (u32)hena);</div><div class='del'>-		wr32(&amp;pf-&gt;hw, I40E_VFQF_HENA1(1, vf-&gt;vf_id), (u32)(hena &gt;&gt; 32));</div><div class='add'>+		wr32(&amp;pf-&gt;hw, I40E_VFQF_HENA1(0, vf-&gt;vf_id), (u32)hashcfg);</div><div class='add'>+		wr32(&amp;pf-&gt;hw, I40E_VFQF_HENA1(1, vf-&gt;vf_id),</div><div class='add'>+		     (u32)(hashcfg &gt;&gt; 32));</div><div class='ctx'> 		/* program mac filter only for VF VSI */</div><div class='ctx'> 		ret = i40e_sync_vsi_filters(vsi);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -1289,9 +1304,8 @@ i40e_set_vsi_promisc(struct i40e_vf *vf, u16 seid, bool multi_enable,</div><div class='ctx'> </div><div class='ctx'> 			dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"VF %d failed to set multicast promiscuous mode err %pe aq_err %s\n",</div><div class='del'>-				vf-&gt;vf_id,</div><div class='del'>-				ERR_PTR(aq_ret),</div><div class='del'>-				i40e_aq_str(&amp;pf-&gt;hw, aq_err));</div><div class='add'>+				vf-&gt;vf_id, ERR_PTR(aq_ret),</div><div class='add'>+				libie_aq_str(aq_err));</div><div class='ctx'> </div><div class='ctx'> 			return aq_ret;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1305,9 +1319,8 @@ i40e_set_vsi_promisc(struct i40e_vf *vf, u16 seid, bool multi_enable,</div><div class='ctx'> </div><div class='ctx'> 			dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"VF %d failed to set unicast promiscuous mode err %pe aq_err %s\n",</div><div class='del'>-				vf-&gt;vf_id,</div><div class='del'>-				ERR_PTR(aq_ret),</div><div class='del'>-				i40e_aq_str(&amp;pf-&gt;hw, aq_err));</div><div class='add'>+				vf-&gt;vf_id, ERR_PTR(aq_ret),</div><div class='add'>+				libie_aq_str(aq_err));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		return aq_ret;</div><div class='hunk'>@@ -1322,9 +1335,8 @@ i40e_set_vsi_promisc(struct i40e_vf *vf, u16 seid, bool multi_enable,</div><div class='ctx'> </div><div class='ctx'> 			dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"VF %d failed to set multicast promiscuous mode err %pe aq_err %s\n",</div><div class='del'>-				vf-&gt;vf_id,</div><div class='del'>-				ERR_PTR(aq_ret),</div><div class='del'>-				i40e_aq_str(&amp;pf-&gt;hw, aq_err));</div><div class='add'>+				vf-&gt;vf_id, ERR_PTR(aq_ret),</div><div class='add'>+				libie_aq_str(aq_err));</div><div class='ctx'> </div><div class='ctx'> 			if (!aq_tmp)</div><div class='ctx'> 				aq_tmp = aq_ret;</div><div class='hunk'>@@ -1338,9 +1350,8 @@ i40e_set_vsi_promisc(struct i40e_vf *vf, u16 seid, bool multi_enable,</div><div class='ctx'> </div><div class='ctx'> 			dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"VF %d failed to set unicast promiscuous mode err %pe aq_err %s\n",</div><div class='del'>-				vf-&gt;vf_id,</div><div class='del'>-				ERR_PTR(aq_ret),</div><div class='del'>-				i40e_aq_str(&amp;pf-&gt;hw, aq_err));</div><div class='add'>+				vf-&gt;vf_id, ERR_PTR(aq_ret),</div><div class='add'>+				libie_aq_str(aq_err));</div><div class='ctx'> </div><div class='ctx'> 			if (!aq_tmp)</div><div class='ctx'> 				aq_tmp = aq_ret;</div><div class='hunk'>@@ -1453,6 +1464,7 @@ static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr)</div><div class='ctx'> 	 * functions that may still be running at this point.</div><div class='ctx'> 	 */</div><div class='ctx'> 	clear_bit(I40E_VF_STATE_INIT, &amp;vf-&gt;vf_states);</div><div class='add'>+	clear_bit(I40E_VF_STATE_RESOURCES_LOADED, &amp;vf-&gt;vf_states);</div><div class='ctx'> </div><div class='ctx'> 	/* In the case of a VFLR, the HW has already reset the VF and we</div><div class='ctx'> 	 * just need to clean up, so don't hit the VFRTRIG register.</div><div class='hunk'>@@ -1546,8 +1558,8 @@ static void i40e_cleanup_reset_vf(struct i40e_vf *vf)</div><div class='ctx'>  * @vf: pointer to the VF structure</div><div class='ctx'>  * @flr: VFLR was issued or not</div><div class='ctx'>  *</div><div class='del'>- * Returns true if the VF is in reset, resets successfully, or resets</div><div class='del'>- * are disabled and false otherwise.</div><div class='add'>+ * Return: True if reset was performed successfully or if resets are disabled.</div><div class='add'>+ * False if reset is already in progress.</div><div class='ctx'>  **/</div><div class='ctx'> bool i40e_reset_vf(struct i40e_vf *vf, bool flr)</div><div class='ctx'> {</div><div class='hunk'>@@ -1566,7 +1578,7 @@ bool i40e_reset_vf(struct i40e_vf *vf, bool flr)</div><div class='ctx'> </div><div class='ctx'> 	/* If VF is being reset already we don't need to continue. */</div><div class='ctx'> 	if (test_and_set_bit(I40E_VF_STATE_RESETTING, &amp;vf-&gt;vf_states))</div><div class='del'>-		return true;</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	i40e_trigger_vf_reset(vf, flr);</div><div class='ctx'> </div><div class='hunk'>@@ -2119,7 +2131,10 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 	size_t len = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!i40e_sync_vf_state(vf, I40E_VF_STATE_INIT)) {</div><div class='add'>+	i40e_sync_vf_state(vf, I40E_VF_STATE_INIT);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(I40E_VF_STATE_INIT, &amp;vf-&gt;vf_states) ||</div><div class='add'>+	    test_bit(I40E_VF_STATE_RESOURCES_LOADED, &amp;vf-&gt;vf_states)) {</div><div class='ctx'> 		aq_ret = -EINVAL;</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2222,6 +2237,7 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 				vf-&gt;default_lan_addr.addr);</div><div class='ctx'> 	}</div><div class='ctx'> 	set_bit(I40E_VF_STATE_ACTIVE, &amp;vf-&gt;vf_states);</div><div class='add'>+	set_bit(I40E_VF_STATE_RESOURCES_LOADED, &amp;vf-&gt;vf_states);</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='ctx'> 	/* send the response back to the VF */</div><div class='hunk'>@@ -2384,7 +2400,7 @@ static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (vf-&gt;adq_enabled) {</div><div class='del'>-			if (idx &gt;= ARRAY_SIZE(vf-&gt;ch)) {</div><div class='add'>+			if (idx &gt;= vf-&gt;num_tc) {</div><div class='ctx'> 				aq_ret = -ENODEV;</div><div class='ctx'> 				goto error_param;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2405,7 +2421,7 @@ static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 		 * to its appropriate VSIs based on TC mapping</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (vf-&gt;adq_enabled) {</div><div class='del'>-			if (idx &gt;= ARRAY_SIZE(vf-&gt;ch)) {</div><div class='add'>+			if (idx &gt;= vf-&gt;num_tc) {</div><div class='ctx'> 				aq_ret = -ENODEV;</div><div class='ctx'> 				goto error_param;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2455,8 +2471,10 @@ static int i40e_validate_queue_map(struct i40e_vf *vf, u16 vsi_id,</div><div class='ctx'> 	u16 vsi_queue_id, queue_id;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(vsi_queue_id, &amp;queuemap, I40E_MAX_VSI_QP) {</div><div class='del'>-		if (vf-&gt;adq_enabled) {</div><div class='del'>-			vsi_id = vf-&gt;ch[vsi_queue_id / I40E_MAX_VF_VSI].vsi_id;</div><div class='add'>+		u16 idx = vsi_queue_id / I40E_MAX_VF_VSI;</div><div class='add'>+</div><div class='add'>+		if (vf-&gt;adq_enabled &amp;&amp; idx &lt; vf-&gt;num_tc) {</div><div class='add'>+			vsi_id = vf-&gt;ch[idx].vsi_id;</div><div class='ctx'> 			queue_id = (vsi_queue_id % I40E_DEFAULT_QUEUES_PER_VF);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			queue_id = vsi_queue_id;</div><div class='hunk'>@@ -2844,24 +2862,6 @@ error_param:</div><div class='ctx'> 				      (u8 *)&amp;stats, sizeof(stats));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * i40e_can_vf_change_mac</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- *</div><div class='del'>- * Return true if the VF is allowed to change its MAC filters, false otherwise</div><div class='del'>- */</div><div class='del'>-static bool i40e_can_vf_change_mac(struct i40e_vf *vf)</div><div class='del'>-{</div><div class='del'>-	/* If the VF MAC address has been set administratively (via the</div><div class='del'>-	 * ndo_set_vf_mac command), then deny permission to the VF to</div><div class='del'>-	 * add/delete unicast MAC addresses, unless the VF is trusted</div><div class='del'>-	 */</div><div class='del'>-	if (vf-&gt;pf_set_mac &amp;&amp; !vf-&gt;trusted)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define I40E_MAX_MACVLAN_PER_HW 3072</div><div class='ctx'> #define I40E_MAX_MACVLAN_PER_PF(num_ports) (I40E_MAX_MACVLAN_PER_HW /	\</div><div class='ctx'> 	(num_ports))</div><div class='hunk'>@@ -2900,8 +2900,10 @@ static inline int i40e_check_vf_permission(struct i40e_vf *vf,</div><div class='ctx'> 	struct i40e_pf *pf = vf-&gt;pf;</div><div class='ctx'> 	struct i40e_vsi *vsi = pf-&gt;vsi[vf-&gt;lan_vsi_idx];</div><div class='ctx'> 	struct i40e_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	int mac2add_cnt = 0;</div><div class='del'>-	int i;</div><div class='add'>+	int i, mac_add_max, mac_add_cnt = 0;</div><div class='add'>+	bool vf_trusted;</div><div class='add'>+</div><div class='add'>+	vf_trusted = test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &amp;vf-&gt;vf_caps);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; al-&gt;num_elements; i++) {</div><div class='ctx'> 		struct i40e_mac_filter *f;</div><div class='hunk'>@@ -2921,9 +2923,8 @@ static inline int i40e_check_vf_permission(struct i40e_vf *vf,</div><div class='ctx'> 		 * The VF may request to set the MAC address filter already</div><div class='ctx'> 		 * assigned to it so do not return an error in that case.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!i40e_can_vf_change_mac(vf) &amp;&amp;</div><div class='del'>-		    !is_multicast_ether_addr(addr) &amp;&amp;</div><div class='del'>-		    !ether_addr_equal(addr, vf-&gt;default_lan_addr.addr)) {</div><div class='add'>+		if (!vf_trusted &amp;&amp; !is_multicast_ether_addr(addr) &amp;&amp;</div><div class='add'>+		    vf-&gt;pf_set_mac &amp;&amp; !ether_addr_equal(addr, vf-&gt;default_lan_addr.addr)) {</div><div class='ctx'> 			dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"VF attempting to override administratively set MAC address, bring down and up the VF interface to resume normal operation\n");</div><div class='ctx'> 			return -EPERM;</div><div class='hunk'>@@ -2932,31 +2933,50 @@ static inline int i40e_check_vf_permission(struct i40e_vf *vf,</div><div class='ctx'> 		/*count filters that really will be added*/</div><div class='ctx'> 		f = i40e_find_mac(vsi, addr);</div><div class='ctx'> 		if (!f)</div><div class='del'>-			++mac2add_cnt;</div><div class='add'>+			++mac_add_cnt;</div><div class='ctx'> 	}</div><div class='add'>+	/* Determine the maximum number of MAC addresses this VF may use.</div><div class='add'>+	 *</div><div class='add'>+	 * - For untrusted VFs: use a fixed small limit.</div><div class='add'>+	 *</div><div class='add'>+	 * - For trusted VFs: limit is calculated by dividing total MAC</div><div class='add'>+	 *  filter pool across all VFs/ports.</div><div class='add'>+	 *</div><div class='add'>+	 * - User can override this by devlink param "max_mac_per_vf".</div><div class='add'>+	 *   If set its value is used as a strict cap for both trusted and</div><div class='add'>+	 *   untrusted VFs.</div><div class='add'>+	 *   Note:</div><div class='add'>+	 *    even when overridden, this is a theoretical maximum; hardware</div><div class='add'>+	 *    may reject additional MACs if the absolute HW limit is reached.</div><div class='add'>+	 */</div><div class='add'>+	if (!vf_trusted)</div><div class='add'>+		mac_add_max = I40E_VC_MAX_MAC_ADDR_PER_VF;</div><div class='add'>+	else</div><div class='add'>+		mac_add_max = I40E_VC_MAX_MACVLAN_PER_TRUSTED_VF(pf-&gt;num_alloc_vfs, hw-&gt;num_ports);</div><div class='add'>+</div><div class='add'>+	if (pf-&gt;max_mac_per_vf &gt; 0)</div><div class='add'>+		mac_add_max = pf-&gt;max_mac_per_vf;</div><div class='ctx'> </div><div class='del'>-	/* If this VF is not privileged, then we can't add more than a limited</div><div class='del'>-	 * number of addresses. Check to make sure that the additions do not</div><div class='del'>-	 * push us over the limit.</div><div class='add'>+	/* VF can replace all its filters in one step, in this case mac_add_max</div><div class='add'>+	 * will be added as active and another mac_add_max will be in</div><div class='add'>+	 * a to-be-removed state. Account for that.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &amp;vf-&gt;vf_caps)) {</div><div class='del'>-		if ((i40e_count_filters(vsi) + mac2add_cnt) &gt;</div><div class='del'>-		    I40E_VC_MAX_MAC_ADDR_PER_VF) {</div><div class='add'>+	if ((i40e_count_active_filters(vsi) + mac_add_cnt) &gt; mac_add_max ||</div><div class='add'>+	    (i40e_count_all_filters(vsi) + mac_add_cnt) &gt; 2 * mac_add_max) {</div><div class='add'>+		if (pf-&gt;max_mac_per_vf == mac_add_max &amp;&amp; mac_add_max &gt; 0) {</div><div class='ctx'> 			dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='del'>-				"Cannot add more MAC addresses, VF is not trusted, switch the VF to trusted to add more functionality\n");</div><div class='add'>+				"Cannot add more MAC addresses: VF reached its maximum allowed limit (%d)\n",</div><div class='add'>+				mac_add_max);</div><div class='ctx'> 			return -EPERM;</div><div class='ctx'> 		}</div><div class='del'>-	/* If this VF is trusted, it can use more resources than untrusted.</div><div class='del'>-	 * However to ensure that every trusted VF has appropriate number of</div><div class='del'>-	 * resources, divide whole pool of resources per port and then across</div><div class='del'>-	 * all VFs.</div><div class='del'>-	 */</div><div class='del'>-	} else {</div><div class='del'>-		if ((i40e_count_filters(vsi) + mac2add_cnt) &gt;</div><div class='del'>-		    I40E_VC_MAX_MACVLAN_PER_TRUSTED_VF(pf-&gt;num_alloc_vfs,</div><div class='del'>-						       hw-&gt;num_ports)) {</div><div class='add'>+		if (!vf_trusted) {</div><div class='add'>+			dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='add'>+				"Cannot add more MAC addresses, VF is not trusted, switch the VF to trusted to add more functionality\n");</div><div class='add'>+			return -EPERM;</div><div class='add'>+		} else {</div><div class='ctx'> 			dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='del'>-				"Cannot add more MAC addresses, trusted VF exhausted it's resources\n");</div><div class='add'>+				"Cannot add more MAC addresses: trusted VF reached its maximum allowed limit (%d)\n",</div><div class='add'>+				mac_add_max);</div><div class='ctx'> 			return -EPERM;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3137,10 +3157,10 @@ static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 		const u8 *addr = al-&gt;list[i].addr;</div><div class='ctx'> </div><div class='ctx'> 		/* Allow to delete VF primary MAC only if it was not set</div><div class='del'>-		 * administratively by PF or if VF is trusted.</div><div class='add'>+		 * administratively by PF.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (ether_addr_equal(addr, vf-&gt;default_lan_addr.addr)) {</div><div class='del'>-			if (i40e_can_vf_change_mac(vf))</div><div class='add'>+			if (!vf-&gt;pf_set_mac)</div><div class='ctx'> 				was_unimac_deleted = true;</div><div class='ctx'> 			else</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -3447,15 +3467,15 @@ err:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_vc_get_rss_hena</div><div class='add'>+ * i40e_vc_get_rss_hashcfg</div><div class='ctx'>  * @vf: pointer to the VF info</div><div class='ctx'>  * @msg: pointer to the msg buffer</div><div class='ctx'>  *</div><div class='del'>- * Return the RSS HENA bits allowed by the hardware</div><div class='add'>+ * Return the RSS Hash configuration bits allowed by the hardware</div><div class='ctx'>  **/</div><div class='del'>-static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg)</div><div class='add'>+static int i40e_vc_get_rss_hashcfg(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> {</div><div class='del'>-	struct virtchnl_rss_hena *vrh = NULL;</div><div class='add'>+	struct virtchnl_rss_hashcfg *vrh = NULL;</div><div class='ctx'> 	struct i40e_pf *pf = vf-&gt;pf;</div><div class='ctx'> 	int aq_ret = 0;</div><div class='ctx'> 	int len = 0;</div><div class='hunk'>@@ -3464,7 +3484,7 @@ static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 		aq_ret = -EINVAL;</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='del'>-	len = sizeof(struct virtchnl_rss_hena);</div><div class='add'>+	len = sizeof(struct virtchnl_rss_hashcfg);</div><div class='ctx'> </div><div class='ctx'> 	vrh = kzalloc(len, GFP_KERNEL);</div><div class='ctx'> 	if (!vrh) {</div><div class='hunk'>@@ -3472,26 +3492,26 @@ static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 		len = 0;</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='del'>-	vrh-&gt;hena = i40e_pf_get_default_rss_hena(pf);</div><div class='add'>+	vrh-&gt;hashcfg = i40e_pf_get_default_rss_hashcfg(pf);</div><div class='ctx'> err:</div><div class='ctx'> 	/* send the response back to the VF */</div><div class='del'>-	aq_ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS,</div><div class='add'>+	aq_ret = i40e_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HASHCFG_CAPS,</div><div class='ctx'> 					aq_ret, (u8 *)vrh, len);</div><div class='ctx'> 	kfree(vrh);</div><div class='ctx'> 	return aq_ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * i40e_vc_set_rss_hena</div><div class='add'>+ * i40e_vc_set_rss_hashcfg</div><div class='ctx'>  * @vf: pointer to the VF info</div><div class='ctx'>  * @msg: pointer to the msg buffer</div><div class='ctx'>  *</div><div class='del'>- * Set the RSS HENA bits for the VF</div><div class='add'>+ * Set the RSS Hash configuration bits for the VF</div><div class='ctx'>  **/</div><div class='del'>-static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg)</div><div class='add'>+static int i40e_vc_set_rss_hashcfg(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> {</div><div class='del'>-	struct virtchnl_rss_hena *vrh =</div><div class='del'>-		(struct virtchnl_rss_hena *)msg;</div><div class='add'>+	struct virtchnl_rss_hashcfg *vrh =</div><div class='add'>+		(struct virtchnl_rss_hashcfg *)msg;</div><div class='ctx'> 	struct i40e_pf *pf = vf-&gt;pf;</div><div class='ctx'> 	struct i40e_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	int aq_ret = 0;</div><div class='hunk'>@@ -3500,13 +3520,14 @@ static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 		aq_ret = -EINVAL;</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='del'>-	i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf-&gt;vf_id), (u32)vrh-&gt;hena);</div><div class='add'>+	i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf-&gt;vf_id),</div><div class='add'>+			  (u32)vrh-&gt;hashcfg);</div><div class='ctx'> 	i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf-&gt;vf_id),</div><div class='del'>-			  (u32)(vrh-&gt;hena &gt;&gt; 32));</div><div class='add'>+			  (u32)(vrh-&gt;hashcfg &gt;&gt; 32));</div><div class='ctx'> </div><div class='ctx'> 	/* send the response to the VF */</div><div class='ctx'> err:</div><div class='del'>-	return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, aq_ret);</div><div class='add'>+	return i40e_vc_send_resp_to_vf(vf, VIRTCHNL_OP_SET_RSS_HASHCFG, aq_ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3589,7 +3610,7 @@ static int i40e_validate_cloud_filter(struct i40e_vf *vf,</div><div class='ctx'> </div><div class='ctx'> 	/* action_meta is TC number here to which the filter is applied */</div><div class='ctx'> 	if (!tc_filter-&gt;action_meta ||</div><div class='del'>-	    tc_filter-&gt;action_meta &gt; vf-&gt;num_tc) {</div><div class='add'>+	    tc_filter-&gt;action_meta &gt;= vf-&gt;num_tc) {</div><div class='ctx'> 		dev_info(&amp;pf-&gt;pdev-&gt;dev, "VF %d: Invalid TC number %u\n",</div><div class='ctx'> 			 vf-&gt;vf_id, tc_filter-&gt;action_meta);</div><div class='ctx'> 		goto err;</div><div class='hunk'>@@ -3746,8 +3767,7 @@ static void i40e_del_all_cloud_filters(struct i40e_vf *vf)</div><div class='ctx'> 			dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"VF %d: Failed to delete cloud filter, err %pe aq_err %s\n",</div><div class='ctx'> 				vf-&gt;vf_id, ERR_PTR(ret),</div><div class='del'>-				i40e_aq_str(&amp;pf-&gt;hw,</div><div class='del'>-					    pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+				libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> </div><div class='ctx'> 		hlist_del(&amp;cfilter-&gt;cloud_node);</div><div class='ctx'> 		kfree(cfilter);</div><div class='hunk'>@@ -3849,7 +3869,7 @@ static int i40e_vc_del_cloud_filter(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 		dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"VF %d: Failed to delete cloud filter, err %pe aq_err %s\n",</div><div class='ctx'> 			vf-&gt;vf_id, ERR_PTR(ret),</div><div class='del'>-			i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3887,6 +3907,8 @@ err:</div><div class='ctx'> 				       aq_ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define I40E_MAX_VF_CLOUD_FILTER 0xFF00</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * i40e_vc_add_cloud_filter</div><div class='ctx'>  * @vf: pointer to the VF info</div><div class='hunk'>@@ -3926,6 +3948,14 @@ static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (vf-&gt;num_cloud_filters &gt;= I40E_MAX_VF_CLOUD_FILTER) {</div><div class='add'>+		dev_warn(&amp;pf-&gt;pdev-&gt;dev,</div><div class='add'>+			 "VF %d: Max number of filters reached, can't apply cloud filter\n",</div><div class='add'>+			 vf-&gt;vf_id);</div><div class='add'>+		aq_ret = -ENOSPC;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	cfilter = kzalloc(sizeof(*cfilter), GFP_KERNEL);</div><div class='ctx'> 	if (!cfilter) {</div><div class='ctx'> 		aq_ret = -ENOMEM;</div><div class='hunk'>@@ -3985,7 +4015,7 @@ static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg)</div><div class='ctx'> 		dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"VF %d: Failed to add cloud filter, err %pe aq_err %s\n",</div><div class='ctx'> 			vf-&gt;vf_id, ERR_PTR(aq_ret),</div><div class='del'>-			i40e_aq_str(&amp;pf-&gt;hw, pf-&gt;hw.aq.asq_last_status));</div><div class='add'>+			libie_aq_str(pf-&gt;hw.aq.asq_last_status));</div><div class='ctx'> 		goto err_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4253,11 +4283,11 @@ int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,</div><div class='ctx'> 	case VIRTCHNL_OP_CONFIG_RSS_LUT:</div><div class='ctx'> 		ret = i40e_vc_config_rss_lut(vf, msg);</div><div class='ctx'> 		break;</div><div class='del'>-	case VIRTCHNL_OP_GET_RSS_HENA_CAPS:</div><div class='del'>-		ret = i40e_vc_get_rss_hena(vf, msg);</div><div class='add'>+	case VIRTCHNL_OP_GET_RSS_HASHCFG_CAPS:</div><div class='add'>+		ret = i40e_vc_get_rss_hashcfg(vf, msg);</div><div class='ctx'> 		break;</div><div class='del'>-	case VIRTCHNL_OP_SET_RSS_HENA:</div><div class='del'>-		ret = i40e_vc_set_rss_hena(vf, msg);</div><div class='add'>+	case VIRTCHNL_OP_SET_RSS_HASHCFG:</div><div class='add'>+		ret = i40e_vc_set_rss_hashcfg(vf, msg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:</div><div class='ctx'> 		ret = i40e_vc_enable_vlan_stripping(vf, msg);</div><div class='hunk'>@@ -4328,7 +4358,10 @@ int i40e_vc_process_vflr_event(struct i40e_pf *pf)</div><div class='ctx'> 		reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));</div><div class='ctx'> 		if (reg &amp; BIT(bit_idx))</div><div class='ctx'> 			/* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */</div><div class='del'>-			i40e_reset_vf(vf, true);</div><div class='add'>+			if (!i40e_reset_vf(vf, true)) {</div><div class='add'>+				/* At least one VF did not finish resetting, retry next time */</div><div class='add'>+				set_bit(__I40E_VFLR_EVENT_PENDING, pf-&gt;state);</div><div class='add'>+			}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -4770,6 +4803,7 @@ int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)</div><div class='ctx'> 	unsigned long q_map;</div><div class='ctx'> 	struct i40e_vf *vf;</div><div class='ctx'> 	int abs_vf_id;</div><div class='add'>+	int old_link;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	int tmp;</div><div class='ctx'> </div><div class='hunk'>@@ -4788,6 +4822,17 @@ int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)</div><div class='ctx'> 	vf = &amp;pf-&gt;vf[vf_id];</div><div class='ctx'> 	abs_vf_id = vf-&gt;vf_id + hw-&gt;func_caps.vf_base_id;</div><div class='ctx'> </div><div class='add'>+	/* skip VF link state change if requested state is already set */</div><div class='add'>+	if (!vf-&gt;link_forced)</div><div class='add'>+		old_link = IFLA_VF_LINK_STATE_AUTO;</div><div class='add'>+	else if (vf-&gt;link_up)</div><div class='add'>+		old_link = IFLA_VF_LINK_STATE_ENABLE;</div><div class='add'>+	else</div><div class='add'>+		old_link = IFLA_VF_LINK_STATE_DISABLE;</div><div class='add'>+</div><div class='add'>+	if (link == old_link)</div><div class='add'>+		goto error_out;</div><div class='add'>+</div><div class='ctx'> 	pfe.event = VIRTCHNL_EVENT_LINK_CHANGE;</div><div class='ctx'> 	pfe.severity = PF_EVENT_SEVERITY_INFO;</div><div class='ctx'> </div><div class='hunk'>@@ -5003,7 +5048,7 @@ int i40e_get_vf_stats(struct net_device *netdev, int vf_id,</div><div class='ctx'> 	vf_stats-&gt;broadcast  = stats-&gt;rx_broadcast;</div><div class='ctx'> 	vf_stats-&gt;multicast  = stats-&gt;rx_multicast;</div><div class='ctx'> 	vf_stats-&gt;rx_dropped = stats-&gt;rx_discards + stats-&gt;rx_discards_other;</div><div class='del'>-	vf_stats-&gt;tx_dropped = stats-&gt;tx_discards;</div><div class='add'>+	vf_stats-&gt;tx_dropped = stats-&gt;tx_errors;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h<br/>index 66f95e2f3146..f558b45725c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h</a></div><div class='hunk'>@@ -41,7 +41,8 @@ enum i40e_vf_states {</div><div class='ctx'> 	I40E_VF_STATE_MC_PROMISC,</div><div class='ctx'> 	I40E_VF_STATE_UC_PROMISC,</div><div class='ctx'> 	I40E_VF_STATE_PRE_ENABLE,</div><div class='del'>-	I40E_VF_STATE_RESETTING</div><div class='add'>+	I40E_VF_STATE_RESETTING,</div><div class='add'>+	I40E_VF_STATE_RESOURCES_LOADED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* VF capabilities */</div><div class='hunk'>@@ -64,6 +65,12 @@ struct i40evf_channel {</div><div class='ctx'> 	u64 max_tx_rate; /* bandwidth rate allocation for VSIs */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct i40e_mdd_vf_events {</div><div class='add'>+	u64 count;      /* total count of Rx|Tx events */</div><div class='add'>+	/* count number of the last printed event */</div><div class='add'>+	u64 last_printed;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* VF information structure */</div><div class='ctx'> struct i40e_vf {</div><div class='ctx'> 	struct i40e_pf *pf;</div><div class='hunk'>@@ -92,7 +99,9 @@ struct i40e_vf {</div><div class='ctx'> </div><div class='ctx'> 	u8 num_queue_pairs;	/* num of qps assigned to VF vsis */</div><div class='ctx'> 	u8 num_req_queues;	/* num of requested qps */</div><div class='del'>-	u64 num_mdd_events;	/* num of mdd events detected */</div><div class='add'>+	/* num of mdd tx and rx events detected */</div><div class='add'>+	struct i40e_mdd_vf_events mdd_rx_events;</div><div class='add'>+	struct i40e_mdd_vf_events mdd_tx_events;</div><div class='ctx'> </div><div class='ctx'> 	unsigned long vf_caps;	/* vf's adv. capabilities */</div><div class='ctx'> 	unsigned long vf_states;	/* vf's runtime states */</div><div class='hunk'>@@ -120,6 +129,7 @@ int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs);</div><div class='ctx'> int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,</div><div class='ctx'> 			   u32 v_retval, u8 *msg, u16 msglen);</div><div class='ctx'> int i40e_vc_process_vflr_event(struct i40e_pf *pf);</div><div class='add'>+void i40e_vc_reset_vf(struct i40e_vf *vf, bool notify_vf);</div><div class='ctx'> bool i40e_reset_vf(struct i40e_vf *vf, bool flr);</div><div class='ctx'> bool i40e_reset_all_vfs(struct i40e_pf *pf, bool flr);</div><div class='ctx'> void i40e_vc_notify_vf_reset(struct i40e_vf *vf);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_xsk.c b/drivers/net/ethernet/intel/i40e/i40e_xsk.c<br/>index 4e885df789ef..9f47388eaba5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_xsk.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_xsk.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_xsk.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_xsk.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Copyright(c) 2018 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+#include &lt;linux/unroll.h&gt;</div><div class='ctx'> #include &lt;net/xdp_sock_drv.h&gt;</div><div class='ctx'> #include "i40e_txrx_common.h"</div><div class='ctx'> #include "i40e_xsk.h"</div><div class='hunk'>@@ -395,32 +396,6 @@ static void i40e_handle_xdp_result_zc(struct i40e_ring *rx_ring,</div><div class='ctx'> 	WARN_ON_ONCE(1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-i40e_add_xsk_frag(struct i40e_ring *rx_ring, struct xdp_buff *first,</div><div class='del'>-		  struct xdp_buff *xdp, const unsigned int size)</div><div class='del'>-{</div><div class='del'>-	struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(first);</div><div class='del'>-</div><div class='del'>-	if (!xdp_buff_has_frags(first)) {</div><div class='del'>-		sinfo-&gt;nr_frags = 0;</div><div class='del'>-		sinfo-&gt;xdp_frags_size = 0;</div><div class='del'>-		xdp_buff_set_frags_flag(first);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(sinfo-&gt;nr_frags == MAX_SKB_FRAGS)) {</div><div class='del'>-		xsk_buff_free(first);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__skb_fill_page_desc_noacc(sinfo, sinfo-&gt;nr_frags++,</div><div class='del'>-				   virt_to_page(xdp-&gt;data_hard_start),</div><div class='del'>-				   XDP_PACKET_HEADROOM, size);</div><div class='del'>-	sinfo-&gt;xdp_frags_size += size;</div><div class='del'>-	xsk_buff_add_frag(xdp);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * i40e_clean_rx_irq_zc - Consumes Rx packets from the hardware ring</div><div class='ctx'>  * @rx_ring: Rx ring</div><div class='hunk'>@@ -486,8 +461,10 @@ int i40e_clean_rx_irq_zc(struct i40e_ring *rx_ring, int budget)</div><div class='ctx'> </div><div class='ctx'> 		if (!first)</div><div class='ctx'> 			first = bi;</div><div class='del'>-		else if (i40e_add_xsk_frag(rx_ring, first, bi, size))</div><div class='add'>+		else if (!xsk_buff_add_frag(first, bi)) {</div><div class='add'>+			xsk_buff_free(first);</div><div class='ctx'> 			break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (++next_to_process == count)</div><div class='ctx'> 			next_to_process = 0;</div><div class='hunk'>@@ -553,7 +530,8 @@ static void i40e_xmit_pkt_batch(struct i40e_ring *xdp_ring, struct xdp_desc *des</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	loop_unrolled_for(i = 0; i &lt; PKTS_PER_BATCH; i++) {</div><div class='add'>+	unrolled_count(PKTS_PER_BATCH)</div><div class='add'>+	for (i = 0; i &lt; PKTS_PER_BATCH; i++) {</div><div class='ctx'> 		u32 cmd = I40E_TX_DESC_CMD_ICRC | xsk_is_eop_desc(&amp;desc[i]);</div><div class='ctx'> </div><div class='ctx'> 		dma = xsk_buff_raw_get_dma(xdp_ring-&gt;xsk_pool, desc[i].addr);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/i40e/i40e_xsk.h b/drivers/net/ethernet/intel/i40e/i40e_xsk.h<br/>index ef156fad52f2..dd16351a7af8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_xsk.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/i40e/i40e_xsk.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/i40e/i40e_xsk.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/i40e/i40e_xsk.h</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='del'>-/* This value should match the pragma in the loop_unrolled_for</div><div class='add'>+/* This value should match the pragma in the unrolled_count()</div><div class='ctx'>  * macro. Why 4? It is strictly empirical. It seems to be a good</div><div class='ctx'>  * compromise between the advantage of having simultaneous outstanding</div><div class='ctx'>  * reads to the DMA array that can hide each others latency and the</div><div class='hunk'>@@ -14,14 +14,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #define PKTS_PER_BATCH 4</div><div class='ctx'> </div><div class='del'>-#ifdef __clang__</div><div class='del'>-#define loop_unrolled_for _Pragma("clang loop unroll_count(4)") for</div><div class='del'>-#elif __GNUC__ &gt;= 8</div><div class='del'>-#define loop_unrolled_for _Pragma("GCC unroll 4") for</div><div class='del'>-#else</div><div class='del'>-#define loop_unrolled_for for</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> struct i40e_ring;</div><div class='ctx'> struct i40e_vsi;</div><div class='ctx'> struct net_device;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/Makefile b/drivers/net/ethernet/intel/iavf/Makefile<br/>index 356ac9faa5bf..e13720a728ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/Makefile</a></div><div class='hunk'>@@ -13,3 +13,5 @@ obj-$(CONFIG_IAVF) += iavf.o</div><div class='ctx'> </div><div class='ctx'> iavf-y := iavf_main.o iavf_ethtool.o iavf_virtchnl.o iavf_fdir.o \</div><div class='ctx'> 	  iavf_adv_rss.o iavf_txrx.o iavf_common.o iavf_adminq.o</div><div class='add'>+</div><div class='add'>+iavf-$(CONFIG_PTP_1588_CLOCK) += iavf_ptp.o</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf.h b/drivers/net/ethernet/intel/iavf/iavf.h<br/>index 532a0a595fe8..a87e0c6d4017 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf.h</a></div><div class='hunk'>@@ -41,6 +41,7 @@</div><div class='ctx'> #include "iavf_txrx.h"</div><div class='ctx'> #include "iavf_fdir.h"</div><div class='ctx'> #include "iavf_adv_rss.h"</div><div class='add'>+#include "iavf_types.h"</div><div class='ctx'> #include &lt;linux/bitmap.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DEFAULT_DEBUG_LEVEL_SHIFT 3</div><div class='hunk'>@@ -82,7 +83,7 @@ struct iavf_vsi {</div><div class='ctx'> </div><div class='ctx'> #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)</div><div class='ctx'> </div><div class='del'>-#define IAVF_RX_DESC(R, i) (&amp;(((union iavf_32byte_rx_desc *)((R)-&gt;desc))[i]))</div><div class='add'>+#define IAVF_RX_DESC(R, i) (&amp;(((struct iavf_rx_desc *)((R)-&gt;desc))[i]))</div><div class='ctx'> #define IAVF_TX_DESC(R, i) (&amp;(((struct iavf_tx_desc *)((R)-&gt;desc))[i]))</div><div class='ctx'> #define IAVF_TX_CTXTDESC(R, i) \</div><div class='ctx'> 	(&amp;(((struct iavf_tx_context_desc *)((R)-&gt;desc))[i]))</div><div class='hunk'>@@ -113,8 +114,6 @@ struct iavf_q_vector {</div><div class='ctx'> 	u16 reg_idx;		/* register index of the interrupt */</div><div class='ctx'> 	char name[IFNAMSIZ + 15];</div><div class='ctx'> 	bool arm_wb_state;</div><div class='del'>-	cpumask_t affinity_mask;</div><div class='del'>-	struct irq_affinity_notify affinity_notify;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Helper macros to switch between ints/sec and what the register uses.</div><div class='hunk'>@@ -267,10 +266,10 @@ struct iavf_adapter {</div><div class='ctx'> 	struct list_head vlan_filter_list;</div><div class='ctx'> 	int num_vlan_filters;</div><div class='ctx'> 	struct list_head mac_filter_list;</div><div class='del'>-	struct mutex crit_lock;</div><div class='ctx'> 	/* Lock to protect accesses to MAC and VLAN lists */</div><div class='ctx'> 	spinlock_t mac_vlan_list_lock;</div><div class='ctx'> 	char misc_vector_name[IFNAMSIZ + 9];</div><div class='add'>+	u8 rxdid;</div><div class='ctx'> 	int num_active_queues;</div><div class='ctx'> 	int num_req_queues;</div><div class='ctx'> </div><div class='hunk'>@@ -314,8 +313,8 @@ struct iavf_adapter {</div><div class='ctx'> #define IAVF_FLAG_AQ_CONFIGURE_RSS		BIT_ULL(9) /* direct AQ config */</div><div class='ctx'> #define IAVF_FLAG_AQ_GET_CONFIG			BIT_ULL(10)</div><div class='ctx'> /* Newer style, RSS done by the PF so we can ignore hardware vagaries. */</div><div class='del'>-#define IAVF_FLAG_AQ_GET_HENA			BIT_ULL(11)</div><div class='del'>-#define IAVF_FLAG_AQ_SET_HENA			BIT_ULL(12)</div><div class='add'>+#define IAVF_FLAG_AQ_GET_RSS_HASHCFG		BIT_ULL(11)</div><div class='add'>+#define IAVF_FLAG_AQ_SET_RSS_HASHCFG		BIT_ULL(12)</div><div class='ctx'> #define IAVF_FLAG_AQ_SET_RSS_KEY		BIT_ULL(13)</div><div class='ctx'> #define IAVF_FLAG_AQ_SET_RSS_LUT		BIT_ULL(14)</div><div class='ctx'> #define IAVF_FLAG_AQ_SET_RSS_HFUNC		BIT_ULL(15)</div><div class='hunk'>@@ -343,6 +342,17 @@ struct iavf_adapter {</div><div class='ctx'> #define IAVF_FLAG_AQ_CONFIGURE_QUEUES_BW		BIT_ULL(39)</div><div class='ctx'> #define IAVF_FLAG_AQ_CFG_QUEUES_QUANTA_SIZE		BIT_ULL(40)</div><div class='ctx'> #define IAVF_FLAG_AQ_GET_QOS_CAPS			BIT_ULL(41)</div><div class='add'>+#define IAVF_FLAG_AQ_GET_SUPPORTED_RXDIDS		BIT_ULL(42)</div><div class='add'>+#define IAVF_FLAG_AQ_GET_PTP_CAPS			BIT_ULL(43)</div><div class='add'>+#define IAVF_FLAG_AQ_SEND_PTP_CMD			BIT_ULL(44)</div><div class='add'>+</div><div class='add'>+	/* AQ messages that must be sent after IAVF_FLAG_AQ_GET_CONFIG, in</div><div class='add'>+	 * order to negotiated extended capabilities.</div><div class='add'>+	 */</div><div class='add'>+#define IAVF_FLAG_AQ_EXTENDED_CAPS			\</div><div class='add'>+	(IAVF_FLAG_AQ_GET_OFFLOAD_VLAN_V2_CAPS |	\</div><div class='add'>+	 IAVF_FLAG_AQ_GET_SUPPORTED_RXDIDS |		\</div><div class='add'>+	 IAVF_FLAG_AQ_GET_PTP_CAPS)</div><div class='ctx'> </div><div class='ctx'> 	/* flags for processing extended capability messages during</div><div class='ctx'> 	 * __IAVF_INIT_EXTENDED_CAPS. Each capability exchange requires</div><div class='hunk'>@@ -354,10 +364,18 @@ struct iavf_adapter {</div><div class='ctx'> 	u64 extended_caps;</div><div class='ctx'> #define IAVF_EXTENDED_CAP_SEND_VLAN_V2			BIT_ULL(0)</div><div class='ctx'> #define IAVF_EXTENDED_CAP_RECV_VLAN_V2			BIT_ULL(1)</div><div class='add'>+#define IAVF_EXTENDED_CAP_SEND_RXDID			BIT_ULL(2)</div><div class='add'>+#define IAVF_EXTENDED_CAP_RECV_RXDID			BIT_ULL(3)</div><div class='add'>+#define IAVF_EXTENDED_CAP_SEND_PTP			BIT_ULL(4)</div><div class='add'>+#define IAVF_EXTENDED_CAP_RECV_PTP			BIT_ULL(5)</div><div class='ctx'> </div><div class='ctx'> #define IAVF_EXTENDED_CAPS				\</div><div class='ctx'> 	(IAVF_EXTENDED_CAP_SEND_VLAN_V2 |		\</div><div class='del'>-	 IAVF_EXTENDED_CAP_RECV_VLAN_V2)</div><div class='add'>+	 IAVF_EXTENDED_CAP_RECV_VLAN_V2 |		\</div><div class='add'>+	 IAVF_EXTENDED_CAP_SEND_RXDID |			\</div><div class='add'>+	 IAVF_EXTENDED_CAP_RECV_RXDID |			\</div><div class='add'>+	 IAVF_EXTENDED_CAP_SEND_PTP |			\</div><div class='add'>+	 IAVF_EXTENDED_CAP_RECV_PTP)</div><div class='ctx'> </div><div class='ctx'> 	/* Lock to prevent possible clobbering of</div><div class='ctx'> 	 * current_netdev_promisc_flags</div><div class='hunk'>@@ -417,12 +435,18 @@ struct iavf_adapter {</div><div class='ctx'> 			     VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF)</div><div class='ctx'> #define QOS_ALLOWED(_a) ((_a)-&gt;vf_res-&gt;vf_cap_flags &amp; \</div><div class='ctx'> 			 VIRTCHNL_VF_OFFLOAD_QOS)</div><div class='add'>+#define IAVF_RXDID_ALLOWED(a)						\</div><div class='add'>+	((a)-&gt;vf_res-&gt;vf_cap_flags &amp; VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC)</div><div class='add'>+#define IAVF_PTP_ALLOWED(a)						\</div><div class='add'>+	((a)-&gt;vf_res-&gt;vf_cap_flags &amp; VIRTCHNL_VF_CAP_PTP)</div><div class='ctx'> 	struct virtchnl_vf_resource *vf_res; /* incl. all VSIs */</div><div class='ctx'> 	struct virtchnl_vsi_resource *vsi_res; /* our LAN VSI */</div><div class='ctx'> 	struct virtchnl_version_info pf_version;</div><div class='ctx'> #define PF_IS_V11(_a) (((_a)-&gt;pf_version.major == 1) &amp;&amp; \</div><div class='ctx'> 		       ((_a)-&gt;pf_version.minor == 1))</div><div class='ctx'> 	struct virtchnl_vlan_caps vlan_v2_caps;</div><div class='add'>+	u64 supp_rxdids;</div><div class='add'>+	struct iavf_ptp ptp;</div><div class='ctx'> 	u16 msg_enable;</div><div class='ctx'> 	struct iavf_eth_stats current_stats;</div><div class='ctx'> 	struct virtchnl_qos_cap_list *qos_caps;</div><div class='hunk'>@@ -430,7 +454,7 @@ struct iavf_adapter {</div><div class='ctx'> 	u32 aq_wait_count;</div><div class='ctx'> 	/* RSS stuff */</div><div class='ctx'> 	enum virtchnl_rss_algorithm hfunc;</div><div class='del'>-	u64 hena;</div><div class='add'>+	u64 rss_hashcfg;</div><div class='ctx'> 	u16 rss_key_size;</div><div class='ctx'> 	u16 rss_lut_size;</div><div class='ctx'> 	u8 *rss_key;</div><div class='hunk'>@@ -555,6 +579,10 @@ int iavf_send_vf_config_msg(struct iavf_adapter *adapter);</div><div class='ctx'> int iavf_get_vf_config(struct iavf_adapter *adapter);</div><div class='ctx'> int iavf_get_vf_vlan_v2_caps(struct iavf_adapter *adapter);</div><div class='ctx'> int iavf_send_vf_offload_vlan_v2_msg(struct iavf_adapter *adapter);</div><div class='add'>+int iavf_send_vf_supported_rxdids_msg(struct iavf_adapter *adapter);</div><div class='add'>+int iavf_get_vf_supported_rxdids(struct iavf_adapter *adapter);</div><div class='add'>+int iavf_send_vf_ptp_caps_msg(struct iavf_adapter *adapter);</div><div class='add'>+int iavf_get_vf_ptp_caps(struct iavf_adapter *adapter);</div><div class='ctx'> void iavf_set_queue_vlan_tag_loc(struct iavf_adapter *adapter);</div><div class='ctx'> u16 iavf_get_num_vlans_added(struct iavf_adapter *adapter);</div><div class='ctx'> void iavf_irq_enable(struct iavf_adapter *adapter, bool flush);</div><div class='hunk'>@@ -570,8 +598,8 @@ void iavf_set_promiscuous(struct iavf_adapter *adapter);</div><div class='ctx'> bool iavf_promiscuous_mode_changed(struct iavf_adapter *adapter);</div><div class='ctx'> void iavf_request_stats(struct iavf_adapter *adapter);</div><div class='ctx'> int iavf_request_reset(struct iavf_adapter *adapter);</div><div class='del'>-void iavf_get_hena(struct iavf_adapter *adapter);</div><div class='del'>-void iavf_set_hena(struct iavf_adapter *adapter);</div><div class='add'>+void iavf_get_rss_hashcfg(struct iavf_adapter *adapter);</div><div class='add'>+void iavf_set_rss_hashcfg(struct iavf_adapter *adapter);</div><div class='ctx'> void iavf_set_rss_key(struct iavf_adapter *adapter);</div><div class='ctx'> void iavf_set_rss_lut(struct iavf_adapter *adapter);</div><div class='ctx'> void iavf_set_rss_hfunc(struct iavf_adapter *adapter);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_adminq.c b/drivers/net/ethernet/intel/iavf/iavf_adminq.c<br/>index 82fcd18ad660..6937b7dd44cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_adminq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_adminq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_adminq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_adminq.c</a></div><div class='hunk'>@@ -18,7 +18,7 @@ static enum iavf_status iavf_alloc_adminq_asq_ring(struct iavf_hw *hw)</div><div class='ctx'> 	ret_code = iavf_allocate_dma_mem(hw, &amp;hw-&gt;aq.asq.desc_buf,</div><div class='ctx'> 					 iavf_mem_atq_ring,</div><div class='ctx'> 					 (hw-&gt;aq.num_asq_entries *</div><div class='del'>-					 sizeof(struct iavf_aq_desc)),</div><div class='add'>+					 sizeof(struct libie_aq_desc)),</div><div class='ctx'> 					 IAVF_ADMINQ_DESC_ALIGNMENT);</div><div class='ctx'> 	if (ret_code)</div><div class='ctx'> 		return ret_code;</div><div class='hunk'>@@ -45,7 +45,7 @@ static enum iavf_status iavf_alloc_adminq_arq_ring(struct iavf_hw *hw)</div><div class='ctx'> 	ret_code = iavf_allocate_dma_mem(hw, &amp;hw-&gt;aq.arq.desc_buf,</div><div class='ctx'> 					 iavf_mem_arq_ring,</div><div class='ctx'> 					 (hw-&gt;aq.num_arq_entries *</div><div class='del'>-					 sizeof(struct iavf_aq_desc)),</div><div class='add'>+					 sizeof(struct libie_aq_desc)),</div><div class='ctx'> 					 IAVF_ADMINQ_DESC_ALIGNMENT);</div><div class='ctx'> </div><div class='ctx'> 	return ret_code;</div><div class='hunk'>@@ -81,7 +81,7 @@ static void iavf_free_adminq_arq(struct iavf_hw *hw)</div><div class='ctx'>  **/</div><div class='ctx'> static enum iavf_status iavf_alloc_arq_bufs(struct iavf_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	struct iavf_aq_desc *desc;</div><div class='add'>+	struct libie_aq_desc *desc;</div><div class='ctx'> 	struct iavf_dma_mem *bi;</div><div class='ctx'> 	enum iavf_status ret_code;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -111,9 +111,9 @@ static enum iavf_status iavf_alloc_arq_bufs(struct iavf_hw *hw)</div><div class='ctx'> 		/* now configure the descriptors for use */</div><div class='ctx'> 		desc = IAVF_ADMINQ_DESC(hw-&gt;aq.arq, i);</div><div class='ctx'> </div><div class='del'>-		desc-&gt;flags = cpu_to_le16(IAVF_AQ_FLAG_BUF);</div><div class='add'>+		desc-&gt;flags = cpu_to_le16(LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 		if (hw-&gt;aq.arq_buf_size &gt; IAVF_AQ_LARGE_BUF)</div><div class='del'>-			desc-&gt;flags |= cpu_to_le16(IAVF_AQ_FLAG_LB);</div><div class='add'>+			desc-&gt;flags |= cpu_to_le16(LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 		desc-&gt;opcode = 0;</div><div class='ctx'> 		/* This is in accordance with Admin queue design, there is no</div><div class='ctx'> 		 * register for buffer size configuration</div><div class='hunk'>@@ -122,12 +122,12 @@ static enum iavf_status iavf_alloc_arq_bufs(struct iavf_hw *hw)</div><div class='ctx'> 		desc-&gt;retval = 0;</div><div class='ctx'> 		desc-&gt;cookie_high = 0;</div><div class='ctx'> 		desc-&gt;cookie_low = 0;</div><div class='del'>-		desc-&gt;params.external.addr_high =</div><div class='add'>+		desc-&gt;params.generic.addr_high =</div><div class='ctx'> 			cpu_to_le32(upper_32_bits(bi-&gt;pa));</div><div class='del'>-		desc-&gt;params.external.addr_low =</div><div class='add'>+		desc-&gt;params.generic.addr_low =</div><div class='ctx'> 			cpu_to_le32(lower_32_bits(bi-&gt;pa));</div><div class='del'>-		desc-&gt;params.external.param0 = 0;</div><div class='del'>-		desc-&gt;params.external.param1 = 0;</div><div class='add'>+		desc-&gt;params.generic.param0 = 0;</div><div class='add'>+		desc-&gt;params.generic.param1 = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> alloc_arq_bufs:</div><div class='hunk'>@@ -558,8 +558,8 @@ static u16 iavf_clean_asq(struct iavf_hw *hw)</div><div class='ctx'> 	struct iavf_adminq_ring *asq = &amp;hw-&gt;aq.asq;</div><div class='ctx'> 	struct iavf_asq_cmd_details *details;</div><div class='ctx'> 	u16 ntc = asq-&gt;next_to_clean;</div><div class='del'>-	struct iavf_aq_desc desc_cb;</div><div class='del'>-	struct iavf_aq_desc *desc;</div><div class='add'>+	struct libie_aq_desc desc_cb;</div><div class='add'>+	struct libie_aq_desc *desc;</div><div class='ctx'> </div><div class='ctx'> 	desc = IAVF_ADMINQ_DESC(*asq, ntc);</div><div class='ctx'> 	details = IAVF_ADMINQ_DETAILS(*asq, ntc);</div><div class='hunk'>@@ -573,7 +573,7 @@ static u16 iavf_clean_asq(struct iavf_hw *hw)</div><div class='ctx'> 			desc_cb = *desc;</div><div class='ctx'> 			cb_func(hw, &amp;desc_cb);</div><div class='ctx'> 		}</div><div class='del'>-		memset((void *)desc, 0, sizeof(struct iavf_aq_desc));</div><div class='add'>+		memset((void *)desc, 0, sizeof(struct libie_aq_desc));</div><div class='ctx'> 		memset((void *)details, 0,</div><div class='ctx'> 		       sizeof(struct iavf_asq_cmd_details));</div><div class='ctx'> 		ntc++;</div><div class='hunk'>@@ -615,14 +615,14 @@ bool iavf_asq_done(struct iavf_hw *hw)</div><div class='ctx'>  *  queue.  It runs the queue, cleans the queue, etc</div><div class='ctx'>  **/</div><div class='ctx'> enum iavf_status iavf_asq_send_command(struct iavf_hw *hw,</div><div class='del'>-				       struct iavf_aq_desc *desc,</div><div class='add'>+				       struct libie_aq_desc *desc,</div><div class='ctx'> 				       void *buff, /* can be NULL */</div><div class='ctx'> 				       u16  buff_size,</div><div class='ctx'> 				       struct iavf_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='ctx'> 	struct iavf_dma_mem *dma_buff = NULL;</div><div class='ctx'> 	struct iavf_asq_cmd_details *details;</div><div class='del'>-	struct iavf_aq_desc *desc_on_ring;</div><div class='add'>+	struct libie_aq_desc *desc_on_ring;</div><div class='ctx'> 	bool cmd_completed = false;</div><div class='ctx'> 	enum iavf_status status = 0;</div><div class='ctx'> 	u16  retval = 0;</div><div class='hunk'>@@ -637,7 +637,7 @@ enum iavf_status iavf_asq_send_command(struct iavf_hw *hw,</div><div class='ctx'> 		goto asq_send_command_error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hw-&gt;aq.asq_last_status = IAVF_AQ_RC_OK;</div><div class='add'>+	hw-&gt;aq.asq_last_status = LIBIE_AQ_RC_OK;</div><div class='ctx'> </div><div class='ctx'> 	val = rd32(hw, IAVF_VF_ATQH1);</div><div class='ctx'> 	if (val &gt;= hw-&gt;aq.num_asq_entries) {</div><div class='hunk'>@@ -717,9 +717,9 @@ enum iavf_status iavf_asq_send_command(struct iavf_hw *hw,</div><div class='ctx'> 		/* Update the address values in the desc with the pa value</div><div class='ctx'> 		 * for respective buffer</div><div class='ctx'> 		 */</div><div class='del'>-		desc_on_ring-&gt;params.external.addr_high =</div><div class='add'>+		desc_on_ring-&gt;params.generic.addr_high =</div><div class='ctx'> 				cpu_to_le32(upper_32_bits(dma_buff-&gt;pa));</div><div class='del'>-		desc_on_ring-&gt;params.external.addr_low =</div><div class='add'>+		desc_on_ring-&gt;params.generic.addr_low =</div><div class='ctx'> 				cpu_to_le32(lower_32_bits(dma_buff-&gt;pa));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -766,13 +766,13 @@ enum iavf_status iavf_asq_send_command(struct iavf_hw *hw,</div><div class='ctx'> 			retval &amp;= 0xff;</div><div class='ctx'> 		}</div><div class='ctx'> 		cmd_completed = true;</div><div class='del'>-		if ((enum iavf_admin_queue_err)retval == IAVF_AQ_RC_OK)</div><div class='add'>+		if ((enum libie_aq_err)retval == LIBIE_AQ_RC_OK)</div><div class='ctx'> 			status = 0;</div><div class='del'>-		else if ((enum iavf_admin_queue_err)retval == IAVF_AQ_RC_EBUSY)</div><div class='add'>+		else if ((enum libie_aq_err)retval == LIBIE_AQ_RC_EBUSY)</div><div class='ctx'> 			status = IAVF_ERR_NOT_READY;</div><div class='ctx'> 		else</div><div class='ctx'> 			status = IAVF_ERR_ADMIN_QUEUE_ERROR;</div><div class='del'>-		hw-&gt;aq.asq_last_status = (enum iavf_admin_queue_err)retval;</div><div class='add'>+		hw-&gt;aq.asq_last_status = (enum libie_aq_err)retval;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE,</div><div class='hunk'>@@ -809,12 +809,12 @@ asq_send_command_error:</div><div class='ctx'>  *</div><div class='ctx'>  *  Fill the desc with default values</div><div class='ctx'>  **/</div><div class='del'>-void iavf_fill_default_direct_cmd_desc(struct iavf_aq_desc *desc, u16 opcode)</div><div class='add'>+void iavf_fill_default_direct_cmd_desc(struct libie_aq_desc *desc, u16 opcode)</div><div class='ctx'> {</div><div class='ctx'> 	/* zero out the desc */</div><div class='del'>-	memset((void *)desc, 0, sizeof(struct iavf_aq_desc));</div><div class='add'>+	memset((void *)desc, 0, sizeof(struct libie_aq_desc));</div><div class='ctx'> 	desc-&gt;opcode = cpu_to_le16(opcode);</div><div class='del'>-	desc-&gt;flags = cpu_to_le16(IAVF_AQ_FLAG_SI);</div><div class='add'>+	desc-&gt;flags = cpu_to_le16(LIBIE_AQ_FLAG_SI);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -832,7 +832,7 @@ enum iavf_status iavf_clean_arq_element(struct iavf_hw *hw,</div><div class='ctx'> 					u16 *pending)</div><div class='ctx'> {</div><div class='ctx'> 	u16 ntc = hw-&gt;aq.arq.next_to_clean;</div><div class='del'>-	struct iavf_aq_desc *desc;</div><div class='add'>+	struct libie_aq_desc *desc;</div><div class='ctx'> 	enum iavf_status ret_code = 0;</div><div class='ctx'> 	struct iavf_dma_mem *bi;</div><div class='ctx'> 	u16 desc_idx;</div><div class='hunk'>@@ -866,9 +866,9 @@ enum iavf_status iavf_clean_arq_element(struct iavf_hw *hw,</div><div class='ctx'> 	desc_idx = ntc;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;aq.arq_last_status =</div><div class='del'>-		(enum iavf_admin_queue_err)le16_to_cpu(desc-&gt;retval);</div><div class='add'>+		(enum libie_aq_err)le16_to_cpu(desc-&gt;retval);</div><div class='ctx'> 	flags = le16_to_cpu(desc-&gt;flags);</div><div class='del'>-	if (flags &amp; IAVF_AQ_FLAG_ERR) {</div><div class='add'>+	if (flags &amp; LIBIE_AQ_FLAG_ERR) {</div><div class='ctx'> 		ret_code = IAVF_ERR_ADMIN_QUEUE_ERROR;</div><div class='ctx'> 		iavf_debug(hw,</div><div class='ctx'> 			   IAVF_DEBUG_AQ_MESSAGE,</div><div class='hunk'>@@ -892,14 +892,14 @@ enum iavf_status iavf_clean_arq_element(struct iavf_hw *hw,</div><div class='ctx'> 	 * size</div><div class='ctx'> 	 */</div><div class='ctx'> 	bi = &amp;hw-&gt;aq.arq.r.arq_bi[ntc];</div><div class='del'>-	memset((void *)desc, 0, sizeof(struct iavf_aq_desc));</div><div class='add'>+	memset((void *)desc, 0, sizeof(struct libie_aq_desc));</div><div class='ctx'> </div><div class='del'>-	desc-&gt;flags = cpu_to_le16(IAVF_AQ_FLAG_BUF);</div><div class='add'>+	desc-&gt;flags = cpu_to_le16(LIBIE_AQ_FLAG_BUF);</div><div class='ctx'> 	if (hw-&gt;aq.arq_buf_size &gt; IAVF_AQ_LARGE_BUF)</div><div class='del'>-		desc-&gt;flags |= cpu_to_le16(IAVF_AQ_FLAG_LB);</div><div class='add'>+		desc-&gt;flags |= cpu_to_le16(LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 	desc-&gt;datalen = cpu_to_le16((u16)bi-&gt;size);</div><div class='del'>-	desc-&gt;params.external.addr_high = cpu_to_le32(upper_32_bits(bi-&gt;pa));</div><div class='del'>-	desc-&gt;params.external.addr_low = cpu_to_le32(lower_32_bits(bi-&gt;pa));</div><div class='add'>+	desc-&gt;params.generic.addr_high = cpu_to_le32(upper_32_bits(bi-&gt;pa));</div><div class='add'>+	desc-&gt;params.generic.addr_low = cpu_to_le32(lower_32_bits(bi-&gt;pa));</div><div class='ctx'> </div><div class='ctx'> 	/* set tail = the last cleaned desc index. */</div><div class='ctx'> 	wr32(hw, IAVF_VF_ARQT1, ntc);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_adminq.h b/drivers/net/ethernet/intel/iavf/iavf_adminq.h<br/>index 406506f64bdd..bbf5c4b3a2ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_adminq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_adminq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_adminq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_adminq.h</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include "iavf_adminq_cmd.h"</div><div class='ctx'> </div><div class='ctx'> #define IAVF_ADMINQ_DESC(R, i)   \</div><div class='del'>-	(&amp;(((struct iavf_aq_desc *)((R).desc_buf.va))[i]))</div><div class='add'>+	(&amp;(((struct libie_aq_desc *)((R).desc_buf.va))[i]))</div><div class='ctx'> </div><div class='ctx'> #define IAVF_ADMINQ_DESC_ALIGNMENT 4096</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +39,7 @@ struct iavf_asq_cmd_details {</div><div class='ctx'> 	u16 flags_dis;</div><div class='ctx'> 	bool async;</div><div class='ctx'> 	bool postpone;</div><div class='del'>-	struct iavf_aq_desc *wb_desc;</div><div class='add'>+	struct libie_aq_desc *wb_desc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define IAVF_ADMINQ_DETAILS(R, i)   \</div><div class='hunk'>@@ -47,7 +47,7 @@ struct iavf_asq_cmd_details {</div><div class='ctx'> </div><div class='ctx'> /* ARQ event information */</div><div class='ctx'> struct iavf_arq_event_info {</div><div class='del'>-	struct iavf_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 msg_len;</div><div class='ctx'> 	u16 buf_len;</div><div class='ctx'> 	u8 *msg_buf;</div><div class='hunk'>@@ -72,8 +72,8 @@ struct iavf_adminq_info {</div><div class='ctx'> 	struct mutex arq_mutex; /* Receive queue lock */</div><div class='ctx'> </div><div class='ctx'> 	/* last status values on send and receive queues */</div><div class='del'>-	enum iavf_admin_queue_err asq_last_status;</div><div class='del'>-	enum iavf_admin_queue_err arq_last_status;</div><div class='add'>+	enum libie_aq_err asq_last_status;</div><div class='add'>+	enum libie_aq_err arq_last_status;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -123,6 +123,6 @@ static inline int iavf_aq_rc_to_posix(int aq_ret, int aq_rc)</div><div class='ctx'> #define IAVF_AQ_LARGE_BUF	512</div><div class='ctx'> #define IAVF_ASQ_CMD_TIMEOUT	250000  /* usecs */</div><div class='ctx'> </div><div class='del'>-void iavf_fill_default_direct_cmd_desc(struct iavf_aq_desc *desc, u16 opcode);</div><div class='add'>+void iavf_fill_default_direct_cmd_desc(struct libie_aq_desc *desc, u16 opcode);</div><div class='ctx'> </div><div class='ctx'> #endif /* _IAVF_ADMINQ_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h b/drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h<br/>index bc512308557b..0482c9ce9b9c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> #ifndef _IAVF_ADMINQ_CMD_H_</div><div class='ctx'> #define _IAVF_ADMINQ_CMD_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/net/intel/libie/adminq.h&gt;</div><div class='add'>+</div><div class='ctx'> /* This header file defines the iavf Admin Queue commands and is shared between</div><div class='ctx'>  * iavf Firmware and Software.</div><div class='ctx'>  *</div><div class='hunk'>@@ -21,87 +23,6 @@</div><div class='ctx'> /* API version 1.7 implements additional link and PHY-specific APIs  */</div><div class='ctx'> #define IAVF_MINOR_VER_GET_LINK_INFO_XL710 0x0007</div><div class='ctx'> </div><div class='del'>-struct iavf_aq_desc {</div><div class='del'>-	__le16 flags;</div><div class='del'>-	__le16 opcode;</div><div class='del'>-	__le16 datalen;</div><div class='del'>-	__le16 retval;</div><div class='del'>-	__le32 cookie_high;</div><div class='del'>-	__le32 cookie_low;</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			__le32 param0;</div><div class='del'>-			__le32 param1;</div><div class='del'>-			__le32 param2;</div><div class='del'>-			__le32 param3;</div><div class='del'>-		} internal;</div><div class='del'>-		struct {</div><div class='del'>-			__le32 param0;</div><div class='del'>-			__le32 param1;</div><div class='del'>-			__le32 addr_high;</div><div class='del'>-			__le32 addr_low;</div><div class='del'>-		} external;</div><div class='del'>-		u8 raw[16];</div><div class='del'>-	} params;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Flags sub-structure</div><div class='del'>- * |0  |1  |2  |3  |4  |5  |6  |7  |8  |9  |10 |11 |12 |13 |14 |15 |</div><div class='del'>- * |DD |CMP|ERR|VFE| * *  RESERVED * * |LB |RD |VFC|BUF|SI |EI |FE |</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/* command flags and offsets*/</div><div class='del'>-#define IAVF_AQ_FLAG_DD_SHIFT	0</div><div class='del'>-#define IAVF_AQ_FLAG_CMP_SHIFT	1</div><div class='del'>-#define IAVF_AQ_FLAG_ERR_SHIFT	2</div><div class='del'>-#define IAVF_AQ_FLAG_VFE_SHIFT	3</div><div class='del'>-#define IAVF_AQ_FLAG_LB_SHIFT	9</div><div class='del'>-#define IAVF_AQ_FLAG_RD_SHIFT	10</div><div class='del'>-#define IAVF_AQ_FLAG_VFC_SHIFT	11</div><div class='del'>-#define IAVF_AQ_FLAG_BUF_SHIFT	12</div><div class='del'>-#define IAVF_AQ_FLAG_SI_SHIFT	13</div><div class='del'>-#define IAVF_AQ_FLAG_EI_SHIFT	14</div><div class='del'>-#define IAVF_AQ_FLAG_FE_SHIFT	15</div><div class='del'>-</div><div class='del'>-#define IAVF_AQ_FLAG_DD		BIT(IAVF_AQ_FLAG_DD_SHIFT)  /* 0x1    */</div><div class='del'>-#define IAVF_AQ_FLAG_CMP	BIT(IAVF_AQ_FLAG_CMP_SHIFT) /* 0x2    */</div><div class='del'>-#define IAVF_AQ_FLAG_ERR	BIT(IAVF_AQ_FLAG_ERR_SHIFT) /* 0x4    */</div><div class='del'>-#define IAVF_AQ_FLAG_VFE	BIT(IAVF_AQ_FLAG_VFE_SHIFT) /* 0x8    */</div><div class='del'>-#define IAVF_AQ_FLAG_LB		BIT(IAVF_AQ_FLAG_LB_SHIFT)  /* 0x200  */</div><div class='del'>-#define IAVF_AQ_FLAG_RD		BIT(IAVF_AQ_FLAG_RD_SHIFT)  /* 0x400  */</div><div class='del'>-#define IAVF_AQ_FLAG_VFC	BIT(IAVF_AQ_FLAG_VFC_SHIFT) /* 0x800  */</div><div class='del'>-#define IAVF_AQ_FLAG_BUF	BIT(IAVF_AQ_FLAG_BUF_SHIFT) /* 0x1000 */</div><div class='del'>-#define IAVF_AQ_FLAG_SI		BIT(IAVF_AQ_FLAG_SI_SHIFT)  /* 0x2000 */</div><div class='del'>-#define IAVF_AQ_FLAG_EI		BIT(IAVF_AQ_FLAG_EI_SHIFT)  /* 0x4000 */</div><div class='del'>-#define IAVF_AQ_FLAG_FE		BIT(IAVF_AQ_FLAG_FE_SHIFT)  /* 0x8000 */</div><div class='del'>-</div><div class='del'>-/* error codes */</div><div class='del'>-enum iavf_admin_queue_err {</div><div class='del'>-	IAVF_AQ_RC_OK		= 0,  /* success */</div><div class='del'>-	IAVF_AQ_RC_EPERM	= 1,  /* Operation not permitted */</div><div class='del'>-	IAVF_AQ_RC_ENOENT	= 2,  /* No such element */</div><div class='del'>-	IAVF_AQ_RC_ESRCH	= 3,  /* Bad opcode */</div><div class='del'>-	IAVF_AQ_RC_EINTR	= 4,  /* operation interrupted */</div><div class='del'>-	IAVF_AQ_RC_EIO		= 5,  /* I/O error */</div><div class='del'>-	IAVF_AQ_RC_ENXIO	= 6,  /* No such resource */</div><div class='del'>-	IAVF_AQ_RC_E2BIG	= 7,  /* Arg too long */</div><div class='del'>-	IAVF_AQ_RC_EAGAIN	= 8,  /* Try again */</div><div class='del'>-	IAVF_AQ_RC_ENOMEM	= 9,  /* Out of memory */</div><div class='del'>-	IAVF_AQ_RC_EACCES	= 10, /* Permission denied */</div><div class='del'>-	IAVF_AQ_RC_EFAULT	= 11, /* Bad address */</div><div class='del'>-	IAVF_AQ_RC_EBUSY	= 12, /* Device or resource busy */</div><div class='del'>-	IAVF_AQ_RC_EEXIST	= 13, /* object already exists */</div><div class='del'>-	IAVF_AQ_RC_EINVAL	= 14, /* Invalid argument */</div><div class='del'>-	IAVF_AQ_RC_ENOTTY	= 15, /* Not a typewriter */</div><div class='del'>-	IAVF_AQ_RC_ENOSPC	= 16, /* No space left or alloc failure */</div><div class='del'>-	IAVF_AQ_RC_ENOSYS	= 17, /* Function not implemented */</div><div class='del'>-	IAVF_AQ_RC_ERANGE	= 18, /* Parameter out of range */</div><div class='del'>-	IAVF_AQ_RC_EFLUSHED	= 19, /* Cmd flushed due to prev cmd error */</div><div class='del'>-	IAVF_AQ_RC_BAD_ADDR	= 20, /* Descriptor contains a bad pointer */</div><div class='del'>-	IAVF_AQ_RC_EMODE	= 21, /* Op not allowed in current dev mode */</div><div class='del'>-	IAVF_AQ_RC_EFBIG	= 22, /* File too large */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Admin Queue command opcodes */</div><div class='ctx'> enum iavf_admin_queue_opc {</div><div class='ctx'> 	/* aq commands */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_adv_rss.c b/drivers/net/ethernet/intel/iavf/iavf_adv_rss.c<br/>index a9e1da35e248..4d12dfe1b481 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_adv_rss.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_adv_rss.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_adv_rss.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_adv_rss.c</a></div><div class='hunk'>@@ -91,6 +91,55 @@ iavf_fill_adv_rss_sctp_hdr(struct virtchnl_proto_hdr *hdr, u64 hash_flds)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * iavf_fill_adv_rss_gtp_hdr - Fill GTP-related RSS protocol headers</div><div class='add'>+ * @proto_hdrs: pointer to the virtchnl protocol headers structure to populate</div><div class='add'>+ * @packet_hdrs: bitmask of packet header types to configure</div><div class='add'>+ * @hash_flds: RSS hash field configuration</div><div class='add'>+ *</div><div class='add'>+ * This function populates the virtchnl protocol header structure with</div><div class='add'>+ * appropriate GTP-related header types based on the specified packet_hdrs.</div><div class='add'>+ * It supports GTPC, GTPU with extension headers, and uplink/downlink PDU</div><div class='add'>+ * types. For certain GTPU types, it also appends an IPv4 header to enable</div><div class='add'>+ * hashing on the destination IP address.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or -EOPNOTSUPP if the packet_hdrs value is unsupported.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+iavf_fill_adv_rss_gtp_hdr(struct virtchnl_proto_hdrs *proto_hdrs,</div><div class='add'>+			  u32 packet_hdrs, u64 hash_flds)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl_proto_hdr *hdr;</div><div class='add'>+</div><div class='add'>+	hdr = &amp;proto_hdrs-&gt;proto_hdr[proto_hdrs-&gt;count - 1];</div><div class='add'>+</div><div class='add'>+	switch (packet_hdrs &amp; IAVF_ADV_RSS_FLOW_SEG_HDR_GTP) {</div><div class='add'>+	case IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC_TEID:</div><div class='add'>+	case IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC:</div><div class='add'>+		VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPC);</div><div class='add'>+		break;</div><div class='add'>+	case IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_EH:</div><div class='add'>+		VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH);</div><div class='add'>+		break;</div><div class='add'>+	case IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_UP:</div><div class='add'>+		VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH_PDU_UP);</div><div class='add'>+		hdr = &amp;proto_hdrs-&gt;proto_hdr[proto_hdrs-&gt;count++];</div><div class='add'>+		iavf_fill_adv_rss_ip4_hdr(hdr, IAVF_ADV_RSS_HASH_FLD_IPV4_DA);</div><div class='add'>+		break;</div><div class='add'>+	case IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_DWN:</div><div class='add'>+		VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH_PDU_DWN);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_IP:</div><div class='add'>+		hdr = &amp;proto_hdrs-&gt;proto_hdr[proto_hdrs-&gt;count++];</div><div class='add'>+		iavf_fill_adv_rss_ip4_hdr(hdr, IAVF_ADV_RSS_HASH_FLD_IPV4_DA);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * iavf_fill_adv_rss_cfg_msg - fill the RSS configuration into virtchnl message</div><div class='ctx'>  * @rss_cfg: the virtchnl message to be filled with RSS configuration setting</div><div class='ctx'>  * @packet_hdrs: the RSS configuration protocol header types</div><div class='hunk'>@@ -103,6 +152,8 @@ int</div><div class='ctx'> iavf_fill_adv_rss_cfg_msg(struct virtchnl_rss_cfg *rss_cfg,</div><div class='ctx'> 			  u32 packet_hdrs, u64 hash_flds, bool symm)</div><div class='ctx'> {</div><div class='add'>+	const u32 packet_l3_hdrs = packet_hdrs &amp; IAVF_ADV_RSS_FLOW_SEG_HDR_L3;</div><div class='add'>+	const u32 packet_l4_hdrs = packet_hdrs &amp; IAVF_ADV_RSS_FLOW_SEG_HDR_L4;</div><div class='ctx'> 	struct virtchnl_proto_hdrs *proto_hdrs = &amp;rss_cfg-&gt;proto_hdrs;</div><div class='ctx'> 	struct virtchnl_proto_hdr *hdr;</div><div class='ctx'> </div><div class='hunk'>@@ -113,31 +164,41 @@ iavf_fill_adv_rss_cfg_msg(struct virtchnl_rss_cfg *rss_cfg,</div><div class='ctx'> </div><div class='ctx'> 	proto_hdrs-&gt;tunnel_level = 0;	/* always outer layer */</div><div class='ctx'> </div><div class='del'>-	hdr = &amp;proto_hdrs-&gt;proto_hdr[proto_hdrs-&gt;count++];</div><div class='del'>-	switch (packet_hdrs &amp; IAVF_ADV_RSS_FLOW_SEG_HDR_L3) {</div><div class='del'>-	case IAVF_ADV_RSS_FLOW_SEG_HDR_IPV4:</div><div class='del'>-		iavf_fill_adv_rss_ip4_hdr(hdr, hash_flds);</div><div class='del'>-		break;</div><div class='del'>-	case IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6:</div><div class='del'>-		iavf_fill_adv_rss_ip6_hdr(hdr, hash_flds);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (packet_l3_hdrs) {</div><div class='add'>+		hdr = &amp;proto_hdrs-&gt;proto_hdr[proto_hdrs-&gt;count++];</div><div class='add'>+		switch (packet_l3_hdrs) {</div><div class='add'>+		case IAVF_ADV_RSS_FLOW_SEG_HDR_IPV4:</div><div class='add'>+			iavf_fill_adv_rss_ip4_hdr(hdr, hash_flds);</div><div class='add'>+			break;</div><div class='add'>+		case IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6:</div><div class='add'>+			iavf_fill_adv_rss_ip6_hdr(hdr, hash_flds);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hdr = &amp;proto_hdrs-&gt;proto_hdr[proto_hdrs-&gt;count++];</div><div class='del'>-	switch (packet_hdrs &amp; IAVF_ADV_RSS_FLOW_SEG_HDR_L4) {</div><div class='del'>-	case IAVF_ADV_RSS_FLOW_SEG_HDR_TCP:</div><div class='del'>-		iavf_fill_adv_rss_tcp_hdr(hdr, hash_flds);</div><div class='del'>-		break;</div><div class='del'>-	case IAVF_ADV_RSS_FLOW_SEG_HDR_UDP:</div><div class='del'>-		iavf_fill_adv_rss_udp_hdr(hdr, hash_flds);</div><div class='del'>-		break;</div><div class='del'>-	case IAVF_ADV_RSS_FLOW_SEG_HDR_SCTP:</div><div class='del'>-		iavf_fill_adv_rss_sctp_hdr(hdr, hash_flds);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (packet_l4_hdrs) {</div><div class='add'>+		hdr = &amp;proto_hdrs-&gt;proto_hdr[proto_hdrs-&gt;count++];</div><div class='add'>+		switch (packet_l4_hdrs) {</div><div class='add'>+		case IAVF_ADV_RSS_FLOW_SEG_HDR_TCP:</div><div class='add'>+			iavf_fill_adv_rss_tcp_hdr(hdr, hash_flds);</div><div class='add'>+			break;</div><div class='add'>+		case IAVF_ADV_RSS_FLOW_SEG_HDR_UDP:</div><div class='add'>+			iavf_fill_adv_rss_udp_hdr(hdr, hash_flds);</div><div class='add'>+			break;</div><div class='add'>+		case IAVF_ADV_RSS_FLOW_SEG_HDR_SCTP:</div><div class='add'>+			iavf_fill_adv_rss_sctp_hdr(hdr, hash_flds);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (packet_hdrs &amp; IAVF_ADV_RSS_FLOW_SEG_HDR_GTP) {</div><div class='add'>+		hdr = &amp;proto_hdrs-&gt;proto_hdr[proto_hdrs-&gt;count++];</div><div class='add'>+		if (iavf_fill_adv_rss_gtp_hdr(proto_hdrs, packet_hdrs, hash_flds))</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -186,6 +247,8 @@ iavf_print_adv_rss_cfg(struct iavf_adapter *adapter, struct iavf_adv_rss *rss,</div><div class='ctx'> 		proto = "UDP";</div><div class='ctx'> 	else if (packet_hdrs &amp; IAVF_ADV_RSS_FLOW_SEG_HDR_SCTP)</div><div class='ctx'> 		proto = "SCTP";</div><div class='add'>+	else if (packet_hdrs &amp; IAVF_ADV_RSS_FLOW_SEG_HDR_GTP)</div><div class='add'>+		proto = "GTP";</div><div class='ctx'> 	else</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -211,6 +274,16 @@ iavf_print_adv_rss_cfg(struct iavf_adapter *adapter, struct iavf_adv_rss *rss,</div><div class='ctx'> 			 IAVF_ADV_RSS_HASH_FLD_UDP_DST_PORT |</div><div class='ctx'> 			 IAVF_ADV_RSS_HASH_FLD_SCTP_DST_PORT))</div><div class='ctx'> 		strcat(hash_opt, "dst port,");</div><div class='add'>+	if (hash_flds &amp; IAVF_ADV_RSS_HASH_FLD_GTPC_TEID)</div><div class='add'>+		strcat(hash_opt, "gtp-c,");</div><div class='add'>+	if (hash_flds &amp; IAVF_ADV_RSS_HASH_FLD_GTPU_IP_TEID)</div><div class='add'>+		strcat(hash_opt, "gtp-u ip,");</div><div class='add'>+	if (hash_flds &amp; IAVF_ADV_RSS_HASH_FLD_GTPU_EH_TEID)</div><div class='add'>+		strcat(hash_opt, "gtp-u ext,");</div><div class='add'>+	if (hash_flds &amp; IAVF_ADV_RSS_HASH_FLD_GTPU_UP_TEID)</div><div class='add'>+		strcat(hash_opt, "gtp-u ul,");</div><div class='add'>+	if (hash_flds &amp; IAVF_ADV_RSS_HASH_FLD_GTPU_DWN_TEID)</div><div class='add'>+		strcat(hash_opt, "gtp-u dl,");</div><div class='ctx'> </div><div class='ctx'> 	if (!action)</div><div class='ctx'> 		action = "";</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_adv_rss.h b/drivers/net/ethernet/intel/iavf/iavf_adv_rss.h<br/>index e31eb2afebea..74cc9e0d528c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_adv_rss.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_adv_rss.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_adv_rss.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_adv_rss.h</a></div><div class='hunk'>@@ -22,6 +22,12 @@ enum iavf_adv_rss_flow_seg_hdr {</div><div class='ctx'> 	IAVF_ADV_RSS_FLOW_SEG_HDR_TCP	= 0x00000004,</div><div class='ctx'> 	IAVF_ADV_RSS_FLOW_SEG_HDR_UDP	= 0x00000008,</div><div class='ctx'> 	IAVF_ADV_RSS_FLOW_SEG_HDR_SCTP	= 0x00000010,</div><div class='add'>+	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC		= 0x00000400,</div><div class='add'>+	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC_TEID	= 0x00000800,</div><div class='add'>+	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_IP	= 0x00001000,</div><div class='add'>+	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_EH	= 0x00002000,</div><div class='add'>+	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_DWN	= 0x00004000,</div><div class='add'>+	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_UP	= 0x00008000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define IAVF_ADV_RSS_FLOW_SEG_HDR_L3		\</div><div class='hunk'>@@ -33,6 +39,14 @@ enum iavf_adv_rss_flow_seg_hdr {</div><div class='ctx'> 	 IAVF_ADV_RSS_FLOW_SEG_HDR_UDP |	\</div><div class='ctx'> 	 IAVF_ADV_RSS_FLOW_SEG_HDR_SCTP)</div><div class='ctx'> </div><div class='add'>+#define IAVF_ADV_RSS_FLOW_SEG_HDR_GTP		\</div><div class='add'>+	(IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC |	\</div><div class='add'>+	 IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC_TEID |	\</div><div class='add'>+	 IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_IP |	\</div><div class='add'>+	 IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_EH |	\</div><div class='add'>+	 IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_DWN |	\</div><div class='add'>+	 IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_UP)</div><div class='add'>+</div><div class='ctx'> enum iavf_adv_rss_flow_field {</div><div class='ctx'> 	/* L3 */</div><div class='ctx'> 	IAVF_ADV_RSS_FLOW_FIELD_IDX_IPV4_SA,</div><div class='hunk'>@@ -46,6 +60,17 @@ enum iavf_adv_rss_flow_field {</div><div class='ctx'> 	IAVF_ADV_RSS_FLOW_FIELD_IDX_UDP_DST_PORT,</div><div class='ctx'> 	IAVF_ADV_RSS_FLOW_FIELD_IDX_SCTP_SRC_PORT,</div><div class='ctx'> 	IAVF_ADV_RSS_FLOW_FIELD_IDX_SCTP_DST_PORT,</div><div class='add'>+	/* GTPC_TEID */</div><div class='add'>+	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPC_TEID,</div><div class='add'>+	/* GTPU_IP */</div><div class='add'>+	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_IP_TEID,</div><div class='add'>+	/* GTPU_EH */</div><div class='add'>+	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_EH_TEID,</div><div class='add'>+	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_EH_QFI,</div><div class='add'>+	/* GTPU_UP */</div><div class='add'>+	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_UP_TEID,</div><div class='add'>+	/* GTPU_DWN */</div><div class='add'>+	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_DWN_TEID,</div><div class='ctx'> </div><div class='ctx'> 	/* The total number of enums must not exceed 64 */</div><div class='ctx'> 	IAVF_ADV_RSS_FLOW_FIELD_IDX_MAX</div><div class='hunk'>@@ -72,6 +97,12 @@ enum iavf_adv_rss_flow_field {</div><div class='ctx'> 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_SCTP_SRC_PORT)</div><div class='ctx'> #define IAVF_ADV_RSS_HASH_FLD_SCTP_DST_PORT	\</div><div class='ctx'> 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_SCTP_DST_PORT)</div><div class='add'>+#define IAVF_ADV_RSS_HASH_FLD_GTPC_TEID	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPC_TEID)</div><div class='add'>+#define IAVF_ADV_RSS_HASH_FLD_GTPU_IP_TEID BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_IP_TEID)</div><div class='add'>+#define IAVF_ADV_RSS_HASH_FLD_GTPU_EH_TEID BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_EH_TEID)</div><div class='add'>+#define IAVF_ADV_RSS_HASH_FLD_GTPU_UP_TEID BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_UP_TEID)</div><div class='add'>+#define IAVF_ADV_RSS_HASH_FLD_GTPU_DWN_TEID \</div><div class='add'>+	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_DWN_TEID)</div><div class='ctx'> </div><div class='ctx'> /* bookkeeping of advanced RSS configuration */</div><div class='ctx'> struct iavf_adv_rss {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_common.c b/drivers/net/ethernet/intel/iavf/iavf_common.c<br/>index aa751ce3425b..614a886bca99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_common.c</a></div><div class='hunk'>@@ -8,66 +8,6 @@</div><div class='ctx'> #include "iavf_prototype.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * iavf_aq_str - convert AQ err code to a string</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @aq_err: the AQ error code to convert</div><div class='del'>- **/</div><div class='del'>-const char *iavf_aq_str(struct iavf_hw *hw, enum iavf_admin_queue_err aq_err)</div><div class='del'>-{</div><div class='del'>-	switch (aq_err) {</div><div class='del'>-	case IAVF_AQ_RC_OK:</div><div class='del'>-		return "OK";</div><div class='del'>-	case IAVF_AQ_RC_EPERM:</div><div class='del'>-		return "IAVF_AQ_RC_EPERM";</div><div class='del'>-	case IAVF_AQ_RC_ENOENT:</div><div class='del'>-		return "IAVF_AQ_RC_ENOENT";</div><div class='del'>-	case IAVF_AQ_RC_ESRCH:</div><div class='del'>-		return "IAVF_AQ_RC_ESRCH";</div><div class='del'>-	case IAVF_AQ_RC_EINTR:</div><div class='del'>-		return "IAVF_AQ_RC_EINTR";</div><div class='del'>-	case IAVF_AQ_RC_EIO:</div><div class='del'>-		return "IAVF_AQ_RC_EIO";</div><div class='del'>-	case IAVF_AQ_RC_ENXIO:</div><div class='del'>-		return "IAVF_AQ_RC_ENXIO";</div><div class='del'>-	case IAVF_AQ_RC_E2BIG:</div><div class='del'>-		return "IAVF_AQ_RC_E2BIG";</div><div class='del'>-	case IAVF_AQ_RC_EAGAIN:</div><div class='del'>-		return "IAVF_AQ_RC_EAGAIN";</div><div class='del'>-	case IAVF_AQ_RC_ENOMEM:</div><div class='del'>-		return "IAVF_AQ_RC_ENOMEM";</div><div class='del'>-	case IAVF_AQ_RC_EACCES:</div><div class='del'>-		return "IAVF_AQ_RC_EACCES";</div><div class='del'>-	case IAVF_AQ_RC_EFAULT:</div><div class='del'>-		return "IAVF_AQ_RC_EFAULT";</div><div class='del'>-	case IAVF_AQ_RC_EBUSY:</div><div class='del'>-		return "IAVF_AQ_RC_EBUSY";</div><div class='del'>-	case IAVF_AQ_RC_EEXIST:</div><div class='del'>-		return "IAVF_AQ_RC_EEXIST";</div><div class='del'>-	case IAVF_AQ_RC_EINVAL:</div><div class='del'>-		return "IAVF_AQ_RC_EINVAL";</div><div class='del'>-	case IAVF_AQ_RC_ENOTTY:</div><div class='del'>-		return "IAVF_AQ_RC_ENOTTY";</div><div class='del'>-	case IAVF_AQ_RC_ENOSPC:</div><div class='del'>-		return "IAVF_AQ_RC_ENOSPC";</div><div class='del'>-	case IAVF_AQ_RC_ENOSYS:</div><div class='del'>-		return "IAVF_AQ_RC_ENOSYS";</div><div class='del'>-	case IAVF_AQ_RC_ERANGE:</div><div class='del'>-		return "IAVF_AQ_RC_ERANGE";</div><div class='del'>-	case IAVF_AQ_RC_EFLUSHED:</div><div class='del'>-		return "IAVF_AQ_RC_EFLUSHED";</div><div class='del'>-	case IAVF_AQ_RC_BAD_ADDR:</div><div class='del'>-		return "IAVF_AQ_RC_BAD_ADDR";</div><div class='del'>-	case IAVF_AQ_RC_EMODE:</div><div class='del'>-		return "IAVF_AQ_RC_EMODE";</div><div class='del'>-	case IAVF_AQ_RC_EFBIG:</div><div class='del'>-		return "IAVF_AQ_RC_EFBIG";</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	snprintf(hw-&gt;err_str, sizeof(hw-&gt;err_str), "%d", aq_err);</div><div class='del'>-	return hw-&gt;err_str;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * iavf_stat_str - convert status err code to a string</div><div class='ctx'>  * @hw: pointer to the HW structure</div><div class='ctx'>  * @stat_err: the status error code to convert</div><div class='hunk'>@@ -228,7 +168,7 @@ const char *iavf_stat_str(struct iavf_hw *hw, enum iavf_status stat_err)</div><div class='ctx'> void iavf_debug_aq(struct iavf_hw *hw, enum iavf_debug_mask mask, void *desc,</div><div class='ctx'> 		   void *buffer, u16 buf_len)</div><div class='ctx'> {</div><div class='del'>-	struct iavf_aq_desc *aq_desc = (struct iavf_aq_desc *)desc;</div><div class='add'>+	struct libie_aq_desc *aq_desc = (struct libie_aq_desc *)desc;</div><div class='ctx'> 	u8 *buf = (u8 *)buffer;</div><div class='ctx'> </div><div class='ctx'> 	if ((!(mask &amp; hw-&gt;debug_mask)) || !desc)</div><div class='hunk'>@@ -244,11 +184,11 @@ void iavf_debug_aq(struct iavf_hw *hw, enum iavf_debug_mask mask, void *desc,</div><div class='ctx'> 		   le32_to_cpu(aq_desc-&gt;cookie_high),</div><div class='ctx'> 		   le32_to_cpu(aq_desc-&gt;cookie_low));</div><div class='ctx'> 	iavf_debug(hw, mask, "\tparam (0,1)  0x%08X 0x%08X\n",</div><div class='del'>-		   le32_to_cpu(aq_desc-&gt;params.internal.param0),</div><div class='del'>-		   le32_to_cpu(aq_desc-&gt;params.internal.param1));</div><div class='add'>+		   le32_to_cpu(aq_desc-&gt;params.generic.param0),</div><div class='add'>+		   le32_to_cpu(aq_desc-&gt;params.generic.param1));</div><div class='ctx'> 	iavf_debug(hw, mask, "\taddr (h,l)   0x%08X 0x%08X\n",</div><div class='del'>-		   le32_to_cpu(aq_desc-&gt;params.external.addr_high),</div><div class='del'>-		   le32_to_cpu(aq_desc-&gt;params.external.addr_low));</div><div class='add'>+		   le32_to_cpu(aq_desc-&gt;params.generic.addr_high),</div><div class='add'>+		   le32_to_cpu(aq_desc-&gt;params.generic.addr_low));</div><div class='ctx'> </div><div class='ctx'> 	if (buffer &amp;&amp; aq_desc-&gt;datalen) {</div><div class='ctx'> 		u16 len = le16_to_cpu(aq_desc-&gt;datalen);</div><div class='hunk'>@@ -297,11 +237,11 @@ bool iavf_check_asq_alive(struct iavf_hw *hw)</div><div class='ctx'>  **/</div><div class='ctx'> enum iavf_status iavf_aq_queue_shutdown(struct iavf_hw *hw, bool unloading)</div><div class='ctx'> {</div><div class='del'>-	struct iavf_aq_desc desc;</div><div class='del'>-	struct iavf_aqc_queue_shutdown *cmd =</div><div class='del'>-		(struct iavf_aqc_queue_shutdown *)&amp;desc.params.raw;</div><div class='add'>+	struct iavf_aqc_queue_shutdown *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	enum iavf_status status;</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	iavf_fill_default_direct_cmd_desc(&amp;desc, iavf_aqc_opc_queue_shutdown);</div><div class='ctx'> </div><div class='ctx'> 	if (unloading)</div><div class='hunk'>@@ -327,12 +267,13 @@ static enum iavf_status iavf_aq_get_set_rss_lut(struct iavf_hw *hw,</div><div class='ctx'> 						u8 *lut, u16 lut_size,</div><div class='ctx'> 						bool set)</div><div class='ctx'> {</div><div class='add'>+	struct iavf_aqc_get_set_rss_lut *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	enum iavf_status status;</div><div class='del'>-	struct iavf_aq_desc desc;</div><div class='del'>-	struct iavf_aqc_get_set_rss_lut *cmd_resp =</div><div class='del'>-		   (struct iavf_aqc_get_set_rss_lut *)&amp;desc.params.raw;</div><div class='ctx'> 	u16 flags;</div><div class='ctx'> </div><div class='add'>+	cmd_resp = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='ctx'> 	if (set)</div><div class='ctx'> 		iavf_fill_default_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 						  iavf_aqc_opc_set_rss_lut);</div><div class='hunk'>@@ -341,8 +282,8 @@ static enum iavf_status iavf_aq_get_set_rss_lut(struct iavf_hw *hw,</div><div class='ctx'> 						  iavf_aqc_opc_get_rss_lut);</div><div class='ctx'> </div><div class='ctx'> 	/* Indirect command */</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)IAVF_AQ_FLAG_BUF);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)IAVF_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	vsi_id = FIELD_PREP(IAVF_AQC_SET_RSS_LUT_VSI_ID_MASK, vsi_id) |</div><div class='ctx'> 		 FIELD_PREP(IAVF_AQC_SET_RSS_LUT_VSI_VALID, 1);</div><div class='hunk'>@@ -392,11 +333,12 @@ iavf_status iavf_aq_get_set_rss_key(struct iavf_hw *hw, u16 vsi_id,</div><div class='ctx'> 				    struct iavf_aqc_get_set_rss_key_data *key,</div><div class='ctx'> 				    bool set)</div><div class='ctx'> {</div><div class='del'>-	enum iavf_status status;</div><div class='del'>-	struct iavf_aq_desc desc;</div><div class='del'>-	struct iavf_aqc_get_set_rss_key *cmd_resp =</div><div class='del'>-			(struct iavf_aqc_get_set_rss_key *)&amp;desc.params.raw;</div><div class='ctx'> 	u16 key_size = sizeof(struct iavf_aqc_get_set_rss_key_data);</div><div class='add'>+	struct iavf_aqc_get_set_rss_key *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	enum iavf_status status;</div><div class='add'>+</div><div class='add'>+	cmd_resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	if (set)</div><div class='ctx'> 		iavf_fill_default_direct_cmd_desc(&amp;desc,</div><div class='hunk'>@@ -406,8 +348,8 @@ iavf_status iavf_aq_get_set_rss_key(struct iavf_hw *hw, u16 vsi_id,</div><div class='ctx'> 						  iavf_aqc_opc_get_rss_key);</div><div class='ctx'> </div><div class='ctx'> 	/* Indirect command */</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)IAVF_AQ_FLAG_BUF);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)IAVF_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_BUF);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	vsi_id = FIELD_PREP(IAVF_AQC_SET_RSS_KEY_VSI_ID_MASK, vsi_id) |</div><div class='ctx'> 		 FIELD_PREP(IAVF_AQC_SET_RSS_KEY_VSI_VALID, 1);</div><div class='hunk'>@@ -452,18 +394,18 @@ enum iavf_status iavf_aq_send_msg_to_pf(struct iavf_hw *hw,</div><div class='ctx'> 					struct iavf_asq_cmd_details *cmd_details)</div><div class='ctx'> {</div><div class='ctx'> 	struct iavf_asq_cmd_details details;</div><div class='del'>-	struct iavf_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	enum iavf_status status;</div><div class='ctx'> </div><div class='ctx'> 	iavf_fill_default_direct_cmd_desc(&amp;desc, iavf_aqc_opc_send_msg_to_pf);</div><div class='del'>-	desc.flags |= cpu_to_le16((u16)IAVF_AQ_FLAG_SI);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_SI);</div><div class='ctx'> 	desc.cookie_high = cpu_to_le32(v_opcode);</div><div class='ctx'> 	desc.cookie_low = cpu_to_le32(v_retval);</div><div class='ctx'> 	if (msglen) {</div><div class='del'>-		desc.flags |= cpu_to_le16((u16)(IAVF_AQ_FLAG_BUF</div><div class='del'>-						| IAVF_AQ_FLAG_RD));</div><div class='add'>+		desc.flags |= cpu_to_le16((u16)(LIBIE_AQ_FLAG_BUF</div><div class='add'>+						| LIBIE_AQ_FLAG_RD));</div><div class='ctx'> 		if (msglen &gt; IAVF_AQ_LARGE_BUF)</div><div class='del'>-			desc.flags |= cpu_to_le16((u16)IAVF_AQ_FLAG_LB);</div><div class='add'>+			desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 		desc.datalen = cpu_to_le16(msglen);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!cmd_details) {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_ethtool.c b/drivers/net/ethernet/intel/iavf/iavf_ethtool.c<br/>index 74a1e9fe1821..2cc21289a707 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_ethtool.c</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='add'>+</div><div class='ctx'> /* ethtool support for iavf */</div><div class='ctx'> #include "iavf.h"</div><div class='ctx'> </div><div class='hunk'>@@ -1256,9 +1258,10 @@ static int iavf_add_fdir_ethtool(struct iavf_adapter *adapter, struct ethtool_rx</div><div class='ctx'> {</div><div class='ctx'> 	struct ethtool_rx_flow_spec *fsp = &amp;cmd-&gt;fs;</div><div class='ctx'> 	struct iavf_fdir_fltr *fltr;</div><div class='del'>-	int count = 50;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(adapter-&gt;netdev);</div><div class='add'>+</div><div class='ctx'> 	if (!(adapter-&gt;flags &amp; IAVF_FLAG_FDIR_ENABLED))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='hunk'>@@ -1277,14 +1280,6 @@ static int iavf_add_fdir_ethtool(struct iavf_adapter *adapter, struct ethtool_rx</div><div class='ctx'> 	if (!fltr)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	while (!mutex_trylock(&amp;adapter-&gt;crit_lock)) {</div><div class='del'>-		if (--count == 0) {</div><div class='del'>-			kfree(fltr);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	err = iavf_add_fdir_fltr_info(adapter, fsp, fltr);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		err = iavf_fdir_add_fltr(adapter, fltr);</div><div class='hunk'>@@ -1292,7 +1287,6 @@ static int iavf_add_fdir_ethtool(struct iavf_adapter *adapter, struct ethtool_rx</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		kfree(fltr);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1313,14 +1307,7 @@ static int iavf_del_fdir_ethtool(struct iavf_adapter *adapter, struct ethtool_rx</div><div class='ctx'> 	return iavf_fdir_del_fltr(adapter, false, fsp-&gt;location);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * iavf_adv_rss_parse_hdrs - parses headers from RSS hash input</div><div class='del'>- * @cmd: ethtool rxnfc command</div><div class='del'>- *</div><div class='del'>- * This function parses the rxnfc command and returns intended</div><div class='del'>- * header types for RSS configuration</div><div class='del'>- */</div><div class='del'>-static u32 iavf_adv_rss_parse_hdrs(struct ethtool_rxnfc *cmd)</div><div class='add'>+static u32 iavf_adv_rss_parse_hdrs(const struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	u32 hdrs = IAVF_ADV_RSS_FLOW_SEG_HDR_NONE;</div><div class='ctx'> </div><div class='hunk'>@@ -1349,6 +1336,56 @@ static u32 iavf_adv_rss_parse_hdrs(struct ethtool_rxnfc *cmd)</div><div class='ctx'> 		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_SCTP |</div><div class='ctx'> 			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6;</div><div class='ctx'> 		break;</div><div class='add'>+	case GTPU_V4_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_IP |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV4;</div><div class='add'>+		break;</div><div class='add'>+	case GTPC_V4_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_UDP |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV4;</div><div class='add'>+		break;</div><div class='add'>+	case GTPC_TEID_V4_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC_TEID |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_UDP |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV4;</div><div class='add'>+		break;</div><div class='add'>+	case GTPU_EH_V4_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_EH |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV4;</div><div class='add'>+		break;</div><div class='add'>+	case GTPU_UL_V4_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_UP |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV4;</div><div class='add'>+		break;</div><div class='add'>+	case GTPU_DL_V4_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_DWN |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV4;</div><div class='add'>+		break;</div><div class='add'>+	case GTPU_V6_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_IP |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6;</div><div class='add'>+		break;</div><div class='add'>+	case GTPC_V6_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6;</div><div class='add'>+		break;</div><div class='add'>+	case GTPC_TEID_V6_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC_TEID |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6;</div><div class='add'>+		break;</div><div class='add'>+	case GTPU_EH_V6_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_EH |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6;</div><div class='add'>+		break;</div><div class='add'>+	case GTPU_UL_V6_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_UP |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6;</div><div class='add'>+		break;</div><div class='add'>+	case GTPU_DL_V6_FLOW:</div><div class='add'>+		hdrs |= IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_DWN |</div><div class='add'>+			IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1356,15 +1393,8 @@ static u32 iavf_adv_rss_parse_hdrs(struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	return hdrs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * iavf_adv_rss_parse_hash_flds - parses hash fields from RSS hash input</div><div class='del'>- * @cmd: ethtool rxnfc command</div><div class='del'>- * @symm: true if Symmetric Topelitz is set</div><div class='del'>- *</div><div class='del'>- * This function parses the rxnfc command and returns intended hash fields for</div><div class='del'>- * RSS configuration</div><div class='del'>- */</div><div class='del'>-static u64 iavf_adv_rss_parse_hash_flds(struct ethtool_rxnfc *cmd, bool symm)</div><div class='add'>+static u64</div><div class='add'>+iavf_adv_rss_parse_hash_flds(const struct ethtool_rxfh_fields *cmd, bool symm)</div><div class='ctx'> {</div><div class='ctx'> 	u64 hfld = IAVF_ADV_RSS_HASH_INVALID;</div><div class='ctx'> </div><div class='hunk'>@@ -1373,6 +1403,12 @@ static u64 iavf_adv_rss_parse_hash_flds(struct ethtool_rxnfc *cmd, bool symm)</div><div class='ctx'> 		case TCP_V4_FLOW:</div><div class='ctx'> 		case UDP_V4_FLOW:</div><div class='ctx'> 		case SCTP_V4_FLOW:</div><div class='add'>+		case GTPU_V4_FLOW:</div><div class='add'>+		case GTPC_V4_FLOW:</div><div class='add'>+		case GTPC_TEID_V4_FLOW:</div><div class='add'>+		case GTPU_EH_V4_FLOW:</div><div class='add'>+		case GTPU_UL_V4_FLOW:</div><div class='add'>+		case GTPU_DL_V4_FLOW:</div><div class='ctx'> 			if (cmd-&gt;data &amp; RXH_IP_SRC)</div><div class='ctx'> 				hfld |= IAVF_ADV_RSS_HASH_FLD_IPV4_SA;</div><div class='ctx'> 			if (cmd-&gt;data &amp; RXH_IP_DST)</div><div class='hunk'>@@ -1381,6 +1417,12 @@ static u64 iavf_adv_rss_parse_hash_flds(struct ethtool_rxnfc *cmd, bool symm)</div><div class='ctx'> 		case TCP_V6_FLOW:</div><div class='ctx'> 		case UDP_V6_FLOW:</div><div class='ctx'> 		case SCTP_V6_FLOW:</div><div class='add'>+		case GTPU_V6_FLOW:</div><div class='add'>+		case GTPC_V6_FLOW:</div><div class='add'>+		case GTPC_TEID_V6_FLOW:</div><div class='add'>+		case GTPU_EH_V6_FLOW:</div><div class='add'>+		case GTPU_UL_V6_FLOW:</div><div class='add'>+		case GTPU_DL_V6_FLOW:</div><div class='ctx'> 			if (cmd-&gt;data &amp; RXH_IP_SRC)</div><div class='ctx'> 				hfld |= IAVF_ADV_RSS_HASH_FLD_IPV6_SA;</div><div class='ctx'> 			if (cmd-&gt;data &amp; RXH_IP_DST)</div><div class='hunk'>@@ -1402,6 +1444,7 @@ static u64 iavf_adv_rss_parse_hash_flds(struct ethtool_rxnfc *cmd, bool symm)</div><div class='ctx'> 			break;</div><div class='ctx'> 		case UDP_V4_FLOW:</div><div class='ctx'> 		case UDP_V6_FLOW:</div><div class='add'>+		case GTPC_V4_FLOW:</div><div class='ctx'> 			if (cmd-&gt;data &amp; RXH_L4_B_0_1)</div><div class='ctx'> 				hfld |= IAVF_ADV_RSS_HASH_FLD_UDP_SRC_PORT;</div><div class='ctx'> 			if (cmd-&gt;data &amp; RXH_L4_B_2_3)</div><div class='hunk'>@@ -1418,28 +1461,51 @@ static u64 iavf_adv_rss_parse_hash_flds(struct ethtool_rxnfc *cmd, bool symm)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	if (cmd-&gt;data &amp; RXH_GTP_TEID) {</div><div class='add'>+		switch (cmd-&gt;flow_type) {</div><div class='add'>+		case GTPC_TEID_V4_FLOW:</div><div class='add'>+		case GTPC_TEID_V6_FLOW:</div><div class='add'>+			hfld |= IAVF_ADV_RSS_HASH_FLD_GTPC_TEID;</div><div class='add'>+			break;</div><div class='add'>+		case GTPU_V4_FLOW:</div><div class='add'>+		case GTPU_V6_FLOW:</div><div class='add'>+			hfld |= IAVF_ADV_RSS_HASH_FLD_GTPU_IP_TEID;</div><div class='add'>+			break;</div><div class='add'>+		case GTPU_EH_V4_FLOW:</div><div class='add'>+		case GTPU_EH_V6_FLOW:</div><div class='add'>+			hfld |= IAVF_ADV_RSS_HASH_FLD_GTPU_EH_TEID;</div><div class='add'>+			break;</div><div class='add'>+		case GTPU_UL_V4_FLOW:</div><div class='add'>+		case GTPU_UL_V6_FLOW:</div><div class='add'>+			hfld |= IAVF_ADV_RSS_HASH_FLD_GTPU_UP_TEID;</div><div class='add'>+			break;</div><div class='add'>+		case GTPU_DL_V4_FLOW:</div><div class='add'>+		case GTPU_DL_V6_FLOW:</div><div class='add'>+			hfld |= IAVF_ADV_RSS_HASH_FLD_GTPU_DWN_TEID;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return hfld;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * iavf_set_adv_rss_hash_opt - Enable/Disable flow types for RSS hash</div><div class='del'>- * @adapter: pointer to the VF adapter structure</div><div class='del'>- * @cmd: ethtool rxnfc command</div><div class='del'>- *</div><div class='del'>- * Returns Success if the flow input set is supported.</div><div class='del'>- */</div><div class='ctx'> static int</div><div class='del'>-iavf_set_adv_rss_hash_opt(struct iavf_adapter *adapter,</div><div class='del'>-			  struct ethtool_rxnfc *cmd)</div><div class='add'>+iavf_set_rxfh_fields(struct net_device *netdev,</div><div class='add'>+		     const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct iavf_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct iavf_adv_rss *rss_old, *rss_new;</div><div class='ctx'> 	bool rss_new_add = false;</div><div class='del'>-	int count = 50, err = 0;</div><div class='ctx'> 	bool symm = false;</div><div class='ctx'> 	u64 hash_flds;</div><div class='add'>+	int err = 0;</div><div class='ctx'> 	u32 hdrs;</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(adapter-&gt;netdev);</div><div class='add'>+</div><div class='ctx'> 	if (!ADV_RSS_SUPPORT(adapter))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='hunk'>@@ -1463,15 +1529,6 @@ iavf_set_adv_rss_hash_opt(struct iavf_adapter *adapter,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	while (!mutex_trylock(&amp;adapter-&gt;crit_lock)) {</div><div class='del'>-		if (--count == 0) {</div><div class='del'>-			kfree(rss_new);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	spin_lock_bh(&amp;adapter-&gt;adv_rss_lock);</div><div class='ctx'> 	rss_old = iavf_find_adv_rss_cfg_by_hdrs(adapter, hdrs);</div><div class='ctx'> 	if (rss_old) {</div><div class='hunk'>@@ -1500,25 +1557,16 @@ iavf_set_adv_rss_hash_opt(struct iavf_adapter *adapter,</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		iavf_schedule_aq_request(adapter, IAVF_FLAG_AQ_ADD_ADV_RSS_CFG);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-</div><div class='ctx'> 	if (!rss_new_add)</div><div class='ctx'> 		kfree(rss_new);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * iavf_get_adv_rss_hash_opt - Retrieve hash fields for a given flow-type</div><div class='del'>- * @adapter: pointer to the VF adapter structure</div><div class='del'>- * @cmd: ethtool rxnfc command</div><div class='del'>- *</div><div class='del'>- * Returns Success if the flow input set is supported.</div><div class='del'>- */</div><div class='ctx'> static int</div><div class='del'>-iavf_get_adv_rss_hash_opt(struct iavf_adapter *adapter,</div><div class='del'>-			  struct ethtool_rxnfc *cmd)</div><div class='add'>+iavf_get_rxfh_fields(struct net_device *netdev, struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct iavf_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct iavf_adv_rss *rss;</div><div class='ctx'> 	u64 hash_flds;</div><div class='ctx'> 	u32 hdrs;</div><div class='hunk'>@@ -1583,9 +1631,6 @@ static int iavf_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLDEL:</div><div class='ctx'> 		ret = iavf_del_fdir_ethtool(adapter, cmd);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = iavf_set_adv_rss_hash_opt(adapter, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1594,6 +1639,19 @@ static int iavf_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * iavf_get_rx_ring_count - get RX ring count</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: number of RX rings.</div><div class='add'>+ **/</div><div class='add'>+static u32 iavf_get_rx_ring_count(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct iavf_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return adapter-&gt;num_active_queues;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * iavf_get_rxnfc - command to get RX flow classification rules</div><div class='ctx'>  * @netdev: network interface device structure</div><div class='ctx'>  * @cmd: ethtool rxnfc command</div><div class='hunk'>@@ -1608,10 +1666,6 @@ static int iavf_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	int ret = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = adapter-&gt;num_active_queues;</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		if (!(adapter-&gt;flags &amp; IAVF_FLAG_FDIR_ENABLED))</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1627,9 +1681,6 @@ static int iavf_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLALL:</div><div class='ctx'> 		ret = iavf_get_fdir_fltr_ids(adapter, cmd, (u32 *)rule_locs);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ret = iavf_get_adv_rss_hash_opt(adapter, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1808,7 +1859,7 @@ static int iavf_set_rxfh(struct net_device *netdev,</div><div class='ctx'> static const struct ethtool_ops iavf_ethtool_ops = {</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_ADAPTIVE,</div><div class='del'>-	.cap_rss_sym_xor_supported = true,</div><div class='add'>+	.supported_input_xfrm	= RXH_XFRM_SYM_XOR,</div><div class='ctx'> 	.get_drvinfo		= iavf_get_drvinfo,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='ctx'> 	.get_ringparam		= iavf_get_ringparam,</div><div class='hunk'>@@ -1824,9 +1875,12 @@ static const struct ethtool_ops iavf_ethtool_ops = {</div><div class='ctx'> 	.set_per_queue_coalesce = iavf_set_per_queue_coalesce,</div><div class='ctx'> 	.set_rxnfc		= iavf_set_rxnfc,</div><div class='ctx'> 	.get_rxnfc		= iavf_get_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= iavf_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_indir_size	= iavf_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= iavf_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= iavf_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= iavf_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= iavf_set_rxfh_fields,</div><div class='ctx'> 	.get_channels		= iavf_get_channels,</div><div class='ctx'> 	.set_channels		= iavf_set_channels,</div><div class='ctx'> 	.get_rxfh_key_size	= iavf_get_rxfh_key_size,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_main.c b/drivers/net/ethernet/intel/iavf/iavf_main.c<br/>index 12ef160425aa..c2fbe443ef85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_main.c</a></div><div class='hunk'>@@ -2,8 +2,10 @@</div><div class='ctx'> /* Copyright(c) 2013 - 2018 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/net/intel/libie/rx.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iavf.h"</div><div class='add'>+#include "iavf_ptp.h"</div><div class='ctx'> #include "iavf_prototype.h"</div><div class='ctx'> /* All iavf tracepoints are defined by the include below, which must</div><div class='ctx'>  * be included exactly once across the whole kernel with</div><div class='hunk'>@@ -46,8 +48,9 @@ MODULE_DEVICE_TABLE(pci, iavf_pci_tbl);</div><div class='ctx'> </div><div class='ctx'> MODULE_ALIAS("i40evf");</div><div class='ctx'> MODULE_DESCRIPTION("Intel(R) Ethernet Adaptive Virtual Function Network Driver");</div><div class='del'>-MODULE_IMPORT_NS(LIBETH);</div><div class='del'>-MODULE_IMPORT_NS(LIBIE);</div><div class='add'>+MODULE_IMPORT_NS("LIBETH");</div><div class='add'>+MODULE_IMPORT_NS("LIBIE");</div><div class='add'>+MODULE_IMPORT_NS("LIBIE_ADMINQ");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops iavf_netdev_ops;</div><div class='hunk'>@@ -526,33 +529,6 @@ static void iavf_map_rings_to_vectors(struct iavf_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * iavf_irq_affinity_notify - Callback for affinity changes</div><div class='del'>- * @notify: context as to what irq was changed</div><div class='del'>- * @mask: the new affinity mask</div><div class='del'>- *</div><div class='del'>- * This is a callback function used by the irq_set_affinity_notifier function</div><div class='del'>- * so that we may register to receive changes to the irq affinity masks.</div><div class='del'>- **/</div><div class='del'>-static void iavf_irq_affinity_notify(struct irq_affinity_notify *notify,</div><div class='del'>-				     const cpumask_t *mask)</div><div class='del'>-{</div><div class='del'>-	struct iavf_q_vector *q_vector =</div><div class='del'>-		container_of(notify, struct iavf_q_vector, affinity_notify);</div><div class='del'>-</div><div class='del'>-	cpumask_copy(&amp;q_vector-&gt;affinity_mask, mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * iavf_irq_affinity_release - Callback for affinity notifier release</div><div class='del'>- * @ref: internal core kernel usage</div><div class='del'>- *</div><div class='del'>- * This is a callback function used by the irq_set_affinity_notifier function</div><div class='del'>- * to inform the current notification subscriber that they will no longer</div><div class='del'>- * receive notifications.</div><div class='del'>- **/</div><div class='del'>-static void iavf_irq_affinity_release(struct kref *ref) {}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * iavf_request_traffic_irqs - Initialize MSI-X interrupts</div><div class='ctx'>  * @adapter: board private structure</div><div class='ctx'>  * @basename: device basename</div><div class='hunk'>@@ -566,7 +542,6 @@ iavf_request_traffic_irqs(struct iavf_adapter *adapter, char *basename)</div><div class='ctx'> 	unsigned int vector, q_vectors;</div><div class='ctx'> 	unsigned int rx_int_idx = 0, tx_int_idx = 0;</div><div class='ctx'> 	int irq_num, err;</div><div class='del'>-	int cpu;</div><div class='ctx'> </div><div class='ctx'> 	iavf_irq_disable(adapter);</div><div class='ctx'> 	/* Decrement for Other and TCP Timer vectors */</div><div class='hunk'>@@ -601,17 +576,6 @@ iavf_request_traffic_irqs(struct iavf_adapter *adapter, char *basename)</div><div class='ctx'> 				 "Request_irq failed, error: %d\n", err);</div><div class='ctx'> 			goto free_queue_irqs;</div><div class='ctx'> 		}</div><div class='del'>-		/* register for affinity change notifications */</div><div class='del'>-		q_vector-&gt;affinity_notify.notify = iavf_irq_affinity_notify;</div><div class='del'>-		q_vector-&gt;affinity_notify.release =</div><div class='del'>-						   iavf_irq_affinity_release;</div><div class='del'>-		irq_set_affinity_notifier(irq_num, &amp;q_vector-&gt;affinity_notify);</div><div class='del'>-		/* Spread the IRQ affinity hints across online CPUs. Note that</div><div class='del'>-		 * get_cpu_mask returns a mask with a permanent lifetime so</div><div class='del'>-		 * it's safe to use as a hint for irq_update_affinity_hint.</div><div class='del'>-		 */</div><div class='del'>-		cpu = cpumask_local_spread(q_vector-&gt;v_idx, -1);</div><div class='del'>-		irq_update_affinity_hint(irq_num, get_cpu_mask(cpu));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -620,8 +584,6 @@ free_queue_irqs:</div><div class='ctx'> 	while (vector) {</div><div class='ctx'> 		vector--;</div><div class='ctx'> 		irq_num = adapter-&gt;msix_entries[vector + NONQ_VECS].vector;</div><div class='del'>-		irq_set_affinity_notifier(irq_num, NULL);</div><div class='del'>-		irq_update_affinity_hint(irq_num, NULL);</div><div class='ctx'> 		free_irq(irq_num, &amp;adapter-&gt;q_vectors[vector]);</div><div class='ctx'> 	}</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -663,6 +625,7 @@ static int iavf_request_misc_irq(struct iavf_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> static void iavf_free_traffic_irqs(struct iavf_adapter *adapter)</div><div class='ctx'> {</div><div class='add'>+	struct iavf_q_vector *q_vector;</div><div class='ctx'> 	int vector, irq_num, q_vectors;</div><div class='ctx'> </div><div class='ctx'> 	if (!adapter-&gt;msix_entries)</div><div class='hunk'>@@ -671,10 +634,10 @@ static void iavf_free_traffic_irqs(struct iavf_adapter *adapter)</div><div class='ctx'> 	q_vectors = adapter-&gt;num_msix_vectors - NONQ_VECS;</div><div class='ctx'> </div><div class='ctx'> 	for (vector = 0; vector &lt; q_vectors; vector++) {</div><div class='add'>+		q_vector = &amp;adapter-&gt;q_vectors[vector];</div><div class='add'>+		netif_napi_set_irq_locked(&amp;q_vector-&gt;napi, -1);</div><div class='ctx'> 		irq_num = adapter-&gt;msix_entries[vector + NONQ_VECS].vector;</div><div class='del'>-		irq_set_affinity_notifier(irq_num, NULL);</div><div class='del'>-		irq_update_affinity_hint(irq_num, NULL);</div><div class='del'>-		free_irq(irq_num, &amp;adapter-&gt;q_vectors[vector]);</div><div class='add'>+		free_irq(irq_num, q_vector);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -710,6 +673,47 @@ static void iavf_configure_tx(struct iavf_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * iavf_select_rx_desc_format - Select Rx descriptor format</div><div class='add'>+ * @adapter: adapter private structure</div><div class='add'>+ *</div><div class='add'>+ * Select what Rx descriptor format based on availability and enabled</div><div class='add'>+ * features.</div><div class='add'>+ *</div><div class='add'>+ * Return: the desired RXDID to select for a given Rx queue, as defined by</div><div class='add'>+ *         enum virtchnl_rxdid_format.</div><div class='add'>+ */</div><div class='add'>+static u8 iavf_select_rx_desc_format(const struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u64 rxdids = adapter-&gt;supp_rxdids;</div><div class='add'>+</div><div class='add'>+	/* If we did not negotiate VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC, we must</div><div class='add'>+	 * stick with the default value of the legacy 32 byte format.</div><div class='add'>+	 */</div><div class='add'>+	if (!IAVF_RXDID_ALLOWED(adapter))</div><div class='add'>+		return VIRTCHNL_RXDID_1_32B_BASE;</div><div class='add'>+</div><div class='add'>+	/* Rx timestamping requires the use of flexible NIC descriptors */</div><div class='add'>+	if (iavf_ptp_cap_supported(adapter, VIRTCHNL_1588_PTP_CAP_RX_TSTAMP)) {</div><div class='add'>+		if (rxdids &amp; BIT(VIRTCHNL_RXDID_2_FLEX_SQ_NIC))</div><div class='add'>+			return VIRTCHNL_RXDID_2_FLEX_SQ_NIC;</div><div class='add'>+</div><div class='add'>+		pci_warn(adapter-&gt;pdev,</div><div class='add'>+			 "Unable to negotiate flexible descriptor format\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Warn if the PF does not list support for the default legacy</div><div class='add'>+	 * descriptor format. This shouldn't happen, as this is the format</div><div class='add'>+	 * used if VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC is not supported. It is</div><div class='add'>+	 * likely caused by a bug in the PF implementation failing to indicate</div><div class='add'>+	 * support for the format.</div><div class='add'>+	 */</div><div class='add'>+	if (!(rxdids &amp; VIRTCHNL_RXDID_1_32B_BASE_M))</div><div class='add'>+		netdev_warn(adapter-&gt;netdev, "PF does not list support for default Rx descriptor format\n");</div><div class='add'>+</div><div class='add'>+	return VIRTCHNL_RXDID_1_32B_BASE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * iavf_configure_rx - Configure Receive Unit after Reset</div><div class='ctx'>  * @adapter: board private structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -719,8 +723,12 @@ static void iavf_configure_rx(struct iavf_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct iavf_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	for (u32 i = 0; i &lt; adapter-&gt;num_active_queues; i++)</div><div class='add'>+	adapter-&gt;rxdid = iavf_select_rx_desc_format(adapter);</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; adapter-&gt;num_active_queues; i++) {</div><div class='ctx'> 		adapter-&gt;rx_rings[i].tail = hw-&gt;hw_addr + IAVF_QRX_TAIL1(i);</div><div class='add'>+		adapter-&gt;rx_rings[i].rxdid = adapter-&gt;rxdid;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -773,6 +781,11 @@ iavf_vlan_filter *iavf_add_vlan(struct iavf_adapter *adapter,</div><div class='ctx'> 		f-&gt;state = IAVF_VLAN_ADD;</div><div class='ctx'> 		adapter-&gt;num_vlan_filters++;</div><div class='ctx'> 		iavf_schedule_aq_request(adapter, IAVF_FLAG_AQ_ADD_VLAN_FILTER);</div><div class='add'>+	} else if (f-&gt;state == IAVF_VLAN_REMOVE) {</div><div class='add'>+		/* IAVF_VLAN_REMOVE means that VLAN wasn't yet removed.</div><div class='add'>+		 * We can safely only change the state here.</div><div class='add'>+		 */</div><div class='add'>+		f-&gt;state = IAVF_VLAN_ACTIVE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> clearout:</div><div class='hunk'>@@ -793,8 +806,18 @@ static void iavf_del_vlan(struct iavf_adapter *adapter, struct iavf_vlan vlan)</div><div class='ctx'> </div><div class='ctx'> 	f = iavf_find_vlan(adapter, vlan);</div><div class='ctx'> 	if (f) {</div><div class='del'>-		f-&gt;state = IAVF_VLAN_REMOVE;</div><div class='del'>-		iavf_schedule_aq_request(adapter, IAVF_FLAG_AQ_DEL_VLAN_FILTER);</div><div class='add'>+		/* IAVF_ADD_VLAN means that VLAN wasn't even added yet.</div><div class='add'>+		 * Remove it from the list.</div><div class='add'>+		 */</div><div class='add'>+		if (f-&gt;state == IAVF_VLAN_ADD) {</div><div class='add'>+			list_del(&amp;f-&gt;list);</div><div class='add'>+			kfree(f);</div><div class='add'>+			adapter-&gt;num_vlan_filters--;</div><div class='add'>+		} else {</div><div class='add'>+			f-&gt;state = IAVF_VLAN_REMOVE;</div><div class='add'>+			iavf_schedule_aq_request(adapter,</div><div class='add'>+						 IAVF_FLAG_AQ_DEL_VLAN_FILTER);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;adapter-&gt;mac_vlan_list_lock);</div><div class='hunk'>@@ -1180,7 +1203,7 @@ static void iavf_napi_enable_all(struct iavf_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		q_vector = &amp;adapter-&gt;q_vectors[q_idx];</div><div class='ctx'> 		napi = &amp;q_vector-&gt;napi;</div><div class='del'>-		napi_enable(napi);</div><div class='add'>+		napi_enable_locked(napi);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1196,7 +1219,7 @@ static void iavf_napi_disable_all(struct iavf_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	for (q_idx = 0; q_idx &lt; q_vectors; q_idx++) {</div><div class='ctx'> 		q_vector = &amp;adapter-&gt;q_vectors[q_idx];</div><div class='del'>-		napi_disable(&amp;q_vector-&gt;napi);</div><div class='add'>+		napi_disable_locked(&amp;q_vector-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1225,11 +1248,11 @@ static void iavf_configure(struct iavf_adapter *adapter)</div><div class='ctx'> /**</div><div class='ctx'>  * iavf_up_complete - Finish the last steps of bringing up a connection</div><div class='ctx'>  * @adapter: board private structure</div><div class='del'>- *</div><div class='del'>- * Expects to be called while holding crit_lock.</div><div class='del'>- **/</div><div class='add'>+ */</div><div class='ctx'> static void iavf_up_complete(struct iavf_adapter *adapter)</div><div class='ctx'> {</div><div class='add'>+	netdev_assert_locked(adapter-&gt;netdev);</div><div class='add'>+</div><div class='ctx'> 	iavf_change_state(adapter, __IAVF_RUNNING);</div><div class='ctx'> 	clear_bit(__IAVF_VSI_DOWN, adapter-&gt;vsi.state);</div><div class='ctx'> </div><div class='hunk'>@@ -1348,13 +1371,13 @@ static void iavf_clear_adv_rss_conf(struct iavf_adapter *adapter)</div><div class='ctx'> /**</div><div class='ctx'>  * iavf_down - Shutdown the connection processing</div><div class='ctx'>  * @adapter: board private structure</div><div class='del'>- *</div><div class='del'>- * Expects to be called while holding crit_lock.</div><div class='del'>- **/</div><div class='add'>+ */</div><div class='ctx'> void iavf_down(struct iavf_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = adapter-&gt;netdev;</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(netdev);</div><div class='add'>+</div><div class='ctx'> 	if (adapter-&gt;state &lt;= __IAVF_DOWN_PENDING)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1672,7 +1695,7 @@ static int iavf_config_rss_aq(struct iavf_adapter *adapter)</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Cannot set RSS key, err %s aq_err %s\n",</div><div class='ctx'> 			iavf_stat_str(hw, status),</div><div class='del'>-			iavf_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		return iavf_status_to_errno(status);</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='hunk'>@@ -1682,7 +1705,7 @@ static int iavf_config_rss_aq(struct iavf_adapter *adapter)</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Cannot set RSS lut, err %s aq_err %s\n",</div><div class='ctx'> 			iavf_stat_str(hw, status),</div><div class='del'>-			iavf_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 		return iavf_status_to_errno(status);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1761,12 +1784,13 @@ static int iavf_init_rss(struct iavf_adapter *adapter)</div><div class='ctx'> 		/* Enable PCTYPES for RSS, TCP/UDP with IPv4/IPv6 */</div><div class='ctx'> 		if (adapter-&gt;vf_res-&gt;vf_cap_flags &amp;</div><div class='ctx'> 		    VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)</div><div class='del'>-			adapter-&gt;hena = IAVF_DEFAULT_RSS_HENA_EXPANDED;</div><div class='add'>+			adapter-&gt;rss_hashcfg =</div><div class='add'>+				IAVF_DEFAULT_RSS_HASHCFG_EXPANDED;</div><div class='ctx'> 		else</div><div class='del'>-			adapter-&gt;hena = IAVF_DEFAULT_RSS_HENA;</div><div class='add'>+			adapter-&gt;rss_hashcfg = IAVF_DEFAULT_RSS_HASHCFG;</div><div class='ctx'> </div><div class='del'>-		wr32(hw, IAVF_VFQF_HENA(0), (u32)adapter-&gt;hena);</div><div class='del'>-		wr32(hw, IAVF_VFQF_HENA(1), (u32)(adapter-&gt;hena &gt;&gt; 32));</div><div class='add'>+		wr32(hw, IAVF_VFQF_HENA(0), (u32)adapter-&gt;rss_hashcfg);</div><div class='add'>+		wr32(hw, IAVF_VFQF_HENA(1), (u32)(adapter-&gt;rss_hashcfg &gt;&gt; 32));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	iavf_fill_rss_lut(adapter);</div><div class='hunk'>@@ -1784,7 +1808,7 @@ static int iavf_init_rss(struct iavf_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> static int iavf_alloc_q_vectors(struct iavf_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	int q_idx = 0, num_q_vectors;</div><div class='add'>+	int q_idx = 0, num_q_vectors, irq_num;</div><div class='ctx'> 	struct iavf_q_vector *q_vector;</div><div class='ctx'> </div><div class='ctx'> 	num_q_vectors = adapter-&gt;num_msix_vectors - NONQ_VECS;</div><div class='hunk'>@@ -1794,14 +1818,15 @@ static int iavf_alloc_q_vectors(struct iavf_adapter *adapter)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	for (q_idx = 0; q_idx &lt; num_q_vectors; q_idx++) {</div><div class='add'>+		irq_num = adapter-&gt;msix_entries[q_idx + NONQ_VECS].vector;</div><div class='ctx'> 		q_vector = &amp;adapter-&gt;q_vectors[q_idx];</div><div class='ctx'> 		q_vector-&gt;adapter = adapter;</div><div class='ctx'> 		q_vector-&gt;vsi = &amp;adapter-&gt;vsi;</div><div class='ctx'> 		q_vector-&gt;v_idx = q_idx;</div><div class='ctx'> 		q_vector-&gt;reg_idx = q_idx;</div><div class='del'>-		cpumask_copy(&amp;q_vector-&gt;affinity_mask, cpu_possible_mask);</div><div class='del'>-		netif_napi_add(adapter-&gt;netdev, &amp;q_vector-&gt;napi,</div><div class='del'>-			       iavf_napi_poll);</div><div class='add'>+		netif_napi_add_config_locked(adapter-&gt;netdev, &amp;q_vector-&gt;napi,</div><div class='add'>+					     iavf_napi_poll, q_idx);</div><div class='add'>+		netif_napi_set_irq_locked(&amp;q_vector-&gt;napi, irq_num);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1827,7 +1852,7 @@ static void iavf_free_q_vectors(struct iavf_adapter *adapter)</div><div class='ctx'> 	for (q_idx = 0; q_idx &lt; num_q_vectors; q_idx++) {</div><div class='ctx'> 		struct iavf_q_vector *q_vector = &amp;adapter-&gt;q_vectors[q_idx];</div><div class='ctx'> </div><div class='del'>-		netif_napi_del(&amp;q_vector-&gt;napi);</div><div class='add'>+		netif_napi_del_locked(&amp;q_vector-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> 	kfree(adapter-&gt;q_vectors);</div><div class='ctx'> 	adapter-&gt;q_vectors = NULL;</div><div class='hunk'>@@ -1963,21 +1988,21 @@ err:</div><div class='ctx'>  * iavf_finish_config - do all netdev work that needs RTNL</div><div class='ctx'>  * @work: our work_struct</div><div class='ctx'>  *</div><div class='del'>- * Do work that needs both RTNL and crit_lock.</div><div class='del'>- **/</div><div class='add'>+ * Do work that needs RTNL.</div><div class='add'>+ */</div><div class='ctx'> static void iavf_finish_config(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct iavf_adapter *adapter;</div><div class='add'>+	bool netdev_released = false;</div><div class='ctx'> 	int pairs, err;</div><div class='ctx'> </div><div class='ctx'> 	adapter = container_of(work, struct iavf_adapter, finish_config);</div><div class='ctx'> </div><div class='ctx'> 	/* Always take RTNL first to prevent circular lock dependency;</div><div class='del'>-	 * The dev-&gt;lock is needed to update the queue number</div><div class='add'>+	 * the dev-&gt;lock (== netdev lock) is needed to update the queue number.</div><div class='ctx'> 	 */</div><div class='ctx'> 	rtnl_lock();</div><div class='del'>-	mutex_lock(&amp;adapter-&gt;netdev-&gt;lock);</div><div class='del'>-	mutex_lock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+	netdev_lock(adapter-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 	if ((adapter-&gt;flags &amp; IAVF_FLAG_SETUP_NETDEV_FEATURES) &amp;&amp;</div><div class='ctx'> 	    adapter-&gt;netdev-&gt;reg_state == NETREG_REGISTERED &amp;&amp;</div><div class='hunk'>@@ -1988,26 +2013,33 @@ static void iavf_finish_config(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	switch (adapter-&gt;state) {</div><div class='ctx'> 	case __IAVF_DOWN:</div><div class='add'>+		/* Set the real number of queues when reset occurs while</div><div class='add'>+		 * state == __IAVF_DOWN</div><div class='add'>+		 */</div><div class='add'>+		pairs = adapter-&gt;num_active_queues;</div><div class='add'>+		netif_set_real_num_rx_queues(adapter-&gt;netdev, pairs);</div><div class='add'>+		netif_set_real_num_tx_queues(adapter-&gt;netdev, pairs);</div><div class='add'>+</div><div class='ctx'> 		if (adapter-&gt;netdev-&gt;reg_state != NETREG_REGISTERED) {</div><div class='add'>+			netdev_unlock(adapter-&gt;netdev);</div><div class='add'>+			netdev_released = true;</div><div class='ctx'> 			err = register_netdevice(adapter-&gt;netdev);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Unable to register netdev (%d)\n",</div><div class='ctx'> 					err);</div><div class='ctx'> </div><div class='ctx'> 				/* go back and try again.*/</div><div class='add'>+				netdev_lock(adapter-&gt;netdev);</div><div class='ctx'> 				iavf_free_rss(adapter);</div><div class='ctx'> 				iavf_free_misc_irq(adapter);</div><div class='ctx'> 				iavf_reset_interrupt_capability(adapter);</div><div class='ctx'> 				iavf_change_state(adapter,</div><div class='ctx'> 						  __IAVF_INIT_CONFIG_ADAPTER);</div><div class='add'>+				netdev_unlock(adapter-&gt;netdev);</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		/* Set the real number of queues when reset occurs while</div><div class='del'>-		 * state == __IAVF_DOWN</div><div class='del'>-		 */</div><div class='del'>-		fallthrough;</div><div class='add'>+		break;</div><div class='ctx'> 	case __IAVF_RUNNING:</div><div class='ctx'> 		pairs = adapter-&gt;num_active_queues;</div><div class='ctx'> 		netif_set_real_num_rx_queues(adapter-&gt;netdev, pairs);</div><div class='hunk'>@@ -2019,8 +2051,8 @@ static void iavf_finish_config(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;netdev-&gt;lock);</div><div class='add'>+	if (!netdev_released)</div><div class='add'>+		netdev_unlock(adapter-&gt;netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2049,6 +2081,10 @@ static int iavf_process_aq_command(struct iavf_adapter *adapter)</div><div class='ctx'> 		return iavf_send_vf_config_msg(adapter);</div><div class='ctx'> 	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_GET_OFFLOAD_VLAN_V2_CAPS)</div><div class='ctx'> 		return iavf_send_vf_offload_vlan_v2_msg(adapter);</div><div class='add'>+	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_GET_SUPPORTED_RXDIDS)</div><div class='add'>+		return iavf_send_vf_supported_rxdids_msg(adapter);</div><div class='add'>+	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_GET_PTP_CAPS)</div><div class='add'>+		return iavf_send_vf_ptp_caps_msg(adapter);</div><div class='ctx'> 	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_DISABLE_QUEUES) {</div><div class='ctx'> 		iavf_disable_queues(adapter);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2122,12 +2158,12 @@ static int iavf_process_aq_command(struct iavf_adapter *adapter)</div><div class='ctx'> 		adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_CONFIGURE_RSS;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_GET_HENA) {</div><div class='del'>-		iavf_get_hena(adapter);</div><div class='add'>+	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_GET_RSS_HASHCFG) {</div><div class='add'>+		iavf_get_rss_hashcfg(adapter);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_SET_HENA) {</div><div class='del'>-		iavf_set_hena(adapter);</div><div class='add'>+	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_SET_RSS_HASHCFG) {</div><div class='add'>+		iavf_set_rss_hashcfg(adapter);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_SET_RSS_KEY) {</div><div class='hunk'>@@ -2213,7 +2249,10 @@ static int iavf_process_aq_command(struct iavf_adapter *adapter)</div><div class='ctx'> 		iavf_enable_vlan_insertion_v2(adapter, ETH_P_8021AD);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='add'>+	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_SEND_PTP_CMD) {</div><div class='add'>+		iavf_virtchnl_send_ptp_cmd(adapter);</div><div class='add'>+		return IAVF_SUCCESS;</div><div class='add'>+	}</div><div class='ctx'> 	if (adapter-&gt;aq_required &amp; IAVF_FLAG_AQ_REQUEST_STATS) {</div><div class='ctx'> 		iavf_request_stats(adapter);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2578,6 +2617,112 @@ err:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * iavf_init_send_supported_rxdids - part of querying for supported RXDID</div><div class='add'>+ * formats</div><div class='add'>+ * @adapter: board private structure</div><div class='add'>+ *</div><div class='add'>+ * Function processes send of the request for supported RXDIDs to the PF.</div><div class='add'>+ * Must clear IAVF_EXTENDED_CAP_RECV_RXDID if the message is not sent, e.g.</div><div class='add'>+ * due to the PF not negotiating VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC.</div><div class='add'>+ */</div><div class='add'>+static void iavf_init_send_supported_rxdids(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = iavf_send_vf_supported_rxdids_msg(adapter);</div><div class='add'>+	if (ret == -EOPNOTSUPP) {</div><div class='add'>+		/* PF does not support VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC. In this</div><div class='add'>+		 * case, we did not send the capability exchange message and</div><div class='add'>+		 * do not expect a response.</div><div class='add'>+		 */</div><div class='add'>+		adapter-&gt;extended_caps &amp;= ~IAVF_EXTENDED_CAP_RECV_RXDID;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We sent the message, so move on to the next step */</div><div class='add'>+	adapter-&gt;extended_caps &amp;= ~IAVF_EXTENDED_CAP_SEND_RXDID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_init_recv_supported_rxdids - part of querying for supported RXDID</div><div class='add'>+ * formats</div><div class='add'>+ * @adapter: board private structure</div><div class='add'>+ *</div><div class='add'>+ * Function processes receipt of the supported RXDIDs message from the PF.</div><div class='add'>+ **/</div><div class='add'>+static void iavf_init_recv_supported_rxdids(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;adapter-&gt;supp_rxdids, 0, sizeof(adapter-&gt;supp_rxdids));</div><div class='add'>+</div><div class='add'>+	ret = iavf_get_vf_supported_rxdids(adapter);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* We've processed the PF response to the</div><div class='add'>+	 * VIRTCHNL_OP_GET_SUPPORTED_RXDIDS message we sent previously.</div><div class='add'>+	 */</div><div class='add'>+	adapter-&gt;extended_caps &amp;= ~IAVF_EXTENDED_CAP_RECV_RXDID;</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* We didn't receive a reply. Make sure we try sending again when</div><div class='add'>+	 * __IAVF_INIT_FAILED attempts to recover.</div><div class='add'>+	 */</div><div class='add'>+	adapter-&gt;extended_caps |= IAVF_EXTENDED_CAP_SEND_RXDID;</div><div class='add'>+	iavf_change_state(adapter, __IAVF_INIT_FAILED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_init_send_ptp_caps - part of querying for extended PTP capabilities</div><div class='add'>+ * @adapter: board private structure</div><div class='add'>+ *</div><div class='add'>+ * Function processes send of the request for 1588 PTP capabilities to the PF.</div><div class='add'>+ * Must clear IAVF_EXTENDED_CAP_SEND_PTP if the message is not sent, e.g.</div><div class='add'>+ * due to the PF not negotiating VIRTCHNL_VF_PTP_CAP</div><div class='add'>+ */</div><div class='add'>+static void iavf_init_send_ptp_caps(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (iavf_send_vf_ptp_caps_msg(adapter) == -EOPNOTSUPP) {</div><div class='add'>+		/* PF does not support VIRTCHNL_VF_PTP_CAP. In this case, we</div><div class='add'>+		 * did not send the capability exchange message and do not</div><div class='add'>+		 * expect a response.</div><div class='add'>+		 */</div><div class='add'>+		adapter-&gt;extended_caps &amp;= ~IAVF_EXTENDED_CAP_RECV_PTP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We sent the message, so move on to the next step */</div><div class='add'>+	adapter-&gt;extended_caps &amp;= ~IAVF_EXTENDED_CAP_SEND_PTP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_init_recv_ptp_caps - part of querying for supported PTP capabilities</div><div class='add'>+ * @adapter: board private structure</div><div class='add'>+ *</div><div class='add'>+ * Function processes receipt of the PTP capabilities supported on this VF.</div><div class='add'>+ **/</div><div class='add'>+static void iavf_init_recv_ptp_caps(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	memset(&amp;adapter-&gt;ptp.hw_caps, 0, sizeof(adapter-&gt;ptp.hw_caps));</div><div class='add'>+</div><div class='add'>+	if (iavf_get_vf_ptp_caps(adapter))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* We've processed the PF response to the VIRTCHNL_OP_1588_PTP_GET_CAPS</div><div class='add'>+	 * message we sent previously.</div><div class='add'>+	 */</div><div class='add'>+	adapter-&gt;extended_caps &amp;= ~IAVF_EXTENDED_CAP_RECV_PTP;</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* We didn't receive a reply. Make sure we try sending again when</div><div class='add'>+	 * __IAVF_INIT_FAILED attempts to recover.</div><div class='add'>+	 */</div><div class='add'>+	adapter-&gt;extended_caps |= IAVF_EXTENDED_CAP_SEND_PTP;</div><div class='add'>+	iavf_change_state(adapter, __IAVF_INIT_FAILED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * iavf_init_process_extended_caps - Part of driver startup</div><div class='ctx'>  * @adapter: board private structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -2601,6 +2746,24 @@ static void iavf_init_process_extended_caps(struct iavf_adapter *adapter)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Process capability exchange for RXDID formats */</div><div class='add'>+	if (adapter-&gt;extended_caps &amp; IAVF_EXTENDED_CAP_SEND_RXDID) {</div><div class='add'>+		iavf_init_send_supported_rxdids(adapter);</div><div class='add'>+		return;</div><div class='add'>+	} else if (adapter-&gt;extended_caps &amp; IAVF_EXTENDED_CAP_RECV_RXDID) {</div><div class='add'>+		iavf_init_recv_supported_rxdids(adapter);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Process capability exchange for PTP features */</div><div class='add'>+	if (adapter-&gt;extended_caps &amp; IAVF_EXTENDED_CAP_SEND_PTP) {</div><div class='add'>+		iavf_init_send_ptp_caps(adapter);</div><div class='add'>+		return;</div><div class='add'>+	} else if (adapter-&gt;extended_caps &amp; IAVF_EXTENDED_CAP_RECV_PTP) {</div><div class='add'>+		iavf_init_recv_ptp_caps(adapter);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* When we reach here, no further extended capabilities exchanges are</div><div class='ctx'> 	 * necessary, so we finally transition into __IAVF_INIT_CONFIG_ADAPTER</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -2692,6 +2855,9 @@ static void iavf_init_config_adapter(struct iavf_adapter *adapter)</div><div class='ctx'> 	if (QOS_ALLOWED(adapter))</div><div class='ctx'> 		adapter-&gt;aq_required |= IAVF_FLAG_AQ_GET_QOS_CAPS;</div><div class='ctx'> </div><div class='add'>+	/* Setup initial PTP configuration */</div><div class='add'>+	iavf_ptp_init(adapter);</div><div class='add'>+</div><div class='ctx'> 	iavf_schedule_finish_config(adapter);</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='hunk'>@@ -2704,24 +2870,15 @@ err:</div><div class='ctx'> 	iavf_change_state(adapter, __IAVF_INIT_FAILED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * iavf_watchdog_task - Periodic call-back task</div><div class='del'>- * @work: pointer to work_struct</div><div class='del'>- **/</div><div class='del'>-static void iavf_watchdog_task(struct work_struct *work)</div><div class='add'>+static const int IAVF_NO_RESCHED = -1;</div><div class='add'>+</div><div class='add'>+/* return: msec delay for requeueing itself */</div><div class='add'>+static int iavf_watchdog_step(struct iavf_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	struct iavf_adapter *adapter = container_of(work,</div><div class='del'>-						    struct iavf_adapter,</div><div class='del'>-						    watchdog_task.work);</div><div class='ctx'> 	struct iavf_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 reg_val;</div><div class='ctx'> </div><div class='del'>-	if (!mutex_trylock(&amp;adapter-&gt;crit_lock)) {</div><div class='del'>-		if (adapter-&gt;state == __IAVF_REMOVE)</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		goto restart_watchdog;</div><div class='del'>-	}</div><div class='add'>+	netdev_assert_locked(adapter-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;flags &amp; IAVF_FLAG_PF_COMMS_FAILED)</div><div class='ctx'> 		iavf_change_state(adapter, __IAVF_COMM_FAILED);</div><div class='hunk'>@@ -2729,34 +2886,19 @@ static void iavf_watchdog_task(struct work_struct *work)</div><div class='ctx'> 	switch (adapter-&gt;state) {</div><div class='ctx'> 	case __IAVF_STARTUP:</div><div class='ctx'> 		iavf_startup(adapter);</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task,</div><div class='del'>-				   msecs_to_jiffies(30));</div><div class='del'>-		return;</div><div class='add'>+		return 30;</div><div class='ctx'> 	case __IAVF_INIT_VERSION_CHECK:</div><div class='ctx'> 		iavf_init_version_check(adapter);</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task,</div><div class='del'>-				   msecs_to_jiffies(30));</div><div class='del'>-		return;</div><div class='add'>+		return 30;</div><div class='ctx'> 	case __IAVF_INIT_GET_RESOURCES:</div><div class='ctx'> 		iavf_init_get_resources(adapter);</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task,</div><div class='del'>-				   msecs_to_jiffies(1));</div><div class='del'>-		return;</div><div class='add'>+		return 1;</div><div class='ctx'> 	case __IAVF_INIT_EXTENDED_CAPS:</div><div class='ctx'> 		iavf_init_process_extended_caps(adapter);</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task,</div><div class='del'>-				   msecs_to_jiffies(1));</div><div class='del'>-		return;</div><div class='add'>+		return 1;</div><div class='ctx'> 	case __IAVF_INIT_CONFIG_ADAPTER:</div><div class='ctx'> 		iavf_init_config_adapter(adapter);</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task,</div><div class='del'>-				   msecs_to_jiffies(1));</div><div class='del'>-		return;</div><div class='add'>+		return 1;</div><div class='ctx'> 	case __IAVF_INIT_FAILED:</div><div class='ctx'> 		if (test_bit(__IAVF_IN_REMOVE_TASK,</div><div class='ctx'> 			     &amp;adapter-&gt;crit_section)) {</div><div class='hunk'>@@ -2764,24 +2906,18 @@ static void iavf_watchdog_task(struct work_struct *work)</div><div class='ctx'> 			 * watchdog task, iavf_remove should handle this state</div><div class='ctx'> 			 * as it can loop forever</div><div class='ctx'> 			 */</div><div class='del'>-			mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-			return;</div><div class='add'>+			return IAVF_NO_RESCHED;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (++adapter-&gt;aq_wait_count &gt; IAVF_AQ_MAX_ERR) {</div><div class='ctx'> 			dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='ctx'> 				"Failed to communicate with PF; waiting before retry\n");</div><div class='ctx'> 			adapter-&gt;flags |= IAVF_FLAG_PF_COMMS_FAILED;</div><div class='ctx'> 			iavf_shutdown_adminq(hw);</div><div class='del'>-			mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-			queue_delayed_work(adapter-&gt;wq,</div><div class='del'>-					   &amp;adapter-&gt;watchdog_task, (5 * HZ));</div><div class='del'>-			return;</div><div class='add'>+			return 5000;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Try again from failed step*/</div><div class='ctx'> 		iavf_change_state(adapter, adapter-&gt;last_state);</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task, HZ);</div><div class='del'>-		return;</div><div class='add'>+		return 1000;</div><div class='ctx'> 	case __IAVF_COMM_FAILED:</div><div class='ctx'> 		if (test_bit(__IAVF_IN_REMOVE_TASK,</div><div class='ctx'> 			     &amp;adapter-&gt;crit_section)) {</div><div class='hunk'>@@ -2791,8 +2927,7 @@ static void iavf_watchdog_task(struct work_struct *work)</div><div class='ctx'> 			 */</div><div class='ctx'> 			iavf_change_state(adapter, __IAVF_INIT_FAILED);</div><div class='ctx'> 			adapter-&gt;flags &amp;= ~IAVF_FLAG_PF_COMMS_FAILED;</div><div class='del'>-			mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-			return;</div><div class='add'>+			return IAVF_NO_RESCHED;</div><div class='ctx'> 		}</div><div class='ctx'> 		reg_val = rd32(hw, IAVF_VFGEN_RSTAT) &amp;</div><div class='ctx'> 			  IAVF_VFGEN_RSTAT_VFR_STATE_MASK;</div><div class='hunk'>@@ -2810,16 +2945,9 @@ static void iavf_watchdog_task(struct work_struct *work)</div><div class='ctx'> 		}</div><div class='ctx'> 		adapter-&gt;aq_required = 0;</div><div class='ctx'> 		adapter-&gt;current_op = VIRTCHNL_OP_UNKNOWN;</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		queue_delayed_work(adapter-&gt;wq,</div><div class='del'>-				   &amp;adapter-&gt;watchdog_task,</div><div class='del'>-				   msecs_to_jiffies(10));</div><div class='del'>-		return;</div><div class='add'>+		return 10;</div><div class='ctx'> 	case __IAVF_RESETTING:</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task,</div><div class='del'>-				   HZ * 2);</div><div class='del'>-		return;</div><div class='add'>+		return 2000;</div><div class='ctx'> 	case __IAVF_DOWN:</div><div class='ctx'> 	case __IAVF_DOWN_PENDING:</div><div class='ctx'> 	case __IAVF_TESTING:</div><div class='hunk'>@@ -2846,8 +2974,7 @@ static void iavf_watchdog_task(struct work_struct *work)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case __IAVF_REMOVE:</div><div class='ctx'> 	default:</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		return;</div><div class='add'>+		return IAVF_NO_RESCHED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* check for hw reset */</div><div class='hunk'>@@ -2857,22 +2984,29 @@ static void iavf_watchdog_task(struct work_struct *work)</div><div class='ctx'> 		adapter-&gt;current_op = VIRTCHNL_OP_UNKNOWN;</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Hardware reset detected\n");</div><div class='ctx'> 		iavf_schedule_reset(adapter, IAVF_FLAG_RESET_PENDING);</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		queue_delayed_work(adapter-&gt;wq,</div><div class='del'>-				   &amp;adapter-&gt;watchdog_task, HZ * 2);</div><div class='del'>-		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-restart_watchdog:</div><div class='add'>+	return adapter-&gt;aq_required ? 20 : 2000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void iavf_watchdog_task(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct iavf_adapter *adapter = container_of(work,</div><div class='add'>+						    struct iavf_adapter,</div><div class='add'>+						    watchdog_task.work);</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	int msec_delay;</div><div class='add'>+</div><div class='add'>+	netdev_lock(netdev);</div><div class='add'>+	msec_delay = iavf_watchdog_step(adapter);</div><div class='add'>+	/* note that we schedule a different task */</div><div class='ctx'> 	if (adapter-&gt;state &gt;= __IAVF_DOWN)</div><div class='ctx'> 		queue_work(adapter-&gt;wq, &amp;adapter-&gt;adminq_task);</div><div class='del'>-	if (adapter-&gt;aq_required)</div><div class='del'>-		queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task,</div><div class='del'>-				   msecs_to_jiffies(20));</div><div class='del'>-	else</div><div class='add'>+</div><div class='add'>+	if (msec_delay != IAVF_NO_RESCHED)</div><div class='ctx'> 		queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task,</div><div class='del'>-				   HZ * 2);</div><div class='add'>+				   msecs_to_jiffies(msec_delay));</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2880,14 +3014,15 @@ restart_watchdog:</div><div class='ctx'>  * @adapter: board private structure</div><div class='ctx'>  *</div><div class='ctx'>  * Set communication failed flag and free all resources.</div><div class='del'>- * NOTE: This function is expected to be called with crit_lock being held.</div><div class='del'>- **/</div><div class='add'>+ */</div><div class='ctx'> static void iavf_disable_vf(struct iavf_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct iavf_mac_filter *f, *ftmp;</div><div class='ctx'> 	struct iavf_vlan_filter *fv, *fvtmp;</div><div class='ctx'> 	struct iavf_cloud_filter *cf, *cftmp;</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(adapter-&gt;netdev);</div><div class='add'>+</div><div class='ctx'> 	adapter-&gt;flags |= IAVF_FLAG_PF_COMMS_FAILED;</div><div class='ctx'> </div><div class='ctx'> 	/* We don't use netif_running() because it may be true prior to</div><div class='hunk'>@@ -2987,17 +3122,7 @@ static void iavf_reset_task(struct work_struct *work)</div><div class='ctx'> 	int i = 0, err;</div><div class='ctx'> 	bool running;</div><div class='ctx'> </div><div class='del'>-	/* When device is being removed it doesn't make sense to run the reset</div><div class='del'>-	 * task, just return in such a case.</div><div class='del'>-	 */</div><div class='del'>-	mutex_lock(&amp;netdev-&gt;lock);</div><div class='del'>-	if (!mutex_trylock(&amp;adapter-&gt;crit_lock)) {</div><div class='del'>-		if (adapter-&gt;state != __IAVF_REMOVE)</div><div class='del'>-			queue_work(adapter-&gt;wq, &amp;adapter-&gt;reset_task);</div><div class='del'>-</div><div class='del'>-		mutex_unlock(&amp;netdev-&gt;lock);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	iavf_misc_irq_disable(adapter);</div><div class='ctx'> 	if (adapter-&gt;flags &amp; IAVF_FLAG_RESET_NEEDED) {</div><div class='hunk'>@@ -3042,12 +3167,22 @@ static void iavf_reset_task(struct work_struct *work)</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Reset never finished (%x)\n",</div><div class='ctx'> 			reg_val);</div><div class='ctx'> 		iavf_disable_vf(adapter);</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-		mutex_unlock(&amp;netdev-&gt;lock);</div><div class='add'>+		netdev_unlock(netdev);</div><div class='ctx'> 		return; /* Do not attempt to reinit. It's dead, Jim. */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> continue_reset:</div><div class='add'>+	/* If we are still early in the state machine, just restart. */</div><div class='add'>+	if (adapter-&gt;state &lt;= __IAVF_INIT_FAILED) {</div><div class='add'>+		iavf_shutdown_adminq(hw);</div><div class='add'>+		iavf_change_state(adapter, __IAVF_STARTUP);</div><div class='add'>+		iavf_startup(adapter);</div><div class='add'>+		queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task,</div><div class='add'>+				   msecs_to_jiffies(30));</div><div class='add'>+		netdev_unlock(netdev);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* We don't use netif_running() because it may be true prior to</div><div class='ctx'> 	 * ndo_open() returning, so we can't assume it means all our open</div><div class='ctx'> 	 * tasks have finished, since we're not holding the rtnl_lock here.</div><div class='hunk'>@@ -3099,15 +3234,18 @@ continue_reset:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;aq_required |= IAVF_FLAG_AQ_GET_CONFIG;</div><div class='del'>-	/* always set since VIRTCHNL_OP_GET_VF_RESOURCES has not been</div><div class='del'>-	 * sent/received yet, so VLAN_V2_ALLOWED() cannot is not reliable here,</div><div class='del'>-	 * however the VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2_CAPS won't be sent until</div><div class='del'>-	 * VIRTCHNL_OP_GET_VF_RESOURCES and VIRTCHNL_VF_OFFLOAD_VLAN_V2 have</div><div class='del'>-	 * been successfully sent and negotiated</div><div class='del'>-	 */</div><div class='del'>-	adapter-&gt;aq_required |= IAVF_FLAG_AQ_GET_OFFLOAD_VLAN_V2_CAPS;</div><div class='ctx'> 	adapter-&gt;aq_required |= IAVF_FLAG_AQ_MAP_VECTORS;</div><div class='ctx'> </div><div class='add'>+	/* Certain capabilities require an extended negotiation process using</div><div class='add'>+	 * extra messages that must be processed after getting the VF</div><div class='add'>+	 * configuration. The related checks such as VLAN_V2_ALLOWED() are not</div><div class='add'>+	 * reliable here, since the configuration has not yet been negotiated.</div><div class='add'>+	 *</div><div class='add'>+	 * Always set these flags, since them related VIRTCHNL messages won't</div><div class='add'>+	 * be sent until after VIRTCHNL_OP_GET_VF_RESOURCES.</div><div class='add'>+	 */</div><div class='add'>+	adapter-&gt;aq_required |= IAVF_FLAG_AQ_EXTENDED_CAPS;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_bh(&amp;adapter-&gt;mac_vlan_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Delete filter for the current MAC address, it could have</div><div class='hunk'>@@ -3183,8 +3321,7 @@ continue_reset:</div><div class='ctx'> 	adapter-&gt;flags &amp;= ~IAVF_FLAG_REINIT_ITR_NEEDED;</div><div class='ctx'> </div><div class='ctx'> 	wake_up(&amp;adapter-&gt;reset_waitqueue);</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-	mutex_unlock(&amp;netdev-&gt;lock);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> reset_err:</div><div class='hunk'>@@ -3194,8 +3331,7 @@ reset_err:</div><div class='ctx'> 	}</div><div class='ctx'> 	iavf_disable_vf(adapter);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-	mutex_unlock(&amp;netdev-&gt;lock);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	dev_err(&amp;adapter-&gt;pdev-&gt;dev, "failed to allocate resources during reinit\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3207,6 +3343,7 @@ static void iavf_adminq_task(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct iavf_adapter *adapter =</div><div class='ctx'> 		container_of(work, struct iavf_adapter, adminq_task);</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='ctx'> 	struct iavf_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct iavf_arq_event_info event;</div><div class='ctx'> 	enum virtchnl_ops v_op;</div><div class='hunk'>@@ -3214,13 +3351,7 @@ static void iavf_adminq_task(struct work_struct *work)</div><div class='ctx'> 	u32 val, oldval;</div><div class='ctx'> 	u16 pending;</div><div class='ctx'> </div><div class='del'>-	if (!mutex_trylock(&amp;adapter-&gt;crit_lock)) {</div><div class='del'>-		if (adapter-&gt;state == __IAVF_REMOVE)</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		queue_work(adapter-&gt;wq, &amp;adapter-&gt;adminq_task);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;flags &amp; IAVF_FLAG_PF_COMMS_FAILED)</div><div class='ctx'> 		goto unlock;</div><div class='hunk'>@@ -3287,8 +3418,7 @@ static void iavf_adminq_task(struct work_struct *work)</div><div class='ctx'> freedom:</div><div class='ctx'> 	kfree(event.msg_buf);</div><div class='ctx'> unlock:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-out:</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	/* re-enable Admin queue interrupt cause */</div><div class='ctx'> 	iavf_misc_irq_enable(adapter);</div><div class='ctx'> }</div><div class='hunk'>@@ -3667,10 +3797,8 @@ exit:</div><div class='ctx'> 	if (test_bit(__IAVF_IN_REMOVE_TASK, &amp;adapter-&gt;crit_section))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;netdev-&gt;lock);</div><div class='ctx'> 	netif_set_real_num_rx_queues(netdev, total_qps);</div><div class='ctx'> 	netif_set_real_num_tx_queues(netdev, total_qps);</div><div class='del'>-	mutex_unlock(&amp;netdev-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -3983,8 +4111,8 @@ static int iavf_configure_clsflower(struct iavf_adapter *adapter,</div><div class='ctx'> 				    struct flow_cls_offload *cls_flower)</div><div class='ctx'> {</div><div class='ctx'> 	int tc = tc_classid_to_hwtc(adapter-&gt;netdev, cls_flower-&gt;classid);</div><div class='del'>-	struct iavf_cloud_filter *filter = NULL;</div><div class='del'>-	int err = -EINVAL, count = 50;</div><div class='add'>+	struct iavf_cloud_filter *filter;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (tc &lt; 0) {</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Invalid traffic class\n");</div><div class='hunk'>@@ -3994,17 +4122,10 @@ static int iavf_configure_clsflower(struct iavf_adapter *adapter,</div><div class='ctx'> 	filter = kzalloc(sizeof(*filter), GFP_KERNEL);</div><div class='ctx'> 	if (!filter)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	while (!mutex_trylock(&amp;adapter-&gt;crit_lock)) {</div><div class='del'>-		if (--count == 0) {</div><div class='del'>-			kfree(filter);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	filter-&gt;cookie = cls_flower-&gt;cookie;</div><div class='ctx'> </div><div class='add'>+	netdev_lock(adapter-&gt;netdev);</div><div class='add'>+</div><div class='ctx'> 	/* bail out here if filter already exists */</div><div class='ctx'> 	spin_lock_bh(&amp;adapter-&gt;cloud_filter_list_lock);</div><div class='ctx'> 	if (iavf_find_cf(adapter, &amp;cls_flower-&gt;cookie)) {</div><div class='hunk'>@@ -4038,7 +4159,7 @@ err:</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		kfree(filter);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+	netdev_unlock(adapter-&gt;netdev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4335,33 +4456,20 @@ static int iavf_open(struct net_device *netdev)</div><div class='ctx'> 	struct iavf_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(netdev);</div><div class='add'>+</div><div class='ctx'> 	if (adapter-&gt;flags &amp; IAVF_FLAG_PF_COMMS_FAILED) {</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Unable to open device due to PF driver failure.\n");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	while (!mutex_trylock(&amp;adapter-&gt;crit_lock)) {</div><div class='del'>-		/* If we are in __IAVF_INIT_CONFIG_ADAPTER state the crit_lock</div><div class='del'>-		 * is already taken and iavf_open is called from an upper</div><div class='del'>-		 * device's notifier reacting on NETDEV_REGISTER event.</div><div class='del'>-		 * We have to leave here to avoid dead lock.</div><div class='del'>-		 */</div><div class='del'>-		if (adapter-&gt;state == __IAVF_INIT_CONFIG_ADAPTER)</div><div class='del'>-			return -EBUSY;</div><div class='del'>-</div><div class='del'>-		usleep_range(500, 1000);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (adapter-&gt;state != __IAVF_DOWN) {</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto err_unlock;</div><div class='del'>-	}</div><div class='add'>+	if (adapter-&gt;state != __IAVF_DOWN)</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;state == __IAVF_RUNNING &amp;&amp;</div><div class='ctx'> 	    !test_bit(__IAVF_VSI_DOWN, adapter-&gt;vsi.state)) {</div><div class='ctx'> 		dev_dbg(&amp;adapter-&gt;pdev-&gt;dev, "VF is already open.\n");</div><div class='del'>-		err = 0;</div><div class='del'>-		goto err_unlock;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* allocate transmit descriptors */</div><div class='hunk'>@@ -4380,9 +4488,7 @@ static int iavf_open(struct net_device *netdev)</div><div class='ctx'> 		goto err_req_irq;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;adapter-&gt;mac_vlan_list_lock);</div><div class='del'>-</div><div class='ctx'> 	iavf_add_filter(adapter, adapter-&gt;hw.mac.addr);</div><div class='del'>-</div><div class='ctx'> 	spin_unlock_bh(&amp;adapter-&gt;mac_vlan_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore filters that were removed with IFF_DOWN */</div><div class='hunk'>@@ -4395,8 +4501,6 @@ static int iavf_open(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	iavf_irq_enable(adapter, true);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_req_irq:</div><div class='hunk'>@@ -4406,8 +4510,6 @@ err_setup_rx:</div><div class='ctx'> 	iavf_free_all_rx_resources(adapter);</div><div class='ctx'> err_setup_tx:</div><div class='ctx'> 	iavf_free_all_tx_resources(adapter);</div><div class='del'>-err_unlock:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -4429,12 +4531,10 @@ static int iavf_close(struct net_device *netdev)</div><div class='ctx'> 	u64 aq_to_restore;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+	netdev_assert_locked(netdev);</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;state &lt;= __IAVF_DOWN_PENDING) {</div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+	if (adapter-&gt;state &lt;= __IAVF_DOWN_PENDING)</div><div class='ctx'> 		return 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	set_bit(__IAVF_VSI_DOWN, adapter-&gt;vsi.state);</div><div class='ctx'> 	/* We cannot send IAVF_FLAG_AQ_GET_OFFLOAD_VLAN_V2_CAPS before</div><div class='hunk'>@@ -4465,7 +4565,7 @@ static int iavf_close(struct net_device *netdev)</div><div class='ctx'> 	iavf_change_state(adapter, __IAVF_DOWN_PENDING);</div><div class='ctx'> 	iavf_free_traffic_irqs(adapter);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* We explicitly don't free resources here because the hardware is</div><div class='ctx'> 	 * still active and can DMA into memory. Resources are cleared in</div><div class='hunk'>@@ -4483,10 +4583,10 @@ static int iavf_close(struct net_device *netdev)</div><div class='ctx'> 				    msecs_to_jiffies(500));</div><div class='ctx'> 	if (!status)</div><div class='ctx'> 		netdev_warn(netdev, "Device resources not yet released\n");</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;crit_lock);</div><div class='ctx'> 	adapter-&gt;aq_required |= aq_to_restore;</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4948,6 +5048,25 @@ static netdev_features_t iavf_fix_features(struct net_device *netdev,</div><div class='ctx'> 	return iavf_fix_strip_features(adapter, features);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int iavf_hwstamp_get(struct net_device *netdev,</div><div class='add'>+			    struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct iavf_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	*config = adapter-&gt;ptp.hwtstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iavf_hwstamp_set(struct net_device *netdev,</div><div class='add'>+			    struct kernel_hwtstamp_config *config,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct iavf_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return iavf_ptp_set_ts_config(adapter, config, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> iavf_verify_shaper(struct net_shaper_binding *binding,</div><div class='ctx'> 		   const struct net_shaper *shaper,</div><div class='hunk'>@@ -4976,15 +5095,16 @@ iavf_shaper_set(struct net_shaper_binding *binding,</div><div class='ctx'> 	struct iavf_adapter *adapter = netdev_priv(binding-&gt;netdev);</div><div class='ctx'> 	const struct net_shaper_handle *handle = &amp;shaper-&gt;handle;</div><div class='ctx'> 	struct iavf_ring *tx_ring;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	netdev_assert_locked(adapter-&gt;netdev);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;crit_lock);</div><div class='ctx'> 	if (handle-&gt;id &gt;= adapter-&gt;num_active_queues)</div><div class='del'>-		goto unlock;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = iavf_verify_shaper(binding, shaper, extack);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto unlock;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	tx_ring = &amp;adapter-&gt;tx_rings[handle-&gt;id];</div><div class='ctx'> </div><div class='hunk'>@@ -4994,9 +5114,7 @@ iavf_shaper_set(struct net_shaper_binding *binding,</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;aq_required |= IAVF_FLAG_AQ_CONFIGURE_QUEUES_BW;</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int iavf_shaper_del(struct net_shaper_binding *binding,</div><div class='hunk'>@@ -5006,9 +5124,10 @@ static int iavf_shaper_del(struct net_shaper_binding *binding,</div><div class='ctx'> 	struct iavf_adapter *adapter = netdev_priv(binding-&gt;netdev);</div><div class='ctx'> 	struct iavf_ring *tx_ring;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+	netdev_assert_locked(adapter-&gt;netdev);</div><div class='add'>+</div><div class='ctx'> 	if (handle-&gt;id &gt;= adapter-&gt;num_active_queues)</div><div class='del'>-		goto unlock;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	tx_ring = &amp;adapter-&gt;tx_rings[handle-&gt;id];</div><div class='ctx'> 	tx_ring-&gt;q_shaper.bw_min = 0;</div><div class='hunk'>@@ -5017,8 +5136,6 @@ static int iavf_shaper_del(struct net_shaper_binding *binding,</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;aq_required |= IAVF_FLAG_AQ_CONFIGURE_QUEUES_BW;</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5056,6 +5173,8 @@ static const struct net_device_ops iavf_netdev_ops = {</div><div class='ctx'> 	.ndo_set_features	= iavf_set_features,</div><div class='ctx'> 	.ndo_setup_tc		= iavf_setup_tc,</div><div class='ctx'> 	.net_shaper_ops		= &amp;iavf_shaper_ops,</div><div class='add'>+	.ndo_hwtstamp_get	= iavf_hwstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= iavf_hwstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5231,6 +5350,7 @@ static int iavf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_alloc_etherdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netif_set_affinity_auto(netdev);</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, netdev);</div><div class='hunk'>@@ -5277,10 +5397,6 @@ static int iavf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_alloc_qos_cap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* set up the locks for the AQ, do this only once in probe</div><div class='del'>-	 * and destroy them only once in remove</div><div class='del'>-	 */</div><div class='del'>-	mutex_init(&amp;adapter-&gt;crit_lock);</div><div class='ctx'> 	mutex_init(&amp;hw-&gt;aq.asq_mutex);</div><div class='ctx'> 	mutex_init(&amp;hw-&gt;aq.arq_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -5310,6 +5426,10 @@ static int iavf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	/* Setup the wait queue for indicating virtchannel events */</div><div class='ctx'> 	init_waitqueue_head(&amp;adapter-&gt;vc_waitqueue);</div><div class='ctx'> </div><div class='add'>+	INIT_LIST_HEAD(&amp;adapter-&gt;ptp.aq_cmds);</div><div class='add'>+	init_waitqueue_head(&amp;adapter-&gt;ptp.phc_time_waitqueue);</div><div class='add'>+	mutex_init(&amp;adapter-&gt;ptp.aq_cmd_lock);</div><div class='add'>+</div><div class='ctx'> 	queue_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task,</div><div class='ctx'> 			   msecs_to_jiffies(5 * (pdev-&gt;devfn &amp; 0x07)));</div><div class='ctx'> 	/* Initialization goes on in the work. Do not add more of it below. */</div><div class='hunk'>@@ -5339,20 +5459,24 @@ static int iavf_suspend(struct device *dev_d)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = dev_get_drvdata(dev_d);</div><div class='ctx'> 	struct iavf_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	bool running;</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(netdev);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-</div><div class='del'>-	if (netif_running(netdev)) {</div><div class='add'>+	running = netif_running(netdev);</div><div class='add'>+	if (running)</div><div class='ctx'> 		rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='add'>+</div><div class='add'>+	if (running)</div><div class='ctx'> 		iavf_down(adapter);</div><div class='del'>-		rtnl_unlock();</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	iavf_free_misc_irq(adapter);</div><div class='ctx'> 	iavf_reset_interrupt_capability(adapter);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='add'>+	if (running)</div><div class='add'>+		rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -5367,7 +5491,7 @@ static int iavf_resume(struct device *dev_d)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(dev_d);</div><div class='ctx'> 	struct iavf_adapter *adapter;</div><div class='del'>-	u32 err;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	adapter = iavf_pdev_to_adapter(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -5429,20 +5553,20 @@ static void iavf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	 * There are flows where register/unregister netdev may race.</div><div class='ctx'> 	 */</div><div class='ctx'> 	while (1) {</div><div class='del'>-		mutex_lock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+		netdev_lock(netdev);</div><div class='ctx'> 		if (adapter-&gt;state == __IAVF_RUNNING ||</div><div class='ctx'> 		    adapter-&gt;state == __IAVF_DOWN ||</div><div class='ctx'> 		    adapter-&gt;state == __IAVF_INIT_FAILED) {</div><div class='del'>-			mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+			netdev_unlock(netdev);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Simply return if we already went through iavf_shutdown */</div><div class='ctx'> 		if (adapter-&gt;state == __IAVF_REMOVE) {</div><div class='del'>-			mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+			netdev_unlock(netdev);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+		netdev_unlock(netdev);</div><div class='ctx'> 		usleep_range(500, 1000);</div><div class='ctx'> 	}</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adapter-&gt;watchdog_task);</div><div class='hunk'>@@ -5451,7 +5575,7 @@ static void iavf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	if (netdev-&gt;reg_state == NETREG_REGISTERED)</div><div class='ctx'> 		unregister_netdev(netdev);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;adapter-&gt;crit_lock);</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> 	dev_info(&amp;adapter-&gt;pdev-&gt;dev, "Removing device\n");</div><div class='ctx'> 	iavf_change_state(adapter, __IAVF_REMOVE);</div><div class='ctx'> </div><div class='hunk'>@@ -5463,11 +5587,15 @@ static void iavf_remove(struct pci_dev *pdev)</div><div class='ctx'> 		msleep(50);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	iavf_ptp_release(adapter);</div><div class='add'>+</div><div class='ctx'> 	iavf_misc_irq_disable(adapter);</div><div class='ctx'> 	/* Shut down all the garbage mashers on the detention level */</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adapter-&gt;watchdog_task);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;adminq_task);</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;aq_required = 0;</div><div class='ctx'> 	adapter-&gt;flags &amp;= ~IAVF_FLAG_REINIT_ITR_NEEDED;</div><div class='hunk'>@@ -5485,8 +5613,7 @@ static void iavf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	/* destroy the locks only once, here */</div><div class='ctx'> 	mutex_destroy(&amp;hw-&gt;aq.arq_mutex);</div><div class='ctx'> 	mutex_destroy(&amp;hw-&gt;aq.asq_mutex);</div><div class='del'>-	mutex_unlock(&amp;adapter-&gt;crit_lock);</div><div class='del'>-	mutex_destroy(&amp;adapter-&gt;crit_lock);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	iounmap(hw-&gt;hw_addr);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_prototype.h b/drivers/net/ethernet/intel/iavf/iavf_prototype.h<br/>index cac9d1a35a52..7f9f9dbf959a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_prototype.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_prototype.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_prototype.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_prototype.h</a></div><div class='hunk'>@@ -22,7 +22,7 @@ enum iavf_status iavf_clean_arq_element(struct iavf_hw *hw,</div><div class='ctx'> 					struct iavf_arq_event_info *e,</div><div class='ctx'> 					u16 *events_pending);</div><div class='ctx'> enum iavf_status iavf_asq_send_command(struct iavf_hw *hw,</div><div class='del'>-				       struct iavf_aq_desc *desc,</div><div class='add'>+				       struct libie_aq_desc *desc,</div><div class='ctx'> 				       void *buff, /* can be NULL */</div><div class='ctx'> 				       u16 buff_size,</div><div class='ctx'> 				       struct iavf_asq_cmd_details *cmd_details);</div><div class='hunk'>@@ -34,7 +34,6 @@ void iavf_debug_aq(struct iavf_hw *hw, enum iavf_debug_mask mask,</div><div class='ctx'> </div><div class='ctx'> bool iavf_check_asq_alive(struct iavf_hw *hw);</div><div class='ctx'> enum iavf_status iavf_aq_queue_shutdown(struct iavf_hw *hw, bool unloading);</div><div class='del'>-const char *iavf_aq_str(struct iavf_hw *hw, enum iavf_admin_queue_err aq_err);</div><div class='ctx'> const char *iavf_stat_str(struct iavf_hw *hw, enum iavf_status stat_err);</div><div class='ctx'> </div><div class='ctx'> enum iavf_status iavf_aq_set_rss_lut(struct iavf_hw *hw, u16 seid,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_ptp.c b/drivers/net/ethernet/intel/iavf/iavf_ptp.c<br/>new file mode 100644<br/>index 000000000000..9cbd8c154031<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,492 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include "iavf.h"</div><div class='add'>+#include "iavf_ptp.h"</div><div class='add'>+</div><div class='add'>+#define iavf_clock_to_adapter(info)				\</div><div class='add'>+	container_of_const(info, struct iavf_adapter, ptp.info)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_disable_rx_tstamp - Disable timestamping in Rx rings</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Disable timestamp reporting for all Rx rings.</div><div class='add'>+ */</div><div class='add'>+static void iavf_ptp_disable_rx_tstamp(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	for (u32 i = 0; i &lt; adapter-&gt;num_active_queues; i++)</div><div class='add'>+		adapter-&gt;rx_rings[i].flags &amp;= ~IAVF_TXRX_FLAGS_HW_TSTAMP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_enable_rx_tstamp - Enable timestamping in Rx rings</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Enable timestamp reporting for all Rx rings.</div><div class='add'>+ */</div><div class='add'>+static void iavf_ptp_enable_rx_tstamp(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	for (u32 i = 0; i &lt; adapter-&gt;num_active_queues; i++)</div><div class='add'>+		adapter-&gt;rx_rings[i].flags |= IAVF_TXRX_FLAGS_HW_TSTAMP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_set_timestamp_mode - Set device timestamping mode</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ * @config: pointer to kernel_hwtstamp_config</div><div class='add'>+ *</div><div class='add'>+ * Set the timestamping mode requested from the userspace.</div><div class='add'>+ *</div><div class='add'>+ * Note: this function always translates Rx timestamp requests for any packet</div><div class='add'>+ * category into HWTSTAMP_FILTER_ALL.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+static int iavf_ptp_set_timestamp_mode(struct iavf_adapter *adapter,</div><div class='add'>+				       struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	/* Reserved for future extensions. */</div><div class='add'>+	if (config-&gt;flags)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (config-&gt;rx_filter == HWTSTAMP_FILTER_NONE) {</div><div class='add'>+		iavf_ptp_disable_rx_tstamp(adapter);</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (config-&gt;rx_filter &gt; HWTSTAMP_FILTER_NTP_ALL) {</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	} else if (!(iavf_ptp_cap_supported(adapter,</div><div class='add'>+					    VIRTCHNL_1588_PTP_CAP_RX_TSTAMP))) {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+	iavf_ptp_enable_rx_tstamp(adapter);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_set_ts_config - Set timestamping configuration</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ * @config: pointer to kernel_hwtstamp_config structure</div><div class='add'>+ * @extack: pointer to netlink_ext_ack structure</div><div class='add'>+ *</div><div class='add'>+ * Program the requested timestamping configuration to the device.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+int iavf_ptp_set_ts_config(struct iavf_adapter *adapter,</div><div class='add'>+			   struct kernel_hwtstamp_config *config,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = iavf_ptp_set_timestamp_mode(adapter, config);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Save successful settings for future reference */</div><div class='add'>+	adapter-&gt;ptp.hwtstamp_config = *config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_cap_supported - Check if a PTP capability is supported</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ * @cap: the capability bitmask to check</div><div class='add'>+ *</div><div class='add'>+ * Return: true if every capability set in cap is also set in the enabled</div><div class='add'>+ *         capabilities reported by the PF, false otherwise.</div><div class='add'>+ */</div><div class='add'>+bool iavf_ptp_cap_supported(const struct iavf_adapter *adapter, u32 cap)</div><div class='add'>+{</div><div class='add'>+	if (!IAVF_PTP_ALLOWED(adapter))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Only return true if every bit in cap is set in hw_caps.caps */</div><div class='add'>+	return (adapter-&gt;ptp.hw_caps.caps &amp; cap) == cap;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_allocate_ptp_cmd - Allocate a PTP command message structure</div><div class='add'>+ * @v_opcode: the virtchnl opcode</div><div class='add'>+ * @msglen: length in bytes of the associated virtchnl structure</div><div class='add'>+ *</div><div class='add'>+ * Allocates a PTP command message and pre-fills it with the provided message</div><div class='add'>+ * length and opcode.</div><div class='add'>+ *</div><div class='add'>+ * Return: allocated PTP command.</div><div class='add'>+ */</div><div class='add'>+static struct iavf_ptp_aq_cmd *iavf_allocate_ptp_cmd(enum virtchnl_ops v_opcode,</div><div class='add'>+						     u16 msglen)</div><div class='add'>+{</div><div class='add'>+	struct iavf_ptp_aq_cmd *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(struct_size(cmd, msg, msglen), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;v_opcode = v_opcode;</div><div class='add'>+	cmd-&gt;msglen = msglen;</div><div class='add'>+</div><div class='add'>+	return cmd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_queue_ptp_cmd - Queue PTP command for sending over virtchnl</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ * @cmd: the command structure to send</div><div class='add'>+ *</div><div class='add'>+ * Queue the given command structure into the PTP virtchnl command queue tos</div><div class='add'>+ * end to the PF.</div><div class='add'>+ */</div><div class='add'>+static void iavf_queue_ptp_cmd(struct iavf_adapter *adapter,</div><div class='add'>+			       struct iavf_ptp_aq_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;adapter-&gt;ptp.aq_cmd_lock);</div><div class='add'>+	list_add_tail(&amp;cmd-&gt;list, &amp;adapter-&gt;ptp.aq_cmds);</div><div class='add'>+	mutex_unlock(&amp;adapter-&gt;ptp.aq_cmd_lock);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;aq_required |= IAVF_FLAG_AQ_SEND_PTP_CMD;</div><div class='add'>+	mod_delayed_work(adapter-&gt;wq, &amp;adapter-&gt;watchdog_task, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_send_phc_read - Send request to read PHC time</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Send a request to obtain the PTP hardware clock time. This allocates the</div><div class='add'>+ * VIRTCHNL_OP_1588_PTP_GET_TIME message and queues it up to send to</div><div class='add'>+ * indirectly read the PHC time.</div><div class='add'>+ *</div><div class='add'>+ * This function does not wait for the reply from the PF.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if success, error code otherwise.</div><div class='add'>+ */</div><div class='add'>+static int iavf_send_phc_read(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct iavf_ptp_aq_cmd *cmd;</div><div class='add'>+</div><div class='add'>+	if (!adapter-&gt;ptp.clock)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	cmd = iavf_allocate_ptp_cmd(VIRTCHNL_OP_1588_PTP_GET_TIME,</div><div class='add'>+				    sizeof(struct virtchnl_phc_time));</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	iavf_queue_ptp_cmd(adapter, cmd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_read_phc_indirect - Indirectly read the PHC time via virtchnl</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ * @ts: storage for the timestamp value</div><div class='add'>+ * @sts: system timestamp values before and after the read</div><div class='add'>+ *</div><div class='add'>+ * Used when the device does not have direct register access to the PHC time.</div><div class='add'>+ * Indirectly reads the time via the VIRTCHNL_OP_1588_PTP_GET_TIME, and waits</div><div class='add'>+ * for the reply from the PF.</div><div class='add'>+ *</div><div class='add'>+ * Based on some simple measurements using ftrace and phc2sys, this clock</div><div class='add'>+ * access method has about a ~110 usec latency even when the system is not</div><div class='add'>+ * under load. In order to achieve acceptable results when using phc2sys with</div><div class='add'>+ * the indirect clock access method, it is recommended to use more</div><div class='add'>+ * conservative proportional and integration constants with the P/I servo.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if success, error code otherwise.</div><div class='add'>+ */</div><div class='add'>+static int iavf_read_phc_indirect(struct iavf_adapter *adapter,</div><div class='add'>+				  struct timespec64 *ts,</div><div class='add'>+				  struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	long ret;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;ptp.phc_time_ready = false;</div><div class='add'>+</div><div class='add'>+	ptp_read_system_prets(sts);</div><div class='add'>+</div><div class='add'>+	err = iavf_send_phc_read(adapter);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ret = wait_event_interruptible_timeout(adapter-&gt;ptp.phc_time_waitqueue,</div><div class='add'>+					       adapter-&gt;ptp.phc_time_ready,</div><div class='add'>+					       HZ);</div><div class='add'>+</div><div class='add'>+	ptp_read_system_postts(sts);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	else if (!ret)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	*ts = ns_to_timespec64(adapter-&gt;ptp.cached_phc_time);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iavf_ptp_gettimex64(struct ptp_clock_info *info,</div><div class='add'>+			       struct timespec64 *ts,</div><div class='add'>+			       struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	struct iavf_adapter *adapter = iavf_clock_to_adapter(info);</div><div class='add'>+</div><div class='add'>+	if (!adapter-&gt;ptp.clock)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return iavf_read_phc_indirect(adapter, ts, sts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iavf_ptp_settime64(struct ptp_clock_info *info,</div><div class='add'>+			      const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_cache_phc_time - Cache PHC time for performing timestamp extension</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Periodically cache the PHC time in order to allow for timestamp extension.</div><div class='add'>+ * This is required because the Tx and Rx timestamps only contain 32bits of</div><div class='add'>+ * nanoseconds. Timestamp extension allows calculating the corrected 64bit</div><div class='add'>+ * timestamp. This algorithm relies on the cached time being within ~1 second</div><div class='add'>+ * of the timestamp.</div><div class='add'>+ */</div><div class='add'>+static void iavf_ptp_cache_phc_time(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (!time_is_before_jiffies(adapter-&gt;ptp.cached_phc_updated + HZ))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* The response from virtchnl will store the time into</div><div class='add'>+	 * cached_phc_time.</div><div class='add'>+	 */</div><div class='add'>+	iavf_send_phc_read(adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_do_aux_work - Perform periodic work required for PTP support</div><div class='add'>+ * @info: PTP clock info structure</div><div class='add'>+ *</div><div class='add'>+ * Handler to take care of periodic work required for PTP operation. This</div><div class='add'>+ * includes the following tasks:</div><div class='add'>+ *</div><div class='add'>+ *   1) updating cached_phc_time</div><div class='add'>+ *</div><div class='add'>+ *      cached_phc_time is used by the Tx and Rx timestamp flows in order to</div><div class='add'>+ *      perform timestamp extension, by carefully comparing the timestamp</div><div class='add'>+ *      32bit nanosecond timestamps and determining the corrected 64bit</div><div class='add'>+ *      timestamp value to report to userspace. This algorithm only works if</div><div class='add'>+ *      the cached_phc_time is within ~1 second of the Tx or Rx timestamp</div><div class='add'>+ *      event. This task periodically reads the PHC time and stores it, to</div><div class='add'>+ *      ensure that timestamp extension operates correctly.</div><div class='add'>+ *</div><div class='add'>+ * Returns: time in jiffies until the periodic task should be re-scheduled.</div><div class='add'>+ */</div><div class='add'>+static long iavf_ptp_do_aux_work(struct ptp_clock_info *info)</div><div class='add'>+{</div><div class='add'>+	struct iavf_adapter *adapter = iavf_clock_to_adapter(info);</div><div class='add'>+</div><div class='add'>+	iavf_ptp_cache_phc_time(adapter);</div><div class='add'>+</div><div class='add'>+	/* Check work about twice a second */</div><div class='add'>+	return msecs_to_jiffies(500);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_register_clock - Register a new PTP for userspace</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Allocate and register a new PTP clock device if necessary.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if success, error otherwise.</div><div class='add'>+ */</div><div class='add'>+static int iavf_ptp_register_clock(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ptp_clock_info *ptp_info = &amp;adapter-&gt;ptp.info;</div><div class='add'>+	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	struct ptp_clock *clock;</div><div class='add'>+</div><div class='add'>+	snprintf(ptp_info-&gt;name, sizeof(ptp_info-&gt;name), "%s-%s-clk",</div><div class='add'>+		 KBUILD_MODNAME, dev_name(dev));</div><div class='add'>+	ptp_info-&gt;owner = THIS_MODULE;</div><div class='add'>+	ptp_info-&gt;gettimex64 = iavf_ptp_gettimex64;</div><div class='add'>+	ptp_info-&gt;settime64 = iavf_ptp_settime64;</div><div class='add'>+	ptp_info-&gt;do_aux_work = iavf_ptp_do_aux_work;</div><div class='add'>+</div><div class='add'>+	clock = ptp_clock_register(ptp_info, dev);</div><div class='add'>+	if (IS_ERR(clock))</div><div class='add'>+		return PTR_ERR(clock);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;ptp.clock = clock;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;adapter-&gt;pdev-&gt;dev, "PTP clock %s registered\n",</div><div class='add'>+		adapter-&gt;ptp.info.name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_init - Initialize PTP support if capability was negotiated</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Initialize PTP functionality, based on the capabilities that the PF has</div><div class='add'>+ * enabled for this VF.</div><div class='add'>+ */</div><div class='add'>+void iavf_ptp_init(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!iavf_ptp_cap_supported(adapter, VIRTCHNL_1588_PTP_CAP_READ_PHC)) {</div><div class='add'>+		pci_notice(adapter-&gt;pdev,</div><div class='add'>+			   "Device does not have PTP clock support\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = iavf_ptp_register_clock(adapter);</div><div class='add'>+	if (err) {</div><div class='add'>+		pci_err(adapter-&gt;pdev,</div><div class='add'>+			"Failed to register PTP clock device (%p)\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; adapter-&gt;num_active_queues; i++) {</div><div class='add'>+		struct iavf_ring *rx_ring = &amp;adapter-&gt;rx_rings[i];</div><div class='add'>+</div><div class='add'>+		rx_ring-&gt;ptp = &amp;adapter-&gt;ptp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ptp_schedule_worker(adapter-&gt;ptp.clock, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_release - Disable PTP support</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Release all PTP resources that were previously initialized.</div><div class='add'>+ */</div><div class='add'>+void iavf_ptp_release(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct iavf_ptp_aq_cmd *cmd, *tmp;</div><div class='add'>+</div><div class='add'>+	if (!adapter-&gt;ptp.clock)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pci_dbg(adapter-&gt;pdev, "removing PTP clock %s\n",</div><div class='add'>+		adapter-&gt;ptp.info.name);</div><div class='add'>+	ptp_clock_unregister(adapter-&gt;ptp.clock);</div><div class='add'>+	adapter-&gt;ptp.clock = NULL;</div><div class='add'>+</div><div class='add'>+	/* Cancel any remaining uncompleted PTP clock commands */</div><div class='add'>+	mutex_lock(&amp;adapter-&gt;ptp.aq_cmd_lock);</div><div class='add'>+	list_for_each_entry_safe(cmd, tmp, &amp;adapter-&gt;ptp.aq_cmds, list) {</div><div class='add'>+		list_del(&amp;cmd-&gt;list);</div><div class='add'>+		kfree(cmd);</div><div class='add'>+	}</div><div class='add'>+	adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_SEND_PTP_CMD;</div><div class='add'>+	mutex_unlock(&amp;adapter-&gt;ptp.aq_cmd_lock);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;ptp.hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+	iavf_ptp_disable_rx_tstamp(adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_process_caps - Handle change in PTP capabilities</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Handle any state changes necessary due to change in PTP capabilities, such</div><div class='add'>+ * as after a device reset or change in configuration from the PF.</div><div class='add'>+ */</div><div class='add'>+void iavf_ptp_process_caps(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	bool phc = iavf_ptp_cap_supported(adapter, VIRTCHNL_1588_PTP_CAP_READ_PHC);</div><div class='add'>+</div><div class='add'>+	/* Check if the device gained or lost necessary access to support the</div><div class='add'>+	 * PTP hardware clock. If so, driver must respond appropriately by</div><div class='add'>+	 * creating or destroying the PTP clock device.</div><div class='add'>+	 */</div><div class='add'>+	if (adapter-&gt;ptp.clock &amp;&amp; !phc)</div><div class='add'>+		iavf_ptp_release(adapter);</div><div class='add'>+	else if (!adapter-&gt;ptp.clock &amp;&amp; phc)</div><div class='add'>+		iavf_ptp_init(adapter);</div><div class='add'>+</div><div class='add'>+	/* Check if the device lost access to Rx timestamp incoming packets */</div><div class='add'>+	if (!iavf_ptp_cap_supported(adapter, VIRTCHNL_1588_PTP_CAP_RX_TSTAMP)) {</div><div class='add'>+		adapter-&gt;ptp.hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+		iavf_ptp_disable_rx_tstamp(adapter);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_ptp_extend_32b_timestamp - Convert a 32b nanoseconds timestamp to 64b</div><div class='add'>+ * nanoseconds</div><div class='add'>+ * @cached_phc_time: recently cached copy of PHC time</div><div class='add'>+ * @in_tstamp: Ingress/egress 32b nanoseconds timestamp value</div><div class='add'>+ *</div><div class='add'>+ * Hardware captures timestamps which contain only 32 bits of nominal</div><div class='add'>+ * nanoseconds, as opposed to the 64bit timestamps that the stack expects.</div><div class='add'>+ *</div><div class='add'>+ * Extend the 32bit nanosecond timestamp using the following algorithm and</div><div class='add'>+ * assumptions:</div><div class='add'>+ *</div><div class='add'>+ * 1) have a recently cached copy of the PHC time</div><div class='add'>+ * 2) assume that the in_tstamp was captured 2^31 nanoseconds (~2.1</div><div class='add'>+ *    seconds) before or after the PHC time was captured.</div><div class='add'>+ * 3) calculate the delta between the cached time and the timestamp</div><div class='add'>+ * 4) if the delta is smaller than 2^31 nanoseconds, then the timestamp was</div><div class='add'>+ *    captured after the PHC time. In this case, the full timestamp is just</div><div class='add'>+ *    the cached PHC time plus the delta.</div><div class='add'>+ * 5) otherwise, if the delta is larger than 2^31 nanoseconds, then the</div><div class='add'>+ *    timestamp was captured *before* the PHC time, i.e. because the PHC</div><div class='add'>+ *    cache was updated after the timestamp was captured by hardware. In this</div><div class='add'>+ *    case, the full timestamp is the cached time minus the inverse delta.</div><div class='add'>+ *</div><div class='add'>+ * This algorithm works even if the PHC time was updated after a Tx timestamp</div><div class='add'>+ * was requested, but before the Tx timestamp event was reported from</div><div class='add'>+ * hardware.</div><div class='add'>+ *</div><div class='add'>+ * This calculation primarily relies on keeping the cached PHC time up to</div><div class='add'>+ * date. If the timestamp was captured more than 2^31 nanoseconds after the</div><div class='add'>+ * PHC time, it is possible that the lower 32bits of PHC time have</div><div class='add'>+ * overflowed more than once, and we might generate an incorrect timestamp.</div><div class='add'>+ *</div><div class='add'>+ * This is prevented by (a) periodically updating the cached PHC time once</div><div class='add'>+ * a second, and (b) discarding any Tx timestamp packet if it has waited for</div><div class='add'>+ * a timestamp for more than one second.</div><div class='add'>+ *</div><div class='add'>+ * Return: extended timestamp (to 64b).</div><div class='add'>+ */</div><div class='add'>+u64 iavf_ptp_extend_32b_timestamp(u64 cached_phc_time, u32 in_tstamp)</div><div class='add'>+{</div><div class='add'>+	u32 low = lower_32_bits(cached_phc_time);</div><div class='add'>+	u32 delta = in_tstamp - low;</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	/* Do not assume that the in_tstamp is always more recent than the</div><div class='add'>+	 * cached PHC time. If the delta is large, it indicates that the</div><div class='add'>+	 * in_tstamp was taken in the past, and should be converted</div><div class='add'>+	 * forward.</div><div class='add'>+	 */</div><div class='add'>+	if (delta &gt; S32_MAX)</div><div class='add'>+		ns = cached_phc_time - (low - in_tstamp);</div><div class='add'>+	else</div><div class='add'>+		ns = cached_phc_time + delta;</div><div class='add'>+</div><div class='add'>+	return ns;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_ptp.h b/drivers/net/ethernet/intel/iavf/iavf_ptp.h<br/>new file mode 100644<br/>index 000000000000..783b8f287cd9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_ptp.h</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _IAVF_PTP_H_</div><div class='add'>+#define _IAVF_PTP_H_</div><div class='add'>+</div><div class='add'>+#include "iavf_types.h"</div><div class='add'>+</div><div class='add'>+/* bit indicating whether a 40bit timestamp is valid */</div><div class='add'>+#define IAVF_PTP_40B_TSTAMP_VALID	BIT(24)</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+void iavf_ptp_init(struct iavf_adapter *adapter);</div><div class='add'>+void iavf_ptp_release(struct iavf_adapter *adapter);</div><div class='add'>+void iavf_ptp_process_caps(struct iavf_adapter *adapter);</div><div class='add'>+bool iavf_ptp_cap_supported(const struct iavf_adapter *adapter, u32 cap);</div><div class='add'>+void iavf_virtchnl_send_ptp_cmd(struct iavf_adapter *adapter);</div><div class='add'>+int iavf_ptp_set_ts_config(struct iavf_adapter *adapter,</div><div class='add'>+			   struct kernel_hwtstamp_config *config,</div><div class='add'>+			   struct netlink_ext_ack *extack);</div><div class='add'>+u64 iavf_ptp_extend_32b_timestamp(u64 cached_phc_time, u32 in_tstamp);</div><div class='add'>+#else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */</div><div class='add'>+static inline void iavf_ptp_init(struct iavf_adapter *adapter) { }</div><div class='add'>+static inline void iavf_ptp_release(struct iavf_adapter *adapter) { }</div><div class='add'>+static inline void iavf_ptp_process_caps(struct iavf_adapter *adapter) { }</div><div class='add'>+static inline bool iavf_ptp_cap_supported(const struct iavf_adapter *adapter,</div><div class='add'>+					  u32 cap)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void iavf_virtchnl_send_ptp_cmd(struct iavf_adapter *adapter) { }</div><div class='add'>+static inline int iavf_ptp_set_ts_config(struct iavf_adapter *adapter,</div><div class='add'>+					 struct kernel_hwtstamp_config *config,</div><div class='add'>+					 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 iavf_ptp_extend_32b_timestamp(u64 cached_phc_time,</div><div class='add'>+						u32 in_tstamp)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */</div><div class='add'>+#endif /* _IAVF_PTP_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_trace.h b/drivers/net/ethernet/intel/iavf/iavf_trace.h<br/>index 62212011c807..c5e4d1823886 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_trace.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_trace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_trace.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_trace.h</a></div><div class='hunk'>@@ -112,7 +112,7 @@ DECLARE_EVENT_CLASS(</div><div class='ctx'> 	iavf_rx_template,</div><div class='ctx'> </div><div class='ctx'> 	TP_PROTO(struct iavf_ring *ring,</div><div class='del'>-		 union iavf_32byte_rx_desc *desc,</div><div class='add'>+		 struct iavf_rx_desc *desc,</div><div class='ctx'> 		 struct sk_buff *skb),</div><div class='ctx'> </div><div class='ctx'> 	TP_ARGS(ring, desc, skb),</div><div class='hunk'>@@ -140,7 +140,7 @@ DECLARE_EVENT_CLASS(</div><div class='ctx'> DEFINE_EVENT(</div><div class='ctx'> 	iavf_rx_template, iavf_clean_rx_irq,</div><div class='ctx'> 	TP_PROTO(struct iavf_ring *ring,</div><div class='del'>-		 union iavf_32byte_rx_desc *desc,</div><div class='add'>+		 struct iavf_rx_desc *desc,</div><div class='ctx'> 		 struct sk_buff *skb),</div><div class='ctx'> </div><div class='ctx'> 	TP_ARGS(ring, desc, skb));</div><div class='hunk'>@@ -148,7 +148,7 @@ DEFINE_EVENT(</div><div class='ctx'> DEFINE_EVENT(</div><div class='ctx'> 	iavf_rx_template, iavf_clean_rx_irq_rx,</div><div class='ctx'> 	TP_PROTO(struct iavf_ring *ring,</div><div class='del'>-		 union iavf_32byte_rx_desc *desc,</div><div class='add'>+		 struct iavf_rx_desc *desc,</div><div class='ctx'> 		 struct sk_buff *skb),</div><div class='ctx'> </div><div class='ctx'> 	TP_ARGS(ring, desc, skb));</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_txrx.c b/drivers/net/ethernet/intel/iavf/iavf_txrx.c<br/>index 26b424fd6718..363c42bf3dcf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_txrx.c</a></div><div class='hunk'>@@ -8,6 +8,26 @@</div><div class='ctx'> #include "iavf.h"</div><div class='ctx'> #include "iavf_trace.h"</div><div class='ctx'> #include "iavf_prototype.h"</div><div class='add'>+#include "iavf_ptp.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_is_descriptor_done - tests DD bit in Rx descriptor</div><div class='add'>+ * @qw1: quad word 1 from descriptor to get Descriptor Done field from</div><div class='add'>+ * @flex: is the descriptor flex or legacy</div><div class='add'>+ *</div><div class='add'>+ * This function tests the descriptor done bit in specified descriptor. Because</div><div class='add'>+ * there are two types of descriptors (legacy and flex) the parameter rx_ring</div><div class='add'>+ * is used to distinguish.</div><div class='add'>+ *</div><div class='add'>+ * Return: true or false based on the state of DD bit in Rx descriptor.</div><div class='add'>+ */</div><div class='add'>+static bool iavf_is_descriptor_done(u64 qw1, bool flex)</div><div class='add'>+{</div><div class='add'>+	if (flex)</div><div class='add'>+		return FIELD_GET(IAVF_RXD_FLEX_DD_M, qw1);</div><div class='add'>+	else</div><div class='add'>+		return FIELD_GET(IAVF_RXD_LEGACY_DD_M, qw1);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static __le64 build_ctob(u32 td_cmd, u32 td_offset, unsigned int size,</div><div class='ctx'> 			 u32 td_tag)</div><div class='hunk'>@@ -703,7 +723,7 @@ static void iavf_clean_rx_ring(struct iavf_ring *rx_ring)</div><div class='ctx'> 	for (u32 i = rx_ring-&gt;next_to_clean; i != rx_ring-&gt;next_to_use; ) {</div><div class='ctx'> 		const struct libeth_fqe *rx_fqes = &amp;rx_ring-&gt;rx_fqes[i];</div><div class='ctx'> </div><div class='del'>-		page_pool_put_full_page(rx_ring-&gt;pp, rx_fqes-&gt;page, false);</div><div class='add'>+		libeth_rx_recycle_slow(rx_fqes-&gt;netmem);</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(++i == rx_ring-&gt;count))</div><div class='ctx'> 			i = 0;</div><div class='hunk'>@@ -766,7 +786,7 @@ int iavf_setup_rx_descriptors(struct iavf_ring *rx_ring)</div><div class='ctx'> 	u64_stats_init(&amp;rx_ring-&gt;syncp);</div><div class='ctx'> </div><div class='ctx'> 	/* Round up to nearest 4K */</div><div class='del'>-	rx_ring-&gt;size = rx_ring-&gt;count * sizeof(union iavf_32byte_rx_desc);</div><div class='add'>+	rx_ring-&gt;size = rx_ring-&gt;count * sizeof(struct iavf_rx_desc);</div><div class='ctx'> 	rx_ring-&gt;size = ALIGN(rx_ring-&gt;size, 4096);</div><div class='ctx'> 	rx_ring-&gt;desc = dma_alloc_coherent(fq.pp-&gt;p.dev, rx_ring-&gt;size,</div><div class='ctx'> 					   &amp;rx_ring-&gt;dma, GFP_KERNEL);</div><div class='hunk'>@@ -845,7 +865,7 @@ bool iavf_alloc_rx_buffers(struct iavf_ring *rx_ring, u16 cleaned_count)</div><div class='ctx'> 		.count		= rx_ring-&gt;count,</div><div class='ctx'> 	};</div><div class='ctx'> 	u16 ntu = rx_ring-&gt;next_to_use;</div><div class='del'>-	union iavf_rx_desc *rx_desc;</div><div class='add'>+	struct iavf_rx_desc *rx_desc;</div><div class='ctx'> </div><div class='ctx'> 	/* do nothing if no valid netdev defined */</div><div class='ctx'> 	if (!rx_ring-&gt;netdev || !cleaned_count)</div><div class='hunk'>@@ -863,7 +883,7 @@ bool iavf_alloc_rx_buffers(struct iavf_ring *rx_ring, u16 cleaned_count)</div><div class='ctx'> 		/* Refresh the desc even if buffer_addrs didn't change</div><div class='ctx'> 		 * because each write-back erases this info.</div><div class='ctx'> 		 */</div><div class='del'>-		rx_desc-&gt;read.pkt_addr = cpu_to_le64(addr);</div><div class='add'>+		rx_desc-&gt;qw0 = cpu_to_le64(addr);</div><div class='ctx'> </div><div class='ctx'> 		rx_desc++;</div><div class='ctx'> 		ntu++;</div><div class='hunk'>@@ -873,7 +893,7 @@ bool iavf_alloc_rx_buffers(struct iavf_ring *rx_ring, u16 cleaned_count)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* clear the status bits for the next_to_use descriptor */</div><div class='del'>-		rx_desc-&gt;wb.qword1.status_error_len = 0;</div><div class='add'>+		rx_desc-&gt;qw1 = 0;</div><div class='ctx'> </div><div class='ctx'> 		cleaned_count--;</div><div class='ctx'> 	} while (cleaned_count);</div><div class='hunk'>@@ -896,60 +916,43 @@ no_buffers:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * iavf_rx_checksum - Indicate in skb if hw indicated a good cksum</div><div class='add'>+ * iavf_rx_csum - Indicate in skb if hw indicated a good checksum</div><div class='ctx'>  * @vsi: the VSI we care about</div><div class='ctx'>  * @skb: skb currently being received and modified</div><div class='del'>- * @rx_desc: the receive descriptor</div><div class='add'>+ * @decoded_pt: decoded ptype information</div><div class='add'>+ * @csum_bits: decoded Rx descriptor information</div><div class='ctx'>  **/</div><div class='del'>-static void iavf_rx_checksum(struct iavf_vsi *vsi,</div><div class='del'>-			     struct sk_buff *skb,</div><div class='del'>-			     union iavf_rx_desc *rx_desc)</div><div class='add'>+static void iavf_rx_csum(const struct iavf_vsi *vsi, struct sk_buff *skb,</div><div class='add'>+			 struct libeth_rx_pt decoded_pt,</div><div class='add'>+			 struct libeth_rx_csum csum_bits)</div><div class='ctx'> {</div><div class='del'>-	struct libeth_rx_pt decoded;</div><div class='del'>-	u32 rx_error, rx_status;</div><div class='ctx'> 	bool ipv4, ipv6;</div><div class='del'>-	u8 ptype;</div><div class='del'>-	u64 qword;</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='ctx'> </div><div class='del'>-	qword = le64_to_cpu(rx_desc-&gt;wb.qword1.status_error_len);</div><div class='del'>-	ptype = FIELD_GET(IAVF_RXD_QW1_PTYPE_MASK, qword);</div><div class='del'>-</div><div class='del'>-	decoded = libie_rx_pt_parse(ptype);</div><div class='del'>-	if (!libeth_rx_pt_has_checksum(vsi-&gt;netdev, decoded))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	rx_error = FIELD_GET(IAVF_RXD_QW1_ERROR_MASK, qword);</div><div class='del'>-	rx_status = FIELD_GET(IAVF_RXD_QW1_STATUS_MASK, qword);</div><div class='del'>-</div><div class='ctx'> 	/* did the hardware decode the packet and checksum? */</div><div class='del'>-	if (!(rx_status &amp; BIT(IAVF_RX_DESC_STATUS_L3L4P_SHIFT)))</div><div class='add'>+	if (unlikely(!csum_bits.l3l4p))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ipv4 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV4;</div><div class='del'>-	ipv6 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV6;</div><div class='add'>+	ipv4 = libeth_rx_pt_get_ip_ver(decoded_pt) == LIBETH_RX_PT_OUTER_IPV4;</div><div class='add'>+	ipv6 = libeth_rx_pt_get_ip_ver(decoded_pt) == LIBETH_RX_PT_OUTER_IPV6;</div><div class='ctx'> </div><div class='del'>-	if (ipv4 &amp;&amp;</div><div class='del'>-	    (rx_error &amp; (BIT(IAVF_RX_DESC_ERROR_IPE_SHIFT) |</div><div class='del'>-			 BIT(IAVF_RX_DESC_ERROR_EIPE_SHIFT))))</div><div class='add'>+	if (unlikely(ipv4 &amp;&amp; (csum_bits.ipe || csum_bits.eipe)))</div><div class='ctx'> 		goto checksum_fail;</div><div class='ctx'> </div><div class='ctx'> 	/* likely incorrect csum if alternate IP extension headers found */</div><div class='del'>-	if (ipv6 &amp;&amp;</div><div class='del'>-	    rx_status &amp; BIT(IAVF_RX_DESC_STATUS_IPV6EXADD_SHIFT))</div><div class='del'>-		/* don't increment checksum err here, non-fatal err */</div><div class='add'>+	if (unlikely(ipv6 &amp;&amp; csum_bits.ipv6exadd))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* there was some L4 error, count error and punt packet to the stack */</div><div class='del'>-	if (rx_error &amp; BIT(IAVF_RX_DESC_ERROR_L4E_SHIFT))</div><div class='add'>+	if (unlikely(csum_bits.l4e))</div><div class='ctx'> 		goto checksum_fail;</div><div class='ctx'> </div><div class='ctx'> 	/* handle packets that were not able to be checksummed due</div><div class='ctx'> 	 * to arrival speed, in this case the stack can compute</div><div class='ctx'> 	 * the csum.</div><div class='ctx'> 	 */</div><div class='del'>-	if (rx_error &amp; BIT(IAVF_RX_DESC_ERROR_PPRS_SHIFT))</div><div class='add'>+	if (unlikely(csum_bits.pprs))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='hunk'>@@ -960,52 +963,196 @@ checksum_fail:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * iavf_rx_hash - set the hash value in the skb</div><div class='add'>+ * iavf_legacy_rx_csum - Indicate in skb if hw indicated a good checksum</div><div class='add'>+ * @vsi: the VSI we care about</div><div class='add'>+ * @qw1: quad word 1</div><div class='add'>+ * @decoded_pt: decoded packet type</div><div class='add'>+ *</div><div class='add'>+ * This function only operates on the VIRTCHNL_RXDID_1_32B_BASE legacy 32byte</div><div class='add'>+ * descriptor writeback format.</div><div class='add'>+ *</div><div class='add'>+ * Return: decoded checksum bits.</div><div class='add'>+ **/</div><div class='add'>+static struct libeth_rx_csum</div><div class='add'>+iavf_legacy_rx_csum(const struct iavf_vsi *vsi, u64 qw1,</div><div class='add'>+		    const struct libeth_rx_pt decoded_pt)</div><div class='add'>+{</div><div class='add'>+	struct libeth_rx_csum csum_bits = {};</div><div class='add'>+</div><div class='add'>+	if (!libeth_rx_pt_has_checksum(vsi-&gt;netdev, decoded_pt))</div><div class='add'>+		return csum_bits;</div><div class='add'>+</div><div class='add'>+	csum_bits.ipe = FIELD_GET(IAVF_RXD_LEGACY_IPE_M, qw1);</div><div class='add'>+	csum_bits.eipe = FIELD_GET(IAVF_RXD_LEGACY_EIPE_M, qw1);</div><div class='add'>+	csum_bits.l4e = FIELD_GET(IAVF_RXD_LEGACY_L4E_M, qw1);</div><div class='add'>+	csum_bits.pprs = FIELD_GET(IAVF_RXD_LEGACY_PPRS_M, qw1);</div><div class='add'>+	csum_bits.l3l4p = FIELD_GET(IAVF_RXD_LEGACY_L3L4P_M, qw1);</div><div class='add'>+	csum_bits.ipv6exadd = FIELD_GET(IAVF_RXD_LEGACY_IPV6EXADD_M, qw1);</div><div class='add'>+</div><div class='add'>+	return csum_bits;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_flex_rx_csum - Indicate in skb if hw indicated a good checksum</div><div class='add'>+ * @vsi: the VSI we care about</div><div class='add'>+ * @qw1: quad word 1</div><div class='add'>+ * @decoded_pt: decoded packet type</div><div class='add'>+ *</div><div class='add'>+ * This function only operates on the VIRTCHNL_RXDID_2_FLEX_SQ_NIC flexible</div><div class='add'>+ * descriptor writeback format.</div><div class='add'>+ *</div><div class='add'>+ * Return: decoded checksum bits.</div><div class='add'>+ **/</div><div class='add'>+static struct libeth_rx_csum</div><div class='add'>+iavf_flex_rx_csum(const struct iavf_vsi *vsi, u64 qw1,</div><div class='add'>+		  const struct libeth_rx_pt decoded_pt)</div><div class='add'>+{</div><div class='add'>+	struct libeth_rx_csum csum_bits = {};</div><div class='add'>+</div><div class='add'>+	if (!libeth_rx_pt_has_checksum(vsi-&gt;netdev, decoded_pt))</div><div class='add'>+		return csum_bits;</div><div class='add'>+</div><div class='add'>+	csum_bits.ipe = FIELD_GET(IAVF_RXD_FLEX_XSUM_IPE_M, qw1);</div><div class='add'>+	csum_bits.eipe = FIELD_GET(IAVF_RXD_FLEX_XSUM_EIPE_M, qw1);</div><div class='add'>+	csum_bits.l4e = FIELD_GET(IAVF_RXD_FLEX_XSUM_L4E_M, qw1);</div><div class='add'>+	csum_bits.eudpe = FIELD_GET(IAVF_RXD_FLEX_XSUM_EUDPE_M, qw1);</div><div class='add'>+	csum_bits.l3l4p = FIELD_GET(IAVF_RXD_FLEX_L3L4P_M, qw1);</div><div class='add'>+	csum_bits.ipv6exadd = FIELD_GET(IAVF_RXD_FLEX_IPV6EXADD_M, qw1);</div><div class='add'>+	csum_bits.nat = FIELD_GET(IAVF_RXD_FLEX_NAT_M, qw1);</div><div class='add'>+</div><div class='add'>+	return csum_bits;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_legacy_rx_hash - set the hash value in the skb</div><div class='add'>+ * @ring: descriptor ring</div><div class='add'>+ * @qw0: quad word 0</div><div class='add'>+ * @qw1: quad word 1</div><div class='add'>+ * @skb: skb currently being received and modified</div><div class='add'>+ * @decoded_pt: decoded packet type</div><div class='add'>+ *</div><div class='add'>+ * This function only operates on the VIRTCHNL_RXDID_1_32B_BASE legacy 32byte</div><div class='add'>+ * descriptor writeback format.</div><div class='add'>+ **/</div><div class='add'>+static void iavf_legacy_rx_hash(const struct iavf_ring *ring, __le64 qw0,</div><div class='add'>+				__le64 qw1, struct sk_buff *skb,</div><div class='add'>+				const struct libeth_rx_pt decoded_pt)</div><div class='add'>+{</div><div class='add'>+	const __le64 rss_mask = cpu_to_le64(IAVF_RXD_LEGACY_FLTSTAT_M);</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	if (!libeth_rx_pt_has_hash(ring-&gt;netdev, decoded_pt))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if ((qw1 &amp; rss_mask) == rss_mask) {</div><div class='add'>+		hash = le64_get_bits(qw0, IAVF_RXD_LEGACY_RSS_M);</div><div class='add'>+		libeth_rx_pt_set_hash(skb, hash, decoded_pt);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_flex_rx_hash - set the hash value in the skb</div><div class='ctx'>  * @ring: descriptor ring</div><div class='del'>- * @rx_desc: specific descriptor</div><div class='add'>+ * @qw1: quad word 1</div><div class='ctx'>  * @skb: skb currently being received and modified</div><div class='del'>- * @rx_ptype: Rx packet type</div><div class='add'>+ * @decoded_pt: decoded packet type</div><div class='add'>+ *</div><div class='add'>+ * This function only operates on the VIRTCHNL_RXDID_2_FLEX_SQ_NIC flexible</div><div class='add'>+ * descriptor writeback format.</div><div class='ctx'>  **/</div><div class='del'>-static void iavf_rx_hash(struct iavf_ring *ring,</div><div class='del'>-			 union iavf_rx_desc *rx_desc,</div><div class='del'>-			 struct sk_buff *skb,</div><div class='del'>-			 u8 rx_ptype)</div><div class='add'>+static void iavf_flex_rx_hash(const struct iavf_ring *ring, __le64 qw1,</div><div class='add'>+			      struct sk_buff *skb,</div><div class='add'>+			      const struct libeth_rx_pt decoded_pt)</div><div class='ctx'> {</div><div class='del'>-	struct libeth_rx_pt decoded;</div><div class='add'>+	bool rss_valid;</div><div class='ctx'> 	u32 hash;</div><div class='del'>-	const __le64 rss_mask =</div><div class='del'>-		cpu_to_le64((u64)IAVF_RX_DESC_FLTSTAT_RSS_HASH &lt;&lt;</div><div class='del'>-			    IAVF_RX_DESC_STATUS_FLTSTAT_SHIFT);</div><div class='ctx'> </div><div class='del'>-	decoded = libie_rx_pt_parse(rx_ptype);</div><div class='del'>-	if (!libeth_rx_pt_has_hash(ring-&gt;netdev, decoded))</div><div class='add'>+	if (!libeth_rx_pt_has_hash(ring-&gt;netdev, decoded_pt))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if ((rx_desc-&gt;wb.qword1.status_error_len &amp; rss_mask) == rss_mask) {</div><div class='del'>-		hash = le32_to_cpu(rx_desc-&gt;wb.qword0.hi_dword.rss);</div><div class='del'>-		libeth_rx_pt_set_hash(skb, hash, decoded);</div><div class='add'>+	rss_valid = le64_get_bits(qw1, IAVF_RXD_FLEX_RSS_VALID_M);</div><div class='add'>+	if (rss_valid) {</div><div class='add'>+		hash = le64_get_bits(qw1, IAVF_RXD_FLEX_RSS_HASH_M);</div><div class='add'>+		libeth_rx_pt_set_hash(skb, hash, decoded_pt);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * iavf_flex_rx_tstamp - Capture Rx timestamp from the descriptor</div><div class='add'>+ * @rx_ring: descriptor ring</div><div class='add'>+ * @qw2: quad word 2 of descriptor</div><div class='add'>+ * @qw3: quad word 3 of descriptor</div><div class='add'>+ * @skb: skb currently being received</div><div class='add'>+ *</div><div class='add'>+ * Read the Rx timestamp value from the descriptor and pass it to the stack.</div><div class='add'>+ *</div><div class='add'>+ * This function only operates on the VIRTCHNL_RXDID_2_FLEX_SQ_NIC flexible</div><div class='add'>+ * descriptor writeback format.</div><div class='add'>+ */</div><div class='add'>+static void iavf_flex_rx_tstamp(const struct iavf_ring *rx_ring, __le64 qw2,</div><div class='add'>+				__le64 qw3, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	u32 tstamp;</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	/* Skip processing if timestamps aren't enabled */</div><div class='add'>+	if (!(rx_ring-&gt;flags &amp; IAVF_TXRX_FLAGS_HW_TSTAMP))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Check if this Rx descriptor has a valid timestamp */</div><div class='add'>+	if (!le64_get_bits(qw2, IAVF_PTP_40B_TSTAMP_VALID))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* the ts_low field only contains the valid bit and sub-nanosecond</div><div class='add'>+	 * precision, so we don't need to extract it.</div><div class='add'>+	 */</div><div class='add'>+	tstamp = le64_get_bits(qw3, IAVF_RXD_FLEX_QW3_TSTAMP_HIGH_M);</div><div class='add'>+</div><div class='add'>+	ns = iavf_ptp_extend_32b_timestamp(rx_ring-&gt;ptp-&gt;cached_phc_time,</div><div class='add'>+					   tstamp);</div><div class='add'>+</div><div class='add'>+	*skb_hwtstamps(skb) = (struct skb_shared_hwtstamps) {</div><div class='add'>+		.hwtstamp = ns_to_ktime(ns),</div><div class='add'>+	};</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * iavf_process_skb_fields - Populate skb header fields from Rx descriptor</div><div class='ctx'>  * @rx_ring: rx descriptor ring packet is being transacted on</div><div class='ctx'>  * @rx_desc: pointer to the EOP Rx descriptor</div><div class='ctx'>  * @skb: pointer to current skb being populated</div><div class='del'>- * @rx_ptype: the packet type decoded by hardware</div><div class='add'>+ * @ptype: the packet type decoded by hardware</div><div class='add'>+ * @flex: is the descriptor flex or legacy</div><div class='ctx'>  *</div><div class='ctx'>  * This function checks the ring, descriptor, and packet information in</div><div class='ctx'>  * order to populate the hash, checksum, VLAN, protocol, and</div><div class='ctx'>  * other fields within the skb.</div><div class='ctx'>  **/</div><div class='del'>-static void</div><div class='del'>-iavf_process_skb_fields(struct iavf_ring *rx_ring,</div><div class='del'>-			union iavf_rx_desc *rx_desc, struct sk_buff *skb,</div><div class='del'>-			u8 rx_ptype)</div><div class='add'>+static void iavf_process_skb_fields(const struct iavf_ring *rx_ring,</div><div class='add'>+				    const struct iavf_rx_desc *rx_desc,</div><div class='add'>+				    struct sk_buff *skb, u32 ptype,</div><div class='add'>+				    bool flex)</div><div class='ctx'> {</div><div class='del'>-	iavf_rx_hash(rx_ring, rx_desc, skb, rx_ptype);</div><div class='del'>-</div><div class='del'>-	iavf_rx_checksum(rx_ring-&gt;vsi, skb, rx_desc);</div><div class='add'>+	struct libeth_rx_csum csum_bits;</div><div class='add'>+	struct libeth_rx_pt decoded_pt;</div><div class='add'>+	__le64 qw0 = rx_desc-&gt;qw0;</div><div class='add'>+	__le64 qw1 = rx_desc-&gt;qw1;</div><div class='add'>+	__le64 qw2 = rx_desc-&gt;qw2;</div><div class='add'>+	__le64 qw3 = rx_desc-&gt;qw3;</div><div class='add'>+</div><div class='add'>+	decoded_pt = libie_rx_pt_parse(ptype);</div><div class='add'>+</div><div class='add'>+	if (flex) {</div><div class='add'>+		iavf_flex_rx_hash(rx_ring, qw1, skb, decoded_pt);</div><div class='add'>+		iavf_flex_rx_tstamp(rx_ring, qw2, qw3, skb);</div><div class='add'>+		csum_bits = iavf_flex_rx_csum(rx_ring-&gt;vsi, le64_to_cpu(qw1),</div><div class='add'>+					      decoded_pt);</div><div class='add'>+	} else {</div><div class='add'>+		iavf_legacy_rx_hash(rx_ring, qw0, qw1, skb, decoded_pt);</div><div class='add'>+		csum_bits = iavf_legacy_rx_csum(rx_ring-&gt;vsi, le64_to_cpu(qw1),</div><div class='add'>+						decoded_pt);</div><div class='add'>+	}</div><div class='add'>+	iavf_rx_csum(rx_ring-&gt;vsi, skb, decoded_pt, csum_bits);</div><div class='ctx'> </div><div class='ctx'> 	skb_record_rx_queue(skb, rx_ring-&gt;queue_index);</div><div class='ctx'> </div><div class='hunk'>@@ -1050,10 +1197,11 @@ static void iavf_add_rx_frag(struct sk_buff *skb,</div><div class='ctx'> 			     const struct libeth_fqe *rx_buffer,</div><div class='ctx'> 			     unsigned int size)</div><div class='ctx'> {</div><div class='del'>-	u32 hr = rx_buffer-&gt;page-&gt;pp-&gt;p.offset;</div><div class='add'>+	u32 hr = netmem_get_pp(rx_buffer-&gt;netmem)-&gt;p.offset;</div><div class='ctx'> </div><div class='del'>-	skb_add_rx_frag(skb, skb_shinfo(skb)-&gt;nr_frags, rx_buffer-&gt;page,</div><div class='del'>-			rx_buffer-&gt;offset + hr, size, rx_buffer-&gt;truesize);</div><div class='add'>+	skb_add_rx_frag_netmem(skb, skb_shinfo(skb)-&gt;nr_frags,</div><div class='add'>+			       rx_buffer-&gt;netmem, rx_buffer-&gt;offset + hr,</div><div class='add'>+			       size, rx_buffer-&gt;truesize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1067,12 +1215,13 @@ static void iavf_add_rx_frag(struct sk_buff *skb,</div><div class='ctx'> static struct sk_buff *iavf_build_skb(const struct libeth_fqe *rx_buffer,</div><div class='ctx'> 				      unsigned int size)</div><div class='ctx'> {</div><div class='del'>-	u32 hr = rx_buffer-&gt;page-&gt;pp-&gt;p.offset;</div><div class='add'>+	struct page *buf_page = __netmem_to_page(rx_buffer-&gt;netmem);</div><div class='add'>+	u32 hr = pp_page_to_nmdesc(buf_page)-&gt;pp-&gt;p.offset;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	void *va;</div><div class='ctx'> </div><div class='ctx'> 	/* prefetch first cache line of first page */</div><div class='del'>-	va = page_address(rx_buffer-&gt;page) + rx_buffer-&gt;offset;</div><div class='add'>+	va = page_address(buf_page) + rx_buffer-&gt;offset;</div><div class='ctx'> 	net_prefetch(va + hr);</div><div class='ctx'> </div><div class='ctx'> 	/* build an skb around the page buffer */</div><div class='hunk'>@@ -1092,8 +1241,7 @@ static struct sk_buff *iavf_build_skb(const struct libeth_fqe *rx_buffer,</div><div class='ctx'> /**</div><div class='ctx'>  * iavf_is_non_eop - process handling of non-EOP buffers</div><div class='ctx'>  * @rx_ring: Rx ring being processed</div><div class='del'>- * @rx_desc: Rx descriptor for current buffer</div><div class='del'>- * @skb: Current socket buffer containing buffer in progress</div><div class='add'>+ * @fields: Rx descriptor extracted fields</div><div class='ctx'>  *</div><div class='ctx'>  * This function updates next to clean.  If the buffer is an EOP buffer</div><div class='ctx'>  * this function exits returning false, otherwise it will place the</div><div class='hunk'>@@ -1101,8 +1249,7 @@ static struct sk_buff *iavf_build_skb(const struct libeth_fqe *rx_buffer,</div><div class='ctx'>  * that this is in fact a non-EOP buffer.</div><div class='ctx'>  **/</div><div class='ctx'> static bool iavf_is_non_eop(struct iavf_ring *rx_ring,</div><div class='del'>-			    union iavf_rx_desc *rx_desc,</div><div class='del'>-			    struct sk_buff *skb)</div><div class='add'>+			    struct libeth_rqe_info fields)</div><div class='ctx'> {</div><div class='ctx'> 	u32 ntc = rx_ring-&gt;next_to_clean + 1;</div><div class='ctx'> </div><div class='hunk'>@@ -1113,8 +1260,7 @@ static bool iavf_is_non_eop(struct iavf_ring *rx_ring,</div><div class='ctx'> 	prefetch(IAVF_RX_DESC(rx_ring, ntc));</div><div class='ctx'> </div><div class='ctx'> 	/* if we are the last buffer then there is nothing else to do */</div><div class='del'>-#define IAVF_RXD_EOF BIT(IAVF_RX_DESC_STATUS_EOF_SHIFT)</div><div class='del'>-	if (likely(iavf_test_staterr(rx_desc, IAVF_RXD_EOF)))</div><div class='add'>+	if (likely(fields.eop))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	rx_ring-&gt;rx_stats.non_eop_descs++;</div><div class='hunk'>@@ -1123,6 +1269,109 @@ static bool iavf_is_non_eop(struct iavf_ring *rx_ring,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * iavf_extract_legacy_rx_fields - Extract fields from the Rx descriptor</div><div class='add'>+ * @rx_ring: rx descriptor ring</div><div class='add'>+ * @rx_desc: the descriptor to process</div><div class='add'>+ *</div><div class='add'>+ * Decode the Rx descriptor and extract relevant information including the</div><div class='add'>+ * size, VLAN tag, Rx packet type, end of packet field and RXE field value.</div><div class='add'>+ *</div><div class='add'>+ * This function only operates on the VIRTCHNL_RXDID_1_32B_BASE legacy 32byte</div><div class='add'>+ * descriptor writeback format.</div><div class='add'>+ *</div><div class='add'>+ * Return: fields extracted from the Rx descriptor.</div><div class='add'>+ */</div><div class='add'>+static struct libeth_rqe_info</div><div class='add'>+iavf_extract_legacy_rx_fields(const struct iavf_ring *rx_ring,</div><div class='add'>+			      const struct iavf_rx_desc *rx_desc)</div><div class='add'>+{</div><div class='add'>+	u64 qw0 = le64_to_cpu(rx_desc-&gt;qw0);</div><div class='add'>+	u64 qw1 = le64_to_cpu(rx_desc-&gt;qw1);</div><div class='add'>+	u64 qw2 = le64_to_cpu(rx_desc-&gt;qw2);</div><div class='add'>+	struct libeth_rqe_info fields;</div><div class='add'>+	bool l2tag1p, l2tag2p;</div><div class='add'>+</div><div class='add'>+	fields.eop = FIELD_GET(IAVF_RXD_LEGACY_EOP_M, qw1);</div><div class='add'>+	fields.len = FIELD_GET(IAVF_RXD_LEGACY_LENGTH_M, qw1);</div><div class='add'>+</div><div class='add'>+	if (!fields.eop)</div><div class='add'>+		return fields;</div><div class='add'>+</div><div class='add'>+	fields.rxe = FIELD_GET(IAVF_RXD_LEGACY_RXE_M, qw1);</div><div class='add'>+	fields.ptype = FIELD_GET(IAVF_RXD_LEGACY_PTYPE_M, qw1);</div><div class='add'>+	fields.vlan = 0;</div><div class='add'>+</div><div class='add'>+	if (rx_ring-&gt;flags &amp; IAVF_TXRX_FLAGS_VLAN_TAG_LOC_L2TAG1) {</div><div class='add'>+		l2tag1p = FIELD_GET(IAVF_RXD_LEGACY_L2TAG1P_M, qw1);</div><div class='add'>+		if (l2tag1p)</div><div class='add'>+			fields.vlan = FIELD_GET(IAVF_RXD_LEGACY_L2TAG1_M, qw0);</div><div class='add'>+	} else if (rx_ring-&gt;flags &amp; IAVF_RXR_FLAGS_VLAN_TAG_LOC_L2TAG2_2) {</div><div class='add'>+		l2tag2p = FIELD_GET(IAVF_RXD_LEGACY_L2TAG2P_M, qw2);</div><div class='add'>+		if (l2tag2p)</div><div class='add'>+			fields.vlan = FIELD_GET(IAVF_RXD_LEGACY_L2TAG2_M, qw2);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return fields;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_extract_flex_rx_fields - Extract fields from the Rx descriptor</div><div class='add'>+ * @rx_ring: rx descriptor ring</div><div class='add'>+ * @rx_desc: the descriptor to process</div><div class='add'>+ *</div><div class='add'>+ * Decode the Rx descriptor and extract relevant information including the</div><div class='add'>+ * size, VLAN tag, Rx packet type, end of packet field and RXE field value.</div><div class='add'>+ *</div><div class='add'>+ * This function only operates on the VIRTCHNL_RXDID_2_FLEX_SQ_NIC flexible</div><div class='add'>+ * descriptor writeback format.</div><div class='add'>+ *</div><div class='add'>+ * Return: fields extracted from the Rx descriptor.</div><div class='add'>+ */</div><div class='add'>+static struct libeth_rqe_info</div><div class='add'>+iavf_extract_flex_rx_fields(const struct iavf_ring *rx_ring,</div><div class='add'>+			    const struct iavf_rx_desc *rx_desc)</div><div class='add'>+{</div><div class='add'>+	struct libeth_rqe_info fields = {};</div><div class='add'>+	u64 qw0 = le64_to_cpu(rx_desc-&gt;qw0);</div><div class='add'>+	u64 qw1 = le64_to_cpu(rx_desc-&gt;qw1);</div><div class='add'>+	u64 qw2 = le64_to_cpu(rx_desc-&gt;qw2);</div><div class='add'>+	bool l2tag1p, l2tag2p;</div><div class='add'>+</div><div class='add'>+	fields.eop = FIELD_GET(IAVF_RXD_FLEX_EOP_M, qw1);</div><div class='add'>+	fields.len = FIELD_GET(IAVF_RXD_FLEX_PKT_LEN_M, qw0);</div><div class='add'>+</div><div class='add'>+	if (!fields.eop)</div><div class='add'>+		return fields;</div><div class='add'>+</div><div class='add'>+	fields.rxe = FIELD_GET(IAVF_RXD_FLEX_RXE_M, qw1);</div><div class='add'>+	fields.ptype = FIELD_GET(IAVF_RXD_FLEX_PTYPE_M, qw0);</div><div class='add'>+	fields.vlan = 0;</div><div class='add'>+</div><div class='add'>+	if (rx_ring-&gt;flags &amp; IAVF_TXRX_FLAGS_VLAN_TAG_LOC_L2TAG1) {</div><div class='add'>+		l2tag1p = FIELD_GET(IAVF_RXD_FLEX_L2TAG1P_M, qw1);</div><div class='add'>+		if (l2tag1p)</div><div class='add'>+			fields.vlan = FIELD_GET(IAVF_RXD_FLEX_L2TAG1_M, qw1);</div><div class='add'>+	} else if (rx_ring-&gt;flags &amp; IAVF_RXR_FLAGS_VLAN_TAG_LOC_L2TAG2_2) {</div><div class='add'>+		l2tag2p = FIELD_GET(IAVF_RXD_FLEX_L2TAG2P_M, qw2);</div><div class='add'>+		if (l2tag2p)</div><div class='add'>+			fields.vlan = FIELD_GET(IAVF_RXD_FLEX_L2TAG2_2_M, qw2);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return fields;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct libeth_rqe_info</div><div class='add'>+iavf_extract_rx_fields(const struct iavf_ring *rx_ring,</div><div class='add'>+		       const struct iavf_rx_desc *rx_desc,</div><div class='add'>+		       bool flex)</div><div class='add'>+{</div><div class='add'>+	if (flex)</div><div class='add'>+		return iavf_extract_flex_rx_fields(rx_ring, rx_desc);</div><div class='add'>+	else</div><div class='add'>+		return iavf_extract_legacy_rx_fields(rx_ring, rx_desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * iavf_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf</div><div class='ctx'>  * @rx_ring: rx descriptor ring to transact packets on</div><div class='ctx'>  * @budget: Total limit on number of packets to process</div><div class='hunk'>@@ -1136,18 +1385,17 @@ static bool iavf_is_non_eop(struct iavf_ring *rx_ring,</div><div class='ctx'>  **/</div><div class='ctx'> static int iavf_clean_rx_irq(struct iavf_ring *rx_ring, int budget)</div><div class='ctx'> {</div><div class='add'>+	bool flex = rx_ring-&gt;rxdid == VIRTCHNL_RXDID_2_FLEX_SQ_NIC;</div><div class='ctx'> 	unsigned int total_rx_bytes = 0, total_rx_packets = 0;</div><div class='ctx'> 	struct sk_buff *skb = rx_ring-&gt;skb;</div><div class='ctx'> 	u16 cleaned_count = IAVF_DESC_UNUSED(rx_ring);</div><div class='ctx'> 	bool failure = false;</div><div class='ctx'> </div><div class='ctx'> 	while (likely(total_rx_packets &lt; (unsigned int)budget)) {</div><div class='add'>+		struct libeth_rqe_info fields;</div><div class='ctx'> 		struct libeth_fqe *rx_buffer;</div><div class='del'>-		union iavf_rx_desc *rx_desc;</div><div class='del'>-		unsigned int size;</div><div class='del'>-		u16 vlan_tag = 0;</div><div class='del'>-		u8 rx_ptype;</div><div class='del'>-		u64 qword;</div><div class='add'>+		struct iavf_rx_desc *rx_desc;</div><div class='add'>+		u64 qw1;</div><div class='ctx'> </div><div class='ctx'> 		/* return some buffers to hardware, one at a time is too slow */</div><div class='ctx'> 		if (cleaned_count &gt;= IAVF_RX_BUFFER_WRITE) {</div><div class='hunk'>@@ -1158,35 +1406,32 @@ static int iavf_clean_rx_irq(struct iavf_ring *rx_ring, int budget)</div><div class='ctx'> </div><div class='ctx'> 		rx_desc = IAVF_RX_DESC(rx_ring, rx_ring-&gt;next_to_clean);</div><div class='ctx'> </div><div class='del'>-		/* status_error_len will always be zero for unused descriptors</div><div class='del'>-		 * because it's cleared in cleanup, and overlaps with hdr_addr</div><div class='del'>-		 * which is always zero because packet split isn't used, if the</div><div class='del'>-		 * hardware wrote DD then the length will be non-zero</div><div class='del'>-		 */</div><div class='del'>-		qword = le64_to_cpu(rx_desc-&gt;wb.qword1.status_error_len);</div><div class='del'>-</div><div class='ctx'> 		/* This memory barrier is needed to keep us from reading</div><div class='ctx'> 		 * any other fields out of the rx_desc until we have</div><div class='ctx'> 		 * verified the descriptor has been written back.</div><div class='ctx'> 		 */</div><div class='ctx'> 		dma_rmb();</div><div class='del'>-#define IAVF_RXD_DD BIT(IAVF_RX_DESC_STATUS_DD_SHIFT)</div><div class='del'>-		if (!iavf_test_staterr(rx_desc, IAVF_RXD_DD))</div><div class='add'>+</div><div class='add'>+		qw1 = le64_to_cpu(rx_desc-&gt;qw1);</div><div class='add'>+		/* If DD field (descriptor done) is unset then other fields are</div><div class='add'>+		 * not valid</div><div class='add'>+		 */</div><div class='add'>+		if (!iavf_is_descriptor_done(qw1, flex))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		size = FIELD_GET(IAVF_RXD_QW1_LENGTH_PBUF_MASK, qword);</div><div class='add'>+		fields = iavf_extract_rx_fields(rx_ring, rx_desc, flex);</div><div class='ctx'> </div><div class='ctx'> 		iavf_trace(clean_rx_irq, rx_ring, rx_desc, skb);</div><div class='ctx'> </div><div class='ctx'> 		rx_buffer = &amp;rx_ring-&gt;rx_fqes[rx_ring-&gt;next_to_clean];</div><div class='del'>-		if (!libeth_rx_sync_for_cpu(rx_buffer, size))</div><div class='add'>+		if (!libeth_rx_sync_for_cpu(rx_buffer, fields.len))</div><div class='ctx'> 			goto skip_data;</div><div class='ctx'> </div><div class='ctx'> 		/* retrieve a buffer from the ring */</div><div class='ctx'> 		if (skb)</div><div class='del'>-			iavf_add_rx_frag(skb, rx_buffer, size);</div><div class='add'>+			iavf_add_rx_frag(skb, rx_buffer, fields.len);</div><div class='ctx'> 		else</div><div class='del'>-			skb = iavf_build_skb(rx_buffer, size);</div><div class='add'>+			skb = iavf_build_skb(rx_buffer, fields.len);</div><div class='ctx'> </div><div class='ctx'> 		/* exit if we failed to retrieve a buffer */</div><div class='ctx'> 		if (!skb) {</div><div class='hunk'>@@ -1197,15 +1442,14 @@ static int iavf_clean_rx_irq(struct iavf_ring *rx_ring, int budget)</div><div class='ctx'> skip_data:</div><div class='ctx'> 		cleaned_count++;</div><div class='ctx'> </div><div class='del'>-		if (iavf_is_non_eop(rx_ring, rx_desc, skb) || unlikely(!skb))</div><div class='add'>+		if (iavf_is_non_eop(rx_ring, fields) || unlikely(!skb))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		/* ERR_MASK will only have valid bits if EOP set, and</div><div class='del'>-		 * what we are doing here is actually checking</div><div class='del'>-		 * IAVF_RX_DESC_ERROR_RXE_SHIFT, since it is the zeroth bit in</div><div class='del'>-		 * the error field</div><div class='add'>+		/* RXE field in descriptor is an indication of the MAC errors</div><div class='add'>+		 * (like CRC, alignment, oversize etc). If it is set then iavf</div><div class='add'>+		 * should finish.</div><div class='ctx'> 		 */</div><div class='del'>-		if (unlikely(iavf_test_staterr(rx_desc, BIT(IAVF_RXD_QW1_ERROR_SHIFT)))) {</div><div class='add'>+		if (unlikely(fields.rxe)) {</div><div class='ctx'> 			dev_kfree_skb_any(skb);</div><div class='ctx'> 			skb = NULL;</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -1219,22 +1463,11 @@ skip_data:</div><div class='ctx'> 		/* probably a little skewed due to removing CRC */</div><div class='ctx'> 		total_rx_bytes += skb-&gt;len;</div><div class='ctx'> </div><div class='del'>-		qword = le64_to_cpu(rx_desc-&gt;wb.qword1.status_error_len);</div><div class='del'>-		rx_ptype = FIELD_GET(IAVF_RXD_QW1_PTYPE_MASK, qword);</div><div class='del'>-</div><div class='ctx'> 		/* populate checksum, VLAN, and protocol */</div><div class='del'>-		iavf_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);</div><div class='del'>-</div><div class='del'>-		if (qword &amp; BIT(IAVF_RX_DESC_STATUS_L2TAG1P_SHIFT) &amp;&amp;</div><div class='del'>-		    rx_ring-&gt;flags &amp; IAVF_TXRX_FLAGS_VLAN_TAG_LOC_L2TAG1)</div><div class='del'>-			vlan_tag = le16_to_cpu(rx_desc-&gt;wb.qword0.lo_dword.l2tag1);</div><div class='del'>-		if (rx_desc-&gt;wb.qword2.ext_status &amp;</div><div class='del'>-		    cpu_to_le16(BIT(IAVF_RX_DESC_EXT_STATUS_L2TAG2P_SHIFT)) &amp;&amp;</div><div class='del'>-		    rx_ring-&gt;flags &amp; IAVF_RXR_FLAGS_VLAN_TAG_LOC_L2TAG2_2)</div><div class='del'>-			vlan_tag = le16_to_cpu(rx_desc-&gt;wb.qword2.l2tag2_2);</div><div class='add'>+		iavf_process_skb_fields(rx_ring, rx_desc, skb, fields.ptype, flex);</div><div class='ctx'> </div><div class='ctx'> 		iavf_trace(clean_rx_irq_rx, rx_ring, rx_desc, skb);</div><div class='del'>-		iavf_receive_skb(rx_ring, skb, vlan_tag);</div><div class='add'>+		iavf_receive_skb(rx_ring, skb, fields.vlan);</div><div class='ctx'> 		skb = NULL;</div><div class='ctx'> </div><div class='ctx'> 		/* update budget accounting */</div><div class='hunk'>@@ -1417,7 +1650,8 @@ int iavf_napi_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		 * continue to poll, otherwise we must stop polling so the</div><div class='ctx'> 		 * interrupt can move to the correct cpu.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!cpumask_test_cpu(cpu_id, &amp;q_vector-&gt;affinity_mask)) {</div><div class='add'>+		if (!cpumask_test_cpu(cpu_id,</div><div class='add'>+				      &amp;q_vector-&gt;napi.config-&gt;affinity_mask)) {</div><div class='ctx'> 			/* Tell napi that we are done polling */</div><div class='ctx'> 			napi_complete_done(napi, work_done);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_txrx.h b/drivers/net/ethernet/intel/iavf/iavf_txrx.h<br/>index f97c702c0802..df49b0b1d54a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_txrx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_txrx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_txrx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_txrx.h</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> #ifndef _IAVF_TXRX_H_</div><div class='ctx'> #define _IAVF_TXRX_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/net/intel/libie/pctype.h&gt;</div><div class='add'>+</div><div class='ctx'> /* Interrupt Throttling and Rate Limiting Goodies */</div><div class='ctx'> #define IAVF_DEFAULT_IRQ_WORK      256</div><div class='ctx'> </div><div class='hunk'>@@ -59,45 +61,26 @@ enum iavf_dyn_idx_t {</div><div class='ctx'> #define IAVF_PE_ITR    IAVF_IDX_ITR2</div><div class='ctx'> </div><div class='ctx'> /* Supported RSS offloads */</div><div class='del'>-#define IAVF_DEFAULT_RSS_HENA ( \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV4_UDP) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV4_SCTP) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV4_TCP) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV4_OTHER) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_FRAG_IPV4) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV6_UDP) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV6_TCP) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV6_SCTP) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV6_OTHER) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_FRAG_IPV6) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_L2_PAYLOAD))</div><div class='del'>-</div><div class='del'>-#define IAVF_DEFAULT_RSS_HENA_EXPANDED (IAVF_DEFAULT_RSS_HENA | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \</div><div class='del'>-	BIT_ULL(IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))</div><div class='del'>-</div><div class='del'>-#define iavf_rx_desc iavf_32byte_rx_desc</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * iavf_test_staterr - tests bits in Rx descriptor status and error fields</div><div class='del'>- * @rx_desc: pointer to receive descriptor (in le64 format)</div><div class='del'>- * @stat_err_bits: value to mask</div><div class='del'>- *</div><div class='del'>- * This function does some fast chicanery in order to return the</div><div class='del'>- * value of the mask which is really only used for boolean tests.</div><div class='del'>- * The status_error_len doesn't need to be shifted because it begins</div><div class='del'>- * at offset zero.</div><div class='del'>- */</div><div class='del'>-static inline bool iavf_test_staterr(union iavf_rx_desc *rx_desc,</div><div class='del'>-				     const u64 stat_err_bits)</div><div class='del'>-{</div><div class='del'>-	return !!(rx_desc-&gt;wb.qword1.status_error_len &amp;</div><div class='del'>-		  cpu_to_le64(stat_err_bits));</div><div class='del'>-}</div><div class='add'>+#define IAVF_DEFAULT_RSS_HASHCFG ( \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV4) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV6) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_L2_PAYLOAD))</div><div class='add'>+</div><div class='add'>+#define IAVF_DEFAULT_RSS_HASHCFG_EXPANDED (IAVF_DEFAULT_RSS_HASHCFG | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))</div><div class='ctx'> </div><div class='ctx'> /* How many Rx Buffers do we bundle into one write to the hardware ? */</div><div class='ctx'> #define IAVF_RX_INCREMENT(r, i) \</div><div class='hunk'>@@ -262,6 +245,8 @@ struct iavf_ring {</div><div class='ctx'> 	u16 next_to_use;</div><div class='ctx'> 	u16 next_to_clean;</div><div class='ctx'> </div><div class='add'>+	u16 rxdid;		/* Rx descriptor format */</div><div class='add'>+</div><div class='ctx'> 	u16 flags;</div><div class='ctx'> #define IAVF_TXR_FLAGS_WB_ON_ITR		BIT(0)</div><div class='ctx'> #define IAVF_TXR_FLAGS_ARM_WB			BIT(1)</div><div class='hunk'>@@ -269,6 +254,7 @@ struct iavf_ring {</div><div class='ctx'> #define IAVF_TXRX_FLAGS_VLAN_TAG_LOC_L2TAG1	BIT(3)</div><div class='ctx'> #define IAVF_TXR_FLAGS_VLAN_TAG_LOC_L2TAG2	BIT(4)</div><div class='ctx'> #define IAVF_RXR_FLAGS_VLAN_TAG_LOC_L2TAG2_2	BIT(5)</div><div class='add'>+#define IAVF_TXRX_FLAGS_HW_TSTAMP		BIT(6)</div><div class='ctx'> </div><div class='ctx'> 	/* stats structs */</div><div class='ctx'> 	struct iavf_queue_stats	stats;</div><div class='hunk'>@@ -295,6 +281,8 @@ struct iavf_ring {</div><div class='ctx'> 					 * for this ring.</div><div class='ctx'> 					 */</div><div class='ctx'> </div><div class='add'>+	struct iavf_ptp *ptp;</div><div class='add'>+</div><div class='ctx'> 	u32 rx_buf_len;</div><div class='ctx'> 	struct net_shaper q_shaper;</div><div class='ctx'> 	bool q_shaper_update;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_type.h b/drivers/net/ethernet/intel/iavf/iavf_type.h<br/>index f6b09e57abce..1d8cf29cb65a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_type.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_type.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_type.h</a></div><div class='hunk'>@@ -19,7 +19,7 @@</div><div class='ctx'> </div><div class='ctx'> /* forward declaration */</div><div class='ctx'> struct iavf_hw;</div><div class='del'>-typedef void (*IAVF_ADMINQ_CALLBACK)(struct iavf_hw *, struct iavf_aq_desc *);</div><div class='add'>+typedef void (*IAVF_ADMINQ_CALLBACK)(struct iavf_hw *, struct libie_aq_desc *);</div><div class='ctx'> </div><div class='ctx'> /* Data type manipulation macros. */</div><div class='ctx'> </div><div class='hunk'>@@ -178,110 +178,116 @@ struct iavf_hw {</div><div class='ctx'> 	char err_str[16];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* RX Descriptors */</div><div class='del'>-union iavf_16byte_rx_desc {</div><div class='del'>-	struct {</div><div class='del'>-		__le64 pkt_addr; /* Packet buffer address */</div><div class='del'>-		__le64 hdr_addr; /* Header buffer address */</div><div class='del'>-	} read;</div><div class='del'>-	struct {</div><div class='del'>-		struct {</div><div class='del'>-			struct {</div><div class='del'>-				union {</div><div class='del'>-					__le16 mirroring_status;</div><div class='del'>-					__le16 fcoe_ctx_id;</div><div class='del'>-				} mirr_fcoe;</div><div class='del'>-				__le16 l2tag1;</div><div class='del'>-			} lo_dword;</div><div class='del'>-			union {</div><div class='del'>-				__le32 rss; /* RSS Hash */</div><div class='del'>-				__le32 fd_id; /* Flow director filter id */</div><div class='del'>-				__le32 fcoe_param; /* FCoE DDP Context id */</div><div class='del'>-			} hi_dword;</div><div class='del'>-		} qword0;</div><div class='del'>-		struct {</div><div class='del'>-			/* ext status/error/pktype/length */</div><div class='del'>-			__le64 status_error_len;</div><div class='del'>-		} qword1;</div><div class='del'>-	} wb;  /* writeback */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union iavf_32byte_rx_desc {</div><div class='del'>-	struct {</div><div class='del'>-		__le64  pkt_addr; /* Packet buffer address */</div><div class='del'>-		__le64  hdr_addr; /* Header buffer address */</div><div class='del'>-			/* bit 0 of hdr_buffer_addr is DD bit */</div><div class='del'>-		__le64  rsvd1;</div><div class='del'>-		__le64  rsvd2;</div><div class='del'>-	} read;</div><div class='del'>-	struct {</div><div class='del'>-		struct {</div><div class='del'>-			struct {</div><div class='del'>-				union {</div><div class='del'>-					__le16 mirroring_status;</div><div class='del'>-					__le16 fcoe_ctx_id;</div><div class='del'>-				} mirr_fcoe;</div><div class='del'>-				__le16 l2tag1;</div><div class='del'>-			} lo_dword;</div><div class='del'>-			union {</div><div class='del'>-				__le32 rss; /* RSS Hash */</div><div class='del'>-				__le32 fcoe_param; /* FCoE DDP Context id */</div><div class='del'>-				/* Flow director filter id in case of</div><div class='del'>-				 * Programming status desc WB</div><div class='del'>-				 */</div><div class='del'>-				__le32 fd_id;</div><div class='del'>-			} hi_dword;</div><div class='del'>-		} qword0;</div><div class='del'>-		struct {</div><div class='del'>-			/* status/error/pktype/length */</div><div class='del'>-			__le64 status_error_len;</div><div class='del'>-		} qword1;</div><div class='del'>-		struct {</div><div class='del'>-			__le16 ext_status; /* extended status */</div><div class='del'>-			__le16 rsvd;</div><div class='del'>-			__le16 l2tag2_1;</div><div class='del'>-			__le16 l2tag2_2;</div><div class='del'>-		} qword2;</div><div class='del'>-		struct {</div><div class='del'>-			union {</div><div class='del'>-				__le32 flex_bytes_lo;</div><div class='del'>-				__le32 pe_status;</div><div class='del'>-			} lo_dword;</div><div class='del'>-			union {</div><div class='del'>-				__le32 flex_bytes_hi;</div><div class='del'>-				__le32 fd_id;</div><div class='del'>-			} hi_dword;</div><div class='del'>-		} qword3;</div><div class='del'>-	} wb;  /* writeback */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum iavf_rx_desc_status_bits {</div><div class='del'>-	/* Note: These are predefined bit offsets */</div><div class='del'>-	IAVF_RX_DESC_STATUS_DD_SHIFT		= 0,</div><div class='del'>-	IAVF_RX_DESC_STATUS_EOF_SHIFT		= 1,</div><div class='del'>-	IAVF_RX_DESC_STATUS_L2TAG1P_SHIFT	= 2,</div><div class='del'>-	IAVF_RX_DESC_STATUS_L3L4P_SHIFT		= 3,</div><div class='del'>-	IAVF_RX_DESC_STATUS_CRCP_SHIFT		= 4,</div><div class='del'>-	IAVF_RX_DESC_STATUS_TSYNINDX_SHIFT	= 5, /* 2 BITS */</div><div class='del'>-	IAVF_RX_DESC_STATUS_TSYNVALID_SHIFT	= 7,</div><div class='del'>-	/* Note: Bit 8 is reserved in X710 and XL710 */</div><div class='del'>-	IAVF_RX_DESC_STATUS_EXT_UDP_0_SHIFT	= 8,</div><div class='del'>-	IAVF_RX_DESC_STATUS_UMBCAST_SHIFT	= 9, /* 2 BITS */</div><div class='del'>-	IAVF_RX_DESC_STATUS_FLM_SHIFT		= 11,</div><div class='del'>-	IAVF_RX_DESC_STATUS_FLTSTAT_SHIFT	= 12, /* 2 BITS */</div><div class='del'>-	IAVF_RX_DESC_STATUS_LPBK_SHIFT		= 14,</div><div class='del'>-	IAVF_RX_DESC_STATUS_IPV6EXADD_SHIFT	= 15,</div><div class='del'>-	IAVF_RX_DESC_STATUS_RESERVED_SHIFT	= 16, /* 2 BITS */</div><div class='del'>-	/* Note: For non-tunnel packets INT_UDP_0 is the right status for</div><div class='del'>-	 * UDP header</div><div class='del'>-	 */</div><div class='del'>-	IAVF_RX_DESC_STATUS_INT_UDP_0_SHIFT	= 18,</div><div class='del'>-	IAVF_RX_DESC_STATUS_LAST /* this entry must be last!!! */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define IAVF_RXD_QW1_STATUS_SHIFT	0</div><div class='del'>-#define IAVF_RXD_QW1_STATUS_MASK	((BIT(IAVF_RX_DESC_STATUS_LAST) - 1) \</div><div class='del'>-					 &lt;&lt; IAVF_RXD_QW1_STATUS_SHIFT)</div><div class='add'>+/**</div><div class='add'>+ * struct iavf_rx_desc - Receive descriptor (both legacy and flexible)</div><div class='add'>+ * @qw0: quad word 0 fields:</div><div class='add'>+ *	 Legacy: Descriptor Type; Mirror ID; L2TAG1P (S-TAG); Filter Status</div><div class='add'>+ *	 Flex: Descriptor Type; Mirror ID; UMBCAST; Packet Type; Flexible Flags</div><div class='add'>+ *	       Section 0; Packet Length; Header Length; Split Header Flag;</div><div class='add'>+ *	       Flexible Flags section 1 / Extended Status</div><div class='add'>+ * @qw1: quad word 1 fields:</div><div class='add'>+ *	 Legacy: Status Field; Error Field; Packet Type; Packet Length (packet,</div><div class='add'>+ *		 header, Split Header Flag)</div><div class='add'>+ *	 Flex: Status / Error 0 Field; L2TAG1P (S-TAG); Flexible Metadata</div><div class='add'>+ *	       Container #0; Flexible Metadata Container #1</div><div class='add'>+ * @qw2: quad word 2 fields:</div><div class='add'>+ *	 Legacy: Extended Status; 1st L2TAG2P (C-TAG); 2nd L2TAG2P (C-TAG)</div><div class='add'>+ *	 Flex: Status / Error 1 Field; Flexible Flags section 2; Timestamp Low;</div><div class='add'>+ *	       1st L2TAG2 (C-TAG); 2nd L2TAG2 (C-TAG)</div><div class='add'>+ * @qw3: quad word 3 fields:</div><div class='add'>+ *	 Legacy: FD Filter ID / Flexible Bytes</div><div class='add'>+ *	 Flex: Flexible Metadata Container #2; Flexible Metadata Container #3;</div><div class='add'>+ *	       Flexible Metadata Container #4 / Timestamp High 0; Flexible</div><div class='add'>+ *	       Metadata Container #5 / Timestamp High 1;</div><div class='add'>+ */</div><div class='add'>+struct iavf_rx_desc {</div><div class='add'>+	aligned_le64 qw0;</div><div class='add'>+/* The hash signature (RSS) */</div><div class='add'>+#define IAVF_RXD_LEGACY_RSS_M			GENMASK_ULL(63, 32)</div><div class='add'>+/* Stripped C-TAG VLAN from the receive packet */</div><div class='add'>+#define IAVF_RXD_LEGACY_L2TAG1_M		GENMASK_ULL(33, 16)</div><div class='add'>+/* Packet type */</div><div class='add'>+#define IAVF_RXD_FLEX_PTYPE_M			GENMASK_ULL(25, 16)</div><div class='add'>+/* Packet length */</div><div class='add'>+#define IAVF_RXD_FLEX_PKT_LEN_M			GENMASK_ULL(45, 32)</div><div class='add'>+</div><div class='add'>+	aligned_le64 qw1;</div><div class='add'>+/* Descriptor done indication flag. */</div><div class='add'>+#define IAVF_RXD_LEGACY_DD_M			BIT(0)</div><div class='add'>+/* End of packet. Set to 1 if this descriptor is the last one of the packet */</div><div class='add'>+#define IAVF_RXD_LEGACY_EOP_M			BIT(1)</div><div class='add'>+/* L2 TAG 1 presence indication */</div><div class='add'>+#define IAVF_RXD_LEGACY_L2TAG1P_M		BIT(2)</div><div class='add'>+/* Detectable L3 and L4 integrity check is processed by the HW */</div><div class='add'>+#define IAVF_RXD_LEGACY_L3L4P_M			BIT(3)</div><div class='add'>+/* Set when an IPv6 packet contains a Destination Options Header or a Routing</div><div class='add'>+ * Header.</div><div class='add'>+ */</div><div class='add'>+#define IAVF_RXD_LEGACY_IPV6EXADD_M		BIT(15)</div><div class='add'>+/* Receive MAC Errors: CRC; Alignment; Oversize; Undersizes; Length error */</div><div class='add'>+#define IAVF_RXD_LEGACY_RXE_M			BIT(19)</div><div class='add'>+/* Checksum reports:</div><div class='add'>+ * - IPE: IP checksum error</div><div class='add'>+ * - L4E: L4 integrity error</div><div class='add'>+ * - EIPE: External IP header (tunneled packets)</div><div class='add'>+ */</div><div class='add'>+#define IAVF_RXD_LEGACY_IPE_M			BIT(22)</div><div class='add'>+#define IAVF_RXD_LEGACY_L4E_M			BIT(23)</div><div class='add'>+#define IAVF_RXD_LEGACY_EIPE_M			BIT(24)</div><div class='add'>+/* Set for packets that skip checksum calculation in pre-parser */</div><div class='add'>+#define IAVF_RXD_LEGACY_PPRS_M			BIT(26)</div><div class='add'>+/* Indicates the content in the Filter Status field */</div><div class='add'>+#define IAVF_RXD_LEGACY_FLTSTAT_M		GENMASK_ULL(13, 12)</div><div class='add'>+/* Packet type */</div><div class='add'>+#define IAVF_RXD_LEGACY_PTYPE_M			GENMASK_ULL(37, 30)</div><div class='add'>+/* Packet length */</div><div class='add'>+#define IAVF_RXD_LEGACY_LENGTH_M		GENMASK_ULL(51, 38)</div><div class='add'>+/* Descriptor done indication flag */</div><div class='add'>+#define IAVF_RXD_FLEX_DD_M			BIT(0)</div><div class='add'>+/* End of packet. Set to 1 if this descriptor is the last one of the packet */</div><div class='add'>+#define IAVF_RXD_FLEX_EOP_M			BIT(1)</div><div class='add'>+/* Detectable L3 and L4 integrity check is processed by the HW */</div><div class='add'>+#define IAVF_RXD_FLEX_L3L4P_M			BIT(3)</div><div class='add'>+/* Checksum reports:</div><div class='add'>+ * - IPE: IP checksum error</div><div class='add'>+ * - L4E: L4 integrity error</div><div class='add'>+ * - EIPE: External IP header (tunneled packets)</div><div class='add'>+ * - EUDPE: External UDP checksum error (tunneled packets)</div><div class='add'>+ */</div><div class='add'>+#define IAVF_RXD_FLEX_XSUM_IPE_M		BIT(4)</div><div class='add'>+#define IAVF_RXD_FLEX_XSUM_L4E_M		BIT(5)</div><div class='add'>+#define IAVF_RXD_FLEX_XSUM_EIPE_M		BIT(6)</div><div class='add'>+#define IAVF_RXD_FLEX_XSUM_EUDPE_M		BIT(7)</div><div class='add'>+/* Set when an IPv6 packet contains a Destination Options Header or a Routing</div><div class='add'>+ * Header.</div><div class='add'>+ */</div><div class='add'>+#define IAVF_RXD_FLEX_IPV6EXADD_M		BIT(9)</div><div class='add'>+/* Receive MAC Errors: CRC; Alignment; Oversize; Undersizes; Length error */</div><div class='add'>+#define IAVF_RXD_FLEX_RXE_M			BIT(10)</div><div class='add'>+/* Indicates that the RSS/HASH result is valid */</div><div class='add'>+#define IAVF_RXD_FLEX_RSS_VALID_M		BIT(12)</div><div class='add'>+/* L2 TAG 1 presence indication */</div><div class='add'>+#define IAVF_RXD_FLEX_L2TAG1P_M			BIT(13)</div><div class='add'>+/* Stripped L2 Tag from the receive packet */</div><div class='add'>+#define IAVF_RXD_FLEX_L2TAG1_M			GENMASK_ULL(31, 16)</div><div class='add'>+/* The hash signature (RSS) */</div><div class='add'>+#define IAVF_RXD_FLEX_RSS_HASH_M		GENMASK_ULL(63, 32)</div><div class='add'>+</div><div class='add'>+	aligned_le64 qw2;</div><div class='add'>+/* L2 Tag 2 Presence */</div><div class='add'>+#define IAVF_RXD_LEGACY_L2TAG2P_M		BIT(0)</div><div class='add'>+/* Stripped S-TAG VLAN from the receive packet */</div><div class='add'>+#define IAVF_RXD_LEGACY_L2TAG2_M		GENMASK_ULL(63, 32)</div><div class='add'>+/* Stripped S-TAG VLAN from the receive packet */</div><div class='add'>+#define IAVF_RXD_FLEX_L2TAG2_2_M		GENMASK_ULL(63, 48)</div><div class='add'>+/* The packet is a UDP tunneled packet */</div><div class='add'>+#define IAVF_RXD_FLEX_NAT_M			BIT(4)</div><div class='add'>+/* L2 Tag 2 Presence */</div><div class='add'>+#define IAVF_RXD_FLEX_L2TAG2P_M			BIT(11)</div><div class='add'>+	aligned_le64 qw3;</div><div class='add'>+#define IAVF_RXD_FLEX_QW3_TSTAMP_HIGH_M		GENMASK_ULL(63, 32)</div><div class='add'>+} __aligned(4 * sizeof(__le64));</div><div class='add'>+static_assert(sizeof(struct iavf_rx_desc) == 32);</div><div class='ctx'> </div><div class='ctx'> #define IAVF_RXD_QW1_STATUS_TSYNINDX_SHIFT IAVF_RX_DESC_STATUS_TSYNINDX_SHIFT</div><div class='ctx'> #define IAVF_RXD_QW1_STATUS_TSYNINDX_MASK  (0x3UL &lt;&lt; \</div><div class='hunk'>@@ -298,22 +304,6 @@ enum iavf_rx_desc_fltstat_values {</div><div class='ctx'> 	IAVF_RX_DESC_FLTSTAT_RSS_HASH	= 3,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define IAVF_RXD_QW1_ERROR_SHIFT	19</div><div class='del'>-#define IAVF_RXD_QW1_ERROR_MASK		(0xFFUL &lt;&lt; IAVF_RXD_QW1_ERROR_SHIFT)</div><div class='del'>-</div><div class='del'>-enum iavf_rx_desc_error_bits {</div><div class='del'>-	/* Note: These are predefined bit offsets */</div><div class='del'>-	IAVF_RX_DESC_ERROR_RXE_SHIFT		= 0,</div><div class='del'>-	IAVF_RX_DESC_ERROR_RECIPE_SHIFT		= 1,</div><div class='del'>-	IAVF_RX_DESC_ERROR_HBO_SHIFT		= 2,</div><div class='del'>-	IAVF_RX_DESC_ERROR_L3L4E_SHIFT		= 3, /* 3 BITS */</div><div class='del'>-	IAVF_RX_DESC_ERROR_IPE_SHIFT		= 3,</div><div class='del'>-	IAVF_RX_DESC_ERROR_L4E_SHIFT		= 4,</div><div class='del'>-	IAVF_RX_DESC_ERROR_EIPE_SHIFT		= 5,</div><div class='del'>-	IAVF_RX_DESC_ERROR_OVERSIZE_SHIFT	= 6,</div><div class='del'>-	IAVF_RX_DESC_ERROR_PPRS_SHIFT		= 7</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum iavf_rx_desc_error_l3l4e_fcoe_masks {</div><div class='ctx'> 	IAVF_RX_DESC_ERROR_L3L4E_NONE		= 0,</div><div class='ctx'> 	IAVF_RX_DESC_ERROR_L3L4E_PROT		= 1,</div><div class='hunk'>@@ -322,13 +312,6 @@ enum iavf_rx_desc_error_l3l4e_fcoe_masks {</div><div class='ctx'> 	IAVF_RX_DESC_ERROR_L3L4E_DMAC_WARN	= 4</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define IAVF_RXD_QW1_PTYPE_SHIFT	30</div><div class='del'>-#define IAVF_RXD_QW1_PTYPE_MASK		(0xFFULL &lt;&lt; IAVF_RXD_QW1_PTYPE_SHIFT)</div><div class='del'>-</div><div class='del'>-#define IAVF_RXD_QW1_LENGTH_PBUF_SHIFT	38</div><div class='del'>-#define IAVF_RXD_QW1_LENGTH_PBUF_MASK	(0x3FFFULL &lt;&lt; \</div><div class='del'>-					 IAVF_RXD_QW1_LENGTH_PBUF_SHIFT)</div><div class='del'>-</div><div class='ctx'> #define IAVF_RXD_QW1_LENGTH_HBUF_SHIFT	52</div><div class='ctx'> #define IAVF_RXD_QW1_LENGTH_HBUF_MASK	(0x7FFULL &lt;&lt; \</div><div class='ctx'> 					 IAVF_RXD_QW1_LENGTH_HBUF_SHIFT)</div><div class='hunk'>@@ -347,6 +330,8 @@ enum iavf_rx_desc_ext_status_bits {</div><div class='ctx'> 	IAVF_RX_DESC_EXT_STATUS_PELONGB_SHIFT	= 11,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define IAVF_RX_DESC_EXT_STATUS_L2TAG2P_M	BIT(IAVF_RX_DESC_EXT_STATUS_L2TAG2P_SHIFT)</div><div class='add'>+</div><div class='ctx'> enum iavf_rx_desc_pe_status_bits {</div><div class='ctx'> 	/* Note: These are predefined bit offsets */</div><div class='ctx'> 	IAVF_RX_DESC_PE_STATUS_QPID_SHIFT	= 0, /* 18 BITS */</div><div class='hunk'>@@ -478,38 +463,6 @@ enum iavf_tx_ctx_desc_cmd_bits {</div><div class='ctx'> 	IAVF_TX_CTX_DESC_SWPE		= 0x40</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Packet Classifier Types for filters */</div><div class='del'>-enum iavf_filter_pctype {</div><div class='del'>-	/* Note: Values 0-28 are reserved for future use.</div><div class='del'>-	 * Value 29, 30, 32 are not supported on XL710 and X710.</div><div class='del'>-	 */</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP	= 29,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP	= 30,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_IPV4_UDP		= 31,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK	= 32,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_IPV4_TCP		= 33,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_IPV4_SCTP		= 34,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_IPV4_OTHER		= 35,</div><div class='del'>-	IAVF_FILTER_PCTYPE_FRAG_IPV4			= 36,</div><div class='del'>-	/* Note: Values 37-38 are reserved for future use.</div><div class='del'>-	 * Value 39, 40, 42 are not supported on XL710 and X710.</div><div class='del'>-	 */</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP	= 39,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP	= 40,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_IPV6_UDP		= 41,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK	= 42,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_IPV6_TCP		= 43,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_IPV6_SCTP		= 44,</div><div class='del'>-	IAVF_FILTER_PCTYPE_NONF_IPV6_OTHER		= 45,</div><div class='del'>-	IAVF_FILTER_PCTYPE_FRAG_IPV6			= 46,</div><div class='del'>-	/* Note: Value 47 is reserved for future use */</div><div class='del'>-	IAVF_FILTER_PCTYPE_FCOE_OX			= 48,</div><div class='del'>-	IAVF_FILTER_PCTYPE_FCOE_RX			= 49,</div><div class='del'>-	IAVF_FILTER_PCTYPE_FCOE_OTHER			= 50,</div><div class='del'>-	/* Note: Values 51-62 are reserved for future use */</div><div class='del'>-	IAVF_FILTER_PCTYPE_L2_PAYLOAD			= 63,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define IAVF_TXD_CTX_QW1_TSO_LEN_SHIFT	30</div><div class='ctx'> #define IAVF_TXD_CTX_QW1_TSO_LEN_MASK	(0x3FFFFULL &lt;&lt; \</div><div class='ctx'> 					 IAVF_TXD_CTX_QW1_TSO_LEN_SHIFT)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_types.h b/drivers/net/ethernet/intel/iavf/iavf_types.h<br/>new file mode 100644<br/>index 000000000000..a095855122bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_types.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_types.h</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _IAVF_TYPES_H_</div><div class='add'>+#define _IAVF_TYPES_H_</div><div class='add'>+</div><div class='add'>+#include "iavf_types.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/avf/virtchnl.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+</div><div class='add'>+/* structure used to queue PTP commands for processing */</div><div class='add'>+struct iavf_ptp_aq_cmd {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	enum virtchnl_ops v_opcode:16;</div><div class='add'>+	u16 msglen;</div><div class='add'>+	u8 msg[] __counted_by(msglen);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct iavf_ptp {</div><div class='add'>+	wait_queue_head_t phc_time_waitqueue;</div><div class='add'>+	struct virtchnl_ptp_caps hw_caps;</div><div class='add'>+	struct ptp_clock_info info;</div><div class='add'>+	struct ptp_clock *clock;</div><div class='add'>+	struct list_head aq_cmds;</div><div class='add'>+	u64 cached_phc_time;</div><div class='add'>+	unsigned long cached_phc_updated;</div><div class='add'>+	/* Lock protecting access to the AQ command list */</div><div class='add'>+	struct mutex aq_cmd_lock;</div><div class='add'>+	struct kernel_hwtstamp_config hwtstamp_config;</div><div class='add'>+	bool phc_time_ready:1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _IAVF_TYPES_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c b/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c<br/>index 15d388b431c5..88156082a41d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/iavf/iavf_virtchnl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/iavf/iavf_virtchnl.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;linux/net/intel/libie/rx.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "iavf.h"</div><div class='add'>+#include "iavf_ptp.h"</div><div class='ctx'> #include "iavf_prototype.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -28,7 +29,7 @@ static int iavf_send_pf_msg(struct iavf_adapter *adapter,</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		dev_dbg(&amp;adapter-&gt;pdev-&gt;dev, "Unable to send opcode %d to PF, status %s, aq_err %s\n",</div><div class='ctx'> 			op, iavf_stat_str(hw, status),</div><div class='del'>-			iavf_aq_str(hw, hw-&gt;aq.asq_last_status));</div><div class='add'>+			libie_aq_str(hw-&gt;aq.asq_last_status));</div><div class='ctx'> 	return iavf_status_to_errno(status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -78,6 +79,23 @@ iavf_poll_virtchnl_msg(struct iavf_hw *hw, struct iavf_arq_event_info *event,</div><div class='ctx'> 			return iavf_status_to_errno(status);</div><div class='ctx'> 		received_op =</div><div class='ctx'> 		    (enum virtchnl_ops)le32_to_cpu(event-&gt;desc.cookie_high);</div><div class='add'>+</div><div class='add'>+		if (received_op == VIRTCHNL_OP_EVENT) {</div><div class='add'>+			struct iavf_adapter *adapter = hw-&gt;back;</div><div class='add'>+			struct virtchnl_pf_event *vpe =</div><div class='add'>+				(struct virtchnl_pf_event *)event-&gt;msg_buf;</div><div class='add'>+</div><div class='add'>+			if (vpe-&gt;event != VIRTCHNL_EVENT_RESET_IMPENDING)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			dev_info(&amp;adapter-&gt;pdev-&gt;dev, "Reset indication received from the PF\n");</div><div class='add'>+			if (!(adapter-&gt;flags &amp; IAVF_FLAG_RESET_PENDING))</div><div class='add'>+				iavf_schedule_reset(adapter,</div><div class='add'>+						    IAVF_FLAG_RESET_PENDING);</div><div class='add'>+</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (op_to_poll == received_op)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -144,9 +162,11 @@ int iavf_send_vf_config_msg(struct iavf_adapter *adapter)</div><div class='ctx'> 	       VIRTCHNL_VF_OFFLOAD_ENCAP |</div><div class='ctx'> 	       VIRTCHNL_VF_OFFLOAD_TC_U32 |</div><div class='ctx'> 	       VIRTCHNL_VF_OFFLOAD_VLAN_V2 |</div><div class='add'>+	       VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC |</div><div class='ctx'> 	       VIRTCHNL_VF_OFFLOAD_CRC |</div><div class='ctx'> 	       VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM |</div><div class='ctx'> 	       VIRTCHNL_VF_OFFLOAD_REQ_QUEUES |</div><div class='add'>+	       VIRTCHNL_VF_CAP_PTP |</div><div class='ctx'> 	       VIRTCHNL_VF_OFFLOAD_ADQ |</div><div class='ctx'> 	       VIRTCHNL_VF_OFFLOAD_USO |</div><div class='ctx'> 	       VIRTCHNL_VF_OFFLOAD_FDIR_PF |</div><div class='hunk'>@@ -177,6 +197,54 @@ int iavf_send_vf_offload_vlan_v2_msg(struct iavf_adapter *adapter)</div><div class='ctx'> 				NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int iavf_send_vf_supported_rxdids_msg(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_GET_SUPPORTED_RXDIDS;</div><div class='add'>+</div><div class='add'>+	if (!IAVF_RXDID_ALLOWED(adapter))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;current_op = VIRTCHNL_OP_GET_SUPPORTED_RXDIDS;</div><div class='add'>+</div><div class='add'>+	return iavf_send_pf_msg(adapter, VIRTCHNL_OP_GET_SUPPORTED_RXDIDS,</div><div class='add'>+				NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * iavf_send_vf_ptp_caps_msg - Send request for PTP capabilities</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Send the VIRTCHNL_OP_1588_PTP_GET_CAPS command to the PF to request the PTP</div><div class='add'>+ * capabilities available to this device. This includes the following</div><div class='add'>+ * potential access:</div><div class='add'>+ *</div><div class='add'>+ * * READ_PHC - access to read the PTP hardware clock time</div><div class='add'>+ * * RX_TSTAMP - access to request Rx timestamps on all received packets</div><div class='add'>+ *</div><div class='add'>+ * The PF will reply with the same opcode a filled out copy of the</div><div class='add'>+ * virtchnl_ptp_caps structure which defines the specifics of which features</div><div class='add'>+ * are accessible to this device.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if success, error code otherwise.</div><div class='add'>+ */</div><div class='add'>+int iavf_send_vf_ptp_caps_msg(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl_ptp_caps hw_caps = {</div><div class='add'>+		.caps = VIRTCHNL_1588_PTP_CAP_READ_PHC |</div><div class='add'>+			VIRTCHNL_1588_PTP_CAP_RX_TSTAMP</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_GET_PTP_CAPS;</div><div class='add'>+</div><div class='add'>+	if (!IAVF_PTP_ALLOWED(adapter))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;current_op = VIRTCHNL_OP_1588_PTP_GET_CAPS;</div><div class='add'>+</div><div class='add'>+	return iavf_send_pf_msg(adapter, VIRTCHNL_OP_1588_PTP_GET_CAPS,</div><div class='add'>+				(u8 *)&amp;hw_caps, sizeof(hw_caps));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * iavf_validate_num_queues</div><div class='ctx'>  * @adapter: adapter structure</div><div class='hunk'>@@ -263,6 +331,40 @@ int iavf_get_vf_vlan_v2_caps(struct iavf_adapter *adapter)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int iavf_get_vf_supported_rxdids(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct iavf_arq_event_info event;</div><div class='add'>+	u64 rxdids;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	event.msg_buf = (u8 *)&amp;rxdids;</div><div class='add'>+	event.buf_len = sizeof(rxdids);</div><div class='add'>+</div><div class='add'>+	err = iavf_poll_virtchnl_msg(&amp;adapter-&gt;hw, &amp;event,</div><div class='add'>+				     VIRTCHNL_OP_GET_SUPPORTED_RXDIDS);</div><div class='add'>+	if (!err)</div><div class='add'>+		adapter-&gt;supp_rxdids = rxdids;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int iavf_get_vf_ptp_caps(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl_ptp_caps caps = {};</div><div class='add'>+	struct iavf_arq_event_info event;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	event.msg_buf = (u8 *)&amp;caps;</div><div class='add'>+	event.buf_len = sizeof(caps);</div><div class='add'>+</div><div class='add'>+	err = iavf_poll_virtchnl_msg(&amp;adapter-&gt;hw, &amp;event,</div><div class='add'>+				     VIRTCHNL_OP_1588_PTP_GET_CAPS);</div><div class='add'>+	if (!err)</div><div class='add'>+		adapter-&gt;ptp.hw_caps = caps;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * iavf_configure_queues</div><div class='ctx'>  * @adapter: adapter structure</div><div class='hunk'>@@ -275,6 +377,7 @@ void iavf_configure_queues(struct iavf_adapter *adapter)</div><div class='ctx'> 	int pairs = adapter-&gt;num_active_queues;</div><div class='ctx'> 	struct virtchnl_queue_pair_info *vqpi;</div><div class='ctx'> 	u32 i, max_frame;</div><div class='add'>+	u8 rx_flags = 0;</div><div class='ctx'> 	size_t len;</div><div class='ctx'> </div><div class='ctx'> 	max_frame = LIBIE_MAX_RX_FRM_LEN(adapter-&gt;rx_rings-&gt;pp-&gt;p.offset);</div><div class='hunk'>@@ -292,6 +395,9 @@ void iavf_configure_queues(struct iavf_adapter *adapter)</div><div class='ctx'> 	if (!vqci)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (iavf_ptp_cap_supported(adapter, VIRTCHNL_1588_PTP_CAP_RX_TSTAMP))</div><div class='add'>+		rx_flags |= VIRTCHNL_PTP_RX_TSTAMP;</div><div class='add'>+</div><div class='ctx'> 	vqci-&gt;vsi_id = adapter-&gt;vsi_res-&gt;vsi_id;</div><div class='ctx'> 	vqci-&gt;num_queue_pairs = pairs;</div><div class='ctx'> 	vqpi = vqci-&gt;qpair;</div><div class='hunk'>@@ -309,9 +415,12 @@ void iavf_configure_queues(struct iavf_adapter *adapter)</div><div class='ctx'> 		vqpi-&gt;rxq.dma_ring_addr = adapter-&gt;rx_rings[i].dma;</div><div class='ctx'> 		vqpi-&gt;rxq.max_pkt_size = max_frame;</div><div class='ctx'> 		vqpi-&gt;rxq.databuffer_size = adapter-&gt;rx_rings[i].rx_buf_len;</div><div class='add'>+		if (IAVF_RXDID_ALLOWED(adapter))</div><div class='add'>+			vqpi-&gt;rxq.rxdid = adapter-&gt;rxdid;</div><div class='ctx'> 		if (CRC_OFFLOAD_ALLOWED(adapter))</div><div class='ctx'> 			vqpi-&gt;rxq.crc_disable = !!(adapter-&gt;netdev-&gt;features &amp;</div><div class='ctx'> 						   NETIF_F_RXFCS);</div><div class='add'>+		vqpi-&gt;rxq.flags = rx_flags;</div><div class='ctx'> 		vqpi++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -684,7 +793,8 @@ void iavf_add_vlans(struct iavf_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		len = virtchnl_struct_size(vvfl, vlan_id, count);</div><div class='ctx'> 		if (len &gt; IAVF_MAX_AQ_BUF_SIZE) {</div><div class='del'>-			dev_warn(&amp;adapter-&gt;pdev-&gt;dev, "Too many add VLAN changes in one request\n");</div><div class='add'>+			dev_info(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				 "virtchnl: Too many VLAN add (v1) requests; splitting into multiple messages to PF\n");</div><div class='ctx'> 			while (len &gt; IAVF_MAX_AQ_BUF_SIZE)</div><div class='ctx'> 				len = virtchnl_struct_size(vvfl, vlan_id,</div><div class='ctx'> 							   --count);</div><div class='hunk'>@@ -729,7 +839,8 @@ void iavf_add_vlans(struct iavf_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		len = virtchnl_struct_size(vvfl_v2, filters, count);</div><div class='ctx'> 		if (len &gt; IAVF_MAX_AQ_BUF_SIZE) {</div><div class='del'>-			dev_warn(&amp;adapter-&gt;pdev-&gt;dev, "Too many add VLAN changes in one request\n");</div><div class='add'>+			dev_info(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				 "virtchnl: Too many VLAN add (v2) requests; splitting into multiple messages to PF\n");</div><div class='ctx'> 			while (len &gt; IAVF_MAX_AQ_BUF_SIZE)</div><div class='ctx'> 				len = virtchnl_struct_size(vvfl_v2, filters,</div><div class='ctx'> 							   --count);</div><div class='hunk'>@@ -832,7 +943,8 @@ void iavf_del_vlans(struct iavf_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		len = virtchnl_struct_size(vvfl, vlan_id, count);</div><div class='ctx'> 		if (len &gt; IAVF_MAX_AQ_BUF_SIZE) {</div><div class='del'>-			dev_warn(&amp;adapter-&gt;pdev-&gt;dev, "Too many delete VLAN changes in one request\n");</div><div class='add'>+			dev_info(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				 "virtchnl: Too many VLAN delete (v1) requests; splitting into multiple messages to PF\n");</div><div class='ctx'> 			while (len &gt; IAVF_MAX_AQ_BUF_SIZE)</div><div class='ctx'> 				len = virtchnl_struct_size(vvfl, vlan_id,</div><div class='ctx'> 							   --count);</div><div class='hunk'>@@ -878,7 +990,8 @@ void iavf_del_vlans(struct iavf_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		len = virtchnl_struct_size(vvfl_v2, filters, count);</div><div class='ctx'> 		if (len &gt; IAVF_MAX_AQ_BUF_SIZE) {</div><div class='del'>-			dev_warn(&amp;adapter-&gt;pdev-&gt;dev, "Too many add VLAN changes in one request\n");</div><div class='add'>+			dev_info(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				 "virtchnl: Too many VLAN delete (v2) requests; splitting into multiple messages to PF\n");</div><div class='ctx'> 			while (len &gt; IAVF_MAX_AQ_BUF_SIZE)</div><div class='ctx'> 				len = virtchnl_struct_size(vvfl_v2, filters,</div><div class='ctx'> 							   --count);</div><div class='hunk'>@@ -1036,12 +1149,12 @@ void iavf_request_stats(struct iavf_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * iavf_get_hena</div><div class='add'>+ * iavf_get_rss_hashcfg</div><div class='ctx'>  * @adapter: adapter structure</div><div class='ctx'>  *</div><div class='del'>- * Request hash enable capabilities from PF</div><div class='add'>+ * Request RSS Hash enable bits from PF</div><div class='ctx'>  **/</div><div class='del'>-void iavf_get_hena(struct iavf_adapter *adapter)</div><div class='add'>+void iavf_get_rss_hashcfg(struct iavf_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	if (adapter-&gt;current_op != VIRTCHNL_OP_UNKNOWN) {</div><div class='ctx'> 		/* bail because we already have a command pending */</div><div class='hunk'>@@ -1049,20 +1162,20 @@ void iavf_get_hena(struct iavf_adapter *adapter)</div><div class='ctx'> 			adapter-&gt;current_op);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	adapter-&gt;current_op = VIRTCHNL_OP_GET_RSS_HENA_CAPS;</div><div class='del'>-	adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_GET_HENA;</div><div class='del'>-	iavf_send_pf_msg(adapter, VIRTCHNL_OP_GET_RSS_HENA_CAPS, NULL, 0);</div><div class='add'>+	adapter-&gt;current_op = VIRTCHNL_OP_GET_RSS_HASHCFG_CAPS;</div><div class='add'>+	adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_GET_RSS_HASHCFG;</div><div class='add'>+	iavf_send_pf_msg(adapter, VIRTCHNL_OP_GET_RSS_HASHCFG_CAPS, NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * iavf_set_hena</div><div class='add'>+ * iavf_set_rss_hashcfg</div><div class='ctx'>  * @adapter: adapter structure</div><div class='ctx'>  *</div><div class='ctx'>  * Request the PF to set our RSS hash capabilities</div><div class='ctx'>  **/</div><div class='del'>-void iavf_set_hena(struct iavf_adapter *adapter)</div><div class='add'>+void iavf_set_rss_hashcfg(struct iavf_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	struct virtchnl_rss_hena vrh;</div><div class='add'>+	struct virtchnl_rss_hashcfg vrh;</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;current_op != VIRTCHNL_OP_UNKNOWN) {</div><div class='ctx'> 		/* bail because we already have a command pending */</div><div class='hunk'>@@ -1070,10 +1183,10 @@ void iavf_set_hena(struct iavf_adapter *adapter)</div><div class='ctx'> 			adapter-&gt;current_op);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	vrh.hena = adapter-&gt;hena;</div><div class='del'>-	adapter-&gt;current_op = VIRTCHNL_OP_SET_RSS_HENA;</div><div class='del'>-	adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_SET_HENA;</div><div class='del'>-	iavf_send_pf_msg(adapter, VIRTCHNL_OP_SET_RSS_HENA, (u8 *)&amp;vrh,</div><div class='add'>+	vrh.hashcfg = adapter-&gt;rss_hashcfg;</div><div class='add'>+	adapter-&gt;current_op = VIRTCHNL_OP_SET_RSS_HASHCFG;</div><div class='add'>+	adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_SET_RSS_HASHCFG;</div><div class='add'>+	iavf_send_pf_msg(adapter, VIRTCHNL_OP_SET_RSS_HASHCFG, (u8 *)&amp;vrh,</div><div class='ctx'> 			 sizeof(vrh));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1402,6 +1515,67 @@ void iavf_disable_vlan_insertion_v2(struct iavf_adapter *adapter, u16 tpid)</div><div class='ctx'> 				  VIRTCHNL_OP_DISABLE_VLAN_INSERTION_V2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+/**</div><div class='add'>+ * iavf_virtchnl_send_ptp_cmd - Send one queued PTP command</div><div class='add'>+ * @adapter: adapter private structure</div><div class='add'>+ *</div><div class='add'>+ * De-queue one PTP command request and send the command message to the PF.</div><div class='add'>+ * Clear IAVF_FLAG_AQ_SEND_PTP_CMD if no more messages are left to send.</div><div class='add'>+ */</div><div class='add'>+void iavf_virtchnl_send_ptp_cmd(struct iavf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct iavf_ptp_aq_cmd *cmd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!adapter-&gt;ptp.clock) {</div><div class='add'>+		/* This shouldn't be possible to hit, since no messages should</div><div class='add'>+		 * be queued if PTP is not initialized.</div><div class='add'>+		 */</div><div class='add'>+		pci_err(adapter-&gt;pdev, "PTP is not initialized\n");</div><div class='add'>+		adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_SEND_PTP_CMD;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;adapter-&gt;ptp.aq_cmd_lock);</div><div class='add'>+	cmd = list_first_entry_or_null(&amp;adapter-&gt;ptp.aq_cmds,</div><div class='add'>+				       struct iavf_ptp_aq_cmd, list);</div><div class='add'>+	if (!cmd) {</div><div class='add'>+		/* no further PTP messages to send */</div><div class='add'>+		adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_SEND_PTP_CMD;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;current_op != VIRTCHNL_OP_UNKNOWN) {</div><div class='add'>+		/* bail because we already have a command pending */</div><div class='add'>+		pci_err(adapter-&gt;pdev,</div><div class='add'>+			"Cannot send PTP command %d, command %d pending\n",</div><div class='add'>+			cmd-&gt;v_opcode, adapter-&gt;current_op);</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = iavf_send_pf_msg(adapter, cmd-&gt;v_opcode, cmd-&gt;msg, cmd-&gt;msglen);</div><div class='add'>+	if (!err) {</div><div class='add'>+		/* Command was sent without errors, so we can remove it from</div><div class='add'>+		 * the list and discard it.</div><div class='add'>+		 */</div><div class='add'>+		list_del(&amp;cmd-&gt;list);</div><div class='add'>+		kfree(cmd);</div><div class='add'>+	} else {</div><div class='add'>+		/* We failed to send the command, try again next cycle */</div><div class='add'>+		pci_err(adapter-&gt;pdev, "Failed to send PTP command %d\n",</div><div class='add'>+			cmd-&gt;v_opcode);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;adapter-&gt;ptp.aq_cmds))</div><div class='add'>+		/* no further PTP messages to send */</div><div class='add'>+		adapter-&gt;aq_required &amp;= ~IAVF_FLAG_AQ_SEND_PTP_CMD;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;adapter-&gt;ptp.aq_cmd_lock);</div><div class='add'>+}</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * iavf_print_link_message - print link up or down</div><div class='ctx'>  * @adapter: adapter structure</div><div class='hunk'>@@ -2098,6 +2272,37 @@ static void iavf_activate_fdir_filters(struct iavf_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * iavf_virtchnl_ptp_get_time - Respond to VIRTCHNL_OP_1588_PTP_GET_TIME</div><div class='add'>+ * @adapter: private adapter structure</div><div class='add'>+ * @data: the message from the PF</div><div class='add'>+ * @len: length of the message from the PF</div><div class='add'>+ *</div><div class='add'>+ * Handle the VIRTCHNL_OP_1588_PTP_GET_TIME message from the PF. This message</div><div class='add'>+ * is sent by the PF in response to the same op as a request from the VF.</div><div class='add'>+ * Extract the 64bit nanoseconds time from the message and store it in</div><div class='add'>+ * cached_phc_time. Then, notify any thread that is waiting for the update via</div><div class='add'>+ * the wait queue.</div><div class='add'>+ */</div><div class='add'>+static void iavf_virtchnl_ptp_get_time(struct iavf_adapter *adapter,</div><div class='add'>+				       void *data, u16 len)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl_phc_time *msg = data;</div><div class='add'>+</div><div class='add'>+	if (len != sizeof(*msg)) {</div><div class='add'>+		dev_err_once(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+			     "Invalid VIRTCHNL_OP_1588_PTP_GET_TIME from PF. Got size %u, expected %zu\n",</div><div class='add'>+			     len, sizeof(*msg));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adapter-&gt;ptp.cached_phc_time = msg-&gt;time;</div><div class='add'>+	adapter-&gt;ptp.cached_phc_updated = jiffies;</div><div class='add'>+	adapter-&gt;ptp.phc_time_ready = true;</div><div class='add'>+</div><div class='add'>+	wake_up(&amp;adapter-&gt;ptp.phc_time_waitqueue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * iavf_virtchnl_completion</div><div class='ctx'>  * @adapter: adapter structure</div><div class='ctx'>  * @v_opcode: opcode sent by PF</div><div class='hunk'>@@ -2509,6 +2714,25 @@ void iavf_virtchnl_completion(struct iavf_adapter *adapter,</div><div class='ctx'> 			aq_required;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case VIRTCHNL_OP_GET_SUPPORTED_RXDIDS:</div><div class='add'>+		if (msglen != sizeof(u64))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		adapter-&gt;supp_rxdids = *(u64 *)msg;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case VIRTCHNL_OP_1588_PTP_GET_CAPS:</div><div class='add'>+		if (msglen != sizeof(adapter-&gt;ptp.hw_caps))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		adapter-&gt;ptp.hw_caps = *(struct virtchnl_ptp_caps *)msg;</div><div class='add'>+</div><div class='add'>+		/* process any state change needed due to new capabilities */</div><div class='add'>+		iavf_ptp_process_caps(adapter);</div><div class='add'>+		break;</div><div class='add'>+	case VIRTCHNL_OP_1588_PTP_GET_TIME:</div><div class='add'>+		iavf_virtchnl_ptp_get_time(adapter, msg, msglen);</div><div class='add'>+		break;</div><div class='ctx'> 	case VIRTCHNL_OP_ENABLE_QUEUES:</div><div class='ctx'> 		/* enable transmits */</div><div class='ctx'> 		iavf_irq_enable(adapter, true);</div><div class='hunk'>@@ -2532,11 +2756,12 @@ void iavf_virtchnl_completion(struct iavf_adapter *adapter,</div><div class='ctx'> 		if (v_opcode != adapter-&gt;current_op)</div><div class='ctx'> 			return;</div><div class='ctx'> 		break;</div><div class='del'>-	case VIRTCHNL_OP_GET_RSS_HENA_CAPS: {</div><div class='del'>-		struct virtchnl_rss_hena *vrh = (struct virtchnl_rss_hena *)msg;</div><div class='add'>+	case VIRTCHNL_OP_GET_RSS_HASHCFG_CAPS: {</div><div class='add'>+		struct virtchnl_rss_hashcfg *vrh =</div><div class='add'>+			(struct virtchnl_rss_hashcfg *)msg;</div><div class='ctx'> </div><div class='ctx'> 		if (msglen == sizeof(*vrh))</div><div class='del'>-			adapter-&gt;hena = vrh-&gt;hena;</div><div class='add'>+			adapter-&gt;rss_hashcfg = vrh-&gt;hashcfg;</div><div class='ctx'> 		else</div><div class='ctx'> 			dev_warn(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='ctx'> 				 "Invalid message %d from PF\n", v_opcode);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/Makefile b/drivers/net/ethernet/intel/ice/Makefile<br/>index 3307d551f431..5b2c666496e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/Makefile</a></div><div class='hunk'>@@ -32,7 +32,8 @@ ice-y := ice_main.o	\</div><div class='ctx'> 	 ice_parser_rt.o \</div><div class='ctx'> 	 ice_idc.o	\</div><div class='ctx'> 	 devlink/devlink.o	\</div><div class='del'>-	 devlink/devlink_port.o \</div><div class='add'>+	 devlink/health.o \</div><div class='add'>+	 devlink/port.o \</div><div class='ctx'> 	 ice_sf_eth.o	\</div><div class='ctx'> 	 ice_sf_vsi_vlan_ops.o \</div><div class='ctx'> 	 ice_ddp.o	\</div><div class='hunk'>@@ -41,18 +42,19 @@ ice-y := ice_main.o	\</div><div class='ctx'> 	 ice_ethtool.o  \</div><div class='ctx'> 	 ice_repr.o	\</div><div class='ctx'> 	 ice_tc_lib.o	\</div><div class='del'>-	 ice_fwlog.o	\</div><div class='ctx'> 	 ice_debugfs.o  \</div><div class='ctx'> 	 ice_adapter.o</div><div class='ctx'> ice-$(CONFIG_PCI_IOV) +=	\</div><div class='ctx'> 	ice_sriov.o		\</div><div class='del'>-	ice_virtchnl.o		\</div><div class='del'>-	ice_virtchnl_allowlist.o \</div><div class='del'>-	ice_virtchnl_fdir.o	\</div><div class='add'>+	virt/allowlist.o	\</div><div class='add'>+	virt/fdir.o		\</div><div class='add'>+	virt/queues.o		\</div><div class='add'>+	virt/virtchnl.o		\</div><div class='add'>+	virt/rss.o		\</div><div class='ctx'> 	ice_vf_mbx.o		\</div><div class='ctx'> 	ice_vf_vsi_vlan_ops.o	\</div><div class='ctx'> 	ice_vf_lib.o</div><div class='del'>-ice-$(CONFIG_PTP_1588_CLOCK) += ice_ptp.o ice_ptp_hw.o ice_dpll.o</div><div class='add'>+ice-$(CONFIG_PTP_1588_CLOCK) += ice_ptp.o ice_ptp_hw.o ice_dpll.o ice_tspll.o</div><div class='ctx'> ice-$(CONFIG_DCB) += ice_dcb.o ice_dcb_nl.o ice_dcb_lib.o</div><div class='ctx'> ice-$(CONFIG_RFS_ACCEL) += ice_arfs.o</div><div class='ctx'> ice-$(CONFIG_XDP_SOCKETS) += ice_xsk.o</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/devlink/devlink.c b/drivers/net/ethernet/intel/ice/devlink/devlink.c<br/>index 415445cefdb2..d88b7f3fd1f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/devlink/devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/devlink/devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/devlink/devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/devlink/devlink.c</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> #include "ice.h"</div><div class='ctx'> #include "ice_lib.h"</div><div class='ctx'> #include "devlink.h"</div><div class='del'>-#include "devlink_port.h"</div><div class='add'>+#include "port.h"</div><div class='ctx'> #include "ice_eswitch.h"</div><div class='ctx'> #include "ice_fw_update.h"</div><div class='ctx'> #include "ice_dcb_lib.h"</div><div class='hunk'>@@ -293,7 +293,7 @@ static int ice_devlink_info_get(struct devlink *devlink,</div><div class='ctx'> 	err = ice_discover_dev_caps(hw, &amp;ctx-&gt;dev_caps);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_dbg(dev, "Failed to discover device capabilities, status %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Unable to discover device capabilities");</div><div class='ctx'> 		goto out_free_ctx;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -302,7 +302,7 @@ static int ice_devlink_info_get(struct devlink *devlink,</div><div class='ctx'> 		err = ice_get_inactive_orom_ver(hw, &amp;ctx-&gt;pending_orom);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			dev_dbg(dev, "Unable to read inactive Option ROM version data, status %d aq_err %s\n",</div><div class='del'>-				err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+				err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 			/* disable display of pending Option ROM */</div><div class='ctx'> 			ctx-&gt;dev_caps.common_cap.nvm_update_pending_orom = false;</div><div class='hunk'>@@ -313,7 +313,7 @@ static int ice_devlink_info_get(struct devlink *devlink,</div><div class='ctx'> 		err = ice_get_inactive_nvm_ver(hw, &amp;ctx-&gt;pending_nvm);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			dev_dbg(dev, "Unable to read inactive NVM version data, status %d aq_err %s\n",</div><div class='del'>-				err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+				err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 			/* disable display of pending Option ROM */</div><div class='ctx'> 			ctx-&gt;dev_caps.common_cap.nvm_update_pending_nvm = false;</div><div class='hunk'>@@ -324,7 +324,7 @@ static int ice_devlink_info_get(struct devlink *devlink,</div><div class='ctx'> 		err = ice_get_inactive_netlist_ver(hw, &amp;ctx-&gt;pending_netlist);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			dev_dbg(dev, "Unable to read inactive Netlist version data, status %d aq_err %s\n",</div><div class='del'>-				err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+				err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 			/* disable display of pending Option ROM */</div><div class='ctx'> 			ctx-&gt;dev_caps.common_cap.nvm_update_pending_netlist = false;</div><div class='hunk'>@@ -368,14 +368,18 @@ static int ice_devlink_info_get(struct devlink *devlink,</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ICE_VERSION_RUNNING:</div><div class='del'>-			err = devlink_info_version_running_put(req, key, ctx-&gt;buf);</div><div class='add'>+			err = devlink_info_version_running_put_ext(req, key,</div><div class='add'>+								   ctx-&gt;buf,</div><div class='add'>+								   DEVLINK_INFO_VERSION_TYPE_COMPONENT);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				NL_SET_ERR_MSG_MOD(extack, "Unable to set running version");</div><div class='ctx'> 				goto out_free_ctx;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ICE_VERSION_STORED:</div><div class='del'>-			err = devlink_info_version_stored_put(req, key, ctx-&gt;buf);</div><div class='add'>+			err = devlink_info_version_stored_put_ext(req, key,</div><div class='add'>+								  ctx-&gt;buf,</div><div class='add'>+								  DEVLINK_INFO_VERSION_TYPE_COMPONENT);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				NL_SET_ERR_MSG_MOD(extack, "Unable to set stored version");</div><div class='ctx'> 				goto out_free_ctx;</div><div class='hunk'>@@ -436,7 +440,7 @@ ice_devlink_reload_empr_start(struct ice_pf *pf,</div><div class='ctx'> 	err = ice_aq_nvm_update_empr(hw);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Failed to trigger EMP device reset to reload firmware, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Failed to trigger EMP device reset to reload firmware");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -455,6 +459,7 @@ static void ice_devlink_reinit_down(struct ice_pf *pf)</div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	ice_vsi_decfg(ice_get_main_vsi(pf));</div><div class='ctx'> 	rtnl_unlock();</div><div class='add'>+	ice_deinit_pf(pf);</div><div class='ctx'> 	ice_deinit_dev(pf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -605,11 +610,13 @@ exit_release_res:</div><div class='ctx'>  * @devlink: pointer to the devlink instance</div><div class='ctx'>  * @id: the parameter ID to set</div><div class='ctx'>  * @ctx: context to store the parameter value</div><div class='add'>+ * @extack: netlink extended ACK structure</div><div class='ctx'>  *</div><div class='ctx'>  * Return: zero on success and negative value on failure.</div><div class='ctx'>  */</div><div class='ctx'> static int ice_devlink_tx_sched_layers_get(struct devlink *devlink, u32 id,</div><div class='del'>-					   struct devlink_param_gset_ctx *ctx)</div><div class='add'>+					   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = devlink_priv(devlink);</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -977,6 +984,9 @@ static int ice_devlink_rate_node_new(struct devlink_rate *rate_node, void **priv</div><div class='ctx'> </div><div class='ctx'> 	/* preallocate memory for ice_sched_node */</div><div class='ctx'> 	node = devm_kzalloc(ice_hw_to_dev(pi-&gt;hw), sizeof(*node), GFP_KERNEL);</div><div class='add'>+	if (!node)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	*priv = node;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1198,6 +1208,25 @@ static int ice_devlink_set_parent(struct devlink_rate *devlink_rate,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ice_set_min_max_msix(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct devlink *devlink = priv_to_devlink(pf);</div><div class='add'>+	union devlink_param_value val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = devl_param_driverinit_value_get(devlink,</div><div class='add'>+					      DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,</div><div class='add'>+					      &amp;val);</div><div class='add'>+	if (!err)</div><div class='add'>+		pf-&gt;msix.min = val.vu32;</div><div class='add'>+</div><div class='add'>+	err = devl_param_driverinit_value_get(devlink,</div><div class='add'>+					      DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,</div><div class='add'>+					      &amp;val);</div><div class='add'>+	if (!err)</div><div class='add'>+		pf-&gt;msix.max = val.vu32;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_devlink_reinit_up - do reinit of the given PF</div><div class='ctx'>  * @pf: pointer to the PF struct</div><div class='hunk'>@@ -1205,11 +1234,28 @@ static int ice_devlink_set_parent(struct devlink_rate *devlink_rate,</div><div class='ctx'> static int ice_devlink_reinit_up(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_vsi *vsi = ice_get_main_vsi(pf);</div><div class='add'>+	struct device *dev = ice_pf_to_dev(pf);</div><div class='add'>+	bool need_dev_deinit = false;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	err = ice_init_hw(&amp;pf-&gt;hw);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "ice_init_hw failed: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* load MSI-X values */</div><div class='add'>+	ice_set_min_max_msix(pf);</div><div class='add'>+</div><div class='ctx'> 	err = ice_init_dev(pf);</div><div class='ctx'> 	if (err)</div><div class='del'>-		return err;</div><div class='add'>+		goto unroll_hw_init;</div><div class='add'>+</div><div class='add'>+	err = ice_init_pf(pf);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "ice_init_pf failed: %d\n", err);</div><div class='add'>+		goto unroll_dev_init;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	vsi-&gt;flags = ICE_VSI_FLAG_INIT;</div><div class='ctx'> </div><div class='hunk'>@@ -1217,7 +1263,7 @@ static int ice_devlink_reinit_up(struct ice_pf *pf)</div><div class='ctx'> 	err = ice_vsi_cfg(vsi);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_vsi_cfg;</div><div class='add'>+		goto unroll_pf_init;</div><div class='ctx'> </div><div class='ctx'> 	/* No need to take devl_lock, it's already taken by devlink API */</div><div class='ctx'> 	err = ice_load(pf);</div><div class='hunk'>@@ -1230,8 +1276,14 @@ err_load:</div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	ice_vsi_decfg(vsi);</div><div class='ctx'> 	rtnl_unlock();</div><div class='del'>-err_vsi_cfg:</div><div class='del'>-	ice_deinit_dev(pf);</div><div class='add'>+unroll_pf_init:</div><div class='add'>+	ice_deinit_pf(pf);</div><div class='add'>+unroll_dev_init:</div><div class='add'>+	need_dev_deinit = true;</div><div class='add'>+unroll_hw_init:</div><div class='add'>+	ice_deinit_hw(&amp;pf-&gt;hw);</div><div class='add'>+	if (need_dev_deinit)</div><div class='add'>+		ice_deinit_dev(pf);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1299,11 +1351,17 @@ static const struct devlink_ops ice_sf_devlink_ops;</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> ice_devlink_enable_roce_get(struct devlink *devlink, u32 id,</div><div class='del'>-			    struct devlink_param_gset_ctx *ctx)</div><div class='add'>+			    struct devlink_param_gset_ctx *ctx,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = devlink_priv(devlink);</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev;</div><div class='add'>+</div><div class='add'>+	cdev = pf-&gt;cdev_info;</div><div class='add'>+	if (!cdev)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;val.vbool = pf-&gt;rdma_mode &amp; IIDC_RDMA_PROTOCOL_ROCEV2 ? true : false;</div><div class='add'>+	ctx-&gt;val.vbool = !!(cdev-&gt;rdma_protocol &amp; IIDC_RDMA_PROTOCOL_ROCEV2);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1313,19 +1371,24 @@ static int ice_devlink_enable_roce_set(struct devlink *devlink, u32 id,</div><div class='ctx'> 				       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = devlink_priv(devlink);</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev;</div><div class='ctx'> 	bool roce_ena = ctx-&gt;val.vbool;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	cdev = pf-&gt;cdev_info;</div><div class='add'>+	if (!cdev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	if (!roce_ena) {</div><div class='ctx'> 		ice_unplug_aux_dev(pf);</div><div class='del'>-		pf-&gt;rdma_mode &amp;= ~IIDC_RDMA_PROTOCOL_ROCEV2;</div><div class='add'>+		cdev-&gt;rdma_protocol &amp;= ~IIDC_RDMA_PROTOCOL_ROCEV2;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pf-&gt;rdma_mode |= IIDC_RDMA_PROTOCOL_ROCEV2;</div><div class='add'>+	cdev-&gt;rdma_protocol |= IIDC_RDMA_PROTOCOL_ROCEV2;</div><div class='ctx'> 	ret = ice_plug_aux_dev(pf);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		pf-&gt;rdma_mode &amp;= ~IIDC_RDMA_PROTOCOL_ROCEV2;</div><div class='add'>+		cdev-&gt;rdma_protocol &amp;= ~IIDC_RDMA_PROTOCOL_ROCEV2;</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1336,11 +1399,16 @@ ice_devlink_enable_roce_validate(struct devlink *devlink, u32 id,</div><div class='ctx'> 				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = devlink_priv(devlink);</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev;</div><div class='add'>+</div><div class='add'>+	cdev = pf-&gt;cdev_info;</div><div class='add'>+	if (!cdev)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(ICE_FLAG_RDMA_ENA, pf-&gt;flags))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (pf-&gt;rdma_mode &amp; IIDC_RDMA_PROTOCOL_IWARP) {</div><div class='add'>+	if (cdev-&gt;rdma_protocol &amp; IIDC_RDMA_PROTOCOL_IWARP) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "iWARP is currently enabled. This device cannot enable iWARP and RoCEv2 simultaneously");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1350,11 +1418,17 @@ ice_devlink_enable_roce_validate(struct devlink *devlink, u32 id,</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> ice_devlink_enable_iw_get(struct devlink *devlink, u32 id,</div><div class='del'>-			  struct devlink_param_gset_ctx *ctx)</div><div class='add'>+			  struct devlink_param_gset_ctx *ctx,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = devlink_priv(devlink);</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev;</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;val.vbool = pf-&gt;rdma_mode &amp; IIDC_RDMA_PROTOCOL_IWARP;</div><div class='add'>+	cdev = pf-&gt;cdev_info;</div><div class='add'>+	if (!cdev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;val.vbool = !!(cdev-&gt;rdma_protocol &amp; IIDC_RDMA_PROTOCOL_IWARP);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1364,19 +1438,24 @@ static int ice_devlink_enable_iw_set(struct devlink *devlink, u32 id,</div><div class='ctx'> 				     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = devlink_priv(devlink);</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev;</div><div class='ctx'> 	bool iw_ena = ctx-&gt;val.vbool;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	cdev = pf-&gt;cdev_info;</div><div class='add'>+	if (!cdev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	if (!iw_ena) {</div><div class='ctx'> 		ice_unplug_aux_dev(pf);</div><div class='del'>-		pf-&gt;rdma_mode &amp;= ~IIDC_RDMA_PROTOCOL_IWARP;</div><div class='add'>+		cdev-&gt;rdma_protocol &amp;= ~IIDC_RDMA_PROTOCOL_IWARP;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pf-&gt;rdma_mode |= IIDC_RDMA_PROTOCOL_IWARP;</div><div class='add'>+	cdev-&gt;rdma_protocol |= IIDC_RDMA_PROTOCOL_IWARP;</div><div class='ctx'> 	ret = ice_plug_aux_dev(pf);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		pf-&gt;rdma_mode &amp;= ~IIDC_RDMA_PROTOCOL_IWARP;</div><div class='add'>+		cdev-&gt;rdma_protocol &amp;= ~IIDC_RDMA_PROTOCOL_IWARP;</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1391,7 +1470,7 @@ ice_devlink_enable_iw_validate(struct devlink *devlink, u32 id,</div><div class='ctx'> 	if (!test_bit(ICE_FLAG_RDMA_ENA, pf-&gt;flags))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (pf-&gt;rdma_mode &amp; IIDC_RDMA_PROTOCOL_ROCEV2) {</div><div class='add'>+	if (pf-&gt;cdev_info-&gt;rdma_protocol &amp; IIDC_RDMA_PROTOCOL_ROCEV2) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "RoCEv2 is currently enabled. This device cannot enable iWARP and RoCEv2 simultaneously");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1447,11 +1526,13 @@ static int ice_devlink_local_fwd_str_to_mode(const char *mode_str)</div><div class='ctx'>  * @devlink: Pointer to the devlink instance.</div><div class='ctx'>  * @id: The parameter ID to set.</div><div class='ctx'>  * @ctx: Context to store the parameter value.</div><div class='add'>+ * @extack: netlink extended ACK structure</div><div class='ctx'>  *</div><div class='ctx'>  * Return: Zero.</div><div class='ctx'>  */</div><div class='ctx'> static int ice_devlink_local_fwd_get(struct devlink *devlink, u32 id,</div><div class='del'>-				     struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				     struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = devlink_priv(devlink);</div><div class='ctx'> 	struct ice_port_info *pi;</div><div class='hunk'>@@ -1518,6 +1599,43 @@ static int ice_devlink_local_fwd_validate(struct devlink *devlink, u32 id,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+ice_devlink_msix_max_pf_validate(struct devlink *devlink, u32 id,</div><div class='add'>+				 union devlink_param_value val,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = devlink_priv(devlink);</div><div class='add'>+</div><div class='add'>+	if (val.vu32 &gt; pf-&gt;hw.func_caps.common_cap.num_msix_vectors)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ice_devlink_msix_min_pf_validate(struct devlink *devlink, u32 id,</div><div class='add'>+				 union devlink_param_value val,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (val.vu32 &lt; ICE_MIN_MSIX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ice_devlink_enable_rdma_validate(struct devlink *devlink, u32 id,</div><div class='add'>+					    union devlink_param_value val,</div><div class='add'>+					    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = devlink_priv(devlink);</div><div class='add'>+	bool new_state = val.vbool;</div><div class='add'>+</div><div class='add'>+	if (new_state &amp;&amp; !test_bit(ICE_FLAG_RDMA_ENA, pf-&gt;flags))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum ice_param_id {</div><div class='ctx'> 	ICE_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,</div><div class='ctx'> 	ICE_DEVLINK_PARAM_ID_TX_SCHED_LAYERS,</div><div class='hunk'>@@ -1533,6 +1651,17 @@ static const struct devlink_param ice_dvl_rdma_params[] = {</div><div class='ctx'> 			      ice_devlink_enable_iw_get,</div><div class='ctx'> 			      ice_devlink_enable_iw_set,</div><div class='ctx'> 			      ice_devlink_enable_iw_validate),</div><div class='add'>+	DEVLINK_PARAM_GENERIC(ENABLE_RDMA, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),</div><div class='add'>+			      NULL, NULL, ice_devlink_enable_rdma_validate),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_param ice_dvl_msix_params[] = {</div><div class='add'>+	DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MAX,</div><div class='add'>+			      BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),</div><div class='add'>+			      NULL, NULL, ice_devlink_msix_max_pf_validate),</div><div class='add'>+	DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MIN,</div><div class='add'>+			      BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),</div><div class='add'>+			      NULL, NULL, ice_devlink_msix_min_pf_validate),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct devlink_param ice_dvl_sched_params[] = {</div><div class='hunk'>@@ -1636,6 +1765,7 @@ void ice_devlink_unregister(struct ice_pf *pf)</div><div class='ctx'> int ice_devlink_register_params(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='ctx'> 	struct devlink *devlink = priv_to_devlink(pf);</div><div class='add'>+	union devlink_param_value value;</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='hunk'>@@ -1644,10 +1774,39 @@ int ice_devlink_register_params(struct ice_pf *pf)</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='add'>+	status = devl_params_register(devlink, ice_dvl_msix_params,</div><div class='add'>+				      ARRAY_SIZE(ice_dvl_msix_params));</div><div class='add'>+	if (status)</div><div class='add'>+		goto unregister_rdma_params;</div><div class='add'>+</div><div class='ctx'> 	if (hw-&gt;func_caps.common_cap.tx_sched_topo_comp_mode_en)</div><div class='ctx'> 		status = devl_params_register(devlink, ice_dvl_sched_params,</div><div class='ctx'> 					      ARRAY_SIZE(ice_dvl_sched_params));</div><div class='add'>+	if (status)</div><div class='add'>+		goto unregister_msix_params;</div><div class='add'>+</div><div class='add'>+	value.vu32 = pf-&gt;msix.max;</div><div class='add'>+	devl_param_driverinit_value_set(devlink,</div><div class='add'>+					DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,</div><div class='add'>+					value);</div><div class='add'>+	value.vu32 = pf-&gt;msix.min;</div><div class='add'>+	devl_param_driverinit_value_set(devlink,</div><div class='add'>+					DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,</div><div class='add'>+					value);</div><div class='add'>+</div><div class='add'>+	value.vbool = test_bit(ICE_FLAG_RDMA_ENA, pf-&gt;flags);</div><div class='add'>+	devl_param_driverinit_value_set(devlink,</div><div class='add'>+					DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA,</div><div class='add'>+					value);</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unregister_msix_params:</div><div class='add'>+	devl_params_unregister(devlink, ice_dvl_msix_params,</div><div class='add'>+			       ARRAY_SIZE(ice_dvl_msix_params));</div><div class='add'>+unregister_rdma_params:</div><div class='add'>+	devl_params_unregister(devlink, ice_dvl_rdma_params,</div><div class='add'>+			       ARRAY_SIZE(ice_dvl_rdma_params));</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1658,6 +1817,8 @@ void ice_devlink_unregister_params(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 	devl_params_unregister(devlink, ice_dvl_rdma_params,</div><div class='ctx'> 			       ARRAY_SIZE(ice_dvl_rdma_params));</div><div class='add'>+	devl_params_unregister(devlink, ice_dvl_msix_params,</div><div class='add'>+			       ARRAY_SIZE(ice_dvl_msix_params));</div><div class='ctx'> </div><div class='ctx'> 	if (hw-&gt;func_caps.common_cap.tx_sched_topo_comp_mode_en)</div><div class='ctx'> 		devl_params_unregister(devlink, ice_dvl_sched_params,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/devlink/health.c b/drivers/net/ethernet/intel/ice/devlink/health.c<br/>new file mode 100644<br/>index 000000000000..8e9a8a8178d4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/devlink/health.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/devlink/health.c</a></div><div class='hunk'>@@ -0,0 +1,551 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2024, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include "ice.h"</div><div class='add'>+#include "ice_adminq_cmd.h" /* for enum ice_aqc_health_status_elem */</div><div class='add'>+#include "health.h"</div><div class='add'>+</div><div class='add'>+#define ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, obj, name) \</div><div class='add'>+	devlink_fmsg_put(fmsg, #name, (obj)-&gt;name)</div><div class='add'>+</div><div class='add'>+#define ICE_HEALTH_STATUS_DATA_SIZE 2</div><div class='add'>+</div><div class='add'>+struct ice_health_status {</div><div class='add'>+	enum ice_aqc_health_status code;</div><div class='add'>+	const char *description;</div><div class='add'>+	const char *solution;</div><div class='add'>+	const char *data_label[ICE_HEALTH_STATUS_DATA_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * In addition to the health status codes provided below, the firmware might</div><div class='add'>+ * generate Health Status Codes that are not pertinent to the end-user.</div><div class='add'>+ * For instance, Health Code 0x1002 is triggered when the command fails.</div><div class='add'>+ * Such codes should be disregarded by the end-user.</div><div class='add'>+ * The below lookup requires to be sorted by code.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static const char ice_common_port_solutions[] =</div><div class='add'>+	"Check your cable connection. Change or replace the module or cable. Manually set speed and duplex.";</div><div class='add'>+static const char ice_port_number_label[] = "Port Number";</div><div class='add'>+static const char ice_update_nvm_solution[] = "Update to the latest NVM image.";</div><div class='add'>+</div><div class='add'>+static const struct ice_health_status ice_health_status_lookup[] = {</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_UNKNOWN_MOD_STRICT, "An unsupported module was detected.",</div><div class='add'>+		ice_common_port_solutions, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_MOD_TYPE, "Module type is not supported.",</div><div class='add'>+		"Change or replace the module or cable.", {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_MOD_QUAL, "Module is not qualified.",</div><div class='add'>+		ice_common_port_solutions, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_MOD_COMM,</div><div class='add'>+		"Device cannot communicate with the module.",</div><div class='add'>+		"Check your cable connection. Change or replace the module or cable. Manually set speed and duplex.",</div><div class='add'>+		{ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_MOD_CONFLICT, "Unresolved module conflict.",</div><div class='add'>+		"Manually set speed/duplex or change the port option. If the problem persists, use a cable/module that is found in the supported modules and cables list for this device.",</div><div class='add'>+		{ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_MOD_NOT_PRESENT, "Module is not present.",</div><div class='add'>+		"Check that the module is inserted correctly. If the problem persists, use a cable/module that is found in the supported modules and cables list for this device.",</div><div class='add'>+		{ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_INFO_MOD_UNDERUTILIZED, "Underutilized module.",</div><div class='add'>+		"Change or replace the module or cable. Change the port option.",</div><div class='add'>+		{ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_UNKNOWN_MOD_LENIENT, "An unsupported module was detected.",</div><div class='add'>+		ice_common_port_solutions, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_INVALID_LINK_CFG, "Invalid link configuration.",</div><div class='add'>+		NULL, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_PORT_ACCESS, "Port hardware access error.",</div><div class='add'>+		ice_update_nvm_solution, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_PORT_UNREACHABLE, "A port is unreachable.",</div><div class='add'>+		"Change the port option. Update to the latest NVM image."},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_INFO_PORT_SPEED_MOD_LIMITED, "Port speed is limited due to module.",</div><div class='add'>+		"Change the module or configure the port option to match the current module speed. Change the port option.",</div><div class='add'>+		{ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_PARALLEL_FAULT,</div><div class='add'>+		"All configured link modes were attempted but failed to establish link. The device will restart the process to establish link.",</div><div class='add'>+		"Check link partner connection and configuration.",</div><div class='add'>+		{ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_INFO_PORT_SPEED_PHY_LIMITED,</div><div class='add'>+		"Port speed is limited by PHY capabilities.",</div><div class='add'>+		"Change the module to align to port option.", {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_NETLIST_TOPO, "LOM topology netlist is corrupted.",</div><div class='add'>+		ice_update_nvm_solution, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_NETLIST, "Unrecoverable netlist error.",</div><div class='add'>+		ice_update_nvm_solution, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_TOPO_CONFLICT, "Port topology conflict.",</div><div class='add'>+		"Change the port option. Update to the latest NVM image."},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_LINK_HW_ACCESS, "Unrecoverable hardware access error.",</div><div class='add'>+		ice_update_nvm_solution, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_LINK_RUNTIME, "Unrecoverable runtime error.",</div><div class='add'>+		ice_update_nvm_solution, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_DNL_INIT, "Link management engine failed to initialize.",</div><div class='add'>+		ice_update_nvm_solution, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_PHY_FW_LOAD,</div><div class='add'>+		"Failed to load the firmware image in the external PHY.",</div><div class='add'>+		ice_update_nvm_solution, {ice_port_number_label}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_INFO_RECOVERY, "The device is in firmware recovery mode.",</div><div class='add'>+		ice_update_nvm_solution, {"Extended Error"}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_FLASH_ACCESS, "The flash chip cannot be accessed.",</div><div class='add'>+		"If issue persists, call customer support.", {"Access Type"}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_NVM_AUTH, "NVM authentication failed.",</div><div class='add'>+		ice_update_nvm_solution},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_OROM_AUTH, "Option ROM authentication failed.",</div><div class='add'>+		ice_update_nvm_solution},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_DDP_AUTH, "DDP package authentication failed.",</div><div class='add'>+		"Update to latest base driver and DDP package."},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_NVM_COMPAT, "NVM image is incompatible.",</div><div class='add'>+		ice_update_nvm_solution},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_OROM_COMPAT, "Option ROM is incompatible.",</div><div class='add'>+		ice_update_nvm_solution, {"Expected PCI Device ID", "Expected Module ID"}},</div><div class='add'>+	{ICE_AQC_HEALTH_STATUS_ERR_DCB_MIB,</div><div class='add'>+		"Supplied MIB file is invalid. DCB reverted to default configuration.",</div><div class='add'>+		"Disable FW-LLDP and check DCBx system configuration.",</div><div class='add'>+		{ice_port_number_label, "MIB ID"}},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ice_health_status_lookup_compare(const void *a, const void *b)</div><div class='add'>+{</div><div class='add'>+	return ((struct ice_health_status *)a)-&gt;code - ((struct ice_health_status *)b)-&gt;code;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ice_health_status *ice_get_health_status(u16 code)</div><div class='add'>+{</div><div class='add'>+	struct ice_health_status key = { .code = code };</div><div class='add'>+</div><div class='add'>+	return bsearch(&amp;key, ice_health_status_lookup, ARRAY_SIZE(ice_health_status_lookup),</div><div class='add'>+		       sizeof(struct ice_health_status), ice_health_status_lookup_compare);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ice_describe_status_code(struct devlink_fmsg *fmsg,</div><div class='add'>+				     struct ice_aqc_health_status_elem *hse)</div><div class='add'>+{</div><div class='add'>+	static const char *const aux_label[] = { "Aux Data 1", "Aux Data 2" };</div><div class='add'>+	const struct ice_health_status *health_code;</div><div class='add'>+	u32 internal_data[2];</div><div class='add'>+	u16 status_code;</div><div class='add'>+</div><div class='add'>+	status_code = le16_to_cpu(hse-&gt;health_status_code);</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_put(fmsg, "Syndrome", status_code);</div><div class='add'>+	if (status_code) {</div><div class='add'>+		internal_data[0] = le32_to_cpu(hse-&gt;internal_data1);</div><div class='add'>+		internal_data[1] = le32_to_cpu(hse-&gt;internal_data2);</div><div class='add'>+</div><div class='add'>+		health_code = ice_get_health_status(status_code);</div><div class='add'>+		if (!health_code)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		devlink_fmsg_string_pair_put(fmsg, "Description", health_code-&gt;description);</div><div class='add'>+		if (health_code-&gt;solution)</div><div class='add'>+			devlink_fmsg_string_pair_put(fmsg, "Possible Solution",</div><div class='add'>+						     health_code-&gt;solution);</div><div class='add'>+</div><div class='add'>+		for (size_t i = 0; i &lt; ICE_HEALTH_STATUS_DATA_SIZE; i++) {</div><div class='add'>+			if (internal_data[i] != ICE_AQC_HEALTH_STATUS_UNDEFINED_DATA)</div><div class='add'>+				devlink_fmsg_u32_pair_put(fmsg,</div><div class='add'>+							  health_code-&gt;data_label[i] ?</div><div class='add'>+							  health_code-&gt;data_label[i] :</div><div class='add'>+							  aux_label[i],</div><div class='add'>+							  internal_data[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ice_port_reporter_diagnose(struct devlink_health_reporter *reporter, struct devlink_fmsg *fmsg,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = devlink_health_reporter_priv(reporter);</div><div class='add'>+</div><div class='add'>+	ice_describe_status_code(fmsg, &amp;pf-&gt;health_reporters.port_status);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ice_port_reporter_dump(struct devlink_health_reporter *reporter, struct devlink_fmsg *fmsg,</div><div class='add'>+		       void *priv_ctx, struct netlink_ext_ack __always_unused *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = devlink_health_reporter_priv(reporter);</div><div class='add'>+</div><div class='add'>+	ice_describe_status_code(fmsg, &amp;pf-&gt;health_reporters.port_status);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ice_fw_reporter_diagnose(struct devlink_health_reporter *reporter, struct devlink_fmsg *fmsg,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = devlink_health_reporter_priv(reporter);</div><div class='add'>+</div><div class='add'>+	ice_describe_status_code(fmsg, &amp;pf-&gt;health_reporters.fw_status);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ice_fw_reporter_dump(struct devlink_health_reporter *reporter, struct devlink_fmsg *fmsg,</div><div class='add'>+		     void *priv_ctx, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = devlink_health_reporter_priv(reporter);</div><div class='add'>+</div><div class='add'>+	ice_describe_status_code(fmsg, &amp;pf-&gt;health_reporters.fw_status);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ice_config_health_events(struct ice_pf *pf, bool enable)</div><div class='add'>+{</div><div class='add'>+	u8 enable_bits = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		enable_bits = ICE_AQC_HEALTH_STATUS_SET_PF_SPECIFIC_MASK |</div><div class='add'>+			      ICE_AQC_HEALTH_STATUS_SET_GLOBAL_MASK;</div><div class='add'>+</div><div class='add'>+	ret = ice_aq_set_health_status_cfg(&amp;pf-&gt;hw, enable_bits);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(ice_pf_to_dev(pf), "Failed to %s firmware health events, err %d aq_err %s\n",</div><div class='add'>+			str_enable_disable(enable), ret,</div><div class='add'>+			libie_aq_str(pf-&gt;hw.adminq.sq_last_status));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_process_health_status_event - Process the health status event from FW</div><div class='add'>+ * @pf: pointer to the PF structure</div><div class='add'>+ * @event: event structure containing the Health Status Event opcode</div><div class='add'>+ *</div><div class='add'>+ * Decode the Health Status Events and print the associated messages</div><div class='add'>+ */</div><div class='add'>+void ice_process_health_status_event(struct ice_pf *pf, struct ice_rq_event_info *event)</div><div class='add'>+{</div><div class='add'>+	const struct ice_aqc_health_status_elem *health_info;</div><div class='add'>+	const struct ice_aqc_get_health_status *cmd;</div><div class='add'>+	u16 count;</div><div class='add'>+</div><div class='add'>+	health_info = (struct ice_aqc_health_status_elem *)event-&gt;msg_buf;</div><div class='add'>+	cmd = libie_aq_raw(&amp;event-&gt;desc);</div><div class='add'>+	count = le16_to_cpu(cmd-&gt;health_status_count);</div><div class='add'>+</div><div class='add'>+	if (count &gt; (event-&gt;buf_len / sizeof(*health_info))) {</div><div class='add'>+		dev_err(ice_pf_to_dev(pf), "Received a health status event with invalid element count\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; count; i++) {</div><div class='add'>+		const struct ice_health_status *health_code;</div><div class='add'>+		u16 status_code;</div><div class='add'>+</div><div class='add'>+		status_code = le16_to_cpu(health_info-&gt;health_status_code);</div><div class='add'>+		health_code = ice_get_health_status(status_code);</div><div class='add'>+</div><div class='add'>+		if (health_code) {</div><div class='add'>+			switch (le16_to_cpu(health_info-&gt;event_source)) {</div><div class='add'>+			case ICE_AQC_HEALTH_STATUS_GLOBAL:</div><div class='add'>+				pf-&gt;health_reporters.fw_status = *health_info;</div><div class='add'>+				devlink_health_report(pf-&gt;health_reporters.fw,</div><div class='add'>+						      "FW syndrome reported", NULL);</div><div class='add'>+				break;</div><div class='add'>+			case ICE_AQC_HEALTH_STATUS_PF:</div><div class='add'>+			case ICE_AQC_HEALTH_STATUS_PORT:</div><div class='add'>+				pf-&gt;health_reporters.port_status = *health_info;</div><div class='add'>+				devlink_health_report(pf-&gt;health_reporters.port,</div><div class='add'>+						      "Port syndrome reported", NULL);</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				dev_err(ice_pf_to_dev(pf), "Health code with unknown source\n");</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			u32 data1, data2;</div><div class='add'>+			u16 source;</div><div class='add'>+</div><div class='add'>+			source = le16_to_cpu(health_info-&gt;event_source);</div><div class='add'>+			data1 = le32_to_cpu(health_info-&gt;internal_data1);</div><div class='add'>+			data2 = le32_to_cpu(health_info-&gt;internal_data2);</div><div class='add'>+			dev_dbg(ice_pf_to_dev(pf),</div><div class='add'>+				"Received internal health status code 0x%08x, source: 0x%08x, data1: 0x%08x, data2: 0x%08x",</div><div class='add'>+				status_code, source, data1, data2);</div><div class='add'>+		}</div><div class='add'>+		health_info++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_devlink_health_report - boilerplate to call given @reporter</div><div class='add'>+ *</div><div class='add'>+ * @reporter: devlink health reporter to call, do nothing on NULL</div><div class='add'>+ * @msg: message to pass up, "event name" is fine</div><div class='add'>+ * @priv_ctx: typically some event struct</div><div class='add'>+ */</div><div class='add'>+static void ice_devlink_health_report(struct devlink_health_reporter *reporter,</div><div class='add'>+				      const char *msg, void *priv_ctx)</div><div class='add'>+{</div><div class='add'>+	if (!reporter)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* We do not do auto recovering, so return value of the below function</div><div class='add'>+	 * will always be 0, thus we do ignore it.</div><div class='add'>+	 */</div><div class='add'>+	devlink_health_report(reporter, msg, priv_ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ice_mdd_event {</div><div class='add'>+	enum ice_mdd_src src;</div><div class='add'>+	u16 vf_num;</div><div class='add'>+	u16 queue;</div><div class='add'>+	u8 pf_num;</div><div class='add'>+	u8 event;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *ice_mdd_src_to_str(enum ice_mdd_src src)</div><div class='add'>+{</div><div class='add'>+	switch (src) {</div><div class='add'>+	case ICE_MDD_SRC_TX_PQM:</div><div class='add'>+		return "tx_pqm";</div><div class='add'>+	case ICE_MDD_SRC_TX_TCLAN:</div><div class='add'>+		return "tx_tclan";</div><div class='add'>+	case ICE_MDD_SRC_TX_TDPU:</div><div class='add'>+		return "tx_tdpu";</div><div class='add'>+	case ICE_MDD_SRC_RX:</div><div class='add'>+		return "rx";</div><div class='add'>+	default:</div><div class='add'>+		return "invalid";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ice_mdd_reporter_dump(struct devlink_health_reporter *reporter,</div><div class='add'>+		      struct devlink_fmsg *fmsg, void *priv_ctx,</div><div class='add'>+		      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_mdd_event *mdd_event = priv_ctx;</div><div class='add'>+	const char *src;</div><div class='add'>+</div><div class='add'>+	if (!mdd_event)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	src = ice_mdd_src_to_str(mdd_event-&gt;src);</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_obj_nest_start(fmsg);</div><div class='add'>+	devlink_fmsg_put(fmsg, "src", src);</div><div class='add'>+	ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, mdd_event, pf_num);</div><div class='add'>+	ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, mdd_event, vf_num);</div><div class='add'>+	ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, mdd_event, event);</div><div class='add'>+	ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, mdd_event, queue);</div><div class='add'>+	devlink_fmsg_obj_nest_end(fmsg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_report_mdd_event - Report an MDD event through devlink health</div><div class='add'>+ * @pf: the PF device structure</div><div class='add'>+ * @src: the HW block that was the source of this MDD event</div><div class='add'>+ * @pf_num: the pf_num on which the MDD event occurred</div><div class='add'>+ * @vf_num: the vf_num on which the MDD event occurred</div><div class='add'>+ * @event: the event type of the MDD event</div><div class='add'>+ * @queue: the queue on which the MDD event occurred</div><div class='add'>+ *</div><div class='add'>+ * Report an MDD event that has occurred on this PF.</div><div class='add'>+ */</div><div class='add'>+void ice_report_mdd_event(struct ice_pf *pf, enum ice_mdd_src src, u8 pf_num,</div><div class='add'>+			  u16 vf_num, u8 event, u16 queue)</div><div class='add'>+{</div><div class='add'>+	struct ice_mdd_event ev = {</div><div class='add'>+		.src = src,</div><div class='add'>+		.pf_num = pf_num,</div><div class='add'>+		.vf_num = vf_num,</div><div class='add'>+		.event = event,</div><div class='add'>+		.queue = queue,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ice_devlink_health_report(pf-&gt;health_reporters.mdd, "MDD event", &amp;ev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_fmsg_put_ptr - put hex value of pointer into fmsg</div><div class='add'>+ *</div><div class='add'>+ * @fmsg: devlink fmsg under construction</div><div class='add'>+ * @name: name to pass</div><div class='add'>+ * @ptr: 64 bit value to print as hex and put into fmsg</div><div class='add'>+ */</div><div class='add'>+static void ice_fmsg_put_ptr(struct devlink_fmsg *fmsg, const char *name,</div><div class='add'>+			     void *ptr)</div><div class='add'>+{</div><div class='add'>+	char buf[sizeof(ptr) * 3];</div><div class='add'>+</div><div class='add'>+	sprintf(buf, "%p", ptr);</div><div class='add'>+	devlink_fmsg_put(fmsg, name, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ice_tx_hang_event {</div><div class='add'>+	u32 head;</div><div class='add'>+	u32 intr;</div><div class='add'>+	u16 vsi_num;</div><div class='add'>+	u16 queue;</div><div class='add'>+	u16 next_to_clean;</div><div class='add'>+	u16 next_to_use;</div><div class='add'>+	struct ice_tx_ring *tx_ring;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ice_tx_hang_reporter_dump(struct devlink_health_reporter *reporter,</div><div class='add'>+				     struct devlink_fmsg *fmsg, void *priv_ctx,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_tx_hang_event *event = priv_ctx;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	if (!event)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	skb = event-&gt;tx_ring-&gt;tx_buf-&gt;skb;</div><div class='add'>+	devlink_fmsg_obj_nest_start(fmsg);</div><div class='add'>+	ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, event, head);</div><div class='add'>+	ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, event, intr);</div><div class='add'>+	ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, event, vsi_num);</div><div class='add'>+	ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, event, queue);</div><div class='add'>+	ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, event, next_to_clean);</div><div class='add'>+	ICE_DEVLINK_FMSG_PUT_FIELD(fmsg, event, next_to_use);</div><div class='add'>+	devlink_fmsg_put(fmsg, "irq-mapping", event-&gt;tx_ring-&gt;q_vector-&gt;name);</div><div class='add'>+	ice_fmsg_put_ptr(fmsg, "desc-ptr", event-&gt;tx_ring-&gt;desc);</div><div class='add'>+	ice_fmsg_put_ptr(fmsg, "dma-ptr", (void *)(long)event-&gt;tx_ring-&gt;dma);</div><div class='add'>+	ice_fmsg_put_ptr(fmsg, "skb-ptr", skb);</div><div class='add'>+	devlink_fmsg_binary_pair_put(fmsg, "desc", event-&gt;tx_ring-&gt;desc,</div><div class='add'>+				     event-&gt;tx_ring-&gt;count * sizeof(struct ice_tx_desc));</div><div class='add'>+	devlink_fmsg_dump_skb(fmsg, skb);</div><div class='add'>+	devlink_fmsg_obj_nest_end(fmsg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ice_prep_tx_hang_report(struct ice_pf *pf, struct ice_tx_ring *tx_ring,</div><div class='add'>+			     u16 vsi_num, u32 head, u32 intr)</div><div class='add'>+{</div><div class='add'>+	struct ice_health_tx_hang_buf *buf = &amp;pf-&gt;health_reporters.tx_hang_buf;</div><div class='add'>+</div><div class='add'>+	buf-&gt;tx_ring = tx_ring;</div><div class='add'>+	buf-&gt;vsi_num = vsi_num;</div><div class='add'>+	buf-&gt;head = head;</div><div class='add'>+	buf-&gt;intr = intr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ice_report_tx_hang(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct ice_health_tx_hang_buf *buf = &amp;pf-&gt;health_reporters.tx_hang_buf;</div><div class='add'>+	struct ice_tx_ring *tx_ring = buf-&gt;tx_ring;</div><div class='add'>+</div><div class='add'>+	struct ice_tx_hang_event ev = {</div><div class='add'>+		.head = buf-&gt;head,</div><div class='add'>+		.intr = buf-&gt;intr,</div><div class='add'>+		.vsi_num = buf-&gt;vsi_num,</div><div class='add'>+		.queue = tx_ring-&gt;q_index,</div><div class='add'>+		.next_to_clean = tx_ring-&gt;next_to_clean,</div><div class='add'>+		.next_to_use = tx_ring-&gt;next_to_use,</div><div class='add'>+		.tx_ring = tx_ring,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ice_devlink_health_report(pf-&gt;health_reporters.tx_hang, "Tx hang", &amp;ev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct devlink_health_reporter *</div><div class='add'>+ice_init_devlink_rep(struct ice_pf *pf,</div><div class='add'>+		     const struct devlink_health_reporter_ops *ops)</div><div class='add'>+{</div><div class='add'>+	struct devlink *devlink = priv_to_devlink(pf);</div><div class='add'>+	struct devlink_health_reporter *rep;</div><div class='add'>+</div><div class='add'>+	rep = devl_health_reporter_create(devlink, ops, pf);</div><div class='add'>+	if (IS_ERR(rep)) {</div><div class='add'>+		struct device *dev = ice_pf_to_dev(pf);</div><div class='add'>+</div><div class='add'>+		dev_err(dev, "failed to create devlink %s health report er",</div><div class='add'>+			ops-&gt;name);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return rep;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ICE_HEALTH_REPORTER_OPS_FIELD(_name, _field) \</div><div class='add'>+	._field = ice_##_name##_reporter_##_field,</div><div class='add'>+</div><div class='add'>+#define ICE_DEFINE_HEALTH_REPORTER_OPS_1(_name, _field1) \</div><div class='add'>+	static const struct devlink_health_reporter_ops ice_##_name##_reporter_ops = { \</div><div class='add'>+	.name = #_name, \</div><div class='add'>+	ICE_HEALTH_REPORTER_OPS_FIELD(_name, _field1) \</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define ICE_DEFINE_HEALTH_REPORTER_OPS_2(_name, _field1, _field2) \</div><div class='add'>+	static const struct devlink_health_reporter_ops ice_##_name##_reporter_ops = { \</div><div class='add'>+	.name = #_name, \</div><div class='add'>+	ICE_HEALTH_REPORTER_OPS_FIELD(_name, _field1) \</div><div class='add'>+	ICE_HEALTH_REPORTER_OPS_FIELD(_name, _field2) \</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+ICE_DEFINE_HEALTH_REPORTER_OPS_1(mdd, dump);</div><div class='add'>+ICE_DEFINE_HEALTH_REPORTER_OPS_1(tx_hang, dump);</div><div class='add'>+ICE_DEFINE_HEALTH_REPORTER_OPS_2(fw, dump, diagnose);</div><div class='add'>+ICE_DEFINE_HEALTH_REPORTER_OPS_2(port, dump, diagnose);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_health_init - allocate and init all ice devlink health reporters and</div><div class='add'>+ * accompanied data</div><div class='add'>+ *</div><div class='add'>+ * @pf: PF struct</div><div class='add'>+ */</div><div class='add'>+void ice_health_init(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct ice_health *reps = &amp;pf-&gt;health_reporters;</div><div class='add'>+</div><div class='add'>+	reps-&gt;mdd = ice_init_devlink_rep(pf, &amp;ice_mdd_reporter_ops);</div><div class='add'>+	reps-&gt;tx_hang = ice_init_devlink_rep(pf, &amp;ice_tx_hang_reporter_ops);</div><div class='add'>+</div><div class='add'>+	if (ice_is_fw_health_report_supported(&amp;pf-&gt;hw)) {</div><div class='add'>+		reps-&gt;fw = ice_init_devlink_rep(pf, &amp;ice_fw_reporter_ops);</div><div class='add'>+		reps-&gt;port = ice_init_devlink_rep(pf, &amp;ice_port_reporter_ops);</div><div class='add'>+		ice_config_health_events(pf, true);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_deinit_devl_reporter - destroy given devlink health reporter</div><div class='add'>+ * @reporter: reporter to destroy</div><div class='add'>+ */</div><div class='add'>+static void ice_deinit_devl_reporter(struct devlink_health_reporter *reporter)</div><div class='add'>+{</div><div class='add'>+	if (reporter)</div><div class='add'>+		devl_health_reporter_destroy(reporter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_health_deinit - deallocate all ice devlink health reporters and</div><div class='add'>+ * accompanied data</div><div class='add'>+ *</div><div class='add'>+ * @pf: PF struct</div><div class='add'>+ */</div><div class='add'>+void ice_health_deinit(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	ice_deinit_devl_reporter(pf-&gt;health_reporters.mdd);</div><div class='add'>+	ice_deinit_devl_reporter(pf-&gt;health_reporters.tx_hang);</div><div class='add'>+	if (ice_is_fw_health_report_supported(&amp;pf-&gt;hw)) {</div><div class='add'>+		ice_deinit_devl_reporter(pf-&gt;health_reporters.fw);</div><div class='add'>+		ice_deinit_devl_reporter(pf-&gt;health_reporters.port);</div><div class='add'>+		ice_config_health_events(pf, false);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+void ice_health_assign_healthy_state(struct devlink_health_reporter *reporter)</div><div class='add'>+{</div><div class='add'>+	if (reporter)</div><div class='add'>+		devlink_health_reporter_state_update(reporter,</div><div class='add'>+						     DEVLINK_HEALTH_REPORTER_STATE_HEALTHY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_health_clear - clear devlink health issues after a reset</div><div class='add'>+ * @pf: the PF device structure</div><div class='add'>+ *</div><div class='add'>+ * Mark the PF in healthy state again after a reset has completed.</div><div class='add'>+ */</div><div class='add'>+void ice_health_clear(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	ice_health_assign_healthy_state(pf-&gt;health_reporters.mdd);</div><div class='add'>+	ice_health_assign_healthy_state(pf-&gt;health_reporters.tx_hang);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/devlink/health.h b/drivers/net/ethernet/intel/ice/devlink/health.h<br/>new file mode 100644<br/>index 000000000000..5edfc4d2adce<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/devlink/health.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/devlink/health.h</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2024, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _HEALTH_H_</div><div class='add'>+#define _HEALTH_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: health.h</div><div class='add'>+ *</div><div class='add'>+ * This header file stores everything that is needed for broadly understood</div><div class='add'>+ * devlink health mechanism for ice driver.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct ice_aqc_health_status_elem;</div><div class='add'>+struct ice_pf;</div><div class='add'>+struct ice_tx_ring;</div><div class='add'>+struct ice_rq_event_info;</div><div class='add'>+</div><div class='add'>+enum ice_mdd_src {</div><div class='add'>+	ICE_MDD_SRC_TX_PQM,</div><div class='add'>+	ICE_MDD_SRC_TX_TCLAN,</div><div class='add'>+	ICE_MDD_SRC_TX_TDPU,</div><div class='add'>+	ICE_MDD_SRC_RX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ice_health - stores ice devlink health reporters and accompanied data</div><div class='add'>+ * @fw: devlink health reporter for FW Health Status events</div><div class='add'>+ * @mdd: devlink health reporter for MDD detection event</div><div class='add'>+ * @port: devlink health reporter for Port Health Status events</div><div class='add'>+ * @tx_hang: devlink health reporter for tx_hang event</div><div class='add'>+ * @tx_hang_buf: pre-allocated place to put info for Tx hang reporter from</div><div class='add'>+ *               non-sleeping context</div><div class='add'>+ * @tx_ring: ring that the hang occurred on</div><div class='add'>+ * @head: descriptor head</div><div class='add'>+ * @intr: interrupt register value</div><div class='add'>+ * @vsi_num: VSI owning the queue that the hang occurred on</div><div class='add'>+ * @fw_status: buffer for last received FW Status event</div><div class='add'>+ * @port_status: buffer for last received Port Status event</div><div class='add'>+ */</div><div class='add'>+struct ice_health {</div><div class='add'>+	struct devlink_health_reporter *fw;</div><div class='add'>+	struct devlink_health_reporter *mdd;</div><div class='add'>+	struct devlink_health_reporter *port;</div><div class='add'>+	struct devlink_health_reporter *tx_hang;</div><div class='add'>+	struct_group_tagged(ice_health_tx_hang_buf, tx_hang_buf,</div><div class='add'>+		struct ice_tx_ring *tx_ring;</div><div class='add'>+		u32 head;</div><div class='add'>+		u32 intr;</div><div class='add'>+		u16 vsi_num;</div><div class='add'>+	);</div><div class='add'>+	struct ice_aqc_health_status_elem fw_status;</div><div class='add'>+	struct ice_aqc_health_status_elem port_status;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ice_process_health_status_event(struct ice_pf *pf,</div><div class='add'>+				     struct ice_rq_event_info *event);</div><div class='add'>+</div><div class='add'>+void ice_health_init(struct ice_pf *pf);</div><div class='add'>+void ice_health_deinit(struct ice_pf *pf);</div><div class='add'>+void ice_health_clear(struct ice_pf *pf);</div><div class='add'>+</div><div class='add'>+void ice_prep_tx_hang_report(struct ice_pf *pf, struct ice_tx_ring *tx_ring,</div><div class='add'>+			     u16 vsi_num, u32 head, u32 intr);</div><div class='add'>+void ice_report_mdd_event(struct ice_pf *pf, enum ice_mdd_src src, u8 pf_num,</div><div class='add'>+			  u16 vf_num, u8 event, u16 queue);</div><div class='add'>+void ice_report_tx_hang(struct ice_pf *pf);</div><div class='add'>+</div><div class='add'>+#endif /* _HEALTH_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/devlink/devlink_port.c b/drivers/net/ethernet/intel/ice/devlink/port.c<br/>index c6779d9dffff..63fb36fc4b3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/devlink/devlink_port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/devlink/devlink_port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/devlink/port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/devlink/port.c</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "ice.h"</div><div class='ctx'> #include "devlink.h"</div><div class='del'>-#include "devlink_port.h"</div><div class='add'>+#include "port.h"</div><div class='ctx'> #include "ice_lib.h"</div><div class='ctx'> #include "ice_fltr.h"</div><div class='ctx'> </div><div class='hunk'>@@ -30,6 +30,8 @@ static const char *ice_devlink_port_opt_speed_str(u8 speed)</div><div class='ctx'> 		return "10";</div><div class='ctx'> 	case ICE_AQC_PORT_OPT_MAX_LANE_25G:</div><div class='ctx'> 		return "25";</div><div class='add'>+	case ICE_AQC_PORT_OPT_MAX_LANE_40G:</div><div class='add'>+		return "40";</div><div class='ctx'> 	case ICE_AQC_PORT_OPT_MAX_LANE_50G:</div><div class='ctx'> 		return "50";</div><div class='ctx'> 	case ICE_AQC_PORT_OPT_MAX_LANE_100G:</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/devlink/devlink_port.h b/drivers/net/ethernet/intel/ice/devlink/port.h<br/>index d60efc340945..e89ddd60eeac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/devlink/devlink_port.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/devlink/devlink_port.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/devlink/port.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/devlink/port.h</a></div><div class='hunk'>@@ -11,7 +11,7 @@</div><div class='ctx'>  * struct ice_dynamic_port - Track dynamically added devlink port instance</div><div class='ctx'>  * @hw_addr: the HW address for this port</div><div class='ctx'>  * @active: true if the port has been activated</div><div class='del'>- * @attached: true it the prot is attached</div><div class='add'>+ * @attached: true if the prot is attached</div><div class='ctx'>  * @devlink_port: the associated devlink port structure</div><div class='ctx'>  * @pf: pointer to the PF private structure</div><div class='ctx'>  * @vsi: the VSI associated with this port</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h<br/>index 680a81961ba1..147aaee192a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice.h</a></div><div class='hunk'>@@ -67,6 +67,7 @@</div><div class='ctx'> #include "ice_sriov.h"</div><div class='ctx'> #include "ice_vf_mbx.h"</div><div class='ctx'> #include "ice_ptp.h"</div><div class='add'>+#include "ice_tspll.h"</div><div class='ctx'> #include "ice_fdir.h"</div><div class='ctx'> #include "ice_xsk.h"</div><div class='ctx'> #include "ice_arfs.h"</div><div class='hunk'>@@ -78,11 +79,16 @@</div><div class='ctx'> #include "ice_irq.h"</div><div class='ctx'> #include "ice_dpll.h"</div><div class='ctx'> #include "ice_adapter.h"</div><div class='add'>+#include "devlink/health.h"</div><div class='ctx'> </div><div class='ctx'> #define ICE_BAR0		0</div><div class='ctx'> #define ICE_REQ_DESC_MULTIPLE	32</div><div class='ctx'> #define ICE_MIN_NUM_DESC	64</div><div class='del'>-#define ICE_MAX_NUM_DESC	8160</div><div class='add'>+#define ICE_MAX_NUM_DESC_E810	8160</div><div class='add'>+#define ICE_MAX_NUM_DESC_E830	8096</div><div class='add'>+#define ICE_MAX_NUM_DESC_BY_MAC(hw) ((hw)-&gt;mac_type == ICE_MAC_E830 ? \</div><div class='add'>+				     ICE_MAX_NUM_DESC_E830 : \</div><div class='add'>+				     ICE_MAX_NUM_DESC_E810)</div><div class='ctx'> #define ICE_DFLT_MIN_RX_DESC	512</div><div class='ctx'> #define ICE_DFLT_NUM_TX_DESC	256</div><div class='ctx'> #define ICE_DFLT_NUM_RX_DESC	2048</div><div class='hunk'>@@ -96,9 +102,6 @@</div><div class='ctx'> #define ICE_MIN_LAN_OICR_MSIX	1</div><div class='ctx'> #define ICE_MIN_MSIX		(ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)</div><div class='ctx'> #define ICE_FDIR_MSIX		2</div><div class='del'>-#define ICE_RDMA_NUM_AEQ_MSIX	4</div><div class='del'>-#define ICE_MIN_RDMA_MSIX	2</div><div class='del'>-#define ICE_ESWITCH_MSIX	1</div><div class='ctx'> #define ICE_NO_VSI		0xffff</div><div class='ctx'> #define ICE_VSI_MAP_CONTIG	0</div><div class='ctx'> #define ICE_VSI_MAP_SCATTER	1</div><div class='hunk'>@@ -181,11 +184,9 @@</div><div class='ctx'> #define ice_for_each_chnl_tc(i)	\</div><div class='ctx'> 	for ((i) = ICE_CHNL_START_TC; (i) &lt; ICE_CHNL_MAX_TC; (i)++)</div><div class='ctx'> </div><div class='del'>-#define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)</div><div class='add'>+#define ICE_UCAST_PROMISC_BITS ICE_PROMISC_UCAST_RX</div><div class='ctx'> </div><div class='del'>-#define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \</div><div class='del'>-				     ICE_PROMISC_UCAST_RX | \</div><div class='del'>-				     ICE_PROMISC_VLAN_TX  | \</div><div class='add'>+#define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_RX | \</div><div class='ctx'> 				     ICE_PROMISC_VLAN_RX)</div><div class='ctx'> </div><div class='ctx'> #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)</div><div class='hunk'>@@ -197,16 +198,17 @@</div><div class='ctx'> </div><div class='ctx'> #define ice_pf_to_dev(pf) (&amp;((pf)-&gt;pdev-&gt;dev))</div><div class='ctx'> </div><div class='del'>-#define ice_pf_src_tmr_owned(pf) ((pf)-&gt;hw.func_caps.ts_func_info.src_tmr_owned)</div><div class='del'>-</div><div class='ctx'> enum ice_feature {</div><div class='ctx'> 	ICE_F_DSCP,</div><div class='ctx'> 	ICE_F_PHY_RCLK,</div><div class='ctx'> 	ICE_F_SMA_CTRL,</div><div class='ctx'> 	ICE_F_CGU,</div><div class='ctx'> 	ICE_F_GNSS,</div><div class='add'>+	ICE_F_TXTIME,</div><div class='add'>+	ICE_F_GCS,</div><div class='ctx'> 	ICE_F_ROCE_LAG,</div><div class='ctx'> 	ICE_F_SRIOV_LAG,</div><div class='add'>+	ICE_F_SRIOV_AA_LAG,</div><div class='ctx'> 	ICE_F_MBX_LIMIT,</div><div class='ctx'> 	ICE_F_MAX</div><div class='ctx'> };</div><div class='hunk'>@@ -349,6 +351,7 @@ struct ice_vsi {</div><div class='ctx'> 	u16 num_q_vectors;</div><div class='ctx'> 	/* tell if only dynamic irq allocation is allowed */</div><div class='ctx'> 	bool irq_dyn_alloc;</div><div class='add'>+	bool hsplit:1;</div><div class='ctx'> </div><div class='ctx'> 	u16 vsi_num;			/* HW (absolute) index of this VSI */</div><div class='ctx'> 	u16 idx;			/* software index in pf-&gt;vsi[] */</div><div class='hunk'>@@ -372,6 +375,8 @@ struct ice_vsi {</div><div class='ctx'> 	spinlock_t arfs_lock;	/* protects aRFS hash table and filter state */</div><div class='ctx'> 	atomic_t *arfs_last_fltr_id;</div><div class='ctx'> </div><div class='add'>+	u16 max_frame;</div><div class='add'>+</div><div class='ctx'> 	struct ice_aqc_vsi_props info;	 /* VSI properties */</div><div class='ctx'> 	struct ice_vsi_vlan_info vlan_info;	/* vlan config to be restored */</div><div class='ctx'> </div><div class='hunk'>@@ -404,7 +409,6 @@ struct ice_vsi {</div><div class='ctx'> 	u16 req_rxq;			 /* User requested Rx queues */</div><div class='ctx'> 	u16 num_rx_desc;</div><div class='ctx'> 	u16 num_tx_desc;</div><div class='del'>-	u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];</div><div class='ctx'> 	struct ice_tc_cfg tc_cfg;</div><div class='ctx'> 	struct bpf_prog *xdp_prog;</div><div class='ctx'> 	struct ice_tx_ring **xdp_rings;	 /* XDP ring array */</div><div class='hunk'>@@ -479,9 +483,6 @@ struct ice_q_vector {</div><div class='ctx'> 	struct ice_ring_container rx;</div><div class='ctx'> 	struct ice_ring_container tx;</div><div class='ctx'> </div><div class='del'>-	cpumask_t affinity_mask;</div><div class='del'>-	struct irq_affinity_notify affinity_notify;</div><div class='del'>-</div><div class='ctx'> 	struct ice_channel *ch;</div><div class='ctx'> </div><div class='ctx'> 	char name[ICE_INT_NAME_STR_LEN];</div><div class='hunk'>@@ -511,16 +512,17 @@ enum ice_pf_flags {</div><div class='ctx'> 	ICE_FLAG_MOD_POWER_UNSUPPORTED,</div><div class='ctx'> 	ICE_FLAG_PHY_FW_LOAD_FAILED,</div><div class='ctx'> 	ICE_FLAG_ETHTOOL_CTXT,		/* set when ethtool holds RTNL lock */</div><div class='del'>-	ICE_FLAG_LEGACY_RX,</div><div class='ctx'> 	ICE_FLAG_VF_TRUE_PROMISC_ENA,</div><div class='ctx'> 	ICE_FLAG_MDD_AUTO_RESET_VF,</div><div class='ctx'> 	ICE_FLAG_VF_VLAN_PRUNING,</div><div class='ctx'> 	ICE_FLAG_LINK_LENIENT_MODE_ENA,</div><div class='ctx'> 	ICE_FLAG_PLUG_AUX_DEV,</div><div class='ctx'> 	ICE_FLAG_UNPLUG_AUX_DEV,</div><div class='add'>+	ICE_FLAG_AUX_DEV_CREATED,</div><div class='ctx'> 	ICE_FLAG_MTU_CHANGED,</div><div class='ctx'> 	ICE_FLAG_GNSS,			/* GNSS successfully initialized */</div><div class='ctx'> 	ICE_FLAG_DPLL,			/* SyncE/PTP dplls initialized */</div><div class='add'>+	ICE_FLAG_LLDP_AQ_FLTR,</div><div class='ctx'> 	ICE_PF_FLAGS_NBITS		/* must be last */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -543,6 +545,14 @@ struct ice_agg_node {</div><div class='ctx'> 	u8 valid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ice_pf_msix {</div><div class='add'>+	u32 cur;</div><div class='add'>+	u32 min;</div><div class='add'>+	u32 max;</div><div class='add'>+	u32 total;</div><div class='add'>+	u32 rest;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ice_pf {</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	struct ice_adapter *adapter;</div><div class='hunk'>@@ -555,15 +565,8 @@ struct ice_pf {</div><div class='ctx'> 	struct devlink_port devlink_port;</div><div class='ctx'> </div><div class='ctx'> 	/* OS reserved IRQ details */</div><div class='del'>-	struct msix_entry *msix_entries;</div><div class='ctx'> 	struct ice_irq_tracker irq_tracker;</div><div class='del'>-	/* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the</div><div class='del'>-	 * number of MSIX vectors needed for all SR-IOV VFs from the number of</div><div class='del'>-	 * MSIX vectors allowed on this PF.</div><div class='del'>-	 */</div><div class='del'>-	u16 sriov_base_vector;</div><div class='del'>-	unsigned long *sriov_irq_bm;	/* bitmap to track irq usage */</div><div class='del'>-	u16 sriov_irq_size;		/* size of the irq_bm bitmap */</div><div class='add'>+	struct ice_virt_irq_tracker virt_irq_tracker;</div><div class='ctx'> </div><div class='ctx'> 	u16 ctrl_vsi_idx;		/* control VSI index in pf-&gt;vsi array */</div><div class='ctx'> </div><div class='hunk'>@@ -572,9 +575,6 @@ struct ice_pf {</div><div class='ctx'> 	struct ice_sw *first_sw;	/* first switch created by firmware */</div><div class='ctx'> 	u16 eswitch_mode;		/* current mode of eswitch */</div><div class='ctx'> 	struct dentry *ice_debugfs_pf;</div><div class='del'>-	struct dentry *ice_debugfs_pf_fwlog;</div><div class='del'>-	/* keep track of all the dentrys for FW log modules */</div><div class='del'>-	struct dentry **ice_debugfs_pf_fwlog_modules;</div><div class='ctx'> 	struct ice_vfs vfs;</div><div class='ctx'> 	DECLARE_BITMAP(features, ICE_F_MAX);</div><div class='ctx'> 	DECLARE_BITMAP(state, ICE_STATE_NBITS);</div><div class='hunk'>@@ -582,6 +582,7 @@ struct ice_pf {</div><div class='ctx'> 	DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS);</div><div class='ctx'> 	unsigned long *avail_txqs;	/* bitmap to track PF Tx queue usage */</div><div class='ctx'> 	unsigned long *avail_rxqs;	/* bitmap to track PF Rx queue usage */</div><div class='add'>+	unsigned long *txtime_txqs;     /* bitmap to track PF Tx Time queue */</div><div class='ctx'> 	unsigned long serv_tmr_period;</div><div class='ctx'> 	unsigned long serv_tmr_prev;</div><div class='ctx'> 	struct timer_list serv_tmr;</div><div class='hunk'>@@ -596,7 +597,6 @@ struct ice_pf {</div><div class='ctx'> 	struct gnss_serial *gnss_serial;</div><div class='ctx'> 	struct gnss_device *gnss_dev;</div><div class='ctx'> 	u16 num_rdma_msix;		/* Total MSIX vectors for RDMA driver */</div><div class='del'>-	u16 rdma_base_vector;</div><div class='ctx'> </div><div class='ctx'> 	/* spinlock to protect the AdminQ wait list */</div><div class='ctx'> 	spinlock_t aq_wait_lock;</div><div class='hunk'>@@ -613,7 +613,7 @@ struct ice_pf {</div><div class='ctx'> 	struct msi_map ll_ts_irq;	/* LL_TS interrupt MSIX vector */</div><div class='ctx'> 	u16 max_pf_txqs;	/* Total Tx queues PF wide */</div><div class='ctx'> 	u16 max_pf_rxqs;	/* Total Rx queues PF wide */</div><div class='del'>-	u16 num_lan_msix;	/* Total MSIX vectors for base driver */</div><div class='add'>+	struct ice_pf_msix msix;</div><div class='ctx'> 	u16 num_lan_tx;		/* num LAN Tx queues setup */</div><div class='ctx'> 	u16 num_lan_rx;		/* num LAN Rx queues setup */</div><div class='ctx'> 	u16 next_vsi;		/* Next free slot in pf-&gt;vsi[] - 0-based! */</div><div class='hunk'>@@ -622,6 +622,7 @@ struct ice_pf {</div><div class='ctx'> 	u16 globr_count;	/* Global reset count */</div><div class='ctx'> 	u16 empr_count;		/* EMP reset count */</div><div class='ctx'> 	u16 pfr_count;		/* PF reset count */</div><div class='add'>+	u32 link_down_events;</div><div class='ctx'> </div><div class='ctx'> 	u8 wol_ena : 1;		/* software state of WoL */</div><div class='ctx'> 	u32 wakeup_reason;	/* last wakeup reason */</div><div class='hunk'>@@ -629,14 +630,12 @@ struct ice_pf {</div><div class='ctx'> 	struct ice_hw_port_stats stats_prev;</div><div class='ctx'> 	struct ice_hw hw;</div><div class='ctx'> 	u8 stat_prev_loaded:1; /* has previous stats been loaded */</div><div class='del'>-	u8 rdma_mode;</div><div class='ctx'> 	u16 dcbx_cap;</div><div class='ctx'> 	u32 tx_timeout_count;</div><div class='ctx'> 	unsigned long tx_timeout_last_recovery;</div><div class='ctx'> 	u32 tx_timeout_recovery_level;</div><div class='ctx'> 	char int_name[ICE_INT_NAME_STR_LEN];</div><div class='ctx'> 	char int_name_ll_ts[ICE_INT_NAME_STR_LEN];</div><div class='del'>-	struct auxiliary_device *adev;</div><div class='ctx'> 	int aux_idx;</div><div class='ctx'> 	u32 sw_int_count;</div><div class='ctx'> 	/* count of tc_flower filters specific to channel (aka where filter</div><div class='hunk'>@@ -667,6 +666,8 @@ struct ice_pf {</div><div class='ctx'> 	struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];</div><div class='ctx'> 	struct ice_dplls dplls;</div><div class='ctx'> 	struct device *hwmon_dev;</div><div class='add'>+	struct ice_health health_reporters;</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev_info;</div><div class='ctx'> </div><div class='ctx'> 	u8 num_quanta_prof_used;</div><div class='ctx'> };</div><div class='hunk'>@@ -756,6 +757,31 @@ static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_is_txtime_ena - check if Tx Time is enabled on the Tx ring</div><div class='add'>+ * @ring: pointer to Tx ring</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the Tx ring has Tx Time enabled, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static inline bool ice_is_txtime_ena(const struct ice_tx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct ice_vsi *vsi = ring-&gt;vsi;</div><div class='add'>+	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+</div><div class='add'>+	return test_bit(ring-&gt;q_index,  pf-&gt;txtime_txqs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_is_txtime_cfg - check if Tx Time is configured on the Tx ring</div><div class='add'>+ * @ring: pointer to Tx ring</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the Tx ring is configured for Tx ring, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static inline bool ice_is_txtime_cfg(const struct ice_tx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return !!(ring-&gt;flags &amp; ICE_TX_FLAGS_TXTIME);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID</div><div class='ctx'>  * @vsi: pointer to VSI</div><div class='ctx'>  * @qid: index of a queue to look at XSK buff pool presence</div><div class='hunk'>@@ -912,11 +938,10 @@ static inline bool ice_is_adq_active(struct ice_pf *pf)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ice_debugfs_fwlog_init(struct ice_pf *pf);</div><div class='add'>+int ice_debugfs_pf_init(struct ice_pf *pf);</div><div class='ctx'> void ice_debugfs_pf_deinit(struct ice_pf *pf);</div><div class='ctx'> void ice_debugfs_init(void);</div><div class='ctx'> void ice_debugfs_exit(void);</div><div class='del'>-void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module);</div><div class='ctx'> </div><div class='ctx'> bool netif_is_ice(const struct net_device *dev);</div><div class='ctx'> int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);</div><div class='hunk'>@@ -966,7 +991,6 @@ int ice_plug_aux_dev(struct ice_pf *pf);</div><div class='ctx'> void ice_unplug_aux_dev(struct ice_pf *pf);</div><div class='ctx'> int ice_init_rdma(struct ice_pf *pf);</div><div class='ctx'> void ice_deinit_rdma(struct ice_pf *pf);</div><div class='del'>-const char *ice_aq_str(enum ice_aq_err aq_err);</div><div class='ctx'> bool ice_is_wol_supported(struct ice_hw *hw);</div><div class='ctx'> void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);</div><div class='ctx'> int</div><div class='hunk'>@@ -1007,11 +1031,15 @@ int ice_open(struct net_device *netdev);</div><div class='ctx'> int ice_open_internal(struct net_device *netdev);</div><div class='ctx'> int ice_stop(struct net_device *netdev);</div><div class='ctx'> void ice_service_task_schedule(struct ice_pf *pf);</div><div class='add'>+void ice_start_service_task(struct ice_pf *pf);</div><div class='ctx'> int ice_load(struct ice_pf *pf);</div><div class='ctx'> void ice_unload(struct ice_pf *pf);</div><div class='ctx'> void ice_adv_lnk_speed_maps_init(void);</div><div class='add'>+void ice_init_dev_hw(struct ice_pf *pf);</div><div class='ctx'> int ice_init_dev(struct ice_pf *pf);</div><div class='ctx'> void ice_deinit_dev(struct ice_pf *pf);</div><div class='add'>+int ice_init_pf(struct ice_pf *pf);</div><div class='add'>+void ice_deinit_pf(struct ice_pf *pf);</div><div class='ctx'> int ice_change_mtu(struct net_device *netdev, int new_mtu);</div><div class='ctx'> void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue);</div><div class='ctx'> int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp);</div><div class='hunk'>@@ -1047,10 +1075,63 @@ static inline void ice_clear_rdma_cap(struct ice_pf *pf)</div><div class='ctx'> 	clear_bit(ICE_FLAG_RDMA_ENA, pf-&gt;flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline enum ice_phy_model ice_get_phy_model(const struct ice_hw *hw)</div><div class='add'>+extern const struct xdp_metadata_ops ice_xdp_md_ops;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_is_dual - Check if given config is multi-NAC</div><div class='add'>+ * @hw: pointer to HW structure</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the device is running in mutli-NAC (Network</div><div class='add'>+ * Acceleration Complex) configuration variant, false otherwise</div><div class='add'>+ * (always false for non-E825 devices).</div><div class='add'>+ */</div><div class='add'>+static inline bool ice_is_dual(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	return hw-&gt;mac_type == ICE_MAC_GENERIC_3K_E825 &amp;&amp;</div><div class='add'>+	       (hw-&gt;dev_caps.nac_topo.mode &amp; ICE_NAC_TOPO_DUAL_M);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_is_primary - Check if given device belongs to the primary complex</div><div class='add'>+ * @hw: pointer to HW structure</div><div class='add'>+ *</div><div class='add'>+ * Check if given PF/HW is running on primary complex in multi-NAC</div><div class='add'>+ * configuration.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the device is dual, false otherwise (always true</div><div class='add'>+ * for non-E825 devices).</div><div class='add'>+ */</div><div class='add'>+static inline bool ice_is_primary(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	return hw-&gt;ptp.phy_model;</div><div class='add'>+	return hw-&gt;mac_type != ICE_MAC_GENERIC_3K_E825 ||</div><div class='add'>+	       !ice_is_dual(hw) ||</div><div class='add'>+	       (hw-&gt;dev_caps.nac_topo.mode &amp; ICE_NAC_TOPO_PRIMARY_M);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-extern const struct xdp_metadata_ops ice_xdp_md_ops;</div><div class='add'>+/**</div><div class='add'>+ * ice_pf_src_tmr_owned - Check if a primary timer is owned by PF</div><div class='add'>+ * @pf: pointer to PF structure</div><div class='add'>+ *</div><div class='add'>+ * Return: true if PF owns primary timer, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static inline bool ice_pf_src_tmr_owned(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	return pf-&gt;hw.func_caps.ts_func_info.src_tmr_owned &amp;&amp;</div><div class='add'>+	       ice_is_primary(&amp;pf-&gt;hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_get_primary_hw - Get pointer to primary ice_hw structure</div><div class='add'>+ * @pf: pointer to PF structure</div><div class='add'>+ *</div><div class='add'>+ * Return: A pointer to ice_hw structure with access to timesync</div><div class='add'>+ * register space.</div><div class='add'>+ */</div><div class='add'>+static inline struct ice_hw *ice_get_primary_hw(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	if (!pf-&gt;adapter-&gt;ctrl_pf)</div><div class='add'>+		return &amp;pf-&gt;hw;</div><div class='add'>+	else</div><div class='add'>+		return &amp;pf-&gt;adapter-&gt;ctrl_pf-&gt;hw;</div><div class='add'>+}</div><div class='ctx'> #endif /* _ICE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_adapter.c b/drivers/net/ethernet/intel/ice/ice_adapter.c<br/>index 01a08cfd0090..0a8a48cd4bce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_adapter.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_adapter.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_adapter.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_adapter.c</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> // SPDX-FileCopyrightText: Copyright Red Hat</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/cleanup.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='hunk'>@@ -14,32 +13,45 @@</div><div class='ctx'> static DEFINE_XARRAY(ice_adapters);</div><div class='ctx'> static DEFINE_MUTEX(ice_adapters_mutex);</div><div class='ctx'> </div><div class='del'>-/* PCI bus number is 8 bits. Slot is 5 bits. Domain can have the rest. */</div><div class='del'>-#define INDEX_FIELD_DOMAIN GENMASK(BITS_PER_LONG - 1, 13)</div><div class='del'>-#define INDEX_FIELD_DEV    GENMASK(31, 16)</div><div class='del'>-#define INDEX_FIELD_BUS    GENMASK(12, 5)</div><div class='del'>-#define INDEX_FIELD_SLOT   GENMASK(4, 0)</div><div class='add'>+#define ICE_ADAPTER_FIXED_INDEX	BIT_ULL(63)</div><div class='ctx'> </div><div class='del'>-static unsigned long ice_adapter_index(const struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	unsigned int domain = pci_domain_nr(pdev-&gt;bus);</div><div class='del'>-</div><div class='del'>-	WARN_ON(domain &gt; FIELD_MAX(INDEX_FIELD_DOMAIN));</div><div class='add'>+#define ICE_ADAPTER_INDEX_E825C	\</div><div class='add'>+	(ICE_DEV_ID_E825C_BACKPLANE | ICE_ADAPTER_FIXED_INDEX)</div><div class='ctx'> </div><div class='add'>+static u64 ice_adapter_index(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='ctx'> 	switch (pdev-&gt;device) {</div><div class='ctx'> 	case ICE_DEV_ID_E825C_BACKPLANE:</div><div class='ctx'> 	case ICE_DEV_ID_E825C_QSFP:</div><div class='ctx'> 	case ICE_DEV_ID_E825C_SFP:</div><div class='ctx'> 	case ICE_DEV_ID_E825C_SGMII:</div><div class='del'>-		return FIELD_PREP(INDEX_FIELD_DEV, pdev-&gt;device);</div><div class='add'>+		/* E825C devices have multiple NACs which are connected to the</div><div class='add'>+		 * same clock source, and which must share the same</div><div class='add'>+		 * ice_adapter structure. We can't use the serial number since</div><div class='add'>+		 * each NAC has its own NVM generated with its own unique</div><div class='add'>+		 * Device Serial Number. Instead, rely on the embedded nature</div><div class='add'>+		 * of the E825C devices, and use a fixed index. This relies on</div><div class='add'>+		 * the fact that all E825C physical functions in a given</div><div class='add'>+		 * system are part of the same overall device.</div><div class='add'>+		 */</div><div class='add'>+		return ICE_ADAPTER_INDEX_E825C;</div><div class='ctx'> 	default:</div><div class='del'>-		return FIELD_PREP(INDEX_FIELD_DOMAIN, domain) |</div><div class='del'>-		       FIELD_PREP(INDEX_FIELD_BUS,    pdev-&gt;bus-&gt;number) |</div><div class='del'>-		       FIELD_PREP(INDEX_FIELD_SLOT,   PCI_SLOT(pdev-&gt;devfn));</div><div class='add'>+		return pci_get_dsn(pdev) &amp; ~ICE_ADAPTER_FIXED_INDEX;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct ice_adapter *ice_adapter_new(void)</div><div class='add'>+static unsigned long ice_adapter_xa_index(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	u64 index = ice_adapter_index(pdev);</div><div class='add'>+</div><div class='add'>+#if BITS_PER_LONG == 64</div><div class='add'>+	return index;</div><div class='add'>+#else</div><div class='add'>+	return (u32)index ^ (u32)(index &gt;&gt; 32);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ice_adapter *ice_adapter_new(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_adapter *adapter;</div><div class='ctx'> </div><div class='hunk'>@@ -47,7 +59,9 @@ static struct ice_adapter *ice_adapter_new(void)</div><div class='ctx'> 	if (!adapter)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	adapter-&gt;index = ice_adapter_index(pdev);</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;ptp_gltsyn_time_lock);</div><div class='add'>+	spin_lock_init(&amp;adapter-&gt;txq_ctx_lock);</div><div class='ctx'> 	refcount_set(&amp;adapter-&gt;refcount, 1);</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;adapter-&gt;ports.lock);</div><div class='hunk'>@@ -77,25 +91,29 @@ static void ice_adapter_free(struct ice_adapter *adapter)</div><div class='ctx'>  * Return:  Pointer to ice_adapter on success.</div><div class='ctx'>  *          ERR_PTR() on error. -ENOMEM is the only possible error.</div><div class='ctx'>  */</div><div class='del'>-struct ice_adapter *ice_adapter_get(const struct pci_dev *pdev)</div><div class='add'>+struct ice_adapter *ice_adapter_get(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	unsigned long index = ice_adapter_index(pdev);</div><div class='ctx'> 	struct ice_adapter *adapter;</div><div class='add'>+	unsigned long index;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	index = ice_adapter_xa_index(pdev);</div><div class='ctx'> 	scoped_guard(mutex, &amp;ice_adapters_mutex) {</div><div class='del'>-		err = xa_insert(&amp;ice_adapters, index, NULL, GFP_KERNEL);</div><div class='del'>-		if (err == -EBUSY) {</div><div class='del'>-			adapter = xa_load(&amp;ice_adapters, index);</div><div class='add'>+		adapter = xa_load(&amp;ice_adapters, index);</div><div class='add'>+		if (adapter) {</div><div class='ctx'> 			refcount_inc(&amp;adapter-&gt;refcount);</div><div class='add'>+			WARN_ON_ONCE(adapter-&gt;index != ice_adapter_index(pdev));</div><div class='ctx'> 			return adapter;</div><div class='ctx'> 		}</div><div class='add'>+		err = xa_reserve(&amp;ice_adapters, index, GFP_KERNEL);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return ERR_PTR(err);</div><div class='ctx'> </div><div class='del'>-		adapter = ice_adapter_new();</div><div class='del'>-		if (!adapter)</div><div class='add'>+		adapter = ice_adapter_new(pdev);</div><div class='add'>+		if (!adapter) {</div><div class='add'>+			xa_release(&amp;ice_adapters, index);</div><div class='ctx'> 			return ERR_PTR(-ENOMEM);</div><div class='add'>+		}</div><div class='ctx'> 		xa_store(&amp;ice_adapters, index, adapter, GFP_KERNEL);</div><div class='ctx'> 	}</div><div class='ctx'> 	return adapter;</div><div class='hunk'>@@ -110,11 +128,12 @@ struct ice_adapter *ice_adapter_get(const struct pci_dev *pdev)</div><div class='ctx'>  *</div><div class='ctx'>  * Context: Process, may sleep.</div><div class='ctx'>  */</div><div class='del'>-void ice_adapter_put(const struct pci_dev *pdev)</div><div class='add'>+void ice_adapter_put(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	unsigned long index = ice_adapter_index(pdev);</div><div class='ctx'> 	struct ice_adapter *adapter;</div><div class='add'>+	unsigned long index;</div><div class='ctx'> </div><div class='add'>+	index = ice_adapter_xa_index(pdev);</div><div class='ctx'> 	scoped_guard(mutex, &amp;ice_adapters_mutex) {</div><div class='ctx'> 		adapter = xa_load(&amp;ice_adapters, index);</div><div class='ctx'> 		if (WARN_ON(!adapter))</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_adapter.h b/drivers/net/ethernet/intel/ice/ice_adapter.h<br/>index e233225848b3..e95266c7f20b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_adapter.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_adapter.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_adapter.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_adapter.h</a></div><div class='hunk'>@@ -27,22 +27,27 @@ struct ice_port_list {</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct ice_adapter - PCI adapter resources shared across PFs</div><div class='add'>+ * @refcount: Reference count. struct ice_pf objects hold the references.</div><div class='ctx'>  * @ptp_gltsyn_time_lock: Spinlock protecting access to the GLTSYN_TIME</div><div class='ctx'>  *                        register of the PTP clock.</div><div class='del'>- * @refcount: Reference count. struct ice_pf objects hold the references.</div><div class='add'>+ * @txq_ctx_lock: Spinlock protecting access to the GLCOMM_QTX_CNTX_CTL register</div><div class='ctx'>  * @ctrl_pf: Control PF of the adapter</div><div class='ctx'>  * @ports: Ports list</div><div class='add'>+ * @index: 64-bit index cached for collision detection on 32bit systems</div><div class='ctx'>  */</div><div class='ctx'> struct ice_adapter {</div><div class='ctx'> 	refcount_t refcount;</div><div class='ctx'> 	/* For access to the GLTSYN_TIME register */</div><div class='ctx'> 	spinlock_t ptp_gltsyn_time_lock;</div><div class='add'>+	/* For access to GLCOMM_QTX_CNTX_CTL register */</div><div class='add'>+	spinlock_t txq_ctx_lock;</div><div class='ctx'> </div><div class='ctx'> 	struct ice_pf *ctrl_pf;</div><div class='ctx'> 	struct ice_port_list ports;</div><div class='add'>+	u64 index;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ice_adapter *ice_adapter_get(const struct pci_dev *pdev);</div><div class='del'>-void ice_adapter_put(const struct pci_dev *pdev);</div><div class='add'>+struct ice_adapter *ice_adapter_get(struct pci_dev *pdev);</div><div class='add'>+void ice_adapter_put(struct pci_dev *pdev);</div><div class='ctx'> </div><div class='ctx'> #endif /* _ICE_ADAPTER_H */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h<br/>index 1f01f3501d6b..859e9c66f3e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_adminq_cmd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_adminq_cmd.h</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> #ifndef _ICE_ADMINQ_CMD_H_</div><div class='ctx'> #define _ICE_ADMINQ_CMD_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/net/intel/libie/adminq.h&gt;</div><div class='add'>+</div><div class='ctx'> /* This header file defines the Admin Queue commands, error codes and</div><div class='ctx'>  * descriptor format. It is shared between Firmware and Software.</div><div class='ctx'>  */</div><div class='hunk'>@@ -12,37 +14,28 @@</div><div class='ctx'> #define ICE_AQC_TOPO_MAX_LEVEL_NUM	0x9</div><div class='ctx'> #define ICE_AQ_SET_MAC_FRAME_SIZE_MAX	9728</div><div class='ctx'> </div><div class='del'>-struct ice_aqc_generic {</div><div class='del'>-	__le32 param0;</div><div class='del'>-	__le32 param1;</div><div class='del'>-	__le32 addr_high;</div><div class='del'>-	__le32 addr_low;</div><div class='del'>-};</div><div class='add'>+#define ICE_RXQ_CTX_SIZE_DWORDS		8</div><div class='add'>+#define ICE_RXQ_CTX_SZ			(ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32))</div><div class='ctx'> </div><div class='del'>-/* Get version (direct 0x0001) */</div><div class='del'>-struct ice_aqc_get_ver {</div><div class='del'>-	__le32 rom_ver;</div><div class='del'>-	__le32 fw_build;</div><div class='del'>-	u8 fw_branch;</div><div class='del'>-	u8 fw_major;</div><div class='del'>-	u8 fw_minor;</div><div class='del'>-	u8 fw_patch;</div><div class='del'>-	u8 api_branch;</div><div class='del'>-	u8 api_major;</div><div class='del'>-	u8 api_minor;</div><div class='del'>-	u8 api_patch;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Send driver version (indirect 0x0002) */</div><div class='del'>-struct ice_aqc_driver_ver {</div><div class='del'>-	u8 major_ver;</div><div class='del'>-	u8 minor_ver;</div><div class='del'>-	u8 build_ver;</div><div class='del'>-	u8 subbuild_ver;</div><div class='del'>-	u8 reserved[4];</div><div class='del'>-	__le32 addr_high;</div><div class='del'>-	__le32 addr_low;</div><div class='del'>-};</div><div class='add'>+typedef struct __packed { u8 buf[ICE_RXQ_CTX_SZ]; } ice_rxq_ctx_buf_t;</div><div class='add'>+</div><div class='add'>+/* The Tx queue context is 40 bytes, and includes some internal state. The</div><div class='add'>+ * Admin Queue buffers don't include the internal state, so only include the</div><div class='add'>+ * first 22 bytes of the context.</div><div class='add'>+ */</div><div class='add'>+#define ICE_TXQ_CTX_SZ			22</div><div class='add'>+</div><div class='add'>+typedef struct __packed { u8 buf[ICE_TXQ_CTX_SZ]; } ice_txq_ctx_buf_t;</div><div class='add'>+</div><div class='add'>+#define ICE_TXQ_CTX_FULL_SIZE_DWORDS	10</div><div class='add'>+#define ICE_TXQ_CTX_FULL_SZ \</div><div class='add'>+	(ICE_TXQ_CTX_FULL_SIZE_DWORDS * sizeof(u32))</div><div class='add'>+</div><div class='add'>+typedef struct __packed { u8 buf[ICE_TXQ_CTX_FULL_SZ]; } ice_txq_ctx_buf_full_t;</div><div class='add'>+</div><div class='add'>+#define ICE_TXTIME_CTX_SZ		25</div><div class='add'>+</div><div class='add'>+typedef struct __packed { u8 buf[ICE_TXTIME_CTX_SZ]; } ice_txtime_ctx_buf_t;</div><div class='ctx'> </div><div class='ctx'> /* Queue Shutdown (direct 0x0003) */</div><div class='ctx'> struct ice_aqc_q_shutdown {</div><div class='hunk'>@@ -51,94 +44,6 @@ struct ice_aqc_q_shutdown {</div><div class='ctx'> 	u8 reserved[15];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Request resource ownership (direct 0x0008)</div><div class='del'>- * Release resource ownership (direct 0x0009)</div><div class='del'>- */</div><div class='del'>-struct ice_aqc_req_res {</div><div class='del'>-	__le16 res_id;</div><div class='del'>-#define ICE_AQC_RES_ID_NVM		1</div><div class='del'>-#define ICE_AQC_RES_ID_SDP		2</div><div class='del'>-#define ICE_AQC_RES_ID_CHNG_LOCK	3</div><div class='del'>-#define ICE_AQC_RES_ID_GLBL_LOCK	4</div><div class='del'>-	__le16 access_type;</div><div class='del'>-#define ICE_AQC_RES_ACCESS_READ		1</div><div class='del'>-#define ICE_AQC_RES_ACCESS_WRITE	2</div><div class='del'>-</div><div class='del'>-	/* Upon successful completion, FW writes this value and driver is</div><div class='del'>-	 * expected to release resource before timeout. This value is provided</div><div class='del'>-	 * in milliseconds.</div><div class='del'>-	 */</div><div class='del'>-	__le32 timeout;</div><div class='del'>-#define ICE_AQ_RES_NVM_READ_DFLT_TIMEOUT_MS	3000</div><div class='del'>-#define ICE_AQ_RES_NVM_WRITE_DFLT_TIMEOUT_MS	180000</div><div class='del'>-#define ICE_AQ_RES_CHNG_LOCK_DFLT_TIMEOUT_MS	1000</div><div class='del'>-#define ICE_AQ_RES_GLBL_LOCK_DFLT_TIMEOUT_MS	3000</div><div class='del'>-	/* For SDP: pin ID of the SDP */</div><div class='del'>-	__le32 res_number;</div><div class='del'>-	/* Status is only used for ICE_AQC_RES_ID_GLBL_LOCK */</div><div class='del'>-	__le16 status;</div><div class='del'>-#define ICE_AQ_RES_GLBL_SUCCESS		0</div><div class='del'>-#define ICE_AQ_RES_GLBL_IN_PROG		1</div><div class='del'>-#define ICE_AQ_RES_GLBL_DONE		2</div><div class='del'>-	u8 reserved[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Get function capabilities (indirect 0x000A)</div><div class='del'>- * Get device capabilities (indirect 0x000B)</div><div class='del'>- */</div><div class='del'>-struct ice_aqc_list_caps {</div><div class='del'>-	u8 cmd_flags;</div><div class='del'>-	u8 pf_index;</div><div class='del'>-	u8 reserved[2];</div><div class='del'>-	__le32 count;</div><div class='del'>-	__le32 addr_high;</div><div class='del'>-	__le32 addr_low;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Device/Function buffer entry, repeated per reported capability */</div><div class='del'>-struct ice_aqc_list_caps_elem {</div><div class='del'>-	__le16 cap;</div><div class='del'>-#define ICE_AQC_CAPS_VALID_FUNCTIONS			0x0005</div><div class='del'>-#define ICE_AQC_CAPS_SRIOV				0x0012</div><div class='del'>-#define ICE_AQC_CAPS_VF					0x0013</div><div class='del'>-#define ICE_AQC_CAPS_VSI				0x0017</div><div class='del'>-#define ICE_AQC_CAPS_DCB				0x0018</div><div class='del'>-#define ICE_AQC_CAPS_RSS				0x0040</div><div class='del'>-#define ICE_AQC_CAPS_RXQS				0x0041</div><div class='del'>-#define ICE_AQC_CAPS_TXQS				0x0042</div><div class='del'>-#define ICE_AQC_CAPS_MSIX				0x0043</div><div class='del'>-#define ICE_AQC_CAPS_FD					0x0045</div><div class='del'>-#define ICE_AQC_CAPS_1588				0x0046</div><div class='del'>-#define ICE_AQC_CAPS_MAX_MTU				0x0047</div><div class='del'>-#define ICE_AQC_CAPS_NVM_VER				0x0048</div><div class='del'>-#define ICE_AQC_CAPS_PENDING_NVM_VER			0x0049</div><div class='del'>-#define ICE_AQC_CAPS_OROM_VER				0x004A</div><div class='del'>-#define ICE_AQC_CAPS_PENDING_OROM_VER			0x004B</div><div class='del'>-#define ICE_AQC_CAPS_NET_VER				0x004C</div><div class='del'>-#define ICE_AQC_CAPS_PENDING_NET_VER			0x004D</div><div class='del'>-#define ICE_AQC_CAPS_RDMA				0x0051</div><div class='del'>-#define ICE_AQC_CAPS_SENSOR_READING			0x0067</div><div class='del'>-#define ICE_AQC_CAPS_PCIE_RESET_AVOIDANCE		0x0076</div><div class='del'>-#define ICE_AQC_CAPS_POST_UPDATE_RESET_RESTRICT		0x0077</div><div class='del'>-#define ICE_AQC_CAPS_NVM_MGMT				0x0080</div><div class='del'>-#define ICE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE		0x0085</div><div class='del'>-#define ICE_AQC_CAPS_NAC_TOPOLOGY			0x0087</div><div class='del'>-#define ICE_AQC_CAPS_FW_LAG_SUPPORT			0x0092</div><div class='del'>-#define ICE_AQC_BIT_ROCEV2_LAG				0x01</div><div class='del'>-#define ICE_AQC_BIT_SRIOV_LAG				0x02</div><div class='del'>-</div><div class='del'>-	u8 major_ver;</div><div class='del'>-	u8 minor_ver;</div><div class='del'>-	/* Number of resources described by this capability */</div><div class='del'>-	__le32 number;</div><div class='del'>-	/* Only meaningful for some types of resources */</div><div class='del'>-	__le32 logical_id;</div><div class='del'>-	/* Only meaningful for some types of resources */</div><div class='del'>-	__le32 phys_id;</div><div class='del'>-	__le64 rsvd1;</div><div class='del'>-	__le64 rsvd2;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Manage MAC address, read command - indirect (0x0107)</div><div class='ctx'>  * This struct is also used for the response</div><div class='ctx'>  */</div><div class='hunk'>@@ -1491,7 +1396,23 @@ struct ice_aqc_dnl_equa_param {</div><div class='ctx'> #define ICE_AQC_RX_EQU_POST1 (0x12 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='ctx'> #define ICE_AQC_RX_EQU_BFLF (0x13 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='ctx'> #define ICE_AQC_RX_EQU_BFHF (0x14 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='del'>-#define ICE_AQC_RX_EQU_DRATE (0x15 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_CTLE_GAINHF (0x20 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_CTLE_GAINLF (0x21 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_CTLE_GAINDC (0x22 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_CTLE_BW (0x23 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_GAIN (0x30 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_GAIN2 (0x31 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_2 (0x32 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_3 (0x33 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_4 (0x34 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_5 (0x35 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_6 (0x36 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_7 (0x37 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_8 (0x38 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_9 (0x39 &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_10 (0x3A &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_11 (0x3B &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='add'>+#define ICE_AQC_RX_EQU_DFE_12 (0x3C &lt;&lt; ICE_AQC_RX_EQU_SHIFT)</div><div class='ctx'> #define ICE_AQC_TX_EQU_PRE1 0x0</div><div class='ctx'> #define ICE_AQC_TX_EQU_PRE3 0x3</div><div class='ctx'> #define ICE_AQC_TX_EQU_ATTEN 0x4</div><div class='hunk'>@@ -1648,6 +1569,8 @@ struct ice_aqc_get_port_options_elem {</div><div class='ctx'> #define ICE_AQC_PORT_OPT_MAX_LANE_25G	5</div><div class='ctx'> #define ICE_AQC_PORT_OPT_MAX_LANE_50G	6</div><div class='ctx'> #define ICE_AQC_PORT_OPT_MAX_LANE_100G	7</div><div class='add'>+#define ICE_AQC_PORT_OPT_MAX_LANE_200G	8</div><div class='add'>+#define ICE_AQC_PORT_OPT_MAX_LANE_40G	9</div><div class='ctx'> </div><div class='ctx'> 	u8 global_scid[2];</div><div class='ctx'> 	u8 phy_scid[2];</div><div class='hunk'>@@ -1790,6 +1713,7 @@ struct ice_aqc_nvm_pass_comp_tbl {</div><div class='ctx'> #define ICE_AQ_NVM_PASS_COMP_CAN_BE_UPDATED		0x0</div><div class='ctx'> #define ICE_AQ_NVM_PASS_COMP_CAN_MAY_BE_UPDATEABLE	0x1</div><div class='ctx'> #define ICE_AQ_NVM_PASS_COMP_CAN_NOT_BE_UPDATED		0x2</div><div class='add'>+#define ICE_AQ_NVM_PASS_COMP_PARTIAL_CHECK		0x3</div><div class='ctx'> 	u8 component_response_code; /* Response only */</div><div class='ctx'> #define ICE_AQ_NVM_PASS_COMP_CAN_BE_UPDATED_CODE	0x0</div><div class='ctx'> #define ICE_AQ_NVM_PASS_COMP_STAMP_IDENTICAL_CODE	0x1</div><div class='hunk'>@@ -2067,10 +1991,10 @@ struct ice_aqc_add_txqs_perq {</div><div class='ctx'> 	__le16 txq_id;</div><div class='ctx'> 	u8 rsvd[2];</div><div class='ctx'> 	__le32 q_teid;</div><div class='del'>-	u8 txq_ctx[22];</div><div class='add'>+	ice_txq_ctx_buf_t txq_ctx;</div><div class='ctx'> 	u8 rsvd2[2];</div><div class='ctx'> 	struct ice_aqc_txsched_elem info;</div><div class='del'>-};</div><div class='add'>+} __packed;</div><div class='ctx'> </div><div class='ctx'> /* The format of the command buffer for Add Tx LAN Queues (0x0C30)</div><div class='ctx'>  * is an array of the following structs. Please note that the length of</div><div class='hunk'>@@ -2140,6 +2064,10 @@ struct ice_aqc_cfg_txqs {</div><div class='ctx'> #define ICE_AQC_Q_CFG_SRC_PRT_M		0x7</div><div class='ctx'> #define ICE_AQC_Q_CFG_DST_PRT_S		3</div><div class='ctx'> #define ICE_AQC_Q_CFG_DST_PRT_M		(0x7 &lt;&lt; ICE_AQC_Q_CFG_DST_PRT_S)</div><div class='add'>+#define ICE_AQC_Q_CFG_MODE_M		GENMASK(7, 6)</div><div class='add'>+#define ICE_AQC_Q_CFG_MODE_SAME_PF	0x0</div><div class='add'>+#define ICE_AQC_Q_CFG_MODE_GIVE_OWN	0x1</div><div class='add'>+#define ICE_AQC_Q_CFG_MODE_KEEP_OWN	0x2</div><div class='ctx'> 	u8 time_out;</div><div class='ctx'> #define ICE_AQC_Q_CFG_TIMEOUT_S		2</div><div class='ctx'> #define ICE_AQC_Q_CFG_TIMEOUT_M		(0x1F &lt;&lt; ICE_AQC_Q_CFG_TIMEOUT_S)</div><div class='hunk'>@@ -2193,6 +2121,34 @@ struct ice_aqc_add_rdma_qset_data {</div><div class='ctx'> 	struct ice_aqc_add_tx_rdma_qset_entry rdma_qsets[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Set Tx Time LAN Queue (indirect 0x0C35) */</div><div class='add'>+struct ice_aqc_set_txtimeqs {</div><div class='add'>+	__le16 q_id;</div><div class='add'>+	__le16 q_amount;</div><div class='add'>+	u8 reserved[4];</div><div class='add'>+	__le32 addr_high;</div><div class='add'>+	__le32 addr_low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This is the descriptor of each queue entry for the Set Tx Time Queue</div><div class='add'>+ * command (0x0C35). Only used within struct ice_aqc_set_txtime_qgrp.</div><div class='add'>+ */</div><div class='add'>+struct ice_aqc_set_txtimeqs_perq {</div><div class='add'>+	u8 reserved[4];</div><div class='add'>+	ice_txtime_ctx_buf_t txtime_ctx;</div><div class='add'>+	u8 reserved1[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The format of the command buffer for Set Tx Time Queue (0x0C35)</div><div class='add'>+ * is an array of the following structs. Please note that the length of</div><div class='add'>+ * each struct ice_aqc_set_txtime_qgrp is variable due to the variable</div><div class='add'>+ * number of queues in each group!</div><div class='add'>+ */</div><div class='add'>+struct ice_aqc_set_txtime_qgrp {</div><div class='add'>+	u8 reserved[8];</div><div class='add'>+	struct ice_aqc_set_txtimeqs_perq txtimeqs[];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Download Package (indirect 0x0C40) */</div><div class='ctx'> /* Also used for Update Package (indirect 0x0C41 and 0x0C42) */</div><div class='ctx'> struct ice_aqc_download_pkg {</div><div class='hunk'>@@ -2247,6 +2203,24 @@ struct ice_aqc_get_pkg_info_resp {</div><div class='ctx'> 	struct ice_aqc_get_pkg_info pkg_info[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define ICE_CGU_INPUT_PHASE_OFFSET_BYTES	6</div><div class='add'>+</div><div class='add'>+struct ice_cgu_input_measure {</div><div class='add'>+	u8 phase_offset[ICE_CGU_INPUT_PHASE_OFFSET_BYTES];</div><div class='add'>+	__le32 freq;</div><div class='add'>+} __packed __aligned(sizeof(__le16));</div><div class='add'>+</div><div class='add'>+#define ICE_AQC_GET_CGU_IN_MEAS_DPLL_IDX_M	ICE_M(0xf, 0)</div><div class='add'>+</div><div class='add'>+/* Get CGU input measure command response data structure (indirect 0x0C59) */</div><div class='add'>+struct ice_aqc_get_cgu_input_measure {</div><div class='add'>+	u8 dpll_idx_opt;</div><div class='add'>+	u8 length;</div><div class='add'>+	u8 rsvd[6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICE_AQC_GET_CGU_MAX_PHASE_ADJ	GENMASK(30, 0)</div><div class='add'>+</div><div class='ctx'> /* Get CGU abilities command response data structure (indirect 0x0C61) */</div><div class='ctx'> struct ice_aqc_get_cgu_abilities {</div><div class='ctx'> 	u8 num_inputs;</div><div class='hunk'>@@ -2261,6 +2235,8 @@ struct ice_aqc_get_cgu_abilities {</div><div class='ctx'> 	u8 rsvd[3];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define ICE_AQC_CGU_IN_CFG_FLG2_REFSYNC_EN		BIT(7)</div><div class='add'>+</div><div class='ctx'> /* Set CGU input config (direct 0x0C62) */</div><div class='ctx'> struct ice_aqc_set_cgu_input_config {</div><div class='ctx'> 	u8 input_idx;</div><div class='hunk'>@@ -2455,225 +2431,85 @@ struct ice_aqc_event_lan_overflow {</div><div class='ctx'> 	u8 reserved[8];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum ice_aqc_fw_logging_mod {</div><div class='del'>-	ICE_AQC_FW_LOG_ID_GENERAL = 0,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_CTRL,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_LINK,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_LINK_TOPO,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_DNL,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_I2C,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_SDP,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_MDIO,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_ADMINQ,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_HDMA,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_LLDP,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_DCBX,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_DCB,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_XLR,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_NVM,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_AUTH,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_VPD,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_IOSF,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_PARSER,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_SW,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_SCHEDULER,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_TXQ,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_RSVD,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_POST,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_WATCHDOG,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_TASK_DISPATCH,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_MNG,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_SYNCE,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_HEALTH,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_TSDRV,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_PFREG,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_MDLVER,</div><div class='del'>-	ICE_AQC_FW_LOG_ID_MAX,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Set FW Logging configuration (indirect 0xFF30)</div><div class='del'>- * Register for FW Logging (indirect 0xFF31)</div><div class='del'>- * Query FW Logging (indirect 0xFF32)</div><div class='del'>- * FW Log Event (indirect 0xFF33)</div><div class='del'>- */</div><div class='del'>-struct ice_aqc_fw_log {</div><div class='del'>-	u8 cmd_flags;</div><div class='del'>-#define ICE_AQC_FW_LOG_CONF_UART_EN	BIT(0)</div><div class='del'>-#define ICE_AQC_FW_LOG_CONF_AQ_EN	BIT(1)</div><div class='del'>-#define ICE_AQC_FW_LOG_QUERY_REGISTERED	BIT(2)</div><div class='del'>-#define ICE_AQC_FW_LOG_CONF_SET_VALID	BIT(3)</div><div class='del'>-#define ICE_AQC_FW_LOG_AQ_REGISTER	BIT(0)</div><div class='del'>-#define ICE_AQC_FW_LOG_AQ_QUERY		BIT(2)</div><div class='del'>-</div><div class='del'>-	u8 rsp_flag;</div><div class='del'>-	__le16 fw_rt_msb;</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			__le32 fw_rt_lsb;</div><div class='del'>-		} sync;</div><div class='del'>-		struct {</div><div class='del'>-			__le16 log_resolution;</div><div class='del'>-#define ICE_AQC_FW_LOG_MIN_RESOLUTION		(1)</div><div class='del'>-#define ICE_AQC_FW_LOG_MAX_RESOLUTION		(128)</div><div class='del'>-</div><div class='del'>-			__le16 mdl_cnt;</div><div class='del'>-		} cfg;</div><div class='del'>-	} ops;</div><div class='add'>+enum ice_aqc_health_status_mask {</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_SET_PF_SPECIFIC_MASK = BIT(0),</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_SET_ALL_PF_MASK      = BIT(1),</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_SET_GLOBAL_MASK      = BIT(2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Set Health Status (direct 0xFF20) */</div><div class='add'>+struct ice_aqc_set_health_status_cfg {</div><div class='add'>+	u8 event_source;</div><div class='add'>+	u8 reserved[15];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ice_aqc_health_status {</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_UNKNOWN_MOD_STRICT		= 0x101,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_MOD_TYPE			= 0x102,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_MOD_QUAL			= 0x103,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_MOD_COMM			= 0x104,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_MOD_CONFLICT			= 0x105,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_MOD_NOT_PRESENT		= 0x106,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_INFO_MOD_UNDERUTILIZED		= 0x107,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_UNKNOWN_MOD_LENIENT		= 0x108,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_MOD_DIAGNOSTIC_FEATURE	= 0x109,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_INVALID_LINK_CFG		= 0x10B,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_PORT_ACCESS			= 0x10C,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_PORT_UNREACHABLE		= 0x10D,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_INFO_PORT_SPEED_MOD_LIMITED	= 0x10F,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_PARALLEL_FAULT		= 0x110,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_INFO_PORT_SPEED_PHY_LIMITED	= 0x111,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_NETLIST_TOPO			= 0x112,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_NETLIST			= 0x113,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_TOPO_CONFLICT			= 0x114,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_LINK_HW_ACCESS		= 0x115,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_LINK_RUNTIME			= 0x116,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_DNL_INIT			= 0x117,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_PHY_NVM_PROG			= 0x120,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_PHY_FW_LOAD			= 0x121,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_INFO_RECOVERY			= 0x500,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_FLASH_ACCESS			= 0x501,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_NVM_AUTH			= 0x502,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_OROM_AUTH			= 0x503,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_DDP_AUTH			= 0x504,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_NVM_COMPAT			= 0x505,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_OROM_COMPAT			= 0x506,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_NVM_SEC_VIOLATION		= 0x507,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_OROM_SEC_VIOLATION		= 0x508,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_DCB_MIB			= 0x509,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_MNG_TIMEOUT			= 0x50A,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_BMC_RESET			= 0x50B,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_LAST_MNG_FAIL			= 0x50C,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_RESOURCE_ALLOC_FAIL		= 0x50D,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_FW_LOOP			= 0x1000,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_FW_PFR_FAIL			= 0x1001,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_ERR_LAST_FAIL_AQ			= 0x1002,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Get Health Status (indirect 0xFF22) */</div><div class='add'>+struct ice_aqc_get_health_status {</div><div class='add'>+	__le16 health_status_count;</div><div class='add'>+	u8 reserved[6];</div><div class='ctx'> 	__le32 addr_high;</div><div class='ctx'> 	__le32 addr_low;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Response Buffer for:</div><div class='del'>- *    Set Firmware Logging Configuration (0xFF30)</div><div class='del'>- *    Query FW Logging (0xFF32)</div><div class='del'>- */</div><div class='del'>-struct ice_aqc_fw_log_cfg_resp {</div><div class='del'>-	__le16 module_identifier;</div><div class='del'>-	u8 log_level;</div><div class='del'>-	u8 rsvd0;</div><div class='add'>+enum ice_aqc_health_status_scope {</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_PF	= 0x1,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_PORT	= 0x2,</div><div class='add'>+	ICE_AQC_HEALTH_STATUS_GLOBAL	= 0x3,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * struct ice_aq_desc - Admin Queue (AQ) descriptor</div><div class='del'>- * @flags: ICE_AQ_FLAG_* flags</div><div class='del'>- * @opcode: AQ command opcode</div><div class='del'>- * @datalen: length in bytes of indirect/external data buffer</div><div class='del'>- * @retval: return value from firmware</div><div class='del'>- * @cookie_high: opaque data high-half</div><div class='del'>- * @cookie_low: opaque data low-half</div><div class='del'>- * @params: command-specific parameters</div><div class='del'>- *</div><div class='del'>- * Descriptor format for commands the driver posts on the Admin Transmit Queue</div><div class='del'>- * (ATQ). The firmware writes back onto the command descriptor and returns</div><div class='del'>- * the result of the command. Asynchronous events that are not an immediate</div><div class='del'>- * result of the command are written to the Admin Receive Queue (ARQ) using</div><div class='del'>- * the same descriptor format. Descriptors are in little-endian notation with</div><div class='del'>- * 32-bit words.</div><div class='add'>+#define ICE_AQC_HEALTH_STATUS_UNDEFINED_DATA	0xDEADBEEF</div><div class='add'>+</div><div class='add'>+/* Get Health Status event buffer entry (0xFF22),</div><div class='add'>+ * repeated per reported health status.</div><div class='ctx'>  */</div><div class='del'>-struct ice_aq_desc {</div><div class='del'>-	__le16 flags;</div><div class='del'>-	__le16 opcode;</div><div class='del'>-	__le16 datalen;</div><div class='del'>-	__le16 retval;</div><div class='del'>-	__le32 cookie_high;</div><div class='del'>-	__le32 cookie_low;</div><div class='del'>-	union {</div><div class='del'>-		u8 raw[16];</div><div class='del'>-		struct ice_aqc_generic generic;</div><div class='del'>-		struct ice_aqc_get_ver get_ver;</div><div class='del'>-		struct ice_aqc_driver_ver driver_ver;</div><div class='del'>-		struct ice_aqc_q_shutdown q_shutdown;</div><div class='del'>-		struct ice_aqc_req_res res_owner;</div><div class='del'>-		struct ice_aqc_manage_mac_read mac_read;</div><div class='del'>-		struct ice_aqc_manage_mac_write mac_write;</div><div class='del'>-		struct ice_aqc_clear_pxe clear_pxe;</div><div class='del'>-		struct ice_aqc_list_caps get_cap;</div><div class='del'>-		struct ice_aqc_get_phy_caps get_phy;</div><div class='del'>-		struct ice_aqc_set_phy_cfg set_phy;</div><div class='del'>-		struct ice_aqc_restart_an restart_an;</div><div class='del'>-		struct ice_aqc_set_phy_rec_clk_out set_phy_rec_clk_out;</div><div class='del'>-		struct ice_aqc_get_phy_rec_clk_out get_phy_rec_clk_out;</div><div class='del'>-		struct ice_aqc_get_sensor_reading get_sensor_reading;</div><div class='del'>-		struct ice_aqc_get_sensor_reading_resp get_sensor_reading_resp;</div><div class='del'>-		struct ice_aqc_gpio read_write_gpio;</div><div class='del'>-		struct ice_aqc_sff_eeprom read_write_sff_param;</div><div class='del'>-		struct ice_aqc_set_port_id_led set_port_id_led;</div><div class='del'>-		struct ice_aqc_get_port_options get_port_options;</div><div class='del'>-		struct ice_aqc_set_port_option set_port_option;</div><div class='del'>-		struct ice_aqc_get_sw_cfg get_sw_conf;</div><div class='del'>-		struct ice_aqc_set_port_params set_port_params;</div><div class='del'>-		struct ice_aqc_sw_rules sw_rules;</div><div class='del'>-		struct ice_aqc_add_get_recipe add_get_recipe;</div><div class='del'>-		struct ice_aqc_recipe_to_profile recipe_to_profile;</div><div class='del'>-		struct ice_aqc_get_topo get_topo;</div><div class='del'>-		struct ice_aqc_sched_elem_cmd sched_elem_cmd;</div><div class='del'>-		struct ice_aqc_query_txsched_res query_sched_res;</div><div class='del'>-		struct ice_aqc_query_port_ets port_ets;</div><div class='del'>-		struct ice_aqc_rl_profile rl_profile;</div><div class='del'>-		struct ice_aqc_nvm nvm;</div><div class='del'>-		struct ice_aqc_nvm_checksum nvm_checksum;</div><div class='del'>-		struct ice_aqc_nvm_pkg_data pkg_data;</div><div class='del'>-		struct ice_aqc_nvm_pass_comp_tbl pass_comp_tbl;</div><div class='del'>-		struct ice_aqc_pf_vf_msg virt;</div><div class='del'>-		struct ice_aqc_set_query_pfc_mode set_query_pfc_mode;</div><div class='del'>-		struct ice_aqc_lldp_get_mib lldp_get_mib;</div><div class='del'>-		struct ice_aqc_lldp_set_mib_change lldp_set_event;</div><div class='del'>-		struct ice_aqc_lldp_stop lldp_stop;</div><div class='del'>-		struct ice_aqc_lldp_start lldp_start;</div><div class='del'>-		struct ice_aqc_lldp_set_local_mib lldp_set_mib;</div><div class='del'>-		struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;</div><div class='del'>-		struct ice_aqc_lldp_filter_ctrl lldp_filter_ctrl;</div><div class='del'>-		struct ice_aqc_get_set_rss_lut get_set_rss_lut;</div><div class='del'>-		struct ice_aqc_get_set_rss_key get_set_rss_key;</div><div class='del'>-		struct ice_aqc_neigh_dev_req neigh_dev;</div><div class='del'>-		struct ice_aqc_add_txqs add_txqs;</div><div class='del'>-		struct ice_aqc_dis_txqs dis_txqs;</div><div class='del'>-		struct ice_aqc_cfg_txqs cfg_txqs;</div><div class='del'>-		struct ice_aqc_add_rdma_qset add_rdma_qset;</div><div class='del'>-		struct ice_aqc_add_get_update_free_vsi vsi_cmd;</div><div class='del'>-		struct ice_aqc_add_update_free_vsi_resp add_update_free_vsi_res;</div><div class='del'>-		struct ice_aqc_download_pkg download_pkg;</div><div class='del'>-		struct ice_aqc_set_cgu_input_config set_cgu_input_config;</div><div class='del'>-		struct ice_aqc_get_cgu_input_config get_cgu_input_config;</div><div class='del'>-		struct ice_aqc_set_cgu_output_config set_cgu_output_config;</div><div class='del'>-		struct ice_aqc_get_cgu_output_config get_cgu_output_config;</div><div class='del'>-		struct ice_aqc_get_cgu_dpll_status get_cgu_dpll_status;</div><div class='del'>-		struct ice_aqc_set_cgu_dpll_config set_cgu_dpll_config;</div><div class='del'>-		struct ice_aqc_set_cgu_ref_prio set_cgu_ref_prio;</div><div class='del'>-		struct ice_aqc_get_cgu_ref_prio get_cgu_ref_prio;</div><div class='del'>-		struct ice_aqc_get_cgu_info get_cgu_info;</div><div class='del'>-		struct ice_aqc_driver_shared_params drv_shared_params;</div><div class='del'>-		struct ice_aqc_fw_log fw_log;</div><div class='del'>-		struct ice_aqc_set_mac_lb set_mac_lb;</div><div class='del'>-		struct ice_aqc_alloc_free_res_cmd sw_res_ctrl;</div><div class='del'>-		struct ice_aqc_set_mac_cfg set_mac_cfg;</div><div class='del'>-		struct ice_aqc_set_event_mask set_event_mask;</div><div class='del'>-		struct ice_aqc_get_link_status get_link_status;</div><div class='del'>-		struct ice_aqc_event_lan_overflow lan_overflow;</div><div class='del'>-		struct ice_aqc_get_link_topo get_link_topo;</div><div class='del'>-		struct ice_aqc_dnl_call_command dnl_call;</div><div class='del'>-		struct ice_aqc_i2c read_write_i2c;</div><div class='del'>-		struct ice_aqc_read_i2c_resp read_i2c_resp;</div><div class='del'>-		struct ice_aqc_get_set_tx_topo get_set_tx_topo;</div><div class='del'>-	} params;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* FW defined boundary for a large buffer, 4k &gt;= Large buffer &gt; 512 bytes */</div><div class='del'>-#define ICE_AQ_LG_BUF	512</div><div class='del'>-</div><div class='del'>-#define ICE_AQ_FLAG_DD_S	0</div><div class='del'>-#define ICE_AQ_FLAG_CMP_S	1</div><div class='del'>-#define ICE_AQ_FLAG_ERR_S	2</div><div class='del'>-#define ICE_AQ_FLAG_LB_S	9</div><div class='del'>-#define ICE_AQ_FLAG_RD_S	10</div><div class='del'>-#define ICE_AQ_FLAG_BUF_S	12</div><div class='del'>-#define ICE_AQ_FLAG_SI_S	13</div><div class='del'>-</div><div class='del'>-#define ICE_AQ_FLAG_DD		BIT(ICE_AQ_FLAG_DD_S)  /* 0x1    */</div><div class='del'>-#define ICE_AQ_FLAG_CMP		BIT(ICE_AQ_FLAG_CMP_S) /* 0x2    */</div><div class='del'>-#define ICE_AQ_FLAG_ERR		BIT(ICE_AQ_FLAG_ERR_S) /* 0x4    */</div><div class='del'>-#define ICE_AQ_FLAG_LB		BIT(ICE_AQ_FLAG_LB_S)  /* 0x200  */</div><div class='del'>-#define ICE_AQ_FLAG_RD		BIT(ICE_AQ_FLAG_RD_S)  /* 0x400  */</div><div class='del'>-#define ICE_AQ_FLAG_BUF		BIT(ICE_AQ_FLAG_BUF_S) /* 0x1000 */</div><div class='del'>-#define ICE_AQ_FLAG_SI		BIT(ICE_AQ_FLAG_SI_S)  /* 0x2000 */</div><div class='del'>-</div><div class='del'>-/* error codes */</div><div class='del'>-enum ice_aq_err {</div><div class='del'>-	ICE_AQ_RC_OK		= 0,  /* Success */</div><div class='del'>-	ICE_AQ_RC_EPERM		= 1,  /* Operation not permitted */</div><div class='del'>-	ICE_AQ_RC_ENOENT	= 2,  /* No such element */</div><div class='del'>-	ICE_AQ_RC_ENOMEM	= 9,  /* Out of memory */</div><div class='del'>-	ICE_AQ_RC_EBUSY		= 12, /* Device or resource busy */</div><div class='del'>-	ICE_AQ_RC_EEXIST	= 13, /* Object already exists */</div><div class='del'>-	ICE_AQ_RC_EINVAL	= 14, /* Invalid argument */</div><div class='del'>-	ICE_AQ_RC_ENOSPC	= 16, /* No space left or allocation failure */</div><div class='del'>-	ICE_AQ_RC_ENOSYS	= 17, /* Function not implemented */</div><div class='del'>-	ICE_AQ_RC_EMODE		= 21, /* Op not allowed in current dev mode */</div><div class='del'>-	ICE_AQ_RC_ENOSEC	= 24, /* Missing security manifest */</div><div class='del'>-	ICE_AQ_RC_EBADSIG	= 25, /* Bad RSA signature */</div><div class='del'>-	ICE_AQ_RC_ESVN		= 26, /* SVN number prohibits this package */</div><div class='del'>-	ICE_AQ_RC_EBADMAN	= 27, /* Manifest hash mismatch */</div><div class='del'>-	ICE_AQ_RC_EBADBUF	= 28, /* Buffer hash mismatches manifest */</div><div class='add'>+struct ice_aqc_health_status_elem {</div><div class='add'>+	__le16 health_status_code;</div><div class='add'>+	__le16 event_source;</div><div class='add'>+	__le32 internal_data1;</div><div class='add'>+	__le32 internal_data2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Admin Queue command opcodes */</div><div class='hunk'>@@ -2810,6 +2646,9 @@ enum ice_adminq_opc {</div><div class='ctx'> 	ice_aqc_opc_cfg_txqs				= 0x0C32,</div><div class='ctx'> 	ice_aqc_opc_add_rdma_qset			= 0x0C33,</div><div class='ctx'> </div><div class='add'>+	/* Tx Time queue commands */</div><div class='add'>+	ice_aqc_opc_set_txtimeqs			= 0x0C35,</div><div class='add'>+</div><div class='ctx'> 	/* package commands */</div><div class='ctx'> 	ice_aqc_opc_download_pkg			= 0x0C40,</div><div class='ctx'> 	ice_aqc_opc_upload_section			= 0x0C41,</div><div class='hunk'>@@ -2817,6 +2656,7 @@ enum ice_adminq_opc {</div><div class='ctx'> 	ice_aqc_opc_get_pkg_info_list			= 0x0C43,</div><div class='ctx'> </div><div class='ctx'> 	/* 1588/SyncE commands/events */</div><div class='add'>+	ice_aqc_opc_get_cgu_input_measure		= 0x0C59,</div><div class='ctx'> 	ice_aqc_opc_get_cgu_abilities			= 0x0C61,</div><div class='ctx'> 	ice_aqc_opc_set_cgu_input_config		= 0x0C62,</div><div class='ctx'> 	ice_aqc_opc_get_cgu_input_config		= 0x0C63,</div><div class='hunk'>@@ -2833,6 +2673,10 @@ enum ice_adminq_opc {</div><div class='ctx'> 	/* Standalone Commands/Events */</div><div class='ctx'> 	ice_aqc_opc_event_lan_overflow			= 0x1001,</div><div class='ctx'> </div><div class='add'>+	/* System Diagnostic commands */</div><div class='add'>+	ice_aqc_opc_set_health_status_cfg		= 0xFF20,</div><div class='add'>+	ice_aqc_opc_get_health_status			= 0xFF22,</div><div class='add'>+</div><div class='ctx'> 	/* FW Logging Commands */</div><div class='ctx'> 	ice_aqc_opc_fw_logs_config			= 0xFF30,</div><div class='ctx'> 	ice_aqc_opc_fw_logs_register			= 0xFF31,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_arfs.c b/drivers/net/ethernet/intel/ice/ice_arfs.c<br/>index 7cee365cc7d1..1f7834c03550 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_arfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_arfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_arfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_arfs.c</a></div><div class='hunk'>@@ -378,6 +378,50 @@ ice_arfs_is_perfect_flow_set(struct ice_hw *hw, __be16 l3_proto, u8 l4_proto)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_arfs_cmp - Check if aRFS filter matches this flow.</div><div class='add'>+ * @fltr_info: filter info of the saved ARFS entry.</div><div class='add'>+ * @fk: flow dissector keys.</div><div class='add'>+ * @n_proto:  One of htons(ETH_P_IP) or htons(ETH_P_IPV6).</div><div class='add'>+ * @ip_proto: One of IPPROTO_TCP or IPPROTO_UDP.</div><div class='add'>+ *</div><div class='add'>+ * Since this function assumes limited values for n_proto and ip_proto, it</div><div class='add'>+ * is meant to be called only from ice_rx_flow_steer().</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * true	- fltr_info refers to the same flow as fk.</div><div class='add'>+ * * false	- fltr_info and fk refer to different flows.</div><div class='add'>+ */</div><div class='add'>+static bool</div><div class='add'>+ice_arfs_cmp(const struct ice_fdir_fltr *fltr_info, const struct flow_keys *fk,</div><div class='add'>+	     __be16 n_proto, u8 ip_proto)</div><div class='add'>+{</div><div class='add'>+	/* Determine if the filter is for IPv4 or IPv6 based on flow_type,</div><div class='add'>+	 * which is one of ICE_FLTR_PTYPE_NONF_IPV{4,6}_{TCP,UDP}.</div><div class='add'>+	 */</div><div class='add'>+	bool is_v4 = fltr_info-&gt;flow_type == ICE_FLTR_PTYPE_NONF_IPV4_TCP ||</div><div class='add'>+		     fltr_info-&gt;flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP;</div><div class='add'>+</div><div class='add'>+	/* Following checks are arranged in the quickest and most discriminative</div><div class='add'>+	 * fields first for early failure.</div><div class='add'>+	 */</div><div class='add'>+	if (is_v4)</div><div class='add'>+		return n_proto == htons(ETH_P_IP) &amp;&amp;</div><div class='add'>+			fltr_info-&gt;ip.v4.src_port == fk-&gt;ports.src &amp;&amp;</div><div class='add'>+			fltr_info-&gt;ip.v4.dst_port == fk-&gt;ports.dst &amp;&amp;</div><div class='add'>+			fltr_info-&gt;ip.v4.src_ip == fk-&gt;addrs.v4addrs.src &amp;&amp;</div><div class='add'>+			fltr_info-&gt;ip.v4.dst_ip == fk-&gt;addrs.v4addrs.dst &amp;&amp;</div><div class='add'>+			fltr_info-&gt;ip.v4.proto == ip_proto;</div><div class='add'>+</div><div class='add'>+	return fltr_info-&gt;ip.v6.src_port == fk-&gt;ports.src &amp;&amp;</div><div class='add'>+		fltr_info-&gt;ip.v6.dst_port == fk-&gt;ports.dst &amp;&amp;</div><div class='add'>+		fltr_info-&gt;ip.v6.proto == ip_proto &amp;&amp;</div><div class='add'>+		!memcmp(&amp;fltr_info-&gt;ip.v6.src_ip, &amp;fk-&gt;addrs.v6addrs.src,</div><div class='add'>+			sizeof(struct in6_addr)) &amp;&amp;</div><div class='add'>+		!memcmp(&amp;fltr_info-&gt;ip.v6.dst_ip, &amp;fk-&gt;addrs.v6addrs.dst,</div><div class='add'>+			sizeof(struct in6_addr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_rx_flow_steer - steer the Rx flow to where application is being run</div><div class='ctx'>  * @netdev: ptr to the netdev being adjusted</div><div class='ctx'>  * @skb: buffer with required header information</div><div class='hunk'>@@ -448,6 +492,10 @@ ice_rx_flow_steer(struct net_device *netdev, const struct sk_buff *skb,</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		fltr_info = &amp;arfs_entry-&gt;fltr_info;</div><div class='add'>+</div><div class='add'>+		if (!ice_arfs_cmp(fltr_info, &amp;fk, n_proto, ip_proto))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		ret = fltr_info-&gt;fltr_id;</div><div class='ctx'> </div><div class='ctx'> 		if (fltr_info-&gt;q_index == rxq_idx ||</div><div class='hunk'>@@ -511,7 +559,7 @@ void ice_init_arfs(struct ice_vsi *vsi)</div><div class='ctx'> 	struct hlist_head *arfs_fltr_list;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	if (!vsi || vsi-&gt;type != ICE_VSI_PF)</div><div class='add'>+	if (!vsi || vsi-&gt;type != ICE_VSI_PF || ice_is_arfs_active(vsi))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	arfs_fltr_list = kcalloc(ICE_MAX_ARFS_LIST, sizeof(*arfs_fltr_list),</div><div class='hunk'>@@ -571,25 +619,6 @@ void ice_clear_arfs(struct ice_vsi *vsi)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_free_cpu_rx_rmap - free setup CPU reverse map</div><div class='del'>- * @vsi: the VSI to be forwarded to</div><div class='del'>- */</div><div class='del'>-void ice_free_cpu_rx_rmap(struct ice_vsi *vsi)</div><div class='del'>-{</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-</div><div class='del'>-	if (!vsi || vsi-&gt;type != ICE_VSI_PF)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	netdev = vsi-&gt;netdev;</div><div class='del'>-	if (!netdev || !netdev-&gt;rx_cpu_rmap)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	free_irq_cpu_rmap(netdev-&gt;rx_cpu_rmap);</div><div class='del'>-	netdev-&gt;rx_cpu_rmap = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_set_cpu_rx_rmap - setup CPU reverse map for each queue</div><div class='ctx'>  * @vsi: the VSI to be forwarded to</div><div class='ctx'>  */</div><div class='hunk'>@@ -597,7 +626,6 @@ int ice_set_cpu_rx_rmap(struct ice_vsi *vsi)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct ice_pf *pf;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!vsi || vsi-&gt;type != ICE_VSI_PF)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -610,18 +638,7 @@ int ice_set_cpu_rx_rmap(struct ice_vsi *vsi)</div><div class='ctx'> 	netdev_dbg(netdev, "Setup CPU RMAP: vsi type 0x%x, ifname %s, q_vectors %d\n",</div><div class='ctx'> 		   vsi-&gt;type, netdev-&gt;name, vsi-&gt;num_q_vectors);</div><div class='ctx'> </div><div class='del'>-	netdev-&gt;rx_cpu_rmap = alloc_irq_cpu_rmap(vsi-&gt;num_q_vectors);</div><div class='del'>-	if (unlikely(!netdev-&gt;rx_cpu_rmap))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ice_for_each_q_vector(vsi, i)</div><div class='del'>-		if (irq_cpu_rmap_add(netdev-&gt;rx_cpu_rmap,</div><div class='del'>-				     vsi-&gt;q_vectors[i]-&gt;irq.virq)) {</div><div class='del'>-			ice_free_cpu_rx_rmap(vsi);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return netif_enable_cpu_rmap(netdev, vsi-&gt;num_q_vectors);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_arfs.h b/drivers/net/ethernet/intel/ice/ice_arfs.h<br/>index 9669ad9bf7b5..9706293128c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_arfs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_arfs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_arfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_arfs.h</a></div><div class='hunk'>@@ -45,7 +45,6 @@ int</div><div class='ctx'> ice_rx_flow_steer(struct net_device *netdev, const struct sk_buff *skb,</div><div class='ctx'> 		  u16 rxq_idx, u32 flow_id);</div><div class='ctx'> void ice_clear_arfs(struct ice_vsi *vsi);</div><div class='del'>-void ice_free_cpu_rx_rmap(struct ice_vsi *vsi);</div><div class='ctx'> void ice_init_arfs(struct ice_vsi *vsi);</div><div class='ctx'> void ice_sync_arfs_fltrs(struct ice_pf *pf);</div><div class='ctx'> int ice_set_cpu_rx_rmap(struct ice_vsi *vsi);</div><div class='hunk'>@@ -56,7 +55,6 @@ ice_is_arfs_using_perfect_flow(struct ice_hw *hw,</div><div class='ctx'> 			       enum ice_fltr_ptype flow_type);</div><div class='ctx'> #else</div><div class='ctx'> static inline void ice_clear_arfs(struct ice_vsi *vsi) { }</div><div class='del'>-static inline void ice_free_cpu_rx_rmap(struct ice_vsi *vsi) { }</div><div class='ctx'> static inline void ice_init_arfs(struct ice_vsi *vsi) { }</div><div class='ctx'> static inline void ice_sync_arfs_fltrs(struct ice_pf *pf) { }</div><div class='ctx'> static inline void ice_remove_arfs(struct ice_pf *pf) { }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_base.c b/drivers/net/ethernet/intel/ice/ice_base.c<br/>index 3a8e156d7d86..eadb1e3d12b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_base.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_base.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_base.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_base.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Copyright (c) 2019, Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/xdp_sock_drv.h&gt;</div><div class='add'>+#include &lt;linux/net/intel/libie/rx.h&gt;</div><div class='ctx'> #include "ice_base.h"</div><div class='ctx'> #include "ice_lib.h"</div><div class='ctx'> #include "ice_dcb_lib.h"</div><div class='hunk'>@@ -147,16 +148,13 @@ skip_alloc:</div><div class='ctx'> 	q_vector-&gt;reg_idx = q_vector-&gt;irq.index;</div><div class='ctx'> 	q_vector-&gt;vf_reg_idx = q_vector-&gt;irq.index;</div><div class='ctx'> </div><div class='del'>-	/* only set affinity_mask if the CPU is online */</div><div class='del'>-	if (cpu_online(v_idx))</div><div class='del'>-		cpumask_set_cpu(v_idx, &amp;q_vector-&gt;affinity_mask);</div><div class='del'>-</div><div class='ctx'> 	/* This will not be called in the driver load path because the netdev</div><div class='ctx'> 	 * will not be created yet. All other cases with register the NAPI</div><div class='ctx'> 	 * handler here (i.e. resume, reset/rebuild, etc.)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (vsi-&gt;netdev)</div><div class='del'>-		netif_napi_add(vsi-&gt;netdev, &amp;q_vector-&gt;napi, ice_napi_poll);</div><div class='add'>+		netif_napi_add_config(vsi-&gt;netdev, &amp;q_vector-&gt;napi,</div><div class='add'>+				      ice_napi_poll, v_idx);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	/* tie q_vector and VSI together */</div><div class='hunk'>@@ -245,7 +243,8 @@ static void ice_cfg_itr_gran(struct ice_hw *hw)</div><div class='ctx'>  * @ring: ring to get the absolute queue index</div><div class='ctx'>  * @tc: traffic class number</div><div class='ctx'>  */</div><div class='del'>-static u16 ice_calc_txq_handle(struct ice_vsi *vsi, struct ice_tx_ring *ring, u8 tc)</div><div class='add'>+static u16</div><div class='add'>+ice_calc_txq_handle(const struct ice_vsi *vsi, struct ice_tx_ring *ring, u8 tc)</div><div class='ctx'> {</div><div class='ctx'> 	WARN_ONCE(ice_ring_is_xdp(ring) &amp;&amp; tc, "XDP ring can't belong to TC other than 0\n");</div><div class='ctx'> </div><div class='hunk'>@@ -253,7 +252,7 @@ static u16 ice_calc_txq_handle(struct ice_vsi *vsi, struct ice_tx_ring *ring, u8</div><div class='ctx'> 		return ring-&gt;q_index - ring-&gt;ch-&gt;base_q;</div><div class='ctx'> </div><div class='ctx'> 	/* Idea here for calculation is that we subtract the number of queue</div><div class='del'>-	 * count from TC that ring belongs to from it's absolute queue index</div><div class='add'>+	 * count from TC that ring belongs to from its absolute queue index</div><div class='ctx'> 	 * and as a result we get the queue's index within TC.</div><div class='ctx'> 	 */</div><div class='ctx'> 	return ring-&gt;q_index - vsi-&gt;tc_cfg.tc_info[tc].qoffset;</div><div class='hunk'>@@ -275,35 +274,26 @@ static void ice_cfg_xps_tx_ring(struct ice_tx_ring *ring)</div><div class='ctx'> 	if (test_and_set_bit(ICE_TX_XPS_INIT_DONE, ring-&gt;xps_state))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	netif_set_xps_queue(ring-&gt;netdev, &amp;ring-&gt;q_vector-&gt;affinity_mask,</div><div class='add'>+	netif_set_xps_queue(ring-&gt;netdev,</div><div class='add'>+			    &amp;ring-&gt;q_vector-&gt;napi.config-&gt;affinity_mask,</div><div class='ctx'> 			    ring-&gt;q_index);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_setup_tx_ctx - setup a struct ice_tlan_ctx instance</div><div class='del'>- * @ring: The Tx ring to configure</div><div class='del'>- * @tlan_ctx: Pointer to the Tx LAN queue context structure to be initialized</div><div class='del'>- * @pf_q: queue index in the PF space</div><div class='add'>+ * ice_set_txq_ctx_vmvf - set queue context VM/VF type and number by VSI type</div><div class='add'>+ * @ring: the Tx ring to configure</div><div class='add'>+ * @vmvf_type: VM/VF type</div><div class='add'>+ * @vmvf_num: VM/VF number</div><div class='ctx'>  *</div><div class='del'>- * Configure the Tx descriptor ring in TLAN context.</div><div class='add'>+ * Return: 0 on success and a negative value on error.</div><div class='ctx'>  */</div><div class='del'>-static void</div><div class='del'>-ice_setup_tx_ctx(struct ice_tx_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q)</div><div class='add'>+static int</div><div class='add'>+ice_set_txq_ctx_vmvf(struct ice_tx_ring *ring, u8 *vmvf_type, u16 *vmvf_num)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_vsi *vsi = ring-&gt;vsi;</div><div class='del'>-	struct ice_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='del'>-</div><div class='del'>-	tlan_ctx-&gt;base = ring-&gt;dma &gt;&gt; ICE_TLAN_CTX_BASE_S;</div><div class='del'>-</div><div class='del'>-	tlan_ctx-&gt;port_num = vsi-&gt;port_info-&gt;lport;</div><div class='del'>-</div><div class='del'>-	/* Transmit Queue Length */</div><div class='del'>-	tlan_ctx-&gt;qlen = ring-&gt;count;</div><div class='del'>-</div><div class='del'>-	ice_set_cgd_num(tlan_ctx, ring-&gt;dcb_tc);</div><div class='add'>+	struct ice_hw *hw;</div><div class='ctx'> </div><div class='del'>-	/* PF number */</div><div class='del'>-	tlan_ctx-&gt;pf_num = hw-&gt;pf_id;</div><div class='add'>+	hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	/* queue belongs to a specific VSI type</div><div class='ctx'> 	 * VF / VM index should be programmed per vmvf_type setting:</div><div class='hunk'>@@ -316,21 +306,60 @@ ice_setup_tx_ctx(struct ice_tx_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf</div><div class='ctx'> 	case ICE_VSI_CTRL:</div><div class='ctx'> 	case ICE_VSI_PF:</div><div class='ctx'> 		if (ring-&gt;ch)</div><div class='del'>-			tlan_ctx-&gt;vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VMQ;</div><div class='add'>+			*vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VMQ;</div><div class='ctx'> 		else</div><div class='del'>-			tlan_ctx-&gt;vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_PF;</div><div class='add'>+			*vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_PF;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ICE_VSI_VF:</div><div class='ctx'> 		/* Firmware expects vmvf_num to be absolute VF ID */</div><div class='del'>-		tlan_ctx-&gt;vmvf_num = hw-&gt;func_caps.vf_base_id + vsi-&gt;vf-&gt;vf_id;</div><div class='del'>-		tlan_ctx-&gt;vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VF;</div><div class='add'>+		*vmvf_num = hw-&gt;func_caps.vf_base_id + vsi-&gt;vf-&gt;vf_id;</div><div class='add'>+		*vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VF;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ICE_VSI_SF:</div><div class='del'>-		tlan_ctx-&gt;vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VMQ;</div><div class='add'>+		*vmvf_type = ICE_TLAN_CTX_VMVF_TYPE_VMQ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return;</div><div class='add'>+		dev_info(ice_pf_to_dev(vsi-&gt;back),</div><div class='add'>+			 "Unable to set VMVF type for VSI type %d\n",</div><div class='add'>+			 vsi-&gt;type);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_setup_tx_ctx - setup a struct ice_tlan_ctx instance</div><div class='add'>+ * @ring: the Tx ring to configure</div><div class='add'>+ * @tlan_ctx: pointer to the Tx LAN queue context structure to be initialized</div><div class='add'>+ * @pf_q: queue index in the PF space</div><div class='add'>+ *</div><div class='add'>+ * Configure the Tx descriptor ring in TLAN context.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and a negative value on error.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_setup_tx_ctx(struct ice_tx_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf_q)</div><div class='add'>+{</div><div class='add'>+	struct ice_vsi *vsi = ring-&gt;vsi;</div><div class='add'>+	struct ice_hw *hw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='add'>+	tlan_ctx-&gt;base = ring-&gt;dma &gt;&gt; ICE_TLAN_CTX_BASE_S;</div><div class='add'>+	tlan_ctx-&gt;port_num = vsi-&gt;port_info-&gt;lport;</div><div class='add'>+</div><div class='add'>+	/* Transmit Queue Length */</div><div class='add'>+	tlan_ctx-&gt;qlen = ring-&gt;count;</div><div class='add'>+</div><div class='add'>+	ice_set_cgd_num(tlan_ctx, ring-&gt;dcb_tc);</div><div class='add'>+</div><div class='add'>+	/* PF number */</div><div class='add'>+	tlan_ctx-&gt;pf_num = hw-&gt;pf_id;</div><div class='add'>+</div><div class='add'>+	err = ice_set_txq_ctx_vmvf(ring, &amp;tlan_ctx-&gt;vmvf_type,</div><div class='add'>+				   &amp;tlan_ctx-&gt;vmvf_num);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* make sure the context is associated with the right VSI */</div><div class='ctx'> 	if (ring-&gt;ch)</div><div class='hunk'>@@ -357,22 +386,83 @@ ice_setup_tx_ctx(struct ice_tx_ring *ring, struct ice_tlan_ctx *tlan_ctx, u16 pf</div><div class='ctx'> 	 * 1: Legacy Host Interface</div><div class='ctx'> 	 */</div><div class='ctx'> 	tlan_ctx-&gt;legacy_int = ICE_TX_LEGACY;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_rx_offset - Return expected offset into page to access data</div><div class='del'>- * @rx_ring: Ring we are requesting offset of</div><div class='add'>+ * ice_setup_txtime_ctx - setup a struct ice_txtime_ctx instance</div><div class='add'>+ * @ring: the tstamp ring to configure</div><div class='add'>+ * @txtime_ctx: pointer to the Tx time queue context structure to be initialized</div><div class='ctx'>  *</div><div class='del'>- * Returns the offset value for ring into the data buffer.</div><div class='add'>+ * Return: 0 on success and a negative value on error.</div><div class='ctx'>  */</div><div class='del'>-static unsigned int ice_rx_offset(struct ice_rx_ring *rx_ring)</div><div class='add'>+static int</div><div class='add'>+ice_setup_txtime_ctx(const struct ice_tstamp_ring *ring,</div><div class='add'>+		     struct ice_txtime_ctx *txtime_ctx)</div><div class='ctx'> {</div><div class='del'>-	if (ice_ring_uses_build_skb(rx_ring))</div><div class='del'>-		return ICE_SKB_PAD;</div><div class='add'>+	struct ice_tx_ring *tx_ring = ring-&gt;tx_ring;</div><div class='add'>+	struct ice_vsi *vsi = tx_ring-&gt;vsi;</div><div class='add'>+	struct ice_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	txtime_ctx-&gt;base = ring-&gt;dma &gt;&gt; ICE_TXTIME_CTX_BASE_S;</div><div class='add'>+</div><div class='add'>+	/* Tx time Queue Length */</div><div class='add'>+	txtime_ctx-&gt;qlen = ring-&gt;count;</div><div class='add'>+	txtime_ctx-&gt;txtime_ena_q = 1;</div><div class='add'>+</div><div class='add'>+	/* PF number */</div><div class='add'>+	txtime_ctx-&gt;pf_num = hw-&gt;pf_id;</div><div class='add'>+</div><div class='add'>+	err = ice_set_txq_ctx_vmvf(tx_ring, &amp;txtime_ctx-&gt;vmvf_type,</div><div class='add'>+				   &amp;txtime_ctx-&gt;vmvf_num);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* make sure the context is associated with the right VSI */</div><div class='add'>+	if (tx_ring-&gt;ch)</div><div class='add'>+		txtime_ctx-&gt;src_vsi = tx_ring-&gt;ch-&gt;vsi_num;</div><div class='add'>+	else</div><div class='add'>+		txtime_ctx-&gt;src_vsi = ice_get_hw_vsi_num(hw, vsi-&gt;idx);</div><div class='add'>+</div><div class='add'>+	txtime_ctx-&gt;ts_res = ICE_TXTIME_CTX_RESOLUTION_128NS;</div><div class='add'>+	txtime_ctx-&gt;drbell_mode_32 = ICE_TXTIME_CTX_DRBELL_MODE_32;</div><div class='add'>+	txtime_ctx-&gt;ts_fetch_prof_id = ICE_TXTIME_CTX_FETCH_PROF_ID_0;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_calc_ts_ring_count - calculate the number of Tx time stamp descriptors</div><div class='add'>+ * @tx_ring: Tx ring to calculate the count for</div><div class='add'>+ *</div><div class='add'>+ * Return: the number of Tx time stamp descriptors.</div><div class='add'>+ */</div><div class='add'>+u16 ice_calc_ts_ring_count(struct ice_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	u16 prof = ICE_TXTIME_CTX_FETCH_PROF_ID_0;</div><div class='add'>+	struct ice_vsi *vsi = tx_ring-&gt;vsi;</div><div class='add'>+	struct ice_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='add'>+	u16 max_fetch_desc = 0, fetch, i;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ICE_TXTIME_FETCH_PROFILE_CNT; i++) {</div><div class='add'>+		reg = rd32(hw, E830_GLTXTIME_FETCH_PROFILE(prof, 0));</div><div class='add'>+		fetch = FIELD_GET(E830_GLTXTIME_FETCH_PROFILE_FETCH_TS_DESC_M,</div><div class='add'>+				  reg);</div><div class='add'>+		max_fetch_desc = max(fetch, max_fetch_desc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!max_fetch_desc)</div><div class='add'>+		max_fetch_desc = ICE_TXTIME_FETCH_TS_DESC_DFLT;</div><div class='add'>+</div><div class='add'>+	max_fetch_desc = ALIGN(max_fetch_desc, ICE_REQ_DESC_MULTIPLE);</div><div class='add'>+</div><div class='add'>+	return tx_ring-&gt;count + max_fetch_desc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_setup_rx_ctx - Configure a receive ring context</div><div class='ctx'>  * @ring: The Rx ring to configure</div><div class='ctx'>  *</div><div class='hunk'>@@ -434,8 +524,29 @@ static int ice_setup_rx_ctx(struct ice_rx_ring *ring)</div><div class='ctx'> 	else</div><div class='ctx'> 		rlan_ctx.l2tsel = 1;</div><div class='ctx'> </div><div class='del'>-	rlan_ctx.dtype = ICE_RX_DTYPE_NO_SPLIT;</div><div class='del'>-	rlan_ctx.hsplit_0 = ICE_RLAN_RX_HSPLIT_0_NO_SPLIT;</div><div class='add'>+	if (ring-&gt;hdr_pp) {</div><div class='add'>+		rlan_ctx.hbuf = ring-&gt;rx_hdr_len &gt;&gt; ICE_RLAN_CTX_HBUF_S;</div><div class='add'>+		rlan_ctx.dtype = ICE_RX_DTYPE_HEADER_SPLIT;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If the frame is TCP/UDP/SCTP, it will be split by the</div><div class='add'>+		 * payload.</div><div class='add'>+		 * If not, but it's an IPv4/IPv6 frame, it will be split by</div><div class='add'>+		 * the IP header.</div><div class='add'>+		 * If not IP, it will be split by the Ethernet header.</div><div class='add'>+		 *</div><div class='add'>+		 * In any case, the header buffer will never be left empty.</div><div class='add'>+		 */</div><div class='add'>+		rlan_ctx.hsplit_0 = ICE_RLAN_RX_HSPLIT_0_SPLIT_L2 |</div><div class='add'>+				    ICE_RLAN_RX_HSPLIT_0_SPLIT_IP |</div><div class='add'>+				    ICE_RLAN_RX_HSPLIT_0_SPLIT_TCP_UDP |</div><div class='add'>+				    ICE_RLAN_RX_HSPLIT_0_SPLIT_SCTP;</div><div class='add'>+	} else {</div><div class='add'>+		rlan_ctx.hbuf = 0;</div><div class='add'>+		rlan_ctx.dtype = ICE_RX_DTYPE_NO_SPLIT;</div><div class='add'>+		rlan_ctx.hsplit_0 = ICE_RLAN_RX_HSPLIT_0_NO_SPLIT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	rlan_ctx.hsplit_1 = ICE_RLAN_RX_HSPLIT_1_NO_SPLIT;</div><div class='ctx'> </div><div class='ctx'> 	/* This controls whether VLAN is stripped from inner headers</div><div class='hunk'>@@ -447,12 +558,15 @@ static int ice_setup_rx_ctx(struct ice_rx_ring *ring)</div><div class='ctx'> 	/* Max packet size for this queue - must not be set to a larger value</div><div class='ctx'> 	 * than 5 x DBUF</div><div class='ctx'> 	 */</div><div class='del'>-	rlan_ctx.rxmax = min_t(u32, ring-&gt;max_frame,</div><div class='add'>+	rlan_ctx.rxmax = min_t(u32, vsi-&gt;max_frame,</div><div class='ctx'> 			       ICE_MAX_CHAINED_RX_BUFS * ring-&gt;rx_buf_len);</div><div class='ctx'> </div><div class='ctx'> 	/* Rx queue threshold in units of 64 */</div><div class='ctx'> 	rlan_ctx.lrxqthresh = 1;</div><div class='ctx'> </div><div class='add'>+	/* Enable descriptor prefetch */</div><div class='add'>+	rlan_ctx.prefena = 1;</div><div class='add'>+</div><div class='ctx'> 	/* PF acts as uplink for switchdev; set flex descriptor with src_vsi</div><div class='ctx'> 	 * metadata and flags to allow redirecting to PR netdev</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -469,9 +583,6 @@ static int ice_setup_rx_ctx(struct ice_rx_ring *ring)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (vsi-&gt;type != ICE_VSI_VF)</div><div class='ctx'> 		ice_write_qrxflxp_cntxt(hw, pf_q, rxdid, 0x3, true);</div><div class='del'>-	else</div><div class='del'>-		ice_write_qrxflxp_cntxt(hw, pf_q, ICE_RXDID_LEGACY_1, 0x3,</div><div class='del'>-					false);</div><div class='ctx'> </div><div class='ctx'> 	/* Absolute queue number out of 2K needs to be passed */</div><div class='ctx'> 	err = ice_write_rxq_ctx(hw, &amp;rlan_ctx, pf_q);</div><div class='hunk'>@@ -484,14 +595,6 @@ static int ice_setup_rx_ctx(struct ice_rx_ring *ring)</div><div class='ctx'> 	if (vsi-&gt;type == ICE_VSI_VF)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* configure Rx buffer alignment */</div><div class='del'>-	if (!vsi-&gt;netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi-&gt;back-&gt;flags))</div><div class='del'>-		ice_clear_ring_build_skb_ena(ring);</div><div class='del'>-	else</div><div class='del'>-		ice_set_ring_build_skb_ena(ring);</div><div class='del'>-</div><div class='del'>-	ring-&gt;rx_offset = ice_rx_offset(ring);</div><div class='del'>-</div><div class='ctx'> 	/* init queue specific tail register */</div><div class='ctx'> 	ring-&gt;tail = hw-&gt;hw_addr + QRX_TAIL(pf_q);</div><div class='ctx'> 	writel(0, ring-&gt;tail);</div><div class='hunk'>@@ -499,36 +602,51 @@ static int ice_setup_rx_ctx(struct ice_rx_ring *ring)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ice_xsk_pool_fill_cb(struct ice_rx_ring *ring)</div><div class='add'>+static int ice_rxq_pp_create(struct ice_rx_ring *rq)</div><div class='ctx'> {</div><div class='del'>-	void *ctx_ptr = &amp;ring-&gt;pkt_ctx;</div><div class='del'>-	struct xsk_cb_desc desc = {};</div><div class='del'>-</div><div class='del'>-	XSK_CHECK_PRIV_TYPE(struct ice_xdp_buff);</div><div class='del'>-	desc.src = &amp;ctx_ptr;</div><div class='del'>-	desc.off = offsetof(struct ice_xdp_buff, pkt_ctx) -</div><div class='del'>-		   sizeof(struct xdp_buff);</div><div class='del'>-	desc.bytes = sizeof(ctx_ptr);</div><div class='del'>-	xsk_pool_fill_cb(ring-&gt;xsk_pool, &amp;desc);</div><div class='del'>-}</div><div class='add'>+	struct libeth_fq fq = {</div><div class='add'>+		.count		= rq-&gt;count,</div><div class='add'>+		.nid		= NUMA_NO_NODE,</div><div class='add'>+		.hsplit		= rq-&gt;vsi-&gt;hsplit,</div><div class='add'>+		.xdp		= ice_is_xdp_ena_vsi(rq-&gt;vsi),</div><div class='add'>+		.buf_len	= LIBIE_MAX_RX_BUF_LEN,</div><div class='add'>+	};</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_get_frame_sz - calculate xdp_buff::frame_sz</div><div class='del'>- * @rx_ring: the ring being configured</div><div class='del'>- *</div><div class='del'>- * Return frame size based on underlying PAGE_SIZE</div><div class='del'>- */</div><div class='del'>-static unsigned int ice_get_frame_sz(struct ice_rx_ring *rx_ring)</div><div class='del'>-{</div><div class='del'>-	unsigned int frame_sz;</div><div class='add'>+	err = libeth_rx_fq_create(&amp;fq, &amp;rq-&gt;q_vector-&gt;napi);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	rq-&gt;pp = fq.pp;</div><div class='add'>+	rq-&gt;rx_fqes = fq.fqes;</div><div class='add'>+	rq-&gt;truesize = fq.truesize;</div><div class='add'>+	rq-&gt;rx_buf_len = fq.buf_len;</div><div class='add'>+</div><div class='add'>+	if (!fq.hsplit)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	fq = (struct libeth_fq){</div><div class='add'>+		.count		= rq-&gt;count,</div><div class='add'>+		.type		= LIBETH_FQE_HDR,</div><div class='add'>+		.nid		= NUMA_NO_NODE,</div><div class='add'>+		.xdp		= ice_is_xdp_ena_vsi(rq-&gt;vsi),</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-#if (PAGE_SIZE &gt;= 8192)</div><div class='del'>-	frame_sz = rx_ring-&gt;rx_buf_len;</div><div class='del'>-#else</div><div class='del'>-	frame_sz = ice_rx_pg_size(rx_ring) / 2;</div><div class='del'>-#endif</div><div class='add'>+	err = libeth_rx_fq_create(&amp;fq, &amp;rq-&gt;q_vector-&gt;napi);</div><div class='add'>+	if (err)</div><div class='add'>+		goto destroy;</div><div class='ctx'> </div><div class='del'>-	return frame_sz;</div><div class='add'>+	rq-&gt;hdr_pp = fq.pp;</div><div class='add'>+	rq-&gt;hdr_fqes = fq.fqes;</div><div class='add'>+	rq-&gt;hdr_truesize = fq.truesize;</div><div class='add'>+	rq-&gt;rx_hdr_len = fq.buf_len;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy:</div><div class='add'>+	ice_rxq_pp_destroy(rq);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -540,7 +658,8 @@ static unsigned int ice_get_frame_sz(struct ice_rx_ring *rx_ring)</div><div class='ctx'> static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = ice_pf_to_dev(ring-&gt;vsi-&gt;back);</div><div class='del'>-	u32 num_bufs = ICE_RX_DESC_UNUSED(ring);</div><div class='add'>+	u32 num_bufs = ICE_DESC_UNUSED(ring);</div><div class='add'>+	u32 rx_buf_len;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (ring-&gt;vsi-&gt;type == ICE_VSI_PF || ring-&gt;vsi-&gt;type == ICE_VSI_SF) {</div><div class='hunk'>@@ -554,15 +673,19 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ice_rx_xsk_pool(ring);</div><div class='add'>+		err = ice_realloc_rx_xdp_bufs(ring, ring-&gt;xsk_pool);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='ctx'> 		if (ring-&gt;xsk_pool) {</div><div class='ctx'> 			xdp_rxq_info_unreg(&amp;ring-&gt;xdp_rxq);</div><div class='ctx'> </div><div class='del'>-			ring-&gt;rx_buf_len =</div><div class='add'>+			rx_buf_len =</div><div class='ctx'> 				xsk_pool_get_rx_frame_size(ring-&gt;xsk_pool);</div><div class='ctx'> 			err = __xdp_rxq_info_reg(&amp;ring-&gt;xdp_rxq, ring-&gt;netdev,</div><div class='ctx'> 						 ring-&gt;q_index,</div><div class='ctx'> 						 ring-&gt;q_vector-&gt;napi.napi_id,</div><div class='del'>-						 ring-&gt;rx_buf_len);</div><div class='add'>+						 rx_buf_len);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return err;</div><div class='ctx'> 			err = xdp_rxq_info_reg_mem_model(&amp;ring-&gt;xdp_rxq,</div><div class='hunk'>@@ -571,36 +694,33 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring)</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return err;</div><div class='ctx'> 			xsk_pool_set_rxq_info(ring-&gt;xsk_pool, &amp;ring-&gt;xdp_rxq);</div><div class='del'>-			ice_xsk_pool_fill_cb(ring);</div><div class='ctx'> </div><div class='ctx'> 			dev_info(dev, "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",</div><div class='ctx'> 				 ring-&gt;q_index);</div><div class='ctx'> 		} else {</div><div class='add'>+			err = ice_rxq_pp_create(ring);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+</div><div class='ctx'> 			if (!xdp_rxq_info_is_reg(&amp;ring-&gt;xdp_rxq)) {</div><div class='ctx'> 				err = __xdp_rxq_info_reg(&amp;ring-&gt;xdp_rxq, ring-&gt;netdev,</div><div class='ctx'> 							 ring-&gt;q_index,</div><div class='ctx'> 							 ring-&gt;q_vector-&gt;napi.napi_id,</div><div class='ctx'> 							 ring-&gt;rx_buf_len);</div><div class='ctx'> 				if (err)</div><div class='del'>-					return err;</div><div class='add'>+					goto err_destroy_fq;</div><div class='ctx'> 			}</div><div class='del'>-</div><div class='del'>-			err = xdp_rxq_info_reg_mem_model(&amp;ring-&gt;xdp_rxq,</div><div class='del'>-							 MEM_TYPE_PAGE_SHARED,</div><div class='del'>-							 NULL);</div><div class='del'>-			if (err)</div><div class='del'>-				return err;</div><div class='add'>+			xdp_rxq_info_attach_page_pool(&amp;ring-&gt;xdp_rxq,</div><div class='add'>+						      ring-&gt;pp);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	xdp_init_buff(&amp;ring-&gt;xdp, ice_get_frame_sz(ring), &amp;ring-&gt;xdp_rxq);</div><div class='ctx'> 	ring-&gt;xdp.data = NULL;</div><div class='del'>-	ring-&gt;xdp_ext.pkt_ctx = &amp;ring-&gt;pkt_ctx;</div><div class='ctx'> 	err = ice_setup_rx_ctx(ring);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "ice_setup_rx_ctx failed for RxQ %d, err %d\n",</div><div class='ctx'> 			ring-&gt;q_index, err);</div><div class='del'>-		return err;</div><div class='add'>+		goto err_destroy_fq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ring-&gt;xsk_pool) {</div><div class='hunk'>@@ -625,9 +745,20 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ice_alloc_rx_bufs(ring, num_bufs);</div><div class='add'>+	if (ring-&gt;vsi-&gt;type == ICE_VSI_CTRL)</div><div class='add'>+		ice_init_ctrl_rx_descs(ring, num_bufs);</div><div class='add'>+	else</div><div class='add'>+		err = ice_alloc_rx_bufs(ring, num_bufs);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_destroy_fq;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_destroy_fq:</div><div class='add'>+	ice_rxq_pp_destroy(ring);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ice_vsi_cfg_single_rxq(struct ice_vsi *vsi, u16 q_idx)</div><div class='hunk'>@@ -648,18 +779,10 @@ int ice_vsi_cfg_single_rxq(struct ice_vsi *vsi, u16 q_idx)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_vsi_cfg_frame_size(struct ice_vsi *vsi, struct ice_rx_ring *ring)</div><div class='ctx'> {</div><div class='del'>-	if (!vsi-&gt;netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi-&gt;back-&gt;flags)) {</div><div class='del'>-		ring-&gt;max_frame = ICE_MAX_FRAME_LEGACY_RX;</div><div class='del'>-		ring-&gt;rx_buf_len = ICE_RXBUF_1664;</div><div class='del'>-#if (PAGE_SIZE &lt; 8192)</div><div class='del'>-	} else if (!ICE_2K_TOO_SMALL_WITH_PADDING &amp;&amp;</div><div class='del'>-		   (vsi-&gt;netdev-&gt;mtu &lt;= ETH_DATA_LEN)) {</div><div class='del'>-		ring-&gt;max_frame = ICE_RXBUF_1536 - NET_IP_ALIGN;</div><div class='del'>-		ring-&gt;rx_buf_len = ICE_RXBUF_1536 - NET_IP_ALIGN;</div><div class='del'>-#endif</div><div class='add'>+	if (!vsi-&gt;netdev) {</div><div class='add'>+		vsi-&gt;max_frame = ICE_MAX_FRAME_LEGACY_RX;</div><div class='ctx'> 	} else {</div><div class='del'>-		ring-&gt;max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;</div><div class='del'>-		ring-&gt;rx_buf_len = ICE_RXBUF_3072;</div><div class='add'>+		vsi-&gt;max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -797,13 +920,11 @@ int ice_vsi_alloc_q_vectors(struct ice_vsi *vsi)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_out:</div><div class='del'>-	while (v_idx--)</div><div class='del'>-		ice_free_q_vector(vsi, v_idx);</div><div class='ctx'> </div><div class='del'>-	dev_err(dev, "Failed to allocate %d q_vector for VSI %d, ret=%d\n",</div><div class='del'>-		vsi-&gt;num_q_vectors, vsi-&gt;vsi_num, err);</div><div class='del'>-	vsi-&gt;num_q_vectors = 0;</div><div class='del'>-	return err;</div><div class='add'>+	dev_info(dev, "Failed to allocate %d q_vectors for VSI %d, new value %d",</div><div class='add'>+		 vsi-&gt;num_q_vectors, vsi-&gt;vsi_num, v_idx);</div><div class='add'>+	vsi-&gt;num_q_vectors = v_idx;</div><div class='add'>+	return v_idx ? 0 : err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -883,13 +1004,49 @@ void ice_vsi_free_q_vectors(struct ice_vsi *vsi)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_cfg_tstamp - Configure Tx time stamp queue</div><div class='add'>+ * @tx_ring: Tx ring to be configured with timestamping</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and a negative value on error.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_cfg_tstamp(struct ice_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	DEFINE_RAW_FLEX(struct ice_aqc_set_txtime_qgrp, txtime_qg_buf,</div><div class='add'>+			txtimeqs, 1);</div><div class='add'>+	u8 txtime_buf_len = struct_size(txtime_qg_buf, txtimeqs, 1);</div><div class='add'>+	struct ice_tstamp_ring *tstamp_ring = tx_ring-&gt;tstamp_ring;</div><div class='add'>+	struct ice_txtime_ctx txtime_ctx = {};</div><div class='add'>+	struct ice_vsi *vsi = tx_ring-&gt;vsi;</div><div class='add'>+	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='add'>+	u16 pf_q = tx_ring-&gt;reg_idx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ice_setup_txtime_ctx(tstamp_ring, &amp;txtime_ctx);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(ice_pf_to_dev(pf), "Failed to setup Tx time queue context for queue %d, error: %d\n",</div><div class='add'>+			pf_q, err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	ice_pack_txtime_ctx(&amp;txtime_ctx,</div><div class='add'>+			    &amp;txtime_qg_buf-&gt;txtimeqs[0].txtime_ctx);</div><div class='add'>+</div><div class='add'>+	tstamp_ring-&gt;tail = hw-&gt;hw_addr + E830_GLQTX_TXTIME_DBELL_LSB(pf_q);</div><div class='add'>+	return ice_aq_set_txtimeq(hw, pf_q, 1, txtime_qg_buf,</div><div class='add'>+				  txtime_buf_len, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_vsi_cfg_txq - Configure single Tx queue</div><div class='ctx'>  * @vsi: the VSI that queue belongs to</div><div class='ctx'>  * @ring: Tx ring to be configured</div><div class='ctx'>  * @qg_buf: queue group buffer</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and a negative value on error.</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='del'>-ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_tx_ring *ring,</div><div class='add'>+ice_vsi_cfg_txq(const struct ice_vsi *vsi, struct ice_tx_ring *ring,</div><div class='ctx'> 		struct ice_aqc_add_tx_qgrp *qg_buf)</div><div class='ctx'> {</div><div class='ctx'> 	u8 buf_len = struct_size(qg_buf, txqs, 1);</div><div class='hunk'>@@ -898,19 +1055,23 @@ ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_tx_ring *ring,</div><div class='ctx'> 	struct ice_channel *ch = ring-&gt;ch;</div><div class='ctx'> 	struct ice_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='add'>+	u32 pf_q, vsi_idx;</div><div class='ctx'> 	int status;</div><div class='del'>-	u16 pf_q;</div><div class='ctx'> 	u8 tc;</div><div class='ctx'> </div><div class='ctx'> 	/* Configure XPS */</div><div class='ctx'> 	ice_cfg_xps_tx_ring(ring);</div><div class='ctx'> </div><div class='ctx'> 	pf_q = ring-&gt;reg_idx;</div><div class='del'>-	ice_setup_tx_ctx(ring, &amp;tlan_ctx, pf_q);</div><div class='add'>+	status = ice_setup_tx_ctx(ring, &amp;tlan_ctx, pf_q);</div><div class='add'>+	if (status) {</div><div class='add'>+		dev_err(ice_pf_to_dev(pf), "Failed to setup Tx context for queue %d, error: %d\n",</div><div class='add'>+			pf_q, status);</div><div class='add'>+		return status;</div><div class='add'>+	}</div><div class='ctx'> 	/* copy context contents into the qg_buf */</div><div class='ctx'> 	qg_buf-&gt;txqs[0].txq_id = cpu_to_le16(pf_q);</div><div class='del'>-	ice_set_ctx(hw, (u8 *)&amp;tlan_ctx, qg_buf-&gt;txqs[0].txq_ctx,</div><div class='del'>-		    ice_tlan_ctx_info);</div><div class='add'>+	ice_pack_txq_ctx(&amp;tlan_ctx, &amp;qg_buf-&gt;txqs[0].txq_ctx);</div><div class='ctx'> </div><div class='ctx'> 	/* init queue specific tail reg. It is referred as</div><div class='ctx'> 	 * transmit comm scheduler queue doorbell.</div><div class='hunk'>@@ -927,14 +1088,15 @@ ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_tx_ring *ring,</div><div class='ctx'> 	 */</div><div class='ctx'> 	ring-&gt;q_handle = ice_calc_txq_handle(vsi, ring, tc);</div><div class='ctx'> </div><div class='del'>-	if (ch)</div><div class='del'>-		status = ice_ena_vsi_txq(vsi-&gt;port_info, ch-&gt;ch_vsi-&gt;idx, 0,</div><div class='del'>-					 ring-&gt;q_handle, 1, qg_buf, buf_len,</div><div class='del'>-					 NULL);</div><div class='del'>-	else</div><div class='del'>-		status = ice_ena_vsi_txq(vsi-&gt;port_info, vsi-&gt;idx, tc,</div><div class='del'>-					 ring-&gt;q_handle, 1, qg_buf, buf_len,</div><div class='del'>-					 NULL);</div><div class='add'>+	if (ch) {</div><div class='add'>+		tc = 0;</div><div class='add'>+		vsi_idx = ch-&gt;ch_vsi-&gt;idx;</div><div class='add'>+	} else {</div><div class='add'>+		vsi_idx = vsi-&gt;idx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = ice_ena_vsi_txq(vsi-&gt;port_info, vsi_idx, tc, ring-&gt;q_handle,</div><div class='add'>+				 1, qg_buf, buf_len, NULL);</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(pf), "Failed to set LAN Tx queue context, error: %d\n",</div><div class='ctx'> 			status);</div><div class='hunk'>@@ -949,7 +1111,32 @@ ice_vsi_cfg_txq(struct ice_vsi *vsi, struct ice_tx_ring *ring,</div><div class='ctx'> 	if (pf_q == le16_to_cpu(txq-&gt;txq_id))</div><div class='ctx'> 		ring-&gt;txq_teid = le32_to_cpu(txq-&gt;q_teid);</div><div class='ctx'> </div><div class='add'>+	if (ice_is_txtime_ena(ring)) {</div><div class='add'>+		status = ice_alloc_setup_tstamp_ring(ring);</div><div class='add'>+		if (status) {</div><div class='add'>+			dev_err(ice_pf_to_dev(pf),</div><div class='add'>+				"Failed to allocate Tx timestamp ring, error: %d\n",</div><div class='add'>+				status);</div><div class='add'>+			goto err_setup_tstamp;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		status = ice_cfg_tstamp(ring);</div><div class='add'>+		if (status) {</div><div class='add'>+			dev_err(ice_pf_to_dev(pf), "Failed to set Tx Time queue context, error: %d\n",</div><div class='add'>+				status);</div><div class='add'>+			goto err_cfg_tstamp;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_cfg_tstamp:</div><div class='add'>+	ice_free_tx_tstamp_ring(ring);</div><div class='add'>+err_setup_tstamp:</div><div class='add'>+	ice_dis_vsi_txq(vsi-&gt;port_info, vsi_idx, tc, 1, &amp;ring-&gt;q_handle,</div><div class='add'>+			&amp;ring-&gt;reg_idx, &amp;ring-&gt;txq_teid, ICE_NO_RESET,</div><div class='add'>+			tlan_ctx.vmvf_num, NULL);</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ice_vsi_cfg_single_txq(struct ice_vsi *vsi, struct ice_tx_ring **tx_rings,</div><div class='hunk'>@@ -1208,3 +1395,148 @@ ice_fill_txq_meta(const struct ice_vsi *vsi, struct ice_tx_ring *ring,</div><div class='ctx'> 		txq_meta-&gt;tc = tc;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_qp_reset_stats - Resets all stats for rings of given index</div><div class='add'>+ * @vsi: VSI that contains rings of interest</div><div class='add'>+ * @q_idx: ring index in array</div><div class='add'>+ */</div><div class='add'>+static void ice_qp_reset_stats(struct ice_vsi *vsi, u16 q_idx)</div><div class='add'>+{</div><div class='add'>+	struct ice_vsi_stats *vsi_stat;</div><div class='add'>+	struct ice_pf *pf;</div><div class='add'>+</div><div class='add'>+	pf = vsi-&gt;back;</div><div class='add'>+	if (!pf-&gt;vsi_stats)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vsi_stat = pf-&gt;vsi_stats[vsi-&gt;idx];</div><div class='add'>+	if (!vsi_stat)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	memset(&amp;vsi_stat-&gt;rx_ring_stats[q_idx]-&gt;rx_stats, 0,</div><div class='add'>+	       sizeof(vsi_stat-&gt;rx_ring_stats[q_idx]-&gt;rx_stats));</div><div class='add'>+	memset(&amp;vsi_stat-&gt;tx_ring_stats[q_idx]-&gt;stats, 0,</div><div class='add'>+	       sizeof(vsi_stat-&gt;tx_ring_stats[q_idx]-&gt;stats));</div><div class='add'>+	if (vsi-&gt;xdp_rings)</div><div class='add'>+		memset(&amp;vsi-&gt;xdp_rings[q_idx]-&gt;ring_stats-&gt;stats, 0,</div><div class='add'>+		       sizeof(vsi-&gt;xdp_rings[q_idx]-&gt;ring_stats-&gt;stats));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_qp_clean_rings - Cleans all the rings of a given index</div><div class='add'>+ * @vsi: VSI that contains rings of interest</div><div class='add'>+ * @q_idx: ring index in array</div><div class='add'>+ */</div><div class='add'>+static void ice_qp_clean_rings(struct ice_vsi *vsi, u16 q_idx)</div><div class='add'>+{</div><div class='add'>+	ice_clean_tx_ring(vsi-&gt;tx_rings[q_idx]);</div><div class='add'>+	if (vsi-&gt;xdp_rings)</div><div class='add'>+		ice_clean_tx_ring(vsi-&gt;xdp_rings[q_idx]);</div><div class='add'>+	ice_clean_rx_ring(vsi-&gt;rx_rings[q_idx]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_qp_dis - Disables a queue pair</div><div class='add'>+ * @vsi: VSI of interest</div><div class='add'>+ * @q_idx: ring index in array</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 on success, negative on failure.</div><div class='add'>+ */</div><div class='add'>+int ice_qp_dis(struct ice_vsi *vsi, u16 q_idx)</div><div class='add'>+{</div><div class='add'>+	struct ice_txq_meta txq_meta = { };</div><div class='add'>+	struct ice_q_vector *q_vector;</div><div class='add'>+	struct ice_tx_ring *tx_ring;</div><div class='add'>+	struct ice_rx_ring *rx_ring;</div><div class='add'>+	int fail = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (q_idx &gt;= vsi-&gt;num_rxq || q_idx &gt;= vsi-&gt;num_txq)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tx_ring = vsi-&gt;tx_rings[q_idx];</div><div class='add'>+	rx_ring = vsi-&gt;rx_rings[q_idx];</div><div class='add'>+	q_vector = rx_ring-&gt;q_vector;</div><div class='add'>+</div><div class='add'>+	synchronize_net();</div><div class='add'>+	netif_carrier_off(vsi-&gt;netdev);</div><div class='add'>+	netif_tx_stop_queue(netdev_get_tx_queue(vsi-&gt;netdev, q_idx));</div><div class='add'>+</div><div class='add'>+	ice_qvec_dis_irq(vsi, rx_ring, q_vector);</div><div class='add'>+	ice_qvec_toggle_napi(vsi, q_vector, false);</div><div class='add'>+</div><div class='add'>+	ice_fill_txq_meta(vsi, tx_ring, &amp;txq_meta);</div><div class='add'>+	err = ice_vsi_stop_tx_ring(vsi, ICE_NO_RESET, 0, tx_ring, &amp;txq_meta);</div><div class='add'>+	if (!fail)</div><div class='add'>+		fail = err;</div><div class='add'>+	if (vsi-&gt;xdp_rings) {</div><div class='add'>+		struct ice_tx_ring *xdp_ring = vsi-&gt;xdp_rings[q_idx];</div><div class='add'>+</div><div class='add'>+		memset(&amp;txq_meta, 0, sizeof(txq_meta));</div><div class='add'>+		ice_fill_txq_meta(vsi, xdp_ring, &amp;txq_meta);</div><div class='add'>+		err = ice_vsi_stop_tx_ring(vsi, ICE_NO_RESET, 0, xdp_ring,</div><div class='add'>+					   &amp;txq_meta);</div><div class='add'>+		if (!fail)</div><div class='add'>+			fail = err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ice_vsi_ctrl_one_rx_ring(vsi, false, q_idx, false);</div><div class='add'>+	ice_qp_clean_rings(vsi, q_idx);</div><div class='add'>+	ice_qp_reset_stats(vsi, q_idx);</div><div class='add'>+</div><div class='add'>+	return fail;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_qp_ena - Enables a queue pair</div><div class='add'>+ * @vsi: VSI of interest</div><div class='add'>+ * @q_idx: ring index in array</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 on success, negative on failure.</div><div class='add'>+ */</div><div class='add'>+int ice_qp_ena(struct ice_vsi *vsi, u16 q_idx)</div><div class='add'>+{</div><div class='add'>+	struct ice_q_vector *q_vector;</div><div class='add'>+	int fail = 0;</div><div class='add'>+	bool link_up;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ice_vsi_cfg_single_txq(vsi, vsi-&gt;tx_rings, q_idx);</div><div class='add'>+	if (!fail)</div><div class='add'>+		fail = err;</div><div class='add'>+</div><div class='add'>+	if (ice_is_xdp_ena_vsi(vsi)) {</div><div class='add'>+		struct ice_tx_ring *xdp_ring = vsi-&gt;xdp_rings[q_idx];</div><div class='add'>+</div><div class='add'>+		err = ice_vsi_cfg_single_txq(vsi, vsi-&gt;xdp_rings, q_idx);</div><div class='add'>+		if (!fail)</div><div class='add'>+			fail = err;</div><div class='add'>+		ice_set_ring_xdp(xdp_ring);</div><div class='add'>+		ice_tx_xsk_pool(vsi, q_idx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ice_vsi_cfg_single_rxq(vsi, q_idx);</div><div class='add'>+	if (!fail)</div><div class='add'>+		fail = err;</div><div class='add'>+</div><div class='add'>+	q_vector = vsi-&gt;rx_rings[q_idx]-&gt;q_vector;</div><div class='add'>+	ice_qvec_cfg_msix(vsi, q_vector, q_idx);</div><div class='add'>+</div><div class='add'>+	err = ice_vsi_ctrl_one_rx_ring(vsi, true, q_idx, true);</div><div class='add'>+	if (!fail)</div><div class='add'>+		fail = err;</div><div class='add'>+</div><div class='add'>+	ice_qvec_toggle_napi(vsi, q_vector, true);</div><div class='add'>+	ice_qvec_ena_irq(vsi, q_vector);</div><div class='add'>+</div><div class='add'>+	/* make sure NAPI sees updated ice_{t,x}_ring::xsk_pool */</div><div class='add'>+	synchronize_net();</div><div class='add'>+	ice_get_link_status(vsi-&gt;port_info, &amp;link_up);</div><div class='add'>+	if (link_up) {</div><div class='add'>+		netif_tx_start_queue(netdev_get_tx_queue(vsi-&gt;netdev, q_idx));</div><div class='add'>+		netif_carrier_on(vsi-&gt;netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return fail;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_base.h b/drivers/net/ethernet/intel/ice/ice_base.h<br/>index b711bc921928..d28294247599 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_base.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_base.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_base.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_base.h</a></div><div class='hunk'>@@ -32,4 +32,7 @@ ice_vsi_stop_tx_ring(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,</div><div class='ctx'> void</div><div class='ctx'> ice_fill_txq_meta(const struct ice_vsi *vsi, struct ice_tx_ring *ring,</div><div class='ctx'> 		  struct ice_txq_meta *txq_meta);</div><div class='add'>+int ice_qp_ena(struct ice_vsi *vsi, u16 q_idx);</div><div class='add'>+int ice_qp_dis(struct ice_vsi *vsi, u16 q_idx);</div><div class='add'>+u16 ice_calc_ts_ring_count(struct ice_tx_ring *tx_ring);</div><div class='ctx'> #endif /* _ICE_BASE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_cgu_regs.h b/drivers/net/ethernet/intel/ice/ice_cgu_regs.h<br/>deleted file mode 100644<br/>index 10d9d74f3545..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_cgu_regs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_cgu_regs.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,181 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/* Copyright (C) 2018-2021, Intel Corporation. */</div><div class='del'>-</div><div class='del'>-#ifndef _ICE_CGU_REGS_H_</div><div class='del'>-#define _ICE_CGU_REGS_H_</div><div class='del'>-</div><div class='del'>-#define NAC_CGU_DWORD9 0x24</div><div class='del'>-union nac_cgu_dword9 {</div><div class='del'>-	struct {</div><div class='del'>-		u32 time_ref_freq_sel : 3;</div><div class='del'>-		u32 clk_eref1_en : 1;</div><div class='del'>-		u32 clk_eref0_en : 1;</div><div class='del'>-		u32 time_ref_en : 1;</div><div class='del'>-		u32 time_sync_en : 1;</div><div class='del'>-		u32 one_pps_out_en : 1;</div><div class='del'>-		u32 clk_ref_synce_en : 1;</div><div class='del'>-		u32 clk_synce1_en : 1;</div><div class='del'>-		u32 clk_synce0_en : 1;</div><div class='del'>-		u32 net_clk_ref1_en : 1;</div><div class='del'>-		u32 net_clk_ref0_en : 1;</div><div class='del'>-		u32 clk_synce1_amp : 2;</div><div class='del'>-		u32 misc6 : 1;</div><div class='del'>-		u32 clk_synce0_amp : 2;</div><div class='del'>-		u32 one_pps_out_amp : 2;</div><div class='del'>-		u32 misc24 : 12;</div><div class='del'>-	};</div><div class='del'>-	u32 val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define NAC_CGU_DWORD16_E825C 0x40</div><div class='del'>-union nac_cgu_dword16_e825c {</div><div class='del'>-	struct {</div><div class='del'>-		u32 synce_remndr : 6;</div><div class='del'>-		u32 synce_phlmt_en : 1;</div><div class='del'>-		u32 misc13 : 17;</div><div class='del'>-		u32 tspll_ck_refclkfreq : 8;</div><div class='del'>-	};</div><div class='del'>-	u32 val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define NAC_CGU_DWORD19 0x4c</div><div class='del'>-union nac_cgu_dword19 {</div><div class='del'>-	struct {</div><div class='del'>-		u32 tspll_fbdiv_intgr : 8;</div><div class='del'>-		u32 fdpll_ulck_thr : 5;</div><div class='del'>-		u32 misc15 : 3;</div><div class='del'>-		u32 tspll_ndivratio : 4;</div><div class='del'>-		u32 tspll_iref_ndivratio : 3;</div><div class='del'>-		u32 misc19 : 1;</div><div class='del'>-		u32 japll_ndivratio : 4;</div><div class='del'>-		u32 japll_iref_ndivratio : 3;</div><div class='del'>-		u32 misc27 : 1;</div><div class='del'>-	};</div><div class='del'>-	u32 val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define NAC_CGU_DWORD22 0x58</div><div class='del'>-union nac_cgu_dword22 {</div><div class='del'>-	struct {</div><div class='del'>-		u32 fdpll_frac_div_out_nc : 2;</div><div class='del'>-		u32 fdpll_lock_int_for : 1;</div><div class='del'>-		u32 synce_hdov_int_for : 1;</div><div class='del'>-		u32 synce_lock_int_for : 1;</div><div class='del'>-		u32 fdpll_phlead_slip_nc : 1;</div><div class='del'>-		u32 fdpll_acc1_ovfl_nc : 1;</div><div class='del'>-		u32 fdpll_acc2_ovfl_nc : 1;</div><div class='del'>-		u32 synce_status_nc : 6;</div><div class='del'>-		u32 fdpll_acc1f_ovfl : 1;</div><div class='del'>-		u32 misc18 : 1;</div><div class='del'>-		u32 fdpllclk_div : 4;</div><div class='del'>-		u32 time1588clk_div : 4;</div><div class='del'>-		u32 synceclk_div : 4;</div><div class='del'>-		u32 synceclk_sel_div2 : 1;</div><div class='del'>-		u32 fdpllclk_sel_div2 : 1;</div><div class='del'>-		u32 time1588clk_sel_div2 : 1;</div><div class='del'>-		u32 misc3 : 1;</div><div class='del'>-	};</div><div class='del'>-	u32 val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define NAC_CGU_DWORD23_E825C 0x5C</div><div class='del'>-union nac_cgu_dword23_e825c {</div><div class='del'>-	struct {</div><div class='del'>-		u32 cgupll_fbdiv_intgr : 10;</div><div class='del'>-		u32 ux56pll_fbdiv_intgr : 10;</div><div class='del'>-		u32 misc20 : 4;</div><div class='del'>-		u32 ts_pll_enable : 1;</div><div class='del'>-		u32 time_sync_tspll_align_sel : 1;</div><div class='del'>-		u32 ext_synce_sel : 1;</div><div class='del'>-		u32 ref1588_ck_div : 4;</div><div class='del'>-		u32 time_ref_sel : 1;</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-	u32 val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define NAC_CGU_DWORD24 0x60</div><div class='del'>-union nac_cgu_dword24 {</div><div class='del'>-	struct {</div><div class='del'>-		u32 tspll_fbdiv_frac : 22;</div><div class='del'>-		u32 misc20 : 2;</div><div class='del'>-		u32 ts_pll_enable : 1;</div><div class='del'>-		u32 time_sync_tspll_align_sel : 1;</div><div class='del'>-		u32 ext_synce_sel : 1;</div><div class='del'>-		u32 ref1588_ck_div : 4;</div><div class='del'>-		u32 time_ref_sel : 1;</div><div class='del'>-	};</div><div class='del'>-	u32 val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define TSPLL_CNTR_BIST_SETTINGS 0x344</div><div class='del'>-union tspll_cntr_bist_settings {</div><div class='del'>-	struct {</div><div class='del'>-		u32 i_irefgen_settling_time_cntr_7_0 : 8;</div><div class='del'>-		u32 i_irefgen_settling_time_ro_standby_1_0 : 2;</div><div class='del'>-		u32 reserved195 : 5;</div><div class='del'>-		u32 i_plllock_sel_0 : 1;</div><div class='del'>-		u32 i_plllock_sel_1 : 1;</div><div class='del'>-		u32 i_plllock_cnt_6_0 : 7;</div><div class='del'>-		u32 i_plllock_cnt_10_7 : 4;</div><div class='del'>-		u32 reserved200 : 4;</div><div class='del'>-	};</div><div class='del'>-	u32 val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define TSPLL_RO_BWM_LF 0x370</div><div class='del'>-union tspll_ro_bwm_lf {</div><div class='del'>-	struct {</div><div class='del'>-		u32 bw_freqov_high_cri_7_0 : 8;</div><div class='del'>-		u32 bw_freqov_high_cri_9_8 : 2;</div><div class='del'>-		u32 biascaldone_cri : 1;</div><div class='del'>-		u32 plllock_gain_tran_cri : 1;</div><div class='del'>-		u32 plllock_true_lock_cri : 1;</div><div class='del'>-		u32 pllunlock_flag_cri : 1;</div><div class='del'>-		u32 afcerr_cri : 1;</div><div class='del'>-		u32 afcdone_cri : 1;</div><div class='del'>-		u32 feedfwrdgain_cal_cri_7_0 : 8;</div><div class='del'>-		u32 m2fbdivmod_cri_7_0 : 8;</div><div class='del'>-	};</div><div class='del'>-	u32 val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define TSPLL_RO_LOCK_E825C 0x3f0</div><div class='del'>-union tspll_ro_lock_e825c {</div><div class='del'>-	struct {</div><div class='del'>-		u32 bw_freqov_high_cri_7_0 : 8;</div><div class='del'>-		u32 bw_freqov_high_cri_9_8 : 2;</div><div class='del'>-		u32 reserved455 : 1;</div><div class='del'>-		u32 plllock_gain_tran_cri : 1;</div><div class='del'>-		u32 plllock_true_lock_cri : 1;</div><div class='del'>-		u32 pllunlock_flag_cri : 1;</div><div class='del'>-		u32 afcerr_cri : 1;</div><div class='del'>-		u32 afcdone_cri : 1;</div><div class='del'>-		u32 feedfwrdgain_cal_cri_7_0 : 8;</div><div class='del'>-		u32 reserved462 : 8;</div><div class='del'>-	};</div><div class='del'>-	u32 val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define TSPLL_BW_TDC_E825C 0x31c</div><div class='del'>-union tspll_bw_tdc_e825c {</div><div class='del'>-	struct {</div><div class='del'>-		u32 i_tdc_offset_lock_1_0 : 2;</div><div class='del'>-		u32 i_bbthresh1_2_0 : 3;</div><div class='del'>-		u32 i_bbthresh2_2_0 : 3;</div><div class='del'>-		u32 i_tdcsel_1_0 : 2;</div><div class='del'>-		u32 i_tdcovccorr_en_h : 1;</div><div class='del'>-		u32 i_divretimeren : 1;</div><div class='del'>-		u32 i_bw_ampmeas_window : 1;</div><div class='del'>-		u32 i_bw_lowerbound_2_0 : 3;</div><div class='del'>-		u32 i_bw_upperbound_2_0 : 3;</div><div class='del'>-		u32 i_bw_mode_1_0 : 2;</div><div class='del'>-		u32 i_ft_mode_sel_2_0 : 3;</div><div class='del'>-		u32 i_bwphase_4_0 : 5;</div><div class='del'>-		u32 i_plllock_sel_1_0 : 2;</div><div class='del'>-		u32 i_afc_divratio : 1;</div><div class='del'>-	};</div><div class='del'>-	u32 val;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif /* _ICE_CGU_REGS_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c<br/>index b22e71dc59d4..046bc9c65c51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_common.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include "ice_adminq_cmd.h"</div><div class='ctx'> #include "ice_flow.h"</div><div class='ctx'> #include "ice_ptp_hw.h"</div><div class='add'>+#include &lt;linux/packing.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define ICE_PF_RESET_WAIT_COUNT	300</div><div class='ctx'> #define ICE_MAX_NETLIST_SIZE	10</div><div class='hunk'>@@ -170,6 +171,15 @@ static int ice_set_mac_type(struct ice_hw *hw)</div><div class='ctx'> 	case ICE_DEV_ID_E830_XXV_QSFP:</div><div class='ctx'> 	case ICE_DEV_ID_E830C_SFP:</div><div class='ctx'> 	case ICE_DEV_ID_E830_XXV_SFP:</div><div class='add'>+	case ICE_DEV_ID_E835CC_BACKPLANE:</div><div class='add'>+	case ICE_DEV_ID_E835CC_QSFP56:</div><div class='add'>+	case ICE_DEV_ID_E835CC_SFP:</div><div class='add'>+	case ICE_DEV_ID_E835C_BACKPLANE:</div><div class='add'>+	case ICE_DEV_ID_E835C_QSFP:</div><div class='add'>+	case ICE_DEV_ID_E835C_SFP:</div><div class='add'>+	case ICE_DEV_ID_E835_L_BACKPLANE:</div><div class='add'>+	case ICE_DEV_ID_E835_L_QSFP:</div><div class='add'>+	case ICE_DEV_ID_E835_L_SFP:</div><div class='ctx'> 		hw-&gt;mac_type = ICE_MAC_E830;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -185,7 +195,7 @@ static int ice_set_mac_type(struct ice_hw *hw)</div><div class='ctx'>  * ice_is_generic_mac - check if device's mac_type is generic</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='ctx'>  *</div><div class='del'>- * Return: true if mac_type is generic (with SBQ support), false if not</div><div class='add'>+ * Return: true if mac_type is ICE_MAC_GENERIC*, false otherwise.</div><div class='ctx'>  */</div><div class='ctx'> bool ice_is_generic_mac(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='hunk'>@@ -194,117 +204,39 @@ bool ice_is_generic_mac(struct ice_hw *hw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_is_e810</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='del'>- *</div><div class='del'>- * returns true if the device is E810 based, false if not.</div><div class='del'>- */</div><div class='del'>-bool ice_is_e810(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	return hw-&gt;mac_type == ICE_MAC_E810;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_is_e810t</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='add'>+ * ice_is_pf_c827 - check if pf contains c827 phy</div><div class='add'>+ * @hw: pointer to the hw struct</div><div class='ctx'>  *</div><div class='del'>- * returns true if the device is E810T based, false if not.</div><div class='add'>+ * Return: true if the device has c827 phy.</div><div class='ctx'>  */</div><div class='del'>-bool ice_is_e810t(struct ice_hw *hw)</div><div class='add'>+static bool ice_is_pf_c827(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	switch (hw-&gt;device_id) {</div><div class='del'>-	case ICE_DEV_ID_E810C_SFP:</div><div class='del'>-		switch (hw-&gt;subsystem_device_id) {</div><div class='del'>-		case ICE_SUBDEV_ID_E810T:</div><div class='del'>-		case ICE_SUBDEV_ID_E810T2:</div><div class='del'>-		case ICE_SUBDEV_ID_E810T3:</div><div class='del'>-		case ICE_SUBDEV_ID_E810T4:</div><div class='del'>-		case ICE_SUBDEV_ID_E810T6:</div><div class='del'>-		case ICE_SUBDEV_ID_E810T7:</div><div class='del'>-			return true;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case ICE_DEV_ID_E810C_QSFP:</div><div class='del'>-		switch (hw-&gt;subsystem_device_id) {</div><div class='del'>-		case ICE_SUBDEV_ID_E810T2:</div><div class='del'>-		case ICE_SUBDEV_ID_E810T3:</div><div class='del'>-		case ICE_SUBDEV_ID_E810T5:</div><div class='del'>-			return true;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='add'>+	struct ice_aqc_get_link_topo cmd = {};</div><div class='add'>+	u8 node_part_number;</div><div class='add'>+	u16 node_handle;</div><div class='add'>+	int status;</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_is_e822 - Check if a device is E822 family device</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='del'>- *</div><div class='del'>- * Return: true if the device is E822 based, false if not.</div><div class='del'>- */</div><div class='del'>-bool ice_is_e822(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	switch (hw-&gt;device_id) {</div><div class='del'>-	case ICE_DEV_ID_E822C_BACKPLANE:</div><div class='del'>-	case ICE_DEV_ID_E822C_QSFP:</div><div class='del'>-	case ICE_DEV_ID_E822C_SFP:</div><div class='del'>-	case ICE_DEV_ID_E822C_10G_BASE_T:</div><div class='del'>-	case ICE_DEV_ID_E822C_SGMII:</div><div class='del'>-	case ICE_DEV_ID_E822L_BACKPLANE:</div><div class='del'>-	case ICE_DEV_ID_E822L_SFP:</div><div class='del'>-	case ICE_DEV_ID_E822L_10G_BASE_T:</div><div class='del'>-	case ICE_DEV_ID_E822L_SGMII:</div><div class='del'>-		return true;</div><div class='del'>-	default:</div><div class='add'>+	if (hw-&gt;mac_type != ICE_MAC_E810)</div><div class='ctx'> 		return false;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_is_e823</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='del'>- *</div><div class='del'>- * returns true if the device is E823-L or E823-C based, false if not.</div><div class='del'>- */</div><div class='del'>-bool ice_is_e823(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	switch (hw-&gt;device_id) {</div><div class='del'>-	case ICE_DEV_ID_E823L_BACKPLANE:</div><div class='del'>-	case ICE_DEV_ID_E823L_SFP:</div><div class='del'>-	case ICE_DEV_ID_E823L_10G_BASE_T:</div><div class='del'>-	case ICE_DEV_ID_E823L_1GBE:</div><div class='del'>-	case ICE_DEV_ID_E823L_QSFP:</div><div class='del'>-	case ICE_DEV_ID_E823C_BACKPLANE:</div><div class='del'>-	case ICE_DEV_ID_E823C_QSFP:</div><div class='del'>-	case ICE_DEV_ID_E823C_SFP:</div><div class='del'>-	case ICE_DEV_ID_E823C_10G_BASE_T:</div><div class='del'>-	case ICE_DEV_ID_E823C_SGMII:</div><div class='add'>+	if (hw-&gt;device_id != ICE_DEV_ID_E810C_QSFP)</div><div class='ctx'> 		return true;</div><div class='del'>-	default:</div><div class='add'>+</div><div class='add'>+	cmd.addr.topo_params.node_type_ctx =</div><div class='add'>+		FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_TYPE_M, ICE_AQC_LINK_TOPO_NODE_TYPE_PHY) |</div><div class='add'>+		FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M, ICE_AQC_LINK_TOPO_NODE_CTX_PORT);</div><div class='add'>+	cmd.addr.topo_params.index = 0;</div><div class='add'>+</div><div class='add'>+	status = ice_aq_get_netlist_node(hw, &amp;cmd, &amp;node_part_number,</div><div class='add'>+					 &amp;node_handle);</div><div class='add'>+</div><div class='add'>+	if (status || node_part_number != ICE_AQC_GET_LINK_TOPO_NODE_NR_C827)</div><div class='ctx'> 		return false;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_is_e825c - Check if a device is E825C family device</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='del'>- *</div><div class='del'>- * Return: true if the device is E825-C based, false if not.</div><div class='del'>- */</div><div class='del'>-bool ice_is_e825c(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	switch (hw-&gt;device_id) {</div><div class='del'>-	case ICE_DEV_ID_E825C_BACKPLANE:</div><div class='del'>-	case ICE_DEV_ID_E825C_QSFP:</div><div class='del'>-	case ICE_DEV_ID_E825C_SFP:</div><div class='del'>-	case ICE_DEV_ID_E825C_SGMII:</div><div class='add'>+	if (node_handle == E810C_QSFP_C827_0_HANDLE || node_handle == E810C_QSFP_C827_1_HANDLE)</div><div class='ctx'> 		return true;</div><div class='del'>-	default:</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -316,7 +248,7 @@ bool ice_is_e825c(struct ice_hw *hw)</div><div class='ctx'>  */</div><div class='ctx'> int ice_clear_pf_cfg(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_clear_pf_cfg);</div><div class='ctx'> </div><div class='hunk'>@@ -344,12 +276,12 @@ ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_manage_mac_read_resp *resp;</div><div class='ctx'> 	struct ice_aqc_manage_mac_read *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	u16 flags;</div><div class='ctx'> 	u8 i;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.mac_read;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	if (buf_size &lt; sizeof(*resp))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -398,12 +330,12 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_phy_caps *cmd;</div><div class='ctx'> 	u16 pcaps_size = sizeof(*pcaps);</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	const char *prefix;</div><div class='ctx'> 	struct ice_hw *hw;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.get_phy;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	if (!pcaps || (report_mode &amp; ~ICE_AQC_REPORT_MODE_M) || !pi)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -492,9 +424,9 @@ ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type,</div><div class='ctx'> 			    struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_link_topo *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.get_link_topo;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_link_topo);</div><div class='ctx'> </div><div class='hunk'>@@ -522,19 +454,20 @@ int</div><div class='ctx'> ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,</div><div class='ctx'> 			u8 *node_part_number, u16 *node_handle)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct ice_aqc_get_link_topo *resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_link_topo);</div><div class='del'>-	desc.params.get_link_topo = *cmd;</div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	*resp = *cmd;</div><div class='ctx'> </div><div class='ctx'> 	if (ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL))</div><div class='ctx'> 		return -EINTR;</div><div class='ctx'> </div><div class='ctx'> 	if (node_handle)</div><div class='del'>-		*node_handle =</div><div class='del'>-			le16_to_cpu(desc.params.get_link_topo.addr.handle);</div><div class='add'>+		*node_handle = le16_to_cpu(resp-&gt;addr.handle);</div><div class='ctx'> 	if (node_part_number)</div><div class='del'>-		*node_part_number = desc.params.get_link_topo.node_part_num;</div><div class='add'>+		*node_part_number = resp-&gt;node_part_num;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -542,7 +475,8 @@ ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,</div><div class='ctx'> /**</div><div class='ctx'>  * ice_find_netlist_node</div><div class='ctx'>  * @hw: pointer to the hw struct</div><div class='del'>- * @node_type_ctx: type of netlist node to look for</div><div class='add'>+ * @node_type: type of netlist node to look for</div><div class='add'>+ * @ctx: context of the search</div><div class='ctx'>  * @node_part_number: node part number to look for</div><div class='ctx'>  * @node_handle: output parameter if node found - optional</div><div class='ctx'>  *</div><div class='hunk'>@@ -552,10 +486,12 @@ ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,</div><div class='ctx'>  * valid if the function returns zero, and should be ignored on any non-zero</div><div class='ctx'>  * return value.</div><div class='ctx'>  *</div><div class='del'>- * Returns: 0 if the node is found, -ENOENT if no handle was found, and</div><div class='del'>- * a negative error code on failure to access the AQ.</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 if the node is found,</div><div class='add'>+ * * -ENOENT if no handle was found,</div><div class='add'>+ * * negative error code on failure to access the AQ.</div><div class='ctx'>  */</div><div class='del'>-static int ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx,</div><div class='add'>+static int ice_find_netlist_node(struct ice_hw *hw, u8 node_type, u8 ctx,</div><div class='ctx'> 				 u8 node_part_number, u16 *node_handle)</div><div class='ctx'> {</div><div class='ctx'> 	u8 idx;</div><div class='hunk'>@@ -566,8 +502,8 @@ static int ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx,</div><div class='ctx'> 		int status;</div><div class='ctx'> </div><div class='ctx'> 		cmd.addr.topo_params.node_type_ctx =</div><div class='del'>-			FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_TYPE_M,</div><div class='del'>-				   node_type_ctx);</div><div class='add'>+			FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_TYPE_M, node_type) |</div><div class='add'>+			FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M, ctx);</div><div class='ctx'> 		cmd.addr.topo_params.index = idx;</div><div class='ctx'> </div><div class='ctx'> 		status = ice_aq_get_netlist_node(hw, &amp;cmd,</div><div class='hunk'>@@ -754,8 +690,8 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,</div><div class='ctx'> 	struct ice_link_status *li_old, *li;</div><div class='ctx'> 	enum ice_media_type *hw_media_type;</div><div class='ctx'> 	struct ice_fc_info *hw_fc_info;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	bool tx_pause, rx_pause;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='ctx'> 	struct ice_hw *hw;</div><div class='ctx'> 	u16 cmd_flags;</div><div class='ctx'> 	int status;</div><div class='hunk'>@@ -770,7 +706,7 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_link_status);</div><div class='ctx'> 	cmd_flags = (ena_lse) ? ICE_AQ_LSE_ENA : ICE_AQ_LSE_DIS;</div><div class='del'>-	resp = &amp;desc.params.get_link_status;</div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	resp-&gt;cmd_flags = cpu_to_le16(cmd_flags);</div><div class='ctx'> 	resp-&gt;lport_num = pi-&gt;lport;</div><div class='ctx'> </div><div class='hunk'>@@ -899,9 +835,9 @@ int</div><div class='ctx'> ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_mac_cfg *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.set_mac_cfg;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	if (max_frame_size == 0)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1022,6 +958,64 @@ static void ice_get_itr_intrl_gran(struct ice_hw *hw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_wait_for_fw - wait for full FW readiness</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @timeout: milliseconds that can elapse before timing out</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -ETIMEDOUT on timeout.</div><div class='add'>+ */</div><div class='add'>+static int ice_wait_for_fw(struct ice_hw *hw, u32 timeout)</div><div class='add'>+{</div><div class='add'>+	int fw_loading;</div><div class='add'>+	u32 elapsed = 0;</div><div class='add'>+</div><div class='add'>+	while (elapsed &lt;= timeout) {</div><div class='add'>+		fw_loading = rd32(hw, GL_MNG_FWSM) &amp; GL_MNG_FWSM_FW_LOADING_M;</div><div class='add'>+</div><div class='add'>+		/* firmware was not yet loaded, we have to wait more */</div><div class='add'>+		if (fw_loading) {</div><div class='add'>+			elapsed += 100;</div><div class='add'>+			msleep(100);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __fwlog_send_cmd(void *priv, struct libie_aq_desc *desc, void *buf,</div><div class='add'>+			    u16 size)</div><div class='add'>+{</div><div class='add'>+	struct ice_hw *hw = priv;</div><div class='add'>+</div><div class='add'>+	return ice_aq_send_cmd(hw, desc, buf, size, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __fwlog_init(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = hw-&gt;back;</div><div class='add'>+	struct libie_fwlog_api api = {</div><div class='add'>+		.pdev = pf-&gt;pdev,</div><div class='add'>+		.send_cmd = __fwlog_send_cmd,</div><div class='add'>+		.priv = hw,</div><div class='add'>+	};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* only support fw log commands on PF 0 */</div><div class='add'>+	if (hw-&gt;bus.func)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = ice_debugfs_pf_init(pf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	api.debugfs_root = pf-&gt;ice_debugfs_pf;</div><div class='add'>+</div><div class='add'>+	return libie_fwlog_init(&amp;hw-&gt;fwlog, &amp;api);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_init_hw - main hardware initialization routine</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='ctx'>  */</div><div class='hunk'>@@ -1049,7 +1043,7 @@ int ice_init_hw(struct ice_hw *hw)</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto err_unroll_cqinit;</div><div class='ctx'> </div><div class='del'>-	status = ice_fwlog_init(hw);</div><div class='add'>+	status = __fwlog_init(hw);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_FW_LOG, "Error initializing FW logging: %d\n",</div><div class='ctx'> 			  status);</div><div class='hunk'>@@ -1167,11 +1161,27 @@ int ice_init_hw(struct ice_hw *hw)</div><div class='ctx'> 	status = ice_init_hw_tbls(hw);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto err_unroll_fltr_mgmt_struct;</div><div class='add'>+</div><div class='add'>+	ice_init_dev_hw(hw-&gt;back);</div><div class='add'>+</div><div class='ctx'> 	mutex_init(&amp;hw-&gt;tnl_lock);</div><div class='ctx'> 	ice_init_chk_recipe_reuse_support(hw);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* Some cards require longer initialization times</div><div class='add'>+	 * due to necessity of loading FW from an external source.</div><div class='add'>+	 * This can take even half a minute.</div><div class='add'>+	 */</div><div class='add'>+	if (ice_is_pf_c827(hw)) {</div><div class='add'>+		status = ice_wait_for_fw(hw, 30000);</div><div class='add'>+		if (status) {</div><div class='add'>+			dev_err(ice_hw_to_dev(hw), "ice_wait_for_fw timed out");</div><div class='add'>+			goto err_unroll_fltr_mgmt_struct;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	hw-&gt;lane_num = ice_get_phy_lane_number(hw);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> err_unroll_fltr_mgmt_struct:</div><div class='ctx'> 	ice_cleanup_fltr_mgmt_struct(hw);</div><div class='ctx'> err_unroll_sched:</div><div class='hunk'>@@ -1183,6 +1193,16 @@ err_unroll_cqinit:</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __fwlog_deinit(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	/* only support fw log commands on PF 0 */</div><div class='add'>+	if (hw-&gt;bus.func)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ice_debugfs_pf_deinit(hw-&gt;back);</div><div class='add'>+	libie_fwlog_deinit(&amp;hw-&gt;fwlog);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_deinit_hw - unroll initialization operations done by ice_init_hw</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='hunk'>@@ -1201,8 +1221,7 @@ void ice_deinit_hw(struct ice_hw *hw)</div><div class='ctx'> 	ice_free_seg(hw);</div><div class='ctx'> 	ice_free_hw_tbls(hw);</div><div class='ctx'> 	mutex_destroy(&amp;hw-&gt;tnl_lock);</div><div class='del'>-</div><div class='del'>-	ice_fwlog_deinit(hw);</div><div class='add'>+	__fwlog_deinit(hw);</div><div class='ctx'> 	ice_destroy_all_ctrlq(hw);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear VSI contexts if not already cleared */</div><div class='hunk'>@@ -1357,39 +1376,51 @@ int ice_reset(struct ice_hw *hw, enum ice_reset_req req)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_copy_rxq_ctx_to_hw</div><div class='add'>+ * ice_copy_rxq_ctx_to_hw - Copy packed Rx queue context to HW registers</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='del'>- * @ice_rxq_ctx: pointer to the rxq context</div><div class='add'>+ * @rxq_ctx: pointer to the packed Rx queue context</div><div class='ctx'>  * @rxq_index: the index of the Rx queue</div><div class='del'>- *</div><div class='del'>- * Copies rxq context from dense structure to HW register space</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='del'>-ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)</div><div class='add'>+static void ice_copy_rxq_ctx_to_hw(struct ice_hw *hw,</div><div class='add'>+				   const ice_rxq_ctx_buf_t *rxq_ctx,</div><div class='add'>+				   u32 rxq_index)</div><div class='ctx'> {</div><div class='del'>-	u8 i;</div><div class='add'>+	/* Copy each dword separately to HW */</div><div class='add'>+	for (int i = 0; i &lt; ICE_RXQ_CTX_SIZE_DWORDS; i++) {</div><div class='add'>+		u32 ctx = ((const u32 *)rxq_ctx)[i];</div><div class='ctx'> </div><div class='del'>-	if (!ice_rxq_ctx)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		wr32(hw, QRX_CONTEXT(i, rxq_index), ctx);</div><div class='ctx'> </div><div class='del'>-	if (rxq_index &gt; QRX_CTRL_MAX_INDEX)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		ice_debug(hw, ICE_DBG_QCTX, "qrxdata[%d]: %08X\n", i, ctx);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Copy each dword separately to HW */</div><div class='del'>-	for (i = 0; i &lt; ICE_RXQ_CTX_SIZE_DWORDS; i++) {</div><div class='del'>-		wr32(hw, QRX_CONTEXT(i, rxq_index),</div><div class='del'>-		     *((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));</div><div class='add'>+/**</div><div class='add'>+ * ice_copy_rxq_ctx_from_hw - Copy packed Rx Queue context from HW registers</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @rxq_ctx: pointer to the packed Rx queue context</div><div class='add'>+ * @rxq_index: the index of the Rx queue</div><div class='add'>+ */</div><div class='add'>+static void ice_copy_rxq_ctx_from_hw(struct ice_hw *hw,</div><div class='add'>+				     ice_rxq_ctx_buf_t *rxq_ctx,</div><div class='add'>+				     u32 rxq_index)</div><div class='add'>+{</div><div class='add'>+	u32 *ctx = (u32 *)rxq_ctx;</div><div class='ctx'> </div><div class='del'>-		ice_debug(hw, ICE_DBG_QCTX, "qrxdata[%d]: %08X\n", i,</div><div class='del'>-			  *((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));</div><div class='del'>-	}</div><div class='add'>+	/* Copy each dword separately from HW */</div><div class='add'>+	for (int i = 0; i &lt; ICE_RXQ_CTX_SIZE_DWORDS; i++, ctx++) {</div><div class='add'>+		*ctx = rd32(hw, QRX_CONTEXT(i, rxq_index));</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+		ice_debug(hw, ICE_DBG_QCTX, "qrxdata[%d]: %08X\n", i, *ctx);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define ICE_CTX_STORE(struct_name, struct_field, width, lsb) \</div><div class='add'>+	PACKED_FIELD((lsb) + (width) - 1, (lsb), struct struct_name, struct_field)</div><div class='add'>+</div><div class='ctx'> /* LAN Rx Queue Context */</div><div class='del'>-static const struct ice_ctx_ele ice_rlan_ctx_info[] = {</div><div class='del'>-	/* Field		Width	LSB */</div><div class='add'>+static const struct packed_field_u8 ice_rlan_ctx_fields[] = {</div><div class='add'>+				 /* Field		Width	LSB */</div><div class='ctx'> 	ICE_CTX_STORE(ice_rlan_ctx, head,		13,	0),</div><div class='ctx'> 	ICE_CTX_STORE(ice_rlan_ctx, cpuid,		8,	13),</div><div class='ctx'> 	ICE_CTX_STORE(ice_rlan_ctx, base,		57,	32),</div><div class='hunk'>@@ -1410,35 +1441,90 @@ static const struct ice_ctx_ele ice_rlan_ctx_info[] = {</div><div class='ctx'> 	ICE_CTX_STORE(ice_rlan_ctx, tphhead_ena,	1,	196),</div><div class='ctx'> 	ICE_CTX_STORE(ice_rlan_ctx, lrxqthresh,		3,	198),</div><div class='ctx'> 	ICE_CTX_STORE(ice_rlan_ctx, prefena,		1,	201),</div><div class='del'>-	{ 0 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_write_rxq_ctx</div><div class='add'>+ * ice_pack_rxq_ctx - Pack Rx queue context into a HW buffer</div><div class='add'>+ * @ctx: the Rx queue context to pack</div><div class='add'>+ * @buf: the HW buffer to pack into</div><div class='add'>+ *</div><div class='add'>+ * Pack the Rx queue context from the CPU-friendly unpacked buffer into its</div><div class='add'>+ * bit-packed HW layout.</div><div class='add'>+ */</div><div class='add'>+static void ice_pack_rxq_ctx(const struct ice_rlan_ctx *ctx,</div><div class='add'>+			     ice_rxq_ctx_buf_t *buf)</div><div class='add'>+{</div><div class='add'>+	pack_fields(buf, sizeof(*buf), ctx, ice_rlan_ctx_fields,</div><div class='add'>+		    QUIRK_LITTLE_ENDIAN | QUIRK_LSW32_IS_FIRST);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_unpack_rxq_ctx - Unpack Rx queue context from a HW buffer</div><div class='add'>+ * @buf: the HW buffer to unpack from</div><div class='add'>+ * @ctx: the Rx queue context to unpack</div><div class='add'>+ *</div><div class='add'>+ * Unpack the Rx queue context from the HW buffer into the CPU-friendly</div><div class='add'>+ * structure.</div><div class='add'>+ */</div><div class='add'>+static void ice_unpack_rxq_ctx(const ice_rxq_ctx_buf_t *buf,</div><div class='add'>+			       struct ice_rlan_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	unpack_fields(buf, sizeof(*buf), ctx, ice_rlan_ctx_fields,</div><div class='add'>+		      QUIRK_LITTLE_ENDIAN | QUIRK_LSW32_IS_FIRST);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_write_rxq_ctx - Write Rx Queue context to hardware</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='del'>- * @rlan_ctx: pointer to the rxq context</div><div class='add'>+ * @rlan_ctx: pointer to the unpacked Rx queue context</div><div class='ctx'>  * @rxq_index: the index of the Rx queue</div><div class='ctx'>  *</div><div class='del'>- * Converts rxq context from sparse to dense structure and then writes</div><div class='del'>- * it to HW register space and enables the hardware to prefetch descriptors</div><div class='del'>- * instead of only fetching them on demand</div><div class='add'>+ * Pack the sparse Rx Queue context into dense hardware format and write it</div><div class='add'>+ * into the HW register space.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or -EINVAL if the Rx queue index is invalid.</div><div class='ctx'>  */</div><div class='ctx'> int ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,</div><div class='ctx'> 		      u32 rxq_index)</div><div class='ctx'> {</div><div class='del'>-	u8 ctx_buf[ICE_RXQ_CTX_SZ] = { 0 };</div><div class='add'>+	ice_rxq_ctx_buf_t buf = {};</div><div class='add'>+</div><div class='add'>+	if (rxq_index &gt; QRX_CTRL_MAX_INDEX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ice_pack_rxq_ctx(rlan_ctx, &amp;buf);</div><div class='add'>+	ice_copy_rxq_ctx_to_hw(hw, &amp;buf, rxq_index);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_read_rxq_ctx - Read Rx queue context from HW</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @rlan_ctx: pointer to the Rx queue context</div><div class='add'>+ * @rxq_index: the index of the Rx queue</div><div class='add'>+ *</div><div class='add'>+ * Read the Rx queue context from the hardware registers, and unpack it into</div><div class='add'>+ * the sparse Rx queue context structure.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, or -EINVAL if the Rx queue index is invalid.</div><div class='add'>+ */</div><div class='add'>+int ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,</div><div class='add'>+		     u32 rxq_index)</div><div class='add'>+{</div><div class='add'>+	ice_rxq_ctx_buf_t buf = {};</div><div class='ctx'> </div><div class='del'>-	if (!rlan_ctx)</div><div class='add'>+	if (rxq_index &gt; QRX_CTRL_MAX_INDEX)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	rlan_ctx-&gt;prefena = 1;</div><div class='add'>+	ice_copy_rxq_ctx_from_hw(hw, &amp;buf, rxq_index);</div><div class='add'>+	ice_unpack_rxq_ctx(&amp;buf, rlan_ctx);</div><div class='ctx'> </div><div class='del'>-	ice_set_ctx(hw, (u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info);</div><div class='del'>-	return ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* LAN Tx Queue Context */</div><div class='del'>-const struct ice_ctx_ele ice_tlan_ctx_info[] = {</div><div class='add'>+static const struct packed_field_u8 ice_tlan_ctx_fields[] = {</div><div class='ctx'> 				    /* Field			Width	LSB */</div><div class='ctx'> 	ICE_CTX_STORE(ice_tlan_ctx, base,			57,	0),</div><div class='ctx'> 	ICE_CTX_STORE(ice_tlan_ctx, port_num,			3,	57),</div><div class='hunk'>@@ -1467,10 +1553,227 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = {</div><div class='ctx'> 	ICE_CTX_STORE(ice_tlan_ctx, drop_ena,			1,	165),</div><div class='ctx'> 	ICE_CTX_STORE(ice_tlan_ctx, cache_prof_idx,		2,	166),</div><div class='ctx'> 	ICE_CTX_STORE(ice_tlan_ctx, pkt_shaper_prof_idx,	3,	168),</div><div class='del'>-	ICE_CTX_STORE(ice_tlan_ctx, int_q_state,		122,	171),</div><div class='del'>-	{ 0 }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ice_pack_txq_ctx - Pack Tx queue context into Admin Queue buffer</div><div class='add'>+ * @ctx: the Tx queue context to pack</div><div class='add'>+ * @buf: the Admin Queue HW buffer to pack into</div><div class='add'>+ *</div><div class='add'>+ * Pack the Tx queue context from the CPU-friendly unpacked buffer into its</div><div class='add'>+ * bit-packed Admin Queue layout.</div><div class='add'>+ */</div><div class='add'>+void ice_pack_txq_ctx(const struct ice_tlan_ctx *ctx, ice_txq_ctx_buf_t *buf)</div><div class='add'>+{</div><div class='add'>+	pack_fields(buf, sizeof(*buf), ctx, ice_tlan_ctx_fields,</div><div class='add'>+		    QUIRK_LITTLE_ENDIAN | QUIRK_LSW32_IS_FIRST);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_pack_txq_ctx_full - Pack Tx queue context into a HW buffer</div><div class='add'>+ * @ctx: the Tx queue context to pack</div><div class='add'>+ * @buf: the HW buffer to pack into</div><div class='add'>+ *</div><div class='add'>+ * Pack the Tx queue context from the CPU-friendly unpacked buffer into its</div><div class='add'>+ * bit-packed HW layout, including the internal data portion.</div><div class='add'>+ */</div><div class='add'>+static void ice_pack_txq_ctx_full(const struct ice_tlan_ctx *ctx,</div><div class='add'>+				  ice_txq_ctx_buf_full_t *buf)</div><div class='add'>+{</div><div class='add'>+	pack_fields(buf, sizeof(*buf), ctx, ice_tlan_ctx_fields,</div><div class='add'>+		    QUIRK_LITTLE_ENDIAN | QUIRK_LSW32_IS_FIRST);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_unpack_txq_ctx_full - Unpack Tx queue context from a HW buffer</div><div class='add'>+ * @buf: the HW buffer to unpack from</div><div class='add'>+ * @ctx: the Tx queue context to unpack</div><div class='add'>+ *</div><div class='add'>+ * Unpack the Tx queue context from the HW buffer (including the full internal</div><div class='add'>+ * state) into the CPU-friendly structure.</div><div class='add'>+ */</div><div class='add'>+static void ice_unpack_txq_ctx_full(const ice_txq_ctx_buf_full_t *buf,</div><div class='add'>+				    struct ice_tlan_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	unpack_fields(buf, sizeof(*buf), ctx, ice_tlan_ctx_fields,</div><div class='add'>+		      QUIRK_LITTLE_ENDIAN | QUIRK_LSW32_IS_FIRST);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_copy_txq_ctx_from_hw - Copy Tx Queue context from HW registers</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @txq_ctx: pointer to the packed Tx queue context, including internal state</div><div class='add'>+ * @txq_index: the index of the Tx queue</div><div class='add'>+ *</div><div class='add'>+ * Copy Tx Queue context from HW register space to dense structure</div><div class='add'>+ */</div><div class='add'>+static void ice_copy_txq_ctx_from_hw(struct ice_hw *hw,</div><div class='add'>+				     ice_txq_ctx_buf_full_t *txq_ctx,</div><div class='add'>+				     u32 txq_index)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = container_of(hw, struct ice_pf, hw);</div><div class='add'>+	u32 *ctx = (u32 *)txq_ctx;</div><div class='add'>+	u32 txq_base, reg;</div><div class='add'>+</div><div class='add'>+	/* Get Tx queue base within card space */</div><div class='add'>+	txq_base = rd32(hw, PFLAN_TX_QALLOC(hw-&gt;pf_id));</div><div class='add'>+	txq_base = FIELD_GET(PFLAN_TX_QALLOC_FIRSTQ_M, txq_base);</div><div class='add'>+</div><div class='add'>+	reg = FIELD_PREP(GLCOMM_QTX_CNTX_CTL_CMD_M,</div><div class='add'>+			 GLCOMM_QTX_CNTX_CTL_CMD_READ) |</div><div class='add'>+	      FIELD_PREP(GLCOMM_QTX_CNTX_CTL_QUEUE_ID_M,</div><div class='add'>+			 txq_base + txq_index) |</div><div class='add'>+	      GLCOMM_QTX_CNTX_CTL_CMD_EXEC_M;</div><div class='add'>+</div><div class='add'>+	/* Prevent other PFs on the same adapter from accessing the Tx queue</div><div class='add'>+	 * context interface concurrently.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock(&amp;pf-&gt;adapter-&gt;txq_ctx_lock);</div><div class='add'>+</div><div class='add'>+	wr32(hw, GLCOMM_QTX_CNTX_CTL, reg);</div><div class='add'>+	ice_flush(hw);</div><div class='add'>+</div><div class='add'>+	/* Copy each dword separately from HW */</div><div class='add'>+	for (int i = 0; i &lt; ICE_TXQ_CTX_FULL_SIZE_DWORDS; i++, ctx++) {</div><div class='add'>+		*ctx = rd32(hw, GLCOMM_QTX_CNTX_DATA(i));</div><div class='add'>+</div><div class='add'>+		ice_debug(hw, ICE_DBG_QCTX, "qtxdata[%d]: %08X\n", i, *ctx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;pf-&gt;adapter-&gt;txq_ctx_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_copy_txq_ctx_to_hw - Copy Tx Queue context into HW registers</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @txq_ctx: pointer to the packed Tx queue context, including internal state</div><div class='add'>+ * @txq_index: the index of the Tx queue</div><div class='add'>+ */</div><div class='add'>+static void ice_copy_txq_ctx_to_hw(struct ice_hw *hw,</div><div class='add'>+				   const ice_txq_ctx_buf_full_t *txq_ctx,</div><div class='add'>+				   u32 txq_index)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = container_of(hw, struct ice_pf, hw);</div><div class='add'>+	u32 txq_base, reg;</div><div class='add'>+</div><div class='add'>+	/* Get Tx queue base within card space */</div><div class='add'>+	txq_base = rd32(hw, PFLAN_TX_QALLOC(hw-&gt;pf_id));</div><div class='add'>+	txq_base = FIELD_GET(PFLAN_TX_QALLOC_FIRSTQ_M, txq_base);</div><div class='add'>+</div><div class='add'>+	reg = FIELD_PREP(GLCOMM_QTX_CNTX_CTL_CMD_M,</div><div class='add'>+			 GLCOMM_QTX_CNTX_CTL_CMD_WRITE_NO_DYN) |</div><div class='add'>+	      FIELD_PREP(GLCOMM_QTX_CNTX_CTL_QUEUE_ID_M,</div><div class='add'>+			 txq_base + txq_index) |</div><div class='add'>+	      GLCOMM_QTX_CNTX_CTL_CMD_EXEC_M;</div><div class='add'>+</div><div class='add'>+	/* Prevent other PFs on the same adapter from accessing the Tx queue</div><div class='add'>+	 * context interface concurrently.</div><div class='add'>+	 */</div><div class='add'>+	spin_lock(&amp;pf-&gt;adapter-&gt;txq_ctx_lock);</div><div class='add'>+</div><div class='add'>+	/* Copy each dword separately to HW */</div><div class='add'>+	for (int i = 0; i &lt; ICE_TXQ_CTX_FULL_SIZE_DWORDS; i++) {</div><div class='add'>+		u32 ctx = ((const u32 *)txq_ctx)[i];</div><div class='add'>+</div><div class='add'>+		wr32(hw, GLCOMM_QTX_CNTX_DATA(i), ctx);</div><div class='add'>+</div><div class='add'>+		ice_debug(hw, ICE_DBG_QCTX, "qtxdata[%d]: %08X\n", i, ctx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wr32(hw, GLCOMM_QTX_CNTX_CTL, reg);</div><div class='add'>+	ice_flush(hw);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;pf-&gt;adapter-&gt;txq_ctx_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_read_txq_ctx - Read Tx queue context from HW</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @tlan_ctx: pointer to the Tx queue context</div><div class='add'>+ * @txq_index: the index of the Tx queue</div><div class='add'>+ *</div><div class='add'>+ * Read the Tx queue context from the HW registers, then unpack it into the</div><div class='add'>+ * ice_tlan_ctx structure for use.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, or -EINVAL on an invalid Tx queue index.</div><div class='add'>+ */</div><div class='add'>+int ice_read_txq_ctx(struct ice_hw *hw, struct ice_tlan_ctx *tlan_ctx,</div><div class='add'>+		     u32 txq_index)</div><div class='add'>+{</div><div class='add'>+	ice_txq_ctx_buf_full_t buf = {};</div><div class='add'>+</div><div class='add'>+	if (txq_index &gt; QTX_COMM_HEAD_MAX_INDEX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ice_copy_txq_ctx_from_hw(hw, &amp;buf, txq_index);</div><div class='add'>+	ice_unpack_txq_ctx_full(&amp;buf, tlan_ctx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_write_txq_ctx - Write Tx queue context to HW</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @tlan_ctx: pointer to the Tx queue context</div><div class='add'>+ * @txq_index: the index of the Tx queue</div><div class='add'>+ *</div><div class='add'>+ * Pack the Tx queue context into the dense HW layout, then write it into the</div><div class='add'>+ * HW registers.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, or -EINVAL on an invalid Tx queue index.</div><div class='add'>+ */</div><div class='add'>+int ice_write_txq_ctx(struct ice_hw *hw, struct ice_tlan_ctx *tlan_ctx,</div><div class='add'>+		      u32 txq_index)</div><div class='add'>+{</div><div class='add'>+	ice_txq_ctx_buf_full_t buf = {};</div><div class='add'>+</div><div class='add'>+	if (txq_index &gt; QTX_COMM_HEAD_MAX_INDEX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ice_pack_txq_ctx_full(tlan_ctx, &amp;buf);</div><div class='add'>+	ice_copy_txq_ctx_to_hw(hw, &amp;buf, txq_index);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Tx time Queue Context */</div><div class='add'>+static const struct packed_field_u8 ice_txtime_ctx_fields[] = {</div><div class='add'>+				    /* Field			Width	LSB */</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, base,			57,	0),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, pf_num,			3,	57),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, vmvf_num,			10,	60),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, vmvf_type,		2,	70),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, src_vsi,			10,	72),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, cpuid,			8,	82),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, tphrd_desc,		1,	90),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, qlen,			13,	91),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, timer_num,		1,	104),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, txtime_ena_q,		1,	105),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, drbell_mode_32,		1,	106),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, ts_res,			4,	107),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, ts_round_type,		2,	111),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, ts_pacing_slot,		3,	113),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, merging_ena,		1,	116),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, ts_fetch_prof_id,		4,	117),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, ts_fetch_cache_line_aln_thld, 4,	121),</div><div class='add'>+	ICE_CTX_STORE(ice_txtime_ctx, tx_pipe_delay_mode,	1,	125),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_pack_txtime_ctx - pack Tx time queue context into a HW buffer</div><div class='add'>+ * @ctx: the Tx time queue context to pack</div><div class='add'>+ * @buf: the HW buffer to pack into</div><div class='add'>+ *</div><div class='add'>+ * Pack the Tx time queue context from the CPU-friendly unpacked buffer into</div><div class='add'>+ * its bit-packed HW layout.</div><div class='add'>+ */</div><div class='add'>+void ice_pack_txtime_ctx(const struct ice_txtime_ctx *ctx,</div><div class='add'>+			 ice_txtime_ctx_buf_t *buf)</div><div class='add'>+{</div><div class='add'>+	pack_fields(buf, sizeof(*buf), ctx, ice_txtime_ctx_fields,</div><div class='add'>+		    QUIRK_LITTLE_ENDIAN | QUIRK_LSW32_IS_FIRST);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Sideband Queue command wrappers */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1486,7 +1789,7 @@ ice_sbq_send_cmd(struct ice_hw *hw, struct ice_sbq_cmd_desc *desc,</div><div class='ctx'> 		 void *buf, u16 buf_size, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	return ice_sq_send_cmd(hw, ice_get_sbq(hw),</div><div class='del'>-			       (struct ice_aq_desc *)desc, buf, buf_size, cd);</div><div class='add'>+			       (struct libie_aq_desc *)desc, buf, buf_size, cd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1571,10 +1874,10 @@ static bool ice_should_retry_sq_send_cmd(u16 opcode)</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='ctx'> ice_sq_send_cmd_retry(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='del'>-		      struct ice_aq_desc *desc, void *buf, u16 buf_size,</div><div class='add'>+		      struct libie_aq_desc *desc, void *buf, u16 buf_size,</div><div class='ctx'> 		      struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc_cpy;</div><div class='add'>+	struct libie_aq_desc desc_cpy;</div><div class='ctx'> 	bool is_cmd_for_retry;</div><div class='ctx'> 	u8 idx = 0;</div><div class='ctx'> 	u16 opcode;</div><div class='hunk'>@@ -1595,7 +1898,7 @@ ice_sq_send_cmd_retry(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='ctx'> 		status = ice_sq_send_cmd(hw, cq, desc, buf, buf_size, cd);</div><div class='ctx'> </div><div class='ctx'> 		if (!is_cmd_for_retry || !status ||</div><div class='del'>-		    hw-&gt;adminq.sq_last_status != ICE_AQ_RC_EBUSY)</div><div class='add'>+		    hw-&gt;adminq.sq_last_status != LIBIE_AQ_RC_EBUSY)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		memcpy(desc, &amp;desc_cpy, sizeof(desc_cpy));</div><div class='hunk'>@@ -1618,10 +1921,10 @@ ice_sq_send_cmd_retry(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='ctx'>  * Helper function to send FW Admin Queue commands to the FW Admin Queue.</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='del'>-ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,</div><div class='add'>+ice_aq_send_cmd(struct ice_hw *hw, struct libie_aq_desc *desc, void *buf,</div><div class='ctx'> 		u16 buf_size, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aqc_req_res *cmd = &amp;desc-&gt;params.res_owner;</div><div class='add'>+	struct libie_aqc_req_res *cmd = libie_aq_raw(desc);</div><div class='ctx'> 	bool lock_acquired = false;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='hunk'>@@ -1652,7 +1955,7 @@ ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,</div><div class='ctx'> 	case ice_aqc_opc_get_recipe_to_profile:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ice_aqc_opc_release_res:</div><div class='del'>-		if (le16_to_cpu(cmd-&gt;res_id) == ICE_AQC_RES_ID_GLBL_LOCK)</div><div class='add'>+		if (le16_to_cpu(cmd-&gt;res_id) == LIBIE_AQC_RES_ID_GLBL_LOCK)</div><div class='ctx'> 			break;</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1677,8 +1980,8 @@ ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,</div><div class='ctx'>  */</div><div class='ctx'> int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aqc_get_ver *resp;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aqc_get_ver *resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	resp = &amp;desc.params.get_ver;</div><div class='hunk'>@@ -1714,8 +2017,8 @@ int</div><div class='ctx'> ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,</div><div class='ctx'> 		       struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aqc_driver_ver *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aqc_driver_ver *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 len;</div><div class='ctx'> </div><div class='ctx'> 	cmd = &amp;desc.params.driver_ver;</div><div class='hunk'>@@ -1725,7 +2028,7 @@ ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_driver_ver);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	cmd-&gt;major_ver = dv-&gt;major_ver;</div><div class='ctx'> 	cmd-&gt;minor_ver = dv-&gt;minor_ver;</div><div class='ctx'> 	cmd-&gt;build_ver = dv-&gt;build_ver;</div><div class='hunk'>@@ -1750,9 +2053,9 @@ ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,</div><div class='ctx'> int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_q_shutdown *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.q_shutdown;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_q_shutdown);</div><div class='ctx'> </div><div class='hunk'>@@ -1793,8 +2096,8 @@ ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,</div><div class='ctx'> 	       enum ice_aq_res_access_type access, u8 sdp_number, u32 *timeout,</div><div class='ctx'> 	       struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aqc_req_res *cmd_resp;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aqc_req_res *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	cmd_resp = &amp;desc.params.res_owner;</div><div class='hunk'>@@ -1816,20 +2119,20 @@ ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,</div><div class='ctx'> 	/* Global config lock response utilizes an additional status field.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * If the Global config lock resource is held by some other driver, the</div><div class='del'>-	 * command completes with ICE_AQ_RES_GLBL_IN_PROG in the status field</div><div class='add'>+	 * command completes with LIBIE_AQ_RES_GLBL_IN_PROG in the status field</div><div class='ctx'> 	 * and the timeout field indicates the maximum time the current owner</div><div class='ctx'> 	 * of the resource has to free it.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (res == ICE_GLOBAL_CFG_LOCK_RES_ID) {</div><div class='del'>-		if (le16_to_cpu(cmd_resp-&gt;status) == ICE_AQ_RES_GLBL_SUCCESS) {</div><div class='add'>+		if (le16_to_cpu(cmd_resp-&gt;status) == LIBIE_AQ_RES_GLBL_SUCCESS) {</div><div class='ctx'> 			*timeout = le32_to_cpu(cmd_resp-&gt;timeout);</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		} else if (le16_to_cpu(cmd_resp-&gt;status) ==</div><div class='del'>-			   ICE_AQ_RES_GLBL_IN_PROG) {</div><div class='add'>+			   LIBIE_AQ_RES_GLBL_IN_PROG) {</div><div class='ctx'> 			*timeout = le32_to_cpu(cmd_resp-&gt;timeout);</div><div class='ctx'> 			return -EIO;</div><div class='ctx'> 		} else if (le16_to_cpu(cmd_resp-&gt;status) ==</div><div class='del'>-			   ICE_AQ_RES_GLBL_DONE) {</div><div class='add'>+			   LIBIE_AQ_RES_GLBL_DONE) {</div><div class='ctx'> 			return -EALREADY;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1842,7 +2145,7 @@ ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,</div><div class='ctx'> 	 * with a busy return value and the timeout field indicates the maximum</div><div class='ctx'> 	 * time the current owner of the resource has to free it.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!status || hw-&gt;adminq.sq_last_status == ICE_AQ_RC_EBUSY)</div><div class='add'>+	if (!status || hw-&gt;adminq.sq_last_status == LIBIE_AQ_RC_EBUSY)</div><div class='ctx'> 		*timeout = le32_to_cpu(cmd_resp-&gt;timeout);</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='hunk'>@@ -1861,8 +2164,8 @@ static int</div><div class='ctx'> ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number,</div><div class='ctx'> 		   struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aqc_req_res *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aqc_req_res *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	cmd = &amp;desc.params.res_owner;</div><div class='ctx'> </div><div class='hunk'>@@ -1971,16 +2274,16 @@ int ice_aq_alloc_free_res(struct ice_hw *hw,</div><div class='ctx'> 			  enum ice_adminq_opc opc)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_alloc_free_res_cmd *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.sw_res_ctrl;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	if (!buf || buf_size &lt; flex_array_size(buf, elem, 1))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, opc);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;num_entries = cpu_to_le16(1);</div><div class='ctx'> </div><div class='hunk'>@@ -2094,7 +2397,7 @@ static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max)</div><div class='ctx'>  */</div><div class='ctx'> static bool</div><div class='ctx'> ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,</div><div class='del'>-		      struct ice_aqc_list_caps_elem *elem, const char *prefix)</div><div class='add'>+		      struct libie_aqc_list_caps_elem *elem, const char *prefix)</div><div class='ctx'> {</div><div class='ctx'> 	u32 logical_id = le32_to_cpu(elem-&gt;logical_id);</div><div class='ctx'> 	u32 phys_id = le32_to_cpu(elem-&gt;phys_id);</div><div class='hunk'>@@ -2103,17 +2406,17 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,</div><div class='ctx'> 	bool found = true;</div><div class='ctx'> </div><div class='ctx'> 	switch (cap) {</div><div class='del'>-	case ICE_AQC_CAPS_VALID_FUNCTIONS:</div><div class='add'>+	case LIBIE_AQC_CAPS_VALID_FUNCTIONS:</div><div class='ctx'> 		caps-&gt;valid_functions = number;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = %d\n", prefix,</div><div class='ctx'> 			  caps-&gt;valid_functions);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_SRIOV:</div><div class='add'>+	case LIBIE_AQC_CAPS_SRIOV:</div><div class='ctx'> 		caps-&gt;sr_iov_1_1 = (number == 1);</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: sr_iov_1_1 = %d\n", prefix,</div><div class='ctx'> 			  caps-&gt;sr_iov_1_1);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_DCB:</div><div class='add'>+	case LIBIE_AQC_CAPS_DCB:</div><div class='ctx'> 		caps-&gt;dcb = (number == 1);</div><div class='ctx'> 		caps-&gt;active_tc_bitmap = logical_id;</div><div class='ctx'> 		caps-&gt;maxtc = phys_id;</div><div class='hunk'>@@ -2122,7 +2425,7 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,</div><div class='ctx'> 			  caps-&gt;active_tc_bitmap);</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps-&gt;maxtc);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_RSS:</div><div class='add'>+	case LIBIE_AQC_CAPS_RSS:</div><div class='ctx'> 		caps-&gt;rss_table_size = number;</div><div class='ctx'> 		caps-&gt;rss_table_entry_width = logical_id;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %d\n", prefix,</div><div class='hunk'>@@ -2130,7 +2433,7 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %d\n", prefix,</div><div class='ctx'> 			  caps-&gt;rss_table_entry_width);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_RXQS:</div><div class='add'>+	case LIBIE_AQC_CAPS_RXQS:</div><div class='ctx'> 		caps-&gt;num_rxq = number;</div><div class='ctx'> 		caps-&gt;rxq_first_id = phys_id;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %d\n", prefix,</div><div class='hunk'>@@ -2138,7 +2441,7 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %d\n", prefix,</div><div class='ctx'> 			  caps-&gt;rxq_first_id);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_TXQS:</div><div class='add'>+	case LIBIE_AQC_CAPS_TXQS:</div><div class='ctx'> 		caps-&gt;num_txq = number;</div><div class='ctx'> 		caps-&gt;txq_first_id = phys_id;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %d\n", prefix,</div><div class='hunk'>@@ -2146,7 +2449,7 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %d\n", prefix,</div><div class='ctx'> 			  caps-&gt;txq_first_id);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_MSIX:</div><div class='add'>+	case LIBIE_AQC_CAPS_MSIX:</div><div class='ctx'> 		caps-&gt;num_msix_vectors = number;</div><div class='ctx'> 		caps-&gt;msix_vector_first_id = phys_id;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %d\n", prefix,</div><div class='hunk'>@@ -2154,55 +2457,59 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %d\n", prefix,</div><div class='ctx'> 			  caps-&gt;msix_vector_first_id);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_PENDING_NVM_VER:</div><div class='add'>+	case LIBIE_AQC_CAPS_PENDING_NVM_VER:</div><div class='ctx'> 		caps-&gt;nvm_update_pending_nvm = true;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: update_pending_nvm\n", prefix);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_PENDING_OROM_VER:</div><div class='add'>+	case LIBIE_AQC_CAPS_PENDING_OROM_VER:</div><div class='ctx'> 		caps-&gt;nvm_update_pending_orom = true;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: update_pending_orom\n", prefix);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_PENDING_NET_VER:</div><div class='add'>+	case LIBIE_AQC_CAPS_PENDING_NET_VER:</div><div class='ctx'> 		caps-&gt;nvm_update_pending_netlist = true;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: update_pending_netlist\n", prefix);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_NVM_MGMT:</div><div class='add'>+	case LIBIE_AQC_CAPS_NVM_MGMT:</div><div class='ctx'> 		caps-&gt;nvm_unified_update =</div><div class='ctx'> 			(number &amp; ICE_NVM_MGMT_UNIFIED_UPD_SUPPORT) ?</div><div class='ctx'> 			true : false;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: nvm_unified_update = %d\n", prefix,</div><div class='ctx'> 			  caps-&gt;nvm_unified_update);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_RDMA:</div><div class='del'>-		caps-&gt;rdma = (number == 1);</div><div class='add'>+	case LIBIE_AQC_CAPS_RDMA:</div><div class='add'>+		if (IS_ENABLED(CONFIG_INFINIBAND_IRDMA))</div><div class='add'>+			caps-&gt;rdma = (number == 1);</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: rdma = %d\n", prefix, caps-&gt;rdma);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_MAX_MTU:</div><div class='add'>+	case LIBIE_AQC_CAPS_MAX_MTU:</div><div class='ctx'> 		caps-&gt;max_mtu = number;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %d\n",</div><div class='ctx'> 			  prefix, caps-&gt;max_mtu);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_PCIE_RESET_AVOIDANCE:</div><div class='add'>+	case LIBIE_AQC_CAPS_PCIE_RESET_AVOIDANCE:</div><div class='ctx'> 		caps-&gt;pcie_reset_avoidance = (number &gt; 0);</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT,</div><div class='ctx'> 			  "%s: pcie_reset_avoidance = %d\n", prefix,</div><div class='ctx'> 			  caps-&gt;pcie_reset_avoidance);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_POST_UPDATE_RESET_RESTRICT:</div><div class='add'>+	case LIBIE_AQC_CAPS_POST_UPDATE_RESET_RESTRICT:</div><div class='ctx'> 		caps-&gt;reset_restrict_support = (number == 1);</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT,</div><div class='ctx'> 			  "%s: reset_restrict_support = %d\n", prefix,</div><div class='ctx'> 			  caps-&gt;reset_restrict_support);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_FW_LAG_SUPPORT:</div><div class='del'>-		caps-&gt;roce_lag = !!(number &amp; ICE_AQC_BIT_ROCEV2_LAG);</div><div class='add'>+	case LIBIE_AQC_CAPS_FW_LAG_SUPPORT:</div><div class='add'>+		caps-&gt;roce_lag = number &amp; LIBIE_AQC_BIT_ROCEV2_LAG;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: roce_lag = %u\n",</div><div class='ctx'> 			  prefix, caps-&gt;roce_lag);</div><div class='del'>-		caps-&gt;sriov_lag = !!(number &amp; ICE_AQC_BIT_SRIOV_LAG);</div><div class='add'>+		caps-&gt;sriov_lag = number &amp; LIBIE_AQC_BIT_SRIOV_LAG;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "%s: sriov_lag = %u\n",</div><div class='ctx'> 			  prefix, caps-&gt;sriov_lag);</div><div class='add'>+		caps-&gt;sriov_aa_lag = number &amp; LIBIE_AQC_BIT_SRIOV_AA_LAG;</div><div class='add'>+		ice_debug(hw, ICE_DBG_INIT, "%s: sriov_aa_lag = %u\n",</div><div class='add'>+			  prefix, caps-&gt;sriov_aa_lag);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE:</div><div class='add'>+	case LIBIE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE:</div><div class='ctx'> 		caps-&gt;tx_sched_topo_comp_mode_en = (number == 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -2256,7 +2563,7 @@ ice_recalc_port_limited_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps)</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> ice_parse_vf_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,</div><div class='del'>-		       struct ice_aqc_list_caps_elem *cap)</div><div class='add'>+		       struct libie_aqc_list_caps_elem *cap)</div><div class='ctx'> {</div><div class='ctx'> 	u32 logical_id = le32_to_cpu(cap-&gt;logical_id);</div><div class='ctx'> 	u32 number = le32_to_cpu(cap-&gt;number);</div><div class='hunk'>@@ -2279,7 +2586,7 @@ ice_parse_vf_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> ice_parse_vsi_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,</div><div class='del'>-			struct ice_aqc_list_caps_elem *cap)</div><div class='add'>+			struct libie_aqc_list_caps_elem *cap)</div><div class='ctx'> {</div><div class='ctx'> 	func_p-&gt;guar_num_vsi = ice_get_num_per_func(hw, ICE_MAX_VSI);</div><div class='ctx'> 	ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi (fw) = %d\n",</div><div class='hunk'>@@ -2298,7 +2605,7 @@ ice_parse_vsi_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,</div><div class='del'>-			 struct ice_aqc_list_caps_elem *cap)</div><div class='add'>+			 struct libie_aqc_list_caps_elem *cap)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_ts_func_info *info = &amp;func_p-&gt;ts_func_info;</div><div class='ctx'> 	u32 number = le32_to_cpu(cap-&gt;number);</div><div class='hunk'>@@ -2311,16 +2618,16 @@ ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,</div><div class='ctx'> 	info-&gt;tmr_index_owned = ((number &amp; ICE_TS_TMR_IDX_OWND_M) != 0);</div><div class='ctx'> 	info-&gt;tmr_index_assoc = ((number &amp; ICE_TS_TMR_IDX_ASSOC_M) != 0);</div><div class='ctx'> </div><div class='del'>-	if (!ice_is_e825c(hw)) {</div><div class='add'>+	if (hw-&gt;mac_type != ICE_MAC_GENERIC_3K_E825) {</div><div class='ctx'> 		info-&gt;clk_freq = FIELD_GET(ICE_TS_CLK_FREQ_M, number);</div><div class='ctx'> 		info-&gt;clk_src = ((number &amp; ICE_TS_CLK_SRC_M) != 0);</div><div class='ctx'> 	} else {</div><div class='del'>-		info-&gt;clk_freq = ICE_TIME_REF_FREQ_156_250;</div><div class='del'>-		info-&gt;clk_src = ICE_CLK_SRC_TCXO;</div><div class='add'>+		info-&gt;clk_freq = ICE_TSPLL_FREQ_156_250;</div><div class='add'>+		info-&gt;clk_src = ICE_CLK_SRC_TIME_REF;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (info-&gt;clk_freq &lt; NUM_ICE_TIME_REF_FREQ) {</div><div class='del'>-		info-&gt;time_ref = (enum ice_time_ref_freq)info-&gt;clk_freq;</div><div class='add'>+	if (info-&gt;clk_freq &lt; NUM_ICE_TSPLL_FREQ) {</div><div class='add'>+		info-&gt;time_ref = (enum ice_tspll_freq)info-&gt;clk_freq;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Unknown clock frequency, so assume a (probably incorrect)</div><div class='ctx'> 		 * default to avoid out-of-bounds look ups of frequency</div><div class='hunk'>@@ -2328,7 +2635,7 @@ ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,</div><div class='ctx'> 		 */</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "1588 func caps: unknown clock frequency %u\n",</div><div class='ctx'> 			  info-&gt;clk_freq);</div><div class='del'>-		info-&gt;time_ref = ICE_TIME_REF_FREQ_25_000;</div><div class='add'>+		info-&gt;time_ref = ICE_TSPLL_FREQ_25_000;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ice_debug(hw, ICE_DBG_INIT, "func caps: ieee_1588 = %u\n",</div><div class='hunk'>@@ -2397,7 +2704,7 @@ static void</div><div class='ctx'> ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,</div><div class='ctx'> 		    void *buf, u32 cap_count)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aqc_list_caps_elem *cap_resp;</div><div class='add'>+	struct libie_aqc_list_caps_elem *cap_resp;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	cap_resp = buf;</div><div class='hunk'>@@ -2412,16 +2719,16 @@ ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,</div><div class='ctx'> 					      &amp;cap_resp[i], "func caps");</div><div class='ctx'> </div><div class='ctx'> 		switch (cap) {</div><div class='del'>-		case ICE_AQC_CAPS_VF:</div><div class='add'>+		case LIBIE_AQC_CAPS_VF:</div><div class='ctx'> 			ice_parse_vf_func_caps(hw, func_p, &amp;cap_resp[i]);</div><div class='ctx'> 			break;</div><div class='del'>-		case ICE_AQC_CAPS_VSI:</div><div class='add'>+		case LIBIE_AQC_CAPS_VSI:</div><div class='ctx'> 			ice_parse_vsi_func_caps(hw, func_p, &amp;cap_resp[i]);</div><div class='ctx'> 			break;</div><div class='del'>-		case ICE_AQC_CAPS_1588:</div><div class='add'>+		case LIBIE_AQC_CAPS_1588:</div><div class='ctx'> 			ice_parse_1588_func_caps(hw, func_p, &amp;cap_resp[i]);</div><div class='ctx'> 			break;</div><div class='del'>-		case ICE_AQC_CAPS_FD:</div><div class='add'>+		case LIBIE_AQC_CAPS_FD:</div><div class='ctx'> 			ice_parse_fdir_func_caps(hw, func_p);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -2465,7 +2772,7 @@ static int ice_func_id_to_logical_id(u32 active_function_bitmap, u8 pf_id)</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> ice_parse_valid_functions_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='del'>-			      struct ice_aqc_list_caps_elem *cap)</div><div class='add'>+			      struct libie_aqc_list_caps_elem *cap)</div><div class='ctx'> {</div><div class='ctx'> 	u32 number = le32_to_cpu(cap-&gt;number);</div><div class='ctx'> </div><div class='hunk'>@@ -2486,7 +2793,7 @@ ice_parse_valid_functions_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> ice_parse_vf_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='del'>-		      struct ice_aqc_list_caps_elem *cap)</div><div class='add'>+		      struct libie_aqc_list_caps_elem *cap)</div><div class='ctx'> {</div><div class='ctx'> 	u32 number = le32_to_cpu(cap-&gt;number);</div><div class='ctx'> </div><div class='hunk'>@@ -2505,7 +2812,7 @@ ice_parse_vf_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> ice_parse_vsi_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='del'>-		       struct ice_aqc_list_caps_elem *cap)</div><div class='add'>+		       struct libie_aqc_list_caps_elem *cap)</div><div class='ctx'> {</div><div class='ctx'> 	u32 number = le32_to_cpu(cap-&gt;number);</div><div class='ctx'> </div><div class='hunk'>@@ -2524,7 +2831,7 @@ ice_parse_vsi_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='del'>-			struct ice_aqc_list_caps_elem *cap)</div><div class='add'>+			struct libie_aqc_list_caps_elem *cap)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_ts_dev_info *info = &amp;dev_p-&gt;ts_dev_info;</div><div class='ctx'> 	u32 logical_id = le32_to_cpu(cap-&gt;logical_id);</div><div class='hunk'>@@ -2544,6 +2851,7 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;ts_ll_read = ((number &amp; ICE_TS_LL_TX_TS_READ_M) != 0);</div><div class='ctx'> 	info-&gt;ts_ll_int_read = ((number &amp; ICE_TS_LL_TX_TS_INT_READ_M) != 0);</div><div class='add'>+	info-&gt;ll_phy_tmr_update = ((number &amp; ICE_TS_LL_PHY_TMR_UPDATE_M) != 0);</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;ena_ports = logical_id;</div><div class='ctx'> 	info-&gt;tmr_own_map = phys_id;</div><div class='hunk'>@@ -2566,6 +2874,8 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'> 		  info-&gt;ts_ll_read);</div><div class='ctx'> 	ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_int_read = %u\n",</div><div class='ctx'> 		  info-&gt;ts_ll_int_read);</div><div class='add'>+	ice_debug(hw, ICE_DBG_INIT, "dev caps: ll_phy_tmr_update = %u\n",</div><div class='add'>+		  info-&gt;ll_phy_tmr_update);</div><div class='ctx'> 	ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 ena_ports = %u\n",</div><div class='ctx'> 		  info-&gt;ena_ports);</div><div class='ctx'> 	ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr_own_map = %u\n",</div><div class='hunk'>@@ -2582,7 +2892,7 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> ice_parse_fdir_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='del'>-			struct ice_aqc_list_caps_elem *cap)</div><div class='add'>+			struct libie_aqc_list_caps_elem *cap)</div><div class='ctx'> {</div><div class='ctx'> 	u32 number = le32_to_cpu(cap-&gt;number);</div><div class='ctx'> </div><div class='hunk'>@@ -2602,7 +2912,7 @@ ice_parse_fdir_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> ice_parse_sensor_reading_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='del'>-			     struct ice_aqc_list_caps_elem *cap)</div><div class='add'>+			     struct libie_aqc_list_caps_elem *cap)</div><div class='ctx'> {</div><div class='ctx'> 	dev_p-&gt;supported_sensors = le32_to_cpu(cap-&gt;number);</div><div class='ctx'> </div><div class='hunk'>@@ -2621,7 +2931,7 @@ ice_parse_sensor_reading_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'>  */</div><div class='ctx'> static void ice_parse_nac_topo_dev_caps(struct ice_hw *hw,</div><div class='ctx'> 					struct ice_hw_dev_caps *dev_p,</div><div class='del'>-					struct ice_aqc_list_caps_elem *cap)</div><div class='add'>+					struct libie_aqc_list_caps_elem *cap)</div><div class='ctx'> {</div><div class='ctx'> 	dev_p-&gt;nac_topo.mode = le32_to_cpu(cap-&gt;number);</div><div class='ctx'> 	dev_p-&gt;nac_topo.id = le32_to_cpu(cap-&gt;phys_id) &amp; ICE_NAC_TOPO_ID_M;</div><div class='hunk'>@@ -2657,7 +2967,7 @@ static void</div><div class='ctx'> ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'> 		   void *buf, u32 cap_count)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aqc_list_caps_elem *cap_resp;</div><div class='add'>+	struct libie_aqc_list_caps_elem *cap_resp;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	cap_resp = buf;</div><div class='hunk'>@@ -2672,25 +2982,25 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'> 					      &amp;cap_resp[i], "dev caps");</div><div class='ctx'> </div><div class='ctx'> 		switch (cap) {</div><div class='del'>-		case ICE_AQC_CAPS_VALID_FUNCTIONS:</div><div class='add'>+		case LIBIE_AQC_CAPS_VALID_FUNCTIONS:</div><div class='ctx'> 			ice_parse_valid_functions_cap(hw, dev_p, &amp;cap_resp[i]);</div><div class='ctx'> 			break;</div><div class='del'>-		case ICE_AQC_CAPS_VF:</div><div class='add'>+		case LIBIE_AQC_CAPS_VF:</div><div class='ctx'> 			ice_parse_vf_dev_caps(hw, dev_p, &amp;cap_resp[i]);</div><div class='ctx'> 			break;</div><div class='del'>-		case ICE_AQC_CAPS_VSI:</div><div class='add'>+		case LIBIE_AQC_CAPS_VSI:</div><div class='ctx'> 			ice_parse_vsi_dev_caps(hw, dev_p, &amp;cap_resp[i]);</div><div class='ctx'> 			break;</div><div class='del'>-		case ICE_AQC_CAPS_1588:</div><div class='add'>+		case LIBIE_AQC_CAPS_1588:</div><div class='ctx'> 			ice_parse_1588_dev_caps(hw, dev_p, &amp;cap_resp[i]);</div><div class='ctx'> 			break;</div><div class='del'>-		case ICE_AQC_CAPS_FD:</div><div class='add'>+		case LIBIE_AQC_CAPS_FD:</div><div class='ctx'> 			ice_parse_fdir_dev_caps(hw, dev_p, &amp;cap_resp[i]);</div><div class='ctx'> 			break;</div><div class='del'>-		case ICE_AQC_CAPS_SENSOR_READING:</div><div class='add'>+		case LIBIE_AQC_CAPS_SENSOR_READING:</div><div class='ctx'> 			ice_parse_sensor_reading_cap(hw, dev_p, &amp;cap_resp[i]);</div><div class='ctx'> 			break;</div><div class='del'>-		case ICE_AQC_CAPS_NAC_TOPOLOGY:</div><div class='add'>+		case LIBIE_AQC_CAPS_NAC_TOPOLOGY:</div><div class='ctx'> 			ice_parse_nac_topo_dev_caps(hw, dev_p, &amp;cap_resp[i]);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -2706,40 +3016,6 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_is_pf_c827 - check if pf contains c827 phy</div><div class='del'>- * @hw: pointer to the hw struct</div><div class='del'>- */</div><div class='del'>-bool ice_is_pf_c827(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	struct ice_aqc_get_link_topo cmd = {};</div><div class='del'>-	u8 node_part_number;</div><div class='del'>-	u16 node_handle;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;mac_type != ICE_MAC_E810)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;device_id != ICE_DEV_ID_E810C_QSFP)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	cmd.addr.topo_params.node_type_ctx =</div><div class='del'>-		FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_TYPE_M, ICE_AQC_LINK_TOPO_NODE_TYPE_PHY) |</div><div class='del'>-		FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M, ICE_AQC_LINK_TOPO_NODE_CTX_PORT);</div><div class='del'>-	cmd.addr.topo_params.index = 0;</div><div class='del'>-</div><div class='del'>-	status = ice_aq_get_netlist_node(hw, &amp;cmd, &amp;node_part_number,</div><div class='del'>-					 &amp;node_handle);</div><div class='del'>-</div><div class='del'>-	if (status || node_part_number != ICE_AQC_GET_LINK_TOPO_NODE_NR_C827)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (node_handle == E810C_QSFP_C827_0_HANDLE || node_handle == E810C_QSFP_C827_1_HANDLE)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_is_phy_rclk_in_netlist</div><div class='ctx'>  * @hw: pointer to the hw struct</div><div class='ctx'>  *</div><div class='hunk'>@@ -2747,9 +3023,11 @@ bool ice_is_pf_c827(struct ice_hw *hw)</div><div class='ctx'>  */</div><div class='ctx'> bool ice_is_phy_rclk_in_netlist(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL,</div><div class='add'>+	if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_PHY,</div><div class='add'>+				  ICE_AQC_LINK_TOPO_NODE_CTX_PORT,</div><div class='ctx'> 				  ICE_AQC_GET_LINK_TOPO_NODE_NR_C827, NULL) &amp;&amp;</div><div class='del'>-	    ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL,</div><div class='add'>+	    ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_PHY,</div><div class='add'>+				  ICE_AQC_LINK_TOPO_NODE_CTX_PORT,</div><div class='ctx'> 				  ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY, NULL))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -2765,6 +3043,7 @@ bool ice_is_phy_rclk_in_netlist(struct ice_hw *hw)</div><div class='ctx'> bool ice_is_clock_mux_in_netlist(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX,</div><div class='add'>+				  ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL,</div><div class='ctx'> 				  ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX,</div><div class='ctx'> 				  NULL))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -2785,12 +3064,14 @@ bool ice_is_clock_mux_in_netlist(struct ice_hw *hw)</div><div class='ctx'> bool ice_is_cgu_in_netlist(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	if (!ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL,</div><div class='add'>+				   ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL,</div><div class='ctx'> 				   ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032,</div><div class='ctx'> 				   NULL)) {</div><div class='ctx'> 		hw-&gt;cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032;</div><div class='ctx'> 		return true;</div><div class='ctx'> 	} else if (!ice_find_netlist_node(hw,</div><div class='ctx'> 					  ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL,</div><div class='add'>+					  ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL,</div><div class='ctx'> 					  ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384,</div><div class='ctx'> 					  NULL)) {</div><div class='ctx'> 		hw-&gt;cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384;</div><div class='hunk'>@@ -2809,6 +3090,7 @@ bool ice_is_cgu_in_netlist(struct ice_hw *hw)</div><div class='ctx'> bool ice_is_gps_in_netlist(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_GPS,</div><div class='add'>+				  ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL,</div><div class='ctx'> 				  ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_GPS, NULL))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -2838,8 +3120,8 @@ int</div><div class='ctx'> ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,</div><div class='ctx'> 		 enum ice_adminq_opc opc, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aqc_list_caps *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aqc_list_caps *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	cmd = &amp;desc.params.get_cap;</div><div class='hunk'>@@ -2880,7 +3162,7 @@ ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps)</div><div class='ctx'> 	 * device will return, we can simply send a 4KB buffer, the maximum</div><div class='ctx'> 	 * possible size that firmware can return.</div><div class='ctx'> 	 */</div><div class='del'>-	cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem);</div><div class='add'>+	cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct libie_aqc_list_caps_elem);</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &amp;cap_count,</div><div class='ctx'> 				  ice_aqc_opc_list_dev_caps, NULL);</div><div class='hunk'>@@ -2914,7 +3196,7 @@ ice_discover_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_caps)</div><div class='ctx'> 	 * device will return, we can simply send a 4KB buffer, the maximum</div><div class='ctx'> 	 * possible size that firmware can return.</div><div class='ctx'> 	 */</div><div class='del'>-	cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem);</div><div class='add'>+	cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct libie_aqc_list_caps_elem);</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &amp;cap_count,</div><div class='ctx'> 				  ice_aqc_opc_list_func_caps, NULL);</div><div class='hunk'>@@ -3023,9 +3305,9 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,</div><div class='ctx'> 			struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_manage_mac_write *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.mac_write;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_manage_mac_write);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;flags = flags;</div><div class='hunk'>@@ -3042,10 +3324,12 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,</div><div class='ctx'>  */</div><div class='ctx'> static int ice_aq_clear_pxe_mode(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct ice_aqc_clear_pxe *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_clear_pxe_mode);</div><div class='del'>-	desc.params.clear_pxe.rx_cnt = ICE_AQC_CLEAR_PXE_RX_CNT;</div><div class='add'>+	cmd-&gt;rx_cnt = ICE_AQC_CLEAR_PXE_RX_CNT;</div><div class='ctx'> </div><div class='ctx'> 	return ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='ctx'> }</div><div class='hunk'>@@ -3078,10 +3362,10 @@ ice_aq_set_port_params(struct ice_port_info *pi, bool double_vlan,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_port_params *cmd;</div><div class='ctx'> 	struct ice_hw *hw = pi-&gt;hw;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 cmd_flags = 0;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.set_port_params;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_port_params);</div><div class='ctx'> 	if (double_vlan)</div><div class='hunk'>@@ -3108,6 +3392,7 @@ bool ice_is_100m_speed_supported(struct ice_hw *hw)</div><div class='ctx'> 	case ICE_DEV_ID_E822L_SGMII:</div><div class='ctx'> 	case ICE_DEV_ID_E823L_1GBE:</div><div class='ctx'> 	case ICE_DEV_ID_E823C_SGMII:</div><div class='add'>+	case ICE_DEV_ID_E825C_SGMII:</div><div class='ctx'> 		return true;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -3318,7 +3603,8 @@ int</div><div class='ctx'> ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,</div><div class='ctx'> 		   struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct ice_aqc_set_phy_cfg *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (!cfg)</div><div class='hunk'>@@ -3333,8 +3619,9 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_phy_cfg);</div><div class='del'>-	desc.params.set_phy.lport_num = pi-&gt;lport;</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd-&gt;lport_num = pi-&gt;lport;</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	ice_debug(hw, ICE_DBG_LINK, "set phy cfg\n");</div><div class='ctx'> 	ice_debug(hw, ICE_DBG_LINK, "	phy_type_low = 0x%llx\n",</div><div class='hunk'>@@ -3350,7 +3637,7 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,</div><div class='ctx'> 		  cfg-&gt;link_fec_opt);</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, cfg, sizeof(*cfg), cd);</div><div class='del'>-	if (hw-&gt;adminq.sq_last_status == ICE_AQ_RC_EMODE)</div><div class='add'>+	if (hw-&gt;adminq.sq_last_status == LIBIE_AQ_RC_EMODE)</div><div class='ctx'> 		status = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!status)</div><div class='hunk'>@@ -3407,17 +3694,17 @@ int ice_aq_get_phy_equalization(struct ice_hw *hw, u16 data_in, u16 op_code,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_dnl_call_command *cmd;</div><div class='ctx'> 	struct ice_aqc_dnl_call buf = {};</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	buf.sto.txrx_equa_reqs.data_in = cpu_to_le16(data_in);</div><div class='ctx'> 	buf.sto.txrx_equa_reqs.op_code_serdes_sel =</div><div class='ctx'> 		cpu_to_le16(op_code | (serdes_num &amp; 0xF));</div><div class='del'>-	cmd = &amp;desc.params.dnl_call;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_dnl_call);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_BUF |</div><div class='del'>-				  ICE_AQ_FLAG_RD |</div><div class='del'>-				  ICE_AQ_FLAG_SI);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_BUF |</div><div class='add'>+				  LIBIE_AQ_FLAG_RD |</div><div class='add'>+				  LIBIE_AQ_FLAG_SI);</div><div class='ctx'> 	desc.datalen = cpu_to_le16(sizeof(struct ice_aqc_dnl_call));</div><div class='ctx'> 	cmd-&gt;activity_id = cpu_to_le16(ICE_AQC_ACT_ID_DNL);</div><div class='ctx'> </div><div class='hunk'>@@ -3455,7 +3742,7 @@ static const u32 fec_reg[][ICE_FEC_MAX] = {</div><div class='ctx'> int ice_aq_get_fec_stats(struct ice_hw *hw, u16 pcs_quad, u16 pcs_port,</div><div class='ctx'> 			 enum ice_fec_stats_types fec_type, u32 *output)</div><div class='ctx'> {</div><div class='del'>-	u16 flag = (ICE_AQ_FLAG_RD | ICE_AQ_FLAG_BUF | ICE_AQ_FLAG_SI);</div><div class='add'>+	u16 flag = (LIBIE_AQ_FLAG_RD | LIBIE_AQ_FLAG_BUF | LIBIE_AQ_FLAG_SI);</div><div class='ctx'> 	struct ice_sbq_msg_input msg = {};</div><div class='ctx'> 	u32 receiver_id, reg_offset;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -3475,7 +3762,7 @@ int ice_aq_get_fec_stats(struct ice_hw *hw, u16 pcs_quad, u16 pcs_port,</div><div class='ctx'> 	msg.msg_addr_low = lower_16_bits(reg_offset);</div><div class='ctx'> 	msg.msg_addr_high = receiver_id;</div><div class='ctx'> 	msg.opcode = ice_sbq_msg_rd;</div><div class='del'>-	msg.dest_dev = rmn_0;</div><div class='add'>+	msg.dest_dev = ice_sbq_dev_phy_0;</div><div class='ctx'> </div><div class='ctx'> 	err = ice_sbq_rw_reg(hw, &amp;msg, flag);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -3878,9 +4165,9 @@ ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,</div><div class='ctx'> 			   struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_restart_an *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.restart_an;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_restart_an);</div><div class='ctx'> </div><div class='hunk'>@@ -3908,9 +4195,9 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,</div><div class='ctx'> 		      struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_event_mask *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.set_event_mask;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_event_mask);</div><div class='ctx'> </div><div class='hunk'>@@ -3932,9 +4219,9 @@ int</div><div class='ctx'> ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_mac_lb *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.set_mac_lb;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_mac_lb);</div><div class='ctx'> 	if (ena_lpbk)</div><div class='hunk'>@@ -3957,9 +4244,9 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_port_id_led *cmd;</div><div class='ctx'> 	struct ice_hw *hw = pi-&gt;hw;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.set_port_id_led;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_port_id_led);</div><div class='ctx'> </div><div class='hunk'>@@ -3995,7 +4282,7 @@ ice_aq_get_port_options(struct ice_hw *hw,</div><div class='ctx'> 			u8 *pending_option_idx, bool *pending_option_valid)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_port_options *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	u8 i;</div><div class='ctx'> </div><div class='hunk'>@@ -4003,7 +4290,7 @@ ice_aq_get_port_options(struct ice_hw *hw,</div><div class='ctx'> 	if (*option_count &lt; ICE_AQC_PORT_OPT_COUNT_M)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.get_port_options;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_port_options);</div><div class='ctx'> </div><div class='ctx'> 	if (lport_valid)</div><div class='hunk'>@@ -4069,12 +4356,12 @@ ice_aq_set_port_option(struct ice_hw *hw, u8 lport, u8 lport_valid,</div><div class='ctx'> 		       u8 new_option)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_port_option *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	if (new_option &gt; ICE_AQC_PORT_OPT_COUNT_M)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.set_port_option;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_port_option);</div><div class='ctx'> </div><div class='ctx'> 	if (lport_valid)</div><div class='hunk'>@@ -4087,6 +4374,68 @@ ice_aq_set_port_option(struct ice_hw *hw, u8 lport, u8 lport_valid,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_get_phy_lane_number - Get PHY lane number for current adapter</div><div class='add'>+ * @hw: pointer to the hw struct</div><div class='add'>+ *</div><div class='add'>+ * Return: PHY lane number on success, negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+int ice_get_phy_lane_number(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ice_aqc_get_port_options_elem *options;</div><div class='add'>+	unsigned int lport = 0;</div><div class='add'>+	unsigned int lane;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* E82X does not have sequential IDs, lane number is PF ID.</div><div class='add'>+	 * For E825 device, the exception is the variant with external</div><div class='add'>+	 * PHY (0x579F), in which there is also 1:1 pf_id -&gt; lane_number</div><div class='add'>+	 * mapping.</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;mac_type == ICE_MAC_GENERIC ||</div><div class='add'>+	    hw-&gt;device_id == ICE_DEV_ID_E825C_SGMII)</div><div class='add'>+		return hw-&gt;pf_id;</div><div class='add'>+</div><div class='add'>+	options = kcalloc(ICE_AQC_PORT_OPT_MAX, sizeof(*options), GFP_KERNEL);</div><div class='add'>+	if (!options)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (lane = 0; lane &lt; ICE_MAX_PORT_PER_PCI_DEV; lane++) {</div><div class='add'>+		u8 options_count = ICE_AQC_PORT_OPT_MAX;</div><div class='add'>+		u8 speed, active_idx, pending_idx;</div><div class='add'>+		bool active_valid, pending_valid;</div><div class='add'>+</div><div class='add'>+		err = ice_aq_get_port_options(hw, options, &amp;options_count, lane,</div><div class='add'>+					      true, &amp;active_idx, &amp;active_valid,</div><div class='add'>+					      &amp;pending_idx, &amp;pending_valid);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		if (!active_valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		speed = options[active_idx].max_lane_speed;</div><div class='add'>+		/* If we don't get speed for this lane, it's unoccupied */</div><div class='add'>+		if (speed &gt; ICE_AQC_PORT_OPT_MAX_LANE_40G)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (hw-&gt;pf_id == lport) {</div><div class='add'>+			if (hw-&gt;mac_type == ICE_MAC_GENERIC_3K_E825 &amp;&amp;</div><div class='add'>+			    ice_is_dual(hw) &amp;&amp; !ice_is_primary(hw))</div><div class='add'>+				lane += ICE_PORTS_PER_QUAD;</div><div class='add'>+			kfree(options);</div><div class='add'>+			return lane;</div><div class='add'>+		}</div><div class='add'>+		lport++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* PHY lane not found */</div><div class='add'>+	err = -ENXIO;</div><div class='add'>+err:</div><div class='add'>+	kfree(options);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_aq_sff_eeprom</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='ctx'>  * @lport: bits [7:0] = logical port, bit [8] = logical port valid</div><div class='hunk'>@@ -4107,7 +4456,7 @@ ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,</div><div class='ctx'> 		  bool write, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_sff_eeprom *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 i2c_bus_addr;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='hunk'>@@ -4115,8 +4464,8 @@ ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_sff_eeprom);</div><div class='del'>-	cmd = &amp;desc.params.read_write_sff_param;</div><div class='del'>-	desc.flags = cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	desc.flags = cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	cmd-&gt;lport_num = (u8)(lport &amp; 0xff);</div><div class='ctx'> 	cmd-&gt;lport_num_valid = (u8)((lport &gt;&gt; 8) &amp; 0x01);</div><div class='ctx'> 	i2c_bus_addr = FIELD_PREP(ICE_AQC_SFF_I2CBUS_7BIT_M, bus_addr &gt;&gt; 1) |</div><div class='hunk'>@@ -4176,7 +4525,7 @@ __ice_aq_get_set_rss_lut(struct ice_hw *hw,</div><div class='ctx'> 	struct ice_aqc_get_set_rss_lut *desc_params;</div><div class='ctx'> 	enum ice_aqc_lut_flags flags;</div><div class='ctx'> 	enum ice_lut_size lut_size;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u8 *lut = params-&gt;lut;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -4192,9 +4541,9 @@ __ice_aq_get_set_rss_lut(struct ice_hw *hw,</div><div class='ctx'> 	opcode = set ? ice_aqc_opc_set_rss_lut : ice_aqc_opc_get_rss_lut;</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, opcode);</div><div class='ctx'> 	if (set)</div><div class='del'>-		desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+		desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='del'>-	desc_params = &amp;desc.params.get_set_rss_lut;</div><div class='add'>+	desc_params = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);</div><div class='ctx'> 	desc_params-&gt;vsi_id = cpu_to_le16(vsi_id | ICE_AQC_RSS_VSI_VALID);</div><div class='ctx'> </div><div class='hunk'>@@ -4249,16 +4598,16 @@ __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_set_rss_key *desc_params;</div><div class='ctx'> 	u16 key_size = sizeof(*key);</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	if (set) {</div><div class='ctx'> 		ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_rss_key);</div><div class='del'>-		desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+		desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_rss_key);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	desc_params = &amp;desc.params.get_set_rss_key;</div><div class='add'>+	desc_params = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	desc_params-&gt;vsi_id = cpu_to_le16(vsi_id | ICE_AQC_RSS_VSI_VALID);</div><div class='ctx'> </div><div class='ctx'> 	return ice_aq_send_cmd(hw, &amp;desc, key, key_size, NULL);</div><div class='hunk'>@@ -4330,10 +4679,10 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_add_tx_qgrp *list;</div><div class='ctx'> 	struct ice_aqc_add_txqs *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 i, sum_size = 0;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.add_txqs;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_add_txqs);</div><div class='ctx'> </div><div class='hunk'>@@ -4352,7 +4701,7 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,</div><div class='ctx'> 	if (buf_size != sum_size)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;num_qgrps = num_qgrps;</div><div class='ctx'> </div><div class='hunk'>@@ -4379,12 +4728,12 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_dis_txq_item *item;</div><div class='ctx'> 	struct ice_aqc_dis_txqs *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 vmvf_and_timeout;</div><div class='ctx'> 	u16 i, sz = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.dis_txqs;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_dis_txqs);</div><div class='ctx'> </div><div class='ctx'> 	/* qg_list can be NULL only in VM/VF reset flow */</div><div class='hunk'>@@ -4425,7 +4774,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,</div><div class='ctx'> 	/* set RD bit to indicate that command buffer is provided by the driver</div><div class='ctx'> 	 * and it needs to be read by the firmware</div><div class='ctx'> 	 */</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0, item = qg_list; i &lt; num_qgrps; i++) {</div><div class='ctx'> 		u16 item_size = struct_size(item, q_id, item-&gt;num_qs);</div><div class='hunk'>@@ -4457,40 +4806,42 @@ do_aq:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_aq_cfg_lan_txq</div><div class='add'>+ * ice_aq_cfg_lan_txq - send AQ command 0x0C32 to FW</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='ctx'>  * @buf: buffer for command</div><div class='ctx'>  * @buf_size: size of buffer in bytes</div><div class='ctx'>  * @num_qs: number of queues being configured</div><div class='ctx'>  * @oldport: origination lport</div><div class='ctx'>  * @newport: destination lport</div><div class='add'>+ * @mode: cmd_type for move to use</div><div class='ctx'>  * @cd: pointer to command details structure or NULL</div><div class='ctx'>  *</div><div class='ctx'>  * Move/Configure LAN Tx queue (0x0C32)</div><div class='ctx'>  *</div><div class='del'>- * There is a better AQ command to use for moving nodes, so only coding</div><div class='del'>- * this one for configuring the node.</div><div class='add'>+ * Return: Zero on success, associated error code on failure.</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='ctx'> ice_aq_cfg_lan_txq(struct ice_hw *hw, struct ice_aqc_cfg_txqs_buf *buf,</div><div class='ctx'> 		   u16 buf_size, u16 num_qs, u8 oldport, u8 newport,</div><div class='del'>-		   struct ice_sq_cd *cd)</div><div class='add'>+		   u8 mode, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_cfg_txqs *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.cfg_txqs;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_cfg_txqs);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	if (!buf)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;cmd_type = ICE_AQC_Q_CFG_TC_CHNG;</div><div class='add'>+	cmd-&gt;cmd_type = mode;</div><div class='ctx'> 	cmd-&gt;num_qs = num_qs;</div><div class='ctx'> 	cmd-&gt;port_num_chng = (oldport &amp; ICE_AQC_Q_CFG_SRC_PRT_M);</div><div class='ctx'> 	cmd-&gt;port_num_chng |= FIELD_PREP(ICE_AQC_Q_CFG_DST_PRT_M, newport);</div><div class='add'>+	cmd-&gt;port_num_chng |= FIELD_PREP(ICE_AQC_Q_CFG_MODE_M,</div><div class='add'>+					 ICE_AQC_Q_CFG_MODE_KEEP_OWN);</div><div class='ctx'> 	cmd-&gt;time_out = FIELD_PREP(ICE_AQC_Q_CFG_TIMEOUT_M, 5);</div><div class='ctx'> 	cmd-&gt;blocked_cgds = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -4518,10 +4869,10 @@ ice_aq_add_rdma_qsets(struct ice_hw *hw, u8 num_qset_grps,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_add_rdma_qset_data *list;</div><div class='ctx'> 	struct ice_aqc_add_rdma_qset *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 i, sum_size = 0;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.add_rdma_qset;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_add_rdma_qset);</div><div class='ctx'> </div><div class='hunk'>@@ -4539,213 +4890,54 @@ ice_aq_add_rdma_qsets(struct ice_hw *hw, u8 num_qset_grps,</div><div class='ctx'> 	if (buf_size != sum_size)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;num_qset_grps = num_qset_grps;</div><div class='ctx'> </div><div class='ctx'> 	return ice_aq_send_cmd(hw, &amp;desc, qset_list, buf_size, cd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* End of FW Admin Queue command wrappers */</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_pack_ctx_byte - write a byte to a packed context structure</div><div class='del'>- * @src_ctx: unpacked source context structure</div><div class='del'>- * @dest_ctx: packed destination context data</div><div class='del'>- * @ce_info: context element description</div><div class='del'>- */</div><div class='del'>-static void ice_pack_ctx_byte(u8 *src_ctx, u8 *dest_ctx,</div><div class='del'>-			      const struct ice_ctx_ele *ce_info)</div><div class='del'>-{</div><div class='del'>-	u8 src_byte, dest_byte, mask;</div><div class='del'>-	u8 *from, *dest;</div><div class='del'>-	u16 shift_width;</div><div class='del'>-</div><div class='del'>-	/* copy from the next struct field */</div><div class='del'>-	from = src_ctx + ce_info-&gt;offset;</div><div class='del'>-</div><div class='del'>-	/* prepare the bits and mask */</div><div class='del'>-	shift_width = ce_info-&gt;lsb % 8;</div><div class='del'>-	mask = GENMASK(ce_info-&gt;width - 1 + shift_width, shift_width);</div><div class='del'>-</div><div class='del'>-	src_byte = *from;</div><div class='del'>-	src_byte &lt;&lt;= shift_width;</div><div class='del'>-	src_byte &amp;= mask;</div><div class='del'>-</div><div class='del'>-	/* get the current bits from the target bit string */</div><div class='del'>-	dest = dest_ctx + (ce_info-&gt;lsb / 8);</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;dest_byte, dest, sizeof(dest_byte));</div><div class='del'>-</div><div class='del'>-	dest_byte &amp;= ~mask;	/* get the bits not changing */</div><div class='del'>-	dest_byte |= src_byte;	/* add in the new bits */</div><div class='del'>-</div><div class='del'>-	/* put it all back */</div><div class='del'>-	memcpy(dest, &amp;dest_byte, sizeof(dest_byte));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_pack_ctx_word - write a word to a packed context structure</div><div class='del'>- * @src_ctx: unpacked source context structure</div><div class='del'>- * @dest_ctx: packed destination context data</div><div class='del'>- * @ce_info: context element description</div><div class='del'>- */</div><div class='del'>-static void ice_pack_ctx_word(u8 *src_ctx, u8 *dest_ctx,</div><div class='del'>-			      const struct ice_ctx_ele *ce_info)</div><div class='del'>-{</div><div class='del'>-	u16 src_word, mask;</div><div class='del'>-	__le16 dest_word;</div><div class='del'>-	u8 *from, *dest;</div><div class='del'>-	u16 shift_width;</div><div class='del'>-</div><div class='del'>-	/* copy from the next struct field */</div><div class='del'>-	from = src_ctx + ce_info-&gt;offset;</div><div class='del'>-</div><div class='del'>-	/* prepare the bits and mask */</div><div class='del'>-	shift_width = ce_info-&gt;lsb % 8;</div><div class='del'>-	mask = GENMASK(ce_info-&gt;width - 1 + shift_width, shift_width);</div><div class='del'>-</div><div class='del'>-	/* don't swizzle the bits until after the mask because the mask bits</div><div class='del'>-	 * will be in a different bit position on big endian machines</div><div class='del'>-	 */</div><div class='del'>-	src_word = *(u16 *)from;</div><div class='del'>-	src_word &lt;&lt;= shift_width;</div><div class='del'>-	src_word &amp;= mask;</div><div class='del'>-</div><div class='del'>-	/* get the current bits from the target bit string */</div><div class='del'>-	dest = dest_ctx + (ce_info-&gt;lsb / 8);</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;dest_word, dest, sizeof(dest_word));</div><div class='del'>-</div><div class='del'>-	dest_word &amp;= ~(cpu_to_le16(mask));	/* get the bits not changing */</div><div class='del'>-	dest_word |= cpu_to_le16(src_word);	/* add in the new bits */</div><div class='del'>-</div><div class='del'>-	/* put it all back */</div><div class='del'>-	memcpy(dest, &amp;dest_word, sizeof(dest_word));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_pack_ctx_dword - write a dword to a packed context structure</div><div class='del'>- * @src_ctx: unpacked source context structure</div><div class='del'>- * @dest_ctx: packed destination context data</div><div class='del'>- * @ce_info: context element description</div><div class='del'>- */</div><div class='del'>-static void ice_pack_ctx_dword(u8 *src_ctx, u8 *dest_ctx,</div><div class='del'>-			       const struct ice_ctx_ele *ce_info)</div><div class='del'>-{</div><div class='del'>-	u32 src_dword, mask;</div><div class='del'>-	__le32 dest_dword;</div><div class='del'>-	u8 *from, *dest;</div><div class='del'>-	u16 shift_width;</div><div class='del'>-</div><div class='del'>-	/* copy from the next struct field */</div><div class='del'>-	from = src_ctx + ce_info-&gt;offset;</div><div class='del'>-</div><div class='del'>-	/* prepare the bits and mask */</div><div class='del'>-	shift_width = ce_info-&gt;lsb % 8;</div><div class='del'>-	mask = GENMASK(ce_info-&gt;width - 1 + shift_width, shift_width);</div><div class='del'>-</div><div class='del'>-	/* don't swizzle the bits until after the mask because the mask bits</div><div class='del'>-	 * will be in a different bit position on big endian machines</div><div class='del'>-	 */</div><div class='del'>-	src_dword = *(u32 *)from;</div><div class='del'>-	src_dword &lt;&lt;= shift_width;</div><div class='del'>-	src_dword &amp;= mask;</div><div class='del'>-</div><div class='del'>-	/* get the current bits from the target bit string */</div><div class='del'>-	dest = dest_ctx + (ce_info-&gt;lsb / 8);</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;dest_dword, dest, sizeof(dest_dword));</div><div class='del'>-</div><div class='del'>-	dest_dword &amp;= ~(cpu_to_le32(mask));	/* get the bits not changing */</div><div class='del'>-	dest_dword |= cpu_to_le32(src_dword);	/* add in the new bits */</div><div class='del'>-</div><div class='del'>-	/* put it all back */</div><div class='del'>-	memcpy(dest, &amp;dest_dword, sizeof(dest_dword));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * ice_pack_ctx_qword - write a qword to a packed context structure</div><div class='del'>- * @src_ctx: unpacked source context structure</div><div class='del'>- * @dest_ctx: packed destination context data</div><div class='del'>- * @ce_info: context element description</div><div class='add'>+ * ice_aq_set_txtimeq - set Tx time queues</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @txtimeq: first Tx time queue id to configure</div><div class='add'>+ * @q_count: number of queues to configure</div><div class='add'>+ * @txtime_qg: queue group to be set</div><div class='add'>+ * @buf_size: size of buffer for indirect command</div><div class='add'>+ * @cd: pointer to command details structure or NULL</div><div class='add'>+ *</div><div class='add'>+ * Set Tx Time queue (0x0C35)</div><div class='add'>+ * Return: 0 on success or negative value on failure.</div><div class='ctx'>  */</div><div class='del'>-static void ice_pack_ctx_qword(u8 *src_ctx, u8 *dest_ctx,</div><div class='del'>-			       const struct ice_ctx_ele *ce_info)</div><div class='add'>+int</div><div class='add'>+ice_aq_set_txtimeq(struct ice_hw *hw, u16 txtimeq, u8 q_count,</div><div class='add'>+		   struct ice_aqc_set_txtime_qgrp *txtime_qg, u16 buf_size,</div><div class='add'>+		   struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	u64 src_qword, mask;</div><div class='del'>-	__le64 dest_qword;</div><div class='del'>-	u8 *from, *dest;</div><div class='del'>-	u16 shift_width;</div><div class='add'>+	struct ice_aqc_set_txtimeqs *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	u16 size;</div><div class='ctx'> </div><div class='del'>-	/* copy from the next struct field */</div><div class='del'>-	from = src_ctx + ce_info-&gt;offset;</div><div class='del'>-</div><div class='del'>-	/* prepare the bits and mask */</div><div class='del'>-	shift_width = ce_info-&gt;lsb % 8;</div><div class='del'>-	mask = GENMASK_ULL(ce_info-&gt;width - 1 + shift_width, shift_width);</div><div class='add'>+	if (!txtime_qg || txtimeq &gt; ICE_TXTIME_MAX_QUEUE ||</div><div class='add'>+	    q_count &lt; 1 || q_count &gt; ICE_SET_TXTIME_MAX_Q_AMOUNT)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* don't swizzle the bits until after the mask because the mask bits</div><div class='del'>-	 * will be in a different bit position on big endian machines</div><div class='del'>-	 */</div><div class='del'>-	src_qword = *(u64 *)from;</div><div class='del'>-	src_qword &lt;&lt;= shift_width;</div><div class='del'>-	src_qword &amp;= mask;</div><div class='add'>+	size = struct_size(txtime_qg, txtimeqs, q_count);</div><div class='add'>+	if (buf_size != size)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* get the current bits from the target bit string */</div><div class='del'>-	dest = dest_ctx + (ce_info-&gt;lsb / 8);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='del'>-	memcpy(&amp;dest_qword, dest, sizeof(dest_qword));</div><div class='add'>+	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_txtimeqs);</div><div class='ctx'> </div><div class='del'>-	dest_qword &amp;= ~(cpu_to_le64(mask));	/* get the bits not changing */</div><div class='del'>-	dest_qword |= cpu_to_le64(src_qword);	/* add in the new bits */</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='del'>-	/* put it all back */</div><div class='del'>-	memcpy(dest, &amp;dest_qword, sizeof(dest_qword));</div><div class='add'>+	cmd-&gt;q_id = cpu_to_le16(txtimeq);</div><div class='add'>+	cmd-&gt;q_amount = cpu_to_le16(q_count);</div><div class='add'>+	return ice_aq_send_cmd(hw, &amp;desc, txtime_qg, buf_size, cd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_set_ctx - set context bits in packed structure</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='del'>- * @src_ctx:  pointer to a generic non-packed context structure</div><div class='del'>- * @dest_ctx: pointer to memory for the packed structure</div><div class='del'>- * @ce_info: List of Rx context elements</div><div class='del'>- */</div><div class='del'>-int ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,</div><div class='del'>-		const struct ice_ctx_ele *ce_info)</div><div class='del'>-{</div><div class='del'>-	int f;</div><div class='del'>-</div><div class='del'>-	for (f = 0; ce_info[f].width; f++) {</div><div class='del'>-		/* We have to deal with each element of the FW response</div><div class='del'>-		 * using the correct size so that we are correct regardless</div><div class='del'>-		 * of the endianness of the machine.</div><div class='del'>-		 */</div><div class='del'>-		if (ce_info[f].width &gt; (ce_info[f].size_of * BITS_PER_BYTE)) {</div><div class='del'>-			ice_debug(hw, ICE_DBG_QCTX, "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",</div><div class='del'>-				  f, ce_info[f].width, ce_info[f].size_of);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		switch (ce_info[f].size_of) {</div><div class='del'>-		case sizeof(u8):</div><div class='del'>-			ice_pack_ctx_byte(src_ctx, dest_ctx, &amp;ce_info[f]);</div><div class='del'>-			break;</div><div class='del'>-		case sizeof(u16):</div><div class='del'>-			ice_pack_ctx_word(src_ctx, dest_ctx, &amp;ce_info[f]);</div><div class='del'>-			break;</div><div class='del'>-		case sizeof(u32):</div><div class='del'>-			ice_pack_ctx_dword(src_ctx, dest_ctx, &amp;ce_info[f]);</div><div class='del'>-			break;</div><div class='del'>-		case sizeof(u64):</div><div class='del'>-			ice_pack_ctx_qword(src_ctx, dest_ctx, &amp;ce_info[f]);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+/* End of FW Admin Queue command wrappers */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_get_lan_q_ctx - get the LAN queue context for the given VSI and TC</div><div class='hunk'>@@ -5156,6 +5348,32 @@ ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_aq_get_cgu_input_pin_measure - get input pin signal measurements</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @dpll_idx: index of dpll to be measured</div><div class='add'>+ * @meas: array to be filled with results</div><div class='add'>+ * @meas_num: max number of results array can hold</div><div class='add'>+ *</div><div class='add'>+ * Get CGU measurements (0x0C59) of phase and frequency offsets for input</div><div class='add'>+ * pins on given dpll.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ice_aq_get_cgu_input_pin_measure(struct ice_hw *hw, u8 dpll_idx,</div><div class='add'>+				     struct ice_cgu_input_measure *meas,</div><div class='add'>+				     u16 meas_num)</div><div class='add'>+{</div><div class='add'>+	struct ice_aqc_get_cgu_input_measure *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_cgu_input_measure);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd-&gt;dpll_idx_opt = dpll_idx &amp; ICE_AQC_GET_CGU_IN_MEAS_DPLL_IDX_M;</div><div class='add'>+</div><div class='add'>+	return ice_aq_send_cmd(hw, &amp;desc, meas, meas_num * sizeof(*meas), NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_aq_get_cgu_abilities - get cgu abilities</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='ctx'>  * @abilities: CGU abilities</div><div class='hunk'>@@ -5167,7 +5385,7 @@ int</div><div class='ctx'> ice_aq_get_cgu_abilities(struct ice_hw *hw,</div><div class='ctx'> 			 struct ice_aqc_get_cgu_abilities *abilities)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_cgu_abilities);</div><div class='ctx'> 	return ice_aq_send_cmd(hw, &amp;desc, abilities, sizeof(*abilities), NULL);</div><div class='hunk'>@@ -5190,10 +5408,10 @@ ice_aq_set_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 flags1, u8 flags2,</div><div class='ctx'> 			 u32 freq, s32 phase_delay)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_cgu_input_config *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_cgu_input_config);</div><div class='del'>-	cmd = &amp;desc.params.set_cgu_input_config;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;input_idx = input_idx;</div><div class='ctx'> 	cmd-&gt;flags1 = flags1;</div><div class='ctx'> 	cmd-&gt;flags2 = flags2;</div><div class='hunk'>@@ -5222,11 +5440,11 @@ ice_aq_get_input_pin_cfg(struct ice_hw *hw, u8 input_idx, u8 *status, u8 *type,</div><div class='ctx'> 			 u8 *flags1, u8 *flags2, u32 *freq, s32 *phase_delay)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_cgu_input_config *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_cgu_input_config);</div><div class='del'>-	cmd = &amp;desc.params.get_cgu_input_config;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;input_idx = input_idx;</div><div class='ctx'> </div><div class='ctx'> 	ret = ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='hunk'>@@ -5265,10 +5483,10 @@ ice_aq_set_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 flags,</div><div class='ctx'> 			  u8 src_sel, u32 freq, s32 phase_delay)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_cgu_output_config *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_cgu_output_config);</div><div class='del'>-	cmd = &amp;desc.params.set_cgu_output_config;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;output_idx = output_idx;</div><div class='ctx'> 	cmd-&gt;flags = flags;</div><div class='ctx'> 	cmd-&gt;src_sel = src_sel;</div><div class='hunk'>@@ -5295,11 +5513,11 @@ ice_aq_get_output_pin_cfg(struct ice_hw *hw, u8 output_idx, u8 *flags,</div><div class='ctx'> 			  u8 *src_sel, u32 *freq, u32 *src_freq)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_cgu_output_config *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_cgu_output_config);</div><div class='del'>-	cmd = &amp;desc.params.get_cgu_output_config;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;output_idx = output_idx;</div><div class='ctx'> </div><div class='ctx'> 	ret = ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='hunk'>@@ -5336,11 +5554,11 @@ ice_aq_get_cgu_dpll_status(struct ice_hw *hw, u8 dpll_num, u8 *ref_state,</div><div class='ctx'> 			   u8 *eec_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_cgu_dpll_status *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_cgu_dpll_status);</div><div class='del'>-	cmd = &amp;desc.params.get_cgu_dpll_status;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;dpll_num = dpll_num;</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='hunk'>@@ -5374,10 +5592,10 @@ ice_aq_set_cgu_dpll_config(struct ice_hw *hw, u8 dpll_num, u8 ref_state,</div><div class='ctx'> 			   u8 config, u8 eec_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_cgu_dpll_config *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_cgu_dpll_config);</div><div class='del'>-	cmd = &amp;desc.params.set_cgu_dpll_config;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;dpll_num = dpll_num;</div><div class='ctx'> 	cmd-&gt;ref_state = ref_state;</div><div class='ctx'> 	cmd-&gt;config = config;</div><div class='hunk'>@@ -5401,10 +5619,10 @@ ice_aq_set_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx,</div><div class='ctx'> 			u8 ref_priority)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_cgu_ref_prio *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_cgu_ref_prio);</div><div class='del'>-	cmd = &amp;desc.params.set_cgu_ref_prio;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;dpll_num = dpll_num;</div><div class='ctx'> 	cmd-&gt;ref_idx = ref_idx;</div><div class='ctx'> 	cmd-&gt;ref_priority = ref_priority;</div><div class='hunk'>@@ -5427,11 +5645,11 @@ ice_aq_get_cgu_ref_prio(struct ice_hw *hw, u8 dpll_num, u8 ref_idx,</div><div class='ctx'> 			u8 *ref_prio)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_cgu_ref_prio *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_cgu_ref_prio);</div><div class='del'>-	cmd = &amp;desc.params.get_cgu_ref_prio;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;dpll_num = dpll_num;</div><div class='ctx'> 	cmd-&gt;ref_idx = ref_idx;</div><div class='ctx'> </div><div class='hunk'>@@ -5457,11 +5675,11 @@ ice_aq_get_cgu_info(struct ice_hw *hw, u32 *cgu_id, u32 *cgu_cfg_ver,</div><div class='ctx'> 		    u32 *cgu_fw_ver)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_cgu_info *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_cgu_info);</div><div class='del'>-	cmd = &amp;desc.params.get_cgu_info;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='ctx'> 	if (!status) {</div><div class='hunk'>@@ -5488,11 +5706,11 @@ ice_aq_set_phy_rec_clk_out(struct ice_hw *hw, u8 phy_output, bool enable,</div><div class='ctx'> 			   u32 *freq)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_phy_rec_clk_out *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_phy_rec_clk_out);</div><div class='del'>-	cmd = &amp;desc.params.set_phy_rec_clk_out;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;phy_output = phy_output;</div><div class='ctx'> 	cmd-&gt;port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT;</div><div class='ctx'> 	cmd-&gt;flags = enable &amp; ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN;</div><div class='hunk'>@@ -5521,11 +5739,11 @@ ice_aq_get_phy_rec_clk_out(struct ice_hw *hw, u8 *phy_output, u8 *port_num,</div><div class='ctx'> 			   u8 *flags, u16 *node_handle)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_phy_rec_clk_out *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_phy_rec_clk_out);</div><div class='del'>-	cmd = &amp;desc.params.get_phy_rec_clk_out;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;phy_output = *phy_output;</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='hunk'>@@ -5553,11 +5771,11 @@ int ice_aq_get_sensor_reading(struct ice_hw *hw,</div><div class='ctx'> 			      struct ice_aqc_get_sensor_reading_resp *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_sensor_reading *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_sensor_reading);</div><div class='del'>-	cmd = &amp;desc.params.get_sensor_reading;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> #define ICE_INTERNAL_TEMP_SENSOR_FORMAT	0</div><div class='ctx'> #define ICE_INTERNAL_TEMP_SENSOR	0</div><div class='ctx'> 	cmd-&gt;sensor = ICE_INTERNAL_TEMP_SENSOR;</div><div class='hunk'>@@ -5565,7 +5783,7 @@ int ice_aq_get_sensor_reading(struct ice_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='ctx'> 	if (!status)</div><div class='del'>-		memcpy(data, &amp;desc.params.get_sensor_reading_resp,</div><div class='add'>+		memcpy(data, &amp;desc.params.raw,</div><div class='ctx'> 		       sizeof(*data));</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='hunk'>@@ -5762,13 +5980,13 @@ ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,</div><div class='ctx'> 		u16 bus_addr, __le16 addr, u8 params, u8 *data,</div><div class='ctx'> 		struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc = { 0 };</div><div class='add'>+	struct libie_aq_desc desc = { 0 };</div><div class='ctx'> 	struct ice_aqc_i2c *cmd;</div><div class='ctx'> 	u8 data_size;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_read_i2c);</div><div class='del'>-	cmd = &amp;desc.params.read_write_i2c;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	if (!data)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -5785,7 +6003,7 @@ ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,</div><div class='ctx'> 		struct ice_aqc_read_i2c_resp *resp;</div><div class='ctx'> 		u8 i;</div><div class='ctx'> </div><div class='del'>-		resp = &amp;desc.params.read_i2c_resp;</div><div class='add'>+		resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> 		for (i = 0; i &lt; data_size; i++) {</div><div class='ctx'> 			*data = resp-&gt;i2c_data[i];</div><div class='ctx'> 			data++;</div><div class='hunk'>@@ -5817,12 +6035,12 @@ ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,</div><div class='ctx'> 		 u16 bus_addr, __le16 addr, u8 params, const u8 *data,</div><div class='ctx'> 		 struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc = { 0 };</div><div class='add'>+	struct libie_aq_desc desc = { 0 };</div><div class='ctx'> 	struct ice_aqc_i2c *cmd;</div><div class='ctx'> 	u8 data_size;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_write_i2c);</div><div class='del'>-	cmd = &amp;desc.params.read_write_i2c;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	data_size = FIELD_GET(ICE_AQC_I2C_DATA_SIZE_M, params);</div><div class='ctx'> </div><div class='hunk'>@@ -5841,6 +6059,95 @@ ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_get_pca9575_handle - find and return the PCA9575 controller</div><div class='add'>+ * @hw: pointer to the hw struct</div><div class='add'>+ * @pca9575_handle: GPIO controller's handle</div><div class='add'>+ *</div><div class='add'>+ * Find and return the GPIO controller's handle in the netlist.</div><div class='add'>+ * When found - the value will be cached in the hw structure and following calls</div><div class='add'>+ * will return cached value.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -ENXIO when there's no PCA9575 present.</div><div class='add'>+ */</div><div class='add'>+int ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)</div><div class='add'>+{</div><div class='add'>+	struct ice_aqc_get_link_topo *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	int err;</div><div class='add'>+	u8 idx;</div><div class='add'>+</div><div class='add'>+	/* If handle was read previously return cached value */</div><div class='add'>+	if (hw-&gt;io_expander_handle) {</div><div class='add'>+		*pca9575_handle = hw-&gt;io_expander_handle;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define SW_PCA9575_SFP_TOPO_IDX		2</div><div class='add'>+#define SW_PCA9575_QSFP_TOPO_IDX	1</div><div class='add'>+</div><div class='add'>+	/* Check if the SW IO expander controlling SMA exists in the netlist. */</div><div class='add'>+	if (hw-&gt;device_id == ICE_DEV_ID_E810C_SFP)</div><div class='add'>+		idx = SW_PCA9575_SFP_TOPO_IDX;</div><div class='add'>+	else if (hw-&gt;device_id == ICE_DEV_ID_E810C_QSFP)</div><div class='add'>+		idx = SW_PCA9575_QSFP_TOPO_IDX;</div><div class='add'>+	else</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	/* If handle was not detected read it from the netlist */</div><div class='add'>+	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_link_topo);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	cmd-&gt;addr.topo_params.node_type_ctx =</div><div class='add'>+		ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL;</div><div class='add'>+	cmd-&gt;addr.topo_params.index = idx;</div><div class='add'>+</div><div class='add'>+	err = ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	/* Verify if we found the right IO expander type */</div><div class='add'>+	if (cmd-&gt;node_part_num != ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	/* If present save the handle and return it */</div><div class='add'>+	hw-&gt;io_expander_handle =</div><div class='add'>+		le16_to_cpu(cmd-&gt;addr.handle);</div><div class='add'>+	*pca9575_handle = hw-&gt;io_expander_handle;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_read_pca9575_reg - read the register from the PCA9575 controller</div><div class='add'>+ * @hw: pointer to the hw struct</div><div class='add'>+ * @offset: GPIO controller register offset</div><div class='add'>+ * @data: pointer to data to be read from the GPIO controller</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+int ice_read_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct ice_aqc_link_topo_addr link_topo;</div><div class='add'>+	__le16 addr;</div><div class='add'>+	u16 handle;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	memset(&amp;link_topo, 0, sizeof(link_topo));</div><div class='add'>+</div><div class='add'>+	err = ice_get_pca9575_handle(hw, &amp;handle);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	link_topo.handle = cpu_to_le16(handle);</div><div class='add'>+	link_topo.topo_params.node_type_ctx =</div><div class='add'>+		FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M,</div><div class='add'>+			   ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED);</div><div class='add'>+</div><div class='add'>+	addr = cpu_to_le16((u16)offset);</div><div class='add'>+</div><div class='add'>+	return ice_aq_read_i2c(hw, link_topo, 0, addr, 1, data, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_aq_set_gpio</div><div class='ctx'>  * @hw: pointer to the hw struct</div><div class='ctx'>  * @gpio_ctrl_handle: GPIO controller node handle</div><div class='hunk'>@@ -5854,11 +6161,11 @@ int</div><div class='ctx'> ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,</div><div class='ctx'> 		struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	struct ice_aqc_gpio *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_gpio);</div><div class='del'>-	cmd = &amp;desc.params.read_write_gpio;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle);</div><div class='ctx'> 	cmd-&gt;gpio_num = pin_idx;</div><div class='ctx'> 	cmd-&gt;gpio_val = value ? 1 : 0;</div><div class='hunk'>@@ -5881,12 +6188,12 @@ int</div><div class='ctx'> ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,</div><div class='ctx'> 		bool *value, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	struct ice_aqc_gpio *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_gpio);</div><div class='del'>-	cmd = &amp;desc.params.read_write_gpio;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle);</div><div class='ctx'> 	cmd-&gt;gpio_num = pin_idx;</div><div class='ctx'> </div><div class='hunk'>@@ -6023,6 +6330,44 @@ bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_is_fw_health_report_supported - checks if firmware supports health events</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Return: true if firmware supports health status reports,</div><div class='add'>+ * false otherwise</div><div class='add'>+ */</div><div class='add'>+bool ice_is_fw_health_report_supported(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	return ice_is_fw_api_min_ver(hw, ICE_FW_API_HEALTH_REPORT_MAJ,</div><div class='add'>+				     ICE_FW_API_HEALTH_REPORT_MIN,</div><div class='add'>+				     ICE_FW_API_HEALTH_REPORT_PATCH);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_aq_set_health_status_cfg - Configure FW health events</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @event_source: type of diagnostic events to enable</div><div class='add'>+ *</div><div class='add'>+ * Configure the health status event types that the firmware will send to this</div><div class='add'>+ * PF. The supported event types are: PF-specific, all PFs, and global.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+int ice_aq_set_health_status_cfg(struct ice_hw *hw, u8 event_source)</div><div class='add'>+{</div><div class='add'>+	struct ice_aqc_set_health_status_cfg *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_health_status_cfg);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;event_source = event_source;</div><div class='add'>+</div><div class='add'>+	return ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_aq_set_lldp_mib - Set the LLDP MIB</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='ctx'>  * @mib_type: Local, Remote or both Local and Remote MIBs</div><div class='hunk'>@@ -6037,16 +6382,16 @@ ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,</div><div class='ctx'> 		    struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_lldp_set_local_mib *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.lldp_set_mib;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	if (buf_size == 0 || !buf)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_lldp_set_local_mib);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16((u16)ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16((u16)LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	desc.datalen = cpu_to_le16(buf_size);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;type = mib_type;</div><div class='hunk'>@@ -6072,16 +6417,22 @@ bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw)</div><div class='ctx'> /**</div><div class='ctx'>  * ice_lldp_fltr_add_remove - add or remove a LLDP Rx switch filter</div><div class='ctx'>  * @hw: pointer to HW struct</div><div class='del'>- * @vsi_num: absolute HW index for VSI</div><div class='add'>+ * @vsi: VSI to add the filter to</div><div class='ctx'>  * @add: boolean for if adding or removing a filter</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -EOPNOTSUPP if the operation cannot be performed</div><div class='add'>+ *	   with this HW or VSI, otherwise an error corresponding to</div><div class='add'>+ *	   the AQ transaction result.</div><div class='ctx'>  */</div><div class='del'>-int</div><div class='del'>-ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add)</div><div class='add'>+int ice_lldp_fltr_add_remove(struct ice_hw *hw, struct ice_vsi *vsi, bool add)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_lldp_filter_ctrl *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.lldp_filter_ctrl;</div><div class='add'>+	if (vsi-&gt;type != ICE_VSI_PF || !ice_fw_supports_lldp_fltr_ctrl(hw))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_lldp_filter_ctrl);</div><div class='ctx'> </div><div class='hunk'>@@ -6090,7 +6441,7 @@ ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add)</div><div class='ctx'> 	else</div><div class='ctx'> 		cmd-&gt;cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_DELETE;</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;vsi_num = cpu_to_le16(vsi_num);</div><div class='add'>+	cmd-&gt;vsi_num = cpu_to_le16(vsi-&gt;vsi_num);</div><div class='ctx'> </div><div class='ctx'> 	return ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='ctx'> }</div><div class='hunk'>@@ -6101,7 +6452,7 @@ ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add)</div><div class='ctx'>  */</div><div class='ctx'> int ice_lldp_execute_pending_mib(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_lldp_execute_pending_mib);</div><div class='ctx'> </div><div class='hunk'>@@ -6157,3 +6508,86 @@ u32 ice_get_link_speed(u16 index)</div><div class='ctx'> </div><div class='ctx'> 	return ice_aq_to_link_speed[index];</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_get_dest_cgu - get destination CGU dev for given HW</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Get CGU client id for CGU register read/write operations.</div><div class='add'>+ *</div><div class='add'>+ * Return: CGU device id to use in SBQ transactions.</div><div class='add'>+ */</div><div class='add'>+static enum ice_sbq_dev_id ice_get_dest_cgu(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	/* On dual complex E825 only complex 0 has functional CGU powering all</div><div class='add'>+	 * the PHYs.</div><div class='add'>+	 * SBQ destination device cgu points to CGU on a current complex and to</div><div class='add'>+	 * access primary CGU from the secondary complex, the driver should use</div><div class='add'>+	 * cgu_peer as a destination device.</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;mac_type == ICE_MAC_GENERIC_3K_E825 &amp;&amp; ice_is_dual(hw) &amp;&amp;</div><div class='add'>+	    !ice_is_primary(hw))</div><div class='add'>+		return ice_sbq_dev_cgu_peer;</div><div class='add'>+	return ice_sbq_dev_cgu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_read_cgu_reg - Read a CGU register</div><div class='add'>+ * @hw: Pointer to the HW struct</div><div class='add'>+ * @addr: Register address to read</div><div class='add'>+ * @val: Storage for register value read</div><div class='add'>+ *</div><div class='add'>+ * Read the contents of a register of the Clock Generation Unit. Only</div><div class='add'>+ * applicable to E82X devices.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, other error codes when failed to read from CGU.</div><div class='add'>+ */</div><div class='add'>+int ice_read_cgu_reg(struct ice_hw *hw, u32 addr, u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct ice_sbq_msg_input cgu_msg = {</div><div class='add'>+		.dest_dev = ice_get_dest_cgu(hw),</div><div class='add'>+		.opcode = ice_sbq_msg_rd,</div><div class='add'>+		.msg_addr_low = addr</div><div class='add'>+	};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ice_sbq_rw_reg(hw, &amp;cgu_msg, LIBIE_AQ_FLAG_RD);</div><div class='add'>+	if (err) {</div><div class='add'>+		ice_debug(hw, ICE_DBG_PTP, "Failed to read CGU register 0x%04x, err %d\n",</div><div class='add'>+			  addr, err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = cgu_msg.data;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_write_cgu_reg - Write a CGU register</div><div class='add'>+ * @hw: Pointer to the HW struct</div><div class='add'>+ * @addr: Register address to write</div><div class='add'>+ * @val: Value to write into the register</div><div class='add'>+ *</div><div class='add'>+ * Write the specified value to a register of the Clock Generation Unit. Only</div><div class='add'>+ * applicable to E82X devices.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, other error codes when failed to write to CGU.</div><div class='add'>+ */</div><div class='add'>+int ice_write_cgu_reg(struct ice_hw *hw, u32 addr, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct ice_sbq_msg_input cgu_msg = {</div><div class='add'>+		.dest_dev = ice_get_dest_cgu(hw),</div><div class='add'>+		.opcode = ice_sbq_msg_wr,</div><div class='add'>+		.msg_addr_low = addr,</div><div class='add'>+		.data = val</div><div class='add'>+	};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ice_sbq_rw_reg(hw, &amp;cgu_msg, LIBIE_AQ_FLAG_RD);</div><div class='add'>+	if (err)</div><div class='add'>+		ice_debug(hw, ICE_DBG_PTP, "Failed to write CGU register 0x%04x, err %d\n",</div><div class='add'>+			  addr, err);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h<br/>index 27208a60cece..e700ac0dc347 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_common.h</a></div><div class='hunk'>@@ -39,6 +39,47 @@</div><div class='ctx'> #define FEC_RECEIVER_ID_PCS0 (0x33 &lt;&lt; FEC_RECV_ID_SHIFT)</div><div class='ctx'> #define FEC_RECEIVER_ID_PCS1 (0x34 &lt;&lt; FEC_RECV_ID_SHIFT)</div><div class='ctx'> </div><div class='add'>+#define ICE_CGU_R9			0x24</div><div class='add'>+#define ICE_CGU_R9_TIME_REF_FREQ_SEL	GENMASK(2, 0)</div><div class='add'>+#define ICE_CGU_R9_CLK_EREF0_EN		BIT(4)</div><div class='add'>+#define ICE_CGU_R9_TIME_REF_EN		BIT(5)</div><div class='add'>+#define ICE_CGU_R9_TIME_SYNC_EN		BIT(6)</div><div class='add'>+#define ICE_CGU_R9_ONE_PPS_OUT_EN	BIT(7)</div><div class='add'>+#define ICE_CGU_R9_ONE_PPS_OUT_AMP	GENMASK(19, 18)</div><div class='add'>+</div><div class='add'>+#define ICE_CGU_R16			0x40</div><div class='add'>+#define ICE_CGU_R16_TSPLL_CK_REFCLKFREQ	GENMASK(31, 24)</div><div class='add'>+</div><div class='add'>+#define ICE_CGU_R19			0x4C</div><div class='add'>+#define ICE_CGU_R19_TSPLL_FBDIV_INTGR_E82X	GENMASK(7, 0)</div><div class='add'>+#define ICE_CGU_R19_TSPLL_FBDIV_INTGR_E825	GENMASK(9, 0)</div><div class='add'>+#define ICE_CGU_R19_TSPLL_NDIVRATIO	GENMASK(19, 16)</div><div class='add'>+</div><div class='add'>+#define ICE_CGU_R22			0x58</div><div class='add'>+#define ICE_CGU_R22_TIME1588CLK_DIV	GENMASK(23, 20)</div><div class='add'>+#define ICE_CGU_R22_TIME1588CLK_DIV2	BIT(30)</div><div class='add'>+</div><div class='add'>+#define ICE_CGU_R23			0x5C</div><div class='add'>+#define ICE_CGU_R24			0x60</div><div class='add'>+#define ICE_CGU_R24_FBDIV_FRAC		GENMASK(21, 0)</div><div class='add'>+#define ICE_CGU_R23_R24_TSPLL_ENABLE	BIT(24)</div><div class='add'>+#define ICE_CGU_R23_R24_REF1588_CK_DIV	GENMASK(30, 27)</div><div class='add'>+#define ICE_CGU_R23_R24_TIME_REF_SEL	BIT(31)</div><div class='add'>+</div><div class='add'>+#define ICE_CGU_BW_TDC			0x31C</div><div class='add'>+#define ICE_CGU_BW_TDC_PLLLOCK_SEL	GENMASK(30, 29)</div><div class='add'>+</div><div class='add'>+#define ICE_CGU_RO_LOCK			0x3F0</div><div class='add'>+#define ICE_CGU_RO_LOCK_TRUE_LOCK	BIT(12)</div><div class='add'>+#define ICE_CGU_RO_LOCK_UNLOCK		BIT(13)</div><div class='add'>+</div><div class='add'>+#define ICE_CGU_CNTR_BIST		0x344</div><div class='add'>+#define ICE_CGU_CNTR_BIST_PLLLOCK_SEL_0	BIT(15)</div><div class='add'>+#define ICE_CGU_CNTR_BIST_PLLLOCK_SEL_1	BIT(16)</div><div class='add'>+</div><div class='add'>+#define ICE_CGU_RO_BWM_LF		0x370</div><div class='add'>+#define ICE_CGU_RO_BWM_LF_TRUE_LOCK	BIT(12)</div><div class='add'>+</div><div class='ctx'> int ice_init_hw(struct ice_hw *hw);</div><div class='ctx'> void ice_deinit_hw(struct ice_hw *hw);</div><div class='ctx'> int ice_check_reset(struct ice_hw *hw);</div><div class='hunk'>@@ -68,7 +109,7 @@ bool ice_is_sbq_supported(struct ice_hw *hw);</div><div class='ctx'> struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw);</div><div class='ctx'> int</div><div class='ctx'> ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='del'>-		struct ice_aq_desc *desc, void *buf, u16 buf_size,</div><div class='add'>+		struct libie_aq_desc *desc, void *buf, u16 buf_size,</div><div class='ctx'> 		struct ice_sq_cd *cd);</div><div class='ctx'> void ice_clear_pxe_mode(struct ice_hw *hw);</div><div class='ctx'> int ice_get_caps(struct ice_hw *hw);</div><div class='hunk'>@@ -77,6 +118,12 @@ void ice_set_safe_mode_caps(struct ice_hw *hw);</div><div class='ctx'> </div><div class='ctx'> int ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,</div><div class='ctx'> 		      u32 rxq_index);</div><div class='add'>+int ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,</div><div class='add'>+		     u32 rxq_index);</div><div class='add'>+int ice_read_txq_ctx(struct ice_hw *hw, struct ice_tlan_ctx *tlan_ctx,</div><div class='add'>+		     u32 txq_index);</div><div class='add'>+int ice_write_txq_ctx(struct ice_hw *hw, struct ice_tlan_ctx *tlan_ctx,</div><div class='add'>+		      u32 txq_index);</div><div class='ctx'> </div><div class='ctx'> int</div><div class='ctx'> ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params);</div><div class='hunk'>@@ -91,15 +138,14 @@ ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,</div><div class='ctx'> </div><div class='ctx'> bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);</div><div class='ctx'> int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);</div><div class='del'>-void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);</div><div class='del'>-extern const struct ice_ctx_ele ice_tlan_ctx_info[];</div><div class='del'>-int ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,</div><div class='del'>-		const struct ice_ctx_ele *ce_info);</div><div class='add'>+void ice_fill_dflt_direct_cmd_desc(struct libie_aq_desc *desc, u16 opcode);</div><div class='add'>+</div><div class='add'>+void ice_pack_txq_ctx(const struct ice_tlan_ctx *ctx, ice_txq_ctx_buf_t *buf);</div><div class='ctx'> </div><div class='ctx'> extern struct mutex ice_global_cfg_lock_sw;</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,</div><div class='add'>+ice_aq_send_cmd(struct ice_hw *hw, struct libie_aq_desc *desc,</div><div class='ctx'> 		void *buf, u16 buf_size, struct ice_sq_cd *cd);</div><div class='ctx'> int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);</div><div class='ctx'> </div><div class='hunk'>@@ -113,7 +159,6 @@ int</div><div class='ctx'> ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,</div><div class='ctx'> 		    struct ice_aqc_get_phy_caps_data *caps,</div><div class='ctx'> 		    struct ice_sq_cd *cd);</div><div class='del'>-bool ice_is_pf_c827(struct ice_hw *hw);</div><div class='ctx'> bool ice_is_phy_rclk_in_netlist(struct ice_hw *hw);</div><div class='ctx'> bool ice_is_clock_mux_in_netlist(struct ice_hw *hw);</div><div class='ctx'> bool ice_is_cgu_in_netlist(struct ice_hw *hw);</div><div class='hunk'>@@ -133,7 +178,6 @@ int</div><div class='ctx'> ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,</div><div class='ctx'> 			struct ice_sq_cd *cd);</div><div class='ctx'> bool ice_is_generic_mac(struct ice_hw *hw);</div><div class='del'>-bool ice_is_e810(struct ice_hw *hw);</div><div class='ctx'> int ice_clear_pf_cfg(struct ice_hw *hw);</div><div class='ctx'> int</div><div class='ctx'> ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,</div><div class='hunk'>@@ -143,6 +187,8 @@ int</div><div class='ctx'> ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,</div><div class='ctx'> 			      struct ice_port_info *pi);</div><div class='ctx'> bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);</div><div class='add'>+bool ice_is_fw_health_report_supported(struct ice_hw *hw);</div><div class='add'>+int ice_aq_set_health_status_cfg(struct ice_hw *hw, u8 event_source);</div><div class='ctx'> int ice_aq_get_phy_equalization(struct ice_hw *hw, u16 data_in, u16 op_code,</div><div class='ctx'> 				u8 serdes_num, int *output);</div><div class='ctx'> int</div><div class='hunk'>@@ -193,6 +239,7 @@ ice_aq_get_port_options(struct ice_hw *hw,</div><div class='ctx'> int</div><div class='ctx'> ice_aq_set_port_option(struct ice_hw *hw, u8 lport, u8 lport_valid,</div><div class='ctx'> 		       u8 new_option);</div><div class='add'>+int ice_get_phy_lane_number(struct ice_hw *hw);</div><div class='ctx'> int</div><div class='ctx'> ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,</div><div class='ctx'> 		  u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,</div><div class='hunk'>@@ -223,12 +270,21 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,</div><div class='ctx'> int</div><div class='ctx'> ice_aq_cfg_lan_txq(struct ice_hw *hw, struct ice_aqc_cfg_txqs_buf *buf,</div><div class='ctx'> 		   u16 buf_size, u16 num_qs, u8 oldport, u8 newport,</div><div class='del'>-		   struct ice_sq_cd *cd);</div><div class='add'>+		   u8 mode, struct ice_sq_cd *cd);</div><div class='ctx'> int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);</div><div class='ctx'> void ice_replay_post(struct ice_hw *hw);</div><div class='ctx'> struct ice_q_ctx *</div><div class='ctx'> ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);</div><div class='add'>+int</div><div class='add'>+ice_aq_set_txtimeq(struct ice_hw *hw, u16 txtimeq, u8 q_count,</div><div class='add'>+		   struct ice_aqc_set_txtime_qgrp *txtime_qg,</div><div class='add'>+		   u16 buf_size, struct ice_sq_cd *cd);</div><div class='add'>+void ice_pack_txtime_ctx(const struct ice_txtime_ctx *ctx,</div><div class='add'>+			 ice_txtime_ctx_buf_t *buf);</div><div class='ctx'> int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in, u16 flag);</div><div class='add'>+int ice_aq_get_cgu_input_pin_measure(struct ice_hw *hw, u8 dpll_idx,</div><div class='add'>+				     struct ice_cgu_input_measure *meas,</div><div class='add'>+				     u16 meas_num);</div><div class='ctx'> int</div><div class='ctx'> ice_aq_get_cgu_abilities(struct ice_hw *hw,</div><div class='ctx'> 			 struct ice_aqc_get_cgu_abilities *abilities);</div><div class='hunk'>@@ -275,10 +331,6 @@ ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,</div><div class='ctx'> void</div><div class='ctx'> ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,</div><div class='ctx'> 		  u64 *prev_stat, u64 *cur_stat);</div><div class='del'>-bool ice_is_e810t(struct ice_hw *hw);</div><div class='del'>-bool ice_is_e822(struct ice_hw *hw);</div><div class='del'>-bool ice_is_e823(struct ice_hw *hw);</div><div class='del'>-bool ice_is_e825c(struct ice_hw *hw);</div><div class='ctx'> int</div><div class='ctx'> ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,</div><div class='ctx'> 		     struct ice_aqc_txsched_elem_data *buf);</div><div class='hunk'>@@ -294,8 +346,7 @@ int</div><div class='ctx'> ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,</div><div class='ctx'> 		    struct ice_sq_cd *cd);</div><div class='ctx'> bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);</div><div class='del'>-int</div><div class='del'>-ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);</div><div class='add'>+int ice_lldp_fltr_add_remove(struct ice_hw *hw, struct ice_vsi *vsi, bool add);</div><div class='ctx'> int ice_lldp_execute_pending_mib(struct ice_hw *hw);</div><div class='ctx'> int</div><div class='ctx'> ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,</div><div class='hunk'>@@ -305,5 +356,9 @@ int</div><div class='ctx'> ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,</div><div class='ctx'> 		 u16 bus_addr, __le16 addr, u8 params, const u8 *data,</div><div class='ctx'> 		 struct ice_sq_cd *cd);</div><div class='add'>+int ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle);</div><div class='add'>+int ice_read_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data);</div><div class='ctx'> bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw);</div><div class='add'>+int ice_read_cgu_reg(struct ice_hw *hw, u32 addr, u32 *val);</div><div class='add'>+int ice_write_cgu_reg(struct ice_hw *hw, u32 addr, u32 val);</div><div class='ctx'> #endif /* _ICE_COMMON_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_controlq.c b/drivers/net/ethernet/intel/ice/ice_controlq.c<br/>index e3959ad442a2..dcb837cadd18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_controlq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_controlq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_controlq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_controlq.c</a></div><div class='hunk'>@@ -90,7 +90,7 @@ bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq)</div><div class='ctx'> static int</div><div class='ctx'> ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)</div><div class='ctx'> {</div><div class='del'>-	size_t size = cq-&gt;num_sq_entries * sizeof(struct ice_aq_desc);</div><div class='add'>+	size_t size = cq-&gt;num_sq_entries * sizeof(struct libie_aq_desc);</div><div class='ctx'> </div><div class='ctx'> 	cq-&gt;sq.desc_buf.va = dmam_alloc_coherent(ice_hw_to_dev(hw), size,</div><div class='ctx'> 						 &amp;cq-&gt;sq.desc_buf.pa,</div><div class='hunk'>@@ -110,7 +110,7 @@ ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)</div><div class='ctx'> static int</div><div class='ctx'> ice_alloc_ctrlq_rq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)</div><div class='ctx'> {</div><div class='del'>-	size_t size = cq-&gt;num_rq_entries * sizeof(struct ice_aq_desc);</div><div class='add'>+	size_t size = cq-&gt;num_rq_entries * sizeof(struct libie_aq_desc);</div><div class='ctx'> </div><div class='ctx'> 	cq-&gt;rq.desc_buf.va = dmam_alloc_coherent(ice_hw_to_dev(hw), size,</div><div class='ctx'> 						 &amp;cq-&gt;rq.desc_buf.pa,</div><div class='hunk'>@@ -159,7 +159,7 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)</div><div class='ctx'> </div><div class='ctx'> 	/* allocate the mapped buffers */</div><div class='ctx'> 	for (i = 0; i &lt; cq-&gt;num_rq_entries; i++) {</div><div class='del'>-		struct ice_aq_desc *desc;</div><div class='add'>+		struct libie_aq_desc *desc;</div><div class='ctx'> 		struct ice_dma_mem *bi;</div><div class='ctx'> </div><div class='ctx'> 		bi = &amp;cq-&gt;rq.r.rq_bi[i];</div><div class='hunk'>@@ -173,9 +173,9 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)</div><div class='ctx'> 		/* now configure the descriptors for use */</div><div class='ctx'> 		desc = ICE_CTL_Q_DESC(cq-&gt;rq, i);</div><div class='ctx'> </div><div class='del'>-		desc-&gt;flags = cpu_to_le16(ICE_AQ_FLAG_BUF);</div><div class='del'>-		if (cq-&gt;rq_buf_size &gt; ICE_AQ_LG_BUF)</div><div class='del'>-			desc-&gt;flags |= cpu_to_le16(ICE_AQ_FLAG_LB);</div><div class='add'>+		desc-&gt;flags = cpu_to_le16(LIBIE_AQ_FLAG_BUF);</div><div class='add'>+		if (cq-&gt;rq_buf_size &gt; LIBIE_AQ_LG_BUF)</div><div class='add'>+			desc-&gt;flags |= cpu_to_le16(LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 		desc-&gt;opcode = 0;</div><div class='ctx'> 		/* This is in accordance with control queue design, there is no</div><div class='ctx'> 		 * register for buffer size configuration</div><div class='hunk'>@@ -858,7 +858,7 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_ctl_q_ring *sq = &amp;cq-&gt;sq;</div><div class='ctx'> 	u16 ntc = sq-&gt;next_to_clean;</div><div class='del'>-	struct ice_aq_desc *desc;</div><div class='add'>+	struct libie_aq_desc *desc;</div><div class='ctx'> </div><div class='ctx'> 	desc = ICE_CTL_Q_DESC(*sq, ntc);</div><div class='ctx'> </div><div class='hunk'>@@ -912,7 +912,7 @@ static const char *ice_ctl_q_str(enum ice_ctl_q qtype)</div><div class='ctx'> static void ice_debug_cq(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='ctx'> 			 void *desc, void *buf, u16 buf_len, bool response)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc *cq_desc = desc;</div><div class='add'>+	struct libie_aq_desc *cq_desc = desc;</div><div class='ctx'> 	u16 datalen, flags;</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_DYNAMIC_DEBUG) &amp;&amp;</div><div class='hunk'>@@ -939,7 +939,8 @@ static void ice_debug_cq(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='ctx'> 	 * by the DD and/or CMP flag set or a command with the RD flag set.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (buf &amp;&amp; cq_desc-&gt;datalen &amp;&amp;</div><div class='del'>-	    (flags &amp; (ICE_AQ_FLAG_DD | ICE_AQ_FLAG_CMP | ICE_AQ_FLAG_RD))) {</div><div class='add'>+	    (flags &amp; (LIBIE_AQ_FLAG_DD | LIBIE_AQ_FLAG_CMP |</div><div class='add'>+		      LIBIE_AQ_FLAG_RD))) {</div><div class='ctx'> 		char prefix[] = KBUILD_MODNAME " 0x12341234 0x12341234 ";</div><div class='ctx'> </div><div class='ctx'> 		sprintf(prefix, KBUILD_MODNAME " 0x%08X 0x%08X ",</div><div class='hunk'>@@ -992,11 +993,11 @@ static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='ctx'> ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='del'>-		struct ice_aq_desc *desc, void *buf, u16 buf_size,</div><div class='add'>+		struct libie_aq_desc *desc, void *buf, u16 buf_size,</div><div class='ctx'> 		struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_dma_mem *dma_buf = NULL;</div><div class='del'>-	struct ice_aq_desc *desc_on_ring;</div><div class='add'>+	struct libie_aq_desc *desc_on_ring;</div><div class='ctx'> 	bool cmd_completed = false;</div><div class='ctx'> 	int status = 0;</div><div class='ctx'> 	u16 retval = 0;</div><div class='hunk'>@@ -1007,7 +1008,7 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	mutex_lock(&amp;cq-&gt;sq_lock);</div><div class='ctx'> </div><div class='del'>-	cq-&gt;sq_last_status = ICE_AQ_RC_OK;</div><div class='add'>+	cq-&gt;sq_last_status = LIBIE_AQ_RC_OK;</div><div class='ctx'> </div><div class='ctx'> 	if (!cq-&gt;sq.count) {</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send queue not initialized.\n");</div><div class='hunk'>@@ -1028,9 +1029,9 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='ctx'> 			goto sq_send_command_error;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		desc-&gt;flags |= cpu_to_le16(ICE_AQ_FLAG_BUF);</div><div class='del'>-		if (buf_size &gt; ICE_AQ_LG_BUF)</div><div class='del'>-			desc-&gt;flags |= cpu_to_le16(ICE_AQ_FLAG_LB);</div><div class='add'>+		desc-&gt;flags |= cpu_to_le16(LIBIE_AQ_FLAG_BUF);</div><div class='add'>+		if (buf_size &gt; LIBIE_AQ_LG_BUF)</div><div class='add'>+			desc-&gt;flags |= cpu_to_le16(LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	val = rd32(hw, cq-&gt;sq.head);</div><div class='hunk'>@@ -1112,9 +1113,9 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='ctx'> 			retval &amp;= 0xff;</div><div class='ctx'> 		}</div><div class='ctx'> 		cmd_completed = true;</div><div class='del'>-		if (!status &amp;&amp; retval != ICE_AQ_RC_OK)</div><div class='add'>+		if (!status &amp;&amp; retval != LIBIE_AQ_RC_OK)</div><div class='ctx'> 			status = -EIO;</div><div class='del'>-		cq-&gt;sq_last_status = (enum ice_aq_err)retval;</div><div class='add'>+		cq-&gt;sq_last_status = (enum libie_aq_err)retval;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ice_debug(hw, ICE_DBG_AQ_MSG, "ATQ: desc and buffer writeback:\n");</div><div class='hunk'>@@ -1149,12 +1150,12 @@ sq_send_command_error:</div><div class='ctx'>  *</div><div class='ctx'>  * Fill the desc with default values</div><div class='ctx'>  */</div><div class='del'>-void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode)</div><div class='add'>+void ice_fill_dflt_direct_cmd_desc(struct libie_aq_desc *desc, u16 opcode)</div><div class='ctx'> {</div><div class='ctx'> 	/* zero out the desc */</div><div class='ctx'> 	memset(desc, 0, sizeof(*desc));</div><div class='ctx'> 	desc-&gt;opcode = cpu_to_le16(opcode);</div><div class='del'>-	desc-&gt;flags = cpu_to_le16(ICE_AQ_FLAG_SI);</div><div class='add'>+	desc-&gt;flags = cpu_to_le16(LIBIE_AQ_FLAG_SI);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1172,9 +1173,9 @@ int</div><div class='ctx'> ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='ctx'> 		  struct ice_rq_event_info *e, u16 *pending)</div><div class='ctx'> {</div><div class='add'>+	enum libie_aq_err rq_last_status;</div><div class='ctx'> 	u16 ntc = cq-&gt;rq.next_to_clean;</div><div class='del'>-	enum ice_aq_err rq_last_status;</div><div class='del'>-	struct ice_aq_desc *desc;</div><div class='add'>+	struct libie_aq_desc *desc;</div><div class='ctx'> 	struct ice_dma_mem *bi;</div><div class='ctx'> 	int ret_code = 0;</div><div class='ctx'> 	u16 desc_idx;</div><div class='hunk'>@@ -1207,9 +1208,9 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='ctx'> 	desc = ICE_CTL_Q_DESC(cq-&gt;rq, ntc);</div><div class='ctx'> 	desc_idx = ntc;</div><div class='ctx'> </div><div class='del'>-	rq_last_status = (enum ice_aq_err)le16_to_cpu(desc-&gt;retval);</div><div class='add'>+	rq_last_status = (enum libie_aq_err)le16_to_cpu(desc-&gt;retval);</div><div class='ctx'> 	flags = le16_to_cpu(desc-&gt;flags);</div><div class='del'>-	if (flags &amp; ICE_AQ_FLAG_ERR) {</div><div class='add'>+	if (flags &amp; LIBIE_AQ_FLAG_ERR) {</div><div class='ctx'> 		ret_code = -EIO;</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive Queue Event 0x%04X received with error 0x%X\n",</div><div class='ctx'> 			  le16_to_cpu(desc-&gt;opcode), rq_last_status);</div><div class='hunk'>@@ -1230,9 +1231,9 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,</div><div class='ctx'> 	bi = &amp;cq-&gt;rq.r.rq_bi[ntc];</div><div class='ctx'> 	memset(desc, 0, sizeof(*desc));</div><div class='ctx'> </div><div class='del'>-	desc-&gt;flags = cpu_to_le16(ICE_AQ_FLAG_BUF);</div><div class='del'>-	if (cq-&gt;rq_buf_size &gt; ICE_AQ_LG_BUF)</div><div class='del'>-		desc-&gt;flags |= cpu_to_le16(ICE_AQ_FLAG_LB);</div><div class='add'>+	desc-&gt;flags = cpu_to_le16(LIBIE_AQ_FLAG_BUF);</div><div class='add'>+	if (cq-&gt;rq_buf_size &gt; LIBIE_AQ_LG_BUF)</div><div class='add'>+		desc-&gt;flags |= cpu_to_le16(LIBIE_AQ_FLAG_LB);</div><div class='ctx'> 	desc-&gt;datalen = cpu_to_le16(bi-&gt;size);</div><div class='ctx'> 	desc-&gt;params.generic.addr_high = cpu_to_le32(upper_32_bits(bi-&gt;pa));</div><div class='ctx'> 	desc-&gt;params.generic.addr_low = cpu_to_le32(lower_32_bits(bi-&gt;pa));</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_controlq.h b/drivers/net/ethernet/intel/ice/ice_controlq.h<br/>index ca97b7365a1b..788040dd662e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_controlq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_controlq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_controlq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_controlq.h</a></div><div class='hunk'>@@ -12,7 +12,7 @@</div><div class='ctx'> #define ICE_SBQ_MAX_BUF_LEN 512</div><div class='ctx'> </div><div class='ctx'> #define ICE_CTL_Q_DESC(R, i) \</div><div class='del'>-	(&amp;(((struct ice_aq_desc *)((R).desc_buf.va))[i]))</div><div class='add'>+	(&amp;(((struct libie_aq_desc *)((R).desc_buf.va))[i]))</div><div class='ctx'> </div><div class='ctx'> #define ICE_CTL_Q_DESC_UNUSED(R) \</div><div class='ctx'> 	((u16)((((R)-&gt;next_to_clean &gt; (R)-&gt;next_to_use) ? 0 : (R)-&gt;count) + \</div><div class='hunk'>@@ -76,12 +76,12 @@ struct ice_ctl_q_ring {</div><div class='ctx'> </div><div class='ctx'> /* sq transaction details */</div><div class='ctx'> struct ice_sq_cd {</div><div class='del'>-	struct ice_aq_desc *wb_desc;</div><div class='add'>+	struct libie_aq_desc *wb_desc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* rq event information */</div><div class='ctx'> struct ice_rq_event_info {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 msg_len;</div><div class='ctx'> 	u16 buf_len;</div><div class='ctx'> 	u8 *msg_buf;</div><div class='hunk'>@@ -96,7 +96,7 @@ struct ice_ctl_q_info {</div><div class='ctx'> 	u16 num_sq_entries;		/* send queue depth */</div><div class='ctx'> 	u16 rq_buf_size;		/* receive queue buffer size */</div><div class='ctx'> 	u16 sq_buf_size;		/* send queue buffer size */</div><div class='del'>-	enum ice_aq_err sq_last_status;	/* last status on send queue */</div><div class='add'>+	enum libie_aq_err sq_last_status;	/* last status on send queue */</div><div class='ctx'> 	struct mutex sq_lock;		/* Send queue lock */</div><div class='ctx'> 	struct mutex rq_lock;		/* Receive queue lock */</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_dcb.c b/drivers/net/ethernet/intel/ice/ice_dcb.c<br/>index 74418c445cc4..abea84f14658 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dcb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dcb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dcb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_dcb.c</a></div><div class='hunk'>@@ -24,10 +24,10 @@ ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,</div><div class='ctx'> 		    struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_lldp_get_mib *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.lldp_get_mib;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	if (buf_size == 0 || !buf)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -64,9 +64,9 @@ ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,</div><div class='ctx'> 			   struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_lldp_set_mib_change *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.lldp_set_event;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_lldp_set_mib_change);</div><div class='ctx'> </div><div class='hunk'>@@ -95,9 +95,9 @@ ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent, bool persist,</div><div class='ctx'> 		 struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_lldp_stop *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.lldp_stop;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_lldp_stop);</div><div class='ctx'> </div><div class='hunk'>@@ -121,9 +121,9 @@ ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent, bool persist,</div><div class='ctx'> int ice_aq_start_lldp(struct ice_hw *hw, bool persist, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_lldp_start *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.lldp_start;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_lldp_start);</div><div class='ctx'> </div><div class='hunk'>@@ -677,11 +677,11 @@ ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,</div><div class='ctx'> 		       bool *dcbx_agent_status, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_lldp_stop_start_specific_agent *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 opcode;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.lldp_agent_ctrl;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	opcode = ice_aqc_opc_lldp_stop_start_specific_agent;</div><div class='ctx'> </div><div class='hunk'>@@ -714,7 +714,7 @@ ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,</div><div class='ctx'> 		       struct ice_aqc_get_cee_dcb_cfg_resp *buff,</div><div class='ctx'> 		       struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_cee_dcb_cfg);</div><div class='ctx'> </div><div class='hunk'>@@ -733,13 +733,13 @@ ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,</div><div class='ctx'> int ice_aq_set_pfc_mode(struct ice_hw *hw, u8 pfc_mode, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_set_query_pfc_mode *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (pfc_mode &gt; ICE_AQC_PFC_DSCP_BASED_PFC)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.set_query_pfc_mode;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_pfc_mode);</div><div class='ctx'> </div><div class='hunk'>@@ -914,7 +914,7 @@ static int ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)</div><div class='ctx'> 	ret = ice_aq_get_dcb_cfg(pi-&gt;hw, ICE_AQ_LLDP_MIB_REMOTE,</div><div class='ctx'> 				 ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);</div><div class='ctx'> 	/* Don't treat ENOENT as an error for Remote MIBs */</div><div class='del'>-	if (pi-&gt;hw-&gt;adminq.sq_last_status == ICE_AQ_RC_ENOENT)</div><div class='add'>+	if (pi-&gt;hw-&gt;adminq.sq_last_status == LIBIE_AQ_RC_ENOENT)</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -941,7 +941,7 @@ int ice_get_dcb_cfg(struct ice_port_info *pi)</div><div class='ctx'> 		/* CEE mode */</div><div class='ctx'> 		ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);</div><div class='ctx'> 		ice_cee_to_dcb_cfg(&amp;cee_cfg, pi);</div><div class='del'>-	} else if (pi-&gt;hw-&gt;adminq.sq_last_status == ICE_AQ_RC_ENOENT) {</div><div class='add'>+	} else if (pi-&gt;hw-&gt;adminq.sq_last_status == LIBIE_AQ_RC_ENOENT) {</div><div class='ctx'> 		/* CEE mode not enabled try querying IEEE data */</div><div class='ctx'> 		dcbx_cfg = &amp;pi-&gt;qos_cfg.local_dcbx_cfg;</div><div class='ctx'> 		dcbx_cfg-&gt;dcbx_mode = ICE_DCBX_MODE_IEEE;</div><div class='hunk'>@@ -965,7 +965,7 @@ void ice_get_dcb_cfg_from_mib_change(struct ice_port_info *pi,</div><div class='ctx'> 	struct ice_aqc_lldp_get_mib *mib;</div><div class='ctx'> 	u8 change_type, dcbx_mode;</div><div class='ctx'> </div><div class='del'>-	mib = (struct ice_aqc_lldp_get_mib *)&amp;event-&gt;desc.params.raw;</div><div class='add'>+	mib = libie_aq_raw(&amp;event-&gt;desc);</div><div class='ctx'> </div><div class='ctx'> 	change_type = FIELD_GET(ICE_AQ_LLDP_MIB_TYPE_M, mib-&gt;type);</div><div class='ctx'> 	if (change_type == ICE_AQ_LLDP_MIB_REMOTE)</div><div class='hunk'>@@ -1288,7 +1288,7 @@ ice_add_dscp_up_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)</div><div class='ctx'> 	tlv-&gt;ouisubtype = htonl(ouisubtype);</div><div class='ctx'> </div><div class='ctx'> 	/* bytes 0 - 63 - IPv4 DSCP2UP LUT */</div><div class='del'>-	for (i = 0; i &lt; ICE_DSCP_NUM_VAL; i++) {</div><div class='add'>+	for (i = 0; i &lt; DSCP_MAX; i++) {</div><div class='ctx'> 		/* IPv4 mapping */</div><div class='ctx'> 		buf[i] = dcbcfg-&gt;dscp_map[i];</div><div class='ctx'> 		/* IPv6 mapping */</div><div class='hunk'>@@ -1537,12 +1537,12 @@ ice_aq_query_port_ets(struct ice_port_info *pi,</div><div class='ctx'> 		      struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_query_port_ets *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (!pi)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	cmd = &amp;desc.params.port_ets;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_query_port_ets);</div><div class='ctx'> 	cmd-&gt;port_teid = pi-&gt;root-&gt;info.node_teid;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_dcb_lib.c b/drivers/net/ethernet/intel/ice/ice_dcb_lib.c<br/>index a7c510832824..9fc8681cc58e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dcb_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dcb_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dcb_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_dcb_lib.c</a></div><div class='hunk'>@@ -352,8 +352,8 @@ int ice_pf_dcb_cfg(struct ice_pf *pf, struct ice_dcbx_cfg *new_cfg, bool locked)</div><div class='ctx'> 	struct ice_aqc_port_ets_elem buf = { 0 };</div><div class='ctx'> 	struct ice_dcbx_cfg *old_cfg, *curr_cfg;</div><div class='ctx'> 	struct device *dev = ice_pf_to_dev(pf);</div><div class='add'>+	struct iidc_rdma_event *event;</div><div class='ctx'> 	int ret = ICE_DCB_NO_HW_CHG;</div><div class='del'>-	struct iidc_event *event;</div><div class='ctx'> 	struct ice_vsi *pf_vsi;</div><div class='ctx'> </div><div class='ctx'> 	curr_cfg = &amp;pf-&gt;hw.port_info-&gt;qos_cfg.local_dcbx_cfg;</div><div class='hunk'>@@ -405,7 +405,7 @@ int ice_pf_dcb_cfg(struct ice_pf *pf, struct ice_dcbx_cfg *new_cfg, bool locked)</div><div class='ctx'> 		goto free_cfg;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	set_bit(IIDC_EVENT_BEFORE_TC_CHANGE, event-&gt;type);</div><div class='add'>+	set_bit(IIDC_RDMA_EVENT_BEFORE_TC_CHANGE, event-&gt;type);</div><div class='ctx'> 	ice_send_event_to_aux(pf, event);</div><div class='ctx'> 	kfree(event);</div><div class='ctx'> </div><div class='hunk'>@@ -740,7 +740,9 @@ static int ice_dcb_noncontig_cfg(struct ice_pf *pf)</div><div class='ctx'> void ice_pf_dcb_recfg(struct ice_pf *pf, bool locked)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_dcbx_cfg *dcbcfg = &amp;pf-&gt;hw.port_info-&gt;qos_cfg.local_dcbx_cfg;</div><div class='del'>-	struct iidc_event *event;</div><div class='add'>+	struct iidc_rdma_priv_dev_info *privd;</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev;</div><div class='add'>+	struct iidc_rdma_event *event;</div><div class='ctx'> 	u8 tc_map = 0;</div><div class='ctx'> 	int v, ret;</div><div class='ctx'> </div><div class='hunk'>@@ -783,13 +785,17 @@ void ice_pf_dcb_recfg(struct ice_pf *pf, bool locked)</div><div class='ctx'> 		if (vsi-&gt;type == ICE_VSI_PF)</div><div class='ctx'> 			ice_dcbnl_set_all(vsi);</div><div class='ctx'> 	}</div><div class='del'>-	if (!locked) {</div><div class='add'>+</div><div class='add'>+	cdev = pf-&gt;cdev_info;</div><div class='add'>+	if (cdev &amp;&amp; !locked) {</div><div class='add'>+		privd = cdev-&gt;iidc_priv;</div><div class='add'>+		ice_setup_dcb_qos_info(pf, &amp;privd-&gt;qos_info);</div><div class='ctx'> 		/* Notify the AUX drivers that TC change is finished */</div><div class='ctx'> 		event = kzalloc(sizeof(*event), GFP_KERNEL);</div><div class='ctx'> 		if (!event)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		set_bit(IIDC_EVENT_AFTER_TC_CHANGE, event-&gt;type);</div><div class='add'>+		set_bit(IIDC_RDMA_EVENT_AFTER_TC_CHANGE, event-&gt;type);</div><div class='ctx'> 		ice_send_event_to_aux(pf, event);</div><div class='ctx'> 		kfree(event);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -846,7 +852,7 @@ int ice_init_pf_dcb(struct ice_pf *pf, bool locked)</div><div class='ctx'> 			goto dcb_init_err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ice_cfg_sw_lldp(pf_vsi, false, true);</div><div class='add'>+		ice_cfg_sw_rx_lldp(pf, true);</div><div class='ctx'> </div><div class='ctx'> 		pf-&gt;dcbx_cap = ice_dcb_get_mode(port_info, true);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -945,6 +951,37 @@ ice_tx_prepare_vlan_flags_dcb(struct ice_tx_ring *tx_ring,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_setup_dcb_qos_info - Setup DCB QoS information</div><div class='add'>+ * @pf: ptr to ice_pf</div><div class='add'>+ * @qos_info: QoS param instance</div><div class='add'>+ */</div><div class='add'>+void ice_setup_dcb_qos_info(struct ice_pf *pf, struct iidc_rdma_qos_params *qos_info)</div><div class='add'>+{</div><div class='add'>+	struct ice_dcbx_cfg *dcbx_cfg;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u32 up2tc;</div><div class='add'>+</div><div class='add'>+	if (!pf || !qos_info)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dcbx_cfg = &amp;pf-&gt;hw.port_info-&gt;qos_cfg.local_dcbx_cfg;</div><div class='add'>+	up2tc = rd32(&amp;pf-&gt;hw, PRTDCB_TUP2TC);</div><div class='add'>+</div><div class='add'>+	qos_info-&gt;num_tc = ice_dcb_get_num_tc(dcbx_cfg);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; IIDC_MAX_USER_PRIORITY; i++)</div><div class='add'>+		qos_info-&gt;up2tc[i] = (up2tc &gt;&gt; (i * 3)) &amp; 0x7;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; IEEE_8021QAZ_MAX_TCS; i++)</div><div class='add'>+		qos_info-&gt;tc_info[i].rel_bw = dcbx_cfg-&gt;etscfg.tcbwtable[i];</div><div class='add'>+</div><div class='add'>+	qos_info-&gt;pfc_mode = dcbx_cfg-&gt;pfc_mode;</div><div class='add'>+	if (qos_info-&gt;pfc_mode == IIDC_DSCP_PFC_MODE)</div><div class='add'>+		for (i = 0; i &lt; DSCP_MAX; i++)</div><div class='add'>+			qos_info-&gt;dscp_map[i] = dcbx_cfg-&gt;dscp_map[i];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dcb_is_mib_change_pending - Check if MIB change is pending</div><div class='ctx'>  * @state: MIB change state</div><div class='ctx'>  */</div><div class='hunk'>@@ -983,7 +1020,7 @@ ice_dcb_process_lldp_set_mib_change(struct ice_pf *pf,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pi = pf-&gt;hw.port_info;</div><div class='del'>-	mib = (struct ice_aqc_lldp_get_mib *)&amp;event-&gt;desc.params.raw;</div><div class='add'>+	mib = libie_aq_raw(&amp;event-&gt;desc);</div><div class='ctx'> </div><div class='ctx'> 	/* Ignore if event is not for Nearest Bridge */</div><div class='ctx'> 	mib_type = FIELD_GET(ICE_AQ_LLDP_BRID_TYPE_M, mib-&gt;type);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_dcb_lib.h b/drivers/net/ethernet/intel/ice/ice_dcb_lib.h<br/>index 800879a88c5e..da9ba814b4e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dcb_lib.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dcb_lib.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dcb_lib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_dcb_lib.h</a></div><div class='hunk'>@@ -31,6 +31,9 @@ void</div><div class='ctx'> ice_tx_prepare_vlan_flags_dcb(struct ice_tx_ring *tx_ring,</div><div class='ctx'> 			      struct ice_tx_buf *first);</div><div class='ctx'> void</div><div class='add'>+ice_setup_dcb_qos_info(struct ice_pf *pf,</div><div class='add'>+		       struct iidc_rdma_qos_params *qos_info);</div><div class='add'>+void</div><div class='ctx'> ice_dcb_process_lldp_set_mib_change(struct ice_pf *pf,</div><div class='ctx'> 				    struct ice_rq_event_info *event);</div><div class='ctx'> /**</div><div class='hunk'>@@ -134,5 +137,11 @@ static inline void ice_update_dcb_stats(struct ice_pf *pf) { }</div><div class='ctx'> static inline void</div><div class='ctx'> ice_dcb_process_lldp_set_mib_change(struct ice_pf *pf, struct ice_rq_event_info *event) { }</div><div class='ctx'> static inline void ice_set_cgd_num(struct ice_tlan_ctx *tlan_ctx, u8 dcb_tc) { }</div><div class='add'>+static inline void</div><div class='add'>+ice_setup_dcb_qos_info(struct ice_pf *pf, struct iidc_rdma_qos_params *qos_info)</div><div class='add'>+{</div><div class='add'>+	qos_info-&gt;num_tc = 1;</div><div class='add'>+	qos_info-&gt;tc_info[0].rel_bw = 100;</div><div class='add'>+}</div><div class='ctx'> #endif /* CONFIG_DCB */</div><div class='ctx'> #endif /* _ICE_DCB_LIB_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_dcb_nl.c b/drivers/net/ethernet/intel/ice/ice_dcb_nl.c<br/>index 6d50b90a7359..a10c1c8d8697 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dcb_nl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dcb_nl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dcb_nl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_dcb_nl.c</a></div><div class='hunk'>@@ -754,7 +754,7 @@ static int ice_dcbnl_setapp(struct net_device *netdev, struct dcb_app *app)</div><div class='ctx'> 	if (!ice_is_feature_supported(pf, ICE_F_DSCP))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (app-&gt;protocol &gt;= ICE_DSCP_NUM_VAL) {</div><div class='add'>+	if (app-&gt;protocol &gt;= DSCP_MAX) {</div><div class='ctx'> 		netdev_err(netdev, "DSCP value 0x%04X out of range\n",</div><div class='ctx'> 			   app-&gt;protocol);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -931,7 +931,7 @@ static int ice_dcbnl_delapp(struct net_device *netdev, struct dcb_app *app)</div><div class='ctx'> 	/* if the last DSCP mapping just got deleted, need to switch</div><div class='ctx'> 	 * to L2 VLAN QoS mode</div><div class='ctx'> 	 */</div><div class='del'>-	if (bitmap_empty(new_cfg-&gt;dscp_mapped, ICE_DSCP_NUM_VAL) &amp;&amp;</div><div class='add'>+	if (bitmap_empty(new_cfg-&gt;dscp_mapped, DSCP_MAX) &amp;&amp;</div><div class='ctx'> 	    new_cfg-&gt;pfc_mode == ICE_QOS_MODE_DSCP) {</div><div class='ctx'> 		ret = ice_aq_set_pfc_mode(&amp;pf-&gt;hw,</div><div class='ctx'> 					  ICE_AQC_PFC_VLAN_BASED_PFC,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_ddp.c b/drivers/net/ethernet/intel/ice/ice_ddp.c<br/>index 272fd823a825..3b2d9c436979 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ddp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ddp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ddp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_ddp.c</a></div><div class='hunk'>@@ -1101,16 +1101,16 @@ struct ice_buf *ice_pkg_buf(struct ice_buf_build *bld)</div><div class='ctx'> 	return &amp;bld-&gt;buf;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum ice_ddp_state ice_map_aq_err_to_ddp_state(enum ice_aq_err aq_err)</div><div class='add'>+static enum ice_ddp_state ice_map_aq_err_to_ddp_state(enum libie_aq_err aq_err)</div><div class='ctx'> {</div><div class='ctx'> 	switch (aq_err) {</div><div class='del'>-	case ICE_AQ_RC_ENOSEC:</div><div class='del'>-	case ICE_AQ_RC_EBADSIG:</div><div class='add'>+	case LIBIE_AQ_RC_ENOSEC:</div><div class='add'>+	case LIBIE_AQ_RC_EBADSIG:</div><div class='ctx'> 		return ICE_DDP_PKG_FILE_SIGNATURE_INVALID;</div><div class='del'>-	case ICE_AQ_RC_ESVN:</div><div class='add'>+	case LIBIE_AQ_RC_ESVN:</div><div class='ctx'> 		return ICE_DDP_PKG_FILE_REVISION_TOO_LOW;</div><div class='del'>-	case ICE_AQ_RC_EBADMAN:</div><div class='del'>-	case ICE_AQ_RC_EBADBUF:</div><div class='add'>+	case LIBIE_AQ_RC_EBADMAN:</div><div class='add'>+	case LIBIE_AQ_RC_EBADBUF:</div><div class='ctx'> 		return ICE_DDP_PKG_LOAD_ERROR;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return ICE_DDP_PKG_ERR;</div><div class='hunk'>@@ -1180,7 +1180,7 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,</div><div class='ctx'> 		    u32 *error_info, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_download_pkg *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (error_offset)</div><div class='hunk'>@@ -1188,9 +1188,9 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,</div><div class='ctx'> 	if (error_info)</div><div class='ctx'> 		*error_info = 0;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.download_pkg;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_download_pkg);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	if (last_buf)</div><div class='ctx'> 		cmd-&gt;flags |= ICE_AQC_DOWNLOAD_PKG_LAST_BUF;</div><div class='hunk'>@@ -1211,6 +1211,132 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_is_buffer_metadata - determine if package buffer is a metadata buffer</div><div class='add'>+ * @buf: pointer to buffer header</div><div class='add'>+ * Return: whether given @buf is a metadata one.</div><div class='add'>+ */</div><div class='add'>+static bool ice_is_buffer_metadata(struct ice_buf_hdr *buf)</div><div class='add'>+{</div><div class='add'>+	return le32_to_cpu(buf-&gt;section_entry[0].type) &amp; ICE_METADATA_BUF;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ice_ddp_send_ctx - sending context of current DDP segment</div><div class='add'>+ * @hw: pointer to the hardware struct</div><div class='add'>+ *</div><div class='add'>+ * Keeps current sending state (header, error) for the purpose of proper "last"</div><div class='add'>+ * bit setting in ice_aq_download_pkg(). Use via calls to ice_ddp_send_hunk().</div><div class='add'>+ */</div><div class='add'>+struct ice_ddp_send_ctx {</div><div class='add'>+	struct ice_hw *hw;</div><div class='add'>+/* private: only for ice_ddp_send_hunk() */</div><div class='add'>+	struct ice_buf_hdr *hdr;</div><div class='add'>+	int err;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ice_ddp_send_ctx_set_err(struct ice_ddp_send_ctx *ctx, int err)</div><div class='add'>+{</div><div class='add'>+	ctx-&gt;err = err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_ddp_send_hunk - send one hunk of data to FW</div><div class='add'>+ * @ctx: current segment sending context</div><div class='add'>+ * @hunk: next hunk to send, size is always ICE_PKG_BUF_SIZE</div><div class='add'>+ *</div><div class='add'>+ * Send the next hunk of data to FW, retrying if needed.</div><div class='add'>+ *</div><div class='add'>+ * Notice: must be called once more with a NULL @hunk to finish up; such call</div><div class='add'>+ * will set up the "last" bit of an AQ request. After such call @ctx.hdr is</div><div class='add'>+ * cleared, @hw is still valid.</div><div class='add'>+ *</div><div class='add'>+ * Return: %ICE_DDP_PKG_SUCCESS if there were no problems; a sticky @err</div><div class='add'>+ *         otherwise.</div><div class='add'>+ */</div><div class='add'>+static enum ice_ddp_state ice_ddp_send_hunk(struct ice_ddp_send_ctx *ctx,</div><div class='add'>+					    struct ice_buf_hdr *hunk)</div><div class='add'>+{</div><div class='add'>+	struct ice_buf_hdr *prev_hunk = ctx-&gt;hdr;</div><div class='add'>+	struct ice_hw *hw = ctx-&gt;hw;</div><div class='add'>+	bool prev_was_last = !hunk;</div><div class='add'>+	enum libie_aq_err aq_err;</div><div class='add'>+	u32 offset, info;</div><div class='add'>+	int attempt, err;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;err)</div><div class='add'>+		return ctx-&gt;err;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;hdr = hunk;</div><div class='add'>+	if (!prev_hunk)</div><div class='add'>+		return ICE_DDP_PKG_SUCCESS; /* no problem so far */</div><div class='add'>+</div><div class='add'>+	for (attempt = 0; attempt &lt; 5; attempt++) {</div><div class='add'>+		if (attempt)</div><div class='add'>+			msleep(20);</div><div class='add'>+</div><div class='add'>+		err = ice_aq_download_pkg(hw, prev_hunk, ICE_PKG_BUF_SIZE,</div><div class='add'>+					  prev_was_last, &amp;offset, &amp;info, NULL);</div><div class='add'>+</div><div class='add'>+		aq_err = hw-&gt;adminq.sq_last_status;</div><div class='add'>+		if (aq_err != LIBIE_AQ_RC_ENOSEC &amp;&amp;</div><div class='add'>+		    aq_err != LIBIE_AQ_RC_EBADSIG)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		ice_debug(hw, ICE_DBG_PKG, "Pkg download failed: err %d off %d inf %d\n",</div><div class='add'>+			  err, offset, info);</div><div class='add'>+		ctx-&gt;err = ice_map_aq_err_to_ddp_state(aq_err);</div><div class='add'>+	} else if (attempt) {</div><div class='add'>+		dev_dbg(ice_hw_to_dev(hw),</div><div class='add'>+			"ice_aq_download_pkg number of retries: %d\n", attempt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ctx-&gt;err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dwnld_cfg_bufs_no_lock</div><div class='add'>+ * @ctx: context of the current buffers section to send</div><div class='add'>+ * @bufs: pointer to an array of buffers</div><div class='add'>+ * @start: buffer index of first buffer to download</div><div class='add'>+ * @count: the number of buffers to download</div><div class='add'>+ *</div><div class='add'>+ * Downloads package configuration buffers to the firmware. Metadata buffers</div><div class='add'>+ * are skipped, and the first metadata buffer found indicates that the rest</div><div class='add'>+ * of the buffers are all metadata buffers.</div><div class='add'>+ */</div><div class='add'>+static enum ice_ddp_state</div><div class='add'>+ice_dwnld_cfg_bufs_no_lock(struct ice_ddp_send_ctx *ctx, struct ice_buf *bufs,</div><div class='add'>+			   u32 start, u32 count)</div><div class='add'>+{</div><div class='add'>+	struct ice_buf_hdr *bh;</div><div class='add'>+	enum ice_ddp_state err;</div><div class='add'>+</div><div class='add'>+	if (!bufs || !count) {</div><div class='add'>+		ice_ddp_send_ctx_set_err(ctx, ICE_DDP_PKG_ERR);</div><div class='add'>+		return ICE_DDP_PKG_ERR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bufs += start;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; count; i++, bufs++) {</div><div class='add'>+		bh = (struct ice_buf_hdr *)bufs;</div><div class='add'>+		/* Metadata buffers should not be sent to FW,</div><div class='add'>+		 * their presence means "we are done here".</div><div class='add'>+		 */</div><div class='add'>+		if (ice_is_buffer_metadata(bh))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		err = ice_ddp_send_hunk(ctx, bh);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_get_pkg_seg_by_idx</div><div class='ctx'>  * @pkg_hdr: pointer to the package header to be searched</div><div class='ctx'>  * @idx: index of segment</div><div class='hunk'>@@ -1270,136 +1396,20 @@ ice_is_signing_seg_type_at_idx(struct ice_pkg_hdr *pkg_hdr, u32 idx,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_is_buffer_metadata - determine if package buffer is a metadata buffer</div><div class='del'>- * @buf: pointer to buffer header</div><div class='del'>- */</div><div class='del'>-static bool ice_is_buffer_metadata(struct ice_buf_hdr *buf)</div><div class='del'>-{</div><div class='del'>-	if (le32_to_cpu(buf-&gt;section_entry[0].type) &amp; ICE_METADATA_BUF)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_is_last_download_buffer</div><div class='del'>- * @buf: pointer to current buffer header</div><div class='del'>- * @idx: index of the buffer in the current sequence</div><div class='del'>- * @count: the buffer count in the current sequence</div><div class='del'>- *</div><div class='del'>- * Note: this routine should only be called if the buffer is not the last buffer</div><div class='del'>- */</div><div class='del'>-static bool</div><div class='del'>-ice_is_last_download_buffer(struct ice_buf_hdr *buf, u32 idx, u32 count)</div><div class='del'>-{</div><div class='del'>-	struct ice_buf *next_buf;</div><div class='del'>-</div><div class='del'>-	if ((idx + 1) == count)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	/* A set metadata flag in the next buffer will signal that the current</div><div class='del'>-	 * buffer will be the last buffer downloaded</div><div class='del'>-	 */</div><div class='del'>-	next_buf = ((struct ice_buf *)buf) + 1;</div><div class='del'>-</div><div class='del'>-	return ice_is_buffer_metadata((struct ice_buf_hdr *)next_buf);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_dwnld_cfg_bufs_no_lock</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='del'>- * @bufs: pointer to an array of buffers</div><div class='del'>- * @start: buffer index of first buffer to download</div><div class='del'>- * @count: the number of buffers to download</div><div class='del'>- * @indicate_last: if true, then set last buffer flag on last buffer download</div><div class='del'>- *</div><div class='del'>- * Downloads package configuration buffers to the firmware. Metadata buffers</div><div class='del'>- * are skipped, and the first metadata buffer found indicates that the rest</div><div class='del'>- * of the buffers are all metadata buffers.</div><div class='del'>- */</div><div class='del'>-static enum ice_ddp_state</div><div class='del'>-ice_dwnld_cfg_bufs_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 start,</div><div class='del'>-			   u32 count, bool indicate_last)</div><div class='del'>-{</div><div class='del'>-	enum ice_ddp_state state = ICE_DDP_PKG_SUCCESS;</div><div class='del'>-	struct ice_buf_hdr *bh;</div><div class='del'>-	enum ice_aq_err err;</div><div class='del'>-	u32 offset, info, i;</div><div class='del'>-</div><div class='del'>-	if (!bufs || !count)</div><div class='del'>-		return ICE_DDP_PKG_ERR;</div><div class='del'>-</div><div class='del'>-	/* If the first buffer's first section has its metadata bit set</div><div class='del'>-	 * then there are no buffers to be downloaded, and the operation is</div><div class='del'>-	 * considered a success.</div><div class='del'>-	 */</div><div class='del'>-	bh = (struct ice_buf_hdr *)(bufs + start);</div><div class='del'>-	if (le32_to_cpu(bh-&gt;section_entry[0].type) &amp; ICE_METADATA_BUF)</div><div class='del'>-		return ICE_DDP_PKG_SUCCESS;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		bool last = false;</div><div class='del'>-		int try_cnt = 0;</div><div class='del'>-		int status;</div><div class='del'>-</div><div class='del'>-		bh = (struct ice_buf_hdr *)(bufs + start + i);</div><div class='del'>-</div><div class='del'>-		if (indicate_last)</div><div class='del'>-			last = ice_is_last_download_buffer(bh, i, count);</div><div class='del'>-</div><div class='del'>-		while (1) {</div><div class='del'>-			status = ice_aq_download_pkg(hw, bh, ICE_PKG_BUF_SIZE,</div><div class='del'>-						     last, &amp;offset, &amp;info,</div><div class='del'>-						     NULL);</div><div class='del'>-			if (hw-&gt;adminq.sq_last_status != ICE_AQ_RC_ENOSEC &amp;&amp;</div><div class='del'>-			    hw-&gt;adminq.sq_last_status != ICE_AQ_RC_EBADSIG)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			try_cnt++;</div><div class='del'>-</div><div class='del'>-			if (try_cnt == 5)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			msleep(20);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (try_cnt)</div><div class='del'>-			dev_dbg(ice_hw_to_dev(hw),</div><div class='del'>-				"ice_aq_download_pkg number of retries: %d\n",</div><div class='del'>-				try_cnt);</div><div class='del'>-</div><div class='del'>-		/* Save AQ status from download package */</div><div class='del'>-		if (status) {</div><div class='del'>-			ice_debug(hw, ICE_DBG_PKG, "Pkg download failed: err %d off %d inf %d\n",</div><div class='del'>-				  status, offset, info);</div><div class='del'>-			err = hw-&gt;adminq.sq_last_status;</div><div class='del'>-			state = ice_map_aq_err_to_ddp_state(err);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (last)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return state;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_download_pkg_sig_seg - download a signature segment</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='add'>+ * @ctx: context of the current buffers section to send</div><div class='ctx'>  * @seg: pointer to signature segment</div><div class='ctx'>  */</div><div class='ctx'> static enum ice_ddp_state</div><div class='del'>-ice_download_pkg_sig_seg(struct ice_hw *hw, struct ice_sign_seg *seg)</div><div class='add'>+ice_download_pkg_sig_seg(struct ice_ddp_send_ctx *ctx, struct ice_sign_seg *seg)</div><div class='ctx'> {</div><div class='del'>-	return  ice_dwnld_cfg_bufs_no_lock(hw, seg-&gt;buf_tbl.buf_array, 0,</div><div class='del'>-					   le32_to_cpu(seg-&gt;buf_tbl.buf_count),</div><div class='del'>-					   false);</div><div class='add'>+	return ice_dwnld_cfg_bufs_no_lock(ctx, seg-&gt;buf_tbl.buf_array, 0,</div><div class='add'>+					  le32_to_cpu(seg-&gt;buf_tbl.buf_count));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_download_pkg_config_seg - download a config segment</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='add'>+ * @ctx: context of the current buffers section to send</div><div class='ctx'>  * @pkg_hdr: pointer to package header</div><div class='ctx'>  * @idx: segment index</div><div class='ctx'>  * @start: starting buffer</div><div class='hunk'>@@ -1408,8 +1418,9 @@ ice_download_pkg_sig_seg(struct ice_hw *hw, struct ice_sign_seg *seg)</div><div class='ctx'>  * Note: idx must reference a ICE segment</div><div class='ctx'>  */</div><div class='ctx'> static enum ice_ddp_state</div><div class='del'>-ice_download_pkg_config_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr,</div><div class='del'>-			    u32 idx, u32 start, u32 count)</div><div class='add'>+ice_download_pkg_config_seg(struct ice_ddp_send_ctx *ctx,</div><div class='add'>+			    struct ice_pkg_hdr *pkg_hdr, u32 idx, u32 start,</div><div class='add'>+			    u32 count)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_buf_table *bufs;</div><div class='ctx'> 	struct ice_seg *seg;</div><div class='hunk'>@@ -1425,46 +1436,56 @@ ice_download_pkg_config_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr,</div><div class='ctx'> 	if (start &gt;= buf_count || start + count &gt; buf_count)</div><div class='ctx'> 		return ICE_DDP_PKG_ERR;</div><div class='ctx'> </div><div class='del'>-	return  ice_dwnld_cfg_bufs_no_lock(hw, bufs-&gt;buf_array, start, count,</div><div class='del'>-					   true);</div><div class='add'>+	return ice_dwnld_cfg_bufs_no_lock(ctx, bufs-&gt;buf_array, start, count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ice_is_last_sign_seg(u32 flags)</div><div class='add'>+{</div><div class='add'>+	return !(flags &amp; ICE_SIGN_SEG_FLAGS_VALID) || /* behavior prior to valid */</div><div class='add'>+	       (flags &amp; ICE_SIGN_SEG_FLAGS_LAST);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_dwnld_sign_and_cfg_segs - download a signing segment and config segment</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='add'>+ * @ctx: context of the current buffers section to send</div><div class='ctx'>  * @pkg_hdr: pointer to package header</div><div class='ctx'>  * @idx: segment index (must be a signature segment)</div><div class='ctx'>  *</div><div class='ctx'>  * Note: idx must reference a signature segment</div><div class='ctx'>  */</div><div class='ctx'> static enum ice_ddp_state</div><div class='del'>-ice_dwnld_sign_and_cfg_segs(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr,</div><div class='del'>-			    u32 idx)</div><div class='add'>+ice_dwnld_sign_and_cfg_segs(struct ice_ddp_send_ctx *ctx,</div><div class='add'>+			    struct ice_pkg_hdr *pkg_hdr, u32 idx)</div><div class='ctx'> {</div><div class='add'>+	u32 conf_idx, start, count, flags;</div><div class='ctx'> 	enum ice_ddp_state state;</div><div class='ctx'> 	struct ice_sign_seg *seg;</div><div class='del'>-	u32 conf_idx;</div><div class='del'>-	u32 start;</div><div class='del'>-	u32 count;</div><div class='ctx'> </div><div class='ctx'> 	seg = (struct ice_sign_seg *)ice_get_pkg_seg_by_idx(pkg_hdr, idx);</div><div class='ctx'> 	if (!seg) {</div><div class='ctx'> 		state = ICE_DDP_PKG_ERR;</div><div class='del'>-		goto exit;</div><div class='add'>+		ice_ddp_send_ctx_set_err(ctx, state);</div><div class='add'>+		return state;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	count = le32_to_cpu(seg-&gt;signed_buf_count);</div><div class='del'>-	state = ice_download_pkg_sig_seg(hw, seg);</div><div class='add'>+	state = ice_download_pkg_sig_seg(ctx, seg);</div><div class='ctx'> 	if (state || !count)</div><div class='del'>-		goto exit;</div><div class='add'>+		return state;</div><div class='ctx'> </div><div class='ctx'> 	conf_idx = le32_to_cpu(seg-&gt;signed_seg_idx);</div><div class='ctx'> 	start = le32_to_cpu(seg-&gt;signed_buf_start);</div><div class='ctx'> </div><div class='del'>-	state = ice_download_pkg_config_seg(hw, pkg_hdr, conf_idx, start,</div><div class='add'>+	state = ice_download_pkg_config_seg(ctx, pkg_hdr, conf_idx, start,</div><div class='ctx'> 					    count);</div><div class='ctx'> </div><div class='del'>-exit:</div><div class='add'>+	/* finish up by sending last hunk with "last" flag set if requested by</div><div class='add'>+	 * DDP content</div><div class='add'>+	 */</div><div class='add'>+	flags = le32_to_cpu(seg-&gt;flags);</div><div class='add'>+	if (ice_is_last_sign_seg(flags))</div><div class='add'>+		state = ice_ddp_send_hunk(ctx, NULL);</div><div class='add'>+</div><div class='ctx'> 	return state;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1517,8 +1538,9 @@ ice_post_dwnld_pkg_actions(struct ice_hw *hw)</div><div class='ctx'> static enum ice_ddp_state</div><div class='ctx'> ice_download_pkg_with_sig_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)</div><div class='ctx'> {</div><div class='del'>-	enum ice_aq_err aq_err = hw-&gt;adminq.sq_last_status;</div><div class='add'>+	enum libie_aq_err aq_err = hw-&gt;adminq.sq_last_status;</div><div class='ctx'> 	enum ice_ddp_state state = ICE_DDP_PKG_ERR;</div><div class='add'>+	struct ice_ddp_send_ctx ctx = { .hw = hw };</div><div class='ctx'> 	int status;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='hunk'>@@ -1539,7 +1561,7 @@ ice_download_pkg_with_sig_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)</div><div class='ctx'> 						    hw-&gt;pkg_sign_type))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		state = ice_dwnld_sign_and_cfg_segs(hw, pkg_hdr, i);</div><div class='add'>+		state = ice_dwnld_sign_and_cfg_segs(&amp;ctx, pkg_hdr, i);</div><div class='ctx'> 		if (state)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1564,6 +1586,7 @@ ice_download_pkg_with_sig_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)</div><div class='ctx'> static enum ice_ddp_state</div><div class='ctx'> ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)</div><div class='ctx'> {</div><div class='add'>+	struct ice_ddp_send_ctx ctx = { .hw = hw };</div><div class='ctx'> 	enum ice_ddp_state state;</div><div class='ctx'> 	struct ice_buf_hdr *bh;</div><div class='ctx'> 	int status;</div><div class='hunk'>@@ -1576,7 +1599,7 @@ ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)</div><div class='ctx'> 	 * considered a success.</div><div class='ctx'> 	 */</div><div class='ctx'> 	bh = (struct ice_buf_hdr *)bufs;</div><div class='del'>-	if (le32_to_cpu(bh-&gt;section_entry[0].type) &amp; ICE_METADATA_BUF)</div><div class='add'>+	if (ice_is_buffer_metadata(bh))</div><div class='ctx'> 		return ICE_DDP_PKG_SUCCESS;</div><div class='ctx'> </div><div class='ctx'> 	status = ice_acquire_global_cfg_lock(hw, ICE_RES_WRITE);</div><div class='hunk'>@@ -1586,7 +1609,9 @@ ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)</div><div class='ctx'> 		return ice_map_aq_err_to_ddp_state(hw-&gt;adminq.sq_last_status);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	state = ice_dwnld_cfg_bufs_no_lock(hw, bufs, 0, count, true);</div><div class='add'>+	ice_dwnld_cfg_bufs_no_lock(&amp;ctx, bufs, 0, count);</div><div class='add'>+	/* finish up by sending last hunk with "last" flag set */</div><div class='add'>+	state = ice_ddp_send_hunk(&amp;ctx, NULL);</div><div class='ctx'> 	if (!state)</div><div class='ctx'> 		state = ice_post_dwnld_pkg_actions(hw);</div><div class='ctx'> </div><div class='hunk'>@@ -1663,7 +1688,7 @@ static int ice_aq_get_pkg_info_list(struct ice_hw *hw,</div><div class='ctx'> 				    struct ice_aqc_get_pkg_info_resp *pkg_info,</div><div class='ctx'> 				    u16 buf_size, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_pkg_info_list);</div><div class='ctx'> </div><div class='hunk'>@@ -1687,7 +1712,7 @@ static int ice_aq_update_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,</div><div class='ctx'> 			     u32 *error_info, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_download_pkg *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (error_offset)</div><div class='hunk'>@@ -1695,9 +1720,9 @@ static int ice_aq_update_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,</div><div class='ctx'> 	if (error_info)</div><div class='ctx'> 		*error_info = 0;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.download_pkg;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_update_pkg);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	if (last_buf)</div><div class='ctx'> 		cmd-&gt;flags |= ICE_AQC_DOWNLOAD_PKG_LAST_BUF;</div><div class='hunk'>@@ -1729,10 +1754,10 @@ static int ice_aq_update_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,</div><div class='ctx'> int ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,</div><div class='ctx'> 			  u16 buf_size, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_upload_section);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	return ice_aq_send_cmd(hw, &amp;desc, pkg_buf, buf_size, cd);</div><div class='ctx'> }</div><div class='hunk'>@@ -2277,6 +2302,8 @@ enum ice_ddp_state ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf,</div><div class='ctx'> 		return ICE_DDP_PKG_ERR;</div><div class='ctx'> </div><div class='ctx'> 	buf_copy = devm_kmemdup(ice_hw_to_dev(hw), buf, len, GFP_KERNEL);</div><div class='add'>+	if (!buf_copy)</div><div class='add'>+		return ICE_DDP_PKG_ERR;</div><div class='ctx'> </div><div class='ctx'> 	state = ice_init_pkg(hw, buf_copy, len);</div><div class='ctx'> 	if (!ice_is_init_pkg_successful(state)) {</div><div class='hunk'>@@ -2309,10 +2336,10 @@ ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,</div><div class='ctx'> 		    struct ice_sq_cd *cd, u8 *flags, bool set)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_set_tx_topo *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.get_set_tx_topo;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	if (set) {</div><div class='ctx'> 		ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_tx_topo);</div><div class='ctx'> 		cmd-&gt;set_flags = ICE_AQC_TX_TOPO_FLAGS_ISSUED;</div><div class='hunk'>@@ -2321,22 +2348,22 @@ ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,</div><div class='ctx'> 			cmd-&gt;set_flags |= ICE_AQC_TX_TOPO_FLAGS_SRC_RAM |</div><div class='ctx'> 					  ICE_AQC_TX_TOPO_FLAGS_LOAD_NEW;</div><div class='ctx'> </div><div class='del'>-		if (ice_is_e825c(hw))</div><div class='del'>-			desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+		desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_tx_topo);</div><div class='ctx'> 		cmd-&gt;get_flags = ICE_AQC_TX_TOPO_GET_RAM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (!ice_is_e825c(hw))</div><div class='del'>-		desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+		if (hw-&gt;mac_type == ICE_MAC_E810 ||</div><div class='add'>+		    hw-&gt;mac_type == ICE_MAC_GENERIC)</div><div class='add'>+			desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, buf, buf_size, cd);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		return status;</div><div class='ctx'> 	/* read the return flag values (first byte) for get operation */</div><div class='ctx'> 	if (!set &amp;&amp; flags)</div><div class='del'>-		*flags = desc.params.get_set_tx_topo.set_flags;</div><div class='add'>+		*flags = cmd-&gt;set_flags;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2350,7 +2377,13 @@ ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,</div><div class='ctx'>  * The function will apply the new Tx topology from the package buffer</div><div class='ctx'>  * if available.</div><div class='ctx'>  *</div><div class='del'>- * Return: zero when update was successful, negative values otherwise.</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - Successfully applied topology configuration.</div><div class='add'>+ * * -EBUSY - Failed to acquire global configuration lock.</div><div class='add'>+ * * -EEXIST - Topology configuration has already been applied.</div><div class='add'>+ * * -EIO - Unable to apply topology configuration.</div><div class='add'>+ * * -ENODEV - Failed to re-initialize device after applying configuration.</div><div class='add'>+ * * Other negative error codes indicate unexpected failures.</div><div class='ctx'>  */</div><div class='ctx'> int ice_cfg_tx_topo(struct ice_hw *hw, const void *buf, u32 len)</div><div class='ctx'> {</div><div class='hunk'>@@ -2383,7 +2416,7 @@ int ice_cfg_tx_topo(struct ice_hw *hw, const void *buf, u32 len)</div><div class='ctx'> </div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "Get current topology is failed\n");</div><div class='del'>-		return status;</div><div class='add'>+		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Is default topology already applied ? */</div><div class='hunk'>@@ -2470,31 +2503,45 @@ update_topo:</div><div class='ctx'> 				 ICE_GLOBAL_CFG_LOCK_TIMEOUT);</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "Failed to acquire global lock\n");</div><div class='del'>-		return status;</div><div class='add'>+		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check if reset was triggered already. */</div><div class='ctx'> 	reg = rd32(hw, GLGEN_RSTAT);</div><div class='ctx'> 	if (reg &amp; GLGEN_RSTAT_DEVSTATE_M) {</div><div class='del'>-		/* Reset is in progress, re-init the HW again */</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_INIT, "Reset is in progress. Layer topology might be applied already\n");</div><div class='ctx'> 		ice_check_reset(hw);</div><div class='del'>-		return 0;</div><div class='add'>+		/* Reset is in progress, re-init the HW again */</div><div class='add'>+		goto reinit_hw;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set new topology */</div><div class='ctx'> 	status = ice_get_set_tx_topo(hw, new_topo, size, NULL, NULL, true);</div><div class='ctx'> 	if (status) {</div><div class='del'>-		ice_debug(hw, ICE_DBG_INIT, "Failed setting Tx topology\n");</div><div class='del'>-		return status;</div><div class='add'>+		ice_debug(hw, ICE_DBG_INIT, "Failed to set Tx topology, status %pe\n",</div><div class='add'>+			  ERR_PTR(status));</div><div class='add'>+		/* only report -EIO here as the caller checks the error value</div><div class='add'>+		 * and reports an informational error message informing that</div><div class='add'>+		 * the driver failed to program Tx topology.</div><div class='add'>+		 */</div><div class='add'>+		status = -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* New topology is updated, delay 1 second before issuing the CORER */</div><div class='add'>+	/* Even if Tx topology config failed, we need to CORE reset here to</div><div class='add'>+	 * clear the global configuration lock. Delay 1 second to allow</div><div class='add'>+	 * hardware to settle then issue a CORER</div><div class='add'>+	 */</div><div class='ctx'> 	msleep(1000);</div><div class='ctx'> 	ice_reset(hw, ICE_RESET_CORER);</div><div class='del'>-	/* CORER will clear the global lock, so no explicit call</div><div class='del'>-	 * required for release.</div><div class='del'>-	 */</div><div class='add'>+	ice_check_reset(hw);</div><div class='add'>+</div><div class='add'>+reinit_hw:</div><div class='add'>+	/* Since we triggered a CORER, re-initialize hardware */</div><div class='add'>+	ice_deinit_hw(hw);</div><div class='add'>+	if (ice_init_hw(hw)) {</div><div class='add'>+		ice_debug(hw, ICE_DBG_INIT, "Failed to re-init hardware after setting Tx topology\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_ddp.h b/drivers/net/ethernet/intel/ice/ice_ddp.h<br/>index 79551da2a4b0..8a2d57fc5dae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ddp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ddp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ddp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_ddp.h</a></div><div class='hunk'>@@ -181,7 +181,10 @@ struct ice_sign_seg {</div><div class='ctx'> 	__le32 signed_seg_idx;</div><div class='ctx'> 	__le32 signed_buf_start;</div><div class='ctx'> 	__le32 signed_buf_count;</div><div class='del'>-#define ICE_SIGN_SEG_RESERVED_COUNT	44</div><div class='add'>+#define ICE_SIGN_SEG_FLAGS_VALID	0x80000000</div><div class='add'>+#define ICE_SIGN_SEG_FLAGS_LAST		0x00000001</div><div class='add'>+	__le32 flags;</div><div class='add'>+#define ICE_SIGN_SEG_RESERVED_COUNT	40</div><div class='ctx'> 	u8 reserved[ICE_SIGN_SEG_RESERVED_COUNT];</div><div class='ctx'> 	struct ice_buf_table buf_tbl;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_debugfs.c b/drivers/net/ethernet/intel/ice/ice_debugfs.c<br/>index 9fc0fd95a13d..f450250fc827 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_debugfs.c</a></div><div class='hunk'>@@ -1,647 +1,20 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* Copyright (c) 2022, Intel Corporation. */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/fs.h&gt;</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/random.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include "ice.h"</div><div class='ctx'> </div><div class='ctx'> static struct dentry *ice_debugfs_root;</div><div class='ctx'> </div><div class='del'>-/* create a define that has an extra module that doesn't really exist. this</div><div class='del'>- * is so we can add a module 'all' to easily enable/disable all the modules</div><div class='del'>- */</div><div class='del'>-#define ICE_NR_FW_LOG_MODULES (ICE_AQC_FW_LOG_ID_MAX + 1)</div><div class='del'>-</div><div class='del'>-/* the ordering in this array is important. it matches the ordering of the</div><div class='del'>- * values in the FW so the index is the same value as in ice_aqc_fw_logging_mod</div><div class='del'>- */</div><div class='del'>-static const char * const ice_fwlog_module_string[] = {</div><div class='del'>-	"general",</div><div class='del'>-	"ctrl",</div><div class='del'>-	"link",</div><div class='del'>-	"link_topo",</div><div class='del'>-	"dnl",</div><div class='del'>-	"i2c",</div><div class='del'>-	"sdp",</div><div class='del'>-	"mdio",</div><div class='del'>-	"adminq",</div><div class='del'>-	"hdma",</div><div class='del'>-	"lldp",</div><div class='del'>-	"dcbx",</div><div class='del'>-	"dcb",</div><div class='del'>-	"xlr",</div><div class='del'>-	"nvm",</div><div class='del'>-	"auth",</div><div class='del'>-	"vpd",</div><div class='del'>-	"iosf",</div><div class='del'>-	"parser",</div><div class='del'>-	"sw",</div><div class='del'>-	"scheduler",</div><div class='del'>-	"txq",</div><div class='del'>-	"rsvd",</div><div class='del'>-	"post",</div><div class='del'>-	"watchdog",</div><div class='del'>-	"task_dispatch",</div><div class='del'>-	"mng",</div><div class='del'>-	"synce",</div><div class='del'>-	"health",</div><div class='del'>-	"tsdrv",</div><div class='del'>-	"pfreg",</div><div class='del'>-	"mdlver",</div><div class='del'>-	"all",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* the ordering in this array is important. it matches the ordering of the</div><div class='del'>- * values in the FW so the index is the same value as in ice_fwlog_level</div><div class='del'>- */</div><div class='del'>-static const char * const ice_fwlog_level_string[] = {</div><div class='del'>-	"none",</div><div class='del'>-	"error",</div><div class='del'>-	"warning",</div><div class='del'>-	"normal",</div><div class='del'>-	"verbose",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const char * const ice_fwlog_log_size[] = {</div><div class='del'>-	"128K",</div><div class='del'>-	"256K",</div><div class='del'>-	"512K",</div><div class='del'>-	"1M",</div><div class='del'>-	"2M",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_fwlog_print_module_cfg - print current FW logging module configuration</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @module: module to print</div><div class='del'>- * @s: the seq file to put data into</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-ice_fwlog_print_module_cfg(struct ice_hw *hw, int module, struct seq_file *s)</div><div class='del'>-{</div><div class='del'>-	struct ice_fwlog_cfg *cfg = &amp;hw-&gt;fwlog_cfg;</div><div class='del'>-	struct ice_fwlog_module_entry *entry;</div><div class='del'>-</div><div class='del'>-	if (module != ICE_AQC_FW_LOG_ID_MAX) {</div><div class='del'>-		entry =	&amp;cfg-&gt;module_entries[module];</div><div class='del'>-</div><div class='del'>-		seq_printf(s, "\tModule: %s, Log Level: %s\n",</div><div class='del'>-			   ice_fwlog_module_string[entry-&gt;module_id],</div><div class='del'>-			   ice_fwlog_level_string[entry-&gt;log_level]);</div><div class='del'>-	} else {</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; ICE_AQC_FW_LOG_ID_MAX; i++) {</div><div class='del'>-			entry =	&amp;cfg-&gt;module_entries[i];</div><div class='del'>-</div><div class='del'>-			seq_printf(s, "\tModule: %s, Log Level: %s\n",</div><div class='del'>-				   ice_fwlog_module_string[entry-&gt;module_id],</div><div class='del'>-				   ice_fwlog_level_string[entry-&gt;log_level]);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ice_find_module_by_dentry(struct ice_pf *pf, struct dentry *d)</div><div class='del'>-{</div><div class='del'>-	int i, module;</div><div class='del'>-</div><div class='del'>-	module = -1;</div><div class='del'>-	/* find the module based on the dentry */</div><div class='del'>-	for (i = 0; i &lt; ICE_NR_FW_LOG_MODULES; i++) {</div><div class='del'>-		if (d == pf-&gt;ice_debugfs_pf_fwlog_modules[i]) {</div><div class='del'>-			module = i;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return module;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_module_show - read from 'module' file</div><div class='del'>- * @s: the opened file</div><div class='del'>- * @v: pointer to the offset</div><div class='del'>- */</div><div class='del'>-static int ice_debugfs_module_show(struct seq_file *s, void *v)</div><div class='del'>-{</div><div class='del'>-	const struct file *filp = s-&gt;file;</div><div class='del'>-	struct dentry *dentry;</div><div class='del'>-	struct ice_pf *pf;</div><div class='del'>-	int module;</div><div class='del'>-</div><div class='del'>-	dentry = file_dentry(filp);</div><div class='del'>-	pf = s-&gt;private;</div><div class='del'>-</div><div class='del'>-	module = ice_find_module_by_dentry(pf, dentry);</div><div class='del'>-	if (module &lt; 0) {</div><div class='del'>-		dev_info(ice_pf_to_dev(pf), "unknown module\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ice_fwlog_print_module_cfg(&amp;pf-&gt;hw, module, s);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ice_debugfs_module_open(struct inode *inode, struct file *filp)</div><div class='del'>-{</div><div class='del'>-	return single_open(filp, ice_debugfs_module_show, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_module_write - write into 'module' file</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buf: where to find the user's data</div><div class='del'>- * @count: the length of the user's data</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- */</div><div class='del'>-static ssize_t</div><div class='del'>-ice_debugfs_module_write(struct file *filp, const char __user *buf,</div><div class='del'>-			 size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ice_pf *pf = file_inode(filp)-&gt;i_private;</div><div class='del'>-	struct dentry *dentry = file_dentry(filp);</div><div class='del'>-	struct device *dev = ice_pf_to_dev(pf);</div><div class='del'>-	char user_val[16], *cmd_buf;</div><div class='del'>-	int module, log_level, cnt;</div><div class='del'>-</div><div class='del'>-	/* don't allow partial writes or invalid input */</div><div class='del'>-	if (*ppos != 0 || count &gt; 8)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cmd_buf = memdup_user_nul(buf, count);</div><div class='del'>-	if (IS_ERR(cmd_buf))</div><div class='del'>-		return PTR_ERR(cmd_buf);</div><div class='del'>-</div><div class='del'>-	module = ice_find_module_by_dentry(pf, dentry);</div><div class='del'>-	if (module &lt; 0) {</div><div class='del'>-		dev_info(dev, "unknown module\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cnt = sscanf(cmd_buf, "%s", user_val);</div><div class='del'>-	if (cnt != 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	log_level = sysfs_match_string(ice_fwlog_level_string, user_val);</div><div class='del'>-	if (log_level &lt; 0) {</div><div class='del'>-		dev_info(dev, "unknown log level '%s'\n", user_val);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (module != ICE_AQC_FW_LOG_ID_MAX) {</div><div class='del'>-		ice_pf_fwlog_update_module(pf, log_level, module);</div><div class='del'>-	} else {</div><div class='del'>-		/* the module 'all' is a shortcut so that we can set</div><div class='del'>-		 * all of the modules to the same level quickly</div><div class='del'>-		 */</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; ICE_AQC_FW_LOG_ID_MAX; i++)</div><div class='del'>-			ice_pf_fwlog_update_module(pf, log_level, i);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations ice_debugfs_module_fops = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.open  = ice_debugfs_module_open,</div><div class='del'>-	.read = seq_read,</div><div class='del'>-	.release = single_release,</div><div class='del'>-	.write = ice_debugfs_module_write,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_nr_messages_read - read from 'nr_messages' file</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buffer: where to write the data for the user to read</div><div class='del'>- * @count: the size of the user's buffer</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- */</div><div class='del'>-static ssize_t ice_debugfs_nr_messages_read(struct file *filp,</div><div class='del'>-					    char __user *buffer, size_t count,</div><div class='del'>-					    loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ice_pf *pf = filp-&gt;private_data;</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	char buff[32] = {};</div><div class='del'>-</div><div class='del'>-	snprintf(buff, sizeof(buff), "%d\n",</div><div class='del'>-		 hw-&gt;fwlog_cfg.log_resolution);</div><div class='del'>-</div><div class='del'>-	return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_nr_messages_write - write into 'nr_messages' file</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buf: where to find the user's data</div><div class='del'>- * @count: the length of the user's data</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- */</div><div class='del'>-static ssize_t</div><div class='del'>-ice_debugfs_nr_messages_write(struct file *filp, const char __user *buf,</div><div class='del'>-			      size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ice_pf *pf = filp-&gt;private_data;</div><div class='del'>-	struct device *dev = ice_pf_to_dev(pf);</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	char user_val[8], *cmd_buf;</div><div class='del'>-	s16 nr_messages;</div><div class='del'>-	ssize_t ret;</div><div class='del'>-</div><div class='del'>-	/* don't allow partial writes or invalid input */</div><div class='del'>-	if (*ppos != 0 || count &gt; 4)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cmd_buf = memdup_user_nul(buf, count);</div><div class='del'>-	if (IS_ERR(cmd_buf))</div><div class='del'>-		return PTR_ERR(cmd_buf);</div><div class='del'>-</div><div class='del'>-	ret = sscanf(cmd_buf, "%s", user_val);</div><div class='del'>-	if (ret != 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ret = kstrtos16(user_val, 0, &amp;nr_messages);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (nr_messages &lt; ICE_AQC_FW_LOG_MIN_RESOLUTION ||</div><div class='del'>-	    nr_messages &gt; ICE_AQC_FW_LOG_MAX_RESOLUTION) {</div><div class='del'>-		dev_err(dev, "Invalid FW log number of messages %d, value must be between %d - %d\n",</div><div class='del'>-			nr_messages, ICE_AQC_FW_LOG_MIN_RESOLUTION,</div><div class='del'>-			ICE_AQC_FW_LOG_MAX_RESOLUTION);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	hw-&gt;fwlog_cfg.log_resolution = nr_messages;</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations ice_debugfs_nr_messages_fops = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.open  = simple_open,</div><div class='del'>-	.read = ice_debugfs_nr_messages_read,</div><div class='del'>-	.write = ice_debugfs_nr_messages_write,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_enable_read - read from 'enable' file</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buffer: where to write the data for the user to read</div><div class='del'>- * @count: the size of the user's buffer</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- */</div><div class='del'>-static ssize_t ice_debugfs_enable_read(struct file *filp,</div><div class='del'>-				       char __user *buffer, size_t count,</div><div class='del'>-				       loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ice_pf *pf = filp-&gt;private_data;</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	char buff[32] = {};</div><div class='del'>-</div><div class='del'>-	snprintf(buff, sizeof(buff), "%u\n",</div><div class='del'>-		 (u16)(hw-&gt;fwlog_cfg.options &amp;</div><div class='del'>-		 ICE_FWLOG_OPTION_IS_REGISTERED) &gt;&gt; 3);</div><div class='del'>-</div><div class='del'>-	return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_enable_write - write into 'enable' file</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buf: where to find the user's data</div><div class='del'>- * @count: the length of the user's data</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- */</div><div class='del'>-static ssize_t</div><div class='del'>-ice_debugfs_enable_write(struct file *filp, const char __user *buf,</div><div class='del'>-			 size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ice_pf *pf = filp-&gt;private_data;</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	char user_val[8], *cmd_buf;</div><div class='del'>-	bool enable;</div><div class='del'>-	ssize_t ret;</div><div class='del'>-</div><div class='del'>-	/* don't allow partial writes or invalid input */</div><div class='del'>-	if (*ppos != 0 || count &gt; 2)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cmd_buf = memdup_user_nul(buf, count);</div><div class='del'>-	if (IS_ERR(cmd_buf))</div><div class='del'>-		return PTR_ERR(cmd_buf);</div><div class='del'>-</div><div class='del'>-	ret = sscanf(cmd_buf, "%s", user_val);</div><div class='del'>-	if (ret != 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ret = kstrtobool(user_val, &amp;enable);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto enable_write_error;</div><div class='del'>-</div><div class='del'>-	if (enable)</div><div class='del'>-		hw-&gt;fwlog_cfg.options |= ICE_FWLOG_OPTION_ARQ_ENA;</div><div class='del'>-	else</div><div class='del'>-		hw-&gt;fwlog_cfg.options &amp;= ~ICE_FWLOG_OPTION_ARQ_ENA;</div><div class='del'>-</div><div class='del'>-	ret = ice_fwlog_set(hw, &amp;hw-&gt;fwlog_cfg);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto enable_write_error;</div><div class='del'>-</div><div class='del'>-	if (enable)</div><div class='del'>-		ret = ice_fwlog_register(hw);</div><div class='del'>-	else</div><div class='del'>-		ret = ice_fwlog_unregister(hw);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		goto enable_write_error;</div><div class='del'>-</div><div class='del'>-	/* if we get here, nothing went wrong; return count since we didn't</div><div class='del'>-	 * really write anything</div><div class='del'>-	 */</div><div class='del'>-	ret = (ssize_t)count;</div><div class='del'>-</div><div class='del'>-enable_write_error:</div><div class='del'>-	/* This function always consumes all of the written input, or produces</div><div class='del'>-	 * an error. Check and enforce this. Otherwise, the write operation</div><div class='del'>-	 * won't complete properly.</div><div class='del'>-	 */</div><div class='del'>-	if (WARN_ON(ret != (ssize_t)count &amp;&amp; ret &gt;= 0))</div><div class='del'>-		ret = -EIO;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations ice_debugfs_enable_fops = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.open  = simple_open,</div><div class='del'>-	.read = ice_debugfs_enable_read,</div><div class='del'>-	.write = ice_debugfs_enable_write,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_log_size_read - read from 'log_size' file</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buffer: where to write the data for the user to read</div><div class='del'>- * @count: the size of the user's buffer</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- */</div><div class='del'>-static ssize_t ice_debugfs_log_size_read(struct file *filp,</div><div class='del'>-					 char __user *buffer, size_t count,</div><div class='del'>-					 loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ice_pf *pf = filp-&gt;private_data;</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	char buff[32] = {};</div><div class='del'>-	int index;</div><div class='del'>-</div><div class='del'>-	index = hw-&gt;fwlog_ring.index;</div><div class='del'>-	snprintf(buff, sizeof(buff), "%s\n", ice_fwlog_log_size[index]);</div><div class='del'>-</div><div class='del'>-	return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_log_size_write - write into 'log_size' file</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buf: where to find the user's data</div><div class='del'>- * @count: the length of the user's data</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- */</div><div class='del'>-static ssize_t</div><div class='del'>-ice_debugfs_log_size_write(struct file *filp, const char __user *buf,</div><div class='del'>-			   size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ice_pf *pf = filp-&gt;private_data;</div><div class='del'>-	struct device *dev = ice_pf_to_dev(pf);</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	char user_val[8], *cmd_buf;</div><div class='del'>-	ssize_t ret;</div><div class='del'>-	int index;</div><div class='del'>-</div><div class='del'>-	/* don't allow partial writes or invalid input */</div><div class='del'>-	if (*ppos != 0 || count &gt; 5)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cmd_buf = memdup_user_nul(buf, count);</div><div class='del'>-	if (IS_ERR(cmd_buf))</div><div class='del'>-		return PTR_ERR(cmd_buf);</div><div class='del'>-</div><div class='del'>-	ret = sscanf(cmd_buf, "%s", user_val);</div><div class='del'>-	if (ret != 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	index = sysfs_match_string(ice_fwlog_log_size, user_val);</div><div class='del'>-	if (index &lt; 0) {</div><div class='del'>-		dev_info(dev, "Invalid log size '%s'. The value must be one of 128K, 256K, 512K, 1M, 2M\n",</div><div class='del'>-			 user_val);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto log_size_write_error;</div><div class='del'>-	} else if (hw-&gt;fwlog_cfg.options &amp; ICE_FWLOG_OPTION_IS_REGISTERED) {</div><div class='del'>-		dev_info(dev, "FW logging is currently running. Please disable FW logging to change log_size\n");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto log_size_write_error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* free all the buffers and the tracking info and resize */</div><div class='del'>-	ice_fwlog_realloc_rings(hw, index);</div><div class='del'>-</div><div class='del'>-	/* if we get here, nothing went wrong; return count since we didn't</div><div class='del'>-	 * really write anything</div><div class='del'>-	 */</div><div class='del'>-	ret = (ssize_t)count;</div><div class='del'>-</div><div class='del'>-log_size_write_error:</div><div class='del'>-	/* This function always consumes all of the written input, or produces</div><div class='del'>-	 * an error. Check and enforce this. Otherwise, the write operation</div><div class='del'>-	 * won't complete properly.</div><div class='del'>-	 */</div><div class='del'>-	if (WARN_ON(ret != (ssize_t)count &amp;&amp; ret &gt;= 0))</div><div class='del'>-		ret = -EIO;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations ice_debugfs_log_size_fops = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.open  = simple_open,</div><div class='del'>-	.read = ice_debugfs_log_size_read,</div><div class='del'>-	.write = ice_debugfs_log_size_write,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_data_read - read from 'data' file</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buffer: where to write the data for the user to read</div><div class='del'>- * @count: the size of the user's buffer</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- */</div><div class='del'>-static ssize_t ice_debugfs_data_read(struct file *filp, char __user *buffer,</div><div class='del'>-				     size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ice_pf *pf = filp-&gt;private_data;</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	int data_copied = 0;</div><div class='del'>-	bool done = false;</div><div class='del'>-</div><div class='del'>-	if (ice_fwlog_ring_empty(&amp;hw-&gt;fwlog_ring))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	while (!ice_fwlog_ring_empty(&amp;hw-&gt;fwlog_ring) &amp;&amp; !done) {</div><div class='del'>-		struct ice_fwlog_data *log;</div><div class='del'>-		u16 cur_buf_len;</div><div class='del'>-</div><div class='del'>-		log = &amp;hw-&gt;fwlog_ring.rings[hw-&gt;fwlog_ring.head];</div><div class='del'>-		cur_buf_len = log-&gt;data_size;</div><div class='del'>-		if (cur_buf_len &gt;= count) {</div><div class='del'>-			done = true;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (copy_to_user(buffer, log-&gt;data, cur_buf_len)) {</div><div class='del'>-			/* if there is an error then bail and return whatever</div><div class='del'>-			 * the driver has copied so far</div><div class='del'>-			 */</div><div class='del'>-			done = true;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		data_copied += cur_buf_len;</div><div class='del'>-		buffer += cur_buf_len;</div><div class='del'>-		count -= cur_buf_len;</div><div class='del'>-		*ppos += cur_buf_len;</div><div class='del'>-		ice_fwlog_ring_increment(&amp;hw-&gt;fwlog_ring.head,</div><div class='del'>-					 hw-&gt;fwlog_ring.size);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return data_copied;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_data_write - write into 'data' file</div><div class='del'>- * @filp: the opened file</div><div class='del'>- * @buf: where to find the user's data</div><div class='del'>- * @count: the length of the user's data</div><div class='del'>- * @ppos: file position offset</div><div class='del'>- */</div><div class='del'>-static ssize_t</div><div class='del'>-ice_debugfs_data_write(struct file *filp, const char __user *buf, size_t count,</div><div class='del'>-		       loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	struct ice_pf *pf = filp-&gt;private_data;</div><div class='del'>-	struct device *dev = ice_pf_to_dev(pf);</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	ssize_t ret;</div><div class='del'>-</div><div class='del'>-	/* don't allow partial writes */</div><div class='del'>-	if (*ppos != 0)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* any value is allowed to clear the buffer so no need to even look at</div><div class='del'>-	 * what the value is</div><div class='del'>-	 */</div><div class='del'>-	if (!(hw-&gt;fwlog_cfg.options &amp; ICE_FWLOG_OPTION_IS_REGISTERED)) {</div><div class='del'>-		hw-&gt;fwlog_ring.head = 0;</div><div class='del'>-		hw-&gt;fwlog_ring.tail = 0;</div><div class='del'>-	} else {</div><div class='del'>-		dev_info(dev, "Can't clear FW log data while FW log running\n");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto nr_buffs_write_error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* if we get here, nothing went wrong; return count since we didn't</div><div class='del'>-	 * really write anything</div><div class='del'>-	 */</div><div class='del'>-	ret = (ssize_t)count;</div><div class='del'>-</div><div class='del'>-nr_buffs_write_error:</div><div class='del'>-	/* This function always consumes all of the written input, or produces</div><div class='del'>-	 * an error. Check and enforce this. Otherwise, the write operation</div><div class='del'>-	 * won't complete properly.</div><div class='del'>-	 */</div><div class='del'>-	if (WARN_ON(ret != (ssize_t)count &amp;&amp; ret &gt;= 0))</div><div class='del'>-		ret = -EIO;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations ice_debugfs_data_fops = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.open  = simple_open,</div><div class='del'>-	.read = ice_debugfs_data_read,</div><div class='del'>-	.write = ice_debugfs_data_write,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_debugfs_fwlog_init - setup the debugfs directory</div><div class='del'>- * @pf: the ice that is starting up</div><div class='del'>- */</div><div class='del'>-void ice_debugfs_fwlog_init(struct ice_pf *pf)</div><div class='add'>+int ice_debugfs_pf_init(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='ctx'> 	const char *name = pci_name(pf-&gt;pdev);</div><div class='del'>-	struct dentry *fw_modules_dir;</div><div class='del'>-	struct dentry **fw_modules;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* only support fw log commands on PF 0 */</div><div class='del'>-	if (pf-&gt;hw.bus.func)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* allocate space for this first because if it fails then we don't</div><div class='del'>-	 * need to unwind</div><div class='del'>-	 */</div><div class='del'>-	fw_modules = kcalloc(ICE_NR_FW_LOG_MODULES, sizeof(*fw_modules),</div><div class='del'>-			     GFP_KERNEL);</div><div class='del'>-	if (!fw_modules)</div><div class='del'>-		return;</div><div class='ctx'> </div><div class='ctx'> 	pf-&gt;ice_debugfs_pf = debugfs_create_dir(name, ice_debugfs_root);</div><div class='ctx'> 	if (IS_ERR(pf-&gt;ice_debugfs_pf))</div><div class='del'>-		goto err_create_module_files;</div><div class='del'>-</div><div class='del'>-	pf-&gt;ice_debugfs_pf_fwlog = debugfs_create_dir("fwlog",</div><div class='del'>-						      pf-&gt;ice_debugfs_pf);</div><div class='del'>-	if (IS_ERR(pf-&gt;ice_debugfs_pf))</div><div class='del'>-		goto err_create_module_files;</div><div class='add'>+		return PTR_ERR(pf-&gt;ice_debugfs_pf);</div><div class='ctx'> </div><div class='del'>-	fw_modules_dir = debugfs_create_dir("modules",</div><div class='del'>-					    pf-&gt;ice_debugfs_pf_fwlog);</div><div class='del'>-	if (IS_ERR(fw_modules_dir))</div><div class='del'>-		goto err_create_module_files;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ICE_NR_FW_LOG_MODULES; i++) {</div><div class='del'>-		fw_modules[i] = debugfs_create_file(ice_fwlog_module_string[i],</div><div class='del'>-						    0600, fw_modules_dir, pf,</div><div class='del'>-						    &amp;ice_debugfs_module_fops);</div><div class='del'>-		if (IS_ERR(fw_modules[i]))</div><div class='del'>-			goto err_create_module_files;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("nr_messages", 0600,</div><div class='del'>-			    pf-&gt;ice_debugfs_pf_fwlog, pf,</div><div class='del'>-			    &amp;ice_debugfs_nr_messages_fops);</div><div class='del'>-</div><div class='del'>-	pf-&gt;ice_debugfs_pf_fwlog_modules = fw_modules;</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("enable", 0600, pf-&gt;ice_debugfs_pf_fwlog,</div><div class='del'>-			    pf, &amp;ice_debugfs_enable_fops);</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("log_size", 0600, pf-&gt;ice_debugfs_pf_fwlog,</div><div class='del'>-			    pf, &amp;ice_debugfs_log_size_fops);</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("data", 0600, pf-&gt;ice_debugfs_pf_fwlog,</div><div class='del'>-			    pf, &amp;ice_debugfs_data_fops);</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-err_create_module_files:</div><div class='del'>-	debugfs_remove_recursive(pf-&gt;ice_debugfs_pf_fwlog);</div><div class='del'>-	kfree(fw_modules);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_devids.h b/drivers/net/ethernet/intel/ice/ice_devids.h<br/>index 34fd604132f5..bd4e66df0372 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_devids.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_devids.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_devids.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_devids.h</a></div><div class='hunk'>@@ -6,6 +6,24 @@</div><div class='ctx'> </div><div class='ctx'> /* Device IDs */</div><div class='ctx'> #define ICE_DEV_ID_E822_SI_DFLT         0x1888</div><div class='add'>+/* Intel(R) Ethernet Controller E835-CC for backplane */</div><div class='add'>+#define ICE_DEV_ID_E835CC_BACKPLANE	0x1248</div><div class='add'>+/* Intel(R) Ethernet Controller E835-CC for QSFP */</div><div class='add'>+#define ICE_DEV_ID_E835CC_QSFP56	0x1249</div><div class='add'>+/* Intel(R) Ethernet Controller E835-CC for SFP */</div><div class='add'>+#define ICE_DEV_ID_E835CC_SFP		0x124A</div><div class='add'>+/* Intel(R) Ethernet Controller E835-C for backplane */</div><div class='add'>+#define ICE_DEV_ID_E835C_BACKPLANE	0x1261</div><div class='add'>+/* Intel(R) Ethernet Controller E835-C for QSFP */</div><div class='add'>+#define ICE_DEV_ID_E835C_QSFP		0x1262</div><div class='add'>+/* Intel(R) Ethernet Controller E835-C for SFP */</div><div class='add'>+#define ICE_DEV_ID_E835C_SFP		0x1263</div><div class='add'>+/* Intel(R) Ethernet Controller E835-L for backplane */</div><div class='add'>+#define ICE_DEV_ID_E835_L_BACKPLANE	0x1265</div><div class='add'>+/* Intel(R) Ethernet Controller E835-L for QSFP */</div><div class='add'>+#define ICE_DEV_ID_E835_L_QSFP		0x1266</div><div class='add'>+/* Intel(R) Ethernet Controller E835-L for SFP */</div><div class='add'>+#define ICE_DEV_ID_E835_L_SFP		0x1267</div><div class='ctx'> /* Intel(R) Ethernet Connection E823-L for backplane */</div><div class='ctx'> #define ICE_DEV_ID_E823L_BACKPLANE	0x124C</div><div class='ctx'> /* Intel(R) Ethernet Connection E823-L for SFP */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c<br/>index d5ad6d84007c..53b54e395a2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dpll.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dpll.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dpll.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_dpll.c</a></div><div class='hunk'>@@ -11,6 +11,43 @@</div><div class='ctx'> #define ICE_DPLL_RCLK_NUM_PER_PF		1</div><div class='ctx'> #define ICE_DPLL_PIN_ESYNC_PULSE_HIGH_PERCENT	25</div><div class='ctx'> #define ICE_DPLL_PIN_GEN_RCLK_FREQ		1953125</div><div class='add'>+#define ICE_DPLL_PIN_PRIO_OUTPUT		0xff</div><div class='add'>+#define ICE_DPLL_INPUT_REF_NUM			10</div><div class='add'>+#define ICE_DPLL_PHASE_OFFSET_PERIOD		2</div><div class='add'>+#define ICE_DPLL_SW_PIN_INPUT_BASE_SFP		4</div><div class='add'>+#define ICE_DPLL_SW_PIN_INPUT_BASE_QSFP		6</div><div class='add'>+#define ICE_DPLL_SW_PIN_OUTPUT_BASE		0</div><div class='add'>+</div><div class='add'>+#define ICE_DPLL_PIN_SW_INPUT_ABS(in_idx) \</div><div class='add'>+	(ICE_DPLL_SW_PIN_INPUT_BASE_SFP + (in_idx))</div><div class='add'>+</div><div class='add'>+#define ICE_DPLL_PIN_SW_1_INPUT_ABS_IDX \</div><div class='add'>+	(ICE_DPLL_PIN_SW_INPUT_ABS(ICE_DPLL_PIN_SW_1_IDX))</div><div class='add'>+</div><div class='add'>+#define ICE_DPLL_PIN_SW_2_INPUT_ABS_IDX \</div><div class='add'>+	(ICE_DPLL_PIN_SW_INPUT_ABS(ICE_DPLL_PIN_SW_2_IDX))</div><div class='add'>+</div><div class='add'>+#define ICE_DPLL_PIN_SW_OUTPUT_ABS(out_idx) \</div><div class='add'>+	(ICE_DPLL_SW_PIN_OUTPUT_BASE + (out_idx))</div><div class='add'>+</div><div class='add'>+#define ICE_DPLL_PIN_SW_1_OUTPUT_ABS_IDX \</div><div class='add'>+	(ICE_DPLL_PIN_SW_OUTPUT_ABS(ICE_DPLL_PIN_SW_1_IDX))</div><div class='add'>+</div><div class='add'>+#define ICE_DPLL_PIN_SW_2_OUTPUT_ABS_IDX \</div><div class='add'>+	(ICE_DPLL_PIN_SW_OUTPUT_ABS(ICE_DPLL_PIN_SW_2_IDX))</div><div class='add'>+</div><div class='add'>+#define ICE_SR_PFA_DPLL_DEFAULTS		0x152</div><div class='add'>+#define ICE_DPLL_PFA_REF_SYNC_TYPE		0x2420</div><div class='add'>+#define ICE_DPLL_PFA_REF_SYNC_TYPE2		0x2424</div><div class='add'>+#define ICE_DPLL_PFA_END			0xFFFF</div><div class='add'>+#define ICE_DPLL_PFA_HEADER_LEN			4</div><div class='add'>+#define ICE_DPLL_PFA_ENTRY_LEN			3</div><div class='add'>+#define ICE_DPLL_PFA_MAILBOX_REF_SYNC_PIN_S	4</div><div class='add'>+#define ICE_DPLL_PFA_MASK_OFFSET		1</div><div class='add'>+#define ICE_DPLL_PFA_VALUE_OFFSET		2</div><div class='add'>+</div><div class='add'>+#define ICE_DPLL_E810C_SFP_NC_PINS		2</div><div class='add'>+#define ICE_DPLL_E810C_SFP_NC_START		4</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * enum ice_dpll_pin_type - enumerate ice pin types:</div><div class='hunk'>@@ -18,25 +55,61 @@</div><div class='ctx'>  * @ICE_DPLL_PIN_TYPE_INPUT: input pin</div><div class='ctx'>  * @ICE_DPLL_PIN_TYPE_OUTPUT: output pin</div><div class='ctx'>  * @ICE_DPLL_PIN_TYPE_RCLK_INPUT: recovery clock input pin</div><div class='add'>+ * @ICE_DPLL_PIN_TYPE_SOFTWARE: software controlled SMA/U.FL pins</div><div class='ctx'>  */</div><div class='ctx'> enum ice_dpll_pin_type {</div><div class='ctx'> 	ICE_DPLL_PIN_INVALID,</div><div class='ctx'> 	ICE_DPLL_PIN_TYPE_INPUT,</div><div class='ctx'> 	ICE_DPLL_PIN_TYPE_OUTPUT,</div><div class='ctx'> 	ICE_DPLL_PIN_TYPE_RCLK_INPUT,</div><div class='add'>+	ICE_DPLL_PIN_TYPE_SOFTWARE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const char * const pin_type_name[] = {</div><div class='ctx'> 	[ICE_DPLL_PIN_TYPE_INPUT] = "input",</div><div class='ctx'> 	[ICE_DPLL_PIN_TYPE_OUTPUT] = "output",</div><div class='ctx'> 	[ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input",</div><div class='add'>+	[ICE_DPLL_PIN_TYPE_SOFTWARE] = "software",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const char * const ice_dpll_sw_pin_sma[] = { "SMA1", "SMA2" };</div><div class='add'>+static const char * const ice_dpll_sw_pin_ufl[] = { "U.FL1", "U.FL2" };</div><div class='add'>+</div><div class='ctx'> static const struct dpll_pin_frequency ice_esync_range[] = {</div><div class='ctx'> 	DPLL_PIN_FREQUENCY_RANGE(0, DPLL_PIN_FREQUENCY_1_HZ),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_is_sw_pin - check if given pin shall be controlled by SW</div><div class='add'>+ * @pf: private board structure</div><div class='add'>+ * @index: index of a pin as understood by FW</div><div class='add'>+ * @input: true for input, false for output</div><div class='add'>+ *</div><div class='add'>+ * Check if the pin shall be controlled by SW - instead of providing raw access</div><div class='add'>+ * for pin control. For E810 NIC with dpll there is additional MUX-related logic</div><div class='add'>+ * between SMA/U.FL pins/connectors and dpll device, best to give user access</div><div class='add'>+ * with series of wrapper functions as from user perspective they convey single</div><div class='add'>+ * functionality rather then separated pins.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * true - pin controlled by SW</div><div class='add'>+ * * false - pin not controlled by SW</div><div class='add'>+ */</div><div class='add'>+static bool ice_dpll_is_sw_pin(struct ice_pf *pf, u8 index, bool input)</div><div class='add'>+{</div><div class='add'>+	if (input &amp;&amp; pf-&gt;hw.device_id == ICE_DEV_ID_E810C_QSFP)</div><div class='add'>+		index -= ICE_DPLL_SW_PIN_INPUT_BASE_QSFP -</div><div class='add'>+			 ICE_DPLL_SW_PIN_INPUT_BASE_SFP;</div><div class='add'>+</div><div class='add'>+	if ((input &amp;&amp; (index == ICE_DPLL_PIN_SW_1_INPUT_ABS_IDX ||</div><div class='add'>+		       index == ICE_DPLL_PIN_SW_2_INPUT_ABS_IDX)) ||</div><div class='add'>+	    (!input &amp;&amp; (index == ICE_DPLL_PIN_SW_1_OUTPUT_ABS_IDX ||</div><div class='add'>+			index == ICE_DPLL_PIN_SW_2_OUTPUT_ABS_IDX)))</div><div class='add'>+		return true;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_is_reset - check if reset is in progress</div><div class='ctx'>  * @pf: private board structure</div><div class='ctx'>  * @extack: error reporting</div><div class='hunk'>@@ -95,9 +168,9 @@ ice_dpll_pin_freq_set(struct ice_pf *pf, struct ice_dpll_pin *pin,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		NL_SET_ERR_MSG_FMT(extack,</div><div class='del'>-				   "err:%d %s failed to set pin freq:%u on pin:%u\n",</div><div class='add'>+				   "err:%d %s failed to set pin freq:%u on pin:%u",</div><div class='ctx'> 				   ret,</div><div class='del'>-				   ice_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='add'>+				   libie_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='ctx'> 				   freq, pin-&gt;idx);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -280,6 +353,87 @@ ice_dpll_output_frequency_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_sw_pin_frequency_set - callback to set frequency of SW pin</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: pointer to dpll</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @frequency: on success holds pin's frequency</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Calls set frequency command for corresponding and active input/output pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Calls a function which acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error pin not active or couldn't get from hw</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_pin_frequency_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			      const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			      u64 frequency, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *sma = pin_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!sma-&gt;active) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "pin is not active");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (sma-&gt;direction == DPLL_PIN_DIRECTION_INPUT)</div><div class='add'>+		ret = ice_dpll_input_frequency_set(NULL, sma-&gt;input, dpll,</div><div class='add'>+						   dpll_priv, frequency,</div><div class='add'>+						   extack);</div><div class='add'>+	else</div><div class='add'>+		ret = ice_dpll_output_frequency_set(NULL, sma-&gt;output, dpll,</div><div class='add'>+						    dpll_priv, frequency,</div><div class='add'>+						    extack);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_sw_pin_frequency_get - callback for get frequency of SW pin</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: pointer to dpll</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @frequency: on success holds pin's frequency</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Calls get frequency command for corresponding active input/output.</div><div class='add'>+ *</div><div class='add'>+ * Context: Calls a function which acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error pin not active or couldn't get from hw</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_pin_frequency_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			      const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			      u64 *frequency, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *sma = pin_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!sma-&gt;active) {</div><div class='add'>+		*frequency = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	if (sma-&gt;direction == DPLL_PIN_DIRECTION_INPUT) {</div><div class='add'>+		ret = ice_dpll_input_frequency_get(NULL, sma-&gt;input, dpll,</div><div class='add'>+						   dpll_priv, frequency,</div><div class='add'>+						   extack);</div><div class='add'>+	} else {</div><div class='add'>+		ret = ice_dpll_output_frequency_get(NULL, sma-&gt;output, dpll,</div><div class='add'>+						    dpll_priv, frequency,</div><div class='add'>+						    extack);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_pin_enable - enable a pin on dplls</div><div class='ctx'>  * @hw: board private hw structure</div><div class='ctx'>  * @pin: pointer to a pin</div><div class='hunk'>@@ -322,8 +476,8 @@ ice_dpll_pin_enable(struct ice_hw *hw, struct ice_dpll_pin *pin,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		NL_SET_ERR_MSG_FMT(extack,</div><div class='del'>-				   "err:%d %s failed to enable %s pin:%u\n",</div><div class='del'>-				   ret, ice_aq_str(hw-&gt;adminq.sq_last_status),</div><div class='add'>+				   "err:%d %s failed to enable %s pin:%u",</div><div class='add'>+				   ret, libie_aq_str(hw-&gt;adminq.sq_last_status),</div><div class='ctx'> 				   pin_type_name[pin_type], pin-&gt;idx);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -367,14 +521,75 @@ ice_dpll_pin_disable(struct ice_hw *hw, struct ice_dpll_pin *pin,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		NL_SET_ERR_MSG_FMT(extack,</div><div class='del'>-				   "err:%d %s failed to disable %s pin:%u\n",</div><div class='del'>-				   ret, ice_aq_str(hw-&gt;adminq.sq_last_status),</div><div class='add'>+				   "err:%d %s failed to disable %s pin:%u",</div><div class='add'>+				   ret, libie_aq_str(hw-&gt;adminq.sq_last_status),</div><div class='ctx'> 				   pin_type_name[pin_type], pin-&gt;idx);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_sw_pins_update - update status of all SW pins</div><div class='add'>+ * @pf: private board struct</div><div class='add'>+ *</div><div class='add'>+ * Determine and update pin struct fields (direction/active) of their current</div><div class='add'>+ * values for all the SW controlled pins.</div><div class='add'>+ *</div><div class='add'>+ * Context: Call with pf-&gt;dplls.lock held</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - OK</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_pins_update(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct ice_dplls *d = &amp;pf-&gt;dplls;</div><div class='add'>+	struct ice_dpll_pin *p;</div><div class='add'>+	u8 data = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ice_read_sma_ctrl(&amp;pf-&gt;hw, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	/* no change since last check */</div><div class='add'>+	if (d-&gt;sma_data == data)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * SMA1/U.FL1 vs SMA2/U.FL2 are using different bit scheme to decide</div><div class='add'>+	 * on their direction and if are active</div><div class='add'>+	 */</div><div class='add'>+	p = &amp;d-&gt;sma[ICE_DPLL_PIN_SW_1_IDX];</div><div class='add'>+	p-&gt;active = true;</div><div class='add'>+	p-&gt;direction = DPLL_PIN_DIRECTION_INPUT;</div><div class='add'>+	if (data &amp; ICE_SMA1_DIR_EN) {</div><div class='add'>+		p-&gt;direction = DPLL_PIN_DIRECTION_OUTPUT;</div><div class='add'>+		if (data &amp; ICE_SMA1_TX_EN)</div><div class='add'>+			p-&gt;active = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	p = &amp;d-&gt;sma[ICE_DPLL_PIN_SW_2_IDX];</div><div class='add'>+	p-&gt;active = true;</div><div class='add'>+	p-&gt;direction = DPLL_PIN_DIRECTION_INPUT;</div><div class='add'>+	if ((data &amp; ICE_SMA2_INACTIVE_MASK) == ICE_SMA2_INACTIVE_MASK)</div><div class='add'>+		p-&gt;active = false;</div><div class='add'>+	else if (data &amp; ICE_SMA2_DIR_EN)</div><div class='add'>+		p-&gt;direction = DPLL_PIN_DIRECTION_OUTPUT;</div><div class='add'>+</div><div class='add'>+	p = &amp;d-&gt;ufl[ICE_DPLL_PIN_SW_1_IDX];</div><div class='add'>+	if (!(data &amp; (ICE_SMA1_DIR_EN | ICE_SMA1_TX_EN)))</div><div class='add'>+		p-&gt;active = true;</div><div class='add'>+	else</div><div class='add'>+		p-&gt;active = false;</div><div class='add'>+</div><div class='add'>+	p = &amp;d-&gt;ufl[ICE_DPLL_PIN_SW_2_IDX];</div><div class='add'>+	p-&gt;active = (data &amp; ICE_SMA2_DIR_EN) &amp;&amp; !(data &amp; ICE_SMA2_UFL2_RX_DIS);</div><div class='add'>+	d-&gt;sma_data = data;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_pin_state_update - update pin's state</div><div class='ctx'>  * @pf: private board struct</div><div class='ctx'>  * @pin: structure with pin attributes to be updated</div><div class='hunk'>@@ -471,6 +686,11 @@ ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin,</div><div class='ctx'> 					DPLL_PIN_STATE_DISCONNECTED;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='add'>+	case ICE_DPLL_PIN_TYPE_SOFTWARE:</div><div class='add'>+		ret = ice_dpll_sw_pins_update(pf);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -479,15 +699,15 @@ ice_dpll_pin_state_update(struct ice_pf *pf, struct ice_dpll_pin *pin,</div><div class='ctx'> err:</div><div class='ctx'> 	if (extack)</div><div class='ctx'> 		NL_SET_ERR_MSG_FMT(extack,</div><div class='del'>-				   "err:%d %s failed to update %s pin:%u\n",</div><div class='add'>+				   "err:%d %s failed to update %s pin:%u",</div><div class='ctx'> 				   ret,</div><div class='del'>-				   ice_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='add'>+				   libie_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='ctx'> 				   pin_type_name[pin_type], pin-&gt;idx);</div><div class='ctx'> 	else</div><div class='ctx'> 		dev_err_ratelimited(ice_pf_to_dev(pf),</div><div class='ctx'> 				    "err:%d %s failed to update %s pin:%u\n",</div><div class='ctx'> 				    ret,</div><div class='del'>-				    ice_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='add'>+				    libie_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='ctx'> 				    pin_type_name[pin_type], pin-&gt;idx);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -518,9 +738,9 @@ ice_dpll_hw_input_prio_set(struct ice_pf *pf, struct ice_dpll *dpll,</div><div class='ctx'> 				      (u8)prio);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		NL_SET_ERR_MSG_FMT(extack,</div><div class='del'>-				   "err:%d %s failed to set pin prio:%u on pin:%u\n",</div><div class='add'>+				   "err:%d %s failed to set pin prio:%u on pin:%u",</div><div class='ctx'> 				   ret,</div><div class='del'>-				   ice_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='add'>+				   libie_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='ctx'> 				   prio, pin-&gt;idx);</div><div class='ctx'> 	else</div><div class='ctx'> 		dpll-&gt;input_prio[pin-&gt;idx] = prio;</div><div class='hunk'>@@ -588,6 +808,67 @@ static int ice_dpll_mode_get(const struct dpll_device *dpll, void *dpll_priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_phase_offset_monitor_set - set phase offset monitor state</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @state: feature state to be set</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Enable/disable phase offset monitor feature of dpll.</div><div class='add'>+ *</div><div class='add'>+ * Context: Acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return: 0 - success</div><div class='add'>+ */</div><div class='add'>+static int ice_dpll_phase_offset_monitor_set(const struct dpll_device *dpll,</div><div class='add'>+					     void *dpll_priv,</div><div class='add'>+					     enum dpll_feature_state state,</div><div class='add'>+					     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll *d = dpll_priv;</div><div class='add'>+	struct ice_pf *pf = d-&gt;pf;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	if (state == DPLL_FEATURE_STATE_ENABLE)</div><div class='add'>+		d-&gt;phase_offset_monitor_period = ICE_DPLL_PHASE_OFFSET_PERIOD;</div><div class='add'>+	else</div><div class='add'>+		d-&gt;phase_offset_monitor_period = 0;</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_phase_offset_monitor_get - get phase offset monitor state</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @state: on success holds current state of phase offset monitor</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Provides current state of phase offset monitor</div><div class='add'>+ * features on dpll device.</div><div class='add'>+ *</div><div class='add'>+ * Context: Acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return: 0 - success</div><div class='add'>+ */</div><div class='add'>+static int ice_dpll_phase_offset_monitor_get(const struct dpll_device *dpll,</div><div class='add'>+					     void *dpll_priv,</div><div class='add'>+					     enum dpll_feature_state *state,</div><div class='add'>+					     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll *d = dpll_priv;</div><div class='add'>+	struct ice_pf *pf = d-&gt;pf;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	if (d-&gt;phase_offset_monitor_period)</div><div class='add'>+		*state = DPLL_FEATURE_STATE_ENABLE;</div><div class='add'>+	else</div><div class='add'>+		*state = DPLL_FEATURE_STATE_DISABLE;</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_pin_state_set - set pin's state on dpll</div><div class='ctx'>  * @pin: pointer to a pin</div><div class='ctx'>  * @pin_priv: private data pointer passed on pin registration</div><div class='hunk'>@@ -793,6 +1074,270 @@ ice_dpll_input_state_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_sma_direction_set - set direction of SMA pin</div><div class='add'>+ * @p: pointer to a pin</div><div class='add'>+ * @direction: requested direction of the pin</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Wrapper for dpll subsystem callback. Set direction of a SMA pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Call with pf-&gt;dplls.lock held</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - failed to get state</div><div class='add'>+ */</div><div class='add'>+static int ice_dpll_sma_direction_set(struct ice_dpll_pin *p,</div><div class='add'>+				      enum dpll_pin_direction direction,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u8 data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;direction == direction &amp;&amp; p-&gt;active)</div><div class='add'>+		return 0;</div><div class='add'>+	ret = ice_read_sma_ctrl(&amp;p-&gt;pf-&gt;hw, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch (p-&gt;idx) {</div><div class='add'>+	case ICE_DPLL_PIN_SW_1_IDX:</div><div class='add'>+		data &amp;= ~ICE_SMA1_MASK;</div><div class='add'>+		if (direction == DPLL_PIN_DIRECTION_OUTPUT)</div><div class='add'>+			data |= ICE_SMA1_DIR_EN;</div><div class='add'>+		break;</div><div class='add'>+	case ICE_DPLL_PIN_SW_2_IDX:</div><div class='add'>+		if (direction == DPLL_PIN_DIRECTION_INPUT) {</div><div class='add'>+			data &amp;= ~ICE_SMA2_DIR_EN;</div><div class='add'>+		} else {</div><div class='add'>+			data &amp;= ~ICE_SMA2_TX_EN;</div><div class='add'>+			data |= ICE_SMA2_DIR_EN;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	ret = ice_write_sma_ctrl(&amp;p-&gt;pf-&gt;hw, data);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = ice_dpll_pin_state_update(p-&gt;pf, p,</div><div class='add'>+						ICE_DPLL_PIN_TYPE_SOFTWARE,</div><div class='add'>+						extack);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_ufl_pin_state_set - set U.FL pin state on dpll device</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @state: requested state of the pin</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Set the state of a pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_ufl_pin_state_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			   const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			   enum dpll_pin_state state,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv, *target;</div><div class='add'>+	struct ice_dpll *d = dpll_priv;</div><div class='add'>+	enum ice_dpll_pin_type type;</div><div class='add'>+	struct ice_pf *pf = p-&gt;pf;</div><div class='add'>+	struct ice_hw *hw;</div><div class='add'>+	bool enable;</div><div class='add'>+	u8 data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (ice_dpll_is_reset(pf, extack))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	hw = &amp;pf-&gt;hw;</div><div class='add'>+	ret = ice_read_sma_ctrl(hw, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	ret = -EINVAL;</div><div class='add'>+	switch (p-&gt;idx) {</div><div class='add'>+	case ICE_DPLL_PIN_SW_1_IDX:</div><div class='add'>+		if (state == DPLL_PIN_STATE_CONNECTED) {</div><div class='add'>+			data &amp;= ~ICE_SMA1_MASK;</div><div class='add'>+			enable = true;</div><div class='add'>+		} else if (state == DPLL_PIN_STATE_DISCONNECTED) {</div><div class='add'>+			data |= ICE_SMA1_TX_EN;</div><div class='add'>+			enable = false;</div><div class='add'>+		} else {</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+		target = p-&gt;output;</div><div class='add'>+		type = ICE_DPLL_PIN_TYPE_OUTPUT;</div><div class='add'>+		break;</div><div class='add'>+	case ICE_DPLL_PIN_SW_2_IDX:</div><div class='add'>+		if (state == DPLL_PIN_STATE_SELECTABLE) {</div><div class='add'>+			data |= ICE_SMA2_DIR_EN;</div><div class='add'>+			data &amp;= ~ICE_SMA2_UFL2_RX_DIS;</div><div class='add'>+			enable = true;</div><div class='add'>+		} else if (state == DPLL_PIN_STATE_DISCONNECTED) {</div><div class='add'>+			data |= ICE_SMA2_UFL2_RX_DIS;</div><div class='add'>+			enable = false;</div><div class='add'>+		} else {</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+		target = p-&gt;input;</div><div class='add'>+		type = ICE_DPLL_PIN_TYPE_INPUT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ice_write_sma_ctrl(hw, data);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+	ret = ice_dpll_pin_state_update(pf, p, ICE_DPLL_PIN_TYPE_SOFTWARE,</div><div class='add'>+					extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		ret = ice_dpll_pin_enable(hw, target, d-&gt;dpll_idx, type, extack);</div><div class='add'>+	else</div><div class='add'>+		ret = ice_dpll_pin_disable(hw, target, type, extack);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = ice_dpll_pin_state_update(pf, target, type, extack);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_sw_pin_state_get - get SW pin state</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @state: on success holds state of the pin</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Check state of a SW pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_pin_state_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			  const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			  enum dpll_pin_state *state,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+	struct ice_dpll *d = dpll_priv;</div><div class='add'>+	struct ice_pf *pf = p-&gt;pf;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (ice_dpll_is_reset(pf, extack))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	if (!p-&gt;active) {</div><div class='add'>+		*state = DPLL_PIN_STATE_DISCONNECTED;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (p-&gt;direction == DPLL_PIN_DIRECTION_INPUT) {</div><div class='add'>+		ret = ice_dpll_pin_state_update(pf, p-&gt;input,</div><div class='add'>+						ICE_DPLL_PIN_TYPE_INPUT,</div><div class='add'>+						extack);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+		*state = p-&gt;input-&gt;state[d-&gt;dpll_idx];</div><div class='add'>+	} else {</div><div class='add'>+		ret = ice_dpll_pin_state_update(pf, p-&gt;output,</div><div class='add'>+						ICE_DPLL_PIN_TYPE_OUTPUT,</div><div class='add'>+						extack);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+		*state = p-&gt;output-&gt;state[d-&gt;dpll_idx];</div><div class='add'>+	}</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_sma_pin_state_set - set SMA pin state on dpll device</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @state: requested state of the pin</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Set state of a pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - failed to get state</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sma_pin_state_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			   const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			   enum dpll_pin_state state,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *sma = pin_priv, *target;</div><div class='add'>+	struct ice_dpll *d = dpll_priv;</div><div class='add'>+	struct ice_pf *pf = sma-&gt;pf;</div><div class='add'>+	enum ice_dpll_pin_type type;</div><div class='add'>+	bool enable;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (ice_dpll_is_reset(pf, extack))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	if (!sma-&gt;active) {</div><div class='add'>+		ret = ice_dpll_sma_direction_set(sma, sma-&gt;direction, extack);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+	}</div><div class='add'>+	if (sma-&gt;direction == DPLL_PIN_DIRECTION_INPUT) {</div><div class='add'>+		enable = state == DPLL_PIN_STATE_SELECTABLE;</div><div class='add'>+		target = sma-&gt;input;</div><div class='add'>+		type = ICE_DPLL_PIN_TYPE_INPUT;</div><div class='add'>+	} else {</div><div class='add'>+		enable = state == DPLL_PIN_STATE_CONNECTED;</div><div class='add'>+		target = sma-&gt;output;</div><div class='add'>+		type = ICE_DPLL_PIN_TYPE_OUTPUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		ret = ice_dpll_pin_enable(&amp;pf-&gt;hw, target, d-&gt;dpll_idx, type,</div><div class='add'>+					  extack);</div><div class='add'>+	else</div><div class='add'>+		ret = ice_dpll_pin_disable(&amp;pf-&gt;hw, target, type, extack);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = ice_dpll_pin_state_update(pf, target, type, extack);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_input_prio_get - get dpll's input prio</div><div class='ctx'>  * @pin: pointer to a pin</div><div class='ctx'>  * @pin_priv: private data pointer passed on pin registration</div><div class='hunk'>@@ -860,6 +1405,47 @@ ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_input_prio_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			   const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			   u32 *prio, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+	struct ice_dpll *d = dpll_priv;</div><div class='add'>+	struct ice_pf *pf = d-&gt;pf;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	if (p-&gt;input &amp;&amp; p-&gt;direction == DPLL_PIN_DIRECTION_INPUT)</div><div class='add'>+		*prio = d-&gt;input_prio[p-&gt;input-&gt;idx];</div><div class='add'>+	else</div><div class='add'>+		*prio = ICE_DPLL_PIN_PRIO_OUTPUT;</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_input_prio_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			   const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			   u32 prio, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+	struct ice_dpll *d = dpll_priv;</div><div class='add'>+	struct ice_pf *pf = d-&gt;pf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!p-&gt;input || p-&gt;direction != DPLL_PIN_DIRECTION_INPUT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (ice_dpll_is_reset(pf, extack))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	ret = ice_dpll_hw_input_prio_set(pf, d, p-&gt;input, prio, extack);</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_dpll_input_direction - callback for get input pin direction</div><div class='ctx'>  * @pin: pointer to a pin</div><div class='hunk'>@@ -911,6 +1497,76 @@ ice_dpll_output_direction(const struct dpll_pin *pin, void *pin_priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_pin_sma_direction_set - callback for set SMA pin direction</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @direction: requested pin direction</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Handler for setting direction of a SMA pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_pin_sma_direction_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			       const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			       enum dpll_pin_direction direction,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+	struct ice_pf *pf = p-&gt;pf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (ice_dpll_is_reset(pf, extack))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	ret = ice_dpll_sma_direction_set(p, direction, extack);</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_pin_sw_direction_get - callback for get SW pin direction</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @direction: on success holds pin direction</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Handler for getting direction of a SMA pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_pin_sw_direction_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			      const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			      enum dpll_pin_direction *direction,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+	struct ice_pf *pf = p-&gt;pf;</div><div class='add'>+</div><div class='add'>+	if (ice_dpll_is_reset(pf, extack))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	*direction = p-&gt;direction;</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_pin_phase_adjust_get - callback for get pin phase adjust value</div><div class='ctx'>  * @pin: pointer to a pin</div><div class='ctx'>  * @pin_priv: private data pointer passed on pin registration</div><div class='hunk'>@@ -1004,9 +1660,9 @@ ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		NL_SET_ERR_MSG_FMT(extack,</div><div class='del'>-				   "err:%d %s failed to set pin phase_adjust:%d for pin:%u on dpll:%u\n",</div><div class='add'>+				   "err:%d %s failed to set pin phase_adjust:%d for pin:%u on dpll:%u",</div><div class='ctx'> 				   ret,</div><div class='del'>-				   ice_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='add'>+				   libie_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='ctx'> 				   phase_adjust, p-&gt;idx, d-&gt;dpll_idx);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1024,7 +1680,7 @@ ice_dpll_pin_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='ctx'>  * Dpll subsystem callback. Wraps a handler for setting phase adjust on input</div><div class='ctx'>  * pin.</div><div class='ctx'>  *</div><div class='del'>- * Context: Calls a function which acquires pf-&gt;dplls.lock</div><div class='add'>+ * Context: Calls a function which acquires and releases pf-&gt;dplls.lock</div><div class='ctx'>  * Return:</div><div class='ctx'>  * * 0 - success</div><div class='ctx'>  * * negative - error</div><div class='hunk'>@@ -1068,6 +1724,82 @@ ice_dpll_output_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='ctx'> 					     ICE_DPLL_PIN_TYPE_OUTPUT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_sw_phase_adjust_get - callback for get SW pin phase adjust</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @phase_adjust: on success holds phase adjust value</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Wraps a handler for getting phase adjust on sw</div><div class='add'>+ * pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Calls a function which acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_phase_adjust_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			     const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			     s32 *phase_adjust,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;direction == DPLL_PIN_DIRECTION_INPUT)</div><div class='add'>+		return ice_dpll_pin_phase_adjust_get(p-&gt;input-&gt;pin, p-&gt;input,</div><div class='add'>+						     dpll, dpll_priv,</div><div class='add'>+						     phase_adjust, extack);</div><div class='add'>+	else</div><div class='add'>+		return ice_dpll_pin_phase_adjust_get(p-&gt;output-&gt;pin, p-&gt;output,</div><div class='add'>+						     dpll, dpll_priv,</div><div class='add'>+						     phase_adjust, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_sw_phase_adjust_set - callback for set SW pin phase adjust value</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @phase_adjust: phase_adjust to be set</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Wraps a handler for setting phase adjust on output</div><div class='add'>+ * pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Calls a function which acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_phase_adjust_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			     const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+			     s32 phase_adjust,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+</div><div class='add'>+	if (!p-&gt;active) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "pin is not active");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (p-&gt;direction == DPLL_PIN_DIRECTION_INPUT)</div><div class='add'>+		return ice_dpll_pin_phase_adjust_set(p-&gt;input-&gt;pin, p-&gt;input,</div><div class='add'>+						     dpll, dpll_priv,</div><div class='add'>+						     phase_adjust, extack,</div><div class='add'>+						     ICE_DPLL_PIN_TYPE_INPUT);</div><div class='add'>+	else</div><div class='add'>+		return ice_dpll_pin_phase_adjust_set(p-&gt;output-&gt;pin, p-&gt;output,</div><div class='add'>+						     dpll, dpll_priv,</div><div class='add'>+						     phase_adjust, extack,</div><div class='add'>+						     ICE_DPLL_PIN_TYPE_OUTPUT);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define ICE_DPLL_PHASE_OFFSET_DIVIDER	100</div><div class='ctx'> #define ICE_DPLL_PHASE_OFFSET_FACTOR		\</div><div class='ctx'> 	(DPLL_PHASE_OFFSET_DIVIDER / ICE_DPLL_PHASE_OFFSET_DIVIDER)</div><div class='hunk'>@@ -1093,12 +1825,16 @@ ice_dpll_phase_offset_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='ctx'> 			  const struct dpll_device *dpll, void *dpll_priv,</div><div class='ctx'> 			  s64 *phase_offset, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='ctx'> 	struct ice_dpll *d = dpll_priv;</div><div class='ctx'> 	struct ice_pf *pf = d-&gt;pf;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='del'>-	if (d-&gt;active_input == pin)</div><div class='add'>+	if (d-&gt;active_input == pin || (p-&gt;input &amp;&amp;</div><div class='add'>+				       d-&gt;active_input == p-&gt;input-&gt;pin))</div><div class='ctx'> 		*phase_offset = d-&gt;phase_offset * ICE_DPLL_PHASE_OFFSET_FACTOR;</div><div class='add'>+	else if (d-&gt;phase_offset_monitor_period)</div><div class='add'>+		*phase_offset = p-&gt;phase_offset * ICE_DPLL_PHASE_OFFSET_FACTOR;</div><div class='ctx'> 	else</div><div class='ctx'> 		*phase_offset = 0;</div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='hunk'>@@ -1315,6 +2051,219 @@ ice_dpll_input_esync_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_sw_esync_set - callback for setting embedded sync on SW pin</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @freq: requested embedded sync frequency</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Handler for setting embedded sync frequency value</div><div class='add'>+ * on SW pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Calls a function which acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_esync_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+		      const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+		      u64 freq, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+</div><div class='add'>+	if (!p-&gt;active) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "pin is not active");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (p-&gt;direction == DPLL_PIN_DIRECTION_INPUT)</div><div class='add'>+		return ice_dpll_input_esync_set(p-&gt;input-&gt;pin, p-&gt;input, dpll,</div><div class='add'>+						dpll_priv, freq, extack);</div><div class='add'>+	else</div><div class='add'>+		return ice_dpll_output_esync_set(p-&gt;output-&gt;pin, p-&gt;output,</div><div class='add'>+						 dpll, dpll_priv, freq, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_sw_esync_get - callback for getting embedded sync on SW pin</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @dpll: registered dpll pointer</div><div class='add'>+ * @dpll_priv: private data pointer passed on dpll registration</div><div class='add'>+ * @esync: on success holds embedded sync frequency and properties</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Handler for getting embedded sync frequency value</div><div class='add'>+ * of SW pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Calls a function which acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_esync_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+		      const struct dpll_device *dpll, void *dpll_priv,</div><div class='add'>+		      struct dpll_pin_esync *esync,</div><div class='add'>+		      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;direction == DPLL_PIN_DIRECTION_INPUT)</div><div class='add'>+		return ice_dpll_input_esync_get(p-&gt;input-&gt;pin, p-&gt;input, dpll,</div><div class='add'>+						dpll_priv, esync, extack);</div><div class='add'>+	else</div><div class='add'>+		return ice_dpll_output_esync_get(p-&gt;output-&gt;pin, p-&gt;output,</div><div class='add'>+						 dpll, dpll_priv, esync,</div><div class='add'>+						 extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ice_dpll_input_ref_sync_set - callback for setting reference sync feature</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @ref_pin: pin pointer for reference sync pair</div><div class='add'>+ * @ref_pin_priv: private data pointer of ref_pin</div><div class='add'>+ * @state: requested state for reference sync for pin pair</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Handler for setting reference sync frequency</div><div class='add'>+ * feature for input pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_input_ref_sync_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			    const struct dpll_pin *ref_pin, void *ref_pin_priv,</div><div class='add'>+			    const enum dpll_pin_state state,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+	struct ice_pf *pf = p-&gt;pf;</div><div class='add'>+	u8 flags_en = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (ice_dpll_is_reset(pf, extack))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	if (p-&gt;flags[0] &amp; ICE_AQC_GET_CGU_IN_CFG_FLG2_INPUT_EN)</div><div class='add'>+		flags_en = ICE_AQC_SET_CGU_IN_CFG_FLG2_INPUT_EN;</div><div class='add'>+	if (state == DPLL_PIN_STATE_CONNECTED)</div><div class='add'>+		flags_en |= ICE_AQC_CGU_IN_CFG_FLG2_REFSYNC_EN;</div><div class='add'>+	ret = ice_aq_set_input_pin_cfg(&amp;pf-&gt;hw, p-&gt;idx, 0, flags_en, 0, 0);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = ice_dpll_pin_state_update(pf, p, ICE_DPLL_PIN_TYPE_INPUT,</div><div class='add'>+						extack);</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_input_ref_sync_get - callback for getting reference sync config</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @ref_pin: pin pointer for reference sync pair</div><div class='add'>+ * @ref_pin_priv: private data pointer of ref_pin</div><div class='add'>+ * @state: on success holds reference sync state for pin pair</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Handler for setting reference sync frequency</div><div class='add'>+ * feature for input pin.</div><div class='add'>+ *</div><div class='add'>+ * Context: Acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_input_ref_sync_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			    const struct dpll_pin *ref_pin, void *ref_pin_priv,</div><div class='add'>+			    enum dpll_pin_state *state,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+	struct ice_pf *pf = p-&gt;pf;</div><div class='add'>+</div><div class='add'>+	if (ice_dpll_is_reset(pf, extack))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	if (p-&gt;flags[0] &amp; ICE_AQC_CGU_IN_CFG_FLG2_REFSYNC_EN)</div><div class='add'>+		*state = DPLL_PIN_STATE_CONNECTED;</div><div class='add'>+	else</div><div class='add'>+		*state = DPLL_PIN_STATE_DISCONNECTED;</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * ice_dpll_sw_input_ref_sync_set - callback for setting reference sync feature</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @ref_pin: pin pointer for reference sync pair</div><div class='add'>+ * @ref_pin_priv: private data pointer of ref_pin</div><div class='add'>+ * @state: requested state for reference sync for pin pair</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Handler for setting reference sync</div><div class='add'>+ * feature for input pins.</div><div class='add'>+ *</div><div class='add'>+ * Context: Calls a function which acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_input_ref_sync_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			       const struct dpll_pin *ref_pin,</div><div class='add'>+			       void *ref_pin_priv,</div><div class='add'>+			       const enum dpll_pin_state state,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+</div><div class='add'>+	return ice_dpll_input_ref_sync_set(pin, p-&gt;input, ref_pin, ref_pin_priv,</div><div class='add'>+					   state, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_sw_input_ref_sync_get - callback for getting reference sync config</div><div class='add'>+ * @pin: pointer to a pin</div><div class='add'>+ * @pin_priv: private data pointer passed on pin registration</div><div class='add'>+ * @ref_pin: pin pointer for reference sync pair</div><div class='add'>+ * @ref_pin_priv: private data pointer of ref_pin</div><div class='add'>+ * @state: on success holds reference sync state for pin pair</div><div class='add'>+ * @extack: error reporting</div><div class='add'>+ *</div><div class='add'>+ * Dpll subsystem callback. Handler for setting reference sync feature for</div><div class='add'>+ * input pins.</div><div class='add'>+ *</div><div class='add'>+ * Context: Calls a function which acquires and releases pf-&gt;dplls.lock</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_sw_input_ref_sync_get(const struct dpll_pin *pin, void *pin_priv,</div><div class='add'>+			       const struct dpll_pin *ref_pin,</div><div class='add'>+			       void *ref_pin_priv,</div><div class='add'>+			       enum dpll_pin_state *state,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *p = pin_priv;</div><div class='add'>+</div><div class='add'>+	return ice_dpll_input_ref_sync_get(pin, p-&gt;input, ref_pin, ref_pin_priv,</div><div class='add'>+					   state, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_rclk_state_on_pin_set - set a state on rclk pin</div><div class='ctx'>  * @pin: pointer to a pin</div><div class='ctx'>  * @pin_priv: private data pointer passed on pin registration</div><div class='hunk'>@@ -1362,9 +2311,9 @@ ice_dpll_rclk_state_on_pin_set(const struct dpll_pin *pin, void *pin_priv,</div><div class='ctx'> 					 &amp;p-&gt;freq);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		NL_SET_ERR_MSG_FMT(extack,</div><div class='del'>-				   "err:%d %s failed to set pin state:%u for pin:%u on parent:%u\n",</div><div class='add'>+				   "err:%d %s failed to set pin state:%u for pin:%u on parent:%u",</div><div class='ctx'> 				   ret,</div><div class='del'>-				   ice_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='add'>+				   libie_aq_str(pf-&gt;hw.adminq.sq_last_status),</div><div class='ctx'> 				   state, p-&gt;idx, parent-&gt;idx);</div><div class='ctx'> unlock:</div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='hunk'>@@ -1427,6 +2376,37 @@ static const struct dpll_pin_ops ice_dpll_rclk_ops = {</div><div class='ctx'> 	.direction_get = ice_dpll_input_direction,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct dpll_pin_ops ice_dpll_pin_sma_ops = {</div><div class='add'>+	.state_on_dpll_set = ice_dpll_sma_pin_state_set,</div><div class='add'>+	.state_on_dpll_get = ice_dpll_sw_pin_state_get,</div><div class='add'>+	.direction_get = ice_dpll_pin_sw_direction_get,</div><div class='add'>+	.direction_set = ice_dpll_pin_sma_direction_set,</div><div class='add'>+	.prio_get = ice_dpll_sw_input_prio_get,</div><div class='add'>+	.prio_set = ice_dpll_sw_input_prio_set,</div><div class='add'>+	.frequency_get = ice_dpll_sw_pin_frequency_get,</div><div class='add'>+	.frequency_set = ice_dpll_sw_pin_frequency_set,</div><div class='add'>+	.phase_adjust_get = ice_dpll_sw_phase_adjust_get,</div><div class='add'>+	.phase_adjust_set = ice_dpll_sw_phase_adjust_set,</div><div class='add'>+	.phase_offset_get = ice_dpll_phase_offset_get,</div><div class='add'>+	.esync_set = ice_dpll_sw_esync_set,</div><div class='add'>+	.esync_get = ice_dpll_sw_esync_get,</div><div class='add'>+	.ref_sync_set = ice_dpll_sw_input_ref_sync_set,</div><div class='add'>+	.ref_sync_get = ice_dpll_sw_input_ref_sync_get,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dpll_pin_ops ice_dpll_pin_ufl_ops = {</div><div class='add'>+	.state_on_dpll_set = ice_dpll_ufl_pin_state_set,</div><div class='add'>+	.state_on_dpll_get = ice_dpll_sw_pin_state_get,</div><div class='add'>+	.direction_get = ice_dpll_pin_sw_direction_get,</div><div class='add'>+	.frequency_get = ice_dpll_sw_pin_frequency_get,</div><div class='add'>+	.frequency_set = ice_dpll_sw_pin_frequency_set,</div><div class='add'>+	.esync_set = ice_dpll_sw_esync_set,</div><div class='add'>+	.esync_get = ice_dpll_sw_esync_get,</div><div class='add'>+	.phase_adjust_get = ice_dpll_sw_phase_adjust_get,</div><div class='add'>+	.phase_adjust_set = ice_dpll_sw_phase_adjust_set,</div><div class='add'>+	.phase_offset_get = ice_dpll_phase_offset_get,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct dpll_pin_ops ice_dpll_input_ops = {</div><div class='ctx'> 	.frequency_get = ice_dpll_input_frequency_get,</div><div class='ctx'> 	.frequency_set = ice_dpll_input_frequency_set,</div><div class='hunk'>@@ -1440,6 +2420,8 @@ static const struct dpll_pin_ops ice_dpll_input_ops = {</div><div class='ctx'> 	.phase_offset_get = ice_dpll_phase_offset_get,</div><div class='ctx'> 	.esync_set = ice_dpll_input_esync_set,</div><div class='ctx'> 	.esync_get = ice_dpll_input_esync_get,</div><div class='add'>+	.ref_sync_set = ice_dpll_input_ref_sync_set,</div><div class='add'>+	.ref_sync_get = ice_dpll_input_ref_sync_get,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct dpll_pin_ops ice_dpll_output_ops = {</div><div class='hunk'>@@ -1459,6 +2441,13 @@ static const struct dpll_device_ops ice_dpll_ops = {</div><div class='ctx'> 	.mode_get = ice_dpll_mode_get,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct dpll_device_ops ice_dpll_pom_ops = {</div><div class='add'>+	.lock_status_get = ice_dpll_lock_status_get,</div><div class='add'>+	.mode_get = ice_dpll_mode_get,</div><div class='add'>+	.phase_offset_monitor_set = ice_dpll_phase_offset_monitor_set,</div><div class='add'>+	.phase_offset_monitor_get = ice_dpll_phase_offset_monitor_get,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_generate_clock_id - generates unique clock_id for registering dpll.</div><div class='ctx'>  * @pf: board private structure</div><div class='hunk'>@@ -1504,6 +2493,110 @@ static void ice_dpll_notify_changes(struct ice_dpll *d)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_is_pps_phase_monitor - check if dpll capable of phase offset monitor</div><div class='add'>+ * @pf: pf private structure</div><div class='add'>+ *</div><div class='add'>+ * Check if firmware is capable of supporting admin command to provide</div><div class='add'>+ * phase offset monitoring on all the input pins on PPS dpll.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ * * true - PPS dpll phase offset monitoring is supported</div><div class='add'>+ * * false - PPS dpll phase offset monitoring is not supported</div><div class='add'>+ */</div><div class='add'>+static bool ice_dpll_is_pps_phase_monitor(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct ice_cgu_input_measure meas[ICE_DPLL_INPUT_REF_NUM];</div><div class='add'>+	int ret = ice_aq_get_cgu_input_pin_measure(&amp;pf-&gt;hw, DPLL_TYPE_PPS, meas,</div><div class='add'>+						   ARRAY_SIZE(meas));</div><div class='add'>+</div><div class='add'>+	if (ret &amp;&amp; pf-&gt;hw.adminq.sq_last_status == LIBIE_AQ_RC_ESRCH)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_pins_notify_mask - notify dpll subsystem about bulk pin changes</div><div class='add'>+ * @pins: array of ice_dpll_pin pointers registered within dpll subsystem</div><div class='add'>+ * @pin_num: number of pins</div><div class='add'>+ * @phase_offset_ntf_mask: bitmask of pin indexes to notify</div><div class='add'>+ *</div><div class='add'>+ * Iterate over array of pins and call dpll subsystem pin notify if</div><div class='add'>+ * corresponding pin index within bitmask is set.</div><div class='add'>+ *</div><div class='add'>+ * Context: Must be called while pf-&gt;dplls.lock is released.</div><div class='add'>+ */</div><div class='add'>+static void ice_dpll_pins_notify_mask(struct ice_dpll_pin *pins,</div><div class='add'>+				      u8 pin_num,</div><div class='add'>+				      u32 phase_offset_ntf_mask)</div><div class='add'>+{</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pin_num; i++)</div><div class='add'>+		if (phase_offset_ntf_mask &amp; (1 &lt;&lt; i))</div><div class='add'>+			dpll_pin_change_ntf(pins[i].pin);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_pps_update_phase_offsets - update phase offset measurements</div><div class='add'>+ * @pf: pf private structure</div><div class='add'>+ * @phase_offset_pins_updated: returns mask of updated input pin indexes</div><div class='add'>+ *</div><div class='add'>+ * Read phase offset measurements for PPS dpll device and store values in</div><div class='add'>+ * input pins array. On success phase_offset_pins_updated - fills bitmask of</div><div class='add'>+ * updated input pin indexes, pins shall be notified.</div><div class='add'>+ *</div><div class='add'>+ * Context: Shall be called with pf-&gt;dplls.lock being locked.</div><div class='add'>+ * Returns:</div><div class='add'>+ * * 0 - success or no data available</div><div class='add'>+ * * negative - AQ failure</div><div class='add'>+ */</div><div class='add'>+static int ice_dpll_pps_update_phase_offsets(struct ice_pf *pf,</div><div class='add'>+					     u32 *phase_offset_pins_updated)</div><div class='add'>+{</div><div class='add'>+	struct ice_cgu_input_measure meas[ICE_DPLL_INPUT_REF_NUM];</div><div class='add'>+	struct ice_dpll_pin *p;</div><div class='add'>+	s64 phase_offset, tmp;</div><div class='add'>+	int i, j, ret;</div><div class='add'>+</div><div class='add'>+	*phase_offset_pins_updated = 0;</div><div class='add'>+	ret = ice_aq_get_cgu_input_pin_measure(&amp;pf-&gt;hw, DPLL_TYPE_PPS, meas,</div><div class='add'>+					       ARRAY_SIZE(meas));</div><div class='add'>+	if (ret &amp;&amp; pf-&gt;hw.adminq.sq_last_status == LIBIE_AQ_RC_EAGAIN) {</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (ret) {</div><div class='add'>+		dev_err(ice_pf_to_dev(pf),</div><div class='add'>+			"failed to get input pin measurements dpll=%d, ret=%d %s\n",</div><div class='add'>+			DPLL_TYPE_PPS, ret,</div><div class='add'>+			libie_aq_str(pf-&gt;hw.adminq.sq_last_status));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; pf-&gt;dplls.num_inputs; i++) {</div><div class='add'>+		p = &amp;pf-&gt;dplls.inputs[i];</div><div class='add'>+		phase_offset = 0;</div><div class='add'>+		for (j = 0; j &lt; ICE_CGU_INPUT_PHASE_OFFSET_BYTES; j++) {</div><div class='add'>+			tmp = meas[i].phase_offset[j];</div><div class='add'>+#ifdef __LITTLE_ENDIAN</div><div class='add'>+			phase_offset += tmp &lt;&lt; 8 * j;</div><div class='add'>+#else</div><div class='add'>+			phase_offset += tmp &lt;&lt; 8 *</div><div class='add'>+				(ICE_CGU_INPUT_PHASE_OFFSET_BYTES - 1 - j);</div><div class='add'>+#endif</div><div class='add'>+		}</div><div class='add'>+		phase_offset = sign_extend64(phase_offset, 47);</div><div class='add'>+		if (p-&gt;phase_offset != phase_offset) {</div><div class='add'>+			dev_dbg(ice_pf_to_dev(pf),</div><div class='add'>+				"phase offset changed for pin:%d old:%llx, new:%llx\n",</div><div class='add'>+				p-&gt;idx, p-&gt;phase_offset, phase_offset);</div><div class='add'>+			p-&gt;phase_offset = phase_offset;</div><div class='add'>+			*phase_offset_pins_updated |= (1 &lt;&lt; i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_update_state - update dpll state</div><div class='ctx'>  * @pf: pf private structure</div><div class='ctx'>  * @d: pointer to queried dpll device</div><div class='hunk'>@@ -1534,7 +2627,7 @@ ice_dpll_update_state(struct ice_pf *pf, struct ice_dpll *d, bool init)</div><div class='ctx'> 		dev_err(ice_pf_to_dev(pf),</div><div class='ctx'> 			"update dpll=%d state failed, ret=%d %s\n",</div><div class='ctx'> 			d-&gt;dpll_idx, ret,</div><div class='del'>-			ice_aq_str(pf-&gt;hw.adminq.sq_last_status));</div><div class='add'>+			libie_aq_str(pf-&gt;hw.adminq.sq_last_status));</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (init) {</div><div class='hunk'>@@ -1589,14 +2682,19 @@ static void ice_dpll_periodic_work(struct kthread_work *work)</div><div class='ctx'> 	struct ice_pf *pf = container_of(d, struct ice_pf, dplls);</div><div class='ctx'> 	struct ice_dpll *de = &amp;pf-&gt;dplls.eec;</div><div class='ctx'> 	struct ice_dpll *dp = &amp;pf-&gt;dplls.pps;</div><div class='add'>+	u32 phase_offset_ntf = 0;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (ice_is_reset_in_progress(pf-&gt;state))</div><div class='ctx'> 		goto resched;</div><div class='ctx'> 	mutex_lock(&amp;pf-&gt;dplls.lock);</div><div class='add'>+	d-&gt;periodic_counter++;</div><div class='ctx'> 	ret = ice_dpll_update_state(pf, de, false);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = ice_dpll_update_state(pf, dp, false);</div><div class='add'>+	if (!ret &amp;&amp; dp-&gt;phase_offset_monitor_period &amp;&amp;</div><div class='add'>+	    d-&gt;periodic_counter % dp-&gt;phase_offset_monitor_period == 0)</div><div class='add'>+		ret = ice_dpll_pps_update_phase_offsets(pf, &amp;phase_offset_ntf);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		d-&gt;cgu_state_acq_err_num++;</div><div class='ctx'> 		/* stop rescheduling this worker */</div><div class='hunk'>@@ -1611,6 +2709,9 @@ static void ice_dpll_periodic_work(struct kthread_work *work)</div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;dplls.lock);</div><div class='ctx'> 	ice_dpll_notify_changes(de);</div><div class='ctx'> 	ice_dpll_notify_changes(dp);</div><div class='add'>+	if (phase_offset_ntf)</div><div class='add'>+		ice_dpll_pins_notify_mask(d-&gt;inputs, d-&gt;num_inputs,</div><div class='add'>+					  phase_offset_ntf);</div><div class='ctx'> </div><div class='ctx'> resched:</div><div class='ctx'> 	/* Run twice a second or reschedule if update failed */</div><div class='hunk'>@@ -1620,6 +2721,88 @@ resched:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_init_ref_sync_inputs - initialize reference sync pin pairs</div><div class='add'>+ * @pf: pf private structure</div><div class='add'>+ *</div><div class='add'>+ * Read DPLL TLV capabilities and initialize reference sync pin pairs in</div><div class='add'>+ * dpll subsystem.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success or nothing to do (no ref-sync tlv are present)</div><div class='add'>+ * * negative - AQ failure</div><div class='add'>+ */</div><div class='add'>+static int ice_dpll_init_ref_sync_inputs(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct ice_dpll_pin *inputs = pf-&gt;dplls.inputs;</div><div class='add'>+	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='add'>+	u16 addr, len, end, hdr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ice_get_pfa_module_tlv(hw, &amp;hdr, &amp;len, ICE_SR_PFA_DPLL_DEFAULTS);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ice_pf_to_dev(pf),</div><div class='add'>+			"Failed to read PFA dpll defaults TLV ret=%d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	end = hdr + len;</div><div class='add'>+</div><div class='add'>+	for (addr = hdr + ICE_DPLL_PFA_HEADER_LEN; addr &lt; end;</div><div class='add'>+	     addr += ICE_DPLL_PFA_ENTRY_LEN) {</div><div class='add'>+		unsigned long bit, ul_mask, offset;</div><div class='add'>+		u16 pin, mask, buf;</div><div class='add'>+		bool valid = false;</div><div class='add'>+</div><div class='add'>+		ret = ice_read_sr_word(hw, addr, &amp;buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		switch (buf) {</div><div class='add'>+		case ICE_DPLL_PFA_REF_SYNC_TYPE:</div><div class='add'>+		case ICE_DPLL_PFA_REF_SYNC_TYPE2:</div><div class='add'>+		{</div><div class='add'>+			u16 mask_addr = addr + ICE_DPLL_PFA_MASK_OFFSET;</div><div class='add'>+			u16 val_addr = addr + ICE_DPLL_PFA_VALUE_OFFSET;</div><div class='add'>+</div><div class='add'>+			ret = ice_read_sr_word(hw, mask_addr, &amp;mask);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+			ret = ice_read_sr_word(hw, val_addr, &amp;pin);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+			if (buf == ICE_DPLL_PFA_REF_SYNC_TYPE)</div><div class='add'>+				pin &gt;&gt;= ICE_DPLL_PFA_MAILBOX_REF_SYNC_PIN_S;</div><div class='add'>+			valid = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		case ICE_DPLL_PFA_END:</div><div class='add'>+			addr = end;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		if (!valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ul_mask = mask;</div><div class='add'>+		offset = 0;</div><div class='add'>+		for_each_set_bit(bit, &amp;ul_mask, BITS_PER_TYPE(u16)) {</div><div class='add'>+			int i, j;</div><div class='add'>+</div><div class='add'>+			if (hw-&gt;device_id == ICE_DEV_ID_E810C_SFP &amp;&amp;</div><div class='add'>+			    pin &gt; ICE_DPLL_E810C_SFP_NC_START)</div><div class='add'>+				offset = -ICE_DPLL_E810C_SFP_NC_PINS;</div><div class='add'>+			i = pin + offset;</div><div class='add'>+			j = bit + offset;</div><div class='add'>+			if (i &lt; 0 || j &lt; 0)</div><div class='add'>+				return -ERANGE;</div><div class='add'>+			inputs[i].ref_sync = j;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_release_pins - release pins resources from dpll subsystem</div><div class='ctx'>  * @pins: pointer to pins array</div><div class='ctx'>  * @count: number of pins</div><div class='hunk'>@@ -1689,7 +2872,38 @@ ice_dpll_unregister_pins(struct dpll_device *dpll, struct ice_dpll_pin *pins,</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; count; i++)</div><div class='del'>-		dpll_pin_unregister(dpll, pins[i].pin, ops, &amp;pins[i]);</div><div class='add'>+		if (!pins[i].hidden)</div><div class='add'>+			dpll_pin_unregister(dpll, pins[i].pin, ops, &amp;pins[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_dpll_pin_ref_sync_register - register reference sync pins</div><div class='add'>+ * @pins: pointer to pins array</div><div class='add'>+ * @count: number of pins</div><div class='add'>+ *</div><div class='add'>+ * Register reference sync pins in dpll subsystem.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - registration failure reason</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_dpll_pin_ref_sync_register(struct ice_dpll_pin *pins, int count)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		if (!pins[i].hidden &amp;&amp; pins[i].ref_sync) {</div><div class='add'>+			int j = pins[i].ref_sync;</div><div class='add'>+</div><div class='add'>+			ret = dpll_pin_ref_sync_pair_add(pins[i].pin,</div><div class='add'>+							 pins[j].pin);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1712,16 +2926,19 @@ ice_dpll_register_pins(struct dpll_device *dpll, struct ice_dpll_pin *pins,</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		ret = dpll_pin_register(dpll, pins[i].pin, ops, &amp;pins[i]);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto unregister_pins;</div><div class='add'>+		if (!pins[i].hidden) {</div><div class='add'>+			ret = dpll_pin_register(dpll, pins[i].pin, ops, &amp;pins[i]);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto unregister_pins;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> unregister_pins:</div><div class='ctx'> 	while (--i &gt;= 0)</div><div class='del'>-		dpll_pin_unregister(dpll, pins[i].pin, ops, &amp;pins[i]);</div><div class='add'>+		if (!pins[i].hidden)</div><div class='add'>+			dpll_pin_unregister(dpll, pins[i].pin, ops, &amp;pins[i]);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1909,6 +3126,18 @@ static void ice_dpll_deinit_pins(struct ice_pf *pf, bool cgu)</div><div class='ctx'> 		ice_dpll_unregister_pins(de-&gt;dpll, outputs,</div><div class='ctx'> 					 &amp;ice_dpll_output_ops, num_outputs);</div><div class='ctx'> 		ice_dpll_release_pins(outputs, num_outputs);</div><div class='add'>+		if (!pf-&gt;dplls.generic) {</div><div class='add'>+			ice_dpll_deinit_direct_pins(cgu, pf-&gt;dplls.ufl,</div><div class='add'>+						    ICE_DPLL_PIN_SW_NUM,</div><div class='add'>+						    &amp;ice_dpll_pin_ufl_ops,</div><div class='add'>+						    pf-&gt;dplls.pps.dpll,</div><div class='add'>+						    pf-&gt;dplls.eec.dpll);</div><div class='add'>+			ice_dpll_deinit_direct_pins(cgu, pf-&gt;dplls.sma,</div><div class='add'>+						    ICE_DPLL_PIN_SW_NUM,</div><div class='add'>+						    &amp;ice_dpll_pin_sma_ops,</div><div class='add'>+						    pf-&gt;dplls.pps.dpll,</div><div class='add'>+						    pf-&gt;dplls.eec.dpll);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1926,8 +3155,7 @@ static void ice_dpll_deinit_pins(struct ice_pf *pf, bool cgu)</div><div class='ctx'>  */</div><div class='ctx'> static int ice_dpll_init_pins(struct ice_pf *pf, bool cgu)</div><div class='ctx'> {</div><div class='del'>-	u32 rclk_idx;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, count;</div><div class='ctx'> </div><div class='ctx'> 	ret = ice_dpll_init_direct_pins(pf, cgu, pf-&gt;dplls.inputs, 0,</div><div class='ctx'> 					pf-&gt;dplls.num_inputs,</div><div class='hunk'>@@ -1935,23 +3163,64 @@ static int ice_dpll_init_pins(struct ice_pf *pf, bool cgu)</div><div class='ctx'> 					pf-&gt;dplls.eec.dpll, pf-&gt;dplls.pps.dpll);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+	count = pf-&gt;dplls.num_inputs;</div><div class='ctx'> 	if (cgu) {</div><div class='ctx'> 		ret = ice_dpll_init_direct_pins(pf, cgu, pf-&gt;dplls.outputs,</div><div class='del'>-						pf-&gt;dplls.num_inputs,</div><div class='add'>+						count,</div><div class='ctx'> 						pf-&gt;dplls.num_outputs,</div><div class='ctx'> 						&amp;ice_dpll_output_ops,</div><div class='ctx'> 						pf-&gt;dplls.eec.dpll,</div><div class='ctx'> 						pf-&gt;dplls.pps.dpll);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto deinit_inputs;</div><div class='add'>+		count += pf-&gt;dplls.num_outputs;</div><div class='add'>+		if (!pf-&gt;dplls.generic) {</div><div class='add'>+			ret = ice_dpll_init_direct_pins(pf, cgu, pf-&gt;dplls.sma,</div><div class='add'>+							count,</div><div class='add'>+							ICE_DPLL_PIN_SW_NUM,</div><div class='add'>+							&amp;ice_dpll_pin_sma_ops,</div><div class='add'>+							pf-&gt;dplls.eec.dpll,</div><div class='add'>+							pf-&gt;dplls.pps.dpll);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto deinit_outputs;</div><div class='add'>+			count += ICE_DPLL_PIN_SW_NUM;</div><div class='add'>+			ret = ice_dpll_init_direct_pins(pf, cgu, pf-&gt;dplls.ufl,</div><div class='add'>+							count,</div><div class='add'>+							ICE_DPLL_PIN_SW_NUM,</div><div class='add'>+							&amp;ice_dpll_pin_ufl_ops,</div><div class='add'>+							pf-&gt;dplls.eec.dpll,</div><div class='add'>+							pf-&gt;dplls.pps.dpll);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto deinit_sma;</div><div class='add'>+			count += ICE_DPLL_PIN_SW_NUM;</div><div class='add'>+		}</div><div class='add'>+		ret = ice_dpll_pin_ref_sync_register(pf-&gt;dplls.inputs,</div><div class='add'>+						     pf-&gt;dplls.num_inputs);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto deinit_ufl;</div><div class='add'>+		ret = ice_dpll_pin_ref_sync_register(pf-&gt;dplls.sma,</div><div class='add'>+						     ICE_DPLL_PIN_SW_NUM);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto deinit_ufl;</div><div class='add'>+	} else {</div><div class='add'>+		count += pf-&gt;dplls.num_outputs + 2 * ICE_DPLL_PIN_SW_NUM;</div><div class='ctx'> 	}</div><div class='del'>-	rclk_idx = pf-&gt;dplls.num_inputs + pf-&gt;dplls.num_outputs + pf-&gt;hw.pf_id;</div><div class='del'>-	ret = ice_dpll_init_rclk_pins(pf, &amp;pf-&gt;dplls.rclk, rclk_idx,</div><div class='add'>+	ret = ice_dpll_init_rclk_pins(pf, &amp;pf-&gt;dplls.rclk, count + pf-&gt;hw.pf_id,</div><div class='ctx'> 				      &amp;ice_dpll_rclk_ops);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto deinit_outputs;</div><div class='add'>+		goto deinit_ufl;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+deinit_ufl:</div><div class='add'>+	ice_dpll_deinit_direct_pins(cgu, pf-&gt;dplls.ufl,</div><div class='add'>+				    ICE_DPLL_PIN_SW_NUM,</div><div class='add'>+				    &amp;ice_dpll_pin_ufl_ops,</div><div class='add'>+				    pf-&gt;dplls.pps.dpll, pf-&gt;dplls.eec.dpll);</div><div class='add'>+deinit_sma:</div><div class='add'>+	ice_dpll_deinit_direct_pins(cgu, pf-&gt;dplls.sma,</div><div class='add'>+				    ICE_DPLL_PIN_SW_NUM,</div><div class='add'>+				    &amp;ice_dpll_pin_sma_ops,</div><div class='add'>+				    pf-&gt;dplls.pps.dpll, pf-&gt;dplls.eec.dpll);</div><div class='ctx'> deinit_outputs:</div><div class='ctx'> 	ice_dpll_deinit_direct_pins(cgu, pf-&gt;dplls.outputs,</div><div class='ctx'> 				    pf-&gt;dplls.num_outputs,</div><div class='hunk'>@@ -1977,7 +3246,7 @@ static void</div><div class='ctx'> ice_dpll_deinit_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu)</div><div class='ctx'> {</div><div class='ctx'> 	if (cgu)</div><div class='del'>-		dpll_device_unregister(d-&gt;dpll, &amp;ice_dpll_ops, d);</div><div class='add'>+		dpll_device_unregister(d-&gt;dpll, d-&gt;ops, d);</div><div class='ctx'> 	dpll_device_put(d-&gt;dpll);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2011,12 +3280,17 @@ ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu,</div><div class='ctx'> 	}</div><div class='ctx'> 	d-&gt;pf = pf;</div><div class='ctx'> 	if (cgu) {</div><div class='add'>+		const struct dpll_device_ops *ops = &amp;ice_dpll_ops;</div><div class='add'>+</div><div class='add'>+		if (type == DPLL_TYPE_PPS &amp;&amp; ice_dpll_is_pps_phase_monitor(pf))</div><div class='add'>+			ops =  &amp;ice_dpll_pom_ops;</div><div class='ctx'> 		ice_dpll_update_state(pf, d, true);</div><div class='del'>-		ret = dpll_device_register(d-&gt;dpll, type, &amp;ice_dpll_ops, d);</div><div class='add'>+		ret = dpll_device_register(d-&gt;dpll, type, ops, d);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dpll_device_put(d-&gt;dpll);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='add'>+		d-&gt;ops = ops;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2053,7 +3327,7 @@ static int ice_dpll_init_worker(struct ice_pf *pf)</div><div class='ctx'> 	struct kthread_worker *kworker;</div><div class='ctx'> </div><div class='ctx'> 	kthread_init_delayed_work(&amp;d-&gt;work, ice_dpll_periodic_work);</div><div class='del'>-	kworker = kthread_create_worker(0, "ice-dplls-%s",</div><div class='add'>+	kworker = kthread_run_worker(0, "ice-dplls-%s",</div><div class='ctx'> 					dev_name(ice_pf_to_dev(pf)));</div><div class='ctx'> 	if (IS_ERR(kworker))</div><div class='ctx'> 		return PTR_ERR(kworker);</div><div class='hunk'>@@ -2065,6 +3339,18 @@ static int ice_dpll_init_worker(struct ice_pf *pf)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_phase_range_set - initialize phase adjust range helper</div><div class='add'>+ * @range: pointer to phase adjust range struct to be initialized</div><div class='add'>+ * @phase_adj: a value to be used as min(-)/max(+) boundary</div><div class='add'>+ */</div><div class='add'>+static void ice_dpll_phase_range_set(struct dpll_pin_phase_adjust_range *range,</div><div class='add'>+				     u32 phase_adj)</div><div class='add'>+{</div><div class='add'>+	range-&gt;min = -phase_adj;</div><div class='add'>+	range-&gt;max = phase_adj;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_init_info_pins_generic - initializes generic pins info</div><div class='ctx'>  * @pf: board private structure</div><div class='ctx'>  * @input: if input pins initialized</div><div class='hunk'>@@ -2105,8 +3391,8 @@ static int ice_dpll_init_info_pins_generic(struct ice_pf *pf, bool input)</div><div class='ctx'> 	for (i = 0; i &lt; pin_num; i++) {</div><div class='ctx'> 		pins[i].idx = i;</div><div class='ctx'> 		pins[i].prop.board_label = labels[i];</div><div class='del'>-		pins[i].prop.phase_range.min = phase_adj_max;</div><div class='del'>-		pins[i].prop.phase_range.max = -phase_adj_max;</div><div class='add'>+		ice_dpll_phase_range_set(&amp;pins[i].prop.phase_range,</div><div class='add'>+					 phase_adj_max);</div><div class='ctx'> 		pins[i].prop.capabilities = cap;</div><div class='ctx'> 		pins[i].pf = pf;</div><div class='ctx'> 		ret = ice_dpll_pin_state_update(pf, &amp;pins[i], pin_type, NULL);</div><div class='hunk'>@@ -2152,6 +3438,7 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf,</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	struct ice_dpll_pin *pins;</div><div class='ctx'> 	unsigned long caps;</div><div class='add'>+	u32 phase_adj_max;</div><div class='ctx'> 	u8 freq_supp_num;</div><div class='ctx'> 	bool input;</div><div class='ctx'> </div><div class='hunk'>@@ -2159,18 +3446,22 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf,</div><div class='ctx'> 	case ICE_DPLL_PIN_TYPE_INPUT:</div><div class='ctx'> 		pins = pf-&gt;dplls.inputs;</div><div class='ctx'> 		num_pins = pf-&gt;dplls.num_inputs;</div><div class='add'>+		phase_adj_max = pf-&gt;dplls.input_phase_adj_max;</div><div class='ctx'> 		input = true;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ICE_DPLL_PIN_TYPE_OUTPUT:</div><div class='ctx'> 		pins = pf-&gt;dplls.outputs;</div><div class='ctx'> 		num_pins = pf-&gt;dplls.num_outputs;</div><div class='add'>+		phase_adj_max = pf-&gt;dplls.output_phase_adj_max;</div><div class='ctx'> 		input = false;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	if (num_pins != ice_cgu_get_num_pins(hw, input))</div><div class='add'>+	if (num_pins != ice_cgu_get_num_pins(hw, input)) {</div><div class='add'>+		pf-&gt;dplls.generic = true;</div><div class='ctx'> 		return ice_dpll_init_info_pins_generic(pf, input);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_pins; i++) {</div><div class='ctx'> 		caps = 0;</div><div class='hunk'>@@ -2188,19 +3479,17 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf,</div><div class='ctx'> 				return ret;</div><div class='ctx'> 			caps |= (DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE |</div><div class='ctx'> 				 DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE);</div><div class='del'>-			pins[i].prop.phase_range.min =</div><div class='del'>-				pf-&gt;dplls.input_phase_adj_max;</div><div class='del'>-			pins[i].prop.phase_range.max =</div><div class='del'>-				-pf-&gt;dplls.input_phase_adj_max;</div><div class='add'>+			if (ice_dpll_is_sw_pin(pf, i, true))</div><div class='add'>+				pins[i].hidden = true;</div><div class='ctx'> 		} else {</div><div class='del'>-			pins[i].prop.phase_range.min =</div><div class='del'>-				pf-&gt;dplls.output_phase_adj_max;</div><div class='del'>-			pins[i].prop.phase_range.max =</div><div class='del'>-				-pf-&gt;dplls.output_phase_adj_max;</div><div class='ctx'> 			ret = ice_cgu_get_output_pin_state_caps(hw, i, &amp;caps);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='add'>+			if (ice_dpll_is_sw_pin(pf, i, false))</div><div class='add'>+				pins[i].hidden = true;</div><div class='ctx'> 		}</div><div class='add'>+		ice_dpll_phase_range_set(&amp;pins[i].prop.phase_range,</div><div class='add'>+					 phase_adj_max);</div><div class='ctx'> 		pins[i].prop.capabilities = caps;</div><div class='ctx'> 		ret = ice_dpll_pin_state_update(pf, &amp;pins[i], pin_type, NULL);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -2210,6 +3499,8 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf,</div><div class='ctx'> 		pins[i].prop.freq_supported_num = freq_supp_num;</div><div class='ctx'> 		pins[i].pf = pf;</div><div class='ctx'> 	}</div><div class='add'>+	if (input)</div><div class='add'>+		ret = ice_dpll_init_ref_sync_inputs(pf);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2237,6 +3528,91 @@ static int ice_dpll_init_info_rclk_pin(struct ice_pf *pf)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_dpll_init_info_sw_pins - initializes software controlled pin information</div><div class='add'>+ * @pf: board private structure</div><div class='add'>+ *</div><div class='add'>+ * Init information for software controlled pins, cache them in</div><div class='add'>+ * pf-&gt;dplls.sma and pf-&gt;dplls.ufl.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 - success</div><div class='add'>+ * * negative - init failure reason</div><div class='add'>+ */</div><div class='add'>+static int ice_dpll_init_info_sw_pins(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	u8 freq_supp_num, pin_abs_idx, input_idx_offset = 0;</div><div class='add'>+	struct ice_dplls *d = &amp;pf-&gt;dplls;</div><div class='add'>+	struct ice_dpll_pin *pin;</div><div class='add'>+	u32 phase_adj_max, caps;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	if (pf-&gt;hw.device_id == ICE_DEV_ID_E810C_QSFP)</div><div class='add'>+		input_idx_offset = ICE_E810_RCLK_PINS_NUM;</div><div class='add'>+	phase_adj_max = max(d-&gt;input_phase_adj_max, d-&gt;output_phase_adj_max);</div><div class='add'>+	caps = DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE;</div><div class='add'>+	for (i = 0; i &lt; ICE_DPLL_PIN_SW_NUM; i++) {</div><div class='add'>+		pin = &amp;d-&gt;sma[i];</div><div class='add'>+		pin-&gt;idx = i;</div><div class='add'>+		pin-&gt;prop.type = DPLL_PIN_TYPE_EXT;</div><div class='add'>+		pin_abs_idx = ICE_DPLL_PIN_SW_INPUT_ABS(i) + input_idx_offset;</div><div class='add'>+		pin-&gt;prop.freq_supported =</div><div class='add'>+			ice_cgu_get_pin_freq_supp(&amp;pf-&gt;hw, pin_abs_idx,</div><div class='add'>+						  true, &amp;freq_supp_num);</div><div class='add'>+		pin-&gt;prop.freq_supported_num = freq_supp_num;</div><div class='add'>+		pin-&gt;prop.capabilities =</div><div class='add'>+			(DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE |</div><div class='add'>+			 DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE |</div><div class='add'>+			 caps);</div><div class='add'>+		pin-&gt;pf = pf;</div><div class='add'>+		pin-&gt;prop.board_label = ice_dpll_sw_pin_sma[i];</div><div class='add'>+		pin-&gt;input = &amp;d-&gt;inputs[pin_abs_idx];</div><div class='add'>+		if (pin-&gt;input-&gt;ref_sync)</div><div class='add'>+			pin-&gt;ref_sync = pin-&gt;input-&gt;ref_sync - pin_abs_idx;</div><div class='add'>+		pin-&gt;output = &amp;d-&gt;outputs[ICE_DPLL_PIN_SW_OUTPUT_ABS(i)];</div><div class='add'>+		ice_dpll_phase_range_set(&amp;pin-&gt;prop.phase_range, phase_adj_max);</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; ICE_DPLL_PIN_SW_NUM; i++) {</div><div class='add'>+		pin = &amp;d-&gt;ufl[i];</div><div class='add'>+		pin-&gt;idx = i;</div><div class='add'>+		pin-&gt;prop.type = DPLL_PIN_TYPE_EXT;</div><div class='add'>+		pin-&gt;prop.capabilities = caps;</div><div class='add'>+		pin-&gt;pf = pf;</div><div class='add'>+		pin-&gt;prop.board_label = ice_dpll_sw_pin_ufl[i];</div><div class='add'>+		if (i == ICE_DPLL_PIN_SW_1_IDX) {</div><div class='add'>+			pin-&gt;direction = DPLL_PIN_DIRECTION_OUTPUT;</div><div class='add'>+			pin_abs_idx = ICE_DPLL_PIN_SW_OUTPUT_ABS(i);</div><div class='add'>+			pin-&gt;prop.freq_supported =</div><div class='add'>+				ice_cgu_get_pin_freq_supp(&amp;pf-&gt;hw, pin_abs_idx,</div><div class='add'>+							  false,</div><div class='add'>+							  &amp;freq_supp_num);</div><div class='add'>+			pin-&gt;prop.freq_supported_num = freq_supp_num;</div><div class='add'>+			pin-&gt;input = NULL;</div><div class='add'>+			pin-&gt;output = &amp;d-&gt;outputs[pin_abs_idx];</div><div class='add'>+		} else if (i == ICE_DPLL_PIN_SW_2_IDX) {</div><div class='add'>+			pin-&gt;direction = DPLL_PIN_DIRECTION_INPUT;</div><div class='add'>+			pin_abs_idx = ICE_DPLL_PIN_SW_INPUT_ABS(i) +</div><div class='add'>+				      input_idx_offset;</div><div class='add'>+			pin-&gt;output = NULL;</div><div class='add'>+			pin-&gt;input = &amp;d-&gt;inputs[pin_abs_idx];</div><div class='add'>+			pin-&gt;prop.freq_supported =</div><div class='add'>+				ice_cgu_get_pin_freq_supp(&amp;pf-&gt;hw, pin_abs_idx,</div><div class='add'>+							  true, &amp;freq_supp_num);</div><div class='add'>+			pin-&gt;prop.freq_supported_num = freq_supp_num;</div><div class='add'>+			pin-&gt;prop.capabilities =</div><div class='add'>+				(DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE |</div><div class='add'>+				 caps);</div><div class='add'>+		}</div><div class='add'>+		ice_dpll_phase_range_set(&amp;pin-&gt;prop.phase_range, phase_adj_max);</div><div class='add'>+	}</div><div class='add'>+	ret = ice_dpll_pin_state_update(pf, pin, ICE_DPLL_PIN_TYPE_SOFTWARE,</div><div class='add'>+					NULL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_dpll_init_pins_info - init pins info wrapper</div><div class='ctx'>  * @pf: board private structure</div><div class='ctx'>  * @pin_type: type of pins being initialized</div><div class='hunk'>@@ -2256,6 +3632,8 @@ ice_dpll_init_pins_info(struct ice_pf *pf, enum ice_dpll_pin_type pin_type)</div><div class='ctx'> 		return ice_dpll_init_info_direct_pins(pf, pin_type);</div><div class='ctx'> 	case ICE_DPLL_PIN_TYPE_RCLK_INPUT:</div><div class='ctx'> 		return ice_dpll_init_info_rclk_pin(pf);</div><div class='add'>+	case ICE_DPLL_PIN_TYPE_SOFTWARE:</div><div class='add'>+		return ice_dpll_init_info_sw_pins(pf);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2300,7 +3678,7 @@ static int ice_dpll_init_info(struct ice_pf *pf, bool cgu)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(pf),</div><div class='ctx'> 			"err:%d %s failed to read cgu abilities\n",</div><div class='del'>-			ret, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			ret, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2308,8 +3686,10 @@ static int ice_dpll_init_info(struct ice_pf *pf, bool cgu)</div><div class='ctx'> 	dp-&gt;dpll_idx = abilities.pps_dpll_idx;</div><div class='ctx'> 	d-&gt;num_inputs = abilities.num_inputs;</div><div class='ctx'> 	d-&gt;num_outputs = abilities.num_outputs;</div><div class='del'>-	d-&gt;input_phase_adj_max = le32_to_cpu(abilities.max_in_phase_adj);</div><div class='del'>-	d-&gt;output_phase_adj_max = le32_to_cpu(abilities.max_out_phase_adj);</div><div class='add'>+	d-&gt;input_phase_adj_max = le32_to_cpu(abilities.max_in_phase_adj) &amp;</div><div class='add'>+		ICE_AQC_GET_CGU_MAX_PHASE_ADJ;</div><div class='add'>+	d-&gt;output_phase_adj_max = le32_to_cpu(abilities.max_out_phase_adj) &amp;</div><div class='add'>+		ICE_AQC_GET_CGU_MAX_PHASE_ADJ;</div><div class='ctx'> </div><div class='ctx'> 	alloc_size = sizeof(*d-&gt;inputs) * d-&gt;num_inputs;</div><div class='ctx'> 	d-&gt;inputs = kzalloc(alloc_size, GFP_KERNEL);</div><div class='hunk'>@@ -2340,6 +3720,9 @@ static int ice_dpll_init_info(struct ice_pf *pf, bool cgu)</div><div class='ctx'> 		ret = ice_dpll_init_pins_info(pf, ICE_DPLL_PIN_TYPE_OUTPUT);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto deinit_info;</div><div class='add'>+		ret = ice_dpll_init_pins_info(pf, ICE_DPLL_PIN_TYPE_SOFTWARE);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto deinit_info;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = ice_get_cgu_rclk_pin_info(&amp;pf-&gt;hw, &amp;d-&gt;base_rclk_idx,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h<br/>index c320f1bf7d6d..c0da03384ce9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dpll.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_dpll.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_dpll.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_dpll.h</a></div><div class='hunk'>@@ -8,6 +8,18 @@</div><div class='ctx'> </div><div class='ctx'> #define ICE_DPLL_RCLK_NUM_MAX	4</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * enum ice_dpll_pin_sw - enumerate ice software pin indices:</div><div class='add'>+ * @ICE_DPLL_PIN_SW_1_IDX: index of first SW pin</div><div class='add'>+ * @ICE_DPLL_PIN_SW_2_IDX: index of second SW pin</div><div class='add'>+ * @ICE_DPLL_PIN_SW_NUM: number of SW pins in pair</div><div class='add'>+ */</div><div class='add'>+enum ice_dpll_pin_sw {</div><div class='add'>+	ICE_DPLL_PIN_SW_1_IDX,</div><div class='add'>+	ICE_DPLL_PIN_SW_2_IDX,</div><div class='add'>+	ICE_DPLL_PIN_SW_NUM</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /** ice_dpll_pin - store info about pins</div><div class='ctx'>  * @pin: dpll pin structure</div><div class='ctx'>  * @pf: pointer to pf, which has registered the dpll_pin</div><div class='hunk'>@@ -19,6 +31,8 @@</div><div class='ctx'>  * @prop: pin properties</div><div class='ctx'>  * @freq: current frequency of a pin</div><div class='ctx'>  * @phase_adjust: current phase adjust value</div><div class='add'>+ * @phase_offset: monitored phase offset value</div><div class='add'>+ * @ref_sync: store id of reference sync pin</div><div class='ctx'>  */</div><div class='ctx'> struct ice_dpll_pin {</div><div class='ctx'> 	struct dpll_pin *pin;</div><div class='hunk'>@@ -31,7 +45,14 @@ struct ice_dpll_pin {</div><div class='ctx'> 	struct dpll_pin_properties prop;</div><div class='ctx'> 	u32 freq;</div><div class='ctx'> 	s32 phase_adjust;</div><div class='add'>+	struct ice_dpll_pin *input;</div><div class='add'>+	struct ice_dpll_pin *output;</div><div class='add'>+	enum dpll_pin_direction direction;</div><div class='add'>+	s64 phase_offset;</div><div class='ctx'> 	u8 status;</div><div class='add'>+	u8 ref_sync;</div><div class='add'>+	bool active;</div><div class='add'>+	bool hidden;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /** ice_dpll - store info required for DPLL control</div><div class='hunk'>@@ -47,8 +68,10 @@ struct ice_dpll_pin {</div><div class='ctx'>  * @input_prio: priorities of each input</div><div class='ctx'>  * @dpll_state: current dpll sync state</div><div class='ctx'>  * @prev_dpll_state: last dpll sync state</div><div class='add'>+ * @phase_offset_monitor_period: period for phase offset monitor read frequency</div><div class='ctx'>  * @active_input: pointer to active input pin</div><div class='ctx'>  * @prev_input: pointer to previous active input pin</div><div class='add'>+ * @ops: holds the registered ops</div><div class='ctx'>  */</div><div class='ctx'> struct ice_dpll {</div><div class='ctx'> 	struct dpll_device *dpll;</div><div class='hunk'>@@ -64,8 +87,10 @@ struct ice_dpll {</div><div class='ctx'> 	enum dpll_lock_status dpll_state;</div><div class='ctx'> 	enum dpll_lock_status prev_dpll_state;</div><div class='ctx'> 	enum dpll_mode mode;</div><div class='add'>+	u32 phase_offset_monitor_period;</div><div class='ctx'> 	struct dpll_pin *active_input;</div><div class='ctx'> 	struct dpll_pin *prev_input;</div><div class='add'>+	const struct dpll_device_ops *ops;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /** ice_dplls - store info required for CCU (clock controlling unit)</div><div class='hunk'>@@ -84,6 +109,7 @@ struct ice_dpll {</div><div class='ctx'>  * @clock_id: clock_id of dplls</div><div class='ctx'>  * @input_phase_adj_max: max phase adjust value for an input pins</div><div class='ctx'>  * @output_phase_adj_max: max phase adjust value for an output pins</div><div class='add'>+ * @periodic_counter: counter of periodic work executions</div><div class='ctx'>  */</div><div class='ctx'> struct ice_dplls {</div><div class='ctx'> 	struct kthread_worker *kworker;</div><div class='hunk'>@@ -93,14 +119,19 @@ struct ice_dplls {</div><div class='ctx'> 	struct ice_dpll pps;</div><div class='ctx'> 	struct ice_dpll_pin *inputs;</div><div class='ctx'> 	struct ice_dpll_pin *outputs;</div><div class='add'>+	struct ice_dpll_pin sma[ICE_DPLL_PIN_SW_NUM];</div><div class='add'>+	struct ice_dpll_pin ufl[ICE_DPLL_PIN_SW_NUM];</div><div class='ctx'> 	struct ice_dpll_pin rclk;</div><div class='ctx'> 	u8 num_inputs;</div><div class='ctx'> 	u8 num_outputs;</div><div class='del'>-	int cgu_state_acq_err_num;</div><div class='add'>+	u8 sma_data;</div><div class='ctx'> 	u8 base_rclk_idx;</div><div class='add'>+	int cgu_state_acq_err_num;</div><div class='ctx'> 	u64 clock_id;</div><div class='ctx'> 	s32 input_phase_adj_max;</div><div class='ctx'> 	s32 output_phase_adj_max;</div><div class='add'>+	u32 periodic_counter;</div><div class='add'>+	bool generic;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_PTP_1588_CLOCK)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_eswitch.c b/drivers/net/ethernet/intel/ice/ice_eswitch.c<br/>index c0b3e70a7ea3..2e4f0969035f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_eswitch.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_eswitch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_eswitch.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_eswitch.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@ static int ice_eswitch_setup_env(struct ice_pf *pf)</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	ice_remove_vsi_fltr(&amp;pf-&gt;hw, uplink_vsi-&gt;idx);</div><div class='add'>+	ice_vsi_cfg_sw_lldp(uplink_vsi, true, false);</div><div class='ctx'> </div><div class='ctx'> 	netif_addr_lock_bh(netdev);</div><div class='ctx'> 	__dev_uc_unsync(netdev, NULL);</div><div class='hunk'>@@ -38,8 +39,7 @@ static int ice_eswitch_setup_env(struct ice_pf *pf)</div><div class='ctx'> 	if (ice_vsi_add_vlan_zero(uplink_vsi))</div><div class='ctx'> 		goto err_vlan_zero;</div><div class='ctx'> </div><div class='del'>-	if (ice_cfg_dflt_vsi(uplink_vsi-&gt;port_info, uplink_vsi-&gt;idx, true,</div><div class='del'>-			     ICE_FLTR_RX))</div><div class='add'>+	if (ice_set_dflt_vsi(uplink_vsi))</div><div class='ctx'> 		goto err_def_rx;</div><div class='ctx'> </div><div class='ctx'> 	if (ice_cfg_dflt_vsi(uplink_vsi-&gt;port_info, uplink_vsi-&gt;idx, true,</div><div class='hunk'>@@ -50,9 +50,6 @@ static int ice_eswitch_setup_env(struct ice_pf *pf)</div><div class='ctx'> 	if (vlan_ops-&gt;dis_rx_filtering(uplink_vsi))</div><div class='ctx'> 		goto err_vlan_filtering;</div><div class='ctx'> </div><div class='del'>-	if (ice_vsi_update_security(uplink_vsi, ice_vsi_ctx_set_allow_override))</div><div class='del'>-		goto err_override_uplink;</div><div class='del'>-</div><div class='ctx'> 	if (ice_vsi_update_local_lb(uplink_vsi, true))</div><div class='ctx'> 		goto err_override_local_lb;</div><div class='ctx'> </div><div class='hunk'>@@ -64,8 +61,6 @@ static int ice_eswitch_setup_env(struct ice_pf *pf)</div><div class='ctx'> err_up:</div><div class='ctx'> 	ice_vsi_update_local_lb(uplink_vsi, false);</div><div class='ctx'> err_override_local_lb:</div><div class='del'>-	ice_vsi_update_security(uplink_vsi, ice_vsi_ctx_clear_allow_override);</div><div class='del'>-err_override_uplink:</div><div class='ctx'> 	vlan_ops-&gt;ena_rx_filtering(uplink_vsi);</div><div class='ctx'> err_vlan_filtering:</div><div class='ctx'> 	ice_cfg_dflt_vsi(uplink_vsi-&gt;port_info, uplink_vsi-&gt;idx, false,</div><div class='hunk'>@@ -251,6 +246,10 @@ ice_eswitch_set_target_vsi(struct sk_buff *skb,</div><div class='ctx'> 	u64 cd_cmd, dst_vsi;</div><div class='ctx'> </div><div class='ctx'> 	if (!dst) {</div><div class='add'>+		struct ethhdr *eth = (struct ethhdr *)skb_mac_header(skb);</div><div class='add'>+</div><div class='add'>+		if (unlikely(eth-&gt;h_proto == htons(ETH_P_LLDP)))</div><div class='add'>+			return;</div><div class='ctx'> 		cd_cmd = ICE_TX_CTX_DESC_SWTCH_UPLINK &lt;&lt; ICE_TXD_CTX_QW1_CMD_S;</div><div class='ctx'> 		off-&gt;cd_qw1 |= (cd_cmd | ICE_TX_DESC_DTYPE_CTX);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -276,7 +275,6 @@ static void ice_eswitch_release_env(struct ice_pf *pf)</div><div class='ctx'> 	vlan_ops = ice_get_compat_vsi_vlan_ops(uplink_vsi);</div><div class='ctx'> </div><div class='ctx'> 	ice_vsi_update_local_lb(uplink_vsi, false);</div><div class='del'>-	ice_vsi_update_security(uplink_vsi, ice_vsi_ctx_clear_allow_override);</div><div class='ctx'> 	vlan_ops-&gt;ena_rx_filtering(uplink_vsi);</div><div class='ctx'> 	ice_cfg_dflt_vsi(uplink_vsi-&gt;port_info, uplink_vsi-&gt;idx, false,</div><div class='ctx'> 			 ICE_FLTR_TX);</div><div class='hunk'>@@ -285,6 +283,7 @@ static void ice_eswitch_release_env(struct ice_pf *pf)</div><div class='ctx'> 	ice_fltr_add_mac_and_broadcast(uplink_vsi,</div><div class='ctx'> 				       uplink_vsi-&gt;port_info-&gt;mac.perm_addr,</div><div class='ctx'> 				       ICE_FWD_TO_VSI);</div><div class='add'>+	ice_vsi_cfg_sw_lldp(uplink_vsi, true, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -509,10 +508,14 @@ err_create_repr:</div><div class='ctx'>  */</div><div class='ctx'> int ice_eswitch_attach_vf(struct ice_pf *pf, struct ice_vf *vf)</div><div class='ctx'> {</div><div class='del'>-	struct ice_repr *repr = ice_repr_create_vf(vf);</div><div class='ctx'> 	struct devlink *devlink = priv_to_devlink(pf);</div><div class='add'>+	struct ice_repr *repr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (!ice_is_eswitch_mode_switchdev(pf))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	repr = ice_repr_create_vf(vf);</div><div class='ctx'> 	if (IS_ERR(repr))</div><div class='ctx'> 		return PTR_ERR(repr);</div><div class='ctx'> </div><div class='hunk'>@@ -552,13 +555,14 @@ int ice_eswitch_attach_sf(struct ice_pf *pf, struct ice_dynamic_port *sf)</div><div class='ctx'> static void ice_eswitch_detach(struct ice_pf *pf, struct ice_repr *repr)</div><div class='ctx'> {</div><div class='ctx'> 	ice_eswitch_stop_reprs(pf);</div><div class='add'>+	repr-&gt;ops.rem(repr);</div><div class='add'>+</div><div class='ctx'> 	xa_erase(&amp;pf-&gt;eswitch.reprs, repr-&gt;id);</div><div class='ctx'> </div><div class='ctx'> 	if (xa_empty(&amp;pf-&gt;eswitch.reprs))</div><div class='ctx'> 		ice_eswitch_disable_switchdev(pf);</div><div class='ctx'> </div><div class='ctx'> 	ice_eswitch_release_repr(pf, repr);</div><div class='del'>-	repr-&gt;ops.rem(repr);</div><div class='ctx'> 	ice_repr_destroy(repr);</div><div class='ctx'> </div><div class='ctx'> 	if (xa_empty(&amp;pf-&gt;eswitch.reprs)) {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_eswitch.h b/drivers/net/ethernet/intel/ice/ice_eswitch.h<br/>index ac7db100e2cd..5c7dcf21b222 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_eswitch.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_eswitch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_eswitch.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_eswitch.h</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #define _ICE_ESWITCH_H_</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/devlink.h&gt;</div><div class='del'>-#include "devlink/devlink_port.h"</div><div class='add'>+#include "devlink/port.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ICE_SWITCHDEV</div><div class='ctx'> void ice_eswitch_detach_vf(struct ice_pf *pf, struct ice_vf *vf);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c<br/>index 2924ac61300d..969d4f8f9c02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_ethtool.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include "ice_lib.h"</div><div class='ctx'> #include "ice_dcb_lib.h"</div><div class='ctx'> #include &lt;net/dcbnl.h&gt;</div><div class='add'>+#include &lt;net/libeth/rx.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct ice_stats {</div><div class='ctx'> 	char stat_string[ETH_GSTRING_LEN];</div><div class='hunk'>@@ -340,7 +341,6 @@ static const struct ice_priv_flag ice_gstrings_priv_flags[] = {</div><div class='ctx'> 		      ICE_FLAG_VF_TRUE_PROMISC_ENA),</div><div class='ctx'> 	ICE_PRIV_FLAG("mdd-auto-reset-vf", ICE_FLAG_MDD_AUTO_RESET_VF),</div><div class='ctx'> 	ICE_PRIV_FLAG("vf-vlan-pruning", ICE_FLAG_VF_VLAN_PRUNING),</div><div class='del'>-	ICE_PRIV_FLAG("legacy-rx", ICE_FLAG_LEGACY_RX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define ICE_PRIV_FLAG_ARRAY_SIZE	ARRAY_SIZE(ice_gstrings_priv_flags)</div><div class='hunk'>@@ -667,7 +667,8 @@ static int ice_get_port_topology(struct ice_hw *hw, u8 lport,</div><div class='ctx'> </div><div class='ctx'> 		if (max_speed == ICE_AQC_PORT_OPT_MAX_LANE_100G)</div><div class='ctx'> 			port_topology-&gt;serdes_lane_count = 4;</div><div class='del'>-		else if (max_speed == ICE_AQC_PORT_OPT_MAX_LANE_50G)</div><div class='add'>+		else if (max_speed == ICE_AQC_PORT_OPT_MAX_LANE_50G ||</div><div class='add'>+			 max_speed == ICE_AQC_PORT_OPT_MAX_LANE_40G)</div><div class='ctx'> 			port_topology-&gt;serdes_lane_count = 2;</div><div class='ctx'> 		else</div><div class='ctx'> 			port_topology-&gt;serdes_lane_count = 1;</div><div class='hunk'>@@ -693,75 +694,52 @@ static int ice_get_port_topology(struct ice_hw *hw, u8 lport,</div><div class='ctx'> static int ice_get_tx_rx_equa(struct ice_hw *hw, u8 serdes_num,</div><div class='ctx'> 			      struct ice_serdes_equalization_to_ethtool *ptr)</div><div class='ctx'> {</div><div class='add'>+	static const int tx = ICE_AQC_OP_CODE_TX_EQU;</div><div class='add'>+	static const int rx = ICE_AQC_OP_CODE_RX_EQU;</div><div class='add'>+	struct {</div><div class='add'>+		int data_in;</div><div class='add'>+		int opcode;</div><div class='add'>+		int *out;</div><div class='add'>+	} aq_params[] = {</div><div class='add'>+		{ ICE_AQC_TX_EQU_PRE1, tx, &amp;ptr-&gt;tx_equ_pre1 },</div><div class='add'>+		{ ICE_AQC_TX_EQU_PRE3, tx, &amp;ptr-&gt;tx_equ_pre3 },</div><div class='add'>+		{ ICE_AQC_TX_EQU_ATTEN, tx, &amp;ptr-&gt;tx_equ_atten },</div><div class='add'>+		{ ICE_AQC_TX_EQU_POST1, tx, &amp;ptr-&gt;tx_equ_post1 },</div><div class='add'>+		{ ICE_AQC_TX_EQU_PRE2, tx, &amp;ptr-&gt;tx_equ_pre2 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_PRE2, rx, &amp;ptr-&gt;rx_equ_pre2 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_PRE1, rx, &amp;ptr-&gt;rx_equ_pre1 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_POST1, rx, &amp;ptr-&gt;rx_equ_post1 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_BFLF, rx, &amp;ptr-&gt;rx_equ_bflf },</div><div class='add'>+		{ ICE_AQC_RX_EQU_BFHF, rx, &amp;ptr-&gt;rx_equ_bfhf },</div><div class='add'>+		{ ICE_AQC_RX_EQU_CTLE_GAINHF, rx, &amp;ptr-&gt;rx_equ_ctle_gainhf },</div><div class='add'>+		{ ICE_AQC_RX_EQU_CTLE_GAINLF, rx, &amp;ptr-&gt;rx_equ_ctle_gainlf },</div><div class='add'>+		{ ICE_AQC_RX_EQU_CTLE_GAINDC, rx, &amp;ptr-&gt;rx_equ_ctle_gaindc },</div><div class='add'>+		{ ICE_AQC_RX_EQU_CTLE_BW, rx, &amp;ptr-&gt;rx_equ_ctle_bw },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_GAIN, rx, &amp;ptr-&gt;rx_equ_dfe_gain },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_GAIN2, rx, &amp;ptr-&gt;rx_equ_dfe_gain_2 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_2, rx, &amp;ptr-&gt;rx_equ_dfe_2 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_3, rx, &amp;ptr-&gt;rx_equ_dfe_3 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_4, rx, &amp;ptr-&gt;rx_equ_dfe_4 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_5, rx, &amp;ptr-&gt;rx_equ_dfe_5 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_6, rx, &amp;ptr-&gt;rx_equ_dfe_6 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_7, rx, &amp;ptr-&gt;rx_equ_dfe_7 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_8, rx, &amp;ptr-&gt;rx_equ_dfe_8 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_9, rx, &amp;ptr-&gt;rx_equ_dfe_9 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_10, rx, &amp;ptr-&gt;rx_equ_dfe_10 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_11, rx, &amp;ptr-&gt;rx_equ_dfe_11 },</div><div class='add'>+		{ ICE_AQC_RX_EQU_DFE_12, rx, &amp;ptr-&gt;rx_equ_dfe_12 },</div><div class='add'>+	};</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_TX_EQU_PRE1,</div><div class='del'>-					  ICE_AQC_OP_CODE_TX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;tx_equalization_pre1);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_TX_EQU_PRE3,</div><div class='del'>-					  ICE_AQC_OP_CODE_TX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;tx_equalization_pre3);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_TX_EQU_ATTEN,</div><div class='del'>-					  ICE_AQC_OP_CODE_TX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;tx_equalization_atten);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_TX_EQU_POST1,</div><div class='del'>-					  ICE_AQC_OP_CODE_TX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;tx_equalization_post1);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_TX_EQU_PRE2,</div><div class='del'>-					  ICE_AQC_OP_CODE_TX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;tx_equalization_pre2);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_RX_EQU_PRE2,</div><div class='del'>-					  ICE_AQC_OP_CODE_RX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;rx_equalization_pre2);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_RX_EQU_PRE1,</div><div class='del'>-					  ICE_AQC_OP_CODE_RX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;rx_equalization_pre1);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_RX_EQU_POST1,</div><div class='del'>-					  ICE_AQC_OP_CODE_RX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;rx_equalization_post1);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_RX_EQU_BFLF,</div><div class='del'>-					  ICE_AQC_OP_CODE_RX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;rx_equalization_bflf);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_RX_EQU_BFHF,</div><div class='del'>-					  ICE_AQC_OP_CODE_RX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;rx_equalization_bfhf);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_aq_get_phy_equalization(hw, ICE_AQC_RX_EQU_DRATE,</div><div class='del'>-					  ICE_AQC_OP_CODE_RX_EQU, serdes_num,</div><div class='del'>-					  &amp;ptr-&gt;rx_equalization_drate);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(aq_params); i++) {</div><div class='add'>+		err = ice_aq_get_phy_equalization(hw, aq_params[i].data_in,</div><div class='add'>+						  aq_params[i].opcode,</div><div class='add'>+						  serdes_num, aq_params[i].out);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -816,8 +794,7 @@ static int ice_get_extended_regs(struct net_device *netdev, void *p)</div><div class='ctx'> static void</div><div class='ctx'> ice_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	u32 *regs_buf = (u32 *)p;</div><div class='ctx'> 	unsigned int i;</div><div class='hunk'>@@ -832,8 +809,7 @@ ice_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)</div><div class='ctx'> </div><div class='ctx'> static u32 ice_get_msglevel(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_DYNAMIC_DEBUG</div><div class='ctx'> 	if (pf-&gt;hw.debug_mask)</div><div class='hunk'>@@ -846,8 +822,7 @@ static u32 ice_get_msglevel(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> static void ice_set_msglevel(struct net_device *netdev, u32 data)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> </div><div class='ctx'> #ifndef CONFIG_DYNAMIC_DEBUG</div><div class='ctx'> 	if (ICE_DBG_USER &amp; data)</div><div class='hunk'>@@ -859,10 +834,17 @@ static void ice_set_msglevel(struct net_device *netdev, u32 data)</div><div class='ctx'> #endif /* !CONFIG_DYNAMIC_DEBUG */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ice_get_link_ext_stats(struct net_device *netdev,</div><div class='add'>+				   struct ethtool_link_ext_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='add'>+</div><div class='add'>+	stats-&gt;link_down_events = pf-&gt;link_down_events;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ice_get_eeprom_len(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return (int)pf-&gt;hw.flash.flash_size;</div><div class='ctx'> }</div><div class='hunk'>@@ -871,9 +853,7 @@ static int</div><div class='ctx'> ice_get_eeprom(struct net_device *netdev, struct ethtool_eeprom *eeprom,</div><div class='ctx'> 	       u8 *bytes)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='del'>-	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -892,7 +872,7 @@ ice_get_eeprom(struct net_device *netdev, struct ethtool_eeprom *eeprom,</div><div class='ctx'> 	ret = ice_acquire_nvm(hw, ICE_RES_READ);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "ice_acquire_nvm failed, err %d aq_err %s\n",</div><div class='del'>-			ret, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			ret, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -900,7 +880,7 @@ ice_get_eeprom(struct net_device *netdev, struct ethtool_eeprom *eeprom,</div><div class='ctx'> 				false);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "ice_read_flat_nvm failed, err %d aq_err %s\n",</div><div class='del'>-			ret, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			ret, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		goto release;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -972,8 +952,7 @@ static u64 ice_link_test(struct net_device *netdev)</div><div class='ctx'>  */</div><div class='ctx'> static u64 ice_eeprom_test(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(netdev, "EEPROM test\n");</div><div class='ctx'> 	return !!(ice_nvm_validate_checksum(&amp;pf-&gt;hw));</div><div class='hunk'>@@ -1252,8 +1231,9 @@ static int ice_diag_send(struct ice_tx_ring *tx_ring, u8 *data, u16 size)</div><div class='ctx'>  */</div><div class='ctx'> static int ice_lbtest_receive_frames(struct ice_rx_ring *rx_ring)</div><div class='ctx'> {</div><div class='del'>-	struct ice_rx_buf *rx_buf;</div><div class='add'>+	struct libeth_fqe *rx_buf;</div><div class='ctx'> 	int valid_frames, i;</div><div class='add'>+	struct page *page;</div><div class='ctx'> 	u8 *received_buf;</div><div class='ctx'> </div><div class='ctx'> 	valid_frames = 0;</div><div class='hunk'>@@ -1268,8 +1248,10 @@ static int ice_lbtest_receive_frames(struct ice_rx_ring *rx_ring)</div><div class='ctx'> 		     cpu_to_le16(BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S)))))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		rx_buf = &amp;rx_ring-&gt;rx_buf[i];</div><div class='del'>-		received_buf = page_address(rx_buf-&gt;page) + rx_buf-&gt;page_offset;</div><div class='add'>+		rx_buf = &amp;rx_ring-&gt;rx_fqes[i];</div><div class='add'>+		page = __netmem_to_page(rx_buf-&gt;netmem);</div><div class='add'>+		received_buf = page_address(page) + rx_buf-&gt;offset +</div><div class='add'>+			       page-&gt;pp-&gt;p.offset;</div><div class='ctx'> </div><div class='ctx'> 		if (ice_lbtest_check_frame(received_buf))</div><div class='ctx'> 			valid_frames++;</div><div class='hunk'>@@ -1287,9 +1269,8 @@ static int ice_lbtest_receive_frames(struct ice_rx_ring *rx_ring)</div><div class='ctx'>  */</div><div class='ctx'> static u64 ice_loopback_test(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_vsi *orig_vsi = np-&gt;vsi, *test_vsi;</div><div class='del'>-	struct ice_pf *pf = orig_vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='add'>+	struct ice_vsi *test_vsi;</div><div class='ctx'> 	u8 *tx_frame __free(kfree) = NULL;</div><div class='ctx'> 	u8 broadcast[ETH_ALEN], ret = 0;</div><div class='ctx'> 	int num_frames, valid_frames;</div><div class='hunk'>@@ -1378,8 +1359,7 @@ lbtest_vsi_close:</div><div class='ctx'>  */</div><div class='ctx'> static u64 ice_intr_test(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> 	u16 swic_old = pf-&gt;sw_int_count;</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(netdev, "interrupt test\n");</div><div class='hunk'>@@ -1407,9 +1387,8 @@ static void</div><div class='ctx'> ice_self_test(struct net_device *netdev, struct ethtool_test *eth_test,</div><div class='ctx'> 	      u64 *data)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> 	bool if_running = netif_running(netdev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> </div><div class='ctx'> 	dev = ice_pf_to_dev(pf);</div><div class='hunk'>@@ -1733,9 +1712,7 @@ static int ice_nway_reset(struct net_device *netdev)</div><div class='ctx'>  */</div><div class='ctx'> static u32 ice_get_priv_flags(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='del'>-	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> 	u32 i, ret_flags = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ICE_PRIV_FLAG_ARRAY_SIZE; i++) {</div><div class='hunk'>@@ -1841,7 +1818,7 @@ static int ice_set_priv_flags(struct net_device *netdev, u32 flags)</div><div class='ctx'> 			/* Remove rule to direct LLDP packets to default VSI.</div><div class='ctx'> 			 * The FW LLDP engine will now be consuming them.</div><div class='ctx'> 			 */</div><div class='del'>-			ice_cfg_sw_lldp(vsi, false, false);</div><div class='add'>+			ice_cfg_sw_rx_lldp(vsi-&gt;back, false);</div><div class='ctx'> </div><div class='ctx'> 			/* AQ command to start FW LLDP agent will return an</div><div class='ctx'> 			 * error if the agent is already started</div><div class='hunk'>@@ -1882,10 +1859,6 @@ static int ice_set_priv_flags(struct net_device *netdev, u32 flags)</div><div class='ctx'> 			ice_nway_reset(netdev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (test_bit(ICE_FLAG_LEGACY_RX, change_flags)) {</div><div class='del'>-		/* down and up VSI so that changes of Rx cfg are reflected. */</div><div class='del'>-		ice_down_up(vsi);</div><div class='del'>-	}</div><div class='ctx'> 	/* don't allow modification of this flag when a single VF is in</div><div class='ctx'> 	 * promiscuous mode because it's not supported</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -2811,14 +2784,7 @@ done:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_parse_hdrs - parses headers from RSS hash input</div><div class='del'>- * @nfc: ethtool rxnfc command</div><div class='del'>- *</div><div class='del'>- * This function parses the rxnfc command and returns intended</div><div class='del'>- * header types for RSS configuration</div><div class='del'>- */</div><div class='del'>-static u32 ice_parse_hdrs(struct ethtool_rxnfc *nfc)</div><div class='add'>+static u32 ice_parse_hdrs(const struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='ctx'> 	u32 hdrs = ICE_FLOW_SEG_HDR_NONE;</div><div class='ctx'> </div><div class='hunk'>@@ -2883,15 +2849,7 @@ static u32 ice_parse_hdrs(struct ethtool_rxnfc *nfc)</div><div class='ctx'> 	return hdrs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_parse_hash_flds - parses hash fields from RSS hash input</div><div class='del'>- * @nfc: ethtool rxnfc command</div><div class='del'>- * @symm: true if Symmetric Topelitz is set</div><div class='del'>- *</div><div class='del'>- * This function parses the rxnfc command and returns intended</div><div class='del'>- * hash fields for RSS configuration</div><div class='del'>- */</div><div class='del'>-static u64 ice_parse_hash_flds(struct ethtool_rxnfc *nfc, bool symm)</div><div class='add'>+static u64 ice_parse_hash_flds(const struct ethtool_rxfh_fields *nfc, bool symm)</div><div class='ctx'> {</div><div class='ctx'> 	u64 hfld = ICE_HASH_INVALID;</div><div class='ctx'> </div><div class='hunk'>@@ -2988,16 +2946,13 @@ static u64 ice_parse_hash_flds(struct ethtool_rxnfc *nfc, bool symm)</div><div class='ctx'> 	return hfld;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_set_rss_hash_opt - Enable/Disable flow types for RSS hash</div><div class='del'>- * @vsi: the VSI being configured</div><div class='del'>- * @nfc: ethtool rxnfc command</div><div class='del'>- *</div><div class='del'>- * Returns Success if the flow input set is supported.</div><div class='del'>- */</div><div class='ctx'> static int</div><div class='del'>-ice_set_rss_hash_opt(struct ice_vsi *vsi, struct ethtool_rxnfc *nfc)</div><div class='add'>+ice_set_rxfh_fields(struct net_device *netdev,</div><div class='add'>+		    const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+		    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='ctx'> 	struct ice_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	struct ice_rss_hash_cfg cfg;</div><div class='ctx'> 	struct device *dev;</div><div class='hunk'>@@ -3043,14 +2998,11 @@ ice_set_rss_hash_opt(struct ice_vsi *vsi, struct ethtool_rxnfc *nfc)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_get_rss_hash_opt - Retrieve hash fields for a given flow-type</div><div class='del'>- * @vsi: the VSI being configured</div><div class='del'>- * @nfc: ethtool rxnfc command</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-ice_get_rss_hash_opt(struct ice_vsi *vsi, struct ethtool_rxnfc *nfc)</div><div class='add'>+static int</div><div class='add'>+ice_get_rxfh_fields(struct net_device *netdev, struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='add'>+	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='ctx'> 	struct ice_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	u64 hash_flds;</div><div class='hunk'>@@ -3063,21 +3015,21 @@ ice_get_rss_hash_opt(struct ice_vsi *vsi, struct ethtool_rxnfc *nfc)</div><div class='ctx'> 	if (ice_is_safe_mode(pf)) {</div><div class='ctx'> 		dev_dbg(dev, "Advanced RSS disabled. Package download failed, vsi num = %d\n",</div><div class='ctx'> 			vsi-&gt;vsi_num);</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hdrs = ice_parse_hdrs(nfc);</div><div class='ctx'> 	if (hdrs == ICE_FLOW_SEG_HDR_NONE) {</div><div class='ctx'> 		dev_dbg(dev, "Header type is not valid, vsi num = %d\n",</div><div class='ctx'> 			vsi-&gt;vsi_num);</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hash_flds = ice_get_rss_cfg(&amp;pf-&gt;hw, vsi-&gt;idx, hdrs, &amp;symm);</div><div class='ctx'> 	if (hash_flds == ICE_HASH_INVALID) {</div><div class='ctx'> 		dev_dbg(dev, "No hash fields found for the given header type, vsi num = %d\n",</div><div class='ctx'> 			vsi-&gt;vsi_num);</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (hash_flds &amp; ICE_FLOW_HASH_FLD_IPV4_SA ||</div><div class='hunk'>@@ -3104,6 +3056,8 @@ ice_get_rss_hash_opt(struct ice_vsi *vsi, struct ethtool_rxnfc *nfc)</div><div class='ctx'> 	    hash_flds &amp; ICE_FLOW_HASH_FLD_GTPU_UP_TEID ||</div><div class='ctx'> 	    hash_flds &amp; ICE_FLOW_HASH_FLD_GTPU_DWN_TEID)</div><div class='ctx'> 		nfc-&gt;data |= (u64)RXH_GTP_TEID;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3123,8 +3077,6 @@ static int ice_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 		return ice_add_fdir_ethtool(vsi, cmd);</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLDEL:</div><div class='ctx'> 		return ice_del_fdir_ethtool(vsi, cmd);</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		return ice_set_rss_hash_opt(vsi, cmd);</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3132,6 +3084,20 @@ static int ice_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_get_rx_ring_count - get RX ring count</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: number of RX rings.</div><div class='add'>+ */</div><div class='add'>+static u32 ice_get_rx_ring_count(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='add'>+</div><div class='add'>+	return vsi-&gt;rss_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_get_rxnfc - command to get Rx flow classification rules</div><div class='ctx'>  * @netdev: network interface device structure</div><div class='ctx'>  * @cmd: ethtool rxnfc command</div><div class='hunk'>@@ -3151,10 +3117,6 @@ ice_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = vsi-&gt;rss_size;</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		cmd-&gt;rule_cnt = hw-&gt;fdir_active_fltr;</div><div class='ctx'> 		/* report total rule count */</div><div class='hunk'>@@ -3167,10 +3129,6 @@ ice_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLALL:</div><div class='ctx'> 		ret = ice_get_fdir_fltr_ids(hw, cmd, (u32 *)rule_locs);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ice_get_rss_hash_opt(vsi, cmd);</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3185,9 +3143,11 @@ ice_get_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='ctx'> 	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='add'>+	struct ice_hw *hw;</div><div class='ctx'> </div><div class='del'>-	ring-&gt;rx_max_pending = ICE_MAX_NUM_DESC;</div><div class='del'>-	ring-&gt;tx_max_pending = ICE_MAX_NUM_DESC;</div><div class='add'>+	hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='add'>+	ring-&gt;rx_max_pending = ICE_MAX_NUM_DESC_BY_MAC(hw);</div><div class='add'>+	ring-&gt;tx_max_pending = ICE_MAX_NUM_DESC_BY_MAC(hw);</div><div class='ctx'> 	if (vsi-&gt;tx_rings &amp;&amp; vsi-&gt;rx_rings) {</div><div class='ctx'> 		ring-&gt;rx_pending = vsi-&gt;rx_rings[0]-&gt;count;</div><div class='ctx'> 		ring-&gt;tx_pending = vsi-&gt;tx_rings[0]-&gt;count;</div><div class='hunk'>@@ -3201,6 +3161,10 @@ ice_get_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring,</div><div class='ctx'> 	ring-&gt;rx_jumbo_max_pending = 0;</div><div class='ctx'> 	ring-&gt;rx_mini_pending = 0;</div><div class='ctx'> 	ring-&gt;rx_jumbo_pending = 0;</div><div class='add'>+</div><div class='add'>+	kernel_ring-&gt;tcp_data_split = vsi-&gt;hsplit ?</div><div class='add'>+				      ETHTOOL_TCP_DATA_SPLIT_ENABLED :</div><div class='add'>+				      ETHTOOL_TCP_DATA_SPLIT_DISABLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -3215,15 +3179,17 @@ ice_set_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring,</div><div class='ctx'> 	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='ctx'> 	struct ice_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	int i, timeout = 50, err = 0;</div><div class='add'>+	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	u16 new_rx_cnt, new_tx_cnt;</div><div class='add'>+	bool hsplit;</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;tx_pending &gt; ICE_MAX_NUM_DESC ||</div><div class='add'>+	if (ring-&gt;tx_pending &gt; ICE_MAX_NUM_DESC_BY_MAC(hw) ||</div><div class='ctx'> 	    ring-&gt;tx_pending &lt; ICE_MIN_NUM_DESC ||</div><div class='del'>-	    ring-&gt;rx_pending &gt; ICE_MAX_NUM_DESC ||</div><div class='add'>+	    ring-&gt;rx_pending &gt; ICE_MAX_NUM_DESC_BY_MAC(hw) ||</div><div class='ctx'> 	    ring-&gt;rx_pending &lt; ICE_MIN_NUM_DESC) {</div><div class='ctx'> 		netdev_err(netdev, "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d] (increment %d)\n",</div><div class='ctx'> 			   ring-&gt;tx_pending, ring-&gt;rx_pending,</div><div class='del'>-			   ICE_MIN_NUM_DESC, ICE_MAX_NUM_DESC,</div><div class='add'>+			   ICE_MIN_NUM_DESC, ICE_MAX_NUM_DESC_BY_MAC(hw),</div><div class='ctx'> 			   ICE_REQ_DESC_MULTIPLE);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3241,9 +3207,12 @@ ice_set_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring,</div><div class='ctx'> 		netdev_info(netdev, "Requested Rx descriptor count rounded up to %d\n",</div><div class='ctx'> 			    new_rx_cnt);</div><div class='ctx'> </div><div class='add'>+	hsplit = kernel_ring-&gt;tcp_data_split == ETHTOOL_TCP_DATA_SPLIT_ENABLED;</div><div class='add'>+</div><div class='ctx'> 	/* if nothing to do return success */</div><div class='ctx'> 	if (new_tx_cnt == vsi-&gt;tx_rings[0]-&gt;count &amp;&amp;</div><div class='del'>-	    new_rx_cnt == vsi-&gt;rx_rings[0]-&gt;count) {</div><div class='add'>+	    new_rx_cnt == vsi-&gt;rx_rings[0]-&gt;count &amp;&amp;</div><div class='add'>+	    hsplit == vsi-&gt;hsplit) {</div><div class='ctx'> 		netdev_dbg(netdev, "Nothing to change, descriptor count is same as requested\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3273,6 +3242,8 @@ ice_set_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring,</div><div class='ctx'> 				vsi-&gt;xdp_rings[i]-&gt;count = new_tx_cnt;</div><div class='ctx'> 		vsi-&gt;num_tx_desc = (u16)new_tx_cnt;</div><div class='ctx'> 		vsi-&gt;num_rx_desc = (u16)new_rx_cnt;</div><div class='add'>+		vsi-&gt;hsplit = hsplit;</div><div class='add'>+</div><div class='ctx'> 		netdev_dbg(netdev, "Link is down, descriptor count change happens when link is brought up\n");</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3296,6 +3267,7 @@ ice_set_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring,</div><div class='ctx'> 		tx_rings[i].count = new_tx_cnt;</div><div class='ctx'> 		tx_rings[i].desc = NULL;</div><div class='ctx'> 		tx_rings[i].tx_buf = NULL;</div><div class='add'>+		tx_rings[i].tstamp_ring = NULL;</div><div class='ctx'> 		tx_rings[i].tx_tstamps = &amp;pf-&gt;ptp.port.tx;</div><div class='ctx'> 		err = ice_setup_tx_ring(&amp;tx_rings[i]);</div><div class='ctx'> 		if (err) {</div><div class='hunk'>@@ -3355,7 +3327,8 @@ process_rx:</div><div class='ctx'> 		rx_rings[i].count = new_rx_cnt;</div><div class='ctx'> 		rx_rings[i].cached_phctime = pf-&gt;ptp.cached_phc_time;</div><div class='ctx'> 		rx_rings[i].desc = NULL;</div><div class='del'>-		rx_rings[i].rx_buf = NULL;</div><div class='add'>+		rx_rings[i].xdp_buf = NULL;</div><div class='add'>+</div><div class='ctx'> 		/* this is to allow wr32 to have something to write to</div><div class='ctx'> 		 * during early allocation of Rx buffers</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -3364,10 +3337,6 @@ process_rx:</div><div class='ctx'> 		err = ice_setup_rx_ring(&amp;rx_rings[i]);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto rx_unwind;</div><div class='del'>-</div><div class='del'>-		/* allocate Rx buffers */</div><div class='del'>-		err = ice_alloc_rx_bufs(&amp;rx_rings[i],</div><div class='del'>-					ICE_RX_DESC_UNUSED(&amp;rx_rings[i]));</div><div class='ctx'> rx_unwind:</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			while (i) {</div><div class='hunk'>@@ -3381,6 +3350,8 @@ rx_unwind:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> process_link:</div><div class='add'>+	vsi-&gt;hsplit = hsplit;</div><div class='add'>+</div><div class='ctx'> 	/* Bring interface down, copy in the new ring info, then restore the</div><div class='ctx'> 	 * interface. if VSI is up, bring it down and then back up</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -3580,15 +3551,15 @@ ice_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *pause)</div><div class='ctx'> </div><div class='ctx'> 	if (aq_failures &amp; ICE_SET_FC_AQ_FAIL_GET) {</div><div class='ctx'> 		netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %d aq_err %s\n",</div><div class='del'>-			    err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			    err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		err = -EAGAIN;</div><div class='ctx'> 	} else if (aq_failures &amp; ICE_SET_FC_AQ_FAIL_SET) {</div><div class='ctx'> 		netdev_info(netdev, "Set fc failed on the set_phy_config call with err %d aq_err %s\n",</div><div class='del'>-			    err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			    err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		err = -EAGAIN;</div><div class='ctx'> 	} else if (aq_failures &amp; ICE_SET_FC_AQ_FAIL_UPDATE) {</div><div class='ctx'> 		netdev_info(netdev, "Set fc failed on the get_link_info call with err %d aq_err %s\n",</div><div class='del'>-			    err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			    err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		err = -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3630,11 +3601,10 @@ static int</div><div class='ctx'> ice_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	u32 rss_context = rxfh-&gt;rss_context;</div><div class='ctx'> 	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='ctx'> 	struct ice_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	u16 qcount, offset;</div><div class='del'>-	int err, num_tc, i;</div><div class='add'>+	int err, i;</div><div class='ctx'> 	u8 *lut;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(ICE_FLAG_RSS_ENA, pf-&gt;flags)) {</div><div class='hunk'>@@ -3642,24 +3612,8 @@ ice_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (rss_context &amp;&amp; !ice_is_adq_active(pf)) {</div><div class='del'>-		netdev_err(netdev, "RSS context cannot be non-zero when ADQ is not configured.\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	qcount = vsi-&gt;mqprio_qopt.qopt.count[rss_context];</div><div class='del'>-	offset = vsi-&gt;mqprio_qopt.qopt.offset[rss_context];</div><div class='del'>-</div><div class='del'>-	if (rss_context &amp;&amp; ice_is_adq_active(pf)) {</div><div class='del'>-		num_tc = vsi-&gt;mqprio_qopt.qopt.num_tc;</div><div class='del'>-		if (rss_context &gt;= num_tc) {</div><div class='del'>-			netdev_err(netdev, "RSS context:%d  &gt; num_tc:%d\n",</div><div class='del'>-				   rss_context, num_tc);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-		/* Use channel VSI of given TC */</div><div class='del'>-		vsi = vsi-&gt;tc_map_vsi[rss_context];</div><div class='del'>-	}</div><div class='add'>+	qcount = vsi-&gt;mqprio_qopt.qopt.count[0];</div><div class='add'>+	offset = vsi-&gt;mqprio_qopt.qopt.offset[0];</div><div class='ctx'> </div><div class='ctx'> 	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='ctx'> 	if (vsi-&gt;rss_hfunc == ICE_AQ_VSI_Q_OPT_RSS_HASH_SYM_TPLZ)</div><div class='hunk'>@@ -3719,9 +3673,6 @@ ice_set_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh,</div><div class='ctx'> 	    rxfh-&gt;hfunc != ETH_RSS_HASH_TOP)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (rxfh-&gt;rss_context)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	if (!test_bit(ICE_FLAG_RSS_ENA, pf-&gt;flags)) {</div><div class='ctx'> 		/* RSS not supported return error here */</div><div class='ctx'> 		netdev_warn(netdev, "RSS is not configured on this VSI!\n");</div><div class='hunk'>@@ -3811,8 +3762,7 @@ ice_get_ts_info(struct net_device *dev, struct kernel_ethtool_ts_info *info)</div><div class='ctx'>  */</div><div class='ctx'> static int ice_get_max_txq(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	return min3(pf-&gt;num_lan_msix, (u16)num_online_cpus(),</div><div class='del'>-		    (u16)pf-&gt;hw.func_caps.common_cap.num_txq);</div><div class='add'>+	return min(num_online_cpus(), pf-&gt;hw.func_caps.common_cap.num_txq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3821,8 +3771,7 @@ static int ice_get_max_txq(struct ice_pf *pf)</div><div class='ctx'>  */</div><div class='ctx'> static int ice_get_max_rxq(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	return min3(pf-&gt;num_lan_msix, (u16)num_online_cpus(),</div><div class='del'>-		    (u16)pf-&gt;hw.func_caps.common_cap.num_rxq);</div><div class='add'>+	return min(num_online_cpus(), pf-&gt;hw.func_caps.common_cap.num_rxq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3840,8 +3789,7 @@ static u32 ice_get_combined_cnt(struct ice_vsi *vsi)</div><div class='ctx'> 	ice_for_each_q_vector(vsi, q_idx) {</div><div class='ctx'> 		struct ice_q_vector *q_vector = vsi-&gt;q_vectors[q_idx];</div><div class='ctx'> </div><div class='del'>-		if (q_vector-&gt;rx.rx_ring &amp;&amp; q_vector-&gt;tx.tx_ring)</div><div class='del'>-			combined++;</div><div class='add'>+		combined += min(q_vector-&gt;num_ring_tx, q_vector-&gt;num_ring_rx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return combined;</div><div class='hunk'>@@ -3922,7 +3870,7 @@ static int ice_vsi_set_dflt_rss_lut(struct ice_vsi *vsi, int req_rss_size)</div><div class='ctx'> 	err = ice_set_rss_lut(vsi, lut, vsi-&gt;rss_table_size);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_err(dev, "Cannot set RSS lut, err %d aq_err %s\n", err,</div><div class='del'>-			ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	kfree(lut);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -3990,11 +3938,11 @@ static int ice_set_channels(struct net_device *dev, struct ethtool_channels *ch)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pf-&gt;adev) {</div><div class='add'>+	if (pf-&gt;cdev_info &amp;&amp; pf-&gt;cdev_info-&gt;adev) {</div><div class='ctx'> 		mutex_lock(&amp;pf-&gt;adev_mutex);</div><div class='del'>-		device_lock(&amp;pf-&gt;adev-&gt;dev);</div><div class='add'>+		device_lock(&amp;pf-&gt;cdev_info-&gt;adev-&gt;dev);</div><div class='ctx'> 		locked = true;</div><div class='del'>-		if (pf-&gt;adev-&gt;dev.driver) {</div><div class='add'>+		if (pf-&gt;cdev_info-&gt;adev-&gt;dev.driver) {</div><div class='ctx'> 			netdev_err(dev, "Cannot change channels when RDMA is active\n");</div><div class='ctx'> 			ret = -EBUSY;</div><div class='ctx'> 			goto adev_unlock;</div><div class='hunk'>@@ -4013,7 +3961,7 @@ static int ice_set_channels(struct net_device *dev, struct ethtool_channels *ch)</div><div class='ctx'> </div><div class='ctx'> adev_unlock:</div><div class='ctx'> 	if (locked) {</div><div class='del'>-		device_unlock(&amp;pf-&gt;adev-&gt;dev);</div><div class='add'>+		device_unlock(&amp;pf-&gt;cdev_info-&gt;adev-&gt;dev);</div><div class='ctx'> 		mutex_unlock(&amp;pf-&gt;adev_mutex);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -4474,9 +4422,7 @@ static int</div><div class='ctx'> ice_get_module_info(struct net_device *netdev,</div><div class='ctx'> 		    struct ethtool_modinfo *modinfo)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='del'>-	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	u8 sff8472_comp = 0;</div><div class='ctx'> 	u8 sff8472_swap = 0;</div><div class='hunk'>@@ -4548,12 +4494,10 @@ static int</div><div class='ctx'> ice_get_module_eeprom(struct net_device *netdev,</div><div class='ctx'> 		      struct ethtool_eeprom *ee, u8 *data)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> #define SFF_READ_BLOCK_SIZE 8</div><div class='ctx'> 	u8 value[SFF_READ_BLOCK_SIZE] = { 0 };</div><div class='ctx'> 	u8 addr = ICE_I2C_EEPROM_DEV_ADDR;</div><div class='del'>-	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='del'>-	struct ice_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	bool is_sfp = false;</div><div class='ctx'> 	unsigned int i, j;</div><div class='hunk'>@@ -4681,10 +4625,12 @@ static int ice_get_port_fec_stats(struct ice_hw *hw, u16 pcs_quad, u16 pcs_port,</div><div class='ctx'>  * ice_get_fec_stats - returns FEC correctable, uncorrectable stats per netdev</div><div class='ctx'>  * @netdev: network interface device structure</div><div class='ctx'>  * @fec_stats: buffer to hold FEC statistics for given port</div><div class='add'>+ * @hist: buffer to put FEC histogram statistics for given port</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> static void ice_get_fec_stats(struct net_device *netdev,</div><div class='del'>-			      struct ethtool_fec_stats *fec_stats)</div><div class='add'>+			      struct ethtool_fec_stats *fec_stats,</div><div class='add'>+			      struct ethtool_fec_hist *hist)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='ctx'> 	struct ice_port_topology port_topology;</div><div class='hunk'>@@ -4716,6 +4662,98 @@ static void ice_get_fec_stats(struct net_device *netdev,</div><div class='ctx'> 			    pi-&gt;lport, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ice_get_eth_mac_stats(struct net_device *netdev,</div><div class='add'>+				  struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='add'>+	struct ice_hw_port_stats *ps = &amp;pf-&gt;stats;</div><div class='add'>+</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK = ps-&gt;eth.tx_unicast +</div><div class='add'>+					 ps-&gt;eth.tx_multicast +</div><div class='add'>+					 ps-&gt;eth.tx_broadcast;</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK = ps-&gt;eth.rx_unicast +</div><div class='add'>+				      ps-&gt;eth.rx_multicast +</div><div class='add'>+				      ps-&gt;eth.rx_broadcast;</div><div class='add'>+	mac_stats-&gt;FrameCheckSequenceErrors = ps-&gt;crc_errors;</div><div class='add'>+	mac_stats-&gt;OctetsTransmittedOK = ps-&gt;eth.tx_bytes;</div><div class='add'>+	mac_stats-&gt;OctetsReceivedOK = ps-&gt;eth.rx_bytes;</div><div class='add'>+	mac_stats-&gt;MulticastFramesXmittedOK = ps-&gt;eth.tx_multicast;</div><div class='add'>+	mac_stats-&gt;BroadcastFramesXmittedOK = ps-&gt;eth.tx_broadcast;</div><div class='add'>+	mac_stats-&gt;MulticastFramesReceivedOK = ps-&gt;eth.rx_multicast;</div><div class='add'>+	mac_stats-&gt;BroadcastFramesReceivedOK = ps-&gt;eth.rx_broadcast;</div><div class='add'>+	mac_stats-&gt;InRangeLengthErrors = ps-&gt;rx_len_errors;</div><div class='add'>+	mac_stats-&gt;FrameTooLongErrors = ps-&gt;rx_oversize;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ice_get_pause_stats(struct net_device *netdev,</div><div class='add'>+				struct ethtool_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='add'>+	struct ice_hw_port_stats *ps = &amp;pf-&gt;stats;</div><div class='add'>+</div><div class='add'>+	pause_stats-&gt;tx_pause_frames = ps-&gt;link_xon_tx + ps-&gt;link_xoff_tx;</div><div class='add'>+	pause_stats-&gt;rx_pause_frames = ps-&gt;link_xon_rx + ps-&gt;link_xoff_rx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range ice_rmon_ranges[] = {</div><div class='add'>+	{    0,    64 },</div><div class='add'>+	{   65,   127 },</div><div class='add'>+	{  128,   255 },</div><div class='add'>+	{  256,   511 },</div><div class='add'>+	{  512,  1023 },</div><div class='add'>+	{ 1024,  1522 },</div><div class='add'>+	{ 1523,  9522 },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ice_get_rmon_stats(struct net_device *netdev,</div><div class='add'>+			       struct ethtool_rmon_stats *rmon,</div><div class='add'>+			       const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='add'>+	struct ice_hw_port_stats *ps = &amp;pf-&gt;stats;</div><div class='add'>+</div><div class='add'>+	rmon-&gt;undersize_pkts	= ps-&gt;rx_undersize;</div><div class='add'>+	rmon-&gt;oversize_pkts	= ps-&gt;rx_oversize;</div><div class='add'>+	rmon-&gt;fragments		= ps-&gt;rx_fragments;</div><div class='add'>+	rmon-&gt;jabbers		= ps-&gt;rx_jabber;</div><div class='add'>+</div><div class='add'>+	rmon-&gt;hist[0]		= ps-&gt;rx_size_64;</div><div class='add'>+	rmon-&gt;hist[1]		= ps-&gt;rx_size_127;</div><div class='add'>+	rmon-&gt;hist[2]		= ps-&gt;rx_size_255;</div><div class='add'>+	rmon-&gt;hist[3]		= ps-&gt;rx_size_511;</div><div class='add'>+	rmon-&gt;hist[4]		= ps-&gt;rx_size_1023;</div><div class='add'>+	rmon-&gt;hist[5]		= ps-&gt;rx_size_1522;</div><div class='add'>+	rmon-&gt;hist[6]		= ps-&gt;rx_size_big;</div><div class='add'>+</div><div class='add'>+	rmon-&gt;hist_tx[0]	= ps-&gt;tx_size_64;</div><div class='add'>+	rmon-&gt;hist_tx[1]	= ps-&gt;tx_size_127;</div><div class='add'>+	rmon-&gt;hist_tx[2]	= ps-&gt;tx_size_255;</div><div class='add'>+	rmon-&gt;hist_tx[3]	= ps-&gt;tx_size_511;</div><div class='add'>+	rmon-&gt;hist_tx[4]	= ps-&gt;tx_size_1023;</div><div class='add'>+	rmon-&gt;hist_tx[5]	= ps-&gt;tx_size_1522;</div><div class='add'>+	rmon-&gt;hist_tx[6]	= ps-&gt;tx_size_big;</div><div class='add'>+</div><div class='add'>+	*ranges = ice_rmon_ranges;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ice_get_ts_stats - provide timestamping stats</div><div class='add'>+ * @netdev: the netdevice pointer from ethtool</div><div class='add'>+ * @ts_stats: the ethtool data structure to fill in</div><div class='add'>+ */</div><div class='add'>+static void ice_get_ts_stats(struct net_device *netdev,</div><div class='add'>+			     struct ethtool_ts_stats *ts_stats)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='add'>+	struct ice_ptp *ptp = &amp;pf-&gt;ptp;</div><div class='add'>+</div><div class='add'>+	ts_stats-&gt;pkts = ptp-&gt;tx_hwtstamp_good;</div><div class='add'>+	ts_stats-&gt;err = ptp-&gt;tx_hwtstamp_skipped +</div><div class='add'>+			ptp-&gt;tx_hwtstamp_flushed +</div><div class='add'>+			ptp-&gt;tx_hwtstamp_discarded;</div><div class='add'>+	ts_stats-&gt;lost = ptp-&gt;tx_hwtstamp_timeouts;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define ICE_ETHTOOL_PFR (ETH_RESET_IRQ | ETH_RESET_DMA | \</div><div class='ctx'> 	ETH_RESET_FILTER | ETH_RESET_OFFLOAD)</div><div class='ctx'> </div><div class='hunk'>@@ -4737,8 +4775,7 @@ static void ice_get_fec_stats(struct net_device *netdev,</div><div class='ctx'>  */</div><div class='ctx'> static int ice_ethtool_reset(struct net_device *dev, u32 *flags)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(dev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(dev);</div><div class='ctx'> 	enum ice_reset_req reset;</div><div class='ctx'> </div><div class='ctx'> 	switch (*flags) {</div><div class='hunk'>@@ -4792,15 +4829,18 @@ static int ice_repr_ethtool_reset(struct net_device *dev, u32 *flags)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ice_ethtool_ops = {</div><div class='del'>-	.cap_rss_ctx_supported  = true,</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_ADAPTIVE |</div><div class='ctx'> 				     ETHTOOL_COALESCE_RX_USECS_HIGH,</div><div class='del'>-	.cap_rss_sym_xor_supported = true,</div><div class='del'>-	.rxfh_per_ctx_key	= true,</div><div class='add'>+	.supported_input_xfrm	= RXH_XFRM_SYM_XOR,</div><div class='add'>+	.supported_ring_params	= ETHTOOL_RING_USE_TCP_DATA_SPLIT,</div><div class='ctx'> 	.get_link_ksettings	= ice_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings	= ice_set_link_ksettings,</div><div class='ctx'> 	.get_fec_stats		= ice_get_fec_stats,</div><div class='add'>+	.get_eth_mac_stats	= ice_get_eth_mac_stats,</div><div class='add'>+	.get_pause_stats	= ice_get_pause_stats,</div><div class='add'>+	.get_rmon_stats		= ice_get_rmon_stats,</div><div class='add'>+	.get_ts_stats		= ice_get_ts_stats,</div><div class='ctx'> 	.get_drvinfo		= ice_get_drvinfo,</div><div class='ctx'> 	.get_regs_len		= ice_get_regs_len,</div><div class='ctx'> 	.get_regs		= ice_get_regs,</div><div class='hunk'>@@ -4810,6 +4850,7 @@ static const struct ethtool_ops ice_ethtool_ops = {</div><div class='ctx'> 	.set_msglevel		= ice_set_msglevel,</div><div class='ctx'> 	.self_test		= ice_self_test,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_link_ext_stats	= ice_get_link_ext_stats,</div><div class='ctx'> 	.get_eeprom_len		= ice_get_eeprom_len,</div><div class='ctx'> 	.get_eeprom		= ice_get_eeprom,</div><div class='ctx'> 	.get_coalesce		= ice_get_coalesce,</div><div class='hunk'>@@ -4822,6 +4863,7 @@ static const struct ethtool_ops ice_ethtool_ops = {</div><div class='ctx'> 	.get_sset_count		= ice_get_sset_count,</div><div class='ctx'> 	.get_rxnfc		= ice_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= ice_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= ice_get_rx_ring_count,</div><div class='ctx'> 	.get_ringparam		= ice_get_ringparam,</div><div class='ctx'> 	.set_ringparam		= ice_set_ringparam,</div><div class='ctx'> 	.nway_reset		= ice_nway_reset,</div><div class='hunk'>@@ -4832,6 +4874,8 @@ static const struct ethtool_ops ice_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size	= ice_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= ice_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= ice_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= ice_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= ice_set_rxfh_fields,</div><div class='ctx'> 	.get_channels		= ice_get_channels,</div><div class='ctx'> 	.set_channels		= ice_set_channels,</div><div class='ctx'> 	.get_ts_info		= ice_get_ts_info,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.h b/drivers/net/ethernet/intel/ice/ice_ethtool.h<br/>index 9acccae38625..23b2cfbc9684 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ethtool.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ethtool.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ethtool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_ethtool.h</a></div><div class='hunk'>@@ -10,17 +10,33 @@ struct ice_phy_type_to_ethtool {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ice_serdes_equalization_to_ethtool {</div><div class='del'>-	int rx_equalization_pre2;</div><div class='del'>-	int rx_equalization_pre1;</div><div class='del'>-	int rx_equalization_post1;</div><div class='del'>-	int rx_equalization_bflf;</div><div class='del'>-	int rx_equalization_bfhf;</div><div class='del'>-	int rx_equalization_drate;</div><div class='del'>-	int tx_equalization_pre1;</div><div class='del'>-	int tx_equalization_pre3;</div><div class='del'>-	int tx_equalization_atten;</div><div class='del'>-	int tx_equalization_post1;</div><div class='del'>-	int tx_equalization_pre2;</div><div class='add'>+	int rx_equ_pre2;</div><div class='add'>+	int rx_equ_pre1;</div><div class='add'>+	int rx_equ_post1;</div><div class='add'>+	int rx_equ_bflf;</div><div class='add'>+	int rx_equ_bfhf;</div><div class='add'>+	int rx_equ_ctle_gainhf;</div><div class='add'>+	int rx_equ_ctle_gainlf;</div><div class='add'>+	int rx_equ_ctle_gaindc;</div><div class='add'>+	int rx_equ_ctle_bw;</div><div class='add'>+	int rx_equ_dfe_gain;</div><div class='add'>+	int rx_equ_dfe_gain_2;</div><div class='add'>+	int rx_equ_dfe_2;</div><div class='add'>+	int rx_equ_dfe_3;</div><div class='add'>+	int rx_equ_dfe_4;</div><div class='add'>+	int rx_equ_dfe_5;</div><div class='add'>+	int rx_equ_dfe_6;</div><div class='add'>+	int rx_equ_dfe_7;</div><div class='add'>+	int rx_equ_dfe_8;</div><div class='add'>+	int rx_equ_dfe_9;</div><div class='add'>+	int rx_equ_dfe_10;</div><div class='add'>+	int rx_equ_dfe_11;</div><div class='add'>+	int rx_equ_dfe_12;</div><div class='add'>+	int tx_equ_pre1;</div><div class='add'>+	int tx_equ_pre3;</div><div class='add'>+	int tx_equ_atten;</div><div class='add'>+	int tx_equ_post1;</div><div class='add'>+	int tx_equ_pre2;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ice_regdump_to_ethtool {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c b/drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c<br/>index 5412eff8ef23..aceec184e89b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c</a></div><div class='hunk'>@@ -1605,22 +1605,19 @@ void ice_fdir_replay_fltrs(struct ice_pf *pf)</div><div class='ctx'>  */</div><div class='ctx'> int ice_fdir_create_dflt_rules(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='add'>+	static const enum ice_fltr_ptype dflt_rules[] = {</div><div class='add'>+		ICE_FLTR_PTYPE_NONF_IPV4_TCP, ICE_FLTR_PTYPE_NONF_IPV4_UDP,</div><div class='add'>+		ICE_FLTR_PTYPE_NONF_IPV6_TCP, ICE_FLTR_PTYPE_NONF_IPV6_UDP,</div><div class='add'>+	};</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* Create perfect TCP and UDP rules in hardware. */</div><div class='del'>-	err = ice_create_init_fdir_rule(pf, ICE_FLTR_PTYPE_NONF_IPV4_TCP);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_create_init_fdir_rule(pf, ICE_FLTR_PTYPE_NONF_IPV4_UDP);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(dflt_rules); i++) {</div><div class='add'>+		err = ice_create_init_fdir_rule(pf, dflt_rules[i]);</div><div class='ctx'> </div><div class='del'>-	err = ice_create_init_fdir_rule(pf, ICE_FLTR_PTYPE_NONF_IPV6_TCP);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_create_init_fdir_rule(pf, ICE_FLTR_PTYPE_NONF_IPV6_UDP);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1830,11 +1827,12 @@ static int</div><div class='ctx'> ice_set_fdir_input_set(struct ice_vsi *vsi, struct ethtool_rx_flow_spec *fsp,</div><div class='ctx'> 		       struct ice_fdir_fltr *input)</div><div class='ctx'> {</div><div class='del'>-	u16 dest_vsi, q_index = 0;</div><div class='add'>+	s16 q_index = ICE_FDIR_NO_QUEUE_IDX;</div><div class='ctx'> 	u16 orig_q_index = 0;</div><div class='ctx'> 	struct ice_pf *pf;</div><div class='ctx'> 	struct ice_hw *hw;</div><div class='ctx'> 	int flow_type;</div><div class='add'>+	u16 dest_vsi;</div><div class='ctx'> 	u8 dest_ctl;</div><div class='ctx'> </div><div class='ctx'> 	if (!vsi || !fsp || !input)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_fdir.c b/drivers/net/ethernet/intel/ice/ice_fdir.c<br/>index 26b357c0ae15..b29fbdec9442 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_fdir.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_fdir.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_fdir.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_fdir.c</a></div><div class='hunk'>@@ -1121,7 +1121,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,</div><div class='ctx'>  * ice_fdir_has_frag - does flow type have 2 ptypes</div><div class='ctx'>  * @flow: flow ptype</div><div class='ctx'>  *</div><div class='del'>- * returns true is there is a fragment packet for this ptype</div><div class='add'>+ * Return: true if there is a fragment packet for this ptype</div><div class='ctx'>  */</div><div class='ctx'> bool ice_fdir_has_frag(enum ice_fltr_ptype flow)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_fdir.h b/drivers/net/ethernet/intel/ice/ice_fdir.h<br/>index ab5b118daa2d..820023c0271f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_fdir.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_fdir.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_fdir.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_fdir.h</a></div><div class='hunk'>@@ -53,6 +53,8 @@</div><div class='ctx'>  */</div><div class='ctx'> #define ICE_FDIR_IPV4_PKT_FLAG_MF		0x20</div><div class='ctx'> </div><div class='add'>+#define ICE_FDIR_NO_QUEUE_IDX			-1</div><div class='add'>+</div><div class='ctx'> enum ice_fltr_prgm_desc_dest {</div><div class='ctx'> 	ICE_FLTR_PRGM_DESC_DEST_DROP_PKT,</div><div class='ctx'> 	ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX,</div><div class='hunk'>@@ -186,7 +188,7 @@ struct ice_fdir_fltr {</div><div class='ctx'> 	u16 flex_fltr;</div><div class='ctx'> </div><div class='ctx'> 	/* filter control */</div><div class='del'>-	u16 q_index;</div><div class='add'>+	s16 q_index;</div><div class='ctx'> 	u16 orig_q_index;</div><div class='ctx'> 	u16 dest_vsi;</div><div class='ctx'> 	u8 dest_ctl;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_flex_pipe.c b/drivers/net/ethernet/intel/ice/ice_flex_pipe.c<br/>index ed95072ca6e3..c0dbec369366 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_flex_pipe.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_flex_pipe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_flex_pipe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_flex_pipe.c</a></div><div class='hunk'>@@ -574,9 +574,7 @@ ice_destroy_tunnel_end:</div><div class='ctx'> int ice_udp_tunnel_set_port(struct net_device *netdev, unsigned int table,</div><div class='ctx'> 			    unsigned int idx, struct udp_tunnel_info *ti)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='del'>-	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> 	enum ice_tunnel_type tnl_type;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	u16 index;</div><div class='hunk'>@@ -598,9 +596,7 @@ int ice_udp_tunnel_set_port(struct net_device *netdev, unsigned int table,</div><div class='ctx'> int ice_udp_tunnel_unset_port(struct net_device *netdev, unsigned int table,</div><div class='ctx'> 			      unsigned int idx, struct udp_tunnel_info *ti)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='del'>-	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> 	enum ice_tunnel_type tnl_type;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='hunk'>@@ -1479,7 +1475,7 @@ static void ice_init_prof_masks(struct ice_hw *hw, enum ice_block blk)</div><div class='ctx'> 	per_pf = ICE_PROF_MASK_COUNT / hw-&gt;dev_caps.num_funcs;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;blk[blk].masks.count = per_pf;</div><div class='del'>-	hw-&gt;blk[blk].masks.first = hw-&gt;pf_id * per_pf;</div><div class='add'>+	hw-&gt;blk[blk].masks.first = hw-&gt;logical_pf_id * per_pf;</div><div class='ctx'> </div><div class='ctx'> 	memset(hw-&gt;blk[blk].masks.masks, 0, sizeof(hw-&gt;blk[blk].masks.masks));</div><div class='ctx'> </div><div class='hunk'>@@ -3043,16 +3039,16 @@ ice_disable_fd_swap(struct ice_hw *hw, u8 prof_id)</div><div class='ctx'>  * the ID value used here.</div><div class='ctx'>  */</div><div class='ctx'> int</div><div class='del'>-ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],</div><div class='del'>-	     const struct ice_ptype_attributes *attr, u16 attr_cnt,</div><div class='del'>-	     struct ice_fv_word *es, u16 *masks, bool symm, bool fd_swap)</div><div class='add'>+ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,</div><div class='add'>+	     unsigned long *ptypes, const struct ice_ptype_attributes *attr,</div><div class='add'>+	     u16 attr_cnt, struct ice_fv_word *es, u16 *masks, bool symm,</div><div class='add'>+	     bool fd_swap)</div><div class='ctx'> {</div><div class='del'>-	u32 bytes = DIV_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE);</div><div class='ctx'> 	DECLARE_BITMAP(ptgs_used, ICE_XLT1_CNT);</div><div class='ctx'> 	struct ice_prof_map *prof;</div><div class='del'>-	u8 byte = 0;</div><div class='del'>-	u8 prof_id;</div><div class='ctx'> 	int status;</div><div class='add'>+	u8 prof_id;</div><div class='add'>+	u16 ptype;</div><div class='ctx'> </div><div class='ctx'> 	bitmap_zero(ptgs_used, ICE_XLT1_CNT);</div><div class='ctx'> </div><div class='hunk'>@@ -3102,57 +3098,35 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],</div><div class='ctx'> 	prof-&gt;context = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* build list of ptgs */</div><div class='del'>-	while (bytes &amp;&amp; prof-&gt;ptg_cnt &lt; ICE_MAX_PTG_PER_PROFILE) {</div><div class='del'>-		u8 bit;</div><div class='add'>+	for_each_set_bit(ptype, ptypes, ICE_FLOW_PTYPE_MAX) {</div><div class='add'>+		u8 ptg;</div><div class='ctx'> </div><div class='del'>-		if (!ptypes[byte]) {</div><div class='del'>-			bytes--;</div><div class='del'>-			byte++;</div><div class='add'>+		/* The package should place all ptypes in a non-zero</div><div class='add'>+		 * PTG, so the following call should never fail.</div><div class='add'>+		 */</div><div class='add'>+		if (ice_ptg_find_ptype(hw, blk, ptype, &amp;ptg))</div><div class='ctx'> 			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Examine 8 bits per byte */</div><div class='del'>-		for_each_set_bit(bit, (unsigned long *)&amp;ptypes[byte],</div><div class='del'>-				 BITS_PER_BYTE) {</div><div class='del'>-			u16 ptype;</div><div class='del'>-			u8 ptg;</div><div class='ctx'> </div><div class='del'>-			ptype = byte * BITS_PER_BYTE + bit;</div><div class='del'>-</div><div class='del'>-			/* The package should place all ptypes in a non-zero</div><div class='del'>-			 * PTG, so the following call should never fail.</div><div class='del'>-			 */</div><div class='del'>-			if (ice_ptg_find_ptype(hw, blk, ptype, &amp;ptg))</div><div class='del'>-				continue;</div><div class='add'>+		/* If PTG is already added, skip and continue */</div><div class='add'>+		if (test_bit(ptg, ptgs_used))</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-			/* If PTG is already added, skip and continue */</div><div class='del'>-			if (test_bit(ptg, ptgs_used))</div><div class='del'>-				continue;</div><div class='add'>+		set_bit(ptg, ptgs_used);</div><div class='add'>+		/* Check to see there are any attributes for this ptype, and</div><div class='add'>+		 * add them if found.</div><div class='add'>+		 */</div><div class='add'>+		status = ice_add_prof_attrib(prof, ptg, ptype, attr, attr_cnt);</div><div class='add'>+		if (status == -ENOSPC)</div><div class='add'>+			break;</div><div class='add'>+		if (status) {</div><div class='add'>+			/* This is simple a ptype/PTG with no attribute */</div><div class='add'>+			prof-&gt;ptg[prof-&gt;ptg_cnt] = ptg;</div><div class='add'>+			prof-&gt;attr[prof-&gt;ptg_cnt].flags = 0;</div><div class='add'>+			prof-&gt;attr[prof-&gt;ptg_cnt].mask = 0;</div><div class='ctx'> </div><div class='del'>-			__set_bit(ptg, ptgs_used);</div><div class='del'>-			/* Check to see there are any attributes for</div><div class='del'>-			 * this PTYPE, and add them if found.</div><div class='del'>-			 */</div><div class='del'>-			status = ice_add_prof_attrib(prof, ptg, ptype,</div><div class='del'>-						     attr, attr_cnt);</div><div class='del'>-			if (status == -ENOSPC)</div><div class='add'>+			if (++prof-&gt;ptg_cnt &gt;= ICE_MAX_PTG_PER_PROFILE)</div><div class='ctx'> 				break;</div><div class='del'>-			if (status) {</div><div class='del'>-				/* This is simple a PTYPE/PTG with no</div><div class='del'>-				 * attribute</div><div class='del'>-				 */</div><div class='del'>-				prof-&gt;ptg[prof-&gt;ptg_cnt] = ptg;</div><div class='del'>-				prof-&gt;attr[prof-&gt;ptg_cnt].flags = 0;</div><div class='del'>-				prof-&gt;attr[prof-&gt;ptg_cnt].mask = 0;</div><div class='del'>-</div><div class='del'>-				if (++prof-&gt;ptg_cnt &gt;=</div><div class='del'>-				    ICE_MAX_PTG_PER_PROFILE)</div><div class='del'>-					break;</div><div class='del'>-			}</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		bytes--;</div><div class='del'>-		byte++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	list_add(&amp;prof-&gt;list, &amp;hw-&gt;blk[blk].es.prof_map);</div><div class='hunk'>@@ -3604,6 +3578,19 @@ ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_set_tcam_flags - set TCAM flag don't care mask</div><div class='add'>+ * @mask: mask for flags</div><div class='add'>+ * @dc_mask: pointer to the don't care mask</div><div class='add'>+ */</div><div class='add'>+static void ice_set_tcam_flags(u16 mask, u8 dc_mask[ICE_TCAM_KEY_VAL_SZ])</div><div class='add'>+{</div><div class='add'>+	u16 inverted_mask = ~mask;</div><div class='add'>+</div><div class='add'>+	/* flags are lowest u16 */</div><div class='add'>+	put_unaligned_le16(inverted_mask, dc_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_rem_chg_tcam_ent - remove a specific TCAM entry from change list</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='ctx'>  * @idx: the index of the TCAM entry to remove</div><div class='hunk'>@@ -3673,6 +3660,9 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,</div><div class='ctx'> 	if (!p)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	/* set don't care masks for TCAM flags */</div><div class='add'>+	ice_set_tcam_flags(tcam-&gt;attr.mask, dc_msk);</div><div class='add'>+</div><div class='ctx'> 	status = ice_tcam_write_entry(hw, blk, tcam-&gt;tcam_idx, tcam-&gt;prof_id,</div><div class='ctx'> 				      tcam-&gt;ptg, vsig, 0, tcam-&gt;attr.flags,</div><div class='ctx'> 				      vl_msk, dc_msk, nm_msk);</div><div class='hunk'>@@ -3699,6 +3689,34 @@ err_ice_prof_tcam_ena_dis:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_ptg_attr_in_use - determine if PTG and attribute pair is in use</div><div class='add'>+ * @ptg_attr: pointer to the PTG and attribute pair to check</div><div class='add'>+ * @ptgs_used: bitmap that denotes which PTGs are in use</div><div class='add'>+ * @attr_used: array of PTG and attributes pairs already used</div><div class='add'>+ * @attr_cnt: count of entries in the attr_used array</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the PTG and attribute pair is in use, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool</div><div class='add'>+ice_ptg_attr_in_use(struct ice_tcam_inf *ptg_attr, unsigned long *ptgs_used,</div><div class='add'>+		    struct ice_tcam_inf *attr_used[], u16 attr_cnt)</div><div class='add'>+{</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ptg_attr-&gt;ptg, ptgs_used))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* the PTG is used, so now look for correct attributes */</div><div class='add'>+	for (i = 0; i &lt; attr_cnt; i++)</div><div class='add'>+		if (attr_used[i]-&gt;ptg == ptg_attr-&gt;ptg &amp;&amp;</div><div class='add'>+		    attr_used[i]-&gt;attr.flags == ptg_attr-&gt;attr.flags &amp;&amp;</div><div class='add'>+		    attr_used[i]-&gt;attr.mask == ptg_attr-&gt;attr.mask)</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_adj_prof_priorities - adjust profile based on priorities</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='ctx'>  * @blk: hardware block</div><div class='hunk'>@@ -3710,10 +3728,16 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,</div><div class='ctx'> 			struct list_head *chg)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_BITMAP(ptgs_used, ICE_XLT1_CNT);</div><div class='add'>+	struct ice_tcam_inf **attr_used;</div><div class='ctx'> 	struct ice_vsig_prof *t;</div><div class='del'>-	int status;</div><div class='add'>+	u16 attr_used_cnt = 0;</div><div class='add'>+	int status = 0;</div><div class='ctx'> 	u16 idx;</div><div class='ctx'> </div><div class='add'>+	attr_used = kcalloc(ICE_MAX_PTG_ATTRS, sizeof(*attr_used), GFP_KERNEL);</div><div class='add'>+	if (!attr_used)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	bitmap_zero(ptgs_used, ICE_XLT1_CNT);</div><div class='ctx'> 	idx = vsig &amp; ICE_VSIG_IDX_M;</div><div class='ctx'> </div><div class='hunk'>@@ -3731,11 +3755,15 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,</div><div class='ctx'> 		u16 i;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; t-&gt;tcam_count; i++) {</div><div class='add'>+			bool used;</div><div class='add'>+</div><div class='ctx'> 			/* Scan the priorities from newest to oldest.</div><div class='ctx'> 			 * Make sure that the newest profiles take priority.</div><div class='ctx'> 			 */</div><div class='del'>-			if (test_bit(t-&gt;tcam[i].ptg, ptgs_used) &amp;&amp;</div><div class='del'>-			    t-&gt;tcam[i].in_use) {</div><div class='add'>+			used = ice_ptg_attr_in_use(&amp;t-&gt;tcam[i], ptgs_used,</div><div class='add'>+						   attr_used, attr_used_cnt);</div><div class='add'>+</div><div class='add'>+			if (used &amp;&amp; t-&gt;tcam[i].in_use) {</div><div class='ctx'> 				/* need to mark this PTG as never match, as it</div><div class='ctx'> 				 * was already in use and therefore duplicate</div><div class='ctx'> 				 * (and lower priority)</div><div class='hunk'>@@ -3745,9 +3773,8 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,</div><div class='ctx'> 							       &amp;t-&gt;tcam[i],</div><div class='ctx'> 							       chg);</div><div class='ctx'> 				if (status)</div><div class='del'>-					return status;</div><div class='del'>-			} else if (!test_bit(t-&gt;tcam[i].ptg, ptgs_used) &amp;&amp;</div><div class='del'>-				   !t-&gt;tcam[i].in_use) {</div><div class='add'>+					goto free_attr_used;</div><div class='add'>+			} else if (!used &amp;&amp; !t-&gt;tcam[i].in_use) {</div><div class='ctx'> 				/* need to enable this PTG, as it in not in use</div><div class='ctx'> 				 * and not enabled (highest priority)</div><div class='ctx'> 				 */</div><div class='hunk'>@@ -3756,15 +3783,21 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,</div><div class='ctx'> 							       &amp;t-&gt;tcam[i],</div><div class='ctx'> 							       chg);</div><div class='ctx'> 				if (status)</div><div class='del'>-					return status;</div><div class='add'>+					goto free_attr_used;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* keep track of used ptgs */</div><div class='del'>-			__set_bit(t-&gt;tcam[i].ptg, ptgs_used);</div><div class='add'>+			set_bit(t-&gt;tcam[i].ptg, ptgs_used);</div><div class='add'>+			if (attr_used_cnt &lt; ICE_MAX_PTG_ATTRS)</div><div class='add'>+				attr_used[attr_used_cnt++] = &amp;t-&gt;tcam[i];</div><div class='add'>+			else</div><div class='add'>+				ice_debug(hw, ICE_DBG_INIT, "Warn: ICE_MAX_PTG_ATTRS exceeded\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+free_attr_used:</div><div class='add'>+	kfree(attr_used);</div><div class='add'>+	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3847,11 +3880,15 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,</div><div class='ctx'> 		p-&gt;vsig = vsig;</div><div class='ctx'> 		p-&gt;tcam_idx = t-&gt;tcam[i].tcam_idx;</div><div class='ctx'> </div><div class='add'>+		/* set don't care masks for TCAM flags */</div><div class='add'>+		ice_set_tcam_flags(t-&gt;tcam[i].attr.mask, dc_msk);</div><div class='add'>+</div><div class='ctx'> 		/* write the TCAM entry */</div><div class='ctx'> 		status = ice_tcam_write_entry(hw, blk, t-&gt;tcam[i].tcam_idx,</div><div class='ctx'> 					      t-&gt;tcam[i].prof_id,</div><div class='del'>-					      t-&gt;tcam[i].ptg, vsig, 0, 0,</div><div class='del'>-					      vl_msk, dc_msk, nm_msk);</div><div class='add'>+					      t-&gt;tcam[i].ptg, vsig, 0,</div><div class='add'>+					      t-&gt;tcam[i].attr.flags, vl_msk,</div><div class='add'>+					      dc_msk, nm_msk);</div><div class='ctx'> 		if (status) {</div><div class='ctx'> 			devm_kfree(ice_hw_to_dev(hw), p);</div><div class='ctx'> 			goto err_ice_add_prof_id_vsig;</div><div class='hunk'>@@ -4165,9 +4202,6 @@ ice_flow_assoc_fdir_prof(struct ice_hw *hw, enum ice_block blk,</div><div class='ctx'> 	u16 vsi_num;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	if (blk != ICE_BLK_FD)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	vsi_num = ice_get_hw_vsi_num(hw, dest_vsi);</div><div class='ctx'> 	status = ice_add_prof_id_flow(hw, blk, vsi_num, hdl);</div><div class='ctx'> 	if (status) {</div><div class='hunk'>@@ -4176,6 +4210,9 @@ ice_flow_assoc_fdir_prof(struct ice_hw *hw, enum ice_block blk,</div><div class='ctx'> 		return status;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (blk != ICE_BLK_FD)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	vsi_num = ice_get_hw_vsi_num(hw, fdir_vsi);</div><div class='ctx'> 	status = ice_add_prof_id_flow(hw, blk, vsi_num, hdl);</div><div class='ctx'> 	if (status) {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_flex_pipe.h b/drivers/net/ethernet/intel/ice/ice_flex_pipe.h<br/>index 28b0897adf32..ee5d9f9c9d53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_flex_pipe.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_flex_pipe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_flex_pipe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_flex_pipe.h</a></div><div class='hunk'>@@ -39,9 +39,10 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);</div><div class='ctx'> </div><div class='ctx'> /* XLT2/VSI group functions */</div><div class='ctx'> int</div><div class='del'>-ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],</div><div class='del'>-	     const struct ice_ptype_attributes *attr, u16 attr_cnt,</div><div class='del'>-	     struct ice_fv_word *es, u16 *masks, bool symm, bool fd_swap);</div><div class='add'>+ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,</div><div class='add'>+	     unsigned long *ptypes, const struct ice_ptype_attributes *attr,</div><div class='add'>+	     u16 attr_cnt, struct ice_fv_word *es, u16 *masks, bool symm,</div><div class='add'>+	     bool fd_swap);</div><div class='ctx'> struct ice_prof_map *</div><div class='ctx'> ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id);</div><div class='ctx'> int</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_flex_type.h b/drivers/net/ethernet/intel/ice/ice_flex_type.h<br/>index 817beca591e0..80c9e7c749c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_flex_type.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_flex_type.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_flex_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_flex_type.h</a></div><div class='hunk'>@@ -187,6 +187,7 @@ struct ice_prof_map {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define ICE_INVALID_TCAM	0xFFFF</div><div class='add'>+#define ICE_MAX_PTG_ATTRS	1024</div><div class='ctx'> </div><div class='ctx'> struct ice_tcam_inf {</div><div class='ctx'> 	u16 tcam_idx;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_flow.c b/drivers/net/ethernet/intel/ice/ice_flow.c<br/>index d97b751052f2..c9b6d0a84bd1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_flow.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_flow.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_flow.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_flow.c</a></div><div class='hunk'>@@ -5,6 +5,38 @@</div><div class='ctx'> #include "ice_flow.h"</div><div class='ctx'> #include &lt;net/gre.h&gt;</div><div class='ctx'> </div><div class='add'>+/* Size of known protocol header fields */</div><div class='add'>+#define ICE_FLOW_FLD_SZ_ETH_TYPE	2</div><div class='add'>+#define ICE_FLOW_FLD_SZ_VLAN		2</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IPV4_ADDR	4</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IPV6_ADDR	16</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IPV6_PRE32_ADDR	4</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IPV6_PRE48_ADDR	6</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IPV6_PRE64_ADDR	8</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IPV4_ID		2</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IPV6_ID		4</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IP_CHKSUM	2</div><div class='add'>+#define ICE_FLOW_FLD_SZ_TCP_CHKSUM	2</div><div class='add'>+#define ICE_FLOW_FLD_SZ_UDP_CHKSUM	2</div><div class='add'>+#define ICE_FLOW_FLD_SZ_SCTP_CHKSUM	4</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IP_DSCP		1</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IP_TTL		1</div><div class='add'>+#define ICE_FLOW_FLD_SZ_IP_PROT		1</div><div class='add'>+#define ICE_FLOW_FLD_SZ_PORT		2</div><div class='add'>+#define ICE_FLOW_FLD_SZ_TCP_FLAGS	1</div><div class='add'>+#define ICE_FLOW_FLD_SZ_ICMP_TYPE	1</div><div class='add'>+#define ICE_FLOW_FLD_SZ_ICMP_CODE	1</div><div class='add'>+#define ICE_FLOW_FLD_SZ_ARP_OPER	2</div><div class='add'>+#define ICE_FLOW_FLD_SZ_GRE_KEYID	4</div><div class='add'>+#define ICE_FLOW_FLD_SZ_GTP_TEID	4</div><div class='add'>+#define ICE_FLOW_FLD_SZ_GTP_QFI		2</div><div class='add'>+#define ICE_FLOW_FLD_SZ_PFCP_SEID 8</div><div class='add'>+#define ICE_FLOW_FLD_SZ_ESP_SPI	4</div><div class='add'>+#define ICE_FLOW_FLD_SZ_AH_SPI	4</div><div class='add'>+#define ICE_FLOW_FLD_SZ_NAT_T_ESP_SPI	4</div><div class='add'>+#define ICE_FLOW_FLD_SZ_L2TPV2_SESS_ID	2</div><div class='add'>+#define ICE_FLOW_FLD_SZ_L2TPV2_LEN_SESS_ID	2</div><div class='add'>+</div><div class='ctx'> /* Describe properties of a protocol header field */</div><div class='ctx'> struct ice_flow_field_info {</div><div class='ctx'> 	enum ice_flow_seg_hdr hdr;</div><div class='hunk'>@@ -20,6 +52,7 @@ struct ice_flow_field_info {</div><div class='ctx'> 	.mask = 0, \</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* QFI: 6-bit field in GTP-U PDU Session Container (3GPP TS 38.415) */</div><div class='ctx'> #define ICE_FLOW_FLD_INFO_MSK(_hdr, _offset_bytes, _size_bytes, _mask) { \</div><div class='ctx'> 	.hdr = _hdr, \</div><div class='ctx'> 	.off = (_offset_bytes) * BITS_PER_BYTE, \</div><div class='hunk'>@@ -61,7 +94,33 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {</div><div class='ctx'> 	/* ICE_FLOW_FIELD_IDX_IPV6_SA */</div><div class='ctx'> 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8, sizeof(struct in6_addr)),</div><div class='ctx'> 	/* ICE_FLOW_FIELD_IDX_IPV6_DA */</div><div class='del'>-	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24, sizeof(struct in6_addr)),</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24, ICE_FLOW_FLD_SZ_IPV6_ADDR),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_IPV4_CHKSUM */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 10, ICE_FLOW_FLD_SZ_IP_CHKSUM),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_IPV4_FRAG */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV_FRAG, 4,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_IPV4_ID),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_IPV6_FRAG */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV_FRAG, 4,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_IPV6_ID),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_IPV6_PRE32_ADDR),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_IPV6_PRE32_ADDR),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_IPV6_PRE48_ADDR),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_IPV6_PRE48_ADDR),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_IPV6_PRE64_ADDR),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_IPV6_PRE64_ADDR),</div><div class='ctx'> 	/* Transport */</div><div class='ctx'> 	/* ICE_FLOW_FIELD_IDX_TCP_SRC_PORT */</div><div class='ctx'> 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_TCP, 0, sizeof(__be16)),</div><div class='hunk'>@@ -76,7 +135,14 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {</div><div class='ctx'> 	/* ICE_FLOW_FIELD_IDX_SCTP_DST_PORT */</div><div class='ctx'> 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_SCTP, 2, sizeof(__be16)),</div><div class='ctx'> 	/* ICE_FLOW_FIELD_IDX_TCP_FLAGS */</div><div class='del'>-	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_TCP, 13, 1),</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_TCP, 13, ICE_FLOW_FLD_SZ_TCP_FLAGS),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_TCP_CHKSUM */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_TCP, 16, ICE_FLOW_FLD_SZ_TCP_CHKSUM),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_UDP_CHKSUM */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_UDP, 6, ICE_FLOW_FLD_SZ_UDP_CHKSUM),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_SCTP_CHKSUM */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_SCTP, 8,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_SCTP_CHKSUM),</div><div class='ctx'> 	/* ARP */</div><div class='ctx'> 	/* ICE_FLOW_FIELD_IDX_ARP_SIP */</div><div class='ctx'> 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ARP, 14, sizeof(struct in_addr)),</div><div class='hunk'>@@ -108,9 +174,17 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {</div><div class='ctx'> 	ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_GTPU_EH, 22, sizeof(__be16),</div><div class='ctx'> 			      0x3f00),</div><div class='ctx'> 	/* ICE_FLOW_FIELD_IDX_GTPU_UP_TEID */</div><div class='del'>-	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_UP, 12, sizeof(__be32)),</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_UP, 12,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_GTP_TEID),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_GTPU_UP_QFI */</div><div class='add'>+	ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_GTPU_UP, 22,</div><div class='add'>+			      ICE_FLOW_FLD_SZ_GTP_QFI, 0x3f00),</div><div class='ctx'> 	/* ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID */</div><div class='del'>-	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_DWN, 12, sizeof(__be32)),</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_DWN, 12,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_GTP_TEID),</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_GTPU_DWN_QFI */</div><div class='add'>+	ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_GTPU_DWN, 22,</div><div class='add'>+			      ICE_FLOW_FLD_SZ_GTP_QFI, 0x3f00),</div><div class='ctx'> 	/* PPPoE */</div><div class='ctx'> 	/* ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID */</div><div class='ctx'> 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_PPPOE, 2, sizeof(__be16)),</div><div class='hunk'>@@ -128,7 +202,16 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {</div><div class='ctx'> 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_AH, 4, sizeof(__be32)),</div><div class='ctx'> 	/* NAT_T_ESP */</div><div class='ctx'> 	/* ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI */</div><div class='del'>-	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_NAT_T_ESP, 8, sizeof(__be32)),</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_NAT_T_ESP, 8,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_NAT_T_ESP_SPI),</div><div class='add'>+	/* L2TPV2 */</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_L2TPV2_SESS_ID */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_L2TPV2, 12,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_L2TPV2_SESS_ID),</div><div class='add'>+	/* L2TPV2_LEN */</div><div class='add'>+	/* ICE_FLOW_FIELD_IDX_L2TPV2_LEN_SESS_ID */</div><div class='add'>+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_L2TPV2, 14,</div><div class='add'>+			  ICE_FLOW_FLD_SZ_L2TPV2_LEN_SESS_ID),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Bitmaps indicating relevant packet types for a particular protocol header</div><div class='hunk'>@@ -137,9 +220,9 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {</div><div class='ctx'>  */</div><div class='ctx'> static const u32 ice_ptypes_mac_ofos[] = {</div><div class='ctx'> 	0xFDC00846, 0xBFBF7F7E, 0xF70001DF, 0xFEFDFDFB,</div><div class='del'>-	0x0000077E, 0x00000000, 0x00000000, 0x00000000,</div><div class='del'>-	0x00400000, 0x03FFF000, 0x7FFFFFE0, 0x00000000,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x0000077E, 0x000003FF, 0x00000000, 0x00000000,</div><div class='add'>+	0x00400000, 0x03FFF000, 0xFFFFFFE0, 0x00000707,</div><div class='add'>+	0xFFFFF000, 0x000003FF, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -162,10 +245,10 @@ static const u32 ice_ptypes_macvlan_il[] = {</div><div class='ctx'>  * include IPv4 other PTYPEs</div><div class='ctx'>  */</div><div class='ctx'> static const u32 ice_ptypes_ipv4_ofos[] = {</div><div class='del'>-	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,</div><div class='add'>+	0x1D800000, 0xBFBF7800, 0x000001DF, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000155, 0x00000000, 0x00000000,</div><div class='del'>-	0x00000000, 0x000FC000, 0x00000000, 0x00000000,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x00000000, 0x000FC000, 0x000002A0, 0x00000000,</div><div class='add'>+	0x00015000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -176,10 +259,10 @@ static const u32 ice_ptypes_ipv4_ofos[] = {</div><div class='ctx'>  * IPv4 other PTYPEs</div><div class='ctx'>  */</div><div class='ctx'> static const u32 ice_ptypes_ipv4_ofos_all[] = {</div><div class='del'>-	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,</div><div class='add'>+	0x1D800000, 0x27BF7800, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000155, 0x00000000, 0x00000000,</div><div class='del'>-	0x00000000, 0x000FC000, 0x83E0F800, 0x00000101,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x00000000, 0x000FC000, 0x83E0FAA0, 0x00000101,</div><div class='add'>+	0x3FFD5000, 0x00000000, 0x02FBEFBC, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -191,7 +274,7 @@ static const u32 ice_ptypes_ipv4_il[] = {</div><div class='ctx'> 	0xE0000000, 0xB807700E, 0x80000003, 0xE01DC03B,</div><div class='ctx'> 	0x0000000E, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x001FF800, 0x00000000,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0xC0FC0000, 0x0000000F, 0xBC0BC0BC, 0x00000BC0,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -202,10 +285,10 @@ static const u32 ice_ptypes_ipv4_il[] = {</div><div class='ctx'>  * include IPv6 other PTYPEs</div><div class='ctx'>  */</div><div class='ctx'> static const u32 ice_ptypes_ipv6_ofos[] = {</div><div class='del'>-	0x00000000, 0x00000000, 0x77000000, 0x10002000,</div><div class='add'>+	0x00000000, 0x00000000, 0x76000000, 0x10002000,</div><div class='ctx'> 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,</div><div class='del'>-	0x00000000, 0x03F00000, 0x00000000, 0x00000000,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x00000000, 0x03F00000, 0x00000540, 0x00000000,</div><div class='add'>+	0x0002A000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -216,10 +299,10 @@ static const u32 ice_ptypes_ipv6_ofos[] = {</div><div class='ctx'>  * IPv6 other PTYPEs</div><div class='ctx'>  */</div><div class='ctx'> static const u32 ice_ptypes_ipv6_ofos_all[] = {</div><div class='del'>-	0x00000000, 0x00000000, 0x77000000, 0x10002000,</div><div class='del'>-	0x00000000, 0x000002AA, 0x00000000, 0x00000000,</div><div class='del'>-	0x00080F00, 0x03F00000, 0x7C1F0000, 0x00000206,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x00000000, 0x00000000, 0x76000000, 0xFEFDE000,</div><div class='add'>+	0x0000077E, 0x000002AA, 0x00000000, 0x00000000,</div><div class='add'>+	0x00000000, 0x03F00000, 0x7C1F0540, 0x00000206,</div><div class='add'>+	0xC002A000, 0x000003FF, 0xBC000000, 0x0002FBEF,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -231,7 +314,7 @@ static const u32 ice_ptypes_ipv6_il[] = {</div><div class='ctx'> 	0x00000000, 0x03B80770, 0x000001DC, 0x0EE00000,</div><div class='ctx'> 	0x00000770, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x7FE00000, 0x00000000,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x3F000000, 0x000003F0, 0x02F02F00, 0x0002F02F,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -304,8 +387,8 @@ static const u32 ice_ptypes_ipv6_il_no_l4[] = {</div><div class='ctx'> static const u32 ice_ptypes_udp_il[] = {</div><div class='ctx'> 	0x81000000, 0x20204040, 0x04000010, 0x80810102,</div><div class='ctx'> 	0x00000040, 0x00000000, 0x00000000, 0x00000000,</div><div class='del'>-	0x00000000, 0x00410000, 0x90842000, 0x00000007,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x00000000, 0x00410000, 0x908427E0, 0x00000007,</div><div class='add'>+	0x0413F000, 0x00000041, 0x10410410, 0x00004104,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -317,7 +400,7 @@ static const u32 ice_ptypes_tcp_il[] = {</div><div class='ctx'> 	0x04000000, 0x80810102, 0x10000040, 0x02040408,</div><div class='ctx'> 	0x00000102, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00820000, 0x21084000, 0x00000000,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x08200000, 0x00000082, 0x20820820, 0x00008208,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -329,7 +412,7 @@ static const u32 ice_ptypes_sctp_il[] = {</div><div class='ctx'> 	0x08000000, 0x01020204, 0x20000081, 0x04080810,</div><div class='ctx'> 	0x00000204, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x01040000, 0x00000000, 0x00000000,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x10400000, 0x00000104, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -353,7 +436,7 @@ static const u32 ice_ptypes_icmp_il[] = {</div><div class='ctx'> 	0x00000000, 0x02040408, 0x40000102, 0x08101020,</div><div class='ctx'> 	0x00000408, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x42108000, 0x00000000,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x20800000, 0x00000208, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -365,7 +448,7 @@ static const u32 ice_ptypes_gre_of[] = {</div><div class='ctx'> 	0x00000000, 0xBFBF7800, 0x000001DF, 0xFEFDE000,</div><div class='ctx'> 	0x0000017E, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x00000000, 0x00000000, 0xBEFBEFBC, 0x0002FBEF,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -374,7 +457,7 @@ static const u32 ice_ptypes_gre_of[] = {</div><div class='ctx'> </div><div class='ctx'> /* Packet types for packets with an Innermost/Last MAC header */</div><div class='ctx'> static const u32 ice_ptypes_mac_il[] = {</div><div class='del'>-	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='add'>+	0x00000000, 0x20000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -388,7 +471,7 @@ static const u32 ice_ptypes_mac_il[] = {</div><div class='ctx'> static const u32 ice_ptypes_gtpc[] = {</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='del'>-	0x00000000, 0x00000000, 0x00000180, 0x00000000,</div><div class='add'>+	0x00000000, 0x00000000, 0x000001E0, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='ctx'> 	0x00000000, 0x00000000, 0x00000000, 0x00000000,</div><div class='hunk'>@@ -1421,7 +1504,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Add a HW profile for this flow profile */</div><div class='del'>-	status = ice_add_prof(hw, blk, prof_id, (u8 *)params-&gt;ptypes,</div><div class='add'>+	status = ice_add_prof(hw, blk, prof_id, params-&gt;ptypes,</div><div class='ctx'> 			      params-&gt;attr, params-&gt;attr_cnt, params-&gt;es,</div><div class='ctx'> 			      params-&gt;mask, symm, true);</div><div class='ctx'> 	if (status) {</div><div class='hunk'>@@ -1617,7 +1700,7 @@ ice_flow_set_parser_prof(struct ice_hw *hw, u16 dest_vsi, u16 fdir_vsi,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	status = ice_add_prof(hw, blk, id, (u8 *)prof-&gt;ptypes,</div><div class='add'>+	status = ice_add_prof(hw, blk, id, prof-&gt;ptypes,</div><div class='ctx'> 			      params-&gt;attr, params-&gt;attr_cnt,</div><div class='ctx'> 			      params-&gt;es, params-&gt;mask, false, false);</div><div class='ctx'> 	if (status)</div><div class='hunk'>@@ -2325,6 +2408,130 @@ static void ice_rss_set_symm(struct ice_hw *hw, struct ice_flow_prof *prof)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_rss_cfg_raw_symm - Configure symmetric RSS for a raw parser profile</div><div class='add'>+ * @hw:      device HW</div><div class='add'>+ * @prof:    parser profile describing extracted FV (field vector) entries</div><div class='add'>+ * @prof_id: RSS profile identifier used to program symmetry registers</div><div class='add'>+ *</div><div class='add'>+ * The routine scans the parser profile's FV entries and looks for</div><div class='add'>+ * direction-sensitive pairs (L3 src/dst, L4 src/dst). When a pair is found,</div><div class='add'>+ * it programs XOR-based symmetry so that flows hash identically regardless</div><div class='add'>+ * of packet direction. This preserves CPU affinity for the same 5-tuple.</div><div class='add'>+ *</div><div class='add'>+ * Notes:</div><div class='add'>+ * - The size of each logical field (IPv4/IPv6 address, L4 port) is expressed</div><div class='add'>+ *   in units of ICE_FLOW_FV_EXTRACT_SZ so we can step across fv[] correctly.</div><div class='add'>+ * - We guard against out-of-bounds access before looking at fv[i + len].</div><div class='add'>+ */</div><div class='add'>+static void ice_rss_cfg_raw_symm(struct ice_hw *hw,</div><div class='add'>+				 const struct ice_parser_profile *prof,</div><div class='add'>+				 u64 prof_id)</div><div class='add'>+{</div><div class='add'>+	for (size_t i = 0; i &lt; prof-&gt;fv_num; i++) {</div><div class='add'>+		u8 proto_id = prof-&gt;fv[i].proto_id;</div><div class='add'>+		u16 src_off = 0, dst_off = 0;</div><div class='add'>+		size_t src_idx, dst_idx;</div><div class='add'>+		bool is_matched = false;</div><div class='add'>+		unsigned int len = 0;</div><div class='add'>+</div><div class='add'>+		switch (proto_id) {</div><div class='add'>+		/* IPv4 address pairs (outer/inner variants) */</div><div class='add'>+		case ICE_PROT_IPV4_OF_OR_S:</div><div class='add'>+		case ICE_PROT_IPV4_IL:</div><div class='add'>+		case ICE_PROT_IPV4_IL_IL:</div><div class='add'>+			len = ICE_FLOW_FLD_SZ_IPV4_ADDR /</div><div class='add'>+			      ICE_FLOW_FV_EXTRACT_SZ;</div><div class='add'>+			src_off = ICE_FLOW_FIELD_IPV4_SRC_OFFSET;</div><div class='add'>+			dst_off = ICE_FLOW_FIELD_IPV4_DST_OFFSET;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* IPv6 address pairs (outer/inner variants) */</div><div class='add'>+		case ICE_PROT_IPV6_OF_OR_S:</div><div class='add'>+		case ICE_PROT_IPV6_IL:</div><div class='add'>+		case ICE_PROT_IPV6_IL_IL:</div><div class='add'>+			len = ICE_FLOW_FLD_SZ_IPV6_ADDR /</div><div class='add'>+			      ICE_FLOW_FV_EXTRACT_SZ;</div><div class='add'>+			src_off = ICE_FLOW_FIELD_IPV6_SRC_OFFSET;</div><div class='add'>+			dst_off = ICE_FLOW_FIELD_IPV6_DST_OFFSET;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* L4 port pairs (TCP/UDP/SCTP) */</div><div class='add'>+		case ICE_PROT_TCP_IL:</div><div class='add'>+		case ICE_PROT_UDP_IL_OR_S:</div><div class='add'>+		case ICE_PROT_SCTP_IL:</div><div class='add'>+			len = ICE_FLOW_FLD_SZ_PORT / ICE_FLOW_FV_EXTRACT_SZ;</div><div class='add'>+			src_off = ICE_FLOW_FIELD_SRC_PORT_OFFSET;</div><div class='add'>+			dst_off = ICE_FLOW_FIELD_DST_PORT_OFFSET;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Bounds check before accessing fv[i + len]. */</div><div class='add'>+		if (i + len &gt;= prof-&gt;fv_num)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Verify src/dst pairing for this protocol id. */</div><div class='add'>+		is_matched = prof-&gt;fv[i].offset == src_off &amp;&amp;</div><div class='add'>+			     prof-&gt;fv[i + len].proto_id == proto_id &amp;&amp;</div><div class='add'>+			     prof-&gt;fv[i + len].offset == dst_off;</div><div class='add'>+		if (!is_matched)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Program XOR symmetry for this field pair. */</div><div class='add'>+		src_idx = i;</div><div class='add'>+		dst_idx = i + len;</div><div class='add'>+</div><div class='add'>+		ice_rss_config_xor(hw, prof_id, src_idx, dst_idx, len);</div><div class='add'>+</div><div class='add'>+		/* Skip over the pair we just handled; the loop's ++i advances</div><div class='add'>+		 * one more element, hence the --i after the jump.</div><div class='add'>+		 */</div><div class='add'>+		i += (2 * len);</div><div class='add'>+		/* not strictly needed; keeps static analyzers happy */</div><div class='add'>+		if (i == 0)</div><div class='add'>+			break;</div><div class='add'>+		--i;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Max registers index per packet profile */</div><div class='add'>+#define ICE_SYMM_REG_INDEX_MAX 6</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_rss_update_raw_symm - update symmetric hash configuration</div><div class='add'>+ * for raw pattern</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @cfg: configure parameters for raw pattern</div><div class='add'>+ * @id: profile tracking ID</div><div class='add'>+ *</div><div class='add'>+ * Update symmetric hash configuration for raw pattern if required.</div><div class='add'>+ * Otherwise only clear to default.</div><div class='add'>+ */</div><div class='add'>+void</div><div class='add'>+ice_rss_update_raw_symm(struct ice_hw *hw,</div><div class='add'>+			struct ice_rss_raw_cfg *cfg, u64 id)</div><div class='add'>+{</div><div class='add'>+	struct ice_prof_map *map;</div><div class='add'>+	u8 prof_id, m;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hw-&gt;blk[ICE_BLK_RSS].es.prof_map_lock);</div><div class='add'>+	map = ice_search_prof_id(hw, ICE_BLK_RSS, id);</div><div class='add'>+	if (map)</div><div class='add'>+		prof_id = map-&gt;prof_id;</div><div class='add'>+	mutex_unlock(&amp;hw-&gt;blk[ICE_BLK_RSS].es.prof_map_lock);</div><div class='add'>+	if (!map)</div><div class='add'>+		return;</div><div class='add'>+	/* clear to default */</div><div class='add'>+	for (m = 0; m &lt; ICE_SYMM_REG_INDEX_MAX; m++)</div><div class='add'>+		wr32(hw, GLQF_HSYMM(prof_id, m), 0);</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;symm)</div><div class='add'>+		ice_rss_cfg_raw_symm(hw, &amp;cfg-&gt;prof, prof_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_add_rss_cfg_sync - add an RSS configuration</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='ctx'>  * @vsi_handle: software VSI handle</div><div class='hunk'>@@ -2573,38 +2780,38 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,</div><div class='ctx'>  * convert its values to their appropriate flow L3, L4 values.</div><div class='ctx'>  */</div><div class='ctx'> #define ICE_FLOW_AVF_RSS_IPV4_MASKS \</div><div class='del'>-	(BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \</div><div class='del'>-	 BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4))</div><div class='add'>+	(BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER) | \</div><div class='add'>+	 BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV4))</div><div class='ctx'> #define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \</div><div class='del'>-	(BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \</div><div class='del'>-	 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP))</div><div class='add'>+	(BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \</div><div class='add'>+	 BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP))</div><div class='ctx'> #define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \</div><div class='del'>-	(BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \</div><div class='del'>-	 BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \</div><div class='del'>-	 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP))</div><div class='add'>+	(BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \</div><div class='add'>+	 BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \</div><div class='add'>+	 BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP))</div><div class='ctx'> #define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \</div><div class='ctx'> 	(ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \</div><div class='del'>-	 ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP))</div><div class='add'>+	 ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP))</div><div class='ctx'> </div><div class='ctx'> #define ICE_FLOW_AVF_RSS_IPV6_MASKS \</div><div class='del'>-	(BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \</div><div class='del'>-	 BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6))</div><div class='add'>+	(BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER) | \</div><div class='add'>+	 BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV6))</div><div class='ctx'> #define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \</div><div class='del'>-	(BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \</div><div class='del'>-	 BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \</div><div class='del'>-	 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP))</div><div class='add'>+	(BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \</div><div class='add'>+	 BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) | \</div><div class='add'>+	 BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP))</div><div class='ctx'> #define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \</div><div class='del'>-	(BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \</div><div class='del'>-	 BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP))</div><div class='add'>+	(BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \</div><div class='add'>+	 BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP))</div><div class='ctx'> #define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \</div><div class='ctx'> 	(ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \</div><div class='del'>-	 ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP))</div><div class='add'>+	 ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP))</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='ctx'>  * @vsi: VF's VSI</div><div class='del'>- * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure</div><div class='add'>+ * @avf_hash: hash bit fields (LIBIE_FILTER_PCTYPE_*) to configure</div><div class='ctx'>  *</div><div class='ctx'>  * This function will take the hash bitmap provided by the AVF driver via a</div><div class='ctx'>  * message, convert it to ICE-compatible values, and configure RSS flow</div><div class='hunk'>@@ -2621,8 +2828,7 @@ int ice_add_avf_rss_cfg(struct ice_hw *hw, struct ice_vsi *vsi, u64 avf_hash)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	vsi_handle = vsi-&gt;idx;</div><div class='del'>-	if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID ||</div><div class='del'>-	    !ice_is_vsi_valid(hw, vsi_handle))</div><div class='add'>+	if (!avf_hash || !ice_is_vsi_valid(hw, vsi_handle))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure no unsupported bits are specified */</div><div class='hunk'>@@ -2658,11 +2864,11 @@ int ice_add_avf_rss_cfg(struct ice_hw *hw, struct ice_vsi *vsi, u64 avf_hash)</div><div class='ctx'> 					ICE_FLOW_HASH_UDP_PORT;</div><div class='ctx'> 				hash_flds &amp;= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS;</div><div class='ctx'> 			} else if (hash_flds &amp;</div><div class='del'>-				   BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) {</div><div class='add'>+				   BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP)) {</div><div class='ctx'> 				rss_hash = ICE_FLOW_HASH_IPV4 |</div><div class='ctx'> 					ICE_FLOW_HASH_SCTP_PORT;</div><div class='ctx'> 				hash_flds &amp;=</div><div class='del'>-					~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP);</div><div class='add'>+					~BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (hash_flds &amp; ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) {</div><div class='ctx'> 			if (hash_flds &amp; ICE_FLOW_AVF_RSS_IPV6_MASKS) {</div><div class='hunk'>@@ -2679,11 +2885,11 @@ int ice_add_avf_rss_cfg(struct ice_hw *hw, struct ice_vsi *vsi, u64 avf_hash)</div><div class='ctx'> 					ICE_FLOW_HASH_UDP_PORT;</div><div class='ctx'> 				hash_flds &amp;= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS;</div><div class='ctx'> 			} else if (hash_flds &amp;</div><div class='del'>-				   BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) {</div><div class='add'>+				   BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP)) {</div><div class='ctx'> 				rss_hash = ICE_FLOW_HASH_IPV6 |</div><div class='ctx'> 					ICE_FLOW_HASH_SCTP_PORT;</div><div class='ctx'> 				hash_flds &amp;=</div><div class='del'>-					~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP);</div><div class='add'>+					~BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_flow.h b/drivers/net/ethernet/intel/ice/ice_flow.h<br/>index 6cb7bb879c98..6c6cdc8addb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_flow.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_flow.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_flow.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_flow.h</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> #ifndef _ICE_FLOW_H_</div><div class='ctx'> #define _ICE_FLOW_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/net/intel/libie/pctype.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "ice_flex_type.h"</div><div class='ctx'> #include "ice_parser.h"</div><div class='ctx'> </div><div class='hunk'>@@ -20,6 +22,15 @@</div><div class='ctx'> #define ICE_FLOW_HASH_IPV6	\</div><div class='ctx'> 	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \</div><div class='ctx'> 	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA))</div><div class='add'>+#define ICE_FLOW_HASH_IPV6_PRE32	\</div><div class='add'>+	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA) | \</div><div class='add'>+	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA))</div><div class='add'>+#define ICE_FLOW_HASH_IPV6_PRE48	\</div><div class='add'>+	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA) | \</div><div class='add'>+	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA))</div><div class='add'>+#define ICE_FLOW_HASH_IPV6_PRE64	\</div><div class='add'>+	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA) | \</div><div class='add'>+	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA))</div><div class='ctx'> #define ICE_FLOW_HASH_TCP_PORT	\</div><div class='ctx'> 	(BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \</div><div class='ctx'> 	 BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT))</div><div class='hunk'>@@ -38,6 +49,33 @@</div><div class='ctx'> #define ICE_HASH_SCTP_IPV4	(ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_SCTP_PORT)</div><div class='ctx'> #define ICE_HASH_SCTP_IPV6	(ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_SCTP_PORT)</div><div class='ctx'> </div><div class='add'>+#define ICE_HASH_TCP_IPV6_PRE32	 \</div><div class='add'>+	(ICE_FLOW_HASH_IPV6_PRE32 | ICE_FLOW_HASH_TCP_PORT)</div><div class='add'>+#define ICE_HASH_UDP_IPV6_PRE32	 \</div><div class='add'>+	(ICE_FLOW_HASH_IPV6_PRE32 | ICE_FLOW_HASH_UDP_PORT)</div><div class='add'>+#define ICE_HASH_SCTP_IPV6_PRE32 \</div><div class='add'>+	(ICE_FLOW_HASH_IPV6_PRE32 | ICE_FLOW_HASH_SCTP_PORT)</div><div class='add'>+#define ICE_HASH_TCP_IPV6_PRE48	 \</div><div class='add'>+	(ICE_FLOW_HASH_IPV6_PRE48 | ICE_FLOW_HASH_TCP_PORT)</div><div class='add'>+#define ICE_HASH_UDP_IPV6_PRE48	 \</div><div class='add'>+	(ICE_FLOW_HASH_IPV6_PRE48 | ICE_FLOW_HASH_UDP_PORT)</div><div class='add'>+#define ICE_HASH_SCTP_IPV6_PRE48 \</div><div class='add'>+	(ICE_FLOW_HASH_IPV6_PRE48 | ICE_FLOW_HASH_SCTP_PORT)</div><div class='add'>+#define ICE_HASH_TCP_IPV6_PRE64	 \</div><div class='add'>+	(ICE_FLOW_HASH_IPV6_PRE64 | ICE_FLOW_HASH_TCP_PORT)</div><div class='add'>+#define ICE_HASH_UDP_IPV6_PRE64	 \</div><div class='add'>+	(ICE_FLOW_HASH_IPV6_PRE64 | ICE_FLOW_HASH_UDP_PORT)</div><div class='add'>+#define ICE_HASH_SCTP_IPV6_PRE64 \</div><div class='add'>+	(ICE_FLOW_HASH_IPV6_PRE64 | ICE_FLOW_HASH_SCTP_PORT)</div><div class='add'>+</div><div class='add'>+#define ICE_FLOW_HASH_GTP_TEID \</div><div class='add'>+	(BIT_ULL(ICE_FLOW_FIELD_IDX_GTPC_TEID))</div><div class='add'>+</div><div class='add'>+#define ICE_FLOW_HASH_GTP_IPV4_TEID \</div><div class='add'>+	(ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_TEID)</div><div class='add'>+#define ICE_FLOW_HASH_GTP_IPV6_TEID \</div><div class='add'>+	(ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_TEID)</div><div class='add'>+</div><div class='ctx'> #define ICE_FLOW_HASH_GTP_C_TEID \</div><div class='ctx'> 	(BIT_ULL(ICE_FLOW_FIELD_IDX_GTPC_TEID))</div><div class='ctx'> </div><div class='hunk'>@@ -126,6 +164,23 @@</div><div class='ctx'> #define ICE_FLOW_HASH_NAT_T_ESP_IPV6_SPI \</div><div class='ctx'> 	(ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_NAT_T_ESP_SPI)</div><div class='ctx'> </div><div class='add'>+#define ICE_FLOW_HASH_L2TPV2_SESS_ID \</div><div class='add'>+	(BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV2_SESS_ID))</div><div class='add'>+#define ICE_FLOW_HASH_L2TPV2_SESS_ID_ETH \</div><div class='add'>+	(ICE_FLOW_HASH_ETH | ICE_FLOW_HASH_L2TPV2_SESS_ID)</div><div class='add'>+</div><div class='add'>+#define ICE_FLOW_HASH_L2TPV2_LEN_SESS_ID \</div><div class='add'>+	(BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV2_LEN_SESS_ID))</div><div class='add'>+#define ICE_FLOW_HASH_L2TPV2_LEN_SESS_ID_ETH \</div><div class='add'>+	(ICE_FLOW_HASH_ETH | ICE_FLOW_HASH_L2TPV2_LEN_SESS_ID)</div><div class='add'>+</div><div class='add'>+#define ICE_FLOW_FIELD_IPV4_SRC_OFFSET 12</div><div class='add'>+#define ICE_FLOW_FIELD_IPV4_DST_OFFSET 16</div><div class='add'>+#define ICE_FLOW_FIELD_IPV6_SRC_OFFSET 8</div><div class='add'>+#define ICE_FLOW_FIELD_IPV6_DST_OFFSET 24</div><div class='add'>+#define ICE_FLOW_FIELD_SRC_PORT_OFFSET 0</div><div class='add'>+#define ICE_FLOW_FIELD_DST_PORT_OFFSET 2</div><div class='add'>+</div><div class='ctx'> /* Protocol header fields within a packet segment. A segment consists of one or</div><div class='ctx'>  * more protocol headers that make up a logical group of protocol headers. Each</div><div class='ctx'>  * logical group of protocol headers encapsulates or is encapsulated using/by</div><div class='hunk'>@@ -158,10 +213,13 @@ enum ice_flow_seg_hdr {</div><div class='ctx'> 	ICE_FLOW_SEG_HDR_AH		= 0x00200000,</div><div class='ctx'> 	ICE_FLOW_SEG_HDR_NAT_T_ESP	= 0x00400000,</div><div class='ctx'> 	ICE_FLOW_SEG_HDR_ETH_NON_IP	= 0x00800000,</div><div class='add'>+	ICE_FLOW_SEG_HDR_GTPU_NON_IP	= 0x01000000,</div><div class='add'>+	ICE_FLOW_SEG_HDR_L2TPV2		= 0x10000000,</div><div class='ctx'> 	/* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and</div><div class='del'>-	 * ICE_FLOW_SEG_HDR_IPV6 which include the IPV4 other PTYPEs</div><div class='add'>+	 * ICE_FLOW_SEG_HDR_IPV6.</div><div class='ctx'> 	 */</div><div class='del'>-	ICE_FLOW_SEG_HDR_IPV_OTHER      = 0x20000000,</div><div class='add'>+	ICE_FLOW_SEG_HDR_IPV_FRAG	= 0x40000000,</div><div class='add'>+	ICE_FLOW_SEG_HDR_IPV_OTHER	= 0x80000000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* These segments all have the same PTYPES, but are otherwise distinguished by</div><div class='hunk'>@@ -198,6 +256,15 @@ enum ice_flow_field {</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_IPV4_DA,</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_IPV6_SA,</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_IPV6_DA,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_IPV4_CHKSUM,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_IPV4_ID,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_IPV6_ID,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA,</div><div class='ctx'> 	/* L4 */</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_TCP_SRC_PORT,</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_TCP_DST_PORT,</div><div class='hunk'>@@ -206,6 +273,9 @@ enum ice_flow_field {</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT,</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_SCTP_DST_PORT,</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_TCP_FLAGS,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_TCP_CHKSUM,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_UDP_CHKSUM,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_SCTP_CHKSUM,</div><div class='ctx'> 	/* ARP */</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_ARP_SIP,</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_ARP_DIP,</div><div class='hunk'>@@ -226,13 +296,13 @@ enum ice_flow_field {</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_GTPU_EH_QFI,</div><div class='ctx'> 	/* GTPU_UP */</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_GTPU_UP_TEID,</div><div class='add'>+	ICE_FLOW_FIELD_IDX_GTPU_UP_QFI,</div><div class='ctx'> 	/* GTPU_DWN */</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID,</div><div class='del'>-	/* PPPoE */</div><div class='add'>+	ICE_FLOW_FIELD_IDX_GTPU_DWN_QFI,</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID,</div><div class='ctx'> 	/* PFCP */</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_PFCP_SEID,</div><div class='del'>-	/* L2TPv3 */</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID,</div><div class='ctx'> 	/* ESP */</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_ESP_SPI,</div><div class='hunk'>@@ -240,10 +310,16 @@ enum ice_flow_field {</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_AH_SPI,</div><div class='ctx'> 	/* NAT_T ESP */</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI,</div><div class='add'>+	/* L2TPV2 SESSION ID*/</div><div class='add'>+	ICE_FLOW_FIELD_IDX_L2TPV2_SESS_ID,</div><div class='add'>+	/* L2TPV2_LEN SESSION ID */</div><div class='add'>+	ICE_FLOW_FIELD_IDX_L2TPV2_LEN_SESS_ID,</div><div class='ctx'> 	 /* The total number of enums must not exceed 64 */</div><div class='ctx'> 	ICE_FLOW_FIELD_IDX_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static_assert(ICE_FLOW_FIELD_IDX_MAX &lt;= 64, "The total number of enums must not exceed 64");</div><div class='add'>+</div><div class='ctx'> #define ICE_FLOW_HASH_FLD_IPV4_SA	BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA)</div><div class='ctx'> #define ICE_FLOW_HASH_FLD_IPV6_SA	BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA)</div><div class='ctx'> #define ICE_FLOW_HASH_FLD_IPV4_DA	BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA)</div><div class='hunk'>@@ -264,57 +340,27 @@ enum ice_flow_field {</div><div class='ctx'> #define ICE_FLOW_HASH_FLD_GTPU_DWN_TEID \</div><div class='ctx'> 	BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID)</div><div class='ctx'> </div><div class='del'>-/* Flow headers and fields for AVF support */</div><div class='del'>-enum ice_flow_avf_hdr_field {</div><div class='del'>-	/* Values 0 - 28 are reserved for future use */</div><div class='del'>-	ICE_AVF_FLOW_FIELD_INVALID		= 0,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP	= 29,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_IPV4_UDP,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_IPV4_TCP,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_IPV4_SCTP,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_IPV4_OTHER,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_FRAG_IPV4,</div><div class='del'>-	/* Values 37-38 are reserved */</div><div class='del'>-	ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP	= 39,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_IPV6_UDP,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_IPV6_TCP,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_IPV6_SCTP,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_IPV6_OTHER,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_FRAG_IPV6,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_RSVD47,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_FCOE_OX,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_FCOE_RX,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_FCOE_OTHER,</div><div class='del'>-	/* Values 51-62 are reserved */</div><div class='del'>-	ICE_AVF_FLOW_FIELD_L2_PAYLOAD		= 63,</div><div class='del'>-	ICE_AVF_FLOW_FIELD_MAX</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Supported RSS offloads  This macro is defined to support</div><div class='del'>- * VIRTCHNL_OP_GET_RSS_HENA_CAPS ops. PF driver sends the RSS hardware</div><div class='add'>+ * VIRTCHNL_OP_GET_RSS_HASHCFG_CAPS ops. PF driver sends the RSS hardware</div><div class='ctx'>  * capabilities to the caller of this ops.</div><div class='ctx'>  */</div><div class='del'>-#define ICE_DEFAULT_RSS_HENA ( \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \</div><div class='del'>-	BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP))</div><div class='add'>+#define ICE_DEFAULT_RSS_HASHCFG ( \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_SCTP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_OTHER) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV4) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_SCTP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_OTHER) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_FRAG_IPV6) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \</div><div class='add'>+	BIT_ULL(LIBIE_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))</div><div class='ctx'> </div><div class='ctx'> enum ice_rss_cfg_hdr_type {</div><div class='ctx'> 	ICE_RSS_OUTER_HEADERS, /* take outer headers as inputset. */</div><div class='hunk'>@@ -324,6 +370,10 @@ enum ice_rss_cfg_hdr_type {</div><div class='ctx'> 	/* take inner headers as inputset for packet with outer ipv6. */</div><div class='ctx'> 	ICE_RSS_INNER_HEADERS_W_OUTER_IPV6,</div><div class='ctx'> 	/* take outer headers first then inner headers as inputset */</div><div class='add'>+	/* take inner as inputset for GTPoGRE with outer IPv4 + GRE. */</div><div class='add'>+	ICE_RSS_INNER_HEADERS_W_OUTER_IPV4_GRE,</div><div class='add'>+	/* take inner as inputset for GTPoGRE with outer IPv6 + GRE. */</div><div class='add'>+	ICE_RSS_INNER_HEADERS_W_OUTER_IPV6_GRE,</div><div class='ctx'> 	ICE_RSS_ANY_HEADERS</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -434,6 +484,12 @@ struct ice_flow_prof {</div><div class='ctx'> 	bool symm; /* Symmetric Hash for RSS */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ice_rss_raw_cfg {</div><div class='add'>+	struct ice_parser_profile prof;</div><div class='add'>+	bool raw_ena;</div><div class='add'>+	bool symm;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ice_rss_cfg {</div><div class='ctx'> 	struct list_head l_entry;</div><div class='ctx'> 	/* bitmap of VSIs added to the RSS entry */</div><div class='hunk'>@@ -472,4 +528,6 @@ int ice_add_rss_cfg(struct ice_hw *hw, struct ice_vsi *vsi,</div><div class='ctx'> int ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,</div><div class='ctx'> 		    const struct ice_rss_hash_cfg *cfg);</div><div class='ctx'> u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs, bool *symm);</div><div class='add'>+void ice_rss_update_raw_symm(struct ice_hw *hw,</div><div class='add'>+			     struct ice_rss_raw_cfg *cfg, u64 id);</div><div class='ctx'> #endif /* _ICE_FLOW_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_fw_update.c b/drivers/net/ethernet/intel/ice/ice_fw_update.c<br/>index 2702a0da5c3e..973a13d3d92a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_fw_update.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_fw_update.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_fw_update.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_fw_update.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='ctx'> #include &lt;linux/pldmfw.h&gt;</div><div class='ctx'> #include "ice.h"</div><div class='add'>+#include "ice_lib.h"</div><div class='ctx'> #include "ice_fw_update.h"</div><div class='ctx'> </div><div class='ctx'> struct ice_fwu_priv {</div><div class='hunk'>@@ -67,7 +68,7 @@ ice_send_package_data(struct pldmfw *context, const u8 *data, u16 length)</div><div class='ctx'> </div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		dev_err(dev, "Failed to send record package data to firmware, err %d aq_err %s\n",</div><div class='del'>-			status, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			status, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Failed to record package data to firmware");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -125,6 +126,10 @@ ice_check_component_response(struct ice_pf *pf, u16 id, u8 response, u8 code,</div><div class='ctx'> 	case ICE_AQ_NVM_PASS_COMP_CAN_NOT_BE_UPDATED:</div><div class='ctx'> 		dev_info(dev, "firmware has rejected updating %s\n", component);</div><div class='ctx'> 		break;</div><div class='add'>+	case ICE_AQ_NVM_PASS_COMP_PARTIAL_CHECK:</div><div class='add'>+		if (ice_is_recovery_mode(&amp;pf-&gt;hw))</div><div class='add'>+			return 0;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (code) {</div><div class='hunk'>@@ -252,7 +257,7 @@ ice_send_component_table(struct pldmfw *context, struct pldmfw_component *compon</div><div class='ctx'> </div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		dev_err(dev, "Failed to transfer component table to firmware, err %d aq_err %s\n",</div><div class='del'>-			status, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			status, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Failed to transfer component table to firmware");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -294,7 +299,8 @@ int ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset,</div><div class='ctx'> 	struct device *dev = ice_pf_to_dev(pf);</div><div class='ctx'> 	struct ice_aq_task task = {};</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	struct ice_aq_desc *desc;</div><div class='add'>+	struct libie_aq_desc *desc;</div><div class='add'>+	struct ice_aqc_nvm *cmd;</div><div class='ctx'> 	u32 completion_offset;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -308,7 +314,7 @@ int ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset,</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Failed to flash module 0x%02x with block of size %u at offset %u, err %d aq_err %s\n",</div><div class='ctx'> 			module, block_size, offset, err,</div><div class='del'>-			ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Failed to program flash module");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -328,11 +334,12 @@ int ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	desc = &amp;task.event.desc;</div><div class='del'>-	completion_module = le16_to_cpu(desc-&gt;params.nvm.module_typeid);</div><div class='add'>+	cmd = libie_aq_raw(desc);</div><div class='add'>+	completion_module = le16_to_cpu(cmd-&gt;module_typeid);</div><div class='ctx'> 	completion_retval = le16_to_cpu(desc-&gt;retval);</div><div class='ctx'> </div><div class='del'>-	completion_offset = le16_to_cpu(desc-&gt;params.nvm.offset_low);</div><div class='del'>-	completion_offset |= desc-&gt;params.nvm.offset_high &lt;&lt; 16;</div><div class='add'>+	completion_offset = le16_to_cpu(cmd-&gt;offset_low);</div><div class='add'>+	completion_offset |= cmd-&gt;offset_high &lt;&lt; 16;</div><div class='ctx'> </div><div class='ctx'> 	if (completion_module != module) {</div><div class='ctx'> 		dev_err(dev, "Unexpected module_typeid in write completion: got 0x%x, expected 0x%x\n",</div><div class='hunk'>@@ -351,7 +358,7 @@ int ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset,</div><div class='ctx'> 	if (completion_retval) {</div><div class='ctx'> 		dev_err(dev, "Firmware failed to flash module 0x%02x with block of size %u at offset %u, err %s\n",</div><div class='ctx'> 			module, block_size, offset,</div><div class='del'>-			ice_aq_str((enum ice_aq_err)completion_retval));</div><div class='add'>+			libie_aq_str((enum libie_aq_err)completion_retval));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Firmware failed to program flash module");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -364,7 +371,7 @@ int ice_write_one_nvm_block(struct ice_pf *pf, u16 module, u32 offset,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (reset_level &amp;&amp; last_cmd &amp;&amp; module == ICE_SR_1ST_NVM_BANK_PTR) {</div><div class='ctx'> 		if (hw-&gt;dev_caps.common_cap.pcie_reset_avoidance) {</div><div class='del'>-			*reset_level = desc-&gt;params.nvm.cmd_flags &amp;</div><div class='add'>+			*reset_level = cmd-&gt;cmd_flags &amp;</div><div class='ctx'> 				       ICE_AQC_NVM_RESET_LVL_M;</div><div class='ctx'> 			dev_dbg(dev, "Firmware reported required reset level as %u\n",</div><div class='ctx'> 				*reset_level);</div><div class='hunk'>@@ -482,7 +489,8 @@ ice_erase_nvm_module(struct ice_pf *pf, u16 module, const char *component,</div><div class='ctx'> 	struct device *dev = ice_pf_to_dev(pf);</div><div class='ctx'> 	struct ice_aq_task task = {};</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	struct ice_aq_desc *desc;</div><div class='add'>+	struct libie_aq_desc *desc;</div><div class='add'>+	struct ice_aqc_nvm *cmd;</div><div class='ctx'> 	struct devlink *devlink;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -498,7 +506,7 @@ ice_erase_nvm_module(struct ice_pf *pf, u16 module, const char *component,</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Failed to erase %s (module 0x%02x), err %d aq_err %s\n",</div><div class='ctx'> 			component, module, err,</div><div class='del'>-			ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Failed to erase flash module");</div><div class='ctx'> 		err = -EIO;</div><div class='ctx'> 		goto out_notify_devlink;</div><div class='hunk'>@@ -513,7 +521,8 @@ ice_erase_nvm_module(struct ice_pf *pf, u16 module, const char *component,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	desc = &amp;task.event.desc;</div><div class='del'>-	completion_module = le16_to_cpu(desc-&gt;params.nvm.module_typeid);</div><div class='add'>+	cmd = libie_aq_raw(desc);</div><div class='add'>+	completion_module = le16_to_cpu(cmd-&gt;module_typeid);</div><div class='ctx'> 	completion_retval = le16_to_cpu(desc-&gt;retval);</div><div class='ctx'> </div><div class='ctx'> 	if (completion_module != module) {</div><div class='hunk'>@@ -525,9 +534,9 @@ ice_erase_nvm_module(struct ice_pf *pf, u16 module, const char *component,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (completion_retval) {</div><div class='del'>-		dev_err(dev, "Firmware failed to erase %s (module 0x02%x), aq_err %s\n",</div><div class='add'>+		dev_err(dev, "Firmware failed to erase %s (module 0x%02x), aq_err %s\n",</div><div class='ctx'> 			component, module,</div><div class='del'>-			ice_aq_str((enum ice_aq_err)completion_retval));</div><div class='add'>+			libie_aq_str((enum libie_aq_err)completion_retval));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Firmware failed to erase flash");</div><div class='ctx'> 		err = -EIO;</div><div class='ctx'> 		goto out_notify_devlink;</div><div class='hunk'>@@ -574,7 +583,7 @@ ice_switch_flash_banks(struct ice_pf *pf, u8 activate_flags,</div><div class='ctx'> 	err = ice_nvm_write_activate(hw, activate_flags, &amp;response_flags);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Failed to switch active flash banks, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Failed to switch active flash banks");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -606,7 +615,7 @@ ice_switch_flash_banks(struct ice_pf *pf, u8 activate_flags,</div><div class='ctx'> 	completion_retval = le16_to_cpu(task.event.desc.retval);</div><div class='ctx'> 	if (completion_retval) {</div><div class='ctx'> 		dev_err(dev, "Firmware failed to switch active flash banks aq_err %s\n",</div><div class='del'>-			ice_aq_str((enum ice_aq_err)completion_retval));</div><div class='add'>+			libie_aq_str((enum libie_aq_err)completion_retval));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Firmware failed to switch active flash banks");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -944,7 +953,7 @@ ice_cancel_pending_update(struct ice_pf *pf, const char *component,</div><div class='ctx'> 	err = ice_acquire_nvm(hw, ICE_RES_WRITE);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Failed to acquire device flash lock, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Failed to acquire device flash lock");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1004,13 +1013,20 @@ int ice_devlink_flash_update(struct devlink *devlink,</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!hw-&gt;dev_caps.common_cap.nvm_unified_update) {</div><div class='add'>+	if (!hw-&gt;dev_caps.common_cap.nvm_unified_update &amp;&amp; !ice_is_recovery_mode(hw)) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Current firmware does not support unified update");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;priv, 0, sizeof(priv));</div><div class='ctx'> </div><div class='add'>+	if (params-&gt;component &amp;&amp; strcmp(params-&gt;component, "fw.mgmt") == 0) {</div><div class='add'>+		priv.context.mode = PLDMFW_UPDATE_MODE_SINGLE_COMPONENT;</div><div class='add'>+		priv.context.component_identifier = NVM_COMP_ID_NVM;</div><div class='add'>+	} else if (params-&gt;component) {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* the E822 device needs a slightly different ops */</div><div class='ctx'> 	if (hw-&gt;mac_type == ICE_MAC_GENERIC)</div><div class='ctx'> 		priv.context.ops = &amp;ice_fwu_ops_e822;</div><div class='hunk'>@@ -1030,7 +1046,7 @@ int ice_devlink_flash_update(struct devlink *devlink,</div><div class='ctx'> 	err = ice_acquire_nvm(hw, ICE_RES_WRITE);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Failed to acquire device flash lock, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Failed to acquire device flash lock");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.c b/drivers/net/ethernet/intel/ice/ice_fwlog.c<br/>deleted file mode 100644<br/>index 4fd15387a7e5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_fwlog.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_fwlog.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,472 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright (c) 2022, Intel Corporation. */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#include "ice.h"</div><div class='del'>-#include "ice_common.h"</div><div class='del'>-#include "ice_fwlog.h"</div><div class='del'>-</div><div class='del'>-bool ice_fwlog_ring_full(struct ice_fwlog_ring *rings)</div><div class='del'>-{</div><div class='del'>-	u16 head, tail;</div><div class='del'>-</div><div class='del'>-	head = rings-&gt;head;</div><div class='del'>-	tail = rings-&gt;tail;</div><div class='del'>-</div><div class='del'>-	if (head &lt; tail &amp;&amp; (tail - head == (rings-&gt;size - 1)))</div><div class='del'>-		return true;</div><div class='del'>-	else if (head &gt; tail &amp;&amp; (tail == (head - 1)))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool ice_fwlog_ring_empty(struct ice_fwlog_ring *rings)</div><div class='del'>-{</div><div class='del'>-	return rings-&gt;head == rings-&gt;tail;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void ice_fwlog_ring_increment(u16 *item, u16 size)</div><div class='del'>-{</div><div class='del'>-	*item = (*item + 1) &amp; (size - 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ice_fwlog_alloc_ring_buffs(struct ice_fwlog_ring *rings)</div><div class='del'>-{</div><div class='del'>-	int i, nr_bytes;</div><div class='del'>-	u8 *mem;</div><div class='del'>-</div><div class='del'>-	nr_bytes = rings-&gt;size * ICE_AQ_MAX_BUF_LEN;</div><div class='del'>-	mem = vzalloc(nr_bytes);</div><div class='del'>-	if (!mem)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; rings-&gt;size; i++) {</div><div class='del'>-		struct ice_fwlog_data *ring = &amp;rings-&gt;rings[i];</div><div class='del'>-</div><div class='del'>-		ring-&gt;data_size = ICE_AQ_MAX_BUF_LEN;</div><div class='del'>-		ring-&gt;data = mem;</div><div class='del'>-		mem += ICE_AQ_MAX_BUF_LEN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ice_fwlog_free_ring_buffs(struct ice_fwlog_ring *rings)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; rings-&gt;size; i++) {</div><div class='del'>-		struct ice_fwlog_data *ring = &amp;rings-&gt;rings[i];</div><div class='del'>-</div><div class='del'>-		/* the first ring is the base memory for the whole range so</div><div class='del'>-		 * free it</div><div class='del'>-		 */</div><div class='del'>-		if (!i)</div><div class='del'>-			vfree(ring-&gt;data);</div><div class='del'>-</div><div class='del'>-		ring-&gt;data = NULL;</div><div class='del'>-		ring-&gt;data_size = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define ICE_FWLOG_INDEX_TO_BYTES(n) ((128 * 1024) &lt;&lt; (n))</div><div class='del'>-/**</div><div class='del'>- * ice_fwlog_realloc_rings - reallocate the FW log rings</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @index: the new index to use to allocate memory for the log data</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-void ice_fwlog_realloc_rings(struct ice_hw *hw, int index)</div><div class='del'>-{</div><div class='del'>-	struct ice_fwlog_ring ring;</div><div class='del'>-	int status, ring_size;</div><div class='del'>-</div><div class='del'>-	/* convert the number of bytes into a number of 4K buffers. externally</div><div class='del'>-	 * the driver presents the interface to the FW log data as a number of</div><div class='del'>-	 * bytes because that's easy for users to understand. internally the</div><div class='del'>-	 * driver uses a ring of buffers because the driver doesn't know where</div><div class='del'>-	 * the beginning and end of any line of log data is so the driver has</div><div class='del'>-	 * to overwrite data as complete blocks. when the data is returned to</div><div class='del'>-	 * the user the driver knows that the data is correct and the FW log</div><div class='del'>-	 * can be correctly parsed by the tools</div><div class='del'>-	 */</div><div class='del'>-	ring_size = ICE_FWLOG_INDEX_TO_BYTES(index) / ICE_AQ_MAX_BUF_LEN;</div><div class='del'>-	if (ring_size == hw-&gt;fwlog_ring.size)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* allocate space for the new rings and buffers then release the</div><div class='del'>-	 * old rings and buffers. that way if we don't have enough</div><div class='del'>-	 * memory then we at least have what we had before</div><div class='del'>-	 */</div><div class='del'>-	ring.rings = kcalloc(ring_size, sizeof(*ring.rings), GFP_KERNEL);</div><div class='del'>-	if (!ring.rings)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ring.size = ring_size;</div><div class='del'>-</div><div class='del'>-	status = ice_fwlog_alloc_ring_buffs(&amp;ring);</div><div class='del'>-	if (status) {</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw), "Unable to allocate memory for FW log ring data buffers\n");</div><div class='del'>-		ice_fwlog_free_ring_buffs(&amp;ring);</div><div class='del'>-		kfree(ring.rings);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ice_fwlog_free_ring_buffs(&amp;hw-&gt;fwlog_ring);</div><div class='del'>-	kfree(hw-&gt;fwlog_ring.rings);</div><div class='del'>-</div><div class='del'>-	hw-&gt;fwlog_ring.rings = ring.rings;</div><div class='del'>-	hw-&gt;fwlog_ring.size = ring.size;</div><div class='del'>-	hw-&gt;fwlog_ring.index = index;</div><div class='del'>-	hw-&gt;fwlog_ring.head = 0;</div><div class='del'>-	hw-&gt;fwlog_ring.tail = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_fwlog_init - Initialize FW logging configuration</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- *</div><div class='del'>- * This function should be called on driver initialization during</div><div class='del'>- * ice_init_hw().</div><div class='del'>- */</div><div class='del'>-int ice_fwlog_init(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	/* only support fw log commands on PF 0 */</div><div class='del'>-	if (hw-&gt;bus.func)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ice_fwlog_set_supported(hw);</div><div class='del'>-</div><div class='del'>-	if (ice_fwlog_supported(hw)) {</div><div class='del'>-		int status;</div><div class='del'>-</div><div class='del'>-		/* read the current config from the FW and store it */</div><div class='del'>-		status = ice_fwlog_get(hw, &amp;hw-&gt;fwlog_cfg);</div><div class='del'>-		if (status)</div><div class='del'>-			return status;</div><div class='del'>-</div><div class='del'>-		hw-&gt;fwlog_ring.rings = kcalloc(ICE_FWLOG_RING_SIZE_DFLT,</div><div class='del'>-					       sizeof(*hw-&gt;fwlog_ring.rings),</div><div class='del'>-					       GFP_KERNEL);</div><div class='del'>-		if (!hw-&gt;fwlog_ring.rings) {</div><div class='del'>-			dev_warn(ice_hw_to_dev(hw), "Unable to allocate memory for FW log rings\n");</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		hw-&gt;fwlog_ring.size = ICE_FWLOG_RING_SIZE_DFLT;</div><div class='del'>-		hw-&gt;fwlog_ring.index = ICE_FWLOG_RING_SIZE_INDEX_DFLT;</div><div class='del'>-</div><div class='del'>-		status = ice_fwlog_alloc_ring_buffs(&amp;hw-&gt;fwlog_ring);</div><div class='del'>-		if (status) {</div><div class='del'>-			dev_warn(ice_hw_to_dev(hw), "Unable to allocate memory for FW log ring data buffers\n");</div><div class='del'>-			ice_fwlog_free_ring_buffs(&amp;hw-&gt;fwlog_ring);</div><div class='del'>-			kfree(hw-&gt;fwlog_ring.rings);</div><div class='del'>-			return status;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ice_debugfs_fwlog_init(hw-&gt;back);</div><div class='del'>-	} else {</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw), "FW logging is not supported in this NVM image. Please update the NVM to get FW log support\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_fwlog_deinit - unroll FW logging configuration</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- *</div><div class='del'>- * This function should be called in ice_deinit_hw().</div><div class='del'>- */</div><div class='del'>-void ice_fwlog_deinit(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	struct ice_pf *pf = hw-&gt;back;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	/* only support fw log commands on PF 0 */</div><div class='del'>-	if (hw-&gt;bus.func)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ice_debugfs_pf_deinit(hw-&gt;back);</div><div class='del'>-</div><div class='del'>-	/* make sure FW logging is disabled to not put the FW in a weird state</div><div class='del'>-	 * for the next driver load</div><div class='del'>-	 */</div><div class='del'>-	hw-&gt;fwlog_cfg.options &amp;= ~ICE_FWLOG_OPTION_ARQ_ENA;</div><div class='del'>-	status = ice_fwlog_set(hw, &amp;hw-&gt;fwlog_cfg);</div><div class='del'>-	if (status)</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw), "Unable to turn off FW logging, status: %d\n",</div><div class='del'>-			 status);</div><div class='del'>-</div><div class='del'>-	kfree(pf-&gt;ice_debugfs_pf_fwlog_modules);</div><div class='del'>-</div><div class='del'>-	pf-&gt;ice_debugfs_pf_fwlog_modules = NULL;</div><div class='del'>-</div><div class='del'>-	status = ice_fwlog_unregister(hw);</div><div class='del'>-	if (status)</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw), "Unable to unregister FW logging, status: %d\n",</div><div class='del'>-			 status);</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;fwlog_ring.rings) {</div><div class='del'>-		ice_fwlog_free_ring_buffs(&amp;hw-&gt;fwlog_ring);</div><div class='del'>-		kfree(hw-&gt;fwlog_ring.rings);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_fwlog_supported - Cached for whether FW supports FW logging or not</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- *</div><div class='del'>- * This will always return false if called before ice_init_hw(), so it must be</div><div class='del'>- * called after ice_init_hw().</div><div class='del'>- */</div><div class='del'>-bool ice_fwlog_supported(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	return hw-&gt;fwlog_supported;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_aq_fwlog_set - Set FW logging configuration AQ command (0xFF30)</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @entries: entries to configure</div><div class='del'>- * @num_entries: number of @entries</div><div class='del'>- * @options: options from ice_fwlog_cfg-&gt;options structure</div><div class='del'>- * @log_resolution: logging resolution</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-ice_aq_fwlog_set(struct ice_hw *hw, struct ice_fwlog_module_entry *entries,</div><div class='del'>-		 u16 num_entries, u16 options, u16 log_resolution)</div><div class='del'>-{</div><div class='del'>-	struct ice_aqc_fw_log_cfg_resp *fw_modules;</div><div class='del'>-	struct ice_aqc_fw_log *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='del'>-	int status;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	fw_modules = kcalloc(num_entries, sizeof(*fw_modules), GFP_KERNEL);</div><div class='del'>-	if (!fw_modules)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num_entries; i++) {</div><div class='del'>-		fw_modules[i].module_identifier =</div><div class='del'>-			cpu_to_le16(entries[i].module_id);</div><div class='del'>-		fw_modules[i].log_level = entries[i].log_level;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_fw_logs_config);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='del'>-</div><div class='del'>-	cmd = &amp;desc.params.fw_log;</div><div class='del'>-</div><div class='del'>-	cmd-&gt;cmd_flags = ICE_AQC_FW_LOG_CONF_SET_VALID;</div><div class='del'>-	cmd-&gt;ops.cfg.log_resolution = cpu_to_le16(log_resolution);</div><div class='del'>-	cmd-&gt;ops.cfg.mdl_cnt = cpu_to_le16(num_entries);</div><div class='del'>-</div><div class='del'>-	if (options &amp; ICE_FWLOG_OPTION_ARQ_ENA)</div><div class='del'>-		cmd-&gt;cmd_flags |= ICE_AQC_FW_LOG_CONF_AQ_EN;</div><div class='del'>-	if (options &amp; ICE_FWLOG_OPTION_UART_ENA)</div><div class='del'>-		cmd-&gt;cmd_flags |= ICE_AQC_FW_LOG_CONF_UART_EN;</div><div class='del'>-</div><div class='del'>-	status = ice_aq_send_cmd(hw, &amp;desc, fw_modules,</div><div class='del'>-				 sizeof(*fw_modules) * num_entries,</div><div class='del'>-				 NULL);</div><div class='del'>-</div><div class='del'>-	kfree(fw_modules);</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_fwlog_set - Set the firmware logging settings</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @cfg: config used to set firmware logging</div><div class='del'>- *</div><div class='del'>- * This function should be called whenever the driver needs to set the firmware</div><div class='del'>- * logging configuration. It can be called on initialization, reset, or during</div><div class='del'>- * runtime.</div><div class='del'>- *</div><div class='del'>- * If the PF wishes to receive FW logging then it must register via</div><div class='del'>- * ice_fwlog_register. Note, that ice_fwlog_register does not need to be called</div><div class='del'>- * for init.</div><div class='del'>- */</div><div class='del'>-int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)</div><div class='del'>-{</div><div class='del'>-	if (!ice_fwlog_supported(hw))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	return ice_aq_fwlog_set(hw, cfg-&gt;module_entries,</div><div class='del'>-				ICE_AQC_FW_LOG_ID_MAX, cfg-&gt;options,</div><div class='del'>-				cfg-&gt;log_resolution);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_aq_fwlog_get - Get the current firmware logging configuration (0xFF32)</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @cfg: firmware logging configuration to populate</div><div class='del'>- */</div><div class='del'>-static int ice_aq_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)</div><div class='del'>-{</div><div class='del'>-	struct ice_aqc_fw_log_cfg_resp *fw_modules;</div><div class='del'>-	struct ice_aqc_fw_log *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='del'>-	u16 module_id_cnt;</div><div class='del'>-	int status;</div><div class='del'>-	void *buf;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	memset(cfg, 0, sizeof(*cfg));</div><div class='del'>-</div><div class='del'>-	buf = kzalloc(ICE_AQ_MAX_BUF_LEN, GFP_KERNEL);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_fw_logs_query);</div><div class='del'>-	cmd = &amp;desc.params.fw_log;</div><div class='del'>-</div><div class='del'>-	cmd-&gt;cmd_flags = ICE_AQC_FW_LOG_AQ_QUERY;</div><div class='del'>-</div><div class='del'>-	status = ice_aq_send_cmd(hw, &amp;desc, buf, ICE_AQ_MAX_BUF_LEN, NULL);</div><div class='del'>-	if (status) {</div><div class='del'>-		ice_debug(hw, ICE_DBG_FW_LOG, "Failed to get FW log configuration\n");</div><div class='del'>-		goto status_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	module_id_cnt = le16_to_cpu(cmd-&gt;ops.cfg.mdl_cnt);</div><div class='del'>-	if (module_id_cnt &lt; ICE_AQC_FW_LOG_ID_MAX) {</div><div class='del'>-		ice_debug(hw, ICE_DBG_FW_LOG, "FW returned less than the expected number of FW log module IDs\n");</div><div class='del'>-	} else if (module_id_cnt &gt; ICE_AQC_FW_LOG_ID_MAX) {</div><div class='del'>-		ice_debug(hw, ICE_DBG_FW_LOG, "FW returned more than expected number of FW log module IDs, setting module_id_cnt to software expected max %u\n",</div><div class='del'>-			  ICE_AQC_FW_LOG_ID_MAX);</div><div class='del'>-		module_id_cnt = ICE_AQC_FW_LOG_ID_MAX;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cfg-&gt;log_resolution = le16_to_cpu(cmd-&gt;ops.cfg.log_resolution);</div><div class='del'>-	if (cmd-&gt;cmd_flags &amp; ICE_AQC_FW_LOG_CONF_AQ_EN)</div><div class='del'>-		cfg-&gt;options |= ICE_FWLOG_OPTION_ARQ_ENA;</div><div class='del'>-	if (cmd-&gt;cmd_flags &amp; ICE_AQC_FW_LOG_CONF_UART_EN)</div><div class='del'>-		cfg-&gt;options |= ICE_FWLOG_OPTION_UART_ENA;</div><div class='del'>-	if (cmd-&gt;cmd_flags &amp; ICE_AQC_FW_LOG_QUERY_REGISTERED)</div><div class='del'>-		cfg-&gt;options |= ICE_FWLOG_OPTION_IS_REGISTERED;</div><div class='del'>-</div><div class='del'>-	fw_modules = (struct ice_aqc_fw_log_cfg_resp *)buf;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; module_id_cnt; i++) {</div><div class='del'>-		struct ice_aqc_fw_log_cfg_resp *fw_module = &amp;fw_modules[i];</div><div class='del'>-</div><div class='del'>-		cfg-&gt;module_entries[i].module_id =</div><div class='del'>-			le16_to_cpu(fw_module-&gt;module_identifier);</div><div class='del'>-		cfg-&gt;module_entries[i].log_level = fw_module-&gt;log_level;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-status_out:</div><div class='del'>-	kfree(buf);</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_fwlog_get - Get the firmware logging settings</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @cfg: config to populate based on current firmware logging settings</div><div class='del'>- */</div><div class='del'>-int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)</div><div class='del'>-{</div><div class='del'>-	if (!ice_fwlog_supported(hw))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	return ice_aq_fwlog_get(hw, cfg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_aq_fwlog_register - Register PF for firmware logging events (0xFF31)</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- * @reg: true to register and false to unregister</div><div class='del'>- */</div><div class='del'>-static int ice_aq_fwlog_register(struct ice_hw *hw, bool reg)</div><div class='del'>-{</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='del'>-</div><div class='del'>-	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_fw_logs_register);</div><div class='del'>-</div><div class='del'>-	if (reg)</div><div class='del'>-		desc.params.fw_log.cmd_flags = ICE_AQC_FW_LOG_AQ_REGISTER;</div><div class='del'>-</div><div class='del'>-	return ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_fwlog_register - Register the PF for firmware logging</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- *</div><div class='del'>- * After this call the PF will start to receive firmware logging based on the</div><div class='del'>- * configuration set in ice_fwlog_set.</div><div class='del'>- */</div><div class='del'>-int ice_fwlog_register(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	if (!ice_fwlog_supported(hw))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	status = ice_aq_fwlog_register(hw, true);</div><div class='del'>-	if (status)</div><div class='del'>-		ice_debug(hw, ICE_DBG_FW_LOG, "Failed to register for firmware logging events over ARQ\n");</div><div class='del'>-	else</div><div class='del'>-		hw-&gt;fwlog_cfg.options |= ICE_FWLOG_OPTION_IS_REGISTERED;</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_fwlog_unregister - Unregister the PF from firmware logging</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- */</div><div class='del'>-int ice_fwlog_unregister(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	if (!ice_fwlog_supported(hw))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	status = ice_aq_fwlog_register(hw, false);</div><div class='del'>-	if (status)</div><div class='del'>-		ice_debug(hw, ICE_DBG_FW_LOG, "Failed to unregister from firmware logging events over ARQ\n");</div><div class='del'>-	else</div><div class='del'>-		hw-&gt;fwlog_cfg.options &amp;= ~ICE_FWLOG_OPTION_IS_REGISTERED;</div><div class='del'>-</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_fwlog_set_supported - Set if FW logging is supported by FW</div><div class='del'>- * @hw: pointer to the HW struct</div><div class='del'>- *</div><div class='del'>- * If FW returns success to the ice_aq_fwlog_get call then it supports FW</div><div class='del'>- * logging, else it doesn't. Set the fwlog_supported flag accordingly.</div><div class='del'>- *</div><div class='del'>- * This function is only meant to be called during driver init to determine if</div><div class='del'>- * the FW support FW logging.</div><div class='del'>- */</div><div class='del'>-void ice_fwlog_set_supported(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	struct ice_fwlog_cfg *cfg;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	hw-&gt;fwlog_supported = false;</div><div class='del'>-</div><div class='del'>-	cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);</div><div class='del'>-	if (!cfg)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* don't call ice_fwlog_get() because that would check to see if FW</div><div class='del'>-	 * logging is supported which is what the driver is determining now</div><div class='del'>-	 */</div><div class='del'>-	status = ice_aq_fwlog_get(hw, cfg);</div><div class='del'>-	if (status)</div><div class='del'>-		ice_debug(hw, ICE_DBG_FW_LOG, "ice_aq_fwlog_get failed, FW logging is not supported on this version of FW, status %d\n",</div><div class='del'>-			  status);</div><div class='del'>-	else</div><div class='del'>-		hw-&gt;fwlog_supported = true;</div><div class='del'>-</div><div class='del'>-	kfree(cfg);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_fwlog.h b/drivers/net/ethernet/intel/ice/ice_fwlog.h<br/>deleted file mode 100644<br/>index 287e71fa4b86..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_fwlog.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_fwlog.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,79 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/* Copyright (C) 2022, Intel Corporation. */</div><div class='del'>-</div><div class='del'>-#ifndef _ICE_FWLOG_H_</div><div class='del'>-#define _ICE_FWLOG_H_</div><div class='del'>-#include "ice_adminq_cmd.h"</div><div class='del'>-</div><div class='del'>-struct ice_hw;</div><div class='del'>-</div><div class='del'>-/* Only a single log level should be set and all log levels under the set value</div><div class='del'>- * are enabled, e.g. if log level is set to ICE_FW_LOG_LEVEL_VERBOSE, then all</div><div class='del'>- * other log levels are included (except ICE_FW_LOG_LEVEL_NONE)</div><div class='del'>- */</div><div class='del'>-enum ice_fwlog_level {</div><div class='del'>-	ICE_FWLOG_LEVEL_NONE = 0,</div><div class='del'>-	ICE_FWLOG_LEVEL_ERROR = 1,</div><div class='del'>-	ICE_FWLOG_LEVEL_WARNING = 2,</div><div class='del'>-	ICE_FWLOG_LEVEL_NORMAL = 3,</div><div class='del'>-	ICE_FWLOG_LEVEL_VERBOSE = 4,</div><div class='del'>-	ICE_FWLOG_LEVEL_INVALID, /* all values &gt;= this entry are invalid */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ice_fwlog_module_entry {</div><div class='del'>-	/* module ID for the corresponding firmware logging event */</div><div class='del'>-	u16 module_id;</div><div class='del'>-	/* verbosity level for the module_id */</div><div class='del'>-	u8 log_level;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ice_fwlog_cfg {</div><div class='del'>-	/* list of modules for configuring log level */</div><div class='del'>-	struct ice_fwlog_module_entry module_entries[ICE_AQC_FW_LOG_ID_MAX];</div><div class='del'>-	/* options used to configure firmware logging */</div><div class='del'>-	u16 options;</div><div class='del'>-#define ICE_FWLOG_OPTION_ARQ_ENA		BIT(0)</div><div class='del'>-#define ICE_FWLOG_OPTION_UART_ENA		BIT(1)</div><div class='del'>-	/* set before calling ice_fwlog_init() so the PF registers for firmware</div><div class='del'>-	 * logging on initialization</div><div class='del'>-	 */</div><div class='del'>-#define ICE_FWLOG_OPTION_REGISTER_ON_INIT	BIT(2)</div><div class='del'>-	/* set in the ice_fwlog_get() response if the PF is registered for FW</div><div class='del'>-	 * logging events over ARQ</div><div class='del'>-	 */</div><div class='del'>-#define ICE_FWLOG_OPTION_IS_REGISTERED		BIT(3)</div><div class='del'>-</div><div class='del'>-	/* minimum number of log events sent per Admin Receive Queue event */</div><div class='del'>-	u16 log_resolution;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ice_fwlog_data {</div><div class='del'>-	u16 data_size;</div><div class='del'>-	u8 *data;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ice_fwlog_ring {</div><div class='del'>-	struct ice_fwlog_data *rings;</div><div class='del'>-	u16 index;</div><div class='del'>-	u16 size;</div><div class='del'>-	u16 head;</div><div class='del'>-	u16 tail;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ICE_FWLOG_RING_SIZE_INDEX_DFLT 3</div><div class='del'>-#define ICE_FWLOG_RING_SIZE_DFLT 256</div><div class='del'>-#define ICE_FWLOG_RING_SIZE_MAX 512</div><div class='del'>-</div><div class='del'>-bool ice_fwlog_ring_full(struct ice_fwlog_ring *rings);</div><div class='del'>-bool ice_fwlog_ring_empty(struct ice_fwlog_ring *rings);</div><div class='del'>-void ice_fwlog_ring_increment(u16 *item, u16 size);</div><div class='del'>-void ice_fwlog_set_supported(struct ice_hw *hw);</div><div class='del'>-bool ice_fwlog_supported(struct ice_hw *hw);</div><div class='del'>-int ice_fwlog_init(struct ice_hw *hw);</div><div class='del'>-void ice_fwlog_deinit(struct ice_hw *hw);</div><div class='del'>-int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);</div><div class='del'>-int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);</div><div class='del'>-int ice_fwlog_register(struct ice_hw *hw);</div><div class='del'>-int ice_fwlog_unregister(struct ice_hw *hw);</div><div class='del'>-void ice_fwlog_realloc_rings(struct ice_hw *hw, int index);</div><div class='del'>-#endif /* _ICE_FWLOG_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_gnss.c b/drivers/net/ethernet/intel/ice/ice_gnss.c<br/>index f02e8ca55375..6b26290452d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_gnss.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_gnss.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_gnss.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_gnss.c</a></div><div class='hunk'>@@ -182,7 +182,7 @@ static struct gnss_serial *ice_gnss_struct_init(struct ice_pf *pf)</div><div class='ctx'> 	pf-&gt;gnss_serial = gnss;</div><div class='ctx'> </div><div class='ctx'> 	kthread_init_delayed_work(&amp;gnss-&gt;read_work, ice_gnss_read);</div><div class='del'>-	kworker = kthread_create_worker(0, "ice-gnss-%s", dev_name(dev));</div><div class='add'>+	kworker = kthread_run_worker(0, "ice-gnss-%s", dev_name(dev));</div><div class='ctx'> 	if (IS_ERR(kworker)) {</div><div class='ctx'> 		kfree(gnss);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -381,32 +381,23 @@ void ice_gnss_exit(struct ice_pf *pf)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_gnss_is_gps_present - Check if GPS HW is present</div><div class='add'>+ * ice_gnss_is_module_present - Check if GNSS HW is present</div><div class='ctx'>  * @hw: pointer to HW struct</div><div class='add'>+ *</div><div class='add'>+ * Return: true when GNSS is present, false otherwise.</div><div class='ctx'>  */</div><div class='del'>-bool ice_gnss_is_gps_present(struct ice_hw *hw)</div><div class='add'>+bool ice_gnss_is_module_present(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	if (!hw-&gt;func_caps.ts_func_info.src_tmr_owned)</div><div class='del'>-		return false;</div><div class='add'>+	int err;</div><div class='add'>+	u8 data;</div><div class='ctx'> </div><div class='del'>-	if (!ice_is_gps_in_netlist(hw))</div><div class='add'>+	if (!hw-&gt;func_caps.ts_func_info.src_tmr_owned ||</div><div class='add'>+	    !ice_is_gps_in_netlist(hw))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)</div><div class='del'>-	if (ice_is_e810t(hw)) {</div><div class='del'>-		int err;</div><div class='del'>-		u8 data;</div><div class='del'>-</div><div class='del'>-		err = ice_read_pca9575_reg(hw, ICE_PCA9575_P0_IN, &amp;data);</div><div class='del'>-		if (err || !!(data &amp; ICE_P0_GNSS_PRSNT_N))</div><div class='del'>-			return false;</div><div class='del'>-	} else {</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-#else</div><div class='del'>-	if (!ice_is_e810t(hw))</div><div class='add'>+	err = ice_read_pca9575_reg(hw, ICE_PCA9575_P0_IN, &amp;data);</div><div class='add'>+	if (err || !!(data &amp; ICE_P0_GNSS_PRSNT_N))</div><div class='ctx'> 		return false;</div><div class='del'>-#endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_gnss.h b/drivers/net/ethernet/intel/ice/ice_gnss.h<br/>index 75e567ad7059..15daf603ed7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_gnss.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_gnss.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_gnss.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_gnss.h</a></div><div class='hunk'>@@ -37,11 +37,11 @@ struct gnss_serial {</div><div class='ctx'> #if IS_ENABLED(CONFIG_GNSS)</div><div class='ctx'> void ice_gnss_init(struct ice_pf *pf);</div><div class='ctx'> void ice_gnss_exit(struct ice_pf *pf);</div><div class='del'>-bool ice_gnss_is_gps_present(struct ice_hw *hw);</div><div class='add'>+bool ice_gnss_is_module_present(struct ice_hw *hw);</div><div class='ctx'> #else</div><div class='ctx'> static inline void ice_gnss_init(struct ice_pf *pf) { }</div><div class='ctx'> static inline void ice_gnss_exit(struct ice_pf *pf) { }</div><div class='del'>-static inline bool ice_gnss_is_gps_present(struct ice_hw *hw)</div><div class='add'>+static inline bool ice_gnss_is_module_present(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h<br/>index dc88aea9f473..082ad33c53dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_hw_autogen.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_hw_autogen.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_hw_autogen.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_hw_autogen.h</a></div><div class='hunk'>@@ -16,8 +16,10 @@</div><div class='ctx'> #define GLCOMM_QUANTA_PROF_MAX_DESC_M		ICE_M(0x3F, 24)</div><div class='ctx'> #define QTX_COMM_DBELL(_DBQM)			(0x002C0000 + ((_DBQM) * 4))</div><div class='ctx'> #define QTX_COMM_HEAD(_DBQM)			(0x000E0000 + ((_DBQM) * 4))</div><div class='add'>+#define QTX_COMM_HEAD_MAX_INDEX			16383</div><div class='ctx'> #define QTX_COMM_HEAD_HEAD_S			0</div><div class='ctx'> #define QTX_COMM_HEAD_HEAD_M			ICE_M(0x1FFF, 0)</div><div class='add'>+#define E830_GLQTX_TXTIME_DBELL_LSB(_DBQM)	(0x002E0000 + ((_DBQM) * 8))</div><div class='ctx'> #define PF_FW_ARQBAH				0x00080180</div><div class='ctx'> #define PF_FW_ARQBAL				0x00080080</div><div class='ctx'> #define PF_FW_ARQH				0x00080380</div><div class='hunk'>@@ -272,6 +274,8 @@</div><div class='ctx'> #define VPINT_ALLOC_PCI_VALID_M			BIT(31)</div><div class='ctx'> #define VPINT_MBX_CTL(_VSI)			(0x0016A000 + ((_VSI) * 4))</div><div class='ctx'> #define VPINT_MBX_CTL_CAUSE_ENA_M		BIT(30)</div><div class='add'>+#define PFLAN_TX_QALLOC(_PF)			(0x001D2580 + ((_PF) * 4))</div><div class='add'>+#define PFLAN_TX_QALLOC_FIRSTQ_M		GENMASK(13, 0)</div><div class='ctx'> #define GLLAN_RCTL_0				0x002941F8</div><div class='ctx'> #define QRX_CONTEXT(_i, _QRX)			(0x00280000 + ((_i) * 8192 + (_QRX) * 4))</div><div class='ctx'> #define QRX_CTRL(_QRX)				(0x00120000 + ((_QRX) * 4))</div><div class='hunk'>@@ -376,6 +380,15 @@</div><div class='ctx'> #define GLNVM_ULD_POR_DONE_1_M			BIT(8)</div><div class='ctx'> #define GLNVM_ULD_PCIER_DONE_2_M		BIT(9)</div><div class='ctx'> #define GLNVM_ULD_PE_DONE_M			BIT(10)</div><div class='add'>+#define GLCOMM_QTX_CNTX_CTL			0x002D2DC8</div><div class='add'>+#define GLCOMM_QTX_CNTX_CTL_QUEUE_ID_M		GENMASK(13, 0)</div><div class='add'>+#define GLCOMM_QTX_CNTX_CTL_CMD_M		GENMASK(18, 16)</div><div class='add'>+#define GLCOMM_QTX_CNTX_CTL_CMD_READ		0</div><div class='add'>+#define GLCOMM_QTX_CNTX_CTL_CMD_WRITE		1</div><div class='add'>+#define GLCOMM_QTX_CNTX_CTL_CMD_RESET		3</div><div class='add'>+#define GLCOMM_QTX_CNTX_CTL_CMD_WRITE_NO_DYN	4</div><div class='add'>+#define GLCOMM_QTX_CNTX_CTL_CMD_EXEC_M		BIT(19)</div><div class='add'>+#define GLCOMM_QTX_CNTX_DATA(_i)		(0x002D2D40 + ((_i) * 4))</div><div class='ctx'> #define GLPCI_CNF2				0x000BE004</div><div class='ctx'> #define GLPCI_CNF2_CACHELINE_SIZE_M		BIT(1)</div><div class='ctx'> #define PF_FUNC_RID				0x0009E880</div><div class='hunk'>@@ -541,12 +554,26 @@</div><div class='ctx'> #define PFPM_WUS_MAG_M				BIT(1)</div><div class='ctx'> #define PFPM_WUS_MNG_M				BIT(3)</div><div class='ctx'> #define PFPM_WUS_FW_RST_WK_M			BIT(31)</div><div class='add'>+#define E830_PRTMAC_TS_TX_MEM_VALID_H		0x001E2020</div><div class='add'>+#define E830_PRTMAC_TS_TX_MEM_VALID_L		0x001E2000</div><div class='ctx'> #define E830_PRTMAC_CL01_PS_QNT			0x001E32A0</div><div class='ctx'> #define E830_PRTMAC_CL01_PS_QNT_CL0_M		GENMASK(15, 0)</div><div class='ctx'> #define E830_PRTMAC_CL01_QNT_THR		0x001E3320</div><div class='ctx'> #define E830_PRTMAC_CL01_QNT_THR_CL0_M		GENMASK(15, 0)</div><div class='add'>+#define E830_PRTTSYN_TXTIME_H(_i)		(0x001E5800 + ((_i) * 32))</div><div class='add'>+#define E830_PRTTSYN_TXTIME_L(_i)		(0x001E5000 + ((_i) * 32))</div><div class='add'>+#define E830_GLPTM_ART_CTL			0x00088B50</div><div class='add'>+#define E830_GLPTM_ART_CTL_ACTIVE_M		BIT(0)</div><div class='add'>+#define E830_GLPTM_ART_TIME_H			0x00088B54</div><div class='add'>+#define E830_GLPTM_ART_TIME_L			0x00088B58</div><div class='add'>+#define E830_GLTSYN_PTMTIME_H(_i)		(0x00088B48 + ((_i) * 4))</div><div class='add'>+#define E830_GLTSYN_PTMTIME_L(_i)		(0x00088B40 + ((_i) * 4))</div><div class='add'>+#define E830_PFPTM_SEM				0x00088B00</div><div class='add'>+#define E830_PFPTM_SEM_BUSY_M			BIT(0)</div><div class='ctx'> #define VFINT_DYN_CTLN(_i)			(0x00003800 + ((_i) * 4))</div><div class='ctx'> #define VFINT_DYN_CTLN_CLEARPBA_M		BIT(1)</div><div class='add'>+#define E830_GLTXTIME_FETCH_PROFILE(_i, _j)     (0x002D3500 + ((_i) * 4 + (_j) * 64))</div><div class='add'>+#define E830_GLTXTIME_FETCH_PROFILE_FETCH_TS_DESC_M ICE_M(0x1FF, 0)</div><div class='ctx'> #define E830_MBX_PF_IN_FLIGHT_VF_MSGS_THRESH	0x00234000</div><div class='ctx'> #define E830_MBX_VF_DEC_TRIG(_VF)		(0x00233800 + (_VF) * 4)</div><div class='ctx'> #define E830_MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT(_VF)	(0x00233000 + (_VF) * 4)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_idc.c b/drivers/net/ethernet/intel/ice/ice_idc.c<br/>index 145b27f2a4ce..420d45c2558b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_idc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_idc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_idc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_idc.c</a></div><div class='hunk'>@@ -9,22 +9,25 @@</div><div class='ctx'> static DEFINE_XARRAY_ALLOC1(ice_aux_id);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_get_auxiliary_drv - retrieve iidc_auxiliary_drv struct</div><div class='del'>- * @pf: pointer to PF struct</div><div class='add'>+ * ice_get_auxiliary_drv - retrieve iidc_rdma_core_auxiliary_drv struct</div><div class='add'>+ * @cdev: pointer to iidc_rdma_core_dev_info struct</div><div class='ctx'>  *</div><div class='ctx'>  * This function has to be called with a device_lock on the</div><div class='del'>- * pf-&gt;adev.dev to avoid race conditions.</div><div class='add'>+ * cdev-&gt;adev.dev to avoid race conditions.</div><div class='add'>+ *</div><div class='add'>+ * Return: pointer to the matched auxiliary driver struct</div><div class='ctx'>  */</div><div class='del'>-static struct iidc_auxiliary_drv *ice_get_auxiliary_drv(struct ice_pf *pf)</div><div class='add'>+static struct iidc_rdma_core_auxiliary_drv *</div><div class='add'>+ice_get_auxiliary_drv(struct iidc_rdma_core_dev_info *cdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct auxiliary_device *adev;</div><div class='ctx'> </div><div class='del'>-	adev = pf-&gt;adev;</div><div class='add'>+	adev = cdev-&gt;adev;</div><div class='ctx'> 	if (!adev || !adev-&gt;dev.driver)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	return container_of(adev-&gt;dev.driver, struct iidc_auxiliary_drv,</div><div class='del'>-			    adrv.driver);</div><div class='add'>+	return container_of(adev-&gt;dev.driver,</div><div class='add'>+			    struct iidc_rdma_core_auxiliary_drv, adrv.driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -32,44 +35,54 @@ static struct iidc_auxiliary_drv *ice_get_auxiliary_drv(struct ice_pf *pf)</div><div class='ctx'>  * @pf: pointer to PF struct</div><div class='ctx'>  * @event: event struct</div><div class='ctx'>  */</div><div class='del'>-void ice_send_event_to_aux(struct ice_pf *pf, struct iidc_event *event)</div><div class='add'>+void ice_send_event_to_aux(struct ice_pf *pf, struct iidc_rdma_event *event)</div><div class='ctx'> {</div><div class='del'>-	struct iidc_auxiliary_drv *iadrv;</div><div class='add'>+	struct iidc_rdma_core_auxiliary_drv *iadrv;</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev;</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON_ONCE(!in_task()))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	cdev = pf-&gt;cdev_info;</div><div class='add'>+	if (!cdev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;pf-&gt;adev_mutex);</div><div class='del'>-	if (!pf-&gt;adev)</div><div class='add'>+	if (!cdev-&gt;adev)</div><div class='ctx'> 		goto finish;</div><div class='ctx'> </div><div class='del'>-	device_lock(&amp;pf-&gt;adev-&gt;dev);</div><div class='del'>-	iadrv = ice_get_auxiliary_drv(pf);</div><div class='add'>+	device_lock(&amp;cdev-&gt;adev-&gt;dev);</div><div class='add'>+	iadrv = ice_get_auxiliary_drv(cdev);</div><div class='ctx'> 	if (iadrv &amp;&amp; iadrv-&gt;event_handler)</div><div class='del'>-		iadrv-&gt;event_handler(pf, event);</div><div class='del'>-	device_unlock(&amp;pf-&gt;adev-&gt;dev);</div><div class='add'>+		iadrv-&gt;event_handler(cdev, event);</div><div class='add'>+	device_unlock(&amp;cdev-&gt;adev-&gt;dev);</div><div class='ctx'> finish:</div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;adev_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_add_rdma_qset - Add Leaf Node for RDMA Qset</div><div class='del'>- * @pf: PF struct</div><div class='add'>+ * @cdev: pointer to iidc_rdma_core_dev_info struct</div><div class='ctx'>  * @qset: Resource to be allocated</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero on success or error code encountered</div><div class='ctx'>  */</div><div class='del'>-int ice_add_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset)</div><div class='add'>+int ice_add_rdma_qset(struct iidc_rdma_core_dev_info *cdev,</div><div class='add'>+		      struct iidc_rdma_qset_params *qset)</div><div class='ctx'> {</div><div class='ctx'> 	u16 max_rdmaqs[ICE_MAX_TRAFFIC_CLASS];</div><div class='ctx'> 	struct ice_vsi *vsi;</div><div class='ctx'> 	struct device *dev;</div><div class='add'>+	struct ice_pf *pf;</div><div class='ctx'> 	u32 qset_teid;</div><div class='ctx'> 	u16 qs_handle;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(!pf || !qset))</div><div class='add'>+	if (WARN_ON(!cdev || !qset))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	pf = pci_get_drvdata(cdev-&gt;pdev);</div><div class='ctx'> 	dev = ice_pf_to_dev(pf);</div><div class='ctx'> </div><div class='ctx'> 	if (!ice_is_rdma_ena(pf))</div><div class='hunk'>@@ -100,7 +113,6 @@ int ice_add_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset)</div><div class='ctx'> 		dev_err(dev, "Failed VSI RDMA Qset enable\n");</div><div class='ctx'> 		return status;</div><div class='ctx'> 	}</div><div class='del'>-	vsi-&gt;qset_handle[qset-&gt;tc] = qset-&gt;qs_handle;</div><div class='ctx'> 	qset-&gt;teid = qset_teid;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -109,18 +121,23 @@ EXPORT_SYMBOL_GPL(ice_add_rdma_qset);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_del_rdma_qset - Delete leaf node for RDMA Qset</div><div class='del'>- * @pf: PF struct</div><div class='add'>+ * @cdev: pointer to iidc_rdma_core_dev_info struct</div><div class='ctx'>  * @qset: Resource to be freed</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero on success, error code on failure</div><div class='ctx'>  */</div><div class='del'>-int ice_del_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset)</div><div class='add'>+int ice_del_rdma_qset(struct iidc_rdma_core_dev_info *cdev,</div><div class='add'>+		      struct iidc_rdma_qset_params *qset)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_vsi *vsi;</div><div class='add'>+	struct ice_pf *pf;</div><div class='ctx'> 	u32 teid;</div><div class='ctx'> 	u16 q_id;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(!pf || !qset))</div><div class='add'>+	if (WARN_ON(!cdev || !qset))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	pf = pci_get_drvdata(cdev-&gt;pdev);</div><div class='ctx'> 	vsi = ice_find_vsi(pf, qset-&gt;vport_id);</div><div class='ctx'> 	if (!vsi) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(pf), "RDMA Invalid VSI\n");</div><div class='hunk'>@@ -130,36 +147,36 @@ int ice_del_rdma_qset(struct ice_pf *pf, struct iidc_rdma_qset_params *qset)</div><div class='ctx'> 	q_id = qset-&gt;qs_handle;</div><div class='ctx'> 	teid = qset-&gt;teid;</div><div class='ctx'> </div><div class='del'>-	vsi-&gt;qset_handle[qset-&gt;tc] = 0;</div><div class='del'>-</div><div class='ctx'> 	return ice_dis_vsi_rdma_qset(vsi-&gt;port_info, 1, &amp;teid, &amp;q_id);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ice_del_rdma_qset);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_rdma_request_reset - accept request from RDMA to perform a reset</div><div class='del'>- * @pf: struct for PF</div><div class='add'>+ * @cdev: pointer to iidc_rdma_core_dev_info struct</div><div class='ctx'>  * @reset_type: type of reset</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero on success, error code on failure</div><div class='ctx'>  */</div><div class='del'>-int ice_rdma_request_reset(struct ice_pf *pf, enum iidc_reset_type reset_type)</div><div class='add'>+int ice_rdma_request_reset(struct iidc_rdma_core_dev_info *cdev,</div><div class='add'>+			   enum iidc_rdma_reset_type reset_type)</div><div class='ctx'> {</div><div class='ctx'> 	enum ice_reset_req reset;</div><div class='add'>+	struct ice_pf *pf;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(!pf))</div><div class='add'>+	if (WARN_ON(!cdev))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	pf = pci_get_drvdata(cdev-&gt;pdev);</div><div class='add'>+</div><div class='ctx'> 	switch (reset_type) {</div><div class='del'>-	case IIDC_PFR:</div><div class='add'>+	case IIDC_FUNC_RESET:</div><div class='ctx'> 		reset = ICE_RESET_PFR;</div><div class='ctx'> 		break;</div><div class='del'>-	case IIDC_CORER:</div><div class='add'>+	case IIDC_DEV_RESET:</div><div class='ctx'> 		reset = ICE_RESET_CORER;</div><div class='ctx'> 		break;</div><div class='del'>-	case IIDC_GLOBR:</div><div class='del'>-		reset = ICE_RESET_GLOBR;</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='del'>-		dev_err(ice_pf_to_dev(pf), "incorrect reset request\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -169,18 +186,23 @@ EXPORT_SYMBOL_GPL(ice_rdma_request_reset);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_rdma_update_vsi_filter - update main VSI filters for RDMA</div><div class='del'>- * @pf: pointer to struct for PF</div><div class='add'>+ * @cdev: pointer to iidc_rdma_core_dev_info struct</div><div class='ctx'>  * @vsi_id: VSI HW idx to update filter on</div><div class='ctx'>  * @enable: bool whether to enable or disable filters</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero on success, error code on failure</div><div class='ctx'>  */</div><div class='del'>-int ice_rdma_update_vsi_filter(struct ice_pf *pf, u16 vsi_id, bool enable)</div><div class='add'>+int ice_rdma_update_vsi_filter(struct iidc_rdma_core_dev_info *cdev,</div><div class='add'>+			       u16 vsi_id, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_vsi *vsi;</div><div class='add'>+	struct ice_pf *pf;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(!pf))</div><div class='add'>+	if (WARN_ON(!cdev))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	pf = pci_get_drvdata(cdev-&gt;pdev);</div><div class='ctx'> 	vsi = ice_find_vsi(pf, vsi_id);</div><div class='ctx'> 	if (!vsi)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -201,88 +223,54 @@ int ice_rdma_update_vsi_filter(struct ice_pf *pf, u16 vsi_id, bool enable)</div><div class='ctx'> EXPORT_SYMBOL_GPL(ice_rdma_update_vsi_filter);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_get_qos_params - parse QoS params for RDMA consumption</div><div class='del'>- * @pf: pointer to PF struct</div><div class='del'>- * @qos: set of QoS values</div><div class='del'>- */</div><div class='del'>-void ice_get_qos_params(struct ice_pf *pf, struct iidc_qos_params *qos)</div><div class='del'>-{</div><div class='del'>-	struct ice_dcbx_cfg *dcbx_cfg;</div><div class='del'>-	unsigned int i;</div><div class='del'>-	u32 up2tc;</div><div class='del'>-</div><div class='del'>-	dcbx_cfg = &amp;pf-&gt;hw.port_info-&gt;qos_cfg.local_dcbx_cfg;</div><div class='del'>-	up2tc = rd32(&amp;pf-&gt;hw, PRTDCB_TUP2TC);</div><div class='del'>-</div><div class='del'>-	qos-&gt;num_tc = ice_dcb_get_num_tc(dcbx_cfg);</div><div class='del'>-	for (i = 0; i &lt; IIDC_MAX_USER_PRIORITY; i++)</div><div class='del'>-		qos-&gt;up2tc[i] = (up2tc &gt;&gt; (i * 3)) &amp; 0x7;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; IEEE_8021QAZ_MAX_TCS; i++)</div><div class='del'>-		qos-&gt;tc_info[i].rel_bw = dcbx_cfg-&gt;etscfg.tcbwtable[i];</div><div class='del'>-</div><div class='del'>-	qos-&gt;pfc_mode = dcbx_cfg-&gt;pfc_mode;</div><div class='del'>-	if (qos-&gt;pfc_mode == IIDC_DSCP_PFC_MODE)</div><div class='del'>-		for (i = 0; i &lt; IIDC_MAX_DSCP_MAPPING; i++)</div><div class='del'>-			qos-&gt;dscp_map[i] = dcbx_cfg-&gt;dscp_map[i];</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(ice_get_qos_params);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_alloc_rdma_qvectors - Allocate vector resources for RDMA driver</div><div class='del'>- * @pf: board private structure to initialize</div><div class='add'>+ * ice_alloc_rdma_qvector - alloc vector resources reserved for RDMA driver</div><div class='add'>+ * @cdev: pointer to iidc_rdma_core_dev_info struct</div><div class='add'>+ * @entry: MSI-X entry to be removed</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero on success, error code on failure</div><div class='ctx'>  */</div><div class='del'>-static int ice_alloc_rdma_qvectors(struct ice_pf *pf)</div><div class='add'>+int ice_alloc_rdma_qvector(struct iidc_rdma_core_dev_info *cdev,</div><div class='add'>+			   struct msix_entry *entry)</div><div class='ctx'> {</div><div class='del'>-	if (ice_is_rdma_ena(pf)) {</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		pf-&gt;msix_entries = kcalloc(pf-&gt;num_rdma_msix,</div><div class='del'>-					   sizeof(*pf-&gt;msix_entries),</div><div class='del'>-						  GFP_KERNEL);</div><div class='del'>-		if (!pf-&gt;msix_entries)</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+	struct msi_map map;</div><div class='add'>+	struct ice_pf *pf;</div><div class='ctx'> </div><div class='del'>-		/* RDMA is the only user of pf-&gt;msix_entries array */</div><div class='del'>-		pf-&gt;rdma_base_vector = 0;</div><div class='add'>+	if (WARN_ON(!cdev))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; pf-&gt;num_rdma_msix; i++) {</div><div class='del'>-			struct msix_entry *entry = &amp;pf-&gt;msix_entries[i];</div><div class='del'>-			struct msi_map map;</div><div class='add'>+	pf = pci_get_drvdata(cdev-&gt;pdev);</div><div class='add'>+	map = ice_alloc_irq(pf, true);</div><div class='add'>+	if (map.index &lt; 0)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-			map = ice_alloc_irq(pf, false);</div><div class='del'>-			if (map.index &lt; 0)</div><div class='del'>-				break;</div><div class='add'>+	entry-&gt;entry = map.index;</div><div class='add'>+	entry-&gt;vector = map.virq;</div><div class='ctx'> </div><div class='del'>-			entry-&gt;entry = map.index;</div><div class='del'>-			entry-&gt;vector = map.virq;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(ice_alloc_rdma_qvector);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_free_rdma_qvector - free vector resources reserved for RDMA driver</div><div class='del'>- * @pf: board private structure to initialize</div><div class='add'>+ * @cdev: pointer to iidc_rdma_core_dev_info struct</div><div class='add'>+ * @entry: MSI-X entry to be removed</div><div class='ctx'>  */</div><div class='del'>-static void ice_free_rdma_qvector(struct ice_pf *pf)</div><div class='add'>+void ice_free_rdma_qvector(struct iidc_rdma_core_dev_info *cdev,</div><div class='add'>+			   struct msix_entry *entry)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	struct msi_map map;</div><div class='add'>+	struct ice_pf *pf;</div><div class='ctx'> </div><div class='del'>-	if (!pf-&gt;msix_entries)</div><div class='add'>+	if (WARN_ON(!cdev || !entry))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; pf-&gt;num_rdma_msix; i++) {</div><div class='del'>-		struct msi_map map;</div><div class='del'>-</div><div class='del'>-		map.index = pf-&gt;msix_entries[i].entry;</div><div class='del'>-		map.virq = pf-&gt;msix_entries[i].vector;</div><div class='del'>-		ice_free_irq(pf, map);</div><div class='del'>-	}</div><div class='add'>+	pf = pci_get_drvdata(cdev-&gt;pdev);</div><div class='ctx'> </div><div class='del'>-	kfree(pf-&gt;msix_entries);</div><div class='del'>-	pf-&gt;msix_entries = NULL;</div><div class='add'>+	map.index = entry-&gt;entry;</div><div class='add'>+	map.virq = entry-&gt;vector;</div><div class='add'>+	ice_free_irq(pf, map);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(ice_free_rdma_qvector);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_adev_release - function to be mapped to AUX dev's release op</div><div class='hunk'>@@ -290,19 +278,23 @@ static void ice_free_rdma_qvector(struct ice_pf *pf)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_adev_release(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct iidc_auxiliary_dev *iadev;</div><div class='add'>+	struct iidc_rdma_core_auxiliary_dev *iadev;</div><div class='ctx'> </div><div class='del'>-	iadev = container_of(dev, struct iidc_auxiliary_dev, adev.dev);</div><div class='add'>+	iadev = container_of(dev, struct iidc_rdma_core_auxiliary_dev,</div><div class='add'>+			     adev.dev);</div><div class='ctx'> 	kfree(iadev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_plug_aux_dev - allocate and register AUX device</div><div class='ctx'>  * @pf: pointer to pf struct</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero on success, error code on failure</div><div class='ctx'>  */</div><div class='ctx'> int ice_plug_aux_dev(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	struct iidc_auxiliary_dev *iadev;</div><div class='add'>+	struct iidc_rdma_core_auxiliary_dev *iadev;</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev;</div><div class='ctx'> 	struct auxiliary_device *adev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -312,17 +304,22 @@ int ice_plug_aux_dev(struct ice_pf *pf)</div><div class='ctx'> 	if (!ice_is_rdma_ena(pf))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	cdev = pf-&gt;cdev_info;</div><div class='add'>+	if (!cdev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='ctx'> 	iadev = kzalloc(sizeof(*iadev), GFP_KERNEL);</div><div class='ctx'> 	if (!iadev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	adev = &amp;iadev-&gt;adev;</div><div class='del'>-	iadev-&gt;pf = pf;</div><div class='add'>+	iadev-&gt;cdev_info = cdev;</div><div class='ctx'> </div><div class='ctx'> 	adev-&gt;id = pf-&gt;aux_idx;</div><div class='ctx'> 	adev-&gt;dev.release = ice_adev_release;</div><div class='ctx'> 	adev-&gt;dev.parent = &amp;pf-&gt;pdev-&gt;dev;</div><div class='del'>-	adev-&gt;name = pf-&gt;rdma_mode &amp; IIDC_RDMA_PROTOCOL_ROCEV2 ? "roce" : "iwarp";</div><div class='add'>+	adev-&gt;name = cdev-&gt;rdma_protocol &amp; IIDC_RDMA_PROTOCOL_ROCEV2 ?</div><div class='add'>+		"roce" : "iwarp";</div><div class='ctx'> </div><div class='ctx'> 	ret = auxiliary_device_init(adev);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -337,8 +334,9 @@ int ice_plug_aux_dev(struct ice_pf *pf)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pf-&gt;adev_mutex);</div><div class='del'>-	pf-&gt;adev = adev;</div><div class='add'>+	cdev-&gt;adev = adev;</div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;adev_mutex);</div><div class='add'>+	set_bit(ICE_FLAG_AUX_DEV_CREATED, pf-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -350,15 +348,16 @@ void ice_unplug_aux_dev(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='ctx'> 	struct auxiliary_device *adev;</div><div class='ctx'> </div><div class='add'>+	if (!test_and_clear_bit(ICE_FLAG_AUX_DEV_CREATED, pf-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;pf-&gt;adev_mutex);</div><div class='del'>-	adev = pf-&gt;adev;</div><div class='del'>-	pf-&gt;adev = NULL;</div><div class='add'>+	adev = pf-&gt;cdev_info-&gt;adev;</div><div class='add'>+	pf-&gt;cdev_info-&gt;adev = NULL;</div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;adev_mutex);</div><div class='ctx'> </div><div class='del'>-	if (adev) {</div><div class='del'>-		auxiliary_device_delete(adev);</div><div class='del'>-		auxiliary_device_uninit(adev);</div><div class='del'>-	}</div><div class='add'>+	auxiliary_device_delete(adev);</div><div class='add'>+	auxiliary_device_uninit(adev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -367,7 +366,9 @@ void ice_unplug_aux_dev(struct ice_pf *pf)</div><div class='ctx'>  */</div><div class='ctx'> int ice_init_rdma(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='add'>+	struct iidc_rdma_priv_dev_info *privd;</div><div class='ctx'> 	struct device *dev = &amp;pf-&gt;pdev-&gt;dev;</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!ice_is_rdma_ena(pf)) {</div><div class='hunk'>@@ -375,30 +376,50 @@ int ice_init_rdma(struct ice_pf *pf)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);</div><div class='add'>+	if (!cdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pf-&gt;cdev_info = cdev;</div><div class='add'>+</div><div class='add'>+	privd = kzalloc(sizeof(*privd), GFP_KERNEL);</div><div class='add'>+	if (!privd) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_privd_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	privd-&gt;pf_id = pf-&gt;hw.pf_id;</div><div class='ctx'> 	ret = xa_alloc(&amp;ice_aux_id, &amp;pf-&gt;aux_idx, NULL, XA_LIMIT(1, INT_MAX),</div><div class='ctx'> 		       GFP_KERNEL);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "Failed to allocate device ID for AUX driver\n");</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_alloc_xa;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Reserve vector resources */</div><div class='del'>-	ret = ice_alloc_rdma_qvectors(pf);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_err(dev, "failed to reserve vectors for RDMA\n");</div><div class='del'>-		goto err_reserve_rdma_qvector;</div><div class='del'>-	}</div><div class='del'>-	pf-&gt;rdma_mode |= IIDC_RDMA_PROTOCOL_ROCEV2;</div><div class='add'>+	cdev-&gt;iidc_priv = privd;</div><div class='add'>+	privd-&gt;netdev = pf-&gt;vsi[0]-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	privd-&gt;hw_addr = (u8 __iomem *)pf-&gt;hw.hw_addr;</div><div class='add'>+	cdev-&gt;pdev = pf-&gt;pdev;</div><div class='add'>+	privd-&gt;vport_id = pf-&gt;vsi[0]-&gt;vsi_num;</div><div class='add'>+</div><div class='add'>+	pf-&gt;cdev_info-&gt;rdma_protocol |= IIDC_RDMA_PROTOCOL_ROCEV2;</div><div class='add'>+	ice_setup_dcb_qos_info(pf, &amp;privd-&gt;qos_info);</div><div class='ctx'> 	ret = ice_plug_aux_dev(pf);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_plug_aux_dev;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_plug_aux_dev:</div><div class='del'>-	ice_free_rdma_qvector(pf);</div><div class='del'>-err_reserve_rdma_qvector:</div><div class='del'>-	pf-&gt;adev = NULL;</div><div class='add'>+	pf-&gt;cdev_info-&gt;adev = NULL;</div><div class='ctx'> 	xa_erase(&amp;ice_aux_id, pf-&gt;aux_idx);</div><div class='add'>+err_alloc_xa:</div><div class='add'>+	kfree(privd);</div><div class='add'>+err_privd_alloc:</div><div class='add'>+	kfree(cdev);</div><div class='add'>+	pf-&gt;cdev_info = NULL;</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -412,6 +433,8 @@ void ice_deinit_rdma(struct ice_pf *pf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	ice_unplug_aux_dev(pf);</div><div class='del'>-	ice_free_rdma_qvector(pf);</div><div class='ctx'> 	xa_erase(&amp;ice_aux_id, pf-&gt;aux_idx);</div><div class='add'>+	kfree(pf-&gt;cdev_info-&gt;iidc_priv);</div><div class='add'>+	kfree(pf-&gt;cdev_info);</div><div class='add'>+	pf-&gt;cdev_info = NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_idc_int.h b/drivers/net/ethernet/intel/ice/ice_idc_int.h<br/>index 4b0c86757df9..17dbfcfb6a2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_idc_int.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_idc_int.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_idc_int.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_idc_int.h</a></div><div class='hunk'>@@ -4,10 +4,11 @@</div><div class='ctx'> #ifndef _ICE_IDC_INT_H_</div><div class='ctx'> #define _ICE_IDC_INT_H_</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/net/intel/iidc.h&gt;</div><div class='add'>+#include &lt;linux/net/intel/iidc_rdma.h&gt;</div><div class='add'>+#include &lt;linux/net/intel/iidc_rdma_ice.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct ice_pf;</div><div class='ctx'> </div><div class='del'>-void ice_send_event_to_aux(struct ice_pf *pf, struct iidc_event *event);</div><div class='add'>+void ice_send_event_to_aux(struct ice_pf *pf, struct iidc_rdma_event *event);</div><div class='ctx'> </div><div class='ctx'> #endif /* !_ICE_IDC_INT_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_irq.c b/drivers/net/ethernet/intel/ice/ice_irq.c<br/>index ad82ff7d1995..30801fd375f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_irq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_irq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_irq.c</a></div><div class='hunk'>@@ -20,6 +20,19 @@ ice_init_irq_tracker(struct ice_pf *pf, unsigned int max_vectors,</div><div class='ctx'> 	xa_init_flags(&amp;pf-&gt;irq_tracker.entries, XA_FLAGS_ALLOC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+ice_init_virt_irq_tracker(struct ice_pf *pf, u32 base, u32 num_entries)</div><div class='add'>+{</div><div class='add'>+	pf-&gt;virt_irq_tracker.bm = bitmap_zalloc(num_entries, GFP_KERNEL);</div><div class='add'>+	if (!pf-&gt;virt_irq_tracker.bm)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pf-&gt;virt_irq_tracker.num_entries = num_entries;</div><div class='add'>+	pf-&gt;virt_irq_tracker.base = base;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_deinit_irq_tracker - free xarray tracker</div><div class='ctx'>  * @pf: board private structure</div><div class='hunk'>@@ -29,6 +42,11 @@ static void ice_deinit_irq_tracker(struct ice_pf *pf)</div><div class='ctx'> 	xa_destroy(&amp;pf-&gt;irq_tracker.entries);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ice_deinit_virt_irq_tracker(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	bitmap_free(pf-&gt;virt_irq_tracker.bm);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_free_irq_res - free a block of resources</div><div class='ctx'>  * @pf: board private structure</div><div class='hunk'>@@ -45,7 +63,7 @@ static void ice_free_irq_res(struct ice_pf *pf, u16 index)</div><div class='ctx'> /**</div><div class='ctx'>  * ice_get_irq_res - get an interrupt resource</div><div class='ctx'>  * @pf: board private structure</div><div class='del'>- * @dyn_only: force entry to be dynamically allocated</div><div class='add'>+ * @dyn_allowed: allow entry to be dynamically allocated</div><div class='ctx'>  *</div><div class='ctx'>  * Allocate new irq entry in the free slot of the tracker. Since xarray</div><div class='ctx'>  * is used, always allocate new entry at the lowest possible index. Set</div><div class='hunk'>@@ -53,11 +71,12 @@ static void ice_free_irq_res(struct ice_pf *pf, u16 index)</div><div class='ctx'>  *</div><div class='ctx'>  * Returns allocated irq entry or NULL on failure.</div><div class='ctx'>  */</div><div class='del'>-static struct ice_irq_entry *ice_get_irq_res(struct ice_pf *pf, bool dyn_only)</div><div class='add'>+static struct ice_irq_entry *ice_get_irq_res(struct ice_pf *pf,</div><div class='add'>+					     bool dyn_allowed)</div><div class='ctx'> {</div><div class='del'>-	struct xa_limit limit = { .max = pf-&gt;irq_tracker.num_entries,</div><div class='add'>+	struct xa_limit limit = { .max = pf-&gt;irq_tracker.num_entries - 1,</div><div class='ctx'> 				  .min = 0 };</div><div class='del'>-	unsigned int num_static = pf-&gt;irq_tracker.num_static;</div><div class='add'>+	unsigned int num_static = pf-&gt;irq_tracker.num_static - 1;</div><div class='ctx'> 	struct ice_irq_entry *entry;</div><div class='ctx'> 	unsigned int index;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -66,9 +85,9 @@ static struct ice_irq_entry *ice_get_irq_res(struct ice_pf *pf, bool dyn_only)</div><div class='ctx'> 	if (!entry)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	/* skip preallocated entries if the caller says so */</div><div class='del'>-	if (dyn_only)</div><div class='del'>-		limit.min = num_static;</div><div class='add'>+	/* only already allocated if the caller says so */</div><div class='add'>+	if (!dyn_allowed)</div><div class='add'>+		limit.max = num_static;</div><div class='ctx'> </div><div class='ctx'> 	ret = xa_alloc(&amp;pf-&gt;irq_tracker.entries, &amp;index, entry, limit,</div><div class='ctx'> 		       GFP_KERNEL);</div><div class='hunk'>@@ -78,161 +97,18 @@ static struct ice_irq_entry *ice_get_irq_res(struct ice_pf *pf, bool dyn_only)</div><div class='ctx'> 		entry = NULL;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		entry-&gt;index = index;</div><div class='del'>-		entry-&gt;dynamic = index &gt;= num_static;</div><div class='add'>+		entry-&gt;dynamic = index &gt; num_static;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return entry;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_reduce_msix_usage - Reduce usage of MSI-X vectors</div><div class='del'>- * @pf: board private structure</div><div class='del'>- * @v_remain: number of remaining MSI-X vectors to be distributed</div><div class='del'>- *</div><div class='del'>- * Reduce the usage of MSI-X vectors when entire request cannot be fulfilled.</div><div class='del'>- * pf-&gt;num_lan_msix and pf-&gt;num_rdma_msix values are set based on number of</div><div class='del'>- * remaining vectors.</div><div class='del'>- */</div><div class='del'>-static void ice_reduce_msix_usage(struct ice_pf *pf, int v_remain)</div><div class='del'>-{</div><div class='del'>-	int v_rdma;</div><div class='del'>-</div><div class='del'>-	if (!ice_is_rdma_ena(pf)) {</div><div class='del'>-		pf-&gt;num_lan_msix = v_remain;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* RDMA needs at least 1 interrupt in addition to AEQ MSIX */</div><div class='del'>-	v_rdma = ICE_RDMA_NUM_AEQ_MSIX + 1;</div><div class='del'>-</div><div class='del'>-	if (v_remain &lt; ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_RDMA_MSIX) {</div><div class='del'>-		dev_warn(ice_pf_to_dev(pf), "Not enough MSI-X vectors to support RDMA.\n");</div><div class='del'>-		clear_bit(ICE_FLAG_RDMA_ENA, pf-&gt;flags);</div><div class='del'>-</div><div class='del'>-		pf-&gt;num_rdma_msix = 0;</div><div class='del'>-		pf-&gt;num_lan_msix = ICE_MIN_LAN_TXRX_MSIX;</div><div class='del'>-	} else if ((v_remain &lt; ICE_MIN_LAN_TXRX_MSIX + v_rdma) ||</div><div class='del'>-		   (v_remain - v_rdma &lt; v_rdma)) {</div><div class='del'>-		/* Support minimum RDMA and give remaining vectors to LAN MSIX</div><div class='del'>-		 */</div><div class='del'>-		pf-&gt;num_rdma_msix = ICE_MIN_RDMA_MSIX;</div><div class='del'>-		pf-&gt;num_lan_msix = v_remain - ICE_MIN_RDMA_MSIX;</div><div class='del'>-	} else {</div><div class='del'>-		/* Split remaining MSIX with RDMA after accounting for AEQ MSIX</div><div class='del'>-		 */</div><div class='del'>-		pf-&gt;num_rdma_msix = (v_remain - ICE_RDMA_NUM_AEQ_MSIX) / 2 +</div><div class='del'>-				    ICE_RDMA_NUM_AEQ_MSIX;</div><div class='del'>-		pf-&gt;num_lan_msix = v_remain - pf-&gt;num_rdma_msix;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_ena_msix_range - Request a range of MSIX vectors from the OS</div><div class='del'>- * @pf: board private structure</div><div class='del'>- *</div><div class='del'>- * Compute the number of MSIX vectors wanted and request from the OS. Adjust</div><div class='del'>- * device usage if there are not enough vectors. Return the number of vectors</div><div class='del'>- * reserved or negative on failure.</div><div class='del'>- */</div><div class='del'>-static int ice_ena_msix_range(struct ice_pf *pf)</div><div class='add'>+#define ICE_RDMA_AEQ_MSIX 1</div><div class='add'>+static int ice_get_default_msix_amount(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	int num_cpus, hw_num_msix, v_other, v_wanted, v_actual;</div><div class='del'>-	struct device *dev = ice_pf_to_dev(pf);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	hw_num_msix = pf-&gt;hw.func_caps.common_cap.num_msix_vectors;</div><div class='del'>-	num_cpus = num_online_cpus();</div><div class='del'>-</div><div class='del'>-	/* LAN miscellaneous handler */</div><div class='del'>-	v_other = ICE_MIN_LAN_OICR_MSIX;</div><div class='del'>-</div><div class='del'>-	/* Flow Director */</div><div class='del'>-	if (test_bit(ICE_FLAG_FD_ENA, pf-&gt;flags))</div><div class='del'>-		v_other += ICE_FDIR_MSIX;</div><div class='del'>-</div><div class='del'>-	/* switchdev */</div><div class='del'>-	v_other += ICE_ESWITCH_MSIX;</div><div class='del'>-</div><div class='del'>-	v_wanted = v_other;</div><div class='del'>-</div><div class='del'>-	/* LAN traffic */</div><div class='del'>-	pf-&gt;num_lan_msix = num_cpus;</div><div class='del'>-	v_wanted += pf-&gt;num_lan_msix;</div><div class='del'>-</div><div class='del'>-	/* RDMA auxiliary driver */</div><div class='del'>-	if (ice_is_rdma_ena(pf)) {</div><div class='del'>-		pf-&gt;num_rdma_msix = num_cpus + ICE_RDMA_NUM_AEQ_MSIX;</div><div class='del'>-		v_wanted += pf-&gt;num_rdma_msix;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (v_wanted &gt; hw_num_msix) {</div><div class='del'>-		int v_remain;</div><div class='del'>-</div><div class='del'>-		dev_warn(dev, "not enough device MSI-X vectors. wanted = %d, available = %d\n",</div><div class='del'>-			 v_wanted, hw_num_msix);</div><div class='del'>-</div><div class='del'>-		if (hw_num_msix &lt; ICE_MIN_MSIX) {</div><div class='del'>-			err = -ERANGE;</div><div class='del'>-			goto exit_err;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		v_remain = hw_num_msix - v_other;</div><div class='del'>-		if (v_remain &lt; ICE_MIN_LAN_TXRX_MSIX) {</div><div class='del'>-			v_other = ICE_MIN_MSIX - ICE_MIN_LAN_TXRX_MSIX;</div><div class='del'>-			v_remain = ICE_MIN_LAN_TXRX_MSIX;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ice_reduce_msix_usage(pf, v_remain);</div><div class='del'>-		v_wanted = pf-&gt;num_lan_msix + pf-&gt;num_rdma_msix + v_other;</div><div class='del'>-</div><div class='del'>-		dev_notice(dev, "Reducing request to %d MSI-X vectors for LAN traffic.\n",</div><div class='del'>-			   pf-&gt;num_lan_msix);</div><div class='del'>-		if (ice_is_rdma_ena(pf))</div><div class='del'>-			dev_notice(dev, "Reducing request to %d MSI-X vectors for RDMA.\n",</div><div class='del'>-				   pf-&gt;num_rdma_msix);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* actually reserve the vectors */</div><div class='del'>-	v_actual = pci_alloc_irq_vectors(pf-&gt;pdev, ICE_MIN_MSIX, v_wanted,</div><div class='del'>-					 PCI_IRQ_MSIX);</div><div class='del'>-	if (v_actual &lt; 0) {</div><div class='del'>-		dev_err(dev, "unable to reserve MSI-X vectors\n");</div><div class='del'>-		err = v_actual;</div><div class='del'>-		goto exit_err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (v_actual &lt; v_wanted) {</div><div class='del'>-		dev_warn(dev, "not enough OS MSI-X vectors. requested = %d, obtained = %d\n",</div><div class='del'>-			 v_wanted, v_actual);</div><div class='del'>-</div><div class='del'>-		if (v_actual &lt; ICE_MIN_MSIX) {</div><div class='del'>-			/* error if we can't get minimum vectors */</div><div class='del'>-			pci_free_irq_vectors(pf-&gt;pdev);</div><div class='del'>-			err = -ERANGE;</div><div class='del'>-			goto exit_err;</div><div class='del'>-		} else {</div><div class='del'>-			int v_remain = v_actual - v_other;</div><div class='del'>-</div><div class='del'>-			if (v_remain &lt; ICE_MIN_LAN_TXRX_MSIX)</div><div class='del'>-				v_remain = ICE_MIN_LAN_TXRX_MSIX;</div><div class='del'>-</div><div class='del'>-			ice_reduce_msix_usage(pf, v_remain);</div><div class='del'>-</div><div class='del'>-			dev_notice(dev, "Enabled %d MSI-X vectors for LAN traffic.\n",</div><div class='del'>-				   pf-&gt;num_lan_msix);</div><div class='del'>-</div><div class='del'>-			if (ice_is_rdma_ena(pf))</div><div class='del'>-				dev_notice(dev, "Enabled %d MSI-X vectors for RDMA.\n",</div><div class='del'>-					   pf-&gt;num_rdma_msix);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return v_actual;</div><div class='del'>-</div><div class='del'>-exit_err:</div><div class='del'>-	pf-&gt;num_rdma_msix = 0;</div><div class='del'>-	pf-&gt;num_lan_msix = 0;</div><div class='del'>-	return err;</div><div class='add'>+	return ICE_MIN_LAN_OICR_MSIX + num_online_cpus() +</div><div class='add'>+	       (test_bit(ICE_FLAG_FD_ENA, pf-&gt;flags) ? ICE_FDIR_MSIX : 0) +</div><div class='add'>+	       (ice_is_rdma_ena(pf) ? num_online_cpus() + ICE_RDMA_AEQ_MSIX : 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -243,6 +119,7 @@ void ice_clear_interrupt_scheme(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='ctx'> 	pci_free_irq_vectors(pf-&gt;pdev);</div><div class='ctx'> 	ice_deinit_irq_tracker(pf);</div><div class='add'>+	ice_deinit_virt_irq_tracker(pf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -252,27 +129,38 @@ void ice_clear_interrupt_scheme(struct ice_pf *pf)</div><div class='ctx'> int ice_init_interrupt_scheme(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='ctx'> 	int total_vectors = pf-&gt;hw.func_caps.common_cap.num_msix_vectors;</div><div class='del'>-	int vectors, max_vectors;</div><div class='add'>+	int vectors;</div><div class='ctx'> </div><div class='del'>-	vectors = ice_ena_msix_range(pf);</div><div class='add'>+	/* load default PF MSI-X range */</div><div class='add'>+	if (!pf-&gt;msix.min)</div><div class='add'>+		pf-&gt;msix.min = ICE_MIN_MSIX;</div><div class='ctx'> </div><div class='del'>-	if (vectors &lt; 0)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (!pf-&gt;msix.max)</div><div class='add'>+		pf-&gt;msix.max = min(total_vectors,</div><div class='add'>+				   ice_get_default_msix_amount(pf));</div><div class='add'>+</div><div class='add'>+	pf-&gt;msix.total = total_vectors;</div><div class='add'>+	pf-&gt;msix.rest = total_vectors - pf-&gt;msix.max;</div><div class='ctx'> </div><div class='ctx'> 	if (pci_msix_can_alloc_dyn(pf-&gt;pdev))</div><div class='del'>-		max_vectors = total_vectors;</div><div class='add'>+		vectors = pf-&gt;msix.min;</div><div class='ctx'> 	else</div><div class='del'>-		max_vectors = vectors;</div><div class='add'>+		vectors = pf-&gt;msix.max;</div><div class='add'>+</div><div class='add'>+	vectors = pci_alloc_irq_vectors(pf-&gt;pdev, pf-&gt;msix.min, vectors,</div><div class='add'>+					PCI_IRQ_MSIX);</div><div class='add'>+	if (vectors &lt; 0)</div><div class='add'>+		return vectors;</div><div class='ctx'> </div><div class='del'>-	ice_init_irq_tracker(pf, max_vectors, vectors);</div><div class='add'>+	ice_init_irq_tracker(pf, pf-&gt;msix.max, vectors);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ice_init_virt_irq_tracker(pf, pf-&gt;msix.max, pf-&gt;msix.rest);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_alloc_irq - Allocate new interrupt vector</div><div class='ctx'>  * @pf: board private structure</div><div class='del'>- * @dyn_only: force dynamic allocation of the interrupt</div><div class='add'>+ * @dyn_allowed: allow dynamic allocation of the interrupt</div><div class='ctx'>  *</div><div class='ctx'>  * Allocate new interrupt vector for a given owner id.</div><div class='ctx'>  * return struct msi_map with interrupt details and track</div><div class='hunk'>@@ -285,27 +173,22 @@ int ice_init_interrupt_scheme(struct ice_pf *pf)</div><div class='ctx'>  * interrupt will be allocated with pci_msix_alloc_irq_at.</div><div class='ctx'>  *</div><div class='ctx'>  * Some callers may only support dynamically allocated interrupts.</div><div class='del'>- * This is indicated with dyn_only flag.</div><div class='add'>+ * This is indicated with dyn_allowed flag.</div><div class='ctx'>  *</div><div class='ctx'>  * On failure, return map with negative .index. The caller</div><div class='ctx'>  * is expected to check returned map index.</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='del'>-struct msi_map ice_alloc_irq(struct ice_pf *pf, bool dyn_only)</div><div class='add'>+struct msi_map ice_alloc_irq(struct ice_pf *pf, bool dyn_allowed)</div><div class='ctx'> {</div><div class='del'>-	int sriov_base_vector = pf-&gt;sriov_base_vector;</div><div class='ctx'> 	struct msi_map map = { .index = -ENOENT };</div><div class='ctx'> 	struct device *dev = ice_pf_to_dev(pf);</div><div class='ctx'> 	struct ice_irq_entry *entry;</div><div class='ctx'> </div><div class='del'>-	entry = ice_get_irq_res(pf, dyn_only);</div><div class='add'>+	entry = ice_get_irq_res(pf, dyn_allowed);</div><div class='ctx'> 	if (!entry)</div><div class='ctx'> 		return map;</div><div class='ctx'> </div><div class='del'>-	/* fail if we're about to violate SRIOV vectors space */</div><div class='del'>-	if (sriov_base_vector &amp;&amp; entry-&gt;index &gt;= sriov_base_vector)</div><div class='del'>-		goto exit_free_res;</div><div class='del'>-</div><div class='ctx'> 	if (pci_msix_can_alloc_dyn(pf-&gt;pdev) &amp;&amp; entry-&gt;dynamic) {</div><div class='ctx'> 		map = pci_msix_alloc_irq_at(pf-&gt;pdev, entry-&gt;index, NULL);</div><div class='ctx'> 		if (map.index &lt; 0)</div><div class='hunk'>@@ -353,26 +236,40 @@ void ice_free_irq(struct ice_pf *pf, struct msi_map map)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_get_max_used_msix_vector - Get the max used interrupt vector</div><div class='del'>- * @pf: board private structure</div><div class='add'>+ * ice_virt_get_irqs - get irqs for SR-IOV usacase</div><div class='add'>+ * @pf: pointer to PF structure</div><div class='add'>+ * @needed: number of irqs to get</div><div class='ctx'>  *</div><div class='del'>- * Return index of maximum used interrupt vectors with respect to the</div><div class='del'>- * beginning of the MSIX table. Take into account that some interrupts</div><div class='del'>- * may have been dynamically allocated after MSIX was initially enabled.</div><div class='add'>+ * This returns the first MSI-X vector index in PF space that is used by this</div><div class='add'>+ * VF. This index is used when accessing PF relative registers such as</div><div class='add'>+ * GLINT_VECT2FUNC and GLINT_DYN_CTL.</div><div class='add'>+ * This will always be the OICR index in the AVF driver so any functionality</div><div class='add'>+ * using vf-&gt;first_vector_idx for queue configuration_id: id of VF which will</div><div class='add'>+ * use this irqs</div><div class='ctx'>  */</div><div class='del'>-int ice_get_max_used_msix_vector(struct ice_pf *pf)</div><div class='add'>+int ice_virt_get_irqs(struct ice_pf *pf, u32 needed)</div><div class='ctx'> {</div><div class='del'>-	unsigned long start, index, max_idx;</div><div class='del'>-	void *entry;</div><div class='add'>+	int res = bitmap_find_next_zero_area(pf-&gt;virt_irq_tracker.bm,</div><div class='add'>+					     pf-&gt;virt_irq_tracker.num_entries,</div><div class='add'>+					     0, needed, 0);</div><div class='ctx'> </div><div class='del'>-	/* Treat all preallocated interrupts as used */</div><div class='del'>-	start = pf-&gt;irq_tracker.num_static;</div><div class='del'>-	max_idx = start - 1;</div><div class='add'>+	if (res &gt;= pf-&gt;virt_irq_tracker.num_entries)</div><div class='add'>+		return -ENOENT;</div><div class='ctx'> </div><div class='del'>-	xa_for_each_start(&amp;pf-&gt;irq_tracker.entries, index, entry, start) {</div><div class='del'>-		if (index &gt; max_idx)</div><div class='del'>-			max_idx = index;</div><div class='del'>-	}</div><div class='add'>+	bitmap_set(pf-&gt;virt_irq_tracker.bm, res, needed);</div><div class='add'>+</div><div class='add'>+	/* conversion from number in bitmap to global irq index */</div><div class='add'>+	return res + pf-&gt;virt_irq_tracker.base;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return max_idx;</div><div class='add'>+/**</div><div class='add'>+ * ice_virt_free_irqs - free irqs used by the VF</div><div class='add'>+ * @pf: pointer to PF structure</div><div class='add'>+ * @index: first index to be free</div><div class='add'>+ * @irqs: number of irqs to free</div><div class='add'>+ */</div><div class='add'>+void ice_virt_free_irqs(struct ice_pf *pf, u32 index, u32 irqs)</div><div class='add'>+{</div><div class='add'>+	bitmap_clear(pf-&gt;virt_irq_tracker.bm, index - pf-&gt;virt_irq_tracker.base,</div><div class='add'>+		     irqs);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_irq.h b/drivers/net/ethernet/intel/ice/ice_irq.h<br/>index f35efc08575e..b2f9dbafd57e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_irq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_irq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_irq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_irq.h</a></div><div class='hunk'>@@ -15,11 +15,22 @@ struct ice_irq_tracker {</div><div class='ctx'> 	u16 num_static;	/* preallocated entries */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ice_virt_irq_tracker {</div><div class='add'>+	unsigned long *bm;	/* bitmap to track irq usage */</div><div class='add'>+	u32 num_entries;</div><div class='add'>+	/* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the</div><div class='add'>+	 * number of MSIX vectors needed for all SR-IOV VFs from the number of</div><div class='add'>+	 * MSIX vectors allowed on this PF.</div><div class='add'>+	 */</div><div class='add'>+	u32 base;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int ice_init_interrupt_scheme(struct ice_pf *pf);</div><div class='ctx'> void ice_clear_interrupt_scheme(struct ice_pf *pf);</div><div class='ctx'> </div><div class='ctx'> struct msi_map ice_alloc_irq(struct ice_pf *pf, bool dyn_only);</div><div class='ctx'> void ice_free_irq(struct ice_pf *pf, struct msi_map map);</div><div class='del'>-int ice_get_max_used_msix_vector(struct ice_pf *pf);</div><div class='ctx'> </div><div class='add'>+int ice_virt_get_irqs(struct ice_pf *pf, u32 needed);</div><div class='add'>+void ice_virt_free_irqs(struct ice_pf *pf, u32 index, u32 irqs);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_lag.c b/drivers/net/ethernet/intel/ice/ice_lag.c<br/>index 1ccb572ce285..d2576d606e10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_lag.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_lag.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_lag.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_lag.c</a></div><div class='hunk'>@@ -10,12 +10,17 @@</div><div class='ctx'> #define ICE_LAG_RES_SHARED	BIT(14)</div><div class='ctx'> #define ICE_LAG_RES_VALID	BIT(15)</div><div class='ctx'> </div><div class='del'>-#define LACP_TRAIN_PKT_LEN		16</div><div class='del'>-static const u8 lacp_train_pkt[LACP_TRAIN_PKT_LEN] = { 0, 0, 0, 0, 0, 0,</div><div class='del'>-						       0, 0, 0, 0, 0, 0,</div><div class='del'>-						       0x88, 0x09, 0, 0 };</div><div class='add'>+#define ICE_TRAIN_PKT_LEN		16</div><div class='add'>+static const u8 lacp_train_pkt[ICE_TRAIN_PKT_LEN] = { 0, 0, 0, 0, 0, 0,</div><div class='add'>+						      0, 0, 0, 0, 0, 0,</div><div class='add'>+						      0x88, 0x09, 0, 0 };</div><div class='add'>+static const u8 act_act_train_pkt[ICE_TRAIN_PKT_LEN] = { 0, 0, 0, 0, 0, 0,</div><div class='add'>+							 0, 0, 0, 0, 0, 0,</div><div class='add'>+							 0, 0, 0, 0 };</div><div class='ctx'> </div><div class='ctx'> #define ICE_RECIPE_LEN			64</div><div class='add'>+#define ICE_LAG_SRIOV_CP_RECIPE		10</div><div class='add'>+</div><div class='ctx'> static const u8 ice_dflt_vsi_rcp[ICE_RECIPE_LEN] = {</div><div class='ctx'> 	0x05, 0, 0, 0, 0x20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,</div><div class='ctx'> 	0x85, 0, 0x01, 0, 0, 0, 0xff, 0xff, 0x08, 0, 0, 0, 0, 0, 0, 0,</div><div class='hunk'>@@ -46,10 +51,10 @@ static void ice_lag_set_primary(struct ice_lag *lag)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_lag_set_backup - set PF LAG state to Backup</div><div class='add'>+ * ice_lag_set_bkup - set PF LAG state to Backup</div><div class='ctx'>  * @lag: LAG info struct</div><div class='ctx'>  */</div><div class='del'>-static void ice_lag_set_backup(struct ice_lag *lag)</div><div class='add'>+static void ice_lag_set_bkup(struct ice_lag *lag)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = lag-&gt;pf;</div><div class='ctx'> </div><div class='hunk'>@@ -99,6 +104,28 @@ static bool netif_is_same_ice(struct ice_pf *pf, struct net_device *netdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_lag_config_eswitch - configure eswitch to work with LAG</div><div class='add'>+ * @lag: lag info struct</div><div class='add'>+ * @netdev: active network interface device struct</div><div class='add'>+ *</div><div class='add'>+ * Updates all port representors in eswitch to use @netdev for Tx.</div><div class='add'>+ *</div><div class='add'>+ * Configures the netdev to keep dst metadata (also used in representor Tx).</div><div class='add'>+ * This is required for an uplink without switchdev mode configured.</div><div class='add'>+ */</div><div class='add'>+static void ice_lag_config_eswitch(struct ice_lag *lag,</div><div class='add'>+				   struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct ice_repr *repr;</div><div class='add'>+	unsigned long id;</div><div class='add'>+</div><div class='add'>+	xa_for_each(&amp;lag-&gt;pf-&gt;eswitch.reprs, id, repr)</div><div class='add'>+		repr-&gt;dst-&gt;u.port_info.lower_dev = netdev;</div><div class='add'>+</div><div class='add'>+	netif_keep_dst(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_netdev_to_lag - return pointer to associated lag struct from netdev</div><div class='ctx'>  * @netdev: pointer to net_device struct to query</div><div class='ctx'>  */</div><div class='hunk'>@@ -210,13 +237,12 @@ ice_lag_cfg_fltr(struct ice_lag *lag, u32 act, u16 recipe_id, u16 *rule_idx,</div><div class='ctx'> 		 u8 direction, bool add)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_sw_rule_lkup_rx_tx *s_rule;</div><div class='add'>+	struct ice_hw *hw = &amp;lag-&gt;pf-&gt;hw;</div><div class='ctx'> 	u16 s_rule_sz, vsi_num;</div><div class='del'>-	struct ice_hw *hw;</div><div class='ctx'> 	u8 *eth_hdr;</div><div class='ctx'> 	u32 opc;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	hw = &amp;lag-&gt;pf-&gt;hw;</div><div class='ctx'> 	vsi_num = ice_get_hw_vsi_num(hw, 0);</div><div class='ctx'> </div><div class='ctx'> 	s_rule_sz = ICE_SW_RULE_RX_TX_ETH_HDR_SIZE(s_rule);</div><div class='hunk'>@@ -314,26 +340,15 @@ ice_lag_cfg_drop_fltr(struct ice_lag *lag, bool add)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_lag_cfg_pf_fltrs - set filters up for new active port</div><div class='add'>+ * ice_lag_cfg_pf_fltrs_act_bkup - set filters up for new active port</div><div class='ctx'>  * @lag: local interfaces lag struct</div><div class='del'>- * @ptr: opaque data containing notifier event</div><div class='add'>+ * @bonding_info: netdev event bonding info</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-ice_lag_cfg_pf_fltrs(struct ice_lag *lag, void *ptr)</div><div class='add'>+ice_lag_cfg_pf_fltrs_act_bkup(struct ice_lag *lag,</div><div class='add'>+			      struct netdev_bonding_info *bonding_info)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_notifier_bonding_info *info;</div><div class='del'>-	struct netdev_bonding_info *bonding_info;</div><div class='del'>-	struct net_device *event_netdev;</div><div class='del'>-	struct device *dev;</div><div class='del'>-</div><div class='del'>-	event_netdev = netdev_notifier_info_to_dev(ptr);</div><div class='del'>-	/* not for this netdev */</div><div class='del'>-	if (event_netdev != lag-&gt;netdev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	info = (struct netdev_notifier_bonding_info *)ptr;</div><div class='del'>-	bonding_info = &amp;info-&gt;bonding_info;</div><div class='del'>-	dev = ice_pf_to_dev(lag-&gt;pf);</div><div class='add'>+	struct device *dev = ice_pf_to_dev(lag-&gt;pf);</div><div class='ctx'> </div><div class='ctx'> 	/* interface not active - remove old default VSI rule */</div><div class='ctx'> 	if (bonding_info-&gt;slave.state &amp;&amp; lag-&gt;pf_rx_rule_id) {</div><div class='hunk'>@@ -354,6 +369,105 @@ ice_lag_cfg_pf_fltrs(struct ice_lag *lag, void *ptr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_lag_cfg_lp_fltr - configure lport filters</div><div class='add'>+ * @lag: local interface's lag struct</div><div class='add'>+ * @add: add or remove rule</div><div class='add'>+ * @cp: control packet only or general PF lport rule</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+ice_lag_cfg_lp_fltr(struct ice_lag *lag, bool add, bool cp)</div><div class='add'>+{</div><div class='add'>+	struct ice_sw_rule_lkup_rx_tx *s_rule;</div><div class='add'>+	struct ice_vsi *vsi = lag-&gt;pf-&gt;vsi[0];</div><div class='add'>+	u16 buf_len, opc;</div><div class='add'>+</div><div class='add'>+	buf_len = ICE_SW_RULE_RX_TX_HDR_SIZE(s_rule, ICE_TRAIN_PKT_LEN);</div><div class='add'>+	s_rule = kzalloc(buf_len, GFP_KERNEL);</div><div class='add'>+	if (!s_rule) {</div><div class='add'>+		netdev_warn(lag-&gt;netdev, "-ENOMEM error configuring CP filter\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (add) {</div><div class='add'>+		if (cp) {</div><div class='add'>+			s_rule-&gt;recipe_id =</div><div class='add'>+				cpu_to_le16(ICE_LAG_SRIOV_CP_RECIPE);</div><div class='add'>+			memcpy(s_rule-&gt;hdr_data, lacp_train_pkt,</div><div class='add'>+			       ICE_TRAIN_PKT_LEN);</div><div class='add'>+		} else {</div><div class='add'>+			s_rule-&gt;recipe_id = cpu_to_le16(lag-&gt;act_act_recipe);</div><div class='add'>+			memcpy(s_rule-&gt;hdr_data, act_act_train_pkt,</div><div class='add'>+			       ICE_TRAIN_PKT_LEN);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		s_rule-&gt;src = cpu_to_le16(vsi-&gt;port_info-&gt;lport);</div><div class='add'>+		s_rule-&gt;act = cpu_to_le32(ICE_FWD_TO_VSI |</div><div class='add'>+					  ICE_SINGLE_ACT_LAN_ENABLE |</div><div class='add'>+					  ICE_SINGLE_ACT_VALID_BIT |</div><div class='add'>+					  FIELD_PREP(ICE_SINGLE_ACT_VSI_ID_M,</div><div class='add'>+						     vsi-&gt;vsi_num));</div><div class='add'>+		s_rule-&gt;hdr_len = cpu_to_le16(ICE_TRAIN_PKT_LEN);</div><div class='add'>+		s_rule-&gt;hdr.type = cpu_to_le16(ICE_AQC_SW_RULES_T_LKUP_RX);</div><div class='add'>+		opc = ice_aqc_opc_add_sw_rules;</div><div class='add'>+	} else {</div><div class='add'>+		opc = ice_aqc_opc_remove_sw_rules;</div><div class='add'>+		if (cp)</div><div class='add'>+			s_rule-&gt;index = cpu_to_le16(lag-&gt;cp_rule_idx);</div><div class='add'>+		else</div><div class='add'>+			s_rule-&gt;index = cpu_to_le16(lag-&gt;act_act_rule_idx);</div><div class='add'>+	}</div><div class='add'>+	if (ice_aq_sw_rules(&amp;lag-&gt;pf-&gt;hw, s_rule, buf_len, 1, opc, NULL)) {</div><div class='add'>+		netdev_warn(lag-&gt;netdev, "Error %s %s rule for aggregate\n",</div><div class='add'>+			    add ? "ADDING" : "REMOVING",</div><div class='add'>+			    cp ? "CONTROL PACKET" : "LPORT");</div><div class='add'>+		goto err_cp_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (add) {</div><div class='add'>+		if (cp)</div><div class='add'>+			lag-&gt;cp_rule_idx = le16_to_cpu(s_rule-&gt;index);</div><div class='add'>+		else</div><div class='add'>+			lag-&gt;act_act_rule_idx = le16_to_cpu(s_rule-&gt;index);</div><div class='add'>+	} else {</div><div class='add'>+		if (cp)</div><div class='add'>+			lag-&gt;cp_rule_idx = 0;</div><div class='add'>+		else</div><div class='add'>+			lag-&gt;act_act_rule_idx = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_cp_free:</div><div class='add'>+	kfree(s_rule);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_lag_cfg_pf_fltrs - set filters up for PF traffic</div><div class='add'>+ * @lag: local interfaces lag struct</div><div class='add'>+ * @ptr: opaque data containing notifier event</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+ice_lag_cfg_pf_fltrs(struct ice_lag *lag, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct netdev_notifier_bonding_info *info = ptr;</div><div class='add'>+	struct netdev_bonding_info *bonding_info;</div><div class='add'>+	struct net_device *event_netdev;</div><div class='add'>+</div><div class='add'>+	event_netdev = netdev_notifier_info_to_dev(ptr);</div><div class='add'>+	if (event_netdev != lag-&gt;netdev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bonding_info = &amp;info-&gt;bonding_info;</div><div class='add'>+</div><div class='add'>+	if (lag-&gt;bond_aa) {</div><div class='add'>+		if (lag-&gt;need_fltr_cfg) {</div><div class='add'>+			ice_lag_cfg_lp_fltr(lag, true, false);</div><div class='add'>+			lag-&gt;need_fltr_cfg = false;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		ice_lag_cfg_pf_fltrs_act_bkup(lag, bonding_info);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_display_lag_info - print LAG info</div><div class='ctx'>  * @lag: LAG info struct</div><div class='ctx'>  */</div><div class='hunk'>@@ -402,12 +516,11 @@ static u16</div><div class='ctx'> ice_lag_qbuf_recfg(struct ice_hw *hw, struct ice_aqc_cfg_txqs_buf *qbuf,</div><div class='ctx'> 		   u16 vsi_num, u16 numq, u8 tc)</div><div class='ctx'> {</div><div class='add'>+	struct ice_pf *pf = hw-&gt;back;</div><div class='ctx'> 	struct ice_q_ctx *q_ctx;</div><div class='ctx'> 	u16 qid, count = 0;</div><div class='del'>-	struct ice_pf *pf;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	pf = hw-&gt;back;</div><div class='ctx'> 	for (i = 0; i &lt; numq; i++) {</div><div class='ctx'> 		q_ctx = ice_get_lan_q_ctx(hw, vsi_num, tc, i);</div><div class='ctx'> 		if (!q_ctx) {</div><div class='hunk'>@@ -577,7 +690,7 @@ ice_lag_move_vf_node_tc(struct ice_lag *lag, u8 oldport, u8 newport,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ice_aq_cfg_lan_txq(&amp;lag-&gt;pf-&gt;hw, qbuf, qbuf_size, valq, oldport,</div><div class='del'>-			       newport, NULL)) {</div><div class='add'>+			       newport, ICE_AQC_Q_CFG_TC_CHNG, NULL)) {</div><div class='ctx'> 		dev_warn(dev, "Failure to configure queues for LAG failover\n");</div><div class='ctx'> 		goto qbuf_err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -677,54 +790,6 @@ ice_lag_move_single_vf_nodes(struct ice_lag *lag, u8 oldport, u8 newport,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_lag_move_new_vf_nodes - Move Tx scheduling nodes for a VF if required</div><div class='del'>- * @vf: the VF to move Tx nodes for</div><div class='del'>- *</div><div class='del'>- * Called just after configuring new VF queues. Check whether the VF Tx</div><div class='del'>- * scheduling nodes need to be updated to fail over to the active port. If so,</div><div class='del'>- * move them now.</div><div class='del'>- */</div><div class='del'>-void ice_lag_move_new_vf_nodes(struct ice_vf *vf)</div><div class='del'>-{</div><div class='del'>-	struct ice_lag_netdev_list ndlist;</div><div class='del'>-	u8 pri_port, act_port;</div><div class='del'>-	struct ice_lag *lag;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-	struct ice_pf *pf;</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-</div><div class='del'>-	if (WARN_ON(!vsi))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (WARN_ON(vsi-&gt;type != ICE_VSI_VF))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	pf = vf-&gt;pf;</div><div class='del'>-	lag = pf-&gt;lag;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;pf-&gt;lag_mutex);</div><div class='del'>-	if (!lag-&gt;bonded)</div><div class='del'>-		goto new_vf_unlock;</div><div class='del'>-</div><div class='del'>-	pri_port = pf-&gt;hw.port_info-&gt;lport;</div><div class='del'>-	act_port = lag-&gt;active_port;</div><div class='del'>-</div><div class='del'>-	if (lag-&gt;upper_netdev)</div><div class='del'>-		ice_lag_build_netdev_list(lag, &amp;ndlist);</div><div class='del'>-</div><div class='del'>-	if (ice_is_feature_supported(pf, ICE_F_SRIOV_LAG) &amp;&amp;</div><div class='del'>-	    lag-&gt;bonded &amp;&amp; lag-&gt;primary &amp;&amp; pri_port != act_port &amp;&amp;</div><div class='del'>-	    !list_empty(lag-&gt;netdev_head))</div><div class='del'>-		ice_lag_move_single_vf_nodes(lag, pri_port, act_port, vsi-&gt;idx);</div><div class='del'>-</div><div class='del'>-	ice_lag_destroy_netdev_list(lag, &amp;ndlist);</div><div class='del'>-</div><div class='del'>-new_vf_unlock:</div><div class='del'>-	mutex_unlock(&amp;pf-&gt;lag_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_lag_move_vf_nodes - move Tx scheduling nodes for all VFs to new port</div><div class='ctx'>  * @lag: lag info struct</div><div class='ctx'>  * @oldport: lport of previous interface</div><div class='hunk'>@@ -767,59 +832,60 @@ void ice_lag_move_vf_nodes_cfg(struct ice_lag *lag, u8 src_prt, u8 dst_prt)</div><div class='ctx'> 	ice_lag_destroy_netdev_list(lag, &amp;ndlist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define ICE_LAG_SRIOV_CP_RECIPE		10</div><div class='del'>-#define ICE_LAG_SRIOV_TRAIN_PKT_LEN	16</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * ice_lag_cfg_cp_fltr - configure filter for control packets</div><div class='del'>- * @lag: local interface's lag struct</div><div class='del'>- * @add: add or remove rule</div><div class='add'>+ * ice_lag_prepare_vf_reset - helper to adjust vf lag for reset</div><div class='add'>+ * @lag: lag struct for interface that owns VF</div><div class='add'>+ *</div><div class='add'>+ * Context: must be called with the lag_mutex lock held.</div><div class='add'>+ *</div><div class='add'>+ * Return: active lport value or ICE_LAG_INVALID_PORT if nothing moved.</div><div class='ctx'>  */</div><div class='del'>-static void</div><div class='del'>-ice_lag_cfg_cp_fltr(struct ice_lag *lag, bool add)</div><div class='add'>+u8 ice_lag_prepare_vf_reset(struct ice_lag *lag)</div><div class='ctx'> {</div><div class='del'>-	struct ice_sw_rule_lkup_rx_tx *s_rule = NULL;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-	u16 buf_len, opc;</div><div class='del'>-</div><div class='del'>-	vsi = lag-&gt;pf-&gt;vsi[0];</div><div class='del'>-</div><div class='del'>-	buf_len = ICE_SW_RULE_RX_TX_HDR_SIZE(s_rule,</div><div class='del'>-					     ICE_LAG_SRIOV_TRAIN_PKT_LEN);</div><div class='del'>-	s_rule = kzalloc(buf_len, GFP_KERNEL);</div><div class='del'>-	if (!s_rule) {</div><div class='del'>-		netdev_warn(lag-&gt;netdev, "-ENOMEM error configuring CP filter\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (add) {</div><div class='del'>-		s_rule-&gt;hdr.type = cpu_to_le16(ICE_AQC_SW_RULES_T_LKUP_RX);</div><div class='del'>-		s_rule-&gt;recipe_id = cpu_to_le16(ICE_LAG_SRIOV_CP_RECIPE);</div><div class='del'>-		s_rule-&gt;src = cpu_to_le16(vsi-&gt;port_info-&gt;lport);</div><div class='del'>-		s_rule-&gt;act = cpu_to_le32(ICE_FWD_TO_VSI |</div><div class='del'>-					  ICE_SINGLE_ACT_LAN_ENABLE |</div><div class='del'>-					  ICE_SINGLE_ACT_VALID_BIT |</div><div class='del'>-					  FIELD_PREP(ICE_SINGLE_ACT_VSI_ID_M, vsi-&gt;vsi_num));</div><div class='del'>-		s_rule-&gt;hdr_len = cpu_to_le16(ICE_LAG_SRIOV_TRAIN_PKT_LEN);</div><div class='del'>-		memcpy(s_rule-&gt;hdr_data, lacp_train_pkt, LACP_TRAIN_PKT_LEN);</div><div class='del'>-		opc = ice_aqc_opc_add_sw_rules;</div><div class='del'>-	} else {</div><div class='del'>-		opc = ice_aqc_opc_remove_sw_rules;</div><div class='del'>-		s_rule-&gt;index = cpu_to_le16(lag-&gt;cp_rule_idx);</div><div class='del'>-	}</div><div class='del'>-	if (ice_aq_sw_rules(&amp;lag-&gt;pf-&gt;hw, s_rule, buf_len, 1, opc, NULL)) {</div><div class='del'>-		netdev_warn(lag-&gt;netdev, "Error %s CP rule for fail-over\n",</div><div class='del'>-			    add ? "ADDING" : "REMOVING");</div><div class='del'>-		goto cp_free;</div><div class='add'>+	u8 pri_prt, act_prt;</div><div class='add'>+</div><div class='add'>+	if (lag &amp;&amp; lag-&gt;bonded &amp;&amp; lag-&gt;primary &amp;&amp; lag-&gt;upper_netdev) {</div><div class='add'>+		if (!lag-&gt;bond_aa) {</div><div class='add'>+			pri_prt = lag-&gt;pf-&gt;hw.port_info-&gt;lport;</div><div class='add'>+			act_prt = lag-&gt;active_port;</div><div class='add'>+			if (act_prt != pri_prt &amp;&amp;</div><div class='add'>+			    act_prt != ICE_LAG_INVALID_PORT) {</div><div class='add'>+				ice_lag_move_vf_nodes_cfg(lag, act_prt, pri_prt);</div><div class='add'>+				return act_prt;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			if (lag-&gt;port_bitmap &amp; ICE_LAGS_M) {</div><div class='add'>+				lag-&gt;port_bitmap &amp;= ~ICE_LAGS_M;</div><div class='add'>+				ice_lag_aa_failover(lag, ICE_LAGP_IDX, NULL);</div><div class='add'>+				lag-&gt;port_bitmap |= ICE_LAGS_M;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (add)</div><div class='del'>-		lag-&gt;cp_rule_idx = le16_to_cpu(s_rule-&gt;index);</div><div class='del'>-	else</div><div class='del'>-		lag-&gt;cp_rule_idx = 0;</div><div class='add'>+	return ICE_LAG_INVALID_PORT;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-cp_free:</div><div class='del'>-	kfree(s_rule);</div><div class='add'>+/**</div><div class='add'>+ * ice_lag_complete_vf_reset - helper for lag after reset</div><div class='add'>+ * @lag: lag struct for primary interface</div><div class='add'>+ * @act_prt: which port should be active for lag</div><div class='add'>+ *</div><div class='add'>+ * Context: must be called while holding the lag_mutex.</div><div class='add'>+ */</div><div class='add'>+void ice_lag_complete_vf_reset(struct ice_lag *lag, u8 act_prt)</div><div class='add'>+{</div><div class='add'>+	u8 pri_prt;</div><div class='add'>+</div><div class='add'>+	if (lag &amp;&amp; lag-&gt;bonded &amp;&amp; lag-&gt;primary) {</div><div class='add'>+		if (!lag-&gt;bond_aa) {</div><div class='add'>+			pri_prt = lag-&gt;pf-&gt;hw.port_info-&gt;lport;</div><div class='add'>+			if (act_prt != ICE_LAG_INVALID_PORT)</div><div class='add'>+				ice_lag_move_vf_nodes_cfg(lag, pri_prt,</div><div class='add'>+							  act_prt);</div><div class='add'>+		} else {</div><div class='add'>+			ice_lag_aa_failover(lag, ICE_LAGS_IDX, NULL);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -831,13 +897,12 @@ cp_free:</div><div class='ctx'>  */</div><div class='ctx'> static void ice_lag_info_event(struct ice_lag *lag, void *ptr)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_notifier_bonding_info *info;</div><div class='add'>+	struct netdev_notifier_bonding_info *info = ptr;</div><div class='ctx'> 	struct netdev_bonding_info *bonding_info;</div><div class='ctx'> 	struct net_device *event_netdev;</div><div class='ctx'> 	const char *lag_netdev_name;</div><div class='ctx'> </div><div class='ctx'> 	event_netdev = netdev_notifier_info_to_dev(ptr);</div><div class='del'>-	info = ptr;</div><div class='ctx'> 	lag_netdev_name = netdev_name(lag-&gt;netdev);</div><div class='ctx'> 	bonding_info = &amp;info-&gt;bonding_info;</div><div class='ctx'> </div><div class='hunk'>@@ -855,7 +920,7 @@ static void ice_lag_info_event(struct ice_lag *lag, void *ptr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (bonding_info-&gt;slave.state)</div><div class='del'>-		ice_lag_set_backup(lag);</div><div class='add'>+		ice_lag_set_bkup(lag);</div><div class='ctx'> 	else</div><div class='ctx'> 		ice_lag_set_primary(lag);</div><div class='ctx'> </div><div class='hunk'>@@ -864,6 +929,295 @@ lag_out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_lag_aa_qbuf_recfg - fill a single queue buffer for recfg cmd</div><div class='add'>+ * @hw: HW struct that contains the queue context</div><div class='add'>+ * @qbuf: pointer to single queue buffer</div><div class='add'>+ * @vsi_num: index of the VF VSI in PF space</div><div class='add'>+ * @qnum: queue index</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_lag_aa_qbuf_recfg(struct ice_hw *hw, struct ice_aqc_cfg_txqs_buf *qbuf,</div><div class='add'>+		      u16 vsi_num, int qnum)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = hw-&gt;back;</div><div class='add'>+	struct ice_q_ctx *q_ctx;</div><div class='add'>+	u16 q_id;</div><div class='add'>+</div><div class='add'>+	q_ctx = ice_get_lan_q_ctx(hw, vsi_num, 0, qnum);</div><div class='add'>+	if (!q_ctx) {</div><div class='add'>+		dev_dbg(ice_hw_to_dev(hw), "LAG queue %d no Q context\n", qnum);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (q_ctx-&gt;q_teid == ICE_INVAL_TEID) {</div><div class='add'>+		dev_dbg(ice_hw_to_dev(hw), "LAG queue %d INVAL TEID\n", qnum);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (q_ctx-&gt;q_handle == ICE_INVAL_Q_HANDLE) {</div><div class='add'>+		dev_dbg(ice_hw_to_dev(hw), "LAG queue %d INVAL Q HANDLE\n", qnum);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	q_id = pf-&gt;vsi[vsi_num]-&gt;txq_map[q_ctx-&gt;q_handle];</div><div class='add'>+	qbuf-&gt;queue_info[0].q_handle = cpu_to_le16(q_id);</div><div class='add'>+	qbuf-&gt;queue_info[0].tc = 0;</div><div class='add'>+	qbuf-&gt;queue_info[0].q_teid = cpu_to_le32(q_ctx-&gt;q_teid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_lag_aa_move_vf_qs - Move some/all VF queues to destination</div><div class='add'>+ * @lag: primary interface's lag struct</div><div class='add'>+ * @dest: index of destination port</div><div class='add'>+ * @vsi_num: index of VF VSI in PF space</div><div class='add'>+ * @all: if true move all queues to destination</div><div class='add'>+ * @odd: VF wide q indicator for odd/even</div><div class='add'>+ * @e_pf: PF struct for the event interface</div><div class='add'>+ *</div><div class='add'>+ * the parameter "all" is to control whether we are splitting the queues</div><div class='add'>+ * between two interfaces or moving them all to the destination interface</div><div class='add'>+ */</div><div class='add'>+static void ice_lag_aa_move_vf_qs(struct ice_lag *lag, u8 dest, u16 vsi_num,</div><div class='add'>+				  bool all, bool *odd, struct ice_pf *e_pf)</div><div class='add'>+{</div><div class='add'>+	DEFINE_RAW_FLEX(struct ice_aqc_cfg_txqs_buf, qbuf, queue_info, 1);</div><div class='add'>+	struct ice_hw *old_hw, *new_hw, *pri_hw, *sec_hw;</div><div class='add'>+	struct device *dev = ice_pf_to_dev(lag-&gt;pf);</div><div class='add'>+	struct ice_vsi_ctx *pv_ctx, *sv_ctx;</div><div class='add'>+	struct ice_lag_netdev_list ndlist;</div><div class='add'>+	u16 num_q, qbuf_size, sec_vsi_num;</div><div class='add'>+	u8 pri_lport, sec_lport;</div><div class='add'>+	u32 pvf_teid, svf_teid;</div><div class='add'>+	u16 vf_id;</div><div class='add'>+</div><div class='add'>+	vf_id = lag-&gt;pf-&gt;vsi[vsi_num]-&gt;vf-&gt;vf_id;</div><div class='add'>+	/* If sec_vf[] not defined, then no second interface to share with */</div><div class='add'>+	if (lag-&gt;sec_vf[vf_id])</div><div class='add'>+		sec_vsi_num = lag-&gt;sec_vf[vf_id]-&gt;idx;</div><div class='add'>+	else</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pri_lport = lag-&gt;bond_lport_pri;</div><div class='add'>+	sec_lport = lag-&gt;bond_lport_sec;</div><div class='add'>+</div><div class='add'>+	if (pri_lport == ICE_LAG_INVALID_PORT ||</div><div class='add'>+	    sec_lport == ICE_LAG_INVALID_PORT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!e_pf)</div><div class='add'>+		ice_lag_build_netdev_list(lag, &amp;ndlist);</div><div class='add'>+</div><div class='add'>+	pri_hw = &amp;lag-&gt;pf-&gt;hw;</div><div class='add'>+	if (e_pf &amp;&amp; lag-&gt;pf != e_pf)</div><div class='add'>+		sec_hw = &amp;e_pf-&gt;hw;</div><div class='add'>+	else</div><div class='add'>+		sec_hw = ice_lag_find_hw_by_lport(lag, sec_lport);</div><div class='add'>+</div><div class='add'>+	if (!pri_hw || !sec_hw)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (dest == ICE_LAGP_IDX) {</div><div class='add'>+		struct ice_vsi *vsi;</div><div class='add'>+</div><div class='add'>+		vsi = ice_get_main_vsi(lag-&gt;pf);</div><div class='add'>+		if (!vsi)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		old_hw = sec_hw;</div><div class='add'>+		new_hw = pri_hw;</div><div class='add'>+		ice_lag_config_eswitch(lag, vsi-&gt;netdev);</div><div class='add'>+	} else {</div><div class='add'>+		struct ice_pf *sec_pf = sec_hw-&gt;back;</div><div class='add'>+		struct ice_vsi *vsi;</div><div class='add'>+</div><div class='add'>+		vsi = ice_get_main_vsi(sec_pf);</div><div class='add'>+		if (!vsi)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		old_hw = pri_hw;</div><div class='add'>+		new_hw = sec_hw;</div><div class='add'>+		ice_lag_config_eswitch(lag, vsi-&gt;netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pv_ctx = ice_get_vsi_ctx(pri_hw, vsi_num);</div><div class='add'>+	if (!pv_ctx) {</div><div class='add'>+		dev_warn(dev, "Unable to locate primary VSI %d context for LAG failover\n",</div><div class='add'>+			 vsi_num);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sv_ctx = ice_get_vsi_ctx(sec_hw, sec_vsi_num);</div><div class='add'>+	if (!sv_ctx) {</div><div class='add'>+		dev_warn(dev, "Unable to locate secondary VSI %d context for LAG failover\n",</div><div class='add'>+			 vsi_num);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_q = pv_ctx-&gt;num_lan_q_entries[0];</div><div class='add'>+	qbuf_size = __struct_size(qbuf);</div><div class='add'>+</div><div class='add'>+	/* Suspend traffic for primary VSI VF */</div><div class='add'>+	pvf_teid = le32_to_cpu(pv_ctx-&gt;sched.vsi_node[0]-&gt;info.node_teid);</div><div class='add'>+	ice_sched_suspend_resume_elems(pri_hw, 1, &amp;pvf_teid, true);</div><div class='add'>+</div><div class='add'>+	/* Suspend traffic for secondary VSI VF */</div><div class='add'>+	svf_teid = le32_to_cpu(sv_ctx-&gt;sched.vsi_node[0]-&gt;info.node_teid);</div><div class='add'>+	ice_sched_suspend_resume_elems(sec_hw, 1, &amp;svf_teid, true);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; num_q; i++) {</div><div class='add'>+		struct ice_sched_node *n_prt, *q_node, *parent;</div><div class='add'>+		struct ice_port_info *pi, *new_pi;</div><div class='add'>+		struct ice_vsi_ctx *src_ctx;</div><div class='add'>+		struct ice_sched_node *p;</div><div class='add'>+		struct ice_q_ctx *q_ctx;</div><div class='add'>+		u16 dst_vsi_num;</div><div class='add'>+</div><div class='add'>+		pi = old_hw-&gt;port_info;</div><div class='add'>+		new_pi = new_hw-&gt;port_info;</div><div class='add'>+</div><div class='add'>+		*odd = !(*odd);</div><div class='add'>+		if ((dest == ICE_LAGP_IDX &amp;&amp; *odd &amp;&amp; !all) ||</div><div class='add'>+		    (dest == ICE_LAGS_IDX &amp;&amp; !(*odd) &amp;&amp; !all) ||</div><div class='add'>+		    lag-&gt;q_home[vf_id][i] == dest)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (dest == ICE_LAGP_IDX)</div><div class='add'>+			dst_vsi_num = vsi_num;</div><div class='add'>+		else</div><div class='add'>+			dst_vsi_num = sec_vsi_num;</div><div class='add'>+</div><div class='add'>+		n_prt = ice_sched_get_free_qparent(new_hw-&gt;port_info,</div><div class='add'>+						   dst_vsi_num, 0,</div><div class='add'>+						   ICE_SCHED_NODE_OWNER_LAN);</div><div class='add'>+		if (!n_prt)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		q_ctx = ice_get_lan_q_ctx(pri_hw, vsi_num, 0, i);</div><div class='add'>+		if (!q_ctx)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (dest == ICE_LAGP_IDX)</div><div class='add'>+			src_ctx = sv_ctx;</div><div class='add'>+		else</div><div class='add'>+			src_ctx = pv_ctx;</div><div class='add'>+</div><div class='add'>+		q_node = ice_sched_find_node_by_teid(src_ctx-&gt;sched.vsi_node[0],</div><div class='add'>+						     q_ctx-&gt;q_teid);</div><div class='add'>+		if (!q_node)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		qbuf-&gt;src_parent_teid = q_node-&gt;info.parent_teid;</div><div class='add'>+		qbuf-&gt;dst_parent_teid = n_prt-&gt;info.node_teid;</div><div class='add'>+</div><div class='add'>+		/* Move the node in the HW/FW */</div><div class='add'>+		if (ice_lag_aa_qbuf_recfg(pri_hw, qbuf, vsi_num, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (dest == ICE_LAGP_IDX)</div><div class='add'>+			ice_aq_cfg_lan_txq(pri_hw, qbuf, qbuf_size, 1,</div><div class='add'>+					   sec_lport, pri_lport,</div><div class='add'>+					   ICE_AQC_Q_CFG_MOVE_TC_CHNG,</div><div class='add'>+					   NULL);</div><div class='add'>+		else</div><div class='add'>+			ice_aq_cfg_lan_txq(pri_hw, qbuf, qbuf_size, 1,</div><div class='add'>+					   pri_lport, sec_lport,</div><div class='add'>+					   ICE_AQC_Q_CFG_MOVE_TC_CHNG,</div><div class='add'>+					   NULL);</div><div class='add'>+</div><div class='add'>+		/* Move the node in the SW */</div><div class='add'>+		parent = q_node-&gt;parent;</div><div class='add'>+		if (!parent)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (int n = 0; n &lt; parent-&gt;num_children; n++) {</div><div class='add'>+			int j;</div><div class='add'>+</div><div class='add'>+			if (parent-&gt;children[n] != q_node)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			for (j = n + 1; j &lt; parent-&gt;num_children;</div><div class='add'>+			     j++) {</div><div class='add'>+				parent-&gt;children[j - 1] =</div><div class='add'>+					parent-&gt;children[j];</div><div class='add'>+			}</div><div class='add'>+			parent-&gt;children[j] = NULL;</div><div class='add'>+			parent-&gt;num_children--;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		p = pi-&gt;sib_head[0][q_node-&gt;tx_sched_layer];</div><div class='add'>+		while (p) {</div><div class='add'>+			if (p-&gt;sibling == q_node) {</div><div class='add'>+				p-&gt;sibling = q_node-&gt;sibling;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			p = p-&gt;sibling;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pi-&gt;sib_head[0][q_node-&gt;tx_sched_layer] == q_node)</div><div class='add'>+			pi-&gt;sib_head[0][q_node-&gt;tx_sched_layer] =</div><div class='add'>+				q_node-&gt;sibling;</div><div class='add'>+</div><div class='add'>+		q_node-&gt;parent = n_prt;</div><div class='add'>+		q_node-&gt;info.parent_teid = n_prt-&gt;info.node_teid;</div><div class='add'>+		q_node-&gt;sibling = NULL;</div><div class='add'>+		p = new_pi-&gt;sib_head[0][q_node-&gt;tx_sched_layer];</div><div class='add'>+		if (p) {</div><div class='add'>+			while (p) {</div><div class='add'>+				if (!p-&gt;sibling) {</div><div class='add'>+					p-&gt;sibling = q_node;</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+				p = p-&gt;sibling;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			new_pi-&gt;sib_head[0][q_node-&gt;tx_sched_layer] =</div><div class='add'>+				q_node;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		n_prt-&gt;children[n_prt-&gt;num_children++] = q_node;</div><div class='add'>+		lag-&gt;q_home[vf_id][i] = dest;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ice_sched_suspend_resume_elems(pri_hw, 1, &amp;pvf_teid, false);</div><div class='add'>+	ice_sched_suspend_resume_elems(sec_hw, 1, &amp;svf_teid, false);</div><div class='add'>+</div><div class='add'>+	if (!e_pf)</div><div class='add'>+		ice_lag_destroy_netdev_list(lag, &amp;ndlist);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_lag_aa_failover - move VF queues in A/A mode</div><div class='add'>+ * @lag: primary lag struct</div><div class='add'>+ * @dest: index of destination port</div><div class='add'>+ * @e_pf: PF struct for event port</div><div class='add'>+ */</div><div class='add'>+void ice_lag_aa_failover(struct ice_lag *lag, u8 dest, struct ice_pf *e_pf)</div><div class='add'>+{</div><div class='add'>+	bool odd = true, all = false;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Primary can be a target if down (cleanup), but secondary can't */</div><div class='add'>+	if (dest == ICE_LAGS_IDX &amp;&amp; !(lag-&gt;port_bitmap &amp; ICE_LAGS_M))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Move all queues to a destination if only one port is active,</div><div class='add'>+	 * or no ports are active and dest is primary.</div><div class='add'>+	 */</div><div class='add'>+	if ((lag-&gt;port_bitmap ^ (ICE_LAGP_M | ICE_LAGS_M)) ||</div><div class='add'>+	    (!lag-&gt;port_bitmap &amp;&amp; dest == ICE_LAGP_IDX))</div><div class='add'>+		all = true;</div><div class='add'>+</div><div class='add'>+	ice_for_each_vsi(lag-&gt;pf, i)</div><div class='add'>+		if (lag-&gt;pf-&gt;vsi[i] &amp;&amp; lag-&gt;pf-&gt;vsi[i]-&gt;type == ICE_VSI_VF)</div><div class='add'>+			ice_lag_aa_move_vf_qs(lag, dest, i, all, &amp;odd, e_pf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_lag_reclaim_vf_tc - move scheduling nodes back to primary interface</div><div class='ctx'>  * @lag: primary interface lag struct</div><div class='ctx'>  * @src_hw: HW struct current node location</div><div class='hunk'>@@ -879,13 +1233,12 @@ ice_lag_reclaim_vf_tc(struct ice_lag *lag, struct ice_hw *src_hw, u16 vsi_num,</div><div class='ctx'> 	u16 numq, valq, num_moved, qbuf_size;</div><div class='ctx'> 	u16 buf_size = __struct_size(buf);</div><div class='ctx'> 	struct ice_aqc_cfg_txqs_buf *qbuf;</div><div class='add'>+	struct ice_hw *hw = &amp;lag-&gt;pf-&gt;hw;</div><div class='ctx'> 	struct ice_sched_node *n_prt;</div><div class='ctx'> 	__le32 teid, parent_teid;</div><div class='ctx'> 	struct ice_vsi_ctx *ctx;</div><div class='del'>-	struct ice_hw *hw;</div><div class='ctx'> 	u32 tmp_teid;</div><div class='ctx'> </div><div class='del'>-	hw = &amp;lag-&gt;pf-&gt;hw;</div><div class='ctx'> 	ctx = ice_get_vsi_ctx(hw, vsi_num);</div><div class='ctx'> 	if (!ctx) {</div><div class='ctx'> 		dev_warn(dev, "Unable to locate VSI context for LAG reclaim\n");</div><div class='hunk'>@@ -926,7 +1279,7 @@ ice_lag_reclaim_vf_tc(struct ice_lag *lag, struct ice_hw *src_hw, u16 vsi_num,</div><div class='ctx'> </div><div class='ctx'> 	if (ice_aq_cfg_lan_txq(hw, qbuf, qbuf_size, numq,</div><div class='ctx'> 			       src_hw-&gt;port_info-&gt;lport, hw-&gt;port_info-&gt;lport,</div><div class='del'>-			       NULL)) {</div><div class='add'>+			       ICE_AQC_Q_CFG_TC_CHNG, NULL)) {</div><div class='ctx'> 		dev_warn(dev, "Failure to configure queues for LAG failover\n");</div><div class='ctx'> 		goto reclaim_qerr;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -997,14 +1350,15 @@ static void ice_lag_link(struct ice_lag *lag)</div><div class='ctx'> </div><div class='ctx'> 	lag-&gt;bonded = true;</div><div class='ctx'> 	lag-&gt;role = ICE_LAG_UNSET;</div><div class='add'>+	lag-&gt;need_fltr_cfg = true;</div><div class='ctx'> 	netdev_info(lag-&gt;netdev, "Shared SR-IOV resources in bond are active\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_lag_unlink - handle unlink event</div><div class='add'>+ * ice_lag_act_bkup_unlink - handle unlink event for A/B bond</div><div class='ctx'>  * @lag: LAG info struct</div><div class='ctx'>  */</div><div class='del'>-static void ice_lag_unlink(struct ice_lag *lag)</div><div class='add'>+static void ice_lag_act_bkup_unlink(struct ice_lag *lag)</div><div class='ctx'> {</div><div class='ctx'> 	u8 pri_port, act_port, loc_port;</div><div class='ctx'> 	struct ice_pf *pf = lag-&gt;pf;</div><div class='hunk'>@@ -1021,6 +1375,9 @@ static void ice_lag_unlink(struct ice_lag *lag)</div><div class='ctx'> 			ice_lag_move_vf_nodes(lag, act_port, pri_port);</div><div class='ctx'> 		lag-&gt;primary = false;</div><div class='ctx'> 		lag-&gt;active_port = ICE_LAG_INVALID_PORT;</div><div class='add'>+</div><div class='add'>+		/* Config primary's eswitch back to normal operation. */</div><div class='add'>+		ice_lag_config_eswitch(lag, lag-&gt;netdev);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		struct ice_lag *primary_lag;</div><div class='ctx'> </div><div class='hunk'>@@ -1037,10 +1394,32 @@ static void ice_lag_unlink(struct ice_lag *lag)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	lag-&gt;bonded = false;</div><div class='del'>-	lag-&gt;role = ICE_LAG_NONE;</div><div class='del'>-	lag-&gt;upper_netdev = NULL;</div><div class='add'>+/**</div><div class='add'>+ * ice_lag_aa_unlink - handle unlink event for Active-Active bond</div><div class='add'>+ * @lag: LAG info struct</div><div class='add'>+ */</div><div class='add'>+static void ice_lag_aa_unlink(struct ice_lag *lag)</div><div class='add'>+{</div><div class='add'>+	struct ice_lag *pri_lag;</div><div class='add'>+</div><div class='add'>+	if (lag-&gt;primary) {</div><div class='add'>+		pri_lag = lag;</div><div class='add'>+		lag-&gt;port_bitmap &amp;= ~ICE_LAGP_M;</div><div class='add'>+	} else {</div><div class='add'>+		pri_lag = ice_lag_find_primary(lag);</div><div class='add'>+		if (pri_lag)</div><div class='add'>+			pri_lag-&gt;port_bitmap &amp;= ICE_LAGS_M;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pri_lag) {</div><div class='add'>+		ice_lag_aa_failover(pri_lag, ICE_LAGP_IDX, lag-&gt;pf);</div><div class='add'>+		if (lag-&gt;primary)</div><div class='add'>+			pri_lag-&gt;bond_lport_pri = ICE_LAG_INVALID_PORT;</div><div class='add'>+		else</div><div class='add'>+			pri_lag-&gt;bond_lport_sec = ICE_LAG_INVALID_PORT;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1056,10 +1435,20 @@ static void ice_lag_link_unlink(struct ice_lag *lag, void *ptr)</div><div class='ctx'> 	if (netdev != lag-&gt;netdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (info-&gt;linking)</div><div class='add'>+	if (info-&gt;linking) {</div><div class='ctx'> 		ice_lag_link(lag);</div><div class='del'>-	else</div><div class='del'>-		ice_lag_unlink(lag);</div><div class='add'>+	} else {</div><div class='add'>+		if (lag-&gt;bond_aa)</div><div class='add'>+			ice_lag_aa_unlink(lag);</div><div class='add'>+		else</div><div class='add'>+			ice_lag_act_bkup_unlink(lag);</div><div class='add'>+</div><div class='add'>+		lag-&gt;bonded = false;</div><div class='add'>+		lag-&gt;role = ICE_LAG_NONE;</div><div class='add'>+		lag-&gt;upper_netdev = NULL;</div><div class='add'>+		lag-&gt;bond_aa = false;</div><div class='add'>+		lag-&gt;need_fltr_cfg = false;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1077,7 +1466,7 @@ ice_lag_set_swid(u16 primary_swid, struct ice_lag *local_lag,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_alloc_free_res_elem *buf;</div><div class='ctx'> 	struct ice_aqc_set_port_params *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buf_len, swid;</div><div class='ctx'> 	int status, i;</div><div class='ctx'> </div><div class='hunk'>@@ -1125,7 +1514,7 @@ ice_lag_set_swid(u16 primary_swid, struct ice_lag *local_lag,</div><div class='ctx'> 	else</div><div class='ctx'> 		swid = local_lag-&gt;pf-&gt;hw.port_info-&gt;sw_id;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.set_port_params;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_set_port_params);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;swid = cpu_to_le16(ICE_AQC_PORT_SWID_VALID | swid);</div><div class='hunk'>@@ -1157,11 +1546,8 @@ ice_lag_set_swid(u16 primary_swid, struct ice_lag *local_lag,</div><div class='ctx'>  */</div><div class='ctx'> static void ice_lag_primary_swid(struct ice_lag *lag, bool link)</div><div class='ctx'> {</div><div class='del'>-	struct ice_hw *hw;</div><div class='del'>-	u16 swid;</div><div class='del'>-</div><div class='del'>-	hw = &amp;lag-&gt;pf-&gt;hw;</div><div class='del'>-	swid = hw-&gt;port_info-&gt;sw_id;</div><div class='add'>+	struct ice_hw *hw = &amp;lag-&gt;pf-&gt;hw;</div><div class='add'>+	u16 swid = hw-&gt;port_info-&gt;sw_id;</div><div class='ctx'> </div><div class='ctx'> 	if (ice_share_res(hw, ICE_AQC_RES_TYPE_SWID, link, swid))</div><div class='ctx'> 		dev_warn(ice_pf_to_dev(lag-&gt;pf), "Failure to set primary interface shared status\n");</div><div class='hunk'>@@ -1174,12 +1560,10 @@ static void ice_lag_primary_swid(struct ice_lag *lag, bool link)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_lag_add_prune_list(struct ice_lag *lag, struct ice_pf *event_pf)</div><div class='ctx'> {</div><div class='del'>-	u16 num_vsi, rule_buf_sz, vsi_list_id, event_vsi_num, prim_vsi_idx;</div><div class='del'>-	struct ice_sw_rule_vsi_list *s_rule = NULL;</div><div class='add'>+	u16 rule_buf_sz, vsi_list_id, event_vsi_num, prim_vsi_idx, num_vsi = 1;</div><div class='add'>+	struct ice_sw_rule_vsi_list *s_rule;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> </div><div class='del'>-	num_vsi = 1;</div><div class='del'>-</div><div class='ctx'> 	dev = ice_pf_to_dev(lag-&gt;pf);</div><div class='ctx'> 	event_vsi_num = event_pf-&gt;vsi[0]-&gt;vsi_num;</div><div class='ctx'> 	prim_vsi_idx = lag-&gt;pf-&gt;vsi[0]-&gt;idx;</div><div class='hunk'>@@ -1215,12 +1599,10 @@ static void ice_lag_add_prune_list(struct ice_lag *lag, struct ice_pf *event_pf)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_lag_del_prune_list(struct ice_lag *lag, struct ice_pf *event_pf)</div><div class='ctx'> {</div><div class='del'>-	u16 num_vsi, vsi_num, vsi_idx, rule_buf_sz, vsi_list_id;</div><div class='del'>-	struct ice_sw_rule_vsi_list *s_rule = NULL;</div><div class='add'>+	u16 vsi_num, vsi_idx, rule_buf_sz, vsi_list_id, num_vsi = 1;</div><div class='add'>+	struct ice_sw_rule_vsi_list *s_rule;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> </div><div class='del'>-	num_vsi = 1;</div><div class='del'>-</div><div class='ctx'> 	dev = ice_pf_to_dev(lag-&gt;pf);</div><div class='ctx'> 	vsi_num = event_pf-&gt;vsi[0]-&gt;vsi_num;</div><div class='ctx'> 	vsi_idx = lag-&gt;pf-&gt;vsi[0]-&gt;idx;</div><div class='hunk'>@@ -1268,6 +1650,11 @@ static void ice_lag_init_feature_support_flag(struct ice_pf *pf)</div><div class='ctx'> 		ice_set_feature_support(pf, ICE_F_SRIOV_LAG);</div><div class='ctx'> 	else</div><div class='ctx'> 		ice_clear_feature_support(pf, ICE_F_SRIOV_LAG);</div><div class='add'>+</div><div class='add'>+	if (caps-&gt;sriov_aa_lag &amp;&amp; ice_pkg_has_lport_extract(&amp;pf-&gt;hw))</div><div class='add'>+		ice_set_feature_support(pf, ICE_F_SRIOV_AA_LAG);</div><div class='add'>+	else</div><div class='add'>+		ice_clear_feature_support(pf, ICE_F_SRIOV_AA_LAG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1277,11 +1664,10 @@ static void ice_lag_init_feature_support_flag(struct ice_pf *pf)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_lag_changeupper_event(struct ice_lag *lag, void *ptr)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_notifier_changeupper_info *info;</div><div class='add'>+	struct netdev_notifier_changeupper_info *info = ptr;</div><div class='ctx'> 	struct ice_lag *primary_lag;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> </div><div class='del'>-	info = ptr;</div><div class='ctx'> 	netdev = netdev_notifier_info_to_dev(ptr);</div><div class='ctx'> </div><div class='ctx'> 	/* not for this netdev */</div><div class='hunk'>@@ -1296,25 +1682,47 @@ static void ice_lag_changeupper_event(struct ice_lag *lag, void *ptr)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!primary_lag) {</div><div class='ctx'> 			lag-&gt;primary = true;</div><div class='add'>+			if (!ice_is_switchdev_running(lag-&gt;pf))</div><div class='add'>+				return;</div><div class='add'>+</div><div class='ctx'> 			/* Configure primary's SWID to be shared */</div><div class='ctx'> 			ice_lag_primary_swid(lag, true);</div><div class='ctx'> 			primary_lag = lag;</div><div class='add'>+			lag-&gt;bond_lport_pri = lag-&gt;pf-&gt;hw.port_info-&gt;lport;</div><div class='add'>+			lag-&gt;bond_lport_sec = ICE_LAG_INVALID_PORT;</div><div class='add'>+			lag-&gt;port_bitmap = 0;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			u16 swid;</div><div class='ctx'> </div><div class='add'>+			if (!ice_is_switchdev_running(primary_lag-&gt;pf))</div><div class='add'>+				return;</div><div class='add'>+</div><div class='ctx'> 			swid = primary_lag-&gt;pf-&gt;hw.port_info-&gt;sw_id;</div><div class='ctx'> 			ice_lag_set_swid(swid, lag, true);</div><div class='ctx'> 			ice_lag_add_prune_list(primary_lag, lag-&gt;pf);</div><div class='del'>-			ice_lag_cfg_drop_fltr(lag, true);</div><div class='add'>+			primary_lag-&gt;bond_lport_sec =</div><div class='add'>+				lag-&gt;pf-&gt;hw.port_info-&gt;lport;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* add filter for primary control packets */</div><div class='del'>-		ice_lag_cfg_cp_fltr(lag, true);</div><div class='add'>+		ice_lag_cfg_lp_fltr(lag, true, true);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (!primary_lag &amp;&amp; lag-&gt;primary)</div><div class='ctx'> 			primary_lag = lag;</div><div class='ctx'> </div><div class='add'>+		if (primary_lag) {</div><div class='add'>+			for (int i = 0; i &lt; ICE_MAX_SRIOV_VFS; i++) {</div><div class='add'>+				if (primary_lag-&gt;sec_vf[i]) {</div><div class='add'>+					ice_vsi_release(primary_lag-&gt;sec_vf[i]);</div><div class='add'>+					primary_lag-&gt;sec_vf[i] = NULL;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (!lag-&gt;primary) {</div><div class='ctx'> 			ice_lag_set_swid(0, lag, false);</div><div class='add'>+			if (primary_lag)</div><div class='add'>+				primary_lag-&gt;bond_lport_sec =</div><div class='add'>+					ICE_LAG_INVALID_PORT;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (primary_lag &amp;&amp; lag-&gt;primary) {</div><div class='ctx'> 				ice_lag_primary_swid(lag, false);</div><div class='hunk'>@@ -1322,7 +1730,7 @@ static void ice_lag_changeupper_event(struct ice_lag *lag, void *ptr)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		/* remove filter for control packets */</div><div class='del'>-		ice_lag_cfg_cp_fltr(lag, false);</div><div class='add'>+		ice_lag_cfg_lp_fltr(lag, false, !lag-&gt;bond_aa);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1335,7 +1743,7 @@ static void ice_lag_changeupper_event(struct ice_lag *lag, void *ptr)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_lag_monitor_link(struct ice_lag *lag, void *ptr)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_notifier_changeupper_info *info;</div><div class='add'>+	struct netdev_notifier_changeupper_info *info = ptr;</div><div class='ctx'> 	struct ice_hw *prim_hw, *active_hw;</div><div class='ctx'> 	struct net_device *event_netdev;</div><div class='ctx'> 	struct ice_pf *pf;</div><div class='hunk'>@@ -1348,19 +1756,34 @@ static void ice_lag_monitor_link(struct ice_lag *lag, void *ptr)</div><div class='ctx'> 	if (!netif_is_same_ice(lag-&gt;pf, event_netdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (info-&gt;upper_dev != lag-&gt;upper_netdev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (info-&gt;linking)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	pf = lag-&gt;pf;</div><div class='ctx'> 	prim_hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	prim_port = prim_hw-&gt;port_info-&gt;lport;</div><div class='ctx'> </div><div class='del'>-	info = (struct netdev_notifier_changeupper_info *)ptr;</div><div class='del'>-	if (info-&gt;upper_dev != lag-&gt;upper_netdev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (!info-&gt;linking) {</div><div class='del'>-		/* Since there are only two interfaces allowed in SRIOV+LAG, if</div><div class='del'>-		 * one port is leaving, then nodes need to be on primary</div><div class='del'>-		 * interface.</div><div class='del'>-		 */</div><div class='add'>+	/* Since there are only two interfaces allowed in SRIOV+LAG, if</div><div class='add'>+	 * one port is leaving, then nodes need to be on primary</div><div class='add'>+	 * interface.</div><div class='add'>+	 */</div><div class='add'>+	if (lag-&gt;bond_aa) {</div><div class='add'>+		struct ice_netdev_priv *e_ndp;</div><div class='add'>+		struct ice_pf *e_pf;</div><div class='add'>+</div><div class='add'>+		e_ndp = netdev_priv(event_netdev);</div><div class='add'>+		e_pf = e_ndp-&gt;vsi-&gt;back;</div><div class='add'>+</div><div class='add'>+		if (lag-&gt;bond_lport_pri != ICE_LAG_INVALID_PORT &amp;&amp;</div><div class='add'>+		    lag-&gt;port_bitmap &amp; ICE_LAGS_M) {</div><div class='add'>+			lag-&gt;port_bitmap &amp;= ~ICE_LAGS_M;</div><div class='add'>+			ice_lag_aa_failover(lag, ICE_LAGP_IDX, e_pf);</div><div class='add'>+			lag-&gt;bond_lport_sec = ICE_LAG_INVALID_PORT;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='ctx'> 		if (prim_port != lag-&gt;active_port &amp;&amp;</div><div class='ctx'> 		    lag-&gt;active_port != ICE_LAG_INVALID_PORT) {</div><div class='ctx'> 			active_hw = ice_lag_find_hw_by_lport(lag,</div><div class='hunk'>@@ -1372,45 +1795,32 @@ static void ice_lag_monitor_link(struct ice_lag *lag, void *ptr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_lag_monitor_active - main PF keep track of which port is active</div><div class='add'>+ * ice_lag_monitor_act_bkup - keep track of which port is active in A/B LAG</div><div class='ctx'>  * @lag: lag info struct</div><div class='del'>- * @ptr: opaque data containing notifier event</div><div class='add'>+ * @b_info: bonding info</div><div class='add'>+ * @event_netdev: net_device got target netdev</div><div class='ctx'>  *</div><div class='ctx'>  * This function is for the primary PF to monitor changes in which port is</div><div class='ctx'>  * active and handle changes for SRIOV VF functionality</div><div class='ctx'>  */</div><div class='del'>-static void ice_lag_monitor_active(struct ice_lag *lag, void *ptr)</div><div class='add'>+static void ice_lag_monitor_act_bkup(struct ice_lag *lag,</div><div class='add'>+				     struct netdev_bonding_info *b_info,</div><div class='add'>+				     struct net_device *event_netdev)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *event_netdev, *event_upper;</div><div class='del'>-	struct netdev_notifier_bonding_info *info;</div><div class='del'>-	struct netdev_bonding_info *bonding_info;</div><div class='ctx'> 	struct ice_netdev_priv *event_np;</div><div class='ctx'> 	struct ice_pf *pf, *event_pf;</div><div class='ctx'> 	u8 prim_port, event_port;</div><div class='ctx'> </div><div class='del'>-	if (!lag-&gt;primary)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	pf = lag-&gt;pf;</div><div class='ctx'> 	if (!pf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	event_netdev = netdev_notifier_info_to_dev(ptr);</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	event_upper = netdev_master_upper_dev_get_rcu(event_netdev);</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	if (!netif_is_ice(event_netdev) || event_upper != lag-&gt;upper_netdev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	event_np = netdev_priv(event_netdev);</div><div class='ctx'> 	event_pf = event_np-&gt;vsi-&gt;back;</div><div class='ctx'> 	event_port = event_pf-&gt;hw.port_info-&gt;lport;</div><div class='ctx'> 	prim_port = pf-&gt;hw.port_info-&gt;lport;</div><div class='ctx'> </div><div class='del'>-	info = (struct netdev_notifier_bonding_info *)ptr;</div><div class='del'>-	bonding_info = &amp;info-&gt;bonding_info;</div><div class='del'>-</div><div class='del'>-	if (!bonding_info-&gt;slave.state) {</div><div class='add'>+	if (!b_info-&gt;slave.state) {</div><div class='ctx'> 		/* if no port is currently active, then nodes and filters exist</div><div class='ctx'> 		 * on primary port, check if we need to move them</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -1419,6 +1829,7 @@ static void ice_lag_monitor_active(struct ice_lag *lag, void *ptr)</div><div class='ctx'> 				ice_lag_move_vf_nodes(lag, prim_port,</div><div class='ctx'> 						      event_port);</div><div class='ctx'> 			lag-&gt;active_port = event_port;</div><div class='add'>+			ice_lag_config_eswitch(lag, event_netdev);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1428,6 +1839,7 @@ static void ice_lag_monitor_active(struct ice_lag *lag, void *ptr)</div><div class='ctx'> 		/* new active port */</div><div class='ctx'> 		ice_lag_move_vf_nodes(lag, lag-&gt;active_port, event_port);</div><div class='ctx'> 		lag-&gt;active_port = event_port;</div><div class='add'>+		ice_lag_config_eswitch(lag, event_netdev);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* port not set as currently active (e.g. new active port</div><div class='ctx'> 		 * has already claimed the nodes and filters</div><div class='hunk'>@@ -1445,6 +1857,128 @@ static void ice_lag_monitor_active(struct ice_lag *lag, void *ptr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_lag_aa_clear_spoof - adjust the placeholder VSI spoofing for A/A LAG</div><div class='add'>+ * @vsi: placeholder VSI to adjust</div><div class='add'>+ */</div><div class='add'>+static void ice_lag_aa_clear_spoof(struct ice_vsi *vsi)</div><div class='add'>+{</div><div class='add'>+	ice_vsi_update_security(vsi, ice_vsi_ctx_clear_antispoof);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_lag_monitor_act_act - Keep track of active ports in A/A LAG</div><div class='add'>+ * @lag: lag struct for primary interface</div><div class='add'>+ * @b_info: bonding_info for event</div><div class='add'>+ * @event_netdev: net_device for target netdev</div><div class='add'>+ */</div><div class='add'>+static void ice_lag_monitor_act_act(struct ice_lag *lag,</div><div class='add'>+				    struct netdev_bonding_info *b_info,</div><div class='add'>+				    struct net_device *event_netdev)</div><div class='add'>+{</div><div class='add'>+	struct ice_netdev_priv *event_np;</div><div class='add'>+	u8 prim_port, event_port;</div><div class='add'>+	struct ice_pf *event_pf;</div><div class='add'>+</div><div class='add'>+	event_np = netdev_priv(event_netdev);</div><div class='add'>+	event_pf = event_np-&gt;vsi-&gt;back;</div><div class='add'>+	event_port = event_pf-&gt;hw.port_info-&gt;lport;</div><div class='add'>+	prim_port = lag-&gt;pf-&gt;hw.port_info-&gt;lport;</div><div class='add'>+</div><div class='add'>+	if (b_info-&gt;slave.link == BOND_LINK_UP) {</div><div class='add'>+		/* Port is coming up */</div><div class='add'>+		if (prim_port == event_port) {</div><div class='add'>+			/* Processing event for primary interface */</div><div class='add'>+			if (lag-&gt;bond_lport_pri == ICE_LAG_INVALID_PORT)</div><div class='add'>+				return;</div><div class='add'>+</div><div class='add'>+			if (!(lag-&gt;port_bitmap &amp; ICE_LAGP_M)) {</div><div class='add'>+				/* Primary port was not marked up before, move</div><div class='add'>+				 * some|all VF queues to it and mark as up</div><div class='add'>+				 */</div><div class='add'>+				lag-&gt;port_bitmap |= ICE_LAGP_M;</div><div class='add'>+				ice_lag_aa_failover(lag, ICE_LAGP_IDX, event_pf);</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			if (lag-&gt;bond_lport_sec == ICE_LAG_INVALID_PORT)</div><div class='add'>+				return;</div><div class='add'>+</div><div class='add'>+			/* Create placeholder VSIs on secondary PF.</div><div class='add'>+			 * The placeholder is necessary so that we have</div><div class='add'>+			 * an element that represents the VF on the secondary</div><div class='add'>+			 * interface's scheduling tree.  This will be a tree</div><div class='add'>+			 * root for scheduling nodes when they are moved to</div><div class='add'>+			 * the secondary interface.</div><div class='add'>+			 */</div><div class='add'>+			if (!lag-&gt;sec_vf[0]) {</div><div class='add'>+				struct ice_vsi_cfg_params params = {};</div><div class='add'>+				struct ice_vsi *nvsi;</div><div class='add'>+				struct ice_vf *vf;</div><div class='add'>+				unsigned int bkt;</div><div class='add'>+</div><div class='add'>+				params.type = ICE_VSI_VF;</div><div class='add'>+				params.port_info = event_pf-&gt;hw.port_info;</div><div class='add'>+				params.flags = ICE_VSI_FLAG_INIT;</div><div class='add'>+</div><div class='add'>+				ice_for_each_vf(lag-&gt;pf, bkt, vf) {</div><div class='add'>+					params.vf = vf;</div><div class='add'>+					nvsi = ice_vsi_setup(event_pf,</div><div class='add'>+							     &amp;params);</div><div class='add'>+					ice_lag_aa_clear_spoof(nvsi);</div><div class='add'>+					lag-&gt;sec_vf[vf-&gt;vf_id] = nvsi;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (!(lag-&gt;port_bitmap &amp; ICE_LAGS_M)) {</div><div class='add'>+				/* Secondary port was not marked up before,</div><div class='add'>+				 * move some|all VF queues to it and mark as up</div><div class='add'>+				 */</div><div class='add'>+				lag-&gt;port_bitmap |= ICE_LAGS_M;</div><div class='add'>+				ice_lag_aa_failover(lag, ICE_LAGS_IDX, event_pf);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* Port is going down */</div><div class='add'>+		if (prim_port == event_port) {</div><div class='add'>+			lag-&gt;port_bitmap &amp;= ~ICE_LAGP_M;</div><div class='add'>+			ice_lag_aa_failover(lag, ICE_LAGS_IDX, event_pf);</div><div class='add'>+		} else {</div><div class='add'>+			lag-&gt;port_bitmap &amp;= ~ICE_LAGS_M;</div><div class='add'>+			ice_lag_aa_failover(lag, ICE_LAGP_IDX, event_pf);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_lag_monitor_info - Calls relevant A/A or A/B monitoring function</div><div class='add'>+ * @lag: lag info struct</div><div class='add'>+ * @ptr: opaque data containing notifier event</div><div class='add'>+ *</div><div class='add'>+ * This function is for the primary PF to monitor changes in which port is</div><div class='add'>+ * active and handle changes for SRIOV VF functionality</div><div class='add'>+ */</div><div class='add'>+static void ice_lag_monitor_info(struct ice_lag *lag, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct netdev_notifier_bonding_info *info = ptr;</div><div class='add'>+	struct net_device *event_netdev, *event_upper;</div><div class='add'>+	struct netdev_bonding_info *bonding_info;</div><div class='add'>+</div><div class='add'>+	if (!lag-&gt;primary)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	event_netdev = netdev_notifier_info_to_dev(ptr);</div><div class='add'>+	bonding_info = &amp;info-&gt;bonding_info;</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	event_upper = netdev_master_upper_dev_get_rcu(event_netdev);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	if (!netif_is_ice(event_netdev) || event_upper != lag-&gt;upper_netdev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (lag-&gt;bond_aa)</div><div class='add'>+		ice_lag_monitor_act_act(lag, bonding_info, event_netdev);</div><div class='add'>+	else</div><div class='add'>+		ice_lag_monitor_act_bkup(lag, bonding_info, event_netdev);</div><div class='add'>+}</div><div class='add'>+/**</div><div class='ctx'>  * ice_lag_chk_comp - evaluate bonded interface for feature support</div><div class='ctx'>  * @lag: lag info struct</div><div class='ctx'>  * @ptr: opaque data for netdev event info</div><div class='hunk'>@@ -1452,13 +1986,21 @@ static void ice_lag_monitor_active(struct ice_lag *lag, void *ptr)</div><div class='ctx'> static bool</div><div class='ctx'> ice_lag_chk_comp(struct ice_lag *lag, void *ptr)</div><div class='ctx'> {</div><div class='add'>+	struct netdev_notifier_bonding_info *info = ptr;</div><div class='ctx'> 	struct net_device *event_netdev, *event_upper;</div><div class='del'>-	struct netdev_notifier_bonding_info *info;</div><div class='ctx'> 	struct netdev_bonding_info *bonding_info;</div><div class='ctx'> 	struct list_head *tmp;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	int count = 0;</div><div class='ctx'> </div><div class='add'>+	/* All members need to know if bond A/A or A/B */</div><div class='add'>+	bonding_info = &amp;info-&gt;bonding_info;</div><div class='add'>+	lag-&gt;bond_mode = bonding_info-&gt;master.bond_mode;</div><div class='add'>+	if (lag-&gt;bond_mode != BOND_MODE_ACTIVEBACKUP)</div><div class='add'>+		lag-&gt;bond_aa = true;</div><div class='add'>+	else</div><div class='add'>+		lag-&gt;bond_aa = false;</div><div class='add'>+</div><div class='ctx'> 	if (!lag-&gt;primary)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='hunk'>@@ -1479,13 +2021,9 @@ ice_lag_chk_comp(struct ice_lag *lag, void *ptr)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	info = (struct netdev_notifier_bonding_info *)ptr;</div><div class='del'>-	bonding_info = &amp;info-&gt;bonding_info;</div><div class='del'>-	lag-&gt;bond_mode = bonding_info-&gt;master.bond_mode;</div><div class='del'>-	if (lag-&gt;bond_mode != BOND_MODE_ACTIVEBACKUP) {</div><div class='del'>-		dev_info(dev, "Bond Mode not ACTIVE-BACKUP - VF LAG disabled\n");</div><div class='add'>+	if (lag-&gt;bond_aa &amp;&amp; !ice_is_feature_supported(lag-&gt;pf,</div><div class='add'>+						      ICE_F_SRIOV_AA_LAG))</div><div class='ctx'> 		return false;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	list_for_each(tmp, lag-&gt;netdev_head) {</div><div class='ctx'> 		struct ice_dcbx_cfg *dcb_cfg, *peer_dcb_cfg;</div><div class='hunk'>@@ -1589,10 +2127,9 @@ ice_lag_unregister(struct ice_lag *lag, struct net_device *event_netdev)</div><div class='ctx'> static void</div><div class='ctx'> ice_lag_monitor_rdma(struct ice_lag *lag, void *ptr)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_notifier_changeupper_info *info;</div><div class='add'>+	struct netdev_notifier_changeupper_info *info = ptr;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> </div><div class='del'>-	info = ptr;</div><div class='ctx'> 	netdev = netdev_notifier_info_to_dev(ptr);</div><div class='ctx'> </div><div class='ctx'> 	if (netdev != lag-&gt;netdev)</div><div class='hunk'>@@ -1640,12 +2177,29 @@ static void ice_lag_chk_disabled_bond(struct ice_lag *lag, void *ptr)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_lag_disable_sriov_bond(struct ice_lag *lag)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np;</div><div class='del'>-	struct ice_pf *pf;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(lag-&gt;netdev);</div><div class='ctx'> </div><div class='del'>-	np = netdev_priv(lag-&gt;netdev);</div><div class='del'>-	pf = np-&gt;vsi-&gt;back;</div><div class='ctx'> 	ice_clear_feature_support(pf, ICE_F_SRIOV_LAG);</div><div class='add'>+	ice_clear_feature_support(pf, ICE_F_SRIOV_AA_LAG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_lag_preset_drop_fltr - preset drop filter for A/B bonds</div><div class='add'>+ * @lag: local lag struct</div><div class='add'>+ * @ptr: opaque data containing event</div><div class='add'>+ *</div><div class='add'>+ * Sets the initial drop filter for secondary interface in an</div><div class='add'>+ * active-backup bond</div><div class='add'>+ */</div><div class='add'>+static void ice_lag_preset_drop_fltr(struct ice_lag *lag, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = netdev_notifier_info_to_dev(ptr);</div><div class='add'>+</div><div class='add'>+	if (netdev != lag-&gt;netdev || lag-&gt;primary || !lag-&gt;need_fltr_cfg)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ice_lag_cfg_drop_fltr(lag, true);</div><div class='add'>+	lag-&gt;need_fltr_cfg = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1686,10 +2240,12 @@ static void ice_lag_process_event(struct work_struct *work)</div><div class='ctx'> 				ice_lag_unregister(lag_work-&gt;lag, netdev);</div><div class='ctx'> 				goto lag_cleanup;</div><div class='ctx'> 			}</div><div class='del'>-			ice_lag_monitor_active(lag_work-&gt;lag,</div><div class='del'>-					       &amp;lag_work-&gt;info.bonding_info);</div><div class='ctx'> 			ice_lag_cfg_pf_fltrs(lag_work-&gt;lag,</div><div class='ctx'> 					     &amp;lag_work-&gt;info.bonding_info);</div><div class='add'>+			ice_lag_preset_drop_fltr(lag_work-&gt;lag,</div><div class='add'>+						 &amp;lag_work-&gt;info.bonding_info);</div><div class='add'>+			ice_lag_monitor_info(lag_work-&gt;lag,</div><div class='add'>+					     &amp;lag_work-&gt;info.bonding_info);</div><div class='ctx'> 		}</div><div class='ctx'> 		ice_lag_info_event(lag_work-&gt;lag, &amp;lag_work-&gt;info.bonding_info);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1762,9 +2318,8 @@ ice_lag_event_handler(struct notifier_block *notif_blk, unsigned long event,</div><div class='ctx'> 	lag_work-&gt;lag = lag;</div><div class='ctx'> 	lag_work-&gt;event = event;</div><div class='ctx'> 	if (event == NETDEV_CHANGEUPPER) {</div><div class='del'>-		struct netdev_notifier_changeupper_info *info;</div><div class='add'>+		struct netdev_notifier_changeupper_info *info = ptr;</div><div class='ctx'> </div><div class='del'>-		info = ptr;</div><div class='ctx'> 		upper_netdev = info-&gt;upper_dev;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		upper_netdev = netdev_master_upper_dev_get(netdev);</div><div class='hunk'>@@ -1814,10 +2369,8 @@ ice_lag_event_handler(struct notifier_block *notif_blk, unsigned long event,</div><div class='ctx'>  */</div><div class='ctx'> static int ice_register_lag_handler(struct ice_lag *lag)</div><div class='ctx'> {</div><div class='add'>+	struct notifier_block *notif_blk = &amp;lag-&gt;notif_block;</div><div class='ctx'> 	struct device *dev = ice_pf_to_dev(lag-&gt;pf);</div><div class='del'>-	struct notifier_block *notif_blk;</div><div class='del'>-</div><div class='del'>-	notif_blk = &amp;lag-&gt;notif_block;</div><div class='ctx'> </div><div class='ctx'> 	if (!notif_blk-&gt;notifier_call) {</div><div class='ctx'> 		notif_blk-&gt;notifier_call = ice_lag_event_handler;</div><div class='hunk'>@@ -1837,10 +2390,9 @@ static int ice_register_lag_handler(struct ice_lag *lag)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_unregister_lag_handler(struct ice_lag *lag)</div><div class='ctx'> {</div><div class='add'>+	struct notifier_block *notif_blk = &amp;lag-&gt;notif_block;</div><div class='ctx'> 	struct device *dev = ice_pf_to_dev(lag-&gt;pf);</div><div class='del'>-	struct notifier_block *notif_blk;</div><div class='ctx'> </div><div class='del'>-	notif_blk = &amp;lag-&gt;notif_block;</div><div class='ctx'> 	if (notif_blk-&gt;notifier_call) {</div><div class='ctx'> 		unregister_netdevice_notifier(notif_blk);</div><div class='ctx'> 		dev_dbg(dev, "LAG event handler unregistered\n");</div><div class='hunk'>@@ -1902,13 +2454,12 @@ ice_lag_move_vf_nodes_tc_sync(struct ice_lag *lag, struct ice_hw *dest_hw,</div><div class='ctx'> 	u16 numq, valq, num_moved, qbuf_size;</div><div class='ctx'> 	u16 buf_size = __struct_size(buf);</div><div class='ctx'> 	struct ice_aqc_cfg_txqs_buf *qbuf;</div><div class='add'>+	struct ice_hw *hw = &amp;lag-&gt;pf-&gt;hw;</div><div class='ctx'> 	struct ice_sched_node *n_prt;</div><div class='ctx'> 	__le32 teid, parent_teid;</div><div class='ctx'> 	struct ice_vsi_ctx *ctx;</div><div class='del'>-	struct ice_hw *hw;</div><div class='ctx'> 	u32 tmp_teid;</div><div class='ctx'> </div><div class='del'>-	hw = &amp;lag-&gt;pf-&gt;hw;</div><div class='ctx'> 	ctx = ice_get_vsi_ctx(hw, vsi_num);</div><div class='ctx'> 	if (!ctx) {</div><div class='ctx'> 		dev_warn(dev, "LAG rebuild failed after reset due to VSI Context failure\n");</div><div class='hunk'>@@ -1945,7 +2496,8 @@ ice_lag_move_vf_nodes_tc_sync(struct ice_lag *lag, struct ice_hw *dest_hw,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ice_aq_cfg_lan_txq(hw, qbuf, qbuf_size, numq, hw-&gt;port_info-&gt;lport,</div><div class='del'>-			       dest_hw-&gt;port_info-&gt;lport, NULL)) {</div><div class='add'>+			       dest_hw-&gt;port_info-&gt;lport,</div><div class='add'>+			       ICE_AQC_Q_CFG_TC_CHNG, NULL)) {</div><div class='ctx'> 		dev_warn(dev, "Failure to configure queues for LAG reset rebuild\n");</div><div class='ctx'> 		goto sync_qerr;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2041,9 +2593,13 @@ int ice_init_lag(struct ice_pf *pf)</div><div class='ctx'> 	lag-&gt;netdev = vsi-&gt;netdev;</div><div class='ctx'> 	lag-&gt;role = ICE_LAG_NONE;</div><div class='ctx'> 	lag-&gt;active_port = ICE_LAG_INVALID_PORT;</div><div class='add'>+	lag-&gt;port_bitmap = 0x0;</div><div class='ctx'> 	lag-&gt;bonded = false;</div><div class='add'>+	lag-&gt;bond_aa = false;</div><div class='add'>+	lag-&gt;need_fltr_cfg = false;</div><div class='ctx'> 	lag-&gt;upper_netdev = NULL;</div><div class='ctx'> 	lag-&gt;notif_block.notifier_call = NULL;</div><div class='add'>+	memset(lag-&gt;sec_vf, 0, sizeof(lag-&gt;sec_vf));</div><div class='ctx'> </div><div class='ctx'> 	err = ice_register_lag_handler(lag);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -2061,6 +2617,11 @@ int ice_init_lag(struct ice_pf *pf)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto free_rcp_res;</div><div class='ctx'> </div><div class='add'>+	err = ice_create_lag_recipe(&amp;pf-&gt;hw, &amp;lag-&gt;act_act_recipe,</div><div class='add'>+				    ice_lport_rcp, 1);</div><div class='add'>+	if (err)</div><div class='add'>+		goto  free_lport_res;</div><div class='add'>+</div><div class='ctx'> 	/* associate recipes to profiles */</div><div class='ctx'> 	for (n = 0; n &lt; ICE_PROFID_IPV6_GTPU_IPV6_TCP_INNER; n++) {</div><div class='ctx'> 		err = ice_aq_get_recipe_to_profile(&amp;pf-&gt;hw, n,</div><div class='hunk'>@@ -2070,7 +2631,8 @@ int ice_init_lag(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 		if (recipe_bits &amp; BIT(ICE_SW_LKUP_DFLT)) {</div><div class='ctx'> 			recipe_bits |= BIT(lag-&gt;pf_recipe) |</div><div class='del'>-				       BIT(lag-&gt;lport_recipe);</div><div class='add'>+				       BIT(lag-&gt;lport_recipe) |</div><div class='add'>+				       BIT(lag-&gt;act_act_recipe);</div><div class='ctx'> 			ice_aq_map_recipe_to_profile(&amp;pf-&gt;hw, n,</div><div class='ctx'> 						     recipe_bits, NULL);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2081,9 +2643,13 @@ int ice_init_lag(struct ice_pf *pf)</div><div class='ctx'> 	dev_dbg(dev, "INIT LAG complete\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+free_lport_res:</div><div class='add'>+	ice_free_hw_res(&amp;pf-&gt;hw, ICE_AQC_RES_TYPE_RECIPE, 1,</div><div class='add'>+			&amp;lag-&gt;lport_recipe);</div><div class='add'>+</div><div class='ctx'> free_rcp_res:</div><div class='ctx'> 	ice_free_hw_res(&amp;pf-&gt;hw, ICE_AQC_RES_TYPE_RECIPE, 1,</div><div class='del'>-			&amp;pf-&gt;lag-&gt;pf_recipe);</div><div class='add'>+			&amp;lag-&gt;pf_recipe);</div><div class='ctx'> lag_error:</div><div class='ctx'> 	kfree(lag);</div><div class='ctx'> 	pf-&gt;lag = NULL;</div><div class='hunk'>@@ -2099,9 +2665,7 @@ lag_error:</div><div class='ctx'>  */</div><div class='ctx'> void ice_deinit_lag(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	struct ice_lag *lag;</div><div class='del'>-</div><div class='del'>-	lag = pf-&gt;lag;</div><div class='add'>+	struct ice_lag *lag = pf-&gt;lag;</div><div class='ctx'> </div><div class='ctx'> 	if (!lag)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2170,11 +2734,15 @@ void ice_lag_rebuild(struct ice_pf *pf)</div><div class='ctx'> 			ice_lag_move_vf_nodes_sync(prim_lag, &amp;pf-&gt;hw);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ice_lag_cfg_cp_fltr(lag, true);</div><div class='add'>+	if (!lag-&gt;bond_aa) {</div><div class='add'>+		ice_lag_cfg_lp_fltr(lag, true, true);</div><div class='add'>+		if (lag-&gt;pf_rx_rule_id)</div><div class='add'>+			if (ice_lag_cfg_dflt_fltr(lag, true))</div><div class='add'>+				dev_err(ice_pf_to_dev(pf), "Error adding default VSI rule in rebuild\n");</div><div class='add'>+	} else {</div><div class='add'>+		ice_lag_cfg_lp_fltr(lag, true, false);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (lag-&gt;pf_rx_rule_id)</div><div class='del'>-		if (ice_lag_cfg_dflt_fltr(lag, true))</div><div class='del'>-			dev_err(ice_pf_to_dev(pf), "Error adding default VSI rule in rebuild\n");</div><div class='ctx'> </div><div class='ctx'> 	ice_clear_rdma_cap(pf);</div><div class='ctx'> lag_rebuild_out:</div><div class='hunk'>@@ -2193,7 +2761,8 @@ bool ice_lag_is_switchdev_running(struct ice_pf *pf)</div><div class='ctx'> 	struct ice_lag *lag = pf-&gt;lag;</div><div class='ctx'> 	struct net_device *tmp_nd;</div><div class='ctx'> </div><div class='del'>-	if (!ice_is_feature_supported(pf, ICE_F_SRIOV_LAG) || !lag)</div><div class='add'>+	if (!ice_is_feature_supported(pf, ICE_F_SRIOV_LAG) ||</div><div class='add'>+	    !lag || !lag-&gt;upper_netdev)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_lag.h b/drivers/net/ethernet/intel/ice/ice_lag.h<br/>index bab2c83142a1..f77ebcd61042 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_lag.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_lag.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_lag.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_lag.h</a></div><div class='hunk'>@@ -14,7 +14,11 @@ enum ice_lag_role {</div><div class='ctx'> 	ICE_LAG_UNSET</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define ICE_LAG_INVALID_PORT 0xFF</div><div class='add'>+#define ICE_LAG_INVALID_PORT		0xFF</div><div class='add'>+#define ICE_LAGP_IDX			0</div><div class='add'>+#define ICE_LAGS_IDX			1</div><div class='add'>+#define ICE_LAGP_M			0x1</div><div class='add'>+#define ICE_LAGS_M			0x2</div><div class='ctx'> </div><div class='ctx'> #define ICE_LAG_RESET_RETRIES		5</div><div class='ctx'> #define ICE_SW_DEFAULT_PROFILE		0</div><div class='hunk'>@@ -41,12 +45,26 @@ struct ice_lag {</div><div class='ctx'> 	u8 active_port; /* lport value for the current active port */</div><div class='ctx'> 	u8 bonded:1; /* currently bonded */</div><div class='ctx'> 	u8 primary:1; /* this is primary */</div><div class='add'>+	u8 bond_aa:1; /* is this bond active-active */</div><div class='add'>+	u8 need_fltr_cfg:1; /* fltrs for A/A bond still need to be make */</div><div class='add'>+	u8 port_bitmap:2; /* bitmap of active ports */</div><div class='add'>+	u8 bond_lport_pri; /* lport values for primary PF */</div><div class='add'>+	u8 bond_lport_sec; /* lport values for secondary PF */</div><div class='add'>+</div><div class='add'>+	/* q_home keeps track of which interface the q is currently on */</div><div class='add'>+	u8 q_home[ICE_MAX_SRIOV_VFS][ICE_MAX_RSS_QS_PER_VF];</div><div class='add'>+</div><div class='add'>+	/* placeholder VSI for hanging VF queues from on secondary interface */</div><div class='add'>+	struct ice_vsi *sec_vf[ICE_MAX_SRIOV_VFS];</div><div class='add'>+</div><div class='ctx'> 	u16 pf_recipe;</div><div class='ctx'> 	u16 lport_recipe;</div><div class='add'>+	u16 act_act_recipe;</div><div class='ctx'> 	u16 pf_rx_rule_id;</div><div class='ctx'> 	u16 pf_tx_rule_id;</div><div class='ctx'> 	u16 cp_rule_idx;</div><div class='ctx'> 	u16 lport_rule_idx;</div><div class='add'>+	u16 act_act_rule_idx;</div><div class='ctx'> 	u8 role;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -64,10 +82,12 @@ struct ice_lag_work {</div><div class='ctx'> 	} info;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void ice_lag_move_new_vf_nodes(struct ice_vf *vf);</div><div class='add'>+void ice_lag_aa_failover(struct ice_lag *lag, u8 dest, struct ice_pf *e_pf);</div><div class='ctx'> int ice_init_lag(struct ice_pf *pf);</div><div class='ctx'> void ice_deinit_lag(struct ice_pf *pf);</div><div class='ctx'> void ice_lag_rebuild(struct ice_pf *pf);</div><div class='ctx'> bool ice_lag_is_switchdev_running(struct ice_pf *pf);</div><div class='ctx'> void ice_lag_move_vf_nodes_cfg(struct ice_lag *lag, u8 src_prt, u8 dst_prt);</div><div class='add'>+u8 ice_lag_prepare_vf_reset(struct ice_lag *lag);</div><div class='add'>+void ice_lag_complete_vf_reset(struct ice_lag *lag, u8 act_prt);</div><div class='ctx'> #endif /* _ICE_LAG_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h b/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h<br/>index 611577ebc29d..185672c7e17d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h</a></div><div class='hunk'>@@ -229,7 +229,7 @@ struct ice_32b_rx_flex_desc_nic {</div><div class='ctx'> 	__le16 status_error1;</div><div class='ctx'> 	u8 flexi_flags2;</div><div class='ctx'> 	u8 ts_low;</div><div class='del'>-	__le16 l2tag2_1st;</div><div class='add'>+	__le16 raw_csum;</div><div class='ctx'> 	__le16 l2tag2_2nd;</div><div class='ctx'> </div><div class='ctx'> 	/* Qword 3 */</div><div class='hunk'>@@ -342,6 +342,9 @@ enum ice_flg64_bits {</div><div class='ctx'> /* for ice_32byte_rx_flex_desc.pkt_length member */</div><div class='ctx'> #define ICE_RX_FLX_DESC_PKT_LEN_M	(0x3FFF) /* 14-bits */</div><div class='ctx'> </div><div class='add'>+/* ice_32byte_rx_flex_desc::hdr_len_sph_flex_flags1 */</div><div class='add'>+#define ICE_RX_FLEX_DESC_HDR_LEN_M	GENMASK(10, 0)</div><div class='add'>+</div><div class='ctx'> enum ice_rx_flex_desc_status_error_0_bits {</div><div class='ctx'> 	/* Note: These are predefined bit offsets */</div><div class='ctx'> 	ICE_RX_FLEX_DESC_STATUS0_DD_S = 0,</div><div class='hunk'>@@ -371,29 +374,21 @@ enum ice_rx_flex_desc_status_error_1_bits {</div><div class='ctx'> 	ICE_RX_FLEX_DESC_STATUS1_LAST /* this entry must be last!!! */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define ICE_RXQ_CTX_SIZE_DWORDS		8</div><div class='del'>-#define ICE_RXQ_CTX_SZ			(ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32))</div><div class='ctx'> #define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS	22</div><div class='ctx'> #define ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS	5</div><div class='ctx'> #define GLTCLAN_CQ_CNTX(i, CQ)		(GLTCLAN_CQ_CNTX0(CQ) + ((i) * 0x0800))</div><div class='ctx'> </div><div class='del'>-/* RLAN Rx queue context data</div><div class='del'>- *</div><div class='del'>- * The sizes of the variables may be larger than needed due to crossing byte</div><div class='del'>- * boundaries. If we do not have the width of the variable set to the correct</div><div class='del'>- * size then we could end up shifting bits off the top of the variable when the</div><div class='del'>- * variable is at the top of a byte and crosses over into the next byte.</div><div class='del'>- */</div><div class='add'>+/* RLAN Rx queue context data */</div><div class='ctx'> struct ice_rlan_ctx {</div><div class='ctx'> 	u16 head;</div><div class='del'>-	u16 cpuid; /* bigger than needed, see above for reason */</div><div class='add'>+	u8 cpuid;</div><div class='ctx'> #define ICE_RLAN_BASE_S 7</div><div class='ctx'> 	u64 base;</div><div class='ctx'> 	u16 qlen;</div><div class='ctx'> #define ICE_RLAN_CTX_DBUF_S 7</div><div class='del'>-	u16 dbuf; /* bigger than needed, see above for reason */</div><div class='add'>+	u8 dbuf;</div><div class='ctx'> #define ICE_RLAN_CTX_HBUF_S 6</div><div class='del'>-	u16 hbuf; /* bigger than needed, see above for reason */</div><div class='add'>+	u8 hbuf;</div><div class='ctx'> 	u8 dtype;</div><div class='ctx'> 	u8 dsize;</div><div class='ctx'> 	u8 crcstrip;</div><div class='hunk'>@@ -401,29 +396,15 @@ struct ice_rlan_ctx {</div><div class='ctx'> 	u8 hsplit_0;</div><div class='ctx'> 	u8 hsplit_1;</div><div class='ctx'> 	u8 showiv;</div><div class='del'>-	u32 rxmax; /* bigger than needed, see above for reason */</div><div class='add'>+	u16 rxmax;</div><div class='ctx'> 	u8 tphrdesc_ena;</div><div class='ctx'> 	u8 tphwdesc_ena;</div><div class='ctx'> 	u8 tphdata_ena;</div><div class='ctx'> 	u8 tphhead_ena;</div><div class='del'>-	u16 lrxqthresh; /* bigger than needed, see above for reason */</div><div class='add'>+	u8 lrxqthresh;</div><div class='ctx'> 	u8 prefena;	/* NOTE: normally must be set to 1 at init */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ice_ctx_ele {</div><div class='del'>-	u16 offset;</div><div class='del'>-	u16 size_of;</div><div class='del'>-	u16 width;</div><div class='del'>-	u16 lsb;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ICE_CTX_STORE(_struct, _ele, _width, _lsb) {	\</div><div class='del'>-	.offset = offsetof(struct _struct, _ele),	\</div><div class='del'>-	.size_of = sizeof_field(struct _struct, _ele),	\</div><div class='del'>-	.width = _width,				\</div><div class='del'>-	.lsb = _lsb,					\</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* for hsplit_0 field of Rx RLAN context */</div><div class='ctx'> enum ice_rlan_ctx_rx_hsplit_0 {</div><div class='ctx'> 	ICE_RLAN_RX_HSPLIT_0_NO_SPLIT		= 0,</div><div class='hunk'>@@ -500,10 +481,15 @@ enum ice_tx_desc_len_fields {</div><div class='ctx'> struct ice_tx_ctx_desc {</div><div class='ctx'> 	__le32 tunneling_params;</div><div class='ctx'> 	__le16 l2tag2;</div><div class='del'>-	__le16 rsvd;</div><div class='add'>+	__le16 gcs;</div><div class='ctx'> 	__le64 qw1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define ICE_TX_GCS_DESC_START_M		GENMASK(7, 0)</div><div class='add'>+#define ICE_TX_GCS_DESC_OFFSET_M	GENMASK(11, 8)</div><div class='add'>+#define ICE_TX_GCS_DESC_TYPE_M		GENMASK(14, 12)</div><div class='add'>+#define ICE_TX_GCS_DESC_CSUM_PSH	1</div><div class='add'>+</div><div class='ctx'> #define ICE_TXD_CTX_QW1_CMD_S	4</div><div class='ctx'> #define ICE_TXD_CTX_QW1_CMD_M	(0x7FUL &lt;&lt; ICE_TXD_CTX_QW1_CMD_S)</div><div class='ctx'> </div><div class='hunk'>@@ -551,18 +537,12 @@ enum ice_tx_ctx_desc_eipt_offload {</div><div class='ctx'> #define ICE_LAN_TXQ_MAX_QGRPS	127</div><div class='ctx'> #define ICE_LAN_TXQ_MAX_QDIS	1023</div><div class='ctx'> </div><div class='del'>-/* Tx queue context data</div><div class='del'>- *</div><div class='del'>- * The sizes of the variables may be larger than needed due to crossing byte</div><div class='del'>- * boundaries. If we do not have the width of the variable set to the correct</div><div class='del'>- * size then we could end up shifting bits off the top of the variable when the</div><div class='del'>- * variable is at the top of a byte and crosses over into the next byte.</div><div class='del'>- */</div><div class='add'>+/* Tx queue context data */</div><div class='ctx'> struct ice_tlan_ctx {</div><div class='ctx'> #define ICE_TLAN_CTX_BASE_S	7</div><div class='ctx'> 	u64 base;		/* base is defined in 128-byte units */</div><div class='ctx'> 	u8 port_num;</div><div class='del'>-	u16 cgd_num;		/* bigger than needed, see above for reason */</div><div class='add'>+	u8 cgd_num;</div><div class='ctx'> 	u8 pf_num;</div><div class='ctx'> 	u16 vmvf_num;</div><div class='ctx'> 	u8 vmvf_type;</div><div class='hunk'>@@ -573,7 +553,7 @@ struct ice_tlan_ctx {</div><div class='ctx'> 	u8 tsyn_ena;</div><div class='ctx'> 	u8 internal_usage_flag;</div><div class='ctx'> 	u8 alt_vlan;</div><div class='del'>-	u16 cpuid;		/* bigger than needed, see above for reason */</div><div class='add'>+	u8 cpuid;</div><div class='ctx'> 	u8 wb_mode;</div><div class='ctx'> 	u8 tphrd_desc;</div><div class='ctx'> 	u8 tphrd;</div><div class='hunk'>@@ -582,7 +562,7 @@ struct ice_tlan_ctx {</div><div class='ctx'> 	u16 qnum_in_func;</div><div class='ctx'> 	u8 itr_notification_mode;</div><div class='ctx'> 	u8 adjust_prof_id;</div><div class='del'>-	u32 qlen;		/* bigger than needed, see above for reason */</div><div class='add'>+	u16 qlen;</div><div class='ctx'> 	u8 quanta_prof_idx;</div><div class='ctx'> 	u8 tso_ena;</div><div class='ctx'> 	u16 tso_qnum;</div><div class='hunk'>@@ -590,7 +570,47 @@ struct ice_tlan_ctx {</div><div class='ctx'> 	u8 drop_ena;</div><div class='ctx'> 	u8 cache_prof_idx;</div><div class='ctx'> 	u8 pkt_shaper_prof_idx;</div><div class='del'>-	u8 int_q_state;	/* width not needed - internal - DO NOT WRITE!!! */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICE_TXTIME_TX_DESC_IDX_M	GENMASK(12, 0)</div><div class='add'>+#define ICE_TXTIME_STAMP_M		GENMASK(31, 13)</div><div class='add'>+</div><div class='add'>+/* Tx time stamp descriptor */</div><div class='add'>+struct ice_ts_desc {</div><div class='add'>+	__le32 tx_desc_idx_tstamp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICE_TS_DESC(R, i) (&amp;(((struct ice_ts_desc *)((R)-&gt;desc))[i]))</div><div class='add'>+</div><div class='add'>+#define ICE_TXTIME_MAX_QUEUE		2047</div><div class='add'>+#define ICE_SET_TXTIME_MAX_Q_AMOUNT	127</div><div class='add'>+#define ICE_TXTIME_FETCH_TS_DESC_DFLT	8</div><div class='add'>+#define ICE_TXTIME_FETCH_PROFILE_CNT	16</div><div class='add'>+</div><div class='add'>+/* Tx Time queue context data */</div><div class='add'>+struct ice_txtime_ctx {</div><div class='add'>+#define ICE_TXTIME_CTX_BASE_S		7</div><div class='add'>+	u64 base;			/* base is defined in 128-byte units */</div><div class='add'>+	u8 pf_num;</div><div class='add'>+	u16 vmvf_num;</div><div class='add'>+	u8 vmvf_type;</div><div class='add'>+	u16 src_vsi;</div><div class='add'>+	u8 cpuid;</div><div class='add'>+	u8 tphrd_desc;</div><div class='add'>+	u16 qlen;</div><div class='add'>+	u8 timer_num;</div><div class='add'>+	u8 txtime_ena_q;</div><div class='add'>+	u8 drbell_mode_32;</div><div class='add'>+#define ICE_TXTIME_CTX_DRBELL_MODE_32	1</div><div class='add'>+	u8 ts_res;</div><div class='add'>+#define ICE_TXTIME_CTX_RESOLUTION_128NS 7</div><div class='add'>+	u8 ts_round_type;</div><div class='add'>+	u8 ts_pacing_slot;</div><div class='add'>+#define ICE_TXTIME_CTX_FETCH_PROF_ID_0 0</div><div class='add'>+	u8 merging_ena;</div><div class='add'>+	u8 ts_fetch_prof_id;</div><div class='add'>+	u8 ts_fetch_cache_line_aln_thld;</div><div class='add'>+	u8 tx_pipe_delay_mode;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif /* _ICE_LAN_TX_RX_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c<br/>index d4e74f96a8ad..15621707fbf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_lib.c</a></div><div class='hunk'>@@ -157,6 +157,16 @@ static void ice_vsi_set_num_desc(struct ice_vsi *vsi)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u16 ice_get_rxq_count(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	return min(ice_get_avail_rxq_count(pf), num_online_cpus());</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 ice_get_txq_count(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	return min(ice_get_avail_txq_count(pf), num_online_cpus());</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_vsi_set_num_qs - Set number of queues, descriptors and vectors for a VSI</div><div class='ctx'>  * @vsi: the VSI being configured</div><div class='hunk'>@@ -178,9 +188,7 @@ static void ice_vsi_set_num_qs(struct ice_vsi *vsi)</div><div class='ctx'> 			vsi-&gt;alloc_txq = vsi-&gt;req_txq;</div><div class='ctx'> 			vsi-&gt;num_txq = vsi-&gt;req_txq;</div><div class='ctx'> 		} else {</div><div class='del'>-			vsi-&gt;alloc_txq = min3(pf-&gt;num_lan_msix,</div><div class='del'>-					      ice_get_avail_txq_count(pf),</div><div class='del'>-					      (u16)num_online_cpus());</div><div class='add'>+			vsi-&gt;alloc_txq = ice_get_txq_count(pf);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		pf-&gt;num_lan_tx = vsi-&gt;alloc_txq;</div><div class='hunk'>@@ -193,17 +201,13 @@ static void ice_vsi_set_num_qs(struct ice_vsi *vsi)</div><div class='ctx'> 				vsi-&gt;alloc_rxq = vsi-&gt;req_rxq;</div><div class='ctx'> 				vsi-&gt;num_rxq = vsi-&gt;req_rxq;</div><div class='ctx'> 			} else {</div><div class='del'>-				vsi-&gt;alloc_rxq = min3(pf-&gt;num_lan_msix,</div><div class='del'>-						      ice_get_avail_rxq_count(pf),</div><div class='del'>-						      (u16)num_online_cpus());</div><div class='add'>+				vsi-&gt;alloc_rxq = ice_get_rxq_count(pf);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		pf-&gt;num_lan_rx = vsi-&gt;alloc_rxq;</div><div class='ctx'> </div><div class='del'>-		vsi-&gt;num_q_vectors = min_t(int, pf-&gt;num_lan_msix,</div><div class='del'>-					   max_t(int, vsi-&gt;alloc_rxq,</div><div class='del'>-						 vsi-&gt;alloc_txq));</div><div class='add'>+		vsi-&gt;num_q_vectors = max(vsi-&gt;alloc_rxq, vsi-&gt;alloc_txq);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ICE_VSI_SF:</div><div class='ctx'> 		vsi-&gt;alloc_txq = 1;</div><div class='hunk'>@@ -480,8 +484,7 @@ static irqreturn_t ice_msix_clean_ctrl_vsi(int __always_unused irq, void *data)</div><div class='ctx'> 	if (!q_vector-&gt;tx.tx_ring)</div><div class='ctx'> 		return IRQ_HANDLED;</div><div class='ctx'> </div><div class='del'>-#define FDIR_RX_DESC_CLEAN_BUDGET 64</div><div class='del'>-	ice_clean_rx_irq(q_vector-&gt;rx.rx_ring, FDIR_RX_DESC_CLEAN_BUDGET);</div><div class='add'>+	ice_clean_ctrl_rx_irq(q_vector-&gt;rx.rx_ring);</div><div class='ctx'> 	ice_clean_ctrl_tx_irq(q_vector-&gt;tx.tx_ring);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='hunk'>@@ -567,6 +570,8 @@ ice_vsi_alloc_def(struct ice_vsi *vsi, struct ice_channel *ch)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	vsi-&gt;irq_dyn_alloc = pci_msix_can_alloc_dyn(vsi-&gt;back-&gt;pdev);</div><div class='add'>+</div><div class='ctx'> 	switch (vsi-&gt;type) {</div><div class='ctx'> 	case ICE_VSI_PF:</div><div class='ctx'> 	case ICE_VSI_SF:</div><div class='hunk'>@@ -827,7 +832,13 @@ bool ice_is_safe_mode(struct ice_pf *pf)</div><div class='ctx'>  */</div><div class='ctx'> bool ice_is_rdma_ena(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	return test_bit(ICE_FLAG_RDMA_ENA, pf-&gt;flags);</div><div class='add'>+	union devlink_param_value value;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = devl_param_driverinit_value_get(priv_to_devlink(pf),</div><div class='add'>+					      DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA,</div><div class='add'>+					      &amp;value);</div><div class='add'>+	return err ? test_bit(ICE_FLAG_RDMA_ENA, pf-&gt;flags) : value.vbool;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1173,12 +1184,11 @@ static void ice_set_rss_vsi_ctx(struct ice_vsi_ctx *ctxt, struct ice_vsi *vsi)</div><div class='ctx'> static void</div><div class='ctx'> ice_chnl_vsi_setup_q_map(struct ice_vsi *vsi, struct ice_vsi_ctx *ctxt)</div><div class='ctx'> {</div><div class='del'>-	struct ice_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	u16 qcount, qmap;</div><div class='ctx'> 	u8 offset = 0;</div><div class='ctx'> 	int pow;</div><div class='ctx'> </div><div class='del'>-	qcount = min_t(int, vsi-&gt;num_rxq, pf-&gt;num_lan_msix);</div><div class='add'>+	qcount = vsi-&gt;num_rxq;</div><div class='ctx'> </div><div class='ctx'> 	pow = order_base_2(qcount);</div><div class='ctx'> 	qmap = FIELD_PREP(ICE_AQ_VSI_TC_Q_OFFSET_M, offset);</div><div class='hunk'>@@ -1417,9 +1427,12 @@ static int ice_vsi_alloc_rings(struct ice_vsi *vsi)</div><div class='ctx'> 		ring-&gt;reg_idx = vsi-&gt;rxq_map[i];</div><div class='ctx'> 		ring-&gt;vsi = vsi;</div><div class='ctx'> 		ring-&gt;netdev = vsi-&gt;netdev;</div><div class='del'>-		ring-&gt;dev = dev;</div><div class='ctx'> 		ring-&gt;count = vsi-&gt;num_rx_desc;</div><div class='ctx'> 		ring-&gt;cached_phctime = pf-&gt;ptp.cached_phc_time;</div><div class='add'>+</div><div class='add'>+		if (ice_is_feature_supported(pf, ICE_F_GCS))</div><div class='add'>+			ring-&gt;flags |= ICE_RX_FLAGS_RING_GCS;</div><div class='add'>+</div><div class='ctx'> 		WRITE_ONCE(vsi-&gt;rx_rings[i], ring);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1564,7 +1577,7 @@ static void ice_vsi_set_vf_rss_flow_fld(struct ice_vsi *vsi)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	status = ice_add_avf_rss_cfg(&amp;pf-&gt;hw, vsi, ICE_DEFAULT_RSS_HENA);</div><div class='add'>+	status = ice_add_avf_rss_cfg(&amp;pf-&gt;hw, vsi, ICE_DEFAULT_RSS_HASHCFG);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		dev_dbg(dev, "ice_add_avf_rss_cfg failed for vsi = %d, error = %d\n",</div><div class='ctx'> 			vsi-&gt;vsi_num, status);</div><div class='hunk'>@@ -1700,6 +1713,12 @@ bool ice_pf_state_is_nominal(struct ice_pf *pf)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define ICE_FW_MODE_REC_M BIT(1)</div><div class='add'>+bool ice_is_recovery_mode(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	return rd32(hw, GL_MNG_FWSM) &amp; ICE_FW_MODE_REC_M;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_update_eth_stats - Update VSI-specific ethernet statistics counters</div><div class='ctx'>  * @vsi: the VSI to be updated</div><div class='hunk'>@@ -1758,9 +1777,8 @@ void ice_update_eth_stats(struct ice_vsi *vsi)</div><div class='ctx'>  * @prio: priority for the RXDID for this queue</div><div class='ctx'>  * @ena_ts: true to enable timestamp and false to disable timestamp</div><div class='ctx'>  */</div><div class='del'>-void</div><div class='del'>-ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio,</div><div class='del'>-			bool ena_ts)</div><div class='add'>+void ice_write_qrxflxp_cntxt(struct ice_hw *hw, u16 pf_q, u32 rxdid, u32 prio,</div><div class='add'>+			     bool ena_ts)</div><div class='ctx'> {</div><div class='ctx'> 	int regval = rd32(hw, QRXFLXP_CNTXT(pf_q));</div><div class='ctx'> </div><div class='hunk'>@@ -2045,12 +2063,15 @@ static void ice_vsi_set_tc_cfg(struct ice_vsi *vsi)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_cfg_sw_lldp - Config switch rules for LLDP packet handling</div><div class='add'>+ * ice_vsi_cfg_sw_lldp - Config switch rules for LLDP packet handling</div><div class='ctx'>  * @vsi: the VSI being configured</div><div class='ctx'>  * @tx: bool to determine Tx or Rx rule</div><div class='ctx'>  * @create: bool to determine create or remove Rule</div><div class='add'>+ *</div><div class='add'>+ * Adding an ethtype Tx rule to the uplink VSI results in it being applied</div><div class='add'>+ * to the whole port, so LLDP transmission for VFs will be blocked too.</div><div class='ctx'>  */</div><div class='del'>-void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create)</div><div class='add'>+void ice_vsi_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create)</div><div class='ctx'> {</div><div class='ctx'> 	int (*eth_fltr)(struct ice_vsi *v, u16 type, u16 flag,</div><div class='ctx'> 			enum ice_sw_fwd_act_type act);</div><div class='hunk'>@@ -2065,19 +2086,59 @@ void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create)</div><div class='ctx'> 		status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_TX,</div><div class='ctx'> 				  ICE_DROP_PACKET);</div><div class='ctx'> 	} else {</div><div class='del'>-		if (ice_fw_supports_lldp_fltr_ctrl(&amp;pf-&gt;hw)) {</div><div class='del'>-			status = ice_lldp_fltr_add_remove(&amp;pf-&gt;hw, vsi-&gt;vsi_num,</div><div class='del'>-							  create);</div><div class='del'>-		} else {</div><div class='add'>+		if (!test_bit(ICE_FLAG_LLDP_AQ_FLTR, pf-&gt;flags)) {</div><div class='ctx'> 			status = eth_fltr(vsi, ETH_P_LLDP, ICE_FLTR_RX,</div><div class='ctx'> 					  ICE_FWD_TO_VSI);</div><div class='add'>+			if (!status || !create)</div><div class='add'>+				goto report;</div><div class='add'>+</div><div class='add'>+			dev_info(dev,</div><div class='add'>+				 "Failed to add generic LLDP Rx filter on VSI %i error: %d, falling back to specialized AQ control\n",</div><div class='add'>+				 vsi-&gt;vsi_num, status);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		status = ice_lldp_fltr_add_remove(&amp;pf-&gt;hw, vsi, create);</div><div class='add'>+		if (!status)</div><div class='add'>+			set_bit(ICE_FLAG_LLDP_AQ_FLTR, pf-&gt;flags);</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+report:</div><div class='ctx'> 	if (status)</div><div class='del'>-		dev_dbg(dev, "Fail %s %s LLDP rule on VSI %i error: %d\n",</div><div class='del'>-			create ? "adding" : "removing", tx ? "TX" : "RX",</div><div class='del'>-			vsi-&gt;vsi_num, status);</div><div class='add'>+		dev_warn(dev, "Failed to %s %s LLDP rule on VSI %i error: %d\n",</div><div class='add'>+			 create ? "add" : "remove", tx ? "Tx" : "Rx",</div><div class='add'>+			 vsi-&gt;vsi_num, status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_cfg_sw_rx_lldp - Enable/disable software handling of LLDP</div><div class='add'>+ * @pf: the PF being configured</div><div class='add'>+ * @enable: enable or disable</div><div class='add'>+ *</div><div class='add'>+ * Configure switch rules to enable/disable LLDP handling by software</div><div class='add'>+ * across PF.</div><div class='add'>+ */</div><div class='add'>+void ice_cfg_sw_rx_lldp(struct ice_pf *pf, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	struct ice_vf *vf;</div><div class='add'>+	unsigned int bkt;</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_main_vsi(pf);</div><div class='add'>+	ice_vsi_cfg_sw_lldp(vsi, false, enable);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_FLAG_SRIOV_ENA, pf-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ice_for_each_vf(pf, bkt, vf) {</div><div class='add'>+		vsi = ice_get_vf_vsi(vf);</div><div class='add'>+</div><div class='add'>+		if (WARN_ON(!vsi))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ice_vf_is_lldp_ena(vf))</div><div class='add'>+			ice_vsi_cfg_sw_lldp(vsi, false, enable);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2508,7 +2569,7 @@ ice_vsi_setup(struct ice_pf *pf, struct ice_vsi_cfg_params *params)</div><div class='ctx'> 	if (!ice_is_safe_mode(pf) &amp;&amp; vsi-&gt;type == ICE_VSI_PF) {</div><div class='ctx'> 		ice_fltr_add_eth(vsi, ETH_P_PAUSE, ICE_FLTR_TX,</div><div class='ctx'> 				 ICE_DROP_PACKET);</div><div class='del'>-		ice_cfg_sw_lldp(vsi, true, true);</div><div class='add'>+		ice_vsi_cfg_sw_lldp(vsi, true, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!vsi-&gt;agg_node)</div><div class='hunk'>@@ -2576,7 +2637,6 @@ void ice_vsi_free_irq(struct ice_vsi *vsi)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	vsi-&gt;irqs_ready = false;</div><div class='del'>-	ice_free_cpu_rx_rmap(vsi);</div><div class='ctx'> </div><div class='ctx'> 	ice_for_each_q_vector(vsi, i) {</div><div class='ctx'> 		int irq_num;</div><div class='hunk'>@@ -2589,12 +2649,6 @@ void ice_vsi_free_irq(struct ice_vsi *vsi)</div><div class='ctx'> 		      vsi-&gt;q_vectors[i]-&gt;num_ring_rx))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		/* clear the affinity notifier in the IRQ descriptor */</div><div class='del'>-		if (!IS_ENABLED(CONFIG_RFS_ACCEL))</div><div class='del'>-			irq_set_affinity_notifier(irq_num, NULL);</div><div class='del'>-</div><div class='del'>-		/* clear the affinity_hint in the IRQ descriptor */</div><div class='del'>-		irq_update_affinity_hint(irq_num, NULL);</div><div class='ctx'> 		synchronize_irq(irq_num);</div><div class='ctx'> 		devm_free_irq(ice_pf_to_dev(pf), irq_num, vsi-&gt;q_vectors[i]);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2714,7 +2768,6 @@ void ice_dis_vsi(struct ice_vsi *vsi, bool locked)</div><div class='ctx'>  * @vsi: VSI pointer</div><div class='ctx'>  *</div><div class='ctx'>  * Associate queue[s] with napi for all vectors.</div><div class='del'>- * The caller must hold rtnl_lock.</div><div class='ctx'>  */</div><div class='ctx'> void ice_vsi_set_napi_queues(struct ice_vsi *vsi)</div><div class='ctx'> {</div><div class='hunk'>@@ -2724,6 +2777,7 @@ void ice_vsi_set_napi_queues(struct ice_vsi *vsi)</div><div class='ctx'> 	if (!netdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	ASSERT_RTNL();</div><div class='ctx'> 	ice_for_each_rxq(vsi, q_idx)</div><div class='ctx'> 		netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_RX,</div><div class='ctx'> 				     &amp;vsi-&gt;rx_rings[q_idx]-&gt;q_vector-&gt;napi);</div><div class='hunk'>@@ -2744,16 +2798,23 @@ void ice_vsi_set_napi_queues(struct ice_vsi *vsi)</div><div class='ctx'>  * @vsi: VSI pointer</div><div class='ctx'>  *</div><div class='ctx'>  * Clear the association between all VSI queues queue[s] and napi.</div><div class='del'>- * The caller must hold rtnl_lock.</div><div class='ctx'>  */</div><div class='ctx'> void ice_vsi_clear_napi_queues(struct ice_vsi *vsi)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = vsi-&gt;netdev;</div><div class='del'>-	int q_idx;</div><div class='add'>+	int q_idx, v_idx;</div><div class='ctx'> </div><div class='ctx'> 	if (!netdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+	/* Clear the NAPI's interrupt number */</div><div class='add'>+	ice_for_each_q_vector(vsi, v_idx) {</div><div class='add'>+		struct ice_q_vector *q_vector = vsi-&gt;q_vectors[v_idx];</div><div class='add'>+</div><div class='add'>+		netif_napi_set_irq(&amp;q_vector-&gt;napi, -1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ice_for_each_txq(vsi, q_idx)</div><div class='ctx'> 		netif_queue_set_napi(netdev, q_idx, NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -2777,8 +2838,10 @@ void ice_napi_add(struct ice_vsi *vsi)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	ice_for_each_q_vector(vsi, v_idx)</div><div class='del'>-		netif_napi_add(vsi-&gt;netdev, &amp;vsi-&gt;q_vectors[v_idx]-&gt;napi,</div><div class='del'>-			       ice_napi_poll);</div><div class='add'>+		netif_napi_add_config(vsi-&gt;netdev,</div><div class='add'>+				      &amp;vsi-&gt;q_vectors[v_idx]-&gt;napi,</div><div class='add'>+				      ice_napi_poll,</div><div class='add'>+				      v_idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2803,9 +2866,11 @@ int ice_vsi_release(struct ice_vsi *vsi)</div><div class='ctx'> 	/* The Rx rule will only exist to remove if the LLDP FW</div><div class='ctx'> 	 * engine is currently stopped</div><div class='ctx'> 	 */</div><div class='del'>-	if (!ice_is_safe_mode(pf) &amp;&amp; vsi-&gt;type == ICE_VSI_PF &amp;&amp;</div><div class='del'>-	    !test_bit(ICE_FLAG_FW_LLDP_AGENT, pf-&gt;flags))</div><div class='del'>-		ice_cfg_sw_lldp(vsi, false, false);</div><div class='add'>+	if (!ice_is_safe_mode(pf) &amp;&amp;</div><div class='add'>+	    !test_bit(ICE_FLAG_FW_LLDP_AGENT, pf-&gt;flags) &amp;&amp;</div><div class='add'>+	    (vsi-&gt;type == ICE_VSI_PF || (vsi-&gt;type == ICE_VSI_VF &amp;&amp;</div><div class='add'>+	     ice_vf_is_lldp_ena(vsi-&gt;vf))))</div><div class='add'>+		ice_vsi_cfg_sw_lldp(vsi, false, false);</div><div class='ctx'> </div><div class='ctx'> 	ice_vsi_decfg(vsi);</div><div class='ctx'> </div><div class='hunk'>@@ -3133,7 +3198,7 @@ void ice_vsi_cfg_netdev_tc(struct ice_vsi *vsi, u8 ena_tc)</div><div class='ctx'> 	if (!netdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* CHNL VSI doesn't have it's own netdev, hence, no netdev_tc */</div><div class='add'>+	/* CHNL VSI doesn't have its own netdev, hence, no netdev_tc */</div><div class='ctx'> 	if (vsi-&gt;type == ICE_VSI_CHNL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -3670,20 +3735,20 @@ int ice_set_link(struct ice_vsi *vsi, bool ena)</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_set_link_restart_an(pi, ena, NULL);</div><div class='ctx'> </div><div class='del'>-	/* if link is owned by manageability, FW will return ICE_AQ_RC_EMODE.</div><div class='add'>+	/* if link is owned by manageability, FW will return LIBIE_AQ_RC_EMODE.</div><div class='ctx'> 	 * this is not a fatal error, so print a warning message and return</div><div class='ctx'> 	 * a success code. Return an error if FW returns an error code other</div><div class='del'>-	 * than ICE_AQ_RC_EMODE</div><div class='add'>+	 * than LIBIE_AQ_RC_EMODE</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (status == -EIO) {</div><div class='del'>-		if (hw-&gt;adminq.sq_last_status == ICE_AQ_RC_EMODE)</div><div class='add'>+		if (hw-&gt;adminq.sq_last_status == LIBIE_AQ_RC_EMODE)</div><div class='ctx'> 			dev_dbg(dev, "can't set link to %s, err %d aq_err %s. not fatal, continuing\n",</div><div class='ctx'> 				(ena ? "ON" : "OFF"), status,</div><div class='del'>-				ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+				libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 	} else if (status) {</div><div class='ctx'> 		dev_err(dev, "can't set link to %s, err %d aq_err %s\n",</div><div class='ctx'> 			(ena ? "ON" : "OFF"), status,</div><div class='del'>-			ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		return status;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3874,15 +3939,18 @@ void ice_init_feature_support(struct ice_pf *pf)</div><div class='ctx'> 			ice_set_feature_support(pf, ICE_F_CGU);</div><div class='ctx'> 		if (ice_is_clock_mux_in_netlist(&amp;pf-&gt;hw))</div><div class='ctx'> 			ice_set_feature_support(pf, ICE_F_SMA_CTRL);</div><div class='del'>-		if (ice_gnss_is_gps_present(&amp;pf-&gt;hw))</div><div class='add'>+		if (ice_gnss_is_module_present(&amp;pf-&gt;hw))</div><div class='ctx'> 			ice_set_feature_support(pf, ICE_F_GNSS);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pf-&gt;hw.mac_type == ICE_MAC_E830)</div><div class='add'>+	if (pf-&gt;hw.mac_type == ICE_MAC_E830) {</div><div class='ctx'> 		ice_set_feature_support(pf, ICE_F_MBX_LIMIT);</div><div class='add'>+		ice_set_feature_support(pf, ICE_F_GCS);</div><div class='add'>+		ice_set_feature_support(pf, ICE_F_TXTIME);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3929,24 +3997,6 @@ void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_vsi_ctx_set_allow_override - allow destination override on VSI</div><div class='del'>- * @ctx: pointer to VSI ctx structure</div><div class='del'>- */</div><div class='del'>-void ice_vsi_ctx_set_allow_override(struct ice_vsi_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	ctx-&gt;info.sec_flags |= ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vsi_ctx_clear_allow_override - turn off destination override on VSI</div><div class='del'>- * @ctx: pointer to VSI ctx structure</div><div class='del'>- */</div><div class='del'>-void ice_vsi_ctx_clear_allow_override(struct ice_vsi_ctx *ctx)</div><div class='del'>-{</div><div class='del'>-	ctx-&gt;info.sec_flags &amp;= ~ICE_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_vsi_update_local_lb - update sw block in VSI with local loopback bit</div><div class='ctx'>  * @vsi: pointer to VSI structure</div><div class='ctx'>  * @set: set or unset the bit</div><div class='hunk'>@@ -3970,3 +4020,38 @@ ice_vsi_update_local_lb(struct ice_vsi *vsi, bool set)</div><div class='ctx'> 	vsi-&gt;info = ctx.info;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vsi_update_l2tsel - update l2tsel field for all Rx rings on this VSI</div><div class='add'>+ * @vsi: VSI used to update l2tsel on</div><div class='add'>+ * @l2tsel: l2tsel setting requested</div><div class='add'>+ *</div><div class='add'>+ * Use the l2tsel setting to update all of the Rx queue context bits for l2tsel.</div><div class='add'>+ * This will modify which descriptor field the first offloaded VLAN will be</div><div class='add'>+ * stripped into.</div><div class='add'>+ */</div><div class='add'>+void ice_vsi_update_l2tsel(struct ice_vsi *vsi, enum ice_l2tsel l2tsel)</div><div class='add'>+{</div><div class='add'>+	struct ice_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='add'>+	u32 l2tsel_bit;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (l2tsel == ICE_L2TSEL_EXTRACT_FIRST_TAG_L2TAG2_2ND)</div><div class='add'>+		l2tsel_bit = 0;</div><div class='add'>+	else</div><div class='add'>+		l2tsel_bit = BIT(ICE_L2TSEL_BIT_OFFSET);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; vsi-&gt;alloc_rxq; i++) {</div><div class='add'>+		u16 pfq = vsi-&gt;rxq_map[i];</div><div class='add'>+		u32 qrx_context_offset;</div><div class='add'>+		u32 regval;</div><div class='add'>+</div><div class='add'>+		qrx_context_offset =</div><div class='add'>+			QRX_CONTEXT(ICE_L2TSEL_QRX_CONTEXT_REG_IDX, pfq);</div><div class='add'>+</div><div class='add'>+		regval = rd32(hw, qrx_context_offset);</div><div class='add'>+		regval &amp;= ~BIT(ICE_L2TSEL_BIT_OFFSET);</div><div class='add'>+		regval |= l2tsel_bit;</div><div class='add'>+		wr32(hw, qrx_context_offset, regval);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_lib.h b/drivers/net/ethernet/intel/ice/ice_lib.h<br/>index 10d6fc479a32..2cb1eb98b9da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_lib.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_lib.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_lib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_lib.h</a></div><div class='hunk'>@@ -11,6 +11,13 @@</div><div class='ctx'> #define ICE_VSI_FLAG_INIT	BIT(0)</div><div class='ctx'> #define ICE_VSI_FLAG_NO_INIT	0</div><div class='ctx'> </div><div class='add'>+#define ICE_L2TSEL_QRX_CONTEXT_REG_IDX	3</div><div class='add'>+#define ICE_L2TSEL_BIT_OFFSET		23</div><div class='add'>+enum ice_l2tsel {</div><div class='add'>+	ICE_L2TSEL_EXTRACT_FIRST_TAG_L2TAG2_2ND,</div><div class='add'>+	ICE_L2TSEL_EXTRACT_FIRST_TAG_L2TAG1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> const char *ice_vsi_type_str(enum ice_vsi_type vsi_type);</div><div class='ctx'> </div><div class='ctx'> bool ice_pf_state_is_nominal(struct ice_pf *pf);</div><div class='hunk'>@@ -29,7 +36,8 @@ ice_vsi_stop_lan_tx_rings(struct ice_vsi *vsi, enum ice_disq_rst_src rst_src,</div><div class='ctx'> </div><div class='ctx'> int ice_vsi_stop_xdp_tx_rings(struct ice_vsi *vsi);</div><div class='ctx'> </div><div class='del'>-void ice_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create);</div><div class='add'>+void ice_vsi_cfg_sw_lldp(struct ice_vsi *vsi, bool tx, bool create);</div><div class='add'>+void ice_cfg_sw_rx_lldp(struct ice_pf *pf, bool enable);</div><div class='ctx'> </div><div class='ctx'> int ice_set_link(struct ice_vsi *vsi, bool ena);</div><div class='ctx'> </div><div class='hunk'>@@ -90,6 +98,7 @@ void ice_set_q_vector_intrl(struct ice_q_vector *q_vector);</div><div class='ctx'> </div><div class='ctx'> bool ice_is_safe_mode(struct ice_pf *pf);</div><div class='ctx'> bool ice_is_rdma_ena(struct ice_pf *pf);</div><div class='add'>+bool ice_is_recovery_mode(struct ice_hw *hw);</div><div class='ctx'> bool ice_is_dflt_vsi_in_use(struct ice_port_info *pi);</div><div class='ctx'> bool ice_is_vsi_dflt_vsi(struct ice_vsi *vsi);</div><div class='ctx'> int ice_set_dflt_vsi(struct ice_vsi *vsi);</div><div class='hunk'>@@ -104,10 +113,6 @@ ice_vsi_update_security(struct ice_vsi *vsi, void (*fill)(struct ice_vsi_ctx *))</div><div class='ctx'> void ice_vsi_ctx_set_antispoof(struct ice_vsi_ctx *ctx);</div><div class='ctx'> </div><div class='ctx'> void ice_vsi_ctx_clear_antispoof(struct ice_vsi_ctx *ctx);</div><div class='del'>-</div><div class='del'>-void ice_vsi_ctx_set_allow_override(struct ice_vsi_ctx *ctx);</div><div class='del'>-</div><div class='del'>-void ice_vsi_ctx_clear_allow_override(struct ice_vsi_ctx *ctx);</div><div class='ctx'> int ice_vsi_update_local_lb(struct ice_vsi *vsi, bool set);</div><div class='ctx'> int ice_vsi_add_vlan_zero(struct ice_vsi *vsi);</div><div class='ctx'> int ice_vsi_del_vlan_zero(struct ice_vsi *vsi);</div><div class='hunk'>@@ -118,4 +123,5 @@ void ice_set_feature_support(struct ice_pf *pf, enum ice_feature f);</div><div class='ctx'> void ice_clear_feature_support(struct ice_pf *pf, enum ice_feature f);</div><div class='ctx'> void ice_init_feature_support(struct ice_pf *pf);</div><div class='ctx'> bool ice_vsi_is_rx_queue_active(struct ice_vsi *vsi);</div><div class='add'>+void ice_vsi_update_l2tsel(struct ice_vsi *vsi, enum ice_l2tsel l2tsel);</div><div class='ctx'> #endif /* !_ICE_LIB_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c<br/>index a6f586f9bfd1..4bb68e7a00f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_main.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> #include "ice_dcb_lib.h"</div><div class='ctx'> #include "ice_dcb_nl.h"</div><div class='ctx'> #include "devlink/devlink.h"</div><div class='del'>-#include "devlink/devlink_port.h"</div><div class='add'>+#include "devlink/port.h"</div><div class='ctx'> #include "ice_sf_eth.h"</div><div class='ctx'> #include "ice_hwmon.h"</div><div class='ctx'> /* Including ice_trace.h with CREATE_TRACE_POINTS defined will generate the</div><div class='hunk'>@@ -37,7 +37,11 @@ static const char ice_copyright[] = "Copyright (c) 2018, Intel Corporation.";</div><div class='ctx'> #define ICE_DDP_PKG_FILE	ICE_DDP_PKG_PATH "ice.pkg"</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION(DRV_SUMMARY);</div><div class='del'>-MODULE_IMPORT_NS(LIBIE);</div><div class='add'>+MODULE_IMPORT_NS("LIBETH");</div><div class='add'>+MODULE_IMPORT_NS("LIBETH_XDP");</div><div class='add'>+MODULE_IMPORT_NS("LIBIE");</div><div class='add'>+MODULE_IMPORT_NS("LIBIE_ADMINQ");</div><div class='add'>+MODULE_IMPORT_NS("LIBIE_FWLOG");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> MODULE_FIRMWARE(ICE_DDP_PKG_FILE);</div><div class='ctx'> </div><div class='hunk'>@@ -379,7 +383,7 @@ static int ice_vsi_sync_fltr(struct ice_vsi *vsi)</div><div class='ctx'> 		 * should go into promiscuous mode. There should be some</div><div class='ctx'> 		 * space reserved for promiscuous filters.</div><div class='ctx'> 		 */</div><div class='del'>-		if (hw-&gt;adminq.sq_last_status == ICE_AQ_RC_ENOSPC &amp;&amp;</div><div class='add'>+		if (hw-&gt;adminq.sq_last_status == LIBIE_AQ_RC_ENOSPC &amp;&amp;</div><div class='ctx'> 		    !test_and_set_bit(ICE_FLTR_OVERFLOW_PROMISC,</div><div class='ctx'> 				      vsi-&gt;state)) {</div><div class='ctx'> 			promisc_forced_on = true;</div><div class='hunk'>@@ -1119,7 +1123,7 @@ ice_link_event(struct ice_pf *pf, struct ice_port_info *pi, bool link_up,</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		dev_dbg(dev, "Failed to update link status on port %d, err %d aq_err %s\n",</div><div class='ctx'> 			pi-&gt;lport, status,</div><div class='del'>-			ice_aq_str(pi-&gt;hw-&gt;adminq.sq_last_status));</div><div class='add'>+			libie_aq_str(pi-&gt;hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	ice_check_link_cfg_err(pf, pi-&gt;phy.link_info.link_cfg_err);</div><div class='ctx'> </div><div class='hunk'>@@ -1144,7 +1148,10 @@ ice_link_event(struct ice_pf *pf, struct ice_port_info *pi, bool link_up,</div><div class='ctx'> 	if (link_up == old_link &amp;&amp; link_speed == old_link_speed)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ice_ptp_link_change(pf, pf-&gt;hw.pf_id, link_up);</div><div class='add'>+	if (!link_up &amp;&amp; old_link)</div><div class='add'>+		pf-&gt;link_down_events++;</div><div class='add'>+</div><div class='add'>+	ice_ptp_link_change(pf, link_up);</div><div class='ctx'> </div><div class='ctx'> 	if (ice_is_dcb_active(pf)) {</div><div class='ctx'> 		if (test_bit(ICE_FLAG_DCB_ENA, pf-&gt;flags))</div><div class='hunk'>@@ -1247,32 +1254,6 @@ ice_handle_link_event(struct ice_pf *pf, struct ice_rq_event_info *event)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_get_fwlog_data - copy the FW log data from ARQ event</div><div class='del'>- * @pf: PF that the FW log event is associated with</div><div class='del'>- * @event: event structure containing FW log data</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-ice_get_fwlog_data(struct ice_pf *pf, struct ice_rq_event_info *event)</div><div class='del'>-{</div><div class='del'>-	struct ice_fwlog_data *fwlog;</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-</div><div class='del'>-	fwlog = &amp;hw-&gt;fwlog_ring.rings[hw-&gt;fwlog_ring.tail];</div><div class='del'>-</div><div class='del'>-	memset(fwlog-&gt;data, 0, PAGE_SIZE);</div><div class='del'>-	fwlog-&gt;data_size = le16_to_cpu(event-&gt;desc.datalen);</div><div class='del'>-</div><div class='del'>-	memcpy(fwlog-&gt;data, event-&gt;msg_buf, fwlog-&gt;data_size);</div><div class='del'>-	ice_fwlog_ring_increment(&amp;hw-&gt;fwlog_ring.tail, hw-&gt;fwlog_ring.size);</div><div class='del'>-</div><div class='del'>-	if (ice_fwlog_ring_full(&amp;hw-&gt;fwlog_ring)) {</div><div class='del'>-		/* the rings are full so bump the head to create room */</div><div class='del'>-		ice_fwlog_ring_increment(&amp;hw-&gt;fwlog_ring.head,</div><div class='del'>-					 hw-&gt;fwlog_ring.size);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_aq_prep_for_event - Prepare to wait for an AdminQ event from firmware</div><div class='ctx'>  * @pf: pointer to the PF private structure</div><div class='ctx'>  * @task: intermediate helper storage and identifier for waiting</div><div class='hunk'>@@ -1562,11 +1543,15 @@ static int __ice_clean_ctrlq(struct ice_pf *pf, enum ice_ctl_q q_type)</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ice_aqc_opc_fw_logs_event:</div><div class='del'>-			ice_get_fwlog_data(pf, &amp;event);</div><div class='add'>+			libie_get_fwlog_data(&amp;hw-&gt;fwlog, event.msg_buf,</div><div class='add'>+					     le16_to_cpu(event.desc.datalen));</div><div class='ctx'> 			break;</div><div class='ctx'> 		case ice_aqc_opc_lldp_set_mib_change:</div><div class='ctx'> 			ice_dcb_process_lldp_set_mib_change(pf, &amp;event);</div><div class='ctx'> 			break;</div><div class='add'>+		case ice_aqc_opc_get_health_status:</div><div class='add'>+			ice_process_health_status_event(pf, &amp;event);</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			dev_dbg(dev, "%s Receive Queue unknown event 0x%04x ignored\n",</div><div class='ctx'> 				qtype, opcode);</div><div class='hunk'>@@ -1714,7 +1699,7 @@ static int ice_service_task_stop(struct ice_pf *pf)</div><div class='ctx'> 	ret = test_and_set_bit(ICE_SERVICE_DIS, pf-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 	if (pf-&gt;serv_tmr.function)</div><div class='del'>-		del_timer_sync(&amp;pf-&gt;serv_tmr);</div><div class='add'>+		timer_delete_sync(&amp;pf-&gt;serv_tmr);</div><div class='ctx'> 	if (pf-&gt;serv_task.func)</div><div class='ctx'> 		cancel_work_sync(&amp;pf-&gt;serv_task);</div><div class='ctx'> </div><div class='hunk'>@@ -1740,7 +1725,7 @@ static void ice_service_task_restart(struct ice_pf *pf)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_service_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ice_pf *pf = from_timer(pf, t, serv_tmr);</div><div class='add'>+	struct ice_pf *pf = timer_container_of(pf, t, serv_tmr);</div><div class='ctx'> </div><div class='ctx'> 	mod_timer(&amp;pf-&gt;serv_tmr, round_jiffies(pf-&gt;serv_tmr_period + jiffies));</div><div class='ctx'> 	ice_service_task_schedule(pf);</div><div class='hunk'>@@ -1816,6 +1801,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf)</div><div class='ctx'> 		if (netif_msg_tx_err(pf))</div><div class='ctx'> 			dev_info(dev, "Malicious Driver Detection event %d on TX queue %d PF# %d VF# %d\n",</div><div class='ctx'> 				 event, queue, pf_num, vf_num);</div><div class='add'>+		ice_report_mdd_event(pf, ICE_MDD_SRC_TX_PQM, pf_num, vf_num,</div><div class='add'>+				     event, queue);</div><div class='ctx'> 		wr32(hw, GL_MDET_TX_PQM, 0xffffffff);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1829,6 +1816,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf)</div><div class='ctx'> 		if (netif_msg_tx_err(pf))</div><div class='ctx'> 			dev_info(dev, "Malicious Driver Detection event %d on TX queue %d PF# %d VF# %d\n",</div><div class='ctx'> 				 event, queue, pf_num, vf_num);</div><div class='add'>+		ice_report_mdd_event(pf, ICE_MDD_SRC_TX_TCLAN, pf_num, vf_num,</div><div class='add'>+				     event, queue);</div><div class='ctx'> 		wr32(hw, GL_MDET_TX_TCLAN_BY_MAC(hw), U32_MAX);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1842,6 +1831,8 @@ static void ice_handle_mdd_event(struct ice_pf *pf)</div><div class='ctx'> 		if (netif_msg_rx_err(pf))</div><div class='ctx'> 			dev_info(dev, "Malicious Driver Detection event %d on RX queue %d PF# %d VF# %d\n",</div><div class='ctx'> 				 event, queue, pf_num, vf_num);</div><div class='add'>+		ice_report_mdd_event(pf, ICE_MDD_SRC_RX, pf_num, vf_num, event,</div><div class='add'>+				     queue);</div><div class='ctx'> 		wr32(hw, GL_MDET_RX, 0xffffffff);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2355,6 +2346,18 @@ static void ice_check_media_subtask(struct ice_pf *pf)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ice_service_task_recovery_mode(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = container_of(work, struct ice_pf, serv_task);</div><div class='add'>+</div><div class='add'>+	set_bit(ICE_ADMINQ_EVENT_PENDING, pf-&gt;state);</div><div class='add'>+	ice_clean_adminq_subtask(pf);</div><div class='add'>+</div><div class='add'>+	ice_service_task_complete(pf);</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;pf-&gt;serv_tmr, jiffies + msecs_to_jiffies(100));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_service_task - manage and run subtasks</div><div class='ctx'>  * @work: pointer to work_struct contained by the PF struct</div><div class='hunk'>@@ -2364,9 +2367,11 @@ static void ice_service_task(struct work_struct *work)</div><div class='ctx'> 	struct ice_pf *pf = container_of(work, struct ice_pf, serv_task);</div><div class='ctx'> 	unsigned long start_time = jiffies;</div><div class='ctx'> </div><div class='del'>-	/* subtasks */</div><div class='add'>+	if (pf-&gt;health_reporters.tx_hang_buf.tx_ring) {</div><div class='add'>+		ice_report_tx_hang(pf);</div><div class='add'>+		pf-&gt;health_reporters.tx_hang_buf.tx_ring = NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* process reset requests first */</div><div class='ctx'> 	ice_reset_subtask(pf);</div><div class='ctx'> </div><div class='ctx'> 	/* bail if a reset/recovery cycle is pending or rebuild failed */</div><div class='hunk'>@@ -2378,11 +2383,11 @@ static void ice_service_task(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (test_and_clear_bit(ICE_AUX_ERR_PENDING, pf-&gt;state)) {</div><div class='del'>-		struct iidc_event *event;</div><div class='add'>+		struct iidc_rdma_event *event;</div><div class='ctx'> </div><div class='ctx'> 		event = kzalloc(sizeof(*event), GFP_KERNEL);</div><div class='ctx'> 		if (event) {</div><div class='del'>-			set_bit(IIDC_EVENT_CRIT_ERR, event-&gt;type);</div><div class='add'>+			set_bit(IIDC_RDMA_EVENT_CRIT_ERR, event-&gt;type);</div><div class='ctx'> 			/* report the entire OICR value to AUX driver */</div><div class='ctx'> 			swap(event-&gt;reg, pf-&gt;oicr_err_reg);</div><div class='ctx'> 			ice_send_event_to_aux(pf, event);</div><div class='hunk'>@@ -2401,11 +2406,11 @@ static void ice_service_task(struct work_struct *work)</div><div class='ctx'> 		ice_plug_aux_dev(pf);</div><div class='ctx'> </div><div class='ctx'> 	if (test_and_clear_bit(ICE_FLAG_MTU_CHANGED, pf-&gt;flags)) {</div><div class='del'>-		struct iidc_event *event;</div><div class='add'>+		struct iidc_rdma_event *event;</div><div class='ctx'> </div><div class='ctx'> 		event = kzalloc(sizeof(*event), GFP_KERNEL);</div><div class='ctx'> 		if (event) {</div><div class='del'>-			set_bit(IIDC_EVENT_AFTER_MTU_CHANGE, event-&gt;type);</div><div class='add'>+			set_bit(IIDC_RDMA_EVENT_AFTER_MTU_CHANGE, event-&gt;type);</div><div class='ctx'> 			ice_send_event_to_aux(pf, event);</div><div class='ctx'> 			kfree(event);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2505,34 +2510,6 @@ int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_irq_affinity_notify - Callback for affinity changes</div><div class='del'>- * @notify: context as to what irq was changed</div><div class='del'>- * @mask: the new affinity mask</div><div class='del'>- *</div><div class='del'>- * This is a callback function used by the irq_set_affinity_notifier function</div><div class='del'>- * so that we may register to receive changes to the irq affinity masks.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-ice_irq_affinity_notify(struct irq_affinity_notify *notify,</div><div class='del'>-			const cpumask_t *mask)</div><div class='del'>-{</div><div class='del'>-	struct ice_q_vector *q_vector =</div><div class='del'>-		container_of(notify, struct ice_q_vector, affinity_notify);</div><div class='del'>-</div><div class='del'>-	cpumask_copy(&amp;q_vector-&gt;affinity_mask, mask);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_irq_affinity_release - Callback for affinity notifier release</div><div class='del'>- * @ref: internal core kernel usage</div><div class='del'>- *</div><div class='del'>- * This is a callback function used by the irq_set_affinity_notifier function</div><div class='del'>- * to inform the current notification subscriber that they will no longer</div><div class='del'>- * receive notifications.</div><div class='del'>- */</div><div class='del'>-static void ice_irq_affinity_release(struct kref __always_unused *ref) {}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_vsi_ena_irq - Enable IRQ for the given VSI</div><div class='ctx'>  * @vsi: the VSI being configured</div><div class='ctx'>  */</div><div class='hunk'>@@ -2595,19 +2572,6 @@ static int ice_vsi_req_irq_msix(struct ice_vsi *vsi, char *basename)</div><div class='ctx'> 				   err);</div><div class='ctx'> 			goto free_q_irqs;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		/* register for affinity change notifications */</div><div class='del'>-		if (!IS_ENABLED(CONFIG_RFS_ACCEL)) {</div><div class='del'>-			struct irq_affinity_notify *affinity_notify;</div><div class='del'>-</div><div class='del'>-			affinity_notify = &amp;q_vector-&gt;affinity_notify;</div><div class='del'>-			affinity_notify-&gt;notify = ice_irq_affinity_notify;</div><div class='del'>-			affinity_notify-&gt;release = ice_irq_affinity_release;</div><div class='del'>-			irq_set_affinity_notifier(irq_num, affinity_notify);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* assign the mask for this irq */</div><div class='del'>-		irq_update_affinity_hint(irq_num, &amp;q_vector-&gt;affinity_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = ice_set_cpu_rx_rmap(vsi);</div><div class='hunk'>@@ -2623,9 +2587,6 @@ static int ice_vsi_req_irq_msix(struct ice_vsi *vsi, char *basename)</div><div class='ctx'> free_q_irqs:</div><div class='ctx'> 	while (vector--) {</div><div class='ctx'> 		irq_num = vsi-&gt;q_vectors[vector]-&gt;irq.virq;</div><div class='del'>-		if (!IS_ENABLED(CONFIG_RFS_ACCEL))</div><div class='del'>-			irq_set_affinity_notifier(irq_num, NULL);</div><div class='del'>-		irq_update_affinity_hint(irq_num, NULL);</div><div class='ctx'> 		devm_free_irq(dev, irq_num, &amp;vsi-&gt;q_vectors[vector]);</div><div class='ctx'> 	}</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -2762,6 +2723,27 @@ void ice_map_xdp_rings(struct ice_vsi *vsi)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_unmap_xdp_rings - Unmap XDP rings from interrupt vectors</div><div class='add'>+ * @vsi: the VSI with XDP rings being unmapped</div><div class='add'>+ */</div><div class='add'>+static void ice_unmap_xdp_rings(struct ice_vsi *vsi)</div><div class='add'>+{</div><div class='add'>+	int v_idx;</div><div class='add'>+</div><div class='add'>+	ice_for_each_q_vector(vsi, v_idx) {</div><div class='add'>+		struct ice_q_vector *q_vector = vsi-&gt;q_vectors[v_idx];</div><div class='add'>+		struct ice_tx_ring *ring;</div><div class='add'>+</div><div class='add'>+		ice_for_each_tx_ring(ring, q_vector-&gt;tx)</div><div class='add'>+			if (!ring-&gt;tx_buf || !ice_ring_is_xdp(ring))</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+		/* restore the value of last node prior to XDP setup */</div><div class='add'>+		q_vector-&gt;tx.tx_ring = ring;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_prepare_xdp_rings - Allocate, configure and setup Tx rings for XDP</div><div class='ctx'>  * @vsi: VSI to bring up Tx rings used by XDP</div><div class='ctx'>  * @prog: bpf program that will be assigned to VSI</div><div class='hunk'>@@ -2824,7 +2806,7 @@ int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		dev_err(dev, "Failed VSI LAN queue config for XDP, error: %d\n",</div><div class='ctx'> 			status);</div><div class='del'>-		goto clear_xdp_rings;</div><div class='add'>+		goto unmap_xdp_rings;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* assign the prog only when it's not already present on VSI;</div><div class='hunk'>@@ -2840,6 +2822,8 @@ int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,</div><div class='ctx'> 		ice_vsi_assign_bpf_prog(vsi, prog);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+unmap_xdp_rings:</div><div class='add'>+	ice_unmap_xdp_rings(vsi);</div><div class='ctx'> clear_xdp_rings:</div><div class='ctx'> 	ice_for_each_xdp_txq(vsi, i)</div><div class='ctx'> 		if (vsi-&gt;xdp_rings[i]) {</div><div class='hunk'>@@ -2856,6 +2840,8 @@ err_map_xdp:</div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;avail_q_mutex);</div><div class='ctx'> </div><div class='ctx'> 	devm_kfree(dev, vsi-&gt;xdp_rings);</div><div class='add'>+	vsi-&gt;xdp_rings = NULL;</div><div class='add'>+</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2871,7 +2857,7 @@ int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type)</div><div class='ctx'> {</div><div class='ctx'> 	u16 max_txqs[ICE_MAX_TRAFFIC_CLASS] = { 0 };</div><div class='ctx'> 	struct ice_pf *pf = vsi-&gt;back;</div><div class='del'>-	int i, v_idx;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* q_vectors are freed in reset path so there's no point in detaching</div><div class='ctx'> 	 * rings</div><div class='hunk'>@@ -2879,17 +2865,7 @@ int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type)</div><div class='ctx'> 	if (cfg_type == ICE_XDP_CFG_PART)</div><div class='ctx'> 		goto free_qmap;</div><div class='ctx'> </div><div class='del'>-	ice_for_each_q_vector(vsi, v_idx) {</div><div class='del'>-		struct ice_q_vector *q_vector = vsi-&gt;q_vectors[v_idx];</div><div class='del'>-		struct ice_tx_ring *ring;</div><div class='del'>-</div><div class='del'>-		ice_for_each_tx_ring(ring, q_vector-&gt;tx)</div><div class='del'>-			if (!ring-&gt;tx_buf || !ice_ring_is_xdp(ring))</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-		/* restore the value of last node prior to XDP setup */</div><div class='del'>-		q_vector-&gt;tx.tx_ring = ring;</div><div class='del'>-	}</div><div class='add'>+	ice_unmap_xdp_rings(vsi);</div><div class='ctx'> </div><div class='ctx'> free_qmap:</div><div class='ctx'> 	mutex_lock(&amp;pf-&gt;avail_q_mutex);</div><div class='hunk'>@@ -2983,10 +2959,7 @@ int ice_vsi_determine_xdp_res(struct ice_vsi *vsi)</div><div class='ctx'>  */</div><div class='ctx'> static int ice_max_xdp_frame_size(struct ice_vsi *vsi)</div><div class='ctx'> {</div><div class='del'>-	if (test_bit(ICE_FLAG_LEGACY_RX, vsi-&gt;back-&gt;flags))</div><div class='del'>-		return ICE_RXBUF_1664;</div><div class='del'>-	else</div><div class='del'>-		return ICE_RXBUF_3072;</div><div class='add'>+	return ICE_RXBUF_3072;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3034,28 +3007,24 @@ ice_xdp_setup_prog(struct ice_vsi *vsi, struct bpf_prog *prog,</div><div class='ctx'> 		xdp_ring_err = ice_vsi_determine_xdp_res(vsi);</div><div class='ctx'> 		if (xdp_ring_err) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack, "Not enough Tx resources for XDP");</div><div class='add'>+			goto resume_if;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			xdp_ring_err = ice_prepare_xdp_rings(vsi, prog,</div><div class='ctx'> 							     ICE_XDP_CFG_FULL);</div><div class='del'>-			if (xdp_ring_err)</div><div class='add'>+			if (xdp_ring_err) {</div><div class='ctx'> 				NL_SET_ERR_MSG_MOD(extack, "Setting up XDP Tx resources failed");</div><div class='add'>+				goto resume_if;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		xdp_features_set_redirect_target(vsi-&gt;netdev, true);</div><div class='del'>-		/* reallocate Rx queues that are used for zero-copy */</div><div class='del'>-		xdp_ring_err = ice_realloc_zc_buf(vsi, true);</div><div class='del'>-		if (xdp_ring_err)</div><div class='del'>-			NL_SET_ERR_MSG_MOD(extack, "Setting up XDP Rx resources failed");</div><div class='ctx'> 	} else if (ice_is_xdp_ena_vsi(vsi) &amp;&amp; !prog) {</div><div class='ctx'> 		xdp_features_clear_redirect_target(vsi-&gt;netdev);</div><div class='ctx'> 		xdp_ring_err = ice_destroy_xdp_rings(vsi, ICE_XDP_CFG_FULL);</div><div class='ctx'> 		if (xdp_ring_err)</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack, "Freeing XDP Tx resources failed");</div><div class='del'>-		/* reallocate Rx queues that were used for zero-copy */</div><div class='del'>-		xdp_ring_err = ice_realloc_zc_buf(vsi, false);</div><div class='del'>-		if (xdp_ring_err)</div><div class='del'>-			NL_SET_ERR_MSG_MOD(extack, "Freeing XDP Rx resources failed");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+resume_if:</div><div class='ctx'> 	if (if_running)</div><div class='ctx'> 		ret = ice_up(vsi);</div><div class='ctx'> </div><div class='hunk'>@@ -3174,12 +3143,14 @@ static irqreturn_t ice_ll_ts_intr(int __always_unused irq, void *data)</div><div class='ctx'> 	hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	tx = &amp;pf-&gt;ptp.port.tx;</div><div class='ctx'> 	spin_lock_irqsave(&amp;tx-&gt;lock, flags);</div><div class='del'>-	ice_ptp_complete_tx_single_tstamp(tx);</div><div class='add'>+	if (tx-&gt;init) {</div><div class='add'>+		ice_ptp_complete_tx_single_tstamp(tx);</div><div class='ctx'> </div><div class='del'>-	idx = find_next_bit_wrap(tx-&gt;in_use, tx-&gt;len,</div><div class='del'>-				 tx-&gt;last_ll_ts_idx_read + 1);</div><div class='del'>-	if (idx != tx-&gt;len)</div><div class='del'>-		ice_ptp_req_tx_single_tstamp(tx, idx);</div><div class='add'>+		idx = find_next_bit_wrap(tx-&gt;in_use, tx-&gt;len,</div><div class='add'>+					 tx-&gt;last_ll_ts_idx_read + 1);</div><div class='add'>+		if (idx != tx-&gt;len)</div><div class='add'>+			ice_ptp_req_tx_single_tstamp(tx, idx);</div><div class='add'>+	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;tx-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |</div><div class='hunk'>@@ -3281,22 +3252,8 @@ static irqreturn_t ice_misc_intr(int __always_unused irq, void *data)</div><div class='ctx'> </div><div class='ctx'> 	if (oicr &amp; PFINT_OICR_TSYN_TX_M) {</div><div class='ctx'> 		ena_mask &amp;= ~PFINT_OICR_TSYN_TX_M;</div><div class='del'>-		if (ice_pf_state_is_nominal(pf) &amp;&amp;</div><div class='del'>-		    pf-&gt;hw.dev_caps.ts_dev_info.ts_ll_int_read) {</div><div class='del'>-			struct ice_ptp_tx *tx = &amp;pf-&gt;ptp.port.tx;</div><div class='del'>-			unsigned long flags;</div><div class='del'>-			u8 idx;</div><div class='del'>-</div><div class='del'>-			spin_lock_irqsave(&amp;tx-&gt;lock, flags);</div><div class='del'>-			idx = find_next_bit_wrap(tx-&gt;in_use, tx-&gt;len,</div><div class='del'>-						 tx-&gt;last_ll_ts_idx_read + 1);</div><div class='del'>-			if (idx != tx-&gt;len)</div><div class='del'>-				ice_ptp_req_tx_single_tstamp(tx, idx);</div><div class='del'>-			spin_unlock_irqrestore(&amp;tx-&gt;lock, flags);</div><div class='del'>-		} else if (ice_ptp_pf_handles_tx_interrupt(pf)) {</div><div class='del'>-			set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf-&gt;misc_thread);</div><div class='del'>-			ret = IRQ_WAKE_THREAD;</div><div class='del'>-		}</div><div class='add'>+</div><div class='add'>+		ret = ice_ptp_ts_irq(pf);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (oicr &amp; PFINT_OICR_TSYN_EVNT_M) {</div><div class='hunk'>@@ -3666,6 +3623,15 @@ void ice_set_netdev_features(struct net_device *netdev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	netdev-&gt;hw_features |= NETIF_F_RXFCS;</div><div class='ctx'> </div><div class='add'>+	/* Allow core to manage IRQs affinity */</div><div class='add'>+	netif_set_affinity_auto(netdev);</div><div class='add'>+</div><div class='add'>+	/* Mutual exclusivity for TSO and GCS is enforced by the set features</div><div class='add'>+	 * ndo callback.</div><div class='add'>+	 */</div><div class='add'>+	if (ice_is_feature_supported(pf, ICE_F_GCS))</div><div class='add'>+		netdev-&gt;hw_features |= NETIF_F_HW_CSUM;</div><div class='add'>+</div><div class='ctx'> 	netif_set_tso_max_size(netdev, ICE_MAX_TSO_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3974,9 +3940,10 @@ u16 ice_get_avail_rxq_count(struct ice_pf *pf)</div><div class='ctx'>  * ice_deinit_pf - Unrolls initialziations done by ice_init_pf</div><div class='ctx'>  * @pf: board private structure to initialize</div><div class='ctx'>  */</div><div class='del'>-static void ice_deinit_pf(struct ice_pf *pf)</div><div class='add'>+void ice_deinit_pf(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	ice_service_task_stop(pf);</div><div class='add'>+	/* note that we unroll also on ice_init_pf() failure here */</div><div class='add'>+</div><div class='ctx'> 	mutex_destroy(&amp;pf-&gt;lag_mutex);</div><div class='ctx'> 	mutex_destroy(&amp;pf-&gt;adev_mutex);</div><div class='ctx'> 	mutex_destroy(&amp;pf-&gt;sw_mutex);</div><div class='hunk'>@@ -3994,9 +3961,17 @@ static void ice_deinit_pf(struct ice_pf *pf)</div><div class='ctx'> 		pf-&gt;avail_rxqs = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (pf-&gt;txtime_txqs) {</div><div class='add'>+		bitmap_free(pf-&gt;txtime_txqs);</div><div class='add'>+		pf-&gt;txtime_txqs = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (pf-&gt;ptp.clock)</div><div class='ctx'> 		ptp_clock_unregister(pf-&gt;ptp.clock);</div><div class='ctx'> </div><div class='add'>+	if (!xa_empty(&amp;pf-&gt;irq_tracker.entries))</div><div class='add'>+		ice_free_irq_msix_misc(pf);</div><div class='add'>+</div><div class='ctx'> 	xa_destroy(&amp;pf-&gt;dyn_ports);</div><div class='ctx'> 	xa_destroy(&amp;pf-&gt;sf_nums);</div><div class='ctx'> }</div><div class='hunk'>@@ -4043,21 +4018,32 @@ static void ice_set_pf_caps(struct ice_pf *pf)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(ICE_FLAG_PTP_SUPPORTED, pf-&gt;flags);</div><div class='del'>-	if (func_caps-&gt;common_cap.ieee_1588 &amp;&amp;</div><div class='del'>-	    !(pf-&gt;hw.mac_type == ICE_MAC_E830))</div><div class='add'>+	if (func_caps-&gt;common_cap.ieee_1588)</div><div class='ctx'> 		set_bit(ICE_FLAG_PTP_SUPPORTED, pf-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	pf-&gt;max_pf_txqs = func_caps-&gt;common_cap.num_txq;</div><div class='ctx'> 	pf-&gt;max_pf_rxqs = func_caps-&gt;common_cap.num_rxq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ice_start_service_task(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	timer_setup(&amp;pf-&gt;serv_tmr, ice_service_timer, 0);</div><div class='add'>+	pf-&gt;serv_tmr_period = HZ;</div><div class='add'>+	INIT_WORK(&amp;pf-&gt;serv_task, ice_service_task);</div><div class='add'>+	clear_bit(ICE_SERVICE_SCHED, pf-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_init_pf - Initialize general software structures (struct ice_pf)</div><div class='ctx'>  * @pf: board private structure to initialize</div><div class='add'>+ * Return: 0 on success, negative errno otherwise.</div><div class='ctx'>  */</div><div class='del'>-static int ice_init_pf(struct ice_pf *pf)</div><div class='add'>+int ice_init_pf(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	ice_set_pf_caps(pf);</div><div class='add'>+	struct udp_tunnel_nic_info *udp_tunnel_nic = &amp;pf-&gt;hw.udp_tunnel_nic;</div><div class='add'>+	struct device *dev = ice_pf_to_dev(pf);</div><div class='add'>+	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='add'>+	int err = -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;pf-&gt;sw_mutex);</div><div class='ctx'> 	mutex_init(&amp;pf-&gt;tc_mutex);</div><div class='hunk'>@@ -4070,23 +4056,7 @@ static int ice_init_pf(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 	init_waitqueue_head(&amp;pf-&gt;reset_wait_queue);</div><div class='ctx'> </div><div class='del'>-	/* setup service timer and periodic service task */</div><div class='del'>-	timer_setup(&amp;pf-&gt;serv_tmr, ice_service_timer, 0);</div><div class='del'>-	pf-&gt;serv_tmr_period = HZ;</div><div class='del'>-	INIT_WORK(&amp;pf-&gt;serv_task, ice_service_task);</div><div class='del'>-	clear_bit(ICE_SERVICE_SCHED, pf-&gt;state);</div><div class='del'>-</div><div class='ctx'> 	mutex_init(&amp;pf-&gt;avail_q_mutex);</div><div class='del'>-	pf-&gt;avail_txqs = bitmap_zalloc(pf-&gt;max_pf_txqs, GFP_KERNEL);</div><div class='del'>-	if (!pf-&gt;avail_txqs)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	pf-&gt;avail_rxqs = bitmap_zalloc(pf-&gt;max_pf_rxqs, GFP_KERNEL);</div><div class='del'>-	if (!pf-&gt;avail_rxqs) {</div><div class='del'>-		bitmap_free(pf-&gt;avail_txqs);</div><div class='del'>-		pf-&gt;avail_txqs = NULL;</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;pf-&gt;vfs.table_lock);</div><div class='ctx'> 	hash_init(pf-&gt;vfs.table);</div><div class='hunk'>@@ -4099,7 +4069,36 @@ static int ice_init_pf(struct ice_pf *pf)</div><div class='ctx'> 	xa_init(&amp;pf-&gt;dyn_ports);</div><div class='ctx'> 	xa_init(&amp;pf-&gt;sf_nums);</div><div class='ctx'> </div><div class='add'>+	pf-&gt;avail_txqs = bitmap_zalloc(pf-&gt;max_pf_txqs, GFP_KERNEL);</div><div class='add'>+	pf-&gt;avail_rxqs = bitmap_zalloc(pf-&gt;max_pf_rxqs, GFP_KERNEL);</div><div class='add'>+	pf-&gt;txtime_txqs = bitmap_zalloc(pf-&gt;max_pf_txqs, GFP_KERNEL);</div><div class='add'>+	if (!pf-&gt;avail_txqs || !pf-&gt;avail_rxqs || !pf-&gt;txtime_txqs)</div><div class='add'>+		goto undo_init;</div><div class='add'>+</div><div class='add'>+	udp_tunnel_nic-&gt;set_port = ice_udp_tunnel_set_port;</div><div class='add'>+	udp_tunnel_nic-&gt;unset_port = ice_udp_tunnel_unset_port;</div><div class='add'>+	udp_tunnel_nic-&gt;shared = &amp;hw-&gt;udp_tunnel_shared;</div><div class='add'>+	udp_tunnel_nic-&gt;tables[0].n_entries = hw-&gt;tnl.valid_count[TNL_VXLAN];</div><div class='add'>+	udp_tunnel_nic-&gt;tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN;</div><div class='add'>+	udp_tunnel_nic-&gt;tables[1].n_entries = hw-&gt;tnl.valid_count[TNL_GENEVE];</div><div class='add'>+	udp_tunnel_nic-&gt;tables[1].tunnel_types = UDP_TUNNEL_TYPE_GENEVE;</div><div class='add'>+</div><div class='add'>+	/* In case of MSIX we are going to setup the misc vector right here</div><div class='add'>+	 * to handle admin queue events etc. In case of legacy and MSI</div><div class='add'>+	 * the misc functionality and queue processing is combined in</div><div class='add'>+	 * the same vector and that gets setup at open.</div><div class='add'>+	 */</div><div class='add'>+	err = ice_req_irq_msix_misc(pf);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "setup of misc vector failed: %d\n", err);</div><div class='add'>+		goto undo_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+undo_init:</div><div class='add'>+	/* deinit handles half-initialized pf just fine */</div><div class='add'>+	ice_deinit_pf(pf);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4229,7 +4228,7 @@ static void ice_set_safe_mode_vlan_cfg(struct ice_pf *pf)</div><div class='ctx'> 	status = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "Failed to update VSI for safe mode VLANs, err %d aq_err %s\n",</div><div class='del'>-			status, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			status, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		vsi-&gt;info.sec_flags = ctxt-&gt;info.sec_flags;</div><div class='ctx'> 		vsi-&gt;info.sw_flags2 = ctxt-&gt;info.sw_flags2;</div><div class='hunk'>@@ -4540,21 +4539,55 @@ ice_init_tx_topology(struct ice_hw *hw, const struct firmware *firmware)</div><div class='ctx'> 			dev_info(dev, "Tx scheduling layers switching feature disabled\n");</div><div class='ctx'> 		else</div><div class='ctx'> 			dev_info(dev, "Tx scheduling layers switching feature enabled\n");</div><div class='del'>-		/* if there was a change in topology ice_cfg_tx_topo triggered</div><div class='del'>-		 * a CORER and we need to re-init hw</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (err == -ENODEV) {</div><div class='add'>+		/* If we failed to re-initialize the device, we can no longer</div><div class='add'>+		 * continue loading.</div><div class='ctx'> 		 */</div><div class='del'>-		ice_deinit_hw(hw);</div><div class='del'>-		err = ice_init_hw(hw);</div><div class='del'>-</div><div class='add'>+		dev_warn(dev, "Failed to initialize hardware after applying Tx scheduling configuration.\n");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	} else if (err == -EIO) {</div><div class='ctx'> 		dev_info(dev, "DDP package does not support Tx scheduling layers switching feature - please update to the latest DDP package and try again\n");</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (err == -EEXIST) {</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Do not treat this as a fatal error. */</div><div class='add'>+	dev_info(dev, "Failed to apply Tx scheduling configuration, err %pe\n",</div><div class='add'>+		 ERR_PTR(err));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_init_supported_rxdids - Initialize supported Rx descriptor IDs</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @pf: pointer to pf structure</div><div class='add'>+ *</div><div class='add'>+ * The pf-&gt;supported_rxdids bitmap is used to indicate to VFs which descriptor</div><div class='add'>+ * formats the PF hardware supports. The exact list of supported RXDIDs</div><div class='add'>+ * depends on the loaded DDP package. The IDs can be determined by reading the</div><div class='add'>+ * GLFLXP_RXDID_FLAGS register after the DDP package is loaded.</div><div class='add'>+ *</div><div class='add'>+ * Note that the legacy 32-byte RXDID 0 is always supported but is not listed</div><div class='add'>+ * in the DDP package. The 16-byte legacy descriptor is never supported by</div><div class='add'>+ * VFs.</div><div class='add'>+ */</div><div class='add'>+static void ice_init_supported_rxdids(struct ice_hw *hw, struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	pf-&gt;supported_rxdids = BIT(ICE_RXDID_LEGACY_1);</div><div class='add'>+</div><div class='add'>+	for (int i = ICE_RXDID_FLEX_NIC; i &lt; ICE_FLEX_DESC_RXDID_MAX_NUM; i++) {</div><div class='add'>+		u32 regval;</div><div class='add'>+</div><div class='add'>+		regval = rd32(hw, GLFLXP_RXDID_FLAGS(i, 0));</div><div class='add'>+		if ((regval &gt;&gt; GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S)</div><div class='add'>+			&amp; GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M)</div><div class='add'>+			pf-&gt;supported_rxdids |= BIT(i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_init_ddp_config - DDP related configuration</div><div class='ctx'>  * @hw: pointer to the hardware structure</div><div class='ctx'>  * @pf: pointer to pf structure</div><div class='hunk'>@@ -4588,6 +4621,9 @@ static int ice_init_ddp_config(struct ice_hw *hw, struct ice_pf *pf)</div><div class='ctx'> 	ice_load_pkg(firmware, pf);</div><div class='ctx'> 	release_firmware(firmware);</div><div class='ctx'> </div><div class='add'>+	/* Initialize the supported Rx descriptor IDs after loading DDP */</div><div class='add'>+	ice_init_supported_rxdids(hw, pf);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4619,19 +4655,6 @@ static void ice_print_wake_reason(struct ice_pf *pf)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_pf_fwlog_update_module - update 1 module</div><div class='del'>- * @pf: pointer to the PF struct</div><div class='del'>- * @log_level: log_level to use for the @module</div><div class='del'>- * @module: module to update</div><div class='del'>- */</div><div class='del'>-void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module)</div><div class='del'>-{</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-</div><div class='del'>-	hw-&gt;fwlog_cfg.module_entries[module].log_level = log_level;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_register_netdev - register netdev</div><div class='ctx'>  * @vsi: pointer to the VSI struct</div><div class='ctx'>  */</div><div class='hunk'>@@ -4710,55 +4733,11 @@ static void ice_decfg_netdev(struct ice_vsi *vsi)</div><div class='ctx'> 	vsi-&gt;netdev = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_wait_for_fw - wait for full FW readiness</div><div class='del'>- * @hw: pointer to the hardware structure</div><div class='del'>- * @timeout: milliseconds that can elapse before timing out</div><div class='del'>- */</div><div class='del'>-static int ice_wait_for_fw(struct ice_hw *hw, u32 timeout)</div><div class='add'>+void ice_init_dev_hw(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	int fw_loading;</div><div class='del'>-	u32 elapsed = 0;</div><div class='del'>-</div><div class='del'>-	while (elapsed &lt;= timeout) {</div><div class='del'>-		fw_loading = rd32(hw, GL_MNG_FWSM) &amp; GL_MNG_FWSM_FW_LOADING_M;</div><div class='del'>-</div><div class='del'>-		/* firmware was not yet loaded, we have to wait more */</div><div class='del'>-		if (fw_loading) {</div><div class='del'>-			elapsed += 100;</div><div class='del'>-			msleep(100);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ETIMEDOUT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int ice_init_dev(struct ice_pf *pf)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = ice_pf_to_dev(pf);</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = ice_init_hw(hw);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "ice_init_hw failed: %d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Some cards require longer initialization times</div><div class='del'>-	 * due to necessity of loading FW from an external source.</div><div class='del'>-	 * This can take even half a minute.</div><div class='del'>-	 */</div><div class='del'>-	if (ice_is_pf_c827(hw)) {</div><div class='del'>-		err = ice_wait_for_fw(hw, 30000);</div><div class='del'>-		if (err) {</div><div class='del'>-			dev_err(dev, "ice_wait_for_fw timed out");</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ice_init_feature_support(pf);</div><div class='ctx'> </div><div class='ctx'> 	err = ice_init_ddp_config(hw, pf);</div><div class='hunk'>@@ -4775,64 +4754,28 @@ int ice_init_dev(struct ice_pf *pf)</div><div class='ctx'> 		 */</div><div class='ctx'> 		ice_set_safe_mode_caps(hw);</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	err = ice_init_pf(pf);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "ice_init_pf failed: %d\n", err);</div><div class='del'>-		goto err_init_pf;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pf-&gt;hw.udp_tunnel_nic.set_port = ice_udp_tunnel_set_port;</div><div class='del'>-	pf-&gt;hw.udp_tunnel_nic.unset_port = ice_udp_tunnel_unset_port;</div><div class='del'>-	pf-&gt;hw.udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;</div><div class='del'>-	pf-&gt;hw.udp_tunnel_nic.shared = &amp;pf-&gt;hw.udp_tunnel_shared;</div><div class='del'>-	if (pf-&gt;hw.tnl.valid_count[TNL_VXLAN]) {</div><div class='del'>-		pf-&gt;hw.udp_tunnel_nic.tables[0].n_entries =</div><div class='del'>-			pf-&gt;hw.tnl.valid_count[TNL_VXLAN];</div><div class='del'>-		pf-&gt;hw.udp_tunnel_nic.tables[0].tunnel_types =</div><div class='del'>-			UDP_TUNNEL_TYPE_VXLAN;</div><div class='del'>-	}</div><div class='del'>-	if (pf-&gt;hw.tnl.valid_count[TNL_GENEVE]) {</div><div class='del'>-		pf-&gt;hw.udp_tunnel_nic.tables[1].n_entries =</div><div class='del'>-			pf-&gt;hw.tnl.valid_count[TNL_GENEVE];</div><div class='del'>-		pf-&gt;hw.udp_tunnel_nic.tables[1].tunnel_types =</div><div class='del'>-			UDP_TUNNEL_TYPE_GENEVE;</div><div class='del'>-	}</div><div class='add'>+int ice_init_dev(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = ice_pf_to_dev(pf);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='add'>+	ice_set_pf_caps(pf);</div><div class='ctx'> 	err = ice_init_interrupt_scheme(pf);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "ice_init_interrupt_scheme failed: %d\n", err);</div><div class='del'>-		err = -EIO;</div><div class='del'>-		goto err_init_interrupt_scheme;</div><div class='add'>+		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* In case of MSIX we are going to setup the misc vector right here</div><div class='del'>-	 * to handle admin queue events etc. In case of legacy and MSI</div><div class='del'>-	 * the misc functionality and queue processing is combined in</div><div class='del'>-	 * the same vector and that gets setup at open.</div><div class='del'>-	 */</div><div class='del'>-	err = ice_req_irq_msix_misc(pf);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "setup of misc vector failed: %d\n", err);</div><div class='del'>-		goto err_req_irq_msix_misc;</div><div class='del'>-	}</div><div class='add'>+	ice_start_service_task(pf);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_req_irq_msix_misc:</div><div class='del'>-	ice_clear_interrupt_scheme(pf);</div><div class='del'>-err_init_interrupt_scheme:</div><div class='del'>-	ice_deinit_pf(pf);</div><div class='del'>-err_init_pf:</div><div class='del'>-	ice_deinit_hw(hw);</div><div class='del'>-	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ice_deinit_dev(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	ice_free_irq_msix_misc(pf);</div><div class='del'>-	ice_deinit_pf(pf);</div><div class='del'>-	ice_deinit_hw(&amp;pf-&gt;hw);</div><div class='add'>+	ice_service_task_stop(pf);</div><div class='ctx'> </div><div class='ctx'> 	/* Service task is already stopped, so call reset directly. */</div><div class='ctx'> 	ice_reset(&amp;pf-&gt;hw, ICE_RESET_PFR);</div><div class='hunk'>@@ -5057,12 +5000,14 @@ static int ice_init_devlink(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 	ice_devlink_init_regions(pf);</div><div class='ctx'> 	ice_devlink_register(pf);</div><div class='add'>+	ice_health_init(pf);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ice_deinit_devlink(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='add'>+	ice_health_deinit(pf);</div><div class='ctx'> 	ice_devlink_unregister(pf);</div><div class='ctx'> 	ice_devlink_destroy_regions(pf);</div><div class='ctx'> 	ice_devlink_unregister_params(pf);</div><div class='hunk'>@@ -5070,15 +5015,24 @@ static void ice_deinit_devlink(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> static int ice_init(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = ice_pf_to_dev(pf);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = ice_init_dev(pf);</div><div class='del'>-	if (err)</div><div class='add'>+	err = ice_init_pf(pf);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "ice_init_pf failed: %d\n", err);</div><div class='ctx'> 		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pf-&gt;hw.mac_type == ICE_MAC_E830) {</div><div class='add'>+		err = pci_enable_ptm(pf-&gt;pdev, NULL);</div><div class='add'>+		if (err)</div><div class='add'>+			dev_dbg(dev, "PCIe PTM not supported by PCIe bus/controller\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = ice_alloc_vsis(pf);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_alloc_vsis;</div><div class='add'>+		goto unroll_pf_init;</div><div class='ctx'> </div><div class='ctx'> 	err = ice_init_pf_sw(pf);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -5115,8 +5069,8 @@ err_init_link:</div><div class='ctx'> 	ice_deinit_pf_sw(pf);</div><div class='ctx'> err_init_pf_sw:</div><div class='ctx'> 	ice_dealloc_vsis(pf);</div><div class='del'>-err_alloc_vsis:</div><div class='del'>-	ice_deinit_dev(pf);</div><div class='add'>+unroll_pf_init:</div><div class='add'>+	ice_deinit_pf(pf);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5127,7 +5081,7 @@ static void ice_deinit(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 	ice_deinit_pf_sw(pf);</div><div class='ctx'> 	ice_dealloc_vsis(pf);</div><div class='del'>-	ice_deinit_dev(pf);</div><div class='add'>+	ice_deinit_pf(pf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5175,11 +5129,12 @@ int ice_load(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 	ice_napi_add(vsi);</div><div class='ctx'> </div><div class='add'>+	ice_init_features(pf);</div><div class='add'>+</div><div class='ctx'> 	err = ice_init_rdma(pf);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_init_rdma;</div><div class='ctx'> </div><div class='del'>-	ice_init_features(pf);</div><div class='ctx'> 	ice_service_task_restart(pf);</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(ICE_DOWN, pf-&gt;state);</div><div class='hunk'>@@ -5187,6 +5142,7 @@ int ice_load(struct ice_pf *pf)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_init_rdma:</div><div class='add'>+	ice_deinit_features(pf);</div><div class='ctx'> 	ice_tc_indir_block_unregister(vsi);</div><div class='ctx'> err_tc_indir_block_register:</div><div class='ctx'> 	ice_unregister_netdev(vsi);</div><div class='hunk'>@@ -5210,14 +5166,44 @@ void ice_unload(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 	devl_assert_locked(priv_to_devlink(pf));</div><div class='ctx'> </div><div class='del'>-	ice_deinit_features(pf);</div><div class='ctx'> 	ice_deinit_rdma(pf);</div><div class='add'>+	ice_deinit_features(pf);</div><div class='ctx'> 	ice_tc_indir_block_unregister(vsi);</div><div class='ctx'> 	ice_unregister_netdev(vsi);</div><div class='ctx'> 	ice_devlink_destroy_pf_port(pf);</div><div class='ctx'> 	ice_decfg_netdev(vsi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ice_probe_recovery_mode(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = ice_pf_to_dev(pf);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	dev_err(dev, "Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode\n");</div><div class='add'>+</div><div class='add'>+	INIT_HLIST_HEAD(&amp;pf-&gt;aq_wait_list);</div><div class='add'>+	spin_lock_init(&amp;pf-&gt;aq_wait_lock);</div><div class='add'>+	init_waitqueue_head(&amp;pf-&gt;aq_wait_queue);</div><div class='add'>+</div><div class='add'>+	timer_setup(&amp;pf-&gt;serv_tmr, ice_service_timer, 0);</div><div class='add'>+	pf-&gt;serv_tmr_period = HZ;</div><div class='add'>+	INIT_WORK(&amp;pf-&gt;serv_task, ice_service_task_recovery_mode);</div><div class='add'>+	clear_bit(ICE_SERVICE_SCHED, pf-&gt;state);</div><div class='add'>+	err = ice_create_all_ctrlq(&amp;pf-&gt;hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	scoped_guard(devl, priv_to_devlink(pf)) {</div><div class='add'>+		err = ice_init_devlink(pf);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ice_service_task_restart(pf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_probe - Device initialization routine</div><div class='ctx'>  * @pdev: PCI device information struct</div><div class='hunk'>@@ -5229,6 +5215,7 @@ static int</div><div class='ctx'> ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	bool need_dev_deinit = false;</div><div class='ctx'> 	struct ice_adapter *adapter;</div><div class='ctx'> 	struct ice_pf *pf;</div><div class='ctx'> 	struct ice_hw *hw;</div><div class='hunk'>@@ -5281,13 +5268,7 @@ ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='del'>-</div><div class='del'>-	adapter = ice_adapter_get(pdev);</div><div class='del'>-	if (IS_ERR(adapter))</div><div class='del'>-		return PTR_ERR(adapter);</div><div class='del'>-</div><div class='ctx'> 	pf-&gt;pdev = pdev;</div><div class='del'>-	pf-&gt;adapter = adapter;</div><div class='ctx'> 	pci_set_drvdata(pdev, pf);</div><div class='ctx'> 	set_bit(ICE_DOWN, pf-&gt;state);</div><div class='ctx'> 	/* Disable service task until DOWN bit is cleared */</div><div class='hunk'>@@ -5315,29 +5296,55 @@ ice_probe(struct pci_dev *pdev, const struct pci_device_id __always_unused *ent)</div><div class='ctx'> 		hw-&gt;debug_mask = debug;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	if (ice_is_recovery_mode(hw))</div><div class='add'>+		return ice_probe_recovery_mode(pf);</div><div class='add'>+</div><div class='add'>+	err = ice_init_hw(hw);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "ice_init_hw failed: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adapter = ice_adapter_get(pdev);</div><div class='add'>+	if (IS_ERR(adapter)) {</div><div class='add'>+		err = PTR_ERR(adapter);</div><div class='add'>+		goto unroll_hw_init;</div><div class='add'>+	}</div><div class='add'>+	pf-&gt;adapter = adapter;</div><div class='add'>+</div><div class='add'>+	err = ice_init_dev(pf);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unroll_adapter;</div><div class='add'>+</div><div class='ctx'> 	err = ice_init(pf);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_init;</div><div class='add'>+		goto unroll_dev_init;</div><div class='ctx'> </div><div class='ctx'> 	devl_lock(priv_to_devlink(pf));</div><div class='ctx'> 	err = ice_load(pf);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_load;</div><div class='add'>+		goto unroll_init;</div><div class='ctx'> </div><div class='ctx'> 	err = ice_init_devlink(pf);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_init_devlink;</div><div class='add'>+		goto unroll_load;</div><div class='ctx'> 	devl_unlock(priv_to_devlink(pf));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_init_devlink:</div><div class='add'>+unroll_load:</div><div class='ctx'> 	ice_unload(pf);</div><div class='del'>-err_load:</div><div class='add'>+unroll_init:</div><div class='ctx'> 	devl_unlock(priv_to_devlink(pf));</div><div class='ctx'> 	ice_deinit(pf);</div><div class='del'>-err_init:</div><div class='add'>+unroll_dev_init:</div><div class='add'>+	need_dev_deinit = true;</div><div class='add'>+unroll_adapter:</div><div class='ctx'> 	ice_adapter_put(pdev);</div><div class='add'>+unroll_hw_init:</div><div class='add'>+	ice_deinit_hw(hw);</div><div class='add'>+	if (need_dev_deinit)</div><div class='add'>+		ice_deinit_dev(pf);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5399,7 +5406,7 @@ static void ice_setup_mc_magic_wake(struct ice_pf *pf)</div><div class='ctx'> 	status = ice_aq_manage_mac_write(hw, mac_addr, flags, NULL);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		dev_err(dev, "Failed to enable Multicast Magic Packet wake, err %d aq_err %s\n",</div><div class='del'>-			status, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			status, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5417,6 +5424,14 @@ static void ice_remove(struct pci_dev *pdev)</div><div class='ctx'> 		msleep(100);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ice_is_recovery_mode(&amp;pf-&gt;hw)) {</div><div class='add'>+		ice_service_task_stop(pf);</div><div class='add'>+		scoped_guard(devl, priv_to_devlink(pf)) {</div><div class='add'>+			ice_deinit_devlink(pf);</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (test_bit(ICE_FLAG_SRIOV_ENA, pf-&gt;flags)) {</div><div class='ctx'> 		set_bit(ICE_VF_RESETS_DISABLED, pf-&gt;state);</div><div class='ctx'> 		ice_free_vfs(pf);</div><div class='hunk'>@@ -5424,10 +5439,6 @@ static void ice_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	ice_hwmon_exit(pf);</div><div class='ctx'> </div><div class='del'>-	ice_service_task_stop(pf);</div><div class='del'>-	ice_aq_cancel_waiting_tasks(pf);</div><div class='del'>-	set_bit(ICE_DOWN, pf-&gt;state);</div><div class='del'>-</div><div class='ctx'> 	if (!ice_is_safe_mode(pf))</div><div class='ctx'> 		ice_remove_arfs(pf);</div><div class='ctx'> </div><div class='hunk'>@@ -5445,6 +5456,11 @@ static void ice_remove(struct pci_dev *pdev)</div><div class='ctx'> 	ice_set_wake(pf);</div><div class='ctx'> </div><div class='ctx'> 	ice_adapter_put(pdev);</div><div class='add'>+	ice_deinit_hw(&amp;pf-&gt;hw);</div><div class='add'>+</div><div class='add'>+	ice_deinit_dev(pf);</div><div class='add'>+	ice_aq_cancel_waiting_tasks(pf);</div><div class='add'>+	set_bit(ICE_DOWN, pf-&gt;state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5637,7 +5653,6 @@ static int ice_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_power_state(pdev, PCI_D0);</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 	if (!pci_device_is_present(pdev))</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -5737,7 +5752,6 @@ static pci_ers_result_t ice_pci_err_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pci_set_master(pdev);</div><div class='ctx'> 		pci_restore_state(pdev);</div><div class='del'>-		pci_save_state(pdev);</div><div class='ctx'> 		pci_wake_from_d3(pdev, false);</div><div class='ctx'> </div><div class='ctx'> 		/* Check for life */</div><div class='hunk'>@@ -5857,6 +5871,15 @@ static const struct pci_device_id ice_pci_tbl[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E830_XXV_QSFP), },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E830C_SFP), },</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E830_XXV_SFP), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835CC_BACKPLANE), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835CC_QSFP56), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835CC_SFP), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835C_BACKPLANE), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835C_QSFP), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835C_SFP), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835_L_BACKPLANE), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835_L_QSFP), },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, ICE_DEV_ID_E835_L_SFP), },</div><div class='ctx'> 	/* required last entry */</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='hunk'>@@ -5900,7 +5923,7 @@ static int __init ice_module_init(void)</div><div class='ctx'> </div><div class='ctx'> 	ice_adv_lnk_speed_maps_init();</div><div class='ctx'> </div><div class='del'>-	ice_wq = alloc_workqueue("%s", 0, 0, KBUILD_MODNAME);</div><div class='add'>+	ice_wq = alloc_workqueue("%s", WQ_UNBOUND, 0, KBUILD_MODNAME);</div><div class='ctx'> 	if (!ice_wq) {</div><div class='ctx'> 		pr_err("Failed to create workqueue\n");</div><div class='ctx'> 		return status;</div><div class='hunk'>@@ -6125,12 +6148,14 @@ ice_set_tx_maxrate(struct net_device *netdev, int queue_index, u32 maxrate)</div><div class='ctx'>  * @addr: the MAC address entry being added</div><div class='ctx'>  * @vid: VLAN ID</div><div class='ctx'>  * @flags: instructions from stack about fdb operation</div><div class='add'>+ * @notified: whether notification was emitted</div><div class='ctx'>  * @extack: netlink extended ack</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='ctx'> ice_fdb_add(struct ndmsg *ndm, struct nlattr __always_unused *tb[],</div><div class='ctx'> 	    struct net_device *dev, const unsigned char *addr, u16 vid,</div><div class='del'>-	    u16 flags, struct netlink_ext_ack __always_unused *extack)</div><div class='add'>+	    u16 flags, bool *notified,</div><div class='add'>+	    struct netlink_ext_ack __always_unused *extack)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -6164,12 +6189,14 @@ ice_fdb_add(struct ndmsg *ndm, struct nlattr __always_unused *tb[],</div><div class='ctx'>  * @dev: the net device pointer</div><div class='ctx'>  * @addr: the MAC address entry being added</div><div class='ctx'>  * @vid: VLAN ID</div><div class='add'>+ * @notified: whether notification was emitted</div><div class='ctx'>  * @extack: netlink extended ack</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='ctx'> ice_fdb_del(struct ndmsg *ndm, __always_unused struct nlattr *tb[],</div><div class='ctx'> 	    struct net_device *dev, const unsigned char *addr,</div><div class='del'>-	    __always_unused u16 vid, struct netlink_ext_ack *extack)</div><div class='add'>+	    __always_unused u16 vid, bool *notified,</div><div class='add'>+	    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -6373,10 +6400,12 @@ ice_set_vlan_filtering_features(struct ice_vsi *vsi, netdev_features_t features)</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* support Single VLAN Mode (SVM) and Double VLAN Mode (DVM) by checking</div><div class='del'>-	 * if either bit is set</div><div class='add'>+	 * if either bit is set. In switchdev mode Rx filtering should never be</div><div class='add'>+	 * enabled.</div><div class='ctx'> 	 */</div><div class='del'>-	if (features &amp;</div><div class='del'>-	    (NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_STAG_FILTER))</div><div class='add'>+	if ((features &amp;</div><div class='add'>+	     (NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_STAG_FILTER)) &amp;&amp;</div><div class='add'>+	     !ice_is_eswitch_mode_switchdev(vsi-&gt;back))</div><div class='ctx'> 		err = vlan_ops-&gt;ena_rx_filtering(vsi);</div><div class='ctx'> 	else</div><div class='ctx'> 		err = vlan_ops-&gt;dis_rx_filtering(vsi);</div><div class='hunk'>@@ -6530,6 +6559,18 @@ ice_set_features(struct net_device *netdev, netdev_features_t features)</div><div class='ctx'> 	if (changed &amp; NETIF_F_LOOPBACK)</div><div class='ctx'> 		ret = ice_set_loopback(vsi, !!(features &amp; NETIF_F_LOOPBACK));</div><div class='ctx'> </div><div class='add'>+	/* Due to E830 hardware limitations, TSO (NETIF_F_ALL_TSO) with GCS</div><div class='add'>+	 * (NETIF_F_HW_CSUM) is not supported.</div><div class='add'>+	 */</div><div class='add'>+	if (ice_is_feature_supported(pf, ICE_F_GCS) &amp;&amp;</div><div class='add'>+	    ((features &amp; NETIF_F_HW_CSUM) &amp;&amp; (features &amp; NETIF_F_ALL_TSO))) {</div><div class='add'>+		if (netdev-&gt;features &amp; NETIF_F_HW_CSUM)</div><div class='add'>+			dev_err(ice_pf_to_dev(pf), "To enable TSO, you must first disable HW checksum.\n");</div><div class='add'>+		else</div><div class='add'>+			dev_err(ice_pf_to_dev(pf), "To enable HW checksum, you must first disable TSO.\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6753,7 +6794,7 @@ static int ice_up_complete(struct ice_vsi *vsi)</div><div class='ctx'> 		ice_print_link_msg(vsi, true);</div><div class='ctx'> 		netif_tx_start_all_queues(vsi-&gt;netdev);</div><div class='ctx'> 		netif_carrier_on(vsi-&gt;netdev);</div><div class='del'>-		ice_ptp_link_change(pf, pf-&gt;hw.pf_id, true);</div><div class='add'>+		ice_ptp_link_change(pf, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Perform an initial read of the statistics registers now to</div><div class='hunk'>@@ -7085,6 +7126,9 @@ void ice_update_pf_stats(struct ice_pf *pf)</div><div class='ctx'> 			  &amp;prev_ps-&gt;mac_remote_faults,</div><div class='ctx'> 			  &amp;cur_ps-&gt;mac_remote_faults);</div><div class='ctx'> </div><div class='add'>+	ice_stat_update32(hw, GLPRT_RLEC(port), pf-&gt;stat_prev_loaded,</div><div class='add'>+			  &amp;prev_ps-&gt;rx_len_errors, &amp;cur_ps-&gt;rx_len_errors);</div><div class='add'>+</div><div class='ctx'> 	ice_stat_update32(hw, GLPRT_RUC(port), pf-&gt;stat_prev_loaded,</div><div class='ctx'> 			  &amp;prev_ps-&gt;rx_undersize, &amp;cur_ps-&gt;rx_undersize);</div><div class='ctx'> </div><div class='hunk'>@@ -7223,7 +7267,7 @@ int ice_down(struct ice_vsi *vsi)</div><div class='ctx'> </div><div class='ctx'> 	if (vsi-&gt;netdev) {</div><div class='ctx'> 		vlan_err = ice_vsi_del_vlan_zero(vsi);</div><div class='del'>-		ice_ptp_link_change(vsi-&gt;back, vsi-&gt;back-&gt;hw.pf_id, false);</div><div class='add'>+		ice_ptp_link_change(vsi-&gt;back, false);</div><div class='ctx'> 		netif_carrier_off(vsi-&gt;netdev);</div><div class='ctx'> 		netif_tx_disable(vsi-&gt;netdev);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -7445,7 +7489,8 @@ int ice_vsi_open(struct ice_vsi *vsi)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_setup_rx;</div><div class='ctx'> </div><div class='del'>-	ice_vsi_cfg_netdev_tc(vsi, vsi-&gt;tc_cfg.ena_tc);</div><div class='add'>+	if (bitmap_empty(pf-&gt;txtime_txqs, pf-&gt;max_pf_txqs))</div><div class='add'>+		ice_vsi_cfg_netdev_tc(vsi, vsi-&gt;tc_cfg.ena_tc);</div><div class='ctx'> </div><div class='ctx'> 	if (vsi-&gt;type == ICE_VSI_PF || vsi-&gt;type == ICE_VSI_SF) {</div><div class='ctx'> 		/* Notify the stack of the actual queue counts. */</div><div class='hunk'>@@ -7756,6 +7801,8 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type)</div><div class='ctx'> 	/* if we get here, reset flow is successful */</div><div class='ctx'> 	clear_bit(ICE_RESET_FAILED, pf-&gt;state);</div><div class='ctx'> </div><div class='add'>+	ice_health_clear(pf);</div><div class='add'>+</div><div class='ctx'> 	ice_plug_aux_dev(pf);</div><div class='ctx'> 	if (ice_is_feature_supported(pf, ICE_F_SRIOV_LAG))</div><div class='ctx'> 		ice_lag_rebuild(pf);</div><div class='hunk'>@@ -7806,12 +7853,6 @@ int ice_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 				   frame_size - ICE_ETH_PKT_HDR_PAD);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-	} else if (test_bit(ICE_FLAG_LEGACY_RX, pf-&gt;flags)) {</div><div class='del'>-		if (new_mtu + ICE_ETH_PKT_HDR_PAD &gt; ICE_MAX_FRAME_LEGACY_RX) {</div><div class='del'>-			netdev_err(netdev, "Too big MTU for legacy-rx; Max is %d\n",</div><div class='del'>-				   ICE_MAX_FRAME_LEGACY_RX - ICE_ETH_PKT_HDR_PAD);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* if a reset is in progress, wait for some time for it to complete */</div><div class='hunk'>@@ -7842,69 +7883,6 @@ int ice_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_eth_ioctl - Access the hwtstamp interface</div><div class='del'>- * @netdev: network interface device structure</div><div class='del'>- * @ifr: interface request data</div><div class='del'>- * @cmd: ioctl command</div><div class='del'>- */</div><div class='del'>-static int ice_eth_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return ice_ptp_get_ts_config(pf, ifr);</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return ice_ptp_set_ts_config(pf, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_aq_str - convert AQ err code to a string</div><div class='del'>- * @aq_err: the AQ error code to convert</div><div class='del'>- */</div><div class='del'>-const char *ice_aq_str(enum ice_aq_err aq_err)</div><div class='del'>-{</div><div class='del'>-	switch (aq_err) {</div><div class='del'>-	case ICE_AQ_RC_OK:</div><div class='del'>-		return "OK";</div><div class='del'>-	case ICE_AQ_RC_EPERM:</div><div class='del'>-		return "ICE_AQ_RC_EPERM";</div><div class='del'>-	case ICE_AQ_RC_ENOENT:</div><div class='del'>-		return "ICE_AQ_RC_ENOENT";</div><div class='del'>-	case ICE_AQ_RC_ENOMEM:</div><div class='del'>-		return "ICE_AQ_RC_ENOMEM";</div><div class='del'>-	case ICE_AQ_RC_EBUSY:</div><div class='del'>-		return "ICE_AQ_RC_EBUSY";</div><div class='del'>-	case ICE_AQ_RC_EEXIST:</div><div class='del'>-		return "ICE_AQ_RC_EEXIST";</div><div class='del'>-	case ICE_AQ_RC_EINVAL:</div><div class='del'>-		return "ICE_AQ_RC_EINVAL";</div><div class='del'>-	case ICE_AQ_RC_ENOSPC:</div><div class='del'>-		return "ICE_AQ_RC_ENOSPC";</div><div class='del'>-	case ICE_AQ_RC_ENOSYS:</div><div class='del'>-		return "ICE_AQ_RC_ENOSYS";</div><div class='del'>-	case ICE_AQ_RC_EMODE:</div><div class='del'>-		return "ICE_AQ_RC_EMODE";</div><div class='del'>-	case ICE_AQ_RC_ENOSEC:</div><div class='del'>-		return "ICE_AQ_RC_ENOSEC";</div><div class='del'>-	case ICE_AQ_RC_EBADSIG:</div><div class='del'>-		return "ICE_AQ_RC_EBADSIG";</div><div class='del'>-	case ICE_AQ_RC_ESVN:</div><div class='del'>-		return "ICE_AQ_RC_ESVN";</div><div class='del'>-	case ICE_AQ_RC_EBADMAN:</div><div class='del'>-		return "ICE_AQ_RC_EBADMAN";</div><div class='del'>-	case ICE_AQ_RC_EBADBUF:</div><div class='del'>-		return "ICE_AQ_RC_EBADBUF";</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return "ICE_AQ_RC_UNKNOWN";</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_set_rss_lut - Set RSS LUT</div><div class='ctx'>  * @vsi: Pointer to VSI structure</div><div class='ctx'>  * @lut: Lookup table</div><div class='hunk'>@@ -7929,7 +7907,7 @@ int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size)</div><div class='ctx'> 	status = ice_aq_set_rss_lut(hw, &amp;params);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "Cannot set RSS lut, err %d aq_err %s\n",</div><div class='del'>-			status, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			status, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -7952,7 +7930,7 @@ int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed)</div><div class='ctx'> 	status = ice_aq_set_rss_key(hw, vsi-&gt;idx, (struct ice_aqc_get_set_rss_keys *)seed);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "Cannot set RSS key, err %d aq_err %s\n",</div><div class='del'>-			status, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			status, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -7982,7 +7960,7 @@ int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size)</div><div class='ctx'> 	status = ice_aq_get_rss_lut(hw, &amp;params);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "Cannot get RSS lut, err %d aq_err %s\n",</div><div class='del'>-			status, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			status, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -8005,7 +7983,7 @@ int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed)</div><div class='ctx'> 	status = ice_aq_get_rss_key(hw, vsi-&gt;idx, (struct ice_aqc_get_set_rss_keys *)seed);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "Cannot get RSS key, err %d aq_err %s\n",</div><div class='del'>-			status, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			status, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -8078,9 +8056,7 @@ static int</div><div class='ctx'> ice_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,</div><div class='ctx'> 		   struct net_device *dev, u32 filter_mask, int nlflags)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(dev);</div><div class='del'>-	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='del'>-	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(dev);</div><div class='ctx'> 	u16 bmode;</div><div class='ctx'> </div><div class='ctx'> 	bmode = pf-&gt;first_sw-&gt;bridge_mode;</div><div class='hunk'>@@ -8122,7 +8098,7 @@ static int ice_vsi_update_bridge_mode(struct ice_vsi *vsi, u16 bmode)</div><div class='ctx'> 	ret = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "update VSI for bridge mode failed, bmode = %d err %d aq_err %s\n",</div><div class='del'>-			bmode, ret, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			bmode, ret, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Update sw flags for book keeping */</div><div class='hunk'>@@ -8150,8 +8126,7 @@ ice_bridge_setlink(struct net_device *dev, struct nlmsghdr *nlh,</div><div class='ctx'> 		   u16 __always_unused flags,</div><div class='ctx'> 		   struct netlink_ext_ack __always_unused *extack)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(dev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(dev);</div><div class='ctx'> 	struct nlattr *attr, *br_spec;</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	struct ice_sw *pf_sw;</div><div class='hunk'>@@ -8190,7 +8165,7 @@ ice_bridge_setlink(struct net_device *dev, struct nlmsghdr *nlh,</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			netdev_err(dev, "switch rule update failed, mode = %d err %d aq_err %s\n",</div><div class='ctx'> 				   mode, err,</div><div class='del'>-				   ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+				   libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 			/* revert hw-&gt;evb_veb */</div><div class='ctx'> 			hw-&gt;evb_veb = (pf_sw-&gt;bridge_mode == BRIDGE_MODE_VEB);</div><div class='ctx'> 			return err;</div><div class='hunk'>@@ -8246,16 +8221,18 @@ void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='ctx'> </div><div class='ctx'> 	if (tx_ring) {</div><div class='ctx'> 		struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-		u32 head, val = 0;</div><div class='add'>+		u32 head, intr = 0;</div><div class='ctx'> </div><div class='ctx'> 		head = FIELD_GET(QTX_COMM_HEAD_HEAD_M,</div><div class='ctx'> 				 rd32(hw, QTX_COMM_HEAD(vsi-&gt;txq_map[txqueue])));</div><div class='ctx'> 		/* Read interrupt register */</div><div class='del'>-		val = rd32(hw, GLINT_DYN_CTL(tx_ring-&gt;q_vector-&gt;reg_idx));</div><div class='add'>+		intr = rd32(hw, GLINT_DYN_CTL(tx_ring-&gt;q_vector-&gt;reg_idx));</div><div class='ctx'> </div><div class='ctx'> 		netdev_info(netdev, "tx_timeout: VSI_num: %d, Q %u, NTC: 0x%x, HW_HEAD: 0x%x, NTU: 0x%x, INT: 0x%x\n",</div><div class='ctx'> 			    vsi-&gt;vsi_num, txqueue, tx_ring-&gt;next_to_clean,</div><div class='del'>-			    head, tx_ring-&gt;next_to_use, val);</div><div class='add'>+			    head, tx_ring-&gt;next_to_use, intr);</div><div class='add'>+</div><div class='add'>+		ice_prep_tx_hang_report(pf, tx_ring, vsi-&gt;vsi_num, head, intr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pf-&gt;tx_timeout_last_recovery = jiffies;</div><div class='hunk'>@@ -8289,11 +8266,16 @@ void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='ctx'>  * @np: net device to configure</div><div class='ctx'>  * @filter_dev: device on which filter is added</div><div class='ctx'>  * @cls_flower: offload data</div><div class='add'>+ * @ingress: if the rule is added to an ingress block</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the flower was successfully added or deleted,</div><div class='add'>+ *	   negative error code otherwise.</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='ctx'> ice_setup_tc_cls_flower(struct ice_netdev_priv *np,</div><div class='ctx'> 			struct net_device *filter_dev,</div><div class='del'>-			struct flow_cls_offload *cls_flower)</div><div class='add'>+			struct flow_cls_offload *cls_flower,</div><div class='add'>+			bool ingress)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='ctx'> </div><div class='hunk'>@@ -8302,7 +8284,7 @@ ice_setup_tc_cls_flower(struct ice_netdev_priv *np,</div><div class='ctx'> </div><div class='ctx'> 	switch (cls_flower-&gt;command) {</div><div class='ctx'> 	case FLOW_CLS_REPLACE:</div><div class='del'>-		return ice_add_cls_flower(filter_dev, vsi, cls_flower);</div><div class='add'>+		return ice_add_cls_flower(filter_dev, vsi, cls_flower, ingress);</div><div class='ctx'> 	case FLOW_CLS_DESTROY:</div><div class='ctx'> 		return ice_del_cls_flower(vsi, cls_flower);</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -8311,20 +8293,46 @@ ice_setup_tc_cls_flower(struct ice_netdev_priv *np,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_setup_tc_block_cb - callback handler registered for TC block</div><div class='add'>+ * ice_setup_tc_block_cb_ingress - callback handler for ingress TC block</div><div class='ctx'>  * @type: TC SETUP type</div><div class='ctx'>  * @type_data: TC flower offload data that contains user input</div><div class='ctx'>  * @cb_priv: netdev private data</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the setup was successful, negative error code otherwise.</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='del'>-ice_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv)</div><div class='add'>+ice_setup_tc_block_cb_ingress(enum tc_setup_type type, void *type_data,</div><div class='add'>+			      void *cb_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_netdev_priv *np = cb_priv;</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case TC_SETUP_CLSFLOWER:</div><div class='ctx'> 		return ice_setup_tc_cls_flower(np, np-&gt;vsi-&gt;netdev,</div><div class='del'>-					       type_data);</div><div class='add'>+					       type_data, true);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_setup_tc_block_cb_egress - callback handler for egress TC block</div><div class='add'>+ * @type: TC SETUP type</div><div class='add'>+ * @type_data: TC flower offload data that contains user input</div><div class='add'>+ * @cb_priv: netdev private data</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the setup was successful, negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_setup_tc_block_cb_egress(enum tc_setup_type type, void *type_data,</div><div class='add'>+			     void *cb_priv)</div><div class='add'>+{</div><div class='add'>+	struct ice_netdev_priv *np = cb_priv;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_CLSFLOWER:</div><div class='add'>+		return ice_setup_tc_cls_flower(np, np-&gt;vsi-&gt;netdev,</div><div class='add'>+					       type_data, false);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -9077,7 +9085,7 @@ static int ice_create_q_channels(struct ice_vsi *vsi)</div><div class='ctx'> 		list_add_tail(&amp;ch-&gt;list, &amp;vsi-&gt;ch_list);</div><div class='ctx'> 		vsi-&gt;tc_map_vsi[i] = ch-&gt;ch_vsi;</div><div class='ctx'> 		dev_dbg(ice_pf_to_dev(pf),</div><div class='del'>-			"successfully created channel: VSI %pK\n", ch-&gt;ch_vsi);</div><div class='add'>+			"successfully created channel: VSI %p\n", ch-&gt;ch_vsi);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -9262,6 +9270,96 @@ exit:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ice_cfg_txtime - configure Tx Time for the Tx ring</div><div class='add'>+ * @tx_ring: pointer to the Tx ring structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+static int ice_cfg_txtime(struct ice_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	int err, timeout = 50;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct ice_pf *pf;</div><div class='add'>+	u32 queue;</div><div class='add'>+</div><div class='add'>+	if (!tx_ring)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	vsi = tx_ring-&gt;vsi;</div><div class='add'>+	pf = vsi-&gt;back;</div><div class='add'>+	while (test_and_set_bit(ICE_CFG_BUSY, pf-&gt;state)) {</div><div class='add'>+		timeout--;</div><div class='add'>+		if (!timeout)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	queue = tx_ring-&gt;q_index;</div><div class='add'>+	dev = ice_pf_to_dev(pf);</div><div class='add'>+</div><div class='add'>+	/* Ignore return value, and always attempt to enable queue. */</div><div class='add'>+	ice_qp_dis(vsi, queue);</div><div class='add'>+</div><div class='add'>+	err = ice_qp_ena(vsi, queue);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(dev, "Failed to enable Tx queue %d for TxTime configuration\n",</div><div class='add'>+			queue);</div><div class='add'>+</div><div class='add'>+	clear_bit(ICE_CFG_BUSY, pf-&gt;state);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_offload_txtime - set earliest TxTime first</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ * @qopt_off: etf queue option offload from the skb to set</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+static int ice_offload_txtime(struct net_device *netdev,</div><div class='add'>+			      void *qopt_off)</div><div class='add'>+{</div><div class='add'>+	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct tc_etf_qopt_offload *qopt;</div><div class='add'>+	struct ice_vsi *vsi = np-&gt;vsi;</div><div class='add'>+	struct ice_tx_ring *tx_ring;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!ice_is_feature_supported(pf, ICE_F_TXTIME))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	qopt = qopt_off;</div><div class='add'>+	if (!qopt_off || qopt-&gt;queue &lt; 0 || qopt-&gt;queue &gt;= vsi-&gt;num_txq)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (qopt-&gt;enable)</div><div class='add'>+		set_bit(qopt-&gt;queue,  pf-&gt;txtime_txqs);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(qopt-&gt;queue, pf-&gt;txtime_txqs);</div><div class='add'>+</div><div class='add'>+	if (netif_running(vsi-&gt;netdev)) {</div><div class='add'>+		tx_ring = vsi-&gt;tx_rings[qopt-&gt;queue];</div><div class='add'>+		ret = ice_cfg_txtime(tx_ring);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_info(netdev, "%s TxTime on queue: %i\n",</div><div class='add'>+		    str_enable_disable(qopt-&gt;enable), qopt-&gt;queue);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	netdev_err(netdev, "Failed to %s TxTime on queue: %i\n",</div><div class='add'>+		   str_enable_disable(qopt-&gt;enable), qopt-&gt;queue);</div><div class='add'>+</div><div class='add'>+	if (qopt-&gt;enable)</div><div class='add'>+		clear_bit(qopt-&gt;queue,  pf-&gt;txtime_txqs);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static LIST_HEAD(ice_block_cb_list);</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -9269,27 +9367,45 @@ ice_setup_tc(struct net_device *netdev, enum tc_setup_type type,</div><div class='ctx'> 	     void *type_data)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	enum flow_block_binder_type binder_type;</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev;</div><div class='ctx'> 	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	flow_setup_cb_t *flower_handler;</div><div class='ctx'> 	bool locked = false;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case TC_SETUP_BLOCK:</div><div class='add'>+		binder_type =</div><div class='add'>+			((struct flow_block_offload *)type_data)-&gt;binder_type;</div><div class='add'>+</div><div class='add'>+		switch (binder_type) {</div><div class='add'>+		case FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS:</div><div class='add'>+			flower_handler = ice_setup_tc_block_cb_ingress;</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_BLOCK_BINDER_TYPE_CLSACT_EGRESS:</div><div class='add'>+			flower_handler = ice_setup_tc_block_cb_egress;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		return flow_block_cb_setup_simple(type_data,</div><div class='ctx'> 						  &amp;ice_block_cb_list,</div><div class='del'>-						  ice_setup_tc_block_cb,</div><div class='del'>-						  np, np, true);</div><div class='add'>+						  flower_handler,</div><div class='add'>+						  np, np, false);</div><div class='ctx'> 	case TC_SETUP_QDISC_MQPRIO:</div><div class='ctx'> 		if (ice_is_eswitch_mode_switchdev(pf)) {</div><div class='ctx'> 			netdev_err(netdev, "TC MQPRIO offload not supported, switchdev is enabled\n");</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (pf-&gt;adev) {</div><div class='add'>+		cdev = pf-&gt;cdev_info;</div><div class='add'>+		if (cdev &amp;&amp; cdev-&gt;adev) {</div><div class='ctx'> 			mutex_lock(&amp;pf-&gt;adev_mutex);</div><div class='del'>-			device_lock(&amp;pf-&gt;adev-&gt;dev);</div><div class='add'>+			device_lock(&amp;cdev-&gt;adev-&gt;dev);</div><div class='ctx'> 			locked = true;</div><div class='del'>-			if (pf-&gt;adev-&gt;dev.driver) {</div><div class='add'>+			if (cdev-&gt;adev-&gt;dev.driver) {</div><div class='ctx'> 				netdev_err(netdev, "Cannot change qdisc when RDMA is active\n");</div><div class='ctx'> 				err = -EBUSY;</div><div class='ctx'> 				goto adev_unlock;</div><div class='hunk'>@@ -9303,10 +9419,12 @@ ice_setup_tc(struct net_device *netdev, enum tc_setup_type type,</div><div class='ctx'> </div><div class='ctx'> adev_unlock:</div><div class='ctx'> 		if (locked) {</div><div class='del'>-			device_unlock(&amp;pf-&gt;adev-&gt;dev);</div><div class='add'>+			device_unlock(&amp;cdev-&gt;adev-&gt;dev);</div><div class='ctx'> 			mutex_unlock(&amp;pf-&gt;adev_mutex);</div><div class='ctx'> 		}</div><div class='ctx'> 		return err;</div><div class='add'>+	case TC_SETUP_QDISC_ETF:</div><div class='add'>+		return ice_offload_txtime(netdev, type_data);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -9339,7 +9457,7 @@ ice_indr_setup_block_cb(enum tc_setup_type type, void *type_data,</div><div class='ctx'> 	case TC_SETUP_CLSFLOWER:</div><div class='ctx'> 		return ice_setup_tc_cls_flower(np, priv-&gt;netdev,</div><div class='ctx'> 					       (struct flow_cls_offload *)</div><div class='del'>-					       type_data);</div><div class='add'>+					       type_data, false);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -9442,8 +9560,7 @@ ice_indr_setup_tc_cb(struct net_device *netdev, struct Qdisc *sch,</div><div class='ctx'>  */</div><div class='ctx'> int ice_open(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (ice_is_reset_in_progress(pf-&gt;state)) {</div><div class='ctx'> 		netdev_err(netdev, "can't open net device while reset is in progress");</div><div class='hunk'>@@ -9646,7 +9763,6 @@ static const struct net_device_ops ice_netdev_ops = {</div><div class='ctx'> 	.ndo_change_mtu = ice_change_mtu,</div><div class='ctx'> 	.ndo_get_stats64 = ice_get_stats64,</div><div class='ctx'> 	.ndo_set_tx_maxrate = ice_set_tx_maxrate,</div><div class='del'>-	.ndo_eth_ioctl = ice_eth_ioctl,</div><div class='ctx'> 	.ndo_set_vf_spoofchk = ice_set_vf_spoofchk,</div><div class='ctx'> 	.ndo_set_vf_mac = ice_set_vf_mac,</div><div class='ctx'> 	.ndo_get_vf_config = ice_get_vf_cfg,</div><div class='hunk'>@@ -9670,4 +9786,6 @@ static const struct net_device_ops ice_netdev_ops = {</div><div class='ctx'> 	.ndo_bpf = ice_xdp,</div><div class='ctx'> 	.ndo_xdp_xmit = ice_xdp_xmit,</div><div class='ctx'> 	.ndo_xsk_wakeup = ice_xsk_wakeup,</div><div class='add'>+	.ndo_hwtstamp_get = ice_ptp_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = ice_ptp_hwtstamp_set,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_nvm.c b/drivers/net/ethernet/intel/ice/ice_nvm.c<br/>index 59e8879ac059..7e187a804dfa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_nvm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_nvm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_nvm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_nvm.c</a></div><div class='hunk'>@@ -22,10 +22,10 @@ int ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset,</div><div class='ctx'> 		    u16 length, void *data, bool last_command,</div><div class='ctx'> 		    bool read_shadow_ram, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	struct ice_aqc_nvm *cmd;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.nvm;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	if (offset &gt; ICE_AQC_NVM_MAX_OFFSET)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -125,10 +125,10 @@ ice_aq_update_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset,</div><div class='ctx'> 		  u16 length, void *data, bool last_command, u8 command_flags,</div><div class='ctx'> 		  struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	struct ice_aqc_nvm *cmd;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.nvm;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	/* In offset the highest byte must be zeroed. */</div><div class='ctx'> 	if (offset &amp; 0xFF000000)</div><div class='hunk'>@@ -146,7 +146,7 @@ ice_aq_update_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset,</div><div class='ctx'> 	cmd-&gt;offset_high = (offset &gt;&gt; 16) &amp; 0xFF;</div><div class='ctx'> 	cmd-&gt;length = cpu_to_le16(length);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	return ice_aq_send_cmd(hw, &amp;desc, data, length, cd);</div><div class='ctx'> }</div><div class='hunk'>@@ -161,10 +161,10 @@ ice_aq_update_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset,</div><div class='ctx'>  */</div><div class='ctx'> int ice_aq_erase_nvm(struct ice_hw *hw, u16 module_typeid, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	struct ice_aqc_nvm *cmd;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.nvm;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_nvm_erase);</div><div class='ctx'> </div><div class='hunk'>@@ -869,7 +869,7 @@ static int ice_discover_flash_size(struct ice_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 		status = ice_read_flat_nvm(hw, offset, &amp;len, &amp;data, false);</div><div class='ctx'> 		if (status == -EIO &amp;&amp;</div><div class='del'>-		    hw-&gt;adminq.sq_last_status == ICE_AQ_RC_EINVAL) {</div><div class='add'>+		    hw-&gt;adminq.sq_last_status == LIBIE_AQ_RC_EINVAL) {</div><div class='ctx'> 			ice_debug(hw, ICE_DBG_NVM, "%s: New upper bound of %u bytes\n",</div><div class='ctx'> 				  __func__, offset);</div><div class='ctx'> 			status = 0;</div><div class='hunk'>@@ -1182,14 +1182,14 @@ int ice_init_nvm(struct ice_hw *hw)</div><div class='ctx'> int ice_nvm_validate_checksum(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_nvm_checksum *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	status = ice_acquire_nvm(hw, ICE_RES_READ);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.nvm_checksum;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_nvm_checksum);</div><div class='ctx'> 	cmd-&gt;flags = ICE_AQC_NVM_CHECKSUM_VERIFY;</div><div class='hunk'>@@ -1226,11 +1226,11 @@ int ice_nvm_validate_checksum(struct ice_hw *hw)</div><div class='ctx'>  */</div><div class='ctx'> int ice_nvm_write_activate(struct ice_hw *hw, u16 cmd_flags, u8 *response_flags)</div><div class='ctx'> {</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	struct ice_aqc_nvm *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.nvm;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_nvm_write_activate);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;cmd_flags = (u8)(cmd_flags &amp; 0xFF);</div><div class='hunk'>@@ -1252,7 +1252,7 @@ int ice_nvm_write_activate(struct ice_hw *hw, u16 cmd_flags, u8 *response_flags)</div><div class='ctx'>  */</div><div class='ctx'> int ice_aq_nvm_update_empr(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_nvm_update_empr);</div><div class='ctx'> </div><div class='hunk'>@@ -1278,15 +1278,15 @@ ice_nvm_set_pkg_data(struct ice_hw *hw, bool del_pkg_data_flag, u8 *data,</div><div class='ctx'> 		     u16 length, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_nvm_pkg_data *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	if (length != 0 &amp;&amp; !data)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.pkg_data;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_nvm_pkg_data);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	if (del_pkg_data_flag)</div><div class='ctx'> 		cmd-&gt;cmd_flags |= ICE_AQC_NVM_PKG_DELETE;</div><div class='hunk'>@@ -1316,17 +1316,17 @@ ice_nvm_pass_component_tbl(struct ice_hw *hw, u8 *data, u16 length,</div><div class='ctx'> 			   u8 *comp_response_code, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_nvm_pass_comp_tbl *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (!data || !comp_response || !comp_response_code)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.pass_comp_tbl;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 				      ice_aqc_opc_nvm_pass_component_tbl);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;transfer_flag = transfer_flag;</div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, data, length, cd);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_parser.h b/drivers/net/ethernet/intel/ice/ice_parser.h<br/>index 6509d807627c..4f56d53d56b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_parser.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_parser.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_parser.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_parser.h</a></div><div class='hunk'>@@ -257,7 +257,6 @@ ice_pg_nm_cam_match(struct ice_pg_nm_cam_item *table, int size,</div><div class='ctx'> /*** ICE_SID_RXPARSER_BOOST_TCAM and ICE_SID_LBL_RXPARSER_TMEM sections ***/</div><div class='ctx'> #define ICE_BST_TCAM_TABLE_SIZE		256</div><div class='ctx'> #define ICE_BST_TCAM_KEY_SIZE		20</div><div class='del'>-#define ICE_BST_KEY_TCAM_SIZE		19</div><div class='ctx'> </div><div class='ctx'> /* Boost TCAM item */</div><div class='ctx'> struct ice_bst_tcam_item {</div><div class='hunk'>@@ -401,7 +400,6 @@ u16 ice_xlt_kb_flag_get(struct ice_xlt_kb *kb, u64 pkt_flag);</div><div class='ctx'> #define ICE_PARSER_GPR_NUM	128</div><div class='ctx'> #define ICE_PARSER_FLG_NUM	64</div><div class='ctx'> #define ICE_PARSER_ERR_NUM	16</div><div class='del'>-#define ICE_BST_KEY_SIZE	10</div><div class='ctx'> #define ICE_MARKER_ID_SIZE	9</div><div class='ctx'> #define ICE_MARKER_MAX_SIZE	\</div><div class='ctx'> 		(ICE_MARKER_ID_SIZE * BITS_PER_BYTE - 1)</div><div class='hunk'>@@ -431,13 +429,13 @@ struct ice_parser_rt {</div><div class='ctx'> 	u8 pkt_buf[ICE_PARSER_MAX_PKT_LEN + ICE_PARSER_PKT_REV];</div><div class='ctx'> 	u16 pkt_len;</div><div class='ctx'> 	u16 po;</div><div class='del'>-	u8 bst_key[ICE_BST_KEY_SIZE];</div><div class='add'>+	u8 bst_key[ICE_BST_TCAM_KEY_SIZE];</div><div class='ctx'> 	struct ice_pg_cam_key pg_key;</div><div class='add'>+	u8 pg_prio;</div><div class='ctx'> 	struct ice_alu *alu0;</div><div class='ctx'> 	struct ice_alu *alu1;</div><div class='ctx'> 	struct ice_alu *alu2;</div><div class='ctx'> 	struct ice_pg_cam_action *action;</div><div class='del'>-	u8 pg_prio;</div><div class='ctx'> 	struct ice_gpr_pu pu;</div><div class='ctx'> 	u8 markers[ICE_MARKER_ID_SIZE];</div><div class='ctx'> 	bool protocols[ICE_PO_PAIR_SIZE];</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_parser_rt.c b/drivers/net/ethernet/intel/ice/ice_parser_rt.c<br/>index dedf5e854e4b..3995d662e050 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_parser_rt.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_parser_rt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_parser_rt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_parser_rt.c</a></div><div class='hunk'>@@ -125,22 +125,20 @@ static void ice_bst_key_init(struct ice_parser_rt *rt,</div><div class='ctx'> 	else</div><div class='ctx'> 		key[idd] = imem-&gt;b_kb.prio;</div><div class='ctx'> </div><div class='del'>-	idd = ICE_BST_KEY_TCAM_SIZE - 1;</div><div class='add'>+	idd = ICE_BST_TCAM_KEY_SIZE - 2;</div><div class='ctx'> 	for (i = idd; i &gt;= 0; i--) {</div><div class='ctx'> 		int j;</div><div class='ctx'> </div><div class='ctx'> 		j = ho + idd - i;</div><div class='ctx'> 		if (j &lt; ICE_PARSER_MAX_PKT_LEN)</div><div class='del'>-			key[i] = rt-&gt;pkt_buf[ho + idd - i];</div><div class='add'>+			key[i] = rt-&gt;pkt_buf[j];</div><div class='ctx'> 		else</div><div class='ctx'> 			key[i] = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ice_debug(rt-&gt;psr-&gt;hw, ICE_DBG_PARSER, "Generated Boost TCAM Key:\n");</div><div class='del'>-	ice_debug(rt-&gt;psr-&gt;hw, ICE_DBG_PARSER, "%02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\n",</div><div class='del'>-		  key[0], key[1], key[2], key[3], key[4],</div><div class='del'>-		  key[5], key[6], key[7], key[8], key[9]);</div><div class='del'>-	ice_debug(rt-&gt;psr-&gt;hw, ICE_DBG_PARSER, "\n");</div><div class='add'>+	ice_debug_array_w_prefix(rt-&gt;psr-&gt;hw, ICE_DBG_PARSER,</div><div class='add'>+				 KBUILD_MODNAME ": Generated Boost TCAM Key",</div><div class='add'>+				 key, ICE_BST_TCAM_KEY_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u16 ice_bit_rev_u16(u16 v, int len)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_protocol_type.h b/drivers/net/ethernet/intel/ice/ice_protocol_type.h<br/>index 7c09ea0f03ba..725167d557a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_protocol_type.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_protocol_type.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_protocol_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_protocol_type.h</a></div><div class='hunk'>@@ -82,26 +82,46 @@ enum ice_sw_tunnel_type {</div><div class='ctx'> enum ice_prot_id {</div><div class='ctx'> 	ICE_PROT_ID_INVAL	= 0,</div><div class='ctx'> 	ICE_PROT_MAC_OF_OR_S	= 1,</div><div class='add'>+	ICE_PROT_MAC_O2		= 2,</div><div class='ctx'> 	ICE_PROT_MAC_IL		= 4,</div><div class='add'>+	ICE_PROT_MAC_IN_MAC	= 7,</div><div class='ctx'> 	ICE_PROT_ETYPE_OL	= 9,</div><div class='ctx'> 	ICE_PROT_ETYPE_IL	= 10,</div><div class='add'>+	ICE_PROT_PAY		= 15,</div><div class='add'>+	ICE_PROT_EVLAN_O	= 16,</div><div class='add'>+	ICE_PROT_VLAN_O		= 17,</div><div class='add'>+	ICE_PROT_VLAN_IF	= 18,</div><div class='add'>+	ICE_PROT_MPLS_OL_MINUS_1 = 27,</div><div class='add'>+	ICE_PROT_MPLS_OL_OR_OS	= 28,</div><div class='add'>+	ICE_PROT_MPLS_IL	= 29,</div><div class='ctx'> 	ICE_PROT_IPV4_OF_OR_S	= 32,</div><div class='ctx'> 	ICE_PROT_IPV4_IL	= 33,</div><div class='add'>+	ICE_PROT_IPV4_IL_IL	= 34,</div><div class='ctx'> 	ICE_PROT_IPV6_OF_OR_S	= 40,</div><div class='ctx'> 	ICE_PROT_IPV6_IL	= 41,</div><div class='add'>+	ICE_PROT_IPV6_IL_IL	= 42,</div><div class='add'>+	ICE_PROT_IPV6_NEXT_PROTO = 43,</div><div class='add'>+	ICE_PROT_IPV6_FRAG	= 47,</div><div class='ctx'> 	ICE_PROT_TCP_IL		= 49,</div><div class='ctx'> 	ICE_PROT_UDP_OF		= 52,</div><div class='ctx'> 	ICE_PROT_UDP_IL_OR_S	= 53,</div><div class='ctx'> 	ICE_PROT_GRE_OF		= 64,</div><div class='add'>+	ICE_PROT_NSH_F		= 84,</div><div class='ctx'> 	ICE_PROT_ESP_F		= 88,</div><div class='ctx'> 	ICE_PROT_ESP_2		= 89,</div><div class='ctx'> 	ICE_PROT_SCTP_IL	= 96,</div><div class='ctx'> 	ICE_PROT_ICMP_IL	= 98,</div><div class='ctx'> 	ICE_PROT_ICMPV6_IL	= 100,</div><div class='add'>+	ICE_PROT_VRRP_F		= 101,</div><div class='add'>+	ICE_PROT_OSPF		= 102,</div><div class='ctx'> 	ICE_PROT_PPPOE		= 103,</div><div class='ctx'> 	ICE_PROT_L2TPV3		= 104,</div><div class='add'>+	ICE_PROT_ATAOE_OF	= 114,</div><div class='add'>+	ICE_PROT_CTRL_OF	= 116,</div><div class='add'>+	ICE_PROT_LLDP_OF	= 117,</div><div class='ctx'> 	ICE_PROT_ARP_OF		= 118,</div><div class='ctx'> 	ICE_PROT_META_ID	= 255, /* when offset == metadata */</div><div class='add'>+	ICE_PROT_EAPOL_OF	= 120,</div><div class='ctx'> 	ICE_PROT_INVALID	= 255  /* when offset == ICE_FV_OFFSET_INVAL */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c<br/>index a999fface272..4c8d20f2d2c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_ptp.c</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> #include "ice.h"</div><div class='ctx'> #include "ice_lib.h"</div><div class='ctx'> #include "ice_trace.h"</div><div class='del'>-#include "ice_cgu_regs.h"</div><div class='ctx'> </div><div class='ctx'> static const char ice_pin_names[][64] = {</div><div class='ctx'> 	"SDP0",</div><div class='hunk'>@@ -16,45 +15,43 @@ static const char ice_pin_names[][64] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ice_ptp_pin_desc ice_pin_desc_e82x[] = {</div><div class='del'>-	/* name,        gpio */</div><div class='del'>-	{  TIME_SYNC, {  4, -1 }},</div><div class='del'>-	{  ONE_PPS,   { -1,  5 }},</div><div class='add'>+	/* name,        gpio,       delay */</div><div class='add'>+	{  TIME_SYNC, {  4, -1 }, { 0,  0 }},</div><div class='add'>+	{  ONE_PPS,   { -1,  5 }, { 0, 11 }},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ice_ptp_pin_desc ice_pin_desc_e825c[] = {</div><div class='del'>-	/* name,        gpio */</div><div class='del'>-	{  SDP0,      {  0,  0 }},</div><div class='del'>-	{  SDP1,      {  1,  1 }},</div><div class='del'>-	{  SDP2,      {  2,  2 }},</div><div class='del'>-	{  SDP3,      {  3,  3 }},</div><div class='del'>-	{  TIME_SYNC, {  4, -1 }},</div><div class='del'>-	{  ONE_PPS,   { -1,  5 }},</div><div class='add'>+	/* name,        gpio,       delay */</div><div class='add'>+	{  SDP0,      {  0,  0 }, { 15, 14 }},</div><div class='add'>+	{  SDP1,      {  1,  1 }, { 15, 14 }},</div><div class='add'>+	{  SDP2,      {  2,  2 }, { 15, 14 }},</div><div class='add'>+	{  SDP3,      {  3,  3 }, { 15, 14 }},</div><div class='add'>+	{  TIME_SYNC, {  4, -1 }, { 11,  0 }},</div><div class='add'>+	{  ONE_PPS,   { -1,  5 }, {  0,  9 }},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ice_ptp_pin_desc ice_pin_desc_e810[] = {</div><div class='del'>-	/* name,      gpio */</div><div class='del'>-	{  SDP0,    {  0, 0 }},</div><div class='del'>-	{  SDP1,    {  1, 1 }},</div><div class='del'>-	{  SDP2,    {  2, 2 }},</div><div class='del'>-	{  SDP3,    {  3, 3 }},</div><div class='del'>-	{  ONE_PPS, { -1, 5 }},</div><div class='add'>+	/* name,        gpio,       delay */</div><div class='add'>+	{  SDP0,      {  0,  0 }, { 0, 1 }},</div><div class='add'>+	{  SDP1,      {  1,  1 }, { 0, 1 }},</div><div class='add'>+	{  SDP2,      {  2,  2 }, { 0, 1 }},</div><div class='add'>+	{  SDP3,      {  3,  3 }, { 0, 1 }},</div><div class='add'>+	{  ONE_PPS,   { -1,  5 }, { 0, 1 }},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char ice_pin_names_nvm[][64] = {</div><div class='del'>-	"GNSS",</div><div class='del'>-	"SMA1",</div><div class='del'>-	"U.FL1",</div><div class='del'>-	"SMA2",</div><div class='del'>-	"U.FL2",</div><div class='add'>+static const char ice_pin_names_dpll[][64] = {</div><div class='add'>+	"SDP20",</div><div class='add'>+	"SDP21",</div><div class='add'>+	"SDP22",</div><div class='add'>+	"SDP23",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct ice_ptp_pin_desc ice_pin_desc_e810_sma[] = {</div><div class='del'>-	/* name,   gpio */</div><div class='del'>-	{  GNSS, {  1, -1 }},</div><div class='del'>-	{  SMA1, {  1,  0 }},</div><div class='del'>-	{  UFL1, { -1,  0 }},</div><div class='del'>-	{  SMA2, {  3,  2 }},</div><div class='del'>-	{  UFL2, {  3, -1 }},</div><div class='add'>+static const struct ice_ptp_pin_desc ice_pin_desc_dpll[] = {</div><div class='add'>+	/* name,   gpio,       delay */</div><div class='add'>+	{  SDP0, { -1,  0 }, { 0, 1 }},</div><div class='add'>+	{  SDP1, {  1, -1 }, { 0, 0 }},</div><div class='add'>+	{  SDP2, { -1,  2 }, { 0, 1 }},</div><div class='add'>+	{  SDP3, {  3, -1 }, { 0, 0 }},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ice_pf *ice_get_ctrl_pf(struct ice_pf *pf)</div><div class='hunk'>@@ -93,101 +90,6 @@ static int ice_ptp_find_pin_idx(struct ice_pf *pf, enum ptp_pin_function func,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_ptp_update_sma_data - update SMA pins data according to pins setup</div><div class='del'>- * @pf: Board private structure</div><div class='del'>- * @sma_pins: parsed SMA pins status</div><div class='del'>- * @data: SMA data to update</div><div class='del'>- */</div><div class='del'>-static void ice_ptp_update_sma_data(struct ice_pf *pf, unsigned int sma_pins[],</div><div class='del'>-				    u8 *data)</div><div class='del'>-{</div><div class='del'>-	const char *state1, *state2;</div><div class='del'>-</div><div class='del'>-	/* Set the right state based on the desired configuration.</div><div class='del'>-	 * When bit is set, functionality is disabled.</div><div class='del'>-	 */</div><div class='del'>-	*data &amp;= ~ICE_ALL_SMA_MASK;</div><div class='del'>-	if (!sma_pins[UFL1 - 1]) {</div><div class='del'>-		if (sma_pins[SMA1 - 1] == PTP_PF_EXTTS) {</div><div class='del'>-			state1 = "SMA1 Rx, U.FL1 disabled";</div><div class='del'>-			*data |= ICE_SMA1_TX_EN;</div><div class='del'>-		} else if (sma_pins[SMA1 - 1] == PTP_PF_PEROUT) {</div><div class='del'>-			state1 = "SMA1 Tx U.FL1 disabled";</div><div class='del'>-			*data |= ICE_SMA1_DIR_EN;</div><div class='del'>-		} else {</div><div class='del'>-			state1 = "SMA1 disabled, U.FL1 disabled";</div><div class='del'>-			*data |= ICE_SMA1_MASK;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		/* U.FL1 Tx will always enable SMA1 Rx */</div><div class='del'>-		state1 = "SMA1 Rx, U.FL1 Tx";</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!sma_pins[UFL2 - 1]) {</div><div class='del'>-		if (sma_pins[SMA2 - 1] == PTP_PF_EXTTS) {</div><div class='del'>-			state2 = "SMA2 Rx, U.FL2 disabled";</div><div class='del'>-			*data |= ICE_SMA2_TX_EN | ICE_SMA2_UFL2_RX_DIS;</div><div class='del'>-		} else if (sma_pins[SMA2 - 1] == PTP_PF_PEROUT) {</div><div class='del'>-			state2 = "SMA2 Tx, U.FL2 disabled";</div><div class='del'>-			*data |= ICE_SMA2_DIR_EN | ICE_SMA2_UFL2_RX_DIS;</div><div class='del'>-		} else {</div><div class='del'>-			state2 = "SMA2 disabled, U.FL2 disabled";</div><div class='del'>-			*data |= ICE_SMA2_MASK;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		if (!sma_pins[SMA2 - 1]) {</div><div class='del'>-			state2 = "SMA2 disabled, U.FL2 Rx";</div><div class='del'>-			*data |= ICE_SMA2_DIR_EN | ICE_SMA2_TX_EN;</div><div class='del'>-		} else {</div><div class='del'>-			state2 = "SMA2 Tx, U.FL2 Rx";</div><div class='del'>-			*data |= ICE_SMA2_DIR_EN;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_dbg(ice_pf_to_dev(pf), "%s, %s\n", state1, state2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_ptp_set_sma_cfg - set the configuration of the SMA control logic</div><div class='del'>- * @pf: Board private structure</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, negative error code otherwise</div><div class='del'>- */</div><div class='del'>-static int ice_ptp_set_sma_cfg(struct ice_pf *pf)</div><div class='del'>-{</div><div class='del'>-	const struct ice_ptp_pin_desc *ice_pins = pf-&gt;ptp.ice_pin_desc;</div><div class='del'>-	struct ptp_pin_desc *pins = pf-&gt;ptp.pin_desc;</div><div class='del'>-	unsigned int sma_pins[ICE_SMA_PINS_NUM] = {};</div><div class='del'>-	int err;</div><div class='del'>-	u8 data;</div><div class='del'>-</div><div class='del'>-	/* Read initial pin state value */</div><div class='del'>-	err = ice_read_sma_ctrl(&amp;pf-&gt;hw, &amp;data);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Get SMA/U.FL pins states */</div><div class='del'>-	for (int i = 0; i &lt; pf-&gt;ptp.info.n_pins; i++)</div><div class='del'>-		if (pins[i].func) {</div><div class='del'>-			int name_idx = ice_pins[i].name_idx;</div><div class='del'>-</div><div class='del'>-			switch (name_idx) {</div><div class='del'>-			case SMA1:</div><div class='del'>-			case UFL1:</div><div class='del'>-			case SMA2:</div><div class='del'>-			case UFL2:</div><div class='del'>-				sma_pins[name_idx - 1] = pins[i].func;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	ice_ptp_update_sma_data(pf, sma_pins, &amp;data);</div><div class='del'>-	return ice_write_sma_ctrl(&amp;pf-&gt;hw, data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_ptp_cfg_tx_interrupt - Configure Tx timestamp interrupt for the device</div><div class='ctx'>  * @pf: Board private structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -298,18 +200,30 @@ void ice_ptp_restore_timestamp_mode(struct ice_pf *pf)</div><div class='ctx'>  * @sts: Optional parameter for holding a pair of system timestamps from</div><div class='ctx'>  *       the system clock. Will be ignored if NULL is given.</div><div class='ctx'>  */</div><div class='del'>-static u64</div><div class='del'>-ice_ptp_read_src_clk_reg(struct ice_pf *pf, struct ptp_system_timestamp *sts)</div><div class='add'>+u64 ice_ptp_read_src_clk_reg(struct ice_pf *pf,</div><div class='add'>+			     struct ptp_system_timestamp *sts)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	u32 hi, lo, lo2;</div><div class='ctx'> 	u8 tmr_idx;</div><div class='ctx'> </div><div class='add'>+	if (!ice_is_primary(hw))</div><div class='add'>+		hw = ice_get_primary_hw(pf);</div><div class='add'>+</div><div class='ctx'> 	tmr_idx = ice_get_ptp_src_clock_index(hw);</div><div class='ctx'> 	guard(spinlock)(&amp;pf-&gt;adapter-&gt;ptp_gltsyn_time_lock);</div><div class='ctx'> 	/* Read the system timestamp pre PHC read */</div><div class='ctx'> 	ptp_read_system_prets(sts);</div><div class='ctx'> </div><div class='add'>+	if (hw-&gt;mac_type == ICE_MAC_E830) {</div><div class='add'>+		u64 clk_time = rd64(hw, E830_GLTSYN_TIME_L(tmr_idx));</div><div class='add'>+</div><div class='add'>+		/* Read the system timestamp post PHC read */</div><div class='add'>+		ptp_read_system_postts(sts);</div><div class='add'>+</div><div class='add'>+		return clk_time;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	lo = rd32(hw, GLTSYN_TIME_L(tmr_idx));</div><div class='ctx'> </div><div class='ctx'> 	/* Read the system timestamp post PHC read */</div><div class='hunk'>@@ -464,7 +378,9 @@ ice_ptp_is_tx_tracker_up(struct ice_ptp_tx *tx)</div><div class='ctx'>  */</div><div class='ctx'> void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx)</div><div class='ctx'> {</div><div class='add'>+	struct ice_e810_params *params;</div><div class='ctx'> 	struct ice_ptp_port *ptp_port;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct ice_pf *pf;</div><div class='ctx'> </div><div class='hunk'>@@ -473,6 +389,7 @@ void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx)</div><div class='ctx'> </div><div class='ctx'> 	ptp_port = container_of(tx, struct ice_ptp_port, tx);</div><div class='ctx'> 	pf = ptp_port_to_pf(ptp_port);</div><div class='add'>+	params = &amp;pf-&gt;hw.ptp.phy.e810;</div><div class='ctx'> </div><div class='ctx'> 	/* Drop packets which have waited for more than 2 seconds */</div><div class='ctx'> 	if (time_is_before_jiffies(tx-&gt;tstamps[idx].start + 2 * HZ)) {</div><div class='hunk'>@@ -489,11 +406,17 @@ void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx)</div><div class='ctx'> </div><div class='ctx'> 	ice_trace(tx_tstamp_fw_req, tx-&gt;tstamps[idx].skb, idx);</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;params-&gt;atqbal_wq.lock, flags);</div><div class='add'>+</div><div class='add'>+	params-&gt;atqbal_flags |= ATQBAL_FLAGS_INTR_IN_PROGRESS;</div><div class='add'>+</div><div class='ctx'> 	/* Write TS index to read to the PF register so the FW can read it */</div><div class='del'>-	wr32(&amp;pf-&gt;hw, PF_SB_ATQBAL,</div><div class='del'>-	     TS_LL_READ_TS_INTR | FIELD_PREP(TS_LL_READ_TS_IDX, idx) |</div><div class='del'>-	     TS_LL_READ_TS);</div><div class='add'>+	wr32(&amp;pf-&gt;hw, REG_LL_PROXY_H,</div><div class='add'>+	     REG_LL_PROXY_H_TS_INTR_ENA | FIELD_PREP(REG_LL_PROXY_H_TS_IDX, idx) |</div><div class='add'>+	     REG_LL_PROXY_H_EXEC);</div><div class='ctx'> 	tx-&gt;last_ll_ts_idx_read = idx;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;params-&gt;atqbal_wq.lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -504,35 +427,52 @@ void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx)</div><div class='ctx'> {</div><div class='ctx'> 	struct skb_shared_hwtstamps shhwtstamps = {};</div><div class='ctx'> 	u8 idx = tx-&gt;last_ll_ts_idx_read;</div><div class='add'>+	struct ice_e810_params *params;</div><div class='ctx'> 	struct ice_ptp_port *ptp_port;</div><div class='ctx'> 	u64 raw_tstamp, tstamp;</div><div class='ctx'> 	bool drop_ts = false;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	struct ice_pf *pf;</div><div class='del'>-	u32 val;</div><div class='add'>+	u32 reg_ll_high;</div><div class='ctx'> </div><div class='ctx'> 	if (!tx-&gt;init || tx-&gt;last_ll_ts_idx_read &lt; 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	ptp_port = container_of(tx, struct ice_ptp_port, tx);</div><div class='ctx'> 	pf = ptp_port_to_pf(ptp_port);</div><div class='add'>+	dev = ice_pf_to_dev(pf);</div><div class='add'>+	params = &amp;pf-&gt;hw.ptp.phy.e810;</div><div class='ctx'> </div><div class='ctx'> 	ice_trace(tx_tstamp_fw_done, tx-&gt;tstamps[idx].skb, idx);</div><div class='ctx'> </div><div class='del'>-	val = rd32(&amp;pf-&gt;hw, PF_SB_ATQBAL);</div><div class='add'>+	spin_lock_irqsave(&amp;params-&gt;atqbal_wq.lock, flags);</div><div class='add'>+</div><div class='add'>+	if (!(params-&gt;atqbal_flags &amp; ATQBAL_FLAGS_INTR_IN_PROGRESS))</div><div class='add'>+		dev_dbg(dev, "%s: low latency interrupt request not in progress?\n",</div><div class='add'>+			__func__);</div><div class='add'>+</div><div class='add'>+	/* Read the low 32 bit value */</div><div class='add'>+	raw_tstamp = rd32(&amp;pf-&gt;hw, REG_LL_PROXY_L);</div><div class='add'>+	/* Read the status together with high TS part */</div><div class='add'>+	reg_ll_high = rd32(&amp;pf-&gt;hw, REG_LL_PROXY_H);</div><div class='add'>+</div><div class='add'>+	/* Wake up threads waiting on low latency interface */</div><div class='add'>+	params-&gt;atqbal_flags &amp;= ~ATQBAL_FLAGS_INTR_IN_PROGRESS;</div><div class='add'>+</div><div class='add'>+	wake_up_locked(&amp;params-&gt;atqbal_wq);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;params-&gt;atqbal_wq.lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* When the bit is cleared, the TS is ready in the register */</div><div class='del'>-	if (val &amp; TS_LL_READ_TS) {</div><div class='add'>+	if (reg_ll_high &amp; REG_LL_PROXY_H_EXEC) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(pf), "Failed to get the Tx tstamp - FW not ready");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* High 8 bit value of the TS is on the bits 16:23 */</div><div class='del'>-	raw_tstamp = FIELD_GET(TS_LL_READ_TS_HIGH, val);</div><div class='del'>-	raw_tstamp &lt;&lt;= 32;</div><div class='del'>-</div><div class='del'>-	/* Read the low 32 bit value */</div><div class='del'>-	raw_tstamp |= (u64)rd32(&amp;pf-&gt;hw, PF_SB_ATQBAH);</div><div class='add'>+	raw_tstamp |= ((u64)FIELD_GET(REG_LL_PROXY_H_TS_HIGH, reg_ll_high)) &lt;&lt; 32;</div><div class='ctx'> </div><div class='ctx'> 	/* Devices using this interface always verify the timestamp differs</div><div class='ctx'> 	 * relative to the last cached timestamp value.</div><div class='hunk'>@@ -560,6 +500,9 @@ void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx)</div><div class='ctx'> 	if (tstamp) {</div><div class='ctx'> 		shhwtstamps.hwtstamp = ns_to_ktime(tstamp);</div><div class='ctx'> 		ice_trace(tx_tstamp_complete, skb, idx);</div><div class='add'>+</div><div class='add'>+		/* Count the number of Tx timestamps that succeeded */</div><div class='add'>+		pf-&gt;ptp.tx_hwtstamp_good++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	skb_tstamp_tx(skb, &amp;shhwtstamps);</div><div class='hunk'>@@ -618,6 +561,7 @@ static void ice_ptp_process_tx_tstamp(struct ice_ptp_tx *tx)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_ptp_port *ptp_port;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	u32 tstamp_good = 0;</div><div class='ctx'> 	struct ice_pf *pf;</div><div class='ctx'> 	struct ice_hw *hw;</div><div class='ctx'> 	u64 tstamp_ready;</div><div class='hunk'>@@ -718,11 +662,16 @@ skip_ts_read:</div><div class='ctx'> 		if (tstamp) {</div><div class='ctx'> 			shhwtstamps.hwtstamp = ns_to_ktime(tstamp);</div><div class='ctx'> 			ice_trace(tx_tstamp_complete, skb, idx);</div><div class='add'>+</div><div class='add'>+			/* Count the number of Tx timestamps that succeeded */</div><div class='add'>+			tstamp_good++;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		skb_tstamp_tx(skb, &amp;shhwtstamps);</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	pf-&gt;ptp.tx_hwtstamp_good += tstamp_good;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -946,28 +895,6 @@ ice_ptp_release_tx_tracker(struct ice_pf *pf, struct ice_ptp_tx *tx)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_ptp_init_tx_eth56g - Initialize tracking for Tx timestamps</div><div class='del'>- * @pf: Board private structure</div><div class='del'>- * @tx: the Tx tracking structure to initialize</div><div class='del'>- * @port: the port this structure tracks</div><div class='del'>- *</div><div class='del'>- * Initialize the Tx timestamp tracker for this port. ETH56G PHYs</div><div class='del'>- * have independent memory blocks for all ports.</div><div class='del'>- *</div><div class='del'>- * Return: 0 for success, -ENOMEM when failed to allocate Tx tracker</div><div class='del'>- */</div><div class='del'>-static int ice_ptp_init_tx_eth56g(struct ice_pf *pf, struct ice_ptp_tx *tx,</div><div class='del'>-				  u8 port)</div><div class='del'>-{</div><div class='del'>-	tx-&gt;block = port;</div><div class='del'>-	tx-&gt;offset = 0;</div><div class='del'>-	tx-&gt;len = INDEX_PER_PORT_ETH56G;</div><div class='del'>-	tx-&gt;has_ready_bitmap = 1;</div><div class='del'>-</div><div class='del'>-	return ice_ptp_alloc_tx_tracker(tx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_ptp_init_tx_e82x - Initialize tracking for Tx timestamps</div><div class='ctx'>  * @pf: Board private structure</div><div class='ctx'>  * @tx: the Tx tracking structure to initialize</div><div class='hunk'>@@ -977,9 +904,11 @@ static int ice_ptp_init_tx_eth56g(struct ice_pf *pf, struct ice_ptp_tx *tx,</div><div class='ctx'>  * the timestamp block is shared for all ports in the same quad. To avoid</div><div class='ctx'>  * ports using the same timestamp index, logically break the block of</div><div class='ctx'>  * registers into chunks based on the port number.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -ENOMEM when out of memory</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='del'>-ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port)</div><div class='add'>+static int ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx,</div><div class='add'>+				u8 port)</div><div class='ctx'> {</div><div class='ctx'> 	tx-&gt;block = ICE_GET_QUAD_NUM(port);</div><div class='ctx'> 	tx-&gt;offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E82X;</div><div class='hunk'>@@ -990,24 +919,27 @@ ice_ptp_init_tx_e82x(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_ptp_init_tx_e810 - Initialize tracking for Tx timestamps</div><div class='add'>+ * ice_ptp_init_tx - Initialize tracking for Tx timestamps</div><div class='ctx'>  * @pf: Board private structure</div><div class='ctx'>  * @tx: the Tx tracking structure to initialize</div><div class='add'>+ * @port: the port this structure tracks</div><div class='ctx'>  *</div><div class='del'>- * Initialize the Tx timestamp tracker for this PF. For E810 devices, each</div><div class='del'>- * port has its own block of timestamps, independent of the other ports.</div><div class='add'>+ * Initialize the Tx timestamp tracker for this PF. For all PHYs except E82X,</div><div class='add'>+ * each port has its own block of timestamps, independent of the other ports.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -ENOMEM when out of memory</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='del'>-ice_ptp_init_tx_e810(struct ice_pf *pf, struct ice_ptp_tx *tx)</div><div class='add'>+static int ice_ptp_init_tx(struct ice_pf *pf, struct ice_ptp_tx *tx, u8 port)</div><div class='ctx'> {</div><div class='del'>-	tx-&gt;block = pf-&gt;hw.port_info-&gt;lport;</div><div class='add'>+	tx-&gt;block = port;</div><div class='ctx'> 	tx-&gt;offset = 0;</div><div class='del'>-	tx-&gt;len = INDEX_PER_PORT_E810;</div><div class='add'>+	tx-&gt;len = INDEX_PER_PORT;</div><div class='add'>+</div><div class='ctx'> 	/* The E810 PHY does not provide a timestamp ready bitmap. Instead,</div><div class='ctx'> 	 * verify new timestamps against cached copy of the last read</div><div class='ctx'> 	 * timestamp.</div><div class='ctx'> 	 */</div><div class='del'>-	tx-&gt;has_ready_bitmap = 0;</div><div class='add'>+	tx-&gt;has_ready_bitmap = pf-&gt;hw.mac_type != ICE_MAC_E810;</div><div class='ctx'> </div><div class='ctx'> 	return ice_ptp_alloc_tx_tracker(tx);</div><div class='ctx'> }</div><div class='hunk'>@@ -1292,20 +1224,21 @@ ice_ptp_port_phy_stop(struct ice_ptp_port *ptp_port)</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (ice_is_e810(hw))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;ptp_port-&gt;ps_lock);</div><div class='ctx'> </div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		err = ice_stop_phy_timer_eth56g(hw, port, true);</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		err = 0;</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		kthread_cancel_delayed_work_sync(&amp;ptp_port-&gt;ov_work);</div><div class='ctx'> </div><div class='ctx'> 		err = ice_stop_phy_timer_e82x(hw, port, true);</div><div class='ctx'> 		break;</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		err = ice_stop_phy_timer_eth56g(hw, port, true);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1335,19 +1268,17 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (ice_is_e810(hw))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	if (!ptp_port-&gt;link_up)</div><div class='ctx'> 		return ice_ptp_port_phy_stop(ptp_port);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ptp_port-&gt;ps_lock);</div><div class='ctx'> </div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		err = ice_start_phy_timer_eth56g(hw, port);</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		err = 0;</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		/* Start the PHY timer in Vernier mode */</div><div class='ctx'> 		kthread_cancel_delayed_work_sync(&amp;ptp_port-&gt;ov_work);</div><div class='ctx'> </div><div class='hunk'>@@ -1372,6 +1303,9 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port)</div><div class='ctx'> 		kthread_queue_delayed_work(pf-&gt;ptp.kworker, &amp;ptp_port-&gt;ov_work,</div><div class='ctx'> 					   0);</div><div class='ctx'> 		break;</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		err = ice_start_phy_timer_eth56g(hw, port);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1388,10 +1322,9 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port)</div><div class='ctx'> /**</div><div class='ctx'>  * ice_ptp_link_change - Reconfigure PTP after link status change</div><div class='ctx'>  * @pf: Board private structure</div><div class='del'>- * @port: Port for which the PHY start is set</div><div class='ctx'>  * @linkup: Link is up or down</div><div class='ctx'>  */</div><div class='del'>-void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)</div><div class='add'>+void ice_ptp_link_change(struct ice_pf *pf, bool linkup)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_ptp_port *ptp_port;</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='hunk'>@@ -1399,14 +1332,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)</div><div class='ctx'> 	if (pf-&gt;ptp.state != ICE_PTP_READY)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON_ONCE(port &gt;= hw-&gt;ptp.num_lports))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	ptp_port = &amp;pf-&gt;ptp.port;</div><div class='del'>-	if (ice_is_e825c(hw) &amp;&amp; hw-&gt;ptp.is_2x50g_muxed_topo)</div><div class='del'>-		port *= 2;</div><div class='del'>-	if (WARN_ON_ONCE(ptp_port-&gt;port_num != port))</div><div class='del'>-		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Update cached link status for this port immediately */</div><div class='ctx'> 	ptp_port-&gt;link_up = linkup;</div><div class='hunk'>@@ -1414,12 +1340,14 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)</div><div class='ctx'> 	/* Skip HW writes if reset is in progress */</div><div class='ctx'> 	if (pf-&gt;hw.reset_ongoing)</div><div class='ctx'> 		return;</div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_E810:</div><div class='del'>-		/* Do not reconfigure E810 PHY */</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		/* Do not reconfigure E810 or E830 PHY */</div><div class='ctx'> 		return;</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='ctx'> 		ice_ptp_port_phy_restart(ptp_port);</div><div class='ctx'> 		return;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1447,46 +1375,45 @@ static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold)</div><div class='ctx'> </div><div class='ctx'> 	ice_ptp_reset_ts_memory(hw);</div><div class='ctx'> </div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G: {</div><div class='del'>-		int port;</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		return 0;</div><div class='add'>+	case ICE_MAC_GENERIC: {</div><div class='add'>+		int quad;</div><div class='ctx'> </div><div class='del'>-		for (port = 0; port &lt; hw-&gt;ptp.num_lports; port++) {</div><div class='add'>+		for (quad = 0; quad &lt; ICE_GET_QUAD_NUM(hw-&gt;ptp.num_lports);</div><div class='add'>+		     quad++) {</div><div class='ctx'> 			int err;</div><div class='ctx'> </div><div class='del'>-			err = ice_phy_cfg_intr_eth56g(hw, port, ena, threshold);</div><div class='add'>+			err = ice_phy_cfg_intr_e82x(hw, quad, ena, threshold);</div><div class='ctx'> 			if (err) {</div><div class='del'>-				dev_err(dev, "Failed to configure PHY interrupt for port %d, err %d\n",</div><div class='del'>-					port, err);</div><div class='add'>+				dev_err(dev, "Failed to configure PHY interrupt for quad %d, err %d\n",</div><div class='add'>+					quad, err);</div><div class='ctx'> 				return err;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	case ICE_PHY_E82X: {</div><div class='del'>-		int quad;</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825: {</div><div class='add'>+		int port;</div><div class='ctx'> </div><div class='del'>-		for (quad = 0; quad &lt; ICE_GET_QUAD_NUM(hw-&gt;ptp.num_lports);</div><div class='del'>-		     quad++) {</div><div class='add'>+		for (port = 0; port &lt; hw-&gt;ptp.num_lports; port++) {</div><div class='ctx'> 			int err;</div><div class='ctx'> </div><div class='del'>-			err = ice_phy_cfg_intr_e82x(hw, quad, ena, threshold);</div><div class='add'>+			err = ice_phy_cfg_intr_eth56g(hw, port, ena, threshold);</div><div class='ctx'> 			if (err) {</div><div class='del'>-				dev_err(dev, "Failed to configure PHY interrupt for quad %d, err %d\n",</div><div class='del'>-					quad, err);</div><div class='add'>+				dev_err(dev, "Failed to configure PHY interrupt for port %d, err %d\n",</div><div class='add'>+					port, err);</div><div class='ctx'> 				return err;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	case ICE_PHY_E810:</div><div class='del'>-		return 0;</div><div class='del'>-	case ICE_PHY_UNSUP:</div><div class='add'>+	case ICE_MAC_UNKNOWN:</div><div class='ctx'> 	default:</div><div class='del'>-		dev_warn(dev, "%s: Unexpected PHY model %d\n", __func__,</div><div class='del'>-			 ice_get_phy_model(hw));</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1566,18 +1493,29 @@ void ice_ptp_extts_event(struct ice_pf *pf)</div><div class='ctx'> 	 * Event is defined in GLTSYN_EVNT_0 register</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (chan = 0; chan &lt; GLTSYN_EVNT_H_IDX_MAX; chan++) {</div><div class='add'>+		int pin_desc_idx;</div><div class='add'>+</div><div class='ctx'> 		/* Check if channel is enabled */</div><div class='del'>-		if (pf-&gt;ptp.ext_ts_irq &amp; (1 &lt;&lt; chan)) {</div><div class='del'>-			lo = rd32(hw, GLTSYN_EVNT_L(chan, tmr_idx));</div><div class='del'>-			hi = rd32(hw, GLTSYN_EVNT_H(chan, tmr_idx));</div><div class='del'>-			event.timestamp = (((u64)hi) &lt;&lt; 32) | lo;</div><div class='del'>-			event.type = PTP_CLOCK_EXTTS;</div><div class='del'>-			event.index = chan;</div><div class='del'>-</div><div class='del'>-			/* Fire event */</div><div class='del'>-			ptp_clock_event(pf-&gt;ptp.clock, &amp;event);</div><div class='del'>-			pf-&gt;ptp.ext_ts_irq &amp;= ~(1 &lt;&lt; chan);</div><div class='add'>+		if (!(pf-&gt;ptp.ext_ts_irq &amp; (1 &lt;&lt; chan)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		lo = rd32(hw, GLTSYN_EVNT_L(chan, tmr_idx));</div><div class='add'>+		hi = rd32(hw, GLTSYN_EVNT_H(chan, tmr_idx));</div><div class='add'>+		event.timestamp = (u64)hi &lt;&lt; 32 | lo;</div><div class='add'>+</div><div class='add'>+		/* Add delay compensation */</div><div class='add'>+		pin_desc_idx = ice_ptp_find_pin_idx(pf, PTP_PF_EXTTS, chan);</div><div class='add'>+		if (pin_desc_idx &gt;= 0) {</div><div class='add'>+			const struct ice_ptp_pin_desc *desc;</div><div class='add'>+</div><div class='add'>+			desc = &amp;pf-&gt;ptp.ice_pin_desc[pin_desc_idx];</div><div class='add'>+			event.timestamp -= desc-&gt;delay[0];</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		event.type = PTP_CLOCK_EXTTS;</div><div class='add'>+		event.index = chan;</div><div class='add'>+		pf-&gt;ptp.ext_ts_irq &amp;= ~(1 &lt;&lt; chan);</div><div class='add'>+		ptp_clock_event(pf-&gt;ptp.clock, &amp;event);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1600,14 +1538,6 @@ static int ice_ptp_cfg_extts(struct ice_pf *pf, struct ptp_extts_request *rq,</div><div class='ctx'> 	int pin_desc_idx;</div><div class='ctx'> 	u8 tmr_idx;</div><div class='ctx'> </div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-</div><div class='del'>-	if (rq-&gt;flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-			  PTP_RISING_EDGE |</div><div class='del'>-			  PTP_FALLING_EDGE |</div><div class='del'>-			  PTP_STRICT_FLAGS))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_owned;</div><div class='ctx'> 	chan = rq-&gt;index;</div><div class='ctx'> </div><div class='hunk'>@@ -1711,11 +1641,11 @@ static int ice_ptp_write_perout(struct ice_hw *hw, unsigned int chan,</div><div class='ctx'> 	/* 0. Reset mode &amp; out_en in AUX_OUT */</div><div class='ctx'> 	wr32(hw, GLTSYN_AUX_OUT(chan, tmr_idx), 0);</div><div class='ctx'> </div><div class='del'>-	if (ice_is_e825c(hw)) {</div><div class='add'>+	if (hw-&gt;mac_type == ICE_MAC_GENERIC_3K_E825) {</div><div class='ctx'> 		int err;</div><div class='ctx'> </div><div class='ctx'> 		/* Enable/disable CGU 1PPS output for E825C */</div><div class='del'>-		err = ice_cgu_cfg_pps_out(hw, !!period);</div><div class='add'>+		err = ice_tspll_cfg_pps_out_e825c(hw, !!period);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1754,6 +1684,7 @@ static int ice_ptp_write_perout(struct ice_hw *hw, unsigned int chan,</div><div class='ctx'> 				  8 + chan + (tmr_idx * 4));</div><div class='ctx'> </div><div class='ctx'> 	wr32(hw, GLGEN_GPIO_CTL(gpio_pin), val);</div><div class='add'>+	ice_flush(hw);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1772,19 +1703,17 @@ static int ice_ptp_write_perout(struct ice_hw *hw, unsigned int chan,</div><div class='ctx'> static int ice_ptp_cfg_perout(struct ice_pf *pf, struct ptp_perout_request *rq,</div><div class='ctx'> 			      int on)</div><div class='ctx'> {</div><div class='add'>+	unsigned int gpio_pin, prop_delay_ns;</div><div class='ctx'> 	u64 clk, period, start, phase;</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	unsigned int gpio_pin;</div><div class='ctx'> 	int pin_desc_idx;</div><div class='ctx'> </div><div class='del'>-	if (rq-&gt;flags &amp; ~PTP_PEROUT_PHASE)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	pin_desc_idx = ice_ptp_find_pin_idx(pf, PTP_PF_PEROUT, rq-&gt;index);</div><div class='ctx'> 	if (pin_desc_idx &lt; 0)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	gpio_pin = pf-&gt;ptp.ice_pin_desc[pin_desc_idx].gpio[1];</div><div class='add'>+	prop_delay_ns = pf-&gt;ptp.ice_pin_desc[pin_desc_idx].delay[1];</div><div class='ctx'> 	period = rq-&gt;period.sec * NSEC_PER_SEC + rq-&gt;period.nsec;</div><div class='ctx'> </div><div class='ctx'> 	/* If we're disabling the output or period is 0, clear out CLKO and TGT</div><div class='hunk'>@@ -1794,7 +1723,7 @@ static int ice_ptp_cfg_perout(struct ice_pf *pf, struct ptp_perout_request *rq,</div><div class='ctx'> 		return ice_ptp_write_perout(hw, rq-&gt;index, gpio_pin, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (strncmp(pf-&gt;ptp.pin_desc[pin_desc_idx].name, "1PPS", 64) == 0 &amp;&amp;</div><div class='del'>-	    period != NSEC_PER_SEC &amp;&amp; hw-&gt;ptp.phy_model == ICE_PHY_E82X) {</div><div class='add'>+	    period != NSEC_PER_SEC &amp;&amp; hw-&gt;mac_type == ICE_MAC_GENERIC) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(pf), "1PPS pin supports only 1 s period\n");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1813,14 +1742,15 @@ static int ice_ptp_cfg_perout(struct ice_pf *pf, struct ptp_perout_request *rq,</div><div class='ctx'> 		div64_u64_rem(start, period, &amp;phase);</div><div class='ctx'> </div><div class='ctx'> 	/* If we have only phase or start time is in the past, start the timer</div><div class='del'>-	 * at the next multiple of period, maintaining phase.</div><div class='add'>+	 * at the next multiple of period, maintaining phase at least 0.5 second</div><div class='add'>+	 * from now, so we have time to write it to HW.</div><div class='ctx'> 	 */</div><div class='del'>-	clk = ice_ptp_read_src_clk_reg(pf, NULL);</div><div class='del'>-	if (rq-&gt;flags &amp; PTP_PEROUT_PHASE || start &lt;= clk - ice_prop_delay(hw))</div><div class='add'>+	clk = ice_ptp_read_src_clk_reg(pf, NULL) + NSEC_PER_MSEC * 500;</div><div class='add'>+	if (rq-&gt;flags &amp; PTP_PEROUT_PHASE || start &lt;= clk - prop_delay_ns)</div><div class='ctx'> 		start = div64_u64(clk + period - 1, period) * period + phase;</div><div class='ctx'> </div><div class='ctx'> 	/* Compensate for propagation delay from the generator to the pin. */</div><div class='del'>-	start -= ice_prop_delay(hw);</div><div class='add'>+	start -= prop_delay_ns;</div><div class='ctx'> </div><div class='ctx'> 	return ice_ptp_write_perout(hw, rq-&gt;index, gpio_pin, start, period);</div><div class='ctx'> }</div><div class='hunk'>@@ -1860,63 +1790,6 @@ static void ice_ptp_enable_all_perout(struct ice_pf *pf)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_ptp_disable_shared_pin - Disable enabled pin that shares GPIO</div><div class='del'>- * @pf: Board private structure</div><div class='del'>- * @pin: Pin index</div><div class='del'>- * @func: Assigned function</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, negative error code otherwise</div><div class='del'>- */</div><div class='del'>-static int ice_ptp_disable_shared_pin(struct ice_pf *pf, unsigned int pin,</div><div class='del'>-				      enum ptp_pin_function func)</div><div class='del'>-{</div><div class='del'>-	unsigned int gpio_pin;</div><div class='del'>-</div><div class='del'>-	switch (func) {</div><div class='del'>-	case PTP_PF_PEROUT:</div><div class='del'>-		gpio_pin = pf-&gt;ptp.ice_pin_desc[pin].gpio[1];</div><div class='del'>-		break;</div><div class='del'>-	case PTP_PF_EXTTS:</div><div class='del'>-		gpio_pin = pf-&gt;ptp.ice_pin_desc[pin].gpio[0];</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (unsigned int i = 0; i &lt; pf-&gt;ptp.info.n_pins; i++) {</div><div class='del'>-		struct ptp_pin_desc *pin_desc = &amp;pf-&gt;ptp.pin_desc[i];</div><div class='del'>-		unsigned int chan = pin_desc-&gt;chan;</div><div class='del'>-</div><div class='del'>-		/* Skip pin idx from the request */</div><div class='del'>-		if (i == pin)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (pin_desc-&gt;func == PTP_PF_PEROUT &amp;&amp;</div><div class='del'>-		    pf-&gt;ptp.ice_pin_desc[i].gpio[1] == gpio_pin) {</div><div class='del'>-			pf-&gt;ptp.perout_rqs[chan].period.sec = 0;</div><div class='del'>-			pf-&gt;ptp.perout_rqs[chan].period.nsec = 0;</div><div class='del'>-			pin_desc-&gt;func = PTP_PF_NONE;</div><div class='del'>-			pin_desc-&gt;chan = 0;</div><div class='del'>-			dev_dbg(ice_pf_to_dev(pf), "Disabling pin %u with shared output GPIO pin %u\n",</div><div class='del'>-				i, gpio_pin);</div><div class='del'>-			return ice_ptp_cfg_perout(pf, &amp;pf-&gt;ptp.perout_rqs[chan],</div><div class='del'>-						  false);</div><div class='del'>-		} else if (pf-&gt;ptp.pin_desc-&gt;func == PTP_PF_EXTTS &amp;&amp;</div><div class='del'>-			   pf-&gt;ptp.ice_pin_desc[i].gpio[0] == gpio_pin) {</div><div class='del'>-			pf-&gt;ptp.extts_rqs[chan].flags &amp;= ~PTP_ENABLE_FEATURE;</div><div class='del'>-			pin_desc-&gt;func = PTP_PF_NONE;</div><div class='del'>-			pin_desc-&gt;chan = 0;</div><div class='del'>-			dev_dbg(ice_pf_to_dev(pf), "Disabling pin %u with shared input GPIO pin %u\n",</div><div class='del'>-				i, gpio_pin);</div><div class='del'>-			return ice_ptp_cfg_extts(pf, &amp;pf-&gt;ptp.extts_rqs[chan],</div><div class='del'>-						 false);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_verify_pin - verify if pin supports requested pin function</div><div class='ctx'>  * @info: the driver's PTP info structure</div><div class='ctx'>  * @pin: Pin index</div><div class='hunk'>@@ -1950,14 +1823,6 @@ static int ice_verify_pin(struct ptp_clock_info *info, unsigned int pin,</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* On adapters with SMA_CTRL disable other pins that share same GPIO */</div><div class='del'>-	if (ice_is_feature_supported(pf, ICE_F_SMA_CTRL)) {</div><div class='del'>-		ice_ptp_disable_shared_pin(pf, pin, func);</div><div class='del'>-		pf-&gt;ptp.pin_desc[pin].func = func;</div><div class='del'>-		pf-&gt;ptp.pin_desc[pin].chan = chan;</div><div class='del'>-		return ice_ptp_set_sma_cfg(pf);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2048,7 +1913,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts)</div><div class='ctx'> 	/* For Vernier mode on E82X, we need to recalibrate after new settime.</div><div class='ctx'> 	 * Start with marking timestamps as invalid.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ice_get_phy_model(hw) == ICE_PHY_E82X) {</div><div class='add'>+	if (hw-&gt;mac_type == ICE_MAC_GENERIC) {</div><div class='ctx'> 		err = ice_ptp_clear_phy_offset_ready_e82x(hw);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			dev_warn(ice_pf_to_dev(pf), "Failed to mark timestamps as invalid before settime\n");</div><div class='hunk'>@@ -2072,7 +1937,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts)</div><div class='ctx'> 	ice_ptp_enable_all_perout(pf);</div><div class='ctx'> </div><div class='ctx'> 	/* Recalibrate and re-enable timestamp blocks for E822/E823 */</div><div class='del'>-	if (ice_get_phy_model(hw) == ICE_PHY_E82X)</div><div class='add'>+	if (hw-&gt;mac_type == ICE_MAC_GENERIC)</div><div class='ctx'> 		ice_ptp_restart_all_phy(pf);</div><div class='ctx'> exit:</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -2150,93 +2015,158 @@ static int ice_ptp_adjtime(struct ptp_clock_info *info, s64 delta)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * struct ice_crosststamp_cfg - Device cross timestamp configuration</div><div class='add'>+ * @lock_reg: The hardware semaphore lock to use</div><div class='add'>+ * @lock_busy: Bit in the semaphore lock indicating the lock is busy</div><div class='add'>+ * @ctl_reg: The hardware register to request cross timestamp</div><div class='add'>+ * @ctl_active: Bit in the control register to request cross timestamp</div><div class='add'>+ * @art_time_l: Lower 32-bits of ART system time</div><div class='add'>+ * @art_time_h: Upper 32-bits of ART system time</div><div class='add'>+ * @dev_time_l: Lower 32-bits of device time (per timer index)</div><div class='add'>+ * @dev_time_h: Upper 32-bits of device time (per timer index)</div><div class='add'>+ */</div><div class='add'>+struct ice_crosststamp_cfg {</div><div class='add'>+	/* HW semaphore lock register */</div><div class='add'>+	u32 lock_reg;</div><div class='add'>+	u32 lock_busy;</div><div class='add'>+</div><div class='add'>+	/* Capture control register */</div><div class='add'>+	u32 ctl_reg;</div><div class='add'>+	u32 ctl_active;</div><div class='add'>+</div><div class='add'>+	/* Time storage */</div><div class='add'>+	u32 art_time_l;</div><div class='add'>+	u32 art_time_h;</div><div class='add'>+	u32 dev_time_l[2];</div><div class='add'>+	u32 dev_time_h[2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ice_crosststamp_cfg ice_crosststamp_cfg_e82x = {</div><div class='add'>+	.lock_reg = PFHH_SEM,</div><div class='add'>+	.lock_busy = PFHH_SEM_BUSY_M,</div><div class='add'>+	.ctl_reg = GLHH_ART_CTL,</div><div class='add'>+	.ctl_active = GLHH_ART_CTL_ACTIVE_M,</div><div class='add'>+	.art_time_l = GLHH_ART_TIME_L,</div><div class='add'>+	.art_time_h = GLHH_ART_TIME_H,</div><div class='add'>+	.dev_time_l[0] = GLTSYN_HHTIME_L(0),</div><div class='add'>+	.dev_time_h[0] = GLTSYN_HHTIME_H(0),</div><div class='add'>+	.dev_time_l[1] = GLTSYN_HHTIME_L(1),</div><div class='add'>+	.dev_time_h[1] = GLTSYN_HHTIME_H(1),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_ICE_HWTS</div><div class='add'>+static const struct ice_crosststamp_cfg ice_crosststamp_cfg_e830 = {</div><div class='add'>+	.lock_reg = E830_PFPTM_SEM,</div><div class='add'>+	.lock_busy = E830_PFPTM_SEM_BUSY_M,</div><div class='add'>+	.ctl_reg = E830_GLPTM_ART_CTL,</div><div class='add'>+	.ctl_active = E830_GLPTM_ART_CTL_ACTIVE_M,</div><div class='add'>+	.art_time_l = E830_GLPTM_ART_TIME_L,</div><div class='add'>+	.art_time_h = E830_GLPTM_ART_TIME_H,</div><div class='add'>+	.dev_time_l[0] = E830_GLTSYN_PTMTIME_L(0),</div><div class='add'>+	.dev_time_h[0] = E830_GLTSYN_PTMTIME_H(0),</div><div class='add'>+	.dev_time_l[1] = E830_GLTSYN_PTMTIME_L(1),</div><div class='add'>+	.dev_time_h[1] = E830_GLTSYN_PTMTIME_H(1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_ICE_HWTS */</div><div class='add'>+/**</div><div class='add'>+ * struct ice_crosststamp_ctx - Device cross timestamp context</div><div class='add'>+ * @snapshot: snapshot of system clocks for historic interpolation</div><div class='add'>+ * @pf: pointer to the PF private structure</div><div class='add'>+ * @cfg: pointer to hardware configuration for cross timestamp</div><div class='add'>+ */</div><div class='add'>+struct ice_crosststamp_ctx {</div><div class='add'>+	struct system_time_snapshot snapshot;</div><div class='add'>+	struct ice_pf *pf;</div><div class='add'>+	const struct ice_crosststamp_cfg *cfg;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='del'>- * ice_ptp_get_syncdevicetime - Get the cross time stamp info</div><div class='add'>+ * ice_capture_crosststamp - Capture a device/system cross timestamp</div><div class='ctx'>  * @device: Current device time</div><div class='ctx'>  * @system: System counter value read synchronously with device time</div><div class='del'>- * @ctx: Context provided by timekeeping code</div><div class='add'>+ * @__ctx: Context passed from ice_ptp_getcrosststamp</div><div class='ctx'>  *</div><div class='ctx'>  * Read device and system (ART) clock simultaneously and return the corrected</div><div class='ctx'>  * clock values in ns.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, or a negative error code on failure.</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='del'>-ice_ptp_get_syncdevicetime(ktime_t *device,</div><div class='del'>-			   struct system_counterval_t *system,</div><div class='del'>-			   void *ctx)</div><div class='add'>+static int ice_capture_crosststamp(ktime_t *device,</div><div class='add'>+				   struct system_counterval_t *system,</div><div class='add'>+				   void *__ctx)</div><div class='ctx'> {</div><div class='del'>-	struct ice_pf *pf = (struct ice_pf *)ctx;</div><div class='del'>-	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='del'>-	u32 hh_lock, hh_art_ctl;</div><div class='del'>-	int i;</div><div class='add'>+	struct ice_crosststamp_ctx *ctx = __ctx;</div><div class='add'>+	const struct ice_crosststamp_cfg *cfg;</div><div class='add'>+	u32 lock, ctl, ts_lo, ts_hi, tmr_idx;</div><div class='add'>+	struct ice_pf *pf;</div><div class='add'>+	struct ice_hw *hw;</div><div class='add'>+	int err;</div><div class='add'>+	u64 ts;</div><div class='ctx'> </div><div class='del'>-#define MAX_HH_HW_LOCK_TRIES	5</div><div class='del'>-#define MAX_HH_CTL_LOCK_TRIES	100</div><div class='add'>+	cfg = ctx-&gt;cfg;</div><div class='add'>+	pf = ctx-&gt;pf;</div><div class='add'>+	hw = &amp;pf-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MAX_HH_HW_LOCK_TRIES; i++) {</div><div class='del'>-		/* Get the HW lock */</div><div class='del'>-		hh_lock = rd32(hw, PFHH_SEM + (PFTSYN_SEM_BYTES * hw-&gt;pf_id));</div><div class='del'>-		if (hh_lock &amp; PFHH_SEM_BUSY_M) {</div><div class='del'>-			usleep_range(10000, 15000);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	if (hh_lock &amp; PFHH_SEM_BUSY_M) {</div><div class='del'>-		dev_err(ice_pf_to_dev(pf), "PTP failed to get hh lock\n");</div><div class='add'>+	tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_assoc;</div><div class='add'>+	if (tmr_idx &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Poll until we obtain the cross-timestamp hardware semaphore */</div><div class='add'>+	err = rd32_poll_timeout(hw, cfg-&gt;lock_reg, lock,</div><div class='add'>+				!(lock &amp; cfg-&gt;lock_busy),</div><div class='add'>+				10 * USEC_PER_MSEC, 50 * USEC_PER_MSEC);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(ice_pf_to_dev(pf), "PTP failed to get cross timestamp lock\n");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Snapshot system time for historic interpolation */</div><div class='add'>+	ktime_get_snapshot(&amp;ctx-&gt;snapshot);</div><div class='add'>+</div><div class='ctx'> 	/* Program cmd to master timer */</div><div class='ctx'> 	ice_ptp_src_cmd(hw, ICE_PTP_READ_TIME);</div><div class='ctx'> </div><div class='ctx'> 	/* Start the ART and device clock sync sequence */</div><div class='del'>-	hh_art_ctl = rd32(hw, GLHH_ART_CTL);</div><div class='del'>-	hh_art_ctl = hh_art_ctl | GLHH_ART_CTL_ACTIVE_M;</div><div class='del'>-	wr32(hw, GLHH_ART_CTL, hh_art_ctl);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MAX_HH_CTL_LOCK_TRIES; i++) {</div><div class='del'>-		/* Wait for sync to complete */</div><div class='del'>-		hh_art_ctl = rd32(hw, GLHH_ART_CTL);</div><div class='del'>-		if (hh_art_ctl &amp; GLHH_ART_CTL_ACTIVE_M) {</div><div class='del'>-			udelay(1);</div><div class='del'>-			continue;</div><div class='del'>-		} else {</div><div class='del'>-			u32 hh_ts_lo, hh_ts_hi, tmr_idx;</div><div class='del'>-			u64 hh_ts;</div><div class='del'>-</div><div class='del'>-			tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_assoc;</div><div class='del'>-			/* Read ART time */</div><div class='del'>-			hh_ts_lo = rd32(hw, GLHH_ART_TIME_L);</div><div class='del'>-			hh_ts_hi = rd32(hw, GLHH_ART_TIME_H);</div><div class='del'>-			hh_ts = ((u64)hh_ts_hi &lt;&lt; 32) | hh_ts_lo;</div><div class='del'>-			system-&gt;cycles = hh_ts;</div><div class='del'>-			system-&gt;cs_id = CSID_X86_ART;</div><div class='del'>-			/* Read Device source clock time */</div><div class='del'>-			hh_ts_lo = rd32(hw, GLTSYN_HHTIME_L(tmr_idx));</div><div class='del'>-			hh_ts_hi = rd32(hw, GLTSYN_HHTIME_H(tmr_idx));</div><div class='del'>-			hh_ts = ((u64)hh_ts_hi &lt;&lt; 32) | hh_ts_lo;</div><div class='del'>-			*device = ns_to_ktime(hh_ts);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	ctl = rd32(hw, cfg-&gt;ctl_reg);</div><div class='add'>+	ctl |= cfg-&gt;ctl_active;</div><div class='add'>+	wr32(hw, cfg-&gt;ctl_reg, ctl);</div><div class='ctx'> </div><div class='add'>+	/* Poll until hardware completes the capture */</div><div class='add'>+	err = rd32_poll_timeout(hw, cfg-&gt;ctl_reg, ctl, !(ctl &amp; cfg-&gt;ctl_active),</div><div class='add'>+				5, 20 * USEC_PER_MSEC);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_timeout;</div><div class='add'>+</div><div class='add'>+	/* Read ART system time */</div><div class='add'>+	ts_lo = rd32(hw, cfg-&gt;art_time_l);</div><div class='add'>+	ts_hi = rd32(hw, cfg-&gt;art_time_h);</div><div class='add'>+	ts = ((u64)ts_hi &lt;&lt; 32) | ts_lo;</div><div class='add'>+	system-&gt;cycles = ts;</div><div class='add'>+	system-&gt;cs_id = CSID_X86_ART;</div><div class='add'>+	system-&gt;use_nsecs = true;</div><div class='add'>+</div><div class='add'>+	/* Read Device source clock time */</div><div class='add'>+	ts_lo = rd32(hw, cfg-&gt;dev_time_l[tmr_idx]);</div><div class='add'>+	ts_hi = rd32(hw, cfg-&gt;dev_time_h[tmr_idx]);</div><div class='add'>+	ts = ((u64)ts_hi &lt;&lt; 32) | ts_lo;</div><div class='add'>+	*device = ns_to_ktime(ts);</div><div class='add'>+</div><div class='add'>+err_timeout:</div><div class='ctx'> 	/* Clear the master timer */</div><div class='ctx'> 	ice_ptp_src_cmd(hw, ICE_PTP_NOP);</div><div class='ctx'> </div><div class='ctx'> 	/* Release HW lock */</div><div class='del'>-	hh_lock = rd32(hw, PFHH_SEM + (PFTSYN_SEM_BYTES * hw-&gt;pf_id));</div><div class='del'>-	hh_lock = hh_lock &amp; ~PFHH_SEM_BUSY_M;</div><div class='del'>-	wr32(hw, PFHH_SEM + (PFTSYN_SEM_BYTES * hw-&gt;pf_id), hh_lock);</div><div class='del'>-</div><div class='del'>-	if (i == MAX_HH_CTL_LOCK_TRIES)</div><div class='del'>-		return -ETIMEDOUT;</div><div class='add'>+	lock = rd32(hw, cfg-&gt;lock_reg);</div><div class='add'>+	lock &amp;= ~cfg-&gt;lock_busy;</div><div class='add'>+	wr32(hw, cfg-&gt;lock_reg, lock);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_ptp_getcrosststamp_e82x - Capture a device cross timestamp</div><div class='add'>+ * ice_ptp_getcrosststamp - Capture a device cross timestamp</div><div class='ctx'>  * @info: the driver's PTP info structure</div><div class='ctx'>  * @cts: The memory to fill the cross timestamp info</div><div class='ctx'>  *</div><div class='hunk'>@@ -2244,41 +2174,55 @@ ice_ptp_get_syncdevicetime(ktime_t *device,</div><div class='ctx'>  * clock. Fill the cross timestamp information and report it back to the</div><div class='ctx'>  * caller.</div><div class='ctx'>  *</div><div class='del'>- * This is only valid for E822 and E823 devices which have support for</div><div class='del'>- * generating the cross timestamp via PCIe PTM.</div><div class='del'>- *</div><div class='ctx'>  * In order to correctly correlate the ART timestamp back to the TSC time, the</div><div class='ctx'>  * CPU must have X86_FEATURE_TSC_KNOWN_FREQ.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, or a negative error code on failure.</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='del'>-ice_ptp_getcrosststamp_e82x(struct ptp_clock_info *info,</div><div class='del'>-			    struct system_device_crosststamp *cts)</div><div class='add'>+static int ice_ptp_getcrosststamp(struct ptp_clock_info *info,</div><div class='add'>+				  struct system_device_crosststamp *cts)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = ptp_info_to_pf(info);</div><div class='add'>+	struct ice_crosststamp_ctx ctx = {</div><div class='add'>+		.pf = pf,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	switch (pf-&gt;hw.mac_type) {</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		ctx.cfg = &amp;ice_crosststamp_cfg_e82x;</div><div class='add'>+		break;</div><div class='add'>+#ifdef CONFIG_ICE_HWTS</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		ctx.cfg = &amp;ice_crosststamp_cfg_e830;</div><div class='add'>+		break;</div><div class='add'>+#endif /* CONFIG_ICE_HWTS */</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return get_device_system_crosststamp(ice_ptp_get_syncdevicetime,</div><div class='del'>-					     pf, NULL, cts);</div><div class='add'>+	return get_device_system_crosststamp(ice_capture_crosststamp, &amp;ctx,</div><div class='add'>+					     &amp;ctx.snapshot, cts);</div><div class='ctx'> }</div><div class='del'>-#endif /* CONFIG_ICE_HWTS */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_ptp_get_ts_config - ioctl interface to read the timestamping config</div><div class='del'>- * @pf: Board private structure</div><div class='del'>- * @ifr: ioctl data</div><div class='add'>+ * ice_ptp_hwtstamp_get - interface to read the timestamping config</div><div class='add'>+ * @netdev: Pointer to network interface device structure</div><div class='add'>+ * @config: Timestamping configuration structure</div><div class='ctx'>  *</div><div class='ctx'>  * Copy the timestamping config to user buffer</div><div class='ctx'>  */</div><div class='del'>-int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr)</div><div class='add'>+int ice_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config *config;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (pf-&gt;ptp.state != ICE_PTP_READY)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	config = &amp;pf-&gt;ptp.tstamp_config;</div><div class='add'>+	*config = pf-&gt;ptp.tstamp_config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, config, sizeof(*config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2286,8 +2230,8 @@ int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr)</div><div class='ctx'>  * @pf: Board private structure</div><div class='ctx'>  * @config: hwtstamp settings requested or saved</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='del'>-ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config)</div><div class='add'>+static int ice_ptp_set_timestamp_mode(struct ice_pf *pf,</div><div class='add'>+				      struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='hunk'>@@ -2331,32 +2275,31 @@ ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_ptp_set_ts_config - ioctl interface to control the timestamping</div><div class='del'>- * @pf: Board private structure</div><div class='del'>- * @ifr: ioctl data</div><div class='add'>+ * ice_ptp_hwtstamp_set - interface to control the timestamping</div><div class='add'>+ * @netdev: Pointer to network interface device structure</div><div class='add'>+ * @config: Timestamping configuration structure</div><div class='add'>+ * @extack: Netlink extended ack structure for error reporting</div><div class='ctx'>  *</div><div class='ctx'>  * Get the user config and store it</div><div class='ctx'>  */</div><div class='del'>-int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr)</div><div class='add'>+int ice_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (pf-&gt;ptp.state != ICE_PTP_READY)</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	err = ice_ptp_set_timestamp_mode(pf, &amp;config);</div><div class='add'>+	err = ice_ptp_set_timestamp_mode(pf, config);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* Return the actual configuration set */</div><div class='del'>-	config = pf-&gt;ptp.tstamp_config;</div><div class='add'>+	*config = pf-&gt;ptp.tstamp_config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2402,14 +2345,14 @@ static void ice_ptp_setup_pin_cfg(struct ice_pf *pf)</div><div class='ctx'> 	for (unsigned int i = 0; i &lt; pf-&gt;ptp.info.n_pins; i++) {</div><div class='ctx'> 		const struct ice_ptp_pin_desc *desc = &amp;pf-&gt;ptp.ice_pin_desc[i];</div><div class='ctx'> 		struct ptp_pin_desc *pin = &amp;pf-&gt;ptp.pin_desc[i];</div><div class='del'>-		const char *name = NULL;</div><div class='add'>+		const char *name;</div><div class='ctx'> </div><div class='ctx'> 		if (!ice_is_feature_supported(pf, ICE_F_SMA_CTRL))</div><div class='ctx'> 			name = ice_pin_names[desc-&gt;name_idx];</div><div class='del'>-		else if (desc-&gt;name_idx != GPIO_NA)</div><div class='del'>-			name = ice_pin_names_nvm[desc-&gt;name_idx];</div><div class='del'>-		if (name)</div><div class='del'>-			strscpy(pin-&gt;name, name, sizeof(pin-&gt;name));</div><div class='add'>+		else</div><div class='add'>+			name = ice_pin_names_dpll[desc-&gt;name_idx];</div><div class='add'>+</div><div class='add'>+		strscpy(pin-&gt;name, name, sizeof(pin-&gt;name));</div><div class='ctx'> </div><div class='ctx'> 		pin-&gt;index = i;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2421,8 +2364,8 @@ static void ice_ptp_setup_pin_cfg(struct ice_pf *pf)</div><div class='ctx'>  * ice_ptp_disable_pins - Disable PTP pins</div><div class='ctx'>  * @pf: pointer to the PF structure</div><div class='ctx'>  *</div><div class='del'>- * Disable the OS access to the SMA pins. Called to clear out the OS</div><div class='del'>- * indications of pin support when we fail to setup the SMA control register.</div><div class='add'>+ * Disable the OS access to the pins. Called to clear out the OS</div><div class='add'>+ * indications of pin support when we fail to setup pin array.</div><div class='ctx'>  */</div><div class='ctx'> static void ice_ptp_disable_pins(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='hunk'>@@ -2463,40 +2406,30 @@ static int ice_ptp_parse_sdp_entries(struct ice_pf *pf, __le16 *entries,</div><div class='ctx'> 	for (i = 0; i &lt; num_entries; i++) {</div><div class='ctx'> 		u16 entry = le16_to_cpu(entries[i]);</div><div class='ctx'> 		DECLARE_BITMAP(bitmap, GPIO_NA);</div><div class='del'>-		unsigned int bitmap_idx;</div><div class='add'>+		unsigned int idx;</div><div class='ctx'> 		bool dir;</div><div class='ctx'> 		u16 gpio;</div><div class='ctx'> </div><div class='ctx'> 		*bitmap = FIELD_GET(ICE_AQC_NVM_SDP_AC_PIN_M, entry);</div><div class='add'>+</div><div class='add'>+		/* Check if entry's pin bitmap is valid. */</div><div class='add'>+		if (bitmap_empty(bitmap, GPIO_NA))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		dir = !!FIELD_GET(ICE_AQC_NVM_SDP_AC_DIR_M, entry);</div><div class='ctx'> 		gpio = FIELD_GET(ICE_AQC_NVM_SDP_AC_SDP_NUM_M, entry);</div><div class='del'>-		for_each_set_bit(bitmap_idx, bitmap, GPIO_NA + 1) {</div><div class='del'>-			unsigned int idx;</div><div class='del'>-</div><div class='del'>-			/* Check if entry's pin bit is valid */</div><div class='del'>-			if (bitmap_idx &gt;= NUM_PTP_PINS_NVM &amp;&amp;</div><div class='del'>-			    bitmap_idx != GPIO_NA)</div><div class='del'>-				continue;</div><div class='ctx'> </div><div class='del'>-			/* Check if pin already exists */</div><div class='del'>-			for (idx = 0; idx &lt; ICE_N_PINS_MAX; idx++)</div><div class='del'>-				if (pins[idx].name_idx == bitmap_idx)</div><div class='del'>-					break;</div><div class='del'>-</div><div class='del'>-			if (idx == ICE_N_PINS_MAX) {</div><div class='del'>-				/* Pin not found, setup its entry and name */</div><div class='del'>-				idx = n_pins++;</div><div class='del'>-				pins[idx].name_idx = bitmap_idx;</div><div class='del'>-				if (bitmap_idx == GPIO_NA)</div><div class='del'>-					strscpy(pf-&gt;ptp.pin_desc[idx].name,</div><div class='del'>-						ice_pin_names[gpio],</div><div class='del'>-						sizeof(pf-&gt;ptp.pin_desc[idx]</div><div class='del'>-							       .name));</div><div class='del'>-			}</div><div class='add'>+		for (idx = 0; idx &lt; ICE_N_PINS_MAX; idx++) {</div><div class='add'>+			if (pins[idx].name_idx == gpio)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			/* Setup in/out GPIO number */</div><div class='del'>-			pins[idx].gpio[dir] = gpio;</div><div class='add'>+		if (idx == ICE_N_PINS_MAX) {</div><div class='add'>+			/* Pin not found, setup its entry and name */</div><div class='add'>+			idx = n_pins++;</div><div class='add'>+			pins[idx].name_idx = gpio;</div><div class='ctx'> 		}</div><div class='add'>+		pins[idx].gpio[dir] = gpio;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; n_pins; i++) {</div><div class='hunk'>@@ -2520,18 +2453,14 @@ static int ice_ptp_parse_sdp_entries(struct ice_pf *pf, __le16 *entries,</div><div class='ctx'>  */</div><div class='ctx'> static void ice_ptp_set_funcs_e82x(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-#ifdef CONFIG_ICE_HWTS</div><div class='del'>-	if (boot_cpu_has(X86_FEATURE_ART) &amp;&amp;</div><div class='del'>-	    boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ))</div><div class='del'>-		pf-&gt;ptp.info.getcrosststamp = ice_ptp_getcrosststamp_e82x;</div><div class='add'>+	pf-&gt;ptp.info.getcrosststamp = ice_ptp_getcrosststamp;</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_ICE_HWTS */</div><div class='del'>-	if (ice_is_e825c(&amp;pf-&gt;hw)) {</div><div class='add'>+	if (pf-&gt;hw.mac_type == ICE_MAC_GENERIC_3K_E825) {</div><div class='ctx'> 		pf-&gt;ptp.ice_pin_desc = ice_pin_desc_e825c;</div><div class='del'>-		pf-&gt;ptp.info.n_pins = ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e825c);</div><div class='add'>+		pf-&gt;ptp.info.n_pins = ARRAY_SIZE(ice_pin_desc_e825c);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pf-&gt;ptp.ice_pin_desc = ice_pin_desc_e82x;</div><div class='del'>-		pf-&gt;ptp.info.n_pins = ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e82x);</div><div class='add'>+		pf-&gt;ptp.info.n_pins = ARRAY_SIZE(ice_pin_desc_e82x);</div><div class='ctx'> 	}</div><div class='ctx'> 	ice_ptp_setup_pin_cfg(pf);</div><div class='ctx'> }</div><div class='hunk'>@@ -2557,15 +2486,13 @@ static void ice_ptp_set_funcs_e810(struct ice_pf *pf)</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		/* SDP section does not exist in NVM or is corrupted */</div><div class='ctx'> 		if (ice_is_feature_supported(pf, ICE_F_SMA_CTRL)) {</div><div class='del'>-			ptp-&gt;ice_pin_desc = ice_pin_desc_e810_sma;</div><div class='del'>-			ptp-&gt;info.n_pins =</div><div class='del'>-				ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e810_sma);</div><div class='add'>+			ptp-&gt;ice_pin_desc = ice_pin_desc_dpll;</div><div class='add'>+			ptp-&gt;info.n_pins = ARRAY_SIZE(ice_pin_desc_dpll);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			pf-&gt;ptp.ice_pin_desc = ice_pin_desc_e810;</div><div class='del'>-			pf-&gt;ptp.info.n_pins =</div><div class='del'>-				ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e810);</div><div class='del'>-			err = 0;</div><div class='add'>+			pf-&gt;ptp.info.n_pins = ARRAY_SIZE(ice_pin_desc_e810);</div><div class='ctx'> 		}</div><div class='add'>+		err = 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		desc = devm_kcalloc(ice_pf_to_dev(pf), ICE_N_PINS_MAX,</div><div class='ctx'> 				    sizeof(struct ice_ptp_pin_desc),</div><div class='hunk'>@@ -2583,8 +2510,6 @@ static void ice_ptp_set_funcs_e810(struct ice_pf *pf)</div><div class='ctx'> 	ptp-&gt;info.pin_config = ptp-&gt;pin_desc;</div><div class='ctx'> 	ice_ptp_setup_pin_cfg(pf);</div><div class='ctx'> </div><div class='del'>-	if (ice_is_feature_supported(pf, ICE_F_SMA_CTRL))</div><div class='del'>-		err = ice_ptp_set_sma_cfg(pf);</div><div class='ctx'> err:</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		devm_kfree(ice_pf_to_dev(pf), desc);</div><div class='hunk'>@@ -2593,6 +2518,28 @@ err:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_ptp_set_funcs_e830 - Set specialized functions for E830 support</div><div class='add'>+ * @pf: Board private structure</div><div class='add'>+ *</div><div class='add'>+ * Assign functions to the PTP capabiltiies structure for E830 devices.</div><div class='add'>+ * Functions which operate across all device families should be set directly</div><div class='add'>+ * in ice_ptp_set_caps. Only add functions here which are distinct for E830</div><div class='add'>+ * devices.</div><div class='add'>+ */</div><div class='add'>+static void ice_ptp_set_funcs_e830(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_ICE_HWTS</div><div class='add'>+	if (pcie_ptm_enabled(pf-&gt;pdev) &amp;&amp; boot_cpu_has(X86_FEATURE_ART))</div><div class='add'>+		pf-&gt;ptp.info.getcrosststamp = ice_ptp_getcrosststamp;</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_ICE_HWTS */</div><div class='add'>+	/* Rest of the config is the same as base E810 */</div><div class='add'>+	pf-&gt;ptp.ice_pin_desc = ice_pin_desc_e810;</div><div class='add'>+	pf-&gt;ptp.info.n_pins = ARRAY_SIZE(ice_pin_desc_e810);</div><div class='add'>+	ice_ptp_setup_pin_cfg(pf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_ptp_set_caps - Set PTP capabilities</div><div class='ctx'>  * @pf: Board private structure</div><div class='ctx'>  */</div><div class='hunk'>@@ -2614,10 +2561,25 @@ static void ice_ptp_set_caps(struct ice_pf *pf)</div><div class='ctx'> 	info-&gt;enable = ice_ptp_gpio_enable;</div><div class='ctx'> 	info-&gt;verify = ice_verify_pin;</div><div class='ctx'> </div><div class='del'>-	if (ice_is_e810(&amp;pf-&gt;hw))</div><div class='add'>+	info-&gt;supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+				      PTP_FALLING_EDGE |</div><div class='add'>+				      PTP_STRICT_FLAGS;</div><div class='add'>+	info-&gt;supported_perout_flags = PTP_PEROUT_PHASE;</div><div class='add'>+</div><div class='add'>+	switch (pf-&gt;hw.mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 		ice_ptp_set_funcs_e810(pf);</div><div class='del'>-	else</div><div class='add'>+		return;</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		ice_ptp_set_funcs_e830(pf);</div><div class='add'>+		return;</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='ctx'> 		ice_ptp_set_funcs_e82x(pf);</div><div class='add'>+		return;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2728,6 +2690,68 @@ enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_ptp_ts_irq - Process the PTP Tx timestamps in IRQ context</div><div class='add'>+ * @pf: Board private structure</div><div class='add'>+ *</div><div class='add'>+ * Return: IRQ_WAKE_THREAD if Tx timestamp read has to be handled in the bottom</div><div class='add'>+ *         half of the interrupt and IRQ_HANDLED otherwise.</div><div class='add'>+ */</div><div class='add'>+irqreturn_t ice_ptp_ts_irq(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='add'>+		/* E810 capable of low latency timestamping with interrupt can</div><div class='add'>+		 * request a single timestamp in the top half and wait for</div><div class='add'>+		 * a second LL TS interrupt from the FW when it's ready.</div><div class='add'>+		 */</div><div class='add'>+		if (hw-&gt;dev_caps.ts_dev_info.ts_ll_int_read) {</div><div class='add'>+			struct ice_ptp_tx *tx = &amp;pf-&gt;ptp.port.tx;</div><div class='add'>+			u8 idx, last;</div><div class='add'>+</div><div class='add'>+			if (!ice_pf_state_is_nominal(pf))</div><div class='add'>+				return IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+			spin_lock(&amp;tx-&gt;lock);</div><div class='add'>+			if (tx-&gt;init) {</div><div class='add'>+				last = tx-&gt;last_ll_ts_idx_read + 1;</div><div class='add'>+				idx = find_next_bit_wrap(tx-&gt;in_use, tx-&gt;len,</div><div class='add'>+							 last);</div><div class='add'>+				if (idx != tx-&gt;len)</div><div class='add'>+					ice_ptp_req_tx_single_tstamp(tx, idx);</div><div class='add'>+			}</div><div class='add'>+			spin_unlock(&amp;tx-&gt;lock);</div><div class='add'>+</div><div class='add'>+			return IRQ_HANDLED;</div><div class='add'>+		}</div><div class='add'>+		fallthrough; /* non-LL_TS E810 */</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		/* All other devices process timestamps in the bottom half due</div><div class='add'>+		 * to sleeping or polling.</div><div class='add'>+		 */</div><div class='add'>+		if (!ice_ptp_pf_handles_tx_interrupt(pf))</div><div class='add'>+			return IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+		set_bit(ICE_MISC_THREAD_TX_TSTAMP, pf-&gt;misc_thread);</div><div class='add'>+		return IRQ_WAKE_THREAD;</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		/* E830 can read timestamps in the top half using rd32() */</div><div class='add'>+		if (ice_ptp_process_ts(pf) == ICE_TX_TSTAMP_WORK_PENDING) {</div><div class='add'>+			/* Process outstanding Tx timestamps. If there</div><div class='add'>+			 * is more work, re-arm the interrupt to trigger again.</div><div class='add'>+			 */</div><div class='add'>+			wr32(hw, PFINT_OICR, PFINT_OICR_TSYN_TX_M);</div><div class='add'>+			ice_flush(hw);</div><div class='add'>+		}</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	default:</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_ptp_maybe_trigger_tx_interrupt - Trigger Tx timstamp interrupt</div><div class='ctx'>  * @pf: Board private structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -2747,7 +2771,7 @@ static void ice_ptp_maybe_trigger_tx_interrupt(struct ice_pf *pf)</div><div class='ctx'> 	bool trigger_oicr = false;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	if (ice_is_e810(hw))</div><div class='add'>+	if (!pf-&gt;ptp.port.tx.has_ready_bitmap)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (!ice_pf_src_tmr_owned(pf))</div><div class='hunk'>@@ -2794,6 +2818,32 @@ static void ice_ptp_periodic_work(struct kthread_work *work)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_ptp_prepare_rebuild_sec - Prepare second NAC for PTP reset or rebuild</div><div class='add'>+ * @pf: Board private structure</div><div class='add'>+ * @rebuild: rebuild if true, prepare if false</div><div class='add'>+ * @reset_type: the reset type being performed</div><div class='add'>+ */</div><div class='add'>+static void ice_ptp_prepare_rebuild_sec(struct ice_pf *pf, bool rebuild,</div><div class='add'>+					enum ice_reset_req reset_type)</div><div class='add'>+{</div><div class='add'>+	struct list_head *entry;</div><div class='add'>+</div><div class='add'>+	list_for_each(entry, &amp;pf-&gt;adapter-&gt;ports.ports) {</div><div class='add'>+		struct ice_ptp_port *port = list_entry(entry,</div><div class='add'>+						       struct ice_ptp_port,</div><div class='add'>+						       list_node);</div><div class='add'>+		struct ice_pf *peer_pf = ptp_port_to_pf(port);</div><div class='add'>+</div><div class='add'>+		if (!ice_is_primary(&amp;peer_pf-&gt;hw)) {</div><div class='add'>+			if (rebuild)</div><div class='add'>+				ice_ptp_rebuild(peer_pf, reset_type);</div><div class='add'>+			else</div><div class='add'>+				ice_ptp_prepare_for_reset(peer_pf, reset_type);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_ptp_prepare_for_reset - Prepare PTP for reset</div><div class='ctx'>  * @pf: Board private structure</div><div class='ctx'>  * @reset_type: the reset type being performed</div><div class='hunk'>@@ -2801,6 +2851,7 @@ static void ice_ptp_periodic_work(struct kthread_work *work)</div><div class='ctx'> void ice_ptp_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_ptp *ptp = &amp;pf-&gt;ptp;</div><div class='add'>+	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	u8 src_tmr;</div><div class='ctx'> </div><div class='ctx'> 	if (ptp-&gt;state != ICE_PTP_READY)</div><div class='hunk'>@@ -2816,6 +2867,9 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type)</div><div class='ctx'> 	if (reset_type == ICE_RESET_PFR)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (ice_pf_src_tmr_owned(pf) &amp;&amp; hw-&gt;mac_type == ICE_MAC_GENERIC_3K_E825)</div><div class='add'>+		ice_ptp_prepare_rebuild_sec(pf, false, reset_type);</div><div class='add'>+</div><div class='ctx'> 	ice_ptp_release_tx_tracker(pf, &amp;pf-&gt;ptp.port.tx);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable periodic outputs */</div><div class='hunk'>@@ -2849,6 +2903,10 @@ static int ice_ptp_rebuild_owner(struct ice_pf *pf)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	err = ice_tspll_init(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	/* Acquire the global hardware lock */</div><div class='ctx'> 	if (!ice_ptp_lock(hw)) {</div><div class='ctx'> 		err = -EBUSY;</div><div class='hunk'>@@ -2882,14 +2940,12 @@ static int ice_ptp_rebuild_owner(struct ice_pf *pf)</div><div class='ctx'> 	 */</div><div class='ctx'> 	ice_ptp_flush_all_tx_tracker(pf);</div><div class='ctx'> </div><div class='del'>-	if (!ice_is_e810(hw)) {</div><div class='del'>-		/* Enable quad interrupts */</div><div class='del'>-		err = ice_ptp_cfg_phy_interrupt(pf, true, 1);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='add'>+	/* Enable quad interrupts */</div><div class='add'>+	err = ice_ptp_cfg_phy_interrupt(pf, true, 1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-		ice_ptp_restart_all_phy(pf);</div><div class='del'>-	}</div><div class='add'>+	ice_ptp_restart_all_phy(pf);</div><div class='ctx'> </div><div class='ctx'> 	/* Re-enable all periodic outputs and external timestamp events */</div><div class='ctx'> 	ice_ptp_enable_all_perout(pf);</div><div class='hunk'>@@ -2939,12 +2995,6 @@ err:</div><div class='ctx'> 	dev_err(ice_pf_to_dev(pf), "PTP reset failed %d\n", err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool ice_is_primary(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	return ice_is_e825c(hw) &amp;&amp; ice_is_dual(hw) ?</div><div class='del'>-		!!(hw-&gt;dev_caps.nac_topo.mode &amp; ICE_NAC_TOPO_PRIMARY_M) : true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ice_ptp_setup_adapter(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='ctx'> 	if (!ice_pf_src_tmr_owned(pf) || !ice_is_primary(&amp;pf-&gt;hw))</div><div class='hunk'>@@ -2960,7 +3010,7 @@ static int ice_ptp_setup_pf(struct ice_pf *pf)</div><div class='ctx'> 	struct ice_ptp *ctrl_ptp = ice_get_ctrl_ptp(pf);</div><div class='ctx'> 	struct ice_ptp *ptp = &amp;pf-&gt;ptp;</div><div class='ctx'> </div><div class='del'>-	if (WARN_ON(!ctrl_ptp) || ice_get_phy_model(&amp;pf-&gt;hw) == ICE_PHY_UNSUP)</div><div class='add'>+	if (WARN_ON(!ctrl_ptp) || pf-&gt;hw.mac_type == ICE_MAC_UNKNOWN)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;ptp-&gt;port.list_node);</div><div class='hunk'>@@ -2977,7 +3027,7 @@ static void ice_ptp_cleanup_pf(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_ptp *ptp = &amp;pf-&gt;ptp;</div><div class='ctx'> </div><div class='del'>-	if (ice_get_phy_model(&amp;pf-&gt;hw) != ICE_PHY_UNSUP) {</div><div class='add'>+	if (pf-&gt;hw.mac_type != ICE_MAC_UNKNOWN) {</div><div class='ctx'> 		mutex_lock(&amp;pf-&gt;adapter-&gt;ports.lock);</div><div class='ctx'> 		list_del(&amp;ptp-&gt;port.list_node);</div><div class='ctx'> 		mutex_unlock(&amp;pf-&gt;adapter-&gt;ports.lock);</div><div class='hunk'>@@ -3024,6 +3074,13 @@ static int ice_ptp_init_owner(struct ice_pf *pf)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = ice_tspll_init(hw);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(ice_pf_to_dev(pf), "Failed to initialize CGU, status %d\n",</div><div class='add'>+			err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Acquire the global hardware lock */</div><div class='ctx'> 	if (!ice_ptp_lock(hw)) {</div><div class='ctx'> 		err = -EBUSY;</div><div class='hunk'>@@ -3080,7 +3137,7 @@ static int ice_ptp_init_work(struct ice_pf *pf, struct ice_ptp *ptp)</div><div class='ctx'> 	/* Allocate a kworker for handling work required for the ports</div><div class='ctx'> 	 * connected to the PTP hardware clock.</div><div class='ctx'> 	 */</div><div class='del'>-	kworker = kthread_create_worker(0, "ice-ptp-%s",</div><div class='add'>+	kworker = kthread_run_worker(0, "ice-ptp-%s",</div><div class='ctx'> 					dev_name(ice_pf_to_dev(pf)));</div><div class='ctx'> 	if (IS_ERR(kworker))</div><div class='ctx'> 		return PTR_ERR(kworker);</div><div class='hunk'>@@ -3097,6 +3154,8 @@ static int ice_ptp_init_work(struct ice_pf *pf, struct ice_ptp *ptp)</div><div class='ctx'>  * ice_ptp_init_port - Initialize PTP port structure</div><div class='ctx'>  * @pf: Board private structure</div><div class='ctx'>  * @ptp_port: PTP port structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -ENODEV on invalid MAC type, -ENOMEM on failed alloc.</div><div class='ctx'>  */</div><div class='ctx'> static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port)</div><div class='ctx'> {</div><div class='hunk'>@@ -3104,16 +3163,14 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port)</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;ptp_port-&gt;ps_lock);</div><div class='ctx'> </div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		return ice_ptp_init_tx_eth56g(pf, &amp;ptp_port-&gt;tx,</div><div class='del'>-					      ptp_port-&gt;port_num);</div><div class='del'>-	case ICE_PHY_E810:</div><div class='del'>-		return ice_ptp_init_tx_e810(pf, &amp;ptp_port-&gt;tx);</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		return ice_ptp_init_tx(pf, &amp;ptp_port-&gt;tx, ptp_port-&gt;port_num);</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		kthread_init_delayed_work(&amp;ptp_port-&gt;ov_work,</div><div class='ctx'> 					  ice_ptp_wait_for_offsets);</div><div class='del'>-</div><div class='ctx'> 		return ice_ptp_init_tx_e82x(pf, &amp;ptp_port-&gt;tx,</div><div class='ctx'> 					    ptp_port-&gt;port_num);</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -3132,8 +3189,8 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_ptp_init_tx_interrupt_mode(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	switch (ice_get_phy_model(&amp;pf-&gt;hw)) {</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	switch (pf-&gt;hw.mac_type) {</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		/* E822 based PHY has the clock owner process the interrupt</div><div class='ctx'> 		 * for all ports.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -3168,6 +3225,12 @@ void ice_ptp_init(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 	ptp-&gt;state = ICE_PTP_INITIALIZING;</div><div class='ctx'> </div><div class='add'>+	if (hw-&gt;lane_num &lt; 0) {</div><div class='add'>+		err = hw-&gt;lane_num;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	ptp-&gt;port.port_num = hw-&gt;lane_num;</div><div class='add'>+</div><div class='ctx'> 	ice_ptp_init_hw(hw);</div><div class='ctx'> </div><div class='ctx'> 	ice_ptp_init_tx_interrupt_mode(pf);</div><div class='hunk'>@@ -3188,13 +3251,9 @@ void ice_ptp_init(struct ice_pf *pf)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_exit;</div><div class='ctx'> </div><div class='del'>-	ptp-&gt;port.port_num = hw-&gt;pf_id;</div><div class='del'>-	if (ice_is_e825c(hw) &amp;&amp; hw-&gt;ptp.is_2x50g_muxed_topo)</div><div class='del'>-		ptp-&gt;port.port_num = hw-&gt;pf_id * 2;</div><div class='del'>-</div><div class='ctx'> 	err = ice_ptp_init_port(pf, &amp;ptp-&gt;port);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_exit;</div><div class='add'>+		goto err_clean_pf;</div><div class='ctx'> </div><div class='ctx'> 	/* Start the PHY timestamping block */</div><div class='ctx'> 	ice_ptp_reset_phy_timestamping(pf);</div><div class='hunk'>@@ -3211,13 +3270,19 @@ void ice_ptp_init(struct ice_pf *pf)</div><div class='ctx'> 	dev_info(ice_pf_to_dev(pf), "PTP init successful\n");</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='add'>+err_clean_pf:</div><div class='add'>+	mutex_destroy(&amp;ptp-&gt;port.ps_lock);</div><div class='add'>+	ice_ptp_cleanup_pf(pf);</div><div class='ctx'> err_exit:</div><div class='ctx'> 	/* If we registered a PTP clock, release it */</div><div class='ctx'> 	if (pf-&gt;ptp.clock) {</div><div class='ctx'> 		ptp_clock_unregister(ptp-&gt;clock);</div><div class='ctx'> 		pf-&gt;ptp.clock = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	ptp-&gt;state = ICE_PTP_ERROR;</div><div class='add'>+	/* Keep ICE_PTP_UNINIT state to avoid ambiguity at driver unload</div><div class='add'>+	 * and to avoid duplicated resources release.</div><div class='add'>+	 */</div><div class='add'>+	ptp-&gt;state = ICE_PTP_UNINIT;</div><div class='ctx'> 	dev_err(ice_pf_to_dev(pf), "PTP failed %d\n", err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3230,9 +3295,19 @@ err_exit:</div><div class='ctx'>  */</div><div class='ctx'> void ice_ptp_release(struct ice_pf *pf)</div><div class='ctx'> {</div><div class='del'>-	if (pf-&gt;ptp.state != ICE_PTP_READY)</div><div class='add'>+	if (pf-&gt;ptp.state == ICE_PTP_UNINIT)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (pf-&gt;ptp.state != ICE_PTP_READY) {</div><div class='add'>+		mutex_destroy(&amp;pf-&gt;ptp.port.ps_lock);</div><div class='add'>+		ice_ptp_cleanup_pf(pf);</div><div class='add'>+		if (pf-&gt;ptp.clock) {</div><div class='add'>+			ptp_clock_unregister(pf-&gt;ptp.clock);</div><div class='add'>+			pf-&gt;ptp.clock = NULL;</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pf-&gt;ptp.state = ICE_PTP_UNINIT;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable timestamping for both Tx and Rx */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.h b/drivers/net/ethernet/intel/ice/ice_ptp.h<br/>index 824e73b677a4..27016aac4f1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_ptp.h</a></div><div class='hunk'>@@ -128,8 +128,7 @@ struct ice_ptp_tx {</div><div class='ctx'> /* Quad and port information for initializing timestamp blocks */</div><div class='ctx'> #define INDEX_PER_QUAD			64</div><div class='ctx'> #define INDEX_PER_PORT_E82X		16</div><div class='del'>-#define INDEX_PER_PORT_E810		64</div><div class='del'>-#define INDEX_PER_PORT_ETH56G		64</div><div class='add'>+#define INDEX_PER_PORT			64</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct ice_ptp_port - data used to initialize an external port for PTP</div><div class='hunk'>@@ -203,14 +202,12 @@ enum ice_ptp_pin_nvm {</div><div class='ctx'> </div><div class='ctx'> /* Pin definitions for PTP */</div><div class='ctx'> #define ICE_N_PINS_MAX			6</div><div class='del'>-#define ICE_SMA_PINS_NUM		4</div><div class='del'>-#define ICE_PIN_DESC_ARR_LEN(_arr)	(sizeof(_arr) / \</div><div class='del'>-					 sizeof(struct ice_ptp_pin_desc))</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct ice_ptp_pin_desc - hardware pin description data</div><div class='ctx'>  * @name_idx: index of the name of pin in ice_pin_names</div><div class='ctx'>  * @gpio: the associated GPIO input and output pins</div><div class='add'>+ * @delay: input and output signal delays in nanoseconds</div><div class='ctx'>  *</div><div class='ctx'>  * Structure describing a PTP-capable GPIO pin that extends ptp_pin_desc array</div><div class='ctx'>  * for the device. Device families have separate sets of available pins with</div><div class='hunk'>@@ -219,6 +216,7 @@ enum ice_ptp_pin_nvm {</div><div class='ctx'> struct ice_ptp_pin_desc {</div><div class='ctx'> 	int name_idx;</div><div class='ctx'> 	int gpio[2];</div><div class='add'>+	unsigned int delay[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -239,6 +237,7 @@ struct ice_ptp_pin_desc {</div><div class='ctx'>  * @clock: pointer to registered PTP clock device</div><div class='ctx'>  * @tstamp_config: hardware timestamping configuration</div><div class='ctx'>  * @reset_time: kernel time after clock stop on reset</div><div class='add'>+ * @tx_hwtstamp_good: number of completed Tx timestamp requests</div><div class='ctx'>  * @tx_hwtstamp_skipped: number of Tx time stamp requests skipped</div><div class='ctx'>  * @tx_hwtstamp_timeouts: number of Tx skbs discarded with no time stamp</div><div class='ctx'>  * @tx_hwtstamp_flushed: number of Tx skbs flushed due to interface closed</div><div class='hunk'>@@ -261,8 +260,9 @@ struct ice_ptp {</div><div class='ctx'> 	struct ptp_extts_request extts_rqs[GLTSYN_EVNT_H_IDX_MAX];</div><div class='ctx'> 	struct ptp_clock_info info;</div><div class='ctx'> 	struct ptp_clock *clock;</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> 	u64 reset_time;</div><div class='add'>+	u64 tx_hwtstamp_good;</div><div class='ctx'> 	u32 tx_hwtstamp_skipped;</div><div class='ctx'> 	u32 tx_hwtstamp_timeouts;</div><div class='ctx'> 	u32 tx_hwtstamp_flushed;</div><div class='hunk'>@@ -293,8 +293,11 @@ struct ice_ptp {</div><div class='ctx'> #if IS_ENABLED(CONFIG_PTP_1588_CLOCK)</div><div class='ctx'> int ice_ptp_clock_index(struct ice_pf *pf);</div><div class='ctx'> struct ice_pf;</div><div class='del'>-int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr);</div><div class='del'>-int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr);</div><div class='add'>+int ice_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config);</div><div class='add'>+int ice_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config,</div><div class='add'>+			 struct netlink_ext_ack *extack);</div><div class='ctx'> void ice_ptp_restore_timestamp_mode(struct ice_pf *pf);</div><div class='ctx'> </div><div class='ctx'> void ice_ptp_extts_event(struct ice_pf *pf);</div><div class='hunk'>@@ -302,6 +305,9 @@ s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb);</div><div class='ctx'> void ice_ptp_req_tx_single_tstamp(struct ice_ptp_tx *tx, u8 idx);</div><div class='ctx'> void ice_ptp_complete_tx_single_tstamp(struct ice_ptp_tx *tx);</div><div class='ctx'> enum ice_tx_tstamp_work ice_ptp_process_ts(struct ice_pf *pf);</div><div class='add'>+irqreturn_t ice_ptp_ts_irq(struct ice_pf *pf);</div><div class='add'>+u64 ice_ptp_read_src_clk_reg(struct ice_pf *pf,</div><div class='add'>+			     struct ptp_system_timestamp *sts);</div><div class='ctx'> </div><div class='ctx'> u64 ice_ptp_get_rx_hwts(const union ice_32b_rx_flex_desc *rx_desc,</div><div class='ctx'> 			const struct ice_pkt_ctx *pkt_ctx);</div><div class='hunk'>@@ -310,14 +316,18 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf,</div><div class='ctx'> 			       enum ice_reset_req reset_type);</div><div class='ctx'> void ice_ptp_init(struct ice_pf *pf);</div><div class='ctx'> void ice_ptp_release(struct ice_pf *pf);</div><div class='del'>-void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup);</div><div class='add'>+void ice_ptp_link_change(struct ice_pf *pf, bool linkup);</div><div class='ctx'> #else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */</div><div class='del'>-static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr)</div><div class='add'>+</div><div class='add'>+static inline int ice_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+				       struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr)</div><div class='add'>+static inline int ice_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+				       struct kernel_hwtstamp_config *config,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='hunk'>@@ -340,6 +350,17 @@ static inline bool ice_ptp_process_ts(struct ice_pf *pf)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline irqreturn_t ice_ptp_ts_irq(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 ice_ptp_read_src_clk_reg(struct ice_pf *pf,</div><div class='add'>+					   struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u64</div><div class='ctx'> ice_ptp_get_rx_hwts(const union ice_32b_rx_flex_desc *rx_desc,</div><div class='ctx'> 		    const struct ice_pkt_ctx *pkt_ctx)</div><div class='hunk'>@@ -358,7 +379,7 @@ static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf,</div><div class='ctx'> }</div><div class='ctx'> static inline void ice_ptp_init(struct ice_pf *pf) { }</div><div class='ctx'> static inline void ice_ptp_release(struct ice_pf *pf) { }</div><div class='del'>-static inline void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)</div><div class='add'>+static inline void ice_ptp_link_change(struct ice_pf *pf, bool linkup)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_consts.h b/drivers/net/ethernet/intel/ice/ice_ptp_consts.h<br/>index 585ce200c60f..19dddd9b53dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ptp_consts.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ptp_consts.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ptp_consts.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_ptp_consts.h</a></div><div class='hunk'>@@ -10,70 +10,25 @@</div><div class='ctx'> /* Constants defined for the PTP 1588 clock hardware. */</div><div class='ctx'> </div><div class='ctx'> const struct ice_phy_reg_info_eth56g eth56g_phy_res[NUM_ETH56G_PHY_RES] = {</div><div class='del'>-	/* ETH56G_PHY_REG_PTP */</div><div class='del'>-	{</div><div class='del'>-		/* base_addr */</div><div class='del'>-		{</div><div class='del'>-			0x092000,</div><div class='del'>-			0x126000,</div><div class='del'>-			0x1BA000,</div><div class='del'>-			0x24E000,</div><div class='del'>-			0x2E2000,</div><div class='del'>-		},</div><div class='del'>-		/* step */</div><div class='del'>-		0x98,</div><div class='add'>+	[ETH56G_PHY_REG_PTP] = {</div><div class='add'>+		.base_addr = 0x092000,</div><div class='add'>+		.step = 0x98,</div><div class='ctx'> 	},</div><div class='del'>-	/* ETH56G_PHY_MEM_PTP */</div><div class='del'>-	{</div><div class='del'>-		/* base_addr */</div><div class='del'>-		{</div><div class='del'>-			0x093000,</div><div class='del'>-			0x127000,</div><div class='del'>-			0x1BB000,</div><div class='del'>-			0x24F000,</div><div class='del'>-			0x2E3000,</div><div class='del'>-		},</div><div class='del'>-		/* step */</div><div class='del'>-		0x200,</div><div class='add'>+	[ETH56G_PHY_MEM_PTP] = {</div><div class='add'>+		.base_addr = 0x093000,</div><div class='add'>+		.step = 0x200,</div><div class='ctx'> 	},</div><div class='del'>-	/* ETH56G_PHY_REG_XPCS */</div><div class='del'>-	{</div><div class='del'>-		/* base_addr */</div><div class='del'>-		{</div><div class='del'>-			0x000000,</div><div class='del'>-			0x009400,</div><div class='del'>-			0x128000,</div><div class='del'>-			0x1BC000,</div><div class='del'>-			0x250000,</div><div class='del'>-		},</div><div class='del'>-		/* step */</div><div class='del'>-		0x21000,</div><div class='add'>+	[ETH56G_PHY_REG_XPCS] = {</div><div class='add'>+		.base_addr = 0x000000,</div><div class='add'>+		.step = 0x21000,</div><div class='ctx'> 	},</div><div class='del'>-	/* ETH56G_PHY_REG_MAC */</div><div class='del'>-	{</div><div class='del'>-		/* base_addr */</div><div class='del'>-		{</div><div class='del'>-			0x085000,</div><div class='del'>-			0x119000,</div><div class='del'>-			0x1AD000,</div><div class='del'>-			0x241000,</div><div class='del'>-			0x2D5000,</div><div class='del'>-		},</div><div class='del'>-		/* step */</div><div class='del'>-		0x1000,</div><div class='add'>+	[ETH56G_PHY_REG_MAC] = {</div><div class='add'>+		.base_addr = 0x085000,</div><div class='add'>+		.step = 0x1000,</div><div class='ctx'> 	},</div><div class='del'>-	/* ETH56G_PHY_REG_GPCS */</div><div class='del'>-	{</div><div class='del'>-		/* base_addr */</div><div class='del'>-		{</div><div class='del'>-			0x084000,</div><div class='del'>-			0x118000,</div><div class='del'>-			0x1AC000,</div><div class='del'>-			0x240000,</div><div class='del'>-			0x2D4000,</div><div class='del'>-		},</div><div class='del'>-		/* step */</div><div class='del'>-		0x400,</div><div class='add'>+	[ETH56G_PHY_REG_GPCS] = {</div><div class='add'>+		.base_addr = 0x084000,</div><div class='add'>+		.step = 0x400,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -131,7 +86,7 @@ struct ice_eth56g_mac_reg_cfg eth56g_mac_cfg[NUM_ICE_ETH56G_LNK_SPD] = {</div><div class='ctx'> 		.rx_offset = {</div><div class='ctx'> 			.serdes = 0xffffeb27, /* -10.42424 */</div><div class='ctx'> 			.no_fec = 0xffffcccd, /* -25.6 */</div><div class='del'>-			.fc = 0xfffe0014, /* -255.96 */</div><div class='add'>+			.fc = 0xfffc557b, /* -469.26 */</div><div class='ctx'> 			.sfd = 0x4a4, /* 2.32 */</div><div class='ctx'> 			.bs_ds = 0x32 /* 0.0969697 */</div><div class='ctx'> 		}</div><div class='hunk'>@@ -326,7 +281,7 @@ struct ice_eth56g_mac_reg_cfg eth56g_mac_cfg[NUM_ICE_ETH56G_LNK_SPD] = {</div><div class='ctx'> </div><div class='ctx'> /* struct ice_time_ref_info_e82x</div><div class='ctx'>  *</div><div class='del'>- * E822 hardware can use different sources as the reference for the PTP</div><div class='add'>+ * E82X hardware can use different sources as the reference for the PTP</div><div class='ctx'>  * hardware clock. Each clock has different characteristics such as a slightly</div><div class='ctx'>  * different frequency, etc.</div><div class='ctx'>  *</div><div class='hunk'>@@ -334,226 +289,53 @@ struct ice_eth56g_mac_reg_cfg eth56g_mac_cfg[NUM_ICE_ETH56G_LNK_SPD] = {</div><div class='ctx'>  * reference. See the struct ice_time_ref_info_e82x for information about the</div><div class='ctx'>  * meaning of each constant.</div><div class='ctx'>  */</div><div class='del'>-const struct ice_time_ref_info_e82x e82x_time_ref[NUM_ICE_TIME_REF_FREQ] = {</div><div class='del'>-	/* ICE_TIME_REF_FREQ_25_000 -&gt; 25 MHz */</div><div class='add'>+const struct ice_time_ref_info_e82x e82x_time_ref[NUM_ICE_TSPLL_FREQ] = {</div><div class='add'>+	/* ICE_TSPLL_FREQ_25_000 -&gt; 25 MHz */</div><div class='ctx'> 	{</div><div class='ctx'> 		/* pll_freq */</div><div class='ctx'> 		823437500, /* 823.4375 MHz PLL */</div><div class='ctx'> 		/* nominal_incval */</div><div class='ctx'> 		0x136e44fabULL,</div><div class='del'>-		/* pps_delay */</div><div class='del'>-		11,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='del'>-	/* ICE_TIME_REF_FREQ_122_880 -&gt; 122.88 MHz */</div><div class='add'>+	/* ICE_TSPLL_FREQ_122_880 -&gt; 122.88 MHz */</div><div class='ctx'> 	{</div><div class='ctx'> 		/* pll_freq */</div><div class='ctx'> 		783360000, /* 783.36 MHz */</div><div class='ctx'> 		/* nominal_incval */</div><div class='ctx'> 		0x146cc2177ULL,</div><div class='del'>-		/* pps_delay */</div><div class='del'>-		12,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='del'>-	/* ICE_TIME_REF_FREQ_125_000 -&gt; 125 MHz */</div><div class='add'>+	/* ICE_TSPLL_FREQ_125_000 -&gt; 125 MHz */</div><div class='ctx'> 	{</div><div class='ctx'> 		/* pll_freq */</div><div class='ctx'> 		796875000, /* 796.875 MHz */</div><div class='ctx'> 		/* nominal_incval */</div><div class='ctx'> 		0x141414141ULL,</div><div class='del'>-		/* pps_delay */</div><div class='del'>-		12,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='del'>-	/* ICE_TIME_REF_FREQ_153_600 -&gt; 153.6 MHz */</div><div class='add'>+	/* ICE_TSPLL_FREQ_153_600 -&gt; 153.6 MHz */</div><div class='ctx'> 	{</div><div class='ctx'> 		/* pll_freq */</div><div class='ctx'> 		816000000, /* 816 MHz */</div><div class='ctx'> 		/* nominal_incval */</div><div class='ctx'> 		0x139b9b9baULL,</div><div class='del'>-		/* pps_delay */</div><div class='del'>-		12,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='del'>-	/* ICE_TIME_REF_FREQ_156_250 -&gt; 156.25 MHz */</div><div class='add'>+	/* ICE_TSPLL_FREQ_156_250 -&gt; 156.25 MHz */</div><div class='ctx'> 	{</div><div class='ctx'> 		/* pll_freq */</div><div class='ctx'> 		830078125, /* 830.78125 MHz */</div><div class='ctx'> 		/* nominal_incval */</div><div class='ctx'> 		0x134679aceULL,</div><div class='del'>-		/* pps_delay */</div><div class='del'>-		11,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='del'>-	/* ICE_TIME_REF_FREQ_245_760 -&gt; 245.76 MHz */</div><div class='add'>+	/* ICE_TSPLL_FREQ_245_760 -&gt; 245.76 MHz */</div><div class='ctx'> 	{</div><div class='ctx'> 		/* pll_freq */</div><div class='ctx'> 		783360000, /* 783.36 MHz */</div><div class='ctx'> 		/* nominal_incval */</div><div class='ctx'> 		0x146cc2177ULL,</div><div class='del'>-		/* pps_delay */</div><div class='del'>-		12,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-const struct ice_cgu_pll_params_e82x e822_cgu_params[NUM_ICE_TIME_REF_FREQ] = {</div><div class='del'>-	/* ICE_TIME_REF_FREQ_25_000 -&gt; 25 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* refclk_pre_div */</div><div class='del'>-		1,</div><div class='del'>-		/* feedback_div */</div><div class='del'>-		197,</div><div class='del'>-		/* frac_n_div */</div><div class='del'>-		2621440,</div><div class='del'>-		/* post_pll_div */</div><div class='del'>-		6,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	/* ICE_TIME_REF_FREQ_122_880 -&gt; 122.88 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* refclk_pre_div */</div><div class='del'>-		5,</div><div class='del'>-		/* feedback_div */</div><div class='del'>-		223,</div><div class='del'>-		/* frac_n_div */</div><div class='del'>-		524288,</div><div class='del'>-		/* post_pll_div */</div><div class='del'>-		7,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	/* ICE_TIME_REF_FREQ_125_000 -&gt; 125 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* refclk_pre_div */</div><div class='del'>-		5,</div><div class='del'>-		/* feedback_div */</div><div class='del'>-		223,</div><div class='del'>-		/* frac_n_div */</div><div class='del'>-		524288,</div><div class='del'>-		/* post_pll_div */</div><div class='del'>-		7,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	/* ICE_TIME_REF_FREQ_153_600 -&gt; 153.6 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* refclk_pre_div */</div><div class='del'>-		5,</div><div class='del'>-		/* feedback_div */</div><div class='del'>-		159,</div><div class='del'>-		/* frac_n_div */</div><div class='del'>-		1572864,</div><div class='del'>-		/* post_pll_div */</div><div class='del'>-		6,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	/* ICE_TIME_REF_FREQ_156_250 -&gt; 156.25 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* refclk_pre_div */</div><div class='del'>-		5,</div><div class='del'>-		/* feedback_div */</div><div class='del'>-		159,</div><div class='del'>-		/* frac_n_div */</div><div class='del'>-		1572864,</div><div class='del'>-		/* post_pll_div */</div><div class='del'>-		6,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	/* ICE_TIME_REF_FREQ_245_760 -&gt; 245.76 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* refclk_pre_div */</div><div class='del'>-		10,</div><div class='del'>-		/* feedback_div */</div><div class='del'>-		223,</div><div class='del'>-		/* frac_n_div */</div><div class='del'>-		524288,</div><div class='del'>-		/* post_pll_div */</div><div class='del'>-		7,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-const</div><div class='del'>-struct ice_cgu_pll_params_e825c e825c_cgu_params[NUM_ICE_TIME_REF_FREQ] = {</div><div class='del'>-	/* ICE_TIME_REF_FREQ_25_000 -&gt; 25 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* tspll_ck_refclkfreq */</div><div class='del'>-		0x19,</div><div class='del'>-		/* tspll_ndivratio */</div><div class='del'>-		1,</div><div class='del'>-		/* tspll_fbdiv_intgr */</div><div class='del'>-		320,</div><div class='del'>-		/* tspll_fbdiv_frac */</div><div class='del'>-		0,</div><div class='del'>-		/* ref1588_ck_div */</div><div class='del'>-		0,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	/* ICE_TIME_REF_FREQ_122_880 -&gt; 122.88 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* tspll_ck_refclkfreq */</div><div class='del'>-		0x29,</div><div class='del'>-		/* tspll_ndivratio */</div><div class='del'>-		3,</div><div class='del'>-		/* tspll_fbdiv_intgr */</div><div class='del'>-		195,</div><div class='del'>-		/* tspll_fbdiv_frac */</div><div class='del'>-		1342177280UL,</div><div class='del'>-		/* ref1588_ck_div */</div><div class='del'>-		0,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	/* ICE_TIME_REF_FREQ_125_000 -&gt; 125 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* tspll_ck_refclkfreq */</div><div class='del'>-		0x3E,</div><div class='del'>-		/* tspll_ndivratio */</div><div class='del'>-		2,</div><div class='del'>-		/* tspll_fbdiv_intgr */</div><div class='del'>-		128,</div><div class='del'>-		/* tspll_fbdiv_frac */</div><div class='del'>-		0,</div><div class='del'>-		/* ref1588_ck_div */</div><div class='del'>-		0,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	/* ICE_TIME_REF_FREQ_153_600 -&gt; 153.6 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* tspll_ck_refclkfreq */</div><div class='del'>-		0x33,</div><div class='del'>-		/* tspll_ndivratio */</div><div class='del'>-		3,</div><div class='del'>-		/* tspll_fbdiv_intgr */</div><div class='del'>-		156,</div><div class='del'>-		/* tspll_fbdiv_frac */</div><div class='del'>-		1073741824UL,</div><div class='del'>-		/* ref1588_ck_div */</div><div class='del'>-		0,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	/* ICE_TIME_REF_FREQ_156_250 -&gt; 156.25 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* tspll_ck_refclkfreq */</div><div class='del'>-		0x1F,</div><div class='del'>-		/* tspll_ndivratio */</div><div class='del'>-		5,</div><div class='del'>-		/* tspll_fbdiv_intgr */</div><div class='del'>-		256,</div><div class='del'>-		/* tspll_fbdiv_frac */</div><div class='del'>-		0,</div><div class='del'>-		/* ref1588_ck_div */</div><div class='del'>-		0,</div><div class='del'>-	},</div><div class='del'>-</div><div class='del'>-	/* ICE_TIME_REF_FREQ_245_760 -&gt; 245.76 MHz */</div><div class='del'>-	{</div><div class='del'>-		/* tspll_ck_refclkfreq */</div><div class='del'>-		0x52,</div><div class='del'>-		/* tspll_ndivratio */</div><div class='del'>-		3,</div><div class='del'>-		/* tspll_fbdiv_intgr */</div><div class='del'>-		97,</div><div class='del'>-		/* tspll_fbdiv_frac */</div><div class='del'>-		2818572288UL,</div><div class='del'>-		/* ref1588_ck_div */</div><div class='del'>-		0,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -761,9 +543,9 @@ const struct ice_vernier_info_e82x e822_vernier[NUM_ICE_PTP_LNK_SPD] = {</div><div class='ctx'> 		/* rx_desk_rsgb_par */</div><div class='ctx'> 		644531250, /* 644.53125 MHz Reed Solomon gearbox */</div><div class='ctx'> 		/* tx_desk_rsgb_pcs */</div><div class='del'>-		644531250, /* 644.53125 MHz Reed Solomon gearbox */</div><div class='add'>+		390625000, /* 390.625 MHz Reed Solomon gearbox */</div><div class='ctx'> 		/* rx_desk_rsgb_pcs */</div><div class='del'>-		644531250, /* 644.53125 MHz Reed Solomon gearbox */</div><div class='add'>+		390625000, /* 390.625 MHz Reed Solomon gearbox */</div><div class='ctx'> 		/* tx_fixed_delay */</div><div class='ctx'> 		1620,</div><div class='ctx'> 		/* pmd_adj_divisor */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c<br/>index dfd49732bd5b..35680dbe4a7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ptp_hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ptp_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ptp_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_ptp_hw.c</a></div><div class='hunk'>@@ -6,7 +6,6 @@</div><div class='ctx'> #include "ice_common.h"</div><div class='ctx'> #include "ice_ptp_hw.h"</div><div class='ctx'> #include "ice_ptp_consts.h"</div><div class='del'>-#include "ice_cgu_regs.h"</div><div class='ctx'> </div><div class='ctx'> static struct dpll_pin_frequency ice_cgu_pin_freq_common[] = {</div><div class='ctx'> 	DPLL_PIN_FREQUENCY_1PPS,</div><div class='hunk'>@@ -150,7 +149,7 @@ static const struct ice_cgu_pin_desc ice_e823_zl_cgu_outputs[] = {</div><div class='ctx'>  *                    |    8 bit s    | |    32 bits    |</div><div class='ctx'>  *                    +---------------+ +---------------+</div><div class='ctx'>  *</div><div class='del'>- * The increment value is added to the GLSTYN_TIME_R and GLSTYN_TIME_L</div><div class='add'>+ * The increment value is added to the GLTSYN_TIME_R and GLTSYN_TIME_L</div><div class='ctx'>  * registers every clock source tick. Depending on the specific device</div><div class='ctx'>  * configuration, the clock source frequency could be one of a number of</div><div class='ctx'>  * values.</div><div class='hunk'>@@ -226,547 +225,6 @@ static u64 ice_ptp_read_src_incval(struct ice_hw *hw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_read_cgu_reg_e82x - Read a CGU register</div><div class='del'>- * @hw: pointer to the HW struct</div><div class='del'>- * @addr: Register address to read</div><div class='del'>- * @val: storage for register value read</div><div class='del'>- *</div><div class='del'>- * Read the contents of a register of the Clock Generation Unit. Only</div><div class='del'>- * applicable to E822 devices.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, other error codes when failed to read from CGU</div><div class='del'>- */</div><div class='del'>-static int ice_read_cgu_reg_e82x(struct ice_hw *hw, u32 addr, u32 *val)</div><div class='del'>-{</div><div class='del'>-	struct ice_sbq_msg_input cgu_msg = {</div><div class='del'>-		.opcode = ice_sbq_msg_rd,</div><div class='del'>-		.dest_dev = cgu,</div><div class='del'>-		.msg_addr_low = addr</div><div class='del'>-	};</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = ice_sbq_rw_reg(hw, &amp;cgu_msg, ICE_AQ_FLAG_RD);</div><div class='del'>-	if (err) {</div><div class='del'>-		ice_debug(hw, ICE_DBG_PTP, "Failed to read CGU register 0x%04x, err %d\n",</div><div class='del'>-			  addr, err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*val = cgu_msg.data;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_write_cgu_reg_e82x - Write a CGU register</div><div class='del'>- * @hw: pointer to the HW struct</div><div class='del'>- * @addr: Register address to write</div><div class='del'>- * @val: value to write into the register</div><div class='del'>- *</div><div class='del'>- * Write the specified value to a register of the Clock Generation Unit. Only</div><div class='del'>- * applicable to E822 devices.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, other error codes when failed to write to CGU</div><div class='del'>- */</div><div class='del'>-static int ice_write_cgu_reg_e82x(struct ice_hw *hw, u32 addr, u32 val)</div><div class='del'>-{</div><div class='del'>-	struct ice_sbq_msg_input cgu_msg = {</div><div class='del'>-		.opcode = ice_sbq_msg_wr,</div><div class='del'>-		.dest_dev = cgu,</div><div class='del'>-		.msg_addr_low = addr,</div><div class='del'>-		.data = val</div><div class='del'>-	};</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = ice_sbq_rw_reg(hw, &amp;cgu_msg, ICE_AQ_FLAG_RD);</div><div class='del'>-	if (err) {</div><div class='del'>-		ice_debug(hw, ICE_DBG_PTP, "Failed to write CGU register 0x%04x, err %d\n",</div><div class='del'>-			  addr, err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_clk_freq_str - Convert time_ref_freq to string</div><div class='del'>- * @clk_freq: Clock frequency</div><div class='del'>- *</div><div class='del'>- * Return: specified TIME_REF clock frequency converted to a string</div><div class='del'>- */</div><div class='del'>-static const char *ice_clk_freq_str(enum ice_time_ref_freq clk_freq)</div><div class='del'>-{</div><div class='del'>-	switch (clk_freq) {</div><div class='del'>-	case ICE_TIME_REF_FREQ_25_000:</div><div class='del'>-		return "25 MHz";</div><div class='del'>-	case ICE_TIME_REF_FREQ_122_880:</div><div class='del'>-		return "122.88 MHz";</div><div class='del'>-	case ICE_TIME_REF_FREQ_125_000:</div><div class='del'>-		return "125 MHz";</div><div class='del'>-	case ICE_TIME_REF_FREQ_153_600:</div><div class='del'>-		return "153.6 MHz";</div><div class='del'>-	case ICE_TIME_REF_FREQ_156_250:</div><div class='del'>-		return "156.25 MHz";</div><div class='del'>-	case ICE_TIME_REF_FREQ_245_760:</div><div class='del'>-		return "245.76 MHz";</div><div class='del'>-	default:</div><div class='del'>-		return "Unknown";</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_clk_src_str - Convert time_ref_src to string</div><div class='del'>- * @clk_src: Clock source</div><div class='del'>- *</div><div class='del'>- * Return: specified clock source converted to its string name</div><div class='del'>- */</div><div class='del'>-static const char *ice_clk_src_str(enum ice_clk_src clk_src)</div><div class='del'>-{</div><div class='del'>-	switch (clk_src) {</div><div class='del'>-	case ICE_CLK_SRC_TCXO:</div><div class='del'>-		return "TCXO";</div><div class='del'>-	case ICE_CLK_SRC_TIME_REF:</div><div class='del'>-		return "TIME_REF";</div><div class='del'>-	default:</div><div class='del'>-		return "Unknown";</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_cfg_cgu_pll_e82x - Configure the Clock Generation Unit</div><div class='del'>- * @hw: pointer to the HW struct</div><div class='del'>- * @clk_freq: Clock frequency to program</div><div class='del'>- * @clk_src: Clock source to select (TIME_REF, or TCXO)</div><div class='del'>- *</div><div class='del'>- * Configure the Clock Generation Unit with the desired clock frequency and</div><div class='del'>- * time reference, enabling the PLL which drives the PTP hardware clock.</div><div class='del'>- *</div><div class='del'>- * Return:</div><div class='del'>- * * %0       - success</div><div class='del'>- * * %-EINVAL - input parameters are incorrect</div><div class='del'>- * * %-EBUSY  - failed to lock TS PLL</div><div class='del'>- * * %other   - CGU read/write failure</div><div class='del'>- */</div><div class='del'>-static int ice_cfg_cgu_pll_e82x(struct ice_hw *hw,</div><div class='del'>-				enum ice_time_ref_freq clk_freq,</div><div class='del'>-				enum ice_clk_src clk_src)</div><div class='del'>-{</div><div class='del'>-	union tspll_ro_bwm_lf bwm_lf;</div><div class='del'>-	union nac_cgu_dword19 dw19;</div><div class='del'>-	union nac_cgu_dword22 dw22;</div><div class='del'>-	union nac_cgu_dword24 dw24;</div><div class='del'>-	union nac_cgu_dword9 dw9;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (clk_freq &gt;= NUM_ICE_TIME_REF_FREQ) {</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw), "Invalid TIME_REF frequency %u\n",</div><div class='del'>-			 clk_freq);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (clk_src &gt;= NUM_ICE_CLK_SRC) {</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw), "Invalid clock source %u\n",</div><div class='del'>-			 clk_src);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (clk_src == ICE_CLK_SRC_TCXO &amp;&amp;</div><div class='del'>-	    clk_freq != ICE_TIME_REF_FREQ_25_000) {</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw),</div><div class='del'>-			 "TCXO only supports 25 MHz frequency\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD9, &amp;dw9.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD24, &amp;dw24.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, TSPLL_RO_BWM_LF, &amp;bwm_lf.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Log the current clock configuration */</div><div class='del'>-	ice_debug(hw, ICE_DBG_PTP, "Current CGU configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",</div><div class='del'>-		  dw24.ts_pll_enable ? "enabled" : "disabled",</div><div class='del'>-		  ice_clk_src_str(dw24.time_ref_sel),</div><div class='del'>-		  ice_clk_freq_str(dw9.time_ref_freq_sel),</div><div class='del'>-		  bwm_lf.plllock_true_lock_cri ? "locked" : "unlocked");</div><div class='del'>-</div><div class='del'>-	/* Disable the PLL before changing the clock source or frequency */</div><div class='del'>-	if (dw24.ts_pll_enable) {</div><div class='del'>-		dw24.ts_pll_enable = 0;</div><div class='del'>-</div><div class='del'>-		err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD24, dw24.val);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set the frequency */</div><div class='del'>-	dw9.time_ref_freq_sel = clk_freq;</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD9, dw9.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Configure the TS PLL feedback divisor */</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD19, &amp;dw19.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	dw19.tspll_fbdiv_intgr = e822_cgu_params[clk_freq].feedback_div;</div><div class='del'>-	dw19.tspll_ndivratio = 1;</div><div class='del'>-</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD19, dw19.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Configure the TS PLL post divisor */</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD22, &amp;dw22.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	dw22.time1588clk_div = e822_cgu_params[clk_freq].post_pll_div;</div><div class='del'>-	dw22.time1588clk_sel_div2 = 0;</div><div class='del'>-</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD22, dw22.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Configure the TS PLL pre divisor and clock source */</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD24, &amp;dw24.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	dw24.ref1588_ck_div = e822_cgu_params[clk_freq].refclk_pre_div;</div><div class='del'>-	dw24.tspll_fbdiv_frac = e822_cgu_params[clk_freq].frac_n_div;</div><div class='del'>-	dw24.time_ref_sel = clk_src;</div><div class='del'>-</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD24, dw24.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Finally, enable the PLL */</div><div class='del'>-	dw24.ts_pll_enable = 1;</div><div class='del'>-</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD24, dw24.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Wait to verify if the PLL locks */</div><div class='del'>-	usleep_range(1000, 5000);</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, TSPLL_RO_BWM_LF, &amp;bwm_lf.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (!bwm_lf.plllock_true_lock_cri) {</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw), "CGU PLL failed to lock\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Log the current clock configuration */</div><div class='del'>-	ice_debug(hw, ICE_DBG_PTP, "New CGU configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",</div><div class='del'>-		  dw24.ts_pll_enable ? "enabled" : "disabled",</div><div class='del'>-		  ice_clk_src_str(dw24.time_ref_sel),</div><div class='del'>-		  ice_clk_freq_str(dw9.time_ref_freq_sel),</div><div class='del'>-		  bwm_lf.plllock_true_lock_cri ? "locked" : "unlocked");</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_cfg_cgu_pll_e825c - Configure the Clock Generation Unit for E825-C</div><div class='del'>- * @hw: pointer to the HW struct</div><div class='del'>- * @clk_freq: Clock frequency to program</div><div class='del'>- * @clk_src: Clock source to select (TIME_REF, or TCXO)</div><div class='del'>- *</div><div class='del'>- * Configure the Clock Generation Unit with the desired clock frequency and</div><div class='del'>- * time reference, enabling the PLL which drives the PTP hardware clock.</div><div class='del'>- *</div><div class='del'>- * Return:</div><div class='del'>- * * %0       - success</div><div class='del'>- * * %-EINVAL - input parameters are incorrect</div><div class='del'>- * * %-EBUSY  - failed to lock TS PLL</div><div class='del'>- * * %other   - CGU read/write failure</div><div class='del'>- */</div><div class='del'>-static int ice_cfg_cgu_pll_e825c(struct ice_hw *hw,</div><div class='del'>-				 enum ice_time_ref_freq clk_freq,</div><div class='del'>-				 enum ice_clk_src clk_src)</div><div class='del'>-{</div><div class='del'>-	union tspll_ro_lock_e825c ro_lock;</div><div class='del'>-	union nac_cgu_dword16_e825c dw16;</div><div class='del'>-	union nac_cgu_dword23_e825c dw23;</div><div class='del'>-	union nac_cgu_dword19 dw19;</div><div class='del'>-	union nac_cgu_dword22 dw22;</div><div class='del'>-	union nac_cgu_dword24 dw24;</div><div class='del'>-	union nac_cgu_dword9 dw9;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (clk_freq &gt;= NUM_ICE_TIME_REF_FREQ) {</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw), "Invalid TIME_REF frequency %u\n",</div><div class='del'>-			 clk_freq);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (clk_src &gt;= NUM_ICE_CLK_SRC) {</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw), "Invalid clock source %u\n",</div><div class='del'>-			 clk_src);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (clk_src == ICE_CLK_SRC_TCXO &amp;&amp;</div><div class='del'>-	    clk_freq != ICE_TIME_REF_FREQ_156_250) {</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw),</div><div class='del'>-			 "TCXO only supports 156.25 MHz frequency\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD9, &amp;dw9.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD24, &amp;dw24.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD16_E825C, &amp;dw16.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD23_E825C, &amp;dw23.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, TSPLL_RO_LOCK_E825C, &amp;ro_lock.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Log the current clock configuration */</div><div class='del'>-	ice_debug(hw, ICE_DBG_PTP, "Current CGU configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",</div><div class='del'>-		  dw24.ts_pll_enable ? "enabled" : "disabled",</div><div class='del'>-		  ice_clk_src_str(dw23.time_ref_sel),</div><div class='del'>-		  ice_clk_freq_str(dw9.time_ref_freq_sel),</div><div class='del'>-		  ro_lock.plllock_true_lock_cri ? "locked" : "unlocked");</div><div class='del'>-</div><div class='del'>-	/* Disable the PLL before changing the clock source or frequency */</div><div class='del'>-	if (dw23.ts_pll_enable) {</div><div class='del'>-		dw23.ts_pll_enable = 0;</div><div class='del'>-</div><div class='del'>-		err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD23_E825C,</div><div class='del'>-					     dw23.val);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set the frequency */</div><div class='del'>-	dw9.time_ref_freq_sel = clk_freq;</div><div class='del'>-</div><div class='del'>-	/* Enable the correct receiver */</div><div class='del'>-	if (clk_src == ICE_CLK_SRC_TCXO) {</div><div class='del'>-		dw9.time_ref_en = 0;</div><div class='del'>-		dw9.clk_eref0_en = 1;</div><div class='del'>-	} else {</div><div class='del'>-		dw9.time_ref_en = 1;</div><div class='del'>-		dw9.clk_eref0_en = 0;</div><div class='del'>-	}</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD9, dw9.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Choose the referenced frequency */</div><div class='del'>-	dw16.tspll_ck_refclkfreq =</div><div class='del'>-	e825c_cgu_params[clk_freq].tspll_ck_refclkfreq;</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD16_E825C, dw16.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Configure the TS PLL feedback divisor */</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD19, &amp;dw19.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	dw19.tspll_fbdiv_intgr =</div><div class='del'>-		e825c_cgu_params[clk_freq].tspll_fbdiv_intgr;</div><div class='del'>-	dw19.tspll_ndivratio =</div><div class='del'>-		e825c_cgu_params[clk_freq].tspll_ndivratio;</div><div class='del'>-</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD19, dw19.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Configure the TS PLL post divisor */</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD22, &amp;dw22.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* These two are constant for E825C */</div><div class='del'>-	dw22.time1588clk_div = 5;</div><div class='del'>-	dw22.time1588clk_sel_div2 = 0;</div><div class='del'>-</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD22, dw22.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Configure the TS PLL pre divisor and clock source */</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD23_E825C, &amp;dw23.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	dw23.ref1588_ck_div =</div><div class='del'>-		e825c_cgu_params[clk_freq].ref1588_ck_div;</div><div class='del'>-	dw23.time_ref_sel = clk_src;</div><div class='del'>-</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD23_E825C, dw23.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	dw24.tspll_fbdiv_frac =</div><div class='del'>-		e825c_cgu_params[clk_freq].tspll_fbdiv_frac;</div><div class='del'>-</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD24, dw24.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Finally, enable the PLL */</div><div class='del'>-	dw23.ts_pll_enable = 1;</div><div class='del'>-</div><div class='del'>-	err = ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD23_E825C, dw23.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Wait to verify if the PLL locks */</div><div class='del'>-	usleep_range(1000, 5000);</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, TSPLL_RO_LOCK_E825C, &amp;ro_lock.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (!ro_lock.plllock_true_lock_cri) {</div><div class='del'>-		dev_warn(ice_hw_to_dev(hw), "CGU PLL failed to lock\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Log the current clock configuration */</div><div class='del'>-	ice_debug(hw, ICE_DBG_PTP, "New CGU configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",</div><div class='del'>-		  dw24.ts_pll_enable ? "enabled" : "disabled",</div><div class='del'>-		  ice_clk_src_str(dw23.time_ref_sel),</div><div class='del'>-		  ice_clk_freq_str(dw9.time_ref_freq_sel),</div><div class='del'>-		  ro_lock.plllock_true_lock_cri ? "locked" : "unlocked");</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define ICE_ONE_PPS_OUT_AMP_MAX 3</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_cgu_cfg_pps_out - Configure 1PPS output from CGU</div><div class='del'>- * @hw: pointer to the HW struct</div><div class='del'>- * @enable: true to enable 1PPS output, false to disable it</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, other negative error code when CGU read/write failed</div><div class='del'>- */</div><div class='del'>-int ice_cgu_cfg_pps_out(struct ice_hw *hw, bool enable)</div><div class='del'>-{</div><div class='del'>-	union nac_cgu_dword9 dw9;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, NAC_CGU_DWORD9, &amp;dw9.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	dw9.one_pps_out_en = enable;</div><div class='del'>-	dw9.one_pps_out_amp = enable * ICE_ONE_PPS_OUT_AMP_MAX;</div><div class='del'>-	return ice_write_cgu_reg_e82x(hw, NAC_CGU_DWORD9, dw9.val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_cfg_cgu_pll_dis_sticky_bits_e82x - disable TS PLL sticky bits</div><div class='del'>- * @hw: pointer to the HW struct</div><div class='del'>- *</div><div class='del'>- * Configure the Clock Generation Unit TS PLL sticky bits so they don't latch on</div><div class='del'>- * losing TS PLL lock, but always show current state.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, other error codes when failed to read/write CGU</div><div class='del'>- */</div><div class='del'>-static int ice_cfg_cgu_pll_dis_sticky_bits_e82x(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	union tspll_cntr_bist_settings cntr_bist;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, TSPLL_CNTR_BIST_SETTINGS,</div><div class='del'>-				    &amp;cntr_bist.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Disable sticky lock detection so lock err reported is accurate */</div><div class='del'>-	cntr_bist.i_plllock_sel_0 = 0;</div><div class='del'>-	cntr_bist.i_plllock_sel_1 = 0;</div><div class='del'>-</div><div class='del'>-	return ice_write_cgu_reg_e82x(hw, TSPLL_CNTR_BIST_SETTINGS,</div><div class='del'>-				      cntr_bist.val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_cfg_cgu_pll_dis_sticky_bits_e825c - disable TS PLL sticky bits for E825-C</div><div class='del'>- * @hw: pointer to the HW struct</div><div class='del'>- *</div><div class='del'>- * Configure the Clock Generation Unit TS PLL sticky bits so they don't latch on</div><div class='del'>- * losing TS PLL lock, but always show current state.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, other error codes when failed to read/write CGU</div><div class='del'>- */</div><div class='del'>-static int ice_cfg_cgu_pll_dis_sticky_bits_e825c(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	union tspll_bw_tdc_e825c bw_tdc;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = ice_read_cgu_reg_e82x(hw, TSPLL_BW_TDC_E825C, &amp;bw_tdc.val);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	bw_tdc.i_plllock_sel_1_0 = 0;</div><div class='del'>-</div><div class='del'>-	return ice_write_cgu_reg_e82x(hw, TSPLL_BW_TDC_E825C, bw_tdc.val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_init_cgu_e82x - Initialize CGU with settings from firmware</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- *</div><div class='del'>- * Initialize the Clock Generation Unit of the E822 device.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success, other error codes when failed to read/write/cfg CGU</div><div class='del'>- */</div><div class='del'>-static int ice_init_cgu_e82x(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	struct ice_ts_func_info *ts_info = &amp;hw-&gt;func_caps.ts_func_info;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Disable sticky lock detection so lock err reported is accurate */</div><div class='del'>-	if (ice_is_e825c(hw))</div><div class='del'>-		err = ice_cfg_cgu_pll_dis_sticky_bits_e825c(hw);</div><div class='del'>-	else</div><div class='del'>-		err = ice_cfg_cgu_pll_dis_sticky_bits_e82x(hw);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Configure the CGU PLL using the parameters from the function</div><div class='del'>-	 * capabilities.</div><div class='del'>-	 */</div><div class='del'>-	if (ice_is_e825c(hw))</div><div class='del'>-		err = ice_cfg_cgu_pll_e825c(hw, ts_info-&gt;time_ref,</div><div class='del'>-					    (enum ice_clk_src)ts_info-&gt;clk_src);</div><div class='del'>-	else</div><div class='del'>-		err = ice_cfg_cgu_pll_e82x(hw, ts_info-&gt;time_ref,</div><div class='del'>-					   (enum ice_clk_src)ts_info-&gt;clk_src);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_ptp_tmr_cmd_to_src_reg - Convert to source timer command value</div><div class='ctx'>  * @hw: pointer to HW struct</div><div class='ctx'>  * @cmd: Timer command</div><div class='hunk'>@@ -827,8 +285,9 @@ static u32 ice_ptp_tmr_cmd_to_port_reg(struct ice_hw *hw,</div><div class='ctx'> 	/* Certain hardware families share the same register values for the</div><div class='ctx'> 	 * port register and source timer register.</div><div class='ctx'> 	 */</div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='ctx'> 		return ice_ptp_tmr_cmd_to_src_reg(hw, cmd) &amp; TS_CMD_MASK_E810;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -873,8 +332,12 @@ static u32 ice_ptp_tmr_cmd_to_port_reg(struct ice_hw *hw,</div><div class='ctx'>  */</div><div class='ctx'> void ice_ptp_src_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)</div><div class='ctx'> {</div><div class='add'>+	struct ice_pf *pf = container_of(hw, struct ice_pf, hw);</div><div class='ctx'> 	u32 cmd_val = ice_ptp_tmr_cmd_to_src_reg(hw, cmd);</div><div class='ctx'> </div><div class='add'>+	if (!ice_is_primary(hw))</div><div class='add'>+		hw = ice_get_primary_hw(pf);</div><div class='add'>+</div><div class='ctx'> 	wr32(hw, GLTSYN_CMD, cmd_val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -890,41 +353,78 @@ static void ice_ptp_exec_tmr_cmd(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = container_of(hw, struct ice_pf, hw);</div><div class='ctx'> </div><div class='add'>+	if (!ice_is_primary(hw))</div><div class='add'>+		hw = ice_get_primary_hw(pf);</div><div class='add'>+</div><div class='ctx'> 	guard(spinlock)(&amp;pf-&gt;adapter-&gt;ptp_gltsyn_time_lock);</div><div class='ctx'> 	wr32(hw, GLTSYN_CMD_SYNC, SYNC_EXEC_CMD);</div><div class='ctx'> 	ice_flush(hw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ice_ptp_cfg_sync_delay - Configure PHC to PHY synchronization delay</div><div class='add'>+ * @hw: pointer to HW struct</div><div class='add'>+ * @delay: delay between PHC and PHY SYNC command execution in nanoseconds</div><div class='add'>+ */</div><div class='add'>+static void ice_ptp_cfg_sync_delay(const struct ice_hw *hw, u32 delay)</div><div class='add'>+{</div><div class='add'>+	wr32(hw, GLTSYN_SYNC_DLAY, delay);</div><div class='add'>+	ice_flush(hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* 56G PHY device functions</div><div class='ctx'>  *</div><div class='ctx'>  * The following functions operate on devices with the ETH 56G PHY.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_ptp_get_dest_dev_e825 - get destination PHY for given port number</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @port: destination port</div><div class='add'>+ *</div><div class='add'>+ * Return: destination sideband queue PHY device.</div><div class='add'>+ */</div><div class='add'>+static enum ice_sbq_dev_id ice_ptp_get_dest_dev_e825(struct ice_hw *hw,</div><div class='add'>+						     u8 port)</div><div class='add'>+{</div><div class='add'>+	u8 curr_phy, tgt_phy;</div><div class='add'>+</div><div class='add'>+	tgt_phy = port &gt;= hw-&gt;ptp.ports_per_phy;</div><div class='add'>+	curr_phy = hw-&gt;lane_num &gt;= hw-&gt;ptp.ports_per_phy;</div><div class='add'>+	/* In the driver, lanes 4..7 are in fact 0..3 on a second PHY.</div><div class='add'>+	 * On a single complex E825C, PHY 0 is always destination device phy_0</div><div class='add'>+	 * and PHY 1 is phy_0_peer.</div><div class='add'>+	 * On dual complex E825C, device phy_0 points to PHY on a current</div><div class='add'>+	 * complex and phy_0_peer to PHY on a different complex.</div><div class='add'>+	 */</div><div class='add'>+	if ((!ice_is_dual(hw) &amp;&amp; tgt_phy == 1) ||</div><div class='add'>+	    (ice_is_dual(hw) &amp;&amp; tgt_phy != curr_phy))</div><div class='add'>+		return ice_sbq_dev_phy_0_peer;</div><div class='add'>+	else</div><div class='add'>+		return ice_sbq_dev_phy_0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_write_phy_eth56g - Write a PHY port register</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='del'>- * @phy_idx: PHY index</div><div class='add'>+ * @port: destination port</div><div class='ctx'>  * @addr: PHY register address</div><div class='ctx'>  * @val: Value to write</div><div class='ctx'>  *</div><div class='ctx'>  * Return: 0 on success, other error codes when failed to write to PHY</div><div class='ctx'>  */</div><div class='del'>-static int ice_write_phy_eth56g(struct ice_hw *hw, u8 phy_idx, u32 addr,</div><div class='del'>-				u32 val)</div><div class='add'>+static int ice_write_phy_eth56g(struct ice_hw *hw, u8 port, u32 addr, u32 val)</div><div class='ctx'> {</div><div class='del'>-	struct ice_sbq_msg_input phy_msg;</div><div class='add'>+	struct ice_sbq_msg_input msg = {</div><div class='add'>+		.dest_dev = ice_ptp_get_dest_dev_e825(hw, port),</div><div class='add'>+		.opcode = ice_sbq_msg_wr,</div><div class='add'>+		.msg_addr_low = lower_16_bits(addr),</div><div class='add'>+		.msg_addr_high = upper_16_bits(addr),</div><div class='add'>+		.data = val</div><div class='add'>+	};</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	phy_msg.opcode = ice_sbq_msg_wr;</div><div class='del'>-</div><div class='del'>-	phy_msg.msg_addr_low = lower_16_bits(addr);</div><div class='del'>-	phy_msg.msg_addr_high = upper_16_bits(addr);</div><div class='del'>-</div><div class='del'>-	phy_msg.data = val;</div><div class='del'>-	phy_msg.dest_dev = hw-&gt;ptp.phy.eth56g.phy_addr[phy_idx];</div><div class='del'>-</div><div class='del'>-	err = ice_sbq_rw_reg(hw, &amp;phy_msg, ICE_AQ_FLAG_RD);</div><div class='del'>-</div><div class='add'>+	err = ice_sbq_rw_reg(hw, &amp;msg, LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_PTP, "PTP failed to send msg to phy %d\n",</div><div class='ctx'> 			  err);</div><div class='hunk'>@@ -935,41 +435,36 @@ static int ice_write_phy_eth56g(struct ice_hw *hw, u8 phy_idx, u32 addr,</div><div class='ctx'> /**</div><div class='ctx'>  * ice_read_phy_eth56g - Read a PHY port register</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='del'>- * @phy_idx: PHY index</div><div class='add'>+ * @port: destination port</div><div class='ctx'>  * @addr: PHY register address</div><div class='ctx'>  * @val: Value to write</div><div class='ctx'>  *</div><div class='ctx'>  * Return: 0 on success, other error codes when failed to read from PHY</div><div class='ctx'>  */</div><div class='del'>-static int ice_read_phy_eth56g(struct ice_hw *hw, u8 phy_idx, u32 addr,</div><div class='del'>-			       u32 *val)</div><div class='add'>+static int ice_read_phy_eth56g(struct ice_hw *hw, u8 port, u32 addr, u32 *val)</div><div class='ctx'> {</div><div class='del'>-	struct ice_sbq_msg_input phy_msg;</div><div class='add'>+	struct ice_sbq_msg_input msg = {</div><div class='add'>+		.dest_dev = ice_ptp_get_dest_dev_e825(hw, port),</div><div class='add'>+		.opcode = ice_sbq_msg_rd,</div><div class='add'>+		.msg_addr_low = lower_16_bits(addr),</div><div class='add'>+		.msg_addr_high = upper_16_bits(addr)</div><div class='add'>+	};</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	phy_msg.opcode = ice_sbq_msg_rd;</div><div class='del'>-</div><div class='del'>-	phy_msg.msg_addr_low = lower_16_bits(addr);</div><div class='del'>-	phy_msg.msg_addr_high = upper_16_bits(addr);</div><div class='del'>-</div><div class='del'>-	phy_msg.data = 0;</div><div class='del'>-	phy_msg.dest_dev = hw-&gt;ptp.phy.eth56g.phy_addr[phy_idx];</div><div class='del'>-</div><div class='del'>-	err = ice_sbq_rw_reg(hw, &amp;phy_msg, ICE_AQ_FLAG_RD);</div><div class='del'>-	if (err) {</div><div class='add'>+	err = ice_sbq_rw_reg(hw, &amp;msg, LIBIE_AQ_FLAG_RD);</div><div class='add'>+	if (err)</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_PTP, "PTP failed to send msg to phy %d\n",</div><div class='ctx'> 			  err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*val = phy_msg.data;</div><div class='add'>+	else</div><div class='add'>+		*val = msg.data;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_phy_res_address_eth56g - Calculate a PHY port register address</div><div class='del'>- * @port: Port number to be written</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @lane: Lane number to be written</div><div class='ctx'>  * @res_type: resource type (register/memory)</div><div class='ctx'>  * @offset: Offset from PHY port register base</div><div class='ctx'>  * @addr: The result address</div><div class='hunk'>@@ -978,17 +473,19 @@ static int ice_read_phy_eth56g(struct ice_hw *hw, u8 phy_idx, u32 addr,</div><div class='ctx'>  * * %0      - success</div><div class='ctx'>  * * %EINVAL - invalid port number or resource type</div><div class='ctx'>  */</div><div class='del'>-static int ice_phy_res_address_eth56g(u8 port, enum eth56g_res_type res_type,</div><div class='del'>-				      u32 offset, u32 *addr)</div><div class='add'>+static int ice_phy_res_address_eth56g(struct ice_hw *hw, u8 lane,</div><div class='add'>+				      enum eth56g_res_type res_type,</div><div class='add'>+				      u32 offset,</div><div class='add'>+				      u32 *addr)</div><div class='ctx'> {</div><div class='del'>-	u8 lane = port % ICE_PORTS_PER_QUAD;</div><div class='del'>-	u8 phy = ICE_GET_QUAD_NUM(port);</div><div class='del'>-</div><div class='ctx'> 	if (res_type &gt;= NUM_ETH56G_PHY_RES)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	*addr = eth56g_phy_res[res_type].base[phy] +</div><div class='add'>+	/* Lanes 4..7 are in fact 0..3 on a second PHY */</div><div class='add'>+	lane %= hw-&gt;ptp.ports_per_phy;</div><div class='add'>+	*addr = eth56g_phy_res[res_type].base_addr +</div><div class='ctx'> 		lane * eth56g_phy_res[res_type].step + offset;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1008,19 +505,17 @@ static int ice_phy_res_address_eth56g(u8 port, enum eth56g_res_type res_type,</div><div class='ctx'> static int ice_write_port_eth56g(struct ice_hw *hw, u8 port, u32 offset,</div><div class='ctx'> 				 u32 val, enum eth56g_res_type res_type)</div><div class='ctx'> {</div><div class='del'>-	u8 phy_port = port % hw-&gt;ptp.ports_per_phy;</div><div class='del'>-	u8 phy_idx = port / hw-&gt;ptp.ports_per_phy;</div><div class='ctx'> 	u32 addr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (port &gt;= hw-&gt;ptp.num_lports)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	err = ice_phy_res_address_eth56g(phy_port, res_type, offset, &amp;addr);</div><div class='add'>+	err = ice_phy_res_address_eth56g(hw, port, res_type, offset, &amp;addr);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return ice_write_phy_eth56g(hw, phy_idx, addr, val);</div><div class='add'>+	return ice_write_phy_eth56g(hw, port, addr, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1039,19 +534,17 @@ static int ice_write_port_eth56g(struct ice_hw *hw, u8 port, u32 offset,</div><div class='ctx'> static int ice_read_port_eth56g(struct ice_hw *hw, u8 port, u32 offset,</div><div class='ctx'> 				u32 *val, enum eth56g_res_type res_type)</div><div class='ctx'> {</div><div class='del'>-	u8 phy_port = port % hw-&gt;ptp.ports_per_phy;</div><div class='del'>-	u8 phy_idx = port / hw-&gt;ptp.ports_per_phy;</div><div class='ctx'> 	u32 addr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (port &gt;= hw-&gt;ptp.num_lports)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	err = ice_phy_res_address_eth56g(phy_port, res_type, offset, &amp;addr);</div><div class='add'>+	err = ice_phy_res_address_eth56g(hw, port, res_type, offset, &amp;addr);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return ice_read_phy_eth56g(hw, phy_idx, addr, val);</div><div class='add'>+	return ice_read_phy_eth56g(hw, port, addr, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1201,6 +694,56 @@ static int ice_write_port_mem_eth56g(struct ice_hw *hw, u8 port, u16 offset,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_write_quad_ptp_reg_eth56g - Write a PHY quad register</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @offset: PHY register offset</div><div class='add'>+ * @port: Port number</div><div class='add'>+ * @val: Value to write</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * %0     - success</div><div class='add'>+ * * %EIO  - invalid port number or resource type</div><div class='add'>+ * * %other - failed to write to PHY</div><div class='add'>+ */</div><div class='add'>+static int ice_write_quad_ptp_reg_eth56g(struct ice_hw *hw, u8 port,</div><div class='add'>+					 u32 offset, u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	if (port &gt;= hw-&gt;ptp.num_lports)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	addr = eth56g_phy_res[ETH56G_PHY_REG_PTP].base_addr + offset;</div><div class='add'>+</div><div class='add'>+	return ice_write_phy_eth56g(hw, port, addr, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_read_quad_ptp_reg_eth56g - Read a PHY quad register</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @offset: PHY register offset</div><div class='add'>+ * @port: Port number</div><div class='add'>+ * @val: Value to read</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * %0     - success</div><div class='add'>+ * * %EIO  - invalid port number or resource type</div><div class='add'>+ * * %other - failed to read from PHY</div><div class='add'>+ */</div><div class='add'>+static int ice_read_quad_ptp_reg_eth56g(struct ice_hw *hw, u8 port,</div><div class='add'>+					u32 offset, u32 *val)</div><div class='add'>+{</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	if (port &gt;= hw-&gt;ptp.num_lports)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	addr = eth56g_phy_res[ETH56G_PHY_REG_PTP].base_addr + offset;</div><div class='add'>+</div><div class='add'>+	return ice_read_phy_eth56g(hw, port, addr, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_is_64b_phy_reg_eth56g - Check if this is a 64bit PHY register</div><div class='ctx'>  * @low_addr: the low address to check</div><div class='ctx'>  * @high_addr: on return, contains the high address of the 64bit register</div><div class='hunk'>@@ -1518,8 +1061,8 @@ static int ice_read_ptp_tstamp_eth56g(struct ice_hw *hw, u8 port, u8 idx,</div><div class='ctx'> 	 * lower 8 bits in the low register, and the upper 32 bits in the high</div><div class='ctx'> 	 * register.</div><div class='ctx'> 	 */</div><div class='del'>-	*tstamp = ((u64)hi) &lt;&lt; TS_PHY_HIGH_S | ((u64)lo &amp; TS_PHY_LOW_M);</div><div class='del'>-</div><div class='add'>+	*tstamp = FIELD_PREP(PHY_40B_HIGH_M, hi) |</div><div class='add'>+		  FIELD_PREP(PHY_40B_LOW_M, lo);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1918,7 +1461,6 @@ ice_phy_get_speed_eth56g(struct ice_link_status *li)</div><div class='ctx'>  */</div><div class='ctx'> static int ice_phy_cfg_parpcs_eth56g(struct ice_hw *hw, u8 port)</div><div class='ctx'> {</div><div class='del'>-	u8 port_blk = port &amp; ~(ICE_PORTS_PER_QUAD - 1);</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -1933,8 +1475,8 @@ static int ice_phy_cfg_parpcs_eth56g(struct ice_hw *hw, u8 port)</div><div class='ctx'> 	switch (ice_phy_get_speed_eth56g(&amp;hw-&gt;port_info-&gt;phy.link_info)) {</div><div class='ctx'> 	case ICE_ETH56G_LNK_SPD_1G:</div><div class='ctx'> 	case ICE_ETH56G_LNK_SPD_2_5G:</div><div class='del'>-		err = ice_read_ptp_reg_eth56g(hw, port_blk,</div><div class='del'>-					      PHY_GPCS_CONFIG_REG0, &amp;val);</div><div class='add'>+		err = ice_read_quad_ptp_reg_eth56g(hw, port,</div><div class='add'>+						   PHY_GPCS_CONFIG_REG0, &amp;val);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			ice_debug(hw, ICE_DBG_PTP, "Failed to read PHY_GPCS_CONFIG_REG0, status: %d",</div><div class='ctx'> 				  err);</div><div class='hunk'>@@ -1945,8 +1487,8 @@ static int ice_phy_cfg_parpcs_eth56g(struct ice_hw *hw, u8 port)</div><div class='ctx'> 		val |= FIELD_PREP(PHY_GPCS_CONFIG_REG0_TX_THR_M,</div><div class='ctx'> 				  ICE_ETH56G_NOMINAL_TX_THRESH);</div><div class='ctx'> </div><div class='del'>-		err = ice_write_ptp_reg_eth56g(hw, port_blk,</div><div class='del'>-					       PHY_GPCS_CONFIG_REG0, val);</div><div class='add'>+		err = ice_write_quad_ptp_reg_eth56g(hw, port,</div><div class='add'>+						    PHY_GPCS_CONFIG_REG0, val);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			ice_debug(hw, ICE_DBG_PTP, "Failed to write PHY_GPCS_CONFIG_REG0, status: %d",</div><div class='ctx'> 				  err);</div><div class='hunk'>@@ -1987,50 +1529,47 @@ static int ice_phy_cfg_parpcs_eth56g(struct ice_hw *hw, u8 port)</div><div class='ctx'>  */</div><div class='ctx'> int ice_phy_cfg_ptp_1step_eth56g(struct ice_hw *hw, u8 port)</div><div class='ctx'> {</div><div class='del'>-	u8 port_blk = port &amp; ~(ICE_PORTS_PER_QUAD - 1);</div><div class='del'>-	u8 blk_port = port &amp; (ICE_PORTS_PER_QUAD - 1);</div><div class='add'>+	u8 quad_lane = port % ICE_PORTS_PER_QUAD;</div><div class='add'>+	u32 addr, val, peer_delay;</div><div class='ctx'> 	bool enable, sfd_ena;</div><div class='del'>-	u32 val, peer_delay;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	enable = hw-&gt;ptp.phy.eth56g.onestep_ena;</div><div class='ctx'> 	peer_delay = hw-&gt;ptp.phy.eth56g.peer_delay;</div><div class='ctx'> 	sfd_ena = hw-&gt;ptp.phy.eth56g.sfd_ena;</div><div class='ctx'> </div><div class='del'>-	/* PHY_PTP_1STEP_CONFIG */</div><div class='del'>-	err = ice_read_ptp_reg_eth56g(hw, port_blk, PHY_PTP_1STEP_CONFIG, &amp;val);</div><div class='add'>+	addr = PHY_PTP_1STEP_CONFIG;</div><div class='add'>+	err = ice_read_quad_ptp_reg_eth56g(hw, port, addr, &amp;val);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	if (enable)</div><div class='del'>-		val |= blk_port;</div><div class='add'>+		val |= BIT(quad_lane);</div><div class='ctx'> 	else</div><div class='del'>-		val &amp;= ~blk_port;</div><div class='add'>+		val &amp;= ~BIT(quad_lane);</div><div class='ctx'> </div><div class='ctx'> 	val &amp;= ~(PHY_PTP_1STEP_T1S_UP64_M | PHY_PTP_1STEP_T1S_DELTA_M);</div><div class='ctx'> </div><div class='del'>-	err = ice_write_ptp_reg_eth56g(hw, port_blk, PHY_PTP_1STEP_CONFIG, val);</div><div class='add'>+	err = ice_write_quad_ptp_reg_eth56g(hw, port, addr, val);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* PHY_PTP_1STEP_PEER_DELAY */</div><div class='add'>+	addr = PHY_PTP_1STEP_PEER_DELAY(quad_lane);</div><div class='ctx'> 	val = FIELD_PREP(PHY_PTP_1STEP_PD_DELAY_M, peer_delay);</div><div class='ctx'> 	if (peer_delay)</div><div class='ctx'> 		val |= PHY_PTP_1STEP_PD_ADD_PD_M;</div><div class='ctx'> 	val |= PHY_PTP_1STEP_PD_DLY_V_M;</div><div class='del'>-	err = ice_write_ptp_reg_eth56g(hw, port_blk,</div><div class='del'>-				       PHY_PTP_1STEP_PEER_DELAY(blk_port), val);</div><div class='add'>+	err = ice_write_quad_ptp_reg_eth56g(hw, port, addr, val);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	val &amp;= ~PHY_PTP_1STEP_PD_DLY_V_M;</div><div class='del'>-	err = ice_write_ptp_reg_eth56g(hw, port_blk,</div><div class='del'>-				       PHY_PTP_1STEP_PEER_DELAY(blk_port), val);</div><div class='add'>+	err = ice_write_quad_ptp_reg_eth56g(hw, port, addr, val);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* PHY_MAC_XIF_MODE */</div><div class='del'>-	err = ice_read_mac_reg_eth56g(hw, port, PHY_MAC_XIF_MODE, &amp;val);</div><div class='add'>+	addr = PHY_MAC_XIF_MODE;</div><div class='add'>+	err = ice_read_mac_reg_eth56g(hw, port, addr, &amp;val);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -2050,7 +1589,7 @@ int ice_phy_cfg_ptp_1step_eth56g(struct ice_hw *hw, u8 port)</div><div class='ctx'> 	       FIELD_PREP(PHY_MAC_XIF_TS_BIN_MODE_M, enable) |</div><div class='ctx'> 	       FIELD_PREP(PHY_MAC_XIF_TS_SFD_ENA_M, sfd_ena);</div><div class='ctx'> </div><div class='del'>-	return ice_write_mac_reg_eth56g(hw, port, PHY_MAC_XIF_MODE, val);</div><div class='add'>+	return ice_write_mac_reg_eth56g(hw, port, addr, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2092,21 +1631,22 @@ static u32 ice_ptp_calc_bitslip_eth56g(struct ice_hw *hw, u8 port, u32 bs,</div><div class='ctx'> 				       bool fc, bool rs,</div><div class='ctx'> 				       enum ice_eth56g_link_spd spd)</div><div class='ctx'> {</div><div class='del'>-	u8 port_offset = port &amp; (ICE_PORTS_PER_QUAD - 1);</div><div class='del'>-	u8 port_blk = port &amp; ~(ICE_PORTS_PER_QUAD - 1);</div><div class='ctx'> 	u32 bitslip;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!bs || rs)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (spd == ICE_ETH56G_LNK_SPD_1G || spd == ICE_ETH56G_LNK_SPD_2_5G)</div><div class='add'>+	if (spd == ICE_ETH56G_LNK_SPD_1G || spd == ICE_ETH56G_LNK_SPD_2_5G) {</div><div class='ctx'> 		err = ice_read_gpcs_reg_eth56g(hw, port, PHY_GPCS_BITSLIP,</div><div class='ctx'> 					       &amp;bitslip);</div><div class='del'>-	else</div><div class='del'>-		err = ice_read_ptp_reg_eth56g(hw, port_blk,</div><div class='del'>-					      PHY_REG_SD_BIT_SLIP(port_offset),</div><div class='del'>-					      &amp;bitslip);</div><div class='add'>+	} else {</div><div class='add'>+		u8 quad_lane = port % ICE_PORTS_PER_QUAD;</div><div class='add'>+		u32 addr;</div><div class='add'>+</div><div class='add'>+		addr = PHY_REG_SD_BIT_SLIP(quad_lane);</div><div class='add'>+		err = ice_read_quad_ptp_reg_eth56g(hw, port, addr, &amp;bitslip);</div><div class='add'>+	}</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2350,6 +1890,7 @@ int ice_phy_cfg_intr_eth56g(struct ice_hw *hw, u8 port, bool ena, u8 threshold)</div><div class='ctx'> static int ice_read_phy_and_phc_time_eth56g(struct ice_hw *hw, u8 port,</div><div class='ctx'> 					    u64 *phy_time, u64 *phc_time)</div><div class='ctx'> {</div><div class='add'>+	struct ice_pf *pf = container_of(hw, struct ice_pf, hw);</div><div class='ctx'> 	u64 tx_time, rx_time;</div><div class='ctx'> 	u32 zo, lo;</div><div class='ctx'> 	u8 tmr_idx;</div><div class='hunk'>@@ -2369,8 +1910,13 @@ static int ice_read_phy_and_phc_time_eth56g(struct ice_hw *hw, u8 port,</div><div class='ctx'> 	ice_ptp_exec_tmr_cmd(hw);</div><div class='ctx'> </div><div class='ctx'> 	/* Read the captured PHC time from the shadow time registers */</div><div class='del'>-	zo = rd32(hw, GLTSYN_SHTIME_0(tmr_idx));</div><div class='del'>-	lo = rd32(hw, GLTSYN_SHTIME_L(tmr_idx));</div><div class='add'>+	if (ice_is_primary(hw)) {</div><div class='add'>+		zo = rd32(hw, GLTSYN_SHTIME_0(tmr_idx));</div><div class='add'>+		lo = rd32(hw, GLTSYN_SHTIME_L(tmr_idx));</div><div class='add'>+	} else {</div><div class='add'>+		zo = rd32(ice_get_primary_hw(pf), GLTSYN_SHTIME_0(tmr_idx));</div><div class='add'>+		lo = rd32(ice_get_primary_hw(pf), GLTSYN_SHTIME_L(tmr_idx));</div><div class='add'>+	}</div><div class='ctx'> 	*phc_time = (u64)lo &lt;&lt; 32 | zo;</div><div class='ctx'> </div><div class='ctx'> 	/* Read the captured PHY time from the PHY shadow registers */</div><div class='hunk'>@@ -2507,6 +2053,7 @@ int ice_stop_phy_timer_eth56g(struct ice_hw *hw, u8 port, bool soft_reset)</div><div class='ctx'>  */</div><div class='ctx'> int ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port)</div><div class='ctx'> {</div><div class='add'>+	struct ice_pf *pf = container_of(hw, struct ice_pf, hw);</div><div class='ctx'> 	u32 lo, hi;</div><div class='ctx'> 	u64 incval;</div><div class='ctx'> 	u8 tmr_idx;</div><div class='hunk'>@@ -2532,8 +2079,13 @@ int ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	lo = rd32(hw, GLTSYN_INCVAL_L(tmr_idx));</div><div class='del'>-	hi = rd32(hw, GLTSYN_INCVAL_H(tmr_idx));</div><div class='add'>+	if (ice_is_primary(hw)) {</div><div class='add'>+		lo = rd32(hw, GLTSYN_INCVAL_L(tmr_idx));</div><div class='add'>+		hi = rd32(hw, GLTSYN_INCVAL_H(tmr_idx));</div><div class='add'>+	} else {</div><div class='add'>+		lo = rd32(ice_get_primary_hw(pf), GLTSYN_INCVAL_L(tmr_idx));</div><div class='add'>+		hi = rd32(ice_get_primary_hw(pf), GLTSYN_INCVAL_H(tmr_idx));</div><div class='add'>+	}</div><div class='ctx'> 	incval = (u64)hi &lt;&lt; 32 | lo;</div><div class='ctx'> </div><div class='ctx'> 	err = ice_write_40b_ptp_reg_eth56g(hw, port, PHY_REG_TIMETUS_L, incval);</div><div class='hunk'>@@ -2564,42 +2116,6 @@ int ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_sb_access_ena_eth56g - Enable SB devices (PHY and others) access</div><div class='del'>- * @hw: pointer to HW struct</div><div class='del'>- * @enable: Enable or disable access</div><div class='del'>- *</div><div class='del'>- * Enable sideband devices (PHY and others) access.</div><div class='del'>- */</div><div class='del'>-static void ice_sb_access_ena_eth56g(struct ice_hw *hw, bool enable)</div><div class='del'>-{</div><div class='del'>-	u32 val = rd32(hw, PF_SB_REM_DEV_CTL);</div><div class='del'>-</div><div class='del'>-	if (enable)</div><div class='del'>-		val |= BIT(eth56g_phy_0) | BIT(cgu) | BIT(eth56g_phy_1);</div><div class='del'>-	else</div><div class='del'>-		val &amp;= ~(BIT(eth56g_phy_0) | BIT(cgu) | BIT(eth56g_phy_1));</div><div class='del'>-</div><div class='del'>-	wr32(hw, PF_SB_REM_DEV_CTL, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_ptp_init_phc_eth56g - Perform E82X specific PHC initialization</div><div class='del'>- * @hw: pointer to HW struct</div><div class='del'>- *</div><div class='del'>- * Perform PHC initialization steps specific to E82X devices.</div><div class='del'>- *</div><div class='del'>- * Return:</div><div class='del'>- * * %0     - success</div><div class='del'>- * * %other - failed to initialize CGU</div><div class='del'>- */</div><div class='del'>-static int ice_ptp_init_phc_eth56g(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	ice_sb_access_ena_eth56g(hw, true);</div><div class='del'>-	/* Initialize the Clock Generation Unit */</div><div class='del'>-	return ice_init_cgu_e82x(hw);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_ptp_read_tx_hwtstamp_status_eth56g - Get TX timestamp status</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='ctx'>  * @ts_status: the timestamp mask pointer</div><div class='hunk'>@@ -2666,59 +2182,21 @@ static int ice_get_phy_tx_tstamp_ready_eth56g(struct ice_hw *hw, u8 port,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_is_muxed_topo - detect breakout 2x50G topology for E825C</div><div class='del'>- * @hw: pointer to the HW struct</div><div class='del'>- *</div><div class='del'>- * Return: true if it's 2x50 breakout topology, false otherwise</div><div class='del'>- */</div><div class='del'>-static bool ice_is_muxed_topo(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	u8 link_topo;</div><div class='del'>-	bool mux;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	val = rd32(hw, GLGEN_SWITCH_MODE_CONFIG);</div><div class='del'>-	mux = FIELD_GET(GLGEN_SWITCH_MODE_CONFIG_25X4_QUAD_M, val);</div><div class='del'>-	val = rd32(hw, GLGEN_MAC_LINK_TOPO);</div><div class='del'>-	link_topo = FIELD_GET(GLGEN_MAC_LINK_TOPO_LINK_TOPO_M, val);</div><div class='del'>-</div><div class='del'>-	return (mux &amp;&amp; link_topo == ICE_LINK_TOPO_UP_TO_2_LINKS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_ptp_init_phy_e825c - initialize PHY parameters</div><div class='add'>+ * ice_ptp_init_phy_e825 - initialize PHY parameters</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='ctx'>  */</div><div class='del'>-static void ice_ptp_init_phy_e825c(struct ice_hw *hw)</div><div class='add'>+static void ice_ptp_init_phy_e825(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_ptp_hw *ptp = &amp;hw-&gt;ptp;</div><div class='ctx'> 	struct ice_eth56g_params *params;</div><div class='del'>-	u8 phy;</div><div class='ctx'> </div><div class='del'>-	ptp-&gt;phy_model = ICE_PHY_ETH56G;</div><div class='ctx'> 	params = &amp;ptp-&gt;phy.eth56g;</div><div class='ctx'> 	params-&gt;onestep_ena = false;</div><div class='ctx'> 	params-&gt;peer_delay = 0;</div><div class='ctx'> 	params-&gt;sfd_ena = false;</div><div class='del'>-	params-&gt;phy_addr[0] = eth56g_phy_0;</div><div class='del'>-	params-&gt;phy_addr[1] = eth56g_phy_1;</div><div class='ctx'> 	params-&gt;num_phys = 2;</div><div class='ctx'> 	ptp-&gt;ports_per_phy = 4;</div><div class='ctx'> 	ptp-&gt;num_lports = params-&gt;num_phys * ptp-&gt;ports_per_phy;</div><div class='del'>-</div><div class='del'>-	ice_sb_access_ena_eth56g(hw, true);</div><div class='del'>-	for (phy = 0; phy &lt; params-&gt;num_phys; phy++) {</div><div class='del'>-		u32 phy_rev;</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='del'>-		err = ice_read_phy_eth56g(hw, phy, PHY_REG_REVISION, &amp;phy_rev);</div><div class='del'>-		if (err || phy_rev != PHY_REVISION_ETH56G) {</div><div class='del'>-			ptp-&gt;phy_model = ICE_PHY_UNSUP;</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ptp-&gt;is_2x50g_muxed_topo = ice_is_muxed_topo(hw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* E822 family functions</div><div class='hunk'>@@ -2737,10 +2215,9 @@ static void ice_fill_phy_msg_e82x(struct ice_hw *hw,</div><div class='ctx'> 				  struct ice_sbq_msg_input *msg, u8 port,</div><div class='ctx'> 				  u16 offset)</div><div class='ctx'> {</div><div class='del'>-	int phy_port, phy, quadtype;</div><div class='add'>+	int phy_port, quadtype;</div><div class='ctx'> </div><div class='ctx'> 	phy_port = port % hw-&gt;ptp.ports_per_phy;</div><div class='del'>-	phy = port / hw-&gt;ptp.ports_per_phy;</div><div class='ctx'> 	quadtype = ICE_GET_QUAD_NUM(port) %</div><div class='ctx'> 		   ICE_GET_QUAD_NUM(hw-&gt;ptp.ports_per_phy);</div><div class='ctx'> </div><div class='hunk'>@@ -2752,12 +2229,7 @@ static void ice_fill_phy_msg_e82x(struct ice_hw *hw,</div><div class='ctx'> 		msg-&gt;msg_addr_high = P_Q1_H(P_4_BASE + offset, phy_port);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (phy == 0)</div><div class='del'>-		msg-&gt;dest_dev = rmn_0;</div><div class='del'>-	else if (phy == 1)</div><div class='del'>-		msg-&gt;dest_dev = rmn_1;</div><div class='del'>-	else</div><div class='del'>-		msg-&gt;dest_dev = rmn_2;</div><div class='add'>+	msg-&gt;dest_dev = ice_sbq_dev_phy_0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2876,7 +2348,7 @@ ice_read_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 offset, u32 *val)</div><div class='ctx'> 	ice_fill_phy_msg_e82x(hw, &amp;msg, port, offset);</div><div class='ctx'> 	msg.opcode = ice_sbq_msg_rd;</div><div class='ctx'> </div><div class='del'>-	err = ice_sbq_rw_reg(hw, &amp;msg, ICE_AQ_FLAG_RD);</div><div class='add'>+	err = ice_sbq_rw_reg(hw, &amp;msg, LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_PTP, "Failed to send message to PHY, err %d\n",</div><div class='ctx'> 			  err);</div><div class='hunk'>@@ -2954,7 +2426,7 @@ ice_write_phy_reg_e82x(struct ice_hw *hw, u8 port, u16 offset, u32 val)</div><div class='ctx'> 	msg.opcode = ice_sbq_msg_wr;</div><div class='ctx'> 	msg.data = val;</div><div class='ctx'> </div><div class='del'>-	err = ice_sbq_rw_reg(hw, &amp;msg, ICE_AQ_FLAG_RD);</div><div class='add'>+	err = ice_sbq_rw_reg(hw, &amp;msg, LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_PTP, "Failed to send message to PHY, err %d\n",</div><div class='ctx'> 			  err);</div><div class='hunk'>@@ -3080,7 +2552,7 @@ static int ice_fill_quad_msg_e82x(struct ice_hw *hw,</div><div class='ctx'> 	if (quad &gt;= ICE_GET_QUAD_NUM(hw-&gt;ptp.num_lports))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	msg-&gt;dest_dev = rmn_0;</div><div class='add'>+	msg-&gt;dest_dev = ice_sbq_dev_phy_0;</div><div class='ctx'> </div><div class='ctx'> 	if (!(quad % ICE_GET_QUAD_NUM(hw-&gt;ptp.ports_per_phy)))</div><div class='ctx'> 		addr = Q_0_BASE + offset;</div><div class='hunk'>@@ -3115,7 +2587,7 @@ ice_read_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 *val)</div><div class='ctx'> </div><div class='ctx'> 	msg.opcode = ice_sbq_msg_rd;</div><div class='ctx'> </div><div class='del'>-	err = ice_sbq_rw_reg(hw, &amp;msg, ICE_AQ_FLAG_RD);</div><div class='add'>+	err = ice_sbq_rw_reg(hw, &amp;msg, LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_PTP, "Failed to send message to PHY, err %d\n",</div><div class='ctx'> 			  err);</div><div class='hunk'>@@ -3150,7 +2622,7 @@ ice_write_quad_reg_e82x(struct ice_hw *hw, u8 quad, u16 offset, u32 val)</div><div class='ctx'> 	msg.opcode = ice_sbq_msg_wr;</div><div class='ctx'> 	msg.data = val;</div><div class='ctx'> </div><div class='del'>-	err = ice_sbq_rw_reg(hw, &amp;msg, ICE_AQ_FLAG_RD);</div><div class='add'>+	err = ice_sbq_rw_reg(hw, &amp;msg, LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_PTP, "Failed to send message to PHY, err %d\n",</div><div class='ctx'> 			  err);</div><div class='hunk'>@@ -3199,7 +2671,8 @@ ice_read_phy_tstamp_e82x(struct ice_hw *hw, u8 quad, u8 idx, u64 *tstamp)</div><div class='ctx'> 	 * lower 8 bits in the low register, and the upper 32 bits in the high</div><div class='ctx'> 	 * register.</div><div class='ctx'> 	 */</div><div class='del'>-	*tstamp = FIELD_PREP(TS_PHY_HIGH_M, hi) | FIELD_PREP(TS_PHY_LOW_M, lo);</div><div class='add'>+	*tstamp = FIELD_PREP(PHY_40B_HIGH_M, hi) |</div><div class='add'>+		  FIELD_PREP(PHY_40B_LOW_M, lo);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3301,7 +2774,6 @@ static int ice_ptp_set_vernier_wl(struct ice_hw *hw)</div><div class='ctx'>  */</div><div class='ctx'> static int ice_ptp_init_phc_e82x(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable reading switch and PHY registers over the sideband queue */</div><div class='hunk'>@@ -3311,11 +2783,6 @@ static int ice_ptp_init_phc_e82x(struct ice_hw *hw)</div><div class='ctx'> 	val |= (PF_SB_REM_DEV_CTL_SWITCH_READ | PF_SB_REM_DEV_CTL_PHY0);</div><div class='ctx'> 	wr32(hw, PF_SB_REM_DEV_CTL, val);</div><div class='ctx'> </div><div class='del'>-	/* Initialize the Clock Generation Unit */</div><div class='del'>-	err = ice_init_cgu_e82x(hw);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='ctx'> 	/* Set window length for all the ports */</div><div class='ctx'> 	return ice_ptp_set_vernier_wl(hw);</div><div class='ctx'> }</div><div class='hunk'>@@ -4772,7 +4239,6 @@ int ice_phy_cfg_intr_e82x(struct ice_hw *hw, u8 quad, bool ena, u8 threshold)</div><div class='ctx'>  */</div><div class='ctx'> static void ice_ptp_init_phy_e82x(struct ice_ptp_hw *ptp)</div><div class='ctx'> {</div><div class='del'>-	ptp-&gt;phy_model = ICE_PHY_E82X;</div><div class='ctx'> 	ptp-&gt;num_lports = 8;</div><div class='ctx'> 	ptp-&gt;ports_per_phy = 8;</div><div class='ctx'> }</div><div class='hunk'>@@ -4799,9 +4265,9 @@ static int ice_read_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 *val)</div><div class='ctx'> 	msg.msg_addr_low = lower_16_bits(addr);</div><div class='ctx'> 	msg.msg_addr_high = upper_16_bits(addr);</div><div class='ctx'> 	msg.opcode = ice_sbq_msg_rd;</div><div class='del'>-	msg.dest_dev = rmn_0;</div><div class='add'>+	msg.dest_dev = ice_sbq_dev_phy_0;</div><div class='ctx'> </div><div class='del'>-	err = ice_sbq_rw_reg(hw, &amp;msg, ICE_AQ_FLAG_RD);</div><div class='add'>+	err = ice_sbq_rw_reg(hw, &amp;msg, LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_PTP, "Failed to send message to PHY, err %d\n",</div><div class='ctx'> 			  err);</div><div class='hunk'>@@ -4829,10 +4295,10 @@ static int ice_write_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 val)</div><div class='ctx'> 	msg.msg_addr_low = lower_16_bits(addr);</div><div class='ctx'> 	msg.msg_addr_high = upper_16_bits(addr);</div><div class='ctx'> 	msg.opcode = ice_sbq_msg_wr;</div><div class='del'>-	msg.dest_dev = rmn_0;</div><div class='add'>+	msg.dest_dev = ice_sbq_dev_phy_0;</div><div class='ctx'> 	msg.data = val;</div><div class='ctx'> </div><div class='del'>-	err = ice_sbq_rw_reg(hw, &amp;msg, ICE_AQ_FLAG_RD);</div><div class='add'>+	err = ice_sbq_rw_reg(hw, &amp;msg, LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		ice_debug(hw, ICE_DBG_PTP, "Failed to send message to PHY, err %d\n",</div><div class='ctx'> 			  err);</div><div class='hunk'>@@ -4856,33 +4322,46 @@ static int ice_write_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 val)</div><div class='ctx'> static int</div><div class='ctx'> ice_read_phy_tstamp_ll_e810(struct ice_hw *hw, u8 idx, u8 *hi, u32 *lo)</div><div class='ctx'> {</div><div class='add'>+	struct ice_e810_params *params = &amp;hw-&gt;ptp.phy.e810;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	u32 val;</div><div class='del'>-	u8 i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;params-&gt;atqbal_wq.lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Wait for any pending in-progress low latency interrupt */</div><div class='add'>+	err = wait_event_interruptible_locked_irq(params-&gt;atqbal_wq,</div><div class='add'>+						  !(params-&gt;atqbal_flags &amp;</div><div class='add'>+						    ATQBAL_FLAGS_INTR_IN_PROGRESS));</div><div class='add'>+	if (err) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;params-&gt;atqbal_wq.lock, flags);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Write TS index to read to the PF register so the FW can read it */</div><div class='del'>-	val = FIELD_PREP(TS_LL_READ_TS_IDX, idx) | TS_LL_READ_TS;</div><div class='del'>-	wr32(hw, PF_SB_ATQBAL, val);</div><div class='add'>+	val = FIELD_PREP(REG_LL_PROXY_H_TS_IDX, idx) | REG_LL_PROXY_H_EXEC;</div><div class='add'>+	wr32(hw, REG_LL_PROXY_H, val);</div><div class='ctx'> </div><div class='ctx'> 	/* Read the register repeatedly until the FW provides us the TS */</div><div class='del'>-	for (i = TS_LL_READ_RETRIES; i &gt; 0; i--) {</div><div class='del'>-		val = rd32(hw, PF_SB_ATQBAL);</div><div class='add'>+	err = read_poll_timeout_atomic(rd32, val,</div><div class='add'>+				       !FIELD_GET(REG_LL_PROXY_H_EXEC, val), 10,</div><div class='add'>+				       REG_LL_PROXY_H_TIMEOUT_US, false, hw,</div><div class='add'>+				       REG_LL_PROXY_H);</div><div class='add'>+	if (err) {</div><div class='add'>+		ice_debug(hw, ICE_DBG_PTP, "Failed to read PTP timestamp using low latency read\n");</div><div class='add'>+		spin_unlock_irqrestore(&amp;params-&gt;atqbal_wq.lock, flags);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* When the bit is cleared, the TS is ready in the register */</div><div class='del'>-		if (!(FIELD_GET(TS_LL_READ_TS, val))) {</div><div class='del'>-			/* High 8 bit value of the TS is on the bits 16:23 */</div><div class='del'>-			*hi = FIELD_GET(TS_LL_READ_TS_HIGH, val);</div><div class='add'>+	/* High 8 bit value of the TS is on the bits 16:23 */</div><div class='add'>+	*hi = FIELD_GET(REG_LL_PROXY_H_TS_HIGH, val);</div><div class='ctx'> </div><div class='del'>-			/* Read the low 32 bit value and set the TS valid bit */</div><div class='del'>-			*lo = rd32(hw, PF_SB_ATQBAH) | TS_VALID;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='add'>+	/* Read the low 32 bit value and set the TS valid bit */</div><div class='add'>+	*lo = rd32(hw, REG_LL_PROXY_L) | TS_VALID;</div><div class='ctx'> </div><div class='del'>-		udelay(10);</div><div class='del'>-	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;params-&gt;atqbal_wq.lock, flags);</div><div class='ctx'> </div><div class='del'>-	/* FW failed to provide the TS in time */</div><div class='del'>-	ice_debug(hw, ICE_DBG_PTP, "Failed to read PTP timestamp using low latency read\n");</div><div class='del'>-	return -EINVAL;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4953,7 +4432,8 @@ ice_read_phy_tstamp_e810(struct ice_hw *hw, u8 lport, u8 idx, u64 *tstamp)</div><div class='ctx'> 	/* For E810 devices, the timestamp is reported with the lower 32 bits</div><div class='ctx'> 	 * in the low register, and the upper 8 bits in the high register.</div><div class='ctx'> 	 */</div><div class='del'>-	*tstamp = ((u64)hi) &lt;&lt; TS_HIGH_S | ((u64)lo &amp; TS_LOW_M);</div><div class='add'>+	*tstamp = FIELD_PREP(PHY_EXT_40B_HIGH_M, hi) |</div><div class='add'>+		  FIELD_PREP(PHY_EXT_40B_LOW_M, lo);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -5016,8 +4496,7 @@ static int ice_ptp_init_phc_e810(struct ice_hw *hw)</div><div class='ctx'> 	u8 tmr_idx;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/* Ensure synchronization delay is zero */</div><div class='del'>-	wr32(hw, GLTSYN_SYNC_DLAY, 0);</div><div class='add'>+	ice_ptp_cfg_sync_delay(hw, ICE_E810_E830_SYNC_DELAY);</div><div class='ctx'> </div><div class='ctx'> 	tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_owned;</div><div class='ctx'> 	err = ice_write_phy_reg_e810(hw, ETH_GLTSYN_ENA(tmr_idx),</div><div class='hunk'>@@ -5065,6 +4544,55 @@ static int ice_ptp_prep_phy_time_e810(struct ice_hw *hw, u32 time)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_ptp_prep_phy_adj_ll_e810 - Prep PHY ports for a time adjustment</div><div class='add'>+ * @hw: pointer to HW struct</div><div class='add'>+ * @adj: adjustment value to program</div><div class='add'>+ *</div><div class='add'>+ * Use the low latency firmware interface to program PHY time adjustment to</div><div class='add'>+ * all PHY ports.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -EBUSY on timeout</div><div class='add'>+ */</div><div class='add'>+static int ice_ptp_prep_phy_adj_ll_e810(struct ice_hw *hw, s32 adj)</div><div class='add'>+{</div><div class='add'>+	const u8 tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_owned;</div><div class='add'>+	struct ice_e810_params *params = &amp;hw-&gt;ptp.phy.e810;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;params-&gt;atqbal_wq.lock);</div><div class='add'>+</div><div class='add'>+	/* Wait for any pending in-progress low latency interrupt */</div><div class='add'>+	err = wait_event_interruptible_locked_irq(params-&gt;atqbal_wq,</div><div class='add'>+						  !(params-&gt;atqbal_flags &amp;</div><div class='add'>+						    ATQBAL_FLAGS_INTR_IN_PROGRESS));</div><div class='add'>+	if (err) {</div><div class='add'>+		spin_unlock_irq(&amp;params-&gt;atqbal_wq.lock);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wr32(hw, REG_LL_PROXY_L, adj);</div><div class='add'>+	val = FIELD_PREP(REG_LL_PROXY_H_PHY_TMR_CMD_M, REG_LL_PROXY_H_PHY_TMR_CMD_ADJ) |</div><div class='add'>+	      FIELD_PREP(REG_LL_PROXY_H_PHY_TMR_IDX_M, tmr_idx) | REG_LL_PROXY_H_EXEC;</div><div class='add'>+	wr32(hw, REG_LL_PROXY_H, val);</div><div class='add'>+</div><div class='add'>+	/* Read the register repeatedly until the FW indicates completion */</div><div class='add'>+	err = read_poll_timeout_atomic(rd32, val,</div><div class='add'>+				       !FIELD_GET(REG_LL_PROXY_H_EXEC, val),</div><div class='add'>+				       10, REG_LL_PROXY_H_TIMEOUT_US, false, hw,</div><div class='add'>+				       REG_LL_PROXY_H);</div><div class='add'>+	if (err) {</div><div class='add'>+		ice_debug(hw, ICE_DBG_PTP, "Failed to prepare PHY timer adjustment using low latency interface\n");</div><div class='add'>+		spin_unlock_irq(&amp;params-&gt;atqbal_wq.lock);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;params-&gt;atqbal_wq.lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_ptp_prep_phy_adj_e810 - Prep PHY port for a time adjustment</div><div class='ctx'>  * @hw: pointer to HW struct</div><div class='ctx'>  * @adj: adjustment value to program</div><div class='hunk'>@@ -5082,6 +4610,9 @@ static int ice_ptp_prep_phy_adj_e810(struct ice_hw *hw, s32 adj)</div><div class='ctx'> 	u8 tmr_idx;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (hw-&gt;dev_caps.ts_dev_info.ll_phy_tmr_update)</div><div class='add'>+		return ice_ptp_prep_phy_adj_ll_e810(hw, adj);</div><div class='add'>+</div><div class='ctx'> 	tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_owned;</div><div class='ctx'> </div><div class='ctx'> 	/* Adjustments are represented as signed 2's complement values in</div><div class='hunk'>@@ -5105,6 +4636,56 @@ static int ice_ptp_prep_phy_adj_e810(struct ice_hw *hw, s32 adj)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_ptp_prep_phy_incval_ll_e810 - Prep PHY ports increment value change</div><div class='add'>+ * @hw: pointer to HW struct</div><div class='add'>+ * @incval: The new 40bit increment value to prepare</div><div class='add'>+ *</div><div class='add'>+ * Use the low latency firmware interface to program PHY time increment value</div><div class='add'>+ * for all PHY ports.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -EBUSY on timeout</div><div class='add'>+ */</div><div class='add'>+static int ice_ptp_prep_phy_incval_ll_e810(struct ice_hw *hw, u64 incval)</div><div class='add'>+{</div><div class='add'>+	const u8 tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_owned;</div><div class='add'>+	struct ice_e810_params *params = &amp;hw-&gt;ptp.phy.e810;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;params-&gt;atqbal_wq.lock);</div><div class='add'>+</div><div class='add'>+	/* Wait for any pending in-progress low latency interrupt */</div><div class='add'>+	err = wait_event_interruptible_locked_irq(params-&gt;atqbal_wq,</div><div class='add'>+						  !(params-&gt;atqbal_flags &amp;</div><div class='add'>+						    ATQBAL_FLAGS_INTR_IN_PROGRESS));</div><div class='add'>+	if (err) {</div><div class='add'>+		spin_unlock_irq(&amp;params-&gt;atqbal_wq.lock);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wr32(hw, REG_LL_PROXY_L, lower_32_bits(incval));</div><div class='add'>+	val = FIELD_PREP(REG_LL_PROXY_H_PHY_TMR_CMD_M, REG_LL_PROXY_H_PHY_TMR_CMD_FREQ) |</div><div class='add'>+	      FIELD_PREP(REG_LL_PROXY_H_TS_HIGH, (u8)upper_32_bits(incval)) |</div><div class='add'>+	      FIELD_PREP(REG_LL_PROXY_H_PHY_TMR_IDX_M, tmr_idx) | REG_LL_PROXY_H_EXEC;</div><div class='add'>+	wr32(hw, REG_LL_PROXY_H, val);</div><div class='add'>+</div><div class='add'>+	/* Read the register repeatedly until the FW indicates completion */</div><div class='add'>+	err = read_poll_timeout_atomic(rd32, val,</div><div class='add'>+				       !FIELD_GET(REG_LL_PROXY_H_EXEC, val),</div><div class='add'>+				       10, REG_LL_PROXY_H_TIMEOUT_US, false, hw,</div><div class='add'>+				       REG_LL_PROXY_H);</div><div class='add'>+	if (err) {</div><div class='add'>+		ice_debug(hw, ICE_DBG_PTP, "Failed to prepare PHY timer increment using low latency interface\n");</div><div class='add'>+		spin_unlock_irq(&amp;params-&gt;atqbal_wq.lock);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;params-&gt;atqbal_wq.lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_ptp_prep_phy_incval_e810 - Prep PHY port increment value change</div><div class='ctx'>  * @hw: pointer to HW struct</div><div class='ctx'>  * @incval: The new 40bit increment value to prepare</div><div class='hunk'>@@ -5119,6 +4700,9 @@ static int ice_ptp_prep_phy_incval_e810(struct ice_hw *hw, u64 incval)</div><div class='ctx'> 	u8 tmr_idx;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (hw-&gt;dev_caps.ts_dev_info.ll_phy_tmr_update)</div><div class='add'>+		return ice_ptp_prep_phy_incval_ll_e810(hw, incval);</div><div class='add'>+</div><div class='ctx'> 	tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_owned;</div><div class='ctx'> 	low = lower_32_bits(incval);</div><div class='ctx'> 	high = upper_32_bits(incval);</div><div class='hunk'>@@ -5178,68 +4762,6 @@ ice_get_phy_tx_tstamp_ready_e810(struct ice_hw *hw, u8 port, u64 *tstamp_ready)</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_get_pca9575_handle</div><div class='del'>- * @hw: pointer to the hw struct</div><div class='del'>- * @pca9575_handle: GPIO controller's handle</div><div class='del'>- *</div><div class='del'>- * Find and return the GPIO controller's handle in the netlist.</div><div class='del'>- * When found - the value will be cached in the hw structure and following calls</div><div class='del'>- * will return cached value</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)</div><div class='del'>-{</div><div class='del'>-	struct ice_aqc_get_link_topo *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='del'>-	int status;</div><div class='del'>-	u8 idx;</div><div class='del'>-</div><div class='del'>-	/* If handle was read previously return cached value */</div><div class='del'>-	if (hw-&gt;io_expander_handle) {</div><div class='del'>-		*pca9575_handle = hw-&gt;io_expander_handle;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If handle was not detected read it from the netlist */</div><div class='del'>-	cmd = &amp;desc.params.get_link_topo;</div><div class='del'>-	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_link_topo);</div><div class='del'>-</div><div class='del'>-	/* Set node type to GPIO controller */</div><div class='del'>-	cmd-&gt;addr.topo_params.node_type_ctx =</div><div class='del'>-		(ICE_AQC_LINK_TOPO_NODE_TYPE_M &amp;</div><div class='del'>-		 ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL);</div><div class='del'>-</div><div class='del'>-#define SW_PCA9575_SFP_TOPO_IDX		2</div><div class='del'>-#define SW_PCA9575_QSFP_TOPO_IDX	1</div><div class='del'>-</div><div class='del'>-	/* Check if the SW IO expander controlling SMA exists in the netlist. */</div><div class='del'>-	if (hw-&gt;device_id == ICE_DEV_ID_E810C_SFP)</div><div class='del'>-		idx = SW_PCA9575_SFP_TOPO_IDX;</div><div class='del'>-	else if (hw-&gt;device_id == ICE_DEV_ID_E810C_QSFP)</div><div class='del'>-		idx = SW_PCA9575_QSFP_TOPO_IDX;</div><div class='del'>-	else</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	cmd-&gt;addr.topo_params.index = idx;</div><div class='del'>-</div><div class='del'>-	status = ice_aq_send_cmd(hw, &amp;desc, NULL, 0, NULL);</div><div class='del'>-	if (status)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	/* Verify if we found the right IO expander type */</div><div class='del'>-	if (desc.params.get_link_topo.node_part_num !=</div><div class='del'>-		ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	/* If present save the handle and return it */</div><div class='del'>-	hw-&gt;io_expander_handle =</div><div class='del'>-		le16_to_cpu(desc.params.get_link_topo.addr.handle);</div><div class='del'>-	*pca9575_handle = hw-&gt;io_expander_handle;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_read_sma_ctrl</div><div class='ctx'>  * @hw: pointer to the hw struct</div><div class='ctx'>  * @data: pointer to data to be read from the GPIO controller</div><div class='hunk'>@@ -5304,37 +4826,6 @@ int ice_write_sma_ctrl(struct ice_hw *hw, u8 data)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_read_pca9575_reg</div><div class='del'>- * @hw: pointer to the hw struct</div><div class='del'>- * @offset: GPIO controller register offset</div><div class='del'>- * @data: pointer to data to be read from the GPIO controller</div><div class='del'>- *</div><div class='del'>- * Read the register from the GPIO controller</div><div class='del'>- */</div><div class='del'>-int ice_read_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data)</div><div class='del'>-{</div><div class='del'>-	struct ice_aqc_link_topo_addr link_topo;</div><div class='del'>-	__le16 addr;</div><div class='del'>-	u16 handle;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	memset(&amp;link_topo, 0, sizeof(link_topo));</div><div class='del'>-</div><div class='del'>-	err = ice_get_pca9575_handle(hw, &amp;handle);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	link_topo.handle = cpu_to_le16(handle);</div><div class='del'>-	link_topo.topo_params.node_type_ctx =</div><div class='del'>-		FIELD_PREP(ICE_AQC_LINK_TOPO_NODE_CTX_M,</div><div class='del'>-			   ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED);</div><div class='del'>-</div><div class='del'>-	addr = cpu_to_le16((u16)offset);</div><div class='del'>-</div><div class='del'>-	return ice_aq_read_i2c(hw, link_topo, 0, addr, 1, data, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_ptp_read_sdp_ac - read SDP available connections section from NVM</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='ctx'>  * @entries: returns the SDP available connections section from NVM</div><div class='hunk'>@@ -5400,16 +4891,138 @@ exit:</div><div class='ctx'>  */</div><div class='ctx'> static void ice_ptp_init_phy_e810(struct ice_ptp_hw *ptp)</div><div class='ctx'> {</div><div class='del'>-	ptp-&gt;phy_model = ICE_PHY_E810;</div><div class='add'>+	ptp-&gt;num_lports = 8;</div><div class='add'>+	ptp-&gt;ports_per_phy = 4;</div><div class='add'>+</div><div class='add'>+	init_waitqueue_head(&amp;ptp-&gt;phy.e810.atqbal_wq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* E830 functions</div><div class='add'>+ *</div><div class='add'>+ * The following functions operate on the E830 series devices.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_ptp_init_phc_e830 - Perform E830 specific PHC initialization</div><div class='add'>+ * @hw: pointer to HW struct</div><div class='add'>+ *</div><div class='add'>+ * Perform E830-specific PTP hardware clock initialization steps.</div><div class='add'>+ */</div><div class='add'>+static void ice_ptp_init_phc_e830(const struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	ice_ptp_cfg_sync_delay(hw, ICE_E810_E830_SYNC_DELAY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_ptp_write_direct_incval_e830 - Prep PHY port increment value change</div><div class='add'>+ * @hw: pointer to HW struct</div><div class='add'>+ * @incval: The new 40bit increment value to prepare</div><div class='add'>+ *</div><div class='add'>+ * Prepare the PHY port for a new increment value by programming the PHC</div><div class='add'>+ * GLTSYN_INCVAL_L and GLTSYN_INCVAL_H registers. The actual change is</div><div class='add'>+ * completed by FW automatically.</div><div class='add'>+ */</div><div class='add'>+static void ice_ptp_write_direct_incval_e830(const struct ice_hw *hw,</div><div class='add'>+					     u64 incval)</div><div class='add'>+{</div><div class='add'>+	u8 tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_owned;</div><div class='add'>+</div><div class='add'>+	wr32(hw, GLTSYN_INCVAL_L(tmr_idx), lower_32_bits(incval));</div><div class='add'>+	wr32(hw, GLTSYN_INCVAL_H(tmr_idx), upper_32_bits(incval));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_ptp_write_direct_phc_time_e830 - Prepare PHY port with initial time</div><div class='add'>+ * @hw: Board private structure</div><div class='add'>+ * @time: Time to initialize the PHY port clock to</div><div class='add'>+ *</div><div class='add'>+ * Program the PHY port ETH_GLTSYN_SHTIME registers in preparation setting the</div><div class='add'>+ * initial clock time. The time will not actually be programmed until the</div><div class='add'>+ * driver issues an ICE_PTP_INIT_TIME command.</div><div class='add'>+ *</div><div class='add'>+ * The time value is the upper 32 bits of the PHY timer, usually in units of</div><div class='add'>+ * nominal nanoseconds.</div><div class='add'>+ */</div><div class='add'>+static void ice_ptp_write_direct_phc_time_e830(const struct ice_hw *hw,</div><div class='add'>+					       u64 time)</div><div class='add'>+{</div><div class='add'>+	u8 tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_owned;</div><div class='add'>+</div><div class='add'>+	wr32(hw, GLTSYN_TIME_0(tmr_idx), 0);</div><div class='add'>+	wr32(hw, GLTSYN_TIME_L(tmr_idx), lower_32_bits(time));</div><div class='add'>+	wr32(hw, GLTSYN_TIME_H(tmr_idx), upper_32_bits(time));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_ptp_port_cmd_e830 - Prepare all external PHYs for a timer command</div><div class='add'>+ * @hw: pointer to HW struct</div><div class='add'>+ * @cmd: Command to be sent to the port</div><div class='add'>+ *</div><div class='add'>+ * Prepare the external PHYs connected to this device for a timer sync</div><div class='add'>+ * command.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code when PHY write failed</div><div class='add'>+ */</div><div class='add'>+static int ice_ptp_port_cmd_e830(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)</div><div class='add'>+{</div><div class='add'>+	u32 val = ice_ptp_tmr_cmd_to_port_reg(hw, cmd);</div><div class='add'>+</div><div class='add'>+	return ice_write_phy_reg_e810(hw, E830_ETH_GLTSYN_CMD, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_read_phy_tstamp_e830 - Read a PHY timestamp out of the external PHY</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @idx: the timestamp index to read</div><div class='add'>+ * @tstamp: on return, the 40bit timestamp value</div><div class='add'>+ *</div><div class='add'>+ * Read a 40bit timestamp value out of the timestamp block of the external PHY</div><div class='add'>+ * on the E830 device.</div><div class='add'>+ */</div><div class='add'>+static void ice_read_phy_tstamp_e830(const struct ice_hw *hw, u8 idx,</div><div class='add'>+				     u64 *tstamp)</div><div class='add'>+{</div><div class='add'>+	u32 hi, lo;</div><div class='add'>+</div><div class='add'>+	hi = rd32(hw, E830_PRTTSYN_TXTIME_H(idx));</div><div class='add'>+	lo = rd32(hw, E830_PRTTSYN_TXTIME_L(idx));</div><div class='add'>+</div><div class='add'>+	/* For E830 devices, the timestamp is reported with the lower 32 bits</div><div class='add'>+	 * in the low register, and the upper 8 bits in the high register.</div><div class='add'>+	 */</div><div class='add'>+	*tstamp = FIELD_PREP(PHY_EXT_40B_HIGH_M, hi) |</div><div class='add'>+		  FIELD_PREP(PHY_EXT_40B_LOW_M, lo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_get_phy_tx_tstamp_ready_e830 - Read Tx memory status register</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @port: the PHY port to read</div><div class='add'>+ * @tstamp_ready: contents of the Tx memory status register</div><div class='add'>+ */</div><div class='add'>+static void ice_get_phy_tx_tstamp_ready_e830(const struct ice_hw *hw, u8 port,</div><div class='add'>+					     u64 *tstamp_ready)</div><div class='add'>+{</div><div class='add'>+	*tstamp_ready = rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_H);</div><div class='add'>+	*tstamp_ready &lt;&lt;= 32;</div><div class='add'>+	*tstamp_ready |= rd32(hw, E830_PRTMAC_TS_TX_MEM_VALID_L);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_ptp_init_phy_e830 - initialize PHY parameters</div><div class='add'>+ * @ptp: pointer to the PTP HW struct</div><div class='add'>+ */</div><div class='add'>+static void ice_ptp_init_phy_e830(struct ice_ptp_hw *ptp)</div><div class='add'>+{</div><div class='ctx'> 	ptp-&gt;num_lports = 8;</div><div class='ctx'> 	ptp-&gt;ports_per_phy = 4;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Device agnostic functions</div><div class='ctx'>  *</div><div class='del'>- * The following functions implement shared behavior common to both E822 and</div><div class='del'>- * E810 devices, possibly calling a device specific implementation where</div><div class='del'>- * necessary.</div><div class='add'>+ * The following functions implement shared behavior common to all devices,</div><div class='add'>+ * possibly calling a device specific implementation where necessary.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5472,14 +5085,22 @@ void ice_ptp_init_hw(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_ptp_hw *ptp = &amp;hw-&gt;ptp;</div><div class='ctx'> </div><div class='del'>-	if (ice_is_e822(hw) || ice_is_e823(hw))</div><div class='del'>-		ice_ptp_init_phy_e82x(ptp);</div><div class='del'>-	else if (ice_is_e810(hw))</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 		ice_ptp_init_phy_e810(ptp);</div><div class='del'>-	else if (ice_is_e825c(hw))</div><div class='del'>-		ice_ptp_init_phy_e825c(hw);</div><div class='del'>-	else</div><div class='del'>-		ptp-&gt;phy_model = ICE_PHY_UNSUP;</div><div class='add'>+		break;</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		ice_ptp_init_phy_e830(ptp);</div><div class='add'>+		break;</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='add'>+		ice_ptp_init_phy_e82x(ptp);</div><div class='add'>+		break;</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		ice_ptp_init_phy_e825(hw);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -5500,11 +5121,11 @@ void ice_ptp_init_hw(struct ice_hw *hw)</div><div class='ctx'> static int ice_ptp_write_port_cmd(struct ice_hw *hw, u8 port,</div><div class='ctx'> 				  enum ice_ptp_tmr_cmd cmd)</div><div class='ctx'> {</div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		return ice_ptp_write_port_cmd_eth56g(hw, port, cmd);</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		return ice_ptp_write_port_cmd_e82x(hw, port, cmd);</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		return ice_ptp_write_port_cmd_eth56g(hw, port, cmd);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5565,9 +5186,11 @@ static int ice_ptp_port_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)</div><div class='ctx'> 	u32 port;</div><div class='ctx'> </div><div class='ctx'> 	/* PHY models which can program all ports simultaneously */</div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 		return ice_ptp_port_cmd_e810(hw, cmd);</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		return ice_ptp_port_cmd_e830(hw, cmd);</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5638,23 +5261,29 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)</div><div class='ctx'> 	tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_owned;</div><div class='ctx'> </div><div class='ctx'> 	/* Source timers */</div><div class='add'>+	/* For E830 we don't need to use shadow registers, its automatic */</div><div class='add'>+	if (hw-&gt;mac_type == ICE_MAC_E830) {</div><div class='add'>+		ice_ptp_write_direct_phc_time_e830(hw, time);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	wr32(hw, GLTSYN_SHTIME_L(tmr_idx), lower_32_bits(time));</div><div class='ctx'> 	wr32(hw, GLTSYN_SHTIME_H(tmr_idx), upper_32_bits(time));</div><div class='ctx'> 	wr32(hw, GLTSYN_SHTIME_0(tmr_idx), 0);</div><div class='ctx'> </div><div class='ctx'> 	/* PHY timers */</div><div class='ctx'> 	/* Fill Rx and Tx ports and send msg to PHY */</div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		err = ice_ptp_prep_phy_time_eth56g(hw,</div><div class='del'>-						   (u32)(time &amp; 0xFFFFFFFF));</div><div class='del'>-		break;</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 		err = ice_ptp_prep_phy_time_e810(hw, time &amp; 0xFFFFFFFF);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		err = ice_ptp_prep_phy_time_e82x(hw, time &amp; 0xFFFFFFFF);</div><div class='ctx'> 		break;</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		err = ice_ptp_prep_phy_time_eth56g(hw,</div><div class='add'>+						   (u32)(time &amp; 0xFFFFFFFF));</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5686,20 +5315,26 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)</div><div class='ctx'> </div><div class='ctx'> 	tmr_idx = hw-&gt;func_caps.ts_func_info.tmr_index_owned;</div><div class='ctx'> </div><div class='add'>+	/* For E830 we don't need to use shadow registers, its automatic */</div><div class='add'>+	if (hw-&gt;mac_type == ICE_MAC_E830) {</div><div class='add'>+		ice_ptp_write_direct_incval_e830(hw, incval);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Shadow Adjust */</div><div class='ctx'> 	wr32(hw, GLTSYN_SHADJ_L(tmr_idx), lower_32_bits(incval));</div><div class='ctx'> 	wr32(hw, GLTSYN_SHADJ_H(tmr_idx), upper_32_bits(incval));</div><div class='ctx'> </div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		err = ice_ptp_prep_phy_incval_eth56g(hw, incval);</div><div class='del'>-		break;</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 		err = ice_ptp_prep_phy_incval_e810(hw, incval);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		err = ice_ptp_prep_phy_incval_e82x(hw, incval);</div><div class='ctx'> 		break;</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		err = ice_ptp_prep_phy_incval_eth56g(hw, incval);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5759,16 +5394,19 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)</div><div class='ctx'> 	wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0);</div><div class='ctx'> 	wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj);</div><div class='ctx'> </div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		err = ice_ptp_prep_phy_adj_eth56g(hw, adj);</div><div class='del'>-		break;</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 		err = ice_ptp_prep_phy_adj_e810(hw, adj);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		/* E830 sync PHYs automatically after setting GLTSYN_SHADJ */</div><div class='add'>+		return 0;</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		err = ice_ptp_prep_phy_adj_e82x(hw, adj);</div><div class='ctx'> 		break;</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		err = ice_ptp_prep_phy_adj_eth56g(hw, adj);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5792,13 +5430,16 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)</div><div class='ctx'>  */</div><div class='ctx'> int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)</div><div class='ctx'> {</div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		return ice_read_ptp_tstamp_eth56g(hw, block, idx, tstamp);</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 		return ice_read_phy_tstamp_e810(hw, block, idx, tstamp);</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		ice_read_phy_tstamp_e830(hw, idx, tstamp);</div><div class='add'>+		return 0;</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		return ice_read_phy_tstamp_e82x(hw, block, idx, tstamp);</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		return ice_read_ptp_tstamp_eth56g(hw, block, idx, tstamp);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5822,13 +5463,13 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)</div><div class='ctx'>  */</div><div class='ctx'> int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx)</div><div class='ctx'> {</div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		return ice_clear_ptp_tstamp_eth56g(hw, block, idx);</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 		return ice_clear_phy_tstamp_e810(hw, block, idx);</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		return ice_clear_phy_tstamp_e82x(hw, block, idx);</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		return ice_clear_ptp_tstamp_eth56g(hw, block, idx);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5885,14 +5526,14 @@ static int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx)</div><div class='ctx'>  */</div><div class='ctx'> void ice_ptp_reset_ts_memory(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		ice_ptp_reset_ts_memory_eth56g(hw);</div><div class='del'>-		break;</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		ice_ptp_reset_ts_memory_e82x(hw);</div><div class='ctx'> 		break;</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		ice_ptp_reset_ts_memory_eth56g(hw);</div><div class='add'>+		break;</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 	default:</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5914,13 +5555,16 @@ int ice_ptp_init_phc(struct ice_hw *hw)</div><div class='ctx'> 	/* Clear event err indications for auxiliary pins */</div><div class='ctx'> 	(void)rd32(hw, GLTSYN_STAT(src_idx));</div><div class='ctx'> </div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		return ice_ptp_init_phc_eth56g(hw);</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 		return ice_ptp_init_phc_e810(hw);</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		ice_ptp_init_phc_e830(hw);</div><div class='add'>+		return 0;</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		return ice_ptp_init_phc_e82x(hw);</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		return 0;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5939,17 +5583,19 @@ int ice_ptp_init_phc(struct ice_hw *hw)</div><div class='ctx'>  */</div><div class='ctx'> int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready)</div><div class='ctx'> {</div><div class='del'>-	switch (ice_get_phy_model(hw)) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		return ice_get_phy_tx_tstamp_ready_eth56g(hw, block,</div><div class='del'>-							  tstamp_ready);</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='ctx'> 		return ice_get_phy_tx_tstamp_ready_e810(hw, block,</div><div class='ctx'> 							tstamp_ready);</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='add'>+		ice_get_phy_tx_tstamp_ready_e830(hw, block, tstamp_ready);</div><div class='add'>+		return 0;</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		return ice_get_phy_tx_tstamp_ready_e82x(hw, block,</div><div class='ctx'> 							tstamp_ready);</div><div class='del'>-		break;</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		return ice_get_phy_tx_tstamp_ready_eth56g(hw, block,</div><div class='add'>+							  tstamp_ready);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.h b/drivers/net/ethernet/intel/ice/ice_ptp_hw.h<br/>index 47af7c5c79b8..5896b346e579 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ptp_hw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_ptp_hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_ptp_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_ptp_hw.h</a></div><div class='hunk'>@@ -65,14 +65,14 @@ enum ice_eth56g_link_spd {</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct ice_phy_reg_info_eth56g - ETH56G PHY register parameters</div><div class='del'>- * @base: base address for each PHY block</div><div class='add'>+ * @base_addr: base address for each PHY block</div><div class='ctx'>  * @step: step between PHY lanes</div><div class='ctx'>  *</div><div class='ctx'>  * Characteristic information for the various PHY register parameters in the</div><div class='ctx'>  * ETH56G devices</div><div class='ctx'>  */</div><div class='ctx'> struct ice_phy_reg_info_eth56g {</div><div class='del'>-	u32 base[NUM_ETH56G_PHY_RES];</div><div class='add'>+	u32 base_addr;</div><div class='ctx'> 	u32 step;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -80,7 +80,6 @@ struct ice_phy_reg_info_eth56g {</div><div class='ctx'>  * struct ice_time_ref_info_e82x</div><div class='ctx'>  * @pll_freq: Frequency of PLL that drives timer ticks in Hz</div><div class='ctx'>  * @nominal_incval: increment to generate nanoseconds in GLTSYN_TIME_L</div><div class='del'>- * @pps_delay: propagation delay of the PPS output signal</div><div class='ctx'>  *</div><div class='ctx'>  * Characteristic information for the various TIME_REF sources possible in the</div><div class='ctx'>  * E822 devices</div><div class='hunk'>@@ -88,7 +87,6 @@ struct ice_phy_reg_info_eth56g {</div><div class='ctx'> struct ice_time_ref_info_e82x {</div><div class='ctx'> 	u64 pll_freq;</div><div class='ctx'> 	u64 nominal_incval;</div><div class='del'>-	u8 pps_delay;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -196,23 +194,6 @@ struct ice_eth56g_mac_reg_cfg {</div><div class='ctx'> extern</div><div class='ctx'> const struct ice_eth56g_mac_reg_cfg eth56g_mac_cfg[NUM_ICE_ETH56G_LNK_SPD];</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * struct ice_cgu_pll_params_e82x - E82X CGU parameters</div><div class='del'>- * @refclk_pre_div: Reference clock pre-divisor</div><div class='del'>- * @feedback_div: Feedback divisor</div><div class='del'>- * @frac_n_div: Fractional divisor</div><div class='del'>- * @post_pll_div: Post PLL divisor</div><div class='del'>- *</div><div class='del'>- * Clock Generation Unit parameters used to program the PLL based on the</div><div class='del'>- * selected TIME_REF frequency.</div><div class='del'>- */</div><div class='del'>-struct ice_cgu_pll_params_e82x {</div><div class='del'>-	u32 refclk_pre_div;</div><div class='del'>-	u32 feedback_div;</div><div class='del'>-	u32 frac_n_div;</div><div class='del'>-	u32 post_pll_div;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define E810C_QSFP_C827_0_HANDLE	2</div><div class='ctx'> #define E810C_QSFP_C827_1_HANDLE	3</div><div class='ctx'> enum ice_e810_c827_idx {</div><div class='hunk'>@@ -284,31 +265,6 @@ struct ice_cgu_pin_desc {</div><div class='ctx'> 	struct dpll_pin_frequency *freq_supp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-extern const struct</div><div class='del'>-ice_cgu_pll_params_e82x e822_cgu_params[NUM_ICE_TIME_REF_FREQ];</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct ice_cgu_pll_params_e825c - E825C CGU parameters</div><div class='del'>- * @tspll_ck_refclkfreq: tspll_ck_refclkfreq selection</div><div class='del'>- * @tspll_ndivratio: ndiv ratio that goes directly to the pll</div><div class='del'>- * @tspll_fbdiv_intgr: TS PLL integer feedback divide</div><div class='del'>- * @tspll_fbdiv_frac:  TS PLL fractional feedback divide</div><div class='del'>- * @ref1588_ck_div: clock divider for tspll ref</div><div class='del'>- *</div><div class='del'>- * Clock Generation Unit parameters used to program the PLL based on the</div><div class='del'>- * selected TIME_REF/TCXO frequency.</div><div class='del'>- */</div><div class='del'>-struct ice_cgu_pll_params_e825c {</div><div class='del'>-	u32 tspll_ck_refclkfreq;</div><div class='del'>-	u32 tspll_ndivratio;</div><div class='del'>-	u32 tspll_fbdiv_intgr;</div><div class='del'>-	u32 tspll_fbdiv_frac;</div><div class='del'>-	u32 ref1588_ck_div;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-extern const struct</div><div class='del'>-ice_cgu_pll_params_e825c e825c_cgu_params[NUM_ICE_TIME_REF_FREQ];</div><div class='del'>-</div><div class='ctx'> #define E810C_QSFP_C827_0_HANDLE 2</div><div class='ctx'> #define E810C_QSFP_C827_1_HANDLE 3</div><div class='ctx'> </div><div class='hunk'>@@ -316,7 +272,7 @@ ice_cgu_pll_params_e825c e825c_cgu_params[NUM_ICE_TIME_REF_FREQ];</div><div class='ctx'> extern const struct ice_phy_reg_info_eth56g eth56g_phy_res[NUM_ETH56G_PHY_RES];</div><div class='ctx'> </div><div class='ctx'> /* Table of constants related to possible TIME_REF sources */</div><div class='del'>-extern const struct ice_time_ref_info_e82x e82x_time_ref[NUM_ICE_TIME_REF_FREQ];</div><div class='add'>+extern const struct ice_time_ref_info_e82x e82x_time_ref[NUM_ICE_TSPLL_FREQ];</div><div class='ctx'> </div><div class='ctx'> /* Table of constants for Vernier calibration on E822 */</div><div class='ctx'> extern const struct ice_vernier_info_e82x e822_vernier[NUM_ICE_PTP_LNK_SPD];</div><div class='hunk'>@@ -326,12 +282,10 @@ extern const struct ice_vernier_info_e82x e822_vernier[NUM_ICE_PTP_LNK_SPD];</div><div class='ctx'>  */</div><div class='ctx'> #define ICE_E810_PLL_FREQ		812500000</div><div class='ctx'> #define ICE_PTP_NOMINAL_INCVAL_E810	0x13b13b13bULL</div><div class='del'>-#define ICE_E810_OUT_PROP_DELAY_NS	1</div><div class='del'>-#define ICE_E825C_OUT_PROP_DELAY_NS	11</div><div class='add'>+#define ICE_E810_E830_SYNC_DELAY	0</div><div class='ctx'> </div><div class='ctx'> /* Device agnostic functions */</div><div class='ctx'> u8 ice_get_ptp_src_clock_index(struct ice_hw *hw);</div><div class='del'>-int ice_cgu_cfg_pps_out(struct ice_hw *hw, bool enable);</div><div class='ctx'> bool ice_ptp_lock(struct ice_hw *hw);</div><div class='ctx'> void ice_ptp_unlock(struct ice_hw *hw);</div><div class='ctx'> void ice_ptp_src_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd);</div><div class='hunk'>@@ -360,7 +314,8 @@ void ice_ptp_reset_ts_memory_quad_e82x(struct ice_hw *hw, u8 quad);</div><div class='ctx'>  *</div><div class='ctx'>  * Returns the current TIME_REF from the capabilities structure.</div><div class='ctx'>  */</div><div class='del'>-static inline enum ice_time_ref_freq ice_e82x_time_ref(const struct ice_hw *hw)</div><div class='add'>+</div><div class='add'>+static inline enum ice_tspll_freq ice_e82x_time_ref(const struct ice_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	return hw-&gt;func_caps.ts_func_info.time_ref;</div><div class='ctx'> }</div><div class='hunk'>@@ -374,26 +329,21 @@ static inline enum ice_time_ref_freq ice_e82x_time_ref(const struct ice_hw *hw)</div><div class='ctx'>  * change, such as an update to the CGU registers.</div><div class='ctx'>  */</div><div class='ctx'> static inline void</div><div class='del'>-ice_set_e82x_time_ref(struct ice_hw *hw, enum ice_time_ref_freq time_ref)</div><div class='add'>+ice_set_e82x_time_ref(struct ice_hw *hw, enum ice_tspll_freq time_ref)</div><div class='ctx'> {</div><div class='ctx'> 	hw-&gt;func_caps.ts_func_info.time_ref = time_ref;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u64 ice_e82x_pll_freq(enum ice_time_ref_freq time_ref)</div><div class='add'>+static inline u64 ice_e82x_pll_freq(enum ice_tspll_freq time_ref)</div><div class='ctx'> {</div><div class='ctx'> 	return e82x_time_ref[time_ref].pll_freq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u64 ice_e82x_nominal_incval(enum ice_time_ref_freq time_ref)</div><div class='add'>+static inline u64 ice_e82x_nominal_incval(enum ice_tspll_freq time_ref)</div><div class='ctx'> {</div><div class='ctx'> 	return e82x_time_ref[time_ref].nominal_incval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u64 ice_e82x_pps_delay(enum ice_time_ref_freq time_ref)</div><div class='del'>-{</div><div class='del'>-	return e82x_time_ref[time_ref].pps_delay;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* E822 Vernier calibration functions */</div><div class='ctx'> int ice_stop_phy_timer_e82x(struct ice_hw *hw, u8 port, bool soft_reset);</div><div class='ctx'> int ice_start_phy_timer_e82x(struct ice_hw *hw, u8 port);</div><div class='hunk'>@@ -404,7 +354,6 @@ int ice_phy_cfg_intr_e82x(struct ice_hw *hw, u8 quad, bool ena, u8 threshold);</div><div class='ctx'> /* E810 family functions */</div><div class='ctx'> int ice_read_sma_ctrl(struct ice_hw *hw, u8 *data);</div><div class='ctx'> int ice_write_sma_ctrl(struct ice_hw *hw, u8 data);</div><div class='del'>-int ice_read_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data);</div><div class='ctx'> int ice_ptp_read_sdp_ac(struct ice_hw *hw, __le16 *entries, uint *num_entries);</div><div class='ctx'> int ice_cgu_get_num_pins(struct ice_hw *hw, bool input);</div><div class='ctx'> enum dpll_pin_type ice_cgu_get_pin_type(struct ice_hw *hw, u8 pin, bool input);</div><div class='hunk'>@@ -432,20 +381,6 @@ int ice_phy_cfg_ptp_1step_eth56g(struct ice_hw *hw, u8 port);</div><div class='ctx'> #define ICE_ETH56G_NOMINAL_THRESH4	0x7777</div><div class='ctx'> #define ICE_ETH56G_NOMINAL_TX_THRESH	0x6</div><div class='ctx'> </div><div class='del'>-static inline u64 ice_prop_delay(const struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	switch (hw-&gt;ptp.phy_model) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		return ICE_E825C_OUT_PROP_DELAY_NS;</div><div class='del'>-	case ICE_PHY_E810:</div><div class='del'>-		return ICE_E810_OUT_PROP_DELAY_NS;</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='del'>-		return ice_e82x_pps_delay(ice_e82x_time_ref(hw));</div><div class='del'>-	default:</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * ice_get_base_incval - Get base clock increment value</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='hunk'>@@ -454,23 +389,19 @@ static inline u64 ice_prop_delay(const struct ice_hw *hw)</div><div class='ctx'>  */</div><div class='ctx'> static inline u64 ice_get_base_incval(struct ice_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	switch (hw-&gt;ptp.phy_model) {</div><div class='del'>-	case ICE_PHY_ETH56G:</div><div class='del'>-		return ICE_ETH56G_NOMINAL_INCVAL;</div><div class='del'>-	case ICE_PHY_E810:</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_E810:</div><div class='add'>+	case ICE_MAC_E830:</div><div class='ctx'> 		return ICE_PTP_NOMINAL_INCVAL_E810;</div><div class='del'>-	case ICE_PHY_E82X:</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='ctx'> 		return ice_e82x_nominal_incval(ice_e82x_time_ref(hw));</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		return ICE_ETH56G_NOMINAL_INCVAL;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool ice_is_dual(struct ice_hw *hw)</div><div class='del'>-{</div><div class='del'>-	return !!(hw-&gt;dev_caps.nac_topo.mode &amp; ICE_NAC_TOPO_DUAL_M);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define PFTSYN_SEM_BYTES	4</div><div class='ctx'> </div><div class='ctx'> #define ICE_PTP_CLOCK_INDEX_0	0x00</div><div class='hunk'>@@ -673,28 +604,41 @@ static inline bool ice_is_dual(struct ice_hw *hw)</div><div class='ctx'> /* E810 timer command register */</div><div class='ctx'> #define E810_ETH_GLTSYN_CMD		0x03000344</div><div class='ctx'> </div><div class='add'>+/* E830 timer command register */</div><div class='add'>+#define E830_ETH_GLTSYN_CMD		0x00088814</div><div class='add'>+</div><div class='add'>+/* E810 PHC time register */</div><div class='add'>+#define E830_GLTSYN_TIME_L(_tmr_idx)	(0x0008A000 + 0x1000 * (_tmr_idx))</div><div class='add'>+</div><div class='ctx'> /* Source timer incval macros */</div><div class='ctx'> #define INCVAL_HIGH_M			0xFF</div><div class='ctx'> </div><div class='del'>-/* Timestamp block macros */</div><div class='add'>+/* PHY 40b registers macros */</div><div class='add'>+#define PHY_EXT_40B_LOW_M		GENMASK(31, 0)</div><div class='add'>+#define PHY_EXT_40B_HIGH_M		GENMASK_ULL(39, 32)</div><div class='add'>+#define PHY_40B_LOW_M			GENMASK(7, 0)</div><div class='add'>+#define PHY_40B_HIGH_M			GENMASK_ULL(39, 8)</div><div class='ctx'> #define TS_VALID			BIT(0)</div><div class='ctx'> #define TS_LOW_M			0xFFFFFFFF</div><div class='ctx'> #define TS_HIGH_M			0xFF</div><div class='ctx'> #define TS_HIGH_S			32</div><div class='ctx'> </div><div class='del'>-#define TS_PHY_LOW_M			0xFF</div><div class='del'>-#define TS_PHY_HIGH_M			0xFFFFFFFF</div><div class='del'>-#define TS_PHY_HIGH_S			8</div><div class='del'>-</div><div class='ctx'> #define BYTES_PER_IDX_ADDR_L_U		8</div><div class='ctx'> #define BYTES_PER_IDX_ADDR_L		4</div><div class='ctx'> </div><div class='ctx'> /* Tx timestamp low latency read definitions */</div><div class='del'>-#define TS_LL_READ_RETRIES		200</div><div class='del'>-#define TS_LL_READ_TS_HIGH		GENMASK(23, 16)</div><div class='del'>-#define TS_LL_READ_TS_IDX		GENMASK(29, 24)</div><div class='del'>-#define TS_LL_READ_TS_INTR		BIT(30)</div><div class='del'>-#define TS_LL_READ_TS			BIT(31)</div><div class='add'>+#define REG_LL_PROXY_H_TIMEOUT_US	2000</div><div class='add'>+#define REG_LL_PROXY_H_PHY_TMR_CMD_M	GENMASK(7, 6)</div><div class='add'>+#define REG_LL_PROXY_H_PHY_TMR_CMD_ADJ	0x1</div><div class='add'>+#define REG_LL_PROXY_H_PHY_TMR_CMD_FREQ	0x2</div><div class='add'>+#define REG_LL_PROXY_H_TS_HIGH		GENMASK(23, 16)</div><div class='add'>+#define REG_LL_PROXY_H_PHY_TMR_IDX_M	BIT(24)</div><div class='add'>+#define REG_LL_PROXY_H_TS_IDX		GENMASK(29, 24)</div><div class='add'>+#define REG_LL_PROXY_H_TS_INTR_ENA	BIT(30)</div><div class='add'>+#define REG_LL_PROXY_H_EXEC		BIT(31)</div><div class='add'>+</div><div class='add'>+#define REG_LL_PROXY_L			PF_SB_ATQBAH</div><div class='add'>+#define REG_LL_PROXY_H			PF_SB_ATQBAL</div><div class='ctx'> </div><div class='ctx'> /* Internal PHY timestamp address */</div><div class='ctx'> #define TS_L(a, idx) ((a) + ((idx) * BYTES_PER_IDX_ADDR_L_U))</div><div class='hunk'>@@ -718,6 +662,7 @@ static inline bool ice_is_dual(struct ice_hw *hw)</div><div class='ctx'> #define ICE_SMA1_MASK		(ICE_SMA1_DIR_EN | ICE_SMA1_TX_EN)</div><div class='ctx'> #define ICE_SMA2_MASK		(ICE_SMA2_UFL2_RX_DIS | ICE_SMA2_DIR_EN | \</div><div class='ctx'> 				 ICE_SMA2_TX_EN)</div><div class='add'>+#define ICE_SMA2_INACTIVE_MASK	(ICE_SMA2_DIR_EN | ICE_SMA2_TX_EN)</div><div class='ctx'> #define ICE_ALL_SMA_MASK	(ICE_SMA1_MASK | ICE_SMA2_MASK)</div><div class='ctx'> </div><div class='ctx'> #define ICE_SMA_MIN_BIT		3</div><div class='hunk'>@@ -789,36 +734,19 @@ static inline bool ice_is_dual(struct ice_hw *hw)</div><div class='ctx'> #define PHY_MAC_XIF_TS_SFD_ENA_M	ICE_M(0x1, 20)</div><div class='ctx'> #define PHY_MAC_XIF_GMII_TS_SEL_M	ICE_M(0x1, 21)</div><div class='ctx'> </div><div class='del'>-/* GPCS config register */</div><div class='del'>-#define PHY_GPCS_CONFIG_REG0		0x268</div><div class='del'>-#define PHY_GPCS_CONFIG_REG0_TX_THR_M	ICE_M(0xF, 24)</div><div class='del'>-#define PHY_GPCS_BITSLIP		0x5C</div><div class='del'>-</div><div class='ctx'> #define PHY_TS_INT_CONFIG_THRESHOLD_M	ICE_M(0x3F, 0)</div><div class='ctx'> #define PHY_TS_INT_CONFIG_ENA_M		BIT(6)</div><div class='ctx'> </div><div class='del'>-/* 1-step PTP config */</div><div class='del'>-#define PHY_PTP_1STEP_CONFIG		0x270</div><div class='del'>-#define PHY_PTP_1STEP_T1S_UP64_M	ICE_M(0xF, 4)</div><div class='del'>-#define PHY_PTP_1STEP_T1S_DELTA_M	ICE_M(0xF, 8)</div><div class='del'>-#define PHY_PTP_1STEP_PEER_DELAY(_port)	(0x274 + 4 * (_port))</div><div class='del'>-#define PHY_PTP_1STEP_PD_ADD_PD_M	ICE_M(0x1, 0)</div><div class='del'>-#define PHY_PTP_1STEP_PD_DELAY_M	ICE_M(0x3fffffff, 1)</div><div class='del'>-#define PHY_PTP_1STEP_PD_DLY_V_M	ICE_M(0x1, 31)</div><div class='del'>-</div><div class='ctx'> /* Macros to derive offsets for TimeStampLow and TimeStampHigh */</div><div class='ctx'> #define PHY_TSTAMP_L(x) (((x) * 8) + 0)</div><div class='ctx'> #define PHY_TSTAMP_U(x) (((x) * 8) + 4)</div><div class='ctx'> </div><div class='del'>-#define PHY_REG_REVISION		0x85000</div><div class='del'>-</div><div class='ctx'> #define PHY_REG_DESKEW_0		0x94</div><div class='ctx'> #define PHY_REG_DESKEW_0_RLEVEL		GENMASK(6, 0)</div><div class='ctx'> #define PHY_REG_DESKEW_0_RLEVEL_FRAC	GENMASK(9, 7)</div><div class='ctx'> #define PHY_REG_DESKEW_0_RLEVEL_FRAC_W	3</div><div class='ctx'> #define PHY_REG_DESKEW_0_VALID		GENMASK(10, 10)</div><div class='ctx'> </div><div class='del'>-#define PHY_REG_GPCS_BITSLIP		0x5C</div><div class='ctx'> #define PHY_REG_SD_BIT_SLIP(_port_offset)	(0x29C + 4 * (_port_offset))</div><div class='ctx'> #define PHY_REVISION_ETH56G		0x10200</div><div class='ctx'> #define PHY_VENDOR_TXLANE_THRESH	0x2000C</div><div class='hunk'>@@ -838,7 +766,21 @@ static inline bool ice_is_dual(struct ice_hw *hw)</div><div class='ctx'> #define PHY_MAC_BLOCKTIME		0x50</div><div class='ctx'> #define PHY_MAC_MARKERTIME		0x54</div><div class='ctx'> #define PHY_MAC_TX_OFFSET		0x58</div><div class='add'>+#define PHY_GPCS_BITSLIP		0x5C</div><div class='ctx'> </div><div class='ctx'> #define PHY_PTP_INT_STATUS		0x7FD140</div><div class='ctx'> </div><div class='add'>+/* ETH56G registers shared per quad */</div><div class='add'>+/* GPCS config register */</div><div class='add'>+#define PHY_GPCS_CONFIG_REG0		0x268</div><div class='add'>+#define PHY_GPCS_CONFIG_REG0_TX_THR_M	GENMASK(27, 24)</div><div class='add'>+/* 1-step PTP config */</div><div class='add'>+#define PHY_PTP_1STEP_CONFIG		0x270</div><div class='add'>+#define PHY_PTP_1STEP_T1S_UP64_M	GENMASK(7, 4)</div><div class='add'>+#define PHY_PTP_1STEP_T1S_DELTA_M	GENMASK(11, 8)</div><div class='add'>+#define PHY_PTP_1STEP_PEER_DELAY(_quad_lane)	(0x274 + 4 * (_quad_lane))</div><div class='add'>+#define PHY_PTP_1STEP_PD_ADD_PD_M	BIT(0)</div><div class='add'>+#define PHY_PTP_1STEP_PD_DELAY_M	GENMASK(30, 1)</div><div class='add'>+#define PHY_PTP_1STEP_PD_DLY_V_M	BIT(31)</div><div class='add'>+</div><div class='ctx'> #endif /* _ICE_PTP_HW_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_repr.c b/drivers/net/ethernet/intel/ice/ice_repr.c<br/>index 970a99a52bf1..cb08746556a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_repr.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_repr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_repr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_repr.c</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> #include "ice.h"</div><div class='ctx'> #include "ice_eswitch.h"</div><div class='ctx'> #include "devlink/devlink.h"</div><div class='del'>-#include "devlink/devlink_port.h"</div><div class='add'>+#include "devlink/port.h"</div><div class='ctx'> #include "ice_sriov.h"</div><div class='ctx'> #include "ice_tc_lib.h"</div><div class='ctx'> #include "ice_dcb_lib.h"</div><div class='hunk'>@@ -219,7 +219,8 @@ ice_repr_setup_tc_cls_flower(struct ice_repr *repr,</div><div class='ctx'> {</div><div class='ctx'> 	switch (flower-&gt;command) {</div><div class='ctx'> 	case FLOW_CLS_REPLACE:</div><div class='del'>-		return ice_add_cls_flower(repr-&gt;netdev, repr-&gt;src_vsi, flower);</div><div class='add'>+		return ice_add_cls_flower(repr-&gt;netdev, repr-&gt;src_vsi, flower,</div><div class='add'>+					  true);</div><div class='ctx'> 	case FLOW_CLS_DESTROY:</div><div class='ctx'> 		return ice_del_cls_flower(repr-&gt;src_vsi, flower);</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -336,6 +337,7 @@ void ice_repr_destroy(struct ice_repr *repr)</div><div class='ctx'> static void ice_repr_rem_vf(struct ice_repr *repr)</div><div class='ctx'> {</div><div class='ctx'> 	ice_eswitch_decfg_vsi(repr-&gt;src_vsi, repr-&gt;parent_mac);</div><div class='add'>+	ice_pass_vf_tx_lldp(repr-&gt;src_vsi, true);</div><div class='ctx'> 	unregister_netdev(repr-&gt;netdev);</div><div class='ctx'> 	ice_devlink_destroy_vf_port(repr-&gt;vf);</div><div class='ctx'> 	ice_virtchnl_set_dflt_ops(repr-&gt;vf);</div><div class='hunk'>@@ -417,6 +419,10 @@ static int ice_repr_add_vf(struct ice_repr *repr)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_netdev;</div><div class='ctx'> </div><div class='add'>+	err = ice_drop_vf_tx_lldp(repr-&gt;src_vsi, true);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_drop_lldp;</div><div class='add'>+</div><div class='ctx'> 	err = ice_eswitch_cfg_vsi(repr-&gt;src_vsi, repr-&gt;parent_mac);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_cfg_vsi;</div><div class='hunk'>@@ -429,6 +435,8 @@ static int ice_repr_add_vf(struct ice_repr *repr)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_cfg_vsi:</div><div class='add'>+	ice_pass_vf_tx_lldp(repr-&gt;src_vsi, true);</div><div class='add'>+err_drop_lldp:</div><div class='ctx'> 	unregister_netdev(repr-&gt;netdev);</div><div class='ctx'> err_netdev:</div><div class='ctx'> 	ice_devlink_destroy_vf_port(vf);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h b/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h<br/>index 3b0054faf70c..21bb861febbf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_sbq_cmd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_sbq_cmd.h</a></div><div class='hunk'>@@ -46,13 +46,11 @@ struct ice_sbq_evt_desc {</div><div class='ctx'> 	u8 data[24];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum ice_sbq_msg_dev {</div><div class='del'>-	eth56g_phy_0	= 0x02,</div><div class='del'>-	rmn_0		= 0x02,</div><div class='del'>-	rmn_1		= 0x03,</div><div class='del'>-	rmn_2		= 0x04,</div><div class='del'>-	cgu		= 0x06,</div><div class='del'>-	eth56g_phy_1	= 0x0D,</div><div class='add'>+enum ice_sbq_dev_id {</div><div class='add'>+	ice_sbq_dev_phy_0	= 0x02,</div><div class='add'>+	ice_sbq_dev_cgu		= 0x06,</div><div class='add'>+	ice_sbq_dev_phy_0_peer	= 0x0D,</div><div class='add'>+	ice_sbq_dev_cgu_peer	= 0x0F,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum ice_sbq_msg_opcode {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_sched.c b/drivers/net/ethernet/intel/ice/ice_sched.c<br/>index 6ca13c5dcb14..fff0c1afdb41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_sched.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_sched.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_sched.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_sched.c</a></div><div class='hunk'>@@ -85,6 +85,27 @@ ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_sched_find_next_vsi_node - find the next node for a given VSI</div><div class='add'>+ * @vsi_node: VSI support node to start search with</div><div class='add'>+ *</div><div class='add'>+ * Return: Next VSI support node, or NULL.</div><div class='add'>+ *</div><div class='add'>+ * The function returns a pointer to the next node from the VSI layer</div><div class='add'>+ * assigned to the given VSI, or NULL if there is no such a node.</div><div class='add'>+ */</div><div class='add'>+static struct ice_sched_node *</div><div class='add'>+ice_sched_find_next_vsi_node(struct ice_sched_node *vsi_node)</div><div class='add'>+{</div><div class='add'>+	unsigned int vsi_handle = vsi_node-&gt;vsi_handle;</div><div class='add'>+</div><div class='add'>+	while ((vsi_node = vsi_node-&gt;sibling) != NULL)</div><div class='add'>+		if (vsi_node-&gt;vsi_handle == vsi_handle)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+	return vsi_node;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='ctx'>  * @cmd_opc: cmd opcode</div><div class='hunk'>@@ -102,13 +123,13 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,</div><div class='ctx'> 			    u16 *elems_resp, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_sched_elem_cmd *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.sched_elem_cmd;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, cmd_opc);</div><div class='ctx'> 	cmd-&gt;num_elem_req = cpu_to_le16(elems_req);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, buf, buf_size, cd);</div><div class='ctx'> 	if (!status &amp;&amp; elems_resp)</div><div class='ctx'> 		*elems_resp = le16_to_cpu(cmd-&gt;num_elem_resp);</div><div class='hunk'>@@ -371,10 +392,10 @@ ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,</div><div class='ctx'> 		     u8 *num_branches, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_topo *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.get_topo;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_dflt_topo);</div><div class='ctx'> 	cmd-&gt;port_num = lport;</div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, buf, buf_size, cd);</div><div class='hunk'>@@ -497,7 +518,7 @@ ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,</div><div class='ctx'> 		       struct ice_aqc_query_txsched_res_resp *buf,</div><div class='ctx'> 		       struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_query_sched_res);</div><div class='ctx'> 	return ice_aq_send_cmd(hw, &amp;desc, buf, buf_size, cd);</div><div class='hunk'>@@ -662,13 +683,13 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,</div><div class='ctx'> 		  u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_rl_profile *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.rl_profile;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, opcode);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> 	cmd-&gt;num_profiles = cpu_to_le16(num_profiles);</div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, buf, buf_size, cd);</div><div class='ctx'> 	if (!status &amp;&amp; num_processed)</div><div class='hunk'>@@ -1084,8 +1105,10 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,</div><div class='ctx'> 		if (parent-&gt;num_children &lt; max_child_nodes) {</div><div class='ctx'> 			new_num_nodes = max_child_nodes - parent-&gt;num_children;</div><div class='ctx'> 		} else {</div><div class='del'>-			/* This parent is full, try the next sibling */</div><div class='del'>-			parent = parent-&gt;sibling;</div><div class='add'>+			/* This parent is full,</div><div class='add'>+			 * try the next available sibling.</div><div class='add'>+			 */</div><div class='add'>+			parent = ice_sched_find_next_vsi_node(parent);</div><div class='ctx'> 			/* Don't modify the first node TEID memory if the</div><div class='ctx'> 			 * first node was added already in the above call.</div><div class='ctx'> 			 * Instead send some temp memory for all other</div><div class='hunk'>@@ -1528,12 +1551,23 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,</div><div class='ctx'> 	/* get the first queue group node from VSI sub-tree */</div><div class='ctx'> 	qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);</div><div class='ctx'> 	while (qgrp_node) {</div><div class='add'>+		struct ice_sched_node *next_vsi_node;</div><div class='add'>+</div><div class='ctx'> 		/* make sure the qgroup node is part of the VSI subtree */</div><div class='ctx'> 		if (ice_sched_find_node_in_subtree(pi-&gt;hw, vsi_node, qgrp_node))</div><div class='ctx'> 			if (qgrp_node-&gt;num_children &lt; max_children &amp;&amp;</div><div class='ctx'> 			    qgrp_node-&gt;owner == owner)</div><div class='ctx'> 				break;</div><div class='ctx'> 		qgrp_node = qgrp_node-&gt;sibling;</div><div class='add'>+		if (qgrp_node)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		next_vsi_node = ice_sched_find_next_vsi_node(vsi_node);</div><div class='add'>+		if (!next_vsi_node)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		vsi_node = next_vsi_node;</div><div class='add'>+		qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Select the best queue group */</div><div class='hunk'>@@ -1604,16 +1638,16 @@ ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,</div><div class='ctx'> /**</div><div class='ctx'>  * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes</div><div class='ctx'>  * @hw: pointer to the HW struct</div><div class='del'>- * @num_qs: number of queues</div><div class='add'>+ * @num_new_qs: number of new queues that will be added to the tree</div><div class='ctx'>  * @num_nodes: num nodes array</div><div class='ctx'>  *</div><div class='ctx'>  * This function calculates the number of VSI child nodes based on the</div><div class='ctx'>  * number of queues.</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)</div><div class='add'>+ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_new_qs, u16 *num_nodes)</div><div class='ctx'> {</div><div class='del'>-	u16 num = num_qs;</div><div class='add'>+	u16 num = num_new_qs;</div><div class='ctx'> 	u8 i, qgl, vsil;</div><div class='ctx'> </div><div class='ctx'> 	qgl = ice_sched_get_qgrp_layer(hw);</div><div class='hunk'>@@ -1779,7 +1813,11 @@ ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,</div><div class='ctx'> 		if (!parent)</div><div class='ctx'> 			return -EIO;</div><div class='ctx'> </div><div class='del'>-		if (i == vsil)</div><div class='add'>+		/* Do not modify the VSI handle for already existing VSI nodes,</div><div class='add'>+		 * (if no new VSI node was added to the tree).</div><div class='add'>+		 * Assign the VSI handle only to newly added VSI nodes.</div><div class='add'>+		 */</div><div class='add'>+		if (i == vsil &amp;&amp; num_added)</div><div class='ctx'> 			parent-&gt;vsi_handle = vsi_handle;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1813,6 +1851,41 @@ ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_sched_recalc_vsi_support_nodes - recalculate VSI support nodes count</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @vsi_node: pointer to the leftmost VSI node that needs to be extended</div><div class='add'>+ * @new_numqs: new number of queues that has to be handled by the VSI</div><div class='add'>+ * @new_num_nodes: pointer to nodes count table to modify the VSI layer entry</div><div class='add'>+ *</div><div class='add'>+ * This function recalculates the number of supported nodes that need to</div><div class='add'>+ * be added after adding more Tx queues for a given VSI.</div><div class='add'>+ * The number of new VSI support nodes that shall be added will be saved</div><div class='add'>+ * to the @new_num_nodes table for the VSI layer.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+ice_sched_recalc_vsi_support_nodes(struct ice_hw *hw,</div><div class='add'>+				   struct ice_sched_node *vsi_node,</div><div class='add'>+				   unsigned int new_numqs, u16 *new_num_nodes)</div><div class='add'>+{</div><div class='add'>+	u32 vsi_nodes_cnt = 1;</div><div class='add'>+	u32 max_queue_cnt = 1;</div><div class='add'>+	u32 qgl, vsil;</div><div class='add'>+</div><div class='add'>+	qgl = ice_sched_get_qgrp_layer(hw);</div><div class='add'>+	vsil = ice_sched_get_vsi_layer(hw);</div><div class='add'>+</div><div class='add'>+	for (u32 i = vsil; i &lt;= qgl; i++)</div><div class='add'>+		max_queue_cnt *= hw-&gt;max_children[i];</div><div class='add'>+</div><div class='add'>+	while ((vsi_node = ice_sched_find_next_vsi_node(vsi_node)) != NULL)</div><div class='add'>+		vsi_nodes_cnt++;</div><div class='add'>+</div><div class='add'>+	if (new_numqs &gt; (max_queue_cnt * vsi_nodes_cnt))</div><div class='add'>+		new_num_nodes[vsil] = DIV_ROUND_UP(new_numqs, max_queue_cnt) -</div><div class='add'>+				      vsi_nodes_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_sched_update_vsi_child_nodes - update VSI child nodes</div><div class='ctx'>  * @pi: port information structure</div><div class='ctx'>  * @vsi_handle: software VSI handle</div><div class='hunk'>@@ -1863,15 +1936,25 @@ ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,</div><div class='ctx'> 			return status;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (new_numqs)</div><div class='del'>-		ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);</div><div class='del'>-	/* Keep the max number of queue configuration all the time. Update the</div><div class='del'>-	 * tree only if number of queues &gt; previous number of queues. This may</div><div class='add'>+	ice_sched_recalc_vsi_support_nodes(hw, vsi_node,</div><div class='add'>+					   new_numqs, new_num_nodes);</div><div class='add'>+	ice_sched_calc_vsi_child_nodes(hw, new_numqs - prev_numqs,</div><div class='add'>+				       new_num_nodes);</div><div class='add'>+</div><div class='add'>+	/* Never decrease the number of queues in the tree. Update the tree</div><div class='add'>+	 * only if number of queues &gt; previous number of queues. This may</div><div class='ctx'> 	 * leave some extra nodes in the tree if number of queues &lt; previous</div><div class='ctx'> 	 * number but that wouldn't harm anything. Removing those extra nodes</div><div class='ctx'> 	 * may complicate the code if those nodes are part of SRL or</div><div class='ctx'> 	 * individually rate limited.</div><div class='add'>+	 * Also, add the required VSI support nodes if the existing ones cannot</div><div class='add'>+	 * handle the requested new number of queues.</div><div class='ctx'> 	 */</div><div class='add'>+	status = ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,</div><div class='add'>+						 new_num_nodes);</div><div class='add'>+	if (status)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='ctx'> 	status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,</div><div class='ctx'> 					       new_num_nodes, owner);</div><div class='ctx'> 	if (status)</div><div class='hunk'>@@ -2013,6 +2096,58 @@ static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_sched_rm_vsi_subtree - remove all nodes assigned to a given VSI</div><div class='add'>+ * @pi: port information structure</div><div class='add'>+ * @vsi_node: pointer to the leftmost node of the VSI to be removed</div><div class='add'>+ * @owner: LAN or RDMA</div><div class='add'>+ * @tc: TC number</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero in case of success, or -EBUSY if the VSI has leaf nodes in TC.</div><div class='add'>+ *</div><div class='add'>+ * This function removes all the VSI support nodes associated with a given VSI</div><div class='add'>+ * and its LAN or RDMA children nodes from the scheduler tree.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_sched_rm_vsi_subtree(struct ice_port_info *pi,</div><div class='add'>+			 struct ice_sched_node *vsi_node, u8 owner, u8 tc)</div><div class='add'>+{</div><div class='add'>+	u16 vsi_handle = vsi_node-&gt;vsi_handle;</div><div class='add'>+	bool all_vsi_nodes_removed = true;</div><div class='add'>+	int j = 0;</div><div class='add'>+</div><div class='add'>+	while (vsi_node) {</div><div class='add'>+		struct ice_sched_node *next_vsi_node;</div><div class='add'>+</div><div class='add'>+		if (ice_sched_is_leaf_node_present(vsi_node)) {</div><div class='add'>+			ice_debug(pi-&gt;hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", tc);</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+		while (j &lt; vsi_node-&gt;num_children) {</div><div class='add'>+			if (vsi_node-&gt;children[j]-&gt;owner == owner)</div><div class='add'>+				ice_free_sched_node(pi, vsi_node-&gt;children[j]);</div><div class='add'>+			else</div><div class='add'>+				j++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		next_vsi_node = ice_sched_find_next_vsi_node(vsi_node);</div><div class='add'>+</div><div class='add'>+		/* remove the VSI if it has no children */</div><div class='add'>+		if (!vsi_node-&gt;num_children)</div><div class='add'>+			ice_free_sched_node(pi, vsi_node);</div><div class='add'>+		else</div><div class='add'>+			all_vsi_nodes_removed = false;</div><div class='add'>+</div><div class='add'>+		vsi_node = next_vsi_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* clean up aggregator related VSI info if any */</div><div class='add'>+	if (all_vsi_nodes_removed)</div><div class='add'>+		ice_sched_rm_agg_vsi_info(pi, vsi_handle);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes</div><div class='ctx'>  * @pi: port information structure</div><div class='ctx'>  * @vsi_handle: software VSI handle</div><div class='hunk'>@@ -2038,7 +2173,6 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)</div><div class='ctx'> </div><div class='ctx'> 	ice_for_each_traffic_class(i) {</div><div class='ctx'> 		struct ice_sched_node *vsi_node, *tc_node;</div><div class='del'>-		u8 j = 0;</div><div class='ctx'> </div><div class='ctx'> 		tc_node = ice_sched_get_tc_node(pi, i);</div><div class='ctx'> 		if (!tc_node)</div><div class='hunk'>@@ -2048,31 +2182,12 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)</div><div class='ctx'> 		if (!vsi_node)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (ice_sched_is_leaf_node_present(vsi_node)) {</div><div class='del'>-			ice_debug(pi-&gt;hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i);</div><div class='del'>-			status = -EBUSY;</div><div class='add'>+		status = ice_sched_rm_vsi_subtree(pi, vsi_node, owner, i);</div><div class='add'>+		if (status)</div><div class='ctx'> 			goto exit_sched_rm_vsi_cfg;</div><div class='del'>-		}</div><div class='del'>-		while (j &lt; vsi_node-&gt;num_children) {</div><div class='del'>-			if (vsi_node-&gt;children[j]-&gt;owner == owner) {</div><div class='del'>-				ice_free_sched_node(pi, vsi_node-&gt;children[j]);</div><div class='ctx'> </div><div class='del'>-				/* reset the counter again since the num</div><div class='del'>-				 * children will be updated after node removal</div><div class='del'>-				 */</div><div class='del'>-				j = 0;</div><div class='del'>-			} else {</div><div class='del'>-				j++;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		/* remove the VSI if it has no children */</div><div class='del'>-		if (!vsi_node-&gt;num_children) {</div><div class='del'>-			ice_free_sched_node(pi, vsi_node);</div><div class='del'>-			vsi_ctx-&gt;sched.vsi_node[i] = NULL;</div><div class='add'>+		vsi_ctx-&gt;sched.vsi_node[i] = NULL;</div><div class='ctx'> </div><div class='del'>-			/* clean up aggregator related VSI info if any */</div><div class='del'>-			ice_sched_rm_agg_vsi_info(pi, vsi_handle);</div><div class='del'>-		}</div><div class='ctx'> 		if (owner == ICE_SCHED_NODE_OWNER_LAN)</div><div class='ctx'> 			vsi_ctx-&gt;sched.max_lanq[i] = 0;</div><div class='ctx'> 		else</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_sf_eth.c b/drivers/net/ethernet/intel/ice/ice_sf_eth.c<br/>index 75d7147e1c01..1a2c94375ca7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_sf_eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_sf_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_sf_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_sf_eth.c</a></div><div class='hunk'>@@ -5,8 +5,8 @@</div><div class='ctx'> #include "ice_txrx.h"</div><div class='ctx'> #include "ice_fltr.h"</div><div class='ctx'> #include "ice_sf_eth.h"</div><div class='del'>-#include "devlink/devlink_port.h"</div><div class='ctx'> #include "devlink/devlink.h"</div><div class='add'>+#include "devlink/port.h"</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops ice_sf_netdev_ops = {</div><div class='ctx'> 	.ndo_open = ice_open,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_sriov.c b/drivers/net/ethernet/intel/ice/ice_sriov.c<br/>index b83f99c01d91..6b1126ddb561 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_sriov.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_sriov.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_sriov.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_sriov.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include "ice_dcb_lib.h"</div><div class='ctx'> #include "ice_flow.h"</div><div class='ctx'> #include "ice_eswitch.h"</div><div class='del'>-#include "ice_virtchnl_allowlist.h"</div><div class='add'>+#include "virt/allowlist.h"</div><div class='ctx'> #include "ice_flex_pipe.h"</div><div class='ctx'> #include "ice_vf_vsi_vlan_ops.h"</div><div class='ctx'> #include "ice_vlan.h"</div><div class='hunk'>@@ -36,6 +36,7 @@ static void ice_free_vf_entries(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 	hash_for_each_safe(vfs-&gt;table, bkt, tmp, vf, entry) {</div><div class='ctx'> 		hash_del_rcu(&amp;vf-&gt;entry);</div><div class='add'>+		ice_deinitialize_vf_entry(vf);</div><div class='ctx'> 		ice_put_vf(vf);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -62,6 +63,7 @@ static void ice_free_vf_res(struct ice_vf *vf)</div><div class='ctx'> 	if (vf-&gt;lan_vsi_idx != ICE_NO_VSI) {</div><div class='ctx'> 		ice_vf_vsi_release(vf);</div><div class='ctx'> 		vf-&gt;num_mac = 0;</div><div class='add'>+		vf-&gt;num_mac_lldp = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	last_vector_idx = vf-&gt;first_vector_idx + vf-&gt;num_msix - 1;</div><div class='hunk'>@@ -123,27 +125,6 @@ static void ice_dis_vf_mappings(struct ice_vf *vf)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_sriov_free_msix_res - Reset/free any used MSIX resources</div><div class='del'>- * @pf: pointer to the PF structure</div><div class='del'>- *</div><div class='del'>- * Since no MSIX entries are taken from the pf-&gt;irq_tracker then just clear</div><div class='del'>- * the pf-&gt;sriov_base_vector.</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, and -EINVAL on error.</div><div class='del'>- */</div><div class='del'>-static int ice_sriov_free_msix_res(struct ice_pf *pf)</div><div class='del'>-{</div><div class='del'>-	if (!pf)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	bitmap_free(pf-&gt;sriov_irq_bm);</div><div class='del'>-	pf-&gt;sriov_irq_size = 0;</div><div class='del'>-	pf-&gt;sriov_base_vector = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_free_vfs - Free all VFs</div><div class='ctx'>  * @pf: pointer to the PF structure</div><div class='ctx'>  */</div><div class='hunk'>@@ -177,6 +158,7 @@ void ice_free_vfs(struct ice_pf *pf)</div><div class='ctx'> </div><div class='ctx'> 		ice_eswitch_detach_vf(pf, vf);</div><div class='ctx'> 		ice_dis_vf_qs(vf);</div><div class='add'>+		ice_virt_free_irqs(pf, vf-&gt;first_vector_idx, vf-&gt;num_msix);</div><div class='ctx'> </div><div class='ctx'> 		if (test_bit(ICE_VF_STATE_INIT, vf-&gt;vf_states)) {</div><div class='ctx'> 			/* disable VF qp mappings and set VF disable state */</div><div class='hunk'>@@ -193,16 +175,9 @@ void ice_free_vfs(struct ice_pf *pf)</div><div class='ctx'> 			wr32(hw, GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* clear malicious info since the VF is getting released */</div><div class='del'>-		if (!ice_is_feature_supported(pf, ICE_F_MBX_LIMIT))</div><div class='del'>-			list_del(&amp;vf-&gt;mbx_info.list_entry);</div><div class='del'>-</div><div class='ctx'> 		mutex_unlock(&amp;vf-&gt;cfg_lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ice_sriov_free_msix_res(pf))</div><div class='del'>-		dev_err(dev, "Failed to free MSIX resources used by SR-IOV\n");</div><div class='del'>-</div><div class='ctx'> 	vfs-&gt;num_qps_per = 0;</div><div class='ctx'> 	ice_free_vf_entries(pf);</div><div class='ctx'> </div><div class='hunk'>@@ -372,40 +347,6 @@ void ice_calc_vf_reg_idx(struct ice_vf *vf, struct ice_q_vector *q_vector)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_sriov_set_msix_res - Set any used MSIX resources</div><div class='del'>- * @pf: pointer to PF structure</div><div class='del'>- * @num_msix_needed: number of MSIX vectors needed for all SR-IOV VFs</div><div class='del'>- *</div><div class='del'>- * This function allows SR-IOV resources to be taken from the end of the PF's</div><div class='del'>- * allowed HW MSIX vectors so that the irq_tracker will not be affected. We</div><div class='del'>- * just set the pf-&gt;sriov_base_vector and return success.</div><div class='del'>- *</div><div class='del'>- * If there are not enough resources available, return an error. This should</div><div class='del'>- * always be caught by ice_set_per_vf_res().</div><div class='del'>- *</div><div class='del'>- * Return 0 on success, and -EINVAL when there are not enough MSIX vectors</div><div class='del'>- * in the PF's space available for SR-IOV.</div><div class='del'>- */</div><div class='del'>-static int ice_sriov_set_msix_res(struct ice_pf *pf, u16 num_msix_needed)</div><div class='del'>-{</div><div class='del'>-	u16 total_vectors = pf-&gt;hw.func_caps.common_cap.num_msix_vectors;</div><div class='del'>-	int vectors_used = ice_get_max_used_msix_vector(pf);</div><div class='del'>-	int sriov_base_vector;</div><div class='del'>-</div><div class='del'>-	sriov_base_vector = total_vectors - num_msix_needed;</div><div class='del'>-</div><div class='del'>-	/* make sure we only grab irq_tracker entries from the list end and</div><div class='del'>-	 * that we have enough available MSIX vectors</div><div class='del'>-	 */</div><div class='del'>-	if (sriov_base_vector &lt; vectors_used)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	pf-&gt;sriov_base_vector = sriov_base_vector;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_set_per_vf_res - check if vectors and queues are available</div><div class='ctx'>  * @pf: pointer to the PF structure</div><div class='ctx'>  * @num_vfs: the number of SR-IOV VFs being configured</div><div class='hunk'>@@ -429,11 +370,9 @@ static int ice_sriov_set_msix_res(struct ice_pf *pf, u16 num_msix_needed)</div><div class='ctx'>  */</div><div class='ctx'> static int ice_set_per_vf_res(struct ice_pf *pf, u16 num_vfs)</div><div class='ctx'> {</div><div class='del'>-	int vectors_used = ice_get_max_used_msix_vector(pf);</div><div class='ctx'> 	u16 num_msix_per_vf, num_txq, num_rxq, avail_qs;</div><div class='ctx'> 	int msix_avail_per_vf, msix_avail_for_sriov;</div><div class='ctx'> 	struct device *dev = ice_pf_to_dev(pf);</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;pf-&gt;vfs.table_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -441,8 +380,7 @@ static int ice_set_per_vf_res(struct ice_pf *pf, u16 num_vfs)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* determine MSI-X resources per VF */</div><div class='del'>-	msix_avail_for_sriov = pf-&gt;hw.func_caps.common_cap.num_msix_vectors -</div><div class='del'>-		vectors_used;</div><div class='add'>+	msix_avail_for_sriov = pf-&gt;virt_irq_tracker.num_entries;</div><div class='ctx'> 	msix_avail_per_vf = msix_avail_for_sriov / num_vfs;</div><div class='ctx'> 	if (msix_avail_per_vf &gt;= ICE_NUM_VF_MSIX_MED) {</div><div class='ctx'> 		num_msix_per_vf = ICE_NUM_VF_MSIX_MED;</div><div class='hunk'>@@ -481,13 +419,6 @@ static int ice_set_per_vf_res(struct ice_pf *pf, u16 num_vfs)</div><div class='ctx'> 		return -ENOSPC;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = ice_sriov_set_msix_res(pf, num_msix_per_vf * num_vfs);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "Unable to set MSI-X resources for %d VFs, err %d\n",</div><div class='del'>-			num_vfs, err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* only allow equal Tx/Rx queue count (i.e. queue pairs) */</div><div class='ctx'> 	pf-&gt;vfs.num_qps_per = min_t(int, num_txq, num_rxq);</div><div class='ctx'> 	pf-&gt;vfs.num_msix_per = num_msix_per_vf;</div><div class='hunk'>@@ -498,52 +429,6 @@ static int ice_set_per_vf_res(struct ice_pf *pf, u16 num_vfs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_sriov_get_irqs - get irqs for SR-IOV usacase</div><div class='del'>- * @pf: pointer to PF structure</div><div class='del'>- * @needed: number of irqs to get</div><div class='del'>- *</div><div class='del'>- * This returns the first MSI-X vector index in PF space that is used by this</div><div class='del'>- * VF. This index is used when accessing PF relative registers such as</div><div class='del'>- * GLINT_VECT2FUNC and GLINT_DYN_CTL.</div><div class='del'>- * This will always be the OICR index in the AVF driver so any functionality</div><div class='del'>- * using vf-&gt;first_vector_idx for queue configuration_id: id of VF which will</div><div class='del'>- * use this irqs</div><div class='del'>- *</div><div class='del'>- * Only SRIOV specific vectors are tracked in sriov_irq_bm. SRIOV vectors are</div><div class='del'>- * allocated from the end of global irq index. First bit in sriov_irq_bm means</div><div class='del'>- * last irq index etc. It simplifies extension of SRIOV vectors.</div><div class='del'>- * They will be always located from sriov_base_vector to the last irq</div><div class='del'>- * index. While increasing/decreasing sriov_base_vector can be moved.</div><div class='del'>- */</div><div class='del'>-static int ice_sriov_get_irqs(struct ice_pf *pf, u16 needed)</div><div class='del'>-{</div><div class='del'>-	int res = bitmap_find_next_zero_area(pf-&gt;sriov_irq_bm,</div><div class='del'>-					     pf-&gt;sriov_irq_size, 0, needed, 0);</div><div class='del'>-	/* conversion from number in bitmap to global irq index */</div><div class='del'>-	int index = pf-&gt;sriov_irq_size - res - needed;</div><div class='del'>-</div><div class='del'>-	if (res &gt;= pf-&gt;sriov_irq_size || index &lt; pf-&gt;sriov_base_vector)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	bitmap_set(pf-&gt;sriov_irq_bm, res, needed);</div><div class='del'>-	return index;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_sriov_free_irqs - free irqs used by the VF</div><div class='del'>- * @pf: pointer to PF structure</div><div class='del'>- * @vf: pointer to VF structure</div><div class='del'>- */</div><div class='del'>-static void ice_sriov_free_irqs(struct ice_pf *pf, struct ice_vf *vf)</div><div class='del'>-{</div><div class='del'>-	/* Move back from first vector index to first index in bitmap */</div><div class='del'>-	int bm_i = pf-&gt;sriov_irq_size - vf-&gt;first_vector_idx - vf-&gt;num_msix;</div><div class='del'>-</div><div class='del'>-	bitmap_clear(pf-&gt;sriov_irq_bm, bm_i, vf-&gt;num_msix);</div><div class='del'>-	vf-&gt;first_vector_idx = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_init_vf_vsi_res - initialize/setup VF VSI resources</div><div class='ctx'>  * @vf: VF to initialize/setup the VSI for</div><div class='ctx'>  *</div><div class='hunk'>@@ -556,7 +441,7 @@ static int ice_init_vf_vsi_res(struct ice_vf *vf)</div><div class='ctx'> 	struct ice_vsi *vsi;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	vf-&gt;first_vector_idx = ice_sriov_get_irqs(pf, vf-&gt;num_msix);</div><div class='add'>+	vf-&gt;first_vector_idx = ice_virt_get_irqs(pf, vf-&gt;num_msix);</div><div class='ctx'> 	if (vf-&gt;first_vector_idx &lt; 0)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -856,16 +741,10 @@ err_free_entries:</div><div class='ctx'>  */</div><div class='ctx'> static int ice_ena_vfs(struct ice_pf *pf, u16 num_vfs)</div><div class='ctx'> {</div><div class='del'>-	int total_vectors = pf-&gt;hw.func_caps.common_cap.num_msix_vectors;</div><div class='ctx'> 	struct device *dev = ice_pf_to_dev(pf);</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	pf-&gt;sriov_irq_bm = bitmap_zalloc(total_vectors, GFP_KERNEL);</div><div class='del'>-	if (!pf-&gt;sriov_irq_bm)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	pf-&gt;sriov_irq_size = total_vectors;</div><div class='del'>-</div><div class='ctx'> 	/* Disable global interrupt 0 so we don't try to handle the VFLR. */</div><div class='ctx'> 	wr32(hw, GLINT_DYN_CTL(pf-&gt;oicr_irq.index),</div><div class='ctx'> 	     ICE_ITR_NONE &lt;&lt; GLINT_DYN_CTL_ITR_INDX_S);</div><div class='hunk'>@@ -918,7 +797,6 @@ err_unroll_intr:</div><div class='ctx'> 	/* rearm interrupts here */</div><div class='ctx'> 	ice_irq_dynamic_ena(hw, NULL, NULL);</div><div class='ctx'> 	clear_bit(ICE_OICR_INTR_DIS, pf-&gt;state);</div><div class='del'>-	bitmap_free(pf-&gt;sriov_irq_bm);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -992,16 +870,7 @@ u32 ice_sriov_get_vf_total_msix(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = pci_get_drvdata(pdev);</div><div class='ctx'> </div><div class='del'>-	return pf-&gt;sriov_irq_size - ice_get_max_used_msix_vector(pf);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ice_sriov_move_base_vector(struct ice_pf *pf, int move)</div><div class='del'>-{</div><div class='del'>-	if (pf-&gt;sriov_base_vector - move &lt; ice_get_max_used_msix_vector(pf))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	pf-&gt;sriov_base_vector -= move;</div><div class='del'>-	return 0;</div><div class='add'>+	return pf-&gt;virt_irq_tracker.num_entries;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ice_sriov_remap_vectors(struct ice_pf *pf, u16 restricted_id)</div><div class='hunk'>@@ -1020,7 +889,8 @@ static void ice_sriov_remap_vectors(struct ice_pf *pf, u16 restricted_id)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		ice_dis_vf_mappings(tmp_vf);</div><div class='del'>-		ice_sriov_free_irqs(pf, tmp_vf);</div><div class='add'>+		ice_virt_free_irqs(pf, tmp_vf-&gt;first_vector_idx,</div><div class='add'>+				   tmp_vf-&gt;num_msix);</div><div class='ctx'> </div><div class='ctx'> 		vf_ids[to_remap] = tmp_vf-&gt;vf_id;</div><div class='ctx'> 		to_remap += 1;</div><div class='hunk'>@@ -1032,7 +902,7 @@ static void ice_sriov_remap_vectors(struct ice_pf *pf, u16 restricted_id)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		tmp_vf-&gt;first_vector_idx =</div><div class='del'>-			ice_sriov_get_irqs(pf, tmp_vf-&gt;num_msix);</div><div class='add'>+			ice_virt_get_irqs(pf, tmp_vf-&gt;num_msix);</div><div class='ctx'> 		/* there is no need to rebuild VSI as we are only changing the</div><div class='ctx'> 		 * vector indexes not amount of MSI-X or queues</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -1063,7 +933,6 @@ int ice_sriov_set_msix_vec_count(struct pci_dev *vf_dev, int msix_vec_count)</div><div class='ctx'> 	bool needs_rebuild = false;</div><div class='ctx'> 	struct ice_vsi *vsi;</div><div class='ctx'> 	struct ice_vf *vf;</div><div class='del'>-	int id;</div><div class='ctx'> </div><div class='ctx'> 	if (!ice_get_num_vfs(pf))</div><div class='ctx'> 		return -ENOENT;</div><div class='hunk'>@@ -1082,17 +951,7 @@ int ice_sriov_set_msix_vec_count(struct pci_dev *vf_dev, int msix_vec_count)</div><div class='ctx'> 	if (msix_vec_count &lt; ICE_MIN_INTR_PER_VF)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* Transition of PCI VF function number to function_id */</div><div class='del'>-	for (id = 0; id &lt; pci_num_vf(pdev); id++) {</div><div class='del'>-		if (vf_dev-&gt;devfn == pci_iov_virtfn_devfn(pdev, id))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (id == pci_num_vf(pdev))</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	vf = ice_get_vf_by_id(pf, id);</div><div class='del'>-</div><div class='add'>+	vf = ice_get_vf_by_dev(pf, vf_dev);</div><div class='ctx'> 	if (!vf)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='hunk'>@@ -1102,23 +961,24 @@ int ice_sriov_set_msix_vec_count(struct pci_dev *vf_dev, int msix_vec_count)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	prev_msix = vf-&gt;num_msix;</div><div class='del'>-	prev_queues = vf-&gt;num_vf_qs;</div><div class='del'>-</div><div class='del'>-	if (ice_sriov_move_base_vector(pf, msix_vec_count - prev_msix)) {</div><div class='add'>+	/* No need to rebuild if we're setting to the same value */</div><div class='add'>+	if (msix_vec_count == vf-&gt;num_msix) {</div><div class='ctx'> 		ice_put_vf(vf);</div><div class='del'>-		return -ENOSPC;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	prev_msix = vf-&gt;num_msix;</div><div class='add'>+	prev_queues = vf-&gt;num_vf_qs;</div><div class='add'>+</div><div class='ctx'> 	ice_dis_vf_mappings(vf);</div><div class='del'>-	ice_sriov_free_irqs(pf, vf);</div><div class='add'>+	ice_virt_free_irqs(pf, vf-&gt;first_vector_idx, vf-&gt;num_msix);</div><div class='ctx'> </div><div class='ctx'> 	/* Remap all VFs beside the one is now configured */</div><div class='ctx'> 	ice_sriov_remap_vectors(pf, vf-&gt;vf_id);</div><div class='ctx'> </div><div class='ctx'> 	vf-&gt;num_msix = msix_vec_count;</div><div class='ctx'> 	vf-&gt;num_vf_qs = queues;</div><div class='del'>-	vf-&gt;first_vector_idx = ice_sriov_get_irqs(pf, vf-&gt;num_msix);</div><div class='add'>+	vf-&gt;first_vector_idx = ice_virt_get_irqs(pf, vf-&gt;num_msix);</div><div class='ctx'> 	if (vf-&gt;first_vector_idx &lt; 0)</div><div class='ctx'> 		goto unroll;</div><div class='ctx'> </div><div class='hunk'>@@ -1147,7 +1007,8 @@ unroll:</div><div class='ctx'> </div><div class='ctx'> 	vf-&gt;num_msix = prev_msix;</div><div class='ctx'> 	vf-&gt;num_vf_qs = prev_queues;</div><div class='del'>-	vf-&gt;first_vector_idx = ice_sriov_get_irqs(pf, vf-&gt;num_msix);</div><div class='add'>+</div><div class='add'>+	vf-&gt;first_vector_idx = ice_virt_get_irqs(pf, vf-&gt;num_msix);</div><div class='ctx'> 	if (vf-&gt;first_vector_idx &lt; 0) {</div><div class='ctx'> 		ice_put_vf(vf);</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1300,10 +1161,12 @@ static u32 ice_globalq_to_pfq(struct ice_pf *pf, u32 globalq)</div><div class='ctx'> void</div><div class='ctx'> ice_vf_lan_overflow_event(struct ice_pf *pf, struct ice_rq_event_info *event)</div><div class='ctx'> {</div><div class='add'>+	struct ice_aqc_event_lan_overflow *cmd;</div><div class='ctx'> 	u32 gldcb_rtctq, queue;</div><div class='ctx'> 	struct ice_vf *vf;</div><div class='ctx'> </div><div class='del'>-	gldcb_rtctq = le32_to_cpu(event-&gt;desc.params.lan_overflow.prtdcb_ruptq);</div><div class='add'>+	cmd = libie_aq_raw(&amp;event-&gt;desc);</div><div class='add'>+	gldcb_rtctq = le32_to_cpu(cmd-&gt;prtdcb_ruptq);</div><div class='ctx'> 	dev_dbg(ice_pf_to_dev(pf), "GLDCB_RTCTQ: 0x%08x\n", gldcb_rtctq);</div><div class='ctx'> </div><div class='ctx'> 	/* event returns device global Rx queue number */</div><div class='hunk'>@@ -1327,8 +1190,7 @@ ice_vf_lan_overflow_event(struct ice_pf *pf, struct ice_rq_event_info *event)</div><div class='ctx'>  */</div><div class='ctx'> int ice_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool ena)</div><div class='ctx'> {</div><div class='del'>-	struct ice_netdev_priv *np = netdev_priv(netdev);</div><div class='del'>-	struct ice_pf *pf = np-&gt;vsi-&gt;back;</div><div class='add'>+	struct ice_pf *pf = ice_netdev_to_pf(netdev);</div><div class='ctx'> 	struct ice_vsi *vf_vsi;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct ice_vf *vf;</div><div class='hunk'>@@ -1537,6 +1399,9 @@ int ice_set_vf_trust(struct net_device *netdev, int vf_id, bool trusted)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;vf-&gt;cfg_lock);</div><div class='ctx'> </div><div class='add'>+	while (!trusted &amp;&amp; vf-&gt;num_mac_lldp)</div><div class='add'>+		ice_vf_update_mac_lldp_num(vf, ice_get_vf_vsi(vf), false);</div><div class='add'>+</div><div class='ctx'> 	vf-&gt;trusted = trusted;</div><div class='ctx'> 	ice_reset_vf(vf, ICE_VF_RESET_NOTIFY);</div><div class='ctx'> 	dev_info(ice_pf_to_dev(pf), "VF %u is now %strusted\n",</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_sriov.h b/drivers/net/ethernet/intel/ice/ice_sriov.h<br/>index 96549ca5c52c..6c4fad09a527 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_sriov.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_sriov.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_sriov.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_sriov.h</a></div><div class='hunk'>@@ -3,9 +3,9 @@</div><div class='ctx'> </div><div class='ctx'> #ifndef _ICE_SRIOV_H_</div><div class='ctx'> #define _ICE_SRIOV_H_</div><div class='del'>-#include "ice_virtchnl_fdir.h"</div><div class='add'>+#include "virt/fdir.h"</div><div class='ctx'> #include "ice_vf_lib.h"</div><div class='del'>-#include "ice_virtchnl.h"</div><div class='add'>+#include "virt/virtchnl.h"</div><div class='ctx'> </div><div class='ctx'> /* Static VF transaction/status register def */</div><div class='ctx'> #define VF_DEVICE_STATUS		0xAA</div><div class='hunk'>@@ -64,6 +64,7 @@ bool</div><div class='ctx'> ice_vc_validate_pattern(struct ice_vf *vf, struct virtchnl_proto_hdrs *proto);</div><div class='ctx'> u32 ice_sriov_get_vf_total_msix(struct pci_dev *pdev);</div><div class='ctx'> int ice_sriov_set_msix_vec_count(struct pci_dev *vf_dev, int msix_vec_count);</div><div class='add'>+int ice_vf_vsi_dis_single_txq(struct ice_vf *vf, struct ice_vsi *vsi, u16 q_id);</div><div class='ctx'> #else /* CONFIG_PCI_IOV */</div><div class='ctx'> static inline void ice_process_vflr_event(struct ice_pf *pf) { }</div><div class='ctx'> static inline void ice_free_vfs(struct ice_pf *pf) { }</div><div class='hunk'>@@ -164,5 +165,11 @@ ice_sriov_set_msix_vec_count(struct pci_dev *vf_dev, int msix_vec_count)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline int ice_vf_vsi_dis_single_txq(struct ice_vf *vf,</div><div class='add'>+					    struct ice_vsi *vsi, u16 q_id)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='ctx'> #endif /* CONFIG_PCI_IOV */</div><div class='ctx'> #endif /* _ICE_SRIOV_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_switch.c b/drivers/net/ethernet/intel/ice/ice_switch.c<br/>index 0e740342e294..84848f0123e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_switch.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_switch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_switch.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_switch.c</a></div><div class='hunk'>@@ -1511,11 +1511,11 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp_elem *buf,</div><div class='ctx'> 		  struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_get_sw_cfg *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_sw_cfg);</div><div class='del'>-	cmd = &amp;desc.params.get_sw_conf;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;element = cpu_to_le16(*req_desc);</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, buf, buf_size, cd);</div><div class='hunk'>@@ -1541,11 +1541,11 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_add_update_free_vsi_resp *res;</div><div class='ctx'> 	struct ice_aqc_add_get_update_free_vsi *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.vsi_cmd;</div><div class='del'>-	res = &amp;desc.params.add_update_free_vsi_res;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	res = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_add_vsi);</div><div class='ctx'> </div><div class='hunk'>@@ -1556,7 +1556,7 @@ ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;vsi_flags = cpu_to_le16(vsi_ctx-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, &amp;vsi_ctx-&gt;info,</div><div class='ctx'> 				 sizeof(vsi_ctx-&gt;info), cd);</div><div class='hunk'>@@ -1585,11 +1585,11 @@ ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_add_update_free_vsi_resp *resp;</div><div class='ctx'> 	struct ice_aqc_add_get_update_free_vsi *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.vsi_cmd;</div><div class='del'>-	resp = &amp;desc.params.add_update_free_vsi_res;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_free_vsi);</div><div class='ctx'> </div><div class='hunk'>@@ -1620,17 +1620,17 @@ ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_add_update_free_vsi_resp *resp;</div><div class='ctx'> 	struct ice_aqc_add_get_update_free_vsi *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.vsi_cmd;</div><div class='del'>-	resp = &amp;desc.params.add_update_free_vsi_res;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_update_vsi);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;vsi_num = cpu_to_le16(vsi_ctx-&gt;vsi_num | ICE_AQ_VSI_IS_VALID);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, &amp;vsi_ctx-&gt;info,</div><div class='ctx'> 				 sizeof(vsi_ctx-&gt;info), cd);</div><div class='hunk'>@@ -1944,7 +1944,8 @@ int</div><div class='ctx'> ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,</div><div class='ctx'> 		u8 num_rules, enum ice_adminq_opc opc, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct ice_aqc_sw_rules *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (opc != ice_aqc_opc_add_sw_rules &amp;&amp;</div><div class='hunk'>@@ -1953,13 +1954,13 @@ ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, opc);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> </div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='del'>-	desc.params.sw_rules.num_rules_fltr_entry_index =</div><div class='del'>-		cpu_to_le16(num_rules);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='add'>+	cmd-&gt;num_rules_fltr_entry_index = cpu_to_le16(num_rules);</div><div class='ctx'> 	status = ice_aq_send_cmd(hw, &amp;desc, rule_list, rule_list_sz, cd);</div><div class='ctx'> 	if (opc != ice_aqc_opc_add_sw_rules &amp;&amp;</div><div class='del'>-	    hw-&gt;adminq.sq_last_status == ICE_AQ_RC_ENOENT)</div><div class='add'>+	    hw-&gt;adminq.sq_last_status == LIBIE_AQ_RC_ENOENT)</div><div class='ctx'> 		status = -ENOENT;</div><div class='ctx'> </div><div class='ctx'> 	if (!status) {</div><div class='hunk'>@@ -1989,14 +1990,14 @@ ice_aq_add_recipe(struct ice_hw *hw,</div><div class='ctx'> 		  u16 num_recipes, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_add_get_recipe *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buf_size;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.add_get_recipe;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_add_recipe);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;num_sub_recipes = cpu_to_le16(num_recipes);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	buf_size = num_recipes * sizeof(*s_recipe_list);</div><div class='ctx'> </div><div class='hunk'>@@ -2026,14 +2027,14 @@ ice_aq_get_recipe(struct ice_hw *hw,</div><div class='ctx'> 		  u16 *num_recipes, u16 recipe_root, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_add_get_recipe *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	u16 buf_size;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	if (*num_recipes != ICE_MAX_NUM_RECIPES)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.add_get_recipe;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_recipe);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;return_index = cpu_to_le16(recipe_root);</div><div class='hunk'>@@ -2118,9 +2119,9 @@ ice_aq_map_recipe_to_profile(struct ice_hw *hw, u32 profile_id, u64 r_assoc,</div><div class='ctx'> 			     struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_recipe_to_profile *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.recipe_to_profile;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_recipe_to_profile);</div><div class='ctx'> 	cmd-&gt;profile_id = cpu_to_le16(profile_id);</div><div class='ctx'> 	/* Set the recipe ID bit in the bitmask to let the device know which</div><div class='hunk'>@@ -2144,10 +2145,10 @@ ice_aq_get_recipe_to_profile(struct ice_hw *hw, u32 profile_id, u64 *r_assoc,</div><div class='ctx'> 			     struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_recipe_to_profile *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.recipe_to_profile;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_aqc_opc_get_recipe_to_profile);</div><div class='ctx'> 	cmd-&gt;profile_id = cpu_to_le16(profile_id);</div><div class='ctx'> </div><div class='hunk'>@@ -3146,7 +3147,7 @@ ice_add_update_vsi_list(struct ice_hw *hw,</div><div class='ctx'> 		u16 vsi_handle_arr[2];</div><div class='ctx'> </div><div class='ctx'> 		/* A rule already exists with the new VSI being added */</div><div class='del'>-		if (cur_fltr-&gt;fwd_id.hw_vsi_id == new_fltr-&gt;fwd_id.hw_vsi_id)</div><div class='add'>+		if (cur_fltr-&gt;vsi_handle == new_fltr-&gt;vsi_handle)</div><div class='ctx'> 			return -EEXIST;</div><div class='ctx'> </div><div class='ctx'> 		vsi_handle_arr[0] = cur_fltr-&gt;vsi_handle;</div><div class='hunk'>@@ -4784,7 +4785,8 @@ ice_find_recp(struct ice_hw *hw, struct ice_prot_lkup_ext *lkup_exts,</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (found &amp;&amp; recp[i].tun_type == rinfo-&gt;tun_type &amp;&amp;</div><div class='ctx'> 			    recp[i].need_pass_l2 == rinfo-&gt;need_pass_l2 &amp;&amp;</div><div class='del'>-			    recp[i].allow_pass_l2 == rinfo-&gt;allow_pass_l2)</div><div class='add'>+			    recp[i].allow_pass_l2 == rinfo-&gt;allow_pass_l2 &amp;&amp;</div><div class='add'>+			    recp[i].priority == rinfo-&gt;priority)</div><div class='ctx'> 				return i; /* Return the recipe ID */</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5977,7 +5979,7 @@ ice_adv_add_update_vsi_list(struct ice_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 		/* A rule already exists with the new VSI being added */</div><div class='ctx'> 		if (test_bit(vsi_handle, m_entry-&gt;vsi_list_info-&gt;vsi_map))</div><div class='del'>-			return 0;</div><div class='add'>+			return -EEXIST;</div><div class='ctx'> </div><div class='ctx'> 		/* Update the previously created VSI list set with</div><div class='ctx'> 		 * the new VSI ID passed in</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_tc_lib.c b/drivers/net/ethernet/intel/ice/ice_tc_lib.c<br/>index ea39b999a0d0..fb9ea7f8ef44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_tc_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_tc_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_tc_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_tc_lib.c</a></div><div class='hunk'>@@ -12,14 +12,11 @@</div><div class='ctx'> /**</div><div class='ctx'>  * ice_tc_count_lkups - determine lookup count for switch filter</div><div class='ctx'>  * @flags: TC-flower flags</div><div class='del'>- * @headers: Pointer to TC flower filter header structure</div><div class='ctx'>  * @fltr: Pointer to outer TC filter structure</div><div class='ctx'>  *</div><div class='del'>- * Determine lookup count based on TC flower input for switch filter.</div><div class='add'>+ * Return: lookup count based on TC flower input for a switch filter.</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='del'>-ice_tc_count_lkups(u32 flags, struct ice_tc_flower_lyr_2_4_hdrs *headers,</div><div class='del'>-		   struct ice_tc_flower_fltr *fltr)</div><div class='add'>+static int ice_tc_count_lkups(u32 flags, struct ice_tc_flower_fltr *fltr)</div><div class='ctx'> {</div><div class='ctx'> 	int lkups_cnt = 1; /* 0th lookup is metadata */</div><div class='ctx'> </div><div class='hunk'>@@ -684,26 +681,26 @@ static int ice_tc_setup_action(struct net_device *filter_dev,</div><div class='ctx'> 	fltr-&gt;action.fltr_act = action;</div><div class='ctx'> </div><div class='ctx'> 	if (ice_is_port_repr_netdev(filter_dev) &amp;&amp;</div><div class='del'>-	    ice_is_port_repr_netdev(target_dev)) {</div><div class='add'>+	    ice_is_port_repr_netdev(target_dev) &amp;&amp;</div><div class='add'>+	    fltr-&gt;direction == ICE_ESWITCH_FLTR_EGRESS) {</div><div class='ctx'> 		repr = ice_netdev_to_repr(target_dev);</div><div class='ctx'> </div><div class='ctx'> 		fltr-&gt;dest_vsi = repr-&gt;src_vsi;</div><div class='del'>-		fltr-&gt;direction = ICE_ESWITCH_FLTR_EGRESS;</div><div class='ctx'> 	} else if (ice_is_port_repr_netdev(filter_dev) &amp;&amp;</div><div class='del'>-		   ice_tc_is_dev_uplink(target_dev)) {</div><div class='add'>+		   ice_tc_is_dev_uplink(target_dev) &amp;&amp;</div><div class='add'>+		   fltr-&gt;direction == ICE_ESWITCH_FLTR_EGRESS) {</div><div class='ctx'> 		repr = ice_netdev_to_repr(filter_dev);</div><div class='ctx'> </div><div class='ctx'> 		fltr-&gt;dest_vsi = repr-&gt;src_vsi-&gt;back-&gt;eswitch.uplink_vsi;</div><div class='del'>-		fltr-&gt;direction = ICE_ESWITCH_FLTR_EGRESS;</div><div class='ctx'> 	} else if (ice_tc_is_dev_uplink(filter_dev) &amp;&amp;</div><div class='del'>-		   ice_is_port_repr_netdev(target_dev)) {</div><div class='add'>+		   ice_is_port_repr_netdev(target_dev) &amp;&amp;</div><div class='add'>+		   fltr-&gt;direction == ICE_ESWITCH_FLTR_INGRESS) {</div><div class='ctx'> 		repr = ice_netdev_to_repr(target_dev);</div><div class='ctx'> </div><div class='ctx'> 		fltr-&gt;dest_vsi = repr-&gt;src_vsi;</div><div class='del'>-		fltr-&gt;direction = ICE_ESWITCH_FLTR_INGRESS;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(fltr-&gt;extack,</div><div class='del'>-				   "Unsupported netdevice in switchdev mode");</div><div class='add'>+				   "The action is not supported for this netdevice");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -716,13 +713,11 @@ ice_tc_setup_drop_action(struct net_device *filter_dev,</div><div class='ctx'> {</div><div class='ctx'> 	fltr-&gt;action.fltr_act = ICE_DROP_PACKET;</div><div class='ctx'> </div><div class='del'>-	if (ice_is_port_repr_netdev(filter_dev)) {</div><div class='del'>-		fltr-&gt;direction = ICE_ESWITCH_FLTR_EGRESS;</div><div class='del'>-	} else if (ice_tc_is_dev_uplink(filter_dev)) {</div><div class='del'>-		fltr-&gt;direction = ICE_ESWITCH_FLTR_INGRESS;</div><div class='del'>-	} else {</div><div class='add'>+	if (!ice_tc_is_dev_uplink(filter_dev) &amp;&amp;</div><div class='add'>+	    !(ice_is_port_repr_netdev(filter_dev) &amp;&amp;</div><div class='add'>+	      fltr-&gt;direction == ICE_ESWITCH_FLTR_INGRESS)) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(fltr-&gt;extack,</div><div class='del'>-				   "Unsupported netdevice in switchdev mode");</div><div class='add'>+				   "The action is not supported for this netdevice");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -767,10 +762,157 @@ static int ice_eswitch_tc_parse_action(struct net_device *filter_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool ice_is_fltr_lldp(struct ice_tc_flower_fltr *fltr)</div><div class='add'>+{</div><div class='add'>+	return fltr-&gt;outer_headers.l2_key.n_proto == htons(ETH_P_LLDP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ice_is_fltr_pf_tx_lldp(struct ice_tc_flower_fltr *fltr)</div><div class='add'>+{</div><div class='add'>+	struct ice_vsi *vsi = fltr-&gt;src_vsi, *uplink;</div><div class='add'>+</div><div class='add'>+	if (!ice_is_switchdev_running(vsi-&gt;back))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	uplink = vsi-&gt;back-&gt;eswitch.uplink_vsi;</div><div class='add'>+	return vsi == uplink &amp;&amp; fltr-&gt;action.fltr_act == ICE_DROP_PACKET &amp;&amp;</div><div class='add'>+	       ice_is_fltr_lldp(fltr) &amp;&amp;</div><div class='add'>+	       fltr-&gt;direction == ICE_ESWITCH_FLTR_EGRESS &amp;&amp;</div><div class='add'>+	       fltr-&gt;flags == ICE_TC_FLWR_FIELD_ETH_TYPE_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ice_is_fltr_vf_tx_lldp(struct ice_tc_flower_fltr *fltr)</div><div class='add'>+{</div><div class='add'>+	struct ice_vsi *vsi = fltr-&gt;src_vsi, *uplink;</div><div class='add'>+</div><div class='add'>+	uplink = vsi-&gt;back-&gt;eswitch.uplink_vsi;</div><div class='add'>+	return fltr-&gt;src_vsi-&gt;type == ICE_VSI_VF &amp;&amp; ice_is_fltr_lldp(fltr) &amp;&amp;</div><div class='add'>+	       fltr-&gt;direction == ICE_ESWITCH_FLTR_EGRESS &amp;&amp;</div><div class='add'>+	       fltr-&gt;dest_vsi == uplink;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ice_tc_flower_fltr *</div><div class='add'>+ice_find_pf_tx_lldp_fltr(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct ice_tc_flower_fltr *fltr;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry(fltr, &amp;pf-&gt;tc_flower_fltr_list, tc_flower_node)</div><div class='add'>+		if (ice_is_fltr_pf_tx_lldp(fltr))</div><div class='add'>+			return fltr;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ice_any_vf_lldp_tx_ena(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	struct ice_vf *vf;</div><div class='add'>+	unsigned int bkt;</div><div class='add'>+</div><div class='add'>+	ice_for_each_vf(pf, bkt, vf)</div><div class='add'>+		if (vf-&gt;lldp_tx_ena)</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ice_pass_vf_tx_lldp(struct ice_vsi *vsi, bool deinit)</div><div class='add'>+{</div><div class='add'>+	struct ice_rule_query_data remove_entry = {</div><div class='add'>+		.rid = vsi-&gt;vf-&gt;lldp_recipe_id,</div><div class='add'>+		.rule_id = vsi-&gt;vf-&gt;lldp_rule_id,</div><div class='add'>+		.vsi_handle = vsi-&gt;idx,</div><div class='add'>+	};</div><div class='add'>+	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (vsi-&gt;vf-&gt;lldp_tx_ena)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!deinit &amp;&amp; !ice_find_pf_tx_lldp_fltr(vsi-&gt;back))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!deinit &amp;&amp; ice_any_vf_lldp_tx_ena(pf))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = ice_rem_adv_rule_by_id(&amp;pf-&gt;hw, &amp;remove_entry);</div><div class='add'>+	if (!err)</div><div class='add'>+		vsi-&gt;vf-&gt;lldp_tx_ena = true;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ice_drop_vf_tx_lldp(struct ice_vsi *vsi, bool init)</div><div class='add'>+{</div><div class='add'>+	struct ice_rule_query_data rule_added;</div><div class='add'>+	struct ice_adv_rule_info rinfo = {</div><div class='add'>+		.priority = 7,</div><div class='add'>+		.src_vsi = vsi-&gt;idx,</div><div class='add'>+		.sw_act = {</div><div class='add'>+			.src = vsi-&gt;idx,</div><div class='add'>+			.flag = ICE_FLTR_TX,</div><div class='add'>+			.fltr_act = ICE_DROP_PACKET,</div><div class='add'>+			.vsi_handle = vsi-&gt;idx,</div><div class='add'>+		},</div><div class='add'>+		.flags_info.act_valid = true,</div><div class='add'>+	};</div><div class='add'>+	struct ice_adv_lkup_elem list[3];</div><div class='add'>+	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!init &amp;&amp; !vsi-&gt;vf-&gt;lldp_tx_ena)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	memset(list, 0, sizeof(list));</div><div class='add'>+	ice_rule_add_direction_metadata(&amp;list[0]);</div><div class='add'>+	ice_rule_add_src_vsi_metadata(&amp;list[1]);</div><div class='add'>+	list[2].type = ICE_ETYPE_OL;</div><div class='add'>+	list[2].h_u.ethertype.ethtype_id = htons(ETH_P_LLDP);</div><div class='add'>+	list[2].m_u.ethertype.ethtype_id = htons(0xFFFF);</div><div class='add'>+</div><div class='add'>+	err = ice_add_adv_rule(&amp;pf-&gt;hw, list, ARRAY_SIZE(list), &amp;rinfo,</div><div class='add'>+			       &amp;rule_added);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pf-&gt;pdev-&gt;dev,</div><div class='add'>+			"Failed to add an LLDP rule to VSI 0x%X: %d\n",</div><div class='add'>+			vsi-&gt;idx, err);</div><div class='add'>+	} else {</div><div class='add'>+		vsi-&gt;vf-&gt;lldp_recipe_id = rule_added.rid;</div><div class='add'>+		vsi-&gt;vf-&gt;lldp_rule_id = rule_added.rule_id;</div><div class='add'>+		vsi-&gt;vf-&gt;lldp_tx_ena = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ice_handle_add_pf_lldp_drop_rule(struct ice_vsi *vsi)</div><div class='add'>+{</div><div class='add'>+	struct ice_tc_flower_fltr *fltr;</div><div class='add'>+	struct ice_pf *pf = vsi-&gt;back;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry(fltr, &amp;pf-&gt;tc_flower_fltr_list, tc_flower_node) {</div><div class='add'>+		if (!ice_is_fltr_vf_tx_lldp(fltr))</div><div class='add'>+			continue;</div><div class='add'>+		ice_pass_vf_tx_lldp(fltr-&gt;src_vsi, true);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ice_handle_del_pf_lldp_drop_rule(struct ice_pf *pf)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Make the VF LLDP fwd to uplink rule dormant */</div><div class='add'>+	ice_for_each_vsi(pf, i) {</div><div class='add'>+		struct ice_vsi *vf_vsi = pf-&gt;vsi[i];</div><div class='add'>+</div><div class='add'>+		if (vf_vsi &amp;&amp; vf_vsi-&gt;type == ICE_VSI_VF)</div><div class='add'>+			ice_drop_vf_tx_lldp(vf_vsi, false);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> ice_eswitch_add_tc_fltr(struct ice_vsi *vsi, struct ice_tc_flower_fltr *fltr)</div><div class='ctx'> {</div><div class='del'>-	struct ice_tc_flower_lyr_2_4_hdrs *headers = &amp;fltr-&gt;outer_headers;</div><div class='ctx'> 	struct ice_adv_rule_info rule_info = { 0 };</div><div class='ctx'> 	struct ice_rule_query_data rule_added;</div><div class='ctx'> 	struct ice_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='hunk'>@@ -785,7 +927,10 @@ ice_eswitch_add_tc_fltr(struct ice_vsi *vsi, struct ice_tc_flower_fltr *fltr)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lkups_cnt = ice_tc_count_lkups(flags, headers, fltr);</div><div class='add'>+	if (ice_is_fltr_vf_tx_lldp(fltr))</div><div class='add'>+		return ice_pass_vf_tx_lldp(vsi, false);</div><div class='add'>+</div><div class='add'>+	lkups_cnt = ice_tc_count_lkups(flags, fltr);</div><div class='ctx'> 	list = kcalloc(lkups_cnt, sizeof(*list), GFP_ATOMIC);</div><div class='ctx'> 	if (!list)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -814,6 +959,11 @@ ice_eswitch_add_tc_fltr(struct ice_vsi *vsi, struct ice_tc_flower_fltr *fltr)</div><div class='ctx'> 		rule_info.sw_act.src = hw-&gt;pf_id;</div><div class='ctx'> 		rule_info.flags_info.act = ICE_SINGLE_ACT_LB_ENABLE;</div><div class='ctx'> 	} else if (fltr-&gt;direction == ICE_ESWITCH_FLTR_EGRESS &amp;&amp;</div><div class='add'>+		   !fltr-&gt;dest_vsi &amp;&amp; vsi == vsi-&gt;back-&gt;eswitch.uplink_vsi) {</div><div class='add'>+		/* PF to Uplink */</div><div class='add'>+		rule_info.sw_act.flag |= ICE_FLTR_TX;</div><div class='add'>+		rule_info.sw_act.src = vsi-&gt;idx;</div><div class='add'>+	} else if (fltr-&gt;direction == ICE_ESWITCH_FLTR_EGRESS &amp;&amp;</div><div class='ctx'> 		   fltr-&gt;dest_vsi == vsi-&gt;back-&gt;eswitch.uplink_vsi) {</div><div class='ctx'> 		/* VF to Uplink */</div><div class='ctx'> 		rule_info.sw_act.flag |= ICE_FLTR_TX;</div><div class='hunk'>@@ -846,11 +996,17 @@ ice_eswitch_add_tc_fltr(struct ice_vsi *vsi, struct ice_tc_flower_fltr *fltr)</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(fltr-&gt;extack, "Unable to add filter because it already exist");</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto exit;</div><div class='add'>+	} else if (ret == -ENOSPC) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(fltr-&gt;extack, "Unable to add filter: insufficient space available.");</div><div class='add'>+		goto exit;</div><div class='ctx'> 	} else if (ret) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(fltr-&gt;extack, "Unable to add filter due to error");</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ice_is_fltr_pf_tx_lldp(fltr))</div><div class='add'>+		ice_handle_add_pf_lldp_drop_rule(vsi);</div><div class='add'>+</div><div class='ctx'> 	/* store the output params, which are needed later for removing</div><div class='ctx'> 	 * advanced switch filter</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -985,7 +1141,6 @@ static int</div><div class='ctx'> ice_add_tc_flower_adv_fltr(struct ice_vsi *vsi,</div><div class='ctx'> 			   struct ice_tc_flower_fltr *tc_fltr)</div><div class='ctx'> {</div><div class='del'>-	struct ice_tc_flower_lyr_2_4_hdrs *headers = &amp;tc_fltr-&gt;outer_headers;</div><div class='ctx'> 	struct ice_adv_rule_info rule_info = {0};</div><div class='ctx'> 	struct ice_rule_query_data rule_added;</div><div class='ctx'> 	struct ice_adv_lkup_elem *list;</div><div class='hunk'>@@ -1021,7 +1176,7 @@ ice_add_tc_flower_adv_fltr(struct ice_vsi *vsi,</div><div class='ctx'> 			return PTR_ERR(dest_vsi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lkups_cnt = ice_tc_count_lkups(flags, headers, tc_fltr);</div><div class='add'>+	lkups_cnt = ice_tc_count_lkups(flags, tc_fltr);</div><div class='ctx'> 	list = kcalloc(lkups_cnt, sizeof(*list), GFP_ATOMIC);</div><div class='ctx'> 	if (!list)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -1056,8 +1211,13 @@ ice_add_tc_flower_adv_fltr(struct ice_vsi *vsi,</div><div class='ctx'> 			tc_fltr-&gt;action.fwd.q.hw_queue, lkups_cnt);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ICE_DROP_PACKET:</div><div class='del'>-		rule_info.sw_act.flag |= ICE_FLTR_RX;</div><div class='del'>-		rule_info.sw_act.src = hw-&gt;pf_id;</div><div class='add'>+		if (tc_fltr-&gt;direction == ICE_ESWITCH_FLTR_EGRESS) {</div><div class='add'>+			rule_info.sw_act.flag |= ICE_FLTR_TX;</div><div class='add'>+			rule_info.sw_act.src = vsi-&gt;idx;</div><div class='add'>+		} else {</div><div class='add'>+			rule_info.sw_act.flag |= ICE_FLTR_RX;</div><div class='add'>+			rule_info.sw_act.src = hw-&gt;pf_id;</div><div class='add'>+		}</div><div class='ctx'> 		rule_info.priority = ICE_SWITCH_FLTR_PRIO_VSI;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1071,6 +1231,10 @@ ice_add_tc_flower_adv_fltr(struct ice_vsi *vsi,</div><div class='ctx'> 				   "Unable to add filter because it already exist");</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto exit;</div><div class='add'>+	} else if (ret == -ENOSPC) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(tc_fltr-&gt;extack,</div><div class='add'>+				   "Unable to add filter: insufficient space available.");</div><div class='add'>+		goto exit;</div><div class='ctx'> 	} else if (ret) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(tc_fltr-&gt;extack,</div><div class='ctx'> 				   "Unable to add filter due to error");</div><div class='hunk'>@@ -1463,11 +1627,16 @@ ice_parse_tunnel_attr(struct net_device *dev, struct flow_rule *rule,</div><div class='ctx'>  * @filter_dev: Pointer to device on which filter is being added</div><div class='ctx'>  * @f: Pointer to struct flow_cls_offload</div><div class='ctx'>  * @fltr: Pointer to filter structure</div><div class='add'>+ * @ingress: if the rule is added to an ingress block</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the flower was parsed successfully, -EINVAL if the flower</div><div class='add'>+ *	   cannot be parsed, -EOPNOTSUPP if such filter cannot be configured</div><div class='add'>+ *	   for the given VSI.</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='ctx'> ice_parse_cls_flower(struct net_device *filter_dev, struct ice_vsi *vsi,</div><div class='ctx'> 		     struct flow_cls_offload *f,</div><div class='del'>-		     struct ice_tc_flower_fltr *fltr)</div><div class='add'>+		     struct ice_tc_flower_fltr *fltr, bool ingress)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_tc_flower_lyr_2_4_hdrs *headers = &amp;fltr-&gt;outer_headers;</div><div class='ctx'> 	struct flow_rule *rule = flow_cls_offload_flow_rule(f);</div><div class='hunk'>@@ -1551,6 +1720,20 @@ ice_parse_cls_flower(struct net_device *filter_dev, struct ice_vsi *vsi,</div><div class='ctx'> 			fltr-&gt;flags |= ICE_TC_FLWR_FIELD_ETH_TYPE_ID;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (!ingress) {</div><div class='add'>+			bool switchdev =</div><div class='add'>+				ice_is_eswitch_mode_switchdev(vsi-&gt;back);</div><div class='add'>+</div><div class='add'>+			if (switchdev != (n_proto_key == ETH_P_LLDP)) {</div><div class='add'>+				NL_SET_ERR_MSG_FMT_MOD(fltr-&gt;extack,</div><div class='add'>+						       "%sLLDP filtering is not supported on egress in %s mode",</div><div class='add'>+						       switchdev ? "Non-" : "",</div><div class='add'>+						       switchdev ? "switchdev" :</div><div class='add'>+								   "legacy");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		headers-&gt;l2_key.n_proto = cpu_to_be16(n_proto_key);</div><div class='ctx'> 		headers-&gt;l2_mask.n_proto = cpu_to_be16(n_proto_mask);</div><div class='ctx'> 		headers-&gt;l3_key.ip_proto = match.key-&gt;ip_proto;</div><div class='hunk'>@@ -1726,6 +1909,14 @@ ice_parse_cls_flower(struct net_device *filter_dev, struct ice_vsi *vsi,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* Ingress filter on representor results in an egress filter in HW</div><div class='add'>+	 * and vice versa</div><div class='add'>+	 */</div><div class='add'>+	ingress = ice_is_port_repr_netdev(filter_dev) ? !ingress : ingress;</div><div class='add'>+	fltr-&gt;direction = ingress ? ICE_ESWITCH_FLTR_INGRESS :</div><div class='add'>+				    ICE_ESWITCH_FLTR_EGRESS;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1939,6 +2130,12 @@ static int ice_del_tc_fltr(struct ice_vsi *vsi, struct ice_tc_flower_fltr *fltr)</div><div class='ctx'> 	struct ice_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (ice_is_fltr_pf_tx_lldp(fltr))</div><div class='add'>+		ice_handle_del_pf_lldp_drop_rule(pf);</div><div class='add'>+</div><div class='add'>+	if (ice_is_fltr_vf_tx_lldp(fltr))</div><div class='add'>+		return ice_drop_vf_tx_lldp(vsi, false);</div><div class='add'>+</div><div class='ctx'> 	rule_rem.rid = fltr-&gt;rid;</div><div class='ctx'> 	rule_rem.rule_id = fltr-&gt;rule_id;</div><div class='ctx'> 	rule_rem.vsi_handle = fltr-&gt;dest_vsi_handle;</div><div class='hunk'>@@ -1975,14 +2172,18 @@ static int ice_del_tc_fltr(struct ice_vsi *vsi, struct ice_tc_flower_fltr *fltr)</div><div class='ctx'>  * @vsi: Pointer to VSI</div><div class='ctx'>  * @f: Pointer to flower offload structure</div><div class='ctx'>  * @__fltr: Pointer to struct ice_tc_flower_fltr</div><div class='add'>+ * @ingress: if the rule is added to an ingress block</div><div class='ctx'>  *</div><div class='ctx'>  * This function parses TC-flower input fields, parses action,</div><div class='ctx'>  * and adds a filter.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the filter was successfully added,</div><div class='add'>+ *	   negative error code otherwise.</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='ctx'> ice_add_tc_fltr(struct net_device *netdev, struct ice_vsi *vsi,</div><div class='ctx'> 		struct flow_cls_offload *f,</div><div class='del'>-		struct ice_tc_flower_fltr **__fltr)</div><div class='add'>+		struct ice_tc_flower_fltr **__fltr, bool ingress)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_tc_flower_fltr *fltr;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1999,7 +2200,7 @@ ice_add_tc_fltr(struct net_device *netdev, struct ice_vsi *vsi,</div><div class='ctx'> 	fltr-&gt;src_vsi = vsi;</div><div class='ctx'> 	INIT_HLIST_NODE(&amp;fltr-&gt;tc_flower_node);</div><div class='ctx'> </div><div class='del'>-	err = ice_parse_cls_flower(netdev, vsi, f, fltr);</div><div class='add'>+	err = ice_parse_cls_flower(netdev, vsi, f, fltr, ingress);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='hunk'>@@ -2042,10 +2243,13 @@ ice_find_tc_flower_fltr(struct ice_pf *pf, unsigned long cookie)</div><div class='ctx'>  * @netdev: Pointer to filter device</div><div class='ctx'>  * @vsi: Pointer to VSI</div><div class='ctx'>  * @cls_flower: Pointer to flower offload structure</div><div class='add'>+ * @ingress: if the rule is added to an ingress block</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the flower was successfully added,</div><div class='add'>+ *	   negative error code otherwise.</div><div class='ctx'>  */</div><div class='del'>-int</div><div class='del'>-ice_add_cls_flower(struct net_device *netdev, struct ice_vsi *vsi,</div><div class='del'>-		   struct flow_cls_offload *cls_flower)</div><div class='add'>+int ice_add_cls_flower(struct net_device *netdev, struct ice_vsi *vsi,</div><div class='add'>+		       struct flow_cls_offload *cls_flower, bool ingress)</div><div class='ctx'> {</div><div class='ctx'> 	struct netlink_ext_ack *extack = cls_flower-&gt;common.extack;</div><div class='ctx'> 	struct net_device *vsi_netdev = vsi-&gt;netdev;</div><div class='hunk'>@@ -2080,7 +2284,7 @@ ice_add_cls_flower(struct net_device *netdev, struct ice_vsi *vsi,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* prep and add TC-flower filter in HW */</div><div class='del'>-	err = ice_add_tc_fltr(netdev, vsi, cls_flower, &amp;fltr);</div><div class='add'>+	err = ice_add_tc_fltr(netdev, vsi, cls_flower, &amp;fltr, ingress);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_tc_lib.h b/drivers/net/ethernet/intel/ice/ice_tc_lib.h<br/>index d84f153517ec..8a3ab2f22af9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_tc_lib.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_tc_lib.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_tc_lib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_tc_lib.h</a></div><div class='hunk'>@@ -211,13 +211,14 @@ static inline int ice_chnl_dmac_fltr_cnt(struct ice_pf *pf)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct ice_vsi *ice_locate_vsi_using_queue(struct ice_vsi *vsi, int queue);</div><div class='del'>-int</div><div class='del'>-ice_add_cls_flower(struct net_device *netdev, struct ice_vsi *vsi,</div><div class='del'>-		   struct flow_cls_offload *cls_flower);</div><div class='del'>-int</div><div class='del'>-ice_del_cls_flower(struct ice_vsi *vsi, struct flow_cls_offload *cls_flower);</div><div class='add'>+int ice_add_cls_flower(struct net_device *netdev, struct ice_vsi *vsi,</div><div class='add'>+		       struct flow_cls_offload *cls_flower, bool ingress);</div><div class='add'>+int ice_del_cls_flower(struct ice_vsi *vsi,</div><div class='add'>+		       struct flow_cls_offload *cls_flower);</div><div class='ctx'> void ice_replay_tc_fltrs(struct ice_pf *pf);</div><div class='ctx'> bool ice_is_tunnel_supported(struct net_device *dev);</div><div class='add'>+int ice_drop_vf_tx_lldp(struct ice_vsi *vsi, bool init);</div><div class='add'>+int ice_pass_vf_tx_lldp(struct ice_vsi *vsi, bool deinit);</div><div class='ctx'> </div><div class='ctx'> static inline bool ice_is_forward_action(enum ice_sw_fwd_act_type fltr_act)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_trace.h b/drivers/net/ethernet/intel/ice/ice_trace.h<br/>index 07aab6e130cd..4f35ef8d6b29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_trace.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_trace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_trace.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_trace.h</a></div><div class='hunk'>@@ -130,7 +130,7 @@ DECLARE_EVENT_CLASS(ice_tx_template,</div><div class='ctx'> 				   __entry-&gt;buf = buf;</div><div class='ctx'> 				   __assign_str(devname);),</div><div class='ctx'> </div><div class='del'>-		    TP_printk("netdev: %s ring: %pK desc: %pK buf %pK", __get_str(devname),</div><div class='add'>+		    TP_printk("netdev: %s ring: %p desc: %p buf %p", __get_str(devname),</div><div class='ctx'> 			      __entry-&gt;ring, __entry-&gt;desc, __entry-&gt;buf)</div><div class='ctx'> );</div><div class='ctx'> </div><div class='hunk'>@@ -158,7 +158,7 @@ DECLARE_EVENT_CLASS(ice_rx_template,</div><div class='ctx'> 				   __entry-&gt;desc = desc;</div><div class='ctx'> 				   __assign_str(devname);),</div><div class='ctx'> </div><div class='del'>-		    TP_printk("netdev: %s ring: %pK desc: %pK", __get_str(devname),</div><div class='add'>+		    TP_printk("netdev: %s ring: %p desc: %p", __get_str(devname),</div><div class='ctx'> 			      __entry-&gt;ring, __entry-&gt;desc)</div><div class='ctx'> );</div><div class='ctx'> DEFINE_EVENT(ice_rx_template, ice_clean_rx_irq,</div><div class='hunk'>@@ -182,7 +182,7 @@ DECLARE_EVENT_CLASS(ice_rx_indicate_template,</div><div class='ctx'> 				   __entry-&gt;skb = skb;</div><div class='ctx'> 				   __assign_str(devname);),</div><div class='ctx'> </div><div class='del'>-		    TP_printk("netdev: %s ring: %pK desc: %pK skb %pK", __get_str(devname),</div><div class='add'>+		    TP_printk("netdev: %s ring: %p desc: %p skb %p", __get_str(devname),</div><div class='ctx'> 			      __entry-&gt;ring, __entry-&gt;desc, __entry-&gt;skb)</div><div class='ctx'> );</div><div class='ctx'> </div><div class='hunk'>@@ -205,7 +205,7 @@ DECLARE_EVENT_CLASS(ice_xmit_template,</div><div class='ctx'> 				   __entry-&gt;skb = skb;</div><div class='ctx'> 				   __assign_str(devname);),</div><div class='ctx'> </div><div class='del'>-		    TP_printk("netdev: %s skb: %pK ring: %pK", __get_str(devname),</div><div class='add'>+		    TP_printk("netdev: %s skb: %p ring: %p", __get_str(devname),</div><div class='ctx'> 			      __entry-&gt;skb, __entry-&gt;ring)</div><div class='ctx'> );</div><div class='ctx'> </div><div class='hunk'>@@ -228,7 +228,7 @@ DECLARE_EVENT_CLASS(ice_tx_tstamp_template,</div><div class='ctx'> 		    TP_fast_assign(__entry-&gt;skb = skb;</div><div class='ctx'> 				   __entry-&gt;idx = idx;),</div><div class='ctx'> </div><div class='del'>-		    TP_printk("skb %pK idx %d",</div><div class='add'>+		    TP_printk("skb %p idx %d",</div><div class='ctx'> 			      __entry-&gt;skb, __entry-&gt;idx)</div><div class='ctx'> );</div><div class='ctx'> #define DEFINE_TX_TSTAMP_OP_EVENT(name) \</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.c b/drivers/net/ethernet/intel/ice/ice_tspll.c<br/>new file mode 100644<br/>index 000000000000..66320a4ab86f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_tspll.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_tspll.c</a></div><div class='hunk'>@@ -0,0 +1,626 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2025, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include "ice.h"</div><div class='add'>+#include "ice_lib.h"</div><div class='add'>+#include "ice_ptp_hw.h"</div><div class='add'>+</div><div class='add'>+static const struct</div><div class='add'>+ice_tspll_params_e82x e82x_tspll_params[NUM_ICE_TSPLL_FREQ] = {</div><div class='add'>+	[ICE_TSPLL_FREQ_25_000] = {</div><div class='add'>+		.refclk_pre_div = 1,</div><div class='add'>+		.post_pll_div = 6,</div><div class='add'>+		.feedback_div = 197,</div><div class='add'>+		.frac_n_div = 2621440,</div><div class='add'>+	},</div><div class='add'>+	[ICE_TSPLL_FREQ_122_880] = {</div><div class='add'>+		.refclk_pre_div = 5,</div><div class='add'>+		.post_pll_div = 7,</div><div class='add'>+		.feedback_div = 223,</div><div class='add'>+		.frac_n_div = 524288</div><div class='add'>+	},</div><div class='add'>+	[ICE_TSPLL_FREQ_125_000] = {</div><div class='add'>+		.refclk_pre_div = 5,</div><div class='add'>+		.post_pll_div = 7,</div><div class='add'>+		.feedback_div = 223,</div><div class='add'>+		.frac_n_div = 524288</div><div class='add'>+	},</div><div class='add'>+	[ICE_TSPLL_FREQ_153_600] = {</div><div class='add'>+		.refclk_pre_div = 5,</div><div class='add'>+		.post_pll_div = 6,</div><div class='add'>+		.feedback_div = 159,</div><div class='add'>+		.frac_n_div = 1572864</div><div class='add'>+	},</div><div class='add'>+	[ICE_TSPLL_FREQ_156_250] = {</div><div class='add'>+		.refclk_pre_div = 5,</div><div class='add'>+		.post_pll_div = 6,</div><div class='add'>+		.feedback_div = 159,</div><div class='add'>+		.frac_n_div = 1572864</div><div class='add'>+	},</div><div class='add'>+	[ICE_TSPLL_FREQ_245_760] = {</div><div class='add'>+		.refclk_pre_div = 10,</div><div class='add'>+		.post_pll_div = 7,</div><div class='add'>+		.feedback_div = 223,</div><div class='add'>+		.frac_n_div = 524288</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_clk_freq_str - Convert time_ref_freq to string</div><div class='add'>+ * @clk_freq: Clock frequency</div><div class='add'>+ *</div><div class='add'>+ * Return: specified TIME_REF clock frequency converted to a string.</div><div class='add'>+ */</div><div class='add'>+static const char *ice_tspll_clk_freq_str(enum ice_tspll_freq clk_freq)</div><div class='add'>+{</div><div class='add'>+	switch (clk_freq) {</div><div class='add'>+	case ICE_TSPLL_FREQ_25_000:</div><div class='add'>+		return "25 MHz";</div><div class='add'>+	case ICE_TSPLL_FREQ_122_880:</div><div class='add'>+		return "122.88 MHz";</div><div class='add'>+	case ICE_TSPLL_FREQ_125_000:</div><div class='add'>+		return "125 MHz";</div><div class='add'>+	case ICE_TSPLL_FREQ_153_600:</div><div class='add'>+		return "153.6 MHz";</div><div class='add'>+	case ICE_TSPLL_FREQ_156_250:</div><div class='add'>+		return "156.25 MHz";</div><div class='add'>+	case ICE_TSPLL_FREQ_245_760:</div><div class='add'>+		return "245.76 MHz";</div><div class='add'>+	default:</div><div class='add'>+		return "Unknown";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_default_freq - Return default frequency for a MAC type</div><div class='add'>+ * @mac_type: MAC type</div><div class='add'>+ *</div><div class='add'>+ * Return: default TSPLL frequency for a correct MAC type, -ERANGE otherwise.</div><div class='add'>+ */</div><div class='add'>+static enum ice_tspll_freq ice_tspll_default_freq(enum ice_mac_type mac_type)</div><div class='add'>+{</div><div class='add'>+	switch (mac_type) {</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='add'>+		return ICE_TSPLL_FREQ_25_000;</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		return ICE_TSPLL_FREQ_156_250;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_check_params - Check if TSPLL params are correct</div><div class='add'>+ * @hw: Pointer to the HW struct</div><div class='add'>+ * @clk_freq: Clock frequency to program</div><div class='add'>+ * @clk_src: Clock source to select (TIME_REF or TCXO)</div><div class='add'>+ *</div><div class='add'>+ * Return: true if TSPLL params are correct, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool ice_tspll_check_params(struct ice_hw *hw,</div><div class='add'>+				   enum ice_tspll_freq clk_freq,</div><div class='add'>+				   enum ice_clk_src clk_src)</div><div class='add'>+{</div><div class='add'>+	if (clk_freq &gt;= NUM_ICE_TSPLL_FREQ) {</div><div class='add'>+		dev_warn(ice_hw_to_dev(hw), "Invalid TSPLL frequency %u\n",</div><div class='add'>+			 clk_freq);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (clk_src &gt;= NUM_ICE_CLK_SRC) {</div><div class='add'>+		dev_warn(ice_hw_to_dev(hw), "Invalid clock source %u\n",</div><div class='add'>+			 clk_src);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((hw-&gt;mac_type == ICE_MAC_GENERIC_3K_E825 ||</div><div class='add'>+	     clk_src == ICE_CLK_SRC_TCXO) &amp;&amp;</div><div class='add'>+	    clk_freq != ice_tspll_default_freq(hw-&gt;mac_type)) {</div><div class='add'>+		dev_warn(ice_hw_to_dev(hw), "Unsupported frequency for this clock source\n");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_clk_src_str - Convert time_ref_src to string</div><div class='add'>+ * @clk_src: Clock source</div><div class='add'>+ *</div><div class='add'>+ * Return: specified clock source converted to its string name</div><div class='add'>+ */</div><div class='add'>+static const char *ice_tspll_clk_src_str(enum ice_clk_src clk_src)</div><div class='add'>+{</div><div class='add'>+	switch (clk_src) {</div><div class='add'>+	case ICE_CLK_SRC_TCXO:</div><div class='add'>+		return "TCXO";</div><div class='add'>+	case ICE_CLK_SRC_TIME_REF:</div><div class='add'>+		return "TIME_REF";</div><div class='add'>+	default:</div><div class='add'>+		return "Unknown";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_log_cfg - Log current/new TSPLL configuration</div><div class='add'>+ * @hw: Pointer to the HW struct</div><div class='add'>+ * @enable: CGU enabled/disabled</div><div class='add'>+ * @clk_src: Current clock source</div><div class='add'>+ * @tspll_freq: Current clock frequency</div><div class='add'>+ * @lock: CGU lock status</div><div class='add'>+ * @new_cfg: true if this is a new config</div><div class='add'>+ */</div><div class='add'>+static void ice_tspll_log_cfg(struct ice_hw *hw, bool enable, u8 clk_src,</div><div class='add'>+			      u8 tspll_freq, bool lock, bool new_cfg)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(ice_hw_to_dev(hw),</div><div class='add'>+		"%s TSPLL configuration -- %s, src %s, freq %s, PLL %s\n",</div><div class='add'>+		new_cfg ? "New" : "Current", str_enabled_disabled(enable),</div><div class='add'>+		ice_tspll_clk_src_str((enum ice_clk_src)clk_src),</div><div class='add'>+		ice_tspll_clk_freq_str((enum ice_tspll_freq)tspll_freq),</div><div class='add'>+		lock ? "locked" : "unlocked");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_cfg_e82x - Configure the Clock Generation Unit TSPLL</div><div class='add'>+ * @hw: Pointer to the HW struct</div><div class='add'>+ * @clk_freq: Clock frequency to program</div><div class='add'>+ * @clk_src: Clock source to select (TIME_REF, or TCXO)</div><div class='add'>+ *</div><div class='add'>+ * Configure the Clock Generation Unit with the desired clock frequency and</div><div class='add'>+ * time reference, enabling the PLL which drives the PTP hardware clock.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * %0       - success</div><div class='add'>+ * * %-EINVAL - input parameters are incorrect</div><div class='add'>+ * * %-EBUSY  - failed to lock TSPLL</div><div class='add'>+ * * %other   - CGU read/write failure</div><div class='add'>+ */</div><div class='add'>+static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum ice_tspll_freq clk_freq,</div><div class='add'>+			      enum ice_clk_src clk_src)</div><div class='add'>+{</div><div class='add'>+	u32 val, r9, r24;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R9, &amp;r9);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R24, &amp;r24);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_RO_BWM_LF, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ice_tspll_log_cfg(hw, !!FIELD_GET(ICE_CGU_R23_R24_TSPLL_ENABLE, r24),</div><div class='add'>+			  FIELD_GET(ICE_CGU_R23_R24_TIME_REF_SEL, r24),</div><div class='add'>+			  FIELD_GET(ICE_CGU_R9_TIME_REF_FREQ_SEL, r9),</div><div class='add'>+			  !!FIELD_GET(ICE_CGU_RO_BWM_LF_TRUE_LOCK, val),</div><div class='add'>+			  false);</div><div class='add'>+</div><div class='add'>+	/* Disable the PLL before changing the clock source or frequency */</div><div class='add'>+	if (FIELD_GET(ICE_CGU_R23_R24_TSPLL_ENABLE, r24)) {</div><div class='add'>+		r24 &amp;= ~ICE_CGU_R23_R24_TSPLL_ENABLE;</div><div class='add'>+</div><div class='add'>+		err = ice_write_cgu_reg(hw, ICE_CGU_R24, r24);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the frequency */</div><div class='add'>+	r9 &amp;= ~ICE_CGU_R9_TIME_REF_FREQ_SEL;</div><div class='add'>+	r9 |= FIELD_PREP(ICE_CGU_R9_TIME_REF_FREQ_SEL, clk_freq);</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R9, r9);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Configure the TSPLL feedback divisor */</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R19, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(ICE_CGU_R19_TSPLL_FBDIV_INTGR_E82X | ICE_CGU_R19_TSPLL_NDIVRATIO);</div><div class='add'>+	val |= FIELD_PREP(ICE_CGU_R19_TSPLL_FBDIV_INTGR_E82X,</div><div class='add'>+			  e82x_tspll_params[clk_freq].feedback_div);</div><div class='add'>+	val |= FIELD_PREP(ICE_CGU_R19_TSPLL_NDIVRATIO, 1);</div><div class='add'>+</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R19, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Configure the TSPLL post divisor */</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R22, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(ICE_CGU_R22_TIME1588CLK_DIV |</div><div class='add'>+		 ICE_CGU_R22_TIME1588CLK_DIV2);</div><div class='add'>+	val |= FIELD_PREP(ICE_CGU_R22_TIME1588CLK_DIV,</div><div class='add'>+			  e82x_tspll_params[clk_freq].post_pll_div);</div><div class='add'>+</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R22, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Configure the TSPLL pre divisor and clock source */</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R24, &amp;r24);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	r24 &amp;= ~(ICE_CGU_R23_R24_REF1588_CK_DIV | ICE_CGU_R24_FBDIV_FRAC |</div><div class='add'>+		 ICE_CGU_R23_R24_TIME_REF_SEL);</div><div class='add'>+	r24 |= FIELD_PREP(ICE_CGU_R23_R24_REF1588_CK_DIV,</div><div class='add'>+			  e82x_tspll_params[clk_freq].refclk_pre_div);</div><div class='add'>+	r24 |= FIELD_PREP(ICE_CGU_R24_FBDIV_FRAC,</div><div class='add'>+			  e82x_tspll_params[clk_freq].frac_n_div);</div><div class='add'>+	r24 |= FIELD_PREP(ICE_CGU_R23_R24_TIME_REF_SEL, clk_src);</div><div class='add'>+</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R24, r24);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Wait to ensure everything is stable */</div><div class='add'>+	usleep_range(10, 20);</div><div class='add'>+</div><div class='add'>+	/* Finally, enable the PLL */</div><div class='add'>+	r24 |= ICE_CGU_R23_R24_TSPLL_ENABLE;</div><div class='add'>+</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R24, r24);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Wait at least 1 ms to verify if the PLL locks */</div><div class='add'>+	usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC);</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_RO_BWM_LF, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!(val &amp; ICE_CGU_RO_BWM_LF_TRUE_LOCK)) {</div><div class='add'>+		dev_warn(ice_hw_to_dev(hw), "CGU PLL failed to lock\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R9, &amp;r9);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R24, &amp;r24);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ice_tspll_log_cfg(hw, !!FIELD_GET(ICE_CGU_R23_R24_TSPLL_ENABLE, r24),</div><div class='add'>+			  FIELD_GET(ICE_CGU_R23_R24_TIME_REF_SEL, r24),</div><div class='add'>+			  FIELD_GET(ICE_CGU_R9_TIME_REF_FREQ_SEL, r9),</div><div class='add'>+			  true, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_dis_sticky_bits_e82x - disable TSPLL sticky bits</div><div class='add'>+ * @hw: Pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Configure the Clock Generation Unit TSPLL sticky bits so they don't latch on</div><div class='add'>+ * losing TSPLL lock, but always show current state.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, other error codes when failed to read/write CGU.</div><div class='add'>+ */</div><div class='add'>+static int ice_tspll_dis_sticky_bits_e82x(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_CNTR_BIST, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(ICE_CGU_CNTR_BIST_PLLLOCK_SEL_0 |</div><div class='add'>+		 ICE_CGU_CNTR_BIST_PLLLOCK_SEL_1);</div><div class='add'>+</div><div class='add'>+	return ice_write_cgu_reg(hw, ICE_CGU_CNTR_BIST, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_cfg_e825c - Configure the TSPLL for E825-C</div><div class='add'>+ * @hw: Pointer to the HW struct</div><div class='add'>+ * @clk_freq: Clock frequency to program</div><div class='add'>+ * @clk_src: Clock source to select (TIME_REF, or TCXO)</div><div class='add'>+ *</div><div class='add'>+ * Configure the Clock Generation Unit with the desired clock frequency and</div><div class='add'>+ * time reference, enabling the PLL which drives the PTP hardware clock.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * %0       - success</div><div class='add'>+ * * %-EINVAL - input parameters are incorrect</div><div class='add'>+ * * %-EBUSY  - failed to lock TSPLL</div><div class='add'>+ * * %other   - CGU read/write failure</div><div class='add'>+ */</div><div class='add'>+static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,</div><div class='add'>+			       enum ice_clk_src clk_src)</div><div class='add'>+{</div><div class='add'>+	u32 val, r9, r23;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R9, &amp;r9);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R23, &amp;r23);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_RO_LOCK, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ice_tspll_log_cfg(hw, !!FIELD_GET(ICE_CGU_R23_R24_TSPLL_ENABLE, r23),</div><div class='add'>+			  FIELD_GET(ICE_CGU_R23_R24_TIME_REF_SEL, r23),</div><div class='add'>+			  FIELD_GET(ICE_CGU_R9_TIME_REF_FREQ_SEL, r9),</div><div class='add'>+			  !!FIELD_GET(ICE_CGU_RO_LOCK_TRUE_LOCK, val),</div><div class='add'>+			  false);</div><div class='add'>+</div><div class='add'>+	/* Disable the PLL before changing the clock source or frequency */</div><div class='add'>+	if (FIELD_GET(ICE_CGU_R23_R24_TSPLL_ENABLE, r23)) {</div><div class='add'>+		r23 &amp;= ~ICE_CGU_R23_R24_TSPLL_ENABLE;</div><div class='add'>+</div><div class='add'>+		err = ice_write_cgu_reg(hw, ICE_CGU_R23, r23);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(ICE_CGU_R9_TIME_SYNC_EN, r9)) {</div><div class='add'>+		r9 &amp;= ~ICE_CGU_R9_TIME_SYNC_EN;</div><div class='add'>+</div><div class='add'>+		err = ice_write_cgu_reg(hw, ICE_CGU_R9, r9);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the frequency and enable the correct receiver */</div><div class='add'>+	r9 &amp;= ~(ICE_CGU_R9_TIME_REF_FREQ_SEL | ICE_CGU_R9_CLK_EREF0_EN |</div><div class='add'>+		ICE_CGU_R9_TIME_REF_EN);</div><div class='add'>+	r9 |= FIELD_PREP(ICE_CGU_R9_TIME_REF_FREQ_SEL, clk_freq);</div><div class='add'>+	if (clk_src == ICE_CLK_SRC_TCXO)</div><div class='add'>+		r9 |= ICE_CGU_R9_CLK_EREF0_EN;</div><div class='add'>+	else</div><div class='add'>+		r9 |= ICE_CGU_R9_TIME_REF_EN;</div><div class='add'>+	r9 |= ICE_CGU_R9_TIME_SYNC_EN;</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R9, r9);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Choose the referenced frequency */</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R16, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	val &amp;= ~ICE_CGU_R16_TSPLL_CK_REFCLKFREQ;</div><div class='add'>+	val |= FIELD_PREP(ICE_CGU_R16_TSPLL_CK_REFCLKFREQ,</div><div class='add'>+			  ICE_TSPLL_CK_REFCLKFREQ_E825);</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R16, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Configure the TSPLL feedback divisor */</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R19, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(ICE_CGU_R19_TSPLL_FBDIV_INTGR_E825 |</div><div class='add'>+		 ICE_CGU_R19_TSPLL_NDIVRATIO);</div><div class='add'>+	val |= FIELD_PREP(ICE_CGU_R19_TSPLL_FBDIV_INTGR_E825,</div><div class='add'>+			  ICE_TSPLL_FBDIV_INTGR_E825);</div><div class='add'>+	val |= FIELD_PREP(ICE_CGU_R19_TSPLL_NDIVRATIO,</div><div class='add'>+			  ICE_TSPLL_NDIVRATIO_E825);</div><div class='add'>+</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R19, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Configure the TSPLL post divisor, these two are constant */</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R22, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(ICE_CGU_R22_TIME1588CLK_DIV |</div><div class='add'>+		 ICE_CGU_R22_TIME1588CLK_DIV2);</div><div class='add'>+	val |= FIELD_PREP(ICE_CGU_R22_TIME1588CLK_DIV, 5);</div><div class='add'>+</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R22, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Configure the TSPLL pre divisor (constant) and clock source */</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R23, &amp;r23);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	r23 &amp;= ~(ICE_CGU_R23_R24_REF1588_CK_DIV | ICE_CGU_R23_R24_TIME_REF_SEL);</div><div class='add'>+	r23 |= FIELD_PREP(ICE_CGU_R23_R24_TIME_REF_SEL, clk_src);</div><div class='add'>+</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R23, r23);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Clear the R24 register. */</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R24, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Wait to ensure everything is stable */</div><div class='add'>+	usleep_range(10, 20);</div><div class='add'>+</div><div class='add'>+	/* Finally, enable the PLL */</div><div class='add'>+	r23 |= ICE_CGU_R23_R24_TSPLL_ENABLE;</div><div class='add'>+</div><div class='add'>+	err = ice_write_cgu_reg(hw, ICE_CGU_R23, r23);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Wait at least 1 ms to verify if the PLL locks */</div><div class='add'>+	usleep_range(USEC_PER_MSEC, 2 * USEC_PER_MSEC);</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_RO_LOCK, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!(val &amp; ICE_CGU_RO_LOCK_TRUE_LOCK)) {</div><div class='add'>+		dev_warn(ice_hw_to_dev(hw), "CGU PLL failed to lock\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R9, &amp;r9);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R23, &amp;r23);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ice_tspll_log_cfg(hw, !!FIELD_GET(ICE_CGU_R23_R24_TSPLL_ENABLE, r23),</div><div class='add'>+			  FIELD_GET(ICE_CGU_R23_R24_TIME_REF_SEL, r23),</div><div class='add'>+			  FIELD_GET(ICE_CGU_R9_TIME_REF_FREQ_SEL, r9),</div><div class='add'>+			  true, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_dis_sticky_bits_e825c - disable TSPLL sticky bits for E825-C</div><div class='add'>+ * @hw: Pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Configure the Clock Generation Unit TSPLL sticky bits so they don't latch on</div><div class='add'>+ * losing TSPLL lock, but always show current state.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, other error codes when failed to read/write CGU.</div><div class='add'>+ */</div><div class='add'>+static int ice_tspll_dis_sticky_bits_e825c(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_BW_TDC, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~ICE_CGU_BW_TDC_PLLLOCK_SEL;</div><div class='add'>+</div><div class='add'>+	return ice_write_cgu_reg(hw, ICE_CGU_BW_TDC, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_cfg_pps_out_e825c - Enable/disable 1PPS output and set amplitude</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @enable: true to enable 1PPS output, false to disable it</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, other negative error code when CGU read/write failed.</div><div class='add'>+ */</div><div class='add'>+int ice_tspll_cfg_pps_out_e825c(struct ice_hw *hw, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ice_read_cgu_reg(hw, ICE_CGU_R9, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(ICE_CGU_R9_ONE_PPS_OUT_EN | ICE_CGU_R9_ONE_PPS_OUT_AMP);</div><div class='add'>+	val |= FIELD_PREP(ICE_CGU_R9_ONE_PPS_OUT_EN, enable) |</div><div class='add'>+	       ICE_CGU_R9_ONE_PPS_OUT_AMP;</div><div class='add'>+</div><div class='add'>+	return ice_write_cgu_reg(hw, ICE_CGU_R9, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_cfg - Configure the Clock Generation Unit TSPLL</div><div class='add'>+ * @hw: Pointer to the HW struct</div><div class='add'>+ * @clk_freq: Clock frequency to program</div><div class='add'>+ * @clk_src: Clock source to select (TIME_REF, or TCXO)</div><div class='add'>+ *</div><div class='add'>+ * Configure the Clock Generation Unit with the desired clock frequency and</div><div class='add'>+ * time reference, enabling the TSPLL which drives the PTP hardware clock.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -ERANGE on unsupported MAC type, other negative error</div><div class='add'>+ *         codes when failed to configure CGU.</div><div class='add'>+ */</div><div class='add'>+static int ice_tspll_cfg(struct ice_hw *hw, enum ice_tspll_freq clk_freq,</div><div class='add'>+			 enum ice_clk_src clk_src)</div><div class='add'>+{</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='add'>+		return ice_tspll_cfg_e82x(hw, clk_freq, clk_src);</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		return ice_tspll_cfg_e825c(hw, clk_freq, clk_src);</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_dis_sticky_bits - disable TSPLL sticky bits</div><div class='add'>+ * @hw: Pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Configure the Clock Generation Unit TSPLL sticky bits so they don't latch on</div><div class='add'>+ * losing TSPLL lock, but always show current state.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -ERANGE on unsupported MAC type.</div><div class='add'>+ */</div><div class='add'>+static int ice_tspll_dis_sticky_bits(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	switch (hw-&gt;mac_type) {</div><div class='add'>+	case ICE_MAC_GENERIC:</div><div class='add'>+		return ice_tspll_dis_sticky_bits_e82x(hw);</div><div class='add'>+	case ICE_MAC_GENERIC_3K_E825:</div><div class='add'>+		return ice_tspll_dis_sticky_bits_e825c(hw);</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_tspll_init - Initialize TSPLL with settings from firmware</div><div class='add'>+ * @hw: Pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * Initialize the Clock Generation Unit of the E82X/E825 device.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, other error codes when failed to read/write/cfg CGU.</div><div class='add'>+ */</div><div class='add'>+int ice_tspll_init(struct ice_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ice_ts_func_info *ts_info = &amp;hw-&gt;func_caps.ts_func_info;</div><div class='add'>+	enum ice_tspll_freq tspll_freq;</div><div class='add'>+	enum ice_clk_src clk_src;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Only E822, E823 and E825 products support TSPLL */</div><div class='add'>+	if (hw-&gt;mac_type != ICE_MAC_GENERIC &amp;&amp;</div><div class='add'>+	    hw-&gt;mac_type != ICE_MAC_GENERIC_3K_E825)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	tspll_freq = (enum ice_tspll_freq)ts_info-&gt;time_ref;</div><div class='add'>+	clk_src = (enum ice_clk_src)ts_info-&gt;clk_src;</div><div class='add'>+	if (!ice_tspll_check_params(hw, tspll_freq, clk_src))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Disable sticky lock detection so lock status reported is accurate */</div><div class='add'>+	err = ice_tspll_dis_sticky_bits(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Configure the TSPLL using the parameters from the function</div><div class='add'>+	 * capabilities.</div><div class='add'>+	 */</div><div class='add'>+	err = ice_tspll_cfg(hw, tspll_freq, clk_src);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_warn(ice_hw_to_dev(hw), "Failed to lock TSPLL to predefined frequency. Retrying with fallback frequency.\n");</div><div class='add'>+</div><div class='add'>+		/* Try to lock to internal TCXO as a fallback. */</div><div class='add'>+		tspll_freq = ice_tspll_default_freq(hw-&gt;mac_type);</div><div class='add'>+		clk_src = ICE_CLK_SRC_TCXO;</div><div class='add'>+		err = ice_tspll_cfg(hw, tspll_freq, clk_src);</div><div class='add'>+		if (err)</div><div class='add'>+			dev_warn(ice_hw_to_dev(hw), "Failed to lock TSPLL to fallback frequency.\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.h b/drivers/net/ethernet/intel/ice/ice_tspll.h<br/>new file mode 100644<br/>index 000000000000..c0b1232cc07c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_tspll.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_tspll.h</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _ICE_TSPLL_H_</div><div class='add'>+#define _ICE_TSPLL_H_</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ice_tspll_params_e82x - E82X TSPLL parameters</div><div class='add'>+ * @refclk_pre_div: Reference clock pre-divisor</div><div class='add'>+ * @post_pll_div: Post PLL divisor</div><div class='add'>+ * @feedback_div: Feedback divisor</div><div class='add'>+ * @frac_n_div: Fractional divisor</div><div class='add'>+ *</div><div class='add'>+ * Clock Generation Unit parameters used to program the PLL based on the</div><div class='add'>+ * selected TIME_REF/TCXO frequency.</div><div class='add'>+ */</div><div class='add'>+struct ice_tspll_params_e82x {</div><div class='add'>+	u8 refclk_pre_div;</div><div class='add'>+	u8 post_pll_div;</div><div class='add'>+	u8 feedback_div;</div><div class='add'>+	u32 frac_n_div;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ICE_TSPLL_CK_REFCLKFREQ_E825		0x1F</div><div class='add'>+#define ICE_TSPLL_NDIVRATIO_E825		5</div><div class='add'>+#define ICE_TSPLL_FBDIV_INTGR_E825		256</div><div class='add'>+</div><div class='add'>+int ice_tspll_cfg_pps_out_e825c(struct ice_hw *hw, bool enable);</div><div class='add'>+int ice_tspll_init(struct ice_hw *hw);</div><div class='add'>+</div><div class='add'>+#endif /* _ICE_TSPLL_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_txrx.c b/drivers/net/ethernet/intel/ice/ice_txrx.c<br/>index 5d2d7736fd5f..ad76768a4232 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_txrx.c</a></div><div class='hunk'>@@ -7,6 +7,8 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;</div><div class='ctx'> #include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+#include &lt;linux/net/intel/libie/rx.h&gt;</div><div class='add'>+#include &lt;net/libeth/xdp.h&gt;</div><div class='ctx'> #include &lt;net/dsfield.h&gt;</div><div class='ctx'> #include &lt;net/mpls.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='hunk'>@@ -20,7 +22,6 @@</div><div class='ctx'> </div><div class='ctx'> #define ICE_RX_HDR_SIZE		256</div><div class='ctx'> </div><div class='del'>-#define FDIR_DESC_RXDID 0x40</div><div class='ctx'> #define ICE_FDIR_CLEAN_DELAY 10</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -112,7 +113,7 @@ ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,</div><div class='ctx'> static void</div><div class='ctx'> ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)</div><div class='ctx'> {</div><div class='del'>-	if (dma_unmap_len(tx_buf, len))</div><div class='add'>+	if (tx_buf-&gt;type != ICE_TX_BUF_XDP_TX &amp;&amp; dma_unmap_len(tx_buf, len))</div><div class='ctx'> 		dma_unmap_page(ring-&gt;dev,</div><div class='ctx'> 			       dma_unmap_addr(tx_buf, dma),</div><div class='ctx'> 			       dma_unmap_len(tx_buf, len),</div><div class='hunk'>@@ -126,7 +127,7 @@ ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)</div><div class='ctx'> 		dev_kfree_skb_any(tx_buf-&gt;skb);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ICE_TX_BUF_XDP_TX:</div><div class='del'>-		page_frag_free(tx_buf-&gt;raw_buf);</div><div class='add'>+		libeth_xdp_return_va(tx_buf-&gt;raw_buf, false);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ICE_TX_BUF_XDP_XMIT:</div><div class='ctx'> 		xdp_return_frame(tx_buf-&gt;xdpf);</div><div class='hunk'>@@ -145,6 +146,56 @@ static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_clean_tstamp_ring - clean time stamp ring</div><div class='add'>+ * @tx_ring: Tx ring to clean the Time Stamp ring for</div><div class='add'>+ */</div><div class='add'>+static void ice_clean_tstamp_ring(struct ice_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	struct ice_tstamp_ring *tstamp_ring = tx_ring-&gt;tstamp_ring;</div><div class='add'>+	u32 size;</div><div class='add'>+</div><div class='add'>+	if (!tstamp_ring-&gt;desc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	size = ALIGN(tstamp_ring-&gt;count * sizeof(struct ice_ts_desc),</div><div class='add'>+		     PAGE_SIZE);</div><div class='add'>+	memset(tstamp_ring-&gt;desc, 0, size);</div><div class='add'>+	tstamp_ring-&gt;next_to_use = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_free_tstamp_ring - free time stamp resources per queue</div><div class='add'>+ * @tx_ring: Tx ring to free the Time Stamp ring for</div><div class='add'>+ */</div><div class='add'>+void ice_free_tstamp_ring(struct ice_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	struct ice_tstamp_ring *tstamp_ring = tx_ring-&gt;tstamp_ring;</div><div class='add'>+	u32 size;</div><div class='add'>+</div><div class='add'>+	if (!tstamp_ring-&gt;desc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ice_clean_tstamp_ring(tx_ring);</div><div class='add'>+	size = ALIGN(tstamp_ring-&gt;count * sizeof(struct ice_ts_desc),</div><div class='add'>+		     PAGE_SIZE);</div><div class='add'>+	dmam_free_coherent(tx_ring-&gt;dev, size, tstamp_ring-&gt;desc,</div><div class='add'>+			   tstamp_ring-&gt;dma);</div><div class='add'>+	tstamp_ring-&gt;desc = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_free_tx_tstamp_ring - free time stamp resources per Tx ring</div><div class='add'>+ * @tx_ring: Tx ring to free the Time Stamp ring for</div><div class='add'>+ */</div><div class='add'>+void ice_free_tx_tstamp_ring(struct ice_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	ice_free_tstamp_ring(tx_ring);</div><div class='add'>+	kfree_rcu(tx_ring-&gt;tstamp_ring, rcu);</div><div class='add'>+	tx_ring-&gt;tstamp_ring = NULL;</div><div class='add'>+	tx_ring-&gt;flags &amp;= ~ICE_TX_FLAGS_TXTIME;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_clean_tx_ring - Free any empty Tx buffers</div><div class='ctx'>  * @tx_ring: ring to be cleaned</div><div class='ctx'>  */</div><div class='hunk'>@@ -182,6 +233,9 @@ tx_skip_free:</div><div class='ctx'> </div><div class='ctx'> 	/* cleanup Tx queue statistics */</div><div class='ctx'> 	netdev_tx_reset_queue(txring_txq(tx_ring));</div><div class='add'>+</div><div class='add'>+	if (ice_is_txtime_cfg(tx_ring))</div><div class='add'>+		ice_free_tx_tstamp_ring(tx_ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -333,6 +387,84 @@ static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_alloc_tstamp_ring - allocate the Time Stamp ring</div><div class='add'>+ * @tx_ring: Tx ring to allocate the Time Stamp ring for</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative on error</div><div class='add'>+ */</div><div class='add'>+static int ice_alloc_tstamp_ring(struct ice_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	struct ice_tstamp_ring *tstamp_ring;</div><div class='add'>+</div><div class='add'>+	/* allocate with kzalloc(), free with kfree_rcu() */</div><div class='add'>+	tstamp_ring = kzalloc(sizeof(*tstamp_ring), GFP_KERNEL);</div><div class='add'>+	if (!tstamp_ring)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	tstamp_ring-&gt;tx_ring = tx_ring;</div><div class='add'>+	tx_ring-&gt;tstamp_ring = tstamp_ring;</div><div class='add'>+	tstamp_ring-&gt;desc = NULL;</div><div class='add'>+	tstamp_ring-&gt;count = ice_calc_ts_ring_count(tx_ring);</div><div class='add'>+	tx_ring-&gt;flags |= ICE_TX_FLAGS_TXTIME;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_setup_tstamp_ring - allocate the Time Stamp ring</div><div class='add'>+ * @tx_ring: Tx ring to set up the Time Stamp ring for</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative on error</div><div class='add'>+ */</div><div class='add'>+static int ice_setup_tstamp_ring(struct ice_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	struct ice_tstamp_ring *tstamp_ring = tx_ring-&gt;tstamp_ring;</div><div class='add'>+	struct device *dev = tx_ring-&gt;dev;</div><div class='add'>+	u32 size;</div><div class='add'>+</div><div class='add'>+	/* round up to nearest page */</div><div class='add'>+	size = ALIGN(tstamp_ring-&gt;count * sizeof(struct ice_ts_desc),</div><div class='add'>+		     PAGE_SIZE);</div><div class='add'>+	tstamp_ring-&gt;desc = dmam_alloc_coherent(dev, size, &amp;tstamp_ring-&gt;dma,</div><div class='add'>+						GFP_KERNEL);</div><div class='add'>+	if (!tstamp_ring-&gt;desc) {</div><div class='add'>+		dev_err(dev, "Unable to allocate memory for Time stamp Ring, size=%d\n",</div><div class='add'>+			size);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tstamp_ring-&gt;next_to_use = 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_alloc_setup_tstamp_ring - Allocate and setup the Time Stamp ring</div><div class='add'>+ * @tx_ring: Tx ring to allocate and setup the Time Stamp ring for</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative on error</div><div class='add'>+ */</div><div class='add'>+int ice_alloc_setup_tstamp_ring(struct ice_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = tx_ring-&gt;dev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ice_alloc_tstamp_ring(tx_ring);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Unable to allocate Time stamp ring for Tx ring %d\n",</div><div class='add'>+			tx_ring-&gt;q_index);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ice_setup_tstamp_ring(tx_ring);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Unable to setup Time stamp ring for Tx ring %d\n",</div><div class='add'>+			tx_ring-&gt;q_index);</div><div class='add'>+		ice_free_tx_tstamp_ring(tx_ring);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_setup_tx_ring - Allocate the Tx descriptors</div><div class='ctx'>  * @tx_ring: the Tx ring to set up</div><div class='ctx'>  *</div><div class='hunk'>@@ -376,61 +508,67 @@ err:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ice_rxq_pp_destroy(struct ice_rx_ring *rq)</div><div class='add'>+{</div><div class='add'>+	struct libeth_fq fq = {</div><div class='add'>+		.fqes	= rq-&gt;rx_fqes,</div><div class='add'>+		.pp	= rq-&gt;pp,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	libeth_rx_fq_destroy(&amp;fq);</div><div class='add'>+	rq-&gt;rx_fqes = NULL;</div><div class='add'>+	rq-&gt;pp = NULL;</div><div class='add'>+</div><div class='add'>+	if (!rq-&gt;hdr_pp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fq.fqes = rq-&gt;hdr_fqes;</div><div class='add'>+	fq.pp = rq-&gt;hdr_pp;</div><div class='add'>+</div><div class='add'>+	libeth_rx_fq_destroy(&amp;fq);</div><div class='add'>+	rq-&gt;hdr_fqes = NULL;</div><div class='add'>+	rq-&gt;hdr_pp = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_clean_rx_ring - Free Rx buffers</div><div class='ctx'>  * @rx_ring: ring to be cleaned</div><div class='ctx'>  */</div><div class='ctx'> void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)</div><div class='ctx'> {</div><div class='del'>-	struct xdp_buff *xdp = &amp;rx_ring-&gt;xdp;</div><div class='del'>-	struct device *dev = rx_ring-&gt;dev;</div><div class='ctx'> 	u32 size;</div><div class='del'>-	u16 i;</div><div class='del'>-</div><div class='del'>-	/* ring already cleared, nothing to do */</div><div class='del'>-	if (!rx_ring-&gt;rx_buf)</div><div class='del'>-		return;</div><div class='ctx'> </div><div class='ctx'> 	if (rx_ring-&gt;xsk_pool) {</div><div class='ctx'> 		ice_xsk_clean_rx_ring(rx_ring);</div><div class='ctx'> 		goto rx_skip_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (xdp-&gt;data) {</div><div class='del'>-		xdp_return_buff(xdp);</div><div class='del'>-		xdp-&gt;data = NULL;</div><div class='del'>-	}</div><div class='add'>+	/* ring already cleared, nothing to do */</div><div class='add'>+	if (!rx_ring-&gt;rx_fqes)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	libeth_xdp_return_stash(&amp;rx_ring-&gt;xdp);</div><div class='ctx'> </div><div class='ctx'> 	/* Free all the Rx ring sk_buffs */</div><div class='del'>-	for (i = 0; i &lt; rx_ring-&gt;count; i++) {</div><div class='del'>-		struct ice_rx_buf *rx_buf = &amp;rx_ring-&gt;rx_buf[i];</div><div class='add'>+	for (u32 i = rx_ring-&gt;next_to_clean; i != rx_ring-&gt;next_to_use; ) {</div><div class='add'>+		libeth_rx_recycle_slow(rx_ring-&gt;rx_fqes[i].netmem);</div><div class='ctx'> </div><div class='del'>-		if (!rx_buf-&gt;page)</div><div class='del'>-			continue;</div><div class='add'>+		if (rx_ring-&gt;hdr_pp)</div><div class='add'>+			libeth_rx_recycle_slow(rx_ring-&gt;hdr_fqes[i].netmem);</div><div class='ctx'> </div><div class='del'>-		/* Invalidate cache lines that may have been written to by</div><div class='del'>-		 * device so that we avoid corrupting memory.</div><div class='del'>-		 */</div><div class='del'>-		dma_sync_single_range_for_cpu(dev, rx_buf-&gt;dma,</div><div class='del'>-					      rx_buf-&gt;page_offset,</div><div class='del'>-					      rx_ring-&gt;rx_buf_len,</div><div class='del'>-					      DMA_FROM_DEVICE);</div><div class='del'>-</div><div class='del'>-		/* free resources associated with mapping */</div><div class='del'>-		dma_unmap_page_attrs(dev, rx_buf-&gt;dma, ice_rx_pg_size(rx_ring),</div><div class='del'>-				     DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);</div><div class='del'>-		__page_frag_cache_drain(rx_buf-&gt;page, rx_buf-&gt;pagecnt_bias);</div><div class='del'>-</div><div class='del'>-		rx_buf-&gt;page = NULL;</div><div class='del'>-		rx_buf-&gt;page_offset = 0;</div><div class='add'>+		if (unlikely(++i == rx_ring-&gt;count))</div><div class='add'>+			i = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-rx_skip_free:</div><div class='del'>-	if (rx_ring-&gt;xsk_pool)</div><div class='del'>-		memset(rx_ring-&gt;xdp_buf, 0, array_size(rx_ring-&gt;count, sizeof(*rx_ring-&gt;xdp_buf)));</div><div class='del'>-	else</div><div class='del'>-		memset(rx_ring-&gt;rx_buf, 0, array_size(rx_ring-&gt;count, sizeof(*rx_ring-&gt;rx_buf)));</div><div class='add'>+	if (rx_ring-&gt;vsi-&gt;type == ICE_VSI_PF &amp;&amp;</div><div class='add'>+	    xdp_rxq_info_is_reg(&amp;rx_ring-&gt;xdp_rxq)) {</div><div class='add'>+		xdp_rxq_info_detach_mem_model(&amp;rx_ring-&gt;xdp_rxq);</div><div class='add'>+		xdp_rxq_info_unreg(&amp;rx_ring-&gt;xdp_rxq);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	ice_rxq_pp_destroy(rx_ring);</div><div class='add'>+</div><div class='add'>+rx_skip_free:</div><div class='ctx'> 	/* Zero out the descriptor ring */</div><div class='ctx'> 	size = ALIGN(rx_ring-&gt;count * sizeof(union ice_32byte_rx_desc),</div><div class='ctx'> 		     PAGE_SIZE);</div><div class='hunk'>@@ -438,7 +576,6 @@ rx_skip_free:</div><div class='ctx'> </div><div class='ctx'> 	rx_ring-&gt;next_to_alloc = 0;</div><div class='ctx'> 	rx_ring-&gt;next_to_clean = 0;</div><div class='del'>-	rx_ring-&gt;first_desc = 0;</div><div class='ctx'> 	rx_ring-&gt;next_to_use = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -450,26 +587,20 @@ rx_skip_free:</div><div class='ctx'>  */</div><div class='ctx'> void ice_free_rx_ring(struct ice_rx_ring *rx_ring)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = ice_pf_to_dev(rx_ring-&gt;vsi-&gt;back);</div><div class='ctx'> 	u32 size;</div><div class='ctx'> </div><div class='ctx'> 	ice_clean_rx_ring(rx_ring);</div><div class='del'>-	if (rx_ring-&gt;vsi-&gt;type == ICE_VSI_PF)</div><div class='del'>-		if (xdp_rxq_info_is_reg(&amp;rx_ring-&gt;xdp_rxq))</div><div class='del'>-			xdp_rxq_info_unreg(&amp;rx_ring-&gt;xdp_rxq);</div><div class='ctx'> 	WRITE_ONCE(rx_ring-&gt;xdp_prog, NULL);</div><div class='ctx'> 	if (rx_ring-&gt;xsk_pool) {</div><div class='ctx'> 		kfree(rx_ring-&gt;xdp_buf);</div><div class='ctx'> 		rx_ring-&gt;xdp_buf = NULL;</div><div class='del'>-	} else {</div><div class='del'>-		kfree(rx_ring-&gt;rx_buf);</div><div class='del'>-		rx_ring-&gt;rx_buf = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rx_ring-&gt;desc) {</div><div class='ctx'> 		size = ALIGN(rx_ring-&gt;count * sizeof(union ice_32byte_rx_desc),</div><div class='ctx'> 			     PAGE_SIZE);</div><div class='del'>-		dmam_free_coherent(rx_ring-&gt;dev, size,</div><div class='del'>-				   rx_ring-&gt;desc, rx_ring-&gt;dma);</div><div class='add'>+		dmam_free_coherent(dev, size, rx_ring-&gt;desc, rx_ring-&gt;dma);</div><div class='ctx'> 		rx_ring-&gt;desc = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -482,19 +613,9 @@ void ice_free_rx_ring(struct ice_rx_ring *rx_ring)</div><div class='ctx'>  */</div><div class='ctx'> int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = rx_ring-&gt;dev;</div><div class='add'>+	struct device *dev = ice_pf_to_dev(rx_ring-&gt;vsi-&gt;back);</div><div class='ctx'> 	u32 size;</div><div class='ctx'> </div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	/* warn if we are about to overwrite the pointer */</div><div class='del'>-	WARN_ON(rx_ring-&gt;rx_buf);</div><div class='del'>-	rx_ring-&gt;rx_buf =</div><div class='del'>-		kcalloc(rx_ring-&gt;count, sizeof(*rx_ring-&gt;rx_buf), GFP_KERNEL);</div><div class='del'>-	if (!rx_ring-&gt;rx_buf)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	/* round up to nearest page */</div><div class='ctx'> 	size = ALIGN(rx_ring-&gt;count * sizeof(union ice_32byte_rx_desc),</div><div class='ctx'> 		     PAGE_SIZE);</div><div class='hunk'>@@ -503,22 +624,16 @@ int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)</div><div class='ctx'> 	if (!rx_ring-&gt;desc) {</div><div class='ctx'> 		dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",</div><div class='ctx'> 			size);</div><div class='del'>-		goto err;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rx_ring-&gt;next_to_use = 0;</div><div class='ctx'> 	rx_ring-&gt;next_to_clean = 0;</div><div class='del'>-	rx_ring-&gt;first_desc = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (ice_is_xdp_ena_vsi(rx_ring-&gt;vsi))</div><div class='ctx'> 		WRITE_ONCE(rx_ring-&gt;xdp_prog, rx_ring-&gt;vsi-&gt;xdp_prog);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	kfree(rx_ring-&gt;rx_buf);</div><div class='del'>-	rx_ring-&gt;rx_buf = NULL;</div><div class='del'>-	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -527,15 +642,14 @@ err:</div><div class='ctx'>  * @xdp: xdp_buff used as input to the XDP program</div><div class='ctx'>  * @xdp_prog: XDP program to run</div><div class='ctx'>  * @xdp_ring: ring to be used for XDP_TX action</div><div class='del'>- * @rx_buf: Rx buffer to store the XDP action</div><div class='ctx'>  * @eop_desc: Last descriptor in packet to read metadata from</div><div class='ctx'>  *</div><div class='ctx'>  * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}</div><div class='ctx'>  */</div><div class='del'>-static void</div><div class='del'>-ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,</div><div class='add'>+static u32</div><div class='add'>+ice_run_xdp(struct ice_rx_ring *rx_ring, struct libeth_xdp_buff *xdp,</div><div class='ctx'> 	    struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring,</div><div class='del'>-	    struct ice_rx_buf *rx_buf, union ice_32b_rx_flex_desc *eop_desc)</div><div class='add'>+	    union ice_32b_rx_flex_desc *eop_desc)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int ret = ICE_XDP_PASS;</div><div class='ctx'> 	u32 act;</div><div class='hunk'>@@ -543,23 +657,23 @@ ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,</div><div class='ctx'> 	if (!xdp_prog)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> </div><div class='del'>-	ice_xdp_meta_set_desc(xdp, eop_desc);</div><div class='add'>+	xdp-&gt;desc = eop_desc;</div><div class='ctx'> </div><div class='del'>-	act = bpf_prog_run_xdp(xdp_prog, xdp);</div><div class='add'>+	act = bpf_prog_run_xdp(xdp_prog, &amp;xdp-&gt;base);</div><div class='ctx'> 	switch (act) {</div><div class='ctx'> 	case XDP_PASS:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XDP_TX:</div><div class='ctx'> 		if (static_branch_unlikely(&amp;ice_xdp_locking_key))</div><div class='ctx'> 			spin_lock(&amp;xdp_ring-&gt;tx_lock);</div><div class='del'>-		ret = __ice_xmit_xdp_ring(xdp, xdp_ring, false);</div><div class='add'>+		ret = __ice_xmit_xdp_ring(&amp;xdp-&gt;base, xdp_ring, false);</div><div class='ctx'> 		if (static_branch_unlikely(&amp;ice_xdp_locking_key))</div><div class='ctx'> 			spin_unlock(&amp;xdp_ring-&gt;tx_lock);</div><div class='ctx'> 		if (ret == ICE_XDP_CONSUMED)</div><div class='ctx'> 			goto out_failure;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XDP_REDIRECT:</div><div class='del'>-		if (xdp_do_redirect(rx_ring-&gt;netdev, xdp, xdp_prog))</div><div class='add'>+		if (xdp_do_redirect(rx_ring-&gt;netdev, &amp;xdp-&gt;base, xdp_prog))</div><div class='ctx'> 			goto out_failure;</div><div class='ctx'> 		ret = ICE_XDP_REDIR;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -571,10 +685,12 @@ out_failure:</div><div class='ctx'> 		trace_xdp_exception(rx_ring-&gt;netdev, xdp_prog, act);</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case XDP_DROP:</div><div class='add'>+		libeth_xdp_return_buff(xdp);</div><div class='ctx'> 		ret = ICE_XDP_CONSUMED;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> exit:</div><div class='del'>-	ice_set_rx_bufs_act(xdp, rx_ring, ret);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -661,50 +777,34 @@ ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_alloc_mapped_page - recycle or make a new page</div><div class='del'>- * @rx_ring: ring to use</div><div class='del'>- * @bi: rx_buf struct to modify</div><div class='del'>- *</div><div class='del'>- * Returns true if the page was successfully allocated or</div><div class='del'>- * reused.</div><div class='add'>+ * ice_init_ctrl_rx_descs - Initialize Rx descriptors for control vsi.</div><div class='add'>+ * @rx_ring: ring to init descriptors on</div><div class='add'>+ * @count: number of descriptors to initialize</div><div class='ctx'>  */</div><div class='del'>-static bool</div><div class='del'>-ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)</div><div class='add'>+void ice_init_ctrl_rx_descs(struct ice_rx_ring *rx_ring, u32 count)</div><div class='ctx'> {</div><div class='del'>-	struct page *page = bi-&gt;page;</div><div class='del'>-	dma_addr_t dma;</div><div class='del'>-</div><div class='del'>-	/* since we are recycling buffers we should seldom need to alloc */</div><div class='del'>-	if (likely(page))</div><div class='del'>-		return true;</div><div class='add'>+	union ice_32b_rx_flex_desc *rx_desc;</div><div class='add'>+	u32 ntu = rx_ring-&gt;next_to_use;</div><div class='ctx'> </div><div class='del'>-	/* alloc new page for storage */</div><div class='del'>-	page = dev_alloc_pages(ice_rx_pg_order(rx_ring));</div><div class='del'>-	if (unlikely(!page)) {</div><div class='del'>-		rx_ring-&gt;ring_stats-&gt;rx_stats.alloc_page_failed++;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='add'>+	if (!count)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	/* map page for use */</div><div class='del'>-	dma = dma_map_page_attrs(rx_ring-&gt;dev, page, 0, ice_rx_pg_size(rx_ring),</div><div class='del'>-				 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);</div><div class='add'>+	rx_desc = ICE_RX_DESC(rx_ring, ntu);</div><div class='ctx'> </div><div class='del'>-	/* if mapping failed free memory back to system since</div><div class='del'>-	 * there isn't much point in holding memory we can't use</div><div class='del'>-	 */</div><div class='del'>-	if (dma_mapping_error(rx_ring-&gt;dev, dma)) {</div><div class='del'>-		__free_pages(page, ice_rx_pg_order(rx_ring));</div><div class='del'>-		rx_ring-&gt;ring_stats-&gt;rx_stats.alloc_page_failed++;</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='add'>+	do {</div><div class='add'>+		rx_desc++;</div><div class='add'>+		ntu++;</div><div class='add'>+		if (unlikely(ntu == rx_ring-&gt;count)) {</div><div class='add'>+			rx_desc = ICE_RX_DESC(rx_ring, 0);</div><div class='add'>+			ntu = 0;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	bi-&gt;dma = dma;</div><div class='del'>-	bi-&gt;page = page;</div><div class='del'>-	bi-&gt;page_offset = rx_ring-&gt;rx_offset;</div><div class='del'>-	page_ref_add(page, USHRT_MAX - 1);</div><div class='del'>-	bi-&gt;pagecnt_bias = USHRT_MAX;</div><div class='add'>+		rx_desc-&gt;wb.status_error0 = 0;</div><div class='add'>+		count--;</div><div class='add'>+	} while (count);</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+	if (rx_ring-&gt;next_to_use != ntu)</div><div class='add'>+		ice_release_rx_desc(rx_ring, ntu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -722,41 +822,60 @@ ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)</div><div class='ctx'>  */</div><div class='ctx'> bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, unsigned int cleaned_count)</div><div class='ctx'> {</div><div class='add'>+	const struct libeth_fq_fp hdr_fq = {</div><div class='add'>+		.pp		= rx_ring-&gt;hdr_pp,</div><div class='add'>+		.fqes		= rx_ring-&gt;hdr_fqes,</div><div class='add'>+		.truesize	= rx_ring-&gt;hdr_truesize,</div><div class='add'>+		.count		= rx_ring-&gt;count,</div><div class='add'>+	};</div><div class='add'>+	const struct libeth_fq_fp fq = {</div><div class='add'>+		.pp		= rx_ring-&gt;pp,</div><div class='add'>+		.fqes		= rx_ring-&gt;rx_fqes,</div><div class='add'>+		.truesize	= rx_ring-&gt;truesize,</div><div class='add'>+		.count		= rx_ring-&gt;count,</div><div class='add'>+	};</div><div class='ctx'> 	union ice_32b_rx_flex_desc *rx_desc;</div><div class='ctx'> 	u16 ntu = rx_ring-&gt;next_to_use;</div><div class='del'>-	struct ice_rx_buf *bi;</div><div class='ctx'> </div><div class='ctx'> 	/* do nothing if no valid netdev defined */</div><div class='del'>-	if ((!rx_ring-&gt;netdev &amp;&amp; rx_ring-&gt;vsi-&gt;type != ICE_VSI_CTRL) ||</div><div class='del'>-	    !cleaned_count)</div><div class='add'>+	if (!rx_ring-&gt;netdev || !cleaned_count)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* get the Rx descriptor and buffer based on next_to_use */</div><div class='ctx'> 	rx_desc = ICE_RX_DESC(rx_ring, ntu);</div><div class='del'>-	bi = &amp;rx_ring-&gt;rx_buf[ntu];</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		/* if we fail here, we have work remaining */</div><div class='del'>-		if (!ice_alloc_mapped_page(rx_ring, bi))</div><div class='del'>-			break;</div><div class='add'>+		dma_addr_t addr;</div><div class='ctx'> </div><div class='del'>-		/* sync the buffer for use by the device */</div><div class='del'>-		dma_sync_single_range_for_device(rx_ring-&gt;dev, bi-&gt;dma,</div><div class='del'>-						 bi-&gt;page_offset,</div><div class='del'>-						 rx_ring-&gt;rx_buf_len,</div><div class='del'>-						 DMA_FROM_DEVICE);</div><div class='add'>+		addr = libeth_rx_alloc(&amp;fq, ntu);</div><div class='add'>+		if (addr == DMA_MAPPING_ERROR) {</div><div class='add'>+			rx_ring-&gt;ring_stats-&gt;rx_stats.alloc_page_failed++;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* Refresh the desc even if buffer_addrs didn't change</div><div class='ctx'> 		 * because each write-back erases this info.</div><div class='ctx'> 		 */</div><div class='del'>-		rx_desc-&gt;read.pkt_addr = cpu_to_le64(bi-&gt;dma + bi-&gt;page_offset);</div><div class='add'>+		rx_desc-&gt;read.pkt_addr = cpu_to_le64(addr);</div><div class='add'>+</div><div class='add'>+		if (!hdr_fq.pp)</div><div class='add'>+			goto next;</div><div class='add'>+</div><div class='add'>+		addr = libeth_rx_alloc(&amp;hdr_fq, ntu);</div><div class='add'>+		if (addr == DMA_MAPPING_ERROR) {</div><div class='add'>+			rx_ring-&gt;ring_stats-&gt;rx_stats.alloc_page_failed++;</div><div class='add'>+</div><div class='add'>+			libeth_rx_recycle_slow(fq.fqes[ntu].netmem);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rx_desc-&gt;read.hdr_addr = cpu_to_le64(addr);</div><div class='ctx'> </div><div class='add'>+next:</div><div class='ctx'> 		rx_desc++;</div><div class='del'>-		bi++;</div><div class='ctx'> 		ntu++;</div><div class='ctx'> 		if (unlikely(ntu == rx_ring-&gt;count)) {</div><div class='ctx'> 			rx_desc = ICE_RX_DESC(rx_ring, 0);</div><div class='del'>-			bi = rx_ring-&gt;rx_buf;</div><div class='ctx'> 			ntu = 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -773,334 +892,41 @@ bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, unsigned int cleaned_count)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse</div><div class='del'>- * @rx_buf: Rx buffer to adjust</div><div class='del'>- * @size: Size of adjustment</div><div class='del'>- *</div><div class='del'>- * Update the offset within page so that Rx buf will be ready to be reused.</div><div class='del'>- * For systems with PAGE_SIZE &lt; 8192 this function will flip the page offset</div><div class='del'>- * so the second half of page assigned to Rx buffer will be used, otherwise</div><div class='del'>- * the offset is moved by "size" bytes</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)</div><div class='del'>-{</div><div class='del'>-#if (PAGE_SIZE &lt; 8192)</div><div class='del'>-	/* flip page offset to other buffer */</div><div class='del'>-	rx_buf-&gt;page_offset ^= size;</div><div class='del'>-#else</div><div class='del'>-	/* move offset up to the next cache line */</div><div class='del'>-	rx_buf-&gt;page_offset += size;</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_can_reuse_rx_page - Determine if page can be reused for another Rx</div><div class='del'>- * @rx_buf: buffer containing the page</div><div class='del'>- *</div><div class='del'>- * If page is reusable, we have a green light for calling ice_reuse_rx_page,</div><div class='del'>- * which will assign the current buffer to the buffer that next_to_alloc is</div><div class='del'>- * pointing to; otherwise, the DMA mapping needs to be destroyed and</div><div class='del'>- * page freed</div><div class='del'>- */</div><div class='del'>-static bool</div><div class='del'>-ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf)</div><div class='del'>-{</div><div class='del'>-	unsigned int pagecnt_bias = rx_buf-&gt;pagecnt_bias;</div><div class='del'>-	struct page *page = rx_buf-&gt;page;</div><div class='del'>-</div><div class='del'>-	/* avoid re-using remote and pfmemalloc pages */</div><div class='del'>-	if (!dev_page_is_reusable(page))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/* if we are only owner of page we can reuse it */</div><div class='del'>-	if (unlikely(rx_buf-&gt;pgcnt - pagecnt_bias &gt; 1))</div><div class='del'>-		return false;</div><div class='del'>-#if (PAGE_SIZE &gt;= 8192)</div><div class='del'>-#define ICE_LAST_OFFSET \</div><div class='del'>-	(SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_3072)</div><div class='del'>-	if (rx_buf-&gt;page_offset &gt; ICE_LAST_OFFSET)</div><div class='del'>-		return false;</div><div class='del'>-#endif /* PAGE_SIZE &gt;= 8192) */</div><div class='del'>-</div><div class='del'>-	/* If we have drained the page fragment pool we need to update</div><div class='del'>-	 * the pagecnt_bias and page count so that we fully restock the</div><div class='del'>-	 * number of references the driver holds.</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(pagecnt_bias == 1)) {</div><div class='del'>-		page_ref_add(page, USHRT_MAX - 1);</div><div class='del'>-		rx_buf-&gt;pagecnt_bias = USHRT_MAX;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_add_xdp_frag - Add contents of Rx buffer to xdp buf as a frag</div><div class='del'>- * @rx_ring: Rx descriptor ring to transact packets on</div><div class='del'>- * @xdp: xdp buff to place the data into</div><div class='del'>- * @rx_buf: buffer containing page to add</div><div class='del'>- * @size: packet length from rx_desc</div><div class='del'>- *</div><div class='del'>- * This function will add the data contained in rx_buf-&gt;page to the xdp buf.</div><div class='del'>- * It will just attach the page as a frag.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-ice_add_xdp_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,</div><div class='del'>-		 struct ice_rx_buf *rx_buf, const unsigned int size)</div><div class='del'>-{</div><div class='del'>-	struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);</div><div class='del'>-</div><div class='del'>-	if (!size)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (!xdp_buff_has_frags(xdp)) {</div><div class='del'>-		sinfo-&gt;nr_frags = 0;</div><div class='del'>-		sinfo-&gt;xdp_frags_size = 0;</div><div class='del'>-		xdp_buff_set_frags_flag(xdp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(sinfo-&gt;nr_frags == MAX_SKB_FRAGS)) {</div><div class='del'>-		ice_set_rx_bufs_act(xdp, rx_ring, ICE_XDP_CONSUMED);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__skb_fill_page_desc_noacc(sinfo, sinfo-&gt;nr_frags++, rx_buf-&gt;page,</div><div class='del'>-				   rx_buf-&gt;page_offset, size);</div><div class='del'>-	sinfo-&gt;xdp_frags_size += size;</div><div class='del'>-	/* remember frag count before XDP prog execution; bpf_xdp_adjust_tail()</div><div class='del'>-	 * can pop off frags but driver has to handle it on its own</div><div class='del'>-	 */</div><div class='del'>-	rx_ring-&gt;nr_frags = sinfo-&gt;nr_frags;</div><div class='del'>-</div><div class='del'>-	if (page_is_pfmemalloc(rx_buf-&gt;page))</div><div class='del'>-		xdp_buff_set_frag_pfmemalloc(xdp);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_reuse_rx_page - page flip buffer and store it back on the ring</div><div class='del'>- * @rx_ring: Rx descriptor ring to store buffers on</div><div class='del'>- * @old_buf: donor buffer to have page reused</div><div class='del'>- *</div><div class='del'>- * Synchronizes page for reuse by the adapter</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)</div><div class='del'>-{</div><div class='del'>-	u16 nta = rx_ring-&gt;next_to_alloc;</div><div class='del'>-	struct ice_rx_buf *new_buf;</div><div class='del'>-</div><div class='del'>-	new_buf = &amp;rx_ring-&gt;rx_buf[nta];</div><div class='del'>-</div><div class='del'>-	/* update, and store next to alloc */</div><div class='del'>-	nta++;</div><div class='del'>-	rx_ring-&gt;next_to_alloc = (nta &lt; rx_ring-&gt;count) ? nta : 0;</div><div class='del'>-</div><div class='del'>-	/* Transfer page from old buffer to new buffer.</div><div class='del'>-	 * Move each member individually to avoid possible store</div><div class='del'>-	 * forwarding stalls and unnecessary copy of skb.</div><div class='del'>-	 */</div><div class='del'>-	new_buf-&gt;dma = old_buf-&gt;dma;</div><div class='del'>-	new_buf-&gt;page = old_buf-&gt;page;</div><div class='del'>-	new_buf-&gt;page_offset = old_buf-&gt;page_offset;</div><div class='del'>-	new_buf-&gt;pagecnt_bias = old_buf-&gt;pagecnt_bias;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use</div><div class='del'>- * @rx_ring: Rx descriptor ring to transact packets on</div><div class='del'>- * @size: size of buffer to add to skb</div><div class='del'>- * @ntc: index of next to clean element</div><div class='del'>- *</div><div class='del'>- * This function will pull an Rx buffer from the ring and synchronize it</div><div class='del'>- * for use by the CPU.</div><div class='del'>- */</div><div class='del'>-static struct ice_rx_buf *</div><div class='del'>-ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,</div><div class='del'>-	       const unsigned int ntc)</div><div class='del'>-{</div><div class='del'>-	struct ice_rx_buf *rx_buf;</div><div class='del'>-</div><div class='del'>-	rx_buf = &amp;rx_ring-&gt;rx_buf[ntc];</div><div class='del'>-	rx_buf-&gt;pgcnt = page_count(rx_buf-&gt;page);</div><div class='del'>-	prefetchw(rx_buf-&gt;page);</div><div class='del'>-</div><div class='del'>-	if (!size)</div><div class='del'>-		return rx_buf;</div><div class='del'>-	/* we are reusing so sync this buffer for CPU use */</div><div class='del'>-	dma_sync_single_range_for_cpu(rx_ring-&gt;dev, rx_buf-&gt;dma,</div><div class='del'>-				      rx_buf-&gt;page_offset, size,</div><div class='del'>-				      DMA_FROM_DEVICE);</div><div class='del'>-</div><div class='del'>-	/* We have pulled a buffer for use, so decrement pagecnt_bias */</div><div class='del'>-	rx_buf-&gt;pagecnt_bias--;</div><div class='del'>-</div><div class='del'>-	return rx_buf;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_build_skb - Build skb around an existing buffer</div><div class='del'>- * @rx_ring: Rx descriptor ring to transact packets on</div><div class='del'>- * @xdp: xdp_buff pointing to the data</div><div class='del'>- *</div><div class='del'>- * This function builds an skb around an existing XDP buffer, taking care</div><div class='del'>- * to set up the skb correctly and avoid any memcpy overhead. Driver has</div><div class='del'>- * already combined frags (if any) to skb_shared_info.</div><div class='del'>- */</div><div class='del'>-static struct sk_buff *</div><div class='del'>-ice_build_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)</div><div class='del'>-{</div><div class='del'>-	u8 metasize = xdp-&gt;data - xdp-&gt;data_meta;</div><div class='del'>-	struct skb_shared_info *sinfo = NULL;</div><div class='del'>-	unsigned int nr_frags;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-	if (unlikely(xdp_buff_has_frags(xdp))) {</div><div class='del'>-		sinfo = xdp_get_shared_info_from_buff(xdp);</div><div class='del'>-		nr_frags = sinfo-&gt;nr_frags;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Prefetch first cache line of first page. If xdp-&gt;data_meta</div><div class='del'>-	 * is unused, this points exactly as xdp-&gt;data, otherwise we</div><div class='del'>-	 * likely have a consumer accessing first few bytes of meta</div><div class='del'>-	 * data, and then actual data.</div><div class='del'>-	 */</div><div class='del'>-	net_prefetch(xdp-&gt;data_meta);</div><div class='del'>-	/* build an skb around the page buffer */</div><div class='del'>-	skb = napi_build_skb(xdp-&gt;data_hard_start, xdp-&gt;frame_sz);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	/* must to record Rx queue, otherwise OS features such as</div><div class='del'>-	 * symmetric queue won't work</div><div class='del'>-	 */</div><div class='del'>-	skb_record_rx_queue(skb, rx_ring-&gt;q_index);</div><div class='del'>-</div><div class='del'>-	/* update pointers within the skb to store the data */</div><div class='del'>-	skb_reserve(skb, xdp-&gt;data - xdp-&gt;data_hard_start);</div><div class='del'>-	__skb_put(skb, xdp-&gt;data_end - xdp-&gt;data);</div><div class='del'>-	if (metasize)</div><div class='del'>-		skb_metadata_set(skb, metasize);</div><div class='del'>-</div><div class='del'>-	if (unlikely(xdp_buff_has_frags(xdp)))</div><div class='del'>-		xdp_update_skb_shared_info(skb, nr_frags,</div><div class='del'>-					   sinfo-&gt;xdp_frags_size,</div><div class='del'>-					   nr_frags * xdp-&gt;frame_sz,</div><div class='del'>-					   xdp_buff_is_frag_pfmemalloc(xdp));</div><div class='del'>-</div><div class='del'>-	return skb;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_construct_skb - Allocate skb and populate it</div><div class='del'>- * @rx_ring: Rx descriptor ring to transact packets on</div><div class='del'>- * @xdp: xdp_buff pointing to the data</div><div class='add'>+ * ice_clean_ctrl_rx_irq - Clean descriptors from flow director Rx ring</div><div class='add'>+ * @rx_ring: Rx descriptor ring for ctrl_vsi to transact packets on</div><div class='ctx'>  *</div><div class='del'>- * This function allocates an skb. It then populates it with the page</div><div class='del'>- * data from the current receive descriptor, taking care to set up the</div><div class='del'>- * skb correctly.</div><div class='add'>+ * This function cleans Rx descriptors from the ctrl_vsi Rx ring used</div><div class='add'>+ * to set flow director rules on VFs.</div><div class='ctx'>  */</div><div class='del'>-static struct sk_buff *</div><div class='del'>-ice_construct_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)</div><div class='add'>+void ice_clean_ctrl_rx_irq(struct ice_rx_ring *rx_ring)</div><div class='ctx'> {</div><div class='del'>-	unsigned int size = xdp-&gt;data_end - xdp-&gt;data;</div><div class='del'>-	struct skb_shared_info *sinfo = NULL;</div><div class='del'>-	struct ice_rx_buf *rx_buf;</div><div class='del'>-	unsigned int nr_frags = 0;</div><div class='del'>-	unsigned int headlen;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-	/* prefetch first cache line of first page */</div><div class='del'>-	net_prefetch(xdp-&gt;data);</div><div class='del'>-</div><div class='del'>-	if (unlikely(xdp_buff_has_frags(xdp))) {</div><div class='del'>-		sinfo = xdp_get_shared_info_from_buff(xdp);</div><div class='del'>-		nr_frags = sinfo-&gt;nr_frags;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* allocate a skb to store the frags */</div><div class='del'>-	skb = napi_alloc_skb(&amp;rx_ring-&gt;q_vector-&gt;napi, ICE_RX_HDR_SIZE);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	rx_buf = &amp;rx_ring-&gt;rx_buf[rx_ring-&gt;first_desc];</div><div class='del'>-	skb_record_rx_queue(skb, rx_ring-&gt;q_index);</div><div class='del'>-	/* Determine available headroom for copy */</div><div class='del'>-	headlen = size;</div><div class='del'>-	if (headlen &gt; ICE_RX_HDR_SIZE)</div><div class='del'>-		headlen = eth_get_headlen(skb-&gt;dev, xdp-&gt;data, ICE_RX_HDR_SIZE);</div><div class='del'>-</div><div class='del'>-	/* align pull length to size of long to optimize memcpy performance */</div><div class='del'>-	memcpy(__skb_put(skb, headlen), xdp-&gt;data, ALIGN(headlen,</div><div class='del'>-							 sizeof(long)));</div><div class='del'>-</div><div class='del'>-	/* if we exhaust the linear part then add what is left as a frag */</div><div class='del'>-	size -= headlen;</div><div class='del'>-	if (size) {</div><div class='del'>-		/* besides adding here a partial frag, we are going to add</div><div class='del'>-		 * frags from xdp_buff, make sure there is enough space for</div><div class='del'>-		 * them</div><div class='del'>-		 */</div><div class='del'>-		if (unlikely(nr_frags &gt;= MAX_SKB_FRAGS - 1)) {</div><div class='del'>-			dev_kfree_skb(skb);</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		skb_add_rx_frag(skb, 0, rx_buf-&gt;page,</div><div class='del'>-				rx_buf-&gt;page_offset + headlen, size,</div><div class='del'>-				xdp-&gt;frame_sz);</div><div class='del'>-	} else {</div><div class='del'>-		/* buffer is unused, change the act that should be taken later</div><div class='del'>-		 * on; data was copied onto skb's linear part so there's no</div><div class='del'>-		 * need for adjusting page offset and we can reuse this buffer</div><div class='del'>-		 * as-is</div><div class='del'>-		 */</div><div class='del'>-		rx_buf-&gt;act = ICE_SKB_CONSUMED;</div><div class='del'>-	}</div><div class='add'>+	u32 ntc = rx_ring-&gt;next_to_clean;</div><div class='add'>+	unsigned int total_rx_pkts = 0;</div><div class='add'>+	u32 cnt = rx_ring-&gt;count;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(xdp_buff_has_frags(xdp))) {</div><div class='del'>-		struct skb_shared_info *skinfo = skb_shinfo(skb);</div><div class='add'>+	while (likely(total_rx_pkts &lt; ICE_DFLT_IRQ_WORK)) {</div><div class='add'>+		struct ice_vsi *ctrl_vsi = rx_ring-&gt;vsi;</div><div class='add'>+		union ice_32b_rx_flex_desc *rx_desc;</div><div class='add'>+		u16 stat_err_bits;</div><div class='ctx'> </div><div class='del'>-		memcpy(&amp;skinfo-&gt;frags[skinfo-&gt;nr_frags], &amp;sinfo-&gt;frags[0],</div><div class='del'>-		       sizeof(skb_frag_t) * nr_frags);</div><div class='add'>+		rx_desc = ICE_RX_DESC(rx_ring, ntc);</div><div class='ctx'> </div><div class='del'>-		xdp_update_skb_shared_info(skb, skinfo-&gt;nr_frags + nr_frags,</div><div class='del'>-					   sinfo-&gt;xdp_frags_size,</div><div class='del'>-					   nr_frags * xdp-&gt;frame_sz,</div><div class='del'>-					   xdp_buff_is_frag_pfmemalloc(xdp));</div><div class='del'>-	}</div><div class='add'>+		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);</div><div class='add'>+		if (!ice_test_staterr(rx_desc-&gt;wb.status_error0, stat_err_bits))</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-	return skb;</div><div class='del'>-}</div><div class='add'>+		dma_rmb();</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ice_put_rx_buf - Clean up used buffer and either recycle or free</div><div class='del'>- * @rx_ring: Rx descriptor ring to transact packets on</div><div class='del'>- * @rx_buf: Rx buffer to pull data from</div><div class='del'>- *</div><div class='del'>- * This function will clean up the contents of the rx_buf. It will either</div><div class='del'>- * recycle the buffer or unmap it and free the associated resources.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf)</div><div class='del'>-{</div><div class='del'>-	if (!rx_buf)</div><div class='del'>-		return;</div><div class='add'>+		if (ctrl_vsi-&gt;vf)</div><div class='add'>+			ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);</div><div class='ctx'> </div><div class='del'>-	if (ice_can_reuse_rx_page(rx_buf)) {</div><div class='del'>-		/* hand second half of page back to the ring */</div><div class='del'>-		ice_reuse_rx_page(rx_ring, rx_buf);</div><div class='del'>-	} else {</div><div class='del'>-		/* we are not reusing the buffer so unmap it */</div><div class='del'>-		dma_unmap_page_attrs(rx_ring-&gt;dev, rx_buf-&gt;dma,</div><div class='del'>-				     ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,</div><div class='del'>-				     ICE_RX_DMA_ATTR);</div><div class='del'>-		__page_frag_cache_drain(rx_buf-&gt;page, rx_buf-&gt;pagecnt_bias);</div><div class='add'>+		if (++ntc == cnt)</div><div class='add'>+			ntc = 0;</div><div class='add'>+		total_rx_pkts++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* clear contents of buffer_info */</div><div class='del'>-	rx_buf-&gt;page = NULL;</div><div class='add'>+	rx_ring-&gt;next_to_clean = ntc;</div><div class='add'>+	ice_init_ctrl_rx_descs(rx_ring, ICE_DESC_UNUSED(rx_ring));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1115,20 +941,19 @@ ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf)</div><div class='ctx'>  *</div><div class='ctx'>  * Returns amount of work completed</div><div class='ctx'>  */</div><div class='del'>-int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)</div><div class='add'>+static int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int total_rx_bytes = 0, total_rx_pkts = 0;</div><div class='del'>-	unsigned int offset = rx_ring-&gt;rx_offset;</div><div class='del'>-	struct xdp_buff *xdp = &amp;rx_ring-&gt;xdp;</div><div class='del'>-	u32 cached_ntc = rx_ring-&gt;first_desc;</div><div class='ctx'> 	struct ice_tx_ring *xdp_ring = NULL;</div><div class='ctx'> 	struct bpf_prog *xdp_prog = NULL;</div><div class='ctx'> 	u32 ntc = rx_ring-&gt;next_to_clean;</div><div class='add'>+	LIBETH_XDP_ONSTACK_BUFF(xdp);</div><div class='add'>+	u32 cached_ntu, xdp_verdict;</div><div class='ctx'> 	u32 cnt = rx_ring-&gt;count;</div><div class='ctx'> 	u32 xdp_xmit = 0;</div><div class='del'>-	u32 cached_ntu;</div><div class='ctx'> 	bool failure;</div><div class='del'>-	u32 first;</div><div class='add'>+</div><div class='add'>+	libeth_xdp_init_buff(xdp, &amp;rx_ring-&gt;xdp, &amp;rx_ring-&gt;xdp_rxq);</div><div class='ctx'> </div><div class='ctx'> 	xdp_prog = READ_ONCE(rx_ring-&gt;xdp_prog);</div><div class='ctx'> 	if (xdp_prog) {</div><div class='hunk'>@@ -1139,19 +964,21 @@ int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)</div><div class='ctx'> 	/* start the loop to process Rx packets bounded by 'budget' */</div><div class='ctx'> 	while (likely(total_rx_pkts &lt; (unsigned int)budget)) {</div><div class='ctx'> 		union ice_32b_rx_flex_desc *rx_desc;</div><div class='del'>-		struct ice_rx_buf *rx_buf;</div><div class='add'>+		struct libeth_fqe *rx_buf;</div><div class='ctx'> 		struct sk_buff *skb;</div><div class='ctx'> 		unsigned int size;</div><div class='ctx'> 		u16 stat_err_bits;</div><div class='ctx'> 		u16 vlan_tci;</div><div class='add'>+		bool rxe;</div><div class='ctx'> </div><div class='ctx'> 		/* get the Rx desc from Rx ring based on 'next_to_clean' */</div><div class='ctx'> 		rx_desc = ICE_RX_DESC(rx_ring, ntc);</div><div class='ctx'> </div><div class='del'>-		/* status_error_len will always be zero for unused descriptors</div><div class='del'>-		 * because it's cleared in cleanup, and overlaps with hdr_addr</div><div class='del'>-		 * which is always zero because packet split isn't used, if the</div><div class='del'>-		 * hardware wrote DD then it will be non-zero</div><div class='add'>+		/*</div><div class='add'>+		 * The DD bit will always be zero for unused descriptors</div><div class='add'>+		 * because it's cleared in cleanup or when setting the DMA</div><div class='add'>+		 * address of the header buffer, which never uses the DD bit.</div><div class='add'>+		 * If the hardware wrote the descriptor, it will be non-zero.</div><div class='ctx'> 		 */</div><div class='ctx'> 		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);</div><div class='ctx'> 		if (!ice_test_staterr(rx_desc-&gt;wb.status_error0, stat_err_bits))</div><div class='hunk'>@@ -1164,85 +991,66 @@ int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)</div><div class='ctx'> 		dma_rmb();</div><div class='ctx'> </div><div class='ctx'> 		ice_trace(clean_rx_irq, rx_ring, rx_desc);</div><div class='del'>-		if (rx_desc-&gt;wb.rxdid == FDIR_DESC_RXDID || !rx_ring-&gt;netdev) {</div><div class='del'>-			struct ice_vsi *ctrl_vsi = rx_ring-&gt;vsi;</div><div class='del'>-</div><div class='del'>-			if (rx_desc-&gt;wb.rxdid == FDIR_DESC_RXDID &amp;&amp;</div><div class='del'>-			    ctrl_vsi-&gt;vf)</div><div class='del'>-				ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);</div><div class='del'>-			if (++ntc == cnt)</div><div class='del'>-				ntc = 0;</div><div class='del'>-			rx_ring-&gt;first_desc = ntc;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='add'>+		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_HBO_S) |</div><div class='add'>+				BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);</div><div class='add'>+		rxe = ice_test_staterr(rx_desc-&gt;wb.status_error0,</div><div class='add'>+				       stat_err_bits);</div><div class='add'>+</div><div class='add'>+		if (!rx_ring-&gt;hdr_pp)</div><div class='add'>+			goto payload;</div><div class='add'>+</div><div class='add'>+		size = le16_get_bits(rx_desc-&gt;wb.hdr_len_sph_flex_flags1,</div><div class='add'>+				     ICE_RX_FLEX_DESC_HDR_LEN_M);</div><div class='add'>+		if (unlikely(rxe))</div><div class='add'>+			size = 0;</div><div class='add'>+</div><div class='add'>+		rx_buf = &amp;rx_ring-&gt;hdr_fqes[ntc];</div><div class='add'>+		libeth_xdp_process_buff(xdp, rx_buf, size);</div><div class='add'>+		rx_buf-&gt;netmem = 0;</div><div class='add'>+</div><div class='add'>+payload:</div><div class='ctx'> 		size = le16_to_cpu(rx_desc-&gt;wb.pkt_len) &amp;</div><div class='ctx'> 			ICE_RX_FLX_DESC_PKT_LEN_M;</div><div class='add'>+		if (unlikely(rxe))</div><div class='add'>+			size = 0;</div><div class='ctx'> </div><div class='ctx'> 		/* retrieve a buffer from the ring */</div><div class='del'>-		rx_buf = ice_get_rx_buf(rx_ring, size, ntc);</div><div class='del'>-</div><div class='del'>-		if (!xdp-&gt;data) {</div><div class='del'>-			void *hard_start;</div><div class='add'>+		rx_buf = &amp;rx_ring-&gt;rx_fqes[ntc];</div><div class='add'>+		libeth_xdp_process_buff(xdp, rx_buf, size);</div><div class='ctx'> </div><div class='del'>-			hard_start = page_address(rx_buf-&gt;page) + rx_buf-&gt;page_offset -</div><div class='del'>-				     offset;</div><div class='del'>-			xdp_prepare_buff(xdp, hard_start, offset, size, !!offset);</div><div class='del'>-			xdp_buff_clear_frags_flag(xdp);</div><div class='del'>-		} else if (ice_add_xdp_frag(rx_ring, xdp, rx_buf, size)) {</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='ctx'> 		if (++ntc == cnt)</div><div class='ctx'> 			ntc = 0;</div><div class='ctx'> </div><div class='ctx'> 		/* skip if it is NOP desc */</div><div class='del'>-		if (ice_is_non_eop(rx_ring, rx_desc))</div><div class='add'>+		if (ice_is_non_eop(rx_ring, rx_desc) || unlikely(!xdp-&gt;data))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		ice_run_xdp(rx_ring, xdp, xdp_prog, xdp_ring, rx_buf, rx_desc);</div><div class='del'>-		if (rx_buf-&gt;act == ICE_XDP_PASS)</div><div class='add'>+		xdp_verdict = ice_run_xdp(rx_ring, xdp, xdp_prog, xdp_ring, rx_desc);</div><div class='add'>+		if (xdp_verdict == ICE_XDP_PASS)</div><div class='ctx'> 			goto construct_skb;</div><div class='del'>-		total_rx_bytes += xdp_get_buff_len(xdp);</div><div class='add'>+</div><div class='add'>+		if (xdp_verdict &amp; (ICE_XDP_TX | ICE_XDP_REDIR))</div><div class='add'>+			xdp_xmit |= xdp_verdict;</div><div class='add'>+		total_rx_bytes += xdp_get_buff_len(&amp;xdp-&gt;base);</div><div class='ctx'> 		total_rx_pkts++;</div><div class='ctx'> </div><div class='ctx'> 		xdp-&gt;data = NULL;</div><div class='del'>-		rx_ring-&gt;first_desc = ntc;</div><div class='del'>-		rx_ring-&gt;nr_frags = 0;</div><div class='ctx'> 		continue;</div><div class='add'>+</div><div class='ctx'> construct_skb:</div><div class='del'>-		if (likely(ice_ring_uses_build_skb(rx_ring)))</div><div class='del'>-			skb = ice_build_skb(rx_ring, xdp);</div><div class='del'>-		else</div><div class='del'>-			skb = ice_construct_skb(rx_ring, xdp);</div><div class='del'>-		/* exit if we failed to retrieve a buffer */</div><div class='del'>-		if (!skb) {</div><div class='del'>-			rx_ring-&gt;ring_stats-&gt;rx_stats.alloc_page_failed++;</div><div class='del'>-			rx_buf-&gt;act = ICE_XDP_CONSUMED;</div><div class='del'>-			if (unlikely(xdp_buff_has_frags(xdp)))</div><div class='del'>-				ice_set_rx_bufs_act(xdp, rx_ring,</div><div class='del'>-						    ICE_XDP_CONSUMED);</div><div class='del'>-			xdp-&gt;data = NULL;</div><div class='del'>-			rx_ring-&gt;first_desc = ntc;</div><div class='del'>-			rx_ring-&gt;nr_frags = 0;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+		skb = xdp_build_skb_from_buff(&amp;xdp-&gt;base);</div><div class='ctx'> 		xdp-&gt;data = NULL;</div><div class='del'>-		rx_ring-&gt;first_desc = ntc;</div><div class='del'>-		rx_ring-&gt;nr_frags = 0;</div><div class='ctx'> </div><div class='del'>-		stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);</div><div class='del'>-		if (unlikely(ice_test_staterr(rx_desc-&gt;wb.status_error0,</div><div class='del'>-					      stat_err_bits))) {</div><div class='del'>-			dev_kfree_skb_any(skb);</div><div class='add'>+		/* exit if we failed to retrieve a buffer */</div><div class='add'>+		if (!skb) {</div><div class='add'>+			libeth_xdp_return_buff_slow(xdp);</div><div class='add'>+			rx_ring-&gt;ring_stats-&gt;rx_stats.alloc_buf_failed++;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		vlan_tci = ice_get_vlan_tci(rx_desc);</div><div class='ctx'> </div><div class='del'>-		/* pad the skb if needed, to make a valid ethernet frame */</div><div class='del'>-		if (eth_skb_pad(skb))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='ctx'> 		/* probably a little skewed due to removing CRC */</div><div class='ctx'> 		total_rx_bytes += skb-&gt;len;</div><div class='ctx'> </div><div class='hunk'>@@ -1257,30 +1065,15 @@ construct_skb:</div><div class='ctx'> 		total_rx_pkts++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	first = rx_ring-&gt;first_desc;</div><div class='del'>-	while (cached_ntc != first) {</div><div class='del'>-		struct ice_rx_buf *buf = &amp;rx_ring-&gt;rx_buf[cached_ntc];</div><div class='del'>-</div><div class='del'>-		if (buf-&gt;act &amp; (ICE_XDP_TX | ICE_XDP_REDIR)) {</div><div class='del'>-			ice_rx_buf_adjust_pg_offset(buf, xdp-&gt;frame_sz);</div><div class='del'>-			xdp_xmit |= buf-&gt;act;</div><div class='del'>-		} else if (buf-&gt;act &amp; ICE_XDP_CONSUMED) {</div><div class='del'>-			buf-&gt;pagecnt_bias++;</div><div class='del'>-		} else if (buf-&gt;act == ICE_XDP_PASS) {</div><div class='del'>-			ice_rx_buf_adjust_pg_offset(buf, xdp-&gt;frame_sz);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ice_put_rx_buf(rx_ring, buf);</div><div class='del'>-		if (++cached_ntc &gt;= cnt)</div><div class='del'>-			cached_ntc = 0;</div><div class='del'>-	}</div><div class='ctx'> 	rx_ring-&gt;next_to_clean = ntc;</div><div class='ctx'> 	/* return up to cleaned_count buffers to hardware */</div><div class='del'>-	failure = ice_alloc_rx_bufs(rx_ring, ICE_RX_DESC_UNUSED(rx_ring));</div><div class='add'>+	failure = ice_alloc_rx_bufs(rx_ring, ICE_DESC_UNUSED(rx_ring));</div><div class='ctx'> </div><div class='ctx'> 	if (xdp_xmit)</div><div class='ctx'> 		ice_finalize_xdp_rx(xdp_ring, xdp_xmit, cached_ntu);</div><div class='ctx'> </div><div class='add'>+	libeth_xdp_save_buff(&amp;rx_ring-&gt;xdp, xdp);</div><div class='add'>+</div><div class='ctx'> 	if (rx_ring-&gt;ring_stats)</div><div class='ctx'> 		ice_update_rx_ring_stats(rx_ring, total_rx_pkts,</div><div class='ctx'> 					 total_rx_bytes);</div><div class='hunk'>@@ -1722,10 +1515,46 @@ ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,</div><div class='ctx'> 	/* notify HW of packet */</div><div class='ctx'> 	kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first-&gt;bytecount,</div><div class='ctx'> 				      netdev_xmit_more());</div><div class='del'>-	if (kick)</div><div class='del'>-		/* notify HW of packet */</div><div class='del'>-		writel(i, tx_ring-&gt;tail);</div><div class='add'>+	if (!kick)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='add'>+	if (ice_is_txtime_cfg(tx_ring)) {</div><div class='add'>+		struct ice_tstamp_ring *tstamp_ring = tx_ring-&gt;tstamp_ring;</div><div class='add'>+		u32 tstamp_count = tstamp_ring-&gt;count;</div><div class='add'>+		u32 j = tstamp_ring-&gt;next_to_use;</div><div class='add'>+		struct ice_ts_desc *ts_desc;</div><div class='add'>+		struct timespec64 ts;</div><div class='add'>+		u32 tstamp;</div><div class='add'>+</div><div class='add'>+		ts = ktime_to_timespec64(first-&gt;skb-&gt;tstamp);</div><div class='add'>+		tstamp = ts.tv_nsec &gt;&gt; ICE_TXTIME_CTX_RESOLUTION_128NS;</div><div class='add'>+</div><div class='add'>+		ts_desc = ICE_TS_DESC(tstamp_ring, j);</div><div class='add'>+		ts_desc-&gt;tx_desc_idx_tstamp = ice_build_tstamp_desc(i, tstamp);</div><div class='add'>+</div><div class='add'>+		j++;</div><div class='add'>+		if (j == tstamp_count) {</div><div class='add'>+			u32 fetch = tstamp_count - tx_ring-&gt;count;</div><div class='add'>+</div><div class='add'>+			j = 0;</div><div class='add'>+</div><div class='add'>+			/* To prevent an MDD, when wrapping the tstamp ring</div><div class='add'>+			 * create additional TS descriptors equal to the number</div><div class='add'>+			 * of the fetch TS descriptors value. HW will merge the</div><div class='add'>+			 * TS descriptors with the same timestamp value into a</div><div class='add'>+			 * single descriptor.</div><div class='add'>+			 */</div><div class='add'>+			for (; j &lt; fetch; j++) {</div><div class='add'>+				ts_desc = ICE_TS_DESC(tstamp_ring, j);</div><div class='add'>+				ts_desc-&gt;tx_desc_idx_tstamp =</div><div class='add'>+				       ice_build_tstamp_desc(i, tstamp);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		tstamp_ring-&gt;next_to_use = j;</div><div class='add'>+		writel_relaxed(j, tstamp_ring-&gt;tail);</div><div class='add'>+	} else {</div><div class='add'>+		writel_relaxed(i, tx_ring-&gt;tail);</div><div class='add'>+	}</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> dma_error:</div><div class='hunk'>@@ -1753,6 +1582,7 @@ dma_error:</div><div class='ctx'> static</div><div class='ctx'> int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)</div><div class='ctx'> {</div><div class='add'>+	const struct ice_tx_ring *tx_ring = off-&gt;tx_ring;</div><div class='ctx'> 	u32 l4_len = 0, l3_len = 0, l2_len = 0;</div><div class='ctx'> 	struct sk_buff *skb = first-&gt;skb;</div><div class='ctx'> 	union {</div><div class='hunk'>@@ -1902,6 +1732,30 @@ int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)</div><div class='ctx'> 	l3_len = l4.hdr - ip.hdr;</div><div class='ctx'> 	offset |= (l3_len / 4) &lt;&lt; ICE_TX_DESC_LEN_IPLEN_S;</div><div class='ctx'> </div><div class='add'>+	if ((tx_ring-&gt;netdev-&gt;features &amp; NETIF_F_HW_CSUM) &amp;&amp;</div><div class='add'>+	    !(first-&gt;tx_flags &amp; ICE_TX_FLAGS_TSO) &amp;&amp;</div><div class='add'>+	    !skb_csum_is_sctp(skb)) {</div><div class='add'>+		/* Set GCS */</div><div class='add'>+		u16 csum_start = (skb-&gt;csum_start - skb-&gt;mac_header) / 2;</div><div class='add'>+		u16 csum_offset = skb-&gt;csum_offset / 2;</div><div class='add'>+		u16 gcs_params;</div><div class='add'>+</div><div class='add'>+		gcs_params = FIELD_PREP(ICE_TX_GCS_DESC_START_M, csum_start) |</div><div class='add'>+			     FIELD_PREP(ICE_TX_GCS_DESC_OFFSET_M, csum_offset) |</div><div class='add'>+			     FIELD_PREP(ICE_TX_GCS_DESC_TYPE_M,</div><div class='add'>+					ICE_TX_GCS_DESC_CSUM_PSH);</div><div class='add'>+</div><div class='add'>+		/* Unlike legacy HW checksums, GCS requires a context</div><div class='add'>+		 * descriptor.</div><div class='add'>+		 */</div><div class='add'>+		off-&gt;cd_qw1 |= ICE_TX_DESC_DTYPE_CTX;</div><div class='add'>+		off-&gt;cd_gcs_params = gcs_params;</div><div class='add'>+		/* Fill out CSO info in data descriptors */</div><div class='add'>+		off-&gt;td_offset |= offset;</div><div class='add'>+		off-&gt;td_cmd |= cmd;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Enable L4 checksum offloads */</div><div class='ctx'> 	switch (l4_proto) {</div><div class='ctx'> 	case IPPROTO_TCP:</div><div class='hunk'>@@ -2359,17 +2213,20 @@ ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)</div><div class='ctx'> </div><div class='ctx'> 	/* allow CONTROL frames egress from main VSI if FW LLDP disabled */</div><div class='ctx'> 	eth = (struct ethhdr *)skb_mac_header(skb);</div><div class='del'>-	if (unlikely((skb-&gt;priority == TC_PRIO_CONTROL ||</div><div class='del'>-		      eth-&gt;h_proto == htons(ETH_P_LLDP)) &amp;&amp;</div><div class='del'>-		     vsi-&gt;type == ICE_VSI_PF &amp;&amp;</div><div class='del'>-		     vsi-&gt;port_info-&gt;qos_cfg.is_sw_lldp))</div><div class='add'>+</div><div class='add'>+	if ((ice_is_switchdev_running(vsi-&gt;back) ||</div><div class='add'>+	     ice_lag_is_switchdev_running(vsi-&gt;back)) &amp;&amp;</div><div class='add'>+	    vsi-&gt;type != ICE_VSI_SF)</div><div class='add'>+		ice_eswitch_set_target_vsi(skb, &amp;offload);</div><div class='add'>+	else if (unlikely((skb-&gt;priority == TC_PRIO_CONTROL ||</div><div class='add'>+			   eth-&gt;h_proto == htons(ETH_P_LLDP)) &amp;&amp;</div><div class='add'>+			   vsi-&gt;type == ICE_VSI_PF &amp;&amp;</div><div class='add'>+			   vsi-&gt;port_info-&gt;qos_cfg.is_sw_lldp))</div><div class='ctx'> 		offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |</div><div class='ctx'> 					ICE_TX_CTX_DESC_SWTCH_UPLINK &lt;&lt;</div><div class='ctx'> 					ICE_TXD_CTX_QW1_CMD_S);</div><div class='ctx'> </div><div class='ctx'> 	ice_tstamp(tx_ring, skb, first, &amp;offload);</div><div class='del'>-	if (ice_is_switchdev_running(vsi-&gt;back) &amp;&amp; vsi-&gt;type != ICE_VSI_SF)</div><div class='del'>-		ice_eswitch_set_target_vsi(skb, &amp;offload);</div><div class='ctx'> </div><div class='ctx'> 	if (offload.cd_qw1 &amp; ICE_TX_DESC_DTYPE_CTX) {</div><div class='ctx'> 		struct ice_tx_ctx_desc *cdesc;</div><div class='hunk'>@@ -2383,7 +2240,7 @@ ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)</div><div class='ctx'> 		/* setup context descriptor */</div><div class='ctx'> 		cdesc-&gt;tunneling_params = cpu_to_le32(offload.cd_tunnel_params);</div><div class='ctx'> 		cdesc-&gt;l2tag2 = cpu_to_le16(offload.cd_l2tag2);</div><div class='del'>-		cdesc-&gt;rsvd = cpu_to_le16(0);</div><div class='add'>+		cdesc-&gt;gcs = cpu_to_le16(offload.cd_gcs_params);</div><div class='ctx'> 		cdesc-&gt;qw1 = cpu_to_le64(offload.cd_qw1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_txrx.h b/drivers/net/ethernet/intel/ice/ice_txrx.h<br/>index cb347c852ba9..e440c55d9e9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_txrx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_txrx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_txrx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_txrx.h</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> #ifndef _ICE_TXRX_H_</div><div class='ctx'> #define _ICE_TXRX_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;net/libeth/types.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "ice_type.h"</div><div class='ctx'> </div><div class='ctx'> #define ICE_DFLT_IRQ_WORK	256</div><div class='hunk'>@@ -27,72 +29,6 @@</div><div class='ctx'> </div><div class='ctx'> #define ICE_MAX_TXQ_PER_TXQG	128</div><div class='ctx'> </div><div class='del'>-/* Attempt to maximize the headroom available for incoming frames. We use a 2K</div><div class='del'>- * buffer for MTUs &lt;= 1500 and need 1536/1534 to store the data for the frame.</div><div class='del'>- * This leaves us with 512 bytes of room.  From that we need to deduct the</div><div class='del'>- * space needed for the shared info and the padding needed to IP align the</div><div class='del'>- * frame.</div><div class='del'>- *</div><div class='del'>- * Note: For cache line sizes 256 or larger this value is going to end</div><div class='del'>- *	 up negative.  In these cases we should fall back to the legacy</div><div class='del'>- *	 receive path.</div><div class='del'>- */</div><div class='del'>-#if (PAGE_SIZE &lt; 8192)</div><div class='del'>-#define ICE_2K_TOO_SMALL_WITH_PADDING \</div><div class='del'>-	((unsigned int)(NET_SKB_PAD + ICE_RXBUF_1536) &gt; \</div><div class='del'>-			SKB_WITH_OVERHEAD(ICE_RXBUF_2048))</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_compute_pad - compute the padding</div><div class='del'>- * @rx_buf_len: buffer length</div><div class='del'>- *</div><div class='del'>- * Figure out the size of half page based on given buffer length and</div><div class='del'>- * then subtract the skb_shared_info followed by subtraction of the</div><div class='del'>- * actual buffer length; this in turn results in the actual space that</div><div class='del'>- * is left for padding usage</div><div class='del'>- */</div><div class='del'>-static inline int ice_compute_pad(int rx_buf_len)</div><div class='del'>-{</div><div class='del'>-	int half_page_size;</div><div class='del'>-</div><div class='del'>-	half_page_size = ALIGN(rx_buf_len, PAGE_SIZE / 2);</div><div class='del'>-	return SKB_WITH_OVERHEAD(half_page_size) - rx_buf_len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_skb_pad - determine the padding that we can supply</div><div class='del'>- *</div><div class='del'>- * Figure out the right Rx buffer size and based on that calculate the</div><div class='del'>- * padding</div><div class='del'>- */</div><div class='del'>-static inline int ice_skb_pad(void)</div><div class='del'>-{</div><div class='del'>-	int rx_buf_len;</div><div class='del'>-</div><div class='del'>-	/* If a 2K buffer cannot handle a standard Ethernet frame then</div><div class='del'>-	 * optimize padding for a 3K buffer instead of a 1.5K buffer.</div><div class='del'>-	 *</div><div class='del'>-	 * For a 3K buffer we need to add enough padding to allow for</div><div class='del'>-	 * tailroom due to NET_IP_ALIGN possibly shifting us out of</div><div class='del'>-	 * cache-line alignment.</div><div class='del'>-	 */</div><div class='del'>-	if (ICE_2K_TOO_SMALL_WITH_PADDING)</div><div class='del'>-		rx_buf_len = ICE_RXBUF_3072 + SKB_DATA_ALIGN(NET_IP_ALIGN);</div><div class='del'>-	else</div><div class='del'>-		rx_buf_len = ICE_RXBUF_1536;</div><div class='del'>-</div><div class='del'>-	/* if needed make room for NET_IP_ALIGN */</div><div class='del'>-	rx_buf_len -= NET_IP_ALIGN;</div><div class='del'>-</div><div class='del'>-	return ice_compute_pad(rx_buf_len);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define ICE_SKB_PAD ice_skb_pad()</div><div class='del'>-#else</div><div class='del'>-#define ICE_2K_TOO_SMALL_WITH_PADDING false</div><div class='del'>-#define ICE_SKB_PAD (NET_SKB_PAD + NET_IP_ALIGN)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> /* We are assuming that the cache line is always 64 Bytes here for ice.</div><div class='ctx'>  * In order to make sure that is a correct assumption there is a check in probe</div><div class='ctx'>  * to print a warning if the read from GLPCI_CNF2 tells us that the cache line</div><div class='hunk'>@@ -112,10 +48,6 @@ static inline int ice_skb_pad(void)</div><div class='ctx'> 	(u16)((((R)-&gt;next_to_clean &gt; (R)-&gt;next_to_use) ? 0 : (R)-&gt;count) + \</div><div class='ctx'> 	      (R)-&gt;next_to_clean - (R)-&gt;next_to_use - 1)</div><div class='ctx'> </div><div class='del'>-#define ICE_RX_DESC_UNUSED(R)	\</div><div class='del'>-	((((R)-&gt;first_desc &gt; (R)-&gt;next_to_use) ? 0 : (R)-&gt;count) + \</div><div class='del'>-	      (R)-&gt;first_desc - (R)-&gt;next_to_use - 1)</div><div class='del'>-</div><div class='ctx'> #define ICE_RING_QUARTER(R) ((R)-&gt;count &gt;&gt; 2)</div><div class='ctx'> </div><div class='ctx'> #define ICE_TX_FLAGS_TSO	BIT(0)</div><div class='hunk'>@@ -193,18 +125,10 @@ struct ice_tx_offload_params {</div><div class='ctx'> 	u32 td_l2tag1;</div><div class='ctx'> 	u32 cd_tunnel_params;</div><div class='ctx'> 	u16 cd_l2tag2;</div><div class='add'>+	u16 cd_gcs_params;</div><div class='ctx'> 	u8 header_len;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ice_rx_buf {</div><div class='del'>-	dma_addr_t dma;</div><div class='del'>-	struct page *page;</div><div class='del'>-	unsigned int page_offset;</div><div class='del'>-	unsigned int pgcnt;</div><div class='del'>-	unsigned int act;</div><div class='del'>-	unsigned int pagecnt_bias;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct ice_q_stats {</div><div class='ctx'> 	u64 pkts;</div><div class='ctx'> 	u64 bytes;</div><div class='hunk'>@@ -262,15 +186,6 @@ struct ice_pkt_ctx {</div><div class='ctx'> 	__be16 vlan_proto;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ice_xdp_buff {</div><div class='del'>-	struct xdp_buff xdp_buff;</div><div class='del'>-	const union ice_32b_rx_flex_desc *eop_desc;</div><div class='del'>-	const struct ice_pkt_ctx *pkt_ctx;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Required for compatibility with xdp_buffs from xsk_pool */</div><div class='del'>-static_assert(offsetof(struct ice_xdp_buff, xdp_buff) == 0);</div><div class='del'>-</div><div class='ctx'> /* indices into GLINT_ITR registers */</div><div class='ctx'> #define ICE_RX_ITR	ICE_IDX_ITR0</div><div class='ctx'> #define ICE_TX_ITR	ICE_IDX_ITR1</div><div class='hunk'>@@ -310,10 +225,20 @@ enum ice_dynamic_itr {</div><div class='ctx'> #define ICE_TX_LEGACY	1</div><div class='ctx'> </div><div class='ctx'> /* descriptor ring, associated with a VSI */</div><div class='add'>+struct ice_tstamp_ring {</div><div class='add'>+	struct ice_tx_ring *tx_ring;	/* Backreference to associated Tx ring */</div><div class='add'>+	dma_addr_t dma;			/* physical address of ring */</div><div class='add'>+	struct rcu_head rcu;            /* to avoid race on free */</div><div class='add'>+	u8 __iomem *tail;</div><div class='add'>+	void *desc;</div><div class='add'>+	u16 next_to_use;</div><div class='add'>+	u16 count;</div><div class='add'>+} ____cacheline_internodealigned_in_smp;</div><div class='add'>+</div><div class='ctx'> struct ice_rx_ring {</div><div class='ctx'> 	/* CL1 - 1st cacheline starts here */</div><div class='ctx'> 	void *desc;			/* Descriptor ring memory */</div><div class='del'>-	struct device *dev;		/* Used for DMA mapping */</div><div class='add'>+	struct page_pool *pp;</div><div class='ctx'> 	struct net_device *netdev;	/* netdev ring maps to */</div><div class='ctx'> 	struct ice_vsi *vsi;		/* Backreference to associated VSI */</div><div class='ctx'> 	struct ice_q_vector *q_vector;	/* Backreference to associated vector */</div><div class='hunk'>@@ -325,14 +250,19 @@ struct ice_rx_ring {</div><div class='ctx'> 	u16 next_to_alloc;</div><div class='ctx'> </div><div class='ctx'> 	union {</div><div class='del'>-		struct ice_rx_buf *rx_buf;</div><div class='add'>+		struct libeth_fqe *rx_fqes;</div><div class='ctx'> 		struct xdp_buff **xdp_buf;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='ctx'> 	/* CL2 - 2nd cacheline starts here */</div><div class='add'>+	struct libeth_fqe *hdr_fqes;</div><div class='add'>+	struct page_pool *hdr_pp;</div><div class='add'>+</div><div class='ctx'> 	union {</div><div class='del'>-		struct ice_xdp_buff xdp_ext;</div><div class='del'>-		struct xdp_buff xdp;</div><div class='add'>+		struct libeth_xdp_buff_stash xdp;</div><div class='add'>+		struct libeth_xdp_buff *xsk;</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='ctx'> 	/* CL3 - 3rd cacheline starts here */</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct ice_pkt_ctx pkt_ctx;</div><div class='hunk'>@@ -342,12 +272,13 @@ struct ice_rx_ring {</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> 	struct bpf_prog *xdp_prog;</div><div class='del'>-	u16 rx_offset;</div><div class='ctx'> </div><div class='ctx'> 	/* used in interrupt processing */</div><div class='ctx'> 	u16 next_to_use;</div><div class='ctx'> 	u16 next_to_clean;</div><div class='del'>-	u16 first_desc;</div><div class='add'>+</div><div class='add'>+	u32 hdr_truesize;</div><div class='add'>+	u32 truesize;</div><div class='ctx'> </div><div class='ctx'> 	/* stats structs */</div><div class='ctx'> 	struct ice_ring_stats *ring_stats;</div><div class='hunk'>@@ -358,15 +289,14 @@ struct ice_rx_ring {</div><div class='ctx'> 	struct ice_tx_ring *xdp_ring;</div><div class='ctx'> 	struct ice_rx_ring *next;	/* pointer to next ring in q_vector */</div><div class='ctx'> 	struct xsk_buff_pool *xsk_pool;</div><div class='del'>-	u32 nr_frags;</div><div class='del'>-	u16 max_frame;</div><div class='add'>+	u16 rx_hdr_len;</div><div class='ctx'> 	u16 rx_buf_len;</div><div class='ctx'> 	dma_addr_t dma;			/* physical address of ring */</div><div class='ctx'> 	u8 dcb_tc;			/* Traffic class of ring */</div><div class='ctx'> 	u8 ptp_rx;</div><div class='del'>-#define ICE_RX_FLAGS_RING_BUILD_SKB	BIT(1)</div><div class='ctx'> #define ICE_RX_FLAGS_CRC_STRIP_DIS	BIT(2)</div><div class='ctx'> #define ICE_RX_FLAGS_MULTIDEV		BIT(3)</div><div class='add'>+#define ICE_RX_FLAGS_RING_GCS		BIT(4)</div><div class='ctx'> 	u8 flags;</div><div class='ctx'> 	/* CL5 - 5th cacheline starts here */</div><div class='ctx'> 	struct xdp_rxq_info xdp_rxq;</div><div class='hunk'>@@ -402,29 +332,16 @@ struct ice_tx_ring {</div><div class='ctx'> 	spinlock_t tx_lock;</div><div class='ctx'> 	u32 txq_teid;			/* Added Tx queue TEID */</div><div class='ctx'> 	/* CL4 - 4th cacheline starts here */</div><div class='add'>+	struct ice_tstamp_ring *tstamp_ring;</div><div class='ctx'> #define ICE_TX_FLAGS_RING_XDP		BIT(0)</div><div class='ctx'> #define ICE_TX_FLAGS_RING_VLAN_L2TAG1	BIT(1)</div><div class='ctx'> #define ICE_TX_FLAGS_RING_VLAN_L2TAG2	BIT(2)</div><div class='add'>+#define ICE_TX_FLAGS_TXTIME		BIT(3)</div><div class='ctx'> 	u8 flags;</div><div class='ctx'> 	u8 dcb_tc;			/* Traffic class of ring */</div><div class='ctx'> 	u16 quanta_prof_id;</div><div class='ctx'> } ____cacheline_internodealigned_in_smp;</div><div class='ctx'> </div><div class='del'>-static inline bool ice_ring_uses_build_skb(struct ice_rx_ring *ring)</div><div class='del'>-{</div><div class='del'>-	return !!(ring-&gt;flags &amp; ICE_RX_FLAGS_RING_BUILD_SKB);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void ice_set_ring_build_skb_ena(struct ice_rx_ring *ring)</div><div class='del'>-{</div><div class='del'>-	ring-&gt;flags |= ICE_RX_FLAGS_RING_BUILD_SKB;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void ice_clear_ring_build_skb_ena(struct ice_rx_ring *ring)</div><div class='del'>-{</div><div class='del'>-	ring-&gt;flags &amp;= ~ICE_RX_FLAGS_RING_BUILD_SKB;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline bool ice_ring_ch_enabled(struct ice_tx_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	return !!ring-&gt;ch;</div><div class='hunk'>@@ -479,17 +396,13 @@ struct ice_coalesce_stored {</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int ice_rx_pg_order(struct ice_rx_ring *ring)</div><div class='ctx'> {</div><div class='del'>-#if (PAGE_SIZE &lt; 8192)</div><div class='del'>-	if (ring-&gt;rx_buf_len &gt; (PAGE_SIZE / 2))</div><div class='del'>-		return 1;</div><div class='del'>-#endif</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define ice_rx_pg_size(_ring) (PAGE_SIZE &lt;&lt; ice_rx_pg_order(_ring))</div><div class='del'>-</div><div class='ctx'> union ice_32b_rx_flex_desc;</div><div class='ctx'> </div><div class='add'>+void ice_init_ctrl_rx_descs(struct ice_rx_ring *rx_ring, u32 num_descs);</div><div class='add'>+void ice_rxq_pp_destroy(struct ice_rx_ring *rq);</div><div class='ctx'> bool ice_alloc_rx_bufs(struct ice_rx_ring *rxr, unsigned int cleaned_count);</div><div class='ctx'> netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev);</div><div class='ctx'> u16</div><div class='hunk'>@@ -499,12 +412,15 @@ void ice_clean_tx_ring(struct ice_tx_ring *tx_ring);</div><div class='ctx'> void ice_clean_rx_ring(struct ice_rx_ring *rx_ring);</div><div class='ctx'> int ice_setup_tx_ring(struct ice_tx_ring *tx_ring);</div><div class='ctx'> int ice_setup_rx_ring(struct ice_rx_ring *rx_ring);</div><div class='add'>+int ice_alloc_setup_tstamp_ring(struct ice_tx_ring *tx_ring);</div><div class='ctx'> void ice_free_tx_ring(struct ice_tx_ring *tx_ring);</div><div class='ctx'> void ice_free_rx_ring(struct ice_rx_ring *rx_ring);</div><div class='ctx'> int ice_napi_poll(struct napi_struct *napi, int budget);</div><div class='ctx'> int</div><div class='ctx'> ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,</div><div class='ctx'> 		   u8 *raw_packet);</div><div class='del'>-int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget);</div><div class='ctx'> void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring);</div><div class='add'>+void ice_clean_ctrl_rx_irq(struct ice_rx_ring *rx_ring);</div><div class='add'>+void ice_free_tx_tstamp_ring(struct ice_tx_ring *tx_ring);</div><div class='add'>+void ice_free_tstamp_ring(struct ice_tx_ring *tx_ring);</div><div class='ctx'> #endif /* _ICE_TXRX_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_txrx_lib.c b/drivers/net/ethernet/intel/ice/ice_txrx_lib.c<br/>index 2719f0e20933..956da38d63b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_txrx_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_txrx_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_txrx_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_txrx_lib.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='ctx'> #include &lt;linux/net/intel/libie/rx.h&gt;</div><div class='add'>+#include &lt;net/libeth/xdp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ice_txrx_lib.h"</div><div class='ctx'> #include "ice_eswitch.h"</div><div class='hunk'>@@ -81,6 +82,23 @@ ice_rx_hash_to_skb(const struct ice_rx_ring *rx_ring,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_rx_gcs - Set generic checksum in skb</div><div class='add'>+ * @skb: skb currently being received and modified</div><div class='add'>+ * @rx_desc: receive descriptor</div><div class='add'>+ */</div><div class='add'>+static void ice_rx_gcs(struct sk_buff *skb,</div><div class='add'>+		       const union ice_32b_rx_flex_desc *rx_desc)</div><div class='add'>+{</div><div class='add'>+	const struct ice_32b_rx_flex_desc_nic *desc;</div><div class='add'>+	u16 csum;</div><div class='add'>+</div><div class='add'>+	desc = (struct ice_32b_rx_flex_desc_nic *)rx_desc;</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_COMPLETE;</div><div class='add'>+	csum = (__force u16)desc-&gt;raw_csum;</div><div class='add'>+	skb-&gt;csum = csum_unfold((__force __sum16)swab16(csum));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_rx_csum - Indicate in skb if checksum is good</div><div class='ctx'>  * @ring: the ring we care about</div><div class='ctx'>  * @skb: skb currently being received and modified</div><div class='hunk'>@@ -107,6 +125,15 @@ ice_rx_csum(struct ice_rx_ring *ring, struct sk_buff *skb,</div><div class='ctx'> 	rx_status0 = le16_to_cpu(rx_desc-&gt;wb.status_error0);</div><div class='ctx'> 	rx_status1 = le16_to_cpu(rx_desc-&gt;wb.status_error1);</div><div class='ctx'> </div><div class='add'>+	if ((ring-&gt;flags &amp; ICE_RX_FLAGS_RING_GCS) &amp;&amp;</div><div class='add'>+	    rx_desc-&gt;wb.rxdid == ICE_RXDID_FLEX_NIC &amp;&amp;</div><div class='add'>+	    (decoded.inner_prot == LIBETH_RX_PT_INNER_TCP ||</div><div class='add'>+	     decoded.inner_prot == LIBETH_RX_PT_INNER_UDP ||</div><div class='add'>+	     decoded.inner_prot == LIBETH_RX_PT_INNER_ICMP)) {</div><div class='add'>+		ice_rx_gcs(skb, rx_desc);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* check if HW has decoded the packet and checksum */</div><div class='ctx'> 	if (!(rx_status0 &amp; BIT(ICE_RX_FLEX_DESC_STATUS0_L3L4P_S)))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -204,9 +231,12 @@ ice_process_skb_fields(struct ice_rx_ring *rx_ring,</div><div class='ctx'> </div><div class='ctx'> 		if (ice_is_port_repr_netdev(netdev))</div><div class='ctx'> 			ice_repr_inc_rx_stats(netdev, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+		/* __skb_push() is needed because xdp_build_skb_from_buff()</div><div class='add'>+		 * calls eth_type_trans()</div><div class='add'>+		 */</div><div class='add'>+		__skb_push(skb, ETH_HLEN);</div><div class='ctx'> 		skb-&gt;protocol = eth_type_trans(skb, netdev);</div><div class='del'>-	} else {</div><div class='del'>-		skb-&gt;protocol = eth_type_trans(skb, rx_ring-&gt;netdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ice_rx_csum(rx_ring, skb, rx_desc, ptype);</div><div class='hunk'>@@ -244,19 +274,18 @@ static void</div><div class='ctx'> ice_clean_xdp_tx_buf(struct device *dev, struct ice_tx_buf *tx_buf,</div><div class='ctx'> 		     struct xdp_frame_bulk *bq)</div><div class='ctx'> {</div><div class='del'>-	dma_unmap_single(dev, dma_unmap_addr(tx_buf, dma),</div><div class='del'>-			 dma_unmap_len(tx_buf, len), DMA_TO_DEVICE);</div><div class='del'>-	dma_unmap_len_set(tx_buf, len, 0);</div><div class='del'>-</div><div class='ctx'> 	switch (tx_buf-&gt;type) {</div><div class='ctx'> 	case ICE_TX_BUF_XDP_TX:</div><div class='del'>-		page_frag_free(tx_buf-&gt;raw_buf);</div><div class='add'>+		libeth_xdp_return_va(tx_buf-&gt;raw_buf, true);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ICE_TX_BUF_XDP_XMIT:</div><div class='add'>+		dma_unmap_single(dev, dma_unmap_addr(tx_buf, dma),</div><div class='add'>+				 dma_unmap_len(tx_buf, len), DMA_TO_DEVICE);</div><div class='ctx'> 		xdp_return_frame_bulk(tx_buf-&gt;xdpf, bq);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	dma_unmap_len_set(tx_buf, len, 0);</div><div class='ctx'> 	tx_buf-&gt;type = ICE_TX_BUF_EMPTY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -351,9 +380,11 @@ int __ice_xmit_xdp_ring(struct xdp_buff *xdp, struct ice_tx_ring *xdp_ring,</div><div class='ctx'> 	struct ice_tx_buf *tx_buf;</div><div class='ctx'> 	u32 cnt = xdp_ring-&gt;count;</div><div class='ctx'> 	void *data = xdp-&gt;data;</div><div class='add'>+	struct page *page;</div><div class='ctx'> 	u32 nr_frags = 0;</div><div class='ctx'> 	u32 free_space;</div><div class='ctx'> 	u32 frag = 0;</div><div class='add'>+	u32 offset;</div><div class='ctx'> </div><div class='ctx'> 	free_space = ICE_DESC_UNUSED(xdp_ring);</div><div class='ctx'> 	if (free_space &lt; ICE_RING_QUARTER(xdp_ring))</div><div class='hunk'>@@ -373,24 +404,28 @@ int __ice_xmit_xdp_ring(struct xdp_buff *xdp, struct ice_tx_ring *xdp_ring,</div><div class='ctx'> 	tx_head = &amp;xdp_ring-&gt;tx_buf[ntu];</div><div class='ctx'> 	tx_buf = tx_head;</div><div class='ctx'> </div><div class='add'>+	page = virt_to_page(data);</div><div class='add'>+	offset = offset_in_page(xdp-&gt;data);</div><div class='add'>+</div><div class='ctx'> 	for (;;) {</div><div class='ctx'> 		dma_addr_t dma;</div><div class='ctx'> </div><div class='del'>-		dma = dma_map_single(dev, data, size, DMA_TO_DEVICE);</div><div class='del'>-		if (dma_mapping_error(dev, dma))</div><div class='del'>-			goto dma_unmap;</div><div class='del'>-</div><div class='del'>-		/* record length, and DMA address */</div><div class='del'>-		dma_unmap_len_set(tx_buf, len, size);</div><div class='del'>-		dma_unmap_addr_set(tx_buf, dma, dma);</div><div class='del'>-</div><div class='ctx'> 		if (frame) {</div><div class='add'>+			dma = dma_map_single(dev, data, size, DMA_TO_DEVICE);</div><div class='add'>+			if (dma_mapping_error(dev, dma))</div><div class='add'>+				goto dma_unmap;</div><div class='ctx'> 			tx_buf-&gt;type = ICE_TX_BUF_FRAG;</div><div class='ctx'> 		} else {</div><div class='add'>+			dma = page_pool_get_dma_addr(page) + offset;</div><div class='add'>+			dma_sync_single_for_device(dev, dma, size, DMA_BIDIRECTIONAL);</div><div class='ctx'> 			tx_buf-&gt;type = ICE_TX_BUF_XDP_TX;</div><div class='ctx'> 			tx_buf-&gt;raw_buf = data;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/* record length, and DMA address */</div><div class='add'>+		dma_unmap_len_set(tx_buf, len, size);</div><div class='add'>+		dma_unmap_addr_set(tx_buf, dma, dma);</div><div class='add'>+</div><div class='ctx'> 		tx_desc-&gt;buf_addr = cpu_to_le64(dma);</div><div class='ctx'> 		tx_desc-&gt;cmd_type_offset_bsz = ice_build_ctob(0, 0, size, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -404,6 +439,8 @@ int __ice_xmit_xdp_ring(struct xdp_buff *xdp, struct ice_tx_ring *xdp_ring,</div><div class='ctx'> 		tx_desc = ICE_TX_DESC(xdp_ring, ntu);</div><div class='ctx'> 		tx_buf = &amp;xdp_ring-&gt;tx_buf[ntu];</div><div class='ctx'> </div><div class='add'>+		page = skb_frag_page(&amp;sinfo-&gt;frags[frag]);</div><div class='add'>+		offset = skb_frag_off(&amp;sinfo-&gt;frags[frag]);</div><div class='ctx'> 		data = skb_frag_address(&amp;sinfo-&gt;frags[frag]);</div><div class='ctx'> 		size = skb_frag_size(&amp;sinfo-&gt;frags[frag]);</div><div class='ctx'> 		frag++;</div><div class='hunk'>@@ -488,10 +525,13 @@ void ice_finalize_xdp_rx(struct ice_tx_ring *xdp_ring, unsigned int xdp_res,</div><div class='ctx'>  */</div><div class='ctx'> static int ice_xdp_rx_hw_ts(const struct xdp_md *ctx, u64 *ts_ns)</div><div class='ctx'> {</div><div class='del'>-	const struct ice_xdp_buff *xdp_ext = (void *)ctx;</div><div class='add'>+	const struct libeth_xdp_buff *xdp_ext = (void *)ctx;</div><div class='add'>+	struct ice_rx_ring *rx_ring;</div><div class='add'>+</div><div class='add'>+	rx_ring = libeth_xdp_buff_to_rq(xdp_ext, typeof(*rx_ring), xdp_rxq);</div><div class='ctx'> </div><div class='del'>-	*ts_ns = ice_ptp_get_rx_hwts(xdp_ext-&gt;eop_desc,</div><div class='del'>-				     xdp_ext-&gt;pkt_ctx);</div><div class='add'>+	*ts_ns = ice_ptp_get_rx_hwts(xdp_ext-&gt;desc,</div><div class='add'>+				     &amp;rx_ring-&gt;pkt_ctx);</div><div class='ctx'> 	if (!*ts_ns)</div><div class='ctx'> 		return -ENODATA;</div><div class='ctx'> </div><div class='hunk'>@@ -519,10 +559,10 @@ ice_xdp_rx_hash_type(const union ice_32b_rx_flex_desc *eop_desc)</div><div class='ctx'> static int ice_xdp_rx_hash(const struct xdp_md *ctx, u32 *hash,</div><div class='ctx'> 			   enum xdp_rss_hash_type *rss_type)</div><div class='ctx'> {</div><div class='del'>-	const struct ice_xdp_buff *xdp_ext = (void *)ctx;</div><div class='add'>+	const struct libeth_xdp_buff *xdp_ext = (void *)ctx;</div><div class='ctx'> </div><div class='del'>-	*hash = ice_get_rx_hash(xdp_ext-&gt;eop_desc);</div><div class='del'>-	*rss_type = ice_xdp_rx_hash_type(xdp_ext-&gt;eop_desc);</div><div class='add'>+	*hash = ice_get_rx_hash(xdp_ext-&gt;desc);</div><div class='add'>+	*rss_type = ice_xdp_rx_hash_type(xdp_ext-&gt;desc);</div><div class='ctx'> 	if (!likely(*hash))</div><div class='ctx'> 		return -ENODATA;</div><div class='ctx'> </div><div class='hunk'>@@ -541,13 +581,16 @@ static int ice_xdp_rx_hash(const struct xdp_md *ctx, u32 *hash,</div><div class='ctx'> static int ice_xdp_rx_vlan_tag(const struct xdp_md *ctx, __be16 *vlan_proto,</div><div class='ctx'> 			       u16 *vlan_tci)</div><div class='ctx'> {</div><div class='del'>-	const struct ice_xdp_buff *xdp_ext = (void *)ctx;</div><div class='add'>+	const struct libeth_xdp_buff *xdp_ext = (void *)ctx;</div><div class='add'>+	struct ice_rx_ring *rx_ring;</div><div class='add'>+</div><div class='add'>+	rx_ring = libeth_xdp_buff_to_rq(xdp_ext, typeof(*rx_ring), xdp_rxq);</div><div class='ctx'> </div><div class='del'>-	*vlan_proto = xdp_ext-&gt;pkt_ctx-&gt;vlan_proto;</div><div class='add'>+	*vlan_proto = rx_ring-&gt;pkt_ctx.vlan_proto;</div><div class='ctx'> 	if (!*vlan_proto)</div><div class='ctx'> 		return -ENODATA;</div><div class='ctx'> </div><div class='del'>-	*vlan_tci = ice_get_vlan_tci(xdp_ext-&gt;eop_desc);</div><div class='add'>+	*vlan_tci = ice_get_vlan_tci(xdp_ext-&gt;desc);</div><div class='ctx'> 	if (!*vlan_tci)</div><div class='ctx'> 		return -ENODATA;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_txrx_lib.h b/drivers/net/ethernet/intel/ice/ice_txrx_lib.h<br/>index 79f960c6680d..6a3f10f7a53f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_txrx_lib.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_txrx_lib.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_txrx_lib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_txrx_lib.h</a></div><div class='hunk'>@@ -6,49 +6,6 @@</div><div class='ctx'> #include "ice.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_set_rx_bufs_act - propagate Rx buffer action to frags</div><div class='del'>- * @xdp: XDP buffer representing frame (linear and frags part)</div><div class='del'>- * @rx_ring: Rx ring struct</div><div class='del'>- * act: action to store onto Rx buffers related to XDP buffer parts</div><div class='del'>- *</div><div class='del'>- * Set action that should be taken before putting Rx buffer from first frag</div><div class='del'>- * to the last.</div><div class='del'>- */</div><div class='del'>-static inline void</div><div class='del'>-ice_set_rx_bufs_act(struct xdp_buff *xdp, const struct ice_rx_ring *rx_ring,</div><div class='del'>-		    const unsigned int act)</div><div class='del'>-{</div><div class='del'>-	u32 sinfo_frags = xdp_get_shared_info_from_buff(xdp)-&gt;nr_frags;</div><div class='del'>-	u32 nr_frags = rx_ring-&gt;nr_frags + 1;</div><div class='del'>-	u32 idx = rx_ring-&gt;first_desc;</div><div class='del'>-	u32 cnt = rx_ring-&gt;count;</div><div class='del'>-	struct ice_rx_buf *buf;</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; nr_frags; i++) {</div><div class='del'>-		buf = &amp;rx_ring-&gt;rx_buf[idx];</div><div class='del'>-		buf-&gt;act = act;</div><div class='del'>-</div><div class='del'>-		if (++idx == cnt)</div><div class='del'>-			idx = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* adjust pagecnt_bias on frags freed by XDP prog */</div><div class='del'>-	if (sinfo_frags &lt; rx_ring-&gt;nr_frags &amp;&amp; act == ICE_XDP_CONSUMED) {</div><div class='del'>-		u32 delta = rx_ring-&gt;nr_frags - sinfo_frags;</div><div class='del'>-</div><div class='del'>-		while (delta) {</div><div class='del'>-			if (idx == 0)</div><div class='del'>-				idx = cnt - 1;</div><div class='del'>-			else</div><div class='del'>-				idx--;</div><div class='del'>-			buf = &amp;rx_ring-&gt;rx_buf[idx];</div><div class='del'>-			buf-&gt;pagecnt_bias--;</div><div class='del'>-			delta--;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_test_staterr - tests bits in Rx descriptor status and error fields</div><div class='ctx'>  * @status_err_n: Rx descriptor status_error0 or status_error1 bits</div><div class='ctx'>  * @stat_err_bits: value to mask</div><div class='hunk'>@@ -97,6 +54,20 @@ ice_build_ctob(u64 td_cmd, u64 td_offset, unsigned int size, u64 td_tag)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_build_tstamp_desc - build Tx time stamp descriptor</div><div class='add'>+ * @tx_desc: Tx LAN descriptor index</div><div class='add'>+ * @tstamp: time stamp</div><div class='add'>+ *</div><div class='add'>+ * Return: Tx time stamp descriptor</div><div class='add'>+ */</div><div class='add'>+static inline __le32</div><div class='add'>+ice_build_tstamp_desc(u16 tx_desc, u32 tstamp)</div><div class='add'>+{</div><div class='add'>+	return cpu_to_le32(FIELD_PREP(ICE_TXTIME_TX_DESC_IDX_M, tx_desc) |</div><div class='add'>+			   FIELD_PREP(ICE_TXTIME_STAMP_M, tstamp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_get_vlan_tci - get VLAN TCI from Rx flex descriptor</div><div class='ctx'>  * @rx_desc: Rx 32b flex descriptor with RXDID=2</div><div class='ctx'>  *</div><div class='hunk'>@@ -164,13 +135,4 @@ ice_process_skb_fields(struct ice_rx_ring *rx_ring,</div><div class='ctx'> void</div><div class='ctx'> ice_receive_skb(struct ice_rx_ring *rx_ring, struct sk_buff *skb, u16 vlan_tci);</div><div class='ctx'> </div><div class='del'>-static inline void</div><div class='del'>-ice_xdp_meta_set_desc(struct xdp_buff *xdp,</div><div class='del'>-		      union ice_32b_rx_flex_desc *eop_desc)</div><div class='del'>-{</div><div class='del'>-	struct ice_xdp_buff *xdp_ext = container_of(xdp, struct ice_xdp_buff,</div><div class='del'>-						    xdp_buff);</div><div class='del'>-</div><div class='del'>-	xdp_ext-&gt;eop_desc = eop_desc;</div><div class='del'>-}</div><div class='ctx'> #endif /* !_ICE_TXRX_LIB_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethernet/intel/ice/ice_type.h<br/>index adb168860711..6a2ec8389a8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_type.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_type.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_type.h</a></div><div class='hunk'>@@ -17,7 +17,9 @@</div><div class='ctx'> #include "ice_protocol_type.h"</div><div class='ctx'> #include "ice_sbq_cmd.h"</div><div class='ctx'> #include "ice_vlan_mode.h"</div><div class='del'>-#include "ice_fwlog.h"</div><div class='add'>+#include &lt;linux/net/intel/libie/fwlog.h&gt;</div><div class='add'>+#include &lt;linux/wait.h&gt;</div><div class='add'>+#include &lt;net/dscp.h&gt;</div><div class='ctx'> </div><div class='ctx'> static inline bool ice_is_tc_ena(unsigned long bitmap, u8 tc)</div><div class='ctx'> {</div><div class='hunk'>@@ -291,8 +293,10 @@ struct ice_hw_common_caps {</div><div class='ctx'> 	u8 dcb;</div><div class='ctx'> 	u8 ieee_1588;</div><div class='ctx'> 	u8 rdma;</div><div class='del'>-	u8 roce_lag;</div><div class='del'>-	u8 sriov_lag;</div><div class='add'>+</div><div class='add'>+	bool roce_lag;</div><div class='add'>+	bool sriov_lag;</div><div class='add'>+	bool sriov_aa_lag;</div><div class='ctx'> </div><div class='ctx'> 	bool nvm_update_pending_nvm;</div><div class='ctx'> 	bool nvm_update_pending_orom;</div><div class='hunk'>@@ -324,17 +328,17 @@ struct ice_hw_common_caps {</div><div class='ctx'> #define ICE_TS_TMR_IDX_ASSOC_M		BIT(24)</div><div class='ctx'> </div><div class='ctx'> /* TIME_REF clock rate specification */</div><div class='del'>-enum ice_time_ref_freq {</div><div class='del'>-	ICE_TIME_REF_FREQ_25_000	= 0,</div><div class='del'>-	ICE_TIME_REF_FREQ_122_880	= 1,</div><div class='del'>-	ICE_TIME_REF_FREQ_125_000	= 2,</div><div class='del'>-	ICE_TIME_REF_FREQ_153_600	= 3,</div><div class='del'>-	ICE_TIME_REF_FREQ_156_250	= 4,</div><div class='del'>-	ICE_TIME_REF_FREQ_245_760	= 5,</div><div class='add'>+enum ice_tspll_freq {</div><div class='add'>+	ICE_TSPLL_FREQ_25_000	= 0,</div><div class='add'>+	ICE_TSPLL_FREQ_122_880	= 1,</div><div class='add'>+	ICE_TSPLL_FREQ_125_000	= 2,</div><div class='add'>+	ICE_TSPLL_FREQ_153_600	= 3,</div><div class='add'>+	ICE_TSPLL_FREQ_156_250	= 4,</div><div class='add'>+	ICE_TSPLL_FREQ_245_760	= 5,</div><div class='ctx'> </div><div class='del'>-	NUM_ICE_TIME_REF_FREQ,</div><div class='add'>+	NUM_ICE_TSPLL_FREQ,</div><div class='ctx'> </div><div class='del'>-	ICE_TIME_REF_FREQ_INVALID	= -1,</div><div class='add'>+	ICE_TSPLL_FREQ_INVALID	= -1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Clock source specification */</div><div class='hunk'>@@ -347,7 +351,7 @@ enum ice_clk_src {</div><div class='ctx'> </div><div class='ctx'> struct ice_ts_func_info {</div><div class='ctx'> 	/* Function specific info */</div><div class='del'>-	enum ice_time_ref_freq time_ref;</div><div class='add'>+	enum ice_tspll_freq time_ref;</div><div class='ctx'> 	u8 clk_freq;</div><div class='ctx'> 	u8 clk_src;</div><div class='ctx'> 	u8 tmr_index_assoc;</div><div class='hunk'>@@ -368,6 +372,7 @@ struct ice_ts_func_info {</div><div class='ctx'> #define ICE_TS_TMR1_ENA_M		BIT(26)</div><div class='ctx'> #define ICE_TS_LL_TX_TS_READ_M		BIT(28)</div><div class='ctx'> #define ICE_TS_LL_TX_TS_INT_READ_M	BIT(29)</div><div class='add'>+#define ICE_TS_LL_PHY_TMR_UPDATE_M	BIT(30)</div><div class='ctx'> </div><div class='ctx'> struct ice_ts_dev_info {</div><div class='ctx'> 	/* Device specific info */</div><div class='hunk'>@@ -382,6 +387,7 @@ struct ice_ts_dev_info {</div><div class='ctx'> 	u8 tmr1_ena;</div><div class='ctx'> 	u8 ts_ll_read;</div><div class='ctx'> 	u8 ts_ll_int_read;</div><div class='add'>+	u8 ll_phy_tmr_update;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define ICE_NAC_TOPO_PRIMARY_M	BIT(0)</div><div class='hunk'>@@ -692,7 +698,6 @@ struct ice_dcb_app_priority_table {</div><div class='ctx'> </div><div class='ctx'> #define ICE_MAX_USER_PRIORITY	8</div><div class='ctx'> #define ICE_DCBX_MAX_APPS	64</div><div class='del'>-#define ICE_DSCP_NUM_VAL	64</div><div class='ctx'> #define ICE_LLDPDU_SIZE		1500</div><div class='ctx'> #define ICE_TLV_STATUS_OPER	0x1</div><div class='ctx'> #define ICE_TLV_STATUS_SYNC	0x2</div><div class='hunk'>@@ -715,9 +720,9 @@ struct ice_dcbx_cfg {</div><div class='ctx'> 	u8 pfc_mode;</div><div class='ctx'> 	struct ice_dcb_app_priority_table app[ICE_DCBX_MAX_APPS];</div><div class='ctx'> 	/* when DSCP mapping defined by user set its bit to 1 */</div><div class='del'>-	DECLARE_BITMAP(dscp_mapped, ICE_DSCP_NUM_VAL);</div><div class='add'>+	DECLARE_BITMAP(dscp_mapped, DSCP_MAX);</div><div class='ctx'> 	/* array holding DSCP -&gt; UP/TC values for DSCP L3 QoS mode */</div><div class='del'>-	u8 dscp_map[ICE_DSCP_NUM_VAL];</div><div class='add'>+	u8 dscp_map[DSCP_MAX];</div><div class='ctx'> 	u8 dcbx_mode;</div><div class='ctx'> #define ICE_DCBX_MODE_CEE	0x1</div><div class='ctx'> #define ICE_DCBX_MODE_IEEE	0x2</div><div class='hunk'>@@ -848,26 +853,26 @@ struct ice_mbx_data {</div><div class='ctx'> #define ICE_PORTS_PER_QUAD	4</div><div class='ctx'> #define ICE_GET_QUAD_NUM(port) ((port) / ICE_PORTS_PER_QUAD)</div><div class='ctx'> </div><div class='add'>+#define ATQBAL_FLAGS_INTR_IN_PROGRESS	BIT(0)</div><div class='add'>+</div><div class='add'>+struct ice_e810_params {</div><div class='add'>+	/* The wait queue lock also protects the low latency interface */</div><div class='add'>+	wait_queue_head_t atqbal_wq;</div><div class='add'>+	unsigned int atqbal_flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ice_eth56g_params {</div><div class='ctx'> 	u8 num_phys;</div><div class='del'>-	u8 phy_addr[2];</div><div class='ctx'> 	bool onestep_ena;</div><div class='ctx'> 	bool sfd_ena;</div><div class='ctx'> 	u32 peer_delay;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> union ice_phy_params {</div><div class='add'>+	struct ice_e810_params e810;</div><div class='ctx'> 	struct ice_eth56g_params eth56g;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* PHY model */</div><div class='del'>-enum ice_phy_model {</div><div class='del'>-	ICE_PHY_UNSUP = -1,</div><div class='del'>-	ICE_PHY_E810 = 1,</div><div class='del'>-	ICE_PHY_E82X,</div><div class='del'>-	ICE_PHY_ETH56G,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* Global Link Topology */</div><div class='ctx'> enum ice_global_link_topo {</div><div class='ctx'> 	ICE_LINK_TOPO_UP_TO_2_LINKS,</div><div class='hunk'>@@ -877,11 +882,9 @@ enum ice_global_link_topo {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ice_ptp_hw {</div><div class='del'>-	enum ice_phy_model phy_model;</div><div class='ctx'> 	union ice_phy_params phy;</div><div class='ctx'> 	u8 num_lports;</div><div class='ctx'> 	u8 ports_per_phy;</div><div class='del'>-	bool is_2x50g_muxed_topo;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Port hardware description */</div><div class='hunk'>@@ -945,9 +948,7 @@ struct ice_hw {</div><div class='ctx'> 	u8 fw_patch;		/* firmware patch version */</div><div class='ctx'> 	u32 fw_build;		/* firmware build number */</div><div class='ctx'> </div><div class='del'>-	struct ice_fwlog_cfg fwlog_cfg;</div><div class='del'>-	bool fwlog_supported; /* does hardware support FW logging? */</div><div class='del'>-	struct ice_fwlog_ring fwlog_ring;</div><div class='add'>+	struct libie_fwlog fwlog;</div><div class='ctx'> </div><div class='ctx'> /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL</div><div class='ctx'>  * register. Used for determining the ITR/INTRL granularity during</div><div class='hunk'>@@ -969,6 +970,7 @@ struct ice_hw {</div><div class='ctx'> 	u8 intrl_gran;</div><div class='ctx'> </div><div class='ctx'> 	struct ice_ptp_hw ptp;</div><div class='add'>+	s8 lane_num;</div><div class='ctx'> </div><div class='ctx'> 	/* Active package version (currently active) */</div><div class='ctx'> 	struct ice_pkg_ver active_pkg_ver;</div><div class='hunk'>@@ -1061,6 +1063,7 @@ struct ice_hw_port_stats {</div><div class='ctx'> 	u64 error_bytes;		/* errbc */</div><div class='ctx'> 	u64 mac_local_faults;		/* mlfc */</div><div class='ctx'> 	u64 mac_remote_faults;		/* mrfc */</div><div class='add'>+	u64 rx_len_errors;		/* rlec */</div><div class='ctx'> 	u64 link_xon_rx;		/* lxonrxc */</div><div class='ctx'> 	u64 link_xoff_rx;		/* lxoffrxc */</div><div class='ctx'> 	u64 link_xon_tx;		/* lxontxc */</div><div class='hunk'>@@ -1216,4 +1219,9 @@ struct ice_aq_get_set_rss_lut_params {</div><div class='ctx'> #define ICE_FW_API_REPORT_DFLT_CFG_MIN		7</div><div class='ctx'> #define ICE_FW_API_REPORT_DFLT_CFG_PATCH	3</div><div class='ctx'> </div><div class='add'>+/* AQ API version for Health Status support */</div><div class='add'>+#define ICE_FW_API_HEALTH_REPORT_MAJ		1</div><div class='add'>+#define ICE_FW_API_HEALTH_REPORT_MIN		7</div><div class='add'>+#define ICE_FW_API_HEALTH_REPORT_PATCH		6</div><div class='add'>+</div><div class='ctx'> #endif /* _ICE_TYPE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_vf_lib.c b/drivers/net/ethernet/intel/ice/ice_vf_lib.c<br/>index c7c0c2f50c26..de9e81ccee66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vf_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vf_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vf_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_vf_lib.c</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #include "ice.h"</div><div class='ctx'> #include "ice_lib.h"</div><div class='ctx'> #include "ice_fltr.h"</div><div class='del'>-#include "ice_virtchnl_allowlist.h"</div><div class='add'>+#include "virt/allowlist.h"</div><div class='ctx'> </div><div class='ctx'> /* Public functions which may be accessed by all driver files */</div><div class='ctx'> </div><div class='hunk'>@@ -226,6 +226,7 @@ static void ice_vf_clear_counters(struct ice_vf *vf)</div><div class='ctx'> 		vsi-&gt;num_vlan = 0;</div><div class='ctx'> </div><div class='ctx'> 	vf-&gt;num_mac = 0;</div><div class='add'>+	vf-&gt;num_mac_lldp = 0;</div><div class='ctx'> 	memset(&amp;vf-&gt;mdd_tx_events, 0, sizeof(vf-&gt;mdd_tx_events));</div><div class='ctx'> 	memset(&amp;vf-&gt;mdd_rx_events, 0, sizeof(vf-&gt;mdd_rx_events));</div><div class='ctx'> }</div><div class='hunk'>@@ -858,16 +859,13 @@ static void ice_notify_vf_reset(struct ice_vf *vf)</div><div class='ctx'> int ice_reset_vf(struct ice_vf *vf, u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = vf-&gt;pf;</div><div class='del'>-	struct ice_lag *lag;</div><div class='ctx'> 	struct ice_vsi *vsi;</div><div class='del'>-	u8 act_prt, pri_prt;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	int err = 0;</div><div class='add'>+	u8 act_prt;</div><div class='ctx'> 	bool rsd;</div><div class='ctx'> </div><div class='ctx'> 	dev = ice_pf_to_dev(pf);</div><div class='del'>-	act_prt = ICE_LAG_INVALID_PORT;</div><div class='del'>-	pri_prt = pf-&gt;hw.port_info-&gt;lport;</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; ICE_VF_RESET_NOTIFY)</div><div class='ctx'> 		ice_notify_vf_reset(vf);</div><div class='hunk'>@@ -883,16 +881,8 @@ int ice_reset_vf(struct ice_vf *vf, u32 flags)</div><div class='ctx'> 	else</div><div class='ctx'> 		lockdep_assert_held(&amp;vf-&gt;cfg_lock);</div><div class='ctx'> </div><div class='del'>-	lag = pf-&gt;lag;</div><div class='ctx'> 	mutex_lock(&amp;pf-&gt;lag_mutex);</div><div class='del'>-	if (lag &amp;&amp; lag-&gt;bonded &amp;&amp; lag-&gt;primary) {</div><div class='del'>-		act_prt = lag-&gt;active_port;</div><div class='del'>-		if (act_prt != pri_prt &amp;&amp; act_prt != ICE_LAG_INVALID_PORT &amp;&amp;</div><div class='del'>-		    lag-&gt;upper_netdev)</div><div class='del'>-			ice_lag_move_vf_nodes_cfg(lag, act_prt, pri_prt);</div><div class='del'>-		else</div><div class='del'>-			act_prt = ICE_LAG_INVALID_PORT;</div><div class='del'>-	}</div><div class='add'>+	act_prt = ice_lag_prepare_vf_reset(pf-&gt;lag);</div><div class='ctx'> </div><div class='ctx'> 	if (ice_is_vf_disabled(vf)) {</div><div class='ctx'> 		vsi = ice_get_vf_vsi(vf);</div><div class='hunk'>@@ -978,9 +968,7 @@ int ice_reset_vf(struct ice_vf *vf, u32 flags)</div><div class='ctx'> 	ice_reset_vf_mbx_cnt(vf);</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='del'>-	if (lag &amp;&amp; lag-&gt;bonded &amp;&amp; lag-&gt;primary &amp;&amp;</div><div class='del'>-	    act_prt != ICE_LAG_INVALID_PORT)</div><div class='del'>-		ice_lag_move_vf_nodes_cfg(lag, pri_prt, act_prt);</div><div class='add'>+	ice_lag_complete_vf_reset(pf-&gt;lag, act_prt);</div><div class='ctx'> 	mutex_unlock(&amp;pf-&gt;lag_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (flags &amp; ICE_VF_RESET_LOCK)</div><div class='hunk'>@@ -1021,6 +1009,9 @@ void ice_initialize_vf_entry(struct ice_vf *vf)</div><div class='ctx'> 	vf-&gt;num_msix = vfs-&gt;num_msix_per;</div><div class='ctx'> 	vf-&gt;num_vf_qs = vfs-&gt;num_qps_per;</div><div class='ctx'> </div><div class='add'>+	/* set default RSS hash configuration */</div><div class='add'>+	vf-&gt;rss_hashcfg = ICE_DEFAULT_RSS_HASHCFG;</div><div class='add'>+</div><div class='ctx'> 	/* ctrl_vsi_idx will be set to a valid value only when iAVF</div><div class='ctx'> 	 * creates its first fdir rule.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1036,6 +1027,14 @@ void ice_initialize_vf_entry(struct ice_vf *vf)</div><div class='ctx'> 	mutex_init(&amp;vf-&gt;cfg_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ice_deinitialize_vf_entry(struct ice_vf *vf)</div><div class='add'>+{</div><div class='add'>+	struct ice_pf *pf = vf-&gt;pf;</div><div class='add'>+</div><div class='add'>+	if (!ice_is_feature_supported(pf, ICE_F_MBX_LIMIT))</div><div class='add'>+		list_del(&amp;vf-&gt;mbx_info.list_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ice_dis_vf_qs - Disable the VF queues</div><div class='ctx'>  * @vf: pointer to the VF structure</div><div class='hunk'>@@ -1393,3 +1392,28 @@ struct ice_vsi *ice_get_vf_ctrl_vsi(struct ice_pf *pf, struct ice_vsi *vsi)</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> 	return ctrl_vsi;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vf_update_mac_lldp_num - update the VF's number of LLDP addresses</div><div class='add'>+ * @vf: a VF to add the address to</div><div class='add'>+ * @vsi: the corresponding VSI</div><div class='add'>+ * @incr: is the rule added or removed</div><div class='add'>+ */</div><div class='add'>+void ice_vf_update_mac_lldp_num(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='add'>+				bool incr)</div><div class='add'>+{</div><div class='add'>+	bool lldp_by_fw = test_bit(ICE_FLAG_FW_LLDP_AGENT, vsi-&gt;back-&gt;flags);</div><div class='add'>+	bool was_ena = ice_vf_is_lldp_ena(vf) &amp;&amp; !lldp_by_fw;</div><div class='add'>+	bool is_ena;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!vsi)) {</div><div class='add'>+		vf-&gt;num_mac_lldp = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vf-&gt;num_mac_lldp += incr ? 1 : -1;</div><div class='add'>+	is_ena = ice_vf_is_lldp_ena(vf) &amp;&amp; !lldp_by_fw;</div><div class='add'>+</div><div class='add'>+	if (was_ena != is_ena)</div><div class='add'>+		ice_vsi_cfg_sw_lldp(vsi, false, is_ena);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_vf_lib.h b/drivers/net/ethernet/intel/ice/ice_vf_lib.h<br/>index 4261fe1c2bcd..7a9c75d1d07c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vf_lib.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vf_lib.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vf_lib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_vf_lib.h</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;linux/avf/virtchnl.h&gt;</div><div class='ctx'> #include "ice_type.h"</div><div class='ctx'> #include "ice_flow.h"</div><div class='del'>-#include "ice_virtchnl_fdir.h"</div><div class='add'>+#include "virt/fdir.h"</div><div class='ctx'> #include "ice_vsi_vlan_ops.h"</div><div class='ctx'> </div><div class='ctx'> #define ICE_MAX_SRIOV_VFS		256</div><div class='hunk'>@@ -53,6 +53,46 @@ struct ice_mdd_vf_events {</div><div class='ctx'> 	u16 last_printed;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum ice_hash_ip_ctx_type {</div><div class='add'>+	ICE_HASH_IP_CTX_IP = 0,</div><div class='add'>+	ICE_HASH_IP_CTX_IP_ESP,</div><div class='add'>+	ICE_HASH_IP_CTX_IP_UDP_ESP,</div><div class='add'>+	ICE_HASH_IP_CTX_IP_AH,</div><div class='add'>+	ICE_HASH_IP_CTX_IP_PFCP,</div><div class='add'>+	ICE_HASH_IP_CTX_IP_UDP,</div><div class='add'>+	ICE_HASH_IP_CTX_IP_TCP,</div><div class='add'>+	ICE_HASH_IP_CTX_IP_SCTP,</div><div class='add'>+	ICE_HASH_IP_CTX_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ice_vf_hash_ip_ctx {</div><div class='add'>+	struct ice_rss_hash_cfg ctx[ICE_HASH_IP_CTX_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ice_hash_gtpu_ctx_type {</div><div class='add'>+	ICE_HASH_GTPU_CTX_EH_IP = 0,</div><div class='add'>+	ICE_HASH_GTPU_CTX_EH_IP_UDP,</div><div class='add'>+	ICE_HASH_GTPU_CTX_EH_IP_TCP,</div><div class='add'>+	ICE_HASH_GTPU_CTX_UP_IP,</div><div class='add'>+	ICE_HASH_GTPU_CTX_UP_IP_UDP,</div><div class='add'>+	ICE_HASH_GTPU_CTX_UP_IP_TCP,</div><div class='add'>+	ICE_HASH_GTPU_CTX_DW_IP,</div><div class='add'>+	ICE_HASH_GTPU_CTX_DW_IP_UDP,</div><div class='add'>+	ICE_HASH_GTPU_CTX_DW_IP_TCP,</div><div class='add'>+	ICE_HASH_GTPU_CTX_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ice_vf_hash_gtpu_ctx {</div><div class='add'>+	struct ice_rss_hash_cfg ctx[ICE_HASH_GTPU_CTX_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ice_vf_hash_ctx {</div><div class='add'>+	struct ice_vf_hash_ip_ctx v4;</div><div class='add'>+	struct ice_vf_hash_ip_ctx v6;</div><div class='add'>+	struct ice_vf_hash_gtpu_ctx ipv4;</div><div class='add'>+	struct ice_vf_hash_gtpu_ctx ipv6;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Structure to store fdir fv entry */</div><div class='ctx'> struct ice_fdir_prof_info {</div><div class='ctx'> 	struct ice_parser_profile prof;</div><div class='hunk'>@@ -66,6 +106,12 @@ struct ice_vf_qs_bw {</div><div class='ctx'> 	u8 tc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Structure to store RSS field vector entry */</div><div class='add'>+struct ice_rss_prof_info {</div><div class='add'>+	struct ice_parser_profile prof;</div><div class='add'>+	bool symm;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* VF operations */</div><div class='ctx'> struct ice_vf_ops {</div><div class='ctx'> 	enum ice_disq_rst_src reset_type;</div><div class='hunk'>@@ -106,8 +152,9 @@ struct ice_vf {</div><div class='ctx'> 	u16 ctrl_vsi_idx;</div><div class='ctx'> 	struct ice_vf_fdir fdir;</div><div class='ctx'> 	struct ice_fdir_prof_info fdir_prof_info[ICE_MAX_PTGS];</div><div class='del'>-	/* first vector index of this VF in the PF space */</div><div class='del'>-	int first_vector_idx;</div><div class='add'>+	struct ice_rss_prof_info rss_prof_info[ICE_MAX_PTGS];</div><div class='add'>+	struct ice_vf_hash_ctx hash_ctx;</div><div class='add'>+	u64 rss_hashcfg;		/* RSS hash configuration */</div><div class='ctx'> 	struct ice_sw *vf_sw_id;	/* switch ID the VF VSIs connect to */</div><div class='ctx'> 	struct virtchnl_version_info vf_ver;</div><div class='ctx'> 	u32 driver_caps;		/* reported by VF driver */</div><div class='hunk'>@@ -124,13 +171,22 @@ struct ice_vf {</div><div class='ctx'> 	u8 spoofchk:1;</div><div class='ctx'> 	u8 link_forced:1;</div><div class='ctx'> 	u8 link_up:1;			/* only valid if VF link is forced */</div><div class='add'>+	u8 lldp_tx_ena:1;</div><div class='add'>+</div><div class='add'>+	u16 num_msix;			/* num of MSI-X configured on this VF */</div><div class='add'>+</div><div class='add'>+	u32 ptp_caps;</div><div class='add'>+</div><div class='ctx'> 	unsigned int min_tx_rate;	/* Minimum Tx bandwidth limit in Mbps */</div><div class='ctx'> 	unsigned int max_tx_rate;	/* Maximum Tx bandwidth limit in Mbps */</div><div class='add'>+	/* first vector index of this VF in the PF space */</div><div class='add'>+	int first_vector_idx;</div><div class='ctx'> 	DECLARE_BITMAP(vf_states, ICE_VF_STATES_NBITS);	/* VF runtime states */</div><div class='ctx'> </div><div class='ctx'> 	unsigned long vf_caps;		/* VF's adv. capabilities */</div><div class='ctx'> 	u8 num_req_qs;			/* num of queue pairs requested by VF */</div><div class='ctx'> 	u16 num_mac;</div><div class='add'>+	u16 num_mac_lldp;</div><div class='ctx'> 	u16 num_vf_qs;			/* num of queue configured per VF */</div><div class='ctx'> 	u8 vlan_strip_ena;		/* Outer and Inner VLAN strip enable */</div><div class='ctx'> #define ICE_INNER_VLAN_STRIP_ENA	BIT(0)</div><div class='hunk'>@@ -146,7 +202,9 @@ struct ice_vf {</div><div class='ctx'> 	/* devlink port data */</div><div class='ctx'> 	struct devlink_port devlink_port;</div><div class='ctx'> </div><div class='del'>-	u16 num_msix;			/* num of MSI-X configured on this VF */</div><div class='add'>+	u16 lldp_recipe_id;</div><div class='add'>+	u16 lldp_rule_id;</div><div class='add'>+</div><div class='ctx'> 	struct ice_vf_qs_bw qs_bw[ICE_MAX_RSS_QS_PER_VF];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -177,6 +235,11 @@ static inline u16 ice_vf_get_port_vlan_tpid(struct ice_vf *vf)</div><div class='ctx'> 	return vf-&gt;port_vlan_info.tpid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool ice_vf_is_lldp_ena(struct ice_vf *vf)</div><div class='add'>+{</div><div class='add'>+	return vf-&gt;num_mac_lldp &amp;&amp; vf-&gt;trusted;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* VF Hash Table access functions</div><div class='ctx'>  *</div><div class='ctx'>  * These functions provide abstraction for interacting with the VF hash table.</div><div class='hunk'>@@ -224,6 +287,18 @@ static inline u16 ice_vf_get_port_vlan_tpid(struct ice_vf *vf)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='ctx'> struct ice_vf *ice_get_vf_by_id(struct ice_pf *pf, u16 vf_id);</div><div class='add'>+</div><div class='add'>+static inline struct ice_vf *ice_get_vf_by_dev(struct ice_pf *pf,</div><div class='add'>+					       struct pci_dev *vf_dev)</div><div class='add'>+{</div><div class='add'>+	int vf_id = pci_iov_vf_id(vf_dev);</div><div class='add'>+</div><div class='add'>+	if (vf_id &lt; 0)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return ice_get_vf_by_id(pf, pci_iov_vf_id(vf_dev));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void ice_put_vf(struct ice_vf *vf);</div><div class='ctx'> bool ice_has_vfs(struct ice_pf *pf);</div><div class='ctx'> u16 ice_get_num_vfs(struct ice_pf *pf);</div><div class='hunk'>@@ -242,12 +317,20 @@ ice_vf_clear_vsi_promisc(struct ice_vf *vf, struct ice_vsi *vsi, u8 promisc_m);</div><div class='ctx'> int ice_reset_vf(struct ice_vf *vf, u32 flags);</div><div class='ctx'> void ice_reset_all_vfs(struct ice_pf *pf);</div><div class='ctx'> struct ice_vsi *ice_get_vf_ctrl_vsi(struct ice_pf *pf, struct ice_vsi *vsi);</div><div class='add'>+void ice_vf_update_mac_lldp_num(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='add'>+				bool incr);</div><div class='ctx'> #else /* CONFIG_PCI_IOV */</div><div class='ctx'> static inline struct ice_vf *ice_get_vf_by_id(struct ice_pf *pf, u16 vf_id)</div><div class='ctx'> {</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline struct ice_vf *ice_get_vf_by_dev(struct ice_pf *pf,</div><div class='add'>+					       struct pci_dev *vf_dev)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void ice_put_vf(struct ice_vf *vf)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_vf_lib_private.h b/drivers/net/ethernet/intel/ice/ice_vf_lib_private.h<br/>index 0c7e77c0a09f..5392b0404986 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vf_lib_private.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vf_lib_private.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vf_lib_private.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_vf_lib_private.h</a></div><div class='hunk'>@@ -24,6 +24,7 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> void ice_initialize_vf_entry(struct ice_vf *vf);</div><div class='add'>+void ice_deinitialize_vf_entry(struct ice_vf *vf);</div><div class='ctx'> void ice_dis_vf_qs(struct ice_vf *vf);</div><div class='ctx'> int ice_check_vf_init(struct ice_vf *vf);</div><div class='ctx'> enum virtchnl_status_code ice_err_to_virt_err(int err);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_vf_mbx.c b/drivers/net/ethernet/intel/ice/ice_vf_mbx.c<br/>index 75c8113e58ee..7798a5d4bc9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vf_mbx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vf_mbx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vf_mbx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_vf_mbx.c</a></div><div class='hunk'>@@ -23,18 +23,18 @@ ice_aq_send_msg_to_vf(struct ice_hw *hw, u16 vfid, u32 v_opcode, u32 v_retval,</div><div class='ctx'> 		      u8 *msg, u16 msglen, struct ice_sq_cd *cd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_aqc_pf_vf_msg *cmd;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc, ice_mbx_opc_send_msg_to_vf);</div><div class='ctx'> </div><div class='del'>-	cmd = &amp;desc.params.virt;</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='ctx'> 	cmd-&gt;id = cpu_to_le32(vfid);</div><div class='ctx'> </div><div class='ctx'> 	desc.cookie_high = cpu_to_le32(v_opcode);</div><div class='ctx'> 	desc.cookie_low = cpu_to_le32(v_retval);</div><div class='ctx'> </div><div class='ctx'> 	if (msglen)</div><div class='del'>-		desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+		desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	return ice_sq_send_cmd(hw, &amp;hw-&gt;mailboxq, &amp;desc, msg, msglen, cd);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_vlan_mode.c b/drivers/net/ethernet/intel/ice/ice_vlan_mode.c<br/>index 1279c1ffe31c..fb526cb84776 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vlan_mode.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vlan_mode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vlan_mode.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_vlan_mode.c</a></div><div class='hunk'>@@ -63,7 +63,7 @@ static int</div><div class='ctx'> ice_aq_get_vlan_mode(struct ice_hw *hw,</div><div class='ctx'> 		     struct ice_aqc_get_vlan_mode *get_params)</div><div class='ctx'> {</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	if (!get_params)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -275,7 +275,7 @@ ice_aq_set_vlan_mode(struct ice_hw *hw,</div><div class='ctx'> 		     struct ice_aqc_set_vlan_mode *set_params)</div><div class='ctx'> {</div><div class='ctx'> 	u8 rdma_packet, mng_vlan_prot_id;</div><div class='del'>-	struct ice_aq_desc desc;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='ctx'> </div><div class='ctx'> 	if (!set_params)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -295,7 +295,7 @@ ice_aq_set_vlan_mode(struct ice_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	ice_fill_dflt_direct_cmd_desc(&amp;desc,</div><div class='ctx'> 				      ice_aqc_opc_set_vlan_mode_parameters);</div><div class='del'>-	desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='ctx'> </div><div class='ctx'> 	return ice_aq_send_cmd(hw, &amp;desc, set_params, sizeof(*set_params),</div><div class='ctx'> 			       NULL);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c b/drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c<br/>index 5291f2888ef8..ada78f83b3ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c</a></div><div class='hunk'>@@ -113,7 +113,7 @@ static int ice_vsi_manage_vlan_insertion(struct ice_vsi *vsi)</div><div class='ctx'> 	err = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "update VSI for VLAN insert failed, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -169,7 +169,7 @@ static int ice_vsi_manage_vlan_stripping(struct ice_vsi *vsi, bool ena)</div><div class='ctx'> 	err = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "update VSI for VLAN strip failed, ena = %d err %d aq_err %s\n",</div><div class='del'>-			ena, err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			ena, err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -258,7 +258,7 @@ static int __ice_vsi_set_inner_port_vlan(struct ice_vsi *vsi, u16 pvid_info)</div><div class='ctx'> 	ret = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_info(ice_hw_to_dev(hw), "update VSI for port VLAN failed, err %d aq_err %s\n",</div><div class='del'>-			 ret, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			 ret, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -306,7 +306,7 @@ int ice_vsi_clear_inner_port_vlan(struct ice_vsi *vsi)</div><div class='ctx'> 	ret = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		dev_err(ice_hw_to_dev(hw), "update VSI for port VLAN failed, err %d aq_err %s\n",</div><div class='del'>-			ret, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			ret, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	kfree(ctxt);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -353,7 +353,7 @@ static int ice_cfg_vlan_pruning(struct ice_vsi *vsi, bool ena)</div><div class='ctx'> 	if (status) {</div><div class='ctx'> 		netdev_err(vsi-&gt;netdev, "%sabling VLAN pruning on VSI handle: %d, VSI HW ID: %d failed, err = %d, aq_err = %s\n",</div><div class='ctx'> 			   ena ? "En" : "Dis", vsi-&gt;idx, vsi-&gt;vsi_num, status,</div><div class='del'>-			   ice_aq_str(pf-&gt;hw.adminq.sq_last_status));</div><div class='add'>+			   libie_aq_str(pf-&gt;hw.adminq.sq_last_status));</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -497,7 +497,7 @@ int ice_vsi_ena_outer_stripping(struct ice_vsi *vsi, u16 tpid)</div><div class='ctx'> 	err = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "update VSI for enabling outer VLAN stripping failed, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 	else</div><div class='ctx'> 		vsi-&gt;info.outer_vlan_flags = ctxt-&gt;info.outer_vlan_flags;</div><div class='ctx'> </div><div class='hunk'>@@ -544,7 +544,7 @@ int ice_vsi_dis_outer_stripping(struct ice_vsi *vsi)</div><div class='ctx'> 	err = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "update VSI for disabling outer VLAN stripping failed, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 	else</div><div class='ctx'> 		vsi-&gt;info.outer_vlan_flags = ctxt-&gt;info.outer_vlan_flags;</div><div class='ctx'> </div><div class='hunk'>@@ -604,7 +604,7 @@ int ice_vsi_ena_outer_insertion(struct ice_vsi *vsi, u16 tpid)</div><div class='ctx'> 	err = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "update VSI for enabling outer VLAN insertion failed, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 	else</div><div class='ctx'> 		vsi-&gt;info.outer_vlan_flags = ctxt-&gt;info.outer_vlan_flags;</div><div class='ctx'> </div><div class='hunk'>@@ -654,7 +654,7 @@ int ice_vsi_dis_outer_insertion(struct ice_vsi *vsi)</div><div class='ctx'> 	err = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "update VSI for disabling outer VLAN insertion failed, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 	else</div><div class='ctx'> 		vsi-&gt;info.outer_vlan_flags = ctxt-&gt;info.outer_vlan_flags;</div><div class='ctx'> </div><div class='hunk'>@@ -720,7 +720,7 @@ __ice_vsi_set_outer_port_vlan(struct ice_vsi *vsi, u16 vlan_info, u16 tpid)</div><div class='ctx'> 	err = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "update VSI for setting outer port based VLAN failed, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		vsi-&gt;info.port_based_outer_vlan = ctxt-&gt;info.port_based_outer_vlan;</div><div class='ctx'> 		vsi-&gt;info.outer_vlan_flags = ctxt-&gt;info.outer_vlan_flags;</div><div class='hunk'>@@ -782,7 +782,7 @@ int ice_vsi_clear_outer_port_vlan(struct ice_vsi *vsi)</div><div class='ctx'> 	err = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "update VSI for clearing outer port based VLAN failed, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> </div><div class='ctx'> 	kfree(ctxt);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -830,7 +830,7 @@ int ice_vsi_clear_port_vlan(struct ice_vsi *vsi)</div><div class='ctx'> 	err = ice_update_vsi(hw, vsi-&gt;idx, ctxt, NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(ice_pf_to_dev(vsi-&gt;back), "update VSI for clearing port based VLAN failed, err %d aq_err %s\n",</div><div class='del'>-			err, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+			err, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		vsi-&gt;info.port_based_outer_vlan =</div><div class='ctx'> 			ctxt-&gt;info.port_based_outer_vlan;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_xsk.c b/drivers/net/ethernet/intel/ice/ice_xsk.c<br/>index 334ae945d640..989ff1fd9110 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_xsk.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_xsk.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_xsk.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_xsk.c</a></div><div class='hunk'>@@ -2,6 +2,8 @@</div><div class='ctx'> /* Copyright (c) 2019, Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+#include &lt;linux/unroll.h&gt;</div><div class='add'>+#include &lt;net/libeth/xdp.h&gt;</div><div class='ctx'> #include &lt;net/xdp_sock_drv.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='ctx'> #include "ice.h"</div><div class='hunk'>@@ -18,52 +20,12 @@ static struct xdp_buff **ice_xdp_buf(struct ice_rx_ring *rx_ring, u32 idx)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_qp_reset_stats - Resets all stats for rings of given index</div><div class='del'>- * @vsi: VSI that contains rings of interest</div><div class='del'>- * @q_idx: ring index in array</div><div class='del'>- */</div><div class='del'>-static void ice_qp_reset_stats(struct ice_vsi *vsi, u16 q_idx)</div><div class='del'>-{</div><div class='del'>-	struct ice_vsi_stats *vsi_stat;</div><div class='del'>-	struct ice_pf *pf;</div><div class='del'>-</div><div class='del'>-	pf = vsi-&gt;back;</div><div class='del'>-	if (!pf-&gt;vsi_stats)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	vsi_stat = pf-&gt;vsi_stats[vsi-&gt;idx];</div><div class='del'>-	if (!vsi_stat)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	memset(&amp;vsi_stat-&gt;rx_ring_stats[q_idx]-&gt;rx_stats, 0,</div><div class='del'>-	       sizeof(vsi_stat-&gt;rx_ring_stats[q_idx]-&gt;rx_stats));</div><div class='del'>-	memset(&amp;vsi_stat-&gt;tx_ring_stats[q_idx]-&gt;stats, 0,</div><div class='del'>-	       sizeof(vsi_stat-&gt;tx_ring_stats[q_idx]-&gt;stats));</div><div class='del'>-	if (vsi-&gt;xdp_rings)</div><div class='del'>-		memset(&amp;vsi-&gt;xdp_rings[q_idx]-&gt;ring_stats-&gt;stats, 0,</div><div class='del'>-		       sizeof(vsi-&gt;xdp_rings[q_idx]-&gt;ring_stats-&gt;stats));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_qp_clean_rings - Cleans all the rings of a given index</div><div class='del'>- * @vsi: VSI that contains rings of interest</div><div class='del'>- * @q_idx: ring index in array</div><div class='del'>- */</div><div class='del'>-static void ice_qp_clean_rings(struct ice_vsi *vsi, u16 q_idx)</div><div class='del'>-{</div><div class='del'>-	ice_clean_tx_ring(vsi-&gt;tx_rings[q_idx]);</div><div class='del'>-	if (vsi-&gt;xdp_rings)</div><div class='del'>-		ice_clean_tx_ring(vsi-&gt;xdp_rings[q_idx]);</div><div class='del'>-	ice_clean_rx_ring(vsi-&gt;rx_rings[q_idx]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_qvec_toggle_napi - Enables/disables NAPI for a given q_vector</div><div class='ctx'>  * @vsi: VSI that has netdev</div><div class='ctx'>  * @q_vector: q_vector that has NAPI context</div><div class='ctx'>  * @enable: true for enable, false for disable</div><div class='ctx'>  */</div><div class='del'>-static void</div><div class='add'>+void</div><div class='ctx'> ice_qvec_toggle_napi(struct ice_vsi *vsi, struct ice_q_vector *q_vector,</div><div class='ctx'> 		     bool enable)</div><div class='ctx'> {</div><div class='hunk'>@@ -82,7 +44,7 @@ ice_qvec_toggle_napi(struct ice_vsi *vsi, struct ice_q_vector *q_vector,</div><div class='ctx'>  * @rx_ring: Rx ring that will have its IRQ disabled</div><div class='ctx'>  * @q_vector: queue vector</div><div class='ctx'>  */</div><div class='del'>-static void</div><div class='add'>+void</div><div class='ctx'> ice_qvec_dis_irq(struct ice_vsi *vsi, struct ice_rx_ring *rx_ring,</div><div class='ctx'> 		 struct ice_q_vector *q_vector)</div><div class='ctx'> {</div><div class='hunk'>@@ -112,7 +74,7 @@ ice_qvec_dis_irq(struct ice_vsi *vsi, struct ice_rx_ring *rx_ring,</div><div class='ctx'>  * @q_vector: queue vector</div><div class='ctx'>  * @qid: queue index</div><div class='ctx'>  */</div><div class='del'>-static void</div><div class='add'>+void</div><div class='ctx'> ice_qvec_cfg_msix(struct ice_vsi *vsi, struct ice_q_vector *q_vector, u16 qid)</div><div class='ctx'> {</div><div class='ctx'> 	u16 reg_idx = q_vector-&gt;reg_idx;</div><div class='hunk'>@@ -142,7 +104,7 @@ ice_qvec_cfg_msix(struct ice_vsi *vsi, struct ice_q_vector *q_vector, u16 qid)</div><div class='ctx'>  * @vsi: the VSI that contains queue vector</div><div class='ctx'>  * @q_vector: queue vector</div><div class='ctx'>  */</div><div class='del'>-static void ice_qvec_ena_irq(struct ice_vsi *vsi, struct ice_q_vector *q_vector)</div><div class='add'>+void ice_qvec_ena_irq(struct ice_vsi *vsi, struct ice_q_vector *q_vector)</div><div class='ctx'> {</div><div class='ctx'> 	struct ice_pf *pf = vsi-&gt;back;</div><div class='ctx'> 	struct ice_hw *hw = &amp;pf-&gt;hw;</div><div class='hunk'>@@ -153,111 +115,6 @@ static void ice_qvec_ena_irq(struct ice_vsi *vsi, struct ice_q_vector *q_vector)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_qp_dis - Disables a queue pair</div><div class='del'>- * @vsi: VSI of interest</div><div class='del'>- * @q_idx: ring index in array</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, negative on failure.</div><div class='del'>- */</div><div class='del'>-static int ice_qp_dis(struct ice_vsi *vsi, u16 q_idx)</div><div class='del'>-{</div><div class='del'>-	struct ice_txq_meta txq_meta = { };</div><div class='del'>-	struct ice_q_vector *q_vector;</div><div class='del'>-	struct ice_tx_ring *tx_ring;</div><div class='del'>-	struct ice_rx_ring *rx_ring;</div><div class='del'>-	int fail = 0;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (q_idx &gt;= vsi-&gt;num_rxq || q_idx &gt;= vsi-&gt;num_txq)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	tx_ring = vsi-&gt;tx_rings[q_idx];</div><div class='del'>-	rx_ring = vsi-&gt;rx_rings[q_idx];</div><div class='del'>-	q_vector = rx_ring-&gt;q_vector;</div><div class='del'>-</div><div class='del'>-	synchronize_net();</div><div class='del'>-	netif_carrier_off(vsi-&gt;netdev);</div><div class='del'>-	netif_tx_stop_queue(netdev_get_tx_queue(vsi-&gt;netdev, q_idx));</div><div class='del'>-</div><div class='del'>-	ice_qvec_dis_irq(vsi, rx_ring, q_vector);</div><div class='del'>-	ice_qvec_toggle_napi(vsi, q_vector, false);</div><div class='del'>-</div><div class='del'>-	ice_fill_txq_meta(vsi, tx_ring, &amp;txq_meta);</div><div class='del'>-	err = ice_vsi_stop_tx_ring(vsi, ICE_NO_RESET, 0, tx_ring, &amp;txq_meta);</div><div class='del'>-	if (!fail)</div><div class='del'>-		fail = err;</div><div class='del'>-	if (vsi-&gt;xdp_rings) {</div><div class='del'>-		struct ice_tx_ring *xdp_ring = vsi-&gt;xdp_rings[q_idx];</div><div class='del'>-</div><div class='del'>-		memset(&amp;txq_meta, 0, sizeof(txq_meta));</div><div class='del'>-		ice_fill_txq_meta(vsi, xdp_ring, &amp;txq_meta);</div><div class='del'>-		err = ice_vsi_stop_tx_ring(vsi, ICE_NO_RESET, 0, xdp_ring,</div><div class='del'>-					   &amp;txq_meta);</div><div class='del'>-		if (!fail)</div><div class='del'>-			fail = err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ice_vsi_ctrl_one_rx_ring(vsi, false, q_idx, false);</div><div class='del'>-	ice_qp_clean_rings(vsi, q_idx);</div><div class='del'>-	ice_qp_reset_stats(vsi, q_idx);</div><div class='del'>-</div><div class='del'>-	return fail;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_qp_ena - Enables a queue pair</div><div class='del'>- * @vsi: VSI of interest</div><div class='del'>- * @q_idx: ring index in array</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, negative on failure.</div><div class='del'>- */</div><div class='del'>-static int ice_qp_ena(struct ice_vsi *vsi, u16 q_idx)</div><div class='del'>-{</div><div class='del'>-	struct ice_q_vector *q_vector;</div><div class='del'>-	int fail = 0;</div><div class='del'>-	bool link_up;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = ice_vsi_cfg_single_txq(vsi, vsi-&gt;tx_rings, q_idx);</div><div class='del'>-	if (!fail)</div><div class='del'>-		fail = err;</div><div class='del'>-</div><div class='del'>-	if (ice_is_xdp_ena_vsi(vsi)) {</div><div class='del'>-		struct ice_tx_ring *xdp_ring = vsi-&gt;xdp_rings[q_idx];</div><div class='del'>-</div><div class='del'>-		err = ice_vsi_cfg_single_txq(vsi, vsi-&gt;xdp_rings, q_idx);</div><div class='del'>-		if (!fail)</div><div class='del'>-			fail = err;</div><div class='del'>-		ice_set_ring_xdp(xdp_ring);</div><div class='del'>-		ice_tx_xsk_pool(vsi, q_idx);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = ice_vsi_cfg_single_rxq(vsi, q_idx);</div><div class='del'>-	if (!fail)</div><div class='del'>-		fail = err;</div><div class='del'>-</div><div class='del'>-	q_vector = vsi-&gt;rx_rings[q_idx]-&gt;q_vector;</div><div class='del'>-	ice_qvec_cfg_msix(vsi, q_vector, q_idx);</div><div class='del'>-</div><div class='del'>-	err = ice_vsi_ctrl_one_rx_ring(vsi, true, q_idx, true);</div><div class='del'>-	if (!fail)</div><div class='del'>-		fail = err;</div><div class='del'>-</div><div class='del'>-	ice_qvec_toggle_napi(vsi, q_vector, true);</div><div class='del'>-	ice_qvec_ena_irq(vsi, q_vector);</div><div class='del'>-</div><div class='del'>-	/* make sure NAPI sees updated ice_{t,x}_ring::xsk_pool */</div><div class='del'>-	synchronize_net();</div><div class='del'>-	ice_get_link_status(vsi-&gt;port_info, &amp;link_up);</div><div class='del'>-	if (link_up) {</div><div class='del'>-		netif_tx_start_queue(netdev_get_tx_queue(vsi-&gt;netdev, q_idx));</div><div class='del'>-		netif_carrier_on(vsi-&gt;netdev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return fail;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_xsk_pool_disable - disable a buffer pool region</div><div class='ctx'>  * @vsi: Current VSI</div><div class='ctx'>  * @qid: queue ID</div><div class='hunk'>@@ -313,50 +170,18 @@ ice_xsk_pool_enable(struct ice_vsi *vsi, struct xsk_buff_pool *pool, u16 qid)</div><div class='ctx'>  * If allocation was successful, substitute buffer with allocated one.</div><div class='ctx'>  * Returns 0 on success, negative on failure</div><div class='ctx'>  */</div><div class='del'>-static int</div><div class='add'>+int</div><div class='ctx'> ice_realloc_rx_xdp_bufs(struct ice_rx_ring *rx_ring, bool pool_present)</div><div class='ctx'> {</div><div class='del'>-	size_t elem_size = pool_present ? sizeof(*rx_ring-&gt;xdp_buf) :</div><div class='del'>-					  sizeof(*rx_ring-&gt;rx_buf);</div><div class='del'>-	void *sw_ring = kcalloc(rx_ring-&gt;count, elem_size, GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-	if (!sw_ring)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	if (pool_present) {</div><div class='del'>-		kfree(rx_ring-&gt;rx_buf);</div><div class='del'>-		rx_ring-&gt;rx_buf = NULL;</div><div class='del'>-		rx_ring-&gt;xdp_buf = sw_ring;</div><div class='add'>+		rx_ring-&gt;xdp_buf = kcalloc(rx_ring-&gt;count,</div><div class='add'>+					   sizeof(*rx_ring-&gt;xdp_buf),</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+		if (!rx_ring-&gt;xdp_buf)</div><div class='add'>+			return -ENOMEM;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		kfree(rx_ring-&gt;xdp_buf);</div><div class='ctx'> 		rx_ring-&gt;xdp_buf = NULL;</div><div class='del'>-		rx_ring-&gt;rx_buf = sw_ring;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_realloc_zc_buf - reallocate XDP ZC queue pairs</div><div class='del'>- * @vsi: Current VSI</div><div class='del'>- * @zc: is zero copy set</div><div class='del'>- *</div><div class='del'>- * Reallocate buffer for rx_rings that might be used by XSK.</div><div class='del'>- * XDP requires more memory, than rx_buf provides.</div><div class='del'>- * Returns 0 on success, negative on failure</div><div class='del'>- */</div><div class='del'>-int ice_realloc_zc_buf(struct ice_vsi *vsi, bool zc)</div><div class='del'>-{</div><div class='del'>-	struct ice_rx_ring *rx_ring;</div><div class='del'>-	uint i;</div><div class='del'>-</div><div class='del'>-	ice_for_each_rxq(vsi, i) {</div><div class='del'>-		rx_ring = vsi-&gt;rx_rings[i];</div><div class='del'>-		if (!rx_ring-&gt;xsk_pool)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (ice_realloc_rx_xdp_bufs(rx_ring, zc))</div><div class='del'>-			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -372,6 +197,7 @@ int ice_realloc_zc_buf(struct ice_vsi *vsi, bool zc)</div><div class='ctx'>  */</div><div class='ctx'> int ice_xsk_pool_setup(struct ice_vsi *vsi, struct xsk_buff_pool *pool, u16 qid)</div><div class='ctx'> {</div><div class='add'>+	struct ice_rx_ring *rx_ring = vsi-&gt;rx_rings[qid];</div><div class='ctx'> 	bool if_running, pool_present = !!pool;</div><div class='ctx'> 	int ret = 0, pool_failure = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -385,8 +211,6 @@ int ice_xsk_pool_setup(struct ice_vsi *vsi, struct xsk_buff_pool *pool, u16 qid)</div><div class='ctx'> 		     ice_is_xdp_ena_vsi(vsi);</div><div class='ctx'> </div><div class='ctx'> 	if (if_running) {</div><div class='del'>-		struct ice_rx_ring *rx_ring = vsi-&gt;rx_rings[qid];</div><div class='del'>-</div><div class='ctx'> 		ret = ice_qp_dis(vsi, qid);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			netdev_err(vsi-&gt;netdev, "ice_qp_dis error = %d\n", ret);</div><div class='hunk'>@@ -447,11 +271,6 @@ static u16 ice_fill_rx_descs(struct xsk_buff_pool *pool, struct xdp_buff **xdp,</div><div class='ctx'> 		rx_desc-&gt;read.pkt_addr = cpu_to_le64(dma);</div><div class='ctx'> 		rx_desc-&gt;wb.status_error0 = 0;</div><div class='ctx'> </div><div class='del'>-		/* Put private info that changes on a per-packet basis</div><div class='del'>-		 * into xdp_buff_xsk-&gt;cb.</div><div class='del'>-		 */</div><div class='del'>-		ice_xdp_meta_set_desc(*xdp, rx_desc);</div><div class='del'>-</div><div class='ctx'> 		rx_desc++;</div><div class='ctx'> 		xdp++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -537,69 +356,6 @@ bool ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_construct_skb_zc - Create an sk_buff from zero-copy buffer</div><div class='del'>- * @rx_ring: Rx ring</div><div class='del'>- * @xdp: Pointer to XDP buffer</div><div class='del'>- *</div><div class='del'>- * This function allocates a new skb from a zero-copy Rx buffer.</div><div class='del'>- *</div><div class='del'>- * Returns the skb on success, NULL on failure.</div><div class='del'>- */</div><div class='del'>-static struct sk_buff *</div><div class='del'>-ice_construct_skb_zc(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)</div><div class='del'>-{</div><div class='del'>-	unsigned int totalsize = xdp-&gt;data_end - xdp-&gt;data_meta;</div><div class='del'>-	unsigned int metasize = xdp-&gt;data - xdp-&gt;data_meta;</div><div class='del'>-	struct skb_shared_info *sinfo = NULL;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	u32 nr_frags = 0;</div><div class='del'>-</div><div class='del'>-	if (unlikely(xdp_buff_has_frags(xdp))) {</div><div class='del'>-		sinfo = xdp_get_shared_info_from_buff(xdp);</div><div class='del'>-		nr_frags = sinfo-&gt;nr_frags;</div><div class='del'>-	}</div><div class='del'>-	net_prefetch(xdp-&gt;data_meta);</div><div class='del'>-</div><div class='del'>-	skb = napi_alloc_skb(&amp;rx_ring-&gt;q_vector-&gt;napi, totalsize);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	memcpy(__skb_put(skb, totalsize), xdp-&gt;data_meta,</div><div class='del'>-	       ALIGN(totalsize, sizeof(long)));</div><div class='del'>-</div><div class='del'>-	if (metasize) {</div><div class='del'>-		skb_metadata_set(skb, metasize);</div><div class='del'>-		__skb_pull(skb, metasize);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (likely(!xdp_buff_has_frags(xdp)))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	for (int i = 0; i &lt; nr_frags; i++) {</div><div class='del'>-		struct skb_shared_info *skinfo = skb_shinfo(skb);</div><div class='del'>-		skb_frag_t *frag = &amp;sinfo-&gt;frags[i];</div><div class='del'>-		struct page *page;</div><div class='del'>-		void *addr;</div><div class='del'>-</div><div class='del'>-		page = dev_alloc_page();</div><div class='del'>-		if (!page) {</div><div class='del'>-			dev_kfree_skb(skb);</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		addr = page_to_virt(page);</div><div class='del'>-</div><div class='del'>-		memcpy(addr, skb_frag_page(frag), skb_frag_size(frag));</div><div class='del'>-</div><div class='del'>-		__skb_fill_page_desc_noacc(skinfo, skinfo-&gt;nr_frags++,</div><div class='del'>-					   addr, 0, skb_frag_size(frag));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	xsk_buff_free(xdp);</div><div class='del'>-	return skb;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_clean_xdp_irq_zc - produce AF_XDP descriptors to CQ</div><div class='ctx'>  * @xdp_ring: XDP Tx ring</div><div class='ctx'>  * @xsk_pool: AF_XDP buffer pool pointer</div><div class='hunk'>@@ -801,35 +557,6 @@ out_failure:</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-ice_add_xsk_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *first,</div><div class='del'>-		 struct xdp_buff *xdp, const unsigned int size)</div><div class='del'>-{</div><div class='del'>-	struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(first);</div><div class='del'>-</div><div class='del'>-	if (!size)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (!xdp_buff_has_frags(first)) {</div><div class='del'>-		sinfo-&gt;nr_frags = 0;</div><div class='del'>-		sinfo-&gt;xdp_frags_size = 0;</div><div class='del'>-		xdp_buff_set_frags_flag(first);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (unlikely(sinfo-&gt;nr_frags == MAX_SKB_FRAGS)) {</div><div class='del'>-		xsk_buff_free(first);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__skb_fill_page_desc_noacc(sinfo, sinfo-&gt;nr_frags++,</div><div class='del'>-				   virt_to_page(xdp-&gt;data_hard_start),</div><div class='del'>-				   XDP_PACKET_HEADROOM, size);</div><div class='del'>-	sinfo-&gt;xdp_frags_size += size;</div><div class='del'>-	xsk_buff_add_frag(xdp);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * ice_clean_rx_irq_zc - consumes packets from the hardware ring</div><div class='ctx'>  * @rx_ring: AF_XDP Rx ring</div><div class='hunk'>@@ -842,10 +569,10 @@ int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring,</div><div class='ctx'> 			struct xsk_buff_pool *xsk_pool,</div><div class='ctx'> 			int budget)</div><div class='ctx'> {</div><div class='add'>+	struct xdp_buff *first = (struct xdp_buff *)rx_ring-&gt;xsk;</div><div class='ctx'> 	unsigned int total_rx_bytes = 0, total_rx_packets = 0;</div><div class='ctx'> 	u32 ntc = rx_ring-&gt;next_to_clean;</div><div class='ctx'> 	u32 ntu = rx_ring-&gt;next_to_use;</div><div class='del'>-	struct xdp_buff *first = NULL;</div><div class='ctx'> 	struct ice_tx_ring *xdp_ring;</div><div class='ctx'> 	unsigned int xdp_xmit = 0;</div><div class='ctx'> 	struct bpf_prog *xdp_prog;</div><div class='hunk'>@@ -859,9 +586,6 @@ int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring,</div><div class='ctx'> 	xdp_prog = READ_ONCE(rx_ring-&gt;xdp_prog);</div><div class='ctx'> 	xdp_ring = rx_ring-&gt;xdp_ring;</div><div class='ctx'> </div><div class='del'>-	if (ntc != rx_ring-&gt;first_desc)</div><div class='del'>-		first = *ice_xdp_buf(rx_ring, rx_ring-&gt;first_desc);</div><div class='del'>-</div><div class='ctx'> 	while (likely(total_rx_packets &lt; (unsigned int)budget)) {</div><div class='ctx'> 		union ice_32b_rx_flex_desc *rx_desc;</div><div class='ctx'> 		unsigned int size, xdp_res = 0;</div><div class='hunk'>@@ -895,16 +619,19 @@ int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring,</div><div class='ctx'> </div><div class='ctx'> 		if (!first) {</div><div class='ctx'> 			first = xdp;</div><div class='del'>-		} else if (ice_add_xsk_frag(rx_ring, first, xdp, size)) {</div><div class='del'>-			break;</div><div class='add'>+		} else if (likely(size) &amp;&amp; !xsk_buff_add_frag(first, xdp)) {</div><div class='add'>+			xsk_buff_free(first);</div><div class='add'>+			first = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (++ntc == cnt)</div><div class='ctx'> 			ntc = 0;</div><div class='ctx'> </div><div class='del'>-		if (ice_is_non_eop(rx_ring, rx_desc))</div><div class='add'>+		if (ice_is_non_eop(rx_ring, rx_desc) || unlikely(!first))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		((struct libeth_xdp_buff *)first)-&gt;desc = rx_desc;</div><div class='add'>+</div><div class='ctx'> 		xdp_res = ice_run_xdp_zc(rx_ring, first, xdp_prog, xdp_ring,</div><div class='ctx'> 					 xsk_pool);</div><div class='ctx'> 		if (likely(xdp_res &amp; (ICE_XDP_TX | ICE_XDP_REDIR))) {</div><div class='hunk'>@@ -912,7 +639,6 @@ int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring,</div><div class='ctx'> 		} else if (xdp_res == ICE_XDP_EXIT) {</div><div class='ctx'> 			failure = true;</div><div class='ctx'> 			first = NULL;</div><div class='del'>-			rx_ring-&gt;first_desc = ntc;</div><div class='ctx'> 			break;</div><div class='ctx'> 		} else if (xdp_res == ICE_XDP_CONSUMED) {</div><div class='ctx'> 			xsk_buff_free(first);</div><div class='hunk'>@@ -924,24 +650,20 @@ int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring,</div><div class='ctx'> 		total_rx_packets++;</div><div class='ctx'> </div><div class='ctx'> 		first = NULL;</div><div class='del'>-		rx_ring-&gt;first_desc = ntc;</div><div class='ctx'> 		continue;</div><div class='ctx'> </div><div class='ctx'> construct_skb:</div><div class='ctx'> 		/* XDP_PASS path */</div><div class='del'>-		skb = ice_construct_skb_zc(rx_ring, first);</div><div class='add'>+		skb = xdp_build_skb_from_zc(first);</div><div class='ctx'> 		if (!skb) {</div><div class='add'>+			xsk_buff_free(first);</div><div class='add'>+			first = NULL;</div><div class='add'>+</div><div class='ctx'> 			rx_ring-&gt;ring_stats-&gt;rx_stats.alloc_buf_failed++;</div><div class='del'>-			break;</div><div class='add'>+			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		first = NULL;</div><div class='del'>-		rx_ring-&gt;first_desc = ntc;</div><div class='del'>-</div><div class='del'>-		if (eth_skb_pad(skb)) {</div><div class='del'>-			skb = NULL;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		total_rx_bytes += skb-&gt;len;</div><div class='ctx'> 		total_rx_packets++;</div><div class='hunk'>@@ -953,7 +675,9 @@ construct_skb:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rx_ring-&gt;next_to_clean = ntc;</div><div class='del'>-	entries_to_alloc = ICE_RX_DESC_UNUSED(rx_ring);</div><div class='add'>+	rx_ring-&gt;xsk = (struct libeth_xdp_buff *)first;</div><div class='add'>+</div><div class='add'>+	entries_to_alloc = ICE_DESC_UNUSED(rx_ring);</div><div class='ctx'> 	if (entries_to_alloc &gt; ICE_RING_QUARTER(rx_ring))</div><div class='ctx'> 		failure |= !ice_alloc_rx_bufs_zc(rx_ring, xsk_pool,</div><div class='ctx'> 						 entries_to_alloc);</div><div class='hunk'>@@ -1017,7 +741,8 @@ static void ice_xmit_pkt_batch(struct ice_tx_ring *xdp_ring,</div><div class='ctx'> 	struct ice_tx_desc *tx_desc;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	loop_unrolled_for(i = 0; i &lt; PKTS_PER_BATCH; i++) {</div><div class='add'>+	unrolled_count(PKTS_PER_BATCH)</div><div class='add'>+	for (i = 0; i &lt; PKTS_PER_BATCH; i++) {</div><div class='ctx'> 		dma_addr_t dma;</div><div class='ctx'> </div><div class='ctx'> 		dma = xsk_buff_raw_get_dma(xsk_pool, descs[i].addr);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_xsk.h b/drivers/net/ethernet/intel/ice/ice_xsk.h<br/>index 45adeb513253..5275fcedc9e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_xsk.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_xsk.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_xsk.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/ice_xsk.h</a></div><div class='hunk'>@@ -7,14 +7,6 @@</div><div class='ctx'> </div><div class='ctx'> #define PKTS_PER_BATCH 8</div><div class='ctx'> </div><div class='del'>-#ifdef __clang__</div><div class='del'>-#define loop_unrolled_for _Pragma("clang loop unroll_count(8)") for</div><div class='del'>-#elif __GNUC__ &gt;= 8</div><div class='del'>-#define loop_unrolled_for _Pragma("GCC unroll 8") for</div><div class='del'>-#else</div><div class='del'>-#define loop_unrolled_for for</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> struct ice_vsi;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_XDP_SOCKETS</div><div class='hunk'>@@ -30,7 +22,14 @@ bool ice_xsk_any_rx_ring_ena(struct ice_vsi *vsi);</div><div class='ctx'> void ice_xsk_clean_rx_ring(struct ice_rx_ring *rx_ring);</div><div class='ctx'> void ice_xsk_clean_xdp_ring(struct ice_tx_ring *xdp_ring);</div><div class='ctx'> bool ice_xmit_zc(struct ice_tx_ring *xdp_ring, struct xsk_buff_pool *xsk_pool);</div><div class='del'>-int ice_realloc_zc_buf(struct ice_vsi *vsi, bool zc);</div><div class='add'>+int ice_realloc_rx_xdp_bufs(struct ice_rx_ring *rx_ring, bool pool_present);</div><div class='add'>+void ice_qvec_cfg_msix(struct ice_vsi *vsi, struct ice_q_vector *q_vector,</div><div class='add'>+		       u16 qid);</div><div class='add'>+void ice_qvec_toggle_napi(struct ice_vsi *vsi, struct ice_q_vector *q_vector,</div><div class='add'>+			  bool enable);</div><div class='add'>+void ice_qvec_ena_irq(struct ice_vsi *vsi, struct ice_q_vector *q_vector);</div><div class='add'>+void ice_qvec_dis_irq(struct ice_vsi *vsi, struct ice_rx_ring *rx_ring,</div><div class='add'>+		      struct ice_q_vector *q_vector);</div><div class='ctx'> #else</div><div class='ctx'> static inline bool ice_xmit_zc(struct ice_tx_ring __always_unused *xdp_ring,</div><div class='ctx'> 			       struct xsk_buff_pool __always_unused *xsk_pool)</div><div class='hunk'>@@ -78,10 +77,25 @@ static inline void ice_xsk_clean_rx_ring(struct ice_rx_ring *rx_ring) { }</div><div class='ctx'> static inline void ice_xsk_clean_xdp_ring(struct ice_tx_ring *xdp_ring) { }</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='del'>-ice_realloc_zc_buf(struct ice_vsi __always_unused *vsi,</div><div class='del'>-		   bool __always_unused zc)</div><div class='add'>+ice_realloc_rx_xdp_bufs(struct ice_rx_ring *rx_ring,</div><div class='add'>+			bool __always_unused pool_present)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+ice_qvec_cfg_msix(struct ice_vsi *vsi, struct ice_q_vector *q_vector,</div><div class='add'>+		  u16 qid) { }</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+ice_qvec_toggle_napi(struct ice_vsi *vsi, struct ice_q_vector *q_vector,</div><div class='add'>+		     bool enable) { }</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+ice_qvec_ena_irq(struct ice_vsi *vsi, struct ice_q_vector *q_vector) { }</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+ice_qvec_dis_irq(struct ice_vsi *vsi, struct ice_rx_ring *rx_ring,</div><div class='add'>+		 struct ice_q_vector *q_vector) { }</div><div class='ctx'> #endif /* CONFIG_XDP_SOCKETS */</div><div class='ctx'> #endif /* !_ICE_XSK_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl_allowlist.c b/drivers/net/ethernet/intel/ice/virt/allowlist.c<br/>index c105a82ee136..a07efec19c45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_virtchnl_allowlist.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_virtchnl_allowlist.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/virt/allowlist.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/virt/allowlist.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* Copyright (C) 2021, Intel Corporation. */</div><div class='ctx'> </div><div class='del'>-#include "ice_virtchnl_allowlist.h"</div><div class='add'>+#include "allowlist.h"</div><div class='ctx'> </div><div class='ctx'> /* Purpose of this file is to share functionality to allowlist or denylist</div><div class='ctx'>  * opcodes used in PF &lt;-&gt; VF communication. Group of opcodes:</div><div class='hunk'>@@ -65,7 +65,7 @@ static const u32 vlan_v2_allowlist_opcodes[] = {</div><div class='ctx'> /* VIRTCHNL_VF_OFFLOAD_RSS_PF */</div><div class='ctx'> static const u32 rss_pf_allowlist_opcodes[] = {</div><div class='ctx'> 	VIRTCHNL_OP_CONFIG_RSS_KEY, VIRTCHNL_OP_CONFIG_RSS_LUT,</div><div class='del'>-	VIRTCHNL_OP_GET_RSS_HENA_CAPS, VIRTCHNL_OP_SET_RSS_HENA,</div><div class='add'>+	VIRTCHNL_OP_GET_RSS_HASHCFG_CAPS, VIRTCHNL_OP_SET_RSS_HASHCFG,</div><div class='ctx'> 	VIRTCHNL_OP_CONFIG_RSS_HFUNC,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -84,6 +84,12 @@ static const u32 fdir_pf_allowlist_opcodes[] = {</div><div class='ctx'> 	VIRTCHNL_OP_ADD_FDIR_FILTER, VIRTCHNL_OP_DEL_FDIR_FILTER,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* VIRTCHNL_VF_CAP_PTP */</div><div class='add'>+static const u32 ptp_allowlist_opcodes[] = {</div><div class='add'>+	VIRTCHNL_OP_1588_PTP_GET_CAPS,</div><div class='add'>+	VIRTCHNL_OP_1588_PTP_GET_TIME,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const u32 tc_allowlist_opcodes[] = {</div><div class='ctx'> 	VIRTCHNL_OP_GET_QOS_CAPS, VIRTCHNL_OP_CONFIG_QUEUE_BW,</div><div class='ctx'> 	VIRTCHNL_OP_CONFIG_QUANTA,</div><div class='hunk'>@@ -110,6 +116,7 @@ static const struct allowlist_opcode_info allowlist_opcodes[] = {</div><div class='ctx'> 	ALLOW_ITEM(VIRTCHNL_VF_OFFLOAD_FDIR_PF, fdir_pf_allowlist_opcodes),</div><div class='ctx'> 	ALLOW_ITEM(VIRTCHNL_VF_OFFLOAD_VLAN_V2, vlan_v2_allowlist_opcodes),</div><div class='ctx'> 	ALLOW_ITEM(VIRTCHNL_VF_OFFLOAD_QOS, tc_allowlist_opcodes),</div><div class='add'>+	ALLOW_ITEM(VIRTCHNL_VF_CAP_PTP, ptp_allowlist_opcodes),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl_allowlist.h b/drivers/net/ethernet/intel/ice/virt/allowlist.h<br/>index d3ae86ded219..d3ae86ded219 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_virtchnl_allowlist.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_virtchnl_allowlist.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/virt/allowlist.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/virt/allowlist.h</a></div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.c b/drivers/net/ethernet/intel/ice/virt/fdir.c<br/>index 14e3f0f89c78..ae83c3914e29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/virt/fdir.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/virt/fdir.c</a></div><div class='hunk'>@@ -832,21 +832,27 @@ ice_vc_fdir_parse_raw(struct ice_vf *vf,</div><div class='ctx'> 		      struct virtchnl_proto_hdrs *proto,</div><div class='ctx'> 		      struct virtchnl_fdir_fltr_conf *conf)</div><div class='ctx'> {</div><div class='del'>-	u8 *pkt_buf, *msk_buf __free(kfree);</div><div class='add'>+	u8 *pkt_buf, *msk_buf __free(kfree) = NULL;</div><div class='ctx'> 	struct ice_parser_result rslt;</div><div class='ctx'> 	struct ice_pf *pf = vf-&gt;pf;</div><div class='add'>+	u16 pkt_len, udp_port = 0;</div><div class='ctx'> 	struct ice_parser *psr;</div><div class='ctx'> 	int status = -ENOMEM;</div><div class='ctx'> 	struct ice_hw *hw;</div><div class='del'>-	u16 udp_port = 0;</div><div class='ctx'> </div><div class='del'>-	pkt_buf = kzalloc(proto-&gt;raw.pkt_len, GFP_KERNEL);</div><div class='del'>-	msk_buf = kzalloc(proto-&gt;raw.pkt_len, GFP_KERNEL);</div><div class='add'>+	pkt_len = proto-&gt;raw.pkt_len;</div><div class='add'>+</div><div class='add'>+	if (!pkt_len || pkt_len &gt; VIRTCHNL_MAX_SIZE_RAW_PACKET)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pkt_buf = kzalloc(pkt_len, GFP_KERNEL);</div><div class='add'>+	msk_buf = kzalloc(pkt_len, GFP_KERNEL);</div><div class='add'>+</div><div class='ctx'> 	if (!pkt_buf || !msk_buf)</div><div class='ctx'> 		goto err_mem_alloc;</div><div class='ctx'> </div><div class='del'>-	memcpy(pkt_buf, proto-&gt;raw.spec, proto-&gt;raw.pkt_len);</div><div class='del'>-	memcpy(msk_buf, proto-&gt;raw.mask, proto-&gt;raw.pkt_len);</div><div class='add'>+	memcpy(pkt_buf, proto-&gt;raw.spec, pkt_len);</div><div class='add'>+	memcpy(msk_buf, proto-&gt;raw.mask, pkt_len);</div><div class='ctx'> </div><div class='ctx'> 	hw = &amp;pf-&gt;hw;</div><div class='ctx'> </div><div class='hunk'>@@ -862,7 +868,7 @@ ice_vc_fdir_parse_raw(struct ice_vf *vf,</div><div class='ctx'> 	if (ice_get_open_tunnel_port(hw, &amp;udp_port, TNL_VXLAN))</div><div class='ctx'> 		ice_parser_vxlan_tunnel_set(psr, udp_port, true);</div><div class='ctx'> </div><div class='del'>-	status = ice_parser_run(psr, pkt_buf, proto-&gt;raw.pkt_len, &amp;rslt);</div><div class='add'>+	status = ice_parser_run(psr, pkt_buf, pkt_len, &amp;rslt);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto err_parser_destroy;</div><div class='ctx'> </div><div class='hunk'>@@ -876,7 +882,7 @@ ice_vc_fdir_parse_raw(struct ice_vf *vf,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	status = ice_parser_profile_init(&amp;rslt, pkt_buf, msk_buf,</div><div class='del'>-					 proto-&gt;raw.pkt_len, ICE_BLK_FD,</div><div class='add'>+					 pkt_len, ICE_BLK_FD,</div><div class='ctx'> 					 conf-&gt;prof);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto err_parser_profile_init;</div><div class='hunk'>@@ -885,7 +891,7 @@ ice_vc_fdir_parse_raw(struct ice_vf *vf,</div><div class='ctx'> 		ice_parser_profile_dump(hw, conf-&gt;prof);</div><div class='ctx'> </div><div class='ctx'> 	/* Store raw flow info into @conf */</div><div class='del'>-	conf-&gt;pkt_len = proto-&gt;raw.pkt_len;</div><div class='add'>+	conf-&gt;pkt_len = pkt_len;</div><div class='ctx'> 	conf-&gt;pkt_buf = pkt_buf;</div><div class='ctx'> 	conf-&gt;parser_ena = true;</div><div class='ctx'> </div><div class='hunk'>@@ -1444,7 +1450,8 @@ err_free_pkt:</div><div class='ctx'>  */</div><div class='ctx'> static void ice_vf_fdir_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ice_vf_fdir_ctx *ctx_irq = from_timer(ctx_irq, t, rx_tmr);</div><div class='add'>+	struct ice_vf_fdir_ctx *ctx_irq = timer_container_of(ctx_irq, t,</div><div class='add'>+							     rx_tmr);</div><div class='ctx'> 	struct ice_vf_fdir_ctx *ctx_done;</div><div class='ctx'> 	struct ice_vf_fdir *fdir;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -1515,7 +1522,7 @@ ice_vc_fdir_irq_handler(struct ice_vsi *ctrl_vsi,</div><div class='ctx'> 	memcpy(&amp;ctx_done-&gt;rx_desc, rx_desc, sizeof(*rx_desc));</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;fdir-&gt;ctx_lock, flags);</div><div class='ctx'> </div><div class='del'>-	ret = del_timer(&amp;ctx_irq-&gt;rx_tmr);</div><div class='add'>+	ret = timer_delete(&amp;ctx_irq-&gt;rx_tmr);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		dev_err(dev, "VF %d: Unexpected inactive timer!\n", vf-&gt;vf_id);</div><div class='ctx'> </div><div class='hunk'>@@ -1910,7 +1917,7 @@ static void ice_vc_fdir_clear_irq_ctx(struct ice_vf *vf)</div><div class='ctx'> 	struct ice_vf_fdir_ctx *ctx = &amp;vf-&gt;fdir.ctx_irq;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;ctx-&gt;rx_tmr);</div><div class='add'>+	timer_delete(&amp;ctx-&gt;rx_tmr);</div><div class='ctx'> 	spin_lock_irqsave(&amp;vf-&gt;fdir.ctx_lock, flags);</div><div class='ctx'> 	ctx-&gt;flags &amp;= ~ICE_VF_FDIR_CTX_VALID;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;vf-&gt;fdir.ctx_lock, flags);</div><div class='hunk'>@@ -2091,6 +2098,11 @@ int ice_vc_add_fdir_fltr(struct ice_vf *vf, u8 *msg)</div><div class='ctx'> 	pf = vf-&gt;pf;</div><div class='ctx'> 	dev = ice_pf_to_dev(pf);</div><div class='ctx'> 	vf_vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vf_vsi) {</div><div class='add'>+		dev_err(dev, "Can not get FDIR vf_vsi for VF %u\n", vf-&gt;vf_id);</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> #define ICE_VF_MAX_FDIR_FILTERS	128</div><div class='ctx'> 	if (!ice_fdir_num_avail_fltr(&amp;pf-&gt;hw, vf_vsi) ||</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.h b/drivers/net/ethernet/intel/ice/virt/fdir.h<br/>index ac6dcab454b4..ac6dcab454b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_virtchnl_fdir.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/virt/fdir.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/virt/fdir.h</a></div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/virt/queues.c b/drivers/net/ethernet/intel/ice/virt/queues.c<br/>new file mode 100644<br/>index 000000000000..f73d5a3e83d4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/virt/queues.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/virt/queues.c</a></div><div class='hunk'>@@ -0,0 +1,975 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (C) 2022, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include "virtchnl.h"</div><div class='add'>+#include "queues.h"</div><div class='add'>+#include "ice_vf_lib_private.h"</div><div class='add'>+#include "ice.h"</div><div class='add'>+#include "ice_base.h"</div><div class='add'>+#include "ice_lib.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_get_max_frame_size - get max frame size allowed for VF</div><div class='add'>+ * @vf: VF used to determine max frame size</div><div class='add'>+ *</div><div class='add'>+ * Max frame size is determined based on the current port's max frame size and</div><div class='add'>+ * whether a port VLAN is configured on this VF. The VF is not aware whether</div><div class='add'>+ * it's in a port VLAN so the PF needs to account for this in max frame size</div><div class='add'>+ * checks and sending the max frame size to the VF.</div><div class='add'>+ */</div><div class='add'>+u16 ice_vc_get_max_frame_size(struct ice_vf *vf)</div><div class='add'>+{</div><div class='add'>+	struct ice_port_info *pi = ice_vf_get_port_info(vf);</div><div class='add'>+	u16 max_frame_size;</div><div class='add'>+</div><div class='add'>+	max_frame_size = pi-&gt;phy.link_info.max_frame_size;</div><div class='add'>+</div><div class='add'>+	if (ice_vf_is_port_vlan_ena(vf))</div><div class='add'>+		max_frame_size -= VLAN_HLEN;</div><div class='add'>+</div><div class='add'>+	return max_frame_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_isvalid_q_id</div><div class='add'>+ * @vsi: VSI to check queue ID against</div><div class='add'>+ * @qid: VSI relative queue ID</div><div class='add'>+ *</div><div class='add'>+ * check for the valid queue ID</div><div class='add'>+ */</div><div class='add'>+static bool ice_vc_isvalid_q_id(struct ice_vsi *vsi, u16 qid)</div><div class='add'>+{</div><div class='add'>+	/* allocated Tx and Rx queues should be always equal for VF VSI */</div><div class='add'>+	return qid &lt; vsi-&gt;alloc_txq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_isvalid_ring_len</div><div class='add'>+ * @ring_len: length of ring</div><div class='add'>+ *</div><div class='add'>+ * check for the valid ring count, should be multiple of ICE_REQ_DESC_MULTIPLE</div><div class='add'>+ * or zero</div><div class='add'>+ */</div><div class='add'>+static bool ice_vc_isvalid_ring_len(u16 ring_len)</div><div class='add'>+{</div><div class='add'>+	return ring_len == 0 ||</div><div class='add'>+	       (ring_len &gt;= ICE_MIN_NUM_DESC &amp;&amp;</div><div class='add'>+		ring_len &lt;= ICE_MAX_NUM_DESC_E810 &amp;&amp;</div><div class='add'>+		!(ring_len % ICE_REQ_DESC_MULTIPLE));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vf_cfg_qs_bw - Configure per queue bandwidth</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @num_queues: number of queues to be configured</div><div class='add'>+ *</div><div class='add'>+ * Configure per queue bandwidth.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or negative error value.</div><div class='add'>+ */</div><div class='add'>+static int ice_vf_cfg_qs_bw(struct ice_vf *vf, u16 num_queues)</div><div class='add'>+{</div><div class='add'>+	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	int ret;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_queues; i++) {</div><div class='add'>+		u32 p_rate, min_rate;</div><div class='add'>+		u8 tc;</div><div class='add'>+</div><div class='add'>+		p_rate = vf-&gt;qs_bw[i].peak;</div><div class='add'>+		min_rate = vf-&gt;qs_bw[i].committed;</div><div class='add'>+		tc = vf-&gt;qs_bw[i].tc;</div><div class='add'>+		if (p_rate)</div><div class='add'>+			ret = ice_cfg_q_bw_lmt(hw-&gt;port_info, vsi-&gt;idx, tc,</div><div class='add'>+					       vf-&gt;qs_bw[i].queue_id,</div><div class='add'>+					       ICE_MAX_BW, p_rate);</div><div class='add'>+		else</div><div class='add'>+			ret = ice_cfg_q_bw_dflt_lmt(hw-&gt;port_info, vsi-&gt;idx, tc,</div><div class='add'>+						    vf-&gt;qs_bw[i].queue_id,</div><div class='add'>+						    ICE_MAX_BW);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (min_rate)</div><div class='add'>+			ret = ice_cfg_q_bw_lmt(hw-&gt;port_info, vsi-&gt;idx, tc,</div><div class='add'>+					       vf-&gt;qs_bw[i].queue_id,</div><div class='add'>+					       ICE_MIN_BW, min_rate);</div><div class='add'>+		else</div><div class='add'>+			ret = ice_cfg_q_bw_dflt_lmt(hw-&gt;port_info, vsi-&gt;idx, tc,</div><div class='add'>+						    vf-&gt;qs_bw[i].queue_id,</div><div class='add'>+						    ICE_MIN_BW);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vf_cfg_q_quanta_profile - Configure quanta profile</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @quanta_prof_idx: pointer to the quanta profile index</div><div class='add'>+ * @quanta_size: quanta size to be set</div><div class='add'>+ *</div><div class='add'>+ * This function chooses available quanta profile and configures the register.</div><div class='add'>+ * The quanta profile is evenly divided by the number of device ports, and then</div><div class='add'>+ * available to the specific PF and VFs. The first profile for each PF is a</div><div class='add'>+ * reserved default profile. Only quanta size of the rest unused profile can be</div><div class='add'>+ * modified.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or negative error value.</div><div class='add'>+ */</div><div class='add'>+static int ice_vf_cfg_q_quanta_profile(struct ice_vf *vf, u16 quanta_size,</div><div class='add'>+				       u16 *quanta_prof_idx)</div><div class='add'>+{</div><div class='add'>+	const u16 n_desc = calc_quanta_desc(quanta_size);</div><div class='add'>+	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='add'>+	const u16 n_cmd = 2 * n_desc;</div><div class='add'>+	struct ice_pf *pf = vf-&gt;pf;</div><div class='add'>+	u16 per_pf, begin_id;</div><div class='add'>+	u8 n_used;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	begin_id = (GLCOMM_QUANTA_PROF_MAX_INDEX + 1) / hw-&gt;dev_caps.num_funcs *</div><div class='add'>+		   hw-&gt;logical_pf_id;</div><div class='add'>+</div><div class='add'>+	if (quanta_size == ICE_DFLT_QUANTA) {</div><div class='add'>+		*quanta_prof_idx = begin_id;</div><div class='add'>+	} else {</div><div class='add'>+		per_pf = (GLCOMM_QUANTA_PROF_MAX_INDEX + 1) /</div><div class='add'>+			 hw-&gt;dev_caps.num_funcs;</div><div class='add'>+		n_used = pf-&gt;num_quanta_prof_used;</div><div class='add'>+		if (n_used &lt; per_pf) {</div><div class='add'>+			*quanta_prof_idx = begin_id + 1 + n_used;</div><div class='add'>+			pf-&gt;num_quanta_prof_used++;</div><div class='add'>+		} else {</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = FIELD_PREP(GLCOMM_QUANTA_PROF_QUANTA_SIZE_M, quanta_size) |</div><div class='add'>+	      FIELD_PREP(GLCOMM_QUANTA_PROF_MAX_CMD_M, n_cmd) |</div><div class='add'>+	      FIELD_PREP(GLCOMM_QUANTA_PROF_MAX_DESC_M, n_desc);</div><div class='add'>+	wr32(hw, GLCOMM_QUANTA_PROF(*quanta_prof_idx), reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_validate_vqs_bitmaps - validate Rx/Tx queue bitmaps from VIRTCHNL</div><div class='add'>+ * @vqs: virtchnl_queue_select structure containing bitmaps to validate</div><div class='add'>+ *</div><div class='add'>+ * Return true on successful validation, else false</div><div class='add'>+ */</div><div class='add'>+static bool ice_vc_validate_vqs_bitmaps(struct virtchnl_queue_select *vqs)</div><div class='add'>+{</div><div class='add'>+	if ((!vqs-&gt;rx_queues &amp;&amp; !vqs-&gt;tx_queues) ||</div><div class='add'>+	    vqs-&gt;rx_queues &gt;= BIT(ICE_MAX_RSS_QS_PER_VF) ||</div><div class='add'>+	    vqs-&gt;tx_queues &gt;= BIT(ICE_MAX_RSS_QS_PER_VF))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vf_ena_txq_interrupt - enable Tx queue interrupt via QINT_TQCTL</div><div class='add'>+ * @vsi: VSI of the VF to configure</div><div class='add'>+ * @q_idx: VF queue index used to determine the queue in the PF's space</div><div class='add'>+ */</div><div class='add'>+void ice_vf_ena_txq_interrupt(struct ice_vsi *vsi, u32 q_idx)</div><div class='add'>+{</div><div class='add'>+	struct ice_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='add'>+	u32 pfq = vsi-&gt;txq_map[q_idx];</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = rd32(hw, QINT_TQCTL(pfq));</div><div class='add'>+</div><div class='add'>+	/* MSI-X index 0 in the VF's space is always for the OICR, which means</div><div class='add'>+	 * this is most likely a poll mode VF driver, so don't enable an</div><div class='add'>+	 * interrupt that was never configured via VIRTCHNL_OP_CONFIG_IRQ_MAP</div><div class='add'>+	 */</div><div class='add'>+	if (!(reg &amp; QINT_TQCTL_MSIX_INDX_M))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	wr32(hw, QINT_TQCTL(pfq), reg | QINT_TQCTL_CAUSE_ENA_M);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vf_ena_rxq_interrupt - enable Tx queue interrupt via QINT_RQCTL</div><div class='add'>+ * @vsi: VSI of the VF to configure</div><div class='add'>+ * @q_idx: VF queue index used to determine the queue in the PF's space</div><div class='add'>+ */</div><div class='add'>+void ice_vf_ena_rxq_interrupt(struct ice_vsi *vsi, u32 q_idx)</div><div class='add'>+{</div><div class='add'>+	struct ice_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='add'>+	u32 pfq = vsi-&gt;rxq_map[q_idx];</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = rd32(hw, QINT_RQCTL(pfq));</div><div class='add'>+</div><div class='add'>+	/* MSI-X index 0 in the VF's space is always for the OICR, which means</div><div class='add'>+	 * this is most likely a poll mode VF driver, so don't enable an</div><div class='add'>+	 * interrupt that was never configured via VIRTCHNL_OP_CONFIG_IRQ_MAP</div><div class='add'>+	 */</div><div class='add'>+	if (!(reg &amp; QINT_RQCTL_MSIX_INDX_M))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	wr32(hw, QINT_RQCTL(pfq), reg | QINT_RQCTL_CAUSE_ENA_M);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_ena_qs_msg</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer</div><div class='add'>+ *</div><div class='add'>+ * called from the VF to enable all or specific queue(s)</div><div class='add'>+ */</div><div class='add'>+int ice_vc_ena_qs_msg(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	struct virtchnl_queue_select *vqs =</div><div class='add'>+	    (struct virtchnl_queue_select *)msg;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	unsigned long q_map;</div><div class='add'>+	u16 vf_q_id;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ice_vc_isvalid_vsi_id(vf, vqs-&gt;vsi_id)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ice_vc_validate_vqs_bitmaps(vqs)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable only Rx rings, Tx rings were enabled by the FW when the</div><div class='add'>+	 * Tx queue group list was configured and the context bits were</div><div class='add'>+	 * programmed using ice_vsi_cfg_txqs</div><div class='add'>+	 */</div><div class='add'>+	q_map = vqs-&gt;rx_queues;</div><div class='add'>+	for_each_set_bit(vf_q_id, &amp;q_map, ICE_MAX_RSS_QS_PER_VF) {</div><div class='add'>+		if (!ice_vc_isvalid_q_id(vsi, vf_q_id)) {</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Skip queue if enabled */</div><div class='add'>+		if (test_bit(vf_q_id, vf-&gt;rxq_ena))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ice_vsi_ctrl_one_rx_ring(vsi, true, vf_q_id, true)) {</div><div class='add'>+			dev_err(ice_pf_to_dev(vsi-&gt;back), "Failed to enable Rx ring %d on VSI %d\n",</div><div class='add'>+				vf_q_id, vsi-&gt;vsi_num);</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ice_vf_ena_rxq_interrupt(vsi, vf_q_id);</div><div class='add'>+		set_bit(vf_q_id, vf-&gt;rxq_ena);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	q_map = vqs-&gt;tx_queues;</div><div class='add'>+	for_each_set_bit(vf_q_id, &amp;q_map, ICE_MAX_RSS_QS_PER_VF) {</div><div class='add'>+		if (!ice_vc_isvalid_q_id(vsi, vf_q_id)) {</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Skip queue if enabled */</div><div class='add'>+		if (test_bit(vf_q_id, vf-&gt;txq_ena))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ice_vf_ena_txq_interrupt(vsi, vf_q_id);</div><div class='add'>+		set_bit(vf_q_id, vf-&gt;txq_ena);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set flag to indicate that queues are enabled */</div><div class='add'>+	if (v_ret == VIRTCHNL_STATUS_SUCCESS)</div><div class='add'>+		set_bit(ICE_VF_STATE_QS_ENA, vf-&gt;vf_states);</div><div class='add'>+</div><div class='add'>+error_param:</div><div class='add'>+	/* send the response to the VF */</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES, v_ret,</div><div class='add'>+				     NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vf_vsi_dis_single_txq - disable a single Tx queue</div><div class='add'>+ * @vf: VF to disable queue for</div><div class='add'>+ * @vsi: VSI for the VF</div><div class='add'>+ * @q_id: VF relative (0-based) queue ID</div><div class='add'>+ *</div><div class='add'>+ * Attempt to disable the Tx queue passed in. If the Tx queue was successfully</div><div class='add'>+ * disabled then clear q_id bit in the enabled queues bitmap and return</div><div class='add'>+ * success. Otherwise return error.</div><div class='add'>+ */</div><div class='add'>+int ice_vf_vsi_dis_single_txq(struct ice_vf *vf, struct ice_vsi *vsi, u16 q_id)</div><div class='add'>+{</div><div class='add'>+	struct ice_txq_meta txq_meta = { 0 };</div><div class='add'>+	struct ice_tx_ring *ring;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(q_id, vf-&gt;txq_ena))</div><div class='add'>+		dev_dbg(ice_pf_to_dev(vsi-&gt;back), "Queue %u on VSI %u is not enabled, but stopping it anyway\n",</div><div class='add'>+			q_id, vsi-&gt;vsi_num);</div><div class='add'>+</div><div class='add'>+	ring = vsi-&gt;tx_rings[q_id];</div><div class='add'>+	if (!ring)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ice_fill_txq_meta(vsi, ring, &amp;txq_meta);</div><div class='add'>+</div><div class='add'>+	err = ice_vsi_stop_tx_ring(vsi, ICE_NO_RESET, vf-&gt;vf_id, ring, &amp;txq_meta);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(ice_pf_to_dev(vsi-&gt;back), "Failed to stop Tx ring %d on VSI %d\n",</div><div class='add'>+			q_id, vsi-&gt;vsi_num);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clear enabled queues flag */</div><div class='add'>+	clear_bit(q_id, vf-&gt;txq_ena);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_dis_qs_msg</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer</div><div class='add'>+ *</div><div class='add'>+ * called from the VF to disable all or specific queue(s)</div><div class='add'>+ */</div><div class='add'>+int ice_vc_dis_qs_msg(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	struct virtchnl_queue_select *vqs =</div><div class='add'>+	    (struct virtchnl_queue_select *)msg;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	unsigned long q_map;</div><div class='add'>+	u16 vf_q_id;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states) &amp;&amp;</div><div class='add'>+	    !test_bit(ICE_VF_STATE_QS_ENA, vf-&gt;vf_states)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ice_vc_isvalid_vsi_id(vf, vqs-&gt;vsi_id)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ice_vc_validate_vqs_bitmaps(vqs)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vqs-&gt;tx_queues) {</div><div class='add'>+		q_map = vqs-&gt;tx_queues;</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(vf_q_id, &amp;q_map, ICE_MAX_RSS_QS_PER_VF) {</div><div class='add'>+			if (!ice_vc_isvalid_q_id(vsi, vf_q_id)) {</div><div class='add'>+				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+				goto error_param;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ice_vf_vsi_dis_single_txq(vf, vsi, vf_q_id)) {</div><div class='add'>+				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+				goto error_param;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	q_map = vqs-&gt;rx_queues;</div><div class='add'>+	/* speed up Rx queue disable by batching them if possible */</div><div class='add'>+	if (q_map &amp;&amp;</div><div class='add'>+	    bitmap_equal(&amp;q_map, vf-&gt;rxq_ena, ICE_MAX_RSS_QS_PER_VF)) {</div><div class='add'>+		if (ice_vsi_stop_all_rx_rings(vsi)) {</div><div class='add'>+			dev_err(ice_pf_to_dev(vsi-&gt;back), "Failed to stop all Rx rings on VSI %d\n",</div><div class='add'>+				vsi-&gt;vsi_num);</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		bitmap_zero(vf-&gt;rxq_ena, ICE_MAX_RSS_QS_PER_VF);</div><div class='add'>+	} else if (q_map) {</div><div class='add'>+		for_each_set_bit(vf_q_id, &amp;q_map, ICE_MAX_RSS_QS_PER_VF) {</div><div class='add'>+			if (!ice_vc_isvalid_q_id(vsi, vf_q_id)) {</div><div class='add'>+				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+				goto error_param;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Skip queue if not enabled */</div><div class='add'>+			if (!test_bit(vf_q_id, vf-&gt;rxq_ena))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (ice_vsi_ctrl_one_rx_ring(vsi, false, vf_q_id,</div><div class='add'>+						     true)) {</div><div class='add'>+				dev_err(ice_pf_to_dev(vsi-&gt;back), "Failed to stop Rx ring %d on VSI %d\n",</div><div class='add'>+					vf_q_id, vsi-&gt;vsi_num);</div><div class='add'>+				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+				goto error_param;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Clear enabled queues flag */</div><div class='add'>+			clear_bit(vf_q_id, vf-&gt;rxq_ena);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clear enabled queues flag */</div><div class='add'>+	if (v_ret == VIRTCHNL_STATUS_SUCCESS &amp;&amp; ice_vf_has_no_qs_ena(vf))</div><div class='add'>+		clear_bit(ICE_VF_STATE_QS_ENA, vf-&gt;vf_states);</div><div class='add'>+</div><div class='add'>+error_param:</div><div class='add'>+	/* send the response to the VF */</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES, v_ret,</div><div class='add'>+				     NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_cfg_interrupt</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @vsi: the VSI being configured</div><div class='add'>+ * @map: vector map for mapping vectors to queues</div><div class='add'>+ * @q_vector: structure for interrupt vector</div><div class='add'>+ * configure the IRQ to queue map</div><div class='add'>+ */</div><div class='add'>+static enum virtchnl_status_code</div><div class='add'>+ice_cfg_interrupt(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='add'>+		  struct virtchnl_vector_map *map,</div><div class='add'>+		  struct ice_q_vector *q_vector)</div><div class='add'>+{</div><div class='add'>+	u16 vsi_q_id, vsi_q_id_idx;</div><div class='add'>+	unsigned long qmap;</div><div class='add'>+</div><div class='add'>+	q_vector-&gt;num_ring_rx = 0;</div><div class='add'>+	q_vector-&gt;num_ring_tx = 0;</div><div class='add'>+</div><div class='add'>+	qmap = map-&gt;rxq_map;</div><div class='add'>+	for_each_set_bit(vsi_q_id_idx, &amp;qmap, ICE_MAX_RSS_QS_PER_VF) {</div><div class='add'>+		vsi_q_id = vsi_q_id_idx;</div><div class='add'>+</div><div class='add'>+		if (!ice_vc_isvalid_q_id(vsi, vsi_q_id))</div><div class='add'>+			return VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+</div><div class='add'>+		q_vector-&gt;num_ring_rx++;</div><div class='add'>+		q_vector-&gt;rx.itr_idx = map-&gt;rxitr_idx;</div><div class='add'>+		vsi-&gt;rx_rings[vsi_q_id]-&gt;q_vector = q_vector;</div><div class='add'>+		ice_cfg_rxq_interrupt(vsi, vsi_q_id,</div><div class='add'>+				      q_vector-&gt;vf_reg_idx,</div><div class='add'>+				      q_vector-&gt;rx.itr_idx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qmap = map-&gt;txq_map;</div><div class='add'>+	for_each_set_bit(vsi_q_id_idx, &amp;qmap, ICE_MAX_RSS_QS_PER_VF) {</div><div class='add'>+		vsi_q_id = vsi_q_id_idx;</div><div class='add'>+</div><div class='add'>+		if (!ice_vc_isvalid_q_id(vsi, vsi_q_id))</div><div class='add'>+			return VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+</div><div class='add'>+		q_vector-&gt;num_ring_tx++;</div><div class='add'>+		q_vector-&gt;tx.itr_idx = map-&gt;txitr_idx;</div><div class='add'>+		vsi-&gt;tx_rings[vsi_q_id]-&gt;q_vector = q_vector;</div><div class='add'>+		ice_cfg_txq_interrupt(vsi, vsi_q_id,</div><div class='add'>+				      q_vector-&gt;vf_reg_idx,</div><div class='add'>+				      q_vector-&gt;tx.itr_idx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_cfg_irq_map_msg</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer</div><div class='add'>+ *</div><div class='add'>+ * called from the VF to configure the IRQ to queue map</div><div class='add'>+ */</div><div class='add'>+int ice_vc_cfg_irq_map_msg(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	u16 num_q_vectors_mapped, vsi_id, vector_id;</div><div class='add'>+	struct virtchnl_irq_map_info *irqmap_info;</div><div class='add'>+	struct virtchnl_vector_map *map;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	irqmap_info = (struct virtchnl_irq_map_info *)msg;</div><div class='add'>+	num_q_vectors_mapped = irqmap_info-&gt;num_vectors;</div><div class='add'>+</div><div class='add'>+	/* Check to make sure number of VF vectors mapped is not greater than</div><div class='add'>+	 * number of VF vectors originally allocated, and check that</div><div class='add'>+	 * there is actually at least a single VF queue vector mapped</div><div class='add'>+	 */</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states) ||</div><div class='add'>+	    vf-&gt;num_msix &lt; num_q_vectors_mapped ||</div><div class='add'>+	    !num_q_vectors_mapped) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_q_vectors_mapped; i++) {</div><div class='add'>+		struct ice_q_vector *q_vector;</div><div class='add'>+</div><div class='add'>+		map = &amp;irqmap_info-&gt;vecmap[i];</div><div class='add'>+</div><div class='add'>+		vector_id = map-&gt;vector_id;</div><div class='add'>+		vsi_id = map-&gt;vsi_id;</div><div class='add'>+		/* vector_id is always 0-based for each VF, and can never be</div><div class='add'>+		 * larger than or equal to the max allowed interrupts per VF</div><div class='add'>+		 */</div><div class='add'>+		if (!(vector_id &lt; vf-&gt;num_msix) ||</div><div class='add'>+		    !ice_vc_isvalid_vsi_id(vf, vsi_id) ||</div><div class='add'>+		    (!vector_id &amp;&amp; (map-&gt;rxq_map || map-&gt;txq_map))) {</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* No need to map VF miscellaneous or rogue vector */</div><div class='add'>+		if (!vector_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Subtract non queue vector from vector_id passed by VF</div><div class='add'>+		 * to get actual number of VSI queue vector array index</div><div class='add'>+		 */</div><div class='add'>+		q_vector = vsi-&gt;q_vectors[vector_id - ICE_NONQ_VECS_VF];</div><div class='add'>+		if (!q_vector) {</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* lookout for the invalid queue index */</div><div class='add'>+		v_ret = ice_cfg_interrupt(vf, vsi, map, q_vector);</div><div class='add'>+		if (v_ret)</div><div class='add'>+			goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+error_param:</div><div class='add'>+	/* send the response to the VF */</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP, v_ret,</div><div class='add'>+				     NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_cfg_q_bw - Configure per queue bandwidth</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer which holds the command descriptor</div><div class='add'>+ *</div><div class='add'>+ * Configure VF queues bandwidth.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or negative error value.</div><div class='add'>+ */</div><div class='add'>+int ice_vc_cfg_q_bw(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	struct virtchnl_queues_bw_cfg *qbw =</div><div class='add'>+		(struct virtchnl_queues_bw_cfg *)msg;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states) ||</div><div class='add'>+	    !ice_vc_isvalid_vsi_id(vf, qbw-&gt;vsi_id)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (qbw-&gt;num_queues &gt; ICE_MAX_RSS_QS_PER_VF ||</div><div class='add'>+	    qbw-&gt;num_queues &gt; min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq)) {</div><div class='add'>+		dev_err(ice_pf_to_dev(vf-&gt;pf), "VF-%d trying to configure more than allocated number of queues: %d\n",</div><div class='add'>+			vf-&gt;vf_id, min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq));</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; qbw-&gt;num_queues; i++) {</div><div class='add'>+		if (qbw-&gt;cfg[i].shaper.peak != 0 &amp;&amp; vf-&gt;max_tx_rate != 0 &amp;&amp;</div><div class='add'>+		    qbw-&gt;cfg[i].shaper.peak &gt; vf-&gt;max_tx_rate) {</div><div class='add'>+			dev_warn(ice_pf_to_dev(vf-&gt;pf), "The maximum queue %d rate limit configuration may not take effect because the maximum TX rate for VF-%d is %d\n",</div><div class='add'>+				 qbw-&gt;cfg[i].queue_id, vf-&gt;vf_id,</div><div class='add'>+				 vf-&gt;max_tx_rate);</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		if (qbw-&gt;cfg[i].shaper.committed != 0 &amp;&amp; vf-&gt;min_tx_rate != 0 &amp;&amp;</div><div class='add'>+		    qbw-&gt;cfg[i].shaper.committed &lt; vf-&gt;min_tx_rate) {</div><div class='add'>+			dev_warn(ice_pf_to_dev(vf-&gt;pf), "The minimum queue %d rate limit configuration may not take effect because the minimum TX rate for VF-%d is %d\n",</div><div class='add'>+				 qbw-&gt;cfg[i].queue_id, vf-&gt;vf_id,</div><div class='add'>+				 vf-&gt;min_tx_rate);</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		if (qbw-&gt;cfg[i].queue_id &gt; vf-&gt;num_vf_qs) {</div><div class='add'>+			dev_warn(ice_pf_to_dev(vf-&gt;pf), "VF-%d trying to configure invalid queue_id\n",</div><div class='add'>+				 vf-&gt;vf_id);</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		if (qbw-&gt;cfg[i].tc &gt;= ICE_MAX_TRAFFIC_CLASS) {</div><div class='add'>+			dev_warn(ice_pf_to_dev(vf-&gt;pf), "VF-%d trying to configure a traffic class higher than allowed\n",</div><div class='add'>+				 vf-&gt;vf_id);</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; qbw-&gt;num_queues; i++) {</div><div class='add'>+		vf-&gt;qs_bw[i].queue_id = qbw-&gt;cfg[i].queue_id;</div><div class='add'>+		vf-&gt;qs_bw[i].peak = qbw-&gt;cfg[i].shaper.peak;</div><div class='add'>+		vf-&gt;qs_bw[i].committed = qbw-&gt;cfg[i].shaper.committed;</div><div class='add'>+		vf-&gt;qs_bw[i].tc = qbw-&gt;cfg[i].tc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ice_vf_cfg_qs_bw(vf, qbw-&gt;num_queues))</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* send the response to the VF */</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_QUEUE_BW,</div><div class='add'>+				    v_ret, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_cfg_q_quanta - Configure per queue quanta</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer which holds the command descriptor</div><div class='add'>+ *</div><div class='add'>+ * Configure VF queues quanta.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or negative error value.</div><div class='add'>+ */</div><div class='add'>+int ice_vc_cfg_q_quanta(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	u16 quanta_prof_id, quanta_size, start_qid, num_queues, end_qid, i;</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	struct virtchnl_quanta_cfg *qquanta =</div><div class='add'>+		(struct virtchnl_quanta_cfg *)msg;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	start_qid = qquanta-&gt;queue_select.start_queue_id;</div><div class='add'>+	num_queues = qquanta-&gt;queue_select.num_queues;</div><div class='add'>+</div><div class='add'>+	if (check_add_overflow(start_qid, num_queues, &amp;end_qid)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (end_qid &gt; ICE_MAX_RSS_QS_PER_VF ||</div><div class='add'>+	    end_qid &gt; min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq)) {</div><div class='add'>+		dev_err(ice_pf_to_dev(vf-&gt;pf), "VF-%d trying to configure more than allocated number of queues: %d\n",</div><div class='add'>+			vf-&gt;vf_id, min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq));</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	quanta_size = qquanta-&gt;quanta_size;</div><div class='add'>+	if (quanta_size &gt; ICE_MAX_QUANTA_SIZE ||</div><div class='add'>+	    quanta_size &lt; ICE_MIN_QUANTA_SIZE) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (quanta_size % 64) {</div><div class='add'>+		dev_err(ice_pf_to_dev(vf-&gt;pf), "quanta size should be the product of 64\n");</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ice_vf_cfg_q_quanta_profile(vf, quanta_size,</div><div class='add'>+					  &amp;quanta_prof_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_NOT_SUPPORTED;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = start_qid; i &lt; end_qid; i++)</div><div class='add'>+		vsi-&gt;tx_rings[i]-&gt;quanta_prof_id = quanta_prof_id;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* send the response to the VF */</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_QUANTA,</div><div class='add'>+				     v_ret, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_cfg_qs_msg</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer</div><div class='add'>+ *</div><div class='add'>+ * called from the VF to configure the Rx/Tx queues</div><div class='add'>+ */</div><div class='add'>+int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl_vsi_queue_config_info *qci =</div><div class='add'>+	    (struct virtchnl_vsi_queue_config_info *)msg;</div><div class='add'>+	struct virtchnl_queue_pair_info *qpi;</div><div class='add'>+	struct ice_pf *pf = vf-&gt;pf;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	int i = -1, q_idx;</div><div class='add'>+	bool ena_ts;</div><div class='add'>+	u8 act_prt;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;lag_mutex);</div><div class='add'>+	act_prt = ice_lag_prepare_vf_reset(pf-&gt;lag);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states))</div><div class='add'>+		goto error_param;</div><div class='add'>+</div><div class='add'>+	if (!ice_vc_isvalid_vsi_id(vf, qci-&gt;vsi_id))</div><div class='add'>+		goto error_param;</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi)</div><div class='add'>+		goto error_param;</div><div class='add'>+</div><div class='add'>+	if (qci-&gt;num_queue_pairs &gt; ICE_MAX_RSS_QS_PER_VF ||</div><div class='add'>+	    qci-&gt;num_queue_pairs &gt; min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq)) {</div><div class='add'>+		dev_err(ice_pf_to_dev(pf), "VF-%d requesting more than supported number of queues: %d\n",</div><div class='add'>+			vf-&gt;vf_id, min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq));</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; qci-&gt;num_queue_pairs; i++) {</div><div class='add'>+		if (!qci-&gt;qpair[i].rxq.crc_disable)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!(vf-&gt;driver_caps &amp; VIRTCHNL_VF_OFFLOAD_CRC) ||</div><div class='add'>+		    vf-&gt;vlan_strip_ena)</div><div class='add'>+			goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; qci-&gt;num_queue_pairs; i++) {</div><div class='add'>+		qpi = &amp;qci-&gt;qpair[i];</div><div class='add'>+		if (qpi-&gt;txq.vsi_id != qci-&gt;vsi_id ||</div><div class='add'>+		    qpi-&gt;rxq.vsi_id != qci-&gt;vsi_id ||</div><div class='add'>+		    qpi-&gt;rxq.queue_id != qpi-&gt;txq.queue_id ||</div><div class='add'>+		    qpi-&gt;txq.headwb_enabled ||</div><div class='add'>+		    !ice_vc_isvalid_ring_len(qpi-&gt;txq.ring_len) ||</div><div class='add'>+		    !ice_vc_isvalid_ring_len(qpi-&gt;rxq.ring_len) ||</div><div class='add'>+		    !ice_vc_isvalid_q_id(vsi, qpi-&gt;txq.queue_id)) {</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		q_idx = qpi-&gt;rxq.queue_id;</div><div class='add'>+</div><div class='add'>+		/* make sure selected "q_idx" is in valid range of queues</div><div class='add'>+		 * for selected "vsi"</div><div class='add'>+		 */</div><div class='add'>+		if (q_idx &gt;= vsi-&gt;alloc_txq || q_idx &gt;= vsi-&gt;alloc_rxq) {</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* copy Tx queue info from VF into VSI */</div><div class='add'>+		if (qpi-&gt;txq.ring_len &gt; 0) {</div><div class='add'>+			vsi-&gt;tx_rings[q_idx]-&gt;dma = qpi-&gt;txq.dma_ring_addr;</div><div class='add'>+			vsi-&gt;tx_rings[q_idx]-&gt;count = qpi-&gt;txq.ring_len;</div><div class='add'>+</div><div class='add'>+			/* Disable any existing queue first */</div><div class='add'>+			if (ice_vf_vsi_dis_single_txq(vf, vsi, q_idx))</div><div class='add'>+				goto error_param;</div><div class='add'>+</div><div class='add'>+			/* Configure a queue with the requested settings */</div><div class='add'>+			if (ice_vsi_cfg_single_txq(vsi, vsi-&gt;tx_rings, q_idx)) {</div><div class='add'>+				dev_warn(ice_pf_to_dev(pf), "VF-%d failed to configure TX queue %d\n",</div><div class='add'>+					 vf-&gt;vf_id, q_idx);</div><div class='add'>+				goto error_param;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* copy Rx queue info from VF into VSI */</div><div class='add'>+		if (qpi-&gt;rxq.ring_len &gt; 0) {</div><div class='add'>+			u16 max_frame_size = ice_vc_get_max_frame_size(vf);</div><div class='add'>+			struct ice_rx_ring *ring = vsi-&gt;rx_rings[q_idx];</div><div class='add'>+			u32 rxdid;</div><div class='add'>+</div><div class='add'>+			ring-&gt;dma = qpi-&gt;rxq.dma_ring_addr;</div><div class='add'>+			ring-&gt;count = qpi-&gt;rxq.ring_len;</div><div class='add'>+</div><div class='add'>+			if (qpi-&gt;rxq.crc_disable)</div><div class='add'>+				ring-&gt;flags |= ICE_RX_FLAGS_CRC_STRIP_DIS;</div><div class='add'>+			else</div><div class='add'>+				ring-&gt;flags &amp;= ~ICE_RX_FLAGS_CRC_STRIP_DIS;</div><div class='add'>+</div><div class='add'>+			if (qpi-&gt;rxq.databuffer_size != 0 &amp;&amp;</div><div class='add'>+			    (qpi-&gt;rxq.databuffer_size &gt; ((16 * 1024) - 128) ||</div><div class='add'>+			     qpi-&gt;rxq.databuffer_size &lt; 1024))</div><div class='add'>+				goto error_param;</div><div class='add'>+</div><div class='add'>+			ring-&gt;rx_buf_len = qpi-&gt;rxq.databuffer_size;</div><div class='add'>+</div><div class='add'>+			if (qpi-&gt;rxq.max_pkt_size &gt; max_frame_size ||</div><div class='add'>+			    qpi-&gt;rxq.max_pkt_size &lt; 64)</div><div class='add'>+				goto error_param;</div><div class='add'>+</div><div class='add'>+			vsi-&gt;max_frame = qpi-&gt;rxq.max_pkt_size;</div><div class='add'>+			/* add space for the port VLAN since the VF driver is</div><div class='add'>+			 * not expected to account for it in the MTU</div><div class='add'>+			 * calculation</div><div class='add'>+			 */</div><div class='add'>+			if (ice_vf_is_port_vlan_ena(vf))</div><div class='add'>+				vsi-&gt;max_frame += VLAN_HLEN;</div><div class='add'>+</div><div class='add'>+			if (ice_vsi_cfg_single_rxq(vsi, q_idx)) {</div><div class='add'>+				dev_warn(ice_pf_to_dev(pf), "VF-%d failed to configure RX queue %d\n",</div><div class='add'>+					 vf-&gt;vf_id, q_idx);</div><div class='add'>+				goto error_param;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* If Rx flex desc is supported, select RXDID for Rx</div><div class='add'>+			 * queues. Otherwise, use legacy 32byte descriptor</div><div class='add'>+			 * format. Legacy 16byte descriptor is not supported.</div><div class='add'>+			 * If this RXDID is selected, return error.</div><div class='add'>+			 */</div><div class='add'>+			if (vf-&gt;driver_caps &amp;</div><div class='add'>+			    VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) {</div><div class='add'>+				rxdid = qpi-&gt;rxq.rxdid;</div><div class='add'>+				if (!(BIT(rxdid) &amp; pf-&gt;supported_rxdids))</div><div class='add'>+					goto error_param;</div><div class='add'>+			} else {</div><div class='add'>+				rxdid = ICE_RXDID_LEGACY_1;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			ena_ts = ((vf-&gt;driver_caps &amp;</div><div class='add'>+				  VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) &amp;&amp;</div><div class='add'>+				  (vf-&gt;driver_caps &amp; VIRTCHNL_VF_CAP_PTP) &amp;&amp;</div><div class='add'>+				  (qpi-&gt;rxq.flags &amp; VIRTCHNL_PTP_RX_TSTAMP));</div><div class='add'>+</div><div class='add'>+			ice_write_qrxflxp_cntxt(&amp;vsi-&gt;back-&gt;hw,</div><div class='add'>+						vsi-&gt;rxq_map[q_idx], rxdid,</div><div class='add'>+						ICE_RXDID_PRIO, ena_ts);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ice_lag_complete_vf_reset(pf-&gt;lag, act_prt);</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;lag_mutex);</div><div class='add'>+</div><div class='add'>+	/* send the response to the VF */</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,</div><div class='add'>+				     VIRTCHNL_STATUS_SUCCESS, NULL, 0);</div><div class='add'>+error_param:</div><div class='add'>+	/* disable whatever we can */</div><div class='add'>+	for (; i &gt;= 0; i--) {</div><div class='add'>+		if (ice_vsi_ctrl_one_rx_ring(vsi, false, i, true))</div><div class='add'>+			dev_err(ice_pf_to_dev(pf), "VF-%d could not disable RX queue %d\n",</div><div class='add'>+				vf-&gt;vf_id, i);</div><div class='add'>+		if (ice_vf_vsi_dis_single_txq(vf, vsi, i))</div><div class='add'>+			dev_err(ice_pf_to_dev(pf), "VF-%d could not disable TX queue %d\n",</div><div class='add'>+				vf-&gt;vf_id, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ice_lag_complete_vf_reset(pf-&gt;lag, act_prt);</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;lag_mutex);</div><div class='add'>+</div><div class='add'>+	/* send the response to the VF */</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,</div><div class='add'>+				     VIRTCHNL_STATUS_ERR_PARAM, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_request_qs_msg</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer</div><div class='add'>+ *</div><div class='add'>+ * VFs get a default number of queues but can use this message to request a</div><div class='add'>+ * different number. If the request is successful, PF will reset the VF and</div><div class='add'>+ * return 0. If unsuccessful, PF will send message informing VF of number of</div><div class='add'>+ * available queue pairs via virtchnl message response to VF.</div><div class='add'>+ */</div><div class='add'>+int ice_vc_request_qs_msg(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	struct virtchnl_vf_res_request *vfres =</div><div class='add'>+		(struct virtchnl_vf_res_request *)msg;</div><div class='add'>+	u16 req_queues = vfres-&gt;num_queue_pairs;</div><div class='add'>+	struct ice_pf *pf = vf-&gt;pf;</div><div class='add'>+	u16 max_allowed_vf_queues;</div><div class='add'>+	u16 tx_rx_queue_left;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	u16 cur_queues;</div><div class='add'>+</div><div class='add'>+	dev = ice_pf_to_dev(pf);</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cur_queues = vf-&gt;num_vf_qs;</div><div class='add'>+	tx_rx_queue_left = min_t(u16, ice_get_avail_txq_count(pf),</div><div class='add'>+				 ice_get_avail_rxq_count(pf));</div><div class='add'>+	max_allowed_vf_queues = tx_rx_queue_left + cur_queues;</div><div class='add'>+	if (!req_queues) {</div><div class='add'>+		dev_err(dev, "VF %d tried to request 0 queues. Ignoring.\n",</div><div class='add'>+			vf-&gt;vf_id);</div><div class='add'>+	} else if (req_queues &gt; ICE_MAX_RSS_QS_PER_VF) {</div><div class='add'>+		dev_err(dev, "VF %d tried to request more than %d queues.\n",</div><div class='add'>+			vf-&gt;vf_id, ICE_MAX_RSS_QS_PER_VF);</div><div class='add'>+		vfres-&gt;num_queue_pairs = ICE_MAX_RSS_QS_PER_VF;</div><div class='add'>+	} else if (req_queues &gt; cur_queues &amp;&amp;</div><div class='add'>+		   req_queues - cur_queues &gt; tx_rx_queue_left) {</div><div class='add'>+		dev_warn(dev, "VF %d requested %u more queues, but only %u left.\n",</div><div class='add'>+			 vf-&gt;vf_id, req_queues - cur_queues, tx_rx_queue_left);</div><div class='add'>+		vfres-&gt;num_queue_pairs = min_t(u16, max_allowed_vf_queues,</div><div class='add'>+					       ICE_MAX_RSS_QS_PER_VF);</div><div class='add'>+	} else {</div><div class='add'>+		/* request is successful, then reset VF */</div><div class='add'>+		vf-&gt;num_req_qs = req_queues;</div><div class='add'>+		ice_reset_vf(vf, ICE_VF_RESET_NOTIFY);</div><div class='add'>+		dev_info(dev, "VF %d granted request of %u queues.\n",</div><div class='add'>+			 vf-&gt;vf_id, req_queues);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+error_param:</div><div class='add'>+	/* send the response to the VF */</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES,</div><div class='add'>+				     v_ret, (u8 *)vfres, sizeof(*vfres));</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/virt/queues.h b/drivers/net/ethernet/intel/ice/virt/queues.h<br/>new file mode 100644<br/>index 000000000000..c4a792cecea1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/virt/queues.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/virt/queues.h</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (C) 2022, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _ICE_VIRT_QUEUES_H_</div><div class='add'>+#define _ICE_VIRT_QUEUES_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct ice_vf;</div><div class='add'>+</div><div class='add'>+u16 ice_vc_get_max_frame_size(struct ice_vf *vf);</div><div class='add'>+int ice_vc_ena_qs_msg(struct ice_vf *vf, u8 *msg);</div><div class='add'>+int ice_vc_dis_qs_msg(struct ice_vf *vf, u8 *msg);</div><div class='add'>+int ice_vc_cfg_irq_map_msg(struct ice_vf *vf, u8 *msg);</div><div class='add'>+int ice_vc_cfg_q_bw(struct ice_vf *vf, u8 *msg);</div><div class='add'>+int ice_vc_cfg_q_quanta(struct ice_vf *vf, u8 *msg);</div><div class='add'>+int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg);</div><div class='add'>+int ice_vc_request_qs_msg(struct ice_vf *vf, u8 *msg);</div><div class='add'>+</div><div class='add'>+#endif /* _ICE_VIRT_QUEUES_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/virt/rss.c b/drivers/net/ethernet/intel/ice/virt/rss.c<br/>new file mode 100644<br/>index 000000000000..085e69ec0cfc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/virt/rss.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/virt/rss.c</a></div><div class='hunk'>@@ -0,0 +1,1922 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (C) 2022, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include "rss.h"</div><div class='add'>+#include "ice_vf_lib_private.h"</div><div class='add'>+#include "ice.h"</div><div class='add'>+</div><div class='add'>+#define FIELD_SELECTOR(proto_hdr_field) \</div><div class='add'>+		BIT((proto_hdr_field) &amp; PROTO_HDR_FIELD_MASK)</div><div class='add'>+</div><div class='add'>+struct ice_vc_hdr_match_type {</div><div class='add'>+	u32 vc_hdr;	/* virtchnl headers (VIRTCHNL_PROTO_HDR_XXX) */</div><div class='add'>+	u32 ice_hdr;	/* ice headers (ICE_FLOW_SEG_HDR_XXX) */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ice_vc_hdr_match_type ice_vc_hdr_list[] = {</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_NONE,	ICE_FLOW_SEG_HDR_NONE},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_ETH,	ICE_FLOW_SEG_HDR_ETH},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_S_VLAN,	ICE_FLOW_SEG_HDR_VLAN},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_C_VLAN,	ICE_FLOW_SEG_HDR_VLAN},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4,	ICE_FLOW_SEG_HDR_IPV4 |</div><div class='add'>+					ICE_FLOW_SEG_HDR_IPV_OTHER},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6,	ICE_FLOW_SEG_HDR_IPV6 |</div><div class='add'>+					ICE_FLOW_SEG_HDR_IPV_OTHER},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_TCP,	ICE_FLOW_SEG_HDR_TCP},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_UDP,	ICE_FLOW_SEG_HDR_UDP},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_SCTP,	ICE_FLOW_SEG_HDR_SCTP},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_PPPOE,	ICE_FLOW_SEG_HDR_PPPOE},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_GTPU_IP,	ICE_FLOW_SEG_HDR_GTPU_IP},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_GTPU_EH,	ICE_FLOW_SEG_HDR_GTPU_EH},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_DWN,</div><div class='add'>+					ICE_FLOW_SEG_HDR_GTPU_DWN},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_UP,</div><div class='add'>+					ICE_FLOW_SEG_HDR_GTPU_UP},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_L2TPV3,	ICE_FLOW_SEG_HDR_L2TPV3},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_ESP,	ICE_FLOW_SEG_HDR_ESP},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_AH,		ICE_FLOW_SEG_HDR_AH},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_PFCP,	ICE_FLOW_SEG_HDR_PFCP_SESSION},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_GTPC,	ICE_FLOW_SEG_HDR_GTPC},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_L2TPV2,	ICE_FLOW_SEG_HDR_L2TPV2},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,	ICE_FLOW_SEG_HDR_IPV_FRAG},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG,	ICE_FLOW_SEG_HDR_IPV_FRAG},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_GRE,        ICE_FLOW_SEG_HDR_GRE},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ice_vc_hash_field_match_type {</div><div class='add'>+	u32 vc_hdr;		/* virtchnl headers</div><div class='add'>+				 * (VIRTCHNL_PROTO_HDR_XXX)</div><div class='add'>+				 */</div><div class='add'>+	u32 vc_hash_field;	/* virtchnl hash fields selector</div><div class='add'>+				 * FIELD_SELECTOR((VIRTCHNL_PROTO_HDR_ETH_XXX))</div><div class='add'>+				 */</div><div class='add'>+	u64 ice_hash_field;	/* ice hash fields</div><div class='add'>+				 * (BIT_ULL(ICE_FLOW_FIELD_IDX_XXX))</div><div class='add'>+				 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct</div><div class='add'>+ice_vc_hash_field_match_type ice_vc_hash_field_list[] = {</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_ETH, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ETH_SRC),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_ETH_SA)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_ETH, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ETH_DST),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_ETH_DA)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_ETH, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ETH_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ETH_DST),</div><div class='add'>+		ICE_FLOW_HASH_ETH},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_ETH,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ETH_ETHERTYPE),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_ETH_TYPE)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_S_VLAN,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_S_VLAN_ID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_S_VLAN)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_C_VLAN,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_C_VLAN_ID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_C_VLAN)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST),</div><div class='add'>+		ICE_FLOW_HASH_IPV4},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='add'>+		ICE_FLOW_HASH_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_FRAG_PKID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_ID)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		ICE_FLOW_HASH_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		ICE_FLOW_HASH_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST),</div><div class='add'>+		ICE_FLOW_HASH_IPV4},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='add'>+		ICE_FLOW_HASH_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_FRAG_PKID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_ID)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		ICE_FLOW_HASH_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		ICE_FLOW_HASH_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV4_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_SRC),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_DST),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_DST),</div><div class='add'>+		ICE_FLOW_HASH_IPV6},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='add'>+		ICE_FLOW_HASH_IPV6 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG_PKID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_ID)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_DST),</div><div class='add'>+		ICE_FLOW_HASH_IPV6_PRE64},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_SRC),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_DST),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='add'>+		ICE_FLOW_HASH_IPV6_PRE64 |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_SRC) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_IPV6,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_DST) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_TCP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_SRC_PORT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_TCP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_DST_PORT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_TCP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_SRC_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_DST_PORT),</div><div class='add'>+		ICE_FLOW_HASH_TCP_PORT},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_TCP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_TCP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_SRC_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_TCP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_DST_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_TCP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_SRC_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_DST_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_CHKSUM),</div><div class='add'>+		ICE_FLOW_HASH_TCP_PORT |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_UDP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_SRC_PORT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_UDP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_DST_PORT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_UDP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_SRC_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_DST_PORT),</div><div class='add'>+		ICE_FLOW_HASH_UDP_PORT},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_UDP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_UDP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_SRC_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_UDP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_DST_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_UDP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_SRC_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_DST_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_CHKSUM),</div><div class='add'>+		ICE_FLOW_HASH_UDP_PORT |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_SCTP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_SRC_PORT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_SCTP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_DST_PORT),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_SCTP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_SRC_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_DST_PORT),</div><div class='add'>+		ICE_FLOW_HASH_SCTP_PORT},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_SCTP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_SCTP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_SRC_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_SCTP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_DST_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_CHKSUM),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT) |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_SCTP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_SRC_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_DST_PORT) |</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_CHKSUM),</div><div class='add'>+		ICE_FLOW_HASH_SCTP_PORT |</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_CHKSUM)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_PPPOE,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_PPPOE_SESS_ID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_GTPU_IP,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_GTPU_IP_TEID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_L2TPV3,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_L2TPV3_SESS_ID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_ESP, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ESP_SPI),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_ESP_SPI)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_AH, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_AH_SPI),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_AH_SPI)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_PFCP, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_PFCP_SEID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_PFCP_SEID)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_GTPC,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_GTPC_TEID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_GTPC_TEID)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_L2TPV2,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_L2TPV2_SESS_ID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV2_SESS_ID)},</div><div class='add'>+	{VIRTCHNL_PROTO_HDR_L2TPV2,</div><div class='add'>+		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_L2TPV2_LEN_SESS_ID),</div><div class='add'>+		BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV2_LEN_SESS_ID)},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ice_vc_rss_hash_update(struct ice_hw *hw, struct ice_vsi *vsi, u8 hash_type)</div><div class='add'>+{</div><div class='add'>+	struct ice_vsi_ctx *ctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* clear previous hash_type */</div><div class='add'>+	ctx-&gt;info.q_opt_rss = vsi-&gt;info.q_opt_rss &amp;</div><div class='add'>+		~ICE_AQ_VSI_Q_OPT_RSS_HASH_M;</div><div class='add'>+	/* hash_type is passed in as ICE_AQ_VSI_Q_OPT_RSS_&lt;XOR|TPLZ|SYM_TPLZ */</div><div class='add'>+	ctx-&gt;info.q_opt_rss |= FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M,</div><div class='add'>+					  hash_type);</div><div class='add'>+</div><div class='add'>+	/* Preserve existing queueing option setting */</div><div class='add'>+	ctx-&gt;info.q_opt_tc = vsi-&gt;info.q_opt_tc;</div><div class='add'>+	ctx-&gt;info.q_opt_flags = vsi-&gt;info.q_opt_flags;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;info.valid_sections =</div><div class='add'>+			cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID);</div><div class='add'>+</div><div class='add'>+	ret = ice_update_vsi(hw, vsi-&gt;idx, ctx, NULL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ice_hw_to_dev(hw), "update VSI for RSS failed, err %d aq_err %s\n",</div><div class='add'>+			ret, libie_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='add'>+	} else {</div><div class='add'>+		vsi-&gt;info.q_opt_rss = ctx-&gt;info.q_opt_rss;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(ctx);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_validate_pattern</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @proto: virtchnl protocol headers</div><div class='add'>+ *</div><div class='add'>+ * validate the pattern is supported or not.</div><div class='add'>+ *</div><div class='add'>+ * Return: true on success, false on error.</div><div class='add'>+ */</div><div class='add'>+bool</div><div class='add'>+ice_vc_validate_pattern(struct ice_vf *vf, struct virtchnl_proto_hdrs *proto)</div><div class='add'>+{</div><div class='add'>+	bool is_ipv4 = false;</div><div class='add'>+	bool is_ipv6 = false;</div><div class='add'>+	bool is_udp = false;</div><div class='add'>+	u16 ptype = -1;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	while (i &lt; proto-&gt;count &amp;&amp;</div><div class='add'>+	       proto-&gt;proto_hdr[i].type != VIRTCHNL_PROTO_HDR_NONE) {</div><div class='add'>+		switch (proto-&gt;proto_hdr[i].type) {</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_ETH:</div><div class='add'>+			ptype = ICE_PTYPE_MAC_PAY;</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_IPV4:</div><div class='add'>+			ptype = ICE_PTYPE_IPV4_PAY;</div><div class='add'>+			is_ipv4 = true;</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_IPV6:</div><div class='add'>+			ptype = ICE_PTYPE_IPV6_PAY;</div><div class='add'>+			is_ipv6 = true;</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_UDP:</div><div class='add'>+			if (is_ipv4)</div><div class='add'>+				ptype = ICE_PTYPE_IPV4_UDP_PAY;</div><div class='add'>+			else if (is_ipv6)</div><div class='add'>+				ptype = ICE_PTYPE_IPV6_UDP_PAY;</div><div class='add'>+			is_udp = true;</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_TCP:</div><div class='add'>+			if (is_ipv4)</div><div class='add'>+				ptype = ICE_PTYPE_IPV4_TCP_PAY;</div><div class='add'>+			else if (is_ipv6)</div><div class='add'>+				ptype = ICE_PTYPE_IPV6_TCP_PAY;</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_SCTP:</div><div class='add'>+			if (is_ipv4)</div><div class='add'>+				ptype = ICE_PTYPE_IPV4_SCTP_PAY;</div><div class='add'>+			else if (is_ipv6)</div><div class='add'>+				ptype = ICE_PTYPE_IPV6_SCTP_PAY;</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_GTPU_IP:</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_GTPU_EH:</div><div class='add'>+			if (is_ipv4)</div><div class='add'>+				ptype = ICE_MAC_IPV4_GTPU;</div><div class='add'>+			else if (is_ipv6)</div><div class='add'>+				ptype = ICE_MAC_IPV6_GTPU;</div><div class='add'>+			goto out;</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_L2TPV3:</div><div class='add'>+			if (is_ipv4)</div><div class='add'>+				ptype = ICE_MAC_IPV4_L2TPV3;</div><div class='add'>+			else if (is_ipv6)</div><div class='add'>+				ptype = ICE_MAC_IPV6_L2TPV3;</div><div class='add'>+			goto out;</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_ESP:</div><div class='add'>+			if (is_ipv4)</div><div class='add'>+				ptype = is_udp ? ICE_MAC_IPV4_NAT_T_ESP :</div><div class='add'>+						ICE_MAC_IPV4_ESP;</div><div class='add'>+			else if (is_ipv6)</div><div class='add'>+				ptype = is_udp ? ICE_MAC_IPV6_NAT_T_ESP :</div><div class='add'>+						ICE_MAC_IPV6_ESP;</div><div class='add'>+			goto out;</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_AH:</div><div class='add'>+			if (is_ipv4)</div><div class='add'>+				ptype = ICE_MAC_IPV4_AH;</div><div class='add'>+			else if (is_ipv6)</div><div class='add'>+				ptype = ICE_MAC_IPV6_AH;</div><div class='add'>+			goto out;</div><div class='add'>+		case VIRTCHNL_PROTO_HDR_PFCP:</div><div class='add'>+			if (is_ipv4)</div><div class='add'>+				ptype = ICE_MAC_IPV4_PFCP_SESSION;</div><div class='add'>+			else if (is_ipv6)</div><div class='add'>+				ptype = ICE_MAC_IPV6_PFCP_SESSION;</div><div class='add'>+			goto out;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ice_hw_ptype_ena(&amp;vf-&gt;pf-&gt;hw, ptype);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_parse_rss_cfg - parses hash fields and headers from</div><div class='add'>+ * a specific virtchnl RSS cfg</div><div class='add'>+ * @hw: pointer to the hardware</div><div class='add'>+ * @rss_cfg: pointer to the virtchnl RSS cfg</div><div class='add'>+ * @hash_cfg: pointer to the HW hash configuration</div><div class='add'>+ *</div><div class='add'>+ * Return true if all the protocol header and hash fields in the RSS cfg could</div><div class='add'>+ * be parsed, else return false</div><div class='add'>+ *</div><div class='add'>+ * This function parses the virtchnl RSS cfg to be the intended</div><div class='add'>+ * hash fields and the intended header for RSS configuration</div><div class='add'>+ */</div><div class='add'>+static bool ice_vc_parse_rss_cfg(struct ice_hw *hw,</div><div class='add'>+				 struct virtchnl_rss_cfg *rss_cfg,</div><div class='add'>+				 struct ice_rss_hash_cfg *hash_cfg)</div><div class='add'>+{</div><div class='add'>+	const struct ice_vc_hash_field_match_type *hf_list;</div><div class='add'>+	const struct ice_vc_hdr_match_type *hdr_list;</div><div class='add'>+	int i, hf_list_len, hdr_list_len;</div><div class='add'>+	bool outer_ipv4 = false;</div><div class='add'>+	bool outer_ipv6 = false;</div><div class='add'>+	bool inner_hdr = false;</div><div class='add'>+	bool has_gre = false;</div><div class='add'>+</div><div class='add'>+	u32 *addl_hdrs = &amp;hash_cfg-&gt;addl_hdrs;</div><div class='add'>+	u64 *hash_flds = &amp;hash_cfg-&gt;hash_flds;</div><div class='add'>+</div><div class='add'>+	/* set outer layer RSS as default */</div><div class='add'>+	hash_cfg-&gt;hdr_type = ICE_RSS_OUTER_HEADERS;</div><div class='add'>+</div><div class='add'>+	if (rss_cfg-&gt;rss_algorithm == VIRTCHNL_RSS_ALG_TOEPLITZ_SYMMETRIC)</div><div class='add'>+		hash_cfg-&gt;symm = true;</div><div class='add'>+	else</div><div class='add'>+		hash_cfg-&gt;symm = false;</div><div class='add'>+</div><div class='add'>+	hf_list = ice_vc_hash_field_list;</div><div class='add'>+	hf_list_len = ARRAY_SIZE(ice_vc_hash_field_list);</div><div class='add'>+	hdr_list = ice_vc_hdr_list;</div><div class='add'>+	hdr_list_len = ARRAY_SIZE(ice_vc_hdr_list);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; rss_cfg-&gt;proto_hdrs.count; i++) {</div><div class='add'>+		struct virtchnl_proto_hdr *proto_hdr =</div><div class='add'>+					&amp;rss_cfg-&gt;proto_hdrs.proto_hdr[i];</div><div class='add'>+		u32 hdr_found = 0;</div><div class='add'>+		int j;</div><div class='add'>+</div><div class='add'>+		/* Find matched ice headers according to virtchnl headers.</div><div class='add'>+		 * Also figure out the outer type of GTPU headers.</div><div class='add'>+		 */</div><div class='add'>+		for (j = 0; j &lt; hdr_list_len; j++) {</div><div class='add'>+			struct ice_vc_hdr_match_type hdr_map = hdr_list[j];</div><div class='add'>+</div><div class='add'>+			if (proto_hdr-&gt;type == hdr_map.vc_hdr)</div><div class='add'>+				hdr_found = hdr_map.ice_hdr;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!hdr_found)</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		/* Find matched ice hash fields according to</div><div class='add'>+		 * virtchnl hash fields.</div><div class='add'>+		 */</div><div class='add'>+		for (j = 0; j &lt; hf_list_len; j++) {</div><div class='add'>+			struct ice_vc_hash_field_match_type hf_map = hf_list[j];</div><div class='add'>+</div><div class='add'>+			if (proto_hdr-&gt;type == hf_map.vc_hdr &amp;&amp;</div><div class='add'>+			    proto_hdr-&gt;field_selector == hf_map.vc_hash_field) {</div><div class='add'>+				*hash_flds |= hf_map.ice_hash_field;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (proto_hdr-&gt;type == VIRTCHNL_PROTO_HDR_IPV4 &amp;&amp; !inner_hdr)</div><div class='add'>+			outer_ipv4 = true;</div><div class='add'>+		else if (proto_hdr-&gt;type == VIRTCHNL_PROTO_HDR_IPV6 &amp;&amp;</div><div class='add'>+			 !inner_hdr)</div><div class='add'>+			outer_ipv6 = true;</div><div class='add'>+		/* for GRE and L2TPv2, take inner header as input set if no</div><div class='add'>+		 * any field is selected from outer headers.</div><div class='add'>+		 * for GTPU, take inner header and GTPU teid as input set.</div><div class='add'>+		 */</div><div class='add'>+		else if ((proto_hdr-&gt;type == VIRTCHNL_PROTO_HDR_GTPU_IP ||</div><div class='add'>+			  proto_hdr-&gt;type == VIRTCHNL_PROTO_HDR_GTPU_EH ||</div><div class='add'>+			  proto_hdr-&gt;type == VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_DWN ||</div><div class='add'>+			  proto_hdr-&gt;type ==</div><div class='add'>+				VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_UP) ||</div><div class='add'>+			 ((proto_hdr-&gt;type == VIRTCHNL_PROTO_HDR_L2TPV2 ||</div><div class='add'>+			   proto_hdr-&gt;type == VIRTCHNL_PROTO_HDR_GRE) &amp;&amp;</div><div class='add'>+			   *hash_flds == 0)) {</div><div class='add'>+			/* set inner_hdr flag, and clean up outer header */</div><div class='add'>+			inner_hdr = true;</div><div class='add'>+</div><div class='add'>+			/* clear outer headers */</div><div class='add'>+			*addl_hdrs = 0;</div><div class='add'>+</div><div class='add'>+			if (outer_ipv4 &amp;&amp; outer_ipv6)</div><div class='add'>+				return false;</div><div class='add'>+</div><div class='add'>+			if (outer_ipv4)</div><div class='add'>+				hash_cfg-&gt;hdr_type = ICE_RSS_INNER_HEADERS_W_OUTER_IPV4;</div><div class='add'>+			else if (outer_ipv6)</div><div class='add'>+				hash_cfg-&gt;hdr_type = ICE_RSS_INNER_HEADERS_W_OUTER_IPV6;</div><div class='add'>+			else</div><div class='add'>+				hash_cfg-&gt;hdr_type = ICE_RSS_INNER_HEADERS;</div><div class='add'>+</div><div class='add'>+			if (has_gre &amp;&amp; outer_ipv4)</div><div class='add'>+				hash_cfg-&gt;hdr_type =</div><div class='add'>+					ICE_RSS_INNER_HEADERS_W_OUTER_IPV4_GRE;</div><div class='add'>+			if (has_gre &amp;&amp; outer_ipv6)</div><div class='add'>+				hash_cfg-&gt;hdr_type =</div><div class='add'>+					ICE_RSS_INNER_HEADERS_W_OUTER_IPV6_GRE;</div><div class='add'>+</div><div class='add'>+			if (proto_hdr-&gt;type == VIRTCHNL_PROTO_HDR_GRE)</div><div class='add'>+				has_gre = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*addl_hdrs |= hdr_found;</div><div class='add'>+</div><div class='add'>+		/* refine hash hdrs and fields for IP fragment */</div><div class='add'>+		if (VIRTCHNL_TEST_PROTO_HDR_FIELD(proto_hdr,</div><div class='add'>+						  VIRTCHNL_PROTO_HDR_IPV4_FRAG_PKID) &amp;&amp;</div><div class='add'>+		    proto_hdr-&gt;type == VIRTCHNL_PROTO_HDR_IPV4_FRAG) {</div><div class='add'>+			*addl_hdrs |= ICE_FLOW_SEG_HDR_IPV_FRAG;</div><div class='add'>+			*addl_hdrs &amp;= ~(ICE_FLOW_SEG_HDR_IPV_OTHER);</div><div class='add'>+			*hash_flds |= BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_ID);</div><div class='add'>+			VIRTCHNL_DEL_PROTO_HDR_FIELD(proto_hdr,</div><div class='add'>+						     VIRTCHNL_PROTO_HDR_IPV4_FRAG_PKID);</div><div class='add'>+		}</div><div class='add'>+		if (VIRTCHNL_TEST_PROTO_HDR_FIELD(proto_hdr,</div><div class='add'>+						  VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG_PKID) &amp;&amp;</div><div class='add'>+		    proto_hdr-&gt;type == VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG) {</div><div class='add'>+			*addl_hdrs |= ICE_FLOW_SEG_HDR_IPV_FRAG;</div><div class='add'>+			*addl_hdrs &amp;= ~(ICE_FLOW_SEG_HDR_IPV_OTHER);</div><div class='add'>+			*hash_flds |= BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_ID);</div><div class='add'>+			VIRTCHNL_DEL_PROTO_HDR_FIELD(proto_hdr,</div><div class='add'>+						     VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG_PKID);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* refine gtpu header if we take outer as input set for a no inner</div><div class='add'>+	 * ip gtpu flow.</div><div class='add'>+	 */</div><div class='add'>+	if (hash_cfg-&gt;hdr_type == ICE_RSS_OUTER_HEADERS &amp;&amp;</div><div class='add'>+	    *addl_hdrs &amp; ICE_FLOW_SEG_HDR_GTPU_IP) {</div><div class='add'>+		*addl_hdrs &amp;= ~(ICE_FLOW_SEG_HDR_GTPU_IP);</div><div class='add'>+		*addl_hdrs |= ICE_FLOW_SEG_HDR_GTPU_NON_IP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* refine hash field for esp and nat-t-esp. */</div><div class='add'>+	if ((*addl_hdrs &amp; ICE_FLOW_SEG_HDR_UDP) &amp;&amp;</div><div class='add'>+	    (*addl_hdrs &amp; ICE_FLOW_SEG_HDR_ESP)) {</div><div class='add'>+		*addl_hdrs &amp;= ~(ICE_FLOW_SEG_HDR_ESP | ICE_FLOW_SEG_HDR_UDP);</div><div class='add'>+		*addl_hdrs |= ICE_FLOW_SEG_HDR_NAT_T_ESP;</div><div class='add'>+		*hash_flds &amp;= ~(BIT_ULL(ICE_FLOW_FIELD_IDX_ESP_SPI));</div><div class='add'>+		*hash_flds |= BIT_ULL(ICE_FLOW_FIELD_IDX_NAT_T_ESP_SPI);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* refine hash hdrs for L4 udp/tcp/sctp. */</div><div class='add'>+	if (*addl_hdrs &amp; (ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP |</div><div class='add'>+			  ICE_FLOW_SEG_HDR_SCTP) &amp;&amp;</div><div class='add'>+	    *addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV_OTHER)</div><div class='add'>+		*addl_hdrs &amp;= ~ICE_FLOW_SEG_HDR_IPV_OTHER;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vf_adv_rss_offload_ena - determine if capabilities support advanced</div><div class='add'>+ * RSS offloads</div><div class='add'>+ * @caps: VF driver negotiated capabilities</div><div class='add'>+ *</div><div class='add'>+ * Return true if VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF capability is set,</div><div class='add'>+ * else return false</div><div class='add'>+ */</div><div class='add'>+static bool ice_vf_adv_rss_offload_ena(u32 caps)</div><div class='add'>+{</div><div class='add'>+	return !!(caps &amp; VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_is_hash_cfg_valid - Check whether an RSS hash context is valid</div><div class='add'>+ * @cfg: RSS hash configuration to test</div><div class='add'>+ *</div><div class='add'>+ * Return: true if both @cfg-&gt;hash_flds and @cfg-&gt;addl_hdrs are non-zero; false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool ice_is_hash_cfg_valid(struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	return cfg-&gt;hash_flds &amp;&amp; cfg-&gt;addl_hdrs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_hash_cfg_reset - Reset an RSS hash context</div><div class='add'>+ * @cfg: RSS hash configuration to reset</div><div class='add'>+ *</div><div class='add'>+ * Reset fields of @cfg that store the active rule information.</div><div class='add'>+ */</div><div class='add'>+static void ice_hash_cfg_reset(struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	cfg-&gt;hash_flds = 0;</div><div class='add'>+	cfg-&gt;addl_hdrs = 0;</div><div class='add'>+	cfg-&gt;hdr_type = ICE_RSS_OUTER_HEADERS;</div><div class='add'>+	cfg-&gt;symm = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_hash_cfg_record - Record an RSS hash context</div><div class='add'>+ * @ctx: destination (global) RSS hash configuration</div><div class='add'>+ * @cfg: source RSS hash configuration to record</div><div class='add'>+ *</div><div class='add'>+ * Copy the active rule information from @cfg into @ctx.</div><div class='add'>+ */</div><div class='add'>+static void ice_hash_cfg_record(struct ice_rss_hash_cfg *ctx,</div><div class='add'>+				struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	ctx-&gt;hash_flds = cfg-&gt;hash_flds;</div><div class='add'>+	ctx-&gt;addl_hdrs = cfg-&gt;addl_hdrs;</div><div class='add'>+	ctx-&gt;hdr_type = cfg-&gt;hdr_type;</div><div class='add'>+	ctx-&gt;symm = cfg-&gt;symm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_hash_moveout - Delete an RSS configuration (keep context)</div><div class='add'>+ * @vf: VF pointer</div><div class='add'>+ * @cfg: RSS hash configuration</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success (including when already absent); -ENOENT if @cfg is</div><div class='add'>+ * invalid or VSI is missing; -EBUSY on hardware removal failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_hash_moveout(struct ice_vf *vf, struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = ice_pf_to_dev(vf-&gt;pf);</div><div class='add'>+	struct ice_vsi *vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ice_is_hash_cfg_valid(cfg) || !vsi)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	ret = ice_rem_rss_cfg(hw, vsi-&gt;idx, cfg);</div><div class='add'>+	if (ret &amp;&amp; ret != -ENOENT) {</div><div class='add'>+		dev_err(dev, "ice_rem_rss_cfg failed for VF %d, VSI %d, error:%d\n",</div><div class='add'>+			vf-&gt;vf_id, vf-&gt;lan_vsi_idx, ret);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_hash_moveback - Add an RSS hash configuration for a VF</div><div class='add'>+ * @vf: VF pointer</div><div class='add'>+ * @cfg: RSS hash configuration to apply</div><div class='add'>+ *</div><div class='add'>+ * Add @cfg to @vf if the context is valid and VSI exists; programs HW.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 on success</div><div class='add'>+ * * -ENOENT if @cfg is invalid or VSI is missing</div><div class='add'>+ * * -EBUSY if hardware programming fails</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_hash_moveback(struct ice_vf *vf, struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = ice_pf_to_dev(vf-&gt;pf);</div><div class='add'>+	struct ice_vsi *vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ice_is_hash_cfg_valid(cfg) || !vsi)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	ret = ice_add_rss_cfg(hw, vsi, cfg);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "ice_add_rss_cfg failed for VF %d, VSI %d, error:%d\n",</div><div class='add'>+			vf-&gt;vf_id, vf-&gt;lan_vsi_idx, ret);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_hash_remove - remove a RSS configuration</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @cfg: pointer to the RSS hash configuration</div><div class='add'>+ *</div><div class='add'>+ * This function will delete a RSS hash configuration and also delete the</div><div class='add'>+ * hash context which stores the rule info.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_hash_remove(struct ice_vf *vf, struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ice_hash_moveout(vf, cfg);</div><div class='add'>+	if (ret &amp;&amp; ret != -ENOENT)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ice_hash_cfg_reset(cfg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ice_gtpu_ctx_action {</div><div class='add'>+	u32 ctx_idx;</div><div class='add'>+	const u32 *remove_list;</div><div class='add'>+	int remove_count;</div><div class='add'>+	const u32 *moveout_list;</div><div class='add'>+	int moveout_count;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_add_rss_cfg_pre_gtpu - Pre-process the GTPU RSS configuration</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @ctx: pointer to the context of the GTPU hash</div><div class='add'>+ * @ctx_idx: index of the hash context</div><div class='add'>+ *</div><div class='add'>+ * Pre-processes the GTPU hash configuration before adding a new</div><div class='add'>+ * hash context. It removes or reorders existing hash configurations that may</div><div class='add'>+ * conflict with the new one. For example, if a GTPU_UP or GTPU_DWN rule is</div><div class='add'>+ * configured after a GTPU_EH rule, the GTPU_EH hash will be matched first due</div><div class='add'>+ * to TCAM write and match order (top-down). In such cases, the GTPU_EH rule</div><div class='add'>+ * must be moved after the GTPU_UP/DWN rule. Conversely, if a GTPU_EH rule is</div><div class='add'>+ * configured after a GTPU_UP/DWN rule, the UP/DWN rules should be removed to</div><div class='add'>+ * avoid conflict.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int ice_add_rss_cfg_pre_gtpu(struct ice_vf *vf,</div><div class='add'>+				    struct ice_vf_hash_gtpu_ctx *ctx,</div><div class='add'>+				    u32 ctx_idx)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	static const u32 remove_eh_ip[] = {</div><div class='add'>+		ICE_HASH_GTPU_CTX_EH_IP_UDP, ICE_HASH_GTPU_CTX_EH_IP_TCP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_UP_IP,     ICE_HASH_GTPU_CTX_UP_IP_UDP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_UP_IP_TCP, ICE_HASH_GTPU_CTX_DW_IP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_DW_IP_UDP, ICE_HASH_GTPU_CTX_DW_IP_TCP,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static const u32 remove_eh_ip_udp[] = {</div><div class='add'>+		ICE_HASH_GTPU_CTX_UP_IP_UDP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_DW_IP_UDP,</div><div class='add'>+	};</div><div class='add'>+	static const u32 moveout_eh_ip_udp[] = {</div><div class='add'>+		ICE_HASH_GTPU_CTX_UP_IP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_UP_IP_TCP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_DW_IP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_DW_IP_TCP,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static const u32 remove_eh_ip_tcp[] = {</div><div class='add'>+		ICE_HASH_GTPU_CTX_UP_IP_TCP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_DW_IP_TCP,</div><div class='add'>+	};</div><div class='add'>+	static const u32 moveout_eh_ip_tcp[] = {</div><div class='add'>+		ICE_HASH_GTPU_CTX_UP_IP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_UP_IP_UDP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_DW_IP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_DW_IP_UDP,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static const u32 remove_up_ip[] = {</div><div class='add'>+		ICE_HASH_GTPU_CTX_UP_IP_UDP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_UP_IP_TCP,</div><div class='add'>+	};</div><div class='add'>+	static const u32 moveout_up_ip[] = {</div><div class='add'>+		ICE_HASH_GTPU_CTX_EH_IP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_EH_IP_UDP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_EH_IP_TCP,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static const u32 moveout_up_ip_udp_tcp[] = {</div><div class='add'>+		ICE_HASH_GTPU_CTX_EH_IP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_EH_IP_UDP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_EH_IP_TCP,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static const u32 remove_dw_ip[] = {</div><div class='add'>+		ICE_HASH_GTPU_CTX_DW_IP_UDP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_DW_IP_TCP,</div><div class='add'>+	};</div><div class='add'>+	static const u32 moveout_dw_ip[] = {</div><div class='add'>+		ICE_HASH_GTPU_CTX_EH_IP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_EH_IP_UDP,</div><div class='add'>+		ICE_HASH_GTPU_CTX_EH_IP_TCP,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static const struct ice_gtpu_ctx_action actions[] = {</div><div class='add'>+		{ ICE_HASH_GTPU_CTX_EH_IP, remove_eh_ip,</div><div class='add'>+		  ARRAY_SIZE(remove_eh_ip), NULL, 0 },</div><div class='add'>+		{ ICE_HASH_GTPU_CTX_EH_IP_UDP, remove_eh_ip_udp,</div><div class='add'>+		  ARRAY_SIZE(remove_eh_ip_udp), moveout_eh_ip_udp,</div><div class='add'>+		  ARRAY_SIZE(moveout_eh_ip_udp) },</div><div class='add'>+		{ ICE_HASH_GTPU_CTX_EH_IP_TCP, remove_eh_ip_tcp,</div><div class='add'>+		  ARRAY_SIZE(remove_eh_ip_tcp), moveout_eh_ip_tcp,</div><div class='add'>+		  ARRAY_SIZE(moveout_eh_ip_tcp) },</div><div class='add'>+		{ ICE_HASH_GTPU_CTX_UP_IP, remove_up_ip,</div><div class='add'>+		  ARRAY_SIZE(remove_up_ip), moveout_up_ip,</div><div class='add'>+		  ARRAY_SIZE(moveout_up_ip) },</div><div class='add'>+		{ ICE_HASH_GTPU_CTX_UP_IP_UDP, NULL, 0, moveout_up_ip_udp_tcp,</div><div class='add'>+		  ARRAY_SIZE(moveout_up_ip_udp_tcp) },</div><div class='add'>+		{ ICE_HASH_GTPU_CTX_UP_IP_TCP, NULL, 0, moveout_up_ip_udp_tcp,</div><div class='add'>+		  ARRAY_SIZE(moveout_up_ip_udp_tcp) },</div><div class='add'>+		{ ICE_HASH_GTPU_CTX_DW_IP, remove_dw_ip,</div><div class='add'>+		  ARRAY_SIZE(remove_dw_ip), moveout_dw_ip,</div><div class='add'>+		  ARRAY_SIZE(moveout_dw_ip) },</div><div class='add'>+		{ ICE_HASH_GTPU_CTX_DW_IP_UDP, NULL, 0, moveout_dw_ip,</div><div class='add'>+		  ARRAY_SIZE(moveout_dw_ip) },</div><div class='add'>+		{ ICE_HASH_GTPU_CTX_DW_IP_TCP, NULL, 0, moveout_dw_ip,</div><div class='add'>+		  ARRAY_SIZE(moveout_dw_ip) },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(actions); i++) {</div><div class='add'>+		if (actions[i].ctx_idx != ctx_idx)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (actions[i].remove_list) {</div><div class='add'>+			for (int j = 0; j &lt; actions[i].remove_count; j++) {</div><div class='add'>+				u16 rm = actions[i].remove_list[j];</div><div class='add'>+</div><div class='add'>+				ret = ice_hash_remove(vf, &amp;ctx-&gt;ctx[rm]);</div><div class='add'>+				if (ret &amp;&amp; ret != -ENOENT)</div><div class='add'>+					return ret;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (actions[i].moveout_list) {</div><div class='add'>+			for (int j = 0; j &lt; actions[i].moveout_count; j++) {</div><div class='add'>+				u16 mv = actions[i].moveout_list[j];</div><div class='add'>+</div><div class='add'>+				ret = ice_hash_moveout(vf, &amp;ctx-&gt;ctx[mv]);</div><div class='add'>+				if (ret &amp;&amp; ret != -ENOENT)</div><div class='add'>+					return ret;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_add_rss_cfg_pre_ip - Pre-process IP-layer RSS configuration</div><div class='add'>+ * @vf: VF pointer</div><div class='add'>+ * @ctx: IP L4 hash context (ESP/UDP-ESP/AH/PFCP and UDP/TCP/SCTP)</div><div class='add'>+ *</div><div class='add'>+ * Remove covered/recorded IP RSS configurations prior to adding a new one.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success; negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_add_rss_cfg_pre_ip(struct ice_vf *vf, struct ice_vf_hash_ip_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; ICE_HASH_IP_CTX_MAX; i++)</div><div class='add'>+		if (ice_is_hash_cfg_valid(&amp;ctx-&gt;ctx[i])) {</div><div class='add'>+			ret = ice_hash_remove(vf, &amp;ctx-&gt;ctx[i]);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_calc_gtpu_ctx_idx - Calculate GTPU hash context index</div><div class='add'>+ * @hdrs: Bitmask of protocol headers prefixed with ICE_FLOW_SEG_HDR_*</div><div class='add'>+ *</div><div class='add'>+ * Determine the GTPU hash context index based on the combination of</div><div class='add'>+ * encapsulation headers (GTPU_EH, GTPU_UP, GTPU_DWN) and transport</div><div class='add'>+ * protocols (UDP, TCP) within IPv4 or IPv6 flows.</div><div class='add'>+ *</div><div class='add'>+ * Return: A valid context index (0-8) if the header combination is supported,</div><div class='add'>+ *         or ICE_HASH_GTPU_CTX_MAX if the combination is invalid.</div><div class='add'>+ */</div><div class='add'>+static enum ice_hash_gtpu_ctx_type ice_calc_gtpu_ctx_idx(u32 hdrs)</div><div class='add'>+{</div><div class='add'>+	u32 eh_idx, ip_idx;</div><div class='add'>+</div><div class='add'>+	if (hdrs &amp; ICE_FLOW_SEG_HDR_GTPU_EH)</div><div class='add'>+		eh_idx = 0;</div><div class='add'>+	else if (hdrs &amp; ICE_FLOW_SEG_HDR_GTPU_UP)</div><div class='add'>+		eh_idx = 1;</div><div class='add'>+	else if (hdrs &amp; ICE_FLOW_SEG_HDR_GTPU_DWN)</div><div class='add'>+		eh_idx = 2;</div><div class='add'>+	else</div><div class='add'>+		return ICE_HASH_GTPU_CTX_MAX;</div><div class='add'>+</div><div class='add'>+	ip_idx = 0;</div><div class='add'>+	if (hdrs &amp; ICE_FLOW_SEG_HDR_UDP)</div><div class='add'>+		ip_idx = 1;</div><div class='add'>+	else if (hdrs &amp; ICE_FLOW_SEG_HDR_TCP)</div><div class='add'>+		ip_idx = 2;</div><div class='add'>+</div><div class='add'>+	if (hdrs &amp; (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6))</div><div class='add'>+		return eh_idx * 3 + ip_idx;</div><div class='add'>+	else</div><div class='add'>+		return ICE_HASH_GTPU_CTX_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_map_ip_ctx_idx - map the index of the IP L4 hash context</div><div class='add'>+ * @hdrs: protocol headers prefix with ICE_FLOW_SEG_HDR_XXX.</div><div class='add'>+ *</div><div class='add'>+ * The IP L4 hash context use the index to classify for IPv4/IPv6 with</div><div class='add'>+ * ESP/UDP_ESP/AH/PFCP and non-tunnel UDP/TCP/SCTP</div><div class='add'>+ * this function map the index based on the protocol headers.</div><div class='add'>+ *</div><div class='add'>+ * Return: The mapped IP context index on success, or ICE_HASH_IP_CTX_MAX</div><div class='add'>+ *         if no matching context is found.</div><div class='add'>+ */</div><div class='add'>+static u8 ice_map_ip_ctx_idx(u32 hdrs)</div><div class='add'>+{</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	static struct {</div><div class='add'>+		u32 hdrs;</div><div class='add'>+		u8 ctx_idx;</div><div class='add'>+	} ip_ctx_idx_map[] = {</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV_OTHER |</div><div class='add'>+			ICE_FLOW_SEG_HDR_ESP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_ESP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV_OTHER |</div><div class='add'>+			ICE_FLOW_SEG_HDR_NAT_T_ESP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_UDP_ESP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV_OTHER |</div><div class='add'>+			ICE_FLOW_SEG_HDR_AH,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_AH },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV_OTHER |</div><div class='add'>+			ICE_FLOW_SEG_HDR_PFCP_SESSION,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_PFCP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN |</div><div class='add'>+			ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_UDP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_UDP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN |</div><div class='add'>+			ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_TCP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_TCP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN |</div><div class='add'>+			ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_SCTP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_SCTP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN |</div><div class='add'>+			ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV_OTHER,</div><div class='add'>+			ICE_HASH_IP_CTX_IP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_IPV_OTHER |</div><div class='add'>+			ICE_FLOW_SEG_HDR_ESP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_ESP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_IPV_OTHER |</div><div class='add'>+			ICE_FLOW_SEG_HDR_NAT_T_ESP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_UDP_ESP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_IPV_OTHER |</div><div class='add'>+			ICE_FLOW_SEG_HDR_AH,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_AH },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_IPV_OTHER |</div><div class='add'>+			ICE_FLOW_SEG_HDR_PFCP_SESSION,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_PFCP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN |</div><div class='add'>+			ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_UDP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_UDP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN |</div><div class='add'>+			ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_TCP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_TCP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN |</div><div class='add'>+			ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_SCTP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_SCTP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN |</div><div class='add'>+			ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_IPV_OTHER,</div><div class='add'>+			ICE_HASH_IP_CTX_IP },</div><div class='add'>+		/* the remaining mappings are used for default RSS */</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_UDP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_UDP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_TCP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_TCP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_SCTP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_SCTP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV_OTHER,</div><div class='add'>+			ICE_HASH_IP_CTX_IP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_UDP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_UDP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_TCP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_TCP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_SCTP,</div><div class='add'>+			ICE_HASH_IP_CTX_IP_SCTP },</div><div class='add'>+		{ ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_IPV_OTHER,</div><div class='add'>+			ICE_HASH_IP_CTX_IP },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ip_ctx_idx_map); i++) {</div><div class='add'>+		if (hdrs == ip_ctx_idx_map[i].hdrs)</div><div class='add'>+			return ip_ctx_idx_map[i].ctx_idx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ICE_HASH_IP_CTX_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_add_rss_cfg_pre - Prepare RSS configuration context for a VF</div><div class='add'>+ * @vf: pointer to the VF structure</div><div class='add'>+ * @cfg: pointer to the RSS hash configuration</div><div class='add'>+ *</div><div class='add'>+ * Prepare the RSS hash context for a given VF based on the additional</div><div class='add'>+ * protocol headers specified in @cfg. This includes pre-configuration</div><div class='add'>+ * for IP and GTPU-based flows.</div><div class='add'>+ *</div><div class='add'>+ * If the configuration matches a known IP context, the function sets up</div><div class='add'>+ * the appropriate IP hash context. If the configuration includes GTPU</div><div class='add'>+ * headers, it prepares the GTPU-specific context accordingly.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_add_rss_cfg_pre(struct ice_vf *vf, struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	u32 ice_gtpu_ctx_idx = ice_calc_gtpu_ctx_idx(cfg-&gt;addl_hdrs);</div><div class='add'>+	u8 ip_ctx_idx = ice_map_ip_ctx_idx(cfg-&gt;addl_hdrs);</div><div class='add'>+</div><div class='add'>+	if (ip_ctx_idx == ICE_HASH_IP_CTX_IP) {</div><div class='add'>+		int ret = 0;</div><div class='add'>+</div><div class='add'>+		if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV4)</div><div class='add'>+			ret = ice_add_rss_cfg_pre_ip(vf, &amp;vf-&gt;hash_ctx.v4);</div><div class='add'>+		else if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV6)</div><div class='add'>+			ret = ice_add_rss_cfg_pre_ip(vf, &amp;vf-&gt;hash_ctx.v6);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV4) {</div><div class='add'>+		return ice_add_rss_cfg_pre_gtpu(vf, &amp;vf-&gt;hash_ctx.ipv4,</div><div class='add'>+						ice_gtpu_ctx_idx);</div><div class='add'>+	} else if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV6) {</div><div class='add'>+		return ice_add_rss_cfg_pre_gtpu(vf, &amp;vf-&gt;hash_ctx.ipv6,</div><div class='add'>+						ice_gtpu_ctx_idx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_add_rss_cfg_post_gtpu - Post-process GTPU RSS configuration</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @ctx: pointer to the context of the GTPU hash</div><div class='add'>+ * @cfg: pointer to the RSS hash configuration</div><div class='add'>+ * @ctx_idx: index of the hash context</div><div class='add'>+ *</div><div class='add'>+ * Post-processes the GTPU hash configuration after a new hash</div><div class='add'>+ * context has been successfully added. It updates the context with the new</div><div class='add'>+ * configuration and restores any previously removed hash contexts that need</div><div class='add'>+ * to be re-applied. This ensures proper TCAM rule ordering and avoids</div><div class='add'>+ * conflicts between overlapping GTPU rules.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int ice_add_rss_cfg_post_gtpu(struct ice_vf *vf,</div><div class='add'>+				     struct ice_vf_hash_gtpu_ctx *ctx,</div><div class='add'>+				     struct ice_rss_hash_cfg *cfg, u32 ctx_idx)</div><div class='add'>+{</div><div class='add'>+	/* GTPU hash moveback lookup table indexed by context ID.</div><div class='add'>+	 * Each entry is a bitmap indicating which contexts need moveback</div><div class='add'>+	 * operations when the corresponding context index is processed.</div><div class='add'>+	 */</div><div class='add'>+	static const unsigned long</div><div class='add'>+		ice_gtpu_moveback_tbl[ICE_HASH_GTPU_CTX_MAX] = {</div><div class='add'>+			[ICE_HASH_GTPU_CTX_EH_IP] = 0,</div><div class='add'>+			[ICE_HASH_GTPU_CTX_EH_IP_UDP] =</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_UP_IP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_UP_IP_TCP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_DW_IP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_DW_IP_TCP),</div><div class='add'>+			[ICE_HASH_GTPU_CTX_EH_IP_TCP] =</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_UP_IP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_UP_IP_UDP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_DW_IP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_DW_IP_UDP),</div><div class='add'>+			[ICE_HASH_GTPU_CTX_UP_IP] =</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_UDP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_TCP),</div><div class='add'>+			[ICE_HASH_GTPU_CTX_UP_IP_UDP] =</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_UDP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_TCP),</div><div class='add'>+			[ICE_HASH_GTPU_CTX_UP_IP_TCP] =</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_UDP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_TCP),</div><div class='add'>+			[ICE_HASH_GTPU_CTX_DW_IP] =</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_UDP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_TCP),</div><div class='add'>+			[ICE_HASH_GTPU_CTX_DW_IP_UDP] =</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_UDP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_TCP),</div><div class='add'>+			[ICE_HASH_GTPU_CTX_DW_IP_TCP] =</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_UDP) |</div><div class='add'>+				BIT(ICE_HASH_GTPU_CTX_EH_IP_TCP),</div><div class='add'>+		};</div><div class='add'>+	unsigned long moveback_mask;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (unlikely(ctx_idx &gt;= ICE_HASH_GTPU_CTX_MAX))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;ctx[ctx_idx].addl_hdrs = cfg-&gt;addl_hdrs;</div><div class='add'>+	ctx-&gt;ctx[ctx_idx].hash_flds = cfg-&gt;hash_flds;</div><div class='add'>+	ctx-&gt;ctx[ctx_idx].hdr_type = cfg-&gt;hdr_type;</div><div class='add'>+	ctx-&gt;ctx[ctx_idx].symm = cfg-&gt;symm;</div><div class='add'>+</div><div class='add'>+	moveback_mask = ice_gtpu_moveback_tbl[ctx_idx];</div><div class='add'>+	for_each_set_bit(i, &amp;moveback_mask, ICE_HASH_GTPU_CTX_MAX) {</div><div class='add'>+		ret = ice_hash_moveback(vf, &amp;ctx-&gt;ctx[i]);</div><div class='add'>+		if (ret &amp;&amp; ret != -ENOENT)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ice_add_rss_cfg_post(struct ice_vf *vf, struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	u32 ice_gtpu_ctx_idx = ice_calc_gtpu_ctx_idx(cfg-&gt;addl_hdrs);</div><div class='add'>+	u8 ip_ctx_idx = ice_map_ip_ctx_idx(cfg-&gt;addl_hdrs);</div><div class='add'>+</div><div class='add'>+	if (ip_ctx_idx &amp;&amp; ip_ctx_idx &lt; ICE_HASH_IP_CTX_MAX) {</div><div class='add'>+		if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV4)</div><div class='add'>+			ice_hash_cfg_record(&amp;vf-&gt;hash_ctx.v4.ctx[ip_ctx_idx], cfg);</div><div class='add'>+		else if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV6)</div><div class='add'>+			ice_hash_cfg_record(&amp;vf-&gt;hash_ctx.v6.ctx[ip_ctx_idx], cfg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV4) {</div><div class='add'>+		return ice_add_rss_cfg_post_gtpu(vf, &amp;vf-&gt;hash_ctx.ipv4,</div><div class='add'>+						 cfg, ice_gtpu_ctx_idx);</div><div class='add'>+	} else if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV6) {</div><div class='add'>+		return ice_add_rss_cfg_post_gtpu(vf, &amp;vf-&gt;hash_ctx.ipv6,</div><div class='add'>+						 cfg, ice_gtpu_ctx_idx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_rem_rss_cfg_post - post-process the RSS configuration</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @cfg: pointer to the RSS hash configuration</div><div class='add'>+ *</div><div class='add'>+ * Post process the RSS hash configuration after deleting a hash</div><div class='add'>+ * config. Such as, it will reset the hash context for the GTPU hash.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+ice_rem_rss_cfg_post(struct ice_vf *vf, struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	u32 ice_gtpu_ctx_idx = ice_calc_gtpu_ctx_idx(cfg-&gt;addl_hdrs);</div><div class='add'>+	u8 ip_ctx_idx = ice_map_ip_ctx_idx(cfg-&gt;addl_hdrs);</div><div class='add'>+</div><div class='add'>+	if (ip_ctx_idx &amp;&amp; ip_ctx_idx &lt; ICE_HASH_IP_CTX_MAX) {</div><div class='add'>+		if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV4)</div><div class='add'>+			ice_hash_cfg_reset(&amp;vf-&gt;hash_ctx.v4.ctx[ip_ctx_idx]);</div><div class='add'>+		else if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV6)</div><div class='add'>+			ice_hash_cfg_reset(&amp;vf-&gt;hash_ctx.v6.ctx[ip_ctx_idx]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ice_gtpu_ctx_idx &gt;= ICE_HASH_GTPU_CTX_MAX)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV4)</div><div class='add'>+		ice_hash_cfg_reset(&amp;vf-&gt;hash_ctx.ipv4.ctx[ice_gtpu_ctx_idx]);</div><div class='add'>+	else if (cfg-&gt;addl_hdrs &amp; ICE_FLOW_SEG_HDR_IPV6)</div><div class='add'>+		ice_hash_cfg_reset(&amp;vf-&gt;hash_ctx.ipv6.ctx[ice_gtpu_ctx_idx]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_rem_rss_cfg_wrap - Wrapper for deleting an RSS configuration</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @cfg: pointer to the RSS hash configuration</div><div class='add'>+ *</div><div class='add'>+ * Wrapper function to delete a flow profile base on an RSS configuration,</div><div class='add'>+ * and also post process the hash context base on the rollback mechanism</div><div class='add'>+ * which handle some rules conflict by ice_add_rss_cfg_wrap.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success; negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_rem_rss_cfg_wrap(struct ice_vf *vf, struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = ice_pf_to_dev(vf-&gt;pf);</div><div class='add'>+	struct ice_vsi *vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ice_rem_rss_cfg(hw, vsi-&gt;idx, cfg);</div><div class='add'>+	/* We just ignore -ENOENT, because if two configurations share the same</div><div class='add'>+	 * profile remove one of them actually removes both, since the</div><div class='add'>+	 * profile is deleted.</div><div class='add'>+	 */</div><div class='add'>+	if (ret &amp;&amp; ret != -ENOENT) {</div><div class='add'>+		dev_err(dev, "ice_rem_rss_cfg failed for VF %d, VSI %d, error:%d\n",</div><div class='add'>+			vf-&gt;vf_id, vf-&gt;lan_vsi_idx, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ice_rem_rss_cfg_post(vf, cfg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_add_rss_cfg_wrap - Wrapper for adding an RSS configuration</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @cfg: pointer to the RSS hash configuration</div><div class='add'>+ *</div><div class='add'>+ * Add a flow profile based on an RSS configuration. Use a rollback</div><div class='add'>+ * mechanism to handle rule conflicts due to TCAM</div><div class='add'>+ * write sequence from top to down.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success; negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_add_rss_cfg_wrap(struct ice_vf *vf, struct ice_rss_hash_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = ice_pf_to_dev(vf-&gt;pf);</div><div class='add'>+	struct ice_vsi *vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (ice_add_rss_cfg_pre(vf, cfg))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = ice_add_rss_cfg(hw, vsi, cfg);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "ice_add_rss_cfg failed for VF %d, VSI %d, error:%d\n",</div><div class='add'>+			vf-&gt;vf_id, vf-&gt;lan_vsi_idx, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ice_add_rss_cfg_post(vf, cfg))</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_parse_raw_rss_pattern - Parse raw pattern spec and mask for RSS</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @proto: pointer to the virtchnl protocol header</div><div class='add'>+ * @raw_cfg: pointer to the RSS raw pattern configuration</div><div class='add'>+ *</div><div class='add'>+ * Parser function to get spec and mask from virtchnl message, and parse</div><div class='add'>+ * them to get the corresponding profile and offset. The profile is used</div><div class='add'>+ * to add RSS configuration.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success; negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_parse_raw_rss_pattern(struct ice_vf *vf, struct virtchnl_proto_hdrs *proto,</div><div class='add'>+			  struct ice_rss_raw_cfg *raw_cfg)</div><div class='add'>+{</div><div class='add'>+	struct ice_parser_result pkt_parsed;</div><div class='add'>+	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='add'>+	struct ice_parser_profile prof;</div><div class='add'>+	struct ice_parser *psr;</div><div class='add'>+	u8 *pkt_buf, *msk_buf;</div><div class='add'>+	u16 pkt_len;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	pkt_len = proto-&gt;raw.pkt_len;</div><div class='add'>+	if (!pkt_len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (pkt_len &gt; VIRTCHNL_MAX_SIZE_RAW_PACKET)</div><div class='add'>+		pkt_len = VIRTCHNL_MAX_SIZE_RAW_PACKET;</div><div class='add'>+</div><div class='add'>+	pkt_buf = kzalloc(pkt_len, GFP_KERNEL);</div><div class='add'>+	msk_buf = kzalloc(pkt_len, GFP_KERNEL);</div><div class='add'>+	if (!pkt_buf || !msk_buf) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto free_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(pkt_buf, proto-&gt;raw.spec, pkt_len);</div><div class='add'>+	memcpy(msk_buf, proto-&gt;raw.mask, pkt_len);</div><div class='add'>+</div><div class='add'>+	psr = ice_parser_create(hw);</div><div class='add'>+	if (IS_ERR(psr)) {</div><div class='add'>+		ret = PTR_ERR(psr);</div><div class='add'>+		goto free_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ice_parser_run(psr, pkt_buf, pkt_len, &amp;pkt_parsed);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto parser_destroy;</div><div class='add'>+</div><div class='add'>+	ret = ice_parser_profile_init(&amp;pkt_parsed, pkt_buf, msk_buf,</div><div class='add'>+				      pkt_len, ICE_BLK_RSS, &amp;prof);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto parser_destroy;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;raw_cfg-&gt;prof, &amp;prof, sizeof(prof));</div><div class='add'>+</div><div class='add'>+parser_destroy:</div><div class='add'>+	ice_parser_destroy(psr);</div><div class='add'>+free_alloc:</div><div class='add'>+	kfree(pkt_buf);</div><div class='add'>+	kfree(msk_buf);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_add_raw_rss_cfg - add RSS configuration for raw pattern</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @cfg: pointer to the RSS raw pattern configuration</div><div class='add'>+ *</div><div class='add'>+ * This function adds the RSS configuration for raw pattern.</div><div class='add'>+ * Check if current profile is matched. If not, remove the old</div><div class='add'>+ * one and add the new profile to HW directly. Update the symmetric</div><div class='add'>+ * hash configuration as well.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success; negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_add_raw_rss_cfg(struct ice_vf *vf, struct ice_rss_raw_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	struct ice_parser_profile *prof = &amp;cfg-&gt;prof;</div><div class='add'>+	struct device *dev = ice_pf_to_dev(vf-&gt;pf);</div><div class='add'>+	struct ice_rss_prof_info *rss_prof;</div><div class='add'>+	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='add'>+	int i, ptg, ret = 0;</div><div class='add'>+	u16 vsi_handle;</div><div class='add'>+	u64 id;</div><div class='add'>+</div><div class='add'>+	vsi_handle = vf-&gt;lan_vsi_idx;</div><div class='add'>+	id = find_first_bit(prof-&gt;ptypes, ICE_FLOW_PTYPE_MAX);</div><div class='add'>+</div><div class='add'>+	ptg = hw-&gt;blk[ICE_BLK_RSS].xlt1.t[id];</div><div class='add'>+	rss_prof = &amp;vf-&gt;rss_prof_info[ptg];</div><div class='add'>+</div><div class='add'>+	/* check if ptg already has a profile */</div><div class='add'>+	if (rss_prof-&gt;prof.fv_num) {</div><div class='add'>+		for (i = 0; i &lt; ICE_MAX_FV_WORDS; i++) {</div><div class='add'>+			if (rss_prof-&gt;prof.fv[i].proto_id !=</div><div class='add'>+			    prof-&gt;fv[i].proto_id ||</div><div class='add'>+			    rss_prof-&gt;prof.fv[i].offset !=</div><div class='add'>+			    prof-&gt;fv[i].offset)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* current profile is matched, check symmetric hash */</div><div class='add'>+		if (i == ICE_MAX_FV_WORDS) {</div><div class='add'>+			if (rss_prof-&gt;symm != cfg-&gt;symm)</div><div class='add'>+				goto update_symm;</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* current profile is not matched, remove it */</div><div class='add'>+		ret =</div><div class='add'>+		ice_rem_prof_id_flow(hw, ICE_BLK_RSS,</div><div class='add'>+				     ice_get_hw_vsi_num(hw, vsi_handle),</div><div class='add'>+				     id);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "remove RSS flow failed\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = ice_rem_prof(hw, ICE_BLK_RSS, id);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "remove RSS profile failed\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* add new profile */</div><div class='add'>+	ret = ice_flow_set_parser_prof(hw, vsi_handle, 0, prof, ICE_BLK_RSS);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "HW profile add failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;rss_prof-&gt;prof, prof, sizeof(struct ice_parser_profile));</div><div class='add'>+</div><div class='add'>+update_symm:</div><div class='add'>+	rss_prof-&gt;symm = cfg-&gt;symm;</div><div class='add'>+	ice_rss_update_raw_symm(hw, cfg, id);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_rem_raw_rss_cfg - remove RSS configuration for raw pattern</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @cfg: pointer to the RSS raw pattern configuration</div><div class='add'>+ *</div><div class='add'>+ * This function removes the RSS configuration for raw pattern.</div><div class='add'>+ * Check if vsi group is already removed first. If not, remove the</div><div class='add'>+ * profile.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success; negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ice_rem_raw_rss_cfg(struct ice_vf *vf, struct ice_rss_raw_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	struct ice_parser_profile *prof = &amp;cfg-&gt;prof;</div><div class='add'>+	struct device *dev = ice_pf_to_dev(vf-&gt;pf);</div><div class='add'>+	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='add'>+	int ptg, ret = 0;</div><div class='add'>+	u16 vsig, vsi;</div><div class='add'>+	u64 id;</div><div class='add'>+</div><div class='add'>+	id = find_first_bit(prof-&gt;ptypes, ICE_FLOW_PTYPE_MAX);</div><div class='add'>+</div><div class='add'>+	ptg = hw-&gt;blk[ICE_BLK_RSS].xlt1.t[id];</div><div class='add'>+</div><div class='add'>+	memset(&amp;vf-&gt;rss_prof_info[ptg], 0,</div><div class='add'>+	       sizeof(struct ice_rss_prof_info));</div><div class='add'>+</div><div class='add'>+	/* check if vsig is already removed */</div><div class='add'>+	vsi = ice_get_hw_vsi_num(hw, vf-&gt;lan_vsi_idx);</div><div class='add'>+	if (vsi &gt;= ICE_MAX_VSI) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsig = hw-&gt;blk[ICE_BLK_RSS].xlt2.vsis[vsi].vsig;</div><div class='add'>+	if (vsig) {</div><div class='add'>+		ret = ice_rem_prof_id_flow(hw, ICE_BLK_RSS, vsi, id);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = ice_rem_prof(hw, ICE_BLK_RSS, id);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	dev_err(dev, "HW profile remove failed\n");</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_handle_rss_cfg</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the message buffer</div><div class='add'>+ * @add: add a RSS config if true, otherwise delete a RSS config</div><div class='add'>+ *</div><div class='add'>+ * This function adds/deletes a RSS config</div><div class='add'>+ */</div><div class='add'>+int ice_vc_handle_rss_cfg(struct ice_vf *vf, u8 *msg, bool add)</div><div class='add'>+{</div><div class='add'>+	u32 v_opcode = add ? VIRTCHNL_OP_ADD_RSS_CFG : VIRTCHNL_OP_DEL_RSS_CFG;</div><div class='add'>+	struct virtchnl_rss_cfg *rss_cfg = (struct virtchnl_rss_cfg *)msg;</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	struct device *dev = ice_pf_to_dev(vf-&gt;pf);</div><div class='add'>+	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	u8 hash_type;</div><div class='add'>+	bool symm;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_FLAG_RSS_ENA, vf-&gt;pf-&gt;flags)) {</div><div class='add'>+		dev_dbg(dev, "VF %d attempting to configure RSS, but RSS is not supported by the PF\n",</div><div class='add'>+			vf-&gt;vf_id);</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_NOT_SUPPORTED;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ice_vf_adv_rss_offload_ena(vf-&gt;driver_caps)) {</div><div class='add'>+		dev_dbg(dev, "VF %d attempting to configure RSS, but Advanced RSS offload is not supported\n",</div><div class='add'>+			vf-&gt;vf_id);</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rss_cfg-&gt;proto_hdrs.count &gt; VIRTCHNL_MAX_NUM_PROTO_HDRS ||</div><div class='add'>+	    rss_cfg-&gt;rss_algorithm &lt; VIRTCHNL_RSS_ALG_TOEPLITZ_ASYMMETRIC ||</div><div class='add'>+	    rss_cfg-&gt;rss_algorithm &gt; VIRTCHNL_RSS_ALG_XOR_SYMMETRIC) {</div><div class='add'>+		dev_dbg(dev, "VF %d attempting to configure RSS, but RSS configuration is not valid\n",</div><div class='add'>+			vf-&gt;vf_id);</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rss_cfg-&gt;rss_algorithm == VIRTCHNL_RSS_ALG_R_ASYMMETRIC) {</div><div class='add'>+		hash_type = add ? ICE_AQ_VSI_Q_OPT_RSS_HASH_XOR :</div><div class='add'>+				  ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;</div><div class='add'>+</div><div class='add'>+		ret = ice_vc_rss_hash_update(hw, vsi, hash_type);</div><div class='add'>+		if (ret)</div><div class='add'>+			v_ret = ice_err_to_virt_err(ret);</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hash_type = add ? ICE_AQ_VSI_Q_OPT_RSS_HASH_SYM_TPLZ :</div><div class='add'>+			  ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;</div><div class='add'>+	ret = ice_vc_rss_hash_update(hw, vsi, hash_type);</div><div class='add'>+	if (ret) {</div><div class='add'>+		v_ret = ice_err_to_virt_err(ret);</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	symm = rss_cfg-&gt;rss_algorithm == VIRTCHNL_RSS_ALG_TOEPLITZ_SYMMETRIC;</div><div class='add'>+	/* Configure RSS hash for raw pattern */</div><div class='add'>+	if (rss_cfg-&gt;proto_hdrs.tunnel_level == 0 &amp;&amp;</div><div class='add'>+	    rss_cfg-&gt;proto_hdrs.count == 0) {</div><div class='add'>+		struct ice_rss_raw_cfg raw_cfg;</div><div class='add'>+</div><div class='add'>+		if (ice_parse_raw_rss_pattern(vf, &amp;rss_cfg-&gt;proto_hdrs,</div><div class='add'>+					      &amp;raw_cfg)) {</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (add) {</div><div class='add'>+			raw_cfg.symm = symm;</div><div class='add'>+			if (ice_add_raw_rss_cfg(vf, &amp;raw_cfg))</div><div class='add'>+				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		} else {</div><div class='add'>+			if (ice_rem_raw_rss_cfg(vf, &amp;raw_cfg))</div><div class='add'>+				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		struct ice_rss_hash_cfg cfg;</div><div class='add'>+</div><div class='add'>+		/* Only check for none raw pattern case */</div><div class='add'>+		if (!ice_vc_validate_pattern(vf, &amp;rss_cfg-&gt;proto_hdrs)) {</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+		cfg.addl_hdrs = ICE_FLOW_SEG_HDR_NONE;</div><div class='add'>+		cfg.hash_flds = ICE_HASH_INVALID;</div><div class='add'>+		cfg.hdr_type = ICE_RSS_ANY_HEADERS;</div><div class='add'>+</div><div class='add'>+		if (!ice_vc_parse_rss_cfg(hw, rss_cfg, &amp;cfg)) {</div><div class='add'>+			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+			goto error_param;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (add) {</div><div class='add'>+			cfg.symm = symm;</div><div class='add'>+			if (ice_add_rss_cfg_wrap(vf, &amp;cfg))</div><div class='add'>+				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		} else {</div><div class='add'>+			if (ice_rem_rss_cfg_wrap(vf, &amp;cfg))</div><div class='add'>+				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+error_param:</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, v_opcode, v_ret, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_config_rss_key</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer</div><div class='add'>+ *</div><div class='add'>+ * Configure the VF's RSS key</div><div class='add'>+ */</div><div class='add'>+int ice_vc_config_rss_key(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	struct virtchnl_rss_key *vrk =</div><div class='add'>+		(struct virtchnl_rss_key *)msg;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ice_vc_isvalid_vsi_id(vf, vrk-&gt;vsi_id)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vrk-&gt;key_len != ICE_VSIQF_HKEY_ARRAY_SIZE) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_FLAG_RSS_ENA, vf-&gt;pf-&gt;flags)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ice_set_rss_key(vsi, vrk-&gt;key))</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR;</div><div class='add'>+error_param:</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY, v_ret,</div><div class='add'>+				     NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_config_rss_lut</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer</div><div class='add'>+ *</div><div class='add'>+ * Configure the VF's RSS LUT</div><div class='add'>+ */</div><div class='add'>+int ice_vc_config_rss_lut(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl_rss_lut *vrl = (struct virtchnl_rss_lut *)msg;</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ice_vc_isvalid_vsi_id(vf, vrl-&gt;vsi_id)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vrl-&gt;lut_entries != ICE_LUT_VSI_SIZE) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_FLAG_RSS_ENA, vf-&gt;pf-&gt;flags)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ice_set_rss_lut(vsi, vrl-&gt;lut, ICE_LUT_VSI_SIZE))</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR;</div><div class='add'>+error_param:</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT, v_ret,</div><div class='add'>+				     NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_config_rss_hfunc</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer</div><div class='add'>+ *</div><div class='add'>+ * Configure the VF's RSS Hash function</div><div class='add'>+ */</div><div class='add'>+int ice_vc_config_rss_hfunc(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl_rss_hfunc *vrh = (struct virtchnl_rss_hfunc *)msg;</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	u8 hfunc = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ice_vc_isvalid_vsi_id(vf, vrh-&gt;vsi_id)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_FLAG_RSS_ENA, vf-&gt;pf-&gt;flags)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto error_param;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vrh-&gt;rss_algorithm == VIRTCHNL_RSS_ALG_TOEPLITZ_SYMMETRIC)</div><div class='add'>+		hfunc = ICE_AQ_VSI_Q_OPT_RSS_HASH_SYM_TPLZ;</div><div class='add'>+</div><div class='add'>+	if (ice_set_rss_hfunc(vsi, hfunc))</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR;</div><div class='add'>+error_param:</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_HFUNC, v_ret,</div><div class='add'>+				     NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_get_rss_hashcfg - return the RSS Hash configuration</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ */</div><div class='add'>+int ice_vc_get_rss_hashcfg(struct ice_vf *vf)</div><div class='add'>+{</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	struct virtchnl_rss_hashcfg *vrh = NULL;</div><div class='add'>+	int len = 0, ret;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_FLAG_RSS_ENA, vf-&gt;pf-&gt;flags)) {</div><div class='add'>+		dev_err(ice_pf_to_dev(vf-&gt;pf), "RSS not supported by PF\n");</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len = sizeof(struct virtchnl_rss_hashcfg);</div><div class='add'>+	vrh = kzalloc(len, GFP_KERNEL);</div><div class='add'>+	if (!vrh) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_NO_MEMORY;</div><div class='add'>+		len = 0;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vrh-&gt;hashcfg = ICE_DEFAULT_RSS_HASHCFG;</div><div class='add'>+err:</div><div class='add'>+	/* send the response back to the VF */</div><div class='add'>+	ret = ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HASHCFG_CAPS, v_ret,</div><div class='add'>+				    (u8 *)vrh, len);</div><div class='add'>+	kfree(vrh);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_set_rss_hashcfg - set RSS Hash configuration bits for the VF</div><div class='add'>+ * @vf: pointer to the VF info</div><div class='add'>+ * @msg: pointer to the msg buffer</div><div class='add'>+ */</div><div class='add'>+int ice_vc_set_rss_hashcfg(struct ice_vf *vf, u8 *msg)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl_rss_hashcfg *vrh = (struct virtchnl_rss_hashcfg *)msg;</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+	struct ice_pf *pf = vf-&gt;pf;</div><div class='add'>+	struct ice_vsi *vsi;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	dev = ice_pf_to_dev(pf);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_FLAG_RSS_ENA, pf-&gt;flags)) {</div><div class='add'>+		dev_err(dev, "RSS not supported by PF\n");</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsi = ice_get_vf_vsi(vf);</div><div class='add'>+	if (!vsi) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* clear all previously programmed RSS configuration to allow VF drivers</div><div class='add'>+	 * the ability to customize the RSS configuration and/or completely</div><div class='add'>+	 * disable RSS</div><div class='add'>+	 */</div><div class='add'>+	status = ice_rem_vsi_rss_cfg(&amp;pf-&gt;hw, vsi-&gt;idx);</div><div class='add'>+	if (status &amp;&amp; !vrh-&gt;hashcfg) {</div><div class='add'>+		/* only report failure to clear the current RSS configuration if</div><div class='add'>+		 * that was clearly the VF's intention (i.e. vrh-&gt;hashcfg = 0)</div><div class='add'>+		 */</div><div class='add'>+		v_ret = ice_err_to_virt_err(status);</div><div class='add'>+		goto err;</div><div class='add'>+	} else if (status) {</div><div class='add'>+		/* allow the VF to update the RSS configuration even on failure</div><div class='add'>+		 * to clear the current RSS confguration in an attempt to keep</div><div class='add'>+		 * RSS in a working state</div><div class='add'>+		 */</div><div class='add'>+		dev_warn(dev, "Failed to clear the RSS configuration for VF %u\n",</div><div class='add'>+			 vf-&gt;vf_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vrh-&gt;hashcfg) {</div><div class='add'>+		status = ice_add_avf_rss_cfg(&amp;pf-&gt;hw, vsi, vrh-&gt;hashcfg);</div><div class='add'>+		v_ret = ice_err_to_virt_err(status);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* save the requested VF configuration */</div><div class='add'>+	if (!v_ret)</div><div class='add'>+		vf-&gt;rss_hashcfg = vrh-&gt;hashcfg;</div><div class='add'>+</div><div class='add'>+	/* send the response to the VF */</div><div class='add'>+err:</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_SET_RSS_HASHCFG, v_ret,</div><div class='add'>+				     NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/virt/rss.h b/drivers/net/ethernet/intel/ice/virt/rss.h<br/>new file mode 100644<br/>index 000000000000..784d4c43ce8b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/virt/rss.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/virt/rss.h</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (C) 2022, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _ICE_VIRT_RSS_H_</div><div class='add'>+#define _ICE_VIRT_RSS_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct ice_vf;</div><div class='add'>+</div><div class='add'>+int ice_vc_handle_rss_cfg(struct ice_vf *vf, u8 *msg, bool add);</div><div class='add'>+int ice_vc_config_rss_key(struct ice_vf *vf, u8 *msg);</div><div class='add'>+int ice_vc_config_rss_lut(struct ice_vf *vf, u8 *msg);</div><div class='add'>+int ice_vc_config_rss_hfunc(struct ice_vf *vf, u8 *msg);</div><div class='add'>+int ice_vc_get_rss_hashcfg(struct ice_vf *vf);</div><div class='add'>+int ice_vc_set_rss_hashcfg(struct ice_vf *vf, u8 *msg);</div><div class='add'>+</div><div class='add'>+#endif /* _ICE_VIRT_RSS_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl.c b/drivers/net/ethernet/intel/ice/virt/virtchnl.c<br/>index aa2080747714..f3f921134379 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_virtchnl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_virtchnl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/virt/virtchnl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/virt/virtchnl.c</a></div><div class='hunk'>@@ -1,170 +1,20 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* Copyright (C) 2022, Intel Corporation. */</div><div class='ctx'> </div><div class='del'>-#include "ice_virtchnl.h"</div><div class='add'>+#include "virtchnl.h"</div><div class='add'>+#include "queues.h"</div><div class='add'>+#include "rss.h"</div><div class='ctx'> #include "ice_vf_lib_private.h"</div><div class='ctx'> #include "ice.h"</div><div class='ctx'> #include "ice_base.h"</div><div class='ctx'> #include "ice_lib.h"</div><div class='ctx'> #include "ice_fltr.h"</div><div class='del'>-#include "ice_virtchnl_allowlist.h"</div><div class='add'>+#include "allowlist.h"</div><div class='ctx'> #include "ice_vf_vsi_vlan_ops.h"</div><div class='ctx'> #include "ice_vlan.h"</div><div class='ctx'> #include "ice_flex_pipe.h"</div><div class='ctx'> #include "ice_dcb_lib.h"</div><div class='ctx'> </div><div class='del'>-#define FIELD_SELECTOR(proto_hdr_field) \</div><div class='del'>-		BIT((proto_hdr_field) &amp; PROTO_HDR_FIELD_MASK)</div><div class='del'>-</div><div class='del'>-struct ice_vc_hdr_match_type {</div><div class='del'>-	u32 vc_hdr;	/* virtchnl headers (VIRTCHNL_PROTO_HDR_XXX) */</div><div class='del'>-	u32 ice_hdr;	/* ice headers (ICE_FLOW_SEG_HDR_XXX) */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct ice_vc_hdr_match_type ice_vc_hdr_list[] = {</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_NONE,	ICE_FLOW_SEG_HDR_NONE},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_ETH,	ICE_FLOW_SEG_HDR_ETH},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_S_VLAN,	ICE_FLOW_SEG_HDR_VLAN},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_C_VLAN,	ICE_FLOW_SEG_HDR_VLAN},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV4,	ICE_FLOW_SEG_HDR_IPV4 |</div><div class='del'>-					ICE_FLOW_SEG_HDR_IPV_OTHER},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV6,	ICE_FLOW_SEG_HDR_IPV6 |</div><div class='del'>-					ICE_FLOW_SEG_HDR_IPV_OTHER},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_TCP,	ICE_FLOW_SEG_HDR_TCP},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_UDP,	ICE_FLOW_SEG_HDR_UDP},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_SCTP,	ICE_FLOW_SEG_HDR_SCTP},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_PPPOE,	ICE_FLOW_SEG_HDR_PPPOE},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_GTPU_IP,	ICE_FLOW_SEG_HDR_GTPU_IP},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_GTPU_EH,	ICE_FLOW_SEG_HDR_GTPU_EH},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_DWN,</div><div class='del'>-					ICE_FLOW_SEG_HDR_GTPU_DWN},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_GTPU_EH_PDU_UP,</div><div class='del'>-					ICE_FLOW_SEG_HDR_GTPU_UP},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_L2TPV3,	ICE_FLOW_SEG_HDR_L2TPV3},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_ESP,	ICE_FLOW_SEG_HDR_ESP},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_AH,		ICE_FLOW_SEG_HDR_AH},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_PFCP,	ICE_FLOW_SEG_HDR_PFCP_SESSION},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ice_vc_hash_field_match_type {</div><div class='del'>-	u32 vc_hdr;		/* virtchnl headers</div><div class='del'>-				 * (VIRTCHNL_PROTO_HDR_XXX)</div><div class='del'>-				 */</div><div class='del'>-	u32 vc_hash_field;	/* virtchnl hash fields selector</div><div class='del'>-				 * FIELD_SELECTOR((VIRTCHNL_PROTO_HDR_ETH_XXX))</div><div class='del'>-				 */</div><div class='del'>-	u64 ice_hash_field;	/* ice hash fields</div><div class='del'>-				 * (BIT_ULL(ICE_FLOW_FIELD_IDX_XXX))</div><div class='del'>-				 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct</div><div class='del'>-ice_vc_hash_field_match_type ice_vc_hash_field_list[] = {</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_ETH, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ETH_SRC),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_ETH_SA)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_ETH, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ETH_DST),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_ETH_DA)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_ETH, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ETH_SRC) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ETH_DST),</div><div class='del'>-		ICE_FLOW_HASH_ETH},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_ETH,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ETH_ETHERTYPE),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_ETH_TYPE)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_S_VLAN,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_S_VLAN_ID),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_S_VLAN)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_C_VLAN,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_C_VLAN_ID),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_C_VLAN)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST),</div><div class='del'>-		ICE_FLOW_HASH_IPV4},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_SA) |</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_DA) |</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_SRC) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_DST) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='del'>-		ICE_FLOW_HASH_IPV4 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV4, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV4_PROT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_SRC),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_DST),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_SRC) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_DST),</div><div class='del'>-		ICE_FLOW_HASH_IPV6},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_SRC) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) |</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_DST) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA) |</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_SRC) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_DST) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='del'>-		ICE_FLOW_HASH_IPV6 | BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_IPV6, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_IPV6_PROT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_TCP,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_SRC_PORT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_TCP,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_DST_PORT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_TCP,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_SRC_PORT) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_TCP_DST_PORT),</div><div class='del'>-		ICE_FLOW_HASH_TCP_PORT},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_UDP,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_SRC_PORT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_SRC_PORT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_UDP,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_DST_PORT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_UDP_DST_PORT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_UDP,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_SRC_PORT) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_UDP_DST_PORT),</div><div class='del'>-		ICE_FLOW_HASH_UDP_PORT},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_SCTP,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_SRC_PORT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_SCTP,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_DST_PORT),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_SCTP_DST_PORT)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_SCTP,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_SRC_PORT) |</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_SCTP_DST_PORT),</div><div class='del'>-		ICE_FLOW_HASH_SCTP_PORT},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_PPPOE,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_PPPOE_SESS_ID),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_GTPU_IP,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_GTPU_IP_TEID),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_IP_TEID)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_L2TPV3,</div><div class='del'>-		FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_L2TPV3_SESS_ID),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV3_SESS_ID)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_ESP, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_ESP_SPI),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_ESP_SPI)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_AH, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_AH_SPI),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_AH_SPI)},</div><div class='del'>-	{VIRTCHNL_PROTO_HDR_PFCP, FIELD_SELECTOR(VIRTCHNL_PROTO_HDR_PFCP_SEID),</div><div class='del'>-		BIT_ULL(ICE_FLOW_FIELD_IDX_PFCP_SEID)},</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * ice_vc_vf_broadcast - Broadcast a message to all VFs on PF</div><div class='ctx'>  * @pf: pointer to the PF structure</div><div class='hunk'>@@ -304,10 +154,10 @@ ice_vc_send_msg_to_vf(struct ice_vf *vf, u32 v_opcode,</div><div class='ctx'> </div><div class='ctx'> 	aq_ret = ice_aq_send_msg_to_vf(&amp;pf-&gt;hw, vf-&gt;vf_id, v_opcode, v_retval,</div><div class='ctx'> 				       msg, msglen, NULL);</div><div class='del'>-	if (aq_ret &amp;&amp; pf-&gt;hw.mailboxq.sq_last_status != ICE_AQ_RC_ENOSYS) {</div><div class='add'>+	if (aq_ret &amp;&amp; pf-&gt;hw.mailboxq.sq_last_status != LIBIE_AQ_RC_ENOSYS) {</div><div class='ctx'> 		dev_info(dev, "Unable to send the message to VF %d ret %d aq_err %s\n",</div><div class='ctx'> 			 vf-&gt;vf_id, aq_ret,</div><div class='del'>-			 ice_aq_str(pf-&gt;hw.mailboxq.sq_last_status));</div><div class='add'>+			 libie_aq_str(pf-&gt;hw.mailboxq.sq_last_status));</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -338,28 +188,6 @@ static int ice_vc_get_ver_msg(struct ice_vf *vf, u8 *msg)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_vc_get_max_frame_size - get max frame size allowed for VF</div><div class='del'>- * @vf: VF used to determine max frame size</div><div class='del'>- *</div><div class='del'>- * Max frame size is determined based on the current port's max frame size and</div><div class='del'>- * whether a port VLAN is configured on this VF. The VF is not aware whether</div><div class='del'>- * it's in a port VLAN so the PF needs to account for this in max frame size</div><div class='del'>- * checks and sending the max frame size to the VF.</div><div class='del'>- */</div><div class='del'>-static u16 ice_vc_get_max_frame_size(struct ice_vf *vf)</div><div class='del'>-{</div><div class='del'>-	struct ice_port_info *pi = ice_vf_get_port_info(vf);</div><div class='del'>-	u16 max_frame_size;</div><div class='del'>-</div><div class='del'>-	max_frame_size = pi-&gt;phy.link_info.max_frame_size;</div><div class='del'>-</div><div class='del'>-	if (ice_vf_is_port_vlan_ena(vf))</div><div class='del'>-		max_frame_size -= VLAN_HLEN;</div><div class='del'>-</div><div class='del'>-	return max_frame_size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_vc_get_vlan_caps</div><div class='ctx'>  * @hw: pointer to the hw</div><div class='ctx'>  * @vf: pointer to the VF info</div><div class='hunk'>@@ -498,6 +326,9 @@ static int ice_vc_get_vf_res_msg(struct ice_vf *vf, u8 *msg)</div><div class='ctx'> 	if (vf-&gt;driver_caps &amp; VIRTCHNL_VF_OFFLOAD_QOS)</div><div class='ctx'> 		vfres-&gt;vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_QOS;</div><div class='ctx'> </div><div class='add'>+	if (vf-&gt;driver_caps &amp; VIRTCHNL_VF_CAP_PTP)</div><div class='add'>+		vfres-&gt;vf_cap_flags |= VIRTCHNL_VF_CAP_PTP;</div><div class='add'>+</div><div class='ctx'> 	vfres-&gt;num_vsis = 1;</div><div class='ctx'> 	/* Tx and Rx queue are equal for VF */</div><div class='ctx'> 	vfres-&gt;num_queue_pairs = vsi-&gt;num_txq;</div><div class='hunk'>@@ -556,488 +387,6 @@ bool ice_vc_isvalid_vsi_id(struct ice_vf *vf, u16 vsi_id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_vc_isvalid_q_id</div><div class='del'>- * @vsi: VSI to check queue ID against</div><div class='del'>- * @qid: VSI relative queue ID</div><div class='del'>- *</div><div class='del'>- * check for the valid queue ID</div><div class='del'>- */</div><div class='del'>-static bool ice_vc_isvalid_q_id(struct ice_vsi *vsi, u8 qid)</div><div class='del'>-{</div><div class='del'>-	/* allocated Tx and Rx queues should be always equal for VF VSI */</div><div class='del'>-	return qid &lt; vsi-&gt;alloc_txq;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_isvalid_ring_len</div><div class='del'>- * @ring_len: length of ring</div><div class='del'>- *</div><div class='del'>- * check for the valid ring count, should be multiple of ICE_REQ_DESC_MULTIPLE</div><div class='del'>- * or zero</div><div class='del'>- */</div><div class='del'>-static bool ice_vc_isvalid_ring_len(u16 ring_len)</div><div class='del'>-{</div><div class='del'>-	return ring_len == 0 ||</div><div class='del'>-	       (ring_len &gt;= ICE_MIN_NUM_DESC &amp;&amp;</div><div class='del'>-		ring_len &lt;= ICE_MAX_NUM_DESC &amp;&amp;</div><div class='del'>-		!(ring_len % ICE_REQ_DESC_MULTIPLE));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_validate_pattern</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @proto: virtchnl protocol headers</div><div class='del'>- *</div><div class='del'>- * validate the pattern is supported or not.</div><div class='del'>- *</div><div class='del'>- * Return: true on success, false on error.</div><div class='del'>- */</div><div class='del'>-bool</div><div class='del'>-ice_vc_validate_pattern(struct ice_vf *vf, struct virtchnl_proto_hdrs *proto)</div><div class='del'>-{</div><div class='del'>-	bool is_ipv4 = false;</div><div class='del'>-	bool is_ipv6 = false;</div><div class='del'>-	bool is_udp = false;</div><div class='del'>-	u16 ptype = -1;</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	while (i &lt; proto-&gt;count &amp;&amp;</div><div class='del'>-	       proto-&gt;proto_hdr[i].type != VIRTCHNL_PROTO_HDR_NONE) {</div><div class='del'>-		switch (proto-&gt;proto_hdr[i].type) {</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_ETH:</div><div class='del'>-			ptype = ICE_PTYPE_MAC_PAY;</div><div class='del'>-			break;</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_IPV4:</div><div class='del'>-			ptype = ICE_PTYPE_IPV4_PAY;</div><div class='del'>-			is_ipv4 = true;</div><div class='del'>-			break;</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_IPV6:</div><div class='del'>-			ptype = ICE_PTYPE_IPV6_PAY;</div><div class='del'>-			is_ipv6 = true;</div><div class='del'>-			break;</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_UDP:</div><div class='del'>-			if (is_ipv4)</div><div class='del'>-				ptype = ICE_PTYPE_IPV4_UDP_PAY;</div><div class='del'>-			else if (is_ipv6)</div><div class='del'>-				ptype = ICE_PTYPE_IPV6_UDP_PAY;</div><div class='del'>-			is_udp = true;</div><div class='del'>-			break;</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_TCP:</div><div class='del'>-			if (is_ipv4)</div><div class='del'>-				ptype = ICE_PTYPE_IPV4_TCP_PAY;</div><div class='del'>-			else if (is_ipv6)</div><div class='del'>-				ptype = ICE_PTYPE_IPV6_TCP_PAY;</div><div class='del'>-			break;</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_SCTP:</div><div class='del'>-			if (is_ipv4)</div><div class='del'>-				ptype = ICE_PTYPE_IPV4_SCTP_PAY;</div><div class='del'>-			else if (is_ipv6)</div><div class='del'>-				ptype = ICE_PTYPE_IPV6_SCTP_PAY;</div><div class='del'>-			break;</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_GTPU_IP:</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_GTPU_EH:</div><div class='del'>-			if (is_ipv4)</div><div class='del'>-				ptype = ICE_MAC_IPV4_GTPU;</div><div class='del'>-			else if (is_ipv6)</div><div class='del'>-				ptype = ICE_MAC_IPV6_GTPU;</div><div class='del'>-			goto out;</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_L2TPV3:</div><div class='del'>-			if (is_ipv4)</div><div class='del'>-				ptype = ICE_MAC_IPV4_L2TPV3;</div><div class='del'>-			else if (is_ipv6)</div><div class='del'>-				ptype = ICE_MAC_IPV6_L2TPV3;</div><div class='del'>-			goto out;</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_ESP:</div><div class='del'>-			if (is_ipv4)</div><div class='del'>-				ptype = is_udp ? ICE_MAC_IPV4_NAT_T_ESP :</div><div class='del'>-						ICE_MAC_IPV4_ESP;</div><div class='del'>-			else if (is_ipv6)</div><div class='del'>-				ptype = is_udp ? ICE_MAC_IPV6_NAT_T_ESP :</div><div class='del'>-						ICE_MAC_IPV6_ESP;</div><div class='del'>-			goto out;</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_AH:</div><div class='del'>-			if (is_ipv4)</div><div class='del'>-				ptype = ICE_MAC_IPV4_AH;</div><div class='del'>-			else if (is_ipv6)</div><div class='del'>-				ptype = ICE_MAC_IPV6_AH;</div><div class='del'>-			goto out;</div><div class='del'>-		case VIRTCHNL_PROTO_HDR_PFCP:</div><div class='del'>-			if (is_ipv4)</div><div class='del'>-				ptype = ICE_MAC_IPV4_PFCP_SESSION;</div><div class='del'>-			else if (is_ipv6)</div><div class='del'>-				ptype = ICE_MAC_IPV6_PFCP_SESSION;</div><div class='del'>-			goto out;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		i++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	return ice_hw_ptype_ena(&amp;vf-&gt;pf-&gt;hw, ptype);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_parse_rss_cfg - parses hash fields and headers from</div><div class='del'>- * a specific virtchnl RSS cfg</div><div class='del'>- * @hw: pointer to the hardware</div><div class='del'>- * @rss_cfg: pointer to the virtchnl RSS cfg</div><div class='del'>- * @hash_cfg: pointer to the HW hash configuration</div><div class='del'>- *</div><div class='del'>- * Return true if all the protocol header and hash fields in the RSS cfg could</div><div class='del'>- * be parsed, else return false</div><div class='del'>- *</div><div class='del'>- * This function parses the virtchnl RSS cfg to be the intended</div><div class='del'>- * hash fields and the intended header for RSS configuration</div><div class='del'>- */</div><div class='del'>-static bool ice_vc_parse_rss_cfg(struct ice_hw *hw,</div><div class='del'>-				 struct virtchnl_rss_cfg *rss_cfg,</div><div class='del'>-				 struct ice_rss_hash_cfg *hash_cfg)</div><div class='del'>-{</div><div class='del'>-	const struct ice_vc_hash_field_match_type *hf_list;</div><div class='del'>-	const struct ice_vc_hdr_match_type *hdr_list;</div><div class='del'>-	int i, hf_list_len, hdr_list_len;</div><div class='del'>-	u32 *addl_hdrs = &amp;hash_cfg-&gt;addl_hdrs;</div><div class='del'>-	u64 *hash_flds = &amp;hash_cfg-&gt;hash_flds;</div><div class='del'>-</div><div class='del'>-	/* set outer layer RSS as default */</div><div class='del'>-	hash_cfg-&gt;hdr_type = ICE_RSS_OUTER_HEADERS;</div><div class='del'>-</div><div class='del'>-	if (rss_cfg-&gt;rss_algorithm == VIRTCHNL_RSS_ALG_TOEPLITZ_SYMMETRIC)</div><div class='del'>-		hash_cfg-&gt;symm = true;</div><div class='del'>-	else</div><div class='del'>-		hash_cfg-&gt;symm = false;</div><div class='del'>-</div><div class='del'>-	hf_list = ice_vc_hash_field_list;</div><div class='del'>-	hf_list_len = ARRAY_SIZE(ice_vc_hash_field_list);</div><div class='del'>-	hdr_list = ice_vc_hdr_list;</div><div class='del'>-	hdr_list_len = ARRAY_SIZE(ice_vc_hdr_list);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; rss_cfg-&gt;proto_hdrs.count; i++) {</div><div class='del'>-		struct virtchnl_proto_hdr *proto_hdr =</div><div class='del'>-					&amp;rss_cfg-&gt;proto_hdrs.proto_hdr[i];</div><div class='del'>-		bool hdr_found = false;</div><div class='del'>-		int j;</div><div class='del'>-</div><div class='del'>-		/* Find matched ice headers according to virtchnl headers. */</div><div class='del'>-		for (j = 0; j &lt; hdr_list_len; j++) {</div><div class='del'>-			struct ice_vc_hdr_match_type hdr_map = hdr_list[j];</div><div class='del'>-</div><div class='del'>-			if (proto_hdr-&gt;type == hdr_map.vc_hdr) {</div><div class='del'>-				*addl_hdrs |= hdr_map.ice_hdr;</div><div class='del'>-				hdr_found = true;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!hdr_found)</div><div class='del'>-			return false;</div><div class='del'>-</div><div class='del'>-		/* Find matched ice hash fields according to</div><div class='del'>-		 * virtchnl hash fields.</div><div class='del'>-		 */</div><div class='del'>-		for (j = 0; j &lt; hf_list_len; j++) {</div><div class='del'>-			struct ice_vc_hash_field_match_type hf_map = hf_list[j];</div><div class='del'>-</div><div class='del'>-			if (proto_hdr-&gt;type == hf_map.vc_hdr &amp;&amp;</div><div class='del'>-			    proto_hdr-&gt;field_selector == hf_map.vc_hash_field) {</div><div class='del'>-				*hash_flds |= hf_map.ice_hash_field;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vf_adv_rss_offload_ena - determine if capabilities support advanced</div><div class='del'>- * RSS offloads</div><div class='del'>- * @caps: VF driver negotiated capabilities</div><div class='del'>- *</div><div class='del'>- * Return true if VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF capability is set,</div><div class='del'>- * else return false</div><div class='del'>- */</div><div class='del'>-static bool ice_vf_adv_rss_offload_ena(u32 caps)</div><div class='del'>-{</div><div class='del'>-	return !!(caps &amp; VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_handle_rss_cfg</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the message buffer</div><div class='del'>- * @add: add a RSS config if true, otherwise delete a RSS config</div><div class='del'>- *</div><div class='del'>- * This function adds/deletes a RSS config</div><div class='del'>- */</div><div class='del'>-static int ice_vc_handle_rss_cfg(struct ice_vf *vf, u8 *msg, bool add)</div><div class='del'>-{</div><div class='del'>-	u32 v_opcode = add ? VIRTCHNL_OP_ADD_RSS_CFG : VIRTCHNL_OP_DEL_RSS_CFG;</div><div class='del'>-	struct virtchnl_rss_cfg *rss_cfg = (struct virtchnl_rss_cfg *)msg;</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	struct device *dev = ice_pf_to_dev(vf-&gt;pf);</div><div class='del'>-	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_FLAG_RSS_ENA, vf-&gt;pf-&gt;flags)) {</div><div class='del'>-		dev_dbg(dev, "VF %d attempting to configure RSS, but RSS is not supported by the PF\n",</div><div class='del'>-			vf-&gt;vf_id);</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_NOT_SUPPORTED;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ice_vf_adv_rss_offload_ena(vf-&gt;driver_caps)) {</div><div class='del'>-		dev_dbg(dev, "VF %d attempting to configure RSS, but Advanced RSS offload is not supported\n",</div><div class='del'>-			vf-&gt;vf_id);</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rss_cfg-&gt;proto_hdrs.count &gt; VIRTCHNL_MAX_NUM_PROTO_HDRS ||</div><div class='del'>-	    rss_cfg-&gt;rss_algorithm &lt; VIRTCHNL_RSS_ALG_TOEPLITZ_ASYMMETRIC ||</div><div class='del'>-	    rss_cfg-&gt;rss_algorithm &gt; VIRTCHNL_RSS_ALG_XOR_SYMMETRIC) {</div><div class='del'>-		dev_dbg(dev, "VF %d attempting to configure RSS, but RSS configuration is not valid\n",</div><div class='del'>-			vf-&gt;vf_id);</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ice_vc_validate_pattern(vf, &amp;rss_cfg-&gt;proto_hdrs)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rss_cfg-&gt;rss_algorithm == VIRTCHNL_RSS_ALG_R_ASYMMETRIC) {</div><div class='del'>-		struct ice_vsi_ctx *ctx;</div><div class='del'>-		u8 lut_type, hash_type;</div><div class='del'>-		int status;</div><div class='del'>-</div><div class='del'>-		lut_type = ICE_AQ_VSI_Q_OPT_RSS_LUT_VSI;</div><div class='del'>-		hash_type = add ? ICE_AQ_VSI_Q_OPT_RSS_HASH_XOR :</div><div class='del'>-				ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;</div><div class='del'>-</div><div class='del'>-		ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);</div><div class='del'>-		if (!ctx) {</div><div class='del'>-			v_ret = VIRTCHNL_STATUS_ERR_NO_MEMORY;</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ctx-&gt;info.q_opt_rss =</div><div class='del'>-			FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_LUT_M, lut_type) |</div><div class='del'>-			FIELD_PREP(ICE_AQ_VSI_Q_OPT_RSS_HASH_M, hash_type);</div><div class='del'>-</div><div class='del'>-		/* Preserve existing queueing option setting */</div><div class='del'>-		ctx-&gt;info.q_opt_rss |= (vsi-&gt;info.q_opt_rss &amp;</div><div class='del'>-					  ICE_AQ_VSI_Q_OPT_RSS_GBL_LUT_M);</div><div class='del'>-		ctx-&gt;info.q_opt_tc = vsi-&gt;info.q_opt_tc;</div><div class='del'>-		ctx-&gt;info.q_opt_flags = vsi-&gt;info.q_opt_rss;</div><div class='del'>-</div><div class='del'>-		ctx-&gt;info.valid_sections =</div><div class='del'>-				cpu_to_le16(ICE_AQ_VSI_PROP_Q_OPT_VALID);</div><div class='del'>-</div><div class='del'>-		status = ice_update_vsi(hw, vsi-&gt;idx, ctx, NULL);</div><div class='del'>-		if (status) {</div><div class='del'>-			dev_err(dev, "update VSI for RSS failed, err %d aq_err %s\n",</div><div class='del'>-				status, ice_aq_str(hw-&gt;adminq.sq_last_status));</div><div class='del'>-			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		} else {</div><div class='del'>-			vsi-&gt;info.q_opt_rss = ctx-&gt;info.q_opt_rss;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		kfree(ctx);</div><div class='del'>-	} else {</div><div class='del'>-		struct ice_rss_hash_cfg cfg;</div><div class='del'>-</div><div class='del'>-		/* Only check for none raw pattern case */</div><div class='del'>-		if (!ice_vc_validate_pattern(vf, &amp;rss_cfg-&gt;proto_hdrs)) {</div><div class='del'>-			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-		cfg.addl_hdrs = ICE_FLOW_SEG_HDR_NONE;</div><div class='del'>-		cfg.hash_flds = ICE_HASH_INVALID;</div><div class='del'>-		cfg.hdr_type = ICE_RSS_ANY_HEADERS;</div><div class='del'>-</div><div class='del'>-		if (!ice_vc_parse_rss_cfg(hw, rss_cfg, &amp;cfg)) {</div><div class='del'>-			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (add) {</div><div class='del'>-			if (ice_add_rss_cfg(hw, vsi, &amp;cfg)) {</div><div class='del'>-				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-				dev_err(dev, "ice_add_rss_cfg failed for vsi = %d, v_ret = %d\n",</div><div class='del'>-					vsi-&gt;vsi_num, v_ret);</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			int status;</div><div class='del'>-</div><div class='del'>-			status = ice_rem_rss_cfg(hw, vsi-&gt;idx, &amp;cfg);</div><div class='del'>-			/* We just ignore -ENOENT, because if two configurations</div><div class='del'>-			 * share the same profile remove one of them actually</div><div class='del'>-			 * removes both, since the profile is deleted.</div><div class='del'>-			 */</div><div class='del'>-			if (status &amp;&amp; status != -ENOENT) {</div><div class='del'>-				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-				dev_err(dev, "ice_rem_rss_cfg failed for VF ID:%d, error:%d\n",</div><div class='del'>-					vf-&gt;vf_id, status);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-error_param:</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, v_opcode, v_ret, NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_config_rss_key</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer</div><div class='del'>- *</div><div class='del'>- * Configure the VF's RSS key</div><div class='del'>- */</div><div class='del'>-static int ice_vc_config_rss_key(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	struct virtchnl_rss_key *vrk =</div><div class='del'>-		(struct virtchnl_rss_key *)msg;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ice_vc_isvalid_vsi_id(vf, vrk-&gt;vsi_id)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (vrk-&gt;key_len != ICE_VSIQF_HKEY_ARRAY_SIZE) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_FLAG_RSS_ENA, vf-&gt;pf-&gt;flags)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ice_set_rss_key(vsi, vrk-&gt;key))</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR;</div><div class='del'>-error_param:</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY, v_ret,</div><div class='del'>-				     NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_config_rss_lut</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer</div><div class='del'>- *</div><div class='del'>- * Configure the VF's RSS LUT</div><div class='del'>- */</div><div class='del'>-static int ice_vc_config_rss_lut(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	struct virtchnl_rss_lut *vrl = (struct virtchnl_rss_lut *)msg;</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ice_vc_isvalid_vsi_id(vf, vrl-&gt;vsi_id)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (vrl-&gt;lut_entries != ICE_LUT_VSI_SIZE) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_FLAG_RSS_ENA, vf-&gt;pf-&gt;flags)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ice_set_rss_lut(vsi, vrl-&gt;lut, ICE_LUT_VSI_SIZE))</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR;</div><div class='del'>-error_param:</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT, v_ret,</div><div class='del'>-				     NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_config_rss_hfunc</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer</div><div class='del'>- *</div><div class='del'>- * Configure the VF's RSS Hash function</div><div class='del'>- */</div><div class='del'>-static int ice_vc_config_rss_hfunc(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	struct virtchnl_rss_hfunc *vrh = (struct virtchnl_rss_hfunc *)msg;</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	u8 hfunc = ICE_AQ_VSI_Q_OPT_RSS_HASH_TPLZ;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ice_vc_isvalid_vsi_id(vf, vrh-&gt;vsi_id)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_FLAG_RSS_ENA, vf-&gt;pf-&gt;flags)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (vrh-&gt;rss_algorithm == VIRTCHNL_RSS_ALG_TOEPLITZ_SYMMETRIC)</div><div class='del'>-		hfunc = ICE_AQ_VSI_Q_OPT_RSS_HASH_SYM_TPLZ;</div><div class='del'>-</div><div class='del'>-	if (ice_set_rss_hfunc(vsi, hfunc))</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR;</div><div class='del'>-error_param:</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_HFUNC, v_ret,</div><div class='del'>-				     NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_vc_get_qos_caps - Get current QoS caps from PF</div><div class='ctx'>  * @vf: pointer to the VF info</div><div class='ctx'>  *</div><div class='hunk'>@@ -1119,110 +468,6 @@ err:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_vf_cfg_qs_bw - Configure per queue bandwidth</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @num_queues: number of queues to be configured</div><div class='del'>- *</div><div class='del'>- * Configure per queue bandwidth.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success or negative error value.</div><div class='del'>- */</div><div class='del'>-static int ice_vf_cfg_qs_bw(struct ice_vf *vf, u16 num_queues)</div><div class='del'>-{</div><div class='del'>-	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-	int ret;</div><div class='del'>-	u16 i;</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num_queues; i++) {</div><div class='del'>-		u32 p_rate, min_rate;</div><div class='del'>-		u8 tc;</div><div class='del'>-</div><div class='del'>-		p_rate = vf-&gt;qs_bw[i].peak;</div><div class='del'>-		min_rate = vf-&gt;qs_bw[i].committed;</div><div class='del'>-		tc = vf-&gt;qs_bw[i].tc;</div><div class='del'>-		if (p_rate)</div><div class='del'>-			ret = ice_cfg_q_bw_lmt(hw-&gt;port_info, vsi-&gt;idx, tc,</div><div class='del'>-					       vf-&gt;qs_bw[i].queue_id,</div><div class='del'>-					       ICE_MAX_BW, p_rate);</div><div class='del'>-		else</div><div class='del'>-			ret = ice_cfg_q_bw_dflt_lmt(hw-&gt;port_info, vsi-&gt;idx, tc,</div><div class='del'>-						    vf-&gt;qs_bw[i].queue_id,</div><div class='del'>-						    ICE_MAX_BW);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		if (min_rate)</div><div class='del'>-			ret = ice_cfg_q_bw_lmt(hw-&gt;port_info, vsi-&gt;idx, tc,</div><div class='del'>-					       vf-&gt;qs_bw[i].queue_id,</div><div class='del'>-					       ICE_MIN_BW, min_rate);</div><div class='del'>-		else</div><div class='del'>-			ret = ice_cfg_q_bw_dflt_lmt(hw-&gt;port_info, vsi-&gt;idx, tc,</div><div class='del'>-						    vf-&gt;qs_bw[i].queue_id,</div><div class='del'>-						    ICE_MIN_BW);</div><div class='del'>-</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vf_cfg_q_quanta_profile - Configure quanta profile</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @quanta_prof_idx: pointer to the quanta profile index</div><div class='del'>- * @quanta_size: quanta size to be set</div><div class='del'>- *</div><div class='del'>- * This function chooses available quanta profile and configures the register.</div><div class='del'>- * The quanta profile is evenly divided by the number of device ports, and then</div><div class='del'>- * available to the specific PF and VFs. The first profile for each PF is a</div><div class='del'>- * reserved default profile. Only quanta size of the rest unused profile can be</div><div class='del'>- * modified.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success or negative error value.</div><div class='del'>- */</div><div class='del'>-static int ice_vf_cfg_q_quanta_profile(struct ice_vf *vf, u16 quanta_size,</div><div class='del'>-				       u16 *quanta_prof_idx)</div><div class='del'>-{</div><div class='del'>-	const u16 n_desc = calc_quanta_desc(quanta_size);</div><div class='del'>-	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='del'>-	const u16 n_cmd = 2 * n_desc;</div><div class='del'>-	struct ice_pf *pf = vf-&gt;pf;</div><div class='del'>-	u16 per_pf, begin_id;</div><div class='del'>-	u8 n_used;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	begin_id = (GLCOMM_QUANTA_PROF_MAX_INDEX + 1) / hw-&gt;dev_caps.num_funcs *</div><div class='del'>-		   hw-&gt;logical_pf_id;</div><div class='del'>-</div><div class='del'>-	if (quanta_size == ICE_DFLT_QUANTA) {</div><div class='del'>-		*quanta_prof_idx = begin_id;</div><div class='del'>-	} else {</div><div class='del'>-		per_pf = (GLCOMM_QUANTA_PROF_MAX_INDEX + 1) /</div><div class='del'>-			 hw-&gt;dev_caps.num_funcs;</div><div class='del'>-		n_used = pf-&gt;num_quanta_prof_used;</div><div class='del'>-		if (n_used &lt; per_pf) {</div><div class='del'>-			*quanta_prof_idx = begin_id + 1 + n_used;</div><div class='del'>-			pf-&gt;num_quanta_prof_used++;</div><div class='del'>-		} else {</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	reg = FIELD_PREP(GLCOMM_QUANTA_PROF_QUANTA_SIZE_M, quanta_size) |</div><div class='del'>-	      FIELD_PREP(GLCOMM_QUANTA_PROF_MAX_CMD_M, n_cmd) |</div><div class='del'>-	      FIELD_PREP(GLCOMM_QUANTA_PROF_MAX_DESC_M, n_desc);</div><div class='del'>-	wr32(hw, GLCOMM_QUANTA_PROF(*quanta_prof_idx), reg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_vc_cfg_promiscuous_mode_msg</div><div class='ctx'>  * @vf: pointer to the VF info</div><div class='ctx'>  * @msg: pointer to the msg buffer</div><div class='hunk'>@@ -1404,744 +649,6 @@ error_param:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_vc_validate_vqs_bitmaps - validate Rx/Tx queue bitmaps from VIRTCHNL</div><div class='del'>- * @vqs: virtchnl_queue_select structure containing bitmaps to validate</div><div class='del'>- *</div><div class='del'>- * Return true on successful validation, else false</div><div class='del'>- */</div><div class='del'>-static bool ice_vc_validate_vqs_bitmaps(struct virtchnl_queue_select *vqs)</div><div class='del'>-{</div><div class='del'>-	if ((!vqs-&gt;rx_queues &amp;&amp; !vqs-&gt;tx_queues) ||</div><div class='del'>-	    vqs-&gt;rx_queues &gt;= BIT(ICE_MAX_RSS_QS_PER_VF) ||</div><div class='del'>-	    vqs-&gt;tx_queues &gt;= BIT(ICE_MAX_RSS_QS_PER_VF))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vf_ena_txq_interrupt - enable Tx queue interrupt via QINT_TQCTL</div><div class='del'>- * @vsi: VSI of the VF to configure</div><div class='del'>- * @q_idx: VF queue index used to determine the queue in the PF's space</div><div class='del'>- */</div><div class='del'>-static void ice_vf_ena_txq_interrupt(struct ice_vsi *vsi, u32 q_idx)</div><div class='del'>-{</div><div class='del'>-	struct ice_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='del'>-	u32 pfq = vsi-&gt;txq_map[q_idx];</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = rd32(hw, QINT_TQCTL(pfq));</div><div class='del'>-</div><div class='del'>-	/* MSI-X index 0 in the VF's space is always for the OICR, which means</div><div class='del'>-	 * this is most likely a poll mode VF driver, so don't enable an</div><div class='del'>-	 * interrupt that was never configured via VIRTCHNL_OP_CONFIG_IRQ_MAP</div><div class='del'>-	 */</div><div class='del'>-	if (!(reg &amp; QINT_TQCTL_MSIX_INDX_M))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	wr32(hw, QINT_TQCTL(pfq), reg | QINT_TQCTL_CAUSE_ENA_M);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vf_ena_rxq_interrupt - enable Tx queue interrupt via QINT_RQCTL</div><div class='del'>- * @vsi: VSI of the VF to configure</div><div class='del'>- * @q_idx: VF queue index used to determine the queue in the PF's space</div><div class='del'>- */</div><div class='del'>-static void ice_vf_ena_rxq_interrupt(struct ice_vsi *vsi, u32 q_idx)</div><div class='del'>-{</div><div class='del'>-	struct ice_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='del'>-	u32 pfq = vsi-&gt;rxq_map[q_idx];</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = rd32(hw, QINT_RQCTL(pfq));</div><div class='del'>-</div><div class='del'>-	/* MSI-X index 0 in the VF's space is always for the OICR, which means</div><div class='del'>-	 * this is most likely a poll mode VF driver, so don't enable an</div><div class='del'>-	 * interrupt that was never configured via VIRTCHNL_OP_CONFIG_IRQ_MAP</div><div class='del'>-	 */</div><div class='del'>-	if (!(reg &amp; QINT_RQCTL_MSIX_INDX_M))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	wr32(hw, QINT_RQCTL(pfq), reg | QINT_RQCTL_CAUSE_ENA_M);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_ena_qs_msg</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer</div><div class='del'>- *</div><div class='del'>- * called from the VF to enable all or specific queue(s)</div><div class='del'>- */</div><div class='del'>-static int ice_vc_ena_qs_msg(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	struct virtchnl_queue_select *vqs =</div><div class='del'>-	    (struct virtchnl_queue_select *)msg;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-	unsigned long q_map;</div><div class='del'>-	u16 vf_q_id;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ice_vc_isvalid_vsi_id(vf, vqs-&gt;vsi_id)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ice_vc_validate_vqs_bitmaps(vqs)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Enable only Rx rings, Tx rings were enabled by the FW when the</div><div class='del'>-	 * Tx queue group list was configured and the context bits were</div><div class='del'>-	 * programmed using ice_vsi_cfg_txqs</div><div class='del'>-	 */</div><div class='del'>-	q_map = vqs-&gt;rx_queues;</div><div class='del'>-	for_each_set_bit(vf_q_id, &amp;q_map, ICE_MAX_RSS_QS_PER_VF) {</div><div class='del'>-		if (!ice_vc_isvalid_q_id(vsi, vf_q_id)) {</div><div class='del'>-			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Skip queue if enabled */</div><div class='del'>-		if (test_bit(vf_q_id, vf-&gt;rxq_ena))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (ice_vsi_ctrl_one_rx_ring(vsi, true, vf_q_id, true)) {</div><div class='del'>-			dev_err(ice_pf_to_dev(vsi-&gt;back), "Failed to enable Rx ring %d on VSI %d\n",</div><div class='del'>-				vf_q_id, vsi-&gt;vsi_num);</div><div class='del'>-			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ice_vf_ena_rxq_interrupt(vsi, vf_q_id);</div><div class='del'>-		set_bit(vf_q_id, vf-&gt;rxq_ena);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	q_map = vqs-&gt;tx_queues;</div><div class='del'>-	for_each_set_bit(vf_q_id, &amp;q_map, ICE_MAX_RSS_QS_PER_VF) {</div><div class='del'>-		if (!ice_vc_isvalid_q_id(vsi, vf_q_id)) {</div><div class='del'>-			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Skip queue if enabled */</div><div class='del'>-		if (test_bit(vf_q_id, vf-&gt;txq_ena))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		ice_vf_ena_txq_interrupt(vsi, vf_q_id);</div><div class='del'>-		set_bit(vf_q_id, vf-&gt;txq_ena);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set flag to indicate that queues are enabled */</div><div class='del'>-	if (v_ret == VIRTCHNL_STATUS_SUCCESS)</div><div class='del'>-		set_bit(ICE_VF_STATE_QS_ENA, vf-&gt;vf_states);</div><div class='del'>-</div><div class='del'>-error_param:</div><div class='del'>-	/* send the response to the VF */</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES, v_ret,</div><div class='del'>-				     NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vf_vsi_dis_single_txq - disable a single Tx queue</div><div class='del'>- * @vf: VF to disable queue for</div><div class='del'>- * @vsi: VSI for the VF</div><div class='del'>- * @q_id: VF relative (0-based) queue ID</div><div class='del'>- *</div><div class='del'>- * Attempt to disable the Tx queue passed in. If the Tx queue was successfully</div><div class='del'>- * disabled then clear q_id bit in the enabled queues bitmap and return</div><div class='del'>- * success. Otherwise return error.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-ice_vf_vsi_dis_single_txq(struct ice_vf *vf, struct ice_vsi *vsi, u16 q_id)</div><div class='del'>-{</div><div class='del'>-	struct ice_txq_meta txq_meta = { 0 };</div><div class='del'>-	struct ice_tx_ring *ring;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(q_id, vf-&gt;txq_ena))</div><div class='del'>-		dev_dbg(ice_pf_to_dev(vsi-&gt;back), "Queue %u on VSI %u is not enabled, but stopping it anyway\n",</div><div class='del'>-			q_id, vsi-&gt;vsi_num);</div><div class='del'>-</div><div class='del'>-	ring = vsi-&gt;tx_rings[q_id];</div><div class='del'>-	if (!ring)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ice_fill_txq_meta(vsi, ring, &amp;txq_meta);</div><div class='del'>-</div><div class='del'>-	err = ice_vsi_stop_tx_ring(vsi, ICE_NO_RESET, vf-&gt;vf_id, ring, &amp;txq_meta);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(ice_pf_to_dev(vsi-&gt;back), "Failed to stop Tx ring %d on VSI %d\n",</div><div class='del'>-			q_id, vsi-&gt;vsi_num);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Clear enabled queues flag */</div><div class='del'>-	clear_bit(q_id, vf-&gt;txq_ena);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_dis_qs_msg</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer</div><div class='del'>- *</div><div class='del'>- * called from the VF to disable all or specific queue(s)</div><div class='del'>- */</div><div class='del'>-static int ice_vc_dis_qs_msg(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	struct virtchnl_queue_select *vqs =</div><div class='del'>-	    (struct virtchnl_queue_select *)msg;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-	unsigned long q_map;</div><div class='del'>-	u16 vf_q_id;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states) &amp;&amp;</div><div class='del'>-	    !test_bit(ICE_VF_STATE_QS_ENA, vf-&gt;vf_states)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ice_vc_isvalid_vsi_id(vf, vqs-&gt;vsi_id)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!ice_vc_validate_vqs_bitmaps(vqs)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (vqs-&gt;tx_queues) {</div><div class='del'>-		q_map = vqs-&gt;tx_queues;</div><div class='del'>-</div><div class='del'>-		for_each_set_bit(vf_q_id, &amp;q_map, ICE_MAX_RSS_QS_PER_VF) {</div><div class='del'>-			if (!ice_vc_isvalid_q_id(vsi, vf_q_id)) {</div><div class='del'>-				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-				goto error_param;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (ice_vf_vsi_dis_single_txq(vf, vsi, vf_q_id)) {</div><div class='del'>-				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-				goto error_param;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	q_map = vqs-&gt;rx_queues;</div><div class='del'>-	/* speed up Rx queue disable by batching them if possible */</div><div class='del'>-	if (q_map &amp;&amp;</div><div class='del'>-	    bitmap_equal(&amp;q_map, vf-&gt;rxq_ena, ICE_MAX_RSS_QS_PER_VF)) {</div><div class='del'>-		if (ice_vsi_stop_all_rx_rings(vsi)) {</div><div class='del'>-			dev_err(ice_pf_to_dev(vsi-&gt;back), "Failed to stop all Rx rings on VSI %d\n",</div><div class='del'>-				vsi-&gt;vsi_num);</div><div class='del'>-			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		bitmap_zero(vf-&gt;rxq_ena, ICE_MAX_RSS_QS_PER_VF);</div><div class='del'>-	} else if (q_map) {</div><div class='del'>-		for_each_set_bit(vf_q_id, &amp;q_map, ICE_MAX_RSS_QS_PER_VF) {</div><div class='del'>-			if (!ice_vc_isvalid_q_id(vsi, vf_q_id)) {</div><div class='del'>-				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-				goto error_param;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* Skip queue if not enabled */</div><div class='del'>-			if (!test_bit(vf_q_id, vf-&gt;rxq_ena))</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			if (ice_vsi_ctrl_one_rx_ring(vsi, false, vf_q_id,</div><div class='del'>-						     true)) {</div><div class='del'>-				dev_err(ice_pf_to_dev(vsi-&gt;back), "Failed to stop Rx ring %d on VSI %d\n",</div><div class='del'>-					vf_q_id, vsi-&gt;vsi_num);</div><div class='del'>-				v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-				goto error_param;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* Clear enabled queues flag */</div><div class='del'>-			clear_bit(vf_q_id, vf-&gt;rxq_ena);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Clear enabled queues flag */</div><div class='del'>-	if (v_ret == VIRTCHNL_STATUS_SUCCESS &amp;&amp; ice_vf_has_no_qs_ena(vf))</div><div class='del'>-		clear_bit(ICE_VF_STATE_QS_ENA, vf-&gt;vf_states);</div><div class='del'>-</div><div class='del'>-error_param:</div><div class='del'>-	/* send the response to the VF */</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES, v_ret,</div><div class='del'>-				     NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_cfg_interrupt</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @vsi: the VSI being configured</div><div class='del'>- * @map: vector map for mapping vectors to queues</div><div class='del'>- * @q_vector: structure for interrupt vector</div><div class='del'>- * configure the IRQ to queue map</div><div class='del'>- */</div><div class='del'>-static enum virtchnl_status_code</div><div class='del'>-ice_cfg_interrupt(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='del'>-		  struct virtchnl_vector_map *map,</div><div class='del'>-		  struct ice_q_vector *q_vector)</div><div class='del'>-{</div><div class='del'>-	u16 vsi_q_id, vsi_q_id_idx;</div><div class='del'>-	unsigned long qmap;</div><div class='del'>-</div><div class='del'>-	q_vector-&gt;num_ring_rx = 0;</div><div class='del'>-	q_vector-&gt;num_ring_tx = 0;</div><div class='del'>-</div><div class='del'>-	qmap = map-&gt;rxq_map;</div><div class='del'>-	for_each_set_bit(vsi_q_id_idx, &amp;qmap, ICE_MAX_RSS_QS_PER_VF) {</div><div class='del'>-		vsi_q_id = vsi_q_id_idx;</div><div class='del'>-</div><div class='del'>-		if (!ice_vc_isvalid_q_id(vsi, vsi_q_id))</div><div class='del'>-			return VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-</div><div class='del'>-		q_vector-&gt;num_ring_rx++;</div><div class='del'>-		q_vector-&gt;rx.itr_idx = map-&gt;rxitr_idx;</div><div class='del'>-		vsi-&gt;rx_rings[vsi_q_id]-&gt;q_vector = q_vector;</div><div class='del'>-		ice_cfg_rxq_interrupt(vsi, vsi_q_id,</div><div class='del'>-				      q_vector-&gt;vf_reg_idx,</div><div class='del'>-				      q_vector-&gt;rx.itr_idx);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	qmap = map-&gt;txq_map;</div><div class='del'>-	for_each_set_bit(vsi_q_id_idx, &amp;qmap, ICE_MAX_RSS_QS_PER_VF) {</div><div class='del'>-		vsi_q_id = vsi_q_id_idx;</div><div class='del'>-</div><div class='del'>-		if (!ice_vc_isvalid_q_id(vsi, vsi_q_id))</div><div class='del'>-			return VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-</div><div class='del'>-		q_vector-&gt;num_ring_tx++;</div><div class='del'>-		q_vector-&gt;tx.itr_idx = map-&gt;txitr_idx;</div><div class='del'>-		vsi-&gt;tx_rings[vsi_q_id]-&gt;q_vector = q_vector;</div><div class='del'>-		ice_cfg_txq_interrupt(vsi, vsi_q_id,</div><div class='del'>-				      q_vector-&gt;vf_reg_idx,</div><div class='del'>-				      q_vector-&gt;tx.itr_idx);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_cfg_irq_map_msg</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer</div><div class='del'>- *</div><div class='del'>- * called from the VF to configure the IRQ to queue map</div><div class='del'>- */</div><div class='del'>-static int ice_vc_cfg_irq_map_msg(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	u16 num_q_vectors_mapped, vsi_id, vector_id;</div><div class='del'>-	struct virtchnl_irq_map_info *irqmap_info;</div><div class='del'>-	struct virtchnl_vector_map *map;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	irqmap_info = (struct virtchnl_irq_map_info *)msg;</div><div class='del'>-	num_q_vectors_mapped = irqmap_info-&gt;num_vectors;</div><div class='del'>-</div><div class='del'>-	/* Check to make sure number of VF vectors mapped is not greater than</div><div class='del'>-	 * number of VF vectors originally allocated, and check that</div><div class='del'>-	 * there is actually at least a single VF queue vector mapped</div><div class='del'>-	 */</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states) ||</div><div class='del'>-	    vf-&gt;num_msix &lt; num_q_vectors_mapped ||</div><div class='del'>-	    !num_q_vectors_mapped) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num_q_vectors_mapped; i++) {</div><div class='del'>-		struct ice_q_vector *q_vector;</div><div class='del'>-</div><div class='del'>-		map = &amp;irqmap_info-&gt;vecmap[i];</div><div class='del'>-</div><div class='del'>-		vector_id = map-&gt;vector_id;</div><div class='del'>-		vsi_id = map-&gt;vsi_id;</div><div class='del'>-		/* vector_id is always 0-based for each VF, and can never be</div><div class='del'>-		 * larger than or equal to the max allowed interrupts per VF</div><div class='del'>-		 */</div><div class='del'>-		if (!(vector_id &lt; vf-&gt;num_msix) ||</div><div class='del'>-		    !ice_vc_isvalid_vsi_id(vf, vsi_id) ||</div><div class='del'>-		    (!vector_id &amp;&amp; (map-&gt;rxq_map || map-&gt;txq_map))) {</div><div class='del'>-			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* No need to map VF miscellaneous or rogue vector */</div><div class='del'>-		if (!vector_id)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* Subtract non queue vector from vector_id passed by VF</div><div class='del'>-		 * to get actual number of VSI queue vector array index</div><div class='del'>-		 */</div><div class='del'>-		q_vector = vsi-&gt;q_vectors[vector_id - ICE_NONQ_VECS_VF];</div><div class='del'>-		if (!q_vector) {</div><div class='del'>-			v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* lookout for the invalid queue index */</div><div class='del'>-		v_ret = ice_cfg_interrupt(vf, vsi, map, q_vector);</div><div class='del'>-		if (v_ret)</div><div class='del'>-			goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-error_param:</div><div class='del'>-	/* send the response to the VF */</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP, v_ret,</div><div class='del'>-				     NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_cfg_q_bw - Configure per queue bandwidth</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer which holds the command descriptor</div><div class='del'>- *</div><div class='del'>- * Configure VF queues bandwidth.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success or negative error value.</div><div class='del'>- */</div><div class='del'>-static int ice_vc_cfg_q_bw(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	struct virtchnl_queues_bw_cfg *qbw =</div><div class='del'>-		(struct virtchnl_queues_bw_cfg *)msg;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-	u16 i;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states) ||</div><div class='del'>-	    !ice_vc_isvalid_vsi_id(vf, qbw-&gt;vsi_id)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (qbw-&gt;num_queues &gt; ICE_MAX_RSS_QS_PER_VF ||</div><div class='del'>-	    qbw-&gt;num_queues &gt; min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq)) {</div><div class='del'>-		dev_err(ice_pf_to_dev(vf-&gt;pf), "VF-%d trying to configure more than allocated number of queues: %d\n",</div><div class='del'>-			vf-&gt;vf_id, min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq));</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; qbw-&gt;num_queues; i++) {</div><div class='del'>-		if (qbw-&gt;cfg[i].shaper.peak != 0 &amp;&amp; vf-&gt;max_tx_rate != 0 &amp;&amp;</div><div class='del'>-		    qbw-&gt;cfg[i].shaper.peak &gt; vf-&gt;max_tx_rate)</div><div class='del'>-			dev_warn(ice_pf_to_dev(vf-&gt;pf), "The maximum queue %d rate limit configuration may not take effect because the maximum TX rate for VF-%d is %d\n",</div><div class='del'>-				 qbw-&gt;cfg[i].queue_id, vf-&gt;vf_id,</div><div class='del'>-				 vf-&gt;max_tx_rate);</div><div class='del'>-		if (qbw-&gt;cfg[i].shaper.committed != 0 &amp;&amp; vf-&gt;min_tx_rate != 0 &amp;&amp;</div><div class='del'>-		    qbw-&gt;cfg[i].shaper.committed &lt; vf-&gt;min_tx_rate)</div><div class='del'>-			dev_warn(ice_pf_to_dev(vf-&gt;pf), "The minimum queue %d rate limit configuration may not take effect because the minimum TX rate for VF-%d is %d\n",</div><div class='del'>-				 qbw-&gt;cfg[i].queue_id, vf-&gt;vf_id,</div><div class='del'>-				 vf-&gt;max_tx_rate);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; qbw-&gt;num_queues; i++) {</div><div class='del'>-		vf-&gt;qs_bw[i].queue_id = qbw-&gt;cfg[i].queue_id;</div><div class='del'>-		vf-&gt;qs_bw[i].peak = qbw-&gt;cfg[i].shaper.peak;</div><div class='del'>-		vf-&gt;qs_bw[i].committed = qbw-&gt;cfg[i].shaper.committed;</div><div class='del'>-		vf-&gt;qs_bw[i].tc = qbw-&gt;cfg[i].tc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ice_vf_cfg_qs_bw(vf, qbw-&gt;num_queues))</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	/* send the response to the VF */</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_QUEUE_BW,</div><div class='del'>-				    v_ret, NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_cfg_q_quanta - Configure per queue quanta</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer which holds the command descriptor</div><div class='del'>- *</div><div class='del'>- * Configure VF queues quanta.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success or negative error value.</div><div class='del'>- */</div><div class='del'>-static int ice_vc_cfg_q_quanta(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	u16 quanta_prof_id, quanta_size, start_qid, end_qid, i;</div><div class='del'>-	struct virtchnl_quanta_cfg *qquanta =</div><div class='del'>-		(struct virtchnl_quanta_cfg *)msg;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	end_qid = qquanta-&gt;queue_select.start_queue_id +</div><div class='del'>-		  qquanta-&gt;queue_select.num_queues;</div><div class='del'>-	if (end_qid &gt; ICE_MAX_RSS_QS_PER_VF ||</div><div class='del'>-	    end_qid &gt; min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq)) {</div><div class='del'>-		dev_err(ice_pf_to_dev(vf-&gt;pf), "VF-%d trying to configure more than allocated number of queues: %d\n",</div><div class='del'>-			vf-&gt;vf_id, min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq));</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	quanta_size = qquanta-&gt;quanta_size;</div><div class='del'>-	if (quanta_size &gt; ICE_MAX_QUANTA_SIZE ||</div><div class='del'>-	    quanta_size &lt; ICE_MIN_QUANTA_SIZE) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (quanta_size % 64) {</div><div class='del'>-		dev_err(ice_pf_to_dev(vf-&gt;pf), "quanta size should be the product of 64\n");</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = ice_vf_cfg_q_quanta_profile(vf, quanta_size,</div><div class='del'>-					  &amp;quanta_prof_id);</div><div class='del'>-	if (ret) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_NOT_SUPPORTED;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	start_qid = qquanta-&gt;queue_select.start_queue_id;</div><div class='del'>-	for (i = start_qid; i &lt; end_qid; i++)</div><div class='del'>-		vsi-&gt;tx_rings[i]-&gt;quanta_prof_id = quanta_prof_id;</div><div class='del'>-</div><div class='del'>-err:</div><div class='del'>-	/* send the response to the VF */</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_QUANTA,</div><div class='del'>-				     v_ret, NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_cfg_qs_msg</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer</div><div class='del'>- *</div><div class='del'>- * called from the VF to configure the Rx/Tx queues</div><div class='del'>- */</div><div class='del'>-static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	struct virtchnl_vsi_queue_config_info *qci =</div><div class='del'>-	    (struct virtchnl_vsi_queue_config_info *)msg;</div><div class='del'>-	struct virtchnl_queue_pair_info *qpi;</div><div class='del'>-	struct ice_pf *pf = vf-&gt;pf;</div><div class='del'>-	struct ice_lag *lag;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-	u8 act_prt, pri_prt;</div><div class='del'>-	int i = -1, q_idx;</div><div class='del'>-</div><div class='del'>-	lag = pf-&gt;lag;</div><div class='del'>-	mutex_lock(&amp;pf-&gt;lag_mutex);</div><div class='del'>-	act_prt = ICE_LAG_INVALID_PORT;</div><div class='del'>-	pri_prt = pf-&gt;hw.port_info-&gt;lport;</div><div class='del'>-	if (lag &amp;&amp; lag-&gt;bonded &amp;&amp; lag-&gt;primary) {</div><div class='del'>-		act_prt = lag-&gt;active_port;</div><div class='del'>-		if (act_prt != pri_prt &amp;&amp; act_prt != ICE_LAG_INVALID_PORT &amp;&amp;</div><div class='del'>-		    lag-&gt;upper_netdev)</div><div class='del'>-			ice_lag_move_vf_nodes_cfg(lag, act_prt, pri_prt);</div><div class='del'>-		else</div><div class='del'>-			act_prt = ICE_LAG_INVALID_PORT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states))</div><div class='del'>-		goto error_param;</div><div class='del'>-</div><div class='del'>-	if (!ice_vc_isvalid_vsi_id(vf, qci-&gt;vsi_id))</div><div class='del'>-		goto error_param;</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi)</div><div class='del'>-		goto error_param;</div><div class='del'>-</div><div class='del'>-	if (qci-&gt;num_queue_pairs &gt; ICE_MAX_RSS_QS_PER_VF ||</div><div class='del'>-	    qci-&gt;num_queue_pairs &gt; min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq)) {</div><div class='del'>-		dev_err(ice_pf_to_dev(pf), "VF-%d requesting more than supported number of queues: %d\n",</div><div class='del'>-			vf-&gt;vf_id, min_t(u16, vsi-&gt;alloc_txq, vsi-&gt;alloc_rxq));</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; qci-&gt;num_queue_pairs; i++) {</div><div class='del'>-		if (!qci-&gt;qpair[i].rxq.crc_disable)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (!(vf-&gt;driver_caps &amp; VIRTCHNL_VF_OFFLOAD_CRC) ||</div><div class='del'>-		    vf-&gt;vlan_strip_ena)</div><div class='del'>-			goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; qci-&gt;num_queue_pairs; i++) {</div><div class='del'>-		qpi = &amp;qci-&gt;qpair[i];</div><div class='del'>-		if (qpi-&gt;txq.vsi_id != qci-&gt;vsi_id ||</div><div class='del'>-		    qpi-&gt;rxq.vsi_id != qci-&gt;vsi_id ||</div><div class='del'>-		    qpi-&gt;rxq.queue_id != qpi-&gt;txq.queue_id ||</div><div class='del'>-		    qpi-&gt;txq.headwb_enabled ||</div><div class='del'>-		    !ice_vc_isvalid_ring_len(qpi-&gt;txq.ring_len) ||</div><div class='del'>-		    !ice_vc_isvalid_ring_len(qpi-&gt;rxq.ring_len) ||</div><div class='del'>-		    !ice_vc_isvalid_q_id(vsi, qpi-&gt;txq.queue_id)) {</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		q_idx = qpi-&gt;rxq.queue_id;</div><div class='del'>-</div><div class='del'>-		/* make sure selected "q_idx" is in valid range of queues</div><div class='del'>-		 * for selected "vsi"</div><div class='del'>-		 */</div><div class='del'>-		if (q_idx &gt;= vsi-&gt;alloc_txq || q_idx &gt;= vsi-&gt;alloc_rxq) {</div><div class='del'>-			goto error_param;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* copy Tx queue info from VF into VSI */</div><div class='del'>-		if (qpi-&gt;txq.ring_len &gt; 0) {</div><div class='del'>-			vsi-&gt;tx_rings[q_idx]-&gt;dma = qpi-&gt;txq.dma_ring_addr;</div><div class='del'>-			vsi-&gt;tx_rings[q_idx]-&gt;count = qpi-&gt;txq.ring_len;</div><div class='del'>-</div><div class='del'>-			/* Disable any existing queue first */</div><div class='del'>-			if (ice_vf_vsi_dis_single_txq(vf, vsi, q_idx))</div><div class='del'>-				goto error_param;</div><div class='del'>-</div><div class='del'>-			/* Configure a queue with the requested settings */</div><div class='del'>-			if (ice_vsi_cfg_single_txq(vsi, vsi-&gt;tx_rings, q_idx)) {</div><div class='del'>-				dev_warn(ice_pf_to_dev(pf), "VF-%d failed to configure TX queue %d\n",</div><div class='del'>-					 vf-&gt;vf_id, q_idx);</div><div class='del'>-				goto error_param;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* copy Rx queue info from VF into VSI */</div><div class='del'>-		if (qpi-&gt;rxq.ring_len &gt; 0) {</div><div class='del'>-			u16 max_frame_size = ice_vc_get_max_frame_size(vf);</div><div class='del'>-			struct ice_rx_ring *ring = vsi-&gt;rx_rings[q_idx];</div><div class='del'>-			u32 rxdid;</div><div class='del'>-</div><div class='del'>-			ring-&gt;dma = qpi-&gt;rxq.dma_ring_addr;</div><div class='del'>-			ring-&gt;count = qpi-&gt;rxq.ring_len;</div><div class='del'>-</div><div class='del'>-			if (qpi-&gt;rxq.crc_disable)</div><div class='del'>-				ring-&gt;flags |= ICE_RX_FLAGS_CRC_STRIP_DIS;</div><div class='del'>-			else</div><div class='del'>-				ring-&gt;flags &amp;= ~ICE_RX_FLAGS_CRC_STRIP_DIS;</div><div class='del'>-</div><div class='del'>-			if (qpi-&gt;rxq.databuffer_size != 0 &amp;&amp;</div><div class='del'>-			    (qpi-&gt;rxq.databuffer_size &gt; ((16 * 1024) - 128) ||</div><div class='del'>-			     qpi-&gt;rxq.databuffer_size &lt; 1024))</div><div class='del'>-				goto error_param;</div><div class='del'>-			ring-&gt;rx_buf_len = qpi-&gt;rxq.databuffer_size;</div><div class='del'>-			if (qpi-&gt;rxq.max_pkt_size &gt; max_frame_size ||</div><div class='del'>-			    qpi-&gt;rxq.max_pkt_size &lt; 64)</div><div class='del'>-				goto error_param;</div><div class='del'>-</div><div class='del'>-			ring-&gt;max_frame = qpi-&gt;rxq.max_pkt_size;</div><div class='del'>-			/* add space for the port VLAN since the VF driver is</div><div class='del'>-			 * not expected to account for it in the MTU</div><div class='del'>-			 * calculation</div><div class='del'>-			 */</div><div class='del'>-			if (ice_vf_is_port_vlan_ena(vf))</div><div class='del'>-				ring-&gt;max_frame += VLAN_HLEN;</div><div class='del'>-</div><div class='del'>-			if (ice_vsi_cfg_single_rxq(vsi, q_idx)) {</div><div class='del'>-				dev_warn(ice_pf_to_dev(pf), "VF-%d failed to configure RX queue %d\n",</div><div class='del'>-					 vf-&gt;vf_id, q_idx);</div><div class='del'>-				goto error_param;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* If Rx flex desc is supported, select RXDID for Rx</div><div class='del'>-			 * queues. Otherwise, use legacy 32byte descriptor</div><div class='del'>-			 * format. Legacy 16byte descriptor is not supported.</div><div class='del'>-			 * If this RXDID is selected, return error.</div><div class='del'>-			 */</div><div class='del'>-			if (vf-&gt;driver_caps &amp;</div><div class='del'>-			    VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) {</div><div class='del'>-				rxdid = qpi-&gt;rxq.rxdid;</div><div class='del'>-				if (!(BIT(rxdid) &amp; pf-&gt;supported_rxdids))</div><div class='del'>-					goto error_param;</div><div class='del'>-			} else {</div><div class='del'>-				rxdid = ICE_RXDID_LEGACY_1;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			ice_write_qrxflxp_cntxt(&amp;vsi-&gt;back-&gt;hw,</div><div class='del'>-						vsi-&gt;rxq_map[q_idx],</div><div class='del'>-						rxdid, 0x03, false);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (lag &amp;&amp; lag-&gt;bonded &amp;&amp; lag-&gt;primary &amp;&amp;</div><div class='del'>-	    act_prt != ICE_LAG_INVALID_PORT)</div><div class='del'>-		ice_lag_move_vf_nodes_cfg(lag, pri_prt, act_prt);</div><div class='del'>-	mutex_unlock(&amp;pf-&gt;lag_mutex);</div><div class='del'>-</div><div class='del'>-	/* send the response to the VF */</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,</div><div class='del'>-				     VIRTCHNL_STATUS_SUCCESS, NULL, 0);</div><div class='del'>-error_param:</div><div class='del'>-	/* disable whatever we can */</div><div class='del'>-	for (; i &gt;= 0; i--) {</div><div class='del'>-		if (ice_vsi_ctrl_one_rx_ring(vsi, false, i, true))</div><div class='del'>-			dev_err(ice_pf_to_dev(pf), "VF-%d could not disable RX queue %d\n",</div><div class='del'>-				vf-&gt;vf_id, i);</div><div class='del'>-		if (ice_vf_vsi_dis_single_txq(vf, vsi, i))</div><div class='del'>-			dev_err(ice_pf_to_dev(pf), "VF-%d could not disable TX queue %d\n",</div><div class='del'>-				vf-&gt;vf_id, i);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (lag &amp;&amp; lag-&gt;bonded &amp;&amp; lag-&gt;primary &amp;&amp;</div><div class='del'>-	    act_prt != ICE_LAG_INVALID_PORT)</div><div class='del'>-		ice_lag_move_vf_nodes_cfg(lag, pri_prt, act_prt);</div><div class='del'>-	mutex_unlock(&amp;pf-&gt;lag_mutex);</div><div class='del'>-</div><div class='del'>-	ice_lag_move_new_vf_nodes(vf);</div><div class='del'>-</div><div class='del'>-	/* send the response to the VF */</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,</div><div class='del'>-				     VIRTCHNL_STATUS_ERR_PARAM, NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_can_vf_change_mac</div><div class='ctx'>  * @vf: pointer to the VF info</div><div class='ctx'>  *</div><div class='hunk'>@@ -2234,6 +741,51 @@ ice_vfhw_mac_add(struct ice_vf *vf, struct virtchnl_ether_addr *vc_ether_addr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ice_is_mc_lldp_eth_addr - check if the given MAC is a multicast LLDP address</div><div class='add'>+ * @mac: address to check</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the address is one of the three possible LLDP multicast</div><div class='add'>+ *	   addresses, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool ice_is_mc_lldp_eth_addr(const u8 *mac)</div><div class='add'>+{</div><div class='add'>+	const u8 lldp_mac_base[] = {0x01, 0x80, 0xc2, 0x00, 0x00};</div><div class='add'>+</div><div class='add'>+	if (memcmp(mac, lldp_mac_base, sizeof(lldp_mac_base)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return (mac[5] == 0x0e || mac[5] == 0x03 || mac[5] == 0x00);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ice_vc_can_add_mac - check if the VF is allowed to add a given MAC</div><div class='add'>+ * @vf: a VF to add the address to</div><div class='add'>+ * @mac: address to check</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the VF is allowed to add such MAC address, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool ice_vc_can_add_mac(const struct ice_vf *vf, const u8 *mac)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = ice_pf_to_dev(vf-&gt;pf);</div><div class='add'>+</div><div class='add'>+	if (is_unicast_ether_addr(mac) &amp;&amp;</div><div class='add'>+	    !ice_can_vf_change_mac((struct ice_vf *)vf)) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"VF attempting to override administratively set MAC address, bring down and up the VF interface to resume normal operation\n");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!vf-&gt;trusted &amp;&amp; ice_is_mc_lldp_eth_addr(mac)) {</div><div class='add'>+		dev_warn(dev,</div><div class='add'>+			 "An untrusted VF %u is attempting to configure an LLDP multicast address\n",</div><div class='add'>+			 vf-&gt;vf_id);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ice_vc_add_mac_addr - attempt to add the MAC address passed in</div><div class='ctx'>  * @vf: pointer to the VF info</div><div class='ctx'>  * @vsi: pointer to the VF's VSI</div><div class='hunk'>@@ -2251,10 +803,8 @@ ice_vc_add_mac_addr(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='ctx'> 	if (ether_addr_equal(mac_addr, vf-&gt;dev_lan_addr))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (is_unicast_ether_addr(mac_addr) &amp;&amp; !ice_can_vf_change_mac(vf)) {</div><div class='del'>-		dev_err(dev, "VF attempting to override administratively set MAC address, bring down and up the VF interface to resume normal operation\n");</div><div class='add'>+	if (!ice_vc_can_add_mac(vf, mac_addr))</div><div class='ctx'> 		return -EPERM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ret = ice_fltr_add_mac(vsi, mac_addr, ICE_FWD_TO_VSI);</div><div class='ctx'> 	if (ret == -EEXIST) {</div><div class='hunk'>@@ -2269,6 +819,8 @@ ice_vc_add_mac_addr(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		vf-&gt;num_mac++;</div><div class='add'>+		if (ice_is_mc_lldp_eth_addr(mac_addr))</div><div class='add'>+			ice_vf_update_mac_lldp_num(vf, vsi, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ice_vfhw_mac_add(vf, vc_ether_addr);</div><div class='hunk'>@@ -2363,6 +915,8 @@ ice_vc_del_mac_addr(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='ctx'> 	ice_vfhw_mac_del(vf, vc_ether_addr);</div><div class='ctx'> </div><div class='ctx'> 	vf-&gt;num_mac--;</div><div class='add'>+	if (ice_is_mc_lldp_eth_addr(mac_addr))</div><div class='add'>+		ice_vf_update_mac_lldp_num(vf, vsi, false);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2468,66 +1022,6 @@ static int ice_vc_del_mac_addr_msg(struct ice_vf *vf, u8 *msg)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_vc_request_qs_msg</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer</div><div class='del'>- *</div><div class='del'>- * VFs get a default number of queues but can use this message to request a</div><div class='del'>- * different number. If the request is successful, PF will reset the VF and</div><div class='del'>- * return 0. If unsuccessful, PF will send message informing VF of number of</div><div class='del'>- * available queue pairs via virtchnl message response to VF.</div><div class='del'>- */</div><div class='del'>-static int ice_vc_request_qs_msg(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	struct virtchnl_vf_res_request *vfres =</div><div class='del'>-		(struct virtchnl_vf_res_request *)msg;</div><div class='del'>-	u16 req_queues = vfres-&gt;num_queue_pairs;</div><div class='del'>-	struct ice_pf *pf = vf-&gt;pf;</div><div class='del'>-	u16 max_allowed_vf_queues;</div><div class='del'>-	u16 tx_rx_queue_left;</div><div class='del'>-	struct device *dev;</div><div class='del'>-	u16 cur_queues;</div><div class='del'>-</div><div class='del'>-	dev = ice_pf_to_dev(pf);</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto error_param;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cur_queues = vf-&gt;num_vf_qs;</div><div class='del'>-	tx_rx_queue_left = min_t(u16, ice_get_avail_txq_count(pf),</div><div class='del'>-				 ice_get_avail_rxq_count(pf));</div><div class='del'>-	max_allowed_vf_queues = tx_rx_queue_left + cur_queues;</div><div class='del'>-	if (!req_queues) {</div><div class='del'>-		dev_err(dev, "VF %d tried to request 0 queues. Ignoring.\n",</div><div class='del'>-			vf-&gt;vf_id);</div><div class='del'>-	} else if (req_queues &gt; ICE_MAX_RSS_QS_PER_VF) {</div><div class='del'>-		dev_err(dev, "VF %d tried to request more than %d queues.\n",</div><div class='del'>-			vf-&gt;vf_id, ICE_MAX_RSS_QS_PER_VF);</div><div class='del'>-		vfres-&gt;num_queue_pairs = ICE_MAX_RSS_QS_PER_VF;</div><div class='del'>-	} else if (req_queues &gt; cur_queues &amp;&amp;</div><div class='del'>-		   req_queues - cur_queues &gt; tx_rx_queue_left) {</div><div class='del'>-		dev_warn(dev, "VF %d requested %u more queues, but only %u left.\n",</div><div class='del'>-			 vf-&gt;vf_id, req_queues - cur_queues, tx_rx_queue_left);</div><div class='del'>-		vfres-&gt;num_queue_pairs = min_t(u16, max_allowed_vf_queues,</div><div class='del'>-					       ICE_MAX_RSS_QS_PER_VF);</div><div class='del'>-	} else {</div><div class='del'>-		/* request is successful, then reset VF */</div><div class='del'>-		vf-&gt;num_req_qs = req_queues;</div><div class='del'>-		ice_reset_vf(vf, ICE_VF_RESET_NOTIFY);</div><div class='del'>-		dev_info(dev, "VF %d granted request of %u queues.\n",</div><div class='del'>-			 vf-&gt;vf_id, req_queues);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-error_param:</div><div class='del'>-	/* send the response to the VF */</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES,</div><div class='del'>-				     v_ret, (u8 *)vfres, sizeof(*vfres));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_vf_vlan_offload_ena - determine if capabilities support VLAN offloads</div><div class='ctx'>  * @caps: VF driver negotiated capabilities</div><div class='ctx'>  *</div><div class='hunk'>@@ -2542,7 +1036,7 @@ static bool ice_vf_vlan_offload_ena(u32 caps)</div><div class='ctx'>  * ice_is_vlan_promisc_allowed - check if VLAN promiscuous config is allowed</div><div class='ctx'>  * @vf: VF used to determine if VLAN promiscuous config is allowed</div><div class='ctx'>  */</div><div class='del'>-static bool ice_is_vlan_promisc_allowed(struct ice_vf *vf)</div><div class='add'>+bool ice_is_vlan_promisc_allowed(struct ice_vf *vf)</div><div class='ctx'> {</div><div class='ctx'> 	if ((test_bit(ICE_VF_STATE_UC_PROMISC, vf-&gt;vf_states) ||</div><div class='ctx'> 	     test_bit(ICE_VF_STATE_MC_PROMISC, vf-&gt;vf_states)) &amp;&amp;</div><div class='hunk'>@@ -2554,17 +1048,27 @@ static bool ice_is_vlan_promisc_allowed(struct ice_vf *vf)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ice_vf_ena_vlan_promisc - Enable Tx/Rx VLAN promiscuous for the VLAN</div><div class='add'>+ * @vf: VF to enable VLAN promisc on</div><div class='ctx'>  * @vsi: VF's VSI used to enable VLAN promiscuous mode</div><div class='ctx'>  * @vlan: VLAN used to enable VLAN promiscuous</div><div class='ctx'>  *</div><div class='ctx'>  * This function should only be called if VLAN promiscuous mode is allowed,</div><div class='ctx'>  * which can be determined via ice_is_vlan_promisc_allowed().</div><div class='ctx'>  */</div><div class='del'>-static int ice_vf_ena_vlan_promisc(struct ice_vsi *vsi, struct ice_vlan *vlan)</div><div class='add'>+int ice_vf_ena_vlan_promisc(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='add'>+			    struct ice_vlan *vlan)</div><div class='ctx'> {</div><div class='del'>-	u8 promisc_m = ICE_PROMISC_VLAN_TX | ICE_PROMISC_VLAN_RX;</div><div class='add'>+	u8 promisc_m = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='add'>+	if (test_bit(ICE_VF_STATE_UC_PROMISC, vf-&gt;vf_states))</div><div class='add'>+		promisc_m |= ICE_UCAST_VLAN_PROMISC_BITS;</div><div class='add'>+	if (test_bit(ICE_VF_STATE_MC_PROMISC, vf-&gt;vf_states))</div><div class='add'>+		promisc_m |= ICE_MCAST_VLAN_PROMISC_BITS;</div><div class='add'>+</div><div class='add'>+	if (!promisc_m)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	status = ice_fltr_set_vsi_promisc(&amp;vsi-&gt;back-&gt;hw, vsi-&gt;idx, promisc_m,</div><div class='ctx'> 					  vlan-&gt;vid);</div><div class='ctx'> 	if (status &amp;&amp; status != -EEXIST)</div><div class='hunk'>@@ -2583,7 +1087,7 @@ static int ice_vf_ena_vlan_promisc(struct ice_vsi *vsi, struct ice_vlan *vlan)</div><div class='ctx'>  */</div><div class='ctx'> static int ice_vf_dis_vlan_promisc(struct ice_vsi *vsi, struct ice_vlan *vlan)</div><div class='ctx'> {</div><div class='del'>-	u8 promisc_m = ICE_PROMISC_VLAN_TX | ICE_PROMISC_VLAN_RX;</div><div class='add'>+	u8 promisc_m = ICE_UCAST_VLAN_PROMISC_BITS | ICE_MCAST_VLAN_PROMISC_BITS;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='ctx'> 	status = ice_fltr_clear_vsi_promisc(&amp;vsi-&gt;back-&gt;hw, vsi-&gt;idx, promisc_m,</div><div class='hunk'>@@ -2738,7 +1242,7 @@ static int ice_vc_process_vlan_msg(struct ice_vf *vf, u8 *msg, bool add_v)</div><div class='ctx'> 					goto error_param;</div><div class='ctx'> 				}</div><div class='ctx'> 			} else if (vlan_promisc) {</div><div class='del'>-				status = ice_vf_ena_vlan_promisc(vsi, &amp;vlan);</div><div class='add'>+				status = ice_vf_ena_vlan_promisc(vf, vsi, &amp;vlan);</div><div class='ctx'> 				if (status) {</div><div class='ctx'> 					v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='ctx'> 					dev_err(dev, "Enable Unicast/multicast promiscuous mode on VLAN ID:%d failed error-%d\n",</div><div class='hunk'>@@ -2910,108 +1414,6 @@ error_param:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ice_vc_get_rss_hena - return the RSS HENA bits allowed by the hardware</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- */</div><div class='del'>-static int ice_vc_get_rss_hena(struct ice_vf *vf)</div><div class='del'>-{</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	struct virtchnl_rss_hena *vrh = NULL;</div><div class='del'>-	int len = 0, ret;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_FLAG_RSS_ENA, vf-&gt;pf-&gt;flags)) {</div><div class='del'>-		dev_err(ice_pf_to_dev(vf-&gt;pf), "RSS not supported by PF\n");</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	len = sizeof(struct virtchnl_rss_hena);</div><div class='del'>-	vrh = kzalloc(len, GFP_KERNEL);</div><div class='del'>-	if (!vrh) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_NO_MEMORY;</div><div class='del'>-		len = 0;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vrh-&gt;hena = ICE_DEFAULT_RSS_HENA;</div><div class='del'>-err:</div><div class='del'>-	/* send the response back to the VF */</div><div class='del'>-	ret = ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_RSS_HENA_CAPS, v_ret,</div><div class='del'>-				    (u8 *)vrh, len);</div><div class='del'>-	kfree(vrh);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vc_set_rss_hena - set RSS HENA bits for the VF</div><div class='del'>- * @vf: pointer to the VF info</div><div class='del'>- * @msg: pointer to the msg buffer</div><div class='del'>- */</div><div class='del'>-static int ice_vc_set_rss_hena(struct ice_vf *vf, u8 *msg)</div><div class='del'>-{</div><div class='del'>-	struct virtchnl_rss_hena *vrh = (struct virtchnl_rss_hena *)msg;</div><div class='del'>-	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	struct ice_pf *pf = vf-&gt;pf;</div><div class='del'>-	struct ice_vsi *vsi;</div><div class='del'>-	struct device *dev;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	dev = ice_pf_to_dev(pf);</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!test_bit(ICE_FLAG_RSS_ENA, pf-&gt;flags)) {</div><div class='del'>-		dev_err(dev, "RSS not supported by PF\n");</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	vsi = ice_get_vf_vsi(vf);</div><div class='del'>-	if (!vsi) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* clear all previously programmed RSS configuration to allow VF drivers</div><div class='del'>-	 * the ability to customize the RSS configuration and/or completely</div><div class='del'>-	 * disable RSS</div><div class='del'>-	 */</div><div class='del'>-	status = ice_rem_vsi_rss_cfg(&amp;pf-&gt;hw, vsi-&gt;idx);</div><div class='del'>-	if (status &amp;&amp; !vrh-&gt;hena) {</div><div class='del'>-		/* only report failure to clear the current RSS configuration if</div><div class='del'>-		 * that was clearly the VF's intention (i.e. vrh-&gt;hena = 0)</div><div class='del'>-		 */</div><div class='del'>-		v_ret = ice_err_to_virt_err(status);</div><div class='del'>-		goto err;</div><div class='del'>-	} else if (status) {</div><div class='del'>-		/* allow the VF to update the RSS configuration even on failure</div><div class='del'>-		 * to clear the current RSS confguration in an attempt to keep</div><div class='del'>-		 * RSS in a working state</div><div class='del'>-		 */</div><div class='del'>-		dev_warn(dev, "Failed to clear the RSS configuration for VF %u\n",</div><div class='del'>-			 vf-&gt;vf_id);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (vrh-&gt;hena) {</div><div class='del'>-		status = ice_add_avf_rss_cfg(&amp;pf-&gt;hw, vsi, vrh-&gt;hena);</div><div class='del'>-		v_ret = ice_err_to_virt_err(status);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* send the response to the VF */</div><div class='del'>-err:</div><div class='del'>-	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_SET_RSS_HENA, v_ret,</div><div class='del'>-				     NULL, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * ice_vc_query_rxdid - query RXDID supported by DDP package</div><div class='ctx'>  * @vf: pointer to VF info</div><div class='ctx'>  *</div><div class='hunk'>@@ -3021,12 +1423,8 @@ err:</div><div class='ctx'> static int ice_vc_query_rxdid(struct ice_vf *vf)</div><div class='ctx'> {</div><div class='ctx'> 	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='del'>-	struct virtchnl_supported_rxdids *rxdid = NULL;</div><div class='del'>-	struct ice_hw *hw = &amp;vf-&gt;pf-&gt;hw;</div><div class='ctx'> 	struct ice_pf *pf = vf-&gt;pf;</div><div class='del'>-	int len = 0;</div><div class='del'>-	int ret, i;</div><div class='del'>-	u32 regval;</div><div class='add'>+	u64 rxdid;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states)) {</div><div class='ctx'> 		v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='hunk'>@@ -3038,35 +1436,11 @@ static int ice_vc_query_rxdid(struct ice_vf *vf)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	len = sizeof(struct virtchnl_supported_rxdids);</div><div class='del'>-	rxdid = kzalloc(len, GFP_KERNEL);</div><div class='del'>-	if (!rxdid) {</div><div class='del'>-		v_ret = VIRTCHNL_STATUS_ERR_NO_MEMORY;</div><div class='del'>-		len = 0;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* RXDIDs supported by DDP package can be read from the register</div><div class='del'>-	 * to get the supported RXDID bitmap. But the legacy 32byte RXDID</div><div class='del'>-	 * is not listed in DDP package, add it in the bitmap manually.</div><div class='del'>-	 * Legacy 16byte descriptor is not supported.</div><div class='del'>-	 */</div><div class='del'>-	rxdid-&gt;supported_rxdids |= BIT(ICE_RXDID_LEGACY_1);</div><div class='del'>-</div><div class='del'>-	for (i = ICE_RXDID_FLEX_NIC; i &lt; ICE_FLEX_DESC_RXDID_MAX_NUM; i++) {</div><div class='del'>-		regval = rd32(hw, GLFLXP_RXDID_FLAGS(i, 0));</div><div class='del'>-		if ((regval &gt;&gt; GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S)</div><div class='del'>-			&amp; GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M)</div><div class='del'>-			rxdid-&gt;supported_rxdids |= BIT(i);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pf-&gt;supported_rxdids = rxdid-&gt;supported_rxdids;</div><div class='add'>+	rxdid = pf-&gt;supported_rxdids;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	ret = ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_SUPPORTED_RXDIDS,</div><div class='del'>-				    v_ret, (u8 *)rxdid, len);</div><div class='del'>-	kfree(rxdid);</div><div class='del'>-	return ret;</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_GET_SUPPORTED_RXDIDS,</div><div class='add'>+				     v_ret, (u8 *)&amp;rxdid, sizeof(rxdid));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3575,7 +1949,7 @@ ice_vc_add_vlans(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='ctx'> 				return err;</div><div class='ctx'> </div><div class='ctx'> 			if (vlan_promisc) {</div><div class='del'>-				err = ice_vf_ena_vlan_promisc(vsi, &amp;vlan);</div><div class='add'>+				err = ice_vf_ena_vlan_promisc(vf, vsi, &amp;vlan);</div><div class='ctx'> 				if (err)</div><div class='ctx'> 					return err;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -3603,7 +1977,8 @@ ice_vc_add_vlans(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (!ice_is_dvm_ena(&amp;vsi-&gt;back-&gt;hw)) {</div><div class='ctx'> 				if (vlan_promisc) {</div><div class='del'>-					err = ice_vf_ena_vlan_promisc(vsi, &amp;vlan);</div><div class='add'>+					err = ice_vf_ena_vlan_promisc(vf, vsi,</div><div class='add'>+								      &amp;vlan);</div><div class='ctx'> 					if (err)</div><div class='ctx'> 						return err;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -3794,48 +2169,6 @@ ice_vc_ena_vlan_offload(struct ice_vsi *vsi,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define ICE_L2TSEL_QRX_CONTEXT_REG_IDX	3</div><div class='del'>-#define ICE_L2TSEL_BIT_OFFSET		23</div><div class='del'>-enum ice_l2tsel {</div><div class='del'>-	ICE_L2TSEL_EXTRACT_FIRST_TAG_L2TAG2_2ND,</div><div class='del'>-	ICE_L2TSEL_EXTRACT_FIRST_TAG_L2TAG1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * ice_vsi_update_l2tsel - update l2tsel field for all Rx rings on this VSI</div><div class='del'>- * @vsi: VSI used to update l2tsel on</div><div class='del'>- * @l2tsel: l2tsel setting requested</div><div class='del'>- *</div><div class='del'>- * Use the l2tsel setting to update all of the Rx queue context bits for l2tsel.</div><div class='del'>- * This will modify which descriptor field the first offloaded VLAN will be</div><div class='del'>- * stripped into.</div><div class='del'>- */</div><div class='del'>-static void ice_vsi_update_l2tsel(struct ice_vsi *vsi, enum ice_l2tsel l2tsel)</div><div class='del'>-{</div><div class='del'>-	struct ice_hw *hw = &amp;vsi-&gt;back-&gt;hw;</div><div class='del'>-	u32 l2tsel_bit;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (l2tsel == ICE_L2TSEL_EXTRACT_FIRST_TAG_L2TAG2_2ND)</div><div class='del'>-		l2tsel_bit = 0;</div><div class='del'>-	else</div><div class='del'>-		l2tsel_bit = BIT(ICE_L2TSEL_BIT_OFFSET);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; vsi-&gt;alloc_rxq; i++) {</div><div class='del'>-		u16 pfq = vsi-&gt;rxq_map[i];</div><div class='del'>-		u32 qrx_context_offset;</div><div class='del'>-		u32 regval;</div><div class='del'>-</div><div class='del'>-		qrx_context_offset =</div><div class='del'>-			QRX_CONTEXT(ICE_L2TSEL_QRX_CONTEXT_REG_IDX, pfq);</div><div class='del'>-</div><div class='del'>-		regval = rd32(hw, qrx_context_offset);</div><div class='del'>-		regval &amp;= ~BIT(ICE_L2TSEL_BIT_OFFSET);</div><div class='del'>-		regval |= l2tsel_bit;</div><div class='del'>-		wr32(hw, qrx_context_offset, regval);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * ice_vc_ena_vlan_stripping_v2_msg</div><div class='ctx'>  * @vf: VF the message was received from</div><div class='hunk'>@@ -4109,6 +2442,59 @@ out:</div><div class='ctx'> 				     v_ret, NULL, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ice_vc_get_ptp_cap(struct ice_vf *vf,</div><div class='add'>+			      const struct virtchnl_ptp_caps *msg)</div><div class='add'>+{</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+	u32 caps = VIRTCHNL_1588_PTP_CAP_RX_TSTAMP |</div><div class='add'>+		   VIRTCHNL_1588_PTP_CAP_READ_PHC;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+</div><div class='add'>+	if (msg-&gt;caps &amp; caps)</div><div class='add'>+		vf-&gt;ptp_caps = caps;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* send the response back to the VF */</div><div class='add'>+	return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_1588_PTP_GET_CAPS, v_ret,</div><div class='add'>+				     (u8 *)&amp;vf-&gt;ptp_caps,</div><div class='add'>+				     sizeof(struct virtchnl_ptp_caps));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ice_vc_get_phc_time(struct ice_vf *vf)</div><div class='add'>+{</div><div class='add'>+	enum virtchnl_status_code v_ret = VIRTCHNL_STATUS_ERR_PARAM;</div><div class='add'>+	struct virtchnl_phc_time *phc_time = NULL;</div><div class='add'>+	struct ice_pf *pf = vf-&gt;pf;</div><div class='add'>+	u32 len = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ICE_VF_STATE_ACTIVE, vf-&gt;vf_states))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	v_ret = VIRTCHNL_STATUS_SUCCESS;</div><div class='add'>+</div><div class='add'>+	phc_time = kzalloc(sizeof(*phc_time), GFP_KERNEL);</div><div class='add'>+	if (!phc_time) {</div><div class='add'>+		v_ret = VIRTCHNL_STATUS_ERR_NO_MEMORY;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len = sizeof(*phc_time);</div><div class='add'>+</div><div class='add'>+	phc_time-&gt;time = ice_ptp_read_src_clk_reg(pf, NULL);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* send the response back to the VF */</div><div class='add'>+	ret = ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_1588_PTP_GET_TIME, v_ret,</div><div class='add'>+				    (u8 *)phc_time, len);</div><div class='add'>+	kfree(phc_time);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ice_virtchnl_ops ice_virtchnl_dflt_ops = {</div><div class='ctx'> 	.get_ver_msg = ice_vc_get_ver_msg,</div><div class='ctx'> 	.get_vf_res_msg = ice_vc_get_vf_res_msg,</div><div class='hunk'>@@ -4128,8 +2514,8 @@ static const struct ice_virtchnl_ops ice_virtchnl_dflt_ops = {</div><div class='ctx'> 	.add_vlan_msg = ice_vc_add_vlan_msg,</div><div class='ctx'> 	.remove_vlan_msg = ice_vc_remove_vlan_msg,</div><div class='ctx'> 	.query_rxdid = ice_vc_query_rxdid,</div><div class='del'>-	.get_rss_hena = ice_vc_get_rss_hena,</div><div class='del'>-	.set_rss_hena_msg = ice_vc_set_rss_hena,</div><div class='add'>+	.get_rss_hashcfg = ice_vc_get_rss_hashcfg,</div><div class='add'>+	.set_rss_hashcfg = ice_vc_set_rss_hashcfg,</div><div class='ctx'> 	.ena_vlan_stripping = ice_vc_ena_vlan_stripping,</div><div class='ctx'> 	.dis_vlan_stripping = ice_vc_dis_vlan_stripping,</div><div class='ctx'> 	.handle_rss_cfg_msg = ice_vc_handle_rss_cfg,</div><div class='hunk'>@@ -4145,6 +2531,11 @@ static const struct ice_virtchnl_ops ice_virtchnl_dflt_ops = {</div><div class='ctx'> 	.get_qos_caps = ice_vc_get_qos_caps,</div><div class='ctx'> 	.cfg_q_bw = ice_vc_cfg_q_bw,</div><div class='ctx'> 	.cfg_q_quanta = ice_vc_cfg_q_quanta,</div><div class='add'>+	.get_ptp_cap = ice_vc_get_ptp_cap,</div><div class='add'>+	.get_phc_time = ice_vc_get_phc_time,</div><div class='add'>+	/* If you add a new op here please make sure to add it to</div><div class='add'>+	 * ice_virtchnl_repr_ops as well.</div><div class='add'>+	 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4202,7 +2593,6 @@ static int ice_vc_repr_add_mac(struct ice_vf *vf, u8 *msg)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ice_vfhw_mac_add(vf, &amp;al-&gt;list[i]);</div><div class='del'>-		vf-&gt;num_mac++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4261,8 +2651,8 @@ static const struct ice_virtchnl_ops ice_virtchnl_repr_ops = {</div><div class='ctx'> 	.add_vlan_msg = ice_vc_add_vlan_msg,</div><div class='ctx'> 	.remove_vlan_msg = ice_vc_remove_vlan_msg,</div><div class='ctx'> 	.query_rxdid = ice_vc_query_rxdid,</div><div class='del'>-	.get_rss_hena = ice_vc_get_rss_hena,</div><div class='del'>-	.set_rss_hena_msg = ice_vc_set_rss_hena,</div><div class='add'>+	.get_rss_hashcfg = ice_vc_get_rss_hashcfg,</div><div class='add'>+	.set_rss_hashcfg = ice_vc_set_rss_hashcfg,</div><div class='ctx'> 	.ena_vlan_stripping = ice_vc_ena_vlan_stripping,</div><div class='ctx'> 	.dis_vlan_stripping = ice_vc_dis_vlan_stripping,</div><div class='ctx'> 	.handle_rss_cfg_msg = ice_vc_handle_rss_cfg,</div><div class='hunk'>@@ -4275,6 +2665,11 @@ static const struct ice_virtchnl_ops ice_virtchnl_repr_ops = {</div><div class='ctx'> 	.dis_vlan_stripping_v2_msg = ice_vc_dis_vlan_stripping_v2_msg,</div><div class='ctx'> 	.ena_vlan_insertion_v2_msg = ice_vc_ena_vlan_insertion_v2_msg,</div><div class='ctx'> 	.dis_vlan_insertion_v2_msg = ice_vc_dis_vlan_insertion_v2_msg,</div><div class='add'>+	.get_qos_caps = ice_vc_get_qos_caps,</div><div class='add'>+	.cfg_q_bw = ice_vc_cfg_q_bw,</div><div class='add'>+	.cfg_q_quanta = ice_vc_cfg_q_quanta,</div><div class='add'>+	.get_ptp_cap = ice_vc_get_ptp_cap,</div><div class='add'>+	.get_phc_time = ice_vc_get_phc_time,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4458,11 +2853,11 @@ error_handler:</div><div class='ctx'> 	case VIRTCHNL_OP_GET_SUPPORTED_RXDIDS:</div><div class='ctx'> 		err = ops-&gt;query_rxdid(vf);</div><div class='ctx'> 		break;</div><div class='del'>-	case VIRTCHNL_OP_GET_RSS_HENA_CAPS:</div><div class='del'>-		err = ops-&gt;get_rss_hena(vf);</div><div class='add'>+	case VIRTCHNL_OP_GET_RSS_HASHCFG_CAPS:</div><div class='add'>+		err = ops-&gt;get_rss_hashcfg(vf);</div><div class='ctx'> 		break;</div><div class='del'>-	case VIRTCHNL_OP_SET_RSS_HENA:</div><div class='del'>-		err = ops-&gt;set_rss_hena_msg(vf, msg);</div><div class='add'>+	case VIRTCHNL_OP_SET_RSS_HASHCFG:</div><div class='add'>+		err = ops-&gt;set_rss_hashcfg(vf, msg);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:</div><div class='ctx'> 		err = ops-&gt;ena_vlan_stripping(vf);</div><div class='hunk'>@@ -4512,6 +2907,12 @@ error_handler:</div><div class='ctx'> 	case VIRTCHNL_OP_CONFIG_QUANTA:</div><div class='ctx'> 		err = ops-&gt;cfg_q_quanta(vf, msg);</div><div class='ctx'> 		break;</div><div class='add'>+	case VIRTCHNL_OP_1588_PTP_GET_CAPS:</div><div class='add'>+		err = ops-&gt;get_ptp_cap(vf, (const void *)msg);</div><div class='add'>+		break;</div><div class='add'>+	case VIRTCHNL_OP_1588_PTP_GET_TIME:</div><div class='add'>+		err = ops-&gt;get_phc_time(vf);</div><div class='add'>+		break;</div><div class='ctx'> 	case VIRTCHNL_OP_UNKNOWN:</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(dev, "Unsupported opcode %d from VF %d\n", v_opcode,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl.h b/drivers/net/ethernet/intel/ice/virt/virtchnl.h<br/>index 0c629aef9baf..71bb456e2d71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/ice_virtchnl.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ice/ice_virtchnl.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ice/virt/virtchnl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ice/virt/virtchnl.h</a></div><div class='hunk'>@@ -26,6 +26,9 @@</div><div class='ctx'> #define ICE_MAX_MACADDR_PER_VF		18</div><div class='ctx'> #define ICE_FLEX_DESC_RXDID_MAX_NUM	64</div><div class='ctx'> </div><div class='add'>+/* Priority to be compared against previous priority from the pipe */</div><div class='add'>+#define ICE_RXDID_PRIO			0x03</div><div class='add'>+</div><div class='ctx'> /* VFs only get a single VSI. For ice hardware, the VF does not need to know</div><div class='ctx'>  * its VSI index. However, the virtchnl interface requires a VSI number,</div><div class='ctx'>  * mainly due to legacy hardware.</div><div class='hunk'>@@ -54,8 +57,8 @@ struct ice_virtchnl_ops {</div><div class='ctx'> 	int (*add_vlan_msg)(struct ice_vf *vf, u8 *msg);</div><div class='ctx'> 	int (*remove_vlan_msg)(struct ice_vf *vf, u8 *msg);</div><div class='ctx'> 	int (*query_rxdid)(struct ice_vf *vf);</div><div class='del'>-	int (*get_rss_hena)(struct ice_vf *vf);</div><div class='del'>-	int (*set_rss_hena_msg)(struct ice_vf *vf, u8 *msg);</div><div class='add'>+	int (*get_rss_hashcfg)(struct ice_vf *vf);</div><div class='add'>+	int (*set_rss_hashcfg)(struct ice_vf *vf, u8 *msg);</div><div class='ctx'> 	int (*ena_vlan_stripping)(struct ice_vf *vf);</div><div class='ctx'> 	int (*dis_vlan_stripping)(struct ice_vf *vf);</div><div class='ctx'> 	int (*handle_rss_cfg_msg)(struct ice_vf *vf, u8 *msg, bool add);</div><div class='hunk'>@@ -72,6 +75,9 @@ struct ice_virtchnl_ops {</div><div class='ctx'> 	int (*cfg_q_tc_map)(struct ice_vf *vf, u8 *msg);</div><div class='ctx'> 	int (*cfg_q_bw)(struct ice_vf *vf, u8 *msg);</div><div class='ctx'> 	int (*cfg_q_quanta)(struct ice_vf *vf, u8 *msg);</div><div class='add'>+	int (*get_ptp_cap)(struct ice_vf *vf,</div><div class='add'>+			   const struct virtchnl_ptp_caps *msg);</div><div class='add'>+	int (*get_phc_time)(struct ice_vf *vf);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='hunk'>@@ -86,12 +92,31 @@ ice_vc_send_msg_to_vf(struct ice_vf *vf, u32 v_opcode,</div><div class='ctx'> bool ice_vc_isvalid_vsi_id(struct ice_vf *vf, u16 vsi_id);</div><div class='ctx'> void ice_vc_process_vf_msg(struct ice_pf *pf, struct ice_rq_event_info *event,</div><div class='ctx'> 			   struct ice_mbx_data *mbxdata);</div><div class='add'>+void ice_vf_ena_rxq_interrupt(struct ice_vsi *vsi, u32 q_idx);</div><div class='add'>+void ice_vf_ena_txq_interrupt(struct ice_vsi *vsi, u32 q_idx);</div><div class='add'>+int ice_vf_ena_vlan_promisc(struct ice_vf *vf, struct ice_vsi *vsi,</div><div class='add'>+			    struct ice_vlan *vlan);</div><div class='add'>+bool ice_is_vlan_promisc_allowed(struct ice_vf *vf);</div><div class='ctx'> #else /* CONFIG_PCI_IOV */</div><div class='ctx'> static inline void ice_virtchnl_set_dflt_ops(struct ice_vf *vf) { }</div><div class='ctx'> static inline void ice_virtchnl_set_repr_ops(struct ice_vf *vf) { }</div><div class='ctx'> static inline void ice_vc_notify_vf_link_state(struct ice_vf *vf) { }</div><div class='ctx'> static inline void ice_vc_notify_link_state(struct ice_pf *pf) { }</div><div class='ctx'> static inline void ice_vc_notify_reset(struct ice_pf *pf) { }</div><div class='add'>+static inline void ice_vf_ena_rxq_interrupt(struct ice_vsi *vsi, u32 q_idx) { }</div><div class='add'>+static inline void ice_vf_ena_txq_interrupt(struct ice_vsi *vsi, u32 q_idx) { }</div><div class='add'>+</div><div class='add'>+static inline int ice_vf_ena_vlan_promisc(struct ice_vf *vf,</div><div class='add'>+					  struct ice_vsi *vsi,</div><div class='add'>+					  struct ice_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ice_is_vlan_promisc_allowed(struct ice_vf *vf)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='ctx'> ice_vc_send_msg_to_vf(struct ice_vf *vf, u32 v_opcode,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/Kconfig b/drivers/net/ethernet/intel/idpf/Kconfig<br/>index 1addd663acad..adab2154125b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/Kconfig</a></div><div class='hunk'>@@ -4,8 +4,9 @@</div><div class='ctx'> config IDPF</div><div class='ctx'> 	tristate "Intel(R) Infrastructure Data Path Function Support"</div><div class='ctx'> 	depends on PCI_MSI</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select DIMLIB</div><div class='del'>-	select LIBETH</div><div class='add'>+	select LIBETH_XDP</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Intel(R) Infrastructure Data Path Function</div><div class='ctx'> 	  devices.</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/Makefile b/drivers/net/ethernet/intel/idpf/Makefile<br/>index 2ce01a0b5898..651ddee942bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/Makefile</a></div><div class='hunk'>@@ -10,6 +10,7 @@ idpf-y := \</div><div class='ctx'> 	idpf_controlq_setup.o	\</div><div class='ctx'> 	idpf_dev.o		\</div><div class='ctx'> 	idpf_ethtool.o		\</div><div class='add'>+	idpf_idc.o		\</div><div class='ctx'> 	idpf_lib.o		\</div><div class='ctx'> 	idpf_main.o		\</div><div class='ctx'> 	idpf_txrx.o		\</div><div class='hunk'>@@ -17,3 +18,9 @@ idpf-y := \</div><div class='ctx'> 	idpf_vf_dev.o</div><div class='ctx'> </div><div class='ctx'> idpf-$(CONFIG_IDPF_SINGLEQ)	+= idpf_singleq_txrx.o</div><div class='add'>+</div><div class='add'>+idpf-$(CONFIG_PTP_1588_CLOCK)	+= idpf_ptp.o</div><div class='add'>+idpf-$(CONFIG_PTP_1588_CLOCK)	+= idpf_virtchnl_ptp.o</div><div class='add'>+</div><div class='add'>+idpf-y				+= xdp.o</div><div class='add'>+idpf-y				+= xsk.o</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf.h b/drivers/net/ethernet/intel/idpf/idpf.h<br/>index 2c31ad87587a..8cfc68cbfa06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf.h</a></div><div class='hunk'>@@ -12,12 +12,16 @@ struct idpf_vport_max_q;</div><div class='ctx'> #include &lt;net/pkt_sched.h&gt;</div><div class='ctx'> #include &lt;linux/aer.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/sctp.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool_netlink.h&gt;</div><div class='ctx'> #include &lt;net/gro.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/net/intel/iidc_rdma.h&gt;</div><div class='add'>+#include &lt;linux/net/intel/iidc_rdma_idpf.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "virtchnl2.h"</div><div class='ctx'> #include "idpf_txrx.h"</div><div class='ctx'> #include "idpf_controlq.h"</div><div class='hunk'>@@ -36,6 +40,7 @@ struct idpf_vport_max_q;</div><div class='ctx'> #define IDPF_NUM_CHUNKS_PER_MSG(struct_sz, chunk_sz)	\</div><div class='ctx'> 	((IDPF_CTLQ_MAX_BUF_LEN - (struct_sz)) / (chunk_sz))</div><div class='ctx'> </div><div class='add'>+#define IDPF_WAIT_FOR_MARKER_TIMEO	500</div><div class='ctx'> #define IDPF_MAX_WAIT			500</div><div class='ctx'> </div><div class='ctx'> /* available message levels */</div><div class='hunk'>@@ -126,14 +131,12 @@ enum idpf_cap_field {</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * enum idpf_vport_state - Current vport state</div><div class='del'>- * @__IDPF_VPORT_DOWN: Vport is down</div><div class='del'>- * @__IDPF_VPORT_UP: Vport is up</div><div class='del'>- * @__IDPF_VPORT_STATE_LAST: Must be last, number of states</div><div class='add'>+ * @IDPF_VPORT_UP: Vport is up</div><div class='add'>+ * @IDPF_VPORT_STATE_NBITS: Must be last, number of states</div><div class='ctx'>  */</div><div class='ctx'> enum idpf_vport_state {</div><div class='del'>-	__IDPF_VPORT_DOWN,</div><div class='del'>-	__IDPF_VPORT_UP,</div><div class='del'>-	__IDPF_VPORT_STATE_LAST,</div><div class='add'>+	IDPF_VPORT_UP,</div><div class='add'>+	IDPF_VPORT_STATE_NBITS</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -141,7 +144,10 @@ enum idpf_vport_state {</div><div class='ctx'>  * @adapter: Adapter back pointer</div><div class='ctx'>  * @vport: Vport back pointer</div><div class='ctx'>  * @vport_id: Vport identifier</div><div class='add'>+ * @link_speed_mbps: Link speed in mbps</div><div class='ctx'>  * @vport_idx: Relative vport index</div><div class='add'>+ * @max_tx_hdr_size: Max header length hardware can support</div><div class='add'>+ * @tx_max_bufs: Max buffers that can be transmitted with scatter-gather</div><div class='ctx'>  * @state: See enum idpf_vport_state</div><div class='ctx'>  * @netstats: Packet and byte stats</div><div class='ctx'>  * @stats_lock: Lock to protect stats update</div><div class='hunk'>@@ -150,8 +156,11 @@ struct idpf_netdev_priv {</div><div class='ctx'> 	struct idpf_adapter *adapter;</div><div class='ctx'> 	struct idpf_vport *vport;</div><div class='ctx'> 	u32 vport_id;</div><div class='add'>+	u32 link_speed_mbps;</div><div class='ctx'> 	u16 vport_idx;</div><div class='del'>-	enum idpf_vport_state state;</div><div class='add'>+	u16 max_tx_hdr_size;</div><div class='add'>+	u16 tx_max_bufs;</div><div class='add'>+	DECLARE_BITMAP(state, IDPF_VPORT_STATE_NBITS);</div><div class='ctx'> 	struct rtnl_link_stats64 netstats;</div><div class='ctx'> 	spinlock_t stats_lock;</div><div class='ctx'> };</div><div class='hunk'>@@ -187,22 +196,38 @@ struct idpf_vport_max_q {</div><div class='ctx'>  * @mb_intr_reg_init: Mailbox interrupt register initialization</div><div class='ctx'>  * @reset_reg_init: Reset register initialization</div><div class='ctx'>  * @trigger_reset: Trigger a reset to occur</div><div class='add'>+ * @ptp_reg_init: PTP register initialization</div><div class='ctx'>  */</div><div class='ctx'> struct idpf_reg_ops {</div><div class='del'>-	void (*ctlq_reg_init)(struct idpf_ctlq_create_info *cq);</div><div class='add'>+	void (*ctlq_reg_init)(struct idpf_adapter *adapter,</div><div class='add'>+			      struct idpf_ctlq_create_info *cq);</div><div class='ctx'> 	int (*intr_reg_init)(struct idpf_vport *vport);</div><div class='ctx'> 	void (*mb_intr_reg_init)(struct idpf_adapter *adapter);</div><div class='ctx'> 	void (*reset_reg_init)(struct idpf_adapter *adapter);</div><div class='ctx'> 	void (*trigger_reset)(struct idpf_adapter *adapter,</div><div class='ctx'> 			      enum idpf_flags trig_cause);</div><div class='add'>+	void (*ptp_reg_init)(const struct idpf_adapter *adapter);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define IDPF_MMIO_REG_NUM_STATIC	2</div><div class='add'>+#define IDPF_PF_MBX_REGION_SZ		4096</div><div class='add'>+#define IDPF_PF_RSTAT_REGION_SZ		2048</div><div class='add'>+#define IDPF_VF_MBX_REGION_SZ		10240</div><div class='add'>+#define IDPF_VF_RSTAT_REGION_SZ		2048</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct idpf_dev_ops - Device specific operations</div><div class='ctx'>  * @reg_ops: Register operations</div><div class='add'>+ * @idc_init: IDC initialization</div><div class='add'>+ * @static_reg_info: array of mailbox and rstat register info</div><div class='ctx'>  */</div><div class='ctx'> struct idpf_dev_ops {</div><div class='ctx'> 	struct idpf_reg_ops reg_ops;</div><div class='add'>+</div><div class='add'>+	int (*idc_init)(struct idpf_adapter *adapter);</div><div class='add'>+</div><div class='add'>+	/* static_reg_info[0] is mailbox region, static_reg_info[1] is rstat */</div><div class='add'>+	struct resource static_reg_info[IDPF_MMIO_REG_NUM_STATIC];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -222,16 +247,28 @@ enum idpf_vport_reset_cause {</div><div class='ctx'> /**</div><div class='ctx'>  * enum idpf_vport_flags - Vport flags</div><div class='ctx'>  * @IDPF_VPORT_DEL_QUEUES: To send delete queues message</div><div class='del'>- * @IDPF_VPORT_SW_MARKER: Indicate TX pipe drain software marker packets</div><div class='del'>- *			  processing is done</div><div class='ctx'>  * @IDPF_VPORT_FLAGS_NBITS: Must be last</div><div class='ctx'>  */</div><div class='ctx'> enum idpf_vport_flags {</div><div class='ctx'> 	IDPF_VPORT_DEL_QUEUES,</div><div class='del'>-	IDPF_VPORT_SW_MARKER,</div><div class='ctx'> 	IDPF_VPORT_FLAGS_NBITS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * struct idpf_tstamp_stats - Tx timestamp statistics</div><div class='add'>+ * @stats_sync: See struct u64_stats_sync</div><div class='add'>+ * @packets: Number of packets successfully timestamped by the hardware</div><div class='add'>+ * @discarded: Number of Tx skbs discarded due to cached PHC</div><div class='add'>+ *	       being too old to correctly extend timestamp</div><div class='add'>+ * @flushed: Number of Tx skbs flushed due to interface closed</div><div class='add'>+ */</div><div class='add'>+struct idpf_tstamp_stats {</div><div class='add'>+	struct u64_stats_sync stats_sync;</div><div class='add'>+	u64_stats_t packets;</div><div class='add'>+	u64_stats_t discarded;</div><div class='add'>+	u64_stats_t flushed;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct idpf_port_stats {</div><div class='ctx'> 	struct u64_stats_sync stats_sync;</div><div class='ctx'> 	u64_stats_t rx_hw_csum_err;</div><div class='hunk'>@@ -245,6 +282,12 @@ struct idpf_port_stats {</div><div class='ctx'> 	struct virtchnl2_vport_stats vport_stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct idpf_fsteer_fltr {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	u32 loc;</div><div class='add'>+	u32 q_index;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct idpf_vport - Handle for netdevices and queue resources</div><div class='ctx'>  * @num_txq: Number of allocated TX queues</div><div class='hunk'>@@ -257,6 +300,10 @@ struct idpf_port_stats {</div><div class='ctx'>  * @txq_model: Split queue or single queue queuing model</div><div class='ctx'>  * @txqs: Used only in hotpath to get to the right queue very fast</div><div class='ctx'>  * @crc_enable: Enable CRC insertion offload</div><div class='add'>+ * @xdpsq_share: whether XDPSQ sharing is enabled</div><div class='add'>+ * @num_xdp_txq: number of XDPSQs</div><div class='add'>+ * @xdp_txq_offset: index of the first XDPSQ (== number of regular SQs)</div><div class='add'>+ * @xdp_prog: installed XDP program</div><div class='ctx'>  * @num_rxq: Number of allocated RX queues</div><div class='ctx'>  * @num_bufq: Number of allocated buffer queues</div><div class='ctx'>  * @rxq_desc_count: RX queue descriptor count. *MUST* have enough descriptors</div><div class='hunk'>@@ -269,6 +316,7 @@ struct idpf_port_stats {</div><div class='ctx'>  *	      group will yield total number of RX queues.</div><div class='ctx'>  * @rxq_model: Splitq queue or single queue queuing model</div><div class='ctx'>  * @rx_ptype_lkup: Lookup table for ptypes on RX</div><div class='add'>+ * @vdev_info: IDC vport device info pointer</div><div class='ctx'>  * @adapter: back pointer to associated adapter</div><div class='ctx'>  * @netdev: Associated net_device. Each vport should have one and only one</div><div class='ctx'>  *	    associated netdev.</div><div class='hunk'>@@ -281,14 +329,19 @@ struct idpf_port_stats {</div><div class='ctx'>  * @num_q_vectors: Number of IRQ vectors allocated</div><div class='ctx'>  * @q_vectors: Array of queue vectors</div><div class='ctx'>  * @q_vector_idxs: Starting index of queue vectors</div><div class='add'>+ * @noirq_dyn_ctl: register to enable/disable the vector for NOIRQ queues</div><div class='add'>+ * @noirq_dyn_ctl_ena: value to write to the above to enable it</div><div class='add'>+ * @noirq_v_idx: ID of the NOIRQ vector</div><div class='ctx'>  * @max_mtu: device given max possible MTU</div><div class='ctx'>  * @default_mac_addr: device will give a default MAC to use</div><div class='ctx'>  * @rx_itr_profile: RX profiles for Dynamic Interrupt Moderation</div><div class='ctx'>  * @tx_itr_profile: TX profiles for Dynamic Interrupt Moderation</div><div class='ctx'>  * @port_stats: per port csum, header split, and other offload stats</div><div class='ctx'>  * @link_up: True if link is up</div><div class='del'>- * @link_speed_mbps: Link speed in mbps</div><div class='del'>- * @sw_marker_wq: workqueue for marker packets</div><div class='add'>+ * @tx_tstamp_caps: Capabilities negotiated for Tx timestamping</div><div class='add'>+ * @tstamp_config: The Tx tstamp config</div><div class='add'>+ * @tstamp_task: Tx timestamping task</div><div class='add'>+ * @tstamp_stats: Tx timestamping statistics</div><div class='ctx'>  */</div><div class='ctx'> struct idpf_vport {</div><div class='ctx'> 	u16 num_txq;</div><div class='hunk'>@@ -302,6 +355,11 @@ struct idpf_vport {</div><div class='ctx'> 	struct idpf_tx_queue **txqs;</div><div class='ctx'> 	bool crc_enable;</div><div class='ctx'> </div><div class='add'>+	bool xdpsq_share;</div><div class='add'>+	u16 num_xdp_txq;</div><div class='add'>+	u16 xdp_txq_offset;</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='add'>+</div><div class='ctx'> 	u16 num_rxq;</div><div class='ctx'> 	u16 num_bufq;</div><div class='ctx'> 	u32 rxq_desc_count;</div><div class='hunk'>@@ -312,6 +370,8 @@ struct idpf_vport {</div><div class='ctx'> 	u32 rxq_model;</div><div class='ctx'> 	struct libeth_rx_pt *rx_ptype_lkup;</div><div class='ctx'> </div><div class='add'>+	struct iidc_rdma_vport_dev_info *vdev_info;</div><div class='add'>+</div><div class='ctx'> 	struct idpf_adapter *adapter;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	DECLARE_BITMAP(flags, IDPF_VPORT_FLAGS_NBITS);</div><div class='hunk'>@@ -324,6 +384,11 @@ struct idpf_vport {</div><div class='ctx'> 	u16 num_q_vectors;</div><div class='ctx'> 	struct idpf_q_vector *q_vectors;</div><div class='ctx'> 	u16 *q_vector_idxs;</div><div class='add'>+</div><div class='add'>+	void __iomem *noirq_dyn_ctl;</div><div class='add'>+	u32 noirq_dyn_ctl_ena;</div><div class='add'>+	u16 noirq_v_idx;</div><div class='add'>+</div><div class='ctx'> 	u16 max_mtu;</div><div class='ctx'> 	u8 default_mac_addr[ETH_ALEN];</div><div class='ctx'> 	u16 rx_itr_profile[IDPF_DIM_PROFILE_SLOTS];</div><div class='hunk'>@@ -331,9 +396,11 @@ struct idpf_vport {</div><div class='ctx'> 	struct idpf_port_stats port_stats;</div><div class='ctx'> </div><div class='ctx'> 	bool link_up;</div><div class='del'>-	u32 link_speed_mbps;</div><div class='ctx'> </div><div class='del'>-	wait_queue_head_t sw_marker_wq;</div><div class='add'>+	struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='add'>+	struct work_struct tstamp_task;</div><div class='add'>+	struct idpf_tstamp_stats tstamp_stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -368,28 +435,53 @@ struct idpf_rss_data {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * struct idpf_q_coalesce - User defined coalescing configuration values for</div><div class='add'>+ *			   a single queue.</div><div class='add'>+ * @tx_intr_mode: Dynamic TX ITR or not</div><div class='add'>+ * @rx_intr_mode: Dynamic RX ITR or not</div><div class='add'>+ * @tx_coalesce_usecs: TX interrupt throttling rate</div><div class='add'>+ * @rx_coalesce_usecs: RX interrupt throttling rate</div><div class='add'>+ *</div><div class='add'>+ * Used to restore user coalescing configuration after a reset.</div><div class='add'>+ */</div><div class='add'>+struct idpf_q_coalesce {</div><div class='add'>+	u32 tx_intr_mode;</div><div class='add'>+	u32 rx_intr_mode;</div><div class='add'>+	u32 tx_coalesce_usecs;</div><div class='add'>+	u32 rx_coalesce_usecs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * struct idpf_vport_user_config_data - User defined configuration values for</div><div class='ctx'>  *					each vport.</div><div class='ctx'>  * @rss_data: See struct idpf_rss_data</div><div class='add'>+ * @q_coalesce: Array of per queue coalescing data</div><div class='ctx'>  * @num_req_tx_qs: Number of user requested TX queues through ethtool</div><div class='ctx'>  * @num_req_rx_qs: Number of user requested RX queues through ethtool</div><div class='ctx'>  * @num_req_txq_desc: Number of user requested TX queue descriptors through</div><div class='ctx'>  *		      ethtool</div><div class='ctx'>  * @num_req_rxq_desc: Number of user requested RX queue descriptors through</div><div class='ctx'>  *		      ethtool</div><div class='add'>+ * @xdp_prog: requested XDP program to install</div><div class='ctx'>  * @user_flags: User toggled config flags</div><div class='ctx'>  * @mac_filter_list: List of MAC filters</div><div class='add'>+ * @num_fsteer_fltrs: number of flow steering filters</div><div class='add'>+ * @flow_steer_list: list of flow steering filters</div><div class='ctx'>  *</div><div class='ctx'>  * Used to restore configuration after a reset as the vport will get wiped.</div><div class='ctx'>  */</div><div class='ctx'> struct idpf_vport_user_config_data {</div><div class='ctx'> 	struct idpf_rss_data rss_data;</div><div class='add'>+	struct idpf_q_coalesce *q_coalesce;</div><div class='ctx'> 	u16 num_req_tx_qs;</div><div class='ctx'> 	u16 num_req_rx_qs;</div><div class='ctx'> 	u32 num_req_txq_desc;</div><div class='ctx'> 	u32 num_req_rxq_desc;</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='ctx'> 	DECLARE_BITMAP(user_flags, __IDPF_USER_FLAGS_NBITS);</div><div class='ctx'> 	struct list_head mac_filter_list;</div><div class='add'>+	u32 num_fsteer_fltrs;</div><div class='add'>+	struct list_head flow_steer_list;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -478,6 +570,13 @@ struct idpf_vport_config {</div><div class='ctx'> </div><div class='ctx'> struct idpf_vc_xn_manager;</div><div class='ctx'> </div><div class='add'>+#define idpf_for_each_vport(adapter, iter) \</div><div class='add'>+	for (struct idpf_vport **__##iter = &amp;(adapter)-&gt;vports[0], \</div><div class='add'>+	     *iter = (adapter)-&gt;max_vports ? *__##iter : NULL; \</div><div class='add'>+	     iter; \</div><div class='add'>+	     iter = (++__##iter) &lt; &amp;(adapter)-&gt;vports[(adapter)-&gt;max_vports] ? \</div><div class='add'>+	     *__##iter : NULL)</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct idpf_adapter - Device data struct generated on probe</div><div class='ctx'>  * @pdev: PCI device struct given on probe</div><div class='hunk'>@@ -489,10 +588,11 @@ struct idpf_vc_xn_manager;</div><div class='ctx'>  * @flags: See enum idpf_flags</div><div class='ctx'>  * @reset_reg: See struct idpf_reset_reg</div><div class='ctx'>  * @hw: Device access data</div><div class='del'>- * @num_req_msix: Requested number of MSIX vectors</div><div class='ctx'>  * @num_avail_msix: Available number of MSIX vectors</div><div class='ctx'>  * @num_msix_entries: Number of entries in MSIX table</div><div class='ctx'>  * @msix_entries: MSIX table</div><div class='add'>+ * @num_rdma_msix_entries: Available number of MSIX vectors for RDMA</div><div class='add'>+ * @rdma_msix_entries: RDMA MSIX table</div><div class='ctx'>  * @req_vec_chunks: Requested vector chunk data</div><div class='ctx'>  * @mb_vector: Mailbox vector data</div><div class='ctx'>  * @vector_stack: Stack to store the msix vector indexes</div><div class='hunk'>@@ -521,6 +621,7 @@ struct idpf_vc_xn_manager;</div><div class='ctx'>  * @caps: Negotiated capabilities with device</div><div class='ctx'>  * @vcxn_mngr: Virtchnl transaction manager</div><div class='ctx'>  * @dev_ops: See idpf_dev_ops</div><div class='add'>+ * @cdev_info: IDC core device info pointer</div><div class='ctx'>  * @num_vfs: Number of allocated VFs through sysfs. PF does not directly talk</div><div class='ctx'>  *	     to VFs but is used to initialize them</div><div class='ctx'>  * @crc_enable: Enable CRC insertion offload</div><div class='hunk'>@@ -530,6 +631,7 @@ struct idpf_vc_xn_manager;</div><div class='ctx'>  * @vector_lock: Lock to protect vector distribution</div><div class='ctx'>  * @queue_lock: Lock to protect queue distribution</div><div class='ctx'>  * @vc_buf_lock: Lock to protect virtchnl buffer</div><div class='add'>+ * @ptp: Storage for PTP-related data</div><div class='ctx'>  */</div><div class='ctx'> struct idpf_adapter {</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='hunk'>@@ -542,10 +644,11 @@ struct idpf_adapter {</div><div class='ctx'> 	DECLARE_BITMAP(flags, IDPF_FLAGS_NBITS);</div><div class='ctx'> 	struct idpf_reset_reg reset_reg;</div><div class='ctx'> 	struct idpf_hw hw;</div><div class='del'>-	u16 num_req_msix;</div><div class='ctx'> 	u16 num_avail_msix;</div><div class='ctx'> 	u16 num_msix_entries;</div><div class='ctx'> 	struct msix_entry *msix_entries;</div><div class='add'>+	u16 num_rdma_msix_entries;</div><div class='add'>+	struct msix_entry *rdma_msix_entries;</div><div class='ctx'> 	struct virtchnl2_alloc_vectors *req_vec_chunks;</div><div class='ctx'> 	struct idpf_q_vector mb_vector;</div><div class='ctx'> 	struct idpf_vector_lifo vector_stack;</div><div class='hunk'>@@ -578,6 +681,7 @@ struct idpf_adapter {</div><div class='ctx'> 	struct idpf_vc_xn_manager *vcxn_mngr;</div><div class='ctx'> </div><div class='ctx'> 	struct idpf_dev_ops dev_ops;</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev_info;</div><div class='ctx'> 	int num_vfs;</div><div class='ctx'> 	bool crc_enable;</div><div class='ctx'> 	bool req_tx_splitq;</div><div class='hunk'>@@ -587,6 +691,8 @@ struct idpf_adapter {</div><div class='ctx'> 	struct mutex vector_lock;</div><div class='ctx'> 	struct mutex queue_lock;</div><div class='ctx'> 	struct mutex vc_buf_lock;</div><div class='add'>+</div><div class='add'>+	struct idpf_ptp *ptp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -601,6 +707,11 @@ static inline int idpf_is_queue_model_split(u16 q_model)</div><div class='ctx'> 	       q_model == VIRTCHNL2_QUEUE_MODEL_SPLIT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool idpf_xdp_enabled(const struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	return vport-&gt;adapter &amp;&amp; vport-&gt;xdp_prog;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define idpf_is_cap_ena(adapter, field, flag) \</div><div class='ctx'> 	idpf_is_capability_ena(adapter, false, field, flag)</div><div class='ctx'> #define idpf_is_cap_ena_all(adapter, field, flag) \</div><div class='hunk'>@@ -609,17 +720,26 @@ static inline int idpf_is_queue_model_split(u16 q_model)</div><div class='ctx'> bool idpf_is_capability_ena(struct idpf_adapter *adapter, bool all,</div><div class='ctx'> 			    enum idpf_cap_field field, u64 flag);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * idpf_is_rdma_cap_ena - Determine if RDMA is supported</div><div class='add'>+ * @adapter: private data struct</div><div class='add'>+ *</div><div class='add'>+ * Return: true if RDMA capability is enabled, false otherwise</div><div class='add'>+ */</div><div class='add'>+static inline bool idpf_is_rdma_cap_ena(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return idpf_is_cap_ena(adapter, IDPF_OTHER_CAPS, VIRTCHNL2_CAP_RDMA);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define IDPF_CAP_RSS (\</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_TCP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_TCP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_UDP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_SCTP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_OTHER	|\</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_TCP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_TCP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_UDP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_SCTP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_OTHER)</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_TCP		|\</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_UDP		|\</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_SCTP	|\</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_OTHER	|\</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_TCP		|\</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_UDP		|\</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_SCTP	|\</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_OTHER)</div><div class='ctx'> </div><div class='ctx'> #define IDPF_CAP_RSC (\</div><div class='ctx'> 	VIRTCHNL2_CAP_RSC_IPV4_TCP	|\</div><div class='hunk'>@@ -629,13 +749,13 @@ bool idpf_is_capability_ena(struct idpf_adapter *adapter, bool all,</div><div class='ctx'> 	VIRTCHNL2_CAP_RX_HSPLIT_AT_L4V4	|\</div><div class='ctx'> 	VIRTCHNL2_CAP_RX_HSPLIT_AT_L4V6)</div><div class='ctx'> </div><div class='del'>-#define IDPF_CAP_RX_CSUM_L4V4 (\</div><div class='del'>-	VIRTCHNL2_CAP_RX_CSUM_L4_IPV4_TCP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RX_CSUM_L4_IPV4_UDP)</div><div class='add'>+#define IDPF_CAP_TX_CSUM_L4V4 (\</div><div class='add'>+	VIRTCHNL2_CAP_TX_CSUM_L4_IPV4_TCP	|\</div><div class='add'>+	VIRTCHNL2_CAP_TX_CSUM_L4_IPV4_UDP)</div><div class='ctx'> </div><div class='del'>-#define IDPF_CAP_RX_CSUM_L4V6 (\</div><div class='del'>-	VIRTCHNL2_CAP_RX_CSUM_L4_IPV6_TCP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RX_CSUM_L4_IPV6_UDP)</div><div class='add'>+#define IDPF_CAP_TX_CSUM_L4V6 (\</div><div class='add'>+	VIRTCHNL2_CAP_TX_CSUM_L4_IPV6_TCP	|\</div><div class='add'>+	VIRTCHNL2_CAP_TX_CSUM_L4_IPV6_UDP)</div><div class='ctx'> </div><div class='ctx'> #define IDPF_CAP_RX_CSUM (\</div><div class='ctx'> 	VIRTCHNL2_CAP_RX_CSUM_L3_IPV4		|\</div><div class='hunk'>@@ -644,11 +764,9 @@ bool idpf_is_capability_ena(struct idpf_adapter *adapter, bool all,</div><div class='ctx'> 	VIRTCHNL2_CAP_RX_CSUM_L4_IPV6_TCP	|\</div><div class='ctx'> 	VIRTCHNL2_CAP_RX_CSUM_L4_IPV6_UDP)</div><div class='ctx'> </div><div class='del'>-#define IDPF_CAP_SCTP_CSUM (\</div><div class='add'>+#define IDPF_CAP_TX_SCTP_CSUM (\</div><div class='ctx'> 	VIRTCHNL2_CAP_TX_CSUM_L4_IPV4_SCTP	|\</div><div class='del'>-	VIRTCHNL2_CAP_TX_CSUM_L4_IPV6_SCTP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RX_CSUM_L4_IPV4_SCTP	|\</div><div class='del'>-	VIRTCHNL2_CAP_RX_CSUM_L4_IPV6_SCTP)</div><div class='add'>+	VIRTCHNL2_CAP_TX_CSUM_L4_IPV6_SCTP)</div><div class='ctx'> </div><div class='ctx'> #define IDPF_CAP_TUNNEL_TX_CSUM (\</div><div class='ctx'> 	VIRTCHNL2_CAP_TX_CSUM_L3_SINGLE_TUNNEL	|\</div><div class='hunk'>@@ -664,6 +782,17 @@ static inline u16 idpf_get_reserved_vecs(struct idpf_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * idpf_get_reserved_rdma_vecs - Get reserved RDMA vectors</div><div class='add'>+ * @adapter: private data struct</div><div class='add'>+ *</div><div class='add'>+ * Return: number of vectors reserved for RDMA</div><div class='add'>+ */</div><div class='add'>+static inline u16 idpf_get_reserved_rdma_vecs(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return le16_to_cpu(adapter-&gt;caps.num_rdma_allocated_vectors);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * idpf_get_default_vports - Get default number of vports</div><div class='ctx'>  * @adapter: private data struct</div><div class='ctx'>  */</div><div class='hunk'>@@ -702,6 +831,34 @@ static inline u8 idpf_get_min_tx_pkt_len(struct idpf_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * idpf_get_mbx_reg_addr - Get BAR0 mailbox register address</div><div class='add'>+ * @adapter: private data struct</div><div class='add'>+ * @reg_offset: register offset value</div><div class='add'>+ *</div><div class='add'>+ * Return: BAR0 mailbox register address based on register offset.</div><div class='add'>+ */</div><div class='add'>+static inline void __iomem *idpf_get_mbx_reg_addr(struct idpf_adapter *adapter,</div><div class='add'>+						  resource_size_t reg_offset)</div><div class='add'>+{</div><div class='add'>+	return adapter-&gt;hw.mbx.vaddr + reg_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_get_rstat_reg_addr - Get BAR0 rstat register address</div><div class='add'>+ * @adapter: private data struct</div><div class='add'>+ * @reg_offset: register offset value</div><div class='add'>+ *</div><div class='add'>+ * Return: BAR0 rstat register address based on register offset.</div><div class='add'>+ */</div><div class='add'>+static inline void __iomem *idpf_get_rstat_reg_addr(struct idpf_adapter *adapter,</div><div class='add'>+						    resource_size_t reg_offset)</div><div class='add'>+{</div><div class='add'>+	reg_offset -= adapter-&gt;dev_ops.static_reg_info[1].start;</div><div class='add'>+</div><div class='add'>+	return adapter-&gt;hw.rstat.vaddr + reg_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * idpf_get_reg_addr - Get BAR0 register address</div><div class='ctx'>  * @adapter: private data struct</div><div class='ctx'>  * @reg_offset: register offset value</div><div class='hunk'>@@ -711,7 +868,30 @@ static inline u8 idpf_get_min_tx_pkt_len(struct idpf_adapter *adapter)</div><div class='ctx'> static inline void __iomem *idpf_get_reg_addr(struct idpf_adapter *adapter,</div><div class='ctx'> 					      resource_size_t reg_offset)</div><div class='ctx'> {</div><div class='del'>-	return (void __iomem *)(adapter-&gt;hw.hw_addr + reg_offset);</div><div class='add'>+	struct idpf_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; hw-&gt;num_lan_regs; i++) {</div><div class='add'>+		struct idpf_mmio_reg *region = &amp;hw-&gt;lan_regs[i];</div><div class='add'>+</div><div class='add'>+		if (reg_offset &gt;= region-&gt;addr_start &amp;&amp;</div><div class='add'>+		    reg_offset &lt; (region-&gt;addr_start + region-&gt;addr_len)) {</div><div class='add'>+			/* Convert the offset so that it is relative to the</div><div class='add'>+			 * start of the region.  Then add the base address of</div><div class='add'>+			 * the region to get the final address.</div><div class='add'>+			 */</div><div class='add'>+			reg_offset -= region-&gt;addr_start;</div><div class='add'>+</div><div class='add'>+			return region-&gt;vaddr + reg_offset;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* It's impossible to hit this case with offsets from the CP. But if we</div><div class='add'>+	 * do for any other reason, the kernel will panic on that register</div><div class='add'>+	 * access. Might as well do it here to make it clear what's happening.</div><div class='add'>+	 */</div><div class='add'>+	BUG();</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -725,7 +905,7 @@ static inline bool idpf_is_reset_detected(struct idpf_adapter *adapter)</div><div class='ctx'> 	if (!adapter-&gt;hw.arq)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='del'>-	return !(readl(idpf_get_reg_addr(adapter, adapter-&gt;hw.arq-&gt;reg.len)) &amp;</div><div class='add'>+	return !(readl(idpf_get_mbx_reg_addr(adapter, adapter-&gt;hw.arq-&gt;reg.len)) &amp;</div><div class='ctx'> 		 adapter-&gt;hw.arq-&gt;reg.len_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -811,6 +991,13 @@ static inline void idpf_vport_ctrl_unlock(struct net_device *netdev)</div><div class='ctx'> 	mutex_unlock(&amp;np-&gt;adapter-&gt;vport_ctrl_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool idpf_vport_ctrl_is_locked(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return mutex_is_locked(&amp;np-&gt;adapter-&gt;vport_ctrl_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void idpf_statistics_task(struct work_struct *work);</div><div class='ctx'> void idpf_init_task(struct work_struct *work);</div><div class='ctx'> void idpf_service_task(struct work_struct *work);</div><div class='hunk'>@@ -834,5 +1021,16 @@ int idpf_sriov_configure(struct pci_dev *pdev, int num_vfs);</div><div class='ctx'> </div><div class='ctx'> u8 idpf_vport_get_hsplit(const struct idpf_vport *vport);</div><div class='ctx'> bool idpf_vport_set_hsplit(const struct idpf_vport *vport, u8 val);</div><div class='del'>-</div><div class='add'>+int idpf_idc_init(struct idpf_adapter *adapter);</div><div class='add'>+int idpf_idc_init_aux_core_dev(struct idpf_adapter *adapter,</div><div class='add'>+			       enum iidc_function_type ftype);</div><div class='add'>+void idpf_idc_deinit_core_aux_device(struct iidc_rdma_core_dev_info *cdev_info);</div><div class='add'>+void idpf_idc_deinit_vport_aux_device(struct iidc_rdma_vport_dev_info *vdev_info);</div><div class='add'>+void idpf_idc_issue_reset_event(struct iidc_rdma_core_dev_info *cdev_info);</div><div class='add'>+void idpf_idc_vdev_mtu_event(struct iidc_rdma_vport_dev_info *vdev_info,</div><div class='add'>+			     enum iidc_rdma_event_type event_type);</div><div class='add'>+</div><div class='add'>+int idpf_add_del_fsteer_filters(struct idpf_adapter *adapter,</div><div class='add'>+				struct virtchnl2_flow_rule_add_del *rule,</div><div class='add'>+				enum virtchnl2_op opcode);</div><div class='ctx'> #endif /* !_IDPF_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq.c b/drivers/net/ethernet/intel/idpf/idpf_controlq.c<br/>index 4849590a5591..67894eda2d29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_controlq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_controlq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_controlq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_controlq.c</a></div><div class='hunk'>@@ -36,19 +36,19 @@ static void idpf_ctlq_init_regs(struct idpf_hw *hw, struct idpf_ctlq_info *cq,</div><div class='ctx'> {</div><div class='ctx'> 	/* Update tail to post pre-allocated buffers for rx queues */</div><div class='ctx'> 	if (is_rxq)</div><div class='del'>-		wr32(hw, cq-&gt;reg.tail, (u32)(cq-&gt;ring_size - 1));</div><div class='add'>+		idpf_mbx_wr32(hw, cq-&gt;reg.tail, (u32)(cq-&gt;ring_size - 1));</div><div class='ctx'> </div><div class='ctx'> 	/* For non-Mailbox control queues only TAIL need to be set */</div><div class='ctx'> 	if (cq-&gt;q_id != -1)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear Head for both send or receive */</div><div class='del'>-	wr32(hw, cq-&gt;reg.head, 0);</div><div class='add'>+	idpf_mbx_wr32(hw, cq-&gt;reg.head, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* set starting point */</div><div class='del'>-	wr32(hw, cq-&gt;reg.bal, lower_32_bits(cq-&gt;desc_ring.pa));</div><div class='del'>-	wr32(hw, cq-&gt;reg.bah, upper_32_bits(cq-&gt;desc_ring.pa));</div><div class='del'>-	wr32(hw, cq-&gt;reg.len, (cq-&gt;ring_size | cq-&gt;reg.len_ena_mask));</div><div class='add'>+	idpf_mbx_wr32(hw, cq-&gt;reg.bal, lower_32_bits(cq-&gt;desc_ring.pa));</div><div class='add'>+	idpf_mbx_wr32(hw, cq-&gt;reg.bah, upper_32_bits(cq-&gt;desc_ring.pa));</div><div class='add'>+	idpf_mbx_wr32(hw, cq-&gt;reg.len, (cq-&gt;ring_size | cq-&gt;reg.len_ena_mask));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -96,7 +96,7 @@ static void idpf_ctlq_init_rxq_bufs(struct idpf_ctlq_info *cq)</div><div class='ctx'>  */</div><div class='ctx'> static void idpf_ctlq_shutdown(struct idpf_hw *hw, struct idpf_ctlq_info *cq)</div><div class='ctx'> {</div><div class='del'>-	mutex_lock(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_lock(&amp;cq-&gt;cq_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* free ring buffers and the ring itself */</div><div class='ctx'> 	idpf_ctlq_dealloc_ring_res(hw, cq);</div><div class='hunk'>@@ -104,8 +104,7 @@ static void idpf_ctlq_shutdown(struct idpf_hw *hw, struct idpf_ctlq_info *cq)</div><div class='ctx'> 	/* Set ring_size to 0 to indicate uninitialized queue */</div><div class='ctx'> 	cq-&gt;ring_size = 0;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;cq-&gt;cq_lock);</div><div class='del'>-	mutex_destroy(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_unlock(&amp;cq-&gt;cq_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -173,7 +172,7 @@ int idpf_ctlq_add(struct idpf_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	idpf_ctlq_init_regs(hw, cq, is_rxq);</div><div class='ctx'> </div><div class='del'>-	mutex_init(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_lock_init(&amp;cq-&gt;cq_lock);</div><div class='ctx'> </div><div class='ctx'> 	list_add(&amp;cq-&gt;cq_list, &amp;hw-&gt;cq_list_head);</div><div class='ctx'> </div><div class='hunk'>@@ -272,7 +271,7 @@ int idpf_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq_info *cq,</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_lock(&amp;cq-&gt;cq_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure there are enough descriptors to send all messages */</div><div class='ctx'> 	num_desc_avail = IDPF_CTLQ_DESC_UNUSED(cq);</div><div class='hunk'>@@ -329,10 +328,10 @@ int idpf_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq_info *cq,</div><div class='ctx'> 	 */</div><div class='ctx'> 	dma_wmb();</div><div class='ctx'> </div><div class='del'>-	wr32(hw, cq-&gt;reg.tail, cq-&gt;next_to_use);</div><div class='add'>+	idpf_mbx_wr32(hw, cq-&gt;reg.tail, cq-&gt;next_to_use);</div><div class='ctx'> </div><div class='ctx'> err_unlock:</div><div class='del'>-	mutex_unlock(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_unlock(&amp;cq-&gt;cq_lock);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -364,7 +363,7 @@ int idpf_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count,</div><div class='ctx'> 	if (*clean_count &gt; cq-&gt;ring_size)</div><div class='ctx'> 		return -EBADR;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_lock(&amp;cq-&gt;cq_lock);</div><div class='ctx'> </div><div class='ctx'> 	ntc = cq-&gt;next_to_clean;</div><div class='ctx'> </div><div class='hunk'>@@ -376,6 +375,9 @@ int idpf_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count,</div><div class='ctx'> 		if (!(le16_to_cpu(desc-&gt;flags) &amp; IDPF_CTLQ_FLAG_DD))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		/* Ensure no other fields are read until DD flag is checked */</div><div class='add'>+		dma_rmb();</div><div class='add'>+</div><div class='ctx'> 		/* strip off FW internal code */</div><div class='ctx'> 		desc_err = le16_to_cpu(desc-&gt;ret_val) &amp; 0xff;</div><div class='ctx'> </div><div class='hunk'>@@ -394,7 +396,7 @@ int idpf_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count,</div><div class='ctx'> </div><div class='ctx'> 	cq-&gt;next_to_clean = ntc;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_unlock(&amp;cq-&gt;cq_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Return number of descriptors actually cleaned */</div><div class='ctx'> 	*clean_count = i;</div><div class='hunk'>@@ -432,7 +434,7 @@ int idpf_ctlq_post_rx_buffs(struct idpf_hw *hw, struct idpf_ctlq_info *cq,</div><div class='ctx'> 	if (*buff_count &gt; 0)</div><div class='ctx'> 		buffs_avail = true;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_lock(&amp;cq-&gt;cq_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (tbp &gt;= cq-&gt;ring_size)</div><div class='ctx'> 		tbp = 0;</div><div class='hunk'>@@ -518,10 +520,10 @@ post_buffs_out:</div><div class='ctx'> </div><div class='ctx'> 		dma_wmb();</div><div class='ctx'> </div><div class='del'>-		wr32(hw, cq-&gt;reg.tail, cq-&gt;next_to_post);</div><div class='add'>+		idpf_mbx_wr32(hw, cq-&gt;reg.tail, cq-&gt;next_to_post);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_unlock(&amp;cq-&gt;cq_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* return the number of buffers that were not posted */</div><div class='ctx'> 	*buff_count = *buff_count - i;</div><div class='hunk'>@@ -549,7 +551,7 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg,</div><div class='ctx'> 	u16 i;</div><div class='ctx'> </div><div class='ctx'> 	/* take the lock before we start messing with the ring */</div><div class='del'>-	mutex_lock(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_lock(&amp;cq-&gt;cq_lock);</div><div class='ctx'> </div><div class='ctx'> 	ntc = cq-&gt;next_to_clean;</div><div class='ctx'> </div><div class='hunk'>@@ -563,6 +565,9 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg,</div><div class='ctx'> 		if (!(flags &amp; IDPF_CTLQ_FLAG_DD))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		/* Ensure no other fields are read until DD flag is checked */</div><div class='add'>+		dma_rmb();</div><div class='add'>+</div><div class='ctx'> 		q_msg[i].vmvf_type = (flags &amp;</div><div class='ctx'> 				      (IDPF_CTLQ_FLAG_FTYPE_VM |</div><div class='ctx'> 				       IDPF_CTLQ_FLAG_FTYPE_PF)) &gt;&gt;</div><div class='hunk'>@@ -608,7 +613,7 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg,</div><div class='ctx'> </div><div class='ctx'> 	cq-&gt;next_to_clean = ntc;</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;cq-&gt;cq_lock);</div><div class='add'>+	spin_unlock(&amp;cq-&gt;cq_lock);</div><div class='ctx'> </div><div class='ctx'> 	*num_q_msg = i;</div><div class='ctx'> 	if (*num_q_msg == 0)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq.h b/drivers/net/ethernet/intel/idpf/idpf_controlq.h<br/>index c1aba09e9856..de4ece40c2ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_controlq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_controlq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_controlq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_controlq.h</a></div><div class='hunk'>@@ -94,12 +94,26 @@ struct idpf_mbxq_desc {</div><div class='ctx'> 	u32 pf_vf_id;		/* used by CP when sending to PF */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Max number of MMIO regions not including the mailbox and rstat regions in</div><div class='add'>+ * the fallback case when the whole bar is mapped.</div><div class='add'>+ */</div><div class='add'>+#define IDPF_MMIO_MAP_FALLBACK_MAX_REMAINING		3</div><div class='add'>+</div><div class='add'>+struct idpf_mmio_reg {</div><div class='add'>+	void __iomem *vaddr;</div><div class='add'>+	resource_size_t addr_start;</div><div class='add'>+	resource_size_t addr_len;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Define the driver hardware struct to replace other control structs as needed</div><div class='ctx'>  * Align to ctlq_hw_info</div><div class='ctx'>  */</div><div class='ctx'> struct idpf_hw {</div><div class='del'>-	void __iomem *hw_addr;</div><div class='del'>-	resource_size_t hw_addr_len;</div><div class='add'>+	struct idpf_mmio_reg mbx;</div><div class='add'>+	struct idpf_mmio_reg rstat;</div><div class='add'>+	/* Array of remaining LAN BAR regions */</div><div class='add'>+	int num_lan_regs;</div><div class='add'>+	struct idpf_mmio_reg *lan_regs;</div><div class='ctx'> </div><div class='ctx'> 	struct idpf_adapter *back;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h b/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h<br/>index e8e046ef2f0d..3414c5f9a831 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_controlq_api.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_controlq_api.h</a></div><div class='hunk'>@@ -99,7 +99,7 @@ struct idpf_ctlq_info {</div><div class='ctx'> </div><div class='ctx'> 	enum idpf_ctlq_type cq_type;</div><div class='ctx'> 	int q_id;</div><div class='del'>-	struct mutex cq_lock;		/* control queue lock */</div><div class='add'>+	spinlock_t cq_lock;		/* control queue lock */</div><div class='ctx'> 	/* used for interrupt processing */</div><div class='ctx'> 	u16 next_to_use;</div><div class='ctx'> 	u16 next_to_clean;</div><div class='hunk'>@@ -123,9 +123,12 @@ struct idpf_ctlq_info {</div><div class='ctx'> /**</div><div class='ctx'>  * enum idpf_mbx_opc - PF/VF mailbox commands</div><div class='ctx'>  * @idpf_mbq_opc_send_msg_to_cp: used by PF or VF to send a message to its CP</div><div class='add'>+ * @idpf_mbq_opc_send_msg_to_peer_drv: used by PF or VF to send a message to</div><div class='add'>+ *				       any peer driver</div><div class='ctx'>  */</div><div class='ctx'> enum idpf_mbx_opc {</div><div class='ctx'> 	idpf_mbq_opc_send_msg_to_cp		= 0x0801,</div><div class='add'>+	idpf_mbq_opc_send_msg_to_peer_drv	= 0x0804,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* API supported for control queue management */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_dev.c b/drivers/net/ethernet/intel/idpf/idpf_dev.c<br/>index 6c913a703df6..3a04a6bd0d7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_dev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_dev.c</a></div><div class='hunk'>@@ -4,15 +4,19 @@</div><div class='ctx'> #include "idpf.h"</div><div class='ctx'> #include "idpf_lan_pf_regs.h"</div><div class='ctx'> #include "idpf_virtchnl.h"</div><div class='add'>+#include "idpf_ptp.h"</div><div class='ctx'> </div><div class='ctx'> #define IDPF_PF_ITR_IDX_SPACING		0x4</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * idpf_ctlq_reg_init - initialize default mailbox registers</div><div class='add'>+ * @adapter: adapter structure</div><div class='ctx'>  * @cq: pointer to the array of create control queues</div><div class='ctx'>  */</div><div class='del'>-static void idpf_ctlq_reg_init(struct idpf_ctlq_create_info *cq)</div><div class='add'>+static void idpf_ctlq_reg_init(struct idpf_adapter *adapter,</div><div class='add'>+			       struct idpf_ctlq_create_info *cq)</div><div class='ctx'> {</div><div class='add'>+	resource_size_t mbx_start = adapter-&gt;dev_ops.static_reg_info[0].start;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; IDPF_NUM_DFLT_MBX_Q; i++) {</div><div class='hunk'>@@ -21,22 +25,22 @@ static void idpf_ctlq_reg_init(struct idpf_ctlq_create_info *cq)</div><div class='ctx'> 		switch (ccq-&gt;type) {</div><div class='ctx'> 		case IDPF_CTLQ_TYPE_MAILBOX_TX:</div><div class='ctx'> 			/* set head and tail registers in our local struct */</div><div class='del'>-			ccq-&gt;reg.head = PF_FW_ATQH;</div><div class='del'>-			ccq-&gt;reg.tail = PF_FW_ATQT;</div><div class='del'>-			ccq-&gt;reg.len = PF_FW_ATQLEN;</div><div class='del'>-			ccq-&gt;reg.bah = PF_FW_ATQBAH;</div><div class='del'>-			ccq-&gt;reg.bal = PF_FW_ATQBAL;</div><div class='add'>+			ccq-&gt;reg.head = PF_FW_ATQH - mbx_start;</div><div class='add'>+			ccq-&gt;reg.tail = PF_FW_ATQT - mbx_start;</div><div class='add'>+			ccq-&gt;reg.len = PF_FW_ATQLEN - mbx_start;</div><div class='add'>+			ccq-&gt;reg.bah = PF_FW_ATQBAH - mbx_start;</div><div class='add'>+			ccq-&gt;reg.bal = PF_FW_ATQBAL - mbx_start;</div><div class='ctx'> 			ccq-&gt;reg.len_mask = PF_FW_ATQLEN_ATQLEN_M;</div><div class='ctx'> 			ccq-&gt;reg.len_ena_mask = PF_FW_ATQLEN_ATQENABLE_M;</div><div class='ctx'> 			ccq-&gt;reg.head_mask = PF_FW_ATQH_ATQH_M;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case IDPF_CTLQ_TYPE_MAILBOX_RX:</div><div class='ctx'> 			/* set head and tail registers in our local struct */</div><div class='del'>-			ccq-&gt;reg.head = PF_FW_ARQH;</div><div class='del'>-			ccq-&gt;reg.tail = PF_FW_ARQT;</div><div class='del'>-			ccq-&gt;reg.len = PF_FW_ARQLEN;</div><div class='del'>-			ccq-&gt;reg.bah = PF_FW_ARQBAH;</div><div class='del'>-			ccq-&gt;reg.bal = PF_FW_ARQBAL;</div><div class='add'>+			ccq-&gt;reg.head = PF_FW_ARQH - mbx_start;</div><div class='add'>+			ccq-&gt;reg.tail = PF_FW_ARQT - mbx_start;</div><div class='add'>+			ccq-&gt;reg.len = PF_FW_ARQLEN - mbx_start;</div><div class='add'>+			ccq-&gt;reg.bah = PF_FW_ARQBAH - mbx_start;</div><div class='add'>+			ccq-&gt;reg.bal = PF_FW_ARQBAL - mbx_start;</div><div class='ctx'> 			ccq-&gt;reg.len_mask = PF_FW_ARQLEN_ARQLEN_M;</div><div class='ctx'> 			ccq-&gt;reg.len_ena_mask = PF_FW_ARQLEN_ARQENABLE_M;</div><div class='ctx'> 			ccq-&gt;reg.head_mask = PF_FW_ARQH_ARQH_M;</div><div class='hunk'>@@ -73,7 +77,7 @@ static int idpf_intr_reg_init(struct idpf_vport *vport)</div><div class='ctx'> 	int num_vecs = vport-&gt;num_q_vectors;</div><div class='ctx'> 	struct idpf_vec_regs *reg_vals;</div><div class='ctx'> 	int num_regs, i, err = 0;</div><div class='del'>-	u32 rx_itr, tx_itr;</div><div class='add'>+	u32 rx_itr, tx_itr, val;</div><div class='ctx'> 	u16 total_vecs;</div><div class='ctx'> </div><div class='ctx'> 	total_vecs = idpf_get_reserved_vecs(vport-&gt;adapter);</div><div class='hunk'>@@ -101,6 +105,9 @@ static int idpf_intr_reg_init(struct idpf_vport *vport)</div><div class='ctx'> 		intr-&gt;dyn_ctl_itridx_s = PF_GLINT_DYN_CTL_ITR_INDX_S;</div><div class='ctx'> 		intr-&gt;dyn_ctl_intrvl_s = PF_GLINT_DYN_CTL_INTERVAL_S;</div><div class='ctx'> 		intr-&gt;dyn_ctl_wb_on_itr_m = PF_GLINT_DYN_CTL_WB_ON_ITR_M;</div><div class='add'>+		intr-&gt;dyn_ctl_swint_trig_m = PF_GLINT_DYN_CTL_SWINT_TRIG_M;</div><div class='add'>+		intr-&gt;dyn_ctl_sw_itridx_ena_m =</div><div class='add'>+			PF_GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;</div><div class='ctx'> </div><div class='ctx'> 		spacing = IDPF_ITR_IDX_SPACING(reg_vals[vec_id].itrn_index_spacing,</div><div class='ctx'> 					       IDPF_PF_ITR_IDX_SPACING);</div><div class='hunk'>@@ -114,6 +121,15 @@ static int idpf_intr_reg_init(struct idpf_vport *vport)</div><div class='ctx'> 		intr-&gt;tx_itr = idpf_get_reg_addr(adapter, tx_itr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Data vector for NOIRQ queues */</div><div class='add'>+</div><div class='add'>+	val = reg_vals[vport-&gt;q_vector_idxs[i] - IDPF_MBX_Q_VEC].dyn_ctl_reg;</div><div class='add'>+	vport-&gt;noirq_dyn_ctl = idpf_get_reg_addr(adapter, val);</div><div class='add'>+</div><div class='add'>+	val = PF_GLINT_DYN_CTL_WB_ON_ITR_M | PF_GLINT_DYN_CTL_INTENA_MSK_M |</div><div class='add'>+	      FIELD_PREP(PF_GLINT_DYN_CTL_ITR_INDX_M, IDPF_NO_ITR_UPDATE_IDX);</div><div class='add'>+	vport-&gt;noirq_dyn_ctl_ena = val;</div><div class='add'>+</div><div class='ctx'> free_reg_vals:</div><div class='ctx'> 	kfree(reg_vals);</div><div class='ctx'> </div><div class='hunk'>@@ -126,7 +142,7 @@ free_reg_vals:</div><div class='ctx'>  */</div><div class='ctx'> static void idpf_reset_reg_init(struct idpf_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	adapter-&gt;reset_reg.rstat = idpf_get_reg_addr(adapter, PFGEN_RSTAT);</div><div class='add'>+	adapter-&gt;reset_reg.rstat = idpf_get_rstat_reg_addr(adapter, PFGEN_RSTAT);</div><div class='ctx'> 	adapter-&gt;reset_reg.rstat_m = PFGEN_RSTAT_PFR_STATE_M;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -140,9 +156,32 @@ static void idpf_trigger_reset(struct idpf_adapter *adapter,</div><div class='ctx'> {</div><div class='ctx'> 	u32 reset_reg;</div><div class='ctx'> </div><div class='del'>-	reset_reg = readl(idpf_get_reg_addr(adapter, PFGEN_CTRL));</div><div class='add'>+	reset_reg = readl(idpf_get_rstat_reg_addr(adapter, PFGEN_CTRL));</div><div class='ctx'> 	writel(reset_reg | PFGEN_CTRL_PFSWR,</div><div class='del'>-	       idpf_get_reg_addr(adapter, PFGEN_CTRL));</div><div class='add'>+	       idpf_get_rstat_reg_addr(adapter, PFGEN_CTRL));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_reg_init - Initialize required registers</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * Set the bits required for enabling shtime and cmd execution</div><div class='add'>+ */</div><div class='add'>+static void idpf_ptp_reg_init(const struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	adapter-&gt;ptp-&gt;cmd.shtime_enable_mask = PF_GLTSYN_CMD_SYNC_SHTIME_EN_M;</div><div class='add'>+	adapter-&gt;ptp-&gt;cmd.exec_cmd_mask = PF_GLTSYN_CMD_SYNC_EXEC_CMD_M;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_register - register for IDC callbacks</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_idc_register(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return idpf_idc_init_aux_core_dev(adapter, IIDC_FUNCTION_TYPE_PF);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -156,6 +195,7 @@ static void idpf_reg_ops_init(struct idpf_adapter *adapter)</div><div class='ctx'> 	adapter-&gt;dev_ops.reg_ops.mb_intr_reg_init = idpf_mb_intr_reg_init;</div><div class='ctx'> 	adapter-&gt;dev_ops.reg_ops.reset_reg_init = idpf_reset_reg_init;</div><div class='ctx'> 	adapter-&gt;dev_ops.reg_ops.trigger_reset = idpf_trigger_reset;</div><div class='add'>+	adapter-&gt;dev_ops.reg_ops.ptp_reg_init = idpf_ptp_reg_init;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -165,4 +205,11 @@ static void idpf_reg_ops_init(struct idpf_adapter *adapter)</div><div class='ctx'> void idpf_dev_ops_init(struct idpf_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	idpf_reg_ops_init(adapter);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;dev_ops.idc_init = idpf_idc_register;</div><div class='add'>+</div><div class='add'>+	resource_set_range(&amp;adapter-&gt;dev_ops.static_reg_info[0],</div><div class='add'>+			   PF_FW_BASE, IDPF_PF_MBX_REGION_SZ);</div><div class='add'>+	resource_set_range(&amp;adapter-&gt;dev_ops.static_reg_info[1],</div><div class='add'>+			   PFGEN_RTRIG, IDPF_PF_RSTAT_REGION_SZ);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c b/drivers/net/ethernet/intel/idpf/idpf_ethtool.c<br/>index 3806ddd3ce4a..2589e124e41c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_ethtool.c</a></div><div class='hunk'>@@ -2,6 +2,27 @@</div><div class='ctx'> /* Copyright (C) 2023 Intel Corporation */</div><div class='ctx'> </div><div class='ctx'> #include "idpf.h"</div><div class='add'>+#include "idpf_ptp.h"</div><div class='add'>+#include "idpf_virtchnl.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_get_rx_ring_count - get RX ring count</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: number of RX rings.</div><div class='add'>+ */</div><div class='add'>+static u32 idpf_get_rx_ring_count(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct idpf_vport *vport;</div><div class='add'>+	u32 num_rxq;</div><div class='add'>+</div><div class='add'>+	idpf_vport_ctrl_lock(netdev);</div><div class='add'>+	vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+	num_rxq = vport-&gt;num_rxq;</div><div class='add'>+	idpf_vport_ctrl_unlock(netdev);</div><div class='add'>+</div><div class='add'>+	return num_rxq;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * idpf_get_rxnfc - command to get RX flow classification rules</div><div class='hunk'>@@ -12,26 +33,309 @@</div><div class='ctx'>  * Returns Success if the command is supported.</div><div class='ctx'>  */</div><div class='ctx'> static int idpf_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,</div><div class='del'>-			  u32 __always_unused *rule_locs)</div><div class='add'>+			  u32 *rule_locs)</div><div class='ctx'> {</div><div class='add'>+	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct idpf_vport_user_config_data *user_config;</div><div class='add'>+	struct idpf_fsteer_fltr *f;</div><div class='ctx'> 	struct idpf_vport *vport;</div><div class='add'>+	unsigned int cnt = 0;</div><div class='add'>+	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	idpf_vport_ctrl_lock(netdev);</div><div class='ctx'> 	vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+	user_config = &amp;np-&gt;adapter-&gt;vport_config[np-&gt;vport_idx]-&gt;user_config;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = vport-&gt;num_rxq;</div><div class='del'>-		idpf_vport_ctrl_unlock(netdev);</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='add'>+	case ETHTOOL_GRXCLSRLCNT:</div><div class='add'>+		cmd-&gt;rule_cnt = user_config-&gt;num_fsteer_fltrs;</div><div class='add'>+		cmd-&gt;data = idpf_fsteer_max_rules(vport);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRULE:</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		list_for_each_entry(f, &amp;user_config-&gt;flow_steer_list, list)</div><div class='add'>+			if (f-&gt;loc == cmd-&gt;fs.location) {</div><div class='add'>+				cmd-&gt;fs.ring_cookie = f-&gt;q_index;</div><div class='add'>+				err = 0;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRLALL:</div><div class='add'>+		cmd-&gt;data = idpf_fsteer_max_rules(vport);</div><div class='add'>+		list_for_each_entry(f, &amp;user_config-&gt;flow_steer_list, list) {</div><div class='add'>+			if (cnt == cmd-&gt;rule_cnt) {</div><div class='add'>+				err = -EMSGSIZE;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			rule_locs[cnt] = f-&gt;loc;</div><div class='add'>+			cnt++;</div><div class='add'>+		}</div><div class='add'>+		if (!err)</div><div class='add'>+			cmd-&gt;rule_cnt = user_config-&gt;num_fsteer_fltrs;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	idpf_vport_ctrl_unlock(netdev);</div><div class='ctx'> </div><div class='del'>-	return -EOPNOTSUPP;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_fsteer_fill_ipv4(struct virtchnl2_proto_hdrs *hdrs,</div><div class='add'>+				  struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+</div><div class='add'>+	hdrs-&gt;proto_hdr[0].hdr_type = cpu_to_le32(VIRTCHNL2_PROTO_HDR_IPV4);</div><div class='add'>+</div><div class='add'>+	iph = (struct iphdr *)hdrs-&gt;proto_hdr[0].buffer_spec;</div><div class='add'>+	iph-&gt;saddr = fsp-&gt;h_u.tcp_ip4_spec.ip4src;</div><div class='add'>+	iph-&gt;daddr = fsp-&gt;h_u.tcp_ip4_spec.ip4dst;</div><div class='add'>+</div><div class='add'>+	iph = (struct iphdr *)hdrs-&gt;proto_hdr[0].buffer_mask;</div><div class='add'>+	iph-&gt;saddr = fsp-&gt;m_u.tcp_ip4_spec.ip4src;</div><div class='add'>+	iph-&gt;daddr = fsp-&gt;m_u.tcp_ip4_spec.ip4dst;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_fsteer_fill_udp(struct virtchnl2_proto_hdrs *hdrs,</div><div class='add'>+				 struct ethtool_rx_flow_spec *fsp,</div><div class='add'>+				 bool v4)</div><div class='add'>+{</div><div class='add'>+	struct udphdr *udph, *udpm;</div><div class='add'>+</div><div class='add'>+	hdrs-&gt;proto_hdr[1].hdr_type = cpu_to_le32(VIRTCHNL2_PROTO_HDR_UDP);</div><div class='add'>+</div><div class='add'>+	udph = (struct udphdr *)hdrs-&gt;proto_hdr[1].buffer_spec;</div><div class='add'>+	udpm = (struct udphdr *)hdrs-&gt;proto_hdr[1].buffer_mask;</div><div class='add'>+</div><div class='add'>+	if (v4) {</div><div class='add'>+		udph-&gt;source = fsp-&gt;h_u.udp_ip4_spec.psrc;</div><div class='add'>+		udph-&gt;dest = fsp-&gt;h_u.udp_ip4_spec.pdst;</div><div class='add'>+		udpm-&gt;source = fsp-&gt;m_u.udp_ip4_spec.psrc;</div><div class='add'>+		udpm-&gt;dest = fsp-&gt;m_u.udp_ip4_spec.pdst;</div><div class='add'>+	} else {</div><div class='add'>+		udph-&gt;source = fsp-&gt;h_u.udp_ip6_spec.psrc;</div><div class='add'>+		udph-&gt;dest = fsp-&gt;h_u.udp_ip6_spec.pdst;</div><div class='add'>+		udpm-&gt;source = fsp-&gt;m_u.udp_ip6_spec.psrc;</div><div class='add'>+		udpm-&gt;dest = fsp-&gt;m_u.udp_ip6_spec.pdst;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_fsteer_fill_tcp(struct virtchnl2_proto_hdrs *hdrs,</div><div class='add'>+				 struct ethtool_rx_flow_spec *fsp,</div><div class='add'>+				 bool v4)</div><div class='add'>+{</div><div class='add'>+	struct tcphdr *tcph, *tcpm;</div><div class='add'>+</div><div class='add'>+	hdrs-&gt;proto_hdr[1].hdr_type = cpu_to_le32(VIRTCHNL2_PROTO_HDR_TCP);</div><div class='add'>+</div><div class='add'>+	tcph = (struct tcphdr *)hdrs-&gt;proto_hdr[1].buffer_spec;</div><div class='add'>+	tcpm = (struct tcphdr *)hdrs-&gt;proto_hdr[1].buffer_mask;</div><div class='add'>+</div><div class='add'>+	if (v4) {</div><div class='add'>+		tcph-&gt;source = fsp-&gt;h_u.tcp_ip4_spec.psrc;</div><div class='add'>+		tcph-&gt;dest = fsp-&gt;h_u.tcp_ip4_spec.pdst;</div><div class='add'>+		tcpm-&gt;source = fsp-&gt;m_u.tcp_ip4_spec.psrc;</div><div class='add'>+		tcpm-&gt;dest = fsp-&gt;m_u.tcp_ip4_spec.pdst;</div><div class='add'>+	} else {</div><div class='add'>+		tcph-&gt;source = fsp-&gt;h_u.tcp_ip6_spec.psrc;</div><div class='add'>+		tcph-&gt;dest = fsp-&gt;h_u.tcp_ip6_spec.pdst;</div><div class='add'>+		tcpm-&gt;source = fsp-&gt;m_u.tcp_ip6_spec.psrc;</div><div class='add'>+		tcpm-&gt;dest = fsp-&gt;m_u.tcp_ip6_spec.pdst;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_add_flow_steer - add a Flow Steering filter</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ * @cmd: command to add Flow Steering filter</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and negative values for failure</div><div class='add'>+ */</div><div class='add'>+static int idpf_add_flow_steer(struct net_device *netdev,</div><div class='add'>+			       struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	struct idpf_fsteer_fltr *fltr, *parent = NULL, *f;</div><div class='add'>+	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct idpf_vport_user_config_data *user_config;</div><div class='add'>+	struct ethtool_rx_flow_spec *fsp = &amp;cmd-&gt;fs;</div><div class='add'>+	struct virtchnl2_flow_rule_add_del *rule;</div><div class='add'>+	struct idpf_vport_config *vport_config;</div><div class='add'>+	struct virtchnl2_rule_action_set *acts;</div><div class='add'>+	struct virtchnl2_flow_rule_info *info;</div><div class='add'>+	struct virtchnl2_proto_hdrs *hdrs;</div><div class='add'>+	struct idpf_vport *vport;</div><div class='add'>+	u32 flow_type, q_index;</div><div class='add'>+	u16 num_rxq;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+	vport_config = vport-&gt;adapter-&gt;vport_config[np-&gt;vport_idx];</div><div class='add'>+	user_config = &amp;vport_config-&gt;user_config;</div><div class='add'>+	num_rxq = user_config-&gt;num_req_rx_qs;</div><div class='add'>+</div><div class='add'>+	flow_type = fsp-&gt;flow_type &amp; ~(FLOW_EXT | FLOW_MAC_EXT | FLOW_RSS);</div><div class='add'>+	if (flow_type != fsp-&gt;flow_type)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!idpf_sideband_action_ena(vport, fsp) ||</div><div class='add'>+	    !idpf_sideband_flow_type_ena(vport, flow_type))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (user_config-&gt;num_fsteer_fltrs &gt; idpf_fsteer_max_rules(vport))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	q_index = fsp-&gt;ring_cookie;</div><div class='add'>+	if (q_index &gt;= num_rxq)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rule = kzalloc(struct_size(rule, rule_info, 1), GFP_KERNEL);</div><div class='add'>+	if (!rule)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rule-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='add'>+	rule-&gt;count = cpu_to_le32(1);</div><div class='add'>+	info = &amp;rule-&gt;rule_info[0];</div><div class='add'>+	info-&gt;rule_id = cpu_to_le32(fsp-&gt;location);</div><div class='add'>+</div><div class='add'>+	hdrs = &amp;info-&gt;rule_cfg.proto_hdrs;</div><div class='add'>+	hdrs-&gt;tunnel_level = 0;</div><div class='add'>+	hdrs-&gt;count = cpu_to_le32(2);</div><div class='add'>+</div><div class='add'>+	acts = &amp;info-&gt;rule_cfg.action_set;</div><div class='add'>+	acts-&gt;count = cpu_to_le32(1);</div><div class='add'>+	acts-&gt;actions[0].action_type = cpu_to_le32(VIRTCHNL2_ACTION_QUEUE);</div><div class='add'>+	acts-&gt;actions[0].act_conf.q_id = cpu_to_le32(q_index);</div><div class='add'>+</div><div class='add'>+	switch (flow_type) {</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+		idpf_fsteer_fill_ipv4(hdrs, fsp);</div><div class='add'>+		idpf_fsteer_fill_udp(hdrs, fsp, true);</div><div class='add'>+		break;</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+		idpf_fsteer_fill_ipv4(hdrs, fsp);</div><div class='add'>+		idpf_fsteer_fill_tcp(hdrs, fsp, true);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = idpf_add_del_fsteer_filters(vport-&gt;adapter, rule,</div><div class='add'>+					  VIRTCHNL2_OP_ADD_FLOW_RULE);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (info-&gt;status != cpu_to_le32(VIRTCHNL2_FLOW_RULE_SUCCESS)) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fltr = kzalloc(sizeof(*fltr), GFP_KERNEL);</div><div class='add'>+	if (!fltr) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fltr-&gt;loc = fsp-&gt;location;</div><div class='add'>+	fltr-&gt;q_index = q_index;</div><div class='add'>+	list_for_each_entry(f, &amp;user_config-&gt;flow_steer_list, list) {</div><div class='add'>+		if (f-&gt;loc &gt;= fltr-&gt;loc)</div><div class='add'>+			break;</div><div class='add'>+		parent = f;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	parent ? list_add(&amp;fltr-&gt;list, &amp;parent-&gt;list) :</div><div class='add'>+		 list_add(&amp;fltr-&gt;list, &amp;user_config-&gt;flow_steer_list);</div><div class='add'>+</div><div class='add'>+	user_config-&gt;num_fsteer_fltrs++;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(rule);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_del_flow_steer - delete a Flow Steering filter</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ * @cmd: command to add Flow Steering filter</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and negative values for failure</div><div class='add'>+ */</div><div class='add'>+static int idpf_del_flow_steer(struct net_device *netdev,</div><div class='add'>+			       struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct idpf_vport_user_config_data *user_config;</div><div class='add'>+	struct ethtool_rx_flow_spec *fsp = &amp;cmd-&gt;fs;</div><div class='add'>+	struct virtchnl2_flow_rule_add_del *rule;</div><div class='add'>+	struct idpf_vport_config *vport_config;</div><div class='add'>+	struct virtchnl2_flow_rule_info *info;</div><div class='add'>+	struct idpf_fsteer_fltr *f, *iter;</div><div class='add'>+	struct idpf_vport *vport;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+	vport_config = vport-&gt;adapter-&gt;vport_config[np-&gt;vport_idx];</div><div class='add'>+	user_config = &amp;vport_config-&gt;user_config;</div><div class='add'>+</div><div class='add'>+	if (!idpf_sideband_action_ena(vport, fsp))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	rule = kzalloc(struct_size(rule, rule_info, 1), GFP_KERNEL);</div><div class='add'>+	if (!rule)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rule-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='add'>+	rule-&gt;count = cpu_to_le32(1);</div><div class='add'>+	info = &amp;rule-&gt;rule_info[0];</div><div class='add'>+	info-&gt;rule_id = cpu_to_le32(fsp-&gt;location);</div><div class='add'>+</div><div class='add'>+	err = idpf_add_del_fsteer_filters(vport-&gt;adapter, rule,</div><div class='add'>+					  VIRTCHNL2_OP_DEL_FLOW_RULE);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (info-&gt;status != cpu_to_le32(VIRTCHNL2_FLOW_RULE_SUCCESS)) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(f, iter,</div><div class='add'>+				 &amp;user_config-&gt;flow_steer_list, list) {</div><div class='add'>+		if (f-&gt;loc == fsp-&gt;location) {</div><div class='add'>+			list_del(&amp;f-&gt;list);</div><div class='add'>+			kfree(f);</div><div class='add'>+			user_config-&gt;num_fsteer_fltrs--;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(rule);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int idpf_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	int ret = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	idpf_vport_ctrl_lock(netdev);</div><div class='add'>+	switch (cmd-&gt;cmd) {</div><div class='add'>+	case ETHTOOL_SRXCLSRLINS:</div><div class='add'>+		ret = idpf_add_flow_steer(netdev, cmd);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_SRXCLSRLDEL:</div><div class='add'>+		ret = idpf_del_flow_steer(netdev, cmd);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idpf_vport_ctrl_unlock(netdev);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -46,7 +350,7 @@ static u32 idpf_get_rxfh_key_size(struct net_device *netdev)</div><div class='ctx'> 	struct idpf_vport_user_config_data *user_config;</div><div class='ctx'> </div><div class='ctx'> 	if (!idpf_is_cap_ena_all(np-&gt;adapter, IDPF_RSS_CAPS, IDPF_CAP_RSS))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	user_config = &amp;np-&gt;adapter-&gt;vport_config[np-&gt;vport_idx]-&gt;user_config;</div><div class='ctx'> </div><div class='hunk'>@@ -65,7 +369,7 @@ static u32 idpf_get_rxfh_indir_size(struct net_device *netdev)</div><div class='ctx'> 	struct idpf_vport_user_config_data *user_config;</div><div class='ctx'> </div><div class='ctx'> 	if (!idpf_is_cap_ena_all(np-&gt;adapter, IDPF_RSS_CAPS, IDPF_CAP_RSS))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	user_config = &amp;np-&gt;adapter-&gt;vport_config[np-&gt;vport_idx]-&gt;user_config;</div><div class='ctx'> </div><div class='hunk'>@@ -98,7 +402,7 @@ static int idpf_get_rxfh(struct net_device *netdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rss_data = &amp;adapter-&gt;vport_config[np-&gt;vport_idx]-&gt;user_config.rss_data;</div><div class='del'>-	if (np-&gt;state != __IDPF_VPORT_UP)</div><div class='add'>+	if (!test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='ctx'> 		goto unlock_mutex;</div><div class='ctx'> </div><div class='ctx'> 	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='hunk'>@@ -148,7 +452,7 @@ static int idpf_set_rxfh(struct net_device *netdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rss_data = &amp;adapter-&gt;vport_config[vport-&gt;idx]-&gt;user_config.rss_data;</div><div class='del'>-	if (np-&gt;state != __IDPF_VPORT_UP)</div><div class='add'>+	if (!test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='ctx'> 		goto unlock_mutex;</div><div class='ctx'> </div><div class='ctx'> 	if (rxfh-&gt;hfunc != ETH_RSS_HASH_NO_CHANGE &amp;&amp;</div><div class='hunk'>@@ -879,7 +1183,7 @@ static void idpf_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 	idpf_vport_ctrl_lock(netdev);</div><div class='ctx'> 	vport = idpf_netdev_to_vport(netdev);</div><div class='ctx'> </div><div class='del'>-	if (np-&gt;state != __IDPF_VPORT_UP) {</div><div class='add'>+	if (!test_bit(IDPF_VPORT_UP, np-&gt;state)) {</div><div class='ctx'> 		idpf_vport_ctrl_unlock(netdev);</div><div class='ctx'> </div><div class='ctx'> 		return;</div><div class='hunk'>@@ -957,8 +1261,8 @@ static void idpf_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'>  *</div><div class='ctx'>  * returns pointer to rx vector</div><div class='ctx'>  */</div><div class='del'>-static struct idpf_q_vector *idpf_find_rxq_vec(const struct idpf_vport *vport,</div><div class='del'>-					       int q_num)</div><div class='add'>+struct idpf_q_vector *idpf_find_rxq_vec(const struct idpf_vport *vport,</div><div class='add'>+					u32 q_num)</div><div class='ctx'> {</div><div class='ctx'> 	int q_grp, q_idx;</div><div class='ctx'> </div><div class='hunk'>@@ -978,8 +1282,8 @@ static struct idpf_q_vector *idpf_find_rxq_vec(const struct idpf_vport *vport,</div><div class='ctx'>  *</div><div class='ctx'>  * returns pointer to tx vector</div><div class='ctx'>  */</div><div class='del'>-static struct idpf_q_vector *idpf_find_txq_vec(const struct idpf_vport *vport,</div><div class='del'>-					       int q_num)</div><div class='add'>+struct idpf_q_vector *idpf_find_txq_vec(const struct idpf_vport *vport,</div><div class='add'>+					u32 q_num)</div><div class='ctx'> {</div><div class='ctx'> 	int q_grp;</div><div class='ctx'> </div><div class='hunk'>@@ -1031,7 +1335,7 @@ static int idpf_get_q_coalesce(struct net_device *netdev,</div><div class='ctx'> 	idpf_vport_ctrl_lock(netdev);</div><div class='ctx'> 	vport = idpf_netdev_to_vport(netdev);</div><div class='ctx'> </div><div class='del'>-	if (np-&gt;state != __IDPF_VPORT_UP)</div><div class='add'>+	if (!test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='ctx'> 		goto unlock_mutex;</div><div class='ctx'> </div><div class='ctx'> 	if (q_num &gt;= vport-&gt;num_rxq &amp;&amp; q_num &gt;= vport-&gt;num_txq) {</div><div class='hunk'>@@ -1089,12 +1393,14 @@ static int idpf_get_per_q_coalesce(struct net_device *netdev, u32 q_num,</div><div class='ctx'> /**</div><div class='ctx'>  * __idpf_set_q_coalesce - set ITR values for specific queue</div><div class='ctx'>  * @ec: ethtool structure from user to update ITR settings</div><div class='add'>+ * @q_coal: per queue coalesce settings</div><div class='ctx'>  * @qv: queue vector for which itr values has to be set</div><div class='ctx'>  * @is_rxq: is queue type rx</div><div class='ctx'>  *</div><div class='ctx'>  * Returns 0 on success, negative otherwise.</div><div class='ctx'>  */</div><div class='ctx'> static int __idpf_set_q_coalesce(const struct ethtool_coalesce *ec,</div><div class='add'>+				 struct idpf_q_coalesce *q_coal,</div><div class='ctx'> 				 struct idpf_q_vector *qv, bool is_rxq)</div><div class='ctx'> {</div><div class='ctx'> 	u32 use_adaptive_coalesce, coalesce_usecs;</div><div class='hunk'>@@ -1138,20 +1444,25 @@ static int __idpf_set_q_coalesce(const struct ethtool_coalesce *ec,</div><div class='ctx'> </div><div class='ctx'> 	if (is_rxq) {</div><div class='ctx'> 		qv-&gt;rx_itr_value = coalesce_usecs;</div><div class='add'>+		q_coal-&gt;rx_coalesce_usecs = coalesce_usecs;</div><div class='ctx'> 		if (use_adaptive_coalesce) {</div><div class='ctx'> 			qv-&gt;rx_intr_mode = IDPF_ITR_DYNAMIC;</div><div class='add'>+			q_coal-&gt;rx_intr_mode = IDPF_ITR_DYNAMIC;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			qv-&gt;rx_intr_mode = !IDPF_ITR_DYNAMIC;</div><div class='del'>-			idpf_vport_intr_write_itr(qv, qv-&gt;rx_itr_value,</div><div class='del'>-						  false);</div><div class='add'>+			q_coal-&gt;rx_intr_mode = !IDPF_ITR_DYNAMIC;</div><div class='add'>+			idpf_vport_intr_write_itr(qv, coalesce_usecs, false);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		qv-&gt;tx_itr_value = coalesce_usecs;</div><div class='add'>+		q_coal-&gt;tx_coalesce_usecs = coalesce_usecs;</div><div class='ctx'> 		if (use_adaptive_coalesce) {</div><div class='ctx'> 			qv-&gt;tx_intr_mode = IDPF_ITR_DYNAMIC;</div><div class='add'>+			q_coal-&gt;tx_intr_mode = IDPF_ITR_DYNAMIC;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			qv-&gt;tx_intr_mode = !IDPF_ITR_DYNAMIC;</div><div class='del'>-			idpf_vport_intr_write_itr(qv, qv-&gt;tx_itr_value, true);</div><div class='add'>+			q_coal-&gt;tx_intr_mode = !IDPF_ITR_DYNAMIC;</div><div class='add'>+			idpf_vport_intr_write_itr(qv, coalesce_usecs, true);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1164,6 +1475,7 @@ static int __idpf_set_q_coalesce(const struct ethtool_coalesce *ec,</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_set_q_coalesce - set ITR values for specific queue</div><div class='ctx'>  * @vport: vport associated to the queue that need updating</div><div class='add'>+ * @q_coal: per queue coalesce settings</div><div class='ctx'>  * @ec: coalesce settings to program the device with</div><div class='ctx'>  * @q_num: update ITR/INTRL (coalesce) settings for this queue number/index</div><div class='ctx'>  * @is_rxq: is queue type rx</div><div class='hunk'>@@ -1171,6 +1483,7 @@ static int __idpf_set_q_coalesce(const struct ethtool_coalesce *ec,</div><div class='ctx'>  * Return 0 on success, and negative on failure</div><div class='ctx'>  */</div><div class='ctx'> static int idpf_set_q_coalesce(const struct idpf_vport *vport,</div><div class='add'>+			       struct idpf_q_coalesce *q_coal,</div><div class='ctx'> 			       const struct ethtool_coalesce *ec,</div><div class='ctx'> 			       int q_num, bool is_rxq)</div><div class='ctx'> {</div><div class='hunk'>@@ -1179,7 +1492,7 @@ static int idpf_set_q_coalesce(const struct idpf_vport *vport,</div><div class='ctx'> 	qv = is_rxq ? idpf_find_rxq_vec(vport, q_num) :</div><div class='ctx'> 		      idpf_find_txq_vec(vport, q_num);</div><div class='ctx'> </div><div class='del'>-	if (qv &amp;&amp; __idpf_set_q_coalesce(ec, qv, is_rxq))</div><div class='add'>+	if (qv &amp;&amp; __idpf_set_q_coalesce(ec, q_coal, qv, is_rxq))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1200,23 +1513,29 @@ static int idpf_set_coalesce(struct net_device *netdev,</div><div class='ctx'> 			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct idpf_vport_user_config_data *user_config;</div><div class='add'>+	struct idpf_q_coalesce *q_coal;</div><div class='ctx'> 	struct idpf_vport *vport;</div><div class='ctx'> 	int i, err = 0;</div><div class='ctx'> </div><div class='add'>+	user_config = &amp;np-&gt;adapter-&gt;vport_config[np-&gt;vport_idx]-&gt;user_config;</div><div class='add'>+</div><div class='ctx'> 	idpf_vport_ctrl_lock(netdev);</div><div class='ctx'> 	vport = idpf_netdev_to_vport(netdev);</div><div class='ctx'> </div><div class='del'>-	if (np-&gt;state != __IDPF_VPORT_UP)</div><div class='add'>+	if (!test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='ctx'> 		goto unlock_mutex;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; vport-&gt;num_txq; i++) {</div><div class='del'>-		err = idpf_set_q_coalesce(vport, ec, i, false);</div><div class='add'>+		q_coal = &amp;user_config-&gt;q_coalesce[i];</div><div class='add'>+		err = idpf_set_q_coalesce(vport, q_coal, ec, i, false);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto unlock_mutex;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; vport-&gt;num_rxq; i++) {</div><div class='del'>-		err = idpf_set_q_coalesce(vport, ec, i, true);</div><div class='add'>+		q_coal = &amp;user_config-&gt;q_coalesce[i];</div><div class='add'>+		err = idpf_set_q_coalesce(vport, q_coal, ec, i, true);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto unlock_mutex;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1238,20 +1557,25 @@ unlock_mutex:</div><div class='ctx'> static int idpf_set_per_q_coalesce(struct net_device *netdev, u32 q_num,</div><div class='ctx'> 				   struct ethtool_coalesce *ec)</div><div class='ctx'> {</div><div class='add'>+	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct idpf_vport_user_config_data *user_config;</div><div class='add'>+	struct idpf_q_coalesce *q_coal;</div><div class='ctx'> 	struct idpf_vport *vport;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	idpf_vport_ctrl_lock(netdev);</div><div class='ctx'> 	vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+	user_config = &amp;np-&gt;adapter-&gt;vport_config[np-&gt;vport_idx]-&gt;user_config;</div><div class='add'>+	q_coal = &amp;user_config-&gt;q_coalesce[q_num];</div><div class='ctx'> </div><div class='del'>-	err = idpf_set_q_coalesce(vport, ec, q_num, false);</div><div class='add'>+	err = idpf_set_q_coalesce(vport, q_coal, ec, q_num, false);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		idpf_vport_ctrl_unlock(netdev);</div><div class='ctx'> </div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = idpf_set_q_coalesce(vport, ec, q_num, true);</div><div class='add'>+	err = idpf_set_q_coalesce(vport, q_coal, ec, q_num, true);</div><div class='ctx'> </div><div class='ctx'> 	idpf_vport_ctrl_unlock(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1296,27 +1620,142 @@ static void idpf_set_msglevel(struct net_device *netdev, u32 data)</div><div class='ctx'> static int idpf_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 				   struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_vport *vport;</div><div class='del'>-</div><div class='del'>-	idpf_vport_ctrl_lock(netdev);</div><div class='del'>-	vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	ethtool_link_ksettings_zero_link_mode(cmd, supported);</div><div class='ctx'> 	cmd-&gt;base.autoneg = AUTONEG_DISABLE;</div><div class='ctx'> 	cmd-&gt;base.port = PORT_NONE;</div><div class='del'>-	if (vport-&gt;link_up) {</div><div class='add'>+	if (netif_carrier_ok(netdev)) {</div><div class='ctx'> 		cmd-&gt;base.duplex = DUPLEX_FULL;</div><div class='del'>-		cmd-&gt;base.speed = vport-&gt;link_speed_mbps;</div><div class='add'>+		cmd-&gt;base.speed = np-&gt;link_speed_mbps;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		cmd-&gt;base.duplex = DUPLEX_UNKNOWN;</div><div class='ctx'> 		cmd-&gt;base.speed = SPEED_UNKNOWN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	idpf_vport_ctrl_unlock(netdev);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * idpf_get_timestamp_filters - Get the supported timestamping mode</div><div class='add'>+ * @vport: Virtual port structure</div><div class='add'>+ * @info: ethtool timestamping info structure</div><div class='add'>+ *</div><div class='add'>+ * Get the Tx/Rx timestamp filters.</div><div class='add'>+ */</div><div class='add'>+static void idpf_get_timestamp_filters(const struct idpf_vport *vport,</div><div class='add'>+				       struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	info-&gt;so_timestamping = SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+				SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+</div><div class='add'>+	info-&gt;tx_types = BIT(HWTSTAMP_TX_OFF);</div><div class='add'>+	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_NONE) | BIT(HWTSTAMP_FILTER_ALL);</div><div class='add'>+</div><div class='add'>+	if (!vport-&gt;tx_tstamp_caps ||</div><div class='add'>+	    vport-&gt;adapter-&gt;ptp-&gt;tx_tstamp_access == IDPF_PTP_NONE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	info-&gt;so_timestamping |= SOF_TIMESTAMPING_TX_SOFTWARE |</div><div class='add'>+				 SOF_TIMESTAMPING_TX_HARDWARE;</div><div class='add'>+</div><div class='add'>+	info-&gt;tx_types |= BIT(HWTSTAMP_TX_ON);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_get_ts_info - Get device PHC association</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ * @info: ethtool timestamping info structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_get_ts_info(struct net_device *netdev,</div><div class='add'>+			    struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct idpf_vport *vport;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!mutex_trylock(&amp;np-&gt;adapter-&gt;vport_ctrl_lock))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+</div><div class='add'>+	if (!vport-&gt;adapter-&gt;ptp) {</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (idpf_is_cap_ena(vport-&gt;adapter, IDPF_OTHER_CAPS, VIRTCHNL2_CAP_PTP) &amp;&amp;</div><div class='add'>+	    vport-&gt;adapter-&gt;ptp-&gt;clock) {</div><div class='add'>+		info-&gt;phc_index = ptp_clock_index(vport-&gt;adapter-&gt;ptp-&gt;clock);</div><div class='add'>+		idpf_get_timestamp_filters(vport, info);</div><div class='add'>+	} else {</div><div class='add'>+		pci_dbg(vport-&gt;adapter-&gt;pdev, "PTP clock not detected\n");</div><div class='add'>+		err = ethtool_op_get_ts_info(netdev, info);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;np-&gt;adapter-&gt;vport_ctrl_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_get_ts_stats - Collect HW tstamping statistics</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ * @ts_stats: HW timestamping stats structure</div><div class='add'>+ *</div><div class='add'>+ * Collect HW timestamping statistics including successfully timestamped</div><div class='add'>+ * packets, discarded due to illegal values, flushed during releasing PTP and</div><div class='add'>+ * skipped due to lack of the free index.</div><div class='add'>+ */</div><div class='add'>+static void idpf_get_ts_stats(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_ts_stats *ts_stats)</div><div class='add'>+{</div><div class='add'>+	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	struct idpf_vport *vport;</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	idpf_vport_ctrl_lock(netdev);</div><div class='add'>+	vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;vport-&gt;tstamp_stats.stats_sync);</div><div class='add'>+		ts_stats-&gt;pkts = u64_stats_read(&amp;vport-&gt;tstamp_stats.packets);</div><div class='add'>+		ts_stats-&gt;lost = u64_stats_read(&amp;vport-&gt;tstamp_stats.flushed);</div><div class='add'>+		ts_stats-&gt;err = u64_stats_read(&amp;vport-&gt;tstamp_stats.discarded);</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;vport-&gt;tstamp_stats.stats_sync, start));</div><div class='add'>+</div><div class='add'>+	if (!test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	for (u16 i = 0; i &lt; vport-&gt;num_txq_grp; i++) {</div><div class='add'>+		struct idpf_txq_group *txq_grp = &amp;vport-&gt;txq_grps[i];</div><div class='add'>+</div><div class='add'>+		for (u16 j = 0; j &lt; txq_grp-&gt;num_txq; j++) {</div><div class='add'>+			struct idpf_tx_queue *txq = txq_grp-&gt;txqs[j];</div><div class='add'>+			struct idpf_tx_queue_stats *stats;</div><div class='add'>+			u64 ts;</div><div class='add'>+</div><div class='add'>+			if (!txq)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			stats = &amp;txq-&gt;q_stats;</div><div class='add'>+			do {</div><div class='add'>+				start = u64_stats_fetch_begin(&amp;txq-&gt;stats_sync);</div><div class='add'>+</div><div class='add'>+				ts = u64_stats_read(&amp;stats-&gt;tstamp_skipped);</div><div class='add'>+			} while (u64_stats_fetch_retry(&amp;txq-&gt;stats_sync,</div><div class='add'>+						       start));</div><div class='add'>+</div><div class='add'>+			ts_stats-&gt;lost += ts;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	idpf_vport_ctrl_unlock(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops idpf_ethtool_ops = {</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_ADAPTIVE,</div><div class='hunk'>@@ -1333,6 +1772,8 @@ static const struct ethtool_ops idpf_ethtool_ops = {</div><div class='ctx'> 	.get_sset_count		= idpf_get_sset_count,</div><div class='ctx'> 	.get_channels		= idpf_get_channels,</div><div class='ctx'> 	.get_rxnfc		= idpf_get_rxnfc,</div><div class='add'>+	.set_rxnfc		= idpf_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= idpf_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_key_size	= idpf_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh_indir_size	= idpf_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= idpf_get_rxfh,</div><div class='hunk'>@@ -1341,6 +1782,8 @@ static const struct ethtool_ops idpf_ethtool_ops = {</div><div class='ctx'> 	.get_ringparam		= idpf_get_ringparam,</div><div class='ctx'> 	.set_ringparam		= idpf_set_ringparam,</div><div class='ctx'> 	.get_link_ksettings	= idpf_get_link_ksettings,</div><div class='add'>+	.get_ts_info		= idpf_get_ts_info,</div><div class='add'>+	.get_ts_stats		= idpf_get_ts_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_idc.c b/drivers/net/ethernet/intel/idpf/idpf_idc.c<br/>new file mode 100644<br/>index 000000000000..7e20a07e98e5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_idc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_idc.c</a></div><div class='hunk'>@@ -0,0 +1,503 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include "idpf.h"</div><div class='add'>+#include "idpf_virtchnl.h"</div><div class='add'>+</div><div class='add'>+static DEFINE_IDA(idpf_idc_ida);</div><div class='add'>+</div><div class='add'>+#define IDPF_IDC_MAX_ADEV_NAME_LEN	15</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_init - Called to initialize IDC</div><div class='add'>+ * @adapter: driver private data structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or cap not enabled, error code on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_idc_init(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!idpf_is_rdma_cap_ena(adapter) ||</div><div class='add'>+	    !adapter-&gt;dev_ops.idc_init)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = adapter-&gt;dev_ops.idc_init(adapter);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "failed to initialize idc: %d\n",</div><div class='add'>+			err);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_vport_adev_release - function to be mapped to aux dev's release op</div><div class='add'>+ * @dev: pointer to device to free</div><div class='add'>+ */</div><div class='add'>+static void idpf_vport_adev_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct iidc_rdma_vport_auxiliary_dev *iadev;</div><div class='add'>+</div><div class='add'>+	iadev = container_of(dev, struct iidc_rdma_vport_auxiliary_dev, adev.dev);</div><div class='add'>+	kfree(iadev);</div><div class='add'>+	iadev = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_plug_vport_aux_dev - allocate and register a vport Auxiliary device</div><div class='add'>+ * @cdev_info: IDC core device info pointer</div><div class='add'>+ * @vdev_info: IDC vport device info pointer</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_plug_vport_aux_dev(struct iidc_rdma_core_dev_info *cdev_info,</div><div class='add'>+				   struct iidc_rdma_vport_dev_info *vdev_info)</div><div class='add'>+{</div><div class='add'>+	struct iidc_rdma_vport_auxiliary_dev *iadev;</div><div class='add'>+	char name[IDPF_IDC_MAX_ADEV_NAME_LEN];</div><div class='add'>+	struct auxiliary_device *adev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	iadev = kzalloc(sizeof(*iadev), GFP_KERNEL);</div><div class='add'>+	if (!iadev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	adev = &amp;iadev-&gt;adev;</div><div class='add'>+	vdev_info-&gt;adev = &amp;iadev-&gt;adev;</div><div class='add'>+	iadev-&gt;vdev_info = vdev_info;</div><div class='add'>+</div><div class='add'>+	ret = ida_alloc(&amp;idpf_idc_ida, GFP_KERNEL);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_err("failed to allocate unique device ID for Auxiliary driver\n");</div><div class='add'>+		goto err_ida_alloc;</div><div class='add'>+	}</div><div class='add'>+	adev-&gt;id = ret;</div><div class='add'>+	adev-&gt;dev.release = idpf_vport_adev_release;</div><div class='add'>+	adev-&gt;dev.parent = &amp;cdev_info-&gt;pdev-&gt;dev;</div><div class='add'>+	sprintf(name, "%04x.rdma.vdev", cdev_info-&gt;pdev-&gt;vendor);</div><div class='add'>+	adev-&gt;name = name;</div><div class='add'>+</div><div class='add'>+	ret = auxiliary_device_init(adev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_aux_dev_init;</div><div class='add'>+</div><div class='add'>+	ret = auxiliary_device_add(adev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_aux_dev_add;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_aux_dev_add:</div><div class='add'>+	auxiliary_device_uninit(adev);</div><div class='add'>+err_aux_dev_init:</div><div class='add'>+	ida_free(&amp;idpf_idc_ida, adev-&gt;id);</div><div class='add'>+err_ida_alloc:</div><div class='add'>+	vdev_info-&gt;adev = NULL;</div><div class='add'>+	kfree(iadev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_init_aux_vport_dev - initialize vport Auxiliary Device(s)</div><div class='add'>+ * @vport: virtual port data struct</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_idc_init_aux_vport_dev(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = vport-&gt;adapter;</div><div class='add'>+	struct iidc_rdma_vport_dev_info *vdev_info;</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev_info;</div><div class='add'>+	struct virtchnl2_create_vport *vport_msg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	vport_msg = (struct virtchnl2_create_vport *)</div><div class='add'>+			adapter-&gt;vport_params_recvd[vport-&gt;idx];</div><div class='add'>+</div><div class='add'>+	if (!(le16_to_cpu(vport_msg-&gt;vport_flags) &amp; VIRTCHNL2_VPORT_ENABLE_RDMA))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vport-&gt;vdev_info = kzalloc(sizeof(*vdev_info), GFP_KERNEL);</div><div class='add'>+	if (!vport-&gt;vdev_info)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cdev_info = vport-&gt;adapter-&gt;cdev_info;</div><div class='add'>+</div><div class='add'>+	vdev_info = vport-&gt;vdev_info;</div><div class='add'>+	vdev_info-&gt;vport_id = vport-&gt;vport_id;</div><div class='add'>+	vdev_info-&gt;netdev = vport-&gt;netdev;</div><div class='add'>+	vdev_info-&gt;core_adev = cdev_info-&gt;adev;</div><div class='add'>+</div><div class='add'>+	err = idpf_plug_vport_aux_dev(cdev_info, vdev_info);</div><div class='add'>+	if (err) {</div><div class='add'>+		vport-&gt;vdev_info = NULL;</div><div class='add'>+		kfree(vdev_info);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_vdev_mtu_event - Function to handle IDC vport mtu change events</div><div class='add'>+ * @vdev_info: IDC vport device info pointer</div><div class='add'>+ * @event_type: type of event to pass to handler</div><div class='add'>+ */</div><div class='add'>+void idpf_idc_vdev_mtu_event(struct iidc_rdma_vport_dev_info *vdev_info,</div><div class='add'>+			     enum iidc_rdma_event_type event_type)</div><div class='add'>+{</div><div class='add'>+	struct iidc_rdma_vport_auxiliary_drv *iadrv;</div><div class='add'>+	struct iidc_rdma_event event = { };</div><div class='add'>+	struct auxiliary_device *adev;</div><div class='add'>+</div><div class='add'>+	if (!vdev_info)</div><div class='add'>+		/* RDMA is not enabled */</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	set_bit(event_type, event.type);</div><div class='add'>+</div><div class='add'>+	device_lock(&amp;vdev_info-&gt;adev-&gt;dev);</div><div class='add'>+	adev = vdev_info-&gt;adev;</div><div class='add'>+	if (!adev || !adev-&gt;dev.driver)</div><div class='add'>+		goto unlock;</div><div class='add'>+	iadrv = container_of(adev-&gt;dev.driver,</div><div class='add'>+			     struct iidc_rdma_vport_auxiliary_drv,</div><div class='add'>+			     adrv.driver);</div><div class='add'>+	if (iadrv-&gt;event_handler)</div><div class='add'>+		iadrv-&gt;event_handler(vdev_info, &amp;event);</div><div class='add'>+unlock:</div><div class='add'>+	device_unlock(&amp;vdev_info-&gt;adev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_core_adev_release - function to be mapped to aux dev's release op</div><div class='add'>+ * @dev: pointer to device to free</div><div class='add'>+ */</div><div class='add'>+static void idpf_core_adev_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct iidc_rdma_core_auxiliary_dev *iadev;</div><div class='add'>+</div><div class='add'>+	iadev = container_of(dev, struct iidc_rdma_core_auxiliary_dev, adev.dev);</div><div class='add'>+	kfree(iadev);</div><div class='add'>+	iadev = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_plug_core_aux_dev - allocate and register an Auxiliary device</div><div class='add'>+ * @cdev_info: IDC core device info pointer</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_plug_core_aux_dev(struct iidc_rdma_core_dev_info *cdev_info)</div><div class='add'>+{</div><div class='add'>+	struct iidc_rdma_core_auxiliary_dev *iadev;</div><div class='add'>+	char name[IDPF_IDC_MAX_ADEV_NAME_LEN];</div><div class='add'>+	struct auxiliary_device *adev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	iadev = kzalloc(sizeof(*iadev), GFP_KERNEL);</div><div class='add'>+	if (!iadev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	adev = &amp;iadev-&gt;adev;</div><div class='add'>+	cdev_info-&gt;adev = adev;</div><div class='add'>+	iadev-&gt;cdev_info = cdev_info;</div><div class='add'>+</div><div class='add'>+	ret = ida_alloc(&amp;idpf_idc_ida, GFP_KERNEL);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_err("failed to allocate unique device ID for Auxiliary driver\n");</div><div class='add'>+		goto err_ida_alloc;</div><div class='add'>+	}</div><div class='add'>+	adev-&gt;id = ret;</div><div class='add'>+	adev-&gt;dev.release = idpf_core_adev_release;</div><div class='add'>+	adev-&gt;dev.parent = &amp;cdev_info-&gt;pdev-&gt;dev;</div><div class='add'>+	sprintf(name, "%04x.rdma.core", cdev_info-&gt;pdev-&gt;vendor);</div><div class='add'>+	adev-&gt;name = name;</div><div class='add'>+</div><div class='add'>+	ret = auxiliary_device_init(adev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_aux_dev_init;</div><div class='add'>+</div><div class='add'>+	ret = auxiliary_device_add(adev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_aux_dev_add;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_aux_dev_add:</div><div class='add'>+	auxiliary_device_uninit(adev);</div><div class='add'>+err_aux_dev_init:</div><div class='add'>+	ida_free(&amp;idpf_idc_ida, adev-&gt;id);</div><div class='add'>+err_ida_alloc:</div><div class='add'>+	cdev_info-&gt;adev = NULL;</div><div class='add'>+	kfree(iadev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_unplug_aux_dev - unregister and free an Auxiliary device</div><div class='add'>+ * @adev: auxiliary device struct</div><div class='add'>+ */</div><div class='add'>+static void idpf_unplug_aux_dev(struct auxiliary_device *adev)</div><div class='add'>+{</div><div class='add'>+	if (!adev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ida_free(&amp;idpf_idc_ida, adev-&gt;id);</div><div class='add'>+</div><div class='add'>+	auxiliary_device_delete(adev);</div><div class='add'>+	auxiliary_device_uninit(adev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_issue_reset_event - Function to handle reset IDC event</div><div class='add'>+ * @cdev_info: IDC core device info pointer</div><div class='add'>+ */</div><div class='add'>+void idpf_idc_issue_reset_event(struct iidc_rdma_core_dev_info *cdev_info)</div><div class='add'>+{</div><div class='add'>+	enum iidc_rdma_event_type event_type = IIDC_RDMA_EVENT_WARN_RESET;</div><div class='add'>+	struct iidc_rdma_core_auxiliary_drv *iadrv;</div><div class='add'>+	struct iidc_rdma_event event = { };</div><div class='add'>+	struct auxiliary_device *adev;</div><div class='add'>+</div><div class='add'>+	if (!cdev_info)</div><div class='add'>+		/* RDMA is not enabled */</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	set_bit(event_type, event.type);</div><div class='add'>+</div><div class='add'>+	device_lock(&amp;cdev_info-&gt;adev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	adev = cdev_info-&gt;adev;</div><div class='add'>+	if (!adev || !adev-&gt;dev.driver)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	iadrv = container_of(adev-&gt;dev.driver,</div><div class='add'>+			     struct iidc_rdma_core_auxiliary_drv,</div><div class='add'>+			     adrv.driver);</div><div class='add'>+	if (iadrv-&gt;event_handler)</div><div class='add'>+		iadrv-&gt;event_handler(cdev_info, &amp;event);</div><div class='add'>+unlock:</div><div class='add'>+	device_unlock(&amp;cdev_info-&gt;adev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_vport_dev_up - called when CORE is ready for vport aux devs</div><div class='add'>+ * @adapter: private data struct</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_idc_vport_dev_up(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int i, err = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_alloc_vports; i++) {</div><div class='add'>+		struct idpf_vport *vport = adapter-&gt;vports[i];</div><div class='add'>+</div><div class='add'>+		if (!vport)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!vport-&gt;vdev_info)</div><div class='add'>+			err = idpf_idc_init_aux_vport_dev(vport);</div><div class='add'>+		else</div><div class='add'>+			err = idpf_plug_vport_aux_dev(vport-&gt;adapter-&gt;cdev_info,</div><div class='add'>+						      vport-&gt;vdev_info);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_vport_dev_down - called CORE is leaving vport aux dev support state</div><div class='add'>+ * @adapter: private data struct</div><div class='add'>+ */</div><div class='add'>+static void idpf_idc_vport_dev_down(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_alloc_vports; i++) {</div><div class='add'>+		struct idpf_vport *vport = adapter-&gt;vports[i];</div><div class='add'>+</div><div class='add'>+		if (!vport)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		idpf_unplug_aux_dev(vport-&gt;vdev_info-&gt;adev);</div><div class='add'>+		vport-&gt;vdev_info-&gt;adev = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_vport_dev_ctrl - Called by an Auxiliary Driver</div><div class='add'>+ * @cdev_info: IDC core device info pointer</div><div class='add'>+ * @up: RDMA core driver status</div><div class='add'>+ *</div><div class='add'>+ * This callback function is accessed by an Auxiliary Driver to indicate</div><div class='add'>+ * whether core driver is ready to support vport driver load or if vport</div><div class='add'>+ * drivers need to be taken down.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_idc_vport_dev_ctrl(struct iidc_rdma_core_dev_info *cdev_info, bool up)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = pci_get_drvdata(cdev_info-&gt;pdev);</div><div class='add'>+</div><div class='add'>+	if (up)</div><div class='add'>+		return idpf_idc_vport_dev_up(adapter);</div><div class='add'>+</div><div class='add'>+	idpf_idc_vport_dev_down(adapter);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(idpf_idc_vport_dev_ctrl);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_request_reset - Called by an Auxiliary Driver</div><div class='add'>+ * @cdev_info: IDC core device info pointer</div><div class='add'>+ * @reset_type: function, core or other</div><div class='add'>+ *</div><div class='add'>+ * This callback function is accessed by an Auxiliary Driver to request a reset</div><div class='add'>+ * on the Auxiliary Device.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_idc_request_reset(struct iidc_rdma_core_dev_info *cdev_info,</div><div class='add'>+			   enum iidc_rdma_reset_type __always_unused reset_type)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = pci_get_drvdata(cdev_info-&gt;pdev);</div><div class='add'>+</div><div class='add'>+	if (!idpf_is_reset_in_prog(adapter)) {</div><div class='add'>+		set_bit(IDPF_HR_FUNC_RESET, adapter-&gt;flags);</div><div class='add'>+		queue_delayed_work(adapter-&gt;vc_event_wq,</div><div class='add'>+				   &amp;adapter-&gt;vc_event_task,</div><div class='add'>+				   msecs_to_jiffies(10));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(idpf_idc_request_reset);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_init_msix_data - initialize MSIX data for the cdev_info structure</div><div class='add'>+ * @adapter: driver private data structure</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+idpf_idc_init_msix_data(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev_info;</div><div class='add'>+	struct iidc_rdma_priv_dev_info *privd;</div><div class='add'>+</div><div class='add'>+	if (!adapter-&gt;rdma_msix_entries)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cdev_info = adapter-&gt;cdev_info;</div><div class='add'>+	privd = cdev_info-&gt;iidc_priv;</div><div class='add'>+</div><div class='add'>+	privd-&gt;msix_entries = adapter-&gt;rdma_msix_entries;</div><div class='add'>+	privd-&gt;msix_count = adapter-&gt;num_rdma_msix_entries;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_init_aux_core_dev - initialize Auxiliary Device(s)</div><div class='add'>+ * @adapter: driver private data structure</div><div class='add'>+ * @ftype: PF or VF</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_idc_init_aux_core_dev(struct idpf_adapter *adapter,</div><div class='add'>+			       enum iidc_function_type ftype)</div><div class='add'>+{</div><div class='add'>+	struct iidc_rdma_core_dev_info *cdev_info;</div><div class='add'>+	struct iidc_rdma_priv_dev_info *privd;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;cdev_info = kzalloc(sizeof(*cdev_info), GFP_KERNEL);</div><div class='add'>+	if (!adapter-&gt;cdev_info)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	cdev_info = adapter-&gt;cdev_info;</div><div class='add'>+</div><div class='add'>+	privd = kzalloc(sizeof(*privd), GFP_KERNEL);</div><div class='add'>+	if (!privd) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_privd_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cdev_info-&gt;iidc_priv = privd;</div><div class='add'>+	cdev_info-&gt;pdev = adapter-&gt;pdev;</div><div class='add'>+	cdev_info-&gt;rdma_protocol = IIDC_RDMA_PROTOCOL_ROCEV2;</div><div class='add'>+	privd-&gt;ftype = ftype;</div><div class='add'>+</div><div class='add'>+	privd-&gt;mapped_mem_regions =</div><div class='add'>+		kcalloc(adapter-&gt;hw.num_lan_regs,</div><div class='add'>+			sizeof(struct iidc_rdma_lan_mapped_mem_region),</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+	if (!privd-&gt;mapped_mem_regions) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_plug_aux_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	privd-&gt;num_memory_regions = cpu_to_le16(adapter-&gt;hw.num_lan_regs);</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;hw.num_lan_regs; i++) {</div><div class='add'>+		privd-&gt;mapped_mem_regions[i].region_addr =</div><div class='add'>+			adapter-&gt;hw.lan_regs[i].vaddr;</div><div class='add'>+		privd-&gt;mapped_mem_regions[i].size =</div><div class='add'>+			cpu_to_le64(adapter-&gt;hw.lan_regs[i].addr_len);</div><div class='add'>+		privd-&gt;mapped_mem_regions[i].start_offset =</div><div class='add'>+			cpu_to_le64(adapter-&gt;hw.lan_regs[i].addr_start);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idpf_idc_init_msix_data(adapter);</div><div class='add'>+</div><div class='add'>+	err = idpf_plug_core_aux_dev(cdev_info);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_mem_regions;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_mem_regions:</div><div class='add'>+	kfree(privd-&gt;mapped_mem_regions);</div><div class='add'>+	privd-&gt;mapped_mem_regions = NULL;</div><div class='add'>+err_plug_aux_dev:</div><div class='add'>+	kfree(privd);</div><div class='add'>+err_privd_alloc:</div><div class='add'>+	kfree(cdev_info);</div><div class='add'>+	adapter-&gt;cdev_info = NULL;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_deinit_core_aux_device - de-initialize Auxiliary Device(s)</div><div class='add'>+ * @cdev_info: IDC core device info pointer</div><div class='add'>+ */</div><div class='add'>+void idpf_idc_deinit_core_aux_device(struct iidc_rdma_core_dev_info *cdev_info)</div><div class='add'>+{</div><div class='add'>+	struct iidc_rdma_priv_dev_info *privd;</div><div class='add'>+</div><div class='add'>+	if (!cdev_info)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	idpf_unplug_aux_dev(cdev_info-&gt;adev);</div><div class='add'>+</div><div class='add'>+	privd = cdev_info-&gt;iidc_priv;</div><div class='add'>+	kfree(privd-&gt;mapped_mem_regions);</div><div class='add'>+	kfree(privd);</div><div class='add'>+	kfree(cdev_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_deinit_vport_aux_device - de-initialize Auxiliary Device(s)</div><div class='add'>+ * @vdev_info: IDC vport device info pointer</div><div class='add'>+ */</div><div class='add'>+void idpf_idc_deinit_vport_aux_device(struct iidc_rdma_vport_dev_info *vdev_info)</div><div class='add'>+{</div><div class='add'>+	if (!vdev_info)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	idpf_unplug_aux_dev(vdev_info-&gt;adev);</div><div class='add'>+</div><div class='add'>+	kfree(vdev_info);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h b/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h<br/>index 24edb8a6ec2e..cc9aa2b6a14a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h</a></div><div class='hunk'>@@ -53,6 +53,10 @@</div><div class='ctx'> #define PF_FW_ATQH_ATQH_M		GENMASK(9, 0)</div><div class='ctx'> #define PF_FW_ATQT			(PF_FW_BASE + 0x24)</div><div class='ctx'> </div><div class='add'>+/* Timesync registers */</div><div class='add'>+#define PF_GLTSYN_CMD_SYNC_EXEC_CMD_M	GENMASK(1, 0)</div><div class='add'>+#define PF_GLTSYN_CMD_SYNC_SHTIME_EN_M	BIT(2)</div><div class='add'>+</div><div class='ctx'> /* Interrupts */</div><div class='ctx'> #define PF_GLINT_BASE			0x08900000</div><div class='ctx'> #define PF_GLINT_DYN_CTL(_INT)		(PF_GLINT_BASE + ((_INT) * 0x1000))</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h b/drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h<br/>index 8c7f8ef8f1a1..20d5af64e750 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h</a></div><div class='hunk'>@@ -186,13 +186,17 @@ struct idpf_base_tx_desc {</div><div class='ctx'> 	__le64 qw1; /* type_cmd_offset_bsz_l2tag1 */</div><div class='ctx'> }; /* read used with buffer queues */</div><div class='ctx'> </div><div class='del'>-struct idpf_splitq_tx_compl_desc {</div><div class='add'>+struct idpf_splitq_4b_tx_compl_desc {</div><div class='ctx'> 	/* qid=[10:0] comptype=[13:11] rsvd=[14] gen=[15] */</div><div class='ctx'> 	__le16 qid_comptype_gen;</div><div class='ctx'> 	union {</div><div class='ctx'> 		__le16 q_head; /* Queue head */</div><div class='ctx'> 		__le16 compl_tag; /* Completion tag */</div><div class='ctx'> 	} q_head_compl_tag;</div><div class='add'>+}; /* writeback used with completion queues */</div><div class='add'>+</div><div class='add'>+struct idpf_splitq_tx_compl_desc {</div><div class='add'>+	struct idpf_splitq_4b_tx_compl_desc common;</div><div class='ctx'> 	u8 ts[3];</div><div class='ctx'> 	u8 rsvd; /* Reserved */</div><div class='ctx'> }; /* writeback used with completion queues */</div><div class='hunk'>@@ -282,7 +286,18 @@ struct idpf_flex_tx_tso_ctx_qw {</div><div class='ctx'> 	u8 flex;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct idpf_flex_tx_ctx_desc {</div><div class='add'>+union idpf_flex_tx_ctx_desc {</div><div class='add'>+	/* DTYPE = IDPF_TX_DESC_DTYPE_CTX (0x01) */</div><div class='add'>+	struct {</div><div class='add'>+		__le64 qw0;</div><div class='add'>+#define IDPF_TX_CTX_L2TAG2_M	GENMASK_ULL(47, 32)</div><div class='add'>+		__le64 qw1;</div><div class='add'>+#define IDPF_TX_CTX_DTYPE_M	GENMASK_ULL(3, 0)</div><div class='add'>+#define IDPF_TX_CTX_CMD_M	GENMASK_ULL(15, 4)</div><div class='add'>+#define IDPF_TX_CTX_TSYN_REG_M	GENMASK_ULL(47, 30)</div><div class='add'>+#define IDPF_TX_CTX_MSS_M	GENMASK_ULL(50, 63)</div><div class='add'>+	} tsyn;</div><div class='add'>+</div><div class='ctx'> 	/* DTYPE = IDPF_TX_DESC_DTYPE_FLEX_TSO_CTX (0x05) */</div><div class='ctx'> 	struct {</div><div class='ctx'> 		struct idpf_flex_tx_tso_ctx_qw qw0;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_lib.c b/drivers/net/ethernet/intel/idpf/idpf_lib.c<br/>index 4f20343e49a9..7a7e101afeb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_lib.c</a></div><div class='hunk'>@@ -3,6 +3,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "idpf.h"</div><div class='ctx'> #include "idpf_virtchnl.h"</div><div class='add'>+#include "idpf_ptp.h"</div><div class='add'>+#include "xdp.h"</div><div class='add'>+#include "xsk.h"</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops idpf_netdev_ops;</div><div class='ctx'> </div><div class='hunk'>@@ -87,6 +90,8 @@ void idpf_intr_rel(struct idpf_adapter *adapter)</div><div class='ctx'> 	idpf_deinit_vector_stack(adapter);</div><div class='ctx'> 	kfree(adapter-&gt;msix_entries);</div><div class='ctx'> 	adapter-&gt;msix_entries = NULL;</div><div class='add'>+	kfree(adapter-&gt;rdma_msix_entries);</div><div class='add'>+	adapter-&gt;rdma_msix_entries = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -144,22 +149,6 @@ static int idpf_mb_intr_req_irq(struct idpf_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_set_mb_vec_id - Set vector index for mailbox</div><div class='del'>- * @adapter: adapter structure to access the vector chunks</div><div class='del'>- *</div><div class='del'>- * The first vector id in the requested vector chunks from the CP is for</div><div class='del'>- * the mailbox</div><div class='del'>- */</div><div class='del'>-static void idpf_set_mb_vec_id(struct idpf_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	if (adapter-&gt;req_vec_chunks)</div><div class='del'>-		adapter-&gt;mb_vector.v_idx =</div><div class='del'>-			le16_to_cpu(adapter-&gt;caps.mailbox_vector_id);</div><div class='del'>-	else</div><div class='del'>-		adapter-&gt;mb_vector.v_idx = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * idpf_mb_intr_init - Initialize the mailbox interrupt</div><div class='ctx'>  * @adapter: adapter structure to store the mailbox vector</div><div class='ctx'>  */</div><div class='hunk'>@@ -314,13 +303,33 @@ rel_lock:</div><div class='ctx'>  */</div><div class='ctx'> int idpf_intr_req(struct idpf_adapter *adapter)</div><div class='ctx'> {</div><div class='add'>+	u16 num_lan_vecs, min_lan_vecs, num_rdma_vecs = 0, min_rdma_vecs = 0;</div><div class='ctx'> 	u16 default_vports = idpf_get_default_vports(adapter);</div><div class='ctx'> 	int num_q_vecs, total_vecs, num_vec_ids;</div><div class='del'>-	int min_vectors, v_actual, err;</div><div class='add'>+	int min_vectors, actual_vecs, err;</div><div class='ctx'> 	unsigned int vector;</div><div class='ctx'> 	u16 *vecids;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	total_vecs = idpf_get_reserved_vecs(adapter);</div><div class='add'>+	num_lan_vecs = total_vecs;</div><div class='add'>+	if (idpf_is_rdma_cap_ena(adapter)) {</div><div class='add'>+		num_rdma_vecs = idpf_get_reserved_rdma_vecs(adapter);</div><div class='add'>+		min_rdma_vecs = IDPF_MIN_RDMA_VEC;</div><div class='add'>+</div><div class='add'>+		if (!num_rdma_vecs) {</div><div class='add'>+			/* If idpf_get_reserved_rdma_vecs is 0, vectors are</div><div class='add'>+			 * pulled from the LAN pool.</div><div class='add'>+			 */</div><div class='add'>+			num_rdma_vecs = min_rdma_vecs;</div><div class='add'>+		} else if (num_rdma_vecs &lt; min_rdma_vecs) {</div><div class='add'>+			dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				"Not enough vectors reserved for RDMA (min: %u, current: %u)\n",</div><div class='add'>+				min_rdma_vecs, num_rdma_vecs);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	num_q_vecs = total_vecs - IDPF_MBX_Q_VEC;</div><div class='ctx'> </div><div class='ctx'> 	err = idpf_send_alloc_vectors_msg(adapter, num_q_vecs);</div><div class='hunk'>@@ -331,52 +340,76 @@ int idpf_intr_req(struct idpf_adapter *adapter)</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	min_vectors = IDPF_MBX_Q_VEC + IDPF_MIN_Q_VEC * default_vports;</div><div class='del'>-	v_actual = pci_alloc_irq_vectors(adapter-&gt;pdev, min_vectors,</div><div class='del'>-					 total_vecs, PCI_IRQ_MSIX);</div><div class='del'>-	if (v_actual &lt; min_vectors) {</div><div class='del'>-		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to allocate MSIX vectors: %d\n",</div><div class='del'>-			v_actual);</div><div class='del'>-		err = -EAGAIN;</div><div class='add'>+	min_lan_vecs = IDPF_MBX_Q_VEC + IDPF_MIN_Q_VEC * default_vports;</div><div class='add'>+	min_vectors = min_lan_vecs + min_rdma_vecs;</div><div class='add'>+	actual_vecs = pci_alloc_irq_vectors(adapter-&gt;pdev, min_vectors,</div><div class='add'>+					    total_vecs, PCI_IRQ_MSIX);</div><div class='add'>+	if (actual_vecs &lt; 0) {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to allocate minimum MSIX vectors required: %d\n",</div><div class='add'>+			min_vectors);</div><div class='add'>+		err = actual_vecs;</div><div class='ctx'> 		goto send_dealloc_vecs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;msix_entries = kcalloc(v_actual, sizeof(struct msix_entry),</div><div class='del'>-					GFP_KERNEL);</div><div class='add'>+	if (idpf_is_rdma_cap_ena(adapter)) {</div><div class='add'>+		if (actual_vecs &lt; total_vecs) {</div><div class='add'>+			dev_warn(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				 "Warning: %d vectors requested, only %d available. Defaulting to minimum (%d) for RDMA and remaining for LAN.\n",</div><div class='add'>+				 total_vecs, actual_vecs, IDPF_MIN_RDMA_VEC);</div><div class='add'>+			num_rdma_vecs = IDPF_MIN_RDMA_VEC;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		adapter-&gt;rdma_msix_entries = kcalloc(num_rdma_vecs,</div><div class='add'>+						     sizeof(struct msix_entry),</div><div class='add'>+						     GFP_KERNEL);</div><div class='add'>+		if (!adapter-&gt;rdma_msix_entries) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_irq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	num_lan_vecs = actual_vecs - num_rdma_vecs;</div><div class='add'>+	adapter-&gt;msix_entries = kcalloc(num_lan_vecs, sizeof(struct msix_entry),</div><div class='add'>+					GFP_KERNEL);</div><div class='ctx'> 	if (!adapter-&gt;msix_entries) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		goto free_irq;</div><div class='add'>+		goto free_rdma_msix;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	idpf_set_mb_vec_id(adapter);</div><div class='add'>+	adapter-&gt;mb_vector.v_idx = le16_to_cpu(adapter-&gt;caps.mailbox_vector_id);</div><div class='ctx'> </div><div class='del'>-	vecids = kcalloc(total_vecs, sizeof(u16), GFP_KERNEL);</div><div class='add'>+	vecids = kcalloc(actual_vecs, sizeof(u16), GFP_KERNEL);</div><div class='ctx'> 	if (!vecids) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto free_msix;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	num_vec_ids = idpf_get_vec_ids(adapter, vecids, total_vecs,</div><div class='add'>+	num_vec_ids = idpf_get_vec_ids(adapter, vecids, actual_vecs,</div><div class='ctx'> 				       &amp;adapter-&gt;req_vec_chunks-&gt;vchunks);</div><div class='del'>-	if (num_vec_ids &lt; v_actual) {</div><div class='add'>+	if (num_vec_ids &lt; actual_vecs) {</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto free_vecids;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (vector = 0; vector &lt; v_actual; vector++) {</div><div class='add'>+	for (vector = 0; vector &lt; num_lan_vecs; vector++) {</div><div class='ctx'> 		adapter-&gt;msix_entries[vector].entry = vecids[vector];</div><div class='ctx'> 		adapter-&gt;msix_entries[vector].vector =</div><div class='ctx'> 			pci_irq_vector(adapter-&gt;pdev, vector);</div><div class='ctx'> 	}</div><div class='add'>+	for (i = 0; i &lt; num_rdma_vecs; vector++, i++) {</div><div class='add'>+		adapter-&gt;rdma_msix_entries[i].entry = vecids[vector];</div><div class='add'>+		adapter-&gt;rdma_msix_entries[i].vector =</div><div class='add'>+			pci_irq_vector(adapter-&gt;pdev, vector);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;num_req_msix = total_vecs;</div><div class='del'>-	adapter-&gt;num_msix_entries = v_actual;</div><div class='ctx'> 	/* 'num_avail_msix' is used to distribute excess vectors to the vports</div><div class='ctx'> 	 * after considering the minimum vectors required per each default</div><div class='ctx'> 	 * vport</div><div class='ctx'> 	 */</div><div class='del'>-	adapter-&gt;num_avail_msix = v_actual - min_vectors;</div><div class='add'>+	adapter-&gt;num_avail_msix = num_lan_vecs - min_lan_vecs;</div><div class='add'>+	adapter-&gt;num_msix_entries = num_lan_vecs;</div><div class='add'>+	if (idpf_is_rdma_cap_ena(adapter))</div><div class='add'>+		adapter-&gt;num_rdma_msix_entries = num_rdma_vecs;</div><div class='ctx'> </div><div class='ctx'> 	/* Fill MSIX vector lifo stack with vector indexes */</div><div class='ctx'> 	err = idpf_init_vector_stack(adapter);</div><div class='hunk'>@@ -398,6 +431,9 @@ free_vecids:</div><div class='ctx'> free_msix:</div><div class='ctx'> 	kfree(adapter-&gt;msix_entries);</div><div class='ctx'> 	adapter-&gt;msix_entries = NULL;</div><div class='add'>+free_rdma_msix:</div><div class='add'>+	kfree(adapter-&gt;rdma_msix_entries);</div><div class='add'>+	adapter-&gt;rdma_msix_entries = NULL;</div><div class='ctx'> free_irq:</div><div class='ctx'> 	pci_free_irq_vectors(adapter-&gt;pdev);</div><div class='ctx'> send_dealloc_vecs:</div><div class='hunk'>@@ -483,7 +519,7 @@ static int idpf_del_mac_filter(struct idpf_vport *vport,</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_bh(&amp;vport_config-&gt;mac_filter_list_lock);</div><div class='ctx'> </div><div class='del'>-	if (np-&gt;state == __IDPF_VPORT_UP) {</div><div class='add'>+	if (test_bit(IDPF_VPORT_UP, np-&gt;state)) {</div><div class='ctx'> 		int err;</div><div class='ctx'> </div><div class='ctx'> 		err = idpf_add_del_mac_filters(vport, np, false, async);</div><div class='hunk'>@@ -554,7 +590,7 @@ static int idpf_add_mac_filter(struct idpf_vport *vport,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	if (np-&gt;state == __IDPF_VPORT_UP)</div><div class='add'>+	if (test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='ctx'> 		err = idpf_add_del_mac_filters(vport, np, true, async);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -703,8 +739,10 @@ static int idpf_cfg_netdev(struct idpf_vport *vport)</div><div class='ctx'> {</div><div class='ctx'> 	struct idpf_adapter *adapter = vport-&gt;adapter;</div><div class='ctx'> 	struct idpf_vport_config *vport_config;</div><div class='add'>+	netdev_features_t other_offloads = 0;</div><div class='add'>+	netdev_features_t csum_offloads = 0;</div><div class='add'>+	netdev_features_t tso_offloads = 0;</div><div class='ctx'> 	netdev_features_t dflt_features;</div><div class='del'>-	netdev_features_t offloads = 0;</div><div class='ctx'> 	struct idpf_netdev_priv *np;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	u16 idx = vport-&gt;idx;</div><div class='hunk'>@@ -721,6 +759,7 @@ static int idpf_cfg_netdev(struct idpf_vport *vport)</div><div class='ctx'> 		np-&gt;vport = vport;</div><div class='ctx'> 		np-&gt;vport_idx = vport-&gt;idx;</div><div class='ctx'> 		np-&gt;vport_id = vport-&gt;vport_id;</div><div class='add'>+		np-&gt;max_tx_hdr_size = idpf_get_max_tx_hdr_size(adapter);</div><div class='ctx'> 		vport-&gt;netdev = netdev;</div><div class='ctx'> </div><div class='ctx'> 		return idpf_init_mac_addr(vport, netdev);</div><div class='hunk'>@@ -738,6 +777,8 @@ static int idpf_cfg_netdev(struct idpf_vport *vport)</div><div class='ctx'> 	np-&gt;adapter = adapter;</div><div class='ctx'> 	np-&gt;vport_idx = vport-&gt;idx;</div><div class='ctx'> 	np-&gt;vport_id = vport-&gt;vport_id;</div><div class='add'>+	np-&gt;max_tx_hdr_size = idpf_get_max_tx_hdr_size(adapter);</div><div class='add'>+	np-&gt;tx_max_bufs = idpf_get_max_tx_bufs(adapter);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;np-&gt;stats_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -766,54 +807,40 @@ static int idpf_cfg_netdev(struct idpf_vport *vport)</div><div class='ctx'> </div><div class='ctx'> 	if (idpf_is_cap_ena_all(adapter, IDPF_RSS_CAPS, IDPF_CAP_RSS))</div><div class='ctx'> 		dflt_features |= NETIF_F_RXHASH;</div><div class='del'>-	if (idpf_is_cap_ena_all(adapter, IDPF_CSUM_CAPS, IDPF_CAP_RX_CSUM_L4V4))</div><div class='del'>-		dflt_features |= NETIF_F_IP_CSUM;</div><div class='del'>-	if (idpf_is_cap_ena_all(adapter, IDPF_CSUM_CAPS, IDPF_CAP_RX_CSUM_L4V6))</div><div class='del'>-		dflt_features |= NETIF_F_IPV6_CSUM;</div><div class='add'>+	if (idpf_is_cap_ena(adapter, IDPF_OTHER_CAPS,</div><div class='add'>+			    VIRTCHNL2_CAP_FLOW_STEER) &amp;&amp;</div><div class='add'>+	    idpf_vport_is_cap_ena(vport, VIRTCHNL2_VPORT_SIDEBAND_FLOW_STEER))</div><div class='add'>+		dflt_features |= NETIF_F_NTUPLE;</div><div class='add'>+	if (idpf_is_cap_ena_all(adapter, IDPF_CSUM_CAPS, IDPF_CAP_TX_CSUM_L4V4))</div><div class='add'>+		csum_offloads |= NETIF_F_IP_CSUM;</div><div class='add'>+	if (idpf_is_cap_ena_all(adapter, IDPF_CSUM_CAPS, IDPF_CAP_TX_CSUM_L4V6))</div><div class='add'>+		csum_offloads |= NETIF_F_IPV6_CSUM;</div><div class='ctx'> 	if (idpf_is_cap_ena(adapter, IDPF_CSUM_CAPS, IDPF_CAP_RX_CSUM))</div><div class='del'>-		dflt_features |= NETIF_F_RXCSUM;</div><div class='del'>-	if (idpf_is_cap_ena_all(adapter, IDPF_CSUM_CAPS, IDPF_CAP_SCTP_CSUM))</div><div class='del'>-		dflt_features |= NETIF_F_SCTP_CRC;</div><div class='add'>+		csum_offloads |= NETIF_F_RXCSUM;</div><div class='add'>+	if (idpf_is_cap_ena_all(adapter, IDPF_CSUM_CAPS, IDPF_CAP_TX_SCTP_CSUM))</div><div class='add'>+		csum_offloads |= NETIF_F_SCTP_CRC;</div><div class='ctx'> </div><div class='ctx'> 	if (idpf_is_cap_ena(adapter, IDPF_SEG_CAPS, VIRTCHNL2_CAP_SEG_IPV4_TCP))</div><div class='del'>-		dflt_features |= NETIF_F_TSO;</div><div class='add'>+		tso_offloads |= NETIF_F_TSO;</div><div class='ctx'> 	if (idpf_is_cap_ena(adapter, IDPF_SEG_CAPS, VIRTCHNL2_CAP_SEG_IPV6_TCP))</div><div class='del'>-		dflt_features |= NETIF_F_TSO6;</div><div class='add'>+		tso_offloads |= NETIF_F_TSO6;</div><div class='ctx'> 	if (idpf_is_cap_ena_all(adapter, IDPF_SEG_CAPS,</div><div class='ctx'> 				VIRTCHNL2_CAP_SEG_IPV4_UDP |</div><div class='ctx'> 				VIRTCHNL2_CAP_SEG_IPV6_UDP))</div><div class='del'>-		dflt_features |= NETIF_F_GSO_UDP_L4;</div><div class='add'>+		tso_offloads |= NETIF_F_GSO_UDP_L4;</div><div class='ctx'> 	if (idpf_is_cap_ena_all(adapter, IDPF_RSC_CAPS, IDPF_CAP_RSC))</div><div class='del'>-		offloads |= NETIF_F_GRO_HW;</div><div class='del'>-	/* advertise to stack only if offloads for encapsulated packets is</div><div class='del'>-	 * supported</div><div class='del'>-	 */</div><div class='del'>-	if (idpf_is_cap_ena(vport-&gt;adapter, IDPF_SEG_CAPS,</div><div class='del'>-			    VIRTCHNL2_CAP_SEG_TX_SINGLE_TUNNEL)) {</div><div class='del'>-		offloads |= NETIF_F_GSO_UDP_TUNNEL	|</div><div class='del'>-			    NETIF_F_GSO_GRE		|</div><div class='del'>-			    NETIF_F_GSO_GRE_CSUM	|</div><div class='del'>-			    NETIF_F_GSO_PARTIAL		|</div><div class='del'>-			    NETIF_F_GSO_UDP_TUNNEL_CSUM	|</div><div class='del'>-			    NETIF_F_GSO_IPXIP4		|</div><div class='del'>-			    NETIF_F_GSO_IPXIP6		|</div><div class='del'>-			    0;</div><div class='del'>-</div><div class='del'>-		if (!idpf_is_cap_ena_all(vport-&gt;adapter, IDPF_CSUM_CAPS,</div><div class='del'>-					 IDPF_CAP_TUNNEL_TX_CSUM))</div><div class='del'>-			netdev-&gt;gso_partial_features |=</div><div class='del'>-				NETIF_F_GSO_UDP_TUNNEL_CSUM;</div><div class='del'>-</div><div class='del'>-		netdev-&gt;gso_partial_features |= NETIF_F_GSO_GRE_CSUM;</div><div class='del'>-		offloads |= NETIF_F_TSO_MANGLEID;</div><div class='del'>-	}</div><div class='add'>+		other_offloads |= NETIF_F_GRO_HW;</div><div class='ctx'> 	if (idpf_is_cap_ena(adapter, IDPF_OTHER_CAPS, VIRTCHNL2_CAP_LOOPBACK))</div><div class='del'>-		offloads |= NETIF_F_LOOPBACK;</div><div class='add'>+		other_offloads |= NETIF_F_LOOPBACK;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;features |= dflt_features | csum_offloads | tso_offloads;</div><div class='add'>+	netdev-&gt;hw_features |=  netdev-&gt;features | other_offloads;</div><div class='add'>+	netdev-&gt;vlan_features |= netdev-&gt;features | other_offloads;</div><div class='add'>+	netdev-&gt;hw_enc_features |= dflt_features | other_offloads;</div><div class='add'>+	idpf_xdp_set_features(vport);</div><div class='ctx'> </div><div class='del'>-	netdev-&gt;features |= dflt_features;</div><div class='del'>-	netdev-&gt;hw_features |= dflt_features | offloads;</div><div class='del'>-	netdev-&gt;hw_enc_features |= dflt_features | offloads;</div><div class='ctx'> 	idpf_set_ethtool_ops(netdev);</div><div class='add'>+	netif_set_affinity_auto(netdev);</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;adapter-&gt;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	/* carrier off on init to avoid Tx hangs */</div><div class='hunk'>@@ -861,14 +888,18 @@ static void idpf_remove_features(struct idpf_vport *vport)</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_vport_stop - Disable a vport</div><div class='ctx'>  * @vport: vport to disable</div><div class='add'>+ * @rtnl: whether to take RTNL lock</div><div class='ctx'>  */</div><div class='del'>-static void idpf_vport_stop(struct idpf_vport *vport)</div><div class='add'>+static void idpf_vport_stop(struct idpf_vport *vport, bool rtnl)</div><div class='ctx'> {</div><div class='ctx'> 	struct idpf_netdev_priv *np = netdev_priv(vport-&gt;netdev);</div><div class='ctx'> </div><div class='del'>-	if (np-&gt;state &lt;= __IDPF_VPORT_DOWN)</div><div class='add'>+	if (!test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (rtnl)</div><div class='add'>+		rtnl_lock();</div><div class='add'>+</div><div class='ctx'> 	netif_carrier_off(vport-&gt;netdev);</div><div class='ctx'> 	netif_tx_disable(vport-&gt;netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -887,9 +918,13 @@ static void idpf_vport_stop(struct idpf_vport *vport)</div><div class='ctx'> </div><div class='ctx'> 	vport-&gt;link_up = false;</div><div class='ctx'> 	idpf_vport_intr_deinit(vport);</div><div class='add'>+	idpf_xdp_rxq_info_deinit_all(vport);</div><div class='ctx'> 	idpf_vport_queues_rel(vport);</div><div class='ctx'> 	idpf_vport_intr_rel(vport);</div><div class='del'>-	np-&gt;state = __IDPF_VPORT_DOWN;</div><div class='add'>+	clear_bit(IDPF_VPORT_UP, np-&gt;state);</div><div class='add'>+</div><div class='add'>+	if (rtnl)</div><div class='add'>+		rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -913,7 +948,7 @@ static int idpf_stop(struct net_device *netdev)</div><div class='ctx'> 	idpf_vport_ctrl_lock(netdev);</div><div class='ctx'> 	vport = idpf_netdev_to_vport(netdev);</div><div class='ctx'> </div><div class='del'>-	idpf_vport_stop(vport);</div><div class='add'>+	idpf_vport_stop(vport, false);</div><div class='ctx'> </div><div class='ctx'> 	idpf_vport_ctrl_unlock(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -927,15 +962,19 @@ static int idpf_stop(struct net_device *netdev)</div><div class='ctx'> static void idpf_decfg_netdev(struct idpf_vport *vport)</div><div class='ctx'> {</div><div class='ctx'> 	struct idpf_adapter *adapter = vport-&gt;adapter;</div><div class='add'>+	u16 idx = vport-&gt;idx;</div><div class='ctx'> </div><div class='ctx'> 	kfree(vport-&gt;rx_ptype_lkup);</div><div class='ctx'> 	vport-&gt;rx_ptype_lkup = NULL;</div><div class='ctx'> </div><div class='del'>-	unregister_netdev(vport-&gt;netdev);</div><div class='del'>-	free_netdev(vport-&gt;netdev);</div><div class='add'>+	if (test_and_clear_bit(IDPF_VPORT_REG_NETDEV,</div><div class='add'>+			       adapter-&gt;vport_config[idx]-&gt;flags)) {</div><div class='add'>+		unregister_netdev(vport-&gt;netdev);</div><div class='add'>+		free_netdev(vport-&gt;netdev);</div><div class='add'>+	}</div><div class='ctx'> 	vport-&gt;netdev = NULL;</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;netdevs[vport-&gt;idx] = NULL;</div><div class='add'>+	adapter-&gt;netdevs[idx] = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -999,8 +1038,10 @@ static void idpf_vport_dealloc(struct idpf_vport *vport)</div><div class='ctx'> 	struct idpf_adapter *adapter = vport-&gt;adapter;</div><div class='ctx'> 	unsigned int i = vport-&gt;idx;</div><div class='ctx'> </div><div class='add'>+	idpf_idc_deinit_vport_aux_device(vport-&gt;vdev_info);</div><div class='add'>+</div><div class='ctx'> 	idpf_deinit_mac_addr(vport);</div><div class='del'>-	idpf_vport_stop(vport);</div><div class='add'>+	idpf_vport_stop(vport, true);</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(IDPF_HR_RESET_IN_PROG, adapter-&gt;flags))</div><div class='ctx'> 		idpf_decfg_netdev(vport);</div><div class='hunk'>@@ -1106,8 +1147,10 @@ static struct idpf_vport *idpf_vport_alloc(struct idpf_adapter *adapter,</div><div class='ctx'> 	if (!vport)</div><div class='ctx'> 		return vport;</div><div class='ctx'> </div><div class='add'>+	num_max_q = max(max_q-&gt;max_txq, max_q-&gt;max_rxq) + IDPF_RESERVED_VECS;</div><div class='ctx'> 	if (!adapter-&gt;vport_config[idx]) {</div><div class='ctx'> 		struct idpf_vport_config *vport_config;</div><div class='add'>+		struct idpf_q_coalesce *q_coal;</div><div class='ctx'> </div><div class='ctx'> 		vport_config = kzalloc(sizeof(*vport_config), GFP_KERNEL);</div><div class='ctx'> 		if (!vport_config) {</div><div class='hunk'>@@ -1116,6 +1159,21 @@ static struct idpf_vport *idpf_vport_alloc(struct idpf_adapter *adapter,</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		q_coal = kcalloc(num_max_q, sizeof(*q_coal), GFP_KERNEL);</div><div class='add'>+		if (!q_coal) {</div><div class='add'>+			kfree(vport_config);</div><div class='add'>+			kfree(vport);</div><div class='add'>+</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		for (int i = 0; i &lt; num_max_q; i++) {</div><div class='add'>+			q_coal[i].tx_intr_mode = IDPF_ITR_DYNAMIC;</div><div class='add'>+			q_coal[i].tx_coalesce_usecs = IDPF_ITR_TX_DEF;</div><div class='add'>+			q_coal[i].rx_intr_mode = IDPF_ITR_DYNAMIC;</div><div class='add'>+			q_coal[i].rx_coalesce_usecs = IDPF_ITR_RX_DEF;</div><div class='add'>+		}</div><div class='add'>+		vport_config-&gt;user_config.q_coalesce = q_coal;</div><div class='add'>+</div><div class='ctx'> 		adapter-&gt;vport_config[idx] = vport_config;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1125,13 +1183,10 @@ static struct idpf_vport *idpf_vport_alloc(struct idpf_adapter *adapter,</div><div class='ctx'> 	vport-&gt;default_vport = adapter-&gt;num_alloc_vports &lt;</div><div class='ctx'> 			       idpf_get_default_vports(adapter);</div><div class='ctx'> </div><div class='del'>-	num_max_q = max(max_q-&gt;max_txq, max_q-&gt;max_rxq);</div><div class='ctx'> 	vport-&gt;q_vector_idxs = kcalloc(num_max_q, sizeof(u16), GFP_KERNEL);</div><div class='del'>-	if (!vport-&gt;q_vector_idxs) {</div><div class='del'>-		kfree(vport);</div><div class='add'>+	if (!vport-&gt;q_vector_idxs)</div><div class='add'>+		goto free_vport;</div><div class='ctx'> </div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='ctx'> 	idpf_vport_init(vport, max_q);</div><div class='ctx'> </div><div class='ctx'> 	/* This alloc is done separate from the LUT because it's not strictly</div><div class='hunk'>@@ -1141,11 +1196,9 @@ static struct idpf_vport *idpf_vport_alloc(struct idpf_adapter *adapter,</div><div class='ctx'> 	 */</div><div class='ctx'> 	rss_data = &amp;adapter-&gt;vport_config[idx]-&gt;user_config.rss_data;</div><div class='ctx'> 	rss_data-&gt;rss_key = kzalloc(rss_data-&gt;rss_key_size, GFP_KERNEL);</div><div class='del'>-	if (!rss_data-&gt;rss_key) {</div><div class='del'>-		kfree(vport);</div><div class='add'>+	if (!rss_data-&gt;rss_key)</div><div class='add'>+		goto free_vector_idxs;</div><div class='ctx'> </div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='ctx'> 	/* Initialize default rss key */</div><div class='ctx'> 	netdev_rss_key_fill((void *)rss_data-&gt;rss_key, rss_data-&gt;rss_key_size);</div><div class='ctx'> </div><div class='hunk'>@@ -1158,6 +1211,13 @@ static struct idpf_vport *idpf_vport_alloc(struct idpf_adapter *adapter,</div><div class='ctx'> 	adapter-&gt;next_vport = idpf_get_free_slot(adapter);</div><div class='ctx'> </div><div class='ctx'> 	return vport;</div><div class='add'>+</div><div class='add'>+free_vector_idxs:</div><div class='add'>+	kfree(vport-&gt;q_vector_idxs);</div><div class='add'>+free_vport:</div><div class='add'>+	kfree(vport);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1261,13 +1321,13 @@ static void idpf_restore_features(struct idpf_vport *vport)</div><div class='ctx'>  */</div><div class='ctx'> static int idpf_set_real_num_queues(struct idpf_vport *vport)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='add'>+	int err, txq = vport-&gt;num_txq - vport-&gt;num_xdp_txq;</div><div class='ctx'> </div><div class='ctx'> 	err = netif_set_real_num_rx_queues(vport-&gt;netdev, vport-&gt;num_rxq);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return netif_set_real_num_tx_queues(vport-&gt;netdev, vport-&gt;num_txq);</div><div class='add'>+	return netif_set_real_num_tx_queues(vport-&gt;netdev, txq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1285,7 +1345,7 @@ static int idpf_up_complete(struct idpf_vport *vport)</div><div class='ctx'> 		netif_tx_start_all_queues(vport-&gt;netdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	np-&gt;state = __IDPF_VPORT_UP;</div><div class='add'>+	set_bit(IDPF_VPORT_UP, np-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1322,17 +1382,21 @@ static void idpf_rx_init_buf_tail(struct idpf_vport *vport)</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_vport_open - Bring up a vport</div><div class='ctx'>  * @vport: vport to bring up</div><div class='add'>+ * @rtnl: whether to take RTNL lock</div><div class='ctx'>  */</div><div class='del'>-static int idpf_vport_open(struct idpf_vport *vport)</div><div class='add'>+static int idpf_vport_open(struct idpf_vport *vport, bool rtnl)</div><div class='ctx'> {</div><div class='ctx'> 	struct idpf_netdev_priv *np = netdev_priv(vport-&gt;netdev);</div><div class='ctx'> 	struct idpf_adapter *adapter = vport-&gt;adapter;</div><div class='ctx'> 	struct idpf_vport_config *vport_config;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (np-&gt;state != __IDPF_VPORT_DOWN)</div><div class='add'>+	if (test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='add'>+	if (rtnl)</div><div class='add'>+		rtnl_lock();</div><div class='add'>+</div><div class='ctx'> 	/* we do not allow interface up just yet */</div><div class='ctx'> 	netif_carrier_off(vport-&gt;netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1340,7 +1404,7 @@ static int idpf_vport_open(struct idpf_vport *vport)</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to allocate interrupts for vport %u: %d\n",</div><div class='ctx'> 			vport-&gt;vport_id, err);</div><div class='del'>-		return err;</div><div class='add'>+		goto err_rtnl_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = idpf_vport_queues_alloc(vport);</div><div class='hunk'>@@ -1361,35 +1425,44 @@ static int idpf_vport_open(struct idpf_vport *vport)</div><div class='ctx'> 		goto queues_rel;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = idpf_rx_bufs_init_all(vport);</div><div class='add'>+	err = idpf_queue_reg_init(vport);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to initialize RX buffers for vport %u: %d\n",</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to initialize queue registers for vport %u: %d\n",</div><div class='ctx'> 			vport-&gt;vport_id, err);</div><div class='ctx'> 		goto queues_rel;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = idpf_queue_reg_init(vport);</div><div class='add'>+	err = idpf_rx_bufs_init_all(vport);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to initialize queue registers for vport %u: %d\n",</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to initialize RX buffers for vport %u: %d\n",</div><div class='ctx'> 			vport-&gt;vport_id, err);</div><div class='ctx'> 		goto queues_rel;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	idpf_rx_init_buf_tail(vport);</div><div class='add'>+</div><div class='add'>+	err = idpf_xdp_rxq_info_init_all(vport);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(vport-&gt;netdev,</div><div class='add'>+			   "Failed to initialize XDP RxQ info for vport %u: %pe\n",</div><div class='add'>+			   vport-&gt;vport_id, ERR_PTR(err));</div><div class='add'>+		goto intr_deinit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	idpf_vport_intr_ena(vport);</div><div class='ctx'> </div><div class='ctx'> 	err = idpf_send_config_queues_msg(vport);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to configure queues for vport %u, %d\n",</div><div class='ctx'> 			vport-&gt;vport_id, err);</div><div class='del'>-		goto intr_deinit;</div><div class='add'>+		goto rxq_deinit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = idpf_send_map_unmap_queue_vector_msg(vport, true);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to map queue vectors for vport %u: %d\n",</div><div class='ctx'> 			vport-&gt;vport_id, err);</div><div class='del'>-		goto intr_deinit;</div><div class='add'>+		goto rxq_deinit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = idpf_send_enable_queues_msg(vport);</div><div class='hunk'>@@ -1427,6 +1500,9 @@ static int idpf_vport_open(struct idpf_vport *vport)</div><div class='ctx'> 		goto deinit_rss;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (rtnl)</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> deinit_rss:</div><div class='hunk'>@@ -1437,6 +1513,8 @@ disable_queues:</div><div class='ctx'> 	idpf_send_disable_queues_msg(vport);</div><div class='ctx'> unmap_queue_vectors:</div><div class='ctx'> 	idpf_send_map_unmap_queue_vector_msg(vport, false);</div><div class='add'>+rxq_deinit:</div><div class='add'>+	idpf_xdp_rxq_info_deinit_all(vport);</div><div class='ctx'> intr_deinit:</div><div class='ctx'> 	idpf_vport_intr_deinit(vport);</div><div class='ctx'> queues_rel:</div><div class='hunk'>@@ -1444,6 +1522,10 @@ queues_rel:</div><div class='ctx'> intr_rel:</div><div class='ctx'> 	idpf_vport_intr_rel(vport);</div><div class='ctx'> </div><div class='add'>+err_rtnl_unlock:</div><div class='add'>+	if (rtnl)</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1500,11 +1582,10 @@ void idpf_init_task(struct work_struct *work)</div><div class='ctx'> 	index = vport-&gt;idx;</div><div class='ctx'> 	vport_config = adapter-&gt;vport_config[index];</div><div class='ctx'> </div><div class='del'>-	init_waitqueue_head(&amp;vport-&gt;sw_marker_wq);</div><div class='del'>-</div><div class='ctx'> 	spin_lock_init(&amp;vport_config-&gt;mac_filter_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;vport_config-&gt;user_config.mac_filter_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;vport_config-&gt;user_config.flow_steer_list);</div><div class='ctx'> </div><div class='ctx'> 	err = idpf_check_supported_desc_ids(vport);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -1521,9 +1602,9 @@ void idpf_init_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	/* Once state is put into DOWN, driver is ready for dev_open */</div><div class='ctx'> 	np = netdev_priv(vport-&gt;netdev);</div><div class='del'>-	np-&gt;state = __IDPF_VPORT_DOWN;</div><div class='add'>+	clear_bit(IDPF_VPORT_UP, np-&gt;state);</div><div class='ctx'> 	if (test_and_clear_bit(IDPF_VPORT_UP_REQUESTED, vport_config-&gt;flags))</div><div class='del'>-		idpf_vport_open(vport);</div><div class='add'>+		idpf_vport_open(vport, true);</div><div class='ctx'> </div><div class='ctx'> 	/* Spawn and return 'idpf_init_task' work queue until all the</div><div class='ctx'> 	 * default vports are created</div><div class='hunk'>@@ -1536,13 +1617,22 @@ void idpf_init_task(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (index = 0; index &lt; adapter-&gt;max_vports; index++) {</div><div class='del'>-		if (adapter-&gt;netdevs[index] &amp;&amp;</div><div class='del'>-		    !test_bit(IDPF_VPORT_REG_NETDEV,</div><div class='del'>-			      adapter-&gt;vport_config[index]-&gt;flags)) {</div><div class='del'>-			register_netdev(adapter-&gt;netdevs[index]);</div><div class='del'>-			set_bit(IDPF_VPORT_REG_NETDEV,</div><div class='del'>-				adapter-&gt;vport_config[index]-&gt;flags);</div><div class='add'>+		struct net_device *netdev = adapter-&gt;netdevs[index];</div><div class='add'>+		struct idpf_vport_config *vport_config;</div><div class='add'>+</div><div class='add'>+		vport_config = adapter-&gt;vport_config[index];</div><div class='add'>+</div><div class='add'>+		if (!netdev ||</div><div class='add'>+		    test_bit(IDPF_VPORT_REG_NETDEV, vport_config-&gt;flags))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = register_netdev(netdev);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "failed to register netdev for vport %d: %pe\n",</div><div class='add'>+				index, ERR_PTR(err));</div><div class='add'>+			continue;</div><div class='ctx'> 		}</div><div class='add'>+		set_bit(IDPF_VPORT_REG_NETDEV, vport_config-&gt;flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* As all the required vports are created, clear the reset flag</div><div class='hunk'>@@ -1711,7 +1801,7 @@ static void idpf_set_vport_state(struct idpf_adapter *adapter)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		np = netdev_priv(adapter-&gt;netdevs[i]);</div><div class='del'>-		if (np-&gt;state == __IDPF_VPORT_UP)</div><div class='add'>+		if (test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='ctx'> 			set_bit(IDPF_VPORT_UP_REQUESTED,</div><div class='ctx'> 				adapter-&gt;vport_config[i]-&gt;flags);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1753,6 +1843,8 @@ static int idpf_init_hard_reset(struct idpf_adapter *adapter)</div><div class='ctx'> 	} else if (test_and_clear_bit(IDPF_HR_FUNC_RESET, adapter-&gt;flags)) {</div><div class='ctx'> 		bool is_reset = idpf_is_reset_detected(adapter);</div><div class='ctx'> </div><div class='add'>+		idpf_idc_issue_reset_event(adapter-&gt;cdev_info);</div><div class='add'>+</div><div class='ctx'> 		idpf_set_vport_state(adapter);</div><div class='ctx'> 		idpf_vc_core_deinit(adapter);</div><div class='ctx'> 		if (!is_reset)</div><div class='hunk'>@@ -1786,6 +1878,7 @@ static int idpf_init_hard_reset(struct idpf_adapter *adapter)</div><div class='ctx'> 	 */</div><div class='ctx'> 	err = idpf_vc_core_init(adapter);</div><div class='ctx'> 	if (err) {</div><div class='add'>+		cancel_delayed_work_sync(&amp;adapter-&gt;mbx_task);</div><div class='ctx'> 		idpf_deinit_dflt_mbx(adapter);</div><div class='ctx'> 		goto unlock_mutex;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1799,6 +1892,10 @@ static int idpf_init_hard_reset(struct idpf_adapter *adapter)</div><div class='ctx'> unlock_mutex:</div><div class='ctx'> 	mutex_unlock(&amp;adapter-&gt;vport_ctrl_lock);</div><div class='ctx'> </div><div class='add'>+	/* Wait until all vports are created to init RDMA CORE AUX */</div><div class='add'>+	if (!err)</div><div class='add'>+		err = idpf_idc_init(adapter);</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1815,11 +1912,19 @@ void idpf_vc_event_task(struct work_struct *work)</div><div class='ctx'> 	if (test_bit(IDPF_REMOVE_IN_PROG, adapter-&gt;flags))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (test_bit(IDPF_HR_FUNC_RESET, adapter-&gt;flags) ||</div><div class='del'>-	    test_bit(IDPF_HR_DRV_LOAD, adapter-&gt;flags)) {</div><div class='del'>-		set_bit(IDPF_HR_RESET_IN_PROG, adapter-&gt;flags);</div><div class='del'>-		idpf_init_hard_reset(adapter);</div><div class='del'>-	}</div><div class='add'>+	if (test_bit(IDPF_HR_FUNC_RESET, adapter-&gt;flags))</div><div class='add'>+		goto func_reset;</div><div class='add'>+</div><div class='add'>+	if (test_bit(IDPF_HR_DRV_LOAD, adapter-&gt;flags))</div><div class='add'>+		goto drv_load;</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+func_reset:</div><div class='add'>+	idpf_vc_xn_shutdown(adapter-&gt;vcxn_mngr);</div><div class='add'>+drv_load:</div><div class='add'>+	set_bit(IDPF_HR_RESET_IN_PROG, adapter-&gt;flags);</div><div class='add'>+	idpf_init_hard_reset(adapter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1834,7 +1939,7 @@ int idpf_initiate_soft_reset(struct idpf_vport *vport,</div><div class='ctx'> 			     enum idpf_vport_reset_cause reset_cause)</div><div class='ctx'> {</div><div class='ctx'> 	struct idpf_netdev_priv *np = netdev_priv(vport-&gt;netdev);</div><div class='del'>-	enum idpf_vport_state current_state = np-&gt;state;</div><div class='add'>+	bool vport_is_up = test_bit(IDPF_VPORT_UP, np-&gt;state);</div><div class='ctx'> 	struct idpf_adapter *adapter = vport-&gt;adapter;</div><div class='ctx'> 	struct idpf_vport *new_vport;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1860,7 +1965,7 @@ int idpf_initiate_soft_reset(struct idpf_vport *vport,</div><div class='ctx'> 	 * mess with. Nothing below should use those variables from new_vport</div><div class='ctx'> 	 * and should instead always refer to them in vport if they need to.</div><div class='ctx'> 	 */</div><div class='del'>-	memcpy(new_vport, vport, offsetof(struct idpf_vport, link_speed_mbps));</div><div class='add'>+	memcpy(new_vport, vport, offsetof(struct idpf_vport, link_up));</div><div class='ctx'> </div><div class='ctx'> 	/* Adjust resource parameters prior to reallocating resources */</div><div class='ctx'> 	switch (reset_cause) {</div><div class='hunk'>@@ -1874,6 +1979,9 @@ int idpf_initiate_soft_reset(struct idpf_vport *vport,</div><div class='ctx'> 		idpf_vport_calc_num_q_desc(new_vport);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IDPF_SR_MTU_CHANGE:</div><div class='add'>+		idpf_idc_vdev_mtu_event(vport-&gt;vdev_info,</div><div class='add'>+					IIDC_RDMA_EVENT_BEFORE_MTU_CHANGE);</div><div class='add'>+		break;</div><div class='ctx'> 	case IDPF_SR_RSC_CHANGE:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1882,11 +1990,11 @@ int idpf_initiate_soft_reset(struct idpf_vport *vport,</div><div class='ctx'> 		goto free_vport;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (current_state &lt;= __IDPF_VPORT_DOWN) {</div><div class='add'>+	if (!vport_is_up) {</div><div class='ctx'> 		idpf_send_delete_queues_msg(vport);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		set_bit(IDPF_VPORT_DEL_QUEUES, vport-&gt;flags);</div><div class='del'>-		idpf_vport_stop(vport);</div><div class='add'>+		idpf_vport_stop(vport, false);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	idpf_deinit_rss(vport);</div><div class='hunk'>@@ -1906,7 +2014,7 @@ int idpf_initiate_soft_reset(struct idpf_vport *vport,</div><div class='ctx'> 	/* Same comment as above regarding avoiding copying the wait_queues and</div><div class='ctx'> 	 * mutexes applies here. We do not want to mess with those if possible.</div><div class='ctx'> 	 */</div><div class='del'>-	memcpy(vport, new_vport, offsetof(struct idpf_vport, link_speed_mbps));</div><div class='add'>+	memcpy(vport, new_vport, offsetof(struct idpf_vport, link_up));</div><div class='ctx'> </div><div class='ctx'> 	if (reset_cause == IDPF_SR_Q_CHANGE)</div><div class='ctx'> 		idpf_vport_alloc_vec_indexes(vport);</div><div class='hunk'>@@ -1915,24 +2023,26 @@ int idpf_initiate_soft_reset(struct idpf_vport *vport,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_open;</div><div class='ctx'> </div><div class='del'>-	if (current_state == __IDPF_VPORT_UP)</div><div class='del'>-		err = idpf_vport_open(vport);</div><div class='add'>+	if (vport_is_up)</div><div class='add'>+		err = idpf_vport_open(vport, false);</div><div class='ctx'> </div><div class='del'>-	kfree(new_vport);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	goto free_vport;</div><div class='ctx'> </div><div class='ctx'> err_reset:</div><div class='ctx'> 	idpf_send_add_queues_msg(vport, vport-&gt;num_txq, vport-&gt;num_complq,</div><div class='ctx'> 				 vport-&gt;num_rxq, vport-&gt;num_bufq);</div><div class='ctx'> </div><div class='ctx'> err_open:</div><div class='del'>-	if (current_state == __IDPF_VPORT_UP)</div><div class='del'>-		idpf_vport_open(vport);</div><div class='add'>+	if (vport_is_up)</div><div class='add'>+		idpf_vport_open(vport, false);</div><div class='ctx'> </div><div class='ctx'> free_vport:</div><div class='ctx'> 	kfree(new_vport);</div><div class='ctx'> </div><div class='add'>+	if (reset_cause == IDPF_SR_MTU_CHANGE)</div><div class='add'>+		idpf_idc_vdev_mtu_event(vport-&gt;vdev_info,</div><div class='add'>+					IIDC_RDMA_EVENT_AFTER_MTU_CHANGE);</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2158,8 +2268,13 @@ static int idpf_open(struct net_device *netdev)</div><div class='ctx'> 	idpf_vport_ctrl_lock(netdev);</div><div class='ctx'> 	vport = idpf_netdev_to_vport(netdev);</div><div class='ctx'> </div><div class='del'>-	err = idpf_vport_open(vport);</div><div class='add'>+	err = idpf_set_real_num_queues(vport);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='add'>+	err = idpf_vport_open(vport, false);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='ctx'> 	idpf_vport_ctrl_unlock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -2190,6 +2305,92 @@ static int idpf_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * idpf_chk_tso_segment - Check skb is not using too many buffers</div><div class='add'>+ * @skb: send buffer</div><div class='add'>+ * @max_bufs: maximum number of buffers</div><div class='add'>+ *</div><div class='add'>+ * For TSO we need to count the TSO header and segment payload separately.  As</div><div class='add'>+ * such we need to check cases where we have max_bufs-1 fragments or more as we</div><div class='add'>+ * can potentially require max_bufs+1 DMA transactions, 1 for the TSO header, 1</div><div class='add'>+ * for the segment payload in the first descriptor, and another max_buf-1 for</div><div class='add'>+ * the fragments.</div><div class='add'>+ *</div><div class='add'>+ * Returns true if the packet needs to be software segmented by core stack.</div><div class='add'>+ */</div><div class='add'>+static bool idpf_chk_tso_segment(const struct sk_buff *skb,</div><div class='add'>+				 unsigned int max_bufs)</div><div class='add'>+{</div><div class='add'>+	const struct skb_shared_info *shinfo = skb_shinfo(skb);</div><div class='add'>+	const skb_frag_t *frag, *stale;</div><div class='add'>+	int nr_frags, sum;</div><div class='add'>+</div><div class='add'>+	/* no need to check if number of frags is less than max_bufs - 1 */</div><div class='add'>+	nr_frags = shinfo-&gt;nr_frags;</div><div class='add'>+	if (nr_frags &lt; (max_bufs - 1))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* We need to walk through the list and validate that each group</div><div class='add'>+	 * of max_bufs-2 fragments totals at least gso_size.</div><div class='add'>+	 */</div><div class='add'>+	nr_frags -= max_bufs - 2;</div><div class='add'>+	frag = &amp;shinfo-&gt;frags[0];</div><div class='add'>+</div><div class='add'>+	/* Initialize size to the negative value of gso_size minus 1.  We use</div><div class='add'>+	 * this as the worst case scenario in which the frag ahead of us only</div><div class='add'>+	 * provides one byte which is why we are limited to max_bufs-2</div><div class='add'>+	 * descriptors for a single transmit as the header and previous</div><div class='add'>+	 * fragment are already consuming 2 descriptors.</div><div class='add'>+	 */</div><div class='add'>+	sum = 1 - shinfo-&gt;gso_size;</div><div class='add'>+</div><div class='add'>+	/* Add size of frags 0 through 4 to create our initial sum */</div><div class='add'>+	sum += skb_frag_size(frag++);</div><div class='add'>+	sum += skb_frag_size(frag++);</div><div class='add'>+	sum += skb_frag_size(frag++);</div><div class='add'>+	sum += skb_frag_size(frag++);</div><div class='add'>+	sum += skb_frag_size(frag++);</div><div class='add'>+</div><div class='add'>+	/* Walk through fragments adding latest fragment, testing it, and</div><div class='add'>+	 * then removing stale fragments from the sum.</div><div class='add'>+	 */</div><div class='add'>+	for (stale = &amp;shinfo-&gt;frags[0];; stale++) {</div><div class='add'>+		int stale_size = skb_frag_size(stale);</div><div class='add'>+</div><div class='add'>+		sum += skb_frag_size(frag++);</div><div class='add'>+</div><div class='add'>+		/* The stale fragment may present us with a smaller</div><div class='add'>+		 * descriptor than the actual fragment size. To account</div><div class='add'>+		 * for that we need to remove all the data on the front and</div><div class='add'>+		 * figure out what the remainder would be in the last</div><div class='add'>+		 * descriptor associated with the fragment.</div><div class='add'>+		 */</div><div class='add'>+		if (stale_size &gt; IDPF_TX_MAX_DESC_DATA) {</div><div class='add'>+			int align_pad = -(skb_frag_off(stale)) &amp;</div><div class='add'>+					(IDPF_TX_MAX_READ_REQ_SIZE - 1);</div><div class='add'>+</div><div class='add'>+			sum -= align_pad;</div><div class='add'>+			stale_size -= align_pad;</div><div class='add'>+</div><div class='add'>+			do {</div><div class='add'>+				sum -= IDPF_TX_MAX_DESC_DATA_ALIGNED;</div><div class='add'>+				stale_size -= IDPF_TX_MAX_DESC_DATA_ALIGNED;</div><div class='add'>+			} while (stale_size &gt; IDPF_TX_MAX_DESC_DATA);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* if sum is negative we failed to make sufficient progress */</div><div class='add'>+		if (sum &lt; 0)</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		if (!nr_frags--)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		sum -= stale_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * idpf_features_check - Validate packet conforms to limits</div><div class='ctx'>  * @skb: skb buffer</div><div class='ctx'>  * @netdev: This port's netdev</div><div class='hunk'>@@ -2199,8 +2400,8 @@ static netdev_features_t idpf_features_check(struct sk_buff *skb,</div><div class='ctx'> 					     struct net_device *netdev,</div><div class='ctx'> 					     netdev_features_t features)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_vport *vport = idpf_netdev_to_vport(netdev);</div><div class='del'>-	struct idpf_adapter *adapter = vport-&gt;adapter;</div><div class='add'>+	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='add'>+	u16 max_tx_hdr_size = np-&gt;max_tx_hdr_size;</div><div class='ctx'> 	size_t len;</div><div class='ctx'> </div><div class='ctx'> 	/* No point in doing any of this if neither checksum nor GSO are</div><div class='hunk'>@@ -2210,12 +2411,15 @@ static netdev_features_t idpf_features_check(struct sk_buff *skb,</div><div class='ctx'> 	if (skb-&gt;ip_summed != CHECKSUM_PARTIAL)</div><div class='ctx'> 		return features;</div><div class='ctx'> </div><div class='del'>-	/* We cannot support GSO if the MSS is going to be less than</div><div class='del'>-	 * 88 bytes. If it is then we need to drop support for GSO.</div><div class='del'>-	 */</div><div class='del'>-	if (skb_is_gso(skb) &amp;&amp;</div><div class='del'>-	    (skb_shinfo(skb)-&gt;gso_size &lt; IDPF_TX_TSO_MIN_MSS))</div><div class='del'>-		features &amp;= ~NETIF_F_GSO_MASK;</div><div class='add'>+	if (skb_is_gso(skb)) {</div><div class='add'>+		/* We cannot support GSO if the MSS is going to be less than</div><div class='add'>+		 * 88 bytes. If it is then we need to drop support for GSO.</div><div class='add'>+		 */</div><div class='add'>+		if (skb_shinfo(skb)-&gt;gso_size &lt; IDPF_TX_TSO_MIN_MSS)</div><div class='add'>+			features &amp;= ~NETIF_F_GSO_MASK;</div><div class='add'>+		else if (idpf_chk_tso_segment(skb, np-&gt;tx_max_bufs))</div><div class='add'>+			features &amp;= ~NETIF_F_GSO_MASK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure MACLEN is &lt;= 126 bytes (63 words) and not an odd size */</div><div class='ctx'> 	len = skb_network_offset(skb);</div><div class='hunk'>@@ -2223,7 +2427,7 @@ static netdev_features_t idpf_features_check(struct sk_buff *skb,</div><div class='ctx'> 		goto unsupported;</div><div class='ctx'> </div><div class='ctx'> 	len = skb_network_header_len(skb);</div><div class='del'>-	if (unlikely(len &gt; idpf_get_max_tx_hdr_size(adapter)))</div><div class='add'>+	if (unlikely(len &gt; max_tx_hdr_size))</div><div class='ctx'> 		goto unsupported;</div><div class='ctx'> </div><div class='ctx'> 	if (!skb-&gt;encapsulation)</div><div class='hunk'>@@ -2236,7 +2440,7 @@ static netdev_features_t idpf_features_check(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	/* IPLEN can support at most 127 dwords */</div><div class='ctx'> 	len = skb_inner_network_header_len(skb);</div><div class='del'>-	if (unlikely(len &gt; idpf_get_max_tx_hdr_size(adapter)))</div><div class='add'>+	if (unlikely(len &gt; max_tx_hdr_size))</div><div class='ctx'> 		goto unsupported;</div><div class='ctx'> </div><div class='ctx'> 	/* No need to validate L4LEN as TCP is the only protocol with a</div><div class='hunk'>@@ -2262,6 +2466,7 @@ static int idpf_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> 	struct idpf_netdev_priv *np = netdev_priv(netdev);</div><div class='ctx'> 	struct idpf_vport_config *vport_config;</div><div class='ctx'> 	struct sockaddr *addr = p;</div><div class='add'>+	u8 old_mac_addr[ETH_ALEN];</div><div class='ctx'> 	struct idpf_vport *vport;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2285,17 +2490,19 @@ static int idpf_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> 	if (ether_addr_equal(netdev-&gt;dev_addr, addr-&gt;sa_data))</div><div class='ctx'> 		goto unlock_mutex;</div><div class='ctx'> </div><div class='add'>+	ether_addr_copy(old_mac_addr, vport-&gt;default_mac_addr);</div><div class='add'>+	ether_addr_copy(vport-&gt;default_mac_addr, addr-&gt;sa_data);</div><div class='ctx'> 	vport_config = vport-&gt;adapter-&gt;vport_config[vport-&gt;idx];</div><div class='ctx'> 	err = idpf_add_mac_filter(vport, np, addr-&gt;sa_data, false);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		__idpf_del_mac_filter(vport_config, addr-&gt;sa_data);</div><div class='add'>+		ether_addr_copy(vport-&gt;default_mac_addr, netdev-&gt;dev_addr);</div><div class='ctx'> 		goto unlock_mutex;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (is_valid_ether_addr(vport-&gt;default_mac_addr))</div><div class='del'>-		idpf_del_mac_filter(vport, np, vport-&gt;default_mac_addr, false);</div><div class='add'>+	if (is_valid_ether_addr(old_mac_addr))</div><div class='add'>+		__idpf_del_mac_filter(vport_config, old_mac_addr);</div><div class='ctx'> </div><div class='del'>-	ether_addr_copy(vport-&gt;default_mac_addr, addr-&gt;sa_data);</div><div class='ctx'> 	eth_hw_addr_set(netdev, addr-&gt;sa_data);</div><div class='ctx'> </div><div class='ctx'> unlock_mutex:</div><div class='hunk'>@@ -2315,8 +2522,12 @@ void *idpf_alloc_dma_mem(struct idpf_hw *hw, struct idpf_dma_mem *mem, u64 size)</div><div class='ctx'> 	struct idpf_adapter *adapter = hw-&gt;back;</div><div class='ctx'> 	size_t sz = ALIGN(size, 4096);</div><div class='ctx'> </div><div class='del'>-	mem-&gt;va = dma_alloc_coherent(&amp;adapter-&gt;pdev-&gt;dev, sz,</div><div class='del'>-				     &amp;mem-&gt;pa, GFP_KERNEL);</div><div class='add'>+	/* The control queue resources are freed under a spinlock, contiguous</div><div class='add'>+	 * pages will avoid IOMMU remapping and the use vmap (and vunmap in</div><div class='add'>+	 * dma_free_*() path.</div><div class='add'>+	 */</div><div class='add'>+	mem-&gt;va = dma_alloc_attrs(&amp;adapter-&gt;pdev-&gt;dev, sz, &amp;mem-&gt;pa,</div><div class='add'>+				  GFP_KERNEL, DMA_ATTR_FORCE_CONTIGUOUS);</div><div class='ctx'> 	mem-&gt;size = sz;</div><div class='ctx'> </div><div class='ctx'> 	return mem-&gt;va;</div><div class='hunk'>@@ -2331,13 +2542,67 @@ void idpf_free_dma_mem(struct idpf_hw *hw, struct idpf_dma_mem *mem)</div><div class='ctx'> {</div><div class='ctx'> 	struct idpf_adapter *adapter = hw-&gt;back;</div><div class='ctx'> </div><div class='del'>-	dma_free_coherent(&amp;adapter-&gt;pdev-&gt;dev, mem-&gt;size,</div><div class='del'>-			  mem-&gt;va, mem-&gt;pa);</div><div class='add'>+	dma_free_attrs(&amp;adapter-&gt;pdev-&gt;dev, mem-&gt;size,</div><div class='add'>+		       mem-&gt;va, mem-&gt;pa, DMA_ATTR_FORCE_CONTIGUOUS);</div><div class='ctx'> 	mem-&gt;size = 0;</div><div class='ctx'> 	mem-&gt;va = NULL;</div><div class='ctx'> 	mem-&gt;pa = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int idpf_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct idpf_vport *vport;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	idpf_vport_ctrl_lock(netdev);</div><div class='add'>+	vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+</div><div class='add'>+	if (!vport-&gt;link_up) {</div><div class='add'>+		idpf_vport_ctrl_unlock(netdev);</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!idpf_ptp_is_vport_tx_tstamp_ena(vport) &amp;&amp;</div><div class='add'>+	    !idpf_ptp_is_vport_rx_tstamp_ena(vport)) {</div><div class='add'>+		idpf_vport_ctrl_unlock(netdev);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_set_timestamp_mode(vport, config);</div><div class='add'>+</div><div class='add'>+	idpf_vport_ctrl_unlock(netdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int idpf_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct idpf_vport *vport;</div><div class='add'>+</div><div class='add'>+	idpf_vport_ctrl_lock(netdev);</div><div class='add'>+	vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+</div><div class='add'>+	if (!vport-&gt;link_up) {</div><div class='add'>+		idpf_vport_ctrl_unlock(netdev);</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!idpf_ptp_is_vport_tx_tstamp_ena(vport) &amp;&amp;</div><div class='add'>+	    !idpf_ptp_is_vport_rx_tstamp_ena(vport)) {</div><div class='add'>+		idpf_vport_ctrl_unlock(netdev);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*config = vport-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	idpf_vport_ctrl_unlock(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops idpf_netdev_ops = {</div><div class='ctx'> 	.ndo_open = idpf_open,</div><div class='ctx'> 	.ndo_stop = idpf_stop,</div><div class='hunk'>@@ -2350,4 +2615,9 @@ static const struct net_device_ops idpf_netdev_ops = {</div><div class='ctx'> 	.ndo_get_stats64 = idpf_get_stats64,</div><div class='ctx'> 	.ndo_set_features = idpf_set_features,</div><div class='ctx'> 	.ndo_tx_timeout = idpf_tx_timeout,</div><div class='add'>+	.ndo_hwtstamp_get = idpf_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = idpf_hwtstamp_set,</div><div class='add'>+	.ndo_bpf = idpf_xdp,</div><div class='add'>+	.ndo_xdp_xmit = idpf_xdp_xmit,</div><div class='add'>+	.ndo_xsk_wakeup = idpf_xsk_wakeup,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_main.c b/drivers/net/ethernet/intel/idpf/idpf_main.c<br/>index db476b3314c8..de5d722cc21d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_main.c</a></div><div class='hunk'>@@ -3,15 +3,94 @@</div><div class='ctx'> </div><div class='ctx'> #include "idpf.h"</div><div class='ctx'> #include "idpf_devids.h"</div><div class='add'>+#include "idpf_lan_vf_regs.h"</div><div class='ctx'> #include "idpf_virtchnl.h"</div><div class='ctx'> </div><div class='ctx'> #define DRV_SUMMARY	"Intel(R) Infrastructure Data Path Function Linux Driver"</div><div class='ctx'> </div><div class='add'>+#define IDPF_NETWORK_ETHERNET_PROGIF				0x01</div><div class='add'>+#define IDPF_CLASS_NETWORK_ETHERNET_PROGIF			\</div><div class='add'>+	(PCI_CLASS_NETWORK_ETHERNET &lt;&lt; 8 | IDPF_NETWORK_ETHERNET_PROGIF)</div><div class='add'>+#define IDPF_VF_TEST_VAL		0xfeed0000u</div><div class='add'>+</div><div class='ctx'> MODULE_DESCRIPTION(DRV_SUMMARY);</div><div class='del'>-MODULE_IMPORT_NS(LIBETH);</div><div class='add'>+MODULE_IMPORT_NS("LIBETH");</div><div class='add'>+MODULE_IMPORT_NS("LIBETH_XDP");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * idpf_get_device_type - Helper to find if it is a VF or PF device</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ *</div><div class='add'>+ * Return: PF/VF device ID or -%errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_get_device_type(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	addr = ioremap(pci_resource_start(pdev, 0) + VF_ARQBAL, 4);</div><div class='add'>+	if (!addr) {</div><div class='add'>+		pci_err(pdev, "Failed to allocate BAR0 mbx region\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(IDPF_VF_TEST_VAL, addr);</div><div class='add'>+	if (readl(addr) == IDPF_VF_TEST_VAL)</div><div class='add'>+		ret = IDPF_DEV_ID_VF;</div><div class='add'>+	else</div><div class='add'>+		ret = IDPF_DEV_ID_PF;</div><div class='add'>+</div><div class='add'>+	iounmap(addr);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_dev_init - Initialize device specific parameters</div><div class='add'>+ * @adapter: adapter to initialize</div><div class='add'>+ * @ent: entry in idpf_pci_tbl</div><div class='add'>+ *</div><div class='add'>+ * Return: %0 on success, -%errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_dev_init(struct idpf_adapter *adapter,</div><div class='add'>+			 const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (ent-&gt;class == IDPF_CLASS_NETWORK_ETHERNET_PROGIF) {</div><div class='add'>+		ret = idpf_get_device_type(adapter-&gt;pdev);</div><div class='add'>+		switch (ret) {</div><div class='add'>+		case IDPF_DEV_ID_VF:</div><div class='add'>+			idpf_vf_dev_ops_init(adapter);</div><div class='add'>+			adapter-&gt;crc_enable = true;</div><div class='add'>+			break;</div><div class='add'>+		case IDPF_DEV_ID_PF:</div><div class='add'>+			idpf_dev_ops_init(adapter);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (ent-&gt;device) {</div><div class='add'>+	case IDPF_DEV_ID_PF:</div><div class='add'>+		idpf_dev_ops_init(adapter);</div><div class='add'>+		break;</div><div class='add'>+	case IDPF_DEV_ID_VF:</div><div class='add'>+		idpf_vf_dev_ops_init(adapter);</div><div class='add'>+		adapter-&gt;crc_enable = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * idpf_remove - Device removal routine</div><div class='ctx'>  * @pdev: PCI device information struct</div><div class='ctx'>  */</div><div class='hunk'>@@ -62,6 +141,9 @@ destroy_wqs:</div><div class='ctx'> 	destroy_workqueue(adapter-&gt;vc_event_wq);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;max_vports; i++) {</div><div class='add'>+		if (!adapter-&gt;vport_config[i])</div><div class='add'>+			continue;</div><div class='add'>+		kfree(adapter-&gt;vport_config[i]-&gt;user_config.q_coalesce);</div><div class='ctx'> 		kfree(adapter-&gt;vport_config[i]);</div><div class='ctx'> 		adapter-&gt;vport_config[i] = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -87,7 +169,12 @@ destroy_wqs:</div><div class='ctx'>  */</div><div class='ctx'> static void idpf_shutdown(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	idpf_remove(pdev);</div><div class='add'>+	struct idpf_adapter *adapter = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;adapter-&gt;serv_task);</div><div class='add'>+	cancel_delayed_work_sync(&amp;adapter-&gt;vc_event_task);</div><div class='add'>+	idpf_vc_core_deinit(adapter);</div><div class='add'>+	idpf_deinit_dflt_mbx(adapter);</div><div class='ctx'> </div><div class='ctx'> 	if (system_state == SYSTEM_POWER_OFF)</div><div class='ctx'> 		pci_set_power_state(pdev, PCI_D3hot);</div><div class='hunk'>@@ -101,15 +188,37 @@ static void idpf_shutdown(struct pci_dev *pdev)</div><div class='ctx'>  */</div><div class='ctx'> static int idpf_cfg_hw(struct idpf_adapter *adapter)</div><div class='ctx'> {</div><div class='add'>+	resource_size_t res_start, mbx_start, rstat_start;</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='ctx'> 	struct idpf_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	long len;</div><div class='ctx'> </div><div class='del'>-	hw-&gt;hw_addr = pcim_iomap_table(pdev)[0];</div><div class='del'>-	if (!hw-&gt;hw_addr) {</div><div class='del'>-		pci_err(pdev, "failed to allocate PCI iomap table\n");</div><div class='add'>+	res_start = pci_resource_start(pdev, 0);</div><div class='add'>+</div><div class='add'>+	/* Map mailbox space for virtchnl communication */</div><div class='add'>+	mbx_start = res_start + adapter-&gt;dev_ops.static_reg_info[0].start;</div><div class='add'>+	len = resource_size(&amp;adapter-&gt;dev_ops.static_reg_info[0]);</div><div class='add'>+	hw-&gt;mbx.vaddr = devm_ioremap(dev, mbx_start, len);</div><div class='add'>+	if (!hw-&gt;mbx.vaddr) {</div><div class='add'>+		pci_err(pdev, "failed to allocate BAR0 mbx region\n");</div><div class='ctx'> </div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='add'>+	hw-&gt;mbx.addr_start = adapter-&gt;dev_ops.static_reg_info[0].start;</div><div class='add'>+	hw-&gt;mbx.addr_len = len;</div><div class='add'>+</div><div class='add'>+	/* Map rstat space for resets */</div><div class='add'>+	rstat_start = res_start + adapter-&gt;dev_ops.static_reg_info[1].start;</div><div class='add'>+	len = resource_size(&amp;adapter-&gt;dev_ops.static_reg_info[1]);</div><div class='add'>+	hw-&gt;rstat.vaddr = devm_ioremap(dev, rstat_start, len);</div><div class='add'>+	if (!hw-&gt;rstat.vaddr) {</div><div class='add'>+		pci_err(pdev, "failed to allocate BAR0 rstat region\n");</div><div class='add'>+</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	hw-&gt;rstat.addr_start = adapter-&gt;dev_ops.static_reg_info[1].start;</div><div class='add'>+	hw-&gt;rstat.addr_len = len;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;back = adapter;</div><div class='ctx'> </div><div class='hunk'>@@ -136,33 +245,22 @@ static int idpf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	adapter-&gt;req_tx_splitq = true;</div><div class='ctx'> 	adapter-&gt;req_rx_splitq = true;</div><div class='ctx'> </div><div class='del'>-	switch (ent-&gt;device) {</div><div class='del'>-	case IDPF_DEV_ID_PF:</div><div class='del'>-		idpf_dev_ops_init(adapter);</div><div class='del'>-		break;</div><div class='del'>-	case IDPF_DEV_ID_VF:</div><div class='del'>-		idpf_vf_dev_ops_init(adapter);</div><div class='del'>-		adapter-&gt;crc_enable = true;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Unexpected dev ID 0x%x in idpf probe\n",</div><div class='del'>-			ent-&gt;device);</div><div class='del'>-		goto err_free;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	adapter-&gt;pdev = pdev;</div><div class='ctx'> 	err = pcim_enable_device(pdev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free;</div><div class='ctx'> </div><div class='del'>-	err = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev));</div><div class='add'>+	err = pcim_request_region(pdev, 0, pci_name(pdev));</div><div class='ctx'> 	if (err) {</div><div class='del'>-		pci_err(pdev, "pcim_iomap_regions failed %pe\n", ERR_PTR(err));</div><div class='add'>+		pci_err(pdev, "pcim_request_region failed %pe\n", ERR_PTR(err));</div><div class='ctx'> </div><div class='ctx'> 		goto err_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = pci_enable_ptm(pdev, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		pci_dbg(pdev, "PCIe PTM is not supported by PCIe bus/controller\n");</div><div class='add'>+</div><div class='ctx'> 	/* set up for high or low dma */</div><div class='ctx'> 	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -174,7 +272,8 @@ static int idpf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> 	pci_set_drvdata(pdev, adapter);</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;init_wq = alloc_workqueue("%s-%s-init", 0, 0,</div><div class='add'>+	adapter-&gt;init_wq = alloc_workqueue("%s-%s-init",</div><div class='add'>+					   WQ_UNBOUND | WQ_MEM_RECLAIM, 0,</div><div class='ctx'> 					   dev_driver_string(dev),</div><div class='ctx'> 					   dev_name(dev));</div><div class='ctx'> 	if (!adapter-&gt;init_wq) {</div><div class='hunk'>@@ -183,7 +282,8 @@ static int idpf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;serv_wq = alloc_workqueue("%s-%s-service", 0, 0,</div><div class='add'>+	adapter-&gt;serv_wq = alloc_workqueue("%s-%s-service",</div><div class='add'>+					   WQ_UNBOUND | WQ_MEM_RECLAIM, 0,</div><div class='ctx'> 					   dev_driver_string(dev),</div><div class='ctx'> 					   dev_name(dev));</div><div class='ctx'> 	if (!adapter-&gt;serv_wq) {</div><div class='hunk'>@@ -192,8 +292,8 @@ static int idpf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_serv_wq_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;mbx_wq = alloc_workqueue("%s-%s-mbx", 0, 0,</div><div class='del'>-					  dev_driver_string(dev),</div><div class='add'>+	adapter-&gt;mbx_wq = alloc_workqueue("%s-%s-mbx", WQ_UNBOUND | WQ_HIGHPRI,</div><div class='add'>+					  0, dev_driver_string(dev),</div><div class='ctx'> 					  dev_name(dev));</div><div class='ctx'> 	if (!adapter-&gt;mbx_wq) {</div><div class='ctx'> 		dev_err(dev, "Failed to allocate mailbox workqueue\n");</div><div class='hunk'>@@ -201,7 +301,8 @@ static int idpf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_mbx_wq_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;stats_wq = alloc_workqueue("%s-%s-stats", 0, 0,</div><div class='add'>+	adapter-&gt;stats_wq = alloc_workqueue("%s-%s-stats",</div><div class='add'>+					    WQ_UNBOUND | WQ_MEM_RECLAIM, 0,</div><div class='ctx'> 					    dev_driver_string(dev),</div><div class='ctx'> 					    dev_name(dev));</div><div class='ctx'> 	if (!adapter-&gt;stats_wq) {</div><div class='hunk'>@@ -210,7 +311,8 @@ static int idpf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_stats_wq_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;vc_event_wq = alloc_workqueue("%s-%s-vc_event", 0, 0,</div><div class='add'>+	adapter-&gt;vc_event_wq = alloc_workqueue("%s-%s-vc_event",</div><div class='add'>+					       WQ_UNBOUND | WQ_MEM_RECLAIM, 0,</div><div class='ctx'> 					       dev_driver_string(dev),</div><div class='ctx'> 					       dev_name(dev));</div><div class='ctx'> 	if (!adapter-&gt;vc_event_wq) {</div><div class='hunk'>@@ -222,11 +324,18 @@ static int idpf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	/* setup msglvl */</div><div class='ctx'> 	adapter-&gt;msg_enable = netif_msg_init(-1, IDPF_AVAIL_NETIF_M);</div><div class='ctx'> </div><div class='add'>+	err = idpf_dev_init(adapter, ent);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Unexpected dev ID 0x%x in idpf probe\n",</div><div class='add'>+			ent-&gt;device);</div><div class='add'>+		goto destroy_vc_event_wq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = idpf_cfg_hw(adapter);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Failed to configure HW structure for adapter: %d\n",</div><div class='ctx'> 			err);</div><div class='del'>-		goto err_cfg_hw;</div><div class='add'>+		goto destroy_vc_event_wq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;adapter-&gt;vport_ctrl_lock);</div><div class='hunk'>@@ -247,7 +356,7 @@ static int idpf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_cfg_hw:</div><div class='add'>+destroy_vc_event_wq:</div><div class='ctx'> 	destroy_workqueue(adapter-&gt;vc_event_wq);</div><div class='ctx'> err_vc_event_wq_alloc:</div><div class='ctx'> 	destroy_workqueue(adapter-&gt;stats_wq);</div><div class='hunk'>@@ -267,6 +376,7 @@ err_free:</div><div class='ctx'> static const struct pci_device_id idpf_pci_tbl[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, IDPF_DEV_ID_PF)},</div><div class='ctx'> 	{ PCI_VDEVICE(INTEL, IDPF_DEV_ID_VF)},</div><div class='add'>+	{ PCI_DEVICE_CLASS(IDPF_CLASS_NETWORK_ETHERNET_PROGIF, ~0)},</div><div class='ctx'> 	{ /* Sentinel */ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, idpf_pci_tbl);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_mem.h b/drivers/net/ethernet/intel/idpf/idpf_mem.h<br/>index b21a04fccf0f..2aaabdc02dd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_mem.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_mem.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_mem.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_mem.h</a></div><div class='hunk'>@@ -12,9 +12,9 @@ struct idpf_dma_mem {</div><div class='ctx'> 	size_t size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define wr32(a, reg, value)	writel((value), ((a)-&gt;hw_addr + (reg)))</div><div class='del'>-#define rd32(a, reg)		readl((a)-&gt;hw_addr + (reg))</div><div class='del'>-#define wr64(a, reg, value)	writeq((value), ((a)-&gt;hw_addr + (reg)))</div><div class='del'>-#define rd64(a, reg)		readq((a)-&gt;hw_addr + (reg))</div><div class='add'>+#define idpf_mbx_wr32(a, reg, value)	writel((value), ((a)-&gt;mbx.vaddr + (reg)))</div><div class='add'>+#define idpf_mbx_rd32(a, reg)		readl((a)-&gt;mbx.vaddr + (reg))</div><div class='add'>+#define idpf_mbx_wr64(a, reg, value)	writeq((value), ((a)-&gt;mbx.vaddr + (reg)))</div><div class='add'>+#define idpf_mbx_rd64(a, reg)		readq((a)-&gt;mbx.vaddr + (reg))</div><div class='ctx'> </div><div class='ctx'> #endif /* _IDPF_MEM_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c b/drivers/net/ethernet/intel/idpf/idpf_ptp.c<br/>new file mode 100644<br/>index 000000000000..3e1052d070cf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,1021 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2024 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#include "idpf.h"</div><div class='add'>+#include "idpf_ptp.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_access - Determine the access type of the PTP features</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @direct: Capability that indicates the direct access</div><div class='add'>+ * @mailbox: Capability that indicates the mailbox access</div><div class='add'>+ *</div><div class='add'>+ * Return: the type of supported access for the PTP feature.</div><div class='add'>+ */</div><div class='add'>+static enum idpf_ptp_access</div><div class='add'>+idpf_ptp_get_access(const struct idpf_adapter *adapter, u32 direct, u32 mailbox)</div><div class='add'>+{</div><div class='add'>+	if (adapter-&gt;ptp-&gt;caps &amp; direct)</div><div class='add'>+		return IDPF_PTP_DIRECT;</div><div class='add'>+	else if (adapter-&gt;ptp-&gt;caps &amp; mailbox)</div><div class='add'>+		return IDPF_PTP_MAILBOX;</div><div class='add'>+	else</div><div class='add'>+		return IDPF_PTP_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_features_access - Determine the access type of PTP features</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * Fulfill the adapter structure with type of the supported PTP features</div><div class='add'>+ * access.</div><div class='add'>+ */</div><div class='add'>+void idpf_ptp_get_features_access(const struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct idpf_ptp *ptp = adapter-&gt;ptp;</div><div class='add'>+	u32 direct, mailbox;</div><div class='add'>+</div><div class='add'>+	/* Get the device clock time */</div><div class='add'>+	direct = VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME;</div><div class='add'>+	mailbox = VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME_MB;</div><div class='add'>+	ptp-&gt;get_dev_clk_time_access = idpf_ptp_get_access(adapter,</div><div class='add'>+							   direct,</div><div class='add'>+							   mailbox);</div><div class='add'>+</div><div class='add'>+	/* Get the cross timestamp */</div><div class='add'>+	direct = VIRTCHNL2_CAP_PTP_GET_CROSS_TIME;</div><div class='add'>+	mailbox = VIRTCHNL2_CAP_PTP_GET_CROSS_TIME_MB;</div><div class='add'>+	ptp-&gt;get_cross_tstamp_access = idpf_ptp_get_access(adapter,</div><div class='add'>+							   direct,</div><div class='add'>+							   mailbox);</div><div class='add'>+</div><div class='add'>+	/* Set the device clock time */</div><div class='add'>+	direct = VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME;</div><div class='add'>+	mailbox = VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME;</div><div class='add'>+	ptp-&gt;set_dev_clk_time_access = idpf_ptp_get_access(adapter,</div><div class='add'>+							   direct,</div><div class='add'>+							   mailbox);</div><div class='add'>+</div><div class='add'>+	/* Adjust the device clock time */</div><div class='add'>+	direct = VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK;</div><div class='add'>+	mailbox = VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB;</div><div class='add'>+	ptp-&gt;adj_dev_clk_time_access = idpf_ptp_get_access(adapter,</div><div class='add'>+							   direct,</div><div class='add'>+							   mailbox);</div><div class='add'>+</div><div class='add'>+	/* Tx timestamping */</div><div class='add'>+	direct = VIRTCHNL2_CAP_PTP_TX_TSTAMPS;</div><div class='add'>+	mailbox = VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB;</div><div class='add'>+	ptp-&gt;tx_tstamp_access = idpf_ptp_get_access(adapter,</div><div class='add'>+						    direct,</div><div class='add'>+						    mailbox);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_enable_shtime - Enable shadow time and execute a command</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ */</div><div class='add'>+static void idpf_ptp_enable_shtime(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u32 shtime_enable, exec_cmd;</div><div class='add'>+</div><div class='add'>+	/* Get offsets */</div><div class='add'>+	shtime_enable = adapter-&gt;ptp-&gt;cmd.shtime_enable_mask;</div><div class='add'>+	exec_cmd = adapter-&gt;ptp-&gt;cmd.exec_cmd_mask;</div><div class='add'>+</div><div class='add'>+	/* Set the shtime en and the sync field */</div><div class='add'>+	writel(shtime_enable, adapter-&gt;ptp-&gt;dev_clk_regs.cmd_sync);</div><div class='add'>+	writel(exec_cmd | shtime_enable, adapter-&gt;ptp-&gt;dev_clk_regs.cmd_sync);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_read_src_clk_reg_direct - Read directly the main timer value</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @sts: Optional parameter for holding a pair of system timestamps from</div><div class='add'>+ *	 the system clock. Will be ignored when NULL is given.</div><div class='add'>+ *</div><div class='add'>+ * Return: the device clock time.</div><div class='add'>+ */</div><div class='add'>+static u64 idpf_ptp_read_src_clk_reg_direct(struct idpf_adapter *adapter,</div><div class='add'>+					    struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	struct idpf_ptp *ptp = adapter-&gt;ptp;</div><div class='add'>+	u32 hi, lo;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;ptp-&gt;read_dev_clk_lock);</div><div class='add'>+</div><div class='add'>+	/* Read the system timestamp pre PHC read */</div><div class='add'>+	ptp_read_system_prets(sts);</div><div class='add'>+</div><div class='add'>+	idpf_ptp_enable_shtime(adapter);</div><div class='add'>+</div><div class='add'>+	/* Read the system timestamp post PHC read */</div><div class='add'>+	ptp_read_system_postts(sts);</div><div class='add'>+</div><div class='add'>+	lo = readl(ptp-&gt;dev_clk_regs.dev_clk_ns_l);</div><div class='add'>+	hi = readl(ptp-&gt;dev_clk_regs.dev_clk_ns_h);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;ptp-&gt;read_dev_clk_lock);</div><div class='add'>+</div><div class='add'>+	return ((u64)hi &lt;&lt; 32) | lo;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_read_src_clk_reg_mailbox - Read the main timer value through mailbox</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @sts: Optional parameter for holding a pair of system timestamps from</div><div class='add'>+ *	 the system clock. Will be ignored when NULL is given.</div><div class='add'>+ * @src_clk: Returned main timer value in nanoseconds unit</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_read_src_clk_reg_mailbox(struct idpf_adapter *adapter,</div><div class='add'>+					     struct ptp_system_timestamp *sts,</div><div class='add'>+					     u64 *src_clk)</div><div class='add'>+{</div><div class='add'>+	struct idpf_ptp_dev_timers clk_time;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Read the system timestamp pre PHC read */</div><div class='add'>+	ptp_read_system_prets(sts);</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_get_dev_clk_time(adapter, &amp;clk_time);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Read the system timestamp post PHC read */</div><div class='add'>+	ptp_read_system_postts(sts);</div><div class='add'>+</div><div class='add'>+	*src_clk = clk_time.dev_clk_time_ns;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_read_src_clk_reg - Read the main timer value</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @src_clk: Returned main timer value in nanoseconds unit</div><div class='add'>+ * @sts: Optional parameter for holding a pair of system timestamps from</div><div class='add'>+ *	 the system clock. Will be ignored if NULL is given.</div><div class='add'>+ *</div><div class='add'>+ * Return: the device clock time on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_read_src_clk_reg(struct idpf_adapter *adapter, u64 *src_clk,</div><div class='add'>+				     struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	switch (adapter-&gt;ptp-&gt;get_dev_clk_time_access) {</div><div class='add'>+	case IDPF_PTP_NONE:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	case IDPF_PTP_MAILBOX:</div><div class='add'>+		return idpf_ptp_read_src_clk_reg_mailbox(adapter, sts, src_clk);</div><div class='add'>+	case IDPF_PTP_DIRECT:</div><div class='add'>+		*src_clk = idpf_ptp_read_src_clk_reg_direct(adapter, sts);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_ARM_ARCH_TIMER) || IS_ENABLED(CONFIG_X86)</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_sync_device_time_direct - Get the cross time stamp values</div><div class='add'>+ *					  directly</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @dev_time: 64bit main timer value</div><div class='add'>+ * @sys_time: 64bit system time value</div><div class='add'>+ */</div><div class='add'>+static void idpf_ptp_get_sync_device_time_direct(struct idpf_adapter *adapter,</div><div class='add'>+						 u64 *dev_time, u64 *sys_time)</div><div class='add'>+{</div><div class='add'>+	u32 dev_time_lo, dev_time_hi, sys_time_lo, sys_time_hi;</div><div class='add'>+	struct idpf_ptp *ptp = adapter-&gt;ptp;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;ptp-&gt;read_dev_clk_lock);</div><div class='add'>+</div><div class='add'>+	idpf_ptp_enable_shtime(adapter);</div><div class='add'>+</div><div class='add'>+	dev_time_lo = readl(ptp-&gt;dev_clk_regs.dev_clk_ns_l);</div><div class='add'>+	dev_time_hi = readl(ptp-&gt;dev_clk_regs.dev_clk_ns_h);</div><div class='add'>+</div><div class='add'>+	sys_time_lo = readl(ptp-&gt;dev_clk_regs.sys_time_ns_l);</div><div class='add'>+	sys_time_hi = readl(ptp-&gt;dev_clk_regs.sys_time_ns_h);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;ptp-&gt;read_dev_clk_lock);</div><div class='add'>+</div><div class='add'>+	*dev_time = (u64)dev_time_hi &lt;&lt; 32 | dev_time_lo;</div><div class='add'>+	*sys_time = (u64)sys_time_hi &lt;&lt; 32 | sys_time_lo;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_sync_device_time_mailbox - Get the cross time stamp values</div><div class='add'>+ *					   through mailbox</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @dev_time: 64bit main timer value expressed in nanoseconds</div><div class='add'>+ * @sys_time: 64bit system time value expressed in nanoseconds</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_get_sync_device_time_mailbox(struct idpf_adapter *adapter,</div><div class='add'>+						 u64 *dev_time, u64 *sys_time)</div><div class='add'>+{</div><div class='add'>+	struct idpf_ptp_dev_timers cross_time;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_get_cross_time(adapter, &amp;cross_time);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*dev_time = cross_time.dev_clk_time_ns;</div><div class='add'>+	*sys_time = cross_time.sys_time_ns;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_sync_device_time - Get the cross time stamp info</div><div class='add'>+ * @device: Current device time</div><div class='add'>+ * @system: System counter value read synchronously with device time</div><div class='add'>+ * @ctx: Context provided by timekeeping code</div><div class='add'>+ *</div><div class='add'>+ * The device and the system clocks time read simultaneously.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_get_sync_device_time(ktime_t *device,</div><div class='add'>+					 struct system_counterval_t *system,</div><div class='add'>+					 void *ctx)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = ctx;</div><div class='add'>+	u64 ns_time_dev, ns_time_sys;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (adapter-&gt;ptp-&gt;get_cross_tstamp_access) {</div><div class='add'>+	case IDPF_PTP_NONE:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	case IDPF_PTP_DIRECT:</div><div class='add'>+		idpf_ptp_get_sync_device_time_direct(adapter, &amp;ns_time_dev,</div><div class='add'>+						     &amp;ns_time_sys);</div><div class='add'>+		break;</div><div class='add'>+	case IDPF_PTP_MAILBOX:</div><div class='add'>+		err = idpf_ptp_get_sync_device_time_mailbox(adapter,</div><div class='add'>+							    &amp;ns_time_dev,</div><div class='add'>+							    &amp;ns_time_sys);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*device = ns_to_ktime(ns_time_dev);</div><div class='add'>+</div><div class='add'>+	system-&gt;cs_id = IS_ENABLED(CONFIG_X86) ? CSID_X86_ART</div><div class='add'>+					       : CSID_ARM_ARCH_COUNTER;</div><div class='add'>+	system-&gt;cycles = ns_time_sys;</div><div class='add'>+	system-&gt;use_nsecs = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_crosststamp - Capture a device cross timestamp</div><div class='add'>+ * @info: the driver's PTP info structure</div><div class='add'>+ * @cts: The memory to fill the cross timestamp info</div><div class='add'>+ *</div><div class='add'>+ * Capture a cross timestamp between the system time and the device PTP hardware</div><div class='add'>+ * clock.</div><div class='add'>+ *</div><div class='add'>+ * Return: cross timestamp value on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_get_crosststamp(struct ptp_clock_info *info,</div><div class='add'>+				    struct system_device_crosststamp *cts)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);</div><div class='add'>+</div><div class='add'>+	return get_device_system_crosststamp(idpf_ptp_get_sync_device_time,</div><div class='add'>+					     adapter, NULL, cts);</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_ARM_ARCH_TIMER || CONFIG_X86 */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_gettimex64 - Get the time of the clock</div><div class='add'>+ * @info: the driver's PTP info structure</div><div class='add'>+ * @ts: timespec64 structure to hold the current time value</div><div class='add'>+ * @sts: Optional parameter for holding a pair of system timestamps from</div><div class='add'>+ *	 the system clock. Will be ignored if NULL is given.</div><div class='add'>+ *</div><div class='add'>+ * Return: the device clock value in ns, after converting it into a timespec</div><div class='add'>+ * struct on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_gettimex64(struct ptp_clock_info *info,</div><div class='add'>+			       struct timespec64 *ts,</div><div class='add'>+			       struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);</div><div class='add'>+	u64 time_ns;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_read_src_clk_reg(adapter, &amp;time_ns, sts);</div><div class='add'>+	if (err)</div><div class='add'>+		return -EACCES;</div><div class='add'>+</div><div class='add'>+	*ts = ns_to_timespec64(time_ns);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_update_phctime_rxq_grp - Update the cached PHC time for a given Rx</div><div class='add'>+ *				     queue group.</div><div class='add'>+ * @grp: receive queue group in which Rx timestamp is enabled</div><div class='add'>+ * @split: Indicates whether the queue model is split or single queue</div><div class='add'>+ * @systime: Cached system time</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+idpf_ptp_update_phctime_rxq_grp(const struct idpf_rxq_group *grp, bool split,</div><div class='add'>+				u64 systime)</div><div class='add'>+{</div><div class='add'>+	struct idpf_rx_queue *rxq;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	if (!split) {</div><div class='add'>+		for (i = 0; i &lt; grp-&gt;singleq.num_rxq; i++) {</div><div class='add'>+			rxq = grp-&gt;singleq.rxqs[i];</div><div class='add'>+			if (rxq)</div><div class='add'>+				WRITE_ONCE(rxq-&gt;cached_phc_time, systime);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; grp-&gt;splitq.num_rxq_sets; i++) {</div><div class='add'>+			rxq = &amp;grp-&gt;splitq.rxq_sets[i]-&gt;rxq;</div><div class='add'>+			if (rxq)</div><div class='add'>+				WRITE_ONCE(rxq-&gt;cached_phc_time, systime);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_update_cached_phctime - Update the cached PHC time values</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * This function updates the system time values which are cached in the adapter</div><div class='add'>+ * structure and the Rx queues.</div><div class='add'>+ *</div><div class='add'>+ * This function must be called periodically to ensure that the cached value</div><div class='add'>+ * is never more than 2 seconds old.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_update_cached_phctime(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u64 systime;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_read_src_clk_reg(adapter, &amp;systime, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return -EACCES;</div><div class='add'>+</div><div class='add'>+	/* Update the cached PHC time stored in the adapter structure.</div><div class='add'>+	 * These values are used to extend Tx timestamp values to 64 bit</div><div class='add'>+	 * expected by the stack.</div><div class='add'>+	 */</div><div class='add'>+	WRITE_ONCE(adapter-&gt;ptp-&gt;cached_phc_time, systime);</div><div class='add'>+	WRITE_ONCE(adapter-&gt;ptp-&gt;cached_phc_jiffies, jiffies);</div><div class='add'>+</div><div class='add'>+	idpf_for_each_vport(adapter, vport) {</div><div class='add'>+		bool split;</div><div class='add'>+</div><div class='add'>+		if (!vport || !vport-&gt;rxq_grps)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		split = idpf_is_queue_model_split(vport-&gt;rxq_model);</div><div class='add'>+</div><div class='add'>+		for (u16 i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='add'>+			struct idpf_rxq_group *grp = &amp;vport-&gt;rxq_grps[i];</div><div class='add'>+</div><div class='add'>+			idpf_ptp_update_phctime_rxq_grp(grp, split, systime);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_settime64 - Set the time of the clock</div><div class='add'>+ * @info: the driver's PTP info structure</div><div class='add'>+ * @ts: timespec64 structure that holds the new time value</div><div class='add'>+ *</div><div class='add'>+ * Set the device clock to the user input value. The conversion from timespec</div><div class='add'>+ * to ns happens in the write function.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_settime64(struct ptp_clock_info *info,</div><div class='add'>+			      const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);</div><div class='add'>+	enum idpf_ptp_access access;</div><div class='add'>+	int err;</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	access = adapter-&gt;ptp-&gt;set_dev_clk_time_access;</div><div class='add'>+	if (access != IDPF_PTP_MAILBOX)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ns = timespec64_to_ns(ts);</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_set_dev_clk_time(adapter, ns);</div><div class='add'>+	if (err) {</div><div class='add'>+		pci_err(adapter-&gt;pdev, "Failed to set the time, err: %pe\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_update_cached_phctime(adapter);</div><div class='add'>+	if (err)</div><div class='add'>+		pci_warn(adapter-&gt;pdev,</div><div class='add'>+			 "Unable to immediately update cached PHC time\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_adjtime_nonatomic - Do a non-atomic clock adjustment</div><div class='add'>+ * @info: the driver's PTP info structure</div><div class='add'>+ * @delta: Offset in nanoseconds to adjust the time by</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_adjtime_nonatomic(struct ptp_clock_info *info, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct timespec64 now, then;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_gettimex64(info, &amp;now, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	then = ns_to_timespec64(delta);</div><div class='add'>+	now = timespec64_add(now, then);</div><div class='add'>+</div><div class='add'>+	return idpf_ptp_settime64(info, &amp;now);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_adjtime - Adjust the time of the clock by the indicated delta</div><div class='add'>+ * @info: the driver's PTP info structure</div><div class='add'>+ * @delta: Offset in nanoseconds to adjust the time by</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_adjtime(struct ptp_clock_info *info, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);</div><div class='add'>+	enum idpf_ptp_access access;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	access = adapter-&gt;ptp-&gt;adj_dev_clk_time_access;</div><div class='add'>+	if (access != IDPF_PTP_MAILBOX)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Hardware only supports atomic adjustments using signed 32-bit</div><div class='add'>+	 * integers. For any adjustment outside this range, perform</div><div class='add'>+	 * a non-atomic get-&gt;adjust-&gt;set flow.</div><div class='add'>+	 */</div><div class='add'>+	if (delta &gt; S32_MAX || delta &lt; S32_MIN)</div><div class='add'>+		return idpf_ptp_adjtime_nonatomic(info, delta);</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_adj_dev_clk_time(adapter, delta);</div><div class='add'>+	if (err) {</div><div class='add'>+		pci_err(adapter-&gt;pdev, "Failed to adjust the clock with delta %lld err: %pe\n",</div><div class='add'>+			delta, ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_update_cached_phctime(adapter);</div><div class='add'>+	if (err)</div><div class='add'>+		pci_warn(adapter-&gt;pdev,</div><div class='add'>+			 "Unable to immediately update cached PHC time\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_adjfine - Adjust clock increment rate</div><div class='add'>+ * @info: the driver's PTP info structure</div><div class='add'>+ * @scaled_ppm: Parts per million with 16-bit fractional field</div><div class='add'>+ *</div><div class='add'>+ * Adjust the frequency of the clock by the indicated scaled ppm from the</div><div class='add'>+ * base frequency.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_adjfine(struct ptp_clock_info *info, long scaled_ppm)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);</div><div class='add'>+	enum idpf_ptp_access access;</div><div class='add'>+	u64 incval, diff;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	access = adapter-&gt;ptp-&gt;adj_dev_clk_time_access;</div><div class='add'>+	if (access != IDPF_PTP_MAILBOX)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	incval = adapter-&gt;ptp-&gt;base_incval;</div><div class='add'>+</div><div class='add'>+	diff = adjust_by_scaled_ppm(incval, scaled_ppm);</div><div class='add'>+	err = idpf_ptp_adj_dev_clk_fine(adapter, diff);</div><div class='add'>+	if (err)</div><div class='add'>+		pci_err(adapter-&gt;pdev, "Failed to adjust clock increment rate for scaled ppm %ld %pe\n",</div><div class='add'>+			scaled_ppm, ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_verify_pin - Verify if pin supports requested pin function</div><div class='add'>+ * @info: the driver's PTP info structure</div><div class='add'>+ * @pin: Pin index</div><div class='add'>+ * @func: Assigned function</div><div class='add'>+ * @chan: Assigned channel</div><div class='add'>+ *</div><div class='add'>+ * Return: EOPNOTSUPP as not supported yet.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_verify_pin(struct ptp_clock_info *info, unsigned int pin,</div><div class='add'>+			       enum ptp_pin_function func, unsigned int chan)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_gpio_enable - Enable/disable ancillary features of PHC</div><div class='add'>+ * @info: the driver's PTP info structure</div><div class='add'>+ * @rq: The requested feature to change</div><div class='add'>+ * @on: Enable/disable flag</div><div class='add'>+ *</div><div class='add'>+ * Return: EOPNOTSUPP as not supported yet.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_gpio_enable(struct ptp_clock_info *info,</div><div class='add'>+				struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_tstamp_extend_32b_to_64b - Convert a 32b nanoseconds Tx or Rx</div><div class='add'>+ *				       timestamp value to 64b.</div><div class='add'>+ * @cached_phc_time: recently cached copy of PHC time</div><div class='add'>+ * @in_timestamp: Ingress/egress 32b nanoseconds timestamp value</div><div class='add'>+ *</div><div class='add'>+ * Hardware captures timestamps which contain only 32 bits of nominal</div><div class='add'>+ * nanoseconds, as opposed to the 64bit timestamps that the stack expects.</div><div class='add'>+ *</div><div class='add'>+ * Return: Tx timestamp value extended to 64 bits based on cached PHC time.</div><div class='add'>+ */</div><div class='add'>+u64 idpf_ptp_tstamp_extend_32b_to_64b(u64 cached_phc_time, u32 in_timestamp)</div><div class='add'>+{</div><div class='add'>+	u32 delta, phc_time_lo;</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	/* Extract the lower 32 bits of the PHC time */</div><div class='add'>+	phc_time_lo = (u32)cached_phc_time;</div><div class='add'>+</div><div class='add'>+	/* Calculate the delta between the lower 32bits of the cached PHC</div><div class='add'>+	 * time and the in_timestamp value.</div><div class='add'>+	 */</div><div class='add'>+	delta = in_timestamp - phc_time_lo;</div><div class='add'>+</div><div class='add'>+	if (delta &gt; U32_MAX / 2) {</div><div class='add'>+		/* Reverse the delta calculation here */</div><div class='add'>+		delta = phc_time_lo - in_timestamp;</div><div class='add'>+		ns = cached_phc_time - delta;</div><div class='add'>+	} else {</div><div class='add'>+		ns = cached_phc_time + delta;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ns;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_extend_ts - Convert a 40b timestamp to 64b nanoseconds</div><div class='add'>+ * @vport: Virtual port structure</div><div class='add'>+ * @in_tstamp: Ingress/egress timestamp value</div><div class='add'>+ *</div><div class='add'>+ * It is assumed that the caller verifies the timestamp is valid prior to</div><div class='add'>+ * calling this function.</div><div class='add'>+ *</div><div class='add'>+ * Extract the 32bit nominal nanoseconds and extend them. Use the cached PHC</div><div class='add'>+ * time stored in the device private PTP structure as the basis for timestamp</div><div class='add'>+ * extension.</div><div class='add'>+ *</div><div class='add'>+ * Return: Tx timestamp value extended to 64 bits.</div><div class='add'>+ */</div><div class='add'>+u64 idpf_ptp_extend_ts(struct idpf_vport *vport, u64 in_tstamp)</div><div class='add'>+{</div><div class='add'>+	struct idpf_ptp *ptp = vport-&gt;adapter-&gt;ptp;</div><div class='add'>+	unsigned long discard_time;</div><div class='add'>+</div><div class='add'>+	discard_time = ptp-&gt;cached_phc_jiffies + 2 * HZ;</div><div class='add'>+</div><div class='add'>+	if (time_is_before_jiffies(discard_time)) {</div><div class='add'>+		u64_stats_update_begin(&amp;vport-&gt;tstamp_stats.stats_sync);</div><div class='add'>+		u64_stats_inc(&amp;vport-&gt;tstamp_stats.discarded);</div><div class='add'>+		u64_stats_update_end(&amp;vport-&gt;tstamp_stats.stats_sync);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return idpf_ptp_tstamp_extend_32b_to_64b(ptp-&gt;cached_phc_time,</div><div class='add'>+						 lower_32_bits(in_tstamp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_request_ts - Request an available Tx timestamp index</div><div class='add'>+ * @tx_q: Transmit queue on which the Tx timestamp is requested</div><div class='add'>+ * @skb: The SKB to associate with this timestamp request</div><div class='add'>+ * @idx: Index of the Tx timestamp latch</div><div class='add'>+ *</div><div class='add'>+ * Request tx timestamp index negotiated during PTP init that will be set into</div><div class='add'>+ * Tx descriptor.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 and the index that can be provided to Tx descriptor on success,</div><div class='add'>+ * -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_request_ts(struct idpf_tx_queue *tx_q, struct sk_buff *skb,</div><div class='add'>+			u32 *idx)</div><div class='add'>+{</div><div class='add'>+	struct idpf_ptp_tx_tstamp *ptp_tx_tstamp;</div><div class='add'>+	struct list_head *head;</div><div class='add'>+</div><div class='add'>+	/* Get the index from the free latches list */</div><div class='add'>+	spin_lock(&amp;tx_q-&gt;cached_tstamp_caps-&gt;latches_lock);</div><div class='add'>+</div><div class='add'>+	head = &amp;tx_q-&gt;cached_tstamp_caps-&gt;latches_free;</div><div class='add'>+	if (list_empty(head)) {</div><div class='add'>+		spin_unlock(&amp;tx_q-&gt;cached_tstamp_caps-&gt;latches_lock);</div><div class='add'>+		return -ENOBUFS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ptp_tx_tstamp = list_first_entry(head, struct idpf_ptp_tx_tstamp,</div><div class='add'>+					 list_member);</div><div class='add'>+	list_del(&amp;ptp_tx_tstamp-&gt;list_member);</div><div class='add'>+</div><div class='add'>+	ptp_tx_tstamp-&gt;skb = skb_get(skb);</div><div class='add'>+	skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+</div><div class='add'>+	/* Move the element to the used latches list */</div><div class='add'>+	list_add(&amp;ptp_tx_tstamp-&gt;list_member,</div><div class='add'>+		 &amp;tx_q-&gt;cached_tstamp_caps-&gt;latches_in_use);</div><div class='add'>+	spin_unlock(&amp;tx_q-&gt;cached_tstamp_caps-&gt;latches_lock);</div><div class='add'>+</div><div class='add'>+	*idx = ptp_tx_tstamp-&gt;idx;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_set_rx_tstamp - Enable or disable Rx timestamping</div><div class='add'>+ * @vport: Virtual port structure</div><div class='add'>+ * @rx_filter: Receive timestamp filter</div><div class='add'>+ */</div><div class='add'>+static void idpf_ptp_set_rx_tstamp(struct idpf_vport *vport, int rx_filter)</div><div class='add'>+{</div><div class='add'>+	bool enable = true, splitq;</div><div class='add'>+</div><div class='add'>+	splitq = idpf_is_queue_model_split(vport-&gt;rxq_model);</div><div class='add'>+</div><div class='add'>+	if (rx_filter == HWTSTAMP_FILTER_NONE) {</div><div class='add'>+		enable = false;</div><div class='add'>+		vport-&gt;tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+	} else {</div><div class='add'>+		vport-&gt;tstamp_config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (u16 i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='add'>+		struct idpf_rxq_group *grp = &amp;vport-&gt;rxq_grps[i];</div><div class='add'>+		struct idpf_rx_queue *rx_queue;</div><div class='add'>+		u16 j, num_rxq;</div><div class='add'>+</div><div class='add'>+		if (splitq)</div><div class='add'>+			num_rxq = grp-&gt;splitq.num_rxq_sets;</div><div class='add'>+		else</div><div class='add'>+			num_rxq = grp-&gt;singleq.num_rxq;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; num_rxq; j++) {</div><div class='add'>+			if (splitq)</div><div class='add'>+				rx_queue = &amp;grp-&gt;splitq.rxq_sets[j]-&gt;rxq;</div><div class='add'>+			else</div><div class='add'>+				rx_queue = grp-&gt;singleq.rxqs[j];</div><div class='add'>+</div><div class='add'>+			if (enable)</div><div class='add'>+				idpf_queue_set(PTP, rx_queue);</div><div class='add'>+			else</div><div class='add'>+				idpf_queue_clear(PTP, rx_queue);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_set_timestamp_mode - Setup driver for requested timestamp mode</div><div class='add'>+ * @vport: Virtual port structure</div><div class='add'>+ * @config: Hwtstamp settings requested or saved</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_set_timestamp_mode(struct idpf_vport *vport,</div><div class='add'>+				struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		if (!idpf_ptp_is_vport_tx_tstamp_ena(vport))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vport-&gt;tstamp_config.tx_type = config-&gt;tx_type;</div><div class='add'>+	idpf_ptp_set_rx_tstamp(vport, config-&gt;rx_filter);</div><div class='add'>+	*config = vport-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_tstamp_task - Delayed task to handle Tx tstamps</div><div class='add'>+ * @work: work_struct handle</div><div class='add'>+ */</div><div class='add'>+void idpf_tstamp_task(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct idpf_vport *vport;</div><div class='add'>+</div><div class='add'>+	vport = container_of(work, struct idpf_vport, tstamp_task);</div><div class='add'>+</div><div class='add'>+	idpf_ptp_get_tx_tstamp(vport);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_do_aux_work - Do PTP periodic work</div><div class='add'>+ * @info: Driver's PTP info structure</div><div class='add'>+ *</div><div class='add'>+ * Return: Number of jiffies to periodic work.</div><div class='add'>+ */</div><div class='add'>+static long idpf_ptp_do_aux_work(struct ptp_clock_info *info)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);</div><div class='add'>+</div><div class='add'>+	idpf_ptp_update_cached_phctime(adapter);</div><div class='add'>+</div><div class='add'>+	return msecs_to_jiffies(500);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_set_caps - Set PTP capabilities</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * This function sets the PTP functions.</div><div class='add'>+ */</div><div class='add'>+static void idpf_ptp_set_caps(const struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ptp_clock_info *info = &amp;adapter-&gt;ptp-&gt;info;</div><div class='add'>+</div><div class='add'>+	snprintf(info-&gt;name, sizeof(info-&gt;name), "%s-%s-clk",</div><div class='add'>+		 KBUILD_MODNAME, pci_name(adapter-&gt;pdev));</div><div class='add'>+</div><div class='add'>+	info-&gt;owner = THIS_MODULE;</div><div class='add'>+	info-&gt;max_adj = adapter-&gt;ptp-&gt;max_adj;</div><div class='add'>+	info-&gt;gettimex64 = idpf_ptp_gettimex64;</div><div class='add'>+	info-&gt;settime64 = idpf_ptp_settime64;</div><div class='add'>+	info-&gt;adjfine = idpf_ptp_adjfine;</div><div class='add'>+	info-&gt;adjtime = idpf_ptp_adjtime;</div><div class='add'>+	info-&gt;verify = idpf_ptp_verify_pin;</div><div class='add'>+	info-&gt;enable = idpf_ptp_gpio_enable;</div><div class='add'>+	info-&gt;do_aux_work = idpf_ptp_do_aux_work;</div><div class='add'>+#if IS_ENABLED(CONFIG_ARM_ARCH_TIMER)</div><div class='add'>+	info-&gt;getcrosststamp = idpf_ptp_get_crosststamp;</div><div class='add'>+#elif IS_ENABLED(CONFIG_X86)</div><div class='add'>+	if (pcie_ptm_enabled(adapter-&gt;pdev) &amp;&amp;</div><div class='add'>+	    boot_cpu_has(X86_FEATURE_ART) &amp;&amp;</div><div class='add'>+	    boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ))</div><div class='add'>+		info-&gt;getcrosststamp = idpf_ptp_get_crosststamp;</div><div class='add'>+#endif /* CONFIG_ARM_ARCH_TIMER */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_create_clock - Create PTP clock device for userspace</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * This function creates a new PTP clock device.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_ptp_create_clock(const struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ptp_clock *clock;</div><div class='add'>+</div><div class='add'>+	idpf_ptp_set_caps(adapter);</div><div class='add'>+</div><div class='add'>+	/* Attempt to register the clock before enabling the hardware. */</div><div class='add'>+	clock = ptp_clock_register(&amp;adapter-&gt;ptp-&gt;info,</div><div class='add'>+				   &amp;adapter-&gt;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(clock)) {</div><div class='add'>+		pci_err(adapter-&gt;pdev, "PTP clock creation failed: %pe\n",</div><div class='add'>+			clock);</div><div class='add'>+		return PTR_ERR(clock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adapter-&gt;ptp-&gt;clock = clock;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_release_vport_tstamp - Release the Tx timestamps trakcers for a</div><div class='add'>+ *				   given vport.</div><div class='add'>+ * @vport: Virtual port structure</div><div class='add'>+ *</div><div class='add'>+ * Remove the queues and delete lists that tracks Tx timestamp entries for a</div><div class='add'>+ * given vport.</div><div class='add'>+ */</div><div class='add'>+static void idpf_ptp_release_vport_tstamp(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct idpf_ptp_tx_tstamp *ptp_tx_tstamp, *tmp;</div><div class='add'>+	struct list_head *head;</div><div class='add'>+</div><div class='add'>+	cancel_work_sync(&amp;vport-&gt;tstamp_task);</div><div class='add'>+</div><div class='add'>+	/* Remove list with free latches */</div><div class='add'>+	spin_lock_bh(&amp;vport-&gt;tx_tstamp_caps-&gt;latches_lock);</div><div class='add'>+</div><div class='add'>+	head = &amp;vport-&gt;tx_tstamp_caps-&gt;latches_free;</div><div class='add'>+	list_for_each_entry_safe(ptp_tx_tstamp, tmp, head, list_member) {</div><div class='add'>+		list_del(&amp;ptp_tx_tstamp-&gt;list_member);</div><div class='add'>+		kfree(ptp_tx_tstamp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Remove list with latches in use */</div><div class='add'>+	head = &amp;vport-&gt;tx_tstamp_caps-&gt;latches_in_use;</div><div class='add'>+	u64_stats_update_begin(&amp;vport-&gt;tstamp_stats.stats_sync);</div><div class='add'>+	list_for_each_entry_safe(ptp_tx_tstamp, tmp, head, list_member) {</div><div class='add'>+		u64_stats_inc(&amp;vport-&gt;tstamp_stats.flushed);</div><div class='add'>+</div><div class='add'>+		list_del(&amp;ptp_tx_tstamp-&gt;list_member);</div><div class='add'>+		if (ptp_tx_tstamp-&gt;skb)</div><div class='add'>+			consume_skb(ptp_tx_tstamp-&gt;skb);</div><div class='add'>+</div><div class='add'>+		kfree(ptp_tx_tstamp);</div><div class='add'>+	}</div><div class='add'>+	u64_stats_update_end(&amp;vport-&gt;tstamp_stats.stats_sync);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;vport-&gt;tx_tstamp_caps-&gt;latches_lock);</div><div class='add'>+</div><div class='add'>+	kfree(vport-&gt;tx_tstamp_caps);</div><div class='add'>+	vport-&gt;tx_tstamp_caps = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_release_tstamp - Release the Tx timestamps trackers</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * Remove the queues and delete lists that tracks Tx timestamp entries.</div><div class='add'>+ */</div><div class='add'>+static void idpf_ptp_release_tstamp(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	idpf_for_each_vport(adapter, vport) {</div><div class='add'>+		if (!idpf_ptp_is_vport_tx_tstamp_ena(vport))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		idpf_ptp_release_vport_tstamp(vport);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_txq_tstamp_capability - Verify the timestamping capability</div><div class='add'>+ *					for a given tx queue.</div><div class='add'>+ * @txq: Transmit queue</div><div class='add'>+ *</div><div class='add'>+ * Since performing timestamp flows requires reading the device clock value and</div><div class='add'>+ * the support in the Control Plane, the function checks both factors and</div><div class='add'>+ * summarizes the support for the timestamping.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the timestamping is supported, false otherwise.</div><div class='add'>+ */</div><div class='add'>+bool idpf_ptp_get_txq_tstamp_capability(struct idpf_tx_queue *txq)</div><div class='add'>+{</div><div class='add'>+	if (!txq || !txq-&gt;cached_tstamp_caps)</div><div class='add'>+		return false;</div><div class='add'>+	else if (txq-&gt;cached_tstamp_caps-&gt;access)</div><div class='add'>+		return true;</div><div class='add'>+	else</div><div class='add'>+		return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_init - Initialize PTP hardware clock support</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * Set up the device for interacting with the PTP hardware clock for all</div><div class='add'>+ * functions. Function will allocate and register a ptp_clock with the</div><div class='add'>+ * PTP_1588_CLOCK infrastructure.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_init(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!idpf_is_cap_ena(adapter, IDPF_OTHER_CAPS, VIRTCHNL2_CAP_PTP)) {</div><div class='add'>+		pci_dbg(adapter-&gt;pdev, "PTP capability is not detected\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adapter-&gt;ptp = kzalloc(sizeof(*adapter-&gt;ptp), GFP_KERNEL);</div><div class='add'>+	if (!adapter-&gt;ptp)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* add a back pointer to adapter */</div><div class='add'>+	adapter-&gt;ptp-&gt;adapter = adapter;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;dev_ops.reg_ops.ptp_reg_init)</div><div class='add'>+		adapter-&gt;dev_ops.reg_ops.ptp_reg_init(adapter);</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_get_caps(adapter);</div><div class='add'>+	if (err) {</div><div class='add'>+		pci_err(adapter-&gt;pdev, "Failed to get PTP caps err %d\n", err);</div><div class='add'>+		goto free_ptp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_create_clock(adapter);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_ptp;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;ptp-&gt;get_dev_clk_time_access != IDPF_PTP_NONE)</div><div class='add'>+		ptp_schedule_worker(adapter-&gt;ptp-&gt;clock, 0);</div><div class='add'>+</div><div class='add'>+	/* Write the default increment time value if the clock adjustments</div><div class='add'>+	 * are enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (adapter-&gt;ptp-&gt;adj_dev_clk_time_access != IDPF_PTP_NONE) {</div><div class='add'>+		err = idpf_ptp_adj_dev_clk_fine(adapter,</div><div class='add'>+						adapter-&gt;ptp-&gt;base_incval);</div><div class='add'>+		if (err)</div><div class='add'>+			goto remove_clock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write the initial time value if the set time operation is enabled */</div><div class='add'>+	if (adapter-&gt;ptp-&gt;set_dev_clk_time_access != IDPF_PTP_NONE) {</div><div class='add'>+		ts = ktime_to_timespec64(ktime_get_real());</div><div class='add'>+		err = idpf_ptp_settime64(&amp;adapter-&gt;ptp-&gt;info, &amp;ts);</div><div class='add'>+		if (err)</div><div class='add'>+			goto remove_clock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;adapter-&gt;ptp-&gt;read_dev_clk_lock);</div><div class='add'>+</div><div class='add'>+	pci_dbg(adapter-&gt;pdev, "PTP init successful\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+remove_clock:</div><div class='add'>+	if (adapter-&gt;ptp-&gt;get_dev_clk_time_access != IDPF_PTP_NONE)</div><div class='add'>+		ptp_cancel_worker_sync(adapter-&gt;ptp-&gt;clock);</div><div class='add'>+</div><div class='add'>+	ptp_clock_unregister(adapter-&gt;ptp-&gt;clock);</div><div class='add'>+	adapter-&gt;ptp-&gt;clock = NULL;</div><div class='add'>+</div><div class='add'>+free_ptp:</div><div class='add'>+	kfree(adapter-&gt;ptp);</div><div class='add'>+	adapter-&gt;ptp = NULL;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_release - Clear PTP hardware clock support</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ */</div><div class='add'>+void idpf_ptp_release(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct idpf_ptp *ptp = adapter-&gt;ptp;</div><div class='add'>+</div><div class='add'>+	if (!ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (ptp-&gt;tx_tstamp_access != IDPF_PTP_NONE &amp;&amp;</div><div class='add'>+	    ptp-&gt;get_dev_clk_time_access != IDPF_PTP_NONE)</div><div class='add'>+		idpf_ptp_release_tstamp(adapter);</div><div class='add'>+</div><div class='add'>+	if (ptp-&gt;clock) {</div><div class='add'>+		if (adapter-&gt;ptp-&gt;get_dev_clk_time_access != IDPF_PTP_NONE)</div><div class='add'>+			ptp_cancel_worker_sync(adapter-&gt;ptp-&gt;clock);</div><div class='add'>+</div><div class='add'>+		ptp_clock_unregister(ptp-&gt;clock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(ptp);</div><div class='add'>+	adapter-&gt;ptp = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.h b/drivers/net/ethernet/intel/idpf/idpf_ptp.h<br/>new file mode 100644<br/>index 000000000000..785da03e4cf5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_ptp.h</a></div><div class='hunk'>@@ -0,0 +1,379 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright (C) 2024 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#ifndef _IDPF_PTP_H</div><div class='add'>+#define _IDPF_PTP_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct idpf_ptp_cmd - PTP command masks</div><div class='add'>+ * @exec_cmd_mask: mask to trigger command execution</div><div class='add'>+ * @shtime_enable_mask: mask to enable shadow time</div><div class='add'>+ */</div><div class='add'>+struct idpf_ptp_cmd {</div><div class='add'>+	u32 exec_cmd_mask;</div><div class='add'>+	u32 shtime_enable_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* struct idpf_ptp_dev_clk_regs - PTP device registers</div><div class='add'>+ * @dev_clk_ns_l: low part of the device clock register</div><div class='add'>+ * @dev_clk_ns_h: high part of the device clock register</div><div class='add'>+ * @phy_clk_ns_l: low part of the PHY clock register</div><div class='add'>+ * @phy_clk_ns_h: high part of the PHY clock register</div><div class='add'>+ * @sys_time_ns_l: low part of the system time register</div><div class='add'>+ * @sys_time_ns_h: high part of the system time register</div><div class='add'>+ * @incval_l: low part of the increment value register</div><div class='add'>+ * @incval_h: high part of the increment value register</div><div class='add'>+ * @shadj_l: low part of the shadow adjust register</div><div class='add'>+ * @shadj_h: high part of the shadow adjust register</div><div class='add'>+ * @phy_incval_l: low part of the PHY increment value register</div><div class='add'>+ * @phy_incval_h: high part of the PHY increment value register</div><div class='add'>+ * @phy_shadj_l: low part of the PHY shadow adjust register</div><div class='add'>+ * @phy_shadj_h: high part of the PHY shadow adjust register</div><div class='add'>+ * @cmd: PTP command register</div><div class='add'>+ * @phy_cmd: PHY command register</div><div class='add'>+ * @cmd_sync: PTP command synchronization register</div><div class='add'>+ */</div><div class='add'>+struct idpf_ptp_dev_clk_regs {</div><div class='add'>+	/* Main clock */</div><div class='add'>+	void __iomem *dev_clk_ns_l;</div><div class='add'>+	void __iomem *dev_clk_ns_h;</div><div class='add'>+</div><div class='add'>+	/* PHY timer */</div><div class='add'>+	void __iomem *phy_clk_ns_l;</div><div class='add'>+	void __iomem *phy_clk_ns_h;</div><div class='add'>+</div><div class='add'>+	/* System time */</div><div class='add'>+	void __iomem *sys_time_ns_l;</div><div class='add'>+	void __iomem *sys_time_ns_h;</div><div class='add'>+</div><div class='add'>+	/* Main timer adjustments */</div><div class='add'>+	void __iomem *incval_l;</div><div class='add'>+	void __iomem *incval_h;</div><div class='add'>+	void __iomem *shadj_l;</div><div class='add'>+	void __iomem *shadj_h;</div><div class='add'>+</div><div class='add'>+	/* PHY timer adjustments */</div><div class='add'>+	void __iomem *phy_incval_l;</div><div class='add'>+	void __iomem *phy_incval_h;</div><div class='add'>+	void __iomem *phy_shadj_l;</div><div class='add'>+	void __iomem *phy_shadj_h;</div><div class='add'>+</div><div class='add'>+	/* Command */</div><div class='add'>+	void __iomem *cmd;</div><div class='add'>+	void __iomem *phy_cmd;</div><div class='add'>+	void __iomem *cmd_sync;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum idpf_ptp_access - the type of access to PTP operations</div><div class='add'>+ * @IDPF_PTP_NONE: no access</div><div class='add'>+ * @IDPF_PTP_DIRECT: direct access through BAR registers</div><div class='add'>+ * @IDPF_PTP_MAILBOX: access through mailbox messages</div><div class='add'>+ */</div><div class='add'>+enum idpf_ptp_access {</div><div class='add'>+	IDPF_PTP_NONE = 0,</div><div class='add'>+	IDPF_PTP_DIRECT,</div><div class='add'>+	IDPF_PTP_MAILBOX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct idpf_ptp_secondary_mbx - PTP secondary mailbox</div><div class='add'>+ * @peer_mbx_q_id: PTP mailbox queue ID</div><div class='add'>+ * @peer_id: Peer ID for PTP Device Control daemon</div><div class='add'>+ * @valid: indicates whether secondary mailblox is supported by the Control</div><div class='add'>+ *	   Plane</div><div class='add'>+ */</div><div class='add'>+struct idpf_ptp_secondary_mbx {</div><div class='add'>+	u16 peer_mbx_q_id;</div><div class='add'>+	u16 peer_id;</div><div class='add'>+	bool valid:1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum idpf_ptp_tx_tstamp_state - Tx timestamp states</div><div class='add'>+ * @IDPF_PTP_FREE: Tx timestamp index free to use</div><div class='add'>+ * @IDPF_PTP_REQUEST: Tx timestamp index set to the Tx descriptor</div><div class='add'>+ * @IDPF_PTP_READ_VALUE: Tx timestamp value ready to be read</div><div class='add'>+ */</div><div class='add'>+enum idpf_ptp_tx_tstamp_state {</div><div class='add'>+	IDPF_PTP_FREE,</div><div class='add'>+	IDPF_PTP_REQUEST,</div><div class='add'>+	IDPF_PTP_READ_VALUE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct idpf_ptp_tx_tstamp_status - Parameters to track Tx timestamp</div><div class='add'>+ * @skb: the pointer to the SKB that received the completion tag</div><div class='add'>+ * @state: the state of the Tx timestamp</div><div class='add'>+ */</div><div class='add'>+struct idpf_ptp_tx_tstamp_status {</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	enum idpf_ptp_tx_tstamp_state state;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct idpf_ptp_tx_tstamp - Parameters for Tx timestamping</div><div class='add'>+ * @list_member: the list member structure</div><div class='add'>+ * @tx_latch_reg_offset_l: Tx tstamp latch low register offset</div><div class='add'>+ * @tx_latch_reg_offset_h: Tx tstamp latch high register offset</div><div class='add'>+ * @skb: the pointer to the SKB for this timestamp request</div><div class='add'>+ * @tstamp: the Tx tstamp value</div><div class='add'>+ * @idx: the index of the Tx tstamp</div><div class='add'>+ */</div><div class='add'>+struct idpf_ptp_tx_tstamp {</div><div class='add'>+	struct list_head list_member;</div><div class='add'>+	u32 tx_latch_reg_offset_l;</div><div class='add'>+	u32 tx_latch_reg_offset_h;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u64 tstamp;</div><div class='add'>+	u32 idx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct idpf_ptp_vport_tx_tstamp_caps - Tx timestamp capabilities</div><div class='add'>+ * @vport_id: the vport id</div><div class='add'>+ * @num_entries: the number of negotiated Tx timestamp entries</div><div class='add'>+ * @tstamp_ns_lo_bit: first bit for nanosecond part of the timestamp</div><div class='add'>+ * @latches_lock: the lock to the lists of free/used timestamp indexes</div><div class='add'>+ * @status_lock: the lock to the status tracker</div><div class='add'>+ * @access: indicates an access to Tx timestamp</div><div class='add'>+ * @latches_free: the list of the free Tx timestamps latches</div><div class='add'>+ * @latches_in_use: the list of the used Tx timestamps latches</div><div class='add'>+ * @tx_tstamp_status: Tx tstamp status tracker</div><div class='add'>+ */</div><div class='add'>+struct idpf_ptp_vport_tx_tstamp_caps {</div><div class='add'>+	u32 vport_id;</div><div class='add'>+	u16 num_entries;</div><div class='add'>+	u16 tstamp_ns_lo_bit;</div><div class='add'>+	spinlock_t latches_lock;</div><div class='add'>+	spinlock_t status_lock;</div><div class='add'>+	bool access:1;</div><div class='add'>+	struct list_head latches_free;</div><div class='add'>+	struct list_head latches_in_use;</div><div class='add'>+	struct idpf_ptp_tx_tstamp_status tx_tstamp_status[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct idpf_ptp - PTP parameters</div><div class='add'>+ * @info: structure defining PTP hardware capabilities</div><div class='add'>+ * @clock: pointer to registered PTP clock device</div><div class='add'>+ * @adapter: back pointer to the adapter</div><div class='add'>+ * @base_incval: base increment value of the PTP clock</div><div class='add'>+ * @max_adj: maximum adjustment of the PTP clock</div><div class='add'>+ * @cmd: HW specific command masks</div><div class='add'>+ * @cached_phc_time: a cached copy of the PHC time for timestamp extension</div><div class='add'>+ * @cached_phc_jiffies: jiffies when cached_phc_time was last updated</div><div class='add'>+ * @dev_clk_regs: the set of registers to access the device clock</div><div class='add'>+ * @caps: PTP capabilities negotiated with the Control Plane</div><div class='add'>+ * @get_dev_clk_time_access: access type for getting the device clock time</div><div class='add'>+ * @get_cross_tstamp_access: access type for the cross timestamping</div><div class='add'>+ * @set_dev_clk_time_access: access type for setting the device clock time</div><div class='add'>+ * @adj_dev_clk_time_access: access type for the adjusting the device clock</div><div class='add'>+ * @tx_tstamp_access: access type for the Tx timestamp value read</div><div class='add'>+ * @rsv: reserved bits</div><div class='add'>+ * @secondary_mbx: parameters for using dedicated PTP mailbox</div><div class='add'>+ * @read_dev_clk_lock: spinlock protecting access to the device clock read</div><div class='add'>+ *		       operation executed by the HW latch</div><div class='add'>+ */</div><div class='add'>+struct idpf_ptp {</div><div class='add'>+	struct ptp_clock_info info;</div><div class='add'>+	struct ptp_clock *clock;</div><div class='add'>+	struct idpf_adapter *adapter;</div><div class='add'>+	u64 base_incval;</div><div class='add'>+	u64 max_adj;</div><div class='add'>+	struct idpf_ptp_cmd cmd;</div><div class='add'>+	u64 cached_phc_time;</div><div class='add'>+	unsigned long cached_phc_jiffies;</div><div class='add'>+	struct idpf_ptp_dev_clk_regs dev_clk_regs;</div><div class='add'>+	u32 caps;</div><div class='add'>+	enum idpf_ptp_access get_dev_clk_time_access:2;</div><div class='add'>+	enum idpf_ptp_access get_cross_tstamp_access:2;</div><div class='add'>+	enum idpf_ptp_access set_dev_clk_time_access:2;</div><div class='add'>+	enum idpf_ptp_access adj_dev_clk_time_access:2;</div><div class='add'>+	enum idpf_ptp_access tx_tstamp_access:2;</div><div class='add'>+	u8 rsv;</div><div class='add'>+	struct idpf_ptp_secondary_mbx secondary_mbx;</div><div class='add'>+	spinlock_t read_dev_clk_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_info_to_adapter - get driver adapter struct from ptp_clock_info</div><div class='add'>+ * @info: pointer to ptp_clock_info struct</div><div class='add'>+ *</div><div class='add'>+ * Return: pointer to the corresponding adapter struct</div><div class='add'>+ */</div><div class='add'>+static inline struct idpf_adapter *</div><div class='add'>+idpf_ptp_info_to_adapter(const struct ptp_clock_info *info)</div><div class='add'>+{</div><div class='add'>+	const struct idpf_ptp *ptp = container_of_const(info, struct idpf_ptp,</div><div class='add'>+							info);</div><div class='add'>+	return ptp-&gt;adapter;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct idpf_ptp_dev_timers - System time and device time values</div><div class='add'>+ * @sys_time_ns: system time value expressed in nanoseconds</div><div class='add'>+ * @dev_clk_time_ns: device clock time value expressed in nanoseconds</div><div class='add'>+ */</div><div class='add'>+struct idpf_ptp_dev_timers {</div><div class='add'>+	u64 sys_time_ns;</div><div class='add'>+	u64 dev_clk_time_ns;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_is_vport_tx_tstamp_ena - Verify the Tx timestamping enablement for</div><div class='add'>+ *				     a given vport.</div><div class='add'>+ * @vport: Virtual port structure</div><div class='add'>+ *</div><div class='add'>+ * Tx timestamp capabilities are negotiated with the Control Plane only if the</div><div class='add'>+ * device clock value can be read, Tx timestamp access type is different than</div><div class='add'>+ * NONE, and the PTP clock for the adapter is created. When all those conditions</div><div class='add'>+ * are satisfied, Tx timestamp feature is enabled and tx_tstamp_caps is</div><div class='add'>+ * allocated and fulfilled.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the Tx timestamping is enabled, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static inline bool idpf_ptp_is_vport_tx_tstamp_ena(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	if (!vport-&gt;tx_tstamp_caps)</div><div class='add'>+		return false;</div><div class='add'>+	else</div><div class='add'>+		return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_is_vport_rx_tstamp_ena - Verify the Rx timestamping enablement for</div><div class='add'>+ *				     a given vport.</div><div class='add'>+ * @vport: Virtual port structure</div><div class='add'>+ *</div><div class='add'>+ * Rx timestamp feature is enabled if the PTP clock for the adapter is created</div><div class='add'>+ * and it is possible to read the value of the device clock. The second</div><div class='add'>+ * assumption comes from the need to extend the Rx timestamp value to 64 bit</div><div class='add'>+ * based on the current device clock time.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the Rx timestamping is enabled, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static inline bool idpf_ptp_is_vport_rx_tstamp_ena(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	if (!vport-&gt;adapter-&gt;ptp ||</div><div class='add'>+	    vport-&gt;adapter-&gt;ptp-&gt;get_dev_clk_time_access == IDPF_PTP_NONE)</div><div class='add'>+		return false;</div><div class='add'>+	else</div><div class='add'>+		return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+int idpf_ptp_init(struct idpf_adapter *adapter);</div><div class='add'>+void idpf_ptp_release(struct idpf_adapter *adapter);</div><div class='add'>+int idpf_ptp_get_caps(struct idpf_adapter *adapter);</div><div class='add'>+void idpf_ptp_get_features_access(const struct idpf_adapter *adapter);</div><div class='add'>+bool idpf_ptp_get_txq_tstamp_capability(struct idpf_tx_queue *txq);</div><div class='add'>+int idpf_ptp_get_dev_clk_time(struct idpf_adapter *adapter,</div><div class='add'>+			      struct idpf_ptp_dev_timers *dev_clk_time);</div><div class='add'>+int idpf_ptp_get_cross_time(struct idpf_adapter *adapter,</div><div class='add'>+			    struct idpf_ptp_dev_timers *cross_time);</div><div class='add'>+int idpf_ptp_set_dev_clk_time(struct idpf_adapter *adapter, u64 time);</div><div class='add'>+int idpf_ptp_adj_dev_clk_fine(struct idpf_adapter *adapter, u64 incval);</div><div class='add'>+int idpf_ptp_adj_dev_clk_time(struct idpf_adapter *adapter, s64 delta);</div><div class='add'>+int idpf_ptp_get_vport_tstamps_caps(struct idpf_vport *vport);</div><div class='add'>+int idpf_ptp_get_tx_tstamp(struct idpf_vport *vport);</div><div class='add'>+int idpf_ptp_set_timestamp_mode(struct idpf_vport *vport,</div><div class='add'>+				struct kernel_hwtstamp_config *config);</div><div class='add'>+u64 idpf_ptp_extend_ts(struct idpf_vport *vport, u64 in_tstamp);</div><div class='add'>+u64 idpf_ptp_tstamp_extend_32b_to_64b(u64 cached_phc_time, u32 in_timestamp);</div><div class='add'>+int idpf_ptp_request_ts(struct idpf_tx_queue *tx_q, struct sk_buff *skb,</div><div class='add'>+			u32 *idx);</div><div class='add'>+void idpf_tstamp_task(struct work_struct *work);</div><div class='add'>+#else /* CONFIG_PTP_1588_CLOCK */</div><div class='add'>+static inline int idpf_ptp_init(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void idpf_ptp_release(struct idpf_adapter *adapter) { }</div><div class='add'>+</div><div class='add'>+static inline int idpf_ptp_get_caps(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+idpf_ptp_get_features_access(const struct idpf_adapter *adapter) { }</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+idpf_ptp_get_txq_tstamp_capability(struct idpf_tx_queue *txq)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+idpf_ptp_get_dev_clk_time(struct idpf_adapter *adapter,</div><div class='add'>+			  struct idpf_ptp_dev_timers *dev_clk_time)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+idpf_ptp_get_cross_time(struct idpf_adapter *adapter,</div><div class='add'>+			struct idpf_ptp_dev_timers *cross_time)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int idpf_ptp_set_dev_clk_time(struct idpf_adapter *adapter,</div><div class='add'>+					    u64 time)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int idpf_ptp_adj_dev_clk_fine(struct idpf_adapter *adapter,</div><div class='add'>+					    u64 incval)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int idpf_ptp_adj_dev_clk_time(struct idpf_adapter *adapter,</div><div class='add'>+					    s64 delta)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int idpf_ptp_get_vport_tstamps_caps(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int idpf_ptp_get_tx_tstamp(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+idpf_ptp_set_timestamp_mode(struct idpf_vport *vport,</div><div class='add'>+			    struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 idpf_ptp_extend_ts(struct idpf_vport *vport, u32 in_tstamp)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 idpf_ptp_tstamp_extend_32b_to_64b(u64 cached_phc_time,</div><div class='add'>+						    u32 in_timestamp)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int idpf_ptp_request_ts(struct idpf_tx_queue *tx_q,</div><div class='add'>+				      struct sk_buff *skb, u32 *idx)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void idpf_tstamp_task(struct work_struct *work) { }</div><div class='add'>+#endif /* CONFIG_PTP_1588_CLOCK */</div><div class='add'>+#endif /* _IDPF_PTP_H */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c b/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c<br/>index dfd7cf1d9aa0..e3ddf18dcbf5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c</a></div><div class='hunk'>@@ -1,8 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Copyright (C) 2023 Intel Corporation */</div><div class='ctx'> </div><div class='del'>-#include &lt;net/libeth/rx.h&gt;</div><div class='del'>-#include &lt;net/libeth/tx.h&gt;</div><div class='add'>+#include &lt;net/libeth/xdp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "idpf.h"</div><div class='ctx'> </div><div class='hunk'>@@ -180,6 +179,58 @@ static int idpf_tx_singleq_csum(struct sk_buff *skb,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * idpf_tx_singleq_dma_map_error - handle TX DMA map errors</div><div class='add'>+ * @txq: queue to send buffer on</div><div class='add'>+ * @skb: send buffer</div><div class='add'>+ * @first: original first buffer info buffer for packet</div><div class='add'>+ * @idx: starting point on ring to unwind</div><div class='add'>+ */</div><div class='add'>+static void idpf_tx_singleq_dma_map_error(struct idpf_tx_queue *txq,</div><div class='add'>+					  struct sk_buff *skb,</div><div class='add'>+					  struct idpf_tx_buf *first, u16 idx)</div><div class='add'>+{</div><div class='add'>+	struct libeth_sq_napi_stats ss = { };</div><div class='add'>+	struct libeth_cq_pp cp = {</div><div class='add'>+		.dev	= txq-&gt;dev,</div><div class='add'>+		.ss	= &amp;ss,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;txq-&gt;stats_sync);</div><div class='add'>+	u64_stats_inc(&amp;txq-&gt;q_stats.dma_map_errs);</div><div class='add'>+	u64_stats_update_end(&amp;txq-&gt;stats_sync);</div><div class='add'>+</div><div class='add'>+	/* clear dma mappings for failed tx_buf map */</div><div class='add'>+	for (;;) {</div><div class='add'>+		struct idpf_tx_buf *tx_buf;</div><div class='add'>+</div><div class='add'>+		tx_buf = &amp;txq-&gt;tx_buf[idx];</div><div class='add'>+		libeth_tx_complete(tx_buf, &amp;cp);</div><div class='add'>+		if (tx_buf == first)</div><div class='add'>+			break;</div><div class='add'>+		if (idx == 0)</div><div class='add'>+			idx = txq-&gt;desc_count;</div><div class='add'>+		idx--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb_is_gso(skb)) {</div><div class='add'>+		union idpf_tx_flex_desc *tx_desc;</div><div class='add'>+</div><div class='add'>+		/* If we failed a DMA mapping for a TSO packet, we will have</div><div class='add'>+		 * used one additional descriptor for a context</div><div class='add'>+		 * descriptor. Reset that here.</div><div class='add'>+		 */</div><div class='add'>+		tx_desc = &amp;txq-&gt;flex_tx[idx];</div><div class='add'>+		memset(tx_desc, 0, sizeof(*tx_desc));</div><div class='add'>+		if (idx == 0)</div><div class='add'>+			idx = txq-&gt;desc_count;</div><div class='add'>+		idx--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update tail in case netdev_xmit_more was previously true */</div><div class='add'>+	idpf_tx_buf_hw_update(txq, idx, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * idpf_tx_singleq_map - Build the Tx base descriptor</div><div class='ctx'>  * @tx_q: queue to send buffer on</div><div class='ctx'>  * @first: first buffer info buffer to use</div><div class='hunk'>@@ -219,8 +270,9 @@ static void idpf_tx_singleq_map(struct idpf_tx_queue *tx_q,</div><div class='ctx'> 	for (frag = &amp;skb_shinfo(skb)-&gt;frags[0];; frag++) {</div><div class='ctx'> 		unsigned int max_data = IDPF_TX_MAX_DESC_DATA_ALIGNED;</div><div class='ctx'> </div><div class='del'>-		if (dma_mapping_error(tx_q-&gt;dev, dma))</div><div class='del'>-			return idpf_tx_dma_map_error(tx_q, skb, first, i);</div><div class='add'>+		if (unlikely(dma_mapping_error(tx_q-&gt;dev, dma)))</div><div class='add'>+			return idpf_tx_singleq_dma_map_error(tx_q, skb,</div><div class='add'>+							     first, i);</div><div class='ctx'> </div><div class='ctx'> 		/* record length, and DMA address */</div><div class='ctx'> 		dma_unmap_len_set(tx_buf, len, size);</div><div class='hunk'>@@ -362,17 +414,18 @@ netdev_tx_t idpf_tx_singleq_frame(struct sk_buff *skb,</div><div class='ctx'> {</div><div class='ctx'> 	struct idpf_tx_offload_params offload = { };</div><div class='ctx'> 	struct idpf_tx_buf *first;</div><div class='del'>-	unsigned int count;</div><div class='add'>+	u32 count, buf_count = 1;</div><div class='add'>+	int csum, tso, needed;</div><div class='ctx'> 	__be16 protocol;</div><div class='del'>-	int csum, tso;</div><div class='ctx'> </div><div class='del'>-	count = idpf_tx_desc_count_required(tx_q, skb);</div><div class='add'>+	count = idpf_tx_res_count_required(tx_q, skb, &amp;buf_count);</div><div class='ctx'> 	if (unlikely(!count))</div><div class='ctx'> 		return idpf_tx_drop_skb(tx_q, skb);</div><div class='ctx'> </div><div class='del'>-	if (idpf_tx_maybe_stop_common(tx_q,</div><div class='del'>-				      count + IDPF_TX_DESCS_PER_CACHE_LINE +</div><div class='del'>-				      IDPF_TX_DESCS_FOR_CTX)) {</div><div class='add'>+	needed = count + IDPF_TX_DESCS_PER_CACHE_LINE + IDPF_TX_DESCS_FOR_CTX;</div><div class='add'>+	if (!netif_subqueue_maybe_stop(tx_q-&gt;netdev, tx_q-&gt;idx,</div><div class='add'>+				       IDPF_DESC_UNUSED(tx_q),</div><div class='add'>+				       needed, needed)) {</div><div class='ctx'> 		idpf_tx_buf_hw_update(tx_q, tx_q-&gt;next_to_use, false);</div><div class='ctx'> </div><div class='ctx'> 		u64_stats_update_begin(&amp;tx_q-&gt;stats_sync);</div><div class='hunk'>@@ -517,7 +570,7 @@ fetch_next_txq_desc:</div><div class='ctx'> 	np = netdev_priv(tx_q-&gt;netdev);</div><div class='ctx'> 	nq = netdev_get_tx_queue(tx_q-&gt;netdev, tx_q-&gt;idx);</div><div class='ctx'> </div><div class='del'>-	dont_wake = np-&gt;state != __IDPF_VPORT_UP ||</div><div class='add'>+	dont_wake = !test_bit(IDPF_VPORT_UP, np-&gt;state) ||</div><div class='ctx'> 		    !netif_carrier_ok(tx_q-&gt;netdev);</div><div class='ctx'> 	__netif_txq_completed_wake(nq, ss.packets, ss.bytes,</div><div class='ctx'> 				   IDPF_DESC_UNUSED(tx_q), IDPF_TX_WAKE_THRESH,</div><div class='hunk'>@@ -595,13 +648,13 @@ static bool idpf_rx_singleq_is_non_eop(const union virtchnl2_rx_desc *rx_desc)</div><div class='ctx'>  */</div><div class='ctx'> static void idpf_rx_singleq_csum(struct idpf_rx_queue *rxq,</div><div class='ctx'> 				 struct sk_buff *skb,</div><div class='del'>-				 struct idpf_rx_csum_decoded csum_bits,</div><div class='add'>+				 struct libeth_rx_csum csum_bits,</div><div class='ctx'> 				 struct libeth_rx_pt decoded)</div><div class='ctx'> {</div><div class='ctx'> 	bool ipv4, ipv6;</div><div class='ctx'> </div><div class='ctx'> 	/* check if Rx checksum is enabled */</div><div class='del'>-	if (!libeth_rx_pt_has_checksum(rxq-&gt;netdev, decoded))</div><div class='add'>+	if (!libeth_rx_pt_has_checksum(rxq-&gt;xdp_rxq.dev, decoded))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* check if HW has decoded the packet and checksum */</div><div class='hunk'>@@ -661,10 +714,10 @@ checksum_fail:</div><div class='ctx'>  *</div><div class='ctx'>  * Return: parsed checksum status.</div><div class='ctx'>  **/</div><div class='del'>-static struct idpf_rx_csum_decoded</div><div class='add'>+static struct libeth_rx_csum</div><div class='ctx'> idpf_rx_singleq_base_csum(const union virtchnl2_rx_desc *rx_desc)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_rx_csum_decoded csum_bits = { };</div><div class='add'>+	struct libeth_rx_csum csum_bits = { };</div><div class='ctx'> 	u32 rx_error, rx_status;</div><div class='ctx'> 	u64 qword;</div><div class='ctx'> </div><div class='hunk'>@@ -696,10 +749,10 @@ idpf_rx_singleq_base_csum(const union virtchnl2_rx_desc *rx_desc)</div><div class='ctx'>  *</div><div class='ctx'>  * Return: parsed checksum status.</div><div class='ctx'>  **/</div><div class='del'>-static struct idpf_rx_csum_decoded</div><div class='add'>+static struct libeth_rx_csum</div><div class='ctx'> idpf_rx_singleq_flex_csum(const union virtchnl2_rx_desc *rx_desc)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_rx_csum_decoded csum_bits = { };</div><div class='add'>+	struct libeth_rx_csum csum_bits = { };</div><div class='ctx'> 	u16 rx_status0, rx_status1;</div><div class='ctx'> </div><div class='ctx'> 	rx_status0 = le16_to_cpu(rx_desc-&gt;flex_nic_wb.status_error0);</div><div class='hunk'>@@ -740,7 +793,7 @@ static void idpf_rx_singleq_base_hash(struct idpf_rx_queue *rx_q,</div><div class='ctx'> {</div><div class='ctx'> 	u64 mask, qw1;</div><div class='ctx'> </div><div class='del'>-	if (!libeth_rx_pt_has_hash(rx_q-&gt;netdev, decoded))</div><div class='add'>+	if (!libeth_rx_pt_has_hash(rx_q-&gt;xdp_rxq.dev, decoded))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mask = VIRTCHNL2_RX_BASE_DESC_FLTSTAT_RSS_HASH_M;</div><div class='hunk'>@@ -768,7 +821,7 @@ static void idpf_rx_singleq_flex_hash(struct idpf_rx_queue *rx_q,</div><div class='ctx'> 				      const union virtchnl2_rx_desc *rx_desc,</div><div class='ctx'> 				      struct libeth_rx_pt decoded)</div><div class='ctx'> {</div><div class='del'>-	if (!libeth_rx_pt_has_hash(rx_q-&gt;netdev, decoded))</div><div class='add'>+	if (!libeth_rx_pt_has_hash(rx_q-&gt;xdp_rxq.dev, decoded))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_STATUS0_RSS_VALID_M,</div><div class='hunk'>@@ -780,7 +833,7 @@ static void idpf_rx_singleq_flex_hash(struct idpf_rx_queue *rx_q,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_rx_singleq_process_skb_fields - Populate skb header fields from Rx</div><div class='add'>+ * __idpf_rx_singleq_process_skb_fields - Populate skb header fields from Rx</div><div class='ctx'>  * descriptor</div><div class='ctx'>  * @rx_q: Rx ring being processed</div><div class='ctx'>  * @skb: pointer to current skb being populated</div><div class='hunk'>@@ -792,16 +845,13 @@ static void idpf_rx_singleq_flex_hash(struct idpf_rx_queue *rx_q,</div><div class='ctx'>  * other fields within the skb.</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-idpf_rx_singleq_process_skb_fields(struct idpf_rx_queue *rx_q,</div><div class='del'>-				   struct sk_buff *skb,</div><div class='del'>-				   const union virtchnl2_rx_desc *rx_desc,</div><div class='del'>-				   u16 ptype)</div><div class='add'>+__idpf_rx_singleq_process_skb_fields(struct idpf_rx_queue *rx_q,</div><div class='add'>+				     struct sk_buff *skb,</div><div class='add'>+				     const union virtchnl2_rx_desc *rx_desc,</div><div class='add'>+				     u16 ptype)</div><div class='ctx'> {</div><div class='ctx'> 	struct libeth_rx_pt decoded = rx_q-&gt;rx_ptype_lkup[ptype];</div><div class='del'>-	struct idpf_rx_csum_decoded csum_bits;</div><div class='del'>-</div><div class='del'>-	/* modifies the skb - consumes the enet header */</div><div class='del'>-	skb-&gt;protocol = eth_type_trans(skb, rx_q-&gt;netdev);</div><div class='add'>+	struct libeth_rx_csum csum_bits;</div><div class='ctx'> </div><div class='ctx'> 	/* Check if we're using base mode descriptor IDs */</div><div class='ctx'> 	if (rx_q-&gt;rxdids == VIRTCHNL2_RXDID_1_32B_BASE_M) {</div><div class='hunk'>@@ -813,7 +863,6 @@ idpf_rx_singleq_process_skb_fields(struct idpf_rx_queue *rx_q,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	idpf_rx_singleq_csum(rx_q, skb, csum_bits, decoded);</div><div class='del'>-	skb_record_rx_queue(skb, rx_q-&gt;idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -900,14 +949,14 @@ bool idpf_rx_singleq_buf_hw_alloc_all(struct idpf_rx_queue *rx_q,</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> idpf_rx_singleq_extract_base_fields(const union virtchnl2_rx_desc *rx_desc,</div><div class='del'>-				    struct idpf_rx_extracted *fields)</div><div class='add'>+				    struct libeth_rqe_info *fields)</div><div class='ctx'> {</div><div class='ctx'> 	u64 qword;</div><div class='ctx'> </div><div class='ctx'> 	qword = le64_to_cpu(rx_desc-&gt;base_wb.qword1.status_error_ptype_len);</div><div class='ctx'> </div><div class='del'>-	fields-&gt;size = FIELD_GET(VIRTCHNL2_RX_BASE_DESC_QW1_LEN_PBUF_M, qword);</div><div class='del'>-	fields-&gt;rx_ptype = FIELD_GET(VIRTCHNL2_RX_BASE_DESC_QW1_PTYPE_M, qword);</div><div class='add'>+	fields-&gt;len = FIELD_GET(VIRTCHNL2_RX_BASE_DESC_QW1_LEN_PBUF_M, qword);</div><div class='add'>+	fields-&gt;ptype = FIELD_GET(VIRTCHNL2_RX_BASE_DESC_QW1_PTYPE_M, qword);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -923,12 +972,12 @@ idpf_rx_singleq_extract_base_fields(const union virtchnl2_rx_desc *rx_desc,</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='ctx'> idpf_rx_singleq_extract_flex_fields(const union virtchnl2_rx_desc *rx_desc,</div><div class='del'>-				    struct idpf_rx_extracted *fields)</div><div class='add'>+				    struct libeth_rqe_info *fields)</div><div class='ctx'> {</div><div class='del'>-	fields-&gt;size = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_PKT_LEN_M,</div><div class='del'>-				 le16_to_cpu(rx_desc-&gt;flex_nic_wb.pkt_len));</div><div class='del'>-	fields-&gt;rx_ptype = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_PTYPE_M,</div><div class='del'>-				     le16_to_cpu(rx_desc-&gt;flex_nic_wb.ptype_flex_flags0));</div><div class='add'>+	fields-&gt;len = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_PKT_LEN_M,</div><div class='add'>+				le16_to_cpu(rx_desc-&gt;flex_nic_wb.pkt_len));</div><div class='add'>+	fields-&gt;ptype = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_PTYPE_M,</div><div class='add'>+				  le16_to_cpu(rx_desc-&gt;flex_nic_wb.ptype_flex_flags0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -941,7 +990,7 @@ idpf_rx_singleq_extract_flex_fields(const union virtchnl2_rx_desc *rx_desc,</div><div class='ctx'> static void</div><div class='ctx'> idpf_rx_singleq_extract_fields(const struct idpf_rx_queue *rx_q,</div><div class='ctx'> 			       const union virtchnl2_rx_desc *rx_desc,</div><div class='del'>-			       struct idpf_rx_extracted *fields)</div><div class='add'>+			       struct libeth_rqe_info *fields)</div><div class='ctx'> {</div><div class='ctx'> 	if (rx_q-&gt;rxdids == VIRTCHNL2_RXDID_1_32B_BASE_M)</div><div class='ctx'> 		idpf_rx_singleq_extract_base_fields(rx_desc, fields);</div><div class='hunk'>@@ -949,6 +998,32 @@ idpf_rx_singleq_extract_fields(const struct idpf_rx_queue *rx_q,</div><div class='ctx'> 		idpf_rx_singleq_extract_flex_fields(rx_desc, fields);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+idpf_rx_singleq_process_skb_fields(struct sk_buff *skb,</div><div class='add'>+				   const struct libeth_xdp_buff *xdp,</div><div class='add'>+				   struct libeth_rq_napi_stats *rs)</div><div class='add'>+{</div><div class='add'>+	struct libeth_rqe_info fields;</div><div class='add'>+	struct idpf_rx_queue *rxq;</div><div class='add'>+</div><div class='add'>+	rxq = libeth_xdp_buff_to_rq(xdp, typeof(*rxq), xdp_rxq);</div><div class='add'>+</div><div class='add'>+	idpf_rx_singleq_extract_fields(rxq, xdp-&gt;desc, &amp;fields);</div><div class='add'>+	__idpf_rx_singleq_process_skb_fields(rxq, skb, xdp-&gt;desc,</div><div class='add'>+					     fields.ptype);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_xdp_run_pass(struct libeth_xdp_buff *xdp,</div><div class='add'>+			      struct napi_struct *napi,</div><div class='add'>+			      struct libeth_rq_napi_stats *rs,</div><div class='add'>+			      const union virtchnl2_rx_desc *desc)</div><div class='add'>+{</div><div class='add'>+	libeth_xdp_run_pass(xdp, NULL, napi, rs, desc, NULL,</div><div class='add'>+			    idpf_rx_singleq_process_skb_fields);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_rx_singleq_clean - Reclaim resources after receive completes</div><div class='ctx'>  * @rx_q: rx queue to clean</div><div class='hunk'>@@ -958,15 +1033,16 @@ idpf_rx_singleq_extract_fields(const struct idpf_rx_queue *rx_q,</div><div class='ctx'>  */</div><div class='ctx'> static int idpf_rx_singleq_clean(struct idpf_rx_queue *rx_q, int budget)</div><div class='ctx'> {</div><div class='del'>-	unsigned int total_rx_bytes = 0, total_rx_pkts = 0;</div><div class='del'>-	struct sk_buff *skb = rx_q-&gt;skb;</div><div class='add'>+	struct libeth_rq_napi_stats rs = { };</div><div class='ctx'> 	u16 ntc = rx_q-&gt;next_to_clean;</div><div class='add'>+	LIBETH_XDP_ONSTACK_BUFF(xdp);</div><div class='ctx'> 	u16 cleaned_count = 0;</div><div class='del'>-	bool failure = false;</div><div class='add'>+</div><div class='add'>+	libeth_xdp_init_buff(xdp, &amp;rx_q-&gt;xdp, &amp;rx_q-&gt;xdp_rxq);</div><div class='ctx'> </div><div class='ctx'> 	/* Process Rx packets bounded by budget */</div><div class='del'>-	while (likely(total_rx_pkts &lt; (unsigned int)budget)) {</div><div class='del'>-		struct idpf_rx_extracted fields = { };</div><div class='add'>+	while (likely(rs.packets &lt; budget)) {</div><div class='add'>+		struct libeth_rqe_info fields = { };</div><div class='ctx'> 		union virtchnl2_rx_desc *rx_desc;</div><div class='ctx'> 		struct idpf_rx_buf *rx_buf;</div><div class='ctx'> </div><div class='hunk'>@@ -992,73 +1068,41 @@ static int idpf_rx_singleq_clean(struct idpf_rx_queue *rx_q, int budget)</div><div class='ctx'> 		idpf_rx_singleq_extract_fields(rx_q, rx_desc, &amp;fields);</div><div class='ctx'> </div><div class='ctx'> 		rx_buf = &amp;rx_q-&gt;rx_buf[ntc];</div><div class='del'>-		if (!libeth_rx_sync_for_cpu(rx_buf, fields.size))</div><div class='del'>-			goto skip_data;</div><div class='del'>-</div><div class='del'>-		if (skb)</div><div class='del'>-			idpf_rx_add_frag(rx_buf, skb, fields.size);</div><div class='del'>-		else</div><div class='del'>-			skb = idpf_rx_build_skb(rx_buf, fields.size);</div><div class='del'>-</div><div class='del'>-		/* exit if we failed to retrieve a buffer */</div><div class='del'>-		if (!skb)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-skip_data:</div><div class='del'>-		rx_buf-&gt;page = NULL;</div><div class='add'>+		libeth_xdp_process_buff(xdp, rx_buf, fields.len);</div><div class='add'>+		rx_buf-&gt;netmem = 0;</div><div class='ctx'> </div><div class='ctx'> 		IDPF_SINGLEQ_BUMP_RING_IDX(rx_q, ntc);</div><div class='ctx'> 		cleaned_count++;</div><div class='ctx'> </div><div class='ctx'> 		/* skip if it is non EOP desc */</div><div class='del'>-		if (idpf_rx_singleq_is_non_eop(rx_desc) || unlikely(!skb))</div><div class='add'>+		if (idpf_rx_singleq_is_non_eop(rx_desc) ||</div><div class='add'>+		    unlikely(!xdp-&gt;data))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> #define IDPF_RXD_ERR_S FIELD_PREP(VIRTCHNL2_RX_BASE_DESC_QW1_ERROR_M, \</div><div class='ctx'> 				  VIRTCHNL2_RX_BASE_DESC_ERROR_RXE_M)</div><div class='ctx'> 		if (unlikely(idpf_rx_singleq_test_staterr(rx_desc,</div><div class='ctx'> 							  IDPF_RXD_ERR_S))) {</div><div class='del'>-			dev_kfree_skb_any(skb);</div><div class='del'>-			skb = NULL;</div><div class='add'>+			libeth_xdp_return_buff_slow(xdp);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* pad skb if needed (to make valid ethernet frame) */</div><div class='del'>-		if (eth_skb_pad(skb)) {</div><div class='del'>-			skb = NULL;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* probably a little skewed due to removing CRC */</div><div class='del'>-		total_rx_bytes += skb-&gt;len;</div><div class='del'>-</div><div class='del'>-		/* protocol */</div><div class='del'>-		idpf_rx_singleq_process_skb_fields(rx_q, skb,</div><div class='del'>-						   rx_desc, fields.rx_ptype);</div><div class='del'>-</div><div class='del'>-		/* send completed skb up the stack */</div><div class='del'>-		napi_gro_receive(rx_q-&gt;pp-&gt;p.napi, skb);</div><div class='del'>-		skb = NULL;</div><div class='del'>-</div><div class='del'>-		/* update budget accounting */</div><div class='del'>-		total_rx_pkts++;</div><div class='add'>+		idpf_xdp_run_pass(xdp, rx_q-&gt;pp-&gt;p.napi, &amp;rs, rx_desc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rx_q-&gt;skb = skb;</div><div class='del'>-</div><div class='ctx'> 	rx_q-&gt;next_to_clean = ntc;</div><div class='add'>+	libeth_xdp_save_buff(&amp;rx_q-&gt;xdp, xdp);</div><div class='ctx'> </div><div class='ctx'> 	page_pool_nid_changed(rx_q-&gt;pp, numa_mem_id());</div><div class='ctx'> 	if (cleaned_count)</div><div class='del'>-		failure = idpf_rx_singleq_buf_hw_alloc_all(rx_q, cleaned_count);</div><div class='add'>+		idpf_rx_singleq_buf_hw_alloc_all(rx_q, cleaned_count);</div><div class='ctx'> </div><div class='ctx'> 	u64_stats_update_begin(&amp;rx_q-&gt;stats_sync);</div><div class='del'>-	u64_stats_add(&amp;rx_q-&gt;q_stats.packets, total_rx_pkts);</div><div class='del'>-	u64_stats_add(&amp;rx_q-&gt;q_stats.bytes, total_rx_bytes);</div><div class='add'>+	u64_stats_add(&amp;rx_q-&gt;q_stats.packets, rs.packets);</div><div class='add'>+	u64_stats_add(&amp;rx_q-&gt;q_stats.bytes, rs.bytes);</div><div class='ctx'> 	u64_stats_update_end(&amp;rx_q-&gt;stats_sync);</div><div class='ctx'> </div><div class='del'>-	/* guarantee a trip back through this routine if there was a failure */</div><div class='del'>-	return failure ? budget : (int)total_rx_pkts;</div><div class='add'>+	return rs.packets;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.c b/drivers/net/ethernet/intel/idpf/idpf_txrx.c<br/>index da2a5becf62f..1d91c56f7469 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_txrx.c</a></div><div class='hunk'>@@ -1,51 +1,36 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Copyright (C) 2023 Intel Corporation */</div><div class='ctx'> </div><div class='del'>-#include &lt;net/libeth/rx.h&gt;</div><div class='del'>-#include &lt;net/libeth/tx.h&gt;</div><div class='del'>-</div><div class='ctx'> #include "idpf.h"</div><div class='add'>+#include "idpf_ptp.h"</div><div class='ctx'> #include "idpf_virtchnl.h"</div><div class='add'>+#include "xdp.h"</div><div class='add'>+#include "xsk.h"</div><div class='ctx'> </div><div class='del'>-struct idpf_tx_stash {</div><div class='del'>-	struct hlist_node hlist;</div><div class='del'>-	struct libeth_sqe buf;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define idpf_tx_buf_compl_tag(buf)	(*(u32 *)&amp;(buf)-&gt;priv)</div><div class='add'>+#define idpf_tx_buf_next(buf)		(*(u32 *)&amp;(buf)-&gt;priv)</div><div class='ctx'> LIBETH_SQE_CHECK_PRIV(u32);</div><div class='ctx'> </div><div class='del'>-static bool idpf_chk_linearize(struct sk_buff *skb, unsigned int max_bufs,</div><div class='del'>-			       unsigned int count);</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * idpf_buf_lifo_push - push a buffer pointer onto stack</div><div class='del'>- * @stack: pointer to stack struct</div><div class='del'>- * @buf: pointer to buf to push</div><div class='add'>+ * idpf_chk_linearize - Check if skb exceeds max descriptors per packet</div><div class='add'>+ * @skb: send buffer</div><div class='add'>+ * @max_bufs: maximum scatter gather buffers for single packet</div><div class='add'>+ * @count: number of buffers this packet needs</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 on success, negative on failure</div><div class='del'>- **/</div><div class='del'>-static int idpf_buf_lifo_push(struct idpf_buf_lifo *stack,</div><div class='del'>-			      struct idpf_tx_stash *buf)</div><div class='add'>+ * Make sure we don't exceed maximum scatter gather buffers for a single</div><div class='add'>+ * packet.</div><div class='add'>+ * TSO case has been handled earlier from idpf_features_check().</div><div class='add'>+ */</div><div class='add'>+static bool idpf_chk_linearize(const struct sk_buff *skb,</div><div class='add'>+			       unsigned int max_bufs,</div><div class='add'>+			       unsigned int count)</div><div class='ctx'> {</div><div class='del'>-	if (unlikely(stack-&gt;top == stack-&gt;size))</div><div class='del'>-		return -ENOSPC;</div><div class='del'>-</div><div class='del'>-	stack-&gt;bufs[stack-&gt;top++] = buf;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	if (likely(count &lt;= max_bufs))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * idpf_buf_lifo_pop - pop a buffer pointer from stack</div><div class='del'>- * @stack: pointer to stack struct</div><div class='del'>- **/</div><div class='del'>-static struct idpf_tx_stash *idpf_buf_lifo_pop(struct idpf_buf_lifo *stack)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(!stack-&gt;top))</div><div class='del'>-		return NULL;</div><div class='add'>+	if (skb_is_gso(skb))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	return stack-&gt;bufs[--stack-&gt;top];</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -69,59 +54,42 @@ void idpf_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * idpf_tx_buf_rel_all - Free any empty Tx buffers</div><div class='del'>- * @txq: queue to be cleaned</div><div class='del'>- */</div><div class='del'>-static void idpf_tx_buf_rel_all(struct idpf_tx_queue *txq)</div><div class='add'>+static void idpf_tx_buf_clean(struct idpf_tx_queue *txq)</div><div class='ctx'> {</div><div class='ctx'> 	struct libeth_sq_napi_stats ss = { };</div><div class='del'>-	struct idpf_buf_lifo *buf_stack;</div><div class='del'>-	struct idpf_tx_stash *stash;</div><div class='add'>+	struct xdp_frame_bulk bq;</div><div class='ctx'> 	struct libeth_cq_pp cp = {</div><div class='ctx'> 		.dev	= txq-&gt;dev,</div><div class='add'>+		.bq	= &amp;bq,</div><div class='ctx'> 		.ss	= &amp;ss,</div><div class='ctx'> 	};</div><div class='del'>-	struct hlist_node *tmp;</div><div class='del'>-	u32 i, tag;</div><div class='ctx'> </div><div class='del'>-	/* Buffers already cleared, nothing to do */</div><div class='del'>-	if (!txq-&gt;tx_buf)</div><div class='del'>-		return;</div><div class='add'>+	xdp_frame_bulk_init(&amp;bq);</div><div class='ctx'> </div><div class='ctx'> 	/* Free all the Tx buffer sk_buffs */</div><div class='del'>-	for (i = 0; i &lt; txq-&gt;desc_count; i++)</div><div class='del'>-		libeth_tx_complete(&amp;txq-&gt;tx_buf[i], &amp;cp);</div><div class='add'>+	for (u32 i = 0; i &lt; txq-&gt;buf_pool_size; i++)</div><div class='add'>+		libeth_tx_complete_any(&amp;txq-&gt;tx_buf[i], &amp;cp);</div><div class='ctx'> </div><div class='del'>-	kfree(txq-&gt;tx_buf);</div><div class='del'>-	txq-&gt;tx_buf = NULL;</div><div class='del'>-</div><div class='del'>-	if (!idpf_queue_has(FLOW_SCH_EN, txq))</div><div class='del'>-		return;</div><div class='add'>+	xdp_flush_frame_bulk(&amp;bq);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	buf_stack = &amp;txq-&gt;stash-&gt;buf_stack;</div><div class='del'>-	if (!buf_stack-&gt;bufs)</div><div class='add'>+/**</div><div class='add'>+ * idpf_tx_buf_rel_all - Free any empty Tx buffers</div><div class='add'>+ * @txq: queue to be cleaned</div><div class='add'>+ */</div><div class='add'>+static void idpf_tx_buf_rel_all(struct idpf_tx_queue *txq)</div><div class='add'>+{</div><div class='add'>+	/* Buffers already cleared, nothing to do */</div><div class='add'>+	if (!txq-&gt;tx_buf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * If a Tx timeout occurred, there are potentially still bufs in the</div><div class='del'>-	 * hash table, free them here.</div><div class='del'>-	 */</div><div class='del'>-	hash_for_each_safe(txq-&gt;stash-&gt;sched_buf_hash, tag, tmp, stash,</div><div class='del'>-			   hlist) {</div><div class='del'>-		if (!stash)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		libeth_tx_complete(&amp;stash-&gt;buf, &amp;cp);</div><div class='del'>-		hash_del(&amp;stash-&gt;hlist);</div><div class='del'>-		idpf_buf_lifo_push(buf_stack, stash);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; buf_stack-&gt;size; i++)</div><div class='del'>-		kfree(buf_stack-&gt;bufs[i]);</div><div class='add'>+	if (idpf_queue_has(XSK, txq))</div><div class='add'>+		idpf_xsksq_clean(txq);</div><div class='add'>+	else</div><div class='add'>+		idpf_tx_buf_clean(txq);</div><div class='ctx'> </div><div class='del'>-	kfree(buf_stack-&gt;bufs);</div><div class='del'>-	buf_stack-&gt;bufs = NULL;</div><div class='add'>+	kfree(txq-&gt;tx_buf);</div><div class='add'>+	txq-&gt;tx_buf = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -132,12 +100,24 @@ static void idpf_tx_buf_rel_all(struct idpf_tx_queue *txq)</div><div class='ctx'>  */</div><div class='ctx'> static void idpf_tx_desc_rel(struct idpf_tx_queue *txq)</div><div class='ctx'> {</div><div class='add'>+	bool xdp = idpf_queue_has(XDP, txq);</div><div class='add'>+</div><div class='add'>+	if (xdp)</div><div class='add'>+		libeth_xdpsq_deinit_timer(txq-&gt;timer);</div><div class='add'>+</div><div class='ctx'> 	idpf_tx_buf_rel_all(txq);</div><div class='del'>-	netdev_tx_reset_subqueue(txq-&gt;netdev, txq-&gt;idx);</div><div class='add'>+</div><div class='add'>+	if (!xdp)</div><div class='add'>+		netdev_tx_reset_subqueue(txq-&gt;netdev, txq-&gt;idx);</div><div class='add'>+</div><div class='add'>+	idpf_xsk_clear_queue(txq, VIRTCHNL2_QUEUE_TYPE_TX);</div><div class='ctx'> </div><div class='ctx'> 	if (!txq-&gt;desc_ring)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (!xdp &amp;&amp; txq-&gt;refillq)</div><div class='add'>+		kfree(txq-&gt;refillq-&gt;ring);</div><div class='add'>+</div><div class='ctx'> 	dmam_free_coherent(txq-&gt;dev, txq-&gt;size, txq-&gt;desc_ring, txq-&gt;dma);</div><div class='ctx'> 	txq-&gt;desc_ring = NULL;</div><div class='ctx'> 	txq-&gt;next_to_use = 0;</div><div class='hunk'>@@ -152,12 +132,14 @@ static void idpf_tx_desc_rel(struct idpf_tx_queue *txq)</div><div class='ctx'>  */</div><div class='ctx'> static void idpf_compl_desc_rel(struct idpf_compl_queue *complq)</div><div class='ctx'> {</div><div class='del'>-	if (!complq-&gt;comp)</div><div class='add'>+	idpf_xsk_clear_queue(complq, VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION);</div><div class='add'>+</div><div class='add'>+	if (!complq-&gt;desc_ring)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	dma_free_coherent(complq-&gt;netdev-&gt;dev.parent, complq-&gt;size,</div><div class='del'>-			  complq-&gt;comp, complq-&gt;dma);</div><div class='del'>-	complq-&gt;comp = NULL;</div><div class='add'>+			  complq-&gt;desc_ring, complq-&gt;dma);</div><div class='add'>+	complq-&gt;desc_ring = NULL;</div><div class='ctx'> 	complq-&gt;next_to_use = 0;</div><div class='ctx'> 	complq-&gt;next_to_clean = 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -194,41 +176,18 @@ static void idpf_tx_desc_rel_all(struct idpf_vport *vport)</div><div class='ctx'>  */</div><div class='ctx'> static int idpf_tx_buf_alloc_all(struct idpf_tx_queue *tx_q)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_buf_lifo *buf_stack;</div><div class='del'>-	int buf_size;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='ctx'> 	/* Allocate book keeping buffers only. Buffers to be supplied to HW</div><div class='ctx'> 	 * are allocated by kernel network stack and received as part of skb</div><div class='ctx'> 	 */</div><div class='del'>-	buf_size = sizeof(struct idpf_tx_buf) * tx_q-&gt;desc_count;</div><div class='del'>-	tx_q-&gt;tx_buf = kzalloc(buf_size, GFP_KERNEL);</div><div class='add'>+	if (idpf_queue_has(FLOW_SCH_EN, tx_q))</div><div class='add'>+		tx_q-&gt;buf_pool_size = U16_MAX;</div><div class='add'>+	else</div><div class='add'>+		tx_q-&gt;buf_pool_size = tx_q-&gt;desc_count;</div><div class='add'>+	tx_q-&gt;tx_buf = kcalloc(tx_q-&gt;buf_pool_size, sizeof(*tx_q-&gt;tx_buf),</div><div class='add'>+			       GFP_KERNEL);</div><div class='ctx'> 	if (!tx_q-&gt;tx_buf)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (!idpf_queue_has(FLOW_SCH_EN, tx_q))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	buf_stack = &amp;tx_q-&gt;stash-&gt;buf_stack;</div><div class='del'>-</div><div class='del'>-	/* Initialize tx buf stack for out-of-order completions if</div><div class='del'>-	 * flow scheduling offload is enabled</div><div class='del'>-	 */</div><div class='del'>-	buf_stack-&gt;bufs = kcalloc(tx_q-&gt;desc_count, sizeof(*buf_stack-&gt;bufs),</div><div class='del'>-				  GFP_KERNEL);</div><div class='del'>-	if (!buf_stack-&gt;bufs)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	buf_stack-&gt;size = tx_q-&gt;desc_count;</div><div class='del'>-	buf_stack-&gt;top = tx_q-&gt;desc_count;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; tx_q-&gt;desc_count; i++) {</div><div class='del'>-		buf_stack-&gt;bufs[i] = kzalloc(sizeof(*buf_stack-&gt;bufs[i]),</div><div class='del'>-					     GFP_KERNEL);</div><div class='del'>-		if (!buf_stack-&gt;bufs[i])</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -243,6 +202,7 @@ static int idpf_tx_desc_alloc(const struct idpf_vport *vport,</div><div class='ctx'> 			      struct idpf_tx_queue *tx_q)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = tx_q-&gt;dev;</div><div class='add'>+	struct idpf_sw_queue *refillq;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = idpf_tx_buf_alloc_all(tx_q);</div><div class='hunk'>@@ -266,6 +226,33 @@ static int idpf_tx_desc_alloc(const struct idpf_vport *vport,</div><div class='ctx'> 	tx_q-&gt;next_to_clean = 0;</div><div class='ctx'> 	idpf_queue_set(GEN_CHK, tx_q);</div><div class='ctx'> </div><div class='add'>+	idpf_xsk_setup_queue(vport, tx_q, VIRTCHNL2_QUEUE_TYPE_TX);</div><div class='add'>+</div><div class='add'>+	if (!idpf_queue_has(FLOW_SCH_EN, tx_q))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	refillq = tx_q-&gt;refillq;</div><div class='add'>+	refillq-&gt;desc_count = tx_q-&gt;buf_pool_size;</div><div class='add'>+	refillq-&gt;ring = kcalloc(refillq-&gt;desc_count, sizeof(u32),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!refillq-&gt;ring) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (unsigned int i = 0; i &lt; refillq-&gt;desc_count; i++)</div><div class='add'>+		refillq-&gt;ring[i] =</div><div class='add'>+			FIELD_PREP(IDPF_RFL_BI_BUFID_M, i) |</div><div class='add'>+			FIELD_PREP(IDPF_RFL_BI_GEN_M,</div><div class='add'>+				   idpf_queue_has(GEN_CHK, refillq));</div><div class='add'>+</div><div class='add'>+	/* Go ahead and flip the GEN bit since this counts as filling</div><div class='add'>+	 * up the ring, i.e. we already ring wrapped.</div><div class='add'>+	 */</div><div class='add'>+	idpf_queue_change(GEN_CHK, refillq);</div><div class='add'>+</div><div class='add'>+	tx_q-&gt;last_re = tx_q-&gt;desc_count - IDPF_TX_SPLITQ_RE_MIN_GAP;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_alloc:</div><div class='hunk'>@@ -284,18 +271,25 @@ err_alloc:</div><div class='ctx'> static int idpf_compl_desc_alloc(const struct idpf_vport *vport,</div><div class='ctx'> 				 struct idpf_compl_queue *complq)</div><div class='ctx'> {</div><div class='del'>-	complq-&gt;size = array_size(complq-&gt;desc_count, sizeof(*complq-&gt;comp));</div><div class='add'>+	u32 desc_size;</div><div class='ctx'> </div><div class='del'>-	complq-&gt;comp = dma_alloc_coherent(complq-&gt;netdev-&gt;dev.parent,</div><div class='del'>-					  complq-&gt;size, &amp;complq-&gt;dma,</div><div class='del'>-					  GFP_KERNEL);</div><div class='del'>-	if (!complq-&gt;comp)</div><div class='add'>+	desc_size = idpf_queue_has(FLOW_SCH_EN, complq) ?</div><div class='add'>+		    sizeof(*complq-&gt;comp) : sizeof(*complq-&gt;comp_4b);</div><div class='add'>+	complq-&gt;size = array_size(complq-&gt;desc_count, desc_size);</div><div class='add'>+</div><div class='add'>+	complq-&gt;desc_ring = dma_alloc_coherent(complq-&gt;netdev-&gt;dev.parent,</div><div class='add'>+					       complq-&gt;size, &amp;complq-&gt;dma,</div><div class='add'>+					       GFP_KERNEL);</div><div class='add'>+	if (!complq-&gt;desc_ring)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	complq-&gt;next_to_use = 0;</div><div class='ctx'> 	complq-&gt;next_to_clean = 0;</div><div class='ctx'> 	idpf_queue_set(GEN_CHK, complq);</div><div class='ctx'> </div><div class='add'>+	idpf_xsk_setup_queue(vport, complq,</div><div class='add'>+			     VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -316,8 +310,6 @@ static int idpf_tx_desc_alloc_all(struct idpf_vport *vport)</div><div class='ctx'> 	for (i = 0; i &lt; vport-&gt;num_txq_grp; i++) {</div><div class='ctx'> 		for (j = 0; j &lt; vport-&gt;txq_grps[i].num_txq; j++) {</div><div class='ctx'> 			struct idpf_tx_queue *txq = vport-&gt;txq_grps[i].txqs[j];</div><div class='del'>-			u8 gen_bits = 0;</div><div class='del'>-			u16 bufidx_mask;</div><div class='ctx'> </div><div class='ctx'> 			err = idpf_tx_desc_alloc(vport, txq);</div><div class='ctx'> 			if (err) {</div><div class='hunk'>@@ -326,34 +318,6 @@ static int idpf_tx_desc_alloc_all(struct idpf_vport *vport)</div><div class='ctx'> 					i);</div><div class='ctx'> 				goto err_out;</div><div class='ctx'> 			}</div><div class='del'>-</div><div class='del'>-			if (!idpf_is_queue_model_split(vport-&gt;txq_model))</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			txq-&gt;compl_tag_cur_gen = 0;</div><div class='del'>-</div><div class='del'>-			/* Determine the number of bits in the bufid</div><div class='del'>-			 * mask and add one to get the start of the</div><div class='del'>-			 * generation bits</div><div class='del'>-			 */</div><div class='del'>-			bufidx_mask = txq-&gt;desc_count - 1;</div><div class='del'>-			while (bufidx_mask &gt;&gt; 1) {</div><div class='del'>-				txq-&gt;compl_tag_gen_s++;</div><div class='del'>-				bufidx_mask = bufidx_mask &gt;&gt; 1;</div><div class='del'>-			}</div><div class='del'>-			txq-&gt;compl_tag_gen_s++;</div><div class='del'>-</div><div class='del'>-			gen_bits = IDPF_TX_SPLITQ_COMPL_TAG_WIDTH -</div><div class='del'>-							txq-&gt;compl_tag_gen_s;</div><div class='del'>-			txq-&gt;compl_tag_gen_max = GETMAXVAL(gen_bits);</div><div class='del'>-</div><div class='del'>-			/* Set bufid mask based on location of first</div><div class='del'>-			 * gen bit; it cannot simply be the descriptor</div><div class='del'>-			 * ring size-1 since we can have size values</div><div class='del'>-			 * where not all of those bits are set.</div><div class='del'>-			 */</div><div class='del'>-			txq-&gt;compl_tag_bufid_m =</div><div class='del'>-				GETMAXVAL(txq-&gt;compl_tag_gen_s);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!idpf_is_queue_model_split(vport-&gt;txq_model))</div><div class='hunk'>@@ -382,12 +346,12 @@ err_out:</div><div class='ctx'>  */</div><div class='ctx'> static void idpf_rx_page_rel(struct libeth_fqe *rx_buf)</div><div class='ctx'> {</div><div class='del'>-	if (unlikely(!rx_buf-&gt;page))</div><div class='add'>+	if (unlikely(!rx_buf-&gt;netmem))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	page_pool_put_full_page(rx_buf-&gt;page-&gt;pp, rx_buf-&gt;page, false);</div><div class='add'>+	libeth_rx_recycle_slow(rx_buf-&gt;netmem);</div><div class='ctx'> </div><div class='del'>-	rx_buf-&gt;page = NULL;</div><div class='add'>+	rx_buf-&gt;netmem = 0;</div><div class='ctx'> 	rx_buf-&gt;offset = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -425,6 +389,11 @@ static void idpf_rx_buf_rel_bufq(struct idpf_buf_queue *bufq)</div><div class='ctx'> 	if (!bufq-&gt;buf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (idpf_queue_has(XSK, bufq)) {</div><div class='add'>+		idpf_xskfq_rel(bufq);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Free all the bufs allocated and given to hw on Rx queue */</div><div class='ctx'> 	for (u32 i = 0; i &lt; bufq-&gt;desc_count; i++)</div><div class='ctx'> 		idpf_rx_page_rel(&amp;bufq-&gt;buf[i]);</div><div class='hunk'>@@ -473,14 +442,14 @@ static void idpf_rx_desc_rel(struct idpf_rx_queue *rxq, struct device *dev,</div><div class='ctx'> 	if (!rxq)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (rxq-&gt;skb) {</div><div class='del'>-		dev_kfree_skb_any(rxq-&gt;skb);</div><div class='del'>-		rxq-&gt;skb = NULL;</div><div class='del'>-	}</div><div class='add'>+	if (!idpf_queue_has(XSK, rxq))</div><div class='add'>+		libeth_xdp_return_stash(&amp;rxq-&gt;xdp);</div><div class='ctx'> </div><div class='ctx'> 	if (!idpf_is_queue_model_split(model))</div><div class='ctx'> 		idpf_rx_buf_rel_all(rxq);</div><div class='ctx'> </div><div class='add'>+	idpf_xsk_clear_queue(rxq, VIRTCHNL2_QUEUE_TYPE_RX);</div><div class='add'>+</div><div class='ctx'> 	rxq-&gt;next_to_alloc = 0;</div><div class='ctx'> 	rxq-&gt;next_to_clean = 0;</div><div class='ctx'> 	rxq-&gt;next_to_use = 0;</div><div class='hunk'>@@ -503,6 +472,7 @@ static void idpf_rx_desc_rel_bufq(struct idpf_buf_queue *bufq,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	idpf_rx_buf_rel_bufq(bufq);</div><div class='add'>+	idpf_xsk_clear_queue(bufq, VIRTCHNL2_QUEUE_TYPE_RX_BUFFER);</div><div class='ctx'> </div><div class='ctx'> 	bufq-&gt;next_to_alloc = 0;</div><div class='ctx'> 	bufq-&gt;next_to_clean = 0;</div><div class='hunk'>@@ -585,6 +555,7 @@ static int idpf_rx_hdr_buf_alloc_all(struct idpf_buf_queue *bufq)</div><div class='ctx'> 	struct libeth_fq fq = {</div><div class='ctx'> 		.count	= bufq-&gt;desc_count,</div><div class='ctx'> 		.type	= LIBETH_FQE_HDR,</div><div class='add'>+		.xdp	= idpf_xdp_enabled(bufq-&gt;q_vector-&gt;vport),</div><div class='ctx'> 		.nid	= idpf_q_vector_to_mem(bufq-&gt;q_vector),</div><div class='ctx'> 	};</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -602,18 +573,18 @@ static int idpf_rx_hdr_buf_alloc_all(struct idpf_buf_queue *bufq)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_rx_post_buf_refill - Post buffer id to refill queue</div><div class='add'>+ * idpf_post_buf_refill - Post buffer id to refill queue</div><div class='ctx'>  * @refillq: refill queue to post to</div><div class='ctx'>  * @buf_id: buffer id to post</div><div class='ctx'>  */</div><div class='del'>-static void idpf_rx_post_buf_refill(struct idpf_sw_queue *refillq, u16 buf_id)</div><div class='add'>+static void idpf_post_buf_refill(struct idpf_sw_queue *refillq, u16 buf_id)</div><div class='ctx'> {</div><div class='ctx'> 	u32 nta = refillq-&gt;next_to_use;</div><div class='ctx'> </div><div class='ctx'> 	/* store the buffer ID and the SW maintained GEN bit to the refillq */</div><div class='ctx'> 	refillq-&gt;ring[nta] =</div><div class='del'>-		FIELD_PREP(IDPF_RX_BI_BUFID_M, buf_id) |</div><div class='del'>-		FIELD_PREP(IDPF_RX_BI_GEN_M,</div><div class='add'>+		FIELD_PREP(IDPF_RFL_BI_BUFID_M, buf_id) |</div><div class='add'>+		FIELD_PREP(IDPF_RFL_BI_GEN_M,</div><div class='ctx'> 			   idpf_queue_has(GEN_CHK, refillq));</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(++nta == refillq-&gt;desc_count)) {</div><div class='hunk'>@@ -784,10 +755,14 @@ static int idpf_rx_bufs_init(struct idpf_buf_queue *bufq,</div><div class='ctx'> 		.count		= bufq-&gt;desc_count,</div><div class='ctx'> 		.type		= type,</div><div class='ctx'> 		.hsplit		= idpf_queue_has(HSPLIT_EN, bufq),</div><div class='add'>+		.xdp		= idpf_xdp_enabled(bufq-&gt;q_vector-&gt;vport),</div><div class='ctx'> 		.nid		= idpf_q_vector_to_mem(bufq-&gt;q_vector),</div><div class='ctx'> 	};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (idpf_queue_has(XSK, bufq))</div><div class='add'>+		return idpf_xskfq_init(bufq);</div><div class='add'>+</div><div class='ctx'> 	ret = libeth_rx_fq_create(&amp;fq, &amp;bufq-&gt;q_vector-&gt;napi);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -811,6 +786,8 @@ int idpf_rx_bufs_init_all(struct idpf_vport *vport)</div><div class='ctx'> 	bool split = idpf_is_queue_model_split(vport-&gt;rxq_model);</div><div class='ctx'> 	int i, j, err;</div><div class='ctx'> </div><div class='add'>+	idpf_xdp_copy_prog_to_rqs(vport, vport-&gt;xdp_prog);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='ctx'> 		struct idpf_rxq_group *rx_qgrp = &amp;vport-&gt;rxq_grps[i];</div><div class='ctx'> 		u32 truesize = 0;</div><div class='hunk'>@@ -881,6 +858,8 @@ static int idpf_rx_desc_alloc(const struct idpf_vport *vport,</div><div class='ctx'> 	rxq-&gt;next_to_use = 0;</div><div class='ctx'> 	idpf_queue_set(GEN_CHK, rxq);</div><div class='ctx'> </div><div class='add'>+	idpf_xsk_setup_queue(vport, rxq, VIRTCHNL2_QUEUE_TYPE_RX);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -906,9 +885,10 @@ static int idpf_bufq_desc_alloc(const struct idpf_vport *vport,</div><div class='ctx'> 	bufq-&gt;next_to_alloc = 0;</div><div class='ctx'> 	bufq-&gt;next_to_clean = 0;</div><div class='ctx'> 	bufq-&gt;next_to_use = 0;</div><div class='del'>-</div><div class='ctx'> 	idpf_queue_set(GEN_CHK, bufq);</div><div class='ctx'> </div><div class='add'>+	idpf_xsk_setup_queue(vport, bufq, VIRTCHNL2_QUEUE_TYPE_RX_BUFFER);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -942,8 +922,8 @@ static int idpf_rx_desc_alloc_all(struct idpf_vport *vport)</div><div class='ctx'> 			err = idpf_rx_desc_alloc(vport, q);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				pci_err(vport-&gt;adapter-&gt;pdev,</div><div class='del'>-					"Memory allocation for Rx Queue %u failed\n",</div><div class='del'>-					i);</div><div class='add'>+					"Memory allocation for Rx queue %u from queue group %u failed\n",</div><div class='add'>+					j, i);</div><div class='ctx'> 				goto err_out;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -959,8 +939,8 @@ static int idpf_rx_desc_alloc_all(struct idpf_vport *vport)</div><div class='ctx'> 			err = idpf_bufq_desc_alloc(vport, q);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				pci_err(vport-&gt;adapter-&gt;pdev,</div><div class='del'>-					"Memory allocation for Rx Buffer Queue %u failed\n",</div><div class='del'>-					i);</div><div class='add'>+					"Memory allocation for Rx Buffer Queue %u from queue group %u failed\n",</div><div class='add'>+					j, i);</div><div class='ctx'> 				goto err_out;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -974,6 +954,341 @@ err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int idpf_init_queue_set(const struct idpf_queue_set *qs)</div><div class='add'>+{</div><div class='add'>+	const struct idpf_vport *vport = qs-&gt;vport;</div><div class='add'>+	bool splitq;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	splitq = idpf_is_queue_model_split(vport-&gt;rxq_model);</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; qs-&gt;num; i++) {</div><div class='add'>+		const struct idpf_queue_ptr *q = &amp;qs-&gt;qs[i];</div><div class='add'>+		struct idpf_buf_queue *bufq;</div><div class='add'>+</div><div class='add'>+		switch (q-&gt;type) {</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_RX:</div><div class='add'>+			err = idpf_rx_desc_alloc(vport, q-&gt;rxq);</div><div class='add'>+			if (err)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			err = idpf_xdp_rxq_info_init(q-&gt;rxq);</div><div class='add'>+			if (err)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			if (!splitq)</div><div class='add'>+				err = idpf_rx_bufs_init_singleq(q-&gt;rxq);</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_RX_BUFFER:</div><div class='add'>+			bufq = q-&gt;bufq;</div><div class='add'>+</div><div class='add'>+			err = idpf_bufq_desc_alloc(vport, bufq);</div><div class='add'>+			if (err)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			for (u32 j = 0; j &lt; bufq-&gt;q_vector-&gt;num_bufq; j++) {</div><div class='add'>+				struct idpf_buf_queue * const *bufqs;</div><div class='add'>+				enum libeth_fqe_type type;</div><div class='add'>+				u32 ts;</div><div class='add'>+</div><div class='add'>+				bufqs = bufq-&gt;q_vector-&gt;bufq;</div><div class='add'>+				if (bufqs[j] != bufq)</div><div class='add'>+					continue;</div><div class='add'>+</div><div class='add'>+				if (j) {</div><div class='add'>+					type = LIBETH_FQE_SHORT;</div><div class='add'>+					ts = bufqs[j - 1]-&gt;truesize &gt;&gt; 1;</div><div class='add'>+				} else {</div><div class='add'>+					type = LIBETH_FQE_MTU;</div><div class='add'>+					ts = 0;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				bufq-&gt;truesize = ts;</div><div class='add'>+</div><div class='add'>+				err = idpf_rx_bufs_init(bufq, type);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_TX:</div><div class='add'>+			err = idpf_tx_desc_alloc(vport, q-&gt;txq);</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION:</div><div class='add'>+			err = idpf_compl_desc_alloc(vport, q-&gt;complq);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_clean_queue_set(const struct idpf_queue_set *qs)</div><div class='add'>+{</div><div class='add'>+	const struct idpf_vport *vport = qs-&gt;vport;</div><div class='add'>+	struct device *dev = vport-&gt;netdev-&gt;dev.parent;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; qs-&gt;num; i++) {</div><div class='add'>+		const struct idpf_queue_ptr *q = &amp;qs-&gt;qs[i];</div><div class='add'>+</div><div class='add'>+		switch (q-&gt;type) {</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_RX:</div><div class='add'>+			idpf_xdp_rxq_info_deinit(q-&gt;rxq, vport-&gt;rxq_model);</div><div class='add'>+			idpf_rx_desc_rel(q-&gt;rxq, dev, vport-&gt;rxq_model);</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_RX_BUFFER:</div><div class='add'>+			idpf_rx_desc_rel_bufq(q-&gt;bufq, dev);</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_TX:</div><div class='add'>+			idpf_tx_desc_rel(q-&gt;txq);</div><div class='add'>+</div><div class='add'>+			if (idpf_queue_has(XDP, q-&gt;txq)) {</div><div class='add'>+				q-&gt;txq-&gt;pending = 0;</div><div class='add'>+				q-&gt;txq-&gt;xdp_tx = 0;</div><div class='add'>+			} else {</div><div class='add'>+				q-&gt;txq-&gt;txq_grp-&gt;num_completions_pending = 0;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			writel(q-&gt;txq-&gt;next_to_use, q-&gt;txq-&gt;tail);</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION:</div><div class='add'>+			idpf_compl_desc_rel(q-&gt;complq);</div><div class='add'>+			q-&gt;complq-&gt;num_completions = 0;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_qvec_ena_irq(struct idpf_q_vector *qv)</div><div class='add'>+{</div><div class='add'>+	if (qv-&gt;num_txq) {</div><div class='add'>+		u32 itr;</div><div class='add'>+</div><div class='add'>+		if (IDPF_ITR_IS_DYNAMIC(qv-&gt;tx_intr_mode))</div><div class='add'>+			itr = qv-&gt;vport-&gt;tx_itr_profile[qv-&gt;tx_dim.profile_ix];</div><div class='add'>+		else</div><div class='add'>+			itr = qv-&gt;tx_itr_value;</div><div class='add'>+</div><div class='add'>+		idpf_vport_intr_write_itr(qv, itr, true);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (qv-&gt;num_rxq) {</div><div class='add'>+		u32 itr;</div><div class='add'>+</div><div class='add'>+		if (IDPF_ITR_IS_DYNAMIC(qv-&gt;rx_intr_mode))</div><div class='add'>+			itr = qv-&gt;vport-&gt;rx_itr_profile[qv-&gt;rx_dim.profile_ix];</div><div class='add'>+		else</div><div class='add'>+			itr = qv-&gt;rx_itr_value;</div><div class='add'>+</div><div class='add'>+		idpf_vport_intr_write_itr(qv, itr, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (qv-&gt;num_txq || qv-&gt;num_rxq)</div><div class='add'>+		idpf_vport_intr_update_itr_ena_irq(qv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_vector_to_queue_set - create a queue set associated with the given</div><div class='add'>+ *			      queue vector</div><div class='add'>+ * @qv: queue vector corresponding to the queue pair</div><div class='add'>+ *</div><div class='add'>+ * Returns a pointer to a dynamically allocated array of pointers to all</div><div class='add'>+ * queues associated with a given queue vector (@qv).</div><div class='add'>+ * Please note that the caller is responsible to free the memory allocated</div><div class='add'>+ * by this function using kfree().</div><div class='add'>+ *</div><div class='add'>+ * Return: &amp;idpf_queue_set on success, %NULL in case of error.</div><div class='add'>+ */</div><div class='add'>+static struct idpf_queue_set *</div><div class='add'>+idpf_vector_to_queue_set(struct idpf_q_vector *qv)</div><div class='add'>+{</div><div class='add'>+	bool xdp = qv-&gt;vport-&gt;xdp_txq_offset &amp;&amp; !qv-&gt;num_xsksq;</div><div class='add'>+	struct idpf_vport *vport = qv-&gt;vport;</div><div class='add'>+	struct idpf_queue_set *qs;</div><div class='add'>+	u32 num;</div><div class='add'>+</div><div class='add'>+	num = qv-&gt;num_rxq + qv-&gt;num_bufq + qv-&gt;num_txq + qv-&gt;num_complq;</div><div class='add'>+	num += xdp ? qv-&gt;num_rxq * 2 : qv-&gt;num_xsksq * 2;</div><div class='add'>+	if (!num)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	qs = idpf_alloc_queue_set(vport, num);</div><div class='add'>+	if (!qs)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	num = 0;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; qv-&gt;num_bufq; i++) {</div><div class='add'>+		qs-&gt;qs[num].type = VIRTCHNL2_QUEUE_TYPE_RX_BUFFER;</div><div class='add'>+		qs-&gt;qs[num++].bufq = qv-&gt;bufq[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; qv-&gt;num_rxq; i++) {</div><div class='add'>+		qs-&gt;qs[num].type = VIRTCHNL2_QUEUE_TYPE_RX;</div><div class='add'>+		qs-&gt;qs[num++].rxq = qv-&gt;rx[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; qv-&gt;num_txq; i++) {</div><div class='add'>+		qs-&gt;qs[num].type = VIRTCHNL2_QUEUE_TYPE_TX;</div><div class='add'>+		qs-&gt;qs[num++].txq = qv-&gt;tx[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; qv-&gt;num_complq; i++) {</div><div class='add'>+		qs-&gt;qs[num].type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;</div><div class='add'>+		qs-&gt;qs[num++].complq = qv-&gt;complq[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!vport-&gt;xdp_txq_offset)</div><div class='add'>+		goto finalize;</div><div class='add'>+</div><div class='add'>+	if (xdp) {</div><div class='add'>+		for (u32 i = 0; i &lt; qv-&gt;num_rxq; i++) {</div><div class='add'>+			u32 idx = vport-&gt;xdp_txq_offset + qv-&gt;rx[i]-&gt;idx;</div><div class='add'>+</div><div class='add'>+			qs-&gt;qs[num].type = VIRTCHNL2_QUEUE_TYPE_TX;</div><div class='add'>+			qs-&gt;qs[num++].txq = vport-&gt;txqs[idx];</div><div class='add'>+</div><div class='add'>+			qs-&gt;qs[num].type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;</div><div class='add'>+			qs-&gt;qs[num++].complq = vport-&gt;txqs[idx]-&gt;complq;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		for (u32 i = 0; i &lt; qv-&gt;num_xsksq; i++) {</div><div class='add'>+			qs-&gt;qs[num].type = VIRTCHNL2_QUEUE_TYPE_TX;</div><div class='add'>+			qs-&gt;qs[num++].txq = qv-&gt;xsksq[i];</div><div class='add'>+</div><div class='add'>+			qs-&gt;qs[num].type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;</div><div class='add'>+			qs-&gt;qs[num++].complq = qv-&gt;xsksq[i]-&gt;complq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+finalize:</div><div class='add'>+	if (num != qs-&gt;num) {</div><div class='add'>+		kfree(qs);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return qs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int idpf_qp_enable(const struct idpf_queue_set *qs, u32 qid)</div><div class='add'>+{</div><div class='add'>+	struct idpf_vport *vport = qs-&gt;vport;</div><div class='add'>+	struct idpf_q_vector *q_vector;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	q_vector = idpf_find_rxq_vec(vport, qid);</div><div class='add'>+</div><div class='add'>+	err = idpf_init_queue_set(qs);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(vport-&gt;netdev, "Could not initialize queues in pair %u: %pe\n",</div><div class='add'>+			   qid, ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!vport-&gt;xdp_txq_offset)</div><div class='add'>+		goto config;</div><div class='add'>+</div><div class='add'>+	q_vector-&gt;xsksq = kcalloc(DIV_ROUND_UP(vport-&gt;num_rxq_grp,</div><div class='add'>+					       vport-&gt;num_q_vectors),</div><div class='add'>+				  sizeof(*q_vector-&gt;xsksq), GFP_KERNEL);</div><div class='add'>+	if (!q_vector-&gt;xsksq)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; qs-&gt;num; i++) {</div><div class='add'>+		const struct idpf_queue_ptr *q = &amp;qs-&gt;qs[i];</div><div class='add'>+</div><div class='add'>+		if (q-&gt;type != VIRTCHNL2_QUEUE_TYPE_TX)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!idpf_queue_has(XSK, q-&gt;txq))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		idpf_xsk_init_wakeup(q_vector);</div><div class='add'>+</div><div class='add'>+		q-&gt;txq-&gt;q_vector = q_vector;</div><div class='add'>+		q_vector-&gt;xsksq[q_vector-&gt;num_xsksq++] = q-&gt;txq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+config:</div><div class='add'>+	err = idpf_send_config_queue_set_msg(qs);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(vport-&gt;netdev, "Could not configure queues in pair %u: %pe\n",</div><div class='add'>+			   qid, ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = idpf_send_enable_queue_set_msg(qs);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(vport-&gt;netdev, "Could not enable queues in pair %u: %pe\n",</div><div class='add'>+			   qid, ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;q_vector-&gt;napi);</div><div class='add'>+	idpf_qvec_ena_irq(q_vector);</div><div class='add'>+</div><div class='add'>+	netif_start_subqueue(vport-&gt;netdev, qid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int idpf_qp_disable(const struct idpf_queue_set *qs, u32 qid)</div><div class='add'>+{</div><div class='add'>+	struct idpf_vport *vport = qs-&gt;vport;</div><div class='add'>+	struct idpf_q_vector *q_vector;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	q_vector = idpf_find_rxq_vec(vport, qid);</div><div class='add'>+	netif_stop_subqueue(vport-&gt;netdev, qid);</div><div class='add'>+</div><div class='add'>+	writel(0, q_vector-&gt;intr_reg.dyn_ctl);</div><div class='add'>+	napi_disable(&amp;q_vector-&gt;napi);</div><div class='add'>+</div><div class='add'>+	err = idpf_send_disable_queue_set_msg(qs);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(vport-&gt;netdev, "Could not disable queues in pair %u: %pe\n",</div><div class='add'>+			   qid, ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idpf_clean_queue_set(qs);</div><div class='add'>+</div><div class='add'>+	kfree(q_vector-&gt;xsksq);</div><div class='add'>+	q_vector-&gt;num_xsksq = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_qp_switch - enable or disable queues associated with queue pair</div><div class='add'>+ * @vport: vport to switch the pair for</div><div class='add'>+ * @qid: index of the queue pair to switch</div><div class='add'>+ * @en: whether to enable or disable the pair</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_qp_switch(struct idpf_vport *vport, u32 qid, bool en)</div><div class='add'>+{</div><div class='add'>+	struct idpf_q_vector *q_vector = idpf_find_rxq_vec(vport, qid);</div><div class='add'>+	struct idpf_queue_set *qs __free(kfree) = NULL;</div><div class='add'>+</div><div class='add'>+	if (idpf_find_txq_vec(vport, qid) != q_vector)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	qs = idpf_vector_to_queue_set(q_vector);</div><div class='add'>+	if (!qs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return en ? idpf_qp_enable(qs, qid) : idpf_qp_disable(qs, qid);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_txq_group_rel - Release all resources for txq groups</div><div class='ctx'>  * @vport: vport to release txq groups on</div><div class='hunk'>@@ -994,6 +1309,11 @@ static void idpf_txq_group_rel(struct idpf_vport *vport)</div><div class='ctx'> 		struct idpf_txq_group *txq_grp = &amp;vport-&gt;txq_grps[i];</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; txq_grp-&gt;num_txq; j++) {</div><div class='add'>+			if (flow_sch_en) {</div><div class='add'>+				kfree(txq_grp-&gt;txqs[j]-&gt;refillq);</div><div class='add'>+				txq_grp-&gt;txqs[j]-&gt;refillq = NULL;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			kfree(txq_grp-&gt;txqs[j]);</div><div class='ctx'> 			txq_grp-&gt;txqs[j] = NULL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1003,9 +1323,6 @@ static void idpf_txq_group_rel(struct idpf_vport *vport)</div><div class='ctx'> </div><div class='ctx'> 		kfree(txq_grp-&gt;complq);</div><div class='ctx'> 		txq_grp-&gt;complq = NULL;</div><div class='del'>-</div><div class='del'>-		if (flow_sch_en)</div><div class='del'>-			kfree(txq_grp-&gt;stashes);</div><div class='ctx'> 	}</div><div class='ctx'> 	kfree(vport-&gt;txq_grps);</div><div class='ctx'> 	vport-&gt;txq_grps = NULL;</div><div class='hunk'>@@ -1087,8 +1404,12 @@ static void idpf_vport_queue_grp_rel_all(struct idpf_vport *vport)</div><div class='ctx'>  */</div><div class='ctx'> void idpf_vport_queues_rel(struct idpf_vport *vport)</div><div class='ctx'> {</div><div class='add'>+	idpf_xdp_copy_prog_to_rqs(vport, NULL);</div><div class='add'>+</div><div class='ctx'> 	idpf_tx_desc_rel_all(vport);</div><div class='ctx'> 	idpf_rx_desc_rel_all(vport);</div><div class='add'>+</div><div class='add'>+	idpf_xdpsqs_put(vport);</div><div class='ctx'> 	idpf_vport_queue_grp_rel_all(vport);</div><div class='ctx'> </div><div class='ctx'> 	kfree(vport-&gt;txqs);</div><div class='hunk'>@@ -1107,6 +1428,8 @@ void idpf_vport_queues_rel(struct idpf_vport *vport)</div><div class='ctx'>  */</div><div class='ctx'> static int idpf_vport_init_fast_path_txqs(struct idpf_vport *vport)</div><div class='ctx'> {</div><div class='add'>+	struct idpf_ptp_vport_tx_tstamp_caps *caps = vport-&gt;tx_tstamp_caps;</div><div class='add'>+	struct work_struct *tstamp_task = &amp;vport-&gt;tstamp_task;</div><div class='ctx'> 	int i, j, k = 0;</div><div class='ctx'> </div><div class='ctx'> 	vport-&gt;txqs = kcalloc(vport-&gt;num_txq, sizeof(*vport-&gt;txqs),</div><div class='hunk'>@@ -1121,6 +1444,12 @@ static int idpf_vport_init_fast_path_txqs(struct idpf_vport *vport)</div><div class='ctx'> 		for (j = 0; j &lt; tx_grp-&gt;num_txq; j++, k++) {</div><div class='ctx'> 			vport-&gt;txqs[k] = tx_grp-&gt;txqs[j];</div><div class='ctx'> 			vport-&gt;txqs[k]-&gt;idx = k;</div><div class='add'>+</div><div class='add'>+			if (!caps)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			vport-&gt;txqs[k]-&gt;cached_tstamp_caps = caps;</div><div class='add'>+			vport-&gt;txqs[k]-&gt;tstamp_task = tstamp_task;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1154,6 +1483,18 @@ void idpf_vport_init_num_qs(struct idpf_vport *vport,</div><div class='ctx'> 	if (idpf_is_queue_model_split(vport-&gt;rxq_model))</div><div class='ctx'> 		vport-&gt;num_bufq = le16_to_cpu(vport_msg-&gt;num_rx_bufq);</div><div class='ctx'> </div><div class='add'>+	vport-&gt;xdp_prog = config_data-&gt;xdp_prog;</div><div class='add'>+	if (idpf_xdp_enabled(vport)) {</div><div class='add'>+		vport-&gt;xdp_txq_offset = config_data-&gt;num_req_tx_qs;</div><div class='add'>+		vport-&gt;num_xdp_txq = le16_to_cpu(vport_msg-&gt;num_tx_q) -</div><div class='add'>+				     vport-&gt;xdp_txq_offset;</div><div class='add'>+		vport-&gt;xdpsq_share = libeth_xdpsq_shared(vport-&gt;num_xdp_txq);</div><div class='add'>+	} else {</div><div class='add'>+		vport-&gt;xdp_txq_offset = 0;</div><div class='add'>+		vport-&gt;num_xdp_txq = 0;</div><div class='add'>+		vport-&gt;xdpsq_share = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Adjust number of buffer queues per Rx queue group. */</div><div class='ctx'> 	if (!idpf_is_queue_model_split(vport-&gt;rxq_model)) {</div><div class='ctx'> 		vport-&gt;num_bufqs_per_qgrp = 0;</div><div class='hunk'>@@ -1225,22 +1566,17 @@ int idpf_vport_calc_total_qs(struct idpf_adapter *adapter, u16 vport_idx,</div><div class='ctx'> 	int dflt_splitq_txq_grps = 0, dflt_singleq_txqs = 0;</div><div class='ctx'> 	int dflt_splitq_rxq_grps = 0, dflt_singleq_rxqs = 0;</div><div class='ctx'> 	u16 num_req_tx_qs = 0, num_req_rx_qs = 0;</div><div class='add'>+	struct idpf_vport_user_config_data *user;</div><div class='ctx'> 	struct idpf_vport_config *vport_config;</div><div class='ctx'> 	u16 num_txq_grps, num_rxq_grps;</div><div class='del'>-	u32 num_qs;</div><div class='add'>+	u32 num_qs, num_xdpsq;</div><div class='ctx'> </div><div class='ctx'> 	vport_config = adapter-&gt;vport_config[vport_idx];</div><div class='ctx'> 	if (vport_config) {</div><div class='ctx'> 		num_req_tx_qs = vport_config-&gt;user_config.num_req_tx_qs;</div><div class='ctx'> 		num_req_rx_qs = vport_config-&gt;user_config.num_req_rx_qs;</div><div class='ctx'> 	} else {</div><div class='del'>-		int num_cpus;</div><div class='del'>-</div><div class='del'>-		/* Restrict num of queues to cpus online as a default</div><div class='del'>-		 * configuration to give best performance. User can always</div><div class='del'>-		 * override to a max number of queues via ethtool.</div><div class='del'>-		 */</div><div class='del'>-		num_cpus = num_online_cpus();</div><div class='add'>+		u32 num_cpus = netif_get_num_default_rss_queues();</div><div class='ctx'> </div><div class='ctx'> 		dflt_splitq_txq_grps = min_t(int, max_q-&gt;max_txq, num_cpus);</div><div class='ctx'> 		dflt_singleq_txqs = min_t(int, max_q-&gt;max_txq, num_cpus);</div><div class='hunk'>@@ -1275,6 +1611,24 @@ int idpf_vport_calc_total_qs(struct idpf_adapter *adapter, u16 vport_idx,</div><div class='ctx'> 		vport_msg-&gt;num_rx_bufq = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!vport_config)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	user = &amp;vport_config-&gt;user_config;</div><div class='add'>+	user-&gt;num_req_rx_qs = le16_to_cpu(vport_msg-&gt;num_rx_q);</div><div class='add'>+	user-&gt;num_req_tx_qs = le16_to_cpu(vport_msg-&gt;num_tx_q);</div><div class='add'>+</div><div class='add'>+	if (vport_config-&gt;user_config.xdp_prog)</div><div class='add'>+		num_xdpsq = libeth_xdpsq_num(user-&gt;num_req_rx_qs,</div><div class='add'>+					     user-&gt;num_req_tx_qs,</div><div class='add'>+					     vport_config-&gt;max_q.max_txq);</div><div class='add'>+	else</div><div class='add'>+		num_xdpsq = 0;</div><div class='add'>+</div><div class='add'>+	vport_msg-&gt;num_tx_q = cpu_to_le16(user-&gt;num_req_tx_qs + num_xdpsq);</div><div class='add'>+	if (idpf_is_queue_model_split(le16_to_cpu(vport_msg-&gt;txq_model)))</div><div class='add'>+		vport_msg-&gt;num_tx_complq = vport_msg-&gt;num_tx_q;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1324,14 +1678,13 @@ static void idpf_vport_calc_numq_per_grp(struct idpf_vport *vport,</div><div class='ctx'> static void idpf_rxq_set_descids(const struct idpf_vport *vport,</div><div class='ctx'> 				 struct idpf_rx_queue *q)</div><div class='ctx'> {</div><div class='del'>-	if (idpf_is_queue_model_split(vport-&gt;rxq_model)) {</div><div class='del'>-		q-&gt;rxdids = VIRTCHNL2_RXDID_2_FLEX_SPLITQ_M;</div><div class='del'>-	} else {</div><div class='del'>-		if (vport-&gt;base_rxd)</div><div class='del'>-			q-&gt;rxdids = VIRTCHNL2_RXDID_1_32B_BASE_M;</div><div class='del'>-		else</div><div class='del'>-			q-&gt;rxdids = VIRTCHNL2_RXDID_2_FLEX_SQ_NIC_M;</div><div class='del'>-	}</div><div class='add'>+	if (idpf_is_queue_model_split(vport-&gt;rxq_model))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (vport-&gt;base_rxd)</div><div class='add'>+		q-&gt;rxdids = VIRTCHNL2_RXDID_1_32B_BASE_M;</div><div class='add'>+	else</div><div class='add'>+		q-&gt;rxdids = VIRTCHNL2_RXDID_2_FLEX_SQ_NIC_M;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1358,7 +1711,6 @@ static int idpf_txq_group_alloc(struct idpf_vport *vport, u16 num_txq)</div><div class='ctx'> 	for (i = 0; i &lt; vport-&gt;num_txq_grp; i++) {</div><div class='ctx'> 		struct idpf_txq_group *tx_qgrp = &amp;vport-&gt;txq_grps[i];</div><div class='ctx'> 		struct idpf_adapter *adapter = vport-&gt;adapter;</div><div class='del'>-		struct idpf_txq_stash *stashes;</div><div class='ctx'> 		int j;</div><div class='ctx'> </div><div class='ctx'> 		tx_qgrp-&gt;vport = vport;</div><div class='hunk'>@@ -1371,15 +1723,6 @@ static int idpf_txq_group_alloc(struct idpf_vport *vport, u16 num_txq)</div><div class='ctx'> 				goto err_alloc;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (split &amp;&amp; flow_sch_en) {</div><div class='del'>-			stashes = kcalloc(num_txq, sizeof(*stashes),</div><div class='del'>-					  GFP_KERNEL);</div><div class='del'>-			if (!stashes)</div><div class='del'>-				goto err_alloc;</div><div class='del'>-</div><div class='del'>-			tx_qgrp-&gt;stashes = stashes;</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		for (j = 0; j &lt; tx_qgrp-&gt;num_txq; j++) {</div><div class='ctx'> 			struct idpf_tx_queue *q = tx_qgrp-&gt;txqs[j];</div><div class='ctx'> </div><div class='hunk'>@@ -1389,6 +1732,7 @@ static int idpf_txq_group_alloc(struct idpf_vport *vport, u16 num_txq)</div><div class='ctx'> 			q-&gt;tx_min_pkt_len = idpf_get_min_tx_pkt_len(adapter);</div><div class='ctx'> 			q-&gt;netdev = vport-&gt;netdev;</div><div class='ctx'> 			q-&gt;txq_grp = tx_qgrp;</div><div class='add'>+			q-&gt;rel_q_id = j;</div><div class='ctx'> </div><div class='ctx'> 			if (!split) {</div><div class='ctx'> 				q-&gt;clean_budget = vport-&gt;compln_clean_budget;</div><div class='hunk'>@@ -1399,12 +1743,14 @@ static int idpf_txq_group_alloc(struct idpf_vport *vport, u16 num_txq)</div><div class='ctx'> 			if (!flow_sch_en)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			if (split) {</div><div class='del'>-				q-&gt;stash = &amp;stashes[j];</div><div class='del'>-				hash_init(q-&gt;stash-&gt;sched_buf_hash);</div><div class='del'>-			}</div><div class='del'>-</div><div class='ctx'> 			idpf_queue_set(FLOW_SCH_EN, q);</div><div class='add'>+</div><div class='add'>+			q-&gt;refillq = kzalloc(sizeof(*q-&gt;refillq), GFP_KERNEL);</div><div class='add'>+			if (!q-&gt;refillq)</div><div class='add'>+				goto err_alloc;</div><div class='add'>+</div><div class='add'>+			idpf_queue_set(GEN_CHK, q-&gt;refillq);</div><div class='add'>+			idpf_queue_set(RFL_GEN_CHK, q-&gt;refillq);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!split)</div><div class='hunk'>@@ -1547,7 +1893,6 @@ skip_splitq_rx_init:</div><div class='ctx'> setup_rxq:</div><div class='ctx'> 			q-&gt;desc_count = vport-&gt;rxq_desc_count;</div><div class='ctx'> 			q-&gt;rx_ptype_lkup = vport-&gt;rx_ptype_lkup;</div><div class='del'>-			q-&gt;netdev = vport-&gt;netdev;</div><div class='ctx'> 			q-&gt;bufq_sets = rx_qgrp-&gt;splitq.bufq_sets;</div><div class='ctx'> 			q-&gt;idx = (i * num_rxq) + j;</div><div class='ctx'> 			q-&gt;rx_buffer_low_watermark = IDPF_LOW_WATERMARK;</div><div class='hunk'>@@ -1608,15 +1953,19 @@ int idpf_vport_queues_alloc(struct idpf_vport *vport)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='del'>-	err = idpf_tx_desc_alloc_all(vport);</div><div class='add'>+	err = idpf_vport_init_fast_path_txqs(vport);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='del'>-	err = idpf_rx_desc_alloc_all(vport);</div><div class='add'>+	err = idpf_xdpsqs_get(vport);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='del'>-	err = idpf_vport_init_fast_path_txqs(vport);</div><div class='add'>+	err = idpf_tx_desc_alloc_all(vport);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	err = idpf_rx_desc_alloc_all(vport);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='hunk'>@@ -1629,105 +1978,37 @@ err_out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_tx_handle_sw_marker - Handle queue marker packet</div><div class='del'>- * @tx_q: tx queue to handle software marker</div><div class='add'>+ * idpf_tx_read_tstamp - schedule a work to read Tx timestamp value</div><div class='add'>+ * @txq: queue to read the timestamp from</div><div class='add'>+ * @skb: socket buffer to provide Tx timestamp value</div><div class='add'>+ *</div><div class='add'>+ * Schedule a work to read Tx timestamp value generated once the packet is</div><div class='add'>+ * transmitted.</div><div class='ctx'>  */</div><div class='del'>-static void idpf_tx_handle_sw_marker(struct idpf_tx_queue *tx_q)</div><div class='add'>+static void idpf_tx_read_tstamp(struct idpf_tx_queue *txq, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_netdev_priv *priv = netdev_priv(tx_q-&gt;netdev);</div><div class='del'>-	struct idpf_vport *vport = priv-&gt;vport;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	idpf_queue_clear(SW_MARKER, tx_q);</div><div class='del'>-	/* Hardware must write marker packets to all queues associated with</div><div class='del'>-	 * completion queues. So check if all queues received marker packets</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_txq; i++)</div><div class='del'>-		/* If we're still waiting on any other TXQ marker completions,</div><div class='del'>-		 * just return now since we cannot wake up the marker_wq yet.</div><div class='del'>-		 */</div><div class='del'>-		if (idpf_queue_has(SW_MARKER, vport-&gt;txqs[i]))</div><div class='del'>-			return;</div><div class='add'>+	struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;</div><div class='add'>+	struct idpf_ptp_tx_tstamp_status *tx_tstamp_status;</div><div class='ctx'> </div><div class='del'>-	/* Drain complete */</div><div class='del'>-	set_bit(IDPF_VPORT_SW_MARKER, vport-&gt;flags);</div><div class='del'>-	wake_up(&amp;vport-&gt;sw_marker_wq);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * idpf_tx_clean_stashed_bufs - clean bufs that were stored for</div><div class='del'>- * out of order completions</div><div class='del'>- * @txq: queue to clean</div><div class='del'>- * @compl_tag: completion tag of packet to clean (from completion descriptor)</div><div class='del'>- * @cleaned: pointer to stats struct to track cleaned packets/bytes</div><div class='del'>- * @budget: Used to determine if we are in netpoll</div><div class='del'>- */</div><div class='del'>-static void idpf_tx_clean_stashed_bufs(struct idpf_tx_queue *txq,</div><div class='del'>-				       u16 compl_tag,</div><div class='del'>-				       struct libeth_sq_napi_stats *cleaned,</div><div class='del'>-				       int budget)</div><div class='del'>-{</div><div class='del'>-	struct idpf_tx_stash *stash;</div><div class='del'>-	struct hlist_node *tmp_buf;</div><div class='del'>-	struct libeth_cq_pp cp = {</div><div class='del'>-		.dev	= txq-&gt;dev,</div><div class='del'>-		.ss	= cleaned,</div><div class='del'>-		.napi	= budget,</div><div class='del'>-	};</div><div class='add'>+	tx_tstamp_caps = txq-&gt;cached_tstamp_caps;</div><div class='add'>+	spin_lock_bh(&amp;tx_tstamp_caps-&gt;status_lock);</div><div class='ctx'> </div><div class='del'>-	/* Buffer completion */</div><div class='del'>-	hash_for_each_possible_safe(txq-&gt;stash-&gt;sched_buf_hash, stash, tmp_buf,</div><div class='del'>-				    hlist, compl_tag) {</div><div class='del'>-		if (unlikely(idpf_tx_buf_compl_tag(&amp;stash-&gt;buf) != compl_tag))</div><div class='add'>+	for (u32 i = 0; i &lt; tx_tstamp_caps-&gt;num_entries; i++) {</div><div class='add'>+		tx_tstamp_status = &amp;tx_tstamp_caps-&gt;tx_tstamp_status[i];</div><div class='add'>+		if (tx_tstamp_status-&gt;state != IDPF_PTP_FREE)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		hash_del(&amp;stash-&gt;hlist);</div><div class='del'>-		libeth_tx_complete(&amp;stash-&gt;buf, &amp;cp);</div><div class='del'>-</div><div class='del'>-		/* Push shadow buf back onto stack */</div><div class='del'>-		idpf_buf_lifo_push(&amp;txq-&gt;stash-&gt;buf_stack, stash);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+		tx_tstamp_status-&gt;skb = skb;</div><div class='add'>+		tx_tstamp_status-&gt;state = IDPF_PTP_REQUEST;</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * idpf_stash_flow_sch_buffers - store buffer parameters info to be freed at a</div><div class='del'>- * later time (only relevant for flow scheduling mode)</div><div class='del'>- * @txq: Tx queue to clean</div><div class='del'>- * @tx_buf: buffer to store</div><div class='del'>- */</div><div class='del'>-static int idpf_stash_flow_sch_buffers(struct idpf_tx_queue *txq,</div><div class='del'>-				       struct idpf_tx_buf *tx_buf)</div><div class='del'>-{</div><div class='del'>-	struct idpf_tx_stash *stash;</div><div class='del'>-</div><div class='del'>-	if (unlikely(tx_buf-&gt;type &lt;= LIBETH_SQE_CTX))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	stash = idpf_buf_lifo_pop(&amp;txq-&gt;stash-&gt;buf_stack);</div><div class='del'>-	if (unlikely(!stash)) {</div><div class='del'>-		net_err_ratelimited("%s: No out-of-order TX buffers left!\n",</div><div class='del'>-				    netdev_name(txq-&gt;netdev));</div><div class='del'>-</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		/* Fetch timestamp from completion descriptor through</div><div class='add'>+		 * virtchnl msg to report to stack.</div><div class='add'>+		 */</div><div class='add'>+		queue_work(system_unbound_wq, txq-&gt;tstamp_task);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Store buffer params in shadow buffer */</div><div class='del'>-	stash-&gt;buf.skb = tx_buf-&gt;skb;</div><div class='del'>-	stash-&gt;buf.bytes = tx_buf-&gt;bytes;</div><div class='del'>-	stash-&gt;buf.packets = tx_buf-&gt;packets;</div><div class='del'>-	stash-&gt;buf.type = tx_buf-&gt;type;</div><div class='del'>-	stash-&gt;buf.nr_frags = tx_buf-&gt;nr_frags;</div><div class='del'>-	dma_unmap_addr_set(&amp;stash-&gt;buf, dma, dma_unmap_addr(tx_buf, dma));</div><div class='del'>-	dma_unmap_len_set(&amp;stash-&gt;buf, len, dma_unmap_len(tx_buf, len));</div><div class='del'>-	idpf_tx_buf_compl_tag(&amp;stash-&gt;buf) = idpf_tx_buf_compl_tag(tx_buf);</div><div class='del'>-</div><div class='del'>-	/* Add buffer to buf_hash table to be freed later */</div><div class='del'>-	hash_add(txq-&gt;stash-&gt;sched_buf_hash, &amp;stash-&gt;hlist,</div><div class='del'>-		 idpf_tx_buf_compl_tag(&amp;stash-&gt;buf));</div><div class='del'>-</div><div class='del'>-	tx_buf-&gt;type = LIBETH_SQE_EMPTY;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	spin_unlock_bh(&amp;tx_tstamp_caps-&gt;status_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define idpf_tx_splitq_clean_bump_ntc(txq, ntc, desc, buf)	\</div><div class='hunk'>@@ -1757,14 +2038,8 @@ do {								\</div><div class='ctx'>  * Separate packet completion events will be reported on the completion queue,</div><div class='ctx'>  * and the buffers will be cleaned separately. The stats are not updated from</div><div class='ctx'>  * this function when using flow-based scheduling.</div><div class='del'>- *</div><div class='del'>- * Furthermore, in flow scheduling mode, check to make sure there are enough</div><div class='del'>- * reserve buffers to stash the packet. If there are not, return early, which</div><div class='del'>- * will leave next_to_clean pointing to the packet that failed to be stashed.</div><div class='del'>- *</div><div class='del'>- * Return: false in the scenario above, true otherwise.</div><div class='ctx'>  */</div><div class='del'>-static bool idpf_tx_splitq_clean(struct idpf_tx_queue *tx_q, u16 end,</div><div class='add'>+static void idpf_tx_splitq_clean(struct idpf_tx_queue *tx_q, u16 end,</div><div class='ctx'> 				 int napi_budget,</div><div class='ctx'> 				 struct libeth_sq_napi_stats *cleaned,</div><div class='ctx'> 				 bool descs_only)</div><div class='hunk'>@@ -1778,7 +2053,12 @@ static bool idpf_tx_splitq_clean(struct idpf_tx_queue *tx_q, u16 end,</div><div class='ctx'> 		.napi	= napi_budget,</div><div class='ctx'> 	};</div><div class='ctx'> 	struct idpf_tx_buf *tx_buf;</div><div class='del'>-	bool clean_complete = true;</div><div class='add'>+</div><div class='add'>+	if (descs_only) {</div><div class='add'>+		/* Bump ring index to mark as cleaned. */</div><div class='add'>+		tx_q-&gt;next_to_clean = end;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	tx_desc = &amp;tx_q-&gt;flex_tx[ntc];</div><div class='ctx'> 	next_pending_desc = &amp;tx_q-&gt;flex_tx[end];</div><div class='hunk'>@@ -1798,132 +2078,61 @@ static bool idpf_tx_splitq_clean(struct idpf_tx_queue *tx_q, u16 end,</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		eop_idx = tx_buf-&gt;rs_idx;</div><div class='add'>+		libeth_tx_complete(tx_buf, &amp;cp);</div><div class='ctx'> </div><div class='del'>-		if (descs_only) {</div><div class='del'>-			if (IDPF_TX_BUF_RSV_UNUSED(tx_q) &lt; tx_buf-&gt;nr_frags) {</div><div class='del'>-				clean_complete = false;</div><div class='del'>-				goto tx_splitq_clean_out;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			idpf_stash_flow_sch_buffers(tx_q, tx_buf);</div><div class='add'>+		/* unmap remaining buffers */</div><div class='add'>+		while (ntc != eop_idx) {</div><div class='add'>+			idpf_tx_splitq_clean_bump_ntc(tx_q, ntc,</div><div class='add'>+						      tx_desc, tx_buf);</div><div class='ctx'> </div><div class='del'>-			while (ntc != eop_idx) {</div><div class='del'>-				idpf_tx_splitq_clean_bump_ntc(tx_q, ntc,</div><div class='del'>-							      tx_desc, tx_buf);</div><div class='del'>-				idpf_stash_flow_sch_buffers(tx_q, tx_buf);</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='add'>+			/* unmap any remaining paged data */</div><div class='ctx'> 			libeth_tx_complete(tx_buf, &amp;cp);</div><div class='del'>-</div><div class='del'>-			/* unmap remaining buffers */</div><div class='del'>-			while (ntc != eop_idx) {</div><div class='del'>-				idpf_tx_splitq_clean_bump_ntc(tx_q, ntc,</div><div class='del'>-							      tx_desc, tx_buf);</div><div class='del'>-</div><div class='del'>-				/* unmap any remaining paged data */</div><div class='del'>-				libeth_tx_complete(tx_buf, &amp;cp);</div><div class='del'>-			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> fetch_next_txq_desc:</div><div class='ctx'> 		idpf_tx_splitq_clean_bump_ntc(tx_q, ntc, tx_desc, tx_buf);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-tx_splitq_clean_out:</div><div class='ctx'> 	tx_q-&gt;next_to_clean = ntc;</div><div class='del'>-</div><div class='del'>-	return clean_complete;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define idpf_tx_clean_buf_ring_bump_ntc(txq, ntc, buf)	\</div><div class='del'>-do {							\</div><div class='del'>-	(buf)++;					\</div><div class='del'>-	(ntc)++;					\</div><div class='del'>-	if (unlikely((ntc) == (txq)-&gt;desc_count)) {	\</div><div class='del'>-		buf = (txq)-&gt;tx_buf;			\</div><div class='del'>-		ntc = 0;				\</div><div class='del'>-	}						\</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='ctx'> /**</div><div class='del'>- * idpf_tx_clean_buf_ring - clean flow scheduling TX queue buffers</div><div class='add'>+ * idpf_tx_clean_bufs - clean flow scheduling TX queue buffers</div><div class='ctx'>  * @txq: queue to clean</div><div class='del'>- * @compl_tag: completion tag of packet to clean (from completion descriptor)</div><div class='add'>+ * @buf_id: packet's starting buffer ID, from completion descriptor</div><div class='ctx'>  * @cleaned: pointer to stats struct to track cleaned packets/bytes</div><div class='ctx'>  * @budget: Used to determine if we are in netpoll</div><div class='ctx'>  *</div><div class='del'>- * Cleans all buffers associated with the input completion tag either from the</div><div class='del'>- * TX buffer ring or from the hash table if the buffers were previously</div><div class='del'>- * stashed. Returns the byte/segment count for the cleaned packet associated</div><div class='del'>- * this completion tag.</div><div class='add'>+ * Clean all buffers associated with the packet starting at buf_id. Returns the</div><div class='add'>+ * byte/segment count for the cleaned packet.</div><div class='ctx'>  */</div><div class='del'>-static bool idpf_tx_clean_buf_ring(struct idpf_tx_queue *txq, u16 compl_tag,</div><div class='del'>-				   struct libeth_sq_napi_stats *cleaned,</div><div class='del'>-				   int budget)</div><div class='add'>+static void idpf_tx_clean_bufs(struct idpf_tx_queue *txq, u32 buf_id,</div><div class='add'>+			       struct libeth_sq_napi_stats *cleaned,</div><div class='add'>+			       int budget)</div><div class='ctx'> {</div><div class='del'>-	u16 idx = compl_tag &amp; txq-&gt;compl_tag_bufid_m;</div><div class='ctx'> 	struct idpf_tx_buf *tx_buf = NULL;</div><div class='ctx'> 	struct libeth_cq_pp cp = {</div><div class='ctx'> 		.dev	= txq-&gt;dev,</div><div class='ctx'> 		.ss	= cleaned,</div><div class='ctx'> 		.napi	= budget,</div><div class='ctx'> 	};</div><div class='del'>-	u16 ntc, orig_idx = idx;</div><div class='ctx'> </div><div class='del'>-	tx_buf = &amp;txq-&gt;tx_buf[idx];</div><div class='add'>+	tx_buf = &amp;txq-&gt;tx_buf[buf_id];</div><div class='add'>+	if (tx_buf-&gt;type == LIBETH_SQE_SKB) {</div><div class='add'>+		if (skb_shinfo(tx_buf-&gt;skb)-&gt;tx_flags &amp; SKBTX_IN_PROGRESS)</div><div class='add'>+			idpf_tx_read_tstamp(txq, tx_buf-&gt;skb);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(tx_buf-&gt;type &lt;= LIBETH_SQE_CTX ||</div><div class='del'>-		     idpf_tx_buf_compl_tag(tx_buf) != compl_tag))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (tx_buf-&gt;type == LIBETH_SQE_SKB)</div><div class='ctx'> 		libeth_tx_complete(tx_buf, &amp;cp);</div><div class='add'>+		idpf_post_buf_refill(txq-&gt;refillq, buf_id);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	idpf_tx_clean_buf_ring_bump_ntc(txq, idx, tx_buf);</div><div class='add'>+	while (idpf_tx_buf_next(tx_buf) != IDPF_TXBUF_NULL) {</div><div class='add'>+		buf_id = idpf_tx_buf_next(tx_buf);</div><div class='ctx'> </div><div class='del'>-	while (idpf_tx_buf_compl_tag(tx_buf) == compl_tag) {</div><div class='add'>+		tx_buf = &amp;txq-&gt;tx_buf[buf_id];</div><div class='ctx'> 		libeth_tx_complete(tx_buf, &amp;cp);</div><div class='del'>-		idpf_tx_clean_buf_ring_bump_ntc(txq, idx, tx_buf);</div><div class='add'>+		idpf_post_buf_refill(txq-&gt;refillq, buf_id);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * It's possible the packet we just cleaned was an out of order</div><div class='del'>-	 * completion, which means we can stash the buffers starting from</div><div class='del'>-	 * the original next_to_clean and reuse the descriptors. We need</div><div class='del'>-	 * to compare the descriptor ring next_to_clean packet's "first" buffer</div><div class='del'>-	 * to the "first" buffer of the packet we just cleaned to determine if</div><div class='del'>-	 * this is the case. Howevever, next_to_clean can point to either a</div><div class='del'>-	 * reserved buffer that corresponds to a context descriptor used for the</div><div class='del'>-	 * next_to_clean packet (TSO packet) or the "first" buffer (single</div><div class='del'>-	 * packet). The orig_idx from the packet we just cleaned will always</div><div class='del'>-	 * point to the "first" buffer. If next_to_clean points to a reserved</div><div class='del'>-	 * buffer, let's bump ntc once and start the comparison from there.</div><div class='del'>-	 */</div><div class='del'>-	ntc = txq-&gt;next_to_clean;</div><div class='del'>-	tx_buf = &amp;txq-&gt;tx_buf[ntc];</div><div class='del'>-</div><div class='del'>-	if (tx_buf-&gt;type == LIBETH_SQE_CTX)</div><div class='del'>-		idpf_tx_clean_buf_ring_bump_ntc(txq, ntc, tx_buf);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If ntc still points to a different "first" buffer, clean the</div><div class='del'>-	 * descriptor ring and stash all of the buffers for later cleaning. If</div><div class='del'>-	 * we cannot stash all of the buffers, next_to_clean will point to the</div><div class='del'>-	 * "first" buffer of the packet that could not be stashed and cleaning</div><div class='del'>-	 * will start there next time.</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(tx_buf != &amp;txq-&gt;tx_buf[orig_idx] &amp;&amp;</div><div class='del'>-		     !idpf_tx_splitq_clean(txq, orig_idx, budget, cleaned,</div><div class='del'>-					   true)))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Otherwise, update next_to_clean to reflect the cleaning that was</div><div class='del'>-	 * done above.</div><div class='del'>-	 */</div><div class='del'>-	txq-&gt;next_to_clean = idx;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1942,22 +2151,17 @@ static void idpf_tx_handle_rs_completion(struct idpf_tx_queue *txq,</div><div class='ctx'> 					 struct libeth_sq_napi_stats *cleaned,</div><div class='ctx'> 					 int budget)</div><div class='ctx'> {</div><div class='del'>-	u16 compl_tag;</div><div class='add'>+	/* RS completion contains queue head for queue based scheduling or</div><div class='add'>+	 * completion tag for flow based scheduling.</div><div class='add'>+	 */</div><div class='add'>+	u16 rs_compl_val = le16_to_cpu(desc-&gt;common.q_head_compl_tag.q_head);</div><div class='ctx'> </div><div class='ctx'> 	if (!idpf_queue_has(FLOW_SCH_EN, txq)) {</div><div class='del'>-		u16 head = le16_to_cpu(desc-&gt;q_head_compl_tag.q_head);</div><div class='del'>-</div><div class='del'>-		idpf_tx_splitq_clean(txq, head, budget, cleaned, false);</div><div class='add'>+		idpf_tx_splitq_clean(txq, rs_compl_val, budget, cleaned, false);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	compl_tag = le16_to_cpu(desc-&gt;q_head_compl_tag.compl_tag);</div><div class='del'>-</div><div class='del'>-	/* If we didn't clean anything on the ring, this packet must be</div><div class='del'>-	 * in the hash table. Go clean it there.</div><div class='del'>-	 */</div><div class='del'>-	if (!idpf_tx_clean_buf_ring(txq, compl_tag, cleaned, budget))</div><div class='del'>-		idpf_tx_clean_stashed_bufs(txq, compl_tag, cleaned, budget);</div><div class='add'>+	idpf_tx_clean_bufs(txq, rs_compl_val, cleaned, budget);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1985,19 +2189,19 @@ static bool idpf_tx_clean_complq(struct idpf_compl_queue *complq, int budget,</div><div class='ctx'> 	do {</div><div class='ctx'> 		struct libeth_sq_napi_stats cleaned_stats = { };</div><div class='ctx'> 		struct idpf_tx_queue *tx_q;</div><div class='add'>+		__le16 hw_head;</div><div class='ctx'> 		int rel_tx_qid;</div><div class='del'>-		u16 hw_head;</div><div class='ctx'> 		u8 ctype;	/* completion type */</div><div class='ctx'> 		u16 gen;</div><div class='ctx'> </div><div class='ctx'> 		/* if the descriptor isn't done, no work yet to do */</div><div class='del'>-		gen = le16_get_bits(tx_desc-&gt;qid_comptype_gen,</div><div class='add'>+		gen = le16_get_bits(tx_desc-&gt;common.qid_comptype_gen,</div><div class='ctx'> 				    IDPF_TXD_COMPLQ_GEN_M);</div><div class='ctx'> 		if (idpf_queue_has(GEN_CHK, complq) != gen)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		/* Find necessary info of TX queue to clean buffers */</div><div class='del'>-		rel_tx_qid = le16_get_bits(tx_desc-&gt;qid_comptype_gen,</div><div class='add'>+		rel_tx_qid = le16_get_bits(tx_desc-&gt;common.qid_comptype_gen,</div><div class='ctx'> 					   IDPF_TXD_COMPLQ_QID_M);</div><div class='ctx'> 		if (rel_tx_qid &gt;= complq-&gt;txq_grp-&gt;num_txq ||</div><div class='ctx'> 		    !complq-&gt;txq_grp-&gt;txqs[rel_tx_qid]) {</div><div class='hunk'>@@ -2007,22 +2211,19 @@ static bool idpf_tx_clean_complq(struct idpf_compl_queue *complq, int budget,</div><div class='ctx'> 		tx_q = complq-&gt;txq_grp-&gt;txqs[rel_tx_qid];</div><div class='ctx'> </div><div class='ctx'> 		/* Determine completion type */</div><div class='del'>-		ctype = le16_get_bits(tx_desc-&gt;qid_comptype_gen,</div><div class='add'>+		ctype = le16_get_bits(tx_desc-&gt;common.qid_comptype_gen,</div><div class='ctx'> 				      IDPF_TXD_COMPLQ_COMPL_TYPE_M);</div><div class='ctx'> 		switch (ctype) {</div><div class='ctx'> 		case IDPF_TXD_COMPLT_RE:</div><div class='del'>-			hw_head = le16_to_cpu(tx_desc-&gt;q_head_compl_tag.q_head);</div><div class='add'>+			hw_head = tx_desc-&gt;common.q_head_compl_tag.q_head;</div><div class='ctx'> </div><div class='del'>-			idpf_tx_splitq_clean(tx_q, hw_head, budget,</div><div class='del'>-					     &amp;cleaned_stats, true);</div><div class='add'>+			idpf_tx_splitq_clean(tx_q, le16_to_cpu(hw_head),</div><div class='add'>+					     budget, &amp;cleaned_stats, true);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case IDPF_TXD_COMPLT_RS:</div><div class='ctx'> 			idpf_tx_handle_rs_completion(tx_q, tx_desc,</div><div class='ctx'> 						     &amp;cleaned_stats, budget);</div><div class='ctx'> 			break;</div><div class='del'>-		case IDPF_TXD_COMPLT_SW_MARKER:</div><div class='del'>-			idpf_tx_handle_sw_marker(tx_q);</div><div class='del'>-			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			netdev_err(tx_q-&gt;netdev,</div><div class='ctx'> 				   "Unknown TX completion type: %d\n", ctype);</div><div class='hunk'>@@ -2074,8 +2275,7 @@ fetch_next_desc:</div><div class='ctx'> 		/* Update BQL */</div><div class='ctx'> 		nq = netdev_get_tx_queue(tx_q-&gt;netdev, tx_q-&gt;idx);</div><div class='ctx'> </div><div class='del'>-		dont_wake = !complq_ok || IDPF_TX_BUF_RSV_LOW(tx_q) ||</div><div class='del'>-			    np-&gt;state != __IDPF_VPORT_UP ||</div><div class='add'>+		dont_wake = !complq_ok || !test_bit(IDPF_VPORT_UP, np-&gt;state) ||</div><div class='ctx'> 			    !netif_carrier_ok(tx_q-&gt;netdev);</div><div class='ctx'> 		/* Check if the TXQ needs to and can be restarted */</div><div class='ctx'> 		__netif_txq_completed_wake(nq, tx_q-&gt;cleaned_pkts, tx_q-&gt;cleaned_bytes,</div><div class='hunk'>@@ -2096,6 +2296,69 @@ fetch_next_desc:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * idpf_wait_for_sw_marker_completion - wait for SW marker of disabled Tx queue</div><div class='add'>+ * @txq: disabled Tx queue</div><div class='add'>+ *</div><div class='add'>+ * When Tx queue is requested for disabling, the CP sends a special completion</div><div class='add'>+ * descriptor called "SW marker", meaning the queue is ready to be destroyed.</div><div class='add'>+ * If, for some reason, the marker is not received within 500 ms, break the</div><div class='add'>+ * polling to not hang the driver.</div><div class='add'>+ */</div><div class='add'>+void idpf_wait_for_sw_marker_completion(const struct idpf_tx_queue *txq)</div><div class='add'>+{</div><div class='add'>+	struct idpf_compl_queue *complq;</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+	bool flow, gen_flag;</div><div class='add'>+	u32 ntc;</div><div class='add'>+</div><div class='add'>+	if (!idpf_queue_has(SW_MARKER, txq))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	complq = idpf_queue_has(XDP, txq) ? txq-&gt;complq : txq-&gt;txq_grp-&gt;complq;</div><div class='add'>+	ntc = complq-&gt;next_to_clean;</div><div class='add'>+</div><div class='add'>+	flow = idpf_queue_has(FLOW_SCH_EN, complq);</div><div class='add'>+	gen_flag = idpf_queue_has(GEN_CHK, complq);</div><div class='add'>+</div><div class='add'>+	timeout = jiffies + msecs_to_jiffies(IDPF_WAIT_FOR_MARKER_TIMEO);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		struct idpf_splitq_4b_tx_compl_desc *tx_desc;</div><div class='add'>+		struct idpf_tx_queue *target;</div><div class='add'>+		u32 ctype_gen, id;</div><div class='add'>+</div><div class='add'>+		tx_desc = flow ? &amp;complq-&gt;comp[ntc].common :</div><div class='add'>+			  &amp;complq-&gt;comp_4b[ntc];</div><div class='add'>+		ctype_gen = le16_to_cpu(tx_desc-&gt;qid_comptype_gen);</div><div class='add'>+</div><div class='add'>+		if (!!(ctype_gen &amp; IDPF_TXD_COMPLQ_GEN_M) != gen_flag) {</div><div class='add'>+			usleep_range(500, 1000);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (FIELD_GET(IDPF_TXD_COMPLQ_COMPL_TYPE_M, ctype_gen) !=</div><div class='add'>+		    IDPF_TXD_COMPLT_SW_MARKER)</div><div class='add'>+			goto next;</div><div class='add'>+</div><div class='add'>+		id = FIELD_GET(IDPF_TXD_COMPLQ_QID_M, ctype_gen);</div><div class='add'>+		target = complq-&gt;txq_grp-&gt;txqs[id];</div><div class='add'>+</div><div class='add'>+		idpf_queue_clear(SW_MARKER, target);</div><div class='add'>+		if (target == txq)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+next:</div><div class='add'>+		if (unlikely(++ntc == complq-&gt;desc_count)) {</div><div class='add'>+			ntc = 0;</div><div class='add'>+			gen_flag = !gen_flag;</div><div class='add'>+		}</div><div class='add'>+	} while (time_before(jiffies, timeout));</div><div class='add'>+</div><div class='add'>+	idpf_queue_assign(GEN_CHK, complq, gen_flag);</div><div class='add'>+	complq-&gt;next_to_clean = ntc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * idpf_tx_splitq_build_ctb - populate command tag and size for queue</div><div class='ctx'>  * based scheduling descriptors</div><div class='ctx'>  * @desc: descriptor to populate</div><div class='hunk'>@@ -2127,44 +2390,52 @@ void idpf_tx_splitq_build_flow_desc(union idpf_tx_flex_desc *desc,</div><div class='ctx'> 				    struct idpf_tx_splitq_params *params,</div><div class='ctx'> 				    u16 td_cmd, u16 size)</div><div class='ctx'> {</div><div class='del'>-	desc-&gt;flow.qw1.cmd_dtype = (u16)params-&gt;dtype | td_cmd;</div><div class='add'>+	*(u32 *)&amp;desc-&gt;flow.qw1.cmd_dtype = (u8)(params-&gt;dtype | td_cmd);</div><div class='ctx'> 	desc-&gt;flow.qw1.rxr_bufsize = cpu_to_le16((u16)size);</div><div class='ctx'> 	desc-&gt;flow.qw1.compl_tag = cpu_to_le16(params-&gt;compl_tag);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * idpf_tx_splitq_has_room - check if enough Tx splitq resources are available</div><div class='add'>+ * @tx_q: the queue to be checked</div><div class='add'>+ * @descs_needed: number of descriptors required for this packet</div><div class='add'>+ * @bufs_needed: number of Tx buffers required for this packet</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if no room available, 1 otherwise</div><div class='add'>+ */</div><div class='add'>+static int idpf_txq_has_room(struct idpf_tx_queue *tx_q, u32 descs_needed,</div><div class='add'>+			     u32 bufs_needed)</div><div class='add'>+{</div><div class='add'>+	if (IDPF_DESC_UNUSED(tx_q) &lt; descs_needed ||</div><div class='add'>+	    IDPF_TX_COMPLQ_PENDING(tx_q-&gt;txq_grp) &gt;</div><div class='add'>+		IDPF_TX_COMPLQ_OVERFLOW_THRESH(tx_q-&gt;txq_grp-&gt;complq) ||</div><div class='add'>+	    idpf_tx_splitq_get_free_bufs(tx_q-&gt;refillq) &lt; bufs_needed)</div><div class='add'>+		return 0;</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * idpf_tx_maybe_stop_splitq - 1st level check for Tx splitq stop conditions</div><div class='ctx'>  * @tx_q: the queue to be checked</div><div class='ctx'>  * @descs_needed: number of descriptors required for this packet</div><div class='add'>+ * @bufs_needed: number of buffers needed for this packet</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 if stop is not needed</div><div class='add'>+ * Return: 0 if stop is not needed</div><div class='ctx'>  */</div><div class='ctx'> static int idpf_tx_maybe_stop_splitq(struct idpf_tx_queue *tx_q,</div><div class='del'>-				     unsigned int descs_needed)</div><div class='add'>+				     u32 descs_needed,</div><div class='add'>+				     u32 bufs_needed)</div><div class='ctx'> {</div><div class='del'>-	if (idpf_tx_maybe_stop_common(tx_q, descs_needed))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/* If there are too many outstanding completions expected on the</div><div class='del'>-	 * completion queue, stop the TX queue to give the device some time to</div><div class='del'>-	 * catch up</div><div class='add'>+	/* Since we have multiple resources to check for splitq, our</div><div class='add'>+	 * start,stop_thrs becomes a boolean check instead of a count</div><div class='add'>+	 * threshold.</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely(IDPF_TX_COMPLQ_PENDING(tx_q-&gt;txq_grp) &gt;</div><div class='del'>-		     IDPF_TX_COMPLQ_OVERFLOW_THRESH(tx_q-&gt;txq_grp-&gt;complq)))</div><div class='del'>-		goto splitq_stop;</div><div class='del'>-</div><div class='del'>-	/* Also check for available book keeping buffers; if we are low, stop</div><div class='del'>-	 * the queue to wait for more completions</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(IDPF_TX_BUF_RSV_LOW(tx_q)))</div><div class='del'>-		goto splitq_stop;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-splitq_stop:</div><div class='del'>-	netif_stop_subqueue(tx_q-&gt;netdev, tx_q-&gt;idx);</div><div class='add'>+	if (netif_subqueue_maybe_stop(tx_q-&gt;netdev, tx_q-&gt;idx,</div><div class='add'>+				      idpf_txq_has_room(tx_q, descs_needed,</div><div class='add'>+							bufs_needed),</div><div class='add'>+				      1, 1))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='ctx'> 	u64_stats_update_begin(&amp;tx_q-&gt;stats_sync);</div><div class='ctx'> 	u64_stats_inc(&amp;tx_q-&gt;q_stats.q_busy);</div><div class='ctx'> 	u64_stats_update_end(&amp;tx_q-&gt;stats_sync);</div><div class='hunk'>@@ -2190,12 +2461,6 @@ void idpf_tx_buf_hw_update(struct idpf_tx_queue *tx_q, u32 val,</div><div class='ctx'> 	nq = netdev_get_tx_queue(tx_q-&gt;netdev, tx_q-&gt;idx);</div><div class='ctx'> 	tx_q-&gt;next_to_use = val;</div><div class='ctx'> </div><div class='del'>-	if (idpf_tx_maybe_stop_common(tx_q, IDPF_TX_DESC_NEEDED)) {</div><div class='del'>-		u64_stats_update_begin(&amp;tx_q-&gt;stats_sync);</div><div class='del'>-		u64_stats_inc(&amp;tx_q-&gt;q_stats.q_busy);</div><div class='del'>-		u64_stats_update_end(&amp;tx_q-&gt;stats_sync);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Force memory writes to complete before letting h/w</div><div class='ctx'> 	 * know there are new descriptors to fetch.  (Only</div><div class='ctx'> 	 * applicable for weak-ordered memory model archs,</div><div class='hunk'>@@ -2209,14 +2474,16 @@ void idpf_tx_buf_hw_update(struct idpf_tx_queue *tx_q, u32 val,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_tx_desc_count_required - calculate number of Tx descriptors needed</div><div class='add'>+ * idpf_tx_res_count_required - get number of Tx resources needed for this pkt</div><div class='ctx'>  * @txq: queue to send buffer on</div><div class='ctx'>  * @skb: send buffer</div><div class='add'>+ * @bufs_needed: (output) number of buffers needed for this skb.</div><div class='ctx'>  *</div><div class='del'>- * Returns number of data descriptors needed for this skb.</div><div class='add'>+ * Return: number of data descriptors and buffers needed for this skb.</div><div class='ctx'>  */</div><div class='del'>-unsigned int idpf_tx_desc_count_required(struct idpf_tx_queue *txq,</div><div class='del'>-					 struct sk_buff *skb)</div><div class='add'>+unsigned int idpf_tx_res_count_required(struct idpf_tx_queue *txq,</div><div class='add'>+					struct sk_buff *skb,</div><div class='add'>+					u32 *bufs_needed)</div><div class='ctx'> {</div><div class='ctx'> 	const struct skb_shared_info *shinfo;</div><div class='ctx'> 	unsigned int count = 0, i;</div><div class='hunk'>@@ -2227,6 +2494,7 @@ unsigned int idpf_tx_desc_count_required(struct idpf_tx_queue *txq,</div><div class='ctx'> 		return count;</div><div class='ctx'> </div><div class='ctx'> 	shinfo = skb_shinfo(skb);</div><div class='add'>+	*bufs_needed += shinfo-&gt;nr_frags;</div><div class='ctx'> 	for (i = 0; i &lt; shinfo-&gt;nr_frags; i++) {</div><div class='ctx'> 		unsigned int size;</div><div class='ctx'> </div><div class='hunk'>@@ -2256,71 +2524,89 @@ unsigned int idpf_tx_desc_count_required(struct idpf_tx_queue *txq,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_tx_dma_map_error - handle TX DMA map errors</div><div class='del'>- * @txq: queue to send buffer on</div><div class='del'>- * @skb: send buffer</div><div class='del'>- * @first: original first buffer info buffer for packet</div><div class='del'>- * @idx: starting point on ring to unwind</div><div class='add'>+ * idpf_tx_splitq_bump_ntu - adjust NTU and generation</div><div class='add'>+ * @txq: the tx ring to wrap</div><div class='add'>+ * @ntu: ring index to bump</div><div class='ctx'>  */</div><div class='del'>-void idpf_tx_dma_map_error(struct idpf_tx_queue *txq, struct sk_buff *skb,</div><div class='del'>-			   struct idpf_tx_buf *first, u16 idx)</div><div class='add'>+static unsigned int idpf_tx_splitq_bump_ntu(struct idpf_tx_queue *txq, u16 ntu)</div><div class='ctx'> {</div><div class='del'>-	struct libeth_sq_napi_stats ss = { };</div><div class='del'>-	struct libeth_cq_pp cp = {</div><div class='del'>-		.dev	= txq-&gt;dev,</div><div class='del'>-		.ss	= &amp;ss,</div><div class='del'>-	};</div><div class='add'>+	ntu++;</div><div class='ctx'> </div><div class='del'>-	u64_stats_update_begin(&amp;txq-&gt;stats_sync);</div><div class='del'>-	u64_stats_inc(&amp;txq-&gt;q_stats.dma_map_errs);</div><div class='del'>-	u64_stats_update_end(&amp;txq-&gt;stats_sync);</div><div class='add'>+	if (ntu == txq-&gt;desc_count)</div><div class='add'>+		ntu = 0;</div><div class='ctx'> </div><div class='del'>-	/* clear dma mappings for failed tx_buf map */</div><div class='del'>-	for (;;) {</div><div class='del'>-		struct idpf_tx_buf *tx_buf;</div><div class='add'>+	return ntu;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		tx_buf = &amp;txq-&gt;tx_buf[idx];</div><div class='del'>-		libeth_tx_complete(tx_buf, &amp;cp);</div><div class='del'>-		if (tx_buf == first)</div><div class='del'>-			break;</div><div class='del'>-		if (idx == 0)</div><div class='del'>-			idx = txq-&gt;desc_count;</div><div class='del'>-		idx--;</div><div class='del'>-	}</div><div class='add'>+/**</div><div class='add'>+ * idpf_tx_get_free_buf_id - get a free buffer ID from the refill queue</div><div class='add'>+ * @refillq: refill queue to get buffer ID from</div><div class='add'>+ * @buf_id: return buffer ID</div><div class='add'>+ *</div><div class='add'>+ * Return: true if a buffer ID was found, false if not</div><div class='add'>+ */</div><div class='add'>+static bool idpf_tx_get_free_buf_id(struct idpf_sw_queue *refillq,</div><div class='add'>+				    u32 *buf_id)</div><div class='add'>+{</div><div class='add'>+	u32 ntc = refillq-&gt;next_to_clean;</div><div class='add'>+	u32 refill_desc;</div><div class='ctx'> </div><div class='del'>-	if (skb_is_gso(skb)) {</div><div class='del'>-		union idpf_tx_flex_desc *tx_desc;</div><div class='add'>+	refill_desc = refillq-&gt;ring[ntc];</div><div class='ctx'> </div><div class='del'>-		/* If we failed a DMA mapping for a TSO packet, we will have</div><div class='del'>-		 * used one additional descriptor for a context</div><div class='del'>-		 * descriptor. Reset that here.</div><div class='del'>-		 */</div><div class='del'>-		tx_desc = &amp;txq-&gt;flex_tx[idx];</div><div class='del'>-		memset(tx_desc, 0, sizeof(struct idpf_flex_tx_ctx_desc));</div><div class='del'>-		if (idx == 0)</div><div class='del'>-			idx = txq-&gt;desc_count;</div><div class='del'>-		idx--;</div><div class='add'>+	if (unlikely(idpf_queue_has(RFL_GEN_CHK, refillq) !=</div><div class='add'>+		     !!(refill_desc &amp; IDPF_RFL_BI_GEN_M)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	*buf_id = FIELD_GET(IDPF_RFL_BI_BUFID_M, refill_desc);</div><div class='add'>+</div><div class='add'>+	if (unlikely(++ntc == refillq-&gt;desc_count)) {</div><div class='add'>+		idpf_queue_change(RFL_GEN_CHK, refillq);</div><div class='add'>+		ntc = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Update tail in case netdev_xmit_more was previously true */</div><div class='del'>-	idpf_tx_buf_hw_update(txq, idx, false);</div><div class='add'>+	refillq-&gt;next_to_clean = ntc;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_tx_splitq_bump_ntu - adjust NTU and generation</div><div class='del'>- * @txq: the tx ring to wrap</div><div class='del'>- * @ntu: ring index to bump</div><div class='add'>+ * idpf_tx_splitq_pkt_err_unmap - Unmap buffers and bump tail in case of error</div><div class='add'>+ * @txq: Tx queue to unwind</div><div class='add'>+ * @params: pointer to splitq params struct</div><div class='add'>+ * @first: starting buffer for packet to unmap</div><div class='ctx'>  */</div><div class='del'>-static unsigned int idpf_tx_splitq_bump_ntu(struct idpf_tx_queue *txq, u16 ntu)</div><div class='add'>+static void idpf_tx_splitq_pkt_err_unmap(struct idpf_tx_queue *txq,</div><div class='add'>+					 struct idpf_tx_splitq_params *params,</div><div class='add'>+					 struct idpf_tx_buf *first)</div><div class='ctx'> {</div><div class='del'>-	ntu++;</div><div class='add'>+	struct idpf_sw_queue *refillq = txq-&gt;refillq;</div><div class='add'>+	struct libeth_sq_napi_stats ss = { };</div><div class='add'>+	struct idpf_tx_buf *tx_buf = first;</div><div class='add'>+	struct libeth_cq_pp cp = {</div><div class='add'>+		.dev    = txq-&gt;dev,</div><div class='add'>+		.ss     = &amp;ss,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	if (ntu == txq-&gt;desc_count) {</div><div class='del'>-		ntu = 0;</div><div class='del'>-		txq-&gt;compl_tag_cur_gen = IDPF_TX_ADJ_COMPL_TAG_GEN(txq);</div><div class='add'>+	u64_stats_update_begin(&amp;txq-&gt;stats_sync);</div><div class='add'>+	u64_stats_inc(&amp;txq-&gt;q_stats.dma_map_errs);</div><div class='add'>+	u64_stats_update_end(&amp;txq-&gt;stats_sync);</div><div class='add'>+</div><div class='add'>+	libeth_tx_complete(tx_buf, &amp;cp);</div><div class='add'>+	while (idpf_tx_buf_next(tx_buf) != IDPF_TXBUF_NULL) {</div><div class='add'>+		tx_buf = &amp;txq-&gt;tx_buf[idpf_tx_buf_next(tx_buf)];</div><div class='add'>+		libeth_tx_complete(tx_buf, &amp;cp);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ntu;</div><div class='add'>+	/* Update tail in case netdev_xmit_more was previously true. */</div><div class='add'>+	idpf_tx_buf_hw_update(txq, params-&gt;prev_ntu, false);</div><div class='add'>+</div><div class='add'>+	if (!refillq)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Restore refillq state to avoid leaking tags. */</div><div class='add'>+	if (params-&gt;prev_refill_gen != idpf_queue_has(RFL_GEN_CHK, refillq))</div><div class='add'>+		idpf_queue_change(RFL_GEN_CHK, refillq);</div><div class='add'>+	refillq-&gt;next_to_clean = params-&gt;prev_refill_ntc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2344,6 +2630,7 @@ static void idpf_tx_splitq_map(struct idpf_tx_queue *tx_q,</div><div class='ctx'> 	struct netdev_queue *nq;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	skb_frag_t *frag;</div><div class='add'>+	u32 next_buf_id;</div><div class='ctx'> 	u16 td_cmd = 0;</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> </div><div class='hunk'>@@ -2361,17 +2648,16 @@ static void idpf_tx_splitq_map(struct idpf_tx_queue *tx_q,</div><div class='ctx'> 	tx_buf = first;</div><div class='ctx'> 	first-&gt;nr_frags = 0;</div><div class='ctx'> </div><div class='del'>-	params-&gt;compl_tag =</div><div class='del'>-		(tx_q-&gt;compl_tag_cur_gen &lt;&lt; tx_q-&gt;compl_tag_gen_s) | i;</div><div class='del'>-</div><div class='ctx'> 	for (frag = &amp;skb_shinfo(skb)-&gt;frags[0];; frag++) {</div><div class='ctx'> 		unsigned int max_data = IDPF_TX_MAX_DESC_DATA_ALIGNED;</div><div class='ctx'> </div><div class='del'>-		if (dma_mapping_error(tx_q-&gt;dev, dma))</div><div class='del'>-			return idpf_tx_dma_map_error(tx_q, skb, first, i);</div><div class='add'>+		if (unlikely(dma_mapping_error(tx_q-&gt;dev, dma))) {</div><div class='add'>+			idpf_tx_buf_next(tx_buf) = IDPF_TXBUF_NULL;</div><div class='add'>+			return idpf_tx_splitq_pkt_err_unmap(tx_q, params,</div><div class='add'>+							    first);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		first-&gt;nr_frags++;</div><div class='del'>-		idpf_tx_buf_compl_tag(tx_buf) = params-&gt;compl_tag;</div><div class='ctx'> 		tx_buf-&gt;type = LIBETH_SQE_FRAG;</div><div class='ctx'> </div><div class='ctx'> 		/* record length, and DMA address */</div><div class='hunk'>@@ -2427,28 +2713,12 @@ static void idpf_tx_splitq_map(struct idpf_tx_queue *tx_q,</div><div class='ctx'> 						  max_data);</div><div class='ctx'> </div><div class='ctx'> 			if (unlikely(++i == tx_q-&gt;desc_count)) {</div><div class='del'>-				tx_buf = tx_q-&gt;tx_buf;</div><div class='ctx'> 				tx_desc = &amp;tx_q-&gt;flex_tx[0];</div><div class='ctx'> 				i = 0;</div><div class='del'>-				tx_q-&gt;compl_tag_cur_gen =</div><div class='del'>-					IDPF_TX_ADJ_COMPL_TAG_GEN(tx_q);</div><div class='ctx'> 			} else {</div><div class='del'>-				tx_buf++;</div><div class='ctx'> 				tx_desc++;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			/* Since this packet has a buffer that is going to span</div><div class='del'>-			 * multiple descriptors, it's going to leave holes in</div><div class='del'>-			 * to the TX buffer ring. To ensure these holes do not</div><div class='del'>-			 * cause issues in the cleaning routines, we will clear</div><div class='del'>-			 * them of any stale data and assign them the same</div><div class='del'>-			 * completion tag as the current packet. Then when the</div><div class='del'>-			 * packet is being cleaned, the cleaning routines will</div><div class='del'>-			 * simply pass over these holes and finish cleaning the</div><div class='del'>-			 * rest of the packet.</div><div class='del'>-			 */</div><div class='del'>-			tx_buf-&gt;type = LIBETH_SQE_EMPTY;</div><div class='del'>-</div><div class='ctx'> 			/* Adjust the DMA offset and the remaining size of the</div><div class='ctx'> 			 * fragment.  On the first iteration of this loop,</div><div class='ctx'> 			 * max_data will be &gt;= 12K and &lt;= 16K-1.  On any</div><div class='hunk'>@@ -2473,15 +2743,25 @@ static void idpf_tx_splitq_map(struct idpf_tx_queue *tx_q,</div><div class='ctx'> 		idpf_tx_splitq_build_desc(tx_desc, params, td_cmd, size);</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(++i == tx_q-&gt;desc_count)) {</div><div class='del'>-			tx_buf = tx_q-&gt;tx_buf;</div><div class='ctx'> 			tx_desc = &amp;tx_q-&gt;flex_tx[0];</div><div class='ctx'> 			i = 0;</div><div class='del'>-			tx_q-&gt;compl_tag_cur_gen = IDPF_TX_ADJ_COMPL_TAG_GEN(tx_q);</div><div class='ctx'> 		} else {</div><div class='del'>-			tx_buf++;</div><div class='ctx'> 			tx_desc++;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (idpf_queue_has(FLOW_SCH_EN, tx_q)) {</div><div class='add'>+			if (unlikely(!idpf_tx_get_free_buf_id(tx_q-&gt;refillq,</div><div class='add'>+							      &amp;next_buf_id))) {</div><div class='add'>+				idpf_tx_buf_next(tx_buf) = IDPF_TXBUF_NULL;</div><div class='add'>+				return idpf_tx_splitq_pkt_err_unmap(tx_q, params,</div><div class='add'>+								    first);</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			next_buf_id = i;</div><div class='add'>+		}</div><div class='add'>+		idpf_tx_buf_next(tx_buf) = next_buf_id;</div><div class='add'>+		tx_buf = &amp;tx_q-&gt;tx_buf[next_buf_id];</div><div class='add'>+</div><div class='ctx'> 		size = skb_frag_size(frag);</div><div class='ctx'> 		data_len -= size;</div><div class='ctx'> </div><div class='hunk'>@@ -2496,6 +2776,7 @@ static void idpf_tx_splitq_map(struct idpf_tx_queue *tx_q,</div><div class='ctx'> </div><div class='ctx'> 	/* write last descriptor with RS and EOP bits */</div><div class='ctx'> 	first-&gt;rs_idx = i;</div><div class='add'>+	idpf_tx_buf_next(tx_buf) = IDPF_TXBUF_NULL;</div><div class='ctx'> 	td_cmd |= params-&gt;eop_cmd;</div><div class='ctx'> 	idpf_tx_splitq_build_desc(tx_desc, params, td_cmd, size);</div><div class='ctx'> 	i = idpf_tx_splitq_bump_ntu(tx_q, i);</div><div class='hunk'>@@ -2585,111 +2866,6 @@ int idpf_tso(struct sk_buff *skb, struct idpf_tx_offload_params *off)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * __idpf_chk_linearize - Check skb is not using too many buffers</div><div class='del'>- * @skb: send buffer</div><div class='del'>- * @max_bufs: maximum number of buffers</div><div class='del'>- *</div><div class='del'>- * For TSO we need to count the TSO header and segment payload separately.  As</div><div class='del'>- * such we need to check cases where we have max_bufs-1 fragments or more as we</div><div class='del'>- * can potentially require max_bufs+1 DMA transactions, 1 for the TSO header, 1</div><div class='del'>- * for the segment payload in the first descriptor, and another max_buf-1 for</div><div class='del'>- * the fragments.</div><div class='del'>- */</div><div class='del'>-static bool __idpf_chk_linearize(struct sk_buff *skb, unsigned int max_bufs)</div><div class='del'>-{</div><div class='del'>-	const struct skb_shared_info *shinfo = skb_shinfo(skb);</div><div class='del'>-	const skb_frag_t *frag, *stale;</div><div class='del'>-	int nr_frags, sum;</div><div class='del'>-</div><div class='del'>-	/* no need to check if number of frags is less than max_bufs - 1 */</div><div class='del'>-	nr_frags = shinfo-&gt;nr_frags;</div><div class='del'>-	if (nr_frags &lt; (max_bufs - 1))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	/* We need to walk through the list and validate that each group</div><div class='del'>-	 * of max_bufs-2 fragments totals at least gso_size.</div><div class='del'>-	 */</div><div class='del'>-	nr_frags -= max_bufs - 2;</div><div class='del'>-	frag = &amp;shinfo-&gt;frags[0];</div><div class='del'>-</div><div class='del'>-	/* Initialize size to the negative value of gso_size minus 1.  We use</div><div class='del'>-	 * this as the worst case scenario in which the frag ahead of us only</div><div class='del'>-	 * provides one byte which is why we are limited to max_bufs-2</div><div class='del'>-	 * descriptors for a single transmit as the header and previous</div><div class='del'>-	 * fragment are already consuming 2 descriptors.</div><div class='del'>-	 */</div><div class='del'>-	sum = 1 - shinfo-&gt;gso_size;</div><div class='del'>-</div><div class='del'>-	/* Add size of frags 0 through 4 to create our initial sum */</div><div class='del'>-	sum += skb_frag_size(frag++);</div><div class='del'>-	sum += skb_frag_size(frag++);</div><div class='del'>-	sum += skb_frag_size(frag++);</div><div class='del'>-	sum += skb_frag_size(frag++);</div><div class='del'>-	sum += skb_frag_size(frag++);</div><div class='del'>-</div><div class='del'>-	/* Walk through fragments adding latest fragment, testing it, and</div><div class='del'>-	 * then removing stale fragments from the sum.</div><div class='del'>-	 */</div><div class='del'>-	for (stale = &amp;shinfo-&gt;frags[0];; stale++) {</div><div class='del'>-		int stale_size = skb_frag_size(stale);</div><div class='del'>-</div><div class='del'>-		sum += skb_frag_size(frag++);</div><div class='del'>-</div><div class='del'>-		/* The stale fragment may present us with a smaller</div><div class='del'>-		 * descriptor than the actual fragment size. To account</div><div class='del'>-		 * for that we need to remove all the data on the front and</div><div class='del'>-		 * figure out what the remainder would be in the last</div><div class='del'>-		 * descriptor associated with the fragment.</div><div class='del'>-		 */</div><div class='del'>-		if (stale_size &gt; IDPF_TX_MAX_DESC_DATA) {</div><div class='del'>-			int align_pad = -(skb_frag_off(stale)) &amp;</div><div class='del'>-					(IDPF_TX_MAX_READ_REQ_SIZE - 1);</div><div class='del'>-</div><div class='del'>-			sum -= align_pad;</div><div class='del'>-			stale_size -= align_pad;</div><div class='del'>-</div><div class='del'>-			do {</div><div class='del'>-				sum -= IDPF_TX_MAX_DESC_DATA_ALIGNED;</div><div class='del'>-				stale_size -= IDPF_TX_MAX_DESC_DATA_ALIGNED;</div><div class='del'>-			} while (stale_size &gt; IDPF_TX_MAX_DESC_DATA);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* if sum is negative we failed to make sufficient progress */</div><div class='del'>-		if (sum &lt; 0)</div><div class='del'>-			return true;</div><div class='del'>-</div><div class='del'>-		if (!nr_frags--)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		sum -= stale_size;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * idpf_chk_linearize - Check if skb exceeds max descriptors per packet</div><div class='del'>- * @skb: send buffer</div><div class='del'>- * @max_bufs: maximum scatter gather buffers for single packet</div><div class='del'>- * @count: number of buffers this packet needs</div><div class='del'>- *</div><div class='del'>- * Make sure we don't exceed maximum scatter gather buffers for a single</div><div class='del'>- * packet. We have to do some special checking around the boundary (max_bufs-1)</div><div class='del'>- * if TSO is on since we need count the TSO header and payload separately.</div><div class='del'>- * E.g.: a packet with 7 fragments can require 9 DMA transactions; 1 for TSO</div><div class='del'>- * header, 1 for segment payload, and then 7 for the fragments.</div><div class='del'>- */</div><div class='del'>-static bool idpf_chk_linearize(struct sk_buff *skb, unsigned int max_bufs,</div><div class='del'>-			       unsigned int count)</div><div class='del'>-{</div><div class='del'>-	if (likely(count &lt; max_bufs))</div><div class='del'>-		return false;</div><div class='del'>-	if (skb_is_gso(skb))</div><div class='del'>-		return __idpf_chk_linearize(skb, max_bufs);</div><div class='del'>-</div><div class='del'>-	return count &gt; max_bufs;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * idpf_tx_splitq_get_ctx_desc - grab next desc and update buffer ring</div><div class='hunk'>@@ -2698,14 +2874,12 @@ static bool idpf_chk_linearize(struct sk_buff *skb, unsigned int max_bufs,</div><div class='ctx'>  * Since the TX buffer rings mimics the descriptor ring, update the tx buffer</div><div class='ctx'>  * ring entry to reflect that this index is a context descriptor</div><div class='ctx'>  */</div><div class='del'>-static struct idpf_flex_tx_ctx_desc *</div><div class='add'>+static union idpf_flex_tx_ctx_desc *</div><div class='ctx'> idpf_tx_splitq_get_ctx_desc(struct idpf_tx_queue *txq)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_flex_tx_ctx_desc *desc;</div><div class='add'>+	union idpf_flex_tx_ctx_desc *desc;</div><div class='ctx'> 	int i = txq-&gt;next_to_use;</div><div class='ctx'> </div><div class='del'>-	txq-&gt;tx_buf[i].type = LIBETH_SQE_CTX;</div><div class='del'>-</div><div class='ctx'> 	/* grab the next descriptor */</div><div class='ctx'> 	desc = &amp;txq-&gt;flex_ctx[i];</div><div class='ctx'> 	txq-&gt;next_to_use = idpf_tx_splitq_bump_ntu(txq, i);</div><div class='hunk'>@@ -2731,6 +2905,88 @@ netdev_tx_t idpf_tx_drop_skb(struct idpf_tx_queue *tx_q, struct sk_buff *skb)</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if (IS_ENABLED(CONFIG_PTP_1588_CLOCK))</div><div class='add'>+/**</div><div class='add'>+ * idpf_tx_tstamp - set up context descriptor for hardware timestamp</div><div class='add'>+ * @tx_q: queue to send buffer on</div><div class='add'>+ * @skb: pointer to the SKB we're sending</div><div class='add'>+ * @off: pointer to the offload struct</div><div class='add'>+ *</div><div class='add'>+ * Return: Positive index number on success, negative otherwise.</div><div class='add'>+ */</div><div class='add'>+static int idpf_tx_tstamp(struct idpf_tx_queue *tx_q, struct sk_buff *skb,</div><div class='add'>+			  struct idpf_tx_offload_params *off)</div><div class='add'>+{</div><div class='add'>+	int err, idx;</div><div class='add'>+</div><div class='add'>+	/* only timestamp the outbound packet if the user has requested it */</div><div class='add'>+	if (likely(!(skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP)))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (!idpf_ptp_get_txq_tstamp_capability(tx_q))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/* Tx timestamps cannot be sampled when doing TSO */</div><div class='add'>+	if (off-&gt;tx_flags &amp; IDPF_TX_FLAGS_TSO)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/* Grab an open timestamp slot */</div><div class='add'>+	err = idpf_ptp_request_ts(tx_q, skb, &amp;idx);</div><div class='add'>+	if (err) {</div><div class='add'>+		u64_stats_update_begin(&amp;tx_q-&gt;stats_sync);</div><div class='add'>+		u64_stats_inc(&amp;tx_q-&gt;q_stats.tstamp_skipped);</div><div class='add'>+		u64_stats_update_end(&amp;tx_q-&gt;stats_sync);</div><div class='add'>+</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	off-&gt;tx_flags |= IDPF_TX_FLAGS_TSYN;</div><div class='add'>+</div><div class='add'>+	return idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_tx_set_tstamp_desc - Set the Tx descriptor fields needed to generate</div><div class='add'>+ *			     PHY Tx timestamp</div><div class='add'>+ * @ctx_desc: Context descriptor</div><div class='add'>+ * @idx: Index of the Tx timestamp latch</div><div class='add'>+ */</div><div class='add'>+static void idpf_tx_set_tstamp_desc(union idpf_flex_tx_ctx_desc *ctx_desc,</div><div class='add'>+				    u32 idx)</div><div class='add'>+{</div><div class='add'>+	ctx_desc-&gt;tsyn.qw1 = le64_encode_bits(IDPF_TX_DESC_DTYPE_CTX,</div><div class='add'>+					      IDPF_TX_CTX_DTYPE_M) |</div><div class='add'>+			     le64_encode_bits(IDPF_TX_CTX_DESC_TSYN,</div><div class='add'>+					      IDPF_TX_CTX_CMD_M) |</div><div class='add'>+			     le64_encode_bits(idx, IDPF_TX_CTX_TSYN_REG_M);</div><div class='add'>+}</div><div class='add'>+#else /* CONFIG_PTP_1588_CLOCK */</div><div class='add'>+static int idpf_tx_tstamp(struct idpf_tx_queue *tx_q, struct sk_buff *skb,</div><div class='add'>+			  struct idpf_tx_offload_params *off)</div><div class='add'>+{</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_tx_set_tstamp_desc(union idpf_flex_tx_ctx_desc *ctx_desc,</div><div class='add'>+				    u32 idx)</div><div class='add'>+{ }</div><div class='add'>+#endif /* CONFIG_PTP_1588_CLOCK */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_tx_splitq_need_re - check whether RE bit needs to be set</div><div class='add'>+ * @tx_q: pointer to Tx queue</div><div class='add'>+ *</div><div class='add'>+ * Return: true if RE bit needs to be set, false otherwise</div><div class='add'>+ */</div><div class='add'>+static bool idpf_tx_splitq_need_re(struct idpf_tx_queue *tx_q)</div><div class='add'>+{</div><div class='add'>+	int gap = tx_q-&gt;next_to_use - tx_q-&gt;last_re;</div><div class='add'>+</div><div class='add'>+	gap += (gap &lt; 0) ? tx_q-&gt;desc_count : 0;</div><div class='add'>+</div><div class='add'>+	return gap &gt;= IDPF_TX_SPLITQ_RE_MIN_GAP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_tx_splitq_frame - Sends buffer on Tx ring using flex descriptors</div><div class='ctx'>  * @skb: send buffer</div><div class='hunk'>@@ -2741,12 +2997,16 @@ netdev_tx_t idpf_tx_drop_skb(struct idpf_tx_queue *tx_q, struct sk_buff *skb)</div><div class='ctx'> static netdev_tx_t idpf_tx_splitq_frame(struct sk_buff *skb,</div><div class='ctx'> 					struct idpf_tx_queue *tx_q)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_tx_splitq_params tx_params = { };</div><div class='add'>+	struct idpf_tx_splitq_params tx_params = {</div><div class='add'>+		.prev_ntu = tx_q-&gt;next_to_use,</div><div class='add'>+	};</div><div class='add'>+	union idpf_flex_tx_ctx_desc *ctx_desc;</div><div class='ctx'> 	struct idpf_tx_buf *first;</div><div class='del'>-	unsigned int count;</div><div class='del'>-	int tso;</div><div class='add'>+	u32 count, buf_count = 1;</div><div class='add'>+	int tso, idx;</div><div class='add'>+	u32 buf_id;</div><div class='ctx'> </div><div class='del'>-	count = idpf_tx_desc_count_required(tx_q, skb);</div><div class='add'>+	count = idpf_tx_res_count_required(tx_q, skb, &amp;buf_count);</div><div class='ctx'> 	if (unlikely(!count))</div><div class='ctx'> 		return idpf_tx_drop_skb(tx_q, skb);</div><div class='ctx'> </div><div class='hunk'>@@ -2756,7 +3016,7 @@ static netdev_tx_t idpf_tx_splitq_frame(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	/* Check for splitq specific TX resources */</div><div class='ctx'> 	count += (IDPF_TX_DESCS_PER_CACHE_LINE + tso);</div><div class='del'>-	if (idpf_tx_maybe_stop_splitq(tx_q, count)) {</div><div class='add'>+	if (idpf_tx_maybe_stop_splitq(tx_q, count, buf_count)) {</div><div class='ctx'> 		idpf_tx_buf_hw_update(tx_q, tx_q-&gt;next_to_use, false);</div><div class='ctx'> </div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='hunk'>@@ -2764,8 +3024,7 @@ static netdev_tx_t idpf_tx_splitq_frame(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	if (tso) {</div><div class='ctx'> 		/* If tso is needed, set up context desc */</div><div class='del'>-		struct idpf_flex_tx_ctx_desc *ctx_desc =</div><div class='del'>-			idpf_tx_splitq_get_ctx_desc(tx_q);</div><div class='add'>+		ctx_desc = idpf_tx_splitq_get_ctx_desc(tx_q);</div><div class='ctx'> </div><div class='ctx'> 		ctx_desc-&gt;tso.qw1.cmd_dtype =</div><div class='ctx'> 				cpu_to_le16(IDPF_TX_DESC_DTYPE_FLEX_TSO_CTX |</div><div class='hunk'>@@ -2783,36 +3042,53 @@ static netdev_tx_t idpf_tx_splitq_frame(struct sk_buff *skb,</div><div class='ctx'> 		u64_stats_update_end(&amp;tx_q-&gt;stats_sync);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* record the location of the first descriptor for this packet */</div><div class='del'>-	first = &amp;tx_q-&gt;tx_buf[tx_q-&gt;next_to_use];</div><div class='del'>-	first-&gt;skb = skb;</div><div class='del'>-</div><div class='del'>-	if (tso) {</div><div class='del'>-		first-&gt;packets = tx_params.offload.tso_segs;</div><div class='del'>-		first-&gt;bytes = skb-&gt;len +</div><div class='del'>-			((first-&gt;packets - 1) * tx_params.offload.tso_hdr_len);</div><div class='del'>-	} else {</div><div class='del'>-		first-&gt;packets = 1;</div><div class='del'>-		first-&gt;bytes = max_t(unsigned int, skb-&gt;len, ETH_ZLEN);</div><div class='add'>+	idx = idpf_tx_tstamp(tx_q, skb, &amp;tx_params.offload);</div><div class='add'>+	if (idx != -1) {</div><div class='add'>+		ctx_desc = idpf_tx_splitq_get_ctx_desc(tx_q);</div><div class='add'>+		idpf_tx_set_tstamp_desc(ctx_desc, idx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (idpf_queue_has(FLOW_SCH_EN, tx_q)) {</div><div class='add'>+		struct idpf_sw_queue *refillq = tx_q-&gt;refillq;</div><div class='add'>+</div><div class='add'>+		/* Save refillq state in case of a packet rollback.  Otherwise,</div><div class='add'>+		 * the tags will be leaked since they will be popped from the</div><div class='add'>+		 * refillq but never reposted during cleaning.</div><div class='add'>+		 */</div><div class='add'>+		tx_params.prev_refill_gen =</div><div class='add'>+			idpf_queue_has(RFL_GEN_CHK, refillq);</div><div class='add'>+		tx_params.prev_refill_ntc = refillq-&gt;next_to_clean;</div><div class='add'>+</div><div class='add'>+		if (unlikely(!idpf_tx_get_free_buf_id(tx_q-&gt;refillq,</div><div class='add'>+						      &amp;buf_id))) {</div><div class='add'>+			if (tx_params.prev_refill_gen !=</div><div class='add'>+			    idpf_queue_has(RFL_GEN_CHK, refillq))</div><div class='add'>+				idpf_queue_change(RFL_GEN_CHK, refillq);</div><div class='add'>+			refillq-&gt;next_to_clean = tx_params.prev_refill_ntc;</div><div class='add'>+</div><div class='add'>+			tx_q-&gt;next_to_use = tx_params.prev_ntu;</div><div class='add'>+			return idpf_tx_drop_skb(tx_q, skb);</div><div class='add'>+		}</div><div class='add'>+		tx_params.compl_tag = buf_id;</div><div class='add'>+</div><div class='ctx'> 		tx_params.dtype = IDPF_TX_DESC_DTYPE_FLEX_FLOW_SCHE;</div><div class='ctx'> 		tx_params.eop_cmd = IDPF_TXD_FLEX_FLOW_CMD_EOP;</div><div class='del'>-		/* Set the RE bit to catch any packets that may have not been</div><div class='del'>-		 * stashed during RS completion cleaning. MIN_GAP is set to</div><div class='del'>-		 * MIN_RING size to ensure it will be set at least once each</div><div class='del'>-		 * time around the ring.</div><div class='add'>+		/* Set the RE bit to periodically "clean" the descriptor ring.</div><div class='add'>+		 * MIN_GAP is set to MIN_RING size to ensure it will be set at</div><div class='add'>+		 * least once each time around the ring.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!(tx_q-&gt;next_to_use % IDPF_TX_SPLITQ_RE_MIN_GAP)) {</div><div class='add'>+		if (idpf_tx_splitq_need_re(tx_q)) {</div><div class='ctx'> 			tx_params.eop_cmd |= IDPF_TXD_FLEX_FLOW_CMD_RE;</div><div class='ctx'> 			tx_q-&gt;txq_grp-&gt;num_completions_pending++;</div><div class='add'>+			tx_q-&gt;last_re = tx_q-&gt;next_to_use;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (skb-&gt;ip_summed == CHECKSUM_PARTIAL)</div><div class='ctx'> 			tx_params.offload.td_cmd |= IDPF_TXD_FLEX_FLOW_CMD_CS_EN;</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='add'>+		buf_id = tx_q-&gt;next_to_use;</div><div class='add'>+</div><div class='ctx'> 		tx_params.dtype = IDPF_TX_DESC_DTYPE_FLEX_L2TAG1_L2TAG2;</div><div class='ctx'> 		tx_params.eop_cmd = IDPF_TXD_LAST_DESC_CMD;</div><div class='ctx'> </div><div class='hunk'>@@ -2820,6 +3096,18 @@ static netdev_tx_t idpf_tx_splitq_frame(struct sk_buff *skb,</div><div class='ctx'> 			tx_params.offload.td_cmd |= IDPF_TX_FLEX_DESC_CMD_CS_EN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	first = &amp;tx_q-&gt;tx_buf[buf_id];</div><div class='add'>+	first-&gt;skb = skb;</div><div class='add'>+</div><div class='add'>+	if (tso) {</div><div class='add'>+		first-&gt;packets = tx_params.offload.tso_segs;</div><div class='add'>+		first-&gt;bytes = skb-&gt;len +</div><div class='add'>+			((first-&gt;packets - 1) * tx_params.offload.tso_hdr_len);</div><div class='add'>+	} else {</div><div class='add'>+		first-&gt;packets = 1;</div><div class='add'>+		first-&gt;bytes = max_t(unsigned int, skb-&gt;len, ETH_ZLEN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	idpf_tx_splitq_map(tx_q, &amp;tx_params, first);</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='hunk'>@@ -2834,10 +3122,11 @@ static netdev_tx_t idpf_tx_splitq_frame(struct sk_buff *skb,</div><div class='ctx'>  */</div><div class='ctx'> netdev_tx_t idpf_tx_start(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_vport *vport = idpf_netdev_to_vport(netdev);</div><div class='add'>+	const struct idpf_vport *vport = idpf_netdev_to_vport(netdev);</div><div class='ctx'> 	struct idpf_tx_queue *tx_q;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(skb_get_queue_mapping(skb) &gt;= vport-&gt;num_txq)) {</div><div class='add'>+	if (unlikely(skb_get_queue_mapping(skb) &gt;=</div><div class='add'>+		     vport-&gt;num_txq - vport-&gt;num_xdp_txq)) {</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='ctx'> </div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='hunk'>@@ -2874,7 +3163,7 @@ idpf_rx_hash(const struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='ctx'> {</div><div class='ctx'> 	u32 hash;</div><div class='ctx'> </div><div class='del'>-	if (!libeth_rx_pt_has_hash(rxq-&gt;netdev, decoded))</div><div class='add'>+	if (!libeth_rx_pt_has_hash(rxq-&gt;xdp_rxq.dev, decoded))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	hash = le16_to_cpu(rx_desc-&gt;hash1) |</div><div class='hunk'>@@ -2894,13 +3183,13 @@ idpf_rx_hash(const struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='ctx'>  * skb-&gt;protocol must be set before this function is called</div><div class='ctx'>  */</div><div class='ctx'> static void idpf_rx_csum(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='del'>-			 struct idpf_rx_csum_decoded csum_bits,</div><div class='add'>+			 struct libeth_rx_csum csum_bits,</div><div class='ctx'> 			 struct libeth_rx_pt decoded)</div><div class='ctx'> {</div><div class='ctx'> 	bool ipv4, ipv6;</div><div class='ctx'> </div><div class='ctx'> 	/* check if Rx checksum is enabled */</div><div class='del'>-	if (!libeth_rx_pt_has_checksum(rxq-&gt;netdev, decoded))</div><div class='add'>+	if (!libeth_rx_pt_has_checksum(rxq-&gt;xdp_rxq.dev, decoded))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* check if HW has decoded the packet and checksum */</div><div class='hunk'>@@ -2922,7 +3211,7 @@ static void idpf_rx_csum(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='ctx'> 	if (unlikely(csum_bits.l4e))</div><div class='ctx'> 		goto checksum_fail;</div><div class='ctx'> </div><div class='del'>-	if (csum_bits.raw_csum_inv ||</div><div class='add'>+	if (!csum_bits.raw_csum_valid ||</div><div class='ctx'> 	    decoded.inner_prot == LIBETH_RX_PT_INNER_SCTP) {</div><div class='ctx'> 		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2945,10 +3234,10 @@ checksum_fail:</div><div class='ctx'>  *</div><div class='ctx'>  * Return: parsed checksum status.</div><div class='ctx'>  **/</div><div class='del'>-static struct idpf_rx_csum_decoded</div><div class='add'>+static struct libeth_rx_csum</div><div class='ctx'> idpf_rx_splitq_extract_csum_bits(const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_rx_csum_decoded csum = { };</div><div class='add'>+	struct libeth_rx_csum csum = { };</div><div class='ctx'> 	u8 qword0, qword1;</div><div class='ctx'> </div><div class='ctx'> 	qword0 = rx_desc-&gt;status_err0_qw0;</div><div class='hunk'>@@ -2964,9 +3253,9 @@ idpf_rx_splitq_extract_csum_bits(const struct virtchnl2_rx_flex_desc_adv_nic_3 *</div><div class='ctx'> 			       qword1);</div><div class='ctx'> 	csum.ipv6exadd = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_IPV6EXADD_M,</div><div class='ctx'> 				   qword0);</div><div class='del'>-	csum.raw_csum_inv =</div><div class='del'>-		le16_get_bits(rx_desc-&gt;ptype_err_fflags0,</div><div class='del'>-			      VIRTCHNL2_RX_FLEX_DESC_ADV_RAW_CSUM_INV_M);</div><div class='add'>+	csum.raw_csum_valid =</div><div class='add'>+		!le16_get_bits(rx_desc-&gt;ptype_err_fflags0,</div><div class='add'>+			       VIRTCHNL2_RX_FLEX_DESC_ADV_RAW_CSUM_INV_M);</div><div class='ctx'> 	csum.raw_csum = le16_to_cpu(rx_desc-&gt;misc.raw_cs);</div><div class='ctx'> </div><div class='ctx'> 	return csum;</div><div class='hunk'>@@ -3007,14 +3296,11 @@ static int idpf_rx_rsc(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	rsc_segments = DIV_ROUND_UP(skb-&gt;data_len, rsc_seg_len);</div><div class='del'>-	if (unlikely(rsc_segments == 1))</div><div class='del'>-		return 0;</div><div class='ctx'> </div><div class='ctx'> 	NAPI_GRO_CB(skb)-&gt;count = rsc_segments;</div><div class='ctx'> 	skb_shinfo(skb)-&gt;gso_size = rsc_seg_len;</div><div class='ctx'> </div><div class='ctx'> 	skb_reset_network_header(skb);</div><div class='del'>-	len = skb-&gt;len - skb_transport_offset(skb);</div><div class='ctx'> </div><div class='ctx'> 	if (ipv4) {</div><div class='ctx'> 		struct iphdr *ipv4h = ip_hdr(skb);</div><div class='hunk'>@@ -3023,6 +3309,7 @@ static int idpf_rx_rsc(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 		/* Reset and set transport header offset in skb */</div><div class='ctx'> 		skb_set_transport_header(skb, sizeof(struct iphdr));</div><div class='add'>+		len = skb-&gt;len - skb_transport_offset(skb);</div><div class='ctx'> </div><div class='ctx'> 		/* Compute the TCP pseudo header checksum*/</div><div class='ctx'> 		tcp_hdr(skb)-&gt;check =</div><div class='hunk'>@@ -3032,6 +3319,7 @@ static int idpf_rx_rsc(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 		skb_shinfo(skb)-&gt;gso_type = SKB_GSO_TCPV6;</div><div class='ctx'> 		skb_set_transport_header(skb, sizeof(struct ipv6hdr));</div><div class='add'>+		len = skb-&gt;len - skb_transport_offset(skb);</div><div class='ctx'> 		tcp_hdr(skb)-&gt;check =</div><div class='ctx'> 			~tcp_v6_check(len, &amp;ipv6h-&gt;saddr, &amp;ipv6h-&gt;daddr, 0);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3046,7 +3334,34 @@ static int idpf_rx_rsc(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_rx_process_skb_fields - Populate skb header fields from Rx descriptor</div><div class='add'>+ * idpf_rx_hwtstamp - check for an RX timestamp and pass up the stack</div><div class='add'>+ * @rxq: pointer to the rx queue that receives the timestamp</div><div class='add'>+ * @rx_desc: pointer to rx descriptor containing timestamp</div><div class='add'>+ * @skb: skb to put timestamp in</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+idpf_rx_hwtstamp(const struct idpf_rx_queue *rxq,</div><div class='add'>+		 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc,</div><div class='add'>+		 struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	u64 cached_time, ts_ns;</div><div class='add'>+	u32 ts_high;</div><div class='add'>+</div><div class='add'>+	if (!(rx_desc-&gt;ts_low &amp; VIRTCHNL2_RX_FLEX_TSTAMP_VALID))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cached_time = READ_ONCE(rxq-&gt;cached_phc_time);</div><div class='add'>+</div><div class='add'>+	ts_high = le32_to_cpu(rx_desc-&gt;ts_high);</div><div class='add'>+	ts_ns = idpf_ptp_tstamp_extend_32b_to_64b(cached_time, ts_high);</div><div class='add'>+</div><div class='add'>+	*skb_hwtstamps(skb) = (struct skb_shared_hwtstamps) {</div><div class='add'>+		.hwtstamp = ns_to_ktime(ts_ns),</div><div class='add'>+	};</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __idpf_rx_process_skb_fields - Populate skb header fields from Rx descriptor</div><div class='ctx'>  * @rxq: Rx descriptor ring packet is being transacted on</div><div class='ctx'>  * @skb: pointer to current skb being populated</div><div class='ctx'>  * @rx_desc: Receive descriptor</div><div class='hunk'>@@ -3056,10 +3371,10 @@ static int idpf_rx_rsc(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='ctx'>  * other fields within the skb.</div><div class='ctx'>  */</div><div class='ctx'> static int</div><div class='del'>-idpf_rx_process_skb_fields(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='del'>-			   const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc)</div><div class='add'>+__idpf_rx_process_skb_fields(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='add'>+			     const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc)</div><div class='ctx'> {</div><div class='del'>-	struct idpf_rx_csum_decoded csum_bits;</div><div class='add'>+	struct libeth_rx_csum csum_bits;</div><div class='ctx'> 	struct libeth_rx_pt decoded;</div><div class='ctx'> 	u16 rx_ptype;</div><div class='ctx'> </div><div class='hunk'>@@ -3070,7 +3385,8 @@ idpf_rx_process_skb_fields(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='ctx'> 	/* process RSS/hash */</div><div class='ctx'> 	idpf_rx_hash(rxq, skb, rx_desc, decoded);</div><div class='ctx'> </div><div class='del'>-	skb-&gt;protocol = eth_type_trans(skb, rxq-&gt;netdev);</div><div class='add'>+	if (idpf_queue_has(PTP, rxq))</div><div class='add'>+		idpf_rx_hwtstamp(rxq, rx_desc, skb);</div><div class='ctx'> </div><div class='ctx'> 	if (le16_get_bits(rx_desc-&gt;hdrlen_flags,</div><div class='ctx'> 			  VIRTCHNL2_RX_FLEX_DESC_ADV_RSC_M))</div><div class='hunk'>@@ -3079,30 +3395,27 @@ idpf_rx_process_skb_fields(struct idpf_rx_queue *rxq, struct sk_buff *skb,</div><div class='ctx'> 	csum_bits = idpf_rx_splitq_extract_csum_bits(rx_desc);</div><div class='ctx'> 	idpf_rx_csum(rxq, skb, csum_bits, decoded);</div><div class='ctx'> </div><div class='del'>-	skb_record_rx_queue(skb, rxq-&gt;idx);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * idpf_rx_add_frag - Add contents of Rx buffer to sk_buff as a frag</div><div class='del'>- * @rx_buf: buffer containing page to add</div><div class='del'>- * @skb: sk_buff to place the data into</div><div class='del'>- * @size: packet length from rx_desc</div><div class='del'>- *</div><div class='del'>- * This function will add the data contained in rx_buf-&gt;page to the skb.</div><div class='del'>- * It will just attach the page as a frag to the skb.</div><div class='del'>- * The function will then update the page offset.</div><div class='del'>- */</div><div class='del'>-void idpf_rx_add_frag(struct idpf_rx_buf *rx_buf, struct sk_buff *skb,</div><div class='del'>-		      unsigned int size)</div><div class='add'>+bool idpf_rx_process_skb_fields(struct sk_buff *skb,</div><div class='add'>+				const struct libeth_xdp_buff *xdp,</div><div class='add'>+				struct libeth_rq_napi_stats *rs)</div><div class='ctx'> {</div><div class='del'>-	u32 hr = rx_buf-&gt;page-&gt;pp-&gt;p.offset;</div><div class='add'>+	struct idpf_rx_queue *rxq;</div><div class='ctx'> </div><div class='del'>-	skb_add_rx_frag(skb, skb_shinfo(skb)-&gt;nr_frags, rx_buf-&gt;page,</div><div class='del'>-			rx_buf-&gt;offset + hr, size, rx_buf-&gt;truesize);</div><div class='add'>+	rxq = libeth_xdp_buff_to_rq(xdp, typeof(*rxq), xdp_rxq);</div><div class='add'>+</div><div class='add'>+	return !__idpf_rx_process_skb_fields(rxq, skb, xdp-&gt;desc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+LIBETH_XDP_DEFINE_START();</div><div class='add'>+LIBETH_XDP_DEFINE_RUN(static idpf_xdp_run_pass, idpf_xdp_run_prog,</div><div class='add'>+		      idpf_xdp_tx_flush_bulk, idpf_rx_process_skb_fields);</div><div class='add'>+LIBETH_XDP_DEFINE_FINALIZE(static idpf_xdp_finalize_rx, idpf_xdp_tx_flush_bulk,</div><div class='add'>+			   idpf_xdp_tx_finalize);</div><div class='add'>+LIBETH_XDP_DEFINE_END();</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_rx_hsplit_wa - handle header buffer overflows and split errors</div><div class='ctx'>  * @hdr: Rx buffer for the headers</div><div class='hunk'>@@ -3123,51 +3436,28 @@ static u32 idpf_rx_hsplit_wa(const struct libeth_fqe *hdr,</div><div class='ctx'> 			     struct libeth_fqe *buf, u32 data_len)</div><div class='ctx'> {</div><div class='ctx'> 	u32 copy = data_len &lt;= L1_CACHE_BYTES ? data_len : ETH_HLEN;</div><div class='add'>+	struct page *hdr_page, *buf_page;</div><div class='ctx'> 	const void *src;</div><div class='ctx'> 	void *dst;</div><div class='ctx'> </div><div class='del'>-	if (!libeth_rx_sync_for_cpu(buf, copy))</div><div class='add'>+	if (unlikely(netmem_is_net_iov(buf-&gt;netmem)) ||</div><div class='add'>+	    !libeth_rx_sync_for_cpu(buf, copy))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	dst = page_address(hdr-&gt;page) + hdr-&gt;offset + hdr-&gt;page-&gt;pp-&gt;p.offset;</div><div class='del'>-	src = page_address(buf-&gt;page) + buf-&gt;offset + buf-&gt;page-&gt;pp-&gt;p.offset;</div><div class='del'>-	memcpy(dst, src, LARGEST_ALIGN(copy));</div><div class='add'>+	hdr_page = __netmem_to_page(hdr-&gt;netmem);</div><div class='add'>+	buf_page = __netmem_to_page(buf-&gt;netmem);</div><div class='add'>+	dst = page_address(hdr_page) + hdr-&gt;offset +</div><div class='add'>+		pp_page_to_nmdesc(hdr_page)-&gt;pp-&gt;p.offset;</div><div class='add'>+	src = page_address(buf_page) + buf-&gt;offset +</div><div class='add'>+		pp_page_to_nmdesc(buf_page)-&gt;pp-&gt;p.offset;</div><div class='ctx'> </div><div class='add'>+	memcpy(dst, src, LARGEST_ALIGN(copy));</div><div class='ctx'> 	buf-&gt;offset += copy;</div><div class='ctx'> </div><div class='ctx'> 	return copy;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_rx_build_skb - Allocate skb and populate it from header buffer</div><div class='del'>- * @buf: Rx buffer to pull data from</div><div class='del'>- * @size: the length of the packet</div><div class='del'>- *</div><div class='del'>- * This function allocates an skb. It then populates it with the page data from</div><div class='del'>- * the current receive descriptor, taking care to set up the skb correctly.</div><div class='del'>- */</div><div class='del'>-struct sk_buff *idpf_rx_build_skb(const struct libeth_fqe *buf, u32 size)</div><div class='del'>-{</div><div class='del'>-	u32 hr = buf-&gt;page-&gt;pp-&gt;p.offset;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	void *va;</div><div class='del'>-</div><div class='del'>-	va = page_address(buf-&gt;page) + buf-&gt;offset;</div><div class='del'>-	prefetch(va + hr);</div><div class='del'>-</div><div class='del'>-	skb = napi_build_skb(va, buf-&gt;truesize);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	skb_mark_for_recycle(skb);</div><div class='del'>-</div><div class='del'>-	skb_reserve(skb, hr);</div><div class='del'>-	__skb_put(skb, size);</div><div class='del'>-</div><div class='del'>-	return skb;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * idpf_rx_splitq_test_staterr - tests bits in Rx descriptor</div><div class='ctx'>  * status and error fields</div><div class='ctx'>  * @stat_err_field: field from descriptor to test bits in</div><div class='hunk'>@@ -3208,13 +3498,18 @@ static bool idpf_rx_splitq_is_eop(struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_de</div><div class='ctx'>  */</div><div class='ctx'> static int idpf_rx_splitq_clean(struct idpf_rx_queue *rxq, int budget)</div><div class='ctx'> {</div><div class='del'>-	int total_rx_bytes = 0, total_rx_pkts = 0;</div><div class='ctx'> 	struct idpf_buf_queue *rx_bufq = NULL;</div><div class='del'>-	struct sk_buff *skb = rxq-&gt;skb;</div><div class='add'>+	struct libeth_rq_napi_stats rs = { };</div><div class='ctx'> 	u16 ntc = rxq-&gt;next_to_clean;</div><div class='add'>+	LIBETH_XDP_ONSTACK_BUFF(xdp);</div><div class='add'>+	LIBETH_XDP_ONSTACK_BULK(bq);</div><div class='add'>+</div><div class='add'>+	libeth_xdp_tx_init_bulk(&amp;bq, rxq-&gt;xdp_prog, rxq-&gt;xdp_rxq.dev,</div><div class='add'>+				rxq-&gt;xdpsqs, rxq-&gt;num_xdp_txq);</div><div class='add'>+	libeth_xdp_init_buff(xdp, &amp;rxq-&gt;xdp, &amp;rxq-&gt;xdp_rxq);</div><div class='ctx'> </div><div class='ctx'> 	/* Process Rx packets bounded by budget */</div><div class='del'>-	while (likely(total_rx_pkts &lt; budget)) {</div><div class='add'>+	while (likely(rs.packets &lt; budget)) {</div><div class='ctx'> 		struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc;</div><div class='ctx'> 		struct libeth_fqe *hdr, *rx_buf = NULL;</div><div class='ctx'> 		struct idpf_sw_queue *refillq = NULL;</div><div class='hunk'>@@ -3228,18 +3523,14 @@ static int idpf_rx_splitq_clean(struct idpf_rx_queue *rxq, int budget)</div><div class='ctx'> 		/* get the Rx desc from Rx queue based on 'next_to_clean' */</div><div class='ctx'> 		rx_desc = &amp;rxq-&gt;rx[ntc].flex_adv_nic_3_wb;</div><div class='ctx'> </div><div class='del'>-		/* This memory barrier is needed to keep us from reading</div><div class='del'>-		 * any other fields out of the rx_desc</div><div class='del'>-		 */</div><div class='del'>-		dma_rmb();</div><div class='del'>-</div><div class='ctx'> 		/* if the descriptor isn't done, no work yet to do */</div><div class='ctx'> 		gen_id = le16_get_bits(rx_desc-&gt;pktlen_gen_bufq_id,</div><div class='ctx'> 				       VIRTCHNL2_RX_FLEX_DESC_ADV_GEN_M);</div><div class='del'>-</div><div class='ctx'> 		if (idpf_queue_has(GEN_CHK, rxq) != gen_id)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		dma_rmb();</div><div class='add'>+</div><div class='ctx'> 		rxdid = FIELD_GET(VIRTCHNL2_RX_FLEX_DESC_ADV_RXDID_M,</div><div class='ctx'> 				  rx_desc-&gt;rxdid_ucast);</div><div class='ctx'> 		if (rxdid != VIRTCHNL2_RXDID_2_FLEX_SPLITQ) {</div><div class='hunk'>@@ -3284,84 +3575,47 @@ static int idpf_rx_splitq_clean(struct idpf_rx_queue *rxq, int budget)</div><div class='ctx'> </div><div class='ctx'> 		hdr = &amp;rx_bufq-&gt;hdr_buf[buf_id];</div><div class='ctx'> </div><div class='del'>-		if (unlikely(!hdr_len &amp;&amp; !skb)) {</div><div class='add'>+		if (unlikely(!hdr_len &amp;&amp; !xdp-&gt;data)) {</div><div class='ctx'> 			hdr_len = idpf_rx_hsplit_wa(hdr, rx_buf, pkt_len);</div><div class='del'>-			pkt_len -= hdr_len;</div><div class='add'>+			/* If failed, drop both buffers by setting len to 0 */</div><div class='add'>+			pkt_len -= hdr_len ? : pkt_len;</div><div class='ctx'> </div><div class='ctx'> 			u64_stats_update_begin(&amp;rxq-&gt;stats_sync);</div><div class='ctx'> 			u64_stats_inc(&amp;rxq-&gt;q_stats.hsplit_buf_ovf);</div><div class='ctx'> 			u64_stats_update_end(&amp;rxq-&gt;stats_sync);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (libeth_rx_sync_for_cpu(hdr, hdr_len)) {</div><div class='del'>-			skb = idpf_rx_build_skb(hdr, hdr_len);</div><div class='del'>-			if (!skb)</div><div class='del'>-				break;</div><div class='add'>+		if (libeth_xdp_process_buff(xdp, hdr, hdr_len))</div><div class='add'>+			rs.hsplit++;</div><div class='ctx'> </div><div class='del'>-			u64_stats_update_begin(&amp;rxq-&gt;stats_sync);</div><div class='del'>-			u64_stats_inc(&amp;rxq-&gt;q_stats.hsplit_pkts);</div><div class='del'>-			u64_stats_update_end(&amp;rxq-&gt;stats_sync);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		hdr-&gt;page = NULL;</div><div class='add'>+		hdr-&gt;netmem = 0;</div><div class='ctx'> </div><div class='ctx'> payload:</div><div class='del'>-		if (!libeth_rx_sync_for_cpu(rx_buf, pkt_len))</div><div class='del'>-			goto skip_data;</div><div class='del'>-</div><div class='del'>-		if (skb)</div><div class='del'>-			idpf_rx_add_frag(rx_buf, skb, pkt_len);</div><div class='del'>-		else</div><div class='del'>-			skb = idpf_rx_build_skb(rx_buf, pkt_len);</div><div class='del'>-</div><div class='del'>-		/* exit if we failed to retrieve a buffer */</div><div class='del'>-		if (!skb)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-skip_data:</div><div class='del'>-		rx_buf-&gt;page = NULL;</div><div class='add'>+		libeth_xdp_process_buff(xdp, rx_buf, pkt_len);</div><div class='add'>+		rx_buf-&gt;netmem = 0;</div><div class='ctx'> </div><div class='del'>-		idpf_rx_post_buf_refill(refillq, buf_id);</div><div class='add'>+		idpf_post_buf_refill(refillq, buf_id);</div><div class='ctx'> 		IDPF_RX_BUMP_NTC(rxq, ntc);</div><div class='ctx'> </div><div class='ctx'> 		/* skip if it is non EOP desc */</div><div class='del'>-		if (!idpf_rx_splitq_is_eop(rx_desc) || unlikely(!skb))</div><div class='add'>+		if (!idpf_rx_splitq_is_eop(rx_desc) || unlikely(!xdp-&gt;data))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		/* pad skb if needed (to make valid ethernet frame) */</div><div class='del'>-		if (eth_skb_pad(skb)) {</div><div class='del'>-			skb = NULL;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* probably a little skewed due to removing CRC */</div><div class='del'>-		total_rx_bytes += skb-&gt;len;</div><div class='del'>-</div><div class='del'>-		/* protocol */</div><div class='del'>-		if (unlikely(idpf_rx_process_skb_fields(rxq, skb, rx_desc))) {</div><div class='del'>-			dev_kfree_skb_any(skb);</div><div class='del'>-			skb = NULL;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* send completed skb up the stack */</div><div class='del'>-		napi_gro_receive(rxq-&gt;napi, skb);</div><div class='del'>-		skb = NULL;</div><div class='del'>-</div><div class='del'>-		/* update budget accounting */</div><div class='del'>-		total_rx_pkts++;</div><div class='add'>+		idpf_xdp_run_pass(xdp, &amp;bq, rxq-&gt;napi, &amp;rs, rx_desc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	idpf_xdp_finalize_rx(&amp;bq);</div><div class='add'>+</div><div class='ctx'> 	rxq-&gt;next_to_clean = ntc;</div><div class='add'>+	libeth_xdp_save_buff(&amp;rxq-&gt;xdp, xdp);</div><div class='ctx'> </div><div class='del'>-	rxq-&gt;skb = skb;</div><div class='ctx'> 	u64_stats_update_begin(&amp;rxq-&gt;stats_sync);</div><div class='del'>-	u64_stats_add(&amp;rxq-&gt;q_stats.packets, total_rx_pkts);</div><div class='del'>-	u64_stats_add(&amp;rxq-&gt;q_stats.bytes, total_rx_bytes);</div><div class='add'>+	u64_stats_add(&amp;rxq-&gt;q_stats.packets, rs.packets);</div><div class='add'>+	u64_stats_add(&amp;rxq-&gt;q_stats.bytes, rs.bytes);</div><div class='add'>+	u64_stats_add(&amp;rxq-&gt;q_stats.hsplit_pkts, rs.hsplit);</div><div class='ctx'> 	u64_stats_update_end(&amp;rxq-&gt;stats_sync);</div><div class='ctx'> </div><div class='del'>-	/* guarantee a trip back through this routine if there was a failure */</div><div class='del'>-	return total_rx_pkts;</div><div class='add'>+	return rs.packets;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3429,10 +3683,10 @@ static void idpf_rx_clean_refillq(struct idpf_buf_queue *bufq,</div><div class='ctx'> 		bool failure;</div><div class='ctx'> </div><div class='ctx'> 		if (idpf_queue_has(RFL_GEN_CHK, refillq) !=</div><div class='del'>-		    !!(refill_desc &amp; IDPF_RX_BI_GEN_M))</div><div class='add'>+		    !!(refill_desc &amp; IDPF_RFL_BI_GEN_M))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		buf_id = FIELD_GET(IDPF_RX_BI_BUFID_M, refill_desc);</div><div class='add'>+		buf_id = FIELD_GET(IDPF_RFL_BI_BUFID_M, refill_desc);</div><div class='ctx'> 		failure = idpf_rx_update_bufq_desc(bufq, buf_id, buf_desc);</div><div class='ctx'> 		if (failure)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -3504,7 +3758,7 @@ static irqreturn_t idpf_vport_intr_clean_queues(int __always_unused irq,</div><div class='ctx'> 	struct idpf_q_vector *q_vector = (struct idpf_q_vector *)data;</div><div class='ctx'> </div><div class='ctx'> 	q_vector-&gt;total_events++;</div><div class='del'>-	napi_schedule(&amp;q_vector-&gt;napi);</div><div class='add'>+	napi_schedule_irqoff(&amp;q_vector-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -3545,6 +3799,8 @@ void idpf_vport_intr_rel(struct idpf_vport *vport)</div><div class='ctx'> 	for (u32 v_idx = 0; v_idx &lt; vport-&gt;num_q_vectors; v_idx++) {</div><div class='ctx'> 		struct idpf_q_vector *q_vector = &amp;vport-&gt;q_vectors[v_idx];</div><div class='ctx'> </div><div class='add'>+		kfree(q_vector-&gt;xsksq);</div><div class='add'>+		q_vector-&gt;xsksq = NULL;</div><div class='ctx'> 		kfree(q_vector-&gt;complq);</div><div class='ctx'> 		q_vector-&gt;complq = NULL;</div><div class='ctx'> 		kfree(q_vector-&gt;bufq);</div><div class='hunk'>@@ -3553,14 +3809,26 @@ void idpf_vport_intr_rel(struct idpf_vport *vport)</div><div class='ctx'> 		q_vector-&gt;tx = NULL;</div><div class='ctx'> 		kfree(q_vector-&gt;rx);</div><div class='ctx'> 		q_vector-&gt;rx = NULL;</div><div class='del'>-</div><div class='del'>-		free_cpumask_var(q_vector-&gt;affinity_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(vport-&gt;q_vectors);</div><div class='ctx'> 	vport-&gt;q_vectors = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void idpf_q_vector_set_napi(struct idpf_q_vector *q_vector, bool link)</div><div class='add'>+{</div><div class='add'>+	struct napi_struct *napi = link ? &amp;q_vector-&gt;napi : NULL;</div><div class='add'>+	struct net_device *dev = q_vector-&gt;vport-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; q_vector-&gt;num_rxq; i++)</div><div class='add'>+		netif_queue_set_napi(dev, q_vector-&gt;rx[i]-&gt;idx,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_RX, napi);</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; q_vector-&gt;num_txq; i++)</div><div class='add'>+		netif_queue_set_napi(dev, q_vector-&gt;tx[i]-&gt;idx,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_TX, napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_vport_intr_rel_irq - Free the IRQ association with the OS</div><div class='ctx'>  * @vport: main vport structure</div><div class='hunk'>@@ -3581,8 +3849,7 @@ static void idpf_vport_intr_rel_irq(struct idpf_vport *vport)</div><div class='ctx'> 		vidx = vport-&gt;q_vector_idxs[vector];</div><div class='ctx'> 		irq_num = adapter-&gt;msix_entries[vidx].vector;</div><div class='ctx'> </div><div class='del'>-		/* clear the affinity_mask in the IRQ descriptor */</div><div class='del'>-		irq_set_affinity_hint(irq_num, NULL);</div><div class='add'>+		idpf_q_vector_set_napi(q_vector, false);</div><div class='ctx'> 		kfree(free_irq(irq_num, q_vector));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -3596,6 +3863,8 @@ static void idpf_vport_intr_dis_irq_all(struct idpf_vport *vport)</div><div class='ctx'> 	struct idpf_q_vector *q_vector = vport-&gt;q_vectors;</div><div class='ctx'> 	int q_idx;</div><div class='ctx'> </div><div class='add'>+	writel(0, vport-&gt;noirq_dyn_ctl);</div><div class='add'>+</div><div class='ctx'> 	for (q_idx = 0; q_idx &lt; vport-&gt;num_q_vectors; q_idx++)</div><div class='ctx'> 		writel(0, q_vector[q_idx].intr_reg.dyn_ctl);</div><div class='ctx'> }</div><div class='hunk'>@@ -3603,21 +3872,31 @@ static void idpf_vport_intr_dis_irq_all(struct idpf_vport *vport)</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_vport_intr_buildreg_itr - Enable default interrupt generation settings</div><div class='ctx'>  * @q_vector: pointer to q_vector</div><div class='del'>- * @type: itr index</div><div class='del'>- * @itr: itr value</div><div class='ctx'>  */</div><div class='del'>-static u32 idpf_vport_intr_buildreg_itr(struct idpf_q_vector *q_vector,</div><div class='del'>-					const int type, u16 itr)</div><div class='add'>+static u32 idpf_vport_intr_buildreg_itr(struct idpf_q_vector *q_vector)</div><div class='ctx'> {</div><div class='del'>-	u32 itr_val;</div><div class='add'>+	u32 itr_val = q_vector-&gt;intr_reg.dyn_ctl_intena_m;</div><div class='add'>+	int type = IDPF_NO_ITR_UPDATE_IDX;</div><div class='add'>+	u16 itr = 0;</div><div class='add'>+</div><div class='add'>+	if (q_vector-&gt;wb_on_itr) {</div><div class='add'>+		/*</div><div class='add'>+		 * Trigger a software interrupt when exiting wb_on_itr, to make</div><div class='add'>+		 * sure we catch any pending write backs that might have been</div><div class='add'>+		 * missed due to interrupt state transition.</div><div class='add'>+		 */</div><div class='add'>+		itr_val |= q_vector-&gt;intr_reg.dyn_ctl_swint_trig_m |</div><div class='add'>+			   q_vector-&gt;intr_reg.dyn_ctl_sw_itridx_ena_m;</div><div class='add'>+		type = IDPF_SW_ITR_UPDATE_IDX;</div><div class='add'>+		itr = IDPF_ITR_20K;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	itr &amp;= IDPF_ITR_MASK;</div><div class='ctx'> 	/* Don't clear PBA because that can cause lost interrupts that</div><div class='ctx'> 	 * came in while we were cleaning/polling</div><div class='ctx'> 	 */</div><div class='del'>-	itr_val = q_vector-&gt;intr_reg.dyn_ctl_intena_m |</div><div class='del'>-		  (type &lt;&lt; q_vector-&gt;intr_reg.dyn_ctl_itridx_s) |</div><div class='del'>-		  (itr &lt;&lt; (q_vector-&gt;intr_reg.dyn_ctl_intrvl_s - 1));</div><div class='add'>+	itr_val |= (type &lt;&lt; q_vector-&gt;intr_reg.dyn_ctl_itridx_s) |</div><div class='add'>+		   (itr &lt;&lt; (q_vector-&gt;intr_reg.dyn_ctl_intrvl_s - 1));</div><div class='ctx'> </div><div class='ctx'> 	return itr_val;</div><div class='ctx'> }</div><div class='hunk'>@@ -3715,9 +3994,8 @@ void idpf_vport_intr_update_itr_ena_irq(struct idpf_q_vector *q_vector)</div><div class='ctx'> 	/* net_dim() updates ITR out-of-band using a work item */</div><div class='ctx'> 	idpf_net_dim(q_vector);</div><div class='ctx'> </div><div class='add'>+	intval = idpf_vport_intr_buildreg_itr(q_vector);</div><div class='ctx'> 	q_vector-&gt;wb_on_itr = false;</div><div class='del'>-	intval = idpf_vport_intr_buildreg_itr(q_vector,</div><div class='del'>-					      IDPF_NO_ITR_UPDATE_IDX, 0);</div><div class='ctx'> </div><div class='ctx'> 	writel(intval, q_vector-&gt;intr_reg.dyn_ctl);</div><div class='ctx'> }</div><div class='hunk'>@@ -3761,8 +4039,8 @@ static int idpf_vport_intr_req_irq(struct idpf_vport *vport)</div><div class='ctx'> 				   "Request_irq failed, error: %d\n", err);</div><div class='ctx'> 			goto free_q_irqs;</div><div class='ctx'> 		}</div><div class='del'>-		/* assign the mask for this irq */</div><div class='del'>-		irq_set_affinity_hint(irq_num, q_vector-&gt;affinity_mask);</div><div class='add'>+</div><div class='add'>+		idpf_q_vector_set_napi(q_vector, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3830,6 +4108,8 @@ static void idpf_vport_intr_ena_irq_all(struct idpf_vport *vport)</div><div class='ctx'> 		if (qv-&gt;num_txq || qv-&gt;num_rxq)</div><div class='ctx'> 			idpf_vport_intr_update_itr_ena_irq(qv);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	writel(vport-&gt;noirq_dyn_ctl_ena, vport-&gt;noirq_dyn_ctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3979,7 +4259,9 @@ static bool idpf_rx_splitq_clean_all(struct idpf_q_vector *q_vec, int budget,</div><div class='ctx'> 		struct idpf_rx_queue *rxq = q_vec-&gt;rx[i];</div><div class='ctx'> 		int pkts_cleaned_per_q;</div><div class='ctx'> </div><div class='del'>-		pkts_cleaned_per_q = idpf_rx_splitq_clean(rxq, budget_per_q);</div><div class='add'>+		pkts_cleaned_per_q = idpf_queue_has(XSK, rxq) ?</div><div class='add'>+				     idpf_xskrq_poll(rxq, budget_per_q) :</div><div class='add'>+				     idpf_rx_splitq_clean(rxq, budget_per_q);</div><div class='ctx'> 		/* if we clean as many as budgeted, we must not be done */</div><div class='ctx'> 		if (pkts_cleaned_per_q &gt;= budget_per_q)</div><div class='ctx'> 			clean_complete = false;</div><div class='hunk'>@@ -3989,8 +4271,10 @@ static bool idpf_rx_splitq_clean_all(struct idpf_q_vector *q_vec, int budget,</div><div class='ctx'> </div><div class='ctx'> 	nid = numa_mem_id();</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; q_vec-&gt;num_bufq; i++)</div><div class='del'>-		idpf_rx_clean_refillq_all(q_vec-&gt;bufq[i], nid);</div><div class='add'>+	for (i = 0; i &lt; q_vec-&gt;num_bufq; i++) {</div><div class='add'>+		if (!idpf_queue_has(XSK, q_vec-&gt;bufq[i]))</div><div class='add'>+			idpf_rx_clean_refillq_all(q_vec-&gt;bufq[i], nid);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return clean_complete;</div><div class='ctx'> }</div><div class='hunk'>@@ -4004,7 +4288,7 @@ static int idpf_vport_splitq_napi_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct idpf_q_vector *q_vector =</div><div class='ctx'> 				container_of(napi, struct idpf_q_vector, napi);</div><div class='del'>-	bool clean_complete;</div><div class='add'>+	bool clean_complete = true;</div><div class='ctx'> 	int work_done = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Handle case where we are called by netpoll with a budget of 0 */</div><div class='hunk'>@@ -4014,8 +4298,13 @@ static int idpf_vport_splitq_napi_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	clean_complete = idpf_rx_splitq_clean_all(q_vector, budget, &amp;work_done);</div><div class='del'>-	clean_complete &amp;= idpf_tx_splitq_clean_all(q_vector, budget, &amp;work_done);</div><div class='add'>+	for (u32 i = 0; i &lt; q_vector-&gt;num_xsksq; i++)</div><div class='add'>+		clean_complete &amp;= idpf_xsk_xmit(q_vector-&gt;xsksq[i]);</div><div class='add'>+</div><div class='add'>+	clean_complete &amp;= idpf_tx_splitq_clean_all(q_vector, budget,</div><div class='add'>+						   &amp;work_done);</div><div class='add'>+	clean_complete &amp;= idpf_rx_splitq_clean_all(q_vector, budget,</div><div class='add'>+						   &amp;work_done);</div><div class='ctx'> </div><div class='ctx'> 	/* If work not completed, return budget and polling will return */</div><div class='ctx'> 	if (!clean_complete) {</div><div class='hunk'>@@ -4028,20 +4317,12 @@ static int idpf_vport_splitq_napi_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	/* Exit the polling mode, but don't re-enable interrupts if stack might</div><div class='ctx'> 	 * poll us due to busy-polling</div><div class='ctx'> 	 */</div><div class='del'>-	if (likely(napi_complete_done(napi, work_done)))</div><div class='add'>+	if (napi_complete_done(napi, work_done))</div><div class='ctx'> 		idpf_vport_intr_update_itr_ena_irq(q_vector);</div><div class='ctx'> 	else</div><div class='ctx'> 		idpf_vport_intr_set_wb_on_itr(q_vector);</div><div class='ctx'> </div><div class='del'>-	/* Switch to poll mode in the tear-down path after sending disable</div><div class='del'>-	 * queues virtchnl message, as the interrupts will be disabled after</div><div class='del'>-	 * that</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(q_vector-&gt;num_txq &amp;&amp; idpf_queue_has(POLL_MODE,</div><div class='del'>-							 q_vector-&gt;tx[0])))</div><div class='del'>-		return budget;</div><div class='del'>-	else</div><div class='del'>-		return work_done;</div><div class='add'>+	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4052,8 +4333,8 @@ static int idpf_vport_splitq_napi_poll(struct napi_struct *napi, int budget)</div><div class='ctx'>  */</div><div class='ctx'> static void idpf_vport_intr_map_vector_to_qs(struct idpf_vport *vport)</div><div class='ctx'> {</div><div class='add'>+	u16 num_txq_grp = vport-&gt;num_txq_grp - vport-&gt;num_xdp_txq;</div><div class='ctx'> 	bool split = idpf_is_queue_model_split(vport-&gt;rxq_model);</div><div class='del'>-	u16 num_txq_grp = vport-&gt;num_txq_grp;</div><div class='ctx'> 	struct idpf_rxq_group *rx_qgrp;</div><div class='ctx'> 	struct idpf_txq_group *tx_qgrp;</div><div class='ctx'> 	u32 i, qv_idx, q_index;</div><div class='hunk'>@@ -4129,6 +4410,21 @@ static void idpf_vport_intr_map_vector_to_qs(struct idpf_vport *vport)</div><div class='ctx'> </div><div class='ctx'> 		qv_idx++;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; vport-&gt;num_xdp_txq; i++) {</div><div class='add'>+		struct idpf_tx_queue *xdpsq;</div><div class='add'>+		struct idpf_q_vector *qv;</div><div class='add'>+</div><div class='add'>+		xdpsq = vport-&gt;txqs[vport-&gt;xdp_txq_offset + i];</div><div class='add'>+		if (!idpf_queue_has(XSK, xdpsq))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		qv = idpf_find_rxq_vec(vport, i);</div><div class='add'>+		idpf_xsk_init_wakeup(qv);</div><div class='add'>+</div><div class='add'>+		xdpsq-&gt;q_vector = qv;</div><div class='add'>+		qv-&gt;xsksq[qv-&gt;num_xsksq++] = xdpsq;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -4149,6 +4445,8 @@ static int idpf_vport_intr_init_vec_idx(struct idpf_vport *vport)</div><div class='ctx'> 		for (i = 0; i &lt; vport-&gt;num_q_vectors; i++)</div><div class='ctx'> 			vport-&gt;q_vectors[i].v_idx = vport-&gt;q_vector_idxs[i];</div><div class='ctx'> </div><div class='add'>+		vport-&gt;noirq_v_idx = vport-&gt;q_vector_idxs[i];</div><div class='add'>+</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -4162,6 +4460,8 @@ static int idpf_vport_intr_init_vec_idx(struct idpf_vport *vport)</div><div class='ctx'> 	for (i = 0; i &lt; vport-&gt;num_q_vectors; i++)</div><div class='ctx'> 		vport-&gt;q_vectors[i].v_idx = vecids[vport-&gt;q_vector_idxs[i]];</div><div class='ctx'> </div><div class='add'>+	vport-&gt;noirq_v_idx = vecids[vport-&gt;q_vector_idxs[i]];</div><div class='add'>+</div><div class='ctx'> 	kfree(vecids);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -4174,7 +4474,8 @@ static int idpf_vport_intr_init_vec_idx(struct idpf_vport *vport)</div><div class='ctx'> static void idpf_vport_intr_napi_add_all(struct idpf_vport *vport)</div><div class='ctx'> {</div><div class='ctx'> 	int (*napi_poll)(struct napi_struct *napi, int budget);</div><div class='del'>-	u16 v_idx;</div><div class='add'>+	u16 v_idx, qv_idx;</div><div class='add'>+	int irq_num;</div><div class='ctx'> </div><div class='ctx'> 	if (idpf_is_queue_model_split(vport-&gt;txq_model))</div><div class='ctx'> 		napi_poll = idpf_vport_splitq_napi_poll;</div><div class='hunk'>@@ -4183,12 +4484,12 @@ static void idpf_vport_intr_napi_add_all(struct idpf_vport *vport)</div><div class='ctx'> </div><div class='ctx'> 	for (v_idx = 0; v_idx &lt; vport-&gt;num_q_vectors; v_idx++) {</div><div class='ctx'> 		struct idpf_q_vector *q_vector = &amp;vport-&gt;q_vectors[v_idx];</div><div class='add'>+		qv_idx = vport-&gt;q_vector_idxs[v_idx];</div><div class='add'>+		irq_num = vport-&gt;adapter-&gt;msix_entries[qv_idx].vector;</div><div class='ctx'> </div><div class='del'>-		netif_napi_add(vport-&gt;netdev, &amp;q_vector-&gt;napi, napi_poll);</div><div class='del'>-</div><div class='del'>-		/* only set affinity_mask if the CPU is online */</div><div class='del'>-		if (cpu_online(v_idx))</div><div class='del'>-			cpumask_set_cpu(v_idx, q_vector-&gt;affinity_mask);</div><div class='add'>+		netif_napi_add_config(vport-&gt;netdev, &amp;q_vector-&gt;napi,</div><div class='add'>+				      napi_poll, v_idx);</div><div class='add'>+		netif_napi_set_irq(&amp;q_vector-&gt;napi, irq_num);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4202,9 +4503,13 @@ static void idpf_vport_intr_napi_add_all(struct idpf_vport *vport)</div><div class='ctx'> int idpf_vport_intr_alloc(struct idpf_vport *vport)</div><div class='ctx'> {</div><div class='ctx'> 	u16 txqs_per_vector, rxqs_per_vector, bufqs_per_vector;</div><div class='add'>+	struct idpf_vport_user_config_data *user_config;</div><div class='ctx'> 	struct idpf_q_vector *q_vector;</div><div class='add'>+	struct idpf_q_coalesce *q_coal;</div><div class='ctx'> 	u32 complqs_per_vector, v_idx;</div><div class='add'>+	u16 idx = vport-&gt;idx;</div><div class='ctx'> </div><div class='add'>+	user_config = &amp;vport-&gt;adapter-&gt;vport_config[idx]-&gt;user_config;</div><div class='ctx'> 	vport-&gt;q_vectors = kcalloc(vport-&gt;num_q_vectors,</div><div class='ctx'> 				   sizeof(struct idpf_q_vector), GFP_KERNEL);</div><div class='ctx'> 	if (!vport-&gt;q_vectors)</div><div class='hunk'>@@ -4222,19 +4527,17 @@ int idpf_vport_intr_alloc(struct idpf_vport *vport)</div><div class='ctx'> </div><div class='ctx'> 	for (v_idx = 0; v_idx &lt; vport-&gt;num_q_vectors; v_idx++) {</div><div class='ctx'> 		q_vector = &amp;vport-&gt;q_vectors[v_idx];</div><div class='add'>+		q_coal = &amp;user_config-&gt;q_coalesce[v_idx];</div><div class='ctx'> 		q_vector-&gt;vport = vport;</div><div class='ctx'> </div><div class='del'>-		q_vector-&gt;tx_itr_value = IDPF_ITR_TX_DEF;</div><div class='del'>-		q_vector-&gt;tx_intr_mode = IDPF_ITR_DYNAMIC;</div><div class='add'>+		q_vector-&gt;tx_itr_value = q_coal-&gt;tx_coalesce_usecs;</div><div class='add'>+		q_vector-&gt;tx_intr_mode = q_coal-&gt;tx_intr_mode;</div><div class='ctx'> 		q_vector-&gt;tx_itr_idx = VIRTCHNL2_ITR_IDX_1;</div><div class='ctx'> </div><div class='del'>-		q_vector-&gt;rx_itr_value = IDPF_ITR_RX_DEF;</div><div class='del'>-		q_vector-&gt;rx_intr_mode = IDPF_ITR_DYNAMIC;</div><div class='add'>+		q_vector-&gt;rx_itr_value = q_coal-&gt;rx_coalesce_usecs;</div><div class='add'>+		q_vector-&gt;rx_intr_mode = q_coal-&gt;rx_intr_mode;</div><div class='ctx'> 		q_vector-&gt;rx_itr_idx = VIRTCHNL2_ITR_IDX_0;</div><div class='ctx'> </div><div class='del'>-		if (!zalloc_cpumask_var(&amp;q_vector-&gt;affinity_mask, GFP_KERNEL))</div><div class='del'>-			goto error;</div><div class='del'>-</div><div class='ctx'> 		q_vector-&gt;tx = kcalloc(txqs_per_vector, sizeof(*q_vector-&gt;tx),</div><div class='ctx'> 				       GFP_KERNEL);</div><div class='ctx'> 		if (!q_vector-&gt;tx)</div><div class='hunk'>@@ -4259,6 +4562,15 @@ int idpf_vport_intr_alloc(struct idpf_vport *vport)</div><div class='ctx'> 					   GFP_KERNEL);</div><div class='ctx'> 		if (!q_vector-&gt;complq)</div><div class='ctx'> 			goto error;</div><div class='add'>+</div><div class='add'>+		if (!vport-&gt;xdp_txq_offset)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		q_vector-&gt;xsksq = kcalloc(rxqs_per_vector,</div><div class='add'>+					  sizeof(*q_vector-&gt;xsksq),</div><div class='add'>+					  GFP_KERNEL);</div><div class='add'>+		if (!q_vector-&gt;xsksq)</div><div class='add'>+			goto error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.h b/drivers/net/ethernet/intel/idpf/idpf_txrx.h<br/>index 9c1fe84108ed..75b977094741 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_txrx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_txrx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_txrx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_txrx.h</a></div><div class='hunk'>@@ -7,8 +7,10 @@</div><div class='ctx'> #include &lt;linux/dim.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/libeth/cache.h&gt;</div><div class='del'>-#include &lt;net/tcp.h&gt;</div><div class='add'>+#include &lt;net/libeth/types.h&gt;</div><div class='ctx'> #include &lt;net/netdev_queues.h&gt;</div><div class='add'>+#include &lt;net/tcp.h&gt;</div><div class='add'>+#include &lt;net/xdp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "idpf_lan_txrx.h"</div><div class='ctx'> #include "virtchnl2_lan_desc.h"</div><div class='hunk'>@@ -57,6 +59,9 @@</div><div class='ctx'> /* Default vector sharing */</div><div class='ctx'> #define IDPF_MBX_Q_VEC		1</div><div class='ctx'> #define IDPF_MIN_Q_VEC		1</div><div class='add'>+#define IDPF_MIN_RDMA_VEC	2</div><div class='add'>+/* Data vector for NOIRQ queues */</div><div class='add'>+#define IDPF_RESERVED_VECS			1</div><div class='ctx'> </div><div class='ctx'> #define IDPF_DFLT_TX_Q_DESC_COUNT		512</div><div class='ctx'> #define IDPF_DFLT_TX_COMPLQ_DESC_COUNT		512</div><div class='hunk'>@@ -107,8 +112,8 @@ do {								\</div><div class='ctx'>  */</div><div class='ctx'> #define IDPF_TX_SPLITQ_RE_MIN_GAP	64</div><div class='ctx'> </div><div class='del'>-#define IDPF_RX_BI_GEN_M		BIT(16)</div><div class='del'>-#define IDPF_RX_BI_BUFID_M		GENMASK(15, 0)</div><div class='add'>+#define IDPF_RFL_BI_GEN_M		BIT(16)</div><div class='add'>+#define IDPF_RFL_BI_BUFID_M		GENMASK(15, 0)</div><div class='ctx'> </div><div class='ctx'> #define IDPF_RXD_EOF_SPLITQ		VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_EOF_M</div><div class='ctx'> #define IDPF_RXD_EOF_SINGLEQ		VIRTCHNL2_RX_BASE_DESC_STATUS_EOF_M</div><div class='hunk'>@@ -117,10 +122,6 @@ do {								\</div><div class='ctx'> 	((((txq)-&gt;next_to_clean &gt; (txq)-&gt;next_to_use) ? 0 : (txq)-&gt;desc_count) + \</div><div class='ctx'> 	(txq)-&gt;next_to_clean - (txq)-&gt;next_to_use - 1)</div><div class='ctx'> </div><div class='del'>-#define IDPF_TX_BUF_RSV_UNUSED(txq)	((txq)-&gt;stash-&gt;buf_stack.top)</div><div class='del'>-#define IDPF_TX_BUF_RSV_LOW(txq)	(IDPF_TX_BUF_RSV_UNUSED(txq) &lt; \</div><div class='del'>-					 (txq)-&gt;desc_count &gt;&gt; 2)</div><div class='del'>-</div><div class='ctx'> #define IDPF_TX_COMPLQ_OVERFLOW_THRESH(txcq)	((txcq)-&gt;desc_count &gt;&gt; 1)</div><div class='ctx'> /* Determine the absolute number of completions pending, i.e. the number of</div><div class='ctx'>  * completions that are expected to arrive on the TX completion queue.</div><div class='hunk'>@@ -130,11 +131,7 @@ do {								\</div><div class='ctx'> 	0 : U32_MAX) + \</div><div class='ctx'> 	(txq)-&gt;num_completions_pending - (txq)-&gt;complq-&gt;num_completions)</div><div class='ctx'> </div><div class='del'>-#define IDPF_TX_SPLITQ_COMPL_TAG_WIDTH	16</div><div class='del'>-/* Adjust the generation for the completion tag and wrap if necessary */</div><div class='del'>-#define IDPF_TX_ADJ_COMPL_TAG_GEN(txq) \</div><div class='del'>-	((++(txq)-&gt;compl_tag_cur_gen) &gt;= (txq)-&gt;compl_tag_gen_max ? \</div><div class='del'>-	0 : (txq)-&gt;compl_tag_cur_gen)</div><div class='add'>+#define IDPF_TXBUF_NULL			U32_MAX</div><div class='ctx'> </div><div class='ctx'> #define IDPF_TXD_LAST_DESC_CMD (IDPF_TX_DESC_CMD_EOP | IDPF_TX_DESC_CMD_RS)</div><div class='ctx'> </div><div class='hunk'>@@ -142,6 +139,9 @@ do {								\</div><div class='ctx'> #define IDPF_TX_FLAGS_IPV4		BIT(1)</div><div class='ctx'> #define IDPF_TX_FLAGS_IPV6		BIT(2)</div><div class='ctx'> #define IDPF_TX_FLAGS_TUNNEL		BIT(3)</div><div class='add'>+#define IDPF_TX_FLAGS_TSYN		BIT(4)</div><div class='add'>+</div><div class='add'>+struct libeth_rq_napi_stats;</div><div class='ctx'> </div><div class='ctx'> union idpf_tx_flex_desc {</div><div class='ctx'> 	struct idpf_flex_tx_desc q; /* queue based scheduling */</div><div class='hunk'>@@ -151,18 +151,6 @@ union idpf_tx_flex_desc {</div><div class='ctx'> #define idpf_tx_buf libeth_sqe</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * struct idpf_buf_lifo - LIFO for managing OOO completions</div><div class='del'>- * @top: Used to know how many buffers are left</div><div class='del'>- * @size: Total size of LIFO</div><div class='del'>- * @bufs: Backing array</div><div class='del'>- */</div><div class='del'>-struct idpf_buf_lifo {</div><div class='del'>-	u16 top;</div><div class='del'>-	u16 size;</div><div class='del'>-	struct idpf_tx_stash **bufs;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * struct idpf_tx_offload_params - Offload parameters for a given packet</div><div class='ctx'>  * @tx_flags: Feature flags enabled for this packet</div><div class='ctx'>  * @hdr_offsets: Offset parameter for single queue model</div><div class='hunk'>@@ -194,6 +182,9 @@ struct idpf_tx_offload_params {</div><div class='ctx'>  * @compl_tag: Associated tag for completion</div><div class='ctx'>  * @td_tag: Descriptor tunneling tag</div><div class='ctx'>  * @offload: Offload parameters</div><div class='add'>+ * @prev_ntu: stored TxQ next_to_use in case of rollback</div><div class='add'>+ * @prev_refill_ntc: stored refillq next_to_clean in case of packet rollback</div><div class='add'>+ * @prev_refill_gen: stored refillq generation bit in case of packet rollback</div><div class='ctx'>  */</div><div class='ctx'> struct idpf_tx_splitq_params {</div><div class='ctx'> 	enum idpf_tx_desc_dtype_value dtype;</div><div class='hunk'>@@ -204,6 +195,10 @@ struct idpf_tx_splitq_params {</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	struct idpf_tx_offload_params offload;</div><div class='add'>+</div><div class='add'>+	u16 prev_ntu;</div><div class='add'>+	u16 prev_refill_ntc;</div><div class='add'>+	bool prev_refill_gen;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum idpf_tx_ctx_desc_eipt_offload {</div><div class='hunk'>@@ -213,25 +208,6 @@ enum idpf_tx_ctx_desc_eipt_offload {</div><div class='ctx'> 	IDPF_TX_CTX_EXT_IP_IPV4         = 0x3</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Checksum offload bits decoded from the receive descriptor. */</div><div class='del'>-struct idpf_rx_csum_decoded {</div><div class='del'>-	u32 l3l4p : 1;</div><div class='del'>-	u32 ipe : 1;</div><div class='del'>-	u32 eipe : 1;</div><div class='del'>-	u32 eudpe : 1;</div><div class='del'>-	u32 ipv6exadd : 1;</div><div class='del'>-	u32 l4e : 1;</div><div class='del'>-	u32 pprs : 1;</div><div class='del'>-	u32 nat : 1;</div><div class='del'>-	u32 raw_csum_inv : 1;</div><div class='del'>-	u32 raw_csum : 16;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct idpf_rx_extracted {</div><div class='del'>-	unsigned int size;</div><div class='del'>-	u16 rx_ptype;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define IDPF_TX_COMPLQ_CLEAN_BUDGET	256</div><div class='ctx'> #define IDPF_TX_MIN_PKT_LEN		17</div><div class='ctx'> #define IDPF_TX_DESCS_FOR_SKB_DATA_PTR	1</div><div class='hunk'>@@ -305,9 +281,13 @@ struct idpf_ptype_state {</div><div class='ctx'>  *			  bit and Q_RFL_GEN is the SW bit.</div><div class='ctx'>  * @__IDPF_Q_FLOW_SCH_EN: Enable flow scheduling</div><div class='ctx'>  * @__IDPF_Q_SW_MARKER: Used to indicate TX queue marker completions</div><div class='del'>- * @__IDPF_Q_POLL_MODE: Enable poll mode</div><div class='ctx'>  * @__IDPF_Q_CRC_EN: enable CRC offload in singleq mode</div><div class='ctx'>  * @__IDPF_Q_HSPLIT_EN: enable header split on Rx (splitq)</div><div class='add'>+ * @__IDPF_Q_PTP: indicates whether the Rx timestamping is enabled for the</div><div class='add'>+ *		  queue</div><div class='add'>+ * @__IDPF_Q_NOIRQ: queue is polling-driven and has no interrupt</div><div class='add'>+ * @__IDPF_Q_XDP: this is an XDP queue</div><div class='add'>+ * @__IDPF_Q_XSK: the queue has an XSk pool installed</div><div class='ctx'>  * @__IDPF_Q_FLAGS_NBITS: Must be last</div><div class='ctx'>  */</div><div class='ctx'> enum idpf_queue_flags_t {</div><div class='hunk'>@@ -315,9 +295,12 @@ enum idpf_queue_flags_t {</div><div class='ctx'> 	__IDPF_Q_RFL_GEN_CHK,</div><div class='ctx'> 	__IDPF_Q_FLOW_SCH_EN,</div><div class='ctx'> 	__IDPF_Q_SW_MARKER,</div><div class='del'>-	__IDPF_Q_POLL_MODE,</div><div class='ctx'> 	__IDPF_Q_CRC_EN,</div><div class='ctx'> 	__IDPF_Q_HSPLIT_EN,</div><div class='add'>+	__IDPF_Q_PTP,</div><div class='add'>+	__IDPF_Q_NOIRQ,</div><div class='add'>+	__IDPF_Q_XDP,</div><div class='add'>+	__IDPF_Q_XSK,</div><div class='ctx'> </div><div class='ctx'> 	__IDPF_Q_FLAGS_NBITS,</div><div class='ctx'> };</div><div class='hunk'>@@ -354,6 +337,8 @@ struct idpf_vec_regs {</div><div class='ctx'>  * @dyn_ctl_itridx_m: Mask for ITR index</div><div class='ctx'>  * @dyn_ctl_intrvl_s: Register bit offset for ITR interval</div><div class='ctx'>  * @dyn_ctl_wb_on_itr_m: Mask for WB on ITR feature</div><div class='add'>+ * @dyn_ctl_sw_itridx_ena_m: Mask for SW ITR index</div><div class='add'>+ * @dyn_ctl_swint_trig_m: Mask for dyn_ctl SW triggered interrupt enable</div><div class='ctx'>  * @rx_itr: RX ITR register</div><div class='ctx'>  * @tx_itr: TX ITR register</div><div class='ctx'>  * @icr_ena: Interrupt cause register offset</div><div class='hunk'>@@ -367,6 +352,8 @@ struct idpf_intr_reg {</div><div class='ctx'> 	u32 dyn_ctl_itridx_m;</div><div class='ctx'> 	u32 dyn_ctl_intrvl_s;</div><div class='ctx'> 	u32 dyn_ctl_wb_on_itr_m;</div><div class='add'>+	u32 dyn_ctl_sw_itridx_ena_m;</div><div class='add'>+	u32 dyn_ctl_swint_trig_m;</div><div class='ctx'> 	void __iomem *rx_itr;</div><div class='ctx'> 	void __iomem *tx_itr;</div><div class='ctx'> 	void __iomem *icr_ena;</div><div class='hunk'>@@ -380,14 +367,17 @@ struct idpf_intr_reg {</div><div class='ctx'>  * @num_txq: Number of TX queues</div><div class='ctx'>  * @num_bufq: Number of buffer queues</div><div class='ctx'>  * @num_complq: number of completion queues</div><div class='add'>+ * @num_xsksq: number of XSk send queues</div><div class='ctx'>  * @rx: Array of RX queues to service</div><div class='ctx'>  * @tx: Array of TX queues to service</div><div class='ctx'>  * @bufq: Array of buffer queues to service</div><div class='ctx'>  * @complq: array of completion queues</div><div class='add'>+ * @xsksq: array of XSk send queues</div><div class='ctx'>  * @intr_reg: See struct idpf_intr_reg</div><div class='del'>- * @napi: napi handler</div><div class='add'>+ * @csd: XSk wakeup CSD</div><div class='ctx'>  * @total_events: Number of interrupts processed</div><div class='ctx'>  * @wb_on_itr: whether WB on ITR is enabled</div><div class='add'>+ * @napi: napi handler</div><div class='ctx'>  * @tx_dim: Data for TX net_dim algorithm</div><div class='ctx'>  * @tx_itr_value: TX interrupt throttling rate</div><div class='ctx'>  * @tx_intr_mode: Dynamic ITR or not</div><div class='hunk'>@@ -397,7 +387,6 @@ struct idpf_intr_reg {</div><div class='ctx'>  * @rx_intr_mode: Dynamic ITR or not</div><div class='ctx'>  * @rx_itr_idx: RX ITR index</div><div class='ctx'>  * @v_idx: Vector index</div><div class='del'>- * @affinity_mask: CPU affinity mask</div><div class='ctx'>  */</div><div class='ctx'> struct idpf_q_vector {</div><div class='ctx'> 	__cacheline_group_begin_aligned(read_mostly);</div><div class='hunk'>@@ -407,19 +396,24 @@ struct idpf_q_vector {</div><div class='ctx'> 	u16 num_txq;</div><div class='ctx'> 	u16 num_bufq;</div><div class='ctx'> 	u16 num_complq;</div><div class='add'>+	u16 num_xsksq;</div><div class='ctx'> 	struct idpf_rx_queue **rx;</div><div class='ctx'> 	struct idpf_tx_queue **tx;</div><div class='ctx'> 	struct idpf_buf_queue **bufq;</div><div class='ctx'> 	struct idpf_compl_queue **complq;</div><div class='add'>+	struct idpf_tx_queue **xsksq;</div><div class='ctx'> </div><div class='ctx'> 	struct idpf_intr_reg intr_reg;</div><div class='ctx'> 	__cacheline_group_end_aligned(read_mostly);</div><div class='ctx'> </div><div class='ctx'> 	__cacheline_group_begin_aligned(read_write);</div><div class='del'>-	struct napi_struct napi;</div><div class='add'>+	call_single_data_t csd;</div><div class='add'>+</div><div class='ctx'> 	u16 total_events;</div><div class='ctx'> 	bool wb_on_itr;</div><div class='ctx'> </div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+</div><div class='ctx'> 	struct dim tx_dim;</div><div class='ctx'> 	u16 tx_itr_value;</div><div class='ctx'> 	bool tx_intr_mode;</div><div class='hunk'>@@ -434,13 +428,12 @@ struct idpf_q_vector {</div><div class='ctx'> 	__cacheline_group_begin_aligned(cold);</div><div class='ctx'> 	u16 v_idx;</div><div class='ctx'> </div><div class='del'>-	cpumask_var_t affinity_mask;</div><div class='ctx'> 	__cacheline_group_end_aligned(cold);</div><div class='ctx'> };</div><div class='del'>-libeth_cacheline_set_assert(struct idpf_q_vector, 112,</div><div class='del'>-			    24 + sizeof(struct napi_struct) +</div><div class='add'>+libeth_cacheline_set_assert(struct idpf_q_vector, 136,</div><div class='add'>+			    56 + sizeof(struct napi_struct) +</div><div class='ctx'> 			    2 * sizeof(struct dim),</div><div class='del'>-			    8 + sizeof(cpumask_var_t));</div><div class='add'>+			    8);</div><div class='ctx'> </div><div class='ctx'> struct idpf_rx_queue_stats {</div><div class='ctx'> 	u64_stats_t packets;</div><div class='hunk'>@@ -460,6 +453,7 @@ struct idpf_tx_queue_stats {</div><div class='ctx'> 	u64_stats_t q_busy;</div><div class='ctx'> 	u64_stats_t skb_drops;</div><div class='ctx'> 	u64_stats_t dma_map_errs;</div><div class='add'>+	u64_stats_t tstamp_skipped;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define IDPF_ITR_DYNAMIC	1</div><div class='hunk'>@@ -471,44 +465,41 @@ struct idpf_tx_queue_stats {</div><div class='ctx'> #define IDPF_ITR_IS_DYNAMIC(itr_mode) (itr_mode)</div><div class='ctx'> #define IDPF_ITR_TX_DEF		IDPF_ITR_20K</div><div class='ctx'> #define IDPF_ITR_RX_DEF		IDPF_ITR_20K</div><div class='add'>+/* Index used for 'SW ITR' update in DYN_CTL register */</div><div class='add'>+#define IDPF_SW_ITR_UPDATE_IDX	2</div><div class='ctx'> /* Index used for 'No ITR' update in DYN_CTL register */</div><div class='ctx'> #define IDPF_NO_ITR_UPDATE_IDX	3</div><div class='ctx'> #define IDPF_ITR_IDX_SPACING(spacing, dflt)	(spacing ? spacing : dflt)</div><div class='ctx'> #define IDPF_DIM_DEFAULT_PROFILE_IX		1</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * struct idpf_txq_stash - Tx buffer stash for Flow-based scheduling mode</div><div class='del'>- * @buf_stack: Stack of empty buffers to store buffer info for out of order</div><div class='del'>- *	       buffer completions. See struct idpf_buf_lifo</div><div class='del'>- * @sched_buf_hash: Hash table to store buffers</div><div class='del'>- */</div><div class='del'>-struct idpf_txq_stash {</div><div class='del'>-	struct idpf_buf_lifo buf_stack;</div><div class='del'>-	DECLARE_HASHTABLE(sched_buf_hash, 12);</div><div class='del'>-} ____cacheline_aligned;</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * struct idpf_rx_queue - software structure representing a receive queue</div><div class='ctx'>  * @rx: universal receive descriptor array</div><div class='ctx'>  * @single_buf: buffer descriptor array in singleq</div><div class='ctx'>  * @desc_ring: virtual descriptor ring address</div><div class='ctx'>  * @bufq_sets: Pointer to the array of buffer queues in splitq mode</div><div class='ctx'>  * @napi: NAPI instance corresponding to this queue (splitq)</div><div class='add'>+ * @xdp_prog: attached XDP program</div><div class='ctx'>  * @rx_buf: See struct &amp;libeth_fqe</div><div class='ctx'>  * @pp: Page pool pointer in singleq mode</div><div class='del'>- * @netdev: &amp;net_device corresponding to this queue</div><div class='ctx'>  * @tail: Tail offset. Used for both queue models single and split.</div><div class='ctx'>  * @flags: See enum idpf_queue_flags_t</div><div class='ctx'>  * @idx: For RX queue, it is used to index to total RX queue across groups and</div><div class='ctx'>  *	 used for skb reporting.</div><div class='ctx'>  * @desc_count: Number of descriptors</div><div class='add'>+ * @num_xdp_txq: total number of XDP Tx queues</div><div class='add'>+ * @xdpsqs: shortcut for XDP Tx queues array</div><div class='ctx'>  * @rxdids: Supported RX descriptor ids</div><div class='add'>+ * @truesize: data buffer truesize in singleq</div><div class='ctx'>  * @rx_ptype_lkup: LUT of Rx ptypes</div><div class='add'>+ * @xdp_rxq: XDP queue info</div><div class='ctx'>  * @next_to_use: Next descriptor to use</div><div class='ctx'>  * @next_to_clean: Next descriptor to clean</div><div class='ctx'>  * @next_to_alloc: RX buffer to allocate at</div><div class='del'>- * @skb: Pointer to the skb</div><div class='del'>- * @truesize: data buffer truesize in singleq</div><div class='add'>+ * @xdp: XDP buffer with the current frame</div><div class='add'>+ * @xsk: current XDP buffer in XSk mode</div><div class='add'>+ * @pool: XSk pool if installed</div><div class='add'>+ * @cached_phc_time: Cached PHC time for the Rx queue</div><div class='ctx'>  * @stats_sync: See struct u64_stats_sync</div><div class='ctx'>  * @q_stats: See union idpf_rx_queue_stats</div><div class='ctx'>  * @q_id: Queue id</div><div class='hunk'>@@ -532,30 +523,45 @@ struct idpf_rx_queue {</div><div class='ctx'> 		struct {</div><div class='ctx'> 			struct idpf_bufq_set *bufq_sets;</div><div class='ctx'> 			struct napi_struct *napi;</div><div class='add'>+			struct bpf_prog __rcu *xdp_prog;</div><div class='ctx'> 		};</div><div class='ctx'> 		struct {</div><div class='ctx'> 			struct libeth_fqe *rx_buf;</div><div class='ctx'> 			struct page_pool *pp;</div><div class='add'>+			void __iomem *tail;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	void __iomem *tail;</div><div class='ctx'> </div><div class='ctx'> 	DECLARE_BITMAP(flags, __IDPF_Q_FLAGS_NBITS);</div><div class='ctx'> 	u16 idx;</div><div class='ctx'> 	u16 desc_count;</div><div class='ctx'> </div><div class='del'>-	u32 rxdids;</div><div class='add'>+	u32 num_xdp_txq;</div><div class='add'>+	union {</div><div class='add'>+		struct idpf_tx_queue **xdpsqs;</div><div class='add'>+		struct {</div><div class='add'>+			u32 rxdids;</div><div class='add'>+			u32 truesize;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> 	const struct libeth_rx_pt *rx_ptype_lkup;</div><div class='add'>+</div><div class='add'>+	struct xdp_rxq_info xdp_rxq;</div><div class='ctx'> 	__cacheline_group_end_aligned(read_mostly);</div><div class='ctx'> </div><div class='ctx'> 	__cacheline_group_begin_aligned(read_write);</div><div class='del'>-	u16 next_to_use;</div><div class='del'>-	u16 next_to_clean;</div><div class='del'>-	u16 next_to_alloc;</div><div class='add'>+	u32 next_to_use;</div><div class='add'>+	u32 next_to_clean;</div><div class='add'>+	u32 next_to_alloc;</div><div class='ctx'> </div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	u32 truesize;</div><div class='add'>+	union {</div><div class='add'>+		struct libeth_xdp_buff_stash xdp;</div><div class='add'>+		struct {</div><div class='add'>+			struct libeth_xdp_buff *xsk;</div><div class='add'>+			struct xsk_buff_pool *pool;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	u64 cached_phc_time;</div><div class='ctx'> </div><div class='ctx'> 	struct u64_stats_sync stats_sync;</div><div class='ctx'> 	struct idpf_rx_queue_stats q_stats;</div><div class='hunk'>@@ -574,8 +580,11 @@ struct idpf_rx_queue {</div><div class='ctx'> 	u16 rx_max_pkt_size;</div><div class='ctx'> 	__cacheline_group_end_aligned(cold);</div><div class='ctx'> };</div><div class='del'>-libeth_cacheline_set_assert(struct idpf_rx_queue, 64,</div><div class='del'>-			    80 + sizeof(struct u64_stats_sync),</div><div class='add'>+libeth_cacheline_set_assert(struct idpf_rx_queue,</div><div class='add'>+			    ALIGN(64, __alignof(struct xdp_rxq_info)) +</div><div class='add'>+			    sizeof(struct xdp_rxq_info),</div><div class='add'>+			    96 + offsetof(struct idpf_rx_queue, q_stats) -</div><div class='add'>+			    offsetofend(struct idpf_rx_queue, cached_phc_time),</div><div class='ctx'> 			    32);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -587,36 +596,21 @@ libeth_cacheline_set_assert(struct idpf_rx_queue, 64,</div><div class='ctx'>  * @desc_ring: virtual descriptor ring address</div><div class='ctx'>  * @tx_buf: See struct idpf_tx_buf</div><div class='ctx'>  * @txq_grp: See struct idpf_txq_group</div><div class='add'>+ * @complq: corresponding completion queue in XDP mode</div><div class='ctx'>  * @dev: Device back pointer for DMA mapping</div><div class='add'>+ * @pool: corresponding XSk pool if installed</div><div class='ctx'>  * @tail: Tail offset. Used for both queue models single and split</div><div class='ctx'>  * @flags: See enum idpf_queue_flags_t</div><div class='ctx'>  * @idx: For TX queue, it is used as index to map between TX queue group and</div><div class='ctx'>  *	 hot path TX pointers stored in vport. Used in both singleq/splitq.</div><div class='ctx'>  * @desc_count: Number of descriptors</div><div class='ctx'>  * @tx_min_pkt_len: Min supported packet length</div><div class='del'>- * @compl_tag_gen_s: Completion tag generation bit</div><div class='del'>- *	The format of the completion tag will change based on the TXQ</div><div class='del'>- *	descriptor ring size so that we can maintain roughly the same level</div><div class='del'>- *	of "uniqueness" across all descriptor sizes. For example, if the</div><div class='del'>- *	TXQ descriptor ring size is 64 (the minimum size supported), the</div><div class='del'>- *	completion tag will be formatted as below:</div><div class='del'>- *	15                 6 5         0</div><div class='del'>- *	--------------------------------</div><div class='del'>- *	|    GEN=0-1023     |IDX = 0-63|</div><div class='del'>- *	--------------------------------</div><div class='del'>- *</div><div class='del'>- *	This gives us 64*1024 = 65536 possible unique values. Similarly, if</div><div class='del'>- *	the TXQ descriptor ring size is 8160 (the maximum size supported),</div><div class='del'>- *	the completion tag will be formatted as below:</div><div class='del'>- *	15 13 12                       0</div><div class='del'>- *	--------------------------------</div><div class='del'>- *	|GEN |       IDX = 0-8159      |</div><div class='del'>- *	--------------------------------</div><div class='del'>- *</div><div class='del'>- *	This gives us 8*8160 = 65280 possible unique values.</div><div class='add'>+ * @thresh: XDP queue cleaning threshold</div><div class='ctx'>  * @netdev: &amp;net_device corresponding to this queue</div><div class='ctx'>  * @next_to_use: Next descriptor to use</div><div class='ctx'>  * @next_to_clean: Next descriptor to clean</div><div class='add'>+ * @last_re: last descriptor index that RE bit was set</div><div class='add'>+ * @tx_max_bufs: Max buffers that can be transmitted with scatter-gather</div><div class='ctx'>  * @cleaned_bytes: Splitq only, TXQ only: When a TX completion is received on</div><div class='ctx'>  *		   the TX completion queue, it can be for any TXQ associated</div><div class='ctx'>  *		   with that completion queue. This means we can clean up to</div><div class='hunk'>@@ -627,17 +621,21 @@ libeth_cacheline_set_assert(struct idpf_rx_queue, 64,</div><div class='ctx'>  *		   only once at the end of the cleaning routine.</div><div class='ctx'>  * @clean_budget: singleq only, queue cleaning budget</div><div class='ctx'>  * @cleaned_pkts: Number of packets cleaned for the above said case</div><div class='del'>- * @tx_max_bufs: Max buffers that can be transmitted with scatter-gather</div><div class='del'>- * @stash: Tx buffer stash for Flow-based scheduling mode</div><div class='del'>- * @compl_tag_bufid_m: Completion tag buffer id mask</div><div class='del'>- * @compl_tag_cur_gen: Used to keep track of current completion tag generation</div><div class='del'>- * @compl_tag_gen_max: To determine when compl_tag_cur_gen should be reset</div><div class='add'>+ * @refillq: Pointer to refill queue</div><div class='add'>+ * @pending: number of pending descriptors to send in QB</div><div class='add'>+ * @xdp_tx: number of pending &amp;xdp_buff or &amp;xdp_frame buffers</div><div class='add'>+ * @timer: timer for XDP Tx queue cleanup</div><div class='add'>+ * @xdp_lock: lock for XDP Tx queues sharing</div><div class='add'>+ * @cached_tstamp_caps: Tx timestamp capabilities negotiated with the CP</div><div class='add'>+ * @tstamp_task: Work that handles Tx timestamp read</div><div class='ctx'>  * @stats_sync: See struct u64_stats_sync</div><div class='ctx'>  * @q_stats: See union idpf_tx_queue_stats</div><div class='ctx'>  * @q_id: Queue id</div><div class='ctx'>  * @size: Length of descriptor ring in bytes</div><div class='ctx'>  * @dma: Physical address of ring</div><div class='ctx'>  * @q_vector: Backreference to associated vector</div><div class='add'>+ * @buf_pool_size: Total number of idpf_tx_buf</div><div class='add'>+ * @rel_q_id: relative virtchnl queue index</div><div class='ctx'>  */</div><div class='ctx'> struct idpf_tx_queue {</div><div class='ctx'> 	__cacheline_group_begin_aligned(read_mostly);</div><div class='hunk'>@@ -645,41 +643,61 @@ struct idpf_tx_queue {</div><div class='ctx'> 		struct idpf_base_tx_desc *base_tx;</div><div class='ctx'> 		struct idpf_base_tx_ctx_desc *base_ctx;</div><div class='ctx'> 		union idpf_tx_flex_desc *flex_tx;</div><div class='del'>-		struct idpf_flex_tx_ctx_desc *flex_ctx;</div><div class='add'>+		union idpf_flex_tx_ctx_desc *flex_ctx;</div><div class='ctx'> </div><div class='ctx'> 		void *desc_ring;</div><div class='ctx'> 	};</div><div class='ctx'> 	struct libeth_sqe *tx_buf;</div><div class='del'>-	struct idpf_txq_group *txq_grp;</div><div class='del'>-	struct device *dev;</div><div class='add'>+	union {</div><div class='add'>+		struct idpf_txq_group *txq_grp;</div><div class='add'>+		struct idpf_compl_queue *complq;</div><div class='add'>+	};</div><div class='add'>+	union {</div><div class='add'>+		struct device *dev;</div><div class='add'>+		struct xsk_buff_pool *pool;</div><div class='add'>+	};</div><div class='ctx'> 	void __iomem *tail;</div><div class='ctx'> </div><div class='ctx'> 	DECLARE_BITMAP(flags, __IDPF_Q_FLAGS_NBITS);</div><div class='ctx'> 	u16 idx;</div><div class='ctx'> 	u16 desc_count;</div><div class='ctx'> </div><div class='del'>-	u16 tx_min_pkt_len;</div><div class='del'>-	u16 compl_tag_gen_s;</div><div class='add'>+	union {</div><div class='add'>+		u16 tx_min_pkt_len;</div><div class='add'>+		u32 thresh;</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	__cacheline_group_end_aligned(read_mostly);</div><div class='ctx'> </div><div class='ctx'> 	__cacheline_group_begin_aligned(read_write);</div><div class='del'>-	u16 next_to_use;</div><div class='del'>-	u16 next_to_clean;</div><div class='add'>+	u32 next_to_use;</div><div class='add'>+	u32 next_to_clean;</div><div class='ctx'> </div><div class='ctx'> 	union {</div><div class='del'>-		u32 cleaned_bytes;</div><div class='del'>-		u32 clean_budget;</div><div class='del'>-	};</div><div class='del'>-	u16 cleaned_pkts;</div><div class='add'>+		struct {</div><div class='add'>+			u16 last_re;</div><div class='add'>+			u16 tx_max_bufs;</div><div class='add'>+</div><div class='add'>+			union {</div><div class='add'>+				u32 cleaned_bytes;</div><div class='add'>+				u32 clean_budget;</div><div class='add'>+			};</div><div class='add'>+			u16 cleaned_pkts;</div><div class='ctx'> </div><div class='del'>-	u16 tx_max_bufs;</div><div class='del'>-	struct idpf_txq_stash *stash;</div><div class='add'>+			struct idpf_sw_queue *refillq;</div><div class='add'>+		};</div><div class='add'>+		struct {</div><div class='add'>+			u32 pending;</div><div class='add'>+			u32 xdp_tx;</div><div class='add'>+</div><div class='add'>+			struct libeth_xdpsq_timer *timer;</div><div class='add'>+			struct libeth_xdpsq_lock xdp_lock;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	u16 compl_tag_bufid_m;</div><div class='del'>-	u16 compl_tag_cur_gen;</div><div class='del'>-	u16 compl_tag_gen_max;</div><div class='add'>+	struct idpf_ptp_vport_tx_tstamp_caps *cached_tstamp_caps;</div><div class='add'>+	struct work_struct *tstamp_task;</div><div class='ctx'> </div><div class='ctx'> 	struct u64_stats_sync stats_sync;</div><div class='ctx'> 	struct idpf_tx_queue_stats q_stats;</div><div class='hunk'>@@ -691,25 +709,36 @@ struct idpf_tx_queue {</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> </div><div class='ctx'> 	struct idpf_q_vector *q_vector;</div><div class='add'>+</div><div class='add'>+	u32 buf_pool_size;</div><div class='add'>+	u32 rel_q_id;</div><div class='ctx'> 	__cacheline_group_end_aligned(cold);</div><div class='ctx'> };</div><div class='ctx'> libeth_cacheline_set_assert(struct idpf_tx_queue, 64,</div><div class='del'>-			    88 + sizeof(struct u64_stats_sync),</div><div class='del'>-			    24);</div><div class='add'>+			    104 +</div><div class='add'>+			    offsetof(struct idpf_tx_queue, cached_tstamp_caps) -</div><div class='add'>+			    offsetofend(struct idpf_tx_queue, timer) +</div><div class='add'>+			    offsetof(struct idpf_tx_queue, q_stats) -</div><div class='add'>+			    offsetofend(struct idpf_tx_queue, tstamp_task),</div><div class='add'>+			    32);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct idpf_buf_queue - software structure representing a buffer queue</div><div class='ctx'>  * @split_buf: buffer descriptor array</div><div class='del'>- * @hdr_buf: &amp;libeth_fqe for header buffers</div><div class='del'>- * @hdr_pp: &amp;page_pool for header buffers</div><div class='ctx'>  * @buf: &amp;libeth_fqe for data buffers</div><div class='ctx'>  * @pp: &amp;page_pool for data buffers</div><div class='add'>+ * @xsk_buf: &amp;xdp_buff for XSk Rx buffers</div><div class='add'>+ * @pool: &amp;xsk_buff_pool on XSk queues</div><div class='add'>+ * @hdr_buf: &amp;libeth_fqe for header buffers</div><div class='add'>+ * @hdr_pp: &amp;page_pool for header buffers</div><div class='ctx'>  * @tail: Tail offset</div><div class='ctx'>  * @flags: See enum idpf_queue_flags_t</div><div class='ctx'>  * @desc_count: Number of descriptors</div><div class='add'>+ * @thresh: refill threshold in XSk</div><div class='ctx'>  * @next_to_use: Next descriptor to use</div><div class='ctx'>  * @next_to_clean: Next descriptor to clean</div><div class='ctx'>  * @next_to_alloc: RX buffer to allocate at</div><div class='add'>+ * @pending: number of buffers to refill (Xsk)</div><div class='ctx'>  * @hdr_truesize: truesize for buffer headers</div><div class='ctx'>  * @truesize: truesize for data buffers</div><div class='ctx'>  * @q_id: Queue id</div><div class='hunk'>@@ -723,14 +752,24 @@ libeth_cacheline_set_assert(struct idpf_tx_queue, 64,</div><div class='ctx'> struct idpf_buf_queue {</div><div class='ctx'> 	__cacheline_group_begin_aligned(read_mostly);</div><div class='ctx'> 	struct virtchnl2_splitq_rx_buf_desc *split_buf;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			struct libeth_fqe *buf;</div><div class='add'>+			struct page_pool *pp;</div><div class='add'>+		};</div><div class='add'>+		struct {</div><div class='add'>+			struct libeth_xdp_buff **xsk_buf;</div><div class='add'>+			struct xsk_buff_pool *pool;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='ctx'> 	struct libeth_fqe *hdr_buf;</div><div class='ctx'> 	struct page_pool *hdr_pp;</div><div class='del'>-	struct libeth_fqe *buf;</div><div class='del'>-	struct page_pool *pp;</div><div class='ctx'> 	void __iomem *tail;</div><div class='ctx'> </div><div class='ctx'> 	DECLARE_BITMAP(flags, __IDPF_Q_FLAGS_NBITS);</div><div class='ctx'> 	u32 desc_count;</div><div class='add'>+</div><div class='add'>+	u32 thresh;</div><div class='ctx'> 	__cacheline_group_end_aligned(read_mostly);</div><div class='ctx'> </div><div class='ctx'> 	__cacheline_group_begin_aligned(read_write);</div><div class='hunk'>@@ -738,6 +777,7 @@ struct idpf_buf_queue {</div><div class='ctx'> 	u32 next_to_clean;</div><div class='ctx'> 	u32 next_to_alloc;</div><div class='ctx'> </div><div class='add'>+	u32 pending;</div><div class='ctx'> 	u32 hdr_truesize;</div><div class='ctx'> 	u32 truesize;</div><div class='ctx'> 	__cacheline_group_end_aligned(read_write);</div><div class='hunk'>@@ -758,7 +798,9 @@ libeth_cacheline_set_assert(struct idpf_buf_queue, 64, 24, 32);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct idpf_compl_queue - software structure representing a completion queue</div><div class='del'>- * @comp: completion descriptor array</div><div class='add'>+ * @comp: 8-byte completion descriptor array</div><div class='add'>+ * @comp_4b: 4-byte completion descriptor array</div><div class='add'>+ * @desc_ring: virtual descriptor ring address</div><div class='ctx'>  * @txq_grp: See struct idpf_txq_group</div><div class='ctx'>  * @flags: See enum idpf_queue_flags_t</div><div class='ctx'>  * @desc_count: Number of descriptors</div><div class='hunk'>@@ -778,7 +820,12 @@ libeth_cacheline_set_assert(struct idpf_buf_queue, 64, 24, 32);</div><div class='ctx'>  */</div><div class='ctx'> struct idpf_compl_queue {</div><div class='ctx'> 	__cacheline_group_begin_aligned(read_mostly);</div><div class='del'>-	struct idpf_splitq_tx_compl_desc *comp;</div><div class='add'>+	union {</div><div class='add'>+		struct idpf_splitq_tx_compl_desc *comp;</div><div class='add'>+		struct idpf_splitq_4b_tx_compl_desc *comp_4b;</div><div class='add'>+</div><div class='add'>+		void *desc_ring;</div><div class='add'>+	};</div><div class='ctx'> 	struct idpf_txq_group *txq_grp;</div><div class='ctx'> </div><div class='ctx'> 	DECLARE_BITMAP(flags, __IDPF_Q_FLAGS_NBITS);</div><div class='hunk'>@@ -905,7 +952,6 @@ struct idpf_rxq_group {</div><div class='ctx'>  * @vport: Vport back pointer</div><div class='ctx'>  * @num_txq: Number of TX queues associated</div><div class='ctx'>  * @txqs: Array of TX queue pointers</div><div class='del'>- * @stashes: array of OOO stashes for the queues</div><div class='ctx'>  * @complq: Associated completion queue pointer, split queue only</div><div class='ctx'>  * @num_completions_pending: Total number of completions pending for the</div><div class='ctx'>  *			     completion queue, acculumated for all TX queues</div><div class='hunk'>@@ -920,7 +966,6 @@ struct idpf_txq_group {</div><div class='ctx'> </div><div class='ctx'> 	u16 num_txq;</div><div class='ctx'> 	struct idpf_tx_queue *txqs[IDPF_LARGE_MAX_Q];</div><div class='del'>-	struct idpf_txq_stash *stashes;</div><div class='ctx'> </div><div class='ctx'> 	struct idpf_compl_queue *complq;</div><div class='ctx'> </div><div class='hunk'>@@ -934,7 +979,7 @@ static inline int idpf_q_vector_to_mem(const struct idpf_q_vector *q_vector)</div><div class='ctx'> 	if (!q_vector)</div><div class='ctx'> 		return NUMA_NO_NODE;</div><div class='ctx'> </div><div class='del'>-	cpu = cpumask_first(q_vector-&gt;affinity_mask);</div><div class='add'>+	cpu = cpumask_first(&amp;q_vector-&gt;napi.config-&gt;affinity_mask);</div><div class='ctx'> </div><div class='ctx'> 	return cpu &lt; nr_cpu_ids ? cpu_to_mem(cpu) : NUMA_NO_NODE;</div><div class='ctx'> }</div><div class='hunk'>@@ -1013,6 +1058,17 @@ static inline void idpf_vport_intr_set_wb_on_itr(struct idpf_q_vector *q_vector)</div><div class='ctx'> 	       reg-&gt;dyn_ctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * idpf_tx_splitq_get_free_bufs - get number of free buf_ids in refillq</div><div class='add'>+ * @refillq: pointer to refillq containing buf_ids</div><div class='add'>+ */</div><div class='add'>+static inline u32 idpf_tx_splitq_get_free_bufs(struct idpf_sw_queue *refillq)</div><div class='add'>+{</div><div class='add'>+	return (refillq-&gt;next_to_use &gt; refillq-&gt;next_to_clean ?</div><div class='add'>+		0 : refillq-&gt;desc_count) +</div><div class='add'>+	       refillq-&gt;next_to_use - refillq-&gt;next_to_clean - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int idpf_vport_singleq_napi_poll(struct napi_struct *napi, int budget);</div><div class='ctx'> void idpf_vport_init_num_qs(struct idpf_vport *vport,</div><div class='ctx'> 			    struct virtchnl2_create_vport *vport_msg);</div><div class='hunk'>@@ -1033,31 +1089,30 @@ int idpf_config_rss(struct idpf_vport *vport);</div><div class='ctx'> int idpf_init_rss(struct idpf_vport *vport);</div><div class='ctx'> void idpf_deinit_rss(struct idpf_vport *vport);</div><div class='ctx'> int idpf_rx_bufs_init_all(struct idpf_vport *vport);</div><div class='del'>-void idpf_rx_add_frag(struct idpf_rx_buf *rx_buf, struct sk_buff *skb,</div><div class='del'>-		      unsigned int size);</div><div class='del'>-struct sk_buff *idpf_rx_build_skb(const struct libeth_fqe *buf, u32 size);</div><div class='add'>+</div><div class='add'>+struct idpf_q_vector *idpf_find_rxq_vec(const struct idpf_vport *vport,</div><div class='add'>+					u32 q_num);</div><div class='add'>+struct idpf_q_vector *idpf_find_txq_vec(const struct idpf_vport *vport,</div><div class='add'>+					u32 q_num);</div><div class='add'>+int idpf_qp_switch(struct idpf_vport *vport, u32 qid, bool en);</div><div class='add'>+</div><div class='ctx'> void idpf_tx_buf_hw_update(struct idpf_tx_queue *tx_q, u32 val,</div><div class='ctx'> 			   bool xmit_more);</div><div class='ctx'> unsigned int idpf_size_to_txd_count(unsigned int size);</div><div class='ctx'> netdev_tx_t idpf_tx_drop_skb(struct idpf_tx_queue *tx_q, struct sk_buff *skb);</div><div class='del'>-void idpf_tx_dma_map_error(struct idpf_tx_queue *txq, struct sk_buff *skb,</div><div class='del'>-			   struct idpf_tx_buf *first, u16 ring_idx);</div><div class='del'>-unsigned int idpf_tx_desc_count_required(struct idpf_tx_queue *txq,</div><div class='del'>-					 struct sk_buff *skb);</div><div class='add'>+unsigned int idpf_tx_res_count_required(struct idpf_tx_queue *txq,</div><div class='add'>+					struct sk_buff *skb, u32 *buf_count);</div><div class='ctx'> void idpf_tx_timeout(struct net_device *netdev, unsigned int txqueue);</div><div class='ctx'> netdev_tx_t idpf_tx_singleq_frame(struct sk_buff *skb,</div><div class='ctx'> 				  struct idpf_tx_queue *tx_q);</div><div class='ctx'> netdev_tx_t idpf_tx_start(struct sk_buff *skb, struct net_device *netdev);</div><div class='ctx'> bool idpf_rx_singleq_buf_hw_alloc_all(struct idpf_rx_queue *rxq,</div><div class='ctx'> 				      u16 cleaned_count);</div><div class='add'>+bool idpf_rx_process_skb_fields(struct sk_buff *skb,</div><div class='add'>+				const struct libeth_xdp_buff *xdp,</div><div class='add'>+				struct libeth_rq_napi_stats *rs);</div><div class='ctx'> int idpf_tso(struct sk_buff *skb, struct idpf_tx_offload_params *off);</div><div class='ctx'> </div><div class='del'>-static inline bool idpf_tx_maybe_stop_common(struct idpf_tx_queue *tx_q,</div><div class='del'>-					     u32 needed)</div><div class='del'>-{</div><div class='del'>-	return !netif_subqueue_maybe_stop(tx_q-&gt;netdev, tx_q-&gt;idx,</div><div class='del'>-					  IDPF_DESC_UNUSED(tx_q),</div><div class='del'>-					  needed, needed);</div><div class='del'>-}</div><div class='add'>+void idpf_wait_for_sw_marker_completion(const struct idpf_tx_queue *txq);</div><div class='ctx'> </div><div class='ctx'> #endif /* !_IDPF_TXRX_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c b/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c<br/>index aad62e270ae4..4cc58c83688c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_vf_dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_vf_dev.c</a></div><div class='hunk'>@@ -9,10 +9,13 @@</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * idpf_vf_ctlq_reg_init - initialize default mailbox registers</div><div class='add'>+ * @adapter: adapter structure</div><div class='ctx'>  * @cq: pointer to the array of create control queues</div><div class='ctx'>  */</div><div class='del'>-static void idpf_vf_ctlq_reg_init(struct idpf_ctlq_create_info *cq)</div><div class='add'>+static void idpf_vf_ctlq_reg_init(struct idpf_adapter *adapter,</div><div class='add'>+				  struct idpf_ctlq_create_info *cq)</div><div class='ctx'> {</div><div class='add'>+	resource_size_t mbx_start = adapter-&gt;dev_ops.static_reg_info[0].start;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; IDPF_NUM_DFLT_MBX_Q; i++) {</div><div class='hunk'>@@ -21,22 +24,22 @@ static void idpf_vf_ctlq_reg_init(struct idpf_ctlq_create_info *cq)</div><div class='ctx'> 		switch (ccq-&gt;type) {</div><div class='ctx'> 		case IDPF_CTLQ_TYPE_MAILBOX_TX:</div><div class='ctx'> 			/* set head and tail registers in our local struct */</div><div class='del'>-			ccq-&gt;reg.head = VF_ATQH;</div><div class='del'>-			ccq-&gt;reg.tail = VF_ATQT;</div><div class='del'>-			ccq-&gt;reg.len = VF_ATQLEN;</div><div class='del'>-			ccq-&gt;reg.bah = VF_ATQBAH;</div><div class='del'>-			ccq-&gt;reg.bal = VF_ATQBAL;</div><div class='add'>+			ccq-&gt;reg.head = VF_ATQH - mbx_start;</div><div class='add'>+			ccq-&gt;reg.tail = VF_ATQT - mbx_start;</div><div class='add'>+			ccq-&gt;reg.len = VF_ATQLEN - mbx_start;</div><div class='add'>+			ccq-&gt;reg.bah = VF_ATQBAH - mbx_start;</div><div class='add'>+			ccq-&gt;reg.bal = VF_ATQBAL - mbx_start;</div><div class='ctx'> 			ccq-&gt;reg.len_mask = VF_ATQLEN_ATQLEN_M;</div><div class='ctx'> 			ccq-&gt;reg.len_ena_mask = VF_ATQLEN_ATQENABLE_M;</div><div class='ctx'> 			ccq-&gt;reg.head_mask = VF_ATQH_ATQH_M;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case IDPF_CTLQ_TYPE_MAILBOX_RX:</div><div class='ctx'> 			/* set head and tail registers in our local struct */</div><div class='del'>-			ccq-&gt;reg.head = VF_ARQH;</div><div class='del'>-			ccq-&gt;reg.tail = VF_ARQT;</div><div class='del'>-			ccq-&gt;reg.len = VF_ARQLEN;</div><div class='del'>-			ccq-&gt;reg.bah = VF_ARQBAH;</div><div class='del'>-			ccq-&gt;reg.bal = VF_ARQBAL;</div><div class='add'>+			ccq-&gt;reg.head = VF_ARQH - mbx_start;</div><div class='add'>+			ccq-&gt;reg.tail = VF_ARQT - mbx_start;</div><div class='add'>+			ccq-&gt;reg.len = VF_ARQLEN - mbx_start;</div><div class='add'>+			ccq-&gt;reg.bah = VF_ARQBAH - mbx_start;</div><div class='add'>+			ccq-&gt;reg.bal = VF_ARQBAL - mbx_start;</div><div class='ctx'> 			ccq-&gt;reg.len_mask = VF_ARQLEN_ARQLEN_M;</div><div class='ctx'> 			ccq-&gt;reg.len_ena_mask = VF_ARQLEN_ARQENABLE_M;</div><div class='ctx'> 			ccq-&gt;reg.head_mask = VF_ARQH_ARQH_M;</div><div class='hunk'>@@ -73,7 +76,7 @@ static int idpf_vf_intr_reg_init(struct idpf_vport *vport)</div><div class='ctx'> 	int num_vecs = vport-&gt;num_q_vectors;</div><div class='ctx'> 	struct idpf_vec_regs *reg_vals;</div><div class='ctx'> 	int num_regs, i, err = 0;</div><div class='del'>-	u32 rx_itr, tx_itr;</div><div class='add'>+	u32 rx_itr, tx_itr, val;</div><div class='ctx'> 	u16 total_vecs;</div><div class='ctx'> </div><div class='ctx'> 	total_vecs = idpf_get_reserved_vecs(vport-&gt;adapter);</div><div class='hunk'>@@ -101,6 +104,9 @@ static int idpf_vf_intr_reg_init(struct idpf_vport *vport)</div><div class='ctx'> 		intr-&gt;dyn_ctl_itridx_s = VF_INT_DYN_CTLN_ITR_INDX_S;</div><div class='ctx'> 		intr-&gt;dyn_ctl_intrvl_s = VF_INT_DYN_CTLN_INTERVAL_S;</div><div class='ctx'> 		intr-&gt;dyn_ctl_wb_on_itr_m = VF_INT_DYN_CTLN_WB_ON_ITR_M;</div><div class='add'>+		intr-&gt;dyn_ctl_swint_trig_m = VF_INT_DYN_CTLN_SWINT_TRIG_M;</div><div class='add'>+		intr-&gt;dyn_ctl_sw_itridx_ena_m =</div><div class='add'>+			VF_INT_DYN_CTLN_SW_ITR_INDX_ENA_M;</div><div class='ctx'> </div><div class='ctx'> 		spacing = IDPF_ITR_IDX_SPACING(reg_vals[vec_id].itrn_index_spacing,</div><div class='ctx'> 					       IDPF_VF_ITR_IDX_SPACING);</div><div class='hunk'>@@ -114,6 +120,15 @@ static int idpf_vf_intr_reg_init(struct idpf_vport *vport)</div><div class='ctx'> 		intr-&gt;tx_itr = idpf_get_reg_addr(adapter, tx_itr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Data vector for NOIRQ queues */</div><div class='add'>+</div><div class='add'>+	val = reg_vals[vport-&gt;q_vector_idxs[i] - IDPF_MBX_Q_VEC].dyn_ctl_reg;</div><div class='add'>+	vport-&gt;noirq_dyn_ctl = idpf_get_reg_addr(adapter, val);</div><div class='add'>+</div><div class='add'>+	val = VF_INT_DYN_CTLN_WB_ON_ITR_M | VF_INT_DYN_CTLN_INTENA_MSK_M |</div><div class='add'>+	      FIELD_PREP(VF_INT_DYN_CTLN_ITR_INDX_M, IDPF_NO_ITR_UPDATE_IDX);</div><div class='add'>+	vport-&gt;noirq_dyn_ctl_ena = val;</div><div class='add'>+</div><div class='ctx'> free_reg_vals:</div><div class='ctx'> 	kfree(reg_vals);</div><div class='ctx'> </div><div class='hunk'>@@ -126,7 +141,7 @@ free_reg_vals:</div><div class='ctx'>  */</div><div class='ctx'> static void idpf_vf_reset_reg_init(struct idpf_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	adapter-&gt;reset_reg.rstat = idpf_get_reg_addr(adapter, VFGEN_RSTAT);</div><div class='add'>+	adapter-&gt;reset_reg.rstat = idpf_get_rstat_reg_addr(adapter, VFGEN_RSTAT);</div><div class='ctx'> 	adapter-&gt;reset_reg.rstat_m = VFGEN_RSTAT_VFR_STATE_M;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -145,6 +160,17 @@ static void idpf_vf_trigger_reset(struct idpf_adapter *adapter,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * idpf_idc_vf_register - register for IDC callbacks</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_idc_vf_register(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return idpf_idc_init_aux_core_dev(adapter, IIDC_FUNCTION_TYPE_VF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * idpf_vf_reg_ops_init - Initialize register API function pointers</div><div class='ctx'>  * @adapter: Driver specific private structure</div><div class='ctx'>  */</div><div class='hunk'>@@ -164,4 +190,11 @@ static void idpf_vf_reg_ops_init(struct idpf_adapter *adapter)</div><div class='ctx'> void idpf_vf_dev_ops_init(struct idpf_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	idpf_vf_reg_ops_init(adapter);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;dev_ops.idc_init = idpf_idc_vf_register;</div><div class='add'>+</div><div class='add'>+	resource_set_range(&amp;adapter-&gt;dev_ops.static_reg_info[0],</div><div class='add'>+			   VF_BASE, IDPF_VF_MBX_REGION_SZ);</div><div class='add'>+	resource_set_range(&amp;adapter-&gt;dev_ops.static_reg_info[1],</div><div class='add'>+			   VFGEN_RSTAT, IDPF_VF_RSTAT_REGION_SZ);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c<br/>index 15c00a01f1c0..44cd4b466c48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_virtchnl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_virtchnl.c</a></div><div class='hunk'>@@ -1,92 +1,12 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Copyright (C) 2023 Intel Corporation */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;net/libeth/rx.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "idpf.h"</div><div class='ctx'> #include "idpf_virtchnl.h"</div><div class='del'>-</div><div class='del'>-#define IDPF_VC_XN_MIN_TIMEOUT_MSEC	2000</div><div class='del'>-#define IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC	(60 * 1000)</div><div class='del'>-#define IDPF_VC_XN_IDX_M		GENMASK(7, 0)</div><div class='del'>-#define IDPF_VC_XN_SALT_M		GENMASK(15, 8)</div><div class='del'>-#define IDPF_VC_XN_RING_LEN		U8_MAX</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * enum idpf_vc_xn_state - Virtchnl transaction status</div><div class='del'>- * @IDPF_VC_XN_IDLE: not expecting a reply, ready to be used</div><div class='del'>- * @IDPF_VC_XN_WAITING: expecting a reply, not yet received</div><div class='del'>- * @IDPF_VC_XN_COMPLETED_SUCCESS: a reply was expected and received,</div><div class='del'>- *				  buffer updated</div><div class='del'>- * @IDPF_VC_XN_COMPLETED_FAILED: a reply was expected and received, but there</div><div class='del'>- *				 was an error, buffer not updated</div><div class='del'>- * @IDPF_VC_XN_SHUTDOWN: transaction object cannot be used, VC torn down</div><div class='del'>- * @IDPF_VC_XN_ASYNC: transaction sent asynchronously and doesn't have the</div><div class='del'>- *		      return context; a callback may be provided to handle</div><div class='del'>- *		      return</div><div class='del'>- */</div><div class='del'>-enum idpf_vc_xn_state {</div><div class='del'>-	IDPF_VC_XN_IDLE = 1,</div><div class='del'>-	IDPF_VC_XN_WAITING,</div><div class='del'>-	IDPF_VC_XN_COMPLETED_SUCCESS,</div><div class='del'>-	IDPF_VC_XN_COMPLETED_FAILED,</div><div class='del'>-	IDPF_VC_XN_SHUTDOWN,</div><div class='del'>-	IDPF_VC_XN_ASYNC,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct idpf_vc_xn;</div><div class='del'>-/* Callback for asynchronous messages */</div><div class='del'>-typedef int (*async_vc_cb) (struct idpf_adapter *, struct idpf_vc_xn *,</div><div class='del'>-			    const struct idpf_ctlq_msg *);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct idpf_vc_xn - Data structure representing virtchnl transactions</div><div class='del'>- * @completed: virtchnl event loop uses that to signal when a reply is</div><div class='del'>- *	       available, uses kernel completion API</div><div class='del'>- * @state: virtchnl event loop stores the data below, protected by the</div><div class='del'>- *	   completion's lock.</div><div class='del'>- * @reply_sz: Original size of reply, may be &gt; reply_buf.iov_len; it will be</div><div class='del'>- *	      truncated on its way to the receiver thread according to</div><div class='del'>- *	      reply_buf.iov_len.</div><div class='del'>- * @reply: Reference to the buffer(s) where the reply data should be written</div><div class='del'>- *	   to. May be 0-length (then NULL address permitted) if the reply data</div><div class='del'>- *	   should be ignored.</div><div class='del'>- * @async_handler: if sent asynchronously, a callback can be provided to handle</div><div class='del'>- *		   the reply when it's received</div><div class='del'>- * @vc_op: corresponding opcode sent with this transaction</div><div class='del'>- * @idx: index used as retrieval on reply receive, used for cookie</div><div class='del'>- * @salt: changed every message to make unique, used for cookie</div><div class='del'>- */</div><div class='del'>-struct idpf_vc_xn {</div><div class='del'>-	struct completion completed;</div><div class='del'>-	enum idpf_vc_xn_state state;</div><div class='del'>-	size_t reply_sz;</div><div class='del'>-	struct kvec reply;</div><div class='del'>-	async_vc_cb async_handler;</div><div class='del'>-	u32 vc_op;</div><div class='del'>-	u8 idx;</div><div class='del'>-	u8 salt;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * struct idpf_vc_xn_params - Parameters for executing transaction</div><div class='del'>- * @send_buf: kvec for send buffer</div><div class='del'>- * @recv_buf: kvec for recv buffer, may be NULL, must then have zero length</div><div class='del'>- * @timeout_ms: timeout to wait for reply</div><div class='del'>- * @async: send message asynchronously, will not wait on completion</div><div class='del'>- * @async_handler: If sent asynchronously, optional callback handler. The user</div><div class='del'>- *		   must be careful when using async handlers as the memory for</div><div class='del'>- *		   the recv_buf _cannot_ be on stack if this is async.</div><div class='del'>- * @vc_op: virtchnl op to send</div><div class='del'>- */</div><div class='del'>-struct idpf_vc_xn_params {</div><div class='del'>-	struct kvec send_buf;</div><div class='del'>-	struct kvec recv_buf;</div><div class='del'>-	int timeout_ms;</div><div class='del'>-	bool async;</div><div class='del'>-	async_vc_cb async_handler;</div><div class='del'>-	u32 vc_op;</div><div class='del'>-};</div><div class='add'>+#include "idpf_ptp.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct idpf_vc_xn_manager - Manager for tracking transactions</div><div class='hunk'>@@ -141,14 +61,14 @@ static void idpf_handle_event_link(struct idpf_adapter *adapter,</div><div class='ctx'> 	}</div><div class='ctx'> 	np = netdev_priv(vport-&gt;netdev);</div><div class='ctx'> </div><div class='del'>-	vport-&gt;link_speed_mbps = le32_to_cpu(v2e-&gt;link_speed);</div><div class='add'>+	np-&gt;link_speed_mbps = le32_to_cpu(v2e-&gt;link_speed);</div><div class='ctx'> </div><div class='ctx'> 	if (vport-&gt;link_up == v2e-&gt;link_status)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	vport-&gt;link_up = v2e-&gt;link_status;</div><div class='ctx'> </div><div class='del'>-	if (np-&gt;state != __IDPF_VPORT_UP)</div><div class='add'>+	if (!test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (vport-&gt;link_up) {</div><div class='hunk'>@@ -235,6 +155,55 @@ err_kfree:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_is_mb_msg - Check if the message is PTP-related</div><div class='add'>+ * @op: virtchnl opcode</div><div class='add'>+ *</div><div class='add'>+ * Return: true if msg is PTP-related, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool idpf_ptp_is_mb_msg(u32 op)</div><div class='add'>+{</div><div class='add'>+	switch (op) {</div><div class='add'>+	case VIRTCHNL2_OP_PTP_GET_DEV_CLK_TIME:</div><div class='add'>+	case VIRTCHNL2_OP_PTP_GET_CROSS_TIME:</div><div class='add'>+	case VIRTCHNL2_OP_PTP_SET_DEV_CLK_TIME:</div><div class='add'>+	case VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_FINE:</div><div class='add'>+	case VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_TIME:</div><div class='add'>+	case VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP_CAPS:</div><div class='add'>+	case VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_prepare_ptp_mb_msg - Prepare PTP related message</div><div class='add'>+ *</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @op: virtchnl opcode</div><div class='add'>+ * @ctlq_msg: Corresponding control queue message</div><div class='add'>+ */</div><div class='add'>+static void idpf_prepare_ptp_mb_msg(struct idpf_adapter *adapter, u32 op,</div><div class='add'>+				    struct idpf_ctlq_msg *ctlq_msg)</div><div class='add'>+{</div><div class='add'>+	/* If the message is PTP-related and the secondary mailbox is available,</div><div class='add'>+	 * send the message through the secondary mailbox.</div><div class='add'>+	 */</div><div class='add'>+	if (!idpf_ptp_is_mb_msg(op) || !adapter-&gt;ptp-&gt;secondary_mbx.valid)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ctlq_msg-&gt;opcode = idpf_mbq_opc_send_msg_to_peer_drv;</div><div class='add'>+	ctlq_msg-&gt;func_id = adapter-&gt;ptp-&gt;secondary_mbx.peer_mbx_q_id;</div><div class='add'>+	ctlq_msg-&gt;host_id = adapter-&gt;ptp-&gt;secondary_mbx.peer_id;</div><div class='add'>+}</div><div class='add'>+#else /* !CONFIG_PTP_1588_CLOCK */</div><div class='add'>+static void idpf_prepare_ptp_mb_msg(struct idpf_adapter *adapter, u32 op,</div><div class='add'>+				    struct idpf_ctlq_msg *ctlq_msg)</div><div class='add'>+{ }</div><div class='add'>+#endif /* CONFIG_PTP_1588_CLOCK */</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_send_mb_msg - Send message over mailbox</div><div class='ctx'>  * @adapter: Driver specific private structure</div><div class='hunk'>@@ -278,6 +247,9 @@ int idpf_send_mb_msg(struct idpf_adapter *adapter, u32 op,</div><div class='ctx'> </div><div class='ctx'> 	ctlq_msg-&gt;opcode = idpf_mbq_opc_send_msg_to_cp;</div><div class='ctx'> 	ctlq_msg-&gt;func_id = 0;</div><div class='add'>+</div><div class='add'>+	idpf_prepare_ptp_mb_msg(adapter, op, ctlq_msg);</div><div class='add'>+</div><div class='ctx'> 	ctlq_msg-&gt;data_len = msg_size;</div><div class='ctx'> 	ctlq_msg-&gt;cookie.mbx.chnl_opcode = op;</div><div class='ctx'> 	ctlq_msg-&gt;cookie.mbx.chnl_retval = 0;</div><div class='hunk'>@@ -376,7 +348,7 @@ static void idpf_vc_xn_init(struct idpf_vc_xn_manager *vcxn_mngr)</div><div class='ctx'>  * All waiting threads will be woken-up and their transaction aborted. Further</div><div class='ctx'>  * operations on that object will fail.</div><div class='ctx'>  */</div><div class='del'>-static void idpf_vc_xn_shutdown(struct idpf_vc_xn_manager *vcxn_mngr)</div><div class='add'>+void idpf_vc_xn_shutdown(struct idpf_vc_xn_manager *vcxn_mngr)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -449,8 +421,8 @@ static void idpf_vc_xn_push_free(struct idpf_vc_xn_manager *vcxn_mngr,</div><div class='ctx'>  * &gt;= @recv_buf.iov_len, but we never overflow @@recv_buf_iov_base). &lt; 0 for</div><div class='ctx'>  * error.</div><div class='ctx'>  */</div><div class='del'>-static ssize_t idpf_vc_xn_exec(struct idpf_adapter *adapter,</div><div class='del'>-			       const struct idpf_vc_xn_params *params)</div><div class='add'>+ssize_t idpf_vc_xn_exec(struct idpf_adapter *adapter,</div><div class='add'>+			const struct idpf_vc_xn_params *params)</div><div class='ctx'> {</div><div class='ctx'> 	const struct kvec *send_buf = &amp;params-&gt;send_buf;</div><div class='ctx'> 	struct idpf_vc_xn *xn;</div><div class='hunk'>@@ -517,8 +489,10 @@ static ssize_t idpf_vc_xn_exec(struct idpf_adapter *adapter,</div><div class='ctx'> 		retval = -ENXIO;</div><div class='ctx'> 		goto only_unlock;</div><div class='ctx'> 	case IDPF_VC_XN_WAITING:</div><div class='del'>-		dev_notice_ratelimited(&amp;adapter-&gt;pdev-&gt;dev, "Transaction timed-out (op %d, %dms)\n",</div><div class='del'>-				       params-&gt;vc_op, params-&gt;timeout_ms);</div><div class='add'>+		dev_notice_ratelimited(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				       "Transaction timed-out (op:%d cookie:%04x vc_op:%d salt:%02x timeout:%dms)\n",</div><div class='add'>+				       params-&gt;vc_op, cookie, xn-&gt;vc_op,</div><div class='add'>+				       xn-&gt;salt, params-&gt;timeout_ms);</div><div class='ctx'> 		retval = -ETIME;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IDPF_VC_XN_COMPLETED_SUCCESS:</div><div class='hunk'>@@ -612,14 +586,16 @@ idpf_vc_xn_forward_reply(struct idpf_adapter *adapter,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	xn = &amp;adapter-&gt;vcxn_mngr-&gt;ring[xn_idx];</div><div class='add'>+	idpf_vc_xn_lock(xn);</div><div class='ctx'> 	salt = FIELD_GET(IDPF_VC_XN_SALT_M, msg_info);</div><div class='ctx'> 	if (xn-&gt;salt != salt) {</div><div class='del'>-		dev_err_ratelimited(&amp;adapter-&gt;pdev-&gt;dev, "Transaction salt does not match (%02x != %02x)\n",</div><div class='del'>-				    xn-&gt;salt, salt);</div><div class='add'>+		dev_err_ratelimited(&amp;adapter-&gt;pdev-&gt;dev, "Transaction salt does not match (exp:%d@%02x(%d) != got:%d@%02x)\n",</div><div class='add'>+				    xn-&gt;vc_op, xn-&gt;salt, xn-&gt;state,</div><div class='add'>+				    ctlq_msg-&gt;cookie.mbx.chnl_opcode, salt);</div><div class='add'>+		idpf_vc_xn_unlock(xn);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	idpf_vc_xn_lock(xn);</div><div class='ctx'> 	switch (xn-&gt;state) {</div><div class='ctx'> 	case IDPF_VC_XN_WAITING:</div><div class='ctx'> 		/* success */</div><div class='hunk'>@@ -726,9 +702,9 @@ int idpf_recv_mb_msg(struct idpf_adapter *adapter)</div><div class='ctx'> 		/* If post failed clear the only buffer we supplied */</div><div class='ctx'> 		if (post_err) {</div><div class='ctx'> 			if (dma_mem)</div><div class='del'>-				dmam_free_coherent(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='del'>-						   dma_mem-&gt;size, dma_mem-&gt;va,</div><div class='del'>-						   dma_mem-&gt;pa);</div><div class='add'>+				dma_free_coherent(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+						  dma_mem-&gt;size, dma_mem-&gt;va,</div><div class='add'>+						  dma_mem-&gt;pa);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -740,34 +716,145 @@ int idpf_recv_mb_msg(struct idpf_adapter *adapter)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct idpf_chunked_msg_params {</div><div class='add'>+	u32			(*prepare_msg)(const struct idpf_vport *vport,</div><div class='add'>+					       void *buf, const void *pos,</div><div class='add'>+					       u32 num);</div><div class='add'>+</div><div class='add'>+	const void		*chunks;</div><div class='add'>+	u32			num_chunks;</div><div class='add'>+</div><div class='add'>+	u32			chunk_sz;</div><div class='add'>+	u32			config_sz;</div><div class='add'>+</div><div class='add'>+	u32			vc_op;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct idpf_queue_set *idpf_alloc_queue_set(struct idpf_vport *vport, u32 num)</div><div class='add'>+{</div><div class='add'>+	struct idpf_queue_set *qp;</div><div class='add'>+</div><div class='add'>+	qp = kzalloc(struct_size(qp, qs, num), GFP_KERNEL);</div><div class='add'>+	if (!qp)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	qp-&gt;vport = vport;</div><div class='add'>+	qp-&gt;num = num;</div><div class='add'>+</div><div class='add'>+	return qp;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='del'>- * idpf_wait_for_marker_event - wait for software marker response</div><div class='add'>+ * idpf_send_chunked_msg - send VC message consisting of chunks</div><div class='ctx'>  * @vport: virtual port data structure</div><div class='add'>+ * @params: message params</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 success, negative on failure.</div><div class='del'>- **/</div><div class='del'>-static int idpf_wait_for_marker_event(struct idpf_vport *vport)</div><div class='add'>+ * Helper function for preparing a message describing queues to be enabled</div><div class='add'>+ * or disabled.</div><div class='add'>+ *</div><div class='add'>+ * Return: the total size of the prepared message.</div><div class='add'>+ */</div><div class='add'>+static int idpf_send_chunked_msg(struct idpf_vport *vport,</div><div class='add'>+				 const struct idpf_chunked_msg_params *params)</div><div class='ctx'> {</div><div class='del'>-	int event;</div><div class='del'>-	int i;</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {</div><div class='add'>+		.vc_op		= params-&gt;vc_op,</div><div class='add'>+		.timeout_ms	= IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,</div><div class='add'>+	};</div><div class='add'>+	const void *pos = params-&gt;chunks;</div><div class='add'>+	u32 num_chunks, num_msgs, buf_sz;</div><div class='add'>+	void *buf __free(kfree) = NULL;</div><div class='add'>+	u32 totqs = params-&gt;num_chunks;</div><div class='add'>+</div><div class='add'>+	num_chunks = min(IDPF_NUM_CHUNKS_PER_MSG(params-&gt;config_sz,</div><div class='add'>+						 params-&gt;chunk_sz), totqs);</div><div class='add'>+	num_msgs = DIV_ROUND_UP(totqs, num_chunks);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_txq; i++)</div><div class='del'>-		idpf_queue_set(SW_MARKER, vport-&gt;txqs[i]);</div><div class='add'>+	buf_sz = params-&gt;config_sz + num_chunks * params-&gt;chunk_sz;</div><div class='add'>+	buf = kzalloc(buf_sz, GFP_KERNEL);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	event = wait_event_timeout(vport-&gt;sw_marker_wq,</div><div class='del'>-				   test_and_clear_bit(IDPF_VPORT_SW_MARKER,</div><div class='del'>-						      vport-&gt;flags),</div><div class='del'>-				   msecs_to_jiffies(500));</div><div class='add'>+	xn_params.send_buf.iov_base = buf;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_txq; i++)</div><div class='del'>-		idpf_queue_clear(POLL_MODE, vport-&gt;txqs[i]);</div><div class='add'>+	for (u32 i = 0; i &lt; num_msgs; i++) {</div><div class='add'>+		ssize_t reply_sz;</div><div class='ctx'> </div><div class='del'>-	if (event)</div><div class='del'>-		return 0;</div><div class='add'>+		memset(buf, 0, buf_sz);</div><div class='add'>+		xn_params.send_buf.iov_len = buf_sz;</div><div class='add'>+</div><div class='add'>+		if (params-&gt;prepare_msg(vport, buf, pos, num_chunks) != buf_sz)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		reply_sz = idpf_vc_xn_exec(vport-&gt;adapter, &amp;xn_params);</div><div class='add'>+		if (reply_sz &lt; 0)</div><div class='add'>+			return reply_sz;</div><div class='add'>+</div><div class='add'>+		pos += num_chunks * params-&gt;chunk_sz;</div><div class='add'>+		totqs -= num_chunks;</div><div class='add'>+</div><div class='add'>+		num_chunks = min(num_chunks, totqs);</div><div class='add'>+		buf_sz = params-&gt;config_sz + num_chunks * params-&gt;chunk_sz;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_wait_for_marker_event_set - wait for software marker response for</div><div class='add'>+ *				    selected Tx queues</div><div class='add'>+ * @qs: set of the Tx queues</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_wait_for_marker_event_set(const struct idpf_queue_set *qs)</div><div class='add'>+{</div><div class='add'>+	struct idpf_tx_queue *txq;</div><div class='add'>+	bool markers_rcvd = true;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; qs-&gt;num; i++) {</div><div class='add'>+		switch (qs-&gt;qs[i].type) {</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_TX:</div><div class='add'>+			txq = qs-&gt;qs[i].txq;</div><div class='add'>+</div><div class='add'>+			idpf_queue_set(SW_MARKER, txq);</div><div class='add'>+			idpf_wait_for_sw_marker_completion(txq);</div><div class='add'>+			markers_rcvd &amp;= !idpf_queue_has(SW_MARKER, txq);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!markers_rcvd) {</div><div class='add'>+		netdev_warn(qs-&gt;vport-&gt;netdev,</div><div class='add'>+			    "Failed to receive marker packets\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_wait_for_marker_event - wait for software marker response</div><div class='add'>+ * @vport: virtual port data structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 success, negative on failure.</div><div class='add'>+ **/</div><div class='add'>+static int idpf_wait_for_marker_event(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct idpf_queue_set *qs __free(kfree) = NULL;</div><div class='add'>+</div><div class='add'>+	qs = idpf_alloc_queue_set(vport, vport-&gt;num_txq);</div><div class='add'>+	if (!qs)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	dev_warn(&amp;vport-&gt;adapter-&gt;pdev-&gt;dev, "Failed to receive marker packets\n");</div><div class='add'>+	for (u32 i = 0; i &lt; qs-&gt;num; i++) {</div><div class='add'>+		qs-&gt;qs[i].type = VIRTCHNL2_QUEUE_TYPE_TX;</div><div class='add'>+		qs-&gt;qs[i].txq = vport-&gt;txqs[i];</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return -ETIMEDOUT;</div><div class='add'>+	return idpf_wait_for_marker_event_set(qs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -874,14 +961,14 @@ static int idpf_send_get_caps_msg(struct idpf_adapter *adapter)</div><div class='ctx'> 			    VIRTCHNL2_CAP_SEG_TX_SINGLE_TUNNEL);</div><div class='ctx'> </div><div class='ctx'> 	caps.rss_caps =</div><div class='del'>-		cpu_to_le64(VIRTCHNL2_CAP_RSS_IPV4_TCP		|</div><div class='del'>-			    VIRTCHNL2_CAP_RSS_IPV4_UDP		|</div><div class='del'>-			    VIRTCHNL2_CAP_RSS_IPV4_SCTP		|</div><div class='del'>-			    VIRTCHNL2_CAP_RSS_IPV4_OTHER	|</div><div class='del'>-			    VIRTCHNL2_CAP_RSS_IPV6_TCP		|</div><div class='del'>-			    VIRTCHNL2_CAP_RSS_IPV6_UDP		|</div><div class='del'>-			    VIRTCHNL2_CAP_RSS_IPV6_SCTP		|</div><div class='del'>-			    VIRTCHNL2_CAP_RSS_IPV6_OTHER);</div><div class='add'>+		cpu_to_le64(VIRTCHNL2_FLOW_IPV4_TCP		|</div><div class='add'>+			    VIRTCHNL2_FLOW_IPV4_UDP		|</div><div class='add'>+			    VIRTCHNL2_FLOW_IPV4_SCTP		|</div><div class='add'>+			    VIRTCHNL2_FLOW_IPV4_OTHER		|</div><div class='add'>+			    VIRTCHNL2_FLOW_IPV6_TCP		|</div><div class='add'>+			    VIRTCHNL2_FLOW_IPV6_UDP		|</div><div class='add'>+			    VIRTCHNL2_FLOW_IPV6_SCTP		|</div><div class='add'>+			    VIRTCHNL2_FLOW_IPV6_OTHER);</div><div class='ctx'> </div><div class='ctx'> 	caps.hsplit_caps =</div><div class='ctx'> 		cpu_to_le32(VIRTCHNL2_CAP_RX_HSPLIT_AT_L4V4	|</div><div class='hunk'>@@ -893,10 +980,13 @@ static int idpf_send_get_caps_msg(struct idpf_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	caps.other_caps =</div><div class='ctx'> 		cpu_to_le64(VIRTCHNL2_CAP_SRIOV			|</div><div class='add'>+			    VIRTCHNL2_CAP_RDMA                  |</div><div class='add'>+			    VIRTCHNL2_CAP_LAN_MEMORY_REGIONS	|</div><div class='ctx'> 			    VIRTCHNL2_CAP_MACFILTER		|</div><div class='ctx'> 			    VIRTCHNL2_CAP_SPLITQ_QSCHED		|</div><div class='ctx'> 			    VIRTCHNL2_CAP_PROMISC		|</div><div class='del'>-			    VIRTCHNL2_CAP_LOOPBACK);</div><div class='add'>+			    VIRTCHNL2_CAP_LOOPBACK		|</div><div class='add'>+			    VIRTCHNL2_CAP_PTP);</div><div class='ctx'> </div><div class='ctx'> 	xn_params.vc_op = VIRTCHNL2_OP_GET_CAPS;</div><div class='ctx'> 	xn_params.send_buf.iov_base = &amp;caps;</div><div class='hunk'>@@ -915,6 +1005,163 @@ static int idpf_send_get_caps_msg(struct idpf_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * idpf_send_get_lan_memory_regions - Send virtchnl get LAN memory regions msg</div><div class='add'>+ * @adapter: Driver specific private struct</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_send_get_lan_memory_regions(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_get_lan_memory_regions *rcvd_regions __free(kfree);</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {</div><div class='add'>+		.vc_op = VIRTCHNL2_OP_GET_LAN_MEMORY_REGIONS,</div><div class='add'>+		.recv_buf.iov_len = IDPF_CTLQ_MAX_BUF_LEN,</div><div class='add'>+		.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,</div><div class='add'>+	};</div><div class='add'>+	int num_regions, size;</div><div class='add'>+	struct idpf_hw *hw;</div><div class='add'>+	ssize_t reply_sz;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	rcvd_regions = kzalloc(IDPF_CTLQ_MAX_BUF_LEN, GFP_KERNEL);</div><div class='add'>+	if (!rcvd_regions)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	xn_params.recv_buf.iov_base = rcvd_regions;</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(adapter, &amp;xn_params);</div><div class='add'>+	if (reply_sz &lt; 0)</div><div class='add'>+		return reply_sz;</div><div class='add'>+</div><div class='add'>+	num_regions = le16_to_cpu(rcvd_regions-&gt;num_memory_regions);</div><div class='add'>+	size = struct_size(rcvd_regions, mem_reg, num_regions);</div><div class='add'>+	if (reply_sz &lt; size)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if (size &gt; IDPF_CTLQ_MAX_BUF_LEN)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	hw = &amp;adapter-&gt;hw;</div><div class='add'>+	hw-&gt;lan_regs = kcalloc(num_regions, sizeof(*hw-&gt;lan_regs), GFP_KERNEL);</div><div class='add'>+	if (!hw-&gt;lan_regs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; num_regions; i++) {</div><div class='add'>+		hw-&gt;lan_regs[i].addr_len =</div><div class='add'>+			le64_to_cpu(rcvd_regions-&gt;mem_reg[i].size);</div><div class='add'>+		hw-&gt;lan_regs[i].addr_start =</div><div class='add'>+			le64_to_cpu(rcvd_regions-&gt;mem_reg[i].start_offset);</div><div class='add'>+	}</div><div class='add'>+	hw-&gt;num_lan_regs = num_regions;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_calc_remaining_mmio_regs - calculate MMIO regions outside mbx and rstat</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * Called when idpf_send_get_lan_memory_regions is not supported. This will</div><div class='add'>+ * calculate the offsets and sizes for the regions before, in between, and</div><div class='add'>+ * after the mailbox and rstat MMIO mappings.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_calc_remaining_mmio_regs(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct resource *rstat_reg = &amp;adapter-&gt;dev_ops.static_reg_info[1];</div><div class='add'>+	struct resource *mbx_reg = &amp;adapter-&gt;dev_ops.static_reg_info[0];</div><div class='add'>+	struct idpf_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	hw-&gt;num_lan_regs = IDPF_MMIO_MAP_FALLBACK_MAX_REMAINING;</div><div class='add'>+	hw-&gt;lan_regs = kcalloc(hw-&gt;num_lan_regs, sizeof(*hw-&gt;lan_regs),</div><div class='add'>+			       GFP_KERNEL);</div><div class='add'>+	if (!hw-&gt;lan_regs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Region preceding mailbox */</div><div class='add'>+	hw-&gt;lan_regs[0].addr_start = 0;</div><div class='add'>+	hw-&gt;lan_regs[0].addr_len = mbx_reg-&gt;start;</div><div class='add'>+	/* Region between mailbox and rstat */</div><div class='add'>+	hw-&gt;lan_regs[1].addr_start = mbx_reg-&gt;end + 1;</div><div class='add'>+	hw-&gt;lan_regs[1].addr_len = rstat_reg-&gt;start -</div><div class='add'>+					hw-&gt;lan_regs[1].addr_start;</div><div class='add'>+	/* Region after rstat */</div><div class='add'>+	hw-&gt;lan_regs[2].addr_start = rstat_reg-&gt;end + 1;</div><div class='add'>+	hw-&gt;lan_regs[2].addr_len = pci_resource_len(adapter-&gt;pdev, 0) -</div><div class='add'>+					hw-&gt;lan_regs[2].addr_start;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_map_lan_mmio_regs - map remaining LAN BAR regions</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_map_lan_mmio_regs(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='add'>+	struct idpf_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	resource_size_t res_start;</div><div class='add'>+</div><div class='add'>+	res_start = pci_resource_start(pdev, 0);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; hw-&gt;num_lan_regs; i++) {</div><div class='add'>+		resource_size_t start;</div><div class='add'>+		long len;</div><div class='add'>+</div><div class='add'>+		len = hw-&gt;lan_regs[i].addr_len;</div><div class='add'>+		if (!len)</div><div class='add'>+			continue;</div><div class='add'>+		start = hw-&gt;lan_regs[i].addr_start + res_start;</div><div class='add'>+</div><div class='add'>+		hw-&gt;lan_regs[i].vaddr = devm_ioremap(&amp;pdev-&gt;dev, start, len);</div><div class='add'>+		if (!hw-&gt;lan_regs[i].vaddr) {</div><div class='add'>+			pci_err(pdev, "failed to allocate BAR0 region\n");</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_add_del_fsteer_filters - Send virtchnl add/del Flow Steering message</div><div class='add'>+ * @adapter: adapter info struct</div><div class='add'>+ * @rule: Flow steering rule to add/delete</div><div class='add'>+ * @opcode: VIRTCHNL2_OP_ADD_FLOW_RULE to add filter, or</div><div class='add'>+ *          VIRTCHNL2_OP_DEL_FLOW_RULE to delete. All other values are invalid.</div><div class='add'>+ *</div><div class='add'>+ * Send ADD/DELETE flow steering virtchnl message and receive the result.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_add_del_fsteer_filters(struct idpf_adapter *adapter,</div><div class='add'>+				struct virtchnl2_flow_rule_add_del *rule,</div><div class='add'>+				enum virtchnl2_op opcode)</div><div class='add'>+{</div><div class='add'>+	int rule_count = le32_to_cpu(rule-&gt;count);</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {};</div><div class='add'>+	ssize_t reply_sz;</div><div class='add'>+</div><div class='add'>+	if (opcode != VIRTCHNL2_OP_ADD_FLOW_RULE &amp;&amp;</div><div class='add'>+	    opcode != VIRTCHNL2_OP_DEL_FLOW_RULE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	xn_params.vc_op = opcode;</div><div class='add'>+	xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;</div><div class='add'>+	xn_params.async = false;</div><div class='add'>+	xn_params.send_buf.iov_base = rule;</div><div class='add'>+	xn_params.send_buf.iov_len = struct_size(rule, rule_info, rule_count);</div><div class='add'>+	xn_params.recv_buf.iov_base = rule;</div><div class='add'>+	xn_params.recv_buf.iov_len = struct_size(rule, rule_info, rule_count);</div><div class='add'>+</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(adapter, &amp;xn_params);</div><div class='add'>+	return reply_sz &lt; 0 ? reply_sz : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * idpf_vport_alloc_max_qs - Allocate max queues for a vport</div><div class='ctx'>  * @adapter: Driver specific private structure</div><div class='ctx'>  * @max_q: vport max queue structure</div><div class='hunk'>@@ -925,21 +1172,35 @@ int idpf_vport_alloc_max_qs(struct idpf_adapter *adapter,</div><div class='ctx'> 	struct idpf_avail_queue_info *avail_queues = &amp;adapter-&gt;avail_queues;</div><div class='ctx'> 	struct virtchnl2_get_capabilities *caps = &amp;adapter-&gt;caps;</div><div class='ctx'> 	u16 default_vports = idpf_get_default_vports(adapter);</div><div class='del'>-	int max_rx_q, max_tx_q;</div><div class='add'>+	u32 max_rx_q, max_tx_q, max_buf_q, max_compl_q;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;adapter-&gt;queue_lock);</div><div class='ctx'> </div><div class='add'>+	/* Caps are device-wide. Give each vport an equal piece */</div><div class='ctx'> 	max_rx_q = le16_to_cpu(caps-&gt;max_rx_q) / default_vports;</div><div class='ctx'> 	max_tx_q = le16_to_cpu(caps-&gt;max_tx_q) / default_vports;</div><div class='del'>-	if (adapter-&gt;num_alloc_vports &lt; default_vports) {</div><div class='del'>-		max_q-&gt;max_rxq = min_t(u16, max_rx_q, IDPF_MAX_Q);</div><div class='del'>-		max_q-&gt;max_txq = min_t(u16, max_tx_q, IDPF_MAX_Q);</div><div class='del'>-	} else {</div><div class='del'>-		max_q-&gt;max_rxq = IDPF_MIN_Q;</div><div class='del'>-		max_q-&gt;max_txq = IDPF_MIN_Q;</div><div class='add'>+	max_buf_q = le16_to_cpu(caps-&gt;max_rx_bufq) / default_vports;</div><div class='add'>+	max_compl_q = le16_to_cpu(caps-&gt;max_tx_complq) / default_vports;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;num_alloc_vports &gt;= default_vports) {</div><div class='add'>+		max_rx_q = IDPF_MIN_Q;</div><div class='add'>+		max_tx_q = IDPF_MIN_Q;</div><div class='ctx'> 	}</div><div class='del'>-	max_q-&gt;max_bufq = max_q-&gt;max_rxq * IDPF_MAX_BUFQS_PER_RXQ_GRP;</div><div class='del'>-	max_q-&gt;max_complq = max_q-&gt;max_txq;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Harmonize the numbers. The current implementation always creates</div><div class='add'>+	 * `IDPF_MAX_BUFQS_PER_RXQ_GRP` buffer queues for each Rx queue and</div><div class='add'>+	 * one completion queue for each Tx queue for best performance.</div><div class='add'>+	 * If less buffer or completion queues is available, cap the number</div><div class='add'>+	 * of the corresponding Rx/Tx queues.</div><div class='add'>+	 */</div><div class='add'>+	max_rx_q = min(max_rx_q, max_buf_q / IDPF_MAX_BUFQS_PER_RXQ_GRP);</div><div class='add'>+	max_tx_q = min(max_tx_q, max_compl_q);</div><div class='add'>+</div><div class='add'>+	max_q-&gt;max_rxq = max_rx_q;</div><div class='add'>+	max_q-&gt;max_txq = max_tx_q;</div><div class='add'>+	max_q-&gt;max_bufq = max_rx_q * IDPF_MAX_BUFQS_PER_RXQ_GRP;</div><div class='add'>+	max_q-&gt;max_complq = max_tx_q;</div><div class='ctx'> </div><div class='ctx'> 	if (avail_queues-&gt;avail_rxq &lt; max_q-&gt;max_rxq ||</div><div class='ctx'> 	    avail_queues-&gt;avail_txq &lt; max_q-&gt;max_txq ||</div><div class='hunk'>@@ -1370,7 +1631,7 @@ int idpf_send_destroy_vport_msg(struct idpf_vport *vport)</div><div class='ctx'> 	xn_params.vc_op = VIRTCHNL2_OP_DESTROY_VPORT;</div><div class='ctx'> 	xn_params.send_buf.iov_base = &amp;v_id;</div><div class='ctx'> 	xn_params.send_buf.iov_len = sizeof(v_id);</div><div class='del'>-	xn_params.timeout_ms = IDPF_VC_XN_MIN_TIMEOUT_MSEC;</div><div class='add'>+	xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;</div><div class='ctx'> 	reply_sz = idpf_vc_xn_exec(vport-&gt;adapter, &amp;xn_params);</div><div class='ctx'> </div><div class='ctx'> 	return reply_sz &lt; 0 ? reply_sz : 0;</div><div class='hunk'>@@ -1418,236 +1679,368 @@ int idpf_send_disable_vport_msg(struct idpf_vport *vport)</div><div class='ctx'> 	xn_params.vc_op = VIRTCHNL2_OP_DISABLE_VPORT;</div><div class='ctx'> 	xn_params.send_buf.iov_base = &amp;v_id;</div><div class='ctx'> 	xn_params.send_buf.iov_len = sizeof(v_id);</div><div class='del'>-	xn_params.timeout_ms = IDPF_VC_XN_MIN_TIMEOUT_MSEC;</div><div class='add'>+	xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;</div><div class='ctx'> 	reply_sz = idpf_vc_xn_exec(vport-&gt;adapter, &amp;xn_params);</div><div class='ctx'> </div><div class='ctx'> 	return reply_sz &lt; 0 ? reply_sz : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_send_config_tx_queues_msg - Send virtchnl config tx queues message</div><div class='add'>+ * idpf_fill_txq_config_chunk - fill chunk describing the Tx queue</div><div class='add'>+ * @vport: virtual port data structure</div><div class='add'>+ * @q: Tx queue to be inserted into VC chunk</div><div class='add'>+ * @qi: pointer to the buffer containing the VC chunk</div><div class='add'>+ */</div><div class='add'>+static void idpf_fill_txq_config_chunk(const struct idpf_vport *vport,</div><div class='add'>+				       const struct idpf_tx_queue *q,</div><div class='add'>+				       struct virtchnl2_txq_info *qi)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	qi-&gt;queue_id = cpu_to_le32(q-&gt;q_id);</div><div class='add'>+	qi-&gt;model = cpu_to_le16(vport-&gt;txq_model);</div><div class='add'>+	qi-&gt;type = cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_TX);</div><div class='add'>+	qi-&gt;ring_len = cpu_to_le16(q-&gt;desc_count);</div><div class='add'>+	qi-&gt;dma_ring_addr = cpu_to_le64(q-&gt;dma);</div><div class='add'>+	qi-&gt;relative_queue_id = cpu_to_le16(q-&gt;rel_q_id);</div><div class='add'>+</div><div class='add'>+	if (!idpf_is_queue_model_split(vport-&gt;txq_model)) {</div><div class='add'>+		qi-&gt;sched_mode = cpu_to_le16(VIRTCHNL2_TXQ_SCHED_MODE_QUEUE);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (idpf_queue_has(XDP, q))</div><div class='add'>+		val = q-&gt;complq-&gt;q_id;</div><div class='add'>+	else</div><div class='add'>+		val = q-&gt;txq_grp-&gt;complq-&gt;q_id;</div><div class='add'>+</div><div class='add'>+	qi-&gt;tx_compl_queue_id = cpu_to_le16(val);</div><div class='add'>+</div><div class='add'>+	if (idpf_queue_has(FLOW_SCH_EN, q))</div><div class='add'>+		val = VIRTCHNL2_TXQ_SCHED_MODE_FLOW;</div><div class='add'>+	else</div><div class='add'>+		val = VIRTCHNL2_TXQ_SCHED_MODE_QUEUE;</div><div class='add'>+</div><div class='add'>+	qi-&gt;sched_mode = cpu_to_le16(val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_fill_complq_config_chunk - fill chunk describing the completion queue</div><div class='ctx'>  * @vport: virtual port data structure</div><div class='add'>+ * @q: completion queue to be inserted into VC chunk</div><div class='add'>+ * @qi: pointer to the buffer containing the VC chunk</div><div class='add'>+ */</div><div class='add'>+static void idpf_fill_complq_config_chunk(const struct idpf_vport *vport,</div><div class='add'>+					  const struct idpf_compl_queue *q,</div><div class='add'>+					  struct virtchnl2_txq_info *qi)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	qi-&gt;queue_id = cpu_to_le32(q-&gt;q_id);</div><div class='add'>+	qi-&gt;model = cpu_to_le16(vport-&gt;txq_model);</div><div class='add'>+	qi-&gt;type = cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION);</div><div class='add'>+	qi-&gt;ring_len = cpu_to_le16(q-&gt;desc_count);</div><div class='add'>+	qi-&gt;dma_ring_addr = cpu_to_le64(q-&gt;dma);</div><div class='add'>+</div><div class='add'>+	if (idpf_queue_has(FLOW_SCH_EN, q))</div><div class='add'>+		val = VIRTCHNL2_TXQ_SCHED_MODE_FLOW;</div><div class='add'>+	else</div><div class='add'>+		val = VIRTCHNL2_TXQ_SCHED_MODE_QUEUE;</div><div class='add'>+</div><div class='add'>+	qi-&gt;sched_mode = cpu_to_le16(val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_prepare_cfg_txqs_msg - prepare message to configure selected Tx queues</div><div class='add'>+ * @vport: virtual port data structure</div><div class='add'>+ * @buf: buffer containing the message</div><div class='add'>+ * @pos: pointer to the first chunk describing the tx queue</div><div class='add'>+ * @num_chunks: number of chunks in the message</div><div class='ctx'>  *</div><div class='del'>- * Send config tx queues virtchnl message. Returns 0 on success, negative on</div><div class='del'>- * failure.</div><div class='add'>+ * Helper function for preparing the message describing configuration of</div><div class='add'>+ * Tx queues.</div><div class='add'>+ *</div><div class='add'>+ * Return: the total size of the prepared message.</div><div class='ctx'>  */</div><div class='del'>-static int idpf_send_config_tx_queues_msg(struct idpf_vport *vport)</div><div class='add'>+static u32 idpf_prepare_cfg_txqs_msg(const struct idpf_vport *vport,</div><div class='add'>+				     void *buf, const void *pos,</div><div class='add'>+				     u32 num_chunks)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_config_tx_queues *ctq = buf;</div><div class='add'>+</div><div class='add'>+	ctq-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='add'>+	ctq-&gt;num_qinfo = cpu_to_le16(num_chunks);</div><div class='add'>+	memcpy(ctq-&gt;qinfo, pos, num_chunks * sizeof(*ctq-&gt;qinfo));</div><div class='add'>+</div><div class='add'>+	return struct_size(ctq, qinfo, num_chunks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_send_config_tx_queue_set_msg - send virtchnl config Tx queues</div><div class='add'>+ *				       message for selected queues</div><div class='add'>+ * @qs: set of the Tx queues to configure</div><div class='add'>+ *</div><div class='add'>+ * Send config queues virtchnl message for queues contained in the @qs array.</div><div class='add'>+ * The @qs array can contain Tx queues (or completion queues) only.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_send_config_tx_queue_set_msg(const struct idpf_queue_set *qs)</div><div class='ctx'> {</div><div class='del'>-	struct virtchnl2_config_tx_queues *ctq __free(kfree) = NULL;</div><div class='ctx'> 	struct virtchnl2_txq_info *qi __free(kfree) = NULL;</div><div class='del'>-	struct idpf_vc_xn_params xn_params = {};</div><div class='del'>-	u32 config_sz, chunk_sz, buf_sz;</div><div class='del'>-	int totqs, num_msgs, num_chunks;</div><div class='del'>-	ssize_t reply_sz;</div><div class='del'>-	int i, k = 0;</div><div class='add'>+	struct idpf_chunked_msg_params params = {</div><div class='add'>+		.vc_op		= VIRTCHNL2_OP_CONFIG_TX_QUEUES,</div><div class='add'>+		.prepare_msg	= idpf_prepare_cfg_txqs_msg,</div><div class='add'>+		.config_sz	= sizeof(struct virtchnl2_config_tx_queues),</div><div class='add'>+		.chunk_sz	= sizeof(*qi),</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	totqs = vport-&gt;num_txq + vport-&gt;num_complq;</div><div class='del'>-	qi = kcalloc(totqs, sizeof(struct virtchnl2_txq_info), GFP_KERNEL);</div><div class='add'>+	qi = kcalloc(qs-&gt;num, sizeof(*qi), GFP_KERNEL);</div><div class='ctx'> 	if (!qi)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	/* Populate the queue info buffer with all queue context info */</div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_txq_grp; i++) {</div><div class='del'>-		struct idpf_txq_group *tx_qgrp = &amp;vport-&gt;txq_grps[i];</div><div class='del'>-		int j, sched_mode;</div><div class='del'>-</div><div class='del'>-		for (j = 0; j &lt; tx_qgrp-&gt;num_txq; j++, k++) {</div><div class='del'>-			qi[k].queue_id =</div><div class='del'>-				cpu_to_le32(tx_qgrp-&gt;txqs[j]-&gt;q_id);</div><div class='del'>-			qi[k].model =</div><div class='del'>-				cpu_to_le16(vport-&gt;txq_model);</div><div class='del'>-			qi[k].type =</div><div class='del'>-				cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_TX);</div><div class='del'>-			qi[k].ring_len =</div><div class='del'>-				cpu_to_le16(tx_qgrp-&gt;txqs[j]-&gt;desc_count);</div><div class='del'>-			qi[k].dma_ring_addr =</div><div class='del'>-				cpu_to_le64(tx_qgrp-&gt;txqs[j]-&gt;dma);</div><div class='del'>-			if (idpf_is_queue_model_split(vport-&gt;txq_model)) {</div><div class='del'>-				struct idpf_tx_queue *q = tx_qgrp-&gt;txqs[j];</div><div class='del'>-</div><div class='del'>-				qi[k].tx_compl_queue_id =</div><div class='del'>-					cpu_to_le16(tx_qgrp-&gt;complq-&gt;q_id);</div><div class='del'>-				qi[k].relative_queue_id = cpu_to_le16(j);</div><div class='del'>-</div><div class='del'>-				if (idpf_queue_has(FLOW_SCH_EN, q))</div><div class='del'>-					qi[k].sched_mode =</div><div class='del'>-					cpu_to_le16(VIRTCHNL2_TXQ_SCHED_MODE_FLOW);</div><div class='del'>-				else</div><div class='del'>-					qi[k].sched_mode =</div><div class='del'>-					cpu_to_le16(VIRTCHNL2_TXQ_SCHED_MODE_QUEUE);</div><div class='del'>-			} else {</div><div class='del'>-				qi[k].sched_mode =</div><div class='del'>-					cpu_to_le16(VIRTCHNL2_TXQ_SCHED_MODE_QUEUE);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+	params.chunks = qi;</div><div class='ctx'> </div><div class='del'>-		if (!idpf_is_queue_model_split(vport-&gt;txq_model))</div><div class='del'>-			continue;</div><div class='add'>+	for (u32 i = 0; i &lt; qs-&gt;num; i++) {</div><div class='add'>+		if (qs-&gt;qs[i].type == VIRTCHNL2_QUEUE_TYPE_TX)</div><div class='add'>+			idpf_fill_txq_config_chunk(qs-&gt;vport, qs-&gt;qs[i].txq,</div><div class='add'>+						   &amp;qi[params.num_chunks++]);</div><div class='add'>+		else if (qs-&gt;qs[i].type == VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION)</div><div class='add'>+			idpf_fill_complq_config_chunk(qs-&gt;vport,</div><div class='add'>+						      qs-&gt;qs[i].complq,</div><div class='add'>+						      &amp;qi[params.num_chunks++]);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		qi[k].queue_id = cpu_to_le32(tx_qgrp-&gt;complq-&gt;q_id);</div><div class='del'>-		qi[k].model = cpu_to_le16(vport-&gt;txq_model);</div><div class='del'>-		qi[k].type = cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION);</div><div class='del'>-		qi[k].ring_len = cpu_to_le16(tx_qgrp-&gt;complq-&gt;desc_count);</div><div class='del'>-		qi[k].dma_ring_addr = cpu_to_le64(tx_qgrp-&gt;complq-&gt;dma);</div><div class='add'>+	return idpf_send_chunked_msg(qs-&gt;vport, &amp;params);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (idpf_queue_has(FLOW_SCH_EN, tx_qgrp-&gt;complq))</div><div class='del'>-			sched_mode = VIRTCHNL2_TXQ_SCHED_MODE_FLOW;</div><div class='del'>-		else</div><div class='del'>-			sched_mode = VIRTCHNL2_TXQ_SCHED_MODE_QUEUE;</div><div class='del'>-		qi[k].sched_mode = cpu_to_le16(sched_mode);</div><div class='add'>+/**</div><div class='add'>+ * idpf_send_config_tx_queues_msg - send virtchnl config Tx queues message</div><div class='add'>+ * @vport: virtual port data structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_send_config_tx_queues_msg(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct idpf_queue_set *qs __free(kfree) = NULL;</div><div class='add'>+	u32 totqs = vport-&gt;num_txq + vport-&gt;num_complq;</div><div class='add'>+	u32 k = 0;</div><div class='add'>+</div><div class='add'>+	qs = idpf_alloc_queue_set(vport, totqs);</div><div class='add'>+	if (!qs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Populate the queue info buffer with all queue context info */</div><div class='add'>+	for (u32 i = 0; i &lt; vport-&gt;num_txq_grp; i++) {</div><div class='add'>+		const struct idpf_txq_group *tx_qgrp = &amp;vport-&gt;txq_grps[i];</div><div class='add'>+</div><div class='add'>+		for (u32 j = 0; j &lt; tx_qgrp-&gt;num_txq; j++) {</div><div class='add'>+			qs-&gt;qs[k].type = VIRTCHNL2_QUEUE_TYPE_TX;</div><div class='add'>+			qs-&gt;qs[k++].txq = tx_qgrp-&gt;txqs[j];</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		k++;</div><div class='add'>+		if (idpf_is_queue_model_split(vport-&gt;txq_model)) {</div><div class='add'>+			qs-&gt;qs[k].type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;</div><div class='add'>+			qs-&gt;qs[k++].complq = tx_qgrp-&gt;complq;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure accounting agrees */</div><div class='ctx'> 	if (k != totqs)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* Chunk up the queue contexts into multiple messages to avoid</div><div class='del'>-	 * sending a control queue message buffer that is too large</div><div class='del'>-	 */</div><div class='del'>-	config_sz = sizeof(struct virtchnl2_config_tx_queues);</div><div class='del'>-	chunk_sz = sizeof(struct virtchnl2_txq_info);</div><div class='add'>+	return idpf_send_config_tx_queue_set_msg(qs);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	num_chunks = min_t(u32, IDPF_NUM_CHUNKS_PER_MSG(config_sz, chunk_sz),</div><div class='del'>-			   totqs);</div><div class='del'>-	num_msgs = DIV_ROUND_UP(totqs, num_chunks);</div><div class='add'>+/**</div><div class='add'>+ * idpf_fill_rxq_config_chunk - fill chunk describing the Rx queue</div><div class='add'>+ * @vport: virtual port data structure</div><div class='add'>+ * @q: Rx queue to be inserted into VC chunk</div><div class='add'>+ * @qi: pointer to the buffer containing the VC chunk</div><div class='add'>+ */</div><div class='add'>+static void idpf_fill_rxq_config_chunk(const struct idpf_vport *vport,</div><div class='add'>+				       struct idpf_rx_queue *q,</div><div class='add'>+				       struct virtchnl2_rxq_info *qi)</div><div class='add'>+{</div><div class='add'>+	const struct idpf_bufq_set *sets;</div><div class='add'>+</div><div class='add'>+	qi-&gt;queue_id = cpu_to_le32(q-&gt;q_id);</div><div class='add'>+	qi-&gt;model = cpu_to_le16(vport-&gt;rxq_model);</div><div class='add'>+	qi-&gt;type = cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_RX);</div><div class='add'>+	qi-&gt;ring_len = cpu_to_le16(q-&gt;desc_count);</div><div class='add'>+	qi-&gt;dma_ring_addr = cpu_to_le64(q-&gt;dma);</div><div class='add'>+	qi-&gt;max_pkt_size = cpu_to_le32(q-&gt;rx_max_pkt_size);</div><div class='add'>+	qi-&gt;rx_buffer_low_watermark = cpu_to_le16(q-&gt;rx_buffer_low_watermark);</div><div class='add'>+	qi-&gt;qflags = cpu_to_le16(VIRTCHNL2_RX_DESC_SIZE_32BYTE);</div><div class='add'>+	if (idpf_is_feature_ena(vport, NETIF_F_GRO_HW))</div><div class='add'>+		qi-&gt;qflags |= cpu_to_le16(VIRTCHNL2_RXQ_RSC);</div><div class='add'>+</div><div class='add'>+	if (!idpf_is_queue_model_split(vport-&gt;rxq_model)) {</div><div class='add'>+		qi-&gt;data_buffer_size = cpu_to_le32(q-&gt;rx_buf_size);</div><div class='add'>+		qi-&gt;desc_ids = cpu_to_le64(q-&gt;rxdids);</div><div class='ctx'> </div><div class='del'>-	buf_sz = struct_size(ctq, qinfo, num_chunks);</div><div class='del'>-	ctq = kzalloc(buf_sz, GFP_KERNEL);</div><div class='del'>-	if (!ctq)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	xn_params.vc_op = VIRTCHNL2_OP_CONFIG_TX_QUEUES;</div><div class='del'>-	xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;</div><div class='add'>+	sets = q-&gt;bufq_sets;</div><div class='ctx'> </div><div class='del'>-	for (i = 0, k = 0; i &lt; num_msgs; i++) {</div><div class='del'>-		memset(ctq, 0, buf_sz);</div><div class='del'>-		ctq-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='del'>-		ctq-&gt;num_qinfo = cpu_to_le16(num_chunks);</div><div class='del'>-		memcpy(ctq-&gt;qinfo, &amp;qi[k], chunk_sz * num_chunks);</div><div class='add'>+	/*</div><div class='add'>+	 * In splitq mode, RxQ buffer size should be set to that of the first</div><div class='add'>+	 * buffer queue associated with this RxQ.</div><div class='add'>+	 */</div><div class='add'>+	q-&gt;rx_buf_size = sets[0].bufq.rx_buf_size;</div><div class='add'>+	qi-&gt;data_buffer_size = cpu_to_le32(q-&gt;rx_buf_size);</div><div class='ctx'> </div><div class='del'>-		xn_params.send_buf.iov_base = ctq;</div><div class='del'>-		xn_params.send_buf.iov_len = buf_sz;</div><div class='del'>-		reply_sz = idpf_vc_xn_exec(vport-&gt;adapter, &amp;xn_params);</div><div class='del'>-		if (reply_sz &lt; 0)</div><div class='del'>-			return reply_sz;</div><div class='add'>+	qi-&gt;rx_bufq1_id = cpu_to_le16(sets[0].bufq.q_id);</div><div class='add'>+	if (vport-&gt;num_bufqs_per_qgrp &gt; IDPF_SINGLE_BUFQ_PER_RXQ_GRP) {</div><div class='add'>+		qi-&gt;bufq2_ena = IDPF_BUFQ2_ENA;</div><div class='add'>+		qi-&gt;rx_bufq2_id = cpu_to_le16(sets[1].bufq.q_id);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		k += num_chunks;</div><div class='del'>-		totqs -= num_chunks;</div><div class='del'>-		num_chunks = min(num_chunks, totqs);</div><div class='del'>-		/* Recalculate buffer size */</div><div class='del'>-		buf_sz = struct_size(ctq, qinfo, num_chunks);</div><div class='add'>+	q-&gt;rx_hbuf_size = sets[0].bufq.rx_hbuf_size;</div><div class='add'>+</div><div class='add'>+	if (idpf_queue_has(HSPLIT_EN, q)) {</div><div class='add'>+		qi-&gt;qflags |= cpu_to_le16(VIRTCHNL2_RXQ_HDR_SPLIT);</div><div class='add'>+		qi-&gt;hdr_buffer_size = cpu_to_le16(q-&gt;rx_hbuf_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	qi-&gt;desc_ids = cpu_to_le64(VIRTCHNL2_RXDID_2_FLEX_SPLITQ_M);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_send_config_rx_queues_msg - Send virtchnl config rx queues message</div><div class='add'>+ * idpf_fill_bufq_config_chunk - fill chunk describing the buffer queue</div><div class='ctx'>  * @vport: virtual port data structure</div><div class='add'>+ * @q: buffer queue to be inserted into VC chunk</div><div class='add'>+ * @qi: pointer to the buffer containing the VC chunk</div><div class='add'>+ */</div><div class='add'>+static void idpf_fill_bufq_config_chunk(const struct idpf_vport *vport,</div><div class='add'>+					const struct idpf_buf_queue *q,</div><div class='add'>+					struct virtchnl2_rxq_info *qi)</div><div class='add'>+{</div><div class='add'>+	qi-&gt;queue_id = cpu_to_le32(q-&gt;q_id);</div><div class='add'>+	qi-&gt;model = cpu_to_le16(vport-&gt;rxq_model);</div><div class='add'>+	qi-&gt;type = cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_RX_BUFFER);</div><div class='add'>+	qi-&gt;ring_len = cpu_to_le16(q-&gt;desc_count);</div><div class='add'>+	qi-&gt;dma_ring_addr = cpu_to_le64(q-&gt;dma);</div><div class='add'>+	qi-&gt;data_buffer_size = cpu_to_le32(q-&gt;rx_buf_size);</div><div class='add'>+	qi-&gt;rx_buffer_low_watermark = cpu_to_le16(q-&gt;rx_buffer_low_watermark);</div><div class='add'>+	qi-&gt;desc_ids = cpu_to_le64(VIRTCHNL2_RXDID_2_FLEX_SPLITQ_M);</div><div class='add'>+	qi-&gt;buffer_notif_stride = IDPF_RX_BUF_STRIDE;</div><div class='add'>+	if (idpf_is_feature_ena(vport, NETIF_F_GRO_HW))</div><div class='add'>+		qi-&gt;qflags = cpu_to_le16(VIRTCHNL2_RXQ_RSC);</div><div class='add'>+</div><div class='add'>+	if (idpf_queue_has(HSPLIT_EN, q)) {</div><div class='add'>+		qi-&gt;qflags |= cpu_to_le16(VIRTCHNL2_RXQ_HDR_SPLIT);</div><div class='add'>+		qi-&gt;hdr_buffer_size = cpu_to_le16(q-&gt;rx_hbuf_size);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_prepare_cfg_rxqs_msg - prepare message to configure selected Rx queues</div><div class='add'>+ * @vport: virtual port data structure</div><div class='add'>+ * @buf: buffer containing the message</div><div class='add'>+ * @pos: pointer to the first chunk describing the rx queue</div><div class='add'>+ * @num_chunks: number of chunks in the message</div><div class='ctx'>  *</div><div class='del'>- * Send config rx queues virtchnl message.  Returns 0 on success, negative on</div><div class='del'>- * failure.</div><div class='add'>+ * Helper function for preparing the message describing configuration of</div><div class='add'>+ * Rx queues.</div><div class='add'>+ *</div><div class='add'>+ * Return: the total size of the prepared message.</div><div class='ctx'>  */</div><div class='del'>-static int idpf_send_config_rx_queues_msg(struct idpf_vport *vport)</div><div class='add'>+static u32 idpf_prepare_cfg_rxqs_msg(const struct idpf_vport *vport,</div><div class='add'>+				     void *buf, const void *pos,</div><div class='add'>+				     u32 num_chunks)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_config_rx_queues *crq = buf;</div><div class='add'>+</div><div class='add'>+	crq-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='add'>+	crq-&gt;num_qinfo = cpu_to_le16(num_chunks);</div><div class='add'>+	memcpy(crq-&gt;qinfo, pos, num_chunks * sizeof(*crq-&gt;qinfo));</div><div class='add'>+</div><div class='add'>+	return struct_size(crq, qinfo, num_chunks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_send_config_rx_queue_set_msg - send virtchnl config Rx queues message</div><div class='add'>+ *				       for selected queues.</div><div class='add'>+ * @qs: set of the Rx queues to configure</div><div class='add'>+ *</div><div class='add'>+ * Send config queues virtchnl message for queues contained in the @qs array.</div><div class='add'>+ * The @qs array can contain Rx queues (or buffer queues) only.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_send_config_rx_queue_set_msg(const struct idpf_queue_set *qs)</div><div class='ctx'> {</div><div class='del'>-	struct virtchnl2_config_rx_queues *crq __free(kfree) = NULL;</div><div class='ctx'> 	struct virtchnl2_rxq_info *qi __free(kfree) = NULL;</div><div class='del'>-	struct idpf_vc_xn_params xn_params = {};</div><div class='del'>-	u32 config_sz, chunk_sz, buf_sz;</div><div class='del'>-	int totqs, num_msgs, num_chunks;</div><div class='del'>-	ssize_t reply_sz;</div><div class='del'>-	int i, k = 0;</div><div class='add'>+	struct idpf_chunked_msg_params params = {</div><div class='add'>+		.vc_op		= VIRTCHNL2_OP_CONFIG_RX_QUEUES,</div><div class='add'>+		.prepare_msg	= idpf_prepare_cfg_rxqs_msg,</div><div class='add'>+		.config_sz	= sizeof(struct virtchnl2_config_rx_queues),</div><div class='add'>+		.chunk_sz	= sizeof(*qi),</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	totqs = vport-&gt;num_rxq + vport-&gt;num_bufq;</div><div class='del'>-	qi = kcalloc(totqs, sizeof(struct virtchnl2_rxq_info), GFP_KERNEL);</div><div class='add'>+	qi = kcalloc(qs-&gt;num, sizeof(*qi), GFP_KERNEL);</div><div class='ctx'> 	if (!qi)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	/* Populate the queue info buffer with all queue context info */</div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='del'>-		struct idpf_rxq_group *rx_qgrp = &amp;vport-&gt;rxq_grps[i];</div><div class='del'>-		u16 num_rxq;</div><div class='del'>-		int j;</div><div class='del'>-</div><div class='del'>-		if (!idpf_is_queue_model_split(vport-&gt;rxq_model))</div><div class='del'>-			goto setup_rxqs;</div><div class='del'>-</div><div class='del'>-		for (j = 0; j &lt; vport-&gt;num_bufqs_per_qgrp; j++, k++) {</div><div class='del'>-			struct idpf_buf_queue *bufq =</div><div class='del'>-				&amp;rx_qgrp-&gt;splitq.bufq_sets[j].bufq;</div><div class='del'>-</div><div class='del'>-			qi[k].queue_id = cpu_to_le32(bufq-&gt;q_id);</div><div class='del'>-			qi[k].model = cpu_to_le16(vport-&gt;rxq_model);</div><div class='del'>-			qi[k].type =</div><div class='del'>-				cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_RX_BUFFER);</div><div class='del'>-			qi[k].desc_ids = cpu_to_le64(VIRTCHNL2_RXDID_2_FLEX_SPLITQ_M);</div><div class='del'>-			qi[k].ring_len = cpu_to_le16(bufq-&gt;desc_count);</div><div class='del'>-			qi[k].dma_ring_addr = cpu_to_le64(bufq-&gt;dma);</div><div class='del'>-			qi[k].data_buffer_size = cpu_to_le32(bufq-&gt;rx_buf_size);</div><div class='del'>-			qi[k].buffer_notif_stride = IDPF_RX_BUF_STRIDE;</div><div class='del'>-			qi[k].rx_buffer_low_watermark =</div><div class='del'>-				cpu_to_le16(bufq-&gt;rx_buffer_low_watermark);</div><div class='del'>-			if (idpf_is_feature_ena(vport, NETIF_F_GRO_HW))</div><div class='del'>-				qi[k].qflags |= cpu_to_le16(VIRTCHNL2_RXQ_RSC);</div><div class='del'>-		}</div><div class='add'>+	params.chunks = qi;</div><div class='ctx'> </div><div class='del'>-setup_rxqs:</div><div class='del'>-		if (idpf_is_queue_model_split(vport-&gt;rxq_model))</div><div class='del'>-			num_rxq = rx_qgrp-&gt;splitq.num_rxq_sets;</div><div class='del'>-		else</div><div class='del'>-			num_rxq = rx_qgrp-&gt;singleq.num_rxq;</div><div class='add'>+	for (u32 i = 0; i &lt; qs-&gt;num; i++) {</div><div class='add'>+		if (qs-&gt;qs[i].type == VIRTCHNL2_QUEUE_TYPE_RX)</div><div class='add'>+			idpf_fill_rxq_config_chunk(qs-&gt;vport, qs-&gt;qs[i].rxq,</div><div class='add'>+						   &amp;qi[params.num_chunks++]);</div><div class='add'>+		else if (qs-&gt;qs[i].type == VIRTCHNL2_QUEUE_TYPE_RX_BUFFER)</div><div class='add'>+			idpf_fill_bufq_config_chunk(qs-&gt;vport, qs-&gt;qs[i].bufq,</div><div class='add'>+						    &amp;qi[params.num_chunks++]);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		for (j = 0; j &lt; num_rxq; j++, k++) {</div><div class='del'>-			const struct idpf_bufq_set *sets;</div><div class='del'>-			struct idpf_rx_queue *rxq;</div><div class='add'>+	return idpf_send_chunked_msg(qs-&gt;vport, &amp;params);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			if (!idpf_is_queue_model_split(vport-&gt;rxq_model)) {</div><div class='del'>-				rxq = rx_qgrp-&gt;singleq.rxqs[j];</div><div class='del'>-				goto common_qi_fields;</div><div class='del'>-			}</div><div class='add'>+/**</div><div class='add'>+ * idpf_send_config_rx_queues_msg - send virtchnl config Rx queues message</div><div class='add'>+ * @vport: virtual port data structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_send_config_rx_queues_msg(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	bool splitq = idpf_is_queue_model_split(vport-&gt;rxq_model);</div><div class='add'>+	struct idpf_queue_set *qs __free(kfree) = NULL;</div><div class='add'>+	u32 totqs = vport-&gt;num_rxq + vport-&gt;num_bufq;</div><div class='add'>+	u32 k = 0;</div><div class='ctx'> </div><div class='del'>-			rxq = &amp;rx_qgrp-&gt;splitq.rxq_sets[j]-&gt;rxq;</div><div class='del'>-			sets = rxq-&gt;bufq_sets;</div><div class='add'>+	qs = idpf_alloc_queue_set(vport, totqs);</div><div class='add'>+	if (!qs)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-			/* In splitq mode, RXQ buffer size should be</div><div class='del'>-			 * set to that of the first buffer queue</div><div class='del'>-			 * associated with this RXQ.</div><div class='del'>-			 */</div><div class='del'>-			rxq-&gt;rx_buf_size = sets[0].bufq.rx_buf_size;</div><div class='add'>+	/* Populate the queue info buffer with all queue context info */</div><div class='add'>+	for (u32 i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='add'>+		const struct idpf_rxq_group *rx_qgrp = &amp;vport-&gt;rxq_grps[i];</div><div class='add'>+		u32 num_rxq;</div><div class='ctx'> </div><div class='del'>-			qi[k].rx_bufq1_id = cpu_to_le16(sets[0].bufq.q_id);</div><div class='del'>-			if (vport-&gt;num_bufqs_per_qgrp &gt; IDPF_SINGLE_BUFQ_PER_RXQ_GRP) {</div><div class='del'>-				qi[k].bufq2_ena = IDPF_BUFQ2_ENA;</div><div class='del'>-				qi[k].rx_bufq2_id =</div><div class='del'>-					cpu_to_le16(sets[1].bufq.q_id);</div><div class='del'>-			}</div><div class='del'>-			qi[k].rx_buffer_low_watermark =</div><div class='del'>-				cpu_to_le16(rxq-&gt;rx_buffer_low_watermark);</div><div class='del'>-			if (idpf_is_feature_ena(vport, NETIF_F_GRO_HW))</div><div class='del'>-				qi[k].qflags |= cpu_to_le16(VIRTCHNL2_RXQ_RSC);</div><div class='del'>-</div><div class='del'>-			rxq-&gt;rx_hbuf_size = sets[0].bufq.rx_hbuf_size;</div><div class='del'>-</div><div class='del'>-			if (idpf_queue_has(HSPLIT_EN, rxq)) {</div><div class='del'>-				qi[k].qflags |=</div><div class='del'>-					cpu_to_le16(VIRTCHNL2_RXQ_HDR_SPLIT);</div><div class='del'>-				qi[k].hdr_buffer_size =</div><div class='del'>-					cpu_to_le16(rxq-&gt;rx_hbuf_size);</div><div class='del'>-			}</div><div class='add'>+		if (!splitq) {</div><div class='add'>+			num_rxq = rx_qgrp-&gt;singleq.num_rxq;</div><div class='add'>+			goto rxq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (u32 j = 0; j &lt; vport-&gt;num_bufqs_per_qgrp; j++) {</div><div class='add'>+			qs-&gt;qs[k].type = VIRTCHNL2_QUEUE_TYPE_RX_BUFFER;</div><div class='add'>+			qs-&gt;qs[k++].bufq = &amp;rx_qgrp-&gt;splitq.bufq_sets[j].bufq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		num_rxq = rx_qgrp-&gt;splitq.num_rxq_sets;</div><div class='ctx'> </div><div class='del'>-common_qi_fields:</div><div class='del'>-			qi[k].queue_id = cpu_to_le32(rxq-&gt;q_id);</div><div class='del'>-			qi[k].model = cpu_to_le16(vport-&gt;rxq_model);</div><div class='del'>-			qi[k].type = cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_RX);</div><div class='del'>-			qi[k].ring_len = cpu_to_le16(rxq-&gt;desc_count);</div><div class='del'>-			qi[k].dma_ring_addr = cpu_to_le64(rxq-&gt;dma);</div><div class='del'>-			qi[k].max_pkt_size = cpu_to_le32(rxq-&gt;rx_max_pkt_size);</div><div class='del'>-			qi[k].data_buffer_size = cpu_to_le32(rxq-&gt;rx_buf_size);</div><div class='del'>-			qi[k].qflags |=</div><div class='del'>-				cpu_to_le16(VIRTCHNL2_RX_DESC_SIZE_32BYTE);</div><div class='del'>-			qi[k].desc_ids = cpu_to_le64(rxq-&gt;rxdids);</div><div class='add'>+rxq:</div><div class='add'>+		for (u32 j = 0; j &lt; num_rxq; j++) {</div><div class='add'>+			qs-&gt;qs[k].type = VIRTCHNL2_QUEUE_TYPE_RX;</div><div class='add'>+</div><div class='add'>+			if (splitq)</div><div class='add'>+				qs-&gt;qs[k++].rxq =</div><div class='add'>+					&amp;rx_qgrp-&gt;splitq.rxq_sets[j]-&gt;rxq;</div><div class='add'>+			else</div><div class='add'>+				qs-&gt;qs[k++].rxq = rx_qgrp-&gt;singleq.rxqs[j];</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1655,317 +2048,395 @@ common_qi_fields:</div><div class='ctx'> 	if (k != totqs)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* Chunk up the queue contexts into multiple messages to avoid</div><div class='del'>-	 * sending a control queue message buffer that is too large</div><div class='del'>-	 */</div><div class='del'>-	config_sz = sizeof(struct virtchnl2_config_rx_queues);</div><div class='del'>-	chunk_sz = sizeof(struct virtchnl2_rxq_info);</div><div class='add'>+	return idpf_send_config_rx_queue_set_msg(qs);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	num_chunks = min_t(u32, IDPF_NUM_CHUNKS_PER_MSG(config_sz, chunk_sz),</div><div class='del'>-			   totqs);</div><div class='del'>-	num_msgs = DIV_ROUND_UP(totqs, num_chunks);</div><div class='add'>+/**</div><div class='add'>+ * idpf_prepare_ena_dis_qs_msg - prepare message to enable/disable selected</div><div class='add'>+ *				 queues</div><div class='add'>+ * @vport: virtual port data structure</div><div class='add'>+ * @buf: buffer containing the message</div><div class='add'>+ * @pos: pointer to the first chunk describing the queue</div><div class='add'>+ * @num_chunks: number of chunks in the message</div><div class='add'>+ *</div><div class='add'>+ * Helper function for preparing the message describing queues to be enabled</div><div class='add'>+ * or disabled.</div><div class='add'>+ *</div><div class='add'>+ * Return: the total size of the prepared message.</div><div class='add'>+ */</div><div class='add'>+static u32 idpf_prepare_ena_dis_qs_msg(const struct idpf_vport *vport,</div><div class='add'>+				       void *buf, const void *pos,</div><div class='add'>+				       u32 num_chunks)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_del_ena_dis_queues *eq = buf;</div><div class='add'>+</div><div class='add'>+	eq-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='add'>+	eq-&gt;chunks.num_chunks = cpu_to_le16(num_chunks);</div><div class='add'>+	memcpy(eq-&gt;chunks.chunks, pos,</div><div class='add'>+	       num_chunks * sizeof(*eq-&gt;chunks.chunks));</div><div class='add'>+</div><div class='add'>+	return struct_size(eq, chunks.chunks, num_chunks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_send_ena_dis_queue_set_msg - send virtchnl enable or disable queues</div><div class='add'>+ *				     message for selected queues</div><div class='add'>+ * @qs: set of the queues to enable or disable</div><div class='add'>+ * @en: whether to enable or disable queues</div><div class='add'>+ *</div><div class='add'>+ * Send enable or disable queues virtchnl message for queues contained</div><div class='add'>+ * in the @qs array.</div><div class='add'>+ * The @qs array can contain pointers to both Rx and Tx queues.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int idpf_send_ena_dis_queue_set_msg(const struct idpf_queue_set *qs,</div><div class='add'>+					   bool en)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_queue_chunk *qc __free(kfree) = NULL;</div><div class='add'>+	struct idpf_chunked_msg_params params = {</div><div class='add'>+		.vc_op		= en ? VIRTCHNL2_OP_ENABLE_QUEUES :</div><div class='add'>+				       VIRTCHNL2_OP_DISABLE_QUEUES,</div><div class='add'>+		.prepare_msg	= idpf_prepare_ena_dis_qs_msg,</div><div class='add'>+		.config_sz	= sizeof(struct virtchnl2_del_ena_dis_queues),</div><div class='add'>+		.chunk_sz	= sizeof(*qc),</div><div class='add'>+		.num_chunks	= qs-&gt;num,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	buf_sz = struct_size(crq, qinfo, num_chunks);</div><div class='del'>-	crq = kzalloc(buf_sz, GFP_KERNEL);</div><div class='del'>-	if (!crq)</div><div class='add'>+	qc = kcalloc(qs-&gt;num, sizeof(*qc), GFP_KERNEL);</div><div class='add'>+	if (!qc)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	xn_params.vc_op = VIRTCHNL2_OP_CONFIG_RX_QUEUES;</div><div class='del'>-	xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;</div><div class='add'>+	params.chunks = qc;</div><div class='ctx'> </div><div class='del'>-	for (i = 0, k = 0; i &lt; num_msgs; i++) {</div><div class='del'>-		memset(crq, 0, buf_sz);</div><div class='del'>-		crq-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='del'>-		crq-&gt;num_qinfo = cpu_to_le16(num_chunks);</div><div class='del'>-		memcpy(crq-&gt;qinfo, &amp;qi[k], chunk_sz * num_chunks);</div><div class='add'>+	for (u32 i = 0; i &lt; qs-&gt;num; i++) {</div><div class='add'>+		const struct idpf_queue_ptr *q = &amp;qs-&gt;qs[i];</div><div class='add'>+		u32 qid;</div><div class='ctx'> </div><div class='del'>-		xn_params.send_buf.iov_base = crq;</div><div class='del'>-		xn_params.send_buf.iov_len = buf_sz;</div><div class='del'>-		reply_sz = idpf_vc_xn_exec(vport-&gt;adapter, &amp;xn_params);</div><div class='del'>-		if (reply_sz &lt; 0)</div><div class='del'>-			return reply_sz;</div><div class='add'>+		qc[i].type = cpu_to_le32(q-&gt;type);</div><div class='add'>+		qc[i].num_queues = cpu_to_le32(IDPF_NUMQ_PER_CHUNK);</div><div class='ctx'> </div><div class='del'>-		k += num_chunks;</div><div class='del'>-		totqs -= num_chunks;</div><div class='del'>-		num_chunks = min(num_chunks, totqs);</div><div class='del'>-		/* Recalculate buffer size */</div><div class='del'>-		buf_sz = struct_size(crq, qinfo, num_chunks);</div><div class='add'>+		switch (q-&gt;type) {</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_RX:</div><div class='add'>+			qid = q-&gt;rxq-&gt;q_id;</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_TX:</div><div class='add'>+			qid = q-&gt;txq-&gt;q_id;</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_RX_BUFFER:</div><div class='add'>+			qid = q-&gt;bufq-&gt;q_id;</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION:</div><div class='add'>+			qid = q-&gt;complq-&gt;q_id;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		qc[i].start_queue_id = cpu_to_le32(qid);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return idpf_send_chunked_msg(qs-&gt;vport, &amp;params);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_send_ena_dis_queues_msg - Send virtchnl enable or disable</div><div class='del'>- * queues message</div><div class='add'>+ * idpf_send_ena_dis_queues_msg - send virtchnl enable or disable queues</div><div class='add'>+ *				  message</div><div class='ctx'>  * @vport: virtual port data structure</div><div class='del'>- * @ena: if true enable, false disable</div><div class='add'>+ * @en: whether to enable or disable queues</div><div class='ctx'>  *</div><div class='del'>- * Send enable or disable queues virtchnl message. Returns 0 on success,</div><div class='del'>- * negative on failure.</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='ctx'>  */</div><div class='del'>-static int idpf_send_ena_dis_queues_msg(struct idpf_vport *vport, bool ena)</div><div class='add'>+static int idpf_send_ena_dis_queues_msg(struct idpf_vport *vport, bool en)</div><div class='ctx'> {</div><div class='del'>-	struct virtchnl2_del_ena_dis_queues *eq __free(kfree) = NULL;</div><div class='del'>-	struct virtchnl2_queue_chunk *qc __free(kfree) = NULL;</div><div class='del'>-	u32 num_msgs, num_chunks, num_txq, num_rxq, num_q;</div><div class='del'>-	struct idpf_vc_xn_params xn_params = {};</div><div class='del'>-	struct virtchnl2_queue_chunks *qcs;</div><div class='del'>-	u32 config_sz, chunk_sz, buf_sz;</div><div class='del'>-	ssize_t reply_sz;</div><div class='del'>-	int i, j, k = 0;</div><div class='add'>+	struct idpf_queue_set *qs __free(kfree) = NULL;</div><div class='add'>+	u32 num_txq, num_q, k = 0;</div><div class='add'>+	bool split;</div><div class='ctx'> </div><div class='ctx'> 	num_txq = vport-&gt;num_txq + vport-&gt;num_complq;</div><div class='del'>-	num_rxq = vport-&gt;num_rxq + vport-&gt;num_bufq;</div><div class='del'>-	num_q = num_txq + num_rxq;</div><div class='del'>-	buf_sz = sizeof(struct virtchnl2_queue_chunk) * num_q;</div><div class='del'>-	qc = kzalloc(buf_sz, GFP_KERNEL);</div><div class='del'>-	if (!qc)</div><div class='add'>+	num_q = num_txq + vport-&gt;num_rxq + vport-&gt;num_bufq;</div><div class='add'>+</div><div class='add'>+	qs = idpf_alloc_queue_set(vport, num_q);</div><div class='add'>+	if (!qs)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_txq_grp; i++) {</div><div class='del'>-		struct idpf_txq_group *tx_qgrp = &amp;vport-&gt;txq_grps[i];</div><div class='add'>+	split = idpf_is_queue_model_split(vport-&gt;txq_model);</div><div class='ctx'> </div><div class='del'>-		for (j = 0; j &lt; tx_qgrp-&gt;num_txq; j++, k++) {</div><div class='del'>-			qc[k].type = cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_TX);</div><div class='del'>-			qc[k].start_queue_id = cpu_to_le32(tx_qgrp-&gt;txqs[j]-&gt;q_id);</div><div class='del'>-			qc[k].num_queues = cpu_to_le32(IDPF_NUMQ_PER_CHUNK);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (vport-&gt;num_txq != k)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	for (u32 i = 0; i &lt; vport-&gt;num_txq_grp; i++) {</div><div class='add'>+		const struct idpf_txq_group *tx_qgrp = &amp;vport-&gt;txq_grps[i];</div><div class='ctx'> </div><div class='del'>-	if (!idpf_is_queue_model_split(vport-&gt;txq_model))</div><div class='del'>-		goto setup_rx;</div><div class='add'>+		for (u32 j = 0; j &lt; tx_qgrp-&gt;num_txq; j++) {</div><div class='add'>+			qs-&gt;qs[k].type = VIRTCHNL2_QUEUE_TYPE_TX;</div><div class='add'>+			qs-&gt;qs[k++].txq = tx_qgrp-&gt;txqs[j];</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_txq_grp; i++, k++) {</div><div class='del'>-		struct idpf_txq_group *tx_qgrp = &amp;vport-&gt;txq_grps[i];</div><div class='add'>+		if (!split)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-		qc[k].type = cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION);</div><div class='del'>-		qc[k].start_queue_id = cpu_to_le32(tx_qgrp-&gt;complq-&gt;q_id);</div><div class='del'>-		qc[k].num_queues = cpu_to_le32(IDPF_NUMQ_PER_CHUNK);</div><div class='add'>+		qs-&gt;qs[k].type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;</div><div class='add'>+		qs-&gt;qs[k++].complq = tx_qgrp-&gt;complq;</div><div class='ctx'> 	}</div><div class='del'>-	if (vport-&gt;num_complq != (k - vport-&gt;num_txq))</div><div class='add'>+</div><div class='add'>+	if (k != num_txq)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-setup_rx:</div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='del'>-		struct idpf_rxq_group *rx_qgrp = &amp;vport-&gt;rxq_grps[i];</div><div class='add'>+	split = idpf_is_queue_model_split(vport-&gt;rxq_model);</div><div class='ctx'> </div><div class='del'>-		if (idpf_is_queue_model_split(vport-&gt;rxq_model))</div><div class='add'>+	for (u32 i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='add'>+		const struct idpf_rxq_group *rx_qgrp = &amp;vport-&gt;rxq_grps[i];</div><div class='add'>+		u32 num_rxq;</div><div class='add'>+</div><div class='add'>+		if (split)</div><div class='ctx'> 			num_rxq = rx_qgrp-&gt;splitq.num_rxq_sets;</div><div class='ctx'> 		else</div><div class='ctx'> 			num_rxq = rx_qgrp-&gt;singleq.num_rxq;</div><div class='ctx'> </div><div class='del'>-		for (j = 0; j &lt; num_rxq; j++, k++) {</div><div class='del'>-			if (idpf_is_queue_model_split(vport-&gt;rxq_model)) {</div><div class='del'>-				qc[k].start_queue_id =</div><div class='del'>-				cpu_to_le32(rx_qgrp-&gt;splitq.rxq_sets[j]-&gt;rxq.q_id);</div><div class='del'>-				qc[k].type =</div><div class='del'>-				cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_RX);</div><div class='del'>-			} else {</div><div class='del'>-				qc[k].start_queue_id =</div><div class='del'>-				cpu_to_le32(rx_qgrp-&gt;singleq.rxqs[j]-&gt;q_id);</div><div class='del'>-				qc[k].type =</div><div class='del'>-				cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_RX);</div><div class='del'>-			}</div><div class='del'>-			qc[k].num_queues = cpu_to_le32(IDPF_NUMQ_PER_CHUNK);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (vport-&gt;num_rxq != k - (vport-&gt;num_txq + vport-&gt;num_complq))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!idpf_is_queue_model_split(vport-&gt;rxq_model))</div><div class='del'>-		goto send_msg;</div><div class='add'>+		for (u32 j = 0; j &lt; num_rxq; j++) {</div><div class='add'>+			qs-&gt;qs[k].type = VIRTCHNL2_QUEUE_TYPE_RX;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='del'>-		struct idpf_rxq_group *rx_qgrp = &amp;vport-&gt;rxq_grps[i];</div><div class='add'>+			if (split)</div><div class='add'>+				qs-&gt;qs[k++].rxq =</div><div class='add'>+					&amp;rx_qgrp-&gt;splitq.rxq_sets[j]-&gt;rxq;</div><div class='add'>+			else</div><div class='add'>+				qs-&gt;qs[k++].rxq = rx_qgrp-&gt;singleq.rxqs[j];</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		for (j = 0; j &lt; vport-&gt;num_bufqs_per_qgrp; j++, k++) {</div><div class='del'>-			const struct idpf_buf_queue *q;</div><div class='add'>+		if (!split)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-			q = &amp;rx_qgrp-&gt;splitq.bufq_sets[j].bufq;</div><div class='del'>-			qc[k].type =</div><div class='del'>-				cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_RX_BUFFER);</div><div class='del'>-			qc[k].start_queue_id = cpu_to_le32(q-&gt;q_id);</div><div class='del'>-			qc[k].num_queues = cpu_to_le32(IDPF_NUMQ_PER_CHUNK);</div><div class='add'>+		for (u32 j = 0; j &lt; vport-&gt;num_bufqs_per_qgrp; j++) {</div><div class='add'>+			qs-&gt;qs[k].type = VIRTCHNL2_QUEUE_TYPE_RX_BUFFER;</div><div class='add'>+			qs-&gt;qs[k++].bufq = &amp;rx_qgrp-&gt;splitq.bufq_sets[j].bufq;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (vport-&gt;num_bufq != k - (vport-&gt;num_txq +</div><div class='del'>-				    vport-&gt;num_complq +</div><div class='del'>-				    vport-&gt;num_rxq))</div><div class='add'>+</div><div class='add'>+	if (k != num_q)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-send_msg:</div><div class='del'>-	/* Chunk up the queue info into multiple messages */</div><div class='del'>-	config_sz = sizeof(struct virtchnl2_del_ena_dis_queues);</div><div class='del'>-	chunk_sz = sizeof(struct virtchnl2_queue_chunk);</div><div class='add'>+	return idpf_send_ena_dis_queue_set_msg(qs, en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_prep_map_unmap_queue_set_vector_msg - prepare message to map or unmap</div><div class='add'>+ *					      queue set to the interrupt vector</div><div class='add'>+ * @vport: virtual port data structure</div><div class='add'>+ * @buf: buffer containing the message</div><div class='add'>+ * @pos: pointer to the first chunk describing the vector mapping</div><div class='add'>+ * @num_chunks: number of chunks in the message</div><div class='add'>+ *</div><div class='add'>+ * Helper function for preparing the message describing mapping queues to</div><div class='add'>+ * q_vectors.</div><div class='add'>+ *</div><div class='add'>+ * Return: the total size of the prepared message.</div><div class='add'>+ */</div><div class='add'>+static u32</div><div class='add'>+idpf_prep_map_unmap_queue_set_vector_msg(const struct idpf_vport *vport,</div><div class='add'>+					 void *buf, const void *pos,</div><div class='add'>+					 u32 num_chunks)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_queue_vector_maps *vqvm = buf;</div><div class='ctx'> </div><div class='del'>-	num_chunks = min_t(u32, IDPF_NUM_CHUNKS_PER_MSG(config_sz, chunk_sz),</div><div class='del'>-			   num_q);</div><div class='del'>-	num_msgs = DIV_ROUND_UP(num_q, num_chunks);</div><div class='add'>+	vqvm-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='add'>+	vqvm-&gt;num_qv_maps = cpu_to_le16(num_chunks);</div><div class='add'>+	memcpy(vqvm-&gt;qv_maps, pos, num_chunks * sizeof(*vqvm-&gt;qv_maps));</div><div class='ctx'> </div><div class='del'>-	buf_sz = struct_size(eq, chunks.chunks, num_chunks);</div><div class='del'>-	eq = kzalloc(buf_sz, GFP_KERNEL);</div><div class='del'>-	if (!eq)</div><div class='add'>+	return struct_size(vqvm, qv_maps, num_chunks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_send_map_unmap_queue_set_vector_msg - send virtchnl map or unmap</div><div class='add'>+ *					      queue set vector message</div><div class='add'>+ * @qs: set of the queues to map or unmap</div><div class='add'>+ * @map: true for map and false for unmap</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+idpf_send_map_unmap_queue_set_vector_msg(const struct idpf_queue_set *qs,</div><div class='add'>+					 bool map)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_queue_vector *vqv __free(kfree) = NULL;</div><div class='add'>+	struct idpf_chunked_msg_params params = {</div><div class='add'>+		.vc_op		= map ? VIRTCHNL2_OP_MAP_QUEUE_VECTOR :</div><div class='add'>+					VIRTCHNL2_OP_UNMAP_QUEUE_VECTOR,</div><div class='add'>+		.prepare_msg	= idpf_prep_map_unmap_queue_set_vector_msg,</div><div class='add'>+		.config_sz	= sizeof(struct virtchnl2_queue_vector_maps),</div><div class='add'>+		.chunk_sz	= sizeof(*vqv),</div><div class='add'>+		.num_chunks	= qs-&gt;num,</div><div class='add'>+	};</div><div class='add'>+	bool split;</div><div class='add'>+</div><div class='add'>+	vqv = kcalloc(qs-&gt;num, sizeof(*vqv), GFP_KERNEL);</div><div class='add'>+	if (!vqv)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (ena) {</div><div class='del'>-		xn_params.vc_op = VIRTCHNL2_OP_ENABLE_QUEUES;</div><div class='del'>-		xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;</div><div class='del'>-	} else {</div><div class='del'>-		xn_params.vc_op = VIRTCHNL2_OP_DISABLE_QUEUES;</div><div class='del'>-		xn_params.timeout_ms = IDPF_VC_XN_MIN_TIMEOUT_MSEC;</div><div class='del'>-	}</div><div class='add'>+	params.chunks = vqv;</div><div class='ctx'> </div><div class='del'>-	for (i = 0, k = 0; i &lt; num_msgs; i++) {</div><div class='del'>-		memset(eq, 0, buf_sz);</div><div class='del'>-		eq-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='del'>-		eq-&gt;chunks.num_chunks = cpu_to_le16(num_chunks);</div><div class='del'>-		qcs = &amp;eq-&gt;chunks;</div><div class='del'>-		memcpy(qcs-&gt;chunks, &amp;qc[k], chunk_sz * num_chunks);</div><div class='add'>+	split = idpf_is_queue_model_split(qs-&gt;vport-&gt;txq_model);</div><div class='ctx'> </div><div class='del'>-		xn_params.send_buf.iov_base = eq;</div><div class='del'>-		xn_params.send_buf.iov_len = buf_sz;</div><div class='del'>-		reply_sz = idpf_vc_xn_exec(vport-&gt;adapter, &amp;xn_params);</div><div class='del'>-		if (reply_sz &lt; 0)</div><div class='del'>-			return reply_sz;</div><div class='add'>+	for (u32 i = 0; i &lt; qs-&gt;num; i++) {</div><div class='add'>+		const struct idpf_queue_ptr *q = &amp;qs-&gt;qs[i];</div><div class='add'>+		const struct idpf_q_vector *vec;</div><div class='add'>+		u32 qid, v_idx, itr_idx;</div><div class='add'>+</div><div class='add'>+		vqv[i].queue_type = cpu_to_le32(q-&gt;type);</div><div class='ctx'> </div><div class='del'>-		k += num_chunks;</div><div class='del'>-		num_q -= num_chunks;</div><div class='del'>-		num_chunks = min(num_chunks, num_q);</div><div class='del'>-		/* Recalculate buffer size */</div><div class='del'>-		buf_sz = struct_size(eq, chunks.chunks, num_chunks);</div><div class='add'>+		switch (q-&gt;type) {</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_RX:</div><div class='add'>+			qid = q-&gt;rxq-&gt;q_id;</div><div class='add'>+</div><div class='add'>+			if (idpf_queue_has(NOIRQ, q-&gt;rxq))</div><div class='add'>+				vec = NULL;</div><div class='add'>+			else</div><div class='add'>+				vec = q-&gt;rxq-&gt;q_vector;</div><div class='add'>+</div><div class='add'>+			if (vec) {</div><div class='add'>+				v_idx = vec-&gt;v_idx;</div><div class='add'>+				itr_idx = vec-&gt;rx_itr_idx;</div><div class='add'>+			} else {</div><div class='add'>+				v_idx = qs-&gt;vport-&gt;noirq_v_idx;</div><div class='add'>+				itr_idx = VIRTCHNL2_ITR_IDX_0;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case VIRTCHNL2_QUEUE_TYPE_TX:</div><div class='add'>+			qid = q-&gt;txq-&gt;q_id;</div><div class='add'>+</div><div class='add'>+			if (idpf_queue_has(NOIRQ, q-&gt;txq))</div><div class='add'>+				vec = NULL;</div><div class='add'>+			else if (idpf_queue_has(XDP, q-&gt;txq))</div><div class='add'>+				vec = q-&gt;txq-&gt;complq-&gt;q_vector;</div><div class='add'>+			else if (split)</div><div class='add'>+				vec = q-&gt;txq-&gt;txq_grp-&gt;complq-&gt;q_vector;</div><div class='add'>+			else</div><div class='add'>+				vec = q-&gt;txq-&gt;q_vector;</div><div class='add'>+</div><div class='add'>+			if (vec) {</div><div class='add'>+				v_idx = vec-&gt;v_idx;</div><div class='add'>+				itr_idx = vec-&gt;tx_itr_idx;</div><div class='add'>+			} else {</div><div class='add'>+				v_idx = qs-&gt;vport-&gt;noirq_v_idx;</div><div class='add'>+				itr_idx = VIRTCHNL2_ITR_IDX_1;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		vqv[i].queue_id = cpu_to_le32(qid);</div><div class='add'>+		vqv[i].vector_id = cpu_to_le16(v_idx);</div><div class='add'>+		vqv[i].itr_idx = cpu_to_le32(itr_idx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return idpf_send_chunked_msg(qs-&gt;vport, &amp;params);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * idpf_send_map_unmap_queue_vector_msg - Send virtchnl map or unmap queue</div><div class='del'>- * vector message</div><div class='add'>+ * idpf_send_map_unmap_queue_vector_msg - send virtchnl map or unmap queue</div><div class='add'>+ *					  vector message</div><div class='ctx'>  * @vport: virtual port data structure</div><div class='ctx'>  * @map: true for map and false for unmap</div><div class='ctx'>  *</div><div class='del'>- * Send map or unmap queue vector virtchnl message.  Returns 0 on success,</div><div class='del'>- * negative on failure.</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='ctx'>  */</div><div class='ctx'> int idpf_send_map_unmap_queue_vector_msg(struct idpf_vport *vport, bool map)</div><div class='ctx'> {</div><div class='del'>-	struct virtchnl2_queue_vector_maps *vqvm __free(kfree) = NULL;</div><div class='del'>-	struct virtchnl2_queue_vector *vqv __free(kfree) = NULL;</div><div class='del'>-	struct idpf_vc_xn_params xn_params = {};</div><div class='del'>-	u32 config_sz, chunk_sz, buf_sz;</div><div class='del'>-	u32 num_msgs, num_chunks, num_q;</div><div class='del'>-	ssize_t reply_sz;</div><div class='del'>-	int i, j, k = 0;</div><div class='add'>+	struct idpf_queue_set *qs __free(kfree) = NULL;</div><div class='add'>+	u32 num_q = vport-&gt;num_txq + vport-&gt;num_rxq;</div><div class='add'>+	u32 k = 0;</div><div class='ctx'> </div><div class='del'>-	num_q = vport-&gt;num_txq + vport-&gt;num_rxq;</div><div class='del'>-</div><div class='del'>-	buf_sz = sizeof(struct virtchnl2_queue_vector) * num_q;</div><div class='del'>-	vqv = kzalloc(buf_sz, GFP_KERNEL);</div><div class='del'>-	if (!vqv)</div><div class='add'>+	qs = idpf_alloc_queue_set(vport, num_q);</div><div class='add'>+	if (!qs)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_txq_grp; i++) {</div><div class='del'>-		struct idpf_txq_group *tx_qgrp = &amp;vport-&gt;txq_grps[i];</div><div class='add'>+	for (u32 i = 0; i &lt; vport-&gt;num_txq_grp; i++) {</div><div class='add'>+		const struct idpf_txq_group *tx_qgrp = &amp;vport-&gt;txq_grps[i];</div><div class='ctx'> </div><div class='del'>-		for (j = 0; j &lt; tx_qgrp-&gt;num_txq; j++, k++) {</div><div class='del'>-			vqv[k].queue_type =</div><div class='del'>-				cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_TX);</div><div class='del'>-			vqv[k].queue_id = cpu_to_le32(tx_qgrp-&gt;txqs[j]-&gt;q_id);</div><div class='del'>-</div><div class='del'>-			if (idpf_is_queue_model_split(vport-&gt;txq_model)) {</div><div class='del'>-				vqv[k].vector_id =</div><div class='del'>-				cpu_to_le16(tx_qgrp-&gt;complq-&gt;q_vector-&gt;v_idx);</div><div class='del'>-				vqv[k].itr_idx =</div><div class='del'>-				cpu_to_le32(tx_qgrp-&gt;complq-&gt;q_vector-&gt;tx_itr_idx);</div><div class='del'>-			} else {</div><div class='del'>-				vqv[k].vector_id =</div><div class='del'>-				cpu_to_le16(tx_qgrp-&gt;txqs[j]-&gt;q_vector-&gt;v_idx);</div><div class='del'>-				vqv[k].itr_idx =</div><div class='del'>-				cpu_to_le32(tx_qgrp-&gt;txqs[j]-&gt;q_vector-&gt;tx_itr_idx);</div><div class='del'>-			}</div><div class='add'>+		for (u32 j = 0; j &lt; tx_qgrp-&gt;num_txq; j++) {</div><div class='add'>+			qs-&gt;qs[k].type = VIRTCHNL2_QUEUE_TYPE_TX;</div><div class='add'>+			qs-&gt;qs[k++].txq = tx_qgrp-&gt;txqs[j];</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (vport-&gt;num_txq != k)</div><div class='add'>+	if (k != vport-&gt;num_txq)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='del'>-		struct idpf_rxq_group *rx_qgrp = &amp;vport-&gt;rxq_grps[i];</div><div class='del'>-		u16 num_rxq;</div><div class='add'>+	for (u32 i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='add'>+		const struct idpf_rxq_group *rx_qgrp = &amp;vport-&gt;rxq_grps[i];</div><div class='add'>+		u32 num_rxq;</div><div class='ctx'> </div><div class='ctx'> 		if (idpf_is_queue_model_split(vport-&gt;rxq_model))</div><div class='ctx'> 			num_rxq = rx_qgrp-&gt;splitq.num_rxq_sets;</div><div class='ctx'> 		else</div><div class='ctx'> 			num_rxq = rx_qgrp-&gt;singleq.num_rxq;</div><div class='ctx'> </div><div class='del'>-		for (j = 0; j &lt; num_rxq; j++, k++) {</div><div class='del'>-			struct idpf_rx_queue *rxq;</div><div class='add'>+		for (u32 j = 0; j &lt; num_rxq; j++) {</div><div class='add'>+			qs-&gt;qs[k].type = VIRTCHNL2_QUEUE_TYPE_RX;</div><div class='ctx'> </div><div class='ctx'> 			if (idpf_is_queue_model_split(vport-&gt;rxq_model))</div><div class='del'>-				rxq = &amp;rx_qgrp-&gt;splitq.rxq_sets[j]-&gt;rxq;</div><div class='add'>+				qs-&gt;qs[k++].rxq =</div><div class='add'>+					&amp;rx_qgrp-&gt;splitq.rxq_sets[j]-&gt;rxq;</div><div class='ctx'> 			else</div><div class='del'>-				rxq = rx_qgrp-&gt;singleq.rxqs[j];</div><div class='del'>-</div><div class='del'>-			vqv[k].queue_type =</div><div class='del'>-				cpu_to_le32(VIRTCHNL2_QUEUE_TYPE_RX);</div><div class='del'>-			vqv[k].queue_id = cpu_to_le32(rxq-&gt;q_id);</div><div class='del'>-			vqv[k].vector_id = cpu_to_le16(rxq-&gt;q_vector-&gt;v_idx);</div><div class='del'>-			vqv[k].itr_idx = cpu_to_le32(rxq-&gt;q_vector-&gt;rx_itr_idx);</div><div class='add'>+				qs-&gt;qs[k++].rxq = rx_qgrp-&gt;singleq.rxqs[j];</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (idpf_is_queue_model_split(vport-&gt;txq_model)) {</div><div class='del'>-		if (vport-&gt;num_rxq != k - vport-&gt;num_complq)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-	} else {</div><div class='del'>-		if (vport-&gt;num_rxq != k - vport-&gt;num_txq)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	if (k != num_q)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* Chunk up the vector info into multiple messages */</div><div class='del'>-	config_sz = sizeof(struct virtchnl2_queue_vector_maps);</div><div class='del'>-	chunk_sz = sizeof(struct virtchnl2_queue_vector);</div><div class='add'>+	return idpf_send_map_unmap_queue_set_vector_msg(qs, map);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	num_chunks = min_t(u32, IDPF_NUM_CHUNKS_PER_MSG(config_sz, chunk_sz),</div><div class='del'>-			   num_q);</div><div class='del'>-	num_msgs = DIV_ROUND_UP(num_q, num_chunks);</div><div class='add'>+/**</div><div class='add'>+ * idpf_send_enable_queue_set_msg - send enable queues virtchnl message for</div><div class='add'>+ *				    selected queues</div><div class='add'>+ * @qs: set of the queues</div><div class='add'>+ *</div><div class='add'>+ * Send enable queues virtchnl message for queues contained in the @qs array.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_send_enable_queue_set_msg(const struct idpf_queue_set *qs)</div><div class='add'>+{</div><div class='add'>+	return idpf_send_ena_dis_queue_set_msg(qs, true);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	buf_sz = struct_size(vqvm, qv_maps, num_chunks);</div><div class='del'>-	vqvm = kzalloc(buf_sz, GFP_KERNEL);</div><div class='del'>-	if (!vqvm)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+/**</div><div class='add'>+ * idpf_send_disable_queue_set_msg - send disable queues virtchnl message for</div><div class='add'>+ *				     selected queues</div><div class='add'>+ * @qs: set of the queues</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_send_disable_queue_set_msg(const struct idpf_queue_set *qs)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	if (map) {</div><div class='del'>-		xn_params.vc_op = VIRTCHNL2_OP_MAP_QUEUE_VECTOR;</div><div class='del'>-		xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;</div><div class='del'>-	} else {</div><div class='del'>-		xn_params.vc_op = VIRTCHNL2_OP_UNMAP_QUEUE_VECTOR;</div><div class='del'>-		xn_params.timeout_ms = IDPF_VC_XN_MIN_TIMEOUT_MSEC;</div><div class='del'>-	}</div><div class='add'>+	err = idpf_send_ena_dis_queue_set_msg(qs, false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	for (i = 0, k = 0; i &lt; num_msgs; i++) {</div><div class='del'>-		memset(vqvm, 0, buf_sz);</div><div class='del'>-		xn_params.send_buf.iov_base = vqvm;</div><div class='del'>-		xn_params.send_buf.iov_len = buf_sz;</div><div class='del'>-		vqvm-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='del'>-		vqvm-&gt;num_qv_maps = cpu_to_le16(num_chunks);</div><div class='del'>-		memcpy(vqvm-&gt;qv_maps, &amp;vqv[k], chunk_sz * num_chunks);</div><div class='add'>+	return idpf_wait_for_marker_event_set(qs);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		reply_sz = idpf_vc_xn_exec(vport-&gt;adapter, &amp;xn_params);</div><div class='del'>-		if (reply_sz &lt; 0)</div><div class='del'>-			return reply_sz;</div><div class='add'>+/**</div><div class='add'>+ * idpf_send_config_queue_set_msg - send virtchnl config queues message for</div><div class='add'>+ *				    selected queues</div><div class='add'>+ * @qs: set of the queues</div><div class='add'>+ *</div><div class='add'>+ * Send config queues virtchnl message for queues contained in the @qs array.</div><div class='add'>+ * The @qs array can contain both Rx or Tx queues.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_send_config_queue_set_msg(const struct idpf_queue_set *qs)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-		k += num_chunks;</div><div class='del'>-		num_q -= num_chunks;</div><div class='del'>-		num_chunks = min(num_chunks, num_q);</div><div class='del'>-		/* Recalculate buffer size */</div><div class='del'>-		buf_sz = struct_size(vqvm, qv_maps, num_chunks);</div><div class='del'>-	}</div><div class='add'>+	err = idpf_send_config_tx_queue_set_msg(qs);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return idpf_send_config_rx_queue_set_msg(qs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1989,24 +2460,12 @@ int idpf_send_enable_queues_msg(struct idpf_vport *vport)</div><div class='ctx'>  */</div><div class='ctx'> int idpf_send_disable_queues_msg(struct idpf_vport *vport)</div><div class='ctx'> {</div><div class='del'>-	int err, i;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = idpf_send_ena_dis_queues_msg(vport, false);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* switch to poll mode as interrupts will be disabled after disable</div><div class='del'>-	 * queues virtchnl message is sent</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_txq; i++)</div><div class='del'>-		idpf_queue_set(POLL_MODE, vport-&gt;txqs[i]);</div><div class='del'>-</div><div class='del'>-	/* schedule the napi to receive all the marker packets */</div><div class='del'>-	local_bh_disable();</div><div class='del'>-	for (i = 0; i &lt; vport-&gt;num_q_vectors; i++)</div><div class='del'>-		napi_schedule(&amp;vport-&gt;q_vectors[i].napi);</div><div class='del'>-	local_bh_enable();</div><div class='del'>-</div><div class='ctx'> 	return idpf_wait_for_marker_event(vport);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2071,7 +2530,7 @@ int idpf_send_delete_queues_msg(struct idpf_vport *vport)</div><div class='ctx'> 					 num_chunks);</div><div class='ctx'> </div><div class='ctx'> 	xn_params.vc_op = VIRTCHNL2_OP_DEL_QUEUES;</div><div class='del'>-	xn_params.timeout_ms = IDPF_VC_XN_MIN_TIMEOUT_MSEC;</div><div class='add'>+	xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;</div><div class='ctx'> 	xn_params.send_buf.iov_base = eq;</div><div class='ctx'> 	xn_params.send_buf.iov_len = buf_size;</div><div class='ctx'> 	reply_sz = idpf_vc_xn_exec(vport-&gt;adapter, &amp;xn_params);</div><div class='hunk'>@@ -2235,7 +2694,7 @@ int idpf_send_dealloc_vectors_msg(struct idpf_adapter *adapter)</div><div class='ctx'> 	xn_params.vc_op = VIRTCHNL2_OP_DEALLOC_VECTORS;</div><div class='ctx'> 	xn_params.send_buf.iov_base = vcs;</div><div class='ctx'> 	xn_params.send_buf.iov_len = buf_size;</div><div class='del'>-	xn_params.timeout_ms = IDPF_VC_XN_MIN_TIMEOUT_MSEC;</div><div class='add'>+	xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;</div><div class='ctx'> 	reply_sz = idpf_vc_xn_exec(adapter, &amp;xn_params);</div><div class='ctx'> 	if (reply_sz &lt; 0)</div><div class='ctx'> 		return reply_sz;</div><div class='hunk'>@@ -2296,7 +2755,7 @@ int idpf_send_get_stats_msg(struct idpf_vport *vport)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* Don't send get_stats message if the link is down */</div><div class='del'>-	if (np-&gt;state &lt;= __IDPF_VPORT_DOWN)</div><div class='add'>+	if (!test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	stats_msg.vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='hunk'>@@ -2825,7 +3284,7 @@ int idpf_init_dflt_mbx(struct idpf_adapter *adapter)</div><div class='ctx'> 	struct idpf_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;dev_ops.reg_ops.ctlq_reg_init(ctlq_info);</div><div class='add'>+	adapter-&gt;dev_ops.reg_ops.ctlq_reg_init(adapter, ctlq_info);</div><div class='ctx'> </div><div class='ctx'> 	err = idpf_ctlq_init(hw, IDPF_NUM_DFLT_MBX_Q, ctlq_info);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -2985,6 +3444,30 @@ restart:</div><div class='ctx'> 		msleep(task_delay);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (idpf_is_cap_ena(adapter, IDPF_OTHER_CAPS, VIRTCHNL2_CAP_LAN_MEMORY_REGIONS)) {</div><div class='add'>+		err = idpf_send_get_lan_memory_regions(adapter);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to get LAN memory regions: %d\n",</div><div class='add'>+				err);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* Fallback to mapping the remaining regions of the entire BAR */</div><div class='add'>+		err = idpf_calc_remaining_mmio_regs(adapter);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to allocate BAR0 region(s): %d\n",</div><div class='add'>+				err);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = idpf_map_lan_mmio_regs(adapter);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Failed to map BAR0 region(s): %d\n",</div><div class='add'>+			err);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pci_sriov_set_totalvfs(adapter-&gt;pdev, idpf_get_max_vfs(adapter));</div><div class='ctx'> 	num_max_vports = idpf_get_max_vports(adapter);</div><div class='ctx'> 	adapter-&gt;max_vports = num_max_vports;</div><div class='hunk'>@@ -3025,6 +3508,11 @@ restart:</div><div class='ctx'> 		goto err_intr_req;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = idpf_ptp_init(adapter);</div><div class='add'>+	if (err)</div><div class='add'>+		pci_err(adapter-&gt;pdev, "PTP init failed, err=%pe\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+</div><div class='ctx'> 	idpf_init_avail_queues(adapter);</div><div class='ctx'> </div><div class='ctx'> 	/* Skew the delay for init tasks for each function based on fn number</div><div class='hunk'>@@ -3063,7 +3551,6 @@ init_failed:</div><div class='ctx'> 	adapter-&gt;state = __IDPF_VER_CHECK;</div><div class='ctx'> 	if (adapter-&gt;vcxn_mngr)</div><div class='ctx'> 		idpf_vc_xn_shutdown(adapter-&gt;vcxn_mngr);</div><div class='del'>-	idpf_deinit_dflt_mbx(adapter);</div><div class='ctx'> 	set_bit(IDPF_HR_DRV_LOAD, adapter-&gt;flags);</div><div class='ctx'> 	queue_delayed_work(adapter-&gt;vc_event_wq, &amp;adapter-&gt;vc_event_task,</div><div class='ctx'> 			   msecs_to_jiffies(task_delay));</div><div class='hunk'>@@ -3078,12 +3565,23 @@ init_failed:</div><div class='ctx'>  */</div><div class='ctx'> void idpf_vc_core_deinit(struct idpf_adapter *adapter)</div><div class='ctx'> {</div><div class='add'>+	bool remove_in_prog;</div><div class='add'>+</div><div class='ctx'> 	if (!test_bit(IDPF_VC_CORE_INIT, adapter-&gt;flags))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* Avoid transaction timeouts when called during reset */</div><div class='add'>+	remove_in_prog = test_bit(IDPF_REMOVE_IN_PROG, adapter-&gt;flags);</div><div class='add'>+	if (!remove_in_prog)</div><div class='add'>+		idpf_vc_xn_shutdown(adapter-&gt;vcxn_mngr);</div><div class='add'>+</div><div class='add'>+	idpf_ptp_release(adapter);</div><div class='ctx'> 	idpf_deinit_task(adapter);</div><div class='add'>+	idpf_idc_deinit_core_aux_device(adapter-&gt;cdev_info);</div><div class='ctx'> 	idpf_intr_rel(adapter);</div><div class='del'>-	idpf_vc_xn_shutdown(adapter-&gt;vcxn_mngr);</div><div class='add'>+</div><div class='add'>+	if (remove_in_prog)</div><div class='add'>+		idpf_vc_xn_shutdown(adapter-&gt;vcxn_mngr);</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adapter-&gt;serv_task);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;adapter-&gt;mbx_task);</div><div class='hunk'>@@ -3110,9 +3608,17 @@ int idpf_vport_alloc_vec_indexes(struct idpf_vport *vport)</div><div class='ctx'> {</div><div class='ctx'> 	struct idpf_vector_info vec_info;</div><div class='ctx'> 	int num_alloc_vecs;</div><div class='add'>+	u32 req;</div><div class='ctx'> </div><div class='ctx'> 	vec_info.num_curr_vecs = vport-&gt;num_q_vectors;</div><div class='del'>-	vec_info.num_req_vecs = max(vport-&gt;num_txq, vport-&gt;num_rxq);</div><div class='add'>+	if (vec_info.num_curr_vecs)</div><div class='add'>+		vec_info.num_curr_vecs += IDPF_RESERVED_VECS;</div><div class='add'>+</div><div class='add'>+	/* XDPSQs are all bound to the NOIRQ vector from IDPF_RESERVED_VECS */</div><div class='add'>+	req = max(vport-&gt;num_txq - vport-&gt;num_xdp_txq, vport-&gt;num_rxq) +</div><div class='add'>+	      IDPF_RESERVED_VECS;</div><div class='add'>+	vec_info.num_req_vecs = req;</div><div class='add'>+</div><div class='ctx'> 	vec_info.default_vport = vport-&gt;default_vport;</div><div class='ctx'> 	vec_info.index = vport-&gt;idx;</div><div class='ctx'> </div><div class='hunk'>@@ -3125,7 +3631,7 @@ int idpf_vport_alloc_vec_indexes(struct idpf_vport *vport)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vport-&gt;num_q_vectors = num_alloc_vecs;</div><div class='add'>+	vport-&gt;num_q_vectors = num_alloc_vecs - IDPF_RESERVED_VECS;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3146,6 +3652,7 @@ void idpf_vport_init(struct idpf_vport *vport, struct idpf_vport_max_q *max_q)</div><div class='ctx'> 	u16 rx_itr[] = {2, 8, 32, 96, 128};</div><div class='ctx'> 	struct idpf_rss_data *rss_data;</div><div class='ctx'> 	u16 idx = vport-&gt;idx;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	vport_config = adapter-&gt;vport_config[idx];</div><div class='ctx'> 	rss_data = &amp;vport_config-&gt;user_config.rss_data;</div><div class='hunk'>@@ -3180,6 +3687,18 @@ void idpf_vport_init(struct idpf_vport *vport, struct idpf_vport_max_q *max_q)</div><div class='ctx'> 	idpf_vport_alloc_vec_indexes(vport);</div><div class='ctx'> </div><div class='ctx'> 	vport-&gt;crc_enable = adapter-&gt;crc_enable;</div><div class='add'>+</div><div class='add'>+	if (!(vport_msg-&gt;vport_flags &amp;</div><div class='add'>+	      cpu_to_le16(VIRTCHNL2_VPORT_UPLINK_PORT)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	err = idpf_ptp_get_vport_tstamps_caps(vport);</div><div class='add'>+	if (err) {</div><div class='add'>+		pci_dbg(vport-&gt;adapter-&gt;pdev, "Tx timestamping not supported\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;vport-&gt;tstamp_task, idpf_tstamp_task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3490,6 +4009,79 @@ bool idpf_is_capability_ena(struct idpf_adapter *adapter, bool all,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * idpf_vport_is_cap_ena - Check if vport capability is enabled</div><div class='add'>+ * @vport: Private data struct</div><div class='add'>+ * @flag: flag(s) to check</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the capability is supported, false otherwise</div><div class='add'>+ */</div><div class='add'>+bool idpf_vport_is_cap_ena(struct idpf_vport *vport, u16 flag)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_create_vport *vport_msg;</div><div class='add'>+</div><div class='add'>+	vport_msg = vport-&gt;adapter-&gt;vport_params_recvd[vport-&gt;idx];</div><div class='add'>+</div><div class='add'>+	return !!(le16_to_cpu(vport_msg-&gt;vport_flags) &amp; flag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_sideband_flow_type_ena - Check if steering is enabled for flow type</div><div class='add'>+ * @vport: Private data struct</div><div class='add'>+ * @flow_type: flow type to check (from ethtool.h)</div><div class='add'>+ *</div><div class='add'>+ * Return: true if sideband filters are allowed for @flow_type, false otherwise</div><div class='add'>+ */</div><div class='add'>+bool idpf_sideband_flow_type_ena(struct idpf_vport *vport, u32 flow_type)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_create_vport *vport_msg;</div><div class='add'>+	__le64 caps;</div><div class='add'>+</div><div class='add'>+	vport_msg = vport-&gt;adapter-&gt;vport_params_recvd[vport-&gt;idx];</div><div class='add'>+	caps = vport_msg-&gt;sideband_flow_caps;</div><div class='add'>+</div><div class='add'>+	switch (flow_type) {</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+		return !!(caps &amp; cpu_to_le64(VIRTCHNL2_FLOW_IPV4_TCP));</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+		return !!(caps &amp; cpu_to_le64(VIRTCHNL2_FLOW_IPV4_UDP));</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_sideband_action_ena - Check if steering is enabled for action</div><div class='add'>+ * @vport: Private data struct</div><div class='add'>+ * @fsp: flow spec</div><div class='add'>+ *</div><div class='add'>+ * Return: true if sideband filters are allowed for @fsp, false otherwise</div><div class='add'>+ */</div><div class='add'>+bool idpf_sideband_action_ena(struct idpf_vport *vport,</div><div class='add'>+			      struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_create_vport *vport_msg;</div><div class='add'>+	unsigned int supp_actions;</div><div class='add'>+</div><div class='add'>+	vport_msg = vport-&gt;adapter-&gt;vport_params_recvd[vport-&gt;idx];</div><div class='add'>+	supp_actions = le32_to_cpu(vport_msg-&gt;sideband_flow_actions);</div><div class='add'>+</div><div class='add'>+	/* Actions Drop/Wake are not supported */</div><div class='add'>+	if (fsp-&gt;ring_cookie == RX_CLS_FLOW_DISC ||</div><div class='add'>+	    fsp-&gt;ring_cookie == RX_CLS_FLOW_WAKE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !!(supp_actions &amp; VIRTCHNL2_ACTION_QUEUE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int idpf_fsteer_max_rules(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_create_vport *vport_msg;</div><div class='add'>+</div><div class='add'>+	vport_msg = vport-&gt;adapter-&gt;vport_params_recvd[vport-&gt;idx];</div><div class='add'>+	return le32_to_cpu(vport_msg-&gt;flow_steer_max_rules);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * idpf_get_vport_id: Get vport id</div><div class='ctx'>  * @vport: virtual port structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -3504,6 +4096,16 @@ u32 idpf_get_vport_id(struct idpf_vport *vport)</div><div class='ctx'> 	return le32_to_cpu(vport_msg-&gt;vport_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void idpf_set_mac_type(struct idpf_vport *vport,</div><div class='add'>+			      struct virtchnl2_mac_addr *mac_addr)</div><div class='add'>+{</div><div class='add'>+	bool is_primary;</div><div class='add'>+</div><div class='add'>+	is_primary = ether_addr_equal(vport-&gt;default_mac_addr, mac_addr-&gt;addr);</div><div class='add'>+	mac_addr-&gt;type = is_primary ? VIRTCHNL2_MAC_ADDR_PRIMARY :</div><div class='add'>+				      VIRTCHNL2_MAC_ADDR_EXTRA;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * idpf_mac_filter_async_handler - Async callback for mac filters</div><div class='ctx'>  * @adapter: private data struct</div><div class='hunk'>@@ -3633,6 +4235,7 @@ int idpf_add_del_mac_filters(struct idpf_vport *vport,</div><div class='ctx'> 			    list) {</div><div class='ctx'> 		if (add &amp;&amp; f-&gt;add) {</div><div class='ctx'> 			ether_addr_copy(mac_addr[i].addr, f-&gt;macaddr);</div><div class='add'>+			idpf_set_mac_type(vport, &amp;mac_addr[i]);</div><div class='ctx'> 			i++;</div><div class='ctx'> 			f-&gt;add = false;</div><div class='ctx'> 			if (i == total_filters)</div><div class='hunk'>@@ -3640,6 +4243,7 @@ int idpf_add_del_mac_filters(struct idpf_vport *vport,</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!add &amp;&amp; f-&gt;remove) {</div><div class='ctx'> 			ether_addr_copy(mac_addr[i].addr, f-&gt;macaddr);</div><div class='add'>+			idpf_set_mac_type(vport, &amp;mac_addr[i]);</div><div class='ctx'> 			i++;</div><div class='ctx'> 			f-&gt;remove = false;</div><div class='ctx'> 			if (i == total_filters)</div><div class='hunk'>@@ -3725,3 +4329,42 @@ int idpf_set_promiscuous(struct idpf_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	return reply_sz &lt; 0 ? reply_sz : 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_idc_rdma_vc_send_sync - virtchnl send callback for IDC registered drivers</div><div class='add'>+ * @cdev_info: IDC core device info pointer</div><div class='add'>+ * @send_msg: message to send</div><div class='add'>+ * @msg_size: size of message to send</div><div class='add'>+ * @recv_msg: message to populate on reception of response</div><div class='add'>+ * @recv_len: length of message copied into recv_msg or 0 on error</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or error code on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_idc_rdma_vc_send_sync(struct iidc_rdma_core_dev_info *cdev_info,</div><div class='add'>+			       u8 *send_msg, u16 msg_size,</div><div class='add'>+			       u8 *recv_msg, u16 *recv_len)</div><div class='add'>+{</div><div class='add'>+	struct idpf_adapter *adapter = pci_get_drvdata(cdev_info-&gt;pdev);</div><div class='add'>+	struct idpf_vc_xn_params xn_params = { };</div><div class='add'>+	ssize_t reply_sz;</div><div class='add'>+	u16 recv_size;</div><div class='add'>+</div><div class='add'>+	if (!recv_msg || !recv_len || msg_size &gt; IDPF_CTLQ_MAX_BUF_LEN)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	recv_size = min_t(u16, *recv_len, IDPF_CTLQ_MAX_BUF_LEN);</div><div class='add'>+	*recv_len = 0;</div><div class='add'>+	xn_params.vc_op = VIRTCHNL2_OP_RDMA;</div><div class='add'>+	xn_params.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC;</div><div class='add'>+	xn_params.send_buf.iov_base = send_msg;</div><div class='add'>+	xn_params.send_buf.iov_len = msg_size;</div><div class='add'>+	xn_params.recv_buf.iov_base = recv_msg;</div><div class='add'>+	xn_params.recv_buf.iov_len = recv_size;</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(adapter, &amp;xn_params);</div><div class='add'>+	if (reply_sz &lt; 0)</div><div class='add'>+		return reply_sz;</div><div class='add'>+	*recv_len = reply_sz;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(idpf_idc_rdma_vc_send_sync);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h<br/>index 83da5d8da56b..eac3d15daa42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/idpf_virtchnl.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_virtchnl.h</a></div><div class='hunk'>@@ -4,6 +4,89 @@</div><div class='ctx'> #ifndef _IDPF_VIRTCHNL_H_</div><div class='ctx'> #define _IDPF_VIRTCHNL_H_</div><div class='ctx'> </div><div class='add'>+#include "virtchnl2.h"</div><div class='add'>+</div><div class='add'>+#define IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC	(60 * 1000)</div><div class='add'>+#define IDPF_VC_XN_IDX_M		GENMASK(7, 0)</div><div class='add'>+#define IDPF_VC_XN_SALT_M		GENMASK(15, 8)</div><div class='add'>+#define IDPF_VC_XN_RING_LEN		U8_MAX</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum idpf_vc_xn_state - Virtchnl transaction status</div><div class='add'>+ * @IDPF_VC_XN_IDLE: not expecting a reply, ready to be used</div><div class='add'>+ * @IDPF_VC_XN_WAITING: expecting a reply, not yet received</div><div class='add'>+ * @IDPF_VC_XN_COMPLETED_SUCCESS: a reply was expected and received, buffer</div><div class='add'>+ *				  updated</div><div class='add'>+ * @IDPF_VC_XN_COMPLETED_FAILED: a reply was expected and received, but there</div><div class='add'>+ *				 was an error, buffer not updated</div><div class='add'>+ * @IDPF_VC_XN_SHUTDOWN: transaction object cannot be used, VC torn down</div><div class='add'>+ * @IDPF_VC_XN_ASYNC: transaction sent asynchronously and doesn't have the</div><div class='add'>+ *		      return context; a callback may be provided to handle</div><div class='add'>+ *		      return</div><div class='add'>+ */</div><div class='add'>+enum idpf_vc_xn_state {</div><div class='add'>+	IDPF_VC_XN_IDLE = 1,</div><div class='add'>+	IDPF_VC_XN_WAITING,</div><div class='add'>+	IDPF_VC_XN_COMPLETED_SUCCESS,</div><div class='add'>+	IDPF_VC_XN_COMPLETED_FAILED,</div><div class='add'>+	IDPF_VC_XN_SHUTDOWN,</div><div class='add'>+	IDPF_VC_XN_ASYNC,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct idpf_vc_xn;</div><div class='add'>+/* Callback for asynchronous messages */</div><div class='add'>+typedef int (*async_vc_cb) (struct idpf_adapter *, struct idpf_vc_xn *,</div><div class='add'>+			    const struct idpf_ctlq_msg *);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct idpf_vc_xn - Data structure representing virtchnl transactions</div><div class='add'>+ * @completed: virtchnl event loop uses that to signal when a reply is</div><div class='add'>+ *	       available, uses kernel completion API</div><div class='add'>+ * @state: virtchnl event loop stores the data below, protected by the</div><div class='add'>+ *	   completion's lock.</div><div class='add'>+ * @reply_sz: Original size of reply, may be &gt; reply_buf.iov_len; it will be</div><div class='add'>+ *	      truncated on its way to the receiver thread according to</div><div class='add'>+ *	      reply_buf.iov_len.</div><div class='add'>+ * @reply: Reference to the buffer(s) where the reply data should be written</div><div class='add'>+ *	   to. May be 0-length (then NULL address permitted) if the reply data</div><div class='add'>+ *	   should be ignored.</div><div class='add'>+ * @async_handler: if sent asynchronously, a callback can be provided to handle</div><div class='add'>+ *		   the reply when it's received</div><div class='add'>+ * @vc_op: corresponding opcode sent with this transaction</div><div class='add'>+ * @idx: index used as retrieval on reply receive, used for cookie</div><div class='add'>+ * @salt: changed every message to make unique, used for cookie</div><div class='add'>+ */</div><div class='add'>+struct idpf_vc_xn {</div><div class='add'>+	struct completion completed;</div><div class='add'>+	enum idpf_vc_xn_state state;</div><div class='add'>+	size_t reply_sz;</div><div class='add'>+	struct kvec reply;</div><div class='add'>+	async_vc_cb async_handler;</div><div class='add'>+	u32 vc_op;</div><div class='add'>+	u8 idx;</div><div class='add'>+	u8 salt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct idpf_vc_xn_params - Parameters for executing transaction</div><div class='add'>+ * @send_buf: kvec for send buffer</div><div class='add'>+ * @recv_buf: kvec for recv buffer, may be NULL, must then have zero length</div><div class='add'>+ * @timeout_ms: timeout to wait for reply</div><div class='add'>+ * @async: send message asynchronously, will not wait on completion</div><div class='add'>+ * @async_handler: If sent asynchronously, optional callback handler. The user</div><div class='add'>+ *		   must be careful when using async handlers as the memory for</div><div class='add'>+ *		   the recv_buf _cannot_ be on stack if this is async.</div><div class='add'>+ * @vc_op: virtchnl op to send</div><div class='add'>+ */</div><div class='add'>+struct idpf_vc_xn_params {</div><div class='add'>+	struct kvec send_buf;</div><div class='add'>+	struct kvec recv_buf;</div><div class='add'>+	int timeout_ms;</div><div class='add'>+	bool async;</div><div class='add'>+	async_vc_cb async_handler;</div><div class='add'>+	u32 vc_op;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct idpf_adapter;</div><div class='ctx'> struct idpf_netdev_priv;</div><div class='ctx'> struct idpf_vec_regs;</div><div class='hunk'>@@ -11,6 +94,8 @@ struct idpf_vport;</div><div class='ctx'> struct idpf_vport_max_q;</div><div class='ctx'> struct idpf_vport_user_config_data;</div><div class='ctx'> </div><div class='add'>+ssize_t idpf_vc_xn_exec(struct idpf_adapter *adapter,</div><div class='add'>+			const struct idpf_vc_xn_params *params);</div><div class='ctx'> int idpf_init_dflt_mbx(struct idpf_adapter *adapter);</div><div class='ctx'> void idpf_deinit_dflt_mbx(struct idpf_adapter *adapter);</div><div class='ctx'> int idpf_vc_core_init(struct idpf_adapter *adapter);</div><div class='hunk'>@@ -21,10 +106,43 @@ int idpf_get_reg_intr_vecs(struct idpf_vport *vport,</div><div class='ctx'> int idpf_queue_reg_init(struct idpf_vport *vport);</div><div class='ctx'> int idpf_vport_queue_ids_init(struct idpf_vport *vport);</div><div class='ctx'> </div><div class='add'>+bool idpf_vport_is_cap_ena(struct idpf_vport *vport, u16 flag);</div><div class='add'>+bool idpf_sideband_flow_type_ena(struct idpf_vport *vport, u32 flow_type);</div><div class='add'>+bool idpf_sideband_action_ena(struct idpf_vport *vport,</div><div class='add'>+			      struct ethtool_rx_flow_spec *fsp);</div><div class='add'>+unsigned int idpf_fsteer_max_rules(struct idpf_vport *vport);</div><div class='add'>+</div><div class='ctx'> int idpf_recv_mb_msg(struct idpf_adapter *adapter);</div><div class='ctx'> int idpf_send_mb_msg(struct idpf_adapter *adapter, u32 op,</div><div class='ctx'> 		     u16 msg_size, u8 *msg, u16 cookie);</div><div class='ctx'> </div><div class='add'>+struct idpf_queue_ptr {</div><div class='add'>+	enum virtchnl2_queue_type	type;</div><div class='add'>+	union {</div><div class='add'>+		struct idpf_rx_queue		*rxq;</div><div class='add'>+		struct idpf_tx_queue		*txq;</div><div class='add'>+		struct idpf_buf_queue		*bufq;</div><div class='add'>+		struct idpf_compl_queue		*complq;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct idpf_queue_set {</div><div class='add'>+	struct idpf_vport		*vport;</div><div class='add'>+</div><div class='add'>+	u32				num;</div><div class='add'>+	struct idpf_queue_ptr		qs[] __counted_by(num);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct idpf_queue_set *idpf_alloc_queue_set(struct idpf_vport *vport, u32 num);</div><div class='add'>+</div><div class='add'>+int idpf_send_enable_queue_set_msg(const struct idpf_queue_set *qs);</div><div class='add'>+int idpf_send_disable_queue_set_msg(const struct idpf_queue_set *qs);</div><div class='add'>+int idpf_send_config_queue_set_msg(const struct idpf_queue_set *qs);</div><div class='add'>+</div><div class='add'>+int idpf_send_disable_queues_msg(struct idpf_vport *vport);</div><div class='add'>+int idpf_send_config_queues_msg(struct idpf_vport *vport);</div><div class='add'>+int idpf_send_enable_queues_msg(struct idpf_vport *vport);</div><div class='add'>+</div><div class='ctx'> void idpf_vport_init(struct idpf_vport *vport, struct idpf_vport_max_q *max_q);</div><div class='ctx'> u32 idpf_get_vport_id(struct idpf_vport *vport);</div><div class='ctx'> int idpf_send_create_vport_msg(struct idpf_adapter *adapter,</div><div class='hunk'>@@ -41,9 +159,6 @@ void idpf_vport_dealloc_max_qs(struct idpf_adapter *adapter,</div><div class='ctx'> int idpf_send_add_queues_msg(const struct idpf_vport *vport, u16 num_tx_q,</div><div class='ctx'> 			     u16 num_complq, u16 num_rx_q, u16 num_rx_bufq);</div><div class='ctx'> int idpf_send_delete_queues_msg(struct idpf_vport *vport);</div><div class='del'>-int idpf_send_enable_queues_msg(struct idpf_vport *vport);</div><div class='del'>-int idpf_send_disable_queues_msg(struct idpf_vport *vport);</div><div class='del'>-int idpf_send_config_queues_msg(struct idpf_vport *vport);</div><div class='ctx'> </div><div class='ctx'> int idpf_vport_alloc_vec_indexes(struct idpf_vport *vport);</div><div class='ctx'> int idpf_get_vec_ids(struct idpf_adapter *adapter,</div><div class='hunk'>@@ -66,5 +181,9 @@ int idpf_send_get_stats_msg(struct idpf_vport *vport);</div><div class='ctx'> int idpf_send_set_sriov_vfs_msg(struct idpf_adapter *adapter, u16 num_vfs);</div><div class='ctx'> int idpf_send_get_set_rss_key_msg(struct idpf_vport *vport, bool get);</div><div class='ctx'> int idpf_send_get_set_rss_lut_msg(struct idpf_vport *vport, bool get);</div><div class='add'>+void idpf_vc_xn_shutdown(struct idpf_vc_xn_manager *vcxn_mngr);</div><div class='add'>+int idpf_idc_rdma_vc_send_sync(struct iidc_rdma_core_dev_info *cdev_info,</div><div class='add'>+			       u8 *send_msg, u16 msg_size,</div><div class='add'>+			       u8 *recv_msg, u16 *recv_len);</div><div class='ctx'> </div><div class='ctx'> #endif /* _IDPF_VIRTCHNL_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c b/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c<br/>new file mode 100644<br/>index 000000000000..61cedb6f2854<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,673 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2024 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#include "idpf.h"</div><div class='add'>+#include "idpf_ptp.h"</div><div class='add'>+#include "idpf_virtchnl.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_caps - Send virtchnl get ptp capabilities message</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ *</div><div class='add'>+ * Send virtchnl get PTP capabilities message.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno on failure.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_get_caps(struct idpf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_ptp_get_caps *recv_ptp_caps_msg __free(kfree) = NULL;</div><div class='add'>+	struct virtchnl2_ptp_get_caps send_ptp_caps_msg = {</div><div class='add'>+		.caps = cpu_to_le32(VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME |</div><div class='add'>+				    VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME_MB |</div><div class='add'>+				    VIRTCHNL2_CAP_PTP_GET_CROSS_TIME |</div><div class='add'>+				    VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME_MB |</div><div class='add'>+				    VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB |</div><div class='add'>+				    VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB)</div><div class='add'>+	};</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {</div><div class='add'>+		.vc_op = VIRTCHNL2_OP_PTP_GET_CAPS,</div><div class='add'>+		.send_buf.iov_base = &amp;send_ptp_caps_msg,</div><div class='add'>+		.send_buf.iov_len = sizeof(send_ptp_caps_msg),</div><div class='add'>+		.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,</div><div class='add'>+	};</div><div class='add'>+	struct virtchnl2_ptp_cross_time_reg_offsets cross_tstamp_offsets;</div><div class='add'>+	struct virtchnl2_ptp_clk_adj_reg_offsets clk_adj_offsets;</div><div class='add'>+	struct virtchnl2_ptp_clk_reg_offsets clock_offsets;</div><div class='add'>+	struct idpf_ptp_secondary_mbx *scnd_mbx;</div><div class='add'>+	struct idpf_ptp *ptp = adapter-&gt;ptp;</div><div class='add'>+	enum idpf_ptp_access access_type;</div><div class='add'>+	u32 temp_offset;</div><div class='add'>+	int reply_sz;</div><div class='add'>+</div><div class='add'>+	recv_ptp_caps_msg = kzalloc(sizeof(struct virtchnl2_ptp_get_caps),</div><div class='add'>+				    GFP_KERNEL);</div><div class='add'>+	if (!recv_ptp_caps_msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	xn_params.recv_buf.iov_base = recv_ptp_caps_msg;</div><div class='add'>+	xn_params.recv_buf.iov_len = sizeof(*recv_ptp_caps_msg);</div><div class='add'>+</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(adapter, &amp;xn_params);</div><div class='add'>+	if (reply_sz &lt; 0)</div><div class='add'>+		return reply_sz;</div><div class='add'>+	else if (reply_sz != sizeof(*recv_ptp_caps_msg))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	ptp-&gt;caps = le32_to_cpu(recv_ptp_caps_msg-&gt;caps);</div><div class='add'>+	ptp-&gt;base_incval = le64_to_cpu(recv_ptp_caps_msg-&gt;base_incval);</div><div class='add'>+	ptp-&gt;max_adj = le32_to_cpu(recv_ptp_caps_msg-&gt;max_adj);</div><div class='add'>+</div><div class='add'>+	scnd_mbx = &amp;ptp-&gt;secondary_mbx;</div><div class='add'>+	scnd_mbx-&gt;peer_mbx_q_id = le16_to_cpu(recv_ptp_caps_msg-&gt;peer_mbx_q_id);</div><div class='add'>+</div><div class='add'>+	/* if the ptp_mb_q_id holds invalid value (0xffff), the secondary</div><div class='add'>+	 * mailbox is not supported.</div><div class='add'>+	 */</div><div class='add'>+	scnd_mbx-&gt;valid = scnd_mbx-&gt;peer_mbx_q_id != 0xffff;</div><div class='add'>+	if (scnd_mbx-&gt;valid)</div><div class='add'>+		scnd_mbx-&gt;peer_id = recv_ptp_caps_msg-&gt;peer_id;</div><div class='add'>+</div><div class='add'>+	/* Determine the access type for the PTP features */</div><div class='add'>+	idpf_ptp_get_features_access(adapter);</div><div class='add'>+</div><div class='add'>+	access_type = ptp-&gt;get_dev_clk_time_access;</div><div class='add'>+	if (access_type != IDPF_PTP_DIRECT)</div><div class='add'>+		goto cross_tstamp;</div><div class='add'>+</div><div class='add'>+	clock_offsets = recv_ptp_caps_msg-&gt;clk_offsets;</div><div class='add'>+</div><div class='add'>+	temp_offset = le32_to_cpu(clock_offsets.dev_clk_ns_l);</div><div class='add'>+	ptp-&gt;dev_clk_regs.dev_clk_ns_l = idpf_get_reg_addr(adapter,</div><div class='add'>+							   temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clock_offsets.dev_clk_ns_h);</div><div class='add'>+	ptp-&gt;dev_clk_regs.dev_clk_ns_h = idpf_get_reg_addr(adapter,</div><div class='add'>+							   temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clock_offsets.phy_clk_ns_l);</div><div class='add'>+	ptp-&gt;dev_clk_regs.phy_clk_ns_l = idpf_get_reg_addr(adapter,</div><div class='add'>+							   temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clock_offsets.phy_clk_ns_h);</div><div class='add'>+	ptp-&gt;dev_clk_regs.phy_clk_ns_h = idpf_get_reg_addr(adapter,</div><div class='add'>+							   temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clock_offsets.cmd_sync_trigger);</div><div class='add'>+	ptp-&gt;dev_clk_regs.cmd_sync = idpf_get_reg_addr(adapter, temp_offset);</div><div class='add'>+</div><div class='add'>+cross_tstamp:</div><div class='add'>+	access_type = ptp-&gt;get_cross_tstamp_access;</div><div class='add'>+	if (access_type != IDPF_PTP_DIRECT)</div><div class='add'>+		goto discipline_clock;</div><div class='add'>+</div><div class='add'>+	cross_tstamp_offsets = recv_ptp_caps_msg-&gt;cross_time_offsets;</div><div class='add'>+</div><div class='add'>+	temp_offset = le32_to_cpu(cross_tstamp_offsets.sys_time_ns_l);</div><div class='add'>+	ptp-&gt;dev_clk_regs.sys_time_ns_l = idpf_get_reg_addr(adapter,</div><div class='add'>+							    temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(cross_tstamp_offsets.sys_time_ns_h);</div><div class='add'>+	ptp-&gt;dev_clk_regs.sys_time_ns_h = idpf_get_reg_addr(adapter,</div><div class='add'>+							    temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(cross_tstamp_offsets.cmd_sync_trigger);</div><div class='add'>+	ptp-&gt;dev_clk_regs.cmd_sync = idpf_get_reg_addr(adapter, temp_offset);</div><div class='add'>+</div><div class='add'>+discipline_clock:</div><div class='add'>+	access_type = ptp-&gt;adj_dev_clk_time_access;</div><div class='add'>+	if (access_type != IDPF_PTP_DIRECT)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	clk_adj_offsets = recv_ptp_caps_msg-&gt;clk_adj_offsets;</div><div class='add'>+</div><div class='add'>+	/* Device clock offsets */</div><div class='add'>+	temp_offset = le32_to_cpu(clk_adj_offsets.dev_clk_cmd_type);</div><div class='add'>+	ptp-&gt;dev_clk_regs.cmd = idpf_get_reg_addr(adapter, temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clk_adj_offsets.dev_clk_incval_l);</div><div class='add'>+	ptp-&gt;dev_clk_regs.incval_l = idpf_get_reg_addr(adapter, temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clk_adj_offsets.dev_clk_incval_h);</div><div class='add'>+	ptp-&gt;dev_clk_regs.incval_h = idpf_get_reg_addr(adapter, temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clk_adj_offsets.dev_clk_shadj_l);</div><div class='add'>+	ptp-&gt;dev_clk_regs.shadj_l = idpf_get_reg_addr(adapter, temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clk_adj_offsets.dev_clk_shadj_h);</div><div class='add'>+	ptp-&gt;dev_clk_regs.shadj_h = idpf_get_reg_addr(adapter, temp_offset);</div><div class='add'>+</div><div class='add'>+	/* PHY clock offsets */</div><div class='add'>+	temp_offset = le32_to_cpu(clk_adj_offsets.phy_clk_cmd_type);</div><div class='add'>+	ptp-&gt;dev_clk_regs.phy_cmd = idpf_get_reg_addr(adapter, temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clk_adj_offsets.phy_clk_incval_l);</div><div class='add'>+	ptp-&gt;dev_clk_regs.phy_incval_l = idpf_get_reg_addr(adapter,</div><div class='add'>+							   temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clk_adj_offsets.phy_clk_incval_h);</div><div class='add'>+	ptp-&gt;dev_clk_regs.phy_incval_h = idpf_get_reg_addr(adapter,</div><div class='add'>+							   temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clk_adj_offsets.phy_clk_shadj_l);</div><div class='add'>+	ptp-&gt;dev_clk_regs.phy_shadj_l = idpf_get_reg_addr(adapter, temp_offset);</div><div class='add'>+	temp_offset = le32_to_cpu(clk_adj_offsets.phy_clk_shadj_h);</div><div class='add'>+	ptp-&gt;dev_clk_regs.phy_shadj_h = idpf_get_reg_addr(adapter, temp_offset);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_dev_clk_time - Send virtchnl get device clk time message</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @dev_clk_time: Pointer to the device clock structure where the value is set</div><div class='add'>+ *</div><div class='add'>+ * Send virtchnl get time message to get the time of the clock.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_get_dev_clk_time(struct idpf_adapter *adapter,</div><div class='add'>+			      struct idpf_ptp_dev_timers *dev_clk_time)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_ptp_get_dev_clk_time get_dev_clk_time_msg;</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {</div><div class='add'>+		.vc_op = VIRTCHNL2_OP_PTP_GET_DEV_CLK_TIME,</div><div class='add'>+		.send_buf.iov_base = &amp;get_dev_clk_time_msg,</div><div class='add'>+		.send_buf.iov_len = sizeof(get_dev_clk_time_msg),</div><div class='add'>+		.recv_buf.iov_base = &amp;get_dev_clk_time_msg,</div><div class='add'>+		.recv_buf.iov_len = sizeof(get_dev_clk_time_msg),</div><div class='add'>+		.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,</div><div class='add'>+	};</div><div class='add'>+	int reply_sz;</div><div class='add'>+	u64 dev_time;</div><div class='add'>+</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(adapter, &amp;xn_params);</div><div class='add'>+	if (reply_sz &lt; 0)</div><div class='add'>+		return reply_sz;</div><div class='add'>+	if (reply_sz != sizeof(get_dev_clk_time_msg))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	dev_time = le64_to_cpu(get_dev_clk_time_msg.dev_time_ns);</div><div class='add'>+	dev_clk_time-&gt;dev_clk_time_ns = dev_time;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_cross_time - Send virtchnl get cross time message</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @cross_time: Pointer to the device clock structure where the value is set</div><div class='add'>+ *</div><div class='add'>+ * Send virtchnl get cross time message to get the time of the clock and the</div><div class='add'>+ * system time.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_get_cross_time(struct idpf_adapter *adapter,</div><div class='add'>+			    struct idpf_ptp_dev_timers *cross_time)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_ptp_get_cross_time cross_time_msg;</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {</div><div class='add'>+		.vc_op = VIRTCHNL2_OP_PTP_GET_CROSS_TIME,</div><div class='add'>+		.send_buf.iov_base = &amp;cross_time_msg,</div><div class='add'>+		.send_buf.iov_len = sizeof(cross_time_msg),</div><div class='add'>+		.recv_buf.iov_base = &amp;cross_time_msg,</div><div class='add'>+		.recv_buf.iov_len = sizeof(cross_time_msg),</div><div class='add'>+		.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,</div><div class='add'>+	};</div><div class='add'>+	int reply_sz;</div><div class='add'>+</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(adapter, &amp;xn_params);</div><div class='add'>+	if (reply_sz &lt; 0)</div><div class='add'>+		return reply_sz;</div><div class='add'>+	if (reply_sz != sizeof(cross_time_msg))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	cross_time-&gt;dev_clk_time_ns = le64_to_cpu(cross_time_msg.dev_time_ns);</div><div class='add'>+	cross_time-&gt;sys_time_ns = le64_to_cpu(cross_time_msg.sys_time_ns);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_set_dev_clk_time - Send virtchnl set device time message</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @time: New time value</div><div class='add'>+ *</div><div class='add'>+ * Send virtchnl set time message to set the time of the clock.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_set_dev_clk_time(struct idpf_adapter *adapter, u64 time)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_ptp_set_dev_clk_time set_dev_clk_time_msg = {</div><div class='add'>+		.dev_time_ns = cpu_to_le64(time),</div><div class='add'>+	};</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {</div><div class='add'>+		.vc_op = VIRTCHNL2_OP_PTP_SET_DEV_CLK_TIME,</div><div class='add'>+		.send_buf.iov_base = &amp;set_dev_clk_time_msg,</div><div class='add'>+		.send_buf.iov_len = sizeof(set_dev_clk_time_msg),</div><div class='add'>+		.recv_buf.iov_base = &amp;set_dev_clk_time_msg,</div><div class='add'>+		.recv_buf.iov_len = sizeof(set_dev_clk_time_msg),</div><div class='add'>+		.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,</div><div class='add'>+	};</div><div class='add'>+	int reply_sz;</div><div class='add'>+</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(adapter, &amp;xn_params);</div><div class='add'>+	if (reply_sz &lt; 0)</div><div class='add'>+		return reply_sz;</div><div class='add'>+	if (reply_sz != sizeof(set_dev_clk_time_msg))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_adj_dev_clk_time - Send virtchnl adj device clock time message</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @delta: Offset in nanoseconds to adjust the time by</div><div class='add'>+ *</div><div class='add'>+ * Send virtchnl adj time message to adjust the clock by the indicated delta.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_adj_dev_clk_time(struct idpf_adapter *adapter, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_ptp_adj_dev_clk_time adj_dev_clk_time_msg = {</div><div class='add'>+		.delta = cpu_to_le64(delta),</div><div class='add'>+	};</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {</div><div class='add'>+		.vc_op = VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_TIME,</div><div class='add'>+		.send_buf.iov_base = &amp;adj_dev_clk_time_msg,</div><div class='add'>+		.send_buf.iov_len = sizeof(adj_dev_clk_time_msg),</div><div class='add'>+		.recv_buf.iov_base = &amp;adj_dev_clk_time_msg,</div><div class='add'>+		.recv_buf.iov_len = sizeof(adj_dev_clk_time_msg),</div><div class='add'>+		.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,</div><div class='add'>+	};</div><div class='add'>+	int reply_sz;</div><div class='add'>+</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(adapter, &amp;xn_params);</div><div class='add'>+	if (reply_sz &lt; 0)</div><div class='add'>+		return reply_sz;</div><div class='add'>+	if (reply_sz != sizeof(adj_dev_clk_time_msg))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_adj_dev_clk_fine - Send virtchnl adj time message</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @incval: Source timer increment value per clock cycle</div><div class='add'>+ *</div><div class='add'>+ * Send virtchnl adj fine message to adjust the frequency of the clock by</div><div class='add'>+ * incval.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_adj_dev_clk_fine(struct idpf_adapter *adapter, u64 incval)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_ptp_adj_dev_clk_fine adj_dev_clk_fine_msg = {</div><div class='add'>+		.incval = cpu_to_le64(incval),</div><div class='add'>+	};</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {</div><div class='add'>+		.vc_op = VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_FINE,</div><div class='add'>+		.send_buf.iov_base = &amp;adj_dev_clk_fine_msg,</div><div class='add'>+		.send_buf.iov_len = sizeof(adj_dev_clk_fine_msg),</div><div class='add'>+		.recv_buf.iov_base = &amp;adj_dev_clk_fine_msg,</div><div class='add'>+		.recv_buf.iov_len = sizeof(adj_dev_clk_fine_msg),</div><div class='add'>+		.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,</div><div class='add'>+	};</div><div class='add'>+	int reply_sz;</div><div class='add'>+</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(adapter, &amp;xn_params);</div><div class='add'>+	if (reply_sz &lt; 0)</div><div class='add'>+		return reply_sz;</div><div class='add'>+	if (reply_sz != sizeof(adj_dev_clk_fine_msg))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_vport_tstamps_caps - Send virtchnl to get tstamps caps for vport</div><div class='add'>+ * @vport: Virtual port structure</div><div class='add'>+ *</div><div class='add'>+ * Send virtchnl get vport tstamps caps message to receive the set of tstamp</div><div class='add'>+ * capabilities per vport.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_get_vport_tstamps_caps(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_ptp_get_vport_tx_tstamp_caps send_tx_tstamp_caps;</div><div class='add'>+	struct virtchnl2_ptp_get_vport_tx_tstamp_caps *rcv_tx_tstamp_caps;</div><div class='add'>+	struct virtchnl2_ptp_tx_tstamp_latch_caps tx_tstamp_latch_caps;</div><div class='add'>+	struct idpf_ptp_vport_tx_tstamp_caps *tstamp_caps;</div><div class='add'>+	struct idpf_ptp_tx_tstamp *ptp_tx_tstamp, *tmp;</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {</div><div class='add'>+		.vc_op = VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP_CAPS,</div><div class='add'>+		.send_buf.iov_base = &amp;send_tx_tstamp_caps,</div><div class='add'>+		.send_buf.iov_len = sizeof(send_tx_tstamp_caps),</div><div class='add'>+		.recv_buf.iov_len = IDPF_CTLQ_MAX_BUF_LEN,</div><div class='add'>+		.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,</div><div class='add'>+	};</div><div class='add'>+	enum idpf_ptp_access tstamp_access, get_dev_clk_access;</div><div class='add'>+	struct idpf_ptp *ptp = vport-&gt;adapter-&gt;ptp;</div><div class='add'>+	struct list_head *head;</div><div class='add'>+	int err = 0, reply_sz;</div><div class='add'>+	u16 num_latches;</div><div class='add'>+	u32 size;</div><div class='add'>+</div><div class='add'>+	if (!ptp)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	tstamp_access = ptp-&gt;tx_tstamp_access;</div><div class='add'>+	get_dev_clk_access = ptp-&gt;get_dev_clk_time_access;</div><div class='add'>+	if (tstamp_access == IDPF_PTP_NONE ||</div><div class='add'>+	    get_dev_clk_access == IDPF_PTP_NONE)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	rcv_tx_tstamp_caps = kzalloc(IDPF_CTLQ_MAX_BUF_LEN, GFP_KERNEL);</div><div class='add'>+	if (!rcv_tx_tstamp_caps)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	send_tx_tstamp_caps.vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='add'>+	xn_params.recv_buf.iov_base = rcv_tx_tstamp_caps;</div><div class='add'>+</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(vport-&gt;adapter, &amp;xn_params);</div><div class='add'>+	if (reply_sz &lt; 0) {</div><div class='add'>+		err = reply_sz;</div><div class='add'>+		goto get_tstamp_caps_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_latches = le16_to_cpu(rcv_tx_tstamp_caps-&gt;num_latches);</div><div class='add'>+	size = struct_size(rcv_tx_tstamp_caps, tstamp_latches, num_latches);</div><div class='add'>+	if (reply_sz != size) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto get_tstamp_caps_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = struct_size(tstamp_caps, tx_tstamp_status, num_latches);</div><div class='add'>+	tstamp_caps = kzalloc(size, GFP_KERNEL);</div><div class='add'>+	if (!tstamp_caps) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto get_tstamp_caps_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tstamp_caps-&gt;access = true;</div><div class='add'>+	tstamp_caps-&gt;num_entries = num_latches;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;tstamp_caps-&gt;latches_in_use);</div><div class='add'>+	INIT_LIST_HEAD(&amp;tstamp_caps-&gt;latches_free);</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;tstamp_caps-&gt;latches_lock);</div><div class='add'>+	spin_lock_init(&amp;tstamp_caps-&gt;status_lock);</div><div class='add'>+</div><div class='add'>+	tstamp_caps-&gt;tstamp_ns_lo_bit = rcv_tx_tstamp_caps-&gt;tstamp_ns_lo_bit;</div><div class='add'>+</div><div class='add'>+	for (u16 i = 0; i &lt; tstamp_caps-&gt;num_entries; i++) {</div><div class='add'>+		__le32 offset_l, offset_h;</div><div class='add'>+</div><div class='add'>+		ptp_tx_tstamp = kzalloc(sizeof(*ptp_tx_tstamp), GFP_KERNEL);</div><div class='add'>+		if (!ptp_tx_tstamp) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto err_free_ptp_tx_stamp_list;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tx_tstamp_latch_caps = rcv_tx_tstamp_caps-&gt;tstamp_latches[i];</div><div class='add'>+</div><div class='add'>+		if (tstamp_access != IDPF_PTP_DIRECT)</div><div class='add'>+			goto skip_offsets;</div><div class='add'>+</div><div class='add'>+		offset_l = tx_tstamp_latch_caps.tx_latch_reg_offset_l;</div><div class='add'>+		offset_h = tx_tstamp_latch_caps.tx_latch_reg_offset_h;</div><div class='add'>+		ptp_tx_tstamp-&gt;tx_latch_reg_offset_l = le32_to_cpu(offset_l);</div><div class='add'>+		ptp_tx_tstamp-&gt;tx_latch_reg_offset_h = le32_to_cpu(offset_h);</div><div class='add'>+</div><div class='add'>+skip_offsets:</div><div class='add'>+		ptp_tx_tstamp-&gt;idx = tx_tstamp_latch_caps.index;</div><div class='add'>+</div><div class='add'>+		list_add(&amp;ptp_tx_tstamp-&gt;list_member,</div><div class='add'>+			 &amp;tstamp_caps-&gt;latches_free);</div><div class='add'>+</div><div class='add'>+		tstamp_caps-&gt;tx_tstamp_status[i].state = IDPF_PTP_FREE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vport-&gt;tx_tstamp_caps = tstamp_caps;</div><div class='add'>+	kfree(rcv_tx_tstamp_caps);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_ptp_tx_stamp_list:</div><div class='add'>+	head = &amp;tstamp_caps-&gt;latches_free;</div><div class='add'>+	list_for_each_entry_safe(ptp_tx_tstamp, tmp, head, list_member) {</div><div class='add'>+		list_del(&amp;ptp_tx_tstamp-&gt;list_member);</div><div class='add'>+		kfree(ptp_tx_tstamp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(tstamp_caps);</div><div class='add'>+get_tstamp_caps_out:</div><div class='add'>+	kfree(rcv_tx_tstamp_caps);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_update_tstamp_tracker - Update the Tx timestamp tracker based on</div><div class='add'>+ *				    the skb compatibility.</div><div class='add'>+ * @caps: Tx timestamp capabilities that monitor the latch status</div><div class='add'>+ * @skb: skb for which the tstamp value is returned through virtchnl message</div><div class='add'>+ * @current_state: Current state of the Tx timestamp latch</div><div class='add'>+ * @expected_state: Expected state of the Tx timestamp latch</div><div class='add'>+ *</div><div class='add'>+ * Find a proper skb tracker for which the Tx timestamp is received and change</div><div class='add'>+ * the state to expected value.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the tracker has been found and updated, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool</div><div class='add'>+idpf_ptp_update_tstamp_tracker(struct idpf_ptp_vport_tx_tstamp_caps *caps,</div><div class='add'>+			       struct sk_buff *skb,</div><div class='add'>+			       enum idpf_ptp_tx_tstamp_state current_state,</div><div class='add'>+			       enum idpf_ptp_tx_tstamp_state expected_state)</div><div class='add'>+{</div><div class='add'>+	bool updated = false;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;caps-&gt;status_lock);</div><div class='add'>+	for (u16 i = 0; i &lt; caps-&gt;num_entries; i++) {</div><div class='add'>+		struct idpf_ptp_tx_tstamp_status *status;</div><div class='add'>+</div><div class='add'>+		status = &amp;caps-&gt;tx_tstamp_status[i];</div><div class='add'>+</div><div class='add'>+		if (skb == status-&gt;skb &amp;&amp; status-&gt;state == current_state) {</div><div class='add'>+			status-&gt;state = expected_state;</div><div class='add'>+			updated = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;caps-&gt;status_lock);</div><div class='add'>+</div><div class='add'>+	return updated;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_tstamp_value - Get the Tx timestamp value and provide it</div><div class='add'>+ *			       back to the skb.</div><div class='add'>+ * @vport: Virtual port structure</div><div class='add'>+ * @tstamp_latch: Tx timestamp latch structure fulfilled by the Control Plane</div><div class='add'>+ * @ptp_tx_tstamp: Tx timestamp latch to add to the free list</div><div class='add'>+ *</div><div class='add'>+ * Read the value of the Tx timestamp for a given latch received from the</div><div class='add'>+ * Control Plane, extend it to 64 bit and provide back to the skb.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+idpf_ptp_get_tstamp_value(struct idpf_vport *vport,</div><div class='add'>+			  struct virtchnl2_ptp_tx_tstamp_latch *tstamp_latch,</div><div class='add'>+			  struct idpf_ptp_tx_tstamp *ptp_tx_tstamp)</div><div class='add'>+{</div><div class='add'>+	struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;</div><div class='add'>+	struct skb_shared_hwtstamps shhwtstamps;</div><div class='add'>+	bool state_upd = false;</div><div class='add'>+	u8 tstamp_ns_lo_bit;</div><div class='add'>+	u64 tstamp;</div><div class='add'>+</div><div class='add'>+	tx_tstamp_caps = vport-&gt;tx_tstamp_caps;</div><div class='add'>+	tstamp_ns_lo_bit = tx_tstamp_caps-&gt;tstamp_ns_lo_bit;</div><div class='add'>+</div><div class='add'>+	ptp_tx_tstamp-&gt;tstamp = le64_to_cpu(tstamp_latch-&gt;tstamp);</div><div class='add'>+	ptp_tx_tstamp-&gt;tstamp &gt;&gt;= tstamp_ns_lo_bit;</div><div class='add'>+</div><div class='add'>+	state_upd = idpf_ptp_update_tstamp_tracker(tx_tstamp_caps,</div><div class='add'>+						   ptp_tx_tstamp-&gt;skb,</div><div class='add'>+						   IDPF_PTP_READ_VALUE,</div><div class='add'>+						   IDPF_PTP_FREE);</div><div class='add'>+	if (!state_upd)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tstamp = idpf_ptp_extend_ts(vport, ptp_tx_tstamp-&gt;tstamp);</div><div class='add'>+	shhwtstamps.hwtstamp = ns_to_ktime(tstamp);</div><div class='add'>+	skb_tstamp_tx(ptp_tx_tstamp-&gt;skb, &amp;shhwtstamps);</div><div class='add'>+	consume_skb(ptp_tx_tstamp-&gt;skb);</div><div class='add'>+	ptp_tx_tstamp-&gt;skb = NULL;</div><div class='add'>+</div><div class='add'>+	list_add(&amp;ptp_tx_tstamp-&gt;list_member,</div><div class='add'>+		 &amp;tx_tstamp_caps-&gt;latches_free);</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;vport-&gt;tstamp_stats.stats_sync);</div><div class='add'>+	u64_stats_inc(&amp;vport-&gt;tstamp_stats.packets);</div><div class='add'>+	u64_stats_update_end(&amp;vport-&gt;tstamp_stats.stats_sync);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_tx_tstamp_async_handler - Async callback for getting Tx tstamps</div><div class='add'>+ * @adapter: Driver specific private structure</div><div class='add'>+ * @xn: transaction for message</div><div class='add'>+ * @ctlq_msg: received message</div><div class='add'>+ *</div><div class='add'>+ * Read the tstamps Tx tstamp values from a received message and put them</div><div class='add'>+ * directly to the skb. The number of timestamps to read is specified by</div><div class='add'>+ * the virtchnl message.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+idpf_ptp_get_tx_tstamp_async_handler(struct idpf_adapter *adapter,</div><div class='add'>+				     struct idpf_vc_xn *xn,</div><div class='add'>+				     const struct idpf_ctlq_msg *ctlq_msg)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_ptp_get_vport_tx_tstamp_latches *recv_tx_tstamp_msg;</div><div class='add'>+	struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;</div><div class='add'>+	struct virtchnl2_ptp_tx_tstamp_latch tstamp_latch;</div><div class='add'>+	struct idpf_ptp_tx_tstamp *tx_tstamp, *tmp;</div><div class='add'>+	struct idpf_vport *tstamp_vport = NULL;</div><div class='add'>+	struct list_head *head;</div><div class='add'>+	u16 num_latches;</div><div class='add'>+	u32 vport_id;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	recv_tx_tstamp_msg = ctlq_msg-&gt;ctx.indirect.payload-&gt;va;</div><div class='add'>+	vport_id = le32_to_cpu(recv_tx_tstamp_msg-&gt;vport_id);</div><div class='add'>+</div><div class='add'>+	idpf_for_each_vport(adapter, vport) {</div><div class='add'>+		if (!vport)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (vport-&gt;vport_id == vport_id) {</div><div class='add'>+			tstamp_vport = vport;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!tstamp_vport || !tstamp_vport-&gt;tx_tstamp_caps)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tx_tstamp_caps = tstamp_vport-&gt;tx_tstamp_caps;</div><div class='add'>+	num_latches = le16_to_cpu(recv_tx_tstamp_msg-&gt;num_latches);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;tx_tstamp_caps-&gt;latches_lock);</div><div class='add'>+	head = &amp;tx_tstamp_caps-&gt;latches_in_use;</div><div class='add'>+</div><div class='add'>+	for (u16 i = 0; i &lt; num_latches; i++) {</div><div class='add'>+		tstamp_latch = recv_tx_tstamp_msg-&gt;tstamp_latches[i];</div><div class='add'>+</div><div class='add'>+		if (!tstamp_latch.valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (list_empty(head)) {</div><div class='add'>+			err = -ENOBUFS;</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		list_for_each_entry_safe(tx_tstamp, tmp, head, list_member) {</div><div class='add'>+			if (tstamp_latch.index == tx_tstamp-&gt;idx) {</div><div class='add'>+				list_del(&amp;tx_tstamp-&gt;list_member);</div><div class='add'>+				err = idpf_ptp_get_tstamp_value(tstamp_vport,</div><div class='add'>+								&amp;tstamp_latch,</div><div class='add'>+								tx_tstamp);</div><div class='add'>+				if (err)</div><div class='add'>+					goto unlock;</div><div class='add'>+</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_bh(&amp;tx_tstamp_caps-&gt;latches_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_ptp_get_tx_tstamp - Send virtchnl get Tx timestamp latches message</div><div class='add'>+ * @vport: Virtual port structure</div><div class='add'>+ *</div><div class='add'>+ * Send virtchnl get Tx tstamp message to read the value of the HW timestamp.</div><div class='add'>+ * The message contains a list of indexes set in the Tx descriptors.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int idpf_ptp_get_tx_tstamp(struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_ptp_get_vport_tx_tstamp_latches *send_tx_tstamp_msg;</div><div class='add'>+	struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;</div><div class='add'>+	struct idpf_vc_xn_params xn_params = {</div><div class='add'>+		.vc_op = VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP,</div><div class='add'>+		.timeout_ms = IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC,</div><div class='add'>+		.async = true,</div><div class='add'>+		.async_handler = idpf_ptp_get_tx_tstamp_async_handler,</div><div class='add'>+	};</div><div class='add'>+	struct idpf_ptp_tx_tstamp *ptp_tx_tstamp;</div><div class='add'>+	int reply_sz, size, msg_size;</div><div class='add'>+	struct list_head *head;</div><div class='add'>+	bool state_upd;</div><div class='add'>+	u16 id = 0;</div><div class='add'>+</div><div class='add'>+	tx_tstamp_caps = vport-&gt;tx_tstamp_caps;</div><div class='add'>+	head = &amp;tx_tstamp_caps-&gt;latches_in_use;</div><div class='add'>+</div><div class='add'>+	size = struct_size(send_tx_tstamp_msg, tstamp_latches,</div><div class='add'>+			   tx_tstamp_caps-&gt;num_entries);</div><div class='add'>+	send_tx_tstamp_msg = kzalloc(size, GFP_KERNEL);</div><div class='add'>+	if (!send_tx_tstamp_msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;tx_tstamp_caps-&gt;latches_lock);</div><div class='add'>+	list_for_each_entry(ptp_tx_tstamp, head, list_member) {</div><div class='add'>+		u8 idx;</div><div class='add'>+</div><div class='add'>+		state_upd = idpf_ptp_update_tstamp_tracker(tx_tstamp_caps,</div><div class='add'>+							   ptp_tx_tstamp-&gt;skb,</div><div class='add'>+							   IDPF_PTP_REQUEST,</div><div class='add'>+							   IDPF_PTP_READ_VALUE);</div><div class='add'>+		if (!state_upd)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		idx = ptp_tx_tstamp-&gt;idx;</div><div class='add'>+		send_tx_tstamp_msg-&gt;tstamp_latches[id].index = idx;</div><div class='add'>+		id++;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;tx_tstamp_caps-&gt;latches_lock);</div><div class='add'>+</div><div class='add'>+	msg_size = struct_size(send_tx_tstamp_msg, tstamp_latches, id);</div><div class='add'>+	send_tx_tstamp_msg-&gt;vport_id = cpu_to_le32(vport-&gt;vport_id);</div><div class='add'>+	send_tx_tstamp_msg-&gt;num_latches = cpu_to_le16(id);</div><div class='add'>+	xn_params.send_buf.iov_base = send_tx_tstamp_msg;</div><div class='add'>+	xn_params.send_buf.iov_len = msg_size;</div><div class='add'>+</div><div class='add'>+	reply_sz = idpf_vc_xn_exec(vport-&gt;adapter, &amp;xn_params);</div><div class='add'>+	kfree(send_tx_tstamp_msg);</div><div class='add'>+</div><div class='add'>+	return min(reply_sz, 0);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/virtchnl2.h b/drivers/net/ethernet/intel/idpf/virtchnl2.h<br/>index 63deb120359c..02ae447cc24a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/virtchnl2.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/idpf/virtchnl2.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/virtchnl2.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/virtchnl2.h</a></div><div class='hunk'>@@ -62,12 +62,28 @@ enum virtchnl2_op {</div><div class='ctx'> 	VIRTCHNL2_OP_GET_PTYPE_INFO		= 526,</div><div class='ctx'> 	/* Opcode 527 and 528 are reserved for VIRTCHNL2_OP_GET_PTYPE_ID and</div><div class='ctx'> 	 * VIRTCHNL2_OP_GET_PTYPE_INFO_RAW.</div><div class='del'>-	 * Opcodes 529, 530, 531, 532 and 533 are reserved.</div><div class='ctx'> 	 */</div><div class='add'>+	VIRTCHNL2_OP_RDMA			= 529,</div><div class='add'>+	/* Opcodes 530 through 533 are reserved. */</div><div class='ctx'> 	VIRTCHNL2_OP_LOOPBACK			= 534,</div><div class='ctx'> 	VIRTCHNL2_OP_ADD_MAC_ADDR		= 535,</div><div class='ctx'> 	VIRTCHNL2_OP_DEL_MAC_ADDR		= 536,</div><div class='ctx'> 	VIRTCHNL2_OP_CONFIG_PROMISCUOUS_MODE	= 537,</div><div class='add'>+</div><div class='add'>+	/* TimeSync opcodes */</div><div class='add'>+	VIRTCHNL2_OP_PTP_GET_CAPS			= 541,</div><div class='add'>+	VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP		= 542,</div><div class='add'>+	VIRTCHNL2_OP_PTP_GET_DEV_CLK_TIME		= 543,</div><div class='add'>+	VIRTCHNL2_OP_PTP_GET_CROSS_TIME			= 544,</div><div class='add'>+	VIRTCHNL2_OP_PTP_SET_DEV_CLK_TIME		= 545,</div><div class='add'>+	VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_FINE		= 546,</div><div class='add'>+	VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_TIME		= 547,</div><div class='add'>+	VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP_CAPS	= 548,</div><div class='add'>+	VIRTCHNL2_OP_GET_LAN_MEMORY_REGIONS		= 549,</div><div class='add'>+	/* Opcode 550 is reserved */</div><div class='add'>+	VIRTCHNL2_OP_ADD_FLOW_RULE			= 551,</div><div class='add'>+	VIRTCHNL2_OP_GET_FLOW_RULE			= 552,</div><div class='add'>+	VIRTCHNL2_OP_DEL_FLOW_RULE			= 553,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -141,22 +157,22 @@ enum virtchnl2_cap_seg {</div><div class='ctx'> 	VIRTCHNL2_CAP_SEG_TX_DOUBLE_TUNNEL	= BIT(8),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Receive Side Scaling Flow type capability flags */</div><div class='del'>-enum virtchnl2_cap_rss {</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_TCP		= BIT(0),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_UDP		= BIT(1),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_SCTP		= BIT(2),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_OTHER		= BIT(3),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_TCP		= BIT(4),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_UDP		= BIT(5),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_SCTP		= BIT(6),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_OTHER		= BIT(7),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_AH		= BIT(8),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_ESP		= BIT(9),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV4_AH_ESP		= BIT(10),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_AH		= BIT(11),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_ESP		= BIT(12),</div><div class='del'>-	VIRTCHNL2_CAP_RSS_IPV6_AH_ESP		= BIT(13),</div><div class='add'>+/* Receive Side Scaling and Flow Steering Flow type capability flags */</div><div class='add'>+enum virtchnl2_flow_types {</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_TCP		= BIT(0),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_UDP		= BIT(1),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_SCTP	= BIT(2),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_OTHER	= BIT(3),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_TCP		= BIT(4),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_UDP		= BIT(5),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_SCTP	= BIT(6),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_OTHER	= BIT(7),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_AH		= BIT(8),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_ESP		= BIT(9),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV4_AH_ESP	= BIT(10),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_AH		= BIT(11),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_ESP		= BIT(12),</div><div class='add'>+	VIRTCHNL2_FLOW_IPV6_AH_ESP	= BIT(13),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Header split capability flags */</div><div class='hunk'>@@ -182,8 +198,9 @@ enum virtchnl2_cap_other {</div><div class='ctx'> 	VIRTCHNL2_CAP_RDMA			= BIT_ULL(0),</div><div class='ctx'> 	VIRTCHNL2_CAP_SRIOV			= BIT_ULL(1),</div><div class='ctx'> 	VIRTCHNL2_CAP_MACFILTER			= BIT_ULL(2),</div><div class='del'>-	VIRTCHNL2_CAP_FLOW_DIRECTOR		= BIT_ULL(3),</div><div class='del'>-	/* Queue based scheduling using split queue model */</div><div class='add'>+	/* Other capability 3 is available</div><div class='add'>+	 * Queue based scheduling using split queue model</div><div class='add'>+	 */</div><div class='ctx'> 	VIRTCHNL2_CAP_SPLITQ_QSCHED		= BIT_ULL(4),</div><div class='ctx'> 	VIRTCHNL2_CAP_CRC			= BIT_ULL(5),</div><div class='ctx'> 	VIRTCHNL2_CAP_ADQ			= BIT_ULL(6),</div><div class='hunk'>@@ -197,16 +214,37 @@ enum virtchnl2_cap_other {</div><div class='ctx'> 	/* EDT: Earliest Departure Time capability used for Timing Wheel */</div><div class='ctx'> 	VIRTCHNL2_CAP_EDT			= BIT_ULL(14),</div><div class='ctx'> 	VIRTCHNL2_CAP_ADV_RSS			= BIT_ULL(15),</div><div class='del'>-	VIRTCHNL2_CAP_FDIR			= BIT_ULL(16),</div><div class='add'>+	/* Other capability 16 is available */</div><div class='ctx'> 	VIRTCHNL2_CAP_RX_FLEX_DESC		= BIT_ULL(17),</div><div class='ctx'> 	VIRTCHNL2_CAP_PTYPE			= BIT_ULL(18),</div><div class='ctx'> 	VIRTCHNL2_CAP_LOOPBACK			= BIT_ULL(19),</div><div class='ctx'> 	/* Other capability 20 is reserved */</div><div class='add'>+	VIRTCHNL2_CAP_FLOW_STEER		= BIT_ULL(21),</div><div class='add'>+	VIRTCHNL2_CAP_LAN_MEMORY_REGIONS	= BIT_ULL(22),</div><div class='ctx'> </div><div class='ctx'> 	/* this must be the last capability */</div><div class='ctx'> 	VIRTCHNL2_CAP_OEM			= BIT_ULL(63),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * enum virtchnl2_action_types - Available actions for sideband flow steering</div><div class='add'>+ * @VIRTCHNL2_ACTION_DROP: Drop the packet</div><div class='add'>+ * @VIRTCHNL2_ACTION_PASSTHRU: Forward the packet to the next classifier/stage</div><div class='add'>+ * @VIRTCHNL2_ACTION_QUEUE: Forward the packet to a receive queue</div><div class='add'>+ * @VIRTCHNL2_ACTION_Q_GROUP: Forward the packet to a receive queue group</div><div class='add'>+ * @VIRTCHNL2_ACTION_MARK: Mark the packet with specific marker value</div><div class='add'>+ * @VIRTCHNL2_ACTION_COUNT: Increment the corresponding counter</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+enum virtchnl2_action_types {</div><div class='add'>+	VIRTCHNL2_ACTION_DROP		= BIT(0),</div><div class='add'>+	VIRTCHNL2_ACTION_PASSTHRU	= BIT(1),</div><div class='add'>+	VIRTCHNL2_ACTION_QUEUE		= BIT(2),</div><div class='add'>+	VIRTCHNL2_ACTION_Q_GROUP	= BIT(3),</div><div class='add'>+	VIRTCHNL2_ACTION_MARK		= BIT(4),</div><div class='add'>+	VIRTCHNL2_ACTION_COUNT		= BIT(5),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* underlying device type */</div><div class='ctx'> enum virtchl2_device_type {</div><div class='ctx'> 	VIRTCHNL2_MEV_DEVICE			= 0,</div><div class='hunk'>@@ -448,7 +486,7 @@ VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_version_info);</div><div class='ctx'>  * @seg_caps: See enum virtchnl2_cap_seg.</div><div class='ctx'>  * @hsplit_caps: See enum virtchnl2_cap_rx_hsplit_at.</div><div class='ctx'>  * @rsc_caps: See enum virtchnl2_cap_rsc.</div><div class='del'>- * @rss_caps: See enum virtchnl2_cap_rss.</div><div class='add'>+ * @rss_caps: See enum virtchnl2_flow_types.</div><div class='ctx'>  * @other_caps: See enum virtchnl2_cap_other.</div><div class='ctx'>  * @mailbox_dyn_ctl: DYN_CTL register offset and vector id for mailbox</div><div class='ctx'>  *		     provided by CP.</div><div class='hunk'>@@ -473,6 +511,8 @@ VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_version_info);</div><div class='ctx'>  *			segment offload.</div><div class='ctx'>  * @max_hdr_buf_per_lso: Max number of header buffers that can be used for</div><div class='ctx'>  *			 an LSO.</div><div class='add'>+ * @num_rdma_allocated_vectors: Maximum number of allocated RDMA vectors for</div><div class='add'>+ *				the device.</div><div class='ctx'>  * @pad1: Padding for future extensions.</div><div class='ctx'>  *</div><div class='ctx'>  * Dataplane driver sends this message to CP to negotiate capabilities and</div><div class='hunk'>@@ -520,7 +560,8 @@ struct virtchnl2_get_capabilities {</div><div class='ctx'> 	__le32 device_type;</div><div class='ctx'> 	u8 min_sso_packet_len;</div><div class='ctx'> 	u8 max_hdr_buf_per_lso;</div><div class='del'>-	u8 pad1[10];</div><div class='add'>+	__le16 num_rdma_allocated_vectors;</div><div class='add'>+	u8 pad1[8];</div><div class='ctx'> };</div><div class='ctx'> VIRTCHNL2_CHECK_STRUCT_LEN(80, virtchnl2_get_capabilities);</div><div class='ctx'> </div><div class='hunk'>@@ -560,6 +601,23 @@ struct virtchnl2_queue_reg_chunks {</div><div class='ctx'> VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_queue_reg_chunks);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * enum virtchnl2_vport_flags - Vport flags that indicate vport capabilities.</div><div class='add'>+ * @VIRTCHNL2_VPORT_UPLINK_PORT: Representatives of underlying physical ports</div><div class='add'>+ * @VIRTCHNL2_VPORT_INLINE_FLOW_STEER: Inline flow steering enabled</div><div class='add'>+ * @VIRTCHNL2_VPORT_INLINE_FLOW_STEER_RXQ: Inline flow steering enabled</div><div class='add'>+ *  with explicit Rx queue action</div><div class='add'>+ * @VIRTCHNL2_VPORT_SIDEBAND_FLOW_STEER: Sideband flow steering enabled</div><div class='add'>+ * @VIRTCHNL2_VPORT_ENABLE_RDMA: RDMA is enabled for this vport</div><div class='add'>+ */</div><div class='add'>+enum virtchnl2_vport_flags {</div><div class='add'>+	VIRTCHNL2_VPORT_UPLINK_PORT		= BIT(0),</div><div class='add'>+	VIRTCHNL2_VPORT_INLINE_FLOW_STEER	= BIT(1),</div><div class='add'>+	VIRTCHNL2_VPORT_INLINE_FLOW_STEER_RXQ	= BIT(2),</div><div class='add'>+	VIRTCHNL2_VPORT_SIDEBAND_FLOW_STEER	= BIT(3),</div><div class='add'>+	VIRTCHNL2_VPORT_ENABLE_RDMA             = BIT(4),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * struct virtchnl2_create_vport - Create vport config info.</div><div class='ctx'>  * @vport_type: See enum virtchnl2_vport_type.</div><div class='ctx'>  * @txq_model: See virtchnl2_queue_model.</div><div class='hunk'>@@ -577,10 +635,18 @@ VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_queue_reg_chunks);</div><div class='ctx'>  * @max_mtu: Max MTU. CP populates this field on response.</div><div class='ctx'>  * @vport_id: Vport id. CP populates this field on response.</div><div class='ctx'>  * @default_mac_addr: Default MAC address.</div><div class='del'>- * @pad: Padding.</div><div class='add'>+ * @vport_flags: See enum virtchnl2_vport_flags.</div><div class='ctx'>  * @rx_desc_ids: See VIRTCHNL2_RX_DESC_IDS definitions.</div><div class='ctx'>  * @tx_desc_ids: See VIRTCHNL2_TX_DESC_IDS definitions.</div><div class='ctx'>  * @pad1: Padding.</div><div class='add'>+ * @inline_flow_caps: Bit mask of supported inline-flow-steering</div><div class='add'>+ *  flow types (See enum virtchnl2_flow_types)</div><div class='add'>+ * @sideband_flow_caps: Bit mask of supported sideband-flow-steering</div><div class='add'>+ *  flow types (See enum virtchnl2_flow_types)</div><div class='add'>+ * @sideband_flow_actions: Bit mask of supported action types</div><div class='add'>+ *  for sideband flow steering (See enum virtchnl2_action_types)</div><div class='add'>+ * @flow_steer_max_rules: Max rules allowed for inline and sideband</div><div class='add'>+ *  flow steering combined</div><div class='ctx'>  * @rss_algorithm: RSS algorithm.</div><div class='ctx'>  * @rss_key_size: RSS key size.</div><div class='ctx'>  * @rss_lut_size: RSS LUT size.</div><div class='hunk'>@@ -610,10 +676,14 @@ struct virtchnl2_create_vport {</div><div class='ctx'> 	__le16 max_mtu;</div><div class='ctx'> 	__le32 vport_id;</div><div class='ctx'> 	u8 default_mac_addr[ETH_ALEN];</div><div class='del'>-	__le16 pad;</div><div class='add'>+	__le16 vport_flags;</div><div class='ctx'> 	__le64 rx_desc_ids;</div><div class='ctx'> 	__le64 tx_desc_ids;</div><div class='del'>-	u8 pad1[72];</div><div class='add'>+	u8 pad1[48];</div><div class='add'>+	__le64 inline_flow_caps;</div><div class='add'>+	__le64 sideband_flow_caps;</div><div class='add'>+	__le32 sideband_flow_actions;</div><div class='add'>+	__le32 flow_steer_max_rules;</div><div class='ctx'> 	__le32 rss_algorithm;</div><div class='ctx'> 	__le16 rss_key_size;</div><div class='ctx'> 	__le16 rss_lut_size;</div><div class='hunk'>@@ -1270,4 +1340,474 @@ struct virtchnl2_promisc_info {</div><div class='ctx'> };</div><div class='ctx'> VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_promisc_info);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * enum virtchnl2_ptp_caps - PTP capabilities</div><div class='add'>+ * @VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME: direct access to get the time of</div><div class='add'>+ *					   device clock</div><div class='add'>+ * @VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME_MB: mailbox access to get the time of</div><div class='add'>+ *					      device clock</div><div class='add'>+ * @VIRTCHNL2_CAP_PTP_GET_CROSS_TIME: direct access to cross timestamp</div><div class='add'>+ * @VIRTCHNL2_CAP_PTP_GET_CROSS_TIME_MB: mailbox access to cross timestamp</div><div class='add'>+ * @VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME: direct access to set the time of</div><div class='add'>+ *					   device clock</div><div class='add'>+ * @VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME_MB: mailbox access to set the time of</div><div class='add'>+ *					      device clock</div><div class='add'>+ * @VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK: direct access to adjust the time of device</div><div class='add'>+ *				      clock</div><div class='add'>+ * @VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB: mailbox access to adjust the time of</div><div class='add'>+ *					 device clock</div><div class='add'>+ * @VIRTCHNL2_CAP_PTP_TX_TSTAMPS: direct access to the Tx timestamping</div><div class='add'>+ * @VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB: mailbox access to the Tx timestamping</div><div class='add'>+ *</div><div class='add'>+ * PF/VF negotiates a set of supported PTP capabilities with the Control Plane.</div><div class='add'>+ * There are two access methods - mailbox (_MB) and direct.</div><div class='add'>+ * PTP capabilities enables Main Timer operations: get/set/adjust Main Timer,</div><div class='add'>+ * cross timestamping and the Tx timestamping.</div><div class='add'>+ */</div><div class='add'>+enum virtchnl2_ptp_caps {</div><div class='add'>+	VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME		= BIT(0),</div><div class='add'>+	VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME_MB	= BIT(1),</div><div class='add'>+	VIRTCHNL2_CAP_PTP_GET_CROSS_TIME		= BIT(2),</div><div class='add'>+	VIRTCHNL2_CAP_PTP_GET_CROSS_TIME_MB		= BIT(3),</div><div class='add'>+	VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME		= BIT(4),</div><div class='add'>+	VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME_MB	= BIT(5),</div><div class='add'>+	VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK		= BIT(6),</div><div class='add'>+	VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB		= BIT(7),</div><div class='add'>+	VIRTCHNL2_CAP_PTP_TX_TSTAMPS			= BIT(8),</div><div class='add'>+	VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB			= BIT(9),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_clk_reg_offsets - Offsets of device and PHY clocks</div><div class='add'>+ *					  registers.</div><div class='add'>+ * @dev_clk_ns_l: Device clock low register offset</div><div class='add'>+ * @dev_clk_ns_h: Device clock high register offset</div><div class='add'>+ * @phy_clk_ns_l: PHY clock low register offset</div><div class='add'>+ * @phy_clk_ns_h: PHY clock high register offset</div><div class='add'>+ * @cmd_sync_trigger: The command sync trigger register offset</div><div class='add'>+ * @pad: Padding for future extensions</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_clk_reg_offsets {</div><div class='add'>+	__le32 dev_clk_ns_l;</div><div class='add'>+	__le32 dev_clk_ns_h;</div><div class='add'>+	__le32 phy_clk_ns_l;</div><div class='add'>+	__le32 phy_clk_ns_h;</div><div class='add'>+	__le32 cmd_sync_trigger;</div><div class='add'>+	u8 pad[4];</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(24, virtchnl2_ptp_clk_reg_offsets);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_cross_time_reg_offsets - Offsets of the device cross</div><div class='add'>+ *						 time registers.</div><div class='add'>+ * @sys_time_ns_l: System time low register offset</div><div class='add'>+ * @sys_time_ns_h: System time high register offset</div><div class='add'>+ * @cmd_sync_trigger: The command sync trigger register offset</div><div class='add'>+ * @pad: Padding for future extensions</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_cross_time_reg_offsets {</div><div class='add'>+	__le32 sys_time_ns_l;</div><div class='add'>+	__le32 sys_time_ns_h;</div><div class='add'>+	__le32 cmd_sync_trigger;</div><div class='add'>+	u8 pad[4];</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_ptp_cross_time_reg_offsets);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_clk_adj_reg_offsets - Offsets of device and PHY clocks</div><div class='add'>+ *					      adjustments registers.</div><div class='add'>+ * @dev_clk_cmd_type: Device clock command type register offset</div><div class='add'>+ * @dev_clk_incval_l: Device clock increment value low register offset</div><div class='add'>+ * @dev_clk_incval_h: Device clock increment value high registers offset</div><div class='add'>+ * @dev_clk_shadj_l: Device clock shadow adjust low register offset</div><div class='add'>+ * @dev_clk_shadj_h: Device clock shadow adjust high register offset</div><div class='add'>+ * @phy_clk_cmd_type: PHY timer command type register offset</div><div class='add'>+ * @phy_clk_incval_l: PHY timer increment value low register offset</div><div class='add'>+ * @phy_clk_incval_h: PHY timer increment value high register offset</div><div class='add'>+ * @phy_clk_shadj_l: PHY timer shadow adjust low register offset</div><div class='add'>+ * @phy_clk_shadj_h: PHY timer shadow adjust high register offset</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_clk_adj_reg_offsets {</div><div class='add'>+	__le32 dev_clk_cmd_type;</div><div class='add'>+	__le32 dev_clk_incval_l;</div><div class='add'>+	__le32 dev_clk_incval_h;</div><div class='add'>+	__le32 dev_clk_shadj_l;</div><div class='add'>+	__le32 dev_clk_shadj_h;</div><div class='add'>+	__le32 phy_clk_cmd_type;</div><div class='add'>+	__le32 phy_clk_incval_l;</div><div class='add'>+	__le32 phy_clk_incval_h;</div><div class='add'>+	__le32 phy_clk_shadj_l;</div><div class='add'>+	__le32 phy_clk_shadj_h;</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(40, virtchnl2_ptp_clk_adj_reg_offsets);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_tx_tstamp_latch_caps - PTP Tx timestamp latch</div><div class='add'>+ *					       capabilities.</div><div class='add'>+ * @tx_latch_reg_offset_l: Tx timestamp latch low register offset</div><div class='add'>+ * @tx_latch_reg_offset_h: Tx timestamp latch high register offset</div><div class='add'>+ * @index: Latch index provided to the Tx descriptor</div><div class='add'>+ * @pad: Padding for future extensions</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_tx_tstamp_latch_caps {</div><div class='add'>+	__le32 tx_latch_reg_offset_l;</div><div class='add'>+	__le32 tx_latch_reg_offset_h;</div><div class='add'>+	u8 index;</div><div class='add'>+	u8 pad[7];</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_ptp_tx_tstamp_latch_caps);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_get_vport_tx_tstamp_caps - Structure that defines Tx</div><div class='add'>+ *						   tstamp entries.</div><div class='add'>+ * @vport_id: Vport number</div><div class='add'>+ * @num_latches: Total number of latches</div><div class='add'>+ * @tstamp_ns_lo_bit: First bit for nanosecond part of the timestamp</div><div class='add'>+ * @tstamp_ns_hi_bit: Last bit for nanosecond part of the timestamp</div><div class='add'>+ * @pad: Padding for future tstamp granularity extensions</div><div class='add'>+ * @tstamp_latches: Capabilities of Tx timestamp entries</div><div class='add'>+ *</div><div class='add'>+ * PF/VF sends this message to negotiate the Tx timestamp latches for each</div><div class='add'>+ * Vport.</div><div class='add'>+ *</div><div class='add'>+ * Associated with VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP_CAPS.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_get_vport_tx_tstamp_caps {</div><div class='add'>+	__le32 vport_id;</div><div class='add'>+	__le16 num_latches;</div><div class='add'>+	u8 tstamp_ns_lo_bit;</div><div class='add'>+	u8 tstamp_ns_hi_bit;</div><div class='add'>+	u8 pad[8];</div><div class='add'>+</div><div class='add'>+	struct virtchnl2_ptp_tx_tstamp_latch_caps tstamp_latches[]</div><div class='add'>+						  __counted_by_le(num_latches);</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_ptp_get_vport_tx_tstamp_caps);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_get_caps - Get PTP capabilities</div><div class='add'>+ * @caps: PTP capability bitmap. See enum virtchnl2_ptp_caps</div><div class='add'>+ * @max_adj: The maximum possible frequency adjustment</div><div class='add'>+ * @base_incval: The default timer increment value</div><div class='add'>+ * @peer_mbx_q_id: ID of the PTP Device Control daemon queue</div><div class='add'>+ * @peer_id: Peer ID for PTP Device Control daemon</div><div class='add'>+ * @secondary_mbx: Indicates to the driver that it should create a secondary</div><div class='add'>+ *		   mailbox to inetract with control plane for PTP</div><div class='add'>+ * @pad: Padding for future extensions</div><div class='add'>+ * @clk_offsets: Main timer and PHY registers offsets</div><div class='add'>+ * @cross_time_offsets: Cross time registers offsets</div><div class='add'>+ * @clk_adj_offsets: Offsets needed to adjust the PHY and the main timer</div><div class='add'>+ *</div><div class='add'>+ * PF/VF sends this message to negotiate PTP capabilities. CP updates bitmap</div><div class='add'>+ * with supported features and fulfills appropriate structures.</div><div class='add'>+ * If HW uses primary MBX for PTP: secondary_mbx is set to false.</div><div class='add'>+ * If HW uses secondary MBX for PTP: secondary_mbx is set to true.</div><div class='add'>+ *	Control plane has 2 MBX and the driver has 1 MBX, send to peer</div><div class='add'>+ *	driver may be used to send a message using valid ptp_peer_mb_q_id and</div><div class='add'>+ *	ptp_peer_id.</div><div class='add'>+ * If HW does not use send to peer driver: secondary_mbx is no care field and</div><div class='add'>+ * peer_mbx_q_id holds invalid value (0xFFFF).</div><div class='add'>+ *</div><div class='add'>+ * Associated with VIRTCHNL2_OP_PTP_GET_CAPS.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_get_caps {</div><div class='add'>+	__le32 caps;</div><div class='add'>+	__le32 max_adj;</div><div class='add'>+	__le64 base_incval;</div><div class='add'>+	__le16 peer_mbx_q_id;</div><div class='add'>+	u8 peer_id;</div><div class='add'>+	u8 secondary_mbx;</div><div class='add'>+	u8 pad[4];</div><div class='add'>+</div><div class='add'>+	struct virtchnl2_ptp_clk_reg_offsets clk_offsets;</div><div class='add'>+	struct virtchnl2_ptp_cross_time_reg_offsets cross_time_offsets;</div><div class='add'>+	struct virtchnl2_ptp_clk_adj_reg_offsets clk_adj_offsets;</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(104, virtchnl2_ptp_get_caps);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_tx_tstamp_latch - Structure that describes tx tstamp</div><div class='add'>+ *					  values, index and validity.</div><div class='add'>+ * @tstamp: Timestamp value</div><div class='add'>+ * @index: Timestamp index from which the value is read</div><div class='add'>+ * @valid: Timestamp validity</div><div class='add'>+ * @pad: Padding for future extensions</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_tx_tstamp_latch {</div><div class='add'>+	__le64 tstamp;</div><div class='add'>+	u8 index;</div><div class='add'>+	u8 valid;</div><div class='add'>+	u8 pad[6];</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_ptp_tx_tstamp_latch);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_get_vport_tx_tstamp_latches - Tx timestamp latches</div><div class='add'>+ *						      associated with the vport.</div><div class='add'>+ * @vport_id: Number of vport that requests the timestamp</div><div class='add'>+ * @num_latches: Number of latches</div><div class='add'>+ * @get_devtime_with_txtstmp: Flag to request device time along with Tx timestamp</div><div class='add'>+ * @pad: Padding for future extensions</div><div class='add'>+ * @device_time: device time if get_devtime_with_txtstmp was set in request</div><div class='add'>+ * @tstamp_latches: PTP TX timestamp latch</div><div class='add'>+ *</div><div class='add'>+ * PF/VF sends this message to receive a specified number of timestamps</div><div class='add'>+ * entries.</div><div class='add'>+ *</div><div class='add'>+ * Associated with VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_get_vport_tx_tstamp_latches {</div><div class='add'>+	__le32 vport_id;</div><div class='add'>+	__le16 num_latches;</div><div class='add'>+	u8 get_devtime_with_txtstmp;</div><div class='add'>+	u8 pad[1];</div><div class='add'>+	__le64 device_time;</div><div class='add'>+</div><div class='add'>+	struct virtchnl2_ptp_tx_tstamp_latch tstamp_latches[]</div><div class='add'>+					     __counted_by_le(num_latches);</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_ptp_get_vport_tx_tstamp_latches);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_get_dev_clk_time - Associated with message</div><div class='add'>+ *					   VIRTCHNL2_OP_PTP_GET_DEV_CLK_TIME.</div><div class='add'>+ * @dev_time_ns: Device clock time value in nanoseconds</div><div class='add'>+ *</div><div class='add'>+ * PF/VF sends this message to receive the time from the main timer.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_get_dev_clk_time {</div><div class='add'>+	__le64 dev_time_ns;</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_ptp_get_dev_clk_time);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_get_cross_time: Associated with message</div><div class='add'>+ *					VIRTCHNL2_OP_PTP_GET_CROSS_TIME.</div><div class='add'>+ * @sys_time_ns: System counter value expressed in nanoseconds, read</div><div class='add'>+ *		 synchronously with device time</div><div class='add'>+ * @dev_time_ns: Device clock time value expressed in nanoseconds</div><div class='add'>+ *</div><div class='add'>+ * PF/VF sends this message to receive the cross time.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_get_cross_time {</div><div class='add'>+	__le64 sys_time_ns;</div><div class='add'>+	__le64 dev_time_ns;</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_ptp_get_cross_time);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_set_dev_clk_time: Associated with message</div><div class='add'>+ *					  VIRTCHNL2_OP_PTP_SET_DEV_CLK_TIME.</div><div class='add'>+ * @dev_time_ns: Device time value expressed in nanoseconds to set</div><div class='add'>+ *</div><div class='add'>+ * PF/VF sends this message to set the time of the main timer.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_set_dev_clk_time {</div><div class='add'>+	__le64 dev_time_ns;</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_ptp_set_dev_clk_time);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_adj_dev_clk_fine: Associated with message</div><div class='add'>+ *					  VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_FINE.</div><div class='add'>+ * @incval: Source timer increment value per clock cycle</div><div class='add'>+ *</div><div class='add'>+ * PF/VF sends this message to adjust the frequency of the main timer by the</div><div class='add'>+ * indicated increment value.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_adj_dev_clk_fine {</div><div class='add'>+	__le64 incval;</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_ptp_adj_dev_clk_fine);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_ptp_adj_dev_clk_time: Associated with message</div><div class='add'>+ *					  VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_TIME.</div><div class='add'>+ * @delta: Offset in nanoseconds to adjust the time by</div><div class='add'>+ *</div><div class='add'>+ * PF/VF sends this message to adjust the time of the main timer by the delta.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_ptp_adj_dev_clk_time {</div><div class='add'>+	__le64 delta;</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_ptp_adj_dev_clk_time);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_mem_region - MMIO memory region</div><div class='add'>+ * @start_offset: starting offset of the MMIO memory region</div><div class='add'>+ * @size: size of the MMIO memory region</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_mem_region {</div><div class='add'>+	__le64 start_offset;</div><div class='add'>+	__le64 size;</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(16, virtchnl2_mem_region);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_get_lan_memory_regions - List of LAN MMIO memory regions</div><div class='add'>+ * @num_memory_regions: number of memory regions</div><div class='add'>+ * @pad: Padding</div><div class='add'>+ * @mem_reg: List with memory region info</div><div class='add'>+ *</div><div class='add'>+ * PF/VF sends this message to learn what LAN MMIO memory regions it should map.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_get_lan_memory_regions {</div><div class='add'>+	__le16 num_memory_regions;</div><div class='add'>+	u8 pad[6];</div><div class='add'>+	struct virtchnl2_mem_region mem_reg[];</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_get_lan_memory_regions);</div><div class='add'>+</div><div class='add'>+#define VIRTCHNL2_MAX_NUM_PROTO_HDRS	4</div><div class='add'>+#define VIRTCHNL2_MAX_SIZE_RAW_PACKET	256</div><div class='add'>+#define VIRTCHNL2_MAX_NUM_ACTIONS	8</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_proto_hdr - represent one protocol header</div><div class='add'>+ * @hdr_type: See enum virtchnl2_proto_hdr_type</div><div class='add'>+ * @pad: padding</div><div class='add'>+ * @buffer_spec: binary buffer based on header type.</div><div class='add'>+ * @buffer_mask: mask applied on buffer_spec.</div><div class='add'>+ *</div><div class='add'>+ * Structure to hold protocol headers based on hdr_type</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_proto_hdr {</div><div class='add'>+	__le32 hdr_type;</div><div class='add'>+	u8 pad[4];</div><div class='add'>+	u8 buffer_spec[64];</div><div class='add'>+	u8 buffer_mask[64];</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(136, virtchnl2_proto_hdr);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_proto_hdrs - struct to represent match criteria</div><div class='add'>+ * @tunnel_level: specify where protocol header(s) start from.</div><div class='add'>+ *                 must be 0 when sending a raw packet request.</div><div class='add'>+ *                 0 - from the outer layer</div><div class='add'>+ *                 1 - from the first inner layer</div><div class='add'>+ *                 2 - from the second inner layer</div><div class='add'>+ * @pad: Padding bytes</div><div class='add'>+ * @count: total number of protocol headers in proto_hdr. 0 for raw packet.</div><div class='add'>+ * @proto_hdr: Array of protocol headers</div><div class='add'>+ * @raw: struct holding raw packet buffer when count is 0</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_proto_hdrs {</div><div class='add'>+	u8 tunnel_level;</div><div class='add'>+	u8 pad[3];</div><div class='add'>+	__le32 count;</div><div class='add'>+	union {</div><div class='add'>+		struct virtchnl2_proto_hdr</div><div class='add'>+			proto_hdr[VIRTCHNL2_MAX_NUM_PROTO_HDRS];</div><div class='add'>+		struct {</div><div class='add'>+			__le16 pkt_len;</div><div class='add'>+			u8 spec[VIRTCHNL2_MAX_SIZE_RAW_PACKET];</div><div class='add'>+			u8 mask[VIRTCHNL2_MAX_SIZE_RAW_PACKET];</div><div class='add'>+		} raw;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(552, virtchnl2_proto_hdrs);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_rule_action - struct representing single action for a flow</div><div class='add'>+ * @action_type: see enum virtchnl2_action_types</div><div class='add'>+ * @act_conf: union representing action depending on action_type.</div><div class='add'>+ * @act_conf.q_id: queue id to redirect the packets to.</div><div class='add'>+ * @act_conf.q_grp_id: queue group id to redirect the packets to.</div><div class='add'>+ * @act_conf.ctr_id: used for count action. If input value 0xFFFFFFFF control</div><div class='add'>+ *                    plane assigns a new counter and returns the counter ID to</div><div class='add'>+ *                    the driver. If input value is not 0xFFFFFFFF then it must</div><div class='add'>+ *                    be an existing counter given to the driver for an earlier</div><div class='add'>+ *                    flow. Then this flow will share the counter.</div><div class='add'>+ * @act_conf.mark_id: Value used to mark the packets. Used for mark action.</div><div class='add'>+ * @act_conf.reserved: Reserved for future use.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_rule_action {</div><div class='add'>+	__le32 action_type;</div><div class='add'>+	union {</div><div class='add'>+		__le32 q_id;</div><div class='add'>+		__le32 q_grp_id;</div><div class='add'>+		__le32 ctr_id;</div><div class='add'>+		__le32 mark_id;</div><div class='add'>+		u8 reserved[8];</div><div class='add'>+	} act_conf;</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(12, virtchnl2_rule_action);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_rule_action_set - struct representing multiple actions</div><div class='add'>+ * @count: number of valid actions in the action set of a rule</div><div class='add'>+ * @actions: array of struct virtchnl2_rule_action</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_rule_action_set {</div><div class='add'>+	/* action count must be less than VIRTCHNL2_MAX_NUM_ACTIONS */</div><div class='add'>+	__le32 count;</div><div class='add'>+	struct virtchnl2_rule_action actions[VIRTCHNL2_MAX_NUM_ACTIONS];</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(100, virtchnl2_rule_action_set);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_flow_rule - represent one flow steering rule</div><div class='add'>+ * @proto_hdrs: array of protocol header buffers representing match criteria</div><div class='add'>+ * @action_set: series of actions to be applied for given rule</div><div class='add'>+ * @priority: rule priority.</div><div class='add'>+ * @pad: padding for future extensions.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_flow_rule {</div><div class='add'>+	struct virtchnl2_proto_hdrs proto_hdrs;</div><div class='add'>+	struct virtchnl2_rule_action_set action_set;</div><div class='add'>+	__le32 priority;</div><div class='add'>+	u8 pad[8];</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(664, virtchnl2_flow_rule);</div><div class='add'>+</div><div class='add'>+enum virtchnl2_flow_rule_status {</div><div class='add'>+	VIRTCHNL2_FLOW_RULE_SUCCESS			= 1,</div><div class='add'>+	VIRTCHNL2_FLOW_RULE_NORESOURCE			= 2,</div><div class='add'>+	VIRTCHNL2_FLOW_RULE_EXIST			= 3,</div><div class='add'>+	VIRTCHNL2_FLOW_RULE_TIMEOUT			= 4,</div><div class='add'>+	VIRTCHNL2_FLOW_RULE_FLOW_TYPE_NOT_SUPPORTED	= 5,</div><div class='add'>+	VIRTCHNL2_FLOW_RULE_MATCH_KEY_NOT_SUPPORTED	= 6,</div><div class='add'>+	VIRTCHNL2_FLOW_RULE_ACTION_NOT_SUPPORTED	= 7,</div><div class='add'>+	VIRTCHNL2_FLOW_RULE_ACTION_COMBINATION_INVALID	= 8,</div><div class='add'>+	VIRTCHNL2_FLOW_RULE_ACTION_DATA_INVALID		= 9,</div><div class='add'>+	VIRTCHNL2_FLOW_RULE_NOT_ADDED			= 10,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_flow_rule_info: structure representing single flow rule</div><div class='add'>+ * @rule_id: rule_id associated with the flow_rule.</div><div class='add'>+ * @rule_cfg: structure representing rule.</div><div class='add'>+ * @status: status of rule programming. See enum virtchnl2_flow_rule_status.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_flow_rule_info {</div><div class='add'>+	__le32 rule_id;</div><div class='add'>+	struct virtchnl2_flow_rule rule_cfg;</div><div class='add'>+	__le32 status;</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(672, virtchnl2_flow_rule_info);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct virtchnl2_flow_rule_add_del - add/delete a flow steering rule</div><div class='add'>+ * @vport_id: vport id for which the rule is to be added or deleted.</div><div class='add'>+ * @count: Indicates number of rules to be added or deleted.</div><div class='add'>+ * @rule_info: Array of flow rules to be added or deleted.</div><div class='add'>+ *</div><div class='add'>+ * For VIRTCHNL2_OP_FLOW_RULE_ADD, rule_info contains list of rules to be</div><div class='add'>+ * added. If rule_id is 0xFFFFFFFF, then the rule is programmed and not cached.</div><div class='add'>+ *</div><div class='add'>+ * For VIRTCHNL2_OP_FLOW_RULE_DEL, there are two possibilities. The structure</div><div class='add'>+ * can contain either array of rule_ids or array of match keys to be deleted.</div><div class='add'>+ * When match keys are used the corresponding rule_ids must be 0xFFFFFFFF.</div><div class='add'>+ *</div><div class='add'>+ * status member of each rule indicates the result. Maximum of 6 rules can be</div><div class='add'>+ * added or deleted using this method. Driver has to retry in case of any</div><div class='add'>+ * failure of ADD or DEL opcode. CP doesn't retry in case of failure.</div><div class='add'>+ */</div><div class='add'>+struct virtchnl2_flow_rule_add_del {</div><div class='add'>+	__le32 vport_id;</div><div class='add'>+	__le32 count;</div><div class='add'>+	struct virtchnl2_flow_rule_info rule_info[] __counted_by_le(count);</div><div class='add'>+};</div><div class='add'>+VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_flow_rule_add_del);</div><div class='add'>+</div><div class='ctx'> #endif /* _VIRTCHNL_2_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/xdp.c b/drivers/net/ethernet/intel/idpf/xdp.c<br/>new file mode 100644<br/>index 000000000000..958d16f87424<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/xdp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/xdp.c</a></div><div class='hunk'>@@ -0,0 +1,486 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#include "idpf.h"</div><div class='add'>+#include "idpf_virtchnl.h"</div><div class='add'>+#include "xdp.h"</div><div class='add'>+#include "xsk.h"</div><div class='add'>+</div><div class='add'>+static int idpf_rxq_for_each(const struct idpf_vport *vport,</div><div class='add'>+			     int (*fn)(struct idpf_rx_queue *rxq, void *arg),</div><div class='add'>+			     void *arg)</div><div class='add'>+{</div><div class='add'>+	bool splitq = idpf_is_queue_model_split(vport-&gt;rxq_model);</div><div class='add'>+</div><div class='add'>+	if (!vport-&gt;rxq_grps)</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='add'>+		const struct idpf_rxq_group *rx_qgrp = &amp;vport-&gt;rxq_grps[i];</div><div class='add'>+		u32 num_rxq;</div><div class='add'>+</div><div class='add'>+		if (splitq)</div><div class='add'>+			num_rxq = rx_qgrp-&gt;splitq.num_rxq_sets;</div><div class='add'>+		else</div><div class='add'>+			num_rxq = rx_qgrp-&gt;singleq.num_rxq;</div><div class='add'>+</div><div class='add'>+		for (u32 j = 0; j &lt; num_rxq; j++) {</div><div class='add'>+			struct idpf_rx_queue *q;</div><div class='add'>+			int err;</div><div class='add'>+</div><div class='add'>+			if (splitq)</div><div class='add'>+				q = &amp;rx_qgrp-&gt;splitq.rxq_sets[j]-&gt;rxq;</div><div class='add'>+			else</div><div class='add'>+				q = rx_qgrp-&gt;singleq.rxqs[j];</div><div class='add'>+</div><div class='add'>+			err = fn(q, arg);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __idpf_xdp_rxq_info_init(struct idpf_rx_queue *rxq, void *arg)</div><div class='add'>+{</div><div class='add'>+	const struct idpf_vport *vport = rxq-&gt;q_vector-&gt;vport;</div><div class='add'>+	bool split = idpf_is_queue_model_split(vport-&gt;rxq_model);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = __xdp_rxq_info_reg(&amp;rxq-&gt;xdp_rxq, vport-&gt;netdev, rxq-&gt;idx,</div><div class='add'>+				 rxq-&gt;q_vector-&gt;napi.napi_id,</div><div class='add'>+				 rxq-&gt;rx_buf_size);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (idpf_queue_has(XSK, rxq)) {</div><div class='add'>+		err = xdp_rxq_info_reg_mem_model(&amp;rxq-&gt;xdp_rxq,</div><div class='add'>+						 MEM_TYPE_XSK_BUFF_POOL,</div><div class='add'>+						 rxq-&gt;pool);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unreg;</div><div class='add'>+	} else {</div><div class='add'>+		const struct page_pool *pp;</div><div class='add'>+</div><div class='add'>+		pp = split ? rxq-&gt;bufq_sets[0].bufq.pp : rxq-&gt;pp;</div><div class='add'>+		xdp_rxq_info_attach_page_pool(&amp;rxq-&gt;xdp_rxq, pp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!split)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rxq-&gt;xdpsqs = &amp;vport-&gt;txqs[vport-&gt;xdp_txq_offset];</div><div class='add'>+	rxq-&gt;num_xdp_txq = vport-&gt;num_xdp_txq;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unreg:</div><div class='add'>+	xdp_rxq_info_unreg(&amp;rxq-&gt;xdp_rxq);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int idpf_xdp_rxq_info_init(struct idpf_rx_queue *rxq)</div><div class='add'>+{</div><div class='add'>+	return __idpf_xdp_rxq_info_init(rxq, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int idpf_xdp_rxq_info_init_all(const struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	return idpf_rxq_for_each(vport, __idpf_xdp_rxq_info_init, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __idpf_xdp_rxq_info_deinit(struct idpf_rx_queue *rxq, void *arg)</div><div class='add'>+{</div><div class='add'>+	if (idpf_is_queue_model_split((size_t)arg)) {</div><div class='add'>+		rxq-&gt;xdpsqs = NULL;</div><div class='add'>+		rxq-&gt;num_xdp_txq = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!idpf_queue_has(XSK, rxq))</div><div class='add'>+		xdp_rxq_info_detach_mem_model(&amp;rxq-&gt;xdp_rxq);</div><div class='add'>+</div><div class='add'>+	xdp_rxq_info_unreg(&amp;rxq-&gt;xdp_rxq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void idpf_xdp_rxq_info_deinit(struct idpf_rx_queue *rxq, u32 model)</div><div class='add'>+{</div><div class='add'>+	__idpf_xdp_rxq_info_deinit(rxq, (void *)(size_t)model);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void idpf_xdp_rxq_info_deinit_all(const struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	idpf_rxq_for_each(vport, __idpf_xdp_rxq_info_deinit,</div><div class='add'>+			  (void *)(size_t)vport-&gt;rxq_model);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int idpf_xdp_rxq_assign_prog(struct idpf_rx_queue *rxq, void *arg)</div><div class='add'>+{</div><div class='add'>+	struct bpf_prog *prog = arg;</div><div class='add'>+	struct bpf_prog *old;</div><div class='add'>+</div><div class='add'>+	if (prog)</div><div class='add'>+		bpf_prog_inc(prog);</div><div class='add'>+</div><div class='add'>+	old = rcu_replace_pointer(rxq-&gt;xdp_prog, prog, lockdep_rtnl_is_held());</div><div class='add'>+	if (old)</div><div class='add'>+		bpf_prog_put(old);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void idpf_xdp_copy_prog_to_rqs(const struct idpf_vport *vport,</div><div class='add'>+			       struct bpf_prog *xdp_prog)</div><div class='add'>+{</div><div class='add'>+	idpf_rxq_for_each(vport, idpf_xdp_rxq_assign_prog, xdp_prog);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_xdp_tx_timer(struct work_struct *work);</div><div class='add'>+</div><div class='add'>+int idpf_xdpsqs_get(const struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct libeth_xdpsq_timer **timers __free(kvfree) = NULL;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	u32 sqs;</div><div class='add'>+</div><div class='add'>+	if (!idpf_xdp_enabled(vport))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	timers = kvcalloc(vport-&gt;num_xdp_txq, sizeof(*timers), GFP_KERNEL);</div><div class='add'>+	if (!timers)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; vport-&gt;num_xdp_txq; i++) {</div><div class='add'>+		timers[i] = kzalloc_node(sizeof(*timers[i]), GFP_KERNEL,</div><div class='add'>+					 cpu_to_mem(i));</div><div class='add'>+		if (!timers[i]) {</div><div class='add'>+			for (int j = i - 1; j &gt;= 0; j--)</div><div class='add'>+				kfree(timers[j]);</div><div class='add'>+</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev = vport-&gt;netdev;</div><div class='add'>+	sqs = vport-&gt;xdp_txq_offset;</div><div class='add'>+</div><div class='add'>+	for (u32 i = sqs; i &lt; vport-&gt;num_txq; i++) {</div><div class='add'>+		struct idpf_tx_queue *xdpsq = vport-&gt;txqs[i];</div><div class='add'>+</div><div class='add'>+		xdpsq-&gt;complq = xdpsq-&gt;txq_grp-&gt;complq;</div><div class='add'>+		kfree(xdpsq-&gt;refillq);</div><div class='add'>+		xdpsq-&gt;refillq = NULL;</div><div class='add'>+</div><div class='add'>+		idpf_queue_clear(FLOW_SCH_EN, xdpsq);</div><div class='add'>+		idpf_queue_clear(FLOW_SCH_EN, xdpsq-&gt;complq);</div><div class='add'>+		idpf_queue_set(NOIRQ, xdpsq);</div><div class='add'>+		idpf_queue_set(XDP, xdpsq);</div><div class='add'>+		idpf_queue_set(XDP, xdpsq-&gt;complq);</div><div class='add'>+</div><div class='add'>+		xdpsq-&gt;timer = timers[i - sqs];</div><div class='add'>+		libeth_xdpsq_get(&amp;xdpsq-&gt;xdp_lock, dev, vport-&gt;xdpsq_share);</div><div class='add'>+		libeth_xdpsq_init_timer(xdpsq-&gt;timer, xdpsq, &amp;xdpsq-&gt;xdp_lock,</div><div class='add'>+					idpf_xdp_tx_timer);</div><div class='add'>+</div><div class='add'>+		xdpsq-&gt;pending = 0;</div><div class='add'>+		xdpsq-&gt;xdp_tx = 0;</div><div class='add'>+		xdpsq-&gt;thresh = libeth_xdp_queue_threshold(xdpsq-&gt;desc_count);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void idpf_xdpsqs_put(const struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	u32 sqs;</div><div class='add'>+</div><div class='add'>+	if (!idpf_xdp_enabled(vport))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev = vport-&gt;netdev;</div><div class='add'>+	sqs = vport-&gt;xdp_txq_offset;</div><div class='add'>+</div><div class='add'>+	for (u32 i = sqs; i &lt; vport-&gt;num_txq; i++) {</div><div class='add'>+		struct idpf_tx_queue *xdpsq = vport-&gt;txqs[i];</div><div class='add'>+</div><div class='add'>+		if (!idpf_queue_has_clear(XDP, xdpsq))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		libeth_xdpsq_deinit_timer(xdpsq-&gt;timer);</div><div class='add'>+		libeth_xdpsq_put(&amp;xdpsq-&gt;xdp_lock, dev);</div><div class='add'>+</div><div class='add'>+		kfree(xdpsq-&gt;timer);</div><div class='add'>+		xdpsq-&gt;refillq = NULL;</div><div class='add'>+		idpf_queue_clear(NOIRQ, xdpsq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int idpf_xdp_parse_cqe(const struct idpf_splitq_4b_tx_compl_desc *desc,</div><div class='add'>+			      bool gen)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+#ifdef __LIBETH_WORD_ACCESS</div><div class='add'>+	val = *(const u32 *)desc;</div><div class='add'>+#else</div><div class='add'>+	val = ((u32)le16_to_cpu(desc-&gt;q_head_compl_tag.q_head) &lt;&lt; 16) |</div><div class='add'>+	      le16_to_cpu(desc-&gt;qid_comptype_gen);</div><div class='add'>+#endif</div><div class='add'>+	if (!!(val &amp; IDPF_TXD_COMPLQ_GEN_M) != gen)</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	if (unlikely((val &amp; GENMASK(IDPF_TXD_COMPLQ_GEN_S - 1, 0)) !=</div><div class='add'>+		     FIELD_PREP(IDPF_TXD_COMPLQ_COMPL_TYPE_M,</div><div class='add'>+				IDPF_TXD_COMPLT_RS)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return upper_16_bits(val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 idpf_xdpsq_poll(struct idpf_tx_queue *xdpsq, u32 budget)</div><div class='add'>+{</div><div class='add'>+	struct idpf_compl_queue *cq = xdpsq-&gt;complq;</div><div class='add'>+	u32 tx_ntc = xdpsq-&gt;next_to_clean;</div><div class='add'>+	u32 tx_cnt = xdpsq-&gt;desc_count;</div><div class='add'>+	u32 ntc = cq-&gt;next_to_clean;</div><div class='add'>+	u32 cnt = cq-&gt;desc_count;</div><div class='add'>+	u32 done_frames;</div><div class='add'>+	bool gen;</div><div class='add'>+</div><div class='add'>+	gen = idpf_queue_has(GEN_CHK, cq);</div><div class='add'>+</div><div class='add'>+	for (done_frames = 0; done_frames &lt; budget; ) {</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		ret = idpf_xdp_parse_cqe(&amp;cq-&gt;comp_4b[ntc], gen);</div><div class='add'>+		if (ret &gt;= 0) {</div><div class='add'>+			done_frames = ret &gt; tx_ntc ? ret - tx_ntc :</div><div class='add'>+						     ret + tx_cnt - tx_ntc;</div><div class='add'>+			goto next;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (ret) {</div><div class='add'>+		case -ENODATA:</div><div class='add'>+			goto out;</div><div class='add'>+		case -EINVAL:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+next:</div><div class='add'>+		if (unlikely(++ntc == cnt)) {</div><div class='add'>+			ntc = 0;</div><div class='add'>+			gen = !gen;</div><div class='add'>+			idpf_queue_change(GEN_CHK, cq);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	cq-&gt;next_to_clean = ntc;</div><div class='add'>+</div><div class='add'>+	return done_frames;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 idpf_xdpsq_complete(void *_xdpsq, u32 budget)</div><div class='add'>+{</div><div class='add'>+	struct libeth_xdpsq_napi_stats ss = { };</div><div class='add'>+	struct idpf_tx_queue *xdpsq = _xdpsq;</div><div class='add'>+	u32 tx_ntc = xdpsq-&gt;next_to_clean;</div><div class='add'>+	u32 tx_cnt = xdpsq-&gt;desc_count;</div><div class='add'>+	struct xdp_frame_bulk bq;</div><div class='add'>+	struct libeth_cq_pp cp = {</div><div class='add'>+		.dev	= xdpsq-&gt;dev,</div><div class='add'>+		.bq	= &amp;bq,</div><div class='add'>+		.xss	= &amp;ss,</div><div class='add'>+		.napi	= true,</div><div class='add'>+	};</div><div class='add'>+	u32 done_frames;</div><div class='add'>+</div><div class='add'>+	done_frames = idpf_xdpsq_poll(xdpsq, budget);</div><div class='add'>+	if (unlikely(!done_frames))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	xdp_frame_bulk_init(&amp;bq);</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; likely(i &lt; done_frames); i++) {</div><div class='add'>+		libeth_xdp_complete_tx(&amp;xdpsq-&gt;tx_buf[tx_ntc], &amp;cp);</div><div class='add'>+</div><div class='add'>+		if (unlikely(++tx_ntc == tx_cnt))</div><div class='add'>+			tx_ntc = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xdp_flush_frame_bulk(&amp;bq);</div><div class='add'>+</div><div class='add'>+	xdpsq-&gt;next_to_clean = tx_ntc;</div><div class='add'>+	xdpsq-&gt;pending -= done_frames;</div><div class='add'>+	xdpsq-&gt;xdp_tx -= cp.xdp_tx;</div><div class='add'>+</div><div class='add'>+	return done_frames;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 idpf_xdp_tx_prep(void *_xdpsq, struct libeth_xdpsq *sq)</div><div class='add'>+{</div><div class='add'>+	struct idpf_tx_queue *xdpsq = _xdpsq;</div><div class='add'>+	u32 free;</div><div class='add'>+</div><div class='add'>+	libeth_xdpsq_lock(&amp;xdpsq-&gt;xdp_lock);</div><div class='add'>+</div><div class='add'>+	free = xdpsq-&gt;desc_count - xdpsq-&gt;pending;</div><div class='add'>+	if (free &lt; xdpsq-&gt;thresh)</div><div class='add'>+		free += idpf_xdpsq_complete(xdpsq, xdpsq-&gt;thresh);</div><div class='add'>+</div><div class='add'>+	*sq = (struct libeth_xdpsq){</div><div class='add'>+		.sqes		= xdpsq-&gt;tx_buf,</div><div class='add'>+		.descs		= xdpsq-&gt;desc_ring,</div><div class='add'>+		.count		= xdpsq-&gt;desc_count,</div><div class='add'>+		.lock		= &amp;xdpsq-&gt;xdp_lock,</div><div class='add'>+		.ntu		= &amp;xdpsq-&gt;next_to_use,</div><div class='add'>+		.pending	= &amp;xdpsq-&gt;pending,</div><div class='add'>+		.xdp_tx		= &amp;xdpsq-&gt;xdp_tx,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return free;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+LIBETH_XDP_DEFINE_START();</div><div class='add'>+LIBETH_XDP_DEFINE_TIMER(static idpf_xdp_tx_timer, idpf_xdpsq_complete);</div><div class='add'>+LIBETH_XDP_DEFINE_FLUSH_TX(idpf_xdp_tx_flush_bulk, idpf_xdp_tx_prep,</div><div class='add'>+			   idpf_xdp_tx_xmit);</div><div class='add'>+LIBETH_XDP_DEFINE_FLUSH_XMIT(static idpf_xdp_xmit_flush_bulk, idpf_xdp_tx_prep,</div><div class='add'>+			     idpf_xdp_tx_xmit);</div><div class='add'>+LIBETH_XDP_DEFINE_END();</div><div class='add'>+</div><div class='add'>+int idpf_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='add'>+		  u32 flags)</div><div class='add'>+{</div><div class='add'>+	const struct idpf_netdev_priv *np = netdev_priv(dev);</div><div class='add'>+	const struct idpf_vport *vport = np-&gt;vport;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!netif_carrier_ok(dev) || !vport-&gt;link_up))</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	return libeth_xdp_xmit_do_bulk(dev, n, frames, flags,</div><div class='add'>+				       &amp;vport-&gt;txqs[vport-&gt;xdp_txq_offset],</div><div class='add'>+				       vport-&gt;num_xdp_txq,</div><div class='add'>+				       idpf_xdp_xmit_flush_bulk,</div><div class='add'>+				       idpf_xdp_tx_finalize);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int idpf_xdpmo_rx_hash(const struct xdp_md *ctx, u32 *hash,</div><div class='add'>+			      enum xdp_rss_hash_type *rss_type)</div><div class='add'>+{</div><div class='add'>+	const struct libeth_xdp_buff *xdp = (typeof(xdp))ctx;</div><div class='add'>+	struct idpf_xdp_rx_desc desc __uninitialized;</div><div class='add'>+	const struct idpf_rx_queue *rxq;</div><div class='add'>+	struct libeth_rx_pt pt;</div><div class='add'>+</div><div class='add'>+	rxq = libeth_xdp_buff_to_rq(xdp, typeof(*rxq), xdp_rxq);</div><div class='add'>+</div><div class='add'>+	idpf_xdp_get_qw0(&amp;desc, xdp-&gt;desc);</div><div class='add'>+</div><div class='add'>+	pt = rxq-&gt;rx_ptype_lkup[idpf_xdp_rx_pt(&amp;desc)];</div><div class='add'>+	if (!libeth_rx_pt_has_hash(rxq-&gt;xdp_rxq.dev, pt))</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	idpf_xdp_get_qw2(&amp;desc, xdp-&gt;desc);</div><div class='add'>+</div><div class='add'>+	return libeth_xdpmo_rx_hash(hash, rss_type, idpf_xdp_rx_hash(&amp;desc),</div><div class='add'>+				    pt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct xdp_metadata_ops idpf_xdpmo = {</div><div class='add'>+	.xmo_rx_hash		= idpf_xdpmo_rx_hash,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void idpf_xdp_set_features(const struct idpf_vport *vport)</div><div class='add'>+{</div><div class='add'>+	if (!idpf_is_queue_model_split(vport-&gt;rxq_model))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	libeth_xdp_set_features_noredir(vport-&gt;netdev, &amp;idpf_xdpmo,</div><div class='add'>+					idpf_get_max_tx_bufs(vport-&gt;adapter),</div><div class='add'>+					libeth_xsktmo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int idpf_xdp_setup_prog(struct idpf_vport *vport,</div><div class='add'>+			       const struct netdev_bpf *xdp)</div><div class='add'>+{</div><div class='add'>+	const struct idpf_netdev_priv *np = netdev_priv(vport-&gt;netdev);</div><div class='add'>+	struct bpf_prog *old, *prog = xdp-&gt;prog;</div><div class='add'>+	struct idpf_vport_config *cfg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cfg = vport-&gt;adapter-&gt;vport_config[vport-&gt;idx];</div><div class='add'>+</div><div class='add'>+	if (test_bit(IDPF_REMOVE_IN_PROG, vport-&gt;adapter-&gt;flags) ||</div><div class='add'>+	    !test_bit(IDPF_VPORT_REG_NETDEV, cfg-&gt;flags) ||</div><div class='add'>+	    !!vport-&gt;xdp_prog == !!prog) {</div><div class='add'>+		if (test_bit(IDPF_VPORT_UP, np-&gt;state))</div><div class='add'>+			idpf_xdp_copy_prog_to_rqs(vport, prog);</div><div class='add'>+</div><div class='add'>+		old = xchg(&amp;vport-&gt;xdp_prog, prog);</div><div class='add'>+		if (old)</div><div class='add'>+			bpf_prog_put(old);</div><div class='add'>+</div><div class='add'>+		cfg-&gt;user_config.xdp_prog = prog;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!vport-&gt;num_xdp_txq &amp;&amp; vport-&gt;num_txq == cfg-&gt;max_q.max_txq) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(xdp-&gt;extack,</div><div class='add'>+				   "No Tx queues available for XDP, please decrease the number of regular SQs");</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	old = cfg-&gt;user_config.xdp_prog;</div><div class='add'>+	cfg-&gt;user_config.xdp_prog = prog;</div><div class='add'>+</div><div class='add'>+	ret = idpf_initiate_soft_reset(vport, IDPF_SR_Q_CHANGE);</div><div class='add'>+	if (ret) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(xdp-&gt;extack,</div><div class='add'>+				   "Could not reopen the vport after XDP setup");</div><div class='add'>+</div><div class='add'>+		cfg-&gt;user_config.xdp_prog = old;</div><div class='add'>+		old = prog;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (old)</div><div class='add'>+		bpf_prog_put(old);</div><div class='add'>+</div><div class='add'>+	libeth_xdp_set_redirect(vport-&gt;netdev, vport-&gt;xdp_prog);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int idpf_xdp(struct net_device *dev, struct netdev_bpf *xdp)</div><div class='add'>+{</div><div class='add'>+	struct idpf_vport *vport;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	idpf_vport_ctrl_lock(dev);</div><div class='add'>+	vport = idpf_netdev_to_vport(dev);</div><div class='add'>+</div><div class='add'>+	if (!idpf_is_queue_model_split(vport-&gt;txq_model))</div><div class='add'>+		goto notsupp;</div><div class='add'>+</div><div class='add'>+	switch (xdp-&gt;command) {</div><div class='add'>+	case XDP_SETUP_PROG:</div><div class='add'>+		ret = idpf_xdp_setup_prog(vport, xdp);</div><div class='add'>+		break;</div><div class='add'>+	case XDP_SETUP_XSK_POOL:</div><div class='add'>+		ret = idpf_xsk_pool_setup(vport, xdp);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+notsupp:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idpf_vport_ctrl_unlock(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/xdp.h b/drivers/net/ethernet/intel/idpf/xdp.h<br/>new file mode 100644<br/>index 000000000000..479f5ef3c604<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/xdp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/xdp.h</a></div><div class='hunk'>@@ -0,0 +1,175 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright (C) 2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#ifndef _IDPF_XDP_H_</div><div class='add'>+#define _IDPF_XDP_H_</div><div class='add'>+</div><div class='add'>+#include &lt;net/libeth/xdp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "idpf_txrx.h"</div><div class='add'>+</div><div class='add'>+int idpf_xdp_rxq_info_init(struct idpf_rx_queue *rxq);</div><div class='add'>+int idpf_xdp_rxq_info_init_all(const struct idpf_vport *vport);</div><div class='add'>+void idpf_xdp_rxq_info_deinit(struct idpf_rx_queue *rxq, u32 model);</div><div class='add'>+void idpf_xdp_rxq_info_deinit_all(const struct idpf_vport *vport);</div><div class='add'>+void idpf_xdp_copy_prog_to_rqs(const struct idpf_vport *vport,</div><div class='add'>+			       struct bpf_prog *xdp_prog);</div><div class='add'>+</div><div class='add'>+int idpf_xdpsqs_get(const struct idpf_vport *vport);</div><div class='add'>+void idpf_xdpsqs_put(const struct idpf_vport *vport);</div><div class='add'>+</div><div class='add'>+u32 idpf_xdpsq_poll(struct idpf_tx_queue *xdpsq, u32 budget);</div><div class='add'>+bool idpf_xdp_tx_flush_bulk(struct libeth_xdp_tx_bulk *bq, u32 flags);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_xdp_tx_xmit - produce a single HW Tx descriptor out of XDP desc</div><div class='add'>+ * @desc: XDP descriptor to pull the DMA address and length from</div><div class='add'>+ * @i: descriptor index on the queue to fill</div><div class='add'>+ * @sq: XDP queue to produce the HW Tx descriptor on</div><div class='add'>+ * @priv: &amp;xsk_tx_metadata_ops on XSk xmit or %NULL</div><div class='add'>+ */</div><div class='add'>+static inline void idpf_xdp_tx_xmit(struct libeth_xdp_tx_desc desc, u32 i,</div><div class='add'>+				    const struct libeth_xdpsq *sq, u64 priv)</div><div class='add'>+{</div><div class='add'>+	struct idpf_flex_tx_desc *tx_desc = sq-&gt;descs;</div><div class='add'>+	u32 cmd;</div><div class='add'>+</div><div class='add'>+	cmd = FIELD_PREP(IDPF_FLEX_TXD_QW1_DTYPE_M,</div><div class='add'>+			 IDPF_TX_DESC_DTYPE_FLEX_L2TAG1_L2TAG2);</div><div class='add'>+	if (desc.flags &amp; LIBETH_XDP_TX_LAST)</div><div class='add'>+		cmd |= FIELD_PREP(IDPF_FLEX_TXD_QW1_CMD_M,</div><div class='add'>+				  IDPF_TX_DESC_CMD_EOP);</div><div class='add'>+	if (priv &amp;&amp; (desc.flags &amp; LIBETH_XDP_TX_CSUM))</div><div class='add'>+		cmd |= FIELD_PREP(IDPF_FLEX_TXD_QW1_CMD_M,</div><div class='add'>+				  IDPF_TX_FLEX_DESC_CMD_CS_EN);</div><div class='add'>+</div><div class='add'>+	tx_desc = &amp;tx_desc[i];</div><div class='add'>+	tx_desc-&gt;buf_addr = cpu_to_le64(desc.addr);</div><div class='add'>+#ifdef __LIBETH_WORD_ACCESS</div><div class='add'>+	*(u64 *)&amp;tx_desc-&gt;qw1 = ((u64)desc.len &lt;&lt; 48) | cmd;</div><div class='add'>+#else</div><div class='add'>+	tx_desc-&gt;qw1.buf_size = cpu_to_le16(desc.len);</div><div class='add'>+	tx_desc-&gt;qw1.cmd_dtype = cpu_to_le16(cmd);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void idpf_xdpsq_set_rs(const struct idpf_tx_queue *xdpsq)</div><div class='add'>+{</div><div class='add'>+	u32 ntu, cmd;</div><div class='add'>+</div><div class='add'>+	ntu = xdpsq-&gt;next_to_use;</div><div class='add'>+	if (unlikely(!ntu))</div><div class='add'>+		ntu = xdpsq-&gt;desc_count;</div><div class='add'>+</div><div class='add'>+	cmd = FIELD_PREP(IDPF_FLEX_TXD_QW1_CMD_M, IDPF_TX_DESC_CMD_RS);</div><div class='add'>+#ifdef __LIBETH_WORD_ACCESS</div><div class='add'>+	*(u64 *)&amp;xdpsq-&gt;flex_tx[ntu - 1].q.qw1 |= cmd;</div><div class='add'>+#else</div><div class='add'>+	xdpsq-&gt;flex_tx[ntu - 1].q.qw1.cmd_dtype |= cpu_to_le16(cmd);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void idpf_xdpsq_update_tail(const struct idpf_tx_queue *xdpsq)</div><div class='add'>+{</div><div class='add'>+	dma_wmb();</div><div class='add'>+	writel_relaxed(xdpsq-&gt;next_to_use, xdpsq-&gt;tail);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * idpf_xdp_tx_finalize - finalize sending over XDPSQ</div><div class='add'>+ * @_xdpsq: XDP Tx queue</div><div class='add'>+ * @sent: whether any frames were sent</div><div class='add'>+ * @flush: whether to update RS bit and the tail register</div><div class='add'>+ *</div><div class='add'>+ * Set the RS bit ("end of batch"), bump the tail, and queue the cleanup timer.</div><div class='add'>+ * To be called after a NAPI polling loop, at the end of .ndo_xdp_xmit() etc.</div><div class='add'>+ */</div><div class='add'>+static inline void idpf_xdp_tx_finalize(void *_xdpsq, bool sent, bool flush)</div><div class='add'>+{</div><div class='add'>+	struct idpf_tx_queue *xdpsq = _xdpsq;</div><div class='add'>+</div><div class='add'>+	if ((!flush || unlikely(!sent)) &amp;&amp;</div><div class='add'>+	    likely(xdpsq-&gt;desc_count - 1 != xdpsq-&gt;pending))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	libeth_xdpsq_lock(&amp;xdpsq-&gt;xdp_lock);</div><div class='add'>+</div><div class='add'>+	idpf_xdpsq_set_rs(xdpsq);</div><div class='add'>+	idpf_xdpsq_update_tail(xdpsq);</div><div class='add'>+</div><div class='add'>+	libeth_xdpsq_queue_timer(xdpsq-&gt;timer);</div><div class='add'>+</div><div class='add'>+	libeth_xdpsq_unlock(&amp;xdpsq-&gt;xdp_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct idpf_xdp_rx_desc {</div><div class='add'>+	aligned_u64		qw0;</div><div class='add'>+#define IDPF_XDP_RX_BUFQ	BIT_ULL(47)</div><div class='add'>+#define IDPF_XDP_RX_GEN		BIT_ULL(46)</div><div class='add'>+#define IDPF_XDP_RX_LEN		GENMASK_ULL(45, 32)</div><div class='add'>+#define IDPF_XDP_RX_PT		GENMASK_ULL(25, 16)</div><div class='add'>+</div><div class='add'>+	aligned_u64		qw1;</div><div class='add'>+#define IDPF_XDP_RX_BUF		GENMASK_ULL(47, 32)</div><div class='add'>+#define IDPF_XDP_RX_EOP		BIT_ULL(1)</div><div class='add'>+</div><div class='add'>+	aligned_u64		qw2;</div><div class='add'>+#define IDPF_XDP_RX_HASH	GENMASK_ULL(31, 0)</div><div class='add'>+</div><div class='add'>+	aligned_u64		qw3;</div><div class='add'>+} __aligned(4 * sizeof(u64));</div><div class='add'>+static_assert(sizeof(struct idpf_xdp_rx_desc) ==</div><div class='add'>+	      sizeof(struct virtchnl2_rx_flex_desc_adv_nic_3));</div><div class='add'>+</div><div class='add'>+#define idpf_xdp_rx_bufq(desc)	!!((desc)-&gt;qw0 &amp; IDPF_XDP_RX_BUFQ)</div><div class='add'>+#define idpf_xdp_rx_gen(desc)	!!((desc)-&gt;qw0 &amp; IDPF_XDP_RX_GEN)</div><div class='add'>+#define idpf_xdp_rx_len(desc)	FIELD_GET(IDPF_XDP_RX_LEN, (desc)-&gt;qw0)</div><div class='add'>+#define idpf_xdp_rx_pt(desc)	FIELD_GET(IDPF_XDP_RX_PT, (desc)-&gt;qw0)</div><div class='add'>+#define idpf_xdp_rx_buf(desc)	FIELD_GET(IDPF_XDP_RX_BUF, (desc)-&gt;qw1)</div><div class='add'>+#define idpf_xdp_rx_eop(desc)	!!((desc)-&gt;qw1 &amp; IDPF_XDP_RX_EOP)</div><div class='add'>+#define idpf_xdp_rx_hash(desc)	FIELD_GET(IDPF_XDP_RX_HASH, (desc)-&gt;qw2)</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+idpf_xdp_get_qw0(struct idpf_xdp_rx_desc *desc,</div><div class='add'>+		 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rxd)</div><div class='add'>+{</div><div class='add'>+#ifdef __LIBETH_WORD_ACCESS</div><div class='add'>+	desc-&gt;qw0 = ((const typeof(desc))rxd)-&gt;qw0;</div><div class='add'>+#else</div><div class='add'>+	desc-&gt;qw0 = ((u64)le16_to_cpu(rxd-&gt;pktlen_gen_bufq_id) &lt;&lt; 32) |</div><div class='add'>+		    ((u64)le16_to_cpu(rxd-&gt;ptype_err_fflags0) &lt;&lt; 16);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+idpf_xdp_get_qw1(struct idpf_xdp_rx_desc *desc,</div><div class='add'>+		 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rxd)</div><div class='add'>+{</div><div class='add'>+#ifdef __LIBETH_WORD_ACCESS</div><div class='add'>+	desc-&gt;qw1 = ((const typeof(desc))rxd)-&gt;qw1;</div><div class='add'>+#else</div><div class='add'>+	desc-&gt;qw1 = ((u64)le16_to_cpu(rxd-&gt;buf_id) &lt;&lt; 32) |</div><div class='add'>+		    rxd-&gt;status_err0_qw1;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+idpf_xdp_get_qw2(struct idpf_xdp_rx_desc *desc,</div><div class='add'>+		 const struct virtchnl2_rx_flex_desc_adv_nic_3 *rxd)</div><div class='add'>+{</div><div class='add'>+#ifdef __LIBETH_WORD_ACCESS</div><div class='add'>+	desc-&gt;qw2 = ((const typeof(desc))rxd)-&gt;qw2;</div><div class='add'>+#else</div><div class='add'>+	desc-&gt;qw2 = ((u64)rxd-&gt;hash3 &lt;&lt; 24) |</div><div class='add'>+		    ((u64)rxd-&gt;ff2_mirrid_hash2.hash2 &lt;&lt; 16) |</div><div class='add'>+		    le16_to_cpu(rxd-&gt;hash1);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void idpf_xdp_set_features(const struct idpf_vport *vport);</div><div class='add'>+</div><div class='add'>+int idpf_xdp(struct net_device *dev, struct netdev_bpf *xdp);</div><div class='add'>+int idpf_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='add'>+		  u32 flags);</div><div class='add'>+</div><div class='add'>+#endif /* _IDPF_XDP_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/xsk.c b/drivers/net/ethernet/intel/idpf/xsk.c<br/>new file mode 100644<br/>index 000000000000..fd2cc43ab43c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/xsk.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/xsk.c</a></div><div class='hunk'>@@ -0,0 +1,633 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#include &lt;net/libeth/xsk.h&gt;</div><div class='add'>+</div><div class='add'>+#include "idpf.h"</div><div class='add'>+#include "xdp.h"</div><div class='add'>+#include "xsk.h"</div><div class='add'>+</div><div class='add'>+static void idpf_xsk_tx_timer(struct work_struct *work);</div><div class='add'>+</div><div class='add'>+static void idpf_xsk_setup_rxq(const struct idpf_vport *vport,</div><div class='add'>+			       struct idpf_rx_queue *rxq)</div><div class='add'>+{</div><div class='add'>+	struct xsk_buff_pool *pool;</div><div class='add'>+</div><div class='add'>+	pool = xsk_get_pool_from_qid(vport-&gt;netdev, rxq-&gt;idx);</div><div class='add'>+	if (!pool || !pool-&gt;dev || !xsk_buff_can_alloc(pool, 1))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rxq-&gt;pool = pool;</div><div class='add'>+</div><div class='add'>+	idpf_queue_set(XSK, rxq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_xsk_setup_bufq(const struct idpf_vport *vport,</div><div class='add'>+				struct idpf_buf_queue *bufq)</div><div class='add'>+{</div><div class='add'>+	struct xsk_buff_pool *pool;</div><div class='add'>+	u32 qid = U32_MAX;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; vport-&gt;num_rxq_grp; i++) {</div><div class='add'>+		const struct idpf_rxq_group *grp = &amp;vport-&gt;rxq_grps[i];</div><div class='add'>+</div><div class='add'>+		for (u32 j = 0; j &lt; vport-&gt;num_bufqs_per_qgrp; j++) {</div><div class='add'>+			if (&amp;grp-&gt;splitq.bufq_sets[j].bufq == bufq) {</div><div class='add'>+				qid = grp-&gt;splitq.rxq_sets[0]-&gt;rxq.idx;</div><div class='add'>+				goto setup;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+setup:</div><div class='add'>+	pool = xsk_get_pool_from_qid(vport-&gt;netdev, qid);</div><div class='add'>+	if (!pool || !pool-&gt;dev || !xsk_buff_can_alloc(pool, 1))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bufq-&gt;pool = pool;</div><div class='add'>+</div><div class='add'>+	idpf_queue_set(XSK, bufq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_xsk_setup_txq(const struct idpf_vport *vport,</div><div class='add'>+			       struct idpf_tx_queue *txq)</div><div class='add'>+{</div><div class='add'>+	struct xsk_buff_pool *pool;</div><div class='add'>+	u32 qid;</div><div class='add'>+</div><div class='add'>+	idpf_queue_clear(XSK, txq);</div><div class='add'>+</div><div class='add'>+	if (!idpf_queue_has(XDP, txq))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	qid = txq-&gt;idx - vport-&gt;xdp_txq_offset;</div><div class='add'>+</div><div class='add'>+	pool = xsk_get_pool_from_qid(vport-&gt;netdev, qid);</div><div class='add'>+	if (!pool || !pool-&gt;dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	txq-&gt;pool = pool;</div><div class='add'>+	libeth_xdpsq_init_timer(txq-&gt;timer, txq, &amp;txq-&gt;xdp_lock,</div><div class='add'>+				idpf_xsk_tx_timer);</div><div class='add'>+</div><div class='add'>+	idpf_queue_assign(NOIRQ, txq, xsk_uses_need_wakeup(pool));</div><div class='add'>+	idpf_queue_set(XSK, txq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void idpf_xsk_setup_complq(const struct idpf_vport *vport,</div><div class='add'>+				  struct idpf_compl_queue *complq)</div><div class='add'>+{</div><div class='add'>+	const struct xsk_buff_pool *pool;</div><div class='add'>+	u32 qid;</div><div class='add'>+</div><div class='add'>+	idpf_queue_clear(XSK, complq);</div><div class='add'>+</div><div class='add'>+	if (!idpf_queue_has(XDP, complq))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	qid = complq-&gt;txq_grp-&gt;txqs[0]-&gt;idx - vport-&gt;xdp_txq_offset;</div><div class='add'>+</div><div class='add'>+	pool = xsk_get_pool_from_qid(vport-&gt;netdev, qid);</div><div class='add'>+	if (!pool || !pool-&gt;dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	idpf_queue_set(XSK, complq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void idpf_xsk_setup_queue(const struct idpf_vport *vport, void *q,</div><div class='add'>+			  enum virtchnl2_queue_type type)</div><div class='add'>+{</div><div class='add'>+	if (!idpf_xdp_enabled(vport))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case VIRTCHNL2_QUEUE_TYPE_RX:</div><div class='add'>+		idpf_xsk_setup_rxq(vport, q);</div><div class='add'>+		break;</div><div class='add'>+	case VIRTCHNL2_QUEUE_TYPE_RX_BUFFER:</div><div class='add'>+		idpf_xsk_setup_bufq(vport, q);</div><div class='add'>+		break;</div><div class='add'>+	case VIRTCHNL2_QUEUE_TYPE_TX:</div><div class='add'>+		idpf_xsk_setup_txq(vport, q);</div><div class='add'>+		break;</div><div class='add'>+	case VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION:</div><div class='add'>+		idpf_xsk_setup_complq(vport, q);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void idpf_xsk_clear_queue(void *q, enum virtchnl2_queue_type type)</div><div class='add'>+{</div><div class='add'>+	struct idpf_compl_queue *complq;</div><div class='add'>+	struct idpf_buf_queue *bufq;</div><div class='add'>+	struct idpf_rx_queue *rxq;</div><div class='add'>+	struct idpf_tx_queue *txq;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case VIRTCHNL2_QUEUE_TYPE_RX:</div><div class='add'>+		rxq = q;</div><div class='add'>+		if (!idpf_queue_has_clear(XSK, rxq))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		rxq-&gt;pool = NULL;</div><div class='add'>+		break;</div><div class='add'>+	case VIRTCHNL2_QUEUE_TYPE_RX_BUFFER:</div><div class='add'>+		bufq = q;</div><div class='add'>+		if (!idpf_queue_has_clear(XSK, bufq))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		bufq-&gt;pool = NULL;</div><div class='add'>+		break;</div><div class='add'>+	case VIRTCHNL2_QUEUE_TYPE_TX:</div><div class='add'>+		txq = q;</div><div class='add'>+		if (!idpf_queue_has_clear(XSK, txq))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		idpf_queue_set(NOIRQ, txq);</div><div class='add'>+		txq-&gt;dev = txq-&gt;netdev-&gt;dev.parent;</div><div class='add'>+		break;</div><div class='add'>+	case VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION:</div><div class='add'>+		complq = q;</div><div class='add'>+		idpf_queue_clear(XSK, complq);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void idpf_xsk_init_wakeup(struct idpf_q_vector *qv)</div><div class='add'>+{</div><div class='add'>+	libeth_xsk_init_wakeup(&amp;qv-&gt;csd, &amp;qv-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void idpf_xsksq_clean(struct idpf_tx_queue *xdpsq)</div><div class='add'>+{</div><div class='add'>+	struct libeth_xdpsq_napi_stats ss = { };</div><div class='add'>+	u32 ntc = xdpsq-&gt;next_to_clean;</div><div class='add'>+	struct xdp_frame_bulk bq;</div><div class='add'>+	struct libeth_cq_pp cp = {</div><div class='add'>+		.dev	= xdpsq-&gt;pool-&gt;dev,</div><div class='add'>+		.bq	= &amp;bq,</div><div class='add'>+		.xss	= &amp;ss,</div><div class='add'>+	};</div><div class='add'>+	u32 xsk_frames = 0;</div><div class='add'>+</div><div class='add'>+	xdp_frame_bulk_init(&amp;bq);</div><div class='add'>+</div><div class='add'>+	while (ntc != xdpsq-&gt;next_to_use) {</div><div class='add'>+		struct libeth_sqe *sqe = &amp;xdpsq-&gt;tx_buf[ntc];</div><div class='add'>+</div><div class='add'>+		if (sqe-&gt;type)</div><div class='add'>+			libeth_xdp_complete_tx(sqe, &amp;cp);</div><div class='add'>+		else</div><div class='add'>+			xsk_frames++;</div><div class='add'>+</div><div class='add'>+		if (unlikely(++ntc == xdpsq-&gt;desc_count))</div><div class='add'>+			ntc = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xdp_flush_frame_bulk(&amp;bq);</div><div class='add'>+</div><div class='add'>+	if (xsk_frames)</div><div class='add'>+		xsk_tx_completed(xdpsq-&gt;pool, xsk_frames);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static noinline u32 idpf_xsksq_complete_slow(struct idpf_tx_queue *xdpsq,</div><div class='add'>+					     u32 done)</div><div class='add'>+{</div><div class='add'>+	struct libeth_xdpsq_napi_stats ss = { };</div><div class='add'>+	u32 ntc = xdpsq-&gt;next_to_clean;</div><div class='add'>+	u32 cnt = xdpsq-&gt;desc_count;</div><div class='add'>+	struct xdp_frame_bulk bq;</div><div class='add'>+	struct libeth_cq_pp cp = {</div><div class='add'>+		.dev	= xdpsq-&gt;pool-&gt;dev,</div><div class='add'>+		.bq	= &amp;bq,</div><div class='add'>+		.xss	= &amp;ss,</div><div class='add'>+		.napi	= true,</div><div class='add'>+	};</div><div class='add'>+	u32 xsk_frames = 0;</div><div class='add'>+</div><div class='add'>+	xdp_frame_bulk_init(&amp;bq);</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; likely(i &lt; done); i++) {</div><div class='add'>+		struct libeth_sqe *sqe = &amp;xdpsq-&gt;tx_buf[ntc];</div><div class='add'>+</div><div class='add'>+		if (sqe-&gt;type)</div><div class='add'>+			libeth_xdp_complete_tx(sqe, &amp;cp);</div><div class='add'>+		else</div><div class='add'>+			xsk_frames++;</div><div class='add'>+</div><div class='add'>+		if (unlikely(++ntc == cnt))</div><div class='add'>+			ntc = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xdp_flush_frame_bulk(&amp;bq);</div><div class='add'>+</div><div class='add'>+	xdpsq-&gt;next_to_clean = ntc;</div><div class='add'>+	xdpsq-&gt;xdp_tx -= cp.xdp_tx;</div><div class='add'>+</div><div class='add'>+	return xsk_frames;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __always_inline u32 idpf_xsksq_complete(void *_xdpsq, u32 budget)</div><div class='add'>+{</div><div class='add'>+	struct idpf_tx_queue *xdpsq = _xdpsq;</div><div class='add'>+	u32 tx_ntc = xdpsq-&gt;next_to_clean;</div><div class='add'>+	u32 tx_cnt = xdpsq-&gt;desc_count;</div><div class='add'>+	u32 done_frames;</div><div class='add'>+	u32 xsk_frames;</div><div class='add'>+</div><div class='add'>+	done_frames = idpf_xdpsq_poll(xdpsq, budget);</div><div class='add'>+	if (unlikely(!done_frames))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (likely(!xdpsq-&gt;xdp_tx)) {</div><div class='add'>+		tx_ntc += done_frames;</div><div class='add'>+		if (tx_ntc &gt;= tx_cnt)</div><div class='add'>+			tx_ntc -= tx_cnt;</div><div class='add'>+</div><div class='add'>+		xdpsq-&gt;next_to_clean = tx_ntc;</div><div class='add'>+		xsk_frames = done_frames;</div><div class='add'>+</div><div class='add'>+		goto finalize;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xsk_frames = idpf_xsksq_complete_slow(xdpsq, done_frames);</div><div class='add'>+	if (xsk_frames)</div><div class='add'>+finalize:</div><div class='add'>+		xsk_tx_completed(xdpsq-&gt;pool, xsk_frames);</div><div class='add'>+</div><div class='add'>+	xdpsq-&gt;pending -= done_frames;</div><div class='add'>+</div><div class='add'>+	return done_frames;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 idpf_xsk_tx_prep(void *_xdpsq, struct libeth_xdpsq *sq)</div><div class='add'>+{</div><div class='add'>+	struct idpf_tx_queue *xdpsq = _xdpsq;</div><div class='add'>+	u32 free;</div><div class='add'>+</div><div class='add'>+	libeth_xdpsq_lock(&amp;xdpsq-&gt;xdp_lock);</div><div class='add'>+</div><div class='add'>+	free = xdpsq-&gt;desc_count - xdpsq-&gt;pending;</div><div class='add'>+	if (free &lt; xdpsq-&gt;thresh)</div><div class='add'>+		free += idpf_xsksq_complete(xdpsq, xdpsq-&gt;thresh);</div><div class='add'>+</div><div class='add'>+	*sq = (struct libeth_xdpsq){</div><div class='add'>+		.pool		= xdpsq-&gt;pool,</div><div class='add'>+		.sqes		= xdpsq-&gt;tx_buf,</div><div class='add'>+		.descs		= xdpsq-&gt;desc_ring,</div><div class='add'>+		.count		= xdpsq-&gt;desc_count,</div><div class='add'>+		.lock		= &amp;xdpsq-&gt;xdp_lock,</div><div class='add'>+		.ntu		= &amp;xdpsq-&gt;next_to_use,</div><div class='add'>+		.pending	= &amp;xdpsq-&gt;pending,</div><div class='add'>+		.xdp_tx		= &amp;xdpsq-&gt;xdp_tx,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return free;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 idpf_xsk_xmit_prep(void *_xdpsq, struct libeth_xdpsq *sq)</div><div class='add'>+{</div><div class='add'>+	struct idpf_tx_queue *xdpsq = _xdpsq;</div><div class='add'>+</div><div class='add'>+	*sq = (struct libeth_xdpsq){</div><div class='add'>+		.pool		= xdpsq-&gt;pool,</div><div class='add'>+		.sqes		= xdpsq-&gt;tx_buf,</div><div class='add'>+		.descs		= xdpsq-&gt;desc_ring,</div><div class='add'>+		.count		= xdpsq-&gt;desc_count,</div><div class='add'>+		.lock		= &amp;xdpsq-&gt;xdp_lock,</div><div class='add'>+		.ntu		= &amp;xdpsq-&gt;next_to_use,</div><div class='add'>+		.pending	= &amp;xdpsq-&gt;pending,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The queue is cleaned, the budget is already known, optimize out</div><div class='add'>+	 * the second min() by passing the type limit.</div><div class='add'>+	 */</div><div class='add'>+	return U32_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool idpf_xsk_xmit(struct idpf_tx_queue *xsksq)</div><div class='add'>+{</div><div class='add'>+	u32 free;</div><div class='add'>+</div><div class='add'>+	libeth_xdpsq_lock(&amp;xsksq-&gt;xdp_lock);</div><div class='add'>+</div><div class='add'>+	free = xsksq-&gt;desc_count - xsksq-&gt;pending;</div><div class='add'>+	if (free &lt; xsksq-&gt;thresh)</div><div class='add'>+		free += idpf_xsksq_complete(xsksq, xsksq-&gt;thresh);</div><div class='add'>+</div><div class='add'>+	return libeth_xsk_xmit_do_bulk(xsksq-&gt;pool, xsksq,</div><div class='add'>+				       min(free - 1, xsksq-&gt;thresh),</div><div class='add'>+				       libeth_xsktmo, idpf_xsk_xmit_prep,</div><div class='add'>+				       idpf_xdp_tx_xmit, idpf_xdp_tx_finalize);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+LIBETH_XDP_DEFINE_START();</div><div class='add'>+LIBETH_XDP_DEFINE_TIMER(static idpf_xsk_tx_timer, idpf_xsksq_complete);</div><div class='add'>+LIBETH_XSK_DEFINE_FLUSH_TX(static idpf_xsk_tx_flush_bulk, idpf_xsk_tx_prep,</div><div class='add'>+			   idpf_xdp_tx_xmit);</div><div class='add'>+LIBETH_XSK_DEFINE_RUN(static idpf_xsk_run_pass, idpf_xsk_run_prog,</div><div class='add'>+		      idpf_xsk_tx_flush_bulk, idpf_rx_process_skb_fields);</div><div class='add'>+LIBETH_XSK_DEFINE_FINALIZE(static idpf_xsk_finalize_rx, idpf_xsk_tx_flush_bulk,</div><div class='add'>+			   idpf_xdp_tx_finalize);</div><div class='add'>+LIBETH_XDP_DEFINE_END();</div><div class='add'>+</div><div class='add'>+static void idpf_xskfqe_init(const struct libeth_xskfq_fp *fq, u32 i)</div><div class='add'>+{</div><div class='add'>+	struct virtchnl2_splitq_rx_buf_desc *desc = fq-&gt;descs;</div><div class='add'>+</div><div class='add'>+	desc = &amp;desc[i];</div><div class='add'>+#ifdef __LIBETH_WORD_ACCESS</div><div class='add'>+	*(u64 *)&amp;desc-&gt;qword0 = i;</div><div class='add'>+#else</div><div class='add'>+	desc-&gt;qword0.buf_id = cpu_to_le16(i);</div><div class='add'>+#endif</div><div class='add'>+	desc-&gt;pkt_addr = cpu_to_le64(libeth_xsk_buff_xdp_get_dma(fq-&gt;fqes[i]));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool idpf_xskfq_refill_thresh(struct idpf_buf_queue *bufq, u32 count)</div><div class='add'>+{</div><div class='add'>+	struct libeth_xskfq_fp fq = {</div><div class='add'>+		.pool	= bufq-&gt;pool,</div><div class='add'>+		.fqes	= bufq-&gt;xsk_buf,</div><div class='add'>+		.descs	= bufq-&gt;split_buf,</div><div class='add'>+		.ntu	= bufq-&gt;next_to_use,</div><div class='add'>+		.count	= bufq-&gt;desc_count,</div><div class='add'>+	};</div><div class='add'>+	u32 done;</div><div class='add'>+</div><div class='add'>+	done = libeth_xskfqe_alloc(&amp;fq, count, idpf_xskfqe_init);</div><div class='add'>+	writel(fq.ntu, bufq-&gt;tail);</div><div class='add'>+</div><div class='add'>+	bufq-&gt;next_to_use = fq.ntu;</div><div class='add'>+	bufq-&gt;pending -= done;</div><div class='add'>+</div><div class='add'>+	return done == count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool idpf_xskfq_refill(struct idpf_buf_queue *bufq)</div><div class='add'>+{</div><div class='add'>+	u32 count, rx_thresh = bufq-&gt;thresh;</div><div class='add'>+</div><div class='add'>+	count = ALIGN_DOWN(bufq-&gt;pending - 1, rx_thresh);</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; count; i += rx_thresh) {</div><div class='add'>+		if (unlikely(!idpf_xskfq_refill_thresh(bufq, rx_thresh)))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int idpf_xskfq_init(struct idpf_buf_queue *bufq)</div><div class='add'>+{</div><div class='add'>+	struct libeth_xskfq fq = {</div><div class='add'>+		.pool	= bufq-&gt;pool,</div><div class='add'>+		.count	= bufq-&gt;desc_count,</div><div class='add'>+		.nid	= idpf_q_vector_to_mem(bufq-&gt;q_vector),</div><div class='add'>+	};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = libeth_xskfq_create(&amp;fq);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	bufq-&gt;xsk_buf = fq.fqes;</div><div class='add'>+	bufq-&gt;pending = fq.pending;</div><div class='add'>+	bufq-&gt;thresh = fq.thresh;</div><div class='add'>+	bufq-&gt;rx_buf_size = fq.buf_len;</div><div class='add'>+</div><div class='add'>+	if (!idpf_xskfq_refill(bufq))</div><div class='add'>+		netdev_err(bufq-&gt;pool-&gt;netdev,</div><div class='add'>+			   "failed to allocate XSk buffers for qid %d\n",</div><div class='add'>+			   bufq-&gt;pool-&gt;queue_id);</div><div class='add'>+</div><div class='add'>+	bufq-&gt;next_to_alloc = bufq-&gt;next_to_use;</div><div class='add'>+</div><div class='add'>+	idpf_queue_clear(HSPLIT_EN, bufq);</div><div class='add'>+	bufq-&gt;rx_hbuf_size = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void idpf_xskfq_rel(struct idpf_buf_queue *bufq)</div><div class='add'>+{</div><div class='add'>+	struct libeth_xskfq fq = {</div><div class='add'>+		.fqes	= bufq-&gt;xsk_buf,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	libeth_xskfq_destroy(&amp;fq);</div><div class='add'>+</div><div class='add'>+	bufq-&gt;rx_buf_size = fq.buf_len;</div><div class='add'>+	bufq-&gt;thresh = fq.thresh;</div><div class='add'>+	bufq-&gt;pending = fq.pending;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct idpf_xskfq_refill_set {</div><div class='add'>+	struct {</div><div class='add'>+		struct idpf_buf_queue	*q;</div><div class='add'>+		u32			buf_id;</div><div class='add'>+		u32			pending;</div><div class='add'>+	} bufqs[IDPF_MAX_BUFQS_PER_RXQ_GRP];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool idpf_xskfq_refill_set(const struct idpf_xskfq_refill_set *set)</div><div class='add'>+{</div><div class='add'>+	bool ret = true;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; ARRAY_SIZE(set-&gt;bufqs); i++) {</div><div class='add'>+		struct idpf_buf_queue *bufq = set-&gt;bufqs[i].q;</div><div class='add'>+		u32 ntc;</div><div class='add'>+</div><div class='add'>+		if (!bufq)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ntc = set-&gt;bufqs[i].buf_id;</div><div class='add'>+		if (unlikely(++ntc == bufq-&gt;desc_count))</div><div class='add'>+			ntc = 0;</div><div class='add'>+</div><div class='add'>+		bufq-&gt;next_to_clean = ntc;</div><div class='add'>+		bufq-&gt;pending += set-&gt;bufqs[i].pending;</div><div class='add'>+</div><div class='add'>+		if (bufq-&gt;pending &gt; bufq-&gt;thresh)</div><div class='add'>+			ret &amp;= idpf_xskfq_refill(bufq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int idpf_xskrq_poll(struct idpf_rx_queue *rxq, u32 budget)</div><div class='add'>+{</div><div class='add'>+	struct idpf_xskfq_refill_set set = { };</div><div class='add'>+	struct libeth_rq_napi_stats rs = { };</div><div class='add'>+	bool wake, gen, fail = false;</div><div class='add'>+	u32 ntc = rxq-&gt;next_to_clean;</div><div class='add'>+	struct libeth_xdp_buff *xdp;</div><div class='add'>+	LIBETH_XDP_ONSTACK_BULK(bq);</div><div class='add'>+	u32 cnt = rxq-&gt;desc_count;</div><div class='add'>+</div><div class='add'>+	wake = xsk_uses_need_wakeup(rxq-&gt;pool);</div><div class='add'>+	if (wake)</div><div class='add'>+		xsk_clear_rx_need_wakeup(rxq-&gt;pool);</div><div class='add'>+</div><div class='add'>+	gen = idpf_queue_has(GEN_CHK, rxq);</div><div class='add'>+</div><div class='add'>+	libeth_xsk_tx_init_bulk(&amp;bq, rxq-&gt;xdp_prog, rxq-&gt;xdp_rxq.dev,</div><div class='add'>+				rxq-&gt;xdpsqs, rxq-&gt;num_xdp_txq);</div><div class='add'>+	xdp = rxq-&gt;xsk;</div><div class='add'>+</div><div class='add'>+	while (likely(rs.packets &lt; budget)) {</div><div class='add'>+		const struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc;</div><div class='add'>+		struct idpf_xdp_rx_desc desc __uninitialized;</div><div class='add'>+		struct idpf_buf_queue *bufq;</div><div class='add'>+		u32 bufq_id, buf_id;</div><div class='add'>+</div><div class='add'>+		rx_desc = &amp;rxq-&gt;rx[ntc].flex_adv_nic_3_wb;</div><div class='add'>+</div><div class='add'>+		idpf_xdp_get_qw0(&amp;desc, rx_desc);</div><div class='add'>+		if (idpf_xdp_rx_gen(&amp;desc) != gen)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		dma_rmb();</div><div class='add'>+</div><div class='add'>+		bufq_id = idpf_xdp_rx_bufq(&amp;desc);</div><div class='add'>+		bufq = set.bufqs[bufq_id].q;</div><div class='add'>+		if (!bufq) {</div><div class='add'>+			bufq = &amp;rxq-&gt;bufq_sets[bufq_id].bufq;</div><div class='add'>+			set.bufqs[bufq_id].q = bufq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		idpf_xdp_get_qw1(&amp;desc, rx_desc);</div><div class='add'>+		buf_id = idpf_xdp_rx_buf(&amp;desc);</div><div class='add'>+</div><div class='add'>+		set.bufqs[bufq_id].buf_id = buf_id;</div><div class='add'>+		set.bufqs[bufq_id].pending++;</div><div class='add'>+</div><div class='add'>+		xdp = libeth_xsk_process_buff(xdp, bufq-&gt;xsk_buf[buf_id],</div><div class='add'>+					      idpf_xdp_rx_len(&amp;desc));</div><div class='add'>+</div><div class='add'>+		if (unlikely(++ntc == cnt)) {</div><div class='add'>+			ntc = 0;</div><div class='add'>+			gen = !gen;</div><div class='add'>+			idpf_queue_change(GEN_CHK, rxq);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!idpf_xdp_rx_eop(&amp;desc) || unlikely(!xdp))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		fail = !idpf_xsk_run_pass(xdp, &amp;bq, rxq-&gt;napi, &amp;rs, rx_desc);</div><div class='add'>+		xdp = NULL;</div><div class='add'>+</div><div class='add'>+		if (fail)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idpf_xsk_finalize_rx(&amp;bq);</div><div class='add'>+</div><div class='add'>+	rxq-&gt;next_to_clean = ntc;</div><div class='add'>+	rxq-&gt;xsk = xdp;</div><div class='add'>+</div><div class='add'>+	fail |= !idpf_xskfq_refill_set(&amp;set);</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;rxq-&gt;stats_sync);</div><div class='add'>+	u64_stats_add(&amp;rxq-&gt;q_stats.packets, rs.packets);</div><div class='add'>+	u64_stats_add(&amp;rxq-&gt;q_stats.bytes, rs.bytes);</div><div class='add'>+	u64_stats_update_end(&amp;rxq-&gt;stats_sync);</div><div class='add'>+</div><div class='add'>+	if (!wake)</div><div class='add'>+		return unlikely(fail) ? budget : rs.packets;</div><div class='add'>+</div><div class='add'>+	if (unlikely(fail))</div><div class='add'>+		xsk_set_rx_need_wakeup(rxq-&gt;pool);</div><div class='add'>+</div><div class='add'>+	return rs.packets;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int idpf_xsk_pool_setup(struct idpf_vport *vport, struct netdev_bpf *bpf)</div><div class='add'>+{</div><div class='add'>+	struct xsk_buff_pool *pool = bpf-&gt;xsk.pool;</div><div class='add'>+	u32 qid = bpf-&gt;xsk.queue_id;</div><div class='add'>+	bool restart;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pool &amp;&amp; !IS_ALIGNED(xsk_pool_get_rx_frame_size(pool),</div><div class='add'>+				LIBETH_RX_BUF_STRIDE)) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(bpf-&gt;extack,</div><div class='add'>+				       "%s: HW doesn't support frames sizes not aligned to %u (qid %u: %u)",</div><div class='add'>+				       netdev_name(vport-&gt;netdev),</div><div class='add'>+				       LIBETH_RX_BUF_STRIDE, qid,</div><div class='add'>+				       xsk_pool_get_rx_frame_size(pool));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	restart = idpf_xdp_enabled(vport) &amp;&amp; netif_running(vport-&gt;netdev);</div><div class='add'>+	if (!restart)</div><div class='add'>+		goto pool;</div><div class='add'>+</div><div class='add'>+	ret = idpf_qp_switch(vport, qid, false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(bpf-&gt;extack,</div><div class='add'>+				       "%s: failed to disable queue pair %u: %pe",</div><div class='add'>+				       netdev_name(vport-&gt;netdev), qid,</div><div class='add'>+				       ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+pool:</div><div class='add'>+	ret = libeth_xsk_setup_pool(vport-&gt;netdev, qid, pool);</div><div class='add'>+	if (ret) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(bpf-&gt;extack,</div><div class='add'>+				       "%s: failed to configure XSk pool for pair %u: %pe",</div><div class='add'>+				       netdev_name(vport-&gt;netdev), qid,</div><div class='add'>+				       ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!restart)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = idpf_qp_switch(vport, qid, true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(bpf-&gt;extack,</div><div class='add'>+				       "%s: failed to enable queue pair %u: %pe",</div><div class='add'>+				       netdev_name(vport-&gt;netdev), qid,</div><div class='add'>+				       ERR_PTR(ret));</div><div class='add'>+		goto err_dis;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_dis:</div><div class='add'>+	libeth_xsk_setup_pool(vport-&gt;netdev, qid, false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int idpf_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)</div><div class='add'>+{</div><div class='add'>+	const struct idpf_netdev_priv *np = netdev_priv(dev);</div><div class='add'>+	const struct idpf_vport *vport = np-&gt;vport;</div><div class='add'>+	struct idpf_q_vector *q_vector;</div><div class='add'>+</div><div class='add'>+	if (unlikely(idpf_vport_ctrl_is_locked(dev)))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!vport-&gt;link_up))</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!vport-&gt;num_xdp_txq))</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	q_vector = idpf_find_rxq_vec(vport, qid);</div><div class='add'>+	if (unlikely(!q_vector-&gt;xsksq))</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	libeth_xsk_wakeup(&amp;q_vector-&gt;csd, qid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/idpf/xsk.h b/drivers/net/ethernet/intel/idpf/xsk.h<br/>new file mode 100644<br/>index 000000000000..b622d08c03e8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/idpf/xsk.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/idpf/xsk.h</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright (C) 2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#ifndef _IDPF_XSK_H_</div><div class='add'>+#define _IDPF_XSK_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+enum virtchnl2_queue_type;</div><div class='add'>+struct idpf_buf_queue;</div><div class='add'>+struct idpf_q_vector;</div><div class='add'>+struct idpf_rx_queue;</div><div class='add'>+struct idpf_tx_queue;</div><div class='add'>+struct idpf_vport;</div><div class='add'>+struct net_device;</div><div class='add'>+struct netdev_bpf;</div><div class='add'>+</div><div class='add'>+void idpf_xsk_setup_queue(const struct idpf_vport *vport, void *q,</div><div class='add'>+			  enum virtchnl2_queue_type type);</div><div class='add'>+void idpf_xsk_clear_queue(void *q, enum virtchnl2_queue_type type);</div><div class='add'>+void idpf_xsk_init_wakeup(struct idpf_q_vector *qv);</div><div class='add'>+</div><div class='add'>+int idpf_xskfq_init(struct idpf_buf_queue *bufq);</div><div class='add'>+void idpf_xskfq_rel(struct idpf_buf_queue *bufq);</div><div class='add'>+void idpf_xsksq_clean(struct idpf_tx_queue *xdpq);</div><div class='add'>+</div><div class='add'>+int idpf_xskrq_poll(struct idpf_rx_queue *rxq, u32 budget);</div><div class='add'>+bool idpf_xsk_xmit(struct idpf_tx_queue *xsksq);</div><div class='add'>+</div><div class='add'>+int idpf_xsk_pool_setup(struct idpf_vport *vport, struct netdev_bpf *xdp);</div><div class='add'>+int idpf_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags);</div><div class='add'>+</div><div class='add'>+#endif /* !_IDPF_XSK_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/Makefile b/drivers/net/ethernet/intel/igb/Makefile<br/>index 463c0d26b9d4..6c1b702fd992 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igb/Makefile</a></div><div class='hunk'>@@ -8,4 +8,4 @@ obj-$(CONFIG_IGB) += igb.o</div><div class='ctx'> </div><div class='ctx'> igb-y := igb_main.o igb_ethtool.o e1000_82575.o \</div><div class='ctx'> 	 e1000_mac.o e1000_nvm.o e1000_phy.o e1000_mbx.o \</div><div class='del'>-	 e1000_i210.o igb_ptp.o igb_hwmon.o</div><div class='add'>+	 e1000_i210.o igb_ptp.o igb_hwmon.o igb_xsk.o</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c<br/>index 64dfc362d1dc..44a85ad749a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/e1000_82575.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/e1000_82575.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/e1000_82575.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igb/e1000_82575.c</a></div><div class='hunk'>@@ -2372,7 +2372,7 @@ static s32 igb_validate_nvm_checksum_with_offset(struct e1000_hw *hw,</div><div class='ctx'> 		checksum += nvm_data;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (checksum != (u16) NVM_SUM) {</div><div class='add'>+	if (checksum != NVM_SUM) {</div><div class='ctx'> 		hw_dbg("NVM Checksum Invalid\n");</div><div class='ctx'> 		ret_val = -E1000_ERR_NVM;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -2406,7 +2406,7 @@ static s32 igb_update_nvm_checksum_with_offset(struct e1000_hw *hw, u16 offset)</div><div class='ctx'> 		}</div><div class='ctx'> 		checksum += nvm_data;</div><div class='ctx'> 	}</div><div class='del'>-	checksum = (u16) NVM_SUM - checksum;</div><div class='add'>+	checksum = NVM_SUM - checksum;</div><div class='ctx'> 	ret_val = hw-&gt;nvm.ops.write(hw, (NVM_CHECKSUM_REG + offset), 1,</div><div class='ctx'> 				&amp;checksum);</div><div class='ctx'> 	if (ret_val)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_i210.c b/drivers/net/ethernet/intel/igb/e1000_i210.c<br/>index 503b239868e8..9db29b231d6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/e1000_i210.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/e1000_i210.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/e1000_i210.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igb/e1000_i210.c</a></div><div class='hunk'>@@ -602,7 +602,7 @@ static s32 igb_update_nvm_checksum_i210(struct e1000_hw *hw)</div><div class='ctx'> 			}</div><div class='ctx'> 			checksum += nvm_data;</div><div class='ctx'> 		}</div><div class='del'>-		checksum = (u16) NVM_SUM - checksum;</div><div class='add'>+		checksum = NVM_SUM - checksum;</div><div class='ctx'> 		ret_val = igb_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,</div><div class='ctx'> 						&amp;checksum);</div><div class='ctx'> 		if (ret_val) {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/e1000_nvm.c b/drivers/net/ethernet/intel/igb/e1000_nvm.c<br/>index 2dcd64d6dec3..c8638502c2be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/e1000_nvm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/e1000_nvm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/e1000_nvm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igb/e1000_nvm.c</a></div><div class='hunk'>@@ -636,7 +636,7 @@ s32 igb_validate_nvm_checksum(struct e1000_hw *hw)</div><div class='ctx'> 		checksum += nvm_data;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (checksum != (u16) NVM_SUM) {</div><div class='add'>+	if (checksum != NVM_SUM) {</div><div class='ctx'> 		hw_dbg("NVM Checksum Invalid\n");</div><div class='ctx'> 		ret_val = -E1000_ERR_NVM;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -668,7 +668,7 @@ s32 igb_update_nvm_checksum(struct e1000_hw *hw)</div><div class='ctx'> 		}</div><div class='ctx'> 		checksum += nvm_data;</div><div class='ctx'> 	}</div><div class='del'>-	checksum = (u16) NVM_SUM - checksum;</div><div class='add'>+	checksum = NVM_SUM - checksum;</div><div class='ctx'> 	ret_val = hw-&gt;nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &amp;checksum);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		hw_dbg("NVM Write Error while updating checksum.\n");</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h<br/>index 3c2dc7bdebb5..0fff1df81b7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/igb.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/igb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/igb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igb/igb.h</a></div><div class='hunk'>@@ -18,8 +18,10 @@</div><div class='ctx'> #include &lt;linux/i2c-algo-bit.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/lockdep.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='add'>+#include &lt;net/xdp_sock_drv.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct igb_adapter;</div><div class='ctx'> </div><div class='hunk'>@@ -86,6 +88,7 @@ struct igb_adapter;</div><div class='ctx'> #define IGB_XDP_CONSUMED	BIT(0)</div><div class='ctx'> #define IGB_XDP_TX		BIT(1)</div><div class='ctx'> #define IGB_XDP_REDIR		BIT(2)</div><div class='add'>+#define IGB_XDP_EXIT		BIT(3)</div><div class='ctx'> </div><div class='ctx'> struct vf_data_storage {</div><div class='ctx'> 	unsigned char vf_mac_addresses[ETH_ALEN];</div><div class='hunk'>@@ -214,7 +217,7 @@ static inline int igb_skb_pad(void)</div><div class='ctx'> #define IGB_MASTER_SLAVE	e1000_ms_hw_default</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define IGB_MNG_VLAN_NONE	-1</div><div class='add'>+#define IGB_MNG_VLAN_NONE	0xFFFF</div><div class='ctx'> </div><div class='ctx'> enum igb_tx_flags {</div><div class='ctx'> 	/* cmd_type flags */</div><div class='hunk'>@@ -255,6 +258,7 @@ enum igb_tx_flags {</div><div class='ctx'> enum igb_tx_buf_type {</div><div class='ctx'> 	IGB_TYPE_SKB = 0,</div><div class='ctx'> 	IGB_TYPE_XDP,</div><div class='add'>+	IGB_TYPE_XSK</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* wrapper around a pointer to a socket buffer,</div><div class='hunk'>@@ -320,6 +324,7 @@ struct igb_ring {</div><div class='ctx'> 	union {				/* array of buffer info structs */</div><div class='ctx'> 		struct igb_tx_buffer *tx_buffer_info;</div><div class='ctx'> 		struct igb_rx_buffer *rx_buffer_info;</div><div class='add'>+		struct xdp_buff **rx_buffer_info_zc;</div><div class='ctx'> 	};</div><div class='ctx'> 	void *desc;			/* descriptor ring memory */</div><div class='ctx'> 	unsigned long flags;		/* ring specific flags */</div><div class='hunk'>@@ -357,6 +362,7 @@ struct igb_ring {</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='ctx'> 	struct xdp_rxq_info xdp_rxq;</div><div class='add'>+	struct xsk_buff_pool *xsk_pool;</div><div class='ctx'> } ____cacheline_internodealigned_in_smp;</div><div class='ctx'> </div><div class='ctx'> struct igb_q_vector {</div><div class='hunk'>@@ -384,7 +390,9 @@ enum e1000_ring_flags_t {</div><div class='ctx'> 	IGB_RING_FLAG_RX_SCTP_CSUM,</div><div class='ctx'> 	IGB_RING_FLAG_RX_LB_VLAN_BSWAP,</div><div class='ctx'> 	IGB_RING_FLAG_TX_CTX_IDX,</div><div class='del'>-	IGB_RING_FLAG_TX_DETECT_HANG</div><div class='add'>+	IGB_RING_FLAG_TX_DETECT_HANG,</div><div class='add'>+	IGB_RING_FLAG_TX_DISABLED,</div><div class='add'>+	IGB_RING_FLAG_RX_ALLOC_FAILED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define ring_uses_large_buffer(ring) \</div><div class='hunk'>@@ -618,7 +626,7 @@ struct igb_adapter {</div><div class='ctx'> 	struct delayed_work ptp_overflow_work;</div><div class='ctx'> 	struct work_struct ptp_tx_work;</div><div class='ctx'> 	struct sk_buff *ptp_tx_skb;</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> 	unsigned long ptp_tx_start;</div><div class='ctx'> 	unsigned long last_rx_ptp_check;</div><div class='ctx'> 	unsigned long last_rx_timestamp;</div><div class='hunk'>@@ -715,6 +723,8 @@ enum igb_boards {</div><div class='ctx'> </div><div class='ctx'> extern char igb_driver_name[];</div><div class='ctx'> </div><div class='add'>+void igb_set_queue_napi(struct igb_adapter *adapter, int q_idx,</div><div class='add'>+			struct napi_struct *napi);</div><div class='ctx'> int igb_xmit_xdp_ring(struct igb_adapter *adapter,</div><div class='ctx'> 		      struct igb_ring *ring,</div><div class='ctx'> 		      struct xdp_frame *xdpf);</div><div class='hunk'>@@ -731,12 +741,21 @@ int igb_setup_tx_resources(struct igb_ring *);</div><div class='ctx'> int igb_setup_rx_resources(struct igb_ring *);</div><div class='ctx'> void igb_free_tx_resources(struct igb_ring *);</div><div class='ctx'> void igb_free_rx_resources(struct igb_ring *);</div><div class='add'>+void igb_clean_tx_ring(struct igb_ring *tx_ring);</div><div class='add'>+void igb_clean_rx_ring(struct igb_ring *rx_ring);</div><div class='ctx'> void igb_configure_tx_ring(struct igb_adapter *, struct igb_ring *);</div><div class='ctx'> void igb_configure_rx_ring(struct igb_adapter *, struct igb_ring *);</div><div class='add'>+void igb_finalize_xdp(struct igb_adapter *adapter, unsigned int status);</div><div class='add'>+void igb_update_rx_stats(struct igb_q_vector *q_vector, unsigned int packets,</div><div class='add'>+			 unsigned int bytes);</div><div class='ctx'> void igb_setup_tctl(struct igb_adapter *);</div><div class='ctx'> void igb_setup_rctl(struct igb_adapter *);</div><div class='ctx'> void igb_setup_srrctl(struct igb_adapter *, struct igb_ring *);</div><div class='ctx'> netdev_tx_t igb_xmit_frame_ring(struct sk_buff *, struct igb_ring *);</div><div class='add'>+int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp);</div><div class='add'>+void igb_process_skb_fields(struct igb_ring *rx_ring,</div><div class='add'>+			    union e1000_adv_rx_desc *rx_desc,</div><div class='add'>+			    struct sk_buff *skb);</div><div class='ctx'> void igb_alloc_rx_buffers(struct igb_ring *, u16);</div><div class='ctx'> void igb_update_stats(struct igb_adapter *);</div><div class='ctx'> bool igb_has_link(struct igb_adapter *adapter);</div><div class='hunk'>@@ -752,8 +771,11 @@ void igb_ptp_tx_hang(struct igb_adapter *adapter);</div><div class='ctx'> void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector, struct sk_buff *skb);</div><div class='ctx'> int igb_ptp_rx_pktstamp(struct igb_q_vector *q_vector, void *va,</div><div class='ctx'> 			ktime_t *timestamp);</div><div class='del'>-int igb_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr);</div><div class='del'>-int igb_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr);</div><div class='add'>+int igb_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config);</div><div class='add'>+int igb_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config,</div><div class='add'>+			 struct netlink_ext_ack *extack);</div><div class='ctx'> void igb_set_flag_queue_pairs(struct igb_adapter *, const u32);</div><div class='ctx'> unsigned int igb_get_max_rss_queues(struct igb_adapter *);</div><div class='ctx'> #ifdef CONFIG_IGB_HWMON</div><div class='hunk'>@@ -797,6 +819,33 @@ static inline struct netdev_queue *txring_txq(const struct igb_ring *tx_ring)</div><div class='ctx'> 	return netdev_get_tx_queue(tx_ring-&gt;netdev, tx_ring-&gt;queue_index);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* This function assumes __netif_tx_lock is held by the caller. */</div><div class='add'>+static inline void igb_xdp_ring_update_tail(struct igb_ring *ring)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;txring_txq(ring)-&gt;_xmit_lock);</div><div class='add'>+</div><div class='add'>+	/* Force memory writes to complete before letting h/w know there</div><div class='add'>+	 * are new descriptors to fetch.</div><div class='add'>+	 */</div><div class='add'>+	wmb();</div><div class='add'>+	writel(ring-&gt;next_to_use, ring-&gt;tail);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct igb_ring *igb_xdp_tx_queue_mapping(struct igb_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	unsigned int r_idx = smp_processor_id();</div><div class='add'>+</div><div class='add'>+	if (r_idx &gt;= adapter-&gt;num_tx_queues)</div><div class='add'>+		r_idx = r_idx % adapter-&gt;num_tx_queues;</div><div class='add'>+</div><div class='add'>+	return adapter-&gt;tx_ring[r_idx];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool igb_xdp_is_enabled(struct igb_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return !!READ_ONCE(adapter-&gt;xdp_prog);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int igb_add_filter(struct igb_adapter *adapter,</div><div class='ctx'> 		   struct igb_nfc_filter *input);</div><div class='ctx'> int igb_erase_filter(struct igb_adapter *adapter,</div><div class='hunk'>@@ -807,4 +856,17 @@ int igb_add_mac_steering_filter(struct igb_adapter *adapter,</div><div class='ctx'> int igb_del_mac_steering_filter(struct igb_adapter *adapter,</div><div class='ctx'> 				const u8 *addr, u8 queue, u8 flags);</div><div class='ctx'> </div><div class='add'>+struct xsk_buff_pool *igb_xsk_pool(struct igb_adapter *adapter,</div><div class='add'>+				   struct igb_ring *ring);</div><div class='add'>+int igb_xsk_pool_setup(struct igb_adapter *adapter,</div><div class='add'>+		       struct xsk_buff_pool *pool,</div><div class='add'>+		       u16 qid);</div><div class='add'>+bool igb_alloc_rx_buffers_zc(struct igb_ring *rx_ring,</div><div class='add'>+			     struct xsk_buff_pool *xsk_pool, u16 count);</div><div class='add'>+void igb_clean_rx_ring_zc(struct igb_ring *rx_ring);</div><div class='add'>+int igb_clean_rx_irq_zc(struct igb_q_vector *q_vector,</div><div class='add'>+			struct xsk_buff_pool *xsk_pool, const int budget);</div><div class='add'>+bool igb_xmit_zc(struct igb_ring *tx_ring, struct xsk_buff_pool *xsk_pool);</div><div class='add'>+int igb_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags);</div><div class='add'>+</div><div class='ctx'> #endif /* _IGB_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/igb_ethtool.c b/drivers/net/ethernet/intel/igb/igb_ethtool.c<br/>index ca6ccbc13954..b507576b28b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/igb_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/igb_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/igb_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igb/igb_ethtool.c</a></div><div class='hunk'>@@ -920,11 +920,11 @@ static int igb_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;num_tx_queues &gt; adapter-&gt;num_rx_queues)</div><div class='del'>-		temp_ring = vmalloc(array_size(sizeof(struct igb_ring),</div><div class='del'>-					       adapter-&gt;num_tx_queues));</div><div class='add'>+		temp_ring = vmalloc_array(adapter-&gt;num_tx_queues,</div><div class='add'>+					  sizeof(struct igb_ring));</div><div class='ctx'> 	else</div><div class='del'>-		temp_ring = vmalloc(array_size(sizeof(struct igb_ring),</div><div class='del'>-					       adapter-&gt;num_rx_queues));</div><div class='add'>+		temp_ring = vmalloc_array(adapter-&gt;num_rx_queues,</div><div class='add'>+					  sizeof(struct igb_ring));</div><div class='ctx'> </div><div class='ctx'> 	if (!temp_ring) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -2081,11 +2081,8 @@ static void igb_diag_test(struct net_device *netdev,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev_info(&amp;adapter-&gt;pdev-&gt;dev, "online testing starting\n");</div><div class='ctx'> </div><div class='del'>-		/* PHY is powered down when interface is down */</div><div class='del'>-		if (if_running &amp;&amp; igb_link_test(adapter, &amp;data[TEST_LINK]))</div><div class='add'>+		if (igb_link_test(adapter, &amp;data[TEST_LINK]))</div><div class='ctx'> 			eth_test-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='del'>-		else</div><div class='del'>-			data[TEST_LINK] = 0;</div><div class='ctx'> </div><div class='ctx'> 		/* Online tests aren't run; pass by default */</div><div class='ctx'> 		data[TEST_REG] = 0;</div><div class='hunk'>@@ -2284,7 +2281,7 @@ static int igb_get_sset_count(struct net_device *netdev, int sset)</div><div class='ctx'> 	case ETH_SS_PRIV_FLAGS:</div><div class='ctx'> 		return IGB_PRIV_FLAGS_STR_LEN;</div><div class='ctx'> 	default:</div><div class='del'>-		return -ENOTSUPP;</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2500,9 +2497,11 @@ static int igb_get_ethtool_nfc_all(struct igb_adapter *adapter,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int igb_get_rss_hash_opts(struct igb_adapter *adapter,</div><div class='del'>-				 struct ethtool_rxnfc *cmd)</div><div class='add'>+static int igb_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+			       struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct igb_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	cmd-&gt;data = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Report default options for RSS on igb */</div><div class='hunk'>@@ -2542,6 +2541,13 @@ static int igb_get_rss_hash_opts(struct igb_adapter *adapter,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 igb_get_rx_ring_count(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct igb_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return adapter-&gt;num_rx_queues;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 			 u32 *rule_locs)</div><div class='ctx'> {</div><div class='hunk'>@@ -2549,10 +2555,6 @@ static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	int ret = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = adapter-&gt;num_rx_queues;</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		cmd-&gt;rule_cnt = adapter-&gt;nfc_filter_count;</div><div class='ctx'> 		ret = 0;</div><div class='hunk'>@@ -2563,9 +2565,6 @@ static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLALL:</div><div class='ctx'> 		ret = igb_get_ethtool_nfc_all(adapter, cmd, rule_locs);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ret = igb_get_rss_hash_opts(adapter, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2575,9 +2574,11 @@ static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> </div><div class='ctx'> #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \</div><div class='ctx'> 		       IGB_FLAG_RSS_FIELD_IPV6_UDP)</div><div class='del'>-static int igb_set_rss_hash_opt(struct igb_adapter *adapter,</div><div class='del'>-				struct ethtool_rxnfc *nfc)</div><div class='add'>+static int igb_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+			       const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct igb_adapter *adapter = netdev_priv(dev);</div><div class='ctx'> 	u32 flags = adapter-&gt;flags;</div><div class='ctx'> </div><div class='ctx'> 	/* RSS does not support anything other than hashing</div><div class='hunk'>@@ -3005,9 +3006,6 @@ static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	int ret = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = igb_set_rss_hash_opt(adapter, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		ret = igb_add_ethtool_nfc_entry(adapter, cmd);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -3478,6 +3476,7 @@ static const struct ethtool_ops igb_ethtool_ops = {</div><div class='ctx'> 	.get_ts_info		= igb_get_ts_info,</div><div class='ctx'> 	.get_rxnfc		= igb_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= igb_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= igb_get_rx_ring_count,</div><div class='ctx'> 	.get_eee		= igb_get_eee,</div><div class='ctx'> 	.set_eee		= igb_set_eee,</div><div class='ctx'> 	.get_module_info	= igb_get_module_info,</div><div class='hunk'>@@ -3485,6 +3484,8 @@ static const struct ethtool_ops igb_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size	= igb_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= igb_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= igb_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= igb_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= igb_set_rxfh_fields,</div><div class='ctx'> 	.get_channels		= igb_get_channels,</div><div class='ctx'> 	.set_channels		= igb_set_channels,</div><div class='ctx'> 	.get_priv_flags		= igb_get_priv_flags,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c<br/>index b83df5f94b1f..dbea37269d2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/igb_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/igb_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/igb_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igb/igb_main.c</a></div><div class='hunk'>@@ -33,7 +33,6 @@</div><div class='ctx'> #include &lt;linux/bpf_trace.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/lockdep.h&gt;</div><div class='ctx'> #ifdef CONFIG_IGB_DCA</div><div class='ctx'> #include &lt;linux/dca.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -116,8 +115,6 @@ static void igb_configure_tx(struct igb_adapter *);</div><div class='ctx'> static void igb_configure_rx(struct igb_adapter *);</div><div class='ctx'> static void igb_clean_all_tx_rings(struct igb_adapter *);</div><div class='ctx'> static void igb_clean_all_rx_rings(struct igb_adapter *);</div><div class='del'>-static void igb_clean_tx_ring(struct igb_ring *);</div><div class='del'>-static void igb_clean_rx_ring(struct igb_ring *);</div><div class='ctx'> static void igb_set_rx_mode(struct net_device *);</div><div class='ctx'> static void igb_update_phy_info(struct timer_list *);</div><div class='ctx'> static void igb_watchdog(struct timer_list *);</div><div class='hunk'>@@ -475,12 +472,17 @@ rx_ring_summary:</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; rx_ring-&gt;count; i++) {</div><div class='ctx'> 			const char *next_desc;</div><div class='del'>-			struct igb_rx_buffer *buffer_info;</div><div class='del'>-			buffer_info = &amp;rx_ring-&gt;rx_buffer_info[i];</div><div class='add'>+			dma_addr_t dma = (dma_addr_t)0;</div><div class='add'>+			struct igb_rx_buffer *buffer_info = NULL;</div><div class='ctx'> 			rx_desc = IGB_RX_DESC(rx_ring, i);</div><div class='ctx'> 			u0 = (struct my_u0 *)rx_desc;</div><div class='ctx'> 			staterr = le32_to_cpu(rx_desc-&gt;wb.upper.status_error);</div><div class='ctx'> </div><div class='add'>+			if (!rx_ring-&gt;xsk_pool) {</div><div class='add'>+				buffer_info = &amp;rx_ring-&gt;rx_buffer_info[i];</div><div class='add'>+				dma = buffer_info-&gt;dma;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			if (i == rx_ring-&gt;next_to_use)</div><div class='ctx'> 				next_desc = " NTU";</div><div class='ctx'> 			else if (i == rx_ring-&gt;next_to_clean)</div><div class='hunk'>@@ -500,11 +502,11 @@ rx_ring_summary:</div><div class='ctx'> 					"R  ", i,</div><div class='ctx'> 					le64_to_cpu(u0-&gt;a),</div><div class='ctx'> 					le64_to_cpu(u0-&gt;b),</div><div class='del'>-					(u64)buffer_info-&gt;dma,</div><div class='add'>+					(u64)dma,</div><div class='ctx'> 					next_desc);</div><div class='ctx'> </div><div class='ctx'> 				if (netif_msg_pktdata(adapter) &amp;&amp;</div><div class='del'>-				    buffer_info-&gt;dma &amp;&amp; buffer_info-&gt;page) {</div><div class='add'>+				    buffer_info &amp;&amp; dma &amp;&amp; buffer_info-&gt;page) {</div><div class='ctx'> 					print_hex_dump(KERN_INFO, "",</div><div class='ctx'> 					  DUMP_PREFIX_ADDRESS,</div><div class='ctx'> 					  16, 1,</div><div class='hunk'>@@ -637,6 +639,10 @@ static int __init igb_init_module(void)</div><div class='ctx'> 	dca_register_notify(&amp;dca_notifier);</div><div class='ctx'> #endif</div><div class='ctx'> 	ret = pci_register_driver(&amp;igb_driver);</div><div class='add'>+#ifdef CONFIG_IGB_DCA</div><div class='add'>+	if (ret)</div><div class='add'>+		dca_unregister_notify(&amp;dca_notifier);</div><div class='add'>+#endif</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -907,7 +913,7 @@ static int igb_request_msix(struct igb_adapter *adapter)</div><div class='ctx'> 	int i, err = 0, vector = 0, free_vector = 0;</div><div class='ctx'> </div><div class='ctx'> 	err = request_irq(adapter-&gt;msix_entries[vector].vector,</div><div class='del'>-			  igb_msix_other, IRQF_NO_THREAD, netdev-&gt;name, adapter);</div><div class='add'>+			  igb_msix_other, 0, netdev-&gt;name, adapter);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='hunk'>@@ -941,6 +947,9 @@ static int igb_request_msix(struct igb_adapter *adapter)</div><div class='ctx'> 				  q_vector);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_free;</div><div class='add'>+</div><div class='add'>+		netif_napi_set_irq(&amp;q_vector-&gt;napi,</div><div class='add'>+				   adapter-&gt;msix_entries[vector].vector);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	igb_configure_msix(adapter);</div><div class='hunk'>@@ -1188,7 +1197,8 @@ static int igb_alloc_q_vector(struct igb_adapter *adapter,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* initialize NAPI */</div><div class='del'>-	netif_napi_add(adapter-&gt;netdev, &amp;q_vector-&gt;napi, igb_poll);</div><div class='add'>+	netif_napi_add_config(adapter-&gt;netdev, &amp;q_vector-&gt;napi, igb_poll,</div><div class='add'>+			      v_idx);</div><div class='ctx'> </div><div class='ctx'> 	/* tie q_vector and adapter together */</div><div class='ctx'> 	adapter-&gt;q_vector[v_idx] = q_vector;</div><div class='hunk'>@@ -1204,7 +1214,7 @@ static int igb_alloc_q_vector(struct igb_adapter *adapter,</div><div class='ctx'> 	/* initialize pointer to rings */</div><div class='ctx'> 	ring = q_vector-&gt;ring;</div><div class='ctx'> </div><div class='del'>-	/* intialize ITR */</div><div class='add'>+	/* initialize ITR */</div><div class='ctx'> 	if (rxr_count) {</div><div class='ctx'> 		/* rx or rx/tx vector */</div><div class='ctx'> 		if (!adapter-&gt;rx_itr_setting || adapter-&gt;rx_itr_setting &gt; 3)</div><div class='hunk'>@@ -1521,8 +1531,7 @@ static void igb_update_mng_vlan(struct igb_adapter *adapter)</div><div class='ctx'> 		adapter-&gt;mng_vlan_id = IGB_MNG_VLAN_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &amp;&amp;</div><div class='del'>-	    (vid != old_vid) &amp;&amp;</div><div class='add'>+	if (old_vid != IGB_MNG_VLAN_NONE &amp;&amp; vid != old_vid &amp;&amp;</div><div class='ctx'> 	    !test_bit(old_vid, adapter-&gt;active_vlans)) {</div><div class='ctx'> 		/* remove VID from filter table */</div><div class='ctx'> 		igb_vfta_set(hw, vid, pf_id, false, true);</div><div class='hunk'>@@ -1986,7 +1995,11 @@ static void igb_configure(struct igb_adapter *adapter)</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++) {</div><div class='ctx'> 		struct igb_ring *ring = adapter-&gt;rx_ring[i];</div><div class='del'>-		igb_alloc_rx_buffers(ring, igb_desc_unused(ring));</div><div class='add'>+		if (ring-&gt;xsk_pool)</div><div class='add'>+			igb_alloc_rx_buffers_zc(ring, ring-&gt;xsk_pool,</div><div class='add'>+						igb_desc_unused(ring));</div><div class='add'>+		else</div><div class='add'>+			igb_alloc_rx_buffers(ring, igb_desc_unused(ring));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2086,6 +2099,22 @@ static void igb_check_swap_media(struct igb_adapter *adapter)</div><div class='ctx'> 	wr32(E1000_CTRL_EXT, ctrl_ext);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void igb_set_queue_napi(struct igb_adapter *adapter, int vector,</div><div class='add'>+			struct napi_struct *napi)</div><div class='add'>+{</div><div class='add'>+	struct igb_q_vector *q_vector = adapter-&gt;q_vector[vector];</div><div class='add'>+</div><div class='add'>+	if (q_vector-&gt;rx.ring)</div><div class='add'>+		netif_queue_set_napi(adapter-&gt;netdev,</div><div class='add'>+				     q_vector-&gt;rx.ring-&gt;queue_index,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_RX, napi);</div><div class='add'>+</div><div class='add'>+	if (q_vector-&gt;tx.ring)</div><div class='add'>+		netif_queue_set_napi(adapter-&gt;netdev,</div><div class='add'>+				     q_vector-&gt;tx.ring-&gt;queue_index,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_TX, napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *  igb_up - Open the interface and prepare it to handle traffic</div><div class='ctx'>  *  @adapter: board private structure</div><div class='hunk'>@@ -2093,6 +2122,7 @@ static void igb_check_swap_media(struct igb_adapter *adapter)</div><div class='ctx'> int igb_up(struct igb_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct napi_struct *napi;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* hardware has been reset, we need to reload some things */</div><div class='hunk'>@@ -2100,8 +2130,11 @@ int igb_up(struct igb_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(__IGB_DOWN, &amp;adapter-&gt;state);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++)</div><div class='del'>-		napi_enable(&amp;(adapter-&gt;q_vector[i]-&gt;napi));</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++) {</div><div class='add'>+		napi = &amp;adapter-&gt;q_vector[i]-&gt;napi;</div><div class='add'>+		napi_enable(napi);</div><div class='add'>+		igb_set_queue_napi(adapter, i, napi);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;flags &amp; IGB_FLAG_HAS_MSIX)</div><div class='ctx'> 		igb_configure_msix(adapter);</div><div class='hunk'>@@ -2171,12 +2204,13 @@ void igb_down(struct igb_adapter *adapter)</div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++) {</div><div class='ctx'> 		if (adapter-&gt;q_vector[i]) {</div><div class='ctx'> 			napi_synchronize(&amp;adapter-&gt;q_vector[i]-&gt;napi);</div><div class='add'>+			igb_set_queue_napi(adapter, i, NULL);</div><div class='ctx'> 			napi_disable(&amp;adapter-&gt;q_vector[i]-&gt;napi);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* record the stats before reset*/</div><div class='ctx'> 	spin_lock(&amp;adapter-&gt;stats64_lock);</div><div class='hunk'>@@ -2486,7 +2520,7 @@ static int igb_set_features(struct net_device *netdev,</div><div class='ctx'> static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			   struct net_device *dev,</div><div class='ctx'> 			   const unsigned char *addr, u16 vid,</div><div class='del'>-			   u16 flags,</div><div class='add'>+			   u16 flags, bool *notified,</div><div class='ctx'> 			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	/* guarantee we can provide a unique filter for the unicast address */</div><div class='hunk'>@@ -2907,37 +2941,20 @@ static int igb_xdp_setup(struct net_device *dev, struct netdev_bpf *bpf)</div><div class='ctx'> </div><div class='ctx'> static int igb_xdp(struct net_device *dev, struct netdev_bpf *xdp)</div><div class='ctx'> {</div><div class='add'>+	struct igb_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	switch (xdp-&gt;command) {</div><div class='ctx'> 	case XDP_SETUP_PROG:</div><div class='ctx'> 		return igb_xdp_setup(dev, xdp);</div><div class='add'>+	case XDP_SETUP_XSK_POOL:</div><div class='add'>+		return igb_xsk_pool_setup(adapter, xdp-&gt;xsk.pool,</div><div class='add'>+					  xdp-&gt;xsk.queue_id);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* This function assumes __netif_tx_lock is held by the caller. */</div><div class='del'>-static void igb_xdp_ring_update_tail(struct igb_ring *ring)</div><div class='del'>-{</div><div class='del'>-	lockdep_assert_held(&amp;txring_txq(ring)-&gt;_xmit_lock);</div><div class='del'>-</div><div class='del'>-	/* Force memory writes to complete before letting h/w know there</div><div class='del'>-	 * are new descriptors to fetch.</div><div class='del'>-	 */</div><div class='del'>-	wmb();</div><div class='del'>-	writel(ring-&gt;next_to_use, ring-&gt;tail);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct igb_ring *igb_xdp_tx_queue_mapping(struct igb_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	unsigned int r_idx = smp_processor_id();</div><div class='del'>-</div><div class='del'>-	if (r_idx &gt;= adapter-&gt;num_tx_queues)</div><div class='del'>-		r_idx = r_idx % adapter-&gt;num_tx_queues;</div><div class='del'>-</div><div class='del'>-	return adapter-&gt;tx_ring[r_idx];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp)</div><div class='add'>+int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp)</div><div class='ctx'> {</div><div class='ctx'> 	struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);</div><div class='ctx'> 	int cpu = smp_processor_id();</div><div class='hunk'>@@ -2951,7 +2968,8 @@ static int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp)</div><div class='ctx'> 	/* During program transitions its possible adapter-&gt;xdp_prog is assigned</div><div class='ctx'> 	 * but ring has not been configured yet. In this case simply abort xmit.</div><div class='ctx'> 	 */</div><div class='del'>-	tx_ring = adapter-&gt;xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;</div><div class='add'>+	tx_ring = igb_xdp_is_enabled(adapter) ?</div><div class='add'>+		igb_xdp_tx_queue_mapping(adapter) : NULL;</div><div class='ctx'> 	if (unlikely(!tx_ring))</div><div class='ctx'> 		return IGB_XDP_CONSUMED;</div><div class='ctx'> </div><div class='hunk'>@@ -2984,10 +3002,14 @@ static int igb_xdp_xmit(struct net_device *dev, int n,</div><div class='ctx'> 	/* During program transitions its possible adapter-&gt;xdp_prog is assigned</div><div class='ctx'> 	 * but ring has not been configured yet. In this case simply abort xmit.</div><div class='ctx'> 	 */</div><div class='del'>-	tx_ring = adapter-&gt;xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;</div><div class='add'>+	tx_ring = igb_xdp_is_enabled(adapter) ?</div><div class='add'>+		igb_xdp_tx_queue_mapping(adapter) : NULL;</div><div class='ctx'> 	if (unlikely(!tx_ring))</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='add'>+	if (unlikely(test_bit(IGB_RING_FLAG_TX_DISABLED, &amp;tx_ring-&gt;flags)))</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='ctx'> 	nq = txring_txq(tx_ring);</div><div class='ctx'> 	__netif_tx_lock(nq, cpu);</div><div class='ctx'> </div><div class='hunk'>@@ -3038,6 +3060,9 @@ static const struct net_device_ops igb_netdev_ops = {</div><div class='ctx'> 	.ndo_setup_tc		= igb_setup_tc,</div><div class='ctx'> 	.ndo_bpf		= igb_xdp,</div><div class='ctx'> 	.ndo_xdp_xmit		= igb_xdp_xmit,</div><div class='add'>+	.ndo_xsk_wakeup         = igb_xsk_wakeup,</div><div class='add'>+	.ndo_hwtstamp_get	= igb_ptp_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= igb_ptp_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3334,7 +3359,8 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	netdev-&gt;priv_flags |= IFF_SUPP_NOFCS;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='del'>-	netdev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT;</div><div class='add'>+	netdev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |</div><div class='add'>+			       NETDEV_XDP_ACT_XSK_ZEROCOPY;</div><div class='ctx'> </div><div class='ctx'> 	/* MTU range: 68 - 9216 */</div><div class='ctx'> 	netdev-&gt;min_mtu = ETH_MIN_MTU;</div><div class='hunk'>@@ -3860,8 +3886,8 @@ static void igb_remove(struct pci_dev *pdev)</div><div class='ctx'> 	 * disable watchdog from being rescheduled.</div><div class='ctx'> 	 */</div><div class='ctx'> 	set_bit(__IGB_DOWN, &amp;adapter-&gt;state);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='ctx'> </div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;watchdog_task);</div><div class='hunk'>@@ -3906,7 +3932,7 @@ static void igb_remove(struct pci_dev *pdev)</div><div class='ctx'>  *</div><div class='ctx'>  *  This function initializes the vf specific data storage and then attempts to</div><div class='ctx'>  *  allocate the VFs.  The reason for ordering it this way is because it is much</div><div class='del'>- *  mor expensive time wise to disable SR-IOV than it is to allocate and free</div><div class='add'>+ *  more expensive time wise to disable SR-IOV than it is to allocate and free</div><div class='ctx'>  *  the memory for the VFs.</div><div class='ctx'>  **/</div><div class='ctx'> static void igb_probe_vfs(struct igb_adapter *adapter)</div><div class='hunk'>@@ -4113,8 +4139,9 @@ static int igb_sw_init(struct igb_adapter *adapter)</div><div class='ctx'> static int __igb_open(struct net_device *netdev, bool resuming)</div><div class='ctx'> {</div><div class='ctx'> 	struct igb_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='add'>+	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct napi_struct *napi;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -4166,8 +4193,11 @@ static int __igb_open(struct net_device *netdev, bool resuming)</div><div class='ctx'> 	/* From here on the code is the same as igb_up() */</div><div class='ctx'> 	clear_bit(__IGB_DOWN, &amp;adapter-&gt;state);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++)</div><div class='del'>-		napi_enable(&amp;(adapter-&gt;q_vector[i]-&gt;napi));</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++) {</div><div class='add'>+		napi = &amp;adapter-&gt;q_vector[i]-&gt;napi;</div><div class='add'>+		napi_enable(napi);</div><div class='add'>+		igb_set_queue_napi(adapter, i, napi);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Clear any pending interrupts. */</div><div class='ctx'> 	rd32(E1000_TSICR);</div><div class='hunk'>@@ -4360,6 +4390,8 @@ void igb_configure_tx_ring(struct igb_adapter *adapter,</div><div class='ctx'> 	u64 tdba = ring-&gt;dma;</div><div class='ctx'> 	int reg_idx = ring-&gt;reg_idx;</div><div class='ctx'> </div><div class='add'>+	WRITE_ONCE(ring-&gt;xsk_pool, igb_xsk_pool(adapter, ring));</div><div class='add'>+</div><div class='ctx'> 	wr32(E1000_TDLEN(reg_idx),</div><div class='ctx'> 	     ring-&gt;count * sizeof(union e1000_adv_tx_desc));</div><div class='ctx'> 	wr32(E1000_TDBAL(reg_idx),</div><div class='hunk'>@@ -4716,12 +4748,17 @@ void igb_setup_srrctl(struct igb_adapter *adapter, struct igb_ring *ring)</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	int reg_idx = ring-&gt;reg_idx;</div><div class='ctx'> 	u32 srrctl = 0;</div><div class='add'>+	u32 buf_size;</div><div class='ctx'> </div><div class='del'>-	srrctl = IGB_RX_HDR_LEN &lt;&lt; E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;</div><div class='del'>-	if (ring_uses_large_buffer(ring))</div><div class='del'>-		srrctl |= IGB_RXBUFFER_3072 &gt;&gt; E1000_SRRCTL_BSIZEPKT_SHIFT;</div><div class='add'>+	if (ring-&gt;xsk_pool)</div><div class='add'>+		buf_size = xsk_pool_get_rx_frame_size(ring-&gt;xsk_pool);</div><div class='add'>+	else if (ring_uses_large_buffer(ring))</div><div class='add'>+		buf_size = IGB_RXBUFFER_3072;</div><div class='ctx'> 	else</div><div class='del'>-		srrctl |= IGB_RXBUFFER_2048 &gt;&gt; E1000_SRRCTL_BSIZEPKT_SHIFT;</div><div class='add'>+		buf_size = IGB_RXBUFFER_2048;</div><div class='add'>+</div><div class='add'>+	srrctl = IGB_RX_HDR_LEN &lt;&lt; E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;</div><div class='add'>+	srrctl |= buf_size &gt;&gt; E1000_SRRCTL_BSIZEPKT_SHIFT;</div><div class='ctx'> 	srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;</div><div class='ctx'> 	if (hw-&gt;mac.type &gt;= e1000_82580)</div><div class='ctx'> 		srrctl |= E1000_SRRCTL_TIMESTAMP;</div><div class='hunk'>@@ -4753,8 +4790,17 @@ void igb_configure_rx_ring(struct igb_adapter *adapter,</div><div class='ctx'> 	u32 rxdctl = 0;</div><div class='ctx'> </div><div class='ctx'> 	xdp_rxq_info_unreg_mem_model(&amp;ring-&gt;xdp_rxq);</div><div class='del'>-	WARN_ON(xdp_rxq_info_reg_mem_model(&amp;ring-&gt;xdp_rxq,</div><div class='del'>-					   MEM_TYPE_PAGE_SHARED, NULL));</div><div class='add'>+	WRITE_ONCE(ring-&gt;xsk_pool, igb_xsk_pool(adapter, ring));</div><div class='add'>+	if (ring-&gt;xsk_pool) {</div><div class='add'>+		WARN_ON(xdp_rxq_info_reg_mem_model(&amp;ring-&gt;xdp_rxq,</div><div class='add'>+						   MEM_TYPE_XSK_BUFF_POOL,</div><div class='add'>+						   NULL));</div><div class='add'>+		xsk_pool_set_rxq_info(ring-&gt;xsk_pool, &amp;ring-&gt;xdp_rxq);</div><div class='add'>+	} else {</div><div class='add'>+		WARN_ON(xdp_rxq_info_reg_mem_model(&amp;ring-&gt;xdp_rxq,</div><div class='add'>+						   MEM_TYPE_PAGE_SHARED,</div><div class='add'>+						   NULL));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* disable the queue */</div><div class='ctx'> 	wr32(E1000_RXDCTL(reg_idx), 0);</div><div class='hunk'>@@ -4781,9 +4827,12 @@ void igb_configure_rx_ring(struct igb_adapter *adapter,</div><div class='ctx'> 	rxdctl |= IGB_RX_HTHRESH &lt;&lt; 8;</div><div class='ctx'> 	rxdctl |= IGB_RX_WTHRESH &lt;&lt; 16;</div><div class='ctx'> </div><div class='del'>-	/* initialize rx_buffer_info */</div><div class='del'>-	memset(ring-&gt;rx_buffer_info, 0,</div><div class='del'>-	       sizeof(struct igb_rx_buffer) * ring-&gt;count);</div><div class='add'>+	if (ring-&gt;xsk_pool)</div><div class='add'>+		memset(ring-&gt;rx_buffer_info_zc, 0,</div><div class='add'>+		       sizeof(*ring-&gt;rx_buffer_info_zc) * ring-&gt;count);</div><div class='add'>+	else</div><div class='add'>+		memset(ring-&gt;rx_buffer_info, 0,</div><div class='add'>+		       sizeof(*ring-&gt;rx_buffer_info) * ring-&gt;count);</div><div class='ctx'> </div><div class='ctx'> 	/* initialize Rx descriptor 0 */</div><div class='ctx'> 	rx_desc = IGB_RX_DESC(ring, 0);</div><div class='hunk'>@@ -4884,19 +4933,24 @@ static void igb_free_all_tx_resources(struct igb_adapter *adapter)</div><div class='ctx'>  *  igb_clean_tx_ring - Free Tx Buffers</div><div class='ctx'>  *  @tx_ring: ring to be cleaned</div><div class='ctx'>  **/</div><div class='del'>-static void igb_clean_tx_ring(struct igb_ring *tx_ring)</div><div class='add'>+void igb_clean_tx_ring(struct igb_ring *tx_ring)</div><div class='ctx'> {</div><div class='ctx'> 	u16 i = tx_ring-&gt;next_to_clean;</div><div class='ctx'> 	struct igb_tx_buffer *tx_buffer = &amp;tx_ring-&gt;tx_buffer_info[i];</div><div class='add'>+	u32 xsk_frames = 0;</div><div class='ctx'> </div><div class='ctx'> 	while (i != tx_ring-&gt;next_to_use) {</div><div class='ctx'> 		union e1000_adv_tx_desc *eop_desc, *tx_desc;</div><div class='ctx'> </div><div class='ctx'> 		/* Free all the Tx ring sk_buffs or xdp frames */</div><div class='del'>-		if (tx_buffer-&gt;type == IGB_TYPE_SKB)</div><div class='add'>+		if (tx_buffer-&gt;type == IGB_TYPE_SKB) {</div><div class='ctx'> 			dev_kfree_skb_any(tx_buffer-&gt;skb);</div><div class='del'>-		else</div><div class='add'>+		} else if (tx_buffer-&gt;type == IGB_TYPE_XDP) {</div><div class='ctx'> 			xdp_return_frame(tx_buffer-&gt;xdpf);</div><div class='add'>+		} else if (tx_buffer-&gt;type == IGB_TYPE_XSK) {</div><div class='add'>+			xsk_frames++;</div><div class='add'>+			goto skip_for_xsk;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* unmap skb header data */</div><div class='ctx'> 		dma_unmap_single(tx_ring-&gt;dev,</div><div class='hunk'>@@ -4927,6 +4981,7 @@ static void igb_clean_tx_ring(struct igb_ring *tx_ring)</div><div class='ctx'> 					       DMA_TO_DEVICE);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+skip_for_xsk:</div><div class='ctx'> 		tx_buffer-&gt;next_to_watch = NULL;</div><div class='ctx'> </div><div class='ctx'> 		/* move us one more past the eop_desc for start of next pkt */</div><div class='hunk'>@@ -4941,6 +4996,9 @@ static void igb_clean_tx_ring(struct igb_ring *tx_ring)</div><div class='ctx'> 	/* reset BQL for queue */</div><div class='ctx'> 	netdev_tx_reset_queue(txring_txq(tx_ring));</div><div class='ctx'> </div><div class='add'>+	if (tx_ring-&gt;xsk_pool &amp;&amp; xsk_frames)</div><div class='add'>+		xsk_tx_completed(tx_ring-&gt;xsk_pool, xsk_frames);</div><div class='add'>+</div><div class='ctx'> 	/* reset next_to_use and next_to_clean */</div><div class='ctx'> 	tx_ring-&gt;next_to_use = 0;</div><div class='ctx'> 	tx_ring-&gt;next_to_clean = 0;</div><div class='hunk'>@@ -4971,8 +5029,13 @@ void igb_free_rx_resources(struct igb_ring *rx_ring)</div><div class='ctx'> </div><div class='ctx'> 	rx_ring-&gt;xdp_prog = NULL;</div><div class='ctx'> 	xdp_rxq_info_unreg(&amp;rx_ring-&gt;xdp_rxq);</div><div class='del'>-	vfree(rx_ring-&gt;rx_buffer_info);</div><div class='del'>-	rx_ring-&gt;rx_buffer_info = NULL;</div><div class='add'>+	if (rx_ring-&gt;xsk_pool) {</div><div class='add'>+		vfree(rx_ring-&gt;rx_buffer_info_zc);</div><div class='add'>+		rx_ring-&gt;rx_buffer_info_zc = NULL;</div><div class='add'>+	} else {</div><div class='add'>+		vfree(rx_ring-&gt;rx_buffer_info);</div><div class='add'>+		rx_ring-&gt;rx_buffer_info = NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* if not set, then don't free */</div><div class='ctx'> 	if (!rx_ring-&gt;desc)</div><div class='hunk'>@@ -5003,13 +5066,18 @@ static void igb_free_all_rx_resources(struct igb_adapter *adapter)</div><div class='ctx'>  *  igb_clean_rx_ring - Free Rx Buffers per Queue</div><div class='ctx'>  *  @rx_ring: ring to free buffers from</div><div class='ctx'>  **/</div><div class='del'>-static void igb_clean_rx_ring(struct igb_ring *rx_ring)</div><div class='add'>+void igb_clean_rx_ring(struct igb_ring *rx_ring)</div><div class='ctx'> {</div><div class='ctx'> 	u16 i = rx_ring-&gt;next_to_clean;</div><div class='ctx'> </div><div class='ctx'> 	dev_kfree_skb(rx_ring-&gt;skb);</div><div class='ctx'> 	rx_ring-&gt;skb = NULL;</div><div class='ctx'> </div><div class='add'>+	if (rx_ring-&gt;xsk_pool) {</div><div class='add'>+		igb_clean_rx_ring_zc(rx_ring);</div><div class='add'>+		goto skip_for_xsk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Free all the Rx ring sk_buffs */</div><div class='ctx'> 	while (i != rx_ring-&gt;next_to_alloc) {</div><div class='ctx'> 		struct igb_rx_buffer *buffer_info = &amp;rx_ring-&gt;rx_buffer_info[i];</div><div class='hunk'>@@ -5037,6 +5105,7 @@ static void igb_clean_rx_ring(struct igb_ring *rx_ring)</div><div class='ctx'> 			i = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+skip_for_xsk:</div><div class='ctx'> 	rx_ring-&gt;next_to_alloc = 0;</div><div class='ctx'> 	rx_ring-&gt;next_to_clean = 0;</div><div class='ctx'> 	rx_ring-&gt;next_to_use = 0;</div><div class='hunk'>@@ -5396,7 +5465,8 @@ static void igb_spoof_check(struct igb_adapter *adapter)</div><div class='ctx'>  */</div><div class='ctx'> static void igb_update_phy_info(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);</div><div class='add'>+	struct igb_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							 phy_info_timer);</div><div class='ctx'> 	igb_get_phy_info(&amp;adapter-&gt;hw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5486,7 +5556,8 @@ static void igb_check_lvmmc(struct igb_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> static void igb_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);</div><div class='add'>+	struct igb_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							 watchdog_timer);</div><div class='ctx'> 	/* Do the rest outside of interrupt context */</div><div class='ctx'> 	schedule_work(&amp;adapter-&gt;watchdog_task);</div><div class='ctx'> }</div><div class='hunk'>@@ -5686,11 +5757,29 @@ no_wait:</div><div class='ctx'> 	if (adapter-&gt;flags &amp; IGB_FLAG_HAS_MSIX) {</div><div class='ctx'> 		u32 eics = 0;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++)</div><div class='del'>-			eics |= adapter-&gt;q_vector[i]-&gt;eims_value;</div><div class='del'>-		wr32(E1000_EICS, eics);</div><div class='add'>+		for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++) {</div><div class='add'>+			struct igb_q_vector *q_vector = adapter-&gt;q_vector[i];</div><div class='add'>+			struct igb_ring *rx_ring;</div><div class='add'>+</div><div class='add'>+			if (!q_vector-&gt;rx.ring)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			rx_ring = adapter-&gt;rx_ring[q_vector-&gt;rx.ring-&gt;queue_index];</div><div class='add'>+</div><div class='add'>+			if (test_bit(IGB_RING_FLAG_RX_ALLOC_FAILED, &amp;rx_ring-&gt;flags)) {</div><div class='add'>+				eics |= q_vector-&gt;eims_value;</div><div class='add'>+				clear_bit(IGB_RING_FLAG_RX_ALLOC_FAILED, &amp;rx_ring-&gt;flags);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (eics)</div><div class='add'>+			wr32(E1000_EICS, eics);</div><div class='ctx'> 	} else {</div><div class='del'>-		wr32(E1000_ICS, E1000_ICS_RXDMT0);</div><div class='add'>+		struct igb_ring *rx_ring = adapter-&gt;rx_ring[0];</div><div class='add'>+</div><div class='add'>+		if (test_bit(IGB_RING_FLAG_RX_ALLOC_FAILED, &amp;rx_ring-&gt;flags)) {</div><div class='add'>+			clear_bit(IGB_RING_FLAG_RX_ALLOC_FAILED, &amp;rx_ring-&gt;flags);</div><div class='add'>+			wr32(E1000_ICS, E1000_ICS_RXDMT0);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	igb_spoof_check(adapter);</div><div class='hunk'>@@ -6463,6 +6552,9 @@ netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (unlikely(test_bit(IGB_RING_FLAG_TX_DISABLED, &amp;tx_ring-&gt;flags)))</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+</div><div class='ctx'> 	/* record the location of the first descriptor for this packet */</div><div class='ctx'> 	first = &amp;tx_ring-&gt;tx_buffer_info[tx_ring-&gt;next_to_use];</div><div class='ctx'> 	first-&gt;type = IGB_TYPE_SKB;</div><div class='hunk'>@@ -6618,7 +6710,7 @@ static int igb_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 	struct igb_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	int max_frame = new_mtu + IGB_ETH_PKT_HDR_PAD;</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;xdp_prog) {</div><div class='add'>+	if (igb_xdp_is_enabled(adapter)) {</div><div class='ctx'> 		int i;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++) {</div><div class='hunk'>@@ -8191,6 +8283,7 @@ static int igb_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	struct igb_q_vector *q_vector = container_of(napi,</div><div class='ctx'> 						     struct igb_q_vector,</div><div class='ctx'> 						     napi);</div><div class='add'>+	struct xsk_buff_pool *xsk_pool;</div><div class='ctx'> 	bool clean_complete = true;</div><div class='ctx'> 	int work_done = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -8202,7 +8295,12 @@ static int igb_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		clean_complete = igb_clean_tx_irq(q_vector, budget);</div><div class='ctx'> </div><div class='ctx'> 	if (q_vector-&gt;rx.ring) {</div><div class='del'>-		int cleaned = igb_clean_rx_irq(q_vector, budget);</div><div class='add'>+		int cleaned;</div><div class='add'>+</div><div class='add'>+		xsk_pool = READ_ONCE(q_vector-&gt;rx.ring-&gt;xsk_pool);</div><div class='add'>+		cleaned = xsk_pool ?</div><div class='add'>+			igb_clean_rx_irq_zc(q_vector, xsk_pool, budget) :</div><div class='add'>+			igb_clean_rx_irq(q_vector, budget);</div><div class='ctx'> </div><div class='ctx'> 		work_done += cleaned;</div><div class='ctx'> 		if (cleaned &gt;= budget)</div><div class='hunk'>@@ -8231,13 +8329,18 @@ static int igb_poll(struct napi_struct *napi, int budget)</div><div class='ctx'>  **/</div><div class='ctx'> static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)</div><div class='ctx'> {</div><div class='del'>-	struct igb_adapter *adapter = q_vector-&gt;adapter;</div><div class='del'>-	struct igb_ring *tx_ring = q_vector-&gt;tx.ring;</div><div class='del'>-	struct igb_tx_buffer *tx_buffer;</div><div class='del'>-	union e1000_adv_tx_desc *tx_desc;</div><div class='ctx'> 	unsigned int total_bytes = 0, total_packets = 0;</div><div class='add'>+	struct igb_adapter *adapter = q_vector-&gt;adapter;</div><div class='ctx'> 	unsigned int budget = q_vector-&gt;tx.work_limit;</div><div class='add'>+	struct igb_ring *tx_ring = q_vector-&gt;tx.ring;</div><div class='ctx'> 	unsigned int i = tx_ring-&gt;next_to_clean;</div><div class='add'>+	union e1000_adv_tx_desc *tx_desc;</div><div class='add'>+	struct igb_tx_buffer *tx_buffer;</div><div class='add'>+	struct xsk_buff_pool *xsk_pool;</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+	bool xsk_xmit_done = true;</div><div class='add'>+	struct netdev_queue *nq;</div><div class='add'>+	u32 xsk_frames = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(__IGB_DOWN, &amp;adapter-&gt;state))</div><div class='ctx'> 		return true;</div><div class='hunk'>@@ -8268,10 +8371,14 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)</div><div class='ctx'> 		total_packets += tx_buffer-&gt;gso_segs;</div><div class='ctx'> </div><div class='ctx'> 		/* free the skb */</div><div class='del'>-		if (tx_buffer-&gt;type == IGB_TYPE_SKB)</div><div class='add'>+		if (tx_buffer-&gt;type == IGB_TYPE_SKB) {</div><div class='ctx'> 			napi_consume_skb(tx_buffer-&gt;skb, napi_budget);</div><div class='del'>-		else</div><div class='add'>+		} else if (tx_buffer-&gt;type == IGB_TYPE_XDP) {</div><div class='ctx'> 			xdp_return_frame(tx_buffer-&gt;xdpf);</div><div class='add'>+		} else if (tx_buffer-&gt;type == IGB_TYPE_XSK) {</div><div class='add'>+			xsk_frames++;</div><div class='add'>+			goto skip_for_xsk;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* unmap skb header data */</div><div class='ctx'> 		dma_unmap_single(tx_ring-&gt;dev,</div><div class='hunk'>@@ -8303,6 +8410,7 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+skip_for_xsk:</div><div class='ctx'> 		/* move us one more past the eop_desc for start of next pkt */</div><div class='ctx'> 		tx_buffer++;</div><div class='ctx'> 		tx_desc++;</div><div class='hunk'>@@ -8331,6 +8439,21 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)</div><div class='ctx'> 	q_vector-&gt;tx.total_bytes += total_bytes;</div><div class='ctx'> 	q_vector-&gt;tx.total_packets += total_packets;</div><div class='ctx'> </div><div class='add'>+	xsk_pool = READ_ONCE(tx_ring-&gt;xsk_pool);</div><div class='add'>+	if (xsk_pool) {</div><div class='add'>+		if (xsk_frames)</div><div class='add'>+			xsk_tx_completed(xsk_pool, xsk_frames);</div><div class='add'>+		if (xsk_uses_need_wakeup(xsk_pool))</div><div class='add'>+			xsk_set_tx_need_wakeup(xsk_pool);</div><div class='add'>+</div><div class='add'>+		nq = txring_txq(tx_ring);</div><div class='add'>+		__netif_tx_lock(nq, cpu);</div><div class='add'>+		/* Avoid transmit queue timeout since we share it with the slow path */</div><div class='add'>+		txq_trans_cond_update(nq);</div><div class='add'>+		xsk_xmit_done = igb_xmit_zc(tx_ring, xsk_pool);</div><div class='add'>+		__netif_tx_unlock(nq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &amp;tx_ring-&gt;flags)) {</div><div class='ctx'> 		struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='hunk'>@@ -8393,7 +8516,7 @@ static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return !!budget;</div><div class='add'>+	return !!budget &amp;&amp; xsk_xmit_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -8584,9 +8707,8 @@ static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,</div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct sk_buff *igb_run_xdp(struct igb_adapter *adapter,</div><div class='del'>-				   struct igb_ring *rx_ring,</div><div class='del'>-				   struct xdp_buff *xdp)</div><div class='add'>+static int igb_run_xdp(struct igb_adapter *adapter, struct igb_ring *rx_ring,</div><div class='add'>+		       struct xdp_buff *xdp)</div><div class='ctx'> {</div><div class='ctx'> 	int err, result = IGB_XDP_PASS;</div><div class='ctx'> 	struct bpf_prog *xdp_prog;</div><div class='hunk'>@@ -8626,7 +8748,7 @@ out_failure:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> xdp_out:</div><div class='del'>-	return ERR_PTR(-result);</div><div class='add'>+	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int igb_rx_frame_truesize(struct igb_ring *rx_ring,</div><div class='hunk'>@@ -8752,10 +8874,6 @@ static bool igb_cleanup_headers(struct igb_ring *rx_ring,</div><div class='ctx'> 				union e1000_adv_rx_desc *rx_desc,</div><div class='ctx'> 				struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	/* XDP packets use error pointer so abort at this point */</div><div class='del'>-	if (IS_ERR(skb))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='ctx'> 	if (unlikely((igb_test_staterr(rx_desc,</div><div class='ctx'> 				       E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {</div><div class='ctx'> 		struct net_device *netdev = rx_ring-&gt;netdev;</div><div class='hunk'>@@ -8782,9 +8900,9 @@ static bool igb_cleanup_headers(struct igb_ring *rx_ring,</div><div class='ctx'>  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and</div><div class='ctx'>  *  other fields within the skb.</div><div class='ctx'>  **/</div><div class='del'>-static void igb_process_skb_fields(struct igb_ring *rx_ring,</div><div class='del'>-				   union e1000_adv_rx_desc *rx_desc,</div><div class='del'>-				   struct sk_buff *skb)</div><div class='add'>+void igb_process_skb_fields(struct igb_ring *rx_ring,</div><div class='add'>+			    union e1000_adv_rx_desc *rx_desc,</div><div class='add'>+			    struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = rx_ring-&gt;netdev;</div><div class='ctx'> </div><div class='hunk'>@@ -8866,6 +8984,38 @@ static void igb_put_rx_buffer(struct igb_ring *rx_ring,</div><div class='ctx'> 	rx_buffer-&gt;page = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void igb_finalize_xdp(struct igb_adapter *adapter, unsigned int status)</div><div class='add'>+{</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+	struct netdev_queue *nq;</div><div class='add'>+</div><div class='add'>+	if (status &amp; IGB_XDP_REDIR)</div><div class='add'>+		xdp_do_flush();</div><div class='add'>+</div><div class='add'>+	if (status &amp; IGB_XDP_TX) {</div><div class='add'>+		struct igb_ring *tx_ring = igb_xdp_tx_queue_mapping(adapter);</div><div class='add'>+</div><div class='add'>+		nq = txring_txq(tx_ring);</div><div class='add'>+		__netif_tx_lock(nq, cpu);</div><div class='add'>+		igb_xdp_ring_update_tail(tx_ring);</div><div class='add'>+		__netif_tx_unlock(nq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void igb_update_rx_stats(struct igb_q_vector *q_vector, unsigned int packets,</div><div class='add'>+			 unsigned int bytes)</div><div class='add'>+{</div><div class='add'>+	struct igb_ring *ring = q_vector-&gt;rx.ring;</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;ring-&gt;rx_syncp);</div><div class='add'>+	ring-&gt;rx_stats.packets += packets;</div><div class='add'>+	ring-&gt;rx_stats.bytes += bytes;</div><div class='add'>+	u64_stats_update_end(&amp;ring-&gt;rx_syncp);</div><div class='add'>+</div><div class='add'>+	q_vector-&gt;rx.total_packets += packets;</div><div class='add'>+	q_vector-&gt;rx.total_bytes += bytes;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int total_bytes = 0, total_packets = 0;</div><div class='hunk'>@@ -8873,12 +9023,11 @@ static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)</div><div class='ctx'> 	struct igb_ring *rx_ring = q_vector-&gt;rx.ring;</div><div class='ctx'> 	u16 cleaned_count = igb_desc_unused(rx_ring);</div><div class='ctx'> 	struct sk_buff *skb = rx_ring-&gt;skb;</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='ctx'> 	unsigned int xdp_xmit = 0;</div><div class='del'>-	struct netdev_queue *nq;</div><div class='ctx'> 	struct xdp_buff xdp;</div><div class='ctx'> 	u32 frame_sz = 0;</div><div class='ctx'> 	int rx_buf_pgcnt;</div><div class='add'>+	int xdp_res = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Frame size depend on rx_ring setup when PAGE_SIZE=4K */</div><div class='ctx'> #if (PAGE_SIZE &lt; 8192)</div><div class='hunk'>@@ -8936,12 +9085,10 @@ static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)</div><div class='ctx'> 			/* At larger PAGE_SIZE, frame_sz depend on len size */</div><div class='ctx'> 			xdp.frame_sz = igb_rx_frame_truesize(rx_ring, size);</div><div class='ctx'> #endif</div><div class='del'>-			skb = igb_run_xdp(adapter, rx_ring, &amp;xdp);</div><div class='add'>+			xdp_res = igb_run_xdp(adapter, rx_ring, &amp;xdp);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (IS_ERR(skb)) {</div><div class='del'>-			unsigned int xdp_res = -PTR_ERR(skb);</div><div class='del'>-</div><div class='add'>+		if (xdp_res) {</div><div class='ctx'> 			if (xdp_res &amp; (IGB_XDP_TX | IGB_XDP_REDIR)) {</div><div class='ctx'> 				xdp_xmit |= xdp_res;</div><div class='ctx'> 				igb_rx_buffer_flip(rx_ring, rx_buffer, size);</div><div class='hunk'>@@ -8960,9 +9107,10 @@ static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)</div><div class='ctx'> 						&amp;xdp, timestamp);</div><div class='ctx'> </div><div class='ctx'> 		/* exit if we failed to retrieve a buffer */</div><div class='del'>-		if (!skb) {</div><div class='add'>+		if (!xdp_res &amp;&amp; !skb) {</div><div class='ctx'> 			rx_ring-&gt;rx_stats.alloc_failed++;</div><div class='ctx'> 			rx_buffer-&gt;pagecnt_bias++;</div><div class='add'>+			set_bit(IGB_RING_FLAG_RX_ALLOC_FAILED, &amp;rx_ring-&gt;flags);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -8974,7 +9122,7 @@ static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* verify the packet layout is correct */</div><div class='del'>-		if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {</div><div class='add'>+		if (xdp_res || igb_cleanup_headers(rx_ring, rx_desc, skb)) {</div><div class='ctx'> 			skb = NULL;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -8997,24 +9145,10 @@ static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)</div><div class='ctx'> 	/* place incomplete frames back on ring for completion */</div><div class='ctx'> 	rx_ring-&gt;skb = skb;</div><div class='ctx'> </div><div class='del'>-	if (xdp_xmit &amp; IGB_XDP_REDIR)</div><div class='del'>-		xdp_do_flush();</div><div class='del'>-</div><div class='del'>-	if (xdp_xmit &amp; IGB_XDP_TX) {</div><div class='del'>-		struct igb_ring *tx_ring = igb_xdp_tx_queue_mapping(adapter);</div><div class='del'>-</div><div class='del'>-		nq = txring_txq(tx_ring);</div><div class='del'>-		__netif_tx_lock(nq, cpu);</div><div class='del'>-		igb_xdp_ring_update_tail(tx_ring);</div><div class='del'>-		__netif_tx_unlock(nq);</div><div class='del'>-	}</div><div class='add'>+	if (xdp_xmit)</div><div class='add'>+		igb_finalize_xdp(adapter, xdp_xmit);</div><div class='ctx'> </div><div class='del'>-	u64_stats_update_begin(&amp;rx_ring-&gt;rx_syncp);</div><div class='del'>-	rx_ring-&gt;rx_stats.packets += total_packets;</div><div class='del'>-	rx_ring-&gt;rx_stats.bytes += total_bytes;</div><div class='del'>-	u64_stats_update_end(&amp;rx_ring-&gt;rx_syncp);</div><div class='del'>-	q_vector-&gt;rx.total_packets += total_packets;</div><div class='del'>-	q_vector-&gt;rx.total_bytes += total_bytes;</div><div class='add'>+	igb_update_rx_stats(q_vector, total_packets, total_bytes);</div><div class='ctx'> </div><div class='ctx'> 	if (cleaned_count)</div><div class='ctx'> 		igb_alloc_rx_buffers(rx_ring, cleaned_count);</div><div class='hunk'>@@ -9036,6 +9170,7 @@ static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,</div><div class='ctx'> 	page = dev_alloc_pages(igb_rx_pg_order(rx_ring));</div><div class='ctx'> 	if (unlikely(!page)) {</div><div class='ctx'> 		rx_ring-&gt;rx_stats.alloc_failed++;</div><div class='add'>+		set_bit(IGB_RING_FLAG_RX_ALLOC_FAILED, &amp;rx_ring-&gt;flags);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -9052,6 +9187,7 @@ static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,</div><div class='ctx'> 		__free_pages(page, igb_rx_pg_order(rx_ring));</div><div class='ctx'> </div><div class='ctx'> 		rx_ring-&gt;rx_stats.alloc_failed++;</div><div class='add'>+		set_bit(IGB_RING_FLAG_RX_ALLOC_FAILED, &amp;rx_ring-&gt;flags);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -9181,10 +9317,6 @@ static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='ctx'> 	case SIOCGMIIREG:</div><div class='ctx'> 	case SIOCSMIIREG:</div><div class='ctx'> 		return igb_mii_ioctl(netdev, ifr, cmd);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return igb_ptp_get_ts_config(netdev, ifr);</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return igb_ptp_set_ts_config(netdev, ifr);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -9467,7 +9599,6 @@ static int __igb_resume(struct device *dev, bool rpm)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_power_state(pdev, PCI_D0);</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 	if (!pci_device_is_present(pdev))</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -9590,8 +9721,11 @@ static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,</div><div class='ctx'> 	if (state == pci_channel_io_perm_failure)</div><div class='ctx'> 		return PCI_ERS_RESULT_DISCONNECT;</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		igb_down(adapter);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Request a slot reset. */</div><div class='hunk'>@@ -9619,7 +9753,6 @@ static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pci_set_master(pdev);</div><div class='ctx'> 		pci_restore_state(pdev);</div><div class='del'>-		pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 		pci_enable_wake(pdev, PCI_D3hot, 0);</div><div class='ctx'> 		pci_enable_wake(pdev, PCI_D3cold, 0);</div><div class='hunk'>@@ -9650,16 +9783,21 @@ static void igb_io_resume(struct pci_dev *pdev)</div><div class='ctx'> 	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct igb_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='ctx'> 	if (netif_running(netdev)) {</div><div class='ctx'> 		if (!test_bit(__IGB_DOWN, &amp;adapter-&gt;state)) {</div><div class='ctx'> 			dev_dbg(&amp;pdev-&gt;dev, "Resuming from non-fatal error, do nothing.\n");</div><div class='add'>+			rtnl_unlock();</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		if (igb_up(adapter)) {</div><div class='ctx'> 			dev_err(&amp;pdev-&gt;dev, "igb_up failed after reset\n");</div><div class='add'>+			rtnl_unlock();</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	netif_device_attach(netdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c<br/>index f94570556120..bd85d02ecadd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/igb_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igb/igb_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/igb_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igb/igb_ptp.c</a></div><div class='hunk'>@@ -73,7 +73,7 @@ static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter);</div><div class='ctx'> static void igb_ptp_sdp_init(struct igb_adapter *adapter);</div><div class='ctx'> </div><div class='ctx'> /* SYSTIM read access for the 82576 */</div><div class='del'>-static u64 igb_ptp_read_82576(const struct cyclecounter *cc)</div><div class='add'>+static u64 igb_ptp_read_82576(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);</div><div class='ctx'> 	struct e1000_hw *hw = &amp;igb-&gt;hw;</div><div class='hunk'>@@ -90,7 +90,7 @@ static u64 igb_ptp_read_82576(const struct cyclecounter *cc)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* SYSTIM read access for the 82580 */</div><div class='del'>-static u64 igb_ptp_read_82580(const struct cyclecounter *cc)</div><div class='add'>+static u64 igb_ptp_read_82580(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);</div><div class='ctx'> 	struct e1000_hw *hw = &amp;igb-&gt;hw;</div><div class='hunk'>@@ -502,11 +502,10 @@ static int igb_ptp_feature_enable_82580(struct ptp_clock_info *ptp,</div><div class='ctx'> </div><div class='ctx'> 	switch (rq-&gt;type) {</div><div class='ctx'> 	case PTP_CLK_REQ_EXTTS:</div><div class='del'>-		/* Reject requests with unsupported flags */</div><div class='del'>-		if (rq-&gt;extts.flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-					PTP_RISING_EDGE |</div><div class='del'>-					PTP_FALLING_EDGE |</div><div class='del'>-					PTP_STRICT_FLAGS))</div><div class='add'>+		/* Both the rising and falling edge are timestamped */</div><div class='add'>+		if (rq-&gt;extts.flags &amp; PTP_STRICT_FLAGS &amp;&amp;</div><div class='add'>+		    (rq-&gt;extts.flags &amp; PTP_ENABLE_FEATURE) &amp;&amp;</div><div class='add'>+		    (rq-&gt;extts.flags &amp; PTP_EXTTS_EDGES) != PTP_EXTTS_EDGES)</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 		if (on) {</div><div class='hunk'>@@ -652,13 +651,6 @@ static int igb_ptp_feature_enable_i210(struct ptp_clock_info *ptp,</div><div class='ctx'> </div><div class='ctx'> 	switch (rq-&gt;type) {</div><div class='ctx'> 	case PTP_CLK_REQ_EXTTS:</div><div class='del'>-		/* Reject requests with unsupported flags */</div><div class='del'>-		if (rq-&gt;extts.flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-					PTP_RISING_EDGE |</div><div class='del'>-					PTP_FALLING_EDGE |</div><div class='del'>-					PTP_STRICT_FLAGS))</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 		/* Reject requests failing to enable both edges. */</div><div class='ctx'> 		if ((rq-&gt;extts.flags &amp; PTP_STRICT_FLAGS) &amp;&amp;</div><div class='ctx'> 		    (rq-&gt;extts.flags &amp; PTP_ENABLE_FEATURE) &amp;&amp;</div><div class='hunk'>@@ -848,14 +840,11 @@ static void igb_ptp_overflow_check(struct work_struct *work)</div><div class='ctx'> 	struct igb_adapter *igb =</div><div class='ctx'> 		container_of(work, struct igb_adapter, ptp_overflow_work.work);</div><div class='ctx'> 	struct timespec64 ts;</div><div class='del'>-	u64 ns;</div><div class='ctx'> </div><div class='ctx'> 	/* Update the timecounter */</div><div class='del'>-	ns = timecounter_read(&amp;igb-&gt;tc);</div><div class='add'>+	ts = ns_to_timespec64(timecounter_read(&amp;igb-&gt;tc));</div><div class='ctx'> </div><div class='del'>-	ts = ns_to_timespec64(ns);</div><div class='del'>-	pr_debug("igb overflow check at %lld.%09lu\n",</div><div class='del'>-		 (long long) ts.tv_sec, ts.tv_nsec);</div><div class='add'>+	pr_debug("igb overflow check at %ptSp\n", &amp;ts);</div><div class='ctx'> </div><div class='ctx'> 	schedule_delayed_work(&amp;igb-&gt;ptp_overflow_work,</div><div class='ctx'> 			      IGB_SYSTIM_OVERFLOW_PERIOD);</div><div class='hunk'>@@ -1102,21 +1091,22 @@ void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector, struct sk_buff *skb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * igb_ptp_get_ts_config - get hardware time stamping config</div><div class='add'>+ * igb_ptp_hwtstamp_get - get hardware time stamping config</div><div class='ctx'>  * @netdev: netdev struct</div><div class='del'>- * @ifr: interface struct</div><div class='add'>+ * @config: timestamping configuration structure</div><div class='ctx'>  *</div><div class='ctx'>  * Get the hwtstamp_config settings to return to the user. Rather than attempt</div><div class='ctx'>  * to deconstruct the settings from the registers, just return a shadow copy</div><div class='ctx'>  * of the last known settings.</div><div class='ctx'>  **/</div><div class='del'>-int igb_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+int igb_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct igb_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	struct hwtstamp_config *config = &amp;adapter-&gt;tstamp_config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, config, sizeof(*config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	*config = adapter-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1137,7 +1127,7 @@ int igb_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'>  * level 2 or 4".</div><div class='ctx'>  */</div><div class='ctx'> static int igb_ptp_set_timestamp_mode(struct igb_adapter *adapter,</div><div class='del'>-				      struct hwtstamp_config *config)</div><div class='add'>+				      struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;</div><div class='hunk'>@@ -1283,30 +1273,26 @@ static int igb_ptp_set_timestamp_mode(struct igb_adapter *adapter,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * igb_ptp_set_ts_config - set hardware time stamping config</div><div class='add'>+ * igb_ptp_hwtstamp_set - set hardware time stamping config</div><div class='ctx'>  * @netdev: netdev struct</div><div class='del'>- * @ifr: interface struct</div><div class='del'>- *</div><div class='add'>+ * @config: timestamping configuration structure</div><div class='add'>+ * @extack: netlink extended ack structure for error reporting</div><div class='ctx'>  **/</div><div class='del'>-int igb_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+int igb_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct igb_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	err = igb_ptp_set_timestamp_mode(adapter, &amp;config);</div><div class='add'>+	err = igb_ptp_set_timestamp_mode(adapter, config);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* save these settings for future reference */</div><div class='del'>-	memcpy(&amp;adapter-&gt;tstamp_config, &amp;config,</div><div class='del'>-	       sizeof(adapter-&gt;tstamp_config));</div><div class='add'>+	adapter-&gt;tstamp_config = *config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1350,6 +1336,9 @@ void igb_ptp_init(struct igb_adapter *adapter)</div><div class='ctx'> 		adapter-&gt;ptp_caps.n_per_out = IGB_N_PEROUT;</div><div class='ctx'> 		adapter-&gt;ptp_caps.n_pins = IGB_N_SDP;</div><div class='ctx'> 		adapter-&gt;ptp_caps.pps = 0;</div><div class='add'>+		adapter-&gt;ptp_caps.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+							  PTP_FALLING_EDGE |</div><div class='add'>+							  PTP_STRICT_FLAGS;</div><div class='ctx'> 		adapter-&gt;ptp_caps.pin_config = adapter-&gt;sdp_config;</div><div class='ctx'> 		adapter-&gt;ptp_caps.adjfine = igb_ptp_adjfine_82580;</div><div class='ctx'> 		adapter-&gt;ptp_caps.adjtime = igb_ptp_adjtime_82576;</div><div class='hunk'>@@ -1372,6 +1361,9 @@ void igb_ptp_init(struct igb_adapter *adapter)</div><div class='ctx'> 		adapter-&gt;ptp_caps.n_ext_ts = IGB_N_EXTTS;</div><div class='ctx'> 		adapter-&gt;ptp_caps.n_per_out = IGB_N_PEROUT;</div><div class='ctx'> 		adapter-&gt;ptp_caps.n_pins = IGB_N_SDP;</div><div class='add'>+		adapter-&gt;ptp_caps.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+							  PTP_FALLING_EDGE |</div><div class='add'>+							  PTP_STRICT_FLAGS;</div><div class='ctx'> 		adapter-&gt;ptp_caps.pps = 1;</div><div class='ctx'> 		adapter-&gt;ptp_caps.pin_config = adapter-&gt;sdp_config;</div><div class='ctx'> 		adapter-&gt;ptp_caps.adjfine = igb_ptp_adjfine_82580;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igb/igb_xsk.c b/drivers/net/ethernet/intel/igb/igb_xsk.c<br/>new file mode 100644<br/>index 000000000000..30ce5fbb5b77<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igb/igb_xsk.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igb/igb_xsk.c</a></div><div class='hunk'>@@ -0,0 +1,562 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2018 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+#include &lt;net/xdp_sock_drv.h&gt;</div><div class='add'>+#include &lt;net/xdp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "e1000_hw.h"</div><div class='add'>+#include "igb.h"</div><div class='add'>+</div><div class='add'>+static int igb_realloc_rx_buffer_info(struct igb_ring *ring, bool pool_present)</div><div class='add'>+{</div><div class='add'>+	int size = pool_present ?</div><div class='add'>+		sizeof(*ring-&gt;rx_buffer_info_zc) * ring-&gt;count :</div><div class='add'>+		sizeof(*ring-&gt;rx_buffer_info) * ring-&gt;count;</div><div class='add'>+	void *buff_info = vmalloc(size);</div><div class='add'>+</div><div class='add'>+	if (!buff_info)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (pool_present) {</div><div class='add'>+		vfree(ring-&gt;rx_buffer_info);</div><div class='add'>+		ring-&gt;rx_buffer_info = NULL;</div><div class='add'>+		ring-&gt;rx_buffer_info_zc = buff_info;</div><div class='add'>+	} else {</div><div class='add'>+		vfree(ring-&gt;rx_buffer_info_zc);</div><div class='add'>+		ring-&gt;rx_buffer_info_zc = NULL;</div><div class='add'>+		ring-&gt;rx_buffer_info = buff_info;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void igb_txrx_ring_disable(struct igb_adapter *adapter, u16 qid)</div><div class='add'>+{</div><div class='add'>+	struct igb_ring *tx_ring = adapter-&gt;tx_ring[qid];</div><div class='add'>+	struct igb_ring *rx_ring = adapter-&gt;rx_ring[qid];</div><div class='add'>+	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	set_bit(IGB_RING_FLAG_TX_DISABLED, &amp;tx_ring-&gt;flags);</div><div class='add'>+</div><div class='add'>+	wr32(E1000_TXDCTL(tx_ring-&gt;reg_idx), 0);</div><div class='add'>+	wr32(E1000_RXDCTL(rx_ring-&gt;reg_idx), 0);</div><div class='add'>+</div><div class='add'>+	synchronize_net();</div><div class='add'>+</div><div class='add'>+	/* Rx/Tx share the same napi context. */</div><div class='add'>+	napi_disable(&amp;rx_ring-&gt;q_vector-&gt;napi);</div><div class='add'>+</div><div class='add'>+	igb_clean_tx_ring(tx_ring);</div><div class='add'>+	igb_clean_rx_ring(rx_ring);</div><div class='add'>+</div><div class='add'>+	memset(&amp;rx_ring-&gt;rx_stats, 0, sizeof(rx_ring-&gt;rx_stats));</div><div class='add'>+	memset(&amp;tx_ring-&gt;tx_stats, 0, sizeof(tx_ring-&gt;tx_stats));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void igb_txrx_ring_enable(struct igb_adapter *adapter, u16 qid)</div><div class='add'>+{</div><div class='add'>+	struct igb_ring *tx_ring = adapter-&gt;tx_ring[qid];</div><div class='add'>+	struct igb_ring *rx_ring = adapter-&gt;rx_ring[qid];</div><div class='add'>+</div><div class='add'>+	igb_configure_tx_ring(adapter, tx_ring);</div><div class='add'>+	igb_configure_rx_ring(adapter, rx_ring);</div><div class='add'>+</div><div class='add'>+	synchronize_net();</div><div class='add'>+</div><div class='add'>+	clear_bit(IGB_RING_FLAG_TX_DISABLED, &amp;tx_ring-&gt;flags);</div><div class='add'>+</div><div class='add'>+	/* call igb_desc_unused which always leaves</div><div class='add'>+	 * at least 1 descriptor unused to make sure</div><div class='add'>+	 * next_to_use != next_to_clean</div><div class='add'>+	 */</div><div class='add'>+	if (rx_ring-&gt;xsk_pool)</div><div class='add'>+		igb_alloc_rx_buffers_zc(rx_ring, rx_ring-&gt;xsk_pool,</div><div class='add'>+					igb_desc_unused(rx_ring));</div><div class='add'>+	else</div><div class='add'>+		igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));</div><div class='add'>+</div><div class='add'>+	/* Rx/Tx share the same napi context. */</div><div class='add'>+	napi_enable(&amp;rx_ring-&gt;q_vector-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct xsk_buff_pool *igb_xsk_pool(struct igb_adapter *adapter,</div><div class='add'>+				   struct igb_ring *ring)</div><div class='add'>+{</div><div class='add'>+	int qid = ring-&gt;queue_index;</div><div class='add'>+	struct xsk_buff_pool *pool;</div><div class='add'>+</div><div class='add'>+	pool = xsk_get_pool_from_qid(adapter-&gt;netdev, qid);</div><div class='add'>+</div><div class='add'>+	if (!igb_xdp_is_enabled(adapter))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return (pool &amp;&amp; pool-&gt;dev) ? pool : NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int igb_xsk_pool_enable(struct igb_adapter *adapter,</div><div class='add'>+			       struct xsk_buff_pool *pool,</div><div class='add'>+			       u16 qid)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	struct igb_ring *rx_ring;</div><div class='add'>+	bool if_running;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (qid &gt;= adapter-&gt;num_rx_queues)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (qid &gt;= netdev-&gt;real_num_rx_queues ||</div><div class='add'>+	    qid &gt;= netdev-&gt;real_num_tx_queues)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = xsk_pool_dma_map(pool, &amp;adapter-&gt;pdev-&gt;dev, IGB_RX_DMA_ATTR);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	rx_ring = adapter-&gt;rx_ring[qid];</div><div class='add'>+	if_running = netif_running(adapter-&gt;netdev) &amp;&amp; igb_xdp_is_enabled(adapter);</div><div class='add'>+	if (if_running)</div><div class='add'>+		igb_txrx_ring_disable(adapter, qid);</div><div class='add'>+</div><div class='add'>+	if (if_running) {</div><div class='add'>+		err = igb_realloc_rx_buffer_info(rx_ring, true);</div><div class='add'>+		if (!err) {</div><div class='add'>+			igb_txrx_ring_enable(adapter, qid);</div><div class='add'>+			/* Kick start the NAPI context so that receiving will start */</div><div class='add'>+			err = igb_xsk_wakeup(adapter-&gt;netdev, qid, XDP_WAKEUP_RX);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (err) {</div><div class='add'>+			xsk_pool_dma_unmap(pool, IGB_RX_DMA_ATTR);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int igb_xsk_pool_disable(struct igb_adapter *adapter, u16 qid)</div><div class='add'>+{</div><div class='add'>+	struct xsk_buff_pool *pool;</div><div class='add'>+	struct igb_ring *rx_ring;</div><div class='add'>+	bool if_running;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pool = xsk_get_pool_from_qid(adapter-&gt;netdev, qid);</div><div class='add'>+	if (!pool)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rx_ring = adapter-&gt;rx_ring[qid];</div><div class='add'>+	if_running = netif_running(adapter-&gt;netdev) &amp;&amp; igb_xdp_is_enabled(adapter);</div><div class='add'>+	if (if_running)</div><div class='add'>+		igb_txrx_ring_disable(adapter, qid);</div><div class='add'>+</div><div class='add'>+	xsk_pool_dma_unmap(pool, IGB_RX_DMA_ATTR);</div><div class='add'>+</div><div class='add'>+	if (if_running) {</div><div class='add'>+		err = igb_realloc_rx_buffer_info(rx_ring, false);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		igb_txrx_ring_enable(adapter, qid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int igb_xsk_pool_setup(struct igb_adapter *adapter,</div><div class='add'>+		       struct xsk_buff_pool *pool,</div><div class='add'>+		       u16 qid)</div><div class='add'>+{</div><div class='add'>+	return pool ? igb_xsk_pool_enable(adapter, pool, qid) :</div><div class='add'>+		igb_xsk_pool_disable(adapter, qid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 igb_fill_rx_descs(struct xsk_buff_pool *pool, struct xdp_buff **xdp,</div><div class='add'>+			     union e1000_adv_rx_desc *rx_desc, u16 count)</div><div class='add'>+{</div><div class='add'>+	dma_addr_t dma;</div><div class='add'>+	u16 buffs;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* nothing to do */</div><div class='add'>+	if (!count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	buffs = xsk_buff_alloc_batch(pool, xdp, count);</div><div class='add'>+	for (i = 0; i &lt; buffs; i++) {</div><div class='add'>+		dma = xsk_buff_xdp_get_dma(*xdp);</div><div class='add'>+		rx_desc-&gt;read.pkt_addr = cpu_to_le64(dma);</div><div class='add'>+		rx_desc-&gt;wb.upper.length = 0;</div><div class='add'>+</div><div class='add'>+		rx_desc++;</div><div class='add'>+		xdp++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return buffs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool igb_alloc_rx_buffers_zc(struct igb_ring *rx_ring,</div><div class='add'>+			     struct xsk_buff_pool *xsk_pool, u16 count)</div><div class='add'>+{</div><div class='add'>+	u32 nb_buffs_extra = 0, nb_buffs = 0;</div><div class='add'>+	union e1000_adv_rx_desc *rx_desc;</div><div class='add'>+	u16 ntu = rx_ring-&gt;next_to_use;</div><div class='add'>+	u16 total_count = count;</div><div class='add'>+	struct xdp_buff **xdp;</div><div class='add'>+</div><div class='add'>+	rx_desc = IGB_RX_DESC(rx_ring, ntu);</div><div class='add'>+	xdp = &amp;rx_ring-&gt;rx_buffer_info_zc[ntu];</div><div class='add'>+</div><div class='add'>+	if (ntu + count &gt;= rx_ring-&gt;count) {</div><div class='add'>+		nb_buffs_extra = igb_fill_rx_descs(xsk_pool, xdp, rx_desc,</div><div class='add'>+						   rx_ring-&gt;count - ntu);</div><div class='add'>+		if (nb_buffs_extra != rx_ring-&gt;count - ntu) {</div><div class='add'>+			ntu += nb_buffs_extra;</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+		rx_desc = IGB_RX_DESC(rx_ring, 0);</div><div class='add'>+		xdp = rx_ring-&gt;rx_buffer_info_zc;</div><div class='add'>+		ntu = 0;</div><div class='add'>+		count -= nb_buffs_extra;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nb_buffs = igb_fill_rx_descs(xsk_pool, xdp, rx_desc, count);</div><div class='add'>+	ntu += nb_buffs;</div><div class='add'>+	if (ntu == rx_ring-&gt;count)</div><div class='add'>+		ntu = 0;</div><div class='add'>+</div><div class='add'>+	/* clear the length for the next_to_use descriptor */</div><div class='add'>+	rx_desc = IGB_RX_DESC(rx_ring, ntu);</div><div class='add'>+	rx_desc-&gt;wb.upper.length = 0;</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	if (rx_ring-&gt;next_to_use != ntu) {</div><div class='add'>+		rx_ring-&gt;next_to_use = ntu;</div><div class='add'>+</div><div class='add'>+		/* Force memory writes to complete before letting h/w</div><div class='add'>+		 * know there are new descriptors to fetch.  (Only</div><div class='add'>+		 * applicable for weak-ordered memory model archs,</div><div class='add'>+		 * such as IA-64).</div><div class='add'>+		 */</div><div class='add'>+		wmb();</div><div class='add'>+		writel(ntu, rx_ring-&gt;tail);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return total_count == (nb_buffs + nb_buffs_extra);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void igb_clean_rx_ring_zc(struct igb_ring *rx_ring)</div><div class='add'>+{</div><div class='add'>+	u16 ntc = rx_ring-&gt;next_to_clean;</div><div class='add'>+	u16 ntu = rx_ring-&gt;next_to_use;</div><div class='add'>+</div><div class='add'>+	while (ntc != ntu) {</div><div class='add'>+		struct xdp_buff *xdp = rx_ring-&gt;rx_buffer_info_zc[ntc];</div><div class='add'>+</div><div class='add'>+		xsk_buff_free(xdp);</div><div class='add'>+		ntc++;</div><div class='add'>+		if (ntc &gt;= rx_ring-&gt;count)</div><div class='add'>+			ntc = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *igb_construct_skb_zc(struct igb_ring *rx_ring,</div><div class='add'>+					    struct xdp_buff *xdp,</div><div class='add'>+					    ktime_t timestamp)</div><div class='add'>+{</div><div class='add'>+	unsigned int totalsize = xdp-&gt;data_end - xdp-&gt;data_meta;</div><div class='add'>+	unsigned int metasize = xdp-&gt;data - xdp-&gt;data_meta;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	net_prefetch(xdp-&gt;data_meta);</div><div class='add'>+</div><div class='add'>+	/* allocate a skb to store the frags */</div><div class='add'>+	skb = napi_alloc_skb(&amp;rx_ring-&gt;q_vector-&gt;napi, totalsize);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (timestamp)</div><div class='add'>+		skb_hwtstamps(skb)-&gt;hwtstamp = timestamp;</div><div class='add'>+</div><div class='add'>+	memcpy(__skb_put(skb, totalsize), xdp-&gt;data_meta,</div><div class='add'>+	       ALIGN(totalsize, sizeof(long)));</div><div class='add'>+</div><div class='add'>+	if (metasize) {</div><div class='add'>+		skb_metadata_set(skb, metasize);</div><div class='add'>+		__skb_pull(skb, metasize);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int igb_run_xdp_zc(struct igb_adapter *adapter, struct igb_ring *rx_ring,</div><div class='add'>+			  struct xdp_buff *xdp, struct xsk_buff_pool *xsk_pool,</div><div class='add'>+			  struct bpf_prog *xdp_prog)</div><div class='add'>+{</div><div class='add'>+	int err, result = IGB_XDP_PASS;</div><div class='add'>+	u32 act;</div><div class='add'>+</div><div class='add'>+	prefetchw(xdp-&gt;data_hard_start); /* xdp_frame write */</div><div class='add'>+</div><div class='add'>+	act = bpf_prog_run_xdp(xdp_prog, xdp);</div><div class='add'>+</div><div class='add'>+	if (likely(act == XDP_REDIRECT)) {</div><div class='add'>+		err = xdp_do_redirect(adapter-&gt;netdev, xdp, xdp_prog);</div><div class='add'>+		if (!err)</div><div class='add'>+			return IGB_XDP_REDIR;</div><div class='add'>+</div><div class='add'>+		if (xsk_uses_need_wakeup(xsk_pool) &amp;&amp;</div><div class='add'>+		    err == -ENOBUFS)</div><div class='add'>+			result = IGB_XDP_EXIT;</div><div class='add'>+		else</div><div class='add'>+			result = IGB_XDP_CONSUMED;</div><div class='add'>+		goto out_failure;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (act) {</div><div class='add'>+	case XDP_PASS:</div><div class='add'>+		break;</div><div class='add'>+	case XDP_TX:</div><div class='add'>+		result = igb_xdp_xmit_back(adapter, xdp);</div><div class='add'>+		if (result == IGB_XDP_CONSUMED)</div><div class='add'>+			goto out_failure;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		bpf_warn_invalid_xdp_action(adapter-&gt;netdev, xdp_prog, act);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case XDP_ABORTED:</div><div class='add'>+out_failure:</div><div class='add'>+		trace_xdp_exception(rx_ring-&gt;netdev, xdp_prog, act);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case XDP_DROP:</div><div class='add'>+		result = IGB_XDP_CONSUMED;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int igb_clean_rx_irq_zc(struct igb_q_vector *q_vector,</div><div class='add'>+			struct xsk_buff_pool *xsk_pool, const int budget)</div><div class='add'>+{</div><div class='add'>+	struct igb_adapter *adapter = q_vector-&gt;adapter;</div><div class='add'>+	unsigned int total_bytes = 0, total_packets = 0;</div><div class='add'>+	struct igb_ring *rx_ring = q_vector-&gt;rx.ring;</div><div class='add'>+	u32 ntc = rx_ring-&gt;next_to_clean;</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='add'>+	unsigned int xdp_xmit = 0;</div><div class='add'>+	bool failure = false;</div><div class='add'>+	u16 entries_to_alloc;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	/* xdp_prog cannot be NULL in the ZC path */</div><div class='add'>+	xdp_prog = READ_ONCE(rx_ring-&gt;xdp_prog);</div><div class='add'>+</div><div class='add'>+	while (likely(total_packets &lt; budget)) {</div><div class='add'>+		union e1000_adv_rx_desc *rx_desc;</div><div class='add'>+		ktime_t timestamp = 0;</div><div class='add'>+		struct xdp_buff *xdp;</div><div class='add'>+		unsigned int size;</div><div class='add'>+		int xdp_res = 0;</div><div class='add'>+</div><div class='add'>+		rx_desc = IGB_RX_DESC(rx_ring, ntc);</div><div class='add'>+		size = le16_to_cpu(rx_desc-&gt;wb.upper.length);</div><div class='add'>+		if (!size)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* This memory barrier is needed to keep us from reading</div><div class='add'>+		 * any other fields out of the rx_desc until we know the</div><div class='add'>+		 * descriptor has been written back</div><div class='add'>+		 */</div><div class='add'>+		dma_rmb();</div><div class='add'>+</div><div class='add'>+		xdp = rx_ring-&gt;rx_buffer_info_zc[ntc];</div><div class='add'>+		xsk_buff_set_size(xdp, size);</div><div class='add'>+		xsk_buff_dma_sync_for_cpu(xdp);</div><div class='add'>+</div><div class='add'>+		/* pull rx packet timestamp if available and valid */</div><div class='add'>+		if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {</div><div class='add'>+			int ts_hdr_len;</div><div class='add'>+</div><div class='add'>+			ts_hdr_len = igb_ptp_rx_pktstamp(rx_ring-&gt;q_vector,</div><div class='add'>+							 xdp-&gt;data,</div><div class='add'>+							 &amp;timestamp);</div><div class='add'>+</div><div class='add'>+			xdp-&gt;data += ts_hdr_len;</div><div class='add'>+			xdp-&gt;data_meta += ts_hdr_len;</div><div class='add'>+			size -= ts_hdr_len;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		xdp_res = igb_run_xdp_zc(adapter, rx_ring, xdp, xsk_pool,</div><div class='add'>+					 xdp_prog);</div><div class='add'>+</div><div class='add'>+		if (xdp_res) {</div><div class='add'>+			if (likely(xdp_res &amp; (IGB_XDP_TX | IGB_XDP_REDIR))) {</div><div class='add'>+				xdp_xmit |= xdp_res;</div><div class='add'>+			} else if (xdp_res == IGB_XDP_EXIT) {</div><div class='add'>+				failure = true;</div><div class='add'>+				break;</div><div class='add'>+			} else if (xdp_res == IGB_XDP_CONSUMED) {</div><div class='add'>+				xsk_buff_free(xdp);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			total_packets++;</div><div class='add'>+			total_bytes += size;</div><div class='add'>+			ntc++;</div><div class='add'>+			if (ntc == rx_ring-&gt;count)</div><div class='add'>+				ntc = 0;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		skb = igb_construct_skb_zc(rx_ring, xdp, timestamp);</div><div class='add'>+</div><div class='add'>+		/* exit if we failed to retrieve a buffer */</div><div class='add'>+		if (!skb) {</div><div class='add'>+			rx_ring-&gt;rx_stats.alloc_failed++;</div><div class='add'>+			set_bit(IGB_RING_FLAG_RX_ALLOC_FAILED, &amp;rx_ring-&gt;flags);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		xsk_buff_free(xdp);</div><div class='add'>+		ntc++;</div><div class='add'>+		if (ntc == rx_ring-&gt;count)</div><div class='add'>+			ntc = 0;</div><div class='add'>+</div><div class='add'>+		if (eth_skb_pad(skb))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* probably a little skewed due to removing CRC */</div><div class='add'>+		total_bytes += skb-&gt;len;</div><div class='add'>+</div><div class='add'>+		/* populate checksum, timestamp, VLAN, and protocol */</div><div class='add'>+		igb_process_skb_fields(rx_ring, rx_desc, skb);</div><div class='add'>+</div><div class='add'>+		napi_gro_receive(&amp;q_vector-&gt;napi, skb);</div><div class='add'>+</div><div class='add'>+		/* update budget accounting */</div><div class='add'>+		total_packets++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;next_to_clean = ntc;</div><div class='add'>+</div><div class='add'>+	if (xdp_xmit)</div><div class='add'>+		igb_finalize_xdp(adapter, xdp_xmit);</div><div class='add'>+</div><div class='add'>+	igb_update_rx_stats(q_vector, total_packets, total_bytes);</div><div class='add'>+</div><div class='add'>+	entries_to_alloc = igb_desc_unused(rx_ring);</div><div class='add'>+	if (entries_to_alloc &gt;= IGB_RX_BUFFER_WRITE)</div><div class='add'>+		failure |= !igb_alloc_rx_buffers_zc(rx_ring, xsk_pool,</div><div class='add'>+						    entries_to_alloc);</div><div class='add'>+</div><div class='add'>+	if (xsk_uses_need_wakeup(xsk_pool)) {</div><div class='add'>+		if (failure || rx_ring-&gt;next_to_clean == rx_ring-&gt;next_to_use)</div><div class='add'>+			xsk_set_rx_need_wakeup(xsk_pool);</div><div class='add'>+		else</div><div class='add'>+			xsk_clear_rx_need_wakeup(xsk_pool);</div><div class='add'>+</div><div class='add'>+		return (int)total_packets;</div><div class='add'>+	}</div><div class='add'>+	return failure ? budget : (int)total_packets;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool igb_xmit_zc(struct igb_ring *tx_ring, struct xsk_buff_pool *xsk_pool)</div><div class='add'>+{</div><div class='add'>+	unsigned int budget = igb_desc_unused(tx_ring);</div><div class='add'>+	u32 cmd_type, olinfo_status, nb_pkts, i = 0;</div><div class='add'>+	struct xdp_desc *descs = xsk_pool-&gt;tx_descs;</div><div class='add'>+	union e1000_adv_tx_desc *tx_desc = NULL;</div><div class='add'>+	struct igb_tx_buffer *tx_buffer_info;</div><div class='add'>+	unsigned int total_bytes = 0;</div><div class='add'>+	dma_addr_t dma;</div><div class='add'>+</div><div class='add'>+	if (!netif_carrier_ok(tx_ring-&gt;netdev))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (test_bit(IGB_RING_FLAG_TX_DISABLED, &amp;tx_ring-&gt;flags))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	nb_pkts = xsk_tx_peek_release_desc_batch(xsk_pool, budget);</div><div class='add'>+	if (!nb_pkts)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	for (; i &lt; nb_pkts; i++) {</div><div class='add'>+		dma = xsk_buff_raw_get_dma(xsk_pool, descs[i].addr);</div><div class='add'>+		xsk_buff_raw_dma_sync_for_device(xsk_pool, dma, descs[i].len);</div><div class='add'>+</div><div class='add'>+		tx_buffer_info = &amp;tx_ring-&gt;tx_buffer_info[tx_ring-&gt;next_to_use];</div><div class='add'>+		tx_buffer_info-&gt;bytecount = descs[i].len;</div><div class='add'>+		tx_buffer_info-&gt;type = IGB_TYPE_XSK;</div><div class='add'>+		tx_buffer_info-&gt;xdpf = NULL;</div><div class='add'>+		tx_buffer_info-&gt;gso_segs = 1;</div><div class='add'>+		tx_buffer_info-&gt;time_stamp = jiffies;</div><div class='add'>+</div><div class='add'>+		tx_desc = IGB_TX_DESC(tx_ring, tx_ring-&gt;next_to_use);</div><div class='add'>+		tx_desc-&gt;read.buffer_addr = cpu_to_le64(dma);</div><div class='add'>+</div><div class='add'>+		/* put descriptor type bits */</div><div class='add'>+		cmd_type = E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_DEXT |</div><div class='add'>+			   E1000_ADVTXD_DCMD_IFCS;</div><div class='add'>+		olinfo_status = descs[i].len &lt;&lt; E1000_ADVTXD_PAYLEN_SHIFT;</div><div class='add'>+</div><div class='add'>+		/* FIXME: This sets the Report Status (RS) bit for every</div><div class='add'>+		 * descriptor. One nice to have optimization would be to set it</div><div class='add'>+		 * only for the last descriptor in the whole batch. See Intel</div><div class='add'>+		 * ice driver for an example on how to do it.</div><div class='add'>+		 */</div><div class='add'>+		cmd_type |= descs[i].len | IGB_TXD_DCMD;</div><div class='add'>+		tx_desc-&gt;read.cmd_type_len = cpu_to_le32(cmd_type);</div><div class='add'>+		tx_desc-&gt;read.olinfo_status = cpu_to_le32(olinfo_status);</div><div class='add'>+</div><div class='add'>+		total_bytes += descs[i].len;</div><div class='add'>+</div><div class='add'>+		tx_ring-&gt;next_to_use++;</div><div class='add'>+		tx_buffer_info-&gt;next_to_watch = tx_desc;</div><div class='add'>+		if (tx_ring-&gt;next_to_use == tx_ring-&gt;count)</div><div class='add'>+			tx_ring-&gt;next_to_use = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_tx_sent_queue(txring_txq(tx_ring), total_bytes);</div><div class='add'>+	igb_xdp_ring_update_tail(tx_ring);</div><div class='add'>+</div><div class='add'>+	return nb_pkts &lt; budget;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int igb_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct igb_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct igb_ring *ring;</div><div class='add'>+	u32 eics = 0;</div><div class='add'>+</div><div class='add'>+	if (test_bit(__IGB_DOWN, &amp;adapter-&gt;state))</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	if (!igb_xdp_is_enabled(adapter))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (qid &gt;= adapter-&gt;num_tx_queues)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ring = adapter-&gt;tx_ring[qid];</div><div class='add'>+</div><div class='add'>+	if (test_bit(IGB_RING_FLAG_TX_DISABLED, &amp;ring-&gt;flags))</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	if (!READ_ONCE(ring-&gt;xsk_pool))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!napi_if_scheduled_mark_missed(&amp;ring-&gt;q_vector-&gt;napi)) {</div><div class='add'>+		/* Cause software interrupt */</div><div class='add'>+		if (adapter-&gt;flags &amp; IGB_FLAG_HAS_MSIX) {</div><div class='add'>+			eics |= ring-&gt;q_vector-&gt;eims_value;</div><div class='add'>+			wr32(E1000_EICS, eics);</div><div class='add'>+		} else {</div><div class='add'>+			wr32(E1000_ICS, E1000_ICS_RXDMT0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igbvf/ethtool.c b/drivers/net/ethernet/intel/igbvf/ethtool.c<br/>index 83b97989a6bd..9c08ebfad804 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igbvf/ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igbvf/ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igbvf/ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igbvf/ethtool.c</a></div><div class='hunk'>@@ -30,10 +30,12 @@ static const struct igbvf_stats igbvf_gstrings_stats[] = {</div><div class='ctx'> 	{ "rx_bytes", IGBVF_STAT(stats.gorc, stats.base_gorc) },</div><div class='ctx'> 	{ "tx_bytes", IGBVF_STAT(stats.gotc, stats.base_gotc) },</div><div class='ctx'> 	{ "multicast", IGBVF_STAT(stats.mprc, stats.base_mprc) },</div><div class='del'>-	{ "lbrx_bytes", IGBVF_STAT(stats.gorlbc, stats.base_gorlbc) },</div><div class='ctx'> 	{ "lbrx_packets", IGBVF_STAT(stats.gprlbc, stats.base_gprlbc) },</div><div class='add'>+	{ "lbtx_packets", IGBVF_STAT(stats.gptlbc, stats.base_gptlbc) },</div><div class='add'>+	{ "lbrx_bytes", IGBVF_STAT(stats.gorlbc, stats.base_gorlbc) },</div><div class='add'>+	{ "lbtx_bytes", IGBVF_STAT(stats.gotlbc, stats.base_gotlbc) },</div><div class='ctx'> 	{ "tx_restart_queue", IGBVF_STAT(restart_queue, zero_base) },</div><div class='del'>-	{ "rx_long_byte_count", IGBVF_STAT(stats.gorc, stats.base_gorc) },</div><div class='add'>+	{ "tx_timeout_count", IGBVF_STAT(tx_timeout_count, zero_base) },</div><div class='ctx'> 	{ "rx_csum_offload_good", IGBVF_STAT(hw_csum_good, zero_base) },</div><div class='ctx'> 	{ "rx_csum_offload_errors", IGBVF_STAT(hw_csum_err, zero_base) },</div><div class='ctx'> 	{ "rx_header_split", IGBVF_STAT(rx_hdr_split, zero_base) },</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igbvf/igbvf.h b/drivers/net/ethernet/intel/igbvf/igbvf.h<br/>index 6ad35a00a287..da8e1fd47301 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igbvf/igbvf.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igbvf/igbvf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igbvf/igbvf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igbvf/igbvf.h</a></div><div class='hunk'>@@ -154,7 +154,6 @@ struct igbvf_ring {</div><div class='ctx'> /* board specific private data structure */</div><div class='ctx'> struct igbvf_adapter {</div><div class='ctx'> 	struct timer_list watchdog_timer;</div><div class='del'>-	struct timer_list blink_timer;</div><div class='ctx'> </div><div class='ctx'> 	struct work_struct reset_task;</div><div class='ctx'> 	struct work_struct watchdog_task;</div><div class='hunk'>@@ -162,15 +161,10 @@ struct igbvf_adapter {</div><div class='ctx'> 	const struct igbvf_info *ei;</div><div class='ctx'> </div><div class='ctx'> 	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];</div><div class='del'>-	u32 bd_number;</div><div class='ctx'> 	u32 rx_buffer_len;</div><div class='del'>-	u32 polling_interval;</div><div class='del'>-	u16 mng_vlan_id;</div><div class='ctx'> 	u16 link_speed;</div><div class='ctx'> 	u16 link_duplex;</div><div class='ctx'> </div><div class='del'>-	spinlock_t tx_queue_lock; /* prevent concurrent tail updates */</div><div class='del'>-</div><div class='ctx'> 	/* track device up/down/testing state */</div><div class='ctx'> 	unsigned long state;</div><div class='ctx'> </div><div class='hunk'>@@ -185,9 +179,6 @@ struct igbvf_adapter {</div><div class='ctx'> 	unsigned int restart_queue;</div><div class='ctx'> 	u32 txd_cmd;</div><div class='ctx'> </div><div class='del'>-	u32 tx_int_delay;</div><div class='del'>-	u32 tx_abs_int_delay;</div><div class='del'>-</div><div class='ctx'> 	unsigned int total_tx_bytes;</div><div class='ctx'> 	unsigned int total_tx_packets;</div><div class='ctx'> 	unsigned int total_rx_bytes;</div><div class='hunk'>@@ -195,23 +186,15 @@ struct igbvf_adapter {</div><div class='ctx'> </div><div class='ctx'> 	/* Tx stats */</div><div class='ctx'> 	u32 tx_timeout_count;</div><div class='del'>-	u32 tx_fifo_head;</div><div class='del'>-	u32 tx_head_addr;</div><div class='del'>-	u32 tx_fifo_size;</div><div class='del'>-	u32 tx_dma_failed;</div><div class='ctx'> </div><div class='ctx'> 	/* Rx */</div><div class='ctx'> 	struct igbvf_ring *rx_ring;</div><div class='ctx'> </div><div class='del'>-	u32 rx_int_delay;</div><div class='del'>-	u32 rx_abs_int_delay;</div><div class='del'>-</div><div class='ctx'> 	/* Rx stats */</div><div class='ctx'> 	u64 hw_csum_err;</div><div class='ctx'> 	u64 hw_csum_good;</div><div class='ctx'> 	u64 rx_hdr_split;</div><div class='ctx'> 	u32 alloc_rx_buff_failed;</div><div class='del'>-	u32 rx_dma_failed;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int rx_ps_hdr_size;</div><div class='ctx'> 	u32 max_frame_size;</div><div class='hunk'>@@ -220,7 +203,6 @@ struct igbvf_adapter {</div><div class='ctx'> 	/* OS defined structs */</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='del'>-	spinlock_t stats_lock; /* prevent concurrent stats updates */</div><div class='ctx'> </div><div class='ctx'> 	/* structs defined in e1000_hw.h */</div><div class='ctx'> 	struct e1000_hw hw;</div><div class='hunk'>@@ -232,26 +214,14 @@ struct igbvf_adapter {</div><div class='ctx'> 	struct e1000_vf_stats stats;</div><div class='ctx'> 	u64 zero_base;</div><div class='ctx'> </div><div class='del'>-	struct igbvf_ring test_tx_ring;</div><div class='del'>-	struct igbvf_ring test_rx_ring;</div><div class='del'>-	u32 test_icr;</div><div class='del'>-</div><div class='ctx'> 	u32 msg_enable;</div><div class='ctx'> 	struct msix_entry *msix_entries;</div><div class='del'>-	int int_mode;</div><div class='ctx'> 	u32 eims_enable_mask;</div><div class='ctx'> 	u32 eims_other;</div><div class='del'>-	u32 int_counter0;</div><div class='del'>-	u32 int_counter1;</div><div class='ctx'> </div><div class='del'>-	u32 eeprom_wol;</div><div class='ctx'> 	u32 wol;</div><div class='ctx'> 	u32 pba;</div><div class='ctx'> </div><div class='del'>-	bool fc_autoneg;</div><div class='del'>-</div><div class='del'>-	unsigned long led_status;</div><div class='del'>-</div><div class='ctx'> 	unsigned int flags;</div><div class='ctx'> 	unsigned long last_reset;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igbvf/netdev.c b/drivers/net/ethernet/intel/igbvf/netdev.c<br/>index 925d7286a8ee..ac57212ab02b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igbvf/netdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igbvf/netdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igbvf/netdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igbvf/netdev.c</a></div><div class='hunk'>@@ -855,8 +855,6 @@ static irqreturn_t igbvf_msix_other(int irq, void *data)</div><div class='ctx'> 	struct igbvf_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct e1000_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;int_counter1++;</div><div class='del'>-</div><div class='ctx'> 	hw-&gt;mac.get_link_status = 1;</div><div class='ctx'> 	if (!test_bit(__IGBVF_DOWN, &amp;adapter-&gt;state))</div><div class='ctx'> 		mod_timer(&amp;adapter-&gt;watchdog_timer, jiffies + 1);</div><div class='hunk'>@@ -899,8 +897,6 @@ static irqreturn_t igbvf_intr_msix_rx(int irq, void *data)</div><div class='ctx'> 	struct net_device *netdev = data;</div><div class='ctx'> 	struct igbvf_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;int_counter0++;</div><div class='del'>-</div><div class='ctx'> 	/* Write the ITR value calculated at the end of the</div><div class='ctx'> 	 * previous interrupt.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1239,7 +1235,7 @@ static int igbvf_vlan_rx_add_vid(struct net_device *netdev,</div><div class='ctx'> 	spin_lock_bh(&amp;hw-&gt;mbx_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (hw-&gt;mac.ops.set_vfta(hw, vid, true)) {</div><div class='del'>-		dev_warn(&amp;adapter-&gt;pdev-&gt;dev, "Vlan id %d\n is not added", vid);</div><div class='add'>+		dev_warn(&amp;adapter-&gt;pdev-&gt;dev, "Vlan id %d is not added\n", vid);</div><div class='ctx'> 		spin_unlock_bh(&amp;hw-&gt;mbx_lock);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1592,7 +1588,7 @@ void igbvf_down(struct igbvf_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	igbvf_irq_disable(adapter);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* record the stats before reset*/</div><div class='ctx'> 	igbvf_update_stats(adapter);</div><div class='hunk'>@@ -1633,10 +1629,6 @@ static int igbvf_sw_init(struct igbvf_adapter *adapter)</div><div class='ctx'> 	adapter-&gt;max_frame_size = netdev-&gt;mtu + ETH_HLEN + ETH_FCS_LEN;</div><div class='ctx'> 	adapter-&gt;min_frame_size = ETH_ZLEN + ETH_FCS_LEN;</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;tx_int_delay = 8;</div><div class='del'>-	adapter-&gt;tx_abs_int_delay = 32;</div><div class='del'>-	adapter-&gt;rx_int_delay = 0;</div><div class='del'>-	adapter-&gt;rx_abs_int_delay = 8;</div><div class='ctx'> 	adapter-&gt;requested_itr = 3;</div><div class='ctx'> 	adapter-&gt;current_itr = IGBVF_START_ITR;</div><div class='ctx'> </div><div class='hunk'>@@ -1656,12 +1648,9 @@ static int igbvf_sw_init(struct igbvf_adapter *adapter)</div><div class='ctx'> 	if (igbvf_alloc_queues(adapter))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;adapter-&gt;tx_queue_lock);</div><div class='del'>-</div><div class='ctx'> 	/* Explicitly disable IRQ since the NIC can be in any state. */</div><div class='ctx'> 	igbvf_irq_disable(adapter);</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;adapter-&gt;stats_lock);</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;hw.mbx_lock);</div><div class='ctx'> </div><div class='ctx'> 	set_bit(__IGBVF_DOWN, &amp;adapter-&gt;state);</div><div class='hunk'>@@ -1903,7 +1892,8 @@ static bool igbvf_has_link(struct igbvf_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> static void igbvf_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct igbvf_adapter *adapter = from_timer(adapter, t, watchdog_timer);</div><div class='add'>+	struct igbvf_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							   watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Do the rest outside of interrupt context */</div><div class='ctx'> 	schedule_work(&amp;adapter-&gt;watchdog_task);</div><div class='hunk'>@@ -2714,7 +2704,6 @@ static int igbvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	struct igbvf_adapter *adapter;</div><div class='ctx'> 	struct e1000_hw *hw;</div><div class='ctx'> 	const struct igbvf_info *ei = igbvf_info_tbl[ent-&gt;driver_data];</div><div class='del'>-	static int cards_found;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = pci_enable_device_mem(pdev);</div><div class='hunk'>@@ -2786,8 +2775,6 @@ static int igbvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	netdev-&gt;watchdog_timeo = 5 * HZ;</div><div class='ctx'> 	strscpy(netdev-&gt;name, pci_name(pdev), sizeof(netdev-&gt;name));</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;bd_number = cards_found++;</div><div class='del'>-</div><div class='ctx'> 	netdev-&gt;hw_features = NETIF_F_SG |</div><div class='ctx'> 			      NETIF_F_TSO |</div><div class='ctx'> 			      NETIF_F_TSO6 |</div><div class='hunk'>@@ -2915,7 +2902,7 @@ static void igbvf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	 * disable it from being rescheduled.</div><div class='ctx'> 	 */</div><div class='ctx'> 	set_bit(__IGBVF_DOWN, &amp;adapter-&gt;state);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;watchdog_task);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h<br/>index eac0f966e0e4..a427f05814c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc.h</a></div><div class='hunk'>@@ -40,6 +40,12 @@ void igc_ethtool_set_ops(struct net_device *);</div><div class='ctx'> </div><div class='ctx'> #define IGC_MAX_TX_TSTAMP_REGS		4</div><div class='ctx'> </div><div class='add'>+struct igc_fpe_t {</div><div class='add'>+	struct ethtool_mmsv mmsv;</div><div class='add'>+	u32 tx_min_frag_size;</div><div class='add'>+	bool tx_enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum igc_mac_filter_type {</div><div class='ctx'> 	IGC_MAC_FILTER_TYPE_DST = 0,</div><div class='ctx'> 	IGC_MAC_FILTER_TYPE_SRC</div><div class='hunk'>@@ -158,6 +164,7 @@ struct igc_ring {</div><div class='ctx'> 	bool launchtime_enable;         /* true if LaunchTime is enabled */</div><div class='ctx'> 	ktime_t last_tx_cycle;          /* end of the cycle with a launchtime transmission */</div><div class='ctx'> 	ktime_t last_ff_cycle;          /* Last cycle with an active first flag */</div><div class='add'>+	bool preemptible;		/* True if preemptible queue, false if express queue */</div><div class='ctx'> </div><div class='ctx'> 	u32 start_time;</div><div class='ctx'> 	u32 end_time;</div><div class='hunk'>@@ -308,7 +315,7 @@ struct igc_adapter {</div><div class='ctx'> 	 */</div><div class='ctx'> 	spinlock_t ptp_tx_lock;</div><div class='ctx'> 	struct igc_tx_timestamp_request tx_tstamp[IGC_MAX_TX_TSTAMP_REGS];</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> 	unsigned int ptp_flags;</div><div class='ctx'> 	/* System time value lock */</div><div class='ctx'> 	spinlock_t tmreg_lock;</div><div class='hunk'>@@ -319,6 +326,7 @@ struct igc_adapter {</div><div class='ctx'> 	struct timespec64 prev_ptp_time; /* Pre-reset PTP clock */</div><div class='ctx'> 	ktime_t ptp_reset_start; /* Reset time in clock mono */</div><div class='ctx'> 	struct system_time_snapshot snapshot;</div><div class='add'>+	struct mutex ptm_lock; /* Only allow one PTM transaction at a time */</div><div class='ctx'> </div><div class='ctx'> 	char fw_version[32];</div><div class='ctx'> </div><div class='hunk'>@@ -332,9 +340,12 @@ struct igc_adapter {</div><div class='ctx'> 		struct timespec64 period;</div><div class='ctx'> 	} perout[IGC_N_PEROUT];</div><div class='ctx'> </div><div class='add'>+	struct igc_fpe_t fpe;</div><div class='add'>+</div><div class='ctx'> 	/* LEDs */</div><div class='ctx'> 	struct mutex led_mutex;</div><div class='ctx'> 	struct igc_led_classdev *leds;</div><div class='add'>+	bool leds_available;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void igc_up(struct igc_adapter *adapter);</div><div class='hunk'>@@ -386,19 +397,16 @@ extern char igc_driver_name[];</div><div class='ctx'> #define IGC_FLAG_RX_LEGACY		BIT(16)</div><div class='ctx'> #define IGC_FLAG_TSN_QBV_ENABLED	BIT(17)</div><div class='ctx'> #define IGC_FLAG_TSN_QAV_ENABLED	BIT(18)</div><div class='del'>-#define IGC_FLAG_TSN_LEGACY_ENABLED	BIT(19)</div><div class='add'>+#define IGC_FLAG_TSN_PREEMPT_ENABLED	BIT(19)</div><div class='add'>+#define IGC_FLAG_TSN_REVERSE_TXQ_PRIO	BIT(20)</div><div class='ctx'> </div><div class='ctx'> #define IGC_FLAG_TSN_ANY_ENABLED				\</div><div class='ctx'> 	(IGC_FLAG_TSN_QBV_ENABLED | IGC_FLAG_TSN_QAV_ENABLED |	\</div><div class='del'>-	 IGC_FLAG_TSN_LEGACY_ENABLED)</div><div class='add'>+	 IGC_FLAG_TSN_PREEMPT_ENABLED)</div><div class='ctx'> </div><div class='ctx'> #define IGC_FLAG_RSS_FIELD_IPV4_UDP	BIT(6)</div><div class='ctx'> #define IGC_FLAG_RSS_FIELD_IPV6_UDP	BIT(7)</div><div class='ctx'> </div><div class='del'>-#define IGC_MRQC_ENABLE_RSS_MQ		0x00000002</div><div class='del'>-#define IGC_MRQC_RSS_FIELD_IPV4_UDP	0x00400000</div><div class='del'>-#define IGC_MRQC_RSS_FIELD_IPV6_UDP	0x00800000</div><div class='del'>-</div><div class='ctx'> /* RX-desc Write-Back format RSS Type's */</div><div class='ctx'> enum igc_rss_type_num {</div><div class='ctx'> 	IGC_RSS_TYPE_NO_HASH		= 0,</div><div class='hunk'>@@ -477,12 +485,30 @@ static inline u32 igc_rss_type(const union igc_adv_rx_desc *rx_desc)</div><div class='ctx'>  *           descriptors until either it has this many to write back, or the</div><div class='ctx'>  *           ITR timer expires.</div><div class='ctx'>  */</div><div class='del'>-#define IGC_RX_PTHRESH			8</div><div class='del'>-#define IGC_RX_HTHRESH			8</div><div class='del'>-#define IGC_TX_PTHRESH			8</div><div class='del'>-#define IGC_TX_HTHRESH			1</div><div class='del'>-#define IGC_RX_WTHRESH			4</div><div class='del'>-#define IGC_TX_WTHRESH			16</div><div class='add'>+#define IGC_RXDCTL_PTHRESH		8</div><div class='add'>+#define IGC_RXDCTL_HTHRESH		8</div><div class='add'>+#define IGC_RXDCTL_WTHRESH		4</div><div class='add'>+/* Ena specific Rx Queue */</div><div class='add'>+#define IGC_RXDCTL_QUEUE_ENABLE		0x02000000</div><div class='add'>+/* Receive Software Flush */</div><div class='add'>+#define IGC_RXDCTL_SWFLUSH		0x04000000</div><div class='add'>+</div><div class='add'>+#define IGC_TXDCTL_PTHRESH_MASK		GENMASK(4, 0)</div><div class='add'>+#define IGC_TXDCTL_HTHRESH_MASK		GENMASK(12, 8)</div><div class='add'>+#define IGC_TXDCTL_WTHRESH_MASK		GENMASK(20, 16)</div><div class='add'>+#define IGC_TXDCTL_QUEUE_ENABLE_MASK	GENMASK(25, 25)</div><div class='add'>+#define IGC_TXDCTL_SWFLUSH_MASK		GENMASK(26, 26)</div><div class='add'>+#define IGC_TXDCTL_PRIORITY_MASK	GENMASK(27, 27)</div><div class='add'>+</div><div class='add'>+#define IGC_TXDCTL_PTHRESH(x)		FIELD_PREP(IGC_TXDCTL_PTHRESH_MASK, (x))</div><div class='add'>+#define IGC_TXDCTL_HTHRESH(x)		FIELD_PREP(IGC_TXDCTL_HTHRESH_MASK, (x))</div><div class='add'>+#define IGC_TXDCTL_WTHRESH(x)		FIELD_PREP(IGC_TXDCTL_WTHRESH_MASK, (x))</div><div class='add'>+/* Ena specific Tx Queue */</div><div class='add'>+#define IGC_TXDCTL_QUEUE_ENABLE		FIELD_PREP(IGC_TXDCTL_QUEUE_ENABLE_MASK, 1)</div><div class='add'>+/* Transmit Software Flush */</div><div class='add'>+#define IGC_TXDCTL_SWFLUSH		FIELD_PREP(IGC_TXDCTL_SWFLUSH_MASK, 1)</div><div class='add'>+#define IGC_TXDCTL_PRIORITY(x)		FIELD_PREP(IGC_TXDCTL_PRIORITY_MASK, (x))</div><div class='add'>+#define IGC_TXDCTL_PRIORITY_HIGH	IGC_TXDCTL_PRIORITY(1)</div><div class='ctx'> </div><div class='ctx'> #define IGC_RX_DMA_ATTR \</div><div class='ctx'> 	(DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)</div><div class='hunk'>@@ -577,6 +603,7 @@ struct igc_metadata_request {</div><div class='ctx'> 	struct xsk_tx_metadata *meta;</div><div class='ctx'> 	struct igc_ring *tx_ring;</div><div class='ctx'> 	u32 cmd_type;</div><div class='add'>+	u16 used_desc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct igc_q_vector {</div><div class='hunk'>@@ -605,6 +632,7 @@ enum igc_filter_match_flags {</div><div class='ctx'> 	IGC_FILTER_FLAG_DST_MAC_ADDR =	BIT(3),</div><div class='ctx'> 	IGC_FILTER_FLAG_USER_DATA =	BIT(4),</div><div class='ctx'> 	IGC_FILTER_FLAG_VLAN_ETYPE =	BIT(5),</div><div class='add'>+	IGC_FILTER_FLAG_DEFAULT_QUEUE = BIT(6),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct igc_nfc_filter {</div><div class='hunk'>@@ -632,10 +660,14 @@ struct igc_nfc_rule {</div><div class='ctx'> 	bool flex;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* IGC supports a total of 32 NFC rules: 16 MAC address based, 8 VLAN priority</div><div class='del'>- * based, 8 ethertype based and 32 Flex filter based rules.</div><div class='add'>+/* IGC supports a total of 65 NFC rules, listed below in order of priority:</div><div class='add'>+ *  - 16 MAC address based filtering rules (highest priority)</div><div class='add'>+ *  - 8 ethertype based filtering rules</div><div class='add'>+ *  - 32 Flex filter based filtering rules</div><div class='add'>+ *  - 8 VLAN priority based filtering rules</div><div class='add'>+ *  - 1 default queue rule (lowest priority)</div><div class='ctx'>  */</div><div class='del'>-#define IGC_MAX_RXNFC_RULES		64</div><div class='add'>+#define IGC_MAX_RXNFC_RULES		65</div><div class='ctx'> </div><div class='ctx'> struct igc_flex_filter {</div><div class='ctx'> 	u8 index;</div><div class='hunk'>@@ -734,14 +766,20 @@ struct igc_nfc_rule *igc_get_nfc_rule(struct igc_adapter *adapter,</div><div class='ctx'> 				      u32 location);</div><div class='ctx'> int igc_add_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule);</div><div class='ctx'> void igc_del_nfc_rule(struct igc_adapter *adapter, struct igc_nfc_rule *rule);</div><div class='del'>-</div><div class='add'>+void igc_disable_empty_addr_recv(struct igc_adapter *adapter);</div><div class='add'>+int igc_enable_empty_addr_recv(struct igc_adapter *adapter);</div><div class='add'>+struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, int cpu);</div><div class='add'>+void igc_flush_tx_descriptors(struct igc_ring *ring);</div><div class='ctx'> void igc_ptp_init(struct igc_adapter *adapter);</div><div class='ctx'> void igc_ptp_reset(struct igc_adapter *adapter);</div><div class='ctx'> void igc_ptp_suspend(struct igc_adapter *adapter);</div><div class='ctx'> void igc_ptp_stop(struct igc_adapter *adapter);</div><div class='ctx'> ktime_t igc_ptp_rx_pktstamp(struct igc_adapter *adapter, __le32 *buf);</div><div class='del'>-int igc_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr);</div><div class='del'>-int igc_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr);</div><div class='add'>+int igc_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config);</div><div class='add'>+int igc_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config,</div><div class='add'>+			 struct netlink_ext_ack *extack);</div><div class='ctx'> void igc_ptp_tx_hang(struct igc_adapter *adapter);</div><div class='ctx'> void igc_ptp_read(struct igc_adapter *adapter, struct timespec64 *ts);</div><div class='ctx'> void igc_ptp_tx_tstamp_event(struct igc_adapter *adapter);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_base.c b/drivers/net/ethernet/intel/igc/igc_base.c<br/>index 9fae8bdec2a7..1613b562d17c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_base.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_base.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_base.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_base.c</a></div><div class='hunk'>@@ -68,6 +68,10 @@ static s32 igc_init_nvm_params_base(struct igc_hw *hw)</div><div class='ctx'> 	u32 eecd = rd32(IGC_EECD);</div><div class='ctx'> 	u16 size;</div><div class='ctx'> </div><div class='add'>+	/* failed to read reg and got all F's */</div><div class='add'>+	if (!(~eecd))</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='ctx'> 	size = FIELD_GET(IGC_EECD_SIZE_EX_MASK, eecd);</div><div class='ctx'> </div><div class='ctx'> 	/* Added to a constant, "size" becomes the left-shift value</div><div class='hunk'>@@ -221,6 +225,8 @@ static s32 igc_get_invariants_base(struct igc_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	/* NVM initialization */</div><div class='ctx'> 	ret_val = igc_init_nvm_params_base(hw);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		goto out;</div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='ctx'> 	case igc_i225:</div><div class='ctx'> 		ret_val = igc_init_nvm_params_i225(hw);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_base.h b/drivers/net/ethernet/intel/igc/igc_base.h<br/>index bf8cdfbba9ff..eaf17cd031c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_base.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_base.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_base.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_base.h</a></div><div class='hunk'>@@ -49,6 +49,7 @@ struct igc_adv_tx_context_desc {</div><div class='ctx'> #define IGC_ADVTXD_DCMD_DEXT	0x20000000 /* Descriptor extension (1=Adv) */</div><div class='ctx'> #define IGC_ADVTXD_DCMD_VLE	0x40000000 /* VLAN pkt enable */</div><div class='ctx'> #define IGC_ADVTXD_DCMD_TSE	0x80000000 /* TCP Seg enable */</div><div class='add'>+#define IGC_ADVTXD_PAYLEN_MASK	0XFFFFC000 /* Adv desc PAYLEN mask */</div><div class='ctx'> #define IGC_ADVTXD_PAYLEN_SHIFT	14 /* Adv desc PAYLEN shift */</div><div class='ctx'> </div><div class='ctx'> #define IGC_RAR_ENTRIES		16</div><div class='hunk'>@@ -85,14 +86,6 @@ union igc_adv_rx_desc {</div><div class='ctx'> 	} wb;  /* writeback */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Additional Transmit Descriptor Control definitions */</div><div class='del'>-#define IGC_TXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Tx Queue */</div><div class='del'>-#define IGC_TXDCTL_SWFLUSH	0x04000000 /* Transmit Software Flush */</div><div class='del'>-</div><div class='del'>-/* Additional Receive Descriptor Control definitions */</div><div class='del'>-#define IGC_RXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Rx Queue */</div><div class='del'>-#define IGC_RXDCTL_SWFLUSH		0x04000000 /* Receive Software Flush */</div><div class='del'>-</div><div class='ctx'> /* SRRCTL bit definitions */</div><div class='ctx'> #define IGC_SRRCTL_BSIZEPKT_MASK	GENMASK(6, 0)</div><div class='ctx'> #define IGC_SRRCTL_BSIZEPKT(x)		FIELD_PREP(IGC_SRRCTL_BSIZEPKT_MASK, \</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h<br/>index 8e449904aa7d..498ba1522ca4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_defines.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_defines.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_defines.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_defines.h</a></div><div class='hunk'>@@ -308,6 +308,8 @@</div><div class='ctx'> #define IGC_TXD_DTYP_C		0x00000000 /* Context Descriptor */</div><div class='ctx'> #define IGC_TXD_POPTS_IXSM	0x01       /* Insert IP checksum */</div><div class='ctx'> #define IGC_TXD_POPTS_TXSM	0x02       /* Insert TCP/UDP checksum */</div><div class='add'>+#define IGC_TXD_POPTS_SMD_MASK	0x3000     /* Indicates whether it's SMD-V or SMD-R */</div><div class='add'>+</div><div class='ctx'> #define IGC_TXD_CMD_EOP		0x01000000 /* End of Packet */</div><div class='ctx'> #define IGC_TXD_CMD_IC		0x04000000 /* Insert Checksum */</div><div class='ctx'> #define IGC_TXD_CMD_DEXT	0x20000000 /* Desc extension (0 = legacy) */</div><div class='hunk'>@@ -363,6 +365,8 @@</div><div class='ctx'> #define IGC_SRRCTL_TIMER0SEL(timer)	(((timer) &amp; 0x3) &lt;&lt; 17)</div><div class='ctx'> </div><div class='ctx'> /* Receive Descriptor bit definitions */</div><div class='add'>+#define IGC_RXD_STAT_SMD_TYPE_V	0x01	/* SMD-V Packet */</div><div class='add'>+#define IGC_RXD_STAT_SMD_TYPE_R	0x02	/* SMD-R Packet */</div><div class='ctx'> #define IGC_RXD_STAT_EOP	0x02	/* End of Packet */</div><div class='ctx'> #define IGC_RXD_STAT_IXSM	0x04	/* Ignore checksum */</div><div class='ctx'> #define IGC_RXD_STAT_UDPCS	0x10	/* UDP xsum calculated */</div><div class='hunk'>@@ -372,17 +376,22 @@</div><div class='ctx'> #define IGC_RXDEXT_STATERR_LB	0x00040000</div><div class='ctx'> </div><div class='ctx'> /* Advanced Receive Descriptor bit definitions */</div><div class='del'>-#define IGC_RXDADV_STAT_TSIP	0x08000 /* timestamp in packet */</div><div class='add'>+#define IGC_RXDADV_STAT_SMD_TYPE_MASK	0x06000</div><div class='add'>+#define IGC_RXDADV_STAT_TSIP		0x08000 /* timestamp in packet */</div><div class='ctx'> </div><div class='ctx'> #define IGC_RXDEXT_STATERR_L4E		0x20000000</div><div class='ctx'> #define IGC_RXDEXT_STATERR_IPE		0x40000000</div><div class='ctx'> #define IGC_RXDEXT_STATERR_RXE		0x80000000</div><div class='ctx'> </div><div class='add'>+#define IGC_MRQC_ENABLE_RSS_MQ		0x00000002</div><div class='ctx'> #define IGC_MRQC_RSS_FIELD_IPV4_TCP	0x00010000</div><div class='ctx'> #define IGC_MRQC_RSS_FIELD_IPV4		0x00020000</div><div class='ctx'> #define IGC_MRQC_RSS_FIELD_IPV6_TCP_EX	0x00040000</div><div class='ctx'> #define IGC_MRQC_RSS_FIELD_IPV6		0x00100000</div><div class='ctx'> #define IGC_MRQC_RSS_FIELD_IPV6_TCP	0x00200000</div><div class='add'>+#define IGC_MRQC_RSS_FIELD_IPV4_UDP	0x00400000</div><div class='add'>+#define IGC_MRQC_RSS_FIELD_IPV6_UDP	0x00800000</div><div class='add'>+#define IGC_MRQC_DEFAULT_QUEUE_MASK	GENMASK(5, 3)</div><div class='ctx'> </div><div class='ctx'> /* Header split receive */</div><div class='ctx'> #define IGC_RFCTL_IPV6_EX_DIS	0x00010000</div><div class='hunk'>@@ -396,11 +405,47 @@</div><div class='ctx'> #define IGC_RCTL_PMCF		0x00800000 /* pass MAC control frames */</div><div class='ctx'> #define IGC_RCTL_SECRC		0x04000000 /* Strip Ethernet CRC */</div><div class='ctx'> </div><div class='del'>-#define I225_RXPBSIZE_DEFAULT	0x000000A2 /* RXPBSIZE default */</div><div class='del'>-#define I225_TXPBSIZE_DEFAULT	0x04000014 /* TXPBSIZE default */</div><div class='del'>-#define IGC_RXPBS_CFG_TS_EN	0x80000000 /* Timestamp in Rx buffer */</div><div class='del'>-</div><div class='del'>-#define IGC_TXPBSIZE_TSN	0x04145145 /* 5k bytes buffer for each queue */</div><div class='add'>+/* Mask for RX packet buffer size */</div><div class='add'>+#define IGC_RXPBSIZE_EXP_MASK		GENMASK(5, 0)</div><div class='add'>+#define IGC_BMC2OSPBSIZE_MASK		GENMASK(11, 6)</div><div class='add'>+#define IGC_RXPBSIZE_BE_MASK		GENMASK(17, 12)</div><div class='add'>+/* Mask for timestamp in RX buffer */</div><div class='add'>+#define IGC_RXPBS_CFG_TS_EN_MASK	GENMASK(31, 31)</div><div class='add'>+/* High-priority RX packet buffer size (KB). Used for Express traffic when preemption is enabled */</div><div class='add'>+#define IGC_RXPBSIZE_EXP(x)		FIELD_PREP(IGC_RXPBSIZE_EXP_MASK, (x))</div><div class='add'>+/* BMC to OS packet buffer size in KB */</div><div class='add'>+#define IGC_BMC2OSPBSIZE(x)		FIELD_PREP(IGC_BMC2OSPBSIZE_MASK, (x))</div><div class='add'>+/* Low-priority RX packet buffer size (KB). Used for BE traffic when preemption is enabled */</div><div class='add'>+#define IGC_RXPBSIZE_BE(x)		FIELD_PREP(IGC_RXPBSIZE_BE_MASK, (x))</div><div class='add'>+/* Enable RX packet buffer for timestamp descriptor, saving 16 bytes per packet if set */</div><div class='add'>+#define IGC_RXPBS_CFG_TS_EN		FIELD_PREP(IGC_RXPBS_CFG_TS_EN_MASK, 1)</div><div class='add'>+/* Default value following I225/I226 SW User Manual Section 8.3.1 */</div><div class='add'>+#define IGC_RXPBSIZE_EXP_BMC_DEFAULT ( \</div><div class='add'>+	IGC_RXPBSIZE_EXP(34) | IGC_BMC2OSPBSIZE(2))</div><div class='add'>+#define IGC_RXPBSIZE_EXP_BMC_BE_TSN ( \</div><div class='add'>+	IGC_RXPBSIZE_EXP(15) | IGC_BMC2OSPBSIZE(2) | IGC_RXPBSIZE_BE(15))</div><div class='add'>+</div><div class='add'>+/* Mask for TX packet buffer size */</div><div class='add'>+#define IGC_TXPB0SIZE_MASK		GENMASK(5, 0)</div><div class='add'>+#define IGC_TXPB1SIZE_MASK		GENMASK(11, 6)</div><div class='add'>+#define IGC_TXPB2SIZE_MASK		GENMASK(17, 12)</div><div class='add'>+#define IGC_TXPB3SIZE_MASK		GENMASK(23, 18)</div><div class='add'>+/* Mask for OS to BMC packet buffer size */</div><div class='add'>+#define IGC_OS2BMCPBSIZE_MASK		GENMASK(29, 24)</div><div class='add'>+/* TX Packet buffer size in KB */</div><div class='add'>+#define IGC_TXPB0SIZE(x)		FIELD_PREP(IGC_TXPB0SIZE_MASK, (x))</div><div class='add'>+#define IGC_TXPB1SIZE(x)		FIELD_PREP(IGC_TXPB1SIZE_MASK, (x))</div><div class='add'>+#define IGC_TXPB2SIZE(x)		FIELD_PREP(IGC_TXPB2SIZE_MASK, (x))</div><div class='add'>+#define IGC_TXPB3SIZE(x)		FIELD_PREP(IGC_TXPB3SIZE_MASK, (x))</div><div class='add'>+/* OS to BMC packet buffer size in KB */</div><div class='add'>+#define IGC_OS2BMCPBSIZE(x)		FIELD_PREP(IGC_OS2BMCPBSIZE_MASK, (x))</div><div class='add'>+/* Default value following I225/I226 SW User Manual Section 8.3.2 */</div><div class='add'>+#define IGC_TXPBSIZE_DEFAULT ( \</div><div class='add'>+	IGC_TXPB0SIZE(20) | IGC_TXPB1SIZE(0) | IGC_TXPB2SIZE(0) | \</div><div class='add'>+	IGC_TXPB3SIZE(0) | IGC_OS2BMCPBSIZE(4))</div><div class='add'>+#define IGC_TXPBSIZE_TSN ( \</div><div class='add'>+	IGC_TXPB0SIZE(7) | IGC_TXPB1SIZE(7) | IGC_TXPB2SIZE(7) | \</div><div class='add'>+	IGC_TXPB3SIZE(7) | IGC_OS2BMCPBSIZE(4))</div><div class='ctx'> </div><div class='ctx'> #define IGC_DTXMXPKTSZ_TSN	0x19 /* 1600 bytes of max TX DMA packet size */</div><div class='ctx'> #define IGC_DTXMXPKTSZ_DEFAULT	0x98 /* 9728-byte Jumbo frames */</div><div class='hunk'>@@ -539,12 +584,15 @@</div><div class='ctx'> </div><div class='ctx'> /* Transmit Scheduling */</div><div class='ctx'> #define IGC_TQAVCTRL_TRANSMIT_MODE_TSN	0x00000001</div><div class='add'>+#define IGC_TQAVCTRL_PREEMPT_ENA	0x00000002</div><div class='ctx'> #define IGC_TQAVCTRL_ENHANCED_QAV	0x00000008</div><div class='ctx'> #define IGC_TQAVCTRL_FUTSCDDIS		0x00000080</div><div class='add'>+#define IGC_TQAVCTRL_MIN_FRAG_MASK	0x0000C000</div><div class='ctx'> </div><div class='ctx'> #define IGC_TXQCTL_QUEUE_MODE_LAUNCHT	0x00000001</div><div class='ctx'> #define IGC_TXQCTL_STRICT_CYCLE		0x00000002</div><div class='ctx'> #define IGC_TXQCTL_STRICT_END		0x00000004</div><div class='add'>+#define IGC_TXQCTL_PREEMPTIBLE		0x00000008</div><div class='ctx'> #define IGC_TXQCTL_QAV_SEL_MASK		0x000000C0</div><div class='ctx'> #define IGC_TXQCTL_QAV_SEL_CBS0		0x00000080</div><div class='ctx'> #define IGC_TXQCTL_QAV_SEL_CBS1		0x000000C0</div><div class='hunk'>@@ -574,7 +622,10 @@</div><div class='ctx'> #define IGC_PTM_CTRL_SHRT_CYC(usec)	(((usec) &amp; 0x3f) &lt;&lt; 2)</div><div class='ctx'> #define IGC_PTM_CTRL_PTM_TO(usec)	(((usec) &amp; 0xff) &lt;&lt; 8)</div><div class='ctx'> </div><div class='del'>-#define IGC_PTM_SHORT_CYC_DEFAULT	1   /* Default short cycle interval */</div><div class='add'>+/* A short cycle time of 1us theoretically should work, but appears to be too</div><div class='add'>+ * short in practice.</div><div class='add'>+ */</div><div class='add'>+#define IGC_PTM_SHORT_CYC_DEFAULT	4   /* Default short cycle interval */</div><div class='ctx'> #define IGC_PTM_CYC_TIME_DEFAULT	5   /* Default PTM cycle time */</div><div class='ctx'> #define IGC_PTM_TIMEOUT_DEFAULT		255 /* Default timeout for PTM errors */</div><div class='ctx'> </div><div class='hunk'>@@ -593,6 +644,7 @@</div><div class='ctx'> #define IGC_PTM_STAT_T4M1_OVFL		BIT(3) /* T4 minus T1 overflow */</div><div class='ctx'> #define IGC_PTM_STAT_ADJUST_1ST		BIT(4) /* 1588 timer adjusted during 1st PTM cycle */</div><div class='ctx'> #define IGC_PTM_STAT_ADJUST_CYC		BIT(5) /* 1588 timer adjusted during non-1st PTM cycle */</div><div class='add'>+#define IGC_PTM_STAT_ALL		GENMASK(5, 0) /* Used to clear all status */</div><div class='ctx'> </div><div class='ctx'> /* PCIe PTM Cycle Control */</div><div class='ctx'> #define IGC_PTM_CYCLE_CTRL_CYC_TIME(msec)	((msec) &amp; 0x3ff) /* PTM Cycle Time (msec) */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_diag.c b/drivers/net/ethernet/intel/igc/igc_diag.c<br/>index cc621970c0cd..a43d7244ee70 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_diag.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_diag.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_diag.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_diag.c</a></div><div class='hunk'>@@ -173,8 +173,7 @@ bool igc_link_test(struct igc_adapter *adapter, u64 *data)</div><div class='ctx'> 	*data = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* add delay to give enough time for autonegotioation to finish */</div><div class='del'>-	if (adapter-&gt;hw.mac.autoneg)</div><div class='del'>-		ssleep(5);</div><div class='add'>+	ssleep(5);</div><div class='ctx'> </div><div class='ctx'> 	link_up = igc_has_link(adapter);</div><div class='ctx'> 	if (!link_up) {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_ethtool.c b/drivers/net/ethernet/intel/igc/igc_ethtool.c<br/>index 5b0c6f433767..e94c1922b97a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_ethtool.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "igc.h"</div><div class='ctx'> #include "igc_diag.h"</div><div class='add'>+#include "igc_tsn.h"</div><div class='ctx'> </div><div class='ctx'> /* forward declaration */</div><div class='ctx'> struct igc_stats {</div><div class='hunk'>@@ -121,9 +122,11 @@ static const char igc_gstrings_test[][ETH_GSTRING_LEN] = {</div><div class='ctx'> #define IGC_STATS_LEN \</div><div class='ctx'> 	(IGC_GLOBAL_STATS_LEN + IGC_NETDEV_STATS_LEN + IGC_QUEUE_STATS_LEN)</div><div class='ctx'> </div><div class='add'>+#define IGC_PRIV_FLAGS_LEGACY_RX		BIT(0)</div><div class='add'>+#define IGC_PRIV_FLAGS_REVERSE_TSN_TXQ_PRIO	BIT(1)</div><div class='ctx'> static const char igc_priv_flags_strings[][ETH_GSTRING_LEN] = {</div><div class='del'>-#define IGC_PRIV_FLAGS_LEGACY_RX	BIT(0)</div><div class='ctx'> 	"legacy-rx",</div><div class='add'>+	"reverse-tsn-txq-prio",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define IGC_PRIV_FLAGS_STR_LEN ARRAY_SIZE(igc_priv_flags_strings)</div><div class='hunk'>@@ -624,11 +627,11 @@ igc_ethtool_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;num_tx_queues &gt; adapter-&gt;num_rx_queues)</div><div class='del'>-		temp_ring = vmalloc(array_size(sizeof(struct igc_ring),</div><div class='del'>-					       adapter-&gt;num_tx_queues));</div><div class='add'>+		temp_ring = vmalloc_array(adapter-&gt;num_tx_queues,</div><div class='add'>+					  sizeof(struct igc_ring));</div><div class='ctx'> 	else</div><div class='del'>-		temp_ring = vmalloc(array_size(sizeof(struct igc_ring),</div><div class='del'>-					       adapter-&gt;num_rx_queues));</div><div class='add'>+		temp_ring = vmalloc_array(adapter-&gt;num_rx_queues,</div><div class='add'>+					  sizeof(struct igc_ring));</div><div class='ctx'> </div><div class='ctx'> 	if (!temp_ring) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -807,7 +810,7 @@ static int igc_ethtool_get_sset_count(struct net_device *netdev, int sset)</div><div class='ctx'> 	case ETH_SS_PRIV_FLAGS:</div><div class='ctx'> 		return IGC_PRIV_FLAGS_STR_LEN;</div><div class='ctx'> 	default:</div><div class='del'>-		return -ENOTSUPP;</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1044,9 +1047,11 @@ static int igc_ethtool_get_nfc_rules(struct igc_adapter *adapter,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int igc_ethtool_get_rss_hash_opts(struct igc_adapter *adapter,</div><div class='del'>-					 struct ethtool_rxnfc *cmd)</div><div class='add'>+static int igc_ethtool_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				       struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct igc_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	cmd-&gt;data = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Report default options for RSS on igc */</div><div class='hunk'>@@ -1086,15 +1091,19 @@ static int igc_ethtool_get_rss_hash_opts(struct igc_adapter *adapter,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 igc_ethtool_get_rx_ring_count(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct igc_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return adapter-&gt;num_rx_queues;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int igc_ethtool_get_rxnfc(struct net_device *dev,</div><div class='ctx'> 				 struct ethtool_rxnfc *cmd, u32 *rule_locs)</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_adapter *adapter = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = adapter-&gt;num_rx_queues;</div><div class='del'>-		return 0;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		cmd-&gt;rule_cnt = adapter-&gt;nfc_rule_count;</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1102,8 +1111,6 @@ static int igc_ethtool_get_rxnfc(struct net_device *dev,</div><div class='ctx'> 		return igc_ethtool_get_nfc_rule(adapter, cmd);</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLALL:</div><div class='ctx'> 		return igc_ethtool_get_nfc_rules(adapter, cmd, rule_locs);</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		return igc_ethtool_get_rss_hash_opts(adapter, cmd);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1111,9 +1118,11 @@ static int igc_ethtool_get_rxnfc(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> #define UDP_RSS_FLAGS (IGC_FLAG_RSS_FIELD_IPV4_UDP | \</div><div class='ctx'> 		       IGC_FLAG_RSS_FIELD_IPV6_UDP)</div><div class='del'>-static int igc_ethtool_set_rss_hash_opt(struct igc_adapter *adapter,</div><div class='del'>-					struct ethtool_rxnfc *nfc)</div><div class='add'>+static int igc_ethtool_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				       const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct igc_adapter *adapter = netdev_priv(dev);</div><div class='ctx'> 	u32 flags = adapter-&gt;flags;</div><div class='ctx'> </div><div class='ctx'> 	/* RSS does not support anything other than hashing</div><div class='hunk'>@@ -1278,6 +1287,24 @@ static void igc_ethtool_init_nfc_rule(struct igc_nfc_rule *rule,</div><div class='ctx'> 		rule-&gt;flex = true;</div><div class='ctx'> 	else</div><div class='ctx'> 		rule-&gt;flex = false;</div><div class='add'>+</div><div class='add'>+	/* The wildcard rule is only applied if:</div><div class='add'>+	 *  a) None of the other filtering rules match (match_flags is zero)</div><div class='add'>+	 *  b) The flow type is ETHER_FLOW only (no additional fields set)</div><div class='add'>+	 *  c) Mask for Source MAC address is not specified (all zeros)</div><div class='add'>+	 *  d) Mask for Destination MAC address is not specified (all zeros)</div><div class='add'>+	 *  e) Mask for L2 EtherType is not specified (zero)</div><div class='add'>+	 *</div><div class='add'>+	 * If all these conditions are met, the rule is treated as a wildcard</div><div class='add'>+	 * rule. Default queue feature will be used, so that all packets that do</div><div class='add'>+	 * not match any other rule will be routed to the default queue.</div><div class='add'>+	 */</div><div class='add'>+	if (!rule-&gt;filter.match_flags &amp;&amp;</div><div class='add'>+	    fsp-&gt;flow_type == ETHER_FLOW &amp;&amp;</div><div class='add'>+	    is_zero_ether_addr(fsp-&gt;m_u.ether_spec.h_source) &amp;&amp;</div><div class='add'>+	    is_zero_ether_addr(fsp-&gt;m_u.ether_spec.h_dest) &amp;&amp;</div><div class='add'>+	    !fsp-&gt;m_u.ether_spec.h_proto)</div><div class='add'>+		rule-&gt;filter.match_flags = IGC_FILTER_FLAG_DEFAULT_QUEUE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1424,8 +1451,6 @@ static int igc_ethtool_set_rxnfc(struct net_device *dev,</div><div class='ctx'> 	struct igc_adapter *adapter = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		return igc_ethtool_set_rss_hash_opt(adapter, cmd);</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		return igc_ethtool_add_nfc_rule(adapter, cmd);</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLDEL:</div><div class='hunk'>@@ -1599,6 +1624,9 @@ static u32 igc_ethtool_get_priv_flags(struct net_device *netdev)</div><div class='ctx'> 	if (adapter-&gt;flags &amp; IGC_FLAG_RX_LEGACY)</div><div class='ctx'> 		priv_flags |= IGC_PRIV_FLAGS_LEGACY_RX;</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;flags &amp; IGC_FLAG_TSN_REVERSE_TXQ_PRIO)</div><div class='add'>+		priv_flags |= IGC_PRIV_FLAGS_REVERSE_TSN_TXQ_PRIO;</div><div class='add'>+</div><div class='ctx'> 	return priv_flags;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1607,10 +1635,13 @@ static int igc_ethtool_set_priv_flags(struct net_device *netdev, u32 priv_flags)</div><div class='ctx'> 	struct igc_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	unsigned int flags = adapter-&gt;flags;</div><div class='ctx'> </div><div class='del'>-	flags &amp;= ~IGC_FLAG_RX_LEGACY;</div><div class='add'>+	flags &amp;= ~(IGC_FLAG_RX_LEGACY | IGC_FLAG_TSN_REVERSE_TXQ_PRIO);</div><div class='ctx'> 	if (priv_flags &amp; IGC_PRIV_FLAGS_LEGACY_RX)</div><div class='ctx'> 		flags |= IGC_FLAG_RX_LEGACY;</div><div class='ctx'> </div><div class='add'>+	if (priv_flags &amp; IGC_PRIV_FLAGS_REVERSE_TSN_TXQ_PRIO)</div><div class='add'>+		flags |= IGC_FLAG_TSN_REVERSE_TXQ_PRIO;</div><div class='add'>+</div><div class='ctx'> 	if (flags != adapter-&gt;flags) {</div><div class='ctx'> 		adapter-&gt;flags = flags;</div><div class='ctx'> </div><div class='hunk'>@@ -1781,6 +1812,83 @@ static int igc_ethtool_set_eee(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int igc_ethtool_get_mm(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_mm_state *cmd)</div><div class='add'>+{</div><div class='add'>+	struct igc_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct igc_fpe_t *fpe = &amp;adapter-&gt;fpe;</div><div class='add'>+</div><div class='add'>+	ethtool_mmsv_get_mm(&amp;fpe-&gt;mmsv, cmd);</div><div class='add'>+	cmd-&gt;tx_min_frag_size = fpe-&gt;tx_min_frag_size;</div><div class='add'>+	cmd-&gt;rx_min_frag_size = IGC_RX_MIN_FRAG_SIZE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int igc_ethtool_set_mm(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_mm_cfg *cmd,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct igc_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct igc_fpe_t *fpe = &amp;adapter-&gt;fpe;</div><div class='add'>+</div><div class='add'>+	fpe-&gt;tx_min_frag_size = igc_fpe_get_supported_frag_size(cmd-&gt;tx_min_frag_size);</div><div class='add'>+	if (fpe-&gt;tx_min_frag_size != cmd-&gt;tx_min_frag_size)</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "tx-min-frag-size value set is unsupported. Rounded up to supported value (64, 128, 192, 256)");</div><div class='add'>+</div><div class='add'>+	if (fpe-&gt;mmsv.pmac_enabled != cmd-&gt;pmac_enabled) {</div><div class='add'>+		if (cmd-&gt;pmac_enabled)</div><div class='add'>+			static_branch_inc(&amp;igc_fpe_enabled);</div><div class='add'>+		else</div><div class='add'>+			static_branch_dec(&amp;igc_fpe_enabled);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ethtool_mmsv_set_mm(&amp;fpe-&gt;mmsv, cmd);</div><div class='add'>+</div><div class='add'>+	return igc_tsn_offload_apply(adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * igc_ethtool_get_frame_ass_error - Get the frame assembly error count.</div><div class='add'>+ * @reg_value: Register value for IGC_PRMEXCPRCNT</div><div class='add'>+ * Return: The count of frame assembly errors.</div><div class='add'>+ */</div><div class='add'>+static u64 igc_ethtool_get_frame_ass_error(u32 reg_value)</div><div class='add'>+{</div><div class='add'>+	/* Out of order statistics */</div><div class='add'>+	u32 ooo_frame_cnt, ooo_frag_cnt;</div><div class='add'>+	u32 miss_frame_frag_cnt;</div><div class='add'>+</div><div class='add'>+	ooo_frame_cnt = FIELD_GET(IGC_PRMEXCPRCNT_OOO_FRAME_CNT, reg_value);</div><div class='add'>+	ooo_frag_cnt = FIELD_GET(IGC_PRMEXCPRCNT_OOO_FRAG_CNT, reg_value);</div><div class='add'>+	miss_frame_frag_cnt = FIELD_GET(IGC_PRMEXCPRCNT_MISS_FRAME_FRAG_CNT,</div><div class='add'>+					reg_value);</div><div class='add'>+</div><div class='add'>+	return ooo_frame_cnt + ooo_frag_cnt + miss_frame_frag_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 igc_ethtool_get_frame_smd_error(u32 reg_value)</div><div class='add'>+{</div><div class='add'>+	return FIELD_GET(IGC_PRMEXCPRCNT_OOO_SMDC, reg_value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void igc_ethtool_get_mm_stats(struct net_device *dev,</div><div class='add'>+				     struct ethtool_mm_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct igc_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u32 reg_value;</div><div class='add'>+</div><div class='add'>+	reg_value = rd32(IGC_PRMEXCPRCNT);</div><div class='add'>+</div><div class='add'>+	stats-&gt;MACMergeFrameAssErrorCount = igc_ethtool_get_frame_ass_error(reg_value);</div><div class='add'>+	stats-&gt;MACMergeFrameSmdErrorCount = igc_ethtool_get_frame_smd_error(reg_value);</div><div class='add'>+	stats-&gt;MACMergeFrameAssOkCount = rd32(IGC_PRMPTDRCNT);</div><div class='add'>+	stats-&gt;MACMergeFragCountRx = rd32(IGC_PRMEVNTRCNT);</div><div class='add'>+	stats-&gt;MACMergeFragCountTx = rd32(IGC_PRMEVNTTCNT);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int igc_ethtool_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 					  struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='hunk'>@@ -1821,11 +1929,8 @@ static int igc_ethtool_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 		ethtool_link_ksettings_add_link_mode(cmd, advertising, 2500baseT_Full);</div><div class='ctx'> </div><div class='ctx'> 	/* set autoneg settings */</div><div class='del'>-	if (hw-&gt;mac.autoneg == 1) {</div><div class='del'>-		ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);</div><div class='del'>-		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='del'>-						     Autoneg);</div><div class='del'>-	}</div><div class='add'>+	ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);</div><div class='add'>+	ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);</div><div class='ctx'> </div><div class='ctx'> 	/* Set pause flow control settings */</div><div class='ctx'> 	ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);</div><div class='hunk'>@@ -1878,10 +1983,7 @@ static int igc_ethtool_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 		cmd-&gt;base.duplex = DUPLEX_UNKNOWN;</div><div class='ctx'> 	}</div><div class='ctx'> 	cmd-&gt;base.speed = speed;</div><div class='del'>-	if (hw-&gt;mac.autoneg)</div><div class='del'>-		cmd-&gt;base.autoneg = AUTONEG_ENABLE;</div><div class='del'>-	else</div><div class='del'>-		cmd-&gt;base.autoneg = AUTONEG_DISABLE;</div><div class='add'>+	cmd-&gt;base.autoneg = AUTONEG_ENABLE;</div><div class='ctx'> </div><div class='ctx'> 	/* MDI-X =&gt; 2; MDI =&gt;1; Invalid =&gt;0 */</div><div class='ctx'> 	if (hw-&gt;phy.media_type == igc_media_type_copper)</div><div class='hunk'>@@ -1955,7 +2057,6 @@ igc_ethtool_set_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 		advertised |= ADVERTISE_10_HALF;</div><div class='ctx'> </div><div class='ctx'> 	if (cmd-&gt;base.autoneg == AUTONEG_ENABLE) {</div><div class='del'>-		hw-&gt;mac.autoneg = 1;</div><div class='ctx'> 		hw-&gt;phy.autoneg_advertised = advertised;</div><div class='ctx'> 		if (adapter-&gt;fc_autoneg)</div><div class='ctx'> 			hw-&gt;fc.requested_mode = igc_fc_default;</div><div class='hunk'>@@ -1997,6 +2098,9 @@ static void igc_ethtool_diag_test(struct net_device *netdev,</div><div class='ctx'> 		netdev_info(adapter-&gt;netdev, "Offline testing starting");</div><div class='ctx'> 		set_bit(__IGC_TESTING, &amp;adapter-&gt;state);</div><div class='ctx'> </div><div class='add'>+		/* power up PHY for link test */</div><div class='add'>+		igc_power_up_phy_copper(&amp;adapter-&gt;hw);</div><div class='add'>+</div><div class='ctx'> 		/* Link test performed before hardware reset so autoneg doesn't</div><div class='ctx'> 		 * interfere with test result</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -2070,9 +2174,12 @@ static const struct ethtool_ops igc_ethtool_ops = {</div><div class='ctx'> 	.set_coalesce		= igc_ethtool_set_coalesce,</div><div class='ctx'> 	.get_rxnfc		= igc_ethtool_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= igc_ethtool_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= igc_ethtool_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_indir_size	= igc_ethtool_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= igc_ethtool_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= igc_ethtool_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= igc_ethtool_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= igc_ethtool_set_rxfh_fields,</div><div class='ctx'> 	.get_ts_info		= igc_ethtool_get_ts_info,</div><div class='ctx'> 	.get_channels		= igc_ethtool_get_channels,</div><div class='ctx'> 	.set_channels		= igc_ethtool_set_channels,</div><div class='hunk'>@@ -2083,6 +2190,9 @@ static const struct ethtool_ops igc_ethtool_ops = {</div><div class='ctx'> 	.get_link_ksettings	= igc_ethtool_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings	= igc_ethtool_set_link_ksettings,</div><div class='ctx'> 	.self_test		= igc_ethtool_diag_test,</div><div class='add'>+	.get_mm			= igc_ethtool_get_mm,</div><div class='add'>+	.get_mm_stats		= igc_ethtool_get_mm_stats,</div><div class='add'>+	.set_mm			= igc_ethtool_set_mm,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void igc_ethtool_set_ops(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_hw.h b/drivers/net/ethernet/intel/igc/igc_hw.h<br/>index e1c572e0d4ef..be8a49a86d09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_hw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_hw.h</a></div><div class='hunk'>@@ -92,7 +92,6 @@ struct igc_mac_info {</div><div class='ctx'> 	bool asf_firmware_present;</div><div class='ctx'> 	bool arc_subsystem_valid;</div><div class='ctx'> </div><div class='del'>-	bool autoneg;</div><div class='ctx'> 	bool autoneg_failed;</div><div class='ctx'> 	bool get_link_status;</div><div class='ctx'> };</div><div class='hunk'>@@ -280,9 +279,4 @@ struct net_device *igc_get_hw_dev(struct igc_hw *hw);</div><div class='ctx'> #define hw_dbg(format, arg...) \</div><div class='ctx'> 	netdev_dbg(igc_get_hw_dev(hw), format, ##arg)</div><div class='ctx'> </div><div class='del'>-s32  igc_read_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);</div><div class='del'>-s32  igc_write_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);</div><div class='del'>-void igc_read_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);</div><div class='del'>-void igc_write_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);</div><div class='del'>-</div><div class='ctx'> #endif /* _IGC_HW_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_i225.c b/drivers/net/ethernet/intel/igc/igc_i225.c<br/>index 0dd61719f1ed..5226d10cc95b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_i225.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_i225.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_i225.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_i225.c</a></div><div class='hunk'>@@ -435,7 +435,7 @@ static s32 igc_update_nvm_checksum_i225(struct igc_hw *hw)</div><div class='ctx'> 		}</div><div class='ctx'> 		checksum += nvm_data;</div><div class='ctx'> 	}</div><div class='del'>-	checksum = (u16)NVM_SUM - checksum;</div><div class='add'>+	checksum = NVM_SUM - checksum;</div><div class='ctx'> 	ret_val = igc_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,</div><div class='ctx'> 				     &amp;checksum);</div><div class='ctx'> 	if (ret_val) {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c<br/>index a5c4b19d71a2..7ac6637f8db7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_mac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_mac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_mac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_mac.c</a></div><div class='hunk'>@@ -127,7 +127,7 @@ s32 igc_setup_link(struct igc_hw *hw)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* If requested flow control is set to default, set flow control</div><div class='del'>-	 * to the both 'rx' and 'tx' pause frames.</div><div class='add'>+	 * to both 'rx' and 'tx' pause frames.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (hw-&gt;fc.requested_mode == igc_fc_default)</div><div class='ctx'> 		hw-&gt;fc.requested_mode = igc_fc_full;</div><div class='hunk'>@@ -386,14 +386,6 @@ s32 igc_check_for_copper_link(struct igc_hw *hw)</div><div class='ctx'> 	 */</div><div class='ctx'> 	igc_check_downshift(hw);</div><div class='ctx'> </div><div class='del'>-	/* If we are forcing speed/duplex, then we simply return since</div><div class='del'>-	 * we have already determined whether we have link or not.</div><div class='del'>-	 */</div><div class='del'>-	if (!mac-&gt;autoneg) {</div><div class='del'>-		ret_val = -IGC_ERR_CONFIG;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Auto-Neg is enabled.  Auto Speed Detection takes care</div><div class='ctx'> 	 * of MAC speed/duplex configuration.  So we only need to</div><div class='ctx'> 	 * configure Collision Distance in the MAC.</div><div class='hunk'>@@ -468,173 +460,171 @@ s32 igc_config_fc_after_link_up(struct igc_hw *hw)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Check for the case where we have copper media and auto-neg is</div><div class='del'>-	 * enabled.  In this case, we need to check and see if Auto-Neg</div><div class='del'>-	 * has completed, and if so, how the PHY and link partner has</div><div class='del'>-	 * flow control configured.</div><div class='add'>+	/* In auto-neg, we need to check and see if Auto-Neg has completed,</div><div class='add'>+	 * and if so, how the PHY and link partner has flow control</div><div class='add'>+	 * configured.</div><div class='ctx'> 	 */</div><div class='del'>-	if (mac-&gt;autoneg) {</div><div class='del'>-		/* Read the MII Status Register and check to see if AutoNeg</div><div class='del'>-		 * has completed.  We read this twice because this reg has</div><div class='del'>-		 * some "sticky" (latched) bits.</div><div class='del'>-		 */</div><div class='del'>-		ret_val = hw-&gt;phy.ops.read_reg(hw, PHY_STATUS,</div><div class='del'>-					       &amp;mii_status_reg);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			goto out;</div><div class='del'>-		ret_val = hw-&gt;phy.ops.read_reg(hw, PHY_STATUS,</div><div class='del'>-					       &amp;mii_status_reg);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			goto out;</div><div class='ctx'> </div><div class='del'>-		if (!(mii_status_reg &amp; MII_SR_AUTONEG_COMPLETE)) {</div><div class='del'>-			hw_dbg("Copper PHY and Auto Neg has not completed.\n");</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='add'>+	/* Read the MII Status Register and check to see if AutoNeg</div><div class='add'>+	 * has completed.  We read this twice because this reg has</div><div class='add'>+	 * some "sticky" (latched) bits.</div><div class='add'>+	 */</div><div class='add'>+	ret_val = hw-&gt;phy.ops.read_reg(hw, PHY_STATUS,</div><div class='add'>+				       &amp;mii_status_reg);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		goto out;</div><div class='add'>+	ret_val = hw-&gt;phy.ops.read_reg(hw, PHY_STATUS,</div><div class='add'>+				       &amp;mii_status_reg);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-		/* The AutoNeg process has completed, so we now need to</div><div class='del'>-		 * read both the Auto Negotiation Advertisement</div><div class='del'>-		 * Register (Address 4) and the Auto_Negotiation Base</div><div class='del'>-		 * Page Ability Register (Address 5) to determine how</div><div class='del'>-		 * flow control was negotiated.</div><div class='del'>-		 */</div><div class='del'>-		ret_val = hw-&gt;phy.ops.read_reg(hw, PHY_AUTONEG_ADV,</div><div class='del'>-					       &amp;mii_nway_adv_reg);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			goto out;</div><div class='del'>-		ret_val = hw-&gt;phy.ops.read_reg(hw, PHY_LP_ABILITY,</div><div class='del'>-					       &amp;mii_nway_lp_ability_reg);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			goto out;</div><div class='del'>-		/* Two bits in the Auto Negotiation Advertisement Register</div><div class='del'>-		 * (Address 4) and two bits in the Auto Negotiation Base</div><div class='del'>-		 * Page Ability Register (Address 5) determine flow control</div><div class='del'>-		 * for both the PHY and the link partner.  The following</div><div class='del'>-		 * table, taken out of the IEEE 802.3ab/D6.0 dated March 25,</div><div class='del'>-		 * 1999, describes these PAUSE resolution bits and how flow</div><div class='del'>-		 * control is determined based upon these settings.</div><div class='del'>-		 * NOTE:  DC = Don't Care</div><div class='del'>-		 *</div><div class='del'>-		 *   LOCAL DEVICE  |   LINK PARTNER</div><div class='del'>-		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution</div><div class='del'>-		 *-------|---------|-------|---------|--------------------</div><div class='del'>-		 *   0   |    0    |  DC   |   DC    | igc_fc_none</div><div class='del'>-		 *   0   |    1    |   0   |   DC    | igc_fc_none</div><div class='del'>-		 *   0   |    1    |   1   |    0    | igc_fc_none</div><div class='del'>-		 *   0   |    1    |   1   |    1    | igc_fc_tx_pause</div><div class='del'>-		 *   1   |    0    |   0   |   DC    | igc_fc_none</div><div class='del'>-		 *   1   |   DC    |   1   |   DC    | igc_fc_full</div><div class='del'>-		 *   1   |    1    |   0   |    0    | igc_fc_none</div><div class='del'>-		 *   1   |    1    |   0   |    1    | igc_fc_rx_pause</div><div class='del'>-		 *</div><div class='del'>-		 * Are both PAUSE bits set to 1?  If so, this implies</div><div class='del'>-		 * Symmetric Flow Control is enabled at both ends.  The</div><div class='del'>-		 * ASM_DIR bits are irrelevant per the spec.</div><div class='del'>-		 *</div><div class='del'>-		 * For Symmetric Flow Control:</div><div class='del'>-		 *</div><div class='del'>-		 *   LOCAL DEVICE  |   LINK PARTNER</div><div class='del'>-		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result</div><div class='del'>-		 *-------|---------|-------|---------|--------------------</div><div class='del'>-		 *   1   |   DC    |   1   |   DC    | IGC_fc_full</div><div class='del'>-		 *</div><div class='del'>-		 */</div><div class='del'>-		if ((mii_nway_adv_reg &amp; NWAY_AR_PAUSE) &amp;&amp;</div><div class='del'>-		    (mii_nway_lp_ability_reg &amp; NWAY_LPAR_PAUSE)) {</div><div class='del'>-			/* Now we need to check if the user selected RX ONLY</div><div class='del'>-			 * of pause frames.  In this case, we had to advertise</div><div class='del'>-			 * FULL flow control because we could not advertise RX</div><div class='del'>-			 * ONLY. Hence, we must now check to see if we need to</div><div class='del'>-			 * turn OFF  the TRANSMISSION of PAUSE frames.</div><div class='del'>-			 */</div><div class='del'>-			if (hw-&gt;fc.requested_mode == igc_fc_full) {</div><div class='del'>-				hw-&gt;fc.current_mode = igc_fc_full;</div><div class='del'>-				hw_dbg("Flow Control = FULL.\n");</div><div class='del'>-			} else {</div><div class='del'>-				hw-&gt;fc.current_mode = igc_fc_rx_pause;</div><div class='del'>-				hw_dbg("Flow Control = RX PAUSE frames only.\n");</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+	if (!(mii_status_reg &amp; MII_SR_AUTONEG_COMPLETE)) {</div><div class='add'>+		hw_dbg("Copper PHY and Auto Neg has not completed.\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* For receiving PAUSE frames ONLY.</div><div class='del'>-		 *</div><div class='del'>-		 *   LOCAL DEVICE  |   LINK PARTNER</div><div class='del'>-		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result</div><div class='del'>-		 *-------|---------|-------|---------|--------------------</div><div class='del'>-		 *   0   |    1    |   1   |    1    | igc_fc_tx_pause</div><div class='del'>-		 */</div><div class='del'>-		else if (!(mii_nway_adv_reg &amp; NWAY_AR_PAUSE) &amp;&amp;</div><div class='del'>-			 (mii_nway_adv_reg &amp; NWAY_AR_ASM_DIR) &amp;&amp;</div><div class='del'>-			 (mii_nway_lp_ability_reg &amp; NWAY_LPAR_PAUSE) &amp;&amp;</div><div class='del'>-			 (mii_nway_lp_ability_reg &amp; NWAY_LPAR_ASM_DIR)) {</div><div class='del'>-			hw-&gt;fc.current_mode = igc_fc_tx_pause;</div><div class='del'>-			hw_dbg("Flow Control = TX PAUSE frames only.\n");</div><div class='del'>-		}</div><div class='del'>-		/* For transmitting PAUSE frames ONLY.</div><div class='del'>-		 *</div><div class='del'>-		 *   LOCAL DEVICE  |   LINK PARTNER</div><div class='del'>-		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result</div><div class='del'>-		 *-------|---------|-------|---------|--------------------</div><div class='del'>-		 *   1   |    1    |   0   |    1    | igc_fc_rx_pause</div><div class='del'>-		 */</div><div class='del'>-		else if ((mii_nway_adv_reg &amp; NWAY_AR_PAUSE) &amp;&amp;</div><div class='del'>-			 (mii_nway_adv_reg &amp; NWAY_AR_ASM_DIR) &amp;&amp;</div><div class='del'>-			 !(mii_nway_lp_ability_reg &amp; NWAY_LPAR_PAUSE) &amp;&amp;</div><div class='del'>-			 (mii_nway_lp_ability_reg &amp; NWAY_LPAR_ASM_DIR)) {</div><div class='del'>-			hw-&gt;fc.current_mode = igc_fc_rx_pause;</div><div class='del'>-			hw_dbg("Flow Control = RX PAUSE frames only.\n");</div><div class='del'>-		}</div><div class='del'>-		/* Per the IEEE spec, at this point flow control should be</div><div class='del'>-		 * disabled.  However, we want to consider that we could</div><div class='del'>-		 * be connected to a legacy switch that doesn't advertise</div><div class='del'>-		 * desired flow control, but can be forced on the link</div><div class='del'>-		 * partner.  So if we advertised no flow control, that is</div><div class='del'>-		 * what we will resolve to.  If we advertised some kind of</div><div class='del'>-		 * receive capability (Rx Pause Only or Full Flow Control)</div><div class='del'>-		 * and the link partner advertised none, we will configure</div><div class='del'>-		 * ourselves to enable Rx Flow Control only.  We can do</div><div class='del'>-		 * this safely for two reasons:  If the link partner really</div><div class='del'>-		 * didn't want flow control enabled, and we enable Rx, no</div><div class='del'>-		 * harm done since we won't be receiving any PAUSE frames</div><div class='del'>-		 * anyway.  If the intent on the link partner was to have</div><div class='del'>-		 * flow control enabled, then by us enabling RX only, we</div><div class='del'>-		 * can at least receive pause frames and process them.</div><div class='del'>-		 * This is a good idea because in most cases, since we are</div><div class='del'>-		 * predominantly a server NIC, more times than not we will</div><div class='del'>-		 * be asked to delay transmission of packets than asking</div><div class='del'>-		 * our link partner to pause transmission of frames.</div><div class='add'>+	/* The AutoNeg process has completed, so we now need to</div><div class='add'>+	 * read both the Auto Negotiation Advertisement</div><div class='add'>+	 * Register (Address 4) and the Auto_Negotiation Base</div><div class='add'>+	 * Page Ability Register (Address 5) to determine how</div><div class='add'>+	 * flow control was negotiated.</div><div class='add'>+	 */</div><div class='add'>+	ret_val = hw-&gt;phy.ops.read_reg(hw, PHY_AUTONEG_ADV,</div><div class='add'>+				       &amp;mii_nway_adv_reg);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		goto out;</div><div class='add'>+	ret_val = hw-&gt;phy.ops.read_reg(hw, PHY_LP_ABILITY,</div><div class='add'>+				       &amp;mii_nway_lp_ability_reg);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		goto out;</div><div class='add'>+	/* Two bits in the Auto Negotiation Advertisement Register</div><div class='add'>+	 * (Address 4) and two bits in the Auto Negotiation Base</div><div class='add'>+	 * Page Ability Register (Address 5) determine flow control</div><div class='add'>+	 * for both the PHY and the link partner.  The following</div><div class='add'>+	 * table, taken out of the IEEE 802.3ab/D6.0 dated March 25,</div><div class='add'>+	 * 1999, describes these PAUSE resolution bits and how flow</div><div class='add'>+	 * control is determined based upon these settings.</div><div class='add'>+	 * NOTE:  DC = Don't Care</div><div class='add'>+	 *</div><div class='add'>+	 *   LOCAL DEVICE  |   LINK PARTNER</div><div class='add'>+	 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution</div><div class='add'>+	 *-------|---------|-------|---------|--------------------</div><div class='add'>+	 *   0   |    0    |  DC   |   DC    | igc_fc_none</div><div class='add'>+	 *   0   |    1    |   0   |   DC    | igc_fc_none</div><div class='add'>+	 *   0   |    1    |   1   |    0    | igc_fc_none</div><div class='add'>+	 *   0   |    1    |   1   |    1    | igc_fc_tx_pause</div><div class='add'>+	 *   1   |    0    |   0   |   DC    | igc_fc_none</div><div class='add'>+	 *   1   |   DC    |   1   |   DC    | igc_fc_full</div><div class='add'>+	 *   1   |    1    |   0   |    0    | igc_fc_none</div><div class='add'>+	 *   1   |    1    |   0   |    1    | igc_fc_rx_pause</div><div class='add'>+	 *</div><div class='add'>+	 * Are both PAUSE bits set to 1?  If so, this implies</div><div class='add'>+	 * Symmetric Flow Control is enabled at both ends.  The</div><div class='add'>+	 * ASM_DIR bits are irrelevant per the spec.</div><div class='add'>+	 *</div><div class='add'>+	 * For Symmetric Flow Control:</div><div class='add'>+	 *</div><div class='add'>+	 *   LOCAL DEVICE  |   LINK PARTNER</div><div class='add'>+	 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result</div><div class='add'>+	 *-------|---------|-------|---------|--------------------</div><div class='add'>+	 *   1   |   DC    |   1   |   DC    | IGC_fc_full</div><div class='add'>+	 *</div><div class='add'>+	 */</div><div class='add'>+	if ((mii_nway_adv_reg &amp; NWAY_AR_PAUSE) &amp;&amp;</div><div class='add'>+	    (mii_nway_lp_ability_reg &amp; NWAY_LPAR_PAUSE)) {</div><div class='add'>+		/* Now we need to check if the user selected RX ONLY</div><div class='add'>+		 * of pause frames.  In this case, we had to advertise</div><div class='add'>+		 * FULL flow control because we could not advertise RX</div><div class='add'>+		 * ONLY. Hence, we must now check to see if we need to</div><div class='add'>+		 * turn OFF  the TRANSMISSION of PAUSE frames.</div><div class='ctx'> 		 */</div><div class='del'>-		else if ((hw-&gt;fc.requested_mode == igc_fc_none) ||</div><div class='del'>-			 (hw-&gt;fc.requested_mode == igc_fc_tx_pause) ||</div><div class='del'>-			 (hw-&gt;fc.strict_ieee)) {</div><div class='del'>-			hw-&gt;fc.current_mode = igc_fc_none;</div><div class='del'>-			hw_dbg("Flow Control = NONE.\n");</div><div class='add'>+		if (hw-&gt;fc.requested_mode == igc_fc_full) {</div><div class='add'>+			hw-&gt;fc.current_mode = igc_fc_full;</div><div class='add'>+			hw_dbg("Flow Control = FULL.\n");</div><div class='ctx'> 		} else {</div><div class='ctx'> 			hw-&gt;fc.current_mode = igc_fc_rx_pause;</div><div class='ctx'> 			hw_dbg("Flow Control = RX PAUSE frames only.\n");</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* Now we need to do one last check...  If we auto-</div><div class='del'>-		 * negotiated to HALF DUPLEX, flow control should not be</div><div class='del'>-		 * enabled per IEEE 802.3 spec.</div><div class='del'>-		 */</div><div class='del'>-		ret_val = hw-&gt;mac.ops.get_speed_and_duplex(hw, &amp;speed, &amp;duplex);</div><div class='del'>-		if (ret_val) {</div><div class='del'>-			hw_dbg("Error getting link speed and duplex\n");</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='add'>+	/* For receiving PAUSE frames ONLY.</div><div class='add'>+	 *</div><div class='add'>+	 *   LOCAL DEVICE  |   LINK PARTNER</div><div class='add'>+	 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result</div><div class='add'>+	 *-------|---------|-------|---------|--------------------</div><div class='add'>+	 *   0   |    1    |   1   |    1    | igc_fc_tx_pause</div><div class='add'>+	 */</div><div class='add'>+	else if (!(mii_nway_adv_reg &amp; NWAY_AR_PAUSE) &amp;&amp;</div><div class='add'>+		 (mii_nway_adv_reg &amp; NWAY_AR_ASM_DIR) &amp;&amp;</div><div class='add'>+		 (mii_nway_lp_ability_reg &amp; NWAY_LPAR_PAUSE) &amp;&amp;</div><div class='add'>+		 (mii_nway_lp_ability_reg &amp; NWAY_LPAR_ASM_DIR)) {</div><div class='add'>+		hw-&gt;fc.current_mode = igc_fc_tx_pause;</div><div class='add'>+		hw_dbg("Flow Control = TX PAUSE frames only.\n");</div><div class='add'>+	}</div><div class='add'>+	/* For transmitting PAUSE frames ONLY.</div><div class='add'>+	 *</div><div class='add'>+	 *   LOCAL DEVICE  |   LINK PARTNER</div><div class='add'>+	 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result</div><div class='add'>+	 *-------|---------|-------|---------|--------------------</div><div class='add'>+	 *   1   |    1    |   0   |    1    | igc_fc_rx_pause</div><div class='add'>+	 */</div><div class='add'>+	else if ((mii_nway_adv_reg &amp; NWAY_AR_PAUSE) &amp;&amp;</div><div class='add'>+		 (mii_nway_adv_reg &amp; NWAY_AR_ASM_DIR) &amp;&amp;</div><div class='add'>+		 !(mii_nway_lp_ability_reg &amp; NWAY_LPAR_PAUSE) &amp;&amp;</div><div class='add'>+		 (mii_nway_lp_ability_reg &amp; NWAY_LPAR_ASM_DIR)) {</div><div class='add'>+		hw-&gt;fc.current_mode = igc_fc_rx_pause;</div><div class='add'>+		hw_dbg("Flow Control = RX PAUSE frames only.\n");</div><div class='add'>+	}</div><div class='add'>+	/* Per the IEEE spec, at this point flow control should be</div><div class='add'>+	 * disabled.  However, we want to consider that we could</div><div class='add'>+	 * be connected to a legacy switch that doesn't advertise</div><div class='add'>+	 * desired flow control, but can be forced on the link</div><div class='add'>+	 * partner.  So if we advertised no flow control, that is</div><div class='add'>+	 * what we will resolve to.  If we advertised some kind of</div><div class='add'>+	 * receive capability (Rx Pause Only or Full Flow Control)</div><div class='add'>+	 * and the link partner advertised none, we will configure</div><div class='add'>+	 * ourselves to enable Rx Flow Control only.  We can do</div><div class='add'>+	 * this safely for two reasons:  If the link partner really</div><div class='add'>+	 * didn't want flow control enabled, and we enable Rx, no</div><div class='add'>+	 * harm done since we won't be receiving any PAUSE frames</div><div class='add'>+	 * anyway.  If the intent on the link partner was to have</div><div class='add'>+	 * flow control enabled, then by us enabling RX only, we</div><div class='add'>+	 * can at least receive pause frames and process them.</div><div class='add'>+	 * This is a good idea because in most cases, since we are</div><div class='add'>+	 * predominantly a server NIC, more times than not we will</div><div class='add'>+	 * be asked to delay transmission of packets than asking</div><div class='add'>+	 * our link partner to pause transmission of frames.</div><div class='add'>+	 */</div><div class='add'>+	else if ((hw-&gt;fc.requested_mode == igc_fc_none) ||</div><div class='add'>+		 (hw-&gt;fc.requested_mode == igc_fc_tx_pause) ||</div><div class='add'>+		 (hw-&gt;fc.strict_ieee)) {</div><div class='add'>+		hw-&gt;fc.current_mode = igc_fc_none;</div><div class='add'>+		hw_dbg("Flow Control = NONE.\n");</div><div class='add'>+	} else {</div><div class='add'>+		hw-&gt;fc.current_mode = igc_fc_rx_pause;</div><div class='add'>+		hw_dbg("Flow Control = RX PAUSE frames only.\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (duplex == HALF_DUPLEX)</div><div class='del'>-			hw-&gt;fc.current_mode = igc_fc_none;</div><div class='add'>+	/* Now we need to do one last check...  If we auto-</div><div class='add'>+	 * negotiated to HALF DUPLEX, flow control should not be</div><div class='add'>+	 * enabled per IEEE 802.3 spec.</div><div class='add'>+	 */</div><div class='add'>+	ret_val = hw-&gt;mac.ops.get_speed_and_duplex(hw, &amp;speed, &amp;duplex);</div><div class='add'>+	if (ret_val) {</div><div class='add'>+		hw_dbg("Error getting link speed and duplex\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* Now we call a subroutine to actually force the MAC</div><div class='del'>-		 * controller to use the correct flow control settings.</div><div class='del'>-		 */</div><div class='del'>-		ret_val = igc_force_mac_fc(hw);</div><div class='del'>-		if (ret_val) {</div><div class='del'>-			hw_dbg("Error forcing flow control settings\n");</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='add'>+	if (duplex == HALF_DUPLEX)</div><div class='add'>+		hw-&gt;fc.current_mode = igc_fc_none;</div><div class='add'>+</div><div class='add'>+	/* Now we call a subroutine to actually force the MAC</div><div class='add'>+	 * controller to use the correct flow control settings.</div><div class='add'>+	 */</div><div class='add'>+	ret_val = igc_force_mac_fc(hw);</div><div class='add'>+	if (ret_val) {</div><div class='add'>+		hw_dbg("Error forcing flow control settings\n");</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c<br/>index 6e70bca15db1..7aafa60ba0c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_main.c</a></div><div class='hunk'>@@ -683,9 +683,9 @@ static void igc_configure_rx_ring(struct igc_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	wr32(IGC_SRRCTL(reg_idx), srrctl);</div><div class='ctx'> </div><div class='del'>-	rxdctl |= IGC_RX_PTHRESH;</div><div class='del'>-	rxdctl |= IGC_RX_HTHRESH &lt;&lt; 8;</div><div class='del'>-	rxdctl |= IGC_RX_WTHRESH &lt;&lt; 16;</div><div class='add'>+	rxdctl |= IGC_RXDCTL_PTHRESH;</div><div class='add'>+	rxdctl |= IGC_RXDCTL_HTHRESH &lt;&lt; 8;</div><div class='add'>+	rxdctl |= IGC_RXDCTL_WTHRESH &lt;&lt; 16;</div><div class='ctx'> </div><div class='ctx'> 	/* initialize rx_buffer_info */</div><div class='ctx'> 	memset(ring-&gt;rx_buffer_info, 0,</div><div class='hunk'>@@ -749,11 +749,9 @@ static void igc_configure_tx_ring(struct igc_adapter *adapter,</div><div class='ctx'> 	wr32(IGC_TDH(reg_idx), 0);</div><div class='ctx'> 	writel(0, ring-&gt;tail);</div><div class='ctx'> </div><div class='del'>-	txdctl |= IGC_TX_PTHRESH;</div><div class='del'>-	txdctl |= IGC_TX_HTHRESH &lt;&lt; 8;</div><div class='del'>-	txdctl |= IGC_TX_WTHRESH &lt;&lt; 16;</div><div class='add'>+	txdctl |= IGC_TXDCTL_PTHRESH(8) | IGC_TXDCTL_HTHRESH(1) |</div><div class='add'>+		  IGC_TXDCTL_WTHRESH(16) | IGC_TXDCTL_QUEUE_ENABLE;</div><div class='ctx'> </div><div class='del'>-	txdctl |= IGC_TXDCTL_QUEUE_ENABLE;</div><div class='ctx'> 	wr32(IGC_TXDCTL(reg_idx), txdctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1092,10 +1090,12 @@ static int igc_init_empty_frame(struct igc_ring *ring,</div><div class='ctx'> </div><div class='ctx'> 	dma = dma_map_single(ring-&gt;dev, skb-&gt;data, size, DMA_TO_DEVICE);</div><div class='ctx'> 	if (dma_mapping_error(ring-&gt;dev, dma)) {</div><div class='del'>-		netdev_err_once(ring-&gt;netdev, "Failed to map DMA for TX\n");</div><div class='add'>+		net_err_ratelimited("%s: DMA mapping error for empty frame\n",</div><div class='add'>+				    netdev_name(ring-&gt;netdev));</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	buffer-&gt;type = IGC_TX_BUFFER_TYPE_SKB;</div><div class='ctx'> 	buffer-&gt;skb = skb;</div><div class='ctx'> 	buffer-&gt;protocol = 0;</div><div class='ctx'> 	buffer-&gt;bytecount = skb-&gt;len;</div><div class='hunk'>@@ -1107,20 +1107,12 @@ static int igc_init_empty_frame(struct igc_ring *ring,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int igc_init_tx_empty_descriptor(struct igc_ring *ring,</div><div class='del'>-					struct sk_buff *skb,</div><div class='del'>-					struct igc_tx_buffer *first)</div><div class='add'>+static void igc_init_tx_empty_descriptor(struct igc_ring *ring,</div><div class='add'>+					 struct sk_buff *skb,</div><div class='add'>+					 struct igc_tx_buffer *first)</div><div class='ctx'> {</div><div class='ctx'> 	union igc_adv_tx_desc *desc;</div><div class='ctx'> 	u32 cmd_type, olinfo_status;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!igc_desc_unused(ring))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	err = igc_init_empty_frame(ring, first, skb);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='ctx'> </div><div class='ctx'> 	cmd_type = IGC_ADVTXD_DTYP_DATA | IGC_ADVTXD_DCMD_DEXT |</div><div class='ctx'> 		   IGC_ADVTXD_DCMD_IFCS | IGC_TXD_DCMD |</div><div class='hunk'>@@ -1139,8 +1131,6 @@ static int igc_init_tx_empty_descriptor(struct igc_ring *ring,</div><div class='ctx'> 	ring-&gt;next_to_use++;</div><div class='ctx'> 	if (ring-&gt;next_to_use == ring-&gt;count)</div><div class='ctx'> 		ring-&gt;next_to_use = 0;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define IGC_EMPTY_FRAME_SIZE 60</div><div class='hunk'>@@ -1566,6 +1556,40 @@ static bool igc_request_tx_tstamp(struct igc_adapter *adapter, struct sk_buff *s</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int igc_insert_empty_frame(struct igc_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	struct igc_tx_buffer *empty_info;</div><div class='add'>+	struct sk_buff *empty_skb;</div><div class='add'>+	void *data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	empty_info = &amp;tx_ring-&gt;tx_buffer_info[tx_ring-&gt;next_to_use];</div><div class='add'>+	empty_skb = alloc_skb(IGC_EMPTY_FRAME_SIZE, GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!empty_skb)) {</div><div class='add'>+		net_err_ratelimited("%s: skb alloc error for empty frame\n",</div><div class='add'>+				    netdev_name(tx_ring-&gt;netdev));</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = skb_put(empty_skb, IGC_EMPTY_FRAME_SIZE);</div><div class='add'>+	memset(data, 0, IGC_EMPTY_FRAME_SIZE);</div><div class='add'>+</div><div class='add'>+	/* Prepare DMA mapping and Tx buffer information */</div><div class='add'>+	ret = igc_init_empty_frame(tx_ring, empty_info, empty_skb);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		dev_kfree_skb_any(empty_skb);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Prepare advanced context descriptor for empty packet */</div><div class='add'>+	igc_tx_ctxtdesc(tx_ring, 0, false, 0, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* Prepare advanced data descriptor for empty packet */</div><div class='add'>+	igc_init_tx_empty_descriptor(tx_ring, empty_skb, empty_info);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static netdev_tx_t igc_xmit_frame_ring(struct sk_buff *skb,</div><div class='ctx'> 				       struct igc_ring *tx_ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -1585,6 +1609,7 @@ static netdev_tx_t igc_xmit_frame_ring(struct sk_buff *skb,</div><div class='ctx'> 	 *	+ 1 desc for skb_headlen/IGC_MAX_DATA_PER_TXD,</div><div class='ctx'> 	 *	+ 2 desc gap to keep tail from touching head,</div><div class='ctx'> 	 *	+ 1 desc for context descriptor,</div><div class='add'>+	 *	+ 2 desc for inserting an empty packet for launch time,</div><div class='ctx'> 	 * otherwise try next time</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (f = 0; f &lt; skb_shinfo(skb)-&gt;nr_frags; f++)</div><div class='hunk'>@@ -1604,24 +1629,16 @@ static netdev_tx_t igc_xmit_frame_ring(struct sk_buff *skb,</div><div class='ctx'> 	launch_time = igc_tx_launchtime(tx_ring, txtime, &amp;first_flag, &amp;insert_empty);</div><div class='ctx'> </div><div class='ctx'> 	if (insert_empty) {</div><div class='del'>-		struct igc_tx_buffer *empty_info;</div><div class='del'>-		struct sk_buff *empty;</div><div class='del'>-		void *data;</div><div class='del'>-</div><div class='del'>-		empty_info = &amp;tx_ring-&gt;tx_buffer_info[tx_ring-&gt;next_to_use];</div><div class='del'>-		empty = alloc_skb(IGC_EMPTY_FRAME_SIZE, GFP_ATOMIC);</div><div class='del'>-		if (!empty)</div><div class='del'>-			goto done;</div><div class='del'>-</div><div class='del'>-		data = skb_put(empty, IGC_EMPTY_FRAME_SIZE);</div><div class='del'>-		memset(data, 0, IGC_EMPTY_FRAME_SIZE);</div><div class='del'>-</div><div class='del'>-		igc_tx_ctxtdesc(tx_ring, 0, false, 0, 0, 0);</div><div class='del'>-</div><div class='del'>-		if (igc_init_tx_empty_descriptor(tx_ring,</div><div class='del'>-						 empty,</div><div class='del'>-						 empty_info) &lt; 0)</div><div class='del'>-			dev_kfree_skb_any(empty);</div><div class='add'>+		/* Reset the launch time if the required empty frame fails to</div><div class='add'>+		 * be inserted. However, this packet is not dropped, so it</div><div class='add'>+		 * "dirties" the current Qbv cycle. This ensures that the</div><div class='add'>+		 * upcoming packet, which is scheduled in the next Qbv cycle,</div><div class='add'>+		 * does not require an empty frame. This way, the launch time</div><div class='add'>+		 * continues to function correctly despite the current failure</div><div class='add'>+		 * to insert the empty frame.</div><div class='add'>+		 */</div><div class='add'>+		if (igc_insert_empty_frame(tx_ring))</div><div class='add'>+			launch_time = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='hunk'>@@ -1649,7 +1666,8 @@ done:</div><div class='ctx'> 		if (igc_request_tx_tstamp(adapter, skb, &amp;tstamp_flags)) {</div><div class='ctx'> 			skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='ctx'> 			tx_flags |= IGC_TX_FLAGS_TSTAMP | tstamp_flags;</div><div class='del'>-			if (skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP_USE_CYCLES)</div><div class='add'>+			if (skb-&gt;sk &amp;&amp;</div><div class='add'>+			    READ_ONCE(skb-&gt;sk-&gt;sk_tsflags) &amp; SOF_TIMESTAMPING_BIND_PHC)</div><div class='ctx'> 				tx_flags |= IGC_TX_FLAGS_TSTAMP_TIMER_1;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			adapter-&gt;tx_hwtstamp_skipped++;</div><div class='hunk'>@@ -1667,6 +1685,15 @@ done:</div><div class='ctx'> 	first-&gt;tx_flags = tx_flags;</div><div class='ctx'> 	first-&gt;protocol = protocol;</div><div class='ctx'> </div><div class='add'>+	/* For preemptible queue, manually pad the skb so that HW includes</div><div class='add'>+	 * padding bytes in mCRC calculation</div><div class='add'>+	 */</div><div class='add'>+	if (tx_ring-&gt;preemptible &amp;&amp; skb-&gt;len &lt; ETH_ZLEN) {</div><div class='add'>+		if (skb_padto(skb, ETH_ZLEN))</div><div class='add'>+			goto out_drop;</div><div class='add'>+		skb_put(skb, ETH_ZLEN - skb-&gt;len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	tso = igc_tso(tx_ring, first, launch_time, first_flag, &amp;hdr_len);</div><div class='ctx'> 	if (tso &lt; 0)</div><div class='ctx'> 		goto out_drop;</div><div class='hunk'>@@ -2123,10 +2150,6 @@ static bool igc_cleanup_headers(struct igc_ring *rx_ring,</div><div class='ctx'> 				union igc_adv_rx_desc *rx_desc,</div><div class='ctx'> 				struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	/* XDP packets use error pointer so abort at this point */</div><div class='del'>-	if (IS_ERR(skb))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='ctx'> 	if (unlikely(igc_test_staterr(rx_desc, IGC_RXDEXT_STATERR_RXE))) {</div><div class='ctx'> 		struct net_device *netdev = rx_ring-&gt;netdev;</div><div class='ctx'> </div><div class='hunk'>@@ -2448,8 +2471,7 @@ unmap:</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct igc_ring *igc_xdp_get_tx_ring(struct igc_adapter *adapter,</div><div class='del'>-					    int cpu)</div><div class='add'>+struct igc_ring *igc_get_tx_ring(struct igc_adapter *adapter, int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	int index = cpu;</div><div class='ctx'> </div><div class='hunk'>@@ -2473,7 +2495,7 @@ static int igc_xdp_xmit_back(struct igc_adapter *adapter, struct xdp_buff *xdp)</div><div class='ctx'> 	if (unlikely(!xdpf))</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	ring = igc_xdp_get_tx_ring(adapter, cpu);</div><div class='add'>+	ring = igc_get_tx_ring(adapter, cpu);</div><div class='ctx'> 	nq = txring_txq(ring);</div><div class='ctx'> </div><div class='ctx'> 	__netif_tx_lock(nq, cpu);</div><div class='hunk'>@@ -2515,8 +2537,7 @@ out_failure:</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct sk_buff *igc_xdp_run_prog(struct igc_adapter *adapter,</div><div class='del'>-					struct xdp_buff *xdp)</div><div class='add'>+static int igc_xdp_run_prog(struct igc_adapter *adapter, struct xdp_buff *xdp)</div><div class='ctx'> {</div><div class='ctx'> 	struct bpf_prog *prog;</div><div class='ctx'> 	int res;</div><div class='hunk'>@@ -2530,11 +2551,11 @@ static struct sk_buff *igc_xdp_run_prog(struct igc_adapter *adapter,</div><div class='ctx'> 	res = __igc_xdp_run_prog(adapter, prog, xdp);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	return ERR_PTR(-res);</div><div class='add'>+	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* This function assumes __netif_tx_lock is held by the caller. */</div><div class='del'>-static void igc_flush_tx_descriptors(struct igc_ring *ring)</div><div class='add'>+void igc_flush_tx_descriptors(struct igc_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	/* Once tail pointer is updated, hardware can fetch the descriptors</div><div class='ctx'> 	 * any time so we issue a write membar here to ensure all memory</div><div class='hunk'>@@ -2551,7 +2572,7 @@ static void igc_finalize_xdp(struct igc_adapter *adapter, int status)</div><div class='ctx'> 	struct igc_ring *ring;</div><div class='ctx'> </div><div class='ctx'> 	if (status &amp; IGC_XDP_TX) {</div><div class='del'>-		ring = igc_xdp_get_tx_ring(adapter, cpu);</div><div class='add'>+		ring = igc_get_tx_ring(adapter, cpu);</div><div class='ctx'> 		nq = txring_txq(ring);</div><div class='ctx'> </div><div class='ctx'> 		__netif_tx_lock(nq, cpu);</div><div class='hunk'>@@ -2585,6 +2606,7 @@ static int igc_clean_rx_irq(struct igc_q_vector *q_vector, const int budget)</div><div class='ctx'> 	struct sk_buff *skb = rx_ring-&gt;skb;</div><div class='ctx'> 	u16 cleaned_count = igc_desc_unused(rx_ring);</div><div class='ctx'> 	int xdp_status = 0, rx_buffer_pgcnt;</div><div class='add'>+	int xdp_res = 0;</div><div class='ctx'> </div><div class='ctx'> 	while (likely(total_packets &lt; budget)) {</div><div class='ctx'> 		struct igc_xdp_buff ctx = { .rx_ts = NULL };</div><div class='hunk'>@@ -2622,6 +2644,14 @@ static int igc_clean_rx_irq(struct igc_q_vector *q_vector, const int budget)</div><div class='ctx'> 			size -= IGC_TS_HDR_LEN;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (igc_fpe_is_pmac_enabled(adapter) &amp;&amp;</div><div class='add'>+		    igc_fpe_handle_mpacket(adapter, rx_desc, size, pktbuf)) {</div><div class='add'>+			/* Advance the ring next-to-clean */</div><div class='add'>+			igc_is_non_eop(rx_ring, rx_desc);</div><div class='add'>+			cleaned_count++;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (!skb) {</div><div class='ctx'> 			xdp_init_buff(&amp;ctx.xdp, truesize, &amp;rx_ring-&gt;xdp_rxq);</div><div class='ctx'> 			xdp_prepare_buff(&amp;ctx.xdp, pktbuf - igc_rx_offset(rx_ring),</div><div class='hunk'>@@ -2630,12 +2660,10 @@ static int igc_clean_rx_irq(struct igc_q_vector *q_vector, const int budget)</div><div class='ctx'> 			xdp_buff_clear_frags_flag(&amp;ctx.xdp);</div><div class='ctx'> 			ctx.rx_desc = rx_desc;</div><div class='ctx'> </div><div class='del'>-			skb = igc_xdp_run_prog(adapter, &amp;ctx.xdp);</div><div class='add'>+			xdp_res = igc_xdp_run_prog(adapter, &amp;ctx.xdp);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (IS_ERR(skb)) {</div><div class='del'>-			unsigned int xdp_res = -PTR_ERR(skb);</div><div class='del'>-</div><div class='add'>+		if (xdp_res) {</div><div class='ctx'> 			switch (xdp_res) {</div><div class='ctx'> 			case IGC_XDP_CONSUMED:</div><div class='ctx'> 				rx_buffer-&gt;pagecnt_bias++;</div><div class='hunk'>@@ -2657,7 +2685,7 @@ static int igc_clean_rx_irq(struct igc_q_vector *q_vector, const int budget)</div><div class='ctx'> 			skb = igc_construct_skb(rx_ring, rx_buffer, &amp;ctx);</div><div class='ctx'> </div><div class='ctx'> 		/* exit if we failed to retrieve a buffer */</div><div class='del'>-		if (!skb) {</div><div class='add'>+		if (!xdp_res &amp;&amp; !skb) {</div><div class='ctx'> 			rx_ring-&gt;rx_stats.alloc_failed++;</div><div class='ctx'> 			rx_buffer-&gt;pagecnt_bias++;</div><div class='ctx'> 			set_bit(IGC_RING_FLAG_RX_ALLOC_FAILED, &amp;rx_ring-&gt;flags);</div><div class='hunk'>@@ -2672,7 +2700,7 @@ static int igc_clean_rx_irq(struct igc_q_vector *q_vector, const int budget)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* verify the packet layout is correct */</div><div class='del'>-		if (igc_cleanup_headers(rx_ring, rx_desc, skb)) {</div><div class='add'>+		if (xdp_res || igc_cleanup_headers(rx_ring, rx_desc, skb)) {</div><div class='ctx'> 			skb = NULL;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2707,8 +2735,9 @@ static int igc_clean_rx_irq(struct igc_q_vector *q_vector, const int budget)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct sk_buff *igc_construct_skb_zc(struct igc_ring *ring,</div><div class='del'>-					    struct xdp_buff *xdp)</div><div class='add'>+					    struct igc_xdp_buff *ctx)</div><div class='ctx'> {</div><div class='add'>+	struct xdp_buff *xdp = &amp;ctx-&gt;xdp;</div><div class='ctx'> 	unsigned int totalsize = xdp-&gt;data_end - xdp-&gt;data_meta;</div><div class='ctx'> 	unsigned int metasize = xdp-&gt;data - xdp-&gt;data_meta;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -2727,27 +2756,28 @@ static struct sk_buff *igc_construct_skb_zc(struct igc_ring *ring,</div><div class='ctx'> 		__skb_pull(skb, metasize);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ctx-&gt;rx_ts) {</div><div class='add'>+		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_HW_TSTAMP_NETDEV;</div><div class='add'>+		skb_hwtstamps(skb)-&gt;netdev_data = ctx-&gt;rx_ts;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void igc_dispatch_skb_zc(struct igc_q_vector *q_vector,</div><div class='ctx'> 				union igc_adv_rx_desc *desc,</div><div class='del'>-				struct xdp_buff *xdp,</div><div class='del'>-				ktime_t timestamp)</div><div class='add'>+				struct igc_xdp_buff *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_ring *ring = q_vector-&gt;rx.ring;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='del'>-	skb = igc_construct_skb_zc(ring, xdp);</div><div class='add'>+	skb = igc_construct_skb_zc(ring, ctx);</div><div class='ctx'> 	if (!skb) {</div><div class='ctx'> 		ring-&gt;rx_stats.alloc_failed++;</div><div class='ctx'> 		set_bit(IGC_RING_FLAG_RX_ALLOC_FAILED, &amp;ring-&gt;flags);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (timestamp)</div><div class='del'>-		skb_hwtstamps(skb)-&gt;hwtstamp = timestamp;</div><div class='del'>-</div><div class='ctx'> 	if (igc_cleanup_headers(ring, desc, skb))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -2783,7 +2813,6 @@ static int igc_clean_rx_irq_zc(struct igc_q_vector *q_vector, const int budget)</div><div class='ctx'> 		union igc_adv_rx_desc *desc;</div><div class='ctx'> 		struct igc_rx_buffer *bi;</div><div class='ctx'> 		struct igc_xdp_buff *ctx;</div><div class='del'>-		ktime_t timestamp = 0;</div><div class='ctx'> 		unsigned int size;</div><div class='ctx'> 		int res;</div><div class='ctx'> </div><div class='hunk'>@@ -2813,6 +2842,8 @@ static int igc_clean_rx_irq_zc(struct igc_q_vector *q_vector, const int budget)</div><div class='ctx'> 			 */</div><div class='ctx'> 			bi-&gt;xdp-&gt;data_meta += IGC_TS_HDR_LEN;</div><div class='ctx'> 			size -= IGC_TS_HDR_LEN;</div><div class='add'>+		} else {</div><div class='add'>+			ctx-&gt;rx_ts = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		bi-&gt;xdp-&gt;data_end = bi-&gt;xdp-&gt;data + size;</div><div class='hunk'>@@ -2821,7 +2852,7 @@ static int igc_clean_rx_irq_zc(struct igc_q_vector *q_vector, const int budget)</div><div class='ctx'> 		res = __igc_xdp_run_prog(adapter, prog, bi-&gt;xdp);</div><div class='ctx'> 		switch (res) {</div><div class='ctx'> 		case IGC_XDP_PASS:</div><div class='del'>-			igc_dispatch_skb_zc(q_vector, desc, bi-&gt;xdp, timestamp);</div><div class='add'>+			igc_dispatch_skb_zc(q_vector, desc, ctx);</div><div class='ctx'> 			fallthrough;</div><div class='ctx'> 		case IGC_XDP_CONSUMED:</div><div class='ctx'> 			xsk_buff_free(bi-&gt;xdp);</div><div class='hunk'>@@ -2955,9 +2986,48 @@ static u64 igc_xsk_fill_timestamp(void *_priv)</div><div class='ctx'> 	return *(u64 *)_priv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void igc_xsk_request_launch_time(u64 launch_time, void *_priv)</div><div class='add'>+{</div><div class='add'>+	struct igc_metadata_request *meta_req = _priv;</div><div class='add'>+	struct igc_ring *tx_ring = meta_req-&gt;tx_ring;</div><div class='add'>+	__le32 launch_time_offset;</div><div class='add'>+	bool insert_empty = false;</div><div class='add'>+	bool first_flag = false;</div><div class='add'>+	u16 used_desc = 0;</div><div class='add'>+</div><div class='add'>+	if (!tx_ring-&gt;launchtime_enable)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	launch_time_offset = igc_tx_launchtime(tx_ring,</div><div class='add'>+					       ns_to_ktime(launch_time),</div><div class='add'>+					       &amp;first_flag, &amp;insert_empty);</div><div class='add'>+	if (insert_empty) {</div><div class='add'>+		/* Disregard the launch time request if the required empty frame</div><div class='add'>+		 * fails to be inserted.</div><div class='add'>+		 */</div><div class='add'>+		if (igc_insert_empty_frame(tx_ring))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		meta_req-&gt;tx_buffer =</div><div class='add'>+			&amp;tx_ring-&gt;tx_buffer_info[tx_ring-&gt;next_to_use];</div><div class='add'>+		/* Inserting an empty packet requires two descriptors:</div><div class='add'>+		 * one data descriptor and one context descriptor.</div><div class='add'>+		 */</div><div class='add'>+		used_desc += 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Use one context descriptor to specify launch time and first flag. */</div><div class='add'>+	igc_tx_ctxtdesc(tx_ring, launch_time_offset, first_flag, 0, 0, 0);</div><div class='add'>+	used_desc += 1;</div><div class='add'>+</div><div class='add'>+	/* Update the number of used descriptors in this request */</div><div class='add'>+	meta_req-&gt;used_desc += used_desc;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct xsk_tx_metadata_ops igc_xsk_tx_metadata_ops = {</div><div class='ctx'> 	.tmo_request_timestamp		= igc_xsk_request_timestamp,</div><div class='ctx'> 	.tmo_fill_timestamp		= igc_xsk_fill_timestamp,</div><div class='add'>+	.tmo_request_launch_time	= igc_xsk_request_launch_time,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void igc_xdp_xmit_zc(struct igc_ring *ring)</div><div class='hunk'>@@ -2980,7 +3050,13 @@ static void igc_xdp_xmit_zc(struct igc_ring *ring)</div><div class='ctx'> 	ntu = ring-&gt;next_to_use;</div><div class='ctx'> 	budget = igc_desc_unused(ring);</div><div class='ctx'> </div><div class='del'>-	while (xsk_tx_peek_desc(pool, &amp;xdp_desc) &amp;&amp; budget--) {</div><div class='add'>+	/* Packets with launch time require one data descriptor and one context</div><div class='add'>+	 * descriptor. When the launch time falls into the next Qbv cycle, we</div><div class='add'>+	 * may need to insert an empty packet, which requires two more</div><div class='add'>+	 * descriptors. Therefore, to be safe, we always ensure we have at least</div><div class='add'>+	 * 4 descriptors available.</div><div class='add'>+	 */</div><div class='add'>+	while (budget &gt;= 4 &amp;&amp; xsk_tx_peek_desc(pool, &amp;xdp_desc)) {</div><div class='ctx'> 		struct igc_metadata_request meta_req;</div><div class='ctx'> 		struct xsk_tx_metadata *meta = NULL;</div><div class='ctx'> 		struct igc_tx_buffer *bi;</div><div class='hunk'>@@ -3001,9 +3077,19 @@ static void igc_xdp_xmit_zc(struct igc_ring *ring)</div><div class='ctx'> 		meta_req.tx_ring = ring;</div><div class='ctx'> 		meta_req.tx_buffer = bi;</div><div class='ctx'> 		meta_req.meta = meta;</div><div class='add'>+		meta_req.used_desc = 0;</div><div class='ctx'> 		xsk_tx_metadata_request(meta, &amp;igc_xsk_tx_metadata_ops,</div><div class='ctx'> 					&amp;meta_req);</div><div class='ctx'> </div><div class='add'>+		/* xsk_tx_metadata_request() may have updated next_to_use */</div><div class='add'>+		ntu = ring-&gt;next_to_use;</div><div class='add'>+</div><div class='add'>+		/* xsk_tx_metadata_request() may have updated Tx buffer info */</div><div class='add'>+		bi = meta_req.tx_buffer;</div><div class='add'>+</div><div class='add'>+		/* xsk_tx_metadata_request() may use a few descriptors */</div><div class='add'>+		budget -= meta_req.used_desc;</div><div class='add'>+</div><div class='ctx'> 		tx_desc = IGC_TX_DESC(ring, ntu);</div><div class='ctx'> 		tx_desc-&gt;read.cmd_type_len = cpu_to_le32(meta_req.cmd_type);</div><div class='ctx'> 		tx_desc-&gt;read.olinfo_status = cpu_to_le32(olinfo_status);</div><div class='hunk'>@@ -3021,9 +3107,11 @@ static void igc_xdp_xmit_zc(struct igc_ring *ring)</div><div class='ctx'> 		ntu++;</div><div class='ctx'> 		if (ntu == ring-&gt;count)</div><div class='ctx'> 			ntu = 0;</div><div class='add'>+</div><div class='add'>+		ring-&gt;next_to_use = ntu;</div><div class='add'>+		budget--;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ring-&gt;next_to_use = ntu;</div><div class='ctx'> 	if (tx_desc) {</div><div class='ctx'> 		igc_flush_tx_descriptors(ring);</div><div class='ctx'> 		xsk_tx_release(pool);</div><div class='hunk'>@@ -3071,6 +3159,11 @@ static bool igc_clean_tx_irq(struct igc_q_vector *q_vector, int napi_budget)</div><div class='ctx'> 		if (!(eop_desc-&gt;wb.status &amp; cpu_to_le32(IGC_TXD_STAT_DD)))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		if (igc_fpe_is_pmac_enabled(adapter) &amp;&amp;</div><div class='add'>+		    igc_fpe_transmitted_smd_v(tx_desc))</div><div class='add'>+			ethtool_mmsv_event_handle(&amp;adapter-&gt;fpe.mmsv,</div><div class='add'>+						  ETHTOOL_MMSV_LD_SENT_VERIFY_MPACKET);</div><div class='add'>+</div><div class='ctx'> 		/* Hold the completions while there's a pending tx hardware</div><div class='ctx'> 		 * timestamp request from XDP Tx metadata.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -3781,6 +3874,22 @@ static void igc_del_flex_filter(struct igc_adapter *adapter,</div><div class='ctx'> 	wr32(IGC_WUFC, wufc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void igc_set_default_queue_filter(struct igc_adapter *adapter, u32 queue)</div><div class='add'>+{</div><div class='add'>+	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u32 mrqc = rd32(IGC_MRQC);</div><div class='add'>+</div><div class='add'>+	mrqc &amp;= ~IGC_MRQC_DEFAULT_QUEUE_MASK;</div><div class='add'>+	mrqc |= FIELD_PREP(IGC_MRQC_DEFAULT_QUEUE_MASK, queue);</div><div class='add'>+	wr32(IGC_MRQC, mrqc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void igc_reset_default_queue_filter(struct igc_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	/* Reset the default queue to its default value which is Queue 0 */</div><div class='add'>+	igc_set_default_queue_filter(adapter, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int igc_enable_nfc_rule(struct igc_adapter *adapter,</div><div class='ctx'> 			       struct igc_nfc_rule *rule)</div><div class='ctx'> {</div><div class='hunk'>@@ -3819,6 +3928,9 @@ static int igc_enable_nfc_rule(struct igc_adapter *adapter,</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (rule-&gt;filter.match_flags &amp; IGC_FILTER_FLAG_DEFAULT_QUEUE)</div><div class='add'>+		igc_set_default_queue_filter(adapter, rule-&gt;action);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3846,6 +3958,9 @@ static void igc_disable_nfc_rule(struct igc_adapter *adapter,</div><div class='ctx'> 	if (rule-&gt;filter.match_flags &amp; IGC_FILTER_FLAG_DST_MAC_ADDR)</div><div class='ctx'> 		igc_del_mac_filter(adapter, IGC_MAC_FILTER_TYPE_DST,</div><div class='ctx'> 				   rule-&gt;filter.dst_addr);</div><div class='add'>+</div><div class='add'>+	if (rule-&gt;filter.match_flags &amp; IGC_FILTER_FLAG_DEFAULT_QUEUE)</div><div class='add'>+		igc_reset_default_queue_filter(adapter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3963,6 +4078,30 @@ static int igc_uc_unsync(struct net_device *netdev, const unsigned char *addr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * igc_enable_empty_addr_recv - Enable Rx of packets with all-zeroes MAC address</div><div class='add'>+ * @adapter: Pointer to the igc_adapter structure.</div><div class='add'>+ *</div><div class='add'>+ * Frame preemption verification requires that packets with the all-zeroes</div><div class='add'>+ * MAC address are allowed to be received by the driver. This function adds the</div><div class='add'>+ * all-zeroes destination address to the list of acceptable addresses.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int igc_enable_empty_addr_recv(struct igc_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u8 empty[ETH_ALEN] = {};</div><div class='add'>+</div><div class='add'>+	return igc_add_mac_filter(adapter, IGC_MAC_FILTER_TYPE_DST, empty, -1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void igc_disable_empty_addr_recv(struct igc_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u8 empty[ETH_ALEN] = {};</div><div class='add'>+</div><div class='add'>+	igc_del_mac_filter(adapter, IGC_MAC_FILTER_TYPE_DST, empty);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * igc_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set</div><div class='ctx'>  * @netdev: network interface device structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -4948,6 +5087,22 @@ static int igc_sw_init(struct igc_adapter *adapter)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void igc_set_queue_napi(struct igc_adapter *adapter, int vector,</div><div class='add'>+			       struct napi_struct *napi)</div><div class='add'>+{</div><div class='add'>+	struct igc_q_vector *q_vector = adapter-&gt;q_vector[vector];</div><div class='add'>+</div><div class='add'>+	if (q_vector-&gt;rx.ring)</div><div class='add'>+		netif_queue_set_napi(adapter-&gt;netdev,</div><div class='add'>+				     q_vector-&gt;rx.ring-&gt;queue_index,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_RX, napi);</div><div class='add'>+</div><div class='add'>+	if (q_vector-&gt;tx.ring)</div><div class='add'>+		netif_queue_set_napi(adapter-&gt;netdev,</div><div class='add'>+				     q_vector-&gt;tx.ring-&gt;queue_index,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_TX, napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * igc_up - Open the interface and prepare it to handle traffic</div><div class='ctx'>  * @adapter: board private structure</div><div class='hunk'>@@ -4955,6 +5110,7 @@ static int igc_sw_init(struct igc_adapter *adapter)</div><div class='ctx'> void igc_up(struct igc_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct napi_struct *napi;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* hardware has been reset, we need to reload some things */</div><div class='hunk'>@@ -4962,8 +5118,11 @@ void igc_up(struct igc_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(__IGC_DOWN, &amp;adapter-&gt;state);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++)</div><div class='del'>-		napi_enable(&amp;adapter-&gt;q_vector[i]-&gt;napi);</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++) {</div><div class='add'>+		napi = &amp;adapter-&gt;q_vector[i]-&gt;napi;</div><div class='add'>+		napi_enable(napi);</div><div class='add'>+		igc_set_queue_napi(adapter, i, napi);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;msix_entries)</div><div class='ctx'> 		igc_configure_msix(adapter);</div><div class='hunk'>@@ -5192,12 +5351,13 @@ void igc_down(struct igc_adapter *adapter)</div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++) {</div><div class='ctx'> 		if (adapter-&gt;q_vector[i]) {</div><div class='ctx'> 			napi_synchronize(&amp;adapter-&gt;q_vector[i]-&gt;napi);</div><div class='add'>+			igc_set_queue_napi(adapter, i, NULL);</div><div class='ctx'> 			napi_disable(&amp;adapter-&gt;q_vector[i]-&gt;napi);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* record the stats before reset*/</div><div class='ctx'> 	spin_lock(&amp;adapter-&gt;stats64_lock);</div><div class='hunk'>@@ -5216,6 +5376,9 @@ void igc_down(struct igc_adapter *adapter)</div><div class='ctx'> 	igc_disable_all_tx_rings_hw(adapter);</div><div class='ctx'> 	igc_clean_all_tx_rings(adapter);</div><div class='ctx'> 	igc_clean_all_rx_rings(adapter);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;fpe.mmsv.pmac_enabled)</div><div class='add'>+		ethtool_mmsv_stop(&amp;adapter-&gt;fpe.mmsv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void igc_reinit_locked(struct igc_adapter *adapter)</div><div class='hunk'>@@ -5576,6 +5739,9 @@ static int igc_request_msix(struct igc_adapter *adapter)</div><div class='ctx'> 				  q_vector);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_free;</div><div class='add'>+</div><div class='add'>+		netif_napi_set_irq(&amp;q_vector-&gt;napi,</div><div class='add'>+				   adapter-&gt;msix_entries[vector].vector);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	igc_configure_msix(adapter);</div><div class='hunk'>@@ -5612,7 +5778,8 @@ static void igc_clear_interrupt_scheme(struct igc_adapter *adapter)</div><div class='ctx'>  */</div><div class='ctx'> static void igc_update_phy_info(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct igc_adapter *adapter = from_timer(adapter, t, phy_info_timer);</div><div class='add'>+	struct igc_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							 phy_info_timer);</div><div class='ctx'> </div><div class='ctx'> 	igc_get_phy_info(&amp;adapter-&gt;hw);</div><div class='ctx'> }</div><div class='hunk'>@@ -5654,7 +5821,8 @@ bool igc_has_link(struct igc_adapter *adapter)</div><div class='ctx'>  */</div><div class='ctx'> static void igc_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct igc_adapter *adapter = from_timer(adapter, t, watchdog_timer);</div><div class='add'>+	struct igc_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							 watchdog_timer);</div><div class='ctx'> 	/* Do the rest outside of interrupt context */</div><div class='ctx'> 	schedule_work(&amp;adapter-&gt;watchdog_task);</div><div class='ctx'> }</div><div class='hunk'>@@ -5737,6 +5905,10 @@ static void igc_watchdog_task(struct work_struct *work)</div><div class='ctx'> 			 */</div><div class='ctx'> 			igc_tsn_adjust_txtime_offset(adapter);</div><div class='ctx'> </div><div class='add'>+			if (adapter-&gt;fpe.mmsv.pmac_enabled)</div><div class='add'>+				ethtool_mmsv_link_state_handle(&amp;adapter-&gt;fpe.mmsv,</div><div class='add'>+							       true);</div><div class='add'>+</div><div class='ctx'> 			if (adapter-&gt;link_speed != SPEED_1000)</div><div class='ctx'> 				goto no_wait;</div><div class='ctx'> </div><div class='hunk'>@@ -5772,6 +5944,10 @@ no_wait:</div><div class='ctx'> 			netdev_info(netdev, "NIC Link is Down\n");</div><div class='ctx'> 			netif_carrier_off(netdev);</div><div class='ctx'> </div><div class='add'>+			if (adapter-&gt;fpe.mmsv.pmac_enabled)</div><div class='add'>+				ethtool_mmsv_link_state_handle(&amp;adapter-&gt;fpe.mmsv,</div><div class='add'>+							       false);</div><div class='add'>+</div><div class='ctx'> 			/* link state has changed, schedule phy info update */</div><div class='ctx'> 			if (!test_bit(__IGC_DOWN, &amp;adapter-&gt;state))</div><div class='ctx'> 				mod_timer(&amp;adapter-&gt;phy_info_timer,</div><div class='hunk'>@@ -6018,6 +6194,7 @@ static int __igc_open(struct net_device *netdev, bool resuming)</div><div class='ctx'> 	struct igc_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='ctx'> 	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct napi_struct *napi;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -6053,8 +6230,11 @@ static int __igc_open(struct net_device *netdev, bool resuming)</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(__IGC_DOWN, &amp;adapter-&gt;state);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++)</div><div class='del'>-		napi_enable(&amp;adapter-&gt;q_vector[i]-&gt;napi);</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_q_vectors; i++) {</div><div class='add'>+		napi = &amp;adapter-&gt;q_vector[i]-&gt;napi;</div><div class='add'>+		napi_enable(napi);</div><div class='add'>+		igc_set_queue_napi(adapter, i, napi);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Clear any pending interrupts. */</div><div class='ctx'> 	rd32(IGC_ICR);</div><div class='hunk'>@@ -6145,24 +6325,6 @@ int igc_close(struct net_device *netdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * igc_ioctl - Access the hwtstamp interface</div><div class='del'>- * @netdev: network interface device structure</div><div class='del'>- * @ifr: interface request data</div><div class='del'>- * @cmd: ioctl command</div><div class='del'>- **/</div><div class='del'>-static int igc_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return igc_ptp_get_ts_config(netdev, ifr);</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return igc_ptp_set_ts_config(netdev, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int igc_save_launchtime_params(struct igc_adapter *adapter, int queue,</div><div class='ctx'> 				      bool enable)</div><div class='ctx'> {</div><div class='hunk'>@@ -6272,6 +6434,7 @@ static int igc_qbv_clear_schedule(struct igc_adapter *adapter)</div><div class='ctx'> 		ring-&gt;start_time = 0;</div><div class='ctx'> 		ring-&gt;end_time = NSEC_PER_SEC;</div><div class='ctx'> 		ring-&gt;max_sdu = 0;</div><div class='add'>+		ring-&gt;preemptible = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;adapter-&gt;qbv_tx_lock, flags);</div><div class='hunk'>@@ -6337,6 +6500,13 @@ static int igc_save_qbv_schedule(struct igc_adapter *adapter,</div><div class='ctx'> 	if (!validate_schedule(adapter, qopt))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (qopt-&gt;mqprio.preemptible_tcs &amp;&amp;</div><div class='add'>+	    !(adapter-&gt;flags &amp; IGC_FLAG_TSN_REVERSE_TXQ_PRIO)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(qopt-&gt;extack,</div><div class='add'>+				   "reverse-tsn-txq-prio private flag must be enabled before setting preemptible tc");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	igc_ptp_read(adapter, &amp;now);</div><div class='ctx'> </div><div class='ctx'> 	if (igc_tsn_is_taprio_activated_by_user(adapter) &amp;&amp;</div><div class='hunk'>@@ -6428,6 +6598,8 @@ static int igc_save_qbv_schedule(struct igc_adapter *adapter,</div><div class='ctx'> 			ring-&gt;max_sdu = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	igc_fpe_save_preempt_queue(adapter, &amp;qopt-&gt;mqprio);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6547,7 +6719,8 @@ static int igc_tc_query_caps(struct igc_adapter *adapter,</div><div class='ctx'> 	case TC_SETUP_QDISC_TAPRIO: {</div><div class='ctx'> 		struct tc_taprio_caps *caps = base-&gt;caps;</div><div class='ctx'> </div><div class='del'>-		caps-&gt;broken_mqprio = true;</div><div class='add'>+		if (!(adapter-&gt;flags &amp; IGC_FLAG_TSN_REVERSE_TXQ_PRIO))</div><div class='add'>+			caps-&gt;broken_mqprio = true;</div><div class='ctx'> </div><div class='ctx'> 		if (hw-&gt;mac.type == igc_i225) {</div><div class='ctx'> 			caps-&gt;supports_queue_max_sdu = true;</div><div class='hunk'>@@ -6573,17 +6746,33 @@ static void igc_save_mqprio_params(struct igc_adapter *adapter, u8 num_tc,</div><div class='ctx'> 		adapter-&gt;queue_per_tc[i] = offset[i];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+igc_tsn_is_tc_to_queue_priority_ordered(struct tc_mqprio_qopt_offload *mqprio)</div><div class='add'>+{</div><div class='add'>+	int num_tc = mqprio-&gt;qopt.num_tc;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; num_tc; i++) {</div><div class='add'>+		if (mqprio-&gt;qopt.offset[i - 1] &gt; mqprio-&gt;qopt.offset[i])</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int igc_tsn_enable_mqprio(struct igc_adapter *adapter,</div><div class='ctx'> 				 struct tc_mqprio_qopt_offload *mqprio)</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-	int i;</div><div class='add'>+	int err, i;</div><div class='ctx'> </div><div class='ctx'> 	if (hw-&gt;mac.type != igc_i225)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	if (!mqprio-&gt;qopt.num_tc) {</div><div class='ctx'> 		adapter-&gt;strict_priority_enable = false;</div><div class='add'>+		igc_fpe_clear_preempt_queue(adapter);</div><div class='add'>+		netdev_reset_tc(adapter-&gt;netdev);</div><div class='ctx'> 		goto apply;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6604,17 +6793,32 @@ static int igc_tsn_enable_mqprio(struct igc_adapter *adapter,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Preemption is not supported yet. */</div><div class='del'>-	if (mqprio-&gt;preemptible_tcs) {</div><div class='add'>+	if (!igc_tsn_is_tc_to_queue_priority_ordered(mqprio)) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(mqprio-&gt;extack,</div><div class='del'>-				   "Preemption is not supported yet");</div><div class='add'>+				   "tc to queue mapping must preserve increasing priority (higher tc -&gt; higher queue)");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	igc_save_mqprio_params(adapter, mqprio-&gt;qopt.num_tc,</div><div class='ctx'> 			       mqprio-&gt;qopt.offset);</div><div class='ctx'> </div><div class='add'>+	err = netdev_set_num_tc(adapter-&gt;netdev, adapter-&gt;num_tc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_tc; i++) {</div><div class='add'>+		err = netdev_set_tc_queue(adapter-&gt;netdev, i, 1,</div><div class='add'>+					  adapter-&gt;queue_per_tc[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* In case the card is configured with less than four queues. */</div><div class='add'>+	for (; i &lt; IGC_MAX_TX_QUEUES; i++)</div><div class='add'>+		adapter-&gt;queue_per_tc[i] = i;</div><div class='add'>+</div><div class='ctx'> 	mqprio-&gt;qopt.hw = TC_MQPRIO_HW_OFFLOAD_TCS;</div><div class='add'>+	igc_fpe_save_preempt_queue(adapter, mqprio);</div><div class='ctx'> </div><div class='ctx'> apply:</div><div class='ctx'> 	return igc_tsn_offload_apply(adapter);</div><div class='hunk'>@@ -6677,7 +6881,7 @@ static int igc_xdp_xmit(struct net_device *dev, int num_frames,</div><div class='ctx'> 	if (unlikely(flags &amp; ~XDP_XMIT_FLAGS_MASK))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	ring = igc_xdp_get_tx_ring(adapter, cpu);</div><div class='add'>+	ring = igc_get_tx_ring(adapter, cpu);</div><div class='ctx'> 	nq = txring_txq(ring);</div><div class='ctx'> </div><div class='ctx'> 	__netif_tx_lock(nq, cpu);</div><div class='hunk'>@@ -6771,53 +6975,15 @@ static const struct net_device_ops igc_netdev_ops = {</div><div class='ctx'> 	.ndo_fix_features	= igc_fix_features,</div><div class='ctx'> 	.ndo_set_features	= igc_set_features,</div><div class='ctx'> 	.ndo_features_check	= igc_features_check,</div><div class='del'>-	.ndo_eth_ioctl		= igc_ioctl,</div><div class='ctx'> 	.ndo_setup_tc		= igc_setup_tc,</div><div class='ctx'> 	.ndo_bpf		= igc_bpf,</div><div class='ctx'> 	.ndo_xdp_xmit		= igc_xdp_xmit,</div><div class='ctx'> 	.ndo_xsk_wakeup		= igc_xsk_wakeup,</div><div class='ctx'> 	.ndo_get_tstamp		= igc_get_tstamp,</div><div class='add'>+	.ndo_hwtstamp_get	= igc_ptp_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= igc_ptp_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* PCIe configuration access */</div><div class='del'>-void igc_read_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value)</div><div class='del'>-{</div><div class='del'>-	struct igc_adapter *adapter = hw-&gt;back;</div><div class='del'>-</div><div class='del'>-	pci_read_config_word(adapter-&gt;pdev, reg, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void igc_write_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value)</div><div class='del'>-{</div><div class='del'>-	struct igc_adapter *adapter = hw-&gt;back;</div><div class='del'>-</div><div class='del'>-	pci_write_config_word(adapter-&gt;pdev, reg, *value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-s32 igc_read_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value)</div><div class='del'>-{</div><div class='del'>-	struct igc_adapter *adapter = hw-&gt;back;</div><div class='del'>-</div><div class='del'>-	if (!pci_is_pcie(adapter-&gt;pdev))</div><div class='del'>-		return -IGC_ERR_CONFIG;</div><div class='del'>-</div><div class='del'>-	pcie_capability_read_word(adapter-&gt;pdev, reg, value);</div><div class='del'>-</div><div class='del'>-	return IGC_SUCCESS;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-s32 igc_write_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value)</div><div class='del'>-{</div><div class='del'>-	struct igc_adapter *adapter = hw-&gt;back;</div><div class='del'>-</div><div class='del'>-	if (!pci_is_pcie(adapter-&gt;pdev))</div><div class='del'>-		return -IGC_ERR_CONFIG;</div><div class='del'>-</div><div class='del'>-	pcie_capability_write_word(adapter-&gt;pdev, reg, *value);</div><div class='del'>-</div><div class='del'>-	return IGC_SUCCESS;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> u32 igc_rd32(struct igc_hw *hw, u32 reg)</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_adapter *igc = container_of(hw, struct igc_adapter, hw);</div><div class='hunk'>@@ -6983,6 +7149,17 @@ static int igc_probe(struct pci_dev *pdev,</div><div class='ctx'> 	adapter-&gt;port_num = hw-&gt;bus.func;</div><div class='ctx'> 	adapter-&gt;msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);</div><div class='ctx'> </div><div class='add'>+	/* PCI config space info */</div><div class='add'>+	hw-&gt;vendor_id = pdev-&gt;vendor;</div><div class='add'>+	hw-&gt;device_id = pdev-&gt;device;</div><div class='add'>+	hw-&gt;revision_id = pdev-&gt;revision;</div><div class='add'>+	hw-&gt;subsystem_vendor_id = pdev-&gt;subsystem_vendor;</div><div class='add'>+	hw-&gt;subsystem_device_id = pdev-&gt;subsystem_device;</div><div class='add'>+</div><div class='add'>+	/* Disable ASPM L1.2 on I226 devices to avoid packet loss */</div><div class='add'>+	if (igc_is_device_id_i226(hw))</div><div class='add'>+		pci_disable_link_state(pdev, PCIE_LINK_STATE_L1_2);</div><div class='add'>+</div><div class='ctx'> 	err = pci_save_state(pdev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_ioremap;</div><div class='hunk'>@@ -7005,13 +7182,6 @@ static int igc_probe(struct pci_dev *pdev,</div><div class='ctx'> 	netdev-&gt;mem_start = pci_resource_start(pdev, 0);</div><div class='ctx'> 	netdev-&gt;mem_end = pci_resource_end(pdev, 0);</div><div class='ctx'> </div><div class='del'>-	/* PCI config space info */</div><div class='del'>-	hw-&gt;vendor_id = pdev-&gt;vendor;</div><div class='del'>-	hw-&gt;device_id = pdev-&gt;device;</div><div class='del'>-	hw-&gt;revision_id = pdev-&gt;revision;</div><div class='del'>-	hw-&gt;subsystem_vendor_id = pdev-&gt;subsystem_vendor;</div><div class='del'>-	hw-&gt;subsystem_device_id = pdev-&gt;subsystem_device;</div><div class='del'>-</div><div class='ctx'> 	/* Copy the default MAC and PHY function pointers */</div><div class='ctx'> 	memcpy(&amp;hw-&gt;mac.ops, ei-&gt;mac_ops, sizeof(hw-&gt;mac.ops));</div><div class='ctx'> 	memcpy(&amp;hw-&gt;phy.ops, ei-&gt;phy_ops, sizeof(hw-&gt;phy.ops));</div><div class='hunk'>@@ -7062,6 +7232,9 @@ static int igc_probe(struct pci_dev *pdev,</div><div class='ctx'> 	netdev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |</div><div class='ctx'> 			       NETDEV_XDP_ACT_XSK_ZEROCOPY;</div><div class='ctx'> </div><div class='add'>+	/* enable HW vlan tag insertion/stripping by default */</div><div class='add'>+	netdev-&gt;features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;</div><div class='add'>+</div><div class='ctx'> 	/* MTU range: 68 - 9216 */</div><div class='ctx'> 	netdev-&gt;min_mtu = ETH_MIN_MTU;</div><div class='ctx'> 	netdev-&gt;max_mtu = MAX_STD_JUMBO_FRAME_SIZE;</div><div class='hunk'>@@ -7094,8 +7267,8 @@ static int igc_probe(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* configure RXPBSIZE and TXPBSIZE */</div><div class='del'>-	wr32(IGC_RXPBS, I225_RXPBSIZE_DEFAULT);</div><div class='del'>-	wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT);</div><div class='add'>+	wr32(IGC_RXPBS, IGC_RXPBSIZE_EXP_BMC_DEFAULT);</div><div class='add'>+	wr32(IGC_TXPBS, IGC_TXPBSIZE_DEFAULT);</div><div class='ctx'> </div><div class='ctx'> 	timer_setup(&amp;adapter-&gt;watchdog_timer, igc_watchdog, 0);</div><div class='ctx'> 	timer_setup(&amp;adapter-&gt;phy_info_timer, igc_update_phy_info, 0);</div><div class='hunk'>@@ -7103,12 +7276,11 @@ static int igc_probe(struct pci_dev *pdev,</div><div class='ctx'> 	INIT_WORK(&amp;adapter-&gt;reset_task, igc_reset_task);</div><div class='ctx'> 	INIT_WORK(&amp;adapter-&gt;watchdog_task, igc_watchdog_task);</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;adapter-&gt;hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-	adapter-&gt;hrtimer.function = &amp;igc_qbv_scheduling_timer;</div><div class='add'>+	hrtimer_setup(&amp;adapter-&gt;hrtimer, &amp;igc_qbv_scheduling_timer, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize link properties that are user-changeable */</div><div class='ctx'> 	adapter-&gt;fc_autoneg = true;</div><div class='del'>-	hw-&gt;mac.autoneg = true;</div><div class='ctx'> 	hw-&gt;phy.autoneg_advertised = 0xaf;</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;fc.requested_mode = igc_fc_default;</div><div class='hunk'>@@ -7128,6 +7300,8 @@ static int igc_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	igc_tsn_clear_schedule(adapter);</div><div class='ctx'> </div><div class='add'>+	igc_fpe_init(adapter);</div><div class='add'>+</div><div class='ctx'> 	/* reset the hardware with the new settings */</div><div class='ctx'> 	igc_reset(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -7161,14 +7335,21 @@ static int igc_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ENABLED(CONFIG_IGC_LEDS)) {</div><div class='ctx'> 		err = igc_led_setup(adapter);</div><div class='del'>-		if (err)</div><div class='del'>-			goto err_register;</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_warn_once(netdev,</div><div class='add'>+					 "LED init failed (%d); continuing without LED support\n",</div><div class='add'>+					 err);</div><div class='add'>+			adapter-&gt;leds_available = false;</div><div class='add'>+		} else {</div><div class='add'>+			adapter-&gt;leds_available = true;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_register:</div><div class='ctx'> 	igc_release_hw_control(adapter);</div><div class='add'>+	igc_ptp_stop(adapter);</div><div class='ctx'> err_eeprom:</div><div class='ctx'> 	if (!igc_check_reset_block(hw))</div><div class='ctx'> 		igc_reset_phy(hw);</div><div class='hunk'>@@ -7210,14 +7391,14 @@ static void igc_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	set_bit(__IGC_DOWN, &amp;adapter-&gt;state);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;phy_info_timer);</div><div class='ctx'> </div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;watchdog_task);</div><div class='ctx'> 	hrtimer_cancel(&amp;adapter-&gt;hrtimer);</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_IGC_LEDS))</div><div class='add'>+	if (IS_ENABLED(CONFIG_IGC_LEDS) &amp;&amp; adapter-&gt;leds_available)</div><div class='ctx'> 		igc_led_free(adapter);</div><div class='ctx'> </div><div class='ctx'> 	/* Release control of h/w to f/w.  If f/w is AMT enabled, this</div><div class='hunk'>@@ -7339,7 +7520,7 @@ static void igc_deliver_wake_packet(struct net_device *netdev)</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int igc_resume(struct device *dev)</div><div class='add'>+static int __igc_resume(struct device *dev, bool rpm)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='ctx'> 	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='hunk'>@@ -7349,7 +7530,6 @@ static int igc_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_power_state(pdev, PCI_D0);</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 	if (!pci_device_is_present(pdev))</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -7363,6 +7543,9 @@ static int igc_resume(struct device *dev)</div><div class='ctx'> 	pci_enable_wake(pdev, PCI_D3hot, 0);</div><div class='ctx'> 	pci_enable_wake(pdev, PCI_D3cold, 0);</div><div class='ctx'> </div><div class='add'>+	if (igc_is_device_id_i226(hw))</div><div class='add'>+		pci_disable_link_state(pdev, PCIE_LINK_STATE_L1_2);</div><div class='add'>+</div><div class='ctx'> 	if (igc_init_interrupt_scheme(adapter, true)) {</div><div class='ctx'> 		netdev_err(netdev, "Unable to allocate memory for queues\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -7382,7 +7565,11 @@ static int igc_resume(struct device *dev)</div><div class='ctx'> 	wr32(IGC_WUS, ~0);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev)) {</div><div class='add'>+		if (!rpm)</div><div class='add'>+			rtnl_lock();</div><div class='ctx'> 		err = __igc_open(netdev, true);</div><div class='add'>+		if (!rpm)</div><div class='add'>+			rtnl_unlock();</div><div class='ctx'> 		if (!err)</div><div class='ctx'> 			netif_device_attach(netdev);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -7390,9 +7577,14 @@ static int igc_resume(struct device *dev)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int igc_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return __igc_resume(dev, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int igc_runtime_resume(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	return igc_resume(dev);</div><div class='add'>+	return __igc_resume(dev, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int igc_suspend(struct device *dev)</div><div class='hunk'>@@ -7437,14 +7629,18 @@ static pci_ers_result_t igc_io_error_detected(struct pci_dev *pdev,</div><div class='ctx'> 	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct igc_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='ctx'> 	netif_device_detach(netdev);</div><div class='ctx'> </div><div class='del'>-	if (state == pci_channel_io_perm_failure)</div><div class='add'>+	if (state == pci_channel_io_perm_failure) {</div><div class='add'>+		rtnl_unlock();</div><div class='ctx'> 		return PCI_ERS_RESULT_DISCONNECT;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		igc_down(adapter);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	/* Request a slot reset. */</div><div class='ctx'> 	return PCI_ERS_RESULT_NEED_RESET;</div><div class='hunk'>@@ -7455,7 +7651,7 @@ static pci_ers_result_t igc_io_error_detected(struct pci_dev *pdev,</div><div class='ctx'>  *  @pdev: Pointer to PCI device</div><div class='ctx'>  *</div><div class='ctx'>  *  Restart the card from scratch, as if from a cold-boot. Implementation</div><div class='del'>- *  resembles the first-half of the igc_resume routine.</div><div class='add'>+ *  resembles the first-half of the __igc_resume routine.</div><div class='ctx'>  **/</div><div class='ctx'> static pci_ers_result_t igc_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -7470,11 +7666,13 @@ static pci_ers_result_t igc_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pci_set_master(pdev);</div><div class='ctx'> 		pci_restore_state(pdev);</div><div class='del'>-		pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 		pci_enable_wake(pdev, PCI_D3hot, 0);</div><div class='ctx'> 		pci_enable_wake(pdev, PCI_D3cold, 0);</div><div class='ctx'> </div><div class='add'>+		if (igc_is_device_id_i226(hw))</div><div class='add'>+			pci_disable_link_state_locked(pdev, PCIE_LINK_STATE_L1_2);</div><div class='add'>+</div><div class='ctx'> 		/* In case of PCI error, adapter loses its HW address</div><div class='ctx'> 		 * so we should re-assign it here.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -7494,7 +7692,7 @@ static pci_ers_result_t igc_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'>  *</div><div class='ctx'>  *  This callback is called when the error recovery driver tells us that</div><div class='ctx'>  *  its OK to resume normal operation. Implementation resembles the</div><div class='del'>- *  second-half of the igc_resume routine.</div><div class='add'>+ *  second-half of the __igc_resume routine.</div><div class='ctx'>  */</div><div class='ctx'> static void igc_io_resume(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_nvm.c b/drivers/net/ethernet/intel/igc/igc_nvm.c<br/>index 58f81aba0144..a47b8d39238c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_nvm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_nvm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_nvm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_nvm.c</a></div><div class='hunk'>@@ -36,56 +36,6 @@ static s32 igc_poll_eerd_eewr_done(struct igc_hw *hw, int ee_reg)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * igc_acquire_nvm - Generic request for access to EEPROM</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- *</div><div class='del'>- * Set the EEPROM access request bit and wait for EEPROM access grant bit.</div><div class='del'>- * Return successful if access grant bit set, else clear the request for</div><div class='del'>- * EEPROM access and return -IGC_ERR_NVM (-1).</div><div class='del'>- */</div><div class='del'>-s32 igc_acquire_nvm(struct igc_hw *hw)</div><div class='del'>-{</div><div class='del'>-	s32 timeout = IGC_NVM_GRANT_ATTEMPTS;</div><div class='del'>-	u32 eecd = rd32(IGC_EECD);</div><div class='del'>-	s32 ret_val = 0;</div><div class='del'>-</div><div class='del'>-	wr32(IGC_EECD, eecd | IGC_EECD_REQ);</div><div class='del'>-	eecd = rd32(IGC_EECD);</div><div class='del'>-</div><div class='del'>-	while (timeout) {</div><div class='del'>-		if (eecd &amp; IGC_EECD_GNT)</div><div class='del'>-			break;</div><div class='del'>-		udelay(5);</div><div class='del'>-		eecd = rd32(IGC_EECD);</div><div class='del'>-		timeout--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!timeout) {</div><div class='del'>-		eecd &amp;= ~IGC_EECD_REQ;</div><div class='del'>-		wr32(IGC_EECD, eecd);</div><div class='del'>-		hw_dbg("Could not acquire NVM grant\n");</div><div class='del'>-		ret_val = -IGC_ERR_NVM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret_val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * igc_release_nvm - Release exclusive access to EEPROM</div><div class='del'>- * @hw: pointer to the HW structure</div><div class='del'>- *</div><div class='del'>- * Stop any current commands to the EEPROM and clear the EEPROM request bit.</div><div class='del'>- */</div><div class='del'>-void igc_release_nvm(struct igc_hw *hw)</div><div class='del'>-{</div><div class='del'>-	u32 eecd;</div><div class='del'>-</div><div class='del'>-	eecd = rd32(IGC_EECD);</div><div class='del'>-	eecd &amp;= ~IGC_EECD_REQ;</div><div class='del'>-	wr32(IGC_EECD, eecd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * igc_read_nvm_eerd - Reads EEPROM using EERD register</div><div class='ctx'>  * @hw: pointer to the HW structure</div><div class='ctx'>  * @offset: offset of word in the EEPROM to read</div><div class='hunk'>@@ -173,7 +123,7 @@ s32 igc_validate_nvm_checksum(struct igc_hw *hw)</div><div class='ctx'> 		checksum += nvm_data;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (checksum != (u16)NVM_SUM) {</div><div class='add'>+	if (checksum != NVM_SUM) {</div><div class='ctx'> 		hw_dbg("NVM Checksum Invalid\n");</div><div class='ctx'> 		ret_val = -IGC_ERR_NVM;</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -205,7 +155,7 @@ s32 igc_update_nvm_checksum(struct igc_hw *hw)</div><div class='ctx'> 		}</div><div class='ctx'> 		checksum += nvm_data;</div><div class='ctx'> 	}</div><div class='del'>-	checksum = (u16)NVM_SUM - checksum;</div><div class='add'>+	checksum = NVM_SUM - checksum;</div><div class='ctx'> 	ret_val = hw-&gt;nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &amp;checksum);</div><div class='ctx'> 	if (ret_val)</div><div class='ctx'> 		hw_dbg("NVM Write Error while updating checksum.\n");</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_nvm.h b/drivers/net/ethernet/intel/igc/igc_nvm.h<br/>index f9fc2e9cfb03..ab78d0c64547 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_nvm.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_nvm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_nvm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_nvm.h</a></div><div class='hunk'>@@ -4,8 +4,6 @@</div><div class='ctx'> #ifndef _IGC_NVM_H_</div><div class='ctx'> #define _IGC_NVM_H_</div><div class='ctx'> </div><div class='del'>-s32 igc_acquire_nvm(struct igc_hw *hw);</div><div class='del'>-void igc_release_nvm(struct igc_hw *hw);</div><div class='ctx'> s32 igc_read_mac_addr(struct igc_hw *hw);</div><div class='ctx'> s32 igc_read_nvm_eerd(struct igc_hw *hw, u16 offset, u16 words, u16 *data);</div><div class='ctx'> s32 igc_validate_nvm_checksum(struct igc_hw *hw);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_phy.c b/drivers/net/ethernet/intel/igc/igc_phy.c<br/>index 2801e5f24df9..6c4d204aecfa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_phy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_phy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_phy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_phy.c</a></div><div class='hunk'>@@ -494,24 +494,12 @@ s32 igc_setup_copper_link(struct igc_hw *hw)</div><div class='ctx'> 	s32 ret_val = 0;</div><div class='ctx'> 	bool link;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;mac.autoneg) {</div><div class='del'>-		/* Setup autoneg and flow control advertisement and perform</div><div class='del'>-		 * autonegotiation.</div><div class='del'>-		 */</div><div class='del'>-		ret_val = igc_copper_link_autoneg(hw);</div><div class='del'>-		if (ret_val)</div><div class='del'>-			goto out;</div><div class='del'>-	} else {</div><div class='del'>-		/* PHY will be set to 10H, 10F, 100H or 100F</div><div class='del'>-		 * depending on user settings.</div><div class='del'>-		 */</div><div class='del'>-		hw_dbg("Forcing Speed and Duplex\n");</div><div class='del'>-		ret_val = hw-&gt;phy.ops.force_speed_duplex(hw);</div><div class='del'>-		if (ret_val) {</div><div class='del'>-			hw_dbg("Error Forcing Speed and Duplex\n");</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	/* Setup autoneg and flow control advertisement and perform</div><div class='add'>+	 * autonegotiation.</div><div class='add'>+	 */</div><div class='add'>+	ret_val = igc_copper_link_autoneg(hw);</div><div class='add'>+	if (ret_val)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* Check link status. Wait up to 100 microseconds for link to become</div><div class='ctx'> 	 * valid.</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_ptp.c b/drivers/net/ethernet/intel/igc/igc_ptp.c<br/>index 946edbad4302..b7b46d863bee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_ptp.c</a></div><div class='hunk'>@@ -257,13 +257,6 @@ static int igc_ptp_feature_enable_i225(struct ptp_clock_info *ptp,</div><div class='ctx'> </div><div class='ctx'> 	switch (rq-&gt;type) {</div><div class='ctx'> 	case PTP_CLK_REQ_EXTTS:</div><div class='del'>-		/* Reject requests with unsupported flags */</div><div class='del'>-		if (rq-&gt;extts.flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-					PTP_RISING_EDGE |</div><div class='del'>-					PTP_FALLING_EDGE |</div><div class='del'>-					PTP_STRICT_FLAGS))</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 		/* Reject requests failing to enable both edges. */</div><div class='ctx'> 		if ((rq-&gt;extts.flags &amp; PTP_STRICT_FLAGS) &amp;&amp;</div><div class='ctx'> 		    (rq-&gt;extts.flags &amp; PTP_ENABLE_FEATURE) &amp;&amp;</div><div class='hunk'>@@ -300,10 +293,6 @@ static int igc_ptp_feature_enable_i225(struct ptp_clock_info *ptp,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	case PTP_CLK_REQ_PEROUT:</div><div class='del'>-		/* Reject requests with unsupported flags */</div><div class='del'>-		if (rq-&gt;perout.flags)</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 		if (on) {</div><div class='ctx'> 			pin = ptp_find_pin(igc-&gt;ptp_clock, PTP_PF_PEROUT,</div><div class='ctx'> 					   rq-&gt;perout.index);</div><div class='hunk'>@@ -637,7 +626,7 @@ static void igc_ptp_enable_tx_timestamp(struct igc_adapter *adapter)</div><div class='ctx'>  * Return: 0 in case of success, negative errno code otherwise.</div><div class='ctx'>  */</div><div class='ctx'> static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,</div><div class='del'>-				      struct hwtstamp_config *config)</div><div class='add'>+				      struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='hunk'>@@ -864,48 +853,46 @@ void igc_ptp_tx_tstamp_event(struct igc_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * igc_ptp_set_ts_config - set hardware time stamping config</div><div class='add'>+ * igc_ptp_hwtstamp_set - set hardware time stamping config</div><div class='ctx'>  * @netdev: network interface device structure</div><div class='del'>- * @ifr: interface request data</div><div class='add'>+ * @config: timestamping configuration structure</div><div class='add'>+ * @extack: netlink extended ack structure for error reporting</div><div class='ctx'>  *</div><div class='ctx'>  **/</div><div class='del'>-int igc_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+int igc_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	err = igc_ptp_set_timestamp_mode(adapter, &amp;config);</div><div class='add'>+	err = igc_ptp_set_timestamp_mode(adapter, config);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* save these settings for future reference */</div><div class='del'>-	memcpy(&amp;adapter-&gt;tstamp_config, &amp;config,</div><div class='del'>-	       sizeof(adapter-&gt;tstamp_config));</div><div class='add'>+	adapter-&gt;tstamp_config = *config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * igc_ptp_get_ts_config - get hardware time stamping config</div><div class='add'>+ * igc_ptp_hwtstamp_get - get hardware time stamping config</div><div class='ctx'>  * @netdev: network interface device structure</div><div class='del'>- * @ifr: interface request data</div><div class='add'>+ * @config: timestamping configuration structure</div><div class='ctx'>  *</div><div class='ctx'>  * Get the hwtstamp_config settings to return to the user. Rather than attempt</div><div class='ctx'>  * to deconstruct the settings from the registers, just return a shadow copy</div><div class='ctx'>  * of the last known settings.</div><div class='ctx'>  **/</div><div class='del'>-int igc_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+int igc_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			 struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	struct hwtstamp_config *config = &amp;adapter-&gt;tstamp_config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, config, sizeof(*config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	*config = adapter-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* The two conditions below must be met for cross timestamping via</div><div class='hunk'>@@ -974,45 +961,62 @@ static void igc_ptm_log_error(struct igc_adapter *adapter, u32 ptm_stat)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* The PTM lock: adapter-&gt;ptm_lock must be held when calling igc_ptm_trigger() */</div><div class='add'>+static void igc_ptm_trigger(struct igc_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	/* To "manually" start the PTM cycle we need to set the</div><div class='add'>+	 * trigger (TRIG) bit</div><div class='add'>+	 */</div><div class='add'>+	ctrl = rd32(IGC_PTM_CTRL);</div><div class='add'>+	ctrl |= IGC_PTM_CTRL_TRIG;</div><div class='add'>+	wr32(IGC_PTM_CTRL, ctrl);</div><div class='add'>+	/* Perform flush after write to CTRL register otherwise</div><div class='add'>+	 * transaction may not start</div><div class='add'>+	 */</div><div class='add'>+	wrfl();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The PTM lock: adapter-&gt;ptm_lock must be held when calling igc_ptm_reset() */</div><div class='add'>+static void igc_ptm_reset(struct igc_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	ctrl = rd32(IGC_PTM_CTRL);</div><div class='add'>+	ctrl &amp;= ~IGC_PTM_CTRL_TRIG;</div><div class='add'>+	wr32(IGC_PTM_CTRL, ctrl);</div><div class='add'>+	/* Write to clear all status */</div><div class='add'>+	wr32(IGC_PTM_STAT, IGC_PTM_STAT_ALL);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int igc_phc_get_syncdevicetime(ktime_t *device,</div><div class='ctx'> 				      struct system_counterval_t *system,</div><div class='ctx'> 				      void *ctx)</div><div class='ctx'> {</div><div class='del'>-	u32 stat, t2_curr_h, t2_curr_l, ctrl;</div><div class='ctx'> 	struct igc_adapter *adapter = ctx;</div><div class='ctx'> 	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u32 stat, t2_curr_h, t2_curr_l;</div><div class='ctx'> 	int err, count = 100;</div><div class='ctx'> 	ktime_t t1, t2_curr;</div><div class='ctx'> </div><div class='del'>-	/* Get a snapshot of system clocks to use as historic value. */</div><div class='del'>-	ktime_get_snapshot(&amp;adapter-&gt;snapshot);</div><div class='del'>-</div><div class='add'>+	/* Doing this in a loop because in the event of a</div><div class='add'>+	 * badly timed (ha!) system clock adjustment, we may</div><div class='add'>+	 * get PTM errors from the PCI root, but these errors</div><div class='add'>+	 * are transitory. Repeating the process returns valid</div><div class='add'>+	 * data eventually.</div><div class='add'>+	 */</div><div class='ctx'> 	do {</div><div class='del'>-		/* Doing this in a loop because in the event of a</div><div class='del'>-		 * badly timed (ha!) system clock adjustment, we may</div><div class='del'>-		 * get PTM errors from the PCI root, but these errors</div><div class='del'>-		 * are transitory. Repeating the process returns valid</div><div class='del'>-		 * data eventually.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		/* To "manually" start the PTM cycle we need to clear and</div><div class='del'>-		 * then set again the TRIG bit.</div><div class='del'>-		 */</div><div class='del'>-		ctrl = rd32(IGC_PTM_CTRL);</div><div class='del'>-		ctrl &amp;= ~IGC_PTM_CTRL_TRIG;</div><div class='del'>-		wr32(IGC_PTM_CTRL, ctrl);</div><div class='del'>-		ctrl |= IGC_PTM_CTRL_TRIG;</div><div class='del'>-		wr32(IGC_PTM_CTRL, ctrl);</div><div class='add'>+		/* Get a snapshot of system clocks to use as historic value. */</div><div class='add'>+		ktime_get_snapshot(&amp;adapter-&gt;snapshot);</div><div class='ctx'> </div><div class='del'>-		/* The cycle only starts "for real" when software notifies</div><div class='del'>-		 * that it has read the registers, this is done by setting</div><div class='del'>-		 * VALID bit.</div><div class='del'>-		 */</div><div class='del'>-		wr32(IGC_PTM_STAT, IGC_PTM_STAT_VALID);</div><div class='add'>+		igc_ptm_trigger(hw);</div><div class='ctx'> </div><div class='ctx'> 		err = readx_poll_timeout(rd32, IGC_PTM_STAT, stat,</div><div class='ctx'> 					 stat, IGC_PTM_STAT_SLEEP,</div><div class='ctx'> 					 IGC_PTM_STAT_TIMEOUT);</div><div class='add'>+		igc_ptm_reset(hw);</div><div class='add'>+</div><div class='ctx'> 		if (err &lt; 0) {</div><div class='ctx'> 			netdev_err(adapter-&gt;netdev, "Timeout reading IGC_PTM_STAT register\n");</div><div class='ctx'> 			return err;</div><div class='hunk'>@@ -1021,15 +1025,7 @@ static int igc_phc_get_syncdevicetime(ktime_t *device,</div><div class='ctx'> 		if ((stat &amp; IGC_PTM_STAT_VALID) == IGC_PTM_STAT_VALID)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		if (stat &amp; ~IGC_PTM_STAT_VALID) {</div><div class='del'>-			/* An error occurred, log it. */</div><div class='del'>-			igc_ptm_log_error(adapter, stat);</div><div class='del'>-			/* The STAT register is write-1-to-clear (W1C),</div><div class='del'>-			 * so write the previous error status to clear it.</div><div class='del'>-			 */</div><div class='del'>-			wr32(IGC_PTM_STAT, stat);</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='add'>+		igc_ptm_log_error(adapter, stat);</div><div class='ctx'> 	} while (--count);</div><div class='ctx'> </div><div class='ctx'> 	if (!count) {</div><div class='hunk'>@@ -1061,9 +1057,16 @@ static int igc_ptp_getcrosststamp(struct ptp_clock_info *ptp,</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_adapter *adapter = container_of(ptp, struct igc_adapter,</div><div class='ctx'> 						   ptp_caps);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	return get_device_system_crosststamp(igc_phc_get_syncdevicetime,</div><div class='del'>-					     adapter, &amp;adapter-&gt;snapshot, cts);</div><div class='add'>+	/* This blocks until any in progress PTM transactions complete */</div><div class='add'>+	mutex_lock(&amp;adapter-&gt;ptm_lock);</div><div class='add'>+</div><div class='add'>+	ret = get_device_system_crosststamp(igc_phc_get_syncdevicetime,</div><div class='add'>+					    adapter, &amp;adapter-&gt;snapshot, cts);</div><div class='add'>+	mutex_unlock(&amp;adapter-&gt;ptm_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int igc_ptp_getcyclesx64(struct ptp_clock_info *ptp,</div><div class='hunk'>@@ -1146,6 +1149,9 @@ void igc_ptp_init(struct igc_adapter *adapter)</div><div class='ctx'> 		adapter-&gt;ptp_caps.pin_config = adapter-&gt;sdp_config;</div><div class='ctx'> 		adapter-&gt;ptp_caps.n_ext_ts = IGC_N_EXTTS;</div><div class='ctx'> 		adapter-&gt;ptp_caps.n_per_out = IGC_N_PEROUT;</div><div class='add'>+		adapter-&gt;ptp_caps.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+							  PTP_FALLING_EDGE |</div><div class='add'>+							  PTP_STRICT_FLAGS;</div><div class='ctx'> 		adapter-&gt;ptp_caps.n_pins = IGC_N_SDP;</div><div class='ctx'> 		adapter-&gt;ptp_caps.verify = igc_ptp_verify_pin;</div><div class='ctx'> </div><div class='hunk'>@@ -1162,6 +1168,7 @@ void igc_ptp_init(struct igc_adapter *adapter)</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;ptp_tx_lock);</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;free_timer_lock);</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;tmreg_lock);</div><div class='add'>+	mutex_init(&amp;adapter-&gt;ptm_lock);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='ctx'> 	adapter-&gt;tstamp_config.tx_type = HWTSTAMP_TX_OFF;</div><div class='hunk'>@@ -1174,6 +1181,7 @@ void igc_ptp_init(struct igc_adapter *adapter)</div><div class='ctx'> 	if (IS_ERR(adapter-&gt;ptp_clock)) {</div><div class='ctx'> 		adapter-&gt;ptp_clock = NULL;</div><div class='ctx'> 		netdev_err(netdev, "ptp_clock_register failed\n");</div><div class='add'>+		mutex_destroy(&amp;adapter-&gt;ptm_lock);</div><div class='ctx'> 	} else if (adapter-&gt;ptp_clock) {</div><div class='ctx'> 		netdev_info(netdev, "PHC added\n");</div><div class='ctx'> 		adapter-&gt;ptp_flags |= IGC_PTP_ENABLED;</div><div class='hunk'>@@ -1203,10 +1211,12 @@ static void igc_ptm_stop(struct igc_adapter *adapter)</div><div class='ctx'> 	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 ctrl;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;adapter-&gt;ptm_lock);</div><div class='ctx'> 	ctrl = rd32(IGC_PTM_CTRL);</div><div class='ctx'> 	ctrl &amp;= ~IGC_PTM_CTRL_EN;</div><div class='ctx'> </div><div class='ctx'> 	wr32(IGC_PTM_CTRL, ctrl);</div><div class='add'>+	mutex_unlock(&amp;adapter-&gt;ptm_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1237,13 +1247,18 @@ void igc_ptp_suspend(struct igc_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> void igc_ptp_stop(struct igc_adapter *adapter)</div><div class='ctx'> {</div><div class='add'>+	if (!(adapter-&gt;ptp_flags &amp; IGC_PTP_ENABLED))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	igc_ptp_suspend(adapter);</div><div class='ctx'> </div><div class='add'>+	adapter-&gt;ptp_flags &amp;= ~IGC_PTP_ENABLED;</div><div class='ctx'> 	if (adapter-&gt;ptp_clock) {</div><div class='ctx'> 		ptp_clock_unregister(adapter-&gt;ptp_clock);</div><div class='ctx'> 		netdev_info(adapter-&gt;netdev, "PHC removed\n");</div><div class='ctx'> 		adapter-&gt;ptp_flags &amp;= ~IGC_PTP_ENABLED;</div><div class='ctx'> 	}</div><div class='add'>+	mutex_destroy(&amp;adapter-&gt;ptm_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1255,13 +1270,18 @@ void igc_ptp_stop(struct igc_adapter *adapter)</div><div class='ctx'> void igc_ptp_reset(struct igc_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-	u32 cycle_ctrl, ctrl;</div><div class='add'>+	u32 cycle_ctrl, ctrl, stat;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 timadj;</div><div class='ctx'> </div><div class='add'>+	if (!(adapter-&gt;ptp_flags &amp; IGC_PTP_ENABLED))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	/* reset the tstamp_config */</div><div class='ctx'> 	igc_ptp_set_timestamp_mode(adapter, &amp;adapter-&gt;tstamp_config);</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;adapter-&gt;ptm_lock);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	switch (adapter-&gt;hw.mac.type) {</div><div class='hunk'>@@ -1290,14 +1310,19 @@ void igc_ptp_reset(struct igc_adapter *adapter)</div><div class='ctx'> 		ctrl = IGC_PTM_CTRL_EN |</div><div class='ctx'> 			IGC_PTM_CTRL_START_NOW |</div><div class='ctx'> 			IGC_PTM_CTRL_SHRT_CYC(IGC_PTM_SHORT_CYC_DEFAULT) |</div><div class='del'>-			IGC_PTM_CTRL_PTM_TO(IGC_PTM_TIMEOUT_DEFAULT) |</div><div class='del'>-			IGC_PTM_CTRL_TRIG;</div><div class='add'>+			IGC_PTM_CTRL_PTM_TO(IGC_PTM_TIMEOUT_DEFAULT);</div><div class='ctx'> </div><div class='ctx'> 		wr32(IGC_PTM_CTRL, ctrl);</div><div class='ctx'> </div><div class='ctx'> 		/* Force the first cycle to run. */</div><div class='del'>-		wr32(IGC_PTM_STAT, IGC_PTM_STAT_VALID);</div><div class='add'>+		igc_ptm_trigger(hw);</div><div class='ctx'> </div><div class='add'>+		if (readx_poll_timeout_atomic(rd32, IGC_PTM_STAT, stat,</div><div class='add'>+					      stat, IGC_PTM_STAT_SLEEP,</div><div class='add'>+					      IGC_PTM_STAT_TIMEOUT))</div><div class='add'>+			netdev_err(adapter-&gt;netdev, "Timeout reading IGC_PTM_STAT register\n");</div><div class='add'>+</div><div class='add'>+		igc_ptm_reset(hw);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* No work to do. */</div><div class='hunk'>@@ -1314,5 +1339,7 @@ void igc_ptp_reset(struct igc_adapter *adapter)</div><div class='ctx'> out:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;adapter-&gt;tmreg_lock, flags);</div><div class='ctx'> </div><div class='add'>+	mutex_unlock(&amp;adapter-&gt;ptm_lock);</div><div class='add'>+</div><div class='ctx'> 	wrfl();</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethernet/intel/igc/igc_regs.h<br/>index 12ddc5793651..f343c6bfc6be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_regs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_regs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_regs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_regs.h</a></div><div class='hunk'>@@ -222,6 +222,22 @@</div><div class='ctx'> </div><div class='ctx'> #define IGC_FTQF(_n)	(0x059E0 + (4 * (_n)))  /* 5-tuple Queue Fltr */</div><div class='ctx'> </div><div class='add'>+/* Time sync registers - preemption statistics */</div><div class='add'>+#define IGC_PRMPTDRCNT		0x04284	/* Good RX Preempted Packets */</div><div class='add'>+#define IGC_PRMEVNTTCNT		0x04298	/* TX Preemption event counter */</div><div class='add'>+#define IGC_PRMEVNTRCNT		0x0429C	/* RX Preemption event counter */</div><div class='add'>+</div><div class='add'>+ /* Preemption Exception Counter */</div><div class='add'>+ #define IGC_PRMEXCPRCNT				0x42A0</div><div class='add'>+/* Received out of order packets with SMD-C */</div><div class='add'>+#define IGC_PRMEXCPRCNT_OOO_SMDC			0x000000FF</div><div class='add'>+/* Received out of order packets with SMD-C and wrong Frame CNT */</div><div class='add'>+#define IGC_PRMEXCPRCNT_OOO_FRAME_CNT			0x0000FF00</div><div class='add'>+/* Received out of order packets with SMD-C and wrong Frag CNT */</div><div class='add'>+#define IGC_PRMEXCPRCNT_OOO_FRAG_CNT			0x00FF0000</div><div class='add'>+/* Received packets with SMD-S and wrong Frag CNT and Frame CNT */</div><div class='add'>+#define IGC_PRMEXCPRCNT_MISS_FRAME_FRAG_CNT		0xFF000000</div><div class='add'>+</div><div class='ctx'> /* Transmit Scheduling Registers */</div><div class='ctx'> #define IGC_TQAVCTRL		0x3570</div><div class='ctx'> #define IGC_TXQCTL(_n)		(0x3344 + 0x4 * (_n))</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c<br/>index 1e44374ca1ff..8a110145bfee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_tsn.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_tsn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_tsn.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_tsn.c</a></div><div class='hunk'>@@ -2,9 +2,206 @@</div><div class='ctx'> /* Copyright (c)  2019 Intel Corporation */</div><div class='ctx'> </div><div class='ctx'> #include "igc.h"</div><div class='add'>+#include "igc_base.h"</div><div class='ctx'> #include "igc_hw.h"</div><div class='ctx'> #include "igc_tsn.h"</div><div class='ctx'> </div><div class='add'>+#define MIN_MULTPLIER_TX_MIN_FRAG	0</div><div class='add'>+#define MAX_MULTPLIER_TX_MIN_FRAG	3</div><div class='add'>+/* Frag size is based on the Section 8.12.2 of the SW User Manual */</div><div class='add'>+#define TX_MIN_FRAG_SIZE		64</div><div class='add'>+#define TX_MAX_FRAG_SIZE	(TX_MIN_FRAG_SIZE * \</div><div class='add'>+				 (MAX_MULTPLIER_TX_MIN_FRAG + 1))</div><div class='add'>+</div><div class='add'>+enum tx_queue {</div><div class='add'>+	TX_QUEUE_0 = 0,</div><div class='add'>+	TX_QUEUE_1,</div><div class='add'>+	TX_QUEUE_2,</div><div class='add'>+	TX_QUEUE_3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DEFINE_STATIC_KEY_FALSE(igc_fpe_enabled);</div><div class='add'>+</div><div class='add'>+static int igc_fpe_init_smd_frame(struct igc_ring *ring,</div><div class='add'>+				  struct igc_tx_buffer *buffer,</div><div class='add'>+				  struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	dma_addr_t dma = dma_map_single(ring-&gt;dev, skb-&gt;data, skb-&gt;len,</div><div class='add'>+					DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+	if (dma_mapping_error(ring-&gt;dev, dma)) {</div><div class='add'>+		netdev_err_once(ring-&gt;netdev, "Failed to map DMA for TX\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buffer-&gt;skb = skb;</div><div class='add'>+	buffer-&gt;protocol = 0;</div><div class='add'>+	buffer-&gt;bytecount = skb-&gt;len;</div><div class='add'>+	buffer-&gt;gso_segs = 1;</div><div class='add'>+	buffer-&gt;time_stamp = jiffies;</div><div class='add'>+	dma_unmap_len_set(buffer, len, skb-&gt;len);</div><div class='add'>+	dma_unmap_addr_set(buffer, dma, dma);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int igc_fpe_init_tx_descriptor(struct igc_ring *ring,</div><div class='add'>+				      struct sk_buff *skb,</div><div class='add'>+				      enum igc_txd_popts_type type)</div><div class='add'>+{</div><div class='add'>+	u32 cmd_type, olinfo_status = 0;</div><div class='add'>+	struct igc_tx_buffer *buffer;</div><div class='add'>+	union igc_adv_tx_desc *desc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!igc_desc_unused(ring))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	buffer = &amp;ring-&gt;tx_buffer_info[ring-&gt;next_to_use];</div><div class='add'>+	err = igc_fpe_init_smd_frame(ring, buffer, skb);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd_type = IGC_ADVTXD_DTYP_DATA | IGC_ADVTXD_DCMD_DEXT |</div><div class='add'>+		   IGC_ADVTXD_DCMD_IFCS | IGC_TXD_DCMD |</div><div class='add'>+		   buffer-&gt;bytecount;</div><div class='add'>+</div><div class='add'>+	olinfo_status |= FIELD_PREP(IGC_ADVTXD_PAYLEN_MASK, buffer-&gt;bytecount);</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case SMD_V:</div><div class='add'>+	case SMD_R:</div><div class='add'>+		olinfo_status |= FIELD_PREP(IGC_TXD_POPTS_SMD_MASK, type);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	desc = IGC_TX_DESC(ring, ring-&gt;next_to_use);</div><div class='add'>+	desc-&gt;read.cmd_type_len = cpu_to_le32(cmd_type);</div><div class='add'>+	desc-&gt;read.olinfo_status = cpu_to_le32(olinfo_status);</div><div class='add'>+	desc-&gt;read.buffer_addr = cpu_to_le64(dma_unmap_addr(buffer, dma));</div><div class='add'>+</div><div class='add'>+	netdev_tx_sent_queue(txring_txq(ring), skb-&gt;len);</div><div class='add'>+</div><div class='add'>+	buffer-&gt;next_to_watch = desc;</div><div class='add'>+	ring-&gt;next_to_use = (ring-&gt;next_to_use + 1) % ring-&gt;count;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int igc_fpe_xmit_smd_frame(struct igc_adapter *adapter,</div><div class='add'>+				  enum igc_txd_popts_type type)</div><div class='add'>+{</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+	struct netdev_queue *nq;</div><div class='add'>+	struct igc_ring *ring;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ring = igc_get_tx_ring(adapter, cpu);</div><div class='add'>+	nq = txring_txq(ring);</div><div class='add'>+</div><div class='add'>+	skb = alloc_skb(SMD_FRAME_SIZE, GFP_ATOMIC);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	skb_put_zero(skb, SMD_FRAME_SIZE);</div><div class='add'>+</div><div class='add'>+	__netif_tx_lock(nq, cpu);</div><div class='add'>+</div><div class='add'>+	err = igc_fpe_init_tx_descriptor(ring, skb, type);</div><div class='add'>+	igc_flush_tx_descriptors(ring);</div><div class='add'>+</div><div class='add'>+	__netif_tx_unlock(nq);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void igc_fpe_configure_tx(struct ethtool_mmsv *mmsv, bool tx_enable)</div><div class='add'>+{</div><div class='add'>+	struct igc_fpe_t *fpe = container_of(mmsv, struct igc_fpe_t, mmsv);</div><div class='add'>+	struct igc_adapter *adapter;</div><div class='add'>+</div><div class='add'>+	adapter = container_of(fpe, struct igc_adapter, fpe);</div><div class='add'>+	adapter-&gt;fpe.tx_enabled = tx_enable;</div><div class='add'>+</div><div class='add'>+	/* Update config since tx_enabled affects preemptible queue configuration */</div><div class='add'>+	igc_tsn_offload_apply(adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void igc_fpe_send_mpacket(struct ethtool_mmsv *mmsv,</div><div class='add'>+				 enum ethtool_mpacket type)</div><div class='add'>+{</div><div class='add'>+	struct igc_fpe_t *fpe = container_of(mmsv, struct igc_fpe_t, mmsv);</div><div class='add'>+	struct igc_adapter *adapter;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	adapter = container_of(fpe, struct igc_adapter, fpe);</div><div class='add'>+</div><div class='add'>+	if (type == ETHTOOL_MPACKET_VERIFY) {</div><div class='add'>+		err = igc_fpe_xmit_smd_frame(adapter, SMD_V);</div><div class='add'>+		if (err &amp;&amp; net_ratelimit())</div><div class='add'>+			netdev_err(adapter-&gt;netdev, "Error sending SMD-V\n");</div><div class='add'>+	} else if (type == ETHTOOL_MPACKET_RESPONSE) {</div><div class='add'>+		err = igc_fpe_xmit_smd_frame(adapter, SMD_R);</div><div class='add'>+		if (err &amp;&amp; net_ratelimit())</div><div class='add'>+			netdev_err(adapter-&gt;netdev, "Error sending SMD-R frame\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_mmsv_ops igc_mmsv_ops = {</div><div class='add'>+	.configure_tx = igc_fpe_configure_tx,</div><div class='add'>+	.send_mpacket = igc_fpe_send_mpacket,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void igc_fpe_init(struct igc_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	adapter-&gt;fpe.tx_min_frag_size = TX_MIN_FRAG_SIZE;</div><div class='add'>+	adapter-&gt;fpe.tx_enabled = false;</div><div class='add'>+	ethtool_mmsv_init(&amp;adapter-&gt;fpe.mmsv, adapter-&gt;netdev, &amp;igc_mmsv_ops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void igc_fpe_clear_preempt_queue(struct igc_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	for (int i = 0; i &lt; adapter-&gt;num_tx_queues; i++) {</div><div class='add'>+		struct igc_ring *tx_ring = adapter-&gt;tx_ring[i];</div><div class='add'>+</div><div class='add'>+		tx_ring-&gt;preemptible = false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 igc_fpe_map_preempt_tc_to_queue(const struct igc_adapter *adapter,</div><div class='add'>+					   unsigned long preemptible_tcs)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = adapter-&gt;netdev;</div><div class='add'>+	u32 i, queue = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;num_tc; i++) {</div><div class='add'>+		u32 offset, count;</div><div class='add'>+</div><div class='add'>+		if (!(preemptible_tcs &amp; BIT(i)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		offset = dev-&gt;tc_to_txq[i].offset;</div><div class='add'>+		count = dev-&gt;tc_to_txq[i].count;</div><div class='add'>+		queue |= GENMASK(offset + count - 1, offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return queue;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void igc_fpe_save_preempt_queue(struct igc_adapter *adapter,</div><div class='add'>+				const struct tc_mqprio_qopt_offload *mqprio)</div><div class='add'>+{</div><div class='add'>+	u32 preemptible_queue = igc_fpe_map_preempt_tc_to_queue(adapter,</div><div class='add'>+								mqprio-&gt;preemptible_tcs);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; adapter-&gt;num_tx_queues; i++) {</div><div class='add'>+		struct igc_ring *tx_ring = adapter-&gt;tx_ring[i];</div><div class='add'>+</div><div class='add'>+		tx_ring-&gt;preemptible = !!(preemptible_queue &amp; BIT(i));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool is_any_launchtime(struct igc_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -37,17 +234,16 @@ static unsigned int igc_tsn_new_flags(struct igc_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int new_flags = adapter-&gt;flags &amp; ~IGC_FLAG_TSN_ANY_ENABLED;</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;taprio_offload_enable)</div><div class='del'>-		new_flags |= IGC_FLAG_TSN_QBV_ENABLED;</div><div class='ctx'> </div><div class='del'>-	if (is_any_launchtime(adapter))</div><div class='add'>+	if (adapter-&gt;taprio_offload_enable || is_any_launchtime(adapter) ||</div><div class='add'>+	    adapter-&gt;strict_priority_enable)</div><div class='ctx'> 		new_flags |= IGC_FLAG_TSN_QBV_ENABLED;</div><div class='ctx'> </div><div class='ctx'> 	if (is_cbs_enabled(adapter))</div><div class='ctx'> 		new_flags |= IGC_FLAG_TSN_QAV_ENABLED;</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;strict_priority_enable)</div><div class='del'>-		new_flags |= IGC_FLAG_TSN_LEGACY_ENABLED;</div><div class='add'>+	if (adapter-&gt;fpe.mmsv.pmac_enabled)</div><div class='add'>+		new_flags |= IGC_FLAG_TSN_PREEMPT_ENABLED;</div><div class='ctx'> </div><div class='ctx'> 	return new_flags;</div><div class='ctx'> }</div><div class='hunk'>@@ -105,7 +301,7 @@ bool igc_tsn_is_taprio_activated_by_user(struct igc_adapter *adapter)</div><div class='ctx'> 		adapter-&gt;taprio_offload_enable;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void igc_tsn_tx_arb(struct igc_adapter *adapter, u16 *queue_per_tc)</div><div class='add'>+static void igc_tsn_tx_arb(struct igc_adapter *adapter, bool reverse_prio)</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 txarb;</div><div class='hunk'>@@ -117,56 +313,91 @@ static void igc_tsn_tx_arb(struct igc_adapter *adapter, u16 *queue_per_tc)</div><div class='ctx'> 		   IGC_TXARB_TXQ_PRIO_2_MASK |</div><div class='ctx'> 		   IGC_TXARB_TXQ_PRIO_3_MASK);</div><div class='ctx'> </div><div class='del'>-	txarb |= IGC_TXARB_TXQ_PRIO_0(queue_per_tc[3]);</div><div class='del'>-	txarb |= IGC_TXARB_TXQ_PRIO_1(queue_per_tc[2]);</div><div class='del'>-	txarb |= IGC_TXARB_TXQ_PRIO_2(queue_per_tc[1]);</div><div class='del'>-	txarb |= IGC_TXARB_TXQ_PRIO_3(queue_per_tc[0]);</div><div class='add'>+	if (reverse_prio) {</div><div class='add'>+		txarb |= IGC_TXARB_TXQ_PRIO_0(TX_QUEUE_3);</div><div class='add'>+		txarb |= IGC_TXARB_TXQ_PRIO_1(TX_QUEUE_2);</div><div class='add'>+		txarb |= IGC_TXARB_TXQ_PRIO_2(TX_QUEUE_1);</div><div class='add'>+		txarb |= IGC_TXARB_TXQ_PRIO_3(TX_QUEUE_0);</div><div class='add'>+	} else {</div><div class='add'>+		txarb |= IGC_TXARB_TXQ_PRIO_0(TX_QUEUE_0);</div><div class='add'>+		txarb |= IGC_TXARB_TXQ_PRIO_1(TX_QUEUE_1);</div><div class='add'>+		txarb |= IGC_TXARB_TXQ_PRIO_2(TX_QUEUE_2);</div><div class='add'>+		txarb |= IGC_TXARB_TXQ_PRIO_3(TX_QUEUE_3);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	wr32(IGC_TXARB, txarb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * igc_tsn_set_rxpbsize - Set the receive packet buffer size</div><div class='add'>+ * @adapter: Pointer to the igc_adapter structure</div><div class='add'>+ * @rxpbs_exp_bmc_be: Value to set the receive packet buffer size, including</div><div class='add'>+ *                    express buffer, BMC buffer, and Best Effort buffer</div><div class='add'>+ *</div><div class='add'>+ * The IGC_RXPBS register value may include allocations for the Express buffer,</div><div class='add'>+ * BMC buffer, Best Effort buffer, and the timestamp descriptor buffer</div><div class='add'>+ * (IGC_RXPBS_CFG_TS_EN).</div><div class='add'>+ */</div><div class='add'>+static void igc_tsn_set_rxpbsize(struct igc_adapter *adapter,</div><div class='add'>+				 u32 rxpbs_exp_bmc_be)</div><div class='add'>+{</div><div class='add'>+	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u32 rxpbs = rd32(IGC_RXPBS);</div><div class='add'>+</div><div class='add'>+	rxpbs &amp;= ~(IGC_RXPBSIZE_EXP_MASK | IGC_BMC2OSPBSIZE_MASK |</div><div class='add'>+		   IGC_RXPBSIZE_BE_MASK);</div><div class='add'>+	rxpbs |= rxpbs_exp_bmc_be;</div><div class='add'>+</div><div class='add'>+	wr32(IGC_RXPBS, rxpbs);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Returns the TSN specific registers to their default values after</div><div class='ctx'>  * the adapter is reset.</div><div class='ctx'>  */</div><div class='ctx'> static int igc_tsn_disable_offload(struct igc_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	u16 queue_per_tc[4] = { 3, 2, 1, 0 };</div><div class='ctx'> 	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 tqavctrl;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	wr32(IGC_GTXOFFSET, 0);</div><div class='del'>-	wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT);</div><div class='add'>+	wr32(IGC_TXPBS, IGC_TXPBSIZE_DEFAULT);</div><div class='ctx'> 	wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT);</div><div class='ctx'> </div><div class='add'>+	igc_tsn_set_rxpbsize(adapter, IGC_RXPBSIZE_EXP_BMC_DEFAULT);</div><div class='add'>+</div><div class='ctx'> 	if (igc_is_device_id_i226(hw))</div><div class='ctx'> 		igc_tsn_restore_retx_default(adapter);</div><div class='ctx'> </div><div class='ctx'> 	tqavctrl = rd32(IGC_TQAVCTRL);</div><div class='ctx'> 	tqavctrl &amp;= ~(IGC_TQAVCTRL_TRANSMIT_MODE_TSN |</div><div class='del'>-		      IGC_TQAVCTRL_ENHANCED_QAV | IGC_TQAVCTRL_FUTSCDDIS);</div><div class='add'>+		      IGC_TQAVCTRL_ENHANCED_QAV | IGC_TQAVCTRL_FUTSCDDIS |</div><div class='add'>+		      IGC_TQAVCTRL_PREEMPT_ENA | IGC_TQAVCTRL_MIN_FRAG_MASK);</div><div class='ctx'> </div><div class='ctx'> 	wr32(IGC_TQAVCTRL, tqavctrl);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;num_tx_queues; i++) {</div><div class='add'>+		int reg_idx = adapter-&gt;tx_ring[i]-&gt;reg_idx;</div><div class='add'>+		u32 txdctl;</div><div class='add'>+</div><div class='ctx'> 		wr32(IGC_TXQCTL(i), 0);</div><div class='ctx'> 		wr32(IGC_STQT(i), 0);</div><div class='ctx'> 		wr32(IGC_ENDQT(i), NSEC_PER_SEC);</div><div class='add'>+</div><div class='add'>+		txdctl = rd32(IGC_TXDCTL(reg_idx));</div><div class='add'>+		txdctl &amp;= ~IGC_TXDCTL_PRIORITY_HIGH;</div><div class='add'>+		wr32(IGC_TXDCTL(reg_idx), txdctl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	wr32(IGC_QBVCYCLET_S, 0);</div><div class='ctx'> 	wr32(IGC_QBVCYCLET, NSEC_PER_SEC);</div><div class='ctx'> </div><div class='del'>-	/* Reset mqprio TC configuration. */</div><div class='del'>-	netdev_reset_tc(adapter-&gt;netdev);</div><div class='del'>-</div><div class='ctx'> 	/* Restore the default Tx arbitration: Priority 0 has the highest</div><div class='ctx'> 	 * priority and is assigned to queue 0 and so on and so forth.</div><div class='ctx'> 	 */</div><div class='del'>-	igc_tsn_tx_arb(adapter, queue_per_tc);</div><div class='add'>+	igc_tsn_tx_arb(adapter, false);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;flags &amp;= ~IGC_FLAG_TSN_QBV_ENABLED;</div><div class='del'>-	adapter-&gt;flags &amp;= ~IGC_FLAG_TSN_LEGACY_ENABLED;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -190,57 +421,53 @@ static void igc_tsn_set_retx_qbvfullthreshold(struct igc_adapter *adapter)</div><div class='ctx'> 	wr32(IGC_RETX_CTL, retxctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u8 igc_fpe_get_frag_size_mult(const struct igc_fpe_t *fpe)</div><div class='add'>+{</div><div class='add'>+	u8 mult = (fpe-&gt;tx_min_frag_size / TX_MIN_FRAG_SIZE) - 1;</div><div class='add'>+</div><div class='add'>+	return clamp_t(u8, mult, MIN_MULTPLIER_TX_MIN_FRAG,</div><div class='add'>+		       MAX_MULTPLIER_TX_MIN_FRAG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 igc_fpe_get_supported_frag_size(u32 frag_size)</div><div class='add'>+{</div><div class='add'>+	static const u32 supported_sizes[] = { 64, 128, 192, 256 };</div><div class='add'>+</div><div class='add'>+	/* Find the smallest supported size that is &gt;= frag_size */</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(supported_sizes); i++) {</div><div class='add'>+		if (frag_size &lt;= supported_sizes[i])</div><div class='add'>+			return supported_sizes[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Should not happen */</div><div class='add'>+	return TX_MAX_FRAG_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int igc_tsn_enable_offload(struct igc_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct igc_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 tqavctrl, baset_l, baset_h;</div><div class='ctx'> 	u32 sec, nsec, cycle;</div><div class='ctx'> 	ktime_t base_time, systim;</div><div class='add'>+	u32 frag_size_mult;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	wr32(IGC_TSAUXC, 0);</div><div class='ctx'> 	wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_TSN);</div><div class='ctx'> 	wr32(IGC_TXPBS, IGC_TXPBSIZE_TSN);</div><div class='ctx'> </div><div class='add'>+	igc_tsn_set_rxpbsize(adapter, IGC_RXPBSIZE_EXP_BMC_BE_TSN);</div><div class='add'>+</div><div class='ctx'> 	if (igc_is_device_id_i226(hw))</div><div class='ctx'> 		igc_tsn_set_retx_qbvfullthreshold(adapter);</div><div class='ctx'> </div><div class='del'>-	if (adapter-&gt;strict_priority_enable) {</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='del'>-		err = netdev_set_num_tc(adapter-&gt;netdev, adapter-&gt;num_tc);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; adapter-&gt;num_tc; i++) {</div><div class='del'>-			err = netdev_set_tc_queue(adapter-&gt;netdev, i, 1,</div><div class='del'>-						  adapter-&gt;queue_per_tc[i]);</div><div class='del'>-			if (err)</div><div class='del'>-				return err;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* In case the card is configured with less than four queues. */</div><div class='del'>-		for (; i &lt; IGC_MAX_TX_QUEUES; i++)</div><div class='del'>-			adapter-&gt;queue_per_tc[i] = i;</div><div class='del'>-</div><div class='del'>-		/* Configure queue priorities according to the user provided</div><div class='del'>-		 * mapping.</div><div class='del'>-		 */</div><div class='del'>-		igc_tsn_tx_arb(adapter, adapter-&gt;queue_per_tc);</div><div class='del'>-</div><div class='del'>-		/* Enable legacy TSN mode which will do strict priority without</div><div class='del'>-		 * any other TSN features.</div><div class='del'>-		 */</div><div class='del'>-		tqavctrl = rd32(IGC_TQAVCTRL);</div><div class='del'>-		tqavctrl |= IGC_TQAVCTRL_TRANSMIT_MODE_TSN;</div><div class='del'>-		tqavctrl &amp;= ~IGC_TQAVCTRL_ENHANCED_QAV;</div><div class='del'>-		wr32(IGC_TQAVCTRL, tqavctrl);</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='add'>+	if (adapter-&gt;strict_priority_enable ||</div><div class='add'>+	    adapter-&gt;flags &amp; IGC_FLAG_TSN_REVERSE_TXQ_PRIO)</div><div class='add'>+		igc_tsn_tx_arb(adapter, true);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;num_tx_queues; i++) {</div><div class='ctx'> 		struct igc_ring *ring = adapter-&gt;tx_ring[i];</div><div class='add'>+		u32 txdctl = rd32(IGC_TXDCTL(ring-&gt;reg_idx));</div><div class='ctx'> 		u32 txqctl = 0;</div><div class='ctx'> 		u16 cbs_value;</div><div class='ctx'> 		u32 tqavcc;</div><div class='hunk'>@@ -274,6 +501,22 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter)</div><div class='ctx'> 		if (ring-&gt;launchtime_enable)</div><div class='ctx'> 			txqctl |= IGC_TXQCTL_QUEUE_MODE_LAUNCHT;</div><div class='ctx'> </div><div class='add'>+		if (!adapter-&gt;fpe.tx_enabled) {</div><div class='add'>+			/* fpe inactive: clear both flags */</div><div class='add'>+			txqctl &amp;= ~IGC_TXQCTL_PREEMPTIBLE;</div><div class='add'>+			txdctl &amp;= ~IGC_TXDCTL_PRIORITY_HIGH;</div><div class='add'>+		} else if (ring-&gt;preemptible) {</div><div class='add'>+			/* fpe active + preemptible: enable preemptible queue + set low priority */</div><div class='add'>+			txqctl |= IGC_TXQCTL_PREEMPTIBLE;</div><div class='add'>+			txdctl &amp;= ~IGC_TXDCTL_PRIORITY_HIGH;</div><div class='add'>+		} else {</div><div class='add'>+			/* fpe active + express: enable express queue + set high priority */</div><div class='add'>+			txqctl &amp;= ~IGC_TXQCTL_PREEMPTIBLE;</div><div class='add'>+			txdctl |= IGC_TXDCTL_PRIORITY_HIGH;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		wr32(IGC_TXDCTL(ring-&gt;reg_idx), txdctl);</div><div class='add'>+</div><div class='ctx'> 		/* Skip configuring CBS for Q2 and Q3 */</div><div class='ctx'> 		if (i &gt; 1)</div><div class='ctx'> 			goto skip_cbs;</div><div class='hunk'>@@ -361,10 +604,16 @@ skip_cbs:</div><div class='ctx'> 		wr32(IGC_TXQCTL(i), txqctl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tqavctrl = rd32(IGC_TQAVCTRL) &amp; ~IGC_TQAVCTRL_FUTSCDDIS;</div><div class='del'>-</div><div class='add'>+	tqavctrl = rd32(IGC_TQAVCTRL) &amp; ~(IGC_TQAVCTRL_FUTSCDDIS |</div><div class='add'>+		   IGC_TQAVCTRL_PREEMPT_ENA | IGC_TQAVCTRL_MIN_FRAG_MASK);</div><div class='ctx'> 	tqavctrl |= IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV;</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;fpe.mmsv.pmac_enabled)</div><div class='add'>+		tqavctrl |= IGC_TQAVCTRL_PREEMPT_ENA;</div><div class='add'>+</div><div class='add'>+	frag_size_mult = igc_fpe_get_frag_size_mult(&amp;adapter-&gt;fpe);</div><div class='add'>+	tqavctrl |= FIELD_PREP(IGC_TQAVCTRL_MIN_FRAG_MASK, frag_size_mult);</div><div class='add'>+</div><div class='ctx'> 	adapter-&gt;qbv_count++;</div><div class='ctx'> </div><div class='ctx'> 	cycle = adapter-&gt;cycle_time;</div><div class='hunk'>@@ -425,6 +674,14 @@ int igc_tsn_reset(struct igc_adapter *adapter)</div><div class='ctx'> 	unsigned int new_flags;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;fpe.mmsv.pmac_enabled) {</div><div class='add'>+		err = igc_enable_empty_addr_recv(adapter);</div><div class='add'>+		if (err &amp;&amp; net_ratelimit())</div><div class='add'>+			netdev_err(adapter-&gt;netdev, "Error adding empty address to MAC filter\n");</div><div class='add'>+	} else {</div><div class='add'>+		igc_disable_empty_addr_recv(adapter);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	new_flags = igc_tsn_new_flags(adapter);</div><div class='ctx'> </div><div class='ctx'> 	if (!(new_flags &amp; IGC_FLAG_TSN_ANY_ENABLED))</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.h b/drivers/net/ethernet/intel/igc/igc_tsn.h<br/>index 98ec845a86bf..a95b893459d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_tsn.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_tsn.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_tsn.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_tsn.h</a></div><div class='hunk'>@@ -4,9 +4,66 @@</div><div class='ctx'> #ifndef _IGC_TSN_H_</div><div class='ctx'> #define _IGC_TSN_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;net/pkt_sched.h&gt;</div><div class='add'>+</div><div class='add'>+#define IGC_RX_MIN_FRAG_SIZE		60</div><div class='add'>+#define SMD_FRAME_SIZE			60</div><div class='add'>+</div><div class='add'>+enum igc_txd_popts_type {</div><div class='add'>+	SMD_V = 0x01,</div><div class='add'>+	SMD_R = 0x02,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+DECLARE_STATIC_KEY_FALSE(igc_fpe_enabled);</div><div class='add'>+</div><div class='add'>+void igc_fpe_init(struct igc_adapter *adapter);</div><div class='add'>+void igc_fpe_clear_preempt_queue(struct igc_adapter *adapter);</div><div class='add'>+void igc_fpe_save_preempt_queue(struct igc_adapter *adapter,</div><div class='add'>+				const struct tc_mqprio_qopt_offload *mqprio);</div><div class='add'>+u32 igc_fpe_get_supported_frag_size(u32 frag_size);</div><div class='ctx'> int igc_tsn_offload_apply(struct igc_adapter *adapter);</div><div class='ctx'> int igc_tsn_reset(struct igc_adapter *adapter);</div><div class='ctx'> void igc_tsn_adjust_txtime_offset(struct igc_adapter *adapter);</div><div class='ctx'> bool igc_tsn_is_taprio_activated_by_user(struct igc_adapter *adapter);</div><div class='ctx'> </div><div class='add'>+static inline bool igc_fpe_is_pmac_enabled(struct igc_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return static_branch_unlikely(&amp;igc_fpe_enabled) &amp;&amp;</div><div class='add'>+	       adapter-&gt;fpe.mmsv.pmac_enabled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool igc_fpe_handle_mpacket(struct igc_adapter *adapter,</div><div class='add'>+					  union igc_adv_rx_desc *rx_desc,</div><div class='add'>+					  unsigned int size, void *pktbuf)</div><div class='add'>+{</div><div class='add'>+	u32 status_error = le32_to_cpu(rx_desc-&gt;wb.upper.status_error);</div><div class='add'>+	int smd;</div><div class='add'>+</div><div class='add'>+	smd = FIELD_GET(IGC_RXDADV_STAT_SMD_TYPE_MASK, status_error);</div><div class='add'>+	if (smd != IGC_RXD_STAT_SMD_TYPE_V &amp;&amp; smd != IGC_RXD_STAT_SMD_TYPE_R)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (size == SMD_FRAME_SIZE &amp;&amp; mem_is_zero(pktbuf, SMD_FRAME_SIZE)) {</div><div class='add'>+		struct ethtool_mmsv *mmsv = &amp;adapter-&gt;fpe.mmsv;</div><div class='add'>+		enum ethtool_mmsv_event event;</div><div class='add'>+</div><div class='add'>+		if (smd == IGC_RXD_STAT_SMD_TYPE_V)</div><div class='add'>+			event = ETHTOOL_MMSV_LP_SENT_VERIFY_MPACKET;</div><div class='add'>+		else</div><div class='add'>+			event = ETHTOOL_MMSV_LP_SENT_RESPONSE_MPACKET;</div><div class='add'>+</div><div class='add'>+		ethtool_mmsv_event_handle(mmsv, event);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool igc_fpe_transmitted_smd_v(union igc_adv_tx_desc *tx_desc)</div><div class='add'>+{</div><div class='add'>+	u32 olinfo_status = le32_to_cpu(tx_desc-&gt;read.olinfo_status);</div><div class='add'>+	u8 smd = FIELD_GET(IGC_TXD_POPTS_SMD_MASK, olinfo_status);</div><div class='add'>+</div><div class='add'>+	return smd == SMD_V;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* _IGC_BASE_H */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/igc/igc_xdp.c b/drivers/net/ethernet/intel/igc/igc_xdp.c<br/>index e27af72aada8..9eb47b4beb06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_xdp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/igc/igc_xdp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/igc/igc_xdp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/igc/igc_xdp.c</a></div><div class='hunk'>@@ -13,6 +13,8 @@ int igc_xdp_set_prog(struct igc_adapter *adapter, struct bpf_prog *prog,</div><div class='ctx'> 	struct net_device *dev = adapter-&gt;netdev;</div><div class='ctx'> 	bool if_running = netif_running(dev);</div><div class='ctx'> 	struct bpf_prog *old_prog;</div><div class='add'>+	bool need_update;</div><div class='add'>+	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;mtu &gt; ETH_DATA_LEN) {</div><div class='ctx'> 		/* For now, the driver doesn't support XDP functionality with</div><div class='hunk'>@@ -22,8 +24,14 @@ int igc_xdp_set_prog(struct igc_adapter *adapter, struct bpf_prog *prog,</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (if_running)</div><div class='del'>-		igc_close(dev);</div><div class='add'>+	need_update = !!adapter-&gt;xdp_prog != !!prog;</div><div class='add'>+	if (if_running &amp;&amp; need_update) {</div><div class='add'>+		for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++) {</div><div class='add'>+			igc_disable_rx_ring(adapter-&gt;rx_ring[i]);</div><div class='add'>+			igc_disable_tx_ring(adapter-&gt;tx_ring[i]);</div><div class='add'>+			napi_disable(&amp;adapter-&gt;rx_ring[i]-&gt;q_vector-&gt;napi);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	old_prog = xchg(&amp;adapter-&gt;xdp_prog, prog);</div><div class='ctx'> 	if (old_prog)</div><div class='hunk'>@@ -34,8 +42,13 @@ int igc_xdp_set_prog(struct igc_adapter *adapter, struct bpf_prog *prog,</div><div class='ctx'> 	else</div><div class='ctx'> 		xdp_features_clear_redirect_target(dev);</div><div class='ctx'> </div><div class='del'>-	if (if_running)</div><div class='del'>-		igc_open(dev);</div><div class='add'>+	if (if_running &amp;&amp; need_update) {</div><div class='add'>+		for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++) {</div><div class='add'>+			napi_enable(&amp;adapter-&gt;rx_ring[i]-&gt;q_vector-&gt;napi);</div><div class='add'>+			igc_enable_tx_ring(adapter-&gt;tx_ring[i]);</div><div class='add'>+			igc_enable_rx_ring(adapter-&gt;rx_ring[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/Makefile b/drivers/net/ethernet/intel/ixgbe/Makefile<br/>index 965e5ce1b326..2e7738f41c58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/Makefile</a></div><div class='hunk'>@@ -1,15 +1,17 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='del'>-# Copyright(c) 1999 - 2018 Intel Corporation.</div><div class='add'>+# Copyright(c) 1999 - 2024 Intel Corporation.</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Intel(R) 10GbE PCI Express ethernet driver</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+subdir-ccflags-y += -I$(src)</div><div class='ctx'> obj-$(CONFIG_IXGBE) += ixgbe.o</div><div class='ctx'> </div><div class='ctx'> ixgbe-y := ixgbe_main.o ixgbe_common.o ixgbe_ethtool.o \</div><div class='ctx'>            ixgbe_82599.o ixgbe_82598.o ixgbe_phy.o ixgbe_sriov.o \</div><div class='ctx'>            ixgbe_mbx.o ixgbe_x540.o ixgbe_x550.o ixgbe_lib.o ixgbe_ptp.o \</div><div class='del'>-           ixgbe_xsk.o</div><div class='add'>+           ixgbe_xsk.o ixgbe_e610.o devlink/devlink.o ixgbe_fw_update.o \</div><div class='add'>+	   devlink/region.o</div><div class='ctx'> </div><div class='ctx'> ixgbe-$(CONFIG_IXGBE_DCB) +=  ixgbe_dcb.o ixgbe_dcb_82598.o \</div><div class='ctx'>                               ixgbe_dcb_82599.o ixgbe_dcb_nl.o</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/devlink/devlink.c b/drivers/net/ethernet/intel/ixgbe/devlink/devlink.c<br/>new file mode 100644<br/>index 000000000000..d227f4d2a2d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/devlink/devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/devlink/devlink.c</a></div><div class='hunk'>@@ -0,0 +1,558 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2025, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include "ixgbe.h"</div><div class='add'>+#include "devlink.h"</div><div class='add'>+#include "ixgbe_fw_update.h"</div><div class='add'>+</div><div class='add'>+struct ixgbe_info_ctx {</div><div class='add'>+	char buf[128];</div><div class='add'>+	struct ixgbe_orom_info pending_orom;</div><div class='add'>+	struct ixgbe_nvm_info pending_nvm;</div><div class='add'>+	struct ixgbe_netlist_info pending_netlist;</div><div class='add'>+	struct ixgbe_hw_dev_caps dev_caps;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ixgbe_devlink_version_type {</div><div class='add'>+	IXGBE_DL_VERSION_RUNNING,</div><div class='add'>+	IXGBE_DL_VERSION_STORED</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ixgbe_info_get_dsn(struct ixgbe_adapter *adapter,</div><div class='add'>+			       struct ixgbe_info_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	u8 dsn[8];</div><div class='add'>+</div><div class='add'>+	/* Copy the DSN into an array in Big Endian format */</div><div class='add'>+	put_unaligned_be64(pci_get_dsn(adapter-&gt;pdev), dsn);</div><div class='add'>+</div><div class='add'>+	snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "%8phD", dsn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_info_orom_ver(struct ixgbe_adapter *adapter,</div><div class='add'>+				struct ixgbe_info_ctx *ctx,</div><div class='add'>+				enum ixgbe_devlink_version_type type)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct ixgbe_nvm_version nvm_ver;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;buf[0] = '\0';</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_e610) {</div><div class='add'>+		struct ixgbe_orom_info *orom = &amp;adapter-&gt;hw.flash.orom;</div><div class='add'>+</div><div class='add'>+		if (type == IXGBE_DL_VERSION_STORED &amp;&amp;</div><div class='add'>+		    ctx-&gt;dev_caps.common_cap.nvm_update_pending_orom)</div><div class='add'>+			orom = &amp;ctx-&gt;pending_orom;</div><div class='add'>+</div><div class='add'>+		snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "%u.%u.%u",</div><div class='add'>+			 orom-&gt;major, orom-&gt;build, orom-&gt;patch);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ixgbe_get_oem_prod_version(hw, &amp;nvm_ver);</div><div class='add'>+	if (nvm_ver.oem_valid) {</div><div class='add'>+		snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "%x.%x.%x",</div><div class='add'>+			 nvm_ver.oem_major, nvm_ver.oem_minor,</div><div class='add'>+			 nvm_ver.oem_release);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ixgbe_get_orom_version(hw, &amp;nvm_ver);</div><div class='add'>+	if (nvm_ver.or_valid)</div><div class='add'>+		snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "%d.%d.%d",</div><div class='add'>+			 nvm_ver.or_major, nvm_ver.or_build, nvm_ver.or_patch);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_info_eetrack(struct ixgbe_adapter *adapter,</div><div class='add'>+			       struct ixgbe_info_ctx *ctx,</div><div class='add'>+			       enum ixgbe_devlink_version_type type)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct ixgbe_nvm_version nvm_ver;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_e610) {</div><div class='add'>+		u32 eetrack = hw-&gt;flash.nvm.eetrack;</div><div class='add'>+</div><div class='add'>+		if (type == IXGBE_DL_VERSION_STORED &amp;&amp;</div><div class='add'>+		    ctx-&gt;dev_caps.common_cap.nvm_update_pending_nvm)</div><div class='add'>+			eetrack = ctx-&gt;pending_nvm.eetrack;</div><div class='add'>+</div><div class='add'>+		snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "0x%08x", eetrack);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ixgbe_get_oem_prod_version(hw, &amp;nvm_ver);</div><div class='add'>+</div><div class='add'>+	/* No ETRACK version for OEM */</div><div class='add'>+	if (nvm_ver.oem_valid) {</div><div class='add'>+		ctx-&gt;buf[0] = '\0';</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ixgbe_get_etk_id(hw, &amp;nvm_ver);</div><div class='add'>+	snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "0x%08x", nvm_ver.etk_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_info_fw_api(struct ixgbe_adapter *adapter,</div><div class='add'>+			      struct ixgbe_info_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "%u.%u.%u",</div><div class='add'>+		 hw-&gt;api_maj_ver, hw-&gt;api_min_ver, hw-&gt;api_patch);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_info_fw_build(struct ixgbe_adapter *adapter,</div><div class='add'>+				struct ixgbe_info_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "0x%08x", hw-&gt;fw_build);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_info_fw_srev(struct ixgbe_adapter *adapter,</div><div class='add'>+			       struct ixgbe_info_ctx *ctx,</div><div class='add'>+			       enum ixgbe_devlink_version_type type)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_nvm_info *nvm = &amp;adapter-&gt;hw.flash.nvm;</div><div class='add'>+</div><div class='add'>+	if (type == IXGBE_DL_VERSION_STORED &amp;&amp;</div><div class='add'>+	    ctx-&gt;dev_caps.common_cap.nvm_update_pending_nvm)</div><div class='add'>+		nvm = &amp;ctx-&gt;pending_nvm;</div><div class='add'>+</div><div class='add'>+	snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "%u", nvm-&gt;srev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_info_orom_srev(struct ixgbe_adapter *adapter,</div><div class='add'>+				 struct ixgbe_info_ctx *ctx,</div><div class='add'>+				 enum ixgbe_devlink_version_type type)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_orom_info *orom = &amp;adapter-&gt;hw.flash.orom;</div><div class='add'>+</div><div class='add'>+	if (type == IXGBE_DL_VERSION_STORED &amp;&amp;</div><div class='add'>+	    ctx-&gt;dev_caps.common_cap.nvm_update_pending_orom)</div><div class='add'>+		orom = &amp;ctx-&gt;pending_orom;</div><div class='add'>+</div><div class='add'>+	snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "%u", orom-&gt;srev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_info_nvm_ver(struct ixgbe_adapter *adapter,</div><div class='add'>+			       struct ixgbe_info_ctx *ctx,</div><div class='add'>+			       enum ixgbe_devlink_version_type type)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_nvm_info *nvm = &amp;adapter-&gt;hw.flash.nvm;</div><div class='add'>+</div><div class='add'>+	if (type == IXGBE_DL_VERSION_STORED &amp;&amp;</div><div class='add'>+	    ctx-&gt;dev_caps.common_cap.nvm_update_pending_nvm)</div><div class='add'>+		nvm = &amp;ctx-&gt;pending_nvm;</div><div class='add'>+</div><div class='add'>+	snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "%x.%02x", nvm-&gt;major, nvm-&gt;minor);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_info_netlist_ver(struct ixgbe_adapter *adapter,</div><div class='add'>+				   struct ixgbe_info_ctx *ctx,</div><div class='add'>+				   enum ixgbe_devlink_version_type type)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_netlist_info *netlist = &amp;adapter-&gt;hw.flash.netlist;</div><div class='add'>+</div><div class='add'>+	if (type == IXGBE_DL_VERSION_STORED &amp;&amp;</div><div class='add'>+	    ctx-&gt;dev_caps.common_cap.nvm_update_pending_netlist)</div><div class='add'>+		netlist = &amp;ctx-&gt;pending_netlist;</div><div class='add'>+</div><div class='add'>+	/* The netlist version fields are BCD formatted */</div><div class='add'>+	snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "%x.%x.%x-%x.%x.%x",</div><div class='add'>+		 netlist-&gt;major, netlist-&gt;minor,</div><div class='add'>+		 netlist-&gt;type &gt;&gt; 16, netlist-&gt;type &amp; 0xFFFF,</div><div class='add'>+		 netlist-&gt;rev, netlist-&gt;cust_ver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ixgbe_info_netlist_build(struct ixgbe_adapter *adapter,</div><div class='add'>+				     struct ixgbe_info_ctx *ctx,</div><div class='add'>+				     enum ixgbe_devlink_version_type type)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_netlist_info *netlist = &amp;adapter-&gt;hw.flash.netlist;</div><div class='add'>+</div><div class='add'>+	if (type == IXGBE_DL_VERSION_STORED &amp;&amp;</div><div class='add'>+	    ctx-&gt;dev_caps.common_cap.nvm_update_pending_netlist)</div><div class='add'>+		netlist = &amp;ctx-&gt;pending_netlist;</div><div class='add'>+</div><div class='add'>+	snprintf(ctx-&gt;buf, sizeof(ctx-&gt;buf), "0x%08x", netlist-&gt;hash);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ixgbe_set_ctx_dev_caps(struct ixgbe_hw *hw,</div><div class='add'>+				  struct ixgbe_info_ctx *ctx,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool *pending_orom, *pending_nvm, *pending_netlist;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_discover_dev_caps(hw, &amp;ctx-&gt;dev_caps);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Unable to discover device capabilities");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pending_orom = &amp;ctx-&gt;dev_caps.common_cap.nvm_update_pending_orom;</div><div class='add'>+	pending_nvm = &amp;ctx-&gt;dev_caps.common_cap.nvm_update_pending_nvm;</div><div class='add'>+	pending_netlist = &amp;ctx-&gt;dev_caps.common_cap.nvm_update_pending_netlist;</div><div class='add'>+</div><div class='add'>+	if (*pending_orom) {</div><div class='add'>+		err = ixgbe_get_inactive_orom_ver(hw, &amp;ctx-&gt;pending_orom);</div><div class='add'>+		if (err)</div><div class='add'>+			*pending_orom = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (*pending_nvm) {</div><div class='add'>+		err = ixgbe_get_inactive_nvm_ver(hw, &amp;ctx-&gt;pending_nvm);</div><div class='add'>+		if (err)</div><div class='add'>+			*pending_nvm = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (*pending_netlist) {</div><div class='add'>+		err = ixgbe_get_inactive_netlist_ver(hw, &amp;ctx-&gt;pending_netlist);</div><div class='add'>+		if (err)</div><div class='add'>+			*pending_netlist = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ixgbe_devlink_info_get_e610(struct ixgbe_adapter *adapter,</div><div class='add'>+				       struct devlink_info_req *req,</div><div class='add'>+				       struct ixgbe_info_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_fw_api(adapter, ctx);</div><div class='add'>+	err = devlink_info_version_running_put(req,</div><div class='add'>+					       DEVLINK_INFO_VERSION_GENERIC_FW_MGMT_API,</div><div class='add'>+					       ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_fw_build(adapter, ctx);</div><div class='add'>+	err = devlink_info_version_running_put(req, "fw.mgmt.build", ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_fw_srev(adapter, ctx, IXGBE_DL_VERSION_RUNNING);</div><div class='add'>+	err = devlink_info_version_running_put(req, "fw.mgmt.srev", ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_orom_srev(adapter, ctx, IXGBE_DL_VERSION_RUNNING);</div><div class='add'>+	err = devlink_info_version_running_put(req, "fw.undi.srev", ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_nvm_ver(adapter, ctx, IXGBE_DL_VERSION_RUNNING);</div><div class='add'>+	err = devlink_info_version_running_put(req, "fw.psid.api", ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_netlist_ver(adapter, ctx, IXGBE_DL_VERSION_RUNNING);</div><div class='add'>+	err = devlink_info_version_running_put(req, "fw.netlist", ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_netlist_build(adapter, ctx, IXGBE_DL_VERSION_RUNNING);</div><div class='add'>+	return devlink_info_version_running_put(req, "fw.netlist.build",</div><div class='add'>+						ctx-&gt;buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+ixgbe_devlink_pending_info_get_e610(struct ixgbe_adapter *adapter,</div><div class='add'>+				    struct devlink_info_req *req,</div><div class='add'>+				    struct ixgbe_info_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_orom_ver(adapter, ctx, IXGBE_DL_VERSION_STORED);</div><div class='add'>+	err = devlink_info_version_stored_put(req,</div><div class='add'>+					      DEVLINK_INFO_VERSION_GENERIC_FW_UNDI,</div><div class='add'>+					      ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_eetrack(adapter, ctx, IXGBE_DL_VERSION_STORED);</div><div class='add'>+	err = devlink_info_version_stored_put(req,</div><div class='add'>+					      DEVLINK_INFO_VERSION_GENERIC_FW_BUNDLE_ID,</div><div class='add'>+					      ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_fw_srev(adapter, ctx, IXGBE_DL_VERSION_STORED);</div><div class='add'>+	err = devlink_info_version_stored_put(req, "fw.mgmt.srev", ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_orom_srev(adapter, ctx, IXGBE_DL_VERSION_STORED);</div><div class='add'>+	err = devlink_info_version_stored_put(req, "fw.undi.srev", ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_nvm_ver(adapter, ctx, IXGBE_DL_VERSION_STORED);</div><div class='add'>+	err = devlink_info_version_stored_put(req, "fw.psid.api", ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_netlist_ver(adapter, ctx, IXGBE_DL_VERSION_STORED);</div><div class='add'>+	err = devlink_info_version_stored_put(req, "fw.netlist", ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_netlist_build(adapter, ctx, IXGBE_DL_VERSION_STORED);</div><div class='add'>+	return devlink_info_version_stored_put(req, "fw.netlist.build",</div><div class='add'>+					       ctx-&gt;buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ixgbe_devlink_info_get(struct devlink *devlink,</div><div class='add'>+				  struct devlink_info_req *req,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = devlink_priv(devlink);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct ixgbe_info_ctx *ctx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ctx = kmalloc(sizeof(*ctx), GFP_KERNEL);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_e610)</div><div class='add'>+		ixgbe_refresh_fw_version(adapter);</div><div class='add'>+</div><div class='add'>+	ixgbe_info_get_dsn(adapter, ctx);</div><div class='add'>+	err = devlink_info_serial_number_put(req, ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_ctx;</div><div class='add'>+</div><div class='add'>+	err = hw-&gt;eeprom.ops.read_pba_string(hw, ctx-&gt;buf, sizeof(ctx-&gt;buf));</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_ctx;</div><div class='add'>+</div><div class='add'>+	err = devlink_info_version_fixed_put(req,</div><div class='add'>+					     DEVLINK_INFO_VERSION_GENERIC_BOARD_ID,</div><div class='add'>+					     ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_ctx;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_orom_ver(adapter, ctx, IXGBE_DL_VERSION_RUNNING);</div><div class='add'>+	err = devlink_info_version_running_put(req,</div><div class='add'>+					       DEVLINK_INFO_VERSION_GENERIC_FW_UNDI,</div><div class='add'>+					       ctx-&gt;buf);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_ctx;</div><div class='add'>+</div><div class='add'>+	ixgbe_info_eetrack(adapter, ctx, IXGBE_DL_VERSION_RUNNING);</div><div class='add'>+	err = devlink_info_version_running_put(req,</div><div class='add'>+					       DEVLINK_INFO_VERSION_GENERIC_FW_BUNDLE_ID,</div><div class='add'>+					       ctx-&gt;buf);</div><div class='add'>+	if (err || hw-&gt;mac.type != ixgbe_mac_e610)</div><div class='add'>+		goto free_ctx;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_set_ctx_dev_caps(hw, ctx, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_ctx;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_devlink_info_get_e610(adapter, req, ctx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_ctx;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_devlink_pending_info_get_e610(adapter, req, ctx);</div><div class='add'>+free_ctx:</div><div class='add'>+	kfree(ctx);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_devlink_reload_empr_start - Start EMP reset to activate new firmware</div><div class='add'>+ * @devlink: pointer to the devlink instance to reload</div><div class='add'>+ * @netns_change: if true, the network namespace is changing</div><div class='add'>+ * @action: the action to perform. Must be DEVLINK_RELOAD_ACTION_FW_ACTIVATE</div><div class='add'>+ * @limit: limits on what reload should do, such as not resetting</div><div class='add'>+ * @extack: netlink extended ACK structure</div><div class='add'>+ *</div><div class='add'>+ * Allow user to activate new Embedded Management Processor firmware by</div><div class='add'>+ * issuing device specific EMP reset. Called in response to</div><div class='add'>+ * a DEVLINK_CMD_RELOAD with the DEVLINK_RELOAD_ACTION_FW_ACTIVATE.</div><div class='add'>+ *</div><div class='add'>+ * Note that teardown and rebuild of the driver state happens automatically as</div><div class='add'>+ * part of an interrupt and watchdog task. This is because all physical</div><div class='add'>+ * functions on the device must be able to reset when an EMP reset occurs from</div><div class='add'>+ * any source.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_devlink_reload_empr_start(struct devlink *devlink,</div><div class='add'>+					   bool netns_change,</div><div class='add'>+					   enum devlink_reload_action action,</div><div class='add'>+					   enum devlink_reload_limit limit,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = devlink_priv(devlink);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u8 pending;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type != ixgbe_mac_e610)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_get_pending_updates(adapter, &amp;pending, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Pending is a bitmask of which flash banks have a pending update,</div><div class='add'>+	 * including the main NVM bank, the Option ROM bank, and the netlist</div><div class='add'>+	 * bank. If any of these bits are set, then there is a pending update</div><div class='add'>+	 * waiting to be activated.</div><div class='add'>+	 */</div><div class='add'>+	if (!pending) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "No pending firmware update");</div><div class='add'>+		return -ECANCELED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;fw_emp_reset_disabled) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "EMP reset is not available. To activate firmware, a reboot or power cycle is needed");</div><div class='add'>+		return -ECANCELED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_nvm_update_empr(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to trigger EMP device reset to reload firmware");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*Wait for 10 sec with 0.5 sec tic. EMPR takes no less than half of a sec */</div><div class='add'>+#define IXGBE_DEVLINK_RELOAD_TIMEOUT_SEC	20</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_devlink_reload_empr_finish - finishes EMP reset</div><div class='add'>+ * @devlink: pointer to the devlink instance</div><div class='add'>+ * @action: the action to perform.</div><div class='add'>+ * @limit: limits on what reload should do</div><div class='add'>+ * @actions_performed: actions performed</div><div class='add'>+ * @extack: netlink extended ACK structure</div><div class='add'>+ *</div><div class='add'>+ * Wait for new NVM to be loaded during EMP reset.</div><div class='add'>+ *</div><div class='add'>+ * Return: -ETIME when timer is exceeded, 0 on success.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_devlink_reload_empr_finish(struct devlink *devlink,</div><div class='add'>+					    enum devlink_reload_action action,</div><div class='add'>+					    enum devlink_reload_limit limit,</div><div class='add'>+					    u32 *actions_performed,</div><div class='add'>+					    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = devlink_priv(devlink);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	int i = 0;</div><div class='add'>+	u32 fwsm;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		/* Just right away after triggering EMP reset the FWSM register</div><div class='add'>+		 * may be not cleared yet, so begin the loop with the delay</div><div class='add'>+		 * in order to not check the not updated register.</div><div class='add'>+		 */</div><div class='add'>+		mdelay(500);</div><div class='add'>+</div><div class='add'>+		fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));</div><div class='add'>+</div><div class='add'>+		if (i++ &gt;= IXGBE_DEVLINK_RELOAD_TIMEOUT_SEC)</div><div class='add'>+			return -ETIME;</div><div class='add'>+</div><div class='add'>+	} while (!(fwsm &amp; IXGBE_FWSM_FW_VAL_BIT));</div><div class='add'>+</div><div class='add'>+	*actions_performed = BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;flags2 &amp;= ~(IXGBE_FLAG2_API_MISMATCH |</div><div class='add'>+			     IXGBE_FLAG2_FW_ROLLBACK);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_ops ixgbe_devlink_ops = {</div><div class='add'>+	.info_get = ixgbe_devlink_info_get,</div><div class='add'>+	.supported_flash_update_params =</div><div class='add'>+		DEVLINK_SUPPORT_FLASH_UPDATE_OVERWRITE_MASK,</div><div class='add'>+	.flash_update = ixgbe_flash_pldm_image,</div><div class='add'>+	.reload_actions = BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),</div><div class='add'>+	.reload_down = ixgbe_devlink_reload_empr_start,</div><div class='add'>+	.reload_up = ixgbe_devlink_reload_empr_finish,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_allocate_devlink - Allocate devlink instance</div><div class='add'>+ * @dev: device to allocate devlink for</div><div class='add'>+ *</div><div class='add'>+ * Allocate a devlink instance for this physical function.</div><div class='add'>+ *</div><div class='add'>+ * Return: pointer to the device adapter structure on success,</div><div class='add'>+ * ERR_PTR(-ENOMEM) when allocation failed.</div><div class='add'>+ */</div><div class='add'>+struct ixgbe_adapter *ixgbe_allocate_devlink(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+</div><div class='add'>+	devlink = devlink_alloc(&amp;ixgbe_devlink_ops, sizeof(*adapter), dev);</div><div class='add'>+	if (!devlink)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	adapter = devlink_priv(devlink);</div><div class='add'>+	adapter-&gt;devlink = devlink;</div><div class='add'>+</div><div class='add'>+	return adapter;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_devlink_set_switch_id - Set unique switch ID based on PCI DSN</div><div class='add'>+ * @adapter: pointer to the device adapter structure</div><div class='add'>+ * @ppid: struct with switch id information</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_devlink_set_switch_id(struct ixgbe_adapter *adapter,</div><div class='add'>+					struct netdev_phys_item_id *ppid)</div><div class='add'>+{</div><div class='add'>+	u64 id = pci_get_dsn(adapter-&gt;pdev);</div><div class='add'>+</div><div class='add'>+	ppid-&gt;id_len = sizeof(id);</div><div class='add'>+	put_unaligned_be64(id, &amp;ppid-&gt;id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_devlink_register_port - Register devlink port</div><div class='add'>+ * @adapter: pointer to the device adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Create and register a devlink_port for this physical function.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_devlink_register_port(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct devlink_port *devlink_port = &amp;adapter-&gt;devlink_port;</div><div class='add'>+	struct devlink *devlink = adapter-&gt;devlink;</div><div class='add'>+	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	struct devlink_port_attrs attrs = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;</div><div class='add'>+	attrs.phys.port_number = adapter-&gt;hw.bus.func;</div><div class='add'>+	attrs.no_phys_port_name = 1;</div><div class='add'>+	ixgbe_devlink_set_switch_id(adapter, &amp;attrs.switch_id);</div><div class='add'>+</div><div class='add'>+	devlink_port_attrs_set(devlink_port, &amp;attrs);</div><div class='add'>+</div><div class='add'>+	err = devl_port_register(devlink, devlink_port, 0);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"devlink port registration failed, err %d\n", err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/devlink/devlink.h b/drivers/net/ethernet/intel/ixgbe/devlink/devlink.h<br/>new file mode 100644<br/>index 000000000000..381558058048<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/devlink/devlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/devlink/devlink.h</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2025, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _IXGBE_DEVLINK_H_</div><div class='add'>+#define _IXGBE_DEVLINK_H_</div><div class='add'>+</div><div class='add'>+struct ixgbe_adapter *ixgbe_allocate_devlink(struct device *dev);</div><div class='add'>+int ixgbe_devlink_register_port(struct ixgbe_adapter *adapter);</div><div class='add'>+void ixgbe_devlink_init_regions(struct ixgbe_adapter *adapter);</div><div class='add'>+void ixgbe_devlink_destroy_regions(struct ixgbe_adapter *adapter);</div><div class='add'>+</div><div class='add'>+#endif /* _IXGBE_DEVLINK_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/devlink/region.c b/drivers/net/ethernet/intel/ixgbe/devlink/region.c<br/>new file mode 100644<br/>index 000000000000..478b4f435120<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/devlink/region.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/devlink/region.c</a></div><div class='hunk'>@@ -0,0 +1,290 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2025, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include "ixgbe.h"</div><div class='add'>+#include "devlink.h"</div><div class='add'>+</div><div class='add'>+#define IXGBE_DEVLINK_READ_BLK_SIZE (1024 * 1024)</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops ixgbe_nvm_region_ops;</div><div class='add'>+static const struct devlink_region_ops ixgbe_sram_region_ops;</div><div class='add'>+</div><div class='add'>+static int ixgbe_devlink_parse_region(struct ixgbe_hw *hw,</div><div class='add'>+				      const struct devlink_region_ops *ops,</div><div class='add'>+				      bool *read_shadow_ram, u32 *nvm_size)</div><div class='add'>+{</div><div class='add'>+	if (ops == &amp;ixgbe_nvm_region_ops) {</div><div class='add'>+		*read_shadow_ram = false;</div><div class='add'>+		*nvm_size = hw-&gt;flash.flash_size;</div><div class='add'>+	} else if (ops == &amp;ixgbe_sram_region_ops) {</div><div class='add'>+		*read_shadow_ram = true;</div><div class='add'>+		*nvm_size = hw-&gt;flash.sr_words * 2u;</div><div class='add'>+	} else {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_devlink_nvm_snapshot - Capture a snapshot of the NVM content</div><div class='add'>+ * @devlink: the devlink instance</div><div class='add'>+ * @ops: the devlink region being snapshotted</div><div class='add'>+ * @extack: extended ACK response structure</div><div class='add'>+ * @data: on exit points to snapshot data buffer</div><div class='add'>+ *</div><div class='add'>+ * This function is called in response to the DEVLINK_CMD_REGION_NEW cmd.</div><div class='add'>+ *</div><div class='add'>+ * Capture a snapshot of the whole requested NVM region.</div><div class='add'>+ *</div><div class='add'>+ * No need to worry with freeing @data, devlink core takes care if it.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -EOPNOTSUPP for unsupported regions, -EBUSY when</div><div class='add'>+ * cannot lock NVM, -ENOMEM when cannot alloc mem and -EIO when error</div><div class='add'>+ * occurs during reading.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_devlink_nvm_snapshot(struct devlink *devlink,</div><div class='add'>+				      const struct devlink_region_ops *ops,</div><div class='add'>+				      struct netlink_ext_ack *extack, u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = devlink_priv(devlink);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	bool read_shadow_ram;</div><div class='add'>+	u8 *nvm_data, *buf;</div><div class='add'>+	u32 nvm_size, left;</div><div class='add'>+	u8 num_blks;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_devlink_parse_region(hw, ops, &amp;read_shadow_ram, &amp;nvm_size);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	nvm_data = kvzalloc(nvm_size, GFP_KERNEL);</div><div class='add'>+	if (!nvm_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	num_blks = DIV_ROUND_UP(nvm_size, IXGBE_DEVLINK_READ_BLK_SIZE);</div><div class='add'>+	buf = nvm_data;</div><div class='add'>+	left = nvm_size;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; num_blks; i++) {</div><div class='add'>+		u32 read_sz = min_t(u32, IXGBE_DEVLINK_READ_BLK_SIZE, left);</div><div class='add'>+</div><div class='add'>+		/* Need to acquire NVM lock during each loop run because the</div><div class='add'>+		 * total period of reading whole NVM is longer than the maximum</div><div class='add'>+		 * period the lock can be taken defined by the IXGBE_NVM_TIMEOUT.</div><div class='add'>+		 */</div><div class='add'>+		err = ixgbe_acquire_nvm(hw, LIBIE_AQC_RES_ACCESS_READ);</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Failed to acquire NVM semaphore");</div><div class='add'>+			kvfree(nvm_data);</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = ixgbe_read_flat_nvm(hw, i * IXGBE_DEVLINK_READ_BLK_SIZE,</div><div class='add'>+					  &amp;read_sz, buf, read_shadow_ram);</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Failed to read RAM content");</div><div class='add'>+			ixgbe_release_nvm(hw);</div><div class='add'>+			kvfree(nvm_data);</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ixgbe_release_nvm(hw);</div><div class='add'>+</div><div class='add'>+		buf += read_sz;</div><div class='add'>+		left -= read_sz;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*data = nvm_data;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_devlink_devcaps_snapshot - Capture a snapshot of device capabilities</div><div class='add'>+ * @devlink: the devlink instance</div><div class='add'>+ * @ops: the devlink region being snapshotted</div><div class='add'>+ * @extack: extended ACK response structure</div><div class='add'>+ * @data: on exit points to snapshot data buffer</div><div class='add'>+ *</div><div class='add'>+ * This function is called in response to the DEVLINK_CMD_REGION_NEW for</div><div class='add'>+ * the device-caps devlink region.</div><div class='add'>+ *</div><div class='add'>+ * Capture a snapshot of the device capabilities reported by firmware.</div><div class='add'>+ *</div><div class='add'>+ * No need to worry with freeing @data, devlink core takes care if it.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -ENOMEM when cannot alloc mem, or return code of</div><div class='add'>+ * the reading operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_devlink_devcaps_snapshot(struct devlink *devlink,</div><div class='add'>+					  const struct devlink_region_ops *ops,</div><div class='add'>+					  struct netlink_ext_ack *extack,</div><div class='add'>+					  u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = devlink_priv(devlink);</div><div class='add'>+	struct ixgbe_aci_cmd_list_caps_elem *caps;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	caps = kvzalloc(IXGBE_ACI_MAX_BUFFER_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!caps)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_list_caps(hw, caps, IXGBE_ACI_MAX_BUFFER_SIZE, NULL,</div><div class='add'>+				  ixgbe_aci_opc_list_dev_caps);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to read device capabilities");</div><div class='add'>+		kvfree(caps);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*data = (u8 *)caps;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_devlink_nvm_read - Read a portion of NVM flash content</div><div class='add'>+ * @devlink: the devlink instance</div><div class='add'>+ * @ops: the devlink region to snapshot</div><div class='add'>+ * @extack: extended ACK response structure</div><div class='add'>+ * @offset: the offset to start at</div><div class='add'>+ * @size: the amount to read</div><div class='add'>+ * @data: the data buffer to read into</div><div class='add'>+ *</div><div class='add'>+ * This function is called in response to DEVLINK_CMD_REGION_READ to directly</div><div class='add'>+ * read a section of the NVM contents.</div><div class='add'>+ *</div><div class='add'>+ * Read from either the nvm-flash region either shadow-ram region.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -EOPNOTSUPP for unsupported regions, -EBUSY when</div><div class='add'>+ * cannot lock NVM, -ERANGE when buffer limit exceeded and -EIO when error</div><div class='add'>+ * occurs during reading.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_devlink_nvm_read(struct devlink *devlink,</div><div class='add'>+				  const struct devlink_region_ops *ops,</div><div class='add'>+				  struct netlink_ext_ack *extack,</div><div class='add'>+				  u64 offset, u32 size, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = devlink_priv(devlink);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	bool read_shadow_ram;</div><div class='add'>+	u32 nvm_size;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_devlink_parse_region(hw, ops, &amp;read_shadow_ram, &amp;nvm_size);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (offset + size &gt; nvm_size) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Cannot read beyond the region size");</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ixgbe_acquire_nvm(hw, LIBIE_AQC_RES_ACCESS_READ);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to acquire NVM semaphore");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_flat_nvm(hw, (u32)offset, &amp;size, data, read_shadow_ram);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to read NVM contents");</div><div class='add'>+		ixgbe_release_nvm(hw);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ixgbe_release_nvm(hw);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops ixgbe_nvm_region_ops = {</div><div class='add'>+	.name = "nvm-flash",</div><div class='add'>+	.destructor = kvfree,</div><div class='add'>+	.snapshot = ixgbe_devlink_nvm_snapshot,</div><div class='add'>+	.read = ixgbe_devlink_nvm_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops ixgbe_sram_region_ops = {</div><div class='add'>+	.name = "shadow-ram",</div><div class='add'>+	.destructor = kvfree,</div><div class='add'>+	.snapshot = ixgbe_devlink_nvm_snapshot,</div><div class='add'>+	.read = ixgbe_devlink_nvm_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops ixgbe_devcaps_region_ops = {</div><div class='add'>+	.name = "device-caps",</div><div class='add'>+	.destructor = kvfree,</div><div class='add'>+	.snapshot = ixgbe_devlink_devcaps_snapshot,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_devlink_init_regions - Initialize devlink regions</div><div class='add'>+ * @adapter: adapter instance</div><div class='add'>+ *</div><div class='add'>+ * Create devlink regions used to enable access to dump the contents of the</div><div class='add'>+ * flash memory of the device.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_devlink_init_regions(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct devlink *devlink = adapter-&gt;devlink;</div><div class='add'>+	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	u64 nvm_size, sram_size;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;hw.mac.type != ixgbe_mac_e610)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	nvm_size = adapter-&gt;hw.flash.flash_size;</div><div class='add'>+	adapter-&gt;nvm_region = devl_region_create(devlink, &amp;ixgbe_nvm_region_ops,</div><div class='add'>+						 1, nvm_size);</div><div class='add'>+	if (IS_ERR(adapter-&gt;nvm_region)) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Failed to create NVM devlink region, err %ld\n",</div><div class='add'>+			PTR_ERR(adapter-&gt;nvm_region));</div><div class='add'>+		adapter-&gt;nvm_region = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sram_size = adapter-&gt;hw.flash.sr_words * 2u;</div><div class='add'>+	adapter-&gt;sram_region = devl_region_create(devlink, &amp;ixgbe_sram_region_ops,</div><div class='add'>+						  1, sram_size);</div><div class='add'>+	if (IS_ERR(adapter-&gt;sram_region)) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Failed to create shadow-ram devlink region, err %ld\n",</div><div class='add'>+			PTR_ERR(adapter-&gt;sram_region));</div><div class='add'>+		adapter-&gt;sram_region = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adapter-&gt;devcaps_region = devl_region_create(devlink,</div><div class='add'>+						     &amp;ixgbe_devcaps_region_ops,</div><div class='add'>+						     10, IXGBE_ACI_MAX_BUFFER_SIZE);</div><div class='add'>+	if (IS_ERR(adapter-&gt;devcaps_region)) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Failed to create device-caps devlink region, err %ld\n",</div><div class='add'>+			PTR_ERR(adapter-&gt;devcaps_region));</div><div class='add'>+		adapter-&gt;devcaps_region = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_devlink_destroy_regions - Destroy devlink regions</div><div class='add'>+ * @adapter: adapter instance</div><div class='add'>+ *</div><div class='add'>+ * Remove previously created regions for this adapter instance.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_devlink_destroy_regions(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (adapter-&gt;hw.mac.type != ixgbe_mac_e610)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;nvm_region)</div><div class='add'>+		devl_region_destroy(adapter-&gt;nvm_region);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;sram_region)</div><div class='add'>+		devl_region_destroy(adapter-&gt;sram_region);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;devcaps_region)</div><div class='add'>+		devl_region_destroy(adapter-&gt;devcaps_region);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h<br/>index 559b443c409f..dce4936708eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #ifndef _IXGBE_H_</div><div class='ctx'> #define _IXGBE_H_</div><div class='hunk'>@@ -17,9 +17,12 @@</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "ixgbe_type.h"</div><div class='ctx'> #include "ixgbe_common.h"</div><div class='ctx'> #include "ixgbe_dcb.h"</div><div class='add'>+#include "ixgbe_e610.h"</div><div class='ctx'> #if IS_ENABLED(CONFIG_FCOE)</div><div class='ctx'> #define IXGBE_FCOE</div><div class='ctx'> #include "ixgbe_fcoe.h"</div><div class='hunk'>@@ -173,6 +176,7 @@ enum ixgbe_tx_flags {</div><div class='ctx'> #define VMDQ_P(p)   ((p) + adapter-&gt;ring_feature[RING_F_VMDQ].offset)</div><div class='ctx'> #define IXGBE_82599_VF_DEVICE_ID        0x10ED</div><div class='ctx'> #define IXGBE_X540_VF_DEVICE_ID         0x1515</div><div class='add'>+#define IXGBE_E610_VF_DEVICE_ID		0x57AD</div><div class='ctx'> </div><div class='ctx'> #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter)	\</div><div class='ctx'> 	{							\</div><div class='hunk'>@@ -425,6 +429,10 @@ enum ixgbe_ring_f_enum {</div><div class='ctx'> #define IXGBE_BAD_L2A_QUEUE		3</div><div class='ctx'> #define IXGBE_MAX_MACVLANS		63</div><div class='ctx'> </div><div class='add'>+#define IXGBE_MAX_TX_QUEUES		128</div><div class='add'>+#define IXGBE_MAX_TX_DESCRIPTORS	40</div><div class='add'>+#define IXGBE_MAX_TX_VF_HANGS		4</div><div class='add'>+</div><div class='ctx'> DECLARE_STATIC_KEY_FALSE(ixgbe_xdp_locking_key);</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_ring_feature {</div><div class='hunk'>@@ -503,9 +511,10 @@ struct ixgbe_q_vector {</div><div class='ctx'> 	struct ixgbe_ring_container rx, tx;</div><div class='ctx'> </div><div class='ctx'> 	struct napi_struct napi;</div><div class='add'>+	struct rcu_head rcu;	/* to avoid race with update stats on free */</div><div class='add'>+</div><div class='ctx'> 	cpumask_t affinity_mask;</div><div class='ctx'> 	int numa_node;</div><div class='del'>-	struct rcu_head rcu;	/* to avoid race with update stats on free */</div><div class='ctx'> 	char name[IFNAMSIZ + 9];</div><div class='ctx'> </div><div class='ctx'> 	/* for dynamic allocation of rings associated with this q_vector */</div><div class='hunk'>@@ -610,6 +619,11 @@ struct ixgbe_adapter {</div><div class='ctx'> 	struct bpf_prog *xdp_prog;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	struct mii_bus *mii_bus;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	struct devlink_port devlink_port;</div><div class='add'>+	struct devlink_region *nvm_region;</div><div class='add'>+	struct devlink_region *sram_region;</div><div class='add'>+	struct devlink_region *devcaps_region;</div><div class='ctx'> </div><div class='ctx'> 	unsigned long state;</div><div class='ctx'> </div><div class='hunk'>@@ -654,6 +668,7 @@ struct ixgbe_adapter {</div><div class='ctx'> #define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP		BIT(9)</div><div class='ctx'> #define IXGBE_FLAG2_PTP_PPS_ENABLED		BIT(10)</div><div class='ctx'> #define IXGBE_FLAG2_PHY_INTERRUPT		BIT(11)</div><div class='add'>+#define IXGBE_FLAG2_FW_ASYNC_EVENT		BIT(12)</div><div class='ctx'> #define IXGBE_FLAG2_VLAN_PROMISC		BIT(13)</div><div class='ctx'> #define IXGBE_FLAG2_EEE_CAPABLE			BIT(14)</div><div class='ctx'> #define IXGBE_FLAG2_EEE_ENABLED			BIT(15)</div><div class='hunk'>@@ -661,6 +676,11 @@ struct ixgbe_adapter {</div><div class='ctx'> #define IXGBE_FLAG2_IPSEC_ENABLED		BIT(17)</div><div class='ctx'> #define IXGBE_FLAG2_VF_IPSEC_ENABLED		BIT(18)</div><div class='ctx'> #define IXGBE_FLAG2_AUTO_DISABLE_VF		BIT(19)</div><div class='add'>+#define IXGBE_FLAG2_PHY_FW_LOAD_FAILED		BIT(20)</div><div class='add'>+#define IXGBE_FLAG2_NO_MEDIA			BIT(21)</div><div class='add'>+#define IXGBE_FLAG2_MOD_POWER_UNSUPPORTED	BIT(22)</div><div class='add'>+#define IXGBE_FLAG2_API_MISMATCH		BIT(23)</div><div class='add'>+#define IXGBE_FLAG2_FW_ROLLBACK			BIT(24)</div><div class='ctx'> </div><div class='ctx'> 	/* Tx fast path data */</div><div class='ctx'> 	int num_tx_queues;</div><div class='hunk'>@@ -737,6 +757,7 @@ struct ixgbe_adapter {</div><div class='ctx'> 	bool link_up;</div><div class='ctx'> 	unsigned long sfp_poll_time;</div><div class='ctx'> 	unsigned long link_check_timeout;</div><div class='add'>+	u32 link_down_events;</div><div class='ctx'> </div><div class='ctx'> 	struct timer_list service_timer;</div><div class='ctx'> 	struct work_struct service_task;</div><div class='hunk'>@@ -749,6 +770,8 @@ struct ixgbe_adapter {</div><div class='ctx'> 	u32 atr_sample_rate;</div><div class='ctx'> 	spinlock_t fdir_perfect_lock;</div><div class='ctx'> </div><div class='add'>+	bool fw_emp_reset_disabled;</div><div class='add'>+</div><div class='ctx'> #ifdef IXGBE_FCOE</div><div class='ctx'> 	struct ixgbe_fcoe fcoe;</div><div class='ctx'> #endif /* IXGBE_FCOE */</div><div class='hunk'>@@ -767,7 +790,7 @@ struct ixgbe_adapter {</div><div class='ctx'> 	struct ptp_clock_info ptp_caps;</div><div class='ctx'> 	struct work_struct ptp_tx_work;</div><div class='ctx'> 	struct sk_buff *ptp_tx_skb;</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> 	unsigned long ptp_tx_start;</div><div class='ctx'> 	unsigned long last_overflow_check;</div><div class='ctx'> 	unsigned long last_rx_ptp_check;</div><div class='hunk'>@@ -792,13 +815,13 @@ struct ixgbe_adapter {</div><div class='ctx'> 	u32 timer_event_accumulator;</div><div class='ctx'> 	u32 vferr_refcount;</div><div class='ctx'> 	struct ixgbe_mac_addr *mac_table;</div><div class='add'>+	u8 tx_hang_count[IXGBE_MAX_TX_QUEUES];</div><div class='ctx'> 	struct kobject *info_kobj;</div><div class='add'>+	u16 lse_mask;</div><div class='ctx'> #ifdef CONFIG_IXGBE_HWMON</div><div class='ctx'> 	struct hwmon_buff *ixgbe_hwmon_buff;</div><div class='ctx'> #endif /* CONFIG_IXGBE_HWMON */</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='ctx'> 	struct dentry *ixgbe_dbg_adapter;</div><div class='del'>-#endif /*CONFIG_DEBUG_FS*/</div><div class='ctx'> </div><div class='ctx'> 	u8 default_up;</div><div class='ctx'> 	/* Bitmask indicating in use pools */</div><div class='hunk'>@@ -823,6 +846,17 @@ struct ixgbe_adapter {</div><div class='ctx'> 	spinlock_t vfs_lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ixgbe_netdevice_priv {</div><div class='add'>+	struct ixgbe_adapter *adapter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct ixgbe_adapter *ixgbe_from_netdev(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_netdevice_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return priv-&gt;adapter;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int ixgbe_determine_xdp_q_idx(int cpu)</div><div class='ctx'> {</div><div class='ctx'> 	if (static_key_enabled(&amp;ixgbe_xdp_locking_key))</div><div class='hunk'>@@ -849,6 +883,7 @@ static inline u8 ixgbe_max_rss_indices(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		return IXGBE_MAX_RSS_INDICES_X550;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -874,6 +909,7 @@ enum ixgbe_state_t {</div><div class='ctx'> 	__IXGBE_PTP_RUNNING,</div><div class='ctx'> 	__IXGBE_PTP_TX_IN_PROGRESS,</div><div class='ctx'> 	__IXGBE_RESET_REQUESTED,</div><div class='add'>+	__IXGBE_PHY_INIT_COMPLETE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_cb {</div><div class='hunk'>@@ -896,6 +932,7 @@ enum ixgbe_boards {</div><div class='ctx'> 	board_x550em_x_fw,</div><div class='ctx'> 	board_x550em_a,</div><div class='ctx'> 	board_x550em_a_fw,</div><div class='add'>+	board_e610,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern const struct ixgbe_info ixgbe_82598_info;</div><div class='hunk'>@@ -906,6 +943,7 @@ extern const struct ixgbe_info ixgbe_X550EM_x_info;</div><div class='ctx'> extern const struct ixgbe_info ixgbe_x550em_x_fw_info;</div><div class='ctx'> extern const struct ixgbe_info ixgbe_x550em_a_info;</div><div class='ctx'> extern const struct ixgbe_info ixgbe_x550em_a_fw_info;</div><div class='add'>+extern const struct ixgbe_info ixgbe_e610_info;</div><div class='ctx'> #ifdef CONFIG_IXGBE_DCB</div><div class='ctx'> extern const struct dcbnl_rtnl_ops ixgbe_dcbnl_ops;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -934,6 +972,8 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter);</div><div class='ctx'> int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter);</div><div class='ctx'> bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,</div><div class='ctx'> 			 u16 subdevice_id);</div><div class='add'>+void ixgbe_set_fw_version_e610(struct ixgbe_adapter *adapter);</div><div class='add'>+void ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter);</div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='ctx'> void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1044,8 +1084,11 @@ static inline void ixgbe_ptp_rx_hwtstamp(struct ixgbe_ring *rx_ring,</div><div class='ctx'> 	rx_ring-&gt;last_rx_timestamp = jiffies;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr);</div><div class='del'>-int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr);</div><div class='add'>+int ixgbe_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			   struct kernel_hwtstamp_config *config);</div><div class='add'>+int ixgbe_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			   struct kernel_hwtstamp_config *config,</div><div class='add'>+			   struct netlink_ext_ack *extack);</div><div class='ctx'> void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter);</div><div class='ctx'> void ixgbe_ptp_reset(struct ixgbe_adapter *adapter);</div><div class='ctx'> void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c<br/>index 283a23150a4d..406c15f58034 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ixgbe.h"</div><div class='add'>+#include "ixgbe_mbx.h"</div><div class='ctx'> #include "ixgbe_phy.h"</div><div class='ctx'> </div><div class='ctx'> #define IXGBE_82598_MAX_TX_QUEUES 32</div><div class='hunk'>@@ -44,7 +45,7 @@ static void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * if capababilities version is type 1 we can write the</div><div class='add'>+	 * if capabilities version is type 1 we can write the</div><div class='ctx'> 	 * timeout of 10ms to 250ms through the GCR register</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!(gcr &amp; IXGBE_GCR_CAP_VER2)) {</div><div class='hunk'>@@ -750,7 +751,7 @@ mac_reset_top:</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Store the original AUTOC value if it has not been</div><div class='ctx'> 	 * stored off yet.  Otherwise restore the stored original</div><div class='del'>-	 * AUTOC value since the reset operation sets back to deaults.</div><div class='add'>+	 * AUTOC value since the reset operation sets back to defaults.</div><div class='ctx'> 	 */</div><div class='ctx'> 	autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);</div><div class='ctx'> 	if (hw-&gt;mac.orig_link_settings_stored == false) {</div><div class='hunk'>@@ -1168,6 +1169,7 @@ static const struct ixgbe_eeprom_operations eeprom_ops_82598 = {</div><div class='ctx'> 	.calc_checksum          = &amp;ixgbe_calc_eeprom_checksum_generic,</div><div class='ctx'> 	.validate_checksum	= &amp;ixgbe_validate_eeprom_checksum_generic,</div><div class='ctx'> 	.update_checksum	= &amp;ixgbe_update_eeprom_checksum_generic,</div><div class='add'>+	.read_pba_string        = &amp;ixgbe_read_pba_string_generic,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ixgbe_phy_operations phy_ops_82598 = {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c<br/>index cdaf087b4e85..3069b583fd81 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='hunk'>@@ -198,7 +198,7 @@ static int prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked,</div><div class='ctx'>  * @hw: pointer to hardware structure</div><div class='ctx'>  * @autoc: value to write to AUTOC</div><div class='ctx'>  * @locked: bool to indicate whether the SW/FW lock was already taken by</div><div class='del'>- *	     previous proc_autoc_read_82599.</div><div class='add'>+ *	     previous prot_autoc_read_82599.</div><div class='ctx'>  *</div><div class='ctx'>  * This part (82599) may need to hold a the SW/FW lock around all writes to</div><div class='ctx'>  * AUTOC. Likewise after a write we need to do a pipeline reset.</div><div class='hunk'>@@ -1615,13 +1615,14 @@ int ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		IXGBE_WRITE_REG(hw, IXGBE_FDIRSCTPM, ~fdirtcpm);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* store source and destination IP masks (big-enian) */</div><div class='add'>+	/* store source and destination IP masks (big-endian) */</div><div class='ctx'> 	IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIP4M,</div><div class='ctx'> 			     ~input_mask-&gt;formatted.src_ip[0]);</div><div class='ctx'> 	IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRDIP4M,</div><div class='hunk'>@@ -2229,6 +2230,7 @@ static const struct ixgbe_eeprom_operations eeprom_ops_82599 = {</div><div class='ctx'> 	.calc_checksum		= &amp;ixgbe_calc_eeprom_checksum_generic,</div><div class='ctx'> 	.validate_checksum	= &amp;ixgbe_validate_eeprom_checksum_generic,</div><div class='ctx'> 	.update_checksum	= &amp;ixgbe_update_eeprom_checksum_generic,</div><div class='add'>+	.read_pba_string        = &amp;ixgbe_read_pba_string_generic,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ixgbe_phy_operations phy_ops_82599 = {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c<br/>index 3be1bfb16498..3ea6765f9c5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='hunk'>@@ -58,6 +58,7 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)</div><div class='ctx'> 		switch (hw-&gt;device_id) {</div><div class='ctx'> 		case IXGBE_DEV_ID_X550EM_A_SFP:</div><div class='ctx'> 		case IXGBE_DEV_ID_X550EM_A_SFP_N:</div><div class='add'>+		case IXGBE_DEV_ID_E610_SFP:</div><div class='ctx'> 			supported = false;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -88,6 +89,8 @@ bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)</div><div class='ctx'> 		case IXGBE_DEV_ID_X550EM_A_10G_T:</div><div class='ctx'> 		case IXGBE_DEV_ID_X550EM_A_1G_T:</div><div class='ctx'> 		case IXGBE_DEV_ID_X550EM_A_1G_T_L:</div><div class='add'>+		case IXGBE_DEV_ID_E610_10G_T:</div><div class='add'>+		case IXGBE_DEV_ID_E610_2_5G_T:</div><div class='ctx'> 			supported = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -241,7 +244,7 @@ int ixgbe_setup_fc_generic(struct ixgbe_hw *hw)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (hw-&gt;phy.media_type == ixgbe_media_type_backplane) {</div><div class='ctx'> 		/* Need the SW/FW semaphore around AUTOC writes if 82599 and</div><div class='del'>-		 * LESM is on, likewise reset_pipeline requries the lock as</div><div class='add'>+		 * LESM is on, likewise reset_pipeline requires the lock as</div><div class='ctx'> 		 * it also writes AUTOC.</div><div class='ctx'> 		 */</div><div class='ctx'> 		ret_val = hw-&gt;mac.ops.prot_autoc_write(hw, reg_bp, locked);</div><div class='hunk'>@@ -298,7 +301,7 @@ int ixgbe_start_hw_generic(struct ixgbe_hw *hw)</div><div class='ctx'> 			return ret_val;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Cashe bit indicating need for crosstalk fix */</div><div class='add'>+	/* Cache bit indicating need for crosstalk fix */</div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='ctx'> 	case ixgbe_mac_82599EB:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='hunk'>@@ -329,6 +332,7 @@ int ixgbe_start_hw_generic(struct ixgbe_hw *hw)</div><div class='ctx'>  * Devices in the second generation:</div><div class='ctx'>  *     82599</div><div class='ctx'>  *     X540</div><div class='add'>+ *     E610</div><div class='ctx'>  **/</div><div class='ctx'> int ixgbe_start_hw_gen2(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='hunk'>@@ -469,9 +473,14 @@ int ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;mac.type == ixgbe_mac_X550 || hw-&gt;mac.type == ixgbe_mac_X540) {</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_X550 ||</div><div class='add'>+	    hw-&gt;mac.type == ixgbe_mac_X540 ||</div><div class='add'>+	    hw-&gt;mac.type == ixgbe_mac_e610) {</div><div class='ctx'> 		if (hw-&gt;phy.id == 0)</div><div class='ctx'> 			hw-&gt;phy.ops.identify(hw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_X550 || hw-&gt;mac.type == ixgbe_mac_X540) {</div><div class='ctx'> 		hw-&gt;phy.ops.read_reg(hw, IXGBE_PCRC8ECL, MDIO_MMD_PCS, &amp;i);</div><div class='ctx'> 		hw-&gt;phy.ops.read_reg(hw, IXGBE_PCRC8ECH, MDIO_MMD_PCS, &amp;i);</div><div class='ctx'> 		hw-&gt;phy.ops.read_reg(hw, IXGBE_LDPCECL, MDIO_MMD_PCS, &amp;i);</div><div class='hunk'>@@ -660,7 +669,11 @@ int ixgbe_get_bus_info_generic(struct ixgbe_hw *hw)</div><div class='ctx'> 	hw-&gt;bus.type = ixgbe_bus_type_pci_express;</div><div class='ctx'> </div><div class='ctx'> 	/* Get the negotiated link width and speed from PCI config space */</div><div class='del'>-	link_status = ixgbe_read_pci_cfg_word(hw, IXGBE_PCI_LINK_STATUS);</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_e610)</div><div class='add'>+		link_status = ixgbe_read_pci_cfg_word(hw, IXGBE_PCI_LINK_STATUS_E610);</div><div class='add'>+	else</div><div class='add'>+		link_status = ixgbe_read_pci_cfg_word(hw,</div><div class='add'>+						      IXGBE_PCI_LINK_STATUS);</div><div class='ctx'> </div><div class='ctx'> 	hw-&gt;bus.width = ixgbe_convert_bus_width(link_status);</div><div class='ctx'> 	hw-&gt;bus.speed = ixgbe_convert_bus_speed(link_status);</div><div class='hunk'>@@ -1726,9 +1739,9 @@ int ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	checksum = (u16)IXGBE_EEPROM_SUM - checksum;</div><div class='add'>+	checksum = IXGBE_EEPROM_SUM - checksum;</div><div class='ctx'> </div><div class='del'>-	return (int)checksum;</div><div class='add'>+	return checksum;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2918,6 +2931,10 @@ u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)</div><div class='ctx'> 		pcie_offset = IXGBE_PCIE_MSIX_82599_CAPS;</div><div class='ctx'> 		max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599;</div><div class='ctx'> 		break;</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='add'>+		pcie_offset = IXGBE_PCIE_MSIX_E610_CAPS;</div><div class='add'>+		max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3366,7 +3383,8 @@ int ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed,</div><div class='ctx'> 		*speed = IXGBE_LINK_SPEED_1GB_FULL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IXGBE_LINKS_SPEED_100_82599:</div><div class='del'>-		if ((hw-&gt;mac.type &gt;= ixgbe_mac_X550) &amp;&amp;</div><div class='add'>+		if ((hw-&gt;mac.type &gt;= ixgbe_mac_X550 ||</div><div class='add'>+		     hw-&gt;mac.type == ixgbe_mac_e610) &amp;&amp;</div><div class='ctx'> 		    (links_reg &amp; IXGBE_LINKS_SPEED_NON_STD))</div><div class='ctx'> 			*speed = IXGBE_LINK_SPEED_5GB_FULL;</div><div class='ctx'> 		else</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h<br/>index 6493abf189de..6639069ad528 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.h</a></div><div class='hunk'>@@ -194,6 +194,8 @@ u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg);</div><div class='ctx'> 	dev_err(&amp;adapter-&gt;pdev-&gt;dev, format, ## arg)</div><div class='ctx'> #define e_dev_notice(format, arg...) \</div><div class='ctx'> 	dev_notice(&amp;adapter-&gt;pdev-&gt;dev, format, ## arg)</div><div class='add'>+#define e_dbg(msglvl, format, arg...) \</div><div class='add'>+	netif_dbg(adapter, msglvl, adapter-&gt;netdev, format, ## arg)</div><div class='ctx'> #define e_info(msglvl, format, arg...) \</div><div class='ctx'> 	netif_info(adapter, msglvl, adapter-&gt;netdev, format, ## arg)</div><div class='ctx'> #define e_err(msglvl, format, arg...) \</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c<br/>index f2709b10c2e5..3dd5a16a14df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include "ixgbe.h"</div><div class='ctx'> #include &lt;linux/dcbnl.h&gt;</div><div class='hunk'>@@ -118,14 +118,14 @@ static int ixgbe_copy_dcb_cfg(struct ixgbe_adapter *adapter, int tc_max)</div><div class='ctx'> </div><div class='ctx'> static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return !!(adapter-&gt;flags &amp; IXGBE_FLAG_DCB_ENABLED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Fail command if not in CEE mode */</div><div class='ctx'> 	if (!(adapter-&gt;dcbx_cap &amp; DCB_CAP_DCBX_VER_CEE))</div><div class='hunk'>@@ -142,7 +142,7 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)</div><div class='ctx'> static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,</div><div class='ctx'> 					 u8 *perm_addr)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='ctx'> 	memset(perm_addr, 0xff, MAX_ADDR_LEN);</div><div class='hunk'>@@ -154,6 +154,7 @@ static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,</div><div class='ctx'> 	case ixgbe_mac_82599EB:</div><div class='ctx'> 	case ixgbe_mac_X540:</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		for (j = 0; j &lt; netdev-&gt;addr_len; j++, i++)</div><div class='ctx'> 			perm_addr[i] = adapter-&gt;hw.mac.san_addr[j];</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -166,7 +167,7 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,</div><div class='ctx'> 					 u8 prio, u8 bwg_id, u8 bw_pct,</div><div class='ctx'> 					 u8 up_map)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (prio != DCB_ATTR_VALUE_UNDEFINED)</div><div class='ctx'> 		adapter-&gt;temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;</div><div class='hunk'>@@ -183,7 +184,7 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,</div><div class='ctx'> static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,</div><div class='ctx'> 					  u8 bw_pct)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;</div><div class='ctx'> }</div><div class='hunk'>@@ -192,7 +193,7 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,</div><div class='ctx'> 					 u8 prio, u8 bwg_id, u8 bw_pct,</div><div class='ctx'> 					 u8 up_map)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (prio != DCB_ATTR_VALUE_UNDEFINED)</div><div class='ctx'> 		adapter-&gt;temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;</div><div class='hunk'>@@ -209,7 +210,7 @@ static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,</div><div class='ctx'> static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,</div><div class='ctx'> 					  u8 bw_pct)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;</div><div class='ctx'> }</div><div class='hunk'>@@ -218,7 +219,7 @@ static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,</div><div class='ctx'> 					 u8 *prio, u8 *bwg_id, u8 *bw_pct,</div><div class='ctx'> 					 u8 *up_map)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	*prio = adapter-&gt;dcb_cfg.tc_config[tc].path[0].prio_type;</div><div class='ctx'> 	*bwg_id = adapter-&gt;dcb_cfg.tc_config[tc].path[0].bwg_id;</div><div class='hunk'>@@ -229,7 +230,7 @@ static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,</div><div class='ctx'> static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,</div><div class='ctx'> 					  u8 *bw_pct)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	*bw_pct = adapter-&gt;dcb_cfg.bw_percentage[0][bwg_id];</div><div class='ctx'> }</div><div class='hunk'>@@ -238,7 +239,7 @@ static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,</div><div class='ctx'> 					 u8 *prio, u8 *bwg_id, u8 *bw_pct,</div><div class='ctx'> 					 u8 *up_map)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	*prio = adapter-&gt;dcb_cfg.tc_config[tc].path[1].prio_type;</div><div class='ctx'> 	*bwg_id = adapter-&gt;dcb_cfg.tc_config[tc].path[1].bwg_id;</div><div class='hunk'>@@ -249,7 +250,7 @@ static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,</div><div class='ctx'> static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,</div><div class='ctx'> 					  u8 *bw_pct)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	*bw_pct = adapter-&gt;dcb_cfg.bw_percentage[1][bwg_id];</div><div class='ctx'> }</div><div class='hunk'>@@ -257,7 +258,7 @@ static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,</div><div class='ctx'> static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,</div><div class='ctx'> 				    u8 setting)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;</div><div class='ctx'> 	if (adapter-&gt;temp_dcb_cfg.tc_config[priority].dcb_pfc !=</div><div class='hunk'>@@ -268,14 +269,14 @@ static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,</div><div class='ctx'> static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,</div><div class='ctx'> 				    u8 *setting)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	*setting = adapter-&gt;dcb_cfg.tc_config[priority].dcb_pfc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ixgbe_dcbnl_devreset(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 	while (test_and_set_bit(__IXGBE_RESETTING, &amp;adapter-&gt;state))</div><div class='ctx'> 		usleep_range(1000, 2000);</div><div class='hunk'>@@ -294,7 +295,7 @@ static void ixgbe_dcbnl_devreset(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_dcb_config *dcb_cfg = &amp;adapter-&gt;dcb_cfg;</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	int ret = DCB_NO_HW_CHG;</div><div class='hunk'>@@ -382,7 +383,7 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	switch (capid) {</div><div class='ctx'> 	case DCB_CAP_ATTR_PG:</div><div class='hunk'>@@ -419,7 +420,7 @@ static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;flags &amp; IXGBE_FLAG_DCB_ENABLED) {</div><div class='ctx'> 		switch (tcid) {</div><div class='hunk'>@@ -446,14 +447,14 @@ static int ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)</div><div class='ctx'> </div><div class='ctx'> static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return adapter-&gt;dcb_cfg.pfc_mode_enable;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;temp_dcb_cfg.pfc_mode_enable = state;</div><div class='ctx'> }</div><div class='hunk'>@@ -470,7 +471,7 @@ static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)</div><div class='ctx'>  */</div><div class='ctx'> static int ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct dcb_app app = {</div><div class='ctx'> 				.selector = idtype,</div><div class='ctx'> 				.protocol = id,</div><div class='hunk'>@@ -485,7 +486,7 @@ static int ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)</div><div class='ctx'> static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,</div><div class='ctx'> 				   struct ieee_ets *ets)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ieee_ets *my_ets = adapter-&gt;ixgbe_ieee_ets;</div><div class='ctx'> </div><div class='ctx'> 	ets-&gt;ets_cap = adapter-&gt;dcb_cfg.num_tcs.pg_tcs;</div><div class='hunk'>@@ -505,7 +506,7 @@ static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,</div><div class='ctx'> static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,</div><div class='ctx'> 				   struct ieee_ets *ets)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	int max_frame = dev-&gt;mtu + ETH_HLEN + ETH_FCS_LEN;</div><div class='ctx'> 	int i, err;</div><div class='ctx'> 	__u8 max_tc = 0;</div><div class='hunk'>@@ -558,7 +559,7 @@ static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,</div><div class='ctx'> static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,</div><div class='ctx'> 				   struct ieee_pfc *pfc)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ieee_pfc *my_pfc = adapter-&gt;ixgbe_ieee_pfc;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -583,7 +584,7 @@ static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,</div><div class='ctx'> static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,</div><div class='ctx'> 				   struct ieee_pfc *pfc)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u8 *prio_tc;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -615,7 +616,7 @@ static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,</div><div class='ctx'> static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev,</div><div class='ctx'> 				   struct dcb_app *app)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!(adapter-&gt;dcbx_cap &amp; DCB_CAP_DCBX_VER_IEEE))</div><div class='hunk'>@@ -660,7 +661,7 @@ static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev,</div><div class='ctx'> static int ixgbe_dcbnl_ieee_delapp(struct net_device *dev,</div><div class='ctx'> 				   struct dcb_app *app)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!(adapter-&gt;dcbx_cap &amp; DCB_CAP_DCBX_VER_IEEE))</div><div class='hunk'>@@ -704,13 +705,13 @@ static int ixgbe_dcbnl_ieee_delapp(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> static u8 ixgbe_dcbnl_getdcbx(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	return adapter-&gt;dcbx_cap;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u8 ixgbe_dcbnl_setdcbx(struct net_device *dev, u8 mode)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ieee_ets ets = {0};</div><div class='ctx'> 	struct ieee_pfc pfc = {0};</div><div class='ctx'> 	int err = 0;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c<br/>new file mode 100644<br/>index 000000000000..c2f8189a0738<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c</a></div><div class='hunk'>@@ -0,0 +1,4043 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include "ixgbe_common.h"</div><div class='add'>+#include "ixgbe_e610.h"</div><div class='add'>+#include "ixgbe_x550.h"</div><div class='add'>+#include "ixgbe_type.h"</div><div class='add'>+#include "ixgbe_x540.h"</div><div class='add'>+#include "ixgbe_mbx.h"</div><div class='add'>+#include "ixgbe_phy.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_should_retry_aci_send_cmd_execute - decide if ACI command should</div><div class='add'>+ * be resent</div><div class='add'>+ * @opcode: ACI opcode</div><div class='add'>+ *</div><div class='add'>+ * Check if ACI command should be sent again depending on the provided opcode.</div><div class='add'>+ * It may happen when CSR is busy during link state changes.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the sending command routine should be repeated,</div><div class='add'>+ * otherwise false.</div><div class='add'>+ */</div><div class='add'>+static bool ixgbe_should_retry_aci_send_cmd_execute(u16 opcode)</div><div class='add'>+{</div><div class='add'>+	switch (opcode) {</div><div class='add'>+	case ixgbe_aci_opc_disable_rxen:</div><div class='add'>+	case ixgbe_aci_opc_get_phy_caps:</div><div class='add'>+	case ixgbe_aci_opc_get_link_status:</div><div class='add'>+	case ixgbe_aci_opc_get_link_topo:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_send_cmd_execute - execute sending FW Admin Command to FW Admin</div><div class='add'>+ * Command Interface</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @desc: descriptor describing the command</div><div class='add'>+ * @buf: buffer to use for indirect commands (NULL for direct commands)</div><div class='add'>+ * @buf_size: size of buffer for indirect commands (0 for direct commands)</div><div class='add'>+ *</div><div class='add'>+ * Admin Command is sent using CSR by setting descriptor and buffer in specific</div><div class='add'>+ * registers.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ * * - 0 - success.</div><div class='add'>+ * * - -EIO - CSR mechanism is not enabled.</div><div class='add'>+ * * - -EBUSY - CSR mechanism is busy.</div><div class='add'>+ * * - -EINVAL - buf_size is too big or</div><div class='add'>+ * invalid argument buf or buf_size.</div><div class='add'>+ * * - -ETIME - Admin Command X command timeout.</div><div class='add'>+ * * - -EIO - Admin Command X invalid state of HICR register or</div><div class='add'>+ * Admin Command failed because of bad opcode was returned or</div><div class='add'>+ * Admin Command failed with error Y.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_aci_send_cmd_execute(struct ixgbe_hw *hw,</div><div class='add'>+				      struct libie_aq_desc *desc,</div><div class='add'>+				      void *buf, u16 buf_size)</div><div class='add'>+{</div><div class='add'>+	u16 opcode, buf_tail_size = buf_size % 4;</div><div class='add'>+	u32 *raw_desc = (u32 *)desc;</div><div class='add'>+	u32 hicr, i, buf_tail = 0;</div><div class='add'>+	bool valid_buf = false;</div><div class='add'>+</div><div class='add'>+	hw-&gt;aci.last_status = LIBIE_AQ_RC_OK;</div><div class='add'>+</div><div class='add'>+	/* It's necessary to check if mechanism is enabled */</div><div class='add'>+	hicr = IXGBE_READ_REG(hw, IXGBE_PF_HICR);</div><div class='add'>+</div><div class='add'>+	if (!(hicr &amp; IXGBE_PF_HICR_EN))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if (hicr &amp; IXGBE_PF_HICR_C) {</div><div class='add'>+		hw-&gt;aci.last_status = LIBIE_AQ_RC_EBUSY;</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	opcode = le16_to_cpu(desc-&gt;opcode);</div><div class='add'>+</div><div class='add'>+	if (buf_size &gt; IXGBE_ACI_MAX_BUFFER_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (buf)</div><div class='add'>+		desc-&gt;flags |= cpu_to_le16(LIBIE_AQ_FLAG_BUF);</div><div class='add'>+</div><div class='add'>+	if (desc-&gt;flags &amp; cpu_to_le16(LIBIE_AQ_FLAG_BUF)) {</div><div class='add'>+		if ((buf &amp;&amp; !buf_size) ||</div><div class='add'>+		    (!buf &amp;&amp; buf_size))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		if (buf &amp;&amp; buf_size)</div><div class='add'>+			valid_buf = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (valid_buf) {</div><div class='add'>+		if (buf_tail_size)</div><div class='add'>+			memcpy(&amp;buf_tail, buf + buf_size - buf_tail_size,</div><div class='add'>+			       buf_tail_size);</div><div class='add'>+</div><div class='add'>+		if (((buf_size + 3) &amp; ~0x3) &gt; LIBIE_AQ_LG_BUF)</div><div class='add'>+			desc-&gt;flags |= cpu_to_le16(LIBIE_AQ_FLAG_LB);</div><div class='add'>+</div><div class='add'>+		desc-&gt;datalen = cpu_to_le16(buf_size);</div><div class='add'>+</div><div class='add'>+		if (desc-&gt;flags &amp; cpu_to_le16(LIBIE_AQ_FLAG_RD)) {</div><div class='add'>+			for (i = 0; i &lt; buf_size / 4; i++)</div><div class='add'>+				IXGBE_WRITE_REG(hw, IXGBE_PF_HIBA(i), ((u32 *)buf)[i]);</div><div class='add'>+			if (buf_tail_size)</div><div class='add'>+				IXGBE_WRITE_REG(hw, IXGBE_PF_HIBA(i), buf_tail);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Descriptor is written to specific registers */</div><div class='add'>+	for (i = 0; i &lt; IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++)</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_PF_HIDA(i), raw_desc[i]);</div><div class='add'>+</div><div class='add'>+	/* SW has to set PF_HICR.C bit and clear PF_HICR.SV and</div><div class='add'>+	 * PF_HICR_EV</div><div class='add'>+	 */</div><div class='add'>+	hicr = (IXGBE_READ_REG(hw, IXGBE_PF_HICR) | IXGBE_PF_HICR_C) &amp;</div><div class='add'>+	       ~(IXGBE_PF_HICR_SV | IXGBE_PF_HICR_EV);</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_PF_HICR, hicr);</div><div class='add'>+</div><div class='add'>+#define MAX_SLEEP_RESP_US 1000</div><div class='add'>+#define MAX_TMOUT_RESP_SYNC_US 100000000</div><div class='add'>+</div><div class='add'>+	/* Wait for sync Admin Command response */</div><div class='add'>+	read_poll_timeout(IXGBE_READ_REG, hicr,</div><div class='add'>+			  (hicr &amp; IXGBE_PF_HICR_SV) ||</div><div class='add'>+			  !(hicr &amp; IXGBE_PF_HICR_C),</div><div class='add'>+			  MAX_SLEEP_RESP_US, MAX_TMOUT_RESP_SYNC_US, true, hw,</div><div class='add'>+			  IXGBE_PF_HICR);</div><div class='add'>+</div><div class='add'>+#define MAX_TMOUT_RESP_ASYNC_US 150000000</div><div class='add'>+</div><div class='add'>+	/* Wait for async Admin Command response */</div><div class='add'>+	read_poll_timeout(IXGBE_READ_REG, hicr,</div><div class='add'>+			  (hicr &amp; IXGBE_PF_HICR_EV) ||</div><div class='add'>+			  !(hicr &amp; IXGBE_PF_HICR_C),</div><div class='add'>+			  MAX_SLEEP_RESP_US, MAX_TMOUT_RESP_ASYNC_US, true, hw,</div><div class='add'>+			  IXGBE_PF_HICR);</div><div class='add'>+</div><div class='add'>+	/* Read sync Admin Command response */</div><div class='add'>+	if ((hicr &amp; IXGBE_PF_HICR_SV)) {</div><div class='add'>+		for (i = 0; i &lt; IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++) {</div><div class='add'>+			raw_desc[i] = IXGBE_READ_REG(hw, IXGBE_PF_HIDA(i));</div><div class='add'>+			raw_desc[i] = raw_desc[i];</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read async Admin Command response */</div><div class='add'>+	if ((hicr &amp; IXGBE_PF_HICR_EV) &amp;&amp; !(hicr &amp; IXGBE_PF_HICR_C)) {</div><div class='add'>+		for (i = 0; i &lt; IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++) {</div><div class='add'>+			raw_desc[i] = IXGBE_READ_REG(hw, IXGBE_PF_HIDA_2(i));</div><div class='add'>+			raw_desc[i] = raw_desc[i];</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Handle timeout and invalid state of HICR register */</div><div class='add'>+	if (hicr &amp; IXGBE_PF_HICR_C)</div><div class='add'>+		return -ETIME;</div><div class='add'>+</div><div class='add'>+	if (!(hicr &amp; IXGBE_PF_HICR_SV) &amp;&amp; !(hicr &amp; IXGBE_PF_HICR_EV))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/* For every command other than 0x0014 treat opcode mismatch</div><div class='add'>+	 * as an error. Response to 0x0014 command read from HIDA_2</div><div class='add'>+	 * is a descriptor of an event which is expected to contain</div><div class='add'>+	 * different opcode than the command.</div><div class='add'>+	 */</div><div class='add'>+	if (desc-&gt;opcode != cpu_to_le16(opcode) &amp;&amp;</div><div class='add'>+	    opcode != ixgbe_aci_opc_get_fw_event)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if (desc-&gt;retval) {</div><div class='add'>+		hw-&gt;aci.last_status = (enum libie_aq_err)</div><div class='add'>+			le16_to_cpu(desc-&gt;retval);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write a response values to a buf */</div><div class='add'>+	if (valid_buf) {</div><div class='add'>+		for (i = 0; i &lt; buf_size / 4; i++)</div><div class='add'>+			((u32 *)buf)[i] = IXGBE_READ_REG(hw, IXGBE_PF_HIBA(i));</div><div class='add'>+		if (buf_tail_size) {</div><div class='add'>+			buf_tail = IXGBE_READ_REG(hw, IXGBE_PF_HIBA(i));</div><div class='add'>+			memcpy(buf + buf_size - buf_tail_size, &amp;buf_tail,</div><div class='add'>+			       buf_tail_size);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_send_cmd - send FW Admin Command to FW Admin Command Interface</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @desc: descriptor describing the command</div><div class='add'>+ * @buf: buffer to use for indirect commands (NULL for direct commands)</div><div class='add'>+ * @buf_size: size of buffer for indirect commands (0 for direct commands)</div><div class='add'>+ *</div><div class='add'>+ * Helper function to send FW Admin Commands to the FW Admin Command Interface.</div><div class='add'>+ *</div><div class='add'>+ * Retry sending the FW Admin Command multiple times to the FW ACI</div><div class='add'>+ * if the EBUSY Admin Command error is returned.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_send_cmd(struct ixgbe_hw *hw, struct libie_aq_desc *desc,</div><div class='add'>+		       void *buf, u16 buf_size)</div><div class='add'>+{</div><div class='add'>+	u16 opcode = le16_to_cpu(desc-&gt;opcode);</div><div class='add'>+	struct libie_aq_desc desc_cpy;</div><div class='add'>+	enum libie_aq_err last_status;</div><div class='add'>+	u8 idx = 0, *buf_cpy = NULL;</div><div class='add'>+	bool is_cmd_for_retry;</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	is_cmd_for_retry = ixgbe_should_retry_aci_send_cmd_execute(opcode);</div><div class='add'>+	if (is_cmd_for_retry) {</div><div class='add'>+		if (buf) {</div><div class='add'>+			buf_cpy = kmalloc(buf_size, GFP_KERNEL);</div><div class='add'>+			if (!buf_cpy)</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+			*buf_cpy = *(u8 *)buf;</div><div class='add'>+		}</div><div class='add'>+		desc_cpy = *desc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	timeout = jiffies + msecs_to_jiffies(IXGBE_ACI_SEND_TIMEOUT_MS);</div><div class='add'>+	do {</div><div class='add'>+		mutex_lock(&amp;hw-&gt;aci.lock);</div><div class='add'>+		err = ixgbe_aci_send_cmd_execute(hw, desc, buf, buf_size);</div><div class='add'>+		last_status = hw-&gt;aci.last_status;</div><div class='add'>+		mutex_unlock(&amp;hw-&gt;aci.lock);</div><div class='add'>+</div><div class='add'>+		if (!is_cmd_for_retry || !err ||</div><div class='add'>+		    last_status != LIBIE_AQ_RC_EBUSY)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (buf)</div><div class='add'>+			memcpy(buf, buf_cpy, buf_size);</div><div class='add'>+		*desc = desc_cpy;</div><div class='add'>+</div><div class='add'>+		msleep(IXGBE_ACI_SEND_DELAY_TIME_MS);</div><div class='add'>+	} while (++idx &lt; IXGBE_ACI_SEND_MAX_EXECUTE &amp;&amp;</div><div class='add'>+		 time_before(jiffies, timeout));</div><div class='add'>+</div><div class='add'>+	kfree(buf_cpy);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_check_event_pending - check if there are any pending events</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Determine if there are any pending events.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if there are any currently pending events</div><div class='add'>+ * otherwise false.</div><div class='add'>+ */</div><div class='add'>+bool ixgbe_aci_check_event_pending(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 ep_bit_mask = hw-&gt;bus.func ? GL_FWSTS_EP_PF1 : GL_FWSTS_EP_PF0;</div><div class='add'>+	u32 fwsts = IXGBE_READ_REG(hw, GL_FWSTS);</div><div class='add'>+</div><div class='add'>+	return (fwsts &amp; ep_bit_mask) ? true : false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_get_event - get an event from ACI</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @e: event information structure</div><div class='add'>+ * @pending: optional flag signaling that there are more pending events</div><div class='add'>+ *</div><div class='add'>+ * Obtain an event from ACI and return its content</div><div class='add'>+ * through 'e' using ACI command (0x0014).</div><div class='add'>+ * Provide information if there are more events</div><div class='add'>+ * to retrieve through 'pending'.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_get_event(struct ixgbe_hw *hw, struct ixgbe_aci_event *e,</div><div class='add'>+			bool *pending)</div><div class='add'>+{</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!e || (!e-&gt;msg_buf &amp;&amp; e-&gt;buf_len))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hw-&gt;aci.lock);</div><div class='add'>+</div><div class='add'>+	/* Check if there are any events pending */</div><div class='add'>+	if (!ixgbe_aci_check_event_pending(hw)) {</div><div class='add'>+		err = -ENOENT;</div><div class='add'>+		goto aci_get_event_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Obtain pending event */</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_get_fw_event);</div><div class='add'>+	err = ixgbe_aci_send_cmd_execute(hw, &amp;desc, e-&gt;msg_buf, e-&gt;buf_len);</div><div class='add'>+	if (err)</div><div class='add'>+		goto aci_get_event_exit;</div><div class='add'>+</div><div class='add'>+	/* Returned 0x0014 opcode indicates that no event was obtained */</div><div class='add'>+	if (desc.opcode == cpu_to_le16(ixgbe_aci_opc_get_fw_event)) {</div><div class='add'>+		err = -ENOENT;</div><div class='add'>+		goto aci_get_event_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Determine size of event data */</div><div class='add'>+	e-&gt;msg_len = min_t(u16, le16_to_cpu(desc.datalen), e-&gt;buf_len);</div><div class='add'>+	/* Write event descriptor to event info structure */</div><div class='add'>+	memcpy(&amp;e-&gt;desc, &amp;desc, sizeof(e-&gt;desc));</div><div class='add'>+</div><div class='add'>+	/* Check if there are any further events pending */</div><div class='add'>+	if (pending)</div><div class='add'>+		*pending = ixgbe_aci_check_event_pending(hw);</div><div class='add'>+</div><div class='add'>+aci_get_event_exit:</div><div class='add'>+	mutex_unlock(&amp;hw-&gt;aci.lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_fill_dflt_direct_cmd_desc - fill ACI descriptor with default values.</div><div class='add'>+ * @desc: pointer to the temp descriptor (non DMA mem)</div><div class='add'>+ * @opcode: the opcode can be used to decide which flags to turn off or on</div><div class='add'>+ *</div><div class='add'>+ * Helper function to fill the descriptor desc with default values</div><div class='add'>+ * and the provided opcode.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_fill_dflt_direct_cmd_desc(struct libie_aq_desc *desc, u16 opcode)</div><div class='add'>+{</div><div class='add'>+	/* Zero out the desc. */</div><div class='add'>+	memset(desc, 0, sizeof(*desc));</div><div class='add'>+	desc-&gt;opcode = cpu_to_le16(opcode);</div><div class='add'>+	desc-&gt;flags = cpu_to_le16(LIBIE_AQ_FLAG_SI);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_get_fw_ver - Get the firmware version</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Get the firmware version using ACI command (0x0001).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_aci_get_fw_ver(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct libie_aqc_get_ver *resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	resp = &amp;desc.params.get_ver;</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_get_ver);</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+	if (!err) {</div><div class='add'>+		hw-&gt;fw_branch = resp-&gt;fw_branch;</div><div class='add'>+		hw-&gt;fw_maj_ver = resp-&gt;fw_major;</div><div class='add'>+		hw-&gt;fw_min_ver = resp-&gt;fw_minor;</div><div class='add'>+		hw-&gt;fw_patch = resp-&gt;fw_patch;</div><div class='add'>+		hw-&gt;fw_build = le32_to_cpu(resp-&gt;fw_build);</div><div class='add'>+		hw-&gt;api_branch = resp-&gt;api_branch;</div><div class='add'>+		hw-&gt;api_maj_ver = resp-&gt;api_major;</div><div class='add'>+		hw-&gt;api_min_ver = resp-&gt;api_minor;</div><div class='add'>+		hw-&gt;api_patch = resp-&gt;api_patch;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_req_res - request a common resource</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @res: resource ID</div><div class='add'>+ * @access: access type</div><div class='add'>+ * @sdp_number: resource number</div><div class='add'>+ * @timeout: the maximum time in ms that the driver may hold the resource</div><div class='add'>+ *</div><div class='add'>+ * Requests a common resource using the ACI command (0x0008).</div><div class='add'>+ * Specifies the maximum time the driver may hold the resource.</div><div class='add'>+ * If the requested resource is currently occupied by some other driver,</div><div class='add'>+ * a busy return value is returned and the timeout field value indicates the</div><div class='add'>+ * maximum time the current owner has to free it.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_aci_req_res(struct ixgbe_hw *hw, enum libie_aq_res_id res,</div><div class='add'>+			     enum libie_aq_res_access_type access,</div><div class='add'>+			     u8 sdp_number, u32 *timeout)</div><div class='add'>+{</div><div class='add'>+	struct libie_aqc_req_res *cmd_resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd_resp = &amp;desc.params.res_owner;</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_req_res);</div><div class='add'>+</div><div class='add'>+	cmd_resp-&gt;res_id = cpu_to_le16(res);</div><div class='add'>+	cmd_resp-&gt;access_type = cpu_to_le16(access);</div><div class='add'>+	cmd_resp-&gt;res_number = cpu_to_le32(sdp_number);</div><div class='add'>+	cmd_resp-&gt;timeout = cpu_to_le32(*timeout);</div><div class='add'>+	*timeout = 0;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+</div><div class='add'>+	/* If the resource is held by some other driver, the command completes</div><div class='add'>+	 * with a busy return value and the timeout field indicates the maximum</div><div class='add'>+	 * time the current owner of the resource has to free it.</div><div class='add'>+	 */</div><div class='add'>+	if (!err || hw-&gt;aci.last_status == LIBIE_AQ_RC_EBUSY)</div><div class='add'>+		*timeout = le32_to_cpu(cmd_resp-&gt;timeout);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_release_res - release a common resource using ACI</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @res: resource ID</div><div class='add'>+ * @sdp_number: resource number</div><div class='add'>+ *</div><div class='add'>+ * Release a common resource using ACI command (0x0009).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_aci_release_res(struct ixgbe_hw *hw, enum libie_aq_res_id res,</div><div class='add'>+				 u8 sdp_number)</div><div class='add'>+{</div><div class='add'>+	struct libie_aqc_req_res *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	cmd = &amp;desc.params.res_owner;</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_release_res);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;res_id = cpu_to_le16(res);</div><div class='add'>+	cmd-&gt;res_number = cpu_to_le32(sdp_number);</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_acquire_res - acquire the ownership of a resource</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @res: resource ID</div><div class='add'>+ * @access: access type (read or write)</div><div class='add'>+ * @timeout: timeout in milliseconds</div><div class='add'>+ *</div><div class='add'>+ * Make an attempt to acquire the ownership of a resource using</div><div class='add'>+ * the ixgbe_aci_req_res to utilize ACI.</div><div class='add'>+ * In case if some other driver has previously acquired the resource and</div><div class='add'>+ * performed any necessary updates, the -EALREADY is returned,</div><div class='add'>+ * and the caller does not obtain the resource and has no further work to do.</div><div class='add'>+ * If needed, the function will poll until the current lock owner timeouts.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_acquire_res(struct ixgbe_hw *hw, enum libie_aq_res_id res,</div><div class='add'>+		      enum libie_aq_res_access_type access, u32 timeout)</div><div class='add'>+{</div><div class='add'>+#define IXGBE_RES_POLLING_DELAY_MS	10</div><div class='add'>+	u32 delay = IXGBE_RES_POLLING_DELAY_MS;</div><div class='add'>+	u32 res_timeout = timeout;</div><div class='add'>+	u32 retry_timeout;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_req_res(hw, res, access, 0, &amp;res_timeout);</div><div class='add'>+</div><div class='add'>+	/* A return code of -EALREADY means that another driver has</div><div class='add'>+	 * previously acquired the resource and performed any necessary updates;</div><div class='add'>+	 * in this case the caller does not obtain the resource and has no</div><div class='add'>+	 * further work to do.</div><div class='add'>+	 */</div><div class='add'>+	if (err == -EALREADY)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* If necessary, poll until the current lock owner timeouts.</div><div class='add'>+	 * Set retry_timeout to the timeout value reported by the FW in the</div><div class='add'>+	 * response to the "Request Resource Ownership" (0x0008) Admin Command</div><div class='add'>+	 * as it indicates the maximum time the current owner of the resource</div><div class='add'>+	 * is allowed to hold it.</div><div class='add'>+	 */</div><div class='add'>+	retry_timeout = res_timeout;</div><div class='add'>+	while (err &amp;&amp; retry_timeout &amp;&amp; res_timeout) {</div><div class='add'>+		msleep(delay);</div><div class='add'>+		retry_timeout = (retry_timeout &gt; delay) ?</div><div class='add'>+			retry_timeout - delay : 0;</div><div class='add'>+		err = ixgbe_aci_req_res(hw, res, access, 0, &amp;res_timeout);</div><div class='add'>+</div><div class='add'>+		/* Success - lock acquired.</div><div class='add'>+		 * -EALREADY - lock free, no work to do.</div><div class='add'>+		 */</div><div class='add'>+		if (!err || err == -EALREADY)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_release_res - release a common resource</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @res: resource ID</div><div class='add'>+ *</div><div class='add'>+ * Release a common resource using ixgbe_aci_release_res.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_release_res(struct ixgbe_hw *hw, enum libie_aq_res_id res)</div><div class='add'>+{</div><div class='add'>+	u32 total_delay = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_release_res(hw, res, 0);</div><div class='add'>+</div><div class='add'>+	/* There are some rare cases when trying to release the resource</div><div class='add'>+	 * results in an admin command timeout, so handle them correctly.</div><div class='add'>+	 */</div><div class='add'>+	while (err == -ETIME &amp;&amp;</div><div class='add'>+	       total_delay &lt; IXGBE_ACI_RELEASE_RES_TIMEOUT) {</div><div class='add'>+		usleep_range(1000, 1500);</div><div class='add'>+		err = ixgbe_aci_release_res(hw, res, 0);</div><div class='add'>+		total_delay++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_parse_e610_caps - Parse common device/function capabilities</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @caps: pointer to common capabilities structure</div><div class='add'>+ * @elem: the capability element to parse</div><div class='add'>+ * @prefix: message prefix for tracing capabilities</div><div class='add'>+ *</div><div class='add'>+ * Given a capability element, extract relevant details into the common</div><div class='add'>+ * capability structure.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the capability matches one of the common capability ids,</div><div class='add'>+ * false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool ixgbe_parse_e610_caps(struct ixgbe_hw *hw,</div><div class='add'>+				  struct ixgbe_hw_caps *caps,</div><div class='add'>+				  struct libie_aqc_list_caps_elem *elem,</div><div class='add'>+				  const char *prefix)</div><div class='add'>+{</div><div class='add'>+	u32 logical_id = le32_to_cpu(elem-&gt;logical_id);</div><div class='add'>+	u32 phys_id = le32_to_cpu(elem-&gt;phys_id);</div><div class='add'>+	u32 number = le32_to_cpu(elem-&gt;number);</div><div class='add'>+	u16 cap = le16_to_cpu(elem-&gt;cap);</div><div class='add'>+</div><div class='add'>+	switch (cap) {</div><div class='add'>+	case LIBIE_AQC_CAPS_VALID_FUNCTIONS:</div><div class='add'>+		caps-&gt;valid_functions = number;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_SRIOV:</div><div class='add'>+		caps-&gt;sr_iov_1_1 = (number == 1);</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_VMDQ:</div><div class='add'>+		caps-&gt;vmdq = (number == 1);</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_DCB:</div><div class='add'>+		caps-&gt;dcb = (number == 1);</div><div class='add'>+		caps-&gt;active_tc_bitmap = logical_id;</div><div class='add'>+		caps-&gt;maxtc = phys_id;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_RSS:</div><div class='add'>+		caps-&gt;rss_table_size = number;</div><div class='add'>+		caps-&gt;rss_table_entry_width = logical_id;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_RXQS:</div><div class='add'>+		caps-&gt;num_rxq = number;</div><div class='add'>+		caps-&gt;rxq_first_id = phys_id;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_TXQS:</div><div class='add'>+		caps-&gt;num_txq = number;</div><div class='add'>+		caps-&gt;txq_first_id = phys_id;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_MSIX:</div><div class='add'>+		caps-&gt;num_msix_vectors = number;</div><div class='add'>+		caps-&gt;msix_vector_first_id = phys_id;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_NVM_VER:</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_PENDING_NVM_VER:</div><div class='add'>+		caps-&gt;nvm_update_pending_nvm = true;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_PENDING_OROM_VER:</div><div class='add'>+		caps-&gt;nvm_update_pending_orom = true;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_PENDING_NET_VER:</div><div class='add'>+		caps-&gt;nvm_update_pending_netlist = true;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_NVM_MGMT:</div><div class='add'>+		caps-&gt;nvm_unified_update =</div><div class='add'>+			(number &amp; IXGBE_NVM_MGMT_UNIFIED_UPD_SUPPORT) ?</div><div class='add'>+			true : false;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_MAX_MTU:</div><div class='add'>+		caps-&gt;max_mtu = number;</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_PCIE_RESET_AVOIDANCE:</div><div class='add'>+		caps-&gt;pcie_reset_avoidance = (number &gt; 0);</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_POST_UPDATE_RESET_RESTRICT:</div><div class='add'>+		caps-&gt;reset_restrict_support = (number == 1);</div><div class='add'>+		break;</div><div class='add'>+	case LIBIE_AQC_CAPS_EXT_TOPO_DEV_IMG0:</div><div class='add'>+	case LIBIE_AQC_CAPS_EXT_TOPO_DEV_IMG1:</div><div class='add'>+	case LIBIE_AQC_CAPS_EXT_TOPO_DEV_IMG2:</div><div class='add'>+	case LIBIE_AQC_CAPS_EXT_TOPO_DEV_IMG3:</div><div class='add'>+	{</div><div class='add'>+		u8 index = cap - LIBIE_AQC_CAPS_EXT_TOPO_DEV_IMG0;</div><div class='add'>+</div><div class='add'>+		caps-&gt;ext_topo_dev_img_ver_high[index] = number;</div><div class='add'>+		caps-&gt;ext_topo_dev_img_ver_low[index] = logical_id;</div><div class='add'>+		caps-&gt;ext_topo_dev_img_part_num[index] =</div><div class='add'>+			FIELD_GET(IXGBE_EXT_TOPO_DEV_IMG_PART_NUM_M, phys_id);</div><div class='add'>+		caps-&gt;ext_topo_dev_img_load_en[index] =</div><div class='add'>+			(phys_id &amp; IXGBE_EXT_TOPO_DEV_IMG_LOAD_EN) != 0;</div><div class='add'>+		caps-&gt;ext_topo_dev_img_prog_en[index] =</div><div class='add'>+			(phys_id &amp; IXGBE_EXT_TOPO_DEV_IMG_PROG_EN) != 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	default:</div><div class='add'>+		/* Not one of the recognized common capabilities */</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_parse_valid_functions_cap - Parse LIBIE_AQC_CAPS_VALID_FUNCTIONS caps</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @dev_p: pointer to device capabilities structure</div><div class='add'>+ * @cap: capability element to parse</div><div class='add'>+ *</div><div class='add'>+ * Parse LIBIE_AQC_CAPS_VALID_FUNCTIONS for device capabilities.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+ixgbe_parse_valid_functions_cap(struct ixgbe_hw *hw,</div><div class='add'>+				struct ixgbe_hw_dev_caps *dev_p,</div><div class='add'>+				struct libie_aqc_list_caps_elem *cap)</div><div class='add'>+{</div><div class='add'>+	dev_p-&gt;num_funcs = hweight32(le32_to_cpu(cap-&gt;number));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_parse_vf_dev_caps - Parse LIBIE_AQC_CAPS_VF device caps</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @dev_p: pointer to device capabilities structure</div><div class='add'>+ * @cap: capability element to parse</div><div class='add'>+ *</div><div class='add'>+ * Parse LIBIE_AQC_CAPS_VF for device capabilities.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_parse_vf_dev_caps(struct ixgbe_hw *hw,</div><div class='add'>+				    struct ixgbe_hw_dev_caps *dev_p,</div><div class='add'>+				    struct libie_aqc_list_caps_elem *cap)</div><div class='add'>+{</div><div class='add'>+	dev_p-&gt;num_vfs_exposed = le32_to_cpu(cap-&gt;number);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_parse_vsi_dev_caps - Parse LIBIE_AQC_CAPS_VSI device caps</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @dev_p: pointer to device capabilities structure</div><div class='add'>+ * @cap: capability element to parse</div><div class='add'>+ *</div><div class='add'>+ * Parse LIBIE_AQC_CAPS_VSI for device capabilities.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_parse_vsi_dev_caps(struct ixgbe_hw *hw,</div><div class='add'>+				     struct ixgbe_hw_dev_caps *dev_p,</div><div class='add'>+				     struct libie_aqc_list_caps_elem *cap)</div><div class='add'>+{</div><div class='add'>+	dev_p-&gt;num_vsi_allocd_to_host = le32_to_cpu(cap-&gt;number);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_parse_fdir_dev_caps - Parse LIBIE_AQC_CAPS_FD device caps</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @dev_p: pointer to device capabilities structure</div><div class='add'>+ * @cap: capability element to parse</div><div class='add'>+ *</div><div class='add'>+ * Parse LIBIE_AQC_CAPS_FD for device capabilities.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_parse_fdir_dev_caps(struct ixgbe_hw *hw,</div><div class='add'>+				      struct ixgbe_hw_dev_caps *dev_p,</div><div class='add'>+				      struct libie_aqc_list_caps_elem *cap)</div><div class='add'>+{</div><div class='add'>+	dev_p-&gt;num_flow_director_fltr = le32_to_cpu(cap-&gt;number);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_parse_dev_caps - Parse device capabilities</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @dev_p: pointer to device capabilities structure</div><div class='add'>+ * @buf: buffer containing the device capability records</div><div class='add'>+ * @cap_count: the number of capabilities</div><div class='add'>+ *</div><div class='add'>+ * Helper device to parse device (0x000B) capabilities list. For</div><div class='add'>+ * capabilities shared between device and function, this relies on</div><div class='add'>+ * ixgbe_parse_e610_caps.</div><div class='add'>+ *</div><div class='add'>+ * Loop through the list of provided capabilities and extract the relevant</div><div class='add'>+ * data into the device capabilities structured.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_parse_dev_caps(struct ixgbe_hw *hw,</div><div class='add'>+				 struct ixgbe_hw_dev_caps *dev_p,</div><div class='add'>+				 void *buf, u32 cap_count)</div><div class='add'>+{</div><div class='add'>+	struct libie_aqc_list_caps_elem *cap_resp;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	cap_resp = (struct libie_aqc_list_caps_elem *)buf;</div><div class='add'>+</div><div class='add'>+	memset(dev_p, 0, sizeof(*dev_p));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cap_count; i++) {</div><div class='add'>+		u16 cap = le16_to_cpu(cap_resp[i].cap);</div><div class='add'>+</div><div class='add'>+		ixgbe_parse_e610_caps(hw, &amp;dev_p-&gt;common_cap, &amp;cap_resp[i],</div><div class='add'>+				      "dev caps");</div><div class='add'>+</div><div class='add'>+		switch (cap) {</div><div class='add'>+		case LIBIE_AQC_CAPS_VALID_FUNCTIONS:</div><div class='add'>+			ixgbe_parse_valid_functions_cap(hw, dev_p,</div><div class='add'>+							&amp;cap_resp[i]);</div><div class='add'>+			break;</div><div class='add'>+		case LIBIE_AQC_CAPS_VF:</div><div class='add'>+			ixgbe_parse_vf_dev_caps(hw, dev_p, &amp;cap_resp[i]);</div><div class='add'>+			break;</div><div class='add'>+		case LIBIE_AQC_CAPS_VSI:</div><div class='add'>+			ixgbe_parse_vsi_dev_caps(hw, dev_p, &amp;cap_resp[i]);</div><div class='add'>+			break;</div><div class='add'>+		case  LIBIE_AQC_CAPS_FD:</div><div class='add'>+			ixgbe_parse_fdir_dev_caps(hw, dev_p, &amp;cap_resp[i]);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			/* Don't list common capabilities as unknown */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_parse_vf_func_caps - Parse LIBIE_AQC_CAPS_VF function caps</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @func_p: pointer to function capabilities structure</div><div class='add'>+ * @cap: pointer to the capability element to parse</div><div class='add'>+ *</div><div class='add'>+ * Extract function capabilities for LIBIE_AQC_CAPS_VF.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_parse_vf_func_caps(struct ixgbe_hw *hw,</div><div class='add'>+				     struct ixgbe_hw_func_caps *func_p,</div><div class='add'>+				     struct libie_aqc_list_caps_elem *cap)</div><div class='add'>+{</div><div class='add'>+	func_p-&gt;num_allocd_vfs = le32_to_cpu(cap-&gt;number);</div><div class='add'>+	func_p-&gt;vf_base_id = le32_to_cpu(cap-&gt;logical_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_num_per_func - determine number of resources per PF</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @max: value to be evenly split between each PF</div><div class='add'>+ *</div><div class='add'>+ * Determine the number of valid functions by going through the bitmap returned</div><div class='add'>+ * from parsing capabilities and use this to calculate the number of resources</div><div class='add'>+ * per PF based on the max value passed in.</div><div class='add'>+ *</div><div class='add'>+ * Return: the number of resources per PF or 0, if no PFs are available.</div><div class='add'>+ */</div><div class='add'>+static u32 ixgbe_get_num_per_func(struct ixgbe_hw *hw, u32 max)</div><div class='add'>+{</div><div class='add'>+#define IXGBE_CAPS_VALID_FUNCS_M	GENMASK(7, 0)</div><div class='add'>+	u8 funcs = hweight8(hw-&gt;dev_caps.common_cap.valid_functions &amp;</div><div class='add'>+			    IXGBE_CAPS_VALID_FUNCS_M);</div><div class='add'>+</div><div class='add'>+	return funcs ? (max / funcs) : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_parse_vsi_func_caps - Parse LIBIE_AQC_CAPS_VSI function caps</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @func_p: pointer to function capabilities structure</div><div class='add'>+ * @cap: pointer to the capability element to parse</div><div class='add'>+ *</div><div class='add'>+ * Extract function capabilities for LIBIE_AQC_CAPS_VSI.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_parse_vsi_func_caps(struct ixgbe_hw *hw,</div><div class='add'>+				      struct ixgbe_hw_func_caps *func_p,</div><div class='add'>+				      struct libie_aqc_list_caps_elem *cap)</div><div class='add'>+{</div><div class='add'>+	func_p-&gt;guar_num_vsi = ixgbe_get_num_per_func(hw, IXGBE_MAX_VSI);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_parse_func_caps - Parse function capabilities</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @func_p: pointer to function capabilities structure</div><div class='add'>+ * @buf: buffer containing the function capability records</div><div class='add'>+ * @cap_count: the number of capabilities</div><div class='add'>+ *</div><div class='add'>+ * Helper function to parse function (0x000A) capabilities list. For</div><div class='add'>+ * capabilities shared between device and function, this relies on</div><div class='add'>+ * ixgbe_parse_e610_caps.</div><div class='add'>+ *</div><div class='add'>+ * Loop through the list of provided capabilities and extract the relevant</div><div class='add'>+ * data into the function capabilities structured.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_parse_func_caps(struct ixgbe_hw *hw,</div><div class='add'>+				  struct ixgbe_hw_func_caps *func_p,</div><div class='add'>+				  void *buf, u32 cap_count)</div><div class='add'>+{</div><div class='add'>+	struct libie_aqc_list_caps_elem *cap_resp;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	cap_resp = (struct libie_aqc_list_caps_elem *)buf;</div><div class='add'>+</div><div class='add'>+	memset(func_p, 0, sizeof(*func_p));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cap_count; i++) {</div><div class='add'>+		u16 cap = le16_to_cpu(cap_resp[i].cap);</div><div class='add'>+</div><div class='add'>+		ixgbe_parse_e610_caps(hw, &amp;func_p-&gt;common_cap,</div><div class='add'>+				      &amp;cap_resp[i], "func caps");</div><div class='add'>+</div><div class='add'>+		switch (cap) {</div><div class='add'>+		case LIBIE_AQC_CAPS_VF:</div><div class='add'>+			ixgbe_parse_vf_func_caps(hw, func_p, &amp;cap_resp[i]);</div><div class='add'>+			break;</div><div class='add'>+		case LIBIE_AQC_CAPS_VSI:</div><div class='add'>+			ixgbe_parse_vsi_func_caps(hw, func_p, &amp;cap_resp[i]);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			/* Don't list common capabilities as unknown */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_list_caps - query function/device capabilities</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @buf: a buffer to hold the capabilities</div><div class='add'>+ * @buf_size: size of the buffer</div><div class='add'>+ * @cap_count: if not NULL, set to the number of capabilities reported</div><div class='add'>+ * @opc: capabilities type to discover, device or function</div><div class='add'>+ *</div><div class='add'>+ * Get the function (0x000A) or device (0x000B) capabilities description from</div><div class='add'>+ * firmware and store it in the buffer.</div><div class='add'>+ *</div><div class='add'>+ * If the cap_count pointer is not NULL, then it is set to the number of</div><div class='add'>+ * capabilities firmware will report. Note that if the buffer size is too</div><div class='add'>+ * small, it is possible the command will return -ENOMEM. The</div><div class='add'>+ * cap_count will still be updated in this case. It is recommended that the</div><div class='add'>+ * buffer size be set to IXGBE_ACI_MAX_BUFFER_SIZE (the largest possible</div><div class='add'>+ * buffer that firmware could return) to avoid this.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ * Exit code of -ENOMEM means the buffer size is too small.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_list_caps(struct ixgbe_hw *hw, void *buf, u16 buf_size,</div><div class='add'>+			u32 *cap_count, enum ixgbe_aci_opc opc)</div><div class='add'>+{</div><div class='add'>+	struct libie_aqc_list_caps *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = &amp;desc.params.get_cap;</div><div class='add'>+</div><div class='add'>+	if (opc != ixgbe_aci_opc_list_func_caps &amp;&amp;</div><div class='add'>+	    opc != ixgbe_aci_opc_list_dev_caps)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, opc);</div><div class='add'>+	err = ixgbe_aci_send_cmd(hw, &amp;desc, buf, buf_size);</div><div class='add'>+</div><div class='add'>+	if (cap_count)</div><div class='add'>+		*cap_count = le32_to_cpu(cmd-&gt;count);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_discover_dev_caps - Read and extract device capabilities</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @dev_caps: pointer to device capabilities structure</div><div class='add'>+ *</div><div class='add'>+ * Read the device capabilities and extract them into the dev_caps structure</div><div class='add'>+ * for later use.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_discover_dev_caps(struct ixgbe_hw *hw,</div><div class='add'>+			    struct ixgbe_hw_dev_caps *dev_caps)</div><div class='add'>+{</div><div class='add'>+	u32 cap_count;</div><div class='add'>+	u8 *cbuf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cbuf = kzalloc(IXGBE_ACI_MAX_BUFFER_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!cbuf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Although the driver doesn't know the number of capabilities the</div><div class='add'>+	 * device will return, we can simply send a 4KB buffer, the maximum</div><div class='add'>+	 * possible size that firmware can return.</div><div class='add'>+	 */</div><div class='add'>+	cap_count = IXGBE_ACI_MAX_BUFFER_SIZE /</div><div class='add'>+		    sizeof(struct libie_aqc_list_caps_elem);</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_list_caps(hw, cbuf, IXGBE_ACI_MAX_BUFFER_SIZE,</div><div class='add'>+				  &amp;cap_count,</div><div class='add'>+				  ixgbe_aci_opc_list_dev_caps);</div><div class='add'>+	if (!err)</div><div class='add'>+		ixgbe_parse_dev_caps(hw, dev_caps, cbuf, cap_count);</div><div class='add'>+</div><div class='add'>+	kfree(cbuf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_discover_func_caps - Read and extract function capabilities</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ * @func_caps: pointer to function capabilities structure</div><div class='add'>+ *</div><div class='add'>+ * Read the function capabilities and extract them into the func_caps structure</div><div class='add'>+ * for later use.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_discover_func_caps(struct ixgbe_hw *hw,</div><div class='add'>+			     struct ixgbe_hw_func_caps *func_caps)</div><div class='add'>+{</div><div class='add'>+	u32 cap_count;</div><div class='add'>+	u8 *cbuf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cbuf = kzalloc(IXGBE_ACI_MAX_BUFFER_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!cbuf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Although the driver doesn't know the number of capabilities the</div><div class='add'>+	 * device will return, we can simply send a 4KB buffer, the maximum</div><div class='add'>+	 * possible size that firmware can return.</div><div class='add'>+	 */</div><div class='add'>+	cap_count = IXGBE_ACI_MAX_BUFFER_SIZE /</div><div class='add'>+		    sizeof(struct libie_aqc_list_caps_elem);</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_list_caps(hw, cbuf, IXGBE_ACI_MAX_BUFFER_SIZE,</div><div class='add'>+				  &amp;cap_count,</div><div class='add'>+				  ixgbe_aci_opc_list_func_caps);</div><div class='add'>+	if (!err)</div><div class='add'>+		ixgbe_parse_func_caps(hw, func_caps, cbuf, cap_count);</div><div class='add'>+</div><div class='add'>+	kfree(cbuf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_caps - get info about the HW</div><div class='add'>+ * @hw: pointer to the hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Retrieve both device and function capabilities.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_get_caps(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_discover_dev_caps(hw, &amp;hw-&gt;dev_caps);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return ixgbe_discover_func_caps(hw, &amp;hw-&gt;func_caps);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_disable_rxen - disable RX</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Request a safe disable of Receive Enable using ACI command (0x000C).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_disable_rxen(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_disable_rxen *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_disable_rxen);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;lport_num = hw-&gt;bus.func;</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_get_phy_caps - returns PHY capabilities</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @qual_mods: report qualified modules</div><div class='add'>+ * @report_mode: report mode capabilities</div><div class='add'>+ * @pcaps: structure for PHY capabilities to be filled</div><div class='add'>+ *</div><div class='add'>+ * Returns the various PHY capabilities supported on the Port</div><div class='add'>+ * using ACI command (0x0600).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_get_phy_caps(struct ixgbe_hw *hw, bool qual_mods, u8 report_mode,</div><div class='add'>+			   struct ixgbe_aci_cmd_get_phy_caps_data *pcaps)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_phy_caps *cmd;</div><div class='add'>+	u16 pcaps_size = sizeof(*pcaps);</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	if (!pcaps || (report_mode &amp; ~IXGBE_ACI_REPORT_MODE_M))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_get_phy_caps);</div><div class='add'>+</div><div class='add'>+	if (qual_mods)</div><div class='add'>+		cmd-&gt;param0 |= cpu_to_le16(IXGBE_ACI_GET_PHY_RQM);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;param0 |= cpu_to_le16(report_mode);</div><div class='add'>+	err = ixgbe_aci_send_cmd(hw, &amp;desc, pcaps, pcaps_size);</div><div class='add'>+	if (!err &amp;&amp; report_mode == IXGBE_ACI_REPORT_TOPO_CAP_MEDIA) {</div><div class='add'>+		hw-&gt;phy.phy_type_low = le64_to_cpu(pcaps-&gt;phy_type_low);</div><div class='add'>+		hw-&gt;phy.phy_type_high = le64_to_cpu(pcaps-&gt;phy_type_high);</div><div class='add'>+		memcpy(hw-&gt;link.link_info.module_type, &amp;pcaps-&gt;module_type,</div><div class='add'>+		       sizeof(hw-&gt;link.link_info.module_type));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_copy_phy_caps_to_cfg - Copy PHY ability data to configuration data</div><div class='add'>+ * @caps: PHY ability structure to copy data from</div><div class='add'>+ * @cfg: PHY configuration structure to copy data to</div><div class='add'>+ *</div><div class='add'>+ * Helper function to copy data from PHY capabilities data structure</div><div class='add'>+ * to PHY configuration data structure</div><div class='add'>+ */</div><div class='add'>+void ixgbe_copy_phy_caps_to_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps,</div><div class='add'>+				struct ixgbe_aci_cmd_set_phy_cfg_data *cfg)</div><div class='add'>+{</div><div class='add'>+	if (!caps || !cfg)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	memset(cfg, 0, sizeof(*cfg));</div><div class='add'>+	cfg-&gt;phy_type_low = caps-&gt;phy_type_low;</div><div class='add'>+	cfg-&gt;phy_type_high = caps-&gt;phy_type_high;</div><div class='add'>+	cfg-&gt;caps = caps-&gt;caps;</div><div class='add'>+	cfg-&gt;low_power_ctrl_an = caps-&gt;low_power_ctrl_an;</div><div class='add'>+	cfg-&gt;eee_cap = caps-&gt;eee_cap;</div><div class='add'>+	cfg-&gt;eeer_value = caps-&gt;eeer_value;</div><div class='add'>+	cfg-&gt;link_fec_opt = caps-&gt;link_fec_options;</div><div class='add'>+	cfg-&gt;module_compliance_enforcement =</div><div class='add'>+		caps-&gt;module_compliance_enforcement;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_set_phy_cfg - set PHY configuration</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @cfg: structure with PHY configuration data to be set</div><div class='add'>+ *</div><div class='add'>+ * Set the various PHY configuration parameters supported on the Port</div><div class='add'>+ * using ACI command (0x0601).</div><div class='add'>+ * One or more of the Set PHY config parameters may be ignored in an MFP</div><div class='add'>+ * mode as the PF may not have the privilege to set some of the PHY Config</div><div class='add'>+ * parameters.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw,</div><div class='add'>+			  struct ixgbe_aci_cmd_set_phy_cfg_data *cfg)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_set_phy_cfg *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!cfg)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	/* Ensure that only valid bits of cfg-&gt;caps can be turned on. */</div><div class='add'>+	cfg-&gt;caps &amp;= IXGBE_ACI_PHY_ENA_VALID_MASK;</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_set_phy_cfg);</div><div class='add'>+	cmd-&gt;lport_num = hw-&gt;bus.func;</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_send_cmd(hw, &amp;desc, cfg, sizeof(*cfg));</div><div class='add'>+	if (!err)</div><div class='add'>+		hw-&gt;phy.curr_user_phy_cfg = *cfg;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_set_link_restart_an - set up link and restart AN</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @ena_link: if true: enable link, if false: disable link</div><div class='add'>+ *</div><div class='add'>+ * Function sets up the link and restarts the Auto-Negotiation over the link.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_set_link_restart_an(struct ixgbe_hw *hw, bool ena_link)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_restart_an *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_restart_an);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;cmd_flags = IXGBE_ACI_RESTART_AN_LINK_RESTART;</div><div class='add'>+	cmd-&gt;lport_num = hw-&gt;bus.func;</div><div class='add'>+	if (ena_link)</div><div class='add'>+		cmd-&gt;cmd_flags |= IXGBE_ACI_RESTART_AN_LINK_ENABLE;</div><div class='add'>+	else</div><div class='add'>+		cmd-&gt;cmd_flags &amp;= ~IXGBE_ACI_RESTART_AN_LINK_ENABLE;</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_is_media_cage_present - check if media cage is present</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Identify presence of media cage using the ACI command (0x06E0).</div><div class='add'>+ *</div><div class='add'>+ * Return: true if media cage is present, else false. If no cage, then</div><div class='add'>+ * media type is backplane or BASE-T.</div><div class='add'>+ */</div><div class='add'>+static bool ixgbe_is_media_cage_present(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_link_topo *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_get_link_topo);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;addr.topo_params.node_type_ctx =</div><div class='add'>+		FIELD_PREP(IXGBE_ACI_LINK_TOPO_NODE_CTX_M,</div><div class='add'>+			   IXGBE_ACI_LINK_TOPO_NODE_CTX_PORT);</div><div class='add'>+</div><div class='add'>+	/* Set node type. */</div><div class='add'>+	cmd-&gt;addr.topo_params.node_type_ctx |=</div><div class='add'>+		FIELD_PREP(IXGBE_ACI_LINK_TOPO_NODE_TYPE_M,</div><div class='add'>+			   IXGBE_ACI_LINK_TOPO_NODE_TYPE_CAGE);</div><div class='add'>+</div><div class='add'>+	/* Node type cage can be used to determine if cage is present. If AQC</div><div class='add'>+	 * returns error (ENOENT), then no cage present. If no cage present then</div><div class='add'>+	 * connection type is backplane or BASE-T.</div><div class='add'>+	 */</div><div class='add'>+	return !ixgbe_aci_get_netlist_node(hw, cmd, NULL, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_media_type_from_phy_type - Gets media type based on phy type</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Try to identify the media type based on the phy type.</div><div class='add'>+ * If more than one media type, the ixgbe_media_type_unknown is returned.</div><div class='add'>+ * First, phy_type_low is checked, then phy_type_high.</div><div class='add'>+ * If none are identified, the ixgbe_media_type_unknown is returned</div><div class='add'>+ *</div><div class='add'>+ * Return: type of a media based on phy type in form of enum.</div><div class='add'>+ */</div><div class='add'>+static enum ixgbe_media_type</div><div class='add'>+ixgbe_get_media_type_from_phy_type(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_link_status *hw_link_info;</div><div class='add'>+</div><div class='add'>+	if (!hw)</div><div class='add'>+		return ixgbe_media_type_unknown;</div><div class='add'>+</div><div class='add'>+	hw_link_info = &amp;hw-&gt;link.link_info;</div><div class='add'>+	if (hw_link_info-&gt;phy_type_low &amp;&amp; hw_link_info-&gt;phy_type_high)</div><div class='add'>+		/* If more than one media type is selected, report unknown */</div><div class='add'>+		return ixgbe_media_type_unknown;</div><div class='add'>+</div><div class='add'>+	if (hw_link_info-&gt;phy_type_low) {</div><div class='add'>+		/* 1G SGMII is a special case where some DA cable PHYs</div><div class='add'>+		 * may show this as an option when it really shouldn't</div><div class='add'>+		 * be since SGMII is meant to be between a MAC and a PHY</div><div class='add'>+		 * in a backplane. Try to detect this case and handle it</div><div class='add'>+		 */</div><div class='add'>+		if (hw_link_info-&gt;phy_type_low == IXGBE_PHY_TYPE_LOW_1G_SGMII &amp;&amp;</div><div class='add'>+		    (hw_link_info-&gt;module_type[IXGBE_ACI_MOD_TYPE_IDENT] ==</div><div class='add'>+		    IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE ||</div><div class='add'>+		    hw_link_info-&gt;module_type[IXGBE_ACI_MOD_TYPE_IDENT] ==</div><div class='add'>+		    IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE))</div><div class='add'>+			return ixgbe_media_type_da;</div><div class='add'>+</div><div class='add'>+		switch (hw_link_info-&gt;phy_type_low) {</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_1000BASE_SX:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_1000BASE_LX:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_10GBASE_SR:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_10GBASE_LR:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25GBASE_SR:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25GBASE_LR:</div><div class='add'>+			return ixgbe_media_type_fiber;</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_10G_SFI_AOC_ACC:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25G_AUI_AOC_ACC:</div><div class='add'>+			return ixgbe_media_type_fiber;</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_100BASE_TX:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_1000BASE_T:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_2500BASE_T:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_5GBASE_T:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_10GBASE_T:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25GBASE_T:</div><div class='add'>+			return ixgbe_media_type_copper;</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_10G_SFI_DA:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25GBASE_CR:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25GBASE_CR_S:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25GBASE_CR1:</div><div class='add'>+			return ixgbe_media_type_da;</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25G_AUI_C2C:</div><div class='add'>+			if (ixgbe_is_media_cage_present(hw))</div><div class='add'>+				return ixgbe_media_type_aui;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_1000BASE_KX:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_2500BASE_KX:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_2500BASE_X:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_5GBASE_KR:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_10GBASE_KR_CR1:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_10G_SFI_C2C:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25GBASE_KR:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25GBASE_KR1:</div><div class='add'>+		case IXGBE_PHY_TYPE_LOW_25GBASE_KR_S:</div><div class='add'>+			return ixgbe_media_type_backplane;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		switch (hw_link_info-&gt;phy_type_high) {</div><div class='add'>+		case IXGBE_PHY_TYPE_HIGH_10BASE_T:</div><div class='add'>+			return ixgbe_media_type_copper;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return ixgbe_media_type_unknown;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_update_link_info - update status of the HW network link</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Update the status of the HW network link.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_update_link_info(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_phy_caps_data *pcaps;</div><div class='add'>+	struct ixgbe_link_status *li;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!hw)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	li = &amp;hw-&gt;link.link_info;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_get_link_info(hw, true, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!(li-&gt;link_info &amp; IXGBE_ACI_MEDIA_AVAILABLE))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	pcaps =	kzalloc(sizeof(*pcaps), GFP_KERNEL);</div><div class='add'>+	if (!pcaps)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_TOPO_CAP_MEDIA,</div><div class='add'>+				     pcaps);</div><div class='add'>+</div><div class='add'>+	if (!err)</div><div class='add'>+		memcpy(li-&gt;module_type, &amp;pcaps-&gt;module_type,</div><div class='add'>+		       sizeof(li-&gt;module_type));</div><div class='add'>+</div><div class='add'>+	kfree(pcaps);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_link_status - get status of the HW network link</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @link_up: pointer to bool (true/false = linkup/linkdown)</div><div class='add'>+ *</div><div class='add'>+ * Variable link_up is true if link is up, false if link is down.</div><div class='add'>+ * The variable link_up is invalid if status is non zero. As a</div><div class='add'>+ * result of this call, link status reporting becomes enabled</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_get_link_status(struct ixgbe_hw *hw, bool *link_up)</div><div class='add'>+{</div><div class='add'>+	if (!hw || !link_up)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;link.get_link_info) {</div><div class='add'>+		int err = ixgbe_update_link_info(hw);</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*link_up = hw-&gt;link.link_info.link_info &amp; IXGBE_ACI_LINK_UP;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_get_link_info - get the link status</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @ena_lse: enable/disable LinkStatusEvent reporting</div><div class='add'>+ * @link: pointer to link status structure - optional</div><div class='add'>+ *</div><div class='add'>+ * Get the current Link Status using ACI command (0x607).</div><div class='add'>+ * The current link can be optionally provided to update</div><div class='add'>+ * the status.</div><div class='add'>+ *</div><div class='add'>+ * Return: the link status of the adapter.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse,</div><div class='add'>+			    struct ixgbe_link_status *link)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_link_status_data link_data = {};</div><div class='add'>+	struct ixgbe_aci_cmd_get_link_status *resp;</div><div class='add'>+	struct ixgbe_link_status *li_old, *li;</div><div class='add'>+	struct ixgbe_fc_info *hw_fc_info;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	bool tx_pause, rx_pause;</div><div class='add'>+	u8 cmd_flags;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!hw)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	li_old = &amp;hw-&gt;link.link_info_old;</div><div class='add'>+	li = &amp;hw-&gt;link.link_info;</div><div class='add'>+	hw_fc_info = &amp;hw-&gt;fc;</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_get_link_status);</div><div class='add'>+	cmd_flags = (ena_lse) ? IXGBE_ACI_LSE_ENA : IXGBE_ACI_LSE_DIS;</div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	resp-&gt;cmd_flags = cpu_to_le16(cmd_flags);</div><div class='add'>+	resp-&gt;lport_num = hw-&gt;bus.func;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_send_cmd(hw, &amp;desc, &amp;link_data, sizeof(link_data));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Save off old link status information. */</div><div class='add'>+	*li_old = *li;</div><div class='add'>+</div><div class='add'>+	/* Update current link status information. */</div><div class='add'>+	li-&gt;link_speed = le16_to_cpu(link_data.link_speed);</div><div class='add'>+	li-&gt;phy_type_low = le64_to_cpu(link_data.phy_type_low);</div><div class='add'>+	li-&gt;phy_type_high = le64_to_cpu(link_data.phy_type_high);</div><div class='add'>+	li-&gt;link_info = link_data.link_info;</div><div class='add'>+	li-&gt;link_cfg_err = link_data.link_cfg_err;</div><div class='add'>+	li-&gt;an_info = link_data.an_info;</div><div class='add'>+	li-&gt;ext_info = link_data.ext_info;</div><div class='add'>+	li-&gt;max_frame_size = le16_to_cpu(link_data.max_frame_size);</div><div class='add'>+	li-&gt;fec_info = link_data.cfg &amp; IXGBE_ACI_FEC_MASK;</div><div class='add'>+	li-&gt;topo_media_conflict = link_data.topo_media_conflict;</div><div class='add'>+	li-&gt;pacing = link_data.cfg &amp; (IXGBE_ACI_CFG_PACING_M |</div><div class='add'>+				      IXGBE_ACI_CFG_PACING_TYPE_M);</div><div class='add'>+</div><div class='add'>+	/* Update fc info. */</div><div class='add'>+	tx_pause = !!(link_data.an_info &amp; IXGBE_ACI_LINK_PAUSE_TX);</div><div class='add'>+	rx_pause = !!(link_data.an_info &amp; IXGBE_ACI_LINK_PAUSE_RX);</div><div class='add'>+	if (tx_pause &amp;&amp; rx_pause)</div><div class='add'>+		hw_fc_info-&gt;current_mode = ixgbe_fc_full;</div><div class='add'>+	else if (tx_pause)</div><div class='add'>+		hw_fc_info-&gt;current_mode = ixgbe_fc_tx_pause;</div><div class='add'>+	else if (rx_pause)</div><div class='add'>+		hw_fc_info-&gt;current_mode = ixgbe_fc_rx_pause;</div><div class='add'>+	else</div><div class='add'>+		hw_fc_info-&gt;current_mode = ixgbe_fc_none;</div><div class='add'>+</div><div class='add'>+	li-&gt;lse_ena = !!(le16_to_cpu(resp-&gt;cmd_flags) &amp;</div><div class='add'>+			 IXGBE_ACI_LSE_IS_ENABLED);</div><div class='add'>+</div><div class='add'>+	/* Save link status information. */</div><div class='add'>+	if (link)</div><div class='add'>+		*link = *li;</div><div class='add'>+</div><div class='add'>+	/* Flag cleared so calling functions don't call AQ again. */</div><div class='add'>+	hw-&gt;link.get_link_info = false;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_set_event_mask - set event mask</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @port_num: port number of the physical function</div><div class='add'>+ * @mask: event mask to be set</div><div class='add'>+ *</div><div class='add'>+ * Set the event mask using ACI command (0x0613).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_set_event_mask *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_set_event_mask);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;lport_num = port_num;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;event_mask = cpu_to_le16(mask);</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_configure_lse - enable/disable link status events</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @activate: true for enable lse, false otherwise</div><div class='add'>+ * @mask: event mask to be set; a set bit means deactivation of the</div><div class='add'>+ * corresponding event</div><div class='add'>+ *</div><div class='add'>+ * Set the event mask and then enable or disable link status events</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_set_event_mask(hw, (u8)hw-&gt;bus.func, mask);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Enabling link status events generation by fw. */</div><div class='add'>+	return ixgbe_aci_get_link_info(hw, activate, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_start_hw_e610 - Prepare hardware for Tx/Rx</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Get firmware version and start the hardware using the generic</div><div class='add'>+ * start_hw() and ixgbe_start_hw_gen2() functions.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_start_hw_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_get_fw_ver(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_start_hw_generic(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_start_hw_gen2(hw);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_set_port_id_led - set LED value for the given port</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @orig_mode: set LED original mode</div><div class='add'>+ *</div><div class='add'>+ * Set LED value for the given port (0x06E9)</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_set_port_id_led(struct ixgbe_hw *hw, bool orig_mode)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_set_port_id_led *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_set_port_id_led);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;lport_num = (u8)hw-&gt;bus.func;</div><div class='add'>+	cmd-&gt;lport_num_valid = IXGBE_ACI_PORT_ID_PORT_NUM_VALID;</div><div class='add'>+</div><div class='add'>+	if (orig_mode)</div><div class='add'>+		cmd-&gt;ident_mode = IXGBE_ACI_PORT_IDENT_LED_ORIG;</div><div class='add'>+	else</div><div class='add'>+		cmd-&gt;ident_mode = IXGBE_ACI_PORT_IDENT_LED_BLINK;</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_media_type_e610 - Gets media type</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * In order to get the media type, the function gets PHY</div><div class='add'>+ * capabilities and later on use them to identify the PHY type</div><div class='add'>+ * checking phy_type_high and phy_type_low.</div><div class='add'>+ *</div><div class='add'>+ * Return: the type of media in form of ixgbe_media_type enum</div><div class='add'>+ * or ixgbe_media_type_unknown in case of an error.</div><div class='add'>+ */</div><div class='add'>+enum ixgbe_media_type ixgbe_get_media_type_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_phy_caps_data pcaps;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ixgbe_update_link_info(hw);</div><div class='add'>+	if (rc)</div><div class='add'>+		return ixgbe_media_type_unknown;</div><div class='add'>+</div><div class='add'>+	/* If there is no link but PHY (dongle) is available SW should use</div><div class='add'>+	 * Get PHY Caps admin command instead of Get Link Status, find most</div><div class='add'>+	 * significant bit that is set in PHY types reported by the command</div><div class='add'>+	 * and use it to discover media type.</div><div class='add'>+	 */</div><div class='add'>+	if (!(hw-&gt;link.link_info.link_info &amp; IXGBE_ACI_LINK_UP) &amp;&amp;</div><div class='add'>+	    (hw-&gt;link.link_info.link_info &amp; IXGBE_ACI_MEDIA_AVAILABLE)) {</div><div class='add'>+		int highest_bit;</div><div class='add'>+</div><div class='add'>+		/* Get PHY Capabilities */</div><div class='add'>+		rc = ixgbe_aci_get_phy_caps(hw, false,</div><div class='add'>+					    IXGBE_ACI_REPORT_TOPO_CAP_MEDIA,</div><div class='add'>+					    &amp;pcaps);</div><div class='add'>+		if (rc)</div><div class='add'>+			return ixgbe_media_type_unknown;</div><div class='add'>+</div><div class='add'>+		highest_bit = fls64(le64_to_cpu(pcaps.phy_type_high));</div><div class='add'>+		if (highest_bit) {</div><div class='add'>+			hw-&gt;link.link_info.phy_type_high =</div><div class='add'>+				BIT_ULL(highest_bit - 1);</div><div class='add'>+			hw-&gt;link.link_info.phy_type_low = 0;</div><div class='add'>+		} else {</div><div class='add'>+			highest_bit = fls64(le64_to_cpu(pcaps.phy_type_low));</div><div class='add'>+			if (highest_bit) {</div><div class='add'>+				hw-&gt;link.link_info.phy_type_low =</div><div class='add'>+					BIT_ULL(highest_bit - 1);</div><div class='add'>+				hw-&gt;link.link_info.phy_type_high = 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Based on link status or search above try to discover media type. */</div><div class='add'>+	hw-&gt;phy.media_type = ixgbe_get_media_type_from_phy_type(hw);</div><div class='add'>+</div><div class='add'>+	return hw-&gt;phy.media_type;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_setup_link_e610 - Set up link</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @speed: new link speed</div><div class='add'>+ * @autoneg_wait: true when waiting for completion is needed</div><div class='add'>+ *</div><div class='add'>+ * Set up the link with the specified speed.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_setup_link_e610(struct ixgbe_hw *hw, ixgbe_link_speed speed,</div><div class='add'>+			  bool autoneg_wait)</div><div class='add'>+{</div><div class='add'>+	/* Simply request FW to perform proper PHY setup */</div><div class='add'>+	return hw-&gt;phy.ops.setup_link_speed(hw, speed, autoneg_wait);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_check_link_e610 - Determine link and speed status</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @speed: pointer to link speed</div><div class='add'>+ * @link_up: true when link is up</div><div class='add'>+ * @link_up_wait_to_complete: bool used to wait for link up or not</div><div class='add'>+ *</div><div class='add'>+ * Determine if the link is up and the current link speed</div><div class='add'>+ * using ACI command (0x0607).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_check_link_e610(struct ixgbe_hw *hw, ixgbe_link_speed *speed,</div><div class='add'>+			  bool *link_up, bool link_up_wait_to_complete)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	if (!speed || !link_up)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Set get_link_info flag to ensure that fresh</div><div class='add'>+	 * link information will be obtained from FW</div><div class='add'>+	 * by sending Get Link Status admin command.</div><div class='add'>+	 */</div><div class='add'>+	hw-&gt;link.get_link_info = true;</div><div class='add'>+</div><div class='add'>+	/* Update link information in adapter context. */</div><div class='add'>+	err = ixgbe_get_link_status(hw, link_up);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Wait for link up if it was requested. */</div><div class='add'>+	if (link_up_wait_to_complete &amp;&amp; !(*link_up)) {</div><div class='add'>+		for (i = 0; i &lt; hw-&gt;mac.max_link_up_time; i++) {</div><div class='add'>+			msleep(100);</div><div class='add'>+			hw-&gt;link.get_link_info = true;</div><div class='add'>+			err = ixgbe_get_link_status(hw, link_up);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+			if (*link_up)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Use link information in adapter context updated by the call</div><div class='add'>+	 * to ixgbe_get_link_status() to determine current link speed.</div><div class='add'>+	 * Link speed information is valid only when link up was</div><div class='add'>+	 * reported by FW.</div><div class='add'>+	 */</div><div class='add'>+	if (*link_up) {</div><div class='add'>+		switch (hw-&gt;link.link_info.link_speed) {</div><div class='add'>+		case IXGBE_ACI_LINK_SPEED_10MB:</div><div class='add'>+			*speed = IXGBE_LINK_SPEED_10_FULL;</div><div class='add'>+			break;</div><div class='add'>+		case IXGBE_ACI_LINK_SPEED_100MB:</div><div class='add'>+			*speed = IXGBE_LINK_SPEED_100_FULL;</div><div class='add'>+			break;</div><div class='add'>+		case IXGBE_ACI_LINK_SPEED_1000MB:</div><div class='add'>+			*speed = IXGBE_LINK_SPEED_1GB_FULL;</div><div class='add'>+			break;</div><div class='add'>+		case IXGBE_ACI_LINK_SPEED_2500MB:</div><div class='add'>+			*speed = IXGBE_LINK_SPEED_2_5GB_FULL;</div><div class='add'>+			break;</div><div class='add'>+		case IXGBE_ACI_LINK_SPEED_5GB:</div><div class='add'>+			*speed = IXGBE_LINK_SPEED_5GB_FULL;</div><div class='add'>+			break;</div><div class='add'>+		case IXGBE_ACI_LINK_SPEED_10GB:</div><div class='add'>+			*speed = IXGBE_LINK_SPEED_10GB_FULL;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			*speed = IXGBE_LINK_SPEED_UNKNOWN;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		*speed = IXGBE_LINK_SPEED_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_link_capabilities_e610 - Determine link capabilities</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @speed: pointer to link speed</div><div class='add'>+ * @autoneg: true when autoneg or autotry is enabled</div><div class='add'>+ *</div><div class='add'>+ * Determine speed and AN parameters of a link.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_get_link_capabilities_e610(struct ixgbe_hw *hw,</div><div class='add'>+				     ixgbe_link_speed *speed,</div><div class='add'>+				     bool *autoneg)</div><div class='add'>+{</div><div class='add'>+	if (!speed || !autoneg)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*autoneg = true;</div><div class='add'>+	*speed = hw-&gt;phy.speeds_supported;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_cfg_phy_fc - Configure PHY Flow Control (FC) data based on FC mode</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @cfg: PHY configuration data to set FC mode</div><div class='add'>+ * @req_mode: FC mode to configure</div><div class='add'>+ *</div><div class='add'>+ * Configures PHY Flow Control according to the provided configuration.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_cfg_phy_fc(struct ixgbe_hw *hw,</div><div class='add'>+		     struct ixgbe_aci_cmd_set_phy_cfg_data *cfg,</div><div class='add'>+		     enum ixgbe_fc_mode req_mode)</div><div class='add'>+{</div><div class='add'>+	u8 pause_mask = 0x0;</div><div class='add'>+</div><div class='add'>+	if (!cfg)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (req_mode) {</div><div class='add'>+	case ixgbe_fc_full:</div><div class='add'>+		pause_mask |= IXGBE_ACI_PHY_EN_TX_LINK_PAUSE;</div><div class='add'>+		pause_mask |= IXGBE_ACI_PHY_EN_RX_LINK_PAUSE;</div><div class='add'>+		break;</div><div class='add'>+	case ixgbe_fc_rx_pause:</div><div class='add'>+		pause_mask |= IXGBE_ACI_PHY_EN_RX_LINK_PAUSE;</div><div class='add'>+		break;</div><div class='add'>+	case ixgbe_fc_tx_pause:</div><div class='add'>+		pause_mask |= IXGBE_ACI_PHY_EN_TX_LINK_PAUSE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clear the old pause settings. */</div><div class='add'>+	cfg-&gt;caps &amp;= ~(IXGBE_ACI_PHY_EN_TX_LINK_PAUSE |</div><div class='add'>+		IXGBE_ACI_PHY_EN_RX_LINK_PAUSE);</div><div class='add'>+</div><div class='add'>+	/* Set the new capabilities. */</div><div class='add'>+	cfg-&gt;caps |= pause_mask;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_setup_fc_e610 - Set up flow control</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Set up flow control. This has to be done during init time.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_setup_fc_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_phy_caps_data pcaps = {};</div><div class='add'>+	struct ixgbe_aci_cmd_set_phy_cfg_data cfg = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Get the current PHY config */</div><div class='add'>+	err = ixgbe_aci_get_phy_caps(hw, false,</div><div class='add'>+				     IXGBE_ACI_REPORT_ACTIVE_CFG, &amp;pcaps);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_copy_phy_caps_to_cfg(&amp;pcaps, &amp;cfg);</div><div class='add'>+</div><div class='add'>+	/* Configure the set PHY data */</div><div class='add'>+	err = ixgbe_cfg_phy_fc(hw, &amp;cfg, hw-&gt;fc.requested_mode);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* If the capabilities have changed, then set the new config */</div><div class='add'>+	if (cfg.caps != pcaps.caps) {</div><div class='add'>+		cfg.caps |= IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT;</div><div class='add'>+</div><div class='add'>+		err = ixgbe_aci_set_phy_cfg(hw, &amp;cfg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_fc_autoneg_e610 - Configure flow control</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Configure Flow Control.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_fc_autoneg_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Get current link err.</div><div class='add'>+	 * Current FC mode will be stored in the hw context.</div><div class='add'>+	 */</div><div class='add'>+	err = ixgbe_aci_get_link_info(hw, false, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		goto no_autoneg;</div><div class='add'>+</div><div class='add'>+	/* Check if the link is up */</div><div class='add'>+	if (!(hw-&gt;link.link_info.link_info &amp; IXGBE_ACI_LINK_UP))</div><div class='add'>+		goto no_autoneg;</div><div class='add'>+</div><div class='add'>+	/* Check if auto-negotiation has completed */</div><div class='add'>+	if (!(hw-&gt;link.link_info.an_info &amp; IXGBE_ACI_AN_COMPLETED))</div><div class='add'>+		goto no_autoneg;</div><div class='add'>+</div><div class='add'>+	hw-&gt;fc.fc_was_autonegged = true;</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+no_autoneg:</div><div class='add'>+	hw-&gt;fc.fc_was_autonegged = false;</div><div class='add'>+	hw-&gt;fc.current_mode = hw-&gt;fc.requested_mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_disable_rx_e610 - Disable RX unit</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Disable RX DMA unit on E610 with use of ACI command (0x000C).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_disable_rx_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);</div><div class='add'>+	u32 pfdtxgswc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!(rxctrl &amp; IXGBE_RXCTRL_RXEN))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC);</div><div class='add'>+	if (pfdtxgswc &amp; IXGBE_PFDTXGSWC_VT_LBEN) {</div><div class='add'>+		pfdtxgswc &amp;= ~IXGBE_PFDTXGSWC_VT_LBEN;</div><div class='add'>+		IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc);</div><div class='add'>+		hw-&gt;mac.set_lben = true;</div><div class='add'>+	} else {</div><div class='add'>+		hw-&gt;mac.set_lben = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_disable_rxen(hw);</div><div class='add'>+</div><div class='add'>+	/* If we fail - disable RX using register write */</div><div class='add'>+	if (err) {</div><div class='add'>+		rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);</div><div class='add'>+		if (rxctrl &amp; IXGBE_RXCTRL_RXEN) {</div><div class='add'>+			rxctrl &amp;= ~IXGBE_RXCTRL_RXEN;</div><div class='add'>+			IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_fw_recovery_mode_e610 - Check FW NVM recovery mode</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Check FW NVM recovery mode by reading the value of</div><div class='add'>+ * the dedicated register.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if FW is in recovery mode, otherwise false.</div><div class='add'>+ */</div><div class='add'>+static bool ixgbe_fw_recovery_mode_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 fwsm = IXGBE_READ_REG(hw, IXGBE_GL_MNG_FWSM);</div><div class='add'>+</div><div class='add'>+	return !!(fwsm &amp; IXGBE_GL_MNG_FWSM_RECOVERY_M);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_fw_rollback_mode_e610 - Check FW NVM rollback mode</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Check FW NVM rollback mode by reading the value of</div><div class='add'>+ * the dedicated register.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if FW is in rollback mode, otherwise false.</div><div class='add'>+ */</div><div class='add'>+static bool ixgbe_fw_rollback_mode_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 fwsm = IXGBE_READ_REG(hw, IXGBE_GL_MNG_FWSM);</div><div class='add'>+</div><div class='add'>+	return !!(fwsm &amp; IXGBE_GL_MNG_FWSM_ROLLBACK_M);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_init_phy_ops_e610 - PHY specific init</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Initialize any function pointers that were not able to be</div><div class='add'>+ * set during init_shared_code because the PHY type was not known.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_init_phy_ops_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_mac_info *mac = &amp;hw-&gt;mac;</div><div class='add'>+	struct ixgbe_phy_info *phy = &amp;hw-&gt;phy;</div><div class='add'>+</div><div class='add'>+	if (mac-&gt;ops.get_media_type(hw) == ixgbe_media_type_copper)</div><div class='add'>+		phy-&gt;ops.set_phy_power = ixgbe_set_phy_power_e610;</div><div class='add'>+	else</div><div class='add'>+		phy-&gt;ops.set_phy_power = NULL;</div><div class='add'>+</div><div class='add'>+	/* Identify the PHY */</div><div class='add'>+	return phy-&gt;ops.identify(hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_identify_phy_e610 - Identify PHY</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Determine PHY type, supported speeds and PHY ID.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_identify_phy_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_phy_caps_data pcaps;</div><div class='add'>+	u64 phy_type_low, phy_type_high;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Set PHY type */</div><div class='add'>+	hw-&gt;phy.type = ixgbe_phy_fw;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_get_phy_caps(hw, false,</div><div class='add'>+				     IXGBE_ACI_REPORT_TOPO_CAP_MEDIA, &amp;pcaps);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!(pcaps.module_compliance_enforcement &amp;</div><div class='add'>+	      IXGBE_ACI_MOD_ENFORCE_STRICT_MODE)) {</div><div class='add'>+		/* Handle lenient mode */</div><div class='add'>+		err = ixgbe_aci_get_phy_caps(hw, false,</div><div class='add'>+					     IXGBE_ACI_REPORT_TOPO_CAP_NO_MEDIA,</div><div class='add'>+					     &amp;pcaps);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Determine supported speeds */</div><div class='add'>+	hw-&gt;phy.speeds_supported = IXGBE_LINK_SPEED_UNKNOWN;</div><div class='add'>+	phy_type_high = le64_to_cpu(pcaps.phy_type_high);</div><div class='add'>+	phy_type_low = le64_to_cpu(pcaps.phy_type_low);</div><div class='add'>+</div><div class='add'>+	if (phy_type_high &amp; IXGBE_PHY_TYPE_HIGH_10BASE_T ||</div><div class='add'>+	    phy_type_high &amp; IXGBE_PHY_TYPE_HIGH_10M_SGMII)</div><div class='add'>+		hw-&gt;phy.speeds_supported |= IXGBE_LINK_SPEED_10_FULL;</div><div class='add'>+	if (phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_100BASE_TX ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_100M_SGMII ||</div><div class='add'>+	    phy_type_high &amp; IXGBE_PHY_TYPE_HIGH_100M_USXGMII)</div><div class='add'>+		hw-&gt;phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL;</div><div class='add'>+	if (phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_1000BASE_T  ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_1000BASE_SX ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_1000BASE_LX ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_1000BASE_KX ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_1G_SGMII    ||</div><div class='add'>+	    phy_type_high &amp; IXGBE_PHY_TYPE_HIGH_1G_USXGMII)</div><div class='add'>+		hw-&gt;phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL;</div><div class='add'>+	if (phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_2500BASE_T   ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_2500BASE_X   ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_2500BASE_KX  ||</div><div class='add'>+	    phy_type_high &amp; IXGBE_PHY_TYPE_HIGH_2500M_SGMII ||</div><div class='add'>+	    phy_type_high &amp; IXGBE_PHY_TYPE_HIGH_2500M_USXGMII)</div><div class='add'>+		hw-&gt;phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL;</div><div class='add'>+	if (phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_5GBASE_T  ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_5GBASE_KR ||</div><div class='add'>+	    phy_type_high &amp; IXGBE_PHY_TYPE_HIGH_5G_USXGMII)</div><div class='add'>+		hw-&gt;phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL;</div><div class='add'>+	if (phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_10GBASE_T       ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_10G_SFI_DA      ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_10GBASE_SR      ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_10GBASE_LR      ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_10GBASE_KR_CR1  ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_10G_SFI_AOC_ACC ||</div><div class='add'>+	    phy_type_low  &amp; IXGBE_PHY_TYPE_LOW_10G_SFI_C2C     ||</div><div class='add'>+	    phy_type_high &amp; IXGBE_PHY_TYPE_HIGH_10G_USXGMII)</div><div class='add'>+		hw-&gt;phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL;</div><div class='add'>+</div><div class='add'>+	/* Initialize autoneg speeds */</div><div class='add'>+	if (!hw-&gt;phy.autoneg_advertised)</div><div class='add'>+		hw-&gt;phy.autoneg_advertised = hw-&gt;phy.speeds_supported;</div><div class='add'>+</div><div class='add'>+	/* Set PHY ID */</div><div class='add'>+	memcpy(&amp;hw-&gt;phy.id, pcaps.phy_id_oui, sizeof(u32));</div><div class='add'>+</div><div class='add'>+	hw-&gt;phy.eee_speeds_supported = IXGBE_LINK_SPEED_10_FULL |</div><div class='add'>+				       IXGBE_LINK_SPEED_100_FULL |</div><div class='add'>+				       IXGBE_LINK_SPEED_1GB_FULL;</div><div class='add'>+	hw-&gt;phy.eee_speeds_advertised = hw-&gt;phy.eee_speeds_supported;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_identify_module_e610 - Identify SFP module type</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Identify the SFP module type.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_identify_module_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	bool media_available;</div><div class='add'>+	u8 module_type;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_update_link_info(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	media_available =</div><div class='add'>+		(hw-&gt;link.link_info.link_info &amp; IXGBE_ACI_MEDIA_AVAILABLE);</div><div class='add'>+</div><div class='add'>+	if (media_available) {</div><div class='add'>+		hw-&gt;phy.sfp_type = ixgbe_sfp_type_unknown;</div><div class='add'>+</div><div class='add'>+		/* Get module type from hw context updated by</div><div class='add'>+		 * ixgbe_update_link_info()</div><div class='add'>+		 */</div><div class='add'>+		module_type = hw-&gt;link.link_info.module_type[IXGBE_ACI_MOD_TYPE_IDENT];</div><div class='add'>+</div><div class='add'>+		if ((module_type &amp; IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE) ||</div><div class='add'>+		    (module_type &amp; IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE)) {</div><div class='add'>+			hw-&gt;phy.sfp_type = ixgbe_sfp_type_da_cu;</div><div class='add'>+		} else if (module_type &amp; IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_SR) {</div><div class='add'>+			hw-&gt;phy.sfp_type = ixgbe_sfp_type_sr;</div><div class='add'>+		} else if ((module_type &amp; IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_LR) ||</div><div class='add'>+			   (module_type &amp; IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_LRM)) {</div><div class='add'>+			hw-&gt;phy.sfp_type = ixgbe_sfp_type_lr;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		hw-&gt;phy.sfp_type = ixgbe_sfp_type_not_present;</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_setup_phy_link_e610 - Sets up firmware-controlled PHYs</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Set the parameters for the firmware-controlled PHYs.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_setup_phy_link_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_phy_caps_data pcaps;</div><div class='add'>+	struct ixgbe_aci_cmd_set_phy_cfg_data pcfg;</div><div class='add'>+	u8 rmode = IXGBE_ACI_REPORT_TOPO_CAP_MEDIA;</div><div class='add'>+	u64 sup_phy_type_low, sup_phy_type_high;</div><div class='add'>+	u64 phy_type_low = 0, phy_type_high = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_get_link_info(hw, false, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* If media is not available get default config. */</div><div class='add'>+	if (!(hw-&gt;link.link_info.link_info &amp; IXGBE_ACI_MEDIA_AVAILABLE))</div><div class='add'>+		rmode = IXGBE_ACI_REPORT_DFLT_CFG;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_get_phy_caps(hw, false, rmode, &amp;pcaps);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	sup_phy_type_low = le64_to_cpu(pcaps.phy_type_low);</div><div class='add'>+	sup_phy_type_high = le64_to_cpu(pcaps.phy_type_high);</div><div class='add'>+</div><div class='add'>+	/* Get Active configuration to avoid unintended changes. */</div><div class='add'>+	err = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_ACTIVE_CFG,</div><div class='add'>+				     &amp;pcaps);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_copy_phy_caps_to_cfg(&amp;pcaps, &amp;pcfg);</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;phy.autoneg_advertised &amp; IXGBE_LINK_SPEED_10_FULL) {</div><div class='add'>+		phy_type_high |= IXGBE_PHY_TYPE_HIGH_10BASE_T;</div><div class='add'>+		phy_type_high |= IXGBE_PHY_TYPE_HIGH_10M_SGMII;</div><div class='add'>+	}</div><div class='add'>+	if (hw-&gt;phy.autoneg_advertised &amp; IXGBE_LINK_SPEED_100_FULL) {</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_100BASE_TX;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_100M_SGMII;</div><div class='add'>+		phy_type_high |= IXGBE_PHY_TYPE_HIGH_100M_USXGMII;</div><div class='add'>+	}</div><div class='add'>+	if (hw-&gt;phy.autoneg_advertised &amp; IXGBE_LINK_SPEED_1GB_FULL) {</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_1000BASE_T;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_1000BASE_SX;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_1000BASE_LX;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_1000BASE_KX;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_1G_SGMII;</div><div class='add'>+		phy_type_high |= IXGBE_PHY_TYPE_HIGH_1G_USXGMII;</div><div class='add'>+	}</div><div class='add'>+	if (hw-&gt;phy.autoneg_advertised &amp; IXGBE_LINK_SPEED_2_5GB_FULL) {</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_2500BASE_T;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_2500BASE_X;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_2500BASE_KX;</div><div class='add'>+		phy_type_high |= IXGBE_PHY_TYPE_HIGH_2500M_SGMII;</div><div class='add'>+		phy_type_high |= IXGBE_PHY_TYPE_HIGH_2500M_USXGMII;</div><div class='add'>+	}</div><div class='add'>+	if (hw-&gt;phy.autoneg_advertised &amp; IXGBE_LINK_SPEED_5GB_FULL) {</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_5GBASE_T;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_5GBASE_KR;</div><div class='add'>+		phy_type_high |= IXGBE_PHY_TYPE_HIGH_5G_USXGMII;</div><div class='add'>+	}</div><div class='add'>+	if (hw-&gt;phy.autoneg_advertised &amp; IXGBE_LINK_SPEED_10GB_FULL) {</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_10GBASE_T;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_10G_SFI_DA;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_10GBASE_SR;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_10GBASE_LR;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_10GBASE_KR_CR1;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_10G_SFI_AOC_ACC;</div><div class='add'>+		phy_type_low  |= IXGBE_PHY_TYPE_LOW_10G_SFI_C2C;</div><div class='add'>+		phy_type_high |= IXGBE_PHY_TYPE_HIGH_10G_USXGMII;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Mask the set values to avoid requesting unsupported link types. */</div><div class='add'>+	phy_type_low &amp;= sup_phy_type_low;</div><div class='add'>+	pcfg.phy_type_low = cpu_to_le64(phy_type_low);</div><div class='add'>+	phy_type_high &amp;= sup_phy_type_high;</div><div class='add'>+	pcfg.phy_type_high = cpu_to_le64(phy_type_high);</div><div class='add'>+</div><div class='add'>+	if (pcfg.phy_type_high != pcaps.phy_type_high ||</div><div class='add'>+	    pcfg.phy_type_low != pcaps.phy_type_low ||</div><div class='add'>+	    pcfg.caps != pcaps.caps) {</div><div class='add'>+		pcfg.caps |= IXGBE_ACI_PHY_ENA_LINK;</div><div class='add'>+		pcfg.caps |= IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT;</div><div class='add'>+</div><div class='add'>+		err = ixgbe_aci_set_phy_cfg(hw, &amp;pcfg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_set_phy_power_e610 - Control power for copper PHY</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @on: true for on, false for off</div><div class='add'>+ *</div><div class='add'>+ * Set the power on/off of the PHY</div><div class='add'>+ * by getting its capabilities and setting the appropriate</div><div class='add'>+ * configuration parameters.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_set_phy_power_e610(struct ixgbe_hw *hw, bool on)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_phy_caps_data phy_caps = {};</div><div class='add'>+	struct ixgbe_aci_cmd_set_phy_cfg_data phy_cfg = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_get_phy_caps(hw, false,</div><div class='add'>+				     IXGBE_ACI_REPORT_ACTIVE_CFG,</div><div class='add'>+				     &amp;phy_caps);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_copy_phy_caps_to_cfg(&amp;phy_caps, &amp;phy_cfg);</div><div class='add'>+</div><div class='add'>+	if (on)</div><div class='add'>+		phy_cfg.caps &amp;= ~IXGBE_ACI_PHY_ENA_LOW_POWER;</div><div class='add'>+	else</div><div class='add'>+		phy_cfg.caps |= IXGBE_ACI_PHY_ENA_LOW_POWER;</div><div class='add'>+</div><div class='add'>+	/* PHY is already in requested power mode. */</div><div class='add'>+	if (phy_caps.caps == phy_cfg.caps)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	phy_cfg.caps |= IXGBE_ACI_PHY_ENA_LINK;</div><div class='add'>+	phy_cfg.caps |= IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT;</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_set_phy_cfg(hw, &amp;phy_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_enter_lplu_e610 - Transition to low power states</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Configures Low Power Link Up on transition to low power states</div><div class='add'>+ * (from D0 to non-D0). Link is required to enter LPLU so avoid resetting the</div><div class='add'>+ * X557 PHY immediately prior to entering LPLU.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_enter_lplu_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_phy_caps_data phy_caps = {};</div><div class='add'>+	struct ixgbe_aci_cmd_set_phy_cfg_data phy_cfg = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_get_phy_caps(hw, false,</div><div class='add'>+				     IXGBE_ACI_REPORT_ACTIVE_CFG,</div><div class='add'>+				     &amp;phy_caps);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ixgbe_copy_phy_caps_to_cfg(&amp;phy_caps, &amp;phy_cfg);</div><div class='add'>+</div><div class='add'>+	phy_cfg.low_power_ctrl_an |= IXGBE_ACI_PHY_EN_D3COLD_LOW_POWER_AUTONEG;</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_set_phy_cfg(hw, &amp;phy_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_init_eeprom_params_e610 - Initialize EEPROM params</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Initialize the EEPROM parameters ixgbe_eeprom_info within the ixgbe_hw</div><div class='add'>+ * struct in order to set up EEPROM access.</div><div class='add'>+ *</div><div class='add'>+ * Return: the operation exit code.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_init_eeprom_params_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_eeprom_info *eeprom = &amp;hw-&gt;eeprom;</div><div class='add'>+	u32 gens_stat;</div><div class='add'>+	u8 sr_size;</div><div class='add'>+</div><div class='add'>+	if (eeprom-&gt;type != ixgbe_eeprom_uninitialized)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	eeprom-&gt;type = ixgbe_flash;</div><div class='add'>+</div><div class='add'>+	gens_stat = IXGBE_READ_REG(hw, GLNVM_GENS);</div><div class='add'>+	sr_size = FIELD_GET(GLNVM_GENS_SR_SIZE_M, gens_stat);</div><div class='add'>+</div><div class='add'>+	/* Switching to words (sr_size contains power of 2). */</div><div class='add'>+	eeprom-&gt;word_size = BIT(sr_size) * IXGBE_SR_WORDS_IN_1KB;</div><div class='add'>+</div><div class='add'>+	hw_dbg(hw, "Eeprom params: type = %d, size = %d\n", eeprom-&gt;type,</div><div class='add'>+	       eeprom-&gt;word_size);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_get_netlist_node - get a node handle</div><div class='add'>+ * @hw: pointer to the hw struct</div><div class='add'>+ * @cmd: get_link_topo AQ structure</div><div class='add'>+ * @node_part_number: output node part number if node found</div><div class='add'>+ * @node_handle: output node handle parameter if node found</div><div class='add'>+ *</div><div class='add'>+ * Get the netlist node and assigns it to</div><div class='add'>+ * the provided handle using ACI command (0x06E0).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw,</div><div class='add'>+			       struct ixgbe_aci_cmd_get_link_topo *cmd,</div><div class='add'>+			       u8 *node_part_number, u16 *node_handle)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_link_topo *resp;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_get_link_topo);</div><div class='add'>+	resp = libie_aq_raw(&amp;desc);</div><div class='add'>+	*resp = *cmd;</div><div class='add'>+</div><div class='add'>+	if (ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (node_handle)</div><div class='add'>+		*node_handle = le16_to_cpu(resp-&gt;addr.handle);</div><div class='add'>+	if (node_part_number)</div><div class='add'>+		*node_part_number = resp-&gt;node_part_num;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_acquire_nvm - Generic request for acquiring the NVM ownership</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @access: NVM access type (read or write)</div><div class='add'>+ *</div><div class='add'>+ * Request NVM ownership.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_acquire_nvm(struct ixgbe_hw *hw, enum libie_aq_res_access_type access)</div><div class='add'>+{</div><div class='add'>+	u32 fla;</div><div class='add'>+</div><div class='add'>+	/* Skip if we are in blank NVM programming mode */</div><div class='add'>+	fla = IXGBE_READ_REG(hw, IXGBE_GLNVM_FLA);</div><div class='add'>+	if ((fla &amp; IXGBE_GLNVM_FLA_LOCKED_M) == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ixgbe_acquire_res(hw, LIBIE_AQC_RES_ID_NVM, access,</div><div class='add'>+				 IXGBE_NVM_TIMEOUT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_release_nvm - Generic request for releasing the NVM ownership</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * Release NVM ownership.</div><div class='add'>+ */</div><div class='add'>+void ixgbe_release_nvm(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 fla;</div><div class='add'>+</div><div class='add'>+	/* Skip if we are in blank NVM programming mode */</div><div class='add'>+	fla = IXGBE_READ_REG(hw, IXGBE_GLNVM_FLA);</div><div class='add'>+	if ((fla &amp; IXGBE_GLNVM_FLA_LOCKED_M) == 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ixgbe_release_res(hw, LIBIE_AQC_RES_ID_NVM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_read_nvm - read NVM</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @module_typeid: module pointer location in words from the NVM beginning</div><div class='add'>+ * @offset: byte offset from the module beginning</div><div class='add'>+ * @length: length of the section to be read (in bytes from the offset)</div><div class='add'>+ * @data: command buffer (size [bytes] = length)</div><div class='add'>+ * @last_command: tells if this is the last command in a series</div><div class='add'>+ * @read_shadow_ram: tell if this is a shadow RAM read</div><div class='add'>+ *</div><div class='add'>+ * Read the NVM using ACI command (0x0701).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset,</div><div class='add'>+		       u16 length, void *data, bool last_command,</div><div class='add'>+		       bool read_shadow_ram)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_nvm *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	if (offset &gt; IXGBE_ACI_NVM_MAX_OFFSET)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_nvm_read);</div><div class='add'>+</div><div class='add'>+	if (!read_shadow_ram &amp;&amp; module_typeid == IXGBE_ACI_NVM_START_POINT)</div><div class='add'>+		cmd-&gt;cmd_flags |= IXGBE_ACI_NVM_FLASH_ONLY;</div><div class='add'>+</div><div class='add'>+	/* If this is the last command in a series, set the proper flag. */</div><div class='add'>+	if (last_command)</div><div class='add'>+		cmd-&gt;cmd_flags |= IXGBE_ACI_NVM_LAST_CMD;</div><div class='add'>+	cmd-&gt;module_typeid = cpu_to_le16(module_typeid);</div><div class='add'>+	cmd-&gt;offset_low = cpu_to_le16(offset &amp; 0xFFFF);</div><div class='add'>+	cmd-&gt;offset_high = (offset &gt;&gt; 16) &amp; 0xFF;</div><div class='add'>+	cmd-&gt;length = cpu_to_le16(length);</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, &amp;desc, data, length);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_erase_nvm - erase NVM sector</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @module_typeid: module pointer location in words from the NVM beginning</div><div class='add'>+ *</div><div class='add'>+ * Erase the NVM sector using the ACI command (0x0702).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_nvm *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	__le16 len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Read a length value from SR, so module_typeid is equal to 0,</div><div class='add'>+	 * calculate offset where module size is placed from bytes to words</div><div class='add'>+	 * set last command and read from SR values to true.</div><div class='add'>+	 */</div><div class='add'>+	err = ixgbe_aci_read_nvm(hw, 0, 2 * module_typeid + 2, 2, &amp;len, true,</div><div class='add'>+				 true);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_nvm_erase);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;module_typeid = cpu_to_le16(module_typeid);</div><div class='add'>+	cmd-&gt;length = len;</div><div class='add'>+	cmd-&gt;offset_low = 0;</div><div class='add'>+	cmd-&gt;offset_high = 0;</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_update_nvm - update NVM</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @module_typeid: module pointer location in words from the NVM beginning</div><div class='add'>+ * @offset: byte offset from the module beginning</div><div class='add'>+ * @length: length of the section to be written (in bytes from the offset)</div><div class='add'>+ * @data: command buffer (size [bytes] = length)</div><div class='add'>+ * @last_command: tells if this is the last command in a series</div><div class='add'>+ * @command_flags: command parameters</div><div class='add'>+ *</div><div class='add'>+ * Update the NVM using the ACI command (0x0703).</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid,</div><div class='add'>+			 u32 offset, u16 length, void *data,</div><div class='add'>+			 bool last_command, u8 command_flags)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_nvm *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	/* In offset the highest byte must be zeroed. */</div><div class='add'>+	if (offset &amp; 0xFF000000)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_nvm_write);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;cmd_flags |= command_flags;</div><div class='add'>+</div><div class='add'>+	/* If this is the last command in a series, set the proper flag. */</div><div class='add'>+	if (last_command)</div><div class='add'>+		cmd-&gt;cmd_flags |= IXGBE_ACI_NVM_LAST_CMD;</div><div class='add'>+	cmd-&gt;module_typeid = cpu_to_le16(module_typeid);</div><div class='add'>+	cmd-&gt;offset_low = cpu_to_le16(offset &amp; 0xFFFF);</div><div class='add'>+	cmd-&gt;offset_high = FIELD_GET(IXGBE_ACI_NVM_OFFSET_HI_U_MASK, offset);</div><div class='add'>+	cmd-&gt;length = cpu_to_le16(length);</div><div class='add'>+</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, &amp;desc, data, length);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_nvm_write_activate - NVM activate write</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @cmd_flags: flags for write activate command</div><div class='add'>+ * @response_flags: response indicators from firmware</div><div class='add'>+ *</div><div class='add'>+ * Update the control word with the required banks' validity bits</div><div class='add'>+ * and dumps the Shadow RAM to flash using ACI command (0x0707).</div><div class='add'>+ *</div><div class='add'>+ * cmd_flags controls which banks to activate, the preservation level to use</div><div class='add'>+ * when activating the NVM bank, and whether an EMP reset is required for</div><div class='add'>+ * activation.</div><div class='add'>+ *</div><div class='add'>+ * Note that the 16bit cmd_flags value is split between two separate 1 byte</div><div class='add'>+ * flag values in the descriptor.</div><div class='add'>+ *</div><div class='add'>+ * On successful return of the firmware command, the response_flags variable</div><div class='add'>+ * is updated with the flags reported by firmware indicating certain status,</div><div class='add'>+ * such as whether EMP reset is enabled.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags,</div><div class='add'>+			     u8 *response_flags)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_nvm *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	s32 err;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc,</div><div class='add'>+					ixgbe_aci_opc_nvm_write_activate);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;cmd_flags = (u8)(cmd_flags &amp; 0xFF);</div><div class='add'>+	cmd-&gt;offset_high = (u8)FIELD_GET(IXGBE_ACI_NVM_OFFSET_HI_A_MASK,</div><div class='add'>+					 cmd_flags);</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+	if (!err &amp;&amp; response_flags)</div><div class='add'>+		*response_flags = cmd-&gt;cmd_flags;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_nvm_validate_checksum - validate checksum</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Verify NVM PFA checksum validity using ACI command (0x0706).</div><div class='add'>+ * If the checksum verification failed, IXGBE_ERR_NVM_CHECKSUM is returned.</div><div class='add'>+ * The function acquires and then releases the NVM ownership.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_nvm_checksum *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_acquire_nvm(hw, LIBIE_AQC_RES_ACCESS_READ);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_nvm_checksum);</div><div class='add'>+	cmd-&gt;flags = IXGBE_ACI_NVM_CHECKSUM_VERIFY;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+</div><div class='add'>+	ixgbe_release_nvm(hw);</div><div class='add'>+</div><div class='add'>+	if (!err &amp;&amp; cmd-&gt;checksum !=</div><div class='add'>+		cpu_to_le16(IXGBE_ACI_NVM_CHECKSUM_CORRECT)) {</div><div class='add'>+		struct ixgbe_adapter *adapter = container_of(hw, struct ixgbe_adapter,</div><div class='add'>+							     hw);</div><div class='add'>+</div><div class='add'>+		err = -EIO;</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Invalid Shadow Ram checksum");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_discover_flash_size - Discover the available flash size</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * The device flash could be up to 16MB in size. However, it is possible that</div><div class='add'>+ * the actual size is smaller. Use bisection to determine the accessible size</div><div class='add'>+ * of flash memory.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_discover_flash_size(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 min_size = 0, max_size = IXGBE_ACI_NVM_MAX_OFFSET + 1;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_acquire_nvm(hw, LIBIE_AQC_RES_ACCESS_READ);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	while ((max_size - min_size) &gt; 1) {</div><div class='add'>+		u32 offset = (max_size + min_size) / 2;</div><div class='add'>+		u32 len = 1;</div><div class='add'>+		u8 data;</div><div class='add'>+</div><div class='add'>+		err = ixgbe_read_flat_nvm(hw, offset, &amp;len, &amp;data, false);</div><div class='add'>+		if (err == -EIO &amp;&amp;</div><div class='add'>+		    hw-&gt;aci.last_status == LIBIE_AQ_RC_EINVAL) {</div><div class='add'>+			err = 0;</div><div class='add'>+			max_size = offset;</div><div class='add'>+		} else if (!err) {</div><div class='add'>+			min_size = offset;</div><div class='add'>+		} else {</div><div class='add'>+			/* an unexpected error occurred */</div><div class='add'>+			goto err_read_flat_nvm;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw-&gt;flash.flash_size = max_size;</div><div class='add'>+</div><div class='add'>+err_read_flat_nvm:</div><div class='add'>+	ixgbe_release_nvm(hw);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_sr_base_address - Read the value of a Shadow RAM pointer word</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @offset: the word offset of the Shadow RAM word to read</div><div class='add'>+ * @pointer: pointer value read from Shadow RAM</div><div class='add'>+ *</div><div class='add'>+ * Read the given Shadow RAM word, and convert it to a pointer value specified</div><div class='add'>+ * in bytes. This function assumes the specified offset is a valid pointer</div><div class='add'>+ * word.</div><div class='add'>+ *</div><div class='add'>+ * Each pointer word specifies whether it is stored in word size or 4KB</div><div class='add'>+ * sector size by using the highest bit. The reported pointer value will be in</div><div class='add'>+ * bytes, intended for flat NVM reads.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_read_sr_base_address(struct ixgbe_hw *hw, u16 offset,</div><div class='add'>+				      u32 *pointer)</div><div class='add'>+{</div><div class='add'>+	u16 value;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_ee_aci_e610(hw, offset, &amp;value);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Determine if the pointer is in 4KB or word units */</div><div class='add'>+	if (value &amp; IXGBE_SR_NVM_PTR_4KB_UNITS)</div><div class='add'>+		*pointer = (value &amp; ~IXGBE_SR_NVM_PTR_4KB_UNITS) * SZ_4K;</div><div class='add'>+	else</div><div class='add'>+		*pointer = value * sizeof(u16);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_sr_area_size - Read an area size from a Shadow RAM word</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @offset: the word offset of the Shadow RAM to read</div><div class='add'>+ * @size: size value read from the Shadow RAM</div><div class='add'>+ *</div><div class='add'>+ * Read the given Shadow RAM word, and convert it to an area size value</div><div class='add'>+ * specified in bytes. This function assumes the specified offset is a valid</div><div class='add'>+ * area size word.</div><div class='add'>+ *</div><div class='add'>+ * Each area size word is specified in 4KB sector units. This function reports</div><div class='add'>+ * the size in bytes, intended for flat NVM reads.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_read_sr_area_size(struct ixgbe_hw *hw, u16 offset, u32 *size)</div><div class='add'>+{</div><div class='add'>+	u16 value;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_ee_aci_e610(hw, offset, &amp;value);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Area sizes are always specified in 4KB units */</div><div class='add'>+	*size = value * SZ_4K;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_determine_active_flash_banks - Discover active bank for each module</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Read the Shadow RAM control word and determine which banks are active for</div><div class='add'>+ * the NVM, OROM, and Netlist modules. Also read and calculate the associated</div><div class='add'>+ * pointer and size. These values are then cached into the ixgbe_flash_info</div><div class='add'>+ * structure for later use in order to calculate the correct offset to read</div><div class='add'>+ * from the active module.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_determine_active_flash_banks(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_bank_info *banks = &amp;hw-&gt;flash.banks;</div><div class='add'>+	u16 ctrl_word;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_ee_aci_e610(hw, IXGBE_E610_SR_NVM_CTRL_WORD,</div><div class='add'>+				     &amp;ctrl_word);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(IXGBE_SR_CTRL_WORD_1_M, ctrl_word) !=</div><div class='add'>+	    IXGBE_SR_CTRL_WORD_VALID)</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	if (!(ctrl_word &amp; IXGBE_SR_CTRL_WORD_NVM_BANK))</div><div class='add'>+		banks-&gt;nvm_bank = IXGBE_1ST_FLASH_BANK;</div><div class='add'>+	else</div><div class='add'>+		banks-&gt;nvm_bank = IXGBE_2ND_FLASH_BANK;</div><div class='add'>+</div><div class='add'>+	if (!(ctrl_word &amp; IXGBE_SR_CTRL_WORD_OROM_BANK))</div><div class='add'>+		banks-&gt;orom_bank = IXGBE_1ST_FLASH_BANK;</div><div class='add'>+	else</div><div class='add'>+		banks-&gt;orom_bank = IXGBE_2ND_FLASH_BANK;</div><div class='add'>+</div><div class='add'>+	if (!(ctrl_word &amp; IXGBE_SR_CTRL_WORD_NETLIST_BANK))</div><div class='add'>+		banks-&gt;netlist_bank = IXGBE_1ST_FLASH_BANK;</div><div class='add'>+	else</div><div class='add'>+		banks-&gt;netlist_bank = IXGBE_2ND_FLASH_BANK;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_sr_base_address(hw, IXGBE_E610_SR_1ST_NVM_BANK_PTR,</div><div class='add'>+					 &amp;banks-&gt;nvm_ptr);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_sr_area_size(hw, IXGBE_E610_SR_NVM_BANK_SIZE,</div><div class='add'>+				      &amp;banks-&gt;nvm_size);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_sr_base_address(hw, IXGBE_E610_SR_1ST_OROM_BANK_PTR,</div><div class='add'>+					 &amp;banks-&gt;orom_ptr);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_sr_area_size(hw, IXGBE_E610_SR_OROM_BANK_SIZE,</div><div class='add'>+				      &amp;banks-&gt;orom_size);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_sr_base_address(hw, IXGBE_E610_SR_NETLIST_BANK_PTR,</div><div class='add'>+					 &amp;banks-&gt;netlist_ptr);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_sr_area_size(hw, IXGBE_E610_SR_NETLIST_BANK_SIZE,</div><div class='add'>+				      &amp;banks-&gt;netlist_size);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_flash_bank_offset - Get offset into requested flash bank</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @bank: whether to read from the active or inactive flash bank</div><div class='add'>+ * @module: the module to read from</div><div class='add'>+ *</div><div class='add'>+ * Based on the module, lookup the module offset from the beginning of the</div><div class='add'>+ * flash.</div><div class='add'>+ *</div><div class='add'>+ * Return: the flash offset. Note that a value of zero is invalid and must be</div><div class='add'>+ * treated as an error.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_get_flash_bank_offset(struct ixgbe_hw *hw,</div><div class='add'>+				       enum ixgbe_bank_select bank,</div><div class='add'>+				       u16 module)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_bank_info *banks = &amp;hw-&gt;flash.banks;</div><div class='add'>+	enum ixgbe_flash_bank active_bank;</div><div class='add'>+	bool second_bank_active;</div><div class='add'>+	u32 offset, size;</div><div class='add'>+</div><div class='add'>+	switch (module) {</div><div class='add'>+	case IXGBE_E610_SR_1ST_NVM_BANK_PTR:</div><div class='add'>+		offset = banks-&gt;nvm_ptr;</div><div class='add'>+		size = banks-&gt;nvm_size;</div><div class='add'>+		active_bank = banks-&gt;nvm_bank;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_E610_SR_1ST_OROM_BANK_PTR:</div><div class='add'>+		offset = banks-&gt;orom_ptr;</div><div class='add'>+		size = banks-&gt;orom_size;</div><div class='add'>+		active_bank = banks-&gt;orom_bank;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_E610_SR_NETLIST_BANK_PTR:</div><div class='add'>+		offset = banks-&gt;netlist_ptr;</div><div class='add'>+		size = banks-&gt;netlist_size;</div><div class='add'>+		active_bank = banks-&gt;netlist_bank;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (active_bank) {</div><div class='add'>+	case IXGBE_1ST_FLASH_BANK:</div><div class='add'>+		second_bank_active = false;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_2ND_FLASH_BANK:</div><div class='add'>+		second_bank_active = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The second flash bank is stored immediately following the first</div><div class='add'>+	 * bank. Based on whether the 1st or 2nd bank is active, and whether</div><div class='add'>+	 * we want the active or inactive bank, calculate the desired offset.</div><div class='add'>+	 */</div><div class='add'>+	switch (bank) {</div><div class='add'>+	case IXGBE_ACTIVE_FLASH_BANK:</div><div class='add'>+		return offset + (second_bank_active ? size : 0);</div><div class='add'>+	case IXGBE_INACTIVE_FLASH_BANK:</div><div class='add'>+		return offset + (second_bank_active ? 0 : size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_flash_module - Read a word from one of the main NVM modules</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @bank: which bank of the module to read</div><div class='add'>+ * @module: the module to read</div><div class='add'>+ * @offset: the offset into the module in bytes</div><div class='add'>+ * @data: storage for the word read from the flash</div><div class='add'>+ * @length: bytes of data to read</div><div class='add'>+ *</div><div class='add'>+ * Read data from the specified flash module. The bank parameter indicates</div><div class='add'>+ * whether or not to read from the active bank or the inactive bank of that</div><div class='add'>+ * module.</div><div class='add'>+ *</div><div class='add'>+ * The word will be read using flat NVM access, and relies on the</div><div class='add'>+ * hw-&gt;flash.banks data being setup by ixgbe_determine_active_flash_banks()</div><div class='add'>+ * during initialization.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_read_flash_module(struct ixgbe_hw *hw,</div><div class='add'>+				   enum ixgbe_bank_select bank,</div><div class='add'>+				   u16 module, u32 offset, u8 *data, u32 length)</div><div class='add'>+{</div><div class='add'>+	u32 start;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	start = ixgbe_get_flash_bank_offset(hw, bank, module);</div><div class='add'>+	if (!start)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_acquire_nvm(hw, LIBIE_AQC_RES_ACCESS_READ);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_flat_nvm(hw, start + offset, &amp;length, data, false);</div><div class='add'>+</div><div class='add'>+	ixgbe_release_nvm(hw);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_nvm_module - Read from the active main NVM module</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @bank: whether to read from active or inactive NVM module</div><div class='add'>+ * @offset: offset into the NVM module to read, in words</div><div class='add'>+ * @data: storage for returned word value</div><div class='add'>+ *</div><div class='add'>+ * Read the specified word from the active NVM module. This includes the CSS</div><div class='add'>+ * header at the start of the NVM module.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_read_nvm_module(struct ixgbe_hw *hw,</div><div class='add'>+				 enum ixgbe_bank_select bank,</div><div class='add'>+				 u32 offset, u16 *data)</div><div class='add'>+{</div><div class='add'>+	__le16 data_local;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_flash_module(hw, bank, IXGBE_E610_SR_1ST_NVM_BANK_PTR,</div><div class='add'>+				      offset * sizeof(data_local),</div><div class='add'>+				      (u8 *)&amp;data_local,</div><div class='add'>+				      sizeof(data_local));</div><div class='add'>+	if (!err)</div><div class='add'>+		*data = le16_to_cpu(data_local);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_netlist_module - Read data from the netlist module area</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @bank: whether to read from the active or inactive module</div><div class='add'>+ * @offset: offset into the netlist to read from</div><div class='add'>+ * @data: storage for returned word value</div><div class='add'>+ *</div><div class='add'>+ * Read a word from the specified netlist bank.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_read_netlist_module(struct ixgbe_hw *hw,</div><div class='add'>+				     enum ixgbe_bank_select bank,</div><div class='add'>+				     u32 offset, u16 *data)</div><div class='add'>+{</div><div class='add'>+	__le16 data_local;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_flash_module(hw, bank, IXGBE_E610_SR_NETLIST_BANK_PTR,</div><div class='add'>+				      offset * sizeof(data_local),</div><div class='add'>+				      (u8 *)&amp;data_local, sizeof(data_local));</div><div class='add'>+	if (!err)</div><div class='add'>+		*data = le16_to_cpu(data_local);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_orom_module - Read from the active Option ROM module</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @bank: whether to read from active or inactive OROM module</div><div class='add'>+ * @offset: offset into the OROM module to read, in words</div><div class='add'>+ * @data: storage for returned word value</div><div class='add'>+ *</div><div class='add'>+ * Read the specified word from the active Option ROM module of the flash.</div><div class='add'>+ * Note that unlike the NVM module, the CSS data is stored at the end of the</div><div class='add'>+ * module instead of at the beginning.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_read_orom_module(struct ixgbe_hw *hw,</div><div class='add'>+				  enum ixgbe_bank_select bank,</div><div class='add'>+				  u32 offset, u16 *data)</div><div class='add'>+{</div><div class='add'>+	__le16 data_local;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_flash_module(hw, bank, IXGBE_E610_SR_1ST_OROM_BANK_PTR,</div><div class='add'>+				      offset * sizeof(data_local),</div><div class='add'>+				      (u8 *)&amp;data_local, sizeof(data_local));</div><div class='add'>+	if (!err)</div><div class='add'>+		*data = le16_to_cpu(data_local);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_nvm_css_hdr_len - Read the CSS header length</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @bank: whether to read from the active or inactive flash bank</div><div class='add'>+ * @hdr_len: storage for header length in words</div><div class='add'>+ *</div><div class='add'>+ * Read the CSS header length from the NVM CSS header and add the</div><div class='add'>+ * Authentication header size, and then convert to words.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_get_nvm_css_hdr_len(struct ixgbe_hw *hw,</div><div class='add'>+				     enum ixgbe_bank_select bank,</div><div class='add'>+				     u32 *hdr_len)</div><div class='add'>+{</div><div class='add'>+	u16 hdr_len_l, hdr_len_h;</div><div class='add'>+	u32 hdr_len_dword;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_HDR_LEN_L,</div><div class='add'>+				    &amp;hdr_len_l);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_HDR_LEN_H,</div><div class='add'>+				    &amp;hdr_len_h);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* CSS header length is in DWORD, so convert to words and add</div><div class='add'>+	 * authentication header size.</div><div class='add'>+	 */</div><div class='add'>+	hdr_len_dword = (hdr_len_h &lt;&lt; 16) | hdr_len_l;</div><div class='add'>+	*hdr_len = hdr_len_dword * 2 + IXGBE_NVM_AUTH_HEADER_LEN;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_nvm_sr_copy - Read a word from the Shadow RAM copy</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @bank: whether to read from the active or inactive NVM module</div><div class='add'>+ * @offset: offset into the Shadow RAM copy to read, in words</div><div class='add'>+ * @data: storage for returned word value</div><div class='add'>+ *</div><div class='add'>+ * Read the specified word from the copy of the Shadow RAM found in the</div><div class='add'>+ * specified NVM module.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_read_nvm_sr_copy(struct ixgbe_hw *hw,</div><div class='add'>+				  enum ixgbe_bank_select bank,</div><div class='add'>+				  u32 offset, u16 *data)</div><div class='add'>+{</div><div class='add'>+	u32 hdr_len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_get_nvm_css_hdr_len(hw, bank, &amp;hdr_len);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	hdr_len = round_up(hdr_len, IXGBE_HDR_LEN_ROUNDUP);</div><div class='add'>+</div><div class='add'>+	return ixgbe_read_nvm_module(hw, bank, hdr_len + offset, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_nvm_srev - Read the security revision from the NVM CSS header</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @bank: whether to read from the active or inactive flash bank</div><div class='add'>+ * @srev: storage for security revision</div><div class='add'>+ *</div><div class='add'>+ * Read the security revision out of the CSS header of the active NVM module</div><div class='add'>+ * bank.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_get_nvm_srev(struct ixgbe_hw *hw,</div><div class='add'>+			      enum ixgbe_bank_select bank, u32 *srev)</div><div class='add'>+{</div><div class='add'>+	u16 srev_l, srev_h;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_SREV_L, &amp;srev_l);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_SREV_H, &amp;srev_h);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*srev = (srev_h &lt;&lt; 16) | srev_l;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_orom_civd_data - Get the combo version information from Option ROM</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @bank: whether to read from the active or inactive flash module</div><div class='add'>+ * @civd: storage for the Option ROM CIVD data.</div><div class='add'>+ *</div><div class='add'>+ * Searches through the Option ROM flash contents to locate the CIVD data for</div><div class='add'>+ * the image.</div><div class='add'>+ *</div><div class='add'>+ * Return: -ENOMEM when cannot allocate memory, -EDOM for checksum violation,</div><div class='add'>+ *	   -ENODATA when cannot find proper data, -EIO for faulty read or</div><div class='add'>+ *	   0 on success.</div><div class='add'>+ *</div><div class='add'>+ *	   On success @civd stores collected data.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ixgbe_get_orom_civd_data(struct ixgbe_hw *hw, enum ixgbe_bank_select bank,</div><div class='add'>+			 struct ixgbe_orom_civd_info *civd)</div><div class='add'>+{</div><div class='add'>+	u32 orom_size = hw-&gt;flash.banks.orom_size;</div><div class='add'>+	u8 *orom_data;</div><div class='add'>+	u32 offset;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	orom_data = kzalloc(orom_size, GFP_KERNEL);</div><div class='add'>+	if (!orom_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_flash_module(hw, bank,</div><div class='add'>+				      IXGBE_E610_SR_1ST_OROM_BANK_PTR, 0,</div><div class='add'>+				      orom_data, orom_size);</div><div class='add'>+	if (err) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The CIVD section is located in the Option ROM aligned to 512 bytes.</div><div class='add'>+	 * The first 4 bytes must contain the ASCII characters "$CIV".</div><div class='add'>+	 * A simple modulo 256 sum of all of the bytes of the structure must</div><div class='add'>+	 * equal 0.</div><div class='add'>+	 */</div><div class='add'>+	for (offset = 0; offset + SZ_512 &lt;= orom_size; offset += SZ_512) {</div><div class='add'>+		struct ixgbe_orom_civd_info *tmp;</div><div class='add'>+		u8 sum = 0;</div><div class='add'>+		u32 i;</div><div class='add'>+</div><div class='add'>+		BUILD_BUG_ON(sizeof(*tmp) &gt; SZ_512);</div><div class='add'>+</div><div class='add'>+		tmp = (struct ixgbe_orom_civd_info *)&amp;orom_data[offset];</div><div class='add'>+</div><div class='add'>+		/* Skip forward until we find a matching signature */</div><div class='add'>+		if (memcmp(IXGBE_OROM_CIV_SIGNATURE, tmp-&gt;signature,</div><div class='add'>+			   sizeof(tmp-&gt;signature)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Verify that the simple checksum is zero */</div><div class='add'>+		for (i = 0; i &lt; sizeof(*tmp); i++)</div><div class='add'>+			sum += ((u8 *)tmp)[i];</div><div class='add'>+</div><div class='add'>+		if (sum) {</div><div class='add'>+			err = -EDOM;</div><div class='add'>+			goto cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*civd = *tmp;</div><div class='add'>+		err = 0;</div><div class='add'>+</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = -ENODATA;</div><div class='add'>+cleanup:</div><div class='add'>+	kfree(orom_data);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_orom_srev - Read the security revision from the OROM CSS header</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @bank: whether to read from active or inactive flash module</div><div class='add'>+ * @srev: storage for security revision</div><div class='add'>+ *</div><div class='add'>+ * Read the security revision out of the CSS header of the active OROM module</div><div class='add'>+ * bank.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_get_orom_srev(struct ixgbe_hw *hw,</div><div class='add'>+			       enum ixgbe_bank_select bank,</div><div class='add'>+			       u32 *srev)</div><div class='add'>+{</div><div class='add'>+	u32 orom_size_word = hw-&gt;flash.banks.orom_size / 2;</div><div class='add'>+	u32 css_start, hdr_len;</div><div class='add'>+	u16 srev_l, srev_h;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_get_nvm_css_hdr_len(hw, bank, &amp;hdr_len);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (orom_size_word &lt; hdr_len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Calculate how far into the Option ROM the CSS header starts. Note</div><div class='add'>+	 * that ixgbe_read_orom_module takes a word offset.</div><div class='add'>+	 */</div><div class='add'>+	css_start = orom_size_word - hdr_len;</div><div class='add'>+	err = ixgbe_read_orom_module(hw, bank,</div><div class='add'>+				     css_start + IXGBE_NVM_CSS_SREV_L,</div><div class='add'>+				     &amp;srev_l);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_orom_module(hw, bank,</div><div class='add'>+				     css_start + IXGBE_NVM_CSS_SREV_H,</div><div class='add'>+				     &amp;srev_h);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*srev = srev_h &lt;&lt; 16 | srev_l;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_orom_ver_info - Read Option ROM version information</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @bank: whether to read from the active or inactive flash module</div><div class='add'>+ * @orom: pointer to Option ROM info structure</div><div class='add'>+ *</div><div class='add'>+ * Read Option ROM version and security revision from the Option ROM flash</div><div class='add'>+ * section.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_get_orom_ver_info(struct ixgbe_hw *hw,</div><div class='add'>+				   enum ixgbe_bank_select bank,</div><div class='add'>+				   struct ixgbe_orom_info *orom)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_orom_civd_info civd;</div><div class='add'>+	u32 combo_ver;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_get_orom_civd_data(hw, bank, &amp;civd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	combo_ver = get_unaligned_le32(&amp;civd.combo_ver);</div><div class='add'>+</div><div class='add'>+	orom-&gt;major = (u8)FIELD_GET(IXGBE_OROM_VER_MASK, combo_ver);</div><div class='add'>+	orom-&gt;patch = (u8)FIELD_GET(IXGBE_OROM_VER_PATCH_MASK, combo_ver);</div><div class='add'>+	orom-&gt;build = (u16)FIELD_GET(IXGBE_OROM_VER_BUILD_MASK, combo_ver);</div><div class='add'>+</div><div class='add'>+	return ixgbe_get_orom_srev(hw, bank, &amp;orom-&gt;srev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_inactive_orom_ver - Read Option ROM version from the inactive bank</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @orom: storage for Option ROM version information</div><div class='add'>+ *</div><div class='add'>+ * Read the Option ROM version and security revision data for the inactive</div><div class='add'>+ * section of flash. Used to access version data for a pending update that has</div><div class='add'>+ * not yet been activated.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_get_inactive_orom_ver(struct ixgbe_hw *hw,</div><div class='add'>+				struct ixgbe_orom_info *orom)</div><div class='add'>+{</div><div class='add'>+	return ixgbe_get_orom_ver_info(hw, IXGBE_INACTIVE_FLASH_BANK, orom);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_nvm_ver_info - Read NVM version information</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @bank: whether to read from the active or inactive flash bank</div><div class='add'>+ * @nvm: pointer to NVM info structure</div><div class='add'>+ *</div><div class='add'>+ * Read the NVM EETRACK ID and map version of the main NVM image bank, filling</div><div class='add'>+ * in the nvm info structure.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_get_nvm_ver_info(struct ixgbe_hw *hw,</div><div class='add'>+				  enum ixgbe_bank_select bank,</div><div class='add'>+				  struct ixgbe_nvm_info *nvm)</div><div class='add'>+{</div><div class='add'>+	u16 eetrack_lo, eetrack_hi, ver;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_nvm_sr_copy(hw, bank,</div><div class='add'>+				     IXGBE_E610_SR_NVM_DEV_STARTER_VER, &amp;ver);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	nvm-&gt;major = FIELD_GET(IXGBE_E610_NVM_VER_HI_MASK, ver);</div><div class='add'>+	nvm-&gt;minor = FIELD_GET(IXGBE_E610_NVM_VER_LO_MASK, ver);</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_nvm_sr_copy(hw, bank, IXGBE_E610_SR_NVM_EETRACK_LO,</div><div class='add'>+				     &amp;eetrack_lo);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_nvm_sr_copy(hw, bank, IXGBE_E610_SR_NVM_EETRACK_HI,</div><div class='add'>+				     &amp;eetrack_hi);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	nvm-&gt;eetrack = (eetrack_hi &lt;&lt; 16) | eetrack_lo;</div><div class='add'>+</div><div class='add'>+	ixgbe_get_nvm_srev(hw, bank, &amp;nvm-&gt;srev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_inactive_nvm_ver - Read Option ROM version from the inactive bank</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @nvm: storage for Option ROM version information</div><div class='add'>+ *</div><div class='add'>+ * Read the NVM EETRACK ID, Map version, and security revision of the</div><div class='add'>+ * inactive NVM bank. Used to access version data for a pending update that</div><div class='add'>+ * has not yet been activated.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm)</div><div class='add'>+{</div><div class='add'>+	return ixgbe_get_nvm_ver_info(hw, IXGBE_INACTIVE_FLASH_BANK, nvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_active_nvm_ver - Read Option ROM version from the active bank</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @nvm: storage for Option ROM version information</div><div class='add'>+ *</div><div class='add'>+ * Reads the NVM EETRACK ID, Map version, and security revision of the</div><div class='add'>+ * active NVM bank.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw,</div><div class='add'>+				    struct ixgbe_nvm_info *nvm)</div><div class='add'>+{</div><div class='add'>+	return ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK, nvm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_netlist_info - Read the netlist version information</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @bank: whether to read from the active or inactive flash bank</div><div class='add'>+ * @netlist: pointer to netlist version info structure</div><div class='add'>+ *</div><div class='add'>+ * Get the netlist version information from the requested bank. Reads the Link</div><div class='add'>+ * Topology section to find the Netlist ID block and extract the relevant</div><div class='add'>+ * information into the netlist version structure.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_get_netlist_info(struct ixgbe_hw *hw,</div><div class='add'>+				  enum ixgbe_bank_select bank,</div><div class='add'>+				  struct ixgbe_netlist_info *netlist)</div><div class='add'>+{</div><div class='add'>+	u16 module_id, length, node_count, i;</div><div class='add'>+	u16 *id_blk;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_netlist_module(hw, bank, IXGBE_NETLIST_TYPE_OFFSET,</div><div class='add'>+					&amp;module_id);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (module_id != IXGBE_NETLIST_LINK_TOPO_MOD_ID)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_netlist_module(hw, bank, IXGBE_LINK_TOPO_MODULE_LEN,</div><div class='add'>+					&amp;length);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Sanity check that we have at least enough words to store the</div><div class='add'>+	 * netlist ID block.</div><div class='add'>+	 */</div><div class='add'>+	if (length &lt; IXGBE_NETLIST_ID_BLK_SIZE)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_netlist_module(hw, bank, IXGBE_LINK_TOPO_NODE_COUNT,</div><div class='add'>+					&amp;node_count);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	node_count &amp;= IXGBE_LINK_TOPO_NODE_COUNT_M;</div><div class='add'>+</div><div class='add'>+	id_blk = kcalloc(IXGBE_NETLIST_ID_BLK_SIZE, sizeof(*id_blk), GFP_KERNEL);</div><div class='add'>+	if (!id_blk)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Read out the entire Netlist ID Block at once. */</div><div class='add'>+	err = ixgbe_read_flash_module(hw, bank, IXGBE_E610_SR_NETLIST_BANK_PTR,</div><div class='add'>+				      IXGBE_NETLIST_ID_BLK_OFFSET(node_count) *</div><div class='add'>+				      sizeof(*id_blk), (u8 *)id_blk,</div><div class='add'>+				      IXGBE_NETLIST_ID_BLK_SIZE *</div><div class='add'>+				      sizeof(*id_blk));</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_id_blk;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; IXGBE_NETLIST_ID_BLK_SIZE; i++)</div><div class='add'>+		id_blk[i] = le16_to_cpu(((__le16 *)id_blk)[i]);</div><div class='add'>+</div><div class='add'>+	netlist-&gt;major = id_blk[IXGBE_NETLIST_ID_BLK_MAJOR_VER_HIGH] &lt;&lt; 16 |</div><div class='add'>+			 id_blk[IXGBE_NETLIST_ID_BLK_MAJOR_VER_LOW];</div><div class='add'>+	netlist-&gt;minor = id_blk[IXGBE_NETLIST_ID_BLK_MINOR_VER_HIGH] &lt;&lt; 16 |</div><div class='add'>+			 id_blk[IXGBE_NETLIST_ID_BLK_MINOR_VER_LOW];</div><div class='add'>+	netlist-&gt;type = id_blk[IXGBE_NETLIST_ID_BLK_TYPE_HIGH] &lt;&lt; 16 |</div><div class='add'>+			id_blk[IXGBE_NETLIST_ID_BLK_TYPE_LOW];</div><div class='add'>+	netlist-&gt;rev = id_blk[IXGBE_NETLIST_ID_BLK_REV_HIGH] &lt;&lt; 16 |</div><div class='add'>+		       id_blk[IXGBE_NETLIST_ID_BLK_REV_LOW];</div><div class='add'>+	netlist-&gt;cust_ver = id_blk[IXGBE_NETLIST_ID_BLK_CUST_VER];</div><div class='add'>+	/* Read the left most 4 bytes of SHA */</div><div class='add'>+	netlist-&gt;hash = id_blk[IXGBE_NETLIST_ID_BLK_SHA_HASH_WORD(15)] &lt;&lt; 16 |</div><div class='add'>+			id_blk[IXGBE_NETLIST_ID_BLK_SHA_HASH_WORD(14)];</div><div class='add'>+</div><div class='add'>+free_id_blk:</div><div class='add'>+	kfree(id_blk);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_inactive_netlist_ver - Read netlist version from the inactive bank</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @netlist: pointer to netlist version info structure</div><div class='add'>+ *</div><div class='add'>+ * Read the netlist version data from the inactive netlist bank. Used to</div><div class='add'>+ * extract version data of a pending flash update in order to display the</div><div class='add'>+ * version data.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw,</div><div class='add'>+				   struct ixgbe_netlist_info *netlist)</div><div class='add'>+{</div><div class='add'>+	return ixgbe_get_netlist_info(hw, IXGBE_INACTIVE_FLASH_BANK, netlist);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_flash_data - get flash data</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Read and populate flash data such as Shadow RAM size,</div><div class='add'>+ * max_timeout and blank_nvm_mode</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_get_flash_data(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_flash_info *flash = &amp;hw-&gt;flash;</div><div class='add'>+	u32 fla, gens_stat;</div><div class='add'>+	u8 sr_size;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* The SR size is stored regardless of the NVM programming mode</div><div class='add'>+	 * as the blank mode may be used in the factory line.</div><div class='add'>+	 */</div><div class='add'>+	gens_stat = IXGBE_READ_REG(hw, GLNVM_GENS);</div><div class='add'>+	sr_size = FIELD_GET(GLNVM_GENS_SR_SIZE_M, gens_stat);</div><div class='add'>+</div><div class='add'>+	/* Switching to words (sr_size contains power of 2) */</div><div class='add'>+	flash-&gt;sr_words = BIT(sr_size) * (SZ_1K / sizeof(u16));</div><div class='add'>+</div><div class='add'>+	/* Check if we are in the normal or blank NVM programming mode */</div><div class='add'>+	fla = IXGBE_READ_REG(hw, IXGBE_GLNVM_FLA);</div><div class='add'>+	if (fla &amp; IXGBE_GLNVM_FLA_LOCKED_M) {</div><div class='add'>+		flash-&gt;blank_nvm_mode = false;</div><div class='add'>+	} else {</div><div class='add'>+		flash-&gt;blank_nvm_mode = true;</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ixgbe_discover_flash_size(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_determine_active_flash_banks(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK,</div><div class='add'>+				     &amp;flash-&gt;nvm);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_get_orom_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK,</div><div class='add'>+				      &amp;flash-&gt;orom);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_get_netlist_info(hw, IXGBE_ACTIVE_FLASH_BANK,</div><div class='add'>+				     &amp;flash-&gt;netlist);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_nvm_update_empr - update NVM using EMPR</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ *</div><div class='add'>+ * Force EMP reset using ACI command (0x0709). This command allows SW to</div><div class='add'>+ * request an EMPR to activate new FW.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_aci_nvm_update_empr(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_nvm_update_empr);</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, &amp;desc, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ixgbe_nvm_set_pkg_data - NVM set package data</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @del_pkg_data_flag: If is set then the current pkg_data store by FW</div><div class='add'>+ *		       is deleted.</div><div class='add'>+ *		       If bit is set to 1, then buffer should be size 0.</div><div class='add'>+ * @data: pointer to buffer</div><div class='add'>+ * @length: length of the buffer</div><div class='add'>+ *</div><div class='add'>+ * Set package data using ACI command (0x070A).</div><div class='add'>+ * This command is equivalent to the reception of</div><div class='add'>+ * a PLDM FW Update GetPackageData cmd. This command should be sent</div><div class='add'>+ * as part of the NVM update as the first cmd in the flow.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_nvm_set_pkg_data(struct ixgbe_hw *hw, bool del_pkg_data_flag,</div><div class='add'>+			   u8 *data, u16 length)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_nvm_pkg_data *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+</div><div class='add'>+	if (length != 0 &amp;&amp; !data)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc, ixgbe_aci_opc_nvm_pkg_data);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='add'>+</div><div class='add'>+	if (del_pkg_data_flag)</div><div class='add'>+		cmd-&gt;cmd_flags |= IXGBE_ACI_NVM_PKG_DELETE;</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, &amp;desc, data, length);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ixgbe_nvm_pass_component_tbl - NVM pass component table</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @data: pointer to buffer</div><div class='add'>+ * @length: length of the buffer</div><div class='add'>+ * @transfer_flag: parameter for determining stage of the update</div><div class='add'>+ * @comp_response: a pointer to the response from the 0x070B ACI.</div><div class='add'>+ * @comp_response_code: a pointer to the response code from the 0x070B ACI.</div><div class='add'>+ *</div><div class='add'>+ * Pass component table using ACI command (0x070B). This command is equivalent</div><div class='add'>+ * to the reception of a PLDM FW Update PassComponentTable cmd.</div><div class='add'>+ * This command should be sent once per component. It can be only sent after</div><div class='add'>+ * Set Package Data cmd and before actual update. FW will assume these</div><div class='add'>+ * commands are going to be sent until the TransferFlag is set to End or</div><div class='add'>+ * StartAndEnd.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_nvm_pass_component_tbl(struct ixgbe_hw *hw, u8 *data, u16 length,</div><div class='add'>+				 u8 transfer_flag, u8 *comp_response,</div><div class='add'>+				 u8 *comp_response_code)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_nvm_pass_comp_tbl *cmd;</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!data || !comp_response || !comp_response_code)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	ixgbe_fill_dflt_direct_cmd_desc(&amp;desc,</div><div class='add'>+					ixgbe_aci_opc_nvm_pass_component_tbl);</div><div class='add'>+	desc.flags |= cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;transfer_flag = transfer_flag;</div><div class='add'>+	err = ixgbe_aci_send_cmd(hw, &amp;desc, data, length);</div><div class='add'>+	if (!err) {</div><div class='add'>+		*comp_response = cmd-&gt;component_response;</div><div class='add'>+		*comp_response_code = cmd-&gt;component_response_code;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_sr_word_aci - Reads Shadow RAM via ACI</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)</div><div class='add'>+ * @data: word read from the Shadow RAM</div><div class='add'>+ *</div><div class='add'>+ * Reads one 16 bit word from the Shadow RAM using ixgbe_read_flat_nvm.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_read_sr_word_aci(struct ixgbe_hw  *hw, u16 offset, u16 *data)</div><div class='add'>+{</div><div class='add'>+	u32 bytes = sizeof(u16);</div><div class='add'>+	u16 data_local;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_flat_nvm(hw, offset * sizeof(u16), &amp;bytes,</div><div class='add'>+				  (u8 *)&amp;data_local, true);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*data = data_local;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_flat_nvm - Read portion of NVM by flat offset</div><div class='add'>+ * @hw: pointer to the HW struct</div><div class='add'>+ * @offset: offset from beginning of NVM</div><div class='add'>+ * @length: (in) number of bytes to read; (out) number of bytes actually read</div><div class='add'>+ * @data: buffer to return data in (sized to fit the specified length)</div><div class='add'>+ * @read_shadow_ram: if true, read from shadow RAM instead of NVM</div><div class='add'>+ *</div><div class='add'>+ * Reads a portion of the NVM, as a flat memory space. This function correctly</div><div class='add'>+ * breaks read requests across Shadow RAM sectors, prevents Shadow RAM size</div><div class='add'>+ * from being exceeded in case of Shadow RAM read requests and ensures that no</div><div class='add'>+ * single read request exceeds the maximum 4KB read for a single admin command.</div><div class='add'>+ *</div><div class='add'>+ * Returns an error code on failure. Note that the data pointer may be</div><div class='add'>+ * partially updated if some reads succeed before a failure.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_read_flat_nvm(struct ixgbe_hw  *hw, u32 offset, u32 *length,</div><div class='add'>+			u8 *data, bool read_shadow_ram)</div><div class='add'>+{</div><div class='add'>+	u32 inlen = *length;</div><div class='add'>+	u32 bytes_read = 0;</div><div class='add'>+	bool last_cmd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Verify the length of the read if this is for the Shadow RAM */</div><div class='add'>+	if (read_shadow_ram &amp;&amp; ((offset + inlen) &gt;</div><div class='add'>+				(hw-&gt;eeprom.word_size * 2u)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		u32 read_size, sector_offset;</div><div class='add'>+</div><div class='add'>+		/* ixgbe_aci_read_nvm cannot read more than 4KB at a time.</div><div class='add'>+		 * Additionally, a read from the Shadow RAM may not cross over</div><div class='add'>+		 * a sector boundary. Conveniently, the sector size is also 4KB.</div><div class='add'>+		 */</div><div class='add'>+		sector_offset = offset % IXGBE_ACI_MAX_BUFFER_SIZE;</div><div class='add'>+		read_size = min_t(u32,</div><div class='add'>+				  IXGBE_ACI_MAX_BUFFER_SIZE - sector_offset,</div><div class='add'>+				  inlen - bytes_read);</div><div class='add'>+</div><div class='add'>+		last_cmd = !(bytes_read + read_size &lt; inlen);</div><div class='add'>+</div><div class='add'>+		/* ixgbe_aci_read_nvm takes the length as a u16. Our read_size</div><div class='add'>+		 * is calculated using a u32, but the IXGBE_ACI_MAX_BUFFER_SIZE</div><div class='add'>+		 * maximum size guarantees that it will fit within the 2 bytes.</div><div class='add'>+		 */</div><div class='add'>+		err = ixgbe_aci_read_nvm(hw, IXGBE_ACI_NVM_START_POINT,</div><div class='add'>+					 offset, (u16)read_size,</div><div class='add'>+					 data + bytes_read, last_cmd,</div><div class='add'>+					 read_shadow_ram);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		bytes_read += read_size;</div><div class='add'>+		offset += read_size;</div><div class='add'>+	} while (!last_cmd);</div><div class='add'>+</div><div class='add'>+	*length = bytes_read;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_sr_buf_aci - Read Shadow RAM buffer via ACI</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @offset: offset of the Shadow RAM words to read (0x000000 - 0x001FFF)</div><div class='add'>+ * @words: (in) number of words to read; (out) number of words actually read</div><div class='add'>+ * @data: words read from the Shadow RAM</div><div class='add'>+ *</div><div class='add'>+ * Read 16 bit words (data buf) from the Shadow RAM. Acquire/release the NVM</div><div class='add'>+ * ownership.</div><div class='add'>+ *</div><div class='add'>+ * Return: the operation exit code.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words,</div><div class='add'>+			  u16 *data)</div><div class='add'>+{</div><div class='add'>+	u32 bytes = *words * 2;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_flat_nvm(hw, offset * 2, &amp;bytes, (u8 *)data, true);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*words = bytes / 2;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; *words; i++)</div><div class='add'>+		data[i] = le16_to_cpu(((__le16 *)data)[i]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_ee_aci_e610 - Read EEPROM word using the admin command.</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @offset: offset of  word in the EEPROM to read</div><div class='add'>+ * @data: word read from the EEPROM</div><div class='add'>+ *</div><div class='add'>+ * Reads a 16 bit word from the EEPROM using the ACI.</div><div class='add'>+ * If the EEPROM params are not initialized, the function</div><div class='add'>+ * initialize them before proceeding with reading.</div><div class='add'>+ * The function acquires and then releases the NVM ownership.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_read_ee_aci_e610(struct ixgbe_hw *hw, u16 offset, u16 *data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;eeprom.type == ixgbe_eeprom_uninitialized) {</div><div class='add'>+		err = hw-&gt;eeprom.ops.init_params(hw);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ixgbe_acquire_nvm(hw, LIBIE_AQC_RES_ACCESS_READ);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_sr_word_aci(hw, offset, data);</div><div class='add'>+	ixgbe_release_nvm(hw);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_ee_aci_buffer_e610 - Read EEPROM words via ACI</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @offset: offset of words in the EEPROM to read</div><div class='add'>+ * @words: number of words to read</div><div class='add'>+ * @data: words to read from the EEPROM</div><div class='add'>+ *</div><div class='add'>+ * Read 16 bit words from the EEPROM via the ACI. Initialize the EEPROM params</div><div class='add'>+ * prior to the read. Acquire/release the NVM ownership.</div><div class='add'>+ *</div><div class='add'>+ * Return: the operation exit code.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_read_ee_aci_buffer_e610(struct ixgbe_hw *hw, u16 offset,</div><div class='add'>+				  u16 words, u16 *data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;eeprom.type == ixgbe_eeprom_uninitialized) {</div><div class='add'>+		err = hw-&gt;eeprom.ops.init_params(hw);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ixgbe_acquire_nvm(hw, LIBIE_AQC_RES_ACCESS_READ);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_sr_buf_aci(hw, offset, &amp;words, data);</div><div class='add'>+	ixgbe_release_nvm(hw);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_validate_eeprom_checksum_e610 - Validate EEPROM checksum</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @checksum_val: calculated checksum</div><div class='add'>+ *</div><div class='add'>+ * Performs checksum calculation and validates the EEPROM checksum. If the</div><div class='add'>+ * caller does not need checksum_val, the value can be NULL.</div><div class='add'>+ * If the EEPROM params are not initialized, the function</div><div class='add'>+ * initialize them before proceeding.</div><div class='add'>+ * The function acquires and then releases the NVM ownership.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_validate_eeprom_checksum_e610(struct ixgbe_hw *hw, u16 *checksum_val)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;eeprom.type == ixgbe_eeprom_uninitialized) {</div><div class='add'>+		err = hw-&gt;eeprom.ops.init_params(hw);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ixgbe_nvm_validate_checksum(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (checksum_val) {</div><div class='add'>+		u16 tmp_checksum;</div><div class='add'>+</div><div class='add'>+		err = ixgbe_acquire_nvm(hw, LIBIE_AQC_RES_ACCESS_READ);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = ixgbe_read_sr_word_aci(hw, IXGBE_E610_SR_SW_CHECKSUM_WORD,</div><div class='add'>+					     &amp;tmp_checksum);</div><div class='add'>+		ixgbe_release_nvm(hw);</div><div class='add'>+</div><div class='add'>+		if (!err)</div><div class='add'>+			*checksum_val = tmp_checksum;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_reset_hw_e610 - Perform hardware reset</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ * Resets the hardware by resetting the transmit and receive units, masks</div><div class='add'>+ * and clears all interrupts, and performs a reset.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_reset_hw_e610(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	u32 swfw_mask = hw-&gt;phy.phy_semaphore_mask;</div><div class='add'>+	u32 ctrl, i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Call adapter stop to disable tx/rx and clear interrupts */</div><div class='add'>+	err = hw-&gt;mac.ops.stop_adapter(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		goto reset_hw_out;</div><div class='add'>+</div><div class='add'>+	/* Flush pending Tx transactions. */</div><div class='add'>+	ixgbe_clear_tx_pending(hw);</div><div class='add'>+</div><div class='add'>+	hw-&gt;phy.ops.init(hw);</div><div class='add'>+mac_reset_top:</div><div class='add'>+	err = hw-&gt;mac.ops.acquire_swfw_sync(hw, swfw_mask);</div><div class='add'>+	if (err)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	ctrl = IXGBE_CTRL_RST;</div><div class='add'>+	ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);</div><div class='add'>+	IXGBE_WRITE_FLUSH(hw);</div><div class='add'>+	hw-&gt;mac.ops.release_swfw_sync(hw, swfw_mask);</div><div class='add'>+</div><div class='add'>+	/* Poll for reset bit to self-clear indicating reset is complete */</div><div class='add'>+	for (i = 0; i &lt; 10; i++) {</div><div class='add'>+		udelay(1);</div><div class='add'>+		ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);</div><div class='add'>+		if (!(ctrl &amp; IXGBE_CTRL_RST_MASK))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ctrl &amp; IXGBE_CTRL_RST_MASK) {</div><div class='add'>+		struct ixgbe_adapter *adapter = container_of(hw, struct ixgbe_adapter,</div><div class='add'>+							     hw);</div><div class='add'>+</div><div class='add'>+		err = -EIO;</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Reset polling failed to complete.");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Double resets are required for recovery from certain error</div><div class='add'>+	 * conditions. Between resets, it is necessary to stall to allow time</div><div class='add'>+	 * for any pending HW events to complete.</div><div class='add'>+	 */</div><div class='add'>+	msleep(100);</div><div class='add'>+	if (hw-&gt;mac.flags &amp; IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {</div><div class='add'>+		hw-&gt;mac.flags &amp;= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;</div><div class='add'>+		goto mac_reset_top;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the Rx packet buffer size. */</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), GENMASK(18, 17));</div><div class='add'>+</div><div class='add'>+	/* Store the permanent mac address */</div><div class='add'>+	hw-&gt;mac.ops.get_mac_addr(hw, hw-&gt;mac.perm_addr);</div><div class='add'>+</div><div class='add'>+	/* Maximum number of Receive Address Registers. */</div><div class='add'>+#define IXGBE_MAX_NUM_RAR		128</div><div class='add'>+</div><div class='add'>+	/* Store MAC address from RAR0, clear receive address registers, and</div><div class='add'>+	 * clear the multicast table.  Also reset num_rar_entries to the</div><div class='add'>+	 * maximum number of Receive Address Registers, since we modify this</div><div class='add'>+	 * value when programming the SAN MAC address.</div><div class='add'>+	 */</div><div class='add'>+	hw-&gt;mac.num_rar_entries = IXGBE_MAX_NUM_RAR;</div><div class='add'>+	hw-&gt;mac.ops.init_rx_addrs(hw);</div><div class='add'>+</div><div class='add'>+	/* Initialize bus function number */</div><div class='add'>+	hw-&gt;mac.ops.set_lan_id(hw);</div><div class='add'>+</div><div class='add'>+reset_hw_out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_pfa_module_tlv - Read sub module TLV from NVM PFA</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @module_tlv: pointer to module TLV to return</div><div class='add'>+ * @module_tlv_len: pointer to module TLV length to return</div><div class='add'>+ * @module_type: module type requested</div><div class='add'>+ *</div><div class='add'>+ * Find the requested sub module TLV type from the Preserved Field</div><div class='add'>+ * Area (PFA) and returns the TLV pointer and length. The caller can</div><div class='add'>+ * use these to read the variable length TLV value.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_get_pfa_module_tlv(struct ixgbe_hw *hw, u16 *module_tlv,</div><div class='add'>+				    u16 *module_tlv_len, u16 module_type)</div><div class='add'>+{</div><div class='add'>+	u16 pfa_len, pfa_ptr, pfa_end_ptr;</div><div class='add'>+	u16 next_tlv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_ee_aci_e610(hw, IXGBE_E610_SR_PFA_PTR, &amp;pfa_ptr);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_read_ee_aci_e610(hw, pfa_ptr, &amp;pfa_len);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Starting with first TLV after PFA length, iterate through the list</div><div class='add'>+	 * of TLVs to find the requested one.</div><div class='add'>+	 */</div><div class='add'>+	next_tlv = pfa_ptr + 1;</div><div class='add'>+	pfa_end_ptr = pfa_ptr + pfa_len;</div><div class='add'>+	while (next_tlv &lt; pfa_end_ptr) {</div><div class='add'>+		u16 tlv_sub_module_type, tlv_len;</div><div class='add'>+</div><div class='add'>+		/* Read TLV type */</div><div class='add'>+		err = ixgbe_read_ee_aci_e610(hw, next_tlv,</div><div class='add'>+					     &amp;tlv_sub_module_type);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* Read TLV length */</div><div class='add'>+		err = ixgbe_read_ee_aci_e610(hw, next_tlv + 1, &amp;tlv_len);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (tlv_sub_module_type == module_type) {</div><div class='add'>+			if (tlv_len) {</div><div class='add'>+				*module_tlv = next_tlv;</div><div class='add'>+				*module_tlv_len = tlv_len;</div><div class='add'>+				return 0;</div><div class='add'>+			}</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+		/* Check next TLV, i.e. current TLV pointer + length + 2 words</div><div class='add'>+		 * (for current TLV's type and length).</div><div class='add'>+		 */</div><div class='add'>+		next_tlv = next_tlv + tlv_len + 2;</div><div class='add'>+	}</div><div class='add'>+	/* Module does not exist */</div><div class='add'>+	return -ENODATA;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_read_pba_string_e610 - Read PBA string from NVM</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @pba_num: stores the part number string from the NVM</div><div class='add'>+ * @pba_num_size: part number string buffer length</div><div class='add'>+ *</div><div class='add'>+ * Read the part number string from the NVM.</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_read_pba_string_e610(struct ixgbe_hw *hw, u8 *pba_num,</div><div class='add'>+				      u32 pba_num_size)</div><div class='add'>+{</div><div class='add'>+	u16 pba_tlv, pba_tlv_len;</div><div class='add'>+	u16 pba_word, pba_size;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	*pba_num = '\0';</div><div class='add'>+</div><div class='add'>+	err = ixgbe_get_pfa_module_tlv(hw, &amp;pba_tlv, &amp;pba_tlv_len,</div><div class='add'>+				       IXGBE_E610_SR_PBA_BLOCK_PTR);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* pba_size is the next word */</div><div class='add'>+	err = ixgbe_read_ee_aci_e610(hw, (pba_tlv + 2), &amp;pba_size);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (pba_tlv_len &lt; pba_size)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Subtract one to get PBA word count (PBA Size word is included in</div><div class='add'>+	 * total size).</div><div class='add'>+	 */</div><div class='add'>+	pba_size--;</div><div class='add'>+</div><div class='add'>+	if (pba_num_size &lt; (((u32)pba_size * 2) + 1))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (u16 i = 0; i &lt; pba_size; i++) {</div><div class='add'>+		err = ixgbe_read_ee_aci_e610(hw, (pba_tlv + 2 + 1) + i,</div><div class='add'>+					     &amp;pba_word);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		pba_num[(i * 2)] = FIELD_GET(IXGBE_E610_SR_PBA_BLOCK_MASK,</div><div class='add'>+					     pba_word);</div><div class='add'>+		pba_num[(i * 2) + 1] = pba_word &amp; 0xFF;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pba_num[(pba_size * 2)] = '\0';</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __fwlog_send_cmd(void *priv, struct libie_aq_desc *desc, void *buf,</div><div class='add'>+			    u16 size)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = priv;</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_send_cmd(hw, desc, buf, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ixgbe_fwlog_init(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = hw-&gt;back;</div><div class='add'>+	struct libie_fwlog_api api = {</div><div class='add'>+		.pdev = adapter-&gt;pdev,</div><div class='add'>+		.send_cmd = __fwlog_send_cmd,</div><div class='add'>+		.debugfs_root = adapter-&gt;ixgbe_dbg_adapter,</div><div class='add'>+		.priv = hw,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type != ixgbe_mac_e610)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return libie_fwlog_init(&amp;hw-&gt;fwlog, &amp;api);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ixgbe_fwlog_deinit(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	if (hw-&gt;mac.type != ixgbe_mac_e610)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	libie_fwlog_deinit(&amp;hw-&gt;fwlog);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ixgbe_mac_operations mac_ops_e610 = {</div><div class='add'>+	.init_hw			= ixgbe_init_hw_generic,</div><div class='add'>+	.start_hw			= ixgbe_start_hw_e610,</div><div class='add'>+	.clear_hw_cntrs			= ixgbe_clear_hw_cntrs_generic,</div><div class='add'>+	.enable_rx_dma			= ixgbe_enable_rx_dma_generic,</div><div class='add'>+	.get_mac_addr			= ixgbe_get_mac_addr_generic,</div><div class='add'>+	.get_device_caps		= ixgbe_get_device_caps_generic,</div><div class='add'>+	.stop_adapter			= ixgbe_stop_adapter_generic,</div><div class='add'>+	.set_lan_id			= ixgbe_set_lan_id_multi_port_pcie,</div><div class='add'>+	.set_rxpba			= ixgbe_set_rxpba_generic,</div><div class='add'>+	.check_link			= ixgbe_check_link_e610,</div><div class='add'>+	.blink_led_start		= ixgbe_blink_led_start_X540,</div><div class='add'>+	.blink_led_stop			= ixgbe_blink_led_stop_X540,</div><div class='add'>+	.set_rar			= ixgbe_set_rar_generic,</div><div class='add'>+	.clear_rar			= ixgbe_clear_rar_generic,</div><div class='add'>+	.set_vmdq			= ixgbe_set_vmdq_generic,</div><div class='add'>+	.set_vmdq_san_mac		= ixgbe_set_vmdq_san_mac_generic,</div><div class='add'>+	.clear_vmdq			= ixgbe_clear_vmdq_generic,</div><div class='add'>+	.init_rx_addrs			= ixgbe_init_rx_addrs_generic,</div><div class='add'>+	.update_mc_addr_list		= ixgbe_update_mc_addr_list_generic,</div><div class='add'>+	.enable_mc			= ixgbe_enable_mc_generic,</div><div class='add'>+	.disable_mc			= ixgbe_disable_mc_generic,</div><div class='add'>+	.clear_vfta			= ixgbe_clear_vfta_generic,</div><div class='add'>+	.set_vfta			= ixgbe_set_vfta_generic,</div><div class='add'>+	.fc_enable			= ixgbe_fc_enable_generic,</div><div class='add'>+	.set_fw_drv_ver			= ixgbe_set_fw_drv_ver_x550,</div><div class='add'>+	.init_uta_tables		= ixgbe_init_uta_tables_generic,</div><div class='add'>+	.set_mac_anti_spoofing		= ixgbe_set_mac_anti_spoofing,</div><div class='add'>+	.set_vlan_anti_spoofing		= ixgbe_set_vlan_anti_spoofing,</div><div class='add'>+	.set_source_address_pruning	=</div><div class='add'>+				ixgbe_set_source_address_pruning_x550,</div><div class='add'>+	.set_ethertype_anti_spoofing	=</div><div class='add'>+				ixgbe_set_ethertype_anti_spoofing_x550,</div><div class='add'>+	.disable_rx_buff		= ixgbe_disable_rx_buff_generic,</div><div class='add'>+	.enable_rx_buff			= ixgbe_enable_rx_buff_generic,</div><div class='add'>+	.enable_rx			= ixgbe_enable_rx_generic,</div><div class='add'>+	.disable_rx			= ixgbe_disable_rx_e610,</div><div class='add'>+	.led_on				= ixgbe_led_on_generic,</div><div class='add'>+	.led_off			= ixgbe_led_off_generic,</div><div class='add'>+	.init_led_link_act		= ixgbe_init_led_link_act_generic,</div><div class='add'>+	.reset_hw			= ixgbe_reset_hw_e610,</div><div class='add'>+	.get_fw_ver                     = ixgbe_aci_get_fw_ver,</div><div class='add'>+	.get_media_type			= ixgbe_get_media_type_e610,</div><div class='add'>+	.setup_link			= ixgbe_setup_link_e610,</div><div class='add'>+	.fw_recovery_mode		= ixgbe_fw_recovery_mode_e610,</div><div class='add'>+	.fw_rollback_mode		= ixgbe_fw_rollback_mode_e610,</div><div class='add'>+	.get_nvm_ver			= ixgbe_get_active_nvm_ver,</div><div class='add'>+	.get_link_capabilities		= ixgbe_get_link_capabilities_e610,</div><div class='add'>+	.get_bus_info			= ixgbe_get_bus_info_generic,</div><div class='add'>+	.acquire_swfw_sync		= ixgbe_acquire_swfw_sync_X540,</div><div class='add'>+	.release_swfw_sync		= ixgbe_release_swfw_sync_X540,</div><div class='add'>+	.init_swfw_sync			= ixgbe_init_swfw_sync_X540,</div><div class='add'>+	.prot_autoc_read		= prot_autoc_read_generic,</div><div class='add'>+	.prot_autoc_write		= prot_autoc_write_generic,</div><div class='add'>+	.setup_fc			= ixgbe_setup_fc_e610,</div><div class='add'>+	.fc_autoneg			= ixgbe_fc_autoneg_e610,</div><div class='add'>+	.enable_mdd			= ixgbe_enable_mdd_x550,</div><div class='add'>+	.disable_mdd			= ixgbe_disable_mdd_x550,</div><div class='add'>+	.restore_mdd_vf			= ixgbe_restore_mdd_vf_x550,</div><div class='add'>+	.handle_mdd			= ixgbe_handle_mdd_x550,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ixgbe_phy_operations phy_ops_e610 = {</div><div class='add'>+	.init				= ixgbe_init_phy_ops_e610,</div><div class='add'>+	.identify			= ixgbe_identify_phy_e610,</div><div class='add'>+	.identify_sfp			= ixgbe_identify_module_e610,</div><div class='add'>+	.setup_link_speed		= ixgbe_setup_phy_link_speed_generic,</div><div class='add'>+	.setup_link			= ixgbe_setup_phy_link_e610,</div><div class='add'>+	.enter_lplu			= ixgbe_enter_lplu_e610,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ixgbe_eeprom_operations eeprom_ops_e610 = {</div><div class='add'>+	.read				= ixgbe_read_ee_aci_e610,</div><div class='add'>+	.read_buffer			= ixgbe_read_ee_aci_buffer_e610,</div><div class='add'>+	.validate_checksum		= ixgbe_validate_eeprom_checksum_e610,</div><div class='add'>+	.read_pba_string		= ixgbe_read_pba_string_e610,</div><div class='add'>+	.init_params			= ixgbe_init_eeprom_params_e610,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct ixgbe_info ixgbe_e610_info = {</div><div class='add'>+	.mac			= ixgbe_mac_e610,</div><div class='add'>+	.get_invariants		= ixgbe_get_invariants_X540,</div><div class='add'>+	.mac_ops		= &amp;mac_ops_e610,</div><div class='add'>+	.eeprom_ops		= &amp;eeprom_ops_e610,</div><div class='add'>+	.phy_ops		= &amp;phy_ops_e610,</div><div class='add'>+	.mbx_ops		= &amp;mbx_ops_generic,</div><div class='add'>+	.mvals			= ixgbe_mvals_x550em_a,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h<br/>new file mode 100644<br/>index 000000000000..11916b979d28<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _IXGBE_E610_H_</div><div class='add'>+#define _IXGBE_E610_H_</div><div class='add'>+</div><div class='add'>+#include "ixgbe_type.h"</div><div class='add'>+</div><div class='add'>+int ixgbe_aci_send_cmd(struct ixgbe_hw *hw, struct libie_aq_desc *desc,</div><div class='add'>+		       void *buf, u16 buf_size);</div><div class='add'>+bool ixgbe_aci_check_event_pending(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_aci_get_event(struct ixgbe_hw *hw, struct ixgbe_aci_event *e,</div><div class='add'>+			bool *pending);</div><div class='add'>+void ixgbe_fill_dflt_direct_cmd_desc(struct libie_aq_desc *desc, u16 opcode);</div><div class='add'>+int ixgbe_acquire_res(struct ixgbe_hw *hw, enum libie_aq_res_id res,</div><div class='add'>+		      enum libie_aq_res_access_type access, u32 timeout);</div><div class='add'>+void ixgbe_release_res(struct ixgbe_hw *hw, enum libie_aq_res_id res);</div><div class='add'>+int ixgbe_aci_list_caps(struct ixgbe_hw *hw, void *buf, u16 buf_size,</div><div class='add'>+			u32 *cap_count, enum ixgbe_aci_opc opc);</div><div class='add'>+int ixgbe_discover_dev_caps(struct ixgbe_hw *hw,</div><div class='add'>+			    struct ixgbe_hw_dev_caps *dev_caps);</div><div class='add'>+int ixgbe_discover_func_caps(struct ixgbe_hw *hw,</div><div class='add'>+			     struct ixgbe_hw_func_caps *func_caps);</div><div class='add'>+int ixgbe_get_caps(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_aci_disable_rxen(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_aci_get_phy_caps(struct ixgbe_hw *hw, bool qual_mods, u8 report_mode,</div><div class='add'>+			   struct ixgbe_aci_cmd_get_phy_caps_data *pcaps);</div><div class='add'>+void ixgbe_copy_phy_caps_to_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps,</div><div class='add'>+				struct ixgbe_aci_cmd_set_phy_cfg_data *cfg);</div><div class='add'>+int ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw,</div><div class='add'>+			  struct ixgbe_aci_cmd_set_phy_cfg_data *cfg);</div><div class='add'>+int ixgbe_aci_set_link_restart_an(struct ixgbe_hw *hw, bool ena_link);</div><div class='add'>+int ixgbe_update_link_info(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_get_link_status(struct ixgbe_hw *hw, bool *link_up);</div><div class='add'>+int ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse,</div><div class='add'>+			    struct ixgbe_link_status *link);</div><div class='add'>+int ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask);</div><div class='add'>+int ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask);</div><div class='add'>+int ixgbe_aci_set_port_id_led(struct ixgbe_hw *hw, bool orig_mode);</div><div class='add'>+enum ixgbe_media_type ixgbe_get_media_type_e610(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_setup_link_e610(struct ixgbe_hw *hw, ixgbe_link_speed speed,</div><div class='add'>+			  bool autoneg_wait);</div><div class='add'>+int ixgbe_check_link_e610(struct ixgbe_hw *hw, ixgbe_link_speed *speed,</div><div class='add'>+			  bool *link_up, bool link_up_wait_to_complete);</div><div class='add'>+int ixgbe_get_link_capabilities_e610(struct ixgbe_hw *hw,</div><div class='add'>+				     ixgbe_link_speed *speed,</div><div class='add'>+				     bool *autoneg);</div><div class='add'>+int ixgbe_cfg_phy_fc(struct ixgbe_hw *hw,</div><div class='add'>+		     struct ixgbe_aci_cmd_set_phy_cfg_data *cfg,</div><div class='add'>+		     enum ixgbe_fc_mode req_mode);</div><div class='add'>+int ixgbe_setup_fc_e610(struct ixgbe_hw *hw);</div><div class='add'>+void ixgbe_fc_autoneg_e610(struct ixgbe_hw *hw);</div><div class='add'>+void ixgbe_disable_rx_e610(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_init_phy_ops_e610(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_identify_phy_e610(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_identify_module_e610(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_setup_phy_link_e610(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_set_phy_power_e610(struct ixgbe_hw *hw, bool on);</div><div class='add'>+int ixgbe_enter_lplu_e610(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_init_eeprom_params_e610(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw,</div><div class='add'>+			       struct ixgbe_aci_cmd_get_link_topo *cmd,</div><div class='add'>+			       u8 *node_part_number, u16 *node_handle);</div><div class='add'>+int ixgbe_acquire_nvm(struct ixgbe_hw *hw,</div><div class='add'>+		      enum libie_aq_res_access_type access);</div><div class='add'>+void ixgbe_release_nvm(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset,</div><div class='add'>+		       u16 length, void *data, bool last_command,</div><div class='add'>+		       bool read_shadow_ram);</div><div class='add'>+int ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_get_inactive_orom_ver(struct ixgbe_hw *hw,</div><div class='add'>+				struct ixgbe_orom_info *orom);</div><div class='add'>+int ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);</div><div class='add'>+int ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw,</div><div class='add'>+				   struct ixgbe_netlist_info *netlist);</div><div class='add'>+int ixgbe_read_sr_word_aci(struct ixgbe_hw  *hw, u16 offset, u16 *data);</div><div class='add'>+int ixgbe_read_flat_nvm(struct ixgbe_hw  *hw, u32 offset, u32 *length,</div><div class='add'>+			u8 *data, bool read_shadow_ram);</div><div class='add'>+int ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words,</div><div class='add'>+			  u16 *data);</div><div class='add'>+int ixgbe_read_ee_aci_e610(struct ixgbe_hw *hw, u16 offset, u16 *data);</div><div class='add'>+int ixgbe_read_ee_aci_buffer_e610(struct ixgbe_hw *hw, u16 offset,</div><div class='add'>+				  u16 words, u16 *data);</div><div class='add'>+int ixgbe_validate_eeprom_checksum_e610(struct ixgbe_hw *hw, u16 *checksum_val);</div><div class='add'>+int ixgbe_reset_hw_e610(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_get_flash_data(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_aci_nvm_update_empr(struct ixgbe_hw *hw);</div><div class='add'>+int ixgbe_nvm_set_pkg_data(struct ixgbe_hw *hw, bool del_pkg_data_flag,</div><div class='add'>+			   u8 *data, u16 length);</div><div class='add'>+int ixgbe_nvm_pass_component_tbl(struct ixgbe_hw *hw, u8 *data, u16 length,</div><div class='add'>+				 u8 transfer_flag, u8 *comp_response,</div><div class='add'>+				 u8 *comp_response_code);</div><div class='add'>+int ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid);</div><div class='add'>+int ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid,</div><div class='add'>+			 u32 offset, u16 length, void *data,</div><div class='add'>+			 bool last_command, u8 command_flags);</div><div class='add'>+int ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags,</div><div class='add'>+			     u8 *response_flags);</div><div class='add'>+int ixgbe_fwlog_init(struct ixgbe_hw *hw);</div><div class='add'>+void ixgbe_fwlog_deinit(struct ixgbe_hw *hw);</div><div class='add'>+</div><div class='add'>+#endif /* _IXGBE_E610_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c<br/>index 9482e0cca8b7..2ad81f687a84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> /* ethtool support for ixgbe */</div><div class='ctx'> </div><div class='hunk'>@@ -213,7 +213,7 @@ static void ixgbe_set_advertising_10gtypes(struct ixgbe_hw *hw,</div><div class='ctx'> static int ixgbe_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 				    struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	ixgbe_link_speed supported_link;</div><div class='ctx'> 	bool autoneg = false;</div><div class='hunk'>@@ -458,7 +458,7 @@ static int ixgbe_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> static int ixgbe_set_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 				    const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 advertised, old;</div><div class='ctx'> 	int err = 0;</div><div class='hunk'>@@ -535,7 +535,7 @@ static int ixgbe_set_link_ksettings(struct net_device *netdev,</div><div class='ctx'> static void ixgbe_get_pause_stats(struct net_device *netdev,</div><div class='ctx'> 				  struct ethtool_pause_stats *stats)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw_stats *hwstats = &amp;adapter-&gt;stats;</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;tx_pause_frames = hwstats-&gt;lxontxc + hwstats-&gt;lxofftxc;</div><div class='hunk'>@@ -545,7 +545,7 @@ static void ixgbe_get_pause_stats(struct net_device *netdev,</div><div class='ctx'> static void ixgbe_get_pauseparam(struct net_device *netdev,</div><div class='ctx'> 				 struct ethtool_pauseparam *pause)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	if (ixgbe_device_supports_autoneg_fc(hw) &amp;&amp;</div><div class='hunk'>@@ -564,10 +564,26 @@ static void ixgbe_get_pauseparam(struct net_device *netdev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ixgbe_set_pauseparam_finalize(struct net_device *netdev,</div><div class='add'>+					  struct ixgbe_fc_info *fc)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	/* If the thing changed then we'll update and use new autoneg. */</div><div class='add'>+	if (memcmp(fc, &amp;hw-&gt;fc, sizeof(*fc))) {</div><div class='add'>+		hw-&gt;fc = *fc;</div><div class='add'>+		if (netif_running(netdev))</div><div class='add'>+			ixgbe_reinit_locked(adapter);</div><div class='add'>+		else</div><div class='add'>+			ixgbe_reset(adapter);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ixgbe_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> 				struct ethtool_pauseparam *pause)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct ixgbe_fc_info fc = hw-&gt;fc;</div><div class='ctx'> </div><div class='hunk'>@@ -592,27 +608,52 @@ static int ixgbe_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> 	else</div><div class='ctx'> 		fc.requested_mode = ixgbe_fc_none;</div><div class='ctx'> </div><div class='del'>-	/* if the thing changed then we'll update and use new autoneg */</div><div class='del'>-	if (memcmp(&amp;fc, &amp;hw-&gt;fc, sizeof(struct ixgbe_fc_info))) {</div><div class='del'>-		hw-&gt;fc = fc;</div><div class='del'>-		if (netif_running(netdev))</div><div class='del'>-			ixgbe_reinit_locked(adapter);</div><div class='del'>-		else</div><div class='del'>-			ixgbe_reset(adapter);</div><div class='add'>+	ixgbe_set_pauseparam_finalize(netdev, &amp;fc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ixgbe_set_pauseparam_e610(struct net_device *netdev,</div><div class='add'>+				     struct ethtool_pauseparam *pause)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct ixgbe_fc_info fc = hw-&gt;fc;</div><div class='add'>+</div><div class='add'>+	if (!ixgbe_device_supports_autoneg_fc(hw))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (pause-&gt;autoneg == AUTONEG_DISABLE) {</div><div class='add'>+		netdev_info(netdev,</div><div class='add'>+			    "Cannot disable autonegotiation on this device.\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	fc.disable_fc_autoneg = false;</div><div class='add'>+</div><div class='add'>+	if (pause-&gt;rx_pause &amp;&amp; pause-&gt;tx_pause)</div><div class='add'>+		fc.requested_mode = ixgbe_fc_full;</div><div class='add'>+	else if (pause-&gt;rx_pause)</div><div class='add'>+		fc.requested_mode = ixgbe_fc_rx_pause;</div><div class='add'>+	else if (pause-&gt;tx_pause)</div><div class='add'>+		fc.requested_mode = ixgbe_fc_tx_pause;</div><div class='add'>+	else</div><div class='add'>+		fc.requested_mode = ixgbe_fc_none;</div><div class='add'>+</div><div class='add'>+	ixgbe_set_pauseparam_finalize(netdev, &amp;fc);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 ixgbe_get_msglevel(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	return adapter-&gt;msg_enable;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	adapter-&gt;msg_enable = data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -627,7 +668,7 @@ static int ixgbe_get_regs_len(struct net_device *netdev)</div><div class='ctx'> static void ixgbe_get_regs(struct net_device *netdev,</div><div class='ctx'> 			   struct ethtool_regs *regs, void *p)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 *regs_buff = p;</div><div class='ctx'> 	u8 i;</div><div class='hunk'>@@ -690,6 +731,7 @@ static void ixgbe_get_regs(struct net_device *netdev,</div><div class='ctx'> 		case ixgbe_mac_X550:</div><div class='ctx'> 		case ixgbe_mac_X550EM_x:</div><div class='ctx'> 		case ixgbe_mac_x550em_a:</div><div class='add'>+		case ixgbe_mac_e610:</div><div class='ctx'> 			regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));</div><div class='ctx'> 			regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -991,16 +1033,24 @@ static void ixgbe_get_regs(struct net_device *netdev,</div><div class='ctx'> 	regs_buff[1144] = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ixgbe_get_link_ext_stats(struct net_device *netdev,</div><div class='add'>+				     struct ethtool_link_ext_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='add'>+</div><div class='add'>+	stats-&gt;link_down_events = adapter-&gt;link_down_events;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ixgbe_get_eeprom_len(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	return adapter-&gt;hw.eeprom.word_size * 2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_get_eeprom(struct net_device *netdev,</div><div class='ctx'> 			    struct ethtool_eeprom *eeprom, u8 *bytes)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u16 *eeprom_buff;</div><div class='ctx'> 	int first_word, last_word, eeprom_len;</div><div class='hunk'>@@ -1036,7 +1086,7 @@ static int ixgbe_get_eeprom(struct net_device *netdev,</div><div class='ctx'> static int ixgbe_set_eeprom(struct net_device *netdev,</div><div class='ctx'> 			    struct ethtool_eeprom *eeprom, u8 *bytes)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u16 *eeprom_buff;</div><div class='ctx'> 	void *ptr;</div><div class='hunk'>@@ -1103,10 +1153,22 @@ err:</div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	ixgbe_get_flash_data(hw);</div><div class='add'>+	ixgbe_set_fw_version_e610(adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ixgbe_get_drvinfo(struct net_device *netdev,</div><div class='ctx'> 			      struct ethtool_drvinfo *drvinfo)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='add'>+</div><div class='add'>+	/* need to refresh info for e610 in case fw reloads in runtime */</div><div class='add'>+	if (adapter-&gt;hw.mac.type == ixgbe_mac_e610)</div><div class='add'>+		ixgbe_refresh_fw_version(adapter);</div><div class='ctx'> </div><div class='ctx'> 	strscpy(drvinfo-&gt;driver, ixgbe_driver_name, sizeof(drvinfo-&gt;driver));</div><div class='ctx'> </div><div class='hunk'>@@ -1160,7 +1222,7 @@ static void ixgbe_get_ringparam(struct net_device *netdev,</div><div class='ctx'> 				struct kernel_ethtool_ringparam *kernel_ring,</div><div class='ctx'> 				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_ring *tx_ring = adapter-&gt;tx_ring[0];</div><div class='ctx'> 	struct ixgbe_ring *rx_ring = adapter-&gt;rx_ring[0];</div><div class='ctx'> </div><div class='hunk'>@@ -1175,7 +1237,7 @@ static int ixgbe_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 			       struct kernel_ethtool_ringparam *kernel_ring,</div><div class='ctx'> 			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_ring *temp_ring;</div><div class='ctx'> 	int i, j, err = 0;</div><div class='ctx'> 	u32 new_rx_count, new_tx_count;</div><div class='hunk'>@@ -1216,7 +1278,7 @@ static int ixgbe_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 	/* allocate temporary buffer to store rings in */</div><div class='ctx'> 	i = max_t(int, adapter-&gt;num_tx_queues + adapter-&gt;num_xdp_queues,</div><div class='ctx'> 		  adapter-&gt;num_rx_queues);</div><div class='del'>-	temp_ring = vmalloc(array_size(i, sizeof(struct ixgbe_ring)));</div><div class='add'>+	temp_ring = vmalloc_array(i, sizeof(struct ixgbe_ring));</div><div class='ctx'> </div><div class='ctx'> 	if (!temp_ring) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -1335,7 +1397,7 @@ static int ixgbe_get_sset_count(struct net_device *netdev, int sset)</div><div class='ctx'> static void ixgbe_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 				    struct ethtool_stats *stats, u64 *data)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct rtnl_link_stats64 temp;</div><div class='ctx'> 	const struct rtnl_link_stats64 *net_stats;</div><div class='ctx'> 	unsigned int start;</div><div class='hunk'>@@ -1613,6 +1675,7 @@ static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		toggle = 0x7FFFF30F;</div><div class='ctx'> 		test = reg_test_82599;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1708,7 +1771,7 @@ static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)</div><div class='ctx'> static irqreturn_t ixgbe_test_intr(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = (struct net_device *) data;</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;test_icr |= IXGBE_READ_REG(&amp;adapter-&gt;hw, IXGBE_EICR);</div><div class='ctx'> </div><div class='hunk'>@@ -1874,6 +1937,7 @@ static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		reg_data = IXGBE_READ_REG(&amp;adapter-&gt;hw, IXGBE_DMATXCTL);</div><div class='ctx'> 		reg_data |= IXGBE_DMATXCTL_TE;</div><div class='ctx'> 		IXGBE_WRITE_REG(&amp;adapter-&gt;hw, IXGBE_DMATXCTL, reg_data);</div><div class='hunk'>@@ -1935,6 +1999,7 @@ static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);</div><div class='ctx'> 		reg_data |= IXGBE_MACC_FLU;</div><div class='ctx'> 		IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);</div><div class='hunk'>@@ -2179,7 +2244,7 @@ out:</div><div class='ctx'> static void ixgbe_diag_test(struct net_device *netdev,</div><div class='ctx'> 			    struct ethtool_test *eth_test, u64 *data)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	bool if_running = netif_running(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (ixgbe_removed(adapter-&gt;hw.hw_addr)) {</div><div class='hunk'>@@ -2302,7 +2367,7 @@ static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,</div><div class='ctx'> static void ixgbe_get_wol(struct net_device *netdev,</div><div class='ctx'> 			  struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	wol-&gt;supported = WAKE_UCAST | WAKE_MCAST |</div><div class='ctx'> 			 WAKE_BCAST | WAKE_MAGIC;</div><div class='hunk'>@@ -2324,7 +2389,7 @@ static void ixgbe_get_wol(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (wol-&gt;wolopts &amp; (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE |</div><div class='ctx'> 			    WAKE_FILTER))</div><div class='hunk'>@@ -2349,9 +2414,53 @@ static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ixgbe_set_wol_acpi(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u32 grc;</div><div class='add'>+</div><div class='add'>+	if (ixgbe_wol_exclusion(adapter, wol))</div><div class='add'>+		return wol-&gt;wolopts ? -EOPNOTSUPP : 0;</div><div class='add'>+</div><div class='add'>+	/* disable APM wakeup */</div><div class='add'>+	grc = IXGBE_READ_REG(hw, IXGBE_GRC_X550EM_a);</div><div class='add'>+	grc &amp;= ~IXGBE_GRC_APME;</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_GRC_X550EM_a, grc);</div><div class='add'>+</div><div class='add'>+	/* erase existing filters */</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);</div><div class='add'>+	adapter-&gt;wol = 0;</div><div class='add'>+</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_UCAST)</div><div class='add'>+		adapter-&gt;wol |= IXGBE_WUFC_EX;</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_MCAST)</div><div class='add'>+		adapter-&gt;wol |= IXGBE_WUFC_MC;</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_BCAST)</div><div class='add'>+		adapter-&gt;wol |= IXGBE_WUFC_BC;</div><div class='add'>+</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_WUC, IXGBE_WUC_PME_EN);</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter-&gt;wol);</div><div class='add'>+</div><div class='add'>+	hw-&gt;wol_enabled = adapter-&gt;wol;</div><div class='add'>+	device_set_wakeup_enable(&amp;adapter-&gt;pdev-&gt;dev, adapter-&gt;wol);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ixgbe_set_wol_e610(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	if (wol-&gt;wolopts &amp; (WAKE_UCAST | WAKE_MCAST | WAKE_BCAST))</div><div class='add'>+		return ixgbe_set_wol_acpi(netdev, wol);</div><div class='add'>+	else</div><div class='add'>+		return ixgbe_set_wol(netdev, wol);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ixgbe_nway_reset(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		ixgbe_reinit_locked(adapter);</div><div class='hunk'>@@ -2362,7 +2471,7 @@ static int ixgbe_nway_reset(struct net_device *netdev)</div><div class='ctx'> static int ixgbe_set_phys_id(struct net_device *netdev,</div><div class='ctx'> 			     enum ethtool_phys_id_state state)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	if (!hw-&gt;mac.ops.led_on || !hw-&gt;mac.ops.led_off)</div><div class='hunk'>@@ -2390,12 +2499,32 @@ static int ixgbe_set_phys_id(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ixgbe_set_phys_id_e610(struct net_device *netdev,</div><div class='add'>+				  enum ethtool_phys_id_state state)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='add'>+	bool led_active;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ETHTOOL_ID_ACTIVE:</div><div class='add'>+		led_active = true;</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_ID_INACTIVE:</div><div class='add'>+		led_active = false;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_set_port_id_led(&amp;adapter-&gt;hw, !led_active);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ixgbe_get_coalesce(struct net_device *netdev,</div><div class='ctx'> 			      struct ethtool_coalesce *ec,</div><div class='ctx'> 			      struct kernel_ethtool_coalesce *kernel_coal,</div><div class='ctx'> 			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* only valid if in constant ITR mode */</div><div class='ctx'> 	if (adapter-&gt;rx_itr_setting &lt;= 1)</div><div class='hunk'>@@ -2451,7 +2580,7 @@ static int ixgbe_set_coalesce(struct net_device *netdev,</div><div class='ctx'> 			      struct kernel_ethtool_coalesce *kernel_coal,</div><div class='ctx'> 			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_q_vector *q_vector;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u16 tx_itr_param, rx_itr_param, tx_itr_prev;</div><div class='hunk'>@@ -2624,9 +2753,11 @@ static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,</div><div class='del'>-				   struct ethtool_rxnfc *cmd)</div><div class='add'>+static int ixgbe_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='add'>+</div><div class='ctx'> 	cmd-&gt;data = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Report default options for RSS on ixgbe */</div><div class='hunk'>@@ -2674,18 +2805,21 @@ static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		return 64;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 ixgbe_get_rx_ring_count(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='add'>+</div><div class='add'>+	return min_t(u32, adapter-&gt;num_rx_queues,</div><div class='add'>+		     ixgbe_rss_indir_tbl_max(adapter));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 			   u32 *rule_locs)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	int ret = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = min_t(int, adapter-&gt;num_rx_queues,</div><div class='del'>-				  ixgbe_rss_indir_tbl_max(adapter));</div><div class='del'>-		ret = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		cmd-&gt;rule_cnt = adapter-&gt;fdir_filter_count;</div><div class='ctx'> 		ret = 0;</div><div class='hunk'>@@ -2696,9 +2830,6 @@ static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLALL:</div><div class='ctx'> 		ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ret = ixgbe_get_rss_hash_opts(adapter, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2950,9 +3081,11 @@ static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \</div><div class='ctx'> 		       IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)</div><div class='del'>-static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,</div><div class='del'>-				  struct ethtool_rxnfc *nfc)</div><div class='add'>+static int ixgbe_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	u32 flags2 = adapter-&gt;flags2;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -3065,7 +3198,7 @@ static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	int ret = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='hunk'>@@ -3075,9 +3208,6 @@ static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLDEL:</div><div class='ctx'> 		ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = ixgbe_set_rss_hash_opt(adapter, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3092,7 +3222,7 @@ static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> static u32 ixgbe_rss_indir_size(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return ixgbe_rss_indir_tbl_entries(adapter);</div><div class='ctx'> }</div><div class='hunk'>@@ -3112,7 +3242,7 @@ static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir)</div><div class='ctx'> static int ixgbe_get_rxfh(struct net_device *netdev,</div><div class='ctx'> 			  struct ethtool_rxfh_param *rxfh)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='ctx'> </div><div class='hunk'>@@ -3130,7 +3260,7 @@ static int ixgbe_set_rxfh(struct net_device *netdev,</div><div class='ctx'> 			  struct ethtool_rxfh_param *rxfh,</div><div class='ctx'> 			  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -3172,7 +3302,7 @@ static int ixgbe_set_rxfh(struct net_device *netdev,</div><div class='ctx'> static int ixgbe_get_ts_info(struct net_device *dev,</div><div class='ctx'> 			     struct kernel_ethtool_ts_info *info)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* we always support timestamping disabled */</div><div class='ctx'> 	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_NONE);</div><div class='hunk'>@@ -3181,6 +3311,7 @@ static int ixgbe_get_ts_info(struct net_device *dev,</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		info-&gt;rx_filters |= BIT(HWTSTAMP_FILTER_ALL);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ixgbe_mac_X540:</div><div class='hunk'>@@ -3247,7 +3378,7 @@ static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter)</div><div class='ctx'> static void ixgbe_get_channels(struct net_device *dev,</div><div class='ctx'> 			       struct ethtool_channels *ch)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* report maximum channels */</div><div class='ctx'> 	ch-&gt;max_combined = ixgbe_max_channels(adapter);</div><div class='hunk'>@@ -3284,7 +3415,7 @@ static void ixgbe_get_channels(struct net_device *dev,</div><div class='ctx'> static int ixgbe_set_channels(struct net_device *dev,</div><div class='ctx'> 			      struct ethtool_channels *ch)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	unsigned int count = ch-&gt;combined_count;</div><div class='ctx'> 	u8 max_rss_indices = ixgbe_max_rss_indices(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -3322,7 +3453,7 @@ static int ixgbe_set_channels(struct net_device *dev,</div><div class='ctx'> static int ixgbe_get_module_info(struct net_device *dev,</div><div class='ctx'> 				       struct ethtool_modinfo *modinfo)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u8 sff8472_rev, addr_mode;</div><div class='ctx'> 	bool page_swap = false;</div><div class='hunk'>@@ -3368,7 +3499,7 @@ static int ixgbe_get_module_eeprom(struct net_device *dev,</div><div class='ctx'> 					 struct ethtool_eeprom *ee,</div><div class='ctx'> 					 u8 *data)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	int status = -EFAULT;</div><div class='ctx'> 	u8 databyte = 0xFF;</div><div class='hunk'>@@ -3443,13 +3574,13 @@ ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_keee *edata)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(ixgbe_ls_map); ++i) {</div><div class='ctx'> 		if (hw-&gt;phy.eee_speeds_supported &amp; ixgbe_ls_map[i].mac_speed)</div><div class='del'>-			linkmode_set_bit(ixgbe_lp_map[i].link_mode,</div><div class='add'>+			linkmode_set_bit(ixgbe_ls_map[i].link_mode,</div><div class='ctx'> 					 edata-&gt;supported);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(ixgbe_ls_map); ++i) {</div><div class='ctx'> 		if (hw-&gt;phy.eee_speeds_advertised &amp; ixgbe_ls_map[i].mac_speed)</div><div class='del'>-			linkmode_set_bit(ixgbe_lp_map[i].link_mode,</div><div class='add'>+			linkmode_set_bit(ixgbe_ls_map[i].link_mode,</div><div class='ctx'> 					 edata-&gt;advertised);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3464,7 +3595,7 @@ ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_keee *edata)</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_keee *edata)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	if (!(adapter-&gt;flags2 &amp; IXGBE_FLAG2_EEE_CAPABLE))</div><div class='hunk'>@@ -3478,7 +3609,7 @@ static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_keee *edata)</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_keee *edata)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct ethtool_keee eee_data;</div><div class='ctx'> 	int ret_val;</div><div class='hunk'>@@ -3533,7 +3664,7 @@ static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_keee *edata)</div><div class='ctx'> </div><div class='ctx'> static u32 ixgbe_get_priv_flags(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	u32 priv_flags = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;flags2 &amp; IXGBE_FLAG2_RX_LEGACY)</div><div class='hunk'>@@ -3550,7 +3681,7 @@ static u32 ixgbe_get_priv_flags(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	unsigned int flags2 = adapter-&gt;flags2;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='hunk'>@@ -3597,6 +3728,7 @@ static const struct ethtool_ops ixgbe_ethtool_ops = {</div><div class='ctx'> 	.set_wol                = ixgbe_set_wol,</div><div class='ctx'> 	.nway_reset             = ixgbe_nway_reset,</div><div class='ctx'> 	.get_link               = ethtool_op_get_link,</div><div class='add'>+	.get_link_ext_stats	= ixgbe_get_link_ext_stats,</div><div class='ctx'> 	.get_eeprom_len         = ixgbe_get_eeprom_len,</div><div class='ctx'> 	.get_eeprom             = ixgbe_get_eeprom,</div><div class='ctx'> 	.set_eeprom             = ixgbe_set_eeprom,</div><div class='hunk'>@@ -3614,12 +3746,64 @@ static const struct ethtool_ops ixgbe_ethtool_ops = {</div><div class='ctx'> 	.get_ethtool_stats      = ixgbe_get_ethtool_stats,</div><div class='ctx'> 	.get_coalesce           = ixgbe_get_coalesce,</div><div class='ctx'> 	.set_coalesce           = ixgbe_set_coalesce,</div><div class='add'>+	.get_rx_ring_count	= ixgbe_get_rx_ring_count,</div><div class='add'>+	.get_rxnfc		= ixgbe_get_rxnfc,</div><div class='add'>+	.set_rxnfc		= ixgbe_set_rxnfc,</div><div class='add'>+	.get_rxfh_indir_size	= ixgbe_rss_indir_size,</div><div class='add'>+	.get_rxfh_key_size	= ixgbe_get_rxfh_key_size,</div><div class='add'>+	.get_rxfh		= ixgbe_get_rxfh,</div><div class='add'>+	.set_rxfh		= ixgbe_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= ixgbe_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= ixgbe_set_rxfh_fields,</div><div class='add'>+	.get_eee		= ixgbe_get_eee,</div><div class='add'>+	.set_eee		= ixgbe_set_eee,</div><div class='add'>+	.get_channels		= ixgbe_get_channels,</div><div class='add'>+	.set_channels		= ixgbe_set_channels,</div><div class='add'>+	.get_priv_flags		= ixgbe_get_priv_flags,</div><div class='add'>+	.set_priv_flags		= ixgbe_set_priv_flags,</div><div class='add'>+	.get_ts_info		= ixgbe_get_ts_info,</div><div class='add'>+	.get_module_info	= ixgbe_get_module_info,</div><div class='add'>+	.get_module_eeprom	= ixgbe_get_module_eeprom,</div><div class='add'>+	.get_link_ksettings     = ixgbe_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings     = ixgbe_set_link_ksettings,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops ixgbe_ethtool_ops_e610 = {</div><div class='add'>+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS,</div><div class='add'>+	.get_drvinfo            = ixgbe_get_drvinfo,</div><div class='add'>+	.get_regs_len           = ixgbe_get_regs_len,</div><div class='add'>+	.get_regs               = ixgbe_get_regs,</div><div class='add'>+	.get_wol                = ixgbe_get_wol,</div><div class='add'>+	.set_wol                = ixgbe_set_wol_e610,</div><div class='add'>+	.nway_reset             = ixgbe_nway_reset,</div><div class='add'>+	.get_link               = ethtool_op_get_link,</div><div class='add'>+	.get_link_ext_stats	= ixgbe_get_link_ext_stats,</div><div class='add'>+	.get_eeprom_len         = ixgbe_get_eeprom_len,</div><div class='add'>+	.get_eeprom             = ixgbe_get_eeprom,</div><div class='add'>+	.set_eeprom             = ixgbe_set_eeprom,</div><div class='add'>+	.get_ringparam          = ixgbe_get_ringparam,</div><div class='add'>+	.set_ringparam          = ixgbe_set_ringparam,</div><div class='add'>+	.get_pause_stats	= ixgbe_get_pause_stats,</div><div class='add'>+	.get_pauseparam         = ixgbe_get_pauseparam,</div><div class='add'>+	.set_pauseparam         = ixgbe_set_pauseparam_e610,</div><div class='add'>+	.get_msglevel           = ixgbe_get_msglevel,</div><div class='add'>+	.set_msglevel           = ixgbe_set_msglevel,</div><div class='add'>+	.self_test              = ixgbe_diag_test,</div><div class='add'>+	.get_strings            = ixgbe_get_strings,</div><div class='add'>+	.set_phys_id            = ixgbe_set_phys_id_e610,</div><div class='add'>+	.get_sset_count         = ixgbe_get_sset_count,</div><div class='add'>+	.get_ethtool_stats      = ixgbe_get_ethtool_stats,</div><div class='add'>+	.get_coalesce           = ixgbe_get_coalesce,</div><div class='add'>+	.set_coalesce           = ixgbe_set_coalesce,</div><div class='add'>+	.get_rx_ring_count	= ixgbe_get_rx_ring_count,</div><div class='ctx'> 	.get_rxnfc		= ixgbe_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= ixgbe_set_rxnfc,</div><div class='ctx'> 	.get_rxfh_indir_size	= ixgbe_rss_indir_size,</div><div class='ctx'> 	.get_rxfh_key_size	= ixgbe_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh		= ixgbe_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= ixgbe_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= ixgbe_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= ixgbe_set_rxfh_fields,</div><div class='ctx'> 	.get_eee		= ixgbe_get_eee,</div><div class='ctx'> 	.set_eee		= ixgbe_set_eee,</div><div class='ctx'> 	.get_channels		= ixgbe_get_channels,</div><div class='hunk'>@@ -3635,5 +3819,10 @@ static const struct ethtool_ops ixgbe_ethtool_ops = {</div><div class='ctx'> </div><div class='ctx'> void ixgbe_set_ethtool_ops(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	netdev-&gt;ethtool_ops = &amp;ixgbe_ethtool_ops;</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;hw.mac.type == ixgbe_mac_e610)</div><div class='add'>+		netdev-&gt;ethtool_ops = &amp;ixgbe_ethtool_ops_e610;</div><div class='add'>+	else</div><div class='add'>+		netdev-&gt;ethtool_ops = &amp;ixgbe_ethtool_ops;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c<br/>index 955dced844a9..011fda9c6193 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c</a></div><div class='hunk'>@@ -56,7 +56,7 @@ int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid)</div><div class='ctx'> 	if (xid &gt;= netdev-&gt;fcoe_ddp_xid)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	adapter = netdev_priv(netdev);</div><div class='add'>+	adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	fcoe = &amp;adapter-&gt;fcoe;</div><div class='ctx'> 	ddp = &amp;fcoe-&gt;ddp[xid];</div><div class='ctx'> 	if (!ddp-&gt;udl)</div><div class='hunk'>@@ -153,7 +153,7 @@ static int ixgbe_fcoe_ddp_setup(struct net_device *netdev, u16 xid,</div><div class='ctx'> 	if (!netdev || !sgl)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	adapter = netdev_priv(netdev);</div><div class='add'>+	adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	if (xid &gt;= netdev-&gt;fcoe_ddp_xid) {</div><div class='ctx'> 		e_warn(drv, "xid=0x%x out-of-range\n", xid);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -744,7 +744,7 @@ void ixgbe_free_fcoe_ddp_resources(struct ixgbe_adapter *adapter)</div><div class='ctx'>  * ixgbe_setup_fcoe_ddp_resources - setup all fcoe ddp context resources</div><div class='ctx'>  * @adapter: ixgbe adapter</div><div class='ctx'>  *</div><div class='del'>- * Sets up ddp context resouces</div><div class='add'>+ * Sets up ddp context resources</div><div class='ctx'>  *</div><div class='ctx'>  * Returns : 0 indicates success or -EINVAL on failure</div><div class='ctx'>  */</div><div class='hunk'>@@ -834,7 +834,7 @@ static void ixgbe_fcoe_ddp_disable(struct ixgbe_adapter *adapter)</div><div class='ctx'>  */</div><div class='ctx'> int ixgbe_fcoe_enable(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_fcoe *fcoe = &amp;adapter-&gt;fcoe;</div><div class='ctx'> </div><div class='ctx'> 	atomic_inc(&amp;fcoe-&gt;refcnt);</div><div class='hunk'>@@ -881,7 +881,7 @@ int ixgbe_fcoe_enable(struct net_device *netdev)</div><div class='ctx'>  */</div><div class='ctx'> int ixgbe_fcoe_disable(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (!atomic_dec_and_test(&amp;adapter-&gt;fcoe.refcnt))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -927,7 +927,7 @@ int ixgbe_fcoe_disable(struct net_device *netdev)</div><div class='ctx'> int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)</div><div class='ctx'> {</div><div class='ctx'> 	u16 prefix = 0xffff;</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_mac_info *mac = &amp;adapter-&gt;hw.mac;</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='hunk'>@@ -967,7 +967,7 @@ int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)</div><div class='ctx'> int ixgbe_fcoe_get_hbainfo(struct net_device *netdev,</div><div class='ctx'> 			   struct netdev_fcoe_hbainfo *info)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u64 dsn;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c<br/>new file mode 100644<br/>index 000000000000..e5479fc07a07<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c</a></div><div class='hunk'>@@ -0,0 +1,707 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;linux/pldmfw.h&gt;</div><div class='add'>+#include &lt;linux/uuid.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ixgbe.h"</div><div class='add'>+#include "ixgbe_fw_update.h"</div><div class='add'>+</div><div class='add'>+struct ixgbe_fwu_priv {</div><div class='add'>+	struct pldmfw context;</div><div class='add'>+</div><div class='add'>+	struct ixgbe_adapter *adapter;</div><div class='add'>+	struct netlink_ext_ack *extack;</div><div class='add'>+</div><div class='add'>+	/* Track which NVM banks to activate at the end of the update */</div><div class='add'>+	u8 activate_flags;</div><div class='add'>+	bool emp_reset_available;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_send_package_data - Send record package data to firmware</div><div class='add'>+ * @context: PLDM fw update structure</div><div class='add'>+ * @data: pointer to the package data</div><div class='add'>+ * @length: length of the package data</div><div class='add'>+ *</div><div class='add'>+ * Send a copy of the package data associated with the PLDM record matching</div><div class='add'>+ * this device to the firmware.</div><div class='add'>+ *</div><div class='add'>+ * Note that this function sends an AdminQ command that will fail unless the</div><div class='add'>+ * NVM resource has been acquired.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_send_package_data(struct pldmfw *context,</div><div class='add'>+				   const u8 *data, u16 length)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_fwu_priv *priv = container_of(context,</div><div class='add'>+						   struct ixgbe_fwu_priv,</div><div class='add'>+						   context);</div><div class='add'>+	struct ixgbe_adapter *adapter = priv-&gt;adapter;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u8 *package_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	package_data = kmemdup(data, length, GFP_KERNEL);</div><div class='add'>+	if (!package_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_nvm_set_pkg_data(hw, false, package_data, length);</div><div class='add'>+</div><div class='add'>+	kfree(package_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_check_component_response - Report firmware response to a component</div><div class='add'>+ * @adapter: device private data structure</div><div class='add'>+ * @response: indicates whether this component can be updated</div><div class='add'>+ * @code: code indicating reason for response</div><div class='add'>+ * @extack: netlink extended ACK structure</div><div class='add'>+ *</div><div class='add'>+ * Check whether firmware indicates if this component can be updated. Report</div><div class='add'>+ * a suitable error message over the netlink extended ACK if the component</div><div class='add'>+ * cannot be updated.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the component can be updated, or -ECANCELED if the</div><div class='add'>+ * firmware indicates the component cannot be updated.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_check_component_response(struct ixgbe_adapter *adapter,</div><div class='add'>+					  u8 response, u8 code,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	switch (response) {</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_CAN_BE_UPDATED:</div><div class='add'>+		/* Firmware indicated this update is good to proceed. */</div><div class='add'>+		return 0;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_CAN_MAY_BE_UPDATEABLE:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Firmware recommends not updating, as it may result in a downgrade. Continuing anyways");</div><div class='add'>+		return 0;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_CAN_NOT_BE_UPDATED:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Firmware has rejected updating.");</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_PARTIAL_CHECK:</div><div class='add'>+		if (hw-&gt;mac.ops.fw_recovery_mode &amp;&amp;</div><div class='add'>+		    hw-&gt;mac.ops.fw_recovery_mode(hw))</div><div class='add'>+			return 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (code) {</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_STAMP_IDENTICAL_CODE:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Component comparison stamp is identical to running image");</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_STAMP_LOWER:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Component comparison stamp is lower than running image");</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_INVALID_STAMP_CODE:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Component comparison stamp is invalid");</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_CONFLICT_CODE:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Component table conflict occurred");</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_PRE_REQ_NOT_MET_CODE:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Component pre-requisites not met");</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_NOT_SUPPORTED_CODE:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Component not supported");</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_CANNOT_DOWNGRADE_CODE:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Component cannot be downgraded");</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_INCOMPLETE_IMAGE_CODE:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Incomplete component image");</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_VER_STR_IDENTICAL_CODE:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Component version is identical to running image");</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_ACI_NVM_PASS_COMP_VER_STR_LOWER_CODE:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Component version is lower than the running image");</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Received unexpected response code from firmware");</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ECANCELED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_send_component_table - Send PLDM component table to firmware</div><div class='add'>+ * @context: PLDM fw update structure</div><div class='add'>+ * @component: the component to process</div><div class='add'>+ * @transfer_flag: relative transfer order of this component</div><div class='add'>+ *</div><div class='add'>+ * Read relevant data from the component and forward it to the device</div><div class='add'>+ * firmware. Check the response to determine if the firmware indicates that</div><div class='add'>+ * the update can proceed.</div><div class='add'>+ *</div><div class='add'>+ * This function sends ACI commands related to the NVM, and assumes that</div><div class='add'>+ * the NVM resource has been acquired.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_send_component_table(struct pldmfw *context,</div><div class='add'>+				      struct pldmfw_component *component,</div><div class='add'>+				      u8 transfer_flag)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_fwu_priv *priv = container_of(context,</div><div class='add'>+						   struct ixgbe_fwu_priv,</div><div class='add'>+						   context);</div><div class='add'>+	struct ixgbe_adapter *adapter = priv-&gt;adapter;</div><div class='add'>+	struct netlink_ext_ack *extack = priv-&gt;extack;</div><div class='add'>+	struct ixgbe_aci_cmd_nvm_comp_tbl *comp_tbl;</div><div class='add'>+	u8 comp_response, comp_response_code;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	size_t length;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (component-&gt;identifier) {</div><div class='add'>+	case NVM_COMP_ID_OROM:</div><div class='add'>+	case NVM_COMP_ID_NVM:</div><div class='add'>+	case NVM_COMP_ID_NETLIST:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Unable to update due to unknown firmware component");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	length = struct_size(comp_tbl, cvs, component-&gt;version_len);</div><div class='add'>+	comp_tbl = kzalloc(length, GFP_KERNEL);</div><div class='add'>+	if (!comp_tbl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	comp_tbl-&gt;comp_class = cpu_to_le16(component-&gt;classification);</div><div class='add'>+	comp_tbl-&gt;comp_id = cpu_to_le16(component-&gt;identifier);</div><div class='add'>+	comp_tbl-&gt;comp_class_idx = FWU_COMP_CLASS_IDX_NOT_USE;</div><div class='add'>+	comp_tbl-&gt;comp_cmp_stamp = cpu_to_le32(component-&gt;comparison_stamp);</div><div class='add'>+	comp_tbl-&gt;cvs_type = component-&gt;version_type;</div><div class='add'>+	comp_tbl-&gt;cvs_len = component-&gt;version_len;</div><div class='add'>+</div><div class='add'>+	memcpy(comp_tbl-&gt;cvs, component-&gt;version_string,</div><div class='add'>+	       component-&gt;version_len);</div><div class='add'>+</div><div class='add'>+	err = ixgbe_nvm_pass_component_tbl(hw, (u8 *)comp_tbl, length,</div><div class='add'>+					   transfer_flag, &amp;comp_response,</div><div class='add'>+					   &amp;comp_response_code);</div><div class='add'>+</div><div class='add'>+	kfree(comp_tbl);</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to transfer component table to firmware");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ixgbe_check_component_response(adapter,</div><div class='add'>+					      comp_response,</div><div class='add'>+					      comp_response_code, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_write_one_nvm_block - Write an NVM block and await completion response</div><div class='add'>+ * @adapter: the PF data structure</div><div class='add'>+ * @module: the module to write to</div><div class='add'>+ * @offset: offset in bytes</div><div class='add'>+ * @block_size: size of the block to write, up to 4k</div><div class='add'>+ * @block: pointer to block of data to write</div><div class='add'>+ * @last_cmd: whether this is the last command</div><div class='add'>+ * @extack: netlink extended ACK structure</div><div class='add'>+ *</div><div class='add'>+ * Write a block of data to a flash module, and await for the completion</div><div class='add'>+ * response message from firmware.</div><div class='add'>+ *</div><div class='add'>+ * Note this function assumes the caller has acquired the NVM resource.</div><div class='add'>+ *</div><div class='add'>+ * On successful return, reset level indicates the device reset required to</div><div class='add'>+ * complete the update.</div><div class='add'>+ *</div><div class='add'>+ *   0 - IXGBE_ACI_NVM_POR_FLAG - A full power on is required</div><div class='add'>+ *   1 - IXGBE_ACI_NVM_PERST_FLAG - A cold PCIe reset is required</div><div class='add'>+ *   2 - IXGBE_ACI_NVM_EMPR_FLAG - An EMP reset is required</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_write_one_nvm_block(struct ixgbe_adapter *adapter,</div><div class='add'>+				     u16 module, u32 offset,</div><div class='add'>+				     u16 block_size, u8 *block, bool last_cmd,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	return ixgbe_aci_update_nvm(hw, module, offset, block_size, block,</div><div class='add'>+				    last_cmd, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_write_nvm_module - Write data to an NVM module</div><div class='add'>+ * @adapter: the PF driver structure</div><div class='add'>+ * @module: the module id to program</div><div class='add'>+ * @component: the name of the component being updated</div><div class='add'>+ * @image: buffer of image data to write to the NVM</div><div class='add'>+ * @length: length of the buffer</div><div class='add'>+ * @extack: netlink extended ACK structure</div><div class='add'>+ *</div><div class='add'>+ * Loop over the data for a given NVM module and program it in 4 Kb</div><div class='add'>+ * blocks. Notify devlink core of progress after each block is programmed.</div><div class='add'>+ * Loops over a block of data and programs the NVM in 4k block chunks.</div><div class='add'>+ *</div><div class='add'>+ * Note this function assumes the caller has acquired the NVM resource.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_write_nvm_module(struct ixgbe_adapter *adapter, u16 module,</div><div class='add'>+				  const char *component, const u8 *image,</div><div class='add'>+				  u32 length,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct devlink *devlink = adapter-&gt;devlink;</div><div class='add'>+	u32 offset = 0;</div><div class='add'>+	bool last_cmd;</div><div class='add'>+	u8 *block;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_status_notify(devlink, "Flashing",</div><div class='add'>+					   component, 0, length);</div><div class='add'>+</div><div class='add'>+	block = kzalloc(IXGBE_ACI_MAX_BUFFER_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!block)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		u32 block_size;</div><div class='add'>+</div><div class='add'>+		block_size = min_t(u32, IXGBE_ACI_MAX_BUFFER_SIZE,</div><div class='add'>+				   length - offset);</div><div class='add'>+		last_cmd = !(offset + block_size &lt; length);</div><div class='add'>+</div><div class='add'>+		memcpy(block, image + offset, block_size);</div><div class='add'>+</div><div class='add'>+		err = ixgbe_write_one_nvm_block(adapter, module, offset,</div><div class='add'>+						block_size, block, last_cmd,</div><div class='add'>+						extack);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		offset += block_size;</div><div class='add'>+</div><div class='add'>+		devlink_flash_update_status_notify(devlink, "Flashing",</div><div class='add'>+						   component, offset, length);</div><div class='add'>+	} while (!last_cmd);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		devlink_flash_update_status_notify(devlink, "Flashing failed",</div><div class='add'>+						   component, length, length);</div><div class='add'>+	else</div><div class='add'>+		devlink_flash_update_status_notify(devlink, "Flashing done",</div><div class='add'>+						   component, length, length);</div><div class='add'>+</div><div class='add'>+	kfree(block);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Length in seconds to wait before timing out when erasing a flash module.</div><div class='add'>+ * Yes, erasing really can take minutes to complete.</div><div class='add'>+ */</div><div class='add'>+#define IXGBE_FW_ERASE_TIMEOUT 300</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_erase_nvm_module - Erase an NVM module and await firmware completion</div><div class='add'>+ * @adapter: the PF data structure</div><div class='add'>+ * @module: the module to erase</div><div class='add'>+ * @component: name of the component being updated</div><div class='add'>+ * @extack: netlink extended ACK structure</div><div class='add'>+ *</div><div class='add'>+ * Erase the inactive NVM bank associated with this module, and await for</div><div class='add'>+ * a completion response message from firmware.</div><div class='add'>+ *</div><div class='add'>+ * Note this function assumes the caller has acquired the NVM resource.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_erase_nvm_module(struct ixgbe_adapter *adapter, u16 module,</div><div class='add'>+				  const char *component,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct devlink *devlink = adapter-&gt;devlink;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_timeout_notify(devlink, "Erasing", component,</div><div class='add'>+					    IXGBE_FW_ERASE_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	err = ixgbe_aci_erase_nvm(hw, module);</div><div class='add'>+	if (err)</div><div class='add'>+		devlink_flash_update_status_notify(devlink, "Erasing failed",</div><div class='add'>+						   component, 0, 0);</div><div class='add'>+	else</div><div class='add'>+		devlink_flash_update_status_notify(devlink, "Erasing done",</div><div class='add'>+						   component, 0, 0);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_switch_flash_banks - Tell firmware to switch NVM banks</div><div class='add'>+ * @adapter: Pointer to the PF data structure</div><div class='add'>+ * @activate_flags: flags used for the activation command</div><div class='add'>+ * @emp_reset_available: on return, indicates if EMP reset is available</div><div class='add'>+ * @extack: netlink extended ACK structure</div><div class='add'>+ *</div><div class='add'>+ * Notify firmware to activate the newly written flash banks, and wait for the</div><div class='add'>+ * firmware response.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or an error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_switch_flash_banks(struct ixgbe_adapter *adapter,</div><div class='add'>+				    u8 activate_flags,</div><div class='add'>+				    bool *emp_reset_available,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u8 response_flags;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_nvm_write_activate(hw, activate_flags, &amp;response_flags);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to switch active flash banks");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (emp_reset_available) {</div><div class='add'>+		if (hw-&gt;dev_caps.common_cap.reset_restrict_support)</div><div class='add'>+			*emp_reset_available =</div><div class='add'>+				response_flags &amp; IXGBE_ACI_NVM_EMPR_ENA;</div><div class='add'>+		else</div><div class='add'>+			*emp_reset_available = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_flash_component - Flash a component of the NVM</div><div class='add'>+ * @context: PLDM fw update structure</div><div class='add'>+ * @component: the component table to program</div><div class='add'>+ *</div><div class='add'>+ * Program the flash contents for a given component. First, determine the</div><div class='add'>+ * module id. Then, erase the secondary bank for this module. Finally, write</div><div class='add'>+ * the contents of the component to the NVM.</div><div class='add'>+ *</div><div class='add'>+ * Note this function assumes the caller has acquired the NVM resource.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_flash_component(struct pldmfw *context,</div><div class='add'>+				 struct pldmfw_component *component)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_fwu_priv *priv = container_of(context,</div><div class='add'>+						   struct ixgbe_fwu_priv,</div><div class='add'>+						   context);</div><div class='add'>+	struct netlink_ext_ack *extack = priv-&gt;extack;</div><div class='add'>+	struct ixgbe_adapter *adapter = priv-&gt;adapter;</div><div class='add'>+	const char *name;</div><div class='add'>+	u16 module;</div><div class='add'>+	int err;</div><div class='add'>+	u8 flag;</div><div class='add'>+</div><div class='add'>+	switch (component-&gt;identifier) {</div><div class='add'>+	case NVM_COMP_ID_OROM:</div><div class='add'>+		module = IXGBE_E610_SR_1ST_OROM_BANK_PTR;</div><div class='add'>+		flag = IXGBE_ACI_NVM_ACTIV_SEL_OROM;</div><div class='add'>+		name = "fw.undi";</div><div class='add'>+		break;</div><div class='add'>+	case NVM_COMP_ID_NVM:</div><div class='add'>+		module = IXGBE_E610_SR_1ST_NVM_BANK_PTR;</div><div class='add'>+		flag = IXGBE_ACI_NVM_ACTIV_SEL_NVM;</div><div class='add'>+		name = "fw.mgmt";</div><div class='add'>+		break;</div><div class='add'>+	case NVM_COMP_ID_NETLIST:</div><div class='add'>+		module = IXGBE_E610_SR_NETLIST_BANK_PTR;</div><div class='add'>+		flag = IXGBE_ACI_NVM_ACTIV_SEL_NETLIST;</div><div class='add'>+		name = "fw.netlist";</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Mark this component for activating at the end. */</div><div class='add'>+	priv-&gt;activate_flags |= flag;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_erase_nvm_module(adapter, module, name, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return ixgbe_write_nvm_module(adapter, module, name,</div><div class='add'>+				      component-&gt;component_data,</div><div class='add'>+				      component-&gt;component_size, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_finalize_update - Perform last steps to complete device update</div><div class='add'>+ * @context: PLDM fw update structure</div><div class='add'>+ *</div><div class='add'>+ * Called as the last step of the update process. Complete the update by</div><div class='add'>+ * telling the firmware to switch active banks, and perform a reset of</div><div class='add'>+ * configured.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or an error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_finalize_update(struct pldmfw *context)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_fwu_priv *priv = container_of(context,</div><div class='add'>+						   struct ixgbe_fwu_priv,</div><div class='add'>+						   context);</div><div class='add'>+	struct ixgbe_adapter *adapter = priv-&gt;adapter;</div><div class='add'>+	struct netlink_ext_ack *extack = priv-&gt;extack;</div><div class='add'>+	struct devlink *devlink = adapter-&gt;devlink;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Finally, notify firmware to activate the written NVM banks */</div><div class='add'>+	err = ixgbe_switch_flash_banks(adapter, priv-&gt;activate_flags,</div><div class='add'>+				       &amp;priv-&gt;emp_reset_available, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;fw_emp_reset_disabled = !priv-&gt;emp_reset_available;</div><div class='add'>+</div><div class='add'>+	if (!adapter-&gt;fw_emp_reset_disabled)</div><div class='add'>+		devlink_flash_update_status_notify(devlink,</div><div class='add'>+						   "Suggested is to activate new firmware by devlink reload, if it doesn't work then a power cycle is required",</div><div class='add'>+						   NULL, 0, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pldmfw_ops ixgbe_fwu_ops_e610 = {</div><div class='add'>+	.match_record = &amp;pldmfw_op_pci_match_record,</div><div class='add'>+	.send_package_data = &amp;ixgbe_send_package_data,</div><div class='add'>+	.send_component_table = &amp;ixgbe_send_component_table,</div><div class='add'>+	.flash_component = &amp;ixgbe_flash_component,</div><div class='add'>+	.finalize_update = &amp;ixgbe_finalize_update,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_pending_updates - Check if the component has a pending update</div><div class='add'>+ * @adapter: the PF driver structure</div><div class='add'>+ * @pending: on return, bitmap of updates pending</div><div class='add'>+ * @extack: Netlink extended ACK</div><div class='add'>+ *</div><div class='add'>+ * Check if the device has any pending updates on any flash components.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure. Update</div><div class='add'>+ * pending with the bitmap of pending updates.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_get_pending_updates(struct ixgbe_adapter *adapter, u8 *pending,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw_dev_caps *dev_caps;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	dev_caps = kzalloc(sizeof(*dev_caps), GFP_KERNEL);</div><div class='add'>+	if (!dev_caps)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_discover_dev_caps(hw, dev_caps);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Unable to read device capabilities");</div><div class='add'>+		kfree(dev_caps);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*pending = 0;</div><div class='add'>+</div><div class='add'>+	if (dev_caps-&gt;common_cap.nvm_update_pending_nvm)</div><div class='add'>+		*pending |= IXGBE_ACI_NVM_ACTIV_SEL_NVM;</div><div class='add'>+</div><div class='add'>+	if (dev_caps-&gt;common_cap.nvm_update_pending_orom)</div><div class='add'>+		*pending |= IXGBE_ACI_NVM_ACTIV_SEL_OROM;</div><div class='add'>+</div><div class='add'>+	if (dev_caps-&gt;common_cap.nvm_update_pending_netlist)</div><div class='add'>+		*pending |= IXGBE_ACI_NVM_ACTIV_SEL_NETLIST;</div><div class='add'>+</div><div class='add'>+	kfree(dev_caps);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_cancel_pending_update - Cancel any pending update for a component</div><div class='add'>+ * @adapter: the PF driver structure</div><div class='add'>+ * @component: if not NULL, the name of the component being updated</div><div class='add'>+ * @extack: Netlink extended ACK structure</div><div class='add'>+ *</div><div class='add'>+ * Cancel any pending update for the specified component. If component is</div><div class='add'>+ * NULL, all device updates will be canceled.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_cancel_pending_update(struct ixgbe_adapter *adapter,</div><div class='add'>+				       const char *component,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct devlink *devlink = adapter-&gt;devlink;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u8 pending;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_get_pending_updates(adapter, &amp;pending, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* If the flash_update request is for a specific component, ignore all</div><div class='add'>+	 * of the other components.</div><div class='add'>+	 */</div><div class='add'>+	if (component) {</div><div class='add'>+		if (strcmp(component, "fw.mgmt") == 0)</div><div class='add'>+			pending &amp;= IXGBE_ACI_NVM_ACTIV_SEL_NVM;</div><div class='add'>+		else if (strcmp(component, "fw.undi") == 0)</div><div class='add'>+			pending &amp;= IXGBE_ACI_NVM_ACTIV_SEL_OROM;</div><div class='add'>+		else if (strcmp(component, "fw.netlist") == 0)</div><div class='add'>+			pending &amp;= IXGBE_ACI_NVM_ACTIV_SEL_NETLIST;</div><div class='add'>+		else</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* There is no previous pending update, so this request may continue */</div><div class='add'>+	if (!pending)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* In order to allow overwriting a previous pending update, notify</div><div class='add'>+	 * firmware to cancel that update by issuing the appropriate command.</div><div class='add'>+	 */</div><div class='add'>+	devlink_flash_update_status_notify(devlink,</div><div class='add'>+					   "Canceling previous pending update",</div><div class='add'>+					   component, 0, 0);</div><div class='add'>+</div><div class='add'>+	err = ixgbe_acquire_nvm(hw, LIBIE_AQC_RES_ACCESS_WRITE);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to acquire device flash lock");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pending |= IXGBE_ACI_NVM_REVERT_LAST_ACTIV;</div><div class='add'>+	err = ixgbe_switch_flash_banks(adapter, pending, NULL, extack);</div><div class='add'>+</div><div class='add'>+	ixgbe_release_nvm(hw);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_flash_pldm_image - Write a PLDM-formatted firmware image to the device</div><div class='add'>+ * @devlink: pointer to devlink associated with the device to update</div><div class='add'>+ * @params: devlink flash update parameters</div><div class='add'>+ * @extack: netlink extended ACK structure</div><div class='add'>+ *</div><div class='add'>+ * Parse the data for a given firmware file, verifying that it is a valid PLDM</div><div class='add'>+ * formatted image that matches this device.</div><div class='add'>+ *</div><div class='add'>+ * Extract the device record Package Data and Component Tables and send them</div><div class='add'>+ * to the firmware. Extract and write the flash data for each of the three</div><div class='add'>+ * main flash components, "fw.mgmt", "fw.undi", and "fw.netlist". Notify</div><div class='add'>+ * firmware once the data is written to the inactive banks.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ixgbe_flash_pldm_image(struct devlink *devlink,</div><div class='add'>+			   struct devlink_flash_update_params *params,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = devlink_priv(devlink);</div><div class='add'>+	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	struct ixgbe_fwu_priv priv;</div><div class='add'>+	u8 preservation;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type != ixgbe_mac_e610)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (params-&gt;overwrite_mask) {</div><div class='add'>+	case 0:</div><div class='add'>+		/* preserve all settings and identifiers */</div><div class='add'>+		preservation = IXGBE_ACI_NVM_PRESERVE_ALL;</div><div class='add'>+		break;</div><div class='add'>+	case DEVLINK_FLASH_OVERWRITE_SETTINGS:</div><div class='add'>+		/* Overwrite settings, but preserve vital information such as</div><div class='add'>+		 * device identifiers.</div><div class='add'>+		 */</div><div class='add'>+		preservation = IXGBE_ACI_NVM_PRESERVE_SELECTED;</div><div class='add'>+		break;</div><div class='add'>+	case (DEVLINK_FLASH_OVERWRITE_SETTINGS |</div><div class='add'>+	      DEVLINK_FLASH_OVERWRITE_IDENTIFIERS):</div><div class='add'>+		/* overwrite both settings and identifiers, preserve nothing */</div><div class='add'>+		preservation = IXGBE_ACI_NVM_NO_PRESERVATION;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Requested overwrite mask is not supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Cannot get caps in recovery mode, so lack of nvm_unified_update bit</div><div class='add'>+	 * cannot lead to error</div><div class='add'>+	 */</div><div class='add'>+	if (!hw-&gt;dev_caps.common_cap.nvm_unified_update &amp;&amp;</div><div class='add'>+	    (hw-&gt;mac.ops.fw_recovery_mode &amp;&amp;</div><div class='add'>+	     !hw-&gt;mac.ops.fw_recovery_mode(hw))) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Current firmware does not support unified update");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;priv, 0, sizeof(priv));</div><div class='add'>+</div><div class='add'>+	priv.context.ops = &amp;ixgbe_fwu_ops_e610;</div><div class='add'>+	priv.context.dev = dev;</div><div class='add'>+	priv.extack = extack;</div><div class='add'>+	priv.adapter = adapter;</div><div class='add'>+	priv.activate_flags = preservation;</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_status_notify(devlink,</div><div class='add'>+					   "Preparing to flash", NULL, 0, 0);</div><div class='add'>+</div><div class='add'>+	err = ixgbe_cancel_pending_update(adapter, NULL, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_acquire_nvm(hw, LIBIE_AQC_RES_ACCESS_WRITE);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to acquire device flash lock");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pldmfw_flash_image(&amp;priv.context, params-&gt;fw);</div><div class='add'>+	if (err == -ENOENT) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Firmware image has no record matching this device");</div><div class='add'>+	} else if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to flash PLDM image");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ixgbe_release_nvm(hw);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h<br/>new file mode 100644<br/>index 000000000000..abdd708c93df<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2025 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _IXGBE_FW_UPDATE_H_</div><div class='add'>+#define _IXGBE_FW_UPDATE_H_</div><div class='add'>+</div><div class='add'>+int ixgbe_flash_pldm_image(struct devlink *devlink,</div><div class='add'>+			   struct devlink_flash_update_params *params,</div><div class='add'>+			   struct netlink_ext_ack *extack);</div><div class='add'>+int ixgbe_get_pending_updates(struct ixgbe_adapter *adapter, u8 *pending,</div><div class='add'>+			      struct netlink_ext_ack *extack);</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c<br/>index 866024f2b9ee..d1f4073b36f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #define IXGBE_IPSEC_KEY_BITS  160</div><div class='ctx'> static const char aes_gcm_name[] = "rfc4106(gcm(aes))";</div><div class='ctx'> </div><div class='del'>-static void ixgbe_ipsec_del_sa(struct xfrm_state *xs);</div><div class='add'>+static void ixgbe_ipsec_del_sa(struct net_device *dev, struct xfrm_state *xs);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ixgbe_ipsec_set_tx_sa - set the Tx SA registers</div><div class='hunk'>@@ -321,7 +321,7 @@ void ixgbe_ipsec_restore(struct ixgbe_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		if (r-&gt;used) {</div><div class='ctx'> 			if (r-&gt;mode &amp; IXGBE_RXTXMOD_VF)</div><div class='del'>-				ixgbe_ipsec_del_sa(r-&gt;xs);</div><div class='add'>+				ixgbe_ipsec_del_sa(adapter-&gt;netdev, r-&gt;xs);</div><div class='ctx'> 			else</div><div class='ctx'> 				ixgbe_ipsec_set_rx_sa(hw, i, r-&gt;xs-&gt;id.spi,</div><div class='ctx'> 						      r-&gt;key, r-&gt;salt,</div><div class='hunk'>@@ -330,7 +330,7 @@ void ixgbe_ipsec_restore(struct ixgbe_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 		if (t-&gt;used) {</div><div class='ctx'> 			if (t-&gt;mode &amp; IXGBE_RXTXMOD_VF)</div><div class='del'>-				ixgbe_ipsec_del_sa(t-&gt;xs);</div><div class='add'>+				ixgbe_ipsec_del_sa(adapter-&gt;netdev, t-&gt;xs);</div><div class='ctx'> 			else</div><div class='ctx'> 				ixgbe_ipsec_set_tx_sa(hw, i, t-&gt;key, t-&gt;salt);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -417,6 +417,7 @@ static struct xfrm_state *ixgbe_ipsec_find_rx_state(struct ixgbe_ipsec *ipsec,</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ixgbe_ipsec_parse_proto_keys - find the key and salt based on the protocol</div><div class='add'>+ * @dev: pointer to net device</div><div class='ctx'>  * @xs: pointer to xfrm_state struct</div><div class='ctx'>  * @mykey: pointer to key array to populate</div><div class='ctx'>  * @mysalt: pointer to salt value to populate</div><div class='hunk'>@@ -424,10 +425,10 @@ static struct xfrm_state *ixgbe_ipsec_find_rx_state(struct ixgbe_ipsec *ipsec,</div><div class='ctx'>  * This copies the protocol keys and salt to our own data tables.  The</div><div class='ctx'>  * 82599 family only supports the one algorithm.</div><div class='ctx'>  **/</div><div class='del'>-static int ixgbe_ipsec_parse_proto_keys(struct xfrm_state *xs,</div><div class='add'>+static int ixgbe_ipsec_parse_proto_keys(struct net_device *dev,</div><div class='add'>+					struct xfrm_state *xs,</div><div class='ctx'> 					u32 *mykey, u32 *mysalt)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = xs-&gt;xso.real_dev;</div><div class='ctx'> 	unsigned char *key_data;</div><div class='ctx'> 	char *alg_name = NULL;</div><div class='ctx'> 	int key_len;</div><div class='hunk'>@@ -473,12 +474,13 @@ static int ixgbe_ipsec_parse_proto_keys(struct xfrm_state *xs,</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ixgbe_ipsec_check_mgmt_ip - make sure there is no clash with mgmt IP filters</div><div class='add'>+ * @dev: pointer to net device</div><div class='ctx'>  * @xs: pointer to transformer state struct</div><div class='ctx'>  **/</div><div class='del'>-static int ixgbe_ipsec_check_mgmt_ip(struct xfrm_state *xs)</div><div class='add'>+static int ixgbe_ipsec_check_mgmt_ip(struct net_device *dev,</div><div class='add'>+				     struct xfrm_state *xs)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = xs-&gt;xso.real_dev;</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 mfval, manc, reg;</div><div class='ctx'> 	int num_filters = 4;</div><div class='hunk'>@@ -556,14 +558,15 @@ static int ixgbe_ipsec_check_mgmt_ip(struct xfrm_state *xs)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ixgbe_ipsec_add_sa - program device with a security association</div><div class='add'>+ * @dev: pointer to device to program</div><div class='ctx'>  * @xs: pointer to transformer state struct</div><div class='ctx'>  * @extack: extack point to fill failure reason</div><div class='ctx'>  **/</div><div class='del'>-static int ixgbe_ipsec_add_sa(struct xfrm_state *xs,</div><div class='add'>+static int ixgbe_ipsec_add_sa(struct net_device *dev,</div><div class='add'>+			      struct xfrm_state *xs,</div><div class='ctx'> 			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = xs-&gt;xso.real_dev;</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_ipsec *ipsec = adapter-&gt;ipsec;</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	int checked, match, first;</div><div class='hunk'>@@ -581,7 +584,7 @@ static int ixgbe_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ixgbe_ipsec_check_mgmt_ip(xs)) {</div><div class='add'>+	if (ixgbe_ipsec_check_mgmt_ip(dev, xs)) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "IPsec IP addr clash with mgmt filters");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -615,7 +618,7 @@ static int ixgbe_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> 			rsa.decrypt = xs-&gt;ealg || xs-&gt;aead;</div><div class='ctx'> </div><div class='ctx'> 		/* get the key and salt */</div><div class='del'>-		ret = ixgbe_ipsec_parse_proto_keys(xs, rsa.key, &amp;rsa.salt);</div><div class='add'>+		ret = ixgbe_ipsec_parse_proto_keys(dev, xs, rsa.key, &amp;rsa.salt);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack, "Failed to get key data for Rx SA table");</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -724,7 +727,7 @@ static int ixgbe_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> 		if (xs-&gt;id.proto &amp; IPPROTO_ESP)</div><div class='ctx'> 			tsa.encrypt = xs-&gt;ealg || xs-&gt;aead;</div><div class='ctx'> </div><div class='del'>-		ret = ixgbe_ipsec_parse_proto_keys(xs, tsa.key, &amp;tsa.salt);</div><div class='add'>+		ret = ixgbe_ipsec_parse_proto_keys(dev, xs, tsa.key, &amp;tsa.salt);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack, "Failed to get key data for Tx SA table");</div><div class='ctx'> 			memset(&amp;tsa, 0, sizeof(tsa));</div><div class='hunk'>@@ -752,12 +755,12 @@ static int ixgbe_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ixgbe_ipsec_del_sa - clear out this specific SA</div><div class='add'>+ * @dev: pointer to device to program</div><div class='ctx'>  * @xs: pointer to transformer state struct</div><div class='ctx'>  **/</div><div class='del'>-static void ixgbe_ipsec_del_sa(struct xfrm_state *xs)</div><div class='add'>+static void ixgbe_ipsec_del_sa(struct net_device *dev, struct xfrm_state *xs)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = xs-&gt;xso.real_dev;</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_ipsec *ipsec = adapter-&gt;ipsec;</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 zerobuf[4] = {0, 0, 0, 0};</div><div class='hunk'>@@ -817,30 +820,9 @@ static void ixgbe_ipsec_del_sa(struct xfrm_state *xs)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ixgbe_ipsec_offload_ok - can this packet use the xfrm hw offload</div><div class='del'>- * @skb: current data packet</div><div class='del'>- * @xs: pointer to transformer state struct</div><div class='del'>- **/</div><div class='del'>-static bool ixgbe_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *xs)</div><div class='del'>-{</div><div class='del'>-	if (xs-&gt;props.family == AF_INET) {</div><div class='del'>-		/* Offload with IPv4 options is not supported yet */</div><div class='del'>-		if (ip_hdr(skb)-&gt;ihl != 5)</div><div class='del'>-			return false;</div><div class='del'>-	} else {</div><div class='del'>-		/* Offload with IPv6 extension headers is not support yet */</div><div class='del'>-		if (ipv6_ext_hdr(ipv6_hdr(skb)-&gt;nexthdr))</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct xfrmdev_ops ixgbe_xfrmdev_ops = {</div><div class='ctx'> 	.xdo_dev_state_add = ixgbe_ipsec_add_sa,</div><div class='ctx'> 	.xdo_dev_state_delete = ixgbe_ipsec_del_sa,</div><div class='del'>-	.xdo_dev_offload_ok = ixgbe_ipsec_offload_ok,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -862,7 +844,8 @@ void ixgbe_ipsec_vf_clear(struct ixgbe_adapter *adapter, u32 vf)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (ipsec-&gt;rx_tbl[i].mode &amp; IXGBE_RXTXMOD_VF &amp;&amp;</div><div class='ctx'> 		    ipsec-&gt;rx_tbl[i].vf == vf)</div><div class='del'>-			ixgbe_ipsec_del_sa(ipsec-&gt;rx_tbl[i].xs);</div><div class='add'>+			ixgbe_ipsec_del_sa(adapter-&gt;netdev,</div><div class='add'>+					   ipsec-&gt;rx_tbl[i].xs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* search tx sa table */</div><div class='hunk'>@@ -871,7 +854,8 @@ void ixgbe_ipsec_vf_clear(struct ixgbe_adapter *adapter, u32 vf)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (ipsec-&gt;tx_tbl[i].mode &amp; IXGBE_RXTXMOD_VF &amp;&amp;</div><div class='ctx'> 		    ipsec-&gt;tx_tbl[i].vf == vf)</div><div class='del'>-			ixgbe_ipsec_del_sa(ipsec-&gt;tx_tbl[i].xs);</div><div class='add'>+			ixgbe_ipsec_del_sa(adapter-&gt;netdev,</div><div class='add'>+					   ipsec-&gt;tx_tbl[i].xs);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -951,7 +935,7 @@ int ixgbe_ipsec_vf_add_sa(struct ixgbe_adapter *adapter, u32 *msgbuf, u32 vf)</div><div class='ctx'> 	memcpy(xs-&gt;aead-&gt;alg_name, aes_gcm_name, sizeof(aes_gcm_name));</div><div class='ctx'> </div><div class='ctx'> 	/* set up the HW offload */</div><div class='del'>-	err = ixgbe_ipsec_add_sa(xs, NULL);</div><div class='add'>+	err = ixgbe_ipsec_add_sa(adapter-&gt;netdev, xs, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_aead;</div><div class='ctx'> </div><div class='hunk'>@@ -1055,7 +1039,7 @@ int ixgbe_ipsec_vf_del_sa(struct ixgbe_adapter *adapter, u32 *msgbuf, u32 vf)</div><div class='ctx'> 		xs = ipsec-&gt;tx_tbl[sa_idx].xs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ixgbe_ipsec_del_sa(xs);</div><div class='add'>+	ixgbe_ipsec_del_sa(adapter-&gt;netdev, xs);</div><div class='ctx'> </div><div class='ctx'> 	/* remove the xs that was made-up in the add request */</div><div class='ctx'> 	kfree_sensitive(xs);</div><div class='hunk'>@@ -1073,7 +1057,7 @@ int ixgbe_ipsec_tx(struct ixgbe_ring *tx_ring,</div><div class='ctx'> 		   struct ixgbe_tx_buffer *first,</div><div class='ctx'> 		   struct ixgbe_ipsec_tx_data *itd)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(tx_ring-&gt;netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(tx_ring-&gt;netdev);</div><div class='ctx'> 	struct ixgbe_ipsec *ipsec = adapter-&gt;ipsec;</div><div class='ctx'> 	struct xfrm_state *xs;</div><div class='ctx'> 	struct sec_path *sp;</div><div class='hunk'>@@ -1163,7 +1147,7 @@ void ixgbe_ipsec_rx(struct ixgbe_ring *rx_ring,</div><div class='ctx'> 		    union ixgbe_adv_rx_desc *rx_desc,</div><div class='ctx'> 		    struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(rx_ring-&gt;netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(rx_ring-&gt;netdev);</div><div class='ctx'> 	__le16 pkt_info = rx_desc-&gt;wb.lower.lo_dword.hs_rss.pkt_info;</div><div class='ctx'> 	__le16 ipsec_pkt_types = cpu_to_le16(IXGBE_RXDADV_PKTTYPE_IPSEC_AH |</div><div class='ctx'> 					     IXGBE_RXDADV_PKTTYPE_IPSEC_ESP);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c<br/>index 16fa621ce0ff..a1d04914fbbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include "ixgbe.h"</div><div class='ctx'> #include "ixgbe_sriov.h"</div><div class='hunk'>@@ -107,6 +107,7 @@ static void ixgbe_get_first_reg_idx(struct ixgbe_adapter *adapter, u8 tc,</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		if (num_tcs &gt; 4) {</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * TCs    : TC0/1 TC2/3 TC4-7</div><div class='hunk'>@@ -317,7 +318,7 @@ static int ixgbe_xdp_queues(struct ixgbe_adapter *adapter)</div><div class='ctx'>  * ixgbe_set_dcb_sriov_queues: Allocate queues for SR-IOV devices w/ DCB</div><div class='ctx'>  * @adapter: board private structure to initialize</div><div class='ctx'>  *</div><div class='del'>- * When SR-IOV (Single Root IO Virtualiztion) is enabled, allocate queues</div><div class='add'>+ * When SR-IOV (Single Root IO Virtualization) is enabled, allocate queues</div><div class='ctx'>  * and VM pools where appropriate.  Also assign queues based on DCB</div><div class='ctx'>  * priorities and map accordingly..</div><div class='ctx'>  *</div><div class='hunk'>@@ -491,7 +492,7 @@ static bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)</div><div class='ctx'>  * ixgbe_set_sriov_queues - Allocate queues for SR-IOV devices</div><div class='ctx'>  * @adapter: board private structure to initialize</div><div class='ctx'>  *</div><div class='del'>- * When SR-IOV (Single Root IO Virtualiztion) is enabled, allocate queues</div><div class='add'>+ * When SR-IOV (Single Root IO Virtualization) is enabled, allocate queues</div><div class='ctx'>  * and VM pools where appropriate.  If RSS is available, then also try and</div><div class='ctx'>  * enable RSS and map accordingly.</div><div class='ctx'>  *</div><div class='hunk'>@@ -890,7 +891,7 @@ static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	q_vector-&gt;rx.itr = IXGBE_ITR_ADAPTIVE_MAX_USECS |</div><div class='ctx'> 			   IXGBE_ITR_ADAPTIVE_LATENCY;</div><div class='ctx'> </div><div class='del'>-	/* intialize ITR */</div><div class='add'>+	/* initialize ITR */</div><div class='ctx'> 	if (txr_count &amp;&amp; !rxr_count) {</div><div class='ctx'> 		/* tx only vector */</div><div class='ctx'> 		if (adapter-&gt;tx_itr_setting == 1)</div><div class='hunk'>@@ -1292,7 +1293,8 @@ void ixgbe_tx_ctxtdesc(struct ixgbe_ring *tx_ring, u32 vlan_macip_lens,</div><div class='ctx'> 	tx_ring-&gt;next_to_use = (i &lt; tx_ring-&gt;count) ? i : 0;</div><div class='ctx'> </div><div class='ctx'> 	/* set bits to identify this as an advanced context descriptor */</div><div class='del'>-	type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;</div><div class='add'>+	type_tucmd |= IXGBE_TXD_CMD_DEXT |</div><div class='add'>+		FIELD_PREP(IXGBE_ADVTXD_DTYP_MASK, IXGBE_ADVTXD_DTYP_CTXT);</div><div class='ctx'> </div><div class='ctx'> 	context_desc-&gt;vlan_macip_lens	= cpu_to_le32(vlan_macip_lens);</div><div class='ctx'> 	context_desc-&gt;fceof_saidx	= cpu_to_le32(fceof_saidx);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c<br/>index 8b8404d8c946..034618e79169 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_main.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/in.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='ctx'> #include &lt;linux/ip.h&gt;</div><div class='ctx'> #include &lt;linux/tcp.h&gt;</div><div class='ctx'> #include &lt;linux/sctp.h&gt;</div><div class='hunk'>@@ -42,11 +43,14 @@</div><div class='ctx'> </div><div class='ctx'> #include "ixgbe.h"</div><div class='ctx'> #include "ixgbe_common.h"</div><div class='add'>+#include "ixgbe_e610.h"</div><div class='ctx'> #include "ixgbe_dcb_82599.h"</div><div class='add'>+#include "ixgbe_mbx.h"</div><div class='ctx'> #include "ixgbe_phy.h"</div><div class='ctx'> #include "ixgbe_sriov.h"</div><div class='ctx'> #include "ixgbe_model.h"</div><div class='ctx'> #include "ixgbe_txrx_common.h"</div><div class='add'>+#include "devlink/devlink.h"</div><div class='ctx'> </div><div class='ctx'> char ixgbe_driver_name[] = "ixgbe";</div><div class='ctx'> static const char ixgbe_driver_string[] =</div><div class='hunk'>@@ -72,6 +76,7 @@ static const struct ixgbe_info *ixgbe_info_tbl[] = {</div><div class='ctx'> 	[board_x550em_x_fw]	= &amp;ixgbe_x550em_x_fw_info,</div><div class='ctx'> 	[board_x550em_a]	= &amp;ixgbe_x550em_a_info,</div><div class='ctx'> 	[board_x550em_a_fw]	= &amp;ixgbe_x550em_a_fw_info,</div><div class='add'>+	[board_e610]		= &amp;ixgbe_e610_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* ixgbe_pci_tbl - PCI Device ID Table</div><div class='hunk'>@@ -130,6 +135,11 @@ static const struct pci_device_id ixgbe_pci_tbl[] = {</div><div class='ctx'> 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },</div><div class='ctx'> 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },</div><div class='ctx'> 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },</div><div class='add'>+	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_BACKPLANE), board_e610},</div><div class='add'>+	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_SFP), board_e610},</div><div class='add'>+	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_10G_T), board_e610},</div><div class='add'>+	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_2_5G_T), board_e610},</div><div class='add'>+	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_SGMII), board_e610},</div><div class='ctx'> 	/* required last entry */</div><div class='ctx'> 	{0, }</div><div class='ctx'> };</div><div class='hunk'>@@ -162,6 +172,7 @@ static int debug = -1;</div><div class='ctx'> module_param(debug, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");</div><div class='ctx'> </div><div class='add'>+MODULE_IMPORT_NS("LIBIE_FWLOG");</div><div class='ctx'> MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='hunk'>@@ -172,6 +183,8 @@ static struct workqueue_struct *ixgbe_wq;</div><div class='ctx'> </div><div class='ctx'> static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);</div><div class='ctx'> static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);</div><div class='add'>+static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *);</div><div class='add'>+static void ixgbe_watchdog_update_link(struct ixgbe_adapter *);</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops ixgbe_netdev_ops;</div><div class='ctx'> </div><div class='hunk'>@@ -235,8 +248,11 @@ static int ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)</div><div class='ctx'>  * bandwidth details should be gathered from the parent bus instead of from the</div><div class='ctx'>  * device. Used to ensure that various locations all have the correct device ID</div><div class='ctx'>  * checks.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if information should be collected from the parent bus, false</div><div class='add'>+ *         otherwise</div><div class='ctx'>  */</div><div class='del'>-static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)</div><div class='add'>+static bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	switch (hw-&gt;device_id) {</div><div class='ctx'> 	case IXGBE_DEV_ID_82599_SFP_SF_QP:</div><div class='hunk'>@@ -875,6 +891,7 @@ static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		if (direction == -1) {</div><div class='ctx'> 			/* other causes */</div><div class='ctx'> 			msix_vector |= IXGBE_IVAR_ALLOC_VAL;</div><div class='hunk'>@@ -914,6 +931,7 @@ void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		mask = (qmask &amp; 0xFFFFFFFF);</div><div class='ctx'> 		IXGBE_WRITE_REG(&amp;adapter-&gt;hw, IXGBE_EICS_EX(0), mask);</div><div class='ctx'> 		mask = (qmask &gt;&gt; 32);</div><div class='hunk'>@@ -951,10 +969,6 @@ static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;num_tx_queues; i++)</div><div class='ctx'> 		clear_bit(__IXGBE_HANG_CHECK_ARMED,</div><div class='ctx'> 			  &amp;adapter-&gt;tx_ring[i]-&gt;state);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_xdp_queues; i++)</div><div class='del'>-		clear_bit(__IXGBE_HANG_CHECK_ARMED,</div><div class='del'>-			  &amp;adapter-&gt;xdp_ring[i]-&gt;state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)</div><div class='hunk'>@@ -1024,7 +1038,49 @@ static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)</div><div class='ctx'> 	return ((head &lt;= tail) ? tail : tail + ring-&gt;count) - head;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_get_vf_idx - provide VF index number based on queue index</div><div class='add'>+ * @adapter: pointer to the adapter struct</div><div class='add'>+ * @queue: Tx queue identifier</div><div class='add'>+ * @vf: output VF index</div><div class='add'>+ *</div><div class='add'>+ * Provide VF index number associated to the input queue.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 if VF provided or error number.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_get_vf_idx(struct ixgbe_adapter *adapter, u16 queue, u16 *vf)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u8 queue_count;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (queue &gt;= adapter-&gt;num_tx_queues)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Determine number of queues by checking</div><div class='add'>+	 * number of virtual functions</div><div class='add'>+	 */</div><div class='add'>+	reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);</div><div class='add'>+	switch (reg &amp; IXGBE_GCR_EXT_VT_MODE_MASK) {</div><div class='add'>+	case IXGBE_GCR_EXT_VT_MODE_64:</div><div class='add'>+		queue_count = IXGBE_64VFS_QUEUES;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_GCR_EXT_VT_MODE_32:</div><div class='add'>+		queue_count = IXGBE_32VFS_QUEUES;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_GCR_EXT_VT_MODE_16:</div><div class='add'>+		queue_count = IXGBE_16VFS_QUEUES;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*vf = queue / queue_count;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tx_done = ixgbe_get_tx_completed(tx_ring);</div><div class='ctx'> 	u32 tx_done_old = tx_ring-&gt;tx_stats.tx_done_old;</div><div class='hunk'>@@ -1080,7 +1136,7 @@ static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)</div><div class='ctx'> static int ixgbe_tx_maxrate(struct net_device *netdev,</div><div class='ctx'> 			    int queue_index, u32 maxrate)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 bcnrc_val = ixgbe_link_mbps(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -1143,6 +1199,148 @@ void ixgbe_update_rx_ring_stats(struct ixgbe_ring *rx_ring,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ixgbe_pf_handle_tx_hang - handle Tx hang on PF</div><div class='add'>+ * @tx_ring: tx ring number</div><div class='add'>+ * @next: next ring</div><div class='add'>+ *</div><div class='add'>+ * Prints a message containing details about the tx hang.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_pf_handle_tx_hang(struct ixgbe_ring *tx_ring,</div><div class='add'>+				    unsigned int next)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = netdev_priv(tx_ring-&gt;netdev);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	e_err(drv, "Detected Tx Unit Hang\n"</div><div class='add'>+		   "  Tx Queue             &lt;%d&gt;\n"</div><div class='add'>+		   "  TDH, TDT             &lt;%x&gt;, &lt;%x&gt;\n"</div><div class='add'>+		   "  next_to_use          &lt;%x&gt;\n"</div><div class='add'>+		   "  next_to_clean        &lt;%x&gt;\n"</div><div class='add'>+		   "tx_buffer_info[next_to_clean]\n"</div><div class='add'>+		   "  time_stamp           &lt;%lx&gt;\n"</div><div class='add'>+		   "  jiffies              &lt;%lx&gt;\n",</div><div class='add'>+	      tx_ring-&gt;queue_index,</div><div class='add'>+	      IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring-&gt;reg_idx)),</div><div class='add'>+	      IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring-&gt;reg_idx)),</div><div class='add'>+	      tx_ring-&gt;next_to_use, next,</div><div class='add'>+	      tx_ring-&gt;tx_buffer_info[next].time_stamp, jiffies);</div><div class='add'>+</div><div class='add'>+	netif_stop_subqueue(tx_ring-&gt;netdev,</div><div class='add'>+			    tx_ring-&gt;queue_index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_vf_handle_tx_hang - handle Tx hang on VF</div><div class='add'>+ * @adapter: structure containing ring specific data</div><div class='add'>+ * @vf: VF index</div><div class='add'>+ *</div><div class='add'>+ * Print a message containing details about malicious driver detection.</div><div class='add'>+ * Set malicious VF link down if the detection happened several times.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_vf_handle_tx_hang(struct ixgbe_adapter *adapter, u16 vf)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;hw.mac.type != ixgbe_mac_e610)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	e_warn(drv,</div><div class='add'>+	       "Malicious Driver Detection tx hang detected on PF %d VF %d MAC: %pM",</div><div class='add'>+	       hw-&gt;bus.func, vf, adapter-&gt;vfinfo[vf].vf_mac_addresses);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;tx_hang_count[vf]++;</div><div class='add'>+	if (adapter-&gt;tx_hang_count[vf] == IXGBE_MAX_TX_VF_HANGS) {</div><div class='add'>+		ixgbe_set_vf_link_state(adapter, vf,</div><div class='add'>+					IFLA_VF_LINK_STATE_DISABLE);</div><div class='add'>+		adapter-&gt;tx_hang_count[vf] = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ixgbe_poll_tx_icache(struct ixgbe_hw *hw, u16 queue, u16 idx)</div><div class='add'>+{</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_TXDESCIC, queue * idx);</div><div class='add'>+	return IXGBE_READ_REG(hw, IXGBE_TXDESCIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_check_illegal_queue - search for queue with illegal packet</div><div class='add'>+ * @adapter: structure containing ring specific data</div><div class='add'>+ * @queue: queue index</div><div class='add'>+ *</div><div class='add'>+ * Check if tx descriptor connected with input queue</div><div class='add'>+ * contains illegal packet.</div><div class='add'>+ *</div><div class='add'>+ * Returns: true if queue contain illegal packet.</div><div class='add'>+ */</div><div class='add'>+static bool ixgbe_check_illegal_queue(struct ixgbe_adapter *adapter,</div><div class='add'>+				      u16 queue)</div><div class='add'>+{</div><div class='add'>+	u32 hdr_len_reg, mss_len_reg, type_reg;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u32 mss_len, header_len, reg;</div><div class='add'>+</div><div class='add'>+	for (u16 i = 0; i &lt; IXGBE_MAX_TX_DESCRIPTORS; i++) {</div><div class='add'>+		/* HW will clear bit IXGBE_TXDESCIC_READY when address</div><div class='add'>+		 * is written to address field. HW will set this bit</div><div class='add'>+		 * when iCache read is done, and data is ready at TIC_DWx.</div><div class='add'>+		 * Set descriptor address.</div><div class='add'>+		 */</div><div class='add'>+		read_poll_timeout(ixgbe_poll_tx_icache, reg,</div><div class='add'>+				  !(reg &amp; IXGBE_TXDESCIC_READY), 0, 0, false,</div><div class='add'>+				  hw, queue, i);</div><div class='add'>+</div><div class='add'>+		/* read tx descriptor access registers */</div><div class='add'>+		hdr_len_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_VLAN_MACIP_LENS_REG));</div><div class='add'>+		type_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_TYPE_TUCMD_MLHL));</div><div class='add'>+		mss_len_reg = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(IXGBE_MSS_L4LEN_IDX));</div><div class='add'>+</div><div class='add'>+		/* check if Advanced Context Descriptor */</div><div class='add'>+		if (FIELD_GET(IXGBE_ADVTXD_DTYP_MASK, type_reg) !=</div><div class='add'>+		    IXGBE_ADVTXD_DTYP_CTXT)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* check for illegal MSS and Header length */</div><div class='add'>+		mss_len = FIELD_GET(IXGBE_ADVTXD_MSS_MASK, mss_len_reg);</div><div class='add'>+		header_len = FIELD_GET(IXGBE_ADVTXD_HEADER_LEN_MASK,</div><div class='add'>+				       hdr_len_reg);</div><div class='add'>+		if ((mss_len + header_len) &gt; SZ_16K) {</div><div class='add'>+			e_warn(probe, "mss len + header len too long\n");</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_handle_mdd_event - handle mdd event</div><div class='add'>+ * @adapter: structure containing ring specific data</div><div class='add'>+ * @tx_ring: tx descriptor ring to handle</div><div class='add'>+ *</div><div class='add'>+ * Reset VF driver if malicious vf detected or</div><div class='add'>+ * illegal packet in an any queue detected.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_handle_mdd_event(struct ixgbe_adapter *adapter,</div><div class='add'>+				   struct ixgbe_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	u16 vf, q;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;vfinfo &amp;&amp; ixgbe_check_mdd_event(adapter)) {</div><div class='add'>+		/* vf mdd info and malicious vf detected */</div><div class='add'>+		if (!ixgbe_get_vf_idx(adapter, tx_ring-&gt;queue_index, &amp;vf))</div><div class='add'>+			ixgbe_vf_handle_tx_hang(adapter, vf);</div><div class='add'>+	} else {</div><div class='add'>+		/* malicious vf not detected */</div><div class='add'>+		for (q = 0; q &lt; IXGBE_MAX_TX_QUEUES; q++) {</div><div class='add'>+			if (ixgbe_check_illegal_queue(adapter, q) &amp;&amp;</div><div class='add'>+			    !ixgbe_get_vf_idx(adapter, q, &amp;vf))</div><div class='add'>+				/* illegal queue detected */</div><div class='add'>+				ixgbe_vf_handle_tx_hang(adapter, vf);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes</div><div class='ctx'>  * @q_vector: structure containing interrupt and ring information</div><div class='ctx'>  * @tx_ring: tx ring to clean</div><div class='hunk'>@@ -1248,27 +1446,14 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,</div><div class='ctx'> 				   total_bytes);</div><div class='ctx'> 	adapter-&gt;tx_ipsec += total_ipsec;</div><div class='ctx'> </div><div class='add'>+	if (ring_is_xdp(tx_ring))</div><div class='add'>+		return !!budget;</div><div class='add'>+</div><div class='ctx'> 	if (check_for_tx_hang(tx_ring) &amp;&amp; ixgbe_check_tx_hang(tx_ring)) {</div><div class='del'>-		/* schedule immediate reset if we believe we hung */</div><div class='del'>-		struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='del'>-		e_err(drv, "Detected Tx Unit Hang %s\n"</div><div class='del'>-			"  Tx Queue             &lt;%d&gt;\n"</div><div class='del'>-			"  TDH, TDT             &lt;%x&gt;, &lt;%x&gt;\n"</div><div class='del'>-			"  next_to_use          &lt;%x&gt;\n"</div><div class='del'>-			"  next_to_clean        &lt;%x&gt;\n"</div><div class='del'>-			"tx_buffer_info[next_to_clean]\n"</div><div class='del'>-			"  time_stamp           &lt;%lx&gt;\n"</div><div class='del'>-			"  jiffies              &lt;%lx&gt;\n",</div><div class='del'>-			ring_is_xdp(tx_ring) ? "(XDP)" : "",</div><div class='del'>-			tx_ring-&gt;queue_index,</div><div class='del'>-			IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring-&gt;reg_idx)),</div><div class='del'>-			IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring-&gt;reg_idx)),</div><div class='del'>-			tx_ring-&gt;next_to_use, i,</div><div class='del'>-			tx_ring-&gt;tx_buffer_info[i].time_stamp, jiffies);</div><div class='del'>-</div><div class='del'>-		if (!ring_is_xdp(tx_ring))</div><div class='del'>-			netif_stop_subqueue(tx_ring-&gt;netdev,</div><div class='del'>-					    tx_ring-&gt;queue_index);</div><div class='add'>+		if (adapter-&gt;hw.mac.type == ixgbe_mac_e610)</div><div class='add'>+			ixgbe_handle_mdd_event(adapter, tx_ring);</div><div class='add'>+</div><div class='add'>+		ixgbe_pf_handle_tx_hang(tx_ring, i);</div><div class='ctx'> </div><div class='ctx'> 		e_info(probe,</div><div class='ctx'> 		       "tx hang %d detected on queue %d, resetting adapter\n",</div><div class='hunk'>@@ -1281,9 +1466,6 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ring_is_xdp(tx_ring))</div><div class='del'>-		return !!budget;</div><div class='del'>-</div><div class='ctx'> #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)</div><div class='ctx'> 	txq = netdev_get_tx_queue(tx_ring-&gt;netdev, tx_ring-&gt;queue_index);</div><div class='ctx'> 	if (!__netif_txq_completed_wake(txq, total_packets, total_bytes,</div><div class='hunk'>@@ -1908,10 +2090,6 @@ bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = rx_ring-&gt;netdev;</div><div class='ctx'> </div><div class='del'>-	/* XDP packets use error pointer so abort at this point */</div><div class='del'>-	if (IS_ERR(skb))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='ctx'> 	/* Verify netdev is present, and that packet does not have any</div><div class='ctx'> 	 * errors that would be unacceptable to the netdev.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -2094,7 +2272,7 @@ static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,</div><div class='ctx'> 		/* hand second half of page back to the ring */</div><div class='ctx'> 		ixgbe_reuse_rx_page(rx_ring, rx_buffer);</div><div class='ctx'> 	} else {</div><div class='del'>-		if (!IS_ERR(skb) &amp;&amp; IXGBE_CB(skb)-&gt;dma == rx_buffer-&gt;dma) {</div><div class='add'>+		if (skb &amp;&amp; IXGBE_CB(skb)-&gt;dma == rx_buffer-&gt;dma) {</div><div class='ctx'> 			/* the page has been released from the ring */</div><div class='ctx'> 			IXGBE_CB(skb)-&gt;page_released = true;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -2188,7 +2366,7 @@ static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 	/* Prefetch first cache line of first page. If xdp-&gt;data_meta</div><div class='del'>-	 * is unused, this points extactly as xdp-&gt;data, otherwise we</div><div class='add'>+	 * is unused, this points exactly as xdp-&gt;data, otherwise we</div><div class='ctx'> 	 * likely have a consumer accessing first few bytes of meta</div><div class='ctx'> 	 * data, and then actual data.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -2219,9 +2397,9 @@ static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,</div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,</div><div class='del'>-				     struct ixgbe_ring *rx_ring,</div><div class='del'>-				     struct xdp_buff *xdp)</div><div class='add'>+static int ixgbe_run_xdp(struct ixgbe_adapter *adapter,</div><div class='add'>+			 struct ixgbe_ring *rx_ring,</div><div class='add'>+			 struct xdp_buff *xdp)</div><div class='ctx'> {</div><div class='ctx'> 	int err, result = IXGBE_XDP_PASS;</div><div class='ctx'> 	struct bpf_prog *xdp_prog;</div><div class='hunk'>@@ -2271,7 +2449,7 @@ out_failure:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> xdp_out:</div><div class='del'>-	return ERR_PTR(-result);</div><div class='add'>+	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int ixgbe_rx_frame_truesize(struct ixgbe_ring *rx_ring,</div><div class='hunk'>@@ -2311,7 +2489,7 @@ static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,</div><div class='ctx'>  * This function provides a "bounce buffer" approach to Rx interrupt</div><div class='ctx'>  * processing.  The advantage to this is that on systems that have</div><div class='ctx'>  * expensive overhead for IOMMU access this provides a means of avoiding</div><div class='del'>- * it by maintaining the mapping of the page to the syste.</div><div class='add'>+ * it by maintaining the mapping of the page to the system.</div><div class='ctx'>  *</div><div class='ctx'>  * Returns amount of work completed</div><div class='ctx'>  **/</div><div class='hunk'>@@ -2329,6 +2507,7 @@ static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,</div><div class='ctx'> 	unsigned int offset = rx_ring-&gt;rx_offset;</div><div class='ctx'> 	unsigned int xdp_xmit = 0;</div><div class='ctx'> 	struct xdp_buff xdp;</div><div class='add'>+	int xdp_res = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Frame size depend on rx_ring setup when PAGE_SIZE=4K */</div><div class='ctx'> #if (PAGE_SIZE &lt; 8192)</div><div class='hunk'>@@ -2374,12 +2553,10 @@ static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,</div><div class='ctx'> 			/* At larger PAGE_SIZE, frame_sz depend on len size */</div><div class='ctx'> 			xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, size);</div><div class='ctx'> #endif</div><div class='del'>-			skb = ixgbe_run_xdp(adapter, rx_ring, &amp;xdp);</div><div class='add'>+			xdp_res = ixgbe_run_xdp(adapter, rx_ring, &amp;xdp);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (IS_ERR(skb)) {</div><div class='del'>-			unsigned int xdp_res = -PTR_ERR(skb);</div><div class='del'>-</div><div class='add'>+		if (xdp_res) {</div><div class='ctx'> 			if (xdp_res &amp; (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {</div><div class='ctx'> 				xdp_xmit |= xdp_res;</div><div class='ctx'> 				ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);</div><div class='hunk'>@@ -2399,7 +2576,7 @@ static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* exit if we failed to retrieve a buffer */</div><div class='del'>-		if (!skb) {</div><div class='add'>+		if (!xdp_res &amp;&amp; !skb) {</div><div class='ctx'> 			rx_ring-&gt;rx_stats.alloc_rx_buff_failed++;</div><div class='ctx'> 			rx_buffer-&gt;pagecnt_bias++;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -2413,7 +2590,7 @@ static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* verify the packet layout is correct */</div><div class='del'>-		if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))</div><div class='add'>+		if (xdp_res || ixgbe_cleanup_headers(rx_ring, rx_desc, skb))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* probably a little skewed due to removing CRC */</div><div class='hunk'>@@ -2514,6 +2691,7 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		ixgbe_set_ivar(adapter, -1, 1, v_idx);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -2527,6 +2705,9 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		  IXGBE_EIMS_MAILBOX |</div><div class='ctx'> 		  IXGBE_EIMS_LSC);</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;hw.mac.type == ixgbe_mac_e610)</div><div class='add'>+		mask &amp;= ~IXGBE_EIMS_FW_EVENT;</div><div class='add'>+</div><div class='ctx'> 	IXGBE_WRITE_REG(&amp;adapter-&gt;hw, IXGBE_EIAC, mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2743,6 +2924,7 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * set the WDIS bit to not clear the timer bits and cause an</div><div class='ctx'> 		 * immediate assertion of the interrupt</div><div class='hunk'>@@ -2965,6 +3147,226 @@ static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ixgbe_check_phy_fw_load - check if PHY FW load failed</div><div class='add'>+ * @adapter: pointer to adapter structure</div><div class='add'>+ * @link_cfg_err: bitmap from the link info structure</div><div class='add'>+ *</div><div class='add'>+ * Check if external PHY FW load failed and print an error message if it did.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_check_phy_fw_load(struct ixgbe_adapter *adapter,</div><div class='add'>+				    u8 link_cfg_err)</div><div class='add'>+{</div><div class='add'>+	if (!(link_cfg_err &amp; IXGBE_ACI_LINK_EXTERNAL_PHY_LOAD_FAILURE)) {</div><div class='add'>+		adapter-&gt;flags2 &amp;= ~IXGBE_FLAG2_PHY_FW_LOAD_FAILED;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;flags2 &amp; IXGBE_FLAG2_PHY_FW_LOAD_FAILED)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (link_cfg_err &amp; IXGBE_ACI_LINK_EXTERNAL_PHY_LOAD_FAILURE) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Device failed to load the FW for the external PHY. Please download and install the latest NVM for your device and try again\n");</div><div class='add'>+		adapter-&gt;flags2 |= IXGBE_FLAG2_PHY_FW_LOAD_FAILED;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_check_module_power - check module power level</div><div class='add'>+ * @adapter: pointer to adapter structure</div><div class='add'>+ * @link_cfg_err: bitmap from the link info structure</div><div class='add'>+ *</div><div class='add'>+ * Check module power level returned by a previous call to aci_get_link_info</div><div class='add'>+ * and print error messages if module power level is not supported.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_check_module_power(struct ixgbe_adapter *adapter,</div><div class='add'>+				     u8 link_cfg_err)</div><div class='add'>+{</div><div class='add'>+	/* If module power level is supported, clear the flag. */</div><div class='add'>+	if (!(link_cfg_err &amp; (IXGBE_ACI_LINK_INVAL_MAX_POWER_LIMIT |</div><div class='add'>+			      IXGBE_ACI_LINK_MODULE_POWER_UNSUPPORTED))) {</div><div class='add'>+		adapter-&gt;flags2 &amp;= ~IXGBE_FLAG2_MOD_POWER_UNSUPPORTED;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If IXGBE_FLAG2_MOD_POWER_UNSUPPORTED was previously set and the</div><div class='add'>+	 * above block didn't clear this bit, there's nothing to do.</div><div class='add'>+	 */</div><div class='add'>+	if (adapter-&gt;flags2 &amp; IXGBE_FLAG2_MOD_POWER_UNSUPPORTED)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (link_cfg_err &amp; IXGBE_ACI_LINK_INVAL_MAX_POWER_LIMIT) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "The installed module is incompatible with the device's NVM image. Cannot start link.\n");</div><div class='add'>+		adapter-&gt;flags2 |= IXGBE_FLAG2_MOD_POWER_UNSUPPORTED;</div><div class='add'>+	} else if (link_cfg_err &amp; IXGBE_ACI_LINK_MODULE_POWER_UNSUPPORTED) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "The module's power requirements exceed the device's power supply. Cannot start link.\n");</div><div class='add'>+		adapter-&gt;flags2 |= IXGBE_FLAG2_MOD_POWER_UNSUPPORTED;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_check_link_cfg_err - check if link configuration failed</div><div class='add'>+ * @adapter: pointer to adapter structure</div><div class='add'>+ * @link_cfg_err: bitmap from the link info structure</div><div class='add'>+ *</div><div class='add'>+ * Print if any link configuration failure happens due to the value in the</div><div class='add'>+ * link_cfg_err parameter in the link info structure.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_check_link_cfg_err(struct ixgbe_adapter *adapter,</div><div class='add'>+				     u8 link_cfg_err)</div><div class='add'>+{</div><div class='add'>+	ixgbe_check_module_power(adapter, link_cfg_err);</div><div class='add'>+	ixgbe_check_phy_fw_load(adapter, link_cfg_err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_process_link_status_event - process the link event</div><div class='add'>+ * @adapter: pointer to adapter structure</div><div class='add'>+ * @link_up: true if the physical link is up and false if it is down</div><div class='add'>+ * @link_speed: current link speed received from the link event</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or negative value on failure.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+ixgbe_process_link_status_event(struct ixgbe_adapter *adapter, bool link_up,</div><div class='add'>+				u16 link_speed)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	/* Update the link info structures and re-enable link events,</div><div class='add'>+	 * don't bail on failure due to other book keeping needed.</div><div class='add'>+	 */</div><div class='add'>+	status = ixgbe_update_link_info(hw);</div><div class='add'>+	if (status)</div><div class='add'>+		e_dev_err("Failed to update link status, err %d aq_err %d\n",</div><div class='add'>+			  status, hw-&gt;aci.last_status);</div><div class='add'>+</div><div class='add'>+	ixgbe_check_link_cfg_err(adapter, hw-&gt;link.link_info.link_cfg_err);</div><div class='add'>+</div><div class='add'>+	/* Check if the link state is up after updating link info, and treat</div><div class='add'>+	 * this event as an UP event since the link is actually UP now.</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;link.link_info.link_info &amp; IXGBE_ACI_LINK_UP)</div><div class='add'>+		link_up = true;</div><div class='add'>+</div><div class='add'>+	/* Turn off PHY if media was removed. */</div><div class='add'>+	if (!(adapter-&gt;flags2 &amp; IXGBE_FLAG2_NO_MEDIA) &amp;&amp;</div><div class='add'>+	    !(hw-&gt;link.link_info.link_info &amp; IXGBE_ACI_MEDIA_AVAILABLE))</div><div class='add'>+		adapter-&gt;flags2 |= IXGBE_FLAG2_NO_MEDIA;</div><div class='add'>+</div><div class='add'>+	if (link_up == adapter-&gt;link_up &amp;&amp;</div><div class='add'>+	    link_up == netif_carrier_ok(adapter-&gt;netdev) &amp;&amp;</div><div class='add'>+	    link_speed == adapter-&gt;link_speed)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;flags |= IXGBE_FLAG_NEED_LINK_UPDATE;</div><div class='add'>+	adapter-&gt;link_check_timeout = jiffies;</div><div class='add'>+	ixgbe_watchdog_update_link(adapter);</div><div class='add'>+</div><div class='add'>+	if (link_up)</div><div class='add'>+		ixgbe_watchdog_link_is_up(adapter);</div><div class='add'>+	else</div><div class='add'>+		ixgbe_watchdog_link_is_down(adapter);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_handle_link_status_event - handle link status event via ACI</div><div class='add'>+ * @adapter: pointer to adapter structure</div><div class='add'>+ * @e: event structure containing link status info</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+ixgbe_handle_link_status_event(struct ixgbe_adapter *adapter,</div><div class='add'>+			       struct ixgbe_aci_event *e)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_cmd_get_link_status_data *link_data;</div><div class='add'>+	u16 link_speed;</div><div class='add'>+	bool link_up;</div><div class='add'>+</div><div class='add'>+	link_data = (struct ixgbe_aci_cmd_get_link_status_data *)e-&gt;msg_buf;</div><div class='add'>+</div><div class='add'>+	link_up = !!(link_data-&gt;link_info &amp; IXGBE_ACI_LINK_UP);</div><div class='add'>+	link_speed = le16_to_cpu(link_data-&gt;link_speed);</div><div class='add'>+</div><div class='add'>+	if (ixgbe_process_link_status_event(adapter, link_up, link_speed))</div><div class='add'>+		e_dev_warn("Could not process link status event");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_schedule_fw_event - schedule Firmware event</div><div class='add'>+ * @adapter: pointer to the adapter structure</div><div class='add'>+ *</div><div class='add'>+ * If the adapter is not in down, removing or resetting state,</div><div class='add'>+ * an event is scheduled.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_schedule_fw_event(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (!test_bit(__IXGBE_DOWN, &amp;adapter-&gt;state) &amp;&amp;</div><div class='add'>+	    !test_bit(__IXGBE_REMOVING, &amp;adapter-&gt;state) &amp;&amp;</div><div class='add'>+	    !test_bit(__IXGBE_RESETTING, &amp;adapter-&gt;state)) {</div><div class='add'>+		adapter-&gt;flags2 |= IXGBE_FLAG2_FW_ASYNC_EVENT;</div><div class='add'>+		ixgbe_service_event_schedule(adapter);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_aci_event_cleanup - release msg_buf memory</div><div class='add'>+ * @event: pointer to the event holding msg_buf to be released</div><div class='add'>+ *</div><div class='add'>+ * Clean memory allocated for event's msg_buf. Implements auto memory cleanup.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_aci_event_cleanup(struct ixgbe_aci_event *event)</div><div class='add'>+{</div><div class='add'>+	kfree(event-&gt;msg_buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_handle_fw_event - handle Firmware event</div><div class='add'>+ * @adapter: pointer to the adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Obtain an event from the ACI and then and then process it according to the</div><div class='add'>+ * type of the event and the opcode.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_handle_fw_event(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_aci_event event __cleanup(ixgbe_aci_event_cleanup);</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	bool pending = false;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;flags2 &amp; IXGBE_FLAG2_FW_ASYNC_EVENT)</div><div class='add'>+		adapter-&gt;flags2 &amp;= ~IXGBE_FLAG2_FW_ASYNC_EVENT;</div><div class='add'>+	event.buf_len = IXGBE_ACI_MAX_BUFFER_SIZE;</div><div class='add'>+	event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);</div><div class='add'>+	if (!event.msg_buf)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		err = ixgbe_aci_get_event(hw, &amp;event, &amp;pending);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		switch (le16_to_cpu(event.desc.opcode)) {</div><div class='add'>+		case ixgbe_aci_opc_get_link_status:</div><div class='add'>+			ixgbe_handle_link_status_event(adapter, &amp;event);</div><div class='add'>+			break;</div><div class='add'>+		case ixgbe_aci_opc_temp_tca_event:</div><div class='add'>+			e_crit(drv, "%s\n", ixgbe_overheat_msg);</div><div class='add'>+			ixgbe_down(adapter);</div><div class='add'>+			break;</div><div class='add'>+		case libie_aqc_opc_fw_logs_event:</div><div class='add'>+			libie_get_fwlog_data(&amp;hw-&gt;fwlog, event.msg_buf,</div><div class='add'>+					     le16_to_cpu(event.desc.datalen));</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			e_warn(hw, "unknown FW async event captured\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} while (pending);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,</div><div class='ctx'> 					   u64 qmask)</div><div class='ctx'> {</div><div class='hunk'>@@ -2981,6 +3383,7 @@ static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		mask = (qmask &amp; 0xFFFFFFFF);</div><div class='ctx'> 		if (mask)</div><div class='ctx'> 			IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);</div><div class='hunk'>@@ -3034,6 +3437,9 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,</div><div class='ctx'> 	case ixgbe_mac_X540:</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='add'>+		mask |= IXGBE_EIMS_FW_EVENT;</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='ctx'> 		if (adapter-&gt;hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||</div><div class='ctx'> 		    adapter-&gt;hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||</div><div class='hunk'>@@ -3090,12 +3496,16 @@ static irqreturn_t ixgbe_msix_other(int irq, void *data)</div><div class='ctx'> 	if (eicr &amp; IXGBE_EICR_MAILBOX)</div><div class='ctx'> 		ixgbe_msg_task(adapter);</div><div class='ctx'> </div><div class='add'>+	if (eicr &amp; IXGBE_EICR_FW_EVENT)</div><div class='add'>+		ixgbe_schedule_fw_event(adapter);</div><div class='add'>+</div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='ctx'> 	case ixgbe_mac_82599EB:</div><div class='ctx'> 	case ixgbe_mac_X540:</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		if (hw-&gt;phy.type == ixgbe_phy_x550em_ext_t &amp;&amp;</div><div class='ctx'> 		    (eicr &amp; IXGBE_EICR_GPI_SDP0_X540)) {</div><div class='ctx'> 			adapter-&gt;flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;</div><div class='hunk'>@@ -3333,6 +3743,9 @@ static irqreturn_t ixgbe_intr(int irq, void *data)</div><div class='ctx'> 	if (eicr &amp; IXGBE_EICR_LSC)</div><div class='ctx'> 		ixgbe_check_lsc(adapter);</div><div class='ctx'> </div><div class='add'>+	if (eicr &amp; IXGBE_EICR_FW_EVENT)</div><div class='add'>+		ixgbe_schedule_fw_event(adapter);</div><div class='add'>+</div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='ctx'> 	case ixgbe_mac_82599EB:</div><div class='ctx'> 		ixgbe_check_sfp_event(adapter, eicr);</div><div class='hunk'>@@ -3341,6 +3754,7 @@ static irqreturn_t ixgbe_intr(int irq, void *data)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		if (eicr &amp; IXGBE_EICR_ECC) {</div><div class='ctx'> 			e_info(link, "Received ECC Err, initiating reset\n");</div><div class='ctx'> 			set_bit(__IXGBE_RESET_REQUESTED, &amp;adapter-&gt;state);</div><div class='hunk'>@@ -3441,6 +3855,7 @@ static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		IXGBE_WRITE_REG(&amp;adapter-&gt;hw, IXGBE_EIMC, 0xFFFF0000);</div><div class='ctx'> 		IXGBE_WRITE_REG(&amp;adapter-&gt;hw, IXGBE_EIMC_EX(0), ~0);</div><div class='ctx'> 		IXGBE_WRITE_REG(&amp;adapter-&gt;hw, IXGBE_EIMC_EX(1), ~0);</div><div class='hunk'>@@ -3688,8 +4103,12 @@ void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)</div><div class='ctx'> static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)</div><div class='ctx'> #endif</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='ctx'> 	bool pfc_en = adapter-&gt;dcb_cfg.pfc_mode_enable;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.ops.disable_mdd)</div><div class='add'>+		hw-&gt;mac.ops.disable_mdd(hw);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;ixgbe_ieee_pfc)</div><div class='ctx'> 		pfc_en |= !!(adapter-&gt;ixgbe_ieee_pfc-&gt;pfc_en);</div><div class='hunk'>@@ -3711,6 +4130,9 @@ static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++)</div><div class='ctx'> 			ixgbe_disable_rx_drop(adapter, adapter-&gt;rx_ring[i]);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.ops.enable_mdd)</div><div class='add'>+		hw-&gt;mac.ops.enable_mdd(hw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2</div><div class='hunk'>@@ -4358,6 +4780,7 @@ static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		if (adapter-&gt;num_vfs)</div><div class='ctx'> 			rdrxctl |= IXGBE_RDRXCTL_PSP;</div><div class='ctx'> 		fallthrough;</div><div class='hunk'>@@ -4433,7 +4856,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)</div><div class='ctx'> static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,</div><div class='ctx'> 				 __be16 proto, u16 vid)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	/* add VID to filter table */</div><div class='hunk'>@@ -4492,7 +4915,7 @@ void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)</div><div class='ctx'> static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,</div><div class='ctx'> 				  __be16 proto, u16 vid)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	/* remove VID from filter table */</div><div class='hunk'>@@ -4525,6 +4948,7 @@ static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++) {</div><div class='ctx'> 			struct ixgbe_ring *ring = adapter-&gt;rx_ring[i];</div><div class='ctx'> </div><div class='hunk'>@@ -4563,6 +4987,7 @@ static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		for (i = 0; i &lt; adapter-&gt;num_rx_queues; i++) {</div><div class='ctx'> 			struct ixgbe_ring *ring = adapter-&gt;rx_ring[i];</div><div class='ctx'> </div><div class='hunk'>@@ -4637,7 +5062,7 @@ static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)</div><div class='ctx'> 		/* pull VLAN ID from VLVF */</div><div class='ctx'> 		vid = vlvf &amp; VLAN_VID_MASK;</div><div class='ctx'> </div><div class='del'>-		/* only concern outselves with a certain range */</div><div class='add'>+		/* only concern ourselves with a certain range */</div><div class='ctx'> 		if (vid &lt; vid_start || vid &gt;= vid_end)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -4715,7 +5140,7 @@ static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> static int ixgbe_write_mc_addr_list(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(netdev))</div><div class='hunk'>@@ -4891,7 +5316,7 @@ int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));</div><div class='hunk'>@@ -4901,7 +5326,7 @@ static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));</div><div class='ctx'> </div><div class='hunk'>@@ -4919,7 +5344,7 @@ static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)</div><div class='ctx'>  **/</div><div class='ctx'> void ixgbe_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;</div><div class='ctx'> 	netdev_features_t features = netdev-&gt;features;</div><div class='hunk'>@@ -5021,7 +5446,7 @@ static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_udp_tunnel_sync(struct net_device *dev, unsigned int table)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct udp_tunnel_info ti;</div><div class='ctx'> </div><div class='hunk'>@@ -5147,6 +5572,7 @@ static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		dv_id = IXGBE_DV_X540(link, tc);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -5207,6 +5633,7 @@ static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		dv_id = IXGBE_LOW_DV_X540(tc);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -5509,6 +5936,48 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ixgbe_enable_link_status_events - enable link status events</div><div class='add'>+ * @adapter: pointer to the adapter structure</div><div class='add'>+ * @mask: event mask to be set</div><div class='add'>+ *</div><div class='add'>+ * Enables link status events by invoking ixgbe_configure_lse()</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_enable_link_status_events(struct ixgbe_adapter *adapter,</div><div class='add'>+					   u16 mask)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_configure_lse(&amp;adapter-&gt;hw, true, mask);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;lse_mask = mask;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_disable_link_status_events - disable link status events</div><div class='add'>+ * @adapter: pointer to the adapter structure</div><div class='add'>+ *</div><div class='add'>+ * Disables link status events by invoking ixgbe_configure_lse()</div><div class='add'>+ *</div><div class='add'>+ * Return: the exit code of the operation.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_disable_link_status_events(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ixgbe_configure_lse(&amp;adapter-&gt;hw, false, adapter-&gt;lse_mask);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;lse_mask = 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ixgbe_sfp_link_config - set up SFP+ link</div><div class='ctx'>  * @adapter: pointer to private adapter struct</div><div class='ctx'>  **/</div><div class='hunk'>@@ -5531,13 +6000,21 @@ static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)</div><div class='ctx'>  * ixgbe_non_sfp_link_config - set up non-SFP+ link</div><div class='ctx'>  * @hw: pointer to private hardware struct</div><div class='ctx'>  *</div><div class='del'>- * Returns 0 on success, negative on failure</div><div class='add'>+ * Configure non-SFP link.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative on failure</div><div class='ctx'>  **/</div><div class='ctx'> static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='del'>-	u32 speed;</div><div class='add'>+	struct ixgbe_adapter *adapter = container_of(hw, struct ixgbe_adapter,</div><div class='add'>+						     hw);</div><div class='add'>+	u16 mask = ~((u16)(IXGBE_ACI_LINK_EVENT_UPDOWN |</div><div class='add'>+			   IXGBE_ACI_LINK_EVENT_MEDIA_NA |</div><div class='add'>+			   IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL |</div><div class='add'>+			   IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL));</div><div class='ctx'> 	bool autoneg, link_up = false;</div><div class='ctx'> 	int ret = -EIO;</div><div class='add'>+	u32 speed;</div><div class='ctx'> </div><div class='ctx'> 	if (hw-&gt;mac.ops.check_link)</div><div class='ctx'> 		ret = hw-&gt;mac.ops.check_link(hw, &amp;speed, &amp;link_up, false);</div><div class='hunk'>@@ -5560,13 +6037,53 @@ static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;mac.ops.setup_link)</div><div class='add'>+	if (hw-&gt;mac.ops.setup_link) {</div><div class='add'>+		if (adapter-&gt;hw.mac.type == ixgbe_mac_e610) {</div><div class='add'>+			ret = ixgbe_enable_link_status_events(adapter, mask);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='ctx'> 		ret = hw-&gt;mac.ops.setup_link(hw, speed, link_up);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ixgbe_check_media_subtask - check for media</div><div class='add'>+ * @adapter: pointer to adapter structure</div><div class='add'>+ *</div><div class='add'>+ * If media is available then initialize PHY user configuration. Configure the</div><div class='add'>+ * PHY if the interface is up.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_check_media_subtask(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	/* No need to check for media if it's already present */</div><div class='add'>+	if (!(adapter-&gt;flags2 &amp; IXGBE_FLAG2_NO_MEDIA))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Refresh link info and check if media is present */</div><div class='add'>+	if (ixgbe_update_link_info(hw))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ixgbe_check_link_cfg_err(adapter, hw-&gt;link.link_info.link_cfg_err);</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;link.link_info.link_info &amp; IXGBE_ACI_MEDIA_AVAILABLE) {</div><div class='add'>+		/* PHY settings are reset on media insertion, reconfigure</div><div class='add'>+		 * PHY to preserve settings.</div><div class='add'>+		 */</div><div class='add'>+		if (!(ixgbe_non_sfp_link_config(&amp;adapter-&gt;hw)))</div><div class='add'>+			adapter-&gt;flags2 &amp;= ~IXGBE_FLAG2_NO_MEDIA;</div><div class='add'>+</div><div class='add'>+		/* A Link Status Event will be generated; the event handler</div><div class='add'>+		 * will complete bringing the interface up</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ixgbe_clear_vf_stats_counters - Clear out VF stats after reset</div><div class='ctx'>  * @adapter: board private structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -5629,6 +6146,7 @@ static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		case ixgbe_mac_X550:</div><div class='ctx'> 		case ixgbe_mac_X550EM_x:</div><div class='ctx'> 		case ixgbe_mac_x550em_a:</div><div class='add'>+		case ixgbe_mac_e610:</div><div class='ctx'> 		default:</div><div class='ctx'> 			IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);</div><div class='ctx'> 			IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);</div><div class='hunk'>@@ -5979,6 +6497,7 @@ dma_engine_disable:</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,</div><div class='ctx'> 				(IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &amp;</div><div class='ctx'> 				 ~IXGBE_DMATXCTL_TE));</div><div class='hunk'>@@ -6197,7 +6716,7 @@ void ixgbe_down(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	adapter-&gt;flags2 &amp;= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;</div><div class='ctx'> 	adapter-&gt;flags &amp;= ~IXGBE_FLAG_NEED_LINK_UPDATE;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;service_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;service_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;num_vfs) {</div><div class='ctx'> 		/* Clear EITR Select mapping */</div><div class='hunk'>@@ -6223,6 +6742,8 @@ void ixgbe_down(struct ixgbe_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	ixgbe_clean_all_tx_rings(adapter);</div><div class='ctx'> 	ixgbe_clean_all_rx_rings(adapter);</div><div class='add'>+	if (adapter-&gt;hw.mac.type == ixgbe_mac_e610)</div><div class='add'>+		ixgbe_disable_link_status_events(adapter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -6257,7 +6778,7 @@ static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> static void ixgbe_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Do the reset outside of interrupt context */</div><div class='ctx'> 	ixgbe_tx_timeout_reset(adapter);</div><div class='hunk'>@@ -6278,6 +6799,7 @@ static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ixgbe_mac_X540:</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		adapter-&gt;dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;</div><div class='ctx'> 		adapter-&gt;dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -6341,6 +6863,8 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	hw-&gt;subsystem_vendor_id = pdev-&gt;subsystem_vendor;</div><div class='ctx'> 	hw-&gt;subsystem_device_id = pdev-&gt;subsystem_device;</div><div class='ctx'> </div><div class='add'>+	hw-&gt;mac.max_link_up_time = IXGBE_LINK_UP_TIME;</div><div class='add'>+</div><div class='ctx'> 	/* get_invariants needs the device IDs */</div><div class='ctx'> 	ii-&gt;get_invariants(hw);</div><div class='ctx'> </div><div class='hunk'>@@ -6454,6 +6978,13 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Make sure the SWFW semaphore is in a valid state */</div><div class='add'>+	if (hw-&gt;mac.ops.init_swfw_sync)</div><div class='add'>+		hw-&gt;mac.ops.init_swfw_sync(hw);</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_e610)</div><div class='add'>+		mutex_init(&amp;hw-&gt;aci.lock);</div><div class='add'>+</div><div class='ctx'> #ifdef IXGBE_FCOE</div><div class='ctx'> 	/* FCoE support exists, always init the FCoE lock */</div><div class='ctx'> 	spin_lock_init(&amp;adapter-&gt;fcoe.lock);</div><div class='hunk'>@@ -6503,7 +7034,7 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	adapter-&gt;tx_work_limit = IXGBE_DEFAULT_TX_WORK;</div><div class='ctx'> </div><div class='ctx'> 	/* initialize eeprom parameters */</div><div class='del'>-	if (ixgbe_init_eeprom_params_generic(hw)) {</div><div class='add'>+	if (hw-&gt;eeprom.ops.init_params(hw)) {</div><div class='ctx'> 		e_dev_err("EEPROM initialization failed\n");</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6819,7 +7350,7 @@ static int ixgbe_max_xdp_frame_size(struct ixgbe_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (ixgbe_enabled_xdp_adapter(adapter)) {</div><div class='ctx'> 		int new_frame_size = new_mtu + IXGBE_PKT_HDR_PAD;</div><div class='hunk'>@@ -6866,7 +7397,7 @@ static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'>  **/</div><div class='ctx'> int ixgbe_open(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	int err, queues;</div><div class='ctx'> </div><div class='hunk'>@@ -6908,6 +7439,19 @@ int ixgbe_open(struct net_device *netdev)</div><div class='ctx'> 	ixgbe_up_complete(adapter);</div><div class='ctx'> </div><div class='ctx'> 	udp_tunnel_nic_reset_ntf(netdev);</div><div class='add'>+	if (adapter-&gt;hw.mac.type == ixgbe_mac_e610) {</div><div class='add'>+		int err = ixgbe_update_link_info(&amp;adapter-&gt;hw);</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			e_dev_err("Failed to update link info, err %d.\n", err);</div><div class='add'>+</div><div class='add'>+		ixgbe_check_link_cfg_err(adapter,</div><div class='add'>+					 adapter-&gt;hw.link.link_info.link_cfg_err);</div><div class='add'>+</div><div class='add'>+		err = ixgbe_non_sfp_link_config(&amp;adapter-&gt;hw);</div><div class='add'>+		if (err)</div><div class='add'>+			e_dev_err("Link setup failed, err %d.\n", err);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -6957,7 +7501,7 @@ static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> int ixgbe_close(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	ixgbe_ptp_stop(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -7061,6 +7605,7 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		pci_wake_from_d3(pdev, !!wufc);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -7208,6 +7753,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		case ixgbe_mac_X550:</div><div class='ctx'> 		case ixgbe_mac_X550EM_x:</div><div class='ctx'> 		case ixgbe_mac_x550em_a:</div><div class='add'>+		case ixgbe_mac_e610:</div><div class='ctx'> 			hwstats-&gt;pxonrxc[i] +=</div><div class='ctx'> 				IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -7220,11 +7766,12 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	for (i = 0; i &lt; 16; i++) {</div><div class='ctx'> 		hwstats-&gt;qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));</div><div class='ctx'> 		hwstats-&gt;qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));</div><div class='del'>-		if ((hw-&gt;mac.type == ixgbe_mac_82599EB) ||</div><div class='del'>-		    (hw-&gt;mac.type == ixgbe_mac_X540) ||</div><div class='del'>-		    (hw-&gt;mac.type == ixgbe_mac_X550) ||</div><div class='del'>-		    (hw-&gt;mac.type == ixgbe_mac_X550EM_x) ||</div><div class='del'>-		    (hw-&gt;mac.type == ixgbe_mac_x550em_a)) {</div><div class='add'>+		if (hw-&gt;mac.type == ixgbe_mac_82599EB ||</div><div class='add'>+		    hw-&gt;mac.type == ixgbe_mac_X540 ||</div><div class='add'>+		    hw-&gt;mac.type == ixgbe_mac_X550 ||</div><div class='add'>+		    hw-&gt;mac.type == ixgbe_mac_X550EM_x ||</div><div class='add'>+		    hw-&gt;mac.type == ixgbe_mac_x550em_a ||</div><div class='add'>+		    hw-&gt;mac.type == ixgbe_mac_e610) {</div><div class='ctx'> 			hwstats-&gt;qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));</div><div class='ctx'> 			IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */</div><div class='ctx'> 			hwstats-&gt;qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));</div><div class='hunk'>@@ -7250,6 +7797,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		/* OS2BMC stats are X540 and later */</div><div class='ctx'> 		hwstats-&gt;o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);</div><div class='ctx'> 		hwstats-&gt;o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);</div><div class='hunk'>@@ -7432,12 +7980,9 @@ static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Force detection of hung controller */</div><div class='del'>-	if (netif_carrier_ok(adapter-&gt;netdev)) {</div><div class='add'>+	if (netif_carrier_ok(adapter-&gt;netdev))</div><div class='ctx'> 		for (i = 0; i &lt; adapter-&gt;num_tx_queues; i++)</div><div class='ctx'> 			set_check_for_tx_hang(adapter-&gt;tx_ring[i]);</div><div class='del'>-		for (i = 0; i &lt; adapter-&gt;num_xdp_queues; i++)</div><div class='del'>-			set_check_for_tx_hang(adapter-&gt;xdp_ring[i]);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (!(adapter-&gt;flags &amp; IXGBE_FLAG_MSIX_ENABLED)) {</div><div class='ctx'> 		/*</div><div class='hunk'>@@ -7550,6 +8095,7 @@ static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 	case ixgbe_mac_82599EB: {</div><div class='ctx'> 		u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);</div><div class='ctx'> 		u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);</div><div class='hunk'>@@ -7599,6 +8145,9 @@ static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	netif_carrier_on(netdev);</div><div class='ctx'> 	ixgbe_check_vf_rate_limit(adapter);</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;num_vfs &amp;&amp; hw-&gt;mac.ops.enable_mdd)</div><div class='add'>+		hw-&gt;mac.ops.enable_mdd(hw);</div><div class='add'>+</div><div class='ctx'> 	/* enable transmits */</div><div class='ctx'> 	netif_tx_wake_all_queues(adapter-&gt;netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -7626,6 +8175,8 @@ static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	if (!netif_carrier_ok(netdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	adapter-&gt;link_down_events++;</div><div class='add'>+</div><div class='ctx'> 	/* poll for SFP+ cable when link is down */</div><div class='ctx'> 	if (ixgbe_is_sfp(hw) &amp;&amp; hw-&gt;mac.type == ixgbe_mac_82598EB)</div><div class='ctx'> 		adapter-&gt;flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;</div><div class='hunk'>@@ -7651,13 +8202,6 @@ static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)</div><div class='ctx'> 			return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; adapter-&gt;num_xdp_queues; i++) {</div><div class='del'>-		struct ixgbe_ring *ring = adapter-&gt;xdp_ring[i];</div><div class='del'>-</div><div class='del'>-		if (ring-&gt;next_to_use != ring-&gt;next_to_clean)</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7945,7 +8489,8 @@ static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> static void ixgbe_service_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);</div><div class='add'>+	struct ixgbe_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							   service_timer);</div><div class='ctx'> 	unsigned long next_event_offset;</div><div class='ctx'> </div><div class='ctx'> 	/* poll faster when waiting for link */</div><div class='hunk'>@@ -8000,6 +8545,34 @@ static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ixgbe_check_fw_api_mismatch(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type != ixgbe_mac_e610)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.ops.get_fw_ver &amp;&amp; hw-&gt;mac.ops.get_fw_ver(hw))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;api_maj_ver &gt; IXGBE_FW_API_VER_MAJOR) {</div><div class='add'>+		e_dev_err("The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");</div><div class='add'>+</div><div class='add'>+		adapter-&gt;flags2 |= IXGBE_FLAG2_API_MISMATCH;</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	} else if (hw-&gt;api_maj_ver == IXGBE_FW_API_VER_MAJOR &amp;&amp;</div><div class='add'>+		   hw-&gt;api_min_ver &gt; IXGBE_FW_API_VER_MINOR + IXGBE_FW_API_VER_DIFF_ALLOWED) {</div><div class='add'>+		e_dev_info("The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");</div><div class='add'>+		adapter-&gt;flags2 |= IXGBE_FLAG2_API_MISMATCH;</div><div class='add'>+	} else if (hw-&gt;api_maj_ver &lt; IXGBE_FW_API_VER_MAJOR ||</div><div class='add'>+		   hw-&gt;api_min_ver &lt; IXGBE_FW_API_VER_MINOR - IXGBE_FW_API_VER_DIFF_ALLOWED) {</div><div class='add'>+		e_dev_info("The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");</div><div class='add'>+		adapter-&gt;flags2 |= IXGBE_FLAG2_API_MISMATCH;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ixgbe_check_fw_error - Check firmware for errors</div><div class='ctx'>  * @adapter: the adapter private structure</div><div class='hunk'>@@ -8010,12 +8583,14 @@ static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 fwsm;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* read fwsm.ext_err_ind register and log errors */</div><div class='ctx'> 	fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));</div><div class='ctx'> </div><div class='add'>+	/* skip if E610's FW is reloading, warning in that case may be misleading */</div><div class='ctx'> 	if (fwsm &amp; IXGBE_FWSM_EXT_ERR_IND_MASK ||</div><div class='del'>-	    !(fwsm &amp; IXGBE_FWSM_FW_VAL_BIT))</div><div class='add'>+	    (!(fwsm &amp; IXGBE_FWSM_FW_VAL_BIT) &amp;&amp; !(hw-&gt;mac.type == ixgbe_mac_e610)))</div><div class='ctx'> 		e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",</div><div class='ctx'> 			   fwsm);</div><div class='ctx'> </div><div class='hunk'>@@ -8023,10 +8598,53 @@ static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='add'>+	if (!(adapter-&gt;flags2 &amp; IXGBE_FLAG2_API_MISMATCH)) {</div><div class='add'>+		err = ixgbe_check_fw_api_mismatch(adapter);</div><div class='add'>+		if (err)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* return here if FW rollback mode has been already detected */</div><div class='add'>+	if (adapter-&gt;flags2 &amp; IXGBE_FLAG2_FW_ROLLBACK)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.ops.fw_rollback_mode &amp;&amp; hw-&gt;mac.ops.fw_rollback_mode(hw)) {</div><div class='add'>+		struct ixgbe_nvm_info *nvm_info = &amp;adapter-&gt;hw.flash.nvm;</div><div class='add'>+		char ver_buff[64] = "";</div><div class='add'>+</div><div class='add'>+		if (hw-&gt;mac.ops.get_fw_ver &amp;&amp; hw-&gt;mac.ops.get_fw_ver(hw))</div><div class='add'>+			goto no_version;</div><div class='add'>+</div><div class='add'>+		if (hw-&gt;mac.ops.get_nvm_ver &amp;&amp;</div><div class='add'>+		    hw-&gt;mac.ops.get_nvm_ver(hw, nvm_info))</div><div class='add'>+			goto no_version;</div><div class='add'>+</div><div class='add'>+		snprintf(ver_buff, sizeof(ver_buff),</div><div class='add'>+			 "Current version is NVM:%x.%x.%x, FW:%d.%d. ",</div><div class='add'>+			 nvm_info-&gt;major, nvm_info-&gt;minor, nvm_info-&gt;eetrack,</div><div class='add'>+			 hw-&gt;fw_maj_ver, hw-&gt;fw_maj_ver);</div><div class='add'>+no_version:</div><div class='add'>+		e_dev_warn("Firmware rollback mode detected. %sDevice may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode.",</div><div class='add'>+			   ver_buff);</div><div class='add'>+</div><div class='add'>+		adapter-&gt;flags2 |= IXGBE_FLAG2_FW_ROLLBACK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ixgbe_recovery_service_task(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_adapter *adapter = container_of(work,</div><div class='add'>+						     struct ixgbe_adapter,</div><div class='add'>+						     service_task);</div><div class='add'>+</div><div class='add'>+	ixgbe_handle_fw_event(adapter);</div><div class='add'>+	ixgbe_service_event_complete(adapter);</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;adapter-&gt;service_timer, jiffies + msecs_to_jiffies(100));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ixgbe_service_task - manages and runs subtasks</div><div class='ctx'>  * @work: pointer to work_struct containing our data</div><div class='hunk'>@@ -8046,11 +8664,21 @@ static void ixgbe_service_task(struct work_struct *work)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ixgbe_check_fw_error(adapter)) {</div><div class='del'>-		if (!test_bit(__IXGBE_DOWN, &amp;adapter-&gt;state))</div><div class='add'>+		if (!test_bit(__IXGBE_DOWN, &amp;adapter-&gt;state)) {</div><div class='add'>+			if (adapter-&gt;mii_bus) {</div><div class='add'>+				mdiobus_unregister(adapter-&gt;mii_bus);</div><div class='add'>+				adapter-&gt;mii_bus = NULL;</div><div class='add'>+			}</div><div class='ctx'> 			unregister_netdev(adapter-&gt;netdev);</div><div class='add'>+		}</div><div class='ctx'> 		ixgbe_service_event_complete(adapter);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+	if (adapter-&gt;hw.mac.type == ixgbe_mac_e610) {</div><div class='add'>+		if (adapter-&gt;flags2 &amp; IXGBE_FLAG2_FW_ASYNC_EVENT)</div><div class='add'>+			ixgbe_handle_fw_event(adapter);</div><div class='add'>+		ixgbe_check_media_subtask(adapter);</div><div class='add'>+	}</div><div class='ctx'> 	ixgbe_reset_subtask(adapter);</div><div class='ctx'> 	ixgbe_phy_interrupt_subtask(adapter);</div><div class='ctx'> 	ixgbe_sfp_detection_subtask(adapter);</div><div class='hunk'>@@ -8632,7 +9260,7 @@ static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,</div><div class='ctx'> 	switch (vlan_get_protocol(skb)) {</div><div class='ctx'> 	case htons(ETH_P_FCOE):</div><div class='ctx'> 	case htons(ETH_P_FIP):</div><div class='del'>-		adapter = netdev_priv(dev);</div><div class='add'>+		adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 		if (!sb_dev &amp;&amp; (adapter-&gt;flags &amp; IXGBE_FLAG_FCOE_ENABLED))</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -8891,7 +9519,7 @@ static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,</div><div class='ctx'> 				      struct net_device *netdev,</div><div class='ctx'> 				      struct ixgbe_ring *ring)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_ring *tx_ring;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -8923,7 +9551,7 @@ static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,</div><div class='ctx'>  **/</div><div class='ctx'> static int ixgbe_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct sockaddr *addr = p;</div><div class='ctx'> </div><div class='hunk'>@@ -8941,7 +9569,7 @@ static int ixgbe_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> static int</div><div class='ctx'> ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u16 value;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -8967,7 +9595,7 @@ ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)</div><div class='ctx'> static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,</div><div class='ctx'> 			    u16 addr, u16 value)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;mii_bus) {</div><div class='hunk'>@@ -8987,13 +9615,9 @@ static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return ixgbe_ptp_set_ts_config(adapter, req);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return ixgbe_ptp_get_ts_config(adapter, req);</div><div class='ctx'> 	case SIOCGMIIPHY:</div><div class='ctx'> 		if (!adapter-&gt;hw.phy.ops.read_reg)</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='hunk'>@@ -9013,7 +9637,7 @@ static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)</div><div class='ctx'> static int ixgbe_add_sanmac_netdev(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	if (is_valid_ether_addr(hw-&gt;mac.san_addr)) {</div><div class='hunk'>@@ -9037,7 +9661,7 @@ static int ixgbe_add_sanmac_netdev(struct net_device *dev)</div><div class='ctx'> static int ixgbe_del_sanmac_netdev(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_mac_info *mac = &amp;adapter-&gt;hw.mac;</div><div class='ctx'> </div><div class='ctx'> 	if (is_valid_ether_addr(mac-&gt;san_addr)) {</div><div class='hunk'>@@ -9068,7 +9692,7 @@ static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,</div><div class='ctx'> static void ixgbe_get_stats64(struct net_device *netdev,</div><div class='ctx'> 			      struct rtnl_link_stats64 *stats)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='hunk'>@@ -9111,7 +9735,7 @@ static void ixgbe_get_stats64(struct net_device *netdev,</div><div class='ctx'> static int ixgbe_ndo_get_vf_stats(struct net_device *netdev, int vf,</div><div class='ctx'> 				  struct ifla_vf_stats *vf_stats)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (vf &lt; 0 || vf &gt;= adapter-&gt;num_vfs)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -9228,7 +9852,7 @@ static int ixgbe_reassign_macvlan_pool(struct net_device *vdev,</div><div class='ctx'> </div><div class='ctx'> static void ixgbe_defrag_macvlan_pools(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct netdev_nested_priv priv = {</div><div class='ctx'> 		.data = (void *)adapter,</div><div class='ctx'> 	};</div><div class='hunk'>@@ -9249,7 +9873,7 @@ static void ixgbe_defrag_macvlan_pools(struct net_device *dev)</div><div class='ctx'>  */</div><div class='ctx'> int ixgbe_setup_tc(struct net_device *dev, u8 tc)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	/* Hardware supports up to 8 traffic classes */</div><div class='hunk'>@@ -9807,7 +10431,7 @@ static LIST_HEAD(ixgbe_block_cb_list);</div><div class='ctx'> static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,</div><div class='ctx'> 			    void *type_data)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case TC_SETUP_BLOCK:</div><div class='hunk'>@@ -9835,7 +10459,7 @@ void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)</div><div class='ctx'> #endif</div><div class='ctx'> void ixgbe_do_reset(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		ixgbe_reinit_locked(adapter);</div><div class='hunk'>@@ -9846,7 +10470,7 @@ void ixgbe_do_reset(struct net_device *netdev)</div><div class='ctx'> static netdev_features_t ixgbe_fix_features(struct net_device *netdev,</div><div class='ctx'> 					    netdev_features_t features)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* If Rx checksum is disabled, then RSC/LRO should also be disabled */</div><div class='ctx'> 	if (!(features &amp; NETIF_F_RXCSUM))</div><div class='hunk'>@@ -9883,7 +10507,7 @@ static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)</div><div class='ctx'> static int ixgbe_set_features(struct net_device *netdev,</div><div class='ctx'> 			      netdev_features_t features)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	netdev_features_t changed = netdev-&gt;features ^ features;</div><div class='ctx'> 	bool need_reset = false;</div><div class='ctx'> </div><div class='hunk'>@@ -9954,12 +10578,12 @@ static int ixgbe_set_features(struct net_device *netdev,</div><div class='ctx'> static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			     struct net_device *dev,</div><div class='ctx'> 			     const unsigned char *addr, u16 vid,</div><div class='del'>-			     u16 flags,</div><div class='add'>+			     u16 flags, bool *notified,</div><div class='ctx'> 			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	/* guarantee we can provide a unique filter for the unicast address */</div><div class='ctx'> 	if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {</div><div class='del'>-		struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+		struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 		u16 pool = VMDQ_P(0);</div><div class='ctx'> </div><div class='ctx'> 		if (netdev_uc_count(dev) &gt;= ixgbe_available_rars(adapter, pool))</div><div class='hunk'>@@ -10047,7 +10671,7 @@ static int ixgbe_ndo_bridge_setlink(struct net_device *dev,</div><div class='ctx'> 				    struct nlmsghdr *nlh, u16 flags,</div><div class='ctx'> 				    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct nlattr *attr, *br_spec;</div><div class='ctx'> 	int rem;</div><div class='ctx'> </div><div class='hunk'>@@ -10075,7 +10699,7 @@ static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,</div><div class='ctx'> 				    struct net_device *dev,</div><div class='ctx'> 				    u32 filter_mask, int nlflags)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!(adapter-&gt;flags &amp; IXGBE_FLAG_SRIOV_ENABLED))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -10087,7 +10711,7 @@ static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,</div><div class='ctx'> </div><div class='ctx'> static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(pdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(pdev);</div><div class='ctx'> 	struct ixgbe_fwd_adapter *accel;</div><div class='ctx'> 	int tcs = adapter-&gt;hw_tcs ? : 1;</div><div class='ctx'> 	int pool, err;</div><div class='hunk'>@@ -10184,7 +10808,7 @@ static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)</div><div class='ctx'> static void ixgbe_fwd_del(struct net_device *pdev, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_fwd_adapter *accel = priv;</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(pdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(pdev);</div><div class='ctx'> 	unsigned int rxbase = accel-&gt;rx_base_queue;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='hunk'>@@ -10262,7 +10886,7 @@ ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)</div><div class='ctx'> {</div><div class='ctx'> 	int i, frame_size = dev-&gt;mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct bpf_prog *old_prog;</div><div class='ctx'> 	bool need_reset;</div><div class='ctx'> 	int num_queues;</div><div class='hunk'>@@ -10334,7 +10958,7 @@ static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 	switch (xdp-&gt;command) {</div><div class='ctx'> 	case XDP_SETUP_PROG:</div><div class='hunk'>@@ -10369,7 +10993,7 @@ void ixgbe_xdp_ring_update_tail_locked(struct ixgbe_ring *ring)</div><div class='ctx'> static int ixgbe_xdp_xmit(struct net_device *dev, int n,</div><div class='ctx'> 			  struct xdp_frame **frames, u32 flags)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_ring *ring;</div><div class='ctx'> 	int nxmit = 0;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -10377,6 +11001,10 @@ static int ixgbe_xdp_xmit(struct net_device *dev, int n,</div><div class='ctx'> 	if (unlikely(test_bit(__IXGBE_DOWN, &amp;adapter-&gt;state)))</div><div class='ctx'> 		return -ENETDOWN;</div><div class='ctx'> </div><div class='add'>+	if (!netif_carrier_ok(adapter-&gt;netdev) ||</div><div class='add'>+	    !netif_running(adapter-&gt;netdev))</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(flags &amp; ~XDP_XMIT_FLAGS_MASK))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -10457,6 +11085,8 @@ static const struct net_device_ops ixgbe_netdev_ops = {</div><div class='ctx'> 	.ndo_bpf		= ixgbe_xdp,</div><div class='ctx'> 	.ndo_xdp_xmit		= ixgbe_xdp_xmit,</div><div class='ctx'> 	.ndo_xsk_wakeup         = ixgbe_xsk_wakeup,</div><div class='add'>+	.ndo_hwtstamp_get	= ixgbe_ptp_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= ixgbe_ptp_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter,</div><div class='hunk'>@@ -10659,7 +11289,7 @@ void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring)</div><div class='ctx'>  * ixgbe_enumerate_functions - Get the number of ports this device has</div><div class='ctx'>  * @adapter: adapter structure</div><div class='ctx'>  *</div><div class='del'>- * This function enumerates the phsyical functions co-located on a single slot,</div><div class='add'>+ * This function enumerates the physical functions co-located on a single slot,</div><div class='ctx'>  * in order to determine how many ports a device has. This is most useful in</div><div class='ctx'>  * determining the required GT/s of PCIe bandwidth necessary for optimal</div><div class='ctx'>  * performance.</div><div class='hunk'>@@ -10770,6 +11400,24 @@ bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ixgbe_set_fw_version_e610 - Set FW version specifically on E610 adapters</div><div class='add'>+ * @adapter: the adapter private structure</div><div class='add'>+ *</div><div class='add'>+ * This function is used by probe and ethtool to determine the FW version to</div><div class='add'>+ * format to display. The FW version is taken from the EEPROM/NVM.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+void ixgbe_set_fw_version_e610(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_orom_info *orom = &amp;adapter-&gt;hw.flash.orom;</div><div class='add'>+	struct ixgbe_nvm_info *nvm = &amp;adapter-&gt;hw.flash.nvm;</div><div class='add'>+</div><div class='add'>+	snprintf(adapter-&gt;eeprom_id, sizeof(adapter-&gt;eeprom_id),</div><div class='add'>+		 "%x.%02x 0x%x %d.%d.%d", nvm-&gt;major, nvm-&gt;minor,</div><div class='add'>+		 nvm-&gt;eetrack, orom-&gt;major, orom-&gt;build, orom-&gt;patch);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ixgbe_set_fw_version - Set FW version</div><div class='ctx'>  * @adapter: the adapter private structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -10781,6 +11429,11 @@ static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	struct ixgbe_nvm_version nvm_ver;</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;hw.mac.type == ixgbe_mac_e610) {</div><div class='add'>+		ixgbe_set_fw_version_e610(adapter);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ixgbe_get_oem_prod_version(hw, &amp;nvm_ver);</div><div class='ctx'> 	if (nvm_ver.oem_valid) {</div><div class='ctx'> 		snprintf(adapter-&gt;eeprom_id, sizeof(adapter-&gt;eeprom_id),</div><div class='hunk'>@@ -10805,6 +11458,66 @@ static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ixgbe_recovery_probe - Handle FW recovery mode during probe</div><div class='add'>+ * @adapter: the adapter private structure</div><div class='add'>+ *</div><div class='add'>+ * Perform limited driver initialization when FW error is detected.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on successful probe for E610, -EIO if recovery mode is detected</div><div class='add'>+ * for non-E610 adapter, error status code on any other case.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_recovery_probe(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	bool disable_dev;</div><div class='add'>+	int err = -EIO;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.type != ixgbe_mac_e610)</div><div class='add'>+		goto clean_up_probe;</div><div class='add'>+</div><div class='add'>+	ixgbe_get_hw_control(adapter);</div><div class='add'>+	mutex_init(&amp;hw-&gt;aci.lock);</div><div class='add'>+	err = ixgbe_get_flash_data(&amp;adapter-&gt;hw);</div><div class='add'>+	if (err)</div><div class='add'>+		goto shutdown_aci;</div><div class='add'>+</div><div class='add'>+	timer_setup(&amp;adapter-&gt;service_timer, ixgbe_service_timer, 0);</div><div class='add'>+	INIT_WORK(&amp;adapter-&gt;service_task, ixgbe_recovery_service_task);</div><div class='add'>+	set_bit(__IXGBE_SERVICE_INITED, &amp;adapter-&gt;state);</div><div class='add'>+	clear_bit(__IXGBE_SERVICE_SCHED, &amp;adapter-&gt;state);</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;mac.ops.get_bus_info)</div><div class='add'>+		hw-&gt;mac.ops.get_bus_info(hw);</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, adapter);</div><div class='add'>+	/* We are creating devlink interface so NIC can be managed,</div><div class='add'>+	 * e.g. new NVM image loaded</div><div class='add'>+	 */</div><div class='add'>+	devl_lock(adapter-&gt;devlink);</div><div class='add'>+	ixgbe_devlink_register_port(adapter);</div><div class='add'>+	SET_NETDEV_DEVLINK_PORT(adapter-&gt;netdev,</div><div class='add'>+				&amp;adapter-&gt;devlink_port);</div><div class='add'>+	ixgbe_devlink_init_regions(adapter);</div><div class='add'>+	devl_register(adapter-&gt;devlink);</div><div class='add'>+	devl_unlock(adapter-&gt;devlink);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+shutdown_aci:</div><div class='add'>+	mutex_destroy(&amp;adapter-&gt;hw.aci.lock);</div><div class='add'>+	ixgbe_release_hw_control(adapter);</div><div class='add'>+clean_up_probe:</div><div class='add'>+	disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &amp;adapter-&gt;state);</div><div class='add'>+	free_netdev(netdev);</div><div class='add'>+	devlink_free(adapter-&gt;devlink);</div><div class='add'>+	pci_release_mem_regions(pdev);</div><div class='add'>+	if (disable_dev)</div><div class='add'>+		pci_disable_device(pdev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ixgbe_probe - Device Initialization Routine</div><div class='ctx'>  * @pdev: PCI device information struct</div><div class='ctx'>  * @ent: entry in ixgbe_pci_tbl</div><div class='hunk'>@@ -10818,6 +11531,7 @@ static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)</div><div class='ctx'> static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev;</div><div class='add'>+	struct ixgbe_netdevice_priv *netdev_priv_wrapper;</div><div class='ctx'> 	struct ixgbe_adapter *adapter = NULL;</div><div class='ctx'> 	struct ixgbe_hw *hw;</div><div class='ctx'> 	const struct ixgbe_info *ii = ixgbe_info_tbl[ent-&gt;driver_data];</div><div class='hunk'>@@ -10867,9 +11581,17 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> #else</div><div class='ctx'> 		indices = IXGBE_MAX_RSS_INDICES;</div><div class='ctx'> #endif</div><div class='add'>+	} else if (ii-&gt;mac == ixgbe_mac_e610) {</div><div class='add'>+		indices = IXGBE_MAX_RSS_INDICES_X550;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adapter = ixgbe_allocate_devlink(&amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(adapter)) {</div><div class='add'>+		err = PTR_ERR(adapter);</div><div class='add'>+		goto err_devlink;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);</div><div class='add'>+	netdev = alloc_etherdev_mq(sizeof(*netdev_priv_wrapper), indices);</div><div class='ctx'> 	if (!netdev) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_alloc_etherdev;</div><div class='hunk'>@@ -10877,7 +11599,8 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	adapter = netdev_priv(netdev);</div><div class='add'>+	netdev_priv_wrapper = netdev_priv(netdev);</div><div class='add'>+	netdev_priv_wrapper-&gt;adapter = adapter;</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;netdev = netdev;</div><div class='ctx'> 	adapter-&gt;pdev = pdev;</div><div class='hunk'>@@ -10893,11 +11616,6 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_ioremap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev-&gt;netdev_ops = &amp;ixgbe_netdev_ops;</div><div class='del'>-	ixgbe_set_ethtool_ops(netdev);</div><div class='del'>-	netdev-&gt;watchdog_timeo = 5 * HZ;</div><div class='del'>-	strscpy(netdev-&gt;name, pci_name(pdev), sizeof(netdev-&gt;name));</div><div class='del'>-</div><div class='ctx'> 	/* Setup hw api */</div><div class='ctx'> 	hw-&gt;mac.ops   = *ii-&gt;mac_ops;</div><div class='ctx'> 	hw-&gt;mac.type  = ii-&gt;mac;</div><div class='hunk'>@@ -10927,17 +11645,36 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	hw-&gt;phy.mdio.mdio_read = ixgbe_mdio_read;</div><div class='ctx'> 	hw-&gt;phy.mdio.mdio_write = ixgbe_mdio_write;</div><div class='ctx'> </div><div class='add'>+	netdev-&gt;netdev_ops = &amp;ixgbe_netdev_ops;</div><div class='add'>+	ixgbe_set_ethtool_ops(netdev);</div><div class='add'>+	netdev-&gt;watchdog_timeo = 5 * HZ;</div><div class='add'>+	strscpy(netdev-&gt;name, pci_name(pdev), sizeof(netdev-&gt;name));</div><div class='add'>+</div><div class='ctx'> 	/* setup the private structure */</div><div class='ctx'> 	err = ixgbe_sw_init(adapter, ii);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_sw_init;</div><div class='ctx'> </div><div class='add'>+	if (ixgbe_check_fw_error(adapter))</div><div class='add'>+		return ixgbe_recovery_probe(adapter);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;hw.mac.type == ixgbe_mac_e610) {</div><div class='add'>+		err = ixgbe_get_caps(&amp;adapter-&gt;hw);</div><div class='add'>+		if (err)</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "ixgbe_get_caps failed %d\n", err);</div><div class='add'>+</div><div class='add'>+		err = ixgbe_get_flash_data(&amp;adapter-&gt;hw);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_sw_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (adapter-&gt;hw.mac.type == ixgbe_mac_82599EB)</div><div class='ctx'> 		adapter-&gt;flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF;</div><div class='ctx'> </div><div class='ctx'> 	switch (adapter-&gt;hw.mac.type) {</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		netdev-&gt;udp_tunnel_nic_info = &amp;ixgbe_udp_tunnels_x550;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='hunk'>@@ -10947,10 +11684,6 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Make sure the SWFW semaphore is in a valid state */</div><div class='del'>-	if (hw-&gt;mac.ops.init_swfw_sync)</div><div class='del'>-		hw-&gt;mac.ops.init_swfw_sync(hw);</div><div class='del'>-</div><div class='ctx'> 	/* Make it possible the adapter to be woken up via WOL */</div><div class='ctx'> 	switch (adapter-&gt;hw.mac.type) {</div><div class='ctx'> 	case ixgbe_mac_82599EB:</div><div class='hunk'>@@ -10958,6 +11691,7 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		IXGBE_WRITE_REG(&amp;adapter-&gt;hw, IXGBE_WUS, ~0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -11102,11 +11836,6 @@ skip_sriov:</div><div class='ctx'> 	if (adapter-&gt;flags2 &amp; IXGBE_FLAG2_RSC_ENABLED)</div><div class='ctx'> 		netdev-&gt;features |= NETIF_F_LRO;</div><div class='ctx'> </div><div class='del'>-	if (ixgbe_check_fw_error(adapter)) {</div><div class='del'>-		err = -EIO;</div><div class='del'>-		goto err_sw_init;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* make sure the EEPROM is good */</div><div class='ctx'> 	if (hw-&gt;eeprom.ops.validate_checksum(hw, NULL) &lt; 0) {</div><div class='ctx'> 		e_dev_err("The EEPROM Checksum Is Not Valid\n");</div><div class='hunk'>@@ -11187,7 +11916,7 @@ skip_sriov:</div><div class='ctx'> 	if (expected_gts &gt; 0)</div><div class='ctx'> 		ixgbe_check_minimum_link(adapter, expected_gts);</div><div class='ctx'> </div><div class='del'>-	err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));</div><div class='add'>+	err = hw-&gt;eeprom.ops.read_pba_string(hw, part_str, sizeof(part_str));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		strscpy(part_str, "Unknown", sizeof(part_str));</div><div class='ctx'> 	if (ixgbe_is_sfp(hw) &amp;&amp; hw-&gt;phy.sfp_type != ixgbe_sfp_type_not_present)</div><div class='hunk'>@@ -11213,6 +11942,11 @@ skip_sriov:</div><div class='ctx'> 	}</div><div class='ctx'> 	strcpy(netdev-&gt;name, "eth%d");</div><div class='ctx'> 	pci_set_drvdata(pdev, adapter);</div><div class='add'>+</div><div class='add'>+	devl_lock(adapter-&gt;devlink);</div><div class='add'>+	ixgbe_devlink_register_port(adapter);</div><div class='add'>+	SET_NETDEV_DEVLINK_PORT(adapter-&gt;netdev, &amp;adapter-&gt;devlink_port);</div><div class='add'>+</div><div class='ctx'> 	err = register_netdev(netdev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_register;</div><div class='hunk'>@@ -11267,14 +12001,25 @@ skip_sriov:</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_netdev;</div><div class='ctx'> </div><div class='add'>+	ixgbe_devlink_init_regions(adapter);</div><div class='add'>+	devl_register(adapter-&gt;devlink);</div><div class='add'>+	devl_unlock(adapter-&gt;devlink);</div><div class='add'>+</div><div class='add'>+	if (ixgbe_fwlog_init(hw))</div><div class='add'>+		e_dev_info("Firmware logging not supported\n");</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_netdev:</div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='ctx'> err_register:</div><div class='add'>+	devl_port_unregister(&amp;adapter-&gt;devlink_port);</div><div class='add'>+	devl_unlock(adapter-&gt;devlink);</div><div class='ctx'> 	ixgbe_release_hw_control(adapter);</div><div class='ctx'> 	ixgbe_clear_interrupt_scheme(adapter);</div><div class='ctx'> err_sw_init:</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_e610)</div><div class='add'>+		mutex_destroy(&amp;adapter-&gt;hw.aci.lock);</div><div class='ctx'> 	ixgbe_disable_sriov(adapter);</div><div class='ctx'> 	adapter-&gt;flags2 &amp;= ~IXGBE_FLAG2_SEARCH_FOR_SFP;</div><div class='ctx'> 	iounmap(adapter-&gt;io_addr);</div><div class='hunk'>@@ -11286,7 +12031,9 @@ err_ioremap:</div><div class='ctx'> 	disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &amp;adapter-&gt;state);</div><div class='ctx'> 	free_netdev(netdev);</div><div class='ctx'> err_alloc_etherdev:</div><div class='add'>+	devlink_free(adapter-&gt;devlink);</div><div class='ctx'> 	pci_release_mem_regions(pdev);</div><div class='add'>+err_devlink:</div><div class='ctx'> err_pci_reg:</div><div class='ctx'> err_dma:</div><div class='ctx'> 	if (!adapter || disable_dev)</div><div class='hunk'>@@ -11299,7 +12046,7 @@ err_dma:</div><div class='ctx'>  * @pdev: PCI device information struct</div><div class='ctx'>  *</div><div class='ctx'>  * ixgbe_remove is called by the PCI subsystem to alert the driver</div><div class='del'>- * that it should release a PCI device.  The could be caused by a</div><div class='add'>+ * that it should release a PCI device.  This could be caused by a</div><div class='ctx'>  * Hot-Plug event, or because the driver is going to be removed from</div><div class='ctx'>  * memory.</div><div class='ctx'>  **/</div><div class='hunk'>@@ -11315,11 +12062,18 @@ static void ixgbe_remove(struct pci_dev *pdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	netdev  = adapter-&gt;netdev;</div><div class='add'>+	devl_lock(adapter-&gt;devlink);</div><div class='add'>+	devl_unregister(adapter-&gt;devlink);</div><div class='add'>+	ixgbe_devlink_destroy_regions(adapter);</div><div class='add'>+	ixgbe_fwlog_deinit(&amp;adapter-&gt;hw);</div><div class='ctx'> 	ixgbe_dbg_adapter_exit(adapter);</div><div class='ctx'> </div><div class='ctx'> 	set_bit(__IXGBE_REMOVING, &amp;adapter-&gt;state);</div><div class='ctx'> 	cancel_work_sync(&amp;adapter-&gt;service_task);</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;hw.mac.type == ixgbe_mac_e610)</div><div class='add'>+		ixgbe_disable_link_status_events(adapter);</div><div class='add'>+</div><div class='ctx'> 	if (adapter-&gt;mii_bus)</div><div class='ctx'> 		mdiobus_unregister(adapter-&gt;mii_bus);</div><div class='ctx'> </div><div class='hunk'>@@ -11345,6 +12099,9 @@ static void ixgbe_remove(struct pci_dev *pdev)</div><div class='ctx'> 	if (netdev-&gt;reg_state == NETREG_REGISTERED)</div><div class='ctx'> 		unregister_netdev(netdev);</div><div class='ctx'> </div><div class='add'>+	devl_port_unregister(&amp;adapter-&gt;devlink_port);</div><div class='add'>+	devl_unlock(adapter-&gt;devlink);</div><div class='add'>+</div><div class='ctx'> 	ixgbe_stop_ipsec_offload(adapter);</div><div class='ctx'> 	ixgbe_clear_interrupt_scheme(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -11374,8 +12131,13 @@ static void ixgbe_remove(struct pci_dev *pdev)</div><div class='ctx'> 	disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &amp;adapter-&gt;state);</div><div class='ctx'> 	free_netdev(netdev);</div><div class='ctx'> </div><div class='add'>+	if (adapter-&gt;hw.mac.type == ixgbe_mac_e610)</div><div class='add'>+		mutex_destroy(&amp;adapter-&gt;hw.aci.lock);</div><div class='add'>+</div><div class='ctx'> 	if (disable_dev)</div><div class='ctx'> 		pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	devlink_free(adapter-&gt;devlink);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -11451,6 +12213,9 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,</div><div class='ctx'> 		case ixgbe_mac_x550em_a:</div><div class='ctx'> 			device_id = IXGBE_DEV_ID_X550EM_A_VF;</div><div class='ctx'> 			break;</div><div class='add'>+		case ixgbe_mac_e610:</div><div class='add'>+			device_id = IXGBE_DEV_ID_E610_VF;</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			device_id = 0;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -11533,7 +12298,6 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 		adapter-&gt;hw.hw_addr = adapter-&gt;io_addr;</div><div class='ctx'> 		pci_set_master(pdev);</div><div class='ctx'> 		pci_restore_state(pdev);</div><div class='del'>-		pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 		pci_wake_from_d3(pdev, false);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c<br/>index d67d77e5dacc..788b5af07c70 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='hunk'>@@ -283,6 +283,7 @@ static int ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset));</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -407,6 +408,7 @@ void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)</div><div class='ctx'> 	    hw-&gt;mac.type != ixgbe_mac_X550 &amp;&amp;</div><div class='ctx'> 	    hw-&gt;mac.type != ixgbe_mac_X550EM_x &amp;&amp;</div><div class='ctx'> 	    hw-&gt;mac.type != ixgbe_mac_x550em_a &amp;&amp;</div><div class='add'>+	    hw-&gt;mac.type != ixgbe_mac_e610 &amp;&amp;</div><div class='ctx'> 	    hw-&gt;mac.type != ixgbe_mac_X540)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h<br/>index bd205306934b..0334ed4b8fa3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> #ifndef _IXGBE_MBX_H_</div><div class='ctx'> #define _IXGBE_MBX_H_</div><div class='ctx'> </div><div class='del'>-#include "ixgbe_type.h"</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define IXGBE_VFMAILBOX_SIZE        16 /* 16 32 bit words - 64 bytes */</div><div class='ctx'> </div><div class='hunk'>@@ -34,7 +34,7 @@</div><div class='ctx'> #define IXGBE_VT_MSGTYPE_CTS      0x20000000  /* Indicates that VF is still</div><div class='ctx'> 						 clear to send requests */</div><div class='ctx'> #define IXGBE_VT_MSGINFO_SHIFT    16</div><div class='del'>-/* bits 23:16 are used for exra info for certain messages */</div><div class='add'>+/* bits 23:16 are used for extra info for certain messages */</div><div class='ctx'> #define IXGBE_VT_MSGINFO_MASK     (0xFF &lt;&lt; IXGBE_VT_MSGINFO_SHIFT)</div><div class='ctx'> </div><div class='ctx'> /* definitions to support mailbox API version negotiation */</div><div class='hunk'>@@ -50,6 +50,9 @@ enum ixgbe_pfvf_api_rev {</div><div class='ctx'> 	ixgbe_mbox_api_12,	/* API version 1.2, linux/freebsd VF driver */</div><div class='ctx'> 	ixgbe_mbox_api_13,	/* API version 1.3, linux/freebsd VF driver */</div><div class='ctx'> 	ixgbe_mbox_api_14,	/* API version 1.4, linux/freebsd VF driver */</div><div class='add'>+	ixgbe_mbox_api_15,	/* API version 1.5, linux/freebsd VF driver */</div><div class='add'>+	ixgbe_mbox_api_16,	/* API version 1.6, linux/freebsd VF driver */</div><div class='add'>+	ixgbe_mbox_api_17,	/* API version 1.7, linux/freebsd VF driver */</div><div class='ctx'> 	/* This value should always be last */</div><div class='ctx'> 	ixgbe_mbox_api_unknown,	/* indicates that API version is not known */</div><div class='ctx'> };</div><div class='hunk'>@@ -86,6 +89,12 @@ enum ixgbe_pfvf_api_rev {</div><div class='ctx'> </div><div class='ctx'> #define IXGBE_VF_GET_LINK_STATE 0x10 /* get vf link state */</div><div class='ctx'> </div><div class='add'>+/* mailbox API, version 1.6 VF requests */</div><div class='add'>+#define IXGBE_VF_GET_PF_LINK_STATE	0x11 /* request PF to send link info */</div><div class='add'>+</div><div class='add'>+/* mailbox API, version 1.7 VF requests */</div><div class='add'>+#define IXGBE_VF_FEATURES_NEGOTIATE	0x12 /* get features supported by PF */</div><div class='add'>+</div><div class='ctx'> /* length of permanent address message returned from PF */</div><div class='ctx'> #define IXGBE_VF_PERMADDR_MSG_LEN 4</div><div class='ctx'> /* word in permanent address message with the current multicast type */</div><div class='hunk'>@@ -96,6 +105,14 @@ enum ixgbe_pfvf_api_rev {</div><div class='ctx'> #define IXGBE_VF_MBX_INIT_TIMEOUT 2000 /* number of retries on mailbox */</div><div class='ctx'> #define IXGBE_VF_MBX_INIT_DELAY   500  /* microseconds between retries */</div><div class='ctx'> </div><div class='add'>+/* features negotiated between PF/VF */</div><div class='add'>+#define IXGBEVF_PF_SUP_IPSEC		BIT(0)</div><div class='add'>+#define IXGBEVF_PF_SUP_ESX_MBX		BIT(1)</div><div class='add'>+</div><div class='add'>+#define IXGBE_SUPPORTED_FEATURES	IXGBEVF_PF_SUP_IPSEC</div><div class='add'>+</div><div class='add'>+struct ixgbe_hw;</div><div class='add'>+</div><div class='ctx'> int ixgbe_read_mbx(struct ixgbe_hw *, u32 *, u16, u16);</div><div class='ctx'> int ixgbe_write_mbx(struct ixgbe_hw *, u32 *, u16, u16);</div><div class='ctx'> int ixgbe_check_for_msg(struct ixgbe_hw *, u16);</div><div class='hunk'>@@ -105,6 +122,18 @@ int ixgbe_check_for_rst(struct ixgbe_hw *, u16);</div><div class='ctx'> void ixgbe_init_mbx_params_pf(struct ixgbe_hw *);</div><div class='ctx'> #endif /* CONFIG_PCI_IOV */</div><div class='ctx'> </div><div class='add'>+struct ixgbe_mbx_operations {</div><div class='add'>+	int (*init_params)(struct ixgbe_hw *hw);</div><div class='add'>+	int (*read)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 vf_number);</div><div class='add'>+	int (*write)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 vf_number);</div><div class='add'>+	int (*read_posted)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);</div><div class='add'>+	int (*write_posted)(struct ixgbe_hw *hw, u32 *msg, u16 size,</div><div class='add'>+			    u16 mbx_id);</div><div class='add'>+	int (*check_for_msg)(struct ixgbe_hw *hw, u16 vf_number);</div><div class='add'>+	int (*check_for_ack)(struct ixgbe_hw *hw, u16 vf_number);</div><div class='add'>+	int (*check_for_rst)(struct ixgbe_hw *hw, u16 vf_number);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> extern const struct ixgbe_mbx_operations mbx_ops_generic;</div><div class='ctx'> </div><div class='ctx'> #endif /* _IXGBE_MBX_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c<br/>index 07eaa3c3f4d3..2449e4cf2679 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='hunk'>@@ -167,7 +167,7 @@ int ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr,</div><div class='ctx'> 					 u16 reg, u16 val, bool lock)</div><div class='ctx'> {</div><div class='ctx'> 	u32 swfw_mask = hw-&gt;phy.phy_semaphore_mask;</div><div class='del'>-	int max_retry = 1;</div><div class='add'>+	int max_retry = 3;</div><div class='ctx'> 	int retry = 0;</div><div class='ctx'> 	u8 reg_high;</div><div class='ctx'> 	u8 csum;</div><div class='hunk'>@@ -1117,7 +1117,7 @@ int ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)</div><div class='ctx'> 	hw-&gt;phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,</div><div class='ctx'> 			     MDIO_MMD_AN, &amp;autoneg_reg);</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;mac.type == ixgbe_mac_X550) {</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_X550 || hw-&gt;mac.type == ixgbe_mac_e610) {</div><div class='ctx'> 		/* Set or unset auto-negotiation 5G advertisement */</div><div class='ctx'> 		autoneg_reg &amp;= ~IXGBE_MII_5GBASE_T_ADVERTISE;</div><div class='ctx'> 		if ((hw-&gt;phy.autoneg_advertised &amp; IXGBE_LINK_SPEED_5GB_FULL) &amp;&amp;</div><div class='hunk'>@@ -1233,6 +1233,7 @@ static int ixgbe_get_copper_speeds_supported(struct ixgbe_hw *hw)</div><div class='ctx'> </div><div class='ctx'> 	switch (hw-&gt;mac.type) {</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		hw-&gt;phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL;</div><div class='ctx'> 		hw-&gt;phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1322,7 +1323,7 @@ int ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed,</div><div class='ctx'>  *	@hw: pointer to hardware structure</div><div class='ctx'>  *</div><div class='ctx'>  *	Restart autonegotiation and PHY and waits for completion.</div><div class='del'>- *      This function always returns success, this is nessary since</div><div class='add'>+ *	This function always returns success, this is necessary since</div><div class='ctx'>  *	it is called via a function pointer that could call other</div><div class='ctx'>  *	functions that could return an error.</div><div class='ctx'>  **/</div><div class='hunk'>@@ -2284,7 +2285,7 @@ static int ixgbe_write_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset,</div><div class='ctx'> 					    u8 dev_addr, u8 data, bool lock)</div><div class='ctx'> {</div><div class='ctx'> 	u32 swfw_mask = hw-&gt;phy.phy_semaphore_mask;</div><div class='del'>-	u32 max_retry = 1;</div><div class='add'>+	u32 max_retry = 3;</div><div class='ctx'> 	u32 retry = 0;</div><div class='ctx'> 	int status;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h<br/>index 14aa2ca51f70..81179c60af4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h</a></div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> #define IXGBE_SFF_1GBASESX_CAPABLE		0x1</div><div class='ctx'> #define IXGBE_SFF_1GBASELX_CAPABLE		0x2</div><div class='ctx'> #define IXGBE_SFF_1GBASET_CAPABLE		0x8</div><div class='del'>-#define IXGBE_SFF_BASEBX10_CAPABLE		0x64</div><div class='add'>+#define IXGBE_SFF_BASEBX10_CAPABLE		0x40</div><div class='ctx'> #define IXGBE_SFF_10GBASESR_CAPABLE		0x10</div><div class='ctx'> #define IXGBE_SFF_10GBASELR_CAPABLE		0x20</div><div class='ctx'> #define IXGBE_SFF_SOFT_RS_SELECT_MASK		0x8</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c<br/>index 9339edbd9082..6885d2343c48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c</a></div><div class='hunk'>@@ -140,6 +140,7 @@</div><div class='ctx'>  * proper mult and shift to convert the cycles into nanoseconds of time.</div><div class='ctx'>  */</div><div class='ctx'> #define IXGBE_X550_BASE_PERIOD 0xC80000000ULL</div><div class='add'>+#define IXGBE_E610_BASE_PERIOD 0x333333333ULL</div><div class='ctx'> #define INCVALUE_MASK	0x7FFFFFFF</div><div class='ctx'> #define ISGN		0x80000000</div><div class='ctx'> </div><div class='hunk'>@@ -326,7 +327,7 @@ static void ixgbe_ptp_setup_sdp_X550(struct ixgbe_adapter *adapter)</div><div class='ctx'>  * result of SYSTIME is 32bits of "billions of cycles" and 32 bits of</div><div class='ctx'>  * "cycles", rather than seconds and nanoseconds.</div><div class='ctx'>  */</div><div class='del'>-static u64 ixgbe_ptp_read_X550(const struct cyclecounter *cc)</div><div class='add'>+static u64 ixgbe_ptp_read_X550(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_adapter *adapter =</div><div class='ctx'> 		container_of(cc, struct ixgbe_adapter, hw_cc);</div><div class='hunk'>@@ -363,7 +364,7 @@ static u64 ixgbe_ptp_read_X550(const struct cyclecounter *cc)</div><div class='ctx'>  * cyclecounter structure used to construct a ns counter from the</div><div class='ctx'>  * arbitrary fixed point registers</div><div class='ctx'>  */</div><div class='del'>-static u64 ixgbe_ptp_read_82599(const struct cyclecounter *cc)</div><div class='add'>+static u64 ixgbe_ptp_read_82599(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_adapter *adapter =</div><div class='ctx'> 		container_of(cc, struct ixgbe_adapter, hw_cc);</div><div class='hunk'>@@ -415,6 +416,7 @@ static void ixgbe_ptp_convert_to_hwtstamp(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		/* Upper 32 bits represent billions of cycles, lower 32 bits</div><div class='ctx'> 		 * represent cycles. However, we use timespec64_to_ns for the</div><div class='ctx'> 		 * correct math even though the units haven't been corrected</div><div class='hunk'>@@ -492,11 +494,13 @@ static int ixgbe_ptp_adjfine_X550(struct ptp_clock_info *ptp, long scaled_ppm)</div><div class='ctx'> 	struct ixgbe_adapter *adapter =</div><div class='ctx'> 			container_of(ptp, struct ixgbe_adapter, ptp_caps);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	u64 rate, base;</div><div class='ctx'> 	bool neg_adj;</div><div class='del'>-	u64 rate;</div><div class='ctx'> 	u32 inca;</div><div class='ctx'> </div><div class='del'>-	neg_adj = diff_by_scaled_ppm(IXGBE_X550_BASE_PERIOD, scaled_ppm, &amp;rate);</div><div class='add'>+	base = hw-&gt;mac.type == ixgbe_mac_e610 ? IXGBE_E610_BASE_PERIOD :</div><div class='add'>+						IXGBE_X550_BASE_PERIOD;</div><div class='add'>+	neg_adj = diff_by_scaled_ppm(base, scaled_ppm, &amp;rate);</div><div class='ctx'> </div><div class='ctx'> 	/* warn if rate is too large */</div><div class='ctx'> 	if (rate &gt;= INCVALUE_MASK)</div><div class='hunk'>@@ -559,6 +563,7 @@ static int ixgbe_ptp_gettimex(struct ptp_clock_info *ptp,</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		/* Upper 32 bits represent billions of cycles, lower 32 bits</div><div class='ctx'> 		 * represent cycles. However, we use timespec64_to_ns for the</div><div class='ctx'> 		 * correct math even though the units haven't been corrected</div><div class='hunk'>@@ -636,7 +641,7 @@ static int ixgbe_ptp_feature_enable(struct ptp_clock_info *ptp,</div><div class='ctx'> 	 * disabled</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (rq-&gt;type != PTP_CLK_REQ_PPS || !adapter-&gt;ptp_setup_sdp)</div><div class='del'>-		return -ENOTSUPP;</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	if (on)</div><div class='ctx'> 		adapter-&gt;flags2 |= IXGBE_FLAG2_PTP_PPS_ENABLED;</div><div class='hunk'>@@ -931,20 +936,22 @@ void ixgbe_ptp_rx_rgtstamp(struct ixgbe_q_vector *q_vector,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ixgbe_ptp_get_ts_config - get current hardware timestamping configuration</div><div class='del'>- * @adapter: pointer to adapter structure</div><div class='del'>- * @ifr: ioctl data</div><div class='add'>+ * ixgbe_ptp_hwtstamp_get - get current hardware timestamping configuration</div><div class='add'>+ * @netdev: pointer to net device structure</div><div class='add'>+ * @config: timestamping configuration structure</div><div class='ctx'>  *</div><div class='ctx'>  * This function returns the current timestamping settings. Rather than</div><div class='ctx'>  * attempt to deconstruct registers to fill in the values, simply keep a copy</div><div class='ctx'>  * of the old settings around, and return a copy when requested.</div><div class='ctx'>  */</div><div class='del'>-int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr)</div><div class='add'>+int ixgbe_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			   struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config *config = &amp;adapter-&gt;tstamp_config;</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='add'>+</div><div class='add'>+	*config = adapter-&gt;tstamp_config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, config,</div><div class='del'>-			    sizeof(*config)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -973,7 +980,7 @@ int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr)</div><div class='ctx'>  * mode, if required to support the specifically requested mode.</div><div class='ctx'>  */</div><div class='ctx'> static int ixgbe_ptp_set_timestamp_mode(struct ixgbe_adapter *adapter,</div><div class='del'>-				 struct hwtstamp_config *config)</div><div class='add'>+					struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	u32 tsync_tx_ctl = IXGBE_TSYNCTXCTL_ENABLED;</div><div class='hunk'>@@ -1067,6 +1074,7 @@ static int ixgbe_ptp_set_timestamp_mode(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		/* enable timestamping all packets only if at least some</div><div class='ctx'> 		 * packets were requested. Otherwise, play nice and disable</div><div class='ctx'> 		 * timestamping</div><div class='hunk'>@@ -1123,31 +1131,29 @@ static int ixgbe_ptp_set_timestamp_mode(struct ixgbe_adapter *adapter,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ixgbe_ptp_set_ts_config - user entry point for timestamp mode</div><div class='del'>- * @adapter: pointer to adapter struct</div><div class='del'>- * @ifr: ioctl data</div><div class='add'>+ * ixgbe_ptp_hwtstamp_set - user entry point for timestamp mode</div><div class='add'>+ * @netdev: pointer to net device structure</div><div class='add'>+ * @config: timestamping configuration structure</div><div class='add'>+ * @extack: netlink extended ack structure for error reporting</div><div class='ctx'>  *</div><div class='ctx'>  * Set hardware to requested mode. If unsupported, return an error with no</div><div class='ctx'>  * changes. Otherwise, store the mode for future reference.</div><div class='ctx'>  */</div><div class='del'>-int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr)</div><div class='add'>+int ixgbe_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			   struct kernel_hwtstamp_config *config,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	err = ixgbe_ptp_set_timestamp_mode(adapter, &amp;config);</div><div class='add'>+	err = ixgbe_ptp_set_timestamp_mode(adapter, config);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* save these settings for future reference */</div><div class='del'>-	memcpy(&amp;adapter-&gt;tstamp_config, &amp;config,</div><div class='del'>-	       sizeof(adapter-&gt;tstamp_config));</div><div class='add'>+	adapter-&gt;tstamp_config = *config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ixgbe_ptp_link_speed_adjust(struct ixgbe_adapter *adapter,</div><div class='hunk'>@@ -1233,6 +1239,7 @@ void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter)</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		cc.read = ixgbe_ptp_read_X550;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ixgbe_mac_X540:</div><div class='hunk'>@@ -1280,6 +1287,7 @@ static void ixgbe_ptp_init_systime(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		tsauxc = IXGBE_READ_REG(hw, IXGBE_TSAUXC);</div><div class='ctx'> </div><div class='ctx'> 		/* Reset SYSTIME registers to 0 */</div><div class='hunk'>@@ -1407,6 +1415,7 @@ static long ixgbe_ptp_create_clock(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	case ixgbe_mac_X550:</div><div class='ctx'> 	case ixgbe_mac_X550EM_x:</div><div class='ctx'> 	case ixgbe_mac_x550em_a:</div><div class='add'>+	case ixgbe_mac_e610:</div><div class='ctx'> 		snprintf(adapter-&gt;ptp_caps.name, 16, "%s", netdev-&gt;name);</div><div class='ctx'> 		adapter-&gt;ptp_caps.owner = THIS_MODULE;</div><div class='ctx'> 		adapter-&gt;ptp_caps.max_adj = 30000000;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c<br/>index e71715f5da22..ee133d6749b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "ixgbe.h"</div><div class='ctx'> #include "ixgbe_type.h"</div><div class='add'>+#include "ixgbe_mbx.h"</div><div class='ctx'> #include "ixgbe_sriov.h"</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='hunk'>@@ -206,6 +207,7 @@ void ixgbe_enable_sriov(struct ixgbe_adapter *adapter, unsigned int max_vfs)</div><div class='ctx'> int ixgbe_disable_sriov(struct ixgbe_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int num_vfs = adapter-&gt;num_vfs, vf;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int rss;</div><div class='ctx'> </div><div class='hunk'>@@ -236,6 +238,9 @@ int ixgbe_disable_sriov(struct ixgbe_adapter *adapter)</div><div class='ctx'> 	if (!(adapter-&gt;flags &amp; IXGBE_FLAG_SRIOV_ENABLED))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (hw-&gt;mac.ops.disable_mdd)</div><div class='add'>+		hw-&gt;mac.ops.disable_mdd(hw);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * If our VFs are assigned we cannot shut down SR-IOV</div><div class='hunk'>@@ -505,6 +510,8 @@ static int ixgbe_set_vf_lpe(struct ixgbe_adapter *adapter, u32 max_frame, u32 vf</div><div class='ctx'> 		case ixgbe_mbox_api_12:</div><div class='ctx'> 		case ixgbe_mbox_api_13:</div><div class='ctx'> 		case ixgbe_mbox_api_14:</div><div class='add'>+		case ixgbe_mbox_api_16:</div><div class='add'>+		case ixgbe_mbox_api_17:</div><div class='ctx'> 			/* Version 1.1 supports jumbo frames on VFs if PF has</div><div class='ctx'> 			 * jumbo frames enabled which means legacy VFs are</div><div class='ctx'> 			 * disabled</div><div class='hunk'>@@ -701,7 +708,7 @@ static inline void ixgbe_vf_reset_event(struct ixgbe_adapter *adapter, u32 vf)</div><div class='ctx'> 	u32 reg_val;</div><div class='ctx'> 	u32 queue;</div><div class='ctx'> </div><div class='del'>-	/* remove VLAN filters beloning to this VF */</div><div class='add'>+	/* remove VLAN filters belonging to this VF */</div><div class='ctx'> 	ixgbe_clear_vf_vlans(adapter, vf);</div><div class='ctx'> </div><div class='ctx'> 	/* add back PF assigned VLAN or VLAN 0 */</div><div class='hunk'>@@ -1041,13 +1048,15 @@ static int ixgbe_negotiate_vf_api(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	case ixgbe_mbox_api_12:</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='ctx'> 		adapter-&gt;vfinfo[vf].vf_api = api;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	e_info(drv, "VF %d requested invalid api version %u\n", vf, api);</div><div class='add'>+	e_dbg(drv, "VF %d requested unsupported api version %u\n", vf, api);</div><div class='ctx'> </div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='hunk'>@@ -1067,6 +1076,8 @@ static int ixgbe_get_vf_queues(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	case ixgbe_mbox_api_12:</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -1;</div><div class='hunk'>@@ -1107,6 +1118,8 @@ static int ixgbe_get_vf_reta(struct ixgbe_adapter *adapter, u32 *msgbuf, u32 vf)</div><div class='ctx'> </div><div class='ctx'> 	/* verify the PF is supporting the correct API */</div><div class='ctx'> 	switch (adapter-&gt;vfinfo[vf].vf_api) {</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='ctx'> 	case ixgbe_mbox_api_12:</div><div class='hunk'>@@ -1140,6 +1153,8 @@ static int ixgbe_get_vf_rss_key(struct ixgbe_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	/* verify the PF is supporting the correct API */</div><div class='ctx'> 	switch (adapter-&gt;vfinfo[vf].vf_api) {</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='ctx'> 	case ixgbe_mbox_api_12:</div><div class='hunk'>@@ -1169,6 +1184,8 @@ static int ixgbe_update_vf_xcast_mode(struct ixgbe_adapter *adapter,</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -1239,6 +1256,8 @@ static int ixgbe_get_vf_link_state(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	case ixgbe_mbox_api_12:</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -1249,6 +1268,65 @@ static int ixgbe_get_vf_link_state(struct ixgbe_adapter *adapter,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ixgbe_send_vf_link_status - send link status data to VF</div><div class='add'>+ * @adapter: pointer to adapter struct</div><div class='add'>+ * @msgbuf: pointer to message buffers</div><div class='add'>+ * @vf: VF identifier</div><div class='add'>+ *</div><div class='add'>+ * Reply for IXGBE_VF_GET_PF_LINK_STATE mbox command sending link status data.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or -EOPNOTSUPP when operation is not supported.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_send_vf_link_status(struct ixgbe_adapter *adapter,</div><div class='add'>+				     u32 *msgbuf, u32 vf)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+</div><div class='add'>+	switch (adapter-&gt;vfinfo[vf].vf_api) {</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='add'>+		if (hw-&gt;mac.type != ixgbe_mac_e610)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+	/* Simply provide stored values as watchdog &amp; link status events take</div><div class='add'>+	 * care of its freshness.</div><div class='add'>+	 */</div><div class='add'>+	msgbuf[1] = adapter-&gt;link_speed;</div><div class='add'>+	msgbuf[2] = adapter-&gt;link_up;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_negotiate_vf_features -  negotiate supported features with VF driver</div><div class='add'>+ * @adapter: pointer to adapter struct</div><div class='add'>+ * @msgbuf: pointer to message buffers</div><div class='add'>+ * @vf: VF identifier</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or -EOPNOTSUPP when operation is not supported.</div><div class='add'>+ */</div><div class='add'>+static int ixgbe_negotiate_vf_features(struct ixgbe_adapter *adapter,</div><div class='add'>+				       u32 *msgbuf, u32 vf)</div><div class='add'>+{</div><div class='add'>+	u32 features = msgbuf[1];</div><div class='add'>+</div><div class='add'>+	switch (adapter-&gt;vfinfo[vf].vf_api) {</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	features &amp;= IXGBE_SUPPORTED_FEATURES;</div><div class='add'>+	msgbuf[1] = features;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mbx_size = IXGBE_VFMAILBOX_SIZE;</div><div class='hunk'>@@ -1323,6 +1401,12 @@ static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf)</div><div class='ctx'> 	case IXGBE_VF_IPSEC_DEL:</div><div class='ctx'> 		retval = ixgbe_ipsec_vf_del_sa(adapter, msgbuf, vf);</div><div class='ctx'> 		break;</div><div class='add'>+	case IXGBE_VF_GET_PF_LINK_STATE:</div><div class='add'>+		retval = ixgbe_send_vf_link_status(adapter, msgbuf, vf);</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_VF_FEATURES_NEGOTIATE:</div><div class='add'>+		retval = ixgbe_negotiate_vf_features(adapter, msgbuf, vf);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		e_err(drv, "Unhandled Msg %8.8x\n", msgbuf[0]);</div><div class='ctx'> 		retval = -EIO;</div><div class='hunk'>@@ -1352,12 +1436,59 @@ static void ixgbe_rcv_ack_from_vf(struct ixgbe_adapter *adapter, u32 vf)</div><div class='ctx'> 		ixgbe_write_mbx(hw, &amp;msg, 1, vf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ixgbe_check_mdd_event - check for MDD event on all VFs</div><div class='add'>+ * @adapter: pointer to ixgbe adapter</div><div class='add'>+ *</div><div class='add'>+ * Return: true if there is a VF on which MDD event occurred, false otherwise.</div><div class='add'>+ */</div><div class='add'>+bool ixgbe_check_mdd_event(struct ixgbe_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	DECLARE_BITMAP(vf_bitmap, 64);</div><div class='add'>+	bool ret = false;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!hw-&gt;mac.ops.handle_mdd)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Did we have a malicious event */</div><div class='add'>+	bitmap_zero(vf_bitmap, 64);</div><div class='add'>+	hw-&gt;mac.ops.handle_mdd(hw, vf_bitmap);</div><div class='add'>+</div><div class='add'>+	/* Log any blocked queues and release lock */</div><div class='add'>+	for_each_set_bit(i, vf_bitmap, 64) {</div><div class='add'>+		dev_warn(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+			 "Malicious event on VF %d tx:%x rx:%x\n", i,</div><div class='add'>+			 IXGBE_READ_REG(hw, IXGBE_LVMMC_TX),</div><div class='add'>+			 IXGBE_READ_REG(hw, IXGBE_LVMMC_RX));</div><div class='add'>+</div><div class='add'>+		if (hw-&gt;mac.ops.restore_mdd_vf) {</div><div class='add'>+			u32 ping;</div><div class='add'>+</div><div class='add'>+			hw-&gt;mac.ops.restore_mdd_vf(hw, i);</div><div class='add'>+</div><div class='add'>+			/* get the VF to rebuild its queues */</div><div class='add'>+			adapter-&gt;vfinfo[i].clear_to_send = 0;</div><div class='add'>+			ping = IXGBE_PF_CONTROL_MSG |</div><div class='add'>+			       IXGBE_VT_MSGTYPE_CTS;</div><div class='add'>+			ixgbe_write_mbx(hw, &amp;ping, 1, i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void ixgbe_msg_task(struct ixgbe_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 vf;</div><div class='ctx'> </div><div class='add'>+	ixgbe_check_mdd_event(adapter);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;adapter-&gt;vfs_lock, flags);</div><div class='ctx'> 	for (vf = 0; vf &lt; adapter-&gt;num_vfs; vf++) {</div><div class='ctx'> 		/* process any reset requests */</div><div class='hunk'>@@ -1417,7 +1548,7 @@ void ixgbe_set_all_vfs(struct ixgbe_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> int ixgbe_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='ctx'> 	if (vf &gt;= adapter-&gt;num_vfs)</div><div class='hunk'>@@ -1525,7 +1656,7 @@ int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,</div><div class='ctx'> 			  u8 qos, __be16 vlan_proto)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if ((vf &gt;= adapter-&gt;num_vfs) || (vlan &gt; 4095) || (qos &gt; 7))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1643,7 +1774,7 @@ void ixgbe_check_vf_rate_limit(struct ixgbe_adapter *adapter)</div><div class='ctx'> int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,</div><div class='ctx'> 			int max_tx_rate)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	int link_speed;</div><div class='ctx'> </div><div class='ctx'> 	/* verify VF is active */</div><div class='hunk'>@@ -1678,7 +1809,7 @@ int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,</div><div class='ctx'> </div><div class='ctx'> int ixgbe_ndo_set_vf_spoofchk(struct net_device *netdev, int vf, bool setting)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='ctx'> 	if (vf &gt;= adapter-&gt;num_vfs)</div><div class='hunk'>@@ -1756,7 +1887,7 @@ void ixgbe_set_vf_link_state(struct ixgbe_adapter *adapter, int vf, int state)</div><div class='ctx'>  **/</div><div class='ctx'> int ixgbe_ndo_set_vf_link_state(struct net_device *netdev, int vf, int state)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (vf &lt; 0 || vf &gt;= adapter-&gt;num_vfs) {</div><div class='hunk'>@@ -1793,7 +1924,7 @@ int ixgbe_ndo_set_vf_link_state(struct net_device *netdev, int vf, int state)</div><div class='ctx'> int ixgbe_ndo_set_vf_rss_query_en(struct net_device *netdev, int vf,</div><div class='ctx'> 				  bool setting)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* This operation is currently supported only for 82599 and x540</div><div class='ctx'> 	 * devices.</div><div class='hunk'>@@ -1812,7 +1943,7 @@ int ixgbe_ndo_set_vf_rss_query_en(struct net_device *netdev, int vf,</div><div class='ctx'> </div><div class='ctx'> int ixgbe_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (vf &gt;= adapter-&gt;num_vfs)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1835,7 +1966,7 @@ int ixgbe_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)</div><div class='ctx'> int ixgbe_ndo_get_vf_config(struct net_device *netdev,</div><div class='ctx'> 			    int vf, struct ifla_vf_info *ivi)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);</div><div class='ctx'> 	if (vf &gt;= adapter-&gt;num_vfs)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	ivi-&gt;vf = vf;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h<br/>index 0690ecb8dfa3..bc4cab976bf9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #ifdef CONFIG_PCI_IOV</div><div class='ctx'> void ixgbe_restore_vf_multicasts(struct ixgbe_adapter *adapter);</div><div class='ctx'> #endif</div><div class='add'>+bool ixgbe_check_mdd_event(struct ixgbe_adapter *adapter);</div><div class='ctx'> void ixgbe_msg_task(struct ixgbe_adapter *adapter);</div><div class='ctx'> int ixgbe_vf_configuration(struct pci_dev *pdev, unsigned int event_mask);</div><div class='ctx'> void ixgbe_ping_all_vfs(struct ixgbe_adapter *adapter);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h<br/>index 346e3d9114a8..b1bfeb21537a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_type.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_type.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #ifndef _IXGBE_TYPE_H_</div><div class='ctx'> #define _IXGBE_TYPE_H_</div><div class='hunk'>@@ -7,6 +7,8 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/mdio.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/net/intel/libie/fwlog.h&gt;</div><div class='add'>+#include "ixgbe_type_e610.h"</div><div class='ctx'> </div><div class='ctx'> /* Device IDs */</div><div class='ctx'> #define IXGBE_DEV_ID_82598               0x10B6</div><div class='hunk'>@@ -71,12 +73,19 @@</div><div class='ctx'> #define IXGBE_DEV_ID_X550EM_A_1G_T	0x15E4</div><div class='ctx'> #define IXGBE_DEV_ID_X550EM_A_1G_T_L	0x15E5</div><div class='ctx'> </div><div class='add'>+#define IXGBE_DEV_ID_E610_BACKPLANE	0x57AE</div><div class='add'>+#define IXGBE_DEV_ID_E610_SFP		0x57AF</div><div class='add'>+#define IXGBE_DEV_ID_E610_10G_T		0x57B0</div><div class='add'>+#define IXGBE_DEV_ID_E610_2_5G_T	0x57B1</div><div class='add'>+#define IXGBE_DEV_ID_E610_SGMII		0x57B2</div><div class='add'>+</div><div class='ctx'> /* VF Device IDs */</div><div class='ctx'> #define IXGBE_DEV_ID_82599_VF		0x10ED</div><div class='ctx'> #define IXGBE_DEV_ID_X540_VF		0x1515</div><div class='ctx'> #define IXGBE_DEV_ID_X550_VF		0x1565</div><div class='ctx'> #define IXGBE_DEV_ID_X550EM_X_VF	0x15A8</div><div class='ctx'> #define IXGBE_DEV_ID_X550EM_A_VF	0x15C5</div><div class='add'>+#define IXGBE_DEV_ID_E610_VF		0x57AD</div><div class='ctx'> </div><div class='ctx'> #define IXGBE_CAT(r, m)	IXGBE_##r##_##m</div><div class='ctx'> </div><div class='hunk'>@@ -230,7 +239,7 @@ struct ixgbe_thermal_sensor_data {</div><div class='ctx'> #define NVM_VER_INVALID		0xFFFF</div><div class='ctx'> #define NVM_ETK_VALID		0x8000</div><div class='ctx'> #define NVM_INVALID_PTR		0xFFFF</div><div class='del'>-#define NVM_VER_SIZE		32   /* version sting size */</div><div class='add'>+#define NVM_VER_SIZE		32   /* version string size */</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_nvm_version {</div><div class='ctx'> 	u32 etk_id;</div><div class='hunk'>@@ -394,6 +403,8 @@ struct ixgbe_nvm_version {</div><div class='ctx'> #define IXGBE_MRCTL(_i)      (0x0F600 + ((_i) * 4))</div><div class='ctx'> #define IXGBE_VMRVLAN(_i)    (0x0F610 + ((_i) * 4))</div><div class='ctx'> #define IXGBE_VMRVM(_i)      (0x0F630 + ((_i) * 4))</div><div class='add'>+#define IXGBE_LVMMC_RX	     0x2FA8</div><div class='add'>+#define IXGBE_LVMMC_TX	     0x8108</div><div class='ctx'> #define IXGBE_WQBR_RX(_i)    (0x2FB0 + ((_i) * 4)) /* 4 total */</div><div class='ctx'> #define IXGBE_WQBR_TX(_i)    (0x8130 + ((_i) * 4)) /* 4 total */</div><div class='ctx'> #define IXGBE_L34T_IMIR(_i)  (0x0E800 + ((_i) * 4)) /*128 of these (0-127)*/</div><div class='hunk'>@@ -1034,6 +1045,7 @@ struct ixgbe_nvm_version {</div><div class='ctx'> #define IXGBE_GCR_EXT_VT_MODE_16        0x00000001</div><div class='ctx'> #define IXGBE_GCR_EXT_VT_MODE_32        0x00000002</div><div class='ctx'> #define IXGBE_GCR_EXT_VT_MODE_64        0x00000003</div><div class='add'>+#define IXGBE_GCR_EXT_VT_MODE_MASK      0x00000003</div><div class='ctx'> #define IXGBE_GCR_EXT_SRIOV             (IXGBE_GCR_EXT_MSIX_EN | \</div><div class='ctx'> 					 IXGBE_GCR_EXT_VT_MODE_64)</div><div class='ctx'> </div><div class='hunk'>@@ -1600,7 +1612,7 @@ enum {</div><div class='ctx'> #define IXGBE_EICR_PCI          0x00040000 /* PCI Exception */</div><div class='ctx'> #define IXGBE_EICR_MAILBOX      0x00080000 /* VF to PF Mailbox Interrupt */</div><div class='ctx'> #define IXGBE_EICR_LSC          0x00100000 /* Link Status Change */</div><div class='del'>-#define IXGBE_EICR_LINKSEC      0x00200000 /* PN Threshold */</div><div class='add'>+#define IXGBE_EICR_FW_EVENT	0x00200000 /* Async FW event */</div><div class='ctx'> #define IXGBE_EICR_MNG          0x00400000 /* Manageability Event Interrupt */</div><div class='ctx'> #define IXGBE_EICR_TS           0x00800000 /* Thermal Sensor Event */</div><div class='ctx'> #define IXGBE_EICR_TIMESYNC     0x01000000 /* Timesync Event */</div><div class='hunk'>@@ -1636,6 +1648,7 @@ enum {</div><div class='ctx'> #define IXGBE_EICS_PCI          IXGBE_EICR_PCI       /* PCI Exception */</div><div class='ctx'> #define IXGBE_EICS_MAILBOX      IXGBE_EICR_MAILBOX   /* VF to PF Mailbox Int */</div><div class='ctx'> #define IXGBE_EICS_LSC          IXGBE_EICR_LSC       /* Link Status Change */</div><div class='add'>+#define IXGBE_EICS_FW_EVENT	IXGBE_EICR_FW_EVENT  /* Async FW event */</div><div class='ctx'> #define IXGBE_EICS_MNG          IXGBE_EICR_MNG       /* MNG Event Interrupt */</div><div class='ctx'> #define IXGBE_EICS_TIMESYNC     IXGBE_EICR_TIMESYNC  /* Timesync Event */</div><div class='ctx'> #define IXGBE_EICS_GPI_SDP0(_hw)	IXGBE_EICR_GPI_SDP0(_hw)</div><div class='hunk'>@@ -1654,6 +1667,7 @@ enum {</div><div class='ctx'> #define IXGBE_EIMS_PCI          IXGBE_EICR_PCI       /* PCI Exception */</div><div class='ctx'> #define IXGBE_EIMS_MAILBOX      IXGBE_EICR_MAILBOX   /* VF to PF Mailbox Int */</div><div class='ctx'> #define IXGBE_EIMS_LSC          IXGBE_EICR_LSC       /* Link Status Change */</div><div class='add'>+#define IXGBE_EIMS_FW_EVENT	IXGBE_EICR_FW_EVENT  /* Async FW event */</div><div class='ctx'> #define IXGBE_EIMS_MNG          IXGBE_EICR_MNG       /* MNG Event Interrupt */</div><div class='ctx'> #define IXGBE_EIMS_TS           IXGBE_EICR_TS        /* Thermel Sensor Event */</div><div class='ctx'> #define IXGBE_EIMS_TIMESYNC     IXGBE_EICR_TIMESYNC  /* Timesync Event */</div><div class='hunk'>@@ -1673,6 +1687,7 @@ enum {</div><div class='ctx'> #define IXGBE_EIMC_PCI          IXGBE_EICR_PCI       /* PCI Exception */</div><div class='ctx'> #define IXGBE_EIMC_MAILBOX      IXGBE_EICR_MAILBOX   /* VF to PF Mailbox Int */</div><div class='ctx'> #define IXGBE_EIMC_LSC          IXGBE_EICR_LSC       /* Link Status Change */</div><div class='add'>+#define IXGBE_EIMC_FW_EVENT	IXGBE_EICR_FW_EVENT  /* Async FW event */</div><div class='ctx'> #define IXGBE_EIMC_MNG          IXGBE_EICR_MNG       /* MNG Event Interrupt */</div><div class='ctx'> #define IXGBE_EIMC_TIMESYNC     IXGBE_EICR_TIMESYNC  /* Timesync Event */</div><div class='ctx'> #define IXGBE_EIMC_GPI_SDP0(_hw)	IXGBE_EICR_GPI_SDP0(_hw)</div><div class='hunk'>@@ -2010,7 +2025,7 @@ enum {</div><div class='ctx'> /* EEPROM Addressing bits based on type (0-small, 1-large) */</div><div class='ctx'> #define IXGBE_EEC_ADDR_SIZE 0x00000400</div><div class='ctx'> #define IXGBE_EEC_SIZE      0x00007800 /* EEPROM Size */</div><div class='del'>-#define IXGBE_EERD_MAX_ADDR 0x00003FFF /* EERD alows 14 bits for addr. */</div><div class='add'>+#define IXGBE_EERD_MAX_ADDR 0x00003FFF /* EERD allows 14 bits for addr. */</div><div class='ctx'> </div><div class='ctx'> #define IXGBE_EEC_SIZE_SHIFT          11</div><div class='ctx'> #define IXGBE_EEPROM_WORD_SIZE_SHIFT  6</div><div class='hunk'>@@ -2068,6 +2083,7 @@ enum {</div><div class='ctx'> #define IXGBE_SAN_MAC_ADDR_PTR  0x28</div><div class='ctx'> #define IXGBE_DEVICE_CAPS       0x2C</div><div class='ctx'> #define IXGBE_SERIAL_NUMBER_MAC_ADDR 0x11</div><div class='add'>+#define IXGBE_PCIE_MSIX_E610_CAPS	0xB2</div><div class='ctx'> #define IXGBE_PCIE_MSIX_82599_CAPS  0x72</div><div class='ctx'> #define IXGBE_MAX_MSIX_VECTORS_82599	0x40</div><div class='ctx'> #define IXGBE_PCIE_MSIX_82598_CAPS  0x62</div><div class='hunk'>@@ -2168,6 +2184,7 @@ enum {</div><div class='ctx'> #define IXGBE_PCI_DEVICE_STATUS   0xAA</div><div class='ctx'> #define IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING   0x0020</div><div class='ctx'> #define IXGBE_PCI_LINK_STATUS     0xB2</div><div class='add'>+#define IXGBE_PCI_LINK_STATUS_E610	0x82</div><div class='ctx'> #define IXGBE_PCI_DEVICE_CONTROL2 0xC8</div><div class='ctx'> #define IXGBE_PCI_LINK_WIDTH      0x3F0</div><div class='ctx'> #define IXGBE_PCI_LINK_WIDTH_1    0x10</div><div class='hunk'>@@ -2288,6 +2305,7 @@ enum {</div><div class='ctx'> #define IXGBE_RXMTRL_V2_MGMT_MSG		0x0D00</div><div class='ctx'> </div><div class='ctx'> #define IXGBE_FCTRL_SBP 0x00000002 /* Store Bad Packet */</div><div class='add'>+#define IXGBE_FCTRL_TPE 0x00000080 /* Tag Promiscuous Ena*/</div><div class='ctx'> #define IXGBE_FCTRL_MPE 0x00000100 /* Multicast Promiscuous Ena*/</div><div class='ctx'> #define IXGBE_FCTRL_UPE 0x00000200 /* Unicast Promiscuous Ena */</div><div class='ctx'> #define IXGBE_FCTRL_BAM 0x00000400 /* Broadcast Accept Mode */</div><div class='hunk'>@@ -2351,6 +2369,7 @@ enum {</div><div class='ctx'> /* Multiple Transmit Queue Command Register */</div><div class='ctx'> #define IXGBE_MTQC_RT_ENA       0x1 /* DCB Enable */</div><div class='ctx'> #define IXGBE_MTQC_VT_ENA       0x2 /* VMDQ2 Enable */</div><div class='add'>+#define IXGBE_MTQC_NUM_TC_OR_Q  0xC /* Number of TCs or TxQs per pool */</div><div class='ctx'> #define IXGBE_MTQC_64Q_1PB      0x0 /* 64 queues 1 pack buffer */</div><div class='ctx'> #define IXGBE_MTQC_32VF         0x8 /* 4 TX Queues per pool w/32VF's */</div><div class='ctx'> #define IXGBE_MTQC_64VF         0x4 /* 2 TX Queues per pool w/64VF's */</div><div class='hunk'>@@ -2731,6 +2750,28 @@ enum ixgbe_fdir_pballoc_type {</div><div class='ctx'> #define FW_PHY_INFO_ID_HI_MASK		0xFFFF0000u</div><div class='ctx'> #define FW_PHY_INFO_ID_LO_MASK		0x0000FFFFu</div><div class='ctx'> </div><div class='add'>+/* There are only 3 options for VFs creation on this device:</div><div class='add'>+ * 16 VFs pool with 8 queues each</div><div class='add'>+ * 32 VFs pool with 4 queues each</div><div class='add'>+ * 64 VFs pool with 2 queues each</div><div class='add'>+ *</div><div class='add'>+ * That means reading some VF registers that map VF to queue depending on</div><div class='add'>+ * chosen option. Define values that help dealing with each scenario.</div><div class='add'>+ */</div><div class='add'>+/* Number of queues based on VFs pool */</div><div class='add'>+#define IXGBE_16VFS_QUEUES		8</div><div class='add'>+#define IXGBE_32VFS_QUEUES		4</div><div class='add'>+#define IXGBE_64VFS_QUEUES		2</div><div class='add'>+/* Mask for getting queues bits based on VFs pool */</div><div class='add'>+#define IXGBE_16VFS_BITMASK		GENMASK(IXGBE_16VFS_QUEUES - 1, 0)</div><div class='add'>+#define IXGBE_32VFS_BITMASK		GENMASK(IXGBE_32VFS_QUEUES - 1, 0)</div><div class='add'>+#define IXGBE_64VFS_BITMASK		GENMASK(IXGBE_64VFS_QUEUES - 1, 0)</div><div class='add'>+/* Convert queue index to register number.</div><div class='add'>+ * We have 4 registers with 32 queues in each.</div><div class='add'>+ */</div><div class='add'>+#define IXGBE_QUEUES_PER_REG		32</div><div class='add'>+#define IXGBE_QUEUES_REG_AMOUNT		4</div><div class='add'>+</div><div class='ctx'> /* Host Interface Command Structures */</div><div class='ctx'> struct ixgbe_hic_hdr {</div><div class='ctx'> 	u8 cmd;</div><div class='hunk'>@@ -2896,6 +2937,13 @@ struct ixgbe_adv_tx_context_desc {</div><div class='ctx'> 	__le32 mss_l4len_idx;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum {</div><div class='add'>+	IXGBE_VLAN_MACIP_LENS_REG	= 0,</div><div class='add'>+	IXGBE_FCEOF_SAIDX_REG		= 1,</div><div class='add'>+	IXGBE_TYPE_TUCMD_MLHL		= 2,</div><div class='add'>+	IXGBE_MSS_L4LEN_IDX		= 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Adv Transmit Descriptor Config Masks */</div><div class='ctx'> #define IXGBE_ADVTXD_DTALEN_MASK      0x0000FFFF /* Data buf length(bytes) */</div><div class='ctx'> #define IXGBE_ADVTXD_MAC_LINKSEC      0x00040000 /* Insert LinkSec */</div><div class='hunk'>@@ -2903,7 +2951,7 @@ struct ixgbe_adv_tx_context_desc {</div><div class='ctx'> #define IXGBE_ADVTXD_IPSEC_SA_INDEX_MASK   0x000003FF /* IPSec SA index */</div><div class='ctx'> #define IXGBE_ADVTXD_IPSEC_ESP_LEN_MASK    0x000001FF /* IPSec ESP length */</div><div class='ctx'> #define IXGBE_ADVTXD_DTYP_MASK  0x00F00000 /* DTYP mask */</div><div class='del'>-#define IXGBE_ADVTXD_DTYP_CTXT  0x00200000 /* Advanced Context Desc */</div><div class='add'>+#define IXGBE_ADVTXD_DTYP_CTXT	0x2 /* Advanced Context Desc */</div><div class='ctx'> #define IXGBE_ADVTXD_DTYP_DATA  0x00300000 /* Advanced Data Descriptor */</div><div class='ctx'> #define IXGBE_ADVTXD_DCMD_EOP   IXGBE_TXD_CMD_EOP  /* End of Packet */</div><div class='ctx'> #define IXGBE_ADVTXD_DCMD_IFCS  IXGBE_TXD_CMD_IFCS /* Insert FCS */</div><div class='hunk'>@@ -2952,6 +3000,8 @@ struct ixgbe_adv_tx_context_desc {</div><div class='ctx'> #define IXGBE_ADVTXD_FCOEF_EOF_MASK  (3u &lt;&lt; 10)  /* FC EOF index */</div><div class='ctx'> #define IXGBE_ADVTXD_L4LEN_SHIFT     8  /* Adv ctxt L4LEN shift */</div><div class='ctx'> #define IXGBE_ADVTXD_MSS_SHIFT       16  /* Adv ctxt MSS shift */</div><div class='add'>+#define IXGBE_ADVTXD_MSS_MASK		GENMASK(31, IXGBE_ADVTXD_MSS_SHIFT)</div><div class='add'>+#define IXGBE_ADVTXD_HEADER_LEN_MASK	GENMASK(8, 0)</div><div class='ctx'> </div><div class='ctx'> /* Autonegotiation advertised speeds */</div><div class='ctx'> typedef u32 ixgbe_autoneg_advertised;</div><div class='hunk'>@@ -2970,6 +3020,29 @@ typedef u32 ixgbe_link_speed;</div><div class='ctx'> 					IXGBE_LINK_SPEED_1GB_FULL | \</div><div class='ctx'> 					IXGBE_LINK_SPEED_10GB_FULL)</div><div class='ctx'> </div><div class='add'>+/* Physical layer type */</div><div class='add'>+typedef u64 ixgbe_physical_layer;</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_UNKNOWN		0</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_10GBASE_T		0x00001</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_1000BASE_T		0x00002</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_100BASE_TX		0x00004</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU	0x00008</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_10GBASE_LR		0x00010</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_10GBASE_LRM	0x00020</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_10GBASE_SR		0x00040</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_10GBASE_KX4	0x00080</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_10GBASE_CX4	0x00100</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_1000BASE_KX	0x00200</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_1000BASE_BX	0x00400</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_10GBASE_KR		0x00800</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_10GBASE_XAUI	0x01000</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA	0x02000</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_1000BASE_SX	0x04000</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_10BASE_T		0x08000</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_2500BASE_KX	0x10000</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_2500BASE_T		0x20000</div><div class='add'>+#define IXGBE_PHYSICAL_LAYER_5000BASE_T		0x40000</div><div class='add'>+</div><div class='ctx'> /* Flow Control Data Sheet defined values</div><div class='ctx'>  * Calculation and defines taken from 802.1bb Annex O</div><div class='ctx'>  */</div><div class='hunk'>@@ -3145,6 +3218,8 @@ enum ixgbe_mac_type {</div><div class='ctx'> 	ixgbe_mac_X550,</div><div class='ctx'> 	ixgbe_mac_X550EM_x,</div><div class='ctx'> 	ixgbe_mac_x550em_a,</div><div class='add'>+	ixgbe_mac_e610,</div><div class='add'>+	ixgbe_mac_e610_vf,</div><div class='ctx'> 	ixgbe_num_macs</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3224,7 +3299,9 @@ enum ixgbe_media_type {</div><div class='ctx'> 	ixgbe_media_type_copper,</div><div class='ctx'> 	ixgbe_media_type_backplane,</div><div class='ctx'> 	ixgbe_media_type_cx4,</div><div class='del'>-	ixgbe_media_type_virtual</div><div class='add'>+	ixgbe_media_type_virtual,</div><div class='add'>+	ixgbe_media_type_da,</div><div class='add'>+	ixgbe_media_type_aui,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Flow Control Settings */</div><div class='hunk'>@@ -3233,7 +3310,8 @@ enum ixgbe_fc_mode {</div><div class='ctx'> 	ixgbe_fc_rx_pause,</div><div class='ctx'> 	ixgbe_fc_tx_pause,</div><div class='ctx'> 	ixgbe_fc_full,</div><div class='del'>-	ixgbe_fc_default</div><div class='add'>+	ixgbe_fc_default,</div><div class='add'>+	ixgbe_fc_pfc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Smart Speed Settings */</div><div class='hunk'>@@ -3403,6 +3481,8 @@ struct ixgbe_eeprom_operations {</div><div class='ctx'> 	int (*validate_checksum)(struct ixgbe_hw *, u16 *);</div><div class='ctx'> 	int (*update_checksum)(struct ixgbe_hw *);</div><div class='ctx'> 	int (*calc_checksum)(struct ixgbe_hw *);</div><div class='add'>+	int (*read_pba_string)(struct ixgbe_hw *hw, u8 *pba_num,</div><div class='add'>+			       u32 pba_num_size);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_mac_operations {</div><div class='hunk'>@@ -3411,6 +3491,7 @@ struct ixgbe_mac_operations {</div><div class='ctx'> 	int (*start_hw)(struct ixgbe_hw *);</div><div class='ctx'> 	int (*clear_hw_cntrs)(struct ixgbe_hw *);</div><div class='ctx'> 	enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *);</div><div class='add'>+	int (*get_fw_ver)(struct ixgbe_hw *hw);</div><div class='ctx'> 	int (*get_mac_addr)(struct ixgbe_hw *, u8 *);</div><div class='ctx'> 	int (*get_san_mac_addr)(struct ixgbe_hw *, u8 *);</div><div class='ctx'> 	int (*get_device_caps)(struct ixgbe_hw *, u16 *);</div><div class='hunk'>@@ -3479,6 +3560,8 @@ struct ixgbe_mac_operations {</div><div class='ctx'> 	int (*get_thermal_sensor_data)(struct ixgbe_hw *);</div><div class='ctx'> 	int (*init_thermal_sensor_thresh)(struct ixgbe_hw *hw);</div><div class='ctx'> 	bool (*fw_recovery_mode)(struct ixgbe_hw *hw);</div><div class='add'>+	bool (*fw_rollback_mode)(struct ixgbe_hw *hw);</div><div class='add'>+	int (*get_nvm_ver)(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);</div><div class='ctx'> 	void (*disable_rx)(struct ixgbe_hw *hw);</div><div class='ctx'> 	void (*enable_rx)(struct ixgbe_hw *hw);</div><div class='ctx'> 	void (*set_source_address_pruning)(struct ixgbe_hw *, bool,</div><div class='hunk'>@@ -3491,6 +3574,12 @@ struct ixgbe_mac_operations {</div><div class='ctx'> 	int (*dmac_config_tcs)(struct ixgbe_hw *hw);</div><div class='ctx'> 	int (*read_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32 *);</div><div class='ctx'> 	int (*write_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32);</div><div class='add'>+</div><div class='add'>+	/* MDD events */</div><div class='add'>+	void (*enable_mdd)(struct ixgbe_hw *hw);</div><div class='add'>+	void (*disable_mdd)(struct ixgbe_hw *hw);</div><div class='add'>+	void (*restore_mdd_vf)(struct ixgbe_hw *hw, u32 vf);</div><div class='add'>+	void (*handle_mdd)(struct ixgbe_hw *hw, unsigned long *vf_bitmap);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_phy_operations {</div><div class='hunk'>@@ -3533,6 +3622,9 @@ struct ixgbe_link_operations {</div><div class='ctx'> struct ixgbe_link_info {</div><div class='ctx'> 	struct ixgbe_link_operations ops;</div><div class='ctx'> 	u8 addr;</div><div class='add'>+	struct ixgbe_link_status link_info;</div><div class='add'>+	struct ixgbe_link_status link_info_old;</div><div class='add'>+	u8 get_link_info;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_eeprom_info {</div><div class='hunk'>@@ -3575,6 +3667,7 @@ struct ixgbe_mac_info {</div><div class='ctx'> 	u8				san_mac_rar_index;</div><div class='ctx'> 	struct ixgbe_thermal_sensor_data  thermal_sensor_data;</div><div class='ctx'> 	bool				set_lben;</div><div class='add'>+	u32				max_link_up_time;</div><div class='ctx'> 	u8				led_link_act;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3599,19 +3692,10 @@ struct ixgbe_phy_info {</div><div class='ctx'> 	bool                            reset_if_overtemp;</div><div class='ctx'> 	bool                            qsfp_shared_i2c_bus;</div><div class='ctx'> 	u32				nw_mng_if_sel;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#include "ixgbe_mbx.h"</div><div class='del'>-</div><div class='del'>-struct ixgbe_mbx_operations {</div><div class='del'>-	int (*init_params)(struct ixgbe_hw *hw);</div><div class='del'>-	int (*read)(struct ixgbe_hw *, u32 *, u16,  u16);</div><div class='del'>-	int (*write)(struct ixgbe_hw *, u32 *, u16, u16);</div><div class='del'>-	int (*read_posted)(struct ixgbe_hw *, u32 *, u16,  u16);</div><div class='del'>-	int (*write_posted)(struct ixgbe_hw *, u32 *, u16, u16);</div><div class='del'>-	int (*check_for_msg)(struct ixgbe_hw *, u16);</div><div class='del'>-	int (*check_for_ack)(struct ixgbe_hw *, u16);</div><div class='del'>-	int (*check_for_rst)(struct ixgbe_hw *, u16);</div><div class='add'>+	u64				phy_type_low;</div><div class='add'>+	u64				phy_type_high;</div><div class='add'>+	u16				curr_user_speed_req;</div><div class='add'>+	struct ixgbe_aci_cmd_set_phy_cfg_data curr_user_phy_cfg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_mbx_stats {</div><div class='hunk'>@@ -3623,6 +3707,8 @@ struct ixgbe_mbx_stats {</div><div class='ctx'> 	u32 rsts;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ixgbe_mbx_operations;</div><div class='add'>+</div><div class='ctx'> struct ixgbe_mbx_info {</div><div class='ctx'> 	const struct ixgbe_mbx_operations *ops;</div><div class='ctx'> 	struct ixgbe_mbx_stats stats;</div><div class='hunk'>@@ -3654,6 +3740,20 @@ struct ixgbe_hw {</div><div class='ctx'> 	bool				allow_unsupported_sfp;</div><div class='ctx'> 	bool				wol_enabled;</div><div class='ctx'> 	bool				need_crosstalk_fix;</div><div class='add'>+	u8				api_branch;</div><div class='add'>+	u8				api_maj_ver;</div><div class='add'>+	u8				api_min_ver;</div><div class='add'>+	u8				api_patch;</div><div class='add'>+	u8				fw_branch;</div><div class='add'>+	u8				fw_maj_ver;</div><div class='add'>+	u8				fw_min_ver;</div><div class='add'>+	u8				fw_patch;</div><div class='add'>+	u32				fw_build;</div><div class='add'>+	struct ixgbe_aci_info		aci;</div><div class='add'>+	struct ixgbe_flash_info		flash;</div><div class='add'>+	struct ixgbe_hw_dev_caps	dev_caps;</div><div class='add'>+	struct ixgbe_hw_func_caps	func_caps;</div><div class='add'>+	struct libie_fwlog		fwlog;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ixgbe_info {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h<br/>new file mode 100644<br/>index 000000000000..ff8d640a50b1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h</a></div><div class='hunk'>@@ -0,0 +1,1032 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _IXGBE_TYPE_E610_H_</div><div class='add'>+#define _IXGBE_TYPE_E610_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/net/intel/libie/adminq.h&gt;</div><div class='add'>+</div><div class='add'>+#define BYTES_PER_DWORD	4</div><div class='add'>+</div><div class='add'>+/* General E610 defines */</div><div class='add'>+#define IXGBE_MAX_VSI			768</div><div class='add'>+</div><div class='add'>+/* Checksum and Shadow RAM pointers */</div><div class='add'>+#define IXGBE_E610_SR_NVM_CTRL_WORD		0x00</div><div class='add'>+#define IXGBE_E610_SR_PBA_BLOCK_PTR		0x16</div><div class='add'>+#define IXGBE_E610_SR_PBA_BLOCK_MASK		GENMASK(15, 8)</div><div class='add'>+#define IXGBE_E610_SR_NVM_DEV_STARTER_VER	0x18</div><div class='add'>+#define IXGBE_E610_SR_NVM_EETRACK_LO		0x2D</div><div class='add'>+#define IXGBE_E610_SR_NVM_EETRACK_HI		0x2E</div><div class='add'>+#define IXGBE_E610_NVM_VER_LO_MASK		GENMASK(7, 0)</div><div class='add'>+#define IXGBE_E610_NVM_VER_HI_MASK		GENMASK(15, 12)</div><div class='add'>+#define IXGBE_E610_SR_SW_CHECKSUM_WORD		0x3F</div><div class='add'>+#define IXGBE_E610_SR_PFA_PTR			0x40</div><div class='add'>+#define IXGBE_E610_SR_1ST_NVM_BANK_PTR		0x42</div><div class='add'>+#define IXGBE_E610_SR_NVM_BANK_SIZE		0x43</div><div class='add'>+#define IXGBE_E610_SR_1ST_OROM_BANK_PTR		0x44</div><div class='add'>+#define IXGBE_E610_SR_OROM_BANK_SIZE		0x45</div><div class='add'>+#define IXGBE_E610_SR_NETLIST_BANK_PTR		0x46</div><div class='add'>+#define IXGBE_E610_SR_NETLIST_BANK_SIZE		0x47</div><div class='add'>+</div><div class='add'>+/* The OROM version topology */</div><div class='add'>+#define IXGBE_OROM_VER_PATCH_MASK		GENMASK_ULL(7, 0)</div><div class='add'>+#define IXGBE_OROM_VER_BUILD_MASK		GENMASK_ULL(23, 8)</div><div class='add'>+#define IXGBE_OROM_VER_MASK			GENMASK_ULL(31, 24)</div><div class='add'>+</div><div class='add'>+/* CSS Header words */</div><div class='add'>+#define IXGBE_NVM_CSS_HDR_LEN_L			0x02</div><div class='add'>+#define IXGBE_NVM_CSS_HDR_LEN_H			0x03</div><div class='add'>+#define IXGBE_NVM_CSS_SREV_L			0x14</div><div class='add'>+#define IXGBE_NVM_CSS_SREV_H			0x15</div><div class='add'>+</div><div class='add'>+#define IXGBE_HDR_LEN_ROUNDUP			32</div><div class='add'>+</div><div class='add'>+/* Length of Authentication header section in words */</div><div class='add'>+#define IXGBE_NVM_AUTH_HEADER_LEN		0x08</div><div class='add'>+</div><div class='add'>+/* Shadow RAM related */</div><div class='add'>+#define IXGBE_SR_WORDS_IN_1KB	512</div><div class='add'>+</div><div class='add'>+/* The Netlist ID Block is located after all of the Link Topology nodes. */</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_SIZE		0x30</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_OFFSET(n)		IXGBE_NETLIST_LINK_TOPO_OFFSET(0x0004 + 2 * (n))</div><div class='add'>+</div><div class='add'>+/* netlist ID block field offsets (word offsets) */</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_MAJOR_VER_LOW	0x02</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_MAJOR_VER_HIGH	0x03</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_MINOR_VER_LOW	0x04</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_MINOR_VER_HIGH	0x05</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_TYPE_LOW		0x06</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_TYPE_HIGH		0x07</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_REV_LOW		0x08</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_REV_HIGH		0x09</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_SHA_HASH_WORD(n)	(0x0A + (n))</div><div class='add'>+#define IXGBE_NETLIST_ID_BLK_CUST_VER		0x2F</div><div class='add'>+</div><div class='add'>+/* The Link Topology Netlist section is stored as a series of words. It is</div><div class='add'>+ * stored in the NVM as a TLV, with the first two words containing the type</div><div class='add'>+ * and length.</div><div class='add'>+ */</div><div class='add'>+#define IXGBE_NETLIST_LINK_TOPO_MOD_ID		0x011B</div><div class='add'>+#define IXGBE_NETLIST_TYPE_OFFSET		0x0000</div><div class='add'>+#define IXGBE_NETLIST_LEN_OFFSET		0x0001</div><div class='add'>+</div><div class='add'>+/* The Link Topology section follows the TLV header. When reading the netlist</div><div class='add'>+ * using ixgbe_read_netlist_module, we need to account for the 2-word TLV</div><div class='add'>+ * header.</div><div class='add'>+ */</div><div class='add'>+#define IXGBE_NETLIST_LINK_TOPO_OFFSET(n)	((n) + 2)</div><div class='add'>+#define IXGBE_LINK_TOPO_MODULE_LEN	IXGBE_NETLIST_LINK_TOPO_OFFSET(0x0000)</div><div class='add'>+#define IXGBE_LINK_TOPO_NODE_COUNT	IXGBE_NETLIST_LINK_TOPO_OFFSET(0x0001)</div><div class='add'>+#define IXGBE_LINK_TOPO_NODE_COUNT_M		GENMASK_ULL(9, 0)</div><div class='add'>+</div><div class='add'>+/* Firmware Status Register (GL_FWSTS) */</div><div class='add'>+#define GL_FWSTS		0x00083048 /* Reset Source: POR */</div><div class='add'>+#define GL_FWSTS_EP_PF0		BIT(24)</div><div class='add'>+#define GL_FWSTS_EP_PF1		BIT(25)</div><div class='add'>+</div><div class='add'>+/* Global NVM General Status Register */</div><div class='add'>+#define GLNVM_GENS		0x000B6100 /* Reset Source: POR */</div><div class='add'>+#define GLNVM_GENS_SR_SIZE_M	GENMASK(7, 5)</div><div class='add'>+</div><div class='add'>+#define IXGBE_GL_MNG_FWSM		0x000B6134 /* Reset Source: POR */</div><div class='add'>+#define IXGBE_GL_MNG_FWSM_RECOVERY_M	BIT(1)</div><div class='add'>+#define IXGBE_GL_MNG_FWSM_ROLLBACK_M    BIT(2)</div><div class='add'>+</div><div class='add'>+/* Flash Access Register */</div><div class='add'>+#define IXGBE_GLNVM_FLA			0x000B6108 /* Reset Source: POR */</div><div class='add'>+#define IXGBE_GLNVM_FLA_LOCKED_S	6</div><div class='add'>+#define IXGBE_GLNVM_FLA_LOCKED_M	BIT(6)</div><div class='add'>+</div><div class='add'>+/* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */</div><div class='add'>+#define IXGBE_SR_CTRL_WORD_1_M		GENMASK(7, 6)</div><div class='add'>+#define IXGBE_SR_CTRL_WORD_VALID	BIT(0)</div><div class='add'>+#define IXGBE_SR_CTRL_WORD_OROM_BANK	BIT(3)</div><div class='add'>+#define IXGBE_SR_CTRL_WORD_NETLIST_BANK	BIT(4)</div><div class='add'>+#define IXGBE_SR_CTRL_WORD_NVM_BANK	BIT(5)</div><div class='add'>+#define IXGBE_SR_NVM_PTR_4KB_UNITS	BIT(15)</div><div class='add'>+</div><div class='add'>+/* Admin Command Interface (ACI) registers */</div><div class='add'>+#define IXGBE_PF_HIDA(_i)			(0x00085000 + ((_i) * 4))</div><div class='add'>+#define IXGBE_PF_HIDA_2(_i)			(0x00085020 + ((_i) * 4))</div><div class='add'>+#define IXGBE_PF_HIBA(_i)			(0x00084000 + ((_i) * 4))</div><div class='add'>+#define IXGBE_PF_HICR				0x00082048</div><div class='add'>+</div><div class='add'>+#define IXGBE_PF_HICR_EN			BIT(0)</div><div class='add'>+#define IXGBE_PF_HICR_C				BIT(1)</div><div class='add'>+#define IXGBE_PF_HICR_SV			BIT(2)</div><div class='add'>+#define IXGBE_PF_HICR_EV			BIT(3)</div><div class='add'>+</div><div class='add'>+#define IXGBE_FW_API_VER_MAJOR		0x01</div><div class='add'>+#define IXGBE_FW_API_VER_MINOR		0x07</div><div class='add'>+#define IXGBE_FW_API_VER_DIFF_ALLOWED	0x02</div><div class='add'>+</div><div class='add'>+#define IXGBE_ACI_DESC_SIZE		32</div><div class='add'>+#define IXGBE_ACI_DESC_SIZE_IN_DWORDS	(IXGBE_ACI_DESC_SIZE / BYTES_PER_DWORD)</div><div class='add'>+</div><div class='add'>+#define IXGBE_ACI_MAX_BUFFER_SIZE		4096    /* Size in bytes */</div><div class='add'>+#define IXGBE_ACI_SEND_DELAY_TIME_MS		10</div><div class='add'>+#define IXGBE_ACI_SEND_MAX_EXECUTE		3</div><div class='add'>+#define IXGBE_ACI_SEND_TIMEOUT_MS		\</div><div class='add'>+		(IXGBE_ACI_SEND_MAX_EXECUTE * IXGBE_ACI_SEND_DELAY_TIME_MS)</div><div class='add'>+/* [ms] timeout of waiting for sync response */</div><div class='add'>+#define IXGBE_ACI_SYNC_RESPONSE_TIMEOUT		100000</div><div class='add'>+/* [ms] timeout of waiting for async response */</div><div class='add'>+#define IXGBE_ACI_ASYNC_RESPONSE_TIMEOUT	150000</div><div class='add'>+/* [ms] timeout of waiting for resource release */</div><div class='add'>+#define IXGBE_ACI_RELEASE_RES_TIMEOUT		10000</div><div class='add'>+</div><div class='add'>+/* Admin Command Interface (ACI) opcodes */</div><div class='add'>+enum ixgbe_aci_opc {</div><div class='add'>+	ixgbe_aci_opc_get_ver				= 0x0001,</div><div class='add'>+	ixgbe_aci_opc_driver_ver			= 0x0002,</div><div class='add'>+	ixgbe_aci_opc_get_exp_err			= 0x0005,</div><div class='add'>+</div><div class='add'>+	/* resource ownership */</div><div class='add'>+	ixgbe_aci_opc_req_res				= 0x0008,</div><div class='add'>+	ixgbe_aci_opc_release_res			= 0x0009,</div><div class='add'>+</div><div class='add'>+	/* device/function capabilities */</div><div class='add'>+	ixgbe_aci_opc_list_func_caps			= 0x000A,</div><div class='add'>+	ixgbe_aci_opc_list_dev_caps			= 0x000B,</div><div class='add'>+</div><div class='add'>+	/* safe disable of RXEN */</div><div class='add'>+	ixgbe_aci_opc_disable_rxen			= 0x000C,</div><div class='add'>+</div><div class='add'>+	/* FW events */</div><div class='add'>+	ixgbe_aci_opc_get_fw_event			= 0x0014,</div><div class='add'>+</div><div class='add'>+	/* PHY commands */</div><div class='add'>+	ixgbe_aci_opc_get_phy_caps			= 0x0600,</div><div class='add'>+	ixgbe_aci_opc_set_phy_cfg			= 0x0601,</div><div class='add'>+	ixgbe_aci_opc_restart_an			= 0x0605,</div><div class='add'>+	ixgbe_aci_opc_get_link_status			= 0x0607,</div><div class='add'>+	ixgbe_aci_opc_set_event_mask			= 0x0613,</div><div class='add'>+	ixgbe_aci_opc_get_link_topo			= 0x06E0,</div><div class='add'>+	ixgbe_aci_opc_get_link_topo_pin			= 0x06E1,</div><div class='add'>+	ixgbe_aci_opc_read_i2c				= 0x06E2,</div><div class='add'>+	ixgbe_aci_opc_write_i2c				= 0x06E3,</div><div class='add'>+	ixgbe_aci_opc_read_mdio				= 0x06E4,</div><div class='add'>+	ixgbe_aci_opc_write_mdio			= 0x06E5,</div><div class='add'>+	ixgbe_aci_opc_set_gpio_by_func			= 0x06E6,</div><div class='add'>+	ixgbe_aci_opc_get_gpio_by_func			= 0x06E7,</div><div class='add'>+	ixgbe_aci_opc_set_port_id_led			= 0x06E9,</div><div class='add'>+	ixgbe_aci_opc_set_gpio				= 0x06EC,</div><div class='add'>+	ixgbe_aci_opc_get_gpio				= 0x06ED,</div><div class='add'>+	ixgbe_aci_opc_sff_eeprom			= 0x06EE,</div><div class='add'>+	ixgbe_aci_opc_prog_topo_dev_nvm			= 0x06F2,</div><div class='add'>+	ixgbe_aci_opc_read_topo_dev_nvm			= 0x06F3,</div><div class='add'>+</div><div class='add'>+	/* NVM commands */</div><div class='add'>+	ixgbe_aci_opc_nvm_read				= 0x0701,</div><div class='add'>+	ixgbe_aci_opc_nvm_erase				= 0x0702,</div><div class='add'>+	ixgbe_aci_opc_nvm_write				= 0x0703,</div><div class='add'>+	ixgbe_aci_opc_nvm_cfg_read			= 0x0704,</div><div class='add'>+	ixgbe_aci_opc_nvm_cfg_write			= 0x0705,</div><div class='add'>+	ixgbe_aci_opc_nvm_checksum			= 0x0706,</div><div class='add'>+	ixgbe_aci_opc_nvm_write_activate		= 0x0707,</div><div class='add'>+	ixgbe_aci_opc_nvm_sr_dump			= 0x0707,</div><div class='add'>+	ixgbe_aci_opc_nvm_save_factory_settings		= 0x0708,</div><div class='add'>+	ixgbe_aci_opc_nvm_update_empr			= 0x0709,</div><div class='add'>+	ixgbe_aci_opc_nvm_pkg_data			= 0x070A,</div><div class='add'>+	ixgbe_aci_opc_nvm_pass_component_tbl		= 0x070B,</div><div class='add'>+</div><div class='add'>+	/* Alternate Structure Commands */</div><div class='add'>+	ixgbe_aci_opc_write_alt_direct			= 0x0900,</div><div class='add'>+	ixgbe_aci_opc_write_alt_indirect		= 0x0901,</div><div class='add'>+	ixgbe_aci_opc_read_alt_direct			= 0x0902,</div><div class='add'>+	ixgbe_aci_opc_read_alt_indirect			= 0x0903,</div><div class='add'>+	ixgbe_aci_opc_done_alt_write			= 0x0904,</div><div class='add'>+	ixgbe_aci_opc_clear_port_alt_write		= 0x0906,</div><div class='add'>+</div><div class='add'>+	/* TCA Events */</div><div class='add'>+	ixgbe_aci_opc_temp_tca_event                    = 0x0C94,</div><div class='add'>+</div><div class='add'>+	/* debug commands */</div><div class='add'>+	ixgbe_aci_opc_debug_dump_internals		= 0xFF08,</div><div class='add'>+</div><div class='add'>+	/* SystemDiagnostic commands */</div><div class='add'>+	ixgbe_aci_opc_set_health_status_config		= 0xFF20,</div><div class='add'>+	ixgbe_aci_opc_get_supported_health_status_codes	= 0xFF21,</div><div class='add'>+	ixgbe_aci_opc_get_health_status			= 0xFF22,</div><div class='add'>+	ixgbe_aci_opc_clear_health_status		= 0xFF23,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define IXGBE_DRV_VER_STR_LEN_E610	32</div><div class='add'>+</div><div class='add'>+/* Get Expanded Error Code (0x0005, direct) */</div><div class='add'>+struct ixgbe_aci_cmd_get_exp_err {</div><div class='add'>+	__le32 reason;</div><div class='add'>+#define IXGBE_ACI_EXPANDED_ERROR_NOT_PROVIDED	0xFFFFFFFF</div><div class='add'>+	__le32 identifier;</div><div class='add'>+	u8 rsvd[8];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* FW update timeout definitions are in milliseconds */</div><div class='add'>+#define IXGBE_NVM_TIMEOUT		180000</div><div class='add'>+</div><div class='add'>+/* Disable RXEN (direct 0x000C) */</div><div class='add'>+struct ixgbe_aci_cmd_disable_rxen {</div><div class='add'>+	u8 lport_num;</div><div class='add'>+	u8 reserved[15];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Get PHY capabilities (indirect 0x0600) */</div><div class='add'>+struct ixgbe_aci_cmd_get_phy_caps {</div><div class='add'>+	u8 lport_num;</div><div class='add'>+	u8 reserved;</div><div class='add'>+	__le16 param0;</div><div class='add'>+	/* 18.0 - Report qualified modules */</div><div class='add'>+#define IXGBE_ACI_GET_PHY_RQM		BIT(0)</div><div class='add'>+	/* 18.1 - 18.3 : Report mode</div><div class='add'>+	 * 000b - Report topology capabilities, without media</div><div class='add'>+	 * 001b - Report topology capabilities, with media</div><div class='add'>+	 * 010b - Report Active configuration</div><div class='add'>+	 * 011b - Report PHY Type and FEC mode capabilities</div><div class='add'>+	 * 100b - Report Default capabilities</div><div class='add'>+	 */</div><div class='add'>+#define IXGBE_ACI_REPORT_MODE_M			GENMASK(3, 1)</div><div class='add'>+#define IXGBE_ACI_REPORT_TOPO_CAP_NO_MEDIA	0</div><div class='add'>+#define IXGBE_ACI_REPORT_TOPO_CAP_MEDIA		BIT(1)</div><div class='add'>+#define IXGBE_ACI_REPORT_ACTIVE_CFG		BIT(2)</div><div class='add'>+#define IXGBE_ACI_REPORT_DFLT_CFG		BIT(3)</div><div class='add'>+	__le32 reserved1;</div><div class='add'>+	__le32 addr_high;</div><div class='add'>+	__le32 addr_low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This is #define of PHY type (Extended):</div><div class='add'>+ * The first set of defines is for phy_type_low.</div><div class='add'>+ */</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_100BASE_TX		BIT_ULL(0)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_100M_SGMII		BIT_ULL(1)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_1000BASE_T		BIT_ULL(2)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_1000BASE_SX		BIT_ULL(3)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_1000BASE_LX		BIT_ULL(4)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_1000BASE_KX		BIT_ULL(5)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_1G_SGMII		BIT_ULL(6)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_2500BASE_T		BIT_ULL(7)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_2500BASE_X		BIT_ULL(8)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_2500BASE_KX		BIT_ULL(9)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_5GBASE_T		BIT_ULL(10)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_5GBASE_KR		BIT_ULL(11)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_10GBASE_T		BIT_ULL(12)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_10G_SFI_DA		BIT_ULL(13)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_10GBASE_SR		BIT_ULL(14)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_10GBASE_LR		BIT_ULL(15)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_10GBASE_KR_CR1	BIT_ULL(16)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_10G_SFI_AOC_ACC	BIT_ULL(17)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_10G_SFI_C2C		BIT_ULL(18)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25GBASE_T		BIT_ULL(19)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25GBASE_CR		BIT_ULL(20)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25GBASE_CR_S		BIT_ULL(21)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25GBASE_CR1		BIT_ULL(22)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25GBASE_SR		BIT_ULL(23)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25GBASE_LR		BIT_ULL(24)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25GBASE_KR		BIT_ULL(25)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25GBASE_KR_S		BIT_ULL(26)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25GBASE_KR1		BIT_ULL(27)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25G_AUI_AOC_ACC	BIT_ULL(28)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_25G_AUI_C2C		BIT_ULL(29)</div><div class='add'>+#define IXGBE_PHY_TYPE_LOW_MAX_INDEX		29</div><div class='add'>+/* The second set of defines is for phy_type_high. */</div><div class='add'>+#define IXGBE_PHY_TYPE_HIGH_10BASE_T		BIT_ULL(1)</div><div class='add'>+#define IXGBE_PHY_TYPE_HIGH_10M_SGMII		BIT_ULL(2)</div><div class='add'>+#define IXGBE_PHY_TYPE_HIGH_2500M_SGMII		BIT_ULL(56)</div><div class='add'>+#define IXGBE_PHY_TYPE_HIGH_100M_USXGMII	BIT_ULL(57)</div><div class='add'>+#define IXGBE_PHY_TYPE_HIGH_1G_USXGMII		BIT_ULL(58)</div><div class='add'>+#define IXGBE_PHY_TYPE_HIGH_2500M_USXGMII	BIT_ULL(59)</div><div class='add'>+#define IXGBE_PHY_TYPE_HIGH_5G_USXGMII		BIT_ULL(60)</div><div class='add'>+#define IXGBE_PHY_TYPE_HIGH_10G_USXGMII		BIT_ULL(61)</div><div class='add'>+#define IXGBE_PHY_TYPE_HIGH_MAX_INDEX		61</div><div class='add'>+</div><div class='add'>+struct ixgbe_aci_cmd_get_phy_caps_data {</div><div class='add'>+	__le64 phy_type_low; /* Use values from IXGBE_PHY_TYPE_LOW_* */</div><div class='add'>+	__le64 phy_type_high; /* Use values from IXGBE_PHY_TYPE_HIGH_* */</div><div class='add'>+	u8 caps;</div><div class='add'>+#define IXGBE_ACI_PHY_EN_TX_LINK_PAUSE			BIT(0)</div><div class='add'>+#define IXGBE_ACI_PHY_EN_RX_LINK_PAUSE			BIT(1)</div><div class='add'>+#define IXGBE_ACI_PHY_LOW_POWER_MODE			BIT(2)</div><div class='add'>+#define IXGBE_ACI_PHY_EN_LINK				BIT(3)</div><div class='add'>+#define IXGBE_ACI_PHY_AN_MODE				BIT(4)</div><div class='add'>+#define IXGBE_ACI_PHY_EN_MOD_QUAL			BIT(5)</div><div class='add'>+#define IXGBE_ACI_PHY_EN_LESM				BIT(6)</div><div class='add'>+#define IXGBE_ACI_PHY_EN_AUTO_FEC			BIT(7)</div><div class='add'>+#define IXGBE_ACI_PHY_CAPS_MASK				GENMASK(7, 0)</div><div class='add'>+	u8 low_power_ctrl_an;</div><div class='add'>+#define IXGBE_ACI_PHY_EN_D3COLD_LOW_POWER_AUTONEG	BIT(0)</div><div class='add'>+#define IXGBE_ACI_PHY_AN_EN_CLAUSE28			BIT(1)</div><div class='add'>+#define IXGBE_ACI_PHY_AN_EN_CLAUSE73			BIT(2)</div><div class='add'>+#define IXGBE_ACI_PHY_AN_EN_CLAUSE37			BIT(3)</div><div class='add'>+	__le16 eee_cap;</div><div class='add'>+#define IXGBE_ACI_PHY_EEE_EN_100BASE_TX			BIT(0)</div><div class='add'>+#define IXGBE_ACI_PHY_EEE_EN_1000BASE_T			BIT(1)</div><div class='add'>+#define IXGBE_ACI_PHY_EEE_EN_10GBASE_T			BIT(2)</div><div class='add'>+#define IXGBE_ACI_PHY_EEE_EN_1000BASE_KX		BIT(3)</div><div class='add'>+#define IXGBE_ACI_PHY_EEE_EN_10GBASE_KR			BIT(4)</div><div class='add'>+#define IXGBE_ACI_PHY_EEE_EN_25GBASE_KR			BIT(5)</div><div class='add'>+#define IXGBE_ACI_PHY_EEE_EN_10BASE_T			BIT(11)</div><div class='add'>+	__le16 eeer_value;</div><div class='add'>+	u8 phy_id_oui[4]; /* PHY/Module ID connected on the port */</div><div class='add'>+	u8 phy_fw_ver[8];</div><div class='add'>+	u8 link_fec_options;</div><div class='add'>+#define IXGBE_ACI_PHY_FEC_10G_KR_40G_KR4_EN		BIT(0)</div><div class='add'>+#define IXGBE_ACI_PHY_FEC_10G_KR_40G_KR4_REQ		BIT(1)</div><div class='add'>+#define IXGBE_ACI_PHY_FEC_25G_RS_528_REQ		BIT(2)</div><div class='add'>+#define IXGBE_ACI_PHY_FEC_25G_KR_REQ			BIT(3)</div><div class='add'>+#define IXGBE_ACI_PHY_FEC_25G_RS_544_REQ		BIT(4)</div><div class='add'>+#define IXGBE_ACI_PHY_FEC_25G_RS_CLAUSE91_EN		BIT(6)</div><div class='add'>+#define IXGBE_ACI_PHY_FEC_25G_KR_CLAUSE74_EN		BIT(7)</div><div class='add'>+#define IXGBE_ACI_PHY_FEC_MASK				0xdf</div><div class='add'>+	u8 module_compliance_enforcement;</div><div class='add'>+#define IXGBE_ACI_MOD_ENFORCE_STRICT_MODE		BIT(0)</div><div class='add'>+	u8 extended_compliance_code;</div><div class='add'>+#define IXGBE_ACI_MODULE_TYPE_TOTAL_BYTE		3</div><div class='add'>+	u8 module_type[IXGBE_ACI_MODULE_TYPE_TOTAL_BYTE];</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_BYTE0_SFP_PLUS		0xA0</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_BYTE0_QSFP_PLUS		0x80</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_IDENT			1</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE	BIT(0)</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE	BIT(1)</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_SR		BIT(4)</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_LR		BIT(5)</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_LRM		BIT(6)</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_ER		BIT(7)</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_BYTE2_SFP_PLUS		0xA0</div><div class='add'>+#define IXGBE_ACI_MOD_TYPE_BYTE2_QSFP_PLUS		0x86</div><div class='add'>+	u8 qualified_module_count;</div><div class='add'>+	u8 rsvd2[7];	/* Bytes 47:41 reserved */</div><div class='add'>+#define IXGBE_ACI_QUAL_MOD_COUNT_MAX			16</div><div class='add'>+	struct {</div><div class='add'>+		u8 v_oui[3];</div><div class='add'>+		u8 rsvd3;</div><div class='add'>+		u8 v_part[16];</div><div class='add'>+		__le32 v_rev;</div><div class='add'>+		__le64 rsvd4;</div><div class='add'>+	} qual_modules[IXGBE_ACI_QUAL_MOD_COUNT_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Set PHY capabilities (direct 0x0601)</div><div class='add'>+ * NOTE: This command must be followed by setup link and restart auto-neg</div><div class='add'>+ */</div><div class='add'>+struct ixgbe_aci_cmd_set_phy_cfg {</div><div class='add'>+	u8 lport_num;</div><div class='add'>+	u8 reserved[7];</div><div class='add'>+	__le32 addr_high;</div><div class='add'>+	__le32 addr_low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Set PHY config command data structure */</div><div class='add'>+struct ixgbe_aci_cmd_set_phy_cfg_data {</div><div class='add'>+	__le64 phy_type_low; /* Use values from IXGBE_PHY_TYPE_LOW_* */</div><div class='add'>+	__le64 phy_type_high; /* Use values from IXGBE_PHY_TYPE_HIGH_* */</div><div class='add'>+	u8 caps;</div><div class='add'>+#define IXGBE_ACI_PHY_ENA_VALID_MASK		0xef</div><div class='add'>+#define IXGBE_ACI_PHY_ENA_TX_PAUSE_ABILITY	BIT(0)</div><div class='add'>+#define IXGBE_ACI_PHY_ENA_RX_PAUSE_ABILITY	BIT(1)</div><div class='add'>+#define IXGBE_ACI_PHY_ENA_LOW_POWER		BIT(2)</div><div class='add'>+#define IXGBE_ACI_PHY_ENA_LINK			BIT(3)</div><div class='add'>+#define IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT	BIT(5)</div><div class='add'>+#define IXGBE_ACI_PHY_ENA_LESM			BIT(6)</div><div class='add'>+#define IXGBE_ACI_PHY_ENA_AUTO_FEC		BIT(7)</div><div class='add'>+	u8 low_power_ctrl_an;</div><div class='add'>+	__le16 eee_cap; /* Value from ixgbe_aci_get_phy_caps */</div><div class='add'>+	__le16 eeer_value; /* Use defines from ixgbe_aci_get_phy_caps */</div><div class='add'>+	u8 link_fec_opt; /* Use defines from ixgbe_aci_get_phy_caps */</div><div class='add'>+	u8 module_compliance_enforcement;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Restart AN command data structure (direct 0x0605)</div><div class='add'>+ * Also used for response, with only the lport_num field present.</div><div class='add'>+ */</div><div class='add'>+struct ixgbe_aci_cmd_restart_an {</div><div class='add'>+	u8 lport_num;</div><div class='add'>+	u8 reserved;</div><div class='add'>+	u8 cmd_flags;</div><div class='add'>+#define IXGBE_ACI_RESTART_AN_LINK_RESTART	BIT(1)</div><div class='add'>+#define IXGBE_ACI_RESTART_AN_LINK_ENABLE	BIT(2)</div><div class='add'>+	u8 reserved2[13];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Get link status (indirect 0x0607), also used for Link Status Event */</div><div class='add'>+struct ixgbe_aci_cmd_get_link_status {</div><div class='add'>+	u8 lport_num;</div><div class='add'>+	u8 reserved;</div><div class='add'>+	__le16 cmd_flags;</div><div class='add'>+#define IXGBE_ACI_LSE_M				GENMASK(1, 0)</div><div class='add'>+#define IXGBE_ACI_LSE_NOP			0x0</div><div class='add'>+#define IXGBE_ACI_LSE_DIS			0x2</div><div class='add'>+#define IXGBE_ACI_LSE_ENA			0x3</div><div class='add'>+	/* only response uses this flag */</div><div class='add'>+#define IXGBE_ACI_LSE_IS_ENABLED		0x1</div><div class='add'>+	__le32 reserved2;</div><div class='add'>+	__le32 addr_high;</div><div class='add'>+	__le32 addr_low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Get link status response data structure, also used for Link Status Event */</div><div class='add'>+struct ixgbe_aci_cmd_get_link_status_data {</div><div class='add'>+	u8 topo_media_conflict;</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_CONFLICT		BIT(0)</div><div class='add'>+#define IXGBE_ACI_LINK_MEDIA_CONFLICT		BIT(1)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_CORRUPT		BIT(2)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_UNREACH_PRT		BIT(4)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_UNDRUTIL_PRT	BIT(5)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_UNDRUTIL_MEDIA	BIT(6)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_UNSUPP_MEDIA	BIT(7)</div><div class='add'>+	u8 link_cfg_err;</div><div class='add'>+#define IXGBE_ACI_LINK_CFG_ERR				BIT(0)</div><div class='add'>+#define IXGBE_ACI_LINK_CFG_COMPLETED			BIT(1)</div><div class='add'>+#define IXGBE_ACI_LINK_ACT_PORT_OPT_INVAL		BIT(2)</div><div class='add'>+#define IXGBE_ACI_LINK_FEAT_ID_OR_CONFIG_ID_INVAL	BIT(3)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_CRITICAL_SDP_ERR		BIT(4)</div><div class='add'>+#define IXGBE_ACI_LINK_MODULE_POWER_UNSUPPORTED		BIT(5)</div><div class='add'>+#define IXGBE_ACI_LINK_EXTERNAL_PHY_LOAD_FAILURE	BIT(6)</div><div class='add'>+#define IXGBE_ACI_LINK_INVAL_MAX_POWER_LIMIT		BIT(7)</div><div class='add'>+	u8 link_info;</div><div class='add'>+#define IXGBE_ACI_LINK_UP		BIT(0)	/* Link Status */</div><div class='add'>+#define IXGBE_ACI_LINK_FAULT		BIT(1)</div><div class='add'>+#define IXGBE_ACI_LINK_FAULT_TX		BIT(2)</div><div class='add'>+#define IXGBE_ACI_LINK_FAULT_RX		BIT(3)</div><div class='add'>+#define IXGBE_ACI_LINK_FAULT_REMOTE	BIT(4)</div><div class='add'>+#define IXGBE_ACI_LINK_UP_PORT		BIT(5)	/* External Port Link Status */</div><div class='add'>+#define IXGBE_ACI_MEDIA_AVAILABLE	BIT(6)</div><div class='add'>+#define IXGBE_ACI_SIGNAL_DETECT		BIT(7)</div><div class='add'>+	u8 an_info;</div><div class='add'>+#define IXGBE_ACI_AN_COMPLETED		BIT(0)</div><div class='add'>+#define IXGBE_ACI_LP_AN_ABILITY		BIT(1)</div><div class='add'>+#define IXGBE_ACI_PD_FAULT		BIT(2)	/* Parallel Detection Fault */</div><div class='add'>+#define IXGBE_ACI_FEC_EN		BIT(3)</div><div class='add'>+#define IXGBE_ACI_PHY_LOW_POWER		BIT(4)	/* Low Power State */</div><div class='add'>+#define IXGBE_ACI_LINK_PAUSE_TX		BIT(5)</div><div class='add'>+#define IXGBE_ACI_LINK_PAUSE_RX		BIT(6)</div><div class='add'>+#define IXGBE_ACI_QUALIFIED_MODULE	BIT(7)</div><div class='add'>+	u8 ext_info;</div><div class='add'>+#define IXGBE_ACI_LINK_PHY_TEMP_ALARM	BIT(0)</div><div class='add'>+#define IXGBE_ACI_LINK_EXCESSIVE_ERRORS	BIT(1)	/* Excessive Link Errors */</div><div class='add'>+	/* Port Tx Suspended */</div><div class='add'>+#define IXGBE_ACI_LINK_TX_ACTIVE	0</div><div class='add'>+#define IXGBE_ACI_LINK_TX_DRAINED	1</div><div class='add'>+#define IXGBE_ACI_LINK_TX_FLUSHED	3</div><div class='add'>+	u8 lb_status;</div><div class='add'>+#define IXGBE_ACI_LINK_LB_PHY_LCL	BIT(0)</div><div class='add'>+#define IXGBE_ACI_LINK_LB_PHY_RMT	BIT(1)</div><div class='add'>+#define IXGBE_ACI_LINK_LB_MAC_LCL	BIT(2)</div><div class='add'>+	__le16 max_frame_size;</div><div class='add'>+	u8 cfg;</div><div class='add'>+#define IXGBE_ACI_LINK_25G_KR_FEC_EN		BIT(0)</div><div class='add'>+#define IXGBE_ACI_LINK_25G_RS_528_FEC_EN	BIT(1)</div><div class='add'>+#define IXGBE_ACI_LINK_25G_RS_544_FEC_EN	BIT(2)</div><div class='add'>+#define IXGBE_ACI_FEC_MASK			GENMASK(2, 0)</div><div class='add'>+	/* Pacing Config */</div><div class='add'>+#define IXGBE_ACI_CFG_PACING_M		GENMASK(6, 3)</div><div class='add'>+#define IXGBE_ACI_CFG_PACING_TYPE_M	BIT(7)</div><div class='add'>+#define IXGBE_ACI_CFG_PACING_TYPE_AVG	0</div><div class='add'>+#define IXGBE_ACI_CFG_PACING_TYPE_FIXED	IXGBE_ACI_CFG_PACING_TYPE_M</div><div class='add'>+	/* External Device Power Ability */</div><div class='add'>+	u8 power_desc;</div><div class='add'>+#define IXGBE_ACI_PWR_CLASS_M			GENMASK(5, 0)</div><div class='add'>+#define IXGBE_ACI_LINK_PWR_BASET_LOW_HIGH	0</div><div class='add'>+#define IXGBE_ACI_LINK_PWR_BASET_HIGH		1</div><div class='add'>+#define IXGBE_ACI_LINK_PWR_QSFP_CLASS_1		0</div><div class='add'>+#define IXGBE_ACI_LINK_PWR_QSFP_CLASS_2		1</div><div class='add'>+#define IXGBE_ACI_LINK_PWR_QSFP_CLASS_3		2</div><div class='add'>+#define IXGBE_ACI_LINK_PWR_QSFP_CLASS_4		3</div><div class='add'>+	__le16 link_speed;</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_M			GENMASK(10, 0)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_10MB		BIT(0)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_100MB		BIT(1)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_1000MB		BIT(2)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_2500MB		BIT(3)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_5GB		BIT(4)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_10GB		BIT(5)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_20GB		BIT(6)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_25GB		BIT(7)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_40GB		BIT(8)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_50GB		BIT(9)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_100GB		BIT(10)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_200GB		BIT(11)</div><div class='add'>+#define IXGBE_ACI_LINK_SPEED_UNKNOWN		BIT(15)</div><div class='add'>+	__le16 reserved3;</div><div class='add'>+	u8 ext_fec_status;</div><div class='add'>+#define IXGBE_ACI_LINK_RS_272_FEC_EN	BIT(0) /* RS 272 FEC enabled */</div><div class='add'>+	u8 reserved4;</div><div class='add'>+	__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */</div><div class='add'>+	__le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */</div><div class='add'>+	/* Get link status version 2 link partner data */</div><div class='add'>+	__le64 lp_phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */</div><div class='add'>+	__le64 lp_phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */</div><div class='add'>+	u8 lp_fec_adv;</div><div class='add'>+#define IXGBE_ACI_LINK_LP_10G_KR_FEC_CAP	BIT(0)</div><div class='add'>+#define IXGBE_ACI_LINK_LP_25G_KR_FEC_CAP	BIT(1)</div><div class='add'>+#define IXGBE_ACI_LINK_LP_RS_528_FEC_CAP	BIT(2)</div><div class='add'>+#define IXGBE_ACI_LINK_LP_50G_KR_272_FEC_CAP	BIT(3)</div><div class='add'>+#define IXGBE_ACI_LINK_LP_100G_KR_272_FEC_CAP	BIT(4)</div><div class='add'>+#define IXGBE_ACI_LINK_LP_200G_KR_272_FEC_CAP	BIT(5)</div><div class='add'>+	u8 lp_fec_req;</div><div class='add'>+#define IXGBE_ACI_LINK_LP_10G_KR_FEC_REQ	BIT(0)</div><div class='add'>+#define IXGBE_ACI_LINK_LP_25G_KR_FEC_REQ	BIT(1)</div><div class='add'>+#define IXGBE_ACI_LINK_LP_RS_528_FEC_REQ	BIT(2)</div><div class='add'>+#define IXGBE_ACI_LINK_LP_KR_272_FEC_REQ	BIT(3)</div><div class='add'>+	u8 lp_flowcontrol;</div><div class='add'>+#define IXGBE_ACI_LINK_LP_PAUSE_ADV		BIT(0)</div><div class='add'>+#define IXGBE_ACI_LINK_LP_ASM_DIR_ADV		BIT(1)</div><div class='add'>+	u8 reserved5[5];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Set event mask command (direct 0x0613) */</div><div class='add'>+struct ixgbe_aci_cmd_set_event_mask {</div><div class='add'>+	u8	lport_num;</div><div class='add'>+	u8	reserved[7];</div><div class='add'>+	__le16	event_mask;</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_UPDOWN		BIT(1)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_MEDIA_NA		BIT(2)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_LINK_FAULT		BIT(3)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_PHY_TEMP_ALARM	BIT(4)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_EXCESSIVE_ERRORS	BIT(5)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_SIGNAL_DETECT	BIT(6)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_AN_COMPLETED	BIT(7)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL	BIT(8)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_PORT_TX_SUSPENDED	BIT(9)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_TOPO_CONFLICT	BIT(10)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_MEDIA_CONFLICT	BIT(11)</div><div class='add'>+#define IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL	BIT(12)</div><div class='add'>+	u8	reserved1[6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ixgbe_aci_cmd_link_topo_params {</div><div class='add'>+	u8 lport_num;</div><div class='add'>+	u8 lport_num_valid;</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_PORT_NUM_VALID	BIT(0)</div><div class='add'>+	u8 node_type_ctx;</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_M		GENMASK(3, 0)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_PHY	0</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_GPIO_CTRL	1</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_MUX_CTRL	2</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_LED_CTRL	3</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_LED	4</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_THERMAL	5</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_CAGE	6</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_MEZZ	7</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_ID_EEPROM	8</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_CLK_CTRL	9</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_CLK_MUX	10</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_TYPE_GPS	11</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_CTX_S		4</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_CTX_M		GENMASK(7, 4)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_CTX_GLOBAL			0</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_CTX_BOARD			1</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_CTX_PORT			2</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_CTX_NODE			3</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_CTX_NODE_HANDLE		4</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_CTX_DIRECT_BUS_ACCESS		5</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_NODE_CTX_NODE_HANDLE_BUS_ADDRESS	6</div><div class='add'>+	u8 index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ixgbe_aci_cmd_link_topo_addr {</div><div class='add'>+	struct ixgbe_aci_cmd_link_topo_params topo_params;</div><div class='add'>+	__le16 handle;</div><div class='add'>+/* Used to decode the handle field */</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_HANDLE_BRD_TYPE_M		BIT(9)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_HANDLE_BRD_TYPE_LOM		BIT(9)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_HANDLE_BRD_TYPE_MEZZ	0</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Get Link Topology Handle (direct, 0x06E0) */</div><div class='add'>+struct ixgbe_aci_cmd_get_link_topo {</div><div class='add'>+	struct ixgbe_aci_cmd_link_topo_addr addr;</div><div class='add'>+	u8 node_part_num;</div><div class='add'>+#define IXGBE_ACI_GET_LINK_TOPO_NODE_NR_PCA9575		0x21</div><div class='add'>+#define IXGBE_ACI_GET_LINK_TOPO_NODE_NR_ZL30632_80032	0x24</div><div class='add'>+#define IXGBE_ACI_GET_LINK_TOPO_NODE_NR_SI5384		0x25</div><div class='add'>+#define IXGBE_ACI_GET_LINK_TOPO_NODE_NR_C827		0x31</div><div class='add'>+#define IXGBE_ACI_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX	0x47</div><div class='add'>+#define IXGBE_ACI_GET_LINK_TOPO_NODE_NR_GEN_GPS		0x48</div><div class='add'>+#define IXGBE_ACI_GET_LINK_TOPO_NODE_NR_E610_PTC	0x49</div><div class='add'>+	u8 rsvd[9];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Get Link Topology Pin (direct, 0x06E1) */</div><div class='add'>+struct ixgbe_aci_cmd_get_link_topo_pin {</div><div class='add'>+	struct ixgbe_aci_cmd_link_topo_addr addr;</div><div class='add'>+	u8 input_io_params;</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_GPIO	0</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_RESET_N	1</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_INT_N	2</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_PRESENT_N	3</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_TX_DIS	4</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_MODSEL_N	5</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_LPMODE	6</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_TX_FAULT	7</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_RX_LOSS	8</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_RS0		9</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_RS1		10</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_EEPROM_WP	11</div><div class='add'>+/* 12 repeats intentionally due to two different uses depending on context */</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_LED		12</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_RED_LED	12</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_GREEN_LED	13</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_IO_FUNC_BLUE_LED	14</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_INPUT_IO_TYPE_GPIO	3</div><div class='add'>+/* Use IXGBE_ACI_LINK_TOPO_NODE_TYPE_* for the type values */</div><div class='add'>+	u8 output_io_params;</div><div class='add'>+/* Use IXGBE_ACI_LINK_TOPO_NODE_TYPE_* for the type values */</div><div class='add'>+	u8 output_io_flags;</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_OUTPUT_POLARITY	BIT(5)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_OUTPUT_VALUE	BIT(6)</div><div class='add'>+#define IXGBE_ACI_LINK_TOPO_OUTPUT_DRIVEN	BIT(7)</div><div class='add'>+	u8 rsvd[7];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Set Port Identification LED (direct, 0x06E9) */</div><div class='add'>+struct ixgbe_aci_cmd_set_port_id_led {</div><div class='add'>+	u8 lport_num;</div><div class='add'>+	u8 lport_num_valid;</div><div class='add'>+	u8 ident_mode;</div><div class='add'>+	u8 rsvd[13];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define IXGBE_ACI_PORT_ID_PORT_NUM_VALID	BIT(0)</div><div class='add'>+#define IXGBE_ACI_PORT_IDENT_LED_ORIG		0</div><div class='add'>+#define IXGBE_ACI_PORT_IDENT_LED_BLINK		BIT(0)</div><div class='add'>+</div><div class='add'>+/* Read/Write SFF EEPROM command (indirect 0x06EE) */</div><div class='add'>+struct ixgbe_aci_cmd_sff_eeprom {</div><div class='add'>+	u8 lport_num;</div><div class='add'>+	u8 lport_num_valid;</div><div class='add'>+#define IXGBE_ACI_SFF_PORT_NUM_VALID		BIT(0)</div><div class='add'>+	__le16 i2c_bus_addr;</div><div class='add'>+#define IXGBE_ACI_SFF_I2CBUS_7BIT_M		GENMASK(6, 0)</div><div class='add'>+#define IXGBE_ACI_SFF_I2CBUS_10BIT_M		GENMASK(9, 0)</div><div class='add'>+#define IXGBE_ACI_SFF_I2CBUS_TYPE_M		BIT(10)</div><div class='add'>+#define IXGBE_ACI_SFF_I2CBUS_TYPE_7BIT		0</div><div class='add'>+#define IXGBE_ACI_SFF_I2CBUS_TYPE_10BIT		IXGBE_ACI_SFF_I2CBUS_TYPE_M</div><div class='add'>+#define IXGBE_ACI_SFF_NO_PAGE_BANK_UPDATE	0</div><div class='add'>+#define IXGBE_ACI_SFF_UPDATE_PAGE		1</div><div class='add'>+#define IXGBE_ACI_SFF_UPDATE_BANK		2</div><div class='add'>+#define IXGBE_ACI_SFF_UPDATE_PAGE_BANK		3</div><div class='add'>+#define IXGBE_ACI_SFF_IS_WRITE			BIT(15)</div><div class='add'>+	__le16 i2c_offset;</div><div class='add'>+	u8 module_bank;</div><div class='add'>+	u8 module_page;</div><div class='add'>+	__le32 addr_high;</div><div class='add'>+	__le32 addr_low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* NVM Read command (indirect 0x0701)</div><div class='add'>+ * NVM Erase commands (direct 0x0702)</div><div class='add'>+ * NVM Write commands (indirect 0x0703)</div><div class='add'>+ * NVM Write Activate commands (direct 0x0707)</div><div class='add'>+ * NVM Shadow RAM Dump commands (direct 0x0707)</div><div class='add'>+ */</div><div class='add'>+struct ixgbe_aci_cmd_nvm {</div><div class='add'>+#define IXGBE_ACI_NVM_MAX_OFFSET	0xFFFFFF</div><div class='add'>+	__le16 offset_low;</div><div class='add'>+	u8 offset_high; /* For Write Activate offset_high is used as flags2 */</div><div class='add'>+#define IXGBE_ACI_NVM_OFFSET_HI_A_MASK  GENMASK(15, 8)</div><div class='add'>+#define IXGBE_ACI_NVM_OFFSET_HI_U_MASK	GENMASK(23, 16)</div><div class='add'>+	u8 cmd_flags;</div><div class='add'>+#define IXGBE_ACI_NVM_LAST_CMD		BIT(0)</div><div class='add'>+#define IXGBE_ACI_NVM_PCIR_REQ		BIT(0) /* Used by NVM Write reply */</div><div class='add'>+#define IXGBE_ACI_NVM_PRESERVE_ALL	BIT(1)</div><div class='add'>+#define IXGBE_ACI_NVM_ACTIV_SEL_NVM	BIT(3) /* Write Activate/SR Dump only */</div><div class='add'>+#define IXGBE_ACI_NVM_ACTIV_SEL_OROM	BIT(4)</div><div class='add'>+#define IXGBE_ACI_NVM_ACTIV_SEL_NETLIST	BIT(5)</div><div class='add'>+#define IXGBE_ACI_NVM_SPECIAL_UPDATE	BIT(6)</div><div class='add'>+#define IXGBE_ACI_NVM_REVERT_LAST_ACTIV	BIT(6) /* Write Activate only */</div><div class='add'>+#define IXGBE_ACI_NVM_FLASH_ONLY	BIT(7)</div><div class='add'>+#define IXGBE_ACI_NVM_RESET_LVL_M	GENMASK(1, 0) /* Write reply only */</div><div class='add'>+#define IXGBE_ACI_NVM_POR_FLAG		0</div><div class='add'>+#define IXGBE_ACI_NVM_PERST_FLAG	1</div><div class='add'>+#define IXGBE_ACI_NVM_EMPR_FLAG		2</div><div class='add'>+#define IXGBE_ACI_NVM_EMPR_ENA		BIT(0) /* Write Activate reply only */</div><div class='add'>+#define IXGBE_ACI_NVM_NO_PRESERVATION	0x0</div><div class='add'>+#define IXGBE_ACI_NVM_PRESERVE_SELECTED	0x6</div><div class='add'>+</div><div class='add'>+	/* For Write Activate, several flags are sent as part of a separate</div><div class='add'>+	 * flags2 field using a separate byte. For simplicity of the software</div><div class='add'>+	 * interface, we pass the flags as a 16 bit value so these flags are</div><div class='add'>+	 * all offset by 8 bits</div><div class='add'>+	 */</div><div class='add'>+#define IXGBE_ACI_NVM_ACTIV_REQ_EMPR	BIT(8) /* NVM Write Activate only */</div><div class='add'>+	__le16 module_typeid;</div><div class='add'>+	__le16 length;</div><div class='add'>+#define IXGBE_ACI_NVM_ERASE_LEN	0xFFFF</div><div class='add'>+	__le32 addr_high;</div><div class='add'>+	__le32 addr_low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* NVM Module_Type ID, needed offset and read_len for</div><div class='add'>+ * struct ixgbe_aci_cmd_nvm.</div><div class='add'>+ */</div><div class='add'>+#define IXGBE_ACI_NVM_START_POINT		0</div><div class='add'>+</div><div class='add'>+/* NVM Checksum Command (direct, 0x0706) */</div><div class='add'>+struct ixgbe_aci_cmd_nvm_checksum {</div><div class='add'>+	u8 flags;</div><div class='add'>+#define IXGBE_ACI_NVM_CHECKSUM_VERIFY	BIT(0)</div><div class='add'>+#define IXGBE_ACI_NVM_CHECKSUM_RECALC	BIT(1)</div><div class='add'>+	u8 rsvd;</div><div class='add'>+	__le16 checksum; /* Used only by response */</div><div class='add'>+#define IXGBE_ACI_NVM_CHECKSUM_CORRECT	0xBABA</div><div class='add'>+	u8 rsvd2[12];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Used for NVM Set Package Data command - 0x070A */</div><div class='add'>+struct ixgbe_aci_cmd_nvm_pkg_data {</div><div class='add'>+	u8 reserved[3];</div><div class='add'>+	u8 cmd_flags;</div><div class='add'>+#define IXGBE_ACI_NVM_PKG_DELETE	BIT(0) /* used for command call */</div><div class='add'>+</div><div class='add'>+	u32 reserved1;</div><div class='add'>+	__le32 addr_high;</div><div class='add'>+	__le32 addr_low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Used for Pass Component Table command - 0x070B */</div><div class='add'>+struct ixgbe_aci_cmd_nvm_pass_comp_tbl {</div><div class='add'>+	u8 component_response; /* Response only */</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_CAN_BE_UPDATED		0x0</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_CAN_MAY_BE_UPDATEABLE	0x1</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_CAN_NOT_BE_UPDATED	0x2</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_PARTIAL_CHECK		0x3</div><div class='add'>+	u8 component_response_code; /* Response only */</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_CAN_BE_UPDATED_CODE	0x0</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_STAMP_IDENTICAL_CODE	0x1</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_STAMP_LOWER		0x2</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_INVALID_STAMP_CODE	0x3</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_CONFLICT_CODE		0x4</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_PRE_REQ_NOT_MET_CODE	0x5</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_NOT_SUPPORTED_CODE	0x6</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_CANNOT_DOWNGRADE_CODE	0x7</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_INCOMPLETE_IMAGE_CODE	0x8</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_VER_STR_IDENTICAL_CODE	0xA</div><div class='add'>+#define IXGBE_ACI_NVM_PASS_COMP_VER_STR_LOWER_CODE	0xB</div><div class='add'>+	u8 reserved;</div><div class='add'>+	u8 transfer_flag;</div><div class='add'>+	__le32 reserved1;</div><div class='add'>+	__le32 addr_high;</div><div class='add'>+	__le32 addr_low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ixgbe_aci_cmd_nvm_comp_tbl {</div><div class='add'>+	__le16 comp_class;</div><div class='add'>+#define NVM_COMP_CLASS_ALL_FW		0x000A</div><div class='add'>+</div><div class='add'>+	__le16 comp_id;</div><div class='add'>+#define NVM_COMP_ID_OROM		0x5</div><div class='add'>+#define NVM_COMP_ID_NVM			0x6</div><div class='add'>+#define NVM_COMP_ID_NETLIST		0x8</div><div class='add'>+</div><div class='add'>+	u8 comp_class_idx;</div><div class='add'>+#define FWU_COMP_CLASS_IDX_NOT_USE	0x0</div><div class='add'>+</div><div class='add'>+	__le32 comp_cmp_stamp;</div><div class='add'>+	u8 cvs_type;</div><div class='add'>+#define NVM_CVS_TYPE_ASCII		0x1</div><div class='add'>+</div><div class='add'>+	u8 cvs_len;</div><div class='add'>+	u8 cvs[]; /* Component Version String */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* E610-specific adapter context structures */</div><div class='add'>+</div><div class='add'>+struct ixgbe_link_status {</div><div class='add'>+	/* Refer to ixgbe_aci_phy_type for bits definition */</div><div class='add'>+	u64 phy_type_low;</div><div class='add'>+	u64 phy_type_high;</div><div class='add'>+	u16 max_frame_size;</div><div class='add'>+	u16 link_speed;</div><div class='add'>+	u16 req_speeds;</div><div class='add'>+	u8 topo_media_conflict;</div><div class='add'>+	u8 link_cfg_err;</div><div class='add'>+	u8 lse_ena;	/* Link Status Event notification */</div><div class='add'>+	u8 link_info;</div><div class='add'>+	u8 an_info;</div><div class='add'>+	u8 ext_info;</div><div class='add'>+	u8 fec_info;</div><div class='add'>+	u8 pacing;</div><div class='add'>+	/* Refer to #define from module_type[IXGBE_ACI_MODULE_TYPE_TOTAL_BYTE]</div><div class='add'>+	 * of ixgbe_aci_get_phy_caps structure</div><div class='add'>+	 */</div><div class='add'>+	u8 module_type[IXGBE_ACI_MODULE_TYPE_TOTAL_BYTE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Common HW capabilities for SW use */</div><div class='add'>+struct ixgbe_hw_caps {</div><div class='add'>+	/* Write CSR protection */</div><div class='add'>+	u64 wr_csr_prot;</div><div class='add'>+	u32 switching_mode;</div><div class='add'>+	/* switching mode supported - EVB switching (including cloud) */</div><div class='add'>+#define IXGBE_NVM_IMAGE_TYPE_EVB		0x0</div><div class='add'>+</div><div class='add'>+	/* Manageability mode &amp; supported protocols over MCTP */</div><div class='add'>+	u32 mgmt_mode;</div><div class='add'>+#define IXGBE_MGMT_MODE_PASS_THRU_MODE_M	GENMASK(3, 0)</div><div class='add'>+#define IXGBE_MGMT_MODE_CTL_INTERFACE_M		GENMASK(7, 4)</div><div class='add'>+#define IXGBE_MGMT_MODE_REDIR_SB_INTERFACE_M	GENMASK(11, 8)</div><div class='add'>+</div><div class='add'>+	u32 mgmt_protocols_mctp;</div><div class='add'>+#define IXGBE_MGMT_MODE_PROTO_RSVD	BIT(0)</div><div class='add'>+#define IXGBE_MGMT_MODE_PROTO_PLDM	BIT(1)</div><div class='add'>+#define IXGBE_MGMT_MODE_PROTO_OEM	BIT(2)</div><div class='add'>+#define IXGBE_MGMT_MODE_PROTO_NC_SI	BIT(3)</div><div class='add'>+</div><div class='add'>+	u32 os2bmc;</div><div class='add'>+	u32 valid_functions;</div><div class='add'>+	/* DCB capabilities */</div><div class='add'>+	u32 active_tc_bitmap;</div><div class='add'>+	u32 maxtc;</div><div class='add'>+</div><div class='add'>+	/* RSS related capabilities */</div><div class='add'>+	u32 rss_table_size;		/* 512 for PFs and 64 for VFs */</div><div class='add'>+	u32 rss_table_entry_width;	/* RSS Entry width in bits */</div><div class='add'>+</div><div class='add'>+	/* Tx/Rx queues */</div><div class='add'>+	u32 num_rxq;			/* Number/Total Rx queues */</div><div class='add'>+	u32 rxq_first_id;		/* First queue ID for Rx queues */</div><div class='add'>+	u32 num_txq;			/* Number/Total Tx queues */</div><div class='add'>+	u32 txq_first_id;		/* First queue ID for Tx queues */</div><div class='add'>+</div><div class='add'>+	/* MSI-X vectors */</div><div class='add'>+	u32 num_msix_vectors;</div><div class='add'>+	u32 msix_vector_first_id;</div><div class='add'>+</div><div class='add'>+	/* Max MTU for function or device */</div><div class='add'>+	u32 max_mtu;</div><div class='add'>+</div><div class='add'>+	/* WOL related */</div><div class='add'>+	u32 num_wol_proxy_fltr;</div><div class='add'>+	u32 wol_proxy_vsi_seid;</div><div class='add'>+</div><div class='add'>+	/* LED/SDP pin count */</div><div class='add'>+	u32 led_pin_num;</div><div class='add'>+	u32 sdp_pin_num;</div><div class='add'>+</div><div class='add'>+	/* LED/SDP - Supports up to 12 LED pins and 8 SDP signals */</div><div class='add'>+#define IXGBE_MAX_SUPPORTED_GPIO_LED	12</div><div class='add'>+#define IXGBE_MAX_SUPPORTED_GPIO_SDP	8</div><div class='add'>+	u8 led[IXGBE_MAX_SUPPORTED_GPIO_LED];</div><div class='add'>+	u8 sdp[IXGBE_MAX_SUPPORTED_GPIO_SDP];</div><div class='add'>+	/* SR-IOV virtualization */</div><div class='add'>+	u8 sr_iov_1_1;			/* SR-IOV enabled */</div><div class='add'>+	/* VMDQ */</div><div class='add'>+	u8 vmdq;			/* VMDQ supported */</div><div class='add'>+</div><div class='add'>+	/* EVB capabilities */</div><div class='add'>+	u8 evb_802_1_qbg;		/* Edge Virtual Bridging */</div><div class='add'>+	u8 evb_802_1_qbh;		/* Bridge Port Extension */</div><div class='add'>+</div><div class='add'>+	u8 dcb;</div><div class='add'>+	u8 iscsi;</div><div class='add'>+	u8 ieee_1588;</div><div class='add'>+	u8 mgmt_cem;</div><div class='add'>+</div><div class='add'>+	/* WoL and APM support */</div><div class='add'>+#define IXGBE_WOL_SUPPORT_M		BIT(0)</div><div class='add'>+#define IXGBE_ACPI_PROG_MTHD_M		BIT(1)</div><div class='add'>+#define IXGBE_PROXY_SUPPORT_M		BIT(2)</div><div class='add'>+	u8 apm_wol_support;</div><div class='add'>+	u8 acpi_prog_mthd;</div><div class='add'>+	u8 proxy_support;</div><div class='add'>+	bool nvm_update_pending_nvm;</div><div class='add'>+	bool nvm_update_pending_orom;</div><div class='add'>+	bool nvm_update_pending_netlist;</div><div class='add'>+#define IXGBE_NVM_PENDING_NVM_IMAGE		BIT(0)</div><div class='add'>+#define IXGBE_NVM_PENDING_OROM			BIT(1)</div><div class='add'>+#define IXGBE_NVM_PENDING_NETLIST		BIT(2)</div><div class='add'>+	bool sec_rev_disabled;</div><div class='add'>+	bool update_disabled;</div><div class='add'>+	bool nvm_unified_update;</div><div class='add'>+	bool netlist_auth;</div><div class='add'>+#define IXGBE_NVM_MGMT_SEC_REV_DISABLED		BIT(0)</div><div class='add'>+#define IXGBE_NVM_MGMT_UPDATE_DISABLED		BIT(1)</div><div class='add'>+#define IXGBE_NVM_MGMT_UNIFIED_UPD_SUPPORT	BIT(3)</div><div class='add'>+#define IXGBE_NVM_MGMT_NETLIST_AUTH_SUPPORT	BIT(5)</div><div class='add'>+	bool no_drop_policy_support;</div><div class='add'>+	/* PCIe reset avoidance */</div><div class='add'>+	bool pcie_reset_avoidance; /* false: not supported, true: supported */</div><div class='add'>+	/* Post update reset restriction */</div><div class='add'>+	bool reset_restrict_support; /* false: not supported, true: supported */</div><div class='add'>+</div><div class='add'>+	/* External topology device images within the NVM */</div><div class='add'>+#define IXGBE_EXT_TOPO_DEV_IMG_COUNT	4</div><div class='add'>+	u32 ext_topo_dev_img_ver_high[IXGBE_EXT_TOPO_DEV_IMG_COUNT];</div><div class='add'>+	u32 ext_topo_dev_img_ver_low[IXGBE_EXT_TOPO_DEV_IMG_COUNT];</div><div class='add'>+	u8 ext_topo_dev_img_part_num[IXGBE_EXT_TOPO_DEV_IMG_COUNT];</div><div class='add'>+#define IXGBE_EXT_TOPO_DEV_IMG_PART_NUM_S	8</div><div class='add'>+#define IXGBE_EXT_TOPO_DEV_IMG_PART_NUM_M	GENMASK(15, 8)</div><div class='add'>+	bool ext_topo_dev_img_load_en[IXGBE_EXT_TOPO_DEV_IMG_COUNT];</div><div class='add'>+#define IXGBE_EXT_TOPO_DEV_IMG_LOAD_EN	BIT(0)</div><div class='add'>+	bool ext_topo_dev_img_prog_en[IXGBE_EXT_TOPO_DEV_IMG_COUNT];</div><div class='add'>+#define IXGBE_EXT_TOPO_DEV_IMG_PROG_EN	BIT(1)</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define IXGBE_OROM_CIV_SIGNATURE	"$CIV"</div><div class='add'>+</div><div class='add'>+struct ixgbe_orom_civd_info {</div><div class='add'>+	u8 signature[4];	/* Must match ASCII '$CIV' characters */</div><div class='add'>+	u8 checksum;		/* Simple modulo 256 sum of all structure bytes must equal 0 */</div><div class='add'>+	__le32 combo_ver;	/* Combo Image Version number */</div><div class='add'>+	u8 combo_name_len;	/* Length of the unicode combo image version string, max of 32 */</div><div class='add'>+	__le16 combo_name[32];	/* Unicode string representing the Combo Image version */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Function specific capabilities */</div><div class='add'>+struct ixgbe_hw_func_caps {</div><div class='add'>+	u32 num_allocd_vfs;		/* Number of allocated VFs */</div><div class='add'>+	u32 vf_base_id;			/* Logical ID of the first VF */</div><div class='add'>+	u32 guar_num_vsi;</div><div class='add'>+	struct ixgbe_hw_caps common_cap;</div><div class='add'>+	bool no_drop_policy_ena;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Device wide capabilities */</div><div class='add'>+struct ixgbe_hw_dev_caps {</div><div class='add'>+	struct ixgbe_hw_caps common_cap;</div><div class='add'>+	u32 num_vfs_exposed;		/* Total number of VFs exposed */</div><div class='add'>+	u32 num_vsi_allocd_to_host;	/* Excluding EMP VSI */</div><div class='add'>+	u32 num_flow_director_fltr;	/* Number of FD filters available */</div><div class='add'>+	u32 num_funcs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ACI event information */</div><div class='add'>+struct ixgbe_aci_event {</div><div class='add'>+	struct libie_aq_desc desc;</div><div class='add'>+	u8 *msg_buf;</div><div class='add'>+	u16 msg_len;</div><div class='add'>+	u16 buf_len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ixgbe_aci_info {</div><div class='add'>+	struct mutex lock;		/* admin command interface lock */</div><div class='add'>+	enum libie_aq_err last_status;	/* last status of sent admin command */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ixgbe_bank_select {</div><div class='add'>+	IXGBE_ACTIVE_FLASH_BANK,</div><div class='add'>+	IXGBE_INACTIVE_FLASH_BANK,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Option ROM version information */</div><div class='add'>+struct ixgbe_orom_info {</div><div class='add'>+	u8 major;			/* Major version of OROM */</div><div class='add'>+	u8 patch;			/* Patch version of OROM */</div><div class='add'>+	u16 build;			/* Build version of OROM */</div><div class='add'>+	u32 srev;			/* Security revision */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* NVM version information */</div><div class='add'>+struct ixgbe_nvm_info {</div><div class='add'>+	u32 eetrack;</div><div class='add'>+	u32 srev;</div><div class='add'>+	u8 major;</div><div class='add'>+	u8 minor;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* netlist version information */</div><div class='add'>+struct ixgbe_netlist_info {</div><div class='add'>+	u32 major;			/* major high/low */</div><div class='add'>+	u32 minor;			/* minor high/low */</div><div class='add'>+	u32 type;			/* type high/low */</div><div class='add'>+	u32 rev;			/* revision high/low */</div><div class='add'>+	u32 hash;			/* SHA-1 hash word */</div><div class='add'>+	u16 cust_ver;			/* customer version */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Enumeration of possible flash banks for the NVM, OROM, and Netlist modules</div><div class='add'>+ * of the flash image.</div><div class='add'>+ */</div><div class='add'>+enum ixgbe_flash_bank {</div><div class='add'>+	IXGBE_INVALID_FLASH_BANK,</div><div class='add'>+	IXGBE_1ST_FLASH_BANK,</div><div class='add'>+	IXGBE_2ND_FLASH_BANK,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* information for accessing NVM, OROM, and Netlist flash banks */</div><div class='add'>+struct ixgbe_bank_info {</div><div class='add'>+	u32 nvm_ptr;				/* Pointer to 1st NVM bank */</div><div class='add'>+	u32 nvm_size;				/* Size of NVM bank */</div><div class='add'>+	u32 orom_ptr;				/* Pointer to 1st OROM bank */</div><div class='add'>+	u32 orom_size;				/* Size of OROM bank */</div><div class='add'>+	u32 netlist_ptr;			/* Ptr to 1st Netlist bank */</div><div class='add'>+	u32 netlist_size;			/* Size of Netlist bank */</div><div class='add'>+	enum ixgbe_flash_bank nvm_bank;		/* Active NVM bank */</div><div class='add'>+	enum ixgbe_flash_bank orom_bank;	/* Active OROM bank */</div><div class='add'>+	enum ixgbe_flash_bank netlist_bank;	/* Active Netlist bank */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Flash Chip Information */</div><div class='add'>+struct ixgbe_flash_info {</div><div class='add'>+	struct ixgbe_orom_info orom;	/* Option ROM version info */</div><div class='add'>+	u32 flash_size;			/* Available flash size in bytes */</div><div class='add'>+	struct ixgbe_nvm_info nvm;	/* NVM version information */</div><div class='add'>+	struct ixgbe_netlist_info netlist;	/* Netlist version info */</div><div class='add'>+	struct ixgbe_bank_info banks;	/* Flash Bank information */</div><div class='add'>+	u16 sr_words;			/* Shadow RAM size in words */</div><div class='add'>+	u8 blank_nvm_mode;		/* is NVM empty (no FW present) */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _IXGBE_TYPE_E610_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c<br/>index f1ffa398f6df..e67e2feb045b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c</a></div><div class='hunk'>@@ -1,11 +1,12 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ixgbe.h"</div><div class='add'>+#include "ixgbe_mbx.h"</div><div class='ctx'> #include "ixgbe_phy.h"</div><div class='ctx'> #include "ixgbe_x540.h"</div><div class='ctx'> </div><div class='hunk'>@@ -46,7 +47,7 @@ int ixgbe_get_invariants_X540(struct ixgbe_hw *hw)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- *  ixgbe_setup_mac_link_X540 - Set the auto advertised capabilitires</div><div class='add'>+ *  ixgbe_setup_mac_link_X540 - Set the auto advertised capabilities</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='ctx'>  *  @speed: new link speed</div><div class='ctx'>  *  @autoneg_wait_to_complete: true when waiting for completion is needed</div><div class='hunk'>@@ -65,7 +66,9 @@ int ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ixgbe_link_speed speed,</div><div class='ctx'>  *  Resets the hardware by resetting the transmit and receive units, masks</div><div class='ctx'>  *  and clears all interrupts, perform a PHY reset, and perform a link (MAC)</div><div class='ctx'>  *  reset.</div><div class='del'>- **/</div><div class='add'>+ *</div><div class='add'>+ *  Return: 0 on success or negative value on failure</div><div class='add'>+ */</div><div class='ctx'> int ixgbe_reset_hw_X540(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='ctx'> 	u32 swfw_mask = hw-&gt;phy.phy_semaphore_mask;</div><div class='hunk'>@@ -132,10 +135,14 @@ mac_reset_top:</div><div class='ctx'> 	hw-&gt;mac.num_rar_entries = IXGBE_X540_MAX_TX_QUEUES;</div><div class='ctx'> 	hw-&gt;mac.ops.init_rx_addrs(hw);</div><div class='ctx'> </div><div class='add'>+	/* The following is not supported by E610. */</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_e610)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='ctx'> 	/* Store the permanent SAN mac address */</div><div class='ctx'> 	hw-&gt;mac.ops.get_san_mac_addr(hw, hw-&gt;mac.san_addr);</div><div class='ctx'> </div><div class='del'>-	/* Add the SAN MAC address to the RAR only if it's a valid address */</div><div class='add'>+	/* Add the SAN MAC address to RAR if it's a valid address */</div><div class='ctx'> 	if (is_valid_ether_addr(hw-&gt;mac.san_addr)) {</div><div class='ctx'> 		/* Save the SAN MAC RAR index */</div><div class='ctx'> 		hw-&gt;mac.san_mac_rar_index = hw-&gt;mac.num_rar_entries - 1;</div><div class='hunk'>@@ -366,9 +373,9 @@ static int ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	checksum = (u16)IXGBE_EEPROM_SUM - checksum;</div><div class='add'>+	checksum = IXGBE_EEPROM_SUM - checksum;</div><div class='ctx'> </div><div class='del'>-	return (int)checksum;</div><div class='add'>+	return checksum;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -887,6 +894,7 @@ static const struct ixgbe_eeprom_operations eeprom_ops_X540 = {</div><div class='ctx'> 	.calc_checksum		= &amp;ixgbe_calc_eeprom_checksum_X540,</div><div class='ctx'> 	.validate_checksum      = &amp;ixgbe_validate_eeprom_checksum_X540,</div><div class='ctx'> 	.update_checksum        = &amp;ixgbe_update_eeprom_checksum_X540,</div><div class='add'>+	.read_pba_string        = &amp;ixgbe_read_pba_string_generic,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ixgbe_phy_operations phy_ops_X540 = {</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.h<br/>index b69a680d3ab5..6ed360c5b605 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.h</a></div><div class='hunk'>@@ -1,5 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _IXGBE_X540_H_</div><div class='add'>+#define _IXGBE_X540_H_</div><div class='ctx'> </div><div class='ctx'> #include "ixgbe_type.h"</div><div class='ctx'> </div><div class='hunk'>@@ -17,3 +20,5 @@ int ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);</div><div class='ctx'> void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);</div><div class='ctx'> void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw);</div><div class='ctx'> int ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw);</div><div class='add'>+</div><div class='add'>+#endif /* _IXGBE_X540_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c<br/>index a5f644934445..76d2fa3ef518 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c</a></div><div class='hunk'>@@ -1,9 +1,11 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include "ixgbe_x540.h"</div><div class='add'>+#include "ixgbe_x550.h"</div><div class='ctx'> #include "ixgbe_type.h"</div><div class='ctx'> #include "ixgbe_common.h"</div><div class='add'>+#include "ixgbe_mbx.h"</div><div class='ctx'> #include "ixgbe_phy.h"</div><div class='ctx'> </div><div class='ctx'> static int ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *, ixgbe_link_speed);</div><div class='hunk'>@@ -18,7 +20,7 @@ static int ixgbe_get_invariants_X550_x(struct ixgbe_hw *hw)</div><div class='ctx'> 	struct ixgbe_phy_info *phy = &amp;hw-&gt;phy;</div><div class='ctx'> 	struct ixgbe_link_info *link = &amp;hw-&gt;link;</div><div class='ctx'> </div><div class='del'>-	/* Start with X540 invariants, since so simular */</div><div class='add'>+	/* Start with X540 invariants, since so similar */</div><div class='ctx'> 	ixgbe_get_invariants_X540(hw);</div><div class='ctx'> </div><div class='ctx'> 	if (mac-&gt;ops.get_media_type(hw) != ixgbe_media_type_copper)</div><div class='hunk'>@@ -46,7 +48,7 @@ static int ixgbe_get_invariants_X550_a(struct ixgbe_hw *hw)</div><div class='ctx'> 	struct ixgbe_mac_info *mac = &amp;hw-&gt;mac;</div><div class='ctx'> 	struct ixgbe_phy_info *phy = &amp;hw-&gt;phy;</div><div class='ctx'> </div><div class='del'>-	/* Start with X540 invariants, since so simular */</div><div class='add'>+	/* Start with X540 invariants, since so similar */</div><div class='ctx'> 	ixgbe_get_invariants_X540(hw);</div><div class='ctx'> </div><div class='ctx'> 	if (mac-&gt;ops.get_media_type(hw) != ixgbe_media_type_copper)</div><div class='hunk'>@@ -683,7 +685,7 @@ static int ixgbe_iosf_wait(struct ixgbe_hw *hw, u32 *ctrl)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/** ixgbe_read_iosf_sb_reg_x550 - Writes a value to specified register of the</div><div class='add'>+/** ixgbe_read_iosf_sb_reg_x550 - Reads a value to specified register of the</div><div class='ctx'>  *  IOSF device</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='ctx'>  *  @reg_addr: 32 bit PHY register to write</div><div class='hunk'>@@ -845,7 +847,7 @@ static int ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,</div><div class='ctx'> </div><div class='ctx'> /** ixgbe_read_ee_hostif_buffer_X550- Read EEPROM word(s) using hostif</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='del'>- *  @offset: offset of  word in the EEPROM to read</div><div class='add'>+ *  @offset: offset of word in the EEPROM to read</div><div class='ctx'>  *  @words: number of words</div><div class='ctx'>  *  @data: word(s) read from the EEPROM</div><div class='ctx'>  *</div><div class='hunk'>@@ -1058,9 +1060,9 @@ static int ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer,</div><div class='ctx'> 			return status;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	checksum = (u16)IXGBE_EEPROM_SUM - checksum;</div><div class='add'>+	checksum = IXGBE_EEPROM_SUM - checksum;</div><div class='ctx'> </div><div class='del'>-	return (int)checksum;</div><div class='add'>+	return checksum;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /** ixgbe_calc_eeprom_checksum_X550 - Calculates and returns the checksum</div><div class='hunk'>@@ -1161,7 +1163,7 @@ static int ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/** ixgbe_write_ee_hostif_X550 - Write EEPROM word using hostif</div><div class='add'>+/** ixgbe_write_ee_hostif_data_X550 - Write EEPROM word using hostif</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='ctx'>  *  @offset: offset of  word in the EEPROM to write</div><div class='ctx'>  *  @data: word write to the EEPROM</div><div class='hunk'>@@ -1251,7 +1253,7 @@ static int ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ixgbe_fw_recovery_mode_X550 - Check FW NVM recovery mode</div><div class='del'>- * @hw: pointer t hardware structure</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='ctx'>  *</div><div class='ctx'>  * Returns true if in FW NVM recovery mode.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1265,7 +1267,7 @@ static bool ixgbe_fw_recovery_mode_X550(struct ixgbe_hw *hw)</div><div class='ctx'> </div><div class='ctx'> /** ixgbe_disable_rx_x550 - Disable RX unit</div><div class='ctx'>  *</div><div class='del'>- *  Enables the Rx DMA unit for x550</div><div class='add'>+ *  Disables the Rx DMA unit for x550</div><div class='ctx'>  **/</div><div class='ctx'> static void ixgbe_disable_rx_x550(struct ixgbe_hw *hw)</div><div class='ctx'> {</div><div class='hunk'>@@ -1752,7 +1754,7 @@ ixgbe_setup_mac_link_sfp_n(struct ixgbe_hw *hw, ixgbe_link_speed speed,</div><div class='ctx'> 	ret_val = ixgbe_supported_sfp_modules_X550em(hw, &amp;setup_linear);</div><div class='ctx'> </div><div class='ctx'> 	/* If no SFP module present, then return success. Return success since</div><div class='del'>-	 * SFP not present error is not excepted in the setup MAC link flow.</div><div class='add'>+	 * SFP not present error is not accepted in the setup MAC link flow.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (ret_val == -ENOENT)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1802,7 +1804,7 @@ ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw, ixgbe_link_speed speed,</div><div class='ctx'> 	ret_val = ixgbe_supported_sfp_modules_X550em(hw, &amp;setup_linear);</div><div class='ctx'> </div><div class='ctx'> 	/* If no SFP module present, then return success. Return success since</div><div class='del'>-	 * SFP not present error is not excepted in the setup MAC link flow.</div><div class='add'>+	 * SFP not present error is not accepted in the setup MAC link flow.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (ret_val == -ENOENT)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2316,13 +2318,13 @@ static int ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * ixgbe_get_lasi_ext_t_x550em - Determime external Base T PHY interrupt cause</div><div class='add'>+ * ixgbe_get_lasi_ext_t_x550em - Determine external Base T PHY interrupt cause</div><div class='ctx'>  * @hw: pointer to hardware structure</div><div class='ctx'>  * @lsc: pointer to boolean flag which indicates whether external Base T</div><div class='ctx'>  *	 PHY interrupt is lsc</div><div class='ctx'>  * @is_overtemp: indicate whether an overtemp event encountered</div><div class='ctx'>  *</div><div class='del'>- * Determime if external Base T PHY interrupt cause is high temperature</div><div class='add'>+ * Determine if external Base T PHY interrupt cause is high temperature</div><div class='ctx'>  * failure alarm or link status change.</div><div class='ctx'>  **/</div><div class='ctx'> static int ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc,</div><div class='hunk'>@@ -2626,7 +2628,7 @@ static int ixgbe_ext_phy_t_x550em_get_link(struct ixgbe_hw *hw, bool *link_up)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /** ixgbe_setup_internal_phy_t_x550em - Configure KR PHY to X557 link</div><div class='del'>- *  @hw: point to hardware structure</div><div class='add'>+ *  @hw: pointer to hardware structure</div><div class='ctx'>  *</div><div class='ctx'>  *  Configures the link between the integrated KR PHY and the external X557 PHY</div><div class='ctx'>  *  The driver will call this function when it gets a link status change</div><div class='hunk'>@@ -2667,7 +2669,7 @@ static int ixgbe_setup_internal_phy_t_x550em(struct ixgbe_hw *hw)</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	/* If link is not still up, then no setup is necessary so return */</div><div class='add'>+	/* If the link is still not up, no setup is necessary */</div><div class='ctx'> 	status = ixgbe_ext_phy_t_x550em_get_link(hw, &amp;link_up);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		return status;</div><div class='hunk'>@@ -2743,7 +2745,7 @@ static int ixgbe_led_off_t_x550em(struct ixgbe_hw *hw, u32 led_idx)</div><div class='ctx'> 	if (led_idx &gt;= IXGBE_X557_MAX_LED_INDEX)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* To turn on the LED, set mode to ON. */</div><div class='add'>+	/* To turn off the LED, set mode to OFF. */</div><div class='ctx'> 	hw-&gt;phy.ops.read_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,</div><div class='ctx'> 			     MDIO_MMD_VEND1, &amp;phy_data);</div><div class='ctx'> 	phy_data &amp;= ~IXGBE_X557_LED_MANUAL_SET_MASK;</div><div class='hunk'>@@ -2766,12 +2768,12 @@ static int ixgbe_led_off_t_x550em(struct ixgbe_hw *hw, u32 led_idx)</div><div class='ctx'>  *  Sends driver version number to firmware through the manageability</div><div class='ctx'>  *  block.  On success return 0</div><div class='ctx'>  *  else returns -EBUSY when encountering an error acquiring</div><div class='del'>- *  semaphore, -EIO when command fails or -ENIVAL when incorrect</div><div class='add'>+ *  semaphore, -EIO when command fails or -EINVAL when incorrect</div><div class='ctx'>  *  params passed.</div><div class='ctx'>  **/</div><div class='del'>-static int ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min,</div><div class='del'>-				     u8 build, u8 sub, u16 len,</div><div class='del'>-				     const char *driver_ver)</div><div class='add'>+int ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min,</div><div class='add'>+			      u8 build, u8 sub, u16 len,</div><div class='add'>+			      const char *driver_ver)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_hic_drv_info2 fw_cmd;</div><div class='ctx'> 	int ret_val;</div><div class='hunk'>@@ -2810,7 +2812,7 @@ static int ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min,</div><div class='ctx'> 	return ret_val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/** ixgbe_get_lcd_x550em - Determine lowest common denominator</div><div class='add'>+/** ixgbe_get_lcd_t_x550em - Determine lowest common denominator</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='ctx'>  *  @lcd_speed: pointer to lowest common link speed</div><div class='ctx'>  *</div><div class='hunk'>@@ -3173,7 +3175,7 @@ static void ixgbe_read_mng_if_sel_x550em(struct ixgbe_hw *hw)</div><div class='ctx'> 	hw-&gt;phy.nw_mng_if_sel = IXGBE_READ_REG(hw, IXGBE_NW_MNG_IF_SEL);</div><div class='ctx'> </div><div class='ctx'> 	/* If X552 (X550EM_a) and MDIO is connected to external PHY, then set</div><div class='del'>-	 * PHY address. This register field was has only been used for X552.</div><div class='add'>+	 * PHY address. This register field has only been used for X552.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (hw-&gt;mac.type == ixgbe_mac_x550em_a &amp;&amp;</div><div class='ctx'> 	    hw-&gt;phy.nw_mng_if_sel &amp; IXGBE_NW_MNG_IF_SEL_MDIO_ACT) {</div><div class='hunk'>@@ -3314,7 +3316,7 @@ static enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw)</div><div class='ctx'> 	return media_type;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/** ixgbe_init_ext_t_x550em - Start (unstall) the external Base T PHY.</div><div class='add'>+/** ixgbe_init_ext_t_x550em - Start (uninstall) the external Base T PHY.</div><div class='ctx'>  ** @hw: pointer to hardware structure</div><div class='ctx'>  **/</div><div class='ctx'> static int ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw)</div><div class='hunk'>@@ -3504,14 +3506,14 @@ mac_reset_top:</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/** ixgbe_set_ethertype_anti_spoofing_X550 - Enable/Disable Ethertype</div><div class='add'>+/** ixgbe_set_ethertype_anti_spoofing_x550 - Enable/Disable Ethertype</div><div class='ctx'>  *	anti-spoofing</div><div class='ctx'>  *  @hw:  pointer to hardware structure</div><div class='ctx'>  *  @enable: enable or disable switch for Ethertype anti-spoofing</div><div class='ctx'>  *  @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing</div><div class='ctx'>  **/</div><div class='del'>-static void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw,</div><div class='del'>-						   bool enable, int vf)</div><div class='add'>+void ixgbe_set_ethertype_anti_spoofing_x550(struct ixgbe_hw *hw,</div><div class='add'>+					    bool enable, int vf)</div><div class='ctx'> {</div><div class='ctx'> 	int vf_target_reg = vf &gt;&gt; 3;</div><div class='ctx'> 	int vf_target_shift = vf % 8 + IXGBE_SPOOF_ETHERTYPEAS_SHIFT;</div><div class='hunk'>@@ -3526,14 +3528,14 @@ static void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw,</div><div class='ctx'> 	IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), pfvfspoof);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/** ixgbe_set_source_address_pruning_X550 - Enable/Disbale src address pruning</div><div class='add'>+/** ixgbe_set_source_address_pruning_x550 - Enable/Disable src address pruning</div><div class='ctx'>  *  @hw: pointer to hardware structure</div><div class='ctx'>  *  @enable: enable or disable source address pruning</div><div class='ctx'>  *  @pool: Rx pool to set source address pruning for</div><div class='ctx'>  **/</div><div class='del'>-static void ixgbe_set_source_address_pruning_X550(struct ixgbe_hw *hw,</div><div class='del'>-						  bool enable,</div><div class='del'>-						  unsigned int pool)</div><div class='add'>+void ixgbe_set_source_address_pruning_x550(struct ixgbe_hw *hw,</div><div class='add'>+					   bool enable,</div><div class='add'>+					   unsigned int pool)</div><div class='ctx'> {</div><div class='ctx'> 	u64 pfflp;</div><div class='ctx'> </div><div class='hunk'>@@ -3733,7 +3735,7 @@ static int ixgbe_acquire_swfw_sync_x550em_a(struct ixgbe_hw *hw, u32 mask)</div><div class='ctx'>  * @hw: pointer to hardware structure</div><div class='ctx'>  * @mask: Mask to specify which semaphore to release</div><div class='ctx'>  *</div><div class='del'>- * Release the SWFW semaphore and puts the shared PHY token as needed</div><div class='add'>+ * Release the SWFW semaphore and puts back the shared PHY token as needed</div><div class='ctx'>  */</div><div class='ctx'> static void ixgbe_release_swfw_sync_x550em_a(struct ixgbe_hw *hw, u32 mask)</div><div class='ctx'> {</div><div class='hunk'>@@ -3754,7 +3756,7 @@ static void ixgbe_release_swfw_sync_x550em_a(struct ixgbe_hw *hw, u32 mask)</div><div class='ctx'>  * @phy_data: Pointer to read data from PHY register</div><div class='ctx'>  *</div><div class='ctx'>  * Reads a value from a specified PHY register using the SWFW lock and PHY</div><div class='del'>- * Token. The PHY Token is needed since the MDIO is shared between to MAC</div><div class='add'>+ * Token. The PHY Token is needed since the MDIO is shared between two MAC</div><div class='ctx'>  * instances.</div><div class='ctx'>  */</div><div class='ctx'> static int ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,</div><div class='hunk'>@@ -3798,6 +3800,122 @@ static int ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ixgbe_set_mdd_x550(struct ixgbe_hw *hw, bool ena)</div><div class='add'>+{</div><div class='add'>+	u32 reg_dma, reg_rdr;</div><div class='add'>+</div><div class='add'>+	reg_dma = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);</div><div class='add'>+	reg_rdr = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);</div><div class='add'>+</div><div class='add'>+	if (ena) {</div><div class='add'>+		reg_dma |= (IXGBE_DMATXCTL_MDP_EN | IXGBE_DMATXCTL_MBINTEN);</div><div class='add'>+		reg_rdr |= (IXGBE_RDRXCTL_MDP_EN | IXGBE_RDRXCTL_MBINTEN);</div><div class='add'>+	} else {</div><div class='add'>+		reg_dma &amp;= ~(IXGBE_DMATXCTL_MDP_EN | IXGBE_DMATXCTL_MBINTEN);</div><div class='add'>+		reg_rdr &amp;= ~(IXGBE_RDRXCTL_MDP_EN | IXGBE_RDRXCTL_MBINTEN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_dma);</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg_rdr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_enable_mdd_x550 - enable malicious driver detection</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ */</div><div class='add'>+void ixgbe_enable_mdd_x550(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	ixgbe_set_mdd_x550(hw, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_disable_mdd_x550 - disable malicious driver detection</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ */</div><div class='add'>+void ixgbe_disable_mdd_x550(struct ixgbe_hw *hw)</div><div class='add'>+{</div><div class='add'>+	ixgbe_set_mdd_x550(hw, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_restore_mdd_vf_x550 - restore VF that was disabled during MDD event</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @vf: vf index</div><div class='add'>+ */</div><div class='add'>+void ixgbe_restore_mdd_vf_x550(struct ixgbe_hw *hw, u32 vf)</div><div class='add'>+{</div><div class='add'>+	u32 idx, reg, val, num_qs, start_q, bitmask;</div><div class='add'>+</div><div class='add'>+	/* Map VF to queues */</div><div class='add'>+	reg = IXGBE_READ_REG(hw, IXGBE_MRQC);</div><div class='add'>+	switch (reg &amp; IXGBE_MRQC_MRQE_MASK) {</div><div class='add'>+	case IXGBE_MRQC_VMDQRT8TCEN:</div><div class='add'>+		num_qs = IXGBE_16VFS_QUEUES;</div><div class='add'>+		bitmask = IXGBE_16VFS_BITMASK;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_MRQC_VMDQRSS32EN:</div><div class='add'>+	case IXGBE_MRQC_VMDQRT4TCEN:</div><div class='add'>+		num_qs = IXGBE_32VFS_QUEUES;</div><div class='add'>+		bitmask = IXGBE_32VFS_BITMASK;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		num_qs = IXGBE_64VFS_QUEUES;</div><div class='add'>+		bitmask = IXGBE_64VFS_BITMASK;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	start_q = vf * num_qs;</div><div class='add'>+</div><div class='add'>+	/* Release vf's queues by clearing WQBR_TX and WQBR_RX (RW1C) */</div><div class='add'>+	idx = start_q / IXGBE_QUEUES_PER_REG;</div><div class='add'>+	val = bitmask &lt;&lt; (start_q % IXGBE_QUEUES_PER_REG);</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_WQBR_TX(idx), val);</div><div class='add'>+	IXGBE_WRITE_REG(hw, IXGBE_WQBR_RX(idx), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbe_handle_mdd_x550 - handle malicious driver detection event</div><div class='add'>+ * @hw: pointer to hardware structure</div><div class='add'>+ * @vf_bitmap: output vf bitmap of malicious vfs</div><div class='add'>+ */</div><div class='add'>+void ixgbe_handle_mdd_x550(struct ixgbe_hw *hw, unsigned long *vf_bitmap)</div><div class='add'>+{</div><div class='add'>+	u32 i, j, reg, q, div, vf;</div><div class='add'>+	unsigned long wqbr;</div><div class='add'>+</div><div class='add'>+	/* figure out pool size for mapping to vf's */</div><div class='add'>+	reg = IXGBE_READ_REG(hw, IXGBE_MRQC);</div><div class='add'>+	switch (reg &amp; IXGBE_MRQC_MRQE_MASK) {</div><div class='add'>+	case IXGBE_MRQC_VMDQRT8TCEN:</div><div class='add'>+		div = IXGBE_16VFS_QUEUES;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_MRQC_VMDQRSS32EN:</div><div class='add'>+	case IXGBE_MRQC_VMDQRT4TCEN:</div><div class='add'>+		div = IXGBE_32VFS_QUEUES;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		div = IXGBE_64VFS_QUEUES;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read WQBR_TX and WQBR_RX and check for malicious queues */</div><div class='add'>+	for (i = 0; i &lt; IXGBE_QUEUES_REG_AMOUNT; i++) {</div><div class='add'>+		wqbr = IXGBE_READ_REG(hw, IXGBE_WQBR_TX(i)) |</div><div class='add'>+		       IXGBE_READ_REG(hw, IXGBE_WQBR_RX(i));</div><div class='add'>+		if (!wqbr)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Get malicious queue */</div><div class='add'>+		for_each_set_bit(j, (unsigned long *)&amp;wqbr,</div><div class='add'>+				 IXGBE_QUEUES_PER_REG) {</div><div class='add'>+			/* Get queue from bitmask */</div><div class='add'>+			q = j + (i * IXGBE_QUEUES_PER_REG);</div><div class='add'>+			/* Map queue to vf */</div><div class='add'>+			vf = q / div;</div><div class='add'>+			set_bit(vf, vf_bitmap);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define X550_COMMON_MAC \</div><div class='ctx'> 	.init_hw			= &amp;ixgbe_init_hw_generic, \</div><div class='ctx'> 	.start_hw			= &amp;ixgbe_start_hw_X540, \</div><div class='hunk'>@@ -3830,9 +3948,9 @@ static int ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,</div><div class='ctx'> 	.set_mac_anti_spoofing		= &amp;ixgbe_set_mac_anti_spoofing, \</div><div class='ctx'> 	.set_vlan_anti_spoofing		= &amp;ixgbe_set_vlan_anti_spoofing, \</div><div class='ctx'> 	.set_source_address_pruning	= \</div><div class='del'>-				&amp;ixgbe_set_source_address_pruning_X550, \</div><div class='add'>+				&amp;ixgbe_set_source_address_pruning_x550, \</div><div class='ctx'> 	.set_ethertype_anti_spoofing	= \</div><div class='del'>-				&amp;ixgbe_set_ethertype_anti_spoofing_X550, \</div><div class='add'>+				&amp;ixgbe_set_ethertype_anti_spoofing_x550, \</div><div class='ctx'> 	.disable_rx_buff		= &amp;ixgbe_disable_rx_buff_generic, \</div><div class='ctx'> 	.enable_rx_buff			= &amp;ixgbe_enable_rx_buff_generic, \</div><div class='ctx'> 	.get_thermal_sensor_data	= NULL, \</div><div class='hunk'>@@ -3861,6 +3979,10 @@ static const struct ixgbe_mac_operations mac_ops_X550 = {</div><div class='ctx'> 	.prot_autoc_write	= prot_autoc_write_generic,</div><div class='ctx'> 	.setup_fc		= ixgbe_setup_fc_generic,</div><div class='ctx'> 	.fc_autoneg		= ixgbe_fc_autoneg,</div><div class='add'>+	.enable_mdd		= ixgbe_enable_mdd_x550,</div><div class='add'>+	.disable_mdd		= ixgbe_disable_mdd_x550,</div><div class='add'>+	.restore_mdd_vf		= ixgbe_restore_mdd_vf_x550,</div><div class='add'>+	.handle_mdd		= ixgbe_handle_mdd_x550,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ixgbe_mac_operations mac_ops_X550EM_x = {</div><div class='hunk'>@@ -3957,6 +4079,7 @@ static const struct ixgbe_mac_operations mac_ops_x550em_a_fw = {</div><div class='ctx'> 	.validate_checksum	= &amp;ixgbe_validate_eeprom_checksum_X550, \</div><div class='ctx'> 	.update_checksum	= &amp;ixgbe_update_eeprom_checksum_X550, \</div><div class='ctx'> 	.calc_checksum		= &amp;ixgbe_calc_eeprom_checksum_X550, \</div><div class='add'>+	.read_pba_string        = &amp;ixgbe_read_pba_string_generic, \</div><div class='ctx'> </div><div class='ctx'> static const struct ixgbe_eeprom_operations eeprom_ops_X550 = {</div><div class='ctx'> 	X550_COMMON_EEP</div><div class='hunk'>@@ -4046,7 +4169,7 @@ static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {</div><div class='ctx'> 	IXGBE_MVALS_INIT(X550EM_x)</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u32 ixgbe_mvals_x550em_a[IXGBE_MVALS_IDX_LIMIT] = {</div><div class='add'>+const u32 ixgbe_mvals_x550em_a[IXGBE_MVALS_IDX_LIMIT] = {</div><div class='ctx'> 	IXGBE_MVALS_INIT(X550EM_a)</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h<br/>new file mode 100644<br/>index 000000000000..2a11147fb1bc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2024 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _IXGBE_X550_H_</div><div class='add'>+#define _IXGBE_X550_H_</div><div class='add'>+</div><div class='add'>+#include "ixgbe_type.h"</div><div class='add'>+</div><div class='add'>+extern const u32 ixgbe_mvals_x550em_a[IXGBE_MVALS_IDX_LIMIT];</div><div class='add'>+</div><div class='add'>+int ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min,</div><div class='add'>+			      u8 build, u8 sub, u16 len,</div><div class='add'>+			      const char *driver_ver);</div><div class='add'>+void ixgbe_set_source_address_pruning_x550(struct ixgbe_hw *hw,</div><div class='add'>+					   bool enable,</div><div class='add'>+					   unsigned int pool);</div><div class='add'>+void ixgbe_set_ethertype_anti_spoofing_x550(struct ixgbe_hw *hw,</div><div class='add'>+					    bool enable, int vf);</div><div class='add'>+</div><div class='add'>+void ixgbe_enable_mdd_x550(struct ixgbe_hw *hw);</div><div class='add'>+void ixgbe_disable_mdd_x550(struct ixgbe_hw *hw);</div><div class='add'>+void ixgbe_restore_mdd_vf_x550(struct ixgbe_hw *hw, u32 vf);</div><div class='add'>+void ixgbe_handle_mdd_x550(struct ixgbe_hw *hw, unsigned long *vf_bitmap);</div><div class='add'>+</div><div class='add'>+#endif /* _IXGBE_X550_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c<br/>index 3e3b471e53f0..7b941505a9d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c</a></div><div class='hunk'>@@ -398,7 +398,7 @@ static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget)</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> 	u32 cmd_type;</div><div class='ctx'> </div><div class='del'>-	while (budget-- &gt; 0) {</div><div class='add'>+	while (likely(budget)) {</div><div class='ctx'> 		if (unlikely(!ixgbe_desc_unused(xdp_ring))) {</div><div class='ctx'> 			work_done = false;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -433,6 +433,8 @@ static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget)</div><div class='ctx'> 		xdp_ring-&gt;next_to_use++;</div><div class='ctx'> 		if (xdp_ring-&gt;next_to_use == xdp_ring-&gt;count)</div><div class='ctx'> 			xdp_ring-&gt;next_to_use = 0;</div><div class='add'>+</div><div class='add'>+		budget--;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (tx_desc) {</div><div class='hunk'>@@ -508,7 +510,7 @@ bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector,</div><div class='ctx'> </div><div class='ctx'> int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbe_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);</div><div class='ctx'> 	struct ixgbe_ring *ring;</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(__IXGBE_DOWN, &amp;adapter-&gt;state))</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/defines.h b/drivers/net/ethernet/intel/ixgbevf/defines.h<br/>index 5f08779c0e4e..e177d1d58696 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/defines.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/defines.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/defines.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbevf/defines.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #ifndef _IXGBEVF_DEFINES_H_</div><div class='ctx'> #define _IXGBEVF_DEFINES_H_</div><div class='hunk'>@@ -16,6 +16,9 @@</div><div class='ctx'> #define IXGBE_DEV_ID_X550_VF_HV		0x1564</div><div class='ctx'> #define IXGBE_DEV_ID_X550EM_X_VF_HV	0x15A9</div><div class='ctx'> </div><div class='add'>+#define IXGBE_DEV_ID_E610_VF		0x57AD</div><div class='add'>+#define IXGBE_SUBDEV_ID_E610_VF_HV	0x00FF</div><div class='add'>+</div><div class='ctx'> #define IXGBE_VF_IRQ_CLEAR_MASK		7</div><div class='ctx'> #define IXGBE_VF_MAX_TX_QUEUES		8</div><div class='ctx'> #define IXGBE_VF_MAX_RX_QUEUES		8</div><div class='hunk'>@@ -25,6 +28,7 @@</div><div class='ctx'> </div><div class='ctx'> /* Link speed */</div><div class='ctx'> typedef u32 ixgbe_link_speed;</div><div class='add'>+#define IXGBE_LINK_SPEED_UNKNOWN	0</div><div class='ctx'> #define IXGBE_LINK_SPEED_1GB_FULL	0x0020</div><div class='ctx'> #define IXGBE_LINK_SPEED_10GB_FULL	0x0080</div><div class='ctx'> #define IXGBE_LINK_SPEED_100_FULL	0x0008</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/ethtool.c b/drivers/net/ethernet/intel/ixgbevf/ethtool.c<br/>index 7ac53171b041..537a60d5276f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbevf/ethtool.c</a></div><div class='hunk'>@@ -276,9 +276,9 @@ static int ixgbevf_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (new_tx_count != adapter-&gt;tx_ring_count) {</div><div class='del'>-		tx_ring = vmalloc(array_size(sizeof(*tx_ring),</div><div class='del'>-					     adapter-&gt;num_tx_queues +</div><div class='del'>-						adapter-&gt;num_xdp_queues));</div><div class='add'>+		tx_ring = vmalloc_array(adapter-&gt;num_tx_queues +</div><div class='add'>+					adapter-&gt;num_xdp_queues,</div><div class='add'>+					sizeof(*tx_ring));</div><div class='ctx'> 		if (!tx_ring) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto clear_reset;</div><div class='hunk'>@@ -867,19 +867,11 @@ static int ixgbevf_set_coalesce(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ixgbevf_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='del'>-			     u32 *rules __always_unused)</div><div class='add'>+static u32 ixgbevf_get_rx_ring_count(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbevf_adapter *adapter = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		info-&gt;data = adapter-&gt;num_rx_queues;</div><div class='del'>-		return 0;</div><div class='del'>-	default:</div><div class='del'>-		hw_dbg(&amp;adapter-&gt;hw, "Command parameters not supported\n");</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	return adapter-&gt;num_rx_queues;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 ixgbevf_get_rxfh_indir_size(struct net_device *netdev)</div><div class='hunk'>@@ -987,7 +979,7 @@ static const struct ethtool_ops ixgbevf_ethtool_ops = {</div><div class='ctx'> 	.get_ethtool_stats	= ixgbevf_get_ethtool_stats,</div><div class='ctx'> 	.get_coalesce		= ixgbevf_get_coalesce,</div><div class='ctx'> 	.set_coalesce		= ixgbevf_set_coalesce,</div><div class='del'>-	.get_rxnfc		= ixgbevf_get_rxnfc,</div><div class='add'>+	.get_rx_ring_count	= ixgbevf_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_indir_size	= ixgbevf_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh_key_size	= ixgbevf_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh		= ixgbevf_get_rxfh,</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/ipsec.c b/drivers/net/ethernet/intel/ixgbevf/ipsec.c<br/>index 66cf17f19408..fce35924ff8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/ipsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/ipsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/ipsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbevf/ipsec.c</a></div><div class='hunk'>@@ -201,6 +201,7 @@ struct xfrm_state *ixgbevf_ipsec_find_rx_state(struct ixgbevf_ipsec *ipsec,</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ixgbevf_ipsec_parse_proto_keys - find the key and salt based on the protocol</div><div class='add'>+ * @dev: pointer to net device to program</div><div class='ctx'>  * @xs: pointer to xfrm_state struct</div><div class='ctx'>  * @mykey: pointer to key array to populate</div><div class='ctx'>  * @mysalt: pointer to salt value to populate</div><div class='hunk'>@@ -208,10 +209,10 @@ struct xfrm_state *ixgbevf_ipsec_find_rx_state(struct ixgbevf_ipsec *ipsec,</div><div class='ctx'>  * This copies the protocol keys and salt to our own data tables.  The</div><div class='ctx'>  * 82599 family only supports the one algorithm.</div><div class='ctx'>  **/</div><div class='del'>-static int ixgbevf_ipsec_parse_proto_keys(struct xfrm_state *xs,</div><div class='add'>+static int ixgbevf_ipsec_parse_proto_keys(struct net_device *dev,</div><div class='add'>+					  struct xfrm_state *xs,</div><div class='ctx'> 					  u32 *mykey, u32 *mysalt)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = xs-&gt;xso.real_dev;</div><div class='ctx'> 	unsigned char *key_data;</div><div class='ctx'> 	char *alg_name = NULL;</div><div class='ctx'> 	int key_len;</div><div class='hunk'>@@ -256,13 +257,14 @@ static int ixgbevf_ipsec_parse_proto_keys(struct xfrm_state *xs,</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ixgbevf_ipsec_add_sa - program device with a security association</div><div class='add'>+ * @dev: pointer to net device to program</div><div class='ctx'>  * @xs: pointer to transformer state struct</div><div class='ctx'>  * @extack: extack point to fill failure reason</div><div class='ctx'>  **/</div><div class='del'>-static int ixgbevf_ipsec_add_sa(struct xfrm_state *xs,</div><div class='add'>+static int ixgbevf_ipsec_add_sa(struct net_device *dev,</div><div class='add'>+				struct xfrm_state *xs,</div><div class='ctx'> 				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = xs-&gt;xso.real_dev;</div><div class='ctx'> 	struct ixgbevf_adapter *adapter;</div><div class='ctx'> 	struct ixgbevf_ipsec *ipsec;</div><div class='ctx'> 	u16 sa_idx;</div><div class='hunk'>@@ -271,6 +273,9 @@ static int ixgbevf_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> 	adapter = netdev_priv(dev);</div><div class='ctx'> 	ipsec = adapter-&gt;ipsec;</div><div class='ctx'> </div><div class='add'>+	if (!(adapter-&gt;pf_features &amp; IXGBEVF_PF_SUP_IPSEC))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	if (xs-&gt;id.proto != IPPROTO_ESP &amp;&amp; xs-&gt;id.proto != IPPROTO_AH) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Unsupported protocol for IPsec offload");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -310,7 +315,8 @@ static int ixgbevf_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> 			rsa.decrypt = xs-&gt;ealg || xs-&gt;aead;</div><div class='ctx'> </div><div class='ctx'> 		/* get the key and salt */</div><div class='del'>-		ret = ixgbevf_ipsec_parse_proto_keys(xs, rsa.key, &amp;rsa.salt);</div><div class='add'>+		ret = ixgbevf_ipsec_parse_proto_keys(dev, xs, rsa.key,</div><div class='add'>+						     &amp;rsa.salt);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack, "Failed to get key data for Rx SA table");</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -363,7 +369,8 @@ static int ixgbevf_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> 		if (xs-&gt;id.proto &amp; IPPROTO_ESP)</div><div class='ctx'> 			tsa.encrypt = xs-&gt;ealg || xs-&gt;aead;</div><div class='ctx'> </div><div class='del'>-		ret = ixgbevf_ipsec_parse_proto_keys(xs, tsa.key, &amp;tsa.salt);</div><div class='add'>+		ret = ixgbevf_ipsec_parse_proto_keys(dev, xs, tsa.key,</div><div class='add'>+						     &amp;tsa.salt);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack, "Failed to get key data for Tx SA table");</div><div class='ctx'> 			memset(&amp;tsa, 0, sizeof(tsa));</div><div class='hunk'>@@ -388,11 +395,12 @@ static int ixgbevf_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ixgbevf_ipsec_del_sa - clear out this specific SA</div><div class='add'>+ * @dev: pointer to net device to program</div><div class='ctx'>  * @xs: pointer to transformer state struct</div><div class='ctx'>  **/</div><div class='del'>-static void ixgbevf_ipsec_del_sa(struct xfrm_state *xs)</div><div class='add'>+static void ixgbevf_ipsec_del_sa(struct net_device *dev,</div><div class='add'>+				 struct xfrm_state *xs)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = xs-&gt;xso.real_dev;</div><div class='ctx'> 	struct ixgbevf_adapter *adapter;</div><div class='ctx'> 	struct ixgbevf_ipsec *ipsec;</div><div class='ctx'> 	u16 sa_idx;</div><div class='hunk'>@@ -400,6 +408,9 @@ static void ixgbevf_ipsec_del_sa(struct xfrm_state *xs)</div><div class='ctx'> 	adapter = netdev_priv(dev);</div><div class='ctx'> 	ipsec = adapter-&gt;ipsec;</div><div class='ctx'> </div><div class='add'>+	if (!(adapter-&gt;pf_features &amp; IXGBEVF_PF_SUP_IPSEC))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (xs-&gt;xso.dir == XFRM_DEV_OFFLOAD_IN) {</div><div class='ctx'> 		sa_idx = xs-&gt;xso.offload_handle - IXGBE_IPSEC_BASE_RX_INDEX;</div><div class='ctx'> </div><div class='hunk'>@@ -428,30 +439,9 @@ static void ixgbevf_ipsec_del_sa(struct xfrm_state *xs)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * ixgbevf_ipsec_offload_ok - can this packet use the xfrm hw offload</div><div class='del'>- * @skb: current data packet</div><div class='del'>- * @xs: pointer to transformer state struct</div><div class='del'>- **/</div><div class='del'>-static bool ixgbevf_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *xs)</div><div class='del'>-{</div><div class='del'>-	if (xs-&gt;props.family == AF_INET) {</div><div class='del'>-		/* Offload with IPv4 options is not supported yet */</div><div class='del'>-		if (ip_hdr(skb)-&gt;ihl != 5)</div><div class='del'>-			return false;</div><div class='del'>-	} else {</div><div class='del'>-		/* Offload with IPv6 extension headers is not support yet */</div><div class='del'>-		if (ipv6_ext_hdr(ipv6_hdr(skb)-&gt;nexthdr))</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct xfrmdev_ops ixgbevf_xfrmdev_ops = {</div><div class='ctx'> 	.xdo_dev_state_add = ixgbevf_ipsec_add_sa,</div><div class='ctx'> 	.xdo_dev_state_delete = ixgbevf_ipsec_del_sa,</div><div class='del'>-	.xdo_dev_offload_ok = ixgbevf_ipsec_offload_ok,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -628,8 +618,11 @@ void ixgbevf_init_ipsec_offload(struct ixgbevf_adapter *adapter)</div><div class='ctx'> 	size_t size;</div><div class='ctx'> </div><div class='ctx'> 	switch (adapter-&gt;hw.api_version) {</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='add'>+		if (!(adapter-&gt;pf_features &amp; IXGBEVF_PF_SUP_IPSEC))</div><div class='add'>+			return;</div><div class='add'>+		break;</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='del'>-	case ixgbe_mbox_api_15:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h b/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h<br/>index 130cb868774c..516a6fdd23d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/ixgbevf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbevf/ixgbevf.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #ifndef _IXGBEVF_H_</div><div class='ctx'> #define _IXGBEVF_H_</div><div class='hunk'>@@ -241,23 +241,7 @@ struct ixgbevf_q_vector {</div><div class='ctx'> 	char name[IFNAMSIZ + 9];</div><div class='ctx'> </div><div class='ctx'> 	/* for dynamic allocation of rings associated with this q_vector */</div><div class='del'>-	struct ixgbevf_ring ring[0] ____cacheline_internodealigned_in_smp;</div><div class='del'>-#ifdef CONFIG_NET_RX_BUSY_POLL</div><div class='del'>-	unsigned int state;</div><div class='del'>-#define IXGBEVF_QV_STATE_IDLE		0</div><div class='del'>-#define IXGBEVF_QV_STATE_NAPI		1    /* NAPI owns this QV */</div><div class='del'>-#define IXGBEVF_QV_STATE_POLL		2    /* poll owns this QV */</div><div class='del'>-#define IXGBEVF_QV_STATE_DISABLED	4    /* QV is disabled */</div><div class='del'>-#define IXGBEVF_QV_OWNED	(IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL)</div><div class='del'>-#define IXGBEVF_QV_LOCKED	(IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED)</div><div class='del'>-#define IXGBEVF_QV_STATE_NAPI_YIELD	8    /* NAPI yielded this QV */</div><div class='del'>-#define IXGBEVF_QV_STATE_POLL_YIELD	16   /* poll yielded this QV */</div><div class='del'>-#define IXGBEVF_QV_YIELD	(IXGBEVF_QV_STATE_NAPI_YIELD | \</div><div class='del'>-				 IXGBEVF_QV_STATE_POLL_YIELD)</div><div class='del'>-#define IXGBEVF_QV_USER_PEND	(IXGBEVF_QV_STATE_POLL | \</div><div class='del'>-				 IXGBEVF_QV_STATE_POLL_YIELD)</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-#endif /* CONFIG_NET_RX_BUSY_POLL */</div><div class='add'>+	struct ixgbevf_ring ring[] ____cacheline_internodealigned_in_smp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* microsecond values for various ITR rates shifted by 2 to fit itr register</div><div class='hunk'>@@ -346,7 +330,6 @@ struct ixgbevf_adapter {</div><div class='ctx'> 	int num_rx_queues;</div><div class='ctx'> 	struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */</div><div class='ctx'> 	u64 hw_csum_rx_error;</div><div class='del'>-	u64 hw_rx_no_dma_resources;</div><div class='ctx'> 	int num_msix_vectors;</div><div class='ctx'> 	u64 alloc_rx_page_failed;</div><div class='ctx'> 	u64 alloc_rx_buff_failed;</div><div class='hunk'>@@ -363,8 +346,13 @@ struct ixgbevf_adapter {</div><div class='ctx'> 	/* structs defined in ixgbe_vf.h */</div><div class='ctx'> 	struct ixgbe_hw hw;</div><div class='ctx'> 	u16 msg_enable;</div><div class='del'>-	/* Interrupt Throttle Rate */</div><div class='del'>-	u32 eitr_param;</div><div class='add'>+</div><div class='add'>+	u32 pf_features;</div><div class='add'>+#define IXGBEVF_PF_SUP_IPSEC		BIT(0)</div><div class='add'>+#define IXGBEVF_PF_SUP_ESX_MBX		BIT(1)</div><div class='add'>+</div><div class='add'>+#define IXGBEVF_SUPPORTED_FEATURES	(IXGBEVF_PF_SUP_IPSEC | \</div><div class='add'>+					IXGBEVF_PF_SUP_ESX_MBX)</div><div class='ctx'> </div><div class='ctx'> 	struct ixgbevf_hw_stats stats;</div><div class='ctx'> </div><div class='hunk'>@@ -418,6 +406,8 @@ enum ixgbevf_boards {</div><div class='ctx'> 	board_X550EM_x_vf,</div><div class='ctx'> 	board_X550EM_x_vf_hv,</div><div class='ctx'> 	board_x550em_a_vf,</div><div class='add'>+	board_e610_vf,</div><div class='add'>+	board_e610_vf_hv,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum ixgbevf_xcast_modes {</div><div class='hunk'>@@ -434,12 +424,13 @@ extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_info;</div><div class='ctx'> extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;</div><div class='ctx'> extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops_legacy;</div><div class='ctx'> extern const struct ixgbevf_info ixgbevf_x550em_a_vf_info;</div><div class='add'>+extern const struct ixgbevf_info ixgbevf_e610_vf_info;</div><div class='ctx'> </div><div class='ctx'> extern const struct ixgbevf_info ixgbevf_82599_vf_hv_info;</div><div class='ctx'> extern const struct ixgbevf_info ixgbevf_X540_vf_hv_info;</div><div class='ctx'> extern const struct ixgbevf_info ixgbevf_X550_vf_hv_info;</div><div class='ctx'> extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_hv_info;</div><div class='del'>-extern const struct ixgbe_mbx_operations ixgbevf_hv_mbx_ops;</div><div class='add'>+extern const struct ixgbevf_info ixgbevf_e610_vf_hv_info;</div><div class='ctx'> </div><div class='ctx'> /* needed by ethtool.c */</div><div class='ctx'> extern const char ixgbevf_driver_name[];</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c b/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c<br/>index 149911e3002a..d5ce20f47def 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> /******************************************************************************</div><div class='ctx'>  Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code</div><div class='hunk'>@@ -39,7 +39,7 @@ static const char ixgbevf_driver_string[] =</div><div class='ctx'> 	"Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";</div><div class='ctx'> </div><div class='ctx'> static char ixgbevf_copyright[] =</div><div class='del'>-	"Copyright (c) 2009 - 2018 Intel Corporation.";</div><div class='add'>+	"Copyright (c) 2009 - 2024 Intel Corporation.";</div><div class='ctx'> </div><div class='ctx'> static const struct ixgbevf_info *ixgbevf_info_tbl[] = {</div><div class='ctx'> 	[board_82599_vf]	= &amp;ixgbevf_82599_vf_info,</div><div class='hunk'>@@ -51,6 +51,8 @@ static const struct ixgbevf_info *ixgbevf_info_tbl[] = {</div><div class='ctx'> 	[board_X550EM_x_vf]	= &amp;ixgbevf_X550EM_x_vf_info,</div><div class='ctx'> 	[board_X550EM_x_vf_hv]	= &amp;ixgbevf_X550EM_x_vf_hv_info,</div><div class='ctx'> 	[board_x550em_a_vf]	= &amp;ixgbevf_x550em_a_vf_info,</div><div class='add'>+	[board_e610_vf]         = &amp;ixgbevf_e610_vf_info,</div><div class='add'>+	[board_e610_vf_hv]      = &amp;ixgbevf_e610_vf_hv_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* ixgbevf_pci_tbl - PCI Device ID Table</div><div class='hunk'>@@ -71,6 +73,9 @@ static const struct pci_device_id ixgbevf_pci_tbl[] = {</div><div class='ctx'> 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },</div><div class='ctx'> 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv},</div><div class='ctx'> 	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf },</div><div class='add'>+	{PCI_VDEVICE_SUB(INTEL, IXGBE_DEV_ID_E610_VF, PCI_ANY_ID,</div><div class='add'>+			 IXGBE_SUBDEV_ID_E610_VF_HV), board_e610_vf_hv},</div><div class='add'>+	{PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_VF), board_e610_vf},</div><div class='ctx'> 	/* required last entry */</div><div class='ctx'> 	{0, }</div><div class='ctx'> };</div><div class='hunk'>@@ -732,10 +737,6 @@ static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,</div><div class='ctx'> 				    union ixgbe_adv_rx_desc *rx_desc,</div><div class='ctx'> 				    struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	/* XDP packets use error pointer so abort at this point */</div><div class='del'>-	if (IS_ERR(skb))</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='ctx'> 	/* verify that the packet does not have any known errors */</div><div class='ctx'> 	if (unlikely(ixgbevf_test_staterr(rx_desc,</div><div class='ctx'> 					  IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {</div><div class='hunk'>@@ -1044,9 +1045,9 @@ static int ixgbevf_xmit_xdp_ring(struct ixgbevf_ring *ring,</div><div class='ctx'> 	return IXGBEVF_XDP_TX;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct sk_buff *ixgbevf_run_xdp(struct ixgbevf_adapter *adapter,</div><div class='del'>-				       struct ixgbevf_ring  *rx_ring,</div><div class='del'>-				       struct xdp_buff *xdp)</div><div class='add'>+static int ixgbevf_run_xdp(struct ixgbevf_adapter *adapter,</div><div class='add'>+			   struct ixgbevf_ring *rx_ring,</div><div class='add'>+			   struct xdp_buff *xdp)</div><div class='ctx'> {</div><div class='ctx'> 	int result = IXGBEVF_XDP_PASS;</div><div class='ctx'> 	struct ixgbevf_ring *xdp_ring;</div><div class='hunk'>@@ -1080,7 +1081,7 @@ out_failure:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> xdp_out:</div><div class='del'>-	return ERR_PTR(-result);</div><div class='add'>+	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int ixgbevf_rx_frame_truesize(struct ixgbevf_ring *rx_ring,</div><div class='hunk'>@@ -1122,6 +1123,7 @@ static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,</div><div class='ctx'> 	struct sk_buff *skb = rx_ring-&gt;skb;</div><div class='ctx'> 	bool xdp_xmit = false;</div><div class='ctx'> 	struct xdp_buff xdp;</div><div class='add'>+	int xdp_res = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Frame size depend on rx_ring setup when PAGE_SIZE=4K */</div><div class='ctx'> #if (PAGE_SIZE &lt; 8192)</div><div class='hunk'>@@ -1165,11 +1167,11 @@ static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,</div><div class='ctx'> 			/* At larger PAGE_SIZE, frame_sz depend on len size */</div><div class='ctx'> 			xdp.frame_sz = ixgbevf_rx_frame_truesize(rx_ring, size);</div><div class='ctx'> #endif</div><div class='del'>-			skb = ixgbevf_run_xdp(adapter, rx_ring, &amp;xdp);</div><div class='add'>+			xdp_res = ixgbevf_run_xdp(adapter, rx_ring, &amp;xdp);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (IS_ERR(skb)) {</div><div class='del'>-			if (PTR_ERR(skb) == -IXGBEVF_XDP_TX) {</div><div class='add'>+		if (xdp_res) {</div><div class='add'>+			if (xdp_res == IXGBEVF_XDP_TX) {</div><div class='ctx'> 				xdp_xmit = true;</div><div class='ctx'> 				ixgbevf_rx_buffer_flip(rx_ring, rx_buffer,</div><div class='ctx'> 						       size);</div><div class='hunk'>@@ -1189,7 +1191,7 @@ static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* exit if we failed to retrieve a buffer */</div><div class='del'>-		if (!skb) {</div><div class='add'>+		if (!xdp_res &amp;&amp; !skb) {</div><div class='ctx'> 			rx_ring-&gt;rx_stats.alloc_rx_buff_failed++;</div><div class='ctx'> 			rx_buffer-&gt;pagecnt_bias++;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1203,7 +1205,7 @@ static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* verify the packet layout is correct */</div><div class='del'>-		if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {</div><div class='add'>+		if (xdp_res || ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {</div><div class='ctx'> 			skb = NULL;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2269,10 +2271,36 @@ static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)</div><div class='ctx'> 	adapter-&gt;stats.base_vfmprc = adapter-&gt;stats.last_vfmprc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * ixgbevf_set_features - Set features supported by PF</div><div class='add'>+ * @adapter: pointer to the adapter struct</div><div class='add'>+ *</div><div class='add'>+ * Negotiate with PF supported features and then set pf_features accordingly.</div><div class='add'>+ */</div><div class='add'>+static void ixgbevf_set_features(struct ixgbevf_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u32 *pf_features = &amp;adapter-&gt;pf_features;</div><div class='add'>+	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hw-&gt;mac.ops.negotiate_features(hw, pf_features);</div><div class='add'>+	if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+		netdev_dbg(adapter-&gt;netdev,</div><div class='add'>+			   "PF feature negotiation failed.\n");</div><div class='add'>+</div><div class='add'>+	/* Address also pre API 1.7 cases */</div><div class='add'>+	if (hw-&gt;api_version == ixgbe_mbox_api_14)</div><div class='add'>+		*pf_features |= IXGBEVF_PF_SUP_IPSEC;</div><div class='add'>+	else if (hw-&gt;api_version == ixgbe_mbox_api_15)</div><div class='add'>+		*pf_features |= IXGBEVF_PF_SUP_ESX_MBX;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct ixgbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> 	static const int api[] = {</div><div class='add'>+		ixgbe_mbox_api_17,</div><div class='add'>+		ixgbe_mbox_api_16,</div><div class='ctx'> 		ixgbe_mbox_api_15,</div><div class='ctx'> 		ixgbe_mbox_api_14,</div><div class='ctx'> 		ixgbe_mbox_api_13,</div><div class='hunk'>@@ -2292,7 +2320,9 @@ static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)</div><div class='ctx'> 		idx++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;api_version &gt;= ixgbe_mbox_api_15) {</div><div class='add'>+	ixgbevf_set_features(adapter);</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;pf_features &amp; IXGBEVF_PF_SUP_ESX_MBX) {</div><div class='ctx'> 		hw-&gt;mbx.ops.init_params(hw);</div><div class='ctx'> 		memcpy(&amp;hw-&gt;mbx.ops, &amp;ixgbevf_mbx_ops,</div><div class='ctx'> 		       sizeof(struct ixgbe_mbx_operations));</div><div class='hunk'>@@ -2512,7 +2542,7 @@ void ixgbevf_down(struct ixgbevf_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	ixgbevf_napi_disable_all(adapter);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;service_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;service_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* disable transmits in the hardware now that interrupts are off */</div><div class='ctx'> 	for (i = 0; i &lt; adapter-&gt;num_tx_queues; i++) {</div><div class='hunk'>@@ -2649,6 +2679,8 @@ static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)</div><div class='ctx'> 		case ixgbe_mbox_api_13:</div><div class='ctx'> 		case ixgbe_mbox_api_14:</div><div class='ctx'> 		case ixgbe_mbox_api_15:</div><div class='add'>+		case ixgbe_mbox_api_16:</div><div class='add'>+		case ixgbe_mbox_api_17:</div><div class='ctx'> 			if (adapter-&gt;xdp_prog &amp;&amp;</div><div class='ctx'> 			    hw-&gt;mac.max_tx_queues == rss)</div><div class='ctx'> 				rss = rss &gt; 3 ? 2 : 1;</div><div class='hunk'>@@ -3174,8 +3206,8 @@ void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)</div><div class='ctx'>  **/</div><div class='ctx'> static void ixgbevf_service_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ixgbevf_adapter *adapter = from_timer(adapter, t,</div><div class='del'>-						     service_timer);</div><div class='add'>+	struct ixgbevf_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							     service_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset the timer */</div><div class='ctx'> 	mod_timer(&amp;adapter-&gt;service_timer, (HZ * 2) + jiffies);</div><div class='hunk'>@@ -4321,7 +4353,7 @@ static int ixgbevf_resume(struct device *dev_d)</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(dev_d);</div><div class='ctx'> 	struct net_device *netdev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct ixgbevf_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	u32 err;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;hw.hw_addr = adapter-&gt;io_addr;</div><div class='ctx'> 	smp_mb__before_atomic();</div><div class='hunk'>@@ -4643,6 +4675,8 @@ static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='ctx'> 	case ixgbe_mbox_api_15:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='ctx'> 		netdev-&gt;max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -</div><div class='ctx'> 				  (ETH_HLEN + ETH_FCS_LEN);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -4693,6 +4727,9 @@ static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	case ixgbe_mac_X540_vf:</div><div class='ctx'> 		dev_info(&amp;pdev-&gt;dev, "Intel(R) X540 Virtual Function\n");</div><div class='ctx'> 		break;</div><div class='add'>+	case ixgbe_mac_e610_vf:</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Intel(R) E610 Virtual Function\n");</div><div class='add'>+		break;</div><div class='ctx'> 	case ixgbe_mac_82599_vf:</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_info(&amp;pdev-&gt;dev, "Intel(R) 82599 Virtual Function\n");</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/mbx.c b/drivers/net/ethernet/intel/ixgbevf/mbx.c<br/>index a55dd978f7ca..24d0237e7a99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/mbx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/mbx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/mbx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbevf/mbx.c</a></div><div class='hunk'>@@ -505,15 +505,3 @@ const struct ixgbe_mbx_operations ixgbevf_mbx_ops_legacy = {</div><div class='ctx'> 	.check_for_ack	= ixgbevf_check_for_ack_vf,</div><div class='ctx'> 	.check_for_rst	= ixgbevf_check_for_rst_vf,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-/* Mailbox operations when running on Hyper-V.</div><div class='del'>- * On Hyper-V, PF/VF communication is not through the</div><div class='del'>- * hardware mailbox; this communication is through</div><div class='del'>- * a software mediated path.</div><div class='del'>- * Most mail box operations are noop while running on</div><div class='del'>- * Hyper-V.</div><div class='del'>- */</div><div class='del'>-const struct ixgbe_mbx_operations ixgbevf_hv_mbx_ops = {</div><div class='del'>-	.init_params	= ixgbevf_init_mbx_params_vf,</div><div class='del'>-	.check_for_rst	= ixgbevf_check_for_rst_vf,</div><div class='del'>-};</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/mbx.h b/drivers/net/ethernet/intel/ixgbevf/mbx.h<br/>index 835bbcc5cc8e..a8ed23ee66aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/mbx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/mbx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/mbx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbevf/mbx.h</a></div><div class='hunk'>@@ -66,6 +66,8 @@ enum ixgbe_pfvf_api_rev {</div><div class='ctx'> 	ixgbe_mbox_api_13,	/* API version 1.3, linux/freebsd VF driver */</div><div class='ctx'> 	ixgbe_mbox_api_14,	/* API version 1.4, linux/freebsd VF driver */</div><div class='ctx'> 	ixgbe_mbox_api_15,	/* API version 1.5, linux/freebsd VF driver */</div><div class='add'>+	ixgbe_mbox_api_16,      /* API version 1.6, linux/freebsd VF driver */</div><div class='add'>+	ixgbe_mbox_api_17,	/* API version 1.7, linux/freebsd VF driver */</div><div class='ctx'> 	/* This value should always be last */</div><div class='ctx'> 	ixgbe_mbox_api_unknown,	/* indicates that API version is not known */</div><div class='ctx'> };</div><div class='hunk'>@@ -102,6 +104,12 @@ enum ixgbe_pfvf_api_rev {</div><div class='ctx'> </div><div class='ctx'> #define IXGBE_VF_GET_LINK_STATE 0x10 /* get vf link state */</div><div class='ctx'> </div><div class='add'>+/* mailbox API, version 1.6 VF requests */</div><div class='add'>+#define IXGBE_VF_GET_PF_LINK_STATE	0x11 /* request PF to send link info */</div><div class='add'>+</div><div class='add'>+/* mailbox API, version 1.7 VF requests */</div><div class='add'>+#define IXGBE_VF_FEATURES_NEGOTIATE	0x12 /* get features supported by PF*/</div><div class='add'>+</div><div class='ctx'> /* length of permanent address message returned from PF */</div><div class='ctx'> #define IXGBE_VF_PERMADDR_MSG_LEN	4</div><div class='ctx'> /* word in permanent address message with the current multicast type */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/vf.c b/drivers/net/ethernet/intel/ixgbevf/vf.c<br/>index 1641d00d8ed3..74d320879513 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/vf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/vf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/vf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbevf/vf.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include "vf.h"</div><div class='ctx'> #include "ixgbevf.h"</div><div class='hunk'>@@ -255,7 +255,7 @@ static s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)</div><div class='ctx'> </div><div class='ctx'> 	memset(msgbuf, 0, sizeof(msgbuf));</div><div class='ctx'> 	/* If index is one then this is the start of a new list and needs</div><div class='del'>-	 * indication to the PF so it can do it's own list management.</div><div class='add'>+	 * indication to the PF so it can do its own list management.</div><div class='ctx'> 	 * If it is zero then that tells the PF to just clear all of</div><div class='ctx'> 	 * this VF's macvlans and there is no new list.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -313,6 +313,8 @@ int ixgbevf_get_reta_locked(struct ixgbe_hw *hw, u32 *reta, int num_rx_queues)</div><div class='ctx'> 	 * is not supported for this device type.</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch (hw-&gt;api_version) {</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='ctx'> 	case ixgbe_mbox_api_15:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='hunk'>@@ -382,6 +384,8 @@ int ixgbevf_get_rss_key_locked(struct ixgbe_hw *hw, u8 *rss_key)</div><div class='ctx'> 	 * or if the operation is not supported for this device type.</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch (hw-&gt;api_version) {</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='ctx'> 	case ixgbe_mbox_api_15:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='hunk'>@@ -552,6 +556,8 @@ static s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='ctx'> 	case ixgbe_mbox_api_15:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -625,6 +631,85 @@ static s32 ixgbevf_hv_get_link_state_vf(struct ixgbe_hw *hw, bool *link_state)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ixgbevf_get_pf_link_state - Get PF's link status</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @speed: link speed</div><div class='add'>+ * @link_up: indicate if link is up/down</div><div class='add'>+ *</div><div class='add'>+ * Ask PF to provide link_up state and speed of the link.</div><div class='add'>+ *</div><div class='add'>+ * Return: IXGBE_ERR_MBX in the case of mailbox error,</div><div class='add'>+ * -EOPNOTSUPP if the op is not supported or 0 on success.</div><div class='add'>+ */</div><div class='add'>+static int ixgbevf_get_pf_link_state(struct ixgbe_hw *hw, ixgbe_link_speed *speed,</div><div class='add'>+				     bool *link_up)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[3] = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;api_version) {</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msgbuf[0] = IXGBE_VF_GET_PF_LINK_STATE;</div><div class='add'>+</div><div class='add'>+	err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,</div><div class='add'>+					 ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (err || (msgbuf[0] &amp; IXGBE_VT_MSGTYPE_FAILURE)) {</div><div class='add'>+		err = IXGBE_ERR_MBX;</div><div class='add'>+		*speed = IXGBE_LINK_SPEED_UNKNOWN;</div><div class='add'>+		/* No need to set @link_up to false as it will be done by</div><div class='add'>+		 * ixgbe_check_mac_link_vf().</div><div class='add'>+		 */</div><div class='add'>+	} else {</div><div class='add'>+		*speed = msgbuf[1];</div><div class='add'>+		*link_up = msgbuf[2];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ixgbevf_negotiate_features_vf - negotiate supported features with PF driver</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @pf_features: bitmask of features supported by PF</div><div class='add'>+ *</div><div class='add'>+ * Return: IXGBE_ERR_MBX in the  case of mailbox error,</div><div class='add'>+ * -EOPNOTSUPP if the op is not supported or 0 on success.</div><div class='add'>+ */</div><div class='add'>+static int ixgbevf_negotiate_features_vf(struct ixgbe_hw *hw, u32 *pf_features)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[2] = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (hw-&gt;api_version) {</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msgbuf[0] = IXGBE_VF_FEATURES_NEGOTIATE;</div><div class='add'>+	msgbuf[1] = IXGBEVF_SUPPORTED_FEATURES;</div><div class='add'>+</div><div class='add'>+	err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,</div><div class='add'>+					 ARRAY_SIZE(msgbuf));</div><div class='add'>+</div><div class='add'>+	if (err || (msgbuf[0] &amp; IXGBE_VT_MSGTYPE_FAILURE)) {</div><div class='add'>+		err = IXGBE_ERR_MBX;</div><div class='add'>+		*pf_features = 0x0;</div><div class='add'>+	} else {</div><div class='add'>+		*pf_features = msgbuf[1];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  *  ixgbevf_set_vfta_vf - Set/Unset VLAN filter table address</div><div class='ctx'>  *  @hw: pointer to the HW structure</div><div class='ctx'>  *  @vlan: 12 bit VLAN ID</div><div class='hunk'>@@ -659,6 +744,58 @@ mbx_err:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ixgbe_read_vflinks - Read VFLINKS register</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @speed: link speed</div><div class='add'>+ * @link_up: indicate if link is up/down</div><div class='add'>+ *</div><div class='add'>+ * Get linkup status and link speed from the VFLINKS register.</div><div class='add'>+ */</div><div class='add'>+static void ixgbe_read_vflinks(struct ixgbe_hw *hw, ixgbe_link_speed *speed,</div><div class='add'>+			       bool *link_up)</div><div class='add'>+{</div><div class='add'>+	u32 vflinks = IXGBE_READ_REG(hw, IXGBE_VFLINKS);</div><div class='add'>+</div><div class='add'>+	/* if link status is down no point in checking to see if PF is up */</div><div class='add'>+	if (!(vflinks &amp; IXGBE_LINKS_UP)) {</div><div class='add'>+		*link_up = false;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* for SFP+ modules and DA cables on 82599 it can take up to 500usecs</div><div class='add'>+	 * before the link status is correct</div><div class='add'>+	 */</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_82599_vf) {</div><div class='add'>+		for (int i = 0; i &lt; 5; i++) {</div><div class='add'>+			udelay(100);</div><div class='add'>+			vflinks = IXGBE_READ_REG(hw, IXGBE_VFLINKS);</div><div class='add'>+</div><div class='add'>+			if (!(vflinks &amp; IXGBE_LINKS_UP)) {</div><div class='add'>+				*link_up = false;</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We reached this point so there's link */</div><div class='add'>+	*link_up = true;</div><div class='add'>+</div><div class='add'>+	switch (vflinks &amp; IXGBE_LINKS_SPEED_82599) {</div><div class='add'>+	case IXGBE_LINKS_SPEED_10G_82599:</div><div class='add'>+		*speed = IXGBE_LINK_SPEED_10GB_FULL;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_LINKS_SPEED_1G_82599:</div><div class='add'>+		*speed = IXGBE_LINK_SPEED_1GB_FULL;</div><div class='add'>+		break;</div><div class='add'>+	case IXGBE_LINKS_SPEED_100_82599:</div><div class='add'>+		*speed = IXGBE_LINK_SPEED_100_FULL;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*speed = IXGBE_LINK_SPEED_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ixgbevf_hv_set_vfta_vf - * Hyper-V variant - just a stub.</div><div class='ctx'>  * @hw: unused</div><div class='ctx'>  * @vlan: unused</div><div class='hunk'>@@ -702,10 +839,10 @@ static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,</div><div class='ctx'> 				     bool *link_up,</div><div class='ctx'> 				     bool autoneg_wait_to_complete)</div><div class='ctx'> {</div><div class='add'>+	struct ixgbevf_adapter *adapter = hw-&gt;back;</div><div class='ctx'> 	struct ixgbe_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='ctx'> 	struct ixgbe_mac_info *mac = &amp;hw-&gt;mac;</div><div class='ctx'> 	s32 ret_val = 0;</div><div class='del'>-	u32 links_reg;</div><div class='ctx'> 	u32 in_msg = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* If we were hit with a reset drop the link */</div><div class='hunk'>@@ -715,43 +852,21 @@ static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,</div><div class='ctx'> 	if (!mac-&gt;get_link_status)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	/* if link status is down no point in checking to see if pf is up */</div><div class='del'>-	links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);</div><div class='del'>-	if (!(links_reg &amp; IXGBE_LINKS_UP))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/* for SFP+ modules and DA cables on 82599 it can take up to 500usecs</div><div class='del'>-	 * before the link status is correct</div><div class='del'>-	 */</div><div class='del'>-	if (mac-&gt;type == ixgbe_mac_82599_vf) {</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; 5; i++) {</div><div class='del'>-			udelay(100);</div><div class='del'>-			links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);</div><div class='del'>-</div><div class='del'>-			if (!(links_reg &amp; IXGBE_LINKS_UP))</div><div class='del'>-				goto out;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (links_reg &amp; IXGBE_LINKS_SPEED_82599) {</div><div class='del'>-	case IXGBE_LINKS_SPEED_10G_82599:</div><div class='del'>-		*speed = IXGBE_LINK_SPEED_10GB_FULL;</div><div class='del'>-		break;</div><div class='del'>-	case IXGBE_LINKS_SPEED_1G_82599:</div><div class='del'>-		*speed = IXGBE_LINK_SPEED_1GB_FULL;</div><div class='del'>-		break;</div><div class='del'>-	case IXGBE_LINKS_SPEED_100_82599:</div><div class='del'>-		*speed = IXGBE_LINK_SPEED_100_FULL;</div><div class='del'>-		break;</div><div class='add'>+	if (hw-&gt;mac.type == ixgbe_mac_e610_vf) {</div><div class='add'>+		ret_val = ixgbevf_get_pf_link_state(hw, speed, link_up);</div><div class='add'>+		if (ret_val)</div><div class='add'>+			goto out;</div><div class='add'>+	} else {</div><div class='add'>+		ixgbe_read_vflinks(hw, speed, link_up);</div><div class='add'>+		if (*link_up == false)</div><div class='add'>+			goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* if the read failed it could just be a mailbox collision, best wait</div><div class='ctx'> 	 * until we are called again and don't report an error</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (mbx-&gt;ops.read(hw, &amp;in_msg, 1)) {</div><div class='del'>-		if (hw-&gt;api_version &gt;= ixgbe_mbox_api_15)</div><div class='add'>+		if (adapter-&gt;pf_features &amp; IXGBEVF_PF_SUP_ESX_MBX)</div><div class='ctx'> 			mac-&gt;get_link_status = false;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -951,6 +1066,8 @@ int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,</div><div class='ctx'> 	case ixgbe_mbox_api_13:</div><div class='ctx'> 	case ixgbe_mbox_api_14:</div><div class='ctx'> 	case ixgbe_mbox_api_15:</div><div class='add'>+	case ixgbe_mbox_api_16:</div><div class='add'>+	case ixgbe_mbox_api_17:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1005,6 +1122,7 @@ static const struct ixgbe_mac_operations ixgbevf_mac_ops = {</div><div class='ctx'> 	.setup_link		= ixgbevf_setup_mac_link_vf,</div><div class='ctx'> 	.check_link		= ixgbevf_check_mac_link_vf,</div><div class='ctx'> 	.negotiate_api_version	= ixgbevf_negotiate_api_version_vf,</div><div class='add'>+	.negotiate_features	= ixgbevf_negotiate_features_vf,</div><div class='ctx'> 	.set_rar		= ixgbevf_set_rar_vf,</div><div class='ctx'> 	.update_mc_addr_list	= ixgbevf_update_mc_addr_list_vf,</div><div class='ctx'> 	.update_xcast_mode	= ixgbevf_update_xcast_mode,</div><div class='hunk'>@@ -1076,3 +1194,13 @@ const struct ixgbevf_info ixgbevf_x550em_a_vf_info = {</div><div class='ctx'> 	.mac = ixgbe_mac_x550em_a_vf,</div><div class='ctx'> 	.mac_ops = &amp;ixgbevf_mac_ops,</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+const struct ixgbevf_info ixgbevf_e610_vf_info = {</div><div class='add'>+	.mac                    = ixgbe_mac_e610_vf,</div><div class='add'>+	.mac_ops                = &amp;ixgbevf_mac_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct ixgbevf_info ixgbevf_e610_vf_hv_info = {</div><div class='add'>+	.mac            = ixgbe_mac_e610_vf,</div><div class='add'>+	.mac_ops        = &amp;ixgbevf_hv_mac_ops,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/intel/ixgbevf/vf.h b/drivers/net/ethernet/intel/ixgbevf/vf.h<br/>index b4eef5b6c172..4f19b8900c29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/vf.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/ixgbevf/vf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/ixgbevf/vf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/ixgbevf/vf.h</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/* Copyright(c) 1999 - 2018 Intel Corporation. */</div><div class='add'>+/* Copyright(c) 1999 - 2024 Intel Corporation. */</div><div class='ctx'> </div><div class='ctx'> #ifndef __IXGBE_VF_H__</div><div class='ctx'> #define __IXGBE_VF_H__</div><div class='hunk'>@@ -26,6 +26,7 @@ struct ixgbe_mac_operations {</div><div class='ctx'> 	s32 (*stop_adapter)(struct ixgbe_hw *);</div><div class='ctx'> 	s32 (*get_bus_info)(struct ixgbe_hw *);</div><div class='ctx'> 	s32 (*negotiate_api_version)(struct ixgbe_hw *hw, int api);</div><div class='add'>+	int (*negotiate_features)(struct ixgbe_hw *hw, u32 *pf_features);</div><div class='ctx'> </div><div class='ctx'> 	/* Link */</div><div class='ctx'> 	s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool, bool);</div><div class='hunk'>@@ -54,6 +55,8 @@ enum ixgbe_mac_type {</div><div class='ctx'> 	ixgbe_mac_X550_vf,</div><div class='ctx'> 	ixgbe_mac_X550EM_x_vf,</div><div class='ctx'> 	ixgbe_mac_x550em_a_vf,</div><div class='add'>+	ixgbe_mac_e610,</div><div class='add'>+	ixgbe_mac_e610_vf,</div><div class='ctx'> 	ixgbe_num_macs</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/libeth/Kconfig b/drivers/net/ethernet/intel/libeth/Kconfig<br/>index 480293b71dbc..2445b979c499 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libeth/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libeth/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libeth/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libeth/Kconfig</a></div><div class='hunk'>@@ -1,9 +1,15 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-# Copyright (C) 2024 Intel Corporation</div><div class='add'>+# Copyright (C) 2024-2025 Intel Corporation</div><div class='ctx'> </div><div class='ctx'> config LIBETH</div><div class='del'>-	tristate</div><div class='add'>+	tristate "Common Ethernet library (libeth)" if COMPILE_TEST</div><div class='ctx'> 	select PAGE_POOL</div><div class='ctx'> 	help</div><div class='ctx'> 	  libeth is a common library containing routines shared between several</div><div class='ctx'> 	  drivers, but not yet promoted to the generic kernel API.</div><div class='add'>+</div><div class='add'>+config LIBETH_XDP</div><div class='add'>+	tristate "Common XDP library (libeth_xdp)" if COMPILE_TEST</div><div class='add'>+	select LIBETH</div><div class='add'>+	help</div><div class='add'>+	  XDP and XSk helpers based on libeth hotpath management.</div><div class='head'>diff --git a/drivers/net/ethernet/intel/libeth/Makefile b/drivers/net/ethernet/intel/libeth/Makefile<br/>index 52492b081132..350bc0b38bad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libeth/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libeth/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libeth/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libeth/Makefile</a></div><div class='hunk'>@@ -1,6 +1,12 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-# Copyright (C) 2024 Intel Corporation</div><div class='add'>+# Copyright (C) 2024-2025 Intel Corporation</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_LIBETH)		+= libeth.o</div><div class='ctx'> </div><div class='ctx'> libeth-y			:= rx.o</div><div class='add'>+libeth-y			+= tx.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_LIBETH_XDP)	+= libeth_xdp.o</div><div class='add'>+</div><div class='add'>+libeth_xdp-y			+= xdp.o</div><div class='add'>+libeth_xdp-y			+= xsk.o</div><div class='head'>diff --git a/drivers/net/ethernet/intel/libeth/priv.h b/drivers/net/ethernet/intel/libeth/priv.h<br/>new file mode 100644<br/>index 000000000000..9b811d31015c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libeth/priv.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libeth/priv.h</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright (C) 2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#ifndef __LIBETH_PRIV_H</div><div class='add'>+#define __LIBETH_PRIV_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/* XDP */</div><div class='add'>+</div><div class='add'>+enum xdp_action;</div><div class='add'>+struct libeth_xdp_buff;</div><div class='add'>+struct libeth_xdp_tx_frame;</div><div class='add'>+struct skb_shared_info;</div><div class='add'>+struct xdp_frame_bulk;</div><div class='add'>+</div><div class='add'>+extern const struct xsk_tx_metadata_ops libeth_xsktmo_slow;</div><div class='add'>+</div><div class='add'>+void libeth_xsk_tx_return_bulk(const struct libeth_xdp_tx_frame *bq,</div><div class='add'>+			       u32 count);</div><div class='add'>+u32 libeth_xsk_prog_exception(struct libeth_xdp_buff *xdp, enum xdp_action act,</div><div class='add'>+			      int ret);</div><div class='add'>+</div><div class='add'>+struct libeth_xdp_ops {</div><div class='add'>+	void	(*bulk)(const struct skb_shared_info *sinfo,</div><div class='add'>+			struct xdp_frame_bulk *bq, bool frags);</div><div class='add'>+	void	(*xsk)(struct libeth_xdp_buff *xdp);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void libeth_attach_xdp(const struct libeth_xdp_ops *ops);</div><div class='add'>+</div><div class='add'>+static inline void libeth_detach_xdp(void)</div><div class='add'>+{</div><div class='add'>+	libeth_attach_xdp(NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __LIBETH_PRIV_H */</div><div class='head'>diff --git a/drivers/net/ethernet/intel/libeth/rx.c b/drivers/net/ethernet/intel/libeth/rx.c<br/>index f20926669318..62521a1f4ec9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libeth/rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libeth/rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libeth/rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libeth/rx.c</a></div><div class='hunk'>@@ -1,5 +1,9 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/* Copyright (C) 2024 Intel Corporation */</div><div class='add'>+/* Copyright (C) 2024-2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#define DEFAULT_SYMBOL_NAMESPACE	"LIBETH"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/libeth/rx.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -68,7 +72,7 @@ static u32 libeth_rx_hw_len_truesize(const struct page_pool_params *pp,</div><div class='ctx'> static bool libeth_rx_page_pool_params(struct libeth_fq *fq,</div><div class='ctx'> 				       struct page_pool_params *pp)</div><div class='ctx'> {</div><div class='del'>-	pp-&gt;offset = LIBETH_SKB_HEADROOM;</div><div class='add'>+	pp-&gt;offset = fq-&gt;xdp ? LIBETH_XDP_HEADROOM : LIBETH_SKB_HEADROOM;</div><div class='ctx'> 	/* HW-writeable / syncable length per one page */</div><div class='ctx'> 	pp-&gt;max_len = LIBETH_RX_PAGE_LEN(pp-&gt;offset);</div><div class='ctx'> </div><div class='hunk'>@@ -155,11 +159,12 @@ int libeth_rx_fq_create(struct libeth_fq *fq, struct napi_struct *napi)</div><div class='ctx'> 		.dev		= napi-&gt;dev-&gt;dev.parent,</div><div class='ctx'> 		.netdev		= napi-&gt;dev,</div><div class='ctx'> 		.napi		= napi,</div><div class='del'>-		.dma_dir	= DMA_FROM_DEVICE,</div><div class='ctx'> 	};</div><div class='ctx'> 	struct libeth_fqe *fqes;</div><div class='ctx'> 	struct page_pool *pool;</div><div class='del'>-	bool ret;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pp.dma_dir = fq-&gt;xdp ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE;</div><div class='ctx'> </div><div class='ctx'> 	if (!fq-&gt;hsplit)</div><div class='ctx'> 		ret = libeth_rx_page_pool_params(fq, &amp;pp);</div><div class='hunk'>@@ -173,20 +178,28 @@ int libeth_rx_fq_create(struct libeth_fq *fq, struct napi_struct *napi)</div><div class='ctx'> 		return PTR_ERR(pool);</div><div class='ctx'> </div><div class='ctx'> 	fqes = kvcalloc_node(fq-&gt;count, sizeof(*fqes), GFP_KERNEL, fq-&gt;nid);</div><div class='del'>-	if (!fqes)</div><div class='add'>+	if (!fqes) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='ctx'> 		goto err_buf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = xdp_reg_page_pool(pool);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_mem;</div><div class='ctx'> </div><div class='ctx'> 	fq-&gt;fqes = fqes;</div><div class='ctx'> 	fq-&gt;pp = pool;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_mem:</div><div class='add'>+	kvfree(fqes);</div><div class='ctx'> err_buf:</div><div class='ctx'> 	page_pool_destroy(pool);</div><div class='ctx'> </div><div class='del'>-	return -ENOMEM;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(libeth_rx_fq_create, LIBETH);</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_rx_fq_create);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * libeth_rx_fq_destroy - destroy a &amp;page_pool created by libeth</div><div class='hunk'>@@ -194,22 +207,23 @@ EXPORT_SYMBOL_NS_GPL(libeth_rx_fq_create, LIBETH);</div><div class='ctx'>  */</div><div class='ctx'> void libeth_rx_fq_destroy(struct libeth_fq *fq)</div><div class='ctx'> {</div><div class='add'>+	xdp_unreg_page_pool(fq-&gt;pp);</div><div class='ctx'> 	kvfree(fq-&gt;fqes);</div><div class='ctx'> 	page_pool_destroy(fq-&gt;pp);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(libeth_rx_fq_destroy, LIBETH);</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_rx_fq_destroy);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * libeth_rx_recycle_slow - recycle a libeth page from the NAPI context</div><div class='del'>- * @page: page to recycle</div><div class='add'>+ * libeth_rx_recycle_slow - recycle libeth netmem</div><div class='add'>+ * @netmem: network memory to recycle</div><div class='ctx'>  *</div><div class='ctx'>  * To be used on exceptions or rare cases not requiring fast inline recycling.</div><div class='ctx'>  */</div><div class='del'>-void libeth_rx_recycle_slow(struct page *page)</div><div class='add'>+void __cold libeth_rx_recycle_slow(netmem_ref netmem)</div><div class='ctx'> {</div><div class='del'>-	page_pool_recycle_direct(page-&gt;pp, page);</div><div class='add'>+	page_pool_put_full_netmem(netmem_get_pp(netmem), netmem, false);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(libeth_rx_recycle_slow, LIBETH);</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_rx_recycle_slow);</div><div class='ctx'> </div><div class='ctx'> /* Converting abstract packet type numbers into a software structure with</div><div class='ctx'>  * the packet parameters to do O(1) lookup on Rx.</div><div class='hunk'>@@ -251,7 +265,7 @@ void libeth_rx_pt_gen_hash_type(struct libeth_rx_pt *pt)</div><div class='ctx'> 	pt-&gt;hash_type |= libeth_rx_pt_xdp_iprot[pt-&gt;inner_prot];</div><div class='ctx'> 	pt-&gt;hash_type |= libeth_rx_pt_xdp_pl[pt-&gt;payload_layer];</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(libeth_rx_pt_gen_hash_type, LIBETH);</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_rx_pt_gen_hash_type);</div><div class='ctx'> </div><div class='ctx'> /* Module */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/intel/libeth/tx.c b/drivers/net/ethernet/intel/libeth/tx.c<br/>new file mode 100644<br/>index 000000000000..e0167f43d2a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libeth/tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libeth/tx.c</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#define DEFAULT_SYMBOL_NAMESPACE	"LIBETH"</div><div class='add'>+</div><div class='add'>+#include &lt;net/libeth/xdp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "priv.h"</div><div class='add'>+</div><div class='add'>+/* Tx buffer completion */</div><div class='add'>+</div><div class='add'>+DEFINE_STATIC_CALL_NULL(bulk, libeth_xdp_return_buff_bulk);</div><div class='add'>+DEFINE_STATIC_CALL_NULL(xsk, libeth_xsk_buff_free_slow);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_tx_complete_any - perform Tx completion for one SQE of any type</div><div class='add'>+ * @sqe: Tx buffer to complete</div><div class='add'>+ * @cp: polling params</div><div class='add'>+ *</div><div class='add'>+ * Can be used to complete both regular and XDP SQEs, for example when</div><div class='add'>+ * destroying queues.</div><div class='add'>+ * When libeth_xdp is not loaded, XDPSQEs won't be handled.</div><div class='add'>+ */</div><div class='add'>+void libeth_tx_complete_any(struct libeth_sqe *sqe, struct libeth_cq_pp *cp)</div><div class='add'>+{</div><div class='add'>+	if (sqe-&gt;type &gt;= __LIBETH_SQE_XDP_START)</div><div class='add'>+		__libeth_xdp_complete_tx(sqe, cp, static_call(bulk),</div><div class='add'>+					 static_call(xsk));</div><div class='add'>+	else</div><div class='add'>+		libeth_tx_complete(sqe, cp);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_tx_complete_any);</div><div class='add'>+</div><div class='add'>+/* Module */</div><div class='add'>+</div><div class='add'>+void libeth_attach_xdp(const struct libeth_xdp_ops *ops)</div><div class='add'>+{</div><div class='add'>+	static_call_update(bulk, ops ? ops-&gt;bulk : NULL);</div><div class='add'>+	static_call_update(xsk, ops ? ops-&gt;xsk : NULL);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_attach_xdp);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/libeth/xdp.c b/drivers/net/ethernet/intel/libeth/xdp.c<br/>new file mode 100644<br/>index 000000000000..d4ac027d9584<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libeth/xdp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libeth/xdp.c</a></div><div class='hunk'>@@ -0,0 +1,451 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#define DEFAULT_SYMBOL_NAMESPACE	"LIBETH_XDP"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/libeth/xdp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "priv.h"</div><div class='add'>+</div><div class='add'>+/* XDPSQ sharing */</div><div class='add'>+</div><div class='add'>+DEFINE_STATIC_KEY_FALSE(libeth_xdpsq_share);</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdpsq_share);</div><div class='add'>+</div><div class='add'>+void __libeth_xdpsq_get(struct libeth_xdpsq_lock *lock,</div><div class='add'>+			const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	bool warn;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;lock-&gt;lock);</div><div class='add'>+	lock-&gt;share = true;</div><div class='add'>+</div><div class='add'>+	warn = !static_key_enabled(&amp;libeth_xdpsq_share);</div><div class='add'>+	static_branch_inc(&amp;libeth_xdpsq_share);</div><div class='add'>+</div><div class='add'>+	if (warn &amp;&amp; net_ratelimit())</div><div class='add'>+		netdev_warn(dev, "XDPSQ sharing enabled, possible XDP Tx slowdown\n");</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__libeth_xdpsq_get);</div><div class='add'>+</div><div class='add'>+void __libeth_xdpsq_put(struct libeth_xdpsq_lock *lock,</div><div class='add'>+			const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	static_branch_dec(&amp;libeth_xdpsq_share);</div><div class='add'>+</div><div class='add'>+	if (!static_key_enabled(&amp;libeth_xdpsq_share) &amp;&amp; net_ratelimit())</div><div class='add'>+		netdev_notice(dev, "XDPSQ sharing disabled\n");</div><div class='add'>+</div><div class='add'>+	lock-&gt;share = false;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__libeth_xdpsq_put);</div><div class='add'>+</div><div class='add'>+void __acquires(&amp;lock-&gt;lock)</div><div class='add'>+__libeth_xdpsq_lock(struct libeth_xdpsq_lock *lock)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;lock-&gt;lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__libeth_xdpsq_lock);</div><div class='add'>+</div><div class='add'>+void __releases(&amp;lock-&gt;lock)</div><div class='add'>+__libeth_xdpsq_unlock(struct libeth_xdpsq_lock *lock)</div><div class='add'>+{</div><div class='add'>+	spin_unlock(&amp;lock-&gt;lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__libeth_xdpsq_unlock);</div><div class='add'>+</div><div class='add'>+/* XDPSQ clean-up timers */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xdpsq_init_timer - initialize an XDPSQ clean-up timer</div><div class='add'>+ * @timer: timer to initialize</div><div class='add'>+ * @xdpsq: queue this timer belongs to</div><div class='add'>+ * @lock: corresponding XDPSQ lock</div><div class='add'>+ * @poll: queue polling/completion function</div><div class='add'>+ *</div><div class='add'>+ * XDPSQ clean-up timers must be set up before using at the queue configuration</div><div class='add'>+ * time. Set the required pointers and the cleaning callback.</div><div class='add'>+ */</div><div class='add'>+void libeth_xdpsq_init_timer(struct libeth_xdpsq_timer *timer, void *xdpsq,</div><div class='add'>+			     struct libeth_xdpsq_lock *lock,</div><div class='add'>+			     void (*poll)(struct work_struct *work))</div><div class='add'>+{</div><div class='add'>+	timer-&gt;xdpsq = xdpsq;</div><div class='add'>+	timer-&gt;lock = lock;</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;timer-&gt;dwork, poll);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdpsq_init_timer);</div><div class='add'>+</div><div class='add'>+/* ``XDP_TX`` bulking */</div><div class='add'>+</div><div class='add'>+static void __cold</div><div class='add'>+libeth_xdp_tx_return_one(const struct libeth_xdp_tx_frame *frm)</div><div class='add'>+{</div><div class='add'>+	if (frm-&gt;len_fl &amp; LIBETH_XDP_TX_MULTI)</div><div class='add'>+		libeth_xdp_return_frags(frm-&gt;data + frm-&gt;soff, true);</div><div class='add'>+</div><div class='add'>+	libeth_xdp_return_va(frm-&gt;data, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __cold</div><div class='add'>+libeth_xdp_tx_return_bulk(const struct libeth_xdp_tx_frame *bq, u32 count)</div><div class='add'>+{</div><div class='add'>+	for (u32 i = 0; i &lt; count; i++) {</div><div class='add'>+		const struct libeth_xdp_tx_frame *frm = &amp;bq[i];</div><div class='add'>+</div><div class='add'>+		if (!(frm-&gt;len_fl &amp; LIBETH_XDP_TX_FIRST))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		libeth_xdp_tx_return_one(frm);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __cold libeth_trace_xdp_exception(const struct net_device *dev,</div><div class='add'>+					      const struct bpf_prog *prog,</div><div class='add'>+					      u32 act)</div><div class='add'>+{</div><div class='add'>+	trace_xdp_exception(dev, prog, act);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xdp_tx_exception - handle Tx exceptions of XDP frames</div><div class='add'>+ * @bq: XDP Tx frame bulk</div><div class='add'>+ * @sent: number of frames sent successfully (from this bulk)</div><div class='add'>+ * @flags: internal libeth_xdp flags (XSk, .ndo_xdp_xmit etc.)</div><div class='add'>+ *</div><div class='add'>+ * Cold helper used by __libeth_xdp_tx_flush_bulk(), do not call directly.</div><div class='add'>+ * Reports XDP Tx exceptions, frees the frames that won't be sent or adjust</div><div class='add'>+ * the Tx bulk to try again later.</div><div class='add'>+ */</div><div class='add'>+void __cold libeth_xdp_tx_exception(struct libeth_xdp_tx_bulk *bq, u32 sent,</div><div class='add'>+				    u32 flags)</div><div class='add'>+{</div><div class='add'>+	const struct libeth_xdp_tx_frame *pos = &amp;bq-&gt;bulk[sent];</div><div class='add'>+	u32 left = bq-&gt;count - sent;</div><div class='add'>+</div><div class='add'>+	if (!(flags &amp; LIBETH_XDP_TX_NDO))</div><div class='add'>+		libeth_trace_xdp_exception(bq-&gt;dev, bq-&gt;prog, XDP_TX);</div><div class='add'>+</div><div class='add'>+	if (!(flags &amp; LIBETH_XDP_TX_DROP)) {</div><div class='add'>+		memmove(bq-&gt;bulk, pos, left * sizeof(*bq-&gt;bulk));</div><div class='add'>+		bq-&gt;count = left;</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; LIBETH_XDP_TX_XSK)</div><div class='add'>+		libeth_xsk_tx_return_bulk(pos, left);</div><div class='add'>+	else if (!(flags &amp; LIBETH_XDP_TX_NDO))</div><div class='add'>+		libeth_xdp_tx_return_bulk(pos, left);</div><div class='add'>+	else</div><div class='add'>+		libeth_xdp_xmit_return_bulk(pos, left, bq-&gt;dev);</div><div class='add'>+</div><div class='add'>+	bq-&gt;count = 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdp_tx_exception);</div><div class='add'>+</div><div class='add'>+/* .ndo_xdp_xmit() implementation */</div><div class='add'>+</div><div class='add'>+u32 __cold libeth_xdp_xmit_return_bulk(const struct libeth_xdp_tx_frame *bq,</div><div class='add'>+				       u32 count, const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 n = 0;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; count; i++) {</div><div class='add'>+		const struct libeth_xdp_tx_frame *frm = &amp;bq[i];</div><div class='add'>+		dma_addr_t dma;</div><div class='add'>+</div><div class='add'>+		if (frm-&gt;flags &amp; LIBETH_XDP_TX_FIRST)</div><div class='add'>+			dma = *libeth_xdp_xmit_frame_dma(frm-&gt;xdpf);</div><div class='add'>+		else</div><div class='add'>+			dma = dma_unmap_addr(frm, dma);</div><div class='add'>+</div><div class='add'>+		dma_unmap_page(dev-&gt;dev.parent, dma, dma_unmap_len(frm, len),</div><div class='add'>+			       DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+		/* Actual xdp_frames are freed by the core */</div><div class='add'>+		n += !!(frm-&gt;flags &amp; LIBETH_XDP_TX_FIRST);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return n;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdp_xmit_return_bulk);</div><div class='add'>+</div><div class='add'>+/* Rx polling path */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xdp_load_stash - recreate an &amp;xdp_buff from libeth_xdp buffer stash</div><div class='add'>+ * @dst: target &amp;libeth_xdp_buff to initialize</div><div class='add'>+ * @src: source stash</div><div class='add'>+ *</div><div class='add'>+ * External helper used by libeth_xdp_init_buff(), do not call directly.</div><div class='add'>+ * Recreate an onstack &amp;libeth_xdp_buff using the stash saved earlier.</div><div class='add'>+ * The only field untouched (rxq) is initialized later in the</div><div class='add'>+ * abovementioned function.</div><div class='add'>+ */</div><div class='add'>+void libeth_xdp_load_stash(struct libeth_xdp_buff *dst,</div><div class='add'>+			   const struct libeth_xdp_buff_stash *src)</div><div class='add'>+{</div><div class='add'>+	dst-&gt;data = src-&gt;data;</div><div class='add'>+	dst-&gt;base.data_end = src-&gt;data + src-&gt;len;</div><div class='add'>+	dst-&gt;base.data_meta = src-&gt;data;</div><div class='add'>+	dst-&gt;base.data_hard_start = src-&gt;data - src-&gt;headroom;</div><div class='add'>+</div><div class='add'>+	dst-&gt;base.frame_sz = src-&gt;frame_sz;</div><div class='add'>+	dst-&gt;base.flags = src-&gt;flags;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdp_load_stash);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xdp_save_stash - convert &amp;xdp_buff to a libeth_xdp buffer stash</div><div class='add'>+ * @dst: target &amp;libeth_xdp_buff_stash to initialize</div><div class='add'>+ * @src: source XDP buffer</div><div class='add'>+ *</div><div class='add'>+ * External helper used by libeth_xdp_save_buff(), do not call directly.</div><div class='add'>+ * Use the fields from the passed XDP buffer to initialize the stash on the</div><div class='add'>+ * queue, so that a partially received frame can be finished later during</div><div class='add'>+ * the next NAPI poll.</div><div class='add'>+ */</div><div class='add'>+void libeth_xdp_save_stash(struct libeth_xdp_buff_stash *dst,</div><div class='add'>+			   const struct libeth_xdp_buff *src)</div><div class='add'>+{</div><div class='add'>+	dst-&gt;data = src-&gt;data;</div><div class='add'>+	dst-&gt;headroom = src-&gt;data - src-&gt;base.data_hard_start;</div><div class='add'>+	dst-&gt;len = src-&gt;base.data_end - src-&gt;data;</div><div class='add'>+</div><div class='add'>+	dst-&gt;frame_sz = src-&gt;base.frame_sz;</div><div class='add'>+	dst-&gt;flags = src-&gt;base.flags;</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(dst-&gt;flags != src-&gt;base.flags);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdp_save_stash);</div><div class='add'>+</div><div class='add'>+void __libeth_xdp_return_stash(struct libeth_xdp_buff_stash *stash)</div><div class='add'>+{</div><div class='add'>+	LIBETH_XDP_ONSTACK_BUFF(xdp);</div><div class='add'>+</div><div class='add'>+	libeth_xdp_load_stash(xdp, stash);</div><div class='add'>+	libeth_xdp_return_buff_slow(xdp);</div><div class='add'>+</div><div class='add'>+	stash-&gt;data = NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__libeth_xdp_return_stash);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xdp_return_buff_slow - free &amp;libeth_xdp_buff</div><div class='add'>+ * @xdp: buffer to free/return</div><div class='add'>+ *</div><div class='add'>+ * Slowpath version of libeth_xdp_return_buff() to be called on exceptions,</div><div class='add'>+ * queue clean-ups etc., without unwanted inlining.</div><div class='add'>+ */</div><div class='add'>+void __cold libeth_xdp_return_buff_slow(struct libeth_xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	__libeth_xdp_return_buff(xdp, false);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdp_return_buff_slow);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xdp_buff_add_frag - add frag to XDP buffer</div><div class='add'>+ * @xdp: head XDP buffer</div><div class='add'>+ * @fqe: Rx buffer containing the frag</div><div class='add'>+ * @len: frag length reported by HW</div><div class='add'>+ *</div><div class='add'>+ * External helper used by libeth_xdp_process_buff(), do not call directly.</div><div class='add'>+ * Frees both head and frag buffers on error.</div><div class='add'>+ *</div><div class='add'>+ * Return: true success, false on error (no space for a new frag).</div><div class='add'>+ */</div><div class='add'>+bool libeth_xdp_buff_add_frag(struct libeth_xdp_buff *xdp,</div><div class='add'>+			      const struct libeth_fqe *fqe,</div><div class='add'>+			      u32 len)</div><div class='add'>+{</div><div class='add'>+	netmem_ref netmem = fqe-&gt;netmem;</div><div class='add'>+</div><div class='add'>+	if (!xdp_buff_add_frag(&amp;xdp-&gt;base, netmem,</div><div class='add'>+			       fqe-&gt;offset + netmem_get_pp(netmem)-&gt;p.offset,</div><div class='add'>+			       len, fqe-&gt;truesize))</div><div class='add'>+		goto recycle;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+</div><div class='add'>+recycle:</div><div class='add'>+	libeth_rx_recycle_slow(netmem);</div><div class='add'>+	libeth_xdp_return_buff_slow(xdp);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdp_buff_add_frag);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xdp_prog_exception - handle XDP prog exceptions</div><div class='add'>+ * @bq: XDP Tx bulk</div><div class='add'>+ * @xdp: buffer to process</div><div class='add'>+ * @act: original XDP prog verdict</div><div class='add'>+ * @ret: error code if redirect failed</div><div class='add'>+ *</div><div class='add'>+ * External helper used by __libeth_xdp_run_prog() and</div><div class='add'>+ * __libeth_xsk_run_prog_slow(), do not call directly.</div><div class='add'>+ * Reports invalid @act, XDP exception trace event and frees the buffer.</div><div class='add'>+ *</div><div class='add'>+ * Return: libeth_xdp XDP prog verdict.</div><div class='add'>+ */</div><div class='add'>+u32 __cold libeth_xdp_prog_exception(const struct libeth_xdp_tx_bulk *bq,</div><div class='add'>+				     struct libeth_xdp_buff *xdp,</div><div class='add'>+				     enum xdp_action act, int ret)</div><div class='add'>+{</div><div class='add'>+	if (act &gt; XDP_REDIRECT)</div><div class='add'>+		bpf_warn_invalid_xdp_action(bq-&gt;dev, bq-&gt;prog, act);</div><div class='add'>+</div><div class='add'>+	libeth_trace_xdp_exception(bq-&gt;dev, bq-&gt;prog, act);</div><div class='add'>+</div><div class='add'>+	if (xdp-&gt;base.rxq-&gt;mem.type == MEM_TYPE_XSK_BUFF_POOL)</div><div class='add'>+		return libeth_xsk_prog_exception(xdp, act, ret);</div><div class='add'>+</div><div class='add'>+	libeth_xdp_return_buff_slow(xdp);</div><div class='add'>+</div><div class='add'>+	return LIBETH_XDP_DROP;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdp_prog_exception);</div><div class='add'>+</div><div class='add'>+/* Tx buffer completion */</div><div class='add'>+</div><div class='add'>+static void libeth_xdp_put_netmem_bulk(netmem_ref netmem,</div><div class='add'>+				       struct xdp_frame_bulk *bq)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(bq-&gt;count == XDP_BULK_QUEUE_SIZE))</div><div class='add'>+		xdp_flush_frame_bulk(bq);</div><div class='add'>+</div><div class='add'>+	bq-&gt;q[bq-&gt;count++] = netmem;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xdp_return_buff_bulk - free &amp;xdp_buff as part of a bulk</div><div class='add'>+ * @sinfo: shared info corresponding to the buffer</div><div class='add'>+ * @bq: XDP frame bulk to store the buffer</div><div class='add'>+ * @frags: whether the buffer has frags</div><div class='add'>+ *</div><div class='add'>+ * Same as xdp_return_frame_bulk(), but for &amp;libeth_xdp_buff, speeds up Tx</div><div class='add'>+ * completion of ``XDP_TX`` buffers and allows to free them in same bulks</div><div class='add'>+ * with &amp;xdp_frame buffers.</div><div class='add'>+ */</div><div class='add'>+void libeth_xdp_return_buff_bulk(const struct skb_shared_info *sinfo,</div><div class='add'>+				 struct xdp_frame_bulk *bq, bool frags)</div><div class='add'>+{</div><div class='add'>+	if (!frags)</div><div class='add'>+		goto head;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; sinfo-&gt;nr_frags; i++)</div><div class='add'>+		libeth_xdp_put_netmem_bulk(skb_frag_netmem(&amp;sinfo-&gt;frags[i]),</div><div class='add'>+					   bq);</div><div class='add'>+</div><div class='add'>+head:</div><div class='add'>+	libeth_xdp_put_netmem_bulk(virt_to_netmem(sinfo), bq);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdp_return_buff_bulk);</div><div class='add'>+</div><div class='add'>+/* Misc */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xdp_queue_threshold - calculate XDP queue clean/refill threshold</div><div class='add'>+ * @count: number of descriptors in the queue</div><div class='add'>+ *</div><div class='add'>+ * The threshold is the limit at which RQs start to refill (when the number of</div><div class='add'>+ * empty buffers exceeds it) and SQs get cleaned up (when the number of free</div><div class='add'>+ * descriptors goes below it). To speed up hotpath processing, threshold is</div><div class='add'>+ * always pow-2, closest to 1/4 of the queue length.</div><div class='add'>+ * Don't call it on hotpath, calculate and cache the threshold during the</div><div class='add'>+ * queue initialization.</div><div class='add'>+ *</div><div class='add'>+ * Return: the calculated threshold.</div><div class='add'>+ */</div><div class='add'>+u32 libeth_xdp_queue_threshold(u32 count)</div><div class='add'>+{</div><div class='add'>+	u32 quarter, low, high;</div><div class='add'>+</div><div class='add'>+	if (likely(is_power_of_2(count)))</div><div class='add'>+		return count &gt;&gt; 2;</div><div class='add'>+</div><div class='add'>+	quarter = DIV_ROUND_CLOSEST(count, 4);</div><div class='add'>+	low = rounddown_pow_of_two(quarter);</div><div class='add'>+	high = roundup_pow_of_two(quarter);</div><div class='add'>+</div><div class='add'>+	return high - quarter &lt;= quarter - low ? high : low;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdp_queue_threshold);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __libeth_xdp_set_features - set XDP features for netdev</div><div class='add'>+ * @dev: &amp;net_device to configure</div><div class='add'>+ * @xmo: XDP metadata ops (Rx hints)</div><div class='add'>+ * @zc_segs: maximum number of S/G frags the HW can transmit</div><div class='add'>+ * @tmo: XSk Tx metadata ops (Tx hints)</div><div class='add'>+ *</div><div class='add'>+ * Set all the features libeth_xdp supports. Only the first argument is</div><div class='add'>+ * necessary; without the third one (zero), XSk support won't be advertised.</div><div class='add'>+ * Use the non-underscored versions in drivers instead.</div><div class='add'>+ */</div><div class='add'>+void __libeth_xdp_set_features(struct net_device *dev,</div><div class='add'>+			       const struct xdp_metadata_ops *xmo,</div><div class='add'>+			       u32 zc_segs,</div><div class='add'>+			       const struct xsk_tx_metadata_ops *tmo)</div><div class='add'>+{</div><div class='add'>+	xdp_set_features_flag(dev,</div><div class='add'>+			      NETDEV_XDP_ACT_BASIC |</div><div class='add'>+			      NETDEV_XDP_ACT_REDIRECT |</div><div class='add'>+			      NETDEV_XDP_ACT_NDO_XMIT |</div><div class='add'>+			      (zc_segs ? NETDEV_XDP_ACT_XSK_ZEROCOPY : 0) |</div><div class='add'>+			      NETDEV_XDP_ACT_RX_SG |</div><div class='add'>+			      NETDEV_XDP_ACT_NDO_XMIT_SG);</div><div class='add'>+	dev-&gt;xdp_metadata_ops = xmo;</div><div class='add'>+</div><div class='add'>+	tmo = tmo == libeth_xsktmo ? &amp;libeth_xsktmo_slow : tmo;</div><div class='add'>+</div><div class='add'>+	dev-&gt;xdp_zc_max_segs = zc_segs ? : 1;</div><div class='add'>+	dev-&gt;xsk_tx_metadata_ops = zc_segs ? tmo : NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__libeth_xdp_set_features);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xdp_set_redirect - toggle the XDP redirect feature</div><div class='add'>+ * @dev: &amp;net_device to configure</div><div class='add'>+ * @enable: whether XDP is enabled</div><div class='add'>+ *</div><div class='add'>+ * Use this when XDPSQs are not always available to dynamically enable</div><div class='add'>+ * and disable redirect feature.</div><div class='add'>+ */</div><div class='add'>+void libeth_xdp_set_redirect(struct net_device *dev, bool enable)</div><div class='add'>+{</div><div class='add'>+	if (enable)</div><div class='add'>+		xdp_features_set_redirect_target(dev, true);</div><div class='add'>+	else</div><div class='add'>+		xdp_features_clear_redirect_target(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xdp_set_redirect);</div><div class='add'>+</div><div class='add'>+/* Module */</div><div class='add'>+</div><div class='add'>+static const struct libeth_xdp_ops xdp_ops __initconst = {</div><div class='add'>+	.bulk	= libeth_xdp_return_buff_bulk,</div><div class='add'>+	.xsk	= libeth_xsk_buff_free_slow,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init libeth_xdp_module_init(void)</div><div class='add'>+{</div><div class='add'>+	libeth_attach_xdp(&amp;xdp_ops);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+module_init(libeth_xdp_module_init);</div><div class='add'>+</div><div class='add'>+static void __exit libeth_xdp_module_exit(void)</div><div class='add'>+{</div><div class='add'>+	libeth_detach_xdp();</div><div class='add'>+}</div><div class='add'>+module_exit(libeth_xdp_module_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Common Ethernet library - XDP infra");</div><div class='add'>+MODULE_IMPORT_NS("LIBETH");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/intel/libeth/xsk.c b/drivers/net/ethernet/intel/libeth/xsk.c<br/>new file mode 100644<br/>index 000000000000..846e902e31b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libeth/xsk.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libeth/xsk.c</a></div><div class='hunk'>@@ -0,0 +1,271 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#define DEFAULT_SYMBOL_NAMESPACE	"LIBETH_XDP"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/libeth/xsk.h&gt;</div><div class='add'>+</div><div class='add'>+#include "priv.h"</div><div class='add'>+</div><div class='add'>+/* ``XDP_TX`` bulking */</div><div class='add'>+</div><div class='add'>+void __cold libeth_xsk_tx_return_bulk(const struct libeth_xdp_tx_frame *bq,</div><div class='add'>+				      u32 count)</div><div class='add'>+{</div><div class='add'>+	for (u32 i = 0; i &lt; count; i++)</div><div class='add'>+		libeth_xsk_buff_free_slow(bq[i].xsk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* XSk TMO */</div><div class='add'>+</div><div class='add'>+const struct xsk_tx_metadata_ops libeth_xsktmo_slow = {</div><div class='add'>+	.tmo_request_checksum		= libeth_xsktmo_req_csum,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Rx polling path */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xsk_buff_free_slow - free an XSk Rx buffer</div><div class='add'>+ * @xdp: buffer to free</div><div class='add'>+ *</div><div class='add'>+ * Slowpath version of xsk_buff_free() to be used on exceptions, cleanups etc.</div><div class='add'>+ * to avoid unwanted inlining.</div><div class='add'>+ */</div><div class='add'>+void libeth_xsk_buff_free_slow(struct libeth_xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	xsk_buff_free(&amp;xdp-&gt;base);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xsk_buff_free_slow);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xsk_buff_add_frag - add frag to XSk Rx buffer</div><div class='add'>+ * @head: head buffer</div><div class='add'>+ * @xdp: frag buffer</div><div class='add'>+ *</div><div class='add'>+ * External helper used by libeth_xsk_process_buff(), do not call directly.</div><div class='add'>+ * Frees both main and frag buffers on error.</div><div class='add'>+ *</div><div class='add'>+ * Return: main buffer with attached frag on success, %NULL on error (no space</div><div class='add'>+ * for a new frag).</div><div class='add'>+ */</div><div class='add'>+struct libeth_xdp_buff *libeth_xsk_buff_add_frag(struct libeth_xdp_buff *head,</div><div class='add'>+						 struct libeth_xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	if (!xsk_buff_add_frag(&amp;head-&gt;base, &amp;xdp-&gt;base))</div><div class='add'>+		goto free;</div><div class='add'>+</div><div class='add'>+	return head;</div><div class='add'>+</div><div class='add'>+free:</div><div class='add'>+	libeth_xsk_buff_free_slow(xdp);</div><div class='add'>+	libeth_xsk_buff_free_slow(head);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xsk_buff_add_frag);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xsk_buff_stats_frags - update onstack RQ stats with XSk frags info</div><div class='add'>+ * @rs: onstack stats to update</div><div class='add'>+ * @xdp: buffer to account</div><div class='add'>+ *</div><div class='add'>+ * External helper used by __libeth_xsk_run_pass(), do not call directly.</div><div class='add'>+ * Adds buffer's frags count and total len to the onstack stats.</div><div class='add'>+ */</div><div class='add'>+void libeth_xsk_buff_stats_frags(struct libeth_rq_napi_stats *rs,</div><div class='add'>+				 const struct libeth_xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	libeth_xdp_buff_stats_frags(rs, xdp);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xsk_buff_stats_frags);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __libeth_xsk_run_prog_slow - process the non-``XDP_REDIRECT`` verdicts</div><div class='add'>+ * @xdp: buffer to process</div><div class='add'>+ * @bq: Tx bulk for queueing on ``XDP_TX``</div><div class='add'>+ * @act: verdict to process</div><div class='add'>+ * @ret: error code if ``XDP_REDIRECT`` failed</div><div class='add'>+ *</div><div class='add'>+ * External helper used by __libeth_xsk_run_prog(), do not call directly.</div><div class='add'>+ * ``XDP_REDIRECT`` is the most common and hottest verdict on XSk, thus</div><div class='add'>+ * it is processed inline. The rest goes here for out-of-line processing,</div><div class='add'>+ * together with redirect errors.</div><div class='add'>+ *</div><div class='add'>+ * Return: libeth_xdp XDP prog verdict.</div><div class='add'>+ */</div><div class='add'>+u32 __libeth_xsk_run_prog_slow(struct libeth_xdp_buff *xdp,</div><div class='add'>+			       const struct libeth_xdp_tx_bulk *bq,</div><div class='add'>+			       enum xdp_action act, int ret)</div><div class='add'>+{</div><div class='add'>+	switch (act) {</div><div class='add'>+	case XDP_DROP:</div><div class='add'>+		xsk_buff_free(&amp;xdp-&gt;base);</div><div class='add'>+</div><div class='add'>+		return LIBETH_XDP_DROP;</div><div class='add'>+	case XDP_TX:</div><div class='add'>+		return LIBETH_XDP_TX;</div><div class='add'>+	case XDP_PASS:</div><div class='add'>+		return LIBETH_XDP_PASS;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return libeth_xdp_prog_exception(bq, xdp, act, ret);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__libeth_xsk_run_prog_slow);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xsk_prog_exception - handle XDP prog exceptions on XSk</div><div class='add'>+ * @xdp: buffer to process</div><div class='add'>+ * @act: verdict returned by the prog</div><div class='add'>+ * @ret: error code if ``XDP_REDIRECT`` failed</div><div class='add'>+ *</div><div class='add'>+ * Internal. Frees the buffer and, if the queue uses XSk wakeups, stop the</div><div class='add'>+ * current NAPI poll when there are no free buffers left.</div><div class='add'>+ *</div><div class='add'>+ * Return: libeth_xdp's XDP prog verdict.</div><div class='add'>+ */</div><div class='add'>+u32 __cold libeth_xsk_prog_exception(struct libeth_xdp_buff *xdp,</div><div class='add'>+				     enum xdp_action act, int ret)</div><div class='add'>+{</div><div class='add'>+	const struct xdp_buff_xsk *xsk;</div><div class='add'>+	u32 __ret = LIBETH_XDP_DROP;</div><div class='add'>+</div><div class='add'>+	if (act != XDP_REDIRECT)</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	xsk = container_of(&amp;xdp-&gt;base, typeof(*xsk), xdp);</div><div class='add'>+	if (xsk_uses_need_wakeup(xsk-&gt;pool) &amp;&amp; ret == -ENOBUFS)</div><div class='add'>+		__ret = LIBETH_XDP_ABORTED;</div><div class='add'>+</div><div class='add'>+drop:</div><div class='add'>+	libeth_xsk_buff_free_slow(xdp);</div><div class='add'>+</div><div class='add'>+	return __ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Refill */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xskfq_create - create an XSkFQ</div><div class='add'>+ * @fq: fill queue to initialize</div><div class='add'>+ *</div><div class='add'>+ * Allocates the FQEs and initializes the fields used by libeth_xdp: number</div><div class='add'>+ * of buffers to refill, refill threshold and buffer len.</div><div class='add'>+ *</div><div class='add'>+ * Return: %0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int libeth_xskfq_create(struct libeth_xskfq *fq)</div><div class='add'>+{</div><div class='add'>+	fq-&gt;fqes = kvcalloc_node(fq-&gt;count, sizeof(*fq-&gt;fqes), GFP_KERNEL,</div><div class='add'>+				 fq-&gt;nid);</div><div class='add'>+	if (!fq-&gt;fqes)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	fq-&gt;pending = fq-&gt;count;</div><div class='add'>+	fq-&gt;thresh = libeth_xdp_queue_threshold(fq-&gt;count);</div><div class='add'>+	fq-&gt;buf_len = xsk_pool_get_rx_frame_size(fq-&gt;pool);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xskfq_create);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xskfq_destroy - destroy an XSkFQ</div><div class='add'>+ * @fq: fill queue to destroy</div><div class='add'>+ *</div><div class='add'>+ * Zeroes the used fields and frees the FQEs array.</div><div class='add'>+ */</div><div class='add'>+void libeth_xskfq_destroy(struct libeth_xskfq *fq)</div><div class='add'>+{</div><div class='add'>+	fq-&gt;buf_len = 0;</div><div class='add'>+	fq-&gt;thresh = 0;</div><div class='add'>+	fq-&gt;pending = 0;</div><div class='add'>+</div><div class='add'>+	kvfree(fq-&gt;fqes);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xskfq_destroy);</div><div class='add'>+</div><div class='add'>+/* .ndo_xsk_wakeup */</div><div class='add'>+</div><div class='add'>+static void libeth_xsk_napi_sched(void *info)</div><div class='add'>+{</div><div class='add'>+	__napi_schedule_irqoff(info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xsk_init_wakeup - initialize libeth XSk wakeup structure</div><div class='add'>+ * @csd: struct to initialize</div><div class='add'>+ * @napi: NAPI corresponding to this queue</div><div class='add'>+ *</div><div class='add'>+ * libeth_xdp uses inter-processor interrupts to perform XSk wakeups. In order</div><div class='add'>+ * to do that, the corresponding CSDs must be initialized when creating the</div><div class='add'>+ * queues.</div><div class='add'>+ */</div><div class='add'>+void libeth_xsk_init_wakeup(call_single_data_t *csd, struct napi_struct *napi)</div><div class='add'>+{</div><div class='add'>+	INIT_CSD(csd, libeth_xsk_napi_sched, napi);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xsk_init_wakeup);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xsk_wakeup - perform an XSk wakeup</div><div class='add'>+ * @csd: CSD corresponding to the queue</div><div class='add'>+ * @qid: the stack queue index</div><div class='add'>+ *</div><div class='add'>+ * Try to mark the NAPI as missed first, so that it could be rescheduled.</div><div class='add'>+ * If it's not, schedule it on the corresponding CPU using IPIs (or directly</div><div class='add'>+ * if already running on it).</div><div class='add'>+ */</div><div class='add'>+void libeth_xsk_wakeup(call_single_data_t *csd, u32 qid)</div><div class='add'>+{</div><div class='add'>+	struct napi_struct *napi = csd-&gt;info;</div><div class='add'>+</div><div class='add'>+	if (napi_if_scheduled_mark_missed(napi) ||</div><div class='add'>+	    unlikely(!napi_schedule_prep(napi)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (unlikely(qid &gt;= nr_cpu_ids))</div><div class='add'>+		qid %= nr_cpu_ids;</div><div class='add'>+</div><div class='add'>+	if (qid != raw_smp_processor_id() &amp;&amp; cpu_online(qid))</div><div class='add'>+		smp_call_function_single_async(qid, csd);</div><div class='add'>+	else</div><div class='add'>+		__napi_schedule(napi);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xsk_wakeup);</div><div class='add'>+</div><div class='add'>+/* Pool setup */</div><div class='add'>+</div><div class='add'>+#define LIBETH_XSK_DMA_ATTR					\</div><div class='add'>+	(DMA_ATTR_WEAK_ORDERING | DMA_ATTR_SKIP_CPU_SYNC)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libeth_xsk_setup_pool - setup or destroy an XSk pool for a queue</div><div class='add'>+ * @dev: target &amp;net_device</div><div class='add'>+ * @qid: stack queue index to configure</div><div class='add'>+ * @enable: whether to enable or disable the pool</div><div class='add'>+ *</div><div class='add'>+ * Check that @qid is valid and then map or unmap the pool.</div><div class='add'>+ *</div><div class='add'>+ * Return: %0 on success, -errno otherwise.</div><div class='add'>+ */</div><div class='add'>+int libeth_xsk_setup_pool(struct net_device *dev, u32 qid, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct xsk_buff_pool *pool;</div><div class='add'>+</div><div class='add'>+	pool = xsk_get_pool_from_qid(dev, qid);</div><div class='add'>+	if (!pool)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		return xsk_pool_dma_map(pool, dev-&gt;dev.parent,</div><div class='add'>+					LIBETH_XSK_DMA_ATTR);</div><div class='add'>+	else</div><div class='add'>+		xsk_pool_dma_unmap(pool, LIBETH_XSK_DMA_ATTR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libeth_xsk_setup_pool);</div><div class='head'>diff --git a/drivers/net/ethernet/intel/libie/Kconfig b/drivers/net/ethernet/intel/libie/Kconfig<br/>index 33aff6bc8f81..70831c7e336e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libie/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libie/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libie/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libie/Kconfig</a></div><div class='hunk'>@@ -8,3 +8,18 @@ config LIBIE</div><div class='ctx'> 	  libie (Intel Ethernet library) is a common library built on top of</div><div class='ctx'> 	  libeth and containing vendor-specific routines shared between several</div><div class='ctx'> 	  Intel Ethernet drivers.</div><div class='add'>+</div><div class='add'>+config LIBIE_ADMINQ</div><div class='add'>+	tristate</div><div class='add'>+	help</div><div class='add'>+	  Helper functions used by Intel Ethernet drivers for administration</div><div class='add'>+	  queue command interface (aka adminq).</div><div class='add'>+</div><div class='add'>+config LIBIE_FWLOG</div><div class='add'>+	tristate</div><div class='add'>+	select LIBIE_ADMINQ</div><div class='add'>+	help</div><div class='add'>+	  Library to support firmware logging on device that have support</div><div class='add'>+	  for it. Firmware logging is using admin queue interface to communicate</div><div class='add'>+	  with the device. Debugfs is a user interface used to config logging</div><div class='add'>+	  and dump all collected logs.</div><div class='head'>diff --git a/drivers/net/ethernet/intel/libie/Makefile b/drivers/net/ethernet/intel/libie/Makefile<br/>index ffd27fab916a..db57fc6780ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libie/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libie/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libie/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libie/Makefile</a></div><div class='hunk'>@@ -4,3 +4,11 @@</div><div class='ctx'> obj-$(CONFIG_LIBIE)	+= libie.o</div><div class='ctx'> </div><div class='ctx'> libie-y			:= rx.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_LIBIE_ADMINQ) 	+= libie_adminq.o</div><div class='add'>+</div><div class='add'>+libie_adminq-y			:= adminq.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_LIBIE_FWLOG) 	+= libie_fwlog.o</div><div class='add'>+</div><div class='add'>+libie_fwlog-y			:= fwlog.o</div><div class='head'>diff --git a/drivers/net/ethernet/intel/libie/adminq.c b/drivers/net/ethernet/intel/libie/adminq.c<br/>new file mode 100644<br/>index 000000000000..7b4ff479e7e5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libie/adminq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libie/adminq.c</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2025 Intel Corporation */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/net/intel/libie/adminq.h&gt;</div><div class='add'>+</div><div class='add'>+static const char * const libie_aq_str_arr[] = {</div><div class='add'>+#define LIBIE_AQ_STR(x)					\</div><div class='add'>+	[LIBIE_AQ_RC_##x]	= "LIBIE_AQ_RC_" #x</div><div class='add'>+	LIBIE_AQ_STR(OK),</div><div class='add'>+	LIBIE_AQ_STR(EPERM),</div><div class='add'>+	LIBIE_AQ_STR(ENOENT),</div><div class='add'>+	LIBIE_AQ_STR(ESRCH),</div><div class='add'>+	LIBIE_AQ_STR(EIO),</div><div class='add'>+	LIBIE_AQ_STR(EAGAIN),</div><div class='add'>+	LIBIE_AQ_STR(ENOMEM),</div><div class='add'>+	LIBIE_AQ_STR(EACCES),</div><div class='add'>+	LIBIE_AQ_STR(EBUSY),</div><div class='add'>+	LIBIE_AQ_STR(EEXIST),</div><div class='add'>+	LIBIE_AQ_STR(EINVAL),</div><div class='add'>+	LIBIE_AQ_STR(ENOSPC),</div><div class='add'>+	LIBIE_AQ_STR(ENOSYS),</div><div class='add'>+	LIBIE_AQ_STR(EMODE),</div><div class='add'>+	LIBIE_AQ_STR(ENOSEC),</div><div class='add'>+	LIBIE_AQ_STR(EBADSIG),</div><div class='add'>+	LIBIE_AQ_STR(ESVN),</div><div class='add'>+	LIBIE_AQ_STR(EBADMAN),</div><div class='add'>+	LIBIE_AQ_STR(EBADBUF),</div><div class='add'>+#undef LIBIE_AQ_STR</div><div class='add'>+	"LIBIE_AQ_RC_UNKNOWN",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define __LIBIE_AQ_STR_NUM (ARRAY_SIZE(libie_aq_str_arr) - 1)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_aq_str - get error string based on aq error</div><div class='add'>+ * @err: admin queue error type</div><div class='add'>+ *</div><div class='add'>+ * Return: error string for passed error code</div><div class='add'>+ */</div><div class='add'>+const char *libie_aq_str(enum libie_aq_err err)</div><div class='add'>+{</div><div class='add'>+	if (err &gt;= ARRAY_SIZE(libie_aq_str_arr) ||</div><div class='add'>+	    !libie_aq_str_arr[err])</div><div class='add'>+		err = __LIBIE_AQ_STR_NUM;</div><div class='add'>+</div><div class='add'>+	return libie_aq_str_arr[err];</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(libie_aq_str, "LIBIE_ADMINQ");</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Intel(R) Ethernet common library - adminq helpers");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/intel/libie/fwlog.c b/drivers/net/ethernet/intel/libie/fwlog.c<br/>new file mode 100644<br/>index 000000000000..f39cc11cb7c5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libie/fwlog.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libie/fwlog.c</a></div><div class='hunk'>@@ -0,0 +1,1115 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2022, Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/net/intel/libie/fwlog.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+</div><div class='add'>+#define DEFAULT_SYMBOL_NAMESPACE	"LIBIE_FWLOG"</div><div class='add'>+</div><div class='add'>+/* create a define that has an extra module that doesn't really exist. this</div><div class='add'>+ * is so we can add a module 'all' to easily enable/disable all the modules</div><div class='add'>+ */</div><div class='add'>+#define LIBIE_NR_FW_LOG_MODULES (LIBIE_AQC_FW_LOG_ID_MAX + 1)</div><div class='add'>+</div><div class='add'>+/* the ordering in this array is important. it matches the ordering of the</div><div class='add'>+ * values in the FW so the index is the same value as in</div><div class='add'>+ * libie_aqc_fw_logging_mod</div><div class='add'>+ */</div><div class='add'>+static const char * const libie_fwlog_module_string[] = {</div><div class='add'>+	"general",</div><div class='add'>+	"ctrl",</div><div class='add'>+	"link",</div><div class='add'>+	"link_topo",</div><div class='add'>+	"dnl",</div><div class='add'>+	"i2c",</div><div class='add'>+	"sdp",</div><div class='add'>+	"mdio",</div><div class='add'>+	"adminq",</div><div class='add'>+	"hdma",</div><div class='add'>+	"lldp",</div><div class='add'>+	"dcbx",</div><div class='add'>+	"dcb",</div><div class='add'>+	"xlr",</div><div class='add'>+	"nvm",</div><div class='add'>+	"auth",</div><div class='add'>+	"vpd",</div><div class='add'>+	"iosf",</div><div class='add'>+	"parser",</div><div class='add'>+	"sw",</div><div class='add'>+	"scheduler",</div><div class='add'>+	"txq",</div><div class='add'>+	"rsvd",</div><div class='add'>+	"post",</div><div class='add'>+	"watchdog",</div><div class='add'>+	"task_dispatch",</div><div class='add'>+	"mng",</div><div class='add'>+	"synce",</div><div class='add'>+	"health",</div><div class='add'>+	"tsdrv",</div><div class='add'>+	"pfreg",</div><div class='add'>+	"mdlver",</div><div class='add'>+	"all",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* the ordering in this array is important. it matches the ordering of the</div><div class='add'>+ * values in the FW so the index is the same value as in libie_fwlog_level</div><div class='add'>+ */</div><div class='add'>+static const char * const libie_fwlog_level_string[] = {</div><div class='add'>+	"none",</div><div class='add'>+	"error",</div><div class='add'>+	"warning",</div><div class='add'>+	"normal",</div><div class='add'>+	"verbose",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const libie_fwlog_log_size[] = {</div><div class='add'>+	"128K",</div><div class='add'>+	"256K",</div><div class='add'>+	"512K",</div><div class='add'>+	"1M",</div><div class='add'>+	"2M",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool libie_fwlog_ring_empty(struct libie_fwlog_ring *rings)</div><div class='add'>+{</div><div class='add'>+	return rings-&gt;head == rings-&gt;tail;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void libie_fwlog_ring_increment(u16 *item, u16 size)</div><div class='add'>+{</div><div class='add'>+	*item = (*item + 1) &amp; (size - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int libie_fwlog_alloc_ring_buffs(struct libie_fwlog_ring *rings)</div><div class='add'>+{</div><div class='add'>+	int i, nr_bytes;</div><div class='add'>+	u8 *mem;</div><div class='add'>+</div><div class='add'>+	nr_bytes = rings-&gt;size * LIBIE_AQ_MAX_BUF_LEN;</div><div class='add'>+	mem = vzalloc(nr_bytes);</div><div class='add'>+	if (!mem)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; rings-&gt;size; i++) {</div><div class='add'>+		struct libie_fwlog_data *ring = &amp;rings-&gt;rings[i];</div><div class='add'>+</div><div class='add'>+		ring-&gt;data_size = LIBIE_AQ_MAX_BUF_LEN;</div><div class='add'>+		ring-&gt;data = mem;</div><div class='add'>+		mem += LIBIE_AQ_MAX_BUF_LEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void libie_fwlog_free_ring_buffs(struct libie_fwlog_ring *rings)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; rings-&gt;size; i++) {</div><div class='add'>+		struct libie_fwlog_data *ring = &amp;rings-&gt;rings[i];</div><div class='add'>+</div><div class='add'>+		/* the first ring is the base memory for the whole range so</div><div class='add'>+		 * free it</div><div class='add'>+		 */</div><div class='add'>+		if (!i)</div><div class='add'>+			vfree(ring-&gt;data);</div><div class='add'>+</div><div class='add'>+		ring-&gt;data = NULL;</div><div class='add'>+		ring-&gt;data_size = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define LIBIE_FWLOG_INDEX_TO_BYTES(n) ((128 * 1024) &lt;&lt; (n))</div><div class='add'>+/**</div><div class='add'>+ * libie_fwlog_realloc_rings - reallocate the FW log rings</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ * @index: the new index to use to allocate memory for the log data</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static void libie_fwlog_realloc_rings(struct libie_fwlog *fwlog, int index)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog_ring ring;</div><div class='add'>+	int status, ring_size;</div><div class='add'>+</div><div class='add'>+	/* convert the number of bytes into a number of 4K buffers. externally</div><div class='add'>+	 * the driver presents the interface to the FW log data as a number of</div><div class='add'>+	 * bytes because that's easy for users to understand. internally the</div><div class='add'>+	 * driver uses a ring of buffers because the driver doesn't know where</div><div class='add'>+	 * the beginning and end of any line of log data is so the driver has</div><div class='add'>+	 * to overwrite data as complete blocks. when the data is returned to</div><div class='add'>+	 * the user the driver knows that the data is correct and the FW log</div><div class='add'>+	 * can be correctly parsed by the tools</div><div class='add'>+	 */</div><div class='add'>+	ring_size = LIBIE_FWLOG_INDEX_TO_BYTES(index) / LIBIE_AQ_MAX_BUF_LEN;</div><div class='add'>+	if (ring_size == fwlog-&gt;ring.size)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* allocate space for the new rings and buffers then release the</div><div class='add'>+	 * old rings and buffers. that way if we don't have enough</div><div class='add'>+	 * memory then we at least have what we had before</div><div class='add'>+	 */</div><div class='add'>+	ring.rings = kcalloc(ring_size, sizeof(*ring.rings), GFP_KERNEL);</div><div class='add'>+	if (!ring.rings)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ring.size = ring_size;</div><div class='add'>+</div><div class='add'>+	status = libie_fwlog_alloc_ring_buffs(&amp;ring);</div><div class='add'>+	if (status) {</div><div class='add'>+		dev_warn(&amp;fwlog-&gt;pdev-&gt;dev, "Unable to allocate memory for FW log ring data buffers\n");</div><div class='add'>+		libie_fwlog_free_ring_buffs(&amp;ring);</div><div class='add'>+		kfree(ring.rings);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	libie_fwlog_free_ring_buffs(&amp;fwlog-&gt;ring);</div><div class='add'>+	kfree(fwlog-&gt;ring.rings);</div><div class='add'>+</div><div class='add'>+	fwlog-&gt;ring.rings = ring.rings;</div><div class='add'>+	fwlog-&gt;ring.size = ring.size;</div><div class='add'>+	fwlog-&gt;ring.index = index;</div><div class='add'>+	fwlog-&gt;ring.head = 0;</div><div class='add'>+	fwlog-&gt;ring.tail = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_fwlog_supported - Cached for whether FW supports FW logging or not</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ *</div><div class='add'>+ * This will always return false if called before libie_init_hw(), so it must be</div><div class='add'>+ * called after libie_init_hw().</div><div class='add'>+ */</div><div class='add'>+static bool libie_fwlog_supported(struct libie_fwlog *fwlog)</div><div class='add'>+{</div><div class='add'>+	return fwlog-&gt;supported;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_aq_fwlog_set - Set FW logging configuration AQ command (0xFF30)</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ * @entries: entries to configure</div><div class='add'>+ * @num_entries: number of @entries</div><div class='add'>+ * @options: options from libie_fwlog_cfg-&gt;options structure</div><div class='add'>+ * @log_resolution: logging resolution</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+libie_aq_fwlog_set(struct libie_fwlog *fwlog,</div><div class='add'>+		   struct libie_fwlog_module_entry *entries, u16 num_entries,</div><div class='add'>+		   u16 options, u16 log_resolution)</div><div class='add'>+{</div><div class='add'>+	struct libie_aqc_fw_log_cfg_resp *fw_modules;</div><div class='add'>+	struct libie_aq_desc desc = {0};</div><div class='add'>+	struct libie_aqc_fw_log *cmd;</div><div class='add'>+	int status;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	fw_modules = kcalloc(num_entries, sizeof(*fw_modules), GFP_KERNEL);</div><div class='add'>+	if (!fw_modules)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_entries; i++) {</div><div class='add'>+		fw_modules[i].module_identifier =</div><div class='add'>+			cpu_to_le16(entries[i].module_id);</div><div class='add'>+		fw_modules[i].log_level = entries[i].log_level;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	desc.opcode = cpu_to_le16(libie_aqc_opc_fw_logs_config);</div><div class='add'>+	desc.flags = cpu_to_le16(LIBIE_AQ_FLAG_SI) |</div><div class='add'>+		     cpu_to_le16(LIBIE_AQ_FLAG_RD);</div><div class='add'>+</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;cmd_flags = LIBIE_AQC_FW_LOG_CONF_SET_VALID;</div><div class='add'>+	cmd-&gt;ops.cfg.log_resolution = cpu_to_le16(log_resolution);</div><div class='add'>+	cmd-&gt;ops.cfg.mdl_cnt = cpu_to_le16(num_entries);</div><div class='add'>+</div><div class='add'>+	if (options &amp; LIBIE_FWLOG_OPTION_ARQ_ENA)</div><div class='add'>+		cmd-&gt;cmd_flags |= LIBIE_AQC_FW_LOG_CONF_AQ_EN;</div><div class='add'>+	if (options &amp; LIBIE_FWLOG_OPTION_UART_ENA)</div><div class='add'>+		cmd-&gt;cmd_flags |= LIBIE_AQC_FW_LOG_CONF_UART_EN;</div><div class='add'>+</div><div class='add'>+	status = fwlog-&gt;send_cmd(fwlog-&gt;priv, &amp;desc, fw_modules,</div><div class='add'>+				 sizeof(*fw_modules) * num_entries);</div><div class='add'>+</div><div class='add'>+	kfree(fw_modules);</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_fwlog_set - Set the firmware logging settings</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ * @cfg: config used to set firmware logging</div><div class='add'>+ *</div><div class='add'>+ * This function should be called whenever the driver needs to set the firmware</div><div class='add'>+ * logging configuration. It can be called on initialization, reset, or during</div><div class='add'>+ * runtime.</div><div class='add'>+ *</div><div class='add'>+ * If the PF wishes to receive FW logging then it must register via</div><div class='add'>+ * libie_fwlog_register. Note, that libie_fwlog_register does not need to be called</div><div class='add'>+ * for init.</div><div class='add'>+ */</div><div class='add'>+static int libie_fwlog_set(struct libie_fwlog *fwlog,</div><div class='add'>+			   struct libie_fwlog_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	if (!libie_fwlog_supported(fwlog))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return libie_aq_fwlog_set(fwlog, cfg-&gt;module_entries,</div><div class='add'>+				LIBIE_AQC_FW_LOG_ID_MAX, cfg-&gt;options,</div><div class='add'>+				cfg-&gt;log_resolution);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_aq_fwlog_register - Register PF for firmware logging events (0xFF31)</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ * @reg: true to register and false to unregister</div><div class='add'>+ */</div><div class='add'>+static int libie_aq_fwlog_register(struct libie_fwlog *fwlog, bool reg)</div><div class='add'>+{</div><div class='add'>+	struct libie_aq_desc desc = {0};</div><div class='add'>+	struct libie_aqc_fw_log *cmd;</div><div class='add'>+</div><div class='add'>+	desc.opcode = cpu_to_le16(libie_aqc_opc_fw_logs_register);</div><div class='add'>+	desc.flags = cpu_to_le16(LIBIE_AQ_FLAG_SI);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	if (reg)</div><div class='add'>+		cmd-&gt;cmd_flags = LIBIE_AQC_FW_LOG_AQ_REGISTER;</div><div class='add'>+</div><div class='add'>+	return fwlog-&gt;send_cmd(fwlog-&gt;priv, &amp;desc, NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_fwlog_register - Register the PF for firmware logging</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ *</div><div class='add'>+ * After this call the PF will start to receive firmware logging based on the</div><div class='add'>+ * configuration set in libie_fwlog_set.</div><div class='add'>+ */</div><div class='add'>+static int libie_fwlog_register(struct libie_fwlog *fwlog)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	if (!libie_fwlog_supported(fwlog))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	status = libie_aq_fwlog_register(fwlog, true);</div><div class='add'>+	if (status)</div><div class='add'>+		dev_dbg(&amp;fwlog-&gt;pdev-&gt;dev, "Failed to register for firmware logging events over ARQ\n");</div><div class='add'>+	else</div><div class='add'>+		fwlog-&gt;cfg.options |= LIBIE_FWLOG_OPTION_IS_REGISTERED;</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_fwlog_unregister - Unregister the PF from firmware logging</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ */</div><div class='add'>+static int libie_fwlog_unregister(struct libie_fwlog *fwlog)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	if (!libie_fwlog_supported(fwlog))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	status = libie_aq_fwlog_register(fwlog, false);</div><div class='add'>+	if (status)</div><div class='add'>+		dev_dbg(&amp;fwlog-&gt;pdev-&gt;dev, "Failed to unregister from firmware logging events over ARQ\n");</div><div class='add'>+	else</div><div class='add'>+		fwlog-&gt;cfg.options &amp;= ~LIBIE_FWLOG_OPTION_IS_REGISTERED;</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_fwlog_print_module_cfg - print current FW logging module configuration</div><div class='add'>+ * @cfg: pointer to the fwlog cfg structure</div><div class='add'>+ * @module: module to print</div><div class='add'>+ * @s: the seq file to put data into</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+libie_fwlog_print_module_cfg(struct libie_fwlog_cfg *cfg, int module,</div><div class='add'>+			     struct seq_file *s)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog_module_entry *entry;</div><div class='add'>+</div><div class='add'>+	if (module != LIBIE_AQC_FW_LOG_ID_MAX) {</div><div class='add'>+		entry =	&amp;cfg-&gt;module_entries[module];</div><div class='add'>+</div><div class='add'>+		seq_printf(s, "\tModule: %s, Log Level: %s\n",</div><div class='add'>+			   libie_fwlog_module_string[entry-&gt;module_id],</div><div class='add'>+			   libie_fwlog_level_string[entry-&gt;log_level]);</div><div class='add'>+	} else {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; LIBIE_AQC_FW_LOG_ID_MAX; i++) {</div><div class='add'>+			entry =	&amp;cfg-&gt;module_entries[i];</div><div class='add'>+</div><div class='add'>+			seq_printf(s, "\tModule: %s, Log Level: %s\n",</div><div class='add'>+				   libie_fwlog_module_string[entry-&gt;module_id],</div><div class='add'>+				   libie_fwlog_level_string[entry-&gt;log_level]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int libie_find_module_by_dentry(struct dentry **modules, struct dentry *d)</div><div class='add'>+{</div><div class='add'>+	int i, module;</div><div class='add'>+</div><div class='add'>+	module = -1;</div><div class='add'>+	/* find the module based on the dentry */</div><div class='add'>+	for (i = 0; i &lt; LIBIE_NR_FW_LOG_MODULES; i++) {</div><div class='add'>+		if (d == modules[i]) {</div><div class='add'>+			module = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return module;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_module_show - read from 'module' file</div><div class='add'>+ * @s: the opened file</div><div class='add'>+ * @v: pointer to the offset</div><div class='add'>+ */</div><div class='add'>+static int libie_debugfs_module_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog *fwlog = s-&gt;private;</div><div class='add'>+	const struct file *filp = s-&gt;file;</div><div class='add'>+	struct dentry *dentry;</div><div class='add'>+	int module;</div><div class='add'>+</div><div class='add'>+	dentry = file_dentry(filp);</div><div class='add'>+</div><div class='add'>+	module = libie_find_module_by_dentry(fwlog-&gt;debugfs_modules, dentry);</div><div class='add'>+	if (module &lt; 0) {</div><div class='add'>+		dev_info(&amp;fwlog-&gt;pdev-&gt;dev, "unknown module\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	libie_fwlog_print_module_cfg(&amp;fwlog-&gt;cfg, module, s);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int libie_debugfs_module_open(struct inode *inode, struct file *filp)</div><div class='add'>+{</div><div class='add'>+	return single_open(filp, libie_debugfs_module_show, inode-&gt;i_private);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_module_write - write into 'module' file</div><div class='add'>+ * @filp: the opened file</div><div class='add'>+ * @buf: where to find the user's data</div><div class='add'>+ * @count: the length of the user's data</div><div class='add'>+ * @ppos: file position offset</div><div class='add'>+ */</div><div class='add'>+static ssize_t</div><div class='add'>+libie_debugfs_module_write(struct file *filp, const char __user *buf,</div><div class='add'>+			   size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog *fwlog = file_inode(filp)-&gt;i_private;</div><div class='add'>+	struct dentry *dentry = file_dentry(filp);</div><div class='add'>+	struct device *dev = &amp;fwlog-&gt;pdev-&gt;dev;</div><div class='add'>+	char user_val[16], *cmd_buf;</div><div class='add'>+	int module, log_level, cnt;</div><div class='add'>+</div><div class='add'>+	/* don't allow partial writes or invalid input */</div><div class='add'>+	if (*ppos != 0 || count &gt; 8)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmd_buf = memdup_user_nul(buf, count);</div><div class='add'>+	if (IS_ERR(cmd_buf))</div><div class='add'>+		return PTR_ERR(cmd_buf);</div><div class='add'>+</div><div class='add'>+	module = libie_find_module_by_dentry(fwlog-&gt;debugfs_modules, dentry);</div><div class='add'>+	if (module &lt; 0) {</div><div class='add'>+		dev_info(dev, "unknown module\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cnt = sscanf(cmd_buf, "%s", user_val);</div><div class='add'>+	if (cnt != 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	log_level = sysfs_match_string(libie_fwlog_level_string, user_val);</div><div class='add'>+	if (log_level &lt; 0) {</div><div class='add'>+		dev_info(dev, "unknown log level '%s'\n", user_val);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (module != LIBIE_AQC_FW_LOG_ID_MAX) {</div><div class='add'>+		fwlog-&gt;cfg.module_entries[module].log_level = log_level;</div><div class='add'>+	} else {</div><div class='add'>+		/* the module 'all' is a shortcut so that we can set</div><div class='add'>+		 * all of the modules to the same level quickly</div><div class='add'>+		 */</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; LIBIE_AQC_FW_LOG_ID_MAX; i++)</div><div class='add'>+			fwlog-&gt;cfg.module_entries[i].log_level = log_level;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations libie_debugfs_module_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open  = libie_debugfs_module_open,</div><div class='add'>+	.read = seq_read,</div><div class='add'>+	.release = single_release,</div><div class='add'>+	.write = libie_debugfs_module_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_nr_messages_read - read from 'nr_messages' file</div><div class='add'>+ * @filp: the opened file</div><div class='add'>+ * @buffer: where to write the data for the user to read</div><div class='add'>+ * @count: the size of the user's buffer</div><div class='add'>+ * @ppos: file position offset</div><div class='add'>+ */</div><div class='add'>+static ssize_t libie_debugfs_nr_messages_read(struct file *filp,</div><div class='add'>+					      char __user *buffer, size_t count,</div><div class='add'>+					      loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog *fwlog = filp-&gt;private_data;</div><div class='add'>+	char buff[32] = {};</div><div class='add'>+</div><div class='add'>+	snprintf(buff, sizeof(buff), "%d\n",</div><div class='add'>+		 fwlog-&gt;cfg.log_resolution);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_nr_messages_write - write into 'nr_messages' file</div><div class='add'>+ * @filp: the opened file</div><div class='add'>+ * @buf: where to find the user's data</div><div class='add'>+ * @count: the length of the user's data</div><div class='add'>+ * @ppos: file position offset</div><div class='add'>+ */</div><div class='add'>+static ssize_t</div><div class='add'>+libie_debugfs_nr_messages_write(struct file *filp, const char __user *buf,</div><div class='add'>+				size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog *fwlog = filp-&gt;private_data;</div><div class='add'>+	struct device *dev = &amp;fwlog-&gt;pdev-&gt;dev;</div><div class='add'>+	char user_val[8], *cmd_buf;</div><div class='add'>+	s16 nr_messages;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	/* don't allow partial writes or invalid input */</div><div class='add'>+	if (*ppos != 0 || count &gt; 4)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmd_buf = memdup_user_nul(buf, count);</div><div class='add'>+	if (IS_ERR(cmd_buf))</div><div class='add'>+		return PTR_ERR(cmd_buf);</div><div class='add'>+</div><div class='add'>+	ret = sscanf(cmd_buf, "%s", user_val);</div><div class='add'>+	if (ret != 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = kstrtos16(user_val, 0, &amp;nr_messages);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (nr_messages &lt; LIBIE_AQC_FW_LOG_MIN_RESOLUTION ||</div><div class='add'>+	    nr_messages &gt; LIBIE_AQC_FW_LOG_MAX_RESOLUTION) {</div><div class='add'>+		dev_err(dev, "Invalid FW log number of messages %d, value must be between %d - %d\n",</div><div class='add'>+			nr_messages, LIBIE_AQC_FW_LOG_MIN_RESOLUTION,</div><div class='add'>+			LIBIE_AQC_FW_LOG_MAX_RESOLUTION);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fwlog-&gt;cfg.log_resolution = nr_messages;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations libie_debugfs_nr_messages_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open  = simple_open,</div><div class='add'>+	.read = libie_debugfs_nr_messages_read,</div><div class='add'>+	.write = libie_debugfs_nr_messages_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_enable_read - read from 'enable' file</div><div class='add'>+ * @filp: the opened file</div><div class='add'>+ * @buffer: where to write the data for the user to read</div><div class='add'>+ * @count: the size of the user's buffer</div><div class='add'>+ * @ppos: file position offset</div><div class='add'>+ */</div><div class='add'>+static ssize_t libie_debugfs_enable_read(struct file *filp,</div><div class='add'>+					 char __user *buffer, size_t count,</div><div class='add'>+					 loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog *fwlog = filp-&gt;private_data;</div><div class='add'>+	char buff[32] = {};</div><div class='add'>+</div><div class='add'>+	snprintf(buff, sizeof(buff), "%u\n",</div><div class='add'>+		 (u16)(fwlog-&gt;cfg.options &amp;</div><div class='add'>+		 LIBIE_FWLOG_OPTION_IS_REGISTERED) &gt;&gt; 3);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_enable_write - write into 'enable' file</div><div class='add'>+ * @filp: the opened file</div><div class='add'>+ * @buf: where to find the user's data</div><div class='add'>+ * @count: the length of the user's data</div><div class='add'>+ * @ppos: file position offset</div><div class='add'>+ */</div><div class='add'>+static ssize_t</div><div class='add'>+libie_debugfs_enable_write(struct file *filp, const char __user *buf,</div><div class='add'>+			   size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog *fwlog = filp-&gt;private_data;</div><div class='add'>+	char user_val[8], *cmd_buf;</div><div class='add'>+	bool enable;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	/* don't allow partial writes or invalid input */</div><div class='add'>+	if (*ppos != 0 || count &gt; 2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmd_buf = memdup_user_nul(buf, count);</div><div class='add'>+	if (IS_ERR(cmd_buf))</div><div class='add'>+		return PTR_ERR(cmd_buf);</div><div class='add'>+</div><div class='add'>+	ret = sscanf(cmd_buf, "%s", user_val);</div><div class='add'>+	if (ret != 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = kstrtobool(user_val, &amp;enable);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto enable_write_error;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		fwlog-&gt;cfg.options |= LIBIE_FWLOG_OPTION_ARQ_ENA;</div><div class='add'>+	else</div><div class='add'>+		fwlog-&gt;cfg.options &amp;= ~LIBIE_FWLOG_OPTION_ARQ_ENA;</div><div class='add'>+</div><div class='add'>+	ret = libie_fwlog_set(fwlog, &amp;fwlog-&gt;cfg);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto enable_write_error;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		ret = libie_fwlog_register(fwlog);</div><div class='add'>+	else</div><div class='add'>+		ret = libie_fwlog_unregister(fwlog);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		goto enable_write_error;</div><div class='add'>+</div><div class='add'>+	/* if we get here, nothing went wrong; return count since we didn't</div><div class='add'>+	 * really write anything</div><div class='add'>+	 */</div><div class='add'>+	ret = (ssize_t)count;</div><div class='add'>+</div><div class='add'>+enable_write_error:</div><div class='add'>+	/* This function always consumes all of the written input, or produces</div><div class='add'>+	 * an error. Check and enforce this. Otherwise, the write operation</div><div class='add'>+	 * won't complete properly.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON(ret != (ssize_t)count &amp;&amp; ret &gt;= 0))</div><div class='add'>+		ret = -EIO;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations libie_debugfs_enable_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open  = simple_open,</div><div class='add'>+	.read = libie_debugfs_enable_read,</div><div class='add'>+	.write = libie_debugfs_enable_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_log_size_read - read from 'log_size' file</div><div class='add'>+ * @filp: the opened file</div><div class='add'>+ * @buffer: where to write the data for the user to read</div><div class='add'>+ * @count: the size of the user's buffer</div><div class='add'>+ * @ppos: file position offset</div><div class='add'>+ */</div><div class='add'>+static ssize_t libie_debugfs_log_size_read(struct file *filp,</div><div class='add'>+					   char __user *buffer, size_t count,</div><div class='add'>+					   loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog *fwlog = filp-&gt;private_data;</div><div class='add'>+	char buff[32] = {};</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	index = fwlog-&gt;ring.index;</div><div class='add'>+	snprintf(buff, sizeof(buff), "%s\n", libie_fwlog_log_size[index]);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(buffer, count, ppos, buff, strlen(buff));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_log_size_write - write into 'log_size' file</div><div class='add'>+ * @filp: the opened file</div><div class='add'>+ * @buf: where to find the user's data</div><div class='add'>+ * @count: the length of the user's data</div><div class='add'>+ * @ppos: file position offset</div><div class='add'>+ */</div><div class='add'>+static ssize_t</div><div class='add'>+libie_debugfs_log_size_write(struct file *filp, const char __user *buf,</div><div class='add'>+			     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog *fwlog = filp-&gt;private_data;</div><div class='add'>+	struct device *dev = &amp;fwlog-&gt;pdev-&gt;dev;</div><div class='add'>+	char user_val[8], *cmd_buf;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	/* don't allow partial writes or invalid input */</div><div class='add'>+	if (*ppos != 0 || count &gt; 5)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmd_buf = memdup_user_nul(buf, count);</div><div class='add'>+	if (IS_ERR(cmd_buf))</div><div class='add'>+		return PTR_ERR(cmd_buf);</div><div class='add'>+</div><div class='add'>+	ret = sscanf(cmd_buf, "%s", user_val);</div><div class='add'>+	if (ret != 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	index = sysfs_match_string(libie_fwlog_log_size, user_val);</div><div class='add'>+	if (index &lt; 0) {</div><div class='add'>+		dev_info(dev, "Invalid log size '%s'. The value must be one of 128K, 256K, 512K, 1M, 2M\n",</div><div class='add'>+			 user_val);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto log_size_write_error;</div><div class='add'>+	} else if (fwlog-&gt;cfg.options &amp; LIBIE_FWLOG_OPTION_IS_REGISTERED) {</div><div class='add'>+		dev_info(dev, "FW logging is currently running. Please disable FW logging to change log_size\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto log_size_write_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* free all the buffers and the tracking info and resize */</div><div class='add'>+	libie_fwlog_realloc_rings(fwlog, index);</div><div class='add'>+</div><div class='add'>+	/* if we get here, nothing went wrong; return count since we didn't</div><div class='add'>+	 * really write anything</div><div class='add'>+	 */</div><div class='add'>+	ret = (ssize_t)count;</div><div class='add'>+</div><div class='add'>+log_size_write_error:</div><div class='add'>+	/* This function always consumes all of the written input, or produces</div><div class='add'>+	 * an error. Check and enforce this. Otherwise, the write operation</div><div class='add'>+	 * won't complete properly.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON(ret != (ssize_t)count &amp;&amp; ret &gt;= 0))</div><div class='add'>+		ret = -EIO;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations libie_debugfs_log_size_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open  = simple_open,</div><div class='add'>+	.read = libie_debugfs_log_size_read,</div><div class='add'>+	.write = libie_debugfs_log_size_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_data_read - read from 'data' file</div><div class='add'>+ * @filp: the opened file</div><div class='add'>+ * @buffer: where to write the data for the user to read</div><div class='add'>+ * @count: the size of the user's buffer</div><div class='add'>+ * @ppos: file position offset</div><div class='add'>+ */</div><div class='add'>+static ssize_t libie_debugfs_data_read(struct file *filp, char __user *buffer,</div><div class='add'>+				       size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog *fwlog = filp-&gt;private_data;</div><div class='add'>+	int data_copied = 0;</div><div class='add'>+	bool done = false;</div><div class='add'>+</div><div class='add'>+	if (libie_fwlog_ring_empty(&amp;fwlog-&gt;ring))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	while (!libie_fwlog_ring_empty(&amp;fwlog-&gt;ring) &amp;&amp; !done) {</div><div class='add'>+		struct libie_fwlog_data *log;</div><div class='add'>+		u16 cur_buf_len;</div><div class='add'>+</div><div class='add'>+		log = &amp;fwlog-&gt;ring.rings[fwlog-&gt;ring.head];</div><div class='add'>+		cur_buf_len = log-&gt;data_size;</div><div class='add'>+		if (cur_buf_len &gt;= count) {</div><div class='add'>+			done = true;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (copy_to_user(buffer, log-&gt;data, cur_buf_len)) {</div><div class='add'>+			/* if there is an error then bail and return whatever</div><div class='add'>+			 * the driver has copied so far</div><div class='add'>+			 */</div><div class='add'>+			done = true;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		data_copied += cur_buf_len;</div><div class='add'>+		buffer += cur_buf_len;</div><div class='add'>+		count -= cur_buf_len;</div><div class='add'>+		*ppos += cur_buf_len;</div><div class='add'>+		libie_fwlog_ring_increment(&amp;fwlog-&gt;ring.head, fwlog-&gt;ring.size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return data_copied;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_data_write - write into 'data' file</div><div class='add'>+ * @filp: the opened file</div><div class='add'>+ * @buf: where to find the user's data</div><div class='add'>+ * @count: the length of the user's data</div><div class='add'>+ * @ppos: file position offset</div><div class='add'>+ */</div><div class='add'>+static ssize_t</div><div class='add'>+libie_debugfs_data_write(struct file *filp, const char __user *buf, size_t count,</div><div class='add'>+			 loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog *fwlog = filp-&gt;private_data;</div><div class='add'>+	struct device *dev = &amp;fwlog-&gt;pdev-&gt;dev;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	/* don't allow partial writes */</div><div class='add'>+	if (*ppos != 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* any value is allowed to clear the buffer so no need to even look at</div><div class='add'>+	 * what the value is</div><div class='add'>+	 */</div><div class='add'>+	if (!(fwlog-&gt;cfg.options &amp; LIBIE_FWLOG_OPTION_IS_REGISTERED)) {</div><div class='add'>+		fwlog-&gt;ring.head = 0;</div><div class='add'>+		fwlog-&gt;ring.tail = 0;</div><div class='add'>+	} else {</div><div class='add'>+		dev_info(dev, "Can't clear FW log data while FW log running\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto nr_buffs_write_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* if we get here, nothing went wrong; return count since we didn't</div><div class='add'>+	 * really write anything</div><div class='add'>+	 */</div><div class='add'>+	ret = (ssize_t)count;</div><div class='add'>+</div><div class='add'>+nr_buffs_write_error:</div><div class='add'>+	/* This function always consumes all of the written input, or produces</div><div class='add'>+	 * an error. Check and enforce this. Otherwise, the write operation</div><div class='add'>+	 * won't complete properly.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON(ret != (ssize_t)count &amp;&amp; ret &gt;= 0))</div><div class='add'>+		ret = -EIO;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations libie_debugfs_data_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open  = simple_open,</div><div class='add'>+	.read = libie_debugfs_data_read,</div><div class='add'>+	.write = libie_debugfs_data_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_debugfs_fwlog_init - setup the debugfs directory</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ * @root: debugfs root entry on which fwlog director will be registered</div><div class='add'>+ */</div><div class='add'>+static void libie_debugfs_fwlog_init(struct libie_fwlog *fwlog,</div><div class='add'>+				     struct dentry *root)</div><div class='add'>+{</div><div class='add'>+	struct dentry *fw_modules_dir;</div><div class='add'>+	struct dentry **fw_modules;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* allocate space for this first because if it fails then we don't</div><div class='add'>+	 * need to unwind</div><div class='add'>+	 */</div><div class='add'>+	fw_modules = kcalloc(LIBIE_NR_FW_LOG_MODULES, sizeof(*fw_modules),</div><div class='add'>+			     GFP_KERNEL);</div><div class='add'>+	if (!fw_modules)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fwlog-&gt;debugfs = debugfs_create_dir("fwlog", root);</div><div class='add'>+	if (IS_ERR(fwlog-&gt;debugfs))</div><div class='add'>+		goto err_create_module_files;</div><div class='add'>+</div><div class='add'>+	fw_modules_dir = debugfs_create_dir("modules", fwlog-&gt;debugfs);</div><div class='add'>+	if (IS_ERR(fw_modules_dir))</div><div class='add'>+		goto err_create_module_files;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; LIBIE_NR_FW_LOG_MODULES; i++) {</div><div class='add'>+		fw_modules[i] = debugfs_create_file(libie_fwlog_module_string[i],</div><div class='add'>+						    0600, fw_modules_dir, fwlog,</div><div class='add'>+						    &amp;libie_debugfs_module_fops);</div><div class='add'>+		if (IS_ERR(fw_modules[i]))</div><div class='add'>+			goto err_create_module_files;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("nr_messages", 0600, fwlog-&gt;debugfs, fwlog,</div><div class='add'>+			    &amp;libie_debugfs_nr_messages_fops);</div><div class='add'>+</div><div class='add'>+	fwlog-&gt;debugfs_modules = fw_modules;</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("enable", 0600, fwlog-&gt;debugfs, fwlog,</div><div class='add'>+			    &amp;libie_debugfs_enable_fops);</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("log_size", 0600, fwlog-&gt;debugfs, fwlog,</div><div class='add'>+			    &amp;libie_debugfs_log_size_fops);</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("data", 0600, fwlog-&gt;debugfs, fwlog,</div><div class='add'>+			    &amp;libie_debugfs_data_fops);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_create_module_files:</div><div class='add'>+	debugfs_remove_recursive(fwlog-&gt;debugfs);</div><div class='add'>+	kfree(fw_modules);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool libie_fwlog_ring_full(struct libie_fwlog_ring *rings)</div><div class='add'>+{</div><div class='add'>+	u16 head, tail;</div><div class='add'>+</div><div class='add'>+	head = rings-&gt;head;</div><div class='add'>+	tail = rings-&gt;tail;</div><div class='add'>+</div><div class='add'>+	if (head &lt; tail &amp;&amp; (tail - head == (rings-&gt;size - 1)))</div><div class='add'>+		return true;</div><div class='add'>+	else if (head &gt; tail &amp;&amp; (tail == (head - 1)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_aq_fwlog_get - Get the current firmware logging configuration (0xFF32)</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ * @cfg: firmware logging configuration to populate</div><div class='add'>+ */</div><div class='add'>+static int libie_aq_fwlog_get(struct libie_fwlog *fwlog,</div><div class='add'>+			      struct libie_fwlog_cfg *cfg)</div><div class='add'>+{</div><div class='add'>+	struct libie_aqc_fw_log_cfg_resp *fw_modules;</div><div class='add'>+	struct libie_aq_desc desc = {0};</div><div class='add'>+	struct libie_aqc_fw_log *cmd;</div><div class='add'>+	u16 module_id_cnt;</div><div class='add'>+	int status;</div><div class='add'>+	void *buf;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	memset(cfg, 0, sizeof(*cfg));</div><div class='add'>+</div><div class='add'>+	buf = kzalloc(LIBIE_AQ_MAX_BUF_LEN, GFP_KERNEL);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	desc.opcode = cpu_to_le16(libie_aqc_opc_fw_logs_query);</div><div class='add'>+	desc.flags = cpu_to_le16(LIBIE_AQ_FLAG_SI);</div><div class='add'>+	cmd = libie_aq_raw(&amp;desc);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;cmd_flags = LIBIE_AQC_FW_LOG_AQ_QUERY;</div><div class='add'>+</div><div class='add'>+	status = fwlog-&gt;send_cmd(fwlog-&gt;priv, &amp;desc, buf, LIBIE_AQ_MAX_BUF_LEN);</div><div class='add'>+	if (status) {</div><div class='add'>+		dev_dbg(&amp;fwlog-&gt;pdev-&gt;dev, "Failed to get FW log configuration\n");</div><div class='add'>+		goto status_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	module_id_cnt = le16_to_cpu(cmd-&gt;ops.cfg.mdl_cnt);</div><div class='add'>+	if (module_id_cnt &lt; LIBIE_AQC_FW_LOG_ID_MAX) {</div><div class='add'>+		dev_dbg(&amp;fwlog-&gt;pdev-&gt;dev, "FW returned less than the expected number of FW log module IDs\n");</div><div class='add'>+	} else if (module_id_cnt &gt; LIBIE_AQC_FW_LOG_ID_MAX) {</div><div class='add'>+		dev_dbg(&amp;fwlog-&gt;pdev-&gt;dev, "FW returned more than expected number of FW log module IDs, setting module_id_cnt to software expected max %u\n",</div><div class='add'>+			LIBIE_AQC_FW_LOG_ID_MAX);</div><div class='add'>+		module_id_cnt = LIBIE_AQC_FW_LOG_ID_MAX;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfg-&gt;log_resolution = le16_to_cpu(cmd-&gt;ops.cfg.log_resolution);</div><div class='add'>+	if (cmd-&gt;cmd_flags &amp; LIBIE_AQC_FW_LOG_CONF_AQ_EN)</div><div class='add'>+		cfg-&gt;options |= LIBIE_FWLOG_OPTION_ARQ_ENA;</div><div class='add'>+	if (cmd-&gt;cmd_flags &amp; LIBIE_AQC_FW_LOG_CONF_UART_EN)</div><div class='add'>+		cfg-&gt;options |= LIBIE_FWLOG_OPTION_UART_ENA;</div><div class='add'>+	if (cmd-&gt;cmd_flags &amp; LIBIE_AQC_FW_LOG_QUERY_REGISTERED)</div><div class='add'>+		cfg-&gt;options |= LIBIE_FWLOG_OPTION_IS_REGISTERED;</div><div class='add'>+</div><div class='add'>+	fw_modules = (struct libie_aqc_fw_log_cfg_resp *)buf;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; module_id_cnt; i++) {</div><div class='add'>+		struct libie_aqc_fw_log_cfg_resp *fw_module = &amp;fw_modules[i];</div><div class='add'>+</div><div class='add'>+		cfg-&gt;module_entries[i].module_id =</div><div class='add'>+			le16_to_cpu(fw_module-&gt;module_identifier);</div><div class='add'>+		cfg-&gt;module_entries[i].log_level = fw_module-&gt;log_level;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+status_out:</div><div class='add'>+	kfree(buf);</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_fwlog_set_supported - Set if FW logging is supported by FW</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ *</div><div class='add'>+ * If FW returns success to the libie_aq_fwlog_get call then it supports FW</div><div class='add'>+ * logging, else it doesn't. Set the fwlog_supported flag accordingly.</div><div class='add'>+ *</div><div class='add'>+ * This function is only meant to be called during driver init to determine if</div><div class='add'>+ * the FW support FW logging.</div><div class='add'>+ */</div><div class='add'>+static void libie_fwlog_set_supported(struct libie_fwlog *fwlog)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog_cfg *cfg;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	fwlog-&gt;supported = false;</div><div class='add'>+</div><div class='add'>+	cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);</div><div class='add'>+	if (!cfg)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	status = libie_aq_fwlog_get(fwlog, cfg);</div><div class='add'>+	if (status)</div><div class='add'>+		dev_dbg(&amp;fwlog-&gt;pdev-&gt;dev, "libie_aq_fwlog_get failed, FW logging is not supported on this version of FW, status %d\n",</div><div class='add'>+			status);</div><div class='add'>+	else</div><div class='add'>+		fwlog-&gt;supported = true;</div><div class='add'>+</div><div class='add'>+	kfree(cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_fwlog_init - Initialize FW logging configuration</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ * @api: api structure to init fwlog</div><div class='add'>+ *</div><div class='add'>+ * This function should be called on driver initialization during</div><div class='add'>+ * libie_init_hw().</div><div class='add'>+ */</div><div class='add'>+int libie_fwlog_init(struct libie_fwlog *fwlog, struct libie_fwlog_api *api)</div><div class='add'>+{</div><div class='add'>+	fwlog-&gt;api = *api;</div><div class='add'>+	libie_fwlog_set_supported(fwlog);</div><div class='add'>+</div><div class='add'>+	if (libie_fwlog_supported(fwlog)) {</div><div class='add'>+		int status;</div><div class='add'>+</div><div class='add'>+		/* read the current config from the FW and store it */</div><div class='add'>+		status = libie_aq_fwlog_get(fwlog, &amp;fwlog-&gt;cfg);</div><div class='add'>+		if (status)</div><div class='add'>+			return status;</div><div class='add'>+</div><div class='add'>+		fwlog-&gt;ring.rings = kcalloc(LIBIE_FWLOG_RING_SIZE_DFLT,</div><div class='add'>+					    sizeof(*fwlog-&gt;ring.rings),</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+		if (!fwlog-&gt;ring.rings) {</div><div class='add'>+			dev_warn(&amp;fwlog-&gt;pdev-&gt;dev, "Unable to allocate memory for FW log rings\n");</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fwlog-&gt;ring.size = LIBIE_FWLOG_RING_SIZE_DFLT;</div><div class='add'>+		fwlog-&gt;ring.index = LIBIE_FWLOG_RING_SIZE_INDEX_DFLT;</div><div class='add'>+</div><div class='add'>+		status = libie_fwlog_alloc_ring_buffs(&amp;fwlog-&gt;ring);</div><div class='add'>+		if (status) {</div><div class='add'>+			dev_warn(&amp;fwlog-&gt;pdev-&gt;dev, "Unable to allocate memory for FW log ring data buffers\n");</div><div class='add'>+			libie_fwlog_free_ring_buffs(&amp;fwlog-&gt;ring);</div><div class='add'>+			kfree(fwlog-&gt;ring.rings);</div><div class='add'>+			return status;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		libie_debugfs_fwlog_init(fwlog, api-&gt;debugfs_root);</div><div class='add'>+	} else {</div><div class='add'>+		dev_warn(&amp;fwlog-&gt;pdev-&gt;dev, "FW logging is not supported in this NVM image. Please update the NVM to get FW log support\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libie_fwlog_init);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_fwlog_deinit - unroll FW logging configuration</div><div class='add'>+ * @fwlog: pointer to the fwlog structure</div><div class='add'>+ *</div><div class='add'>+ * This function should be called in libie_deinit_hw().</div><div class='add'>+ */</div><div class='add'>+void libie_fwlog_deinit(struct libie_fwlog *fwlog)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	/* make sure FW logging is disabled to not put the FW in a weird state</div><div class='add'>+	 * for the next driver load</div><div class='add'>+	 */</div><div class='add'>+	fwlog-&gt;cfg.options &amp;= ~LIBIE_FWLOG_OPTION_ARQ_ENA;</div><div class='add'>+	status = libie_fwlog_set(fwlog, &amp;fwlog-&gt;cfg);</div><div class='add'>+	if (status)</div><div class='add'>+		dev_warn(&amp;fwlog-&gt;pdev-&gt;dev, "Unable to turn off FW logging, status: %d\n",</div><div class='add'>+			 status);</div><div class='add'>+</div><div class='add'>+	kfree(fwlog-&gt;debugfs_modules);</div><div class='add'>+</div><div class='add'>+	fwlog-&gt;debugfs_modules = NULL;</div><div class='add'>+</div><div class='add'>+	status = libie_fwlog_unregister(fwlog);</div><div class='add'>+	if (status)</div><div class='add'>+		dev_warn(&amp;fwlog-&gt;pdev-&gt;dev, "Unable to unregister FW logging, status: %d\n",</div><div class='add'>+			 status);</div><div class='add'>+</div><div class='add'>+	if (fwlog-&gt;ring.rings) {</div><div class='add'>+		libie_fwlog_free_ring_buffs(&amp;fwlog-&gt;ring);</div><div class='add'>+		kfree(fwlog-&gt;ring.rings);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libie_fwlog_deinit);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * libie_get_fwlog_data - copy the FW log data from ARQ event</div><div class='add'>+ * @fwlog: fwlog that the FW log event is associated with</div><div class='add'>+ * @buf: event buffer pointer</div><div class='add'>+ * @len: len of event descriptor</div><div class='add'>+ */</div><div class='add'>+void libie_get_fwlog_data(struct libie_fwlog *fwlog, u8 *buf, u16 len)</div><div class='add'>+{</div><div class='add'>+	struct libie_fwlog_data *log;</div><div class='add'>+</div><div class='add'>+	log = &amp;fwlog-&gt;ring.rings[fwlog-&gt;ring.tail];</div><div class='add'>+</div><div class='add'>+	memset(log-&gt;data, 0, PAGE_SIZE);</div><div class='add'>+	log-&gt;data_size = len;</div><div class='add'>+</div><div class='add'>+	memcpy(log-&gt;data, buf, log-&gt;data_size);</div><div class='add'>+	libie_fwlog_ring_increment(&amp;fwlog-&gt;ring.tail, fwlog-&gt;ring.size);</div><div class='add'>+</div><div class='add'>+	if (libie_fwlog_ring_full(&amp;fwlog-&gt;ring)) {</div><div class='add'>+		/* the rings are full so bump the head to create room */</div><div class='add'>+		libie_fwlog_ring_increment(&amp;fwlog-&gt;ring.head, fwlog-&gt;ring.size);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libie_get_fwlog_data);</div><div class='add'>+</div><div class='add'>+void libie_fwlog_reregister(struct libie_fwlog *fwlog)</div><div class='add'>+{</div><div class='add'>+	if (!(fwlog-&gt;cfg.options &amp; LIBIE_FWLOG_OPTION_IS_REGISTERED))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (libie_fwlog_register(fwlog))</div><div class='add'>+		fwlog-&gt;cfg.options &amp;= ~LIBIE_FWLOG_OPTION_IS_REGISTERED;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(libie_fwlog_reregister);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Intel(R) Ethernet common library");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/intel/libie/rx.c b/drivers/net/ethernet/intel/libie/rx.c<br/>index aceb8d8813c4..6fda656afa9c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libie/rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/intel/libie/rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/intel/libie/rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/intel/libie/rx.c</a></div><div class='hunk'>@@ -1,6 +1,9 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-/* Copyright (C) 2024 Intel Corporation */</div><div class='add'>+/* Copyright (C) 2024-2025 Intel Corporation */</div><div class='ctx'> </div><div class='add'>+#define DEFAULT_SYMBOL_NAMESPACE	"LIBIE"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/net/intel/libie/rx.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* O(1) converting i40e/ice/iavf's 8/10-bit hardware packet type to a parsed</div><div class='hunk'>@@ -116,8 +119,8 @@ const struct libeth_rx_pt libie_rx_pt_lut[LIBIE_RX_PT_NUM] = {</div><div class='ctx'> 	LIBIE_RX_PT_IP(4),</div><div class='ctx'> 	LIBIE_RX_PT_IP(6),</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_NS_GPL(libie_rx_pt_lut, LIBIE);</div><div class='add'>+EXPORT_SYMBOL_GPL(libie_rx_pt_lut);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Intel(R) Ethernet common library");</div><div class='del'>-MODULE_IMPORT_NS(LIBETH);</div><div class='add'>+MODULE_IMPORT_NS("LIBETH");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/korina.c b/drivers/net/ethernet/korina.c<br/>index 87c7e6251a4f..891a94d89f4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/korina.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/korina.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/korina.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/korina.c</a></div><div class='hunk'>@@ -900,7 +900,8 @@ static void korina_check_media(struct net_device *dev, unsigned int init_media)</div><div class='ctx'> </div><div class='ctx'> static void korina_poll_media(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct korina_private *lp = from_timer(lp, t, media_check_timer);</div><div class='add'>+	struct korina_private *lp = timer_container_of(lp, t,</div><div class='add'>+						       media_check_timer);</div><div class='ctx'> 	struct net_device *dev = lp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	korina_check_media(dev, 0);</div><div class='hunk'>@@ -1239,7 +1240,7 @@ static int korina_close(struct net_device *dev)</div><div class='ctx'> 	struct korina_private *lp = netdev_priv(dev);</div><div class='ctx'> 	u32 tmp;</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;lp-&gt;media_check_timer);</div><div class='add'>+	timer_delete(&amp;lp-&gt;media_check_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable interrupts */</div><div class='ctx'> 	disable_irq(lp-&gt;rx_irq);</div><div class='head'>diff --git a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c<br/>index 660dff5426e7..83ce3bfefa5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/lantiq_etop.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/lantiq_etop.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/lantiq_etop.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/lantiq_etop.c</a></div><div class='hunk'>@@ -90,7 +90,6 @@ struct ltq_etop_priv {</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	struct ltq_eth_data *pldata;</div><div class='del'>-	struct resource *res;</div><div class='ctx'> </div><div class='ctx'> 	struct mii_bus *mii_bus;</div><div class='ctx'> </div><div class='hunk'>@@ -643,31 +642,14 @@ ltq_etop_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct ltq_etop_priv *priv;</div><div class='del'>-	struct resource *res;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (!res) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to get etop resource\n");</div><div class='del'>-		err = -ENOENT;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	res = devm_request_mem_region(&amp;pdev-&gt;dev, res-&gt;start,</div><div class='del'>-				      resource_size(res), dev_name(&amp;pdev-&gt;dev));</div><div class='del'>-	if (!res) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to request etop resource\n");</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ltq_etop_membase = devm_ioremap(&amp;pdev-&gt;dev, res-&gt;start,</div><div class='del'>-					resource_size(res));</div><div class='del'>-	if (!ltq_etop_membase) {</div><div class='add'>+	ltq_etop_membase = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(ltq_etop_membase)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to remap etop engine %d\n",</div><div class='ctx'> 			pdev-&gt;id);</div><div class='del'>-		err = -ENOMEM;</div><div class='add'>+		err = PTR_ERR(ltq_etop_membase);</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -679,7 +661,6 @@ ltq_etop_probe(struct platform_device *pdev)</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;ltq_eth_netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;ltq_etop_ethtool_ops;</div><div class='ctx'> 	priv = netdev_priv(dev);</div><div class='del'>-	priv-&gt;res = res;</div><div class='ctx'> 	priv-&gt;pdev = pdev;</div><div class='ctx'> 	priv-&gt;pldata = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='ctx'> 	priv-&gt;netdev = dev;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/Kconfig b/drivers/net/ethernet/marvell/Kconfig<br/>index 837295fecd17..50f7c59e8a04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/Kconfig</a></div><div class='hunk'>@@ -34,7 +34,6 @@ config MV643XX_ETH</div><div class='ctx'> config MVMDIO</div><div class='ctx'> 	tristate "Marvell MDIO interface support"</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='del'>-	select MDIO_DEVRES</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the MDIO interface found in the network</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c<br/>index a06048719e84..0ab52c57c648 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mv643xx_eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mv643xx_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mv643xx_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/mv643xx_eth.c</a></div><div class='hunk'>@@ -1333,7 +1333,8 @@ static void mib_counters_update(struct mv643xx_eth_private *mp)</div><div class='ctx'> </div><div class='ctx'> static void mib_counters_timer_wrapper(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct mv643xx_eth_private *mp = from_timer(mp, t, mib_counters_timer);</div><div class='add'>+	struct mv643xx_eth_private *mp = timer_container_of(mp, t,</div><div class='add'>+							    mib_counters_timer);</div><div class='ctx'> 	mib_counters_update(mp);</div><div class='ctx'> 	mod_timer(&amp;mp-&gt;mib_counters_timer, jiffies + 30 * HZ);</div><div class='ctx'> }</div><div class='hunk'>@@ -2247,7 +2248,7 @@ static int mv643xx_eth_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(mp-&gt;oom)) {</div><div class='ctx'> 		mp-&gt;oom = 0;</div><div class='del'>-		del_timer(&amp;mp-&gt;rx_oom);</div><div class='add'>+		timer_delete(&amp;mp-&gt;rx_oom);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	work_done = 0;</div><div class='hunk'>@@ -2306,7 +2307,7 @@ static int mv643xx_eth_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> static inline void oom_timer_wrapper(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct mv643xx_eth_private *mp = from_timer(mp, t, rx_oom);</div><div class='add'>+	struct mv643xx_eth_private *mp = timer_container_of(mp, t, rx_oom);</div><div class='ctx'> </div><div class='ctx'> 	napi_schedule(&amp;mp-&gt;napi);</div><div class='ctx'> }</div><div class='hunk'>@@ -2521,7 +2522,7 @@ static int mv643xx_eth_stop(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	napi_disable(&amp;mp-&gt;napi);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;mp-&gt;rx_oom);</div><div class='add'>+	timer_delete_sync(&amp;mp-&gt;rx_oom);</div><div class='ctx'> </div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> 	if (dev-&gt;phydev)</div><div class='hunk'>@@ -2531,7 +2532,7 @@ static int mv643xx_eth_stop(struct net_device *dev)</div><div class='ctx'> 	port_reset(mp);</div><div class='ctx'> 	mv643xx_eth_get_stats(dev);</div><div class='ctx'> 	mib_counters_update(mp);</div><div class='del'>-	del_timer_sync(&amp;mp-&gt;mib_counters_timer);</div><div class='add'>+	timer_delete_sync(&amp;mp-&gt;mib_counters_timer);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; mp-&gt;rxq_count; i++)</div><div class='ctx'> 		rxq_deinit(mp-&gt;rxq + i);</div><div class='hunk'>@@ -2704,9 +2705,15 @@ static struct platform_device *port_platdev[3];</div><div class='ctx'> </div><div class='ctx'> static void mv643xx_eth_shared_of_remove(void)</div><div class='ctx'> {</div><div class='add'>+	struct mv643xx_eth_platform_data *pd;</div><div class='ctx'> 	int n;</div><div class='ctx'> </div><div class='ctx'> 	for (n = 0; n &lt; 3; n++) {</div><div class='add'>+		if (!port_platdev[n])</div><div class='add'>+			continue;</div><div class='add'>+		pd = dev_get_platdata(&amp;port_platdev[n]-&gt;dev);</div><div class='add'>+		if (pd)</div><div class='add'>+			of_node_put(pd-&gt;phy_node);</div><div class='ctx'> 		platform_device_del(port_platdev[n]);</div><div class='ctx'> 		port_platdev[n] = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2769,8 +2776,10 @@ static int mv643xx_eth_shared_of_add_port(struct platform_device *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ppdev = platform_device_alloc(MV643XX_ETH_NAME, dev_num);</div><div class='del'>-	if (!ppdev)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (!ppdev) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto put_err;</div><div class='add'>+	}</div><div class='ctx'> 	ppdev-&gt;dev.coherent_dma_mask = DMA_BIT_MASK(32);</div><div class='ctx'> 	ppdev-&gt;dev.of_node = pnp;</div><div class='ctx'> </div><div class='hunk'>@@ -2792,6 +2801,8 @@ static int mv643xx_eth_shared_of_add_port(struct platform_device *pdev,</div><div class='ctx'> </div><div class='ctx'> port_err:</div><div class='ctx'> 	platform_device_put(ppdev);</div><div class='add'>+put_err:</div><div class='add'>+	of_node_put(ppd.phy_node);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c<br/>index 1fb285fa0bdb..7af44f858fa3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvneta.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvneta.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvneta.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/mvneta.c</a></div><div class='hunk'>@@ -284,8 +284,12 @@</div><div class='ctx'> 					  MVNETA_TXQ_BUCKET_REFILL_PERIOD))</div><div class='ctx'> </div><div class='ctx'> #define MVNETA_LPI_CTRL_0                        0x2cc0</div><div class='add'>+#define      MVNETA_LPI_CTRL_0_TS                (0xff &lt;&lt; 8)</div><div class='ctx'> #define MVNETA_LPI_CTRL_1                        0x2cc4</div><div class='del'>-#define      MVNETA_LPI_REQUEST_ENABLE           BIT(0)</div><div class='add'>+#define      MVNETA_LPI_CTRL_1_REQUEST_ENABLE    BIT(0)</div><div class='add'>+#define      MVNETA_LPI_CTRL_1_REQUEST_FORCE     BIT(1)</div><div class='add'>+#define      MVNETA_LPI_CTRL_1_MANUAL_MODE       BIT(2)</div><div class='add'>+#define      MVNETA_LPI_CTRL_1_TW                (0xfff &lt;&lt; 4)</div><div class='ctx'> #define MVNETA_LPI_CTRL_2                        0x2cc8</div><div class='ctx'> #define MVNETA_LPI_STATUS                        0x2ccc</div><div class='ctx'> </div><div class='hunk'>@@ -541,10 +545,6 @@ struct mvneta_port {</div><div class='ctx'> 	struct mvneta_bm_pool *pool_short;</div><div class='ctx'> 	int bm_win_id;</div><div class='ctx'> </div><div class='del'>-	bool eee_enabled;</div><div class='del'>-	bool eee_active;</div><div class='del'>-	bool tx_lpi_enabled;</div><div class='del'>-</div><div class='ctx'> 	u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)];</div><div class='ctx'> </div><div class='ctx'> 	u32 indir[MVNETA_RSS_LU_TABLE_SIZE];</div><div class='hunk'>@@ -2342,7 +2342,7 @@ mvneta_swbm_rx_frame(struct mvneta_port *pp,</div><div class='ctx'> 	prefetch(data);</div><div class='ctx'> 	xdp_buff_clear_frags_flag(xdp);</div><div class='ctx'> 	xdp_prepare_buff(xdp, data, pp-&gt;rx_offset_correction + MVNETA_MH_SIZE,</div><div class='del'>-			 data_len, false);</div><div class='add'>+			 data_len, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -2396,6 +2396,7 @@ mvneta_swbm_build_skb(struct mvneta_port *pp, struct page_pool *pool,</div><div class='ctx'> 		      struct xdp_buff *xdp, u32 desc_status)</div><div class='ctx'> {</div><div class='ctx'> 	struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);</div><div class='add'>+	u32 metasize = xdp-&gt;data - xdp-&gt;data_meta;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	u8 num_frags;</div><div class='ctx'> </div><div class='hunk'>@@ -2410,13 +2411,14 @@ mvneta_swbm_build_skb(struct mvneta_port *pp, struct page_pool *pool,</div><div class='ctx'> </div><div class='ctx'> 	skb_reserve(skb, xdp-&gt;data - xdp-&gt;data_hard_start);</div><div class='ctx'> 	skb_put(skb, xdp-&gt;data_end - xdp-&gt;data);</div><div class='add'>+	if (metasize)</div><div class='add'>+		skb_metadata_set(skb, metasize);</div><div class='ctx'> 	skb-&gt;ip_summed = mvneta_rx_csum(pp, desc_status);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(xdp_buff_has_frags(xdp)))</div><div class='del'>-		xdp_update_skb_shared_info(skb, num_frags,</div><div class='del'>-					   sinfo-&gt;xdp_frags_size,</div><div class='del'>-					   num_frags * xdp-&gt;frame_sz,</div><div class='del'>-					   xdp_buff_is_frag_pfmemalloc(xdp));</div><div class='add'>+		xdp_update_skb_frags_info(skb, num_frags, sinfo-&gt;xdp_frags_size,</div><div class='add'>+					  num_frags * xdp-&gt;frame_sz,</div><div class='add'>+					  xdp_buff_get_skb_flags(xdp));</div><div class='ctx'> </div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='hunk'>@@ -2982,6 +2984,13 @@ out:</div><div class='ctx'> 		if (txq-&gt;count &gt;= txq-&gt;tx_stop_threshold)</div><div class='ctx'> 			netif_tx_stop_queue(nq);</div><div class='ctx'> </div><div class='add'>+		/* This is not really the true transmit point, since we batch</div><div class='add'>+		 * up several before hitting the hardware, but is the best we</div><div class='add'>+		 * can do without more complexity to walk the packets in the</div><div class='add'>+		 * pending section of the transmit queue.</div><div class='add'>+		 */</div><div class='add'>+		skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 		if (!netdev_xmit_more() || netif_xmit_stopped(nq) ||</div><div class='ctx'> 		    txq-&gt;pending + frags &gt; MVNETA_TXQ_DEC_SENT_MASK)</div><div class='ctx'> 			mvneta_txq_pend_desc_add(pp, txq, frags);</div><div class='hunk'>@@ -3960,23 +3969,30 @@ static struct mvneta_port *mvneta_pcs_to_port(struct phylink_pcs *pcs)</div><div class='ctx'> 	return container_of(pcs, struct mvneta_port, phylink_pcs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mvneta_pcs_validate(struct phylink_pcs *pcs,</div><div class='del'>-			       unsigned long *supported,</div><div class='del'>-			       const struct phylink_link_state *state)</div><div class='add'>+static unsigned int mvneta_pcs_inband_caps(struct phylink_pcs *pcs,</div><div class='add'>+					   phy_interface_t interface)</div><div class='ctx'> {</div><div class='del'>-	/* We only support QSGMII, SGMII, 802.3z and RGMII modes.</div><div class='del'>-	 * When in 802.3z mode, we must have AN enabled:</div><div class='add'>+	/* When operating in an 802.3z mode, we must have AN enabled:</div><div class='ctx'> 	 * "Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...</div><div class='ctx'> 	 * When &lt;PortType&gt; = 1 (1000BASE-X) this field must be set to 1."</div><div class='add'>+	 * Therefore, inband is "required".</div><div class='ctx'> 	 */</div><div class='del'>-	if (phy_interface_mode_is_8023z(state-&gt;interface) &amp;&amp;</div><div class='del'>-	    !phylink_test(state-&gt;advertising, Autoneg))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (phy_interface_mode_is_8023z(interface))</div><div class='add'>+		return LINK_INBAND_ENABLE;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* QSGMII, SGMII and RGMII can be configured to use inband</div><div class='add'>+	 * signalling of the AN result. Indicate these as "possible".</div><div class='add'>+	 */</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_QSGMII ||</div><div class='add'>+	    phy_interface_mode_is_rgmii(interface))</div><div class='add'>+		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;</div><div class='add'>+</div><div class='add'>+	/* For any other modes, indicate that inband is not supported. */</div><div class='add'>+	return LINK_INBAND_DISABLE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mvneta_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+static void mvneta_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 				 struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct mvneta_port *pp = mvneta_pcs_to_port(pcs);</div><div class='hunk'>@@ -4071,7 +4087,7 @@ static void mvneta_pcs_an_restart(struct phylink_pcs *pcs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_pcs_ops mvneta_phylink_pcs_ops = {</div><div class='del'>-	.pcs_validate = mvneta_pcs_validate,</div><div class='add'>+	.pcs_inband_caps = mvneta_pcs_inband_caps,</div><div class='ctx'> 	.pcs_get_state = mvneta_pcs_get_state,</div><div class='ctx'> 	.pcs_config = mvneta_pcs_config,</div><div class='ctx'> 	.pcs_an_restart = mvneta_pcs_an_restart,</div><div class='hunk'>@@ -4206,18 +4222,6 @@ static int mvneta_mac_finish(struct phylink_config *config, unsigned int mode,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mvneta_set_eee(struct mvneta_port *pp, bool enable)</div><div class='del'>-{</div><div class='del'>-	u32 lpi_ctl1;</div><div class='del'>-</div><div class='del'>-	lpi_ctl1 = mvreg_read(pp, MVNETA_LPI_CTRL_1);</div><div class='del'>-	if (enable)</div><div class='del'>-		lpi_ctl1 |= MVNETA_LPI_REQUEST_ENABLE;</div><div class='del'>-	else</div><div class='del'>-		lpi_ctl1 &amp;= ~MVNETA_LPI_REQUEST_ENABLE;</div><div class='del'>-	mvreg_write(pp, MVNETA_LPI_CTRL_1, lpi_ctl1);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void mvneta_mac_link_down(struct phylink_config *config,</div><div class='ctx'> 				 unsigned int mode, phy_interface_t interface)</div><div class='ctx'> {</div><div class='hunk'>@@ -4233,9 +4237,6 @@ static void mvneta_mac_link_down(struct phylink_config *config,</div><div class='ctx'> 		val |= MVNETA_GMAC_FORCE_LINK_DOWN;</div><div class='ctx'> 		mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	pp-&gt;eee_active = false;</div><div class='del'>-	mvneta_set_eee(pp, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mvneta_mac_link_up(struct phylink_config *config,</div><div class='hunk'>@@ -4284,11 +4285,56 @@ static void mvneta_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mvneta_port_up(pp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mvneta_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct mvneta_port *pp = netdev_priv(to_net_dev(config-&gt;dev));</div><div class='add'>+	u32 lpi1;</div><div class='ctx'> </div><div class='del'>-	if (phy &amp;&amp; pp-&gt;eee_enabled) {</div><div class='del'>-		pp-&gt;eee_active = phy_init_eee(phy, false) &gt;= 0;</div><div class='del'>-		mvneta_set_eee(pp, pp-&gt;eee_active &amp;&amp; pp-&gt;tx_lpi_enabled);</div><div class='add'>+	lpi1 = mvreg_read(pp, MVNETA_LPI_CTRL_1);</div><div class='add'>+	lpi1 &amp;= ~(MVNETA_LPI_CTRL_1_REQUEST_ENABLE |</div><div class='add'>+		  MVNETA_LPI_CTRL_1_REQUEST_FORCE |</div><div class='add'>+		  MVNETA_LPI_CTRL_1_MANUAL_MODE);</div><div class='add'>+	mvreg_write(pp, MVNETA_LPI_CTRL_1, lpi1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mvneta_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,</div><div class='add'>+				    bool tx_clk_stop)</div><div class='add'>+{</div><div class='add'>+	struct mvneta_port *pp = netdev_priv(to_net_dev(config-&gt;dev));</div><div class='add'>+	u32 ts, tw, lpi0, lpi1, status;</div><div class='add'>+</div><div class='add'>+	status = mvreg_read(pp, MVNETA_GMAC_STATUS);</div><div class='add'>+	if (status &amp; MVNETA_GMAC_SPEED_1000) {</div><div class='add'>+		/* At 1G speeds, the timer resolution are 1us, and</div><div class='add'>+		 * 802.3 says tw is 16.5us. Round up to 17us.</div><div class='add'>+		 */</div><div class='add'>+		tw = 17;</div><div class='add'>+		ts = timer;</div><div class='add'>+	} else {</div><div class='add'>+		/* At 100M speeds, the timer resolutions are 10us, and</div><div class='add'>+		 * 802.3 says tw is 30us.</div><div class='add'>+		 */</div><div class='add'>+		tw = 3;</div><div class='add'>+		ts = DIV_ROUND_UP(timer, 10);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (ts &gt; 255)</div><div class='add'>+		ts = 255;</div><div class='add'>+</div><div class='add'>+	/* Configure ts */</div><div class='add'>+	lpi0 = mvreg_read(pp, MVNETA_LPI_CTRL_0);</div><div class='add'>+	lpi0 = u32_replace_bits(lpi0, ts, MVNETA_LPI_CTRL_0_TS);</div><div class='add'>+	mvreg_write(pp, MVNETA_LPI_CTRL_0, lpi0);</div><div class='add'>+</div><div class='add'>+	/* Configure tw and enable LPI generation */</div><div class='add'>+	lpi1 = mvreg_read(pp, MVNETA_LPI_CTRL_1);</div><div class='add'>+	lpi1 = u32_replace_bits(lpi1, tw, MVNETA_LPI_CTRL_1_TW);</div><div class='add'>+	lpi1 |= MVNETA_LPI_CTRL_1_REQUEST_ENABLE;</div><div class='add'>+	mvreg_write(pp, MVNETA_LPI_CTRL_1, lpi1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_mac_ops mvneta_phylink_ops = {</div><div class='hunk'>@@ -4298,6 +4344,8 @@ static const struct phylink_mac_ops mvneta_phylink_ops = {</div><div class='ctx'> 	.mac_finish = mvneta_mac_finish,</div><div class='ctx'> 	.mac_link_down = mvneta_mac_link_down,</div><div class='ctx'> 	.mac_link_up = mvneta_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = mvneta_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = mvneta_mac_enable_tx_lpi,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int mvneta_mdio_probe(struct mvneta_port *pp)</div><div class='hunk'>@@ -4385,6 +4433,7 @@ static int mvneta_cpu_online(unsigned int cpu, struct hlist_node *node)</div><div class='ctx'> 	if (pp-&gt;neta_armada3700)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	netdev_lock(port-&gt;napi.dev);</div><div class='ctx'> 	spin_lock(&amp;pp-&gt;lock);</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Configuring the driver for a new CPU while the driver is</div><div class='hunk'>@@ -4392,6 +4441,7 @@ static int mvneta_cpu_online(unsigned int cpu, struct hlist_node *node)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (pp-&gt;is_stopped) {</div><div class='ctx'> 		spin_unlock(&amp;pp-&gt;lock);</div><div class='add'>+		netdev_unlock(port-&gt;napi.dev);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	netif_tx_stop_all_queues(pp-&gt;dev);</div><div class='hunk'>@@ -4411,7 +4461,7 @@ static int mvneta_cpu_online(unsigned int cpu, struct hlist_node *node)</div><div class='ctx'> </div><div class='ctx'> 	/* Mask all ethernet port interrupts */</div><div class='ctx'> 	on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);</div><div class='del'>-	napi_enable(&amp;port-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;port-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Enable per-CPU interrupts on the CPU that is</div><div class='hunk'>@@ -4432,6 +4482,8 @@ static int mvneta_cpu_online(unsigned int cpu, struct hlist_node *node)</div><div class='ctx'> 		    MVNETA_CAUSE_LINK_CHANGE);</div><div class='ctx'> 	netif_tx_start_all_queues(pp-&gt;dev);</div><div class='ctx'> 	spin_unlock(&amp;pp-&gt;lock);</div><div class='add'>+	netdev_unlock(port-&gt;napi.dev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4564,7 +4616,7 @@ static int mvneta_stop(struct net_device *dev)</div><div class='ctx'> 		/* Inform that we are stopping so we don't want to setup the</div><div class='ctx'> 		 * driver for new CPUs in the notifiers. The code of the</div><div class='ctx'> 		 * notifier for CPU online is protected by the same spinlock,</div><div class='del'>-		 * so when we get the lock, the notifer work is done.</div><div class='add'>+		 * so when we get the lock, the notifier work is done.</div><div class='ctx'> 		 */</div><div class='ctx'> 		spin_lock(&amp;pp-&gt;lock);</div><div class='ctx'> 		pp-&gt;is_stopped = true;</div><div class='hunk'>@@ -4960,19 +5012,9 @@ static u32 mvneta_ethtool_get_rxfh_indir_size(struct net_device *dev)</div><div class='ctx'> 	return MVNETA_RSS_LU_TABLE_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mvneta_ethtool_get_rxnfc(struct net_device *dev,</div><div class='del'>-				    struct ethtool_rxnfc *info,</div><div class='del'>-				    u32 *rules __always_unused)</div><div class='add'>+static u32 mvneta_ethtool_get_rx_ring_count(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		info-&gt;data =  rxq_number;</div><div class='del'>-		return 0;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	return rxq_number;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int  mvneta_config_rss(struct mvneta_port *pp)</div><div class='hunk'>@@ -5099,14 +5141,6 @@ static int mvneta_ethtool_get_eee(struct net_device *dev,</div><div class='ctx'> 				  struct ethtool_keee *eee)</div><div class='ctx'> {</div><div class='ctx'> 	struct mvneta_port *pp = netdev_priv(dev);</div><div class='del'>-	u32 lpi_ctl0;</div><div class='del'>-</div><div class='del'>-	lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0);</div><div class='del'>-</div><div class='del'>-	eee-&gt;eee_enabled = pp-&gt;eee_enabled;</div><div class='del'>-	eee-&gt;eee_active = pp-&gt;eee_active;</div><div class='del'>-	eee-&gt;tx_lpi_enabled = pp-&gt;tx_lpi_enabled;</div><div class='del'>-	eee-&gt;tx_lpi_timer = (lpi_ctl0) &gt;&gt; 8; // * scale;</div><div class='ctx'> </div><div class='ctx'> 	return phylink_ethtool_get_eee(pp-&gt;phylink, eee);</div><div class='ctx'> }</div><div class='hunk'>@@ -5115,7 +5149,6 @@ static int mvneta_ethtool_set_eee(struct net_device *dev,</div><div class='ctx'> 				  struct ethtool_keee *eee)</div><div class='ctx'> {</div><div class='ctx'> 	struct mvneta_port *pp = netdev_priv(dev);</div><div class='del'>-	u32 lpi_ctl0;</div><div class='ctx'> </div><div class='ctx'> 	/* The Armada 37x documents do not give limits for this other than</div><div class='ctx'> 	 * it being an 8-bit register.</div><div class='hunk'>@@ -5123,16 +5156,6 @@ static int mvneta_ethtool_set_eee(struct net_device *dev,</div><div class='ctx'> 	if (eee-&gt;tx_lpi_enabled &amp;&amp; eee-&gt;tx_lpi_timer &gt; 255)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0);</div><div class='del'>-	lpi_ctl0 &amp;= ~(0xff &lt;&lt; 8);</div><div class='del'>-	lpi_ctl0 |= eee-&gt;tx_lpi_timer &lt;&lt; 8;</div><div class='del'>-	mvreg_write(pp, MVNETA_LPI_CTRL_0, lpi_ctl0);</div><div class='del'>-</div><div class='del'>-	pp-&gt;eee_enabled = eee-&gt;eee_enabled;</div><div class='del'>-	pp-&gt;tx_lpi_enabled = eee-&gt;tx_lpi_enabled;</div><div class='del'>-</div><div class='del'>-	mvneta_set_eee(pp, eee-&gt;tx_lpi_enabled &amp;&amp; eee-&gt;eee_enabled);</div><div class='del'>-</div><div class='ctx'> 	return phylink_ethtool_set_eee(pp-&gt;phylink, eee);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5325,13 +5348,14 @@ static const struct ethtool_ops mvneta_eth_tool_ops = {</div><div class='ctx'> 	.get_ethtool_stats = mvneta_ethtool_get_stats,</div><div class='ctx'> 	.get_sset_count	= mvneta_ethtool_get_sset_count,</div><div class='ctx'> 	.get_rxfh_indir_size = mvneta_ethtool_get_rxfh_indir_size,</div><div class='del'>-	.get_rxnfc	= mvneta_ethtool_get_rxnfc,</div><div class='add'>+	.get_rx_ring_count = mvneta_ethtool_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh	= mvneta_ethtool_get_rxfh,</div><div class='ctx'> 	.set_rxfh	= mvneta_ethtool_set_rxfh,</div><div class='ctx'> 	.get_link_ksettings = mvneta_ethtool_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings = mvneta_ethtool_set_link_ksettings,</div><div class='ctx'> 	.get_wol        = mvneta_ethtool_get_wol,</div><div class='ctx'> 	.set_wol        = mvneta_ethtool_set_wol,</div><div class='add'>+	.get_ts_info	= ethtool_op_get_ts_info,</div><div class='ctx'> 	.get_eee	= mvneta_ethtool_get_eee,</div><div class='ctx'> 	.set_eee	= mvneta_ethtool_set_eee,</div><div class='ctx'> };</div><div class='hunk'>@@ -5446,6 +5470,9 @@ static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode)</div><div class='ctx'> 	    !phy_interface_mode_is_rgmii(phy_mode))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	/* Ensure LPI is disabled */</div><div class='add'>+	mvneta_mac_disable_tx_lpi(&amp;pp-&gt;phylink_config);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5530,13 +5557,19 @@ static int mvneta_probe(struct platform_device *pdev)</div><div class='ctx'> 		clk_prepare_enable(pp-&gt;clk_bus);</div><div class='ctx'> </div><div class='ctx'> 	pp-&gt;phylink_pcs.ops = &amp;mvneta_phylink_pcs_ops;</div><div class='del'>-	pp-&gt;phylink_pcs.neg_mode = true;</div><div class='ctx'> </div><div class='ctx'> 	pp-&gt;phylink_config.dev = &amp;dev-&gt;dev;</div><div class='ctx'> 	pp-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='ctx'> 	pp-&gt;phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 |</div><div class='ctx'> 		MAC_100 | MAC_1000FD | MAC_2500FD;</div><div class='ctx'> </div><div class='add'>+	/* Setup EEE. Choose 250us idle. Only supported in SGMII modes. */</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_QSGMII, pp-&gt;phylink_config.lpi_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_SGMII, pp-&gt;phylink_config.lpi_interfaces);</div><div class='add'>+	pp-&gt;phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD;</div><div class='add'>+	pp-&gt;phylink_config.lpi_timer_default = 250;</div><div class='add'>+	pp-&gt;phylink_config.eee_enabled_default = true;</div><div class='add'>+</div><div class='ctx'> 	phy_interface_set_rgmii(pp-&gt;phylink_config.supported_interfaces);</div><div class='ctx'> 	__set_bit(PHY_INTERFACE_MODE_QSGMII,</div><div class='ctx'> 		  pp-&gt;phylink_config.supported_interfaces);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/mvneta_bm.h b/drivers/net/ethernet/marvell/mvneta_bm.h<br/>index e47783ce77e0..57ac039df6f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvneta_bm.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvneta_bm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvneta_bm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/mvneta_bm.h</a></div><div class='hunk'>@@ -115,7 +115,7 @@ struct mvneta_bm_pool {</div><div class='ctx'> </div><div class='ctx'> 	/* Packet size */</div><div class='ctx'> 	int pkt_size;</div><div class='del'>-	/* Size of the buffer acces through DMA*/</div><div class='add'>+	/* Size of the buffer access through DMA */</div><div class='ctx'> 	u32 buf_size;</div><div class='ctx'> </div><div class='ctx'> 	/* BPPE virtual base address */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h<br/>index 9e02e4367bec..061fcd444d50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvpp2/mvpp2.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvpp2/mvpp2.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvpp2/mvpp2.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/mvpp2/mvpp2.h</a></div><div class='hunk'>@@ -481,6 +481,11 @@</div><div class='ctx'> #define MVPP22_GMAC_INT_SUM_MASK		0xa4</div><div class='ctx'> #define     MVPP22_GMAC_INT_SUM_MASK_LINK_STAT	BIT(1)</div><div class='ctx'> #define	    MVPP22_GMAC_INT_SUM_MASK_PTP	BIT(2)</div><div class='add'>+#define MVPP2_GMAC_LPI_CTRL0			0xc0</div><div class='add'>+#define     MVPP2_GMAC_LPI_CTRL0_TS_MASK	GENMASK(15, 8)</div><div class='add'>+#define MVPP2_GMAC_LPI_CTRL1			0xc4</div><div class='add'>+#define     MVPP2_GMAC_LPI_CTRL1_REQ_EN		BIT(0)</div><div class='add'>+#define     MVPP2_GMAC_LPI_CTRL1_TW_MASK	GENMASK(15, 4)</div><div class='ctx'> </div><div class='ctx'> /* Per-port XGMAC registers. PPv2.2 and PPv2.3, only for GOP port 0,</div><div class='ctx'>  * relative to port-&gt;base.</div><div class='hunk'>@@ -1108,6 +1113,9 @@ struct mvpp2 {</div><div class='ctx'> </div><div class='ctx'> 	/* Spinlocks for CM3 shared memory configuration */</div><div class='ctx'> 	spinlock_t mss_spinlock;</div><div class='add'>+</div><div class='add'>+	/* Spinlock for shared PRS parser memory and shadow table */</div><div class='add'>+	spinlock_t prs_spinlock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mvpp2_pcpu_stats {</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c<br/>index 1641791a2d5b..44b201817d94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c</a></div><div class='hunk'>@@ -324,7 +324,7 @@ static const struct mvpp2_cls_flow cls_flows[MVPP2_N_PRS_FLOWS] = {</div><div class='ctx'> 		       MVPP2_PRS_RI_VLAN_MASK),</div><div class='ctx'> 	/* Non IP flow, with vlan tag */</div><div class='ctx'> 	MVPP2_DEF_FLOW(MVPP22_FLOW_ETHERNET, MVPP2_FL_NON_IP_TAG,</div><div class='del'>-		       MVPP22_CLS_HEK_OPT_VLAN,</div><div class='add'>+		       MVPP22_CLS_HEK_TAGGED,</div><div class='ctx'> 		       0, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1618,7 +1618,8 @@ int mvpp22_port_rss_ctx_indir_get(struct mvpp2_port *port, u32 port_ctx,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mvpp2_ethtool_rxfh_set(struct mvpp2_port *port, struct ethtool_rxnfc *info)</div><div class='add'>+int mvpp2_ethtool_rxfh_set(struct mvpp2_port *port,</div><div class='add'>+			   const struct ethtool_rxfh_fields *info)</div><div class='ctx'> {</div><div class='ctx'> 	u16 hash_opts = 0;</div><div class='ctx'> 	u32 flow_type;</div><div class='hunk'>@@ -1656,7 +1657,8 @@ int mvpp2_ethtool_rxfh_set(struct mvpp2_port *port, struct ethtool_rxnfc *info)</div><div class='ctx'> 	return mvpp2_port_rss_hash_opts_set(port, flow_type, hash_opts);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mvpp2_ethtool_rxfh_get(struct mvpp2_port *port, struct ethtool_rxnfc *info)</div><div class='add'>+int mvpp2_ethtool_rxfh_get(struct mvpp2_port *port,</div><div class='add'>+			   struct ethtool_rxfh_fields *info)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long hash_opts;</div><div class='ctx'> 	u32 flow_type;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h<br/>index 85c9c6e80678..caadf3aea95d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h</a></div><div class='hunk'>@@ -272,8 +272,10 @@ int mvpp22_port_rss_ctx_indir_set(struct mvpp2_port *port, u32 rss_ctx,</div><div class='ctx'> int mvpp22_port_rss_ctx_indir_get(struct mvpp2_port *port, u32 rss_ctx,</div><div class='ctx'> 				  u32 *indir);</div><div class='ctx'> </div><div class='del'>-int mvpp2_ethtool_rxfh_get(struct mvpp2_port *port, struct ethtool_rxnfc *info);</div><div class='del'>-int mvpp2_ethtool_rxfh_set(struct mvpp2_port *port, struct ethtool_rxnfc *info);</div><div class='add'>+int mvpp2_ethtool_rxfh_get(struct mvpp2_port *port,</div><div class='add'>+			   struct ethtool_rxfh_fields *info);</div><div class='add'>+int mvpp2_ethtool_rxfh_set(struct mvpp2_port *port,</div><div class='add'>+			   const struct ethtool_rxfh_fields *info);</div><div class='ctx'> </div><div class='ctx'> void mvpp2_cls_init(struct mvpp2 *priv);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c<br/>index 571631a30320..33426fded919 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c</a></div><div class='hunk'>@@ -3915,13 +3915,13 @@ static int mvpp2_rx(struct mvpp2_port *port, struct napi_struct *napi,</div><div class='ctx'> </div><div class='ctx'> 	while (rx_done &lt; rx_todo) {</div><div class='ctx'> 		struct mvpp2_rx_desc *rx_desc = mvpp2_rxq_next_desc_get(rxq);</div><div class='add'>+		u32 rx_status, timestamp, metasize = 0;</div><div class='ctx'> 		struct mvpp2_bm_pool *bm_pool;</div><div class='ctx'> 		struct page_pool *pp = NULL;</div><div class='ctx'> 		struct sk_buff *skb;</div><div class='ctx'> 		unsigned int frag_size;</div><div class='ctx'> 		dma_addr_t dma_addr;</div><div class='ctx'> 		phys_addr_t phys_addr;</div><div class='del'>-		u32 rx_status, timestamp;</div><div class='ctx'> 		int pool, rx_bytes, err, ret;</div><div class='ctx'> 		struct page *page;</div><div class='ctx'> 		void *data;</div><div class='hunk'>@@ -3983,7 +3983,7 @@ static int mvpp2_rx(struct mvpp2_port *port, struct napi_struct *napi,</div><div class='ctx'> 			xdp_init_buff(&amp;xdp, PAGE_SIZE, xdp_rxq);</div><div class='ctx'> 			xdp_prepare_buff(&amp;xdp, data,</div><div class='ctx'> 					 MVPP2_MH_SIZE + MVPP2_SKB_HEADROOM,</div><div class='del'>-					 rx_bytes, false);</div><div class='add'>+					 rx_bytes, true);</div><div class='ctx'> </div><div class='ctx'> 			ret = mvpp2_run_xdp(port, xdp_prog, &amp;xdp, pp, &amp;ps);</div><div class='ctx'> </div><div class='hunk'>@@ -3999,6 +3999,8 @@ static int mvpp2_rx(struct mvpp2_port *port, struct napi_struct *napi,</div><div class='ctx'> 				ps.rx_bytes += rx_bytes;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='add'>+</div><div class='add'>+			metasize = xdp.data - xdp.data_meta;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (frag_size)</div><div class='hunk'>@@ -4038,6 +4040,8 @@ static int mvpp2_rx(struct mvpp2_port *port, struct napi_struct *napi,</div><div class='ctx'> </div><div class='ctx'> 		skb_reserve(skb, MVPP2_MH_SIZE + MVPP2_SKB_HEADROOM);</div><div class='ctx'> 		skb_put(skb, rx_bytes);</div><div class='add'>+		if (metasize)</div><div class='add'>+			skb_metadata_set(skb, metasize);</div><div class='ctx'> 		skb-&gt;ip_summed = mvpp2_rx_csum(port, rx_status);</div><div class='ctx'> 		skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='ctx'> </div><div class='hunk'>@@ -4435,6 +4439,8 @@ out:</div><div class='ctx'> 		txq_pcpu-&gt;count += frags;</div><div class='ctx'> 		aggr_txq-&gt;count += frags;</div><div class='ctx'> </div><div class='add'>+		skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 		/* Enable transmit */</div><div class='ctx'> 		wmb();</div><div class='ctx'> 		mvpp2_aggr_txq_pend_desc_add(port, frags);</div><div class='hunk'>@@ -5169,38 +5175,40 @@ mvpp2_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)</div><div class='ctx'> 	stats-&gt;tx_dropped	= dev-&gt;stats.tx_dropped;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mvpp2_set_ts_config(struct mvpp2_port *port, struct ifreq *ifr)</div><div class='add'>+static int mvpp2_hwtstamp_set(struct net_device *dev,</div><div class='add'>+			      struct kernel_hwtstamp_config *config,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	struct mvpp2_port *port = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ptp;</div><div class='ctx'> 	u32 gcr, int_mask;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	if (!port-&gt;hwtstamp)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (config.tx_type != HWTSTAMP_TX_OFF &amp;&amp;</div><div class='del'>-	    config.tx_type != HWTSTAMP_TX_ON)</div><div class='add'>+	if (config-&gt;tx_type != HWTSTAMP_TX_OFF &amp;&amp;</div><div class='add'>+	    config-&gt;tx_type != HWTSTAMP_TX_ON)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='ctx'> 	ptp = port-&gt;priv-&gt;iface_base + MVPP22_PTP_BASE(port-&gt;gop_id);</div><div class='ctx'> </div><div class='ctx'> 	int_mask = gcr = 0;</div><div class='del'>-	if (config.tx_type != HWTSTAMP_TX_OFF) {</div><div class='add'>+	if (config-&gt;tx_type != HWTSTAMP_TX_OFF) {</div><div class='ctx'> 		gcr |= MVPP22_PTP_GCR_TSU_ENABLE | MVPP22_PTP_GCR_TX_RESET;</div><div class='ctx'> 		int_mask |= MVPP22_PTP_INT_MASK_QUEUE1 |</div><div class='ctx'> 			    MVPP22_PTP_INT_MASK_QUEUE0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* It seems we must also release the TX reset when enabling the TSU */</div><div class='del'>-	if (config.rx_filter != HWTSTAMP_FILTER_NONE)</div><div class='add'>+	if (config-&gt;rx_filter != HWTSTAMP_FILTER_NONE)</div><div class='ctx'> 		gcr |= MVPP22_PTP_GCR_TSU_ENABLE | MVPP22_PTP_GCR_RX_RESET |</div><div class='ctx'> 		       MVPP22_PTP_GCR_TX_RESET;</div><div class='ctx'> </div><div class='ctx'> 	if (gcr &amp; MVPP22_PTP_GCR_TSU_ENABLE)</div><div class='ctx'> 		mvpp22_tai_start(port-&gt;priv-&gt;tai);</div><div class='ctx'> </div><div class='del'>-	if (config.rx_filter != HWTSTAMP_FILTER_NONE) {</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+	if (config-&gt;rx_filter != HWTSTAMP_FILTER_NONE) {</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		mvpp2_modify(ptp + MVPP22_PTP_GCR,</div><div class='ctx'> 			     MVPP22_PTP_GCR_RX_RESET |</div><div class='ctx'> 			     MVPP22_PTP_GCR_TX_RESET |</div><div class='hunk'>@@ -5221,26 +5229,22 @@ static int mvpp2_set_ts_config(struct mvpp2_port *port, struct ifreq *ifr)</div><div class='ctx'> 	if (!(gcr &amp; MVPP22_PTP_GCR_TSU_ENABLE))</div><div class='ctx'> 		mvpp22_tai_stop(port-&gt;priv-&gt;tai);</div><div class='ctx'> </div><div class='del'>-	port-&gt;tx_hwtstamp_type = config.tx_type;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	port-&gt;tx_hwtstamp_type = config-&gt;tx_type;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mvpp2_get_ts_config(struct mvpp2_port *port, struct ifreq *ifr)</div><div class='add'>+static int mvpp2_hwtstamp_get(struct net_device *dev,</div><div class='add'>+			      struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-</div><div class='del'>-	memset(&amp;config, 0, sizeof(config));</div><div class='add'>+	struct mvpp2_port *port = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	config.tx_type = port-&gt;tx_hwtstamp_type;</div><div class='del'>-	config.rx_filter = port-&gt;rx_hwtstamp ?</div><div class='del'>-		HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;</div><div class='add'>+	if (!port-&gt;hwtstamp)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	config-&gt;tx_type = port-&gt;tx_hwtstamp_type;</div><div class='add'>+	config-&gt;rx_filter = port-&gt;rx_hwtstamp ? HWTSTAMP_FILTER_ALL :</div><div class='add'>+			    HWTSTAMP_FILTER_NONE;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -5250,14 +5254,14 @@ static int mvpp2_ethtool_get_ts_info(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct mvpp2_port *port = netdev_priv(dev);</div><div class='ctx'> </div><div class='add'>+	ethtool_op_get_ts_info(dev, info);</div><div class='ctx'> 	if (!port-&gt;hwtstamp)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;phc_index = mvpp22_tai_ptp_clock_index(port-&gt;priv-&gt;tai);</div><div class='del'>-	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |</div><div class='del'>-				SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='del'>-				SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='del'>-				SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+	info-&gt;so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+				 SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+				 SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='ctx'> 	info-&gt;tx_types = BIT(HWTSTAMP_TX_OFF) |</div><div class='ctx'> 			 BIT(HWTSTAMP_TX_ON);</div><div class='ctx'> 	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_NONE) |</div><div class='hunk'>@@ -5270,18 +5274,6 @@ static int mvpp2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct mvpp2_port *port = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		if (port-&gt;hwtstamp)</div><div class='del'>-			return mvpp2_set_ts_config(port, ifr);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		if (port-&gt;hwtstamp)</div><div class='del'>-			return mvpp2_get_ts_config(port, ifr);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (!port-&gt;phylink)</div><div class='ctx'> 		return -ENOTSUPP;</div><div class='ctx'> </div><div class='hunk'>@@ -5588,6 +5580,13 @@ static int mvpp2_ethtool_set_link_ksettings(struct net_device *dev,</div><div class='ctx'> 	return phylink_ethtool_ksettings_set(port-&gt;phylink, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 mvpp2_ethtool_get_rx_ring_count(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mvpp2_port *port = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return port-&gt;nrxqs;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mvpp2_ethtool_get_rxnfc(struct net_device *dev,</div><div class='ctx'> 				   struct ethtool_rxnfc *info, u32 *rules)</div><div class='ctx'> {</div><div class='hunk'>@@ -5598,12 +5597,6 @@ static int mvpp2_ethtool_get_rxnfc(struct net_device *dev,</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ret = mvpp2_ethtool_rxfh_get(port, info);</div><div class='del'>-		break;</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		info-&gt;data = port-&gt;nrxqs;</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		info-&gt;rule_cnt = port-&gt;n_rfs_rules;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -5638,9 +5631,6 @@ static int mvpp2_ethtool_set_rxnfc(struct net_device *dev,</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = mvpp2_ethtool_rxfh_set(port, info);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		ret = mvpp2_ethtool_cls_rule_ins(port, info);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -5757,6 +5747,51 @@ static int mvpp2_ethtool_set_rxfh(struct net_device *dev,</div><div class='ctx'> 	return mvpp2_modify_rxfh_context(dev, NULL, rxfh, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mvpp2_ethtool_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+					 struct ethtool_rxfh_fields *info)</div><div class='add'>+{</div><div class='add'>+	struct mvpp2_port *port = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!mvpp22_rss_is_supported(port))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mvpp2_ethtool_rxfh_get(port, info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mvpp2_ethtool_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+					 const struct ethtool_rxfh_fields *info,</div><div class='add'>+					 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mvpp2_port *port = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!mvpp22_rss_is_supported(port))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mvpp2_ethtool_rxfh_set(port, info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mvpp2_ethtool_get_eee(struct net_device *dev,</div><div class='add'>+				 struct ethtool_keee *eee)</div><div class='add'>+{</div><div class='add'>+	struct mvpp2_port *port = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!port-&gt;phylink)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return phylink_ethtool_get_eee(port-&gt;phylink, eee);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mvpp2_ethtool_set_eee(struct net_device *dev,</div><div class='add'>+				 struct ethtool_keee *eee)</div><div class='add'>+{</div><div class='add'>+	struct mvpp2_port *port = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!port-&gt;phylink)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return phylink_ethtool_set_eee(port-&gt;phylink, eee);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Device ops */</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops mvpp2_netdev_ops = {</div><div class='hunk'>@@ -5773,6 +5808,8 @@ static const struct net_device_ops mvpp2_netdev_ops = {</div><div class='ctx'> 	.ndo_set_features	= mvpp2_set_features,</div><div class='ctx'> 	.ndo_bpf		= mvpp2_xdp,</div><div class='ctx'> 	.ndo_xdp_xmit		= mvpp2_xdp_xmit,</div><div class='add'>+	.ndo_hwtstamp_get	= mvpp2_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= mvpp2_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops mvpp2_eth_tool_ops = {</div><div class='hunk'>@@ -5794,14 +5831,19 @@ static const struct ethtool_ops mvpp2_eth_tool_ops = {</div><div class='ctx'> 	.set_pauseparam		= mvpp2_ethtool_set_pause_param,</div><div class='ctx'> 	.get_link_ksettings	= mvpp2_ethtool_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings	= mvpp2_ethtool_set_link_ksettings,</div><div class='add'>+	.get_rx_ring_count	= mvpp2_ethtool_get_rx_ring_count,</div><div class='ctx'> 	.get_rxnfc		= mvpp2_ethtool_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= mvpp2_ethtool_set_rxnfc,</div><div class='ctx'> 	.get_rxfh_indir_size	= mvpp2_ethtool_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= mvpp2_ethtool_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= mvpp2_ethtool_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= mvpp2_ethtool_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= mvpp2_ethtool_set_rxfh_fields,</div><div class='ctx'> 	.create_rxfh_context	= mvpp2_create_rxfh_context,</div><div class='ctx'> 	.modify_rxfh_context	= mvpp2_modify_rxfh_context,</div><div class='ctx'> 	.remove_rxfh_context	= mvpp2_remove_rxfh_context,</div><div class='add'>+	.get_eee		= mvpp2_ethtool_get_eee,</div><div class='add'>+	.set_eee		= mvpp2_ethtool_set_eee,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Used for PPv2.1, or PPv2.2 with the old Device Tree binding that</div><div class='hunk'>@@ -6187,7 +6229,14 @@ static struct mvpp2_port *mvpp2_pcs_gmac_to_port(struct phylink_pcs *pcs)</div><div class='ctx'> 	return container_of(pcs, struct mvpp2_port, pcs_gmac);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int mvpp2_xjg_pcs_inband_caps(struct phylink_pcs *pcs,</div><div class='add'>+					      phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	return LINK_INBAND_DISABLE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mvpp2_xlg_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				    unsigned int neg_mode,</div><div class='ctx'> 				    struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct mvpp2_port *port = mvpp2_pcs_xlg_to_port(pcs);</div><div class='hunk'>@@ -6220,26 +6269,35 @@ static int mvpp2_xlg_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_pcs_ops mvpp2_phylink_xlg_pcs_ops = {</div><div class='add'>+	.pcs_inband_caps = mvpp2_xjg_pcs_inband_caps,</div><div class='ctx'> 	.pcs_get_state = mvpp2_xlg_pcs_get_state,</div><div class='ctx'> 	.pcs_config = mvpp2_xlg_pcs_config,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int mvpp2_gmac_pcs_validate(struct phylink_pcs *pcs,</div><div class='del'>-				   unsigned long *supported,</div><div class='del'>-				   const struct phylink_link_state *state)</div><div class='add'>+static unsigned int mvpp2_gmac_pcs_inband_caps(struct phylink_pcs *pcs,</div><div class='add'>+					       phy_interface_t interface)</div><div class='ctx'> {</div><div class='del'>-	/* When in 802.3z mode, we must have AN enabled:</div><div class='add'>+	/* When operating in an 802.3z mode, we must have AN enabled:</div><div class='ctx'> 	 * Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...</div><div class='ctx'> 	 * When &lt;PortType&gt; = 1 (1000BASE-X) this field must be set to 1.</div><div class='add'>+	 * Therefore, inband is "required".</div><div class='ctx'> 	 */</div><div class='del'>-	if (phy_interface_mode_is_8023z(state-&gt;interface) &amp;&amp;</div><div class='del'>-	    !phylink_test(state-&gt;advertising, Autoneg))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (phy_interface_mode_is_8023z(interface))</div><div class='add'>+		return LINK_INBAND_ENABLE;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* SGMII and RGMII can be configured to use inband signalling of the</div><div class='add'>+	 * AN result. Indicate these as "possible".</div><div class='add'>+	 */</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII ||</div><div class='add'>+	    phy_interface_mode_is_rgmii(interface))</div><div class='add'>+		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;</div><div class='add'>+</div><div class='add'>+	/* For any other modes, indicate that inband is not supported. */</div><div class='add'>+	return LINK_INBAND_DISABLE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mvpp2_gmac_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				     unsigned int neg_mode,</div><div class='ctx'> 				     struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct mvpp2_port *port = mvpp2_pcs_gmac_to_port(pcs);</div><div class='hunk'>@@ -6343,7 +6401,7 @@ static void mvpp2_gmac_pcs_an_restart(struct phylink_pcs *pcs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_pcs_ops mvpp2_phylink_gmac_pcs_ops = {</div><div class='del'>-	.pcs_validate = mvpp2_gmac_pcs_validate,</div><div class='add'>+	.pcs_inband_caps = mvpp2_gmac_pcs_inband_caps,</div><div class='ctx'> 	.pcs_get_state = mvpp2_gmac_pcs_get_state,</div><div class='ctx'> 	.pcs_config = mvpp2_gmac_pcs_config,</div><div class='ctx'> 	.pcs_an_restart = mvpp2_gmac_pcs_an_restart,</div><div class='hunk'>@@ -6665,6 +6723,55 @@ static void mvpp2_mac_link_down(struct phylink_config *config,</div><div class='ctx'> 	mvpp2_port_disable(port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mvpp2_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct mvpp2_port *port = mvpp2_phylink_to_port(config);</div><div class='add'>+</div><div class='add'>+	mvpp2_modify(port-&gt;base + MVPP2_GMAC_LPI_CTRL1,</div><div class='add'>+		     MVPP2_GMAC_LPI_CTRL1_REQ_EN, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mvpp2_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,</div><div class='add'>+				   bool tx_clk_stop)</div><div class='add'>+{</div><div class='add'>+	struct mvpp2_port *port = mvpp2_phylink_to_port(config);</div><div class='add'>+	u32 ts, tw, lpi1, status;</div><div class='add'>+</div><div class='add'>+	status = readl(port-&gt;base + MVPP2_GMAC_STATUS0);</div><div class='add'>+	if (status &amp; MVPP2_GMAC_STATUS0_GMII_SPEED) {</div><div class='add'>+		/* At 1G speeds, the timer resolution are 1us, and</div><div class='add'>+		 * 802.3 says tw is 16.5us. Round up to 17us.</div><div class='add'>+		 */</div><div class='add'>+		tw = 17;</div><div class='add'>+		ts = timer;</div><div class='add'>+	} else {</div><div class='add'>+		/* At 100M speeds, the timer resolutions are 10us, and</div><div class='add'>+		 * 802.3 says tw is 30us.</div><div class='add'>+		 */</div><div class='add'>+		tw = 3;</div><div class='add'>+		ts = DIV_ROUND_UP(timer, 10);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ts &gt; 255)</div><div class='add'>+		ts = 255;</div><div class='add'>+</div><div class='add'>+	/* Configure ts */</div><div class='add'>+	mvpp2_modify(port-&gt;base + MVPP2_GMAC_LPI_CTRL0,</div><div class='add'>+		     MVPP2_GMAC_LPI_CTRL0_TS_MASK,</div><div class='add'>+		     FIELD_PREP(MVPP2_GMAC_LPI_CTRL0_TS_MASK, ts));</div><div class='add'>+</div><div class='add'>+	lpi1 = readl(port-&gt;base + MVPP2_GMAC_LPI_CTRL1);</div><div class='add'>+</div><div class='add'>+	/* Configure tw */</div><div class='add'>+	lpi1 = u32_replace_bits(lpi1, tw, MVPP2_GMAC_LPI_CTRL1_TW_MASK);</div><div class='add'>+</div><div class='add'>+	/* Enable LPI generation */</div><div class='add'>+	writel(lpi1 | MVPP2_GMAC_LPI_CTRL1_REQ_EN,</div><div class='add'>+	       port-&gt;base + MVPP2_GMAC_LPI_CTRL1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct phylink_mac_ops mvpp2_phylink_ops = {</div><div class='ctx'> 	.mac_select_pcs = mvpp2_select_pcs,</div><div class='ctx'> 	.mac_prepare = mvpp2_mac_prepare,</div><div class='hunk'>@@ -6672,6 +6779,8 @@ static const struct phylink_mac_ops mvpp2_phylink_ops = {</div><div class='ctx'> 	.mac_finish = mvpp2_mac_finish,</div><div class='ctx'> 	.mac_link_up = mvpp2_mac_link_up,</div><div class='ctx'> 	.mac_link_down = mvpp2_mac_link_down,</div><div class='add'>+	.mac_enable_tx_lpi = mvpp2_mac_enable_tx_lpi,</div><div class='add'>+	.mac_disable_tx_lpi = mvpp2_mac_disable_tx_lpi,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Work-around for ACPI */</div><div class='hunk'>@@ -6901,9 +7010,8 @@ static int mvpp2_port_probe(struct platform_device *pdev,</div><div class='ctx'> 		for (thread = 0; thread &lt; priv-&gt;nthreads; thread++) {</div><div class='ctx'> 			port_pcpu = per_cpu_ptr(port-&gt;pcpu, thread);</div><div class='ctx'> </div><div class='del'>-			hrtimer_init(&amp;port_pcpu-&gt;tx_done_timer, CLOCK_MONOTONIC,</div><div class='del'>-				     HRTIMER_MODE_REL_PINNED_SOFT);</div><div class='del'>-			port_pcpu-&gt;tx_done_timer.function = mvpp2_hr_timer_cb;</div><div class='add'>+			hrtimer_setup(&amp;port_pcpu-&gt;tx_done_timer, mvpp2_hr_timer_cb, CLOCK_MONOTONIC,</div><div class='add'>+				      HRTIMER_MODE_REL_PINNED_SOFT);</div><div class='ctx'> 			port_pcpu-&gt;timer_scheduled = false;</div><div class='ctx'> 			port_pcpu-&gt;dev = dev;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -6940,9 +7048,7 @@ static int mvpp2_port_probe(struct platform_device *pdev,</div><div class='ctx'> 	dev-&gt;dev_port = port-&gt;id;</div><div class='ctx'> </div><div class='ctx'> 	port-&gt;pcs_gmac.ops = &amp;mvpp2_phylink_gmac_pcs_ops;</div><div class='del'>-	port-&gt;pcs_gmac.neg_mode = true;</div><div class='ctx'> 	port-&gt;pcs_xlg.ops = &amp;mvpp2_phylink_xlg_pcs_ops;</div><div class='del'>-	port-&gt;pcs_xlg.neg_mode = true;</div><div class='ctx'> </div><div class='ctx'> 	if (!mvpp2_use_acpi_compat_mode(port_fwnode)) {</div><div class='ctx'> 		port-&gt;phylink_config.dev = &amp;dev-&gt;dev;</div><div class='hunk'>@@ -6950,6 +7056,15 @@ static int mvpp2_port_probe(struct platform_device *pdev,</div><div class='ctx'> 		port-&gt;phylink_config.mac_capabilities =</div><div class='ctx'> 			MAC_2500FD | MAC_1000FD | MAC_100 | MAC_10;</div><div class='ctx'> </div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+			  port-&gt;phylink_config.lpi_interfaces);</div><div class='add'>+</div><div class='add'>+		port-&gt;phylink_config.lpi_capabilities = MAC_1000FD | MAC_100FD;</div><div class='add'>+</div><div class='add'>+		/* Setup EEE.  Choose 250us idle. */</div><div class='add'>+		port-&gt;phylink_config.lpi_timer_default = 250;</div><div class='add'>+		port-&gt;phylink_config.eee_enabled_default = true;</div><div class='add'>+</div><div class='ctx'> 		if (port-&gt;priv-&gt;global_tx_fc)</div><div class='ctx'> 			port-&gt;phylink_config.mac_capabilities |=</div><div class='ctx'> 				MAC_SYM_PAUSE | MAC_ASYM_PAUSE;</div><div class='hunk'>@@ -7024,6 +7139,8 @@ static int mvpp2_port_probe(struct platform_device *pdev,</div><div class='ctx'> 			goto err_free_port_pcpu;</div><div class='ctx'> 		}</div><div class='ctx'> 		port-&gt;phylink = phylink;</div><div class='add'>+</div><div class='add'>+		mvpp2_mac_disable_tx_lpi(&amp;port-&gt;phylink_config);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev_warn(&amp;pdev-&gt;dev, "Use link irqs for port#%d. FW update required\n", port-&gt;id);</div><div class='ctx'> 		port-&gt;phylink = NULL;</div><div class='hunk'>@@ -7627,8 +7744,9 @@ static int mvpp2_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (mvpp2_read(priv, MVPP2_VER_ID_REG) == MVPP2_VER_PP23)</div><div class='ctx'> 		priv-&gt;hw_version = MVPP23;</div><div class='ctx'> </div><div class='del'>-	/* Init mss lock */</div><div class='add'>+	/* Init locks for shared packet processor resources */</div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;mss_spinlock);</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize network controller */</div><div class='ctx'> 	err = mvpp2_init(pdev, priv);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c<br/>index 9af22f497a40..93e978bdf303 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c</a></div><div class='hunk'>@@ -23,6 +23,8 @@ static int mvpp2_prs_hw_write(struct mvpp2 *priv, struct mvpp2_prs_entry *pe)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	lockdep_assert_held(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	if (pe-&gt;index &gt; MVPP2_PRS_TCAM_SRAM_SIZE - 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -43,11 +45,13 @@ static int mvpp2_prs_hw_write(struct mvpp2 *priv, struct mvpp2_prs_entry *pe)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initialize tcam entry from hw */</div><div class='del'>-int mvpp2_prs_init_from_hw(struct mvpp2 *priv, struct mvpp2_prs_entry *pe,</div><div class='del'>-			   int tid)</div><div class='add'>+static int __mvpp2_prs_init_from_hw(struct mvpp2 *priv,</div><div class='add'>+				    struct mvpp2_prs_entry *pe, int tid)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	lockdep_assert_held(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	if (tid &gt; MVPP2_PRS_TCAM_SRAM_SIZE - 1)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -73,6 +77,18 @@ int mvpp2_prs_init_from_hw(struct mvpp2 *priv, struct mvpp2_prs_entry *pe,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mvpp2_prs_init_from_hw(struct mvpp2 *priv, struct mvpp2_prs_entry *pe,</div><div class='add'>+			   int tid)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+	err = __mvpp2_prs_init_from_hw(priv, pe, tid);</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Invalidate tcam hw entry */</div><div class='ctx'> static void mvpp2_prs_hw_inv(struct mvpp2 *priv, int index)</div><div class='ctx'> {</div><div class='hunk'>@@ -374,7 +390,7 @@ static int mvpp2_prs_flow_find(struct mvpp2 *priv, int flow)</div><div class='ctx'> 		    priv-&gt;prs_shadow[tid].lu != MVPP2_PRS_LU_FLOWS)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> 		bits = mvpp2_prs_sram_ai_get(&amp;pe);</div><div class='ctx'> </div><div class='ctx'> 		/* Sram store classification lookup ID in AI bits [5:0] */</div><div class='hunk'>@@ -441,7 +457,7 @@ static void mvpp2_prs_mac_drop_all_set(struct mvpp2 *priv, int port, bool add)</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;prs_shadow[MVPP2_PE_DROP_ALL].valid) {</div><div class='ctx'> 		/* Entry exist - update port only */</div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, MVPP2_PE_DROP_ALL);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, MVPP2_PE_DROP_ALL);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Entry doesn't exist - create new */</div><div class='ctx'> 		memset(&amp;pe, 0, sizeof(pe));</div><div class='hunk'>@@ -469,14 +485,17 @@ static void mvpp2_prs_mac_drop_all_set(struct mvpp2 *priv, int port, bool add)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Set port to unicast or multicast promiscuous mode */</div><div class='del'>-void mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port,</div><div class='del'>-			       enum mvpp2_prs_l2_cast l2_cast, bool add)</div><div class='add'>+static void __mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port,</div><div class='add'>+					enum mvpp2_prs_l2_cast l2_cast,</div><div class='add'>+					bool add)</div><div class='ctx'> {</div><div class='ctx'> 	struct mvpp2_prs_entry pe;</div><div class='ctx'> 	unsigned char cast_match;</div><div class='ctx'> 	unsigned int ri;</div><div class='ctx'> 	int tid;</div><div class='ctx'> </div><div class='add'>+	lockdep_assert_held(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	if (l2_cast == MVPP2_PRS_L2_UNI_CAST) {</div><div class='ctx'> 		cast_match = MVPP2_PRS_UCAST_VAL;</div><div class='ctx'> 		tid = MVPP2_PE_MAC_UC_PROMISCUOUS;</div><div class='hunk'>@@ -489,7 +508,7 @@ void mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port,</div><div class='ctx'> </div><div class='ctx'> 	/* promiscuous mode - Accept unknown unicast or multicast packets */</div><div class='ctx'> 	if (priv-&gt;prs_shadow[tid].valid) {</div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		memset(&amp;pe, 0, sizeof(pe));</div><div class='ctx'> 		mvpp2_prs_tcam_lu_set(&amp;pe, MVPP2_PRS_LU_MAC);</div><div class='hunk'>@@ -522,6 +541,14 @@ void mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port,</div><div class='ctx'> 	mvpp2_prs_hw_write(priv, &amp;pe);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port,</div><div class='add'>+			       enum mvpp2_prs_l2_cast l2_cast, bool add)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+	__mvpp2_prs_mac_promisc_set(priv, port, l2_cast, add);</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Set entry for dsa packets */</div><div class='ctx'> static void mvpp2_prs_dsa_tag_set(struct mvpp2 *priv, int port, bool add,</div><div class='ctx'> 				  bool tagged, bool extend)</div><div class='hunk'>@@ -539,7 +566,7 @@ static void mvpp2_prs_dsa_tag_set(struct mvpp2 *priv, int port, bool add,</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;prs_shadow[tid].valid) {</div><div class='ctx'> 		/* Entry exist - update port only */</div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Entry doesn't exist - create new */</div><div class='ctx'> 		memset(&amp;pe, 0, sizeof(pe));</div><div class='hunk'>@@ -610,7 +637,7 @@ static void mvpp2_prs_dsa_tag_ethertype_set(struct mvpp2 *priv, int port,</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;prs_shadow[tid].valid) {</div><div class='ctx'> 		/* Entry exist - update port only */</div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Entry doesn't exist - create new */</div><div class='ctx'> 		memset(&amp;pe, 0, sizeof(pe));</div><div class='hunk'>@@ -673,7 +700,7 @@ static int mvpp2_prs_vlan_find(struct mvpp2 *priv, unsigned short tpid, int ai)</div><div class='ctx'> 		    priv-&gt;prs_shadow[tid].lu != MVPP2_PRS_LU_VLAN)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> 		match = mvpp2_prs_tcam_data_cmp(&amp;pe, 0, tpid);</div><div class='ctx'> 		if (!match)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -726,7 +753,7 @@ static int mvpp2_prs_vlan_add(struct mvpp2 *priv, unsigned short tpid, int ai,</div><div class='ctx'> 			    priv-&gt;prs_shadow[tid_aux].lu != MVPP2_PRS_LU_VLAN)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			mvpp2_prs_init_from_hw(priv, &amp;pe, tid_aux);</div><div class='add'>+			__mvpp2_prs_init_from_hw(priv, &amp;pe, tid_aux);</div><div class='ctx'> 			ri_bits = mvpp2_prs_sram_ri_get(&amp;pe);</div><div class='ctx'> 			if ((ri_bits &amp; MVPP2_PRS_RI_VLAN_MASK) ==</div><div class='ctx'> 			    MVPP2_PRS_RI_VLAN_DOUBLE)</div><div class='hunk'>@@ -760,7 +787,7 @@ static int mvpp2_prs_vlan_add(struct mvpp2 *priv, unsigned short tpid, int ai,</div><div class='ctx'> </div><div class='ctx'> 		mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VLAN);</div><div class='ctx'> 	} else {</div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Update ports' mask */</div><div class='ctx'> 	mvpp2_prs_tcam_port_map_set(&amp;pe, port_map);</div><div class='hunk'>@@ -800,7 +827,7 @@ static int mvpp2_prs_double_vlan_find(struct mvpp2 *priv, unsigned short tpid1,</div><div class='ctx'> 		    priv-&gt;prs_shadow[tid].lu != MVPP2_PRS_LU_VLAN)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> </div><div class='ctx'> 		match = mvpp2_prs_tcam_data_cmp(&amp;pe, 0, tpid1) &amp;&amp;</div><div class='ctx'> 			mvpp2_prs_tcam_data_cmp(&amp;pe, 4, tpid2);</div><div class='hunk'>@@ -849,7 +876,7 @@ static int mvpp2_prs_double_vlan_add(struct mvpp2 *priv, unsigned short tpid1,</div><div class='ctx'> 			    priv-&gt;prs_shadow[tid_aux].lu != MVPP2_PRS_LU_VLAN)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			mvpp2_prs_init_from_hw(priv, &amp;pe, tid_aux);</div><div class='add'>+			__mvpp2_prs_init_from_hw(priv, &amp;pe, tid_aux);</div><div class='ctx'> 			ri_bits = mvpp2_prs_sram_ri_get(&amp;pe);</div><div class='ctx'> 			ri_bits &amp;= MVPP2_PRS_RI_VLAN_MASK;</div><div class='ctx'> 			if (ri_bits == MVPP2_PRS_RI_VLAN_SINGLE ||</div><div class='hunk'>@@ -880,7 +907,7 @@ static int mvpp2_prs_double_vlan_add(struct mvpp2 *priv, unsigned short tpid1,</div><div class='ctx'> </div><div class='ctx'> 		mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VLAN);</div><div class='ctx'> 	} else {</div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Update ports' mask */</div><div class='hunk'>@@ -1213,8 +1240,8 @@ static void mvpp2_prs_mac_init(struct mvpp2 *priv)</div><div class='ctx'> 	/* Create dummy entries for drop all and promiscuous modes */</div><div class='ctx'> 	mvpp2_prs_drop_fc(priv);</div><div class='ctx'> 	mvpp2_prs_mac_drop_all_set(priv, 0, false);</div><div class='del'>-	mvpp2_prs_mac_promisc_set(priv, 0, MVPP2_PRS_L2_UNI_CAST, false);</div><div class='del'>-	mvpp2_prs_mac_promisc_set(priv, 0, MVPP2_PRS_L2_MULTI_CAST, false);</div><div class='add'>+	__mvpp2_prs_mac_promisc_set(priv, 0, MVPP2_PRS_L2_UNI_CAST, false);</div><div class='add'>+	__mvpp2_prs_mac_promisc_set(priv, 0, MVPP2_PRS_L2_MULTI_CAST, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Set default entries for various types of dsa packets */</div><div class='hunk'>@@ -1533,12 +1560,6 @@ static int mvpp2_prs_vlan_init(struct platform_device *pdev, struct mvpp2 *priv)</div><div class='ctx'> 	struct mvpp2_prs_entry pe;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;prs_double_vlans = devm_kcalloc(&amp;pdev-&gt;dev, sizeof(bool),</div><div class='del'>-					      MVPP2_PRS_DBL_VLANS_MAX,</div><div class='del'>-					      GFP_KERNEL);</div><div class='del'>-	if (!priv-&gt;prs_double_vlans)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	/* Double VLAN: 0x88A8, 0x8100 */</div><div class='ctx'> 	err = mvpp2_prs_double_vlan_add(priv, ETH_P_8021AD, ETH_P_8021Q,</div><div class='ctx'> 					MVPP2_PRS_PORT_MASK);</div><div class='hunk'>@@ -1941,7 +1962,7 @@ static int mvpp2_prs_vid_range_find(struct mvpp2_port *port, u16 vid, u16 mask)</div><div class='ctx'> 		    port-&gt;priv-&gt;prs_shadow[tid].lu != MVPP2_PRS_LU_VID)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		mvpp2_prs_init_from_hw(port-&gt;priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(port-&gt;priv, &amp;pe, tid);</div><div class='ctx'> </div><div class='ctx'> 		mvpp2_prs_tcam_data_byte_get(&amp;pe, 2, &amp;byte[0], &amp;enable[0]);</div><div class='ctx'> 		mvpp2_prs_tcam_data_byte_get(&amp;pe, 3, &amp;byte[1], &amp;enable[1]);</div><div class='hunk'>@@ -1970,6 +1991,8 @@ int mvpp2_prs_vid_entry_add(struct mvpp2_port *port, u16 vid)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;pe, 0, sizeof(pe));</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	/* Scan TCAM and see if entry with this &lt;vid,port&gt; already exist */</div><div class='ctx'> 	tid = mvpp2_prs_vid_range_find(port, vid, mask);</div><div class='ctx'> </div><div class='hunk'>@@ -1988,8 +2011,10 @@ int mvpp2_prs_vid_entry_add(struct mvpp2_port *port, u16 vid)</div><div class='ctx'> 						MVPP2_PRS_VLAN_FILT_MAX_ENTRY);</div><div class='ctx'> </div><div class='ctx'> 		/* There isn't room for a new VID filter */</div><div class='del'>-		if (tid &lt; 0)</div><div class='add'>+		if (tid &lt; 0) {</div><div class='add'>+			spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 			return tid;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		mvpp2_prs_tcam_lu_set(&amp;pe, MVPP2_PRS_LU_VID);</div><div class='ctx'> 		pe.index = tid;</div><div class='hunk'>@@ -1997,7 +2022,7 @@ int mvpp2_prs_vid_entry_add(struct mvpp2_port *port, u16 vid)</div><div class='ctx'> 		/* Mask all ports */</div><div class='ctx'> 		mvpp2_prs_tcam_port_map_set(&amp;pe, 0);</div><div class='ctx'> 	} else {</div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the current port */</div><div class='hunk'>@@ -2019,6 +2044,7 @@ int mvpp2_prs_vid_entry_add(struct mvpp2_port *port, u16 vid)</div><div class='ctx'> 	mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VID);</div><div class='ctx'> 	mvpp2_prs_hw_write(priv, &amp;pe);</div><div class='ctx'> </div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2028,15 +2054,16 @@ void mvpp2_prs_vid_entry_remove(struct mvpp2_port *port, u16 vid)</div><div class='ctx'> 	struct mvpp2 *priv = port-&gt;priv;</div><div class='ctx'> 	int tid;</div><div class='ctx'> </div><div class='del'>-	/* Scan TCAM and see if entry with this &lt;vid,port&gt; already exist */</div><div class='del'>-	tid = mvpp2_prs_vid_range_find(port, vid, 0xfff);</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> </div><div class='del'>-	/* No such entry */</div><div class='del'>-	if (tid &lt; 0)</div><div class='del'>-		return;</div><div class='add'>+	/* Invalidate TCAM entry with this &lt;vid,port&gt;, if it exists */</div><div class='add'>+	tid = mvpp2_prs_vid_range_find(port, vid, 0xfff);</div><div class='add'>+	if (tid &gt;= 0) {</div><div class='add'>+		mvpp2_prs_hw_inv(priv, tid);</div><div class='add'>+		priv-&gt;prs_shadow[tid].valid = false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	mvpp2_prs_hw_inv(priv, tid);</div><div class='del'>-	priv-&gt;prs_shadow[tid].valid = false;</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Remove all existing VID filters on this port */</div><div class='hunk'>@@ -2045,6 +2072,8 @@ void mvpp2_prs_vid_remove_all(struct mvpp2_port *port)</div><div class='ctx'> 	struct mvpp2 *priv = port-&gt;priv;</div><div class='ctx'> 	int tid;</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	for (tid = MVPP2_PRS_VID_PORT_FIRST(port-&gt;id);</div><div class='ctx'> 	     tid &lt;= MVPP2_PRS_VID_PORT_LAST(port-&gt;id); tid++) {</div><div class='ctx'> 		if (priv-&gt;prs_shadow[tid].valid) {</div><div class='hunk'>@@ -2052,6 +2081,8 @@ void mvpp2_prs_vid_remove_all(struct mvpp2_port *port)</div><div class='ctx'> 			priv-&gt;prs_shadow[tid].valid = false;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Remove VID filering entry for this port */</div><div class='hunk'>@@ -2060,10 +2091,14 @@ void mvpp2_prs_vid_disable_filtering(struct mvpp2_port *port)</div><div class='ctx'> 	unsigned int tid = MVPP2_PRS_VID_PORT_DFLT(port-&gt;id);</div><div class='ctx'> 	struct mvpp2 *priv = port-&gt;priv;</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	/* Invalidate the guard entry */</div><div class='ctx'> 	mvpp2_prs_hw_inv(priv, tid);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;prs_shadow[tid].valid = false;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Add guard entry that drops packets when no VID is matched on this port */</div><div class='hunk'>@@ -2079,6 +2114,8 @@ void mvpp2_prs_vid_enable_filtering(struct mvpp2_port *port)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;pe, 0, sizeof(pe));</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	pe.index = tid;</div><div class='ctx'> </div><div class='ctx'> 	reg_val = mvpp2_read(priv, MVPP2_MH_REG(port-&gt;id));</div><div class='hunk'>@@ -2111,6 +2148,8 @@ void mvpp2_prs_vid_enable_filtering(struct mvpp2_port *port)</div><div class='ctx'> 	/* Update shadow table */</div><div class='ctx'> 	mvpp2_prs_shadow_set(priv, pe.index, MVPP2_PRS_LU_VID);</div><div class='ctx'> 	mvpp2_prs_hw_write(priv, &amp;pe);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Parser default initialization */</div><div class='hunk'>@@ -2118,6 +2157,20 @@ int mvpp2_prs_default_init(struct platform_device *pdev, struct mvpp2 *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int err, index, i;</div><div class='ctx'> </div><div class='add'>+	priv-&gt;prs_shadow = devm_kcalloc(&amp;pdev-&gt;dev, MVPP2_PRS_TCAM_SRAM_SIZE,</div><div class='add'>+					sizeof(*priv-&gt;prs_shadow),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;prs_shadow)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;prs_double_vlans = devm_kcalloc(&amp;pdev-&gt;dev, sizeof(bool),</div><div class='add'>+					      MVPP2_PRS_DBL_VLANS_MAX,</div><div class='add'>+					      GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;prs_double_vlans)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	/* Enable tcam table */</div><div class='ctx'> 	mvpp2_write(priv, MVPP2_PRS_TCAM_CTRL_REG, MVPP2_PRS_TCAM_EN_MASK);</div><div class='ctx'> </div><div class='hunk'>@@ -2136,12 +2189,6 @@ int mvpp2_prs_default_init(struct platform_device *pdev, struct mvpp2 *priv)</div><div class='ctx'> 	for (index = 0; index &lt; MVPP2_PRS_TCAM_SRAM_SIZE; index++)</div><div class='ctx'> 		mvpp2_prs_hw_inv(priv, index);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;prs_shadow = devm_kcalloc(&amp;pdev-&gt;dev, MVPP2_PRS_TCAM_SRAM_SIZE,</div><div class='del'>-					sizeof(*priv-&gt;prs_shadow),</div><div class='del'>-					GFP_KERNEL);</div><div class='del'>-	if (!priv-&gt;prs_shadow)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	/* Always start from lookup = 0 */</div><div class='ctx'> 	for (index = 0; index &lt; MVPP2_MAX_PORTS; index++)</div><div class='ctx'> 		mvpp2_prs_hw_port_init(priv, index, MVPP2_PRS_LU_MH,</div><div class='hunk'>@@ -2158,26 +2205,13 @@ int mvpp2_prs_default_init(struct platform_device *pdev, struct mvpp2 *priv)</div><div class='ctx'> 	mvpp2_prs_vid_init(priv);</div><div class='ctx'> </div><div class='ctx'> 	err = mvpp2_prs_etype_init(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = mvpp2_prs_vlan_init(pdev, priv);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = mvpp2_prs_pppoe_init(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = mvpp2_prs_ip6_init(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = mvpp2_prs_ip4_init(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	err = err ? : mvpp2_prs_vlan_init(pdev, priv);</div><div class='add'>+	err = err ? : mvpp2_prs_pppoe_init(priv);</div><div class='add'>+	err = err ? : mvpp2_prs_ip6_init(priv);</div><div class='add'>+	err = err ? : mvpp2_prs_ip4_init(priv);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Compare MAC DA with tcam entry data */</div><div class='hunk'>@@ -2217,7 +2251,7 @@ mvpp2_prs_mac_da_range_find(struct mvpp2 *priv, int pmap, const u8 *da,</div><div class='ctx'> 		    (priv-&gt;prs_shadow[tid].udf != udf_type))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> 		entry_pmap = mvpp2_prs_tcam_port_map_get(&amp;pe);</div><div class='ctx'> </div><div class='ctx'> 		if (mvpp2_prs_mac_range_equals(&amp;pe, da, mask) &amp;&amp;</div><div class='hunk'>@@ -2229,7 +2263,8 @@ mvpp2_prs_mac_da_range_find(struct mvpp2 *priv, int pmap, const u8 *da,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Update parser's mac da entry */</div><div class='del'>-int mvpp2_prs_mac_da_accept(struct mvpp2_port *port, const u8 *da, bool add)</div><div class='add'>+static int __mvpp2_prs_mac_da_accept(struct mvpp2_port *port,</div><div class='add'>+				     const u8 *da, bool add)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned char mask[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };</div><div class='ctx'> 	struct mvpp2 *priv = port-&gt;priv;</div><div class='hunk'>@@ -2261,7 +2296,7 @@ int mvpp2_prs_mac_da_accept(struct mvpp2_port *port, const u8 *da, bool add)</div><div class='ctx'> 		/* Mask all ports */</div><div class='ctx'> 		mvpp2_prs_tcam_port_map_set(&amp;pe, 0);</div><div class='ctx'> 	} else {</div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mvpp2_prs_tcam_lu_set(&amp;pe, MVPP2_PRS_LU_MAC);</div><div class='hunk'>@@ -2317,6 +2352,17 @@ int mvpp2_prs_mac_da_accept(struct mvpp2_port *port, const u8 *da, bool add)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mvpp2_prs_mac_da_accept(struct mvpp2_port *port, const u8 *da, bool add)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;port-&gt;priv-&gt;prs_spinlock);</div><div class='add'>+	err = __mvpp2_prs_mac_da_accept(port, da, add);</div><div class='add'>+	spin_unlock_bh(&amp;port-&gt;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mvpp2_prs_update_mac_da(struct net_device *dev, const u8 *da)</div><div class='ctx'> {</div><div class='ctx'> 	struct mvpp2_port *port = netdev_priv(dev);</div><div class='hunk'>@@ -2345,6 +2391,8 @@ void mvpp2_prs_mac_del_all(struct mvpp2_port *port)</div><div class='ctx'> 	unsigned long pmap;</div><div class='ctx'> 	int index, tid;</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	for (tid = MVPP2_PE_MAC_RANGE_START;</div><div class='ctx'> 	     tid &lt;= MVPP2_PE_MAC_RANGE_END; tid++) {</div><div class='ctx'> 		unsigned char da[ETH_ALEN], da_mask[ETH_ALEN];</div><div class='hunk'>@@ -2354,7 +2402,7 @@ void mvpp2_prs_mac_del_all(struct mvpp2_port *port)</div><div class='ctx'> 		    (priv-&gt;prs_shadow[tid].udf != MVPP2_PRS_UDF_MAC_DEF))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(priv, &amp;pe, tid);</div><div class='ctx'> </div><div class='ctx'> 		pmap = mvpp2_prs_tcam_port_map_get(&amp;pe);</div><div class='ctx'> </div><div class='hunk'>@@ -2375,14 +2423,17 @@ void mvpp2_prs_mac_del_all(struct mvpp2_port *port)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* Remove entry from TCAM */</div><div class='del'>-		mvpp2_prs_mac_da_accept(port, da, false);</div><div class='add'>+		__mvpp2_prs_mac_da_accept(port, da, false);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mvpp2_prs_tag_mode_set(struct mvpp2 *priv, int port, int type)</div><div class='ctx'> {</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case MVPP2_TAG_TYPE_EDSA:</div><div class='add'>+		spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 		/* Add port to EDSA entries */</div><div class='ctx'> 		mvpp2_prs_dsa_tag_set(priv, port, true,</div><div class='ctx'> 				      MVPP2_PRS_TAGGED, MVPP2_PRS_EDSA);</div><div class='hunk'>@@ -2393,9 +2444,11 @@ int mvpp2_prs_tag_mode_set(struct mvpp2 *priv, int port, int type)</div><div class='ctx'> 				      MVPP2_PRS_TAGGED, MVPP2_PRS_DSA);</div><div class='ctx'> 		mvpp2_prs_dsa_tag_set(priv, port, false,</div><div class='ctx'> 				      MVPP2_PRS_UNTAGGED, MVPP2_PRS_DSA);</div><div class='add'>+		spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case MVPP2_TAG_TYPE_DSA:</div><div class='add'>+		spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 		/* Add port to DSA entries */</div><div class='ctx'> 		mvpp2_prs_dsa_tag_set(priv, port, true,</div><div class='ctx'> 				      MVPP2_PRS_TAGGED, MVPP2_PRS_DSA);</div><div class='hunk'>@@ -2406,10 +2459,12 @@ int mvpp2_prs_tag_mode_set(struct mvpp2 *priv, int port, int type)</div><div class='ctx'> 				      MVPP2_PRS_TAGGED, MVPP2_PRS_EDSA);</div><div class='ctx'> 		mvpp2_prs_dsa_tag_set(priv, port, false,</div><div class='ctx'> 				      MVPP2_PRS_UNTAGGED, MVPP2_PRS_EDSA);</div><div class='add'>+		spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case MVPP2_TAG_TYPE_MH:</div><div class='ctx'> 	case MVPP2_TAG_TYPE_NONE:</div><div class='add'>+		spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 		/* Remove port form EDSA and DSA entries */</div><div class='ctx'> 		mvpp2_prs_dsa_tag_set(priv, port, false,</div><div class='ctx'> 				      MVPP2_PRS_TAGGED, MVPP2_PRS_DSA);</div><div class='hunk'>@@ -2419,6 +2474,7 @@ int mvpp2_prs_tag_mode_set(struct mvpp2 *priv, int port, int type)</div><div class='ctx'> 				      MVPP2_PRS_TAGGED, MVPP2_PRS_EDSA);</div><div class='ctx'> 		mvpp2_prs_dsa_tag_set(priv, port, false,</div><div class='ctx'> 				      MVPP2_PRS_UNTAGGED, MVPP2_PRS_EDSA);</div><div class='add'>+		spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -2437,11 +2493,15 @@ int mvpp2_prs_add_flow(struct mvpp2 *priv, int flow, u32 ri, u32 ri_mask)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;pe, 0, sizeof(pe));</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	tid = mvpp2_prs_tcam_first_free(priv,</div><div class='ctx'> 					MVPP2_PE_LAST_FREE_TID,</div><div class='ctx'> 					MVPP2_PE_FIRST_FREE_TID);</div><div class='del'>-	if (tid &lt; 0)</div><div class='add'>+	if (tid &lt; 0) {</div><div class='add'>+		spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 		return tid;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	pe.index = tid;</div><div class='ctx'> </div><div class='hunk'>@@ -2461,6 +2521,7 @@ int mvpp2_prs_add_flow(struct mvpp2 *priv, int flow, u32 ri, u32 ri_mask)</div><div class='ctx'> 	mvpp2_prs_tcam_port_map_set(&amp;pe, MVPP2_PRS_PORT_MASK);</div><div class='ctx'> 	mvpp2_prs_hw_write(priv, &amp;pe);</div><div class='ctx'> </div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2472,6 +2533,8 @@ int mvpp2_prs_def_flow(struct mvpp2_port *port)</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;pe, 0, sizeof(pe));</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;port-&gt;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	tid = mvpp2_prs_flow_find(port-&gt;priv, port-&gt;id);</div><div class='ctx'> </div><div class='ctx'> 	/* Such entry not exist */</div><div class='hunk'>@@ -2480,8 +2543,10 @@ int mvpp2_prs_def_flow(struct mvpp2_port *port)</div><div class='ctx'> 		tid = mvpp2_prs_tcam_first_free(port-&gt;priv,</div><div class='ctx'> 						MVPP2_PE_LAST_FREE_TID,</div><div class='ctx'> 					       MVPP2_PE_FIRST_FREE_TID);</div><div class='del'>-		if (tid &lt; 0)</div><div class='add'>+		if (tid &lt; 0) {</div><div class='add'>+			spin_unlock_bh(&amp;port-&gt;priv-&gt;prs_spinlock);</div><div class='ctx'> 			return tid;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		pe.index = tid;</div><div class='ctx'> </div><div class='hunk'>@@ -2492,13 +2557,14 @@ int mvpp2_prs_def_flow(struct mvpp2_port *port)</div><div class='ctx'> 		/* Update shadow table */</div><div class='ctx'> 		mvpp2_prs_shadow_set(port-&gt;priv, pe.index, MVPP2_PRS_LU_FLOWS);</div><div class='ctx'> 	} else {</div><div class='del'>-		mvpp2_prs_init_from_hw(port-&gt;priv, &amp;pe, tid);</div><div class='add'>+		__mvpp2_prs_init_from_hw(port-&gt;priv, &amp;pe, tid);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mvpp2_prs_tcam_lu_set(&amp;pe, MVPP2_PRS_LU_FLOWS);</div><div class='ctx'> 	mvpp2_prs_tcam_port_map_set(&amp;pe, (1 &lt;&lt; port-&gt;id));</div><div class='ctx'> 	mvpp2_prs_hw_write(port-&gt;priv, &amp;pe);</div><div class='ctx'> </div><div class='add'>+	spin_unlock_bh(&amp;port-&gt;priv-&gt;prs_spinlock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2509,11 +2575,14 @@ int mvpp2_prs_hits(struct mvpp2 *priv, int index)</div><div class='ctx'> 	if (index &gt; MVPP2_PRS_TCAM_SRAM_SIZE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='add'>+</div><div class='ctx'> 	mvpp2_write(priv, MVPP2_PRS_TCAM_HIT_IDX_REG, index);</div><div class='ctx'> </div><div class='ctx'> 	val = mvpp2_read(priv, MVPP2_PRS_TCAM_HIT_CNT_REG);</div><div class='ctx'> </div><div class='ctx'> 	val &amp;= MVPP2_PRS_TCAM_HIT_CNT_MASK;</div><div class='ctx'> </div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;prs_spinlock);</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_ethtool.c b/drivers/net/ethernet/marvell/octeon_ep/octep_ethtool.c<br/>index 4f4d58189118..01c6c0a2f283 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep/octep_ethtool.c</a></div><div class='hunk'>@@ -150,17 +150,14 @@ octep_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 				    iface_rx_stats,</div><div class='ctx'> 				    iface_tx_stats);</div><div class='ctx'> </div><div class='del'>-	for (q = 0; q &lt; oct-&gt;num_oqs; q++) {</div><div class='del'>-		struct octep_iq *iq = oct-&gt;iq[q];</div><div class='del'>-		struct octep_oq *oq = oct-&gt;oq[q];</div><div class='del'>-</div><div class='del'>-		tx_packets += iq-&gt;stats.instr_completed;</div><div class='del'>-		tx_bytes += iq-&gt;stats.bytes_sent;</div><div class='del'>-		tx_busy_errors += iq-&gt;stats.tx_busy;</div><div class='del'>-</div><div class='del'>-		rx_packets += oq-&gt;stats.packets;</div><div class='del'>-		rx_bytes += oq-&gt;stats.bytes;</div><div class='del'>-		rx_alloc_errors += oq-&gt;stats.alloc_failures;</div><div class='add'>+	for (q = 0; q &lt; OCTEP_MAX_QUEUES; q++) {</div><div class='add'>+		tx_packets += oct-&gt;stats_iq[q].instr_completed;</div><div class='add'>+		tx_bytes += oct-&gt;stats_iq[q].bytes_sent;</div><div class='add'>+		tx_busy_errors += oct-&gt;stats_iq[q].tx_busy;</div><div class='add'>+</div><div class='add'>+		rx_packets += oct-&gt;stats_oq[q].packets;</div><div class='add'>+		rx_bytes += oct-&gt;stats_oq[q].bytes;</div><div class='add'>+		rx_alloc_errors += oct-&gt;stats_oq[q].alloc_failures;</div><div class='ctx'> 	}</div><div class='ctx'> 	i = 0;</div><div class='ctx'> 	data[i++] = rx_packets;</div><div class='hunk'>@@ -198,22 +195,18 @@ octep_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 	data[i++] = iface_rx_stats-&gt;err_pkts;</div><div class='ctx'> </div><div class='ctx'> 	/* Per Tx Queue stats */</div><div class='del'>-	for (q = 0; q &lt; oct-&gt;num_iqs; q++) {</div><div class='del'>-		struct octep_iq *iq = oct-&gt;iq[q];</div><div class='del'>-</div><div class='del'>-		data[i++] = iq-&gt;stats.instr_posted;</div><div class='del'>-		data[i++] = iq-&gt;stats.instr_completed;</div><div class='del'>-		data[i++] = iq-&gt;stats.bytes_sent;</div><div class='del'>-		data[i++] = iq-&gt;stats.tx_busy;</div><div class='add'>+	for (q = 0; q &lt; OCTEP_MAX_QUEUES; q++) {</div><div class='add'>+		data[i++] = oct-&gt;stats_iq[q].instr_posted;</div><div class='add'>+		data[i++] = oct-&gt;stats_iq[q].instr_completed;</div><div class='add'>+		data[i++] = oct-&gt;stats_iq[q].bytes_sent;</div><div class='add'>+		data[i++] = oct-&gt;stats_iq[q].tx_busy;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Per Rx Queue stats */</div><div class='del'>-	for (q = 0; q &lt; oct-&gt;num_oqs; q++) {</div><div class='del'>-		struct octep_oq *oq = oct-&gt;oq[q];</div><div class='del'>-</div><div class='del'>-		data[i++] = oq-&gt;stats.packets;</div><div class='del'>-		data[i++] = oq-&gt;stats.bytes;</div><div class='del'>-		data[i++] = oq-&gt;stats.alloc_failures;</div><div class='add'>+	for (q = 0; q &lt; OCTEP_MAX_QUEUES; q++) {</div><div class='add'>+		data[i++] = oct-&gt;stats_oq[q].packets;</div><div class='add'>+		data[i++] = oct-&gt;stats_oq[q].bytes;</div><div class='add'>+		data[i++] = oct-&gt;stats_oq[q].alloc_failures;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -444,6 +437,15 @@ static int octep_set_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void octep_get_channels(struct net_device *dev,</div><div class='add'>+			       struct ethtool_channels *channel)</div><div class='add'>+{</div><div class='add'>+	struct octep_device *oct = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	channel-&gt;max_combined = CFG_GET_PORTS_MAX_IO_RINGS(oct-&gt;conf);</div><div class='add'>+	channel-&gt;combined_count = CFG_GET_PORTS_ACTIVE_IO_RINGS(oct-&gt;conf);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops octep_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo = octep_get_drvinfo,</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='hunk'>@@ -452,6 +454,7 @@ static const struct ethtool_ops octep_ethtool_ops = {</div><div class='ctx'> 	.get_ethtool_stats = octep_get_ethtool_stats,</div><div class='ctx'> 	.get_link_ksettings = octep_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings = octep_set_link_ksettings,</div><div class='add'>+	.get_channels = octep_get_channels,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void octep_set_ethtool_ops(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_main.c b/drivers/net/ethernet/marvell/octeon_ep/octep_main.c<br/>index 549436efc204..bcea3fc26a8c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep/octep_main.c</a></div><div class='hunk'>@@ -822,7 +822,7 @@ static inline int octep_iq_full_check(struct octep_iq *iq)</div><div class='ctx'> 	if (unlikely(IQ_INSTR_SPACE(iq) &gt;</div><div class='ctx'> 		     OCTEP_WAKE_QUEUE_THRESHOLD)) {</div><div class='ctx'> 		netif_start_subqueue(iq-&gt;netdev, iq-&gt;q_no);</div><div class='del'>-		iq-&gt;stats.restart_cnt++;</div><div class='add'>+		iq-&gt;stats-&gt;restart_cnt++;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -960,7 +960,7 @@ static netdev_tx_t octep_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	wmb();</div><div class='ctx'> 	/* Ring Doorbell to notify the NIC of new packets */</div><div class='ctx'> 	writel(iq-&gt;fill_cnt, iq-&gt;doorbell_reg);</div><div class='del'>-	iq-&gt;stats.instr_posted += iq-&gt;fill_cnt;</div><div class='add'>+	iq-&gt;stats-&gt;instr_posted += iq-&gt;fill_cnt;</div><div class='ctx'> 	iq-&gt;fill_cnt = 0;</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='hunk'>@@ -991,37 +991,24 @@ dma_map_err:</div><div class='ctx'> static void octep_get_stats64(struct net_device *netdev,</div><div class='ctx'> 			      struct rtnl_link_stats64 *stats)</div><div class='ctx'> {</div><div class='del'>-	u64 tx_packets, tx_bytes, rx_packets, rx_bytes;</div><div class='ctx'> 	struct octep_device *oct = netdev_priv(netdev);</div><div class='add'>+	u64 tx_packets, tx_bytes, rx_packets, rx_bytes;</div><div class='ctx'> 	int q;</div><div class='ctx'> </div><div class='del'>-	if (netif_running(netdev))</div><div class='del'>-		octep_ctrl_net_get_if_stats(oct,</div><div class='del'>-					    OCTEP_CTRL_NET_INVALID_VFID,</div><div class='del'>-					    &amp;oct-&gt;iface_rx_stats,</div><div class='del'>-					    &amp;oct-&gt;iface_tx_stats);</div><div class='del'>-</div><div class='ctx'> 	tx_packets = 0;</div><div class='ctx'> 	tx_bytes = 0;</div><div class='ctx'> 	rx_packets = 0;</div><div class='ctx'> 	rx_bytes = 0;</div><div class='del'>-	for (q = 0; q &lt; oct-&gt;num_oqs; q++) {</div><div class='del'>-		struct octep_iq *iq = oct-&gt;iq[q];</div><div class='del'>-		struct octep_oq *oq = oct-&gt;oq[q];</div><div class='del'>-</div><div class='del'>-		tx_packets += iq-&gt;stats.instr_completed;</div><div class='del'>-		tx_bytes += iq-&gt;stats.bytes_sent;</div><div class='del'>-		rx_packets += oq-&gt;stats.packets;</div><div class='del'>-		rx_bytes += oq-&gt;stats.bytes;</div><div class='add'>+	for (q = 0; q &lt; OCTEP_MAX_QUEUES; q++) {</div><div class='add'>+		tx_packets += oct-&gt;stats_iq[q].instr_completed;</div><div class='add'>+		tx_bytes += oct-&gt;stats_iq[q].bytes_sent;</div><div class='add'>+		rx_packets += oct-&gt;stats_oq[q].packets;</div><div class='add'>+		rx_bytes += oct-&gt;stats_oq[q].bytes;</div><div class='ctx'> 	}</div><div class='ctx'> 	stats-&gt;tx_packets = tx_packets;</div><div class='ctx'> 	stats-&gt;tx_bytes = tx_bytes;</div><div class='ctx'> 	stats-&gt;rx_packets = rx_packets;</div><div class='ctx'> 	stats-&gt;rx_bytes = rx_bytes;</div><div class='del'>-	stats-&gt;multicast = oct-&gt;iface_rx_stats.mcast_pkts;</div><div class='del'>-	stats-&gt;rx_errors = oct-&gt;iface_rx_stats.err_pkts;</div><div class='del'>-	stats-&gt;collisions = oct-&gt;iface_tx_stats.xscol;</div><div class='del'>-	stats-&gt;tx_fifo_errors = oct-&gt;iface_tx_stats.undflw;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1137,6 +1124,59 @@ static int octep_set_features(struct net_device *dev, netdev_features_t features</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool octep_is_vf_valid(struct octep_device *oct, int vf)</div><div class='add'>+{</div><div class='add'>+	if (vf &gt;= CFG_GET_ACTIVE_VFS(oct-&gt;conf)) {</div><div class='add'>+		netdev_err(oct-&gt;netdev, "Invalid VF ID %d\n", vf);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int octep_get_vf_config(struct net_device *dev, int vf,</div><div class='add'>+			       struct ifla_vf_info *ivi)</div><div class='add'>+{</div><div class='add'>+	struct octep_device *oct = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!octep_is_vf_valid(oct, vf))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ivi-&gt;vf = vf;</div><div class='add'>+	ether_addr_copy(ivi-&gt;mac, oct-&gt;vf_info[vf].mac_addr);</div><div class='add'>+	ivi-&gt;spoofchk = true;</div><div class='add'>+	ivi-&gt;linkstate = IFLA_VF_LINK_STATE_ENABLE;</div><div class='add'>+	ivi-&gt;trusted = false;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int octep_set_vf_mac(struct net_device *dev, int vf, u8 *mac)</div><div class='add'>+{</div><div class='add'>+	struct octep_device *oct = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!octep_is_vf_valid(oct, vf))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(mac)) {</div><div class='add'>+		dev_err(&amp;oct-&gt;pdev-&gt;dev, "Invalid  MAC Address %pM\n", mac);</div><div class='add'>+		return -EADDRNOTAVAIL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;oct-&gt;pdev-&gt;dev, "set vf-%d mac to %pM\n", vf, mac);</div><div class='add'>+	ether_addr_copy(oct-&gt;vf_info[vf].mac_addr, mac);</div><div class='add'>+	oct-&gt;vf_info[vf].flags |= OCTEON_PFVF_FLAG_MAC_SET_BY_PF;</div><div class='add'>+</div><div class='add'>+	err = octep_ctrl_net_set_mac_addr(oct, vf, mac, true);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(&amp;oct-&gt;pdev-&gt;dev,</div><div class='add'>+			"Set VF%d MAC address failed via host control Mbox\n",</div><div class='add'>+			vf);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops octep_netdev_ops = {</div><div class='ctx'> 	.ndo_open                = octep_open,</div><div class='ctx'> 	.ndo_stop                = octep_stop,</div><div class='hunk'>@@ -1146,6 +1186,8 @@ static const struct net_device_ops octep_netdev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address     = octep_set_mac,</div><div class='ctx'> 	.ndo_change_mtu          = octep_change_mtu,</div><div class='ctx'> 	.ndo_set_features        = octep_set_features,</div><div class='add'>+	.ndo_get_vf_config       = octep_get_vf_config,</div><div class='add'>+	.ndo_set_vf_mac          = octep_set_vf_mac</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1197,7 +1239,7 @@ static void octep_hb_timeout_task(struct work_struct *work)</div><div class='ctx'> 		miss_cnt);</div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	if (netif_running(oct-&gt;netdev))</div><div class='del'>-		octep_stop(oct-&gt;netdev);</div><div class='add'>+		dev_close(oct-&gt;netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_main.h b/drivers/net/ethernet/marvell/octeon_ep/octep_main.h<br/>index fee59e0e0138..81ac4267811c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_main.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep/octep_main.h</a></div><div class='hunk'>@@ -220,6 +220,7 @@ struct octep_iface_link_info {</div><div class='ctx'> /* The Octeon VF device specific info data structure.*/</div><div class='ctx'> struct octep_pfvf_info {</div><div class='ctx'> 	u8 mac_addr[ETH_ALEN];</div><div class='add'>+	u32 flags;</div><div class='ctx'> 	u32 mbox_version;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -257,11 +258,17 @@ struct octep_device {</div><div class='ctx'> 	/* Pointers to Octeon Tx queues */</div><div class='ctx'> 	struct octep_iq *iq[OCTEP_MAX_IQ];</div><div class='ctx'> </div><div class='add'>+	/* Per iq stats */</div><div class='add'>+	struct octep_iq_stats stats_iq[OCTEP_MAX_IQ];</div><div class='add'>+</div><div class='ctx'> 	/* Rx queues (OQ: Output Queue) */</div><div class='ctx'> 	u16 num_oqs;</div><div class='ctx'> 	/* Pointers to Octeon Rx queues */</div><div class='ctx'> 	struct octep_oq *oq[OCTEP_MAX_OQ];</div><div class='ctx'> </div><div class='add'>+	/* Per oq stats */</div><div class='add'>+	struct octep_oq_stats stats_oq[OCTEP_MAX_OQ];</div><div class='add'>+</div><div class='ctx'> 	/* Hardware port number of the PCIe interface */</div><div class='ctx'> 	u16 pcie_port;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c b/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c<br/>index e6eb98d70f3c..0867fab61b19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c</a></div><div class='hunk'>@@ -156,12 +156,23 @@ static void octep_pfvf_set_mac_addr(struct octep_device *oct,  u32 vf_id,</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (oct-&gt;vf_info[vf_id].flags &amp; OCTEON_PFVF_FLAG_MAC_SET_BY_PF) {</div><div class='add'>+		dev_err(&amp;oct-&gt;pdev-&gt;dev,</div><div class='add'>+			"VF%d attempted to override administrative set MAC address\n",</div><div class='add'>+			vf_id);</div><div class='add'>+		rsp-&gt;s_set_mac.type = OCTEP_PFVF_MBOX_TYPE_RSP_NACK;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = octep_ctrl_net_set_mac_addr(oct, vf_id, cmd.s_set_mac.mac_addr, true);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		rsp-&gt;s_set_mac.type = OCTEP_PFVF_MBOX_TYPE_RSP_NACK;</div><div class='del'>-		dev_err(&amp;oct-&gt;pdev-&gt;dev, "Set VF MAC address failed via host control Mbox\n");</div><div class='add'>+		dev_err(&amp;oct-&gt;pdev-&gt;dev, "Set VF%d MAC address failed via host control Mbox\n",</div><div class='add'>+			vf_id);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(oct-&gt;vf_info[vf_id].mac_addr, cmd.s_set_mac.mac_addr);</div><div class='ctx'> 	rsp-&gt;s_set_mac.type = OCTEP_PFVF_MBOX_TYPE_RSP_ACK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -171,12 +182,21 @@ static void octep_pfvf_get_mac_addr(struct octep_device *oct,  u32 vf_id,</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (oct-&gt;vf_info[vf_id].flags &amp; OCTEON_PFVF_FLAG_MAC_SET_BY_PF) {</div><div class='add'>+		dev_dbg(&amp;oct-&gt;pdev-&gt;dev, "VF%d MAC address set by PF\n", vf_id);</div><div class='add'>+		ether_addr_copy(rsp-&gt;s_set_mac.mac_addr,</div><div class='add'>+				oct-&gt;vf_info[vf_id].mac_addr);</div><div class='add'>+		rsp-&gt;s_set_mac.type = OCTEP_PFVF_MBOX_TYPE_RSP_ACK;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> 	err = octep_ctrl_net_get_mac_addr(oct, vf_id, rsp-&gt;s_set_mac.mac_addr);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		rsp-&gt;s_set_mac.type = OCTEP_PFVF_MBOX_TYPE_RSP_NACK;</div><div class='del'>-		dev_err(&amp;oct-&gt;pdev-&gt;dev, "Get VF MAC address failed via host control Mbox\n");</div><div class='add'>+		dev_err(&amp;oct-&gt;pdev-&gt;dev, "Get VF%d MAC address failed via host control Mbox\n",</div><div class='add'>+			vf_id);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+	ether_addr_copy(oct-&gt;vf_info[vf_id].mac_addr, rsp-&gt;s_set_mac.mac_addr);</div><div class='ctx'> 	rsp-&gt;s_set_mac.type = OCTEP_PFVF_MBOX_TYPE_RSP_ACK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -186,6 +206,8 @@ static void octep_pfvf_dev_remove(struct octep_device *oct,  u32 vf_id,</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	/* Reset VF-specific information maintained by the PF */</div><div class='add'>+	memset(&amp;oct-&gt;vf_info[vf_id], 0, sizeof(struct octep_pfvf_info));</div><div class='ctx'> 	err = octep_ctrl_net_dev_remove(oct, vf_id);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		rsp-&gt;s.type = OCTEP_PFVF_MBOX_TYPE_RSP_NACK;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h b/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h<br/>index 0dc6eead292a..386a095a99bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h</a></div><div class='hunk'>@@ -8,8 +8,6 @@</div><div class='ctx'> #ifndef _OCTEP_PFVF_MBOX_H_</div><div class='ctx'> #define _OCTEP_PFVF_MBOX_H_</div><div class='ctx'> </div><div class='del'>-/* VF flags */</div><div class='del'>-#define OCTEON_PFVF_FLAG_MAC_SET_BY_PF  BIT_ULL(0) /* PF has set VF MAC address */</div><div class='ctx'> #define OCTEON_SDP_16K_HW_FRS  16380UL</div><div class='ctx'> #define OCTEON_SDP_64K_HW_FRS  65531UL</div><div class='ctx'> </div><div class='hunk'>@@ -23,6 +21,10 @@ enum octep_pfvf_mbox_version {</div><div class='ctx'> </div><div class='ctx'> #define OCTEP_PFVF_MBOX_VERSION_CURRENT	OCTEP_PFVF_MBOX_VERSION_V2</div><div class='ctx'> </div><div class='add'>+/* VF flags */</div><div class='add'>+/* PF has set VF MAC address */</div><div class='add'>+#define OCTEON_PFVF_FLAG_MAC_SET_BY_PF  BIT(0)</div><div class='add'>+</div><div class='ctx'> enum octep_pfvf_mbox_opcode {</div><div class='ctx'> 	OCTEP_PFVF_MBOX_CMD_VERSION,</div><div class='ctx'> 	OCTEP_PFVF_MBOX_CMD_SET_MTU,</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_rx.c b/drivers/net/ethernet/marvell/octeon_ep/octep_rx.c<br/>index 8af75cb37c3e..82b6b19e76b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep/octep_rx.c</a></div><div class='hunk'>@@ -87,7 +87,7 @@ static int octep_oq_refill(struct octep_device *oct, struct octep_oq *oq)</div><div class='ctx'> 		page = dev_alloc_page();</div><div class='ctx'> 		if (unlikely(!page)) {</div><div class='ctx'> 			dev_err(oq-&gt;dev, "refill: rx buffer alloc failed\n");</div><div class='del'>-			oq-&gt;stats.alloc_failures++;</div><div class='add'>+			oq-&gt;stats-&gt;alloc_failures++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -98,7 +98,7 @@ static int octep_oq_refill(struct octep_device *oct, struct octep_oq *oq)</div><div class='ctx'> 				"OQ-%d buffer refill: DMA mapping error!\n",</div><div class='ctx'> 				oq-&gt;q_no);</div><div class='ctx'> 			put_page(page);</div><div class='del'>-			oq-&gt;stats.alloc_failures++;</div><div class='add'>+			oq-&gt;stats-&gt;alloc_failures++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		oq-&gt;buff_info[refill_idx].page = page;</div><div class='hunk'>@@ -134,6 +134,7 @@ static int octep_setup_oq(struct octep_device *oct, int q_no)</div><div class='ctx'> 	oq-&gt;netdev = oct-&gt;netdev;</div><div class='ctx'> 	oq-&gt;dev = &amp;oct-&gt;pdev-&gt;dev;</div><div class='ctx'> 	oq-&gt;q_no = q_no;</div><div class='add'>+	oq-&gt;stats = &amp;oct-&gt;stats_oq[q_no];</div><div class='ctx'> 	oq-&gt;max_count = CFG_GET_OQ_NUM_DESC(oct-&gt;conf);</div><div class='ctx'> 	oq-&gt;ring_size_mask = oq-&gt;max_count - 1;</div><div class='ctx'> 	oq-&gt;buffer_size = CFG_GET_OQ_BUF_SIZE(oct-&gt;conf);</div><div class='hunk'>@@ -443,7 +444,7 @@ static int __octep_oq_process_rx(struct octep_device *oct,</div><div class='ctx'> 		if (!skb) {</div><div class='ctx'> 			octep_oq_drop_rx(oq, buff_info,</div><div class='ctx'> 					 &amp;read_idx, &amp;desc_used);</div><div class='del'>-			oq-&gt;stats.alloc_failures++;</div><div class='add'>+			oq-&gt;stats-&gt;alloc_failures++;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> 		skb_reserve(skb, data_offset);</div><div class='hunk'>@@ -494,8 +495,8 @@ static int __octep_oq_process_rx(struct octep_device *oct,</div><div class='ctx'> </div><div class='ctx'> 	oq-&gt;host_read_idx = read_idx;</div><div class='ctx'> 	oq-&gt;refill_count += desc_used;</div><div class='del'>-	oq-&gt;stats.packets += pkt;</div><div class='del'>-	oq-&gt;stats.bytes += rx_bytes;</div><div class='add'>+	oq-&gt;stats-&gt;packets += pkt;</div><div class='add'>+	oq-&gt;stats-&gt;bytes += rx_bytes;</div><div class='ctx'> </div><div class='ctx'> 	return pkt;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h b/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h<br/>index 3b08e2d560dc..b4696c93d0e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_rx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep/octep_rx.h</a></div><div class='hunk'>@@ -186,8 +186,8 @@ struct octep_oq {</div><div class='ctx'> 	 */</div><div class='ctx'> 	u8 __iomem *pkts_sent_reg;</div><div class='ctx'> </div><div class='del'>-	/* Statistics for this OQ. */</div><div class='del'>-	struct octep_oq_stats stats;</div><div class='add'>+	/* Pointer to statistics for this OQ. */</div><div class='add'>+	struct octep_oq_stats *stats;</div><div class='ctx'> </div><div class='ctx'> 	/* Packets pending to be processed */</div><div class='ctx'> 	u32 pkts_pending;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_tx.c b/drivers/net/ethernet/marvell/octeon_ep/octep_tx.c<br/>index 06851b78aa28..08ee90013fef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep/octep_tx.c</a></div><div class='hunk'>@@ -81,9 +81,9 @@ int octep_iq_process_completions(struct octep_iq *iq, u16 budget)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	iq-&gt;pkts_processed += compl_pkts;</div><div class='del'>-	iq-&gt;stats.instr_completed += compl_pkts;</div><div class='del'>-	iq-&gt;stats.bytes_sent += compl_bytes;</div><div class='del'>-	iq-&gt;stats.sgentry_sent += compl_sg;</div><div class='add'>+	iq-&gt;stats-&gt;instr_completed += compl_pkts;</div><div class='add'>+	iq-&gt;stats-&gt;bytes_sent += compl_bytes;</div><div class='add'>+	iq-&gt;stats-&gt;sgentry_sent += compl_sg;</div><div class='ctx'> 	iq-&gt;flush_index = fi;</div><div class='ctx'> </div><div class='ctx'> 	netdev_tx_completed_queue(iq-&gt;netdev_q, compl_pkts, compl_bytes);</div><div class='hunk'>@@ -187,6 +187,7 @@ static int octep_setup_iq(struct octep_device *oct, int q_no)</div><div class='ctx'> 	iq-&gt;netdev = oct-&gt;netdev;</div><div class='ctx'> 	iq-&gt;dev = &amp;oct-&gt;pdev-&gt;dev;</div><div class='ctx'> 	iq-&gt;q_no = q_no;</div><div class='add'>+	iq-&gt;stats = &amp;oct-&gt;stats_iq[q_no];</div><div class='ctx'> 	iq-&gt;max_count = CFG_GET_IQ_NUM_DESC(oct-&gt;conf);</div><div class='ctx'> 	iq-&gt;ring_size_mask = iq-&gt;max_count - 1;</div><div class='ctx'> 	iq-&gt;fill_threshold = CFG_GET_IQ_DB_MIN(oct-&gt;conf);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_tx.h b/drivers/net/ethernet/marvell/octeon_ep/octep_tx.h<br/>index 875a2c34091f..58fb39dda977 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_tx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep/octep_tx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep/octep_tx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep/octep_tx.h</a></div><div class='hunk'>@@ -170,8 +170,8 @@ struct octep_iq {</div><div class='ctx'> 	 */</div><div class='ctx'> 	u16 flush_index;</div><div class='ctx'> </div><div class='del'>-	/* Statistics for this input queue. */</div><div class='del'>-	struct octep_iq_stats stats;</div><div class='add'>+	/* Pointer to statistics for this input queue. */</div><div class='add'>+	struct octep_iq_stats *stats;</div><div class='ctx'> </div><div class='ctx'> 	/* Pointer to the Virtual Base addr of the input ring. */</div><div class='ctx'> 	struct octep_tx_desc_hw *desc_ring;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c<br/>index 7b21439a315f..241a7e7c7ad2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c</a></div><div class='hunk'>@@ -114,12 +114,9 @@ static void octep_vf_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 	iface_tx_stats = &amp;oct-&gt;iface_tx_stats;</div><div class='ctx'> 	iface_rx_stats = &amp;oct-&gt;iface_rx_stats;</div><div class='ctx'> </div><div class='del'>-	for (q = 0; q &lt; oct-&gt;num_oqs; q++) {</div><div class='del'>-		struct octep_vf_iq *iq = oct-&gt;iq[q];</div><div class='del'>-		struct octep_vf_oq *oq = oct-&gt;oq[q];</div><div class='del'>-</div><div class='del'>-		tx_busy_errors += iq-&gt;stats.tx_busy;</div><div class='del'>-		rx_alloc_errors += oq-&gt;stats.alloc_failures;</div><div class='add'>+	for (q = 0; q &lt; OCTEP_VF_MAX_QUEUES; q++) {</div><div class='add'>+		tx_busy_errors += oct-&gt;stats_iq[q].tx_busy;</div><div class='add'>+		rx_alloc_errors += oct-&gt;stats_oq[q].alloc_failures;</div><div class='ctx'> 	}</div><div class='ctx'> 	i = 0;</div><div class='ctx'> 	data[i++] = rx_alloc_errors;</div><div class='hunk'>@@ -134,22 +131,18 @@ static void octep_vf_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 	data[i++] = iface_rx_stats-&gt;dropped_octets_fifo_full;</div><div class='ctx'> </div><div class='ctx'> 	/* Per Tx Queue stats */</div><div class='del'>-	for (q = 0; q &lt; oct-&gt;num_iqs; q++) {</div><div class='del'>-		struct octep_vf_iq *iq = oct-&gt;iq[q];</div><div class='del'>-</div><div class='del'>-		data[i++] = iq-&gt;stats.instr_posted;</div><div class='del'>-		data[i++] = iq-&gt;stats.instr_completed;</div><div class='del'>-		data[i++] = iq-&gt;stats.bytes_sent;</div><div class='del'>-		data[i++] = iq-&gt;stats.tx_busy;</div><div class='add'>+	for (q = 0; q &lt; OCTEP_VF_MAX_QUEUES; q++) {</div><div class='add'>+		data[i++] = oct-&gt;stats_iq[q].instr_posted;</div><div class='add'>+		data[i++] = oct-&gt;stats_iq[q].instr_completed;</div><div class='add'>+		data[i++] = oct-&gt;stats_iq[q].bytes_sent;</div><div class='add'>+		data[i++] = oct-&gt;stats_iq[q].tx_busy;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Per Rx Queue stats */</div><div class='ctx'> 	for (q = 0; q &lt; oct-&gt;num_oqs; q++) {</div><div class='del'>-		struct octep_vf_oq *oq = oct-&gt;oq[q];</div><div class='del'>-</div><div class='del'>-		data[i++] = oq-&gt;stats.packets;</div><div class='del'>-		data[i++] = oq-&gt;stats.bytes;</div><div class='del'>-		data[i++] = oq-&gt;stats.alloc_failures;</div><div class='add'>+		data[i++] = oct-&gt;stats_oq[q].packets;</div><div class='add'>+		data[i++] = oct-&gt;stats_oq[q].bytes;</div><div class='add'>+		data[i++] = oct-&gt;stats_oq[q].alloc_failures;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -251,6 +244,15 @@ static int octep_vf_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void octep_vf_get_channels(struct net_device *dev,</div><div class='add'>+				  struct ethtool_channels *channel)</div><div class='add'>+{</div><div class='add'>+	struct octep_vf_device *oct = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	channel-&gt;max_combined = CFG_GET_PORTS_MAX_IO_RINGS(oct-&gt;conf);</div><div class='add'>+	channel-&gt;combined_count = CFG_GET_PORTS_ACTIVE_IO_RINGS(oct-&gt;conf);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops octep_vf_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo = octep_vf_get_drvinfo,</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='hunk'>@@ -258,6 +260,7 @@ static const struct ethtool_ops octep_vf_ethtool_ops = {</div><div class='ctx'> 	.get_sset_count = octep_vf_get_sset_count,</div><div class='ctx'> 	.get_ethtool_stats = octep_vf_get_ethtool_stats,</div><div class='ctx'> 	.get_link_ksettings = octep_vf_get_link_ksettings,</div><div class='add'>+	.get_channels = octep_vf_get_channels,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void octep_vf_set_ethtool_ops(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c<br/>index 7e6771c9cdbb..420c3f4cf741 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c</a></div><div class='hunk'>@@ -18,8 +18,6 @@</div><div class='ctx'> #include "octep_vf_config.h"</div><div class='ctx'> #include "octep_vf_main.h"</div><div class='ctx'> </div><div class='del'>-struct workqueue_struct *octep_vf_wq;</div><div class='del'>-</div><div class='ctx'> /* Supported Devices */</div><div class='ctx'> static const struct pci_device_id octep_vf_pci_id_tbl[] = {</div><div class='ctx'> 	{PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CN93_VF)},</div><div class='hunk'>@@ -574,7 +572,7 @@ static int octep_vf_iq_full_check(struct octep_vf_iq *iq)</div><div class='ctx'> 		  * caused queues to get re-enabled after</div><div class='ctx'> 		  * being stopped</div><div class='ctx'> 		  */</div><div class='del'>-		iq-&gt;stats.restart_cnt++;</div><div class='add'>+		iq-&gt;stats-&gt;restart_cnt++;</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case 1: /* Queue left enabled, since IQ is not yet full*/</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -731,7 +729,7 @@ ring_dbell:</div><div class='ctx'> 	/* Flush the hw descriptors before writing to doorbell */</div><div class='ctx'> 	smp_wmb();</div><div class='ctx'> 	writel(iq-&gt;fill_cnt, iq-&gt;doorbell_reg);</div><div class='del'>-	iq-&gt;stats.instr_posted += iq-&gt;fill_cnt;</div><div class='add'>+	iq-&gt;stats-&gt;instr_posted += iq-&gt;fill_cnt;</div><div class='ctx'> 	iq-&gt;fill_cnt = 0;</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -786,27 +784,16 @@ static void octep_vf_get_stats64(struct net_device *netdev,</div><div class='ctx'> 	tx_bytes = 0;</div><div class='ctx'> 	rx_packets = 0;</div><div class='ctx'> 	rx_bytes = 0;</div><div class='del'>-	for (q = 0; q &lt; oct-&gt;num_oqs; q++) {</div><div class='del'>-		struct octep_vf_iq *iq = oct-&gt;iq[q];</div><div class='del'>-		struct octep_vf_oq *oq = oct-&gt;oq[q];</div><div class='del'>-</div><div class='del'>-		tx_packets += iq-&gt;stats.instr_completed;</div><div class='del'>-		tx_bytes += iq-&gt;stats.bytes_sent;</div><div class='del'>-		rx_packets += oq-&gt;stats.packets;</div><div class='del'>-		rx_bytes += oq-&gt;stats.bytes;</div><div class='add'>+	for (q = 0; q &lt; OCTEP_VF_MAX_QUEUES; q++) {</div><div class='add'>+		tx_packets += oct-&gt;stats_iq[q].instr_completed;</div><div class='add'>+		tx_bytes += oct-&gt;stats_iq[q].bytes_sent;</div><div class='add'>+		rx_packets += oct-&gt;stats_oq[q].packets;</div><div class='add'>+		rx_bytes += oct-&gt;stats_oq[q].bytes;</div><div class='ctx'> 	}</div><div class='ctx'> 	stats-&gt;tx_packets = tx_packets;</div><div class='ctx'> 	stats-&gt;tx_bytes = tx_bytes;</div><div class='ctx'> 	stats-&gt;rx_packets = rx_packets;</div><div class='ctx'> 	stats-&gt;rx_bytes = rx_bytes;</div><div class='del'>-	if (!octep_vf_get_if_stats(oct)) {</div><div class='del'>-		stats-&gt;multicast = oct-&gt;iface_rx_stats.mcast_pkts;</div><div class='del'>-		stats-&gt;rx_errors = oct-&gt;iface_rx_stats.err_pkts;</div><div class='del'>-		stats-&gt;rx_dropped = oct-&gt;iface_rx_stats.dropped_pkts_fifo_full +</div><div class='del'>-				    oct-&gt;iface_rx_stats.err_pkts;</div><div class='del'>-		stats-&gt;rx_missed_errors = oct-&gt;iface_rx_stats.dropped_pkts_fifo_full;</div><div class='del'>-		stats-&gt;tx_dropped = oct-&gt;iface_tx_stats.dropped;</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -846,7 +833,9 @@ static void octep_vf_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='ctx'> 	struct octep_vf_device *oct = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	netdev_hold(netdev, NULL, GFP_ATOMIC);</div><div class='del'>-	schedule_work(&amp;oct-&gt;tx_timeout_task);</div><div class='add'>+	if (!schedule_work(&amp;oct-&gt;tx_timeout_task))</div><div class='add'>+		netdev_put(netdev, NULL);</div><div class='add'>+</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int octep_vf_set_mac(struct net_device *netdev, void *p)</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h<br/>index 5769f62545cd..b9f13506f462 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h</a></div><div class='hunk'>@@ -246,11 +246,17 @@ struct octep_vf_device {</div><div class='ctx'> 	/* Pointers to Octeon Tx queues */</div><div class='ctx'> 	struct octep_vf_iq *iq[OCTEP_VF_MAX_IQ];</div><div class='ctx'> </div><div class='add'>+	/* Per iq stats */</div><div class='add'>+	struct octep_vf_iq_stats stats_iq[OCTEP_VF_MAX_IQ];</div><div class='add'>+</div><div class='ctx'> 	/* Rx queues (OQ: Output Queue) */</div><div class='ctx'> 	u16 num_oqs;</div><div class='ctx'> 	/* Pointers to Octeon Rx queues */</div><div class='ctx'> 	struct octep_vf_oq *oq[OCTEP_VF_MAX_OQ];</div><div class='ctx'> </div><div class='add'>+	/* Per oq stats */</div><div class='add'>+	struct octep_vf_oq_stats stats_oq[OCTEP_VF_MAX_OQ];</div><div class='add'>+</div><div class='ctx'> 	/* Hardware port number of the PCIe interface */</div><div class='ctx'> 	u16 pcie_port;</div><div class='ctx'> </div><div class='hunk'>@@ -314,8 +320,6 @@ static inline u16 OCTEP_VF_MINOR_REV(struct octep_vf_device *oct)</div><div class='ctx'> #define octep_vf_read_csr64(octep_vf_dev, reg_off)         \</div><div class='ctx'> 	readq((octep_vf_dev)-&gt;mmio.hw_addr + (reg_off))</div><div class='ctx'> </div><div class='del'>-extern struct workqueue_struct *octep_vf_wq;</div><div class='del'>-</div><div class='ctx'> int octep_vf_device_setup(struct octep_vf_device *oct);</div><div class='ctx'> int octep_vf_setup_iqs(struct octep_vf_device *oct);</div><div class='ctx'> void octep_vf_free_iqs(struct octep_vf_device *oct);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c<br/>index 82821bc28634..d70c8be3cfc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c</a></div><div class='hunk'>@@ -87,7 +87,7 @@ static int octep_vf_oq_refill(struct octep_vf_device *oct, struct octep_vf_oq *o</div><div class='ctx'> 		page = dev_alloc_page();</div><div class='ctx'> 		if (unlikely(!page)) {</div><div class='ctx'> 			dev_err(oq-&gt;dev, "refill: rx buffer alloc failed\n");</div><div class='del'>-			oq-&gt;stats.alloc_failures++;</div><div class='add'>+			oq-&gt;stats-&gt;alloc_failures++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -98,7 +98,7 @@ static int octep_vf_oq_refill(struct octep_vf_device *oct, struct octep_vf_oq *o</div><div class='ctx'> 				"OQ-%d buffer refill: DMA mapping error!\n",</div><div class='ctx'> 				oq-&gt;q_no);</div><div class='ctx'> 			put_page(page);</div><div class='del'>-			oq-&gt;stats.alloc_failures++;</div><div class='add'>+			oq-&gt;stats-&gt;alloc_failures++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		oq-&gt;buff_info[refill_idx].page = page;</div><div class='hunk'>@@ -134,6 +134,7 @@ static int octep_vf_setup_oq(struct octep_vf_device *oct, int q_no)</div><div class='ctx'> 	oq-&gt;netdev = oct-&gt;netdev;</div><div class='ctx'> 	oq-&gt;dev = &amp;oct-&gt;pdev-&gt;dev;</div><div class='ctx'> 	oq-&gt;q_no = q_no;</div><div class='add'>+	oq-&gt;stats = &amp;oct-&gt;stats_oq[q_no];</div><div class='ctx'> 	oq-&gt;max_count = CFG_GET_OQ_NUM_DESC(oct-&gt;conf);</div><div class='ctx'> 	oq-&gt;ring_size_mask = oq-&gt;max_count - 1;</div><div class='ctx'> 	oq-&gt;buffer_size = CFG_GET_OQ_BUF_SIZE(oct-&gt;conf);</div><div class='hunk'>@@ -458,8 +459,8 @@ static int __octep_vf_oq_process_rx(struct octep_vf_device *oct,</div><div class='ctx'> </div><div class='ctx'> 	oq-&gt;host_read_idx = read_idx;</div><div class='ctx'> 	oq-&gt;refill_count += desc_used;</div><div class='del'>-	oq-&gt;stats.packets += pkt;</div><div class='del'>-	oq-&gt;stats.bytes += rx_bytes;</div><div class='add'>+	oq-&gt;stats-&gt;packets += pkt;</div><div class='add'>+	oq-&gt;stats-&gt;bytes += rx_bytes;</div><div class='ctx'> </div><div class='ctx'> 	return pkt;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.h b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.h<br/>index fe46838b5200..9e296b7d7e34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.h</a></div><div class='hunk'>@@ -187,7 +187,7 @@ struct octep_vf_oq {</div><div class='ctx'> 	u8 __iomem *pkts_sent_reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Statistics for this OQ. */</div><div class='del'>-	struct octep_vf_oq_stats stats;</div><div class='add'>+	struct octep_vf_oq_stats *stats;</div><div class='ctx'> </div><div class='ctx'> 	/* Packets pending to be processed */</div><div class='ctx'> 	u32 pkts_pending;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.c b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.c<br/>index 47a5c054fdb6..8180e5ce3d7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.c</a></div><div class='hunk'>@@ -82,9 +82,9 @@ int octep_vf_iq_process_completions(struct octep_vf_iq *iq, u16 budget)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	iq-&gt;pkts_processed += compl_pkts;</div><div class='del'>-	iq-&gt;stats.instr_completed += compl_pkts;</div><div class='del'>-	iq-&gt;stats.bytes_sent += compl_bytes;</div><div class='del'>-	iq-&gt;stats.sgentry_sent += compl_sg;</div><div class='add'>+	iq-&gt;stats-&gt;instr_completed += compl_pkts;</div><div class='add'>+	iq-&gt;stats-&gt;bytes_sent += compl_bytes;</div><div class='add'>+	iq-&gt;stats-&gt;sgentry_sent += compl_sg;</div><div class='ctx'> 	iq-&gt;flush_index = fi;</div><div class='ctx'> </div><div class='ctx'> 	netif_subqueue_completed_wake(iq-&gt;netdev, iq-&gt;q_no, compl_pkts,</div><div class='hunk'>@@ -186,6 +186,7 @@ static int octep_vf_setup_iq(struct octep_vf_device *oct, int q_no)</div><div class='ctx'> 	iq-&gt;netdev = oct-&gt;netdev;</div><div class='ctx'> 	iq-&gt;dev = &amp;oct-&gt;pdev-&gt;dev;</div><div class='ctx'> 	iq-&gt;q_no = q_no;</div><div class='add'>+	iq-&gt;stats = &amp;oct-&gt;stats_iq[q_no];</div><div class='ctx'> 	iq-&gt;max_count = CFG_GET_IQ_NUM_DESC(oct-&gt;conf);</div><div class='ctx'> 	iq-&gt;ring_size_mask = iq-&gt;max_count - 1;</div><div class='ctx'> 	iq-&gt;fill_threshold = CFG_GET_IQ_DB_MIN(oct-&gt;conf);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.h b/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.h<br/>index f338b975103c..1cede90e3a5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.h</a></div><div class='hunk'>@@ -129,7 +129,7 @@ struct octep_vf_iq {</div><div class='ctx'> 	u16 flush_index;</div><div class='ctx'> </div><div class='ctx'> 	/* Statistics for this input queue. */</div><div class='del'>-	struct octep_vf_iq_stats stats;</div><div class='add'>+	struct octep_vf_iq_stats *stats;</div><div class='ctx'> </div><div class='ctx'> 	/* Pointer to the Virtual Base addr of the input ring. */</div><div class='ctx'> 	struct octep_vf_tx_desc_hw *desc_ring;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/Kconfig b/drivers/net/ethernet/marvell/octeontx2/Kconfig<br/>index a32d85d6f599..35c4f5f64f58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/Kconfig</a></div><div class='hunk'>@@ -46,3 +46,11 @@ config OCTEONTX2_VF</div><div class='ctx'> 	depends on OCTEONTX2_PF</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Marvell's OcteonTX2 NIC virtual function.</div><div class='add'>+</div><div class='add'>+config RVU_ESWITCH</div><div class='add'>+	tristate "Marvell RVU E-Switch support"</div><div class='add'>+	depends on OCTEONTX2_PF</div><div class='add'>+	default m</div><div class='add'>+	help</div><div class='add'>+	  This driver supports Marvell's RVU E-Switch that</div><div class='add'>+	  provides internal SRIOV packet steering and switching.</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/Makefile b/drivers/net/ethernet/marvell/octeontx2/af/Makefile<br/>index 3cf4c8285c90..244de500963e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/Makefile</a></div><div class='hunk'>@@ -11,4 +11,6 @@ rvu_mbox-y := mbox.o rvu_trace.o</div><div class='ctx'> rvu_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o \</div><div class='ctx'> 		  rvu_reg.o rvu_npc.o rvu_debugfs.o ptp.o rvu_npc_fs.o \</div><div class='ctx'> 		  rvu_cpt.o rvu_devlink.o rpm.o rvu_cn10k.o rvu_switch.o \</div><div class='del'>-		  rvu_sdp.o rvu_npc_hash.o mcs.o mcs_rvu_if.o mcs_cnf10kb.o</div><div class='add'>+		  rvu_sdp.o rvu_npc_hash.o mcs.o mcs_rvu_if.o mcs_cnf10kb.o \</div><div class='add'>+		  rvu_rep.o cn20k/mbox_init.o cn20k/nix.o cn20k/debugfs.o \</div><div class='add'>+		  cn20k/npa.o</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c<br/>index 27935c54b91b..42044cd810b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cgx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cgx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cgx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cgx.c</a></div><div class='hunk'>@@ -21,8 +21,7 @@</div><div class='ctx'> #include "rvu.h"</div><div class='ctx'> #include "lmac_common.h"</div><div class='ctx'> </div><div class='del'>-#define DRV_NAME	"Marvell-CGX/RPM"</div><div class='del'>-#define DRV_STRING      "Marvell CGX/RPM Driver"</div><div class='add'>+#define DRV_NAME	"Marvell-CGX-RPM"</div><div class='ctx'> </div><div class='ctx'> #define CGX_RX_STAT_GLOBAL_INDEX	9</div><div class='ctx'> </div><div class='hunk'>@@ -66,8 +65,18 @@ static int cgx_fwi_link_change(struct cgx *cgx, int lmac_id, bool en);</div><div class='ctx'> /* Supported devices */</div><div class='ctx'> static const struct pci_device_id cgx_id_table[] = {</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_CGX) },</div><div class='del'>-	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10K_RPM) },</div><div class='del'>-	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10KB_RPM) },</div><div class='add'>+	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10K_RPM,</div><div class='add'>+	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CN10K_A) },</div><div class='add'>+	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10K_RPM,</div><div class='add'>+	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CNF10K_A) },</div><div class='add'>+	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10K_RPM,</div><div class='add'>+	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CNF10K_B) },</div><div class='add'>+	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10KB_RPM,</div><div class='add'>+	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CN10K_B) },</div><div class='add'>+	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10KB_RPM,</div><div class='add'>+	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CN20KA) },</div><div class='add'>+	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_CN10KB_RPM,</div><div class='add'>+	  PCI_ANY_ID, PCI_SUBSYS_DEVID_CNF20KA) },</div><div class='ctx'> 	{ 0, }  /* end of table */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -112,6 +121,11 @@ struct mac_ops *get_mac_ops(void *cgxd)</div><div class='ctx'> 	return ((struct cgx *)cgxd)-&gt;mac_ops;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u32 cgx_get_fifo_len(void *cgxd)</div><div class='add'>+{</div><div class='add'>+	return ((struct cgx *)cgxd)-&gt;fifo_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void cgx_write(struct cgx *cgx, u64 lmac, u64 offset, u64 val)</div><div class='ctx'> {</div><div class='ctx'> 	writeq(val, cgx-&gt;reg_base + (lmac &lt;&lt; cgx-&gt;mac_ops-&gt;lmac_offset) +</div><div class='hunk'>@@ -209,6 +223,24 @@ u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id)</div><div class='ctx'> 	return (cfg &amp; CMR_P2X_SEL_MASK) &gt;&gt; CMR_P2X_SEL_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u8 cgx_get_nix_resetbit(struct cgx *cgx)</div><div class='add'>+{</div><div class='add'>+	int first_lmac;</div><div class='add'>+	u8 p2x;</div><div class='add'>+</div><div class='add'>+	/* non 98XX silicons supports only NIX0 block */</div><div class='add'>+	if (cgx-&gt;pdev-&gt;subsystem_device != PCI_SUBSYS_DEVID_98XX)</div><div class='add'>+		return CGX_NIX0_RESET;</div><div class='add'>+</div><div class='add'>+	first_lmac = find_first_bit(&amp;cgx-&gt;lmac_bmap, cgx-&gt;max_lmac_per_mac);</div><div class='add'>+	p2x = cgx_lmac_get_p2x(cgx-&gt;cgx_id, first_lmac);</div><div class='add'>+</div><div class='add'>+	if (p2x == CMR_P2X_SEL_NIX1)</div><div class='add'>+		return CGX_NIX1_RESET;</div><div class='add'>+	else</div><div class='add'>+		return CGX_NIX0_RESET;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Ensure the required lock for event queue(where asynchronous events are</div><div class='ctx'>  * posted) is acquired before calling this API. Else an asynchronous event(with</div><div class='ctx'>  * latest link status) can reach the destination before this function returns</div><div class='hunk'>@@ -501,7 +533,7 @@ static u32 cgx_get_lmac_fifo_len(void *cgxd, int lmac_id)</div><div class='ctx'> 	u8 num_lmacs;</div><div class='ctx'> 	u32 fifo_len;</div><div class='ctx'> </div><div class='del'>-	fifo_len = cgx-&gt;mac_ops-&gt;fifo_len;</div><div class='add'>+	fifo_len = cgx-&gt;fifo_len;</div><div class='ctx'> 	num_lmacs = cgx-&gt;mac_ops-&gt;get_nr_lmacs(cgx);</div><div class='ctx'> </div><div class='ctx'> 	switch (num_lmacs) {</div><div class='hunk'>@@ -684,6 +716,11 @@ int cgx_get_rx_stats(void *cgxd, int lmac_id, int idx, u64 *rx_stat)</div><div class='ctx'> </div><div class='ctx'> 	if (!is_lmac_valid(cgx, lmac_id))</div><div class='ctx'> 		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* pass lmac as 0 for CGX_CMR_RX_STAT9-12 */</div><div class='add'>+	if (idx &gt;= CGX_RX_STAT_GLOBAL_INDEX)</div><div class='add'>+		lmac_id = 0;</div><div class='add'>+</div><div class='ctx'> 	*rx_stat =  cgx_read(cgx, lmac_id, CGXX_CMRX_RX_STAT0 + (idx * 8));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1144,17 +1181,25 @@ static int cgx_link_usertable_index_map(int speed)</div><div class='ctx'> static void set_mod_args(struct cgx_set_link_mode_args *args,</div><div class='ctx'> 			 u32 speed, u8 duplex, u8 autoneg, u64 mode)</div><div class='ctx'> {</div><div class='del'>-	/* Fill default values incase of user did not pass</div><div class='del'>-	 * valid parameters</div><div class='add'>+	int mode_baseidx;</div><div class='add'>+	u8 cgx_mode;</div><div class='add'>+</div><div class='add'>+	if (args-&gt;multimode) {</div><div class='add'>+		args-&gt;mode |= mode;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Derive mode_base_idx and mode fields based</div><div class='add'>+	 * on cgx_mode value</div><div class='ctx'> 	 */</div><div class='del'>-	if (args-&gt;duplex == DUPLEX_UNKNOWN)</div><div class='del'>-		args-&gt;duplex = duplex;</div><div class='del'>-	if (args-&gt;speed == SPEED_UNKNOWN)</div><div class='del'>-		args-&gt;speed = speed;</div><div class='del'>-	if (args-&gt;an == AUTONEG_UNKNOWN)</div><div class='del'>-		args-&gt;an = autoneg;</div><div class='add'>+	cgx_mode = find_first_bit((unsigned long *)&amp;mode,</div><div class='add'>+				  CGX_MODE_MAX);</div><div class='ctx'> 	args-&gt;mode = mode;</div><div class='del'>-	args-&gt;ports = 0;</div><div class='add'>+	mode_baseidx = cgx_mode - 41;</div><div class='add'>+	if (mode_baseidx &gt; 0) {</div><div class='add'>+		args-&gt;mode_baseidx = 1;</div><div class='add'>+		args-&gt;mode = BIT_ULL(mode_baseidx);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void otx2_map_ethtool_link_modes(u64 bitmask,</div><div class='hunk'>@@ -1162,16 +1207,16 @@ static void otx2_map_ethtool_link_modes(u64 bitmask,</div><div class='ctx'> {</div><div class='ctx'> 	switch (bitmask) {</div><div class='ctx'> 	case ETHTOOL_LINK_MODE_10baseT_Half_BIT:</div><div class='del'>-		set_mod_args(args, 10, 1, 1, BIT_ULL(CGX_MODE_SGMII));</div><div class='add'>+		set_mod_args(args, 10, 1, 1, BIT_ULL(CGX_MODE_SGMII_10M_BIT));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case  ETHTOOL_LINK_MODE_10baseT_Full_BIT:</div><div class='del'>-		set_mod_args(args, 10, 0, 1, BIT_ULL(CGX_MODE_SGMII));</div><div class='add'>+		set_mod_args(args, 10, 0, 1, BIT_ULL(CGX_MODE_SGMII_10M_BIT));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case  ETHTOOL_LINK_MODE_100baseT_Half_BIT:</div><div class='del'>-		set_mod_args(args, 100, 1, 1, BIT_ULL(CGX_MODE_SGMII));</div><div class='add'>+		set_mod_args(args, 100, 1, 1, BIT_ULL(CGX_MODE_SGMII_100M_BIT));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case  ETHTOOL_LINK_MODE_100baseT_Full_BIT:</div><div class='del'>-		set_mod_args(args, 100, 0, 1, BIT_ULL(CGX_MODE_SGMII));</div><div class='add'>+		set_mod_args(args, 100, 0, 1, BIT_ULL(CGX_MODE_SGMII_100M_BIT));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case  ETHTOOL_LINK_MODE_1000baseT_Half_BIT:</div><div class='ctx'> 		set_mod_args(args, 1000, 1, 1, BIT_ULL(CGX_MODE_SGMII));</div><div class='hunk'>@@ -1443,25 +1488,36 @@ int cgx_get_fwdata_base(u64 *base)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int cgx_set_link_mode(void *cgxd, struct cgx_set_link_mode_args args,</div><div class='add'>+		      struct cgx_lmac_fwdata_s *linkmodes,</div><div class='ctx'> 		      int cgx_id, int lmac_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct cgx *cgx = cgxd;</div><div class='ctx'> 	u64 req = 0, resp;</div><div class='add'>+	u8 bit;</div><div class='ctx'> </div><div class='ctx'> 	if (!cgx)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (args.mode)</div><div class='del'>-		otx2_map_ethtool_link_modes(args.mode, &amp;args);</div><div class='del'>-	if (!args.speed &amp;&amp; args.duplex &amp;&amp; !args.an)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	for_each_set_bit(bit, args.advertising,</div><div class='add'>+			 __ETHTOOL_LINK_MODE_MASK_NBITS)</div><div class='add'>+		otx2_map_ethtool_link_modes(bit, &amp;args);</div><div class='add'>+</div><div class='add'>+	if (args.multimode) {</div><div class='add'>+		if (linkmodes-&gt;advertised_link_modes_own != CGX_CMD_OWN_NS)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+</div><div class='add'>+		linkmodes-&gt;advertised_link_modes = args.mode;</div><div class='add'>+		/* Update ownership */</div><div class='add'>+		linkmodes-&gt;advertised_link_modes_own = CGX_CMD_OWN_FIRMWARE;</div><div class='add'>+		args.mode = GENMASK_ULL(41, 0);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	req = FIELD_SET(CMDREG_ID, CGX_CMD_MODE_CHANGE, req);</div><div class='ctx'> 	req = FIELD_SET(CMDMODECHANGE_SPEED,</div><div class='ctx'> 			cgx_link_usertable_index_map(args.speed), req);</div><div class='ctx'> 	req = FIELD_SET(CMDMODECHANGE_DUPLEX, args.duplex, req);</div><div class='ctx'> 	req = FIELD_SET(CMDMODECHANGE_AN, args.an, req);</div><div class='del'>-	req = FIELD_SET(CMDMODECHANGE_PORT, args.ports, req);</div><div class='add'>+	req = FIELD_SET(CMDMODECHANGE_MODE_BASEIDX, args.mode_baseidx, req);</div><div class='ctx'> 	req = FIELD_SET(CMDMODECHANGE_FLAGS, args.mode, req);</div><div class='ctx'> </div><div class='ctx'> 	return cgx_fwi_cmd_generic(req, &amp;resp, cgx, lmac_id);</div><div class='hunk'>@@ -1647,9 +1703,11 @@ unsigned long cgx_get_lmac_bmap(void *cgxd)</div><div class='ctx'> </div><div class='ctx'> static int cgx_lmac_init(struct cgx *cgx)</div><div class='ctx'> {</div><div class='add'>+	u8 max_dmac_filters;</div><div class='ctx'> 	struct lmac *lmac;</div><div class='add'>+	int err, filter;</div><div class='add'>+	unsigned int i;</div><div class='ctx'> 	u64 lmac_list;</div><div class='del'>-	int i, err;</div><div class='ctx'> </div><div class='ctx'> 	/* lmac_list specifies which lmacs are enabled</div><div class='ctx'> 	 * when bit n is set to 1, LMAC[n] is enabled</div><div class='hunk'>@@ -1675,7 +1733,7 @@ static int cgx_lmac_init(struct cgx *cgx)</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto err_lmac_free;</div><div class='ctx'> 		}</div><div class='del'>-		sprintf(lmac-&gt;name, "cgx_fwi_%d_%d", cgx-&gt;cgx_id, i);</div><div class='add'>+		sprintf(lmac-&gt;name, "cgx_fwi_%u_%u", cgx-&gt;cgx_id, i);</div><div class='ctx'> 		if (cgx-&gt;mac_ops-&gt;non_contiguous_serdes_lane) {</div><div class='ctx'> 			lmac-&gt;lmac_id = __ffs64(lmac_list);</div><div class='ctx'> 			lmac_list   &amp;= ~BIT_ULL(lmac-&gt;lmac_id);</div><div class='hunk'>@@ -1688,6 +1746,8 @@ static int cgx_lmac_init(struct cgx *cgx)</div><div class='ctx'> 				cgx-&gt;mac_ops-&gt;dmac_filter_count /</div><div class='ctx'> 				cgx-&gt;lmac_count;</div><div class='ctx'> </div><div class='add'>+		max_dmac_filters = lmac-&gt;mac_to_index_bmap.max;</div><div class='add'>+</div><div class='ctx'> 		err = rvu_alloc_bitmap(&amp;lmac-&gt;mac_to_index_bmap);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_name_free;</div><div class='hunk'>@@ -1717,8 +1777,19 @@ static int cgx_lmac_init(struct cgx *cgx)</div><div class='ctx'> 		set_bit(lmac-&gt;lmac_id, &amp;cgx-&gt;lmac_bmap);</div><div class='ctx'> 		cgx-&gt;mac_ops-&gt;mac_pause_frm_config(cgx, lmac-&gt;lmac_id, true);</div><div class='ctx'> 		lmac-&gt;lmac_type = cgx-&gt;mac_ops-&gt;get_lmac_type(cgx, lmac-&gt;lmac_id);</div><div class='add'>+</div><div class='add'>+		/* Disable stale DMAC filters for sane state */</div><div class='add'>+		for (filter = 0; filter &lt; max_dmac_filters; filter++)</div><div class='add'>+			cgx_lmac_addr_del(cgx-&gt;cgx_id, lmac-&gt;lmac_id, filter);</div><div class='add'>+</div><div class='add'>+		/* As cgx_lmac_addr_del does not clear entry for index 0</div><div class='add'>+		 * so it needs to be done explicitly</div><div class='add'>+		 */</div><div class='add'>+		cgx_lmac_addr_reset(cgx-&gt;cgx_id, lmac-&gt;lmac_id);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Start X2P reset on given MAC block */</div><div class='add'>+	cgx-&gt;mac_ops-&gt;mac_x2p_reset(cgx, true);</div><div class='ctx'> 	return cgx_lmac_verify_fwi_version(cgx);</div><div class='ctx'> </div><div class='ctx'> err_bitmap_free:</div><div class='hunk'>@@ -1764,7 +1835,7 @@ static void cgx_populate_features(struct cgx *cgx)</div><div class='ctx'> 	u64 cfg;</div><div class='ctx'> </div><div class='ctx'> 	cfg = cgx_read(cgx, 0, CGX_CONST);</div><div class='del'>-	cgx-&gt;mac_ops-&gt;fifo_len = FIELD_GET(CGX_CONST_RXFIFO_SIZE, cfg);</div><div class='add'>+	cgx-&gt;fifo_len = FIELD_GET(CGX_CONST_RXFIFO_SIZE, cfg);</div><div class='ctx'> 	cgx-&gt;max_lmac_per_mac = FIELD_GET(CGX_CONST_MAX_LMACS, cfg);</div><div class='ctx'> </div><div class='ctx'> 	if (is_dev_rpm(cgx))</div><div class='hunk'>@@ -1784,6 +1855,45 @@ static u8 cgx_get_rxid_mapoffset(struct cgx *cgx)</div><div class='ctx'> 		return 0x60;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void cgx_x2p_reset(void *cgxd, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct cgx *cgx = cgxd;</div><div class='add'>+	int lmac_id;</div><div class='add'>+	u64 cfg;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		for_each_set_bit(lmac_id, &amp;cgx-&gt;lmac_bmap, cgx-&gt;max_lmac_per_mac)</div><div class='add'>+			cgx-&gt;mac_ops-&gt;mac_enadis_rx(cgx, lmac_id, false);</div><div class='add'>+</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+</div><div class='add'>+		cfg = cgx_read(cgx, 0, CGXX_CMR_GLOBAL_CONFIG);</div><div class='add'>+		cfg |= cgx_get_nix_resetbit(cgx) | CGX_NSCI_DROP;</div><div class='add'>+		cgx_write(cgx, 0, CGXX_CMR_GLOBAL_CONFIG, cfg);</div><div class='add'>+	} else {</div><div class='add'>+		cfg = cgx_read(cgx, 0, CGXX_CMR_GLOBAL_CONFIG);</div><div class='add'>+		cfg &amp;= ~(cgx_get_nix_resetbit(cgx) | CGX_NSCI_DROP);</div><div class='add'>+		cgx_write(cgx, 0, CGXX_CMR_GLOBAL_CONFIG, cfg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cgx_enadis_rx(void *cgxd, int lmac_id, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct cgx *cgx = cgxd;</div><div class='add'>+	u64 cfg;</div><div class='add'>+</div><div class='add'>+	if (!is_lmac_valid(cgx, lmac_id))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	cfg = cgx_read(cgx, lmac_id, CGXX_CMRX_CFG);</div><div class='add'>+	if (enable)</div><div class='add'>+		cfg |= DATA_PKT_RX_EN;</div><div class='add'>+	else</div><div class='add'>+		cfg &amp;= ~DATA_PKT_RX_EN;</div><div class='add'>+	cgx_write(cgx, lmac_id, CGXX_CMRX_CFG, cfg);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct mac_ops	cgx_mac_ops    = {</div><div class='ctx'> 	.name		=       "cgx",</div><div class='ctx'> 	.csr_offset	=       0,</div><div class='hunk'>@@ -1815,6 +1925,8 @@ static struct mac_ops	cgx_mac_ops    = {</div><div class='ctx'> 	.mac_get_pfc_frm_cfg   =        cgx_lmac_get_pfc_frm_cfg,</div><div class='ctx'> 	.mac_reset   =			cgx_lmac_reset,</div><div class='ctx'> 	.mac_stats_reset       =	cgx_stats_reset,</div><div class='add'>+	.mac_x2p_reset                   =      cgx_x2p_reset,</div><div class='add'>+	.mac_enadis_rx			 =      cgx_enadis_rx,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='hunk'>@@ -1851,6 +1963,12 @@ static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		goto err_disable_device;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "DMA mask config failed, abort\n");</div><div class='add'>+		goto err_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* MAP configuration registers */</div><div class='ctx'> 	cgx-&gt;reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);</div><div class='ctx'> 	if (!cgx-&gt;reg_base) {</div><div class='hunk'>@@ -1859,6 +1977,14 @@ static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		goto err_release_regions;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!is_cn20k(pdev) &amp;&amp;</div><div class='add'>+	    !is_cgx_mapped_to_nix(pdev-&gt;subsystem_device, cgx-&gt;cgx_id)) {</div><div class='add'>+		dev_notice(dev, "CGX %d not mapped to NIX, skipping probe\n",</div><div class='add'>+			   cgx-&gt;cgx_id);</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto err_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	cgx-&gt;lmac_count = cgx-&gt;mac_ops-&gt;get_nr_lmacs(cgx);</div><div class='ctx'> 	if (!cgx-&gt;lmac_count) {</div><div class='ctx'> 		dev_notice(dev, "CGX %d LMAC count is zero, skipping probe\n", cgx-&gt;cgx_id);</div><div class='hunk'>@@ -1868,7 +1994,7 @@ static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	nvec = pci_msix_vec_count(cgx-&gt;pdev);</div><div class='ctx'> 	err = pci_alloc_irq_vectors(pdev, nvec, nvec, PCI_IRQ_MSIX);</div><div class='del'>-	if (err &lt; 0 || err != nvec) {</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		dev_err(dev, "Request for %d msix vectors failed, err %d\n",</div><div class='ctx'> 			nvec, err);</div><div class='ctx'> 		goto err_release_regions;</div><div class='hunk'>@@ -1879,7 +2005,7 @@ static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> </div><div class='ctx'> 	/* init wq for processing linkup requests */</div><div class='ctx'> 	INIT_WORK(&amp;cgx-&gt;cgx_cmd_work, cgx_lmac_linkup_work);</div><div class='del'>-	cgx-&gt;cgx_cmd_workq = alloc_workqueue("cgx_cmd_workq", 0, 0);</div><div class='add'>+	cgx-&gt;cgx_cmd_workq = alloc_workqueue("cgx_cmd_workq", WQ_PERCPU, 0);</div><div class='ctx'> 	if (!cgx-&gt;cgx_cmd_workq) {</div><div class='ctx'> 		dev_err(dev, "alloc workqueue failed for cgx cmd");</div><div class='ctx'> 		err = -ENOMEM;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h<br/>index dc9ace30554a..92ccf343dfe0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cgx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cgx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cgx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cgx.h</a></div><div class='hunk'>@@ -32,6 +32,10 @@</div><div class='ctx'> #define CGX_LMAC_TYPE_MASK		0xF</div><div class='ctx'> #define CGXX_CMRX_INT			0x040</div><div class='ctx'> #define FW_CGX_INT			BIT_ULL(1)</div><div class='add'>+#define CGXX_CMR_GLOBAL_CONFIG          0x08</div><div class='add'>+#define CGX_NIX0_RESET			BIT_ULL(2)</div><div class='add'>+#define CGX_NIX1_RESET			BIT_ULL(3)</div><div class='add'>+#define CGX_NSCI_DROP			BIT_ULL(9)</div><div class='ctx'> #define CGXX_CMRX_INT_ENA_W1S		0x058</div><div class='ctx'> #define CGXX_CMRX_RX_ID_MAP		0x060</div><div class='ctx'> #define CGXX_CMRX_RX_STAT0		0x070</div><div class='hunk'>@@ -157,16 +161,13 @@ int cgx_get_link_info(void *cgxd, int lmac_id,</div><div class='ctx'> 		      struct cgx_link_user_info *linfo);</div><div class='ctx'> int cgx_lmac_linkup_start(void *cgxd);</div><div class='ctx'> int cgx_get_fwdata_base(u64 *base);</div><div class='del'>-int cgx_lmac_get_pause_frm(void *cgxd, int lmac_id,</div><div class='del'>-			   u8 *tx_pause, u8 *rx_pause);</div><div class='del'>-int cgx_lmac_set_pause_frm(void *cgxd, int lmac_id,</div><div class='del'>-			   u8 tx_pause, u8 rx_pause);</div><div class='ctx'> void cgx_lmac_ptp_config(void *cgxd, int lmac_id, bool enable);</div><div class='ctx'> u8 cgx_lmac_get_p2x(int cgx_id, int lmac_id);</div><div class='ctx'> int cgx_set_fec(u64 fec, int cgx_id, int lmac_id);</div><div class='ctx'> int cgx_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);</div><div class='ctx'> int cgx_get_phy_fec_stats(void *cgxd, int lmac_id);</div><div class='ctx'> int cgx_set_link_mode(void *cgxd, struct cgx_set_link_mode_args args,</div><div class='add'>+		      struct cgx_lmac_fwdata_s *linkmodes,</div><div class='ctx'> 		      int cgx_id, int lmac_id);</div><div class='ctx'> u64 cgx_features_get(void *cgxd);</div><div class='ctx'> struct mac_ops *get_mac_ops(void *cgxd);</div><div class='hunk'>@@ -185,4 +186,5 @@ int cgx_lmac_get_pfc_frm_cfg(void *cgxd, int lmac_id, u8 *tx_pause,</div><div class='ctx'> int verify_lmac_fc_cfg(void *cgxd, int lmac_id, u8 tx_pause, u8 rx_pause,</div><div class='ctx'> 		       int pfvf_idx);</div><div class='ctx'> int cgx_lmac_reset(void *cgxd, int lmac_id, u8 pf_req_flr);</div><div class='add'>+u32 cgx_get_fifo_len(void *cgxd);</div><div class='ctx'> #endif /* CGX_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h b/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h<br/>index d4a27c882a5b..39352d451cc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h</a></div><div class='hunk'>@@ -95,7 +95,31 @@ enum CGX_MODE_ {</div><div class='ctx'> 	CGX_MODE_100G_C2M,</div><div class='ctx'> 	CGX_MODE_100G_CR4,</div><div class='ctx'> 	CGX_MODE_100G_KR4,</div><div class='del'>-	CGX_MODE_MAX /* = 29 */</div><div class='add'>+	CGX_MODE_LAUI_2_C2C_BIT,</div><div class='add'>+	CGX_MODE_LAUI_2_C2M_BIT,</div><div class='add'>+	CGX_MODE_50GBASE_CR2_C_BIT,</div><div class='add'>+	CGX_MODE_50GBASE_KR2_C_BIT,     /* = 30 */</div><div class='add'>+	CGX_MODE_100GAUI_2_C2C_BIT,</div><div class='add'>+	CGX_MODE_100GAUI_2_C2M_BIT,</div><div class='add'>+	CGX_MODE_100GBASE_CR2_BIT,</div><div class='add'>+	CGX_MODE_100GBASE_KR2_BIT,</div><div class='add'>+	CGX_MODE_SFI_1G_BIT,</div><div class='add'>+	CGX_MODE_25GBASE_CR_C_BIT,</div><div class='add'>+	CGX_MODE_25GBASE_KR_C_BIT,</div><div class='add'>+	CGX_MODE_SGMII_10M_BIT,</div><div class='add'>+	CGX_MODE_SGMII_100M_BIT,        /* = 39 */</div><div class='add'>+	CGX_MODE_2500_BASEX_BIT = 42, /* Mode group 1 */</div><div class='add'>+	CGX_MODE_5000_BASEX_BIT,</div><div class='add'>+	CGX_MODE_O_USGMII_BIT,</div><div class='add'>+	CGX_MODE_Q_USGMII_BIT,</div><div class='add'>+	CGX_MODE_2_5G_USXGMII_BIT,</div><div class='add'>+	CGX_MODE_5G_USXGMII_BIT,</div><div class='add'>+	CGX_MODE_10G_SXGMII_BIT,</div><div class='add'>+	CGX_MODE_10G_DXGMII_BIT,</div><div class='add'>+	CGX_MODE_10G_QXGMII_BIT,</div><div class='add'>+	CGX_MODE_TP_BIT,</div><div class='add'>+	CGX_MODE_FIBER_BIT,</div><div class='add'>+	CGX_MODE_MAX /* = 53 */</div><div class='ctx'> };</div><div class='ctx'> /* REQUEST ID types. Input to firmware */</div><div class='ctx'> enum cgx_cmd_id {</div><div class='hunk'>@@ -258,7 +282,12 @@ struct cgx_lnk_sts {</div><div class='ctx'> #define CMDMODECHANGE_SPEED		GENMASK_ULL(11, 8)</div><div class='ctx'> #define CMDMODECHANGE_DUPLEX		GENMASK_ULL(12, 12)</div><div class='ctx'> #define CMDMODECHANGE_AN		GENMASK_ULL(13, 13)</div><div class='del'>-#define CMDMODECHANGE_PORT		GENMASK_ULL(21, 14)</div><div class='add'>+/* this field categorize the mode ID(FLAGS) range to accommodate</div><div class='add'>+ * more modes.</div><div class='add'>+ * To specify mode ID range of 0 - 41, this field will be 0.</div><div class='add'>+ * To specify mode ID range of 42 - 83, this field will be 1.</div><div class='add'>+ */</div><div class='add'>+#define CMDMODECHANGE_MODE_BASEIDX	GENMASK_ULL(21, 20)</div><div class='ctx'> #define CMDMODECHANGE_FLAGS		GENMASK_ULL(63, 22)</div><div class='ctx'> </div><div class='ctx'> /* LINK_BRING_UP command timeout */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h<br/>new file mode 100644<br/>index 000000000000..4285b5d6a6a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Marvell RVU Admin Function driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef CN20K_API_H</div><div class='add'>+#define CN20K_API_H</div><div class='add'>+</div><div class='add'>+#include "../rvu.h"</div><div class='add'>+</div><div class='add'>+struct ng_rvu {</div><div class='add'>+	struct mbox_ops         *rvu_mbox_ops;</div><div class='add'>+	struct qmem             *pf_mbox_addr;</div><div class='add'>+	struct qmem             *vf_mbox_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Mbox related APIs */</div><div class='add'>+int cn20k_rvu_mbox_init(struct rvu *rvu, int type, int num);</div><div class='add'>+int cn20k_rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,</div><div class='add'>+			       int num, int type, unsigned long *pf_bmap);</div><div class='add'>+void cn20k_free_mbox_memory(struct rvu *rvu);</div><div class='add'>+int cn20k_register_afpf_mbox_intr(struct rvu *rvu);</div><div class='add'>+int cn20k_register_afvf_mbox_intr(struct rvu *rvu, int pf_vec_start);</div><div class='add'>+void cn20k_rvu_enable_mbox_intr(struct rvu *rvu);</div><div class='add'>+void cn20k_rvu_unregister_interrupts(struct rvu *rvu);</div><div class='add'>+int cn20k_mbox_setup(struct otx2_mbox *mbox, struct pci_dev *pdev,</div><div class='add'>+		     void *reg_base, int direction, int ndevs);</div><div class='add'>+void cn20k_rvu_enable_afvf_intr(struct rvu *rvu, int vfs);</div><div class='add'>+void cn20k_rvu_disable_afvf_intr(struct rvu *rvu, int vfs);</div><div class='add'>+#endif /* CN20K_API_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c<br/>new file mode 100644<br/>index 000000000000..498968bf4cf5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,218 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Marvell RVU Admin Function driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "struct.h"</div><div class='add'>+#include "debugfs.h"</div><div class='add'>+</div><div class='add'>+void print_nix_cn20k_sq_ctx(struct seq_file *m,</div><div class='add'>+			    struct nix_cn20k_sq_ctx_s *sq_ctx)</div><div class='add'>+{</div><div class='add'>+	seq_printf(m, "W0: ena \t\t\t%d\nW0: qint_idx \t\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;ena, sq_ctx-&gt;qint_idx);</div><div class='add'>+	seq_printf(m, "W0: substream \t\t\t0x%03x\nW0: sdp_mcast \t\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;substream, sq_ctx-&gt;sdp_mcast);</div><div class='add'>+	seq_printf(m, "W0: cq \t\t\t\t%d\nW0: sqe_way_mask \t\t%d\n\n",</div><div class='add'>+		   sq_ctx-&gt;cq, sq_ctx-&gt;sqe_way_mask);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W1: smq \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: xoff\t\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;smq, sq_ctx-&gt;cq_ena, sq_ctx-&gt;xoff);</div><div class='add'>+	seq_printf(m, "W1: sso_ena \t\t\t%d\nW1: smq_rr_weight\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;sso_ena, sq_ctx-&gt;smq_rr_weight);</div><div class='add'>+	seq_printf(m, "W1: default_chan\t\t%d\nW1: sqb_count\t\t\t%d\n\n",</div><div class='add'>+		   sq_ctx-&gt;default_chan, sq_ctx-&gt;sqb_count);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W1: smq_rr_count_lb \t\t%d\n", sq_ctx-&gt;smq_rr_count_lb);</div><div class='add'>+	seq_printf(m, "W2: smq_rr_count_ub \t\t%d\n", sq_ctx-&gt;smq_rr_count_ub);</div><div class='add'>+	seq_printf(m, "W2: sqb_aura \t\t\t%d\nW2: sq_int \t\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;sqb_aura, sq_ctx-&gt;sq_int);</div><div class='add'>+	seq_printf(m, "W2: sq_int_ena \t\t\t%d\nW2: sqe_stype \t\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;sq_int_ena, sq_ctx-&gt;sqe_stype);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W3: max_sqe_size\t\t%d\nW3: cq_limit\t\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;max_sqe_size, sq_ctx-&gt;cq_limit);</div><div class='add'>+	seq_printf(m, "W3: lmt_dis \t\t\t%d\nW3: mnq_dis \t\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;lmt_dis, sq_ctx-&gt;mnq_dis);</div><div class='add'>+	seq_printf(m, "W3: smq_next_sq\t\t\t%d\nW3: smq_lso_segnum\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;smq_next_sq, sq_ctx-&gt;smq_lso_segnum);</div><div class='add'>+	seq_printf(m, "W3: tail_offset \t\t%d\nW3: smenq_offset\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;tail_offset, sq_ctx-&gt;smenq_offset);</div><div class='add'>+	seq_printf(m, "W3: head_offset\t\t\t%d\nW3: smenq_next_sqb_vld\t\t%d\n\n",</div><div class='add'>+		   sq_ctx-&gt;head_offset, sq_ctx-&gt;smenq_next_sqb_vld);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;smq_next_sq_vld, sq_ctx-&gt;smq_pend);</div><div class='add'>+	seq_printf(m, "W4: next_sqb \t\t\t%llx\n\n", sq_ctx-&gt;next_sqb);</div><div class='add'>+	seq_printf(m, "W5: tail_sqb \t\t\t%llx\n\n", sq_ctx-&gt;tail_sqb);</div><div class='add'>+	seq_printf(m, "W6: smenq_sqb \t\t\t%llx\n\n", sq_ctx-&gt;smenq_sqb);</div><div class='add'>+	seq_printf(m, "W7: smenq_next_sqb \t\t%llx\n\n",</div><div class='add'>+		   sq_ctx-&gt;smenq_next_sqb);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W8: head_sqb\t\t\t%llx\n\n", sq_ctx-&gt;head_sqb);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W9: vfi_lso_total\t\t%d\n", sq_ctx-&gt;vfi_lso_total);</div><div class='add'>+	seq_printf(m, "W9: vfi_lso_sizem1\t\t%d\nW9: vfi_lso_sb\t\t\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;vfi_lso_sizem1, sq_ctx-&gt;vfi_lso_sb);</div><div class='add'>+	seq_printf(m, "W9: vfi_lso_mps\t\t\t%d\nW9: vfi_lso_vlan0_ins_ena\t%d\n",</div><div class='add'>+		   sq_ctx-&gt;vfi_lso_mps, sq_ctx-&gt;vfi_lso_vlan0_ins_ena);</div><div class='add'>+	seq_printf(m, "W9: vfi_lso_vlan1_ins_ena\t%d\nW9: vfi_lso_vld \t\t%d\n\n",</div><div class='add'>+		   sq_ctx-&gt;vfi_lso_vld, sq_ctx-&gt;vfi_lso_vlan1_ins_ena);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W10: scm_lso_rem \t\t%llu\n\n",</div><div class='add'>+		   (u64)sq_ctx-&gt;scm_lso_rem);</div><div class='add'>+	seq_printf(m, "W11: octs \t\t\t%llu\n\n", (u64)sq_ctx-&gt;octs);</div><div class='add'>+	seq_printf(m, "W12: pkts \t\t\t%llu\n\n", (u64)sq_ctx-&gt;pkts);</div><div class='add'>+	seq_printf(m, "W13: aged_drop_octs \t\t\t%llu\n\n",</div><div class='add'>+		   (u64)sq_ctx-&gt;aged_drop_octs);</div><div class='add'>+	seq_printf(m, "W13: aged_drop_pkts \t\t\t%llu\n\n",</div><div class='add'>+		   (u64)sq_ctx-&gt;aged_drop_pkts);</div><div class='add'>+	seq_printf(m, "W14: dropped_octs \t\t%llu\n\n",</div><div class='add'>+		   (u64)sq_ctx-&gt;dropped_octs);</div><div class='add'>+	seq_printf(m, "W15: dropped_pkts \t\t%llu\n\n",</div><div class='add'>+		   (u64)sq_ctx-&gt;dropped_pkts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void print_nix_cn20k_cq_ctx(struct seq_file *m,</div><div class='add'>+			    struct nix_cn20k_aq_enq_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	struct nix_cn20k_cq_ctx_s *cq_ctx = &amp;rsp-&gt;cq;</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W0: base \t\t\t%llx\n\n", cq_ctx-&gt;base);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W1: wrptr \t\t\t%llx\n", (u64)cq_ctx-&gt;wrptr);</div><div class='add'>+	seq_printf(m, "W1: avg_con \t\t\t%d\nW1: cint_idx \t\t\t%d\n",</div><div class='add'>+		   cq_ctx-&gt;avg_con, cq_ctx-&gt;cint_idx);</div><div class='add'>+	seq_printf(m, "W1: cq_err \t\t\t%d\nW1: qint_idx \t\t\t%d\n",</div><div class='add'>+		   cq_ctx-&gt;cq_err, cq_ctx-&gt;qint_idx);</div><div class='add'>+	seq_printf(m, "W1: bpid \t\t\t%d\nW1: bp_ena \t\t\t%d\n\n",</div><div class='add'>+		   cq_ctx-&gt;bpid, cq_ctx-&gt;bp_ena);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W1: lbpid_high \t\t\t0x%03x\n", cq_ctx-&gt;lbpid_high);</div><div class='add'>+	seq_printf(m, "W1: lbpid_med \t\t\t0x%03x\n", cq_ctx-&gt;lbpid_med);</div><div class='add'>+	seq_printf(m, "W1: lbpid_low \t\t\t0x%03x\n", cq_ctx-&gt;lbpid_low);</div><div class='add'>+	seq_printf(m, "(W1: lbpid) \t\t\t0x%03x\n",</div><div class='add'>+		   cq_ctx-&gt;lbpid_high &lt;&lt; 6 | cq_ctx-&gt;lbpid_med &lt;&lt; 3 |</div><div class='add'>+		   cq_ctx-&gt;lbpid_low);</div><div class='add'>+	seq_printf(m, "W1: lbp_ena \t\t\t\t%d\n\n", cq_ctx-&gt;lbp_ena);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W2: update_time \t\t%d\nW2:avg_level \t\t\t%d\n",</div><div class='add'>+		   cq_ctx-&gt;update_time, cq_ctx-&gt;avg_level);</div><div class='add'>+	seq_printf(m, "W2: head \t\t\t%d\nW2:tail \t\t\t%d\n\n",</div><div class='add'>+		   cq_ctx-&gt;head, cq_ctx-&gt;tail);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W3: cq_err_int_ena \t\t%d\nW3:cq_err_int \t\t\t%d\n",</div><div class='add'>+		   cq_ctx-&gt;cq_err_int_ena, cq_ctx-&gt;cq_err_int);</div><div class='add'>+	seq_printf(m, "W3: qsize \t\t\t%d\nW3:stashing \t\t\t%d\n",</div><div class='add'>+		   cq_ctx-&gt;qsize, cq_ctx-&gt;stashing);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W3: caching \t\t\t%d\n", cq_ctx-&gt;caching);</div><div class='add'>+	seq_printf(m, "W3: lbp_frac \t\t\t%d\n", cq_ctx-&gt;lbp_frac);</div><div class='add'>+	seq_printf(m, "W3: stash_thresh \t\t\t%d\n",</div><div class='add'>+		   cq_ctx-&gt;stash_thresh);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W3: msh_valid \t\t\t%d\nW3:msh_dst \t\t\t%d\n",</div><div class='add'>+		   cq_ctx-&gt;msh_valid, cq_ctx-&gt;msh_dst);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W3: cpt_drop_err_en \t\t\t%d\n",</div><div class='add'>+		   cq_ctx-&gt;cpt_drop_err_en);</div><div class='add'>+	seq_printf(m, "W3: ena \t\t\t%d\n",</div><div class='add'>+		   cq_ctx-&gt;ena);</div><div class='add'>+	seq_printf(m, "W3: drop_ena \t\t\t%d\nW3: drop \t\t\t%d\n",</div><div class='add'>+		   cq_ctx-&gt;drop_ena, cq_ctx-&gt;drop);</div><div class='add'>+	seq_printf(m, "W3: bp \t\t\t\t%d\n\n", cq_ctx-&gt;bp);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W4: lbpid_ext \t\t\t\t%d\n\n", cq_ctx-&gt;lbpid_ext);</div><div class='add'>+	seq_printf(m, "W4: bpid_ext \t\t\t\t%d\n\n", cq_ctx-&gt;bpid_ext);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void print_npa_cn20k_aura_ctx(struct seq_file *m,</div><div class='add'>+			      struct npa_cn20k_aq_enq_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	struct npa_cn20k_aura_s *aura = &amp;rsp-&gt;aura;</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W0: Pool addr\t\t%llx\n", aura-&gt;pool_addr);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W1: ena\t\t\t%d\nW1: pool caching\t%d\n",</div><div class='add'>+		   aura-&gt;ena, aura-&gt;pool_caching);</div><div class='add'>+	seq_printf(m, "W1: avg con\t\t%d\n", aura-&gt;avg_con);</div><div class='add'>+	seq_printf(m, "W1: pool drop ena\t%d\nW1: aura drop ena\t%d\n",</div><div class='add'>+		   aura-&gt;pool_drop_ena, aura-&gt;aura_drop_ena);</div><div class='add'>+	seq_printf(m, "W1: bp_ena\t\t%d\nW1: aura drop\t\t%d\n",</div><div class='add'>+		   aura-&gt;bp_ena, aura-&gt;aura_drop);</div><div class='add'>+	seq_printf(m, "W1: aura shift\t\t%d\nW1: avg_level\t\t%d\n",</div><div class='add'>+		   aura-&gt;shift, aura-&gt;avg_level);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W2: count\t\t%llu\nW2: nix_bpid\t\t%d\n",</div><div class='add'>+		   (u64)aura-&gt;count, aura-&gt;bpid);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W3: limit\t\t%llu\nW3: bp\t\t\t%d\nW3: fc_ena\t\t%d\n",</div><div class='add'>+		   (u64)aura-&gt;limit, aura-&gt;bp, aura-&gt;fc_ena);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W3: fc_up_crossing\t%d\nW3: fc_stype\t\t%d\n",</div><div class='add'>+		   aura-&gt;fc_up_crossing, aura-&gt;fc_stype);</div><div class='add'>+	seq_printf(m, "W3: fc_hyst_bits\t%d\n", aura-&gt;fc_hyst_bits);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W4: fc_addr\t\t%llx\n", aura-&gt;fc_addr);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W5: pool_drop\t\t%d\nW5: update_time\t\t%d\n",</div><div class='add'>+		   aura-&gt;pool_drop, aura-&gt;update_time);</div><div class='add'>+	seq_printf(m, "W5: err_int \t\t%d\nW5: err_int_ena\t\t%d\n",</div><div class='add'>+		   aura-&gt;err_int, aura-&gt;err_int_ena);</div><div class='add'>+	seq_printf(m, "W5: thresh_int\t\t%d\nW5: thresh_int_ena \t%d\n",</div><div class='add'>+		   aura-&gt;thresh_int, aura-&gt;thresh_int_ena);</div><div class='add'>+	seq_printf(m, "W5: thresh_up\t\t%d\nW5: thresh_qint_idx\t%d\n",</div><div class='add'>+		   aura-&gt;thresh_up, aura-&gt;thresh_qint_idx);</div><div class='add'>+	seq_printf(m, "W5: err_qint_idx \t%d\n", aura-&gt;err_qint_idx);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W6: thresh\t\t%llu\n", (u64)aura-&gt;thresh);</div><div class='add'>+	seq_printf(m, "W6: fc_msh_dst\t\t%d\n", aura-&gt;fc_msh_dst);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void print_npa_cn20k_pool_ctx(struct seq_file *m,</div><div class='add'>+			      struct npa_cn20k_aq_enq_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	struct npa_cn20k_pool_s *pool = &amp;rsp-&gt;pool;</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W0: Stack base\t\t%llx\n", pool-&gt;stack_base);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W1: ena \t\t%d\nW1: nat_align \t\t%d\n",</div><div class='add'>+		   pool-&gt;ena, pool-&gt;nat_align);</div><div class='add'>+	seq_printf(m, "W1: stack_caching\t%d\n",</div><div class='add'>+		   pool-&gt;stack_caching);</div><div class='add'>+	seq_printf(m, "W1: buf_offset\t\t%d\nW1: buf_size\t\t%d\n",</div><div class='add'>+		   pool-&gt;buf_offset, pool-&gt;buf_size);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W2: stack_max_pages \t%d\nW2: stack_pages\t\t%d\n",</div><div class='add'>+		   pool-&gt;stack_max_pages, pool-&gt;stack_pages);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W4: stack_offset\t%d\nW4: shift\t\t%d\nW4: avg_level\t\t%d\n",</div><div class='add'>+		   pool-&gt;stack_offset, pool-&gt;shift, pool-&gt;avg_level);</div><div class='add'>+	seq_printf(m, "W4: avg_con \t\t%d\nW4: fc_ena\t\t%d\nW4: fc_stype\t\t%d\n",</div><div class='add'>+		   pool-&gt;avg_con, pool-&gt;fc_ena, pool-&gt;fc_stype);</div><div class='add'>+	seq_printf(m, "W4: fc_hyst_bits\t%d\nW4: fc_up_crossing\t%d\n",</div><div class='add'>+		   pool-&gt;fc_hyst_bits, pool-&gt;fc_up_crossing);</div><div class='add'>+	seq_printf(m, "W4: update_time\t\t%d\n", pool-&gt;update_time);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W5: fc_addr\t\t%llx\n", pool-&gt;fc_addr);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W6: ptr_start\t\t%llx\n", pool-&gt;ptr_start);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W7: ptr_end\t\t%llx\n", pool-&gt;ptr_end);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W8: err_int\t\t%d\nW8: err_int_ena\t\t%d\n",</div><div class='add'>+		   pool-&gt;err_int, pool-&gt;err_int_ena);</div><div class='add'>+	seq_printf(m, "W8: thresh_int\t\t%d\n", pool-&gt;thresh_int);</div><div class='add'>+	seq_printf(m, "W8: thresh_int_ena\t%d\nW8: thresh_up\t\t%d\n",</div><div class='add'>+		   pool-&gt;thresh_int_ena, pool-&gt;thresh_up);</div><div class='add'>+	seq_printf(m, "W8: thresh_qint_idx\t%d\nW8: err_qint_idx\t%d\n",</div><div class='add'>+		   pool-&gt;thresh_qint_idx, pool-&gt;err_qint_idx);</div><div class='add'>+	seq_printf(m, "W8: fc_msh_dst\t\t%d\n", pool-&gt;fc_msh_dst);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.h b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.h<br/>new file mode 100644<br/>index 000000000000..a2e3a2cd6edb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.h</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Marvell OcteonTx2 CGX driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef DEBUFS_H</div><div class='add'>+#define DEBUFS_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/fs.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "struct.h"</div><div class='add'>+#include "../mbox.h"</div><div class='add'>+</div><div class='add'>+void print_nix_cn20k_sq_ctx(struct seq_file *m,</div><div class='add'>+			    struct nix_cn20k_sq_ctx_s *sq_ctx);</div><div class='add'>+void print_nix_cn20k_cq_ctx(struct seq_file *m,</div><div class='add'>+			    struct nix_cn20k_aq_enq_rsp *rsp);</div><div class='add'>+void print_npa_cn20k_aura_ctx(struct seq_file *m,</div><div class='add'>+			      struct npa_cn20k_aq_enq_rsp *rsp);</div><div class='add'>+void print_npa_cn20k_pool_ctx(struct seq_file *m,</div><div class='add'>+			      struct npa_cn20k_aq_enq_rsp *rsp);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c<br/>new file mode 100644<br/>index 000000000000..bd3aab7770dd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c</a></div><div class='hunk'>@@ -0,0 +1,424 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Marvell RVU Admin Function driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rvu_trace.h"</div><div class='add'>+#include "mbox.h"</div><div class='add'>+#include "reg.h"</div><div class='add'>+#include "api.h"</div><div class='add'>+</div><div class='add'>+static irqreturn_t cn20k_afvf_mbox_intr_handler(int irq, void *rvu_irq)</div><div class='add'>+{</div><div class='add'>+	struct rvu_irq_data *rvu_irq_data = rvu_irq;</div><div class='add'>+	struct rvu *rvu = rvu_irq_data-&gt;rvu;</div><div class='add'>+	u64 intr;</div><div class='add'>+</div><div class='add'>+	/* Sync with mbox memory region */</div><div class='add'>+	rmb();</div><div class='add'>+</div><div class='add'>+	/* Clear interrupts */</div><div class='add'>+	intr = rvupf_read64(rvu, rvu_irq_data-&gt;intr_status);</div><div class='add'>+	rvupf_write64(rvu, rvu_irq_data-&gt;intr_status, intr);</div><div class='add'>+</div><div class='add'>+	if (intr)</div><div class='add'>+		trace_otx2_msg_interrupt(rvu-&gt;pdev, "VF(s) to AF", intr);</div><div class='add'>+</div><div class='add'>+	rvu_irq_data-&gt;afvf_queue_work_hdlr(&amp;rvu-&gt;afvf_wq_info, rvu_irq_data-&gt;start,</div><div class='add'>+					   rvu_irq_data-&gt;mdevs, intr);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cn20k_register_afvf_mbox_intr(struct rvu *rvu, int pf_vec_start)</div><div class='add'>+{</div><div class='add'>+	struct rvu_irq_data *irq_data;</div><div class='add'>+	int intr_vec, offset, vec = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* irq data for 4 VFPF intr vectors */</div><div class='add'>+	irq_data = devm_kcalloc(rvu-&gt;dev, 4,</div><div class='add'>+				sizeof(struct rvu_irq_data), GFP_KERNEL);</div><div class='add'>+	if (!irq_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (intr_vec = RVU_MBOX_PF_INT_VEC_VFPF_MBOX0; intr_vec &lt;=</div><div class='add'>+					RVU_MBOX_PF_INT_VEC_VFPF1_MBOX1;</div><div class='add'>+					intr_vec++, vec++) {</div><div class='add'>+		switch (intr_vec) {</div><div class='add'>+		case RVU_MBOX_PF_INT_VEC_VFPF_MBOX0:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_PF_VFPF_INTX(0);</div><div class='add'>+			irq_data[vec].start = 0;</div><div class='add'>+			irq_data[vec].mdevs = 64;</div><div class='add'>+			break;</div><div class='add'>+		case RVU_MBOX_PF_INT_VEC_VFPF_MBOX1:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_PF_VFPF_INTX(1);</div><div class='add'>+			irq_data[vec].start = 64;</div><div class='add'>+			irq_data[vec].mdevs = 64;</div><div class='add'>+			break;</div><div class='add'>+		case RVU_MBOX_PF_INT_VEC_VFPF1_MBOX0:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_PF_VFPF1_INTX(0);</div><div class='add'>+			irq_data[vec].start = 0;</div><div class='add'>+			irq_data[vec].mdevs = 64;</div><div class='add'>+			break;</div><div class='add'>+		case RVU_MBOX_PF_INT_VEC_VFPF1_MBOX1:</div><div class='add'>+			irq_data[vec].intr_status = RVU_MBOX_PF_VFPF1_INTX(1);</div><div class='add'>+			irq_data[vec].start = 64;</div><div class='add'>+			irq_data[vec].mdevs = 64;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		irq_data[vec].afvf_queue_work_hdlr =</div><div class='add'>+						rvu_queue_work;</div><div class='add'>+		offset = pf_vec_start + intr_vec;</div><div class='add'>+		irq_data[vec].vec_num = offset;</div><div class='add'>+		irq_data[vec].rvu = rvu;</div><div class='add'>+</div><div class='add'>+		sprintf(&amp;rvu-&gt;irq_name[offset * NAME_SIZE], "RVUAF VFAF%d Mbox%d",</div><div class='add'>+			vec / 2, vec % 2);</div><div class='add'>+		err = request_irq(pci_irq_vector(rvu-&gt;pdev, offset),</div><div class='add'>+				  rvu-&gt;ng_rvu-&gt;rvu_mbox_ops-&gt;afvf_intr_handler, 0,</div><div class='add'>+				  &amp;rvu-&gt;irq_name[offset * NAME_SIZE],</div><div class='add'>+				  &amp;irq_data[vec]);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(rvu-&gt;dev,</div><div class='add'>+				"RVUAF: IRQ registration failed for AFVF mbox irq\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+		rvu-&gt;irq_allocated[offset] = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* CN20K mbox PFx =&gt; AF irq handler */</div><div class='add'>+static irqreturn_t cn20k_mbox_pf_common_intr_handler(int irq, void *rvu_irq)</div><div class='add'>+{</div><div class='add'>+	struct rvu_irq_data *rvu_irq_data = rvu_irq;</div><div class='add'>+	struct rvu *rvu = rvu_irq_data-&gt;rvu;</div><div class='add'>+	u64 intr;</div><div class='add'>+</div><div class='add'>+	/* Clear interrupts */</div><div class='add'>+	intr = rvu_read64(rvu, BLKADDR_RVUM, rvu_irq_data-&gt;intr_status);</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM, rvu_irq_data-&gt;intr_status, intr);</div><div class='add'>+</div><div class='add'>+	if (intr)</div><div class='add'>+		trace_otx2_msg_interrupt(rvu-&gt;pdev, "PF(s) to AF", intr);</div><div class='add'>+</div><div class='add'>+	/* Sync with mbox memory region */</div><div class='add'>+	rmb();</div><div class='add'>+</div><div class='add'>+	rvu_irq_data-&gt;rvu_queue_work_hdlr(&amp;rvu-&gt;afpf_wq_info,</div><div class='add'>+					  rvu_irq_data-&gt;start,</div><div class='add'>+					  rvu_irq_data-&gt;mdevs, intr);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cn20k_rvu_enable_mbox_intr(struct rvu *rvu)</div><div class='add'>+{</div><div class='add'>+	struct rvu_hwinfo *hw = rvu-&gt;hw;</div><div class='add'>+</div><div class='add'>+	/* Clear spurious irqs, if any */</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM,</div><div class='add'>+		    RVU_MBOX_AF_PFAF_INT(0), INTR_MASK(hw-&gt;total_pfs));</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM,</div><div class='add'>+		    RVU_MBOX_AF_PFAF_INT(1), INTR_MASK(hw-&gt;total_pfs - 64));</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM,</div><div class='add'>+		    RVU_MBOX_AF_PFAF1_INT(0), INTR_MASK(hw-&gt;total_pfs));</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM,</div><div class='add'>+		    RVU_MBOX_AF_PFAF1_INT(1), INTR_MASK(hw-&gt;total_pfs - 64));</div><div class='add'>+</div><div class='add'>+	/* Enable mailbox interrupt for all PFs except PF0 i.e AF itself */</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1S(0),</div><div class='add'>+		    INTR_MASK(hw-&gt;total_pfs) &amp; ~1ULL);</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1S(1),</div><div class='add'>+		    INTR_MASK(hw-&gt;total_pfs - 64));</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1S(0),</div><div class='add'>+		    INTR_MASK(hw-&gt;total_pfs) &amp; ~1ULL);</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1S(1),</div><div class='add'>+		    INTR_MASK(hw-&gt;total_pfs - 64));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cn20k_rvu_unregister_interrupts(struct rvu *rvu)</div><div class='add'>+{</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1C(0),</div><div class='add'>+		    INTR_MASK(rvu-&gt;hw-&gt;total_pfs) &amp; ~1ULL);</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF_INT_ENA_W1C(1),</div><div class='add'>+		    INTR_MASK(rvu-&gt;hw-&gt;total_pfs - 64));</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1C(0),</div><div class='add'>+		    INTR_MASK(rvu-&gt;hw-&gt;total_pfs) &amp; ~1ULL);</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFAF1_INT_ENA_W1C(1),</div><div class='add'>+		    INTR_MASK(rvu-&gt;hw-&gt;total_pfs - 64));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cn20k_register_afpf_mbox_intr(struct rvu *rvu)</div><div class='add'>+{</div><div class='add'>+	struct rvu_irq_data *irq_data;</div><div class='add'>+	int intr_vec, ret, vec = 0;</div><div class='add'>+</div><div class='add'>+	/* irq data for 4 PF intr vectors */</div><div class='add'>+	irq_data = devm_kcalloc(rvu-&gt;dev, 4,</div><div class='add'>+				sizeof(struct rvu_irq_data), GFP_KERNEL);</div><div class='add'>+	if (!irq_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (intr_vec = RVU_AF_CN20K_INT_VEC_PFAF_MBOX0; intr_vec &lt;=</div><div class='add'>+				RVU_AF_CN20K_INT_VEC_PFAF1_MBOX1; intr_vec++,</div><div class='add'>+				vec++) {</div><div class='add'>+		switch (intr_vec) {</div><div class='add'>+		case RVU_AF_CN20K_INT_VEC_PFAF_MBOX0:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_AF_PFAF_INT(0);</div><div class='add'>+			irq_data[vec].start = 0;</div><div class='add'>+			irq_data[vec].mdevs = 64;</div><div class='add'>+			break;</div><div class='add'>+		case RVU_AF_CN20K_INT_VEC_PFAF_MBOX1:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_AF_PFAF_INT(1);</div><div class='add'>+			irq_data[vec].start = 64;</div><div class='add'>+			irq_data[vec].mdevs = 96;</div><div class='add'>+			break;</div><div class='add'>+		case RVU_AF_CN20K_INT_VEC_PFAF1_MBOX0:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_AF_PFAF1_INT(0);</div><div class='add'>+			irq_data[vec].start = 0;</div><div class='add'>+			irq_data[vec].mdevs = 64;</div><div class='add'>+			break;</div><div class='add'>+		case RVU_AF_CN20K_INT_VEC_PFAF1_MBOX1:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_AF_PFAF1_INT(1);</div><div class='add'>+			irq_data[vec].start = 64;</div><div class='add'>+			irq_data[vec].mdevs = 96;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		irq_data[vec].rvu_queue_work_hdlr = rvu_queue_work;</div><div class='add'>+		irq_data[vec].vec_num = intr_vec;</div><div class='add'>+		irq_data[vec].rvu = rvu;</div><div class='add'>+</div><div class='add'>+		/* Register mailbox interrupt handler */</div><div class='add'>+		sprintf(&amp;rvu-&gt;irq_name[intr_vec * NAME_SIZE],</div><div class='add'>+			"RVUAF PFAF%d Mbox%d",</div><div class='add'>+			vec / 2, vec % 2);</div><div class='add'>+		ret = request_irq(pci_irq_vector(rvu-&gt;pdev, intr_vec),</div><div class='add'>+				  rvu-&gt;ng_rvu-&gt;rvu_mbox_ops-&gt;pf_intr_handler, 0,</div><div class='add'>+				  &amp;rvu-&gt;irq_name[intr_vec * NAME_SIZE],</div><div class='add'>+				  &amp;irq_data[vec]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		rvu-&gt;irq_allocated[intr_vec] = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cn20k_rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,</div><div class='add'>+			       int num, int type, unsigned long *pf_bmap)</div><div class='add'>+{</div><div class='add'>+	int region;</div><div class='add'>+	u64 bar;</div><div class='add'>+</div><div class='add'>+	if (type == TYPE_AFVF) {</div><div class='add'>+		for (region = 0; region &lt; num; region++) {</div><div class='add'>+			if (!test_bit(region, pf_bmap))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			bar = (u64)phys_to_virt((u64)rvu-&gt;ng_rvu-&gt;vf_mbox_addr-&gt;base);</div><div class='add'>+			bar += region * MBOX_SIZE;</div><div class='add'>+			mbox_addr[region] = (void *)bar;</div><div class='add'>+</div><div class='add'>+			if (!mbox_addr[region])</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (region = 0; region &lt; num; region++) {</div><div class='add'>+		if (!test_bit(region, pf_bmap))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		bar = (u64)phys_to_virt((u64)rvu-&gt;ng_rvu-&gt;pf_mbox_addr-&gt;base);</div><div class='add'>+		bar += region * MBOX_SIZE;</div><div class='add'>+</div><div class='add'>+		mbox_addr[region] = (void *)bar;</div><div class='add'>+</div><div class='add'>+		if (!mbox_addr[region])</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_alloc_mbox_memory(struct rvu *rvu, int type,</div><div class='add'>+				 int ndevs, int mbox_size)</div><div class='add'>+{</div><div class='add'>+	struct qmem *mbox_addr;</div><div class='add'>+	dma_addr_t iova;</div><div class='add'>+	int pf, err;</div><div class='add'>+</div><div class='add'>+	/* Allocate contiguous memory for mailbox communication.</div><div class='add'>+	 * eg: AF &lt;=&gt; PFx mbox memory</div><div class='add'>+	 * This allocated memory is split into chunks of MBOX_SIZE</div><div class='add'>+	 * and setup into each of the RVU PFs. In HW this memory will</div><div class='add'>+	 * get aliased to an offset within BAR2 of those PFs.</div><div class='add'>+	 *</div><div class='add'>+	 * AF will access mbox memory using direct physical addresses</div><div class='add'>+	 * and PFs will access the same shared memory from BAR2.</div><div class='add'>+	 *</div><div class='add'>+	 * PF &lt;=&gt; VF mbox memory also works in the same fashion.</div><div class='add'>+	 * AFPF, PFVF requires IOVA to be used to maintain the mailbox msgs</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	err = qmem_alloc(rvu-&gt;dev, &amp;mbox_addr, ndevs, mbox_size);</div><div class='add'>+	if (err)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TYPE_AFPF:</div><div class='add'>+		rvu-&gt;ng_rvu-&gt;pf_mbox_addr = mbox_addr;</div><div class='add'>+		iova = (u64)mbox_addr-&gt;iova;</div><div class='add'>+		for (pf = 0; pf &lt; ndevs; pf++) {</div><div class='add'>+			rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_AF_PFX_ADDR(pf),</div><div class='add'>+				    (u64)iova);</div><div class='add'>+			iova += mbox_size;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case TYPE_AFVF:</div><div class='add'>+		rvu-&gt;ng_rvu-&gt;vf_mbox_addr = mbox_addr;</div><div class='add'>+		rvupf_write64(rvu, RVU_PF_VF_MBOX_ADDR, (u64)mbox_addr-&gt;iova);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mbox_ops cn20k_mbox_ops = {</div><div class='add'>+	.pf_intr_handler = cn20k_mbox_pf_common_intr_handler,</div><div class='add'>+	.afvf_intr_handler = cn20k_afvf_mbox_intr_handler,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int cn20k_rvu_mbox_init(struct rvu *rvu, int type, int ndevs)</div><div class='add'>+{</div><div class='add'>+	int dev;</div><div class='add'>+</div><div class='add'>+	if (!is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rvu-&gt;ng_rvu-&gt;rvu_mbox_ops = &amp;cn20k_mbox_ops;</div><div class='add'>+</div><div class='add'>+	if (type == TYPE_AFVF) {</div><div class='add'>+		rvu_write64(rvu, BLKADDR_RVUM, RVU_MBOX_PF_VF_CFG, ilog2(MBOX_SIZE));</div><div class='add'>+	} else {</div><div class='add'>+		for (dev = 0; dev &lt; ndevs; dev++)</div><div class='add'>+			rvu_write64(rvu, BLKADDR_RVUM,</div><div class='add'>+				    RVU_MBOX_AF_PFX_CFG(dev), ilog2(MBOX_SIZE));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rvu_alloc_mbox_memory(rvu, type, ndevs, MBOX_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cn20k_free_mbox_memory(struct rvu *rvu)</div><div class='add'>+{</div><div class='add'>+	if (!is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	qmem_free(rvu-&gt;dev, rvu-&gt;ng_rvu-&gt;pf_mbox_addr);</div><div class='add'>+	qmem_free(rvu-&gt;dev, rvu-&gt;ng_rvu-&gt;vf_mbox_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cn20k_rvu_disable_afvf_intr(struct rvu *rvu, int vfs)</div><div class='add'>+{</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1CX(0), INTR_MASK(vfs));</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(0), INTR_MASK(vfs));</div><div class='add'>+	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));</div><div class='add'>+	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));</div><div class='add'>+</div><div class='add'>+	if (vfs &lt;= 64)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));</div><div class='add'>+	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));</div><div class='add'>+	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cn20k_rvu_enable_afvf_intr(struct rvu *rvu, int vfs)</div><div class='add'>+{</div><div class='add'>+	/* Clear any pending interrupts and enable AF VF interrupts for</div><div class='add'>+	 * the first 64 VFs.</div><div class='add'>+	 */</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INTX(0), INTR_MASK(vfs));</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(0), INTR_MASK(vfs));</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INTX(0), INTR_MASK(vfs));</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(0), INTR_MASK(vfs));</div><div class='add'>+</div><div class='add'>+	/* FLR */</div><div class='add'>+	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs));</div><div class='add'>+	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs));</div><div class='add'>+</div><div class='add'>+	/* Same for remaining VFs, if any. */</div><div class='add'>+	if (vfs &lt;= 64)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INTX(1), INTR_MASK(vfs - 64));</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INTX(1), INTR_MASK(vfs - 64));</div><div class='add'>+	rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));</div><div class='add'>+</div><div class='add'>+	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64));</div><div class='add'>+	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));</div><div class='add'>+	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_alloc_cint_qint_mem(struct rvu *rvu, struct rvu_pfvf *pfvf,</div><div class='add'>+			    int blkaddr, int nixlf)</div><div class='add'>+{</div><div class='add'>+	int qints, hwctx_size, err;</div><div class='add'>+	u64 cfg, ctx_cfg;</div><div class='add'>+</div><div class='add'>+	if (is_rvu_otx2(rvu) || is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ctx_cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST3);</div><div class='add'>+	/* Alloc memory for CQINT's HW contexts */</div><div class='add'>+	cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);</div><div class='add'>+	qints = (cfg &gt;&gt; 24) &amp; 0xFFF;</div><div class='add'>+	hwctx_size = 1UL &lt;&lt; ((ctx_cfg &gt;&gt; 24) &amp; 0xF);</div><div class='add'>+	err = qmem_alloc(rvu-&gt;dev, &amp;pfvf-&gt;cq_ints_ctx, qints, hwctx_size);</div><div class='add'>+	if (err)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, blkaddr, NIX_AF_LFX_CINTS_BASE(nixlf),</div><div class='add'>+		    (u64)pfvf-&gt;cq_ints_ctx-&gt;iova);</div><div class='add'>+</div><div class='add'>+	/* Alloc memory for QINT's HW contexts */</div><div class='add'>+	cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST2);</div><div class='add'>+	qints = (cfg &gt;&gt; 12) &amp; 0xFFF;</div><div class='add'>+	hwctx_size = 1UL &lt;&lt; ((ctx_cfg &gt;&gt; 20) &amp; 0xF);</div><div class='add'>+	err = qmem_alloc(rvu-&gt;dev, &amp;pfvf-&gt;nix_qints_ctx, qints, hwctx_size);</div><div class='add'>+	if (err)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rvu_write64(rvu, blkaddr, NIX_AF_LFX_QINTS_BASE(nixlf),</div><div class='add'>+		    (u64)pfvf-&gt;nix_qints_ctx-&gt;iova);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c<br/>new file mode 100644<br/>index 000000000000..aa2016fd1bba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Marvell RVU Admin Function driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "struct.h"</div><div class='add'>+#include "../rvu.h"</div><div class='add'>+</div><div class='add'>+int rvu_mbox_handler_nix_cn20k_aq_enq(struct rvu *rvu,</div><div class='add'>+				      struct nix_cn20k_aq_enq_req *req,</div><div class='add'>+				      struct nix_cn20k_aq_enq_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	return rvu_nix_aq_enq_inst(rvu, (struct nix_aq_enq_req *)req,</div><div class='add'>+				  (struct nix_aq_enq_rsp *)rsp);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c<br/>new file mode 100644<br/>index 000000000000..fe8f926c8b75<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Marvell RVU Admin Function driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "struct.h"</div><div class='add'>+#include "../rvu.h"</div><div class='add'>+</div><div class='add'>+int rvu_mbox_handler_npa_cn20k_aq_enq(struct rvu *rvu,</div><div class='add'>+				      struct npa_cn20k_aq_enq_req *req,</div><div class='add'>+				      struct npa_cn20k_aq_enq_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	return rvu_npa_aq_enq_inst(rvu, (struct npa_aq_enq_req *)req,</div><div class='add'>+				   (struct npa_aq_enq_rsp *)rsp);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(rvu_mbox_handler_npa_cn20k_aq_enq);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/reg.h b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/reg.h<br/>new file mode 100644<br/>index 000000000000..affb39803120<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cn20k/reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/reg.h</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Marvell RVU Admin Function driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef RVU_MBOX_REG_H</div><div class='add'>+#define RVU_MBOX_REG_H</div><div class='add'>+#include "../rvu.h"</div><div class='add'>+#include "../rvu_reg.h"</div><div class='add'>+</div><div class='add'>+/* RVUM block registers */</div><div class='add'>+#define RVU_PF_DISC				(0x0)</div><div class='add'>+#define RVU_PRIV_PFX_DISC(a)			(0x8000208 | (a) &lt;&lt; 16)</div><div class='add'>+#define RVU_PRIV_HWVFX_DISC(a)			(0xD000000 | (a) &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+/* Mbox Registers */</div><div class='add'>+/* RVU AF BAR0 Mbox registers for AF =&gt; PFx */</div><div class='add'>+#define RVU_MBOX_AF_PFX_ADDR(a)			(0x5000 | (a) &lt;&lt; 4)</div><div class='add'>+#define RVU_MBOX_AF_PFX_CFG(a)			(0x6000 | (a) &lt;&lt; 4)</div><div class='add'>+#define RVU_MBOX_AF_AFPFX_TRIGX(a)		(0x9000 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_AF_PFAF_INT(a)			(0x2980 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_PFAF_INT_W1S(a)		(0x2988 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_PFAF_INT_ENA_W1S(a)		(0x2990 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_PFAF_INT_ENA_W1C(a)		(0x2998 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_PFAF1_INT(a)		(0x29A0 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_PFAF1_INT_W1S(a)		(0x29A8 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_PFAF1_INT_ENA_W1S(a)	(0x29B0 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_PFAF1_INT_ENA_W1C(a)	(0x29B8 | (a) &lt;&lt; 6)</div><div class='add'>+</div><div class='add'>+/* RVU PF =&gt; AF mbox registers */</div><div class='add'>+#define RVU_MBOX_PF_PFAF_TRIGX(a)		(0xC00 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_INT				(0xC20)</div><div class='add'>+#define RVU_MBOX_PF_INT_W1S			(0xC28)</div><div class='add'>+#define RVU_MBOX_PF_INT_ENA_W1S			(0xC30)</div><div class='add'>+#define RVU_MBOX_PF_INT_ENA_W1C			(0xC38)</div><div class='add'>+</div><div class='add'>+#define RVU_AF_BAR2_SEL				(0x9000000)</div><div class='add'>+#define RVU_AF_BAR2_PFID			(0x16400)</div><div class='add'>+#define NIX_CINTX_INT_W1S(a)			(0xd30 | (a) &lt;&lt; 12)</div><div class='add'>+#define NIX_QINTX_CNT(a)			(0xc00 | (a) &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+#define RVU_MBOX_AF_VFAF_INT(a)			(0x3000 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_VFAF_INT_W1S(a)		(0x3008 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_VFAF_INT_ENA_W1S(a)		(0x3010 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_VFAF_INT_ENA_W1C(a)		(0x3018 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_VFAF_INT_ENA_W1C(a)		(0x3018 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_VFAF1_INT(a)		(0x3020 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_VFAF1_INT_W1S(a)		(0x3028 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_VFAF1_IN_ENA_W1S(a)		(0x3030 | (a) &lt;&lt; 6)</div><div class='add'>+#define RVU_MBOX_AF_VFAF1_IN_ENA_W1C(a)		(0x3038 | (a) &lt;&lt; 6)</div><div class='add'>+</div><div class='add'>+#define RVU_MBOX_AF_AFVFX_TRIG(a, b)		(0x10000 | (a) &lt;&lt; 4 | (b) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_AF_VFX_ADDR(a)			(0x20000 | (a) &lt;&lt; 4)</div><div class='add'>+#define RVU_MBOX_AF_VFX_CFG(a)			(0x28000 | (a) &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+#define RVU_MBOX_PF_VFX_PFVF_TRIGX(a)		(0x2000 | (a) &lt;&lt; 3)</div><div class='add'>+</div><div class='add'>+#define RVU_MBOX_PF_VFPF_INTX(a)		(0x1000 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF_INT_W1SX(a)		(0x1020 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF_INT_ENA_W1SX(a)	(0x1040 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF_INT_ENA_W1CX(a)	(0x1060 | (a) &lt;&lt; 3)</div><div class='add'>+</div><div class='add'>+#define RVU_MBOX_PF_VFPF1_INTX(a)		(0x1080 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF1_INT_W1SX(a)		(0x10a0 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(a)	(0x10c0 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(a)	(0x10e0 | (a) &lt;&lt; 3)</div><div class='add'>+</div><div class='add'>+#define RVU_MBOX_PF_VF_ADDR			(0xC40)</div><div class='add'>+#define RVU_MBOX_PF_LMTLINE_ADDR		(0xC48)</div><div class='add'>+#define RVU_MBOX_PF_VF_CFG			(0xC60)</div><div class='add'>+</div><div class='add'>+#define RVU_MBOX_VF_VFPF_TRIGX(a)		(0x3000 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_VF_INT				(0x20)</div><div class='add'>+#define RVU_MBOX_VF_INT_W1S			(0x28)</div><div class='add'>+#define RVU_MBOX_VF_INT_ENA_W1S			(0x30)</div><div class='add'>+#define RVU_MBOX_VF_INT_ENA_W1C			(0x38)</div><div class='add'>+</div><div class='add'>+#define RVU_MBOX_VF_VFAF_TRIGX(a)		(0x2000 | (a) &lt;&lt; 3)</div><div class='add'>+#endif /* RVU_MBOX_REG_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h b/drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h<br/>new file mode 100644<br/>index 000000000000..763f6cabd7c2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h</a></div><div class='hunk'>@@ -0,0 +1,380 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Marvell RVU Admin Function driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef STRUCT_H</div><div class='add'>+#define STRUCT_H</div><div class='add'>+</div><div class='add'>+#define NIX_MAX_CTX_SIZE		128</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * CN20k RVU PF MBOX Interrupt Vector Enumeration</div><div class='add'>+ *</div><div class='add'>+ * Vectors 0 - 3 are compatible with pre cn20k and hence</div><div class='add'>+ * existing macros are being reused.</div><div class='add'>+ */</div><div class='add'>+enum rvu_mbox_pf_int_vec_e {</div><div class='add'>+	RVU_MBOX_PF_INT_VEC_VFPF_MBOX0	= 0x4,</div><div class='add'>+	RVU_MBOX_PF_INT_VEC_VFPF_MBOX1	= 0x5,</div><div class='add'>+	RVU_MBOX_PF_INT_VEC_VFPF1_MBOX0	= 0x6,</div><div class='add'>+	RVU_MBOX_PF_INT_VEC_VFPF1_MBOX1	= 0x7,</div><div class='add'>+	RVU_MBOX_PF_INT_VEC_AFPF_MBOX	= 0x8,</div><div class='add'>+	RVU_MBOX_PF_INT_VEC_CNT		= 0x9,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RVU Admin function Interrupt Vector Enumeration */</div><div class='add'>+enum rvu_af_cn20k_int_vec_e {</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_POISON		= 0x0,</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_PFFLR0		= 0x1,</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_PFFLR1		= 0x2,</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_PFME0		= 0x3,</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_PFME1		= 0x4,</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_GEN		= 0x5,</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_PFAF_MBOX0		= 0x6,</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_PFAF_MBOX1		= 0x7,</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_PFAF1_MBOX0	= 0x8,</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_PFAF1_MBOX1	= 0x9,</div><div class='add'>+	RVU_AF_CN20K_INT_VEC_CNT		= 0xa,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nix_cn20k_sq_ctx_s {</div><div class='add'>+	u64 ena                         :  1; /* W0 */</div><div class='add'>+	u64 qint_idx                    :  6;</div><div class='add'>+	u64 substream                   : 20;</div><div class='add'>+	u64 sdp_mcast                   :  1;</div><div class='add'>+	u64 cq                          : 20;</div><div class='add'>+	u64 sqe_way_mask                : 16;</div><div class='add'>+	u64 smq                         : 11; /* W1 */</div><div class='add'>+	u64 cq_ena                      :  1;</div><div class='add'>+	u64 xoff                        :  1;</div><div class='add'>+	u64 sso_ena                     :  1;</div><div class='add'>+	u64 smq_rr_weight               : 14;</div><div class='add'>+	u64 default_chan                : 12;</div><div class='add'>+	u64 sqb_count                   : 16;</div><div class='add'>+	u64 reserved_120_120            :  1;</div><div class='add'>+	u64 smq_rr_count_lb             :  7;</div><div class='add'>+	u64 smq_rr_count_ub             : 25; /* W2 */</div><div class='add'>+	u64 sqb_aura                    : 20;</div><div class='add'>+	u64 sq_int                      :  8;</div><div class='add'>+	u64 sq_int_ena                  :  8;</div><div class='add'>+	u64 sqe_stype                   :  2;</div><div class='add'>+	u64 reserved_191_191            :  1;</div><div class='add'>+	u64 max_sqe_size                :  2; /* W3 */</div><div class='add'>+	u64 cq_limit                    :  8;</div><div class='add'>+	u64 lmt_dis                     :  1;</div><div class='add'>+	u64 mnq_dis                     :  1;</div><div class='add'>+	u64 smq_next_sq                 : 20;</div><div class='add'>+	u64 smq_lso_segnum              :  8;</div><div class='add'>+	u64 tail_offset                 :  6;</div><div class='add'>+	u64 smenq_offset                :  6;</div><div class='add'>+	u64 head_offset                 :  6;</div><div class='add'>+	u64 smenq_next_sqb_vld          :  1;</div><div class='add'>+	u64 smq_pend                    :  1;</div><div class='add'>+	u64 smq_next_sq_vld             :  1;</div><div class='add'>+	u64 reserved_253_255            :  3;</div><div class='add'>+	u64 next_sqb                    : 64; /* W4 */</div><div class='add'>+	u64 tail_sqb                    : 64; /* W5 */</div><div class='add'>+	u64 smenq_sqb                   : 64; /* W6 */</div><div class='add'>+	u64 smenq_next_sqb              : 64; /* W7 */</div><div class='add'>+	u64 head_sqb                    : 64; /* W8 */</div><div class='add'>+	u64 reserved_576_583            :  8; /* W9 */</div><div class='add'>+	u64 vfi_lso_total               : 18;</div><div class='add'>+	u64 vfi_lso_sizem1              :  3;</div><div class='add'>+	u64 vfi_lso_sb                  :  8;</div><div class='add'>+	u64 vfi_lso_mps                 : 14;</div><div class='add'>+	u64 vfi_lso_vlan0_ins_ena       :  1;</div><div class='add'>+	u64 vfi_lso_vlan1_ins_ena       :  1;</div><div class='add'>+	u64 vfi_lso_vld                 :  1;</div><div class='add'>+	u64 reserved_630_639            : 10;</div><div class='add'>+	u64 scm_lso_rem                 : 18; /* W10 */</div><div class='add'>+	u64 reserved_658_703            : 46;</div><div class='add'>+	u64 octs                        : 48; /* W11 */</div><div class='add'>+	u64 reserved_752_767            : 16;</div><div class='add'>+	u64 pkts                        : 48; /* W12 */</div><div class='add'>+	u64 reserved_816_831            : 16;</div><div class='add'>+	u64 aged_drop_octs              : 32; /* W13 */</div><div class='add'>+	u64 aged_drop_pkts              : 32;</div><div class='add'>+	u64 dropped_octs                : 48; /* W14 */</div><div class='add'>+	u64 reserved_944_959            : 16;</div><div class='add'>+	u64 dropped_pkts                : 48; /* W15 */</div><div class='add'>+	u64 reserved_1008_1023          : 16;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(sizeof(struct nix_cn20k_sq_ctx_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='add'>+struct nix_cn20k_cq_ctx_s {</div><div class='add'>+	u64 base                        : 64; /* W0 */</div><div class='add'>+	u64 lbp_ena                     :  1; /* W1 */</div><div class='add'>+	u64 lbpid_low                   :  3;</div><div class='add'>+	u64 bp_ena                      :  1;</div><div class='add'>+	u64 lbpid_med                   :  3;</div><div class='add'>+	u64 bpid                        :  9;</div><div class='add'>+	u64 lbpid_high                  :  3;</div><div class='add'>+	u64 qint_idx                    :  7;</div><div class='add'>+	u64 cq_err                      :  1;</div><div class='add'>+	u64 cint_idx                    :  7;</div><div class='add'>+	u64 avg_con                     :  9;</div><div class='add'>+	u64 wrptr                       : 20;</div><div class='add'>+	u64 tail                        : 20; /* W2 */</div><div class='add'>+	u64 head                        : 20;</div><div class='add'>+	u64 avg_level                   :  8;</div><div class='add'>+	u64 update_time                 : 16;</div><div class='add'>+	u64 bp                          :  8; /* W3 */</div><div class='add'>+	u64 drop                        :  8;</div><div class='add'>+	u64 drop_ena                    :  1;</div><div class='add'>+	u64 ena                         :  1;</div><div class='add'>+	u64 cpt_drop_err_en             :  1;</div><div class='add'>+	u64 reserved_211_211            :  1;</div><div class='add'>+	u64 msh_dst                     : 11;</div><div class='add'>+	u64 msh_valid                   :  1;</div><div class='add'>+	u64 stash_thresh                :  4;</div><div class='add'>+	u64 lbp_frac                    :  4;</div><div class='add'>+	u64 caching                     :  1;</div><div class='add'>+	u64 stashing                    :  1;</div><div class='add'>+	u64 reserved_234_235            :  2;</div><div class='add'>+	u64 qsize                       :  4;</div><div class='add'>+	u64 cq_err_int                  :  8;</div><div class='add'>+	u64 cq_err_int_ena              :  8;</div><div class='add'>+	u64 bpid_ext                    :  2; /* W4 */</div><div class='add'>+	u64 reserved_258_259            :  2;</div><div class='add'>+	u64 lbpid_ext                   :  2;</div><div class='add'>+	u64 reserved_262_319            : 58;</div><div class='add'>+	u64 reserved_320_383            : 64; /* W5 */</div><div class='add'>+	u64 reserved_384_447            : 64; /* W6 */</div><div class='add'>+	u64 reserved_448_511            : 64; /* W7 */</div><div class='add'>+	u64 padding[8];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(sizeof(struct nix_cn20k_sq_ctx_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='add'>+struct nix_cn20k_rq_ctx_s {</div><div class='add'>+	u64 ena                         :  1;</div><div class='add'>+	u64 sso_ena                     :  1;</div><div class='add'>+	u64 ipsech_ena                  :  1;</div><div class='add'>+	u64 ena_wqwd                    :  1;</div><div class='add'>+	u64 cq                          : 20;</div><div class='add'>+	u64 reserved_24_34              : 11;</div><div class='add'>+	u64 port_il4_dis                :  1;</div><div class='add'>+	u64 port_ol4_dis                :  1;</div><div class='add'>+	u64 lenerr_dis                  :  1;</div><div class='add'>+	u64 csum_il4_dis                :  1;</div><div class='add'>+	u64 csum_ol4_dis                :  1;</div><div class='add'>+	u64 len_il4_dis                 :  1;</div><div class='add'>+	u64 len_il3_dis                 :  1;</div><div class='add'>+	u64 len_ol4_dis                 :  1;</div><div class='add'>+	u64 len_ol3_dis                 :  1;</div><div class='add'>+	u64 wqe_aura                    : 20;</div><div class='add'>+	u64 spb_aura                    : 20;</div><div class='add'>+	u64 lpb_aura                    : 20;</div><div class='add'>+	u64 sso_grp                     : 10;</div><div class='add'>+	u64 sso_tt                      :  2;</div><div class='add'>+	u64 pb_caching                  :  2;</div><div class='add'>+	u64 wqe_caching                 :  1;</div><div class='add'>+	u64 xqe_drop_ena                :  1;</div><div class='add'>+	u64 spb_drop_ena                :  1;</div><div class='add'>+	u64 lpb_drop_ena                :  1;</div><div class='add'>+	u64 pb_stashing                 :  1;</div><div class='add'>+	u64 ipsecd_drop_en              :  1;</div><div class='add'>+	u64 chi_ena                     :  1;</div><div class='add'>+	u64 reserved_125_127            :  3;</div><div class='add'>+	u64 band_prof_id_l              : 10;</div><div class='add'>+	u64 sso_fc_ena                  :  1;</div><div class='add'>+	u64 policer_ena                 :  1;</div><div class='add'>+	u64 spb_sizem1                  :  6;</div><div class='add'>+	u64 wqe_skip                    :  2;</div><div class='add'>+	u64 spb_high_sizem1             :  3;</div><div class='add'>+	u64 spb_ena                     :  1;</div><div class='add'>+	u64 lpb_sizem1                  : 12;</div><div class='add'>+	u64 first_skip                  :  7;</div><div class='add'>+	u64 reserved_171_171            :  1;</div><div class='add'>+	u64 later_skip                  :  6;</div><div class='add'>+	u64 xqe_imm_size                :  6;</div><div class='add'>+	u64 band_prof_id_h              :  4;</div><div class='add'>+	u64 reserved_188_189            :  2;</div><div class='add'>+	u64 xqe_imm_copy                :  1;</div><div class='add'>+	u64 xqe_hdr_split               :  1;</div><div class='add'>+	u64 xqe_drop                    :  8;</div><div class='add'>+	u64 xqe_pass                    :  8;</div><div class='add'>+	u64 wqe_pool_drop               :  8;</div><div class='add'>+	u64 wqe_pool_pass               :  8;</div><div class='add'>+	u64 spb_aura_drop               :  8;</div><div class='add'>+	u64 spb_aura_pass               :  8;</div><div class='add'>+	u64 spb_pool_drop               :  8;</div><div class='add'>+	u64 spb_pool_pass               :  8;</div><div class='add'>+	u64 lpb_aura_drop               :  8;</div><div class='add'>+	u64 lpb_aura_pass               :  8;</div><div class='add'>+	u64 lpb_pool_drop               :  8;</div><div class='add'>+	u64 lpb_pool_pass               :  8;</div><div class='add'>+	u64 reserved_288_291            :  4;</div><div class='add'>+	u64 rq_int                      :  8;</div><div class='add'>+	u64 rq_int_ena                  :  8;</div><div class='add'>+	u64 qint_idx                    :  7;</div><div class='add'>+	u64 reserved_315_319            :  5;</div><div class='add'>+	u64 ltag                        : 24;</div><div class='add'>+	u64 good_utag                   :  8;</div><div class='add'>+	u64 bad_utag                    :  8;</div><div class='add'>+	u64 flow_tagw                   :  6;</div><div class='add'>+	u64 ipsec_vwqe                  :  1;</div><div class='add'>+	u64 vwqe_ena                    :  1;</div><div class='add'>+	u64 vtime_wait                  :  8;</div><div class='add'>+	u64 max_vsize_exp               :  4;</div><div class='add'>+	u64 vwqe_skip                   :  2;</div><div class='add'>+	u64 reserved_382_383            :  2;</div><div class='add'>+	u64 octs                        : 48;</div><div class='add'>+	u64 reserved_432_447            : 16;</div><div class='add'>+	u64 pkts                        : 48;</div><div class='add'>+	u64 reserved_496_511            : 16;</div><div class='add'>+	u64 drop_octs                   : 48;</div><div class='add'>+	u64 reserved_560_575            : 16;</div><div class='add'>+	u64 drop_pkts                   : 48;</div><div class='add'>+	u64 reserved_624_639            : 16;</div><div class='add'>+	u64 re_pkts                     : 48;</div><div class='add'>+	u64 reserved_688_703            : 16;</div><div class='add'>+	u64 reserved_704_767            : 64;</div><div class='add'>+	u64 reserved_768_831            : 64;</div><div class='add'>+	u64 reserved_832_895            : 64;</div><div class='add'>+	u64 reserved_896_959            : 64;</div><div class='add'>+	u64 reserved_960_1023           : 64;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(sizeof(struct nix_cn20k_rq_ctx_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='add'>+struct npa_cn20k_aura_s {</div><div class='add'>+	u64 pool_addr;			/* W0 */</div><div class='add'>+	u64 ena                   : 1;  /* W1 */</div><div class='add'>+	u64 reserved_65           : 2;</div><div class='add'>+	u64 pool_caching          : 1;</div><div class='add'>+	u64 reserved_68           : 16;</div><div class='add'>+	u64 avg_con               : 9;</div><div class='add'>+	u64 reserved_93           : 1;</div><div class='add'>+	u64 pool_drop_ena         : 1;</div><div class='add'>+	u64 aura_drop_ena         : 1;</div><div class='add'>+	u64 bp_ena                : 1;</div><div class='add'>+	u64 reserved_97_103       : 7;</div><div class='add'>+	u64 aura_drop             : 8;</div><div class='add'>+	u64 shift                 : 6;</div><div class='add'>+	u64 reserved_118_119      : 2;</div><div class='add'>+	u64 avg_level             : 8;</div><div class='add'>+	u64 count                 : 36; /* W2 */</div><div class='add'>+	u64 reserved_164_167      : 4;</div><div class='add'>+	u64 bpid                  : 12;</div><div class='add'>+	u64 reserved_180_191      : 12;</div><div class='add'>+	u64 limit                 : 36; /* W3 */</div><div class='add'>+	u64 reserved_228_231      : 4;</div><div class='add'>+	u64 bp                    : 7;</div><div class='add'>+	u64 reserved_239_243      : 5;</div><div class='add'>+	u64 fc_ena                : 1;</div><div class='add'>+	u64 fc_up_crossing        : 1;</div><div class='add'>+	u64 fc_stype              : 2;</div><div class='add'>+	u64 fc_hyst_bits          : 4;</div><div class='add'>+	u64 reserved_252_255      : 4;</div><div class='add'>+	u64 fc_addr;			/* W4 */</div><div class='add'>+	u64 pool_drop             : 8;  /* W5 */</div><div class='add'>+	u64 update_time           : 16;</div><div class='add'>+	u64 err_int               : 8;</div><div class='add'>+	u64 err_int_ena           : 8;</div><div class='add'>+	u64 thresh_int            : 1;</div><div class='add'>+	u64 thresh_int_ena        : 1;</div><div class='add'>+	u64 thresh_up             : 1;</div><div class='add'>+	u64 reserved_363          : 1;</div><div class='add'>+	u64 thresh_qint_idx       : 7;</div><div class='add'>+	u64 reserved_371          : 1;</div><div class='add'>+	u64 err_qint_idx          : 7;</div><div class='add'>+	u64 reserved_379_383      : 5;</div><div class='add'>+	u64 thresh                : 36; /* W6*/</div><div class='add'>+	u64 rsvd_423_420          : 4;</div><div class='add'>+	u64 fc_msh_dst            : 11;</div><div class='add'>+	u64 reserved_435_438      : 4;</div><div class='add'>+	u64 op_dpc_ena            : 1;</div><div class='add'>+	u64 op_dpc_set            : 5;</div><div class='add'>+	u64 reserved_445_445      : 1;</div><div class='add'>+	u64 stream_ctx            : 1;</div><div class='add'>+	u64 unified_ctx           : 1;</div><div class='add'>+	u64 reserved_448_511;		/* W7 */</div><div class='add'>+	u64 padding[8];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(sizeof(struct npa_cn20k_aura_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='add'>+struct npa_cn20k_pool_s {</div><div class='add'>+	u64 stack_base;			/* W0 */</div><div class='add'>+	u64 ena                   : 1;</div><div class='add'>+	u64 nat_align             : 1;</div><div class='add'>+	u64 reserved_66_67        : 2;</div><div class='add'>+	u64 stack_caching         : 1;</div><div class='add'>+	u64 reserved_69_87        : 19;</div><div class='add'>+	u64 buf_offset            : 12;</div><div class='add'>+	u64 reserved_100_103      : 4;</div><div class='add'>+	u64 buf_size              : 12;</div><div class='add'>+	u64 reserved_116_119      : 4;</div><div class='add'>+	u64 ref_cnt_prof          : 3;</div><div class='add'>+	u64 reserved_123_127      : 5;</div><div class='add'>+	u64 stack_max_pages       : 32;</div><div class='add'>+	u64 stack_pages           : 32;</div><div class='add'>+	uint64_t bp_0             : 7;</div><div class='add'>+	uint64_t bp_1             : 7;</div><div class='add'>+	uint64_t bp_2             : 7;</div><div class='add'>+	uint64_t bp_3             : 7;</div><div class='add'>+	uint64_t bp_4             : 7;</div><div class='add'>+	uint64_t bp_5             : 7;</div><div class='add'>+	uint64_t bp_6             : 7;</div><div class='add'>+	uint64_t bp_7             : 7;</div><div class='add'>+	uint64_t bp_ena_0         : 1;</div><div class='add'>+	uint64_t bp_ena_1         : 1;</div><div class='add'>+	uint64_t bp_ena_2         : 1;</div><div class='add'>+	uint64_t bp_ena_3         : 1;</div><div class='add'>+	uint64_t bp_ena_4         : 1;</div><div class='add'>+	uint64_t bp_ena_5         : 1;</div><div class='add'>+	uint64_t bp_ena_6         : 1;</div><div class='add'>+	uint64_t bp_ena_7         : 1;</div><div class='add'>+	u64 stack_offset          : 4;</div><div class='add'>+	u64 reserved_260_263      : 4;</div><div class='add'>+	u64 shift                 : 6;</div><div class='add'>+	u64 reserved_270_271      : 2;</div><div class='add'>+	u64 avg_level             : 8;</div><div class='add'>+	u64 avg_con               : 9;</div><div class='add'>+	u64 fc_ena                : 1;</div><div class='add'>+	u64 fc_stype              : 2;</div><div class='add'>+	u64 fc_hyst_bits          : 4;</div><div class='add'>+	u64 fc_up_crossing        : 1;</div><div class='add'>+	u64 reserved_297_299      : 3;</div><div class='add'>+	u64 update_time           : 16;</div><div class='add'>+	u64 reserved_316_319      : 4;</div><div class='add'>+	u64 fc_addr;			/* W5 */</div><div class='add'>+	u64 ptr_start;			/* W6 */</div><div class='add'>+	u64 ptr_end;			/* W7 */</div><div class='add'>+	u64 bpid_0                : 12;</div><div class='add'>+	u64 reserved_524_535      : 12;</div><div class='add'>+	u64 err_int               : 8;</div><div class='add'>+	u64 err_int_ena           : 8;</div><div class='add'>+	u64 thresh_int            : 1;</div><div class='add'>+	u64 thresh_int_ena        : 1;</div><div class='add'>+	u64 thresh_up             : 1;</div><div class='add'>+	u64 reserved_555          : 1;</div><div class='add'>+	u64 thresh_qint_idx       : 7;</div><div class='add'>+	u64 reserved_563          : 1;</div><div class='add'>+	u64 err_qint_idx          : 7;</div><div class='add'>+	u64 reserved_571_575      : 5;</div><div class='add'>+	u64 thresh                : 36;</div><div class='add'>+	u64 rsvd_612_615	  : 4;</div><div class='add'>+	u64 fc_msh_dst		  : 11;</div><div class='add'>+	u64 reserved_627_630      : 4;</div><div class='add'>+	u64 op_dpc_ena            : 1;</div><div class='add'>+	u64 op_dpc_set            : 5;</div><div class='add'>+	u64 reserved_637_637      : 1;</div><div class='add'>+	u64 stream_ctx            : 1;</div><div class='add'>+	u64 reserved_639          : 1;</div><div class='add'>+	u64 reserved_640_703;		/* W10 */</div><div class='add'>+	u64 reserved_704_767;		/* W11 */</div><div class='add'>+	u64 reserved_768_831;		/* W12 */</div><div class='add'>+	u64 reserved_832_895;		/* W13 */</div><div class='add'>+	u64 reserved_896_959;		/* W14 */</div><div class='add'>+	u64 reserved_960_1023;		/* W15 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(sizeof(struct npa_cn20k_pool_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/common.h b/drivers/net/ethernet/marvell/octeontx2/af/common.h<br/>index 2436c1ff9ba4..8a08bebf08c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/common.h</a></div><div class='hunk'>@@ -39,7 +39,7 @@ struct qmem {</div><div class='ctx'> 	void            *base;</div><div class='ctx'> 	dma_addr_t	iova;</div><div class='ctx'> 	int		alloc_sz;</div><div class='del'>-	u16		entry_sz;</div><div class='add'>+	u32		entry_sz;</div><div class='ctx'> 	u8		align;</div><div class='ctx'> 	u32		qsize;</div><div class='ctx'> };</div><div class='hunk'>@@ -156,8 +156,10 @@ enum nix_scheduler {</div><div class='ctx'> #define	NIC_HW_MIN_FRS			40</div><div class='ctx'> #define	NIC_HW_MAX_FRS			9212</div><div class='ctx'> #define	SDP_HW_MAX_FRS			65535</div><div class='add'>+#define	SDP_HW_MIN_FRS			16</div><div class='ctx'> #define CN10K_LMAC_LINK_MAX_FRS		16380 /* 16k - FCS */</div><div class='ctx'> #define CN10K_LBK_LINK_MAX_FRS		65535 /* 64k */</div><div class='add'>+#define SDP_LINK_CREDIT			0x320202</div><div class='ctx'> </div><div class='ctx'> /* NIX RX action operation*/</div><div class='ctx'> #define NIX_RX_ACTIONOP_DROP		(0x0ull)</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h b/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h<br/>index 9ffc6790c513..6180e68e1765 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h</a></div><div class='hunk'>@@ -72,7 +72,6 @@ struct mac_ops {</div><div class='ctx'> 	u8			irq_offset;</div><div class='ctx'> 	u8			int_ena_bit;</div><div class='ctx'> 	u8			lmac_fwi;</div><div class='del'>-	u32			fifo_len;</div><div class='ctx'> 	bool			non_contiguous_serdes_lane;</div><div class='ctx'> 	/* RPM &amp; CGX differs in number of Receive/transmit stats */</div><div class='ctx'> 	u8			rx_stats_cnt;</div><div class='hunk'>@@ -133,6 +132,8 @@ struct mac_ops {</div><div class='ctx'> 	int			(*get_fec_stats)(void *cgxd, int lmac_id,</div><div class='ctx'> 						 struct cgx_fec_stats_rsp *rsp);</div><div class='ctx'> 	int			(*mac_stats_reset)(void *cgxd, int lmac_id);</div><div class='add'>+	void                    (*mac_x2p_reset)(void *cgxd, bool enable);</div><div class='add'>+	int			(*mac_enadis_rx)(void *cgxd, int lmac_id, bool enable);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cgx {</div><div class='hunk'>@@ -142,6 +143,10 @@ struct cgx {</div><div class='ctx'> 	u8			lmac_count;</div><div class='ctx'> 	/* number of LMACs per MAC could be 4 or 8 */</div><div class='ctx'> 	u8			max_lmac_per_mac;</div><div class='add'>+	/* length of fifo varies depending on the number</div><div class='add'>+	 * of LMACS</div><div class='add'>+	 */</div><div class='add'>+	u32			fifo_len;</div><div class='ctx'> #define MAX_LMAC_COUNT		8</div><div class='ctx'> 	struct lmac             *lmac_idmap[MAX_LMAC_COUNT];</div><div class='ctx'> 	struct			work_struct cgx_cmd_work;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.c b/drivers/net/ethernet/marvell/octeontx2/af/mbox.c<br/>index 1e5aa5397504..75872d257eca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/mbox.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/mbox.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/mbox.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/mbox.c</a></div><div class='hunk'>@@ -10,8 +10,11 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "rvu_reg.h"</div><div class='add'>+#include "cn20k/reg.h"</div><div class='add'>+#include "cn20k/api.h"</div><div class='ctx'> #include "mbox.h"</div><div class='ctx'> #include "rvu_trace.h"</div><div class='add'>+#include "rvu.h"</div><div class='ctx'> </div><div class='ctx'> static const u16 msgs_offset = ALIGN(sizeof(struct mbox_hdr), MBOX_MSG_ALIGN);</div><div class='ctx'> </div><div class='hunk'>@@ -28,8 +31,10 @@ void __otx2_mbox_reset(struct otx2_mbox *mbox, int devid)</div><div class='ctx'> 	mdev-&gt;rsp_size = 0;</div><div class='ctx'> 	tx_hdr-&gt;num_msgs = 0;</div><div class='ctx'> 	tx_hdr-&gt;msg_size = 0;</div><div class='add'>+	tx_hdr-&gt;sig = 0;</div><div class='ctx'> 	rx_hdr-&gt;num_msgs = 0;</div><div class='ctx'> 	rx_hdr-&gt;msg_size = 0;</div><div class='add'>+	rx_hdr-&gt;sig = 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(__otx2_mbox_reset);</div><div class='ctx'> </div><div class='hunk'>@@ -53,9 +58,98 @@ void otx2_mbox_destroy(struct otx2_mbox *mbox)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(otx2_mbox_destroy);</div><div class='ctx'> </div><div class='add'>+int cn20k_mbox_setup(struct otx2_mbox *mbox, struct pci_dev *pdev,</div><div class='add'>+		     void *reg_base, int direction, int ndevs)</div><div class='add'>+{</div><div class='add'>+	switch (direction) {</div><div class='add'>+	case MBOX_DIR_AFPF:</div><div class='add'>+	case MBOX_DIR_PFVF:</div><div class='add'>+		mbox-&gt;tx_start = MBOX_DOWN_TX_START;</div><div class='add'>+		mbox-&gt;rx_start = MBOX_DOWN_RX_START;</div><div class='add'>+		mbox-&gt;tx_size  = MBOX_DOWN_TX_SIZE;</div><div class='add'>+		mbox-&gt;rx_size  = MBOX_DOWN_RX_SIZE;</div><div class='add'>+		break;</div><div class='add'>+	case MBOX_DIR_PFAF:</div><div class='add'>+	case MBOX_DIR_VFPF:</div><div class='add'>+		mbox-&gt;tx_start = MBOX_DOWN_RX_START;</div><div class='add'>+		mbox-&gt;rx_start = MBOX_DOWN_TX_START;</div><div class='add'>+		mbox-&gt;tx_size  = MBOX_DOWN_RX_SIZE;</div><div class='add'>+		mbox-&gt;rx_size  = MBOX_DOWN_TX_SIZE;</div><div class='add'>+		break;</div><div class='add'>+	case MBOX_DIR_AFPF_UP:</div><div class='add'>+	case MBOX_DIR_PFVF_UP:</div><div class='add'>+		mbox-&gt;tx_start = MBOX_UP_TX_START;</div><div class='add'>+		mbox-&gt;rx_start = MBOX_UP_RX_START;</div><div class='add'>+		mbox-&gt;tx_size  = MBOX_UP_TX_SIZE;</div><div class='add'>+		mbox-&gt;rx_size  = MBOX_UP_RX_SIZE;</div><div class='add'>+		break;</div><div class='add'>+	case MBOX_DIR_PFAF_UP:</div><div class='add'>+	case MBOX_DIR_VFPF_UP:</div><div class='add'>+		mbox-&gt;tx_start = MBOX_UP_RX_START;</div><div class='add'>+		mbox-&gt;rx_start = MBOX_UP_TX_START;</div><div class='add'>+		mbox-&gt;tx_size  = MBOX_UP_RX_SIZE;</div><div class='add'>+		mbox-&gt;rx_size  = MBOX_UP_TX_SIZE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (direction) {</div><div class='add'>+	case MBOX_DIR_AFPF:</div><div class='add'>+		mbox-&gt;trigger = RVU_MBOX_AF_AFPFX_TRIGX(1);</div><div class='add'>+		mbox-&gt;tr_shift = 4;</div><div class='add'>+		break;</div><div class='add'>+	case MBOX_DIR_AFPF_UP:</div><div class='add'>+		mbox-&gt;trigger = RVU_MBOX_AF_AFPFX_TRIGX(0);</div><div class='add'>+		mbox-&gt;tr_shift = 4;</div><div class='add'>+		break;</div><div class='add'>+	case MBOX_DIR_PFAF:</div><div class='add'>+		mbox-&gt;trigger = RVU_MBOX_PF_PFAF_TRIGX(0);</div><div class='add'>+		mbox-&gt;tr_shift = 0;</div><div class='add'>+		break;</div><div class='add'>+	case MBOX_DIR_PFAF_UP:</div><div class='add'>+		mbox-&gt;trigger = RVU_MBOX_PF_PFAF_TRIGX(1);</div><div class='add'>+		mbox-&gt;tr_shift = 0;</div><div class='add'>+		break;</div><div class='add'>+	case MBOX_DIR_PFVF:</div><div class='add'>+		mbox-&gt;trigger = RVU_MBOX_PF_VFX_PFVF_TRIGX(1);</div><div class='add'>+		mbox-&gt;tr_shift = 4;</div><div class='add'>+		break;</div><div class='add'>+	case MBOX_DIR_PFVF_UP:</div><div class='add'>+		mbox-&gt;trigger = RVU_MBOX_PF_VFX_PFVF_TRIGX(0);</div><div class='add'>+		mbox-&gt;tr_shift = 4;</div><div class='add'>+		break;</div><div class='add'>+	case MBOX_DIR_VFPF:</div><div class='add'>+		mbox-&gt;trigger = RVU_MBOX_VF_VFPF_TRIGX(0);</div><div class='add'>+		mbox-&gt;tr_shift = 0;</div><div class='add'>+		break;</div><div class='add'>+	case MBOX_DIR_VFPF_UP:</div><div class='add'>+		mbox-&gt;trigger = RVU_MBOX_VF_VFPF_TRIGX(1);</div><div class='add'>+		mbox-&gt;tr_shift = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	mbox-&gt;reg_base = reg_base;</div><div class='add'>+	mbox-&gt;pdev = pdev;</div><div class='add'>+</div><div class='add'>+	mbox-&gt;dev = kcalloc(ndevs, sizeof(struct otx2_mbox_dev), GFP_KERNEL);</div><div class='add'>+	if (!mbox-&gt;dev) {</div><div class='add'>+		otx2_mbox_destroy(mbox);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	mbox-&gt;ndevs = ndevs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int otx2_mbox_setup(struct otx2_mbox *mbox, struct pci_dev *pdev,</div><div class='ctx'> 			   void *reg_base, int direction, int ndevs)</div><div class='ctx'> {</div><div class='add'>+	if (is_cn20k(pdev))</div><div class='add'>+		return cn20k_mbox_setup(mbox, pdev, reg_base,</div><div class='add'>+							direction, ndevs);</div><div class='add'>+</div><div class='ctx'> 	switch (direction) {</div><div class='ctx'> 	case MBOX_DIR_AFPF:</div><div class='ctx'> 	case MBOX_DIR_PFVF:</div><div class='hunk'>@@ -188,14 +282,13 @@ int otx2_mbox_wait_for_rsp(struct otx2_mbox *mbox, int devid)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long timeout = jiffies + msecs_to_jiffies(MBOX_RSP_TIMEOUT);</div><div class='ctx'> 	struct otx2_mbox_dev *mdev = &amp;mbox-&gt;dev[devid];</div><div class='del'>-	struct device *sender = &amp;mbox-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	while (!time_after(jiffies, timeout)) {</div><div class='ctx'> 		if (mdev-&gt;num_msgs == mdev-&gt;msgs_acked)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		usleep_range(800, 1000);</div><div class='ctx'> 	}</div><div class='del'>-	dev_dbg(sender, "timed out while waiting for rsp\n");</div><div class='add'>+	trace_otx2_msg_wait_rsp(mbox-&gt;pdev);</div><div class='ctx'> 	return -EIO;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(otx2_mbox_wait_for_rsp);</div><div class='hunk'>@@ -219,6 +312,7 @@ static void otx2_mbox_msg_send_data(struct otx2_mbox *mbox, int devid, u64 data)</div><div class='ctx'> 	struct otx2_mbox_dev *mdev = &amp;mbox-&gt;dev[devid];</div><div class='ctx'> 	struct mbox_hdr *tx_hdr, *rx_hdr;</div><div class='ctx'> 	void *hw_mbase = mdev-&gt;hwbase;</div><div class='add'>+	struct mbox_msghdr *msg;</div><div class='ctx'> 	u64 intr_val;</div><div class='ctx'> </div><div class='ctx'> 	tx_hdr = hw_mbase + mbox-&gt;tx_start;</div><div class='hunk'>@@ -234,7 +328,10 @@ static void otx2_mbox_msg_send_data(struct otx2_mbox *mbox, int devid, u64 data)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;mdev-&gt;mbox_lock);</div><div class='ctx'> </div><div class='del'>-	tx_hdr-&gt;msg_size = mdev-&gt;msg_size;</div><div class='add'>+	if (!tx_hdr-&gt;sig) {</div><div class='add'>+		tx_hdr-&gt;msg_size = mdev-&gt;msg_size;</div><div class='add'>+		tx_hdr-&gt;num_msgs = mdev-&gt;num_msgs;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Reset header for next messages */</div><div class='ctx'> 	mdev-&gt;msg_size = 0;</div><div class='hunk'>@@ -248,10 +345,12 @@ static void otx2_mbox_msg_send_data(struct otx2_mbox *mbox, int devid, u64 data)</div><div class='ctx'> 	 * messages.  So this should be written after writing all the messages</div><div class='ctx'> 	 * to the shared memory.</div><div class='ctx'> 	 */</div><div class='del'>-	tx_hdr-&gt;num_msgs = mdev-&gt;num_msgs;</div><div class='ctx'> 	rx_hdr-&gt;num_msgs = 0;</div><div class='ctx'> </div><div class='del'>-	trace_otx2_msg_send(mbox-&gt;pdev, tx_hdr-&gt;num_msgs, tx_hdr-&gt;msg_size);</div><div class='add'>+	msg = (struct mbox_msghdr *)(hw_mbase + mbox-&gt;tx_start + msgs_offset);</div><div class='add'>+</div><div class='add'>+	trace_otx2_msg_send(mbox-&gt;pdev, tx_hdr-&gt;num_msgs, tx_hdr-&gt;msg_size,</div><div class='add'>+			    msg-&gt;id, msg-&gt;pcifunc);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;mdev-&gt;mbox_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -306,6 +405,7 @@ struct mbox_msghdr *otx2_mbox_alloc_msg_rsp(struct otx2_mbox *mbox, int devid,</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_mbox_dev *mdev = &amp;mbox-&gt;dev[devid];</div><div class='ctx'> 	struct mbox_msghdr *msghdr = NULL;</div><div class='add'>+	struct mbox_hdr *mboxhdr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;mdev-&gt;mbox_lock);</div><div class='ctx'> 	size = ALIGN(size, MBOX_MSG_ALIGN);</div><div class='hunk'>@@ -329,6 +429,11 @@ struct mbox_msghdr *otx2_mbox_alloc_msg_rsp(struct otx2_mbox *mbox, int devid,</div><div class='ctx'> 	mdev-&gt;msg_size += size;</div><div class='ctx'> 	mdev-&gt;rsp_size += size_rsp;</div><div class='ctx'> 	msghdr-&gt;next_msgoff = mdev-&gt;msg_size + msgs_offset;</div><div class='add'>+</div><div class='add'>+	mboxhdr = mdev-&gt;mbase + mbox-&gt;tx_start;</div><div class='add'>+	/* Clear the msg header region */</div><div class='add'>+	memset(mboxhdr, 0, msgs_offset);</div><div class='add'>+</div><div class='ctx'> exit:</div><div class='ctx'> 	spin_unlock(&amp;mdev-&gt;mbox_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -445,6 +550,14 @@ const char *otx2_mbox_id2name(u16 id)</div><div class='ctx'> #define M(_name, _id, _1, _2, _3) case _id: return # _name;</div><div class='ctx'> 	MBOX_MESSAGES</div><div class='ctx'> #undef M</div><div class='add'>+</div><div class='add'>+#define M(_name, _id, _1, _2, _3) case _id: return # _name;</div><div class='add'>+	MBOX_UP_CGX_MESSAGES</div><div class='add'>+#undef M</div><div class='add'>+</div><div class='add'>+#define M(_name, _id, _1, _2, _3) case _id: return # _name;</div><div class='add'>+	MBOX_UP_CPT_MESSAGES</div><div class='add'>+#undef M</div><div class='ctx'> 	default:</div><div class='ctx'> 		return "INVALID ID";</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h<br/>index 6ea2f3071fe8..a3e273126e4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/mbox.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/mbox.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/mbox.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/mbox.h</a></div><div class='hunk'>@@ -10,9 +10,11 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/sizes.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "rvu_struct.h"</div><div class='ctx'> #include "common.h"</div><div class='add'>+#include "cn20k/struct.h"</div><div class='ctx'> </div><div class='ctx'> #define MBOX_SIZE		SZ_64K</div><div class='ctx'> </div><div class='hunk'>@@ -50,6 +52,11 @@</div><div class='ctx'> #define MBOX_DIR_PFVF_UP	6  /* PF sends messages to VF */</div><div class='ctx'> #define MBOX_DIR_VFPF_UP	7  /* VF replies to PF */</div><div class='ctx'> </div><div class='add'>+enum {</div><div class='add'>+	TYPE_AFVF,</div><div class='add'>+	TYPE_AFPF,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct otx2_mbox_dev {</div><div class='ctx'> 	void	    *mbase;   /* This dev's mbox region */</div><div class='ctx'> 	void	    *hwbase;</div><div class='hunk'>@@ -78,6 +85,8 @@ struct otx2_mbox {</div><div class='ctx'> struct mbox_hdr {</div><div class='ctx'> 	u64 msg_size;	/* Total msgs size embedded */</div><div class='ctx'> 	u16  num_msgs;   /* No of msgs embedded */</div><div class='add'>+	u16 opt_msg;</div><div class='add'>+	u8 sig;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Header which precedes every msg and is also part of it */</div><div class='hunk'>@@ -144,6 +153,9 @@ M(LMTST_TBL_SETUP,	0x00a, lmtst_tbl_setup, lmtst_tbl_setup_req,    \</div><div class='ctx'> 				msg_rsp)				\</div><div class='ctx'> M(SET_VF_PERM,		0x00b, set_vf_perm, set_vf_perm, msg_rsp)	\</div><div class='ctx'> M(PTP_GET_CAP,		0x00c, ptp_get_cap, msg_req, ptp_get_cap_rsp)	\</div><div class='add'>+M(GET_REP_CNT,		0x00d, get_rep_cnt, msg_req, get_rep_cnt_rsp)	\</div><div class='add'>+M(ESW_CFG,		0x00e, esw_cfg, esw_cfg_req, msg_rsp)	\</div><div class='add'>+M(REP_EVENT_NOTIFY,     0x00f, rep_event_notify, rep_event, msg_rsp) \</div><div class='ctx'> /* CGX mbox IDs (range 0x200 - 0x3FF) */				\</div><div class='ctx'> M(CGX_START_RXTX,	0x200, cgx_start_rxtx, msg_req, msg_rsp)	\</div><div class='ctx'> M(CGX_STOP_RXTX,	0x201, cgx_stop_rxtx, msg_req, msg_rsp)		\</div><div class='hunk'>@@ -191,6 +203,8 @@ M(NPA_LF_ALLOC,		0x400, npa_lf_alloc,				\</div><div class='ctx'> M(NPA_LF_FREE,		0x401, npa_lf_free, msg_req, msg_rsp)		\</div><div class='ctx'> M(NPA_AQ_ENQ,		0x402, npa_aq_enq, npa_aq_enq_req, npa_aq_enq_rsp)   \</div><div class='ctx'> M(NPA_HWCTX_DISABLE,	0x403, npa_hwctx_disable, hwctx_disable_req, msg_rsp)\</div><div class='add'>+M(NPA_CN20K_AQ_ENQ,	0x404, npa_cn20k_aq_enq, npa_cn20k_aq_enq_req,	\</div><div class='add'>+				npa_cn20k_aq_enq_rsp)			\</div><div class='ctx'> /* SSO/SSOW mbox IDs (range 0x600 - 0x7FF) */				\</div><div class='ctx'> /* TIM mbox IDs (range 0x800 - 0x9FF) */				\</div><div class='ctx'> /* CPT mbox IDs (range 0xA00 - 0xBFF) */				\</div><div class='hunk'>@@ -310,6 +324,10 @@ M(NIX_BANDPROF_FREE,	0x801e, nix_bandprof_free, nix_bandprof_free_req,   \</div><div class='ctx'> 				msg_rsp)				    \</div><div class='ctx'> M(NIX_BANDPROF_GET_HWINFO, 0x801f, nix_bandprof_get_hwinfo, msg_req,		\</div><div class='ctx'> 				nix_bandprof_get_hwinfo_rsp)		    \</div><div class='add'>+M(NIX_CPT_BP_ENABLE,    0x8020, nix_cpt_bp_enable, nix_bp_cfg_req,	    \</div><div class='add'>+				nix_bp_cfg_rsp)				    \</div><div class='add'>+M(NIX_CPT_BP_DISABLE,   0x8021, nix_cpt_bp_disable, nix_bp_cfg_req,	    \</div><div class='add'>+				msg_rsp)				\</div><div class='ctx'> M(NIX_READ_INLINE_IPSEC_CFG, 0x8023, nix_read_inline_ipsec_cfg,		\</div><div class='ctx'> 				msg_req, nix_inline_ipsec_cfg)		\</div><div class='ctx'> M(NIX_MCAST_GRP_CREATE,	0x802b, nix_mcast_grp_create, nix_mcast_grp_create_req,	\</div><div class='hunk'>@@ -319,6 +337,9 @@ M(NIX_MCAST_GRP_DESTROY, 0x802c, nix_mcast_grp_destroy, nix_mcast_grp_destroy_re</div><div class='ctx'> M(NIX_MCAST_GRP_UPDATE, 0x802d, nix_mcast_grp_update,				\</div><div class='ctx'> 				nix_mcast_grp_update_req,			\</div><div class='ctx'> 				nix_mcast_grp_update_rsp)			\</div><div class='add'>+M(NIX_LF_STATS, 0x802e, nix_lf_stats, nix_stats_req, nix_stats_rsp)	\</div><div class='add'>+M(NIX_CN20K_AQ_ENQ,	0x802f, nix_cn20k_aq_enq, nix_cn20k_aq_enq_req,		\</div><div class='add'>+				nix_cn20k_aq_enq_rsp)				\</div><div class='ctx'> /* MCS mbox IDs (range 0xA000 - 0xBFFF) */					\</div><div class='ctx'> M(MCS_ALLOC_RESOURCES,	0xa000, mcs_alloc_resources, mcs_alloc_rsrc_req,	\</div><div class='ctx'> 				mcs_alloc_rsrc_rsp)				\</div><div class='hunk'>@@ -380,12 +401,16 @@ M(CPT_INST_LMTST,	0xD00, cpt_inst_lmtst, cpt_inst_lmtst_req, msg_rsp)</div><div class='ctx'> #define MBOX_UP_MCS_MESSAGES						\</div><div class='ctx'> M(MCS_INTR_NOTIFY,	0xE00, mcs_intr_notify, mcs_intr_info, msg_rsp)</div><div class='ctx'> </div><div class='add'>+#define MBOX_UP_REP_MESSAGES						\</div><div class='add'>+M(REP_EVENT_UP_NOTIFY,	0xEF0, rep_event_up_notify, rep_event, msg_rsp) \</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> #define M(_name, _id, _1, _2, _3) MBOX_MSG_ ## _name = _id,</div><div class='ctx'> MBOX_MESSAGES</div><div class='ctx'> MBOX_UP_CGX_MESSAGES</div><div class='ctx'> MBOX_UP_CPT_MESSAGES</div><div class='ctx'> MBOX_UP_MCS_MESSAGES</div><div class='add'>+MBOX_UP_REP_MESSAGES</div><div class='ctx'> #undef M</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -512,6 +537,8 @@ struct get_hw_cap_rsp {</div><div class='ctx'> 	u8 nix_fixed_txschq_mapping; /* Schq mapping fixed or flexible */</div><div class='ctx'> 	u8 nix_shaping;		     /* Is shaping and coloring supported */</div><div class='ctx'> 	u8 npc_hash_extract;	/* Is hash extract supported */</div><div class='add'>+#define HW_CAP_MACSEC		BIT_ULL(1)</div><div class='add'>+	u64 hw_caps;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* CGX mbox message formats */</div><div class='hunk'>@@ -636,11 +663,17 @@ struct cgx_lmac_fwdata_s {</div><div class='ctx'> 	u64 supported_link_modes;</div><div class='ctx'> 	/* only applicable if AN is supported */</div><div class='ctx'> 	u64 advertised_fec;</div><div class='del'>-	u64 advertised_link_modes;</div><div class='add'>+	u64 advertised_link_modes_own:1; /* CGX_CMD_OWN */</div><div class='add'>+	u64 advertised_link_modes:63;</div><div class='ctx'> 	/* Only applicable if SFP/QSFP slot is present */</div><div class='ctx'> 	struct sfp_eeprom_s sfp_eeprom;</div><div class='ctx'> 	struct phy_s phy;</div><div class='del'>-#define LMAC_FWDATA_RESERVED_MEM 1021</div><div class='add'>+	u32 lmac_type;</div><div class='add'>+	u32 portm_idx;</div><div class='add'>+	u64 mgmt_port:1;</div><div class='add'>+	u64 advertised_an:1;</div><div class='add'>+	u64 port;</div><div class='add'>+#define LMAC_FWDATA_RESERVED_MEM 1018</div><div class='ctx'> 	u64 reserved[LMAC_FWDATA_RESERVED_MEM];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -653,12 +686,13 @@ struct cgx_set_link_mode_args {</div><div class='ctx'> 	u32 speed;</div><div class='ctx'> 	u8 duplex;</div><div class='ctx'> 	u8 an;</div><div class='del'>-	u8 ports;</div><div class='add'>+	u8 mode_baseidx;</div><div class='add'>+	u8 multimode;</div><div class='ctx'> 	u64 mode;</div><div class='add'>+	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct cgx_set_link_mode_req {</div><div class='del'>-#define AUTONEG_UNKNOWN		0xff</div><div class='ctx'> 	struct mbox_msghdr hdr;</div><div class='ctx'> 	struct cgx_set_link_mode_args args;</div><div class='ctx'> };</div><div class='hunk'>@@ -802,6 +836,39 @@ struct npa_aq_enq_rsp {</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct npa_cn20k_aq_enq_req {</div><div class='add'>+	struct mbox_msghdr hdr;</div><div class='add'>+	u32 aura_id;</div><div class='add'>+	u8 ctype;</div><div class='add'>+	u8 op;</div><div class='add'>+	union {</div><div class='add'>+		/* Valid when op == WRITE/INIT and ctype == AURA.</div><div class='add'>+		 * LF fills the pool_id in aura.pool_addr. AF will translate</div><div class='add'>+		 * the pool_id to pool context pointer.</div><div class='add'>+		 */</div><div class='add'>+		struct npa_cn20k_aura_s aura;</div><div class='add'>+		/* Valid when op == WRITE/INIT and ctype == POOL */</div><div class='add'>+		struct npa_cn20k_pool_s pool;</div><div class='add'>+	};</div><div class='add'>+	/* Mask data when op == WRITE (1=write, 0=don't write) */</div><div class='add'>+	union {</div><div class='add'>+		/* Valid when op == WRITE and ctype == AURA */</div><div class='add'>+		struct npa_cn20k_aura_s aura_mask;</div><div class='add'>+		/* Valid when op == WRITE and ctype == POOL */</div><div class='add'>+		struct npa_cn20k_pool_s pool_mask;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct npa_cn20k_aq_enq_rsp {</div><div class='add'>+	struct mbox_msghdr hdr;</div><div class='add'>+	union {</div><div class='add'>+		/* Valid when op == READ and ctype == AURA */</div><div class='add'>+		struct npa_cn20k_aura_s aura;</div><div class='add'>+		/* Valid when op == READ and ctype == POOL */</div><div class='add'>+		struct npa_cn20k_pool_s pool;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Disable all contexts of type 'ctype' */</div><div class='ctx'> struct hwctx_disable_req {</div><div class='ctx'> 	struct mbox_msghdr hdr;</div><div class='hunk'>@@ -910,6 +977,42 @@ struct nix_lf_free_req {</div><div class='ctx'> 	u64 flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* CN20K NIX AQ enqueue msg */</div><div class='add'>+struct nix_cn20k_aq_enq_req {</div><div class='add'>+	struct mbox_msghdr hdr;</div><div class='add'>+	u32  qidx;</div><div class='add'>+	u8 ctype;</div><div class='add'>+	u8 op;</div><div class='add'>+	union {</div><div class='add'>+		struct nix_cn20k_rq_ctx_s rq;</div><div class='add'>+		struct nix_cn20k_sq_ctx_s sq;</div><div class='add'>+		struct nix_cn20k_cq_ctx_s cq;</div><div class='add'>+		struct nix_rsse_s   rss;</div><div class='add'>+		struct nix_rx_mce_s mce;</div><div class='add'>+		struct nix_bandprof_s prof;</div><div class='add'>+	};</div><div class='add'>+	union {</div><div class='add'>+		struct nix_cn20k_rq_ctx_s rq_mask;</div><div class='add'>+		struct nix_cn20k_sq_ctx_s sq_mask;</div><div class='add'>+		struct nix_cn20k_cq_ctx_s cq_mask;</div><div class='add'>+		struct nix_rsse_s   rss_mask;</div><div class='add'>+		struct nix_rx_mce_s mce_mask;</div><div class='add'>+		struct nix_bandprof_s prof_mask;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nix_cn20k_aq_enq_rsp {</div><div class='add'>+	struct mbox_msghdr hdr;</div><div class='add'>+	union {</div><div class='add'>+		struct nix_cn20k_rq_ctx_s rq;</div><div class='add'>+		struct nix_cn20k_sq_ctx_s sq;</div><div class='add'>+		struct nix_cn20k_cq_ctx_s cq;</div><div class='add'>+		struct nix_rsse_s   rss;</div><div class='add'>+		struct nix_rx_mce_s mce;</div><div class='add'>+		struct nix_bandprof_s prof;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* CN10K NIX AQ enqueue msg */</div><div class='ctx'> struct nix_cn10k_aq_enq_req {</div><div class='ctx'> 	struct mbox_msghdr hdr;</div><div class='hunk'>@@ -1364,6 +1467,37 @@ struct nix_bandprof_get_hwinfo_rsp {</div><div class='ctx'> 	u32 policer_timeunit;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct nix_stats_req {</div><div class='add'>+	struct mbox_msghdr hdr;</div><div class='add'>+	u8 reset;</div><div class='add'>+	u16 pcifunc;</div><div class='add'>+	u64 rsvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nix_stats_rsp {</div><div class='add'>+	struct mbox_msghdr hdr;</div><div class='add'>+	u16 pcifunc;</div><div class='add'>+	struct {</div><div class='add'>+		u64 octs;</div><div class='add'>+		u64 ucast;</div><div class='add'>+		u64 bcast;</div><div class='add'>+		u64 mcast;</div><div class='add'>+		u64 drop;</div><div class='add'>+		u64 drop_octs;</div><div class='add'>+		u64 drop_mcast;</div><div class='add'>+		u64 drop_bcast;</div><div class='add'>+		u64 err;</div><div class='add'>+		u64 rsvd[5];</div><div class='add'>+	} rx;</div><div class='add'>+	struct {</div><div class='add'>+		u64 ucast;</div><div class='add'>+		u64 bcast;</div><div class='add'>+		u64 mcast;</div><div class='add'>+		u64 drop;</div><div class='add'>+		u64 octs;</div><div class='add'>+	} tx;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* NPC mbox message structs */</div><div class='ctx'> </div><div class='ctx'> #define NPC_MCAM_ENTRY_INVALID	0xFFFF</div><div class='hunk'>@@ -1525,6 +1659,41 @@ struct ptp_get_cap_rsp {</div><div class='ctx'> 	u64 cap;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct get_rep_cnt_rsp {</div><div class='add'>+	struct mbox_msghdr hdr;</div><div class='add'>+	u16 rep_cnt;</div><div class='add'>+	u16 rep_pf_map[64];</div><div class='add'>+	u64 rsvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct esw_cfg_req {</div><div class='add'>+	struct mbox_msghdr hdr;</div><div class='add'>+	u8 ena;</div><div class='add'>+	u64 rsvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rep_evt_data {</div><div class='add'>+	u8 port_state;</div><div class='add'>+	u8 vf_state;</div><div class='add'>+	u16 rx_mode;</div><div class='add'>+	u16 rx_flags;</div><div class='add'>+	u16 mtu;</div><div class='add'>+	u8 mac[ETH_ALEN];</div><div class='add'>+	u64 rsvd[5];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rep_event {</div><div class='add'>+	struct mbox_msghdr hdr;</div><div class='add'>+	u16 pcifunc;</div><div class='add'>+#define RVU_EVENT_PORT_STATE		BIT_ULL(0)</div><div class='add'>+#define RVU_EVENT_PFVF_STATE		BIT_ULL(1)</div><div class='add'>+#define RVU_EVENT_MTU_CHANGE		BIT_ULL(2)</div><div class='add'>+#define RVU_EVENT_RX_MODE_CHANGE	BIT_ULL(3)</div><div class='add'>+#define RVU_EVENT_MAC_ADDR_CHANGE	BIT_ULL(4)</div><div class='add'>+	u16 event;</div><div class='add'>+	struct rep_evt_data evt_data;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct flow_msg {</div><div class='ctx'> 	unsigned char dmac[6];</div><div class='ctx'> 	unsigned char smac[6];</div><div class='hunk'>@@ -1563,6 +1732,7 @@ struct flow_msg {</div><div class='ctx'> 	u8 icmp_type;</div><div class='ctx'> 	u8 icmp_code;</div><div class='ctx'> 	__be16 tcp_flags;</div><div class='add'>+	u16 sq_id;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct npc_install_flow_req {</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c<br/>index d39d86e694cc..a80c8e7c94f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c</a></div><div class='hunk'>@@ -97,7 +97,7 @@ int mcs_add_intr_wq_entry(struct mcs *mcs, struct mcs_intr_event *event)</div><div class='ctx'> 	if (pcifunc &amp; RVU_PFVF_FUNC_MASK)</div><div class='ctx'> 		pfvf = &amp;mcs-&gt;vf[rvu_get_hwvf(rvu, pcifunc)];</div><div class='ctx'> 	else</div><div class='del'>-		pfvf = &amp;mcs-&gt;pf[rvu_get_pf(pcifunc)];</div><div class='add'>+		pfvf = &amp;mcs-&gt;pf[rvu_get_pf(rvu-&gt;pdev, pcifunc)];</div><div class='ctx'> </div><div class='ctx'> 	event-&gt;intr_mask &amp;= pfvf-&gt;intr_mask;</div><div class='ctx'> </div><div class='hunk'>@@ -123,7 +123,7 @@ static int mcs_notify_pfvf(struct mcs_intr_event *event, struct rvu *rvu)</div><div class='ctx'> 	struct mcs_intr_info *req;</div><div class='ctx'> 	int pf;</div><div class='ctx'> </div><div class='del'>-	pf = rvu_get_pf(event-&gt;pcifunc);</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, event-&gt;pcifunc);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;rvu-&gt;mbox_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -143,6 +143,8 @@ static int mcs_notify_pfvf(struct mcs_intr_event *event, struct rvu *rvu)</div><div class='ctx'> </div><div class='ctx'> 	otx2_mbox_msg_send_up(&amp;rvu-&gt;afpf_wq_info.mbox_up, pf);</div><div class='ctx'> </div><div class='add'>+	otx2_mbox_wait_for_rsp(&amp;rvu-&gt;afpf_wq_info.mbox_up, pf);</div><div class='add'>+</div><div class='ctx'> 	mutex_unlock(&amp;rvu-&gt;mbox_lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -191,7 +193,7 @@ int rvu_mbox_handler_mcs_intr_cfg(struct rvu *rvu,</div><div class='ctx'> 	if (pcifunc &amp; RVU_PFVF_FUNC_MASK)</div><div class='ctx'> 		pfvf = &amp;mcs-&gt;vf[rvu_get_hwvf(rvu, pcifunc)];</div><div class='ctx'> 	else</div><div class='del'>-		pfvf = &amp;mcs-&gt;pf[rvu_get_pf(pcifunc)];</div><div class='add'>+		pfvf = &amp;mcs-&gt;pf[rvu_get_pf(rvu-&gt;pdev, pcifunc)];</div><div class='ctx'> </div><div class='ctx'> 	mcs-&gt;pf_map[0] = pcifunc;</div><div class='ctx'> 	pfvf-&gt;intr_mask = req-&gt;intr_mask;</div><div class='hunk'>@@ -911,7 +913,7 @@ int rvu_mcs_init(struct rvu *rvu)</div><div class='ctx'> 	/* Initialize the wq for handling mcs interrupts */</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;rvu-&gt;mcs_intrq_head);</div><div class='ctx'> 	INIT_WORK(&amp;rvu-&gt;mcs_intr_work, mcs_intr_handler_task);</div><div class='del'>-	rvu-&gt;mcs_intr_wq = alloc_workqueue("mcs_intr_wq", 0, 0);</div><div class='add'>+	rvu-&gt;mcs_intr_wq = alloc_workqueue("mcs_intr_wq", WQ_PERCPU, 0);</div><div class='ctx'> 	if (!rvu-&gt;mcs_intr_wq) {</div><div class='ctx'> 		dev_err(rvu-&gt;dev, "mcs alloc workqueue failed\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -925,7 +927,6 @@ void rvu_mcs_exit(struct rvu *rvu)</div><div class='ctx'> 	if (!rvu-&gt;mcs_intr_wq)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	flush_workqueue(rvu-&gt;mcs_intr_wq);</div><div class='ctx'> 	destroy_workqueue(rvu-&gt;mcs_intr_wq);</div><div class='ctx'> 	rvu-&gt;mcs_intr_wq = NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/ptp.c b/drivers/net/ethernet/marvell/octeontx2/af/ptp.c<br/>index bcc96eed2481..66749b3649c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/ptp.c</a></div><div class='hunk'>@@ -545,8 +545,7 @@ static int ptp_probe(struct pci_dev *pdev,</div><div class='ctx'> 	spin_lock_init(&amp;ptp-&gt;ptp_lock);</div><div class='ctx'> 	if (cn10k_ptp_errata(ptp)) {</div><div class='ctx'> 		ptp-&gt;read_ptp_tstmp = &amp;read_ptp_tstmp_sec_nsec;</div><div class='del'>-		hrtimer_init(&amp;ptp-&gt;hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-		ptp-&gt;hrtimer.function = ptp_reset_thresh;</div><div class='add'>+		hrtimer_setup(&amp;ptp-&gt;hrtimer, ptp_reset_thresh, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ptp-&gt;read_ptp_tstmp = &amp;read_ptp_tstmp_nsec;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rpm.c b/drivers/net/ethernet/marvell/octeontx2/af/rpm.c<br/>index 1b34cf9c9703..2e9945446199 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rpm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rpm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rpm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rpm.c</a></div><div class='hunk'>@@ -39,6 +39,8 @@ static struct mac_ops		rpm_mac_ops   = {</div><div class='ctx'> 	.mac_get_pfc_frm_cfg   =        rpm_lmac_get_pfc_frm_cfg,</div><div class='ctx'> 	.mac_reset   =			rpm_lmac_reset,</div><div class='ctx'> 	.mac_stats_reset		 =	  rpm_stats_reset,</div><div class='add'>+	.mac_x2p_reset                   =        rpm_x2p_reset,</div><div class='add'>+	.mac_enadis_rx			 =        rpm_enadis_rx,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct mac_ops		rpm2_mac_ops   = {</div><div class='hunk'>@@ -72,6 +74,8 @@ static struct mac_ops		rpm2_mac_ops   = {</div><div class='ctx'> 	.mac_get_pfc_frm_cfg   =        rpm_lmac_get_pfc_frm_cfg,</div><div class='ctx'> 	.mac_reset   =			rpm_lmac_reset,</div><div class='ctx'> 	.mac_stats_reset	    =	rpm_stats_reset,</div><div class='add'>+	.mac_x2p_reset              =   rpm_x2p_reset,</div><div class='add'>+	.mac_enadis_rx		    =   rpm_enadis_rx,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> bool is_dev_rpm2(void *rpmd)</div><div class='hunk'>@@ -467,7 +471,7 @@ u8 rpm_get_lmac_type(void *rpmd, int lmac_id)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_LINK_STS, req);</div><div class='del'>-	err = cgx_fwi_cmd_generic(req, &amp;resp, rpm, 0);</div><div class='add'>+	err = cgx_fwi_cmd_generic(req, &amp;resp, rpm, lmac_id);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		return FIELD_GET(RESP_LINKSTAT_LMAC_TYPE, resp);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -480,7 +484,7 @@ u32 rpm_get_lmac_fifo_len(void *rpmd, int lmac_id)</div><div class='ctx'> 	u8 num_lmacs;</div><div class='ctx'> 	u32 fifo_len;</div><div class='ctx'> </div><div class='del'>-	fifo_len = rpm-&gt;mac_ops-&gt;fifo_len;</div><div class='add'>+	fifo_len = rpm-&gt;fifo_len;</div><div class='ctx'> 	num_lmacs = rpm-&gt;mac_ops-&gt;get_nr_lmacs(rpm);</div><div class='ctx'> </div><div class='ctx'> 	switch (num_lmacs) {</div><div class='hunk'>@@ -533,9 +537,9 @@ u32 rpm2_get_lmac_fifo_len(void *rpmd, int lmac_id)</div><div class='ctx'> 	 */</div><div class='ctx'> 	max_lmac = (rpm_read(rpm, 0, CGX_CONST) &gt;&gt; 24) &amp; 0xFF;</div><div class='ctx'> 	if (max_lmac &gt; 4)</div><div class='del'>-		fifo_len = rpm-&gt;mac_ops-&gt;fifo_len / 2;</div><div class='add'>+		fifo_len = rpm-&gt;fifo_len / 2;</div><div class='ctx'> 	else</div><div class='del'>-		fifo_len = rpm-&gt;mac_ops-&gt;fifo_len;</div><div class='add'>+		fifo_len = rpm-&gt;fifo_len;</div><div class='ctx'> </div><div class='ctx'> 	if (lmac_id &lt; 4) {</div><div class='ctx'> 		num_lmacs = hweight8(lmac_info &amp; 0xF);</div><div class='hunk'>@@ -699,46 +703,51 @@ int rpm_get_fec_stats(void *rpmd, int lmac_id, struct cgx_fec_stats_rsp *rsp)</div><div class='ctx'> 	if (rpm-&gt;lmac_idmap[lmac_id]-&gt;link_info.fec == OTX2_FEC_NONE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	/* latched registers FCFECX_CW_HI/RSFEC_STAT_FAST_DATA_HI_CDC are common</div><div class='add'>+	 * for all counters. Acquire lock to ensure serialized reads</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;rpm-&gt;lock);</div><div class='ctx'> 	if (rpm-&gt;lmac_idmap[lmac_id]-&gt;link_info.fec == OTX2_FEC_BASER) {</div><div class='del'>-		val_lo = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_VL0_CCW_LO);</div><div class='del'>-		val_hi = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_CW_HI);</div><div class='add'>+		val_lo = rpm_read(rpm, 0, RPMX_MTI_FCFECX_VL0_CCW_LO(lmac_id));</div><div class='add'>+		val_hi = rpm_read(rpm, 0, RPMX_MTI_FCFECX_CW_HI(lmac_id));</div><div class='ctx'> 		rsp-&gt;fec_corr_blks = (val_hi &lt;&lt; 16 | val_lo);</div><div class='ctx'> </div><div class='del'>-		val_lo = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_VL0_NCCW_LO);</div><div class='del'>-		val_hi = rpm_read(rpm, lmac_id, RPMX_MTI_FCFECX_CW_HI);</div><div class='add'>+		val_lo = rpm_read(rpm, 0, RPMX_MTI_FCFECX_VL0_NCCW_LO(lmac_id));</div><div class='add'>+		val_hi = rpm_read(rpm, 0, RPMX_MTI_FCFECX_CW_HI(lmac_id));</div><div class='ctx'> 		rsp-&gt;fec_uncorr_blks = (val_hi &lt;&lt; 16 | val_lo);</div><div class='ctx'> </div><div class='ctx'> 		/* 50G uses 2 Physical serdes lines */</div><div class='ctx'> 		if (rpm-&gt;lmac_idmap[lmac_id]-&gt;link_info.lmac_type_id ==</div><div class='ctx'> 		    LMAC_MODE_50G_R) {</div><div class='del'>-			val_lo = rpm_read(rpm, lmac_id,</div><div class='del'>-					  RPMX_MTI_FCFECX_VL1_CCW_LO);</div><div class='del'>-			val_hi = rpm_read(rpm, lmac_id,</div><div class='del'>-					  RPMX_MTI_FCFECX_CW_HI);</div><div class='add'>+			val_lo = rpm_read(rpm, 0,</div><div class='add'>+					  RPMX_MTI_FCFECX_VL1_CCW_LO(lmac_id));</div><div class='add'>+			val_hi = rpm_read(rpm, 0,</div><div class='add'>+					  RPMX_MTI_FCFECX_CW_HI(lmac_id));</div><div class='ctx'> 			rsp-&gt;fec_corr_blks += (val_hi &lt;&lt; 16 | val_lo);</div><div class='ctx'> </div><div class='del'>-			val_lo = rpm_read(rpm, lmac_id,</div><div class='del'>-					  RPMX_MTI_FCFECX_VL1_NCCW_LO);</div><div class='del'>-			val_hi = rpm_read(rpm, lmac_id,</div><div class='del'>-					  RPMX_MTI_FCFECX_CW_HI);</div><div class='add'>+			val_lo = rpm_read(rpm, 0,</div><div class='add'>+					  RPMX_MTI_FCFECX_VL1_NCCW_LO(lmac_id));</div><div class='add'>+			val_hi = rpm_read(rpm, 0,</div><div class='add'>+					  RPMX_MTI_FCFECX_CW_HI(lmac_id));</div><div class='ctx'> 			rsp-&gt;fec_uncorr_blks += (val_hi &lt;&lt; 16 | val_lo);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* enable RS-FEC capture */</div><div class='del'>-		cfg = rpm_read(rpm, 0, RPMX_MTI_STAT_STATN_CONTROL);</div><div class='add'>+		cfg = rpm_read(rpm, 0, RPMX_MTI_RSFEC_STAT_STATN_CONTROL);</div><div class='ctx'> 		cfg |= RPMX_RSFEC_RX_CAPTURE | BIT(lmac_id);</div><div class='del'>-		rpm_write(rpm, 0, RPMX_MTI_STAT_STATN_CONTROL, cfg);</div><div class='add'>+		rpm_write(rpm, 0, RPMX_MTI_RSFEC_STAT_STATN_CONTROL, cfg);</div><div class='ctx'> </div><div class='ctx'> 		val_lo = rpm_read(rpm, 0,</div><div class='ctx'> 				  RPMX_MTI_RSFEC_STAT_COUNTER_CAPTURE_2);</div><div class='del'>-		val_hi = rpm_read(rpm, 0, RPMX_MTI_STAT_DATA_HI_CDC);</div><div class='add'>+		val_hi = rpm_read(rpm, 0, RPMX_MTI_RSFEC_STAT_FAST_DATA_HI_CDC);</div><div class='ctx'> 		rsp-&gt;fec_corr_blks = (val_hi &lt;&lt; 32 | val_lo);</div><div class='ctx'> </div><div class='ctx'> 		val_lo = rpm_read(rpm, 0,</div><div class='ctx'> 				  RPMX_MTI_RSFEC_STAT_COUNTER_CAPTURE_3);</div><div class='del'>-		val_hi = rpm_read(rpm, 0, RPMX_MTI_STAT_DATA_HI_CDC);</div><div class='add'>+		val_hi = rpm_read(rpm, 0, RPMX_MTI_RSFEC_STAT_FAST_DATA_HI_CDC);</div><div class='ctx'> 		rsp-&gt;fec_uncorr_blks = (val_hi &lt;&lt; 32 | val_lo);</div><div class='ctx'> 	}</div><div class='add'>+	mutex_unlock(&amp;rpm-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -763,3 +772,41 @@ int rpm_lmac_reset(void *rpmd, int lmac_id, u8 pf_req_flr)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void rpm_x2p_reset(void *rpmd, bool enable)</div><div class='add'>+{</div><div class='add'>+	rpm_t *rpm = rpmd;</div><div class='add'>+	int lmac_id;</div><div class='add'>+	u64 cfg;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		for_each_set_bit(lmac_id, &amp;rpm-&gt;lmac_bmap, rpm-&gt;max_lmac_per_mac)</div><div class='add'>+			rpm-&gt;mac_ops-&gt;mac_enadis_rx(rpm, lmac_id, false);</div><div class='add'>+</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+</div><div class='add'>+		cfg = rpm_read(rpm, 0, RPMX_CMR_GLOBAL_CFG);</div><div class='add'>+		rpm_write(rpm, 0, RPMX_CMR_GLOBAL_CFG, cfg | RPM_NIX0_RESET);</div><div class='add'>+	} else {</div><div class='add'>+		cfg = rpm_read(rpm, 0, RPMX_CMR_GLOBAL_CFG);</div><div class='add'>+		cfg &amp;= ~RPM_NIX0_RESET;</div><div class='add'>+		rpm_write(rpm, 0, RPMX_CMR_GLOBAL_CFG, cfg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rpm_enadis_rx(void *rpmd, int lmac_id, bool enable)</div><div class='add'>+{</div><div class='add'>+	rpm_t *rpm = rpmd;</div><div class='add'>+	u64 cfg;</div><div class='add'>+</div><div class='add'>+	if (!is_lmac_valid(rpm, lmac_id))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);</div><div class='add'>+	if (enable)</div><div class='add'>+		cfg |= RPM_RX_EN;</div><div class='add'>+	else</div><div class='add'>+		cfg &amp;= ~RPM_RX_EN;</div><div class='add'>+	rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rpm.h b/drivers/net/ethernet/marvell/octeontx2/af/rpm.h<br/>index 34b11deb0f3c..b8d3972e096a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rpm.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rpm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rpm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rpm.h</a></div><div class='hunk'>@@ -17,6 +17,8 @@</div><div class='ctx'> </div><div class='ctx'> /* Registers */</div><div class='ctx'> #define RPMX_CMRX_CFG			0x00</div><div class='add'>+#define RPMX_CMR_GLOBAL_CFG		0x08</div><div class='add'>+#define RPM_NIX0_RESET			BIT_ULL(3)</div><div class='ctx'> #define RPMX_RX_TS_PREPEND              BIT_ULL(22)</div><div class='ctx'> #define RPMX_TX_PTP_1S_SUPPORT          BIT_ULL(17)</div><div class='ctx'> #define RPMX_CMRX_RX_ID_MAP		0x80</div><div class='hunk'>@@ -84,16 +86,18 @@</div><div class='ctx'> /* FEC stats */</div><div class='ctx'> #define RPMX_MTI_STAT_STATN_CONTROL			0x10018</div><div class='ctx'> #define RPMX_MTI_STAT_DATA_HI_CDC			0x10038</div><div class='del'>-#define RPMX_RSFEC_RX_CAPTURE				BIT_ULL(27)</div><div class='add'>+#define RPMX_RSFEC_RX_CAPTURE				BIT_ULL(28)</div><div class='ctx'> #define RPMX_CMD_CLEAR_RX				BIT_ULL(30)</div><div class='ctx'> #define RPMX_CMD_CLEAR_TX				BIT_ULL(31)</div><div class='add'>+#define RPMX_MTI_RSFEC_STAT_STATN_CONTROL               0x40018</div><div class='add'>+#define RPMX_MTI_RSFEC_STAT_FAST_DATA_HI_CDC            0x40000</div><div class='ctx'> #define RPMX_MTI_RSFEC_STAT_COUNTER_CAPTURE_2		0x40050</div><div class='ctx'> #define RPMX_MTI_RSFEC_STAT_COUNTER_CAPTURE_3		0x40058</div><div class='del'>-#define RPMX_MTI_FCFECX_VL0_CCW_LO			0x38618</div><div class='del'>-#define RPMX_MTI_FCFECX_VL0_NCCW_LO			0x38620</div><div class='del'>-#define RPMX_MTI_FCFECX_VL1_CCW_LO			0x38628</div><div class='del'>-#define RPMX_MTI_FCFECX_VL1_NCCW_LO			0x38630</div><div class='del'>-#define RPMX_MTI_FCFECX_CW_HI				0x38638</div><div class='add'>+#define RPMX_MTI_FCFECX_VL0_CCW_LO(a)			(0x38618 + ((a) * 0x40))</div><div class='add'>+#define RPMX_MTI_FCFECX_VL0_NCCW_LO(a)			(0x38620 + ((a) * 0x40))</div><div class='add'>+#define RPMX_MTI_FCFECX_VL1_CCW_LO(a)			(0x38628 + ((a) * 0x40))</div><div class='add'>+#define RPMX_MTI_FCFECX_VL1_NCCW_LO(a)			(0x38630 + ((a) * 0x40))</div><div class='add'>+#define RPMX_MTI_FCFECX_CW_HI(a)			(0x38638 + ((a) * 0x40))</div><div class='ctx'> </div><div class='ctx'> /* CN10KB CSR Declaration */</div><div class='ctx'> #define  RPM2_CMRX_SW_INT				0x1b0</div><div class='hunk'>@@ -137,4 +141,6 @@ bool is_dev_rpm2(void *rpmd);</div><div class='ctx'> int rpm_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);</div><div class='ctx'> int rpm_lmac_reset(void *rpmd, int lmac_id, u8 pf_req_flr);</div><div class='ctx'> int rpm_stats_reset(void *rpmd, int lmac_id);</div><div class='add'>+void rpm_x2p_reset(void *rpmd, bool enable);</div><div class='add'>+int rpm_enadis_rx(void *rpmd, int lmac_id, bool enable);</div><div class='ctx'> #endif /* RPM_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu.c<br/>index 1a97fb9032fa..2d78e08f985f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu.c</a></div><div class='hunk'>@@ -20,6 +20,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "rvu_trace.h"</div><div class='ctx'> #include "rvu_npc_hash.h"</div><div class='add'>+#include "cn20k/reg.h"</div><div class='add'>+#include "cn20k/api.h"</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"rvu_af"</div><div class='ctx'> #define DRV_STRING      "Marvell OcteonTX2 RVU Admin Function Driver"</div><div class='hunk'>@@ -34,10 +36,8 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,</div><div class='ctx'> 			 int type, int num,</div><div class='ctx'> 			 void (mbox_handler)(struct work_struct *),</div><div class='ctx'> 			 void (mbox_up_handler)(struct work_struct *));</div><div class='del'>-enum {</div><div class='del'>-	TYPE_AFVF,</div><div class='del'>-	TYPE_AFPF,</div><div class='del'>-};</div><div class='add'>+static irqreturn_t rvu_mbox_pf_intr_handler(int irq, void *rvu_irq);</div><div class='add'>+static irqreturn_t rvu_mbox_intr_handler(int irq, void *rvu_irq);</div><div class='ctx'> </div><div class='ctx'> /* Supported devices */</div><div class='ctx'> static const struct pci_device_id rvu_id_table[] = {</div><div class='hunk'>@@ -294,7 +294,7 @@ int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc)</div><div class='ctx'> 		devnum = rvu_get_hwvf(rvu, pcifunc);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		is_pf = true;</div><div class='del'>-		devnum = rvu_get_pf(pcifunc);</div><div class='add'>+		devnum = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check if the 'pcifunc' has a NIX LF from 'BLKADDR_NIX0' or</div><div class='hunk'>@@ -359,7 +359,7 @@ static void rvu_update_rsrc_map(struct rvu *rvu, struct rvu_pfvf *pfvf,</div><div class='ctx'> 		devnum = rvu_get_hwvf(rvu, pcifunc);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		is_pf = true;</div><div class='del'>-		devnum = rvu_get_pf(pcifunc);</div><div class='add'>+		devnum = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	block-&gt;fn_map[lf] = attach ? pcifunc : 0;</div><div class='hunk'>@@ -400,11 +400,6 @@ static void rvu_update_rsrc_map(struct rvu *rvu, struct rvu_pfvf *pfvf,</div><div class='ctx'> 	rvu_write64(rvu, BLKADDR_RVUM, reg | (devnum &lt;&lt; 16), num_lfs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-inline int rvu_get_pf(u16 pcifunc)</div><div class='del'>-{</div><div class='del'>-	return (pcifunc &gt;&gt; RVU_PFVF_PF_SHIFT) &amp; RVU_PFVF_PF_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void rvu_get_pf_numvfs(struct rvu *rvu, int pf, int *numvfs, int *hwvf)</div><div class='ctx'> {</div><div class='ctx'> 	u64 cfg;</div><div class='hunk'>@@ -422,7 +417,7 @@ int rvu_get_hwvf(struct rvu *rvu, int pcifunc)</div><div class='ctx'> 	int pf, func;</div><div class='ctx'> 	u64 cfg;</div><div class='ctx'> </div><div class='del'>-	pf = rvu_get_pf(pcifunc);</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	func = pcifunc &amp; RVU_PFVF_FUNC_MASK;</div><div class='ctx'> </div><div class='ctx'> 	/* Get first HWVF attached to this PF */</div><div class='hunk'>@@ -437,7 +432,7 @@ struct rvu_pfvf *rvu_get_pfvf(struct rvu *rvu, int pcifunc)</div><div class='ctx'> 	if (pcifunc &amp; RVU_PFVF_FUNC_MASK)</div><div class='ctx'> 		return &amp;rvu-&gt;hwvf[rvu_get_hwvf(rvu, pcifunc)];</div><div class='ctx'> 	else</div><div class='del'>-		return &amp;rvu-&gt;pf[rvu_get_pf(pcifunc)];</div><div class='add'>+		return &amp;rvu-&gt;pf[rvu_get_pf(rvu-&gt;pdev, pcifunc)];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool is_pf_func_valid(struct rvu *rvu, u16 pcifunc)</div><div class='hunk'>@@ -445,7 +440,7 @@ static bool is_pf_func_valid(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> 	int pf, vf, nvfs;</div><div class='ctx'> 	u64 cfg;</div><div class='ctx'> </div><div class='del'>-	pf = rvu_get_pf(pcifunc);</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	if (pf &gt;= rvu-&gt;hw-&gt;total_pfs)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -760,6 +755,11 @@ static void rvu_free_hw_resources(struct rvu *rvu)</div><div class='ctx'> </div><div class='ctx'> 	rvu_reset_msix(rvu);</div><div class='ctx'> 	mutex_destroy(&amp;rvu-&gt;rsrc_lock);</div><div class='add'>+</div><div class='add'>+	/* Free the QINT/CINT memory */</div><div class='add'>+	pfvf = &amp;rvu-&gt;pf[RVU_AFPF];</div><div class='add'>+	qmem_free(rvu-&gt;dev, pfvf-&gt;nix_qints_ctx);</div><div class='add'>+	qmem_free(rvu-&gt;dev, pfvf-&gt;cq_ints_ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rvu_setup_pfvf_macaddress(struct rvu *rvu)</div><div class='hunk'>@@ -1162,6 +1162,10 @@ cpt:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rvu_program_channels(rvu);</div><div class='add'>+	cgx_start_linkup(rvu);</div><div class='add'>+</div><div class='add'>+	rvu_block_bcast_xon(rvu, BLKADDR_NIX0);</div><div class='add'>+	rvu_block_bcast_xon(rvu, BLKADDR_NIX1);</div><div class='ctx'> </div><div class='ctx'> 	err = rvu_mcs_init(rvu);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -1392,8 +1396,6 @@ static void rvu_detach_block(struct rvu *rvu, int pcifunc, int blktype)</div><div class='ctx'> 	if (blkaddr &lt; 0)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (blktype == BLKTYPE_NIX)</div><div class='del'>-		rvu_nix_reset_mac(pfvf, pcifunc);</div><div class='ctx'> </div><div class='ctx'> 	block = &amp;hw-&gt;block[blkaddr];</div><div class='ctx'> </div><div class='hunk'>@@ -1406,6 +1408,10 @@ static void rvu_detach_block(struct rvu *rvu, int pcifunc, int blktype)</div><div class='ctx'> 		if (lf &lt; 0) /* This should never happen */</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		if (blktype == BLKTYPE_NIX) {</div><div class='add'>+			rvu_nix_reset_mac(pfvf, pcifunc);</div><div class='add'>+			rvu_npc_clear_ucast_entry(rvu, pcifunc, lf);</div><div class='add'>+		}</div><div class='ctx'> 		/* Disable the LF */</div><div class='ctx'> 		rvu_write64(rvu, blkaddr, block-&gt;lfcfg_reg |</div><div class='ctx'> 			    (lf &lt;&lt; block-&gt;lfshift), 0x00ULL);</div><div class='hunk'>@@ -1484,7 +1490,7 @@ int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> 	pf = rvu_get_pfvf(rvu, pcifunc &amp; ~RVU_PFVF_FUNC_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* All CGX mapped PFs are set with assigned NIX block during init */</div><div class='del'>-	if (is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc))) {</div><div class='add'>+	if (is_pf_cgxmapped(rvu, rvu_get_pf(rvu-&gt;pdev, pcifunc))) {</div><div class='ctx'> 		blkaddr = pf-&gt;nix_blkaddr;</div><div class='ctx'> 	} else if (is_lbk_vf(rvu, pcifunc)) {</div><div class='ctx'> 		vf = pcifunc - 1;</div><div class='hunk'>@@ -1498,7 +1504,7 @@ int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* if SDP1 then the blkaddr is NIX1 */</div><div class='del'>-	if (is_sdp_pfvf(pcifunc) &amp;&amp; pf-&gt;sdp_info-&gt;node_id == 1)</div><div class='add'>+	if (is_sdp_pfvf(rvu, pcifunc) &amp;&amp; pf-&gt;sdp_info-&gt;node_id == 1)</div><div class='ctx'> 		blkaddr = BLKADDR_NIX1;</div><div class='ctx'> </div><div class='ctx'> 	switch (blkaddr) {</div><div class='hunk'>@@ -2003,7 +2009,7 @@ int rvu_mbox_handler_vf_flr(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> </div><div class='ctx'> 	vf = pcifunc &amp; RVU_PFVF_FUNC_MASK;</div><div class='ctx'> 	cfg = rvu_read64(rvu, BLKADDR_RVUM,</div><div class='del'>-			 RVU_PRIV_PFX_CFG(rvu_get_pf(pcifunc)));</div><div class='add'>+			 RVU_PRIV_PFX_CFG(rvu_get_pf(rvu-&gt;pdev, pcifunc)));</div><div class='ctx'> 	numvfs = (cfg &gt;&gt; 12) &amp; 0xFF;</div><div class='ctx'> </div><div class='ctx'> 	if (vf &amp;&amp; vf &lt;= numvfs)</div><div class='hunk'>@@ -2030,6 +2036,9 @@ int rvu_mbox_handler_get_hw_cap(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 	rsp-&gt;nix_shaping = hw-&gt;cap.nix_shaping;</div><div class='ctx'> 	rsp-&gt;npc_hash_extract = hw-&gt;cap.npc_hash_extract;</div><div class='ctx'> </div><div class='add'>+	if (rvu-&gt;mcs_blk_cnt)</div><div class='add'>+		rsp-&gt;hw_caps = HW_CAP_MACSEC;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2172,7 +2181,7 @@ static int rvu_process_mbox_msg(struct otx2_mbox *mbox, int devid,</div><div class='ctx'> 		if (rsp &amp;&amp; err)						\</div><div class='ctx'> 			rsp-&gt;hdr.rc = err;				\</div><div class='ctx'> 									\</div><div class='del'>-		trace_otx2_msg_process(mbox-&gt;pdev, _id, err);		\</div><div class='add'>+		trace_otx2_msg_process(mbox-&gt;pdev, _id, err, req-&gt;pcifunc); \</div><div class='ctx'> 		return rsp ? err : -ENOMEM;				\</div><div class='ctx'> 	}</div><div class='ctx'> MBOX_MESSAGES</div><div class='hunk'>@@ -2217,15 +2226,30 @@ static void __rvu_mbox_handler(struct rvu_work *mwork, int type, bool poll)</div><div class='ctx'> </div><div class='ctx'> 	offset = mbox-&gt;rx_start + ALIGN(sizeof(*req_hdr), MBOX_MSG_ALIGN);</div><div class='ctx'> </div><div class='add'>+	if (req_hdr-&gt;sig &amp;&amp; !(is_rvu_otx2(rvu) || is_cn20k(rvu-&gt;pdev))) {</div><div class='add'>+		req_hdr-&gt;opt_msg = mw-&gt;mbox_wrk[devid].num_msgs;</div><div class='add'>+		rvu_write64(rvu, BLKADDR_NIX0, RVU_AF_BAR2_SEL,</div><div class='add'>+			    RVU_AF_BAR2_PFID);</div><div class='add'>+		if (type == TYPE_AFPF)</div><div class='add'>+			rvu_write64(rvu, BLKADDR_NIX0,</div><div class='add'>+				    AF_BAR2_ALIASX(0, NIX_CINTX_INT_W1S(devid)),</div><div class='add'>+				    0x1);</div><div class='add'>+		else</div><div class='add'>+			rvu_write64(rvu, BLKADDR_NIX0,</div><div class='add'>+				    AF_BAR2_ALIASX(0, NIX_QINTX_CNT(devid)),</div><div class='add'>+				    0x1);</div><div class='add'>+		usleep_range(5000, 6000);</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (id = 0; id &lt; mw-&gt;mbox_wrk[devid].num_msgs; id++) {</div><div class='ctx'> 		msg = mdev-&gt;mbase + offset;</div><div class='ctx'> </div><div class='ctx'> 		/* Set which PF/VF sent this message based on mbox IRQ */</div><div class='ctx'> 		switch (type) {</div><div class='ctx'> 		case TYPE_AFPF:</div><div class='del'>-			msg-&gt;pcifunc &amp;=</div><div class='del'>-				~(RVU_PFVF_PF_MASK &lt;&lt; RVU_PFVF_PF_SHIFT);</div><div class='del'>-			msg-&gt;pcifunc |= (devid &lt;&lt; RVU_PFVF_PF_SHIFT);</div><div class='add'>+			msg-&gt;pcifunc &amp;= rvu_pcifunc_pf_mask(rvu-&gt;pdev);</div><div class='add'>+			msg-&gt;pcifunc |= rvu_make_pcifunc(rvu-&gt;pdev, devid, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case TYPE_AFVF:</div><div class='ctx'> 			msg-&gt;pcifunc &amp;=</div><div class='hunk'>@@ -2243,16 +2267,17 @@ static void __rvu_mbox_handler(struct rvu_work *mwork, int type, bool poll)</div><div class='ctx'> 		if (msg-&gt;pcifunc &amp; RVU_PFVF_FUNC_MASK)</div><div class='ctx'> 			dev_warn(rvu-&gt;dev, "Error %d when processing message %s (0x%x) from PF%d:VF%d\n",</div><div class='ctx'> 				 err, otx2_mbox_id2name(msg-&gt;id),</div><div class='del'>-				 msg-&gt;id, rvu_get_pf(msg-&gt;pcifunc),</div><div class='add'>+				 msg-&gt;id, rvu_get_pf(rvu-&gt;pdev, msg-&gt;pcifunc),</div><div class='ctx'> 				 (msg-&gt;pcifunc &amp; RVU_PFVF_FUNC_MASK) - 1);</div><div class='ctx'> 		else</div><div class='ctx'> 			dev_warn(rvu-&gt;dev, "Error %d when processing message %s (0x%x) from PF%d\n",</div><div class='ctx'> 				 err, otx2_mbox_id2name(msg-&gt;id),</div><div class='ctx'> 				 msg-&gt;id, devid);</div><div class='ctx'> 	}</div><div class='add'>+done:</div><div class='ctx'> 	mw-&gt;mbox_wrk[devid].num_msgs = 0;</div><div class='ctx'> </div><div class='del'>-	if (poll)</div><div class='add'>+	if (!is_cn20k(mbox-&gt;pdev) &amp;&amp; poll)</div><div class='ctx'> 		otx2_mbox_wait_for_zero(mbox, devid);</div><div class='ctx'> </div><div class='ctx'> 	/* Send mbox responses to VF/PF */</div><div class='hunk'>@@ -2358,13 +2383,21 @@ static inline void rvu_afvf_mbox_up_handler(struct work_struct *work)</div><div class='ctx'> 	__rvu_mbox_up_handler(mwork, TYPE_AFVF);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,</div><div class='add'>+static int rvu_get_mbox_regions(struct rvu *rvu, void __iomem **mbox_addr,</div><div class='ctx'> 				int num, int type, unsigned long *pf_bmap)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_hwinfo *hw = rvu-&gt;hw;</div><div class='ctx'> 	int region;</div><div class='ctx'> 	u64 bar4;</div><div class='ctx'> </div><div class='add'>+	/* For cn20k platform AF mailbox region is allocated by software</div><div class='add'>+	 * and the corresponding IOVA is programmed in hardware unlike earlier</div><div class='add'>+	 * silicons where software uses the hardware region after ioremap.</div><div class='add'>+	 */</div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		return cn20k_rvu_get_mbox_regions(rvu, (void *)mbox_addr,</div><div class='add'>+						  num, type, pf_bmap);</div><div class='add'>+</div><div class='ctx'> 	/* For cn10k platform VF mailbox regions of a PF follows after the</div><div class='ctx'> 	 * PF &lt;-&gt; AF mailbox region. Whereas for Octeontx2 it is read from</div><div class='ctx'> 	 * RVU_PF_VF_BAR4_ADDR register.</div><div class='hunk'>@@ -2383,7 +2416,7 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,</div><div class='ctx'> 				bar4 = rvupf_read64(rvu, RVU_PF_VF_BAR4_ADDR);</div><div class='ctx'> 				bar4 += region * MBOX_SIZE;</div><div class='ctx'> 			}</div><div class='del'>-			mbox_addr[region] = (void *)ioremap_wc(bar4, MBOX_SIZE);</div><div class='add'>+			mbox_addr[region] = ioremap_wc(bar4, MBOX_SIZE);</div><div class='ctx'> 			if (!mbox_addr[region])</div><div class='ctx'> 				goto error;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2406,7 +2439,7 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,</div><div class='ctx'> 					  RVU_AF_PF_BAR4_ADDR);</div><div class='ctx'> 			bar4 += region * MBOX_SIZE;</div><div class='ctx'> 		}</div><div class='del'>-		mbox_addr[region] = (void *)ioremap_wc(bar4, MBOX_SIZE);</div><div class='add'>+		mbox_addr[region] = ioremap_wc(bar4, MBOX_SIZE);</div><div class='ctx'> 		if (!mbox_addr[region])</div><div class='ctx'> 			goto error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2414,20 +2447,26 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='ctx'> 	while (region--)</div><div class='del'>-		iounmap((void __iomem *)mbox_addr[region]);</div><div class='add'>+		iounmap(mbox_addr[region]);</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct mbox_ops rvu_mbox_ops = {</div><div class='add'>+	.pf_intr_handler = rvu_mbox_pf_intr_handler,</div><div class='add'>+	.afvf_intr_handler = rvu_mbox_intr_handler,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,</div><div class='ctx'> 			 int type, int num,</div><div class='ctx'> 			 void (mbox_handler)(struct work_struct *),</div><div class='ctx'> 			 void (mbox_up_handler)(struct work_struct *))</div><div class='ctx'> {</div><div class='del'>-	int err = -EINVAL, i, dir, dir_up;</div><div class='add'>+	void __iomem **mbox_regions;</div><div class='add'>+	struct ng_rvu *ng_rvu_mbox;</div><div class='add'>+	int err, i, dir, dir_up;</div><div class='ctx'> 	void __iomem *reg_base;</div><div class='ctx'> 	struct rvu_work *mwork;</div><div class='ctx'> 	unsigned long *pf_bmap;</div><div class='del'>-	void **mbox_regions;</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	u64 cfg;</div><div class='ctx'> </div><div class='hunk'>@@ -2435,6 +2474,12 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,</div><div class='ctx'> 	if (!pf_bmap)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	ng_rvu_mbox = kzalloc(sizeof(*ng_rvu_mbox), GFP_KERNEL);</div><div class='add'>+	if (!ng_rvu_mbox) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto free_bitmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* RVU VFs */</div><div class='ctx'> 	if (type == TYPE_AFVF)</div><div class='ctx'> 		bitmap_set(pf_bmap, 0, num);</div><div class='hunk'>@@ -2448,12 +2493,20 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	rvu-&gt;ng_rvu = ng_rvu_mbox;</div><div class='add'>+</div><div class='add'>+	rvu-&gt;ng_rvu-&gt;rvu_mbox_ops = &amp;rvu_mbox_ops;</div><div class='add'>+</div><div class='add'>+	err = cn20k_rvu_mbox_init(rvu, type, num);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_mem;</div><div class='add'>+</div><div class='ctx'> 	mutex_init(&amp;rvu-&gt;mbox_lock);</div><div class='ctx'> </div><div class='del'>-	mbox_regions = kcalloc(num, sizeof(void *), GFP_KERNEL);</div><div class='add'>+	mbox_regions = kcalloc(num, sizeof(void __iomem *), GFP_KERNEL);</div><div class='ctx'> 	if (!mbox_regions) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		goto free_bitmap;</div><div class='add'>+		goto free_qmem;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='hunk'>@@ -2476,11 +2529,12 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,</div><div class='ctx'> 			goto free_regions;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='add'>+		err = -EINVAL;</div><div class='ctx'> 		goto free_regions;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mw-&gt;mbox_wq = alloc_workqueue("%s",</div><div class='del'>-				      WQ_UNBOUND | WQ_HIGHPRI | WQ_MEM_RECLAIM,</div><div class='add'>+				      WQ_HIGHPRI | WQ_MEM_RECLAIM,</div><div class='ctx'> 				      num, name);</div><div class='ctx'> 	if (!mw-&gt;mbox_wq) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -2523,7 +2577,11 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw,</div><div class='ctx'> 		mwork-&gt;rvu = rvu;</div><div class='ctx'> 		INIT_WORK(&amp;mwork-&gt;work, mbox_up_handler);</div><div class='ctx'> 	}</div><div class='del'>-	goto free_regions;</div><div class='add'>+</div><div class='add'>+	kfree(mbox_regions);</div><div class='add'>+	bitmap_free(pf_bmap);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='ctx'> 	destroy_workqueue(mw-&gt;mbox_wq);</div><div class='hunk'>@@ -2532,6 +2590,10 @@ unmap_regions:</div><div class='ctx'> 		iounmap((void __iomem *)mbox_regions[num]);</div><div class='ctx'> free_regions:</div><div class='ctx'> 	kfree(mbox_regions);</div><div class='add'>+free_qmem:</div><div class='add'>+	cn20k_free_mbox_memory(rvu);</div><div class='add'>+free_mem:</div><div class='add'>+	kfree(rvu-&gt;ng_rvu);</div><div class='ctx'> free_bitmap:</div><div class='ctx'> 	bitmap_free(pf_bmap);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -2558,8 +2620,8 @@ static void rvu_mbox_destroy(struct mbox_wq_info *mw)</div><div class='ctx'> 	otx2_mbox_destroy(&amp;mw-&gt;mbox_up);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rvu_queue_work(struct mbox_wq_info *mw, int first,</div><div class='del'>-			   int mdevs, u64 intr)</div><div class='add'>+void rvu_queue_work(struct mbox_wq_info *mw, int first,</div><div class='add'>+		    int mdevs, u64 intr)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_mbox_dev *mdev;</div><div class='ctx'> 	struct otx2_mbox *mbox;</div><div class='hunk'>@@ -2633,7 +2695,7 @@ static irqreturn_t rvu_mbox_intr_handler(int irq, void *rvu_irq)</div><div class='ctx'> 		rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), intr);</div><div class='ctx'> </div><div class='ctx'> 		rvu_queue_work(&amp;rvu-&gt;afvf_wq_info, 64, vfs, intr);</div><div class='del'>-		vfs -= 64;</div><div class='add'>+		vfs = 64;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	intr = rvupf_read64(rvu, RVU_PF_VFPF_MBOX_INTX(0));</div><div class='hunk'>@@ -2650,6 +2712,11 @@ static void rvu_enable_mbox_intr(struct rvu *rvu)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_hwinfo *hw = rvu-&gt;hw;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev)) {</div><div class='add'>+		cn20k_rvu_enable_mbox_intr(rvu);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Clear spurious irqs, if any */</div><div class='ctx'> 	rvu_write64(rvu, BLKADDR_RVUM,</div><div class='ctx'> 		    RVU_AF_PFAF_MBOX_INT, INTR_MASK(hw-&gt;total_pfs));</div><div class='hunk'>@@ -2767,7 +2834,7 @@ static void rvu_flr_handler(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));</div><div class='ctx'> 	numvfs = (cfg &gt;&gt; 12) &amp; 0xFF;</div><div class='del'>-	pcifunc  = pf &lt;&lt; RVU_PFVF_PF_SHIFT;</div><div class='add'>+	pcifunc  = rvu_make_pcifunc(rvu-&gt;pdev, pf, 0);</div><div class='ctx'> </div><div class='ctx'> 	for (vf = 0; vf &lt; numvfs; vf++)</div><div class='ctx'> 		__rvu_flr_handler(rvu, (pcifunc | (vf + 1)));</div><div class='hunk'>@@ -2903,9 +2970,12 @@ static void rvu_unregister_interrupts(struct rvu *rvu)</div><div class='ctx'> </div><div class='ctx'> 	rvu_cpt_unregister_interrupts(rvu);</div><div class='ctx'> </div><div class='del'>-	/* Disable the Mbox interrupt */</div><div class='del'>-	rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT_ENA_W1C,</div><div class='del'>-		    INTR_MASK(rvu-&gt;hw-&gt;total_pfs) &amp; ~1ULL);</div><div class='add'>+	if (!is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		/* Disable the Mbox interrupt */</div><div class='add'>+		rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT_ENA_W1C,</div><div class='add'>+			    INTR_MASK(rvu-&gt;hw-&gt;total_pfs) &amp; ~1ULL);</div><div class='add'>+	else</div><div class='add'>+		cn20k_rvu_unregister_interrupts(rvu);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable the PF FLR interrupt */</div><div class='ctx'> 	rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1C,</div><div class='hunk'>@@ -2938,6 +3008,10 @@ static int rvu_afvf_msix_vectors_num_ok(struct rvu *rvu)</div><div class='ctx'> 	 * VF interrupts can be handled. Offset equal to zero means</div><div class='ctx'> 	 * that PF vectors are not configured and overlapping AF vectors.</div><div class='ctx'> 	 */</div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		return (pfvf-&gt;msix.max &gt;= RVU_AF_CN20K_INT_VEC_CNT +</div><div class='add'>+			RVU_MBOX_PF_INT_VEC_CNT) &amp;&amp; offset;</div><div class='add'>+</div><div class='ctx'> 	return (pfvf-&gt;msix.max &gt;= RVU_AF_INT_VEC_CNT + RVU_PF_INT_VEC_CNT) &amp;&amp;</div><div class='ctx'> 	       offset;</div><div class='ctx'> }</div><div class='hunk'>@@ -2968,18 +3042,30 @@ static int rvu_register_interrupts(struct rvu *rvu)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Register mailbox interrupt handler */</div><div class='del'>-	sprintf(&amp;rvu-&gt;irq_name[RVU_AF_INT_VEC_MBOX * NAME_SIZE], "RVUAF Mbox");</div><div class='del'>-	ret = request_irq(pci_irq_vector(rvu-&gt;pdev, RVU_AF_INT_VEC_MBOX),</div><div class='del'>-			  rvu_mbox_pf_intr_handler, 0,</div><div class='del'>-			  &amp;rvu-&gt;irq_name[RVU_AF_INT_VEC_MBOX * NAME_SIZE], rvu);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(rvu-&gt;dev,</div><div class='del'>-			"RVUAF: IRQ registration failed for mbox irq\n");</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='add'>+	if (!is_cn20k(rvu-&gt;pdev)) {</div><div class='add'>+		/* Register mailbox interrupt handler */</div><div class='add'>+		sprintf(&amp;rvu-&gt;irq_name[RVU_AF_INT_VEC_MBOX * NAME_SIZE],</div><div class='add'>+			"RVUAF Mbox");</div><div class='add'>+		ret = request_irq(pci_irq_vector</div><div class='add'>+				  (rvu-&gt;pdev, RVU_AF_INT_VEC_MBOX),</div><div class='add'>+				  rvu-&gt;ng_rvu-&gt;rvu_mbox_ops-&gt;pf_intr_handler, 0,</div><div class='add'>+				  &amp;rvu-&gt;irq_name[RVU_AF_INT_VEC_MBOX *</div><div class='add'>+				  NAME_SIZE], rvu);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(rvu-&gt;dev,</div><div class='add'>+				"RVUAF: IRQ registration failed for mbox\n");</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	rvu-&gt;irq_allocated[RVU_AF_INT_VEC_MBOX] = true;</div><div class='add'>+		rvu-&gt;irq_allocated[RVU_AF_INT_VEC_MBOX] = true;</div><div class='add'>+	} else {</div><div class='add'>+		ret = cn20k_register_afpf_mbox_intr(rvu);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(rvu-&gt;dev,</div><div class='add'>+				"RVUAF: IRQ registration failed for mbox\n");</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable mailbox interrupts from all PFs */</div><div class='ctx'> 	rvu_enable_mbox_intr(rvu);</div><div class='hunk'>@@ -3034,34 +3120,40 @@ static int rvu_register_interrupts(struct rvu *rvu)</div><div class='ctx'> 	/* Get PF MSIX vectors offset. */</div><div class='ctx'> 	pf_vec_start = rvu_read64(rvu, BLKADDR_RVUM,</div><div class='ctx'> 				  RVU_PRIV_PFX_INT_CFG(0)) &amp; 0x3ff;</div><div class='add'>+	if (!is_cn20k(rvu-&gt;pdev)) {</div><div class='add'>+		/* Register MBOX0 interrupt. */</div><div class='add'>+		offset = pf_vec_start + RVU_PF_INT_VEC_VFPF_MBOX0;</div><div class='add'>+		sprintf(&amp;rvu-&gt;irq_name[offset * NAME_SIZE], "RVUAFVF Mbox0");</div><div class='add'>+		ret = request_irq(pci_irq_vector(rvu-&gt;pdev, offset),</div><div class='add'>+				  rvu-&gt;ng_rvu-&gt;rvu_mbox_ops-&gt;afvf_intr_handler, 0,</div><div class='add'>+				  &amp;rvu-&gt;irq_name[offset * NAME_SIZE],</div><div class='add'>+				  rvu);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(rvu-&gt;dev,</div><div class='add'>+				"RVUAF: IRQ registration failed for Mbox0\n");</div><div class='ctx'> </div><div class='del'>-	/* Register MBOX0 interrupt. */</div><div class='del'>-	offset = pf_vec_start + RVU_PF_INT_VEC_VFPF_MBOX0;</div><div class='del'>-	sprintf(&amp;rvu-&gt;irq_name[offset * NAME_SIZE], "RVUAFVF Mbox0");</div><div class='del'>-	ret = request_irq(pci_irq_vector(rvu-&gt;pdev, offset),</div><div class='del'>-			  rvu_mbox_intr_handler, 0,</div><div class='del'>-			  &amp;rvu-&gt;irq_name[offset * NAME_SIZE],</div><div class='del'>-			  rvu);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_err(rvu-&gt;dev,</div><div class='del'>-			"RVUAF: IRQ registration failed for Mbox0\n");</div><div class='del'>-</div><div class='del'>-	rvu-&gt;irq_allocated[offset] = true;</div><div class='add'>+		rvu-&gt;irq_allocated[offset] = true;</div><div class='ctx'> </div><div class='del'>-	/* Register MBOX1 interrupt. MBOX1 IRQ number follows MBOX0 so</div><div class='del'>-	 * simply increment current offset by 1.</div><div class='del'>-	 */</div><div class='del'>-	offset = pf_vec_start + RVU_PF_INT_VEC_VFPF_MBOX1;</div><div class='del'>-	sprintf(&amp;rvu-&gt;irq_name[offset * NAME_SIZE], "RVUAFVF Mbox1");</div><div class='del'>-	ret = request_irq(pci_irq_vector(rvu-&gt;pdev, offset),</div><div class='del'>-			  rvu_mbox_intr_handler, 0,</div><div class='del'>-			  &amp;rvu-&gt;irq_name[offset * NAME_SIZE],</div><div class='del'>-			  rvu);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_err(rvu-&gt;dev,</div><div class='del'>-			"RVUAF: IRQ registration failed for Mbox1\n");</div><div class='add'>+		/* Register MBOX1 interrupt. MBOX1 IRQ number follows MBOX0 so</div><div class='add'>+		 * simply increment current offset by 1.</div><div class='add'>+		 */</div><div class='add'>+		offset = pf_vec_start + RVU_PF_INT_VEC_VFPF_MBOX1;</div><div class='add'>+		sprintf(&amp;rvu-&gt;irq_name[offset * NAME_SIZE], "RVUAFVF Mbox1");</div><div class='add'>+		ret = request_irq(pci_irq_vector(rvu-&gt;pdev, offset),</div><div class='add'>+				  rvu-&gt;ng_rvu-&gt;rvu_mbox_ops-&gt;afvf_intr_handler, 0,</div><div class='add'>+				  &amp;rvu-&gt;irq_name[offset * NAME_SIZE],</div><div class='add'>+				  rvu);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(rvu-&gt;dev,</div><div class='add'>+				"RVUAF: IRQ registration failed for Mbox1\n");</div><div class='ctx'> </div><div class='del'>-	rvu-&gt;irq_allocated[offset] = true;</div><div class='add'>+		rvu-&gt;irq_allocated[offset] = true;</div><div class='add'>+	} else {</div><div class='add'>+		ret = cn20k_register_afvf_mbox_intr(rvu, pf_vec_start);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(rvu-&gt;dev,</div><div class='add'>+				"RVUAF: IRQ registration failed for Mbox\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Register FLR interrupt handler for AF's VFs */</div><div class='ctx'> 	offset = pf_vec_start + RVU_PF_INT_VEC_VFFLR0;</div><div class='hunk'>@@ -3172,6 +3264,9 @@ static void rvu_disable_afvf_intr(struct rvu *rvu)</div><div class='ctx'> {</div><div class='ctx'> 	int vfs = rvu-&gt;vfs;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		return cn20k_rvu_disable_afvf_intr(rvu, vfs);</div><div class='add'>+</div><div class='ctx'> 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), INTR_MASK(vfs));</div><div class='ctx'> 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));</div><div class='ctx'> 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));</div><div class='hunk'>@@ -3188,6 +3283,9 @@ static void rvu_enable_afvf_intr(struct rvu *rvu)</div><div class='ctx'> {</div><div class='ctx'> 	int vfs = rvu-&gt;vfs;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		return cn20k_rvu_enable_afvf_intr(rvu, vfs);</div><div class='add'>+</div><div class='ctx'> 	/* Clear any pending interrupts and enable AF VF interrupts for</div><div class='ctx'> 	 * the first 64 VFs.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -3432,6 +3530,9 @@ static int rvu_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		ptp_start(rvu, rvu-&gt;fwdata-&gt;sclk, rvu-&gt;fwdata-&gt;ptp_ext_clk_rate,</div><div class='ctx'> 			  rvu-&gt;fwdata-&gt;ptp_ext_tstamp);</div><div class='ctx'> </div><div class='add'>+	/* Alloc CINT and QINT memory */</div><div class='add'>+	rvu_alloc_cint_qint_mem(rvu, &amp;rvu-&gt;pf[RVU_AFPF], BLKADDR_NIX0,</div><div class='add'>+				(rvu-&gt;hw-&gt;block[BLKADDR_NIX0].lf.max));</div><div class='ctx'> 	return 0;</div><div class='ctx'> err_dl:</div><div class='ctx'> 	rvu_unregister_dl(rvu);</div><div class='hunk'>@@ -3483,6 +3584,9 @@ static void rvu_remove(struct pci_dev *pdev)</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	devm_kfree(&amp;pdev-&gt;dev, rvu-&gt;hw);</div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		cn20k_free_mbox_memory(rvu);</div><div class='add'>+	kfree(rvu-&gt;ng_rvu);</div><div class='ctx'> 	devm_kfree(&amp;pdev-&gt;dev, rvu);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h<br/>index 5016ba82e142..e85dac2c806d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu.h</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;net/devlink.h&gt;</div><div class='add'>+#include &lt;linux/soc/marvell/silicons.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "rvu_struct.h"</div><div class='ctx'> #include "rvu_devlink.h"</div><div class='hunk'>@@ -30,6 +31,8 @@</div><div class='ctx'> #define PCI_SUBSYS_DEVID_CNF10K_A	       0xBA00</div><div class='ctx'> #define PCI_SUBSYS_DEVID_CNF10K_B              0xBC00</div><div class='ctx'> #define PCI_SUBSYS_DEVID_CN10K_B               0xBD00</div><div class='add'>+#define PCI_SUBSYS_DEVID_CN20KA                0xC220</div><div class='add'>+#define PCI_SUBSYS_DEVID_CNF20KA               0xC320</div><div class='ctx'> </div><div class='ctx'> /* PCI BAR nos */</div><div class='ctx'> #define	PCI_AF_REG_BAR_NUM			0</div><div class='hunk'>@@ -41,12 +44,39 @@</div><div class='ctx'> #define MAX_CPT_BLKS				2</div><div class='ctx'> </div><div class='ctx'> /* PF_FUNC */</div><div class='del'>-#define RVU_PFVF_PF_SHIFT	10</div><div class='del'>-#define RVU_PFVF_PF_MASK	0x3F</div><div class='del'>-#define RVU_PFVF_FUNC_SHIFT	0</div><div class='del'>-#define RVU_PFVF_FUNC_MASK	0x3FF</div><div class='add'>+#define RVU_OTX2_PFVF_PF_SHIFT			10</div><div class='add'>+#define RVU_OTX2_PFVF_PF_MASK			0x3F</div><div class='add'>+#define RVU_PFVF_FUNC_SHIFT			0</div><div class='add'>+#define RVU_PFVF_FUNC_MASK			0x3FF</div><div class='add'>+#define RVU_CN20K_PFVF_PF_SHIFT			9</div><div class='add'>+#define RVU_CN20K_PFVF_PF_MASK			0x7F</div><div class='add'>+</div><div class='add'>+static inline u16 rvu_make_pcifunc(struct pci_dev *pdev, int pf, int func)</div><div class='add'>+{</div><div class='add'>+	if (is_cn20k(pdev))</div><div class='add'>+		return ((pf &amp; RVU_CN20K_PFVF_PF_MASK) &lt;&lt;</div><div class='add'>+			RVU_CN20K_PFVF_PF_SHIFT) |</div><div class='add'>+			((func &amp; RVU_PFVF_FUNC_MASK) &lt;&lt;</div><div class='add'>+			RVU_PFVF_FUNC_SHIFT);</div><div class='add'>+	else</div><div class='add'>+		return ((pf &amp; RVU_OTX2_PFVF_PF_MASK) &lt;&lt;</div><div class='add'>+			RVU_OTX2_PFVF_PF_SHIFT) |</div><div class='add'>+			((func &amp; RVU_PFVF_FUNC_MASK) &lt;&lt;</div><div class='add'>+			RVU_PFVF_FUNC_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int rvu_pcifunc_pf_mask(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	if (is_cn20k(pdev))</div><div class='add'>+		return ~(RVU_CN20K_PFVF_PF_MASK &lt;&lt; RVU_CN20K_PFVF_PF_SHIFT);</div><div class='add'>+	else</div><div class='add'>+		return ~(RVU_OTX2_PFVF_PF_MASK &lt;&lt; RVU_OTX2_PFVF_PF_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define RVU_AFPF           25</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='add'>+</div><div class='ctx'> struct dump_ctx {</div><div class='ctx'> 	int	lf;</div><div class='ctx'> 	int	id;</div><div class='hunk'>@@ -444,6 +474,23 @@ struct mbox_wq_info {</div><div class='ctx'> 	struct workqueue_struct *mbox_wq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct rvu_irq_data {</div><div class='add'>+	u64 intr_status;</div><div class='add'>+	void (*rvu_queue_work_hdlr)(struct mbox_wq_info *mw, int first,</div><div class='add'>+				    int mdevs, u64 intr);</div><div class='add'>+	void (*afvf_queue_work_hdlr)(struct mbox_wq_info *mw, int first,</div><div class='add'>+				     int mdevs, u64 intr);</div><div class='add'>+	struct	rvu *rvu;</div><div class='add'>+	int vec_num;</div><div class='add'>+	int start;</div><div class='add'>+	int mdevs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mbox_ops {</div><div class='add'>+	irqreturn_t (*pf_intr_handler)(int irq, void *rvu_irq);</div><div class='add'>+	irqreturn_t (*afvf_intr_handler)(int irq, void *rvu_irq);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct channel_fwdata {</div><div class='ctx'> 	struct sdp_node_info info;</div><div class='ctx'> 	u8 valid;</div><div class='hunk'>@@ -451,6 +498,14 @@ struct channel_fwdata {</div><div class='ctx'> 	u8 reserved[RVU_CHANL_INFO_RESERVED];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct altaf_intr_notify {</div><div class='add'>+	unsigned long flr_pf_bmap[2];</div><div class='add'>+	unsigned long flr_vf_bmap[2];</div><div class='add'>+	unsigned long gint_paddr;</div><div class='add'>+	unsigned long gint_iova_addr;</div><div class='add'>+	unsigned long reserved[6];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct rvu_fwdata {</div><div class='ctx'> #define RVU_FWDATA_HEADER_MAGIC	0xCFDA	/* Custom Firmware Data*/</div><div class='ctx'> #define RVU_FWDATA_VERSION	0x0001</div><div class='hunk'>@@ -470,7 +525,8 @@ struct rvu_fwdata {</div><div class='ctx'> 	u32 ptp_ext_clk_rate;</div><div class='ctx'> 	u32 ptp_ext_tstamp;</div><div class='ctx'> 	struct channel_fwdata channel_data;</div><div class='del'>-#define FWDATA_RESERVED_MEM 958</div><div class='add'>+	struct altaf_intr_notify altaf_intr_info;</div><div class='add'>+#define FWDATA_RESERVED_MEM 946</div><div class='ctx'> 	u64 reserved[FWDATA_RESERVED_MEM];</div><div class='ctx'> #define CGX_MAX         9</div><div class='ctx'> #define CGX_LMACS_MAX   4</div><div class='hunk'>@@ -513,6 +569,11 @@ struct rvu_switch {</div><div class='ctx'> 	u16 start_entry;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct rep_evtq_ent {</div><div class='add'>+	struct list_head node;</div><div class='add'>+	struct rep_event event;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct rvu {</div><div class='ctx'> 	void __iomem		*afreg_base;</div><div class='ctx'> 	void __iomem		*pfreg_base;</div><div class='hunk'>@@ -525,6 +586,7 @@ struct rvu {</div><div class='ctx'> 	struct mutex		alias_lock; /* Serialize bar2 alias access */</div><div class='ctx'> 	int			vfs; /* Number of VFs attached to RVU */</div><div class='ctx'> 	u16			vf_devid; /* VF devices id */</div><div class='add'>+	bool			def_rule_cntr_en;</div><div class='ctx'> 	int			nix_blkaddr[MAX_NIX_BLKS];</div><div class='ctx'> </div><div class='ctx'> 	/* Mbox */</div><div class='hunk'>@@ -594,6 +656,18 @@ struct rvu {</div><div class='ctx'> 	spinlock_t		cpt_intr_lock;</div><div class='ctx'> </div><div class='ctx'> 	struct mutex		mbox_lock; /* Serialize mbox up and down msgs */</div><div class='add'>+	u16			rep_pcifunc;</div><div class='add'>+	bool			altaf_ready;</div><div class='add'>+	int			rep_cnt;</div><div class='add'>+	u16			*rep2pfvf_map;</div><div class='add'>+	u8			rep_mode;</div><div class='add'>+	struct			work_struct rep_evt_work;</div><div class='add'>+	struct			workqueue_struct *rep_evt_wq;</div><div class='add'>+	struct list_head	rep_evtq_head;</div><div class='add'>+	/* Representor event lock */</div><div class='add'>+	spinlock_t		rep_evtq_lock;</div><div class='add'>+</div><div class='add'>+	struct ng_rvu           *ng_rvu;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline void rvu_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)</div><div class='hunk'>@@ -719,6 +793,20 @@ static inline bool is_cn10kb(struct rvu *rvu)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool is_cgx_mapped_to_nix(unsigned short id, u8 cgx_id)</div><div class='add'>+{</div><div class='add'>+	/* On CNF10KA and CNF10KB silicons only two CGX blocks are connected</div><div class='add'>+	 * to NIX.</div><div class='add'>+	 */</div><div class='add'>+	if (id == PCI_SUBSYS_DEVID_CNF10K_A || id == PCI_SUBSYS_DEVID_CNF10K_B)</div><div class='add'>+		return cgx_id &lt;= 1;</div><div class='add'>+</div><div class='add'>+	return !(cgx_id &amp;&amp; !(id == PCI_SUBSYS_DEVID_96XX ||</div><div class='add'>+			     id == PCI_SUBSYS_DEVID_98XX ||</div><div class='add'>+			     id == PCI_SUBSYS_DEVID_CN10K_A ||</div><div class='add'>+			     id == PCI_SUBSYS_DEVID_CN10K_B));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool is_rvu_npc_hash_extract_en(struct rvu *rvu)</div><div class='ctx'> {</div><div class='ctx'> 	u64 npc_const3;</div><div class='hunk'>@@ -819,7 +907,6 @@ int rvu_alloc_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc);</div><div class='ctx'> void rvu_free_rsrc_contig(struct rsrc_bmap *rsrc, int nrsrc, int start);</div><div class='ctx'> bool rvu_rsrc_check_contig(struct rsrc_bmap *rsrc, int nrsrc);</div><div class='ctx'> u16 rvu_get_rsrc_mapcount(struct rvu_pfvf *pfvf, int blkaddr);</div><div class='del'>-int rvu_get_pf(u16 pcifunc);</div><div class='ctx'> struct rvu_pfvf *rvu_get_pfvf(struct rvu *rvu, int pcifunc);</div><div class='ctx'> void rvu_get_pf_numvfs(struct rvu *rvu, int pf, int *numvfs, int *hwvf);</div><div class='ctx'> bool is_block_implemented(struct rvu_hwinfo *hw, int blkaddr);</div><div class='hunk'>@@ -848,15 +935,33 @@ void rvu_aq_free(struct rvu *rvu, struct admin_queue *aq);</div><div class='ctx'> </div><div class='ctx'> /* SDP APIs */</div><div class='ctx'> int rvu_sdp_init(struct rvu *rvu);</div><div class='del'>-bool is_sdp_pfvf(u16 pcifunc);</div><div class='del'>-bool is_sdp_pf(u16 pcifunc);</div><div class='add'>+bool is_sdp_pfvf(struct rvu *rvu, u16 pcifunc);</div><div class='add'>+bool is_sdp_pf(struct rvu *rvu, u16 pcifunc);</div><div class='ctx'> bool is_sdp_vf(struct rvu *rvu, u16 pcifunc);</div><div class='ctx'> </div><div class='add'>+static inline bool is_rep_dev(struct rvu *rvu, u16 pcifunc)</div><div class='add'>+{</div><div class='add'>+	if (rvu-&gt;rep_pcifunc &amp;&amp; rvu-&gt;rep_pcifunc == pcifunc)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int rvu_get_pf(struct pci_dev *pdev, u16 pcifunc)</div><div class='add'>+{</div><div class='add'>+	if (is_cn20k(pdev))</div><div class='add'>+		return (pcifunc &gt;&gt; RVU_CN20K_PFVF_PF_SHIFT) &amp;</div><div class='add'>+			RVU_CN20K_PFVF_PF_MASK;</div><div class='add'>+	else</div><div class='add'>+		return (pcifunc &gt;&gt; RVU_OTX2_PFVF_PF_SHIFT) &amp;</div><div class='add'>+			RVU_OTX2_PFVF_PF_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* CGX APIs */</div><div class='ctx'> static inline bool is_pf_cgxmapped(struct rvu *rvu, u8 pf)</div><div class='ctx'> {</div><div class='ctx'> 	return (pf &gt;= PF_CGXMAP_BASE &amp;&amp; pf &lt;= rvu-&gt;cgx_mapped_pfs) &amp;&amp;</div><div class='del'>-		!is_sdp_pf(pf &lt;&lt; RVU_PFVF_PF_SHIFT);</div><div class='add'>+		!is_sdp_pf(rvu, rvu_make_pcifunc(rvu-&gt;pdev, pf, 0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void rvu_get_cgx_lmac_id(u8 map, u8 *cgx_id, u8 *lmac_id)</div><div class='hunk'>@@ -868,7 +973,7 @@ static inline void rvu_get_cgx_lmac_id(u8 map, u8 *cgx_id, u8 *lmac_id)</div><div class='ctx'> static inline bool is_cgx_vf(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='ctx'> 	return ((pcifunc &amp; RVU_PFVF_FUNC_MASK) &amp;&amp;</div><div class='del'>-		is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc)));</div><div class='add'>+		is_pf_cgxmapped(rvu, rvu_get_pf(rvu-&gt;pdev, pcifunc)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define M(_name, _id, fn_name, req, rsp)				\</div><div class='hunk'>@@ -876,6 +981,10 @@ int rvu_mbox_handler_ ## fn_name(struct rvu *, struct req *, struct rsp *);</div><div class='ctx'> MBOX_MESSAGES</div><div class='ctx'> #undef M</div><div class='ctx'> </div><div class='add'>+/* Mbox APIs */</div><div class='add'>+void rvu_queue_work(struct mbox_wq_info *mw, int first,</div><div class='add'>+		    int mdevs, u64 intr);</div><div class='add'>+</div><div class='ctx'> int rvu_cgx_init(struct rvu *rvu);</div><div class='ctx'> int rvu_cgx_exit(struct rvu *rvu);</div><div class='ctx'> void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu);</div><div class='hunk'>@@ -930,6 +1039,11 @@ int rvu_nix_mcast_get_mce_index(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> int rvu_nix_mcast_update_mcam_entry(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 				    u32 mcast_grp_idx, u16 mcam_index);</div><div class='ctx'> void rvu_nix_flr_free_bpids(struct rvu *rvu, u16 pcifunc);</div><div class='add'>+int rvu_alloc_cint_qint_mem(struct rvu *rvu, struct rvu_pfvf *pfvf,</div><div class='add'>+			    int blkaddr, int nixlf);</div><div class='add'>+void rvu_block_bcast_xon(struct rvu *rvu, int blkaddr);</div><div class='add'>+int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,</div><div class='add'>+			struct nix_aq_enq_rsp *rsp);</div><div class='ctx'> </div><div class='ctx'> /* NPC APIs */</div><div class='ctx'> void rvu_npc_freemem(struct rvu *rvu);</div><div class='hunk'>@@ -944,8 +1058,6 @@ void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf,</div><div class='ctx'> 				  bool enable);</div><div class='ctx'> void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 				       int nixlf, u64 chan);</div><div class='del'>-void rvu_npc_enable_bcast_entry(struct rvu *rvu, u16 pcifunc, int nixlf,</div><div class='del'>-				bool enable);</div><div class='ctx'> void rvu_npc_install_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,</div><div class='ctx'> 				    u64 chan);</div><div class='ctx'> void rvu_npc_enable_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,</div><div class='hunk'>@@ -960,13 +1072,19 @@ void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);</div><div class='ctx'> void rvu_npc_enable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);</div><div class='ctx'> void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu, u16 pcifunc, int nixlf,</div><div class='ctx'> 				    int group, int alg_idx, int mcam_index);</div><div class='del'>-</div><div class='add'>+void __rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc,</div><div class='add'>+					 struct rvu_npc_mcam_rule *rule);</div><div class='add'>+void __rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc,</div><div class='add'>+				    struct rvu_npc_mcam_rule *rule,</div><div class='add'>+				    struct npc_install_flow_rsp *rsp);</div><div class='ctx'> void rvu_npc_get_mcam_entry_alloc_info(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 				       int blkaddr, int *alloc_cnt,</div><div class='ctx'> 				       int *enable_cnt);</div><div class='ctx'> void rvu_npc_get_mcam_counter_alloc_info(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 					 int blkaddr, int *alloc_cnt,</div><div class='ctx'> 					 int *enable_cnt);</div><div class='add'>+void rvu_npc_clear_ucast_entry(struct rvu *rvu, int pcifunc, int nixlf);</div><div class='add'>+</div><div class='ctx'> bool is_npc_intf_tx(u8 intf);</div><div class='ctx'> bool is_npc_intf_rx(u8 intf);</div><div class='ctx'> bool is_npc_interface_valid(struct rvu *rvu, u8 intf);</div><div class='hunk'>@@ -985,6 +1103,7 @@ void npc_set_mcam_action(struct rvu *rvu, struct npc_mcam *mcam,</div><div class='ctx'> void npc_read_mcam_entry(struct rvu *rvu, struct npc_mcam *mcam,</div><div class='ctx'> 			 int blkaddr, u16 src, struct mcam_entry *entry,</div><div class='ctx'> 			 u8 *intf, u8 *ena);</div><div class='add'>+int npc_config_cntr_default_entries(struct rvu *rvu, bool enable);</div><div class='ctx'> bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc);</div><div class='ctx'> bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature);</div><div class='ctx'> u32  rvu_cgx_get_fifolen(struct rvu *rvu);</div><div class='hunk'>@@ -997,6 +1116,7 @@ int rvu_cgx_prio_flow_ctrl_cfg(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_</div><div class='ctx'> int rvu_cgx_cfg_pause_frm(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause);</div><div class='ctx'> void rvu_mac_reset(struct rvu *rvu, u16 pcifunc);</div><div class='ctx'> u32 rvu_cgx_get_lmac_fifolen(struct rvu *rvu, int cgx, int lmac);</div><div class='add'>+void cgx_start_linkup(struct rvu *rvu);</div><div class='ctx'> int npc_get_nixlf_mcam_index(struct npc_mcam *mcam, u16 pcifunc, int nixlf,</div><div class='ctx'> 			     int type);</div><div class='ctx'> bool is_mcam_entry_enabled(struct rvu *rvu, struct npc_mcam *mcam, int blkaddr,</div><div class='hunk'>@@ -1045,7 +1165,8 @@ int rvu_ndc_fix_locked_cacheline(struct rvu *rvu, int blkaddr);</div><div class='ctx'> /* RVU Switch */</div><div class='ctx'> void rvu_switch_enable(struct rvu *rvu);</div><div class='ctx'> void rvu_switch_disable(struct rvu *rvu);</div><div class='del'>-void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc);</div><div class='add'>+void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc, bool ena);</div><div class='add'>+void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool ena);</div><div class='ctx'> </div><div class='ctx'> int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,</div><div class='ctx'> 			   u64 pkind, u8 var_len_off, u8 var_len_off_mask,</div><div class='hunk'>@@ -1058,4 +1179,9 @@ int rvu_mcs_flr_handler(struct rvu *rvu, u16 pcifunc);</div><div class='ctx'> void rvu_mcs_ptp_cfg(struct rvu *rvu, u8 rpm_id, u8 lmac_id, bool ena);</div><div class='ctx'> void rvu_mcs_exit(struct rvu *rvu);</div><div class='ctx'> </div><div class='add'>+/* Representor APIs */</div><div class='add'>+int rvu_rep_pf_init(struct rvu *rvu);</div><div class='add'>+int rvu_rep_install_mcam_rules(struct rvu *rvu);</div><div class='add'>+void rvu_rep_update_rules(struct rvu *rvu, u16 pcifunc, bool ena);</div><div class='add'>+int rvu_rep_notify_pfvf_state(struct rvu *rvu, u16 pcifunc, bool enable);</div><div class='ctx'> #endif /* RVU_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c<br/>index 266ecbc1b97a..3abd750a4bd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c</a></div><div class='hunk'>@@ -34,7 +34,7 @@ static struct _req_type __maybe_unused					\</div><div class='ctx'> 		return NULL;						\</div><div class='ctx'> 	req-&gt;hdr.sig = OTX2_MBOX_REQ_SIG;				\</div><div class='ctx'> 	req-&gt;hdr.id = _id;						\</div><div class='del'>-	trace_otx2_msg_alloc(rvu-&gt;pdev, _id, sizeof(*req));		\</div><div class='add'>+	trace_otx2_msg_alloc(rvu-&gt;pdev, _id, sizeof(*req), 0);		\</div><div class='ctx'> 	return req;							\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -272,6 +272,8 @@ static void cgx_notify_pfs(struct cgx_link_event *event, struct rvu *rvu)</div><div class='ctx'> </div><div class='ctx'> 		otx2_mbox_msg_send_up(&amp;rvu-&gt;afpf_wq_info.mbox_up, pfid);</div><div class='ctx'> </div><div class='add'>+		otx2_mbox_wait_for_rsp(&amp;rvu-&gt;afpf_wq_info.mbox_up, pfid);</div><div class='add'>+</div><div class='ctx'> 		mutex_unlock(&amp;rvu-&gt;mbox_lock);</div><div class='ctx'> 	} while (pfmap);</div><div class='ctx'> }</div><div class='hunk'>@@ -313,7 +315,7 @@ static int cgx_lmac_event_handler_init(struct rvu *rvu)</div><div class='ctx'> 	spin_lock_init(&amp;rvu-&gt;cgx_evq_lock);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;rvu-&gt;cgx_evq_head);</div><div class='ctx'> 	INIT_WORK(&amp;rvu-&gt;cgx_evh_work, cgx_evhandler_task);</div><div class='del'>-	rvu-&gt;cgx_evh_wq = alloc_workqueue("rvu_evh_wq", 0, 0);</div><div class='add'>+	rvu-&gt;cgx_evh_wq = alloc_workqueue("rvu_evh_wq", WQ_PERCPU, 0);</div><div class='ctx'> 	if (!rvu-&gt;cgx_evh_wq) {</div><div class='ctx'> 		dev_err(rvu-&gt;dev, "alloc workqueue failed");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -349,6 +351,7 @@ static void rvu_cgx_wq_destroy(struct rvu *rvu)</div><div class='ctx'> </div><div class='ctx'> int rvu_cgx_init(struct rvu *rvu)</div><div class='ctx'> {</div><div class='add'>+	struct mac_ops *mac_ops;</div><div class='ctx'> 	int cgx, err;</div><div class='ctx'> 	void *cgxd;</div><div class='ctx'> </div><div class='hunk'>@@ -375,6 +378,15 @@ int rvu_cgx_init(struct rvu *rvu)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	/* Clear X2P reset on all MAC blocks */</div><div class='add'>+	for (cgx = 0; cgx &lt; rvu-&gt;cgx_cnt_max; cgx++) {</div><div class='add'>+		cgxd = rvu_cgx_pdata(cgx, rvu);</div><div class='add'>+		if (!cgxd)</div><div class='add'>+			continue;</div><div class='add'>+		mac_ops = get_mac_ops(cgxd);</div><div class='add'>+		mac_ops-&gt;mac_x2p_reset(cgxd, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Register for CGX events */</div><div class='ctx'> 	err = cgx_lmac_event_handler_init(rvu);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -382,10 +394,26 @@ int rvu_cgx_init(struct rvu *rvu)</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;rvu-&gt;cgx_cfg_lock);</div><div class='ctx'> </div><div class='del'>-	/* Ensure event handler registration is completed, before</div><div class='del'>-	 * we turn on the links</div><div class='del'>-	 */</div><div class='del'>-	mb();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cgx_start_linkup(struct rvu *rvu)</div><div class='add'>+{</div><div class='add'>+	unsigned long lmac_bmap;</div><div class='add'>+	struct mac_ops *mac_ops;</div><div class='add'>+	int cgx, lmac, err;</div><div class='add'>+	void *cgxd;</div><div class='add'>+</div><div class='add'>+	/* Enable receive on all LMACS */</div><div class='add'>+	for (cgx = 0; cgx &lt;= rvu-&gt;cgx_cnt_max; cgx++) {</div><div class='add'>+		cgxd = rvu_cgx_pdata(cgx, rvu);</div><div class='add'>+		if (!cgxd)</div><div class='add'>+			continue;</div><div class='add'>+		mac_ops = get_mac_ops(cgxd);</div><div class='add'>+		lmac_bmap = cgx_get_lmac_bmap(cgxd);</div><div class='add'>+		for_each_set_bit(lmac, &amp;lmac_bmap, rvu-&gt;hw-&gt;lmac_per_cgx)</div><div class='add'>+			mac_ops-&gt;mac_enadis_rx(cgxd, lmac, true);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Do link up for all CGX ports */</div><div class='ctx'> 	for (cgx = 0; cgx &lt;= rvu-&gt;cgx_cnt_max; cgx++) {</div><div class='hunk'>@@ -398,8 +426,6 @@ int rvu_cgx_init(struct rvu *rvu)</div><div class='ctx'> 				"Link up process failed to start on cgx %d\n",</div><div class='ctx'> 				cgx);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int rvu_cgx_exit(struct rvu *rvu)</div><div class='hunk'>@@ -431,7 +457,7 @@ int rvu_cgx_exit(struct rvu *rvu)</div><div class='ctx'> inline bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='ctx'> 	if ((pcifunc &amp; RVU_PFVF_FUNC_MASK) ||</div><div class='del'>-	    !is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc)))</div><div class='add'>+	    !is_pf_cgxmapped(rvu, rvu_get_pf(rvu-&gt;pdev, pcifunc)))</div><div class='ctx'> 		return false;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -458,7 +484,7 @@ void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool enable)</div><div class='ctx'> </div><div class='ctx'> int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	void *cgxd;</div><div class='hunk'>@@ -475,7 +501,7 @@ int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)</div><div class='ctx'> </div><div class='ctx'> int rvu_cgx_tx_enable(struct rvu *rvu, u16 pcifunc, bool enable)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	void *cgxd;</div><div class='hunk'>@@ -500,7 +526,7 @@ int rvu_cgx_config_tx(void *cgxd, int lmac_id, bool enable)</div><div class='ctx'> </div><div class='ctx'> void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	int i = 0, lmac_count = 0;</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 max_dmac_filters;</div><div class='hunk'>@@ -551,7 +577,7 @@ int rvu_mbox_handler_cgx_stop_rxtx(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> static int rvu_lmac_get_stats(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 			      void *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	int stat = 0, err = 0;</div><div class='ctx'> 	u64 tx_stat, rx_stat;</div><div class='hunk'>@@ -607,7 +633,7 @@ int rvu_mbox_handler_rpm_stats(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> int rvu_mbox_handler_cgx_stats_rst(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 				   struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	struct rvu_pfvf	*parent_pf;</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_idx, lmac;</div><div class='hunk'>@@ -637,7 +663,7 @@ int rvu_mbox_handler_cgx_fec_stats(struct rvu *rvu,</div><div class='ctx'> 				   struct msg_req *req,</div><div class='ctx'> 				   struct cgx_fec_stats_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_idx, lmac;</div><div class='ctx'> 	void *cgxd;</div><div class='hunk'>@@ -655,17 +681,20 @@ int rvu_mbox_handler_cgx_mac_addr_set(struct rvu *rvu,</div><div class='ctx'> 				      struct cgx_mac_addr_set_or_get *req,</div><div class='ctx'> 				      struct cgx_mac_addr_set_or_get *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='add'>+	struct rvu_pfvf *pfvf;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='del'>-	if (!is_cgx_config_permitted(rvu, req-&gt;hdr.pcifunc))</div><div class='del'>-		return -EPERM;</div><div class='add'>+	if (!is_pf_cgxmapped(rvu, pf))</div><div class='add'>+		return LMAC_AF_ERR_PF_NOT_MAPPED;</div><div class='ctx'> </div><div class='ctx'> 	if (rvu_npc_exact_has_match_table(rvu))</div><div class='ctx'> 		return rvu_npc_exact_mac_addr_set(rvu, req, rsp);</div><div class='ctx'> </div><div class='ctx'> 	rvu_get_cgx_lmac_id(rvu-&gt;pf2cgxlmac_map[pf], &amp;cgx_id, &amp;lmac_id);</div><div class='ctx'> </div><div class='add'>+	pfvf = &amp;rvu-&gt;pf[pf];</div><div class='add'>+	ether_addr_copy(pfvf-&gt;mac_addr, req-&gt;mac_addr);</div><div class='ctx'> 	cgx_lmac_addr_set(cgx_id, lmac_id, req-&gt;mac_addr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -675,7 +704,7 @@ int rvu_mbox_handler_cgx_mac_addr_add(struct rvu *rvu,</div><div class='ctx'> 				      struct cgx_mac_addr_add_req *req,</div><div class='ctx'> 				      struct cgx_mac_addr_add_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -699,7 +728,7 @@ int rvu_mbox_handler_cgx_mac_addr_del(struct rvu *rvu,</div><div class='ctx'> 				      struct cgx_mac_addr_del_req *req,</div><div class='ctx'> 				      struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_cgx_config_permitted(rvu, req-&gt;hdr.pcifunc))</div><div class='hunk'>@@ -717,7 +746,7 @@ int rvu_mbox_handler_cgx_mac_max_entries_get(struct rvu *rvu,</div><div class='ctx'> 					     struct cgx_max_dmac_entries_get_rsp</div><div class='ctx'> 					     *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='ctx'> 	/* If msg is received from PFs(which are not mapped to CGX LMACs)</div><div class='hunk'>@@ -743,20 +772,12 @@ int rvu_mbox_handler_cgx_mac_addr_get(struct rvu *rvu,</div><div class='ctx'> 				      struct cgx_mac_addr_set_or_get *req,</div><div class='ctx'> 				      struct cgx_mac_addr_set_or_get *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='del'>-	u8 cgx_id, lmac_id;</div><div class='del'>-	int rc = 0;</div><div class='del'>-	u64 cfg;</div><div class='add'>+	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, req-&gt;hdr.pcifunc);</div><div class='ctx'> </div><div class='del'>-	if (!is_cgx_config_permitted(rvu, req-&gt;hdr.pcifunc))</div><div class='del'>-		return -EPERM;</div><div class='del'>-</div><div class='del'>-	rvu_get_cgx_lmac_id(rvu-&gt;pf2cgxlmac_map[pf], &amp;cgx_id, &amp;lmac_id);</div><div class='add'>+	if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc)))</div><div class='add'>+		return LMAC_AF_ERR_PF_NOT_MAPPED;</div><div class='ctx'> </div><div class='del'>-	rsp-&gt;hdr.rc = rc;</div><div class='del'>-	cfg = cgx_lmac_addr_get(cgx_id, lmac_id);</div><div class='del'>-	/* copy 48 bit mac address to req-&gt;mac_addr */</div><div class='del'>-	u64_to_ether_addr(cfg, rsp-&gt;mac_addr);</div><div class='add'>+	ether_addr_copy(rsp-&gt;mac_addr, pfvf-&gt;mac_addr);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -764,7 +785,7 @@ int rvu_mbox_handler_cgx_promisc_enable(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 					struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='ctx'> 	u16 pcifunc = req-&gt;hdr.pcifunc;</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_cgx_config_permitted(rvu, req-&gt;hdr.pcifunc))</div><div class='hunk'>@@ -783,7 +804,7 @@ int rvu_mbox_handler_cgx_promisc_enable(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> int rvu_mbox_handler_cgx_promisc_disable(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 					 struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_cgx_config_permitted(rvu, req-&gt;hdr.pcifunc))</div><div class='hunk'>@@ -802,7 +823,7 @@ int rvu_mbox_handler_cgx_promisc_disable(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	void *cgxd;</div><div class='hunk'>@@ -838,7 +859,7 @@ static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)</div><div class='ctx'> int rvu_mbox_handler_cgx_ptp_rx_enable(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 				       struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	if (!is_pf_cgxmapped(rvu, rvu_get_pf(req-&gt;hdr.pcifunc)))</div><div class='add'>+	if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc)))</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> </div><div class='ctx'> 	return rvu_cgx_ptp_rx_cfg(rvu, req-&gt;hdr.pcifunc, true);</div><div class='hunk'>@@ -852,7 +873,7 @@ int rvu_mbox_handler_cgx_ptp_rx_disable(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> </div><div class='ctx'> static int rvu_cgx_config_linkevents(struct rvu *rvu, u16 pcifunc, bool en)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_cgx_config_permitted(rvu, pcifunc))</div><div class='hunk'>@@ -891,7 +912,7 @@ int rvu_mbox_handler_cgx_get_linkinfo(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	int pf, err;</div><div class='ctx'> </div><div class='del'>-	pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> </div><div class='ctx'> 	if (!is_pf_cgxmapped(rvu, pf))</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -907,7 +928,7 @@ int rvu_mbox_handler_cgx_features_get(struct rvu *rvu,</div><div class='ctx'> 				      struct msg_req *req,</div><div class='ctx'> 				      struct cgx_features_info_msg *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u8 cgx_idx, lmac;</div><div class='ctx'> 	void *cgxd;</div><div class='ctx'> </div><div class='hunk'>@@ -923,13 +944,12 @@ int rvu_mbox_handler_cgx_features_get(struct rvu *rvu,</div><div class='ctx'> </div><div class='ctx'> u32 rvu_cgx_get_fifolen(struct rvu *rvu)</div><div class='ctx'> {</div><div class='del'>-	struct mac_ops *mac_ops;</div><div class='del'>-	u32 fifo_len;</div><div class='add'>+	void *cgxd = rvu_first_cgx_pdata(rvu);</div><div class='ctx'> </div><div class='del'>-	mac_ops = get_mac_ops(rvu_first_cgx_pdata(rvu));</div><div class='del'>-	fifo_len = mac_ops ? mac_ops-&gt;fifo_len : 0;</div><div class='add'>+	if (!cgxd)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	return fifo_len;</div><div class='add'>+	return cgx_get_fifo_len(cgxd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u32 rvu_cgx_get_lmac_fifolen(struct rvu *rvu, int cgx, int lmac)</div><div class='hunk'>@@ -950,7 +970,7 @@ u32 rvu_cgx_get_lmac_fifolen(struct rvu *rvu, int cgx, int lmac)</div><div class='ctx'> </div><div class='ctx'> static int rvu_cgx_config_intlbk(struct rvu *rvu, u16 pcifunc, bool en)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='hunk'>@@ -980,7 +1000,7 @@ int rvu_mbox_handler_cgx_intlbk_disable(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> </div><div class='ctx'> int rvu_cgx_cfg_pause_frm(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	u8 rx_pfc = 0, tx_pfc = 0;</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='hunk'>@@ -1021,7 +1041,7 @@ int rvu_mbox_handler_cgx_cfg_pause_frm(struct rvu *rvu,</div><div class='ctx'> 				       struct cgx_pause_frm_cfg *req,</div><div class='ctx'> 				       struct cgx_pause_frm_cfg *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	int err = 0;</div><div class='hunk'>@@ -1048,7 +1068,7 @@ int rvu_mbox_handler_cgx_cfg_pause_frm(struct rvu *rvu,</div><div class='ctx'> int rvu_mbox_handler_cgx_get_phy_fec_stats(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 					   struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_pf_cgxmapped(rvu, pf))</div><div class='hunk'>@@ -1081,7 +1101,7 @@ int rvu_cgx_nix_cuml_stats(struct rvu *rvu, void *cgxd, int lmac_id,</div><div class='ctx'> 	/* Assumes LF of a PF and all of its VF belongs to the same</div><div class='ctx'> 	 * NIX block</div><div class='ctx'> 	 */</div><div class='del'>-	pcifunc = pf &lt;&lt; RVU_PFVF_PF_SHIFT;</div><div class='add'>+	pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, 0);</div><div class='ctx'> 	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);</div><div class='ctx'> 	if (blkaddr &lt; 0)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1108,10 +1128,10 @@ int rvu_cgx_start_stop_io(struct rvu *rvu, u16 pcifunc, bool start)</div><div class='ctx'> 	struct rvu_pfvf *parent_pf, *pfvf;</div><div class='ctx'> 	int cgx_users, err = 0;</div><div class='ctx'> </div><div class='del'>-	if (!is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc)))</div><div class='add'>+	if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu-&gt;pdev, pcifunc)))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	parent_pf = &amp;rvu-&gt;pf[rvu_get_pf(pcifunc)];</div><div class='add'>+	parent_pf = &amp;rvu-&gt;pf[rvu_get_pf(rvu-&gt;pdev, pcifunc)];</div><div class='ctx'> 	pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;rvu-&gt;cgx_cfg_lock);</div><div class='hunk'>@@ -1154,7 +1174,7 @@ int rvu_mbox_handler_cgx_set_fec_param(struct rvu *rvu,</div><div class='ctx'> 				       struct fec_mode *req,</div><div class='ctx'> 				       struct fec_mode *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_pf_cgxmapped(rvu, pf))</div><div class='hunk'>@@ -1170,7 +1190,7 @@ int rvu_mbox_handler_cgx_set_fec_param(struct rvu *rvu,</div><div class='ctx'> int rvu_mbox_handler_cgx_get_aux_link_info(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 					   struct cgx_fw_data *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='ctx'> 	if (!rvu-&gt;fwdata)</div><div class='hunk'>@@ -1197,7 +1217,8 @@ int rvu_mbox_handler_cgx_set_link_mode(struct rvu *rvu,</div><div class='ctx'> 				       struct cgx_set_link_mode_req *req,</div><div class='ctx'> 				       struct cgx_set_link_mode_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='add'>+	struct cgx_lmac_fwdata_s *linkmodes;</div><div class='ctx'> 	u8 cgx_idx, lmac;</div><div class='ctx'> 	void *cgxd;</div><div class='ctx'> </div><div class='hunk'>@@ -1206,14 +1227,20 @@ int rvu_mbox_handler_cgx_set_link_mode(struct rvu *rvu,</div><div class='ctx'> </div><div class='ctx'> 	rvu_get_cgx_lmac_id(rvu-&gt;pf2cgxlmac_map[pf], &amp;cgx_idx, &amp;lmac);</div><div class='ctx'> 	cgxd = rvu_cgx_pdata(cgx_idx, rvu);</div><div class='del'>-	rsp-&gt;status = cgx_set_link_mode(cgxd, req-&gt;args, cgx_idx, lmac);</div><div class='add'>+	if (rvu-&gt;hw-&gt;lmac_per_cgx == CGX_LMACS_USX)</div><div class='add'>+		linkmodes = &amp;rvu-&gt;fwdata-&gt;cgx_fw_data_usx[cgx_idx][lmac];</div><div class='add'>+	else</div><div class='add'>+		linkmodes = &amp;rvu-&gt;fwdata-&gt;cgx_fw_data[cgx_idx][lmac];</div><div class='add'>+</div><div class='add'>+	rsp-&gt;status = cgx_set_link_mode(cgxd, req-&gt;args, linkmodes,</div><div class='add'>+					cgx_idx, lmac);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int rvu_mbox_handler_cgx_mac_addr_reset(struct rvu *rvu, struct cgx_mac_addr_reset_req *req,</div><div class='ctx'> 					struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_cgx_config_permitted(rvu, req-&gt;hdr.pcifunc))</div><div class='hunk'>@@ -1231,7 +1258,7 @@ int rvu_mbox_handler_cgx_mac_addr_update(struct rvu *rvu,</div><div class='ctx'> 					 struct cgx_mac_addr_update_req *req,</div><div class='ctx'> 					 struct cgx_mac_addr_update_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='ctx'> 	if (!is_cgx_config_permitted(rvu, req-&gt;hdr.pcifunc))</div><div class='hunk'>@@ -1247,7 +1274,7 @@ int rvu_mbox_handler_cgx_mac_addr_update(struct rvu *rvu,</div><div class='ctx'> int rvu_cgx_prio_flow_ctrl_cfg(struct rvu *rvu, u16 pcifunc, u8 tx_pause,</div><div class='ctx'> 			       u8 rx_pause, u16 pfc_en)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	u8 rx_8023 = 0, tx_8023 = 0;</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='hunk'>@@ -1285,7 +1312,7 @@ int rvu_mbox_handler_cgx_prio_flow_ctrl_cfg(struct rvu *rvu,</div><div class='ctx'> 					    struct cgx_pfc_cfg *req,</div><div class='ctx'> 					    struct cgx_pfc_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	void *cgxd;</div><div class='hunk'>@@ -1310,7 +1337,7 @@ int rvu_mbox_handler_cgx_prio_flow_ctrl_cfg(struct rvu *rvu,</div><div class='ctx'> </div><div class='ctx'> void rvu_mac_reset(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	struct cgx *cgxd;</div><div class='ctx'> 	u8 cgx, lmac;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c<br/>index 7fa98aeb3663..d2163da28d18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c</a></div><div class='hunk'>@@ -13,19 +13,26 @@</div><div class='ctx'> /* RVU LMTST */</div><div class='ctx'> #define LMT_TBL_OP_READ		0</div><div class='ctx'> #define LMT_TBL_OP_WRITE	1</div><div class='del'>-#define LMT_MAP_TABLE_SIZE	(128 * 1024)</div><div class='ctx'> #define LMT_MAPTBL_ENTRY_SIZE	16</div><div class='add'>+#define LMT_MAX_VFS		256</div><div class='add'>+</div><div class='add'>+#define LMT_MAP_ENTRY_ENA      BIT_ULL(20)</div><div class='add'>+#define LMT_MAP_ENTRY_LINES    GENMASK_ULL(18, 16)</div><div class='ctx'> </div><div class='ctx'> /* Function to perform operations (read/write) on lmtst map table */</div><div class='ctx'> static int lmtst_map_table_ops(struct rvu *rvu, u32 index, u64 *val,</div><div class='ctx'> 			       int lmt_tbl_op)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *lmt_map_base;</div><div class='del'>-	u64 tbl_base;</div><div class='add'>+	u64 tbl_base, cfg;</div><div class='add'>+	int pfs, vfs;</div><div class='ctx'> </div><div class='ctx'> 	tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE);</div><div class='add'>+	cfg  = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);</div><div class='add'>+	vfs = 1 &lt;&lt; (cfg &amp; 0xF);</div><div class='add'>+	pfs = 1 &lt;&lt; ((cfg &gt;&gt; 4) &amp; 0x7);</div><div class='ctx'> </div><div class='del'>-	lmt_map_base = ioremap_wc(tbl_base, LMT_MAP_TABLE_SIZE);</div><div class='add'>+	lmt_map_base = ioremap_wc(tbl_base, pfs * vfs * LMT_MAPTBL_ENTRY_SIZE);</div><div class='ctx'> 	if (!lmt_map_base) {</div><div class='ctx'> 		dev_err(rvu-&gt;dev, "Failed to setup lmt map table mapping!!\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -35,6 +42,13 @@ static int lmtst_map_table_ops(struct rvu *rvu, u32 index, u64 *val,</div><div class='ctx'> 		*val = readq(lmt_map_base + index);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		writeq((*val), (lmt_map_base + index));</div><div class='add'>+</div><div class='add'>+		cfg = FIELD_PREP(LMT_MAP_ENTRY_ENA, 0x1);</div><div class='add'>+		/* 2048 LMTLINES */</div><div class='add'>+		cfg |= FIELD_PREP(LMT_MAP_ENTRY_LINES, 0x6);</div><div class='add'>+</div><div class='add'>+		writeq(cfg, (lmt_map_base + (index + 8)));</div><div class='add'>+</div><div class='ctx'> 		/* Flushing the AP interceptor cache to make APR_LMT_MAP_ENTRY_S</div><div class='ctx'> 		 * changes effective. Write 1 for flush and read is being used as a</div><div class='ctx'> 		 * barrier and sets up a data dependency. Write to 0 after a write</div><div class='hunk'>@@ -52,7 +66,7 @@ static int lmtst_map_table_ops(struct rvu *rvu, u32 index, u64 *val,</div><div class='ctx'> #define LMT_MAP_TBL_W1_OFF  8</div><div class='ctx'> static u32 rvu_get_lmtst_tbl_index(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='del'>-	return ((rvu_get_pf(pcifunc) * rvu-&gt;hw-&gt;total_vfs) +</div><div class='add'>+	return ((rvu_get_pf(rvu-&gt;pdev, pcifunc) * LMT_MAX_VFS) +</div><div class='ctx'> 		(pcifunc &amp; RVU_PFVF_FUNC_MASK)) * LMT_MAPTBL_ENTRY_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -69,7 +83,7 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;rvu-&gt;rsrc_lock);</div><div class='ctx'> 	rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova);</div><div class='del'>-	pf = rvu_get_pf(pcifunc) &amp; 0x1F;</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, pcifunc) &amp; RVU_OTX2_PFVF_PF_MASK;</div><div class='ctx'> 	val = BIT_ULL(63) | BIT_ULL(14) | BIT_ULL(13) | pf &lt;&lt; 8 |</div><div class='ctx'> 	      ((pcifunc &amp; RVU_PFVF_FUNC_MASK) &amp; 0xFF);</div><div class='ctx'> 	rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TXN_REQ, val);</div><div class='hunk'>@@ -141,7 +155,7 @@ int rvu_mbox_handler_lmtst_tbl_setup(struct rvu *rvu,</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	/* Check if PF_FUNC wants to use it's own local memory as LMTLINE</div><div class='add'>+	/* Check if PF_FUNC wants to use its own local memory as LMTLINE</div><div class='ctx'> 	 * region, if so, convert that IOVA to physical address and</div><div class='ctx'> 	 * populate LMT table with that address</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c<br/>index 3c5bbaf12e59..f404117bf6c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c</a></div><div class='hunk'>@@ -410,7 +410,7 @@ static bool is_cpt_pf(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='ctx'> 	int cpt_pf_num = rvu-&gt;cpt_pf_num;</div><div class='ctx'> </div><div class='del'>-	if (rvu_get_pf(pcifunc) != cpt_pf_num)</div><div class='add'>+	if (rvu_get_pf(rvu-&gt;pdev, pcifunc) != cpt_pf_num)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	if (pcifunc &amp; RVU_PFVF_FUNC_MASK)</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -422,7 +422,7 @@ static bool is_cpt_vf(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='ctx'> 	int cpt_pf_num = rvu-&gt;cpt_pf_num;</div><div class='ctx'> </div><div class='del'>-	if (rvu_get_pf(pcifunc) != cpt_pf_num)</div><div class='add'>+	if (rvu_get_pf(rvu-&gt;pdev, pcifunc) != cpt_pf_num)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	if (!(pcifunc &amp; RVU_PFVF_FUNC_MASK))</div><div class='ctx'> 		return false;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c<br/>index 8c700ee4a82b..15d3cb0b9da6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c</a></div><div class='hunk'>@@ -21,6 +21,8 @@</div><div class='ctx'> #include "rvu_npc_hash.h"</div><div class='ctx'> #include "mcs.h"</div><div class='ctx'> </div><div class='add'>+#include "cn20k/debugfs.h"</div><div class='add'>+</div><div class='ctx'> #define DEBUGFS_DIR_NAME "octeontx2"</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -45,33 +47,6 @@ enum {</div><div class='ctx'> 	CGX_STAT18,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* NIX TX stats */</div><div class='del'>-enum nix_stat_lf_tx {</div><div class='del'>-	TX_UCAST	= 0x0,</div><div class='del'>-	TX_BCAST	= 0x1,</div><div class='del'>-	TX_MCAST	= 0x2,</div><div class='del'>-	TX_DROP		= 0x3,</div><div class='del'>-	TX_OCTS		= 0x4,</div><div class='del'>-	TX_STATS_ENUM_LAST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* NIX RX stats */</div><div class='del'>-enum nix_stat_lf_rx {</div><div class='del'>-	RX_OCTS		= 0x0,</div><div class='del'>-	RX_UCAST	= 0x1,</div><div class='del'>-	RX_BCAST	= 0x2,</div><div class='del'>-	RX_MCAST	= 0x3,</div><div class='del'>-	RX_DROP		= 0x4,</div><div class='del'>-	RX_DROP_OCTS	= 0x5,</div><div class='del'>-	RX_FCS		= 0x6,</div><div class='del'>-	RX_ERR		= 0x7,</div><div class='del'>-	RX_DRP_BCAST	= 0x8,</div><div class='del'>-	RX_DRP_MCAST	= 0x9,</div><div class='del'>-	RX_DRP_L3BCAST	= 0xa,</div><div class='del'>-	RX_DRP_L3MCAST	= 0xb,</div><div class='del'>-	RX_STATS_ENUM_LAST,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static char *cgx_rx_stats_fields[] = {</div><div class='ctx'> 	[CGX_STAT0]	= "Received packets",</div><div class='ctx'> 	[CGX_STAT1]	= "Octets of received packets",</div><div class='hunk'>@@ -580,6 +555,7 @@ static ssize_t rvu_dbg_lmtst_map_table_display(struct file *filp,</div><div class='ctx'> 	u64 lmt_addr, val, tbl_base;</div><div class='ctx'> 	int pf, vf, num_vfs, hw_vfs;</div><div class='ctx'> 	void __iomem *lmt_map_base;</div><div class='add'>+	int apr_pfs, apr_vfs;</div><div class='ctx'> 	int buf_size = 10240;</div><div class='ctx'> 	size_t off = 0;</div><div class='ctx'> 	int index = 0;</div><div class='hunk'>@@ -595,8 +571,12 @@ static ssize_t rvu_dbg_lmtst_map_table_display(struct file *filp,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	tbl_base = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_MAP_BASE);</div><div class='add'>+	val  = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);</div><div class='add'>+	apr_vfs = 1 &lt;&lt; (val &amp; 0xF);</div><div class='add'>+	apr_pfs = 1 &lt;&lt; ((val &gt;&gt; 4) &amp; 0x7);</div><div class='ctx'> </div><div class='del'>-	lmt_map_base = ioremap_wc(tbl_base, 128 * 1024);</div><div class='add'>+	lmt_map_base = ioremap_wc(tbl_base, apr_pfs * apr_vfs *</div><div class='add'>+				  LMT_MAPTBL_ENTRY_SIZE);</div><div class='ctx'> 	if (!lmt_map_base) {</div><div class='ctx'> 		dev_err(rvu-&gt;dev, "Failed to setup lmt map table mapping!!\n");</div><div class='ctx'> 		kfree(buf);</div><div class='hunk'>@@ -618,7 +598,7 @@ static ssize_t rvu_dbg_lmtst_map_table_display(struct file *filp,</div><div class='ctx'> 		off += scnprintf(&amp;buf[off], buf_size - 1 - off, "PF%d  \t\t\t",</div><div class='ctx'> 				    pf);</div><div class='ctx'> </div><div class='del'>-		index = pf * rvu-&gt;hw-&gt;total_vfs * LMT_MAPTBL_ENTRY_SIZE;</div><div class='add'>+		index = pf * apr_vfs * LMT_MAPTBL_ENTRY_SIZE;</div><div class='ctx'> 		off += scnprintf(&amp;buf[off], buf_size - 1 - off, " 0x%llx\t\t",</div><div class='ctx'> 				 (tbl_base + index));</div><div class='ctx'> 		lmt_addr = readq(lmt_map_base + index);</div><div class='hunk'>@@ -631,7 +611,7 @@ static ssize_t rvu_dbg_lmtst_map_table_display(struct file *filp,</div><div class='ctx'> 		/* Reading num of VFs per PF */</div><div class='ctx'> 		rvu_get_pf_numvfs(rvu, pf, &amp;num_vfs, &amp;hw_vfs);</div><div class='ctx'> 		for (vf = 0; vf &lt; num_vfs; vf++) {</div><div class='del'>-			index = (pf * rvu-&gt;hw-&gt;total_vfs * 16) +</div><div class='add'>+			index = (pf * apr_vfs * LMT_MAPTBL_ENTRY_SIZE) +</div><div class='ctx'> 				((vf + 1)  * LMT_MAPTBL_ENTRY_SIZE);</div><div class='ctx'> 			off += scnprintf(&amp;buf[off], buf_size - 1 - off,</div><div class='ctx'> 					    "PF%d:VF%d  \t\t", pf, vf);</div><div class='hunk'>@@ -710,7 +690,7 @@ static int get_max_column_width(struct rvu *rvu)</div><div class='ctx'> </div><div class='ctx'> 	for (pf = 0; pf &lt; rvu-&gt;hw-&gt;total_pfs; pf++) {</div><div class='ctx'> 		for (vf = 0; vf &lt;= rvu-&gt;hw-&gt;total_vfs; vf++) {</div><div class='del'>-			pcifunc = pf &lt;&lt; 10 | vf;</div><div class='add'>+			pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, vf);</div><div class='ctx'> 			if (!pcifunc)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='hunk'>@@ -781,7 +761,7 @@ static ssize_t rvu_dbg_rsrc_attach_status(struct file *filp,</div><div class='ctx'> 		for (vf = 0; vf &lt;= rvu-&gt;hw-&gt;total_vfs; vf++) {</div><div class='ctx'> 			off = 0;</div><div class='ctx'> 			flag = 0;</div><div class='del'>-			pcifunc = pf &lt;&lt; 10 | vf;</div><div class='add'>+			pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, vf);</div><div class='ctx'> 			if (!pcifunc)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='hunk'>@@ -864,7 +844,7 @@ static int rvu_dbg_rvu_pf_cgx_map_display(struct seq_file *filp, void *unused)</div><div class='ctx'> </div><div class='ctx'> 		cgx[0] = 0;</div><div class='ctx'> 		lmac[0] = 0;</div><div class='del'>-		pcifunc = pf &lt;&lt; 10;</div><div class='add'>+		pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, 0);</div><div class='ctx'> 		pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='ctx'> </div><div class='ctx'> 		if (pfvf-&gt;nix_blkaddr == BLKADDR_NIX0)</div><div class='hunk'>@@ -889,6 +869,71 @@ static int rvu_dbg_rvu_pf_cgx_map_display(struct seq_file *filp, void *unused)</div><div class='ctx'> </div><div class='ctx'> RVU_DEBUG_SEQ_FOPS(rvu_pf_cgx_map, rvu_pf_cgx_map_display, NULL);</div><div class='ctx'> </div><div class='add'>+static int rvu_dbg_rvu_fwdata_display(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	struct rvu *rvu = s-&gt;private;</div><div class='add'>+	struct rvu_fwdata *fwdata;</div><div class='add'>+	u8 mac[ETH_ALEN];</div><div class='add'>+	int count = 0, i;</div><div class='add'>+</div><div class='add'>+	if (!rvu-&gt;fwdata)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	fwdata = rvu-&gt;fwdata;</div><div class='add'>+	seq_puts(s, "\nRVU Firmware Data:\n");</div><div class='add'>+	seq_puts(s, "\n\t\tPTP INFORMATION\n");</div><div class='add'>+	seq_puts(s, "\t\t===============\n");</div><div class='add'>+	seq_printf(s, "\t\texternal clockrate \t :%x\n",</div><div class='add'>+		   fwdata-&gt;ptp_ext_clk_rate);</div><div class='add'>+	seq_printf(s, "\t\texternal timestamp \t :%x\n",</div><div class='add'>+		   fwdata-&gt;ptp_ext_tstamp);</div><div class='add'>+	seq_puts(s, "\n");</div><div class='add'>+</div><div class='add'>+	seq_puts(s, "\n\t\tSDP CHANNEL INFORMATION\n");</div><div class='add'>+	seq_puts(s, "\t\t=======================\n");</div><div class='add'>+	seq_printf(s, "\t\tValid \t\t\t :%x\n", fwdata-&gt;channel_data.valid);</div><div class='add'>+	seq_printf(s, "\t\tNode ID \t\t :%x\n",</div><div class='add'>+		   fwdata-&gt;channel_data.info.node_id);</div><div class='add'>+	seq_printf(s, "\t\tNumber of VFs  \t\t :%x\n",</div><div class='add'>+		   fwdata-&gt;channel_data.info.max_vfs);</div><div class='add'>+	seq_printf(s, "\t\tNumber of PF-Rings \t :%x\n",</div><div class='add'>+		   fwdata-&gt;channel_data.info.num_pf_rings);</div><div class='add'>+	seq_printf(s, "\t\tPF SRN \t\t\t :%x\n",</div><div class='add'>+		   fwdata-&gt;channel_data.info.pf_srn);</div><div class='add'>+	seq_puts(s, "\n");</div><div class='add'>+</div><div class='add'>+	seq_puts(s, "\n\t\tPF-INDEX  MACADDRESS\n");</div><div class='add'>+	seq_puts(s, "\t\t====================\n");</div><div class='add'>+	for (i = 0; i &lt; PF_MACNUM_MAX; i++) {</div><div class='add'>+		u64_to_ether_addr(fwdata-&gt;pf_macs[i], mac);</div><div class='add'>+		if (!is_zero_ether_addr(mac)) {</div><div class='add'>+			seq_printf(s, "\t\t  %d       %pM\n", i, mac);</div><div class='add'>+			count++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!count)</div><div class='add'>+		seq_puts(s, "\t\tNo valid address found\n");</div><div class='add'>+</div><div class='add'>+	seq_puts(s, "\n\t\tVF-INDEX  MACADDRESS\n");</div><div class='add'>+	seq_puts(s, "\t\t====================\n");</div><div class='add'>+	count = 0;</div><div class='add'>+	for (i = 0; i &lt; VF_MACNUM_MAX; i++) {</div><div class='add'>+		u64_to_ether_addr(fwdata-&gt;vf_macs[i], mac);</div><div class='add'>+		if (!is_zero_ether_addr(mac)) {</div><div class='add'>+			seq_printf(s, "\t\t  %d       %pM\n", i, mac);</div><div class='add'>+			count++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!count)</div><div class='add'>+		seq_puts(s, "\t\tNo valid address found\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+RVU_DEBUG_SEQ_FOPS(rvu_fwdata, rvu_fwdata_display, NULL);</div><div class='add'>+</div><div class='ctx'> static bool rvu_dbg_is_valid_lf(struct rvu *rvu, int blkaddr, int lf,</div><div class='ctx'> 				u16 *pcifunc)</div><div class='ctx'> {</div><div class='hunk'>@@ -944,19 +989,18 @@ static void print_npa_qsize(struct seq_file *m, struct rvu_pfvf *pfvf)</div><div class='ctx'> /* The 'qsize' entry dumps current Aura/Pool context Qsize</div><div class='ctx'>  * and each context's current enable/disable status in a bitmap.</div><div class='ctx'>  */</div><div class='del'>-static int rvu_dbg_qsize_display(struct seq_file *filp, void *unsused,</div><div class='add'>+static int rvu_dbg_qsize_display(struct seq_file *s, void *unsused,</div><div class='ctx'> 				 int blktype)</div><div class='ctx'> {</div><div class='del'>-	void (*print_qsize)(struct seq_file *filp,</div><div class='add'>+	void (*print_qsize)(struct seq_file *s,</div><div class='ctx'> 			    struct rvu_pfvf *pfvf) = NULL;</div><div class='del'>-	struct dentry *current_dir;</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='ctx'> 	struct rvu *rvu;</div><div class='ctx'> 	int qsize_id;</div><div class='ctx'> 	u16 pcifunc;</div><div class='ctx'> 	int blkaddr;</div><div class='ctx'> </div><div class='del'>-	rvu = filp-&gt;private;</div><div class='add'>+	rvu = s-&gt;private;</div><div class='ctx'> 	switch (blktype) {</div><div class='ctx'> 	case BLKTYPE_NPA:</div><div class='ctx'> 		qsize_id = rvu-&gt;rvu_dbg.npa_qsize_id;</div><div class='hunk'>@@ -972,32 +1016,28 @@ static int rvu_dbg_qsize_display(struct seq_file *filp, void *unsused,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (blktype == BLKTYPE_NPA) {</div><div class='add'>+	if (blktype == BLKTYPE_NPA)</div><div class='ctx'> 		blkaddr = BLKADDR_NPA;</div><div class='del'>-	} else {</div><div class='del'>-		current_dir = filp-&gt;file-&gt;f_path.dentry-&gt;d_parent;</div><div class='del'>-		blkaddr = (!strcmp(current_dir-&gt;d_name.name, "nix1") ?</div><div class='del'>-				   BLKADDR_NIX1 : BLKADDR_NIX0);</div><div class='del'>-	}</div><div class='add'>+	else</div><div class='add'>+		blkaddr = debugfs_get_aux_num(s-&gt;file);</div><div class='ctx'> </div><div class='ctx'> 	if (!rvu_dbg_is_valid_lf(rvu, blkaddr, qsize_id, &amp;pcifunc))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='del'>-	print_qsize(filp, pfvf);</div><div class='add'>+	print_qsize(s, pfvf);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t rvu_dbg_qsize_write(struct file *filp,</div><div class='add'>+static ssize_t rvu_dbg_qsize_write(struct file *file,</div><div class='ctx'> 				   const char __user *buffer, size_t count,</div><div class='ctx'> 				   loff_t *ppos, int blktype)</div><div class='ctx'> {</div><div class='ctx'> 	char *blk_string = (blktype == BLKTYPE_NPA) ? "npa" : "nix";</div><div class='del'>-	struct seq_file *seqfile = filp-&gt;private_data;</div><div class='add'>+	struct seq_file *seqfile = file-&gt;private_data;</div><div class='ctx'> 	char *cmd_buf, *cmd_buf_tmp, *subtoken;</div><div class='ctx'> 	struct rvu *rvu = seqfile-&gt;private;</div><div class='del'>-	struct dentry *current_dir;</div><div class='ctx'> 	int blkaddr;</div><div class='ctx'> 	u16 pcifunc;</div><div class='ctx'> 	int ret, lf;</div><div class='hunk'>@@ -1023,13 +1063,10 @@ static ssize_t rvu_dbg_qsize_write(struct file *filp,</div><div class='ctx'> 		goto qsize_write_done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (blktype == BLKTYPE_NPA) {</div><div class='add'>+	if (blktype == BLKTYPE_NPA)</div><div class='ctx'> 		blkaddr = BLKADDR_NPA;</div><div class='del'>-	} else {</div><div class='del'>-		current_dir = filp-&gt;f_path.dentry-&gt;d_parent;</div><div class='del'>-		blkaddr = (!strcmp(current_dir-&gt;d_name.name, "nix1") ?</div><div class='del'>-				   BLKADDR_NIX1 : BLKADDR_NIX0);</div><div class='del'>-	}</div><div class='add'>+	else</div><div class='add'>+		blkaddr = debugfs_get_aux_num(file);</div><div class='ctx'> </div><div class='ctx'> 	if (!rvu_dbg_is_valid_lf(rvu, blkaddr, lf, &amp;pcifunc)) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -1066,6 +1103,11 @@ static void print_npa_aura_ctx(struct seq_file *m, struct npa_aq_enq_rsp *rsp)</div><div class='ctx'> 	struct npa_aura_s *aura = &amp;rsp-&gt;aura;</div><div class='ctx'> 	struct rvu *rvu = m-&gt;private;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev)) {</div><div class='add'>+		print_npa_cn20k_aura_ctx(m, (struct npa_cn20k_aq_enq_rsp *)rsp);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	seq_printf(m, "W0: Pool addr\t\t%llx\n", aura-&gt;pool_addr);</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "W1: ena\t\t\t%d\nW1: pool caching\t%d\n",</div><div class='hunk'>@@ -1114,6 +1156,11 @@ static void print_npa_pool_ctx(struct seq_file *m, struct npa_aq_enq_rsp *rsp)</div><div class='ctx'> 	struct npa_pool_s *pool = &amp;rsp-&gt;pool;</div><div class='ctx'> 	struct rvu *rvu = m-&gt;private;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev)) {</div><div class='add'>+		print_npa_cn20k_pool_ctx(m, (struct npa_cn20k_aq_enq_rsp *)rsp);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	seq_printf(m, "W0: Stack base\t\t%llx\n", pool-&gt;stack_base);</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "W1: ena \t\t%d\nW1: nat_align \t\t%d\n",</div><div class='hunk'>@@ -1616,6 +1663,9 @@ static void print_tm_tree(struct seq_file *m,</div><div class='ctx'> 	int blkaddr;</div><div class='ctx'> 	u64 cfg;</div><div class='ctx'> </div><div class='add'>+	if (!sq_ctx-&gt;ena)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	blkaddr = nix_hw-&gt;blkaddr;</div><div class='ctx'> 	schq = sq_ctx-&gt;smq;</div><div class='ctx'> </div><div class='hunk'>@@ -1974,10 +2024,16 @@ static void print_nix_sq_ctx(struct seq_file *m, struct nix_aq_enq_rsp *rsp)</div><div class='ctx'> 	struct nix_hw *nix_hw = m-&gt;private;</div><div class='ctx'> 	struct rvu *rvu = nix_hw-&gt;rvu;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev)) {</div><div class='add'>+		print_nix_cn20k_sq_ctx(m, (struct nix_cn20k_sq_ctx_s *)sq_ctx);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!is_rvu_otx2(rvu)) {</div><div class='ctx'> 		print_nix_cn10k_sq_ctx(m, (struct nix_cn10k_sq_ctx_s *)sq_ctx);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	seq_printf(m, "W0: sqe_way_mask \t\t%d\nW0: cq \t\t\t\t%d\n",</div><div class='ctx'> 		   sq_ctx-&gt;sqe_way_mask, sq_ctx-&gt;cq);</div><div class='ctx'> 	seq_printf(m, "W0: sdp_mcast \t\t\t%d\nW0: substream \t\t\t0x%03x\n",</div><div class='hunk'>@@ -2068,7 +2124,9 @@ static void print_nix_cn10k_rq_ctx(struct seq_file *m,</div><div class='ctx'> 	seq_printf(m, "W1: ipsecd_drop_ena \t\t%d\nW1: chi_ena \t\t\t%d\n\n",</div><div class='ctx'> 		   rq_ctx-&gt;ipsecd_drop_ena, rq_ctx-&gt;chi_ena);</div><div class='ctx'> </div><div class='del'>-	seq_printf(m, "W2: band_prof_id \t\t%d\n", rq_ctx-&gt;band_prof_id);</div><div class='add'>+	seq_printf(m, "W2: band_prof_id \t\t%d\n",</div><div class='add'>+		   (u16)rq_ctx-&gt;band_prof_id_h &lt;&lt; 10 | rq_ctx-&gt;band_prof_id);</div><div class='add'>+</div><div class='ctx'> 	seq_printf(m, "W2: policer_ena \t\t%d\n", rq_ctx-&gt;policer_ena);</div><div class='ctx'> 	seq_printf(m, "W2: spb_sizem1 \t\t\t%d\n", rq_ctx-&gt;spb_sizem1);</div><div class='ctx'> 	seq_printf(m, "W2: wqe_skip \t\t\t%d\nW2: sqb_ena \t\t\t%d\n",</div><div class='hunk'>@@ -2190,6 +2248,11 @@ static void print_nix_cq_ctx(struct seq_file *m, struct nix_aq_enq_rsp *rsp)</div><div class='ctx'> 	struct nix_hw *nix_hw = m-&gt;private;</div><div class='ctx'> 	struct rvu *rvu = nix_hw-&gt;rvu;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev)) {</div><div class='add'>+		print_nix_cn20k_cq_ctx(m, (struct nix_cn20k_aq_enq_rsp *)rsp);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	seq_printf(m, "W0: base \t\t\t%llx\n\n", cq_ctx-&gt;base);</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "W1: wrptr \t\t\t%llx\n", (u64)cq_ctx-&gt;wrptr);</div><div class='hunk'>@@ -2219,6 +2282,7 @@ static void print_nix_cq_ctx(struct seq_file *m, struct nix_aq_enq_rsp *rsp)</div><div class='ctx'> 		   cq_ctx-&gt;cq_err_int_ena, cq_ctx-&gt;cq_err_int);</div><div class='ctx'> 	seq_printf(m, "W3: qsize \t\t\t%d\nW3:caching \t\t\t%d\n",</div><div class='ctx'> 		   cq_ctx-&gt;qsize, cq_ctx-&gt;caching);</div><div class='add'>+</div><div class='ctx'> 	seq_printf(m, "W3: substream \t\t\t0x%03x\nW3: ena \t\t\t%d\n",</div><div class='ctx'> 		   cq_ctx-&gt;substream, cq_ctx-&gt;ena);</div><div class='ctx'> 	if (!is_rvu_otx2(rvu)) {</div><div class='hunk'>@@ -2580,7 +2644,10 @@ static void print_band_prof_ctx(struct seq_file *m,</div><div class='ctx'> 		(prof-&gt;rc_action == 1) ? "DROP" : "RED";</div><div class='ctx'> 	seq_printf(m, "W1: rc_action\t\t%s\n", str);</div><div class='ctx'> 	seq_printf(m, "W1: meter_algo\t\t%d\n", prof-&gt;meter_algo);</div><div class='del'>-	seq_printf(m, "W1: band_prof_id\t%d\n", prof-&gt;band_prof_id);</div><div class='add'>+</div><div class='add'>+	seq_printf(m, "W1: band_prof_id\t%d\n",</div><div class='add'>+		   (u16)prof-&gt;band_prof_id_h &lt;&lt; 7 | prof-&gt;band_prof_id);</div><div class='add'>+</div><div class='ctx'> 	seq_printf(m, "W1: hl_en\t\t%d\n", prof-&gt;hl_en);</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(m, "W2: ts\t\t\t%lld\n", (u64)prof-&gt;ts);</div><div class='hunk'>@@ -2653,10 +2720,10 @@ static int rvu_dbg_nix_band_prof_ctx_display(struct seq_file *m, void *unused)</div><div class='ctx'> 			pcifunc = ipolicer-&gt;pfvf_map[idx];</div><div class='ctx'> 			if (!(pcifunc &amp; RVU_PFVF_FUNC_MASK))</div><div class='ctx'> 				seq_printf(m, "Allocated to :: PF %d\n",</div><div class='del'>-					   rvu_get_pf(pcifunc));</div><div class='add'>+					   rvu_get_pf(rvu-&gt;pdev, pcifunc));</div><div class='ctx'> 			else</div><div class='ctx'> 				seq_printf(m, "Allocated to :: PF %d VF %d\n",</div><div class='del'>-					   rvu_get_pf(pcifunc),</div><div class='add'>+					   rvu_get_pf(rvu-&gt;pdev, pcifunc),</div><div class='ctx'> 					   (pcifunc &amp; RVU_PFVF_FUNC_MASK) - 1);</div><div class='ctx'> 			print_band_prof_ctx(m, &amp;aq_rsp.prof);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2731,8 +2798,8 @@ static void rvu_dbg_nix_init(struct rvu *rvu, int blkaddr)</div><div class='ctx'> 			    &amp;rvu_dbg_nix_ndc_tx_hits_miss_fops);</div><div class='ctx'> 	debugfs_create_file("ndc_rx_hits_miss", 0600, rvu-&gt;rvu_dbg.nix, nix_hw,</div><div class='ctx'> 			    &amp;rvu_dbg_nix_ndc_rx_hits_miss_fops);</div><div class='del'>-	debugfs_create_file("qsize", 0600, rvu-&gt;rvu_dbg.nix, rvu,</div><div class='del'>-			    &amp;rvu_dbg_nix_qsize_fops);</div><div class='add'>+	debugfs_create_file_aux_num("qsize", 0600, rvu-&gt;rvu_dbg.nix, rvu,</div><div class='add'>+			    blkaddr, &amp;rvu_dbg_nix_qsize_fops);</div><div class='ctx'> 	debugfs_create_file("ingress_policer_ctx", 0600, rvu-&gt;rvu_dbg.nix, nix_hw,</div><div class='ctx'> 			    &amp;rvu_dbg_nix_band_prof_ctx_fops);</div><div class='ctx'> 	debugfs_create_file("ingress_policer_rsrc", 0600, rvu-&gt;rvu_dbg.nix, nix_hw,</div><div class='hunk'>@@ -2749,6 +2816,9 @@ static void rvu_dbg_npa_init(struct rvu *rvu)</div><div class='ctx'> 			    &amp;rvu_dbg_npa_aura_ctx_fops);</div><div class='ctx'> 	debugfs_create_file("pool_ctx", 0600, rvu-&gt;rvu_dbg.npa, rvu,</div><div class='ctx'> 			    &amp;rvu_dbg_npa_pool_ctx_fops);</div><div class='add'>+</div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev)) /* NDC not appliable for cn20k */</div><div class='add'>+		return;</div><div class='ctx'> 	debugfs_create_file("ndc_cache", 0600, rvu-&gt;rvu_dbg.npa, rvu,</div><div class='ctx'> 			    &amp;rvu_dbg_npa_ndc_cache_fops);</div><div class='ctx'> 	debugfs_create_file("ndc_hits_miss", 0600, rvu-&gt;rvu_dbg.npa, rvu,</div><div class='hunk'>@@ -2881,28 +2951,14 @@ static int cgx_print_stats(struct seq_file *s, int lmac_id)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rvu_dbg_derive_lmacid(struct seq_file *filp, int *lmac_id)</div><div class='add'>+static int rvu_dbg_derive_lmacid(struct seq_file *s)</div><div class='ctx'> {</div><div class='del'>-	struct dentry *current_dir;</div><div class='del'>-	char *buf;</div><div class='del'>-</div><div class='del'>-	current_dir = filp-&gt;file-&gt;f_path.dentry-&gt;d_parent;</div><div class='del'>-	buf = strrchr(current_dir-&gt;d_name.name, 'c');</div><div class='del'>-	if (!buf)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return kstrtoint(buf + 1, 10, lmac_id);</div><div class='add'>+	return debugfs_get_aux_num(s-&gt;file);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rvu_dbg_cgx_stat_display(struct seq_file *filp, void *unused)</div><div class='add'>+static int rvu_dbg_cgx_stat_display(struct seq_file *s, void *unused)</div><div class='ctx'> {</div><div class='del'>-	int lmac_id, err;</div><div class='del'>-</div><div class='del'>-	err = rvu_dbg_derive_lmacid(filp, &amp;lmac_id);</div><div class='del'>-	if (!err)</div><div class='del'>-		return cgx_print_stats(filp, lmac_id);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	return cgx_print_stats(s, rvu_dbg_derive_lmacid(s));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> RVU_DEBUG_SEQ_FOPS(cgx_stat, cgx_stat_display, NULL);</div><div class='hunk'>@@ -2960,18 +3016,103 @@ static int cgx_print_dmac_flt(struct seq_file *s, int lmac_id)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rvu_dbg_cgx_dmac_flt_display(struct seq_file *filp, void *unused)</div><div class='add'>+static int rvu_dbg_cgx_dmac_flt_display(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	return cgx_print_dmac_flt(s, rvu_dbg_derive_lmacid(s));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+RVU_DEBUG_SEQ_FOPS(cgx_dmac_flt, cgx_dmac_flt_display, NULL);</div><div class='add'>+</div><div class='add'>+static int cgx_print_fwdata(struct seq_file *s, int lmac_id)</div><div class='ctx'> {</div><div class='del'>-	int err, lmac_id;</div><div class='add'>+	struct cgx_lmac_fwdata_s *fwdata;</div><div class='add'>+	void *cgxd = s-&gt;private;</div><div class='add'>+	struct phy_s *phy;</div><div class='add'>+	struct rvu *rvu;</div><div class='add'>+	int cgx_id, i;</div><div class='add'>+</div><div class='add'>+	rvu = pci_get_drvdata(pci_get_device(PCI_VENDOR_ID_CAVIUM,</div><div class='add'>+					     PCI_DEVID_OCTEONTX2_RVU_AF, NULL));</div><div class='add'>+	if (!rvu)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	err = rvu_dbg_derive_lmacid(filp, &amp;lmac_id);</div><div class='del'>-	if (!err)</div><div class='del'>-		return cgx_print_dmac_flt(filp, lmac_id);</div><div class='add'>+	if (!rvu-&gt;fwdata)</div><div class='add'>+		return -EAGAIN;</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	cgx_id = cgx_get_cgxid(cgxd);</div><div class='add'>+</div><div class='add'>+	if (rvu-&gt;hw-&gt;lmac_per_cgx == CGX_LMACS_USX)</div><div class='add'>+		fwdata =  &amp;rvu-&gt;fwdata-&gt;cgx_fw_data_usx[cgx_id][lmac_id];</div><div class='add'>+	else</div><div class='add'>+		fwdata =  &amp;rvu-&gt;fwdata-&gt;cgx_fw_data[cgx_id][lmac_id];</div><div class='add'>+</div><div class='add'>+	seq_puts(s, "\nFIRMWARE SHARED:\n");</div><div class='add'>+	seq_puts(s, "\t\tSUPPORTED LINK INFORMATION\t\t\n");</div><div class='add'>+	seq_puts(s, "\t\t==========================\n");</div><div class='add'>+	seq_printf(s, "\t\t Link modes \t\t :%llx\n",</div><div class='add'>+		   fwdata-&gt;supported_link_modes);</div><div class='add'>+	seq_printf(s, "\t\t Autoneg \t\t :%llx\n", fwdata-&gt;supported_an);</div><div class='add'>+	seq_printf(s, "\t\t FEC \t\t\t :%llx\n", fwdata-&gt;supported_fec);</div><div class='add'>+	seq_puts(s, "\n");</div><div class='add'>+</div><div class='add'>+	seq_puts(s, "\t\tADVERTISED LINK INFORMATION\t\t\n");</div><div class='add'>+	seq_puts(s, "\t\t==========================\n");</div><div class='add'>+	seq_printf(s, "\t\t Link modes \t\t :%llx\n",</div><div class='add'>+		   (u64)fwdata-&gt;advertised_link_modes);</div><div class='add'>+	seq_printf(s, "\t\t Autoneg \t\t :%x\n", fwdata-&gt;advertised_an);</div><div class='add'>+	seq_printf(s, "\t\t FEC \t\t\t :%llx\n", fwdata-&gt;advertised_fec);</div><div class='add'>+	seq_puts(s, "\n");</div><div class='add'>+</div><div class='add'>+	seq_puts(s, "\t\tLMAC CONFIG\t\t\n");</div><div class='add'>+	seq_puts(s, "\t\t============\n");</div><div class='add'>+	seq_printf(s, "\t\t rw_valid  \t\t :%x\n",  fwdata-&gt;rw_valid);</div><div class='add'>+	seq_printf(s, "\t\t lmac_type \t\t :%x\n", fwdata-&gt;lmac_type);</div><div class='add'>+	seq_printf(s, "\t\t portm_idx \t\t :%x\n", fwdata-&gt;portm_idx);</div><div class='add'>+	seq_printf(s, "\t\t mgmt_port \t\t :%x\n", fwdata-&gt;mgmt_port);</div><div class='add'>+	seq_printf(s, "\t\t Link modes own \t :%llx\n",</div><div class='add'>+		   (u64)fwdata-&gt;advertised_link_modes_own);</div><div class='add'>+	seq_puts(s, "\n");</div><div class='add'>+</div><div class='add'>+	seq_puts(s, "\n\t\tEEPROM DATA\n");</div><div class='add'>+	seq_puts(s, "\t\t===========\n");</div><div class='add'>+	seq_printf(s, "\t\t sff_id \t\t :%x\n", fwdata-&gt;sfp_eeprom.sff_id);</div><div class='add'>+	seq_puts(s, "\t\t data \t\t\t :\n");</div><div class='add'>+	seq_puts(s, "\t\t");</div><div class='add'>+	for (i = 0; i &lt; SFP_EEPROM_SIZE; i++) {</div><div class='add'>+		seq_printf(s, "%x", fwdata-&gt;sfp_eeprom.buf[i]);</div><div class='add'>+		if ((i + 1) % 16 == 0) {</div><div class='add'>+			seq_puts(s, "\n");</div><div class='add'>+			seq_puts(s, "\t\t");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	seq_puts(s, "\n");</div><div class='add'>+</div><div class='add'>+	phy = &amp;fwdata-&gt;phy;</div><div class='add'>+	seq_puts(s, "\n\t\tPHY INFORMATION\n");</div><div class='add'>+	seq_puts(s, "\t\t===============\n");</div><div class='add'>+	seq_printf(s, "\t\t Mod type configurable \t\t :%x\n",</div><div class='add'>+		   phy-&gt;misc.can_change_mod_type);</div><div class='add'>+	seq_printf(s, "\t\t Mod type \t\t\t :%x\n", phy-&gt;misc.mod_type);</div><div class='add'>+	seq_printf(s, "\t\t Support FEC \t\t\t :%x\n", phy-&gt;misc.has_fec_stats);</div><div class='add'>+	seq_printf(s, "\t\t RSFEC corrected words \t\t :%x\n",</div><div class='add'>+		   phy-&gt;fec_stats.rsfec_corr_cws);</div><div class='add'>+	seq_printf(s, "\t\t RSFEC uncorrected words \t :%x\n",</div><div class='add'>+		   phy-&gt;fec_stats.rsfec_uncorr_cws);</div><div class='add'>+	seq_printf(s, "\t\t BRFEC corrected words \t\t :%x\n",</div><div class='add'>+		   phy-&gt;fec_stats.brfec_corr_blks);</div><div class='add'>+	seq_printf(s, "\t\t BRFEC uncorrected words \t :%x\n",</div><div class='add'>+		   phy-&gt;fec_stats.brfec_uncorr_blks);</div><div class='add'>+	seq_puts(s, "\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-RVU_DEBUG_SEQ_FOPS(cgx_dmac_flt, cgx_dmac_flt_display, NULL);</div><div class='add'>+static int rvu_dbg_cgx_fwdata_display(struct seq_file *s, void *unused)</div><div class='add'>+{</div><div class='add'>+	return cgx_print_fwdata(s, rvu_dbg_derive_lmacid(s));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+RVU_DEBUG_SEQ_FOPS(cgx_fwdata, cgx_fwdata_display, NULL);</div><div class='ctx'> </div><div class='ctx'> static void rvu_dbg_cgx_init(struct rvu *rvu)</div><div class='ctx'> {</div><div class='hunk'>@@ -3007,11 +3148,14 @@ static void rvu_dbg_cgx_init(struct rvu *rvu)</div><div class='ctx'> 			rvu-&gt;rvu_dbg.lmac =</div><div class='ctx'> 				debugfs_create_dir(dname, rvu-&gt;rvu_dbg.cgx);</div><div class='ctx'> </div><div class='del'>-			debugfs_create_file("stats", 0600, rvu-&gt;rvu_dbg.lmac,</div><div class='del'>-					    cgx, &amp;rvu_dbg_cgx_stat_fops);</div><div class='del'>-			debugfs_create_file("mac_filter", 0600,</div><div class='del'>-					    rvu-&gt;rvu_dbg.lmac, cgx,</div><div class='add'>+			debugfs_create_file_aux_num("stats", 0600, rvu-&gt;rvu_dbg.lmac,</div><div class='add'>+					    cgx, lmac_id, &amp;rvu_dbg_cgx_stat_fops);</div><div class='add'>+			debugfs_create_file_aux_num("mac_filter", 0600,</div><div class='add'>+					    rvu-&gt;rvu_dbg.lmac, cgx, lmac_id,</div><div class='ctx'> 					    &amp;rvu_dbg_cgx_dmac_flt_fops);</div><div class='add'>+			debugfs_create_file("fwdata", 0600,</div><div class='add'>+					    rvu-&gt;rvu_dbg.lmac, cgx,</div><div class='add'>+					    &amp;rvu_dbg_cgx_fwdata_fops);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -3033,10 +3177,10 @@ static void rvu_print_npc_mcam_info(struct seq_file *s,</div><div class='ctx'> </div><div class='ctx'> 	if (!(pcifunc &amp; RVU_PFVF_FUNC_MASK))</div><div class='ctx'> 		seq_printf(s, "\n\t\t Device \t\t: PF%d\n",</div><div class='del'>-			   rvu_get_pf(pcifunc));</div><div class='add'>+			   rvu_get_pf(rvu-&gt;pdev, pcifunc));</div><div class='ctx'> 	else</div><div class='ctx'> 		seq_printf(s, "\n\t\t Device \t\t: PF%d VF%d\n",</div><div class='del'>-			   rvu_get_pf(pcifunc),</div><div class='add'>+			   rvu_get_pf(rvu-&gt;pdev, pcifunc),</div><div class='ctx'> 			   (pcifunc &amp; RVU_PFVF_FUNC_MASK) - 1);</div><div class='ctx'> </div><div class='ctx'> 	if (entry_acnt) {</div><div class='hunk'>@@ -3099,13 +3243,13 @@ static int rvu_dbg_npc_mcam_info_display(struct seq_file *filp, void *unsued)</div><div class='ctx'> 	seq_puts(filp, "\n\t\t Current allocation\n");</div><div class='ctx'> 	seq_puts(filp, "\t\t====================\n");</div><div class='ctx'> 	for (pf = 0; pf &lt; rvu-&gt;hw-&gt;total_pfs; pf++) {</div><div class='del'>-		pcifunc = (pf &lt;&lt; RVU_PFVF_PF_SHIFT);</div><div class='add'>+		pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, 0);</div><div class='ctx'> 		rvu_print_npc_mcam_info(filp, pcifunc, blkaddr);</div><div class='ctx'> </div><div class='ctx'> 		cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf));</div><div class='ctx'> 		numvfs = (cfg &gt;&gt; 12) &amp; 0xFF;</div><div class='ctx'> 		for (vf = 0; vf &lt; numvfs; vf++) {</div><div class='del'>-			pcifunc = (pf &lt;&lt; RVU_PFVF_PF_SHIFT) | (vf + 1);</div><div class='add'>+			pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, (vf + 1));</div><div class='ctx'> 			rvu_print_npc_mcam_info(filp, pcifunc, blkaddr);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3376,7 +3520,7 @@ static int rvu_dbg_npc_mcam_show_rules(struct seq_file *s, void *unused)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mcam-&gt;lock);</div><div class='ctx'> 	list_for_each_entry(iter, &amp;mcam-&gt;mcam_rules, list) {</div><div class='del'>-		pf = (iter-&gt;owner &gt;&gt; RVU_PFVF_PF_SHIFT) &amp; RVU_PFVF_PF_MASK;</div><div class='add'>+		pf = rvu_get_pf(rvu-&gt;pdev, iter-&gt;owner);</div><div class='ctx'> 		seq_printf(s, "\n\tInstalled by: PF%d ", pf);</div><div class='ctx'> </div><div class='ctx'> 		if (iter-&gt;owner &amp; RVU_PFVF_FUNC_MASK) {</div><div class='hunk'>@@ -3394,7 +3538,7 @@ static int rvu_dbg_npc_mcam_show_rules(struct seq_file *s, void *unused)</div><div class='ctx'> 		rvu_dbg_npc_mcam_show_flows(s, iter);</div><div class='ctx'> 		if (is_npc_intf_rx(iter-&gt;intf)) {</div><div class='ctx'> 			target = iter-&gt;rx_action.pf_func;</div><div class='del'>-			pf = (target &gt;&gt; RVU_PFVF_PF_SHIFT) &amp; RVU_PFVF_PF_MASK;</div><div class='add'>+			pf = rvu_get_pf(rvu-&gt;pdev, target);</div><div class='ctx'> 			seq_printf(s, "\tForward to: PF%d ", pf);</div><div class='ctx'> </div><div class='ctx'> 			if (target &amp; RVU_PFVF_FUNC_MASK) {</div><div class='hunk'>@@ -3841,6 +3985,9 @@ static void rvu_dbg_cpt_init(struct rvu *rvu, int blkaddr)</div><div class='ctx'> </div><div class='ctx'> static const char *rvu_get_dbg_dir_name(struct rvu *rvu)</div><div class='ctx'> {</div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		return "cn20k";</div><div class='add'>+</div><div class='ctx'> 	if (!is_rvu_otx2(rvu))</div><div class='ctx'> 		return "cn10k";</div><div class='ctx'> 	else</div><div class='hunk'>@@ -3858,6 +4005,9 @@ void rvu_dbg_init(struct rvu *rvu)</div><div class='ctx'> 		debugfs_create_file("lmtst_map_table", 0444, rvu-&gt;rvu_dbg.root,</div><div class='ctx'> 				    rvu, &amp;rvu_dbg_lmtst_map_table_fops);</div><div class='ctx'> </div><div class='add'>+	debugfs_create_file("rvu_fwdata", 0444, rvu-&gt;rvu_dbg.root, rvu,</div><div class='add'>+			    &amp;rvu_dbg_rvu_fwdata_fops);</div><div class='add'>+</div><div class='ctx'> 	if (!cgx_get_cgxcnt_max())</div><div class='ctx'> 		goto create;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c<br/>index 7498ab429963..0f9953eaf1b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c</a></div><div class='hunk'>@@ -207,7 +207,7 @@ static void rvu_nix_unregister_interrupts(struct rvu *rvu)</div><div class='ctx'> 		rvu-&gt;irq_allocated[offs + NIX_AF_INT_VEC_RVU] = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = NIX_AF_INT_VEC_AF_ERR; i &lt; NIX_AF_INT_VEC_CNT; i++)</div><div class='add'>+	for (i = NIX_AF_INT_VEC_GEN; i &lt; NIX_AF_INT_VEC_CNT; i++)</div><div class='ctx'> 		if (rvu-&gt;irq_allocated[offs + i]) {</div><div class='ctx'> 			free_irq(pci_irq_vector(rvu-&gt;pdev, offs + i), rvu_dl);</div><div class='ctx'> 			rvu-&gt;irq_allocated[offs + i] = false;</div><div class='hunk'>@@ -505,7 +505,9 @@ static int rvu_nix_register_reporters(struct rvu_devlink *rvu_dl)</div><div class='ctx'> </div><div class='ctx'> 	rvu_reporters-&gt;nix_event_ctx = nix_event_context;</div><div class='ctx'> 	rvu_reporters-&gt;rvu_hw_nix_intr_reporter =</div><div class='del'>-		devlink_health_reporter_create(rvu_dl-&gt;dl, &amp;rvu_hw_nix_intr_reporter_ops, 0, rvu);</div><div class='add'>+		devlink_health_reporter_create(rvu_dl-&gt;dl,</div><div class='add'>+					       &amp;rvu_hw_nix_intr_reporter_ops,</div><div class='add'>+					       rvu);</div><div class='ctx'> 	if (IS_ERR(rvu_reporters-&gt;rvu_hw_nix_intr_reporter)) {</div><div class='ctx'> 		dev_warn(rvu-&gt;dev, "Failed to create hw_nix_intr reporter, err=%ld\n",</div><div class='ctx'> 			 PTR_ERR(rvu_reporters-&gt;rvu_hw_nix_intr_reporter));</div><div class='hunk'>@@ -513,7 +515,9 @@ static int rvu_nix_register_reporters(struct rvu_devlink *rvu_dl)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rvu_reporters-&gt;rvu_hw_nix_gen_reporter =</div><div class='del'>-		devlink_health_reporter_create(rvu_dl-&gt;dl, &amp;rvu_hw_nix_gen_reporter_ops, 0, rvu);</div><div class='add'>+		devlink_health_reporter_create(rvu_dl-&gt;dl,</div><div class='add'>+					       &amp;rvu_hw_nix_gen_reporter_ops,</div><div class='add'>+					       rvu);</div><div class='ctx'> 	if (IS_ERR(rvu_reporters-&gt;rvu_hw_nix_gen_reporter)) {</div><div class='ctx'> 		dev_warn(rvu-&gt;dev, "Failed to create hw_nix_gen reporter, err=%ld\n",</div><div class='ctx'> 			 PTR_ERR(rvu_reporters-&gt;rvu_hw_nix_gen_reporter));</div><div class='hunk'>@@ -521,7 +525,9 @@ static int rvu_nix_register_reporters(struct rvu_devlink *rvu_dl)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rvu_reporters-&gt;rvu_hw_nix_err_reporter =</div><div class='del'>-		devlink_health_reporter_create(rvu_dl-&gt;dl, &amp;rvu_hw_nix_err_reporter_ops, 0, rvu);</div><div class='add'>+		devlink_health_reporter_create(rvu_dl-&gt;dl,</div><div class='add'>+					       &amp;rvu_hw_nix_err_reporter_ops,</div><div class='add'>+					       rvu);</div><div class='ctx'> 	if (IS_ERR(rvu_reporters-&gt;rvu_hw_nix_err_reporter)) {</div><div class='ctx'> 		dev_warn(rvu-&gt;dev, "Failed to create hw_nix_err reporter, err=%ld\n",</div><div class='ctx'> 			 PTR_ERR(rvu_reporters-&gt;rvu_hw_nix_err_reporter));</div><div class='hunk'>@@ -529,7 +535,9 @@ static int rvu_nix_register_reporters(struct rvu_devlink *rvu_dl)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rvu_reporters-&gt;rvu_hw_nix_ras_reporter =</div><div class='del'>-		devlink_health_reporter_create(rvu_dl-&gt;dl, &amp;rvu_hw_nix_ras_reporter_ops, 0, rvu);</div><div class='add'>+		devlink_health_reporter_create(rvu_dl-&gt;dl,</div><div class='add'>+					       &amp;rvu_hw_nix_ras_reporter_ops,</div><div class='add'>+					       rvu);</div><div class='ctx'> 	if (IS_ERR(rvu_reporters-&gt;rvu_hw_nix_ras_reporter)) {</div><div class='ctx'> 		dev_warn(rvu-&gt;dev, "Failed to create hw_nix_ras reporter, err=%ld\n",</div><div class='ctx'> 			 PTR_ERR(rvu_reporters-&gt;rvu_hw_nix_ras_reporter));</div><div class='hunk'>@@ -1051,7 +1059,9 @@ static int rvu_npa_register_reporters(struct rvu_devlink *rvu_dl)</div><div class='ctx'> </div><div class='ctx'> 	rvu_reporters-&gt;npa_event_ctx = npa_event_context;</div><div class='ctx'> 	rvu_reporters-&gt;rvu_hw_npa_intr_reporter =</div><div class='del'>-		devlink_health_reporter_create(rvu_dl-&gt;dl, &amp;rvu_hw_npa_intr_reporter_ops, 0, rvu);</div><div class='add'>+		devlink_health_reporter_create(rvu_dl-&gt;dl,</div><div class='add'>+					       &amp;rvu_hw_npa_intr_reporter_ops,</div><div class='add'>+					       rvu);</div><div class='ctx'> 	if (IS_ERR(rvu_reporters-&gt;rvu_hw_npa_intr_reporter)) {</div><div class='ctx'> 		dev_warn(rvu-&gt;dev, "Failed to create hw_npa_intr reporter, err=%ld\n",</div><div class='ctx'> 			 PTR_ERR(rvu_reporters-&gt;rvu_hw_npa_intr_reporter));</div><div class='hunk'>@@ -1059,7 +1069,9 @@ static int rvu_npa_register_reporters(struct rvu_devlink *rvu_dl)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rvu_reporters-&gt;rvu_hw_npa_gen_reporter =</div><div class='del'>-		devlink_health_reporter_create(rvu_dl-&gt;dl, &amp;rvu_hw_npa_gen_reporter_ops, 0, rvu);</div><div class='add'>+		devlink_health_reporter_create(rvu_dl-&gt;dl,</div><div class='add'>+					       &amp;rvu_hw_npa_gen_reporter_ops,</div><div class='add'>+					       rvu);</div><div class='ctx'> 	if (IS_ERR(rvu_reporters-&gt;rvu_hw_npa_gen_reporter)) {</div><div class='ctx'> 		dev_warn(rvu-&gt;dev, "Failed to create hw_npa_gen reporter, err=%ld\n",</div><div class='ctx'> 			 PTR_ERR(rvu_reporters-&gt;rvu_hw_npa_gen_reporter));</div><div class='hunk'>@@ -1067,7 +1079,9 @@ static int rvu_npa_register_reporters(struct rvu_devlink *rvu_dl)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rvu_reporters-&gt;rvu_hw_npa_err_reporter =</div><div class='del'>-		devlink_health_reporter_create(rvu_dl-&gt;dl, &amp;rvu_hw_npa_err_reporter_ops, 0, rvu);</div><div class='add'>+		devlink_health_reporter_create(rvu_dl-&gt;dl,</div><div class='add'>+					       &amp;rvu_hw_npa_err_reporter_ops,</div><div class='add'>+					       rvu);</div><div class='ctx'> 	if (IS_ERR(rvu_reporters-&gt;rvu_hw_npa_err_reporter)) {</div><div class='ctx'> 		dev_warn(rvu-&gt;dev, "Failed to create hw_npa_err reporter, err=%ld\n",</div><div class='ctx'> 			 PTR_ERR(rvu_reporters-&gt;rvu_hw_npa_err_reporter));</div><div class='hunk'>@@ -1075,7 +1089,9 @@ static int rvu_npa_register_reporters(struct rvu_devlink *rvu_dl)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rvu_reporters-&gt;rvu_hw_npa_ras_reporter =</div><div class='del'>-		devlink_health_reporter_create(rvu_dl-&gt;dl, &amp;rvu_hw_npa_ras_reporter_ops, 0, rvu);</div><div class='add'>+		devlink_health_reporter_create(rvu_dl-&gt;dl,</div><div class='add'>+					       &amp;rvu_hw_npa_ras_reporter_ops,</div><div class='add'>+					       rvu);</div><div class='ctx'> 	if (IS_ERR(rvu_reporters-&gt;rvu_hw_npa_ras_reporter)) {</div><div class='ctx'> 		dev_warn(rvu-&gt;dev, "Failed to create hw_npa_ras reporter, err=%ld\n",</div><div class='ctx'> 			 PTR_ERR(rvu_reporters-&gt;rvu_hw_npa_ras_reporter));</div><div class='hunk'>@@ -1217,7 +1233,8 @@ static int rvu_af_dl_dwrr_mtu_set(struct devlink *devlink, u32 id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rvu_af_dl_dwrr_mtu_get(struct devlink *devlink, u32 id,</div><div class='del'>-				  struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				  struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_devlink *rvu_dl = devlink_priv(devlink);</div><div class='ctx'> 	struct rvu *rvu = rvu_dl-&gt;rvu;</div><div class='hunk'>@@ -1238,11 +1255,13 @@ enum rvu_af_dl_param_id {</div><div class='ctx'> 	RVU_AF_DEVLINK_PARAM_ID_DWRR_MTU,</div><div class='ctx'> 	RVU_AF_DEVLINK_PARAM_ID_NPC_MCAM_ZONE_PERCENT,</div><div class='ctx'> 	RVU_AF_DEVLINK_PARAM_ID_NPC_EXACT_FEATURE_DISABLE,</div><div class='add'>+	RVU_AF_DEVLINK_PARAM_ID_NPC_DEF_RULE_CNTR_ENABLE,</div><div class='ctx'> 	RVU_AF_DEVLINK_PARAM_ID_NIX_MAXLF,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int rvu_af_npc_exact_feature_get(struct devlink *devlink, u32 id,</div><div class='del'>-					struct devlink_param_gset_ctx *ctx)</div><div class='add'>+					struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_devlink *rvu_dl = devlink_priv(devlink);</div><div class='ctx'> 	struct rvu *rvu = rvu_dl-&gt;rvu;</div><div class='hunk'>@@ -1297,7 +1316,8 @@ static int rvu_af_npc_exact_feature_validate(struct devlink *devlink, u32 id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rvu_af_dl_npc_mcam_high_zone_percent_get(struct devlink *devlink, u32 id,</div><div class='del'>-						    struct devlink_param_gset_ctx *ctx)</div><div class='add'>+						    struct devlink_param_gset_ctx *ctx,</div><div class='add'>+						    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_devlink *rvu_dl = devlink_priv(devlink);</div><div class='ctx'> 	struct rvu *rvu = rvu_dl-&gt;rvu;</div><div class='hunk'>@@ -1358,8 +1378,36 @@ static int rvu_af_dl_npc_mcam_high_zone_percent_validate(struct devlink *devlink</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rvu_af_dl_npc_def_rule_cntr_get(struct devlink *devlink, u32 id,</div><div class='add'>+					   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct rvu_devlink *rvu_dl = devlink_priv(devlink);</div><div class='add'>+	struct rvu *rvu = rvu_dl-&gt;rvu;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;val.vbool = rvu-&gt;def_rule_cntr_en;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_af_dl_npc_def_rule_cntr_set(struct devlink *devlink, u32 id,</div><div class='add'>+					   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct rvu_devlink *rvu_dl = devlink_priv(devlink);</div><div class='add'>+	struct rvu *rvu = rvu_dl-&gt;rvu;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = npc_config_cntr_default_entries(rvu, ctx-&gt;val.vbool);</div><div class='add'>+	if (!err)</div><div class='add'>+		rvu-&gt;def_rule_cntr_en = ctx-&gt;val.vbool;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rvu_af_dl_nix_maxlf_get(struct devlink *devlink, u32 id,</div><div class='del'>-				   struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_devlink *rvu_dl = devlink_priv(devlink);</div><div class='ctx'> 	struct rvu *rvu = rvu_dl-&gt;rvu;</div><div class='hunk'>@@ -1444,6 +1492,11 @@ static const struct devlink_param rvu_af_dl_params[] = {</div><div class='ctx'> 			     rvu_af_dl_npc_mcam_high_zone_percent_get,</div><div class='ctx'> 			     rvu_af_dl_npc_mcam_high_zone_percent_set,</div><div class='ctx'> 			     rvu_af_dl_npc_mcam_high_zone_percent_validate),</div><div class='add'>+	DEVLINK_PARAM_DRIVER(RVU_AF_DEVLINK_PARAM_ID_NPC_DEF_RULE_CNTR_ENABLE,</div><div class='add'>+			     "npc_def_rule_cntr", DEVLINK_PARAM_TYPE_BOOL,</div><div class='add'>+			     BIT(DEVLINK_PARAM_CMODE_RUNTIME),</div><div class='add'>+			     rvu_af_dl_npc_def_rule_cntr_get,</div><div class='add'>+			     rvu_af_dl_npc_def_rule_cntr_set, NULL),</div><div class='ctx'> 	DEVLINK_PARAM_DRIVER(RVU_AF_DEVLINK_PARAM_ID_NIX_MAXLF,</div><div class='ctx'> 			     "nix_maxlf", DEVLINK_PARAM_TYPE_U16,</div><div class='ctx'> 			     BIT(DEVLINK_PARAM_CMODE_RUNTIME),</div><div class='hunk'>@@ -1468,6 +1521,9 @@ static int rvu_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode)</div><div class='ctx'> 	struct rvu *rvu = rvu_dl-&gt;rvu;</div><div class='ctx'> 	struct rvu_switch *rswitch;</div><div class='ctx'> </div><div class='add'>+	if (rvu-&gt;rep_mode)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	rswitch = &amp;rvu-&gt;rswitch;</div><div class='ctx'> 	*mode = rswitch-&gt;mode;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c<br/>index da69350c6f76..2f485a930edd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c</a></div><div class='hunk'>@@ -31,6 +31,7 @@ static int nix_free_all_bandprof(struct rvu *rvu, u16 pcifunc);</div><div class='ctx'> static void nix_clear_ratelimit_aggr(struct rvu *rvu, struct nix_hw *nix_hw,</div><div class='ctx'> 				     u32 leaf_prof);</div><div class='ctx'> static const char *nix_get_ctx_name(int ctype);</div><div class='add'>+static int nix_get_tx_link(struct rvu *rvu, u16 pcifunc);</div><div class='ctx'> </div><div class='ctx'> enum mc_tbl_sz {</div><div class='ctx'> 	MC_TBL_SZ_256,</div><div class='hunk'>@@ -312,7 +313,10 @@ static bool is_valid_txschq(struct rvu *rvu, int blkaddr,</div><div class='ctx'> </div><div class='ctx'> 	/* TLs aggegating traffic are shared across PF and VFs */</div><div class='ctx'> 	if (lvl &gt;= hw-&gt;cap.nix_tx_aggr_lvl) {</div><div class='del'>-		if (rvu_get_pf(map_func) != rvu_get_pf(pcifunc))</div><div class='add'>+		if ((nix_get_tx_link(rvu, map_func) !=</div><div class='add'>+		     nix_get_tx_link(rvu, pcifunc)) &amp;&amp;</div><div class='add'>+		     (rvu_get_pf(rvu-&gt;pdev, map_func) !=</div><div class='add'>+				rvu_get_pf(rvu-&gt;pdev, pcifunc)))</div><div class='ctx'> 			return false;</div><div class='ctx'> 		else</div><div class='ctx'> 			return true;</div><div class='hunk'>@@ -336,7 +340,7 @@ static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf,</div><div class='ctx'> 	bool from_vf;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	pf = rvu_get_pf(pcifunc);</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	if (!is_pf_cgxmapped(rvu, pf) &amp;&amp; type != NIX_INTF_TYPE_LBK &amp;&amp;</div><div class='ctx'> 	    type != NIX_INTF_TYPE_SDP)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -360,7 +364,6 @@ static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf,</div><div class='ctx'> </div><div class='ctx'> 		cgx_set_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id, pkind);</div><div class='ctx'> 		rvu_npc_set_pkind(rvu, pkind, pfvf);</div><div class='del'>-</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NIX_INTF_TYPE_LBK:</div><div class='ctx'> 		vf = (pcifunc &amp; RVU_PFVF_FUNC_MASK) - 1;</div><div class='hunk'>@@ -414,7 +417,7 @@ static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NIX_INTF_TYPE_SDP:</div><div class='ctx'> 		from_vf = !!(pcifunc &amp; RVU_PFVF_FUNC_MASK);</div><div class='del'>-		parent_pf = &amp;rvu-&gt;pf[rvu_get_pf(pcifunc)];</div><div class='add'>+		parent_pf = &amp;rvu-&gt;pf[rvu_get_pf(rvu-&gt;pdev, pcifunc)];</div><div class='ctx'> 		sdp_info = parent_pf-&gt;sdp_info;</div><div class='ctx'> 		if (!sdp_info) {</div><div class='ctx'> 			dev_err(rvu-&gt;dev, "Invalid sdp_info pointer\n");</div><div class='hunk'>@@ -567,9 +570,17 @@ void rvu_nix_flr_free_bpids(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> 	mutex_unlock(&amp;rvu-&gt;rsrc_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu,</div><div class='del'>-				    struct nix_bp_cfg_req *req,</div><div class='del'>-				    struct msg_rsp *rsp)</div><div class='add'>+static u16 nix_get_channel(u16 chan, bool cpt_link)</div><div class='add'>+{</div><div class='add'>+	/* CPT channel for a given link channel is always</div><div class='add'>+	 * assumed to be BIT(11) set in link channel.</div><div class='add'>+	 */</div><div class='add'>+	return cpt_link ? chan | BIT(11) : chan;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nix_bp_disable(struct rvu *rvu,</div><div class='add'>+			  struct nix_bp_cfg_req *req,</div><div class='add'>+			  struct msg_rsp *rsp, bool cpt_link)</div><div class='ctx'> {</div><div class='ctx'> 	u16 pcifunc = req-&gt;hdr.pcifunc;</div><div class='ctx'> 	int blkaddr, pf, type, err;</div><div class='hunk'>@@ -577,13 +588,20 @@ int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu,</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='ctx'> 	struct nix_hw *nix_hw;</div><div class='ctx'> 	struct nix_bp *bp;</div><div class='add'>+	u16 chan_v;</div><div class='ctx'> 	u64 cfg;</div><div class='ctx'> </div><div class='del'>-	pf = rvu_get_pf(pcifunc);</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	type = is_lbk_vf(rvu, pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;</div><div class='ctx'> 	if (!is_pf_cgxmapped(rvu, pf) &amp;&amp; type != NIX_INTF_TYPE_LBK)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (is_sdp_pfvf(rvu, pcifunc))</div><div class='add'>+		type = NIX_INTF_TYPE_SDP;</div><div class='add'>+</div><div class='add'>+	if (cpt_link &amp;&amp; !rvu-&gt;hw-&gt;cpt_links)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='ctx'> 	err = nix_get_struct_ptrs(rvu, pcifunc, &amp;nix_hw, &amp;blkaddr);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -592,8 +610,9 @@ int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu,</div><div class='ctx'> 	bp = &amp;nix_hw-&gt;bp;</div><div class='ctx'> 	chan_base = pfvf-&gt;rx_chan_base + req-&gt;chan_base;</div><div class='ctx'> 	for (chan = chan_base; chan &lt; (chan_base + req-&gt;chan_cnt); chan++) {</div><div class='del'>-		cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan));</div><div class='del'>-		rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan),</div><div class='add'>+		chan_v = nix_get_channel(chan, cpt_link);</div><div class='add'>+		cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v));</div><div class='add'>+		rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v),</div><div class='ctx'> 			    cfg &amp; ~BIT_ULL(16));</div><div class='ctx'> </div><div class='ctx'> 		if (type == NIX_INTF_TYPE_LBK) {</div><div class='hunk'>@@ -612,6 +631,20 @@ int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int rvu_mbox_handler_nix_bp_disable(struct rvu *rvu,</div><div class='add'>+				    struct nix_bp_cfg_req *req,</div><div class='add'>+				    struct msg_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	return nix_bp_disable(rvu, req, rsp, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_mbox_handler_nix_cpt_bp_disable(struct rvu *rvu,</div><div class='add'>+					struct nix_bp_cfg_req *req,</div><div class='add'>+					struct msg_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	return nix_bp_disable(rvu, req, rsp, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req,</div><div class='ctx'> 			    int type, int chan_id)</div><div class='ctx'> {</div><div class='hunk'>@@ -691,20 +724,22 @@ static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req,</div><div class='ctx'> 	return bpid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu,</div><div class='del'>-				   struct nix_bp_cfg_req *req,</div><div class='del'>-				   struct nix_bp_cfg_rsp *rsp)</div><div class='add'>+static int nix_bp_enable(struct rvu *rvu,</div><div class='add'>+			 struct nix_bp_cfg_req *req,</div><div class='add'>+			 struct nix_bp_cfg_rsp *rsp,</div><div class='add'>+			 bool cpt_link)</div><div class='ctx'> {</div><div class='ctx'> 	int blkaddr, pf, type, chan_id = 0;</div><div class='ctx'> 	u16 pcifunc = req-&gt;hdr.pcifunc;</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='ctx'> 	u16 chan_base, chan;</div><div class='ctx'> 	s16 bpid, bpid_base;</div><div class='add'>+	u16 chan_v;</div><div class='ctx'> 	u64 cfg;</div><div class='ctx'> </div><div class='del'>-	pf = rvu_get_pf(pcifunc);</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	type = is_lbk_vf(rvu, pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;</div><div class='del'>-	if (is_sdp_pfvf(pcifunc))</div><div class='add'>+	if (is_sdp_pfvf(rvu, pcifunc))</div><div class='ctx'> 		type = NIX_INTF_TYPE_SDP;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable backpressure only for CGX mapped PFs and LBK/SDP interface */</div><div class='hunk'>@@ -712,6 +747,9 @@ int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu,</div><div class='ctx'> 	    type != NIX_INTF_TYPE_SDP)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (cpt_link &amp;&amp; !rvu-&gt;hw-&gt;cpt_links)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='ctx'> 	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NIX, pcifunc);</div><div class='ctx'> </div><div class='hunk'>@@ -725,9 +763,11 @@ int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan));</div><div class='add'>+		chan_v = nix_get_channel(chan, cpt_link);</div><div class='add'>+</div><div class='add'>+		cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v));</div><div class='ctx'> 		cfg &amp;= ~GENMASK_ULL(8, 0);</div><div class='del'>-		rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan),</div><div class='add'>+		rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(chan_v),</div><div class='ctx'> 			    cfg | (bpid &amp; GENMASK_ULL(8, 0)) | BIT_ULL(16));</div><div class='ctx'> 		chan_id++;</div><div class='ctx'> 		bpid = rvu_nix_get_bpid(rvu, req, type, chan_id);</div><div class='hunk'>@@ -745,6 +785,20 @@ int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int rvu_mbox_handler_nix_bp_enable(struct rvu *rvu,</div><div class='add'>+				   struct nix_bp_cfg_req *req,</div><div class='add'>+				   struct nix_bp_cfg_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	return nix_bp_enable(rvu, req, rsp, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_mbox_handler_nix_cpt_bp_enable(struct rvu *rvu,</div><div class='add'>+				       struct nix_bp_cfg_req *req,</div><div class='add'>+				       struct nix_bp_cfg_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	return nix_bp_enable(rvu, req, rsp, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void nix_setup_lso_tso_l3(struct rvu *rvu, int blkaddr,</div><div class='ctx'> 				 u64 format, bool v4, u64 *fidx)</div><div class='ctx'> {</div><div class='hunk'>@@ -965,6 +1019,12 @@ static void nix_get_aq_req_smq(struct rvu *rvu, struct nix_aq_enq_req *req,</div><div class='ctx'> {</div><div class='ctx'> 	struct nix_cn10k_aq_enq_req *aq_req;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev)) {</div><div class='add'>+		*smq = ((struct nix_cn20k_aq_enq_req *)req)-&gt;sq.smq;</div><div class='add'>+		*smq_mask = ((struct nix_cn20k_aq_enq_req *)req)-&gt;sq_mask.smq;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!is_rvu_otx2(rvu)) {</div><div class='ctx'> 		aq_req = (struct nix_cn10k_aq_enq_req *)req;</div><div class='ctx'> 		*smq = aq_req-&gt;sq.smq;</div><div class='hunk'>@@ -1095,36 +1155,36 @@ static int rvu_nix_blk_aq_enq_inst(struct rvu *rvu, struct nix_hw *nix_hw,</div><div class='ctx'> 	case NIX_AQ_INSTOP_WRITE:</div><div class='ctx'> 		if (req-&gt;ctype == NIX_AQ_CTYPE_RQ)</div><div class='ctx'> 			memcpy(mask, &amp;req-&gt;rq_mask,</div><div class='del'>-			       sizeof(struct nix_rq_ctx_s));</div><div class='add'>+			       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		else if (req-&gt;ctype == NIX_AQ_CTYPE_SQ)</div><div class='ctx'> 			memcpy(mask, &amp;req-&gt;sq_mask,</div><div class='del'>-			       sizeof(struct nix_sq_ctx_s));</div><div class='add'>+			       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		else if (req-&gt;ctype == NIX_AQ_CTYPE_CQ)</div><div class='ctx'> 			memcpy(mask, &amp;req-&gt;cq_mask,</div><div class='del'>-			       sizeof(struct nix_cq_ctx_s));</div><div class='add'>+			       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		else if (req-&gt;ctype == NIX_AQ_CTYPE_RSS)</div><div class='ctx'> 			memcpy(mask, &amp;req-&gt;rss_mask,</div><div class='del'>-			       sizeof(struct nix_rsse_s));</div><div class='add'>+			       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		else if (req-&gt;ctype == NIX_AQ_CTYPE_MCE)</div><div class='ctx'> 			memcpy(mask, &amp;req-&gt;mce_mask,</div><div class='del'>-			       sizeof(struct nix_rx_mce_s));</div><div class='add'>+			       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		else if (req-&gt;ctype == NIX_AQ_CTYPE_BANDPROF)</div><div class='ctx'> 			memcpy(mask, &amp;req-&gt;prof_mask,</div><div class='del'>-			       sizeof(struct nix_bandprof_s));</div><div class='add'>+			       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case NIX_AQ_INSTOP_INIT:</div><div class='ctx'> 		if (req-&gt;ctype == NIX_AQ_CTYPE_RQ)</div><div class='del'>-			memcpy(ctx, &amp;req-&gt;rq, sizeof(struct nix_rq_ctx_s));</div><div class='add'>+			memcpy(ctx, &amp;req-&gt;rq, NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		else if (req-&gt;ctype == NIX_AQ_CTYPE_SQ)</div><div class='del'>-			memcpy(ctx, &amp;req-&gt;sq, sizeof(struct nix_sq_ctx_s));</div><div class='add'>+			memcpy(ctx, &amp;req-&gt;sq, NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		else if (req-&gt;ctype == NIX_AQ_CTYPE_CQ)</div><div class='del'>-			memcpy(ctx, &amp;req-&gt;cq, sizeof(struct nix_cq_ctx_s));</div><div class='add'>+			memcpy(ctx, &amp;req-&gt;cq, NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		else if (req-&gt;ctype == NIX_AQ_CTYPE_RSS)</div><div class='del'>-			memcpy(ctx, &amp;req-&gt;rss, sizeof(struct nix_rsse_s));</div><div class='add'>+			memcpy(ctx, &amp;req-&gt;rss, NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		else if (req-&gt;ctype == NIX_AQ_CTYPE_MCE)</div><div class='del'>-			memcpy(ctx, &amp;req-&gt;mce, sizeof(struct nix_rx_mce_s));</div><div class='add'>+			memcpy(ctx, &amp;req-&gt;mce, NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		else if (req-&gt;ctype == NIX_AQ_CTYPE_BANDPROF)</div><div class='del'>-			memcpy(ctx, &amp;req-&gt;prof, sizeof(struct nix_bandprof_s));</div><div class='add'>+			memcpy(ctx, &amp;req-&gt;prof, NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NIX_AQ_INSTOP_NOP:</div><div class='ctx'> 	case NIX_AQ_INSTOP_READ:</div><div class='hunk'>@@ -1189,22 +1249,22 @@ static int rvu_nix_blk_aq_enq_inst(struct rvu *rvu, struct nix_hw *nix_hw,</div><div class='ctx'> 		if (req-&gt;op == NIX_AQ_INSTOP_READ) {</div><div class='ctx'> 			if (req-&gt;ctype == NIX_AQ_CTYPE_RQ)</div><div class='ctx'> 				memcpy(&amp;rsp-&gt;rq, ctx,</div><div class='del'>-				       sizeof(struct nix_rq_ctx_s));</div><div class='add'>+				       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 			else if (req-&gt;ctype == NIX_AQ_CTYPE_SQ)</div><div class='ctx'> 				memcpy(&amp;rsp-&gt;sq, ctx,</div><div class='del'>-				       sizeof(struct nix_sq_ctx_s));</div><div class='add'>+				       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 			else if (req-&gt;ctype == NIX_AQ_CTYPE_CQ)</div><div class='ctx'> 				memcpy(&amp;rsp-&gt;cq, ctx,</div><div class='del'>-				       sizeof(struct nix_cq_ctx_s));</div><div class='add'>+				       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 			else if (req-&gt;ctype == NIX_AQ_CTYPE_RSS)</div><div class='ctx'> 				memcpy(&amp;rsp-&gt;rss, ctx,</div><div class='del'>-				       sizeof(struct nix_rsse_s));</div><div class='add'>+				       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 			else if (req-&gt;ctype == NIX_AQ_CTYPE_MCE)</div><div class='ctx'> 				memcpy(&amp;rsp-&gt;mce, ctx,</div><div class='del'>-				       sizeof(struct nix_rx_mce_s));</div><div class='add'>+				       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 			else if (req-&gt;ctype == NIX_AQ_CTYPE_BANDPROF)</div><div class='ctx'> 				memcpy(&amp;rsp-&gt;prof, ctx,</div><div class='del'>-				       sizeof(struct nix_bandprof_s));</div><div class='add'>+				       NIX_MAX_CTX_SIZE);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1235,8 +1295,8 @@ static int rvu_nix_verify_aq_ctx(struct rvu *rvu, struct nix_hw *nix_hw,</div><div class='ctx'> 	/* Make copy of original context &amp; mask which are required</div><div class='ctx'> 	 * for resubmission</div><div class='ctx'> 	 */</div><div class='del'>-	memcpy(&amp;aq_req.cq_mask, &amp;req-&gt;cq_mask, sizeof(struct nix_cq_ctx_s));</div><div class='del'>-	memcpy(&amp;aq_req.cq, &amp;req-&gt;cq, sizeof(struct nix_cq_ctx_s));</div><div class='add'>+	memcpy(&amp;aq_req.cq_mask, &amp;req-&gt;cq_mask, NIX_MAX_CTX_SIZE);</div><div class='add'>+	memcpy(&amp;aq_req.cq, &amp;req-&gt;cq, NIX_MAX_CTX_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* exclude fields which HW can update */</div><div class='ctx'> 	aq_req.cq_mask.cq_err       = 0;</div><div class='hunk'>@@ -1255,7 +1315,7 @@ static int rvu_nix_verify_aq_ctx(struct rvu *rvu, struct nix_hw *nix_hw,</div><div class='ctx'> 	 * updated fields are masked out for request and response</div><div class='ctx'> 	 * comparison</div><div class='ctx'> 	 */</div><div class='del'>-	for (word = 0; word &lt; sizeof(struct nix_cq_ctx_s) / sizeof(u64);</div><div class='add'>+	for (word = 0; word &lt; NIX_MAX_CTX_SIZE / sizeof(u64);</div><div class='ctx'> 	     word++) {</div><div class='ctx'> 		*(u64 *)((u8 *)&amp;aq_rsp.cq + word * 8) &amp;=</div><div class='ctx'> 			(*(u64 *)((u8 *)&amp;aq_req.cq_mask + word * 8));</div><div class='hunk'>@@ -1263,14 +1323,14 @@ static int rvu_nix_verify_aq_ctx(struct rvu *rvu, struct nix_hw *nix_hw,</div><div class='ctx'> 			(*(u64 *)((u8 *)&amp;aq_req.cq_mask + word * 8));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (memcmp(&amp;aq_req.cq, &amp;aq_rsp.cq, sizeof(struct nix_cq_ctx_s)))</div><div class='add'>+	if (memcmp(&amp;aq_req.cq, &amp;aq_rsp.cq, NIX_MAX_CTX_SIZE))</div><div class='ctx'> 		return NIX_AF_ERR_AQ_CTX_RETRY_WRITE;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,</div><div class='del'>-			       struct nix_aq_enq_rsp *rsp)</div><div class='add'>+int rvu_nix_aq_enq_inst(struct rvu *rvu, struct nix_aq_enq_req *req,</div><div class='add'>+			struct nix_aq_enq_rsp *rsp)</div><div class='ctx'> {</div><div class='ctx'> 	struct nix_hw *nix_hw;</div><div class='ctx'> 	int err, retries = 5;</div><div class='hunk'>@@ -1614,8 +1674,14 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,</div><div class='ctx'> 	cfg = NPC_TX_DEF_PKIND;</div><div class='ctx'> 	rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf), cfg);</div><div class='ctx'> </div><div class='add'>+	if (is_rep_dev(rvu, pcifunc)) {</div><div class='add'>+		pfvf-&gt;tx_chan_base = RVU_SWITCH_LBK_CHAN;</div><div class='add'>+		pfvf-&gt;tx_chan_cnt = 1;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	intf = is_lbk_vf(rvu, pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;</div><div class='del'>-	if (is_sdp_pfvf(pcifunc))</div><div class='add'>+	if (is_sdp_pfvf(rvu, pcifunc))</div><div class='ctx'> 		intf = NIX_INTF_TYPE_SDP;</div><div class='ctx'> </div><div class='ctx'> 	err = nix_interface_init(rvu, pcifunc, intf, nixlf, rsp,</div><div class='hunk'>@@ -1684,6 +1750,9 @@ int rvu_mbox_handler_nix_lf_free(struct rvu *rvu, struct nix_lf_free_req *req,</div><div class='ctx'> 	if (nixlf &lt; 0)</div><div class='ctx'> 		return NIX_AF_ERR_AF_LF_INVALID;</div><div class='ctx'> </div><div class='add'>+	if (is_rep_dev(rvu, pcifunc))</div><div class='add'>+		goto free_lf;</div><div class='add'>+</div><div class='ctx'> 	if (req-&gt;flags &amp; NIX_LF_DISABLE_FLOWS)</div><div class='ctx'> 		rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1695,6 +1764,7 @@ int rvu_mbox_handler_nix_lf_free(struct rvu *rvu, struct nix_lf_free_req *req,</div><div class='ctx'> </div><div class='ctx'> 	nix_interface_deinit(rvu, pcifunc, nixlf);</div><div class='ctx'> </div><div class='add'>+free_lf:</div><div class='ctx'> 	/* Reset this NIX LF */</div><div class='ctx'> 	err = rvu_lf_reset(rvu, block, nixlf);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -1735,7 +1805,8 @@ int rvu_mbox_handler_nix_mark_format_cfg(struct rvu *rvu,</div><div class='ctx'> 	rc = rvu_nix_reserve_mark_format(rvu, nix_hw, blkaddr, cfg);</div><div class='ctx'> 	if (rc &lt; 0) {</div><div class='ctx'> 		dev_err(rvu-&gt;dev, "No mark_format_ctl for (pf:%d, vf:%d)",</div><div class='del'>-			rvu_get_pf(pcifunc), pcifunc &amp; RVU_PFVF_FUNC_MASK);</div><div class='add'>+			rvu_get_pf(rvu-&gt;pdev,  pcifunc),</div><div class='add'>+				   pcifunc &amp; RVU_PFVF_FUNC_MASK);</div><div class='ctx'> 		return NIX_AF_ERR_MARK_CFG_FAIL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1987,7 +2058,7 @@ static void nix_clear_tx_xoff(struct rvu *rvu, int blkaddr,</div><div class='ctx'> static int nix_get_tx_link(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_hwinfo *hw = rvu-&gt;hw;</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	u8 cgx_id = 0, lmac_id = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (is_lbk_vf(rvu, pcifunc)) {/* LBK links */</div><div class='hunk'>@@ -2005,9 +2076,10 @@ static void nix_get_txschq_range(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 				 int link, int *start, int *end)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_hwinfo *hw = rvu-&gt;hw;</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> </div><div class='del'>-	if (is_lbk_vf(rvu, pcifunc)) { /* LBK links */</div><div class='add'>+	/* LBK links */</div><div class='add'>+	if (is_lbk_vf(rvu, pcifunc) || is_rep_dev(rvu, pcifunc)) {</div><div class='ctx'> 		*start = hw-&gt;cap.nix_txsch_per_cgx_lmac * link;</div><div class='ctx'> 		*end = *start + hw-&gt;cap.nix_txsch_per_lbk_lmac;</div><div class='ctx'> 	} else if (is_pf_cgxmapped(rvu, pf)) { /* CGX links */</div><div class='hunk'>@@ -2362,7 +2434,7 @@ static int nix_smq_flush(struct rvu *rvu, int blkaddr,</div><div class='ctx'> {</div><div class='ctx'> 	struct nix_smq_flush_ctx *smq_flush_ctx;</div><div class='ctx'> 	int err, restore_tx_en = 0, i;</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	u8 cgx_id = 0, lmac_id = 0;</div><div class='ctx'> 	u16 tl2_tl3_link_schq;</div><div class='ctx'> 	u8 link, link_level;</div><div class='hunk'>@@ -2756,11 +2828,11 @@ void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, u16 pcifunc,</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_hwinfo *hw = rvu-&gt;hw;</div><div class='ctx'> 	int lbk_link_start, lbk_links;</div><div class='del'>-	u8 pf = rvu_get_pf(pcifunc);</div><div class='add'>+	u8 pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	int schq;</div><div class='ctx'> 	u64 cfg;</div><div class='ctx'> </div><div class='del'>-	if (!is_pf_cgxmapped(rvu, pf))</div><div class='add'>+	if (!is_pf_cgxmapped(rvu, pf) &amp;&amp; !is_rep_dev(rvu, pcifunc))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	cfg = enable ? (BIT_ULL(12) | RVU_SWITCH_LBK_CHAN) : 0;</div><div class='hunk'>@@ -3126,7 +3198,8 @@ static int nix_blk_setup_mce(struct rvu *rvu, struct nix_hw *nix_hw,</div><div class='ctx'> 	err = rvu_nix_blk_aq_enq_inst(rvu, nix_hw, &amp;aq_req, NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(rvu-&gt;dev, "Failed to setup Bcast MCE for PF%d:VF%d\n",</div><div class='del'>-			rvu_get_pf(pcifunc), pcifunc &amp; RVU_PFVF_FUNC_MASK);</div><div class='add'>+			rvu_get_pf(rvu-&gt;pdev, pcifunc),</div><div class='add'>+				pcifunc &amp; RVU_PFVF_FUNC_MASK);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3394,7 +3467,7 @@ int nix_update_mce_list(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 		dev_err(rvu-&gt;dev,</div><div class='ctx'> 			"%s: Idx %d &gt; max MCE idx %d, for PF%d bcast list\n",</div><div class='ctx'> 			__func__, idx, mce_list-&gt;max,</div><div class='del'>-			pcifunc &gt;&gt; RVU_PFVF_PF_SHIFT);</div><div class='add'>+			rvu_get_pf(rvu-&gt;pdev, pcifunc));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3446,7 +3519,8 @@ void nix_get_mce_list(struct rvu *rvu, u16 pcifunc, int type,</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='ctx'> </div><div class='ctx'> 	if (!hw-&gt;cap.nix_rx_multicast ||</div><div class='del'>-	    !is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc &amp; ~RVU_PFVF_FUNC_MASK))) {</div><div class='add'>+	    !is_pf_cgxmapped(rvu, rvu_get_pf(rvu-&gt;pdev,</div><div class='add'>+			     pcifunc &amp; ~RVU_PFVF_FUNC_MASK))) {</div><div class='ctx'> 		*mce_list = NULL;</div><div class='ctx'> 		*mce_idx = 0;</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -3480,13 +3554,13 @@ static int nix_update_mce_rule(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 	int pf;</div><div class='ctx'> </div><div class='ctx'> 	/* skip multicast pkt replication for AF's VFs &amp; SDP links */</div><div class='del'>-	if (is_lbk_vf(rvu, pcifunc) || is_sdp_pfvf(pcifunc))</div><div class='add'>+	if (is_lbk_vf(rvu, pcifunc) || is_sdp_pfvf(rvu, pcifunc))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!hw-&gt;cap.nix_rx_multicast)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	pf = rvu_get_pf(pcifunc);</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	if (!is_pf_cgxmapped(rvu, pf))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -3555,7 +3629,7 @@ static int nix_setup_mce_tables(struct rvu *rvu, struct nix_hw *nix_hw)</div><div class='ctx'> </div><div class='ctx'> 		for (idx = 0; idx &lt; (numvfs + 1); idx++) {</div><div class='ctx'> 			/* idx-0 is for PF, followed by VFs */</div><div class='del'>-			pcifunc = (pf &lt;&lt; RVU_PFVF_PF_SHIFT);</div><div class='add'>+			pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, 0);</div><div class='ctx'> 			pcifunc |= idx;</div><div class='ctx'> 			/* Add dummy entries now, so that we don't have to check</div><div class='ctx'> 			 * for whether AQ_OP should be INIT/WRITE later on.</div><div class='hunk'>@@ -4393,8 +4467,6 @@ int rvu_mbox_handler_nix_set_mac_addr(struct rvu *rvu,</div><div class='ctx'> 	if (test_bit(PF_SET_VF_TRUSTED, &amp;pfvf-&gt;flags) &amp;&amp; from_vf)</div><div class='ctx'> 		ether_addr_copy(pfvf-&gt;default_mac, req-&gt;mac_addr);</div><div class='ctx'> </div><div class='del'>-	rvu_switch_update_rules(rvu, pcifunc);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4492,7 +4564,7 @@ int rvu_mbox_handler_nix_set_rx_mode(struct rvu *rvu, struct nix_rx_mode *req,</div><div class='ctx'> static void nix_find_link_frs(struct rvu *rvu,</div><div class='ctx'> 			      struct nix_frs_cfg *req, u16 pcifunc)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='ctx'> 	int maxlen, minlen;</div><div class='ctx'> 	int numvfs, hwvf;</div><div class='hunk'>@@ -4539,7 +4611,7 @@ int rvu_mbox_handler_nix_set_hw_frs(struct rvu *rvu, struct nix_frs_cfg *req,</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_hwinfo *hw = rvu-&gt;hw;</div><div class='ctx'> 	u16 pcifunc = req-&gt;hdr.pcifunc;</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	int blkaddr, link = -1;</div><div class='ctx'> 	struct nix_hw *nix_hw;</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='hunk'>@@ -4555,7 +4627,7 @@ int rvu_mbox_handler_nix_set_hw_frs(struct rvu *rvu, struct nix_frs_cfg *req,</div><div class='ctx'> 	if (!nix_hw)</div><div class='ctx'> 		return NIX_AF_ERR_INVALID_NIXBLK;</div><div class='ctx'> </div><div class='del'>-	if (is_lbk_vf(rvu, pcifunc))</div><div class='add'>+	if (is_lbk_vf(rvu, pcifunc) || is_rep_dev(rvu, pcifunc))</div><div class='ctx'> 		rvu_get_lbk_link_max_frs(rvu, &amp;max_mtu);</div><div class='ctx'> 	else</div><div class='ctx'> 		rvu_get_lmac_link_max_frs(rvu, &amp;max_mtu);</div><div class='hunk'>@@ -4583,6 +4655,8 @@ int rvu_mbox_handler_nix_set_hw_frs(struct rvu *rvu, struct nix_frs_cfg *req,</div><div class='ctx'> 		/* For VFs of PF0 ingress is LBK port, so config LBK link */</div><div class='ctx'> 		pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='ctx'> 		link = hw-&gt;cgx_links + pfvf-&gt;lbkid;</div><div class='add'>+	} else if (is_rep_dev(rvu, pcifunc)) {</div><div class='add'>+		link = hw-&gt;cgx_links + 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (link &lt; 0)</div><div class='hunk'>@@ -4656,6 +4730,9 @@ static void nix_link_config(struct rvu *rvu, int blkaddr,</div><div class='ctx'> 	rvu_get_lbk_link_max_frs(rvu, &amp;lbk_max_frs);</div><div class='ctx'> 	rvu_get_lmac_link_max_frs(rvu, &amp;lmac_max_frs);</div><div class='ctx'> </div><div class='add'>+	/* Set SDP link credit */</div><div class='add'>+	rvu_write64(rvu, blkaddr, NIX_AF_SDP_LINK_CREDIT, SDP_LINK_CREDIT);</div><div class='add'>+</div><div class='ctx'> 	/* Set default min/max packet lengths allowed on NIX Rx links.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * With HW reset minlen value of 60byte, HW will treat ARP pkts</div><div class='hunk'>@@ -4674,7 +4751,7 @@ static void nix_link_config(struct rvu *rvu, int blkaddr,</div><div class='ctx'> 	if (hw-&gt;sdp_links) {</div><div class='ctx'> 		link = hw-&gt;cgx_links + hw-&gt;lbk_links;</div><div class='ctx'> 		rvu_write64(rvu, blkaddr, NIX_AF_RX_LINKX_CFG(link),</div><div class='del'>-			    SDP_HW_MAX_FRS &lt;&lt; 16 | NIC_HW_MIN_FRS);</div><div class='add'>+			    SDP_HW_MAX_FRS &lt;&lt; 16 | SDP_HW_MIN_FRS);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Get MCS external bypass status for CN10K-B */</div><div class='hunk'>@@ -4979,7 +5056,7 @@ static int rvu_nix_block_init(struct rvu *rvu, struct nix_hw *nix_hw)</div><div class='ctx'> 				    (ltdefs-&gt;rx_apad1.ltype_match &lt;&lt; 4) |</div><div class='ctx'> 				    ltdefs-&gt;rx_apad1.ltype_mask);</div><div class='ctx'> </div><div class='del'>-			/* Receive ethertype defination register defines layer</div><div class='add'>+			/* Receive ethertype definition register defines layer</div><div class='ctx'> 			 * information in NPC_RESULT_S to identify the Ethertype</div><div class='ctx'> 			 * location in L2 header. Used for Ethertype overwriting</div><div class='ctx'> 			 * in inline IPsec flow.</div><div class='hunk'>@@ -5166,7 +5243,7 @@ int rvu_mbox_handler_nix_lf_start_rx(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> {</div><div class='ctx'> 	u16 pcifunc = req-&gt;hdr.pcifunc;</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='del'>-	int nixlf, err;</div><div class='add'>+	int nixlf, err, pf;</div><div class='ctx'> </div><div class='ctx'> 	err = nix_get_nixlf(rvu, pcifunc, &amp;nixlf, NULL);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -5182,7 +5259,11 @@ int rvu_mbox_handler_nix_lf_start_rx(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 	pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='ctx'> 	set_bit(NIXLF_INITIALIZED, &amp;pfvf-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	rvu_switch_update_rules(rvu, pcifunc);</div><div class='add'>+	rvu_switch_update_rules(rvu, pcifunc, true);</div><div class='add'>+</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='add'>+	if (is_pf_cgxmapped(rvu, pf) &amp;&amp; rvu-&gt;rep_mode)</div><div class='add'>+		rvu_rep_notify_pfvf_state(rvu, pcifunc, true);</div><div class='ctx'> </div><div class='ctx'> 	return rvu_cgx_start_stop_io(rvu, pcifunc, true);</div><div class='ctx'> }</div><div class='hunk'>@@ -5192,7 +5273,7 @@ int rvu_mbox_handler_nix_lf_stop_rx(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> {</div><div class='ctx'> 	u16 pcifunc = req-&gt;hdr.pcifunc;</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='del'>-	int nixlf, err;</div><div class='add'>+	int nixlf, err, pf;</div><div class='ctx'> </div><div class='ctx'> 	err = nix_get_nixlf(rvu, pcifunc, &amp;nixlf, NULL);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -5210,8 +5291,12 @@ int rvu_mbox_handler_nix_lf_stop_rx(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	rvu_switch_update_rules(rvu, pcifunc, false);</div><div class='ctx'> 	rvu_cgx_tx_enable(rvu, pcifunc, true);</div><div class='ctx'> </div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='add'>+	if (is_pf_cgxmapped(rvu, pf) &amp;&amp; rvu-&gt;rep_mode)</div><div class='add'>+		rvu_rep_notify_pfvf_state(rvu, pcifunc, false);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5221,7 +5306,7 @@ void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int nixlf)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='ctx'> 	struct hwctx_disable_req ctx_req;</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	struct mac_ops *mac_ops;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	u64 sa_base;</div><div class='hunk'>@@ -5239,6 +5324,9 @@ void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int nixlf)</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(NIXLF_INITIALIZED, &amp;pfvf-&gt;flags);</div><div class='ctx'> </div><div class='add'>+	if (is_pf_cgxmapped(rvu, pf) &amp;&amp; rvu-&gt;rep_mode)</div><div class='add'>+		rvu_rep_notify_pfvf_state(rvu, pcifunc, false);</div><div class='add'>+</div><div class='ctx'> 	rvu_cgx_start_stop_io(rvu, pcifunc, false);</div><div class='ctx'> </div><div class='ctx'> 	if (pfvf-&gt;sq_ctx) {</div><div class='hunk'>@@ -5307,7 +5395,7 @@ static int rvu_nix_lf_ptp_tx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)</div><div class='ctx'> 	int nixlf;</div><div class='ctx'> 	u64 cfg;</div><div class='ctx'> </div><div class='del'>-	pf = rvu_get_pf(pcifunc);</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	if (!is_mac_feature_supported(rvu, pf, RVU_LMAC_FEAT_PTP))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -5730,6 +5818,8 @@ static void nix_ipolicer_freemem(struct rvu *rvu, struct nix_hw *nix_hw)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define NIX_BW_PROF_HI_MASK	GENMASK(10, 7)</div><div class='add'>+</div><div class='ctx'> static int nix_verify_bandprof(struct nix_cn10k_aq_enq_req *req,</div><div class='ctx'> 			       struct nix_hw *nix_hw, u16 pcifunc)</div><div class='ctx'> {</div><div class='hunk'>@@ -5768,7 +5858,8 @@ static int nix_verify_bandprof(struct nix_cn10k_aq_enq_req *req,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ipolicer = &amp;nix_hw-&gt;ipolicer[hi_layer];</div><div class='del'>-	prof_idx = req-&gt;prof.band_prof_id;</div><div class='add'>+	prof_idx = FIELD_PREP(NIX_BW_PROF_HI_MASK, req-&gt;prof.band_prof_id_h);</div><div class='add'>+	prof_idx |= req-&gt;prof.band_prof_id;</div><div class='ctx'> 	if (prof_idx &gt;= ipolicer-&gt;band_prof.max ||</div><div class='ctx'> 	    ipolicer-&gt;pfvf_map[prof_idx] != pcifunc)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -5933,8 +6024,10 @@ static int nix_ipolicer_map_leaf_midprofs(struct rvu *rvu,</div><div class='ctx'> 	aq_req-&gt;op = NIX_AQ_INSTOP_WRITE;</div><div class='ctx'> 	aq_req-&gt;qidx = leaf_prof;</div><div class='ctx'> </div><div class='del'>-	aq_req-&gt;prof.band_prof_id = mid_prof;</div><div class='add'>+	aq_req-&gt;prof.band_prof_id = mid_prof &amp; 0x7F;</div><div class='ctx'> 	aq_req-&gt;prof_mask.band_prof_id = GENMASK(6, 0);</div><div class='add'>+	aq_req-&gt;prof.band_prof_id_h = FIELD_GET(NIX_BW_PROF_HI_MASK, mid_prof);</div><div class='add'>+	aq_req-&gt;prof_mask.band_prof_id_h = GENMASK(3, 0);</div><div class='ctx'> 	aq_req-&gt;prof.hl_en = 1;</div><div class='ctx'> 	aq_req-&gt;prof_mask.hl_en = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -5943,6 +6036,8 @@ static int nix_ipolicer_map_leaf_midprofs(struct rvu *rvu,</div><div class='ctx'> 				       (struct nix_aq_enq_rsp *)aq_rsp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define NIX_RQ_PROF_HI_MASK	GENMASK(13, 10)</div><div class='add'>+</div><div class='ctx'> int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 				 u16 rq_idx, u16 match_id)</div><div class='ctx'> {</div><div class='hunk'>@@ -5974,7 +6069,8 @@ int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Get the bandwidth profile ID mapped to this RQ */</div><div class='del'>-	leaf_prof = aq_rsp.rq.band_prof_id;</div><div class='add'>+	leaf_prof = FIELD_PREP(NIX_RQ_PROF_HI_MASK, aq_rsp.rq.band_prof_id_h);</div><div class='add'>+	leaf_prof |= aq_rsp.rq.band_prof_id;</div><div class='ctx'> </div><div class='ctx'> 	ipolicer = &amp;nix_hw-&gt;ipolicer[BAND_PROF_LEAF_LAYER];</div><div class='ctx'> 	ipolicer-&gt;match_id[leaf_prof] = match_id;</div><div class='hunk'>@@ -6012,7 +6108,10 @@ int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 		 * to different RQs and marked with same match_id</div><div class='ctx'> 		 * are rate limited in a aggregate fashion</div><div class='ctx'> 		 */</div><div class='del'>-		mid_prof = aq_rsp.prof.band_prof_id;</div><div class='add'>+		mid_prof = FIELD_PREP(NIX_BW_PROF_HI_MASK,</div><div class='add'>+				      aq_rsp.prof.band_prof_id_h);</div><div class='add'>+		mid_prof |= aq_rsp.prof.band_prof_id;</div><div class='add'>+</div><div class='ctx'> 		rc = nix_ipolicer_map_leaf_midprofs(rvu, nix_hw,</div><div class='ctx'> 						    &amp;aq_req, &amp;aq_rsp,</div><div class='ctx'> 						    leaf_prof, mid_prof);</div><div class='hunk'>@@ -6134,7 +6233,8 @@ static void nix_clear_ratelimit_aggr(struct rvu *rvu, struct nix_hw *nix_hw,</div><div class='ctx'> 	if (!aq_rsp.prof.hl_en)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mid_prof = aq_rsp.prof.band_prof_id;</div><div class='add'>+	mid_prof = FIELD_PREP(NIX_BW_PROF_HI_MASK, aq_rsp.prof.band_prof_id_h);</div><div class='add'>+	mid_prof |= aq_rsp.prof.band_prof_id;</div><div class='ctx'> 	ipolicer = &amp;nix_hw-&gt;ipolicer[BAND_PROF_MID_LAYER];</div><div class='ctx'> 	ipolicer-&gt;ref_count[mid_prof]--;</div><div class='ctx'> 	/* If ref_count is zero, free mid layer profile */</div><div class='hunk'>@@ -6534,3 +6634,19 @@ unlock_grp:</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/* On CN10k and older series of silicons, hardware may incorrectly</div><div class='add'>+ * assert XOFF on certain channels. Issue a write on NIX_AF_RX_CHANX_CFG</div><div class='add'>+ * to broadcacst XON on the same.</div><div class='add'>+ */</div><div class='add'>+void rvu_block_bcast_xon(struct rvu *rvu, int blkaddr)</div><div class='add'>+{</div><div class='add'>+	struct rvu_block *block = &amp;rvu-&gt;hw-&gt;block[blkaddr];</div><div class='add'>+	u64 cfg;</div><div class='add'>+</div><div class='add'>+	if (!block-&gt;implemented || is_cn20k(rvu-&gt;pdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cfg = rvu_read64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(0));</div><div class='add'>+	rvu_write64(rvu, blkaddr, NIX_AF_RX_CHANX_CFG(0), cfg);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c<br/>index 4f5ca5ab13a4..e2a33e46b48a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c</a></div><div class='hunk'>@@ -464,6 +464,23 @@ int rvu_mbox_handler_npa_lf_free(struct rvu *rvu, struct msg_req *req,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void npa_aq_ndc_config(struct rvu *rvu, struct rvu_block *block)</div><div class='add'>+{</div><div class='add'>+	u64 cfg;</div><div class='add'>+</div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev)) /* NDC not applicable to cn20k */</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Do not bypass NDC cache */</div><div class='add'>+	cfg = rvu_read64(rvu, block-&gt;addr, NPA_AF_NDC_CFG);</div><div class='add'>+	cfg &amp;= ~0x03DULL;</div><div class='add'>+#ifdef CONFIG_NDC_DIS_DYNAMIC_CACHING</div><div class='add'>+	/* Disable caching of stack pages */</div><div class='add'>+	cfg |= 0x10ULL;</div><div class='add'>+#endif</div><div class='add'>+	rvu_write64(rvu, block-&gt;addr, NPA_AF_NDC_CFG, cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int npa_aq_init(struct rvu *rvu, struct rvu_block *block)</div><div class='ctx'> {</div><div class='ctx'> 	u64 cfg;</div><div class='hunk'>@@ -479,14 +496,7 @@ static int npa_aq_init(struct rvu *rvu, struct rvu_block *block)</div><div class='ctx'> 	rvu_write64(rvu, block-&gt;addr, NPA_AF_GEN_CFG, cfg);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	/* Do not bypass NDC cache */</div><div class='del'>-	cfg = rvu_read64(rvu, block-&gt;addr, NPA_AF_NDC_CFG);</div><div class='del'>-	cfg &amp;= ~0x03DULL;</div><div class='del'>-#ifdef CONFIG_NDC_DIS_DYNAMIC_CACHING</div><div class='del'>-	/* Disable caching of stack pages */</div><div class='del'>-	cfg |= 0x10ULL;</div><div class='del'>-#endif</div><div class='del'>-	rvu_write64(rvu, block-&gt;addr, NPA_AF_NDC_CFG, cfg);</div><div class='add'>+	npa_aq_ndc_config(rvu, block);</div><div class='ctx'> </div><div class='ctx'> 	/* For CN10K NPA BATCH DMA set 35 cache lines */</div><div class='ctx'> 	if (!is_rvu_otx2(rvu)) {</div><div class='hunk'>@@ -567,6 +577,9 @@ int rvu_ndc_fix_locked_cacheline(struct rvu *rvu, int blkaddr)</div><div class='ctx'> 	int bank, max_bank, line, max_line, err;</div><div class='ctx'> 	u64 reg, ndc_af_const;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(rvu-&gt;pdev)) /* NDC not applicable to cn20k */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	/* Set the ENABLE bit(63) to '0' */</div><div class='ctx'> 	reg = rvu_read64(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL);</div><div class='ctx'> 	rvu_write64(rvu, blkaddr, NDC_AF_CAMS_RD_INTERVAL, reg &amp; GENMASK_ULL(62, 0));</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c<br/>index 97722ce8c4cb..c7c70429eb6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c</a></div><div class='hunk'>@@ -147,7 +147,9 @@ static int npc_get_ucast_mcam_index(struct npc_mcam *mcam, u16 pcifunc,</div><div class='ctx'> int npc_get_nixlf_mcam_index(struct npc_mcam *mcam,</div><div class='ctx'> 			     u16 pcifunc, int nixlf, int type)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	struct rvu_hwinfo *hw = container_of(mcam, struct rvu_hwinfo, mcam);</div><div class='add'>+	struct rvu *rvu = hw-&gt;rvu;</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	int index;</div><div class='ctx'> </div><div class='ctx'> 	/* Check if this is for a PF */</div><div class='hunk'>@@ -698,7 +700,7 @@ void rvu_npc_install_promisc_entry(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> </div><div class='ctx'> 	/* RX_ACTION set to MCAST for CGX PF's */</div><div class='ctx'> 	if (hw-&gt;cap.nix_rx_multicast &amp;&amp; pfvf-&gt;use_mce_list &amp;&amp;</div><div class='del'>-	    is_pf_cgxmapped(rvu, rvu_get_pf(pcifunc))) {</div><div class='add'>+	    is_pf_cgxmapped(rvu, rvu_get_pf(rvu-&gt;pdev, pcifunc))) {</div><div class='ctx'> 		*(u64 *)&amp;action = 0;</div><div class='ctx'> 		action.op = NIX_RX_ACTIONOP_MCAST;</div><div class='ctx'> 		pfvf = rvu_get_pfvf(rvu, pcifunc &amp; ~RVU_PFVF_FUNC_MASK);</div><div class='hunk'>@@ -820,24 +822,6 @@ void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 	rvu_mbox_handler_npc_install_flow(rvu, &amp;req, &amp;rsp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void rvu_npc_enable_bcast_entry(struct rvu *rvu, u16 pcifunc, int nixlf,</div><div class='del'>-				bool enable)</div><div class='del'>-{</div><div class='del'>-	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='del'>-	int blkaddr, index;</div><div class='del'>-</div><div class='del'>-	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);</div><div class='del'>-	if (blkaddr &lt; 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Get 'pcifunc' of PF device */</div><div class='del'>-	pcifunc = pcifunc &amp; ~RVU_PFVF_FUNC_MASK;</div><div class='del'>-</div><div class='del'>-	index = npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf,</div><div class='del'>-					 NIXLF_BCAST_ENTRY);</div><div class='del'>-	npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void rvu_npc_install_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,</div><div class='ctx'> 				    u64 chan)</div><div class='ctx'> {</div><div class='hunk'>@@ -1125,6 +1109,7 @@ void npc_enadis_default_mce_entry(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> static void npc_enadis_default_entries(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 				       int nixlf, bool enable)</div><div class='ctx'> {</div><div class='add'>+	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='ctx'> 	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='ctx'> 	int index, blkaddr;</div><div class='ctx'> </div><div class='hunk'>@@ -1133,9 +1118,12 @@ static void npc_enadis_default_entries(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Ucast MCAM match entry of this PF/VF */</div><div class='del'>-	index = npc_get_nixlf_mcam_index(mcam, pcifunc,</div><div class='del'>-					 nixlf, NIXLF_UCAST_ENTRY);</div><div class='del'>-	npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);</div><div class='add'>+	if (npc_is_feature_supported(rvu, BIT_ULL(NPC_DMAC),</div><div class='add'>+				     pfvf-&gt;nix_rx_intf)) {</div><div class='add'>+		index = npc_get_nixlf_mcam_index(mcam, pcifunc,</div><div class='add'>+						 nixlf, NIXLF_UCAST_ENTRY);</div><div class='add'>+		npc_enable_mcam_entry(rvu, mcam, blkaddr, index, enable);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Nothing to do for VFs, on platforms where pkt replication</div><div class='ctx'> 	 * is not supported</div><div class='hunk'>@@ -2691,6 +2679,49 @@ void npc_mcam_rsrcs_reserve(struct rvu *rvu, int blkaddr, int entry_idx)</div><div class='ctx'> 	npc_mcam_set_bit(mcam, entry_idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int npc_config_cntr_default_entries(struct rvu *rvu, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='add'>+	struct npc_install_flow_rsp rsp;</div><div class='add'>+	struct rvu_npc_mcam_rule *rule;</div><div class='add'>+	int blkaddr;</div><div class='add'>+</div><div class='add'>+	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);</div><div class='add'>+	if (blkaddr &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mcam-&gt;lock);</div><div class='add'>+	list_for_each_entry(rule, &amp;mcam-&gt;mcam_rules, list) {</div><div class='add'>+		if (!is_mcam_entry_enabled(rvu, mcam, blkaddr, rule-&gt;entry))</div><div class='add'>+			continue;</div><div class='add'>+		if (!rule-&gt;default_rule)</div><div class='add'>+			continue;</div><div class='add'>+		if (enable &amp;&amp; !rule-&gt;has_cntr) { /* Alloc and map new counter */</div><div class='add'>+			__rvu_mcam_add_counter_to_rule(rvu, rule-&gt;owner,</div><div class='add'>+						       rule, &amp;rsp);</div><div class='add'>+			if (rsp.counter &lt; 0) {</div><div class='add'>+				dev_err(rvu-&gt;dev,</div><div class='add'>+					"%s: Failed to allocate cntr for default rule (err=%d)\n",</div><div class='add'>+					__func__, rsp.counter);</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			npc_map_mcam_entry_and_cntr(rvu, mcam, blkaddr,</div><div class='add'>+						    rule-&gt;entry, rsp.counter);</div><div class='add'>+			/* Reset counter before use */</div><div class='add'>+			rvu_write64(rvu, blkaddr,</div><div class='add'>+				    NPC_AF_MATCH_STATX(rule-&gt;cntr), 0x0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Free and unmap counter */</div><div class='add'>+		if (!enable &amp;&amp; rule-&gt;has_cntr)</div><div class='add'>+			__rvu_mcam_remove_counter_from_rule(rvu, rule-&gt;owner,</div><div class='add'>+							    rule);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;mcam-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int rvu_mbox_handler_npc_mcam_alloc_entry(struct rvu *rvu,</div><div class='ctx'> 					  struct npc_mcam_alloc_entry_req *req,</div><div class='ctx'> 					  struct npc_mcam_alloc_entry_rsp *rsp)</div><div class='hunk'>@@ -2975,9 +3006,9 @@ int rvu_mbox_handler_npc_mcam_shift_entry(struct rvu *rvu,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int rvu_mbox_handler_npc_mcam_alloc_counter(struct rvu *rvu,</div><div class='del'>-			struct npc_mcam_alloc_counter_req *req,</div><div class='del'>-			struct npc_mcam_alloc_counter_rsp *rsp)</div><div class='add'>+static int __npc_mcam_alloc_counter(struct rvu *rvu,</div><div class='add'>+				    struct npc_mcam_alloc_counter_req *req,</div><div class='add'>+				    struct npc_mcam_alloc_counter_rsp *rsp)</div><div class='ctx'> {</div><div class='ctx'> 	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='ctx'> 	u16 pcifunc = req-&gt;hdr.pcifunc;</div><div class='hunk'>@@ -2998,11 +3029,9 @@ int rvu_mbox_handler_npc_mcam_alloc_counter(struct rvu *rvu,</div><div class='ctx'> 	if (!req-&gt;contig &amp;&amp; req-&gt;count &gt; NPC_MAX_NONCONTIG_COUNTERS)</div><div class='ctx'> 		return NPC_MCAM_INVALID_REQ;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;mcam-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Check if unused counters are available or not */</div><div class='ctx'> 	if (!rvu_rsrc_free_count(&amp;mcam-&gt;counters)) {</div><div class='del'>-		mutex_unlock(&amp;mcam-&gt;lock);</div><div class='ctx'> 		return NPC_MCAM_ALLOC_FAILED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3035,12 +3064,27 @@ int rvu_mbox_handler_npc_mcam_alloc_counter(struct rvu *rvu,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;mcam-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int rvu_mbox_handler_npc_mcam_free_counter(struct rvu *rvu,</div><div class='del'>-		struct npc_mcam_oper_counter_req *req, struct msg_rsp *rsp)</div><div class='add'>+int rvu_mbox_handler_npc_mcam_alloc_counter(struct rvu *rvu,</div><div class='add'>+			struct npc_mcam_alloc_counter_req *req,</div><div class='add'>+			struct npc_mcam_alloc_counter_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mcam-&gt;lock);</div><div class='add'>+</div><div class='add'>+	err = __npc_mcam_alloc_counter(rvu, req, rsp);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mcam-&gt;lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __npc_mcam_free_counter(struct rvu *rvu,</div><div class='add'>+				   struct npc_mcam_oper_counter_req *req,</div><div class='add'>+				   struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='ctx'> 	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='ctx'> 	u16 index, entry = 0;</div><div class='hunk'>@@ -3050,10 +3094,8 @@ int rvu_mbox_handler_npc_mcam_free_counter(struct rvu *rvu,</div><div class='ctx'> 	if (blkaddr &lt; 0)</div><div class='ctx'> 		return NPC_MCAM_INVALID_REQ;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;mcam-&gt;lock);</div><div class='ctx'> 	err = npc_mcam_verify_counter(mcam, req-&gt;hdr.pcifunc, req-&gt;cntr);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		mutex_unlock(&amp;mcam-&gt;lock);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3077,10 +3119,66 @@ int rvu_mbox_handler_npc_mcam_free_counter(struct rvu *rvu,</div><div class='ctx'> 					      index, req-&gt;cntr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;mcam-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int rvu_mbox_handler_npc_mcam_free_counter(struct rvu *rvu,</div><div class='add'>+		struct npc_mcam_oper_counter_req *req, struct msg_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mcam-&gt;lock);</div><div class='add'>+</div><div class='add'>+	err = __npc_mcam_free_counter(rvu, req, rsp);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mcam-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc,</div><div class='add'>+					 struct rvu_npc_mcam_rule *rule)</div><div class='add'>+{</div><div class='add'>+	struct npc_mcam_oper_counter_req free_req = { 0 };</div><div class='add'>+	struct msg_rsp free_rsp;</div><div class='add'>+</div><div class='add'>+	if (!rule-&gt;has_cntr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	free_req.hdr.pcifunc = pcifunc;</div><div class='add'>+	free_req.cntr = rule-&gt;cntr;</div><div class='add'>+</div><div class='add'>+	__npc_mcam_free_counter(rvu, &amp;free_req, &amp;free_rsp);</div><div class='add'>+	rule-&gt;has_cntr = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc,</div><div class='add'>+				    struct rvu_npc_mcam_rule *rule,</div><div class='add'>+				    struct npc_install_flow_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	struct npc_mcam_alloc_counter_req cntr_req = { 0 };</div><div class='add'>+	struct npc_mcam_alloc_counter_rsp cntr_rsp = { 0 };</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cntr_req.hdr.pcifunc = pcifunc;</div><div class='add'>+	cntr_req.contig = true;</div><div class='add'>+	cntr_req.count = 1;</div><div class='add'>+</div><div class='add'>+	/* we try to allocate a counter to track the stats of this</div><div class='add'>+	 * rule. If counter could not be allocated then proceed</div><div class='add'>+	 * without counter because counters are limited than entries.</div><div class='add'>+	 */</div><div class='add'>+	err = __npc_mcam_alloc_counter(rvu, &amp;cntr_req, &amp;cntr_rsp);</div><div class='add'>+	if (!err &amp;&amp; cntr_rsp.count) {</div><div class='add'>+		rule-&gt;cntr = cntr_rsp.cntr;</div><div class='add'>+		rule-&gt;has_cntr = true;</div><div class='add'>+		rsp-&gt;counter = rule-&gt;cntr;</div><div class='add'>+	} else {</div><div class='add'>+		rsp-&gt;counter = err;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int rvu_mbox_handler_npc_mcam_unmap_counter(struct rvu *rvu,</div><div class='ctx'> 		struct npc_mcam_unmap_counter_req *req, struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='hunk'>@@ -3338,7 +3436,7 @@ int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='ctx'> 	int blkaddr, nixlf, rc, intf_mode;</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	u64 rxpkind, txpkind;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> </div><div class='hunk'>@@ -3478,3 +3576,33 @@ int rvu_mbox_handler_npc_mcam_entry_stats(struct rvu *rvu,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void rvu_npc_clear_ucast_entry(struct rvu *rvu, int pcifunc, int nixlf)</div><div class='add'>+{</div><div class='add'>+	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='add'>+	struct rvu_npc_mcam_rule *rule;</div><div class='add'>+	int ucast_idx, blkaddr;</div><div class='add'>+</div><div class='add'>+	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);</div><div class='add'>+	if (blkaddr &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ucast_idx = npc_get_nixlf_mcam_index(mcam, pcifunc,</div><div class='add'>+					     nixlf, NIXLF_UCAST_ENTRY);</div><div class='add'>+</div><div class='add'>+	npc_enable_mcam_entry(rvu, mcam, blkaddr, ucast_idx, false);</div><div class='add'>+</div><div class='add'>+	npc_set_mcam_action(rvu, mcam, blkaddr, ucast_idx, 0);</div><div class='add'>+</div><div class='add'>+	npc_clear_mcam_entry(rvu, mcam, blkaddr, ucast_idx);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mcam-&gt;lock);</div><div class='add'>+	list_for_each_entry(rule, &amp;mcam-&gt;mcam_rules, list) {</div><div class='add'>+		if (rule-&gt;entry == ucast_idx) {</div><div class='add'>+			list_del(&amp;rule-&gt;list);</div><div class='add'>+			kfree(rule);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;mcam-&gt;lock);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c<br/>index 150635de2bd5..b56395ac5a74 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c</a></div><div class='hunk'>@@ -606,8 +606,8 @@ static void npc_set_features(struct rvu *rvu, int blkaddr, u8 intf)</div><div class='ctx'> 		if (!npc_check_field(rvu, blkaddr, NPC_LB, intf))</div><div class='ctx'> 			*features &amp;= ~BIT_ULL(NPC_OUTER_VID);</div><div class='ctx'> </div><div class='del'>-	/* Set SPI flag only if AH/ESP and IPSEC_SPI are in the key */</div><div class='del'>-	if (npc_check_field(rvu, blkaddr, NPC_IPSEC_SPI, intf) &amp;&amp;</div><div class='add'>+	/* Allow extracting SPI field from AH and ESP headers at same offset */</div><div class='add'>+	if (npc_is_field_present(rvu, NPC_IPSEC_SPI, intf) &amp;&amp;</div><div class='ctx'> 	    (*features &amp; (BIT_ULL(NPC_IPPROTO_ESP) | BIT_ULL(NPC_IPPROTO_AH))))</div><div class='ctx'> 		*features |= BIT_ULL(NPC_IPSEC_SPI);</div><div class='ctx'> </div><div class='hunk'>@@ -1081,44 +1081,26 @@ static void rvu_mcam_add_rule(struct npc_mcam *mcam,</div><div class='ctx'> static void rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 					      struct rvu_npc_mcam_rule *rule)</div><div class='ctx'> {</div><div class='del'>-	struct npc_mcam_oper_counter_req free_req = { 0 };</div><div class='del'>-	struct msg_rsp free_rsp;</div><div class='add'>+	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='ctx'> </div><div class='del'>-	if (!rule-&gt;has_cntr)</div><div class='del'>-		return;</div><div class='add'>+	mutex_lock(&amp;mcam-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	free_req.hdr.pcifunc = pcifunc;</div><div class='del'>-	free_req.cntr = rule-&gt;cntr;</div><div class='add'>+	__rvu_mcam_remove_counter_from_rule(rvu, pcifunc, rule);</div><div class='ctx'> </div><div class='del'>-	rvu_mbox_handler_npc_mcam_free_counter(rvu, &amp;free_req, &amp;free_rsp);</div><div class='del'>-	rule-&gt;has_cntr = false;</div><div class='add'>+	mutex_unlock(&amp;mcam-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc,</div><div class='ctx'> 					 struct rvu_npc_mcam_rule *rule,</div><div class='ctx'> 					 struct npc_install_flow_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	struct npc_mcam_alloc_counter_req cntr_req = { 0 };</div><div class='del'>-	struct npc_mcam_alloc_counter_rsp cntr_rsp = { 0 };</div><div class='del'>-	int err;</div><div class='add'>+	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='ctx'> </div><div class='del'>-	cntr_req.hdr.pcifunc = pcifunc;</div><div class='del'>-	cntr_req.contig = true;</div><div class='del'>-	cntr_req.count = 1;</div><div class='add'>+	mutex_lock(&amp;mcam-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	/* we try to allocate a counter to track the stats of this</div><div class='del'>-	 * rule. If counter could not be allocated then proceed</div><div class='del'>-	 * without counter because counters are limited than entries.</div><div class='del'>-	 */</div><div class='del'>-	err = rvu_mbox_handler_npc_mcam_alloc_counter(rvu, &amp;cntr_req,</div><div class='del'>-						      &amp;cntr_rsp);</div><div class='del'>-	if (!err &amp;&amp; cntr_rsp.count) {</div><div class='del'>-		rule-&gt;cntr = cntr_rsp.cntr;</div><div class='del'>-		rule-&gt;has_cntr = true;</div><div class='del'>-		rsp-&gt;counter = rule-&gt;cntr;</div><div class='del'>-	} else {</div><div class='del'>-		rsp-&gt;counter = err;</div><div class='del'>-	}</div><div class='add'>+	__rvu_mcam_add_counter_to_rule(rvu, pcifunc, rule, rsp);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mcam-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int npc_mcast_update_action_index(struct rvu *rvu, struct npc_install_flow_req *req,</div><div class='hunk'>@@ -1416,6 +1398,7 @@ int rvu_mbox_handler_npc_install_flow(struct rvu *rvu,</div><div class='ctx'> 				      struct npc_install_flow_rsp *rsp)</div><div class='ctx'> {</div><div class='ctx'> 	bool from_vf = !!(req-&gt;hdr.pcifunc &amp; RVU_PFVF_FUNC_MASK);</div><div class='add'>+	bool from_rep_dev = !!is_rep_dev(rvu, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	struct rvu_switch *rswitch = &amp;rvu-&gt;rswitch;</div><div class='ctx'> 	int blkaddr, nixlf, err;</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='hunk'>@@ -1469,18 +1452,21 @@ process_flow:</div><div class='ctx'> 	 * hence modify pcifunc accordingly.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	/* AF installing for a PF/VF */</div><div class='del'>-	if (!req-&gt;hdr.pcifunc)</div><div class='add'>+	if (!req-&gt;hdr.pcifunc) {</div><div class='add'>+		/* AF installing for a PF/VF */</div><div class='ctx'> 		target = req-&gt;vf;</div><div class='del'>-	/* PF installing for its VF */</div><div class='del'>-	else if (!from_vf &amp;&amp; req-&gt;vf) {</div><div class='add'>+	} else if (!from_vf &amp;&amp; req-&gt;vf &amp;&amp; !from_rep_dev) {</div><div class='add'>+		/* PF installing for its VF */</div><div class='ctx'> 		target = (req-&gt;hdr.pcifunc &amp; ~RVU_PFVF_FUNC_MASK) | req-&gt;vf;</div><div class='ctx'> 		pf_set_vfs_mac = req-&gt;default_rule &amp;&amp;</div><div class='ctx'> 				(req-&gt;features &amp; BIT_ULL(NPC_DMAC));</div><div class='del'>-	}</div><div class='del'>-	/* msg received from PF/VF */</div><div class='del'>-	else</div><div class='add'>+	} else if (from_rep_dev &amp;&amp; req-&gt;vf) {</div><div class='add'>+		/* Representor device installing for a representee */</div><div class='add'>+		target = req-&gt;vf;</div><div class='add'>+	} else {</div><div class='add'>+		/* msg received from PF/VF */</div><div class='ctx'> 		target = req-&gt;hdr.pcifunc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* ignore chan_mask in case pf func is not AF, revisit later */</div><div class='ctx'> 	if (!is_pffunc_af(req-&gt;hdr.pcifunc))</div><div class='hunk'>@@ -1492,8 +1478,10 @@ process_flow:</div><div class='ctx'> </div><div class='ctx'> 	pfvf = rvu_get_pfvf(rvu, target);</div><div class='ctx'> </div><div class='add'>+	if (from_rep_dev)</div><div class='add'>+		req-&gt;channel = pfvf-&gt;rx_chan_base;</div><div class='ctx'> 	/* PF installing for its VF */</div><div class='del'>-	if (req-&gt;hdr.pcifunc &amp;&amp; !from_vf &amp;&amp; req-&gt;vf)</div><div class='add'>+	if (req-&gt;hdr.pcifunc &amp;&amp; !from_vf &amp;&amp; req-&gt;vf &amp;&amp; !from_rep_dev)</div><div class='ctx'> 		set_bit(PF_SET_VF_CFG, &amp;pfvf-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	/* update req destination mac addr */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c<br/>index d2661e7fabdb..999f6d93c7fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c</a></div><div class='hunk'>@@ -1465,7 +1465,7 @@ static int rvu_npc_exact_update_table_entry(struct rvu *rvu, u8 cgx_id, u8 lmac_</div><div class='ctx'> int rvu_npc_exact_promisc_disable(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='ctx'> 	struct npc_exact_table *table;</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	u32 drop_mcam_idx;</div><div class='ctx'> 	bool *promisc;</div><div class='hunk'>@@ -1512,7 +1512,7 @@ int rvu_npc_exact_promisc_disable(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> int rvu_npc_exact_promisc_enable(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='ctx'> 	struct npc_exact_table *table;</div><div class='del'>-	int pf = rvu_get_pf(pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	u32 drop_mcam_idx;</div><div class='ctx'> 	bool *promisc;</div><div class='hunk'>@@ -1560,7 +1560,7 @@ int rvu_npc_exact_promisc_enable(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> int rvu_npc_exact_mac_addr_reset(struct rvu *rvu, struct cgx_mac_addr_reset_req *req,</div><div class='ctx'> 				 struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u32 seq_id = req-&gt;index;</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='hunk'>@@ -1593,7 +1593,7 @@ int rvu_npc_exact_mac_addr_update(struct rvu *rvu,</div><div class='ctx'> 				  struct cgx_mac_addr_update_req *req,</div><div class='ctx'> 				  struct cgx_mac_addr_update_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	struct npc_exact_table_entry *entry;</div><div class='ctx'> 	struct npc_exact_table *table;</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='hunk'>@@ -1675,7 +1675,7 @@ int rvu_npc_exact_mac_addr_add(struct rvu *rvu,</div><div class='ctx'> 			       struct cgx_mac_addr_add_req *req,</div><div class='ctx'> 			       struct cgx_mac_addr_add_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='ctx'> 	int rc = 0;</div><div class='hunk'>@@ -1711,7 +1711,7 @@ int rvu_npc_exact_mac_addr_del(struct rvu *rvu,</div><div class='ctx'> 			       struct cgx_mac_addr_del_req *req,</div><div class='ctx'> 			       struct msg_rsp *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	rc = rvu_npc_exact_del_table_entry_by_id(rvu, req-&gt;index);</div><div class='hunk'>@@ -1736,7 +1736,7 @@ int rvu_npc_exact_mac_addr_del(struct rvu *rvu,</div><div class='ctx'> int rvu_npc_exact_mac_addr_set(struct rvu *rvu, struct cgx_mac_addr_set_or_get *req,</div><div class='ctx'> 			       struct cgx_mac_addr_set_or_get *rsp)</div><div class='ctx'> {</div><div class='del'>-	int pf = rvu_get_pf(req-&gt;hdr.pcifunc);</div><div class='add'>+	int pf = rvu_get_pf(rvu-&gt;pdev, req-&gt;hdr.pcifunc);</div><div class='ctx'> 	u32 seq_id = req-&gt;index;</div><div class='ctx'> 	struct rvu_pfvf *pfvf;</div><div class='ctx'> 	u8 cgx_id, lmac_id;</div><div class='hunk'>@@ -2001,7 +2001,7 @@ int rvu_npc_exact_init(struct rvu *rvu)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Filter rules are only for PF */</div><div class='del'>-		pcifunc = RVU_PFFUNC(i, 0);</div><div class='add'>+		pcifunc = RVU_PFFUNC(rvu-&gt;pdev, i, 0);</div><div class='ctx'> </div><div class='ctx'> 		dev_dbg(rvu-&gt;dev,</div><div class='ctx'> 			"%s:Drop rule cgx=%d lmac=%d chan(val=0x%llx, mask=0x%llx\n",</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h<br/>index 57a09328d46b..cb25cf478f1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h</a></div><div class='hunk'>@@ -139,9 +139,7 @@ static struct npc_mcam_kex_hash npc_mkex_hash_default __maybe_unused = {</div><div class='ctx'> #define NPC_MCAM_DROP_RULE_MAX 30</div><div class='ctx'> #define NPC_MCAM_SDP_DROP_RULE_IDX 0</div><div class='ctx'> </div><div class='del'>-#define RVU_PFFUNC(pf, func)	\</div><div class='del'>-	((((pf) &amp; RVU_PFVF_PF_MASK) &lt;&lt; RVU_PFVF_PF_SHIFT) | \</div><div class='del'>-	(((func) &amp; RVU_PFVF_FUNC_MASK) &lt;&lt; RVU_PFVF_FUNC_SHIFT))</div><div class='add'>+#define RVU_PFFUNC(pdev, pf, func) rvu_make_pcifunc(pdev, pf, func)</div><div class='ctx'> </div><div class='ctx'> enum npc_exact_opc_type {</div><div class='ctx'> 	NPC_EXACT_OPC_MEM,</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h<br/>index 2b299fa85159..62cdc714ba57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h</a></div><div class='hunk'>@@ -445,6 +445,7 @@</div><div class='ctx'> </div><div class='ctx'> #define NIX_CONST_MAX_BPIDS		GENMASK_ULL(23, 12)</div><div class='ctx'> #define NIX_CONST_SDP_CHANS		GENMASK_ULL(11, 0)</div><div class='add'>+#define NIX_VLAN_ETYPE_MASK		GENMASK_ULL(63, 48)</div><div class='ctx'> </div><div class='ctx'> #define NIX_AF_MDQ_PARENT_MASK         GENMASK_ULL(24, 16)</div><div class='ctx'> #define NIX_AF_TL4_PARENT_MASK         GENMASK_ULL(23, 16)</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c<br/>new file mode 100644<br/>index 000000000000..4415d0ce9aef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c</a></div><div class='hunk'>@@ -0,0 +1,469 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Marvell RVU Admin Function driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rvu.h"</div><div class='add'>+#include "rvu_reg.h"</div><div class='add'>+</div><div class='add'>+#define M(_name, _id, _fn_name, _req_type, _rsp_type)			\</div><div class='add'>+static struct _req_type __maybe_unused					\</div><div class='add'>+*otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid)		\</div><div class='add'>+{									\</div><div class='add'>+	struct _req_type *req;						\</div><div class='add'>+									\</div><div class='add'>+	req = (struct _req_type *)otx2_mbox_alloc_msg_rsp(		\</div><div class='add'>+		&amp;rvu-&gt;afpf_wq_info.mbox_up, devid, sizeof(struct _req_type), \</div><div class='add'>+		sizeof(struct _rsp_type));				\</div><div class='add'>+	if (!req)							\</div><div class='add'>+		return NULL;						\</div><div class='add'>+	req-&gt;hdr.sig = OTX2_MBOX_REQ_SIG;				\</div><div class='add'>+	req-&gt;hdr.id = _id;						\</div><div class='add'>+	return req;							\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MBOX_UP_REP_MESSAGES</div><div class='add'>+#undef M</div><div class='add'>+</div><div class='add'>+static int rvu_rep_up_notify(struct rvu *rvu, struct rep_event *event)</div><div class='add'>+{</div><div class='add'>+	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, event-&gt;pcifunc);</div><div class='add'>+	struct rep_event *msg;</div><div class='add'>+	int pf;</div><div class='add'>+</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, event-&gt;pcifunc);</div><div class='add'>+</div><div class='add'>+	if (event-&gt;event &amp; RVU_EVENT_MAC_ADDR_CHANGE)</div><div class='add'>+		ether_addr_copy(pfvf-&gt;mac_addr, event-&gt;evt_data.mac);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;rvu-&gt;mbox_lock);</div><div class='add'>+	msg = otx2_mbox_alloc_msg_rep_event_up_notify(rvu, pf);</div><div class='add'>+	if (!msg) {</div><div class='add'>+		mutex_unlock(&amp;rvu-&gt;mbox_lock);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg-&gt;hdr.pcifunc = event-&gt;pcifunc;</div><div class='add'>+	msg-&gt;event = event-&gt;event;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;msg-&gt;evt_data, &amp;event-&gt;evt_data, sizeof(struct rep_evt_data));</div><div class='add'>+</div><div class='add'>+	otx2_mbox_wait_for_zero(&amp;rvu-&gt;afpf_wq_info.mbox_up, pf);</div><div class='add'>+</div><div class='add'>+	otx2_mbox_msg_send_up(&amp;rvu-&gt;afpf_wq_info.mbox_up, pf);</div><div class='add'>+</div><div class='add'>+	otx2_mbox_wait_for_rsp(&amp;rvu-&gt;afpf_wq_info.mbox_up, pf);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;rvu-&gt;mbox_lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rvu_rep_wq_handler(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct rvu *rvu = container_of(work, struct rvu, rep_evt_work);</div><div class='add'>+	struct rep_evtq_ent *qentry;</div><div class='add'>+	struct rep_event *event;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		spin_lock_irqsave(&amp;rvu-&gt;rep_evtq_lock, flags);</div><div class='add'>+		qentry = list_first_entry_or_null(&amp;rvu-&gt;rep_evtq_head,</div><div class='add'>+						  struct rep_evtq_ent,</div><div class='add'>+						  node);</div><div class='add'>+		if (qentry)</div><div class='add'>+			list_del(&amp;qentry-&gt;node);</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(&amp;rvu-&gt;rep_evtq_lock, flags);</div><div class='add'>+		if (!qentry)</div><div class='add'>+			break; /* nothing more to process */</div><div class='add'>+</div><div class='add'>+		event = &amp;qentry-&gt;event;</div><div class='add'>+</div><div class='add'>+		rvu_rep_up_notify(rvu, event);</div><div class='add'>+		kfree(qentry);</div><div class='add'>+	} while (1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_mbox_handler_rep_event_notify(struct rvu *rvu, struct rep_event *req,</div><div class='add'>+				      struct msg_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	struct rep_evtq_ent *qentry;</div><div class='add'>+</div><div class='add'>+	qentry = kmalloc(sizeof(*qentry), GFP_ATOMIC);</div><div class='add'>+	if (!qentry)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	qentry-&gt;event = *req;</div><div class='add'>+	spin_lock(&amp;rvu-&gt;rep_evtq_lock);</div><div class='add'>+	list_add_tail(&amp;qentry-&gt;node, &amp;rvu-&gt;rep_evtq_head);</div><div class='add'>+	spin_unlock(&amp;rvu-&gt;rep_evtq_lock);</div><div class='add'>+	queue_work(rvu-&gt;rep_evt_wq, &amp;rvu-&gt;rep_evt_work);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_rep_notify_pfvf_state(struct rvu *rvu, u16 pcifunc, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct rep_event *req;</div><div class='add'>+	int pf;</div><div class='add'>+</div><div class='add'>+	if (!is_pf_cgxmapped(rvu, rvu_get_pf(rvu-&gt;pdev, pcifunc)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	pf = rvu_get_pf(rvu-&gt;pdev, rvu-&gt;rep_pcifunc);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;rvu-&gt;mbox_lock);</div><div class='add'>+	req = otx2_mbox_alloc_msg_rep_event_up_notify(rvu, pf);</div><div class='add'>+	if (!req) {</div><div class='add'>+		mutex_unlock(&amp;rvu-&gt;mbox_lock);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req-&gt;hdr.pcifunc = rvu-&gt;rep_pcifunc;</div><div class='add'>+	req-&gt;event |= RVU_EVENT_PFVF_STATE;</div><div class='add'>+	req-&gt;pcifunc = pcifunc;</div><div class='add'>+	req-&gt;evt_data.vf_state = enable;</div><div class='add'>+</div><div class='add'>+	otx2_mbox_wait_for_zero(&amp;rvu-&gt;afpf_wq_info.mbox_up, pf);</div><div class='add'>+	otx2_mbox_msg_send_up(&amp;rvu-&gt;afpf_wq_info.mbox_up, pf);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;rvu-&gt;mbox_lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define RVU_LF_RX_STATS(reg) \</div><div class='add'>+		rvu_read64(rvu, blkaddr, NIX_AF_LFX_RX_STATX(nixlf, reg))</div><div class='add'>+</div><div class='add'>+#define RVU_LF_TX_STATS(reg) \</div><div class='add'>+		rvu_read64(rvu, blkaddr, NIX_AF_LFX_TX_STATX(nixlf, reg))</div><div class='add'>+</div><div class='add'>+int rvu_mbox_handler_nix_lf_stats(struct rvu *rvu,</div><div class='add'>+				  struct nix_stats_req *req,</div><div class='add'>+				  struct nix_stats_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	u16 pcifunc = req-&gt;pcifunc;</div><div class='add'>+	int nixlf, blkaddr, err;</div><div class='add'>+	struct msg_req rst_req;</div><div class='add'>+	struct msg_rsp rst_rsp;</div><div class='add'>+</div><div class='add'>+	err = nix_get_nixlf(rvu, pcifunc, &amp;nixlf, &amp;blkaddr);</div><div class='add'>+	if (err)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;reset) {</div><div class='add'>+		rst_req.hdr.pcifunc = pcifunc;</div><div class='add'>+		return rvu_mbox_handler_nix_stats_rst(rvu, &amp;rst_req, &amp;rst_rsp);</div><div class='add'>+	}</div><div class='add'>+	rsp-&gt;rx.octs = RVU_LF_RX_STATS(RX_OCTS);</div><div class='add'>+	rsp-&gt;rx.ucast = RVU_LF_RX_STATS(RX_UCAST);</div><div class='add'>+	rsp-&gt;rx.bcast = RVU_LF_RX_STATS(RX_BCAST);</div><div class='add'>+	rsp-&gt;rx.mcast = RVU_LF_RX_STATS(RX_MCAST);</div><div class='add'>+	rsp-&gt;rx.drop = RVU_LF_RX_STATS(RX_DROP);</div><div class='add'>+	rsp-&gt;rx.err = RVU_LF_RX_STATS(RX_ERR);</div><div class='add'>+	rsp-&gt;rx.drop_octs = RVU_LF_RX_STATS(RX_DROP_OCTS);</div><div class='add'>+	rsp-&gt;rx.drop_mcast = RVU_LF_RX_STATS(RX_DRP_MCAST);</div><div class='add'>+	rsp-&gt;rx.drop_bcast = RVU_LF_RX_STATS(RX_DRP_BCAST);</div><div class='add'>+</div><div class='add'>+	rsp-&gt;tx.octs = RVU_LF_TX_STATS(TX_OCTS);</div><div class='add'>+	rsp-&gt;tx.ucast = RVU_LF_TX_STATS(TX_UCAST);</div><div class='add'>+	rsp-&gt;tx.bcast = RVU_LF_TX_STATS(TX_BCAST);</div><div class='add'>+	rsp-&gt;tx.mcast = RVU_LF_TX_STATS(TX_MCAST);</div><div class='add'>+	rsp-&gt;tx.drop = RVU_LF_TX_STATS(TX_DROP);</div><div class='add'>+</div><div class='add'>+	rsp-&gt;pcifunc = req-&gt;pcifunc;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 rvu_rep_get_vlan_id(struct rvu *rvu, u16 pcifunc)</div><div class='add'>+{</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	for (id = 0; id &lt; rvu-&gt;rep_cnt; id++)</div><div class='add'>+		if (rvu-&gt;rep2pfvf_map[id] == pcifunc)</div><div class='add'>+			return id;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_tx_vlan_cfg(struct rvu *rvu,  u16 pcifunc,</div><div class='add'>+			       u16 vlan_tci, int *vidx)</div><div class='add'>+{</div><div class='add'>+	struct nix_vtag_config_rsp rsp = {};</div><div class='add'>+	struct nix_vtag_config req = {};</div><div class='add'>+	u64 etype = ETH_P_8021Q;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Insert vlan tag */</div><div class='add'>+	req.hdr.pcifunc = pcifunc;</div><div class='add'>+	req.vtag_size = VTAGSIZE_T4;</div><div class='add'>+	req.cfg_type = 0; /* tx vlan cfg */</div><div class='add'>+	req.tx.cfg_vtag0 = true;</div><div class='add'>+	req.tx.vtag0 = FIELD_PREP(NIX_VLAN_ETYPE_MASK, etype) | vlan_tci;</div><div class='add'>+</div><div class='add'>+	err = rvu_mbox_handler_nix_vtag_cfg(rvu, &amp;req, &amp;rsp);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(rvu-&gt;dev, "Tx vlan config failed\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	*vidx = rsp.vtag0_idx;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_rx_vlan_cfg(struct rvu *rvu, u16 pcifunc)</div><div class='add'>+{</div><div class='add'>+	struct nix_vtag_config req = {};</div><div class='add'>+	struct nix_vtag_config_rsp rsp;</div><div class='add'>+</div><div class='add'>+	/* config strip, capture and size */</div><div class='add'>+	req.hdr.pcifunc = pcifunc;</div><div class='add'>+	req.vtag_size = VTAGSIZE_T4;</div><div class='add'>+	req.cfg_type = 1; /* rx vlan cfg */</div><div class='add'>+	req.rx.vtag_type = NIX_AF_LFX_RX_VTAG_TYPE0;</div><div class='add'>+	req.rx.strip_vtag = true;</div><div class='add'>+	req.rx.capture_vtag = false;</div><div class='add'>+</div><div class='add'>+	return rvu_mbox_handler_nix_vtag_cfg(rvu, &amp;req, &amp;rsp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_install_rx_rule(struct rvu *rvu, u16 pcifunc,</div><div class='add'>+				   u16 entry, bool rte)</div><div class='add'>+{</div><div class='add'>+	struct npc_install_flow_req req = {};</div><div class='add'>+	struct npc_install_flow_rsp rsp = {};</div><div class='add'>+	struct rvu_pfvf *pfvf;</div><div class='add'>+	u16 vlan_tci, rep_id;</div><div class='add'>+</div><div class='add'>+	pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='add'>+</div><div class='add'>+	/* To steer the traffic from Representee to Representor */</div><div class='add'>+	rep_id = rvu_rep_get_vlan_id(rvu, pcifunc);</div><div class='add'>+	if (rte) {</div><div class='add'>+		vlan_tci = rep_id | BIT_ULL(8);</div><div class='add'>+		req.vf = rvu-&gt;rep_pcifunc;</div><div class='add'>+		req.op = NIX_RX_ACTIONOP_UCAST;</div><div class='add'>+		req.index = rep_id;</div><div class='add'>+	} else {</div><div class='add'>+		vlan_tci = rep_id;</div><div class='add'>+		req.vf = pcifunc;</div><div class='add'>+		req.op = NIX_RX_ACTION_DEFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rvu_rep_rx_vlan_cfg(rvu, req.vf);</div><div class='add'>+	req.entry = entry;</div><div class='add'>+	req.hdr.pcifunc = 0; /* AF is requester */</div><div class='add'>+	req.features = BIT_ULL(NPC_OUTER_VID) | BIT_ULL(NPC_VLAN_ETYPE_CTAG);</div><div class='add'>+	req.vtag0_valid = true;</div><div class='add'>+	req.vtag0_type = NIX_AF_LFX_RX_VTAG_TYPE0;</div><div class='add'>+	req.packet.vlan_etype = cpu_to_be16(ETH_P_8021Q);</div><div class='add'>+	req.mask.vlan_etype = cpu_to_be16(ETH_P_8021Q);</div><div class='add'>+	req.packet.vlan_tci = cpu_to_be16(vlan_tci);</div><div class='add'>+	req.mask.vlan_tci = cpu_to_be16(0xffff);</div><div class='add'>+</div><div class='add'>+	req.channel = RVU_SWITCH_LBK_CHAN;</div><div class='add'>+	req.chan_mask = 0xffff;</div><div class='add'>+	req.intf = pfvf-&gt;nix_rx_intf;</div><div class='add'>+</div><div class='add'>+	return rvu_mbox_handler_npc_install_flow(rvu, &amp;req, &amp;rsp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_install_tx_rule(struct rvu *rvu, u16 pcifunc, u16 entry,</div><div class='add'>+				   bool rte)</div><div class='add'>+{</div><div class='add'>+	struct npc_install_flow_req req = {};</div><div class='add'>+	struct npc_install_flow_rsp rsp = {};</div><div class='add'>+	struct rvu_pfvf *pfvf;</div><div class='add'>+	int vidx, err;</div><div class='add'>+	u16 vlan_tci;</div><div class='add'>+	u8 lbkid;</div><div class='add'>+</div><div class='add'>+	pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='add'>+	vlan_tci = rvu_rep_get_vlan_id(rvu, pcifunc);</div><div class='add'>+	if (rte)</div><div class='add'>+		vlan_tci |= BIT_ULL(8);</div><div class='add'>+</div><div class='add'>+	err = rvu_rep_tx_vlan_cfg(rvu, pcifunc, vlan_tci, &amp;vidx);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	lbkid = pfvf-&gt;nix_blkaddr == BLKADDR_NIX0 ? 0 : 1;</div><div class='add'>+	req.hdr.pcifunc = 0; /* AF is requester */</div><div class='add'>+	if (rte) {</div><div class='add'>+		req.vf = pcifunc;</div><div class='add'>+	} else {</div><div class='add'>+		req.vf = rvu-&gt;rep_pcifunc;</div><div class='add'>+		req.packet.sq_id = vlan_tci;</div><div class='add'>+		req.mask.sq_id = 0xffff;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req.entry = entry;</div><div class='add'>+	req.intf = pfvf-&gt;nix_tx_intf;</div><div class='add'>+	req.op = NIX_TX_ACTIONOP_UCAST_CHAN;</div><div class='add'>+	req.index = (lbkid &lt;&lt; 8) | RVU_SWITCH_LBK_CHAN;</div><div class='add'>+	req.set_cntr = 1;</div><div class='add'>+	req.vtag0_def = vidx;</div><div class='add'>+	req.vtag0_op = 1;</div><div class='add'>+	return rvu_mbox_handler_npc_install_flow(rvu, &amp;req, &amp;rsp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_rep_install_mcam_rules(struct rvu *rvu)</div><div class='add'>+{</div><div class='add'>+	struct rvu_switch *rswitch = &amp;rvu-&gt;rswitch;</div><div class='add'>+	u16 start = rswitch-&gt;start_entry;</div><div class='add'>+	struct rvu_hwinfo *hw = rvu-&gt;hw;</div><div class='add'>+	u16 pcifunc, entry = 0;</div><div class='add'>+	int pf, vf, numvfs;</div><div class='add'>+	int err, nixlf, i;</div><div class='add'>+	u8 rep;</div><div class='add'>+</div><div class='add'>+	for (pf = 1; pf &lt; hw-&gt;total_pfs; pf++) {</div><div class='add'>+		if (!is_pf_cgxmapped(rvu, pf))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, 0);</div><div class='add'>+		rvu_get_nix_blkaddr(rvu, pcifunc);</div><div class='add'>+		rep = true;</div><div class='add'>+		for (i = 0; i &lt; 2; i++) {</div><div class='add'>+			err = rvu_rep_install_rx_rule(rvu, pcifunc,</div><div class='add'>+						      start + entry, rep);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+			rswitch-&gt;entry2pcifunc[entry++] = pcifunc;</div><div class='add'>+</div><div class='add'>+			err = rvu_rep_install_tx_rule(rvu, pcifunc,</div><div class='add'>+						      start + entry, rep);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+			rswitch-&gt;entry2pcifunc[entry++] = pcifunc;</div><div class='add'>+			rep = false;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rvu_get_pf_numvfs(rvu, pf, &amp;numvfs, NULL);</div><div class='add'>+		for (vf = 0; vf &lt; numvfs; vf++) {</div><div class='add'>+			pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, vf + 1);</div><div class='add'>+			rvu_get_nix_blkaddr(rvu, pcifunc);</div><div class='add'>+</div><div class='add'>+			/* Skip installimg rules if nixlf is not attached */</div><div class='add'>+			err = nix_get_nixlf(rvu, pcifunc, &amp;nixlf, NULL);</div><div class='add'>+			if (err)</div><div class='add'>+				continue;</div><div class='add'>+			rep = true;</div><div class='add'>+			for (i = 0; i &lt; 2; i++) {</div><div class='add'>+				err = rvu_rep_install_rx_rule(rvu, pcifunc,</div><div class='add'>+							      start + entry,</div><div class='add'>+							      rep);</div><div class='add'>+				if (err)</div><div class='add'>+					return err;</div><div class='add'>+				rswitch-&gt;entry2pcifunc[entry++] = pcifunc;</div><div class='add'>+</div><div class='add'>+				err = rvu_rep_install_tx_rule(rvu, pcifunc,</div><div class='add'>+							      start + entry,</div><div class='add'>+							      rep);</div><div class='add'>+				if (err)</div><div class='add'>+					return err;</div><div class='add'>+				rswitch-&gt;entry2pcifunc[entry++] = pcifunc;</div><div class='add'>+				rep = false;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize the wq for handling REP events */</div><div class='add'>+	spin_lock_init(&amp;rvu-&gt;rep_evtq_lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;rvu-&gt;rep_evtq_head);</div><div class='add'>+	INIT_WORK(&amp;rvu-&gt;rep_evt_work, rvu_rep_wq_handler);</div><div class='add'>+	rvu-&gt;rep_evt_wq = alloc_workqueue("rep_evt_wq", WQ_PERCPU, 0);</div><div class='add'>+	if (!rvu-&gt;rep_evt_wq) {</div><div class='add'>+		dev_err(rvu-&gt;dev, "REP workqueue allocation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rvu_rep_update_rules(struct rvu *rvu, u16 pcifunc, bool ena)</div><div class='add'>+{</div><div class='add'>+	struct rvu_switch *rswitch = &amp;rvu-&gt;rswitch;</div><div class='add'>+	struct npc_mcam *mcam = &amp;rvu-&gt;hw-&gt;mcam;</div><div class='add'>+	u32 max = rswitch-&gt;used_entries;</div><div class='add'>+	int blkaddr;</div><div class='add'>+	u16 entry;</div><div class='add'>+</div><div class='add'>+	if (!rswitch-&gt;used_entries)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);</div><div class='add'>+</div><div class='add'>+	if (blkaddr &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rvu_switch_enable_lbk_link(rvu, pcifunc, ena);</div><div class='add'>+	mutex_lock(&amp;mcam-&gt;lock);</div><div class='add'>+	for (entry = 0; entry &lt; max; entry++) {</div><div class='add'>+		if (rswitch-&gt;entry2pcifunc[entry] == pcifunc)</div><div class='add'>+			npc_enable_mcam_entry(rvu, mcam, blkaddr, entry, ena);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;mcam-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_rep_pf_init(struct rvu *rvu)</div><div class='add'>+{</div><div class='add'>+	u16 pcifunc = rvu-&gt;rep_pcifunc;</div><div class='add'>+	struct rvu_pfvf *pfvf;</div><div class='add'>+</div><div class='add'>+	pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='add'>+	set_bit(NIXLF_INITIALIZED, &amp;pfvf-&gt;flags);</div><div class='add'>+	rvu_switch_enable_lbk_link(rvu, pcifunc, true);</div><div class='add'>+	rvu_rep_rx_vlan_cfg(rvu, pcifunc);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_mbox_handler_esw_cfg(struct rvu *rvu, struct esw_cfg_req *req,</div><div class='add'>+			     struct msg_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	if (req-&gt;hdr.pcifunc != rvu-&gt;rep_pcifunc)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rvu-&gt;rep_mode = req-&gt;ena;</div><div class='add'>+</div><div class='add'>+	if (!rvu-&gt;rep_mode)</div><div class='add'>+		rvu_npc_free_mcam_entries(rvu, req-&gt;hdr.pcifunc, -1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_mbox_handler_get_rep_cnt(struct rvu *rvu, struct msg_req *req,</div><div class='add'>+				 struct get_rep_cnt_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	int pf, vf, numvfs, hwvf, rep = 0;</div><div class='add'>+	u16 pcifunc;</div><div class='add'>+</div><div class='add'>+	rvu-&gt;rep_pcifunc = req-&gt;hdr.pcifunc;</div><div class='add'>+	rsp-&gt;rep_cnt = rvu-&gt;cgx_mapped_pfs + rvu-&gt;cgx_mapped_vfs;</div><div class='add'>+	rvu-&gt;rep_cnt = rsp-&gt;rep_cnt;</div><div class='add'>+</div><div class='add'>+	rvu-&gt;rep2pfvf_map = devm_kzalloc(rvu-&gt;dev, rvu-&gt;rep_cnt *</div><div class='add'>+					 sizeof(u16), GFP_KERNEL);</div><div class='add'>+	if (!rvu-&gt;rep2pfvf_map)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (pf = 0; pf &lt; rvu-&gt;hw-&gt;total_pfs; pf++) {</div><div class='add'>+		if (!is_pf_cgxmapped(rvu, pf))</div><div class='add'>+			continue;</div><div class='add'>+		pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, 0);</div><div class='add'>+		rvu-&gt;rep2pfvf_map[rep] = pcifunc;</div><div class='add'>+		rsp-&gt;rep_pf_map[rep] = pcifunc;</div><div class='add'>+		rep++;</div><div class='add'>+		rvu_get_pf_numvfs(rvu, pf, &amp;numvfs, &amp;hwvf);</div><div class='add'>+		for (vf = 0; vf &lt; numvfs; vf++) {</div><div class='add'>+			rvu-&gt;rep2pfvf_map[rep] = pcifunc |</div><div class='add'>+				((vf + 1) &amp; RVU_PFVF_FUNC_MASK);</div><div class='add'>+			rsp-&gt;rep_pf_map[rep] = rvu-&gt;rep2pfvf_map[rep];</div><div class='add'>+			rep++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c<br/>index 38cfe148f4b7..e4a5f9fa6fd4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c</a></div><div class='hunk'>@@ -17,9 +17,9 @@</div><div class='ctx'> /* SDP PF number */</div><div class='ctx'> static int sdp_pf_num[MAX_SDP] = {-1, -1};</div><div class='ctx'> </div><div class='del'>-bool is_sdp_pfvf(u16 pcifunc)</div><div class='add'>+bool is_sdp_pfvf(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='del'>-	u16 pf = rvu_get_pf(pcifunc);</div><div class='add'>+	u16 pf = rvu_get_pf(rvu-&gt;pdev, pcifunc);</div><div class='ctx'> 	u32 found = 0, i = 0;</div><div class='ctx'> </div><div class='ctx'> 	while (i &lt; MAX_SDP) {</div><div class='hunk'>@@ -34,9 +34,9 @@ bool is_sdp_pfvf(u16 pcifunc)</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool is_sdp_pf(u16 pcifunc)</div><div class='add'>+bool is_sdp_pf(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> {</div><div class='del'>-	return (is_sdp_pfvf(pcifunc) &amp;&amp;</div><div class='add'>+	return (is_sdp_pfvf(rvu, pcifunc) &amp;&amp;</div><div class='ctx'> 		!(pcifunc &amp; RVU_PFVF_FUNC_MASK));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -46,7 +46,7 @@ bool is_sdp_vf(struct rvu *rvu, u16 pcifunc)</div><div class='ctx'> 	if (!(pcifunc &amp; ~RVU_PFVF_FUNC_MASK))</div><div class='ctx'> 		return (rvu-&gt;vf_devid == RVU_SDP_VF_DEVID);</div><div class='ctx'> </div><div class='del'>-	return (is_sdp_pfvf(pcifunc) &amp;&amp;</div><div class='add'>+	return (is_sdp_pfvf(rvu, pcifunc) &amp;&amp;</div><div class='ctx'> 		!!(pcifunc &amp; RVU_PFVF_FUNC_MASK));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h<br/>index fc8da2090657..8e868f815de1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h</a></div><div class='hunk'>@@ -13,6 +13,8 @@</div><div class='ctx'> </div><div class='ctx'> #define RVU_MULTI_BLK_VER		0x7ULL</div><div class='ctx'> </div><div class='add'>+#define NIX_MAX_CTX_SIZE		128</div><div class='add'>+</div><div class='ctx'> /* RVU Block Address Enumeration */</div><div class='ctx'> enum rvu_block_addr_e {</div><div class='ctx'> 	BLKADDR_RVUM		= 0x0ULL,</div><div class='hunk'>@@ -33,7 +35,8 @@ enum rvu_block_addr_e {</div><div class='ctx'> 	BLKADDR_NDC_NIX1_RX	= 0x10ULL,</div><div class='ctx'> 	BLKADDR_NDC_NIX1_TX	= 0x11ULL,</div><div class='ctx'> 	BLKADDR_APR		= 0x16ULL,</div><div class='del'>-	BLK_COUNT		= 0x17ULL,</div><div class='add'>+	BLKADDR_MBOX		= 0x1bULL,</div><div class='add'>+	BLK_COUNT		= 0x1cULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* RVU Block Type Enumeration */</div><div class='hunk'>@@ -49,7 +52,8 @@ enum rvu_block_type_e {</div><div class='ctx'> 	BLKTYPE_TIM  = 0x8,</div><div class='ctx'> 	BLKTYPE_CPT  = 0x9,</div><div class='ctx'> 	BLKTYPE_NDC  = 0xa,</div><div class='del'>-	BLKTYPE_MAX  = 0xa,</div><div class='add'>+	BLKTYPE_MBOX = 0x13,</div><div class='add'>+	BLKTYPE_MAX  = 0x13,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* RVU Admin function Interrupt Vector Enumeration */</div><div class='hunk'>@@ -368,8 +372,12 @@ struct nix_cq_ctx_s {</div><div class='ctx'> 	u64 qsize		: 4;</div><div class='ctx'> 	u64 cq_err_int		: 8;</div><div class='ctx'> 	u64 cq_err_int_ena	: 8;</div><div class='add'>+	/* Ensure all context sizes are 128 bytes */</div><div class='add'>+	u64 padding[12];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static_assert(sizeof(struct nix_cq_ctx_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='ctx'> /* CN10K NIX Receive queue context structure */</div><div class='ctx'> struct nix_cn10k_rq_ctx_s {</div><div class='ctx'> 	u64 ena			: 1;</div><div class='hunk'>@@ -411,7 +419,8 @@ struct nix_cn10k_rq_ctx_s {</div><div class='ctx'> 	u64 rsvd_171		: 1;</div><div class='ctx'> 	u64 later_skip		: 6;</div><div class='ctx'> 	u64 xqe_imm_size	: 6;</div><div class='del'>-	u64 rsvd_189_184	: 6;</div><div class='add'>+	u64 band_prof_id_h	: 4;</div><div class='add'>+	u64 rsvd_189_188	: 2;</div><div class='ctx'> 	u64 xqe_imm_copy	: 1;</div><div class='ctx'> 	u64 xqe_hdr_split	: 1;</div><div class='ctx'> 	u64 xqe_drop		: 8; /* W3 */</div><div class='hunk'>@@ -458,6 +467,8 @@ struct nix_cn10k_rq_ctx_s {</div><div class='ctx'> 	u64 rsvd_1023_960;		/* W15 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static_assert(sizeof(struct nix_cn10k_rq_ctx_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='ctx'> /* CN10K NIX Send queue context structure */</div><div class='ctx'> struct nix_cn10k_sq_ctx_s {</div><div class='ctx'> 	u64 ena                   : 1;</div><div class='hunk'>@@ -521,6 +532,8 @@ struct nix_cn10k_sq_ctx_s {</div><div class='ctx'> 	u64 rsvd_1023_1008        : 16;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static_assert(sizeof(struct nix_cn10k_sq_ctx_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='ctx'> /* NIX Receive queue context structure */</div><div class='ctx'> struct nix_rq_ctx_s {</div><div class='ctx'> 	u64 ena           : 1;</div><div class='hunk'>@@ -592,6 +605,8 @@ struct nix_rq_ctx_s {</div><div class='ctx'> 	u64 rsvd_1023_960;		/* W15 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static_assert(sizeof(struct nix_rq_ctx_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='ctx'> /* NIX sqe sizes */</div><div class='ctx'> enum nix_maxsqesz {</div><div class='ctx'> 	NIX_MAXSQESZ_W16 = 0x0,</div><div class='hunk'>@@ -666,13 +681,18 @@ struct nix_sq_ctx_s {</div><div class='ctx'> 	u64 rsvd_1023_1008        : 16;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static_assert(sizeof(struct nix_sq_ctx_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='ctx'> /* NIX Receive side scaling entry structure*/</div><div class='ctx'> struct nix_rsse_s {</div><div class='ctx'> 	uint32_t rq			: 20;</div><div class='ctx'> 	uint32_t reserved_20_31		: 12;</div><div class='del'>-</div><div class='add'>+	/* Ensure all context sizes are minimum 128 bytes */</div><div class='add'>+	u64 padding[15];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static_assert(sizeof(struct nix_rsse_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='ctx'> /* NIX receive multicast/mirror entry structure */</div><div class='ctx'> struct nix_rx_mce_s {</div><div class='ctx'> 	uint64_t op         : 2;</div><div class='hunk'>@@ -682,8 +702,12 @@ struct nix_rx_mce_s {</div><div class='ctx'> 	uint64_t rsvd_31_24 : 8;</div><div class='ctx'> 	uint64_t pf_func    : 16;</div><div class='ctx'> 	uint64_t next       : 16;</div><div class='add'>+	/* Ensure all context sizes are minimum 128 bytes */</div><div class='add'>+	u64 padding[15];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static_assert(sizeof(struct nix_rx_mce_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='ctx'> enum nix_band_prof_layers {</div><div class='ctx'> 	BAND_PROF_LEAF_LAYER = 0,</div><div class='ctx'> 	BAND_PROF_INVAL_LAYER = 1,</div><div class='hunk'>@@ -734,7 +758,8 @@ struct nix_bandprof_s {</div><div class='ctx'> 	uint64_t rc_action                   :  2;</div><div class='ctx'> 	uint64_t meter_algo                  :  2;</div><div class='ctx'> 	uint64_t band_prof_id                :  7;</div><div class='del'>-	uint64_t reserved_111_118            :  8;</div><div class='add'>+	uint64_t band_prof_id_h              :  4;</div><div class='add'>+	uint64_t reserved_115_118            :  4;</div><div class='ctx'> 	uint64_t hl_en                       :  1;</div><div class='ctx'> 	uint64_t reserved_120_127            :  8;</div><div class='ctx'> 	uint64_t ts                          : 48; /* W2 */</div><div class='hunk'>@@ -767,6 +792,8 @@ struct nix_bandprof_s {</div><div class='ctx'> 	uint64_t reserved_1008_1023          : 16;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static_assert(sizeof(struct nix_bandprof_s) == NIX_MAX_CTX_SIZE);</div><div class='add'>+</div><div class='ctx'> enum nix_lsoalg {</div><div class='ctx'> 	NIX_LSOALG_NOP,</div><div class='ctx'> 	NIX_LSOALG_ADD_SEGNUM,</div><div class='hunk'>@@ -823,4 +850,30 @@ enum nix_tx_vtag_op {</div><div class='ctx'> #define VTAG_STRIP	BIT_ULL(4)</div><div class='ctx'> #define VTAG_CAPTURE	BIT_ULL(5)</div><div class='ctx'> </div><div class='add'>+/* NIX TX stats */</div><div class='add'>+enum nix_stat_lf_tx {</div><div class='add'>+	TX_UCAST	= 0x0,</div><div class='add'>+	TX_BCAST	= 0x1,</div><div class='add'>+	TX_MCAST	= 0x2,</div><div class='add'>+	TX_DROP		= 0x3,</div><div class='add'>+	TX_OCTS		= 0x4,</div><div class='add'>+	TX_STATS_ENUM_LAST,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* NIX RX stats */</div><div class='add'>+enum nix_stat_lf_rx {</div><div class='add'>+	RX_OCTS		= 0x0,</div><div class='add'>+	RX_UCAST	= 0x1,</div><div class='add'>+	RX_BCAST	= 0x2,</div><div class='add'>+	RX_MCAST	= 0x3,</div><div class='add'>+	RX_DROP		= 0x4,</div><div class='add'>+	RX_DROP_OCTS	= 0x5,</div><div class='add'>+	RX_FCS		= 0x6,</div><div class='add'>+	RX_ERR		= 0x7,</div><div class='add'>+	RX_DRP_BCAST	= 0x8,</div><div class='add'>+	RX_DRP_MCAST	= 0x9,</div><div class='add'>+	RX_DRP_L3BCAST	= 0xa,</div><div class='add'>+	RX_DRP_L3MCAST	= 0xb,</div><div class='add'>+	RX_STATS_ENUM_LAST,</div><div class='add'>+};</div><div class='ctx'> #endif /* RVU_STRUCT_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c<br/>index 854045ed3b06..49ce38685a7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include "rvu.h"</div><div class='ctx'> </div><div class='del'>-static void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool enable)</div><div class='add'>+void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);</div><div class='ctx'> 	struct nix_hw *nix_hw;</div><div class='hunk'>@@ -93,7 +93,7 @@ static int rvu_switch_install_rules(struct rvu *rvu)</div><div class='ctx'> 		if (!is_pf_cgxmapped(rvu, pf))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		pcifunc = pf &lt;&lt; 10;</div><div class='add'>+		pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, 0);</div><div class='ctx'> 		/* rvu_get_nix_blkaddr sets up the corresponding NIX block</div><div class='ctx'> 		 * address and NIX RX and TX interfaces for a pcifunc.</div><div class='ctx'> 		 * Generally it is called during attach call of a pcifunc but it</div><div class='hunk'>@@ -126,7 +126,7 @@ static int rvu_switch_install_rules(struct rvu *rvu)</div><div class='ctx'> </div><div class='ctx'> 		rvu_get_pf_numvfs(rvu, pf, &amp;numvfs, NULL);</div><div class='ctx'> 		for (vf = 0; vf &lt; numvfs; vf++) {</div><div class='del'>-			pcifunc = pf &lt;&lt; 10 | ((vf + 1) &amp; 0x3FF);</div><div class='add'>+			pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, (vf + 1));</div><div class='ctx'> 			rvu_get_nix_blkaddr(rvu, pcifunc);</div><div class='ctx'> </div><div class='ctx'> 			err = rvu_switch_install_rx_rule(rvu, pcifunc, 0x0);</div><div class='hunk'>@@ -166,6 +166,8 @@ void rvu_switch_enable(struct rvu *rvu)</div><div class='ctx'> </div><div class='ctx'> 	alloc_req.contig = true;</div><div class='ctx'> 	alloc_req.count = rvu-&gt;cgx_mapped_pfs + rvu-&gt;cgx_mapped_vfs;</div><div class='add'>+	if (rvu-&gt;rep_mode)</div><div class='add'>+		alloc_req.count = alloc_req.count * 4;</div><div class='ctx'> 	ret = rvu_mbox_handler_npc_mcam_alloc_entry(rvu, &amp;alloc_req,</div><div class='ctx'> 						    &amp;alloc_rsp);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -189,7 +191,12 @@ void rvu_switch_enable(struct rvu *rvu)</div><div class='ctx'> 	rswitch-&gt;used_entries = alloc_rsp.count;</div><div class='ctx'> 	rswitch-&gt;start_entry = alloc_rsp.entry;</div><div class='ctx'> </div><div class='del'>-	ret = rvu_switch_install_rules(rvu);</div><div class='add'>+	if (rvu-&gt;rep_mode) {</div><div class='add'>+		rvu_rep_pf_init(rvu);</div><div class='add'>+		ret = rvu_rep_install_mcam_rules(rvu);</div><div class='add'>+	} else {</div><div class='add'>+		ret = rvu_switch_install_rules(rvu);</div><div class='add'>+	}</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto uninstall_rules;</div><div class='ctx'> </div><div class='hunk'>@@ -222,11 +229,14 @@ void rvu_switch_disable(struct rvu *rvu)</div><div class='ctx'> 	if (!rswitch-&gt;used_entries)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (rvu-&gt;rep_mode)</div><div class='add'>+		goto free_ents;</div><div class='add'>+</div><div class='ctx'> 	for (pf = 1; pf &lt; hw-&gt;total_pfs; pf++) {</div><div class='ctx'> 		if (!is_pf_cgxmapped(rvu, pf))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		pcifunc = pf &lt;&lt; 10;</div><div class='add'>+		pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, 0);</div><div class='ctx'> 		err = rvu_switch_install_rx_rule(rvu, pcifunc, 0xFFF);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			dev_err(rvu-&gt;dev,</div><div class='hunk'>@@ -238,7 +248,7 @@ void rvu_switch_disable(struct rvu *rvu)</div><div class='ctx'> </div><div class='ctx'> 		rvu_get_pf_numvfs(rvu, pf, &amp;numvfs, NULL);</div><div class='ctx'> 		for (vf = 0; vf &lt; numvfs; vf++) {</div><div class='del'>-			pcifunc = pf &lt;&lt; 10 | ((vf + 1) &amp; 0x3FF);</div><div class='add'>+			pcifunc = rvu_make_pcifunc(rvu-&gt;pdev, pf, (vf + 1));</div><div class='ctx'> 			err = rvu_switch_install_rx_rule(rvu, pcifunc, 0xFFF);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				dev_err(rvu-&gt;dev,</div><div class='hunk'>@@ -249,6 +259,7 @@ void rvu_switch_disable(struct rvu *rvu)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+free_ents:</div><div class='ctx'> 	uninstall_req.start = rswitch-&gt;start_entry;</div><div class='ctx'> 	uninstall_req.end =  rswitch-&gt;start_entry + rswitch-&gt;used_entries - 1;</div><div class='ctx'> 	free_req.all = 1;</div><div class='hunk'>@@ -258,12 +269,15 @@ void rvu_switch_disable(struct rvu *rvu)</div><div class='ctx'> 	kfree(rswitch-&gt;entry2pcifunc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc)</div><div class='add'>+void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc, bool ena)</div><div class='ctx'> {</div><div class='ctx'> 	struct rvu_switch *rswitch = &amp;rvu-&gt;rswitch;</div><div class='ctx'> 	u32 max = rswitch-&gt;used_entries;</div><div class='ctx'> 	u16 entry;</div><div class='ctx'> </div><div class='add'>+	if (rvu-&gt;rep_mode)</div><div class='add'>+		return rvu_rep_update_rules(rvu, pcifunc, ena);</div><div class='add'>+</div><div class='ctx'> 	if (!rswitch-&gt;used_entries)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c<br/>index 775fd4c35794..19e0d16b12f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c</a></div><div class='hunk'>@@ -11,3 +11,5 @@</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL(otx2_msg_alloc);</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL(otx2_msg_interrupt);</div><div class='ctx'> EXPORT_TRACEPOINT_SYMBOL(otx2_msg_process);</div><div class='add'>+EXPORT_TRACEPOINT_SYMBOL(otx2_msg_status);</div><div class='add'>+EXPORT_TRACEPOINT_SYMBOL(otx2_parse_dump);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h<br/>index 5704520f9b02..4cd0fc4b0d20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h</a></div><div class='hunk'>@@ -18,33 +18,42 @@</div><div class='ctx'> #include "mbox.h"</div><div class='ctx'> </div><div class='ctx'> TRACE_EVENT(otx2_msg_alloc,</div><div class='del'>-	    TP_PROTO(const struct pci_dev *pdev, u16 id, u64 size),</div><div class='del'>-	    TP_ARGS(pdev, id, size),</div><div class='add'>+	    TP_PROTO(const struct pci_dev *pdev, u16 id, u64 size, u16 pcifunc),</div><div class='add'>+	    TP_ARGS(pdev, id, size, pcifunc),</div><div class='ctx'> 	    TP_STRUCT__entry(__string(dev, pci_name(pdev))</div><div class='ctx'> 			     __field(u16, id)</div><div class='ctx'> 			     __field(u64, size)</div><div class='add'>+			     __field(u16, pcifunc)</div><div class='ctx'> 	    ),</div><div class='ctx'> 	    TP_fast_assign(__assign_str(dev);</div><div class='ctx'> 			   __entry-&gt;id = id;</div><div class='ctx'> 			   __entry-&gt;size = size;</div><div class='add'>+			   __entry-&gt;pcifunc = pcifunc;</div><div class='ctx'> 	    ),</div><div class='del'>-	    TP_printk("[%s] msg:(%s) size:%lld\n", __get_str(dev),</div><div class='del'>-		      otx2_mbox_id2name(__entry-&gt;id), __entry-&gt;size)</div><div class='add'>+	    TP_printk("[%s] msg:(%s) size:%lld pcifunc:0x%x\n", __get_str(dev),</div><div class='add'>+		      otx2_mbox_id2name(__entry-&gt;id), __entry-&gt;size,</div><div class='add'>+		      __entry-&gt;pcifunc)</div><div class='ctx'> );</div><div class='ctx'> </div><div class='ctx'> TRACE_EVENT(otx2_msg_send,</div><div class='del'>-	    TP_PROTO(const struct pci_dev *pdev, u16 num_msgs, u64 msg_size),</div><div class='del'>-	    TP_ARGS(pdev, num_msgs, msg_size),</div><div class='add'>+	    TP_PROTO(const struct pci_dev *pdev, u16 num_msgs, u64 msg_size,</div><div class='add'>+		     u16 id, u16 pcifunc),</div><div class='add'>+	    TP_ARGS(pdev, num_msgs, msg_size, id, pcifunc),</div><div class='ctx'> 	    TP_STRUCT__entry(__string(dev, pci_name(pdev))</div><div class='ctx'> 			     __field(u16, num_msgs)</div><div class='ctx'> 			     __field(u64, msg_size)</div><div class='add'>+			     __field(u16, id)</div><div class='add'>+			     __field(u16, pcifunc)</div><div class='ctx'> 	    ),</div><div class='ctx'> 	    TP_fast_assign(__assign_str(dev);</div><div class='ctx'> 			   __entry-&gt;num_msgs = num_msgs;</div><div class='ctx'> 			   __entry-&gt;msg_size = msg_size;</div><div class='add'>+			   __entry-&gt;id = id;</div><div class='add'>+			   __entry-&gt;pcifunc = pcifunc;</div><div class='ctx'> 	    ),</div><div class='del'>-	    TP_printk("[%s] sent %d msg(s) of size:%lld\n", __get_str(dev),</div><div class='del'>-		      __entry-&gt;num_msgs, __entry-&gt;msg_size)</div><div class='add'>+	    TP_printk("[%s] sent %d msg(s) of size:%lld msg:(%s) pcifunc:0x%x\n",</div><div class='add'>+		      __get_str(dev), __entry-&gt;num_msgs, __entry-&gt;msg_size,</div><div class='add'>+		      otx2_mbox_id2name(__entry-&gt;id), __entry-&gt;pcifunc)</div><div class='ctx'> );</div><div class='ctx'> </div><div class='ctx'> TRACE_EVENT(otx2_msg_check,</div><div class='hunk'>@@ -81,18 +90,73 @@ TRACE_EVENT(otx2_msg_interrupt,</div><div class='ctx'> );</div><div class='ctx'> </div><div class='ctx'> TRACE_EVENT(otx2_msg_process,</div><div class='del'>-	    TP_PROTO(const struct pci_dev *pdev, u16 id, int err),</div><div class='del'>-	    TP_ARGS(pdev, id, err),</div><div class='add'>+	    TP_PROTO(const struct pci_dev *pdev, u16 id, int err, u16 pcifunc),</div><div class='add'>+	    TP_ARGS(pdev, id, err, pcifunc),</div><div class='ctx'> 	    TP_STRUCT__entry(__string(dev, pci_name(pdev))</div><div class='ctx'> 			     __field(u16, id)</div><div class='ctx'> 			     __field(int, err)</div><div class='add'>+			     __field(u16, pcifunc)</div><div class='ctx'> 	    ),</div><div class='ctx'> 	    TP_fast_assign(__assign_str(dev);</div><div class='ctx'> 			   __entry-&gt;id = id;</div><div class='ctx'> 			   __entry-&gt;err = err;</div><div class='add'>+			   __entry-&gt;pcifunc = pcifunc;</div><div class='add'>+	    ),</div><div class='add'>+	    TP_printk("[%s] msg:(%s) error:%d pcifunc:0x%x\n", __get_str(dev),</div><div class='add'>+		      otx2_mbox_id2name(__entry-&gt;id),</div><div class='add'>+		      __entry-&gt;err, __entry-&gt;pcifunc)</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+TRACE_EVENT(otx2_msg_wait_rsp,</div><div class='add'>+	    TP_PROTO(const struct pci_dev *pdev),</div><div class='add'>+	    TP_ARGS(pdev),</div><div class='add'>+	    TP_STRUCT__entry(__string(dev, pci_name(pdev))</div><div class='add'>+	    ),</div><div class='add'>+	    TP_fast_assign(__assign_str(dev)</div><div class='add'>+	    ),</div><div class='add'>+	    TP_printk("[%s] timed out while waiting for response\n",</div><div class='add'>+		      __get_str(dev))</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+TRACE_EVENT(otx2_msg_status,</div><div class='add'>+	    TP_PROTO(const struct pci_dev *pdev, const char *msg, u16 num_msgs),</div><div class='add'>+	    TP_ARGS(pdev, msg, num_msgs),</div><div class='add'>+	    TP_STRUCT__entry(__string(dev, pci_name(pdev))</div><div class='add'>+			     __string(str, msg)</div><div class='add'>+			     __field(u16, num_msgs)</div><div class='add'>+	    ),</div><div class='add'>+	    TP_fast_assign(__assign_str(dev);</div><div class='add'>+			   __assign_str(str);</div><div class='add'>+			   __entry-&gt;num_msgs = num_msgs;</div><div class='add'>+	    ),</div><div class='add'>+	    TP_printk("[%s] %s num_msgs:%d\n", __get_str(dev),</div><div class='add'>+		      __get_str(str), __entry-&gt;num_msgs)</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+TRACE_EVENT(otx2_parse_dump,</div><div class='add'>+	    TP_PROTO(const struct pci_dev *pdev, char *msg, u64 *word),</div><div class='add'>+	    TP_ARGS(pdev, msg, word),</div><div class='add'>+	    TP_STRUCT__entry(__string(dev, pci_name(pdev))</div><div class='add'>+			     __string(str, msg)</div><div class='add'>+			     __field(u64, w0)</div><div class='add'>+			     __field(u64, w1)</div><div class='add'>+			     __field(u64, w2)</div><div class='add'>+			     __field(u64, w3)</div><div class='add'>+			     __field(u64, w4)</div><div class='add'>+			     __field(u64, w5)</div><div class='add'>+	    ),</div><div class='add'>+	    TP_fast_assign(__assign_str(dev);</div><div class='add'>+			   __assign_str(str);</div><div class='add'>+			   __entry-&gt;w0 = *(word + 0);</div><div class='add'>+			   __entry-&gt;w1 = *(word + 1);</div><div class='add'>+			   __entry-&gt;w2 = *(word + 2);</div><div class='add'>+			   __entry-&gt;w3 = *(word + 3);</div><div class='add'>+			   __entry-&gt;w4 = *(word + 4);</div><div class='add'>+			   __entry-&gt;w5 = *(word + 5);</div><div class='ctx'> 	    ),</div><div class='del'>-	    TP_printk("[%s] msg:(%s) error:%d\n", __get_str(dev),</div><div class='del'>-		      otx2_mbox_id2name(__entry-&gt;id), __entry-&gt;err)</div><div class='add'>+	    TP_printk("[%s] nix parse %s W0:%#llx W1:%#llx W2:%#llx W3:%#llx W4:%#llx W5:%#llx\n",</div><div class='add'>+		      __get_str(dev), __get_str(str), __entry-&gt;w0, __entry-&gt;w1, __entry-&gt;w2,</div><div class='add'>+		      __entry-&gt;w3, __entry-&gt;w4, __entry-&gt;w5)</div><div class='ctx'> );</div><div class='ctx'> </div><div class='ctx'> #endif /* __RVU_TRACE_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/Makefile b/drivers/net/ethernet/marvell/octeontx2/nic/Makefile<br/>index 64a97a0a10ed..883e9f4d601c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/Makefile</a></div><div class='hunk'>@@ -5,13 +5,16 @@</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_OCTEONTX2_PF) += rvu_nicpf.o otx2_ptp.o</div><div class='ctx'> obj-$(CONFIG_OCTEONTX2_VF) += rvu_nicvf.o otx2_ptp.o</div><div class='add'>+obj-$(CONFIG_RVU_ESWITCH) += rvu_rep.o</div><div class='ctx'> </div><div class='ctx'> rvu_nicpf-y := otx2_pf.o otx2_common.o otx2_txrx.o otx2_ethtool.o \</div><div class='del'>-               otx2_flows.o otx2_tc.o cn10k.o otx2_dmac_flt.o \</div><div class='del'>-               otx2_devlink.o qos_sq.o qos.o</div><div class='add'>+               otx2_flows.o otx2_tc.o cn10k.o cn20k.o otx2_dmac_flt.o \</div><div class='add'>+               otx2_devlink.o qos_sq.o qos.o otx2_xsk.o</div><div class='ctx'> rvu_nicvf-y := otx2_vf.o</div><div class='add'>+rvu_rep-y := rep.o</div><div class='ctx'> </div><div class='ctx'> rvu_nicpf-$(CONFIG_DCB) += otx2_dcbnl.o</div><div class='ctx'> rvu_nicpf-$(CONFIG_MACSEC) += cn10k_macsec.o</div><div class='add'>+rvu_nicpf-$(CONFIG_XFRM_OFFLOAD) += cn10k_ipsec.o</div><div class='ctx'> </div><div class='ctx'> ccflags-y += -I$(srctree)/drivers/net/ethernet/marvell/octeontx2/af</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c<br/>index 7417087b6db5..3e1bf22cba69 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c</a></div><div class='hunk'>@@ -14,6 +14,9 @@ static struct dev_hw_ops	otx2_hw_ops = {</div><div class='ctx'> 	.sqe_flush = otx2_sqe_flush,</div><div class='ctx'> 	.aura_freeptr = otx2_aura_freeptr,</div><div class='ctx'> 	.refill_pool_ptrs = otx2_refill_pool_ptrs,</div><div class='add'>+	.pfaf_mbox_intr_handler = otx2_pfaf_mbox_intr_handler,</div><div class='add'>+	.aura_aq_init = otx2_aura_aq_init,</div><div class='add'>+	.pool_aq_init = otx2_pool_aq_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct dev_hw_ops cn10k_hw_ops = {</div><div class='hunk'>@@ -21,8 +24,22 @@ static struct dev_hw_ops cn10k_hw_ops = {</div><div class='ctx'> 	.sqe_flush = cn10k_sqe_flush,</div><div class='ctx'> 	.aura_freeptr = cn10k_aura_freeptr,</div><div class='ctx'> 	.refill_pool_ptrs = cn10k_refill_pool_ptrs,</div><div class='add'>+	.pfaf_mbox_intr_handler = otx2_pfaf_mbox_intr_handler,</div><div class='add'>+	.aura_aq_init = otx2_aura_aq_init,</div><div class='add'>+	.pool_aq_init = otx2_pool_aq_init,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+void otx2_init_hw_ops(struct otx2_nic *pfvf)</div><div class='add'>+{</div><div class='add'>+	if (!test_bit(CN10K_LMTST, &amp;pfvf-&gt;hw.cap_flag)) {</div><div class='add'>+		pfvf-&gt;hw_ops = &amp;otx2_hw_ops;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pfvf-&gt;hw_ops = &amp;cn10k_hw_ops;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(otx2_init_hw_ops);</div><div class='add'>+</div><div class='ctx'> int cn10k_lmtst_init(struct otx2_nic *pfvf)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='hunk'>@@ -30,12 +47,9 @@ int cn10k_lmtst_init(struct otx2_nic *pfvf)</div><div class='ctx'> 	struct otx2_lmt_info *lmt_info;</div><div class='ctx'> 	int err, cpu;</div><div class='ctx'> </div><div class='del'>-	if (!test_bit(CN10K_LMTST, &amp;pfvf-&gt;hw.cap_flag)) {</div><div class='del'>-		pfvf-&gt;hw_ops = &amp;otx2_hw_ops;</div><div class='add'>+	if (!test_bit(CN10K_LMTST, &amp;pfvf-&gt;hw.cap_flag))</div><div class='ctx'> 		return 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	pfvf-&gt;hw_ops = &amp;cn10k_hw_ops;</div><div class='ctx'> 	/* Total LMTLINES = num_online_cpus() * 32 (For Burst flush).*/</div><div class='ctx'> 	pfvf-&gt;tot_lmt_lines = (num_online_cpus() * LMT_BURST_SIZE);</div><div class='ctx'> 	pfvf-&gt;hw.lmt_info = alloc_percpu(struct otx2_lmt_info);</div><div class='hunk'>@@ -72,7 +86,7 @@ int cn10k_lmtst_init(struct otx2_nic *pfvf)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(cn10k_lmtst_init);</div><div class='ctx'> </div><div class='del'>-int cn10k_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura)</div><div class='add'>+int cn10k_sq_aq_init(void *dev, u16 qidx, u8 chan_offset, u16 sqb_aura)</div><div class='ctx'> {</div><div class='ctx'> 	struct nix_cn10k_aq_enq_req *aq;</div><div class='ctx'> 	struct otx2_nic *pfvf = dev;</div><div class='hunk'>@@ -88,7 +102,7 @@ int cn10k_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura)</div><div class='ctx'> 	aq-&gt;sq.ena = 1;</div><div class='ctx'> 	aq-&gt;sq.smq = otx2_get_smq_idx(pfvf, qidx);</div><div class='ctx'> 	aq-&gt;sq.smq_rr_weight = mtu_to_dwrr_weight(pfvf, pfvf-&gt;tx_max_pktlen);</div><div class='del'>-	aq-&gt;sq.default_chan = pfvf-&gt;hw.tx_chan_base;</div><div class='add'>+	aq-&gt;sq.default_chan = pfvf-&gt;hw.tx_chan_base + chan_offset;</div><div class='ctx'> 	aq-&gt;sq.sqe_stype = NIX_STYPE_STF; /* Cache SQB */</div><div class='ctx'> 	aq-&gt;sq.sqb_aura = sqb_aura;</div><div class='ctx'> 	aq-&gt;sq.sq_int_ena = NIX_SQINT_BITS;</div><div class='hunk'>@@ -112,9 +126,12 @@ int cn10k_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq)</div><div class='ctx'> 	struct otx2_nic *pfvf = dev;</div><div class='ctx'> 	int cnt = cq-&gt;pool_ptrs;</div><div class='ctx'> 	u64 ptrs[NPA_MAX_BURST];</div><div class='add'>+	struct otx2_pool *pool;</div><div class='ctx'> 	dma_addr_t bufptr;</div><div class='ctx'> 	int num_ptrs = 1;</div><div class='ctx'> </div><div class='add'>+	pool = &amp;pfvf-&gt;qset.pool[cq-&gt;cq_idx];</div><div class='add'>+</div><div class='ctx'> 	/* Refill pool with new buffers */</div><div class='ctx'> 	while (cq-&gt;pool_ptrs) {</div><div class='ctx'> 		if (otx2_alloc_buffer(pfvf, cq, &amp;bufptr)) {</div><div class='hunk'>@@ -124,7 +141,9 @@ int cn10k_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		cq-&gt;pool_ptrs--;</div><div class='del'>-		ptrs[num_ptrs] = (u64)bufptr + OTX2_HEAD_ROOM;</div><div class='add'>+		ptrs[num_ptrs] = pool-&gt;xsk_pool ?</div><div class='add'>+				 (u64)bufptr : (u64)bufptr + OTX2_HEAD_ROOM;</div><div class='add'>+</div><div class='ctx'> 		num_ptrs++;</div><div class='ctx'> 		if (num_ptrs == NPA_MAX_BURST || cq-&gt;pool_ptrs == 0) {</div><div class='ctx'> 			__cn10k_aura_freeptr(pfvf, cq-&gt;cq_idx, ptrs,</div><div class='hunk'>@@ -322,6 +341,12 @@ int cn10k_map_unmap_rq_policer(struct otx2_nic *pfvf, int rq_idx,</div><div class='ctx'> 	aq-&gt;rq.band_prof_id = policer;</div><div class='ctx'> 	aq-&gt;rq_mask.band_prof_id = GENMASK(9, 0);</div><div class='ctx'> </div><div class='add'>+	/* If policer id is greater than 1023 then it implies hardware supports</div><div class='add'>+	 * more leaf profiles. In that case use band_prof_id_h for 4 MSBs.</div><div class='add'>+	 */</div><div class='add'>+	aq-&gt;rq.band_prof_id_h = policer &gt;&gt; 10;</div><div class='add'>+	aq-&gt;rq_mask.band_prof_id_h = GENMASK(3, 0);</div><div class='add'>+</div><div class='ctx'> 	/* Fill AQ info */</div><div class='ctx'> 	aq-&gt;qidx = rq_idx;</div><div class='ctx'> 	aq-&gt;ctype = NIX_AQ_CTYPE_RQ;</div><div class='hunk'>@@ -352,9 +377,12 @@ int cn10k_free_matchall_ipolicer(struct otx2_nic *pfvf)</div><div class='ctx'> 	mutex_lock(&amp;pfvf-&gt;mbox.lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Remove RQ's policer mapping */</div><div class='del'>-	for (qidx = 0; qidx &lt; hw-&gt;rx_queues; qidx++)</div><div class='del'>-		cn10k_map_unmap_rq_policer(pfvf, qidx,</div><div class='del'>-					   hw-&gt;matchall_ipolicer, false);</div><div class='add'>+	for (qidx = 0; qidx &lt; hw-&gt;rx_queues; qidx++) {</div><div class='add'>+		rc = cn10k_map_unmap_rq_policer(pfvf, qidx, hw-&gt;matchall_ipolicer, false);</div><div class='add'>+		if (rc)</div><div class='add'>+			dev_warn(pfvf-&gt;dev, "Failed to unmap RQ %d's policer (error %d).",</div><div class='add'>+				 qidx, rc);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	rc = cn10k_free_leaf_profile(pfvf, hw-&gt;matchall_ipolicer);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h<br/>index c1861f7de254..945ab10bd4ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h</a></div><div class='hunk'>@@ -26,7 +26,7 @@ static inline int mtu_to_dwrr_weight(struct otx2_nic *pfvf, int mtu)</div><div class='ctx'> </div><div class='ctx'> int cn10k_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq);</div><div class='ctx'> void cn10k_sqe_flush(void *dev, struct otx2_snd_queue *sq, int size, int qidx);</div><div class='del'>-int cn10k_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura);</div><div class='add'>+int cn10k_sq_aq_init(void *dev, u16 qidx, u8 chan_offset, u16 sqb_aura);</div><div class='ctx'> int cn10k_lmtst_init(struct otx2_nic *pfvf);</div><div class='ctx'> int cn10k_free_all_ipolicers(struct otx2_nic *pfvf);</div><div class='ctx'> int cn10k_alloc_matchall_ipolicer(struct otx2_nic *pfvf);</div><div class='hunk'>@@ -39,4 +39,5 @@ int cn10k_alloc_leaf_profile(struct otx2_nic *pfvf, u16 *leaf);</div><div class='ctx'> int cn10k_set_ipolicer_rate(struct otx2_nic *pfvf, u16 profile,</div><div class='ctx'> 			    u32 burst, u64 rate, bool pps);</div><div class='ctx'> int cn10k_free_leaf_profile(struct otx2_nic *pfvf, u16 leaf);</div><div class='add'>+void otx2_init_hw_ops(struct otx2_nic *pfvf);</div><div class='ctx'> #endif /* CN10K_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c<br/>new file mode 100644<br/>index 000000000000..77543d472345<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c</a></div><div class='hunk'>@@ -0,0 +1,1042 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Marvell IPSEC offload driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;net/xfrm.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;crypto/aead.h&gt;</div><div class='add'>+#include &lt;crypto/gcm.h&gt;</div><div class='add'>+</div><div class='add'>+#include "otx2_common.h"</div><div class='add'>+#include "otx2_struct.h"</div><div class='add'>+#include "cn10k_ipsec.h"</div><div class='add'>+</div><div class='add'>+static bool is_dev_support_ipsec_offload(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	return is_dev_cn10ka_b0(pdev) || is_dev_cn10kb(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool cn10k_cpt_device_set_inuse(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	enum cn10k_cpt_hw_state_e state;</div><div class='add'>+</div><div class='add'>+	while (true) {</div><div class='add'>+		state = atomic_cmpxchg(&amp;pf-&gt;ipsec.cpt_state,</div><div class='add'>+				       CN10K_CPT_HW_AVAILABLE,</div><div class='add'>+				       CN10K_CPT_HW_IN_USE);</div><div class='add'>+		if (state == CN10K_CPT_HW_AVAILABLE)</div><div class='add'>+			return true;</div><div class='add'>+		if (state == CN10K_CPT_HW_UNAVAILABLE)</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		mdelay(1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cn10k_cpt_device_set_available(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	atomic_set(&amp;pf-&gt;ipsec.cpt_state, CN10K_CPT_HW_AVAILABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void  cn10k_cpt_device_set_unavailable(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	atomic_set(&amp;pf-&gt;ipsec.cpt_state, CN10K_CPT_HW_UNAVAILABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_outb_cptlf_attach(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	struct rsrc_attach *attach;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;mbox.lock);</div><div class='add'>+	/* Get memory to put this msg */</div><div class='add'>+	attach = otx2_mbox_alloc_msg_attach_resources(&amp;pf-&gt;mbox);</div><div class='add'>+	if (!attach)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	attach-&gt;cptlfs = true;</div><div class='add'>+	attach-&gt;modify = true;</div><div class='add'>+</div><div class='add'>+	/* Send attach request to AF */</div><div class='add'>+	ret = otx2_sync_mbox_msg(&amp;pf-&gt;mbox);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;mbox.lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_outb_cptlf_detach(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	struct rsrc_detach *detach;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;mbox.lock);</div><div class='add'>+	detach = otx2_mbox_alloc_msg_detach_resources(&amp;pf-&gt;mbox);</div><div class='add'>+	if (!detach)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	detach-&gt;partial = true;</div><div class='add'>+	detach-&gt;cptlfs = true;</div><div class='add'>+</div><div class='add'>+	/* Send detach request to AF */</div><div class='add'>+	ret = otx2_sync_mbox_msg(&amp;pf-&gt;mbox);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;mbox.lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_outb_cptlf_alloc(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	struct cpt_lf_alloc_req_msg *req;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;mbox.lock);</div><div class='add'>+	req = otx2_mbox_alloc_msg_cpt_lf_alloc(&amp;pf-&gt;mbox);</div><div class='add'>+	if (!req)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	/* PF function */</div><div class='add'>+	req-&gt;nix_pf_func = pf-&gt;pcifunc;</div><div class='add'>+	/* Enable SE-IE Engine Group */</div><div class='add'>+	req-&gt;eng_grpmsk = 1 &lt;&lt; CN10K_DEF_CPT_IPSEC_EGRP;</div><div class='add'>+</div><div class='add'>+	ret = otx2_sync_mbox_msg(&amp;pf-&gt;mbox);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;mbox.lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cn10k_outb_cptlf_free(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;pf-&gt;mbox.lock);</div><div class='add'>+	otx2_mbox_alloc_msg_cpt_lf_free(&amp;pf-&gt;mbox);</div><div class='add'>+	otx2_sync_mbox_msg(&amp;pf-&gt;mbox);</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;mbox.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_outb_cptlf_config(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	struct cpt_inline_ipsec_cfg_msg *req;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;mbox.lock);</div><div class='add'>+	req = otx2_mbox_alloc_msg_cpt_inline_ipsec_cfg(&amp;pf-&gt;mbox);</div><div class='add'>+	if (!req)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	req-&gt;dir = CPT_INLINE_OUTBOUND;</div><div class='add'>+	req-&gt;enable = 1;</div><div class='add'>+	req-&gt;nix_pf_func = pf-&gt;pcifunc;</div><div class='add'>+	ret = otx2_sync_mbox_msg(&amp;pf-&gt;mbox);</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;mbox.lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cn10k_outb_cptlf_iq_enable(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	u64 reg_val;</div><div class='add'>+</div><div class='add'>+	/* Set Execution Enable of instruction queue */</div><div class='add'>+	reg_val = otx2_read64(pf, CN10K_CPT_LF_INPROG);</div><div class='add'>+	reg_val |= BIT_ULL(16);</div><div class='add'>+	otx2_write64(pf, CN10K_CPT_LF_INPROG, reg_val);</div><div class='add'>+</div><div class='add'>+	/* Set iqueue's enqueuing */</div><div class='add'>+	reg_val = otx2_read64(pf, CN10K_CPT_LF_CTL);</div><div class='add'>+	reg_val |= BIT_ULL(0);</div><div class='add'>+	otx2_write64(pf, CN10K_CPT_LF_CTL, reg_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cn10k_outb_cptlf_iq_disable(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	u32 inflight, grb_cnt, gwb_cnt;</div><div class='add'>+	u32 nq_ptr, dq_ptr;</div><div class='add'>+	int timeout = 20;</div><div class='add'>+	u64 reg_val;</div><div class='add'>+	int cnt;</div><div class='add'>+</div><div class='add'>+	/* Disable instructions enqueuing */</div><div class='add'>+	otx2_write64(pf, CN10K_CPT_LF_CTL, 0ull);</div><div class='add'>+</div><div class='add'>+	/* Wait for instruction queue to become empty.</div><div class='add'>+	 * CPT_LF_INPROG.INFLIGHT count is zero</div><div class='add'>+	 */</div><div class='add'>+	do {</div><div class='add'>+		reg_val = otx2_read64(pf, CN10K_CPT_LF_INPROG);</div><div class='add'>+		inflight = FIELD_GET(CPT_LF_INPROG_INFLIGHT, reg_val);</div><div class='add'>+		if (!inflight)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		usleep_range(10000, 20000);</div><div class='add'>+		if (timeout-- &lt; 0) {</div><div class='add'>+			netdev_err(pf-&gt;netdev, "Timeout to cleanup CPT IQ\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} while (1);</div><div class='add'>+</div><div class='add'>+	/* Disable executions in the LF's queue,</div><div class='add'>+	 * the queue should be empty at this point</div><div class='add'>+	 */</div><div class='add'>+	reg_val &amp;= ~BIT_ULL(16);</div><div class='add'>+	otx2_write64(pf, CN10K_CPT_LF_INPROG, reg_val);</div><div class='add'>+</div><div class='add'>+	/* Wait for instruction queue to become empty */</div><div class='add'>+	cnt = 0;</div><div class='add'>+	do {</div><div class='add'>+		reg_val = otx2_read64(pf, CN10K_CPT_LF_INPROG);</div><div class='add'>+		if (reg_val &amp; BIT_ULL(31))</div><div class='add'>+			cnt = 0;</div><div class='add'>+		else</div><div class='add'>+			cnt++;</div><div class='add'>+		reg_val = otx2_read64(pf, CN10K_CPT_LF_Q_GRP_PTR);</div><div class='add'>+		nq_ptr = FIELD_GET(CPT_LF_Q_GRP_PTR_DQ_PTR, reg_val);</div><div class='add'>+		dq_ptr = FIELD_GET(CPT_LF_Q_GRP_PTR_DQ_PTR, reg_val);</div><div class='add'>+	} while ((cnt &lt; 10) &amp;&amp; (nq_ptr != dq_ptr));</div><div class='add'>+</div><div class='add'>+	cnt = 0;</div><div class='add'>+	do {</div><div class='add'>+		reg_val = otx2_read64(pf, CN10K_CPT_LF_INPROG);</div><div class='add'>+		inflight = FIELD_GET(CPT_LF_INPROG_INFLIGHT, reg_val);</div><div class='add'>+		grb_cnt = FIELD_GET(CPT_LF_INPROG_GRB_CNT, reg_val);</div><div class='add'>+		gwb_cnt = FIELD_GET(CPT_LF_INPROG_GWB_CNT, reg_val);</div><div class='add'>+		if (inflight == 0 &amp;&amp; gwb_cnt &lt; 40 &amp;&amp;</div><div class='add'>+		    (grb_cnt == 0 || grb_cnt == 40))</div><div class='add'>+			cnt++;</div><div class='add'>+		else</div><div class='add'>+			cnt = 0;</div><div class='add'>+	} while (cnt &lt; 10);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Allocate memory for CPT outbound Instruction queue.</div><div class='add'>+ * Instruction queue memory format is:</div><div class='add'>+ *      -----------------------------</div><div class='add'>+ *     | Instruction Group memory    |</div><div class='add'>+ *     |  (CPT_LF_Q_SIZE[SIZE_DIV40] |</div><div class='add'>+ *     |   x 16 Bytes)               |</div><div class='add'>+ *     |                             |</div><div class='add'>+ *      ----------------------------- &lt;-- CPT_LF_Q_BASE[ADDR]</div><div class='add'>+ *     | Flow Control (128 Bytes)    |</div><div class='add'>+ *     |                             |</div><div class='add'>+ *      -----------------------------</div><div class='add'>+ *     |  Instruction Memory         |</div><div class='add'>+ *     |  (CPT_LF_Q_SIZE[SIZE_DIV40] |</div><div class='add'>+ *     |   × 40 × 64 bytes)          |</div><div class='add'>+ *     |                             |</div><div class='add'>+ *      -----------------------------</div><div class='add'>+ */</div><div class='add'>+static int cn10k_outb_cptlf_iq_alloc(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	struct cn10k_cpt_inst_queue *iq = &amp;pf-&gt;ipsec.iq;</div><div class='add'>+</div><div class='add'>+	iq-&gt;size = CN10K_CPT_INST_QLEN_BYTES + CN10K_CPT_Q_FC_LEN +</div><div class='add'>+		    CN10K_CPT_INST_GRP_QLEN_BYTES + OTX2_ALIGN;</div><div class='add'>+</div><div class='add'>+	iq-&gt;real_vaddr = dma_alloc_coherent(pf-&gt;dev, iq-&gt;size,</div><div class='add'>+					    &amp;iq-&gt;real_dma_addr, GFP_KERNEL);</div><div class='add'>+	if (!iq-&gt;real_vaddr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* iq-&gt;vaddr/dma_addr points to Flow Control location */</div><div class='add'>+	iq-&gt;vaddr = iq-&gt;real_vaddr + CN10K_CPT_INST_GRP_QLEN_BYTES;</div><div class='add'>+	iq-&gt;dma_addr = iq-&gt;real_dma_addr + CN10K_CPT_INST_GRP_QLEN_BYTES;</div><div class='add'>+</div><div class='add'>+	/* Align pointers */</div><div class='add'>+	iq-&gt;vaddr = PTR_ALIGN(iq-&gt;vaddr, OTX2_ALIGN);</div><div class='add'>+	iq-&gt;dma_addr = PTR_ALIGN(iq-&gt;dma_addr, OTX2_ALIGN);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cn10k_outb_cptlf_iq_free(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	struct cn10k_cpt_inst_queue *iq = &amp;pf-&gt;ipsec.iq;</div><div class='add'>+</div><div class='add'>+	if (iq-&gt;real_vaddr)</div><div class='add'>+		dma_free_coherent(pf-&gt;dev, iq-&gt;size, iq-&gt;real_vaddr,</div><div class='add'>+				  iq-&gt;real_dma_addr);</div><div class='add'>+</div><div class='add'>+	iq-&gt;real_vaddr = NULL;</div><div class='add'>+	iq-&gt;vaddr = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_outb_cptlf_iq_init(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	u64 reg_val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Allocate Memory for CPT IQ */</div><div class='add'>+	ret = cn10k_outb_cptlf_iq_alloc(pf);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Disable IQ */</div><div class='add'>+	cn10k_outb_cptlf_iq_disable(pf);</div><div class='add'>+</div><div class='add'>+	/* Set IQ base address */</div><div class='add'>+	otx2_write64(pf, CN10K_CPT_LF_Q_BASE, pf-&gt;ipsec.iq.dma_addr);</div><div class='add'>+</div><div class='add'>+	/* Set IQ size */</div><div class='add'>+	reg_val = FIELD_PREP(CPT_LF_Q_SIZE_DIV40, CN10K_CPT_SIZE_DIV40 +</div><div class='add'>+			     CN10K_CPT_EXTRA_SIZE_DIV40);</div><div class='add'>+	otx2_write64(pf, CN10K_CPT_LF_Q_SIZE, reg_val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_outb_cptlf_init(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Initialize CPTLF Instruction Queue (IQ) */</div><div class='add'>+	ret = cn10k_outb_cptlf_iq_init(pf);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Configure CPTLF for outbound ipsec offload */</div><div class='add'>+	ret = cn10k_outb_cptlf_config(pf);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto iq_clean;</div><div class='add'>+</div><div class='add'>+	/* Enable CPTLF IQ */</div><div class='add'>+	cn10k_outb_cptlf_iq_enable(pf);</div><div class='add'>+	return 0;</div><div class='add'>+iq_clean:</div><div class='add'>+	cn10k_outb_cptlf_iq_free(pf);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_outb_cpt_init(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct otx2_nic *pf = netdev_priv(netdev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Attach a CPT LF for outbound ipsec offload */</div><div class='add'>+	ret = cn10k_outb_cptlf_attach(pf);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Allocate a CPT LF for outbound ipsec offload */</div><div class='add'>+	ret = cn10k_outb_cptlf_alloc(pf);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto detach;</div><div class='add'>+</div><div class='add'>+	/* Initialize the CPTLF for outbound ipsec offload */</div><div class='add'>+	ret = cn10k_outb_cptlf_init(pf);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto lf_free;</div><div class='add'>+</div><div class='add'>+	pf-&gt;ipsec.io_addr = (__force u64)otx2_get_regaddr(pf,</div><div class='add'>+						CN10K_CPT_LF_NQX(0));</div><div class='add'>+</div><div class='add'>+	/* Set ipsec offload enabled for this device */</div><div class='add'>+	pf-&gt;flags |= OTX2_FLAG_IPSEC_OFFLOAD_ENABLED;</div><div class='add'>+</div><div class='add'>+	cn10k_cpt_device_set_available(pf);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+lf_free:</div><div class='add'>+	cn10k_outb_cptlf_free(pf);</div><div class='add'>+detach:</div><div class='add'>+	cn10k_outb_cptlf_detach(pf);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_outb_cpt_clean(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!cn10k_cpt_device_set_inuse(pf)) {</div><div class='add'>+		netdev_err(pf-&gt;netdev, "CPT LF device unavailable\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set ipsec offload disabled for this device */</div><div class='add'>+	pf-&gt;flags &amp;= ~OTX2_FLAG_IPSEC_OFFLOAD_ENABLED;</div><div class='add'>+</div><div class='add'>+	/* Disable CPTLF Instruction Queue (IQ) */</div><div class='add'>+	cn10k_outb_cptlf_iq_disable(pf);</div><div class='add'>+</div><div class='add'>+	/* Set IQ base address and size to 0 */</div><div class='add'>+	otx2_write64(pf, CN10K_CPT_LF_Q_BASE, 0);</div><div class='add'>+	otx2_write64(pf, CN10K_CPT_LF_Q_SIZE, 0);</div><div class='add'>+</div><div class='add'>+	/* Free CPTLF IQ */</div><div class='add'>+	cn10k_outb_cptlf_iq_free(pf);</div><div class='add'>+</div><div class='add'>+	/* Free and detach CPT LF */</div><div class='add'>+	cn10k_outb_cptlf_free(pf);</div><div class='add'>+	ret = cn10k_outb_cptlf_detach(pf);</div><div class='add'>+	if (ret)</div><div class='add'>+		netdev_err(pf-&gt;netdev, "Failed to detach CPT LF\n");</div><div class='add'>+</div><div class='add'>+	cn10k_cpt_device_set_unavailable(pf);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cn10k_cpt_inst_flush(struct otx2_nic *pf, struct cpt_inst_s *inst,</div><div class='add'>+				 u64 size)</div><div class='add'>+{</div><div class='add'>+	struct otx2_lmt_info *lmt_info;</div><div class='add'>+	u64 val = 0, tar_addr = 0;</div><div class='add'>+</div><div class='add'>+	lmt_info = per_cpu_ptr(pf-&gt;hw.lmt_info, smp_processor_id());</div><div class='add'>+	/* FIXME: val[0:10] LMT_ID.</div><div class='add'>+	 * [12:15] no of LMTST - 1 in the burst.</div><div class='add'>+	 * [19:63] data size of each LMTST in the burst except first.</div><div class='add'>+	 */</div><div class='add'>+	val = (lmt_info-&gt;lmt_id &amp; 0x7FF);</div><div class='add'>+	/* Target address for LMTST flush tells HW how many 128bit</div><div class='add'>+	 * words are present.</div><div class='add'>+	 * tar_addr[6:4] size of first LMTST - 1 in units of 128b.</div><div class='add'>+	 */</div><div class='add'>+	tar_addr |= pf-&gt;ipsec.io_addr | (((size / 16) - 1) &amp; 0x7) &lt;&lt; 4;</div><div class='add'>+	dma_wmb();</div><div class='add'>+	memcpy((u64 *)lmt_info-&gt;lmt_addr, inst, size);</div><div class='add'>+	cn10k_lmt_flush(val, tar_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_wait_for_cpt_respose(struct otx2_nic *pf,</div><div class='add'>+				      struct cpt_res_s *res)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout = jiffies + msecs_to_jiffies(100);</div><div class='add'>+	u64 *completion_ptr = (u64 *)res;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		if (time_after(jiffies, timeout)) {</div><div class='add'>+			netdev_err(pf-&gt;netdev, "CPT response timeout\n");</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+	} while ((READ_ONCE(*completion_ptr) &amp; CN10K_CPT_COMP_E_MASK) ==</div><div class='add'>+		 CN10K_CPT_COMP_E_NOTDONE);</div><div class='add'>+</div><div class='add'>+	if (!(res-&gt;compcode == CN10K_CPT_COMP_E_GOOD ||</div><div class='add'>+	      res-&gt;compcode == CN10K_CPT_COMP_E_WARN) || res-&gt;uc_compcode) {</div><div class='add'>+		netdev_err(pf-&gt;netdev, "compcode=%x doneint=%x\n",</div><div class='add'>+			   res-&gt;compcode, res-&gt;doneint);</div><div class='add'>+		netdev_err(pf-&gt;netdev, "uc_compcode=%x uc_info=%llx esn=%llx\n",</div><div class='add'>+			   res-&gt;uc_compcode, (u64)res-&gt;uc_info, res-&gt;esn);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_outb_write_sa(struct otx2_nic *pf, struct qmem *sa_info)</div><div class='add'>+{</div><div class='add'>+	dma_addr_t res_iova, dptr_iova, sa_iova;</div><div class='add'>+	struct cn10k_tx_sa_s *sa_dptr;</div><div class='add'>+	struct cpt_inst_s inst = {};</div><div class='add'>+	struct cpt_res_s *res;</div><div class='add'>+	u32 sa_size, off;</div><div class='add'>+	u64 *sptr, *dptr;</div><div class='add'>+	u64 reg_val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	sa_iova = sa_info-&gt;iova;</div><div class='add'>+	if (!sa_iova)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	res = dma_alloc_coherent(pf-&gt;dev, sizeof(struct cpt_res_s),</div><div class='add'>+				 &amp;res_iova, GFP_ATOMIC);</div><div class='add'>+	if (!res)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	sa_size = sizeof(struct cn10k_tx_sa_s);</div><div class='add'>+	sa_dptr = dma_alloc_coherent(pf-&gt;dev, sa_size, &amp;dptr_iova, GFP_ATOMIC);</div><div class='add'>+	if (!sa_dptr) {</div><div class='add'>+		dma_free_coherent(pf-&gt;dev, sizeof(struct cpt_res_s), res,</div><div class='add'>+				  res_iova);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sptr = (__force u64 *)sa_info-&gt;base;</div><div class='add'>+	dptr =  (__force u64 *)sa_dptr;</div><div class='add'>+	for (off = 0; off &lt; (sa_size / 8); off++)</div><div class='add'>+		*(dptr + off) = (__force u64)cpu_to_be64(*(sptr + off));</div><div class='add'>+</div><div class='add'>+	res-&gt;compcode = CN10K_CPT_COMP_E_NOTDONE;</div><div class='add'>+	inst.res_addr = res_iova;</div><div class='add'>+	inst.dptr = (u64)dptr_iova;</div><div class='add'>+	inst.param2 = sa_size &gt;&gt; 3;</div><div class='add'>+	inst.dlen = sa_size;</div><div class='add'>+	inst.opcode_major = CN10K_IPSEC_MAJOR_OP_WRITE_SA;</div><div class='add'>+	inst.opcode_minor = CN10K_IPSEC_MINOR_OP_WRITE_SA;</div><div class='add'>+	inst.cptr = sa_iova;</div><div class='add'>+	inst.ctx_val = 1;</div><div class='add'>+	inst.egrp = CN10K_DEF_CPT_IPSEC_EGRP;</div><div class='add'>+</div><div class='add'>+	/* Check if CPT-LF available */</div><div class='add'>+	if (!cn10k_cpt_device_set_inuse(pf)) {</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto free_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cn10k_cpt_inst_flush(pf, &amp;inst, sizeof(struct cpt_inst_s));</div><div class='add'>+	dma_wmb();</div><div class='add'>+	ret = cn10k_wait_for_cpt_respose(pf, res);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto set_available;</div><div class='add'>+</div><div class='add'>+	/* Trigger CTX flush to write dirty data back to DRAM */</div><div class='add'>+	reg_val = FIELD_PREP(CPT_LF_CTX_FLUSH_CPTR, sa_iova &gt;&gt; 7);</div><div class='add'>+	otx2_write64(pf, CN10K_CPT_LF_CTX_FLUSH, reg_val);</div><div class='add'>+</div><div class='add'>+set_available:</div><div class='add'>+	cn10k_cpt_device_set_available(pf);</div><div class='add'>+free_mem:</div><div class='add'>+	dma_free_coherent(pf-&gt;dev, sa_size, sa_dptr, dptr_iova);</div><div class='add'>+	dma_free_coherent(pf-&gt;dev, sizeof(struct cpt_res_s), res, res_iova);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_ipsec_get_hw_ctx_offset(void)</div><div class='add'>+{</div><div class='add'>+	/* Offset on Hardware-context offset in word */</div><div class='add'>+	return (offsetof(struct cn10k_tx_sa_s, hw_ctx) / sizeof(u64)) &amp; 0x7F;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_ipsec_get_ctx_push_size(void)</div><div class='add'>+{</div><div class='add'>+	/* Context push size is round up and in multiple of 8 Byte */</div><div class='add'>+	return (roundup(offsetof(struct cn10k_tx_sa_s, hw_ctx), 8) / 8) &amp; 0x7F;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_ipsec_get_aes_key_len(int key_len)</div><div class='add'>+{</div><div class='add'>+	/* key_len is aes key length in bytes */</div><div class='add'>+	switch (key_len) {</div><div class='add'>+	case 16:</div><div class='add'>+		return CN10K_IPSEC_SA_AES_KEY_LEN_128;</div><div class='add'>+	case 24:</div><div class='add'>+		return CN10K_IPSEC_SA_AES_KEY_LEN_192;</div><div class='add'>+	default:</div><div class='add'>+		return CN10K_IPSEC_SA_AES_KEY_LEN_256;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cn10k_outb_prepare_sa(struct xfrm_state *x,</div><div class='add'>+				  struct cn10k_tx_sa_s *sa_entry)</div><div class='add'>+{</div><div class='add'>+	int key_len = (x-&gt;aead-&gt;alg_key_len + 7) / 8;</div><div class='add'>+	struct net_device *netdev = x-&gt;xso.dev;</div><div class='add'>+	u8 *key = x-&gt;aead-&gt;alg_key;</div><div class='add'>+	struct otx2_nic *pf;</div><div class='add'>+	u32 *tmp_salt;</div><div class='add'>+	u64 *tmp_key;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	memset(sa_entry, 0, sizeof(struct cn10k_tx_sa_s));</div><div class='add'>+</div><div class='add'>+	/* context size, 128 Byte aligned up */</div><div class='add'>+	pf = netdev_priv(netdev);</div><div class='add'>+	sa_entry-&gt;ctx_size = (pf-&gt;ipsec.sa_size / OTX2_ALIGN)  &amp; 0xF;</div><div class='add'>+	sa_entry-&gt;hw_ctx_off = cn10k_ipsec_get_hw_ctx_offset();</div><div class='add'>+	sa_entry-&gt;ctx_push_size = cn10k_ipsec_get_ctx_push_size();</div><div class='add'>+</div><div class='add'>+	/* Ucode to skip two words of CPT_CTX_HW_S */</div><div class='add'>+	sa_entry-&gt;ctx_hdr_size = 1;</div><div class='add'>+</div><div class='add'>+	/* Allow Atomic operation (AOP) */</div><div class='add'>+	sa_entry-&gt;aop_valid = 1;</div><div class='add'>+</div><div class='add'>+	/* Outbound, ESP TRANSPORT/TUNNEL Mode, AES-GCM with */</div><div class='add'>+	sa_entry-&gt;sa_dir = CN10K_IPSEC_SA_DIR_OUTB;</div><div class='add'>+	sa_entry-&gt;ipsec_protocol = CN10K_IPSEC_SA_IPSEC_PROTO_ESP;</div><div class='add'>+	sa_entry-&gt;enc_type = CN10K_IPSEC_SA_ENCAP_TYPE_AES_GCM;</div><div class='add'>+	sa_entry-&gt;iv_src = CN10K_IPSEC_SA_IV_SRC_PACKET;</div><div class='add'>+	if (x-&gt;props.mode == XFRM_MODE_TUNNEL)</div><div class='add'>+		sa_entry-&gt;ipsec_mode = CN10K_IPSEC_SA_IPSEC_MODE_TUNNEL;</div><div class='add'>+	else</div><div class='add'>+		sa_entry-&gt;ipsec_mode = CN10K_IPSEC_SA_IPSEC_MODE_TRANSPORT;</div><div class='add'>+</div><div class='add'>+	/* Last 4 bytes are salt */</div><div class='add'>+	key_len -= 4;</div><div class='add'>+	sa_entry-&gt;aes_key_len = cn10k_ipsec_get_aes_key_len(key_len);</div><div class='add'>+	memcpy(sa_entry-&gt;cipher_key, key, key_len);</div><div class='add'>+	tmp_key = (u64 *)sa_entry-&gt;cipher_key;</div><div class='add'>+</div><div class='add'>+	for (idx = 0; idx &lt; key_len / 8; idx++)</div><div class='add'>+		tmp_key[idx] = (__force u64)cpu_to_be64(tmp_key[idx]);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;sa_entry-&gt;iv_gcm_salt, key + key_len, 4);</div><div class='add'>+	tmp_salt = (u32 *)&amp;sa_entry-&gt;iv_gcm_salt;</div><div class='add'>+	*tmp_salt = (__force u32)cpu_to_be32(*tmp_salt);</div><div class='add'>+</div><div class='add'>+	/* Write SA context data to memory before enabling */</div><div class='add'>+	wmb();</div><div class='add'>+</div><div class='add'>+	/* Enable SA */</div><div class='add'>+	sa_entry-&gt;sa_valid = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_ipsec_validate_state(struct xfrm_state *x,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (x-&gt;props.aalgo != SADB_AALG_NONE) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload authenticated xfrm states");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (x-&gt;props.ealgo != SADB_X_EALG_AES_GCM_ICV16) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Only AES-GCM-ICV16 xfrm state may be offloaded");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (x-&gt;props.calgo != SADB_X_CALG_NONE) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload compressed xfrm states");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (x-&gt;props.flags &amp; XFRM_STATE_ESN) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Cannot offload ESN xfrm states");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (x-&gt;props.family != AF_INET &amp;&amp; x-&gt;props.family != AF_INET6) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Only IPv4/v6 xfrm states may be offloaded");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (x-&gt;xso.type != XFRM_DEV_OFFLOAD_CRYPTO) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload other than crypto-mode");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (x-&gt;props.mode != XFRM_MODE_TRANSPORT &amp;&amp;</div><div class='add'>+	    x-&gt;props.mode != XFRM_MODE_TUNNEL) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Only tunnel/transport xfrm states may be offloaded");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (x-&gt;id.proto != IPPROTO_ESP) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Only ESP xfrm state may be offloaded");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (x-&gt;encap) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Encapsulated xfrm state may not be offloaded");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (!x-&gt;aead) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload xfrm states without aead");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (x-&gt;aead-&gt;alg_icv_len != 128) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload xfrm states with AEAD ICV length other than 128bit");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (x-&gt;aead-&gt;alg_key_len != 128 + 32 &amp;&amp;</div><div class='add'>+	    x-&gt;aead-&gt;alg_key_len != 192 + 32 &amp;&amp;</div><div class='add'>+	    x-&gt;aead-&gt;alg_key_len != 256 + 32) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload xfrm states with AEAD key length other than 128/192/256bit");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (x-&gt;tfcpad) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload xfrm states with tfc padding");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (!x-&gt;geniv) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload xfrm states without geniv");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (strcmp(x-&gt;geniv, "seqiv")) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload xfrm states with geniv other than seqiv");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_ipsec_inb_add_state(struct xfrm_state *x,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "xfrm inbound offload not supported");</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_ipsec_outb_add_state(struct net_device *dev,</div><div class='add'>+				      struct xfrm_state *x,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct cn10k_tx_sa_s *sa_entry;</div><div class='add'>+	struct qmem *sa_info;</div><div class='add'>+	struct otx2_nic *pf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = cn10k_ipsec_validate_state(x, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	pf = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	err = qmem_alloc(pf-&gt;dev, &amp;sa_info, pf-&gt;ipsec.sa_size, OTX2_ALIGN);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	sa_entry = (struct cn10k_tx_sa_s *)sa_info-&gt;base;</div><div class='add'>+	cn10k_outb_prepare_sa(x, sa_entry);</div><div class='add'>+</div><div class='add'>+	err = cn10k_outb_write_sa(pf, sa_info);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Error writing outbound SA");</div><div class='add'>+		qmem_free(pf-&gt;dev, sa_info);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	x-&gt;xso.offload_handle = (unsigned long)sa_info;</div><div class='add'>+	/* Enable static branch when first SA setup */</div><div class='add'>+	if (!pf-&gt;ipsec.outb_sa_count)</div><div class='add'>+		static_branch_enable(&amp;cn10k_ipsec_sa_enabled);</div><div class='add'>+	pf-&gt;ipsec.outb_sa_count++;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn10k_ipsec_add_state(struct net_device *dev,</div><div class='add'>+				 struct xfrm_state *x,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (x-&gt;xso.dir == XFRM_DEV_OFFLOAD_IN)</div><div class='add'>+		return cn10k_ipsec_inb_add_state(x, extack);</div><div class='add'>+	else</div><div class='add'>+		return cn10k_ipsec_outb_add_state(dev, x, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cn10k_ipsec_del_state(struct net_device *dev, struct xfrm_state *x)</div><div class='add'>+{</div><div class='add'>+	struct cn10k_tx_sa_s *sa_entry;</div><div class='add'>+	struct qmem *sa_info;</div><div class='add'>+	struct otx2_nic *pf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (x-&gt;xso.dir == XFRM_DEV_OFFLOAD_IN)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pf = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	sa_info = (struct qmem *)x-&gt;xso.offload_handle;</div><div class='add'>+	sa_entry = (struct cn10k_tx_sa_s *)sa_info-&gt;base;</div><div class='add'>+	memset(sa_entry, 0, sizeof(struct cn10k_tx_sa_s));</div><div class='add'>+	/* Disable SA in CPT h/w */</div><div class='add'>+	sa_entry-&gt;ctx_push_size = cn10k_ipsec_get_ctx_push_size();</div><div class='add'>+	sa_entry-&gt;ctx_size = (pf-&gt;ipsec.sa_size / OTX2_ALIGN)  &amp; 0xF;</div><div class='add'>+	sa_entry-&gt;aop_valid = 1;</div><div class='add'>+</div><div class='add'>+	err = cn10k_outb_write_sa(pf, sa_info);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_err(dev, "Error (%d) deleting SA\n", err);</div><div class='add'>+</div><div class='add'>+	x-&gt;xso.offload_handle = 0;</div><div class='add'>+	qmem_free(pf-&gt;dev, sa_info);</div><div class='add'>+</div><div class='add'>+	/* If no more SA's then update netdev feature for potential change</div><div class='add'>+	 * in NETIF_F_HW_ESP.</div><div class='add'>+	 */</div><div class='add'>+	if (!--pf-&gt;ipsec.outb_sa_count)</div><div class='add'>+		queue_work(pf-&gt;ipsec.sa_workq, &amp;pf-&gt;ipsec.sa_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct xfrmdev_ops cn10k_ipsec_xfrmdev_ops = {</div><div class='add'>+	.xdo_dev_state_add	= cn10k_ipsec_add_state,</div><div class='add'>+	.xdo_dev_state_delete	= cn10k_ipsec_del_state,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void cn10k_ipsec_sa_wq_handler(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct cn10k_ipsec *ipsec = container_of(work, struct cn10k_ipsec,</div><div class='add'>+						 sa_work);</div><div class='add'>+	struct otx2_nic *pf = container_of(ipsec, struct otx2_nic, ipsec);</div><div class='add'>+</div><div class='add'>+	/* Disable static branch when no more SA enabled */</div><div class='add'>+	static_branch_disable(&amp;cn10k_ipsec_sa_enabled);</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	netdev_update_features(pf-&gt;netdev);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cn10k_ipsec_ethtool_init(struct net_device *netdev, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct otx2_nic *pf = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	/* IPsec offload supported on cn10k */</div><div class='add'>+	if (!is_dev_support_ipsec_offload(pf-&gt;pdev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Initialize CPT for outbound ipsec offload */</div><div class='add'>+	if (enable)</div><div class='add'>+		return cn10k_outb_cpt_init(netdev);</div><div class='add'>+</div><div class='add'>+	/* Don't do CPT cleanup if SA installed */</div><div class='add'>+	if (pf-&gt;ipsec.outb_sa_count) {</div><div class='add'>+		netdev_err(pf-&gt;netdev, "SA installed on this device\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return cn10k_outb_cpt_clean(pf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cn10k_ipsec_init(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct otx2_nic *pf = netdev_priv(netdev);</div><div class='add'>+	u32 sa_size;</div><div class='add'>+</div><div class='add'>+	if (!is_dev_support_ipsec_offload(pf-&gt;pdev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Each SA entry size is 128 Byte round up in size */</div><div class='add'>+	sa_size = sizeof(struct cn10k_tx_sa_s) % OTX2_ALIGN ?</div><div class='add'>+			 (sizeof(struct cn10k_tx_sa_s) / OTX2_ALIGN + 1) *</div><div class='add'>+			 OTX2_ALIGN : sizeof(struct cn10k_tx_sa_s);</div><div class='add'>+	pf-&gt;ipsec.sa_size = sa_size;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;pf-&gt;ipsec.sa_work, cn10k_ipsec_sa_wq_handler);</div><div class='add'>+	pf-&gt;ipsec.sa_workq = alloc_workqueue("cn10k_ipsec_sa_workq",</div><div class='add'>+					     WQ_PERCPU, 0);</div><div class='add'>+	if (!pf-&gt;ipsec.sa_workq) {</div><div class='add'>+		netdev_err(pf-&gt;netdev, "SA alloc workqueue failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set xfrm device ops */</div><div class='add'>+	netdev-&gt;xfrmdev_ops = &amp;cn10k_ipsec_xfrmdev_ops;</div><div class='add'>+	netdev-&gt;hw_features |= NETIF_F_HW_ESP;</div><div class='add'>+	netdev-&gt;hw_enc_features |= NETIF_F_HW_ESP;</div><div class='add'>+</div><div class='add'>+	cn10k_cpt_device_set_unavailable(pf);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(cn10k_ipsec_init);</div><div class='add'>+</div><div class='add'>+void cn10k_ipsec_clean(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+	if (!is_dev_support_ipsec_offload(pf-&gt;pdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!(pf-&gt;flags &amp; OTX2_FLAG_IPSEC_OFFLOAD_ENABLED))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (pf-&gt;ipsec.sa_workq) {</div><div class='add'>+		destroy_workqueue(pf-&gt;ipsec.sa_workq);</div><div class='add'>+		pf-&gt;ipsec.sa_workq = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cn10k_outb_cpt_clean(pf);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(cn10k_ipsec_clean);</div><div class='add'>+</div><div class='add'>+static u16 cn10k_ipsec_get_ip_data_len(struct xfrm_state *x,</div><div class='add'>+				       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ipv6hdr *ipv6h;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	u8 *src;</div><div class='add'>+</div><div class='add'>+	src = (u8 *)skb-&gt;data + ETH_HLEN;</div><div class='add'>+</div><div class='add'>+	if (x-&gt;props.family == AF_INET) {</div><div class='add'>+		iph = (struct iphdr *)src;</div><div class='add'>+		return ntohs(iph-&gt;tot_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ipv6h = (struct ipv6hdr *)src;</div><div class='add'>+	return ntohs(ipv6h-&gt;payload_len) + sizeof(struct ipv6hdr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Prepare CPT and NIX SQE scatter/gather subdescriptor structure.</div><div class='add'>+ * SG of NIX and CPT are same in size.</div><div class='add'>+ * Layout of a NIX SQE and CPT SG entry:</div><div class='add'>+ *      -----------------------------</div><div class='add'>+ *     |     CPT Scatter Gather      |</div><div class='add'>+ *     |       (SQE SIZE)            |</div><div class='add'>+ *     |                             |</div><div class='add'>+ *      -----------------------------</div><div class='add'>+ *     |       NIX SQE               |</div><div class='add'>+ *     |       (SQE SIZE)            |</div><div class='add'>+ *     |                             |</div><div class='add'>+ *      -----------------------------</div><div class='add'>+ */</div><div class='add'>+bool otx2_sqe_add_sg_ipsec(struct otx2_nic *pfvf, struct otx2_snd_queue *sq,</div><div class='add'>+			   struct sk_buff *skb, int num_segs, int *offset)</div><div class='add'>+{</div><div class='add'>+	struct cpt_sg_s *cpt_sg = NULL;</div><div class='add'>+	struct nix_sqe_sg_s *sg = NULL;</div><div class='add'>+	u64 dma_addr, *iova = NULL;</div><div class='add'>+	u64 *cpt_iova = NULL;</div><div class='add'>+	u16 *sg_lens = NULL;</div><div class='add'>+	int seg, len;</div><div class='add'>+</div><div class='add'>+	sq-&gt;sg[sq-&gt;head].num_segs = 0;</div><div class='add'>+	cpt_sg = (struct cpt_sg_s *)(sq-&gt;sqe_base - sq-&gt;sqe_size);</div><div class='add'>+</div><div class='add'>+	for (seg = 0; seg &lt; num_segs; seg++) {</div><div class='add'>+		if ((seg % MAX_SEGS_PER_SG) == 0) {</div><div class='add'>+			sg = (struct nix_sqe_sg_s *)(sq-&gt;sqe_base + *offset);</div><div class='add'>+			sg-&gt;ld_type = NIX_SEND_LDTYPE_LDD;</div><div class='add'>+			sg-&gt;subdc = NIX_SUBDC_SG;</div><div class='add'>+			sg-&gt;segs = 0;</div><div class='add'>+			sg_lens = (void *)sg;</div><div class='add'>+			iova = (void *)sg + sizeof(*sg);</div><div class='add'>+			/* Next subdc always starts at a 16byte boundary.</div><div class='add'>+			 * So if sg-&gt;segs is whether 2 or 3, offset += 16bytes.</div><div class='add'>+			 */</div><div class='add'>+			if ((num_segs - seg) &gt;= (MAX_SEGS_PER_SG - 1))</div><div class='add'>+				*offset += sizeof(*sg) + (3 * sizeof(u64));</div><div class='add'>+			else</div><div class='add'>+				*offset += sizeof(*sg) + sizeof(u64);</div><div class='add'>+</div><div class='add'>+			cpt_sg += (seg / MAX_SEGS_PER_SG) * 4;</div><div class='add'>+			cpt_iova = (void *)cpt_sg + sizeof(*cpt_sg);</div><div class='add'>+		}</div><div class='add'>+		dma_addr = otx2_dma_map_skb_frag(pfvf, skb, seg, &amp;len);</div><div class='add'>+		if (dma_mapping_error(pfvf-&gt;dev, dma_addr))</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		sg_lens[seg % MAX_SEGS_PER_SG] = len;</div><div class='add'>+		sg-&gt;segs++;</div><div class='add'>+		*iova++ = dma_addr;</div><div class='add'>+		*cpt_iova++ = dma_addr;</div><div class='add'>+</div><div class='add'>+		/* Save DMA mapping info for later unmapping */</div><div class='add'>+		sq-&gt;sg[sq-&gt;head].dma_addr[seg] = dma_addr;</div><div class='add'>+		sq-&gt;sg[sq-&gt;head].size[seg] = len;</div><div class='add'>+		sq-&gt;sg[sq-&gt;head].num_segs++;</div><div class='add'>+</div><div class='add'>+		*cpt_sg = *(struct cpt_sg_s *)sg;</div><div class='add'>+		cpt_sg-&gt;rsvd_63_50 = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sq-&gt;sg[sq-&gt;head].skb = (u64)skb;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 cn10k_ipsec_get_param1(u8 iv_offset)</div><div class='add'>+{</div><div class='add'>+	u16 param1_val;</div><div class='add'>+</div><div class='add'>+	/* Set Crypto mode, disable L3/L4 checksum */</div><div class='add'>+	param1_val = CN10K_IPSEC_INST_PARAM1_DIS_L4_CSUM |</div><div class='add'>+		      CN10K_IPSEC_INST_PARAM1_DIS_L3_CSUM;</div><div class='add'>+	param1_val |= (u16)iv_offset &lt;&lt; CN10K_IPSEC_INST_PARAM1_IV_OFFSET_SHIFT;</div><div class='add'>+	return param1_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool cn10k_ipsec_transmit(struct otx2_nic *pf, struct netdev_queue *txq,</div><div class='add'>+			  struct otx2_snd_queue *sq, struct sk_buff *skb,</div><div class='add'>+			  int num_segs, int size)</div><div class='add'>+{</div><div class='add'>+	struct cpt_inst_s inst;</div><div class='add'>+	struct cpt_res_s *res;</div><div class='add'>+	struct xfrm_state *x;</div><div class='add'>+	struct qmem *sa_info;</div><div class='add'>+	dma_addr_t dptr_iova;</div><div class='add'>+	struct sec_path *sp;</div><div class='add'>+	u8 encap_offset;</div><div class='add'>+	u8 auth_offset;</div><div class='add'>+	u8 gthr_size;</div><div class='add'>+	u8 iv_offset;</div><div class='add'>+	u16 dlen;</div><div class='add'>+</div><div class='add'>+	/* Check for IPSEC offload enabled */</div><div class='add'>+	if (!(pf-&gt;flags &amp; OTX2_FLAG_IPSEC_OFFLOAD_ENABLED))</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	sp = skb_sec_path(skb);</div><div class='add'>+	if (unlikely(!sp-&gt;len))</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	x = xfrm_input_state(skb);</div><div class='add'>+	if (unlikely(!x))</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	if (x-&gt;props.mode != XFRM_MODE_TRANSPORT &amp;&amp;</div><div class='add'>+	    x-&gt;props.mode != XFRM_MODE_TUNNEL)</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	dlen = cn10k_ipsec_get_ip_data_len(x, skb);</div><div class='add'>+	if (dlen == 0 &amp;&amp; netif_msg_tx_err(pf)) {</div><div class='add'>+		netdev_err(pf-&gt;netdev, "Invalid IP header, ip-length zero\n");</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for valid SA context */</div><div class='add'>+	sa_info = (struct qmem *)x-&gt;xso.offload_handle;</div><div class='add'>+	if (!sa_info)</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	memset(&amp;inst, 0, sizeof(struct cpt_inst_s));</div><div class='add'>+</div><div class='add'>+	/* Get authentication offset */</div><div class='add'>+	if (x-&gt;props.family == AF_INET)</div><div class='add'>+		auth_offset = sizeof(struct iphdr);</div><div class='add'>+	else</div><div class='add'>+		auth_offset = sizeof(struct ipv6hdr);</div><div class='add'>+</div><div class='add'>+	/* IV offset is after ESP header */</div><div class='add'>+	iv_offset = auth_offset + sizeof(struct ip_esp_hdr);</div><div class='add'>+	/* Encap will start after IV */</div><div class='add'>+	encap_offset = iv_offset + GCM_RFC4106_IV_SIZE;</div><div class='add'>+</div><div class='add'>+	/* CPT Instruction word-1 */</div><div class='add'>+	res = (struct cpt_res_s *)(sq-&gt;cpt_resp-&gt;base + (64 * sq-&gt;head));</div><div class='add'>+	res-&gt;compcode = 0;</div><div class='add'>+	inst.res_addr = sq-&gt;cpt_resp-&gt;iova + (64 * sq-&gt;head);</div><div class='add'>+</div><div class='add'>+	/* CPT Instruction word-2 */</div><div class='add'>+	inst.rvu_pf_func = pf-&gt;pcifunc;</div><div class='add'>+</div><div class='add'>+	/* CPT Instruction word-3:</div><div class='add'>+	 * Set QORD to force CPT_RES_S write completion</div><div class='add'>+	 */</div><div class='add'>+	inst.qord = 1;</div><div class='add'>+</div><div class='add'>+	/* CPT Instruction word-4 */</div><div class='add'>+	/* inst.dlen should not include ICV length */</div><div class='add'>+	inst.dlen = dlen + ETH_HLEN - (x-&gt;aead-&gt;alg_icv_len / 8);</div><div class='add'>+	inst.opcode_major = CN10K_IPSEC_MAJOR_OP_OUTB_IPSEC;</div><div class='add'>+	inst.param1 = cn10k_ipsec_get_param1(iv_offset);</div><div class='add'>+</div><div class='add'>+	inst.param2 = encap_offset &lt;&lt;</div><div class='add'>+		       CN10K_IPSEC_INST_PARAM2_ENC_DATA_OFFSET_SHIFT;</div><div class='add'>+	inst.param2 |= (u16)auth_offset &lt;&lt;</div><div class='add'>+			CN10K_IPSEC_INST_PARAM2_AUTH_DATA_OFFSET_SHIFT;</div><div class='add'>+</div><div class='add'>+	/* CPT Instruction word-5 */</div><div class='add'>+	gthr_size = num_segs / MAX_SEGS_PER_SG;</div><div class='add'>+	gthr_size = (num_segs % MAX_SEGS_PER_SG) ? gthr_size + 1 : gthr_size;</div><div class='add'>+</div><div class='add'>+	gthr_size &amp;= 0xF;</div><div class='add'>+	dptr_iova = (sq-&gt;sqe_ring-&gt;iova + (sq-&gt;head * (sq-&gt;sqe_size * 2)));</div><div class='add'>+	inst.dptr = dptr_iova | ((u64)gthr_size &lt;&lt; 60);</div><div class='add'>+</div><div class='add'>+	/* CPT Instruction word-6 */</div><div class='add'>+	inst.rptr = inst.dptr;</div><div class='add'>+</div><div class='add'>+	/* CPT Instruction word-7 */</div><div class='add'>+	inst.cptr = sa_info-&gt;iova;</div><div class='add'>+	inst.ctx_val = 1;</div><div class='add'>+	inst.egrp = CN10K_DEF_CPT_IPSEC_EGRP;</div><div class='add'>+</div><div class='add'>+	/* CPT Instruction word-0 */</div><div class='add'>+	inst.nixtxl = (size / 16) - 1;</div><div class='add'>+	inst.dat_offset = ETH_HLEN;</div><div class='add'>+	inst.nixtx_offset = sq-&gt;sqe_size;</div><div class='add'>+</div><div class='add'>+	netdev_tx_sent_queue(txq, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* Finally Flush the CPT instruction */</div><div class='add'>+	sq-&gt;head++;</div><div class='add'>+	sq-&gt;head &amp;= (sq-&gt;sqe_cnt - 1);</div><div class='add'>+	cn10k_cpt_inst_flush(pf, &amp;inst, sizeof(struct cpt_inst_s));</div><div class='add'>+	return true;</div><div class='add'>+drop:</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.h b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.h<br/>new file mode 100644<br/>index 000000000000..43fbce0d6039<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.h</a></div><div class='hunk'>@@ -0,0 +1,265 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Marvell IPSEC offload driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef CN10K_IPSEC_H</div><div class='add'>+#define CN10K_IPSEC_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+DECLARE_STATIC_KEY_FALSE(cn10k_ipsec_sa_enabled);</div><div class='add'>+</div><div class='add'>+/* CPT instruction size in bytes */</div><div class='add'>+#define CN10K_CPT_INST_SIZE	64</div><div class='add'>+</div><div class='add'>+/* CPT instruction (CPT_INST_S) queue length */</div><div class='add'>+#define CN10K_CPT_INST_QLEN	8200</div><div class='add'>+</div><div class='add'>+/* CPT instruction queue size passed to HW is in units of</div><div class='add'>+ * 40*CPT_INST_S messages.</div><div class='add'>+ */</div><div class='add'>+#define CN10K_CPT_SIZE_DIV40 (CN10K_CPT_INST_QLEN / 40)</div><div class='add'>+</div><div class='add'>+/* CPT needs 320 free entries */</div><div class='add'>+#define CN10K_CPT_INST_QLEN_EXTRA_BYTES	(320 * CN10K_CPT_INST_SIZE)</div><div class='add'>+#define CN10K_CPT_EXTRA_SIZE_DIV40	(320 / 40)</div><div class='add'>+</div><div class='add'>+/* CPT instruction queue length in bytes */</div><div class='add'>+#define CN10K_CPT_INST_QLEN_BYTES					\</div><div class='add'>+		((CN10K_CPT_SIZE_DIV40 * 40 * CN10K_CPT_INST_SIZE) +	\</div><div class='add'>+		CN10K_CPT_INST_QLEN_EXTRA_BYTES)</div><div class='add'>+</div><div class='add'>+/* CPT instruction group queue length in bytes */</div><div class='add'>+#define CN10K_CPT_INST_GRP_QLEN_BYTES					\</div><div class='add'>+		((CN10K_CPT_SIZE_DIV40 + CN10K_CPT_EXTRA_SIZE_DIV40) * 16)</div><div class='add'>+</div><div class='add'>+/* CPT FC length in bytes */</div><div class='add'>+#define CN10K_CPT_Q_FC_LEN 128</div><div class='add'>+</div><div class='add'>+/* Default CPT engine group for ipsec offload */</div><div class='add'>+#define CN10K_DEF_CPT_IPSEC_EGRP 1</div><div class='add'>+</div><div class='add'>+/* CN10K CPT LF registers */</div><div class='add'>+#define CPT_LFBASE			(BLKTYPE_CPT &lt;&lt; RVU_FUNC_BLKADDR_SHIFT)</div><div class='add'>+#define CN10K_CPT_LF_CTL		(CPT_LFBASE | 0x10)</div><div class='add'>+#define CN10K_CPT_LF_INPROG		(CPT_LFBASE | 0x40)</div><div class='add'>+#define CN10K_CPT_LF_Q_BASE		(CPT_LFBASE | 0xf0)</div><div class='add'>+#define CN10K_CPT_LF_Q_SIZE		(CPT_LFBASE | 0x100)</div><div class='add'>+#define CN10K_CPT_LF_Q_INST_PTR		(CPT_LFBASE | 0x110)</div><div class='add'>+#define CN10K_CPT_LF_Q_GRP_PTR		(CPT_LFBASE | 0x120)</div><div class='add'>+#define CN10K_CPT_LF_NQX(a)		(CPT_LFBASE | 0x400 | (a) &lt;&lt; 3)</div><div class='add'>+#define CN10K_CPT_LF_CTX_FLUSH		(CPT_LFBASE | 0x510)</div><div class='add'>+</div><div class='add'>+/* IPSEC Instruction opcodes */</div><div class='add'>+#define CN10K_IPSEC_MAJOR_OP_WRITE_SA 0x01UL</div><div class='add'>+#define CN10K_IPSEC_MINOR_OP_WRITE_SA 0x09UL</div><div class='add'>+#define CN10K_IPSEC_MAJOR_OP_OUTB_IPSEC 0x2AUL</div><div class='add'>+</div><div class='add'>+enum cn10k_cpt_comp_e {</div><div class='add'>+	CN10K_CPT_COMP_E_NOTDONE = 0x00,</div><div class='add'>+	CN10K_CPT_COMP_E_GOOD = 0x01,</div><div class='add'>+	CN10K_CPT_COMP_E_FAULT = 0x02,</div><div class='add'>+	CN10K_CPT_COMP_E_HWERR = 0x04,</div><div class='add'>+	CN10K_CPT_COMP_E_INSTERR = 0x05,</div><div class='add'>+	CN10K_CPT_COMP_E_WARN = 0x06,</div><div class='add'>+	CN10K_CPT_COMP_E_MASK = 0x3F</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cn10k_cpt_inst_queue {</div><div class='add'>+	u8 *vaddr;</div><div class='add'>+	u8 *real_vaddr;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	dma_addr_t real_dma_addr;</div><div class='add'>+	u32 size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum cn10k_cpt_hw_state_e {</div><div class='add'>+	CN10K_CPT_HW_UNAVAILABLE,</div><div class='add'>+	CN10K_CPT_HW_AVAILABLE,</div><div class='add'>+	CN10K_CPT_HW_IN_USE</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cn10k_ipsec {</div><div class='add'>+	/* Outbound CPT */</div><div class='add'>+	u64 io_addr;</div><div class='add'>+	atomic_t cpt_state;</div><div class='add'>+	struct cn10k_cpt_inst_queue iq;</div><div class='add'>+</div><div class='add'>+	/* SA info */</div><div class='add'>+	u32 sa_size;</div><div class='add'>+	u32 outb_sa_count;</div><div class='add'>+	struct work_struct sa_work;</div><div class='add'>+	struct workqueue_struct *sa_workq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CN10K IPSEC Security Association (SA) */</div><div class='add'>+/* SA direction */</div><div class='add'>+#define CN10K_IPSEC_SA_DIR_INB			0</div><div class='add'>+#define CN10K_IPSEC_SA_DIR_OUTB			1</div><div class='add'>+/* SA protocol */</div><div class='add'>+#define CN10K_IPSEC_SA_IPSEC_PROTO_AH		0</div><div class='add'>+#define CN10K_IPSEC_SA_IPSEC_PROTO_ESP		1</div><div class='add'>+/* SA Encryption Type */</div><div class='add'>+#define CN10K_IPSEC_SA_ENCAP_TYPE_AES_GCM	5</div><div class='add'>+/* SA IPSEC mode Transport/Tunnel */</div><div class='add'>+#define CN10K_IPSEC_SA_IPSEC_MODE_TRANSPORT	0</div><div class='add'>+#define CN10K_IPSEC_SA_IPSEC_MODE_TUNNEL	1</div><div class='add'>+/* SA AES Key Length */</div><div class='add'>+#define CN10K_IPSEC_SA_AES_KEY_LEN_128		1</div><div class='add'>+#define CN10K_IPSEC_SA_AES_KEY_LEN_192		2</div><div class='add'>+#define CN10K_IPSEC_SA_AES_KEY_LEN_256		3</div><div class='add'>+/* IV Source */</div><div class='add'>+#define CN10K_IPSEC_SA_IV_SRC_COUNTER		0</div><div class='add'>+#define CN10K_IPSEC_SA_IV_SRC_PACKET		3</div><div class='add'>+</div><div class='add'>+struct cn10k_tx_sa_s {</div><div class='add'>+	u64 esn_en		: 1; /* W0 */</div><div class='add'>+	u64 rsvd_w0_1_8		: 8;</div><div class='add'>+	u64 hw_ctx_off		: 7;</div><div class='add'>+	u64 ctx_id		: 16;</div><div class='add'>+	u64 rsvd_w0_32_47	: 16;</div><div class='add'>+	u64 ctx_push_size	: 7;</div><div class='add'>+	u64 rsvd_w0_55		: 1;</div><div class='add'>+	u64 ctx_hdr_size	: 2;</div><div class='add'>+	u64 aop_valid		: 1;</div><div class='add'>+	u64 rsvd_w0_59		: 1;</div><div class='add'>+	u64 ctx_size		: 4;</div><div class='add'>+	u64 w1;			/* W1 */</div><div class='add'>+	u64 sa_valid		: 1; /* W2 */</div><div class='add'>+	u64 sa_dir		: 1;</div><div class='add'>+	u64 rsvd_w2_2_3		: 2;</div><div class='add'>+	u64 ipsec_mode		: 1;</div><div class='add'>+	u64 ipsec_protocol	: 1;</div><div class='add'>+	u64 aes_key_len		: 2;</div><div class='add'>+	u64 enc_type		: 3;</div><div class='add'>+	u64 rsvd_w2_11_19	: 9;</div><div class='add'>+	u64 iv_src		: 2;</div><div class='add'>+	u64 rsvd_w2_22_31	: 10;</div><div class='add'>+	u64 rsvd_w2_32_63	: 32;</div><div class='add'>+	u64 w3;			/* W3 */</div><div class='add'>+	u8 cipher_key[32];	/* W4 - W7 */</div><div class='add'>+	u32 rsvd_w8_0_31;	/* W8 : IV */</div><div class='add'>+	u32 iv_gcm_salt;</div><div class='add'>+	u64 rsvd_w9_w30[22];	/* W9 - W30 */</div><div class='add'>+	u64 hw_ctx[6];		/* W31 - W36 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CPT instruction parameter-1 */</div><div class='add'>+#define CN10K_IPSEC_INST_PARAM1_DIS_L4_CSUM		0x1</div><div class='add'>+#define CN10K_IPSEC_INST_PARAM1_DIS_L3_CSUM		0x2</div><div class='add'>+#define CN10K_IPSEC_INST_PARAM1_CRYPTO_MODE		0x20</div><div class='add'>+#define CN10K_IPSEC_INST_PARAM1_IV_OFFSET_SHIFT		8</div><div class='add'>+</div><div class='add'>+/* CPT instruction parameter-2 */</div><div class='add'>+#define CN10K_IPSEC_INST_PARAM2_ENC_DATA_OFFSET_SHIFT	0</div><div class='add'>+#define CN10K_IPSEC_INST_PARAM2_AUTH_DATA_OFFSET_SHIFT	8</div><div class='add'>+</div><div class='add'>+/* CPT Instruction Structure */</div><div class='add'>+struct cpt_inst_s {</div><div class='add'>+	u64 nixtxl		: 3; /* W0 */</div><div class='add'>+	u64 doneint		: 1;</div><div class='add'>+	u64 rsvd_w0_4_15	: 12;</div><div class='add'>+	u64 dat_offset		: 8;</div><div class='add'>+	u64 ext_param1		: 8;</div><div class='add'>+	u64 nixtx_offset	: 20;</div><div class='add'>+	u64 rsvd_w0_52_63	: 12;</div><div class='add'>+	u64 res_addr;		/* W1 */</div><div class='add'>+	u64 tag			: 32; /* W2 */</div><div class='add'>+	u64 tt			: 2;</div><div class='add'>+	u64 grp			: 10;</div><div class='add'>+	u64 rsvd_w2_44_47	: 4;</div><div class='add'>+	u64 rvu_pf_func		: 16;</div><div class='add'>+	u64 qord		: 1; /* W3 */</div><div class='add'>+	u64 rsvd_w3_1_2		: 2;</div><div class='add'>+	u64 wqe_ptr		: 61;</div><div class='add'>+	u64 dlen		: 16; /* W4 */</div><div class='add'>+	u64 param2		: 16;</div><div class='add'>+	u64 param1		: 16;</div><div class='add'>+	u64 opcode_major	: 8;</div><div class='add'>+	u64 opcode_minor	: 8;</div><div class='add'>+	u64 dptr;		/* W5 */</div><div class='add'>+	u64 rptr;		/* W6 */</div><div class='add'>+	u64 cptr		: 60; /* W7 */</div><div class='add'>+	u64 ctx_val		: 1;</div><div class='add'>+	u64 egrp		: 3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CPT Instruction Result Structure */</div><div class='add'>+struct cpt_res_s {</div><div class='add'>+	u64 compcode		: 7; /* W0 */</div><div class='add'>+	u64 doneint		: 1;</div><div class='add'>+	u64 uc_compcode		: 8;</div><div class='add'>+	u64 uc_info		: 48;</div><div class='add'>+	u64 esn;		/* W1 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CPT SG structure */</div><div class='add'>+struct cpt_sg_s {</div><div class='add'>+	u64 seg1_size	: 16;</div><div class='add'>+	u64 seg2_size	: 16;</div><div class='add'>+	u64 seg3_size	: 16;</div><div class='add'>+	u64 segs	: 2;</div><div class='add'>+	u64 rsvd_63_50	: 14;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CPT LF_INPROG Register */</div><div class='add'>+#define CPT_LF_INPROG_INFLIGHT	GENMASK_ULL(8, 0)</div><div class='add'>+#define CPT_LF_INPROG_GRB_CNT	GENMASK_ULL(39, 32)</div><div class='add'>+#define CPT_LF_INPROG_GWB_CNT	GENMASK_ULL(47, 40)</div><div class='add'>+</div><div class='add'>+/* CPT LF_Q_GRP_PTR Register */</div><div class='add'>+#define CPT_LF_Q_GRP_PTR_DQ_PTR	GENMASK_ULL(14, 0)</div><div class='add'>+#define CPT_LF_Q_GRP_PTR_NQ_PTR	GENMASK_ULL(46, 32)</div><div class='add'>+</div><div class='add'>+/* CPT LF_Q_SIZE Register */</div><div class='add'>+#define CPT_LF_Q_BASE_ADDR GENMASK_ULL(52, 7)</div><div class='add'>+</div><div class='add'>+/* CPT LF_Q_SIZE Register */</div><div class='add'>+#define CPT_LF_Q_SIZE_DIV40 GENMASK_ULL(14, 0)</div><div class='add'>+</div><div class='add'>+/* CPT LF CTX Flush Register */</div><div class='add'>+#define CPT_LF_CTX_FLUSH_CPTR GENMASK_ULL(45, 0)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_XFRM_OFFLOAD</div><div class='add'>+int cn10k_ipsec_init(struct net_device *netdev);</div><div class='add'>+void cn10k_ipsec_clean(struct otx2_nic *pf);</div><div class='add'>+int cn10k_ipsec_ethtool_init(struct net_device *netdev, bool enable);</div><div class='add'>+bool otx2_sqe_add_sg_ipsec(struct otx2_nic *pfvf, struct otx2_snd_queue *sq,</div><div class='add'>+			   struct sk_buff *skb, int num_segs, int *offset);</div><div class='add'>+bool cn10k_ipsec_transmit(struct otx2_nic *pf, struct netdev_queue *txq,</div><div class='add'>+			  struct otx2_snd_queue *sq, struct sk_buff *skb,</div><div class='add'>+			  int num_segs, int size);</div><div class='add'>+#else</div><div class='add'>+static inline __maybe_unused int cn10k_ipsec_init(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline __maybe_unused void cn10k_ipsec_clean(struct otx2_nic *pf)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline __maybe_unused</div><div class='add'>+int cn10k_ipsec_ethtool_init(struct net_device *netdev, bool enable)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool __maybe_unused</div><div class='add'>+otx2_sqe_add_sg_ipsec(struct otx2_nic *pfvf, struct otx2_snd_queue *sq,</div><div class='add'>+		      struct sk_buff *skb, int num_segs, int *offset)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool __maybe_unused</div><div class='add'>+cn10k_ipsec_transmit(struct otx2_nic *pf, struct netdev_queue *txq,</div><div class='add'>+		     struct otx2_snd_queue *sq, struct sk_buff *skb,</div><div class='add'>+		     int num_segs, int size)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+#endif // CN10K_IPSEC_H</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c b/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c<br/>index 6cc7a78968fc..4c7e0f345cb5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c</a></div><div class='hunk'>@@ -133,9 +133,7 @@ static const char *rsrc_name(enum mcs_rsrc_type rsrc_type)</div><div class='ctx'> 		return "SA";</div><div class='ctx'> 	default:</div><div class='ctx'> 		return "Unknown";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	return "Unknown";</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cn10k_mcs_alloc_rsrc(struct otx2_nic *pfvf, enum mcs_direction dir,</div><div class='hunk'>@@ -533,7 +531,8 @@ static int cn10k_mcs_write_tx_secy(struct otx2_nic *pfvf,</div><div class='ctx'> 	if (sw_tx_sc-&gt;encrypt)</div><div class='ctx'> 		sectag_tci |= (MCS_TCI_E | MCS_TCI_C);</div><div class='ctx'> </div><div class='del'>-	policy = FIELD_PREP(MCS_TX_SECY_PLCY_MTU, secy-&gt;netdev-&gt;mtu);</div><div class='add'>+	policy = FIELD_PREP(MCS_TX_SECY_PLCY_MTU,</div><div class='add'>+			    pfvf-&gt;netdev-&gt;mtu + OTX2_ETH_HLEN);</div><div class='ctx'> 	/* Write SecTag excluding AN bits(1..0) */</div><div class='ctx'> 	policy |= FIELD_PREP(MCS_TX_SECY_PLCY_ST_TCI, sectag_tci &gt;&gt; 2);</div><div class='ctx'> 	policy |= FIELD_PREP(MCS_TX_SECY_PLCY_ST_OFFSET, tag_offset);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c b/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c<br/>new file mode 100644<br/>index 000000000000..a60f8cf53feb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c</a></div><div class='hunk'>@@ -0,0 +1,450 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Marvell RVU Ethernet driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "otx2_common.h"</div><div class='add'>+#include "otx2_reg.h"</div><div class='add'>+#include "otx2_struct.h"</div><div class='add'>+#include "cn10k.h"</div><div class='add'>+</div><div class='add'>+/* CN20K mbox AF =&gt; PFx irq handler */</div><div class='add'>+irqreturn_t cn20k_pfaf_mbox_intr_handler(int irq, void *pf_irq)</div><div class='add'>+{</div><div class='add'>+	struct otx2_nic *pf = pf_irq;</div><div class='add'>+	struct mbox *mw = &amp;pf-&gt;mbox;</div><div class='add'>+	struct otx2_mbox_dev *mdev;</div><div class='add'>+	struct otx2_mbox *mbox;</div><div class='add'>+	struct mbox_hdr *hdr;</div><div class='add'>+	u64 pf_trig_val;</div><div class='add'>+</div><div class='add'>+	pf_trig_val = otx2_read64(pf, RVU_PF_INT) &amp; 0x3ULL;</div><div class='add'>+</div><div class='add'>+	/* Clear the IRQ */</div><div class='add'>+	otx2_write64(pf, RVU_PF_INT, pf_trig_val);</div><div class='add'>+</div><div class='add'>+	if (pf_trig_val &amp; BIT_ULL(0)) {</div><div class='add'>+		mbox = &amp;mw-&gt;mbox_up;</div><div class='add'>+		mdev = &amp;mbox-&gt;dev[0];</div><div class='add'>+		otx2_sync_mbox_bbuf(mbox, 0);</div><div class='add'>+</div><div class='add'>+		hdr = (struct mbox_hdr *)(mdev-&gt;mbase + mbox-&gt;rx_start);</div><div class='add'>+		if (hdr-&gt;num_msgs)</div><div class='add'>+			queue_work(pf-&gt;mbox_wq, &amp;mw-&gt;mbox_up_wrk);</div><div class='add'>+</div><div class='add'>+		trace_otx2_msg_interrupt(pf-&gt;pdev, "UP message from AF to PF",</div><div class='add'>+					 BIT_ULL(0));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pf_trig_val &amp; BIT_ULL(1)) {</div><div class='add'>+		mbox = &amp;mw-&gt;mbox;</div><div class='add'>+		mdev = &amp;mbox-&gt;dev[0];</div><div class='add'>+		otx2_sync_mbox_bbuf(mbox, 0);</div><div class='add'>+</div><div class='add'>+		hdr = (struct mbox_hdr *)(mdev-&gt;mbase + mbox-&gt;rx_start);</div><div class='add'>+		if (hdr-&gt;num_msgs)</div><div class='add'>+			queue_work(pf-&gt;mbox_wq, &amp;mw-&gt;mbox_wrk);</div><div class='add'>+		trace_otx2_msg_interrupt(pf-&gt;pdev, "DOWN reply from AF to PF",</div><div class='add'>+					 BIT_ULL(1));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+irqreturn_t cn20k_vfaf_mbox_intr_handler(int irq, void *vf_irq)</div><div class='add'>+{</div><div class='add'>+	struct otx2_nic *vf = vf_irq;</div><div class='add'>+	struct otx2_mbox_dev *mdev;</div><div class='add'>+	struct otx2_mbox *mbox;</div><div class='add'>+	struct mbox_hdr *hdr;</div><div class='add'>+	u64 vf_trig_val;</div><div class='add'>+</div><div class='add'>+	vf_trig_val = otx2_read64(vf, RVU_VF_INT) &amp; 0x3ULL;</div><div class='add'>+	/* Clear the IRQ */</div><div class='add'>+	otx2_write64(vf, RVU_VF_INT, vf_trig_val);</div><div class='add'>+</div><div class='add'>+	/* Read latest mbox data */</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='add'>+	if (vf_trig_val &amp; BIT_ULL(1)) {</div><div class='add'>+		/* Check for PF =&gt; VF response messages */</div><div class='add'>+		mbox = &amp;vf-&gt;mbox.mbox;</div><div class='add'>+		mdev = &amp;mbox-&gt;dev[0];</div><div class='add'>+		otx2_sync_mbox_bbuf(mbox, 0);</div><div class='add'>+</div><div class='add'>+		hdr = (struct mbox_hdr *)(mdev-&gt;mbase + mbox-&gt;rx_start);</div><div class='add'>+		if (hdr-&gt;num_msgs)</div><div class='add'>+			queue_work(vf-&gt;mbox_wq, &amp;vf-&gt;mbox.mbox_wrk);</div><div class='add'>+</div><div class='add'>+		trace_otx2_msg_interrupt(mbox-&gt;pdev, "DOWN reply from PF0 to VF",</div><div class='add'>+					 BIT_ULL(1));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vf_trig_val &amp; BIT_ULL(0)) {</div><div class='add'>+		/* Check for PF =&gt; VF notification messages */</div><div class='add'>+		mbox = &amp;vf-&gt;mbox.mbox_up;</div><div class='add'>+		mdev = &amp;mbox-&gt;dev[0];</div><div class='add'>+		otx2_sync_mbox_bbuf(mbox, 0);</div><div class='add'>+</div><div class='add'>+		hdr = (struct mbox_hdr *)(mdev-&gt;mbase + mbox-&gt;rx_start);</div><div class='add'>+		if (hdr-&gt;num_msgs)</div><div class='add'>+			queue_work(vf-&gt;mbox_wq, &amp;vf-&gt;mbox.mbox_up_wrk);</div><div class='add'>+</div><div class='add'>+		trace_otx2_msg_interrupt(mbox-&gt;pdev, "UP message from PF0 to VF",</div><div class='add'>+					 BIT_ULL(0));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cn20k_enable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs)</div><div class='add'>+{</div><div class='add'>+	/* Clear PF &lt;=&gt; VF mailbox IRQ */</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF_INTX(0), ~0ull);</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF_INTX(1), ~0ull);</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(0), ~0ull);</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(1), ~0ull);</div><div class='add'>+</div><div class='add'>+	/* Enable PF &lt;=&gt; VF mailbox IRQ */</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(0), INTR_MASK(numvfs));</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(0), INTR_MASK(numvfs));</div><div class='add'>+	if (numvfs &gt; 64) {</div><div class='add'>+		numvfs -= 64;</div><div class='add'>+		otx2_write64(pf, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(1),</div><div class='add'>+			     INTR_MASK(numvfs));</div><div class='add'>+		otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(1),</div><div class='add'>+			     INTR_MASK(numvfs));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void cn20k_disable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs)</div><div class='add'>+{</div><div class='add'>+	int vector, intr_vec, vec = 0;</div><div class='add'>+</div><div class='add'>+	/* Disable PF &lt;=&gt; VF mailbox IRQ */</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF_INT_ENA_W1CX(0), ~0ull);</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF_INT_ENA_W1CX(1), ~0ull);</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(0), ~0ull);</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(1), ~0ull);</div><div class='add'>+</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF_INTX(0), ~0ull);</div><div class='add'>+	otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(0), ~0ull);</div><div class='add'>+</div><div class='add'>+	if (numvfs &gt; 64) {</div><div class='add'>+		otx2_write64(pf, RVU_MBOX_PF_VFPF_INTX(1), ~0ull);</div><div class='add'>+		otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(1), ~0ull);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (intr_vec = RVU_MBOX_PF_INT_VEC_VFPF_MBOX0; intr_vec &lt;=</div><div class='add'>+			RVU_MBOX_PF_INT_VEC_VFPF1_MBOX1; intr_vec++, vec++) {</div><div class='add'>+		vector = pci_irq_vector(pf-&gt;pdev, intr_vec);</div><div class='add'>+		free_irq(vector, pf-&gt;hw.pfvf_irq_devid[vec]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+irqreturn_t cn20k_pfvf_mbox_intr_handler(int irq, void *pf_irq)</div><div class='add'>+{</div><div class='add'>+	struct pf_irq_data *irq_data = pf_irq;</div><div class='add'>+	struct otx2_nic *pf = irq_data-&gt;pf;</div><div class='add'>+	struct mbox *mbox;</div><div class='add'>+	u64 intr;</div><div class='add'>+</div><div class='add'>+	/* Sync with mbox memory region */</div><div class='add'>+	rmb();</div><div class='add'>+</div><div class='add'>+	/* Clear interrupts */</div><div class='add'>+	intr = otx2_read64(pf, irq_data-&gt;intr_status);</div><div class='add'>+	otx2_write64(pf, irq_data-&gt;intr_status, intr);</div><div class='add'>+	mbox = pf-&gt;mbox_pfvf;</div><div class='add'>+</div><div class='add'>+	if (intr)</div><div class='add'>+		trace_otx2_msg_interrupt(pf-&gt;pdev, "VF(s) to PF", intr);</div><div class='add'>+</div><div class='add'>+	irq_data-&gt;pf_queue_work_hdlr(mbox, pf-&gt;mbox_pfvf_wq, irq_data-&gt;start,</div><div class='add'>+				     irq_data-&gt;mdevs, intr);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int cn20k_register_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs)</div><div class='add'>+{</div><div class='add'>+	struct otx2_hw *hw = &amp;pf-&gt;hw;</div><div class='add'>+	struct pf_irq_data *irq_data;</div><div class='add'>+	int intr_vec, ret, vec = 0;</div><div class='add'>+	char *irq_name;</div><div class='add'>+</div><div class='add'>+	/* irq data for 4 PF intr vectors */</div><div class='add'>+	irq_data = devm_kcalloc(pf-&gt;dev, 4,</div><div class='add'>+				sizeof(struct pf_irq_data), GFP_KERNEL);</div><div class='add'>+	if (!irq_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (intr_vec = RVU_MBOX_PF_INT_VEC_VFPF_MBOX0; intr_vec &lt;=</div><div class='add'>+			RVU_MBOX_PF_INT_VEC_VFPF1_MBOX1; intr_vec++, vec++) {</div><div class='add'>+		switch (intr_vec) {</div><div class='add'>+		case RVU_MBOX_PF_INT_VEC_VFPF_MBOX0:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_PF_VFPF_INTX(0);</div><div class='add'>+			irq_data[vec].start = 0;</div><div class='add'>+			irq_data[vec].mdevs = 64;</div><div class='add'>+			break;</div><div class='add'>+		case RVU_MBOX_PF_INT_VEC_VFPF_MBOX1:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_PF_VFPF_INTX(1);</div><div class='add'>+			irq_data[vec].start = 64;</div><div class='add'>+			irq_data[vec].mdevs = 96;</div><div class='add'>+			break;</div><div class='add'>+		case RVU_MBOX_PF_INT_VEC_VFPF1_MBOX0:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_PF_VFPF1_INTX(0);</div><div class='add'>+			irq_data[vec].start = 0;</div><div class='add'>+			irq_data[vec].mdevs = 64;</div><div class='add'>+			break;</div><div class='add'>+		case RVU_MBOX_PF_INT_VEC_VFPF1_MBOX1:</div><div class='add'>+			irq_data[vec].intr_status =</div><div class='add'>+						RVU_MBOX_PF_VFPF1_INTX(1);</div><div class='add'>+			irq_data[vec].start = 64;</div><div class='add'>+			irq_data[vec].mdevs = 96;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		irq_data[vec].pf_queue_work_hdlr = otx2_queue_vf_work;</div><div class='add'>+		irq_data[vec].vec_num = intr_vec;</div><div class='add'>+		irq_data[vec].pf = pf;</div><div class='add'>+</div><div class='add'>+		/* Register mailbox interrupt handler */</div><div class='add'>+		irq_name = &amp;hw-&gt;irq_name[intr_vec * NAME_SIZE];</div><div class='add'>+		if (pf-&gt;pcifunc)</div><div class='add'>+			snprintf(irq_name, NAME_SIZE,</div><div class='add'>+				 "RVUPF%d_VF%d Mbox%d", rvu_get_pf(pf-&gt;pdev,</div><div class='add'>+				 pf-&gt;pcifunc), vec / 2, vec % 2);</div><div class='add'>+		else</div><div class='add'>+			snprintf(irq_name, NAME_SIZE, "RVUPF_VF%d Mbox%d",</div><div class='add'>+				 vec / 2, vec % 2);</div><div class='add'>+</div><div class='add'>+		hw-&gt;pfvf_irq_devid[vec] = &amp;irq_data[vec];</div><div class='add'>+		ret = request_irq(pci_irq_vector(pf-&gt;pdev, intr_vec),</div><div class='add'>+				  pf-&gt;hw_ops-&gt;pfvf_mbox_intr_handler, 0,</div><div class='add'>+				  irq_name,</div><div class='add'>+				  &amp;irq_data[vec]);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(pf-&gt;dev,</div><div class='add'>+				"RVUPF: IRQ registration failed for PFVF mbox0 irq\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cn20k_enable_pfvf_mbox_intr(pf, numvfs);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define RQ_BP_LVL_AURA   (255 - ((85 * 256) / 100)) /* BP when 85% is full */</div><div class='add'>+</div><div class='add'>+static u8 cn20k_aura_bpid_idx(struct otx2_nic *pfvf, int aura_id)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_DCB</div><div class='add'>+	return pfvf-&gt;queue_to_pfc_map[aura_id];</div><div class='add'>+#else</div><div class='add'>+	return 0;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn20k_aura_aq_init(struct otx2_nic *pfvf, int aura_id,</div><div class='add'>+			      int pool_id, int numptrs)</div><div class='add'>+{</div><div class='add'>+	struct npa_cn20k_aq_enq_req *aq;</div><div class='add'>+	struct otx2_pool *pool;</div><div class='add'>+	u8 bpid_idx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pool = &amp;pfvf-&gt;qset.pool[pool_id];</div><div class='add'>+</div><div class='add'>+	/* Allocate memory for HW to update Aura count.</div><div class='add'>+	 * Alloc one cache line, so that it fits all FC_STYPE modes.</div><div class='add'>+	 */</div><div class='add'>+	if (!pool-&gt;fc_addr) {</div><div class='add'>+		err = qmem_alloc(pfvf-&gt;dev, &amp;pool-&gt;fc_addr, 1, OTX2_ALIGN);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize this aura's context via AF */</div><div class='add'>+	aq = otx2_mbox_alloc_msg_npa_cn20k_aq_enq(&amp;pfvf-&gt;mbox);</div><div class='add'>+	if (!aq) {</div><div class='add'>+		/* Shared mbox memory buffer is full, flush it and retry */</div><div class='add'>+		err = otx2_sync_mbox_msg(&amp;pfvf-&gt;mbox);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		aq = otx2_mbox_alloc_msg_npa_cn20k_aq_enq(&amp;pfvf-&gt;mbox);</div><div class='add'>+		if (!aq)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq-&gt;aura_id = aura_id;</div><div class='add'>+</div><div class='add'>+	/* Will be filled by AF with correct pool context address */</div><div class='add'>+	aq-&gt;aura.pool_addr = pool_id;</div><div class='add'>+	aq-&gt;aura.pool_caching = 1;</div><div class='add'>+	aq-&gt;aura.shift = ilog2(numptrs) - 8;</div><div class='add'>+	aq-&gt;aura.count = numptrs;</div><div class='add'>+	aq-&gt;aura.limit = numptrs;</div><div class='add'>+	aq-&gt;aura.avg_level = 255;</div><div class='add'>+	aq-&gt;aura.ena = 1;</div><div class='add'>+	aq-&gt;aura.fc_ena = 1;</div><div class='add'>+	aq-&gt;aura.fc_addr = pool-&gt;fc_addr-&gt;iova;</div><div class='add'>+	aq-&gt;aura.fc_hyst_bits = 0; /* Store count on all updates */</div><div class='add'>+</div><div class='add'>+	/* Enable backpressure for RQ aura */</div><div class='add'>+	if (aura_id &lt; pfvf-&gt;hw.rqpool_cnt &amp;&amp; !is_otx2_lbkvf(pfvf-&gt;pdev)) {</div><div class='add'>+		aq-&gt;aura.bp_ena = 0;</div><div class='add'>+		/* If NIX1 LF is attached then specify NIX1_RX.</div><div class='add'>+		 *</div><div class='add'>+		 * Below NPA_AURA_S[BP_ENA] is set according to the</div><div class='add'>+		 * NPA_BPINTF_E enumeration given as:</div><div class='add'>+		 * 0x0 + a*0x1 where 'a' is 0 for NIX0_RX and 1 for NIX1_RX so</div><div class='add'>+		 * NIX0_RX is 0x0 + 0*0x1 = 0</div><div class='add'>+		 * NIX1_RX is 0x0 + 1*0x1 = 1</div><div class='add'>+		 * But in HRM it is given that</div><div class='add'>+		 * "NPA_AURA_S[BP_ENA](w1[33:32]) - Enable aura backpressure to</div><div class='add'>+		 * NIX-RX based on [BP] level. One bit per NIX-RX; index</div><div class='add'>+		 * enumerated by NPA_BPINTF_E."</div><div class='add'>+		 */</div><div class='add'>+		if (pfvf-&gt;nix_blkaddr == BLKADDR_NIX1)</div><div class='add'>+			aq-&gt;aura.bp_ena = 1;</div><div class='add'>+</div><div class='add'>+		bpid_idx = cn20k_aura_bpid_idx(pfvf, aura_id);</div><div class='add'>+		aq-&gt;aura.bpid = pfvf-&gt;bpid[bpid_idx];</div><div class='add'>+</div><div class='add'>+		/* Set backpressure level for RQ's Aura */</div><div class='add'>+		aq-&gt;aura.bp = RQ_BP_LVL_AURA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Fill AQ info */</div><div class='add'>+	aq-&gt;ctype = NPA_AQ_CTYPE_AURA;</div><div class='add'>+	aq-&gt;op = NPA_AQ_INSTOP_INIT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn20k_pool_aq_init(struct otx2_nic *pfvf, u16 pool_id,</div><div class='add'>+			      int stack_pages, int numptrs, int buf_size,</div><div class='add'>+			      int type)</div><div class='add'>+{</div><div class='add'>+	struct page_pool_params pp_params = { 0 };</div><div class='add'>+	struct npa_cn20k_aq_enq_req *aq;</div><div class='add'>+	struct otx2_pool *pool;</div><div class='add'>+	int err, sz;</div><div class='add'>+</div><div class='add'>+	pool = &amp;pfvf-&gt;qset.pool[pool_id];</div><div class='add'>+	/* Alloc memory for stack which is used to store buffer pointers */</div><div class='add'>+	err = qmem_alloc(pfvf-&gt;dev, &amp;pool-&gt;stack,</div><div class='add'>+			 stack_pages, pfvf-&gt;hw.stack_pg_bytes);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	pool-&gt;rbsize = buf_size;</div><div class='add'>+</div><div class='add'>+	/* Initialize this pool's context via AF */</div><div class='add'>+	aq = otx2_mbox_alloc_msg_npa_cn20k_aq_enq(&amp;pfvf-&gt;mbox);</div><div class='add'>+	if (!aq) {</div><div class='add'>+		/* Shared mbox memory buffer is full, flush it and retry */</div><div class='add'>+		err = otx2_sync_mbox_msg(&amp;pfvf-&gt;mbox);</div><div class='add'>+		if (err) {</div><div class='add'>+			qmem_free(pfvf-&gt;dev, pool-&gt;stack);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+		aq = otx2_mbox_alloc_msg_npa_cn20k_aq_enq(&amp;pfvf-&gt;mbox);</div><div class='add'>+		if (!aq) {</div><div class='add'>+			qmem_free(pfvf-&gt;dev, pool-&gt;stack);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq-&gt;aura_id = pool_id;</div><div class='add'>+	aq-&gt;pool.stack_base = pool-&gt;stack-&gt;iova;</div><div class='add'>+	aq-&gt;pool.stack_caching = 1;</div><div class='add'>+	aq-&gt;pool.ena = 1;</div><div class='add'>+	aq-&gt;pool.buf_size = buf_size / 128;</div><div class='add'>+	aq-&gt;pool.stack_max_pages = stack_pages;</div><div class='add'>+	aq-&gt;pool.shift = ilog2(numptrs) - 8;</div><div class='add'>+	aq-&gt;pool.ptr_start = 0;</div><div class='add'>+	aq-&gt;pool.ptr_end = ~0ULL;</div><div class='add'>+</div><div class='add'>+	/* Fill AQ info */</div><div class='add'>+	aq-&gt;ctype = NPA_AQ_CTYPE_POOL;</div><div class='add'>+	aq-&gt;op = NPA_AQ_INSTOP_INIT;</div><div class='add'>+</div><div class='add'>+	if (type != AURA_NIX_RQ) {</div><div class='add'>+		pool-&gt;page_pool = NULL;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sz = ALIGN(ALIGN(SKB_DATA_ALIGN(buf_size), OTX2_ALIGN), PAGE_SIZE);</div><div class='add'>+	pp_params.order = get_order(sz);</div><div class='add'>+	pp_params.flags = PP_FLAG_DMA_MAP;</div><div class='add'>+	pp_params.pool_size = min(OTX2_PAGE_POOL_SZ, numptrs);</div><div class='add'>+	pp_params.nid = NUMA_NO_NODE;</div><div class='add'>+	pp_params.dev = pfvf-&gt;dev;</div><div class='add'>+	pp_params.dma_dir = DMA_FROM_DEVICE;</div><div class='add'>+	pool-&gt;page_pool = page_pool_create(&amp;pp_params);</div><div class='add'>+	if (IS_ERR(pool-&gt;page_pool)) {</div><div class='add'>+		netdev_err(pfvf-&gt;netdev, "Creation of page pool failed\n");</div><div class='add'>+		return PTR_ERR(pool-&gt;page_pool);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int cn20k_sq_aq_init(void *dev, u16 qidx, u8 chan_offset, u16 sqb_aura)</div><div class='add'>+{</div><div class='add'>+	struct nix_cn20k_aq_enq_req *aq;</div><div class='add'>+	struct otx2_nic *pfvf = dev;</div><div class='add'>+</div><div class='add'>+	/* Get memory to put this msg */</div><div class='add'>+	aq = otx2_mbox_alloc_msg_nix_cn20k_aq_enq(&amp;pfvf-&gt;mbox);</div><div class='add'>+	if (!aq)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	aq-&gt;sq.cq = pfvf-&gt;hw.rx_queues + qidx;</div><div class='add'>+	aq-&gt;sq.max_sqe_size = NIX_MAXSQESZ_W16; /* 128 byte */</div><div class='add'>+	aq-&gt;sq.cq_ena = 1;</div><div class='add'>+	aq-&gt;sq.ena = 1;</div><div class='add'>+	aq-&gt;sq.smq = otx2_get_smq_idx(pfvf, qidx);</div><div class='add'>+	aq-&gt;sq.smq_rr_weight = mtu_to_dwrr_weight(pfvf, pfvf-&gt;tx_max_pktlen);</div><div class='add'>+	aq-&gt;sq.default_chan = pfvf-&gt;hw.tx_chan_base + chan_offset;</div><div class='add'>+	aq-&gt;sq.sqe_stype = NIX_STYPE_STF; /* Cache SQB */</div><div class='add'>+	aq-&gt;sq.sqb_aura = sqb_aura;</div><div class='add'>+	aq-&gt;sq.sq_int_ena = NIX_SQINT_BITS;</div><div class='add'>+	aq-&gt;sq.qint_idx = 0;</div><div class='add'>+	/* Due pipelining impact minimum 2000 unused SQ CQE's</div><div class='add'>+	 * need to maintain to avoid CQ overflow.</div><div class='add'>+	 */</div><div class='add'>+	aq-&gt;sq.cq_limit = (SEND_CQ_SKID * 256) / (pfvf-&gt;qset.sqe_cnt);</div><div class='add'>+</div><div class='add'>+	/* Fill AQ info */</div><div class='add'>+	aq-&gt;qidx = qidx;</div><div class='add'>+	aq-&gt;ctype = NIX_AQ_CTYPE_SQ;</div><div class='add'>+	aq-&gt;op = NIX_AQ_INSTOP_INIT;</div><div class='add'>+</div><div class='add'>+	return otx2_sync_mbox_msg(&amp;pfvf-&gt;mbox);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct dev_hw_ops cn20k_hw_ops = {</div><div class='add'>+	.pfaf_mbox_intr_handler = cn20k_pfaf_mbox_intr_handler,</div><div class='add'>+	.vfaf_mbox_intr_handler = cn20k_vfaf_mbox_intr_handler,</div><div class='add'>+	.pfvf_mbox_intr_handler = cn20k_pfvf_mbox_intr_handler,</div><div class='add'>+	.sq_aq_init = cn20k_sq_aq_init,</div><div class='add'>+	.sqe_flush = cn10k_sqe_flush,</div><div class='add'>+	.aura_freeptr = cn10k_aura_freeptr,</div><div class='add'>+	.refill_pool_ptrs = cn10k_refill_pool_ptrs,</div><div class='add'>+	.aura_aq_init = cn20k_aura_aq_init,</div><div class='add'>+	.pool_aq_init = cn20k_pool_aq_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void cn20k_init(struct otx2_nic *pfvf)</div><div class='add'>+{</div><div class='add'>+	pfvf-&gt;hw_ops = &amp;cn20k_hw_ops;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(cn20k_init);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.h b/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.h<br/>new file mode 100644<br/>index 000000000000..832adaf8c57f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/cn20k.h</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Marvell RVU Ethernet driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef CN20K_H</div><div class='add'>+#define CN20K_H</div><div class='add'>+</div><div class='add'>+#include "otx2_common.h"</div><div class='add'>+</div><div class='add'>+void cn20k_init(struct otx2_nic *pfvf);</div><div class='add'>+int cn20k_register_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs);</div><div class='add'>+void cn20k_disable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs);</div><div class='add'>+void cn20k_enable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs);</div><div class='add'>+#endif /* CN20K_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c<br/>index 6e0183f0d5a1..75ebb17419c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c</a></div><div class='hunk'>@@ -10,22 +10,30 @@</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> #include &lt;net/tso.h&gt;</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/dcbnl.h&gt;</div><div class='add'>+#include &lt;net/xfrm.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "otx2_reg.h"</div><div class='ctx'> #include "otx2_common.h"</div><div class='ctx'> #include "otx2_struct.h"</div><div class='ctx'> #include "cn10k.h"</div><div class='add'>+#include "otx2_xsk.h"</div><div class='add'>+</div><div class='add'>+static bool otx2_is_pfc_enabled(struct otx2_nic *pfvf)</div><div class='add'>+{</div><div class='add'>+	return IS_ENABLED(CONFIG_DCB) &amp;&amp; !!pfvf-&gt;pfc_en;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void otx2_nix_rq_op_stats(struct queue_stats *stats,</div><div class='ctx'> 				 struct otx2_nic *pfvf, int qidx)</div><div class='ctx'> {</div><div class='ctx'> 	u64 incr = (u64)qidx &lt;&lt; 32;</div><div class='del'>-	u64 *ptr;</div><div class='add'>+	void __iomem *ptr;</div><div class='ctx'> </div><div class='del'>-	ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_RQ_OP_OCTS);</div><div class='add'>+	ptr = otx2_get_regaddr(pfvf, NIX_LF_RQ_OP_OCTS);</div><div class='ctx'> 	stats-&gt;bytes = otx2_atomic64_add(incr, ptr);</div><div class='ctx'> </div><div class='del'>-	ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_RQ_OP_PKTS);</div><div class='add'>+	ptr = otx2_get_regaddr(pfvf, NIX_LF_RQ_OP_PKTS);</div><div class='ctx'> 	stats-&gt;pkts = otx2_atomic64_add(incr, ptr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -33,12 +41,12 @@ static void otx2_nix_sq_op_stats(struct queue_stats *stats,</div><div class='ctx'> 				 struct otx2_nic *pfvf, int qidx)</div><div class='ctx'> {</div><div class='ctx'> 	u64 incr = (u64)qidx &lt;&lt; 32;</div><div class='del'>-	u64 *ptr;</div><div class='add'>+	void __iomem *ptr;</div><div class='ctx'> </div><div class='del'>-	ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_OCTS);</div><div class='add'>+	ptr = otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_OCTS);</div><div class='ctx'> 	stats-&gt;bytes = otx2_atomic64_add(incr, ptr);</div><div class='ctx'> </div><div class='del'>-	ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_PKTS);</div><div class='add'>+	ptr = otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_PKTS);</div><div class='ctx'> 	stats-&gt;pkts = otx2_atomic64_add(incr, ptr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -83,6 +91,7 @@ int otx2_update_rq_stats(struct otx2_nic *pfvf, int qidx)</div><div class='ctx'> 	otx2_nix_rq_op_stats(&amp;rq-&gt;stats, pfvf, qidx);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_update_rq_stats);</div><div class='ctx'> </div><div class='ctx'> int otx2_update_sq_stats(struct otx2_nic *pfvf, int qidx)</div><div class='ctx'> {</div><div class='hunk'>@@ -99,6 +108,7 @@ int otx2_update_sq_stats(struct otx2_nic *pfvf, int qidx)</div><div class='ctx'> 	otx2_nix_sq_op_stats(&amp;sq-&gt;stats, pfvf, qidx);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_update_sq_stats);</div><div class='ctx'> </div><div class='ctx'> void otx2_get_dev_stats(struct otx2_nic *pfvf)</div><div class='ctx'> {</div><div class='hunk'>@@ -114,7 +124,9 @@ void otx2_get_dev_stats(struct otx2_nic *pfvf)</div><div class='ctx'> 			       dev_stats-&gt;rx_ucast_frames;</div><div class='ctx'> </div><div class='ctx'> 	dev_stats-&gt;tx_bytes = OTX2_GET_TX_STATS(TX_OCTS);</div><div class='del'>-	dev_stats-&gt;tx_drops = OTX2_GET_TX_STATS(TX_DROP);</div><div class='add'>+	dev_stats-&gt;tx_drops = OTX2_GET_TX_STATS(TX_DROP) +</div><div class='add'>+			       (unsigned long)atomic_long_read(&amp;dev_stats-&gt;tx_discards);</div><div class='add'>+</div><div class='ctx'> 	dev_stats-&gt;tx_bcast_frames = OTX2_GET_TX_STATS(TX_BCAST);</div><div class='ctx'> 	dev_stats-&gt;tx_mcast_frames = OTX2_GET_TX_STATS(TX_MCAST);</div><div class='ctx'> 	dev_stats-&gt;tx_ucast_frames = OTX2_GET_TX_STATS(TX_UCAST);</div><div class='hunk'>@@ -246,13 +258,14 @@ int otx2_hw_set_mtu(struct otx2_nic *pfvf, int mtu)</div><div class='ctx'> 	mutex_unlock(&amp;pfvf-&gt;mbox.lock);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_hw_set_mtu);</div><div class='ctx'> </div><div class='ctx'> int otx2_config_pause_frm(struct otx2_nic *pfvf)</div><div class='ctx'> {</div><div class='ctx'> 	struct cgx_pause_frm_cfg *req;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (is_otx2_lbkvf(pfvf-&gt;pdev))</div><div class='add'>+	if (is_otx2_lbkvf(pfvf-&gt;pdev) || is_otx2_sdp_rep(pfvf-&gt;pdev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pfvf-&gt;mbox.lock);</div><div class='hunk'>@@ -307,19 +320,22 @@ fail:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int otx2_set_rss_table(struct otx2_nic *pfvf, int ctx_id)</div><div class='add'>+int otx2_set_rss_table(struct otx2_nic *pfvf, int ctx_id, const u32 *ind_tbl)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_rss_info *rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='ctx'> 	const int index = rss-&gt;rss_size * ctx_id;</div><div class='ctx'> 	struct mbox *mbox = &amp;pfvf-&gt;mbox;</div><div class='del'>-	struct otx2_rss_ctx *rss_ctx;</div><div class='ctx'> 	struct nix_aq_enq_req *aq;</div><div class='ctx'> 	int idx, err;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mbox-&gt;lock);</div><div class='del'>-	rss_ctx = rss-&gt;rss_ctx[ctx_id];</div><div class='add'>+	ind_tbl = ind_tbl ?: rss-&gt;ind_tbl;</div><div class='ctx'> 	/* Get memory to put this msg */</div><div class='ctx'> 	for (idx = 0; idx &lt; rss-&gt;rss_size; idx++) {</div><div class='add'>+		/* Ignore the queue if AF_XDP zero copy is enabled */</div><div class='add'>+		if (test_bit(ind_tbl[idx], pfvf-&gt;af_xdp_zc_qidx))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);</div><div class='ctx'> 		if (!aq) {</div><div class='ctx'> 			/* The shared memory buffer can be full.</div><div class='hunk'>@@ -337,7 +353,7 @@ int otx2_set_rss_table(struct otx2_nic *pfvf, int ctx_id)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		aq-&gt;rss.rq = rss_ctx-&gt;ind_tbl[idx];</div><div class='add'>+		aq-&gt;rss.rq = ind_tbl[idx];</div><div class='ctx'> </div><div class='ctx'> 		/* Fill AQ info */</div><div class='ctx'> 		aq-&gt;qidx = index + idx;</div><div class='hunk'>@@ -375,30 +391,22 @@ void otx2_set_rss_key(struct otx2_nic *pfvf)</div><div class='ctx'> int otx2_rss_init(struct otx2_nic *pfvf)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_rss_info *rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='del'>-	struct otx2_rss_ctx *rss_ctx;</div><div class='ctx'> 	int idx, ret = 0;</div><div class='ctx'> </div><div class='del'>-	rss-&gt;rss_size = sizeof(*rss-&gt;rss_ctx[DEFAULT_RSS_CONTEXT_GROUP]);</div><div class='add'>+	rss-&gt;rss_size = sizeof(*rss-&gt;ind_tbl);</div><div class='ctx'> </div><div class='ctx'> 	/* Init RSS key if it is not setup already */</div><div class='ctx'> 	if (!rss-&gt;enable)</div><div class='ctx'> 		netdev_rss_key_fill(rss-&gt;key, sizeof(rss-&gt;key));</div><div class='ctx'> 	otx2_set_rss_key(pfvf);</div><div class='ctx'> </div><div class='del'>-	if (!netif_is_rxfh_configured(pfvf-&gt;netdev)) {</div><div class='del'>-		/* Set RSS group 0 as default indirection table */</div><div class='del'>-		rss-&gt;rss_ctx[DEFAULT_RSS_CONTEXT_GROUP] = kzalloc(rss-&gt;rss_size,</div><div class='del'>-								  GFP_KERNEL);</div><div class='del'>-		if (!rss-&gt;rss_ctx[DEFAULT_RSS_CONTEXT_GROUP])</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-</div><div class='del'>-		rss_ctx = rss-&gt;rss_ctx[DEFAULT_RSS_CONTEXT_GROUP];</div><div class='add'>+	if (!netif_is_rxfh_configured(pfvf-&gt;netdev))</div><div class='ctx'> 		for (idx = 0; idx &lt; rss-&gt;rss_size; idx++)</div><div class='del'>-			rss_ctx-&gt;ind_tbl[idx] =</div><div class='add'>+			rss-&gt;ind_tbl[idx] =</div><div class='ctx'> 				ethtool_rxfh_indir_default(idx,</div><div class='ctx'> 							   pfvf-&gt;hw.rx_queues);</div><div class='del'>-	}</div><div class='del'>-	ret = otx2_set_rss_table(pfvf, DEFAULT_RSS_CONTEXT_GROUP);</div><div class='add'>+</div><div class='add'>+	ret = otx2_set_rss_table(pfvf, DEFAULT_RSS_CONTEXT_GROUP, NULL);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -539,10 +547,13 @@ static int otx2_alloc_pool_buf(struct otx2_nic *pfvf, struct otx2_pool *pool,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __otx2_alloc_rbuf(struct otx2_nic *pfvf, struct otx2_pool *pool,</div><div class='del'>-			     dma_addr_t *dma)</div><div class='add'>+			     dma_addr_t *dma, int qidx, int idx)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *buf;</div><div class='ctx'> </div><div class='add'>+	if (pool-&gt;xsk_pool)</div><div class='add'>+		return otx2_xsk_pool_alloc_buf(pfvf, pool, dma, idx);</div><div class='add'>+</div><div class='ctx'> 	if (pool-&gt;page_pool)</div><div class='ctx'> 		return otx2_alloc_pool_buf(pfvf, pool, dma);</div><div class='ctx'> </div><div class='hunk'>@@ -561,12 +572,12 @@ static int __otx2_alloc_rbuf(struct otx2_nic *pfvf, struct otx2_pool *pool,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int otx2_alloc_rbuf(struct otx2_nic *pfvf, struct otx2_pool *pool,</div><div class='del'>-		    dma_addr_t *dma)</div><div class='add'>+		    dma_addr_t *dma, int qidx, int idx)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	local_bh_disable();</div><div class='del'>-	ret = __otx2_alloc_rbuf(pfvf, pool, dma);</div><div class='add'>+	ret = __otx2_alloc_rbuf(pfvf, pool, dma, qidx, idx);</div><div class='ctx'> 	local_bh_enable();</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -574,7 +585,8 @@ int otx2_alloc_rbuf(struct otx2_nic *pfvf, struct otx2_pool *pool,</div><div class='ctx'> int otx2_alloc_buffer(struct otx2_nic *pfvf, struct otx2_cq_queue *cq,</div><div class='ctx'> 		      dma_addr_t *dma)</div><div class='ctx'> {</div><div class='del'>-	if (unlikely(__otx2_alloc_rbuf(pfvf, cq-&gt;rbpool, dma)))</div><div class='add'>+	if (unlikely(__otx2_alloc_rbuf(pfvf, cq-&gt;rbpool, dma,</div><div class='add'>+				       cq-&gt;cq_idx, cq-&gt;pool_ptrs - 1)))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -646,12 +658,22 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl, int prio, bool txschq_for</div><div class='ctx'> 		req-&gt;reg[2] = NIX_AF_MDQX_SCHEDULE(schq);</div><div class='ctx'> 		req-&gt;regval[2] =  dwrr_val;</div><div class='ctx'> 	} else if (lvl == NIX_TXSCH_LVL_TL4) {</div><div class='add'>+		int sdp_chan =  hw-&gt;tx_chan_base + prio;</div><div class='add'>+</div><div class='add'>+		if (is_otx2_sdp_rep(pfvf-&gt;pdev))</div><div class='add'>+			prio = 0;</div><div class='ctx'> 		parent = schq_list[NIX_TXSCH_LVL_TL3][prio];</div><div class='ctx'> 		req-&gt;reg[0] = NIX_AF_TL4X_PARENT(schq);</div><div class='ctx'> 		req-&gt;regval[0] = (u64)parent &lt;&lt; 16;</div><div class='ctx'> 		req-&gt;num_regs++;</div><div class='ctx'> 		req-&gt;reg[1] = NIX_AF_TL4X_SCHEDULE(schq);</div><div class='ctx'> 		req-&gt;regval[1] = dwrr_val;</div><div class='add'>+		if (is_otx2_sdp_rep(pfvf-&gt;pdev)) {</div><div class='add'>+			req-&gt;num_regs++;</div><div class='add'>+			req-&gt;reg[2] = NIX_AF_TL4X_SDP_LINK_CFG(schq);</div><div class='add'>+			req-&gt;regval[2] = BIT_ULL(12) | BIT_ULL(13) |</div><div class='add'>+					 (sdp_chan &amp; 0xff);</div><div class='add'>+		}</div><div class='ctx'> 	} else if (lvl == NIX_TXSCH_LVL_TL3) {</div><div class='ctx'> 		parent = schq_list[NIX_TXSCH_LVL_TL2][prio];</div><div class='ctx'> 		req-&gt;reg[0] = NIX_AF_TL3X_PARENT(schq);</div><div class='hunk'>@@ -659,7 +681,8 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl, int prio, bool txschq_for</div><div class='ctx'> 		req-&gt;num_regs++;</div><div class='ctx'> 		req-&gt;reg[1] = NIX_AF_TL3X_SCHEDULE(schq);</div><div class='ctx'> 		req-&gt;regval[1] = dwrr_val;</div><div class='del'>-		if (lvl == hw-&gt;txschq_link_cfg_lvl) {</div><div class='add'>+		if (lvl == hw-&gt;txschq_link_cfg_lvl &amp;&amp;</div><div class='add'>+		    !is_otx2_sdp_rep(pfvf-&gt;pdev)) {</div><div class='ctx'> 			req-&gt;num_regs++;</div><div class='ctx'> 			req-&gt;reg[2] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, hw-&gt;tx_link);</div><div class='ctx'> 			/* Enable this queue and backpressure</div><div class='hunk'>@@ -676,7 +699,8 @@ int otx2_txschq_config(struct otx2_nic *pfvf, int lvl, int prio, bool txschq_for</div><div class='ctx'> 		req-&gt;reg[1] = NIX_AF_TL2X_SCHEDULE(schq);</div><div class='ctx'> 		req-&gt;regval[1] = (u64)hw-&gt;txschq_aggr_lvl_rr_prio &lt;&lt; 24 | dwrr_val;</div><div class='ctx'> </div><div class='del'>-		if (lvl == hw-&gt;txschq_link_cfg_lvl) {</div><div class='add'>+		if (lvl == hw-&gt;txschq_link_cfg_lvl &amp;&amp;</div><div class='add'>+		    !is_otx2_sdp_rep(pfvf-&gt;pdev)) {</div><div class='ctx'> 			req-&gt;num_regs++;</div><div class='ctx'> 			req-&gt;reg[2] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, hw-&gt;tx_link);</div><div class='ctx'> 			/* Enable this queue and backpressure</div><div class='hunk'>@@ -735,6 +759,7 @@ EXPORT_SYMBOL(otx2_smq_flush);</div><div class='ctx'> </div><div class='ctx'> int otx2_txsch_alloc(struct otx2_nic *pfvf)</div><div class='ctx'> {</div><div class='add'>+	int chan_cnt = pfvf-&gt;hw.tx_chan_cnt;</div><div class='ctx'> 	struct nix_txsch_alloc_req *req;</div><div class='ctx'> 	struct nix_txsch_alloc_rsp *rsp;</div><div class='ctx'> 	int lvl, schq, rc;</div><div class='hunk'>@@ -747,6 +772,12 @@ int otx2_txsch_alloc(struct otx2_nic *pfvf)</div><div class='ctx'> 	/* Request one schq per level */</div><div class='ctx'> 	for (lvl = 0; lvl &lt; NIX_TXSCH_LVL_CNT; lvl++)</div><div class='ctx'> 		req-&gt;schq[lvl] = 1;</div><div class='add'>+</div><div class='add'>+	if (is_otx2_sdp_rep(pfvf-&gt;pdev) &amp;&amp; chan_cnt &gt; 1) {</div><div class='add'>+		req-&gt;schq[NIX_TXSCH_LVL_SMQ] = chan_cnt;</div><div class='add'>+		req-&gt;schq[NIX_TXSCH_LVL_TL4] = chan_cnt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	rc = otx2_sync_mbox_msg(&amp;pfvf-&gt;mbox);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='hunk'>@@ -757,10 +788,12 @@ int otx2_txsch_alloc(struct otx2_nic *pfvf)</div><div class='ctx'> 		return PTR_ERR(rsp);</div><div class='ctx'> </div><div class='ctx'> 	/* Setup transmit scheduler list */</div><div class='del'>-	for (lvl = 0; lvl &lt; NIX_TXSCH_LVL_CNT; lvl++)</div><div class='add'>+	for (lvl = 0; lvl &lt; NIX_TXSCH_LVL_CNT; lvl++) {</div><div class='add'>+		pfvf-&gt;hw.txschq_cnt[lvl] = rsp-&gt;schq[lvl];</div><div class='ctx'> 		for (schq = 0; schq &lt; rsp-&gt;schq[lvl]; schq++)</div><div class='ctx'> 			pfvf-&gt;hw.txschq_list[lvl][schq] =</div><div class='ctx'> 				rsp-&gt;schq_list[lvl][schq];</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	pfvf-&gt;hw.txschq_link_cfg_lvl = rsp-&gt;link_cfg_lvl;</div><div class='ctx'> 	pfvf-&gt;hw.txschq_aggr_lvl_rr_prio = rsp-&gt;aggr_lvl_rr_prio;</div><div class='hunk'>@@ -798,12 +831,15 @@ EXPORT_SYMBOL(otx2_txschq_free_one);</div><div class='ctx'> </div><div class='ctx'> void otx2_txschq_stop(struct otx2_nic *pfvf)</div><div class='ctx'> {</div><div class='del'>-	int lvl, schq;</div><div class='add'>+	int lvl, schq, idx;</div><div class='ctx'> </div><div class='ctx'> 	/* free non QOS TLx nodes */</div><div class='del'>-	for (lvl = 0; lvl &lt; NIX_TXSCH_LVL_CNT; lvl++)</div><div class='del'>-		otx2_txschq_free_one(pfvf, lvl,</div><div class='del'>-				     pfvf-&gt;hw.txschq_list[lvl][0]);</div><div class='add'>+	for (lvl = 0; lvl &lt; NIX_TXSCH_LVL_CNT; lvl++) {</div><div class='add'>+		for (idx = 0; idx &lt; pfvf-&gt;hw.txschq_cnt[lvl]; idx++) {</div><div class='add'>+			otx2_txschq_free_one(pfvf, lvl,</div><div class='add'>+					     pfvf-&gt;hw.txschq_list[lvl][idx]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Clear the txschq list */</div><div class='ctx'> 	for (lvl = 0; lvl &lt; NIX_TXSCH_LVL_CNT; lvl++) {</div><div class='hunk'>@@ -817,9 +853,10 @@ void otx2_sqb_flush(struct otx2_nic *pfvf)</div><div class='ctx'> {</div><div class='ctx'> 	int qidx, sqe_tail, sqe_head;</div><div class='ctx'> 	struct otx2_snd_queue *sq;</div><div class='del'>-	u64 incr, *ptr, val;</div><div class='add'>+	void __iomem *ptr;</div><div class='add'>+	u64 incr, val;</div><div class='ctx'> </div><div class='del'>-	ptr = (u64 *)otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_STATUS);</div><div class='add'>+	ptr = otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_STATUS);</div><div class='ctx'> 	for (qidx = 0; qidx &lt; otx2_get_total_tx_queues(pfvf); qidx++) {</div><div class='ctx'> 		sq = &amp;pfvf-&gt;qset.sq[qidx];</div><div class='ctx'> 		if (!sq-&gt;sqb_ptrs)</div><div class='hunk'>@@ -850,7 +887,7 @@ void otx2_sqb_flush(struct otx2_nic *pfvf)</div><div class='ctx'> #define RQ_PASS_LVL_AURA (255 - ((95 * 256) / 100)) /* RED when 95% is full */</div><div class='ctx'> #define RQ_DROP_LVL_AURA (255 - ((99 * 256) / 100)) /* Drop when 99% is full */</div><div class='ctx'> </div><div class='del'>-static int otx2_rq_init(struct otx2_nic *pfvf, u16 qidx, u16 lpb_aura)</div><div class='add'>+int otx2_rq_init(struct otx2_nic *pfvf, u16 qidx, u16 lpb_aura)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_qset *qset = &amp;pfvf-&gt;qset;</div><div class='ctx'> 	struct nix_aq_enq_req *aq;</div><div class='hunk'>@@ -883,7 +920,7 @@ static int otx2_rq_init(struct otx2_nic *pfvf, u16 qidx, u16 lpb_aura)</div><div class='ctx'> 	return otx2_sync_mbox_msg(&amp;pfvf-&gt;mbox);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int otx2_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura)</div><div class='add'>+int otx2_sq_aq_init(void *dev, u16 qidx, u8 chan_offset, u16 sqb_aura)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_nic *pfvf = dev;</div><div class='ctx'> 	struct otx2_snd_queue *sq;</div><div class='hunk'>@@ -902,7 +939,7 @@ int otx2_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura)</div><div class='ctx'> 	aq-&gt;sq.ena = 1;</div><div class='ctx'> 	aq-&gt;sq.smq = otx2_get_smq_idx(pfvf, qidx);</div><div class='ctx'> 	aq-&gt;sq.smq_rr_quantum = mtu_to_dwrr_weight(pfvf, pfvf-&gt;tx_max_pktlen);</div><div class='del'>-	aq-&gt;sq.default_chan = pfvf-&gt;hw.tx_chan_base;</div><div class='add'>+	aq-&gt;sq.default_chan = pfvf-&gt;hw.tx_chan_base + chan_offset;</div><div class='ctx'> 	aq-&gt;sq.sqe_stype = NIX_STYPE_STF; /* Cache SQB */</div><div class='ctx'> 	aq-&gt;sq.sqb_aura = sqb_aura;</div><div class='ctx'> 	aq-&gt;sq.sq_int_ena = NIX_SQINT_BITS;</div><div class='hunk'>@@ -925,6 +962,7 @@ int otx2_sq_init(struct otx2_nic *pfvf, u16 qidx, u16 sqb_aura)</div><div class='ctx'> 	struct otx2_qset *qset = &amp;pfvf-&gt;qset;</div><div class='ctx'> 	struct otx2_snd_queue *sq;</div><div class='ctx'> 	struct otx2_pool *pool;</div><div class='add'>+	u8 chan_offset;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	pool = &amp;pfvf-&gt;qset.pool[sqb_aura];</div><div class='hunk'>@@ -936,6 +974,29 @@ int otx2_sq_init(struct otx2_nic *pfvf, u16 qidx, u16 sqb_aura)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	/* Allocate memory for NIX SQE (which includes NIX SG) and CPT SG.</div><div class='add'>+	 * SG of NIX and CPT are same in size. Allocate memory for CPT SG</div><div class='add'>+	 * same as NIX SQE for base address alignment.</div><div class='add'>+	 * Layout of a NIX SQE and CPT SG entry:</div><div class='add'>+	 *      -----------------------------</div><div class='add'>+	 *     |     CPT Scatter Gather      |</div><div class='add'>+	 *     |       (SQE SIZE)            |</div><div class='add'>+	 *     |                             |</div><div class='add'>+	 *      -----------------------------</div><div class='add'>+	 *     |       NIX SQE               |</div><div class='add'>+	 *     |       (SQE SIZE)            |</div><div class='add'>+	 *     |                             |</div><div class='add'>+	 *      -----------------------------</div><div class='add'>+	 */</div><div class='add'>+	err = qmem_alloc(pfvf-&gt;dev, &amp;sq-&gt;sqe_ring, qset-&gt;sqe_cnt,</div><div class='add'>+			 sq-&gt;sqe_size * 2);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = qmem_alloc(pfvf-&gt;dev, &amp;sq-&gt;cpt_resp, qset-&gt;sqe_cnt, 64);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	if (qidx &lt; pfvf-&gt;hw.tx_queues) {</div><div class='ctx'> 		err = qmem_alloc(pfvf-&gt;dev, &amp;sq-&gt;tso_hdrs, qset-&gt;sqe_cnt,</div><div class='ctx'> 				 TSO_HEADER_SIZE);</div><div class='hunk'>@@ -970,8 +1031,13 @@ int otx2_sq_init(struct otx2_nic *pfvf, u16 qidx, u16 sqb_aura)</div><div class='ctx'> </div><div class='ctx'> 	sq-&gt;stats.bytes = 0;</div><div class='ctx'> 	sq-&gt;stats.pkts = 0;</div><div class='add'>+	/* Attach XSK_BUFF_POOL to XDP queue */</div><div class='add'>+	if (qidx &gt; pfvf-&gt;hw.xdp_queues)</div><div class='add'>+		otx2_attach_xsk_buff(pfvf, sq, (qidx - pfvf-&gt;hw.xdp_queues));</div><div class='ctx'> </div><div class='del'>-	err = pfvf-&gt;hw_ops-&gt;sq_aq_init(pfvf, qidx, sqb_aura);</div><div class='add'>+</div><div class='add'>+	chan_offset = qidx % pfvf-&gt;hw.tx_chan_cnt;</div><div class='add'>+	err = pfvf-&gt;hw_ops-&gt;sq_aq_init(pfvf, qidx, chan_offset, sqb_aura);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		kfree(sq-&gt;sg);</div><div class='ctx'> 		sq-&gt;sg = NULL;</div><div class='hunk'>@@ -982,12 +1048,13 @@ int otx2_sq_init(struct otx2_nic *pfvf, u16 qidx, u16 sqb_aura)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx)</div><div class='add'>+int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_qset *qset = &amp;pfvf-&gt;qset;</div><div class='ctx'> 	int err, pool_id, non_xdp_queues;</div><div class='ctx'> 	struct nix_aq_enq_req *aq;</div><div class='ctx'> 	struct otx2_cq_queue *cq;</div><div class='add'>+	struct otx2_pool *pool;</div><div class='ctx'> </div><div class='ctx'> 	cq = &amp;qset-&gt;cq[qidx];</div><div class='ctx'> 	cq-&gt;cq_idx = qidx;</div><div class='hunk'>@@ -996,8 +1063,20 @@ static int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx)</div><div class='ctx'> 		cq-&gt;cq_type = CQ_RX;</div><div class='ctx'> 		cq-&gt;cint_idx = qidx;</div><div class='ctx'> 		cq-&gt;cqe_cnt = qset-&gt;rqe_cnt;</div><div class='del'>-		if (pfvf-&gt;xdp_prog)</div><div class='add'>+		if (pfvf-&gt;xdp_prog) {</div><div class='ctx'> 			xdp_rxq_info_reg(&amp;cq-&gt;xdp_rxq, pfvf-&gt;netdev, qidx, 0);</div><div class='add'>+			pool = &amp;qset-&gt;pool[qidx];</div><div class='add'>+			if (pool-&gt;xsk_pool) {</div><div class='add'>+				xdp_rxq_info_reg_mem_model(&amp;cq-&gt;xdp_rxq,</div><div class='add'>+							   MEM_TYPE_XSK_BUFF_POOL,</div><div class='add'>+							   NULL);</div><div class='add'>+				xsk_pool_set_rxq_info(pool-&gt;xsk_pool, &amp;cq-&gt;xdp_rxq);</div><div class='add'>+			} else if (pool-&gt;page_pool) {</div><div class='add'>+				xdp_rxq_info_reg_mem_model(&amp;cq-&gt;xdp_rxq,</div><div class='add'>+							   MEM_TYPE_PAGE_POOL,</div><div class='add'>+							   pool-&gt;page_pool);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 	} else if (qidx &lt; non_xdp_queues) {</div><div class='ctx'> 		cq-&gt;cq_type = CQ_TX;</div><div class='ctx'> 		cq-&gt;cint_idx = qidx - pfvf-&gt;hw.rx_queues;</div><div class='hunk'>@@ -1216,9 +1295,10 @@ void otx2_free_bufs(struct otx2_nic *pfvf, struct otx2_pool *pool,</div><div class='ctx'> </div><div class='ctx'> 	pa = otx2_iova_to_phys(pfvf-&gt;iommu_domain, iova);</div><div class='ctx'> 	page = virt_to_head_page(phys_to_virt(pa));</div><div class='del'>-</div><div class='ctx'> 	if (pool-&gt;page_pool) {</div><div class='ctx'> 		page_pool_put_full_page(pool-&gt;page_pool, page, true);</div><div class='add'>+	} else if (pool-&gt;xsk_pool) {</div><div class='add'>+		/* Note: No way of identifying xdp_buff */</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dma_unmap_page_attrs(pfvf-&gt;dev, iova, size,</div><div class='ctx'> 				     DMA_FROM_DEVICE,</div><div class='hunk'>@@ -1233,6 +1313,7 @@ void otx2_free_aura_ptr(struct otx2_nic *pfvf, int type)</div><div class='ctx'> 	int pool_id, pool_start = 0, pool_end = 0, size = 0;</div><div class='ctx'> 	struct otx2_pool *pool;</div><div class='ctx'> 	u64 iova;</div><div class='add'>+	int idx;</div><div class='ctx'> </div><div class='ctx'> 	if (type == AURA_NIX_SQ) {</div><div class='ctx'> 		pool_start = otx2_get_pool_idx(pfvf, type, 0);</div><div class='hunk'>@@ -1247,16 +1328,21 @@ void otx2_free_aura_ptr(struct otx2_nic *pfvf, int type)</div><div class='ctx'> </div><div class='ctx'> 	/* Free SQB and RQB pointers from the aura pool */</div><div class='ctx'> 	for (pool_id = pool_start; pool_id &lt; pool_end; pool_id++) {</div><div class='del'>-		iova = otx2_aura_allocptr(pfvf, pool_id);</div><div class='ctx'> 		pool = &amp;pfvf-&gt;qset.pool[pool_id];</div><div class='add'>+		iova = otx2_aura_allocptr(pfvf, pool_id);</div><div class='ctx'> 		while (iova) {</div><div class='ctx'> 			if (type == AURA_NIX_RQ)</div><div class='ctx'> 				iova -= OTX2_HEAD_ROOM;</div><div class='del'>-</div><div class='ctx'> 			otx2_free_bufs(pfvf, pool, iova, size);</div><div class='del'>-</div><div class='ctx'> 			iova = otx2_aura_allocptr(pfvf, pool_id);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		for (idx = 0 ; idx &lt; pool-&gt;xdp_cnt; idx++) {</div><div class='add'>+			if (!pool-&gt;xdp[idx])</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			xsk_buff_free(pool-&gt;xdp[idx]);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1273,7 +1359,8 @@ void otx2_aura_pool_free(struct otx2_nic *pfvf)</div><div class='ctx'> 		qmem_free(pfvf-&gt;dev, pool-&gt;stack);</div><div class='ctx'> 		qmem_free(pfvf-&gt;dev, pool-&gt;fc_addr);</div><div class='ctx'> 		page_pool_destroy(pool-&gt;page_pool);</div><div class='del'>-		pool-&gt;page_pool = NULL;</div><div class='add'>+		devm_kfree(pfvf-&gt;dev, pool-&gt;xdp);</div><div class='add'>+		pool-&gt;xsk_pool = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	devm_kfree(pfvf-&gt;dev, pfvf-&gt;qset.pool);</div><div class='ctx'> 	pfvf-&gt;qset.pool = NULL;</div><div class='hunk'>@@ -1282,6 +1369,13 @@ void otx2_aura_pool_free(struct otx2_nic *pfvf)</div><div class='ctx'> int otx2_aura_init(struct otx2_nic *pfvf, int aura_id,</div><div class='ctx'> 		   int pool_id, int numptrs)</div><div class='ctx'> {</div><div class='add'>+	return pfvf-&gt;hw_ops-&gt;aura_aq_init(pfvf, aura_id, pool_id,</div><div class='add'>+					  numptrs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int otx2_aura_aq_init(struct otx2_nic *pfvf, int aura_id,</div><div class='add'>+		      int pool_id, int numptrs)</div><div class='add'>+{</div><div class='ctx'> 	struct npa_aq_enq_req *aq;</div><div class='ctx'> 	struct otx2_pool *pool;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1359,7 +1453,15 @@ int otx2_aura_init(struct otx2_nic *pfvf, int aura_id,</div><div class='ctx'> int otx2_pool_init(struct otx2_nic *pfvf, u16 pool_id,</div><div class='ctx'> 		   int stack_pages, int numptrs, int buf_size, int type)</div><div class='ctx'> {</div><div class='add'>+	return pfvf-&gt;hw_ops-&gt;pool_aq_init(pfvf, pool_id, stack_pages, numptrs,</div><div class='add'>+					  buf_size, type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int otx2_pool_aq_init(struct otx2_nic *pfvf, u16 pool_id,</div><div class='add'>+		      int stack_pages, int numptrs, int buf_size, int type)</div><div class='add'>+{</div><div class='ctx'> 	struct page_pool_params pp_params = { 0 };</div><div class='add'>+	struct xsk_buff_pool *xsk_pool;</div><div class='ctx'> 	struct npa_aq_enq_req *aq;</div><div class='ctx'> 	struct otx2_pool *pool;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1403,21 +1505,33 @@ int otx2_pool_init(struct otx2_nic *pfvf, u16 pool_id,</div><div class='ctx'> 	aq-&gt;ctype = NPA_AQ_CTYPE_POOL;</div><div class='ctx'> 	aq-&gt;op = NPA_AQ_INSTOP_INIT;</div><div class='ctx'> </div><div class='del'>-	if (type != AURA_NIX_RQ) {</div><div class='del'>-		pool-&gt;page_pool = NULL;</div><div class='add'>+	if (type != AURA_NIX_RQ)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(pool_id, pfvf-&gt;af_xdp_zc_qidx)) {</div><div class='add'>+		pp_params.order = get_order(buf_size);</div><div class='add'>+		pp_params.flags = PP_FLAG_DMA_MAP;</div><div class='add'>+		pp_params.pool_size = min(OTX2_PAGE_POOL_SZ, numptrs);</div><div class='add'>+		pp_params.nid = NUMA_NO_NODE;</div><div class='add'>+		pp_params.dev = pfvf-&gt;dev;</div><div class='add'>+		pp_params.dma_dir = DMA_FROM_DEVICE;</div><div class='add'>+		pool-&gt;page_pool = page_pool_create(&amp;pp_params);</div><div class='add'>+		if (IS_ERR(pool-&gt;page_pool)) {</div><div class='add'>+			netdev_err(pfvf-&gt;netdev, "Creation of page pool failed\n");</div><div class='add'>+			return PTR_ERR(pool-&gt;page_pool);</div><div class='add'>+		}</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pp_params.order = get_order(buf_size);</div><div class='del'>-	pp_params.flags = PP_FLAG_DMA_MAP;</div><div class='del'>-	pp_params.pool_size = min(OTX2_PAGE_POOL_SZ, numptrs);</div><div class='del'>-	pp_params.nid = NUMA_NO_NODE;</div><div class='del'>-	pp_params.dev = pfvf-&gt;dev;</div><div class='del'>-	pp_params.dma_dir = DMA_FROM_DEVICE;</div><div class='del'>-	pool-&gt;page_pool = page_pool_create(&amp;pp_params);</div><div class='del'>-	if (IS_ERR(pool-&gt;page_pool)) {</div><div class='del'>-		netdev_err(pfvf-&gt;netdev, "Creation of page pool failed\n");</div><div class='del'>-		return PTR_ERR(pool-&gt;page_pool);</div><div class='add'>+	/* Set XSK pool to support AF_XDP zero-copy */</div><div class='add'>+	xsk_pool = xsk_get_pool_from_qid(pfvf-&gt;netdev, pool_id);</div><div class='add'>+	if (xsk_pool) {</div><div class='add'>+		pool-&gt;xsk_pool = xsk_pool;</div><div class='add'>+		pool-&gt;xdp_cnt = numptrs;</div><div class='add'>+		pool-&gt;xdp = devm_kcalloc(pfvf-&gt;dev,</div><div class='add'>+					 numptrs, sizeof(struct xdp_buff *), GFP_KERNEL);</div><div class='add'>+		if (!pool-&gt;xdp)</div><div class='add'>+			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1478,9 +1592,18 @@ int otx2_sq_aura_pool_init(struct otx2_nic *pfvf)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		for (ptr = 0; ptr &lt; num_sqbs; ptr++) {</div><div class='del'>-			err = otx2_alloc_rbuf(pfvf, pool, &amp;bufptr);</div><div class='del'>-			if (err)</div><div class='add'>+			err = otx2_alloc_rbuf(pfvf, pool, &amp;bufptr, pool_id, ptr);</div><div class='add'>+			if (err) {</div><div class='add'>+				if (pool-&gt;xsk_pool) {</div><div class='add'>+					ptr--;</div><div class='add'>+					while (ptr &gt;= 0) {</div><div class='add'>+						xsk_buff_free(pool-&gt;xdp[ptr]);</div><div class='add'>+						ptr--;</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='ctx'> 				goto err_mem;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			pfvf-&gt;hw_ops-&gt;aura_freeptr(pfvf, pool_id, bufptr);</div><div class='ctx'> 			sq-&gt;sqb_ptrs[sq-&gt;sqb_count++] = (u64)bufptr;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1530,11 +1653,19 @@ int otx2_rq_aura_pool_init(struct otx2_nic *pfvf)</div><div class='ctx'> 	/* Allocate pointers and free them to aura/pool */</div><div class='ctx'> 	for (pool_id = 0; pool_id &lt; hw-&gt;rqpool_cnt; pool_id++) {</div><div class='ctx'> 		pool = &amp;pfvf-&gt;qset.pool[pool_id];</div><div class='add'>+</div><div class='ctx'> 		for (ptr = 0; ptr &lt; num_ptrs; ptr++) {</div><div class='del'>-			err = otx2_alloc_rbuf(pfvf, pool, &amp;bufptr);</div><div class='del'>-			if (err)</div><div class='add'>+			err = otx2_alloc_rbuf(pfvf, pool, &amp;bufptr, pool_id, ptr);</div><div class='add'>+			if (err) {</div><div class='add'>+				if (pool-&gt;xsk_pool) {</div><div class='add'>+					while (ptr)</div><div class='add'>+						xsk_buff_free(pool-&gt;xdp[--ptr]);</div><div class='add'>+				}</div><div class='ctx'> 				return -ENOMEM;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			pfvf-&gt;hw_ops-&gt;aura_freeptr(pfvf, pool_id,</div><div class='add'>+						   pool-&gt;xsk_pool ? bufptr :</div><div class='ctx'> 						   bufptr + OTX2_HEAD_ROOM);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1693,18 +1824,43 @@ int otx2_nix_config_bp(struct otx2_nic *pfvf, bool enable)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	req-&gt;chan_base = 0;</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='del'>-	req-&gt;chan_cnt = pfvf-&gt;pfc_en ? IEEE_8021QAZ_MAX_TCS : 1;</div><div class='del'>-	req-&gt;bpid_per_chan = pfvf-&gt;pfc_en ? 1 : 0;</div><div class='del'>-#else</div><div class='del'>-	req-&gt;chan_cnt =  1;</div><div class='del'>-	req-&gt;bpid_per_chan = 0;</div><div class='del'>-#endif</div><div class='add'>+	if (otx2_is_pfc_enabled(pfvf)) {</div><div class='add'>+		req-&gt;chan_cnt = IEEE_8021QAZ_MAX_TCS;</div><div class='add'>+		req-&gt;bpid_per_chan = 1;</div><div class='add'>+	} else {</div><div class='add'>+		req-&gt;chan_cnt = pfvf-&gt;hw.rx_chan_cnt;</div><div class='add'>+		req-&gt;bpid_per_chan = 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return otx2_sync_mbox_msg(&amp;pfvf-&gt;mbox);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(otx2_nix_config_bp);</div><div class='ctx'> </div><div class='add'>+int otx2_nix_cpt_config_bp(struct otx2_nic *pfvf, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct nix_bp_cfg_req *req;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		req = otx2_mbox_alloc_msg_nix_cpt_bp_enable(&amp;pfvf-&gt;mbox);</div><div class='add'>+	else</div><div class='add'>+		req = otx2_mbox_alloc_msg_nix_cpt_bp_disable(&amp;pfvf-&gt;mbox);</div><div class='add'>+</div><div class='add'>+	if (!req)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	req-&gt;chan_base = 0;</div><div class='add'>+	if (otx2_is_pfc_enabled(pfvf)) {</div><div class='add'>+		req-&gt;chan_cnt = IEEE_8021QAZ_MAX_TCS;</div><div class='add'>+		req-&gt;bpid_per_chan = 1;</div><div class='add'>+	} else {</div><div class='add'>+		req-&gt;chan_cnt = pfvf-&gt;hw.rx_chan_cnt;</div><div class='add'>+		req-&gt;bpid_per_chan = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return otx2_sync_mbox_msg(&amp;pfvf-&gt;mbox);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(otx2_nix_cpt_config_bp);</div><div class='add'>+</div><div class='ctx'> /* Mbox message handlers */</div><div class='ctx'> void mbox_handler_cgx_stats(struct otx2_nic *pfvf,</div><div class='ctx'> 			    struct cgx_stats_rsp *rsp)</div><div class='hunk'>@@ -1738,6 +1894,8 @@ void mbox_handler_nix_lf_alloc(struct otx2_nic *pfvf,</div><div class='ctx'> 	pfvf-&gt;hw.sqb_size = rsp-&gt;sqb_size;</div><div class='ctx'> 	pfvf-&gt;hw.rx_chan_base = rsp-&gt;rx_chan_base;</div><div class='ctx'> 	pfvf-&gt;hw.tx_chan_base = rsp-&gt;tx_chan_base;</div><div class='add'>+	pfvf-&gt;hw.rx_chan_cnt = rsp-&gt;rx_chan_cnt;</div><div class='add'>+	pfvf-&gt;hw.tx_chan_cnt = rsp-&gt;tx_chan_cnt;</div><div class='ctx'> 	pfvf-&gt;hw.lso_tsov4_idx = rsp-&gt;lso_tsov4_idx;</div><div class='ctx'> 	pfvf-&gt;hw.lso_tsov6_idx = rsp-&gt;lso_tsov6_idx;</div><div class='ctx'> 	pfvf-&gt;hw.cgx_links = rsp-&gt;cgx_links;</div><div class='hunk'>@@ -1782,6 +1940,7 @@ void otx2_free_cints(struct otx2_nic *pfvf, int n)</div><div class='ctx'> 		free_irq(vector, &amp;qset-&gt;napi[qidx]);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_free_cints);</div><div class='ctx'> </div><div class='ctx'> void otx2_set_cints_affinity(struct otx2_nic *pfvf)</div><div class='ctx'> {</div><div class='hunk'>@@ -1902,6 +2061,43 @@ int otx2_handle_ntuple_tc_features(struct net_device *netdev, netdev_features_t</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(otx2_handle_ntuple_tc_features);</div><div class='ctx'> </div><div class='add'>+int otx2_set_hw_capabilities(struct otx2_nic *pfvf)</div><div class='add'>+{</div><div class='add'>+	struct mbox *mbox = &amp;pfvf-&gt;mbox;</div><div class='add'>+	struct otx2_hw *hw = &amp;pfvf-&gt;hw;</div><div class='add'>+	struct get_hw_cap_rsp *rsp;</div><div class='add'>+	struct msg_req *req;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mbox-&gt;lock);</div><div class='add'>+</div><div class='add'>+	req = otx2_mbox_alloc_msg_get_hw_cap(mbox);</div><div class='add'>+	if (!req)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	ret = otx2_sync_mbox_msg(mbox);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	rsp = (struct get_hw_cap_rsp *)otx2_mbox_get_rsp(&amp;pfvf-&gt;mbox.mbox,</div><div class='add'>+							 0, &amp;req-&gt;hdr);</div><div class='add'>+	if (IS_ERR(rsp)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rsp-&gt;hw_caps &amp; HW_CAP_MACSEC)</div><div class='add'>+		__set_bit(CN10K_HW_MACSEC, &amp;hw-&gt;cap_flag);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mbox-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+fail:</div><div class='add'>+	dev_err(pfvf-&gt;dev, "Cannot get MACSEC capability from AF\n");</div><div class='add'>+	mutex_unlock(&amp;mbox-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define M(_name, _id, _fn_name, _req_type, _rsp_type)			\</div><div class='ctx'> int __weak								\</div><div class='ctx'> otx2_mbox_up_handler_ ## _fn_name(struct otx2_nic *pfvf,		\</div><div class='hunk'>@@ -1915,3 +2111,48 @@ EXPORT_SYMBOL(otx2_mbox_up_handler_ ## _fn_name);</div><div class='ctx'> MBOX_UP_CGX_MESSAGES</div><div class='ctx'> MBOX_UP_MCS_MESSAGES</div><div class='ctx'> #undef M</div><div class='add'>+</div><div class='add'>+dma_addr_t otx2_dma_map_skb_frag(struct otx2_nic *pfvf,</div><div class='add'>+				 struct sk_buff *skb, int seg, int *len)</div><div class='add'>+{</div><div class='add'>+	enum dma_data_direction dir = DMA_TO_DEVICE;</div><div class='add'>+	const skb_frag_t *frag;</div><div class='add'>+	struct page *page;</div><div class='add'>+	int offset;</div><div class='add'>+</div><div class='add'>+	/* Crypto hardware need write permission for ipsec crypto offload */</div><div class='add'>+	if (unlikely(xfrm_offload(skb))) {</div><div class='add'>+		dir = DMA_BIDIRECTIONAL;</div><div class='add'>+		skb = skb_unshare(skb, GFP_ATOMIC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* First segment is always skb-&gt;data */</div><div class='add'>+	if (!seg) {</div><div class='add'>+		page = virt_to_page(skb-&gt;data);</div><div class='add'>+		offset = offset_in_page(skb-&gt;data);</div><div class='add'>+		*len = skb_headlen(skb);</div><div class='add'>+	} else {</div><div class='add'>+		frag = &amp;skb_shinfo(skb)-&gt;frags[seg - 1];</div><div class='add'>+		page = skb_frag_page(frag);</div><div class='add'>+		offset = skb_frag_off(frag);</div><div class='add'>+		*len = skb_frag_size(frag);</div><div class='add'>+	}</div><div class='add'>+	return otx2_dma_map_page(pfvf, page, offset, *len, dir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void otx2_dma_unmap_skb_frags(struct otx2_nic *pfvf, struct sg_list *sg)</div><div class='add'>+{</div><div class='add'>+	enum dma_data_direction dir = DMA_TO_DEVICE;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='add'>+	int seg;</div><div class='add'>+</div><div class='add'>+	skb = (struct sk_buff *)sg-&gt;skb;</div><div class='add'>+	if (unlikely(xfrm_offload(skb)))</div><div class='add'>+		dir = DMA_BIDIRECTIONAL;</div><div class='add'>+</div><div class='add'>+	for (seg = 0; seg &lt; sg-&gt;num_segs; seg++) {</div><div class='add'>+		otx2_dma_unmap_page(pfvf, sg-&gt;dma_addr[seg],</div><div class='add'>+				    sg-&gt;size[seg], dir);</div><div class='add'>+	}</div><div class='add'>+	sg-&gt;num_segs = 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h<br/>index 327254e578d5..e616a727a3a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='ctx'> #include &lt;linux/timecounter.h&gt;</div><div class='add'>+#include &lt;linux/soc/marvell/silicons.h&gt;</div><div class='ctx'> #include &lt;linux/soc/marvell/octeontx2/asm.h&gt;</div><div class='ctx'> #include &lt;net/macsec.h&gt;</div><div class='ctx'> #include &lt;net/pkt_cls.h&gt;</div><div class='hunk'>@@ -21,14 +22,19 @@</div><div class='ctx'> #include &lt;linux/time64.h&gt;</div><div class='ctx'> #include &lt;linux/dim.h&gt;</div><div class='ctx'> #include &lt;uapi/linux/if_macsec.h&gt;</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;mbox.h&gt;</div><div class='ctx'> #include &lt;npc.h&gt;</div><div class='ctx'> #include "otx2_reg.h"</div><div class='ctx'> #include "otx2_txrx.h"</div><div class='ctx'> #include "otx2_devlink.h"</div><div class='add'>+#include &lt;rvu.h&gt;</div><div class='ctx'> #include &lt;rvu_trace.h&gt;</div><div class='ctx'> #include "qos.h"</div><div class='add'>+#include "rep.h"</div><div class='add'>+#include "cn10k_ipsec.h"</div><div class='add'>+#include "cn20k.h"</div><div class='ctx'> </div><div class='ctx'> /* IPv4 flag more fragment bit */</div><div class='ctx'> #define IPV4_FLAG_MORE				0x20</div><div class='hunk'>@@ -39,8 +45,11 @@</div><div class='ctx'> #define PCI_DEVID_OCTEONTX2_RVU_AFVF		0xA0F8</div><div class='ctx'> </div><div class='ctx'> #define PCI_SUBSYS_DEVID_96XX_RVU_PFVF		0xB200</div><div class='add'>+#define PCI_SUBSYS_DEVID_CN10K_A_RVU_PFVF	0xB900</div><div class='ctx'> #define PCI_SUBSYS_DEVID_CN10K_B_RVU_PFVF	0xBD00</div><div class='ctx'> </div><div class='add'>+#define PCI_DEVID_OCTEONTX2_SDP_REP		0xA0F7</div><div class='add'>+</div><div class='ctx'> /* PCI BAR nos */</div><div class='ctx'> #define PCI_CFG_REG_BAR_NUM                     2</div><div class='ctx'> #define PCI_MBOX_BAR_NUM                        4</div><div class='hunk'>@@ -52,6 +61,15 @@</div><div class='ctx'> #define NIX_PF_PFC_PRIO_MAX			8</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/* Number of segments per SG structure */</div><div class='add'>+#define MAX_SEGS_PER_SG 3</div><div class='add'>+</div><div class='add'>+irqreturn_t otx2_pfaf_mbox_intr_handler(int irq, void *pf_irq);</div><div class='add'>+irqreturn_t cn20k_pfaf_mbox_intr_handler(int irq, void *pf_irq);</div><div class='add'>+irqreturn_t cn20k_vfaf_mbox_intr_handler(int irq, void *vf_irq);</div><div class='add'>+irqreturn_t cn20k_pfvf_mbox_intr_handler(int irq, void *pf_irq);</div><div class='add'>+irqreturn_t otx2_pfvf_mbox_intr_handler(int irq, void *pf_irq);</div><div class='add'>+</div><div class='ctx'> enum arua_mapped_qtypes {</div><div class='ctx'> 	AURA_NIX_RQ,</div><div class='ctx'> 	AURA_NIX_SQ,</div><div class='hunk'>@@ -76,10 +94,6 @@ struct otx2_lmt_info {</div><div class='ctx'> 	u64 lmt_addr;</div><div class='ctx'> 	u16 lmt_id;</div><div class='ctx'> };</div><div class='del'>-/* RSS configuration */</div><div class='del'>-struct otx2_rss_ctx {</div><div class='del'>-	u8  ind_tbl[MAX_RSS_INDIR_TBL_SIZE];</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> struct otx2_rss_info {</div><div class='ctx'> 	u8 enable;</div><div class='hunk'>@@ -87,7 +101,7 @@ struct otx2_rss_info {</div><div class='ctx'> 	u16 rss_size;</div><div class='ctx'> #define RSS_HASH_KEY_SIZE	44   /* 352 bit key */</div><div class='ctx'> 	u8  key[RSS_HASH_KEY_SIZE];</div><div class='del'>-	struct otx2_rss_ctx	*rss_ctx[MAX_RSS_GROUPS];</div><div class='add'>+	u32 ind_tbl[MAX_RSS_INDIR_TBL_SIZE];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* NIX (or NPC) RX errors */</div><div class='hunk'>@@ -120,31 +134,10 @@ enum otx2_errcodes_re {</div><div class='ctx'> 	ERRCODE_IL4_CSUM = 0x22,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* NIX TX stats */</div><div class='del'>-enum nix_stat_lf_tx {</div><div class='del'>-	TX_UCAST	= 0x0,</div><div class='del'>-	TX_BCAST	= 0x1,</div><div class='del'>-	TX_MCAST	= 0x2,</div><div class='del'>-	TX_DROP		= 0x3,</div><div class='del'>-	TX_OCTS		= 0x4,</div><div class='del'>-	TX_STATS_ENUM_LAST,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* NIX RX stats */</div><div class='del'>-enum nix_stat_lf_rx {</div><div class='del'>-	RX_OCTS		= 0x0,</div><div class='del'>-	RX_UCAST	= 0x1,</div><div class='del'>-	RX_BCAST	= 0x2,</div><div class='del'>-	RX_MCAST	= 0x3,</div><div class='del'>-	RX_DROP		= 0x4,</div><div class='del'>-	RX_DROP_OCTS	= 0x5,</div><div class='del'>-	RX_FCS		= 0x6,</div><div class='del'>-	RX_ERR		= 0x7,</div><div class='del'>-	RX_DRP_BCAST	= 0x8,</div><div class='del'>-	RX_DRP_MCAST	= 0x9,</div><div class='del'>-	RX_DRP_L3BCAST	= 0xa,</div><div class='del'>-	RX_DRP_L3MCAST	= 0xb,</div><div class='del'>-	RX_STATS_ENUM_LAST,</div><div class='add'>+enum otx2_xdp_action {</div><div class='add'>+	OTX2_XDP_TX	  = BIT(0),</div><div class='add'>+	OTX2_XDP_REDIRECT = BIT(1),</div><div class='add'>+	OTX2_AF_XDP_FRAME = BIT(2),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct otx2_dev_stats {</div><div class='hunk'>@@ -161,6 +154,7 @@ struct otx2_dev_stats {</div><div class='ctx'> 	u64 tx_bcast_frames;</div><div class='ctx'> 	u64 tx_mcast_frames;</div><div class='ctx'> 	u64 tx_drops;</div><div class='add'>+	atomic_long_t tx_discards;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Driver counted stats */</div><div class='hunk'>@@ -224,6 +218,7 @@ struct otx2_hw {</div><div class='ctx'> </div><div class='ctx'> 	/* NIX */</div><div class='ctx'> 	u8			txschq_link_cfg_lvl;</div><div class='add'>+	u8			txschq_cnt[NIX_TXSCH_LVL_CNT];</div><div class='ctx'> 	u8			txschq_aggr_lvl_rr_prio;</div><div class='ctx'> 	u16			txschq_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];</div><div class='ctx'> 	u16			matchall_ipolicer;</div><div class='hunk'>@@ -234,6 +229,8 @@ struct otx2_hw {</div><div class='ctx'> 	/* HW settings, coalescing etc */</div><div class='ctx'> 	u16			rx_chan_base;</div><div class='ctx'> 	u16			tx_chan_base;</div><div class='add'>+	u8			rx_chan_cnt;</div><div class='add'>+	u8			tx_chan_cnt;</div><div class='ctx'> 	u16			cq_qcount_wait;</div><div class='ctx'> 	u16			cq_ecount_wait;</div><div class='ctx'> 	u16			rq_skid;</div><div class='hunk'>@@ -254,6 +251,7 @@ struct otx2_hw {</div><div class='ctx'> 	u16			nix_msixoff; /* Offset of NIX vectors */</div><div class='ctx'> 	char			*irq_name;</div><div class='ctx'> 	cpumask_var_t           *affinity_mask;</div><div class='add'>+	struct pf_irq_data	*pfvf_irq_devid[4];</div><div class='ctx'> </div><div class='ctx'> 	/* Stats */</div><div class='ctx'> 	struct otx2_dev_stats	dev_stats;</div><div class='hunk'>@@ -365,14 +363,24 @@ struct otx2_flow_config {</div><div class='ctx'> 	struct list_head	flow_list_tc;</div><div class='ctx'> 	u8			ucast_flt_cnt;</div><div class='ctx'> 	bool			ntuple;</div><div class='add'>+	u16			ntuple_cnt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct dev_hw_ops {</div><div class='del'>-	int	(*sq_aq_init)(void *dev, u16 qidx, u16 sqb_aura);</div><div class='add'>+	int	(*sq_aq_init)(void *dev, u16 qidx, u8 chan_offset,</div><div class='add'>+			      u16 sqb_aura);</div><div class='ctx'> 	void	(*sqe_flush)(void *dev, struct otx2_snd_queue *sq,</div><div class='ctx'> 			     int size, int qidx);</div><div class='ctx'> 	int	(*refill_pool_ptrs)(void *dev, struct otx2_cq_queue *cq);</div><div class='ctx'> 	void	(*aura_freeptr)(void *dev, int aura, u64 buf);</div><div class='add'>+	irqreturn_t (*pfaf_mbox_intr_handler)(int irq, void *pf_irq);</div><div class='add'>+	irqreturn_t (*vfaf_mbox_intr_handler)(int irq, void *pf_irq);</div><div class='add'>+	irqreturn_t (*pfvf_mbox_intr_handler)(int irq, void *pf_irq);</div><div class='add'>+	int	(*aura_aq_init)(struct otx2_nic *pfvf, int aura_id,</div><div class='add'>+				int pool_id, int numptrs);</div><div class='add'>+	int	(*pool_aq_init)(struct otx2_nic *pfvf, u16 pool_id,</div><div class='add'>+				int stack_pages, int numptrs, int buf_size,</div><div class='add'>+				int type);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define CN10K_MCS_SA_PER_SC	4</div><div class='hunk'>@@ -440,6 +448,16 @@ struct cn10k_mcs_cfg {</div><div class='ctx'> 	struct list_head rxsc_list;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct pf_irq_data {</div><div class='add'>+	u64 intr_status;</div><div class='add'>+	void (*pf_queue_work_hdlr)(struct mbox *mb, struct workqueue_struct *mw,</div><div class='add'>+				   int first, int mdevs, u64 intr);</div><div class='add'>+	struct otx2_nic *pf;</div><div class='add'>+	int vec_num;</div><div class='add'>+	int start;</div><div class='add'>+	int mdevs;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct otx2_nic {</div><div class='ctx'> 	void __iomem		*reg_base;</div><div class='ctx'> 	struct net_device	*netdev;</div><div class='hunk'>@@ -466,6 +484,9 @@ struct otx2_nic {</div><div class='ctx'> #define OTX2_FLAG_PTP_ONESTEP_SYNC		BIT_ULL(15)</div><div class='ctx'> #define OTX2_FLAG_ADPTV_INT_COAL_ENABLED BIT_ULL(16)</div><div class='ctx'> #define OTX2_FLAG_TC_MARK_ENABLED		BIT_ULL(17)</div><div class='add'>+#define OTX2_FLAG_REP_MODE_ENABLED		 BIT_ULL(18)</div><div class='add'>+#define OTX2_FLAG_PORT_UP			BIT_ULL(19)</div><div class='add'>+#define OTX2_FLAG_IPSEC_OFFLOAD_ENABLED		BIT_ULL(20)</div><div class='ctx'> 	u64			flags;</div><div class='ctx'> 	u64			*cq_op_addr;</div><div class='ctx'> </div><div class='hunk'>@@ -480,6 +501,7 @@ struct otx2_nic {</div><div class='ctx'> 	struct mbox		*mbox_pfvf;</div><div class='ctx'> 	struct workqueue_struct *mbox_wq;</div><div class='ctx'> 	struct workqueue_struct *mbox_pfvf_wq;</div><div class='add'>+	struct qmem		*pfvf_mbox_addr;</div><div class='ctx'> </div><div class='ctx'> 	u8			total_vfs;</div><div class='ctx'> 	u16			pcifunc; /* RVU PF_FUNC */</div><div class='hunk'>@@ -511,15 +533,15 @@ struct otx2_nic {</div><div class='ctx'> 	u32			nix_lmt_size;</div><div class='ctx'> </div><div class='ctx'> 	struct otx2_ptp		*ptp;</div><div class='del'>-	struct hwtstamp_config	tstamp;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp;</div><div class='ctx'> </div><div class='ctx'> 	unsigned long		rq_bmap;</div><div class='ctx'> </div><div class='ctx'> 	/* Devlink */</div><div class='ctx'> 	struct otx2_devlink	*dl;</div><div class='del'>-#ifdef CONFIG_DCB</div><div class='ctx'> 	/* PFC */</div><div class='ctx'> 	u8			pfc_en;</div><div class='add'>+#ifdef CONFIG_DCB</div><div class='ctx'> 	u8			*queue_to_pfc_map;</div><div class='ctx'> 	u16			pfc_schq_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];</div><div class='ctx'> 	bool			pfc_alloc_status[NIX_PF_PFC_PRIO_MAX];</div><div class='hunk'>@@ -533,11 +555,24 @@ struct otx2_nic {</div><div class='ctx'> #if IS_ENABLED(CONFIG_MACSEC)</div><div class='ctx'> 	struct cn10k_mcs_cfg	*macsec_cfg;</div><div class='ctx'> #endif</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_RVU_ESWITCH)</div><div class='add'>+	struct rep_dev		**reps;</div><div class='add'>+	int			rep_cnt;</div><div class='add'>+	u16			rep_pf_map[RVU_MAX_REP];</div><div class='add'>+	u16			esw_mode;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Inline ipsec */</div><div class='add'>+	struct cn10k_ipsec	ipsec;</div><div class='add'>+	/* af_xdp zero-copy */</div><div class='add'>+	unsigned long		*af_xdp_zc_qidx;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline bool is_otx2_lbkvf(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	return pdev-&gt;device == PCI_DEVID_OCTEONTX2_RVU_AFVF;</div><div class='add'>+	return (pdev-&gt;device == PCI_DEVID_OCTEONTX2_RVU_AFVF) ||</div><div class='add'>+		(pdev-&gt;device == PCI_DEVID_RVU_REP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool is_96xx_A0(struct pci_dev *pdev)</div><div class='hunk'>@@ -552,6 +587,11 @@ static inline bool is_96xx_B0(struct pci_dev *pdev)</div><div class='ctx'> 		(pdev-&gt;subsystem_device == PCI_SUBSYS_DEVID_96XX_RVU_PFVF);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool is_otx2_sdp_rep(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	return pdev-&gt;device == PCI_DEVID_OCTEONTX2_SDP_REP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* REVID for PCIe devices.</div><div class='ctx'>  * Bits 0..1: minor pass, bit 3..2: major pass</div><div class='ctx'>  * bits 7..4: midr id</div><div class='hunk'>@@ -577,6 +617,15 @@ static inline bool is_dev_cn10kb(struct pci_dev *pdev)</div><div class='ctx'> 	return pdev-&gt;subsystem_device == PCI_SUBSYS_DEVID_CN10K_B_RVU_PFVF;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool is_dev_cn10ka_b0(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	if (pdev-&gt;subsystem_device == PCI_SUBSYS_DEVID_CN10K_A_RVU_PFVF &amp;&amp;</div><div class='add'>+	    (pdev-&gt;revision &amp; 0xFF) == 0x54)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void otx2_setup_dev_hw_settings(struct otx2_nic *pfvf)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_hw *hw = &amp;pfvf-&gt;hw;</div><div class='hunk'>@@ -609,9 +658,6 @@ static inline void otx2_setup_dev_hw_settings(struct otx2_nic *pfvf)</div><div class='ctx'> 		__set_bit(CN10K_PTP_ONESTEP, &amp;hw-&gt;cap_flag);</div><div class='ctx'> 		__set_bit(QOS_CIR_PIR_SUPPORT, &amp;hw-&gt;cap_flag);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (is_dev_cn10kb(pfvf-&gt;pdev))</div><div class='del'>-		__set_bit(CN10K_HW_MACSEC, &amp;hw-&gt;cap_flag);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Register read/write APIs */</div><div class='hunk'>@@ -626,6 +672,9 @@ static inline void __iomem *otx2_get_regaddr(struct otx2_nic *nic, u64 offset)</div><div class='ctx'> 	case BLKTYPE_NPA:</div><div class='ctx'> 		blkaddr = BLKADDR_NPA;</div><div class='ctx'> 		break;</div><div class='add'>+	case BLKTYPE_CPT:</div><div class='add'>+		blkaddr = BLKADDR_CPT0;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		blkaddr = BLKADDR_RVUM;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -707,8 +756,9 @@ static inline void otx2_write128(u64 lo, u64 hi, void __iomem *addr)</div><div class='ctx'> 			 ::[x0]"r"(lo), [x1]"r"(hi), [p1]"r"(addr));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u64 otx2_atomic64_add(u64 incr, u64 *ptr)</div><div class='add'>+static inline u64 otx2_atomic64_add(u64 incr, void __iomem *addr)</div><div class='ctx'> {</div><div class='add'>+	u64 __iomem *ptr = addr;</div><div class='ctx'> 	u64 result;</div><div class='ctx'> </div><div class='ctx'> 	__asm__ volatile(".cpu   generic+lse\n"</div><div class='hunk'>@@ -721,7 +771,11 @@ static inline u64 otx2_atomic64_add(u64 incr, u64 *ptr)</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> #define otx2_write128(lo, hi, addr)		writeq((hi) | (lo), addr)</div><div class='del'>-#define otx2_atomic64_add(incr, ptr)		({ *ptr += incr; })</div><div class='add'>+</div><div class='add'>+static inline u64 otx2_atomic64_add(u64 incr, void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static inline void __cn10k_aura_freeptr(struct otx2_nic *pfvf, u64 aura,</div><div class='hunk'>@@ -771,7 +825,7 @@ static inline void cn10k_aura_freeptr(void *dev, int aura, u64 buf)</div><div class='ctx'> /* Alloc pointer from pool/aura */</div><div class='ctx'> static inline u64 otx2_aura_allocptr(struct otx2_nic *pfvf, int aura)</div><div class='ctx'> {</div><div class='del'>-	u64 *ptr = (__force u64 *)otx2_get_regaddr(pfvf, NPA_LF_AURA_OP_ALLOCX(0));</div><div class='add'>+	void __iomem *ptr = otx2_get_regaddr(pfvf, NPA_LF_AURA_OP_ALLOCX(0));</div><div class='ctx'> 	u64 incr = (u64)aura | BIT_ULL(63);</div><div class='ctx'> </div><div class='ctx'> 	return otx2_atomic64_add(incr, ptr);</div><div class='hunk'>@@ -846,6 +900,7 @@ static struct _req_type __maybe_unused					\</div><div class='ctx'> *otx2_mbox_alloc_msg_ ## _fn_name(struct mbox *mbox)                    \</div><div class='ctx'> {									\</div><div class='ctx'> 	struct _req_type *req;						\</div><div class='add'>+	u16 pcifunc = mbox-&gt;pfvf-&gt;pcifunc;				\</div><div class='ctx'> 									\</div><div class='ctx'> 	req = (struct _req_type *)otx2_mbox_alloc_msg_rsp(		\</div><div class='ctx'> 		&amp;mbox-&gt;mbox, 0, sizeof(struct _req_type),		\</div><div class='hunk'>@@ -854,7 +909,8 @@ static struct _req_type __maybe_unused					\</div><div class='ctx'> 		return NULL;						\</div><div class='ctx'> 	req-&gt;hdr.sig = OTX2_MBOX_REQ_SIG;				\</div><div class='ctx'> 	req-&gt;hdr.id = _id;						\</div><div class='del'>-	trace_otx2_msg_alloc(mbox-&gt;mbox.pdev, _id, sizeof(*req));	\</div><div class='add'>+	req-&gt;hdr.pcifunc = pcifunc;					\</div><div class='add'>+	trace_otx2_msg_alloc(mbox-&gt;mbox.pdev, _id, sizeof(*req), pcifunc); \</div><div class='ctx'> 	return req;							\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -874,21 +930,11 @@ MBOX_UP_MCS_MESSAGES</div><div class='ctx'> /* Time to wait before watchdog kicks off */</div><div class='ctx'> #define OTX2_TX_TIMEOUT		(100 * HZ)</div><div class='ctx'> </div><div class='del'>-#define	RVU_PFVF_PF_SHIFT	10</div><div class='del'>-#define	RVU_PFVF_PF_MASK	0x3F</div><div class='del'>-#define	RVU_PFVF_FUNC_SHIFT	0</div><div class='del'>-#define	RVU_PFVF_FUNC_MASK	0x3FF</div><div class='del'>-</div><div class='ctx'> static inline bool is_otx2_vf(u16 pcifunc)</div><div class='ctx'> {</div><div class='ctx'> 	return !!(pcifunc &amp; RVU_PFVF_FUNC_MASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int rvu_get_pf(u16 pcifunc)</div><div class='del'>-{</div><div class='del'>-	return (pcifunc &gt;&gt; RVU_PFVF_PF_SHIFT) &amp; RVU_PFVF_PF_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline dma_addr_t otx2_dma_map_page(struct otx2_nic *pfvf,</div><div class='ctx'> 					   struct page *page,</div><div class='ctx'> 					   size_t offset, size_t size,</div><div class='hunk'>@@ -914,15 +960,19 @@ static inline void otx2_dma_unmap_page(struct otx2_nic *pfvf,</div><div class='ctx'> static inline u16 otx2_get_smq_idx(struct otx2_nic *pfvf, u16 qidx)</div><div class='ctx'> {</div><div class='ctx'> 	u16 smq;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DCB</div><div class='ctx'> 	if (qidx &lt; NIX_PF_PFC_PRIO_MAX &amp;&amp; pfvf-&gt;pfc_alloc_status[qidx])</div><div class='ctx'> 		return pfvf-&gt;pfc_schq_list[NIX_TXSCH_LVL_SMQ][qidx];</div><div class='ctx'> #endif</div><div class='ctx'> 	/* check if qidx falls under QOS queues */</div><div class='del'>-	if (qidx &gt;= pfvf-&gt;hw.non_qos_queues)</div><div class='add'>+	if (qidx &gt;= pfvf-&gt;hw.non_qos_queues) {</div><div class='ctx'> 		smq = pfvf-&gt;qos.qid_to_sqmap[qidx - pfvf-&gt;hw.non_qos_queues];</div><div class='del'>-	else</div><div class='del'>-		smq = pfvf-&gt;hw.txschq_list[NIX_TXSCH_LVL_SMQ][0];</div><div class='add'>+	} else {</div><div class='add'>+		idx = qidx % pfvf-&gt;hw.txschq_cnt[NIX_TXSCH_LVL_SMQ];</div><div class='add'>+		smq = pfvf-&gt;hw.txschq_list[NIX_TXSCH_LVL_SMQ][idx];</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return smq;</div><div class='ctx'> }</div><div class='hunk'>@@ -982,15 +1032,16 @@ void otx2_txschq_free_one(struct otx2_nic *pfvf, u16 lvl, u16 schq);</div><div class='ctx'> void otx2_free_pending_sqe(struct otx2_nic *pfvf);</div><div class='ctx'> void otx2_sqb_flush(struct otx2_nic *pfvf);</div><div class='ctx'> int otx2_alloc_rbuf(struct otx2_nic *pfvf, struct otx2_pool *pool,</div><div class='del'>-		    dma_addr_t *dma);</div><div class='add'>+		    dma_addr_t *dma, int qidx, int idx);</div><div class='ctx'> int otx2_rxtx_enable(struct otx2_nic *pfvf, bool enable);</div><div class='ctx'> void otx2_ctx_disable(struct mbox *mbox, int type, bool npa);</div><div class='ctx'> int otx2_nix_config_bp(struct otx2_nic *pfvf, bool enable);</div><div class='add'>+int otx2_nix_cpt_config_bp(struct otx2_nic *pfvf, bool enable);</div><div class='ctx'> void otx2_cleanup_rx_cqes(struct otx2_nic *pfvf, struct otx2_cq_queue *cq, int qidx);</div><div class='ctx'> void otx2_cleanup_tx_cqes(struct otx2_nic *pfvf, struct otx2_cq_queue *cq);</div><div class='ctx'> int otx2_sq_init(struct otx2_nic *pfvf, u16 qidx, u16 sqb_aura);</div><div class='del'>-int otx2_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura);</div><div class='del'>-int cn10k_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura);</div><div class='add'>+int otx2_sq_aq_init(void *dev, u16 qidx, u8 chan_offset, u16 sqb_aura);</div><div class='add'>+int cn10k_sq_aq_init(void *dev, u16 qidx, u8 chan_offset, u16 sqb_aura);</div><div class='ctx'> int otx2_alloc_buffer(struct otx2_nic *pfvf, struct otx2_cq_queue *cq,</div><div class='ctx'> 		      dma_addr_t *dma);</div><div class='ctx'> int otx2_pool_init(struct otx2_nic *pfvf, u16 pool_id,</div><div class='hunk'>@@ -1011,12 +1062,19 @@ void otx2_pfaf_mbox_destroy(struct otx2_nic *pf);</div><div class='ctx'> void otx2_disable_mbox_intr(struct otx2_nic *pf);</div><div class='ctx'> void otx2_disable_napi(struct otx2_nic *pf);</div><div class='ctx'> irqreturn_t otx2_cq_intr_handler(int irq, void *cq_irq);</div><div class='add'>+int otx2_rq_init(struct otx2_nic *pfvf, u16 qidx, u16 lpb_aura);</div><div class='add'>+int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx);</div><div class='add'>+int otx2_set_hw_capabilities(struct otx2_nic *pfvf);</div><div class='add'>+int otx2_aura_aq_init(struct otx2_nic *pfvf, int aura_id,</div><div class='add'>+		      int pool_id, int numptrs);</div><div class='add'>+int otx2_pool_aq_init(struct otx2_nic *pfvf, u16 pool_id,</div><div class='add'>+		      int stack_pages, int numptrs, int buf_size, int type);</div><div class='ctx'> </div><div class='ctx'> /* RSS configuration APIs*/</div><div class='ctx'> int otx2_rss_init(struct otx2_nic *pfvf);</div><div class='ctx'> int otx2_set_flowkey_cfg(struct otx2_nic *pfvf);</div><div class='ctx'> void otx2_set_rss_key(struct otx2_nic *pfvf);</div><div class='del'>-int otx2_set_rss_table(struct otx2_nic *pfvf, int ctx_id);</div><div class='add'>+int otx2_set_rss_table(struct otx2_nic *pfvf, int ctx_id, const u32 *ind_tbl);</div><div class='ctx'> </div><div class='ctx'> /* Mbox handlers */</div><div class='ctx'> void mbox_handler_msix_offset(struct otx2_nic *pfvf,</div><div class='hunk'>@@ -1050,8 +1108,11 @@ int otx2_open(struct net_device *netdev);</div><div class='ctx'> int otx2_stop(struct net_device *netdev);</div><div class='ctx'> int otx2_set_real_num_queues(struct net_device *netdev,</div><div class='ctx'> 			     int tx_queues, int rx_queues);</div><div class='del'>-int otx2_ioctl(struct net_device *netdev, struct ifreq *req, int cmd);</div><div class='del'>-int otx2_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr);</div><div class='add'>+int otx2_config_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config);</div><div class='add'>+int otx2_config_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack);</div><div class='ctx'> </div><div class='ctx'> /* MCAM filter related APIs */</div><div class='ctx'> int otx2_mcam_flow_init(struct otx2_nic *pf);</div><div class='hunk'>@@ -1073,7 +1134,10 @@ int otx2_del_macfilter(struct net_device *netdev, const u8 *mac);</div><div class='ctx'> int otx2_add_macfilter(struct net_device *netdev, const u8 *mac);</div><div class='ctx'> int otx2_enable_rxvlan(struct otx2_nic *pf, bool enable);</div><div class='ctx'> int otx2_install_rxvlan_offload_flow(struct otx2_nic *pfvf);</div><div class='del'>-bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len, u16 qidx);</div><div class='add'>+bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, struct xdp_frame *xdpf,</div><div class='add'>+			    u64 iova, int len, u16 qidx, u16 flags);</div><div class='add'>+void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq, struct xdp_frame *xdpf,</div><div class='add'>+			 u64 dma_addr, int len, int *offset, u16 flags);</div><div class='ctx'> u16 otx2_get_max_mtu(struct otx2_nic *pfvf);</div><div class='ctx'> int otx2_handle_ntuple_tc_features(struct net_device *netdev,</div><div class='ctx'> 				   netdev_features_t features);</div><div class='hunk'>@@ -1142,4 +1206,19 @@ u16 otx2_select_queue(struct net_device *netdev, struct sk_buff *skb,</div><div class='ctx'> int otx2_get_txq_by_classid(struct otx2_nic *pfvf, u16 classid);</div><div class='ctx'> void otx2_qos_config_txschq(struct otx2_nic *pfvf);</div><div class='ctx'> void otx2_clean_qos_queues(struct otx2_nic *pfvf);</div><div class='add'>+int rvu_event_up_notify(struct otx2_nic *pf, struct rep_event *info);</div><div class='add'>+int otx2_setup_tc_cls_flower(struct otx2_nic *nic,</div><div class='add'>+			     struct flow_cls_offload *cls_flower);</div><div class='add'>+</div><div class='add'>+static inline int mcam_entry_cmp(const void *a, const void *b)</div><div class='add'>+{</div><div class='add'>+	return *(u16 *)a - *(u16 *)b;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+dma_addr_t otx2_dma_map_skb_frag(struct otx2_nic *pfvf,</div><div class='add'>+				 struct sk_buff *skb, int seg, int *len);</div><div class='add'>+void otx2_dma_unmap_skb_frags(struct otx2_nic *pfvf, struct sg_list *sg);</div><div class='add'>+int otx2_read_free_sqe(struct otx2_nic *pfvf, u16 qidx);</div><div class='add'>+void otx2_queue_vf_work(struct mbox *mw, struct workqueue_struct *mbox_wq,</div><div class='add'>+			int first, int mdevs, u64 intr);</div><div class='ctx'> #endif /* OTX2_COMMON_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c<br/>index 294fba58b670..f110dfa42360 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c</a></div><div class='hunk'>@@ -435,6 +435,9 @@ process_pfc:</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Default disable backpressure on NIX-CPT */</div><div class='add'>+	otx2_nix_cpt_config_bp(pfvf, false);</div><div class='add'>+</div><div class='ctx'> 	/* Request Per channel Bpids */</div><div class='ctx'> 	if (pfc-&gt;pfc_en)</div><div class='ctx'> 		otx2_nix_config_bp(pfvf, true);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c<br/>index 53f14aa944bd..a72694219df4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c</a></div><div class='hunk'>@@ -41,13 +41,15 @@ static int otx2_dl_mcam_count_set(struct devlink *devlink, u32 id,</div><div class='ctx'> 	if (!pfvf-&gt;flow_cfg)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	pfvf-&gt;flow_cfg-&gt;ntuple_cnt = ctx-&gt;val.vu16;</div><div class='ctx'> 	otx2_alloc_mcam_entries(pfvf, ctx-&gt;val.vu16);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int otx2_dl_mcam_count_get(struct devlink *devlink, u32 id,</div><div class='del'>-				  struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				  struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_devlink *otx2_dl = devlink_priv(devlink);</div><div class='ctx'> 	struct otx2_nic *pfvf = otx2_dl-&gt;pfvf;</div><div class='hunk'>@@ -83,7 +85,8 @@ static int otx2_dl_ucast_flt_cnt_set(struct devlink *devlink, u32 id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int otx2_dl_ucast_flt_cnt_get(struct devlink *devlink, u32 id,</div><div class='del'>-				     struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				     struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_devlink *otx2_dl = devlink_priv(devlink);</div><div class='ctx'> 	struct otx2_nic *pfvf = otx2_dl-&gt;pfvf;</div><div class='hunk'>@@ -141,7 +144,56 @@ static const struct devlink_param otx2_dl_params[] = {</div><div class='ctx'> 			     otx2_dl_ucast_flt_cnt_validate),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_RVU_ESWITCH</div><div class='add'>+static int otx2_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode)</div><div class='add'>+{</div><div class='add'>+	struct otx2_devlink *otx2_dl = devlink_priv(devlink);</div><div class='add'>+	struct otx2_nic *pfvf = otx2_dl-&gt;pfvf;</div><div class='add'>+</div><div class='add'>+	if (!otx2_rep_dev(pfvf-&gt;pdev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	*mode = pfvf-&gt;esw_mode;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int otx2_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,</div><div class='add'>+					 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct otx2_devlink *otx2_dl = devlink_priv(devlink);</div><div class='add'>+	struct otx2_nic *pfvf = otx2_dl-&gt;pfvf;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!otx2_rep_dev(pfvf-&gt;pdev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (pfvf-&gt;esw_mode == mode)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case DEVLINK_ESWITCH_MODE_LEGACY:</div><div class='add'>+		rvu_rep_destroy(pfvf);</div><div class='add'>+		break;</div><div class='add'>+	case DEVLINK_ESWITCH_MODE_SWITCHDEV:</div><div class='add'>+		ret = rvu_rep_create(pfvf, extack);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		pfvf-&gt;esw_mode = mode;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static const struct devlink_ops otx2_devlink_ops = {</div><div class='add'>+#ifdef CONFIG_RVU_ESWITCH</div><div class='add'>+	.eswitch_mode_get = otx2_devlink_eswitch_mode_get,</div><div class='add'>+	.eswitch_mode_set = otx2_devlink_eswitch_mode_set,</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int otx2_register_dl(struct otx2_nic *pfvf)</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c<br/>index 2d53dc77ef1e..b90e23dc49de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "otx2_common.h"</div><div class='ctx'> #include "otx2_ptp.h"</div><div class='add'>+#include &lt;cgx_fw_if.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"rvu-nicpf"</div><div class='ctx'> #define DRV_VF_NAME	"rvu-nicvf"</div><div class='hunk'>@@ -315,7 +316,7 @@ static void otx2_get_pauseparam(struct net_device *netdev,</div><div class='ctx'> 	struct otx2_nic *pfvf = netdev_priv(netdev);</div><div class='ctx'> 	struct cgx_pause_frm_cfg *req, *rsp;</div><div class='ctx'> </div><div class='del'>-	if (is_otx2_lbkvf(pfvf-&gt;pdev))</div><div class='add'>+	if (is_otx2_lbkvf(pfvf-&gt;pdev) || is_otx2_sdp_rep(pfvf-&gt;pdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pfvf-&gt;mbox.lock);</div><div class='hunk'>@@ -347,7 +348,7 @@ static int otx2_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> 	if (pause-&gt;autoneg)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (is_otx2_lbkvf(pfvf-&gt;pdev))</div><div class='add'>+	if (is_otx2_lbkvf(pfvf-&gt;pdev) || is_otx2_sdp_rep(pfvf-&gt;pdev))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	if (pause-&gt;rx_pause)</div><div class='hunk'>@@ -559,10 +560,13 @@ static int otx2_set_coalesce(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int otx2_get_rss_hash_opts(struct otx2_nic *pfvf,</div><div class='del'>-				  struct ethtool_rxnfc *nfc)</div><div class='add'>+static int otx2_get_rss_hash_opts(struct net_device *dev,</div><div class='add'>+				  struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='del'>-	struct otx2_rss_info *rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='add'>+	struct otx2_nic *pfvf = netdev_priv(dev);</div><div class='add'>+	struct otx2_rss_info *rss;</div><div class='add'>+</div><div class='add'>+	rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='ctx'> </div><div class='ctx'> 	if (!(rss-&gt;flowkey_cfg &amp;</div><div class='ctx'> 	    (NIX_FLOW_KEY_TYPE_IPV4 | NIX_FLOW_KEY_TYPE_IPV6)))</div><div class='hunk'>@@ -609,12 +613,17 @@ static int otx2_get_rss_hash_opts(struct otx2_nic *pfvf,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int otx2_set_rss_hash_opts(struct otx2_nic *pfvf,</div><div class='del'>-				  struct ethtool_rxnfc *nfc)</div><div class='add'>+static int otx2_set_rss_hash_opts(struct net_device *dev,</div><div class='add'>+				  const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct otx2_rss_info *rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='add'>+	struct otx2_nic *pfvf = netdev_priv(dev);</div><div class='ctx'> 	u32 rxh_l4 = RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='del'>-	u32 rss_cfg = rss-&gt;flowkey_cfg;</div><div class='add'>+	struct otx2_rss_info *rss;</div><div class='add'>+	u32 rss_cfg;</div><div class='add'>+</div><div class='add'>+	rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='add'>+	rss_cfg = rss-&gt;flowkey_cfg;</div><div class='ctx'> </div><div class='ctx'> 	if (!rss-&gt;enable) {</div><div class='ctx'> 		netdev_err(pfvf-&gt;netdev,</div><div class='hunk'>@@ -743,8 +752,6 @@ static int otx2_get_rxnfc(struct net_device *dev,</div><div class='ctx'> 		if (netif_running(dev) &amp;&amp; ntuple)</div><div class='ctx'> 			ret = otx2_get_all_flows(pfvf, nfc, rules);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		return otx2_get_rss_hash_opts(pfvf, nfc);</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -759,9 +766,6 @@ static int otx2_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *nfc)</div><div class='ctx'> </div><div class='ctx'> 	pfvf-&gt;flow_cfg-&gt;ntuple = ntuple;</div><div class='ctx'> 	switch (nfc-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = otx2_set_rss_hash_opts(pfvf, nfc);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		if (netif_running(dev) &amp;&amp; ntuple)</div><div class='ctx'> 			ret = otx2_add_flow(pfvf, nfc);</div><div class='hunk'>@@ -792,60 +796,91 @@ static u32 otx2_get_rxfh_indir_size(struct net_device *dev)</div><div class='ctx'> 	return  MAX_RSS_INDIR_TBL_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int otx2_rss_ctx_delete(struct otx2_nic *pfvf, int ctx_id)</div><div class='add'>+static int otx2_create_rxfh(struct net_device *dev,</div><div class='add'>+			    struct ethtool_rxfh_context *ctx,</div><div class='add'>+			    const struct ethtool_rxfh_param *rxfh,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct otx2_rss_info *rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='add'>+	struct otx2_nic *pfvf = netdev_priv(dev);</div><div class='add'>+	struct otx2_rss_info *rss;</div><div class='add'>+	unsigned int queues;</div><div class='add'>+	u32 *ind_tbl;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='add'>+	queues = pfvf-&gt;hw.rx_queues;</div><div class='ctx'> </div><div class='del'>-	otx2_rss_ctx_flow_del(pfvf, ctx_id);</div><div class='del'>-	kfree(rss-&gt;rss_ctx[ctx_id]);</div><div class='del'>-	rss-&gt;rss_ctx[ctx_id] = NULL;</div><div class='add'>+	if (rxfh-&gt;hfunc &amp;&amp; rxfh-&gt;hfunc != ETH_RSS_HASH_TOP)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	ctx-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='ctx'> </div><div class='add'>+	if (!rss-&gt;enable) {</div><div class='add'>+		netdev_err(dev, "RSS is disabled, cannot change settings\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ind_tbl = rxfh-&gt;indir;</div><div class='add'>+	if (!ind_tbl) {</div><div class='add'>+		ind_tbl = ethtool_rxfh_context_indir(ctx);</div><div class='add'>+		for (idx = 0; idx &lt; rss-&gt;rss_size; idx++)</div><div class='add'>+			ind_tbl[idx] = ethtool_rxfh_indir_default(idx, queues);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	otx2_set_rss_table(pfvf, rxfh-&gt;rss_context, ind_tbl);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int otx2_rss_ctx_create(struct otx2_nic *pfvf,</div><div class='del'>-			       u32 *rss_context)</div><div class='add'>+static int otx2_modify_rxfh(struct net_device *dev,</div><div class='add'>+			    struct ethtool_rxfh_context *ctx,</div><div class='add'>+			    const struct ethtool_rxfh_param *rxfh,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct otx2_rss_info *rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='del'>-	u8 ctx;</div><div class='add'>+	struct otx2_nic *pfvf = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	for (ctx = 0; ctx &lt; MAX_RSS_GROUPS; ctx++) {</div><div class='del'>-		if (!rss-&gt;rss_ctx[ctx])</div><div class='del'>-			break;</div><div class='add'>+	if (rxfh-&gt;hfunc != ETH_RSS_HASH_NO_CHANGE &amp;&amp;</div><div class='add'>+	    rxfh-&gt;hfunc != ETH_RSS_HASH_TOP)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!pfvf-&gt;hw.rss_info.enable) {</div><div class='add'>+		netdev_err(dev, "RSS is disabled, cannot change settings\n");</div><div class='add'>+		return -EIO;</div><div class='ctx'> 	}</div><div class='del'>-	if (ctx == MAX_RSS_GROUPS)</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	rss-&gt;rss_ctx[ctx] = kzalloc(sizeof(*rss-&gt;rss_ctx[ctx]), GFP_KERNEL);</div><div class='del'>-	if (!rss-&gt;rss_ctx[ctx])</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	*rss_context = ctx;</div><div class='add'>+	if (rxfh-&gt;indir)</div><div class='add'>+		otx2_set_rss_table(pfvf, rxfh-&gt;rss_context, rxfh-&gt;indir);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int otx2_remove_rxfh(struct net_device *dev,</div><div class='add'>+			    struct ethtool_rxfh_context *ctx,</div><div class='add'>+			    u32 rss_context,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct otx2_nic *pfvf = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!pfvf-&gt;hw.rss_info.enable) {</div><div class='add'>+		netdev_err(dev, "RSS is disabled, cannot change settings\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	otx2_rss_ctx_flow_del(pfvf, rss_context);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Configure RSS table and hash key */</div><div class='ctx'> static int otx2_set_rxfh(struct net_device *dev,</div><div class='ctx'> 			 struct ethtool_rxfh_param *rxfh,</div><div class='ctx'> 			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	u32 rss_context = DEFAULT_RSS_CONTEXT_GROUP;</div><div class='ctx'> 	struct otx2_nic *pfvf = netdev_priv(dev);</div><div class='del'>-	struct otx2_rss_ctx *rss_ctx;</div><div class='ctx'> 	struct otx2_rss_info *rss;</div><div class='del'>-	int ret, idx;</div><div class='add'>+	int idx;</div><div class='ctx'> </div><div class='ctx'> 	if (rxfh-&gt;hfunc != ETH_RSS_HASH_NO_CHANGE &amp;&amp;</div><div class='ctx'> 	    rxfh-&gt;hfunc != ETH_RSS_HASH_TOP)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (rxfh-&gt;rss_context)</div><div class='del'>-		rss_context = rxfh-&gt;rss_context;</div><div class='del'>-</div><div class='del'>-	if (rss_context != ETH_RXFH_CONTEXT_ALLOC &amp;&amp;</div><div class='del'>-	    rss_context &gt;= MAX_RSS_GROUPS)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='ctx'> </div><div class='ctx'> 	if (!rss-&gt;enable) {</div><div class='hunk'>@@ -857,21 +892,12 @@ static int otx2_set_rxfh(struct net_device *dev,</div><div class='ctx'> 		memcpy(rss-&gt;key, rxfh-&gt;key, sizeof(rss-&gt;key));</div><div class='ctx'> 		otx2_set_rss_key(pfvf);</div><div class='ctx'> 	}</div><div class='del'>-	if (rxfh-&gt;rss_delete)</div><div class='del'>-		return otx2_rss_ctx_delete(pfvf, rss_context);</div><div class='del'>-</div><div class='del'>-	if (rss_context == ETH_RXFH_CONTEXT_ALLOC) {</div><div class='del'>-		ret = otx2_rss_ctx_create(pfvf, &amp;rss_context);</div><div class='del'>-		rxfh-&gt;rss_context = rss_context;</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	if (rxfh-&gt;indir) {</div><div class='del'>-		rss_ctx = rss-&gt;rss_ctx[rss_context];</div><div class='ctx'> 		for (idx = 0; idx &lt; rss-&gt;rss_size; idx++)</div><div class='del'>-			rss_ctx-&gt;ind_tbl[idx] = rxfh-&gt;indir[idx];</div><div class='add'>+			rss-&gt;ind_tbl[idx] = rxfh-&gt;indir[idx];</div><div class='ctx'> 	}</div><div class='del'>-	otx2_set_rss_table(pfvf, rss_context);</div><div class='add'>+	otx2_set_rss_table(pfvf, DEFAULT_RSS_CONTEXT_GROUP, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -880,9 +906,7 @@ static int otx2_set_rxfh(struct net_device *dev,</div><div class='ctx'> static int otx2_get_rxfh(struct net_device *dev,</div><div class='ctx'> 			 struct ethtool_rxfh_param *rxfh)</div><div class='ctx'> {</div><div class='del'>-	u32 rss_context = DEFAULT_RSS_CONTEXT_GROUP;</div><div class='ctx'> 	struct otx2_nic *pfvf = netdev_priv(dev);</div><div class='del'>-	struct otx2_rss_ctx *rss_ctx;</div><div class='ctx'> 	struct otx2_rss_info *rss;</div><div class='ctx'> 	u32 *indir = rxfh-&gt;indir;</div><div class='ctx'> 	int idx, rx_queues;</div><div class='hunk'>@@ -890,28 +914,21 @@ static int otx2_get_rxfh(struct net_device *dev,</div><div class='ctx'> 	rss = &amp;pfvf-&gt;hw.rss_info;</div><div class='ctx'> </div><div class='ctx'> 	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='del'>-	if (rxfh-&gt;rss_context)</div><div class='del'>-		rss_context = rxfh-&gt;rss_context;</div><div class='del'>-</div><div class='ctx'> 	if (!indir)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (!rss-&gt;enable &amp;&amp; rss_context == DEFAULT_RSS_CONTEXT_GROUP) {</div><div class='add'>+	if (!rss-&gt;enable) {</div><div class='ctx'> 		rx_queues = pfvf-&gt;hw.rx_queues;</div><div class='ctx'> 		for (idx = 0; idx &lt; MAX_RSS_INDIR_TBL_SIZE; idx++)</div><div class='ctx'> 			indir[idx] = ethtool_rxfh_indir_default(idx, rx_queues);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	if (rss_context &gt;= MAX_RSS_GROUPS)</div><div class='del'>-		return -ENOENT;</div><div class='ctx'> </div><div class='del'>-	rss_ctx = rss-&gt;rss_ctx[rss_context];</div><div class='del'>-	if (!rss_ctx)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	if (indir) {</div><div class='del'>-		for (idx = 0; idx &lt; rss-&gt;rss_size; idx++)</div><div class='del'>-			indir[idx] = rss_ctx-&gt;ind_tbl[idx];</div><div class='add'>+	for (idx = 0; idx &lt; rss-&gt;rss_size; idx++) {</div><div class='add'>+		/* Ignore if the rx queue is AF_XDP zero copy enabled */</div><div class='add'>+		if (test_bit(rss-&gt;ind_tbl[idx], pfvf-&gt;af_xdp_zc_qidx))</div><div class='add'>+			continue;</div><div class='add'>+		indir[idx] = rss-&gt;ind_tbl[idx];</div><div class='ctx'> 	}</div><div class='ctx'> 	if (rxfh-&gt;key)</div><div class='ctx'> 		memcpy(rxfh-&gt;key, rss-&gt;key, sizeof(rss-&gt;key));</div><div class='hunk'>@@ -937,8 +954,8 @@ static u32 otx2_get_link(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_nic *pfvf = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	/* LBK link is internal and always UP */</div><div class='del'>-	if (is_otx2_lbkvf(pfvf-&gt;pdev))</div><div class='add'>+	/* LBK and SDP links are internal and always UP */</div><div class='add'>+	if (is_otx2_lbkvf(pfvf-&gt;pdev) || is_otx2_sdp_rep(pfvf-&gt;pdev))</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	return pfvf-&gt;linfo.link_up;</div><div class='ctx'> }</div><div class='hunk'>@@ -1119,17 +1136,9 @@ static void otx2_get_link_mode_info(u64 link_mode_bmap,</div><div class='ctx'> 				    *link_ksettings)</div><div class='ctx'> {</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(otx2_link_modes) = { 0, };</div><div class='del'>-	const int otx2_sgmii_features[6] = {</div><div class='del'>-		ETHTOOL_LINK_MODE_10baseT_Half_BIT,</div><div class='del'>-		ETHTOOL_LINK_MODE_10baseT_Full_BIT,</div><div class='del'>-		ETHTOOL_LINK_MODE_100baseT_Half_BIT,</div><div class='del'>-		ETHTOOL_LINK_MODE_100baseT_Full_BIT,</div><div class='del'>-		ETHTOOL_LINK_MODE_1000baseT_Half_BIT,</div><div class='del'>-		ETHTOOL_LINK_MODE_1000baseT_Full_BIT,</div><div class='del'>-	};</div><div class='ctx'> 	/* CGX link modes to Ethtool link mode mapping */</div><div class='del'>-	const int cgx_link_mode[27] = {</div><div class='del'>-		0, /* SGMII  Mode */</div><div class='add'>+	const int cgx_link_mode[CGX_MODE_MAX] = {</div><div class='add'>+		0, /* SGMII  1000baseT */</div><div class='ctx'> 		ETHTOOL_LINK_MODE_1000baseX_Full_BIT,</div><div class='ctx'> 		ETHTOOL_LINK_MODE_10000baseT_Full_BIT,</div><div class='ctx'> 		ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,</div><div class='hunk'>@@ -1159,14 +1168,19 @@ static void otx2_get_link_mode_info(u64 link_mode_bmap,</div><div class='ctx'> 	};</div><div class='ctx'> 	u8 bit;</div><div class='ctx'> </div><div class='del'>-	for_each_set_bit(bit, (unsigned long *)&amp;link_mode_bmap, 27) {</div><div class='del'>-		/* SGMII mode is set */</div><div class='del'>-		if (bit == 0)</div><div class='del'>-			linkmode_set_bit_array(otx2_sgmii_features,</div><div class='del'>-					       ARRAY_SIZE(otx2_sgmii_features),</div><div class='del'>-					       otx2_link_modes);</div><div class='del'>-		else</div><div class='add'>+	for_each_set_bit(bit, (unsigned long *)&amp;link_mode_bmap, ARRAY_SIZE(cgx_link_mode)) {</div><div class='add'>+		if (bit == CGX_MODE_SGMII_10M_BIT) {</div><div class='add'>+			linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, otx2_link_modes);</div><div class='add'>+			linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, otx2_link_modes);</div><div class='add'>+		} else if (bit == CGX_MODE_SGMII_100M_BIT) {</div><div class='add'>+			linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, otx2_link_modes);</div><div class='add'>+			linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, otx2_link_modes);</div><div class='add'>+		} else if (bit == CGX_MODE_SGMII) {</div><div class='add'>+			linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, otx2_link_modes);</div><div class='add'>+			linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, otx2_link_modes);</div><div class='add'>+		} else {</div><div class='ctx'> 			linkmode_set_bit(cgx_link_mode[bit], otx2_link_modes);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (req_mode == OTX2_MODE_ADVERTISED)</div><div class='hunk'>@@ -1207,23 +1221,10 @@ static int otx2_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void otx2_get_advertised_mode(const struct ethtool_link_ksettings *cmd,</div><div class='del'>-				     u64 *mode)</div><div class='del'>-{</div><div class='del'>-	u32 bit_pos;</div><div class='del'>-</div><div class='del'>-	/* Firmware does not support requesting multiple advertised modes</div><div class='del'>-	 * return first set bit</div><div class='del'>-	 */</div><div class='del'>-	bit_pos = find_first_bit(cmd-&gt;link_modes.advertising,</div><div class='del'>-				 __ETHTOOL_LINK_MODE_MASK_NBITS);</div><div class='del'>-	if (bit_pos != __ETHTOOL_LINK_MODE_MASK_NBITS)</div><div class='del'>-		*mode = bit_pos;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int otx2_set_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 				   const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='add'>+	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };</div><div class='ctx'> 	struct otx2_nic *pf = netdev_priv(netdev);</div><div class='ctx'> 	struct ethtool_link_ksettings cur_ks;</div><div class='ctx'> 	struct cgx_set_link_mode_req *req;</div><div class='hunk'>@@ -1260,7 +1261,20 @@ static int otx2_set_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	req-&gt;args.duplex = cmd-&gt;base.duplex ^ 0x1;</div><div class='ctx'> 	req-&gt;args.an = cmd-&gt;base.autoneg;</div><div class='del'>-	otx2_get_advertised_mode(cmd, &amp;req-&gt;args.mode);</div><div class='add'>+	/* Mask unsupported modes and send message to AF */</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_NONE_BIT, mask);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_BASER_BIT, mask);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_FEC_RS_BIT, mask);</div><div class='add'>+</div><div class='add'>+	linkmode_copy(req-&gt;args.advertising,</div><div class='add'>+		      cmd-&gt;link_modes.advertising);</div><div class='add'>+	linkmode_andnot(req-&gt;args.advertising,</div><div class='add'>+			req-&gt;args.advertising, mask);</div><div class='add'>+</div><div class='add'>+	/* inform AF that we need parse this differently */</div><div class='add'>+	if (bitmap_weight(req-&gt;args.advertising,</div><div class='add'>+			  __ETHTOOL_LINK_MODE_MASK_NBITS) &gt;= 2)</div><div class='add'>+		req-&gt;args.multimode = true;</div><div class='ctx'> </div><div class='ctx'> 	err = otx2_sync_mbox_msg(&amp;pf-&gt;mbox);</div><div class='ctx'> end:</div><div class='hunk'>@@ -1269,7 +1283,8 @@ end:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void otx2_get_fec_stats(struct net_device *netdev,</div><div class='del'>-			       struct ethtool_fec_stats *fec_stats)</div><div class='add'>+			       struct ethtool_fec_stats *fec_stats,</div><div class='add'>+			       struct ethtool_fec_hist *hist)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_nic *pfvf = netdev_priv(netdev);</div><div class='ctx'> 	struct cgx_fw_data *rsp;</div><div class='hunk'>@@ -1302,12 +1317,12 @@ static void otx2_get_fec_stats(struct net_device *netdev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops otx2_ethtool_ops = {</div><div class='del'>-	.cap_rss_ctx_supported	= true,</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_MAX_FRAMES |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_ADAPTIVE,</div><div class='ctx'> 	.supported_ring_params  = ETHTOOL_RING_USE_RX_BUF_LEN |</div><div class='ctx'> 				  ETHTOOL_RING_USE_CQE_SIZE,</div><div class='add'>+	.rxfh_max_num_contexts	= MAX_RSS_GROUPS,</div><div class='ctx'> 	.get_link		= otx2_get_link,</div><div class='ctx'> 	.get_drvinfo		= otx2_get_drvinfo,</div><div class='ctx'> 	.get_strings		= otx2_get_strings,</div><div class='hunk'>@@ -1325,6 +1340,11 @@ static const struct ethtool_ops otx2_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size	= otx2_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= otx2_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= otx2_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= otx2_get_rss_hash_opts,</div><div class='add'>+	.set_rxfh_fields	= otx2_set_rss_hash_opts,</div><div class='add'>+	.create_rxfh_context	= otx2_create_rxfh,</div><div class='add'>+	.modify_rxfh_context	= otx2_modify_rxfh,</div><div class='add'>+	.remove_rxfh_context	= otx2_remove_rxfh,</div><div class='ctx'> 	.get_msglevel		= otx2_get_msglevel,</div><div class='ctx'> 	.set_msglevel		= otx2_set_msglevel,</div><div class='ctx'> 	.get_pauseparam		= otx2_get_pauseparam,</div><div class='hunk'>@@ -1409,7 +1429,7 @@ static int otx2vf_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_nic *pfvf = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	if (is_otx2_lbkvf(pfvf-&gt;pdev)) {</div><div class='add'>+	if (is_otx2_lbkvf(pfvf-&gt;pdev) || is_otx2_sdp_rep(pfvf-&gt;pdev)) {</div><div class='ctx'> 		cmd-&gt;base.duplex = DUPLEX_FULL;</div><div class='ctx'> 		cmd-&gt;base.speed = SPEED_100000;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1419,12 +1439,12 @@ static int otx2vf_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops otx2vf_ethtool_ops = {</div><div class='del'>-	.cap_rss_ctx_supported	= true,</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_MAX_FRAMES |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_ADAPTIVE,</div><div class='ctx'> 	.supported_ring_params  = ETHTOOL_RING_USE_RX_BUF_LEN |</div><div class='ctx'> 				  ETHTOOL_RING_USE_CQE_SIZE,</div><div class='add'>+	.rxfh_max_num_contexts	= MAX_RSS_GROUPS,</div><div class='ctx'> 	.get_link		= otx2_get_link,</div><div class='ctx'> 	.get_drvinfo		= otx2vf_get_drvinfo,</div><div class='ctx'> 	.get_strings		= otx2vf_get_strings,</div><div class='hunk'>@@ -1438,6 +1458,11 @@ static const struct ethtool_ops otx2vf_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size	= otx2_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= otx2_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= otx2_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= otx2_get_rss_hash_opts,</div><div class='add'>+	.set_rxfh_fields	= otx2_set_rss_hash_opts,</div><div class='add'>+	.create_rxfh_context	= otx2_create_rxfh,</div><div class='add'>+	.modify_rxfh_context	= otx2_modify_rxfh,</div><div class='add'>+	.remove_rxfh_context	= otx2_remove_rxfh,</div><div class='ctx'> 	.get_ringparam		= otx2_get_ringparam,</div><div class='ctx'> 	.set_ringparam		= otx2_set_ringparam,</div><div class='ctx'> 	.get_coalesce		= otx2_get_coalesce,</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c<br/>index 58720a161ee2..64c6d9162ef6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c</a></div><div class='hunk'>@@ -64,11 +64,6 @@ static int otx2_free_ntuple_mcam_entries(struct otx2_nic *pfvf)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mcam_entry_cmp(const void *a, const void *b)</div><div class='del'>-{</div><div class='del'>-	return *(u16 *)a - *(u16 *)b;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int otx2_alloc_mcam_entries(struct otx2_nic *pfvf, u16 count)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_flow_config *flow_cfg = pfvf-&gt;flow_cfg;</div><div class='hunk'>@@ -252,7 +247,7 @@ int otx2_mcam_entry_init(struct otx2_nic *pfvf)</div><div class='ctx'> 	mutex_unlock(&amp;pfvf-&gt;mbox.lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate entries for Ntuple filters */</div><div class='del'>-	count = otx2_alloc_mcam_entries(pfvf, OTX2_DEFAULT_FLOWCOUNT);</div><div class='add'>+	count = otx2_alloc_mcam_entries(pfvf, flow_cfg-&gt;ntuple_cnt);</div><div class='ctx'> 	if (count &lt;= 0) {</div><div class='ctx'> 		otx2_clear_ntuple_flow_info(pfvf, flow_cfg);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -312,6 +307,7 @@ int otx2_mcam_flow_init(struct otx2_nic *pf)</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;pf-&gt;flow_cfg-&gt;flow_list_tc);</div><div class='ctx'> </div><div class='ctx'> 	pf-&gt;flow_cfg-&gt;ucast_flt_cnt = OTX2_DEFAULT_UNICAST_FLOWS;</div><div class='add'>+	pf-&gt;flow_cfg-&gt;ntuple_cnt = OTX2_DEFAULT_FLOWCOUNT;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate bare minimum number of MCAM entries needed for</div><div class='ctx'> 	 * unicast and ntuple filters.</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c<br/>index e6b03bad2dba..a7feb4c392b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'> #include "cn10k.h"</div><div class='ctx'> #include "qos.h"</div><div class='ctx'> #include &lt;rvu_trace.h&gt;</div><div class='add'>+#include "cn10k_ipsec.h"</div><div class='add'>+#include "otx2_xsk.h"</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"rvu_nicpf"</div><div class='ctx'> #define DRV_STRING	"Marvell RVU NIC Physical Function Driver"</div><div class='hunk'>@@ -204,7 +206,8 @@ static int otx2_register_flr_me_intr(struct otx2_nic *pf, int numvfs)</div><div class='ctx'> </div><div class='ctx'> 	/* Register ME interrupt handler*/</div><div class='ctx'> 	irq_name = &amp;hw-&gt;irq_name[RVU_PF_INT_VEC_VFME0 * NAME_SIZE];</div><div class='del'>-	snprintf(irq_name, NAME_SIZE, "RVUPF%d_ME0", rvu_get_pf(pf-&gt;pcifunc));</div><div class='add'>+	snprintf(irq_name, NAME_SIZE, "RVUPF%d_ME0",</div><div class='add'>+		 rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc));</div><div class='ctx'> 	ret = request_irq(pci_irq_vector(pf-&gt;pdev, RVU_PF_INT_VEC_VFME0),</div><div class='ctx'> 			  otx2_pf_me_intr_handler, 0, irq_name, pf);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -214,7 +217,8 @@ static int otx2_register_flr_me_intr(struct otx2_nic *pf, int numvfs)</div><div class='ctx'> </div><div class='ctx'> 	/* Register FLR interrupt handler */</div><div class='ctx'> 	irq_name = &amp;hw-&gt;irq_name[RVU_PF_INT_VEC_VFFLR0 * NAME_SIZE];</div><div class='del'>-	snprintf(irq_name, NAME_SIZE, "RVUPF%d_FLR0", rvu_get_pf(pf-&gt;pcifunc));</div><div class='add'>+	snprintf(irq_name, NAME_SIZE, "RVUPF%d_FLR0",</div><div class='add'>+		 rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc));</div><div class='ctx'> 	ret = request_irq(pci_irq_vector(pf-&gt;pdev, RVU_PF_INT_VEC_VFFLR0),</div><div class='ctx'> 			  otx2_pf_flr_intr_handler, 0, irq_name, pf);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -226,7 +230,7 @@ static int otx2_register_flr_me_intr(struct otx2_nic *pf, int numvfs)</div><div class='ctx'> 	if (numvfs &gt; 64) {</div><div class='ctx'> 		irq_name = &amp;hw-&gt;irq_name[RVU_PF_INT_VEC_VFME1 * NAME_SIZE];</div><div class='ctx'> 		snprintf(irq_name, NAME_SIZE, "RVUPF%d_ME1",</div><div class='del'>-			 rvu_get_pf(pf-&gt;pcifunc));</div><div class='add'>+			 rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc));</div><div class='ctx'> 		ret = request_irq(pci_irq_vector</div><div class='ctx'> 				  (pf-&gt;pdev, RVU_PF_INT_VEC_VFME1),</div><div class='ctx'> 				  otx2_pf_me_intr_handler, 0, irq_name, pf);</div><div class='hunk'>@@ -236,7 +240,7 @@ static int otx2_register_flr_me_intr(struct otx2_nic *pf, int numvfs)</div><div class='ctx'> 		}</div><div class='ctx'> 		irq_name = &amp;hw-&gt;irq_name[RVU_PF_INT_VEC_VFFLR1 * NAME_SIZE];</div><div class='ctx'> 		snprintf(irq_name, NAME_SIZE, "RVUPF%d_FLR1",</div><div class='del'>-			 rvu_get_pf(pf-&gt;pcifunc));</div><div class='add'>+			 rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc));</div><div class='ctx'> 		ret = request_irq(pci_irq_vector</div><div class='ctx'> 				  (pf-&gt;pdev, RVU_PF_INT_VEC_VFFLR1),</div><div class='ctx'> 				  otx2_pf_flr_intr_handler, 0, irq_name, pf);</div><div class='hunk'>@@ -292,8 +296,8 @@ static int otx2_pf_flr_init(struct otx2_nic *pf, int num_vfs)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void otx2_queue_vf_work(struct mbox *mw, struct workqueue_struct *mbox_wq,</div><div class='del'>-			       int first, int mdevs, u64 intr)</div><div class='add'>+void otx2_queue_vf_work(struct mbox *mw, struct workqueue_struct *mbox_wq,</div><div class='add'>+			int first, int mdevs, u64 intr)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_mbox_dev *mdev;</div><div class='ctx'> 	struct otx2_mbox *mbox;</div><div class='hunk'>@@ -463,6 +467,9 @@ static void otx2_pfvf_mbox_handler(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	offset = ALIGN(sizeof(struct mbox_hdr), MBOX_MSG_ALIGN);</div><div class='ctx'> </div><div class='add'>+	trace_otx2_msg_status(pf-&gt;pdev, "PF-VF down queue handler(forwarding)",</div><div class='add'>+			      vf_mbox-&gt;num_msgs);</div><div class='add'>+</div><div class='ctx'> 	for (id = 0; id &lt; vf_mbox-&gt;num_msgs; id++) {</div><div class='ctx'> 		msg = (struct mbox_msghdr *)(mdev-&gt;mbase + mbox-&gt;rx_start +</div><div class='ctx'> 					     offset);</div><div class='hunk'>@@ -471,7 +478,7 @@ static void otx2_pfvf_mbox_handler(struct work_struct *work)</div><div class='ctx'> 			goto inval_msg;</div><div class='ctx'> </div><div class='ctx'> 		/* Set VF's number in each of the msg */</div><div class='del'>-		msg-&gt;pcifunc &amp;= RVU_PFVF_FUNC_MASK;</div><div class='add'>+		msg-&gt;pcifunc &amp;= ~RVU_PFVF_FUNC_MASK;</div><div class='ctx'> 		msg-&gt;pcifunc |= (vf_idx + 1) &amp; RVU_PFVF_FUNC_MASK;</div><div class='ctx'> 		offset = msg-&gt;next_msgoff;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -501,6 +508,9 @@ static void otx2_pfvf_mbox_up_handler(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	offset = mbox-&gt;rx_start + ALIGN(sizeof(struct mbox_hdr), MBOX_MSG_ALIGN);</div><div class='ctx'> </div><div class='add'>+	trace_otx2_msg_status(pf-&gt;pdev, "PF-VF up queue handler(response)",</div><div class='add'>+			      vf_mbox-&gt;up_num_msgs);</div><div class='add'>+</div><div class='ctx'> 	for (id = 0; id &lt; vf_mbox-&gt;up_num_msgs; id++) {</div><div class='ctx'> 		msg = mdev-&gt;mbase + offset;</div><div class='ctx'> </div><div class='hunk'>@@ -519,6 +529,7 @@ static void otx2_pfvf_mbox_up_handler(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 		switch (msg-&gt;id) {</div><div class='ctx'> 		case MBOX_MSG_CGX_LINK_EVENT:</div><div class='add'>+		case MBOX_MSG_REP_EVENT_UP_NOTIFY:</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			if (msg-&gt;rc)</div><div class='hunk'>@@ -536,7 +547,7 @@ end:</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t otx2_pfvf_mbox_intr_handler(int irq, void *pf_irq)</div><div class='add'>+irqreturn_t otx2_pfvf_mbox_intr_handler(int irq, void *pf_irq)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_nic *pf = (struct otx2_nic *)(pf_irq);</div><div class='ctx'> 	int vfs = pf-&gt;total_vfs;</div><div class='hunk'>@@ -565,6 +576,23 @@ static irqreturn_t otx2_pfvf_mbox_intr_handler(int irq, void *pf_irq)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void *cn20k_pfvf_mbox_alloc(struct otx2_nic *pf, int numvfs)</div><div class='add'>+{</div><div class='add'>+	struct qmem *mbox_addr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = qmem_alloc(&amp;pf-&gt;pdev-&gt;dev, &amp;mbox_addr, numvfs, MBOX_SIZE);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(pf-&gt;dev, "qmem alloc fail\n");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	otx2_write64(pf, RVU_PF_VF_MBOX_ADDR, (u64)mbox_addr-&gt;iova);</div><div class='add'>+	pf-&gt;pfvf_mbox_addr = mbox_addr;</div><div class='add'>+</div><div class='add'>+	return mbox_addr-&gt;base;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int otx2_pfvf_mbox_init(struct otx2_nic *pf, int numvfs)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *hwbase;</div><div class='hunk'>@@ -586,20 +614,27 @@ static int otx2_pfvf_mbox_init(struct otx2_nic *pf, int numvfs)</div><div class='ctx'> 	if (!pf-&gt;mbox_pfvf_wq)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	/* On CN10K platform, PF &lt;-&gt; VF mailbox region follows after</div><div class='del'>-	 * PF &lt;-&gt; AF mailbox region.</div><div class='add'>+	/* For CN20K, PF allocates mbox memory in DRAM and writes PF/VF</div><div class='add'>+	 * regions/offsets in RVU_PF_VF_MBOX_ADDR, the RVU_PFX_FUNC_PFAF_MBOX</div><div class='add'>+	 * gives the aliased address to access PF/VF mailbox regions.</div><div class='ctx'> 	 */</div><div class='del'>-	if (test_bit(CN10K_MBOX, &amp;pf-&gt;hw.cap_flag))</div><div class='del'>-		base = pci_resource_start(pf-&gt;pdev, PCI_MBOX_BAR_NUM) +</div><div class='del'>-		       MBOX_SIZE;</div><div class='del'>-	else</div><div class='del'>-		base = readq((void __iomem *)((u64)pf-&gt;reg_base +</div><div class='del'>-					      RVU_PF_VF_BAR4_ADDR));</div><div class='add'>+	if (is_cn20k(pf-&gt;pdev)) {</div><div class='add'>+		hwbase = (void __iomem *)cn20k_pfvf_mbox_alloc(pf, numvfs);</div><div class='add'>+	} else {</div><div class='add'>+		/* On CN10K platform, PF &lt;-&gt; VF mailbox region follows after</div><div class='add'>+		 * PF &lt;-&gt; AF mailbox region.</div><div class='add'>+		 */</div><div class='add'>+		if (test_bit(CN10K_MBOX, &amp;pf-&gt;hw.cap_flag))</div><div class='add'>+			base = pci_resource_start(pf-&gt;pdev, PCI_MBOX_BAR_NUM) +</div><div class='add'>+						  MBOX_SIZE;</div><div class='add'>+		else</div><div class='add'>+			base = readq(pf-&gt;reg_base + RVU_PF_VF_BAR4_ADDR);</div><div class='ctx'> </div><div class='del'>-	hwbase = ioremap_wc(base, MBOX_SIZE * pf-&gt;total_vfs);</div><div class='del'>-	if (!hwbase) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto free_wq;</div><div class='add'>+		hwbase = ioremap_wc(base, MBOX_SIZE * pf-&gt;total_vfs);</div><div class='add'>+		if (!hwbase) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_wq;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mbox = &amp;pf-&gt;mbox_pfvf[0];</div><div class='hunk'>@@ -623,7 +658,7 @@ static int otx2_pfvf_mbox_init(struct otx2_nic *pf, int numvfs)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> free_iomem:</div><div class='del'>-	if (hwbase)</div><div class='add'>+	if (hwbase &amp;&amp; !(is_cn20k(pf-&gt;pdev)))</div><div class='ctx'> 		iounmap(hwbase);</div><div class='ctx'> free_wq:</div><div class='ctx'> 	destroy_workqueue(pf-&gt;mbox_pfvf_wq);</div><div class='hunk'>@@ -642,8 +677,10 @@ static void otx2_pfvf_mbox_destroy(struct otx2_nic *pf)</div><div class='ctx'> 		pf-&gt;mbox_pfvf_wq = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mbox-&gt;mbox.hwbase)</div><div class='add'>+	if (mbox-&gt;mbox.hwbase &amp;&amp; !is_cn20k(pf-&gt;pdev))</div><div class='ctx'> 		iounmap(mbox-&gt;mbox.hwbase);</div><div class='add'>+	else</div><div class='add'>+		qmem_free(&amp;pf-&gt;pdev-&gt;dev, pf-&gt;pfvf_mbox_addr);</div><div class='ctx'> </div><div class='ctx'> 	otx2_mbox_destroy(&amp;mbox-&gt;mbox);</div><div class='ctx'> }</div><div class='hunk'>@@ -667,6 +704,9 @@ static void otx2_disable_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs)</div><div class='ctx'> {</div><div class='ctx'> 	int vector;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(pf-&gt;pdev))</div><div class='add'>+		return cn20k_disable_pfvf_mbox_intr(pf, numvfs);</div><div class='add'>+</div><div class='ctx'> 	/* Disable PF &lt;=&gt; VF mailbox IRQ */</div><div class='ctx'> 	otx2_write64(pf, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), ~0ull);</div><div class='ctx'> 	otx2_write64(pf, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(1), ~0ull);</div><div class='hunk'>@@ -688,11 +728,14 @@ static int otx2_register_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs)</div><div class='ctx'> 	char *irq_name;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(pf-&gt;pdev))</div><div class='add'>+		return cn20k_register_pfvf_mbox_intr(pf, numvfs);</div><div class='add'>+</div><div class='ctx'> 	/* Register MBOX0 interrupt handler */</div><div class='ctx'> 	irq_name = &amp;hw-&gt;irq_name[RVU_PF_INT_VEC_VFPF_MBOX0 * NAME_SIZE];</div><div class='ctx'> 	if (pf-&gt;pcifunc)</div><div class='ctx'> 		snprintf(irq_name, NAME_SIZE,</div><div class='del'>-			 "RVUPF%d_VF Mbox0", rvu_get_pf(pf-&gt;pcifunc));</div><div class='add'>+			 "RVUPF%d_VF Mbox0", rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc));</div><div class='ctx'> 	else</div><div class='ctx'> 		snprintf(irq_name, NAME_SIZE, "RVUPF_VF Mbox0");</div><div class='ctx'> 	err = request_irq(pci_irq_vector(pf-&gt;pdev, RVU_PF_INT_VEC_VFPF_MBOX0),</div><div class='hunk'>@@ -708,7 +751,8 @@ static int otx2_register_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs)</div><div class='ctx'> 		irq_name = &amp;hw-&gt;irq_name[RVU_PF_INT_VEC_VFPF_MBOX1 * NAME_SIZE];</div><div class='ctx'> 		if (pf-&gt;pcifunc)</div><div class='ctx'> 			snprintf(irq_name, NAME_SIZE,</div><div class='del'>-				 "RVUPF%d_VF Mbox1", rvu_get_pf(pf-&gt;pcifunc));</div><div class='add'>+				 "RVUPF%d_VF Mbox1",</div><div class='add'>+				 rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc));</div><div class='ctx'> 		else</div><div class='ctx'> 			snprintf(irq_name, NAME_SIZE, "RVUPF_VF Mbox1");</div><div class='ctx'> 		err = request_irq(pci_irq_vector(pf-&gt;pdev,</div><div class='hunk'>@@ -816,6 +860,9 @@ static void otx2_pfaf_mbox_handler(struct work_struct *work)</div><div class='ctx'> 	offset = mbox-&gt;rx_start + ALIGN(sizeof(*rsp_hdr), MBOX_MSG_ALIGN);</div><div class='ctx'> 	pf = af_mbox-&gt;pfvf;</div><div class='ctx'> </div><div class='add'>+	trace_otx2_msg_status(pf-&gt;pdev, "PF-AF down queue handler(response)",</div><div class='add'>+			      num_msgs);</div><div class='add'>+</div><div class='ctx'> 	for (id = 0; id &lt; num_msgs; id++) {</div><div class='ctx'> 		msg = (struct mbox_msghdr *)(mdev-&gt;mbase + offset);</div><div class='ctx'> 		otx2_process_pfaf_mbox_msg(pf, msg);</div><div class='hunk'>@@ -832,6 +879,9 @@ static void otx2_handle_link_event(struct otx2_nic *pf)</div><div class='ctx'> 	struct cgx_link_user_info *linfo = &amp;pf-&gt;linfo;</div><div class='ctx'> 	struct net_device *netdev = pf-&gt;netdev;</div><div class='ctx'> </div><div class='add'>+	if (pf-&gt;flags &amp; OTX2_FLAG_PORT_UP)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	pr_info("%s NIC Link is %s %d Mbps %s duplex\n", netdev-&gt;name,</div><div class='ctx'> 		linfo-&gt;link_up ? "UP" : "DOWN", linfo-&gt;speed,</div><div class='ctx'> 		linfo-&gt;full_duplex ? "Full" : "Half");</div><div class='hunk'>@@ -844,6 +894,35 @@ static void otx2_handle_link_event(struct otx2_nic *pf)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int otx2_mbox_up_handler_rep_event_up_notify(struct otx2_nic *pf,</div><div class='add'>+						    struct rep_event *info,</div><div class='add'>+						    struct msg_rsp *rsp)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = pf-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	if (info-&gt;event == RVU_EVENT_MTU_CHANGE) {</div><div class='add'>+		netdev-&gt;mtu = info-&gt;evt_data.mtu;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (info-&gt;event == RVU_EVENT_PORT_STATE) {</div><div class='add'>+		if (info-&gt;evt_data.port_state) {</div><div class='add'>+			pf-&gt;flags |= OTX2_FLAG_PORT_UP;</div><div class='add'>+			netif_carrier_on(netdev);</div><div class='add'>+			netif_tx_start_all_queues(netdev);</div><div class='add'>+		} else {</div><div class='add'>+			pf-&gt;flags &amp;= ~OTX2_FLAG_PORT_UP;</div><div class='add'>+			netif_tx_stop_all_queues(netdev);</div><div class='add'>+			netif_carrier_off(netdev);</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+#ifdef CONFIG_RVU_ESWITCH</div><div class='add'>+	rvu_event_up_notify(pf, info);</div><div class='add'>+#endif</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int otx2_mbox_up_handler_mcs_intr_notify(struct otx2_nic *pf,</div><div class='ctx'> 					 struct mcs_intr_info *event,</div><div class='ctx'> 					 struct msg_rsp *rsp)</div><div class='hunk'>@@ -913,6 +992,7 @@ static int otx2_process_mbox_msg_up(struct otx2_nic *pf,</div><div class='ctx'> 	}</div><div class='ctx'> MBOX_UP_CGX_MESSAGES</div><div class='ctx'> MBOX_UP_MCS_MESSAGES</div><div class='add'>+MBOX_UP_REP_MESSAGES</div><div class='ctx'> #undef M</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -938,6 +1018,9 @@ static void otx2_pfaf_mbox_up_handler(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	offset = mbox-&gt;rx_start + ALIGN(sizeof(*rsp_hdr), MBOX_MSG_ALIGN);</div><div class='ctx'> </div><div class='add'>+	trace_otx2_msg_status(pf-&gt;pdev, "PF-AF up queue handler(notification)",</div><div class='add'>+			      num_msgs);</div><div class='add'>+</div><div class='ctx'> 	for (id = 0; id &lt; num_msgs; id++) {</div><div class='ctx'> 		msg = (struct mbox_msghdr *)(mdev-&gt;mbase + offset);</div><div class='ctx'> </div><div class='hunk'>@@ -958,7 +1041,7 @@ static void otx2_pfaf_mbox_up_handler(struct work_struct *work)</div><div class='ctx'> 	otx2_mbox_msg_send(mbox, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t otx2_pfaf_mbox_intr_handler(int irq, void *pf_irq)</div><div class='add'>+irqreturn_t otx2_pfaf_mbox_intr_handler(int irq, void *pf_irq)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_nic *pf = (struct otx2_nic *)pf_irq;</div><div class='ctx'> 	struct mbox *mw = &amp;pf-&gt;mbox;</div><div class='hunk'>@@ -987,6 +1070,9 @@ static irqreturn_t otx2_pfaf_mbox_intr_handler(int irq, void *pf_irq)</div><div class='ctx'> </div><div class='ctx'> 		trace_otx2_msg_interrupt(pf-&gt;pdev, "UP message from AF to PF",</div><div class='ctx'> 					 BIT_ULL(0));</div><div class='add'>+</div><div class='add'>+		trace_otx2_msg_status(pf-&gt;pdev, "PF-AF up work queued(interrupt)",</div><div class='add'>+				      hdr-&gt;num_msgs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mbox_data &amp; MBOX_DOWN_MSG) {</div><div class='hunk'>@@ -1003,6 +1089,9 @@ static irqreturn_t otx2_pfaf_mbox_intr_handler(int irq, void *pf_irq)</div><div class='ctx'> </div><div class='ctx'> 		trace_otx2_msg_interrupt(pf-&gt;pdev, "DOWN reply from AF to PF",</div><div class='ctx'> 					 BIT_ULL(0));</div><div class='add'>+</div><div class='add'>+		trace_otx2_msg_status(pf-&gt;pdev, "PF-AF down work queued(interrupt)",</div><div class='add'>+				      hdr-&gt;num_msgs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='hunk'>@@ -1010,12 +1099,21 @@ static irqreturn_t otx2_pfaf_mbox_intr_handler(int irq, void *pf_irq)</div><div class='ctx'> </div><div class='ctx'> void otx2_disable_mbox_intr(struct otx2_nic *pf)</div><div class='ctx'> {</div><div class='del'>-	int vector = pci_irq_vector(pf-&gt;pdev, RVU_PF_INT_VEC_AFPF_MBOX);</div><div class='add'>+	int vector;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable AF =&gt; PF mailbox IRQ */</div><div class='del'>-	otx2_write64(pf, RVU_PF_INT_ENA_W1C, BIT_ULL(0));</div><div class='add'>+	if (!is_cn20k(pf-&gt;pdev)) {</div><div class='add'>+		vector = pci_irq_vector(pf-&gt;pdev, RVU_PF_INT_VEC_AFPF_MBOX);</div><div class='add'>+		otx2_write64(pf, RVU_PF_INT_ENA_W1C, BIT_ULL(0));</div><div class='add'>+	} else {</div><div class='add'>+		vector = pci_irq_vector(pf-&gt;pdev,</div><div class='add'>+					RVU_MBOX_PF_INT_VEC_AFPF_MBOX);</div><div class='add'>+		otx2_write64(pf, RVU_PF_INT_ENA_W1C,</div><div class='add'>+			     BIT_ULL(0) | BIT_ULL(1));</div><div class='add'>+	}</div><div class='ctx'> 	free_irq(vector, pf);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_disable_mbox_intr);</div><div class='ctx'> </div><div class='ctx'> int otx2_register_mbox_intr(struct otx2_nic *pf, bool probe_af)</div><div class='ctx'> {</div><div class='hunk'>@@ -1025,10 +1123,24 @@ int otx2_register_mbox_intr(struct otx2_nic *pf, bool probe_af)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* Register mailbox interrupt handler */</div><div class='del'>-	irq_name = &amp;hw-&gt;irq_name[RVU_PF_INT_VEC_AFPF_MBOX * NAME_SIZE];</div><div class='del'>-	snprintf(irq_name, NAME_SIZE, "RVUPFAF Mbox");</div><div class='del'>-	err = request_irq(pci_irq_vector(pf-&gt;pdev, RVU_PF_INT_VEC_AFPF_MBOX),</div><div class='del'>-			  otx2_pfaf_mbox_intr_handler, 0, irq_name, pf);</div><div class='add'>+	if (!is_cn20k(pf-&gt;pdev)) {</div><div class='add'>+		irq_name = &amp;hw-&gt;irq_name[RVU_PF_INT_VEC_AFPF_MBOX * NAME_SIZE];</div><div class='add'>+		snprintf(irq_name, NAME_SIZE, "RVUPF%d AFPF Mbox",</div><div class='add'>+			 rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc));</div><div class='add'>+		err = request_irq(pci_irq_vector</div><div class='add'>+				  (pf-&gt;pdev, RVU_PF_INT_VEC_AFPF_MBOX),</div><div class='add'>+				  pf-&gt;hw_ops-&gt;pfaf_mbox_intr_handler,</div><div class='add'>+				  0, irq_name, pf);</div><div class='add'>+	} else {</div><div class='add'>+		irq_name = &amp;hw-&gt;irq_name[RVU_MBOX_PF_INT_VEC_AFPF_MBOX *</div><div class='add'>+						NAME_SIZE];</div><div class='add'>+		snprintf(irq_name, NAME_SIZE, "RVUPF%d AFPF Mbox",</div><div class='add'>+			 rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc));</div><div class='add'>+		err = request_irq(pci_irq_vector</div><div class='add'>+				  (pf-&gt;pdev, RVU_MBOX_PF_INT_VEC_AFPF_MBOX),</div><div class='add'>+				  pf-&gt;hw_ops-&gt;pfaf_mbox_intr_handler,</div><div class='add'>+				  0, irq_name, pf);</div><div class='add'>+	}</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(pf-&gt;dev,</div><div class='ctx'> 			"RVUPF: IRQ registration failed for PFAF mbox irq\n");</div><div class='hunk'>@@ -1038,8 +1150,14 @@ int otx2_register_mbox_intr(struct otx2_nic *pf, bool probe_af)</div><div class='ctx'> 	/* Enable mailbox interrupt for msgs coming from AF.</div><div class='ctx'> 	 * First clear to avoid spurious interrupts, if any.</div><div class='ctx'> 	 */</div><div class='del'>-	otx2_write64(pf, RVU_PF_INT, BIT_ULL(0));</div><div class='del'>-	otx2_write64(pf, RVU_PF_INT_ENA_W1S, BIT_ULL(0));</div><div class='add'>+	if (!is_cn20k(pf-&gt;pdev)) {</div><div class='add'>+		otx2_write64(pf, RVU_PF_INT, BIT_ULL(0));</div><div class='add'>+		otx2_write64(pf, RVU_PF_INT_ENA_W1S, BIT_ULL(0));</div><div class='add'>+	} else {</div><div class='add'>+		otx2_write64(pf, RVU_PF_INT, BIT_ULL(0) | BIT_ULL(1));</div><div class='add'>+		otx2_write64(pf, RVU_PF_INT_ENA_W1S, BIT_ULL(0) |</div><div class='add'>+			     BIT_ULL(1));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!probe_af)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1070,12 +1188,13 @@ void otx2_pfaf_mbox_destroy(struct otx2_nic *pf)</div><div class='ctx'> 		pf-&gt;mbox_wq = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mbox-&gt;mbox.hwbase)</div><div class='add'>+	if (mbox-&gt;mbox.hwbase &amp;&amp; !is_cn20k(pf-&gt;pdev))</div><div class='ctx'> 		iounmap((void __iomem *)mbox-&gt;mbox.hwbase);</div><div class='ctx'> </div><div class='ctx'> 	otx2_mbox_destroy(&amp;mbox-&gt;mbox);</div><div class='ctx'> 	otx2_mbox_destroy(&amp;mbox-&gt;mbox_up);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_pfaf_mbox_destroy);</div><div class='ctx'> </div><div class='ctx'> int otx2_pfaf_mbox_init(struct otx2_nic *pf)</div><div class='ctx'> {</div><div class='hunk'>@@ -1089,12 +1208,20 @@ int otx2_pfaf_mbox_init(struct otx2_nic *pf)</div><div class='ctx'> 	if (!pf-&gt;mbox_wq)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	/* Mailbox is a reserved memory (in RAM) region shared between</div><div class='del'>-	 * admin function (i.e AF) and this PF, shouldn't be mapped as</div><div class='del'>-	 * device memory to allow unaligned accesses.</div><div class='add'>+	/* For CN20K, AF allocates mbox memory in DRAM and writes PF</div><div class='add'>+	 * regions/offsets in RVU_MBOX_AF_PFX_ADDR, the RVU_PFX_FUNC_PFAF_MBOX</div><div class='add'>+	 * gives the aliased address to access AF/PF mailbox regions.</div><div class='ctx'> 	 */</div><div class='del'>-	hwbase = ioremap_wc(pci_resource_start(pf-&gt;pdev, PCI_MBOX_BAR_NUM),</div><div class='del'>-			    MBOX_SIZE);</div><div class='add'>+	if (is_cn20k(pf-&gt;pdev))</div><div class='add'>+		hwbase = pf-&gt;reg_base + RVU_PFX_FUNC_PFAF_MBOX +</div><div class='add'>+			((u64)BLKADDR_MBOX &lt;&lt; RVU_FUNC_BLKADDR_SHIFT);</div><div class='add'>+	else</div><div class='add'>+		/* Mailbox is a reserved memory (in RAM) region shared between</div><div class='add'>+		 * admin function (i.e AF) and this PF, shouldn't be mapped as</div><div class='add'>+		 * device memory to allow unaligned accesses.</div><div class='add'>+		 */</div><div class='add'>+		hwbase = ioremap_wc(pci_resource_start</div><div class='add'>+				    (pf-&gt;pdev, PCI_MBOX_BAR_NUM), MBOX_SIZE);</div><div class='ctx'> 	if (!hwbase) {</div><div class='ctx'> 		dev_err(pf-&gt;dev, "Unable to map PFAF mailbox region\n");</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -1267,8 +1394,8 @@ static irqreturn_t otx2_q_intr_handler(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_nic *pf = data;</div><div class='ctx'> 	struct otx2_snd_queue *sq;</div><div class='del'>-	u64 val, *ptr;</div><div class='del'>-	u64 qidx = 0;</div><div class='add'>+	void __iomem *ptr;</div><div class='add'>+	u64 val, qidx = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* CQ */</div><div class='ctx'> 	for (qidx = 0; qidx &lt; pf-&gt;qset.cq_cnt; qidx++) {</div><div class='hunk'>@@ -1398,6 +1525,7 @@ irqreturn_t otx2_cq_intr_handler(int irq, void *cq_irq)</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_cq_intr_handler);</div><div class='ctx'> </div><div class='ctx'> void otx2_disable_napi(struct otx2_nic *pf)</div><div class='ctx'> {</div><div class='hunk'>@@ -1415,6 +1543,7 @@ void otx2_disable_napi(struct otx2_nic *pf)</div><div class='ctx'> 		netif_napi_del(&amp;cq_poll-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_disable_napi);</div><div class='ctx'> </div><div class='ctx'> static void otx2_free_cq_res(struct otx2_nic *pf)</div><div class='ctx'> {</div><div class='hunk'>@@ -1446,6 +1575,8 @@ static void otx2_free_sq_res(struct otx2_nic *pf)</div><div class='ctx'> 		if (!sq-&gt;sqe)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		qmem_free(pf-&gt;dev, sq-&gt;sqe);</div><div class='add'>+		qmem_free(pf-&gt;dev, sq-&gt;sqe_ring);</div><div class='add'>+		qmem_free(pf-&gt;dev, sq-&gt;cpt_resp);</div><div class='ctx'> 		qmem_free(pf-&gt;dev, sq-&gt;tso_hdrs);</div><div class='ctx'> 		kfree(sq-&gt;sg);</div><div class='ctx'> 		kfree(sq-&gt;sqb_ptrs);</div><div class='hunk'>@@ -1496,10 +1627,11 @@ int otx2_init_hw_resources(struct otx2_nic *pf)</div><div class='ctx'> 	hw-&gt;sqpool_cnt = otx2_get_total_tx_queues(pf);</div><div class='ctx'> 	hw-&gt;pool_cnt = hw-&gt;rqpool_cnt + hw-&gt;sqpool_cnt;</div><div class='ctx'> </div><div class='del'>-	/* Maximum hardware supported transmit length */</div><div class='del'>-	pf-&gt;tx_max_pktlen = pf-&gt;netdev-&gt;max_mtu + OTX2_ETH_HLEN;</div><div class='del'>-</div><div class='del'>-	pf-&gt;rbsize = otx2_get_rbuf_size(pf, pf-&gt;netdev-&gt;mtu);</div><div class='add'>+	if (!otx2_rep_dev(pf-&gt;pdev)) {</div><div class='add'>+		/* Maximum hardware supported transmit length */</div><div class='add'>+		pf-&gt;tx_max_pktlen = pf-&gt;netdev-&gt;max_mtu + OTX2_ETH_HLEN;</div><div class='add'>+		pf-&gt;rbsize = otx2_get_rbuf_size(pf, pf-&gt;netdev-&gt;mtu);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mbox-&gt;lock);</div><div class='ctx'> 	/* NPA init */</div><div class='hunk'>@@ -1512,6 +1644,9 @@ int otx2_init_hw_resources(struct otx2_nic *pf)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_npa_lf;</div><div class='ctx'> </div><div class='add'>+	/* Default disable backpressure on NIX-CPT */</div><div class='add'>+	otx2_nix_cpt_config_bp(pf, false);</div><div class='add'>+</div><div class='ctx'> 	/* Enable backpressure for CGX mapped PF/VFs */</div><div class='ctx'> 	if (!is_otx2_lbkvf(pf-&gt;pdev))</div><div class='ctx'> 		otx2_nix_config_bp(pf, true);</div><div class='hunk'>@@ -1552,10 +1687,15 @@ int otx2_init_hw_resources(struct otx2_nic *pf)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (lvl = 0; lvl &lt; NIX_TXSCH_LVL_CNT; lvl++) {</div><div class='del'>-		err = otx2_txschq_config(pf, lvl, 0, false);</div><div class='del'>-		if (err) {</div><div class='del'>-			mutex_unlock(&amp;mbox-&gt;lock);</div><div class='del'>-			goto err_free_nix_queues;</div><div class='add'>+		int idx;</div><div class='add'>+</div><div class='add'>+		for (idx = 0; idx &lt; pf-&gt;hw.txschq_cnt[lvl]; idx++) {</div><div class='add'>+			err = otx2_txschq_config(pf, lvl, idx, false);</div><div class='add'>+			if (err) {</div><div class='add'>+				dev_err(pf-&gt;dev, "Failed to config TXSCH\n");</div><div class='add'>+				mutex_unlock(&amp;mbox-&gt;lock);</div><div class='add'>+				goto err_free_nix_queues;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1604,6 +1744,7 @@ exit:</div><div class='ctx'> 	mutex_unlock(&amp;mbox-&gt;lock);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_init_hw_resources);</div><div class='ctx'> </div><div class='ctx'> void otx2_free_hw_resources(struct otx2_nic *pf)</div><div class='ctx'> {</div><div class='hunk'>@@ -1611,9 +1752,7 @@ void otx2_free_hw_resources(struct otx2_nic *pf)</div><div class='ctx'> 	struct nix_lf_free_req *free_req;</div><div class='ctx'> 	struct mbox *mbox = &amp;pf-&gt;mbox;</div><div class='ctx'> 	struct otx2_cq_queue *cq;</div><div class='del'>-	struct otx2_pool *pool;</div><div class='ctx'> 	struct msg_req *req;</div><div class='del'>-	int pool_id;</div><div class='ctx'> 	int qidx;</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure all SQE are processed */</div><div class='hunk'>@@ -1627,11 +1766,12 @@ void otx2_free_hw_resources(struct otx2_nic *pf)</div><div class='ctx'> 		otx2_pfc_txschq_stop(pf);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	otx2_clean_qos_queues(pf);</div><div class='add'>+	if (!otx2_rep_dev(pf-&gt;pdev))</div><div class='add'>+		otx2_clean_qos_queues(pf);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mbox-&gt;lock);</div><div class='ctx'> 	/* Disable backpressure */</div><div class='del'>-	if (!(pf-&gt;pcifunc &amp; RVU_PFVF_FUNC_MASK))</div><div class='add'>+	if (!is_otx2_lbkvf(pf-&gt;pdev))</div><div class='ctx'> 		otx2_nix_config_bp(pf, false);</div><div class='ctx'> 	mutex_unlock(&amp;mbox-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1653,17 +1793,11 @@ void otx2_free_hw_resources(struct otx2_nic *pf)</div><div class='ctx'> 	/* Free RQ buffer pointers*/</div><div class='ctx'> 	otx2_free_aura_ptr(pf, AURA_NIX_RQ);</div><div class='ctx'> </div><div class='del'>-	for (qidx = 0; qidx &lt; pf-&gt;hw.rx_queues; qidx++) {</div><div class='del'>-		pool_id = otx2_get_pool_idx(pf, AURA_NIX_RQ, qidx);</div><div class='del'>-		pool = &amp;pf-&gt;qset.pool[pool_id];</div><div class='del'>-		page_pool_destroy(pool-&gt;page_pool);</div><div class='del'>-		pool-&gt;page_pool = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	otx2_free_cq_res(pf);</div><div class='ctx'> </div><div class='ctx'> 	/* Free all ingress bandwidth profiles allocated */</div><div class='del'>-	cn10k_free_all_ipolicers(pf);</div><div class='add'>+	if (!otx2_rep_dev(pf-&gt;pdev))</div><div class='add'>+		cn10k_free_all_ipolicers(pf);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mbox-&gt;lock);</div><div class='ctx'> 	/* Reset NIX LF */</div><div class='hunk'>@@ -1691,6 +1825,7 @@ void otx2_free_hw_resources(struct otx2_nic *pf)</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;mbox-&gt;lock);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_free_hw_resources);</div><div class='ctx'> </div><div class='ctx'> static bool otx2_promisc_use_mce_list(struct otx2_nic *pfvf)</div><div class='ctx'> {</div><div class='hunk'>@@ -1784,6 +1919,7 @@ void otx2_free_queue_mem(struct otx2_qset *qset)</div><div class='ctx'> 	kfree(qset-&gt;napi);</div><div class='ctx'> 	qset-&gt;napi = NULL;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_free_queue_mem);</div><div class='ctx'> </div><div class='ctx'> int otx2_alloc_queue_mem(struct otx2_nic *pf)</div><div class='ctx'> {</div><div class='hunk'>@@ -1830,6 +1966,7 @@ err_free_mem:</div><div class='ctx'> 	otx2_free_queue_mem(qset);</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_alloc_queue_mem);</div><div class='ctx'> </div><div class='ctx'> int otx2_open(struct net_device *netdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -1906,7 +2043,7 @@ int otx2_open(struct net_device *netdev)</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(pf-&gt;dev,</div><div class='ctx'> 			"RVUPF%d: IRQ registration failed for QERR\n",</div><div class='del'>-			rvu_get_pf(pf-&gt;pcifunc));</div><div class='add'>+			rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc));</div><div class='ctx'> 		goto err_disable_napi;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1924,7 +2061,7 @@ int otx2_open(struct net_device *netdev)</div><div class='ctx'> 		if (name_len &gt;= NAME_SIZE) {</div><div class='ctx'> 			dev_err(pf-&gt;dev,</div><div class='ctx'> 				"RVUPF%d: IRQ registration failed for CQ%d, irq name is too long\n",</div><div class='del'>-				rvu_get_pf(pf-&gt;pcifunc), qidx);</div><div class='add'>+				rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc), qidx);</div><div class='ctx'> 			err = -EINVAL;</div><div class='ctx'> 			goto err_free_cints;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1935,7 +2072,7 @@ int otx2_open(struct net_device *netdev)</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			dev_err(pf-&gt;dev,</div><div class='ctx'> 				"RVUPF%d: IRQ registration failed for CQ%d\n",</div><div class='del'>-				rvu_get_pf(pf-&gt;pcifunc), qidx);</div><div class='add'>+				rvu_get_pf(pf-&gt;pdev, pf-&gt;pcifunc), qidx);</div><div class='ctx'> 			goto err_free_cints;</div><div class='ctx'> 		}</div><div class='ctx'> 		vec++;</div><div class='hunk'>@@ -1963,6 +2100,7 @@ int otx2_open(struct net_device *netdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pf-&gt;flags &amp;= ~OTX2_FLAG_INTF_DOWN;</div><div class='add'>+	pf-&gt;flags &amp;= ~OTX2_FLAG_PORT_UP;</div><div class='ctx'> 	/* 'intf_down' may be checked on any cpu */</div><div class='ctx'> 	smp_wmb();</div><div class='ctx'> </div><div class='hunk'>@@ -2020,7 +2158,6 @@ int otx2_stop(struct net_device *netdev)</div><div class='ctx'> 	struct otx2_nic *pf = netdev_priv(netdev);</div><div class='ctx'> 	struct otx2_cq_poll *cq_poll = NULL;</div><div class='ctx'> 	struct otx2_qset *qset = &amp;pf-&gt;qset;</div><div class='del'>-	struct otx2_rss_info *rss;</div><div class='ctx'> 	int qidx, vec, wrk;</div><div class='ctx'> </div><div class='ctx'> 	/* If the DOWN flag is set resources are already freed */</div><div class='hunk'>@@ -2038,10 +2175,7 @@ int otx2_stop(struct net_device *netdev)</div><div class='ctx'> 	otx2_rxtx_enable(pf, false);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear RSS enable flag */</div><div class='del'>-	rss = &amp;pf-&gt;hw.rss_info;</div><div class='del'>-	rss-&gt;enable = false;</div><div class='del'>-	if (!netif_is_rxfh_configured(netdev))</div><div class='del'>-		kfree(rss-&gt;rss_ctx[DEFAULT_RSS_CONTEXT_GROUP]);</div><div class='add'>+	pf-&gt;hw.rss_info.enable = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Cleanup Queue IRQ */</div><div class='ctx'> 	vec = pci_irq_vector(pf-&gt;pdev,</div><div class='hunk'>@@ -2086,6 +2220,7 @@ static netdev_tx_t otx2_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_nic *pf = netdev_priv(netdev);</div><div class='ctx'> 	int qidx = skb_get_queue_mapping(skb);</div><div class='add'>+	struct otx2_dev_stats *dev_stats;</div><div class='ctx'> 	struct otx2_snd_queue *sq;</div><div class='ctx'> 	struct netdev_queue *txq;</div><div class='ctx'> 	int sq_idx;</div><div class='hunk'>@@ -2098,6 +2233,8 @@ static netdev_tx_t otx2_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	/* Check for minimum and maximum packet length */</div><div class='ctx'> 	if (skb-&gt;len &lt;= ETH_HLEN ||</div><div class='ctx'> 	    (!skb_shinfo(skb)-&gt;gso_size &amp;&amp; skb-&gt;len &gt; pf-&gt;tx_max_pktlen)) {</div><div class='add'>+		dev_stats = &amp;pf-&gt;hw.dev_stats;</div><div class='add'>+		atomic_long_inc(&amp;dev_stats-&gt;tx_discards);</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2105,7 +2242,7 @@ static netdev_tx_t otx2_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	sq = &amp;pf-&gt;qset.sq[sq_idx];</div><div class='ctx'> 	txq = netdev_get_tx_queue(netdev, qidx);</div><div class='ctx'> </div><div class='del'>-	if (!otx2_sq_append_skb(netdev, sq, skb, qidx)) {</div><div class='add'>+	if (!otx2_sq_append_skb(pf, txq, sq, skb, qidx)) {</div><div class='ctx'> 		netif_tx_stop_queue(txq);</div><div class='ctx'> </div><div class='ctx'> 		/* Check again, incase SQBs got freed up */</div><div class='hunk'>@@ -2222,6 +2359,10 @@ static int otx2_set_features(struct net_device *netdev,</div><div class='ctx'> 		return otx2_enable_rxvlan(pf,</div><div class='ctx'> 					  features &amp; NETIF_F_HW_VLAN_CTAG_RX);</div><div class='ctx'> </div><div class='add'>+	if (changed &amp; NETIF_F_HW_ESP)</div><div class='add'>+		return cn10k_ipsec_ethtool_init(netdev,</div><div class='add'>+						features &amp; NETIF_F_HW_ESP);</div><div class='add'>+</div><div class='ctx'> 	return otx2_handle_ntuple_tc_features(netdev, features);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2304,18 +2445,26 @@ static int otx2_config_hw_tx_tstamp(struct otx2_nic *pfvf, bool enable)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int otx2_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+int otx2_config_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct otx2_nic *pfvf = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	*config = pfvf-&gt;tstamp;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(otx2_config_hwtstamp_get);</div><div class='add'>+</div><div class='add'>+int otx2_config_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_nic *pfvf = netdev_priv(netdev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> </div><div class='ctx'> 	if (!pfvf-&gt;ptp)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 		if (pfvf-&gt;flags &amp; OTX2_FLAG_PTP_ONESTEP_SYNC)</div><div class='ctx'> 			pfvf-&gt;flags &amp;= ~OTX2_FLAG_PTP_ONESTEP_SYNC;</div><div class='hunk'>@@ -2324,8 +2473,11 @@ int otx2_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 		otx2_config_hw_tx_tstamp(pfvf, false);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_TX_ONESTEP_SYNC:</div><div class='del'>-		if (!test_bit(CN10K_PTP_ONESTEP, &amp;pfvf-&gt;hw.cap_flag))</div><div class='add'>+		if (!test_bit(CN10K_PTP_ONESTEP, &amp;pfvf-&gt;hw.cap_flag)) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "One-step time stamping is not supported");</div><div class='ctx'> 			return -ERANGE;</div><div class='add'>+		}</div><div class='ctx'> 		pfvf-&gt;flags |= OTX2_FLAG_PTP_ONESTEP_SYNC;</div><div class='ctx'> 		schedule_delayed_work(&amp;pfvf-&gt;ptp-&gt;synctstamp_work,</div><div class='ctx'> 				      msecs_to_jiffies(500));</div><div class='hunk'>@@ -2337,7 +2489,7 @@ int otx2_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		otx2_config_hw_rx_tstamp(pfvf, false);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2356,35 +2508,17 @@ int otx2_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 		otx2_config_hw_rx_tstamp(pfvf, true);</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memcpy(&amp;pfvf-&gt;tstamp, &amp;config, sizeof(config));</div><div class='del'>-</div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config,</div><div class='del'>-			    sizeof(config)) ? -EFAULT : 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(otx2_config_hwtstamp);</div><div class='add'>+	pfvf-&gt;tstamp = *config;</div><div class='ctx'> </div><div class='del'>-int otx2_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct otx2_nic *pfvf = netdev_priv(netdev);</div><div class='del'>-	struct hwtstamp_config *cfg = &amp;pfvf-&gt;tstamp;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return otx2_config_hwtstamp(netdev, req);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return copy_to_user(req-&gt;ifr_data, cfg,</div><div class='del'>-				    sizeof(*cfg)) ? -EFAULT : 0;</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(otx2_ioctl);</div><div class='add'>+EXPORT_SYMBOL(otx2_config_hwtstamp_set);</div><div class='ctx'> </div><div class='ctx'> static int otx2_do_set_vf_mac(struct otx2_nic *pf, int vf, const u8 *mac)</div><div class='ctx'> {</div><div class='hunk'>@@ -2630,7 +2764,6 @@ static int otx2_get_vf_config(struct net_device *netdev, int vf,</div><div class='ctx'> static int otx2_xdp_xmit_tx(struct otx2_nic *pf, struct xdp_frame *xdpf,</div><div class='ctx'> 			    int qidx)</div><div class='ctx'> {</div><div class='del'>-	struct page *page;</div><div class='ctx'> 	u64 dma_addr;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2640,11 +2773,11 @@ static int otx2_xdp_xmit_tx(struct otx2_nic *pf, struct xdp_frame *xdpf,</div><div class='ctx'> 	if (dma_mapping_error(pf-&gt;dev, dma_addr))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	err = otx2_xdp_sq_append_pkt(pf, dma_addr, xdpf-&gt;len, qidx);</div><div class='add'>+	err = otx2_xdp_sq_append_pkt(pf, xdpf, dma_addr, xdpf-&gt;len,</div><div class='add'>+				     qidx, OTX2_XDP_REDIRECT);</div><div class='ctx'> 	if (!err) {</div><div class='ctx'> 		otx2_dma_unmap_page(pf, dma_addr, xdpf-&gt;len, DMA_TO_DEVICE);</div><div class='del'>-		page = virt_to_page(xdpf-&gt;data);</div><div class='del'>-		put_page(page);</div><div class='add'>+		xdp_return_frame(xdpf);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2728,6 +2861,8 @@ static int otx2_xdp(struct net_device *netdev, struct netdev_bpf *xdp)</div><div class='ctx'> 	switch (xdp-&gt;command) {</div><div class='ctx'> 	case XDP_SETUP_PROG:</div><div class='ctx'> 		return otx2_xdp_setup(pf, xdp-&gt;prog);</div><div class='add'>+	case XDP_SETUP_XSK_POOL:</div><div class='add'>+		return otx2_xsk_pool_setup(pf, xdp-&gt;xsk.pool, xdp-&gt;xsk.queue_id);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2800,14 +2935,16 @@ static const struct net_device_ops otx2_netdev_ops = {</div><div class='ctx'> 	.ndo_set_features	= otx2_set_features,</div><div class='ctx'> 	.ndo_tx_timeout		= otx2_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats64	= otx2_get_stats64,</div><div class='del'>-	.ndo_eth_ioctl		= otx2_ioctl,</div><div class='ctx'> 	.ndo_set_vf_mac		= otx2_set_vf_mac,</div><div class='ctx'> 	.ndo_set_vf_vlan	= otx2_set_vf_vlan,</div><div class='ctx'> 	.ndo_get_vf_config	= otx2_get_vf_config,</div><div class='ctx'> 	.ndo_bpf		= otx2_xdp,</div><div class='add'>+	.ndo_xsk_wakeup		= otx2_xsk_wakeup,</div><div class='ctx'> 	.ndo_xdp_xmit           = otx2_xdp_xmit,</div><div class='ctx'> 	.ndo_setup_tc		= otx2_setup_tc,</div><div class='ctx'> 	.ndo_set_vf_trust	= otx2_ndo_set_vf_trust,</div><div class='add'>+	.ndo_hwtstamp_get	= otx2_config_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= otx2_config_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int otx2_wq_init(struct otx2_nic *pf)</div><div class='hunk'>@@ -2861,6 +2998,7 @@ int otx2_realloc_msix_vectors(struct otx2_nic *pf)</div><div class='ctx'> </div><div class='ctx'> 	return otx2_register_mbox_intr(pf, false);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_realloc_msix_vectors);</div><div class='ctx'> </div><div class='ctx'> static int otx2_sriov_vfcfg_init(struct otx2_nic *pf)</div><div class='ctx'> {</div><div class='hunk'>@@ -2924,8 +3062,13 @@ int otx2_init_rsrc(struct pci_dev *pdev, struct otx2_nic *pf)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = pci_alloc_irq_vectors(hw-&gt;pdev, RVU_PF_INT_VEC_CNT,</div><div class='del'>-				    RVU_PF_INT_VEC_CNT, PCI_IRQ_MSIX);</div><div class='add'>+	if (!is_cn20k(pf-&gt;pdev))</div><div class='add'>+		err = pci_alloc_irq_vectors(hw-&gt;pdev, RVU_PF_INT_VEC_CNT,</div><div class='add'>+					    RVU_PF_INT_VEC_CNT, PCI_IRQ_MSIX);</div><div class='add'>+	else</div><div class='add'>+		err = pci_alloc_irq_vectors(hw-&gt;pdev, RVU_MBOX_PF_INT_VEC_CNT,</div><div class='add'>+					    RVU_MBOX_PF_INT_VEC_CNT,</div><div class='add'>+					    PCI_IRQ_MSIX);</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		dev_err(dev, "%s: Failed to alloc %d IRQ vectors\n",</div><div class='ctx'> 			__func__, num_vec);</div><div class='hunk'>@@ -2934,6 +3077,11 @@ int otx2_init_rsrc(struct pci_dev *pdev, struct otx2_nic *pf)</div><div class='ctx'> </div><div class='ctx'> 	otx2_setup_dev_hw_settings(pf);</div><div class='ctx'> </div><div class='add'>+	if (is_cn20k(pf-&gt;pdev))</div><div class='add'>+		cn20k_init(pf);</div><div class='add'>+	else</div><div class='add'>+		otx2_init_hw_ops(pf);</div><div class='add'>+</div><div class='ctx'> 	/* Init PF &lt;=&gt; AF mailbox stuff */</div><div class='ctx'> 	err = otx2_pfaf_mbox_init(pf);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -2976,6 +3124,7 @@ err_free_irq_vectors:</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_init_rsrc);</div><div class='ctx'> </div><div class='ctx'> static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> {</div><div class='hunk'>@@ -2991,7 +3140,7 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = pci_request_regions(pdev, DRV_NAME);</div><div class='add'>+	err = pcim_request_all_regions(pdev, DRV_NAME);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "PCI request regions failed 0x%x\n", err);</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -3000,7 +3149,7 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "DMA mask config failed, abort\n");</div><div class='del'>-		goto err_release_regions;</div><div class='add'>+		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='hunk'>@@ -3010,10 +3159,8 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	qos_txqs = min_t(int, qcount, OTX2_QOS_MAX_LEAF_NODES);</div><div class='ctx'> </div><div class='ctx'> 	netdev = alloc_etherdev_mqs(sizeof(*pf), qcount + qos_txqs, qcount);</div><div class='del'>-	if (!netdev) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_release_regions;</div><div class='del'>-	}</div><div class='add'>+	if (!netdev)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, netdev);</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='hunk'>@@ -3071,6 +3218,8 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_ptp_destroy;</div><div class='ctx'> </div><div class='add'>+	otx2_set_hw_capabilities(pf);</div><div class='add'>+</div><div class='ctx'> 	err = cn10k_mcs_init(pf);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_del_mcam_entries;</div><div class='hunk'>@@ -3109,10 +3258,14 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	/* reset CGX/RPM MAC stats */</div><div class='ctx'> 	otx2_reset_mac_stats(pf);</div><div class='ctx'> </div><div class='add'>+	err = cn10k_ipsec_init(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_mcs_free;</div><div class='add'>+</div><div class='ctx'> 	err = register_netdev(netdev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Failed to register netdevice\n");</div><div class='del'>-		goto err_mcs_free;</div><div class='add'>+		goto err_ipsec_clean;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = otx2_wq_init(pf);</div><div class='hunk'>@@ -3137,22 +3290,36 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	/* Enable link notifications */</div><div class='ctx'> 	otx2_cgx_config_linkevents(pf, true);</div><div class='ctx'> </div><div class='add'>+	pf-&gt;af_xdp_zc_qidx = bitmap_zalloc(qcount, GFP_KERNEL);</div><div class='add'>+	if (!pf-&gt;af_xdp_zc_qidx) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_sriov_cleannup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DCB</div><div class='ctx'> 	err = otx2_dcbnl_set_ops(netdev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_pf_sriov_init;</div><div class='add'>+		goto err_free_zc_bmap;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	otx2_qos_init(pf, qos_txqs);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DCB</div><div class='add'>+err_free_zc_bmap:</div><div class='add'>+	bitmap_free(pf-&gt;af_xdp_zc_qidx);</div><div class='add'>+#endif</div><div class='add'>+err_sriov_cleannup:</div><div class='add'>+	otx2_sriov_vfcfg_cleanup(pf);</div><div class='ctx'> err_pf_sriov_init:</div><div class='ctx'> 	otx2_shutdown_tc(pf);</div><div class='ctx'> err_mcam_flow_del:</div><div class='ctx'> 	otx2_mcam_flow_del(pf);</div><div class='ctx'> err_unreg_netdev:</div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='add'>+err_ipsec_clean:</div><div class='add'>+	cn10k_ipsec_clean(pf);</div><div class='ctx'> err_mcs_free:</div><div class='ctx'> 	cn10k_mcs_free(pf);</div><div class='ctx'> err_del_mcam_entries:</div><div class='hunk'>@@ -3171,8 +3338,6 @@ err_detach_rsrc:</div><div class='ctx'> err_free_netdev:</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	free_netdev(netdev);</div><div class='del'>-err_release_regions:</div><div class='del'>-	pci_release_regions(pdev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3214,6 +3379,7 @@ static void otx2_vf_link_event_task(struct work_struct *work)</div><div class='ctx'> 	req = (struct cgx_link_info_msg *)msghdr;</div><div class='ctx'> 	req-&gt;hdr.id = MBOX_MSG_CGX_LINK_EVENT;</div><div class='ctx'> 	req-&gt;hdr.sig = OTX2_MBOX_REQ_SIG;</div><div class='add'>+	req-&gt;hdr.pcifunc = pf-&gt;pcifunc;</div><div class='ctx'> 	memcpy(&amp;req-&gt;link_info, &amp;pf-&gt;linfo, sizeof(req-&gt;link_info));</div><div class='ctx'> </div><div class='ctx'> 	otx2_mbox_wait_for_zero(&amp;pf-&gt;mbox_pfvf[0].mbox_up, vf_idx);</div><div class='hunk'>@@ -3350,6 +3516,7 @@ static void otx2_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	otx2_unregister_dl(pf);</div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='add'>+	cn10k_ipsec_clean(pf);</div><div class='ctx'> 	cn10k_mcs_free(pf);</div><div class='ctx'> 	otx2_sriov_disable(pf-&gt;pdev);</div><div class='ctx'> 	otx2_sriov_vfcfg_cleanup(pf);</div><div class='hunk'>@@ -3369,10 +3536,9 @@ static void otx2_remove(struct pci_dev *pdev)</div><div class='ctx'> 	otx2_disable_mbox_intr(pf);</div><div class='ctx'> 	otx2_pfaf_mbox_destroy(pf);</div><div class='ctx'> 	pci_free_irq_vectors(pf-&gt;pdev);</div><div class='add'>+	bitmap_free(pf-&gt;af_xdp_zc_qidx);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	free_netdev(netdev);</div><div class='del'>-</div><div class='del'>-	pci_release_regions(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver otx2_pf_driver = {</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c<br/>index 63130ba37e9d..dedd586ed310 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c</a></div><div class='hunk'>@@ -193,7 +193,7 @@ static int ptp_pps_on(struct otx2_ptp *ptp, int on, u64 period)</div><div class='ctx'> 	return otx2_sync_mbox_msg(&amp;ptp-&gt;nic-&gt;mbox);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 ptp_cc_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 ptp_cc_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_ptp *ptp = container_of(cc, struct otx2_ptp, cycle_counter);</div><div class='ctx'> </div><div class='hunk'>@@ -491,7 +491,7 @@ void otx2_ptp_destroy(struct otx2_nic *pfvf)</div><div class='ctx'> 	if (!ptp)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	cancel_delayed_work(&amp;pfvf-&gt;ptp-&gt;synctstamp_work);</div><div class='add'>+	cancel_delayed_work_sync(&amp;pfvf-&gt;ptp-&gt;synctstamp_work);</div><div class='ctx'> </div><div class='ctx'> 	ptp_clock_unregister(ptp-&gt;ptp_clock);</div><div class='ctx'> 	kfree(ptp);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h<br/>index e3aee6e36215..1cd576fd09c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h</a></div><div class='hunk'>@@ -44,6 +44,17 @@</div><div class='ctx'> #define RVU_PF_VF_MBOX_ADDR                 (0xC40)</div><div class='ctx'> #define RVU_PF_LMTLINE_ADDR                 (0xC48)</div><div class='ctx'> </div><div class='add'>+#define RVU_MBOX_PF_VFX_PFVF_TRIGX(a)		(0x2000 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF_INTX(a)		(0x1000 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF_INT_W1SX(a)		(0x1020 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF_INT_ENA_W1SX(a)	(0x1040 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF_INT_ENA_W1CX(a)	(0x1060 | (a) &lt;&lt; 3)</div><div class='add'>+</div><div class='add'>+#define RVU_MBOX_PF_VFPF1_INTX(a)		(0x1080 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF1_INT_W1SX(a)		(0x10a0 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(a)	(0x10c0 | (a) &lt;&lt; 3)</div><div class='add'>+#define RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(a)	(0x10e0 | (a) &lt;&lt; 3)</div><div class='add'>+</div><div class='ctx'> /* RVU VF registers */</div><div class='ctx'> #define	RVU_VF_VFPF_MBOX0		    (0x00000)</div><div class='ctx'> #define	RVU_VF_VFPF_MBOX1		    (0x00008)</div><div class='hunk'>@@ -58,6 +69,11 @@</div><div class='ctx'> #define	RVU_VF_MSIX_PBAX(a)		    (0xF0000 | (a) &lt;&lt; 3)</div><div class='ctx'> #define RVU_VF_MBOX_REGION                  (0xC0000)</div><div class='ctx'> </div><div class='add'>+/* CN20K RVU_MBOX_E: RVU PF/VF MBOX Address Range Enumeration */</div><div class='add'>+#define RVU_MBOX_AF_PFX_ADDR(a)             (0x5000 | (a) &lt;&lt; 4)</div><div class='add'>+#define RVU_PFX_FUNC_PFAF_MBOX		    (0x80000)</div><div class='add'>+#define RVU_PFX_FUNCX_VFAF_MBOX		    (0x40000)</div><div class='add'>+</div><div class='ctx'> #define RVU_FUNC_BLKADDR_SHIFT		20</div><div class='ctx'> #define RVU_FUNC_BLKADDR_MASK		0x1FULL</div><div class='ctx'> </div><div class='hunk'>@@ -138,39 +154,12 @@</div><div class='ctx'> #define	NIX_LF_CINTX_ENA_W1S(a)		(NIX_LFBASE | 0xD40 | (a) &lt;&lt; 12)</div><div class='ctx'> #define	NIX_LF_CINTX_ENA_W1C(a)		(NIX_LFBASE | 0xD50 | (a) &lt;&lt; 12)</div><div class='ctx'> </div><div class='del'>-/* NIX AF transmit scheduler registers */</div><div class='del'>-#define NIX_AF_SMQX_CFG(a)		(0x700 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL4X_SDP_LINK_CFG(a)	(0xB10 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL1X_SCHEDULE(a)		(0xC00 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL1X_CIR(a)		(0xC20 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL1X_TOPOLOGY(a)		(0xC80 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL2X_PARENT(a)		(0xE88 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL2X_SCHEDULE(a)		(0xE00 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL2X_TOPOLOGY(a)		(0xE80 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL2X_CIR(a)		(0xE20 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL2X_PIR(a)		(0xE30 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL3X_PARENT(a)		(0x1088 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL3X_SCHEDULE(a)		(0x1000 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL3X_SHAPE(a)		(0x1010 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL3X_CIR(a)		(0x1020 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL3X_PIR(a)		(0x1030 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL3X_TOPOLOGY(a)		(0x1080 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL4X_PARENT(a)		(0x1288 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL4X_SCHEDULE(a)		(0x1200 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL4X_SHAPE(a)		(0x1210 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL4X_CIR(a)		(0x1220 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL4X_PIR(a)		(0x1230 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL4X_TOPOLOGY(a)		(0x1280 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_MDQX_SCHEDULE(a)		(0x1400 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_MDQX_SHAPE(a)		(0x1410 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_MDQX_CIR(a)		(0x1420 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_MDQX_PIR(a)		(0x1430 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_MDQX_PARENT(a)		(0x1480 | (u64)(a) &lt;&lt; 16)</div><div class='del'>-#define NIX_AF_TL3_TL2X_LINKX_CFG(a, b)	(0x1700 | (u64)(a) &lt;&lt; 16 | (b) &lt;&lt; 3)</div><div class='del'>-</div><div class='ctx'> /* LMT LF registers */</div><div class='ctx'> #define LMT_LFBASE			BIT_ULL(RVU_FUNC_BLKADDR_SHIFT)</div><div class='ctx'> #define LMT_LF_LMTLINEX(a)		(LMT_LFBASE | 0x000 | (a) &lt;&lt; 12)</div><div class='ctx'> #define LMT_LF_LMTCANCEL		(LMT_LFBASE | 0x400)</div><div class='ctx'> </div><div class='add'>+/* CN20K registers */</div><div class='add'>+#define RVU_PF_DISC			(0x0)</div><div class='add'>+</div><div class='ctx'> #endif /* OTX2_REG_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c<br/>index e63cc1eb6d89..26a08d2cfbb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c</a></div><div class='hunk'>@@ -443,6 +443,7 @@ static int otx2_tc_parse_actions(struct otx2_nic *nic,</div><div class='ctx'> 	struct flow_action_entry *act;</div><div class='ctx'> 	struct net_device *target;</div><div class='ctx'> 	struct otx2_nic *priv;</div><div class='add'>+	struct rep_dev *rdev;</div><div class='ctx'> 	u32 burst, mark = 0;</div><div class='ctx'> 	u8 nr_police = 0;</div><div class='ctx'> 	u8 num_intf = 1;</div><div class='hunk'>@@ -464,14 +465,19 @@ static int otx2_tc_parse_actions(struct otx2_nic *nic,</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		case FLOW_ACTION_REDIRECT_INGRESS:</div><div class='ctx'> 			target = act-&gt;dev;</div><div class='del'>-			priv = netdev_priv(target);</div><div class='del'>-			/* npc_install_flow_req doesn't support passing a target pcifunc */</div><div class='del'>-			if (rvu_get_pf(nic-&gt;pcifunc) != rvu_get_pf(priv-&gt;pcifunc)) {</div><div class='del'>-				NL_SET_ERR_MSG_MOD(extack,</div><div class='del'>-						   "can't redirect to other pf/vf");</div><div class='del'>-				return -EOPNOTSUPP;</div><div class='add'>+			if (target-&gt;dev.parent) {</div><div class='add'>+				priv = netdev_priv(target);</div><div class='add'>+				if (rvu_get_pf(nic-&gt;pdev, nic-&gt;pcifunc) !=</div><div class='add'>+					rvu_get_pf(nic-&gt;pdev, priv-&gt;pcifunc)) {</div><div class='add'>+					NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+							   "can't redirect to other pf/vf");</div><div class='add'>+					return -EOPNOTSUPP;</div><div class='add'>+				}</div><div class='add'>+				req-&gt;vf = priv-&gt;pcifunc &amp; RVU_PFVF_FUNC_MASK;</div><div class='add'>+			} else {</div><div class='add'>+				rdev = netdev_priv(target);</div><div class='add'>+				req-&gt;vf = rdev-&gt;pcifunc &amp; RVU_PFVF_FUNC_MASK;</div><div class='ctx'> 			}</div><div class='del'>-			req-&gt;vf = priv-&gt;pcifunc &amp; RVU_PFVF_FUNC_MASK;</div><div class='ctx'> </div><div class='ctx'> 			/* if op is already set; avoid overwriting the same */</div><div class='ctx'> 			if (!req-&gt;op)</div><div class='hunk'>@@ -1300,6 +1306,7 @@ static int otx2_tc_add_flow(struct otx2_nic *nic,</div><div class='ctx'> 	req-&gt;channel = nic-&gt;hw.rx_chan_base;</div><div class='ctx'> 	req-&gt;entry = flow_cfg-&gt;flow_ent[mcam_idx];</div><div class='ctx'> 	req-&gt;intf = NIX_INTF_RX;</div><div class='add'>+	req-&gt;vf = nic-&gt;pcifunc;</div><div class='ctx'> 	req-&gt;set_cntr = 1;</div><div class='ctx'> 	new_node-&gt;entry = req-&gt;entry;</div><div class='ctx'> </div><div class='hunk'>@@ -1319,7 +1326,6 @@ static int otx2_tc_add_flow(struct otx2_nic *nic,</div><div class='ctx'> </div><div class='ctx'> free_leaf:</div><div class='ctx'> 	otx2_tc_del_from_flow_list(flow_cfg, new_node);</div><div class='del'>-	kfree_rcu(new_node, rcu);</div><div class='ctx'> 	if (new_node-&gt;is_act_police) {</div><div class='ctx'> 		mutex_lock(&amp;nic-&gt;mbox.lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1339,6 +1345,7 @@ free_leaf:</div><div class='ctx'> </div><div class='ctx'> 		mutex_unlock(&amp;nic-&gt;mbox.lock);</div><div class='ctx'> 	}</div><div class='add'>+	kfree_rcu(new_node, rcu);</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -1400,8 +1407,8 @@ static int otx2_tc_get_flow_stats(struct otx2_nic *nic,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int otx2_setup_tc_cls_flower(struct otx2_nic *nic,</div><div class='del'>-				    struct flow_cls_offload *cls_flower)</div><div class='add'>+int otx2_setup_tc_cls_flower(struct otx2_nic *nic,</div><div class='add'>+			     struct flow_cls_offload *cls_flower)</div><div class='ctx'> {</div><div class='ctx'> 	switch (cls_flower-&gt;command) {</div><div class='ctx'> 	case FLOW_CLS_REPLACE:</div><div class='hunk'>@@ -1414,6 +1421,7 @@ static int otx2_setup_tc_cls_flower(struct otx2_nic *nic,</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_setup_tc_cls_flower);</div><div class='ctx'> </div><div class='ctx'> static int otx2_tc_ingress_matchall_install(struct otx2_nic *nic,</div><div class='ctx'> 					    struct tc_cls_matchall_offload *cls)</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c<br/>index 7aaf32e9aa95..625bb5a05344 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c</a></div><div class='hunk'>@@ -11,6 +11,8 @@</div><div class='ctx'> #include &lt;linux/bpf.h&gt;</div><div class='ctx'> #include &lt;linux/bpf_trace.h&gt;</div><div class='ctx'> #include &lt;net/ip6_checksum.h&gt;</div><div class='add'>+#include &lt;net/xfrm.h&gt;</div><div class='add'>+#include &lt;net/xdp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "otx2_reg.h"</div><div class='ctx'> #include "otx2_common.h"</div><div class='hunk'>@@ -18,6 +20,7 @@</div><div class='ctx'> #include "otx2_txrx.h"</div><div class='ctx'> #include "otx2_ptp.h"</div><div class='ctx'> #include "cn10k.h"</div><div class='add'>+#include "otx2_xsk.h"</div><div class='ctx'> </div><div class='ctx'> #define CQE_ADDR(CQ, idx) ((CQ)-&gt;cqe_base + ((CQ)-&gt;cqe_size * (idx)))</div><div class='ctx'> #define PTP_PORT	        0x13F</div><div class='hunk'>@@ -26,11 +29,30 @@</div><div class='ctx'>  */</div><div class='ctx'> #define PTP_SYNC_SEC_OFFSET	34</div><div class='ctx'> </div><div class='add'>+DEFINE_STATIC_KEY_FALSE(cn10k_ipsec_sa_enabled);</div><div class='add'>+</div><div class='add'>+static int otx2_get_free_sqe(struct otx2_snd_queue *sq)</div><div class='add'>+{</div><div class='add'>+	return (sq-&gt;cons_head - sq-&gt;head - 1 + sq-&gt;sqe_cnt)</div><div class='add'>+		&amp; (sq-&gt;sqe_cnt - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf,</div><div class='ctx'> 				     struct bpf_prog *prog,</div><div class='ctx'> 				     struct nix_cqe_rx_s *cqe,</div><div class='ctx'> 				     struct otx2_cq_queue *cq,</div><div class='del'>-				     bool *need_xdp_flush);</div><div class='add'>+				     u32 *metasize, bool *need_xdp_flush);</div><div class='add'>+</div><div class='add'>+static void otx2_sq_set_sqe_base(struct otx2_snd_queue *sq,</div><div class='add'>+				 struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (static_branch_unlikely(&amp;cn10k_ipsec_sa_enabled) &amp;&amp;</div><div class='add'>+	    (xfrm_offload(skb)))</div><div class='add'>+		sq-&gt;sqe_base = sq-&gt;sqe_ring-&gt;base + sq-&gt;sqe_size +</div><div class='add'>+				(sq-&gt;head * (sq-&gt;sqe_size * 2));</div><div class='add'>+	else</div><div class='add'>+		sq-&gt;sqe_base = sq-&gt;sqe-&gt;base;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int otx2_nix_cq_op_status(struct otx2_nic *pfvf,</div><div class='ctx'> 				 struct otx2_cq_queue *cq)</div><div class='hunk'>@@ -80,54 +102,24 @@ static unsigned int frag_num(unsigned int i)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static dma_addr_t otx2_dma_map_skb_frag(struct otx2_nic *pfvf,</div><div class='del'>-					struct sk_buff *skb, int seg, int *len)</div><div class='del'>-{</div><div class='del'>-	const skb_frag_t *frag;</div><div class='del'>-	struct page *page;</div><div class='del'>-	int offset;</div><div class='del'>-</div><div class='del'>-	/* First segment is always skb-&gt;data */</div><div class='del'>-	if (!seg) {</div><div class='del'>-		page = virt_to_page(skb-&gt;data);</div><div class='del'>-		offset = offset_in_page(skb-&gt;data);</div><div class='del'>-		*len = skb_headlen(skb);</div><div class='del'>-	} else {</div><div class='del'>-		frag = &amp;skb_shinfo(skb)-&gt;frags[seg - 1];</div><div class='del'>-		page = skb_frag_page(frag);</div><div class='del'>-		offset = skb_frag_off(frag);</div><div class='del'>-		*len = skb_frag_size(frag);</div><div class='del'>-	}</div><div class='del'>-	return otx2_dma_map_page(pfvf, page, offset, *len, DMA_TO_DEVICE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void otx2_dma_unmap_skb_frags(struct otx2_nic *pfvf, struct sg_list *sg)</div><div class='del'>-{</div><div class='del'>-	int seg;</div><div class='del'>-</div><div class='del'>-	for (seg = 0; seg &lt; sg-&gt;num_segs; seg++) {</div><div class='del'>-		otx2_dma_unmap_page(pfvf, sg-&gt;dma_addr[seg],</div><div class='del'>-				    sg-&gt;size[seg], DMA_TO_DEVICE);</div><div class='del'>-	}</div><div class='del'>-	sg-&gt;num_segs = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void otx2_xdp_snd_pkt_handler(struct otx2_nic *pfvf,</div><div class='ctx'> 				     struct otx2_snd_queue *sq,</div><div class='del'>-				 struct nix_cqe_tx_s *cqe)</div><div class='add'>+				     struct nix_cqe_tx_s *cqe,</div><div class='add'>+				     int *xsk_frames)</div><div class='ctx'> {</div><div class='ctx'> 	struct nix_send_comp_s *snd_comp = &amp;cqe-&gt;comp;</div><div class='ctx'> 	struct sg_list *sg;</div><div class='del'>-	struct page *page;</div><div class='del'>-	u64 pa;</div><div class='ctx'> </div><div class='ctx'> 	sg = &amp;sq-&gt;sg[snd_comp-&gt;sqe_id];</div><div class='add'>+	if (sg-&gt;flags &amp; OTX2_AF_XDP_FRAME) {</div><div class='add'>+		(*xsk_frames)++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	pa = otx2_iova_to_phys(pfvf-&gt;iommu_domain, sg-&gt;dma_addr[0]);</div><div class='del'>-	otx2_dma_unmap_page(pfvf, sg-&gt;dma_addr[0],</div><div class='del'>-			    sg-&gt;size[0], DMA_TO_DEVICE);</div><div class='del'>-	page = virt_to_page(phys_to_virt(pa));</div><div class='del'>-	put_page(page);</div><div class='add'>+	if (sg-&gt;flags &amp; OTX2_XDP_REDIRECT)</div><div class='add'>+		otx2_dma_unmap_page(pfvf, sg-&gt;dma_addr[0], sg-&gt;size[0], DMA_TO_DEVICE);</div><div class='add'>+	xdp_return_frame((struct xdp_frame *)sg-&gt;skb);</div><div class='add'>+	sg-&gt;skb = (u64)NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void otx2_snd_pkt_handler(struct otx2_nic *pfvf,</div><div class='hunk'>@@ -343,18 +335,24 @@ static void otx2_rcv_pkt_handler(struct otx2_nic *pfvf,</div><div class='ctx'> 	struct nix_rx_parse_s *parse = &amp;cqe-&gt;parse;</div><div class='ctx'> 	struct nix_rx_sg_s *sg = &amp;cqe-&gt;sg;</div><div class='ctx'> 	struct sk_buff *skb = NULL;</div><div class='add'>+	u64 *word = (u64 *)parse;</div><div class='ctx'> 	void *end, *start;</div><div class='add'>+	u32 metasize = 0;</div><div class='ctx'> 	u64 *seg_addr;</div><div class='ctx'> 	u16 *seg_size;</div><div class='ctx'> 	int seg;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(parse-&gt;errlev || parse-&gt;errcode)) {</div><div class='del'>-		if (otx2_check_rcv_errors(pfvf, cqe, cq-&gt;cq_idx))</div><div class='add'>+		if (otx2_check_rcv_errors(pfvf, cqe, cq-&gt;cq_idx)) {</div><div class='add'>+			trace_otx2_parse_dump(pfvf-&gt;pdev, "Err:", word);</div><div class='ctx'> 			return;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+	trace_otx2_parse_dump(pfvf-&gt;pdev, "", word);</div><div class='ctx'> </div><div class='ctx'> 	if (pfvf-&gt;xdp_prog)</div><div class='del'>-		if (otx2_xdp_rcv_pkt_handler(pfvf, pfvf-&gt;xdp_prog, cqe, cq, need_xdp_flush))</div><div class='add'>+		if (otx2_xdp_rcv_pkt_handler(pfvf, pfvf-&gt;xdp_prog, cqe, cq,</div><div class='add'>+					     &amp;metasize, need_xdp_flush))</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='ctx'> 	skb = napi_get_frags(napi);</div><div class='hunk'>@@ -376,14 +374,18 @@ static void otx2_rcv_pkt_handler(struct otx2_nic *pfvf,</div><div class='ctx'> 	}</div><div class='ctx'> 	otx2_set_rxhash(pfvf, cqe, skb);</div><div class='ctx'> </div><div class='del'>-	skb_record_rx_queue(skb, cq-&gt;cq_idx);</div><div class='del'>-	if (pfvf-&gt;netdev-&gt;features &amp; NETIF_F_RXCSUM)</div><div class='del'>-		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+	if (!(pfvf-&gt;flags &amp; OTX2_FLAG_REP_MODE_ENABLED)) {</div><div class='add'>+		skb_record_rx_queue(skb, cq-&gt;cq_idx);</div><div class='add'>+		if (pfvf-&gt;netdev-&gt;features &amp; NETIF_F_RXCSUM)</div><div class='add'>+			skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (pfvf-&gt;flags &amp; OTX2_FLAG_TC_MARK_ENABLED)</div><div class='ctx'> 		skb-&gt;mark = parse-&gt;match_id;</div><div class='ctx'> </div><div class='ctx'> 	skb_mark_for_recycle(skb);</div><div class='add'>+	if (metasize)</div><div class='add'>+		skb_metadata_set(skb, metasize);</div><div class='ctx'> </div><div class='ctx'> 	napi_gro_frags(napi);</div><div class='ctx'> }</div><div class='hunk'>@@ -447,23 +449,42 @@ int otx2_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq)</div><div class='ctx'> 	return cnt - cq-&gt;pool_ptrs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void otx2_zc_submit_pkts(struct otx2_nic *pfvf, struct xsk_buff_pool *xsk_pool,</div><div class='add'>+				int *xsk_frames, int qidx, int budget)</div><div class='add'>+{</div><div class='add'>+	if (*xsk_frames)</div><div class='add'>+		xsk_tx_completed(xsk_pool, *xsk_frames);</div><div class='add'>+</div><div class='add'>+	if (xsk_uses_need_wakeup(xsk_pool))</div><div class='add'>+		xsk_set_tx_need_wakeup(xsk_pool);</div><div class='add'>+</div><div class='add'>+	otx2_zc_napi_handler(pfvf, xsk_pool, qidx, budget);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int otx2_tx_napi_handler(struct otx2_nic *pfvf,</div><div class='ctx'> 				struct otx2_cq_queue *cq, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	int tx_pkts = 0, tx_bytes = 0, qidx;</div><div class='ctx'> 	struct otx2_snd_queue *sq;</div><div class='ctx'> 	struct nix_cqe_tx_s *cqe;</div><div class='add'>+	struct net_device *ndev;</div><div class='ctx'> 	int processed_cqe = 0;</div><div class='add'>+	int xsk_frames = 0;</div><div class='add'>+</div><div class='add'>+	qidx = cq-&gt;cq_idx - pfvf-&gt;hw.rx_queues;</div><div class='add'>+	sq = &amp;pfvf-&gt;qset.sq[qidx];</div><div class='ctx'> </div><div class='ctx'> 	if (cq-&gt;pend_cqe &gt;= budget)</div><div class='ctx'> 		goto process_cqe;</div><div class='ctx'> </div><div class='del'>-	if (otx2_nix_cq_op_status(pfvf, cq) || !cq-&gt;pend_cqe)</div><div class='add'>+	if (otx2_nix_cq_op_status(pfvf, cq) || !cq-&gt;pend_cqe) {</div><div class='add'>+		if (sq-&gt;xsk_pool)</div><div class='add'>+			otx2_zc_submit_pkts(pfvf, sq-&gt;xsk_pool, &amp;xsk_frames,</div><div class='add'>+					    qidx, budget);</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> process_cqe:</div><div class='del'>-	qidx = cq-&gt;cq_idx - pfvf-&gt;hw.rx_queues;</div><div class='del'>-	sq = &amp;pfvf-&gt;qset.sq[qidx];</div><div class='ctx'> </div><div class='ctx'> 	while (likely(processed_cqe &lt; budget) &amp;&amp; cq-&gt;pend_cqe) {</div><div class='ctx'> 		cqe = (struct nix_cqe_tx_s *)otx2_get_next_cqe(cq);</div><div class='hunk'>@@ -473,10 +494,8 @@ process_cqe:</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		qidx = cq-&gt;cq_idx - pfvf-&gt;hw.rx_queues;</div><div class='del'>-</div><div class='ctx'> 		if (cq-&gt;cq_type == CQ_XDP)</div><div class='del'>-			otx2_xdp_snd_pkt_handler(pfvf, sq, cqe);</div><div class='add'>+			otx2_xdp_snd_pkt_handler(pfvf, sq, cqe, &amp;xsk_frames);</div><div class='ctx'> 		else</div><div class='ctx'> 			otx2_snd_pkt_handler(pfvf, cq, &amp;pfvf-&gt;qset.sq[qidx],</div><div class='ctx'> 					     cqe, budget, &amp;tx_pkts, &amp;tx_bytes);</div><div class='hunk'>@@ -493,6 +512,13 @@ process_cqe:</div><div class='ctx'> 	otx2_write64(pfvf, NIX_LF_CQ_OP_DOOR,</div><div class='ctx'> 		     ((u64)cq-&gt;cq_idx &lt;&lt; 32) | processed_cqe);</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_RVU_ESWITCH)</div><div class='add'>+	if (pfvf-&gt;flags &amp; OTX2_FLAG_REP_MODE_ENABLED)</div><div class='add'>+		ndev = pfvf-&gt;reps[qidx]-&gt;netdev;</div><div class='add'>+	else</div><div class='add'>+#endif</div><div class='add'>+		ndev = pfvf-&gt;netdev;</div><div class='add'>+</div><div class='ctx'> 	if (likely(tx_pkts)) {</div><div class='ctx'> 		struct netdev_queue *txq;</div><div class='ctx'> </div><div class='hunk'>@@ -500,14 +526,20 @@ process_cqe:</div><div class='ctx'> </div><div class='ctx'> 		if (qidx &gt;= pfvf-&gt;hw.tx_queues)</div><div class='ctx'> 			qidx -= pfvf-&gt;hw.xdp_queues;</div><div class='del'>-		txq = netdev_get_tx_queue(pfvf-&gt;netdev, qidx);</div><div class='add'>+		if (pfvf-&gt;flags &amp; OTX2_FLAG_REP_MODE_ENABLED)</div><div class='add'>+			qidx = 0;</div><div class='add'>+		txq = netdev_get_tx_queue(ndev, qidx);</div><div class='ctx'> 		netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);</div><div class='ctx'> 		/* Check if queue was stopped earlier due to ring full */</div><div class='ctx'> 		smp_mb();</div><div class='ctx'> 		if (netif_tx_queue_stopped(txq) &amp;&amp;</div><div class='del'>-		    netif_carrier_ok(pfvf-&gt;netdev))</div><div class='add'>+		    netif_carrier_ok(ndev))</div><div class='ctx'> 			netif_tx_wake_queue(txq);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (sq-&gt;xsk_pool)</div><div class='add'>+		otx2_zc_submit_pkts(pfvf, sq-&gt;xsk_pool, &amp;xsk_frames, qidx, budget);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -533,9 +565,10 @@ static void otx2_adjust_adaptive_coalese(struct otx2_nic *pfvf, struct otx2_cq_p</div><div class='ctx'> int otx2_napi_handler(struct napi_struct *napi, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_cq_queue *rx_cq = NULL;</div><div class='add'>+	struct otx2_cq_queue *cq = NULL;</div><div class='add'>+	struct otx2_pool *pool = NULL;</div><div class='ctx'> 	struct otx2_cq_poll *cq_poll;</div><div class='ctx'> 	int workdone = 0, cq_idx, i;</div><div class='del'>-	struct otx2_cq_queue *cq;</div><div class='ctx'> 	struct otx2_qset *qset;</div><div class='ctx'> 	struct otx2_nic *pfvf;</div><div class='ctx'> 	int filled_cnt = -1;</div><div class='hunk'>@@ -560,6 +593,7 @@ int otx2_napi_handler(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	if (rx_cq &amp;&amp; rx_cq-&gt;pool_ptrs)</div><div class='ctx'> 		filled_cnt = pfvf-&gt;hw_ops-&gt;refill_pool_ptrs(pfvf, rx_cq);</div><div class='add'>+</div><div class='ctx'> 	/* Clear the IRQ */</div><div class='ctx'> 	otx2_write64(pfvf, NIX_LF_CINTX_INT(cq_poll-&gt;cint_idx), BIT_ULL(0));</div><div class='ctx'> </div><div class='hunk'>@@ -572,20 +606,31 @@ int otx2_napi_handler(struct napi_struct *napi, int budget)</div><div class='ctx'> 		if (pfvf-&gt;flags &amp; OTX2_FLAG_ADPTV_INT_COAL_ENABLED)</div><div class='ctx'> 			otx2_adjust_adaptive_coalese(pfvf, cq_poll);</div><div class='ctx'> </div><div class='add'>+		if (likely(cq))</div><div class='add'>+			pool = &amp;pfvf-&gt;qset.pool[cq-&gt;cq_idx];</div><div class='add'>+</div><div class='ctx'> 		if (unlikely(!filled_cnt)) {</div><div class='ctx'> 			struct refill_work *work;</div><div class='ctx'> 			struct delayed_work *dwork;</div><div class='ctx'> </div><div class='del'>-			work = &amp;pfvf-&gt;refill_wrk[cq-&gt;cq_idx];</div><div class='del'>-			dwork = &amp;work-&gt;pool_refill_work;</div><div class='del'>-			/* Schedule a task if no other task is running */</div><div class='del'>-			if (!cq-&gt;refill_task_sched) {</div><div class='del'>-				work-&gt;napi = napi;</div><div class='del'>-				cq-&gt;refill_task_sched = true;</div><div class='del'>-				schedule_delayed_work(dwork,</div><div class='del'>-						      msecs_to_jiffies(100));</div><div class='add'>+			if (likely(cq)) {</div><div class='add'>+				work = &amp;pfvf-&gt;refill_wrk[cq-&gt;cq_idx];</div><div class='add'>+				dwork = &amp;work-&gt;pool_refill_work;</div><div class='add'>+				/* Schedule a task if no other task is running */</div><div class='add'>+				if (!cq-&gt;refill_task_sched) {</div><div class='add'>+					work-&gt;napi = napi;</div><div class='add'>+					cq-&gt;refill_task_sched = true;</div><div class='add'>+					schedule_delayed_work(dwork,</div><div class='add'>+							      msecs_to_jiffies(100));</div><div class='add'>+				}</div><div class='add'>+				/* Call wake-up for not able to fill buffers */</div><div class='add'>+				if (pool-&gt;xsk_pool)</div><div class='add'>+					xsk_set_rx_need_wakeup(pool-&gt;xsk_pool);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='add'>+			/* Clear wake-up, since buffers are filled successfully */</div><div class='add'>+			if (pool &amp;&amp; pool-&gt;xsk_pool)</div><div class='add'>+				xsk_clear_rx_need_wakeup(pool-&gt;xsk_pool);</div><div class='ctx'> 			/* Re-enable interrupts */</div><div class='ctx'> 			otx2_write64(pfvf,</div><div class='ctx'> 				     NIX_LF_CINTX_ENA_W1S(cq_poll-&gt;cint_idx),</div><div class='hunk'>@@ -594,6 +639,7 @@ int otx2_napi_handler(struct napi_struct *napi, int budget)</div><div class='ctx'> 	}</div><div class='ctx'> 	return workdone;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(otx2_napi_handler);</div><div class='ctx'> </div><div class='ctx'> void otx2_sqe_flush(void *dev, struct otx2_snd_queue *sq,</div><div class='ctx'> 		    int size, int qidx)</div><div class='hunk'>@@ -612,7 +658,6 @@ void otx2_sqe_flush(void *dev, struct otx2_snd_queue *sq,</div><div class='ctx'> 	sq-&gt;head &amp;= (sq-&gt;sqe_cnt - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define MAX_SEGS_PER_SG	3</div><div class='ctx'> /* Add SQE scatter/gather subdescriptor structure */</div><div class='ctx'> static bool otx2_sqe_add_sg(struct otx2_nic *pfvf, struct otx2_snd_queue *sq,</div><div class='ctx'> 			    struct sk_buff *skb, int num_segs, int *offset)</div><div class='hunk'>@@ -1141,18 +1186,19 @@ static void otx2_set_txtstamp(struct otx2_nic *pfvf, struct sk_buff *skb,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool otx2_sq_append_skb(struct net_device *netdev, struct otx2_snd_queue *sq,</div><div class='add'>+bool otx2_sq_append_skb(void *dev, struct netdev_queue *txq,</div><div class='add'>+			struct otx2_snd_queue *sq,</div><div class='ctx'> 			struct sk_buff *skb, u16 qidx)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_queue *txq = netdev_get_tx_queue(netdev, qidx);</div><div class='del'>-	struct otx2_nic *pfvf = netdev_priv(netdev);</div><div class='ctx'> 	int offset, num_segs, free_desc;</div><div class='ctx'> 	struct nix_sqe_hdr_s *sqe_hdr;</div><div class='add'>+	struct otx2_nic *pfvf = dev;</div><div class='add'>+	bool ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Check if there is enough room between producer</div><div class='ctx'> 	 * and consumer index.</div><div class='ctx'> 	 */</div><div class='del'>-	free_desc = (sq-&gt;cons_head - sq-&gt;head - 1 + sq-&gt;sqe_cnt) &amp; (sq-&gt;sqe_cnt - 1);</div><div class='add'>+	free_desc = otx2_get_free_sqe(sq);</div><div class='ctx'> 	if (free_desc &lt; sq-&gt;sqe_thresh)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -1164,6 +1210,7 @@ bool otx2_sq_append_skb(struct net_device *netdev, struct otx2_snd_queue *sq,</div><div class='ctx'> 	/* If SKB doesn't fit in a single SQE, linearize it.</div><div class='ctx'> 	 * TODO: Consider adding JUMP descriptor instead.</div><div class='ctx'> 	 */</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(num_segs &gt; OTX2_MAX_FRAGS_IN_SQE)) {</div><div class='ctx'> 		if (__skb_linearize(skb)) {</div><div class='ctx'> 			dev_kfree_skb_any(skb);</div><div class='hunk'>@@ -1183,6 +1230,9 @@ bool otx2_sq_append_skb(struct net_device *netdev, struct otx2_snd_queue *sq,</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Set sqe base address */</div><div class='add'>+	otx2_sq_set_sqe_base(sq, skb);</div><div class='add'>+</div><div class='ctx'> 	/* Set SQE's SEND_HDR.</div><div class='ctx'> 	 * Do not clear the first 64bit as it contains constant info.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1195,7 +1245,13 @@ bool otx2_sq_append_skb(struct net_device *netdev, struct otx2_snd_queue *sq,</div><div class='ctx'> 	otx2_sqe_add_ext(pfvf, sq, skb, &amp;offset);</div><div class='ctx'> </div><div class='ctx'> 	/* Add SG subdesc with data frags */</div><div class='del'>-	if (!otx2_sqe_add_sg(pfvf, sq, skb, num_segs, &amp;offset)) {</div><div class='add'>+	if (static_branch_unlikely(&amp;cn10k_ipsec_sa_enabled) &amp;&amp;</div><div class='add'>+	    (xfrm_offload(skb)))</div><div class='add'>+		ret = otx2_sqe_add_sg_ipsec(pfvf, sq, skb, num_segs, &amp;offset);</div><div class='add'>+	else</div><div class='add'>+		ret = otx2_sqe_add_sg(pfvf, sq, skb, num_segs, &amp;offset);</div><div class='add'>+</div><div class='add'>+	if (!ret) {</div><div class='ctx'> 		otx2_dma_unmap_skb_frags(pfvf, &amp;sq-&gt;sg[sq-&gt;head]);</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1204,11 +1260,15 @@ bool otx2_sq_append_skb(struct net_device *netdev, struct otx2_snd_queue *sq,</div><div class='ctx'> </div><div class='ctx'> 	sqe_hdr-&gt;sizem1 = (offset / 16) - 1;</div><div class='ctx'> </div><div class='add'>+	if (static_branch_unlikely(&amp;cn10k_ipsec_sa_enabled) &amp;&amp;</div><div class='add'>+	    (xfrm_offload(skb)))</div><div class='add'>+		return cn10k_ipsec_transmit(pfvf, txq, sq, skb, num_segs,</div><div class='add'>+					    offset);</div><div class='add'>+</div><div class='ctx'> 	netdev_tx_sent_queue(txq, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	/* Flush SQE to HW */</div><div class='ctx'> 	pfvf-&gt;hw_ops-&gt;sqe_flush(pfvf, sq, offset, qidx);</div><div class='del'>-</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(otx2_sq_append_skb);</div><div class='hunk'>@@ -1221,15 +1281,19 @@ void otx2_cleanup_rx_cqes(struct otx2_nic *pfvf, struct otx2_cq_queue *cq, int q</div><div class='ctx'> 	u16 pool_id;</div><div class='ctx'> 	u64 iova;</div><div class='ctx'> </div><div class='del'>-	if (pfvf-&gt;xdp_prog)</div><div class='add'>+	pool_id = otx2_get_pool_idx(pfvf, AURA_NIX_RQ, qidx);</div><div class='add'>+	pool = &amp;pfvf-&gt;qset.pool[pool_id];</div><div class='add'>+</div><div class='add'>+	if (pfvf-&gt;xdp_prog) {</div><div class='add'>+		if (pool-&gt;page_pool)</div><div class='add'>+			xdp_rxq_info_unreg_mem_model(&amp;cq-&gt;xdp_rxq);</div><div class='add'>+</div><div class='ctx'> 		xdp_rxq_info_unreg(&amp;cq-&gt;xdp_rxq);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (otx2_nix_cq_op_status(pfvf, cq) || !cq-&gt;pend_cqe)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	pool_id = otx2_get_pool_idx(pfvf, AURA_NIX_RQ, qidx);</div><div class='del'>-	pool = &amp;pfvf-&gt;qset.pool[pool_id];</div><div class='del'>-</div><div class='ctx'> 	while (cq-&gt;pend_cqe) {</div><div class='ctx'> 		cqe = (struct nix_cqe_rx_s *)otx2_get_next_cqe(cq);</div><div class='ctx'> 		processed_cqe++;</div><div class='hunk'>@@ -1350,8 +1414,8 @@ void otx2_free_pending_sqe(struct otx2_nic *pfvf)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq, u64 dma_addr,</div><div class='del'>-				int len, int *offset)</div><div class='add'>+void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq, struct xdp_frame *xdpf,</div><div class='add'>+			 u64 dma_addr, int len, int *offset, u16 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct nix_sqe_sg_s *sg = NULL;</div><div class='ctx'> 	u64 *iova = NULL;</div><div class='hunk'>@@ -1368,16 +1432,34 @@ static void otx2_xdp_sqe_add_sg(struct otx2_snd_queue *sq, u64 dma_addr,</div><div class='ctx'> 	sq-&gt;sg[sq-&gt;head].dma_addr[0] = dma_addr;</div><div class='ctx'> 	sq-&gt;sg[sq-&gt;head].size[0] = len;</div><div class='ctx'> 	sq-&gt;sg[sq-&gt;head].num_segs = 1;</div><div class='add'>+	sq-&gt;sg[sq-&gt;head].flags = flags;</div><div class='add'>+	sq-&gt;sg[sq-&gt;head].skb = (u64)xdpf;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len, u16 qidx)</div><div class='add'>+int otx2_read_free_sqe(struct otx2_nic *pfvf, u16 qidx)</div><div class='add'>+{</div><div class='add'>+	struct otx2_snd_queue *sq;</div><div class='add'>+	int free_sqe;</div><div class='add'>+</div><div class='add'>+	sq = &amp;pfvf-&gt;qset.sq[qidx];</div><div class='add'>+	free_sqe = otx2_get_free_sqe(sq);</div><div class='add'>+	if (free_sqe &lt; sq-&gt;sqe_thresh) {</div><div class='add'>+		netdev_warn(pfvf-&gt;netdev, "No free sqe for Send queue%d\n", qidx);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return free_sqe - sq-&gt;sqe_thresh;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, struct xdp_frame *xdpf,</div><div class='add'>+			    u64 iova, int len, u16 qidx, u16 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct nix_sqe_hdr_s *sqe_hdr;</div><div class='ctx'> 	struct otx2_snd_queue *sq;</div><div class='ctx'> 	int offset, free_sqe;</div><div class='ctx'> </div><div class='ctx'> 	sq = &amp;pfvf-&gt;qset.sq[qidx];</div><div class='del'>-	free_sqe = (sq-&gt;num_sqbs - *sq-&gt;aura_fc_addr) * sq-&gt;sqe_per_sqb;</div><div class='add'>+	free_sqe = otx2_get_free_sqe(sq);</div><div class='ctx'> 	if (free_sqe &lt; sq-&gt;sqe_thresh)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='hunk'>@@ -1396,7 +1478,7 @@ bool otx2_xdp_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len, u16 qidx)</div><div class='ctx'> </div><div class='ctx'> 	offset = sizeof(*sqe_hdr);</div><div class='ctx'> </div><div class='del'>-	otx2_xdp_sqe_add_sg(sq, iova, len, &amp;offset);</div><div class='add'>+	otx2_xdp_sqe_add_sg(sq, xdpf, iova, len, &amp;offset, flags);</div><div class='ctx'> 	sqe_hdr-&gt;sizem1 = (offset / 16) - 1;</div><div class='ctx'> 	pfvf-&gt;hw_ops-&gt;sqe_flush(pfvf, sq, offset, qidx);</div><div class='ctx'> </div><div class='hunk'>@@ -1407,16 +1489,30 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf,</div><div class='ctx'> 				     struct bpf_prog *prog,</div><div class='ctx'> 				     struct nix_cqe_rx_s *cqe,</div><div class='ctx'> 				     struct otx2_cq_queue *cq,</div><div class='del'>-				     bool *need_xdp_flush)</div><div class='add'>+				     u32 *metasize, bool *need_xdp_flush)</div><div class='ctx'> {</div><div class='add'>+	struct xdp_buff xdp, *xsk_buff = NULL;</div><div class='ctx'> 	unsigned char *hard_start;</div><div class='add'>+	struct otx2_pool *pool;</div><div class='add'>+	struct xdp_frame *xdpf;</div><div class='ctx'> 	int qidx = cq-&gt;cq_idx;</div><div class='del'>-	struct xdp_buff xdp;</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> 	u64 iova, pa;</div><div class='ctx'> 	u32 act;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	pool = &amp;pfvf-&gt;qset.pool[qidx];</div><div class='add'>+</div><div class='add'>+	if (pool-&gt;xsk_pool) {</div><div class='add'>+		xsk_buff = pool-&gt;xdp[--cq-&gt;rbpool-&gt;xdp_top];</div><div class='add'>+		if (!xsk_buff)</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		xsk_buff-&gt;data_end = xsk_buff-&gt;data + cqe-&gt;sg.seg_size;</div><div class='add'>+		act = bpf_prog_run_xdp(prog, xsk_buff);</div><div class='add'>+		goto handle_xdp_verdict;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	iova = cqe-&gt;sg.seg_addr - OTX2_HEAD_ROOM;</div><div class='ctx'> 	pa = otx2_iova_to_phys(pfvf-&gt;iommu_domain, iova);</div><div class='ctx'> 	page = virt_to_page(phys_to_virt(pa));</div><div class='hunk'>@@ -1425,41 +1521,63 @@ static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf,</div><div class='ctx'> </div><div class='ctx'> 	hard_start = (unsigned char *)phys_to_virt(pa);</div><div class='ctx'> 	xdp_prepare_buff(&amp;xdp, hard_start, OTX2_HEAD_ROOM,</div><div class='del'>-			 cqe-&gt;sg.seg_size, false);</div><div class='add'>+			 cqe-&gt;sg.seg_size, true);</div><div class='ctx'> </div><div class='ctx'> 	act = bpf_prog_run_xdp(prog, &amp;xdp);</div><div class='ctx'> </div><div class='add'>+handle_xdp_verdict:</div><div class='ctx'> 	switch (act) {</div><div class='ctx'> 	case XDP_PASS:</div><div class='add'>+		*metasize = xdp.data - xdp.data_meta;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XDP_TX:</div><div class='ctx'> 		qidx += pfvf-&gt;hw.tx_queues;</div><div class='ctx'> 		cq-&gt;pool_ptrs++;</div><div class='del'>-		return otx2_xdp_sq_append_pkt(pfvf, iova,</div><div class='del'>-					      cqe-&gt;sg.seg_size, qidx);</div><div class='add'>+		xdpf = xdp_convert_buff_to_frame(&amp;xdp);</div><div class='add'>+		return otx2_xdp_sq_append_pkt(pfvf, xdpf,</div><div class='add'>+					      cqe-&gt;sg.seg_addr,</div><div class='add'>+					      cqe-&gt;sg.seg_size,</div><div class='add'>+					      qidx, OTX2_XDP_TX);</div><div class='ctx'> 	case XDP_REDIRECT:</div><div class='ctx'> 		cq-&gt;pool_ptrs++;</div><div class='del'>-		err = xdp_do_redirect(pfvf-&gt;netdev, &amp;xdp, prog);</div><div class='add'>+		if (xsk_buff) {</div><div class='add'>+			err = xdp_do_redirect(pfvf-&gt;netdev, xsk_buff, prog);</div><div class='add'>+			if (!err) {</div><div class='add'>+				*need_xdp_flush = true;</div><div class='add'>+				return true;</div><div class='add'>+			}</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		otx2_dma_unmap_page(pfvf, iova, pfvf-&gt;rbsize,</div><div class='del'>-				    DMA_FROM_DEVICE);</div><div class='add'>+		err = xdp_do_redirect(pfvf-&gt;netdev, &amp;xdp, prog);</div><div class='ctx'> 		if (!err) {</div><div class='ctx'> 			*need_xdp_flush = true;</div><div class='ctx'> 			return true;</div><div class='ctx'> 		}</div><div class='del'>-		put_page(page);</div><div class='add'>+</div><div class='add'>+		otx2_dma_unmap_page(pfvf, iova, pfvf-&gt;rbsize,</div><div class='add'>+				    DMA_FROM_DEVICE);</div><div class='add'>+		xdpf = xdp_convert_buff_to_frame(&amp;xdp);</div><div class='add'>+		xdp_return_frame(xdpf);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		bpf_warn_invalid_xdp_action(pfvf-&gt;netdev, prog, act);</div><div class='del'>-		break;</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case XDP_ABORTED:</div><div class='del'>-		trace_xdp_exception(pfvf-&gt;netdev, prog, act);</div><div class='del'>-		break;</div><div class='add'>+		if (act == XDP_ABORTED)</div><div class='add'>+			trace_xdp_exception(pfvf-&gt;netdev, prog, act);</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case XDP_DROP:</div><div class='del'>-		otx2_dma_unmap_page(pfvf, iova, pfvf-&gt;rbsize,</div><div class='del'>-				    DMA_FROM_DEVICE);</div><div class='del'>-		put_page(page);</div><div class='ctx'> 		cq-&gt;pool_ptrs++;</div><div class='add'>+		if (xsk_buff) {</div><div class='add'>+			xsk_buff_free(xsk_buff);</div><div class='add'>+		} else if (pp_page_to_nmdesc(page)-&gt;pp) {</div><div class='add'>+			page_pool_recycle_direct(pool-&gt;page_pool, page);</div><div class='add'>+		} else {</div><div class='add'>+			otx2_dma_unmap_page(pfvf, iova, pfvf-&gt;rbsize,</div><div class='add'>+					    DMA_FROM_DEVICE);</div><div class='add'>+			put_page(page);</div><div class='add'>+		}</div><div class='ctx'> 		return true;</div><div class='ctx'> 	}</div><div class='ctx'> 	return false;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h<br/>index 3f1d2655ff77..acf259d72008 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> #include &lt;linux/iommu.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='add'>+#include &lt;net/xdp_sock_drv.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define LBK_CHAN_BASE	0x000</div><div class='ctx'> #define SDP_CHAN_BASE	0x700</div><div class='hunk'>@@ -76,6 +77,7 @@ struct otx2_rcv_queue {</div><div class='ctx'> </div><div class='ctx'> struct sg_list {</div><div class='ctx'> 	u16	num_segs;</div><div class='add'>+	u16	flags;</div><div class='ctx'> 	u64	skb;</div><div class='ctx'> 	u64	size[OTX2_MAX_FRAGS_IN_SQE];</div><div class='ctx'> 	u64	dma_addr[OTX2_MAX_FRAGS_IN_SQE];</div><div class='hunk'>@@ -101,6 +103,11 @@ struct otx2_snd_queue {</div><div class='ctx'> 	struct queue_stats	stats;</div><div class='ctx'> 	u16			sqb_count;</div><div class='ctx'> 	u64			*sqb_ptrs;</div><div class='add'>+	/* SQE ring and CPT response queue for Inline IPSEC */</div><div class='add'>+	struct qmem		*sqe_ring;</div><div class='add'>+	struct qmem		*cpt_resp;</div><div class='add'>+	/* Buffer pool for af_xdp zero-copy */</div><div class='add'>+	struct xsk_buff_pool    *xsk_pool;</div><div class='ctx'> } ____cacheline_aligned_in_smp;</div><div class='ctx'> </div><div class='ctx'> enum cq_type {</div><div class='hunk'>@@ -124,7 +131,11 @@ struct otx2_pool {</div><div class='ctx'> 	struct qmem		*stack;</div><div class='ctx'> 	struct qmem		*fc_addr;</div><div class='ctx'> 	struct page_pool	*page_pool;</div><div class='add'>+	struct xsk_buff_pool	*xsk_pool;</div><div class='add'>+	struct xdp_buff		**xdp;</div><div class='add'>+	u16			xdp_cnt;</div><div class='ctx'> 	u16			rbsize;</div><div class='add'>+	u16			xdp_top;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct otx2_cq_queue {</div><div class='hunk'>@@ -141,6 +152,7 @@ struct otx2_cq_queue {</div><div class='ctx'> 	void			*cqe_base;</div><div class='ctx'> 	struct qmem		*cqe;</div><div class='ctx'> 	struct otx2_pool	*rbpool;</div><div class='add'>+	bool			xsk_zc_en;</div><div class='ctx'> 	struct xdp_rxq_info xdp_rxq;</div><div class='ctx'> } ____cacheline_aligned_in_smp;</div><div class='ctx'> </div><div class='hunk'>@@ -167,7 +179,8 @@ static inline u64 otx2_iova_to_phys(void *iommu_domain, dma_addr_t dma_addr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int otx2_napi_handler(struct napi_struct *napi, int budget);</div><div class='del'>-bool otx2_sq_append_skb(struct net_device *netdev, struct otx2_snd_queue *sq,</div><div class='add'>+bool otx2_sq_append_skb(void *dev, struct netdev_queue *txq,</div><div class='add'>+			struct otx2_snd_queue *sq,</div><div class='ctx'> 			struct sk_buff *skb, u16 qidx);</div><div class='ctx'> void cn10k_sqe_flush(void *dev, struct otx2_snd_queue *sq,</div><div class='ctx'> 		     int size, int qidx);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c<br/>index c4e6c78a8deb..f4fdbfba8667 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include "otx2_reg.h"</div><div class='ctx'> #include "otx2_ptp.h"</div><div class='ctx'> #include "cn10k.h"</div><div class='add'>+#include "cn10k_ipsec.h"</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"rvu_nicvf"</div><div class='ctx'> #define DRV_STRING	"Marvell RVU NIC Virtual Function Driver"</div><div class='hunk'>@@ -21,6 +22,7 @@</div><div class='ctx'> static const struct pci_device_id otx2_vf_id_table[] = {</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_RVU_AFVF) },</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_RVU_VF) },</div><div class='add'>+	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_SDP_REP) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -134,7 +136,7 @@ static int otx2vf_process_mbox_msg_up(struct otx2_nic *vf,</div><div class='ctx'> </div><div class='ctx'> 		rsp-&gt;hdr.id = MBOX_MSG_CGX_LINK_EVENT;</div><div class='ctx'> 		rsp-&gt;hdr.sig = OTX2_MBOX_RSP_SIG;</div><div class='del'>-		rsp-&gt;hdr.pcifunc = 0;</div><div class='add'>+		rsp-&gt;hdr.pcifunc = req-&gt;pcifunc;</div><div class='ctx'> 		rsp-&gt;hdr.rc = 0;</div><div class='ctx'> 		err = otx2_mbox_up_handler_cgx_link_event(</div><div class='ctx'> 				vf, (struct cgx_link_info_msg *)req, rsp);</div><div class='hunk'>@@ -238,6 +240,10 @@ static void otx2vf_disable_mbox_intr(struct otx2_nic *vf)</div><div class='ctx'> </div><div class='ctx'> 	/* Disable VF =&gt; PF mailbox IRQ */</div><div class='ctx'> 	otx2_write64(vf, RVU_VF_INT_ENA_W1C, BIT_ULL(0));</div><div class='add'>+</div><div class='add'>+	if (is_cn20k(vf-&gt;pdev))</div><div class='add'>+		otx2_write64(vf, RVU_VF_INT_ENA_W1C, BIT_ULL(0) | BIT_ULL(1));</div><div class='add'>+</div><div class='ctx'> 	free_irq(vector, vf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -250,9 +256,18 @@ static int otx2vf_register_mbox_intr(struct otx2_nic *vf, bool probe_pf)</div><div class='ctx'> </div><div class='ctx'> 	/* Register mailbox interrupt handler */</div><div class='ctx'> 	irq_name = &amp;hw-&gt;irq_name[RVU_VF_INT_VEC_MBOX * NAME_SIZE];</div><div class='del'>-	snprintf(irq_name, NAME_SIZE, "RVUVFAF Mbox");</div><div class='del'>-	err = request_irq(pci_irq_vector(vf-&gt;pdev, RVU_VF_INT_VEC_MBOX),</div><div class='del'>-			  otx2vf_vfaf_mbox_intr_handler, 0, irq_name, vf);</div><div class='add'>+	snprintf(irq_name, NAME_SIZE, "RVUVF%d AFVF Mbox", ((vf-&gt;pcifunc &amp;</div><div class='add'>+		 RVU_PFVF_FUNC_MASK) - 1));</div><div class='add'>+</div><div class='add'>+	if (!is_cn20k(vf-&gt;pdev)) {</div><div class='add'>+		err = request_irq(pci_irq_vector(vf-&gt;pdev, RVU_VF_INT_VEC_MBOX),</div><div class='add'>+				  otx2vf_vfaf_mbox_intr_handler, 0, irq_name, vf);</div><div class='add'>+	} else {</div><div class='add'>+		err = request_irq(pci_irq_vector(vf-&gt;pdev, RVU_VF_INT_VEC_MBOX),</div><div class='add'>+				  vf-&gt;hw_ops-&gt;vfaf_mbox_intr_handler, 0, irq_name,</div><div class='add'>+				  vf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(vf-&gt;dev,</div><div class='ctx'> 			"RVUPF: IRQ registration failed for VFAF mbox irq\n");</div><div class='hunk'>@@ -262,8 +277,15 @@ static int otx2vf_register_mbox_intr(struct otx2_nic *vf, bool probe_pf)</div><div class='ctx'> 	/* Enable mailbox interrupt for msgs coming from PF.</div><div class='ctx'> 	 * First clear to avoid spurious interrupts, if any.</div><div class='ctx'> 	 */</div><div class='del'>-	otx2_write64(vf, RVU_VF_INT, BIT_ULL(0));</div><div class='del'>-	otx2_write64(vf, RVU_VF_INT_ENA_W1S, BIT_ULL(0));</div><div class='add'>+	if (!is_cn20k(vf-&gt;pdev)) {</div><div class='add'>+		otx2_write64(vf, RVU_VF_INT, BIT_ULL(0));</div><div class='add'>+		otx2_write64(vf, RVU_VF_INT_ENA_W1S, BIT_ULL(0));</div><div class='add'>+	} else {</div><div class='add'>+		otx2_write64(vf, RVU_VF_INT, BIT_ULL(0) | BIT_ULL(1) |</div><div class='add'>+			     BIT_ULL(2) | BIT_ULL(3));</div><div class='add'>+		otx2_write64(vf, RVU_VF_INT_ENA_W1S, BIT_ULL(0) |</div><div class='add'>+			     BIT_ULL(1) | BIT_ULL(2) | BIT_ULL(3));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!probe_pf)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -313,7 +335,13 @@ static int otx2vf_vfaf_mbox_init(struct otx2_nic *vf)</div><div class='ctx'> 	if (!vf-&gt;mbox_wq)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (test_bit(CN10K_MBOX, &amp;vf-&gt;hw.cap_flag)) {</div><div class='add'>+	/* For cn20k platform, VF mailbox region is in dram aliased from AF</div><div class='add'>+	 * VF MBOX ADDR, MBOX is a separate RVU block.</div><div class='add'>+	 */</div><div class='add'>+	if (is_cn20k(vf-&gt;pdev)) {</div><div class='add'>+		hwbase = vf-&gt;reg_base + RVU_VF_MBOX_REGION + ((u64)BLKADDR_MBOX &lt;&lt;</div><div class='add'>+			RVU_FUNC_BLKADDR_SHIFT);</div><div class='add'>+	} else if (test_bit(CN10K_MBOX, &amp;vf-&gt;hw.cap_flag)) {</div><div class='ctx'> 		/* For cn10k platform, VF mailbox region is in its BAR2</div><div class='ctx'> 		 * register space</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -371,7 +399,7 @@ static int otx2vf_open(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	/* LBKs do not receive link events so tell everyone we are up here */</div><div class='ctx'> 	vf = netdev_priv(netdev);</div><div class='del'>-	if (is_otx2_lbkvf(vf-&gt;pdev)) {</div><div class='add'>+	if (is_otx2_lbkvf(vf-&gt;pdev) || is_otx2_sdp_rep(vf-&gt;pdev)) {</div><div class='ctx'> 		pr_info("%s NIC Link is UP\n", netdev-&gt;name);</div><div class='ctx'> 		netif_carrier_on(netdev);</div><div class='ctx'> 		netif_tx_start_all_queues(netdev);</div><div class='hunk'>@@ -389,13 +417,23 @@ static netdev_tx_t otx2vf_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_nic *vf = netdev_priv(netdev);</div><div class='ctx'> 	int qidx = skb_get_queue_mapping(skb);</div><div class='add'>+	struct otx2_dev_stats *dev_stats;</div><div class='ctx'> 	struct otx2_snd_queue *sq;</div><div class='ctx'> 	struct netdev_queue *txq;</div><div class='ctx'> </div><div class='add'>+	/* Check for minimum and maximum packet length */</div><div class='add'>+	if (skb-&gt;len &lt;= ETH_HLEN ||</div><div class='add'>+	    (!skb_shinfo(skb)-&gt;gso_size &amp;&amp; skb-&gt;len &gt; vf-&gt;tx_max_pktlen)) {</div><div class='add'>+		dev_stats = &amp;vf-&gt;hw.dev_stats;</div><div class='add'>+		atomic_long_inc(&amp;dev_stats-&gt;tx_discards);</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	sq = &amp;vf-&gt;qset.sq[qidx];</div><div class='ctx'> 	txq = netdev_get_tx_queue(netdev, qidx);</div><div class='ctx'> </div><div class='del'>-	if (!otx2_sq_append_skb(netdev, sq, skb, qidx)) {</div><div class='add'>+	if (!otx2_sq_append_skb(vf, txq, sq, skb, qidx)) {</div><div class='ctx'> 		netif_tx_stop_queue(txq);</div><div class='ctx'> </div><div class='ctx'> 		/* Check again, incase SQBs got freed up */</div><div class='hunk'>@@ -496,8 +534,9 @@ static const struct net_device_ops otx2vf_netdev_ops = {</div><div class='ctx'> 	.ndo_set_features = otx2vf_set_features,</div><div class='ctx'> 	.ndo_get_stats64 = otx2_get_stats64,</div><div class='ctx'> 	.ndo_tx_timeout = otx2_tx_timeout,</div><div class='del'>-	.ndo_eth_ioctl	= otx2_ioctl,</div><div class='ctx'> 	.ndo_setup_tc = otx2_setup_tc,</div><div class='add'>+	.ndo_hwtstamp_get = otx2_config_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = otx2_config_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int otx2_vf_wq_init(struct otx2_nic *vf)</div><div class='hunk'>@@ -546,7 +585,7 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = pci_request_regions(pdev, DRV_NAME);</div><div class='add'>+	err = pcim_request_all_regions(pdev, DRV_NAME);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "PCI request regions failed 0x%x\n", err);</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -555,7 +594,7 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "DMA mask config failed, abort\n");</div><div class='del'>-		goto err_release_regions;</div><div class='add'>+		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='hunk'>@@ -563,10 +602,8 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	qcount = num_online_cpus();</div><div class='ctx'> 	qos_txqs = min_t(int, qcount, OTX2_QOS_MAX_LEAF_NODES);</div><div class='ctx'> 	netdev = alloc_etherdev_mqs(sizeof(*vf), qcount + qos_txqs, qcount);</div><div class='del'>-	if (!netdev) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_release_regions;</div><div class='del'>-	}</div><div class='add'>+	if (!netdev)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, netdev);</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='hunk'>@@ -616,6 +653,12 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	otx2_setup_dev_hw_settings(vf);</div><div class='add'>+</div><div class='add'>+	if (is_cn20k(vf-&gt;pdev))</div><div class='add'>+		cn20k_init(vf);</div><div class='add'>+	else</div><div class='add'>+		otx2_init_hw_ops(vf);</div><div class='add'>+</div><div class='ctx'> 	/* Init VF &lt;=&gt; PF mailbox stuff */</div><div class='ctx'> 	err = otx2vf_vfaf_mbox_init(vf);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -683,10 +726,23 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 		snprintf(netdev-&gt;name, sizeof(netdev-&gt;name), "lbk%d", n);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (is_otx2_sdp_rep(vf-&gt;pdev)) {</div><div class='add'>+		int n;</div><div class='add'>+</div><div class='add'>+		n = vf-&gt;pcifunc &amp; RVU_PFVF_FUNC_MASK;</div><div class='add'>+		n -= 1;</div><div class='add'>+		snprintf(netdev-&gt;name, sizeof(netdev-&gt;name), "sdp%d-%d",</div><div class='add'>+			 pdev-&gt;bus-&gt;number, n);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = cn10k_ipsec_init(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_ptp_destroy;</div><div class='add'>+</div><div class='ctx'> 	err = register_netdev(netdev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Failed to register netdevice\n");</div><div class='del'>-		goto err_ptp_destroy;</div><div class='add'>+		goto err_ipsec_clean;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = otx2_vf_wq_init(vf);</div><div class='hunk'>@@ -707,19 +763,36 @@ static int otx2vf_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_shutdown_tc;</div><div class='ctx'> </div><div class='add'>+	vf-&gt;af_xdp_zc_qidx = bitmap_zalloc(qcount, GFP_KERNEL);</div><div class='add'>+	if (!vf-&gt;af_xdp_zc_qidx) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_unreg_devlink;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DCB</div><div class='del'>-	err = otx2_dcbnl_set_ops(netdev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_shutdown_tc;</div><div class='add'>+	/* Priority flow control is not supported for LBK and SDP vf(s) */</div><div class='add'>+	if (!(is_otx2_lbkvf(vf-&gt;pdev) || is_otx2_sdp_rep(vf-&gt;pdev))) {</div><div class='add'>+		err = otx2_dcbnl_set_ops(netdev);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_free_zc_bmap;</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='ctx'> 	otx2_qos_init(vf, qos_txqs);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DCB</div><div class='add'>+err_free_zc_bmap:</div><div class='add'>+	bitmap_free(vf-&gt;af_xdp_zc_qidx);</div><div class='add'>+#endif</div><div class='add'>+err_unreg_devlink:</div><div class='add'>+	otx2_unregister_dl(vf);</div><div class='ctx'> err_shutdown_tc:</div><div class='ctx'> 	otx2_shutdown_tc(vf);</div><div class='ctx'> err_unreg_netdev:</div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='add'>+err_ipsec_clean:</div><div class='add'>+	cn10k_ipsec_clean(vf);</div><div class='ctx'> err_ptp_destroy:</div><div class='ctx'> 	otx2_ptp_destroy(vf);</div><div class='ctx'> err_detach_rsrc:</div><div class='hunk'>@@ -736,8 +809,6 @@ err_free_irq_vectors:</div><div class='ctx'> err_free_netdev:</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	free_netdev(netdev);</div><div class='del'>-err_release_regions:</div><div class='del'>-	pci_release_regions(pdev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -772,6 +843,7 @@ static void otx2vf_remove(struct pci_dev *pdev)</div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='ctx'> 	if (vf-&gt;otx2_wq)</div><div class='ctx'> 		destroy_workqueue(vf-&gt;otx2_wq);</div><div class='add'>+	cn10k_ipsec_clean(vf);</div><div class='ctx'> 	otx2_ptp_destroy(vf);</div><div class='ctx'> 	otx2_mcam_flow_del(vf);</div><div class='ctx'> 	otx2_shutdown_tc(vf);</div><div class='hunk'>@@ -783,10 +855,9 @@ static void otx2vf_remove(struct pci_dev *pdev)</div><div class='ctx'> 		qmem_free(vf-&gt;dev, vf-&gt;dync_lmt);</div><div class='ctx'> 	otx2vf_vfaf_mbox_destroy(vf);</div><div class='ctx'> 	pci_free_irq_vectors(vf-&gt;pdev);</div><div class='add'>+	bitmap_free(vf-&gt;af_xdp_zc_qidx);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	free_netdev(netdev);</div><div class='del'>-</div><div class='del'>-	pci_release_regions(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver otx2vf_driver = {</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c<br/>new file mode 100644<br/>index 000000000000..7d67b4cbaf71<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c</a></div><div class='hunk'>@@ -0,0 +1,245 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Marvell RVU Ethernet driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+#include &lt;linux/stringify.h&gt;</div><div class='add'>+#include &lt;net/xdp_sock_drv.h&gt;</div><div class='add'>+#include &lt;net/xdp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "otx2_common.h"</div><div class='add'>+#include "otx2_struct.h"</div><div class='add'>+#include "otx2_xsk.h"</div><div class='add'>+</div><div class='add'>+int otx2_xsk_pool_alloc_buf(struct otx2_nic *pfvf, struct otx2_pool *pool,</div><div class='add'>+			    dma_addr_t *dma, int idx)</div><div class='add'>+{</div><div class='add'>+	struct xdp_buff *xdp;</div><div class='add'>+	int delta;</div><div class='add'>+</div><div class='add'>+	xdp = xsk_buff_alloc(pool-&gt;xsk_pool);</div><div class='add'>+	if (!xdp)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pool-&gt;xdp[pool-&gt;xdp_top++] = xdp;</div><div class='add'>+	*dma = OTX2_DATA_ALIGN(xsk_buff_xdp_get_dma(xdp));</div><div class='add'>+	/* Adjust xdp-&gt;data for unaligned addresses */</div><div class='add'>+	delta = *dma - xsk_buff_xdp_get_dma(xdp);</div><div class='add'>+	xdp-&gt;data += delta;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int otx2_xsk_ctx_disable(struct otx2_nic *pfvf, u16 qidx, int aura_id)</div><div class='add'>+{</div><div class='add'>+	struct nix_cn10k_aq_enq_req *cn10k_rq_aq;</div><div class='add'>+	struct npa_aq_enq_req *aura_aq;</div><div class='add'>+	struct npa_aq_enq_req *pool_aq;</div><div class='add'>+	struct nix_aq_enq_req *rq_aq;</div><div class='add'>+</div><div class='add'>+	if (test_bit(CN10K_LMTST, &amp;pfvf-&gt;hw.cap_flag)) {</div><div class='add'>+		cn10k_rq_aq = otx2_mbox_alloc_msg_nix_cn10k_aq_enq(&amp;pfvf-&gt;mbox);</div><div class='add'>+		if (!cn10k_rq_aq)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		cn10k_rq_aq-&gt;qidx = qidx;</div><div class='add'>+		cn10k_rq_aq-&gt;rq.ena = 0;</div><div class='add'>+		cn10k_rq_aq-&gt;rq_mask.ena = 1;</div><div class='add'>+		cn10k_rq_aq-&gt;ctype = NIX_AQ_CTYPE_RQ;</div><div class='add'>+		cn10k_rq_aq-&gt;op = NIX_AQ_INSTOP_WRITE;</div><div class='add'>+	} else {</div><div class='add'>+		rq_aq = otx2_mbox_alloc_msg_nix_aq_enq(&amp;pfvf-&gt;mbox);</div><div class='add'>+		if (!rq_aq)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		rq_aq-&gt;qidx = qidx;</div><div class='add'>+		rq_aq-&gt;sq.ena = 0;</div><div class='add'>+		rq_aq-&gt;sq_mask.ena = 1;</div><div class='add'>+		rq_aq-&gt;ctype = NIX_AQ_CTYPE_RQ;</div><div class='add'>+		rq_aq-&gt;op = NIX_AQ_INSTOP_WRITE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aura_aq = otx2_mbox_alloc_msg_npa_aq_enq(&amp;pfvf-&gt;mbox);</div><div class='add'>+	if (!aura_aq)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	aura_aq-&gt;aura_id = aura_id;</div><div class='add'>+	aura_aq-&gt;aura.ena = 0;</div><div class='add'>+	aura_aq-&gt;aura_mask.ena = 1;</div><div class='add'>+	aura_aq-&gt;ctype = NPA_AQ_CTYPE_AURA;</div><div class='add'>+	aura_aq-&gt;op = NPA_AQ_INSTOP_WRITE;</div><div class='add'>+</div><div class='add'>+	pool_aq = otx2_mbox_alloc_msg_npa_aq_enq(&amp;pfvf-&gt;mbox);</div><div class='add'>+	if (!pool_aq)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	pool_aq-&gt;aura_id = aura_id;</div><div class='add'>+	pool_aq-&gt;pool.ena = 0;</div><div class='add'>+	pool_aq-&gt;pool_mask.ena = 1;</div><div class='add'>+</div><div class='add'>+	pool_aq-&gt;ctype = NPA_AQ_CTYPE_POOL;</div><div class='add'>+	pool_aq-&gt;op = NPA_AQ_INSTOP_WRITE;</div><div class='add'>+</div><div class='add'>+	return otx2_sync_mbox_msg(&amp;pfvf-&gt;mbox);</div><div class='add'>+</div><div class='add'>+fail:</div><div class='add'>+	otx2_mbox_reset(&amp;pfvf-&gt;mbox.mbox, 0);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void otx2_clean_up_rq(struct otx2_nic *pfvf, int qidx)</div><div class='add'>+{</div><div class='add'>+	struct otx2_qset *qset = &amp;pfvf-&gt;qset;</div><div class='add'>+	struct otx2_cq_queue *cq;</div><div class='add'>+	struct otx2_pool *pool;</div><div class='add'>+	u64 iova;</div><div class='add'>+</div><div class='add'>+	/* If the DOWN flag is set SQs are already freed */</div><div class='add'>+	if (pfvf-&gt;flags &amp; OTX2_FLAG_INTF_DOWN)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cq = &amp;qset-&gt;cq[qidx];</div><div class='add'>+	if (cq)</div><div class='add'>+		otx2_cleanup_rx_cqes(pfvf, cq, qidx);</div><div class='add'>+</div><div class='add'>+	pool = &amp;pfvf-&gt;qset.pool[qidx];</div><div class='add'>+	iova = otx2_aura_allocptr(pfvf, qidx);</div><div class='add'>+	while (iova) {</div><div class='add'>+		iova -= OTX2_HEAD_ROOM;</div><div class='add'>+		otx2_free_bufs(pfvf, pool, iova, pfvf-&gt;rbsize);</div><div class='add'>+		iova = otx2_aura_allocptr(pfvf, qidx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pfvf-&gt;mbox.lock);</div><div class='add'>+	otx2_xsk_ctx_disable(pfvf, qidx, qidx);</div><div class='add'>+	mutex_unlock(&amp;pfvf-&gt;mbox.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int otx2_xsk_pool_enable(struct otx2_nic *pf, struct xsk_buff_pool *pool, u16 qidx)</div><div class='add'>+{</div><div class='add'>+	u16 rx_queues = pf-&gt;hw.rx_queues;</div><div class='add'>+	u16 tx_queues = pf-&gt;hw.tx_queues;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (qidx &gt;= rx_queues || qidx &gt;= tx_queues)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = xsk_pool_dma_map(pool, pf-&gt;dev, DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	set_bit(qidx, pf-&gt;af_xdp_zc_qidx);</div><div class='add'>+	otx2_clean_up_rq(pf, qidx);</div><div class='add'>+	/* Reconfigure RSS table as 'qidx' cannot be part of RSS now */</div><div class='add'>+	otx2_set_rss_table(pf, DEFAULT_RSS_CONTEXT_GROUP, NULL);</div><div class='add'>+	/* Kick start the NAPI context so that receiving will start */</div><div class='add'>+	return otx2_xsk_wakeup(pf-&gt;netdev, qidx, XDP_WAKEUP_RX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int otx2_xsk_pool_disable(struct otx2_nic *pf, u16 qidx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = pf-&gt;netdev;</div><div class='add'>+	struct xsk_buff_pool *pool;</div><div class='add'>+	struct otx2_snd_queue *sq;</div><div class='add'>+</div><div class='add'>+	pool = xsk_get_pool_from_qid(netdev, qidx);</div><div class='add'>+	if (!pool)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	sq = &amp;pf-&gt;qset.sq[qidx + pf-&gt;hw.tx_queues];</div><div class='add'>+	sq-&gt;xsk_pool = NULL;</div><div class='add'>+	otx2_clean_up_rq(pf, qidx);</div><div class='add'>+	clear_bit(qidx, pf-&gt;af_xdp_zc_qidx);</div><div class='add'>+	xsk_pool_dma_unmap(pool, DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING);</div><div class='add'>+	/* Reconfigure RSS table as 'qidx' now need to be part of RSS now */</div><div class='add'>+	otx2_set_rss_table(pf, DEFAULT_RSS_CONTEXT_GROUP, NULL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int otx2_xsk_pool_setup(struct otx2_nic *pf, struct xsk_buff_pool *pool, u16 qidx)</div><div class='add'>+{</div><div class='add'>+	if (pool)</div><div class='add'>+		return otx2_xsk_pool_enable(pf, pool, qidx);</div><div class='add'>+</div><div class='add'>+	return otx2_xsk_pool_disable(pf, qidx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int otx2_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct otx2_nic *pf = netdev_priv(dev);</div><div class='add'>+	struct otx2_cq_poll *cq_poll = NULL;</div><div class='add'>+	struct otx2_qset *qset = &amp;pf-&gt;qset;</div><div class='add'>+</div><div class='add'>+	if (pf-&gt;flags &amp; OTX2_FLAG_INTF_DOWN)</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	if (queue_id &gt;= pf-&gt;hw.rx_queues || queue_id &gt;= pf-&gt;hw.tx_queues)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cq_poll = &amp;qset-&gt;napi[queue_id];</div><div class='add'>+	if (!cq_poll)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Trigger interrupt */</div><div class='add'>+	if (!napi_if_scheduled_mark_missed(&amp;cq_poll-&gt;napi)) {</div><div class='add'>+		otx2_write64(pf, NIX_LF_CINTX_ENA_W1S(cq_poll-&gt;cint_idx), BIT_ULL(0));</div><div class='add'>+		otx2_write64(pf, NIX_LF_CINTX_INT_W1S(cq_poll-&gt;cint_idx), BIT_ULL(0));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void otx2_attach_xsk_buff(struct otx2_nic *pfvf, struct otx2_snd_queue *sq, int qidx)</div><div class='add'>+{</div><div class='add'>+	if (test_bit(qidx, pfvf-&gt;af_xdp_zc_qidx))</div><div class='add'>+		sq-&gt;xsk_pool = xsk_get_pool_from_qid(pfvf-&gt;netdev, qidx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void otx2_xsk_sq_append_pkt(struct otx2_nic *pfvf, u64 iova, int len,</div><div class='add'>+				   u16 qidx)</div><div class='add'>+{</div><div class='add'>+	struct nix_sqe_hdr_s *sqe_hdr;</div><div class='add'>+	struct otx2_snd_queue *sq;</div><div class='add'>+	int offset;</div><div class='add'>+</div><div class='add'>+	sq = &amp;pfvf-&gt;qset.sq[qidx];</div><div class='add'>+	memset(sq-&gt;sqe_base + 8, 0, sq-&gt;sqe_size - 8);</div><div class='add'>+</div><div class='add'>+	sqe_hdr = (struct nix_sqe_hdr_s *)(sq-&gt;sqe_base);</div><div class='add'>+</div><div class='add'>+	if (!sqe_hdr-&gt;total) {</div><div class='add'>+		sqe_hdr-&gt;aura = sq-&gt;aura_id;</div><div class='add'>+		sqe_hdr-&gt;df = 1;</div><div class='add'>+		sqe_hdr-&gt;sq = qidx;</div><div class='add'>+		sqe_hdr-&gt;pnc = 1;</div><div class='add'>+	}</div><div class='add'>+	sqe_hdr-&gt;total = len;</div><div class='add'>+	sqe_hdr-&gt;sqe_id = sq-&gt;head;</div><div class='add'>+</div><div class='add'>+	offset = sizeof(*sqe_hdr);</div><div class='add'>+</div><div class='add'>+	otx2_xdp_sqe_add_sg(sq, NULL, iova, len, &amp;offset, OTX2_AF_XDP_FRAME);</div><div class='add'>+	sqe_hdr-&gt;sizem1 = (offset / 16) - 1;</div><div class='add'>+	pfvf-&gt;hw_ops-&gt;sqe_flush(pfvf, sq, offset, qidx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void otx2_zc_napi_handler(struct otx2_nic *pfvf, struct xsk_buff_pool *pool,</div><div class='add'>+			  int queue, int budget)</div><div class='add'>+{</div><div class='add'>+	struct xdp_desc *xdp_desc = pool-&gt;tx_descs;</div><div class='add'>+	int  i, batch;</div><div class='add'>+</div><div class='add'>+	budget = min(budget, otx2_read_free_sqe(pfvf, queue));</div><div class='add'>+	batch = xsk_tx_peek_release_desc_batch(pool, budget);</div><div class='add'>+	if (!batch)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; batch; i++) {</div><div class='add'>+		dma_addr_t dma_addr;</div><div class='add'>+</div><div class='add'>+		dma_addr = xsk_buff_raw_get_dma(pool, xdp_desc[i].addr);</div><div class='add'>+		otx2_xsk_sq_append_pkt(pfvf, dma_addr, xdp_desc[i].len, queue);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.h<br/>new file mode 100644<br/>index 000000000000..8047fafee8fe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.h</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Marvell RVU PF/VF Netdev Devlink</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef	OTX2_XSK_H</div><div class='add'>+#define	OTX2_XSK_H</div><div class='add'>+</div><div class='add'>+struct otx2_nic;</div><div class='add'>+struct xsk_buff_pool;</div><div class='add'>+</div><div class='add'>+int otx2_xsk_pool_setup(struct otx2_nic *pf, struct xsk_buff_pool *pool, u16 qid);</div><div class='add'>+int otx2_xsk_pool_enable(struct otx2_nic *pf, struct xsk_buff_pool *pool, u16 qid);</div><div class='add'>+int otx2_xsk_pool_disable(struct otx2_nic *pf, u16 qid);</div><div class='add'>+int otx2_xsk_pool_alloc_buf(struct otx2_nic *pfvf, struct otx2_pool *pool,</div><div class='add'>+			    dma_addr_t *dma, int idx);</div><div class='add'>+int otx2_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags);</div><div class='add'>+void otx2_zc_napi_handler(struct otx2_nic *pfvf, struct xsk_buff_pool *pool,</div><div class='add'>+			  int queue, int budget);</div><div class='add'>+void otx2_attach_xsk_buff(struct otx2_nic *pfvf, struct otx2_snd_queue *sq, int qidx);</div><div class='add'>+</div><div class='add'>+#endif /* OTX2_XSK_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/qos.c b/drivers/net/ethernet/marvell/octeontx2/nic/qos.c<br/>index 0f844c14485a..5765bac119f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/qos.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/qos.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/qos.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/qos.c</a></div><div class='hunk'>@@ -165,6 +165,11 @@ static void __otx2_qos_txschq_cfg(struct otx2_nic *pfvf,</div><div class='ctx'> </div><div class='ctx'> 		otx2_config_sched_shaping(pfvf, node, cfg, &amp;num_regs);</div><div class='ctx'> 	} else if (level == NIX_TXSCH_LVL_TL2) {</div><div class='add'>+		/* configure parent txschq */</div><div class='add'>+		cfg-&gt;reg[num_regs] = NIX_AF_TL2X_PARENT(node-&gt;schq);</div><div class='add'>+		cfg-&gt;regval[num_regs] = (u64)hw-&gt;tx_link &lt;&lt; 16;</div><div class='add'>+		num_regs++;</div><div class='add'>+</div><div class='ctx'> 		/* configure link cfg */</div><div class='ctx'> 		if (level == pfvf-&gt;qos.link_cfg_lvl) {</div><div class='ctx'> 			cfg-&gt;reg[num_regs] = NIX_AF_TL3_TL2X_LINKX_CFG(node-&gt;schq, hw-&gt;tx_link);</div><div class='hunk'>@@ -1633,6 +1638,7 @@ static int otx2_qos_leaf_del_last(struct otx2_nic *pfvf, u16 classid, bool force</div><div class='ctx'> 	if (!node-&gt;is_static)</div><div class='ctx'> 		dwrr_del_node = true;</div><div class='ctx'> </div><div class='add'>+	WRITE_ONCE(node-&gt;qid, OTX2_QOS_QID_INNER);</div><div class='ctx'> 	/* destroy the leaf node */</div><div class='ctx'> 	otx2_qos_disable_sq(pfvf, qid);</div><div class='ctx'> 	otx2_qos_destroy_node(pfvf, node);</div><div class='hunk'>@@ -1677,9 +1683,6 @@ static int otx2_qos_leaf_del_last(struct otx2_nic *pfvf, u16 classid, bool force</div><div class='ctx'> 	}</div><div class='ctx'> 	kfree(new_cfg);</div><div class='ctx'> </div><div class='del'>-	/* update tx_real_queues */</div><div class='del'>-	otx2_qos_update_tx_netdev_queues(pfvf);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c b/drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c<br/>index 9d887bfc3108..2872adabc830 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c</a></div><div class='hunk'>@@ -82,7 +82,7 @@ static int otx2_qos_sq_aura_pool_init(struct otx2_nic *pfvf, int qidx)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (ptr = 0; ptr &lt; num_sqbs; ptr++) {</div><div class='del'>-		err = otx2_alloc_rbuf(pfvf, pool, &amp;bufptr);</div><div class='add'>+		err = otx2_alloc_rbuf(pfvf, pool, &amp;bufptr, pool_id, ptr);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto sqb_free;</div><div class='ctx'> 		pfvf-&gt;hw_ops-&gt;aura_freeptr(pfvf, pool_id, bufptr);</div><div class='hunk'>@@ -151,9 +151,10 @@ static void otx2_qos_sq_free_sqbs(struct otx2_nic *pfvf, int qidx)</div><div class='ctx'> static void otx2_qos_sqb_flush(struct otx2_nic *pfvf, int qidx)</div><div class='ctx'> {</div><div class='ctx'> 	int sqe_tail, sqe_head;</div><div class='del'>-	u64 incr, *ptr, val;</div><div class='add'>+	void __iomem *ptr;</div><div class='add'>+	u64 incr, val;</div><div class='ctx'> </div><div class='del'>-	ptr = (__force u64 *)otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_STATUS);</div><div class='add'>+	ptr = otx2_get_regaddr(pfvf, NIX_LF_SQ_OP_STATUS);</div><div class='ctx'> 	incr = (u64)qidx &lt;&lt; 32;</div><div class='ctx'> 	val = otx2_atomic64_add(incr, ptr);</div><div class='ctx'> 	sqe_head = (val &gt;&gt; 20) &amp; 0x3F;</div><div class='hunk'>@@ -256,6 +257,26 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int otx2_qos_nix_npa_ndc_sync(struct otx2_nic *pfvf)</div><div class='add'>+{</div><div class='add'>+	struct ndc_sync_op *req;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pfvf-&gt;mbox.lock);</div><div class='add'>+</div><div class='add'>+	req = otx2_mbox_alloc_msg_ndc_sync_op(&amp;pfvf-&gt;mbox);</div><div class='add'>+	if (!req) {</div><div class='add'>+		mutex_unlock(&amp;pfvf-&gt;mbox.lock);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req-&gt;nix_lf_tx_sync = true;</div><div class='add'>+	req-&gt;npa_lf_sync = true;</div><div class='add'>+	rc = otx2_sync_mbox_msg(&amp;pfvf-&gt;mbox);</div><div class='add'>+	mutex_unlock(&amp;pfvf-&gt;mbox.lock);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void otx2_qos_disable_sq(struct otx2_nic *pfvf, int qidx)</div><div class='ctx'> {</div><div class='ctx'> 	struct otx2_qset *qset = &amp;pfvf-&gt;qset;</div><div class='hunk'>@@ -285,6 +306,8 @@ void otx2_qos_disable_sq(struct otx2_nic *pfvf, int qidx)</div><div class='ctx'> </div><div class='ctx'> 	otx2_qos_sqb_flush(pfvf, sq_idx);</div><div class='ctx'> 	otx2_smq_flush(pfvf, otx2_get_smq_idx(pfvf, sq_idx));</div><div class='add'>+	/* NIX/NPA NDC sync */</div><div class='add'>+	otx2_qos_nix_npa_ndc_sync(pfvf);</div><div class='ctx'> 	otx2_cleanup_tx_cqes(pfvf, cq);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pfvf-&gt;mbox.lock);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/rep.c b/drivers/net/ethernet/marvell/octeontx2/nic/rep.c<br/>new file mode 100644<br/>index 000000000000..b476733a0234<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/rep.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/rep.c</a></div><div class='hunk'>@@ -0,0 +1,879 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Marvell RVU representor driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='add'>+#include &lt;linux/sort.h&gt;</div><div class='add'>+</div><div class='add'>+#include "otx2_common.h"</div><div class='add'>+#include "cn10k.h"</div><div class='add'>+#include "otx2_reg.h"</div><div class='add'>+#include "rep.h"</div><div class='add'>+</div><div class='add'>+#define DRV_NAME	"rvu_rep"</div><div class='add'>+#define DRV_STRING	"Marvell RVU Representor Driver"</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id rvu_rep_id_table[] = {</div><div class='add'>+	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_RVU_REP) },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Marvell International Ltd.");</div><div class='add'>+MODULE_DESCRIPTION(DRV_STRING);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DEVICE_TABLE(pci, rvu_rep_id_table);</div><div class='add'>+</div><div class='add'>+static int rvu_rep_notify_pfvf(struct otx2_nic *priv, u16 event,</div><div class='add'>+			       struct rep_event *data);</div><div class='add'>+</div><div class='add'>+static int rvu_rep_mcam_flow_init(struct rep_dev *rep)</div><div class='add'>+{</div><div class='add'>+	struct npc_mcam_alloc_entry_req *req;</div><div class='add'>+	struct npc_mcam_alloc_entry_rsp *rsp;</div><div class='add'>+	struct otx2_nic *priv = rep-&gt;mdev;</div><div class='add'>+	int ent, allocated = 0;</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	rep-&gt;flow_cfg = kcalloc(1, sizeof(struct otx2_flow_config), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!rep-&gt;flow_cfg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	count = OTX2_DEFAULT_FLOWCOUNT;</div><div class='add'>+</div><div class='add'>+	rep-&gt;flow_cfg-&gt;flow_ent = kcalloc(count, sizeof(u16), GFP_KERNEL);</div><div class='add'>+	if (!rep-&gt;flow_cfg-&gt;flow_ent)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	while (allocated &lt; count) {</div><div class='add'>+		req = otx2_mbox_alloc_msg_npc_mcam_alloc_entry(&amp;priv-&gt;mbox);</div><div class='add'>+		if (!req)</div><div class='add'>+			goto exit;</div><div class='add'>+</div><div class='add'>+		req-&gt;hdr.pcifunc = rep-&gt;pcifunc;</div><div class='add'>+		req-&gt;contig = false;</div><div class='add'>+		req-&gt;ref_entry = 0;</div><div class='add'>+		req-&gt;count = (count - allocated) &gt; NPC_MAX_NONCONTIG_ENTRIES ?</div><div class='add'>+				NPC_MAX_NONCONTIG_ENTRIES : count - allocated;</div><div class='add'>+</div><div class='add'>+		if (otx2_sync_mbox_msg(&amp;priv-&gt;mbox))</div><div class='add'>+			goto exit;</div><div class='add'>+</div><div class='add'>+		rsp = (struct npc_mcam_alloc_entry_rsp *)otx2_mbox_get_rsp</div><div class='add'>+			(&amp;priv-&gt;mbox.mbox, 0, &amp;req-&gt;hdr);</div><div class='add'>+		if (IS_ERR(rsp))</div><div class='add'>+			goto exit;</div><div class='add'>+</div><div class='add'>+		for (ent = 0; ent &lt; rsp-&gt;count; ent++)</div><div class='add'>+			rep-&gt;flow_cfg-&gt;flow_ent[ent + allocated] = rsp-&gt;entry_list[ent];</div><div class='add'>+</div><div class='add'>+		allocated += rsp-&gt;count;</div><div class='add'>+</div><div class='add'>+		if (rsp-&gt;count != req-&gt;count)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+exit:</div><div class='add'>+	/* Multiple MCAM entry alloc requests could result in non-sequential</div><div class='add'>+	 * MCAM entries in the flow_ent[] array. Sort them in an ascending</div><div class='add'>+	 * order, otherwise user installed ntuple filter index and MCAM entry</div><div class='add'>+	 * index will not be in sync.</div><div class='add'>+	 */</div><div class='add'>+	if (allocated)</div><div class='add'>+		sort(&amp;rep-&gt;flow_cfg-&gt;flow_ent[0], allocated,</div><div class='add'>+		     sizeof(rep-&gt;flow_cfg-&gt;flow_ent[0]), mcam_entry_cmp, NULL);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+</div><div class='add'>+	rep-&gt;flow_cfg-&gt;max_flows = allocated;</div><div class='add'>+</div><div class='add'>+	if (allocated) {</div><div class='add'>+		rep-&gt;flags |= OTX2_FLAG_MCAM_ENTRIES_ALLOC;</div><div class='add'>+		rep-&gt;flags |= OTX2_FLAG_NTUPLE_SUPPORT;</div><div class='add'>+		rep-&gt;flags |= OTX2_FLAG_TC_FLOWER_SUPPORT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;rep-&gt;flow_cfg-&gt;flow_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;rep-&gt;flow_cfg-&gt;flow_list_tc);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_setup_tc_cb(enum tc_setup_type type,</div><div class='add'>+			       void *type_data, void *cb_priv)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep = cb_priv;</div><div class='add'>+	struct otx2_nic *priv = rep-&gt;mdev;</div><div class='add'>+</div><div class='add'>+	if (!(rep-&gt;flags &amp; RVU_REP_VF_INITIALIZED))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!(rep-&gt;flags &amp; OTX2_FLAG_TC_FLOWER_SUPPORT))</div><div class='add'>+		rvu_rep_mcam_flow_init(rep);</div><div class='add'>+</div><div class='add'>+	priv-&gt;netdev = rep-&gt;netdev;</div><div class='add'>+	priv-&gt;flags = rep-&gt;flags;</div><div class='add'>+	priv-&gt;pcifunc = rep-&gt;pcifunc;</div><div class='add'>+	priv-&gt;flow_cfg = rep-&gt;flow_cfg;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_CLSFLOWER:</div><div class='add'>+		return otx2_setup_tc_cls_flower(priv, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static LIST_HEAD(rvu_rep_block_cb_list);</div><div class='add'>+static int rvu_rep_setup_tc(struct net_device *netdev, enum tc_setup_type type,</div><div class='add'>+			    void *type_data)</div><div class='add'>+{</div><div class='add'>+	struct rvu_rep *rep = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_BLOCK:</div><div class='add'>+		return flow_block_cb_setup_simple(type_data,</div><div class='add'>+						  &amp;rvu_rep_block_cb_list,</div><div class='add'>+						  rvu_rep_setup_tc_cb,</div><div class='add'>+						  rep, rep, true);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+rvu_rep_sp_stats64(const struct net_device *dev,</div><div class='add'>+		   struct rtnl_link_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep = netdev_priv(dev);</div><div class='add'>+	struct otx2_nic *priv = rep-&gt;mdev;</div><div class='add'>+	struct otx2_rcv_queue *rq;</div><div class='add'>+	struct otx2_snd_queue *sq;</div><div class='add'>+	u16 qidx = rep-&gt;rep_id;</div><div class='add'>+</div><div class='add'>+	otx2_update_rq_stats(priv, qidx);</div><div class='add'>+	rq = &amp;priv-&gt;qset.rq[qidx];</div><div class='add'>+</div><div class='add'>+	otx2_update_sq_stats(priv, qidx);</div><div class='add'>+	sq = &amp;priv-&gt;qset.sq[qidx];</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_bytes = sq-&gt;stats.bytes;</div><div class='add'>+	stats-&gt;tx_packets = sq-&gt;stats.pkts;</div><div class='add'>+	stats-&gt;rx_bytes = rq-&gt;stats.bytes;</div><div class='add'>+	stats-&gt;rx_packets = rq-&gt;stats.pkts;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+rvu_rep_has_offload_stats(const struct net_device *dev, int attr_id)</div><div class='add'>+{</div><div class='add'>+	return attr_id == IFLA_OFFLOAD_XSTATS_CPU_HIT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+rvu_rep_get_offload_stats(int attr_id, const struct net_device *dev,</div><div class='add'>+			  void *sp)</div><div class='add'>+{</div><div class='add'>+	if (attr_id == IFLA_OFFLOAD_XSTATS_CPU_HIT)</div><div class='add'>+		return rvu_rep_sp_stats64(dev, (struct rtnl_link_stats64 *)sp);</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_dl_port_fn_hw_addr_get(struct devlink_port *port,</div><div class='add'>+					  u8 *hw_addr, int *hw_addr_len,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep = container_of(port, struct rep_dev, dl_port);</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(hw_addr, rep-&gt;mac);</div><div class='add'>+	*hw_addr_len = ETH_ALEN;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_dl_port_fn_hw_addr_set(struct devlink_port *port,</div><div class='add'>+					  const u8 *hw_addr, int hw_addr_len,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep = container_of(port, struct rep_dev, dl_port);</div><div class='add'>+	struct otx2_nic *priv = rep-&gt;mdev;</div><div class='add'>+	struct rep_event evt = {0};</div><div class='add'>+</div><div class='add'>+	eth_hw_addr_set(rep-&gt;netdev, hw_addr);</div><div class='add'>+	ether_addr_copy(rep-&gt;mac, hw_addr);</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(evt.evt_data.mac, hw_addr);</div><div class='add'>+	evt.pcifunc = rep-&gt;pcifunc;</div><div class='add'>+	rvu_rep_notify_pfvf(priv, RVU_EVENT_MAC_ADDR_CHANGE, &amp;evt);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_port_ops rvu_rep_dl_port_ops = {</div><div class='add'>+	.port_fn_hw_addr_get = rvu_rep_dl_port_fn_hw_addr_get,</div><div class='add'>+	.port_fn_hw_addr_set = rvu_rep_dl_port_fn_hw_addr_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rvu_rep_devlink_set_switch_id(struct otx2_nic *priv,</div><div class='add'>+			      struct netdev_phys_item_id *ppid)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = priv-&gt;pdev;</div><div class='add'>+	u64 id;</div><div class='add'>+</div><div class='add'>+	id = pci_get_dsn(pdev);</div><div class='add'>+</div><div class='add'>+	ppid-&gt;id_len = sizeof(id);</div><div class='add'>+	put_unaligned_be64(id, &amp;ppid-&gt;id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rvu_rep_devlink_port_unregister(struct rep_dev *rep)</div><div class='add'>+{</div><div class='add'>+	devlink_port_unregister(&amp;rep-&gt;dl_port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_devlink_port_register(struct rep_dev *rep)</div><div class='add'>+{</div><div class='add'>+	struct devlink_port_attrs attrs = {};</div><div class='add'>+	struct otx2_nic *priv = rep-&gt;mdev;</div><div class='add'>+	struct devlink *dl = priv-&gt;dl-&gt;dl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!(rep-&gt;pcifunc &amp; RVU_PFVF_FUNC_MASK)) {</div><div class='add'>+		attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;</div><div class='add'>+		attrs.phys.port_number = rvu_get_pf(priv-&gt;pdev, rep-&gt;pcifunc);</div><div class='add'>+	} else {</div><div class='add'>+		attrs.flavour = DEVLINK_PORT_FLAVOUR_PCI_VF;</div><div class='add'>+		attrs.pci_vf.pf = rvu_get_pf(priv-&gt;pdev, rep-&gt;pcifunc);</div><div class='add'>+		attrs.pci_vf.vf = rep-&gt;pcifunc &amp; RVU_PFVF_FUNC_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rvu_rep_devlink_set_switch_id(priv, &amp;attrs.switch_id);</div><div class='add'>+	devlink_port_attrs_set(&amp;rep-&gt;dl_port, &amp;attrs);</div><div class='add'>+</div><div class='add'>+	err = devl_port_register_with_ops(dl, &amp;rep-&gt;dl_port, rep-&gt;rep_id,</div><div class='add'>+					  &amp;rvu_rep_dl_port_ops);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(rep-&gt;mdev-&gt;dev, "devlink_port_register failed: %d\n",</div><div class='add'>+			err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_get_repid(struct otx2_nic *priv, u16 pcifunc)</div><div class='add'>+{</div><div class='add'>+	int rep_id;</div><div class='add'>+</div><div class='add'>+	for (rep_id = 0; rep_id &lt; priv-&gt;rep_cnt; rep_id++)</div><div class='add'>+		if (priv-&gt;rep_pf_map[rep_id] == pcifunc)</div><div class='add'>+			return rep_id;</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_notify_pfvf(struct otx2_nic *priv, u16 event,</div><div class='add'>+			       struct rep_event *data)</div><div class='add'>+{</div><div class='add'>+	struct rep_event *req;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+	req = otx2_mbox_alloc_msg_rep_event_notify(&amp;priv-&gt;mbox);</div><div class='add'>+	if (!req) {</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	req-&gt;event = event;</div><div class='add'>+	req-&gt;pcifunc = data-&gt;pcifunc;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;req-&gt;evt_data, &amp;data-&gt;evt_data, sizeof(struct rep_evt_data));</div><div class='add'>+	otx2_sync_mbox_msg(&amp;priv-&gt;mbox);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rvu_rep_state_evt_handler(struct otx2_nic *priv,</div><div class='add'>+				      struct rep_event *info)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep;</div><div class='add'>+	int rep_id;</div><div class='add'>+</div><div class='add'>+	rep_id = rvu_rep_get_repid(priv, info-&gt;pcifunc);</div><div class='add'>+	rep = priv-&gt;reps[rep_id];</div><div class='add'>+	if (info-&gt;evt_data.vf_state)</div><div class='add'>+		rep-&gt;flags |= RVU_REP_VF_INITIALIZED;</div><div class='add'>+	else</div><div class='add'>+		rep-&gt;flags &amp;= ~RVU_REP_VF_INITIALIZED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_event_up_notify(struct otx2_nic *pf, struct rep_event *info)</div><div class='add'>+{</div><div class='add'>+	if (info-&gt;event &amp; RVU_EVENT_PFVF_STATE)</div><div class='add'>+		rvu_rep_state_evt_handler(pf, info);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_change_mtu(struct net_device *dev, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep = netdev_priv(dev);</div><div class='add'>+	struct otx2_nic *priv = rep-&gt;mdev;</div><div class='add'>+	struct rep_event evt = {0};</div><div class='add'>+</div><div class='add'>+	netdev_info(dev, "Changing MTU from %d to %d\n",</div><div class='add'>+		    dev-&gt;mtu, new_mtu);</div><div class='add'>+	dev-&gt;mtu = new_mtu;</div><div class='add'>+</div><div class='add'>+	evt.evt_data.mtu = new_mtu;</div><div class='add'>+	evt.pcifunc = rep-&gt;pcifunc;</div><div class='add'>+	rvu_rep_notify_pfvf(priv, RVU_EVENT_MTU_CHANGE, &amp;evt);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rvu_rep_get_stats(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *del_work = to_delayed_work(work);</div><div class='add'>+	struct nix_stats_req *req;</div><div class='add'>+	struct nix_stats_rsp *rsp;</div><div class='add'>+	struct rep_stats *stats;</div><div class='add'>+	struct otx2_nic *priv;</div><div class='add'>+	struct rep_dev *rep;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	rep = container_of(del_work, struct rep_dev, stats_wrk);</div><div class='add'>+	priv = rep-&gt;mdev;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+	req = otx2_mbox_alloc_msg_nix_lf_stats(&amp;priv-&gt;mbox);</div><div class='add'>+	if (!req) {</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	req-&gt;pcifunc = rep-&gt;pcifunc;</div><div class='add'>+	err = otx2_sync_mbox_msg_busy_poll(&amp;priv-&gt;mbox);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	rsp = (struct nix_stats_rsp *)</div><div class='add'>+	      otx2_mbox_get_rsp(&amp;priv-&gt;mbox.mbox, 0, &amp;req-&gt;hdr);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(rsp)) {</div><div class='add'>+		err = PTR_ERR(rsp);</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stats = &amp;rep-&gt;stats;</div><div class='add'>+	stats-&gt;rx_bytes = rsp-&gt;rx.octs;</div><div class='add'>+	stats-&gt;rx_frames = rsp-&gt;rx.ucast + rsp-&gt;rx.bcast +</div><div class='add'>+			    rsp-&gt;rx.mcast;</div><div class='add'>+	stats-&gt;rx_drops = rsp-&gt;rx.drop;</div><div class='add'>+	stats-&gt;rx_mcast_frames = rsp-&gt;rx.mcast;</div><div class='add'>+	stats-&gt;tx_bytes = rsp-&gt;tx.octs;</div><div class='add'>+	stats-&gt;tx_frames = rsp-&gt;tx.ucast + rsp-&gt;tx.bcast + rsp-&gt;tx.mcast;</div><div class='add'>+	stats-&gt;tx_drops = rsp-&gt;tx.drop +</div><div class='add'>+			  (unsigned long)atomic_long_read(&amp;stats-&gt;tx_discards);</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rvu_rep_get_stats64(struct net_device *dev,</div><div class='add'>+				struct rtnl_link_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!(rep-&gt;flags &amp; RVU_REP_VF_INITIALIZED))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_packets = rep-&gt;stats.rx_frames;</div><div class='add'>+	stats-&gt;rx_bytes = rep-&gt;stats.rx_bytes;</div><div class='add'>+	stats-&gt;rx_dropped = rep-&gt;stats.rx_drops;</div><div class='add'>+	stats-&gt;multicast = rep-&gt;stats.rx_mcast_frames;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_packets = rep-&gt;stats.tx_frames;</div><div class='add'>+	stats-&gt;tx_bytes = rep-&gt;stats.tx_bytes;</div><div class='add'>+	stats-&gt;tx_dropped = rep-&gt;stats.tx_drops;</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;rep-&gt;stats_wrk, msecs_to_jiffies(100));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_eswitch_config(struct otx2_nic *priv, u8 ena)</div><div class='add'>+{</div><div class='add'>+	struct esw_cfg_req *req;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+	req = otx2_mbox_alloc_msg_esw_cfg(&amp;priv-&gt;mbox);</div><div class='add'>+	if (!req) {</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	req-&gt;ena = ena;</div><div class='add'>+	otx2_sync_mbox_msg(&amp;priv-&gt;mbox);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t rvu_rep_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep = netdev_priv(dev);</div><div class='add'>+	struct otx2_nic *pf = rep-&gt;mdev;</div><div class='add'>+	struct otx2_snd_queue *sq;</div><div class='add'>+	struct netdev_queue *txq;</div><div class='add'>+	struct rep_stats *stats;</div><div class='add'>+</div><div class='add'>+	/* Check for minimum and maximum packet length */</div><div class='add'>+	if (skb-&gt;len &lt;= ETH_HLEN ||</div><div class='add'>+	    (!skb_shinfo(skb)-&gt;gso_size &amp;&amp; skb-&gt;len &gt; pf-&gt;tx_max_pktlen)) {</div><div class='add'>+		stats = &amp;rep-&gt;stats;</div><div class='add'>+		atomic_long_inc(&amp;stats-&gt;tx_discards);</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sq = &amp;pf-&gt;qset.sq[rep-&gt;rep_id];</div><div class='add'>+	txq = netdev_get_tx_queue(dev, 0);</div><div class='add'>+</div><div class='add'>+	if (!otx2_sq_append_skb(pf, txq, sq, skb, rep-&gt;rep_id)) {</div><div class='add'>+		netif_tx_stop_queue(txq);</div><div class='add'>+</div><div class='add'>+		/* Check again, in case SQBs got freed up */</div><div class='add'>+		smp_mb();</div><div class='add'>+		if (((sq-&gt;num_sqbs - *sq-&gt;aura_fc_addr) * sq-&gt;sqe_per_sqb)</div><div class='add'>+							&gt; sq-&gt;sqe_thresh)</div><div class='add'>+			netif_tx_wake_queue(txq);</div><div class='add'>+</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep = netdev_priv(dev);</div><div class='add'>+	struct otx2_nic *priv = rep-&gt;mdev;</div><div class='add'>+	struct rep_event evt = {0};</div><div class='add'>+</div><div class='add'>+	if (!(rep-&gt;flags &amp; RVU_REP_VF_INITIALIZED))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netif_carrier_on(dev);</div><div class='add'>+	netif_tx_start_all_queues(dev);</div><div class='add'>+</div><div class='add'>+	evt.event = RVU_EVENT_PORT_STATE;</div><div class='add'>+	evt.evt_data.port_state = 1;</div><div class='add'>+	evt.pcifunc = rep-&gt;pcifunc;</div><div class='add'>+	rvu_rep_notify_pfvf(priv, RVU_EVENT_PORT_STATE, &amp;evt);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_stop(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep = netdev_priv(dev);</div><div class='add'>+	struct otx2_nic *priv = rep-&gt;mdev;</div><div class='add'>+	struct rep_event evt = {0};</div><div class='add'>+</div><div class='add'>+	if (!(rep-&gt;flags &amp; RVU_REP_VF_INITIALIZED))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(dev);</div><div class='add'>+	netif_tx_disable(dev);</div><div class='add'>+</div><div class='add'>+	evt.event = RVU_EVENT_PORT_STATE;</div><div class='add'>+	evt.pcifunc = rep-&gt;pcifunc;</div><div class='add'>+	rvu_rep_notify_pfvf(priv, RVU_EVENT_PORT_STATE, &amp;evt);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops rvu_rep_netdev_ops = {</div><div class='add'>+	.ndo_open		= rvu_rep_open,</div><div class='add'>+	.ndo_stop		= rvu_rep_stop,</div><div class='add'>+	.ndo_start_xmit		= rvu_rep_xmit,</div><div class='add'>+	.ndo_get_stats64	= rvu_rep_get_stats64,</div><div class='add'>+	.ndo_change_mtu		= rvu_rep_change_mtu,</div><div class='add'>+	.ndo_has_offload_stats	= rvu_rep_has_offload_stats,</div><div class='add'>+	.ndo_get_offload_stats	= rvu_rep_get_offload_stats,</div><div class='add'>+	.ndo_setup_tc		= rvu_rep_setup_tc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rvu_rep_napi_init(struct otx2_nic *priv,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct otx2_qset *qset = &amp;priv-&gt;qset;</div><div class='add'>+	struct otx2_cq_poll *cq_poll = NULL;</div><div class='add'>+	struct otx2_hw *hw = &amp;priv-&gt;hw;</div><div class='add'>+	int err = 0, qidx, vec;</div><div class='add'>+	char *irq_name;</div><div class='add'>+</div><div class='add'>+	qset-&gt;napi = kcalloc(hw-&gt;cint_cnt, sizeof(*cq_poll), GFP_KERNEL);</div><div class='add'>+	if (!qset-&gt;napi)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Register NAPI handler */</div><div class='add'>+	for (qidx = 0; qidx &lt; hw-&gt;cint_cnt; qidx++) {</div><div class='add'>+		cq_poll = &amp;qset-&gt;napi[qidx];</div><div class='add'>+		cq_poll-&gt;cint_idx = qidx;</div><div class='add'>+		cq_poll-&gt;cq_ids[CQ_RX] =</div><div class='add'>+			(qidx &lt;  hw-&gt;rx_queues) ? qidx : CINT_INVALID_CQ;</div><div class='add'>+		cq_poll-&gt;cq_ids[CQ_TX] = (qidx &lt; hw-&gt;tx_queues) ?</div><div class='add'>+					  qidx + hw-&gt;rx_queues :</div><div class='add'>+					  CINT_INVALID_CQ;</div><div class='add'>+		cq_poll-&gt;cq_ids[CQ_XDP] = CINT_INVALID_CQ;</div><div class='add'>+		cq_poll-&gt;cq_ids[CQ_QOS] = CINT_INVALID_CQ;</div><div class='add'>+</div><div class='add'>+		cq_poll-&gt;dev = (void *)priv;</div><div class='add'>+		netif_napi_add(priv-&gt;reps[qidx]-&gt;netdev, &amp;cq_poll-&gt;napi,</div><div class='add'>+			       otx2_napi_handler);</div><div class='add'>+		napi_enable(&amp;cq_poll-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+	/* Register CQ IRQ handlers */</div><div class='add'>+	vec = hw-&gt;nix_msixoff + NIX_LF_CINT_VEC_START;</div><div class='add'>+	for (qidx = 0; qidx &lt; hw-&gt;cint_cnt; qidx++) {</div><div class='add'>+		irq_name = &amp;hw-&gt;irq_name[vec * NAME_SIZE];</div><div class='add'>+</div><div class='add'>+		snprintf(irq_name, NAME_SIZE, "rep%d-rxtx-%d", qidx, qidx);</div><div class='add'>+</div><div class='add'>+		err = request_irq(pci_irq_vector(priv-&gt;pdev, vec),</div><div class='add'>+				  otx2_cq_intr_handler, 0, irq_name,</div><div class='add'>+				  &amp;qset-&gt;napi[qidx]);</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "RVU REP IRQ registration failed for CQ%d",</div><div class='add'>+					       qidx);</div><div class='add'>+			goto err_free_cints;</div><div class='add'>+		}</div><div class='add'>+		vec++;</div><div class='add'>+</div><div class='add'>+		/* Enable CQ IRQ */</div><div class='add'>+		otx2_write64(priv, NIX_LF_CINTX_INT(qidx), BIT_ULL(0));</div><div class='add'>+		otx2_write64(priv, NIX_LF_CINTX_ENA_W1S(qidx), BIT_ULL(0));</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;flags &amp;= ~OTX2_FLAG_INTF_DOWN;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_cints:</div><div class='add'>+	otx2_free_cints(priv, qidx);</div><div class='add'>+	otx2_disable_napi(priv);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rvu_rep_free_cq_rsrc(struct otx2_nic *priv)</div><div class='add'>+{</div><div class='add'>+	struct otx2_qset *qset = &amp;priv-&gt;qset;</div><div class='add'>+	struct otx2_cq_poll *cq_poll = NULL;</div><div class='add'>+	int qidx, vec;</div><div class='add'>+</div><div class='add'>+	/* Cleanup CQ NAPI and IRQ */</div><div class='add'>+	vec = priv-&gt;hw.nix_msixoff + NIX_LF_CINT_VEC_START;</div><div class='add'>+	for (qidx = 0; qidx &lt; priv-&gt;hw.cint_cnt; qidx++) {</div><div class='add'>+		/* Disable interrupt */</div><div class='add'>+		otx2_write64(priv, NIX_LF_CINTX_ENA_W1C(qidx), BIT_ULL(0));</div><div class='add'>+</div><div class='add'>+		synchronize_irq(pci_irq_vector(priv-&gt;pdev, vec));</div><div class='add'>+</div><div class='add'>+		cq_poll = &amp;qset-&gt;napi[qidx];</div><div class='add'>+		napi_synchronize(&amp;cq_poll-&gt;napi);</div><div class='add'>+		vec++;</div><div class='add'>+	}</div><div class='add'>+	otx2_free_cints(priv, priv-&gt;hw.cint_cnt);</div><div class='add'>+	otx2_disable_napi(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rvu_rep_rsrc_free(struct otx2_nic *priv)</div><div class='add'>+{</div><div class='add'>+	struct otx2_qset *qset = &amp;priv-&gt;qset;</div><div class='add'>+	struct delayed_work *work;</div><div class='add'>+	int wrk;</div><div class='add'>+</div><div class='add'>+	for (wrk = 0; wrk &lt; priv-&gt;qset.cq_cnt; wrk++) {</div><div class='add'>+		work = &amp;priv-&gt;refill_wrk[wrk].pool_refill_work;</div><div class='add'>+		cancel_delayed_work_sync(work);</div><div class='add'>+	}</div><div class='add'>+	devm_kfree(priv-&gt;dev, priv-&gt;refill_wrk);</div><div class='add'>+</div><div class='add'>+	otx2_free_hw_resources(priv);</div><div class='add'>+	otx2_free_queue_mem(qset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_rsrc_init(struct otx2_nic *priv)</div><div class='add'>+{</div><div class='add'>+	struct otx2_qset *qset = &amp;priv-&gt;qset;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = otx2_alloc_queue_mem(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw.max_mtu = otx2_get_max_mtu(priv);</div><div class='add'>+	priv-&gt;tx_max_pktlen = priv-&gt;hw.max_mtu + OTX2_ETH_HLEN;</div><div class='add'>+	priv-&gt;rbsize = ALIGN(priv-&gt;hw.rbuf_len, OTX2_ALIGN) + OTX2_HEAD_ROOM;</div><div class='add'>+</div><div class='add'>+	err = otx2_init_hw_resources(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_rsrc;</div><div class='add'>+</div><div class='add'>+	/* Set maximum frame size allowed in HW */</div><div class='add'>+	err = otx2_hw_set_mtu(priv, priv-&gt;hw.max_mtu);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "Failed to set HW MTU\n");</div><div class='add'>+		goto err_free_rsrc;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_rsrc:</div><div class='add'>+	otx2_free_hw_resources(priv);</div><div class='add'>+	otx2_free_queue_mem(qset);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rvu_rep_destroy(struct otx2_nic *priv)</div><div class='add'>+{</div><div class='add'>+	struct rep_dev *rep;</div><div class='add'>+	int rep_id;</div><div class='add'>+</div><div class='add'>+	rvu_eswitch_config(priv, false);</div><div class='add'>+	priv-&gt;flags |= OTX2_FLAG_INTF_DOWN;</div><div class='add'>+	rvu_rep_free_cq_rsrc(priv);</div><div class='add'>+	for (rep_id = 0; rep_id &lt; priv-&gt;rep_cnt; rep_id++) {</div><div class='add'>+		rep = priv-&gt;reps[rep_id];</div><div class='add'>+		unregister_netdev(rep-&gt;netdev);</div><div class='add'>+		rvu_rep_devlink_port_unregister(rep);</div><div class='add'>+		free_netdev(rep-&gt;netdev);</div><div class='add'>+		kfree(rep-&gt;flow_cfg);</div><div class='add'>+	}</div><div class='add'>+	kfree(priv-&gt;reps);</div><div class='add'>+	rvu_rep_rsrc_free(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_rep_create(struct otx2_nic *priv, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int rep_cnt = priv-&gt;rep_cnt;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct rep_dev *rep;</div><div class='add'>+	int rep_id, err;</div><div class='add'>+	u16 pcifunc;</div><div class='add'>+</div><div class='add'>+	err = rvu_rep_rsrc_init(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;reps = kcalloc(rep_cnt, sizeof(struct rep_dev *), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;reps)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (rep_id = 0; rep_id &lt; rep_cnt; rep_id++) {</div><div class='add'>+		ndev = alloc_etherdev(sizeof(*rep));</div><div class='add'>+		if (!ndev) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "PFVF representor:%d creation failed",</div><div class='add'>+					       rep_id);</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rep = netdev_priv(ndev);</div><div class='add'>+		priv-&gt;reps[rep_id] = rep;</div><div class='add'>+		rep-&gt;mdev = priv;</div><div class='add'>+		rep-&gt;netdev = ndev;</div><div class='add'>+		rep-&gt;rep_id = rep_id;</div><div class='add'>+</div><div class='add'>+		ndev-&gt;min_mtu = OTX2_MIN_MTU;</div><div class='add'>+		ndev-&gt;max_mtu = priv-&gt;hw.max_mtu;</div><div class='add'>+		ndev-&gt;netdev_ops = &amp;rvu_rep_netdev_ops;</div><div class='add'>+		pcifunc = priv-&gt;rep_pf_map[rep_id];</div><div class='add'>+		rep-&gt;pcifunc = pcifunc;</div><div class='add'>+</div><div class='add'>+		snprintf(ndev-&gt;name, sizeof(ndev-&gt;name), "Rpf%dvf%d",</div><div class='add'>+			 rvu_get_pf(priv-&gt;pdev, pcifunc),</div><div class='add'>+			 (pcifunc &amp; RVU_PFVF_FUNC_MASK));</div><div class='add'>+</div><div class='add'>+		ndev-&gt;hw_features = (NETIF_F_RXCSUM | NETIF_F_IP_CSUM |</div><div class='add'>+			       NETIF_F_IPV6_CSUM | NETIF_F_RXHASH |</div><div class='add'>+			       NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6);</div><div class='add'>+</div><div class='add'>+		ndev-&gt;hw_features |= NETIF_F_HW_TC;</div><div class='add'>+		ndev-&gt;features |= ndev-&gt;hw_features;</div><div class='add'>+		eth_hw_addr_random(ndev);</div><div class='add'>+		err = rvu_rep_devlink_port_register(rep);</div><div class='add'>+		if (err) {</div><div class='add'>+			free_netdev(ndev);</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		SET_NETDEV_DEVLINK_PORT(ndev, &amp;rep-&gt;dl_port);</div><div class='add'>+		err = register_netdev(ndev);</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "PFVF representor registration failed");</div><div class='add'>+			rvu_rep_devlink_port_unregister(rep);</div><div class='add'>+			free_netdev(ndev);</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		INIT_DELAYED_WORK(&amp;rep-&gt;stats_wrk, rvu_rep_get_stats);</div><div class='add'>+	}</div><div class='add'>+	err = rvu_rep_napi_init(priv, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	rvu_eswitch_config(priv, true);</div><div class='add'>+	return 0;</div><div class='add'>+exit:</div><div class='add'>+	while (--rep_id &gt;= 0) {</div><div class='add'>+		rep = priv-&gt;reps[rep_id];</div><div class='add'>+		unregister_netdev(rep-&gt;netdev);</div><div class='add'>+		rvu_rep_devlink_port_unregister(rep);</div><div class='add'>+		free_netdev(rep-&gt;netdev);</div><div class='add'>+	}</div><div class='add'>+	kfree(priv-&gt;reps);</div><div class='add'>+	rvu_rep_rsrc_free(priv);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_get_rep_cnt(struct otx2_nic *priv)</div><div class='add'>+{</div><div class='add'>+	struct get_rep_cnt_rsp *rsp;</div><div class='add'>+	struct mbox_msghdr *msghdr;</div><div class='add'>+	struct msg_req *req;</div><div class='add'>+	int err, rep;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+	req = otx2_mbox_alloc_msg_get_rep_cnt(&amp;priv-&gt;mbox);</div><div class='add'>+	if (!req) {</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	err = otx2_sync_mbox_msg(&amp;priv-&gt;mbox);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	msghdr = otx2_mbox_get_rsp(&amp;priv-&gt;mbox.mbox, 0, &amp;req-&gt;hdr);</div><div class='add'>+	if (IS_ERR(msghdr)) {</div><div class='add'>+		err = PTR_ERR(msghdr);</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rsp = (struct get_rep_cnt_rsp *)msghdr;</div><div class='add'>+	priv-&gt;hw.tx_queues = rsp-&gt;rep_cnt;</div><div class='add'>+	priv-&gt;hw.rx_queues = rsp-&gt;rep_cnt;</div><div class='add'>+	priv-&gt;rep_cnt = rsp-&gt;rep_cnt;</div><div class='add'>+	for (rep = 0; rep &lt; priv-&gt;rep_cnt; rep++)</div><div class='add'>+		priv-&gt;rep_pf_map[rep] = rsp-&gt;rep_pf_map[rep];</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mbox.lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rvu_rep_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct otx2_nic *priv;</div><div class='add'>+	struct otx2_hw *hw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pcim_enable_device(pdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to enable PCI device\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pcim_request_all_regions(pdev, DRV_NAME);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "PCI request regions failed 0x%x\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "DMA mask config failed, abort\n");</div><div class='add'>+		goto err_set_drv_data;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_set_drv_data;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, priv);</div><div class='add'>+	priv-&gt;pdev = pdev;</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+	priv-&gt;flags |= OTX2_FLAG_INTF_DOWN;</div><div class='add'>+	priv-&gt;flags |= OTX2_FLAG_REP_MODE_ENABLED;</div><div class='add'>+</div><div class='add'>+	hw = &amp;priv-&gt;hw;</div><div class='add'>+	hw-&gt;pdev = pdev;</div><div class='add'>+	hw-&gt;max_queues = OTX2_MAX_CQ_CNT;</div><div class='add'>+	hw-&gt;rbuf_len = OTX2_DEFAULT_RBUF_LEN;</div><div class='add'>+	hw-&gt;xqe_size = 128;</div><div class='add'>+</div><div class='add'>+	err = otx2_init_rsrc(pdev, priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_set_drv_data;</div><div class='add'>+</div><div class='add'>+	priv-&gt;iommu_domain = iommu_get_domain_for_dev(dev);</div><div class='add'>+</div><div class='add'>+	err = rvu_get_rep_cnt(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_detach_rsrc;</div><div class='add'>+</div><div class='add'>+	err = otx2_register_dl(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_detach_rsrc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_detach_rsrc:</div><div class='add'>+	if (priv-&gt;hw.lmt_info)</div><div class='add'>+		free_percpu(priv-&gt;hw.lmt_info);</div><div class='add'>+	if (test_bit(CN10K_LMTST, &amp;priv-&gt;hw.cap_flag))</div><div class='add'>+		qmem_free(priv-&gt;dev, priv-&gt;dync_lmt);</div><div class='add'>+	otx2_detach_resources(&amp;priv-&gt;mbox);</div><div class='add'>+	otx2_disable_mbox_intr(priv);</div><div class='add'>+	otx2_pfaf_mbox_destroy(priv);</div><div class='add'>+	pci_free_irq_vectors(pdev);</div><div class='add'>+err_set_drv_data:</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rvu_rep_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct otx2_nic *priv = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	otx2_unregister_dl(priv);</div><div class='add'>+	if (!(priv-&gt;flags &amp; OTX2_FLAG_INTF_DOWN))</div><div class='add'>+		rvu_rep_destroy(priv);</div><div class='add'>+	otx2_detach_resources(&amp;priv-&gt;mbox);</div><div class='add'>+	if (priv-&gt;hw.lmt_info)</div><div class='add'>+		free_percpu(priv-&gt;hw.lmt_info);</div><div class='add'>+	if (test_bit(CN10K_LMTST, &amp;priv-&gt;hw.cap_flag))</div><div class='add'>+		qmem_free(priv-&gt;dev, priv-&gt;dync_lmt);</div><div class='add'>+	otx2_disable_mbox_intr(priv);</div><div class='add'>+	otx2_pfaf_mbox_destroy(priv);</div><div class='add'>+	pci_free_irq_vectors(priv-&gt;pdev);</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_driver rvu_rep_driver = {</div><div class='add'>+	.name = DRV_NAME,</div><div class='add'>+	.id_table = rvu_rep_id_table,</div><div class='add'>+	.probe = rvu_rep_probe,</div><div class='add'>+	.remove = rvu_rep_remove,</div><div class='add'>+	.shutdown = rvu_rep_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init rvu_rep_init_module(void)</div><div class='add'>+{</div><div class='add'>+	return pci_register_driver(&amp;rvu_rep_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit rvu_rep_cleanup_module(void)</div><div class='add'>+{</div><div class='add'>+	pci_unregister_driver(&amp;rvu_rep_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(rvu_rep_init_module);</div><div class='add'>+module_exit(rvu_rep_cleanup_module);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/rep.h b/drivers/net/ethernet/marvell/octeontx2/nic/rep.h<br/>new file mode 100644<br/>index 000000000000..5bc9e2c7d800<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/octeontx2/nic/rep.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/octeontx2/nic/rep.h</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Marvell RVU REPRESENTOR driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Marvell.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef REP_H</div><div class='add'>+#define REP_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "otx2_reg.h"</div><div class='add'>+#include "otx2_txrx.h"</div><div class='add'>+#include "otx2_common.h"</div><div class='add'>+</div><div class='add'>+#define PCI_DEVID_RVU_REP	0xA0E0</div><div class='add'>+</div><div class='add'>+#define RVU_MAX_REP	OTX2_MAX_CQ_CNT</div><div class='add'>+</div><div class='add'>+struct rep_stats {</div><div class='add'>+	u64 rx_bytes;</div><div class='add'>+	u64 rx_frames;</div><div class='add'>+	u64 rx_drops;</div><div class='add'>+	u64 rx_mcast_frames;</div><div class='add'>+</div><div class='add'>+	u64 tx_bytes;</div><div class='add'>+	u64 tx_frames;</div><div class='add'>+	u64 tx_drops;</div><div class='add'>+	atomic_long_t tx_discards;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rep_dev {</div><div class='add'>+	struct otx2_nic *mdev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct rep_stats stats;</div><div class='add'>+	struct delayed_work stats_wrk;</div><div class='add'>+	struct devlink_port dl_port;</div><div class='add'>+	struct otx2_flow_config	*flow_cfg;</div><div class='add'>+#define RVU_REP_VF_INITIALIZED		BIT_ULL(0)</div><div class='add'>+	u64 flags;</div><div class='add'>+	u16 rep_id;</div><div class='add'>+	u16 pcifunc;</div><div class='add'>+	u8 mac[ETH_ALEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool otx2_rep_dev(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	return pdev-&gt;device == PCI_DEVID_RVU_REP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rvu_rep_create(struct otx2_nic *priv, struct netlink_ext_ack *extack);</div><div class='add'>+void rvu_rep_destroy(struct otx2_nic *priv);</div><div class='add'>+int rvu_event_up_notify(struct otx2_nic *pf, struct rep_event *info);</div><div class='add'>+#endif /* REP_H */</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/prestera/prestera_counter.c b/drivers/net/ethernet/marvell/prestera/prestera_counter.c<br/>index 4cd53a2dae46..634f4543c1d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/prestera/prestera_counter.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/prestera/prestera_counter.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/prestera/prestera_counter.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/prestera/prestera_counter.c</a></div><div class='hunk'>@@ -336,8 +336,7 @@ prestera_counter_block_get_by_idx(struct prestera_counter *counter, u32 idx)</div><div class='ctx'> </div><div class='ctx'> static void prestera_counter_stats_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct delayed_work *dl_work =</div><div class='del'>-		container_of(work, struct delayed_work, work);</div><div class='add'>+	struct delayed_work *dl_work = to_delayed_work(work);</div><div class='ctx'> 	struct prestera_counter *counter =</div><div class='ctx'> 		container_of(dl_work, struct prestera_counter, stats_dw);</div><div class='ctx'> 	struct prestera_counter_block *block;</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/prestera/prestera_main.c b/drivers/net/ethernet/marvell/prestera/prestera_main.c<br/>index 22ca6ee9665e..65e7ef033bde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/prestera/prestera_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/prestera/prestera_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/prestera/prestera_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/prestera/prestera_main.c</a></div><div class='hunk'>@@ -280,6 +280,7 @@ prestera_mac_select_pcs(struct phylink_config *config,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void prestera_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				   unsigned int neg_mode,</div><div class='ctx'> 				   struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct prestera_port *port = container_of(pcs, struct prestera_port,</div><div class='hunk'>@@ -395,7 +396,6 @@ static int prestera_port_sfp_bind(struct prestera_port *port)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		port-&gt;phylink_pcs.ops = &amp;prestera_pcs_ops;</div><div class='del'>-		port-&gt;phylink_pcs.neg_mode = true;</div><div class='ctx'> </div><div class='ctx'> 		port-&gt;phy_config.dev = &amp;port-&gt;dev-&gt;dev;</div><div class='ctx'> 		port-&gt;phy_config.type = PHYLINK_NETDEV;</div><div class='hunk'>@@ -634,7 +634,7 @@ static int prestera_port_create(struct prestera_switch *sw, u32 id)</div><div class='ctx'> 		goto err_dl_port_register;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;features |= NETIF_F_HW_TC;</div><div class='del'>-	dev-&gt;netns_local = true;</div><div class='add'>+	dev-&gt;netns_immutable = true;</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;prestera_netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;prestera_ethtool_ops;</div><div class='ctx'> 	SET_NETDEV_DEV(dev, sw-&gt;dev-&gt;dev);</div><div class='hunk'>@@ -1500,7 +1500,7 @@ EXPORT_SYMBOL(prestera_device_unregister);</div><div class='ctx'> </div><div class='ctx'> static int __init prestera_module_init(void)</div><div class='ctx'> {</div><div class='del'>-	prestera_wq = alloc_workqueue("prestera", 0, 0);</div><div class='add'>+	prestera_wq = alloc_workqueue("prestera", WQ_PERCPU, 0);</div><div class='ctx'> 	if (!prestera_wq)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/marvell/prestera/prestera_pci.c b/drivers/net/ethernet/marvell/prestera/prestera_pci.c<br/>index 35857dc19542..3e13322470da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/prestera/prestera_pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/prestera/prestera_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/prestera/prestera_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/prestera/prestera_pci.c</a></div><div class='hunk'>@@ -845,9 +845,9 @@ static int prestera_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 		goto err_pci_enable_device;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = pci_request_regions(pdev, driver_name);</div><div class='add'>+	err = pcim_request_all_regions(pdev, driver_name);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "pci_request_regions failed\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "pcim_request_all_regions failed\n");</div><div class='ctx'> 		goto err_pci_request_regions;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -898,7 +898,7 @@ static int prestera_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	dev_info(fw-&gt;dev.dev, "Prestera FW is ready\n");</div><div class='ctx'> </div><div class='del'>-	fw-&gt;wq = alloc_workqueue("prestera_fw_wq", WQ_HIGHPRI, 1);</div><div class='add'>+	fw-&gt;wq = alloc_workqueue("prestera_fw_wq", WQ_HIGHPRI | WQ_PERCPU, 1);</div><div class='ctx'> 	if (!fw-&gt;wq) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_wq_alloc;</div><div class='hunk'>@@ -938,7 +938,6 @@ err_pci_dev_alloc:</div><div class='ctx'> err_pp_ioremap:</div><div class='ctx'> err_mem_ioremap:</div><div class='ctx'> err_dma_mask:</div><div class='del'>-	pci_release_regions(pdev);</div><div class='ctx'> err_pci_request_regions:</div><div class='ctx'> err_pci_enable_device:</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -953,7 +952,6 @@ static void prestera_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> 	pci_free_irq_vectors(pdev);</div><div class='ctx'> 	destroy_workqueue(fw-&gt;wq);</div><div class='ctx'> 	prestera_fw_uninit(fw);</div><div class='del'>-	pci_release_regions(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct pci_device_id prestera_pci_devices[] = {</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/pxa168_eth.c b/drivers/net/ethernet/marvell/pxa168_eth.c<br/>index fe38426ec42d..68f8a1e36aa6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/pxa168_eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/pxa168_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/pxa168_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/pxa168_eth.c</a></div><div class='hunk'>@@ -353,7 +353,7 @@ static void rxq_refill(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static inline void rxq_refill_timer_wrapper(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct pxa168_eth_private *pep = from_timer(pep, t, timeout);</div><div class='add'>+	struct pxa168_eth_private *pep = timer_container_of(pep, t, timeout);</div><div class='ctx'> 	napi_schedule(&amp;pep-&gt;napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1175,7 +1175,7 @@ static int pxa168_eth_stop(struct net_device *dev)</div><div class='ctx'> 	/* Write to ICR to clear interrupts. */</div><div class='ctx'> 	wrl(pep, INT_W_CLEAR, 0);</div><div class='ctx'> 	napi_disable(&amp;pep-&gt;napi);</div><div class='del'>-	del_timer_sync(&amp;pep-&gt;timeout);</div><div class='add'>+	timer_delete_sync(&amp;pep-&gt;timeout);</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 	rxq_deinit(dev);</div><div class='hunk'>@@ -1229,9 +1229,9 @@ static int pxa168_rx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	int work_done = 0;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * We call txq_reclaim every time since in NAPI interupts are disabled</div><div class='del'>-	 * and due to this we miss the TX_DONE interrupt,which is not updated in</div><div class='del'>-	 * interrupt status register.</div><div class='add'>+	 * We call txq_reclaim every time since in NAPI interrupts are disabled</div><div class='add'>+	 * and due to this we miss the TX_DONE interrupt, which is not updated</div><div class='add'>+	 * in interrupt status register.</div><div class='ctx'> 	 */</div><div class='ctx'> 	txq_reclaim(dev, 0);</div><div class='ctx'> 	if (netif_queue_stopped(dev)</div><div class='hunk'>@@ -1394,18 +1394,15 @@ static int pxa168_eth_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	printk(KERN_NOTICE "PXA168 10/100 Ethernet Driver\n");</div><div class='ctx'> </div><div class='del'>-	clk = devm_clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	clk = devm_clk_get_enabled(&amp;pdev-&gt;dev, NULL);</div><div class='ctx'> 	if (IS_ERR(clk)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Fast Ethernet failed to get clock\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Fast Ethernet failed to get and enable clock\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-	clk_prepare_enable(clk);</div><div class='ctx'> </div><div class='ctx'> 	dev = alloc_etherdev(sizeof(struct pxa168_eth_private));</div><div class='del'>-	if (!dev) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_clk;</div><div class='del'>-	}</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, dev);</div><div class='ctx'> 	pep = netdev_priv(dev);</div><div class='hunk'>@@ -1523,8 +1520,6 @@ err_free_mdio:</div><div class='ctx'> 	mdiobus_free(pep-&gt;smi_bus);</div><div class='ctx'> err_netdev:</div><div class='ctx'> 	free_netdev(dev);</div><div class='del'>-err_clk:</div><div class='del'>-	clk_disable_unprepare(clk);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1542,7 +1537,6 @@ static void pxa168_eth_remove(struct platform_device *pdev)</div><div class='ctx'> 	if (dev-&gt;phydev)</div><div class='ctx'> 		phy_disconnect(dev-&gt;phydev);</div><div class='ctx'> </div><div class='del'>-	clk_disable_unprepare(pep-&gt;clk);</div><div class='ctx'> 	mdiobus_unregister(pep-&gt;smi_bus);</div><div class='ctx'> 	mdiobus_free(pep-&gt;smi_bus);</div><div class='ctx'> 	unregister_netdev(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/skge.c b/drivers/net/ethernet/marvell/skge.c<br/>index 25bf6ec44289..05349a0b2db1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/skge.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/skge.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/skge.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/skge.c</a></div><div class='hunk'>@@ -1494,7 +1494,7 @@ static int xm_check_link(struct net_device *dev)</div><div class='ctx'>  */</div><div class='ctx'> static void xm_link_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct skge_port *skge = from_timer(skge, t, link_timer);</div><div class='add'>+	struct skge_port *skge = timer_container_of(skge, t, link_timer);</div><div class='ctx'> 	struct net_device *dev = skge-&gt;netdev;</div><div class='ctx'> 	struct skge_hw *hw = skge-&gt;hw;</div><div class='ctx'> 	int port = skge-&gt;port;</div><div class='hunk'>@@ -2662,7 +2662,7 @@ static int skge_down(struct net_device *dev)</div><div class='ctx'> 	netif_tx_disable(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (is_genesis(hw) &amp;&amp; hw-&gt;phy_type == SK_PHY_XMAC)</div><div class='del'>-		del_timer_sync(&amp;skge-&gt;link_timer);</div><div class='add'>+		timer_delete_sync(&amp;skge-&gt;link_timer);</div><div class='ctx'> </div><div class='ctx'> 	napi_disable(&amp;skge-&gt;napi);</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='hunk'>@@ -3742,10 +3742,7 @@ static int skge_device_event(struct notifier_block *unused,</div><div class='ctx'> 	skge = netdev_priv(dev);</div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case NETDEV_CHANGENAME:</div><div class='del'>-		if (skge-&gt;debugfs)</div><div class='del'>-			skge-&gt;debugfs = debugfs_rename(skge_debug,</div><div class='del'>-						       skge-&gt;debugfs,</div><div class='del'>-						       skge_debug, dev-&gt;name);</div><div class='add'>+		debugfs_change_name(skge-&gt;debugfs, "%s", dev-&gt;name);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case NETDEV_GOING_DOWN:</div><div class='head'>diff --git a/drivers/net/ethernet/marvell/sky2.c b/drivers/net/ethernet/marvell/sky2.c<br/>index 3914cd9210d4..3831f533b9db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/sky2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/marvell/sky2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/marvell/sky2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/marvell/sky2.c</a></div><div class='hunk'>@@ -130,6 +130,7 @@ static const struct pci_device_id sky2_id_table[] = {</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */</div><div class='add'>+	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4373) }, /* 88E8075 */</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4381) }, /* 88E8059 */</div><div class='ctx'> 	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4382) }, /* 88E8079 */</div><div class='hunk'>@@ -2960,7 +2961,7 @@ static int sky2_rx_hung(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void sky2_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sky2_hw *hw = from_timer(hw, t, watchdog_timer);</div><div class='add'>+	struct sky2_hw *hw = timer_container_of(hw, t, watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Check for lost IRQ once a second */</div><div class='ctx'> 	if (sky2_read32(hw, B0_ISRC)) {</div><div class='hunk'>@@ -4493,10 +4494,7 @@ static int sky2_device_event(struct notifier_block *unused,</div><div class='ctx'> </div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case NETDEV_CHANGENAME:</div><div class='del'>-		if (sky2-&gt;debugfs) {</div><div class='del'>-			sky2-&gt;debugfs = debugfs_rename(sky2_debug, sky2-&gt;debugfs,</div><div class='del'>-						       sky2_debug, dev-&gt;name);</div><div class='del'>-		}</div><div class='add'>+		debugfs_change_name(sky2-&gt;debugfs, "%s", dev-&gt;name);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case NETDEV_GOING_DOWN:</div><div class='hunk'>@@ -5054,7 +5052,7 @@ static int sky2_suspend(struct device *dev)</div><div class='ctx'> 	if (!hw)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;hw-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;hw-&gt;watchdog_timer);</div><div class='ctx'> 	cancel_work_sync(&amp;hw-&gt;restart_work);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/Kconfig b/drivers/net/ethernet/mediatek/Kconfig<br/>index 95c4405b7d7b..2ba361f8ce7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mediatek/Kconfig</a></div><div class='hunk'>@@ -7,14 +7,6 @@ config NET_VENDOR_MEDIATEK</div><div class='ctx'> </div><div class='ctx'> if NET_VENDOR_MEDIATEK</div><div class='ctx'> </div><div class='del'>-config NET_AIROHA</div><div class='del'>-	tristate "Airoha SoC Gigabit Ethernet support"</div><div class='del'>-	depends on NET_DSA || !NET_DSA</div><div class='del'>-	select PAGE_POOL</div><div class='del'>-	help</div><div class='del'>-	  This driver supports the gigabit ethernet MACs in the</div><div class='del'>-	  Airoha SoC family.</div><div class='del'>-</div><div class='ctx'> config NET_MEDIATEK_SOC_WED</div><div class='ctx'> 	depends on ARCH_MEDIATEK || COMPILE_TEST</div><div class='ctx'> 	def_bool NET_MEDIATEK_SOC != n</div><div class='hunk'>@@ -25,6 +17,7 @@ config NET_MEDIATEK_SOC</div><div class='ctx'> 	select PINCTRL</div><div class='ctx'> 	select PHYLINK</div><div class='ctx'> 	select DIMLIB</div><div class='add'>+	select GENERIC_ALLOCATOR</div><div class='ctx'> 	select PAGE_POOL</div><div class='ctx'> 	select PAGE_POOL_STATS</div><div class='ctx'> 	select PCS_MTK_LYNXI</div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/Makefile b/drivers/net/ethernet/mediatek/Makefile<br/>index ddbb7f4a516c..03e008fbc859 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mediatek/Makefile</a></div><div class='hunk'>@@ -11,4 +11,3 @@ mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o</div><div class='ctx'> endif</div><div class='ctx'> obj-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_ops.o</div><div class='ctx'> obj-$(CONFIG_NET_MEDIATEK_STAR_EMAC) += mtk_star_emac.o</div><div class='del'>-obj-$(CONFIG_NET_AIROHA) += airoha_eth.o</div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/mtk_eth_path.c b/drivers/net/ethernet/mediatek/mtk_eth_path.c<br/>index 7c27a19c4d8f..b4c01e2878f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_eth_path.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_eth_path.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_eth_path.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mediatek/mtk_eth_path.c</a></div><div class='hunk'>@@ -14,7 +14,7 @@</div><div class='ctx'> </div><div class='ctx'> struct mtk_eth_muxc {</div><div class='ctx'> 	const char	*name;</div><div class='del'>-	int		cap_bit;</div><div class='add'>+	u64		cap_bit;</div><div class='ctx'> 	int		(*set_path)(struct mtk_eth *eth, u64 path);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -31,6 +31,8 @@ static const char *mtk_eth_path_name(u64 path)</div><div class='ctx'> 		return "gmac2_rgmii";</div><div class='ctx'> 	case MTK_ETH_PATH_GMAC2_SGMII:</div><div class='ctx'> 		return "gmac2_sgmii";</div><div class='add'>+	case MTK_ETH_PATH_GMAC2_2P5GPHY:</div><div class='add'>+		return "gmac2_2p5gphy";</div><div class='ctx'> 	case MTK_ETH_PATH_GMAC2_GEPHY:</div><div class='ctx'> 		return "gmac2_gephy";</div><div class='ctx'> 	case MTK_ETH_PATH_GDM1_ESW:</div><div class='hunk'>@@ -127,6 +129,29 @@ static int set_mux_u3_gmac2_to_qphy(struct mtk_eth *eth, u64 path)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int set_mux_gmac2_to_2p5gphy(struct mtk_eth *eth, u64 path)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (path == MTK_ETH_PATH_GMAC2_2P5GPHY) {</div><div class='add'>+		ret = regmap_clear_bits(eth-&gt;ethsys, ETHSYS_SYSCFG0,</div><div class='add'>+					SYSCFG0_SGMII_GMAC2_V2);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Setup mux to 2p5g PHY */</div><div class='add'>+		ret = regmap_clear_bits(eth-&gt;infra, TOP_MISC_NETSYS_PCS_MUX,</div><div class='add'>+					MUX_G2_USXGMII_SEL);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		dev_dbg(eth-&gt;dev, "path %s in %s updated\n",</div><div class='add'>+			mtk_eth_path_name(path), __func__);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int val = 0;</div><div class='hunk'>@@ -210,6 +235,10 @@ static const struct mtk_eth_muxc mtk_eth_muxc[] = {</div><div class='ctx'> 		.cap_bit = MTK_ETH_MUX_U3_GMAC2_TO_QPHY,</div><div class='ctx'> 		.set_path = set_mux_u3_gmac2_to_qphy,</div><div class='ctx'> 	}, {</div><div class='add'>+		.name = "mux_gmac2_to_2p5gphy",</div><div class='add'>+		.cap_bit = MTK_ETH_MUX_GMAC2_TO_2P5GPHY,</div><div class='add'>+		.set_path = set_mux_gmac2_to_2p5gphy,</div><div class='add'>+	}, {</div><div class='ctx'> 		.name = "mux_gmac1_gmac2_to_sgmii_rgmii",</div><div class='ctx'> 		.cap_bit = MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII,</div><div class='ctx'> 		.set_path = set_mux_gmac1_gmac2_to_sgmii_rgmii,</div><div class='hunk'>@@ -260,6 +289,20 @@ int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id)</div><div class='ctx'> 	return mtk_eth_mux_setup(eth, path);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id)</div><div class='add'>+{</div><div class='add'>+	u64 path = 0;</div><div class='add'>+</div><div class='add'>+	if (mac_id == MTK_GMAC2_ID)</div><div class='add'>+		path = MTK_ETH_PATH_GMAC2_2P5GPHY;</div><div class='add'>+</div><div class='add'>+	if (!path)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Setup proper MUXes along the path */</div><div class='add'>+	return mtk_eth_mux_setup(eth, path);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id)</div><div class='ctx'> {</div><div class='ctx'> 	u64 path = 0;</div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c<br/>index 53485142938c..e68997a29191 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_eth_soc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_eth_soc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_eth_soc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mediatek/mtk_eth_soc.c</a></div><div class='hunk'>@@ -27,6 +27,7 @@</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='ctx'> #include &lt;net/dst_metadata.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='add'>+#include &lt;linux/genalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mtk_eth_soc.h"</div><div class='ctx'> #include "mtk_wed.h"</div><div class='hunk'>@@ -269,12 +270,8 @@ static const char * const mtk_clks_source_name[] = {</div><div class='ctx'> 	"ethwarp_wocpu2",</div><div class='ctx'> 	"ethwarp_wocpu1",</div><div class='ctx'> 	"ethwarp_wocpu0",</div><div class='del'>-	"top_usxgmii0_sel",</div><div class='del'>-	"top_usxgmii1_sel",</div><div class='ctx'> 	"top_sgm0_sel",</div><div class='ctx'> 	"top_sgm1_sel",</div><div class='del'>-	"top_xfi_phy0_xtal_sel",</div><div class='del'>-	"top_xfi_phy1_xtal_sel",</div><div class='ctx'> 	"top_eth_gmii_sel",</div><div class='ctx'> 	"top_eth_refck_50m_sel",</div><div class='ctx'> 	"top_eth_sys_200m_sel",</div><div class='hunk'>@@ -507,7 +504,7 @@ static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth,</div><div class='ctx'> static void mtk_setup_bridge_switch(struct mtk_eth *eth)</div><div class='ctx'> {</div><div class='ctx'> 	/* Force Port1 XGMAC Link Up */</div><div class='del'>-	mtk_m32(eth, 0, MTK_XGMAC_FORCE_LINK(MTK_GMAC1_ID),</div><div class='add'>+	mtk_m32(eth, 0, MTK_XGMAC_FORCE_MODE(MTK_GMAC1_ID),</div><div class='ctx'> 		MTK_XGMAC_STS(MTK_GMAC1_ID));</div><div class='ctx'> </div><div class='ctx'> 	/* Adjust GSW bridge IPG to 11 */</div><div class='hunk'>@@ -536,6 +533,26 @@ static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config,</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mtk_mac_prepare(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			   phy_interface_t iface)</div><div class='add'>+{</div><div class='add'>+	struct mtk_mac *mac = container_of(config, struct mtk_mac,</div><div class='add'>+					   phylink_config);</div><div class='add'>+	struct mtk_eth *eth = mac-&gt;hw;</div><div class='add'>+</div><div class='add'>+	if (mtk_interface_mode_is_xgmii(eth, iface) &amp;&amp;</div><div class='add'>+	    mac-&gt;id != MTK_GMAC1_ID) {</div><div class='add'>+		mtk_m32(mac-&gt;hw, XMAC_MCR_TRX_DISABLE,</div><div class='add'>+			XMAC_MCR_TRX_DISABLE, MTK_XMAC_MCR(mac-&gt;id));</div><div class='add'>+</div><div class='add'>+		mtk_m32(mac-&gt;hw, MTK_XGMAC_FORCE_MODE(mac-&gt;id) |</div><div class='add'>+				 MTK_XGMAC_FORCE_LINK(mac-&gt;id),</div><div class='add'>+			MTK_XGMAC_FORCE_MODE(mac-&gt;id), MTK_XGMAC_STS(mac-&gt;id));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mtk_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='ctx'> 			   const struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='hunk'>@@ -577,6 +594,12 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case PHY_INTERFACE_MODE_INTERNAL:</div><div class='add'>+			if (mac-&gt;id == MTK_GMAC2_ID &amp;&amp;</div><div class='add'>+			    MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_2P5GPHY)) {</div><div class='add'>+				err = mtk_gmac_2p5gphy_path_setup(eth, mac-&gt;id);</div><div class='add'>+				if (err)</div><div class='add'>+					goto init_err;</div><div class='add'>+			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			goto err_phy;</div><div class='hunk'>@@ -648,12 +671,12 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup gmac */</div><div class='del'>-	if (mtk_is_netsys_v3_or_greater(eth) &amp;&amp;</div><div class='del'>-	    mac-&gt;interface == PHY_INTERFACE_MODE_INTERNAL) {</div><div class='add'>+	if (mtk_interface_mode_is_xgmii(eth, state-&gt;interface)) {</div><div class='ctx'> 		mtk_w32(mac-&gt;hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac-&gt;id));</div><div class='ctx'> 		mtk_w32(mac-&gt;hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac-&gt;id));</div><div class='ctx'> </div><div class='del'>-		mtk_setup_bridge_switch(eth);</div><div class='add'>+		if (mac-&gt;id == MTK_GMAC1_ID)</div><div class='add'>+			mtk_setup_bridge_switch(eth);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='hunk'>@@ -700,10 +723,19 @@ static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode,</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_mac *mac = container_of(config, struct mtk_mac,</div><div class='ctx'> 					   phylink_config);</div><div class='del'>-	u32 mcr = mtk_r32(mac-&gt;hw, MTK_MAC_MCR(mac-&gt;id));</div><div class='ctx'> </div><div class='del'>-	mcr &amp;= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK);</div><div class='del'>-	mtk_w32(mac-&gt;hw, mcr, MTK_MAC_MCR(mac-&gt;id));</div><div class='add'>+	if (!mtk_interface_mode_is_xgmii(mac-&gt;hw, interface)) {</div><div class='add'>+		/* GMAC modes */</div><div class='add'>+		mtk_m32(mac-&gt;hw,</div><div class='add'>+			MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK, 0,</div><div class='add'>+			MTK_MAC_MCR(mac-&gt;id));</div><div class='add'>+	} else if (mac-&gt;id != MTK_GMAC1_ID) {</div><div class='add'>+		/* XGMAC except for built-in switch */</div><div class='add'>+		mtk_m32(mac-&gt;hw, XMAC_MCR_TRX_DISABLE, XMAC_MCR_TRX_DISABLE,</div><div class='add'>+			MTK_XMAC_MCR(mac-&gt;id));</div><div class='add'>+		mtk_m32(mac-&gt;hw, MTK_XGMAC_FORCE_LINK(mac-&gt;id), 0,</div><div class='add'>+			MTK_XGMAC_STS(mac-&gt;id));</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx,</div><div class='hunk'>@@ -734,7 +766,7 @@ static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx,</div><div class='ctx'> 		case SPEED_100:</div><div class='ctx'> 			val |= MTK_QTX_SCH_MAX_RATE_EN |</div><div class='ctx'> 			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 103) |</div><div class='del'>-			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 3);</div><div class='add'>+			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 3) |</div><div class='ctx'> 			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 1);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case SPEED_1000:</div><div class='hunk'>@@ -757,13 +789,13 @@ static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx,</div><div class='ctx'> 		case SPEED_100:</div><div class='ctx'> 			val |= MTK_QTX_SCH_MAX_RATE_EN |</div><div class='ctx'> 			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 1) |</div><div class='del'>-			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 5);</div><div class='add'>+			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 5) |</div><div class='ctx'> 			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 1);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case SPEED_1000:</div><div class='ctx'> 			val |= MTK_QTX_SCH_MAX_RATE_EN |</div><div class='del'>-			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 10) |</div><div class='del'>-			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 5) |</div><div class='add'>+			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_MAN, 1) |</div><div class='add'>+			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_EXP, 6) |</div><div class='ctx'> 			       FIELD_PREP(MTK_QTX_SCH_MAX_RATE_WEIGHT, 10);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -775,13 +807,12 @@ static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx,</div><div class='ctx'> 	mtk_w32(eth, val, soc-&gt;reg_map-&gt;qdma.qtx_sch + ofs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mtk_mac_link_up(struct phylink_config *config,</div><div class='del'>-			    struct phy_device *phy,</div><div class='del'>-			    unsigned int mode, phy_interface_t interface,</div><div class='del'>-			    int speed, int duplex, bool tx_pause, bool rx_pause)</div><div class='add'>+static void mtk_gdm_mac_link_up(struct mtk_mac *mac,</div><div class='add'>+				struct phy_device *phy,</div><div class='add'>+				unsigned int mode, phy_interface_t interface,</div><div class='add'>+				int speed, int duplex, bool tx_pause,</div><div class='add'>+				bool rx_pause)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_mac *mac = container_of(config, struct mtk_mac,</div><div class='del'>-					   phylink_config);</div><div class='ctx'> 	u32 mcr;</div><div class='ctx'> </div><div class='ctx'> 	mcr = mtk_r32(mac-&gt;hw, MTK_MAC_MCR(mac-&gt;id));</div><div class='hunk'>@@ -815,32 +846,145 @@ static void mtk_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 	mtk_w32(mac-&gt;hw, mcr, MTK_MAC_MCR(mac-&gt;id));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mtk_xgdm_mac_link_up(struct mtk_mac *mac,</div><div class='add'>+				 struct phy_device *phy,</div><div class='add'>+				 unsigned int mode, phy_interface_t interface,</div><div class='add'>+				 int speed, int duplex, bool tx_pause,</div><div class='add'>+				 bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	u32 mcr;</div><div class='add'>+</div><div class='add'>+	if (mac-&gt;id == MTK_GMAC1_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Eliminate the interference(before link-up) caused by PHY noise */</div><div class='add'>+	mtk_m32(mac-&gt;hw, XMAC_LOGIC_RST, 0, MTK_XMAC_LOGIC_RST(mac-&gt;id));</div><div class='add'>+	mdelay(20);</div><div class='add'>+	mtk_m32(mac-&gt;hw, XMAC_GLB_CNTCLR, XMAC_GLB_CNTCLR,</div><div class='add'>+		MTK_XMAC_CNT_CTRL(mac-&gt;id));</div><div class='add'>+</div><div class='add'>+	mtk_m32(mac-&gt;hw, MTK_XGMAC_FORCE_LINK(mac-&gt;id),</div><div class='add'>+		MTK_XGMAC_FORCE_LINK(mac-&gt;id), MTK_XGMAC_STS(mac-&gt;id));</div><div class='add'>+</div><div class='add'>+	mcr = mtk_r32(mac-&gt;hw, MTK_XMAC_MCR(mac-&gt;id));</div><div class='add'>+	mcr &amp;= ~(XMAC_MCR_FORCE_TX_FC | XMAC_MCR_FORCE_RX_FC |</div><div class='add'>+		 XMAC_MCR_TRX_DISABLE);</div><div class='add'>+	/* Configure pause modes -</div><div class='add'>+	 * phylink will avoid these for half duplex</div><div class='add'>+	 */</div><div class='add'>+	if (tx_pause)</div><div class='add'>+		mcr |= XMAC_MCR_FORCE_TX_FC;</div><div class='add'>+	if (rx_pause)</div><div class='add'>+		mcr |= XMAC_MCR_FORCE_RX_FC;</div><div class='add'>+</div><div class='add'>+	mtk_w32(mac-&gt;hw, mcr, MTK_XMAC_MCR(mac-&gt;id));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mtk_mac_link_up(struct phylink_config *config,</div><div class='add'>+			    struct phy_device *phy,</div><div class='add'>+			    unsigned int mode, phy_interface_t interface,</div><div class='add'>+			    int speed, int duplex, bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct mtk_mac *mac = container_of(config, struct mtk_mac,</div><div class='add'>+					   phylink_config);</div><div class='add'>+</div><div class='add'>+	if (mtk_interface_mode_is_xgmii(mac-&gt;hw, interface))</div><div class='add'>+		mtk_xgdm_mac_link_up(mac, phy, mode, interface, speed, duplex,</div><div class='add'>+				     tx_pause, rx_pause);</div><div class='add'>+	else</div><div class='add'>+		mtk_gdm_mac_link_up(mac, phy, mode, interface, speed, duplex,</div><div class='add'>+				    tx_pause, rx_pause);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mtk_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct mtk_mac *mac = container_of(config, struct mtk_mac,</div><div class='add'>+					   phylink_config);</div><div class='add'>+	struct mtk_eth *eth = mac-&gt;hw;</div><div class='add'>+</div><div class='add'>+	mtk_m32(eth, MAC_MCR_EEE100M | MAC_MCR_EEE1G, 0, MTK_MAC_MCR(mac-&gt;id));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mtk_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,</div><div class='add'>+				 bool tx_clk_stop)</div><div class='add'>+{</div><div class='add'>+	struct mtk_mac *mac = container_of(config, struct mtk_mac,</div><div class='add'>+					   phylink_config);</div><div class='add'>+	struct mtk_eth *eth = mac-&gt;hw;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (mtk_interface_mode_is_xgmii(eth, mac-&gt;interface))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Tx idle timer in ms */</div><div class='add'>+	timer = DIV_ROUND_UP(timer, 1000);</div><div class='add'>+</div><div class='add'>+	/* If the timer is zero, then set LPI_MODE, which allows the</div><div class='add'>+	 * system to enter LPI mode immediately rather than waiting for</div><div class='add'>+	 * the LPI threshold.</div><div class='add'>+	 */</div><div class='add'>+	if (!timer)</div><div class='add'>+		val = MAC_EEE_LPI_MODE;</div><div class='add'>+	else if (FIELD_FIT(MAC_EEE_LPI_TXIDLE_THD, timer))</div><div class='add'>+		val = FIELD_PREP(MAC_EEE_LPI_TXIDLE_THD, timer);</div><div class='add'>+	else</div><div class='add'>+		val = MAC_EEE_LPI_TXIDLE_THD;</div><div class='add'>+</div><div class='add'>+	if (tx_clk_stop)</div><div class='add'>+		val |= MAC_EEE_CKG_TXIDLE;</div><div class='add'>+</div><div class='add'>+	/* PHY Wake-up time, this field does not have a reset value, so use the</div><div class='add'>+	 * reset value from MT7531 (36us for 100M and 17us for 1000M).</div><div class='add'>+	 */</div><div class='add'>+	val |= FIELD_PREP(MAC_EEE_WAKEUP_TIME_1000, 17) |</div><div class='add'>+	       FIELD_PREP(MAC_EEE_WAKEUP_TIME_100, 36);</div><div class='add'>+</div><div class='add'>+	mtk_w32(eth, val, MTK_MAC_EEECR(mac-&gt;id));</div><div class='add'>+	mtk_m32(eth, 0, MAC_MCR_EEE100M | MAC_MCR_EEE1G, MTK_MAC_MCR(mac-&gt;id));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct phylink_mac_ops mtk_phylink_ops = {</div><div class='add'>+	.mac_prepare = mtk_mac_prepare,</div><div class='ctx'> 	.mac_select_pcs = mtk_mac_select_pcs,</div><div class='ctx'> 	.mac_config = mtk_mac_config,</div><div class='ctx'> 	.mac_finish = mtk_mac_finish,</div><div class='ctx'> 	.mac_link_down = mtk_mac_link_down,</div><div class='ctx'> 	.mac_link_up = mtk_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = mtk_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = mtk_mac_enable_tx_lpi,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void mtk_mdio_config(struct mtk_eth *eth)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Configure MDC Divider */</div><div class='add'>+	val = FIELD_PREP(PPSC_MDC_CFG, eth-&gt;mdc_divider);</div><div class='add'>+</div><div class='add'>+	/* Configure MDC Turbo Mode */</div><div class='add'>+	if (mtk_is_netsys_v3_or_greater(eth))</div><div class='add'>+		mtk_m32(eth, 0, MISC_MDC_TURBO, MTK_MAC_MISC_V3);</div><div class='add'>+	else</div><div class='add'>+		val |= PPSC_MDC_TURBO;</div><div class='add'>+</div><div class='add'>+	mtk_m32(eth, PPSC_MDC_CFG, val, MTK_PPSC);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mtk_mdio_init(struct mtk_eth *eth)</div><div class='ctx'> {</div><div class='del'>-	unsigned int max_clk = 2500000, divider;</div><div class='add'>+	unsigned int max_clk = 2500000;</div><div class='ctx'> 	struct device_node *mii_np;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	mii_np = of_get_child_by_name(eth-&gt;dev-&gt;of_node, "mdio-bus");</div><div class='add'>+	mii_np = of_get_available_child_by_name(eth-&gt;dev-&gt;of_node, "mdio-bus");</div><div class='ctx'> 	if (!mii_np) {</div><div class='ctx'> 		dev_err(eth-&gt;dev, "no %s child node found", "mdio-bus");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!of_device_is_available(mii_np)) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto err_put_node;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	eth-&gt;mii_bus = devm_mdiobus_alloc(eth-&gt;dev);</div><div class='ctx'> 	if (!eth-&gt;mii_bus) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -865,20 +1009,9 @@ static int mtk_mdio_init(struct mtk_eth *eth)</div><div class='ctx'> 		}</div><div class='ctx'> 		max_clk = val;</div><div class='ctx'> 	}</div><div class='del'>-	divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63);</div><div class='del'>-</div><div class='del'>-	/* Configure MDC Turbo Mode */</div><div class='del'>-	if (mtk_is_netsys_v3_or_greater(eth))</div><div class='del'>-		mtk_m32(eth, 0, MISC_MDC_TURBO, MTK_MAC_MISC_V3);</div><div class='del'>-</div><div class='del'>-	/* Configure MDC Divider */</div><div class='del'>-	val = FIELD_PREP(PPSC_MDC_CFG, divider);</div><div class='del'>-	if (!mtk_is_netsys_v3_or_greater(eth))</div><div class='del'>-		val |= PPSC_MDC_TURBO;</div><div class='del'>-	mtk_m32(eth, PPSC_MDC_CFG, val, MTK_PPSC);</div><div class='del'>-</div><div class='del'>-	dev_dbg(eth-&gt;dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider);</div><div class='del'>-</div><div class='add'>+	eth-&gt;mdc_divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63);</div><div class='add'>+	mtk_mdio_config(eth);</div><div class='add'>+	dev_dbg(eth-&gt;dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / eth-&gt;mdc_divider);</div><div class='ctx'> 	ret = of_mdiobus_register(eth-&gt;mii_bus, mii_np);</div><div class='ctx'> </div><div class='ctx'> err_put_node:</div><div class='hunk'>@@ -1135,6 +1268,34 @@ static void *mtk_max_lro_buf_alloc(gfp_t gfp_mask)</div><div class='ctx'> 	return (void *)data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void *mtk_dma_ring_alloc(struct mtk_eth *eth, size_t size,</div><div class='add'>+				dma_addr_t *dma_handle, bool use_sram)</div><div class='add'>+{</div><div class='add'>+	void *dma_ring;</div><div class='add'>+</div><div class='add'>+	if (use_sram &amp;&amp; eth-&gt;sram_pool) {</div><div class='add'>+		dma_ring = (void *)gen_pool_alloc(eth-&gt;sram_pool, size);</div><div class='add'>+		if (!dma_ring)</div><div class='add'>+			return dma_ring;</div><div class='add'>+		*dma_handle = gen_pool_virt_to_phys(eth-&gt;sram_pool,</div><div class='add'>+						    (unsigned long)dma_ring);</div><div class='add'>+	} else {</div><div class='add'>+		dma_ring = dma_alloc_coherent(eth-&gt;dma_dev, size, dma_handle,</div><div class='add'>+					      GFP_KERNEL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dma_ring;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mtk_dma_ring_free(struct mtk_eth *eth, size_t size, void *dma_ring,</div><div class='add'>+			      dma_addr_t dma_handle, bool in_sram)</div><div class='add'>+{</div><div class='add'>+	if (in_sram &amp;&amp; eth-&gt;sram_pool)</div><div class='add'>+		gen_pool_free(eth-&gt;sram_pool, (unsigned long)dma_ring, size);</div><div class='add'>+	else</div><div class='add'>+		dma_free_coherent(eth-&gt;dma_dev, size, dma_ring, dma_handle);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* the qdma core needs scratch memory to be setup */</div><div class='ctx'> static int mtk_init_fq_dma(struct mtk_eth *eth)</div><div class='ctx'> {</div><div class='hunk'>@@ -1144,13 +1305,8 @@ static int mtk_init_fq_dma(struct mtk_eth *eth)</div><div class='ctx'> 	dma_addr_t dma_addr;</div><div class='ctx'> 	int i, j, len;</div><div class='ctx'> </div><div class='del'>-	if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SRAM))</div><div class='del'>-		eth-&gt;scratch_ring = eth-&gt;sram_base;</div><div class='del'>-	else</div><div class='del'>-		eth-&gt;scratch_ring = dma_alloc_coherent(eth-&gt;dma_dev,</div><div class='del'>-						       cnt * soc-&gt;tx.desc_size,</div><div class='del'>-						       &amp;eth-&gt;phy_scratch_ring,</div><div class='del'>-						       GFP_KERNEL);</div><div class='add'>+	eth-&gt;scratch_ring = mtk_dma_ring_alloc(eth, cnt * soc-&gt;tx.desc_size,</div><div class='add'>+					       &amp;eth-&gt;phy_scratch_ring, true);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!eth-&gt;scratch_ring))</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -1605,6 +1761,13 @@ static netdev_tx_t mtk_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	bool gso = false;</div><div class='ctx'> 	int tx_num;</div><div class='ctx'> </div><div class='add'>+	if (skb_vlan_tag_present(skb) &amp;&amp;</div><div class='add'>+	    !eth_proto_is_802_3(eth_hdr(skb)-&gt;h_proto)) {</div><div class='add'>+		skb = __vlan_hwaccel_push_inside(skb);</div><div class='add'>+		if (!skb)</div><div class='add'>+			goto dropped;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* normally we can rely on the stack not calling this more than once,</div><div class='ctx'> 	 * however we have 2 queues running on the same ring so we need to lock</div><div class='ctx'> 	 * the ring access</div><div class='hunk'>@@ -1650,8 +1813,9 @@ static netdev_tx_t mtk_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> drop:</div><div class='ctx'> 	spin_unlock(&amp;eth-&gt;page_lock);</div><div class='del'>-	stats-&gt;tx_dropped++;</div><div class='ctx'> 	dev_kfree_skb_any(skb);</div><div class='add'>+dropped:</div><div class='add'>+	stats-&gt;tx_dropped++;</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2079,7 +2243,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,</div><div class='ctx'> 		if (ring-&gt;page_pool) {</div><div class='ctx'> 			struct page *page = virt_to_head_page(data);</div><div class='ctx'> 			struct xdp_buff xdp;</div><div class='del'>-			u32 ret;</div><div class='add'>+			u32 ret, metasize;</div><div class='ctx'> </div><div class='ctx'> 			new_data = mtk_page_pool_get_buff(ring-&gt;page_pool,</div><div class='ctx'> 							  &amp;dma_addr,</div><div class='hunk'>@@ -2095,7 +2259,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,</div><div class='ctx'> </div><div class='ctx'> 			xdp_init_buff(&amp;xdp, PAGE_SIZE, &amp;ring-&gt;xdp_q);</div><div class='ctx'> 			xdp_prepare_buff(&amp;xdp, data, MTK_PP_HEADROOM, pktlen,</div><div class='del'>-					 false);</div><div class='add'>+					 true);</div><div class='ctx'> 			xdp_buff_clear_frags_flag(&amp;xdp);</div><div class='ctx'> </div><div class='ctx'> 			ret = mtk_xdp_run(eth, ring, &amp;xdp, netdev);</div><div class='hunk'>@@ -2115,6 +2279,9 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,</div><div class='ctx'> </div><div class='ctx'> 			skb_reserve(skb, xdp.data - xdp.data_hard_start);</div><div class='ctx'> 			skb_put(skb, xdp.data_end - xdp.data);</div><div class='add'>+			metasize = xdp.data - xdp.data_meta;</div><div class='add'>+			if (metasize)</div><div class='add'>+				skb_metadata_set(skb, metasize);</div><div class='ctx'> 			skb_mark_for_recycle(skb);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (ring-&gt;frag_size &lt;= PAGE_SIZE)</div><div class='hunk'>@@ -2201,14 +2368,18 @@ skip_rx:</div><div class='ctx'> 		ring-&gt;data[idx] = new_data;</div><div class='ctx'> 		rxd-&gt;rxd1 = (unsigned int)dma_addr;</div><div class='ctx'> release_desc:</div><div class='add'>+		if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_36BIT_DMA)) {</div><div class='add'>+			if (unlikely(dma_addr == DMA_MAPPING_ERROR))</div><div class='add'>+				addr64 = FIELD_GET(RX_DMA_ADDR64_MASK,</div><div class='add'>+						   rxd-&gt;rxd2);</div><div class='add'>+			else</div><div class='add'>+				addr64 = RX_DMA_PREP_ADDR64(dma_addr);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SOC_MT7628))</div><div class='ctx'> 			rxd-&gt;rxd2 = RX_DMA_LSO;</div><div class='ctx'> 		else</div><div class='del'>-			rxd-&gt;rxd2 = RX_DMA_PREP_PLEN0(ring-&gt;buf_size);</div><div class='del'>-</div><div class='del'>-		if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_36BIT_DMA) &amp;&amp;</div><div class='del'>-		    likely(dma_addr != DMA_MAPPING_ERROR))</div><div class='del'>-			rxd-&gt;rxd2 |= RX_DMA_PREP_ADDR64(dma_addr);</div><div class='add'>+			rxd-&gt;rxd2 = RX_DMA_PREP_PLEN0(ring-&gt;buf_size) | addr64;</div><div class='ctx'> </div><div class='ctx'> 		ring-&gt;calc_idx = idx;</div><div class='ctx'> 		done++;</div><div class='hunk'>@@ -2481,14 +2652,7 @@ static int mtk_tx_alloc(struct mtk_eth *eth)</div><div class='ctx'> 	if (!ring-&gt;buf)</div><div class='ctx'> 		goto no_tx_mem;</div><div class='ctx'> </div><div class='del'>-	if (MTK_HAS_CAPS(soc-&gt;caps, MTK_SRAM)) {</div><div class='del'>-		ring-&gt;dma = eth-&gt;sram_base + soc-&gt;tx.fq_dma_size * sz;</div><div class='del'>-		ring-&gt;phys = eth-&gt;phy_scratch_ring + soc-&gt;tx.fq_dma_size * (dma_addr_t)sz;</div><div class='del'>-	} else {</div><div class='del'>-		ring-&gt;dma = dma_alloc_coherent(eth-&gt;dma_dev, ring_size * sz,</div><div class='del'>-					       &amp;ring-&gt;phys, GFP_KERNEL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	ring-&gt;dma = mtk_dma_ring_alloc(eth, ring_size * sz, &amp;ring-&gt;phys, true);</div><div class='ctx'> 	if (!ring-&gt;dma)</div><div class='ctx'> 		goto no_tx_mem;</div><div class='ctx'> </div><div class='hunk'>@@ -2587,10 +2751,10 @@ static void mtk_tx_clean(struct mtk_eth *eth)</div><div class='ctx'> 		kfree(ring-&gt;buf);</div><div class='ctx'> 		ring-&gt;buf = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	if (!MTK_HAS_CAPS(soc-&gt;caps, MTK_SRAM) &amp;&amp; ring-&gt;dma) {</div><div class='del'>-		dma_free_coherent(eth-&gt;dma_dev,</div><div class='del'>-				  ring-&gt;dma_size * soc-&gt;tx.desc_size,</div><div class='del'>-				  ring-&gt;dma, ring-&gt;phys);</div><div class='add'>+</div><div class='add'>+	if (ring-&gt;dma) {</div><div class='add'>+		mtk_dma_ring_free(eth, ring-&gt;dma_size * soc-&gt;tx.desc_size,</div><div class='add'>+				  ring-&gt;dma, ring-&gt;phys, true);</div><div class='ctx'> 		ring-&gt;dma = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2607,14 +2771,9 @@ static int mtk_rx_alloc(struct mtk_eth *eth, int ring_no, int rx_flag)</div><div class='ctx'> 	const struct mtk_reg_map *reg_map = eth-&gt;soc-&gt;reg_map;</div><div class='ctx'> 	const struct mtk_soc_data *soc = eth-&gt;soc;</div><div class='ctx'> 	struct mtk_rx_ring *ring;</div><div class='del'>-	int rx_data_len, rx_dma_size, tx_ring_size;</div><div class='add'>+	int rx_data_len, rx_dma_size;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_QDMA))</div><div class='del'>-		tx_ring_size = MTK_QDMA_RING_SIZE;</div><div class='del'>-	else</div><div class='del'>-		tx_ring_size = soc-&gt;tx.dma_size;</div><div class='del'>-</div><div class='ctx'> 	if (rx_flag == MTK_RX_FLAGS_QDMA) {</div><div class='ctx'> 		if (ring_no)</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -2649,20 +2808,10 @@ static int mtk_rx_alloc(struct mtk_eth *eth, int ring_no, int rx_flag)</div><div class='ctx'> 		ring-&gt;page_pool = pp;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SRAM) ||</div><div class='del'>-	    rx_flag != MTK_RX_FLAGS_NORMAL) {</div><div class='del'>-		ring-&gt;dma = dma_alloc_coherent(eth-&gt;dma_dev,</div><div class='del'>-				rx_dma_size * eth-&gt;soc-&gt;rx.desc_size,</div><div class='del'>-				&amp;ring-&gt;phys, GFP_KERNEL);</div><div class='del'>-	} else {</div><div class='del'>-		struct mtk_tx_ring *tx_ring = &amp;eth-&gt;tx_ring;</div><div class='del'>-</div><div class='del'>-		ring-&gt;dma = tx_ring-&gt;dma + tx_ring_size *</div><div class='del'>-			    eth-&gt;soc-&gt;tx.desc_size * (ring_no + 1);</div><div class='del'>-		ring-&gt;phys = tx_ring-&gt;phys + tx_ring_size *</div><div class='del'>-			     eth-&gt;soc-&gt;tx.desc_size * (ring_no + 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	ring-&gt;dma = mtk_dma_ring_alloc(eth,</div><div class='add'>+				       rx_dma_size * eth-&gt;soc-&gt;rx.desc_size,</div><div class='add'>+				       &amp;ring-&gt;phys,</div><div class='add'>+				       rx_flag == MTK_RX_FLAGS_NORMAL);</div><div class='ctx'> 	if (!ring-&gt;dma)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -2777,10 +2926,9 @@ static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring, bool in_</div><div class='ctx'> 		ring-&gt;data = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!in_sram &amp;&amp; ring-&gt;dma) {</div><div class='del'>-		dma_free_coherent(eth-&gt;dma_dev,</div><div class='del'>-				  ring-&gt;dma_size * eth-&gt;soc-&gt;rx.desc_size,</div><div class='del'>-				  ring-&gt;dma, ring-&gt;phys);</div><div class='add'>+	if (ring-&gt;dma) {</div><div class='add'>+		mtk_dma_ring_free(eth, ring-&gt;dma_size * eth-&gt;soc-&gt;rx.desc_size,</div><div class='add'>+				  ring-&gt;dma, ring-&gt;phys, in_sram);</div><div class='ctx'> 		ring-&gt;dma = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3135,20 +3283,29 @@ static int mtk_dma_init(struct mtk_eth *eth)</div><div class='ctx'> static void mtk_dma_free(struct mtk_eth *eth)</div><div class='ctx'> {</div><div class='ctx'> 	const struct mtk_soc_data *soc = eth-&gt;soc;</div><div class='del'>-	int i;</div><div class='add'>+	int i, j, txqs = 1;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MTK_MAX_DEVS; i++)</div><div class='del'>-		if (eth-&gt;netdev[i])</div><div class='del'>-			netdev_reset_queue(eth-&gt;netdev[i]);</div><div class='del'>-	if (!MTK_HAS_CAPS(soc-&gt;caps, MTK_SRAM) &amp;&amp; eth-&gt;scratch_ring) {</div><div class='del'>-		dma_free_coherent(eth-&gt;dma_dev,</div><div class='del'>-				  MTK_QDMA_RING_SIZE * soc-&gt;tx.desc_size,</div><div class='del'>-				  eth-&gt;scratch_ring, eth-&gt;phy_scratch_ring);</div><div class='add'>+	if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_QDMA))</div><div class='add'>+		txqs = MTK_QDMA_NUM_QUEUES;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MTK_MAX_DEVS; i++) {</div><div class='add'>+		if (!eth-&gt;netdev[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; txqs; j++)</div><div class='add'>+			netdev_tx_reset_subqueue(eth-&gt;netdev[i], j);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (eth-&gt;scratch_ring) {</div><div class='add'>+		mtk_dma_ring_free(eth, soc-&gt;tx.fq_dma_size * soc-&gt;tx.desc_size,</div><div class='add'>+				  eth-&gt;scratch_ring, eth-&gt;phy_scratch_ring,</div><div class='add'>+				  true);</div><div class='ctx'> 		eth-&gt;scratch_ring = NULL;</div><div class='ctx'> 		eth-&gt;phy_scratch_ring = 0;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	mtk_tx_clean(eth);</div><div class='del'>-	mtk_rx_clean(eth, &amp;eth-&gt;rx_ring[0], MTK_HAS_CAPS(soc-&gt;caps, MTK_SRAM));</div><div class='add'>+	mtk_rx_clean(eth, &amp;eth-&gt;rx_ring[0], true);</div><div class='ctx'> 	mtk_rx_clean(eth, &amp;eth-&gt;rx_ring_qdma, false);</div><div class='ctx'> </div><div class='ctx'> 	if (eth-&gt;hwlro) {</div><div class='hunk'>@@ -3189,6 +3346,53 @@ static void mtk_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> 	schedule_work(&amp;eth-&gt;pending_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mtk_get_irqs(struct platform_device *pdev, struct mtk_eth *eth)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* future SoCs beginning with MT7988 should use named IRQs in dts */</div><div class='add'>+	eth-&gt;irq[MTK_FE_IRQ_TX] = platform_get_irq_byname_optional(pdev, "fe1");</div><div class='add'>+	eth-&gt;irq[MTK_FE_IRQ_RX] = platform_get_irq_byname_optional(pdev, "fe2");</div><div class='add'>+	if (eth-&gt;irq[MTK_FE_IRQ_TX] &gt;= 0 &amp;&amp; eth-&gt;irq[MTK_FE_IRQ_RX] &gt;= 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* only use legacy mode if platform_get_irq_byname_optional returned -ENXIO */</div><div class='add'>+	if (eth-&gt;irq[MTK_FE_IRQ_TX] != -ENXIO)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, eth-&gt;irq[MTK_FE_IRQ_TX],</div><div class='add'>+				     "Error requesting FE TX IRQ\n");</div><div class='add'>+</div><div class='add'>+	if (eth-&gt;irq[MTK_FE_IRQ_RX] != -ENXIO)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, eth-&gt;irq[MTK_FE_IRQ_RX],</div><div class='add'>+				     "Error requesting FE RX IRQ\n");</div><div class='add'>+</div><div class='add'>+	if (!MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SHARED_INT))</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "legacy DT: missing interrupt-names.");</div><div class='add'>+</div><div class='add'>+	/* legacy way:</div><div class='add'>+	 * On MTK_SHARED_INT SoCs (MT7621 + MT7628) the first IRQ is taken</div><div class='add'>+	 * from devicetree and used for both RX and TX - it is shared.</div><div class='add'>+	 * On SoCs with non-shared IRQs the first entry is not used,</div><div class='add'>+	 * the second is for TX, and the third is for RX.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; MTK_FE_IRQ_NUM; i++) {</div><div class='add'>+		if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SHARED_INT)) {</div><div class='add'>+			if (i == MTK_FE_IRQ_SHARED)</div><div class='add'>+				eth-&gt;irq[MTK_FE_IRQ_SHARED] = platform_get_irq(pdev, i);</div><div class='add'>+			else</div><div class='add'>+				eth-&gt;irq[i] = eth-&gt;irq[MTK_FE_IRQ_SHARED];</div><div class='add'>+		} else {</div><div class='add'>+			eth-&gt;irq[i] = platform_get_irq(pdev, i + 1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (eth-&gt;irq[i] &lt; 0) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "no IRQ%d resource found\n", i);</div><div class='add'>+			return -ENXIO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static irqreturn_t mtk_handle_irq_rx(int irq, void *_eth)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_eth *eth = _eth;</div><div class='hunk'>@@ -3242,7 +3446,7 @@ static void mtk_poll_controller(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);</div><div class='ctx'> 	mtk_rx_irq_disable(eth, eth-&gt;soc-&gt;rx.irq_done_mask);</div><div class='del'>-	mtk_handle_irq_rx(eth-&gt;irq[2], dev);</div><div class='add'>+	mtk_handle_irq_rx(eth-&gt;irq[MTK_FE_IRQ_RX], dev);</div><div class='ctx'> 	mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);</div><div class='ctx'> 	mtk_rx_irq_enable(eth, eth-&gt;soc-&gt;rx.irq_done_mask);</div><div class='ctx'> }</div><div class='hunk'>@@ -3269,7 +3473,7 @@ static int mtk_start_dma(struct mtk_eth *eth)</div><div class='ctx'> 		if (mtk_is_netsys_v2_or_greater(eth))</div><div class='ctx'> 			val |= MTK_MUTLI_CNT | MTK_RESV_BUF |</div><div class='ctx'> 			       MTK_WCOMP_EN | MTK_DMAD_WR_WDONE |</div><div class='del'>-			       MTK_CHK_DDONE_EN | MTK_LEAKY_BUCKET_EN;</div><div class='add'>+			       MTK_CHK_DDONE_EN;</div><div class='ctx'> 		else</div><div class='ctx'> 			val |= MTK_RX_BT_32DWORDS;</div><div class='ctx'> 		mtk_w32(eth, val, reg_map-&gt;qdma.glo_cfg);</div><div class='hunk'>@@ -3414,9 +3618,6 @@ static int mtk_open(struct net_device *dev)</div><div class='ctx'> 			}</div><div class='ctx'> 			mtk_gdm_config(eth, target_mac-&gt;id, gdm_config);</div><div class='ctx'> 		}</div><div class='del'>-		/* Reset and enable PSE */</div><div class='del'>-		mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);</div><div class='del'>-		mtk_w32(eth, 0, MTK_RST_GL);</div><div class='ctx'> </div><div class='ctx'> 		napi_enable(&amp;eth-&gt;tx_napi);</div><div class='ctx'> 		napi_enable(&amp;eth-&gt;rx_napi);</div><div class='hunk'>@@ -3928,6 +4129,10 @@ static int mtk_hw_init(struct mtk_eth *eth, bool reset)</div><div class='ctx'> 	else</div><div class='ctx'> 		mtk_hw_reset(eth);</div><div class='ctx'> </div><div class='add'>+	/* No MT7628/88 support yet */</div><div class='add'>+	if (reset &amp;&amp; !MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SOC_MT7628))</div><div class='add'>+		mtk_mdio_config(eth);</div><div class='add'>+</div><div class='ctx'> 	if (mtk_is_netsys_v3_or_greater(eth)) {</div><div class='ctx'> 		/* Set FE to PDMAv2 if necessary */</div><div class='ctx'> 		val = mtk_r32(eth, MTK_FE_GLO_MISC);</div><div class='hunk'>@@ -3988,11 +4193,27 @@ static int mtk_hw_init(struct mtk_eth *eth, bool reset)</div><div class='ctx'> 	mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);</div><div class='ctx'> </div><div class='ctx'> 	if (mtk_is_netsys_v3_or_greater(eth)) {</div><div class='del'>-		/* PSE should not drop port1, port8 and port9 packets */</div><div class='del'>-		mtk_w32(eth, 0x00000302, PSE_DROP_CFG);</div><div class='add'>+		/* PSE dummy page mechanism */</div><div class='add'>+		mtk_w32(eth, PSE_DUMMY_WORK_GDM(1) | PSE_DUMMY_WORK_GDM(2) |</div><div class='add'>+			PSE_DUMMY_WORK_GDM(3) | DUMMY_PAGE_THR, PSE_DUMY_REQ);</div><div class='add'>+</div><div class='add'>+		/* PSE free buffer drop threshold */</div><div class='add'>+		mtk_w32(eth, 0x00600009, PSE_IQ_REV(8));</div><div class='add'>+</div><div class='add'>+		/* PSE should not drop port8, port9 and port13 packets from</div><div class='add'>+		 * WDMA Tx</div><div class='add'>+		 */</div><div class='add'>+		mtk_w32(eth, 0x00002300, PSE_DROP_CFG);</div><div class='add'>+</div><div class='add'>+		/* PSE should drop packets to port8, port9 and port13 on WDMA Rx</div><div class='add'>+		 * ring full</div><div class='add'>+		 */</div><div class='add'>+		mtk_w32(eth, 0x00002300, PSE_PPE_DROP(0));</div><div class='add'>+		mtk_w32(eth, 0x00002300, PSE_PPE_DROP(1));</div><div class='add'>+		mtk_w32(eth, 0x00002300, PSE_PPE_DROP(2));</div><div class='ctx'> </div><div class='ctx'> 		/* GDM and CDM Threshold */</div><div class='del'>-		mtk_w32(eth, 0x00000707, MTK_CDMW0_THRES);</div><div class='add'>+		mtk_w32(eth, 0x08000707, MTK_CDMW0_THRES);</div><div class='ctx'> 		mtk_w32(eth, 0x00000077, MTK_CDMW1_THRES);</div><div class='ctx'> </div><div class='ctx'> 		/* Disable GDM1 RX CRC stripping */</div><div class='hunk'>@@ -4009,7 +4230,7 @@ static int mtk_hw_init(struct mtk_eth *eth, bool reset)</div><div class='ctx'> 		mtk_w32(eth, 0x00000300, PSE_DROP_CFG);</div><div class='ctx'> </div><div class='ctx'> 		/* PSE should drop packets to port 8/9 on WDMA Rx ring full */</div><div class='del'>-		mtk_w32(eth, 0x00000300, PSE_PPE0_DROP);</div><div class='add'>+		mtk_w32(eth, 0x00000300, PSE_PPE_DROP(0));</div><div class='ctx'> </div><div class='ctx'> 		/* PSE Free Queue Flow Control  */</div><div class='ctx'> 		mtk_w32(eth, 0x01fa01f4, PSE_FQFC_CFG2);</div><div class='hunk'>@@ -4474,6 +4695,20 @@ static int mtk_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam</div><div class='ctx'> 	return phylink_ethtool_set_pauseparam(mac-&gt;phylink, pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mtk_get_eee(struct net_device *dev, struct ethtool_keee *eee)</div><div class='add'>+{</div><div class='add'>+	struct mtk_mac *mac = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return phylink_ethtool_get_eee(mac-&gt;phylink, eee);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mtk_set_eee(struct net_device *dev, struct ethtool_keee *eee)</div><div class='add'>+{</div><div class='add'>+	struct mtk_mac *mac = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return phylink_ethtool_set_eee(mac-&gt;phylink, eee);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u16 mtk_select_queue(struct net_device *dev, struct sk_buff *skb,</div><div class='ctx'> 			    struct net_device *sb_dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -4506,6 +4741,8 @@ static const struct ethtool_ops mtk_ethtool_ops = {</div><div class='ctx'> 	.set_pauseparam		= mtk_set_pauseparam,</div><div class='ctx'> 	.get_rxnfc		= mtk_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= mtk_set_rxnfc,</div><div class='add'>+	.get_eee		= mtk_get_eee,</div><div class='add'>+	.set_eee		= mtk_set_eee,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops mtk_netdev_ops = {</div><div class='hunk'>@@ -4615,6 +4852,9 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)</div><div class='ctx'> 	mac-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='ctx'> 	mac-&gt;phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='ctx'> 		MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD;</div><div class='add'>+	mac-&gt;phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD |</div><div class='add'>+		MAC_2500FD;</div><div class='add'>+	mac-&gt;phylink_config.lpi_timer_default = 1000;</div><div class='ctx'> </div><div class='ctx'> 	/* MT7623 gmac0 is now missing its speed-specific PLL configuration</div><div class='ctx'> 	 * in its .mac_config method (since state-&gt;speed is not valid there.</div><div class='hunk'>@@ -4653,7 +4893,7 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mtk_is_netsys_v3_or_greater(mac-&gt;hw) &amp;&amp;</div><div class='del'>-	    MTK_HAS_CAPS(mac-&gt;hw-&gt;soc-&gt;caps, MTK_ESW_BIT) &amp;&amp;</div><div class='add'>+	    MTK_HAS_CAPS(mac-&gt;hw-&gt;soc-&gt;caps, MTK_ESW) &amp;&amp;</div><div class='ctx'> 	    id == MTK_GMAC1_ID) {</div><div class='ctx'> 		mac-&gt;phylink_config.mac_capabilities = MAC_ASYM_PAUSE |</div><div class='ctx'> 						       MAC_SYM_PAUSE |</div><div class='hunk'>@@ -4673,6 +4913,11 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)</div><div class='ctx'> </div><div class='ctx'> 	mac-&gt;phylink = phylink;</div><div class='ctx'> </div><div class='add'>+	if (MTK_HAS_CAPS(mac-&gt;hw-&gt;soc-&gt;caps, MTK_2P5GPHY) &amp;&amp;</div><div class='add'>+	    id == MTK_GMAC2_ID)</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  mac-&gt;phylink_config.supported_interfaces);</div><div class='add'>+</div><div class='ctx'> 	SET_NETDEV_DEV(eth-&gt;netdev[id], eth-&gt;dev);</div><div class='ctx'> 	eth-&gt;netdev[id]-&gt;watchdog_timeo = 5 * HZ;</div><div class='ctx'> 	eth-&gt;netdev[id]-&gt;netdev_ops = &amp;mtk_netdev_ops;</div><div class='hunk'>@@ -4687,7 +4932,7 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)</div><div class='ctx'> 	eth-&gt;netdev[id]-&gt;features |= eth-&gt;soc-&gt;hw_features;</div><div class='ctx'> 	eth-&gt;netdev[id]-&gt;ethtool_ops = &amp;mtk_ethtool_ops;</div><div class='ctx'> </div><div class='del'>-	eth-&gt;netdev[id]-&gt;irq = eth-&gt;irq[0];</div><div class='add'>+	eth-&gt;netdev[id]-&gt;irq = eth-&gt;irq[MTK_FE_IRQ_SHARED];</div><div class='ctx'> 	eth-&gt;netdev[id]-&gt;dev.of_node = np;</div><div class='ctx'> </div><div class='ctx'> 	if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SOC_MT7628))</div><div class='hunk'>@@ -4730,7 +4975,7 @@ void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev)</div><div class='ctx'> 		list_add_tail(&amp;dev-&gt;close_list, &amp;dev_list);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_close_many(&amp;dev_list, false);</div><div class='add'>+	netif_close_many(&amp;dev_list, false);</div><div class='ctx'> </div><div class='ctx'> 	eth-&gt;dma_dev = dma_dev;</div><div class='ctx'> </div><div class='hunk'>@@ -4772,9 +5017,30 @@ static int mtk_sgmii_init(struct mtk_eth *eth)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mtk_setup_legacy_sram(struct mtk_eth *eth, struct resource *res)</div><div class='add'>+{</div><div class='add'>+	dev_warn(eth-&gt;dev, "legacy DT: using hard-coded SRAM offset.\n");</div><div class='add'>+</div><div class='add'>+	if (res-&gt;start + MTK_ETH_SRAM_OFFSET + MTK_ETH_NETSYS_V2_SRAM_SIZE - 1 &gt;</div><div class='add'>+	    res-&gt;end)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	eth-&gt;sram_pool = devm_gen_pool_create(eth-&gt;dev,</div><div class='add'>+					      const_ilog2(MTK_ETH_SRAM_GRANULARITY),</div><div class='add'>+					      NUMA_NO_NODE, dev_name(eth-&gt;dev));</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(eth-&gt;sram_pool))</div><div class='add'>+		return PTR_ERR(eth-&gt;sram_pool);</div><div class='add'>+</div><div class='add'>+	return gen_pool_add_virt(eth-&gt;sram_pool,</div><div class='add'>+				 (unsigned long)eth-&gt;base + MTK_ETH_SRAM_OFFSET,</div><div class='add'>+				 res-&gt;start + MTK_ETH_SRAM_OFFSET,</div><div class='add'>+				 MTK_ETH_NETSYS_V2_SRAM_SIZE, NUMA_NO_NODE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mtk_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct resource *res = NULL, *res_sram;</div><div class='add'>+	struct resource *res = NULL;</div><div class='ctx'> 	struct device_node *mac_np;</div><div class='ctx'> 	struct mtk_eth *eth;</div><div class='ctx'> 	int err, i;</div><div class='hunk'>@@ -4794,20 +5060,6 @@ static int mtk_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SOC_MT7628))</div><div class='ctx'> 		eth-&gt;ip_align = NET_IP_ALIGN;</div><div class='ctx'> </div><div class='del'>-	if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SRAM)) {</div><div class='del'>-		/* SRAM is actual memory and supports transparent access just like DRAM.</div><div class='del'>-		 * Hence we don't require __iomem being set and don't need to use accessor</div><div class='del'>-		 * functions to read from or write to SRAM.</div><div class='del'>-		 */</div><div class='del'>-		if (mtk_is_netsys_v3_or_greater(eth)) {</div><div class='del'>-			eth-&gt;sram_base = (void __force *)devm_platform_ioremap_resource(pdev, 1);</div><div class='del'>-			if (IS_ERR(eth-&gt;sram_base))</div><div class='del'>-				return PTR_ERR(eth-&gt;sram_base);</div><div class='del'>-		} else {</div><div class='del'>-			eth-&gt;sram_base = (void __force *)eth-&gt;base + MTK_ETH_SRAM_OFFSET;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_36BIT_DMA)) {</div><div class='ctx'> 		err = dma_set_mask(&amp;pdev-&gt;dev, DMA_BIT_MASK(36));</div><div class='ctx'> 		if (!err)</div><div class='hunk'>@@ -4882,16 +5134,21 @@ static int mtk_probe(struct platform_device *pdev)</div><div class='ctx'> 			err = -EINVAL;</div><div class='ctx'> 			goto err_destroy_sgmii;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SRAM)) {</div><div class='del'>-			if (mtk_is_netsys_v3_or_greater(eth)) {</div><div class='del'>-				res_sram = platform_get_resource(pdev, IORESOURCE_MEM, 1);</div><div class='del'>-				if (!res_sram) {</div><div class='add'>+			eth-&gt;sram_pool = of_gen_pool_get(pdev-&gt;dev.of_node,</div><div class='add'>+							 "sram", 0);</div><div class='add'>+			if (!eth-&gt;sram_pool) {</div><div class='add'>+				if (!mtk_is_netsys_v3_or_greater(eth)) {</div><div class='add'>+					err = mtk_setup_legacy_sram(eth, res);</div><div class='add'>+					if (err)</div><div class='add'>+						goto err_destroy_sgmii;</div><div class='add'>+				} else {</div><div class='add'>+					dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+						"Could not get SRAM pool\n");</div><div class='ctx'> 					err = -EINVAL;</div><div class='ctx'> 					goto err_destroy_sgmii;</div><div class='ctx'> 				}</div><div class='del'>-				eth-&gt;phy_scratch_ring = res_sram-&gt;start;</div><div class='del'>-			} else {</div><div class='del'>-				eth-&gt;phy_scratch_ring = res-&gt;start + MTK_ETH_SRAM_OFFSET;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4917,17 +5174,10 @@ static int mtk_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; 3; i++) {</div><div class='del'>-		if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SHARED_INT) &amp;&amp; i &gt; 0)</div><div class='del'>-			eth-&gt;irq[i] = eth-&gt;irq[0];</div><div class='del'>-		else</div><div class='del'>-			eth-&gt;irq[i] = platform_get_irq(pdev, i);</div><div class='del'>-		if (eth-&gt;irq[i] &lt; 0) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "no IRQ%d resource found\n", i);</div><div class='del'>-			err = -ENXIO;</div><div class='del'>-			goto err_wed_exit;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	err = mtk_get_irqs(pdev, eth);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_wed_exit;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;clks); i++) {</div><div class='ctx'> 		eth-&gt;clks[i] = devm_clk_get(eth-&gt;dev,</div><div class='ctx'> 					    mtk_clks_source_name[i]);</div><div class='hunk'>@@ -4971,17 +5221,17 @@ static int mtk_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (MTK_HAS_CAPS(eth-&gt;soc-&gt;caps, MTK_SHARED_INT)) {</div><div class='del'>-		err = devm_request_irq(eth-&gt;dev, eth-&gt;irq[0],</div><div class='add'>+		err = devm_request_irq(eth-&gt;dev, eth-&gt;irq[MTK_FE_IRQ_SHARED],</div><div class='ctx'> 				       mtk_handle_irq, 0,</div><div class='ctx'> 				       dev_name(eth-&gt;dev), eth);</div><div class='ctx'> 	} else {</div><div class='del'>-		err = devm_request_irq(eth-&gt;dev, eth-&gt;irq[1],</div><div class='add'>+		err = devm_request_irq(eth-&gt;dev, eth-&gt;irq[MTK_FE_IRQ_TX],</div><div class='ctx'> 				       mtk_handle_irq_tx, 0,</div><div class='ctx'> 				       dev_name(eth-&gt;dev), eth);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_free_dev;</div><div class='ctx'> </div><div class='del'>-		err = devm_request_irq(eth-&gt;dev, eth-&gt;irq[2],</div><div class='add'>+		err = devm_request_irq(eth-&gt;dev, eth-&gt;irq[MTK_FE_IRQ_RX],</div><div class='ctx'> 				       mtk_handle_irq_rx, 0,</div><div class='ctx'> 				       dev_name(eth-&gt;dev), eth);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5027,7 +5277,7 @@ static int mtk_probe(struct platform_device *pdev)</div><div class='ctx'> 		} else</div><div class='ctx'> 			netif_info(eth, probe, eth-&gt;netdev[i],</div><div class='ctx'> 				   "mediatek frame engine at 0x%08lx, irq %d\n",</div><div class='del'>-				   eth-&gt;netdev[i]-&gt;base_addr, eth-&gt;irq[0]);</div><div class='add'>+				   eth-&gt;netdev[i]-&gt;base_addr, eth-&gt;irq[MTK_FE_IRQ_SHARED]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* we run 2 devices on the same DMA ring so we need a dummy device</div><div class='hunk'>@@ -5368,3 +5618,4 @@ module_platform_driver(mtk_driver);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("John Crispin &lt;blogic@openwrt.org&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Ethernet driver for MediaTek SoC");</div><div class='add'>+MODULE_IMPORT_NS("NETDEV_INTERNAL");</div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h<br/>index 0d5225f1d3ee..0168e2fbc619 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_eth_soc.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_eth_soc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_eth_soc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mediatek/mtk_eth_soc.h</a></div><div class='hunk'>@@ -141,8 +141,10 @@</div><div class='ctx'> #define MTK_GDMA_MAC_ADRH(x)	({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ?	\</div><div class='ctx'> 				   0x54C : 0x50C + (_x * 0x1000); })</div><div class='ctx'> </div><div class='del'>-/* Internal SRAM offset */</div><div class='del'>-#define MTK_ETH_SRAM_OFFSET	0x40000</div><div class='add'>+/* legacy DT support for internal SRAM */</div><div class='add'>+#define MTK_ETH_SRAM_OFFSET		0x40000</div><div class='add'>+#define MTK_ETH_SRAM_GRANULARITY	32</div><div class='add'>+#define MTK_ETH_NETSYS_V2_SRAM_SIZE	0x40000</div><div class='ctx'> </div><div class='ctx'> /* FE global misc reg*/</div><div class='ctx'> #define MTK_FE_GLO_MISC         0x124</div><div class='hunk'>@@ -151,7 +153,15 @@</div><div class='ctx'> #define PSE_FQFC_CFG1		0x100</div><div class='ctx'> #define PSE_FQFC_CFG2		0x104</div><div class='ctx'> #define PSE_DROP_CFG		0x108</div><div class='del'>-#define PSE_PPE0_DROP		0x110</div><div class='add'>+#define PSE_PPE_DROP(x)		(0x110 + ((x) * 0x4))</div><div class='add'>+</div><div class='add'>+/* PSE Last FreeQ Page Request Control */</div><div class='add'>+#define PSE_DUMY_REQ		0x10C</div><div class='add'>+/* PSE_DUMY_REQ is not a typo but actually called like that also in</div><div class='add'>+ * MediaTek's datasheet</div><div class='add'>+ */</div><div class='add'>+#define PSE_DUMMY_WORK_GDM(x)	BIT(16 + (x))</div><div class='add'>+#define DUMMY_PAGE_THR		0x1</div><div class='ctx'> </div><div class='ctx'> /* PSE Input Queue Reservation Register*/</div><div class='ctx'> #define PSE_IQ_REV(x)		(0x140 + (((x) - 1) &lt;&lt; 2))</div><div class='hunk'>@@ -423,7 +433,8 @@</div><div class='ctx'> </div><div class='ctx'> /* XMAC status registers */</div><div class='ctx'> #define MTK_XGMAC_STS(x)	(((x) == MTK_GMAC3_ID) ? 0x1001C : 0x1000C)</div><div class='del'>-#define MTK_XGMAC_FORCE_LINK(x)	(((x) == MTK_GMAC2_ID) ? BIT(31) : BIT(15))</div><div class='add'>+#define MTK_XGMAC_FORCE_MODE(x)	(((x) == MTK_GMAC2_ID) ? BIT(31) : BIT(15))</div><div class='add'>+#define MTK_XGMAC_FORCE_LINK(x)	(((x) == MTK_GMAC2_ID) ? BIT(27) : BIT(11))</div><div class='ctx'> #define MTK_USXGMII_PCS_LINK	BIT(8)</div><div class='ctx'> #define MTK_XGMAC_RX_FC		BIT(5)</div><div class='ctx'> #define MTK_XGMAC_TX_FC		BIT(4)</div><div class='hunk'>@@ -453,6 +464,8 @@</div><div class='ctx'> #define MAC_MCR_RX_FIFO_CLR_DIS	BIT(12)</div><div class='ctx'> #define MAC_MCR_BACKOFF_EN	BIT(9)</div><div class='ctx'> #define MAC_MCR_BACKPR_EN	BIT(8)</div><div class='add'>+#define MAC_MCR_EEE1G		BIT(7)</div><div class='add'>+#define MAC_MCR_EEE100M		BIT(6)</div><div class='ctx'> #define MAC_MCR_FORCE_RX_FC	BIT(5)</div><div class='ctx'> #define MAC_MCR_FORCE_TX_FC	BIT(4)</div><div class='ctx'> #define MAC_MCR_SPEED_1000	BIT(3)</div><div class='hunk'>@@ -461,6 +474,15 @@</div><div class='ctx'> #define MAC_MCR_FORCE_LINK	BIT(0)</div><div class='ctx'> #define MAC_MCR_FORCE_LINK_DOWN	(MAC_MCR_FORCE_MODE)</div><div class='ctx'> </div><div class='add'>+/* Mac EEE control registers */</div><div class='add'>+#define MTK_MAC_EEECR(x)		(0x10104 + (x * 0x100))</div><div class='add'>+#define MAC_EEE_WAKEUP_TIME_1000	GENMASK(31, 24)</div><div class='add'>+#define MAC_EEE_WAKEUP_TIME_100		GENMASK(23, 16)</div><div class='add'>+#define MAC_EEE_LPI_TXIDLE_THD		GENMASK(15, 8)</div><div class='add'>+#define MAC_EEE_CKG_TXIDLE		BIT(3)</div><div class='add'>+#define MAC_EEE_CKG_RXLPI		BIT(2)</div><div class='add'>+#define MAC_EEE_LPI_MODE		BIT(0)</div><div class='add'>+</div><div class='ctx'> /* Mac status registers */</div><div class='ctx'> #define MTK_MAC_MSR(x)		(0x10108 + (x * 0x100))</div><div class='ctx'> #define MAC_MSR_EEE1G		BIT(7)</div><div class='hunk'>@@ -505,6 +527,21 @@</div><div class='ctx'> #define INTF_MODE_RGMII_1000    (TRGMII_MODE | TRGMII_CENTRAL_ALIGNED)</div><div class='ctx'> #define INTF_MODE_RGMII_10_100  0</div><div class='ctx'> </div><div class='add'>+/* XFI Mac control registers */</div><div class='add'>+#define MTK_XMAC_BASE(x)	(0x12000 + (((x) - 1) * 0x1000))</div><div class='add'>+#define MTK_XMAC_MCR(x)		(MTK_XMAC_BASE(x))</div><div class='add'>+#define XMAC_MCR_TRX_DISABLE	0xf</div><div class='add'>+#define XMAC_MCR_FORCE_TX_FC	BIT(5)</div><div class='add'>+#define XMAC_MCR_FORCE_RX_FC	BIT(4)</div><div class='add'>+</div><div class='add'>+/* XFI Mac logic reset registers */</div><div class='add'>+#define MTK_XMAC_LOGIC_RST(x)	(MTK_XMAC_BASE(x) + 0x10)</div><div class='add'>+#define XMAC_LOGIC_RST		BIT(0)</div><div class='add'>+</div><div class='add'>+/* XFI Mac count global control */</div><div class='add'>+#define MTK_XMAC_CNT_CTRL(x)	(MTK_XMAC_BASE(x) + 0x100)</div><div class='add'>+#define XMAC_GLB_CNTCLR		BIT(0)</div><div class='add'>+</div><div class='ctx'> /* GPIO port control registers for GMAC 2*/</div><div class='ctx'> #define GPIO_OD33_CTRL8		0x4c0</div><div class='ctx'> #define GPIO_BIAS_CTRL		0xed0</div><div class='hunk'>@@ -568,6 +605,10 @@</div><div class='ctx'> #define GEPHY_MAC_SEL          BIT(1)</div><div class='ctx'> </div><div class='ctx'> /* Top misc registers */</div><div class='add'>+#define TOP_MISC_NETSYS_PCS_MUX	0x0</div><div class='add'>+#define NETSYS_PCS_MUX_MASK	GENMASK(1, 0)</div><div class='add'>+#define MUX_G2_USXGMII_SEL	BIT(1)</div><div class='add'>+</div><div class='ctx'> #define USB_PHY_SWITCH_REG	0x218</div><div class='ctx'> #define QPHY_SEL_MASK		GENMASK(1, 0)</div><div class='ctx'> #define SGMII_QPHY_SEL		0x2</div><div class='hunk'>@@ -603,6 +644,11 @@</div><div class='ctx'> </div><div class='ctx'> #define MTK_MAC_FSM(x)		(0x1010C + ((x) * 0x100))</div><div class='ctx'> </div><div class='add'>+#define MTK_FE_IRQ_SHARED	0</div><div class='add'>+#define MTK_FE_IRQ_TX		0</div><div class='add'>+#define MTK_FE_IRQ_RX		1</div><div class='add'>+#define MTK_FE_IRQ_NUM		(MTK_FE_IRQ_RX + 1)</div><div class='add'>+</div><div class='ctx'> struct mtk_rx_dma {</div><div class='ctx'> 	unsigned int rxd1;</div><div class='ctx'> 	unsigned int rxd2;</div><div class='hunk'>@@ -932,6 +978,7 @@ enum mkt_eth_capabilities {</div><div class='ctx'> 	MTK_RGMII_BIT = 0,</div><div class='ctx'> 	MTK_TRGMII_BIT,</div><div class='ctx'> 	MTK_SGMII_BIT,</div><div class='add'>+	MTK_2P5GPHY_BIT,</div><div class='ctx'> 	MTK_ESW_BIT,</div><div class='ctx'> 	MTK_GEPHY_BIT,</div><div class='ctx'> 	MTK_MUX_BIT,</div><div class='hunk'>@@ -952,6 +999,7 @@ enum mkt_eth_capabilities {</div><div class='ctx'> 	MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT,</div><div class='ctx'> 	MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT,</div><div class='ctx'> 	MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT,</div><div class='add'>+	MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT,</div><div class='ctx'> 	MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT,</div><div class='ctx'> 	MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT,</div><div class='ctx'> </div><div class='hunk'>@@ -961,6 +1009,7 @@ enum mkt_eth_capabilities {</div><div class='ctx'> 	MTK_ETH_PATH_GMAC1_SGMII_BIT,</div><div class='ctx'> 	MTK_ETH_PATH_GMAC2_RGMII_BIT,</div><div class='ctx'> 	MTK_ETH_PATH_GMAC2_SGMII_BIT,</div><div class='add'>+	MTK_ETH_PATH_GMAC2_2P5GPHY_BIT,</div><div class='ctx'> 	MTK_ETH_PATH_GMAC2_GEPHY_BIT,</div><div class='ctx'> 	MTK_ETH_PATH_GDM1_ESW_BIT,</div><div class='ctx'> };</div><div class='hunk'>@@ -969,6 +1018,7 @@ enum mkt_eth_capabilities {</div><div class='ctx'> #define MTK_RGMII		BIT_ULL(MTK_RGMII_BIT)</div><div class='ctx'> #define MTK_TRGMII		BIT_ULL(MTK_TRGMII_BIT)</div><div class='ctx'> #define MTK_SGMII		BIT_ULL(MTK_SGMII_BIT)</div><div class='add'>+#define MTK_2P5GPHY		BIT_ULL(MTK_2P5GPHY_BIT)</div><div class='ctx'> #define MTK_ESW			BIT_ULL(MTK_ESW_BIT)</div><div class='ctx'> #define MTK_GEPHY		BIT_ULL(MTK_GEPHY_BIT)</div><div class='ctx'> #define MTK_MUX			BIT_ULL(MTK_MUX_BIT)</div><div class='hunk'>@@ -991,6 +1041,8 @@ enum mkt_eth_capabilities {</div><div class='ctx'> 	BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)</div><div class='ctx'> #define MTK_ETH_MUX_U3_GMAC2_TO_QPHY		\</div><div class='ctx'> 	BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)</div><div class='add'>+#define MTK_ETH_MUX_GMAC2_TO_2P5GPHY		\</div><div class='add'>+	BIT_ULL(MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT)</div><div class='ctx'> #define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII	\</div><div class='ctx'> 	BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)</div><div class='ctx'> #define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII	\</div><div class='hunk'>@@ -1002,6 +1054,7 @@ enum mkt_eth_capabilities {</div><div class='ctx'> #define MTK_ETH_PATH_GMAC1_SGMII	BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT)</div><div class='ctx'> #define MTK_ETH_PATH_GMAC2_RGMII	BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT)</div><div class='ctx'> #define MTK_ETH_PATH_GMAC2_SGMII	BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT)</div><div class='add'>+#define MTK_ETH_PATH_GMAC2_2P5GPHY	BIT_ULL(MTK_ETH_PATH_GMAC2_2P5GPHY_BIT)</div><div class='ctx'> #define MTK_ETH_PATH_GMAC2_GEPHY	BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT)</div><div class='ctx'> #define MTK_ETH_PATH_GDM1_ESW		BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT)</div><div class='ctx'> </div><div class='hunk'>@@ -1011,6 +1064,7 @@ enum mkt_eth_capabilities {</div><div class='ctx'> #define MTK_GMAC2_RGMII		(MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII)</div><div class='ctx'> #define MTK_GMAC2_SGMII		(MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII)</div><div class='ctx'> #define MTK_GMAC2_GEPHY		(MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY)</div><div class='add'>+#define MTK_GMAC2_2P5GPHY	(MTK_ETH_PATH_GMAC2_2P5GPHY | MTK_2P5GPHY)</div><div class='ctx'> #define MTK_GDM1_ESW		(MTK_ETH_PATH_GDM1_ESW | MTK_ESW)</div><div class='ctx'> </div><div class='ctx'> /* MUXes present on SoCs */</div><div class='hunk'>@@ -1030,6 +1084,10 @@ enum mkt_eth_capabilities {</div><div class='ctx'> 	(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \</div><div class='ctx'> 	MTK_SHARED_SGMII)</div><div class='ctx'> </div><div class='add'>+/* 2: GMAC2 -&gt; 2P5GPHY */</div><div class='add'>+#define MTK_MUX_GMAC2_TO_2P5GPHY      \</div><div class='add'>+	(MTK_ETH_MUX_GMAC2_TO_2P5GPHY | MTK_MUX | MTK_INFRA)</div><div class='add'>+</div><div class='ctx'> /* 0: GMACx -&gt; GEPHY, 1: GMACx -&gt; SGMII where x is 1 or 2 */</div><div class='ctx'> #define MTK_MUX_GMAC12_TO_GEPHY_SGMII   \</div><div class='ctx'> 	(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX)</div><div class='hunk'>@@ -1065,8 +1123,9 @@ enum mkt_eth_capabilities {</div><div class='ctx'> 		      MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \</div><div class='ctx'> 		      MTK_RSTCTRL_PPE1 | MTK_SRAM)</div><div class='ctx'> </div><div class='del'>-#define MT7988_CAPS  (MTK_36BIT_DMA | MTK_GDM1_ESW | MTK_QDMA | \</div><div class='del'>-		      MTK_RSTCTRL_PPE1 | MTK_RSTCTRL_PPE2 | MTK_SRAM)</div><div class='add'>+#define MT7988_CAPS  (MTK_36BIT_DMA | MTK_GDM1_ESW | MTK_GMAC2_2P5GPHY | \</div><div class='add'>+		      MTK_MUX_GMAC2_TO_2P5GPHY | MTK_QDMA | MTK_RSTCTRL_PPE1 | \</div><div class='add'>+		      MTK_RSTCTRL_PPE2 | MTK_SRAM)</div><div class='ctx'> </div><div class='ctx'> struct mtk_tx_dma_desc_info {</div><div class='ctx'> 	dma_addr_t	addr;</div><div class='hunk'>@@ -1126,7 +1185,7 @@ struct mtk_reg_map {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* struct mtk_eth_data -	This is the structure holding all differences</div><div class='del'>- *				among various plaforms</div><div class='add'>+ *				among various platforms</div><div class='ctx'>  * @reg_map			Soc register map.</div><div class='ctx'>  * @ana_rgc3:                   The offset for register ANA_RGC3 related to</div><div class='ctx'>  *				sgmiisys syscon</div><div class='hunk'>@@ -1186,8 +1245,9 @@ struct mtk_soc_data {</div><div class='ctx'> /* struct mtk_eth -	This is the main datasructure for holding the state</div><div class='ctx'>  *			of the driver</div><div class='ctx'>  * @dev:		The device pointer</div><div class='del'>- * @dev:		The device pointer used for dma mapping/alloc</div><div class='add'>+ * @dma_dev:		The device pointer used for dma mapping/alloc</div><div class='ctx'>  * @base:		The mapped register i/o base</div><div class='add'>+ * @sram_pool:		Pointer to SRAM pool used for DMA descriptor rings</div><div class='ctx'>  * @page_lock:		Make sure that register operations are atomic</div><div class='ctx'>  * @tx_irq__lock:	Make sure that IRQ register operations are atomic</div><div class='ctx'>  * @rx_irq__lock:	Make sure that IRQ register operations are atomic</div><div class='hunk'>@@ -1226,21 +1286,21 @@ struct mtk_soc_data {</div><div class='ctx'>  * @mii_bus:		If there is a bus we need to create an instance for it</div><div class='ctx'>  * @pending_work:	The workqueue used to reset the dma ring</div><div class='ctx'>  * @state:		Initialization and runtime state of the device</div><div class='del'>- * @soc:		Holding specific data among vaious SoCs</div><div class='add'>+ * @soc:		Holding specific data among various SoCs</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> struct mtk_eth {</div><div class='ctx'> 	struct device			*dev;</div><div class='ctx'> 	struct device			*dma_dev;</div><div class='ctx'> 	void __iomem			*base;</div><div class='del'>-	void				*sram_base;</div><div class='add'>+	struct gen_pool			*sram_pool;</div><div class='ctx'> 	spinlock_t			page_lock;</div><div class='ctx'> 	spinlock_t			tx_irq_lock;</div><div class='ctx'> 	spinlock_t			rx_irq_lock;</div><div class='ctx'> 	struct net_device		*dummy_dev;</div><div class='ctx'> 	struct net_device		*netdev[MTK_MAX_DEVS];</div><div class='ctx'> 	struct mtk_mac			*mac[MTK_MAX_DEVS];</div><div class='del'>-	int				irq[3];</div><div class='add'>+	int				irq[MTK_FE_IRQ_NUM];</div><div class='ctx'> 	u32				msg_enable;</div><div class='ctx'> 	unsigned long			sysclk;</div><div class='ctx'> 	struct regmap			*ethsys;</div><div class='hunk'>@@ -1260,6 +1320,7 @@ struct mtk_eth {</div><div class='ctx'> 	struct clk			*clks[MTK_CLK_MAX];</div><div class='ctx'> </div><div class='ctx'> 	struct mii_bus			*mii_bus;</div><div class='add'>+	unsigned int			mdc_divider;</div><div class='ctx'> 	struct work_struct		pending_work;</div><div class='ctx'> 	unsigned long			state;</div><div class='ctx'> </div><div class='hunk'>@@ -1417,6 +1478,23 @@ static inline u32 mtk_get_ib2_multicast_mask(struct mtk_eth *eth)</div><div class='ctx'> 	return MTK_FOE_IB2_MULTICAST;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool mtk_interface_mode_is_xgmii(struct mtk_eth *eth,</div><div class='add'>+					       phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	if (!mtk_is_netsys_v3_or_greater(eth))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_INTERNAL:</div><div class='add'>+	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_10GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_5GBASER:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* read the hardware status register */</div><div class='ctx'> void mtk_stats_update_mac(struct mtk_mac *mac);</div><div class='ctx'> </div><div class='hunk'>@@ -1425,6 +1503,7 @@ u32 mtk_r32(struct mtk_eth *eth, unsigned reg);</div><div class='ctx'> u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg);</div><div class='ctx'> </div><div class='ctx'> int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id);</div><div class='add'>+int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id);</div><div class='ctx'> int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id);</div><div class='ctx'> int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c<br/>index f20bb390df3a..e9bd32741983 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_ppe_offload.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_ppe_offload.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_ppe_offload.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mediatek/mtk_ppe_offload.c</a></div><div class='hunk'>@@ -34,8 +34,10 @@ struct mtk_flow_data {</div><div class='ctx'> 	u16 vlan_in;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='del'>-		u16 id;</div><div class='del'>-		__be16 proto;</div><div class='add'>+		struct {</div><div class='add'>+			u16 id;</div><div class='add'>+			__be16 proto;</div><div class='add'>+		} vlans[2];</div><div class='ctx'> 		u8 num;</div><div class='ctx'> 	} vlan;</div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -99,7 +101,9 @@ mtk_flow_get_wdma_info(struct net_device *dev, const u8 *addr, struct mtk_wdma_i</div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_NET_MEDIATEK_SOC_WED))</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='add'>+	rcu_read_lock();</div><div class='ctx'> 	err = dev_fill_forward_path(dev, addr, &amp;stack);</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -349,18 +353,19 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f,</div><div class='ctx'> 		case FLOW_ACTION_CSUM:</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FLOW_ACTION_VLAN_PUSH:</div><div class='del'>-			if (data.vlan.num == 1 ||</div><div class='add'>+			if (data.vlan.num + data.pppoe.num == 2 ||</div><div class='ctx'> 			    act-&gt;vlan.proto != htons(ETH_P_8021Q))</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-			data.vlan.id = act-&gt;vlan.vid;</div><div class='del'>-			data.vlan.proto = act-&gt;vlan.proto;</div><div class='add'>+			data.vlan.vlans[data.vlan.num].id = act-&gt;vlan.vid;</div><div class='add'>+			data.vlan.vlans[data.vlan.num].proto = act-&gt;vlan.proto;</div><div class='ctx'> 			data.vlan.num++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FLOW_ACTION_VLAN_POP:</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FLOW_ACTION_PPPOE_PUSH:</div><div class='del'>-			if (data.pppoe.num == 1)</div><div class='add'>+			if (data.pppoe.num == 1 ||</div><div class='add'>+			    data.vlan.num == 2)</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 			data.pppoe.sid = act-&gt;pppoe.sid;</div><div class='hunk'>@@ -450,12 +455,9 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f,</div><div class='ctx'> 	if (offload_type == MTK_PPE_PKT_TYPE_BRIDGE)</div><div class='ctx'> 		foe.bridge.vlan = data.vlan_in;</div><div class='ctx'> </div><div class='del'>-	if (data.vlan.num == 1) {</div><div class='del'>-		if (data.vlan.proto != htons(ETH_P_8021Q))</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='add'>+	for (i = 0; i &lt; data.vlan.num; i++)</div><div class='add'>+		mtk_foe_entry_set_vlan(eth, &amp;foe, data.vlan.vlans[i].id);</div><div class='ctx'> </div><div class='del'>-		mtk_foe_entry_set_vlan(eth, &amp;foe, data.vlan.id);</div><div class='del'>-	}</div><div class='ctx'> 	if (data.pppoe.num == 1)</div><div class='ctx'> 		mtk_foe_entry_set_pppoe(eth, &amp;foe, data.pppoe.sid);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/mtk_star_emac.c b/drivers/net/ethernet/mediatek/mtk_star_emac.c<br/>index 25989c79c92e..b83886a41121 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_star_emac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_star_emac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_star_emac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mediatek/mtk_star_emac.c</a></div><div class='hunk'>@@ -1163,6 +1163,7 @@ static int mtk_star_tx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	struct net_device *ndev = priv-&gt;ndev;</div><div class='ctx'> 	unsigned int head = ring-&gt;head;</div><div class='ctx'> 	unsigned int entry = ring-&gt;tail;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	while (entry != head &amp;&amp; count &lt; (MTK_STAR_RING_NUM_DESCS - 1)) {</div><div class='ctx'> 		ret = mtk_star_tx_complete_one(priv);</div><div class='hunk'>@@ -1182,9 +1183,9 @@ static int mtk_star_tx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		netif_wake_queue(ndev);</div><div class='ctx'> </div><div class='ctx'> 	if (napi_complete(napi)) {</div><div class='del'>-		spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 		mtk_star_enable_dma_irq(priv, false, true);</div><div class='del'>-		spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1341,16 +1342,16 @@ push_new_skb:</div><div class='ctx'> static int mtk_star_rx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_star_priv *priv;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	int work_done = 0;</div><div class='ctx'> </div><div class='ctx'> 	priv = container_of(napi, struct mtk_star_priv, rx_napi);</div><div class='ctx'> </div><div class='ctx'> 	work_done = mtk_star_rx(priv, budget);</div><div class='del'>-	if (work_done &lt; budget) {</div><div class='del'>-		napi_complete_done(napi, work_done);</div><div class='del'>-		spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+	if (work_done &lt; budget &amp;&amp; napi_complete_done(napi, work_done)) {</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 		mtk_star_enable_dma_irq(priv, true, false);</div><div class='del'>-		spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return work_done;</div><div class='hunk'>@@ -1427,15 +1428,10 @@ static int mtk_star_mdio_init(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	of_node = dev-&gt;of_node;</div><div class='ctx'> </div><div class='del'>-	mdio_node = of_get_child_by_name(of_node, "mdio");</div><div class='add'>+	mdio_node = of_get_available_child_by_name(of_node, "mdio");</div><div class='ctx'> 	if (!mdio_node)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (!of_device_is_available(mdio_node)) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out_put_node;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	priv-&gt;mii = devm_mdiobus_alloc(dev);</div><div class='ctx'> 	if (!priv-&gt;mii) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -1467,6 +1463,8 @@ static __maybe_unused int mtk_star_suspend(struct device *dev)</div><div class='ctx'> 	if (netif_running(ndev))</div><div class='ctx'> 		mtk_star_disable(ndev);</div><div class='ctx'> </div><div class='add'>+	netif_device_detach(ndev);</div><div class='add'>+</div><div class='ctx'> 	clk_bulk_disable_unprepare(MTK_STAR_NCLKS, priv-&gt;clks);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1491,6 +1489,8 @@ static __maybe_unused int mtk_star_resume(struct device *dev)</div><div class='ctx'> 			clk_bulk_disable_unprepare(MTK_STAR_NCLKS, priv-&gt;clks);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netif_device_attach(ndev);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/mtk_wed.c b/drivers/net/ethernet/mediatek/mtk_wed.c<br/>index e212a4ba9275..1ed1f88dd7f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_wed.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_wed.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_wed.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mediatek/mtk_wed.c</a></div><div class='hunk'>@@ -59,7 +59,9 @@ struct mtk_wed_flow_block_priv {</div><div class='ctx'> static const struct mtk_wed_soc_data mt7622_data = {</div><div class='ctx'> 	.regmap = {</div><div class='ctx'> 		.tx_bm_tkid		= 0x088,</div><div class='del'>-		.wpdma_rx_ring0		= 0x770,</div><div class='add'>+		.wpdma_rx_ring = {</div><div class='add'>+			0x770,</div><div class='add'>+		},</div><div class='ctx'> 		.reset_idx_tx_mask	= GENMASK(3, 0),</div><div class='ctx'> 		.reset_idx_rx_mask	= GENMASK(17, 16),</div><div class='ctx'> 	},</div><div class='hunk'>@@ -70,7 +72,9 @@ static const struct mtk_wed_soc_data mt7622_data = {</div><div class='ctx'> static const struct mtk_wed_soc_data mt7986_data = {</div><div class='ctx'> 	.regmap = {</div><div class='ctx'> 		.tx_bm_tkid		= 0x0c8,</div><div class='del'>-		.wpdma_rx_ring0		= 0x770,</div><div class='add'>+		.wpdma_rx_ring = {</div><div class='add'>+			0x770,</div><div class='add'>+		},</div><div class='ctx'> 		.reset_idx_tx_mask	= GENMASK(1, 0),</div><div class='ctx'> 		.reset_idx_rx_mask	= GENMASK(7, 6),</div><div class='ctx'> 	},</div><div class='hunk'>@@ -81,7 +85,10 @@ static const struct mtk_wed_soc_data mt7986_data = {</div><div class='ctx'> static const struct mtk_wed_soc_data mt7988_data = {</div><div class='ctx'> 	.regmap = {</div><div class='ctx'> 		.tx_bm_tkid		= 0x0c8,</div><div class='del'>-		.wpdma_rx_ring0		= 0x7d0,</div><div class='add'>+		.wpdma_rx_ring = {</div><div class='add'>+			0x7d0,</div><div class='add'>+			0x7d8,</div><div class='add'>+		},</div><div class='ctx'> 		.reset_idx_tx_mask	= GENMASK(1, 0),</div><div class='ctx'> 		.reset_idx_rx_mask	= GENMASK(7, 6),</div><div class='ctx'> 	},</div><div class='hunk'>@@ -621,8 +628,8 @@ mtk_wed_amsdu_init(struct mtk_wed_device *dev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* eagle E1 PCIE1 tx ring 22 flow control issue */</div><div class='del'>-	if (dev-&gt;wlan.id == 0x7991)</div><div class='add'>+	/* Kite and Eagle E1 PCIE1 tx ring 22 flow control issue */</div><div class='add'>+	if (dev-&gt;wlan.id == 0x7991 || dev-&gt;wlan.id == 0x7992)</div><div class='ctx'> 		wed_clr(dev, MTK_WED_AMSDU_FIFO, MTK_WED_AMSDU_IS_PRIOR0_RING);</div><div class='ctx'> </div><div class='ctx'> 	wed_set(dev, MTK_WED_CTRL, MTK_WED_CTRL_TX_AMSDU_EN);</div><div class='hunk'>@@ -670,7 +677,7 @@ mtk_wed_tx_buffer_alloc(struct mtk_wed_device *dev)</div><div class='ctx'> 		void *buf;</div><div class='ctx'> 		int s;</div><div class='ctx'> </div><div class='del'>-		page = __dev_alloc_page(GFP_KERNEL);</div><div class='add'>+		page = __dev_alloc_page(GFP_KERNEL | GFP_DMA32);</div><div class='ctx'> 		if (!page)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -793,7 +800,7 @@ mtk_wed_hwrro_buffer_alloc(struct mtk_wed_device *dev)</div><div class='ctx'> 		struct page *page;</div><div class='ctx'> 		int s;</div><div class='ctx'> </div><div class='del'>-		page = __dev_alloc_page(GFP_KERNEL);</div><div class='add'>+		page = __dev_alloc_page(GFP_KERNEL | GFP_DMA32);</div><div class='ctx'> 		if (!page)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -1239,7 +1246,11 @@ mtk_wed_set_wpdma(struct mtk_wed_device *dev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	wed_w32(dev, MTK_WED_WPDMA_RX_GLO_CFG, dev-&gt;wlan.wpdma_rx_glo);</div><div class='del'>-	wed_w32(dev, dev-&gt;hw-&gt;soc-&gt;regmap.wpdma_rx_ring0, dev-&gt;wlan.wpdma_rx);</div><div class='add'>+	wed_w32(dev, dev-&gt;hw-&gt;soc-&gt;regmap.wpdma_rx_ring[0],</div><div class='add'>+		dev-&gt;wlan.wpdma_rx[0]);</div><div class='add'>+	if (mtk_wed_is_v3_or_greater(dev-&gt;hw))</div><div class='add'>+		wed_w32(dev, dev-&gt;hw-&gt;soc-&gt;regmap.wpdma_rx_ring[1],</div><div class='add'>+			dev-&gt;wlan.wpdma_rx[1]);</div><div class='ctx'> </div><div class='ctx'> 	if (!dev-&gt;wlan.hw_rro)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1318,26 +1329,14 @@ mtk_wed_rro_ring_alloc(struct mtk_wed_device *dev, struct mtk_wed_ring *ring,</div><div class='ctx'> static int</div><div class='ctx'> mtk_wed_rro_alloc(struct mtk_wed_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct reserved_mem *rmem;</div><div class='del'>-	struct device_node *np;</div><div class='del'>-	int index;</div><div class='del'>-</div><div class='del'>-	index = of_property_match_string(dev-&gt;hw-&gt;node, "memory-region-names",</div><div class='del'>-					 "wo-dlm");</div><div class='del'>-	if (index &lt; 0)</div><div class='del'>-		return index;</div><div class='add'>+	struct resource res;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	np = of_parse_phandle(dev-&gt;hw-&gt;node, "memory-region", index);</div><div class='del'>-	if (!np)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	rmem = of_reserved_mem_lookup(np);</div><div class='del'>-	of_node_put(np);</div><div class='del'>-</div><div class='del'>-	if (!rmem)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	ret = of_reserved_mem_region_to_resource_byname(dev-&gt;hw-&gt;node, "wo-dlm", &amp;res);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;rro.miod_phys = rmem-&gt;base;</div><div class='add'>+	dev-&gt;rro.miod_phys = res.start;</div><div class='ctx'> 	dev-&gt;rro.fdbk_phys = MTK_WED_MIOD_COUNT + dev-&gt;rro.miod_phys;</div><div class='ctx'> </div><div class='ctx'> 	return mtk_wed_rro_ring_alloc(dev, &amp;dev-&gt;rro.ring,</div><div class='hunk'>@@ -2000,7 +1999,7 @@ mtk_wed_configure_irq(struct mtk_wed_device *dev, u32 irq_mask)</div><div class='ctx'> 		if (mtk_wed_is_v3_or_greater(dev-&gt;hw))</div><div class='ctx'> 			wed_set(dev, MTK_WED_CTRL, MTK_WED_CTRL_TX_TKID_ALI_EN);</div><div class='ctx'> </div><div class='del'>-		/* initail tx interrupt trigger */</div><div class='add'>+		/* initial tx interrupt trigger */</div><div class='ctx'> 		wed_w32(dev, MTK_WED_WPDMA_INT_CTRL_TX,</div><div class='ctx'> 			MTK_WED_WPDMA_INT_CTRL_TX0_DONE_EN |</div><div class='ctx'> 			MTK_WED_WPDMA_INT_CTRL_TX0_DONE_CLR |</div><div class='hunk'>@@ -2011,7 +2010,7 @@ mtk_wed_configure_irq(struct mtk_wed_device *dev, u32 irq_mask)</div><div class='ctx'> 			FIELD_PREP(MTK_WED_WPDMA_INT_CTRL_TX1_DONE_TRIG,</div><div class='ctx'> 				   dev-&gt;wlan.tx_tbit[1]));</div><div class='ctx'> </div><div class='del'>-		/* initail txfree interrupt trigger */</div><div class='add'>+		/* initial txfree interrupt trigger */</div><div class='ctx'> 		wed_w32(dev, MTK_WED_WPDMA_INT_CTRL_TX_FREE,</div><div class='ctx'> 			MTK_WED_WPDMA_INT_CTRL_TX_FREE_DONE_EN |</div><div class='ctx'> 			MTK_WED_WPDMA_INT_CTRL_TX_FREE_DONE_CLR |</div><div class='hunk'>@@ -2335,6 +2334,16 @@ mtk_wed_start(struct mtk_wed_device *dev, u32 irq_mask)</div><div class='ctx'> 		if (!dev-&gt;rx_wdma[i].desc)</div><div class='ctx'> 			mtk_wed_wdma_rx_ring_setup(dev, i, 16, false);</div><div class='ctx'> </div><div class='add'>+	if (dev-&gt;wlan.hw_rro) {</div><div class='add'>+		for (i = 0; i &lt; MTK_WED_RX_PAGE_QUEUES; i++) {</div><div class='add'>+			u32 addr = MTK_WED_RRO_MSDU_PG_CTRL0(i) +</div><div class='add'>+				   MTK_WED_RING_OFS_COUNT;</div><div class='add'>+</div><div class='add'>+			if (!wed_r32(dev, addr))</div><div class='add'>+				wed_w32(dev, addr, 1);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mtk_wed_hw_init(dev);</div><div class='ctx'> 	mtk_wed_configure_irq(dev, irq_mask);</div><div class='ctx'> </div><div class='hunk'>@@ -2417,6 +2426,10 @@ mtk_wed_attach(struct mtk_wed_device *dev)</div><div class='ctx'> 	dev-&gt;version = hw-&gt;version;</div><div class='ctx'> 	dev-&gt;hw-&gt;pcie_base = mtk_wed_get_pcie_base(dev);</div><div class='ctx'> </div><div class='add'>+	ret = dma_set_mask_and_coherent(hw-&gt;dev, DMA_BIT_MASK(32));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	if (hw-&gt;eth-&gt;dma_dev == hw-&gt;eth-&gt;dev &amp;&amp;</div><div class='ctx'> 	    of_dma_is_coherent(hw-&gt;eth-&gt;dev-&gt;of_node))</div><div class='ctx'> 		mtk_eth_set_dma_device(hw-&gt;eth, hw-&gt;dev);</div><div class='hunk'>@@ -2794,7 +2807,6 @@ void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth,</div><div class='ctx'> 	if (!pdev)</div><div class='ctx'> 		goto err_of_node_put;</div><div class='ctx'> </div><div class='del'>-	get_device(&amp;pdev-&gt;dev);</div><div class='ctx'> 	irq = platform_get_irq(pdev, 0);</div><div class='ctx'> 	if (irq &lt; 0)</div><div class='ctx'> 		goto err_put_device;</div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/mtk_wed.h b/drivers/net/ethernet/mediatek/mtk_wed.h<br/>index c1f0479d7a71..b49aee9a8b65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_wed.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_wed.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_wed.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mediatek/mtk_wed.h</a></div><div class='hunk'>@@ -17,7 +17,7 @@ struct mtk_wed_wo;</div><div class='ctx'> struct mtk_wed_soc_data {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		u32 tx_bm_tkid;</div><div class='del'>-		u32 wpdma_rx_ring0;</div><div class='add'>+		u32 wpdma_rx_ring[MTK_WED_RX_QUEUES];</div><div class='ctx'> 		u32 reset_idx_tx_mask;</div><div class='ctx'> 		u32 reset_idx_rx_mask;</div><div class='ctx'> 	} regmap;</div><div class='head'>diff --git a/drivers/net/ethernet/mediatek/mtk_wed_mcu.c b/drivers/net/ethernet/mediatek/mtk_wed_mcu.c<br/>index c06e5ad18b01..fa6b21603416 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_wed_mcu.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mediatek/mtk_wed_mcu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mediatek/mtk_wed_mcu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mediatek/mtk_wed_mcu.c</a></div><div class='hunk'>@@ -234,27 +234,23 @@ int mtk_wed_mcu_msg_update(struct mtk_wed_device *dev, int id, void *data,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-mtk_wed_get_memory_region(struct mtk_wed_hw *hw, int index,</div><div class='add'>+mtk_wed_get_memory_region(struct mtk_wed_hw *hw, const char *name,</div><div class='ctx'> 			  struct mtk_wed_wo_memory_region *region)</div><div class='ctx'> {</div><div class='del'>-	struct reserved_mem *rmem;</div><div class='del'>-	struct device_node *np;</div><div class='del'>-</div><div class='del'>-	np = of_parse_phandle(hw-&gt;node, "memory-region", index);</div><div class='del'>-	if (!np)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	rmem = of_reserved_mem_lookup(np);</div><div class='del'>-	of_node_put(np);</div><div class='add'>+	struct resource res;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!rmem)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	ret = of_reserved_mem_region_to_resource_byname(hw-&gt;node, name, &amp;res);</div><div class='add'>+	if (ret)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	region-&gt;phy_addr = rmem-&gt;base;</div><div class='del'>-	region-&gt;size = rmem-&gt;size;</div><div class='del'>-	region-&gt;addr = devm_ioremap(hw-&gt;dev, region-&gt;phy_addr, region-&gt;size);</div><div class='add'>+	region-&gt;phy_addr = res.start;</div><div class='add'>+	region-&gt;size = resource_size(&amp;res);</div><div class='add'>+	region-&gt;addr = devm_ioremap_resource(hw-&gt;dev, &amp;res);</div><div class='add'>+	if (IS_ERR(region-&gt;addr))</div><div class='add'>+		return PTR_ERR(region-&gt;addr);</div><div class='ctx'> </div><div class='del'>-	return !region-&gt;addr ? -EINVAL : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -319,13 +315,7 @@ mtk_wed_mcu_load_firmware(struct mtk_wed_wo *wo)</div><div class='ctx'> </div><div class='ctx'> 	/* load firmware region metadata */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(mem_region); i++) {</div><div class='del'>-		int index = of_property_match_string(wo-&gt;hw-&gt;node,</div><div class='del'>-						     "memory-region-names",</div><div class='del'>-						     mem_region[i].name);</div><div class='del'>-		if (index &lt; 0)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		ret = mtk_wed_get_memory_region(wo-&gt;hw, index, &amp;mem_region[i]);</div><div class='add'>+		ret = mtk_wed_get_memory_region(wo-&gt;hw, mem_region[i].name, &amp;mem_region[i]);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/Kconfig b/drivers/net/ethernet/mellanox/mlx4/Kconfig<br/>index 825e05fb8607..0b1cb340206f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/Kconfig</a></div><div class='hunk'>@@ -7,6 +7,7 @@ config MLX4_EN</div><div class='ctx'> 	tristate "Mellanox Technologies 1/10/40Gbit Ethernet support"</div><div class='ctx'> 	depends on PCI &amp;&amp; NETDEVICES &amp;&amp; ETHERNET &amp;&amp; INET</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select PAGE_POOL</div><div class='ctx'> 	select MLX4_CORE</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Mellanox Technologies ConnectX Ethernet</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/alloc.c b/drivers/net/ethernet/mellanox/mlx4/alloc.c<br/>index b330020dc0d6..07b061a97a6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/alloc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/alloc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/alloc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/alloc.c</a></div><div class='hunk'>@@ -526,28 +526,6 @@ out:</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u32 mlx4_zone_free_entries(struct mlx4_zone_allocator *zones, u32 uid, u32 obj, u32 count)</div><div class='del'>-{</div><div class='del'>-	struct mlx4_zone_entry *zone;</div><div class='del'>-	int res = 0;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;zones-&gt;lock);</div><div class='del'>-</div><div class='del'>-	zone = __mlx4_find_zone_by_uid(zones, uid);</div><div class='del'>-</div><div class='del'>-	if (NULL == zone) {</div><div class='del'>-		res = -1;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	__mlx4_free_from_zone(zone, obj, count);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	spin_unlock(&amp;zones-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> u32 mlx4_zone_free_entries_unique(struct mlx4_zone_allocator *zones, u32 obj, u32 count)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_zone_entry *zone;</div><div class='hunk'>@@ -682,9 +660,9 @@ static struct mlx4_db_pgdir *mlx4_alloc_db_pgdir(struct device *dma_device)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx4_alloc_db_from_pgdir(struct mlx4_db_pgdir *pgdir,</div><div class='del'>-				    struct mlx4_db *db, int order)</div><div class='add'>+				    struct mlx4_db *db, unsigned int order)</div><div class='ctx'> {</div><div class='del'>-	int o;</div><div class='add'>+	unsigned int o;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (o = order; o &lt;= 1; ++o) {</div><div class='hunk'>@@ -712,7 +690,7 @@ found:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx4_db_alloc(struct mlx4_dev *dev, struct mlx4_db *db, int order)</div><div class='add'>+int mlx4_db_alloc(struct mlx4_dev *dev, struct mlx4_db *db, unsigned int order)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='ctx'> 	struct mlx4_db_pgdir *pgdir;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/catas.c b/drivers/net/ethernet/mellanox/mlx4/catas.c<br/>index 0d8a362c2673..edcc6f662618 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/catas.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/catas.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/catas.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/catas.c</a></div><div class='hunk'>@@ -236,7 +236,7 @@ static void dump_err_buf(struct mlx4_dev *dev)</div><div class='ctx'> </div><div class='ctx'> static void poll_catas(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct mlx4_priv *priv = from_timer(priv, t, catas_err.timer);</div><div class='add'>+	struct mlx4_priv *priv = timer_container_of(priv, t, catas_err.timer);</div><div class='ctx'> 	struct mlx4_dev *dev = &amp;priv-&gt;dev;</div><div class='ctx'> 	u32 slave_read;</div><div class='ctx'> </div><div class='hunk'>@@ -305,7 +305,7 @@ void mlx4_stop_catas_poll(struct mlx4_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_priv *priv = mlx4_priv(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;priv-&gt;catas_err.timer);</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;catas_err.timer);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;catas_err.map) {</div><div class='ctx'> 		iounmap(priv-&gt;catas_err.map);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_clock.c b/drivers/net/ethernet/mellanox/mlx4/en_clock.c<br/>index cd754cd76bde..2aeaafcfb993 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_clock.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_clock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_clock.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/en_clock.c</a></div><div class='hunk'>@@ -38,7 +38,7 @@</div><div class='ctx'> </div><div class='ctx'> /* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)</div><div class='ctx'>  */</div><div class='del'>-static u64 mlx4_en_read_clock(const struct cyclecounter *tc)</div><div class='add'>+static u64 mlx4_en_read_clock(struct cyclecounter *tc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_dev *mdev =</div><div class='ctx'> 		container_of(tc, struct mlx4_en_dev, cycles);</div><div class='hunk'>@@ -249,7 +249,7 @@ static const struct ptp_clock_info mlx4_en_ptp_clock_info = {</div><div class='ctx'> static u32 freq_to_shift(u16 freq)</div><div class='ctx'> {</div><div class='ctx'> 	u32 freq_khz = freq * 1000;</div><div class='del'>-	u64 max_val_cycles = freq_khz * 1000 * MLX4_EN_WRAP_AROUND_SEC;</div><div class='add'>+	u64 max_val_cycles = freq_khz * 1000ULL * MLX4_EN_WRAP_AROUND_SEC;</div><div class='ctx'> 	u64 max_val_cycles_rounded = 1ULL &lt;&lt; fls64(max_val_cycles - 1);</div><div class='ctx'> 	/* calculate max possible multiplier in order to fit in 64bit */</div><div class='ctx'> 	u64 max_mul = div64_u64(ULLONG_MAX, max_val_cycles_rounded);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c b/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c<br/>index 752a72499b4f..be80da03a594 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c</a></div><div class='hunk'>@@ -290,9 +290,6 @@ static int mlx4_en_dcbnl_ieee_getets(struct net_device *dev,</div><div class='ctx'> 	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct ieee_ets *my_ets = &amp;priv-&gt;ets;</div><div class='ctx'> </div><div class='del'>-	if (!my_ets)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	ets-&gt;ets_cap = IEEE_8021QAZ_MAX_TCS;</div><div class='ctx'> 	ets-&gt;cbs = my_ets-&gt;cbs;</div><div class='ctx'> 	memcpy(ets-&gt;tc_tx_bw, my_ets-&gt;tc_tx_bw, sizeof(ets-&gt;tc_tx_bw));</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c<br/>index cd17a3f4faf8..ad6298456639 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/en_ethtool.c</a></div><div class='hunk'>@@ -1727,6 +1727,13 @@ static int mlx4_en_get_num_flows(struct mlx4_en_priv *priv)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 mlx4_en_get_rx_ring_count(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return priv-&gt;rx_ring_num;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 			     u32 *rule_locs)</div><div class='ctx'> {</div><div class='hunk'>@@ -1743,9 +1750,6 @@ static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		cmd-&gt;data = priv-&gt;rx_ring_num;</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		cmd-&gt;rule_cnt = mlx4_en_get_num_flows(priv);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1897,6 +1901,7 @@ static int mlx4_en_get_ts_info(struct net_device *dev,</div><div class='ctx'> 	if (mdev-&gt;dev-&gt;caps.flags2 &amp; MLX4_DEV_CAP_FLAG2_TS) {</div><div class='ctx'> 		info-&gt;so_timestamping |=</div><div class='ctx'> 			SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+			SOF_TIMESTAMPING_TX_SOFTWARE |</div><div class='ctx'> 			SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='ctx'> 			SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='ctx'> </div><div class='hunk'>@@ -2153,6 +2158,7 @@ const struct ethtool_ops mlx4_en_ethtool_ops = {</div><div class='ctx'> 	.set_ringparam = mlx4_en_set_ringparam,</div><div class='ctx'> 	.get_rxnfc = mlx4_en_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc = mlx4_en_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count = mlx4_en_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh_key_size = mlx4_en_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh = mlx4_en_get_rxfh,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c<br/>index 281b34af0bb4..81bf8908b897 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_netdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_netdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_netdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/en_netdev.c</a></div><div class='hunk'>@@ -1180,9 +1180,9 @@ static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,</div><div class='ctx'> 				mlx4_unregister_mac(mdev-&gt;dev, priv-&gt;port, mac);</div><div class='ctx'> </div><div class='ctx'> 				hlist_del_rcu(&amp;entry-&gt;hlist);</div><div class='del'>-				kfree_rcu(entry, rcu);</div><div class='ctx'> 				en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",</div><div class='ctx'> 				       entry-&gt;mac, priv-&gt;port);</div><div class='add'>+				kfree_rcu(entry, rcu);</div><div class='ctx'> 				++removed;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2420,21 +2420,22 @@ static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+static int mlx4_en_hwtstamp_set(struct net_device *dev,</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct mlx4_en_dev *mdev = priv-&gt;mdev;</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 	/* device doesn't support time stamping */</div><div class='del'>-	if (!(mdev-&gt;dev-&gt;caps.flags2 &amp; MLX4_DEV_CAP_FLAG2_TS))</div><div class='add'>+	if (!(mdev-&gt;dev-&gt;caps.flags2 &amp; MLX4_DEV_CAP_FLAG2_TS)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "device doesn't support time stamping");</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* TX HW timestamp */</div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2443,7 +2444,7 @@ static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* RX HW timestamp */</div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_ALL:</div><div class='hunk'>@@ -2461,39 +2462,27 @@ static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mlx4_en_reset_config(dev, config, dev-&gt;features)) {</div><div class='del'>-		config.tx_type = HWTSTAMP_TX_OFF;</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config,</div><div class='del'>-			    sizeof(config)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+static int mlx4_en_hwtstamp_get(struct net_device *dev,</div><div class='add'>+				struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;priv-&gt;hwtstamp_config,</div><div class='del'>-			    sizeof(priv-&gt;hwtstamp_config)) ? -EFAULT : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return mlx4_en_hwtstamp_set(dev, ifr);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return mlx4_en_hwtstamp_get(dev, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	*config = priv-&gt;hwtstamp_config;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,</div><div class='hunk'>@@ -2560,7 +2549,7 @@ static int mlx4_en_set_features(struct net_device *netdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (reset) {</div><div class='del'>-		ret = mlx4_en_reset_config(netdev, priv-&gt;hwtstamp_config,</div><div class='add'>+		ret = mlx4_en_reset_config(netdev, &amp;priv-&gt;hwtstamp_config,</div><div class='ctx'> 					   features);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -2670,8 +2659,7 @@ static int mlx4_udp_tunnel_sync(struct net_device *dev, unsigned int table)</div><div class='ctx'> </div><div class='ctx'> static const struct udp_tunnel_nic_info mlx4_udp_tunnels = {</div><div class='ctx'> 	.sync_table	= mlx4_udp_tunnel_sync,</div><div class='del'>-	.flags		= UDP_TUNNEL_NIC_INFO_MAY_SLEEP |</div><div class='del'>-			  UDP_TUNNEL_NIC_INFO_IPV4_ONLY,</div><div class='add'>+	.flags		= UDP_TUNNEL_NIC_INFO_IPV4_ONLY,</div><div class='ctx'> 	.tables		= {</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },</div><div class='ctx'> 	},</div><div class='hunk'>@@ -2845,7 +2833,6 @@ static const struct net_device_ops mlx4_netdev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address	= mlx4_en_set_mac,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_change_mtu		= mlx4_en_change_mtu,</div><div class='del'>-	.ndo_eth_ioctl		= mlx4_en_ioctl,</div><div class='ctx'> 	.ndo_tx_timeout		= mlx4_en_tx_timeout,</div><div class='ctx'> 	.ndo_vlan_rx_add_vid	= mlx4_en_vlan_rx_add_vid,</div><div class='ctx'> 	.ndo_vlan_rx_kill_vid	= mlx4_en_vlan_rx_kill_vid,</div><div class='hunk'>@@ -2859,6 +2846,8 @@ static const struct net_device_ops mlx4_netdev_ops = {</div><div class='ctx'> 	.ndo_features_check	= mlx4_en_features_check,</div><div class='ctx'> 	.ndo_set_tx_maxrate	= mlx4_en_set_tx_maxrate,</div><div class='ctx'> 	.ndo_bpf		= mlx4_xdp,</div><div class='add'>+	.ndo_hwtstamp_get	= mlx4_en_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= mlx4_en_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops mlx4_netdev_ops_master = {</div><div class='hunk'>@@ -3513,7 +3502,7 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx4_en_reset_config(struct net_device *dev,</div><div class='del'>-			 struct hwtstamp_config ts_config,</div><div class='add'>+			 struct kernel_hwtstamp_config *ts_config,</div><div class='ctx'> 			 netdev_features_t features)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_priv *priv = netdev_priv(dev);</div><div class='hunk'>@@ -3523,8 +3512,8 @@ int mlx4_en_reset_config(struct net_device *dev,</div><div class='ctx'> 	int port_up = 0;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;hwtstamp_config.tx_type == ts_config.tx_type &amp;&amp;</div><div class='del'>-	    priv-&gt;hwtstamp_config.rx_filter == ts_config.rx_filter &amp;&amp;</div><div class='add'>+	if (priv-&gt;hwtstamp_config.tx_type == ts_config-&gt;tx_type &amp;&amp;</div><div class='add'>+	    priv-&gt;hwtstamp_config.rx_filter == ts_config-&gt;rx_filter &amp;&amp;</div><div class='ctx'> 	    !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &amp;&amp;</div><div class='ctx'> 	    !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))</div><div class='ctx'> 		return 0; /* Nothing to change */</div><div class='hunk'>@@ -3543,7 +3532,7 @@ int mlx4_en_reset_config(struct net_device *dev,</div><div class='ctx'> 	mutex_lock(&amp;mdev-&gt;state_lock);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(&amp;new_prof, priv-&gt;prof, sizeof(struct mlx4_en_port_profile));</div><div class='del'>-	memcpy(&amp;new_prof.hwtstamp_config, &amp;ts_config, sizeof(ts_config));</div><div class='add'>+	memcpy(&amp;new_prof.hwtstamp_config, ts_config, sizeof(*ts_config));</div><div class='ctx'> </div><div class='ctx'> 	err = mlx4_en_try_alloc_resources(priv, tmp, &amp;new_prof, true);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -3561,7 +3550,7 @@ int mlx4_en_reset_config(struct net_device *dev,</div><div class='ctx'> 			dev-&gt;features |= NETIF_F_HW_VLAN_CTAG_RX;</div><div class='ctx'> 		else</div><div class='ctx'> 			dev-&gt;features &amp;= ~NETIF_F_HW_VLAN_CTAG_RX;</div><div class='del'>-	} else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {</div><div class='add'>+	} else if (ts_config-&gt;rx_filter == HWTSTAMP_FILTER_NONE) {</div><div class='ctx'> 		/* RX time-stamping is OFF, update the RX vlan offload</div><div class='ctx'> 		 * to the latest wanted state</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -3582,7 +3571,7 @@ int mlx4_en_reset_config(struct net_device *dev,</div><div class='ctx'> 	 * Regardless of the caller's choice,</div><div class='ctx'> 	 * Turn Off RX vlan offload in case of time-stamping is ON</div><div class='ctx'> 	 */</div><div class='del'>-	if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {</div><div class='add'>+	if (ts_config-&gt;rx_filter != HWTSTAMP_FILTER_NONE) {</div><div class='ctx'> 		if (dev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_RX)</div><div class='ctx'> 			en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");</div><div class='ctx'> 		dev-&gt;features &amp;= ~NETIF_F_HW_VLAN_CTAG_RX;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_rx.c b/drivers/net/ethernet/mellanox/mlx4/en_rx.c<br/>index 15c57e9517e9..13666d50b90f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/en_rx.c</a></div><div class='hunk'>@@ -48,60 +48,43 @@</div><div class='ctx'> #if IS_ENABLED(CONFIG_IPV6)</div><div class='ctx'> #include &lt;net/ip6_checksum.h&gt;</div><div class='ctx'> #endif</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mlx4_en.h"</div><div class='ctx'> </div><div class='del'>-static int mlx4_alloc_page(struct mlx4_en_priv *priv,</div><div class='del'>-			   struct mlx4_en_rx_alloc *frag,</div><div class='del'>-			   gfp_t gfp)</div><div class='del'>-{</div><div class='del'>-	struct page *page;</div><div class='del'>-	dma_addr_t dma;</div><div class='del'>-</div><div class='del'>-	page = alloc_page(gfp);</div><div class='del'>-	if (unlikely(!page))</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	dma = dma_map_page(priv-&gt;ddev, page, 0, PAGE_SIZE, priv-&gt;dma_dir);</div><div class='del'>-	if (unlikely(dma_mapping_error(priv-&gt;ddev, dma))) {</div><div class='del'>-		__free_page(page);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	frag-&gt;page = page;</div><div class='del'>-	frag-&gt;dma = dma;</div><div class='del'>-	frag-&gt;page_offset = priv-&gt;rx_headroom;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mlx4_en_alloc_frags(struct mlx4_en_priv *priv,</div><div class='ctx'> 			       struct mlx4_en_rx_ring *ring,</div><div class='ctx'> 			       struct mlx4_en_rx_desc *rx_desc,</div><div class='ctx'> 			       struct mlx4_en_rx_alloc *frags,</div><div class='ctx'> 			       gfp_t gfp)</div><div class='ctx'> {</div><div class='add'>+	dma_addr_t dma;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;num_frags; i++, frags++) {</div><div class='ctx'> 		if (!frags-&gt;page) {</div><div class='del'>-			if (mlx4_alloc_page(priv, frags, gfp)) {</div><div class='add'>+			frags-&gt;page = page_pool_alloc_pages(ring-&gt;pp, gfp);</div><div class='add'>+			if (!frags-&gt;page) {</div><div class='ctx'> 				ring-&gt;alloc_fail++;</div><div class='ctx'> 				return -ENOMEM;</div><div class='ctx'> 			}</div><div class='add'>+			page_pool_fragment_page(frags-&gt;page, 1);</div><div class='add'>+			frags-&gt;page_offset = priv-&gt;rx_headroom;</div><div class='add'>+</div><div class='ctx'> 			ring-&gt;rx_alloc_pages++;</div><div class='ctx'> 		}</div><div class='del'>-		rx_desc-&gt;data[i].addr = cpu_to_be64(frags-&gt;dma +</div><div class='del'>-						    frags-&gt;page_offset);</div><div class='add'>+		dma = page_pool_get_dma_addr(frags-&gt;page);</div><div class='add'>+		rx_desc-&gt;data[i].addr = cpu_to_be64(dma + frags-&gt;page_offset);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx4_en_free_frag(const struct mlx4_en_priv *priv,</div><div class='add'>+			      struct mlx4_en_rx_ring *ring,</div><div class='ctx'> 			      struct mlx4_en_rx_alloc *frag)</div><div class='ctx'> {</div><div class='del'>-	if (frag-&gt;page) {</div><div class='del'>-		dma_unmap_page(priv-&gt;ddev, frag-&gt;dma,</div><div class='del'>-			       PAGE_SIZE, priv-&gt;dma_dir);</div><div class='del'>-		__free_page(frag-&gt;page);</div><div class='del'>-	}</div><div class='add'>+	if (frag-&gt;page)</div><div class='add'>+		page_pool_put_full_page(ring-&gt;pp, frag-&gt;page, false);</div><div class='ctx'> 	/* We need to clear all fields, otherwise a change of priv-&gt;log_rx_info</div><div class='ctx'> 	 * could lead to see garbage later in frag-&gt;page.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -141,18 +124,6 @@ static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv,</div><div class='ctx'> 		(index &lt;&lt; ring-&gt;log_stride);</div><div class='ctx'> 	struct mlx4_en_rx_alloc *frags = ring-&gt;rx_info +</div><div class='ctx'> 					(index &lt;&lt; priv-&gt;log_rx_info);</div><div class='del'>-	if (likely(ring-&gt;page_cache.index &gt; 0)) {</div><div class='del'>-		/* XDP uses a single page per frame */</div><div class='del'>-		if (!frags-&gt;page) {</div><div class='del'>-			ring-&gt;page_cache.index--;</div><div class='del'>-			frags-&gt;page = ring-&gt;page_cache.buf[ring-&gt;page_cache.index].page;</div><div class='del'>-			frags-&gt;dma  = ring-&gt;page_cache.buf[ring-&gt;page_cache.index].dma;</div><div class='del'>-		}</div><div class='del'>-		frags-&gt;page_offset = XDP_PACKET_HEADROOM;</div><div class='del'>-		rx_desc-&gt;data[0].addr = cpu_to_be64(frags-&gt;dma +</div><div class='del'>-						    XDP_PACKET_HEADROOM);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return mlx4_en_alloc_frags(priv, ring, rx_desc, frags, gfp);</div><div class='ctx'> }</div><div class='hunk'>@@ -178,7 +149,7 @@ static void mlx4_en_free_rx_desc(const struct mlx4_en_priv *priv,</div><div class='ctx'> 	frags = ring-&gt;rx_info + (index &lt;&lt; priv-&gt;log_rx_info);</div><div class='ctx'> 	for (nr = 0; nr &lt; priv-&gt;num_frags; nr++) {</div><div class='ctx'> 		en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);</div><div class='del'>-		mlx4_en_free_frag(priv, frags + nr);</div><div class='add'>+		mlx4_en_free_frag(priv, ring, frags + nr);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -268,6 +239,7 @@ int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> 			   u32 size, u16 stride, int node, int queue_index)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	struct page_pool_params pp = {};</div><div class='ctx'> 	struct mlx4_en_rx_ring *ring;</div><div class='ctx'> 	int err = -ENOMEM;</div><div class='ctx'> 	int tmp;</div><div class='hunk'>@@ -286,8 +258,27 @@ int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> 	ring-&gt;log_stride = ffs(ring-&gt;stride) - 1;</div><div class='ctx'> 	ring-&gt;buf_size = ring-&gt;size * ring-&gt;stride + TXBB_SIZE;</div><div class='ctx'> </div><div class='del'>-	if (xdp_rxq_info_reg(&amp;ring-&gt;xdp_rxq, priv-&gt;dev, queue_index, 0) &lt; 0)</div><div class='add'>+	pp.flags = PP_FLAG_DMA_MAP;</div><div class='add'>+	pp.pool_size = size * DIV_ROUND_UP(priv-&gt;rx_skb_size, PAGE_SIZE);</div><div class='add'>+	pp.nid = node;</div><div class='add'>+	pp.napi = &amp;priv-&gt;rx_cq[queue_index]-&gt;napi;</div><div class='add'>+	pp.netdev = priv-&gt;dev;</div><div class='add'>+	pp.dev = &amp;mdev-&gt;dev-&gt;persist-&gt;pdev-&gt;dev;</div><div class='add'>+	pp.dma_dir = priv-&gt;dma_dir;</div><div class='add'>+</div><div class='add'>+	ring-&gt;pp = page_pool_create(&amp;pp);</div><div class='add'>+	if (IS_ERR(ring-&gt;pp)) {</div><div class='add'>+		err = PTR_ERR(ring-&gt;pp);</div><div class='ctx'> 		goto err_ring;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (xdp_rxq_info_reg(&amp;ring-&gt;xdp_rxq, priv-&gt;dev, queue_index, 0) &lt; 0)</div><div class='add'>+		goto err_pp;</div><div class='add'>+</div><div class='add'>+	err = xdp_rxq_info_reg_mem_model(&amp;ring-&gt;xdp_rxq, MEM_TYPE_PAGE_POOL,</div><div class='add'>+					 ring-&gt;pp);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_xdp_info;</div><div class='ctx'> </div><div class='ctx'> 	tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS *</div><div class='ctx'> 					sizeof(struct mlx4_en_rx_alloc));</div><div class='hunk'>@@ -319,6 +310,8 @@ err_info:</div><div class='ctx'> 	ring-&gt;rx_info = NULL;</div><div class='ctx'> err_xdp_info:</div><div class='ctx'> 	xdp_rxq_info_unreg(&amp;ring-&gt;xdp_rxq);</div><div class='add'>+err_pp:</div><div class='add'>+	page_pool_destroy(ring-&gt;pp);</div><div class='ctx'> err_ring:</div><div class='ctx'> 	kfree(ring);</div><div class='ctx'> 	*pring = NULL;</div><div class='hunk'>@@ -409,26 +402,6 @@ void mlx4_en_recover_from_oom(struct mlx4_en_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* When the rx ring is running in page-per-packet mode, a released frame can go</div><div class='del'>- * directly into a small cache, to avoid unmapping or touching the page</div><div class='del'>- * allocator. In bpf prog performance scenarios, buffers are either forwarded</div><div class='del'>- * or dropped, never converted to skbs, so every page can come directly from</div><div class='del'>- * this cache when it is sized to be a multiple of the napi budget.</div><div class='del'>- */</div><div class='del'>-bool mlx4_en_rx_recycle(struct mlx4_en_rx_ring *ring,</div><div class='del'>-			struct mlx4_en_rx_alloc *frame)</div><div class='del'>-{</div><div class='del'>-	struct mlx4_en_page_cache *cache = &amp;ring-&gt;page_cache;</div><div class='del'>-</div><div class='del'>-	if (cache-&gt;index &gt;= MLX4_EN_CACHE_SIZE)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	cache-&gt;buf[cache-&gt;index].page = frame-&gt;page;</div><div class='del'>-	cache-&gt;buf[cache-&gt;index].dma = frame-&gt;dma;</div><div class='del'>-	cache-&gt;index++;</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> 			     struct mlx4_en_rx_ring **pring,</div><div class='ctx'> 			     u32 size, u16 stride)</div><div class='hunk'>@@ -445,6 +418,7 @@ void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> 	xdp_rxq_info_unreg(&amp;ring-&gt;xdp_rxq);</div><div class='ctx'> 	mlx4_free_hwq_res(mdev-&gt;dev, &amp;ring-&gt;wqres, size * stride + TXBB_SIZE);</div><div class='ctx'> 	kvfree(ring-&gt;rx_info);</div><div class='add'>+	page_pool_destroy(ring-&gt;pp);</div><div class='ctx'> 	ring-&gt;rx_info = NULL;</div><div class='ctx'> 	kfree(ring);</div><div class='ctx'> 	*pring = NULL;</div><div class='hunk'>@@ -453,14 +427,6 @@ void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> 				struct mlx4_en_rx_ring *ring)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ring-&gt;page_cache.index; i++) {</div><div class='del'>-		dma_unmap_page(priv-&gt;ddev, ring-&gt;page_cache.buf[i].dma,</div><div class='del'>-			       PAGE_SIZE, priv-&gt;dma_dir);</div><div class='del'>-		put_page(ring-&gt;page_cache.buf[i].page);</div><div class='del'>-	}</div><div class='del'>-	ring-&gt;page_cache.index = 0;</div><div class='ctx'> 	mlx4_en_free_rx_buf(priv, ring);</div><div class='ctx'> 	if (ring-&gt;stride &lt;= TXBB_SIZE)</div><div class='ctx'> 		ring-&gt;buf -= TXBB_SIZE;</div><div class='hunk'>@@ -487,7 +453,7 @@ static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,</div><div class='ctx'> 		if (unlikely(!page))</div><div class='ctx'> 			goto fail;</div><div class='ctx'> </div><div class='del'>-		dma = frags-&gt;dma;</div><div class='add'>+		dma = page_pool_get_dma_addr(page);</div><div class='ctx'> 		dma_sync_single_range_for_cpu(priv-&gt;ddev, dma, frags-&gt;page_offset,</div><div class='ctx'> 					      frag_size, priv-&gt;dma_dir);</div><div class='ctx'> </div><div class='hunk'>@@ -496,8 +462,11 @@ static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 		truesize += frag_info-&gt;frag_stride;</div><div class='ctx'> 		if (frag_info-&gt;frag_stride == PAGE_SIZE / 2) {</div><div class='add'>+			struct netmem_desc *desc = pp_page_to_nmdesc(page);</div><div class='add'>+</div><div class='ctx'> 			frags-&gt;page_offset ^= PAGE_SIZE / 2;</div><div class='ctx'> 			release = page_count(page) != 1 ||</div><div class='add'>+				  atomic_long_read(&amp;desc-&gt;pp_ref_count) != 1 ||</div><div class='ctx'> 				  page_is_pfmemalloc(page) ||</div><div class='ctx'> 				  page_to_nid(page) != numa_mem_id();</div><div class='ctx'> 		} else if (!priv-&gt;rx_headroom) {</div><div class='hunk'>@@ -511,10 +480,9 @@ static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,</div><div class='ctx'> 			release = frags-&gt;page_offset + frag_info-&gt;frag_size &gt; PAGE_SIZE;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (release) {</div><div class='del'>-			dma_unmap_page(priv-&gt;ddev, dma, PAGE_SIZE, priv-&gt;dma_dir);</div><div class='ctx'> 			frags-&gt;page = NULL;</div><div class='ctx'> 		} else {</div><div class='del'>-			page_ref_inc(page);</div><div class='add'>+			page_pool_ref_page(page);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		nr++;</div><div class='hunk'>@@ -784,7 +752,8 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud</div><div class='ctx'> 			/* Get pointer to first fragment since we haven't</div><div class='ctx'> 			 * skb yet and cast it to ethhdr struct</div><div class='ctx'> 			 */</div><div class='del'>-			dma = frags[0].dma + frags[0].page_offset;</div><div class='add'>+			dma = page_pool_get_dma_addr(frags[0].page);</div><div class='add'>+			dma += frags[0].page_offset;</div><div class='ctx'> 			dma_sync_single_for_cpu(priv-&gt;ddev, dma, sizeof(*ethh),</div><div class='ctx'> 						DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='hunk'>@@ -823,7 +792,8 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud</div><div class='ctx'> 			void *orig_data;</div><div class='ctx'> 			u32 act;</div><div class='ctx'> </div><div class='del'>-			dma = frags[0].dma + frags[0].page_offset;</div><div class='add'>+			dma = page_pool_get_dma_addr(frags[0].page);</div><div class='add'>+			dma += frags[0].page_offset;</div><div class='ctx'> 			dma_sync_single_for_cpu(priv-&gt;ddev, dma,</div><div class='ctx'> 						priv-&gt;frag_info[0].frag_size,</div><div class='ctx'> 						DMA_FROM_DEVICE);</div><div class='hunk'>@@ -886,6 +856,7 @@ xdp_drop_no_cnt:</div><div class='ctx'> 		skb = napi_get_frags(&amp;cq-&gt;napi);</div><div class='ctx'> 		if (unlikely(!skb))</div><div class='ctx'> 			goto next;</div><div class='add'>+		skb_mark_for_recycle(skb);</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(ring-&gt;hwtstamp_rx_filter == HWTSTAMP_FILTER_ALL)) {</div><div class='ctx'> 			u64 timestamp = mlx4_en_get_cqe_ts(cqe);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/en_tx.c b/drivers/net/ethernet/mellanox/mlx4/en_tx.c<br/>index 1ddb11cb25f9..87f35bcbeff8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/en_tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/en_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/en_tx.c</a></div><div class='hunk'>@@ -44,6 +44,7 @@</div><div class='ctx'> #include &lt;linux/ipv6.h&gt;</div><div class='ctx'> #include &lt;linux/indirect_call_wrapper.h&gt;</div><div class='ctx'> #include &lt;net/ipv6.h&gt;</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mlx4_en.h"</div><div class='ctx'> </div><div class='hunk'>@@ -350,16 +351,10 @@ u32 mlx4_en_recycle_tx_desc(struct mlx4_en_priv *priv,</div><div class='ctx'> 			    int napi_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_en_tx_info *tx_info = &amp;ring-&gt;tx_info[index];</div><div class='del'>-	struct mlx4_en_rx_alloc frame = {</div><div class='del'>-		.page = tx_info-&gt;page,</div><div class='del'>-		.dma = tx_info-&gt;map0_dma,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	if (!napi_mode || !mlx4_en_rx_recycle(ring-&gt;recycle_ring, &amp;frame)) {</div><div class='del'>-		dma_unmap_page(priv-&gt;ddev, tx_info-&gt;map0_dma,</div><div class='del'>-			       PAGE_SIZE, priv-&gt;dma_dir);</div><div class='del'>-		put_page(tx_info-&gt;page);</div><div class='del'>-	}</div><div class='add'>+	struct page_pool *pool = ring-&gt;recycle_ring-&gt;pp;</div><div class='add'>+</div><div class='add'>+	/* Note that napi_mode = 0 means ndo_close() path, not budget = 0 */</div><div class='add'>+	page_pool_put_full_page(pool, tx_info-&gt;page, !!napi_mode);</div><div class='ctx'> </div><div class='ctx'> 	return tx_info-&gt;nr_txbb;</div><div class='ctx'> }</div><div class='hunk'>@@ -450,6 +445,8 @@ int mlx4_en_process_tx_cq(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!priv-&gt;port_up))</div><div class='ctx'> 		return 0;</div><div class='add'>+	if (unlikely(!napi_budget) &amp;&amp; cq-&gt;type == TX_XDP)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	netdev_txq_bql_complete_prefetchw(ring-&gt;tx_queue);</div><div class='ctx'> </div><div class='hunk'>@@ -1194,7 +1191,7 @@ netdev_tx_t mlx4_en_xmit_frame(struct mlx4_en_rx_ring *rx_ring,</div><div class='ctx'> 	tx_desc = ring-&gt;buf + (index &lt;&lt; LOG_TXBB_SIZE);</div><div class='ctx'> 	data = &amp;tx_desc-&gt;data;</div><div class='ctx'> </div><div class='del'>-	dma = frame-&gt;dma;</div><div class='add'>+	dma = page_pool_get_dma_addr(frame-&gt;page);</div><div class='ctx'> </div><div class='ctx'> 	tx_info-&gt;page = frame-&gt;page;</div><div class='ctx'> 	frame-&gt;page = NULL;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c<br/>index febeadfdd5a5..4293f8e33f44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/main.c</a></div><div class='hunk'>@@ -49,6 +49,8 @@</div><div class='ctx'> #include &lt;linux/mlx4/device.h&gt;</div><div class='ctx'> #include &lt;linux/mlx4/doorbell.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;rdma/ib_verbs.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "mlx4.h"</div><div class='ctx'> #include "fw.h"</div><div class='ctx'> #include "icm.h"</div><div class='hunk'>@@ -172,7 +174,8 @@ MODULE_PARM_DESC(port_type_array, "Array of port types: HW_DEFAULT (0) is defaul</div><div class='ctx'> static atomic_t pf_loading = ATOMIC_INIT(0);</div><div class='ctx'> </div><div class='ctx'> static int mlx4_devlink_ierr_reset_get(struct devlink *devlink, u32 id,</div><div class='del'>-				       struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				       struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	ctx-&gt;val.vbool = !!mlx4_internal_err_reset;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -187,7 +190,8 @@ static int mlx4_devlink_ierr_reset_set(struct devlink *devlink, u32 id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx4_devlink_crdump_snapshot_get(struct devlink *devlink, u32 id,</div><div class='del'>-					    struct devlink_param_gset_ctx *ctx)</div><div class='add'>+					    struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx4_priv *priv = devlink_priv(devlink);</div><div class='ctx'> 	struct mlx4_dev *dev = &amp;priv-&gt;dev;</div><div class='hunk'>@@ -1246,14 +1250,6 @@ err_out:</div><div class='ctx'> 	return err ? err : count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum ibta_mtu {</div><div class='del'>-	IB_MTU_256  = 1,</div><div class='del'>-	IB_MTU_512  = 2,</div><div class='del'>-	IB_MTU_1024 = 3,</div><div class='del'>-	IB_MTU_2048 = 4,</div><div class='del'>-	IB_MTU_4096 = 5</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static inline int int_to_ibta_mtu(int mtu)</div><div class='ctx'> {</div><div class='ctx'> 	switch (mtu) {</div><div class='hunk'>@@ -1266,7 +1262,7 @@ static inline int int_to_ibta_mtu(int mtu)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int ibta_mtu_to_int(enum ibta_mtu mtu)</div><div class='add'>+static inline int ibta_mtu_to_int(enum ib_mtu mtu)</div><div class='ctx'> {</div><div class='ctx'> 	switch (mtu) {</div><div class='ctx'> 	case IB_MTU_256:  return  256;</div><div class='hunk'>@@ -4372,7 +4368,6 @@ static pci_ers_result_t mlx4_pci_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='ctx'> 	return PCI_ERS_RESULT_RECOVERED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h<br/>index d7d856d1758a..b213094ea30f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/mlx4.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/mlx4.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/mlx4.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/mlx4.h</a></div><div class='hunk'>@@ -1478,12 +1478,6 @@ void mlx4_zone_allocator_destroy(struct mlx4_zone_allocator *zone_alloc);</div><div class='ctx'> u32 mlx4_zone_alloc_entries(struct mlx4_zone_allocator *zones, u32 uid, int count,</div><div class='ctx'> 			    int align, u32 skip_mask, u32 *puid);</div><div class='ctx'> </div><div class='del'>-/* Free &lt;count&gt; objects, start from &lt;obj&gt; of the uid &lt;uid&gt; from zone_allocator</div><div class='del'>- * &lt;zones&gt;.</div><div class='del'>- */</div><div class='del'>-u32 mlx4_zone_free_entries(struct mlx4_zone_allocator *zones,</div><div class='del'>-			   u32 uid, u32 obj, u32 count);</div><div class='del'>-</div><div class='ctx'> /* If &lt;zones&gt; was allocated with MLX4_ZONE_ALLOC_FLAGS_NO_OVERLAP, instead of</div><div class='ctx'>  * specifying the uid when freeing an object, zone allocator could figure it by</div><div class='ctx'>  * itself. Other parameters are similar to mlx4_zone_free.</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h<br/>index 28b70dcc652e..aab97694f86b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/mlx4_en.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/mlx4_en.h</a></div><div class='hunk'>@@ -247,20 +247,11 @@ struct mlx4_en_tx_desc {</div><div class='ctx'> </div><div class='ctx'> struct mlx4_en_rx_alloc {</div><div class='ctx'> 	struct page	*page;</div><div class='del'>-	dma_addr_t	dma;</div><div class='ctx'> 	u32		page_offset;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define MLX4_EN_CACHE_SIZE (2 * NAPI_POLL_WEIGHT)</div><div class='ctx'> </div><div class='del'>-struct mlx4_en_page_cache {</div><div class='del'>-	u32 index;</div><div class='del'>-	struct {</div><div class='del'>-		struct page	*page;</div><div class='del'>-		dma_addr_t	dma;</div><div class='del'>-	} buf[MLX4_EN_CACHE_SIZE];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum {</div><div class='ctx'> 	MLX4_EN_TX_RING_STATE_RECOVERING,</div><div class='ctx'> };</div><div class='hunk'>@@ -335,14 +326,14 @@ struct mlx4_en_rx_ring {</div><div class='ctx'> 	u16 stride;</div><div class='ctx'> 	u16 log_stride;</div><div class='ctx'> 	u16 cqn;	/* index of port CQ associated with this ring */</div><div class='add'>+	u8  fcs_del;</div><div class='ctx'> 	u32 prod;</div><div class='ctx'> 	u32 cons;</div><div class='ctx'> 	u32 buf_size;</div><div class='del'>-	u8  fcs_del;</div><div class='add'>+	struct page_pool *pp;</div><div class='ctx'> 	void *buf;</div><div class='ctx'> 	void *rx_info;</div><div class='ctx'> 	struct bpf_prog __rcu *xdp_prog;</div><div class='del'>-	struct mlx4_en_page_cache page_cache;</div><div class='ctx'> 	unsigned long bytes;</div><div class='ctx'> 	unsigned long packets;</div><div class='ctx'> 	unsigned long csum_ok;</div><div class='hunk'>@@ -397,7 +388,7 @@ struct mlx4_en_port_profile {</div><div class='ctx'> 	u8 num_up;</div><div class='ctx'> 	int rss_rings;</div><div class='ctx'> 	int inline_thold;</div><div class='del'>-	struct hwtstamp_config hwtstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config hwtstamp_config;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx4_en_profile {</div><div class='hunk'>@@ -621,7 +612,7 @@ struct mlx4_en_priv {</div><div class='ctx'> 	bool wol;</div><div class='ctx'> 	struct device *ddev;</div><div class='ctx'> 	struct hlist_head mac_hash[MLX4_EN_MAC_HASH_SIZE];</div><div class='del'>-	struct hwtstamp_config hwtstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config hwtstamp_config;</div><div class='ctx'> 	u32 counter_index;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MLX4_EN_DCB</div><div class='hunk'>@@ -707,8 +698,6 @@ netdev_tx_t mlx4_en_xmit_frame(struct mlx4_en_rx_ring *rx_ring,</div><div class='ctx'> 			       struct mlx4_en_priv *priv, unsigned int length,</div><div class='ctx'> 			       int tx_ind, bool *doorbell_pending);</div><div class='ctx'> void mlx4_en_xmit_doorbell(struct mlx4_en_tx_ring *ring);</div><div class='del'>-bool mlx4_en_rx_recycle(struct mlx4_en_rx_ring *ring,</div><div class='del'>-			struct mlx4_en_rx_alloc *frame);</div><div class='ctx'> </div><div class='ctx'> int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,</div><div class='ctx'> 			   struct mlx4_en_tx_ring **pring,</div><div class='hunk'>@@ -791,7 +780,7 @@ void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev);</div><div class='ctx'> </div><div class='ctx'> int mlx4_en_moderation_update(struct mlx4_en_priv *priv);</div><div class='ctx'> int mlx4_en_reset_config(struct net_device *dev,</div><div class='del'>-			 struct hwtstamp_config ts_config,</div><div class='add'>+			 struct kernel_hwtstamp_config *ts_config,</div><div class='ctx'> 			 netdev_features_t new_features);</div><div class='ctx'> void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,</div><div class='ctx'> 				     struct mlx4_en_stats_bitmap *stats_bitmap,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/mr.c b/drivers/net/ethernet/mellanox/mlx4/mr.c<br/>index d7444782bfdd..698a5d1f0d7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/mr.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/mr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/mr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/mr.c</a></div><div class='hunk'>@@ -106,7 +106,7 @@ static int mlx4_buddy_init(struct mlx4_buddy *buddy, int max_order)</div><div class='ctx'> 	buddy-&gt;max_order = max_order;</div><div class='ctx'> 	spin_lock_init(&amp;buddy-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	buddy-&gt;bits = kcalloc(buddy-&gt;max_order + 1, sizeof(long *),</div><div class='add'>+	buddy-&gt;bits = kcalloc(buddy-&gt;max_order + 1, sizeof(*buddy-&gt;bits),</div><div class='ctx'> 			      GFP_KERNEL);</div><div class='ctx'> 	buddy-&gt;num_free = kcalloc(buddy-&gt;max_order + 1, sizeof(*buddy-&gt;num_free),</div><div class='ctx'> 				  GFP_KERNEL);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx4/port.c b/drivers/net/ethernet/mellanox/mlx4/port.c<br/>index 4e43f4a7d246..e3d0b13c1610 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx4/port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx4/port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx4/port.c</a></div><div class='hunk'>@@ -147,26 +147,6 @@ static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx)</div><div class='del'>-{</div><div class='del'>-	struct mlx4_port_info *info = &amp;mlx4_priv(dev)-&gt;port[port];</div><div class='del'>-	struct mlx4_mac_table *table = &amp;info-&gt;mac_table;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MLX4_MAX_MAC_NUM; i++) {</div><div class='del'>-		if (!table-&gt;refs[i])</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (mac == (MLX4_MAC_MASK &amp; be64_to_cpu(table-&gt;entries[i]))) {</div><div class='del'>-			*idx = i;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ENOENT;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx4_find_cached_mac);</div><div class='del'>-</div><div class='ctx'> static bool mlx4_need_mf_bond(struct mlx4_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int i, num_eth_ports = 0;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Kconfig b/drivers/net/ethernet/mellanox/mlx5/core/Kconfig<br/>index ea6070180c96..3c3e84100d5a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/Kconfig</a></div><div class='hunk'>@@ -8,7 +8,6 @@ config MLX5_CORE</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	select AUXILIARY_BUS</div><div class='ctx'> 	select NET_DEVLINK</div><div class='del'>-	depends on VXLAN || !VXLAN</div><div class='ctx'> 	depends on MLXFW || !MLXFW</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	depends on PCI_HYPERV_INTERFACE || !PCI_HYPERV_INTERFACE</div><div class='hunk'>@@ -31,6 +30,7 @@ config MLX5_CORE_EN</div><div class='ctx'> 	bool "Mellanox 5th generation network adapters (ConnectX series) Ethernet support"</div><div class='ctx'> 	depends on NETDEVICES &amp;&amp; ETHERNET &amp;&amp; INET &amp;&amp; PCI &amp;&amp; MLX5_CORE</div><div class='ctx'> 	select PAGE_POOL</div><div class='add'>+	select PAGE_POOL_STATS</div><div class='ctx'> 	select DIMLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	  Ethernet support in Mellanox Technologies ConnectX-4 NIC.</div><div class='hunk'>@@ -80,8 +80,8 @@ config MLX5_BRIDGE</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  mlx5 ConnectX offloads support for Ethernet Bridging (BRIDGE).</div><div class='del'>-	  Enable adding representors of mlx5 uplink and VF ports to Bridge and</div><div class='del'>-	  offloading rules for traffic between such ports. Supports VLANs (trunk and</div><div class='add'>+	  Enable offloading FDB rules from a bridge device containing</div><div class='add'>+	  representors of mlx5 uplink and VF ports. Supports VLANs (trunk and</div><div class='ctx'> 	  access modes).</div><div class='ctx'> </div><div class='ctx'> config MLX5_CLS_ACT</div><div class='hunk'>@@ -207,3 +207,14 @@ config MLX5_DPLL</div><div class='ctx'> 	help</div><div class='ctx'> 	  DPLL support in Mellanox Technologies ConnectX NICs.</div><div class='ctx'> </div><div class='add'>+config MLX5_EN_PSP</div><div class='add'>+	bool "Mellanox Technologies support for PSP cryptography-offload acceleration"</div><div class='add'>+	depends on INET_PSP</div><div class='add'>+	depends on MLX5_CORE_EN</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  mlx5 device offload support for Google PSP Security Protocol offload.</div><div class='add'>+	  Adds support for PSP encryption offload and for SPI and key generation</div><div class='add'>+	  interfaces to PSP Stack which supports PSP crypto offload.</div><div class='add'>+</div><div class='add'>+	  If unsure, say Y.</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/Makefile b/drivers/net/ethernet/mellanox/mlx5/core/Makefile<br/>index 5912f7e614f9..8ffa286a18f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/Makefile</a></div><div class='hunk'>@@ -17,7 +17,7 @@ mlx5_core-y :=	main.o cmd.o debugfs.o fw.o eq.o uar.o pagealloc.o \</div><div class='ctx'> 		fs_counters.o fs_ft_pool.o rl.o lag/debugfs.o lag/lag.o dev.o events.o wq.o lib/gid.o \</div><div class='ctx'> 		lib/devcom.o lib/pci_vsc.o lib/dm.o lib/fs_ttc.o diag/fs_tracepoint.o \</div><div class='ctx'> 		diag/fw_tracer.o diag/crdump.o devlink.o diag/rsc_dump.o diag/reporter_vnic.o \</div><div class='del'>-		fw_reset.o qos.o lib/tout.o lib/aso.o wc.o</div><div class='add'>+		fw_reset.o qos.o lib/tout.o lib/aso.o wc.o fs_pool.o lib/nv_param.o</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Netdev basic</div><div class='hunk'>@@ -29,7 +29,7 @@ mlx5_core-$(CONFIG_MLX5_CORE_EN) += en/rqt.o en/tir.o en/rss.o en/rx_res.o \</div><div class='ctx'> 		en/reporter_tx.o en/reporter_rx.o en/params.o en/xsk/pool.o \</div><div class='ctx'> 		en/xsk/setup.o en/xsk/rx.o en/xsk/tx.o en/devlink.o en/ptp.o \</div><div class='ctx'> 		en/qos.o en/htb.o en/trap.o en/fs_tt_redirect.o en/selq.o \</div><div class='del'>-		lib/crypto.o lib/sd.o</div><div class='add'>+		lib/crypto.o lib/sd.o en/pcie_cong_event.o</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Netdev extra</div><div class='hunk'>@@ -60,6 +60,7 @@ mlx5_core-$(CONFIG_MLX5_CLS_ACT)     += en/tc/act/act.o en/tc/act/drop.o en/tc/a</div><div class='ctx'> ifneq ($(CONFIG_MLX5_TC_CT),)</div><div class='ctx'> 	mlx5_core-y			     += en/tc_ct.o en/tc/ct_fs_dmfs.o</div><div class='ctx'> 	mlx5_core-$(CONFIG_MLX5_SW_STEERING) += en/tc/ct_fs_smfs.o</div><div class='add'>+	mlx5_core-$(CONFIG_MLX5_HW_STEERING) += en/tc/ct_fs_hmfs.o</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='ctx'> mlx5_core-$(CONFIG_MLX5_TC_SAMPLE)   += en/tc/sample.o</div><div class='hunk'>@@ -68,7 +69,7 @@ mlx5_core-$(CONFIG_MLX5_TC_SAMPLE)   += en/tc/sample.o</div><div class='ctx'> # Core extra</div><div class='ctx'> #</div><div class='ctx'> mlx5_core-$(CONFIG_MLX5_ESWITCH)   += eswitch.o eswitch_offloads.o eswitch_offloads_termtbl.o \</div><div class='del'>-				      ecpf.o rdma.o esw/legacy.o \</div><div class='add'>+				      ecpf.o rdma.o esw/legacy.o esw/adj_vport.o \</div><div class='ctx'> 				      esw/devlink_port.o esw/vporttbl.o esw/qos.o esw/ipsec.o</div><div class='ctx'> </div><div class='ctx'> mlx5_core-$(CONFIG_MLX5_ESWITCH)   += esw/acl/helper.o \</div><div class='hunk'>@@ -84,7 +85,9 @@ mlx5_core-$(CONFIG_MLX5_BRIDGE)    += esw/bridge.o esw/bridge_mcast.o esw/bridge</div><div class='ctx'> </div><div class='ctx'> mlx5_core-$(CONFIG_HWMON)          += hwmon.o</div><div class='ctx'> mlx5_core-$(CONFIG_MLX5_MPFS)      += lib/mpfs.o</div><div class='del'>-mlx5_core-$(CONFIG_VXLAN)          += lib/vxlan.o</div><div class='add'>+ifneq ($(CONFIG_VXLAN),)</div><div class='add'>+	mlx5_core-y		   += lib/vxlan.o</div><div class='add'>+endif</div><div class='ctx'> mlx5_core-$(CONFIG_PTP_1588_CLOCK) += lib/clock.o</div><div class='ctx'> mlx5_core-$(CONFIG_PCI_HYPERV_INTERFACE) += lib/hv.o lib/hv_vhca.o</div><div class='ctx'> </div><div class='hunk'>@@ -109,36 +112,54 @@ mlx5_core-$(CONFIG_MLX5_EN_TLS) += en_accel/ktls_stats.o \</div><div class='ctx'> 				   en_accel/fs_tcp.o en_accel/ktls.o en_accel/ktls_txrx.o \</div><div class='ctx'> 				   en_accel/ktls_tx.o en_accel/ktls_rx.o</div><div class='ctx'> </div><div class='del'>-mlx5_core-$(CONFIG_MLX5_SW_STEERING) += steering/dr_domain.o steering/dr_table.o \</div><div class='del'>-					steering/dr_matcher.o steering/dr_rule.o \</div><div class='del'>-					steering/dr_icm_pool.o steering/dr_buddy.o \</div><div class='del'>-					steering/dr_ste.o steering/dr_send.o \</div><div class='del'>-					steering/dr_ste_v0.o steering/dr_ste_v1.o \</div><div class='del'>-					steering/dr_ste_v2.o \</div><div class='del'>-					steering/dr_cmd.o steering/dr_fw.o \</div><div class='del'>-					steering/dr_action.o steering/fs_dr.o \</div><div class='del'>-					steering/dr_definer.o steering/dr_ptrn.o \</div><div class='del'>-					steering/dr_arg.o steering/dr_dbg.o lib/smfs.o</div><div class='add'>+mlx5_core-$(CONFIG_MLX5_EN_PSP) += en_accel/psp.o en_accel/psp_rxtx.o</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# SW Steering</div><div class='add'>+#</div><div class='add'>+mlx5_core-$(CONFIG_MLX5_SW_STEERING) += steering/sws/dr_domain.o \</div><div class='add'>+					steering/sws/dr_table.o \</div><div class='add'>+					steering/sws/dr_matcher.o \</div><div class='add'>+					steering/sws/dr_rule.o \</div><div class='add'>+					steering/sws/dr_icm_pool.o \</div><div class='add'>+					steering/sws/dr_buddy.o \</div><div class='add'>+					steering/sws/dr_ste.o \</div><div class='add'>+					steering/sws/dr_send.o \</div><div class='add'>+					steering/sws/dr_ste_v0.o \</div><div class='add'>+					steering/sws/dr_ste_v1.o \</div><div class='add'>+					steering/sws/dr_ste_v2.o \</div><div class='add'>+					steering/sws/dr_ste_v3.o \</div><div class='add'>+					steering/sws/dr_cmd.o \</div><div class='add'>+					steering/sws/dr_fw.o \</div><div class='add'>+					steering/sws/dr_action.o \</div><div class='add'>+					steering/sws/dr_definer.o \</div><div class='add'>+					steering/sws/dr_ptrn.o \</div><div class='add'>+					steering/sws/dr_arg.o \</div><div class='add'>+					steering/sws/dr_dbg.o \</div><div class='add'>+					steering/sws/fs_dr.o \</div><div class='add'>+					lib/smfs.o</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # HW Steering</div><div class='ctx'> #</div><div class='del'>-mlx5_core-$(CONFIG_MLX5_HW_STEERING) += steering/hws/mlx5hws_cmd.o \</div><div class='del'>-					steering/hws/mlx5hws_context.o \</div><div class='del'>-					steering/hws/mlx5hws_pat_arg.o \</div><div class='del'>-					steering/hws/mlx5hws_buddy.o \</div><div class='del'>-					steering/hws/mlx5hws_pool.o \</div><div class='del'>-					steering/hws/mlx5hws_table.o \</div><div class='del'>-					steering/hws/mlx5hws_action.o \</div><div class='del'>-					steering/hws/mlx5hws_rule.o \</div><div class='del'>-					steering/hws/mlx5hws_matcher.o \</div><div class='del'>-					steering/hws/mlx5hws_send.o \</div><div class='del'>-					steering/hws/mlx5hws_definer.o \</div><div class='del'>-					steering/hws/mlx5hws_bwc.o \</div><div class='del'>-					steering/hws/mlx5hws_debug.o \</div><div class='del'>-					steering/hws/mlx5hws_vport.o \</div><div class='del'>-					steering/hws/mlx5hws_bwc_complex.o</div><div class='del'>-</div><div class='add'>+mlx5_core-$(CONFIG_MLX5_HW_STEERING) += steering/hws/cmd.o \</div><div class='add'>+					steering/hws/context.o \</div><div class='add'>+					steering/hws/pat_arg.o \</div><div class='add'>+					steering/hws/buddy.o \</div><div class='add'>+					steering/hws/pool.o \</div><div class='add'>+					steering/hws/table.o \</div><div class='add'>+					steering/hws/action.o \</div><div class='add'>+					steering/hws/rule.o \</div><div class='add'>+					steering/hws/matcher.o \</div><div class='add'>+					steering/hws/send.o \</div><div class='add'>+					steering/hws/definer.o \</div><div class='add'>+					steering/hws/bwc.o \</div><div class='add'>+					steering/hws/debug.o \</div><div class='add'>+					steering/hws/vport.o \</div><div class='add'>+					steering/hws/bwc_complex.o \</div><div class='add'>+					steering/hws/fs_hws_pools.o \</div><div class='add'>+					steering/hws/fs_hws.o \</div><div class='add'>+					steering/hws/action_ste_pool.o</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # SF device</div><div class='hunk'>@@ -150,5 +171,10 @@ mlx5_core-$(CONFIG_MLX5_SF) += sf/vhca_event.o sf/dev/dev.o sf/dev/driver.o irq_</div><div class='ctx'> #</div><div class='ctx'> mlx5_core-$(CONFIG_MLX5_SF_MANAGER) += sf/cmd.o sf/hw_table.o sf/devlink.o</div><div class='ctx'> </div><div class='add'>+#</div><div class='add'>+# TPH support</div><div class='add'>+#</div><div class='add'>+mlx5_core-$(CONFIG_PCIE_TPH) += lib/st.o</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_MLX5_DPLL) += mlx5_dpll.o</div><div class='ctx'> mlx5_dpll-y :=	dpll.o</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c<br/>index 6bd8a18e3af3..5b08e5ffe0e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/cmd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/cmd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/cmd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/cmd.c</a></div><div class='hunk'>@@ -94,6 +94,11 @@ static u16 in_to_opcode(void *in)</div><div class='ctx'> 	return MLX5_GET(mbox_in, in, opcode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u16 in_to_uid(void *in)</div><div class='add'>+{</div><div class='add'>+	return MLX5_GET(mbox_in, in, uid);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Returns true for opcodes that might be triggered very frequently and throttle</div><div class='ctx'>  * the command interface. Limit their command slots usage.</div><div class='ctx'>  */</div><div class='hunk'>@@ -176,6 +181,7 @@ static int cmd_alloc_index(struct mlx5_cmd *cmd, struct mlx5_cmd_work_ent *ent)</div><div class='ctx'> static void cmd_free_index(struct mlx5_cmd *cmd, int idx)</div><div class='ctx'> {</div><div class='ctx'> 	lockdep_assert_held(&amp;cmd-&gt;alloc_lock);</div><div class='add'>+	cmd-&gt;ent_arr[idx] = NULL;</div><div class='ctx'> 	set_bit(idx, &amp;cmd-&gt;vars.bitmask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -289,6 +295,10 @@ static void poll_timeout(struct mlx5_cmd_work_ent *ent)</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		cond_resched();</div><div class='add'>+		if (mlx5_cmd_is_down(dev)) {</div><div class='add'>+			ent-&gt;ret = -ENXIO;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> 	} while (time_before(jiffies, poll_end));</div><div class='ctx'> </div><div class='ctx'> 	ent-&gt;ret = -ETIMEDOUT;</div><div class='hunk'>@@ -823,7 +833,7 @@ static void cmd_status_print(struct mlx5_core_dev *dev, void *in, void *out)</div><div class='ctx'> </div><div class='ctx'> 	opcode = in_to_opcode(in);</div><div class='ctx'> 	op_mod = MLX5_GET(mbox_in, in, op_mod);</div><div class='del'>-	uid    = MLX5_GET(mbox_in, in, uid);</div><div class='add'>+	uid    = in_to_uid(in);</div><div class='ctx'> 	status = MLX5_GET(mbox_out, out, status);</div><div class='ctx'> </div><div class='ctx'> 	if (!uid &amp;&amp; opcode != MLX5_CMD_OP_DESTROY_MKEY &amp;&amp;</div><div class='hunk'>@@ -922,8 +932,7 @@ static void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec, bool force</div><div class='ctx'> </div><div class='ctx'> static void cb_timeout_handler(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct delayed_work *dwork = container_of(work, struct delayed_work,</div><div class='del'>-						  work);</div><div class='add'>+	struct delayed_work *dwork = to_delayed_work(work);</div><div class='ctx'> 	struct mlx5_cmd_work_ent *ent = container_of(dwork,</div><div class='ctx'> 						     struct mlx5_cmd_work_ent,</div><div class='ctx'> 						     cb_timeout_work);</div><div class='hunk'>@@ -1013,6 +1022,7 @@ static void cmd_work_handler(struct work_struct *work)</div><div class='ctx'> 				complete(&amp;ent-&gt;done);</div><div class='ctx'> 			}</div><div class='ctx'> 			up(&amp;cmd-&gt;vars.sem);</div><div class='add'>+			complete(&amp;ent-&gt;slotted);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1065,7 +1075,7 @@ static void cmd_work_handler(struct work_struct *work)</div><div class='ctx'> 		poll_timeout(ent);</div><div class='ctx'> 		/* make sure we read the descriptor after ownership is SW */</div><div class='ctx'> 		rmb();</div><div class='del'>-		mlx5_cmd_comp_handler(dev, 1ULL &lt;&lt; ent-&gt;idx, (ent-&gt;ret == -ETIMEDOUT));</div><div class='add'>+		mlx5_cmd_comp_handler(dev, 1ULL &lt;&lt; ent-&gt;idx, !!ent-&gt;ret);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1191,6 +1201,44 @@ out_err:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Check if all command slots are stalled (timed out and not recovered).</div><div class='add'>+ * returns true if all slots timed out on a recent command and have not been</div><div class='add'>+ * completed by FW yet. (stalled state)</div><div class='add'>+ * false otherwise (at least one slot is not stalled).</div><div class='add'>+ *</div><div class='add'>+ * In such odd situation "all_stalled", this serves as a protection mechanism</div><div class='add'>+ * to avoid blocking the kernel for long periods of time in case FW is not</div><div class='add'>+ * responding to commands.</div><div class='add'>+ */</div><div class='add'>+static bool mlx5_cmd_all_stalled(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_cmd *cmd = &amp;dev-&gt;cmd;</div><div class='add'>+	bool all_stalled = true;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;cmd-&gt;alloc_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* at least one command slot is free */</div><div class='add'>+	if (bitmap_weight(&amp;cmd-&gt;vars.bitmask, cmd-&gt;vars.max_reg_cmds) &gt; 0) {</div><div class='add'>+		all_stalled = false;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_clear_bit(i, &amp;cmd-&gt;vars.bitmask, cmd-&gt;vars.max_reg_cmds) {</div><div class='add'>+		struct mlx5_cmd_work_ent *ent = dev-&gt;cmd.ent_arr[i];</div><div class='add'>+</div><div class='add'>+		if (!test_bit(MLX5_CMD_ENT_STATE_TIMEDOUT, &amp;ent-&gt;state)) {</div><div class='add'>+			all_stalled = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	spin_unlock_irqrestore(&amp;cmd-&gt;alloc_lock, flags);</div><div class='add'>+</div><div class='add'>+	return all_stalled;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*  Notes:</div><div class='ctx'>  *    1. Callback functions may not sleep</div><div class='ctx'>  *    2. page queue commands do not support asynchrous completion</div><div class='hunk'>@@ -1221,6 +1269,15 @@ static int mlx5_cmd_invoke(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *in,</div><div class='ctx'> 	if (callback &amp;&amp; page_queue)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (!page_queue &amp;&amp; mlx5_cmd_all_stalled(dev)) {</div><div class='add'>+		mlx5_core_err_rl(dev,</div><div class='add'>+				 "All CMD slots are stalled, aborting command\n");</div><div class='add'>+		/* there's no reason to wait and block the whole kernel if FW</div><div class='add'>+		 * isn't currently responding to all slots, fail immediately</div><div class='add'>+		 */</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ent = cmd_alloc_ent(cmd, in, out, uout, uout_size,</div><div class='ctx'> 			    callback, context, page_queue);</div><div class='ctx'> 	if (IS_ERR(ent))</div><div class='hunk'>@@ -1691,6 +1748,13 @@ static void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec, bool force</div><div class='ctx'> 		if (test_bit(i, &amp;vector)) {</div><div class='ctx'> 			ent = cmd-&gt;ent_arr[i];</div><div class='ctx'> </div><div class='add'>+			if (forced &amp;&amp; ent-&gt;ret == -ETIMEDOUT)</div><div class='add'>+				set_bit(MLX5_CMD_ENT_STATE_TIMEDOUT,</div><div class='add'>+					&amp;ent-&gt;state);</div><div class='add'>+			else if (!forced) /* real FW completion */</div><div class='add'>+				clear_bit(MLX5_CMD_ENT_STATE_TIMEDOUT,</div><div class='add'>+					  &amp;ent-&gt;state);</div><div class='add'>+</div><div class='ctx'> 			/* if we already completed the command, ignore it */</div><div class='ctx'> 			if (!test_and_clear_bit(MLX5_CMD_ENT_STATE_PENDING_COMP,</div><div class='ctx'> 						&amp;ent-&gt;state)) {</div><div class='hunk'>@@ -1870,6 +1934,17 @@ static int is_manage_pages(void *in)</div><div class='ctx'> 	return in_to_opcode(in) == MLX5_CMD_OP_MANAGE_PAGES;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool mlx5_has_privileged_uid(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	return !xa_empty(&amp;dev-&gt;cmd.vars.privileged_uids);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mlx5_cmd_is_privileged_uid(struct mlx5_core_dev *dev,</div><div class='add'>+				       u16 uid)</div><div class='add'>+{</div><div class='add'>+	return !!xa_load(&amp;dev-&gt;cmd.vars.privileged_uids, uid);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*  Notes:</div><div class='ctx'>  *    1. Callback functions may not sleep</div><div class='ctx'>  *    2. Page queue commands do not support asynchrous completion</div><div class='hunk'>@@ -1880,7 +1955,9 @@ static int cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_cmd_msg *inb, *outb;</div><div class='ctx'> 	u16 opcode = in_to_opcode(in);</div><div class='del'>-	bool throttle_op;</div><div class='add'>+	bool throttle_locked = false;</div><div class='add'>+	bool unpriv_locked = false;</div><div class='add'>+	u16 uid = in_to_uid(in);</div><div class='ctx'> 	int pages_queue;</div><div class='ctx'> 	gfp_t gfp;</div><div class='ctx'> 	u8 token;</div><div class='hunk'>@@ -1889,12 +1966,17 @@ static int cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,</div><div class='ctx'> 	if (mlx5_cmd_is_down(dev) || !opcode_allowed(&amp;dev-&gt;cmd, opcode))</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='del'>-	throttle_op = mlx5_cmd_is_throttle_opcode(opcode);</div><div class='del'>-	if (throttle_op) {</div><div class='del'>-		if (callback) {</div><div class='del'>-			if (down_trylock(&amp;dev-&gt;cmd.vars.throttle_sem))</div><div class='del'>-				return -EBUSY;</div><div class='del'>-		} else {</div><div class='add'>+	if (!callback) {</div><div class='add'>+		/* The semaphore is already held for callback commands. It was</div><div class='add'>+		 * acquired in mlx5_cmd_exec_cb()</div><div class='add'>+		 */</div><div class='add'>+		if (uid &amp;&amp; mlx5_has_privileged_uid(dev)) {</div><div class='add'>+			if (!mlx5_cmd_is_privileged_uid(dev, uid)) {</div><div class='add'>+				unpriv_locked = true;</div><div class='add'>+				down(&amp;dev-&gt;cmd.vars.unprivileged_sem);</div><div class='add'>+			}</div><div class='add'>+		} else if (mlx5_cmd_is_throttle_opcode(opcode)) {</div><div class='add'>+			throttle_locked = true;</div><div class='ctx'> 			down(&amp;dev-&gt;cmd.vars.throttle_sem);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1924,8 +2006,8 @@ static int cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_cmd_invoke(dev, inb, outb, out, out_size, callback, context,</div><div class='ctx'> 			      pages_queue, token, force_polling);</div><div class='del'>-	if (callback)</div><div class='del'>-		return err;</div><div class='add'>+	if (callback &amp;&amp; !err)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (err &gt; 0) /* Failed in FW, command didn't execute */</div><div class='ctx'> 		err = deliv_status_to_err(err);</div><div class='hunk'>@@ -1940,8 +2022,11 @@ out_out:</div><div class='ctx'> out_in:</div><div class='ctx'> 	free_msg(dev, inb);</div><div class='ctx'> out_up:</div><div class='del'>-	if (throttle_op)</div><div class='add'>+	if (throttle_locked)</div><div class='ctx'> 		up(&amp;dev-&gt;cmd.vars.throttle_sem);</div><div class='add'>+	if (unpriv_locked)</div><div class='add'>+		up(&amp;dev-&gt;cmd.vars.unprivileged_sem);</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2103,18 +2188,22 @@ static void mlx5_cmd_exec_cb_handler(int status, void *_work)</div><div class='ctx'> 	struct mlx5_async_work *work = _work;</div><div class='ctx'> 	struct mlx5_async_ctx *ctx;</div><div class='ctx'> 	struct mlx5_core_dev *dev;</div><div class='del'>-	u16 opcode;</div><div class='add'>+	bool throttle_locked;</div><div class='add'>+	bool unpriv_locked;</div><div class='ctx'> </div><div class='ctx'> 	ctx = work-&gt;ctx;</div><div class='ctx'> 	dev = ctx-&gt;dev;</div><div class='del'>-	opcode = work-&gt;opcode;</div><div class='add'>+	throttle_locked = work-&gt;throttle_locked;</div><div class='add'>+	unpriv_locked = work-&gt;unpriv_locked;</div><div class='ctx'> 	status = cmd_status_err(dev, status, work-&gt;opcode, work-&gt;op_mod, work-&gt;out);</div><div class='ctx'> 	work-&gt;user_callback(status, work);</div><div class='ctx'> 	/* Can't access "work" from this point on. It could have been freed in</div><div class='ctx'> 	 * the callback.</div><div class='ctx'> 	 */</div><div class='del'>-	if (mlx5_cmd_is_throttle_opcode(opcode))</div><div class='add'>+	if (throttle_locked)</div><div class='ctx'> 		up(&amp;dev-&gt;cmd.vars.throttle_sem);</div><div class='add'>+	if (unpriv_locked)</div><div class='add'>+		up(&amp;dev-&gt;cmd.vars.unprivileged_sem);</div><div class='ctx'> 	if (atomic_dec_and_test(&amp;ctx-&gt;num_inflight))</div><div class='ctx'> 		complete(&amp;ctx-&gt;inflight_done);</div><div class='ctx'> }</div><div class='hunk'>@@ -2123,6 +2212,8 @@ int mlx5_cmd_exec_cb(struct mlx5_async_ctx *ctx, void *in, int in_size,</div><div class='ctx'> 		     void *out, int out_size, mlx5_async_cbk_t callback,</div><div class='ctx'> 		     struct mlx5_async_work *work)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_core_dev *dev = ctx-&gt;dev;</div><div class='add'>+	u16 uid;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	work-&gt;ctx = ctx;</div><div class='hunk'>@@ -2130,11 +2221,43 @@ int mlx5_cmd_exec_cb(struct mlx5_async_ctx *ctx, void *in, int in_size,</div><div class='ctx'> 	work-&gt;opcode = in_to_opcode(in);</div><div class='ctx'> 	work-&gt;op_mod = MLX5_GET(mbox_in, in, op_mod);</div><div class='ctx'> 	work-&gt;out = out;</div><div class='add'>+	work-&gt;throttle_locked = false;</div><div class='add'>+	work-&gt;unpriv_locked = false;</div><div class='add'>+	uid = in_to_uid(in);</div><div class='add'>+</div><div class='ctx'> 	if (WARN_ON(!atomic_inc_not_zero(&amp;ctx-&gt;num_inflight)))</div><div class='ctx'> 		return -EIO;</div><div class='del'>-	ret = cmd_exec(ctx-&gt;dev, in, in_size, out, out_size,</div><div class='add'>+</div><div class='add'>+	if (uid &amp;&amp; mlx5_has_privileged_uid(dev)) {</div><div class='add'>+		if (!mlx5_cmd_is_privileged_uid(dev, uid)) {</div><div class='add'>+			if (down_trylock(&amp;dev-&gt;cmd.vars.unprivileged_sem)) {</div><div class='add'>+				ret = -EBUSY;</div><div class='add'>+				goto dec_num_inflight;</div><div class='add'>+			}</div><div class='add'>+			work-&gt;unpriv_locked = true;</div><div class='add'>+		}</div><div class='add'>+	} else if (mlx5_cmd_is_throttle_opcode(in_to_opcode(in))) {</div><div class='add'>+		if (down_trylock(&amp;dev-&gt;cmd.vars.throttle_sem)) {</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			goto dec_num_inflight;</div><div class='add'>+		}</div><div class='add'>+		work-&gt;throttle_locked = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = cmd_exec(dev, in, in_size, out, out_size,</div><div class='ctx'> 		       mlx5_cmd_exec_cb_handler, work, false);</div><div class='del'>-	if (ret &amp;&amp; atomic_dec_and_test(&amp;ctx-&gt;num_inflight))</div><div class='add'>+	if (ret)</div><div class='add'>+		goto sem_up;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+sem_up:</div><div class='add'>+	if (work-&gt;throttle_locked)</div><div class='add'>+		up(&amp;dev-&gt;cmd.vars.throttle_sem);</div><div class='add'>+	if (work-&gt;unpriv_locked)</div><div class='add'>+		up(&amp;dev-&gt;cmd.vars.unprivileged_sem);</div><div class='add'>+dec_num_inflight:</div><div class='add'>+	if (atomic_dec_and_test(&amp;ctx-&gt;num_inflight))</div><div class='ctx'> 		complete(&amp;ctx-&gt;inflight_done);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2370,10 +2493,16 @@ int mlx5_cmd_enable(struct mlx5_core_dev *dev)</div><div class='ctx'> 	sema_init(&amp;cmd-&gt;vars.sem, cmd-&gt;vars.max_reg_cmds);</div><div class='ctx'> 	sema_init(&amp;cmd-&gt;vars.pages_sem, 1);</div><div class='ctx'> 	sema_init(&amp;cmd-&gt;vars.throttle_sem, DIV_ROUND_UP(cmd-&gt;vars.max_reg_cmds, 2));</div><div class='add'>+	sema_init(&amp;cmd-&gt;vars.unprivileged_sem,</div><div class='add'>+		  DIV_ROUND_UP(cmd-&gt;vars.max_reg_cmds, 2));</div><div class='add'>+</div><div class='add'>+	xa_init(&amp;cmd-&gt;vars.privileged_uids);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;pool = dma_pool_create("mlx5_cmd", mlx5_core_dma_dev(dev), size, align, 0);</div><div class='del'>-	if (!cmd-&gt;pool)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (!cmd-&gt;pool) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_destroy_xa;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = alloc_cmd_page(dev, cmd);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -2407,6 +2536,8 @@ err_cmd_page:</div><div class='ctx'> 	free_cmd_page(dev, cmd);</div><div class='ctx'> err_free_pool:</div><div class='ctx'> 	dma_pool_destroy(cmd-&gt;pool);</div><div class='add'>+err_destroy_xa:</div><div class='add'>+	xa_destroy(&amp;dev-&gt;cmd.vars.privileged_uids);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2419,6 +2550,7 @@ void mlx5_cmd_disable(struct mlx5_core_dev *dev)</div><div class='ctx'> 	destroy_msg_cache(dev);</div><div class='ctx'> 	free_cmd_page(dev, cmd);</div><div class='ctx'> 	dma_pool_destroy(cmd-&gt;pool);</div><div class='add'>+	xa_destroy(&amp;dev-&gt;cmd.vars.privileged_uids);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_cmd_set_state(struct mlx5_core_dev *dev,</div><div class='hunk'>@@ -2426,3 +2558,18 @@ void mlx5_cmd_set_state(struct mlx5_core_dev *dev,</div><div class='ctx'> {</div><div class='ctx'> 	dev-&gt;cmd.state = cmdif_state;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int mlx5_cmd_add_privileged_uid(struct mlx5_core_dev *dev, u16 uid)</div><div class='add'>+{</div><div class='add'>+	return xa_insert(&amp;dev-&gt;cmd.vars.privileged_uids, uid,</div><div class='add'>+			 xa_mk_value(uid), GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mlx5_cmd_add_privileged_uid);</div><div class='add'>+</div><div class='add'>+void mlx5_cmd_remove_privileged_uid(struct mlx5_core_dev *dev, u16 uid)</div><div class='add'>+{</div><div class='add'>+	void *data = xa_erase(&amp;dev-&gt;cmd.vars.privileged_uids, uid);</div><div class='add'>+</div><div class='add'>+	WARN(!data, "Privileged UID %u does not exist\n", uid);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mlx5_cmd_remove_privileged_uid);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cq.c b/drivers/net/ethernet/mellanox/mlx5/core/cq.c<br/>index 4caa1b6f40ba..60f7ab1d72e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/cq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/cq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/cq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/cq.c</a></div><div class='hunk'>@@ -66,11 +66,12 @@ void mlx5_cq_tasklet_cb(struct tasklet_struct *t)</div><div class='ctx'> 		tasklet_schedule(&amp;ctx-&gt;task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_add_cq_to_tasklet(struct mlx5_core_cq *cq,</div><div class='del'>-				   struct mlx5_eqe *eqe)</div><div class='add'>+void mlx5_add_cq_to_tasklet(struct mlx5_core_cq *cq,</div><div class='add'>+			    struct mlx5_eqe *eqe)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct mlx5_eq_tasklet *tasklet_ctx = cq-&gt;tasklet_ctx.priv;</div><div class='add'>+	bool schedule_tasklet = false;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;tasklet_ctx-&gt;lock, flags);</div><div class='ctx'> 	/* When migrating CQs between EQs will be implemented, please note</div><div class='hunk'>@@ -80,11 +81,29 @@ static void mlx5_add_cq_to_tasklet(struct mlx5_core_cq *cq,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (list_empty_careful(&amp;cq-&gt;tasklet_ctx.list)) {</div><div class='ctx'> 		mlx5_cq_hold(cq);</div><div class='add'>+		/* If the tasklet CQ work list isn't empty, mlx5_cq_tasklet_cb()</div><div class='add'>+		 * is scheduled/running and hasn't processed the list yet, so it</div><div class='add'>+		 * will see this added CQ when it runs. If the list is empty,</div><div class='add'>+		 * the tasklet needs to be scheduled to pick up the CQ. The</div><div class='add'>+		 * spinlock avoids any race with the tasklet accessing the list.</div><div class='add'>+		 */</div><div class='add'>+		schedule_tasklet = list_empty(&amp;tasklet_ctx-&gt;list);</div><div class='ctx'> 		list_add_tail(&amp;cq-&gt;tasklet_ctx.list, &amp;tasklet_ctx-&gt;list);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;tasklet_ctx-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (schedule_tasklet)</div><div class='add'>+		tasklet_schedule(&amp;tasklet_ctx-&gt;task);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mlx5_add_cq_to_tasklet);</div><div class='add'>+</div><div class='add'>+static void mlx5_core_cq_dummy_cb(struct mlx5_core_cq *cq, struct mlx5_eqe *eqe)</div><div class='add'>+{</div><div class='add'>+	mlx5_core_err(cq-&gt;eq-&gt;core.dev,</div><div class='add'>+		      "CQ default completion callback, CQ #%u\n", cq-&gt;cqn);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define MLX5_CQ_INIT_CMD_SN cpu_to_be32(2 &lt;&lt; 28)</div><div class='ctx'> /* Callers must verify outbox status in case of err */</div><div class='ctx'> int mlx5_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,</div><div class='ctx'> 		   u32 *in, int inlen, u32 *out, int outlen)</div><div class='hunk'>@@ -110,10 +129,19 @@ int mlx5_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,</div><div class='ctx'> 	cq-&gt;arm_sn     = 0;</div><div class='ctx'> 	cq-&gt;eq         = eq;</div><div class='ctx'> 	cq-&gt;uid = MLX5_GET(create_cq_in, in, uid);</div><div class='add'>+</div><div class='add'>+	/* Kernel CQs must set the arm_db address prior to calling</div><div class='add'>+	 * this function, allowing for the proper value to be</div><div class='add'>+	 * initialized. User CQs are responsible for their own</div><div class='add'>+	 * initialization since they do not use the arm_db field.</div><div class='add'>+	 */</div><div class='add'>+	if (cq-&gt;arm_db)</div><div class='add'>+		*cq-&gt;arm_db = MLX5_CQ_INIT_CMD_SN;</div><div class='add'>+</div><div class='ctx'> 	refcount_set(&amp;cq-&gt;refcount, 1);</div><div class='ctx'> 	init_completion(&amp;cq-&gt;free);</div><div class='ctx'> 	if (!cq-&gt;comp)</div><div class='del'>-		cq-&gt;comp = mlx5_add_cq_to_tasklet;</div><div class='add'>+		cq-&gt;comp = mlx5_core_cq_dummy_cb;</div><div class='ctx'> 	/* assuming CQ will be deleted before the EQ */</div><div class='ctx'> 	cq-&gt;tasklet_ctx.priv = &amp;eq-&gt;tasklet_ctx;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;cq-&gt;tasklet_ctx.list);</div><div class='hunk'>@@ -134,7 +162,6 @@ int mlx5_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,</div><div class='ctx'> 		mlx5_core_dbg(dev, "failed adding CP 0x%x to debug file system\n",</div><div class='ctx'> 			      cq-&gt;cqn);</div><div class='ctx'> </div><div class='del'>-	cq-&gt;uar = dev-&gt;priv.uar;</div><div class='ctx'> 	cq-&gt;irqn = eq-&gt;core.irqn;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dev.c b/drivers/net/ethernet/mellanox/mlx5/core/dev.c<br/>index 9a79674d27f1..64c04f52990f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/dev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/dev.c</a></div><div class='hunk'>@@ -228,8 +228,15 @@ enum {</div><div class='ctx'> 	MLX5_INTERFACE_PROTOCOL_VNET,</div><div class='ctx'> </div><div class='ctx'> 	MLX5_INTERFACE_PROTOCOL_DPLL,</div><div class='add'>+	MLX5_INTERFACE_PROTOCOL_FWCTL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static bool is_fwctl_supported(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	/* fwctl is most useful on PFs, prevent fwctl on SFs for now */</div><div class='add'>+	return MLX5_CAP_GEN(dev, uctx_cap) &amp;&amp; !mlx5_core_is_sf(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct mlx5_adev_device {</div><div class='ctx'> 	const char *suffix;</div><div class='ctx'> 	bool (*is_supported)(struct mlx5_core_dev *dev);</div><div class='hunk'>@@ -252,6 +259,8 @@ static const struct mlx5_adev_device {</div><div class='ctx'> 					   .is_supported = &amp;is_mp_supported },</div><div class='ctx'> 	[MLX5_INTERFACE_PROTOCOL_DPLL] = { .suffix = "dpll",</div><div class='ctx'> 					   .is_supported = &amp;is_dpll_supported },</div><div class='add'>+	[MLX5_INTERFACE_PROTOCOL_FWCTL] = { .suffix = "fwctl",</div><div class='add'>+					    .is_supported = &amp;is_fwctl_supported },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int mlx5_adev_idx_alloc(void)</div><div class='hunk'>@@ -555,10 +564,14 @@ int mlx5_rescan_drivers_locked(struct mlx5_core_dev *dev)</div><div class='ctx'> </div><div class='ctx'> bool mlx5_same_hw_devs(struct mlx5_core_dev *dev, struct mlx5_core_dev *peer_dev)</div><div class='ctx'> {</div><div class='del'>-	u64 fsystem_guid, psystem_guid;</div><div class='add'>+	u8 fsystem_guid[MLX5_SW_IMAGE_GUID_MAX_BYTES];</div><div class='add'>+	u8 psystem_guid[MLX5_SW_IMAGE_GUID_MAX_BYTES];</div><div class='add'>+	u8 flen;</div><div class='add'>+	u8 plen;</div><div class='ctx'> </div><div class='del'>-	fsystem_guid = mlx5_query_nic_system_image_guid(dev);</div><div class='del'>-	psystem_guid = mlx5_query_nic_system_image_guid(peer_dev);</div><div class='add'>+	mlx5_query_nic_sw_system_image_guid(dev, fsystem_guid, &amp;flen);</div><div class='add'>+	mlx5_query_nic_sw_system_image_guid(peer_dev, psystem_guid, &amp;plen);</div><div class='ctx'> </div><div class='del'>-	return (fsystem_guid &amp;&amp; psystem_guid &amp;&amp; fsystem_guid == psystem_guid);</div><div class='add'>+	return plen &amp;&amp; flen &amp;&amp; flen == plen &amp;&amp;</div><div class='add'>+		!memcmp(fsystem_guid, psystem_guid, flen);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/devlink.c<br/>index 98d4306929f3..887adf4807d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/devlink.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include "esw/qos.h"</div><div class='ctx'> #include "sf/dev/dev.h"</div><div class='ctx'> #include "sf/sf.h"</div><div class='add'>+#include "lib/nv_param.h"</div><div class='ctx'> </div><div class='ctx'> static int mlx5_devlink_flash_update(struct devlink *devlink,</div><div class='ctx'> 				     struct devlink_flash_update_params *params,</div><div class='hunk'>@@ -35,6 +36,55 @@ static u16 mlx5_fw_ver_subminor(u32 version)</div><div class='ctx'> 	return version &amp; 0xffff;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5_devlink_serial_numbers_put(struct mlx5_core_dev *dev,</div><div class='add'>+					   struct devlink_info_req *req,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;pdev;</div><div class='add'>+	unsigned int vpd_size, kw_len;</div><div class='add'>+	char *str, *end;</div><div class='add'>+	u8 *vpd_data;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int start;</div><div class='add'>+</div><div class='add'>+	vpd_data = pci_vpd_alloc(pdev, &amp;vpd_size);</div><div class='add'>+	if (IS_ERR(vpd_data))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	start = pci_vpd_find_ro_info_keyword(vpd_data, vpd_size,</div><div class='add'>+					     PCI_VPD_RO_KEYWORD_SERIALNO, &amp;kw_len);</div><div class='add'>+	if (start &gt;= 0) {</div><div class='add'>+		str = kstrndup(vpd_data + start, kw_len, GFP_KERNEL);</div><div class='add'>+		if (!str) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto end;</div><div class='add'>+		}</div><div class='add'>+		end = strchrnul(str, ' ');</div><div class='add'>+		*end = '\0';</div><div class='add'>+		err = devlink_info_board_serial_number_put(req, str);</div><div class='add'>+		kfree(str);</div><div class='add'>+		if (err)</div><div class='add'>+			goto end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	start = pci_vpd_find_ro_info_keyword(vpd_data, vpd_size, "V3", &amp;kw_len);</div><div class='add'>+	if (start &gt;= 0) {</div><div class='add'>+		str = kstrndup(vpd_data + start, kw_len, GFP_KERNEL);</div><div class='add'>+		if (!str) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto end;</div><div class='add'>+		}</div><div class='add'>+		err = devlink_info_serial_number_put(req, str);</div><div class='add'>+		kfree(str);</div><div class='add'>+		if (err)</div><div class='add'>+			goto end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	kfree(vpd_data);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define DEVLINK_FW_STRING_LEN 32</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -46,6 +96,13 @@ mlx5_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,</div><div class='ctx'> 	u32 running_fw, stored_fw;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (!mlx5_core_is_pf(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = mlx5_devlink_serial_numbers_put(dev, req, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	err = devlink_info_version_fixed_put(req, "fw.psid", dev-&gt;board_id);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -104,7 +161,7 @@ static int mlx5_devlink_reload_fw_activate(struct devlink *devlink, struct netli</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	mlx5_unload_one_devl_locked(dev, true);</div><div class='add'>+	mlx5_sync_reset_unload_flow(dev, true);</div><div class='ctx'> 	err = mlx5_health_wait_pci_up(dev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "FW activate aborted, PCI reads fail after reset");</div><div class='hunk'>@@ -147,11 +204,6 @@ static int mlx5_devlink_reload_down(struct devlink *devlink, bool netns_change,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mlx5_lag_is_active(dev)) {</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack, "reload is unsupported in Lag mode");</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (mlx5_core_is_mp_slave(dev)) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "reload is unsupported for multi port slave");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -320,11 +372,14 @@ static const struct devlink_ops mlx5_devlink_ops = {</div><div class='ctx'> 	.eswitch_encap_mode_get = mlx5_devlink_eswitch_encap_mode_get,</div><div class='ctx'> 	.rate_leaf_tx_share_set = mlx5_esw_devlink_rate_leaf_tx_share_set,</div><div class='ctx'> 	.rate_leaf_tx_max_set = mlx5_esw_devlink_rate_leaf_tx_max_set,</div><div class='add'>+	.rate_leaf_tc_bw_set = mlx5_esw_devlink_rate_leaf_tc_bw_set,</div><div class='add'>+	.rate_node_tc_bw_set = mlx5_esw_devlink_rate_node_tc_bw_set,</div><div class='ctx'> 	.rate_node_tx_share_set = mlx5_esw_devlink_rate_node_tx_share_set,</div><div class='ctx'> 	.rate_node_tx_max_set = mlx5_esw_devlink_rate_node_tx_max_set,</div><div class='ctx'> 	.rate_node_new = mlx5_esw_devlink_rate_node_new,</div><div class='ctx'> 	.rate_node_del = mlx5_esw_devlink_rate_node_del,</div><div class='del'>-	.rate_leaf_parent_set = mlx5_esw_devlink_rate_parent_set,</div><div class='add'>+	.rate_leaf_parent_set = mlx5_esw_devlink_rate_leaf_parent_set,</div><div class='add'>+	.rate_node_parent_set = mlx5_esw_devlink_rate_node_parent_set,</div><div class='ctx'> #endif</div><div class='ctx'> #ifdef CONFIG_MLX5_SF_MANAGER</div><div class='ctx'> 	.port_new = mlx5_devlink_sf_port_new,</div><div class='hunk'>@@ -475,6 +530,25 @@ mlx5_devlink_hairpin_queue_size_validate(struct devlink *devlink, u32 id,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5_devlink_num_doorbells_validate(struct devlink *devlink, u32 id,</div><div class='add'>+					       union devlink_param_value val,</div><div class='add'>+					       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *mdev = devlink_priv(devlink);</div><div class='add'>+	u32 val32 = val.vu32;</div><div class='add'>+	u32 max_num_channels;</div><div class='add'>+</div><div class='add'>+	max_num_channels = mlx5e_get_max_num_channels(mdev);</div><div class='add'>+	if (val32 &gt; max_num_channels) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "Requested num_doorbells (%u) exceeds max number of channels (%u)",</div><div class='add'>+				       val32, max_num_channels);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mlx5_devlink_hairpin_params_init_values(struct devlink *devlink)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='hunk'>@@ -554,6 +628,9 @@ static const struct devlink_param mlx5_devlink_eth_params[] = {</div><div class='ctx'> 			     "hairpin_queue_size", DEVLINK_PARAM_TYPE_U32,</div><div class='ctx'> 			     BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,</div><div class='ctx'> 			     mlx5_devlink_hairpin_queue_size_validate),</div><div class='add'>+	DEVLINK_PARAM_GENERIC(NUM_DOORBELLS,</div><div class='add'>+			      BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,</div><div class='add'>+			      mlx5_devlink_num_doorbells_validate),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int mlx5_devlink_eth_params_register(struct devlink *devlink)</div><div class='hunk'>@@ -577,6 +654,10 @@ static int mlx5_devlink_eth_params_register(struct devlink *devlink)</div><div class='ctx'> </div><div class='ctx'> 	mlx5_devlink_hairpin_params_init_values(devlink);</div><div class='ctx'> </div><div class='add'>+	value.vu32 = MLX5_DEFAULT_NUM_DOORBELLS;</div><div class='add'>+	devl_param_driverinit_value_set(devlink,</div><div class='add'>+					DEVLINK_PARAM_GENERIC_ID_NUM_DOORBELLS,</div><div class='add'>+					value);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -591,6 +672,105 @@ static void mlx5_devlink_eth_params_unregister(struct devlink *devlink)</div><div class='ctx'> 			       ARRAY_SIZE(mlx5_devlink_eth_params));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define MLX5_PCIE_CONG_THRESH_MAX	10000</div><div class='add'>+#define MLX5_PCIE_CONG_THRESH_DEF_LOW	7500</div><div class='add'>+#define MLX5_PCIE_CONG_THRESH_DEF_HIGH	9000</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_devlink_pcie_cong_thresh_validate(struct devlink *devl, u32 id,</div><div class='add'>+				       union devlink_param_value val,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (val.vu16 &gt; MLX5_PCIE_CONG_THRESH_MAX) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack, "Value %u &gt; max supported (%u)",</div><div class='add'>+				       val.vu16, MLX5_PCIE_CONG_THRESH_MAX);</div><div class='add'>+</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (id) {</div><div class='add'>+	case MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_LOW:</div><div class='add'>+	case MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_HIGH:</div><div class='add'>+	case MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_LOW:</div><div class='add'>+	case MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_HIGH:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_devlink_pcie_cong_init_values(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	union devlink_param_value value;</div><div class='add'>+	u32 id;</div><div class='add'>+</div><div class='add'>+	value.vu16 = MLX5_PCIE_CONG_THRESH_DEF_LOW;</div><div class='add'>+	id = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_LOW;</div><div class='add'>+	devl_param_driverinit_value_set(devlink, id, value);</div><div class='add'>+</div><div class='add'>+	value.vu16 = MLX5_PCIE_CONG_THRESH_DEF_HIGH;</div><div class='add'>+	id = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_HIGH;</div><div class='add'>+	devl_param_driverinit_value_set(devlink, id, value);</div><div class='add'>+</div><div class='add'>+	value.vu16 = MLX5_PCIE_CONG_THRESH_DEF_LOW;</div><div class='add'>+	id = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_LOW;</div><div class='add'>+	devl_param_driverinit_value_set(devlink, id, value);</div><div class='add'>+</div><div class='add'>+	value.vu16 = MLX5_PCIE_CONG_THRESH_DEF_HIGH;</div><div class='add'>+	id = MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_HIGH;</div><div class='add'>+	devl_param_driverinit_value_set(devlink, id, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_param mlx5_devlink_pcie_cong_params[] = {</div><div class='add'>+	DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_LOW,</div><div class='add'>+			     "pcie_cong_inbound_low", DEVLINK_PARAM_TYPE_U16,</div><div class='add'>+			     BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,</div><div class='add'>+			     mlx5_devlink_pcie_cong_thresh_validate),</div><div class='add'>+	DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_HIGH,</div><div class='add'>+			     "pcie_cong_inbound_high", DEVLINK_PARAM_TYPE_U16,</div><div class='add'>+			     BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,</div><div class='add'>+			     mlx5_devlink_pcie_cong_thresh_validate),</div><div class='add'>+	DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_LOW,</div><div class='add'>+			     "pcie_cong_outbound_low", DEVLINK_PARAM_TYPE_U16,</div><div class='add'>+			     BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,</div><div class='add'>+			     mlx5_devlink_pcie_cong_thresh_validate),</div><div class='add'>+	DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_HIGH,</div><div class='add'>+			     "pcie_cong_outbound_high", DEVLINK_PARAM_TYPE_U16,</div><div class='add'>+			     BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,</div><div class='add'>+			     mlx5_devlink_pcie_cong_thresh_validate),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mlx5_devlink_pcie_cong_params_register(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mlx5_pcie_cong_event_supported(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = devl_params_register(devlink, mlx5_devlink_pcie_cong_params,</div><div class='add'>+				   ARRAY_SIZE(mlx5_devlink_pcie_cong_params));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	mlx5_devlink_pcie_cong_init_values(devlink);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_devlink_pcie_cong_params_unregister(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+</div><div class='add'>+	if (!mlx5_pcie_cong_event_supported(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	devl_params_unregister(devlink, mlx5_devlink_pcie_cong_params,</div><div class='add'>+			       ARRAY_SIZE(mlx5_devlink_pcie_cong_params));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5_devlink_enable_rdma_validate(struct devlink *devlink, u32 id,</div><div class='ctx'> 					     union devlink_param_value val,</div><div class='ctx'> 					     struct netlink_ext_ack *extack)</div><div class='hunk'>@@ -836,8 +1016,20 @@ int mlx5_devlink_params_register(struct devlink *devlink)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto max_uc_list_err;</div><div class='ctx'> </div><div class='add'>+	err = mlx5_devlink_pcie_cong_params_register(devlink);</div><div class='add'>+	if (err)</div><div class='add'>+		goto pcie_cong_err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_register_dl_params(devlink);</div><div class='add'>+	if (err)</div><div class='add'>+		goto nv_param_err;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+nv_param_err:</div><div class='add'>+	mlx5_devlink_pcie_cong_params_unregister(devlink);</div><div class='add'>+pcie_cong_err:</div><div class='add'>+	mlx5_devlink_max_uc_list_params_unregister(devlink);</div><div class='ctx'> max_uc_list_err:</div><div class='ctx'> 	mlx5_devlink_auxdev_params_unregister(devlink);</div><div class='ctx'> auxdev_reg_err:</div><div class='hunk'>@@ -848,6 +1040,8 @@ auxdev_reg_err:</div><div class='ctx'> </div><div class='ctx'> void mlx5_devlink_params_unregister(struct devlink *devlink)</div><div class='ctx'> {</div><div class='add'>+	mlx5_nv_param_unregister_dl_params(devlink);</div><div class='add'>+	mlx5_devlink_pcie_cong_params_unregister(devlink);</div><div class='ctx'> 	mlx5_devlink_max_uc_list_params_unregister(devlink);</div><div class='ctx'> 	mlx5_devlink_auxdev_params_unregister(devlink);</div><div class='ctx'> 	devl_params_unregister(devlink, mlx5_devlink_params,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/devlink.h b/drivers/net/ethernet/mellanox/mlx5/core/devlink.h<br/>index 961f75da6227..43b9bf8829cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/devlink.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/devlink.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/devlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/devlink.h</a></div><div class='hunk'>@@ -22,6 +22,12 @@ enum mlx5_devlink_param_id {</div><div class='ctx'> 	MLX5_DEVLINK_PARAM_ID_ESW_MULTIPORT,</div><div class='ctx'> 	MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES,</div><div class='ctx'> 	MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE,</div><div class='add'>+	MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_LOW,</div><div class='add'>+	MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_HIGH,</div><div class='add'>+	MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_LOW,</div><div class='add'>+	MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_HIGH,</div><div class='add'>+	MLX5_DEVLINK_PARAM_ID_CQE_COMPRESSION_TYPE,</div><div class='add'>+	MLX5_DEVLINK_PARAM_ID_SWP_L4_CSUM_MODE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5_trap_ctx {</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h b/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h<br/>index 9aed29fa4900..d6e736c1fb24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h</a></div><div class='hunk'>@@ -292,7 +292,7 @@ TRACE_EVENT(mlx5_fs_add_rule,</div><div class='ctx'> 			   if (rule-&gt;dest_attr.type &amp;</div><div class='ctx'> 			       MLX5_FLOW_DESTINATION_TYPE_COUNTER)</div><div class='ctx'> 				__entry-&gt;counter_id =</div><div class='del'>-					rule-&gt;dest_attr.counter_id;</div><div class='add'>+					mlx5_fc_id(rule-&gt;dest_attr.counter);</div><div class='ctx'> 	    ),</div><div class='ctx'> 	    TP_printk("rule=%p fte=%p index=%u sw_action=&lt;%s&gt; [dst] %s\n",</div><div class='ctx'> 		      __entry-&gt;rule, __entry-&gt;fte, __entry-&gt;index,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c b/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c<br/>index 080e7eab52c7..7bcf822a89f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ static int mlx5_query_mtrc_caps(struct mlx5_fw_tracer *tracer)</div><div class='ctx'> </div><div class='ctx'> 	if (!MLX5_GET(mtrc_cap, out, trace_to_memory)) {</div><div class='ctx'> 		mlx5_core_dbg(dev, "FWTracer: Device does not support logging traces to memory\n");</div><div class='del'>-		return -ENOTSUPP;</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tracer-&gt;trc_ver = MLX5_GET(mtrc_cap, out, trc_ver);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c b/drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c<br/>index c7216e84ef8c..7cae0c6e5e8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2023, NVIDIA CORPORATION &amp; AFFILIATES. */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/mlx5/vport.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "reporter_vnic.h"</div><div class='ctx'> #include "en_stats.h"</div><div class='ctx'> #include "devlink.h"</div><div class='hunk'>@@ -13,6 +15,50 @@ struct mlx5_vnic_diag_stats {</div><div class='ctx'> 	__be64 query_vnic_env_out[MLX5_ST_SZ_QW(query_vnic_env_out)];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void mlx5_reporter_vnic_diagnose_counter_icm(struct mlx5_core_dev *dev,</div><div class='add'>+						    struct devlink_fmsg *fmsg,</div><div class='add'>+						    u16 vport_num, bool other_vport)</div><div class='add'>+{</div><div class='add'>+	u32 out_icm_reg[MLX5_ST_SZ_DW(vhca_icm_ctrl_reg)] = {};</div><div class='add'>+	u32 in_icm_reg[MLX5_ST_SZ_DW(vhca_icm_ctrl_reg)] = {};</div><div class='add'>+	u32 out_reg[MLX5_ST_SZ_DW(nic_cap_reg)] = {};</div><div class='add'>+	u32 in_reg[MLX5_ST_SZ_DW(nic_cap_reg)] = {};</div><div class='add'>+	u32 cur_alloc_icm;</div><div class='add'>+	int vhca_icm_ctrl;</div><div class='add'>+	u16 vhca_id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_core_access_reg(dev, in_reg, sizeof(in_reg), out_reg,</div><div class='add'>+				   sizeof(out_reg), MLX5_REG_NIC_CAP, 0, 0);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_warn(dev, "Reading nic_cap_reg failed. err = %d\n", err);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	vhca_icm_ctrl = MLX5_GET(nic_cap_reg, out_reg, vhca_icm_ctrl);</div><div class='add'>+	if (!vhca_icm_ctrl)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(vhca_icm_ctrl_reg, in_icm_reg, vhca_id_valid, other_vport);</div><div class='add'>+	if (other_vport) {</div><div class='add'>+		err = mlx5_vport_get_vhca_id(dev, vport_num, &amp;vhca_id);</div><div class='add'>+		if (err) {</div><div class='add'>+			mlx5_core_warn(dev, "vport to vhca_id failed. vport_num = %d, err = %d\n",</div><div class='add'>+				       vport_num, err);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		MLX5_SET(vhca_icm_ctrl_reg, in_icm_reg, vhca_id, vhca_id);</div><div class='add'>+	}</div><div class='add'>+	err = mlx5_core_access_reg(dev, in_icm_reg, sizeof(in_icm_reg),</div><div class='add'>+				   out_icm_reg, sizeof(out_icm_reg),</div><div class='add'>+				   MLX5_REG_VHCA_ICM_CTRL, 0, 0);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_warn(dev, "Reading vhca_icm_ctrl failed. err = %d\n", err);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	cur_alloc_icm = MLX5_GET(vhca_icm_ctrl_reg, out_icm_reg, cur_alloc_icm);</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "icm_consumption", cur_alloc_icm);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5_reporter_vnic_diagnose_counters(struct mlx5_core_dev *dev,</div><div class='ctx'> 					  struct devlink_fmsg *fmsg,</div><div class='ctx'> 					  u16 vport_num, bool other_vport)</div><div class='hunk'>@@ -59,6 +105,17 @@ void mlx5_reporter_vnic_diagnose_counters(struct mlx5_core_dev *dev,</div><div class='ctx'> 		devlink_fmsg_u64_pair_put(fmsg, "handled_pkt_steering_fail",</div><div class='ctx'> 					  VNIC_ENV_GET64(&amp;vnic, handled_pkt_steering_fail));</div><div class='ctx'> 	}</div><div class='add'>+	if (MLX5_CAP_GEN(dev, nic_cap_reg))</div><div class='add'>+		mlx5_reporter_vnic_diagnose_counter_icm(dev, fmsg, vport_num, other_vport);</div><div class='add'>+	if (MLX5_CAP_GEN(dev, vnic_env_cnt_bar_uar_access))</div><div class='add'>+		devlink_fmsg_u32_pair_put(fmsg, "bar_uar_access",</div><div class='add'>+					  VNIC_ENV_GET(&amp;vnic, bar_uar_access));</div><div class='add'>+	if (MLX5_CAP_GEN(dev, vnic_env_cnt_odp_page_fault)) {</div><div class='add'>+		devlink_fmsg_u32_pair_put(fmsg, "odp_local_triggered_page_fault",</div><div class='add'>+					  VNIC_ENV_GET(&amp;vnic, odp_local_triggered_page_fault));</div><div class='add'>+		devlink_fmsg_u32_pair_put(fmsg, "odp_remote_triggered_page_fault",</div><div class='add'>+					  VNIC_ENV_GET(&amp;vnic, odp_remote_triggered_page_fault));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	devlink_fmsg_obj_nest_end(fmsg);</div><div class='ctx'> 	devlink_fmsg_pair_nest_end(fmsg);</div><div class='hunk'>@@ -87,11 +144,11 @@ void mlx5_reporter_vnic_create(struct mlx5_core_dev *dev)</div><div class='ctx'> 	health-&gt;vnic_reporter =</div><div class='ctx'> 		devlink_health_reporter_create(devlink,</div><div class='ctx'> 					       &amp;mlx5_reporter_vnic_ops,</div><div class='del'>-					       0, dev);</div><div class='add'>+					       dev);</div><div class='ctx'> 	if (IS_ERR(health-&gt;vnic_reporter))</div><div class='ctx'> 		mlx5_core_warn(dev,</div><div class='del'>-			       "Failed to create vnic reporter, err = %ld\n",</div><div class='del'>-			       PTR_ERR(health-&gt;vnic_reporter));</div><div class='add'>+			       "Failed to create vnic reporter, err = %pe\n",</div><div class='add'>+			       health-&gt;vnic_reporter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_reporter_vnic_destroy(struct mlx5_core_dev *dev)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/dpll.c b/drivers/net/ethernet/mellanox/mlx5/core/dpll.c<br/>index 31142f6cc372..1e5522a19483 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/dpll.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/dpll.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/dpll.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/dpll.c</a></div><div class='hunk'>@@ -242,7 +242,7 @@ static int mlx5_dpll_clock_quality_level_get(const struct dpll_device *dpll,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> errout:</div><div class='del'>-	NL_SET_ERR_MSG_MOD(extack, "Invalid clock quality level obtained from firmware\n");</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Invalid clock quality level obtained from firmware");</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h<br/>index 57b7298a0e79..811178d8976c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en.h</a></div><div class='hunk'>@@ -47,6 +47,7 @@</div><div class='ctx'> #include &lt;linux/rhashtable.h&gt;</div><div class='ctx'> #include &lt;net/udp_tunnel.h&gt;</div><div class='ctx'> #include &lt;net/switchdev.h&gt;</div><div class='add'>+#include &lt;net/psp/types.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='ctx'> #include &lt;linux/dim.h&gt;</div><div class='ctx'> #include &lt;linux/bits.h&gt;</div><div class='hunk'>@@ -68,7 +69,7 @@ struct page_pool;</div><div class='ctx'> #define MLX5E_METADATA_ETHER_TYPE (0x8CE4)</div><div class='ctx'> #define MLX5E_METADATA_ETHER_LEN 8</div><div class='ctx'> </div><div class='del'>-#define MLX5E_ETH_HARD_MTU (ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN)</div><div class='add'>+#define MLX5E_ETH_HARD_MTU (ETH_HLEN + PSP_ENCAP_HLEN + PSP_TRL_SIZE + VLAN_HLEN + ETH_FCS_LEN)</div><div class='ctx'> </div><div class='ctx'> #define MLX5E_HW2SW_MTU(params, hwmtu) ((hwmtu) - ((params)-&gt;hard_mtu))</div><div class='ctx'> #define MLX5E_SW2HW_MTU(params, swmtu) ((swmtu) + ((params)-&gt;hard_mtu))</div><div class='hunk'>@@ -83,9 +84,11 @@ struct page_pool;</div><div class='ctx'> #define MLX5E_SHAMPO_LOG_HEADER_ENTRY_SIZE (8)</div><div class='ctx'> #define MLX5E_SHAMPO_LOG_MAX_HEADER_ENTRY_SIZE (9)</div><div class='ctx'> #define MLX5E_SHAMPO_WQ_HEADER_PER_PAGE (PAGE_SIZE &gt;&gt; MLX5E_SHAMPO_LOG_MAX_HEADER_ENTRY_SIZE)</div><div class='del'>-#define MLX5E_SHAMPO_WQ_BASE_HEAD_ENTRY_SIZE (64)</div><div class='del'>-#define MLX5E_SHAMPO_WQ_RESRV_SIZE (64 * 1024)</div><div class='del'>-#define MLX5E_SHAMPO_WQ_BASE_RESRV_SIZE (4096)</div><div class='add'>+#define MLX5E_SHAMPO_LOG_WQ_HEADER_PER_PAGE (PAGE_SHIFT - MLX5E_SHAMPO_LOG_MAX_HEADER_ENTRY_SIZE)</div><div class='add'>+#define MLX5E_SHAMPO_WQ_BASE_HEAD_ENTRY_SIZE_SHIFT (6)</div><div class='add'>+#define MLX5E_SHAMPO_WQ_RESRV_SIZE_BASE_SHIFT (12)</div><div class='add'>+#define MLX5E_SHAMPO_WQ_LOG_RESRV_SIZE (16)</div><div class='add'>+#define MLX5E_SHAMPO_WQ_RESRV_SIZE BIT(MLX5E_SHAMPO_WQ_LOG_RESRV_SIZE)</div><div class='ctx'> </div><div class='ctx'> #define MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(mdev) \</div><div class='ctx'> 	(6 + MLX5_CAP_GEN(mdev, cache_line_128byte)) /* HW restriction */</div><div class='hunk'>@@ -94,8 +97,6 @@ struct page_pool;</div><div class='ctx'> #define MLX5_MPWRQ_DEF_LOG_STRIDE_SZ(mdev) \</div><div class='ctx'> 	MLX5_MPWRQ_LOG_STRIDE_SZ(mdev, order_base_2(MLX5E_RX_MAX_HEAD))</div><div class='ctx'> </div><div class='del'>-#define MLX5_MPWRQ_MAX_LOG_WQE_SZ 18</div><div class='del'>-</div><div class='ctx'> /* Keep in sync with mlx5e_mpwrq_log_wqe_sz.</div><div class='ctx'>  * These are theoretical maximums, which can be further restricted by</div><div class='ctx'>  * capabilities. These values are used for static resource allocations and</div><div class='hunk'>@@ -231,16 +232,22 @@ struct mlx5e_rx_wqe_cyc {</div><div class='ctx'> 	DECLARE_FLEX_ARRAY(struct mlx5_wqe_data_seg, data);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mlx5e_umr_wqe {</div><div class='add'>+struct mlx5e_umr_wqe_hdr {</div><div class='ctx'> 	struct mlx5_wqe_ctrl_seg       ctrl;</div><div class='ctx'> 	struct mlx5_wqe_umr_ctrl_seg   uctrl;</div><div class='ctx'> 	struct mlx5_mkey_seg           mkc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_umr_wqe {</div><div class='add'>+	struct mlx5e_umr_wqe_hdr hdr;</div><div class='ctx'> 	union {</div><div class='ctx'> 		DECLARE_FLEX_ARRAY(struct mlx5_mtt, inline_mtts);</div><div class='ctx'> 		DECLARE_FLEX_ARRAY(struct mlx5_klm, inline_klms);</div><div class='ctx'> 		DECLARE_FLEX_ARRAY(struct mlx5_ksm, inline_ksms);</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='add'>+static_assert(offsetof(struct mlx5e_umr_wqe, inline_mtts) == sizeof(struct mlx5e_umr_wqe_hdr),</div><div class='add'>+	      "struct members should be included in struct mlx5e_umr_wqe_hdr, not in struct mlx5e_umr_wqe");</div><div class='ctx'> </div><div class='ctx'> enum mlx5e_priv_flag {</div><div class='ctx'> 	MLX5E_PFLAG_RX_CQE_BASED_MODER,</div><div class='hunk'>@@ -273,10 +280,6 @@ enum packet_merge {</div><div class='ctx'> struct mlx5e_packet_merge_param {</div><div class='ctx'> 	enum packet_merge type;</div><div class='ctx'> 	u32 timeout;</div><div class='del'>-	struct {</div><div class='del'>-		u8 match_criteria_type;</div><div class='del'>-		u8 alignment_granularity;</div><div class='del'>-	} shampo;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_params {</div><div class='hunk'>@@ -342,6 +345,7 @@ struct mlx5e_cq {</div><div class='ctx'> 	/* data path - accessed per napi poll */</div><div class='ctx'> 	u16                        event_ctr;</div><div class='ctx'> 	struct napi_struct        *napi;</div><div class='add'>+	struct mlx5_uars_page     *uar;</div><div class='ctx'> 	struct mlx5_core_cq        mcq;</div><div class='ctx'> 	struct mlx5e_ch_stats     *ch_stats;</div><div class='ctx'> </div><div class='hunk'>@@ -373,7 +377,7 @@ struct mlx5e_sq_dma {</div><div class='ctx'> 	enum mlx5e_dma_map_type type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Keep this enum consistent with with the corresponding strings array</div><div class='add'>+/* Keep this enum consistent with the corresponding strings array</div><div class='ctx'>  * declared in en/reporter_tx.c</div><div class='ctx'>  */</div><div class='ctx'> enum {</div><div class='hunk'>@@ -382,10 +386,8 @@ enum {</div><div class='ctx'> 	MLX5E_SQ_STATE_RECOVERING,</div><div class='ctx'> 	MLX5E_SQ_STATE_IPSEC,</div><div class='ctx'> 	MLX5E_SQ_STATE_DIM,</div><div class='del'>-	MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE,</div><div class='ctx'> 	MLX5E_SQ_STATE_PENDING_XSK_TX,</div><div class='ctx'> 	MLX5E_SQ_STATE_PENDING_TLS_RX_RESYNC,</div><div class='del'>-	MLX5E_SQ_STATE_XDP_MULTIBUF,</div><div class='ctx'> 	MLX5E_NUM_SQ_STATES, /* Must be kept last */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -394,6 +396,7 @@ struct mlx5e_tx_mpwqe {</div><div class='ctx'> 	struct mlx5e_tx_wqe *wqe;</div><div class='ctx'> 	u32 bytes_count;</div><div class='ctx'> 	u8 ds_count;</div><div class='add'>+	u8 ds_count_max;</div><div class='ctx'> 	u8 pkt_count;</div><div class='ctx'> 	u8 inline_on;</div><div class='ctx'> };</div><div class='hunk'>@@ -515,6 +518,12 @@ struct mlx5e_xdpsq {</div><div class='ctx'> 	struct mlx5e_channel      *channel;</div><div class='ctx'> } ____cacheline_aligned_in_smp;</div><div class='ctx'> </div><div class='add'>+struct mlx5e_xdp_buff {</div><div class='add'>+	struct xdp_buff xdp;</div><div class='add'>+	struct mlx5_cqe64 *cqe;</div><div class='add'>+	struct mlx5e_rq *rq;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mlx5e_ktls_resync_resp;</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_icosq {</div><div class='hunk'>@@ -546,7 +555,7 @@ struct mlx5e_icosq {</div><div class='ctx'> } ____cacheline_aligned_in_smp;</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_frag_page {</div><div class='del'>-	struct page *page;</div><div class='add'>+	netmem_ref netmem;</div><div class='ctx'> 	u16 frags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -623,17 +632,16 @@ struct mlx5e_dma_info {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_shampo_hd {</div><div class='del'>-	u32 mkey;</div><div class='del'>-	struct mlx5e_dma_info *info;</div><div class='ctx'> 	struct mlx5e_frag_page *pages;</div><div class='del'>-	u16 curr_page_index;</div><div class='ctx'> 	u32 hd_per_wq;</div><div class='add'>+	u32 hd_per_page;</div><div class='ctx'> 	u16 hd_per_wqe;</div><div class='add'>+	u8 log_hd_per_page;</div><div class='add'>+	u8 log_hd_entry_size;</div><div class='ctx'> 	unsigned long *bitmap;</div><div class='ctx'> 	u16 pi;</div><div class='ctx'> 	u16 ci;</div><div class='del'>-	__be32 key;</div><div class='del'>-	u64 last_addr;</div><div class='add'>+	__be32 mkey_be;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_hw_gro_data {</div><div class='hunk'>@@ -661,7 +669,7 @@ struct mlx5e_rq {</div><div class='ctx'> 		} wqe;</div><div class='ctx'> 		struct {</div><div class='ctx'> 			struct mlx5_wq_ll      wq;</div><div class='del'>-			struct mlx5e_umr_wqe   umr_wqe;</div><div class='add'>+			struct mlx5e_umr_wqe_hdr umr_wqe;</div><div class='ctx'> 			struct mlx5e_mpw_info *info;</div><div class='ctx'> 			mlx5e_fp_skb_from_cqe_mpwrq skb_from_cqe_mpwrq;</div><div class='ctx'> 			__be32                 umr_mkey_be;</div><div class='hunk'>@@ -691,7 +699,7 @@ struct mlx5e_rq {</div><div class='ctx'> 	struct mlx5e_rq_stats *stats;</div><div class='ctx'> 	struct mlx5e_cq        cq;</div><div class='ctx'> 	struct mlx5e_cq_decomp cqd;</div><div class='del'>-	struct hwtstamp_config *tstamp;</div><div class='add'>+	struct kernel_hwtstamp_config *hwtstamp_config;</div><div class='ctx'> 	struct mlx5_clock      *clock;</div><div class='ctx'> 	struct mlx5e_icosq    *icosq;</div><div class='ctx'> 	struct mlx5e_priv     *priv;</div><div class='hunk'>@@ -712,12 +720,18 @@ struct mlx5e_rq {</div><div class='ctx'> 	struct bpf_prog __rcu *xdp_prog;</div><div class='ctx'> 	struct mlx5e_xdpsq    *xdpsq;</div><div class='ctx'> 	DECLARE_BITMAP(flags, 8);</div><div class='add'>+</div><div class='add'>+	/* page pools */</div><div class='ctx'> 	struct page_pool      *page_pool;</div><div class='add'>+	struct page_pool      *hd_page_pool;</div><div class='add'>+</div><div class='add'>+	struct mlx5e_xdp_buff mxbuf;</div><div class='ctx'> </div><div class='ctx'> 	/* AF_XDP zero-copy */</div><div class='ctx'> 	struct xsk_buff_pool  *xsk_pool;</div><div class='ctx'> </div><div class='ctx'> 	struct work_struct     recover_work;</div><div class='add'>+	struct work_struct     rx_timeout_work;</div><div class='ctx'> </div><div class='ctx'> 	/* control */</div><div class='ctx'> 	struct mlx5_wq_ctrl    wq_ctrl;</div><div class='hunk'>@@ -755,7 +769,7 @@ struct mlx5e_channel {</div><div class='ctx'> 	u8                         lag_port;</div><div class='ctx'> </div><div class='ctx'> 	/* XDP_REDIRECT */</div><div class='del'>-	struct mlx5e_xdpsq         xdpsq;</div><div class='add'>+	struct mlx5e_xdpsq        *xdpsq;</div><div class='ctx'> </div><div class='ctx'> 	/* AF_XDP zero-copy */</div><div class='ctx'> 	struct mlx5e_rq            xskrq;</div><div class='hunk'>@@ -773,12 +787,12 @@ struct mlx5e_channel {</div><div class='ctx'> 	/* control */</div><div class='ctx'> 	struct mlx5e_priv         *priv;</div><div class='ctx'> 	struct mlx5_core_dev      *mdev;</div><div class='del'>-	struct hwtstamp_config    *tstamp;</div><div class='ctx'> 	DECLARE_BITMAP(state, MLX5E_CHANNEL_NUM_STATES);</div><div class='ctx'> 	int                        ix;</div><div class='ctx'> 	int                        vec_ix;</div><div class='ctx'> 	int                        sd_ix;</div><div class='ctx'> 	int                        cpu;</div><div class='add'>+	struct mlx5_sq_bfreg      *bfreg;</div><div class='ctx'> 	/* Sync between icosq recovery and XSK enable/disable. */</div><div class='ctx'> 	struct mutex               icosq_recovery_lock;</div><div class='ctx'> </div><div class='hunk'>@@ -906,12 +920,14 @@ struct mlx5e_priv {</div><div class='ctx'> 	u8                         max_opened_tc;</div><div class='ctx'> 	bool                       tx_ptp_opened;</div><div class='ctx'> 	bool                       rx_ptp_opened;</div><div class='del'>-	struct hwtstamp_config     tstamp;</div><div class='add'>+	struct kernel_hwtstamp_config hwtstamp_config;</div><div class='ctx'> 	u16                        q_counter[MLX5_SD_MAX_GROUP_SZ];</div><div class='ctx'> 	u16                        drop_rq_q_counter;</div><div class='ctx'> 	struct notifier_block      events_nb;</div><div class='ctx'> 	struct notifier_block      blocking_events_nb;</div><div class='ctx'> </div><div class='add'>+	struct mlx5e_pcie_cong_event *cong_event;</div><div class='add'>+</div><div class='ctx'> 	struct udp_tunnel_nic_info nic_info;</div><div class='ctx'> #ifdef CONFIG_MLX5_CORE_EN_DCB</div><div class='ctx'> 	struct mlx5e_dcbx          dcbx;</div><div class='hunk'>@@ -925,6 +941,9 @@ struct mlx5e_priv {</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_IPSEC</div><div class='ctx'> 	struct mlx5e_ipsec        *ipsec;</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_MLX5_EN_PSP</div><div class='add'>+	struct mlx5e_psp          *psp;</div><div class='add'>+#endif</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_TLS</div><div class='ctx'> 	struct mlx5e_tls          *tls;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -939,6 +958,7 @@ struct mlx5e_priv {</div><div class='ctx'> 	struct mlx5e_mqprio_rl    *mqprio_rl;</div><div class='ctx'> 	struct dentry             *dfs_root;</div><div class='ctx'> 	struct mlx5_devcom_comp_dev *devcom;</div><div class='add'>+	struct ethtool_fec_hist_range *fec_ranges;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_dev {</div><div class='hunk'>@@ -1009,8 +1029,11 @@ void mlx5e_self_test(struct net_device *ndev, struct ethtool_test *etest,</div><div class='ctx'> 		     u64 *buf);</div><div class='ctx'> void mlx5e_set_rx_mode_work(struct work_struct *work);</div><div class='ctx'> </div><div class='del'>-int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr);</div><div class='del'>-int mlx5e_hwstamp_get(struct mlx5e_priv *priv, struct ifreq *ifr);</div><div class='add'>+int mlx5e_hwtstamp_set(struct mlx5e_priv *priv,</div><div class='add'>+		       struct kernel_hwtstamp_config *config,</div><div class='add'>+		       struct netlink_ext_ack *extack);</div><div class='add'>+int mlx5e_hwtstamp_get(struct mlx5e_priv *priv,</div><div class='add'>+		       struct kernel_hwtstamp_config *config);</div><div class='ctx'> int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool val, bool rx_filter);</div><div class='ctx'> </div><div class='ctx'> int mlx5e_vlan_rx_add_vid(struct net_device *dev, __always_unused __be16 proto,</div><div class='hunk'>@@ -1049,6 +1072,7 @@ struct mlx5e_create_cq_param {</div><div class='ctx'> 	struct mlx5e_ch_stats *ch_stats;</div><div class='ctx'> 	int node;</div><div class='ctx'> 	int ix;</div><div class='add'>+	struct mlx5_uars_page *uar;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_cq_param;</div><div class='hunk'>@@ -1135,7 +1159,9 @@ extern const struct ethtool_ops mlx5e_ethtool_ops;</div><div class='ctx'> int mlx5e_create_mkey(struct mlx5_core_dev *mdev, u32 pdn, u32 *mkey);</div><div class='ctx'> int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev, bool create_tises);</div><div class='ctx'> void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev);</div><div class='del'>-int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb,</div><div class='add'>+int mlx5e_modify_tirs_lb(struct mlx5_core_dev *mdev, bool enable_uc_lb,</div><div class='add'>+			 bool enable_mc_lb);</div><div class='add'>+int mlx5e_refresh_tirs(struct mlx5_core_dev *mdev, bool enable_uc_lb,</div><div class='ctx'> 		       bool enable_mc_lb);</div><div class='ctx'> void mlx5e_mkey_set_relaxed_ordering(struct mlx5_core_dev *mdev, void *mkc);</div><div class='ctx'> </div><div class='hunk'>@@ -1223,7 +1249,7 @@ void mlx5e_netdev_attach_nic_profile(struct mlx5e_priv *priv);</div><div class='ctx'> void mlx5e_set_netdev_mtu_boundaries(struct mlx5e_priv *priv);</div><div class='ctx'> void mlx5e_build_nic_params(struct mlx5e_priv *priv, struct mlx5e_xsk *xsk, u16 mtu);</div><div class='ctx'> </div><div class='del'>-void mlx5e_set_xdp_feature(struct net_device *netdev);</div><div class='add'>+void mlx5e_set_xdp_feature(struct mlx5e_priv *priv);</div><div class='ctx'> netdev_features_t mlx5e_features_check(struct sk_buff *skb,</div><div class='ctx'> 				       struct net_device *netdev,</div><div class='ctx'> 				       netdev_features_t features);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h b/drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h<br/>index b59aee75de94..2c98a5299df3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h</a></div><div class='hunk'>@@ -26,7 +26,6 @@ struct mlx5e_dcbx {</div><div class='ctx'> 	u8                         cap;</div><div class='ctx'> </div><div class='ctx'> 	/* Buffer configuration */</div><div class='del'>-	bool                       manual_buffer;</div><div class='ctx'> 	u32                        cable_len;</div><div class='ctx'> 	u32                        xoff;</div><div class='ctx'> 	u16                        port_buff_cell_sz;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c<br/>index 0b1ac6e5c890..8818f65d1fbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c</a></div><div class='hunk'>@@ -40,11 +40,8 @@ void mlx5e_destroy_devlink(struct mlx5e_dev *mlx5e_dev)</div><div class='ctx'> static void</div><div class='ctx'> mlx5e_devlink_get_port_parent_id(struct mlx5_core_dev *dev, struct netdev_phys_item_id *ppid)</div><div class='ctx'> {</div><div class='del'>-	u64 parent_id;</div><div class='del'>-</div><div class='del'>-	parent_id = mlx5_query_nic_system_image_guid(dev);</div><div class='del'>-	ppid-&gt;id_len = sizeof(parent_id);</div><div class='del'>-	memcpy(ppid-&gt;id, &amp;parent_id, sizeof(parent_id));</div><div class='add'>+	BUILD_BUG_ON(MLX5_SW_IMAGE_GUID_MAX_BYTES &gt; MAX_PHYS_ITEM_ID_LEN);</div><div class='add'>+	mlx5_query_nic_sw_system_image_guid(dev, ppid-&gt;id, &amp;ppid-&gt;id_len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5e_devlink_port_register(struct mlx5e_dev *mlx5e_dev,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h b/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h<br/>index 1e8b7d330701..c3408b3f7010 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/fs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/fs.h</a></div><div class='hunk'>@@ -18,7 +18,8 @@ enum {</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='ctx'> 	MLX5E_TC_PRIO = 0,</div><div class='del'>-	MLX5E_NIC_PRIO</div><div class='add'>+	MLX5E_PROMISC_PRIO,</div><div class='add'>+	MLX5E_NIC_PRIO,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_flow_table {</div><div class='hunk'>@@ -56,7 +57,7 @@ struct mlx5e_l2_table {</div><div class='ctx'> 	bool                       promisc_enabled;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define MLX5E_NUM_INDIR_TIRS (MLX5_NUM_TT - 1)</div><div class='add'>+#define MLX5E_NUM_INDIR_TIRS (MLX5_NUM_INDIR_TIRS)</div><div class='ctx'> </div><div class='ctx'> #define MLX5_HASH_IP		(MLX5_HASH_FIELD_SEL_SRC_IP   |\</div><div class='ctx'> 				 MLX5_HASH_FIELD_SEL_DST_IP)</div><div class='hunk'>@@ -68,9 +69,13 @@ struct mlx5e_l2_table {</div><div class='ctx'> 				 MLX5_HASH_FIELD_SEL_DST_IP   |\</div><div class='ctx'> 				 MLX5_HASH_FIELD_SEL_IPSEC_SPI)</div><div class='ctx'> </div><div class='del'>-/* NIC prio FTS */</div><div class='add'>+/* NIC promisc FT level */</div><div class='ctx'> enum {</div><div class='ctx'> 	MLX5E_PROMISC_FT_LEVEL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* NIC prio FTS */</div><div class='add'>+enum {</div><div class='ctx'> 	MLX5E_VLAN_FT_LEVEL,</div><div class='ctx'> 	MLX5E_L2_FT_LEVEL,</div><div class='ctx'> 	MLX5E_TTC_FT_LEVEL,</div><div class='hunk'>@@ -83,10 +88,11 @@ enum {</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_ARFS</div><div class='ctx'> 	MLX5E_ARFS_FT_LEVEL = MLX5E_INNER_TTC_FT_LEVEL + 1,</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_MLX5_EN_IPSEC</div><div class='del'>-	MLX5E_ACCEL_FS_POL_FT_LEVEL = MLX5E_INNER_TTC_FT_LEVEL + 1,</div><div class='del'>-	MLX5E_ACCEL_FS_ESP_FT_LEVEL,</div><div class='add'>+#if defined(CONFIG_MLX5_EN_IPSEC) || defined(CONFIG_MLX5_EN_PSP)</div><div class='add'>+	MLX5E_ACCEL_FS_ESP_FT_LEVEL = MLX5E_INNER_TTC_FT_LEVEL + 1,</div><div class='ctx'> 	MLX5E_ACCEL_FS_ESP_FT_ERR_LEVEL,</div><div class='add'>+	MLX5E_ACCEL_FS_POL_FT_LEVEL,</div><div class='add'>+	MLX5E_ACCEL_FS_POL_MISS_FT_LEVEL,</div><div class='ctx'> 	MLX5E_ACCEL_FS_ESP_FT_ROCE_LEVEL,</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='hunk'>@@ -126,7 +132,8 @@ struct mlx5e_ptp_fs;</div><div class='ctx'> </div><div class='ctx'> void mlx5e_set_ttc_params(struct mlx5e_flow_steering *fs,</div><div class='ctx'> 			  struct mlx5e_rx_res *rx_res,</div><div class='del'>-			  struct ttc_params *ttc_params, bool tunnel);</div><div class='add'>+			  struct ttc_params *ttc_params, bool tunnel,</div><div class='add'>+			  bool ipsec_rss);</div><div class='ctx'> </div><div class='ctx'> void mlx5e_destroy_ttc_table(struct mlx5e_flow_steering *fs);</div><div class='ctx'> int mlx5e_create_ttc_table(struct mlx5e_flow_steering  *fs,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/fs_ethtool.h b/drivers/net/ethernet/mellanox/mlx5/core/en/fs_ethtool.h<br/>index 9e276fd3c0cf..c21fe36527a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/fs_ethtool.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/fs_ethtool.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/fs_ethtool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/fs_ethtool.h</a></div><div class='hunk'>@@ -11,6 +11,11 @@ int mlx5e_ethtool_alloc(struct mlx5e_ethtool_steering **ethtool);</div><div class='ctx'> void mlx5e_ethtool_free(struct mlx5e_ethtool_steering *ethtool);</div><div class='ctx'> void mlx5e_ethtool_init_steering(struct mlx5e_flow_steering *fs);</div><div class='ctx'> void mlx5e_ethtool_cleanup_steering(struct mlx5e_flow_steering *fs);</div><div class='add'>+int mlx5e_ethtool_set_rxfh_fields(struct mlx5e_priv *priv,</div><div class='add'>+				  const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+				  struct netlink_ext_ack *extack);</div><div class='add'>+int mlx5e_ethtool_get_rxfh_fields(struct mlx5e_priv *priv,</div><div class='add'>+				  struct ethtool_rxfh_fields *nfc);</div><div class='ctx'> int mlx5e_ethtool_set_rxnfc(struct mlx5e_priv *priv, struct ethtool_rxnfc *cmd);</div><div class='ctx'> int mlx5e_ethtool_get_rxnfc(struct mlx5e_priv *priv,</div><div class='ctx'> 			    struct ethtool_rxnfc *info, u32 *rule_locs);</div><div class='hunk'>@@ -20,6 +25,15 @@ static inline int mlx5e_ethtool_alloc(struct mlx5e_ethtool_steering **ethtool)</div><div class='ctx'> static inline void mlx5e_ethtool_free(struct mlx5e_ethtool_steering *ethtool) { }</div><div class='ctx'> static inline void mlx5e_ethtool_init_steering(struct mlx5e_flow_steering *fs) { }</div><div class='ctx'> static inline void mlx5e_ethtool_cleanup_steering(struct mlx5e_flow_steering *fs) { }</div><div class='add'>+static inline int</div><div class='add'>+mlx5e_ethtool_set_rxfh_fields(struct mlx5e_priv *priv,</div><div class='add'>+			      const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{ return -EOPNOTSUPP; }</div><div class='add'>+static inline int</div><div class='add'>+mlx5e_ethtool_get_rxfh_fields(struct mlx5e_priv *priv,</div><div class='add'>+			      struct ethtool_rxfh_fields *nfc)</div><div class='add'>+{ return -EOPNOTSUPP; }</div><div class='ctx'> static inline int mlx5e_ethtool_set_rxnfc(struct mlx5e_priv *priv, struct ethtool_rxnfc *cmd)</div><div class='ctx'> { return -EOPNOTSUPP; }</div><div class='ctx'> static inline int mlx5e_ethtool_get_rxnfc(struct mlx5e_priv *priv,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/health.c b/drivers/net/ethernet/mellanox/mlx5/core/en/health.c<br/>index 81523825faa2..cb972b2d46e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/health.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/health.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/health.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/health.c</a></div><div class='hunk'>@@ -114,6 +114,7 @@ int mlx5e_health_recover_channels(struct mlx5e_priv *priv)</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(priv-&gt;netdev);</div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(MLX5E_STATE_OPENED, &amp;priv-&gt;state))</div><div class='hunk'>@@ -123,6 +124,7 @@ int mlx5e_health_recover_channels(struct mlx5e_priv *priv)</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='add'>+	netdev_unlock(priv-&gt;netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c<br/>index b4f3bd7d346e..195863b2c013 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c</a></div><div class='hunk'>@@ -138,8 +138,8 @@ void mlx5e_hv_vhca_stats_create(struct mlx5e_priv *priv)</div><div class='ctx'> 	if (IS_ERR_OR_NULL(agent)) {</div><div class='ctx'> 		if (IS_ERR(agent))</div><div class='ctx'> 			netdev_warn(priv-&gt;netdev,</div><div class='del'>-				    "Failed to create hv vhca stats agent, err = %ld\n",</div><div class='del'>-				    PTR_ERR(agent));</div><div class='add'>+				    "Failed to create hv vhca stats agent, err = %pe\n",</div><div class='add'>+				    agent);</div><div class='ctx'> </div><div class='ctx'> 		kvfree(priv-&gt;stats_agent.buf);</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.c b/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.c<br/>index 4e72ca8070e2..1de18c7e96ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/mapping.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/mapping.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/xarray.h&gt;</div><div class='ctx'> #include &lt;linux/hashtable.h&gt;</div><div class='ctx'> #include &lt;linux/refcount.h&gt;</div><div class='add'>+#include &lt;linux/mlx5/driver.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mapping.h"</div><div class='ctx'> </div><div class='hunk'>@@ -24,7 +25,8 @@ struct mapping_ctx {</div><div class='ctx'> 	struct delayed_work dwork;</div><div class='ctx'> 	struct list_head pending_list;</div><div class='ctx'> 	spinlock_t pending_list_lock; /* Guards pending list */</div><div class='del'>-	u64 id;</div><div class='add'>+	u8 id[MLX5_SW_IMAGE_GUID_MAX_BYTES];</div><div class='add'>+	u8 id_len;</div><div class='ctx'> 	u8 type;</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> 	refcount_t refcount;</div><div class='hunk'>@@ -220,13 +222,15 @@ mapping_create(size_t data_size, u32 max_id, bool delayed_removal)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct mapping_ctx *</div><div class='del'>-mapping_create_for_id(u64 id, u8 type, size_t data_size, u32 max_id, bool delayed_removal)</div><div class='add'>+mapping_create_for_id(u8 *id, u8 id_len, u8 type, size_t data_size, u32 max_id,</div><div class='add'>+		      bool delayed_removal)</div><div class='ctx'> {</div><div class='ctx'> 	struct mapping_ctx *ctx;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;shared_ctx_lock);</div><div class='ctx'> 	list_for_each_entry(ctx, &amp;shared_ctx_list, list) {</div><div class='del'>-		if (ctx-&gt;id == id &amp;&amp; ctx-&gt;type == type) {</div><div class='add'>+		if (ctx-&gt;type == type &amp;&amp; ctx-&gt;id_len == id_len &amp;&amp;</div><div class='add'>+		    !memcmp(id, ctx-&gt;id, id_len)) {</div><div class='ctx'> 			if (refcount_inc_not_zero(&amp;ctx-&gt;refcount))</div><div class='ctx'> 				goto unlock;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -237,7 +241,8 @@ mapping_create_for_id(u64 id, u8 type, size_t data_size, u32 max_id, bool delaye</div><div class='ctx'> 	if (IS_ERR(ctx))</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;id = id;</div><div class='add'>+	memcpy(ctx-&gt;id, id, id_len);</div><div class='add'>+	ctx-&gt;id_len = id_len;</div><div class='ctx'> 	ctx-&gt;type = type;</div><div class='ctx'> 	list_add(&amp;ctx-&gt;list, &amp;shared_ctx_list);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.h b/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.h<br/>index 4e2119f0f4c1..e86a103d58b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/mapping.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/mapping.h</a></div><div class='hunk'>@@ -27,6 +27,7 @@ void mapping_destroy(struct mapping_ctx *ctx);</div><div class='ctx'> /* adds mapping with an id or get an existing mapping with the same id</div><div class='ctx'>  */</div><div class='ctx'> struct mapping_ctx *</div><div class='del'>-mapping_create_for_id(u64 id, u8 type, size_t data_size, u32 max_id, bool delayed_removal);</div><div class='add'>+mapping_create_for_id(u8 *id, u8 id_len, u8 type, size_t data_size, u32 max_id,</div><div class='add'>+		      bool delayed_removal);</div><div class='ctx'> </div><div class='ctx'> #endif /* __MLX5_MAPPING_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c<br/>index 64b62ed17b07..c9bdee9a8b30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/params.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/params.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/params.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/params.c</a></div><div class='hunk'>@@ -6,10 +6,14 @@</div><div class='ctx'> #include "en/port.h"</div><div class='ctx'> #include "en_accel/en_accel.h"</div><div class='ctx'> #include "en_accel/ipsec.h"</div><div class='add'>+#include "en_accel/psp.h"</div><div class='ctx'> #include &lt;linux/dim.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/types.h&gt;</div><div class='ctx'> #include &lt;net/xdp_sock_drv.h&gt;</div><div class='ctx'> </div><div class='add'>+#define MLX5_MPWRQ_MAX_LOG_WQE_SZ 18</div><div class='add'>+#define MLX5_REP_MPWRQ_MAX_LOG_WQE_SZ 17</div><div class='add'>+</div><div class='ctx'> static u8 mlx5e_mpwrq_min_page_shift(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	u8 min_page_shift = MLX5_CAP_GEN_2(mdev, log_min_mkey_entity_size);</div><div class='hunk'>@@ -96,25 +100,29 @@ u8 mlx5e_mpwrq_umr_entry_size(enum mlx5e_mpwrq_umr_mode mode)</div><div class='ctx'> 		return sizeof(struct mlx5_ksm) * 4;</div><div class='ctx'> 	}</div><div class='ctx'> 	WARN_ONCE(1, "MPWRQ UMR mode %d is not known\n", mode);</div><div class='del'>-	return 0;</div><div class='add'>+	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u8 mlx5e_mpwrq_log_wqe_sz(struct mlx5_core_dev *mdev, u8 page_shift,</div><div class='ctx'> 			  enum mlx5e_mpwrq_umr_mode umr_mode)</div><div class='ctx'> {</div><div class='ctx'> 	u8 umr_entry_size = mlx5e_mpwrq_umr_entry_size(umr_mode);</div><div class='del'>-	u8 max_pages_per_wqe, max_log_mpwqe_size;</div><div class='add'>+	u8 max_pages_per_wqe, max_log_wqe_size_calc;</div><div class='add'>+	u8 max_log_wqe_size_cap;</div><div class='ctx'> 	u16 max_wqe_size;</div><div class='ctx'> </div><div class='ctx'> 	/* Keep in sync with MLX5_MPWRQ_MAX_PAGES_PER_WQE. */</div><div class='ctx'> 	max_wqe_size = mlx5e_get_max_sq_aligned_wqebbs(mdev) * MLX5_SEND_WQE_BB;</div><div class='ctx'> 	max_pages_per_wqe = ALIGN_DOWN(max_wqe_size - sizeof(struct mlx5e_umr_wqe),</div><div class='ctx'> 				       MLX5_UMR_FLEX_ALIGNMENT) / umr_entry_size;</div><div class='del'>-	max_log_mpwqe_size = ilog2(max_pages_per_wqe) + page_shift;</div><div class='add'>+	max_log_wqe_size_calc = ilog2(max_pages_per_wqe) + page_shift;</div><div class='ctx'> </div><div class='del'>-	WARN_ON_ONCE(max_log_mpwqe_size &lt; MLX5E_ORDER2_MAX_PACKET_MTU);</div><div class='add'>+	WARN_ON_ONCE(max_log_wqe_size_calc &lt; MLX5E_ORDER2_MAX_PACKET_MTU);</div><div class='ctx'> </div><div class='del'>-	return min_t(u8, max_log_mpwqe_size, MLX5_MPWRQ_MAX_LOG_WQE_SZ);</div><div class='add'>+	max_log_wqe_size_cap = mlx5_core_is_ecpf(mdev) ?</div><div class='add'>+			   MLX5_REP_MPWRQ_MAX_LOG_WQE_SZ : MLX5_MPWRQ_MAX_LOG_WQE_SZ;</div><div class='add'>+</div><div class='add'>+	return min_t(u8, max_log_wqe_size_calc, max_log_wqe_size_cap);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u8 mlx5e_mpwrq_pages_per_wqe(struct mlx5_core_dev *mdev, u8 page_shift,</div><div class='hunk'>@@ -407,25 +415,10 @@ u8 mlx5e_mpwqe_get_log_rq_size(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	return params-&gt;log_rq_mtu_frames - log_pkts_per_wqe;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u8 mlx5e_shampo_get_log_hd_entry_size(struct mlx5_core_dev *mdev,</div><div class='del'>-				      struct mlx5e_params *params)</div><div class='add'>+static u8 mlx5e_shampo_get_log_pkt_per_rsrv(struct mlx5e_params *params)</div><div class='ctx'> {</div><div class='del'>-	return order_base_2(DIV_ROUND_UP(MLX5E_RX_MAX_HEAD, MLX5E_SHAMPO_WQ_BASE_HEAD_ENTRY_SIZE));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u8 mlx5e_shampo_get_log_rsrv_size(struct mlx5_core_dev *mdev,</div><div class='del'>-				  struct mlx5e_params *params)</div><div class='del'>-{</div><div class='del'>-	return order_base_2(MLX5E_SHAMPO_WQ_RESRV_SIZE / MLX5E_SHAMPO_WQ_BASE_RESRV_SIZE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u8 mlx5e_shampo_get_log_pkt_per_rsrv(struct mlx5_core_dev *mdev,</div><div class='del'>-				     struct mlx5e_params *params)</div><div class='del'>-{</div><div class='del'>-	u32 resrv_size = BIT(mlx5e_shampo_get_log_rsrv_size(mdev, params)) *</div><div class='del'>-			 PAGE_SIZE;</div><div class='del'>-</div><div class='del'>-	return order_base_2(DIV_ROUND_UP(resrv_size, params-&gt;sw_mtu));</div><div class='add'>+	return order_base_2(DIV_ROUND_UP(MLX5E_SHAMPO_WQ_RESRV_SIZE,</div><div class='add'>+					 params-&gt;sw_mtu));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u8 mlx5e_mpwqe_get_log_stride_size(struct mlx5_core_dev *mdev,</div><div class='hunk'>@@ -619,6 +612,7 @@ void mlx5e_build_create_cq_param(struct mlx5e_create_cq_param *ccp, struct mlx5e</div><div class='ctx'> 		.ch_stats = c-&gt;stats,</div><div class='ctx'> 		.node = cpu_to_node(c-&gt;cpu),</div><div class='ctx'> 		.ix = c-&gt;vec_ix,</div><div class='add'>+		.uar = c-&gt;bfreg-&gt;up,</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -818,7 +812,7 @@ static void mlx5e_build_common_cq_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> {</div><div class='ctx'> 	void *cqc = param-&gt;cqc;</div><div class='ctx'> </div><div class='del'>-	MLX5_SET(cqc, cqc, uar_page, mdev-&gt;priv.uar-&gt;index);</div><div class='add'>+	MLX5_SET(cqc, cqc, uar_page, mdev-&gt;priv.bfreg.up-&gt;index);</div><div class='ctx'> 	if (MLX5_CAP_GEN(mdev, cqe_128_always) &amp;&amp; cache_line_size() &gt;= 128)</div><div class='ctx'> 		MLX5_SET(cqc, cqc, cqe_sz, CQE_STRIDE_128_PAD);</div><div class='ctx'> }</div><div class='hunk'>@@ -827,12 +821,12 @@ static u32 mlx5e_shampo_get_log_cq_size(struct mlx5_core_dev *mdev,</div><div class='ctx'> 					struct mlx5e_params *params,</div><div class='ctx'> 					struct mlx5e_xsk_param *xsk)</div><div class='ctx'> {</div><div class='del'>-	int rsrv_size = BIT(mlx5e_shampo_get_log_rsrv_size(mdev, params)) * PAGE_SIZE;</div><div class='ctx'> 	u16 num_strides = BIT(mlx5e_mpwqe_get_log_num_strides(mdev, params, xsk));</div><div class='del'>-	int pkt_per_rsrv = BIT(mlx5e_shampo_get_log_pkt_per_rsrv(mdev, params));</div><div class='ctx'> 	u8 log_stride_sz = mlx5e_mpwqe_get_log_stride_size(mdev, params, xsk);</div><div class='add'>+	int pkt_per_rsrv = BIT(mlx5e_shampo_get_log_pkt_per_rsrv(params));</div><div class='ctx'> 	int wq_size = BIT(mlx5e_mpwqe_get_log_rq_size(mdev, params, xsk));</div><div class='ctx'> 	int wqe_size = BIT(log_stride_sz) * num_strides;</div><div class='add'>+	int rsrv_size = MLX5E_SHAMPO_WQ_RESRV_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/* +1 is for the case that the pkt_per_rsrv dont consume the reservation</div><div class='ctx'> 	 * so we get a filler cqe for the rest of the reservation.</div><div class='hunk'>@@ -893,6 +887,7 @@ int mlx5e_build_rq_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> {</div><div class='ctx'> 	void *rqc = param-&gt;rqc;</div><div class='ctx'> 	void *wq = MLX5_ADDR_OF(rqc, rqc, wq);</div><div class='add'>+	u32 lro_timeout;</div><div class='ctx'> 	int ndsegs = 1;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -918,22 +913,27 @@ int mlx5e_build_rq_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> 		MLX5_SET(wq, wq, log_wqe_stride_size,</div><div class='ctx'> 			 log_wqe_stride_size - MLX5_MPWQE_LOG_STRIDE_SZ_BASE);</div><div class='ctx'> 		MLX5_SET(wq, wq, log_wq_sz, mlx5e_mpwqe_get_log_rq_size(mdev, params, xsk));</div><div class='del'>-		if (params-&gt;packet_merge.type == MLX5E_PACKET_MERGE_SHAMPO) {</div><div class='del'>-			MLX5_SET(wq, wq, shampo_enable, true);</div><div class='del'>-			MLX5_SET(wq, wq, log_reservation_size,</div><div class='del'>-				 mlx5e_shampo_get_log_rsrv_size(mdev, params));</div><div class='del'>-			MLX5_SET(wq, wq,</div><div class='del'>-				 log_max_num_of_packets_per_reservation,</div><div class='del'>-				 mlx5e_shampo_get_log_pkt_per_rsrv(mdev, params));</div><div class='del'>-			MLX5_SET(wq, wq, log_headers_entry_size,</div><div class='del'>-				 mlx5e_shampo_get_log_hd_entry_size(mdev, params));</div><div class='del'>-			MLX5_SET(rqc, rqc, reservation_timeout,</div><div class='del'>-				 mlx5e_choose_lro_timeout(mdev, MLX5E_DEFAULT_SHAMPO_TIMEOUT));</div><div class='del'>-			MLX5_SET(rqc, rqc, shampo_match_criteria_type,</div><div class='del'>-				 params-&gt;packet_merge.shampo.match_criteria_type);</div><div class='del'>-			MLX5_SET(rqc, rqc, shampo_no_match_alignment_granularity,</div><div class='del'>-				 params-&gt;packet_merge.shampo.alignment_granularity);</div><div class='del'>-		}</div><div class='add'>+		if (params-&gt;packet_merge.type != MLX5E_PACKET_MERGE_SHAMPO)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		MLX5_SET(wq, wq, shampo_enable, true);</div><div class='add'>+		MLX5_SET(wq, wq, log_reservation_size,</div><div class='add'>+			 MLX5E_SHAMPO_WQ_LOG_RESRV_SIZE -</div><div class='add'>+			 MLX5E_SHAMPO_WQ_RESRV_SIZE_BASE_SHIFT);</div><div class='add'>+		MLX5_SET(wq, wq,</div><div class='add'>+			 log_max_num_of_packets_per_reservation,</div><div class='add'>+			 mlx5e_shampo_get_log_pkt_per_rsrv(params));</div><div class='add'>+		MLX5_SET(wq, wq, log_headers_entry_size,</div><div class='add'>+			 MLX5E_SHAMPO_LOG_HEADER_ENTRY_SIZE -</div><div class='add'>+			 MLX5E_SHAMPO_WQ_BASE_HEAD_ENTRY_SIZE_SHIFT);</div><div class='add'>+		lro_timeout =</div><div class='add'>+			mlx5e_choose_lro_timeout(mdev,</div><div class='add'>+						 MLX5E_DEFAULT_SHAMPO_TIMEOUT);</div><div class='add'>+		MLX5_SET(rqc, rqc, reservation_timeout, lro_timeout);</div><div class='add'>+		MLX5_SET(rqc, rqc, shampo_match_criteria_type,</div><div class='add'>+			 MLX5_RQC_SHAMPO_MATCH_CRITERIA_TYPE_EXTENDED);</div><div class='add'>+		MLX5_SET(rqc, rqc, shampo_no_match_alignment_granularity,</div><div class='add'>+			 MLX5_RQC_SHAMPO_NO_MATCH_ALIGNMENT_GRANULARITY_STRIDE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	default: /* MLX5_WQ_TYPE_CYCLIC */</div><div class='hunk'>@@ -1005,7 +1005,8 @@ void mlx5e_build_sq_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	bool allow_swp;</div><div class='ctx'> </div><div class='ctx'> 	allow_swp = mlx5_geneve_tx_allowed(mdev) ||</div><div class='del'>-		    (mlx5_ipsec_device_caps(mdev) &amp; MLX5_IPSEC_CAP_CRYPTO);</div><div class='add'>+		    (mlx5_ipsec_device_caps(mdev) &amp; MLX5_IPSEC_CAP_CRYPTO) ||</div><div class='add'>+		    mlx5_is_psp_device(mdev);</div><div class='ctx'> 	mlx5e_build_sq_param_common(mdev, param);</div><div class='ctx'> 	MLX5_SET(wq, wq, log_wq_sz, params-&gt;log_sq_size);</div><div class='ctx'> 	MLX5_SET(sqc, sqc, allow_swp, allow_swp);</div><div class='hunk'>@@ -1036,17 +1037,17 @@ u32 mlx5e_shampo_hd_per_wqe(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			    struct mlx5e_params *params,</div><div class='ctx'> 			    struct mlx5e_rq_param *rq_param)</div><div class='ctx'> {</div><div class='del'>-	int resv_size = BIT(mlx5e_shampo_get_log_rsrv_size(mdev, params)) * PAGE_SIZE;</div><div class='ctx'> 	u16 num_strides = BIT(mlx5e_mpwqe_get_log_num_strides(mdev, params, NULL));</div><div class='del'>-	int pkt_per_resv = BIT(mlx5e_shampo_get_log_pkt_per_rsrv(mdev, params));</div><div class='ctx'> 	u8 log_stride_sz = mlx5e_mpwqe_get_log_stride_size(mdev, params, NULL);</div><div class='add'>+	int pkt_per_rsrv = BIT(mlx5e_shampo_get_log_pkt_per_rsrv(params));</div><div class='ctx'> 	int wqe_size = BIT(log_stride_sz) * num_strides;</div><div class='add'>+	int rsrv_size = MLX5E_SHAMPO_WQ_RESRV_SIZE;</div><div class='ctx'> 	u32 hd_per_wqe;</div><div class='ctx'> </div><div class='ctx'> 	/* Assumption: hd_per_wqe % 8 == 0. */</div><div class='del'>-	hd_per_wqe = (wqe_size / resv_size) * pkt_per_resv;</div><div class='del'>-	mlx5_core_dbg(mdev, "%s hd_per_wqe = %d rsrv_size = %d wqe_size = %d pkt_per_resv = %d\n",</div><div class='del'>-		      __func__, hd_per_wqe, resv_size, wqe_size, pkt_per_resv);</div><div class='add'>+	hd_per_wqe = (wqe_size / rsrv_size) * pkt_per_rsrv;</div><div class='add'>+	mlx5_core_dbg(mdev, "%s hd_per_wqe = %d rsrv_size = %d wqe_size = %d pkt_per_rsrv = %d\n",</div><div class='add'>+		      __func__, hd_per_wqe, rsrv_size, wqe_size, pkt_per_rsrv);</div><div class='ctx'> 	return hd_per_wqe;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1231,7 +1232,6 @@ static void mlx5e_build_async_icosq_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> </div><div class='ctx'> void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			     struct mlx5e_params *params,</div><div class='del'>-			     struct mlx5e_xsk_param *xsk,</div><div class='ctx'> 			     struct mlx5e_sq_param *param)</div><div class='ctx'> {</div><div class='ctx'> 	void *sqc = param-&gt;sqc;</div><div class='hunk'>@@ -1240,7 +1240,6 @@ void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	mlx5e_build_sq_param_common(mdev, param);</div><div class='ctx'> 	MLX5_SET(wq, wq, log_wq_sz, params-&gt;log_sq_size);</div><div class='ctx'> 	param-&gt;is_mpw = MLX5E_GET_PFLAG(params, MLX5E_PFLAG_XDP_TX_MPWQE);</div><div class='del'>-	param-&gt;is_xdp_mb = !mlx5e_rx_is_linear_skb(mdev, params, xsk);</div><div class='ctx'> 	mlx5e_build_tx_cq_param(mdev, params, &amp;param-&gt;cqp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1259,7 +1258,7 @@ int mlx5e_build_channel_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	async_icosq_log_wq_sz = mlx5e_build_async_icosq_log_wq_sz(mdev);</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_build_sq_param(mdev, params, &amp;cparam-&gt;txq_sq);</div><div class='del'>-	mlx5e_build_xdpsq_param(mdev, params, NULL, &amp;cparam-&gt;xdp_sq);</div><div class='add'>+	mlx5e_build_xdpsq_param(mdev, params, &amp;cparam-&gt;xdp_sq);</div><div class='ctx'> 	mlx5e_build_icosq_param(mdev, icosq_log_wq_sz, &amp;cparam-&gt;icosq);</div><div class='ctx'> 	mlx5e_build_async_icosq_param(mdev, async_icosq_log_wq_sz, &amp;cparam-&gt;async_icosq);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/params.h b/drivers/net/ethernet/mellanox/mlx5/core/en/params.h<br/>index 3f8986f9d862..00617c65fe3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/params.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/params.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/params.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/params.h</a></div><div class='hunk'>@@ -33,7 +33,6 @@ struct mlx5e_sq_param {</div><div class='ctx'> 	struct mlx5_wq_param       wq;</div><div class='ctx'> 	bool                       is_mpw;</div><div class='ctx'> 	bool                       is_tls;</div><div class='del'>-	bool                       is_xdp_mb;</div><div class='ctx'> 	u16                        stop_room;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -52,6 +51,7 @@ struct mlx5e_create_sq_param {</div><div class='ctx'> 	u32                         tisn;</div><div class='ctx'> 	u8                          tis_lst_sz;</div><div class='ctx'> 	u8                          min_inline_mode;</div><div class='add'>+	u32                         uar_page;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Striding RQ dynamic parameters */</div><div class='hunk'>@@ -96,12 +96,6 @@ bool mlx5e_rx_mpwqe_is_linear_skb(struct mlx5_core_dev *mdev,</div><div class='ctx'> u8 mlx5e_mpwqe_get_log_rq_size(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			       struct mlx5e_params *params,</div><div class='ctx'> 			       struct mlx5e_xsk_param *xsk);</div><div class='del'>-u8 mlx5e_shampo_get_log_hd_entry_size(struct mlx5_core_dev *mdev,</div><div class='del'>-				      struct mlx5e_params *params);</div><div class='del'>-u8 mlx5e_shampo_get_log_rsrv_size(struct mlx5_core_dev *mdev,</div><div class='del'>-				  struct mlx5e_params *params);</div><div class='del'>-u8 mlx5e_shampo_get_log_pkt_per_rsrv(struct mlx5_core_dev *mdev,</div><div class='del'>-				     struct mlx5e_params *params);</div><div class='ctx'> u32 mlx5e_shampo_hd_per_wqe(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			    struct mlx5e_params *params,</div><div class='ctx'> 			    struct mlx5e_rq_param *rq_param);</div><div class='hunk'>@@ -139,7 +133,6 @@ void mlx5e_build_tx_cq_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			     struct mlx5e_cq_param *param);</div><div class='ctx'> void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			     struct mlx5e_params *params,</div><div class='del'>-			     struct mlx5e_xsk_param *xsk,</div><div class='ctx'> 			     struct mlx5e_sq_param *param);</div><div class='ctx'> int mlx5e_build_channel_param(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			      struct mlx5e_params *params,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c b/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c<br/>new file mode 100644<br/>index 000000000000..2eb666a46f39<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c</a></div><div class='hunk'>@@ -0,0 +1,376 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+// Copyright (c) 2025, NVIDIA CORPORATION &amp; AFFILIATES.</div><div class='add'>+</div><div class='add'>+#include "../devlink.h"</div><div class='add'>+#include "en.h"</div><div class='add'>+#include "pcie_cong_event.h"</div><div class='add'>+</div><div class='add'>+#define MLX5E_CONG_HIGH_STATE 0x7</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	MLX5E_INBOUND_CONG  = BIT(0),</div><div class='add'>+	MLX5E_OUTBOUND_CONG = BIT(1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_pcie_cong_thresh {</div><div class='add'>+	u16 inbound_high;</div><div class='add'>+	u16 inbound_low;</div><div class='add'>+	u16 outbound_high;</div><div class='add'>+	u16 outbound_low;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_pcie_cong_stats {</div><div class='add'>+	u32 pci_bw_inbound_high;</div><div class='add'>+	u32 pci_bw_inbound_low;</div><div class='add'>+	u32 pci_bw_outbound_high;</div><div class='add'>+	u32 pci_bw_outbound_low;</div><div class='add'>+	u32 pci_bw_stale_event;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_pcie_cong_event {</div><div class='add'>+	u64 obj_id;</div><div class='add'>+</div><div class='add'>+	struct mlx5e_priv *priv;</div><div class='add'>+</div><div class='add'>+	/* For event notifier and workqueue. */</div><div class='add'>+	struct work_struct work;</div><div class='add'>+	struct mlx5_nb nb;</div><div class='add'>+</div><div class='add'>+	/* Stores last read state. */</div><div class='add'>+	u8 state;</div><div class='add'>+</div><div class='add'>+	/* For ethtool stats group. */</div><div class='add'>+	struct mlx5e_pcie_cong_stats stats;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static const struct counter_desc mlx5e_pcie_cong_stats_desc[] = {</div><div class='add'>+	{ MLX5E_DECLARE_STAT(struct mlx5e_pcie_cong_stats,</div><div class='add'>+			     pci_bw_inbound_high) },</div><div class='add'>+	{ MLX5E_DECLARE_STAT(struct mlx5e_pcie_cong_stats,</div><div class='add'>+			     pci_bw_inbound_low) },</div><div class='add'>+	{ MLX5E_DECLARE_STAT(struct mlx5e_pcie_cong_stats,</div><div class='add'>+			     pci_bw_outbound_high) },</div><div class='add'>+	{ MLX5E_DECLARE_STAT(struct mlx5e_pcie_cong_stats,</div><div class='add'>+			     pci_bw_outbound_low) },</div><div class='add'>+	{ MLX5E_DECLARE_STAT(struct mlx5e_pcie_cong_stats,</div><div class='add'>+			     pci_bw_stale_event) },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define NUM_PCIE_CONG_COUNTERS ARRAY_SIZE(mlx5e_pcie_cong_stats_desc)</div><div class='add'>+</div><div class='add'>+static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(pcie_cong)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;cong_event ? NUM_PCIE_CONG_COUNTERS : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(pcie_cong) {}</div><div class='add'>+</div><div class='add'>+static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(pcie_cong)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;cong_event)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; NUM_PCIE_CONG_COUNTERS; i++)</div><div class='add'>+		ethtool_puts(data, mlx5e_pcie_cong_stats_desc[i].format);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(pcie_cong)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;cong_event)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; NUM_PCIE_CONG_COUNTERS; i++) {</div><div class='add'>+		u32 ctr = MLX5E_READ_CTR32_CPU(&amp;priv-&gt;cong_event-&gt;stats,</div><div class='add'>+					       mlx5e_pcie_cong_stats_desc,</div><div class='add'>+					       i);</div><div class='add'>+</div><div class='add'>+		mlx5e_ethtool_put_stat(data, ctr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MLX5E_DEFINE_STATS_GRP(pcie_cong, 0);</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_cmd_pcie_cong_event_set(struct mlx5_core_dev *dev,</div><div class='add'>+			     const struct mlx5e_pcie_cong_thresh *config,</div><div class='add'>+			     u64 *obj_id)</div><div class='add'>+{</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(pcie_cong_event_cmd_in)] = {};</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];</div><div class='add'>+	void *cong_obj;</div><div class='add'>+	void *hdr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hdr = MLX5_ADDR_OF(pcie_cong_event_cmd_in, in, hdr);</div><div class='add'>+	cong_obj = MLX5_ADDR_OF(pcie_cong_event_cmd_in, in, cong_obj);</div><div class='add'>+</div><div class='add'>+	MLX5_SET(general_obj_in_cmd_hdr, hdr, opcode,</div><div class='add'>+		 MLX5_CMD_OP_CREATE_GENERAL_OBJECT);</div><div class='add'>+</div><div class='add'>+	MLX5_SET(general_obj_in_cmd_hdr, hdr, obj_type,</div><div class='add'>+		 MLX5_GENERAL_OBJECT_TYPES_PCIE_CONG_EVENT);</div><div class='add'>+</div><div class='add'>+	MLX5_SET(pcie_cong_event_obj, cong_obj, inbound_event_en, 1);</div><div class='add'>+	MLX5_SET(pcie_cong_event_obj, cong_obj, outbound_event_en, 1);</div><div class='add'>+</div><div class='add'>+	MLX5_SET(pcie_cong_event_obj, cong_obj,</div><div class='add'>+		 inbound_cong_high_threshold, config-&gt;inbound_high);</div><div class='add'>+	MLX5_SET(pcie_cong_event_obj, cong_obj,</div><div class='add'>+		 inbound_cong_low_threshold, config-&gt;inbound_low);</div><div class='add'>+</div><div class='add'>+	MLX5_SET(pcie_cong_event_obj, cong_obj,</div><div class='add'>+		 outbound_cong_high_threshold, config-&gt;outbound_high);</div><div class='add'>+	MLX5_SET(pcie_cong_event_obj, cong_obj,</div><div class='add'>+		 outbound_cong_low_threshold, config-&gt;outbound_low);</div><div class='add'>+</div><div class='add'>+	err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*obj_id = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);</div><div class='add'>+</div><div class='add'>+	mlx5_core_dbg(dev, "PCIe congestion event (obj_id=%llu) created. Config: in: [%u, %u], out: [%u, %u]\n",</div><div class='add'>+		      *obj_id,</div><div class='add'>+		      config-&gt;inbound_high, config-&gt;inbound_low,</div><div class='add'>+		      config-&gt;outbound_high, config-&gt;outbound_low);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_pcie_cong_event_destroy(struct mlx5_core_dev *dev,</div><div class='add'>+					    u64 obj_id)</div><div class='add'>+{</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(pcie_cong_event_cmd_in)] = {};</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];</div><div class='add'>+	void *hdr;</div><div class='add'>+</div><div class='add'>+	hdr = MLX5_ADDR_OF(pcie_cong_event_cmd_in, in, hdr);</div><div class='add'>+	MLX5_SET(general_obj_in_cmd_hdr, hdr, opcode,</div><div class='add'>+		 MLX5_CMD_OP_DESTROY_GENERAL_OBJECT);</div><div class='add'>+	MLX5_SET(general_obj_in_cmd_hdr, hdr, obj_type,</div><div class='add'>+		 MLX5_GENERAL_OBJECT_TYPES_PCIE_CONG_EVENT);</div><div class='add'>+	MLX5_SET(general_obj_in_cmd_hdr, hdr, obj_id, obj_id);</div><div class='add'>+</div><div class='add'>+	return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_pcie_cong_event_query(struct mlx5_core_dev *dev,</div><div class='add'>+					  u64 obj_id,</div><div class='add'>+					  u32 *state)</div><div class='add'>+{</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(pcie_cong_event_cmd_in)] = {};</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(pcie_cong_event_cmd_out)];</div><div class='add'>+	void *obj;</div><div class='add'>+	void *hdr;</div><div class='add'>+	u8 cong;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hdr = MLX5_ADDR_OF(pcie_cong_event_cmd_in, in, hdr);</div><div class='add'>+</div><div class='add'>+	MLX5_SET(general_obj_in_cmd_hdr, hdr, opcode,</div><div class='add'>+		 MLX5_CMD_OP_QUERY_GENERAL_OBJECT);</div><div class='add'>+	MLX5_SET(general_obj_in_cmd_hdr, hdr, obj_type,</div><div class='add'>+		 MLX5_GENERAL_OBJECT_TYPES_PCIE_CONG_EVENT);</div><div class='add'>+	MLX5_SET(general_obj_in_cmd_hdr, hdr, obj_id, obj_id);</div><div class='add'>+</div><div class='add'>+	err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	obj = MLX5_ADDR_OF(pcie_cong_event_cmd_out, out, cong_obj);</div><div class='add'>+</div><div class='add'>+	if (state) {</div><div class='add'>+		cong = MLX5_GET(pcie_cong_event_obj, obj, inbound_cong_state);</div><div class='add'>+		if (cong == MLX5E_CONG_HIGH_STATE)</div><div class='add'>+			*state |= MLX5E_INBOUND_CONG;</div><div class='add'>+</div><div class='add'>+		cong = MLX5_GET(pcie_cong_event_obj, obj, outbound_cong_state);</div><div class='add'>+		if (cong == MLX5E_CONG_HIGH_STATE)</div><div class='add'>+			*state |= MLX5E_OUTBOUND_CONG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_pcie_cong_event_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_pcie_cong_event *cong_event;</div><div class='add'>+	struct mlx5_core_dev *dev;</div><div class='add'>+	struct mlx5e_priv *priv;</div><div class='add'>+	u32 new_cong_state = 0;</div><div class='add'>+	u32 changes;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cong_event = container_of(work, struct mlx5e_pcie_cong_event, work);</div><div class='add'>+	priv = cong_event-&gt;priv;</div><div class='add'>+	dev = priv-&gt;mdev;</div><div class='add'>+</div><div class='add'>+	err = mlx5_cmd_pcie_cong_event_query(dev, cong_event-&gt;obj_id,</div><div class='add'>+					     &amp;new_cong_state);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_warn(dev, "Error %d when querying PCIe cong event object (obj_id=%llu).\n",</div><div class='add'>+			       err, cong_event-&gt;obj_id);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	changes = cong_event-&gt;state ^ new_cong_state;</div><div class='add'>+	if (!changes) {</div><div class='add'>+		cong_event-&gt;stats.pci_bw_stale_event++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cong_event-&gt;state = new_cong_state;</div><div class='add'>+</div><div class='add'>+	if (changes &amp; MLX5E_INBOUND_CONG) {</div><div class='add'>+		if (new_cong_state &amp; MLX5E_INBOUND_CONG)</div><div class='add'>+			cong_event-&gt;stats.pci_bw_inbound_high++;</div><div class='add'>+		else</div><div class='add'>+			cong_event-&gt;stats.pci_bw_inbound_low++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (changes &amp; MLX5E_OUTBOUND_CONG) {</div><div class='add'>+		if (new_cong_state &amp; MLX5E_OUTBOUND_CONG)</div><div class='add'>+			cong_event-&gt;stats.pci_bw_outbound_high++;</div><div class='add'>+		else</div><div class='add'>+			cong_event-&gt;stats.pci_bw_outbound_low++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5e_pcie_cong_event_handler(struct notifier_block *nb,</div><div class='add'>+					 unsigned long event, void *eqe)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_pcie_cong_event *cong_event;</div><div class='add'>+</div><div class='add'>+	cong_event = mlx5_nb_cof(nb, struct mlx5e_pcie_cong_event, nb);</div><div class='add'>+	queue_work(cong_event-&gt;priv-&gt;wq, &amp;cong_event-&gt;work);</div><div class='add'>+</div><div class='add'>+	return NOTIFY_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5e_pcie_cong_get_thresh_config(struct mlx5_core_dev *dev,</div><div class='add'>+				  struct mlx5e_pcie_cong_thresh *config)</div><div class='add'>+{</div><div class='add'>+	u32 ids[4] = {</div><div class='add'>+		MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_LOW,</div><div class='add'>+		MLX5_DEVLINK_PARAM_ID_PCIE_CONG_IN_HIGH,</div><div class='add'>+		MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_LOW,</div><div class='add'>+		MLX5_DEVLINK_PARAM_ID_PCIE_CONG_OUT_HIGH,</div><div class='add'>+	};</div><div class='add'>+	struct devlink *devlink = priv_to_devlink(dev);</div><div class='add'>+	union devlink_param_value val[4];</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; 4; i++) {</div><div class='add'>+		u32 id = ids[i];</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = devl_param_driverinit_value_get(devlink, id, &amp;val[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;inbound_low = val[0].vu16;</div><div class='add'>+	config-&gt;inbound_high = val[1].vu16;</div><div class='add'>+	config-&gt;outbound_low = val[2].vu16;</div><div class='add'>+	config-&gt;outbound_high = val[3].vu16;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5e_thresh_config_validate(struct mlx5_core_dev *mdev,</div><div class='add'>+			     const struct mlx5e_pcie_cong_thresh *config)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (config-&gt;inbound_low &gt;= config-&gt;inbound_high) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		mlx5_core_err(mdev, "PCIe inbound congestion threshold configuration invalid: low (%u) &gt;= high (%u).\n",</div><div class='add'>+			      config-&gt;inbound_low, config-&gt;inbound_high);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (config-&gt;outbound_low &gt;= config-&gt;outbound_high) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		mlx5_core_err(mdev, "PCIe outbound congestion threshold configuration invalid: low (%u) &gt;= high (%u).\n",</div><div class='add'>+			      config-&gt;outbound_low, config-&gt;outbound_high);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5e_pcie_cong_event_init(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_pcie_cong_thresh thresh_config = {};</div><div class='add'>+	struct mlx5e_pcie_cong_event *cong_event;</div><div class='add'>+	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mlx5_pcie_cong_event_supported(mdev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = mlx5e_pcie_cong_get_thresh_config(mdev, &amp;thresh_config);</div><div class='add'>+	if (WARN_ON(err))</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mlx5e_thresh_config_validate(mdev, &amp;thresh_config);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_err(mdev, "PCIe congestion event feature disabled\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cong_event = kvzalloc_node(sizeof(*cong_event), GFP_KERNEL,</div><div class='add'>+				   mdev-&gt;priv.numa_node);</div><div class='add'>+	if (!cong_event)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;cong_event-&gt;work, mlx5e_pcie_cong_event_work);</div><div class='add'>+	MLX5_NB_INIT(&amp;cong_event-&gt;nb, mlx5e_pcie_cong_event_handler,</div><div class='add'>+		     OBJECT_CHANGE);</div><div class='add'>+</div><div class='add'>+	cong_event-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	err = mlx5_cmd_pcie_cong_event_set(mdev, &amp;thresh_config,</div><div class='add'>+					   &amp;cong_event-&gt;obj_id);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_warn(mdev, "Error creating a PCIe congestion event object\n");</div><div class='add'>+		goto err_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mlx5_eq_notifier_register(mdev, &amp;cong_event-&gt;nb);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_warn(mdev, "Error registering notifier for the PCIe congestion event\n");</div><div class='add'>+		goto err_obj_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;cong_event = cong_event;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_obj_destroy:</div><div class='add'>+	mlx5_cmd_pcie_cong_event_destroy(mdev, cong_event-&gt;obj_id);</div><div class='add'>+err_free:</div><div class='add'>+	kvfree(cong_event);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5e_pcie_cong_event_cleanup(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_pcie_cong_event *cong_event = priv-&gt;cong_event;</div><div class='add'>+	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='add'>+</div><div class='add'>+	if (!cong_event)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	priv-&gt;cong_event = NULL;</div><div class='add'>+</div><div class='add'>+	mlx5_eq_notifier_unregister(mdev, &amp;cong_event-&gt;nb);</div><div class='add'>+	cancel_work_sync(&amp;cong_event-&gt;work);</div><div class='add'>+</div><div class='add'>+	if (mlx5_cmd_pcie_cong_event_destroy(mdev, cong_event-&gt;obj_id))</div><div class='add'>+		mlx5_core_warn(mdev, "Error destroying PCIe congestion event (obj_id=%llu)\n",</div><div class='add'>+			       cong_event-&gt;obj_id);</div><div class='add'>+</div><div class='add'>+	kvfree(cong_event);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.h b/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.h<br/>new file mode 100644<br/>index 000000000000..b1ea46bf648a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.h</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2025, NVIDIA CORPORATION &amp; AFFILIATES. */</div><div class='add'>+</div><div class='add'>+#ifndef __MLX5_PCIE_CONG_EVENT_H__</div><div class='add'>+#define __MLX5_PCIE_CONG_EVENT_H__</div><div class='add'>+</div><div class='add'>+int mlx5e_pcie_cong_event_init(struct mlx5e_priv *priv);</div><div class='add'>+void mlx5e_pcie_cong_event_cleanup(struct mlx5e_priv *priv);</div><div class='add'>+</div><div class='add'>+#endif /* __MLX5_PCIE_CONG_EVENT_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/port.c b/drivers/net/ethernet/mellanox/mlx5/core/en/port.c<br/>index 5f6a0605e4ae..6049ccf475bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/port.c</a></div><div class='hunk'>@@ -80,6 +80,7 @@ int mlx5_port_set_eth_ptys(struct mlx5_core_dev *dev, bool an_disable,</div><div class='ctx'> int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_port_eth_proto eproto;</div><div class='add'>+	const struct mlx5_link_info *info;</div><div class='ctx'> 	bool force_legacy = false;</div><div class='ctx'> 	bool ext;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -94,9 +95,13 @@ int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 	}</div><div class='del'>-	*speed = mlx5_port_ptys2speed(mdev, eproto.oper, force_legacy);</div><div class='del'>-	if (!(*speed))</div><div class='add'>+	info = mlx5_port_ptys2info(mdev, eproto.oper, force_legacy);</div><div class='add'>+	if (!info) {</div><div class='add'>+		*speed = SPEED_UNKNOWN;</div><div class='ctx'> 		err = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	*speed = info-&gt;speed;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -296,11 +301,16 @@ enum mlx5e_fec_supported_link_mode {</div><div class='ctx'> 	MLX5E_FEC_SUPPORTED_LINK_MODE_200G_2X,</div><div class='ctx'> 	MLX5E_FEC_SUPPORTED_LINK_MODE_400G_4X,</div><div class='ctx'> 	MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X,</div><div class='add'>+	MLX5E_FEC_SUPPORTED_LINK_MODE_200G_1X,</div><div class='add'>+	MLX5E_FEC_SUPPORTED_LINK_MODE_400G_2X,</div><div class='add'>+	MLX5E_FEC_SUPPORTED_LINK_MODE_800G_4X,</div><div class='add'>+	MLX5E_FEC_SUPPORTED_LINK_MODE_1600G_8X,</div><div class='ctx'> 	MLX5E_MAX_FEC_SUPPORTED_LINK_MODE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define MLX5E_FEC_FIRST_50G_PER_LANE_MODE MLX5E_FEC_SUPPORTED_LINK_MODE_50G_1X</div><div class='ctx'> #define MLX5E_FEC_FIRST_100G_PER_LANE_MODE MLX5E_FEC_SUPPORTED_LINK_MODE_100G_1X</div><div class='add'>+#define MLX5E_FEC_FIRST_200G_PER_LANE_MODE MLX5E_FEC_SUPPORTED_LINK_MODE_200G_1X</div><div class='ctx'> </div><div class='ctx'> #define MLX5E_FEC_OVERRIDE_ADMIN_POLICY(buf, policy, write, link)			\</div><div class='ctx'> 	do {										\</div><div class='hunk'>@@ -320,8 +330,10 @@ static bool mlx5e_is_fec_supported_link_mode(struct mlx5_core_dev *dev,</div><div class='ctx'> 	return link_mode &lt; MLX5E_FEC_FIRST_50G_PER_LANE_MODE ||</div><div class='ctx'> 	       (link_mode &lt; MLX5E_FEC_FIRST_100G_PER_LANE_MODE &amp;&amp;</div><div class='ctx'> 		MLX5_CAP_PCAM_FEATURE(dev, fec_50G_per_lane_in_pplm)) ||</div><div class='del'>-	       (link_mode &gt;= MLX5E_FEC_FIRST_100G_PER_LANE_MODE &amp;&amp;</div><div class='del'>-		MLX5_CAP_PCAM_FEATURE(dev, fec_100G_per_lane_in_pplm));</div><div class='add'>+	       (link_mode &lt; MLX5E_FEC_FIRST_200G_PER_LANE_MODE &amp;&amp;</div><div class='add'>+		MLX5_CAP_PCAM_FEATURE(dev, fec_100G_per_lane_in_pplm)) ||</div><div class='add'>+	       (link_mode &gt;= MLX5E_FEC_FIRST_200G_PER_LANE_MODE &amp;&amp;</div><div class='add'>+		MLX5_CAP_PCAM_FEATURE(dev, fec_200G_per_lane_in_pplm));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* get/set FEC admin field for a given speed */</div><div class='hunk'>@@ -368,6 +380,18 @@ static int mlx5e_fec_admin_field(u32 *pplm, u16 *fec_policy, bool write,</div><div class='ctx'> 	case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X:</div><div class='ctx'> 		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 800g_8x);</div><div class='ctx'> 		break;</div><div class='add'>+	case MLX5E_FEC_SUPPORTED_LINK_MODE_200G_1X:</div><div class='add'>+		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 200g_1x);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_2X:</div><div class='add'>+		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 400g_2x);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_4X:</div><div class='add'>+		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 800g_4x);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5E_FEC_SUPPORTED_LINK_MODE_1600G_8X:</div><div class='add'>+		MLX5E_FEC_OVERRIDE_ADMIN_POLICY(pplm, *fec_policy, write, 1600g_8x);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -421,6 +445,18 @@ static int mlx5e_get_fec_cap_field(u32 *pplm, u16 *fec_cap,</div><div class='ctx'> 	case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_8X:</div><div class='ctx'> 		*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 800g_8x);</div><div class='ctx'> 		break;</div><div class='add'>+	case MLX5E_FEC_SUPPORTED_LINK_MODE_200G_1X:</div><div class='add'>+		*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 200g_1x);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5E_FEC_SUPPORTED_LINK_MODE_400G_2X:</div><div class='add'>+		*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 400g_2x);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5E_FEC_SUPPORTED_LINK_MODE_800G_4X:</div><div class='add'>+		*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 800g_4x);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5E_FEC_SUPPORTED_LINK_MODE_1600G_8X:</div><div class='add'>+		*fec_cap = MLX5E_GET_FEC_OVERRIDE_CAP(pplm, 1600g_8x);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -494,6 +530,26 @@ out:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u16 mlx5e_remap_fec_conf_mode(enum mlx5e_fec_supported_link_mode link_mode,</div><div class='add'>+				     u16 conf_fec)</div><div class='add'>+{</div><div class='add'>+	/* RS fec in ethtool is originally mapped to MLX5E_FEC_RS_528_514.</div><div class='add'>+	 * For link modes up to 25G per lane, the value is kept.</div><div class='add'>+	 * For 50G or 100G per lane, it's remapped to MLX5E_FEC_RS_544_514.</div><div class='add'>+	 * For 200G per lane, remapped to MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD.</div><div class='add'>+	 */</div><div class='add'>+	if (conf_fec != BIT(MLX5E_FEC_RS_528_514))</div><div class='add'>+		return conf_fec;</div><div class='add'>+</div><div class='add'>+	if (link_mode &gt;= MLX5E_FEC_FIRST_200G_PER_LANE_MODE)</div><div class='add'>+		return BIT(MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD);</div><div class='add'>+</div><div class='add'>+	if (link_mode &gt;= MLX5E_FEC_FIRST_50G_PER_LANE_MODE)</div><div class='add'>+		return BIT(MLX5E_FEC_RS_544_514);</div><div class='add'>+</div><div class='add'>+	return conf_fec;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5e_set_fec_mode(struct mlx5_core_dev *dev, u16 fec_policy)</div><div class='ctx'> {</div><div class='ctx'> 	bool fec_50g_per_lane = MLX5_CAP_PCAM_FEATURE(dev, fec_50G_per_lane_in_pplm);</div><div class='hunk'>@@ -530,14 +586,7 @@ int mlx5e_set_fec_mode(struct mlx5_core_dev *dev, u16 fec_policy)</div><div class='ctx'> 		if (!mlx5e_is_fec_supported_link_mode(dev, i))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		/* RS fec in ethtool is mapped to MLX5E_FEC_RS_528_514</div><div class='del'>-		 * to link modes up to 25G per lane and to</div><div class='del'>-		 * MLX5E_FEC_RS_544_514 in the new link modes based on</div><div class='del'>-		 * 50G or 100G per lane</div><div class='del'>-		 */</div><div class='del'>-		if (conf_fec == (1 &lt;&lt; MLX5E_FEC_RS_528_514) &amp;&amp;</div><div class='del'>-		    i &gt;= MLX5E_FEC_FIRST_50G_PER_LANE_MODE)</div><div class='del'>-			conf_fec = (1 &lt;&lt; MLX5E_FEC_RS_544_514);</div><div class='add'>+		conf_fec = mlx5e_remap_fec_conf_mode(i, conf_fec);</div><div class='ctx'> </div><div class='ctx'> 		mlx5e_get_fec_cap_field(out, &amp;fec_caps, i);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/port.h b/drivers/net/ethernet/mellanox/mlx5/core/en/port.h<br/>index d1da225f35da..fa2283dd383b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/port.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/port.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/port.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/port.h</a></div><div class='hunk'>@@ -61,6 +61,7 @@ enum {</div><div class='ctx'> 	MLX5E_FEC_NOFEC,</div><div class='ctx'> 	MLX5E_FEC_FIRECODE,</div><div class='ctx'> 	MLX5E_FEC_RS_528_514,</div><div class='add'>+	MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD = 4,</div><div class='ctx'> 	MLX5E_FEC_RS_544_514 = 7,</div><div class='ctx'> 	MLX5E_FEC_LLRS_272_257_1 = 9,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c b/drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c<br/>index 8e25f4ef5ccc..4720523813b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c</a></div><div class='hunk'>@@ -272,8 +272,8 @@ static int port_update_shared_buffer(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	/* Total shared buffer size is split in a ratio of 3:1 between</div><div class='ctx'> 	 * lossy and lossless pools respectively.</div><div class='ctx'> 	 */</div><div class='del'>-	lossy_epool_size = (shared_buffer_size / 4) * 3;</div><div class='ctx'> 	lossless_ipool_size = shared_buffer_size / 4;</div><div class='add'>+	lossy_epool_size    = shared_buffer_size - lossless_ipool_size;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_port_set_sbpr(mdev, 0, MLX5_EGRESS_DIR, MLX5_LOSSY_POOL, 0,</div><div class='ctx'> 			    lossy_epool_size);</div><div class='hunk'>@@ -288,14 +288,12 @@ static int port_set_buffer(struct mlx5e_priv *priv,</div><div class='ctx'> 	u16 port_buff_cell_sz = priv-&gt;dcbx.port_buff_cell_sz;</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	int sz = MLX5_ST_SZ_BYTES(pbmc_reg);</div><div class='del'>-	u32 new_headroom_size = 0;</div><div class='del'>-	u32 current_headroom_size;</div><div class='add'>+	u32 current_headroom_cells = 0;</div><div class='add'>+	u32 new_headroom_cells = 0;</div><div class='ctx'> 	void *in;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	current_headroom_size = port_buffer-&gt;headroom_size;</div><div class='del'>-</div><div class='ctx'> 	in = kzalloc(sz, GFP_KERNEL);</div><div class='ctx'> 	if (!in)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -306,12 +304,14 @@ static int port_set_buffer(struct mlx5e_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MLX5E_MAX_NETWORK_BUFFER; i++) {</div><div class='ctx'> 		void *buffer = MLX5_ADDR_OF(pbmc_reg, in, buffer[i]);</div><div class='add'>+		current_headroom_cells += MLX5_GET(bufferx_reg, buffer, size);</div><div class='add'>+</div><div class='ctx'> 		u64 size = port_buffer-&gt;buffer[i].size;</div><div class='ctx'> 		u64 xoff = port_buffer-&gt;buffer[i].xoff;</div><div class='ctx'> 		u64 xon = port_buffer-&gt;buffer[i].xon;</div><div class='ctx'> </div><div class='del'>-		new_headroom_size += size;</div><div class='ctx'> 		do_div(size, port_buff_cell_sz);</div><div class='add'>+		new_headroom_cells += size;</div><div class='ctx'> 		do_div(xoff, port_buff_cell_sz);</div><div class='ctx'> 		do_div(xon, port_buff_cell_sz);</div><div class='ctx'> 		MLX5_SET(bufferx_reg, buffer, size, size);</div><div class='hunk'>@@ -320,10 +320,8 @@ static int port_set_buffer(struct mlx5e_priv *priv,</div><div class='ctx'> 		MLX5_SET(bufferx_reg, buffer, xon_threshold, xon);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	new_headroom_size /= port_buff_cell_sz;</div><div class='del'>-	current_headroom_size /= port_buff_cell_sz;</div><div class='del'>-	err = port_update_shared_buffer(priv-&gt;mdev, current_headroom_size,</div><div class='del'>-					new_headroom_size);</div><div class='add'>+	err = port_update_shared_buffer(priv-&gt;mdev, current_headroom_cells,</div><div class='add'>+					new_headroom_cells);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -331,6 +329,9 @@ static int port_set_buffer(struct mlx5e_priv *priv,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	/* RO bits should be set to 0 on write */</div><div class='add'>+	MLX5_SET(pbmc_reg, in, port_buffer_size, 0);</div><div class='add'>+</div><div class='ctx'> 	err = mlx5e_port_set_pbmc(mdev, in);</div><div class='ctx'> out:</div><div class='ctx'> 	kfree(in);</div><div class='hunk'>@@ -574,7 +575,6 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv,</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='del'>-	priv-&gt;dcbx.xoff = xoff;</div><div class='ctx'> </div><div class='ctx'> 	/* Apply the settings */</div><div class='ctx'> 	if (update_buffer) {</div><div class='hunk'>@@ -583,6 +583,8 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv,</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	priv-&gt;dcbx.xoff = xoff;</div><div class='add'>+</div><div class='ctx'> 	if (update_prio2buffer)</div><div class='ctx'> 		err = mlx5e_port_set_priority2buffer(priv-&gt;mdev, prio2buffer);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c b/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c<br/>index afd654583b6b..424f8a2728a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'> #include "en/fs_tt_redirect.h"</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_ptp_fs {</div><div class='ctx'> 	struct mlx5_flow_handle *l2_rule;</div><div class='hunk'>@@ -81,7 +82,7 @@ static struct mlx5e_skb_cb_hwtstamp *mlx5e_skb_cb_get_hwts(struct sk_buff *skb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_skb_cb_hwtstamp_tx(struct sk_buff *skb,</div><div class='del'>-				     struct mlx5e_ptp_cq_stats *cq_stats)</div><div class='add'>+				     struct mlx5e_ptpsq *ptpsq)</div><div class='ctx'> {</div><div class='ctx'> 	struct skb_shared_hwtstamps hwts = {};</div><div class='ctx'> 	ktime_t diff;</div><div class='hunk'>@@ -91,8 +92,17 @@ static void mlx5e_skb_cb_hwtstamp_tx(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	/* Maximal allowed diff is 1 / 128 second */</div><div class='ctx'> 	if (diff &gt; (NSEC_PER_SEC &gt;&gt; 7)) {</div><div class='del'>-		cq_stats-&gt;abort++;</div><div class='del'>-		cq_stats-&gt;abort_abs_diff_ns += diff;</div><div class='add'>+		struct mlx5e_txqsq *sq = &amp;ptpsq-&gt;txqsq;</div><div class='add'>+</div><div class='add'>+		ptpsq-&gt;cq_stats-&gt;abort++;</div><div class='add'>+		ptpsq-&gt;cq_stats-&gt;abort_abs_diff_ns += diff;</div><div class='add'>+		if (diff &gt; (NSEC_PER_SEC &gt;&gt; 1) &amp;&amp;</div><div class='add'>+		    !test_and_set_bit(MLX5E_SQ_STATE_RECOVERING, &amp;sq-&gt;state)) {</div><div class='add'>+			netdev_warn(sq-&gt;channel-&gt;netdev,</div><div class='add'>+				    "PTP TX timestamp difference between CQE and port exceeds threshold: %lld ns, recovering SQ %u\n",</div><div class='add'>+				    (s64)diff, sq-&gt;sqn);</div><div class='add'>+			queue_work(sq-&gt;priv-&gt;wq, &amp;ptpsq-&gt;report_unhealthy_work);</div><div class='add'>+		}</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -102,7 +112,7 @@ static void mlx5e_skb_cb_hwtstamp_tx(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> void mlx5e_skb_cb_hwtstamp_handler(struct sk_buff *skb, int hwtstamp_type,</div><div class='ctx'> 				   ktime_t hwtstamp,</div><div class='del'>-				   struct mlx5e_ptp_cq_stats *cq_stats)</div><div class='add'>+				   struct mlx5e_ptpsq *ptpsq)</div><div class='ctx'> {</div><div class='ctx'> 	switch (hwtstamp_type) {</div><div class='ctx'> 	case (MLX5E_SKB_CB_CQE_HWTSTAMP):</div><div class='hunk'>@@ -120,7 +130,7 @@ void mlx5e_skb_cb_hwtstamp_handler(struct sk_buff *skb, int hwtstamp_type,</div><div class='ctx'> 	    !mlx5e_skb_cb_get_hwts(skb)-&gt;port_hwtstamp)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mlx5e_skb_cb_hwtstamp_tx(skb, cq_stats);</div><div class='add'>+	mlx5e_skb_cb_hwtstamp_tx(skb, ptpsq);</div><div class='ctx'> 	memset(skb-&gt;cb, 0, sizeof(struct mlx5e_skb_cb_hwtstamp));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -208,7 +218,7 @@ static void mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq *ptpsq,</div><div class='ctx'> </div><div class='ctx'> 	hwtstamp = mlx5e_cqe_ts_to_ns(sq-&gt;ptp_cyc2time, sq-&gt;clock, get_cqe_ts(cqe));</div><div class='ctx'> 	mlx5e_skb_cb_hwtstamp_handler(skb, MLX5E_SKB_CB_PORT_HWTSTAMP,</div><div class='del'>-				      hwtstamp, ptpsq-&gt;cq_stats);</div><div class='add'>+				      hwtstamp, ptpsq);</div><div class='ctx'> 	ptpsq-&gt;cq_stats-&gt;cqe++;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_ptpsq_mark_ts_cqes_undelivered(ptpsq, hwtstamp);</div><div class='hunk'>@@ -326,21 +336,19 @@ static int mlx5e_ptp_alloc_txqsq(struct mlx5e_ptp *c, int txq_ix,</div><div class='ctx'> 	int node;</div><div class='ctx'> </div><div class='ctx'> 	sq-&gt;pdev      = c-&gt;pdev;</div><div class='del'>-	sq-&gt;clock     = &amp;mdev-&gt;clock;</div><div class='add'>+	sq-&gt;clock     = mdev-&gt;clock;</div><div class='ctx'> 	sq-&gt;mkey_be   = c-&gt;mkey_be;</div><div class='ctx'> 	sq-&gt;netdev    = c-&gt;netdev;</div><div class='ctx'> 	sq-&gt;priv      = c-&gt;priv;</div><div class='ctx'> 	sq-&gt;mdev      = mdev;</div><div class='ctx'> 	sq-&gt;ch_ix     = MLX5E_PTP_CHANNEL_IX;</div><div class='ctx'> 	sq-&gt;txq_ix    = txq_ix;</div><div class='del'>-	sq-&gt;uar_map   = mdev-&gt;mlx5e_res.hw_objs.bfreg.map;</div><div class='add'>+	sq-&gt;uar_map   = c-&gt;bfreg-&gt;map;</div><div class='ctx'> 	sq-&gt;min_inline_mode = params-&gt;tx_min_inline_mode;</div><div class='ctx'> 	sq-&gt;hw_mtu    = MLX5E_SW2HW_MTU(params, params-&gt;sw_mtu);</div><div class='ctx'> 	sq-&gt;stats     = &amp;c-&gt;priv-&gt;ptp_stats.sq[tc];</div><div class='ctx'> 	sq-&gt;ptpsq     = ptpsq;</div><div class='ctx'> 	INIT_WORK(&amp;sq-&gt;recover_work, mlx5e_tx_err_cqe_work);</div><div class='del'>-	if (!MLX5_CAP_ETH(mdev, wqe_vlan_insert))</div><div class='del'>-		set_bit(MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE, &amp;sq-&gt;state);</div><div class='ctx'> 	sq-&gt;stop_room = param-&gt;stop_room;</div><div class='ctx'> 	sq-&gt;ptp_cyc2time = mlx5_sq_ts_translator(mdev);</div><div class='ctx'> </div><div class='hunk'>@@ -449,8 +457,22 @@ static void mlx5e_ptpsq_unhealthy_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_ptpsq *ptpsq =</div><div class='ctx'> 		container_of(work, struct mlx5e_ptpsq, report_unhealthy_work);</div><div class='add'>+	struct mlx5e_txqsq *sq = &amp;ptpsq-&gt;txqsq;</div><div class='add'>+</div><div class='add'>+	/* Recovering the PTP SQ means re-enabling NAPI, which requires the</div><div class='add'>+	 * netdev instance lock. However, SQ closing has to wait for this work</div><div class='add'>+	 * task to finish while also holding the same lock. So either get the</div><div class='add'>+	 * lock or find that the SQ is no longer enabled and thus this work is</div><div class='add'>+	 * not relevant anymore.</div><div class='add'>+	 */</div><div class='add'>+	while (!netdev_trylock(sq-&gt;netdev)) {</div><div class='add'>+		if (!test_bit(MLX5E_SQ_STATE_ENABLED, &amp;sq-&gt;state))</div><div class='add'>+			return;</div><div class='add'>+		msleep(20);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_reporter_tx_ptpsq_unhealthy(ptpsq);</div><div class='add'>+	netdev_unlock(sq-&gt;netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_ptp_open_txqsq(struct mlx5e_ptp *c, u32 tisn,</div><div class='hunk'>@@ -473,6 +495,7 @@ static int mlx5e_ptp_open_txqsq(struct mlx5e_ptp *c, u32 tisn,</div><div class='ctx'> 	csp.wq_ctrl         = &amp;txqsq-&gt;wq_ctrl;</div><div class='ctx'> 	csp.min_inline_mode = txqsq-&gt;min_inline_mode;</div><div class='ctx'> 	csp.ts_cqe_to_dest_cqn = ptpsq-&gt;ts_cq.mcq.cqn;</div><div class='add'>+	csp.uar_page = c-&gt;bfreg-&gt;index;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_create_sq_rdy(c-&gt;mdev, sqp, &amp;csp, 0, &amp;txqsq-&gt;sqn);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -564,6 +587,7 @@ static int mlx5e_ptp_open_tx_cqs(struct mlx5e_ptp *c,</div><div class='ctx'> 	ccp.ch_stats = c-&gt;stats;</div><div class='ctx'> 	ccp.napi     = &amp;c-&gt;napi;</div><div class='ctx'> 	ccp.ix       = MLX5E_PTP_CHANNEL_IX;</div><div class='add'>+	ccp.uar      = c-&gt;bfreg-&gt;up;</div><div class='ctx'> </div><div class='ctx'> 	cq_param = &amp;cparams-&gt;txq_sq_param.cqp;</div><div class='ctx'> </div><div class='hunk'>@@ -613,6 +637,7 @@ static int mlx5e_ptp_open_rx_cq(struct mlx5e_ptp *c,</div><div class='ctx'> 	ccp.ch_stats = c-&gt;stats;</div><div class='ctx'> 	ccp.napi     = &amp;c-&gt;napi;</div><div class='ctx'> 	ccp.ix       = MLX5E_PTP_CHANNEL_IX;</div><div class='add'>+	ccp.uar      = c-&gt;bfreg-&gt;up;</div><div class='ctx'> </div><div class='ctx'> 	cq_param = &amp;cparams-&gt;rq_param.cqp;</div><div class='ctx'> </div><div class='hunk'>@@ -696,8 +721,8 @@ static int mlx5e_init_ptp_rq(struct mlx5e_ptp *c, struct mlx5e_params *params,</div><div class='ctx'> 	rq-&gt;pdev         = c-&gt;pdev;</div><div class='ctx'> 	rq-&gt;netdev       = priv-&gt;netdev;</div><div class='ctx'> 	rq-&gt;priv         = priv;</div><div class='del'>-	rq-&gt;clock        = &amp;mdev-&gt;clock;</div><div class='del'>-	rq-&gt;tstamp       = &amp;priv-&gt;tstamp;</div><div class='add'>+	rq-&gt;clock        = mdev-&gt;clock;</div><div class='add'>+	rq-&gt;hwtstamp_config = &amp;priv-&gt;hwtstamp_config;</div><div class='ctx'> 	rq-&gt;mdev         = mdev;</div><div class='ctx'> 	rq-&gt;hw_mtu       = MLX5E_SW2HW_MTU(params, params-&gt;sw_mtu);</div><div class='ctx'> 	rq-&gt;stats        = &amp;c-&gt;priv-&gt;ptp_stats.rq;</div><div class='hunk'>@@ -880,19 +905,19 @@ int mlx5e_ptp_open(struct mlx5e_priv *priv, struct mlx5e_params *params,</div><div class='ctx'> </div><div class='ctx'> 	c-&gt;priv     = priv;</div><div class='ctx'> 	c-&gt;mdev     = priv-&gt;mdev;</div><div class='del'>-	c-&gt;tstamp   = &amp;priv-&gt;tstamp;</div><div class='ctx'> 	c-&gt;pdev     = mlx5_core_dma_dev(priv-&gt;mdev);</div><div class='ctx'> 	c-&gt;netdev   = priv-&gt;netdev;</div><div class='ctx'> 	c-&gt;mkey_be  = cpu_to_be32(priv-&gt;mdev-&gt;mlx5e_res.hw_objs.mkey);</div><div class='ctx'> 	c-&gt;num_tc   = mlx5e_get_dcb_num_tc(params);</div><div class='ctx'> 	c-&gt;stats    = &amp;priv-&gt;ptp_stats.ch;</div><div class='ctx'> 	c-&gt;lag_port = lag_port;</div><div class='add'>+	c-&gt;bfreg    = &amp;mdev-&gt;priv.bfreg;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_ptp_set_state(c, params);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free;</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(netdev, &amp;c-&gt;napi, mlx5e_ptp_napi_poll);</div><div class='add'>+	netif_napi_add_locked(netdev, &amp;c-&gt;napi, mlx5e_ptp_napi_poll);</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_ptp_build_params(c, cparams, params);</div><div class='ctx'> </div><div class='hunk'>@@ -910,7 +935,7 @@ int mlx5e_ptp_open(struct mlx5e_priv *priv, struct mlx5e_params *params,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_napi_del:</div><div class='del'>-	netif_napi_del(&amp;c-&gt;napi);</div><div class='add'>+	netif_napi_del_locked(&amp;c-&gt;napi);</div><div class='ctx'> err_free:</div><div class='ctx'> 	kvfree(cparams);</div><div class='ctx'> 	kvfree(c);</div><div class='hunk'>@@ -920,7 +945,7 @@ err_free:</div><div class='ctx'> void mlx5e_ptp_close(struct mlx5e_ptp *c)</div><div class='ctx'> {</div><div class='ctx'> 	mlx5e_ptp_close_queues(c);</div><div class='del'>-	netif_napi_del(&amp;c-&gt;napi);</div><div class='add'>+	netif_napi_del_locked(&amp;c-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	kvfree(c);</div><div class='ctx'> }</div><div class='hunk'>@@ -929,7 +954,7 @@ void mlx5e_ptp_activate_channel(struct mlx5e_ptp *c)</div><div class='ctx'> {</div><div class='ctx'> 	int tc;</div><div class='ctx'> </div><div class='del'>-	napi_enable(&amp;c-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;c-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(MLX5E_PTP_STATE_TX, c-&gt;state)) {</div><div class='ctx'> 		for (tc = 0; tc &lt; c-&gt;num_tc; tc++)</div><div class='hunk'>@@ -957,7 +982,7 @@ void mlx5e_ptp_deactivate_channel(struct mlx5e_ptp *c)</div><div class='ctx'> 			mlx5e_deactivate_txqsq(&amp;c-&gt;ptpsq[tc].txqsq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	napi_disable(&amp;c-&gt;napi);</div><div class='add'>+	napi_disable_locked(&amp;c-&gt;napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5e_ptp_get_rqn(struct mlx5e_ptp *c, u32 *rqn)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h b/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h<br/>index 883c044852f1..2a457a2ed707 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h</a></div><div class='hunk'>@@ -64,8 +64,8 @@ struct mlx5e_ptp {</div><div class='ctx'> 	/* control */</div><div class='ctx'> 	struct mlx5e_priv         *priv;</div><div class='ctx'> 	struct mlx5_core_dev      *mdev;</div><div class='del'>-	struct hwtstamp_config    *tstamp;</div><div class='ctx'> 	DECLARE_BITMAP(state, MLX5E_PTP_STATE_NUM_STATES);</div><div class='add'>+	struct mlx5_sq_bfreg      *bfreg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline bool mlx5e_use_ptpsq(struct sk_buff *skb)</div><div class='hunk'>@@ -147,7 +147,7 @@ enum {</div><div class='ctx'> </div><div class='ctx'> void mlx5e_skb_cb_hwtstamp_handler(struct sk_buff *skb, int hwtstamp_type,</div><div class='ctx'> 				   ktime_t hwtstamp,</div><div class='del'>-				   struct mlx5e_ptp_cq_stats *cq_stats);</div><div class='add'>+				   struct mlx5e_ptpsq *ptpsq);</div><div class='ctx'> </div><div class='ctx'> void mlx5e_skb_cb_hwtstamp_init(struct sk_buff *skb);</div><div class='ctx'> #endif /* __MLX5_EN_PTP_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/en/qos.c<br/>index f0744a45db92..4e461cb03b83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/qos.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/qos.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/qos.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/qos.c</a></div><div class='hunk'>@@ -374,7 +374,7 @@ void mlx5e_reactivate_qos_sq(struct mlx5e_priv *priv, u16 qid, struct netdev_que</div><div class='ctx'> void mlx5e_reset_qdisc(struct net_device *dev, u16 qid)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_queue *dev_queue = netdev_get_tx_queue(dev, qid);</div><div class='del'>-	struct Qdisc *qdisc = dev_queue-&gt;qdisc_sleeping;</div><div class='add'>+	struct Qdisc *qdisc = rtnl_dereference(dev_queue-&gt;qdisc_sleeping);</div><div class='ctx'> </div><div class='ctx'> 	if (!qdisc)</div><div class='ctx'> 		return;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c b/drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c<br/>index 5d128c5b4529..87a2ad69526d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c</a></div><div class='hunk'>@@ -30,15 +30,11 @@ static bool mlx5_esw_bridge_dev_same_hw(struct net_device *dev, struct mlx5_eswi</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct mlx5_core_dev *mdev, *esw_mdev;</div><div class='del'>-	u64 system_guid, esw_system_guid;</div><div class='ctx'> </div><div class='ctx'> 	mdev = priv-&gt;mdev;</div><div class='ctx'> 	esw_mdev = esw-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	system_guid = mlx5_query_nic_system_image_guid(mdev);</div><div class='del'>-	esw_system_guid = mlx5_query_nic_system_image_guid(esw_mdev);</div><div class='del'>-</div><div class='del'>-	return system_guid == esw_system_guid;</div><div class='add'>+	return mlx5_same_hw_devs(mdev, esw_mdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct net_device *</div><div class='hunk'>@@ -48,15 +44,10 @@ mlx5_esw_bridge_lag_rep_get(struct net_device *dev, struct mlx5_eswitch *esw)</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> </div><div class='ctx'> 	netdev_for_each_lower_dev(dev, lower, iter) {</div><div class='del'>-		struct mlx5_core_dev *mdev;</div><div class='del'>-		struct mlx5e_priv *priv;</div><div class='del'>-</div><div class='ctx'> 		if (!mlx5e_eswitch_rep(lower))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		priv = netdev_priv(lower);</div><div class='del'>-		mdev = priv-&gt;mdev;</div><div class='del'>-		if (mlx5_lag_is_shared_fdb(mdev) &amp;&amp; mlx5_esw_bridge_dev_same_esw(lower, esw))</div><div class='add'>+		if (mlx5_esw_bridge_dev_same_esw(lower, esw))</div><div class='ctx'> 			return lower;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -125,7 +116,7 @@ static bool mlx5_esw_bridge_is_local(struct net_device *dev, struct net_device *</div><div class='ctx'> 	priv = netdev_priv(rep);</div><div class='ctx'> 	mdev = priv-&gt;mdev;</div><div class='ctx'> 	if (netif_is_lag_master(dev))</div><div class='del'>-		return mlx5_lag_is_shared_fdb(mdev) &amp;&amp; mlx5_lag_is_master(mdev);</div><div class='add'>+		return mlx5_lag_is_master(mdev);</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -455,6 +446,9 @@ static int mlx5_esw_bridge_switchdev_event(struct notifier_block *nb,</div><div class='ctx'> 	if (!rep)</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='ctx'> </div><div class='add'>+	if (netif_is_lag_master(dev) &amp;&amp; !mlx5_lag_is_shared_fdb(esw-&gt;dev))</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case SWITCHDEV_FDB_ADD_TO_BRIDGE:</div><div class='ctx'> 		fdb_info = container_of(info,</div><div class='hunk'>@@ -490,8 +484,8 @@ static int mlx5_esw_bridge_switchdev_event(struct notifier_block *nb,</div><div class='ctx'> 							       fdb_info,</div><div class='ctx'> 							       br_offloads);</div><div class='ctx'> 		if (IS_ERR(work)) {</div><div class='del'>-			WARN_ONCE(1, "Failed to init switchdev work, err=%ld",</div><div class='del'>-				  PTR_ERR(work));</div><div class='add'>+			WARN_ONCE(1, "Failed to init switchdev work, err=%pe",</div><div class='add'>+				  work);</div><div class='ctx'> 			return notifier_from_errno(PTR_ERR(work));</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -529,7 +523,8 @@ void mlx5e_rep_bridge_init(struct mlx5e_priv *priv)</div><div class='ctx'> 	br_offloads = mlx5_esw_bridge_init(esw);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> 	if (IS_ERR(br_offloads)) {</div><div class='del'>-		esw_warn(mdev, "Failed to init esw bridge (err=%ld)\n", PTR_ERR(br_offloads));</div><div class='add'>+		esw_warn(mdev, "Failed to init esw bridge (err=%pe)\n",</div><div class='add'>+			 br_offloads);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c<br/>index 25d751eba99b..0686fbdd5a05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c</a></div><div class='hunk'>@@ -170,16 +170,23 @@ static int mlx5e_rx_reporter_err_rq_cqe_recover(void *ctx)</div><div class='ctx'> static int mlx5e_rx_reporter_timeout_recover(void *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_eq_comp *eq;</div><div class='add'>+	struct mlx5e_priv *priv;</div><div class='ctx'> 	struct mlx5e_rq *rq;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	rq = ctx;</div><div class='add'>+	priv = rq-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='ctx'> 	eq = rq-&gt;cq.mcq.eq;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_health_channel_eq_recover(rq-&gt;netdev, eq, rq-&gt;cq.ch_stats);</div><div class='ctx'> 	if (err &amp;&amp; rq-&gt;icosq)</div><div class='ctx'> 		clear_bit(MLX5E_SQ_STATE_ENABLED, &amp;rq-&gt;icosq-&gt;state);</div><div class='ctx'> </div><div class='add'>+	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -311,16 +318,15 @@ mlx5e_rx_reporter_diagnose_common_ptp_config(struct mlx5e_priv *priv, struct mlx</div><div class='ctx'> 					     struct devlink_fmsg *fmsg)</div><div class='ctx'> {</div><div class='ctx'> 	mlx5e_health_fmsg_named_obj_nest_start(fmsg, "PTP");</div><div class='del'>-	devlink_fmsg_u32_pair_put(fmsg, "filter_type", priv-&gt;tstamp.rx_filter);</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "filter_type",</div><div class='add'>+				  priv-&gt;hwtstamp_config.rx_filter);</div><div class='ctx'> 	mlx5e_rx_reporter_diagnose_generic_rq(&amp;ptp_ch-&gt;rq, fmsg);</div><div class='ctx'> 	mlx5e_health_fmsg_named_obj_nest_end(fmsg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-mlx5e_rx_reporter_diagnose_common_config(struct devlink_health_reporter *reporter,</div><div class='del'>-					 struct devlink_fmsg *fmsg)</div><div class='add'>+mlx5e_rx_reporter_diagnose_common_config(struct mlx5e_priv *priv, struct devlink_fmsg *fmsg)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5e_priv *priv = devlink_health_reporter_priv(reporter);</div><div class='ctx'> 	struct mlx5e_rq *generic_rq = &amp;priv-&gt;channels.c[0]-&gt;rq;</div><div class='ctx'> 	struct mlx5e_ptp *ptp_ch = priv-&gt;channels.ptp;</div><div class='ctx'> </div><div class='hunk'>@@ -340,20 +346,100 @@ static void mlx5e_rx_reporter_build_diagnose_output_ptp_rq(struct mlx5e_rq *rq,</div><div class='ctx'> 	devlink_fmsg_obj_nest_end(fmsg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5e_rx_reporter_diagnose(struct devlink_health_reporter *reporter,</div><div class='del'>-				      struct devlink_fmsg *fmsg,</div><div class='del'>-				      struct netlink_ext_ack *extack)</div><div class='add'>+static void mlx5e_rx_reporter_diagnose_rx_res_dir_tirns(struct mlx5e_rx_res *rx_res,</div><div class='add'>+							struct devlink_fmsg *fmsg)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5e_priv *priv = devlink_health_reporter_priv(reporter);</div><div class='del'>-	struct mlx5e_ptp *ptp_ch = priv-&gt;channels.ptp;</div><div class='add'>+	unsigned int max_nch = mlx5e_rx_res_get_max_nch(rx_res);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+	devlink_fmsg_arr_pair_nest_start(fmsg, "Direct TIRs");</div><div class='ctx'> </div><div class='del'>-	if (!test_bit(MLX5E_STATE_OPENED, &amp;priv-&gt;state))</div><div class='del'>-		goto unlock;</div><div class='add'>+	for (i = 0; i &lt; max_nch; i++) {</div><div class='add'>+		devlink_fmsg_obj_nest_start(fmsg);</div><div class='add'>+</div><div class='add'>+		devlink_fmsg_u32_pair_put(fmsg, "ix", i);</div><div class='add'>+		devlink_fmsg_u32_pair_put(fmsg, "tirn", mlx5e_rx_res_get_tirn_direct(rx_res, i));</div><div class='add'>+		devlink_fmsg_u32_pair_put(fmsg, "rqtn", mlx5e_rx_res_get_rqtn_direct(rx_res, i));</div><div class='add'>+</div><div class='add'>+		devlink_fmsg_obj_nest_end(fmsg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_arr_pair_nest_end(fmsg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_rx_reporter_diagnose_rx_res_rss_tirn(struct mlx5e_rss *rss, bool inner,</div><div class='add'>+						       struct devlink_fmsg *fmsg)</div><div class='add'>+{</div><div class='add'>+	bool found_valid_tir = false;</div><div class='add'>+	int tt;</div><div class='add'>+</div><div class='add'>+	for (tt = 0; tt &lt; MLX5E_NUM_INDIR_TIRS; tt++) {</div><div class='add'>+		if (!mlx5e_rss_valid_tir(rss, tt, inner))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!found_valid_tir) {</div><div class='add'>+			char *tir_msg = inner ? "Inner TIRs Numbers" : "TIRs Numbers";</div><div class='add'>+</div><div class='add'>+			found_valid_tir = true;</div><div class='add'>+			devlink_fmsg_arr_pair_nest_start(fmsg, tir_msg);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		devlink_fmsg_obj_nest_start(fmsg);</div><div class='add'>+		devlink_fmsg_string_pair_put(fmsg, "tt", mlx5_ttc_get_name(tt));</div><div class='add'>+		devlink_fmsg_u32_pair_put(fmsg, "tirn", mlx5e_rss_get_tirn(rss, tt, inner));</div><div class='add'>+		devlink_fmsg_obj_nest_end(fmsg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (found_valid_tir)</div><div class='add'>+		devlink_fmsg_arr_pair_nest_end(fmsg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_rx_reporter_diagnose_rx_res_rss_ix(struct mlx5e_rx_res *rx_res, u32 rss_idx,</div><div class='add'>+						     struct devlink_fmsg *fmsg)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_rss *rss = mlx5e_rx_res_rss_get(rx_res, rss_idx);</div><div class='add'>+</div><div class='add'>+	if (!rss)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_obj_nest_start(fmsg);</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "Index", rss_idx);</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "rqtn", mlx5e_rss_get_rqtn(rss));</div><div class='add'>+	mlx5e_rx_reporter_diagnose_rx_res_rss_tirn(rss, false, fmsg);</div><div class='add'>+	if (mlx5e_rss_get_inner_ft_support(rss))</div><div class='add'>+		mlx5e_rx_reporter_diagnose_rx_res_rss_tirn(rss, true, fmsg);</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_obj_nest_end(fmsg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_rx_reporter_diagnose_rx_res_rss(struct mlx5e_rx_res *rx_res,</div><div class='add'>+						  struct devlink_fmsg *fmsg)</div><div class='add'>+{</div><div class='add'>+	int rss_ix;</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_arr_pair_nest_start(fmsg, "RSS");</div><div class='add'>+	for (rss_ix = 0; rss_ix &lt; MLX5E_MAX_NUM_RSS; rss_ix++)</div><div class='add'>+		mlx5e_rx_reporter_diagnose_rx_res_rss_ix(rx_res, rss_ix, fmsg);</div><div class='add'>+	devlink_fmsg_arr_pair_nest_end(fmsg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_rx_reporter_diagnose_rx_res(struct mlx5e_priv *priv,</div><div class='add'>+					      struct devlink_fmsg *fmsg)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_rx_res *rx_res = priv-&gt;rx_res;</div><div class='add'>+</div><div class='add'>+	mlx5e_health_fmsg_named_obj_nest_start(fmsg, "RX resources");</div><div class='add'>+	mlx5e_rx_reporter_diagnose_rx_res_dir_tirns(rx_res, fmsg);</div><div class='add'>+	mlx5e_rx_reporter_diagnose_rx_res_rss(rx_res, fmsg);</div><div class='add'>+	mlx5e_health_fmsg_named_obj_nest_end(fmsg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_rx_reporter_diagnose_rqs(struct mlx5e_priv *priv, struct devlink_fmsg *fmsg)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_ptp *ptp_ch = priv-&gt;channels.ptp;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	mlx5e_rx_reporter_diagnose_common_config(reporter, fmsg);</div><div class='ctx'> 	devlink_fmsg_arr_pair_nest_start(fmsg, "RQs");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;channels.num; i++) {</div><div class='hunk'>@@ -367,7 +453,24 @@ static int mlx5e_rx_reporter_diagnose(struct devlink_health_reporter *reporter,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ptp_ch &amp;&amp; test_bit(MLX5E_PTP_STATE_RX, ptp_ch-&gt;state))</div><div class='ctx'> 		mlx5e_rx_reporter_build_diagnose_output_ptp_rq(&amp;ptp_ch-&gt;rq, fmsg);</div><div class='add'>+</div><div class='ctx'> 	devlink_fmsg_arr_pair_nest_end(fmsg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5e_rx_reporter_diagnose(struct devlink_health_reporter *reporter,</div><div class='add'>+				      struct devlink_fmsg *fmsg,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = devlink_health_reporter_priv(reporter);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(MLX5E_STATE_OPENED, &amp;priv-&gt;state))</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	mlx5e_rx_reporter_diagnose_common_config(priv, fmsg);</div><div class='add'>+	mlx5e_rx_reporter_diagnose_rqs(priv, fmsg);</div><div class='add'>+	mlx5e_rx_reporter_diagnose_rx_res(priv, fmsg);</div><div class='ctx'> unlock:</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -549,25 +652,29 @@ void mlx5e_reporter_icosq_resume_recovery(struct mlx5e_channel *c)</div><div class='ctx'> 	mutex_unlock(&amp;c-&gt;icosq_recovery_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define MLX5E_REPORTER_RX_GRACEFUL_PERIOD 500</div><div class='add'>+#define MLX5E_REPORTER_RX_BURST_PERIOD 500</div><div class='add'>+</div><div class='ctx'> static const struct devlink_health_reporter_ops mlx5_rx_reporter_ops = {</div><div class='ctx'> 	.name = "rx",</div><div class='ctx'> 	.recover = mlx5e_rx_reporter_recover,</div><div class='ctx'> 	.diagnose = mlx5e_rx_reporter_diagnose,</div><div class='ctx'> 	.dump = mlx5e_rx_reporter_dump,</div><div class='add'>+	.default_graceful_period = MLX5E_REPORTER_RX_GRACEFUL_PERIOD,</div><div class='add'>+	.default_burst_period = MLX5E_REPORTER_RX_BURST_PERIOD,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define MLX5E_REPORTER_RX_GRACEFUL_PERIOD 500</div><div class='del'>-</div><div class='ctx'> void mlx5e_reporter_rx_create(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	struct devlink_port *port = priv-&gt;netdev-&gt;devlink_port;</div><div class='ctx'> 	struct devlink_health_reporter *reporter;</div><div class='ctx'> </div><div class='del'>-	reporter = devlink_port_health_reporter_create(priv-&gt;netdev-&gt;devlink_port,</div><div class='add'>+	reporter = devlink_port_health_reporter_create(port,</div><div class='ctx'> 						       &amp;mlx5_rx_reporter_ops,</div><div class='del'>-						       MLX5E_REPORTER_RX_GRACEFUL_PERIOD, priv);</div><div class='add'>+						       priv);</div><div class='ctx'> 	if (IS_ERR(reporter)) {</div><div class='del'>-		netdev_warn(priv-&gt;netdev, "Failed to create rx reporter, err = %ld\n",</div><div class='del'>-			    PTR_ERR(reporter));</div><div class='add'>+		netdev_warn(priv-&gt;netdev, "Failed to create rx reporter, err = %pe\n",</div><div class='add'>+			    reporter);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	priv-&gt;rx_reporter = reporter;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c<br/>index 09433b91be17..9e2cf191ed30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c</a></div><div class='hunk'>@@ -13,10 +13,8 @@ static const char * const sq_sw_state_type_name[] = {</div><div class='ctx'> 	[MLX5E_SQ_STATE_RECOVERING] = "recovering",</div><div class='ctx'> 	[MLX5E_SQ_STATE_IPSEC] = "ipsec",</div><div class='ctx'> 	[MLX5E_SQ_STATE_DIM] = "dim",</div><div class='del'>-	[MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE] = "vlan_need_l2_inline",</div><div class='ctx'> 	[MLX5E_SQ_STATE_PENDING_XSK_TX] = "pending_xsk_tx",</div><div class='ctx'> 	[MLX5E_SQ_STATE_PENDING_TLS_RX_RESYNC] = "pending_tls_rx_resync",</div><div class='del'>-	[MLX5E_SQ_STATE_XDP_MULTIBUF] = "xdp_multibuf",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_wait_for_sq_flush(struct mlx5e_txqsq *sq)</div><div class='hunk'>@@ -108,9 +106,7 @@ static int mlx5e_tx_reporter_err_cqe_recover(void *ctx)</div><div class='ctx'> 	mlx5e_reset_txqsq_cc_pc(sq);</div><div class='ctx'> 	sq-&gt;stats-&gt;recover++;</div><div class='ctx'> 	clear_bit(MLX5E_SQ_STATE_RECOVERING, &amp;sq-&gt;state);</div><div class='del'>-	rtnl_lock();</div><div class='ctx'> 	mlx5e_activate_txqsq(sq);</div><div class='del'>-	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	if (sq-&gt;channel)</div><div class='ctx'> 		mlx5e_trigger_napi_icosq(sq-&gt;channel);</div><div class='hunk'>@@ -184,16 +180,12 @@ static int mlx5e_tx_reporter_ptpsq_unhealthy_recover(void *ctx)</div><div class='ctx'> 	carrier_ok = netif_carrier_ok(netdev);</div><div class='ctx'> 	netif_carrier_off(netdev);</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='ctx'> 	mlx5e_deactivate_priv_channels(priv);</div><div class='del'>-	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_ptp_close(chs-&gt;ptp);</div><div class='ctx'> 	err = mlx5e_ptp_open(priv, &amp;chs-&gt;params, chs-&gt;c[0]-&gt;lag_port, &amp;chs-&gt;ptp);</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='ctx'> 	mlx5e_activate_priv_channels(priv);</div><div class='del'>-	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	/* return carrier back if needed */</div><div class='ctx'> 	if (carrier_ok)</div><div class='hunk'>@@ -319,6 +311,30 @@ out:</div><div class='ctx'> 	mlx5e_health_fmsg_named_obj_nest_end(fmsg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+mlx5e_tx_reporter_diagnose_tis_config(struct devlink_health_reporter *reporter,</div><div class='add'>+				      struct devlink_fmsg *fmsg)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = devlink_health_reporter_priv(reporter);</div><div class='add'>+	u8 num_tc = mlx5e_get_dcb_num_tc(&amp;priv-&gt;channels.params);</div><div class='add'>+	u32 tc, i, tisn;</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_arr_pair_nest_start(fmsg, "TIS Config");</div><div class='add'>+	for (i = 0; i &lt; mlx5e_get_num_lag_ports(priv-&gt;mdev); i++) {</div><div class='add'>+		for (tc = 0; tc &lt; num_tc; tc++) {</div><div class='add'>+			tisn = mlx5e_profile_get_tisn(priv-&gt;mdev, priv,</div><div class='add'>+						      priv-&gt;profile, i, tc);</div><div class='add'>+</div><div class='add'>+			devlink_fmsg_obj_nest_start(fmsg);</div><div class='add'>+			devlink_fmsg_u32_pair_put(fmsg, "lag port", i);</div><div class='add'>+			devlink_fmsg_u32_pair_put(fmsg, "tc", tc);</div><div class='add'>+			devlink_fmsg_u32_pair_put(fmsg, "tisn", tisn);</div><div class='add'>+			devlink_fmsg_obj_nest_end(fmsg);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	devlink_fmsg_arr_pair_nest_end(fmsg);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5e_tx_reporter_diagnose(struct devlink_health_reporter *reporter,</div><div class='ctx'> 				      struct devlink_fmsg *fmsg,</div><div class='ctx'> 				      struct netlink_ext_ack *extack)</div><div class='hunk'>@@ -334,6 +350,7 @@ static int mlx5e_tx_reporter_diagnose(struct devlink_health_reporter *reporter,</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_tx_reporter_diagnose_common_config(reporter, fmsg);</div><div class='add'>+	mlx5e_tx_reporter_diagnose_tis_config(reporter, fmsg);</div><div class='ctx'> 	devlink_fmsg_arr_pair_nest_start(fmsg, "SQs");</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;channels.num; i++) {</div><div class='hunk'>@@ -522,26 +539,30 @@ void mlx5e_reporter_tx_ptpsq_unhealthy(struct mlx5e_ptpsq *ptpsq)</div><div class='ctx'> 	mlx5e_health_report(priv, priv-&gt;tx_reporter, err_str, &amp;err_ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define MLX5E_REPORTER_TX_GRACEFUL_PERIOD 500</div><div class='add'>+#define MLX5E_REPORTER_TX_BURST_PERIOD 500</div><div class='add'>+</div><div class='ctx'> static const struct devlink_health_reporter_ops mlx5_tx_reporter_ops = {</div><div class='ctx'> 		.name = "tx",</div><div class='ctx'> 		.recover = mlx5e_tx_reporter_recover,</div><div class='ctx'> 		.diagnose = mlx5e_tx_reporter_diagnose,</div><div class='ctx'> 		.dump = mlx5e_tx_reporter_dump,</div><div class='add'>+		.default_graceful_period = MLX5E_REPORTER_TX_GRACEFUL_PERIOD,</div><div class='add'>+		.default_burst_period = MLX5E_REPORTER_TX_BURST_PERIOD,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define MLX5_REPORTER_TX_GRACEFUL_PERIOD 500</div><div class='del'>-</div><div class='ctx'> void mlx5e_reporter_tx_create(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	struct devlink_port *port = priv-&gt;netdev-&gt;devlink_port;</div><div class='ctx'> 	struct devlink_health_reporter *reporter;</div><div class='ctx'> </div><div class='del'>-	reporter = devlink_port_health_reporter_create(priv-&gt;netdev-&gt;devlink_port,</div><div class='add'>+	reporter = devlink_port_health_reporter_create(port,</div><div class='ctx'> 						       &amp;mlx5_tx_reporter_ops,</div><div class='del'>-						       MLX5_REPORTER_TX_GRACEFUL_PERIOD, priv);</div><div class='add'>+						       priv);</div><div class='ctx'> 	if (IS_ERR(reporter)) {</div><div class='ctx'> 		netdev_warn(priv-&gt;netdev,</div><div class='del'>-			    "Failed to create tx reporter, err = %ld\n",</div><div class='del'>-			    PTR_ERR(reporter));</div><div class='add'>+			    "Failed to create tx reporter, err = %pe\n",</div><div class='add'>+			    reporter);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	priv-&gt;tx_reporter = reporter;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/rss.c b/drivers/net/ethernet/mellanox/mlx5/core/en/rss.c<br/>index 5f742f896600..88b0e1050d1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/rss.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/rss.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/rss.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/rss.c</a></div><div class='hunk'>@@ -75,18 +75,22 @@ struct mlx5e_rss {</div><div class='ctx'> 	struct mlx5e_tir *inner_tir[MLX5E_NUM_INDIR_TIRS];</div><div class='ctx'> 	struct mlx5e_rqt rqt;</div><div class='ctx'> 	struct mlx5_core_dev *mdev; /* primary */</div><div class='del'>-	u32 drop_rqn;</div><div class='del'>-	bool inner_ft_support;</div><div class='add'>+	struct mlx5e_rss_params params;</div><div class='ctx'> 	bool enabled;</div><div class='ctx'> 	refcount_t refcnt;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+bool mlx5e_rss_get_inner_ft_support(struct mlx5e_rss *rss)</div><div class='add'>+{</div><div class='add'>+	return rss-&gt;params.inner_ft_support;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5e_rss_params_indir_modify_actual_size(struct mlx5e_rss *rss, u32 num_channels)</div><div class='ctx'> {</div><div class='ctx'> 	rss-&gt;indir.actual_table_size = mlx5e_rqt_size(rss-&gt;mdev, num_channels);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5e_rss_params_indir_init(struct mlx5e_rss_params_indir *indir, struct mlx5_core_dev *mdev,</div><div class='add'>+int mlx5e_rss_params_indir_init(struct mlx5e_rss_params_indir *indir,</div><div class='ctx'> 				u32 actual_table_size, u32 max_table_size)</div><div class='ctx'> {</div><div class='ctx'> 	indir-&gt;table = kvmalloc_array(max_table_size, sizeof(*indir-&gt;table), GFP_KERNEL);</div><div class='hunk'>@@ -134,7 +138,8 @@ static struct mlx5e_rss *mlx5e_rss_init_copy(const struct mlx5e_rss *from)</div><div class='ctx'> 	if (!rss)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_rss_params_indir_init(&amp;rss-&gt;indir, from-&gt;mdev, from-&gt;indir.actual_table_size,</div><div class='add'>+	err = mlx5e_rss_params_indir_init(&amp;rss-&gt;indir,</div><div class='add'>+					  from-&gt;indir.actual_table_size,</div><div class='ctx'> 					  from-&gt;indir.max_table_size);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_rss;</div><div class='hunk'>@@ -156,6 +161,7 @@ static void mlx5e_rss_params_init(struct mlx5e_rss *rss)</div><div class='ctx'> {</div><div class='ctx'> 	enum mlx5_traffic_types tt;</div><div class='ctx'> </div><div class='add'>+	rss-&gt;hash.symmetric = true;</div><div class='ctx'> 	rss-&gt;hash.hfunc = ETH_RSS_HASH_TOP;</div><div class='ctx'> 	netdev_rss_key_fill(rss-&gt;hash.toeplitz_hash_key,</div><div class='ctx'> 			    sizeof(rss-&gt;hash.toeplitz_hash_key));</div><div class='hunk'>@@ -186,11 +192,12 @@ mlx5e_rss_get_tt_config(struct mlx5e_rss *rss, enum mlx5_traffic_types tt)</div><div class='ctx'> 	return rss_tt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5e_rss_create_tir(struct mlx5e_rss *rss,</div><div class='del'>-				enum mlx5_traffic_types tt,</div><div class='del'>-				const struct mlx5e_packet_merge_param *init_pkt_merge_param,</div><div class='del'>-				bool inner)</div><div class='add'>+static int</div><div class='add'>+mlx5e_rss_create_tir(struct mlx5e_rss *rss, enum mlx5_traffic_types tt,</div><div class='add'>+		     const struct mlx5e_packet_merge_param *pkt_merge_param,</div><div class='add'>+		     bool inner)</div><div class='ctx'> {</div><div class='add'>+	bool rss_inner = rss-&gt;params.inner_ft_support;</div><div class='ctx'> 	struct mlx5e_rss_params_traffic_type rss_tt;</div><div class='ctx'> 	struct mlx5e_tir_builder *builder;</div><div class='ctx'> 	struct mlx5e_tir **tir_p;</div><div class='hunk'>@@ -198,7 +205,7 @@ static int mlx5e_rss_create_tir(struct mlx5e_rss *rss,</div><div class='ctx'> 	u32 rqtn;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (inner &amp;&amp; !rss-&gt;inner_ft_support) {</div><div class='add'>+	if (inner &amp;&amp; !rss_inner) {</div><div class='ctx'> 		mlx5e_rss_warn(rss-&gt;mdev,</div><div class='ctx'> 			       "Cannot create inner indirect TIR[%d], RSS inner FT is not supported.\n",</div><div class='ctx'> 			       tt);</div><div class='hunk'>@@ -221,9 +228,11 @@ static int mlx5e_rss_create_tir(struct mlx5e_rss *rss,</div><div class='ctx'> </div><div class='ctx'> 	rqtn = mlx5e_rqt_get_rqtn(&amp;rss-&gt;rqt);</div><div class='ctx'> 	mlx5e_tir_builder_build_rqt(builder, rss-&gt;mdev-&gt;mlx5e_res.hw_objs.td.tdn,</div><div class='del'>-				    rqtn, rss-&gt;inner_ft_support);</div><div class='del'>-	mlx5e_tir_builder_build_packet_merge(builder, init_pkt_merge_param);</div><div class='add'>+				    rqtn, rss_inner);</div><div class='add'>+	mlx5e_tir_builder_build_packet_merge(builder, pkt_merge_param);</div><div class='ctx'> 	rss_tt = mlx5e_rss_get_tt_config(rss, tt);</div><div class='add'>+	mlx5e_tir_builder_build_self_lb_block(builder, rss-&gt;params.self_lb_blk,</div><div class='add'>+					      rss-&gt;params.self_lb_blk);</div><div class='ctx'> 	mlx5e_tir_builder_build_rss(builder, &amp;rss-&gt;hash, &amp;rss_tt, inner);</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_tir_init(tir, builder, rss-&gt;mdev, true);</div><div class='hunk'>@@ -258,15 +267,16 @@ static void mlx5e_rss_destroy_tir(struct mlx5e_rss *rss, enum mlx5_traffic_types</div><div class='ctx'> 	*tir_p = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5e_rss_create_tirs(struct mlx5e_rss *rss,</div><div class='del'>-				 const struct mlx5e_packet_merge_param *init_pkt_merge_param,</div><div class='del'>-				 bool inner)</div><div class='add'>+static int</div><div class='add'>+mlx5e_rss_create_tirs(struct mlx5e_rss *rss,</div><div class='add'>+		      const struct mlx5e_packet_merge_param *pkt_merge_param,</div><div class='add'>+		      bool inner)</div><div class='ctx'> {</div><div class='ctx'> 	enum mlx5_traffic_types tt, max_tt;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	for (tt = 0; tt &lt; MLX5E_NUM_INDIR_TIRS; tt++) {</div><div class='del'>-		err = mlx5e_rss_create_tir(rss, tt, init_pkt_merge_param, inner);</div><div class='add'>+		err = mlx5e_rss_create_tir(rss, tt, pkt_merge_param, inner);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_destroy_tirs;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -329,7 +339,7 @@ static int mlx5e_rss_update_tirs(struct mlx5e_rss *rss)</div><div class='ctx'> 				       tt, err);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (!rss-&gt;inner_ft_support)</div><div class='add'>+		if (!rss-&gt;params.inner_ft_support)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		err = mlx5e_rss_update_tir(rss, tt, true);</div><div class='hunk'>@@ -349,14 +359,16 @@ static int mlx5e_rss_init_no_tirs(struct mlx5e_rss *rss)</div><div class='ctx'> 	refcount_set(&amp;rss-&gt;refcnt, 1);</div><div class='ctx'> </div><div class='ctx'> 	return mlx5e_rqt_init_direct(&amp;rss-&gt;rqt, rss-&gt;mdev, true,</div><div class='del'>-				     rss-&gt;drop_rqn, rss-&gt;indir.max_table_size);</div><div class='add'>+				     rss-&gt;params.drop_rqn,</div><div class='add'>+				     rss-&gt;indir.max_table_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct mlx5e_rss *mlx5e_rss_init(struct mlx5_core_dev *mdev, bool inner_ft_support, u32 drop_rqn,</div><div class='del'>-				 const struct mlx5e_packet_merge_param *init_pkt_merge_param,</div><div class='del'>-				 enum mlx5e_rss_init_type type, unsigned int nch,</div><div class='del'>-				 unsigned int max_nch)</div><div class='add'>+struct mlx5e_rss *</div><div class='add'>+mlx5e_rss_init(struct mlx5_core_dev *mdev,</div><div class='add'>+	       const struct mlx5e_rss_params *params,</div><div class='add'>+	       const struct mlx5e_rss_init_params *init_params)</div><div class='ctx'> {</div><div class='add'>+	u32 rqt_max_size, rqt_size;</div><div class='ctx'> 	struct mlx5e_rss *rss;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -364,29 +376,31 @@ struct mlx5e_rss *mlx5e_rss_init(struct mlx5_core_dev *mdev, bool inner_ft_suppo</div><div class='ctx'> 	if (!rss)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_rss_params_indir_init(&amp;rss-&gt;indir, mdev,</div><div class='del'>-					  mlx5e_rqt_size(mdev, nch),</div><div class='del'>-					  mlx5e_rqt_size(mdev, max_nch));</div><div class='add'>+	rqt_size = mlx5e_rqt_size(mdev, init_params-&gt;nch);</div><div class='add'>+	rqt_max_size = mlx5e_rqt_size(mdev, init_params-&gt;max_nch);</div><div class='add'>+	err = mlx5e_rss_params_indir_init(&amp;rss-&gt;indir, rqt_size, rqt_max_size);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_rss;</div><div class='ctx'> </div><div class='ctx'> 	rss-&gt;mdev = mdev;</div><div class='del'>-	rss-&gt;inner_ft_support = inner_ft_support;</div><div class='del'>-	rss-&gt;drop_rqn = drop_rqn;</div><div class='add'>+	rss-&gt;params = *params;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_rss_init_no_tirs(rss);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_indir;</div><div class='ctx'> </div><div class='del'>-	if (type == MLX5E_RSS_INIT_NO_TIRS)</div><div class='add'>+	if (init_params-&gt;type == MLX5E_RSS_INIT_NO_TIRS)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_rss_create_tirs(rss, init_pkt_merge_param, false);</div><div class='add'>+	err = mlx5e_rss_create_tirs(rss, init_params-&gt;pkt_merge_param,</div><div class='add'>+				    false);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_destroy_rqt;</div><div class='ctx'> </div><div class='del'>-	if (inner_ft_support) {</div><div class='del'>-		err = mlx5e_rss_create_tirs(rss, init_pkt_merge_param, true);</div><div class='add'>+	if (params-&gt;inner_ft_support) {</div><div class='add'>+		err = mlx5e_rss_create_tirs(rss,</div><div class='add'>+					    init_params-&gt;pkt_merge_param,</div><div class='add'>+					    true);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_destroy_tirs;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -412,7 +426,7 @@ int mlx5e_rss_cleanup(struct mlx5e_rss *rss)</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_rss_destroy_tirs(rss, false);</div><div class='ctx'> </div><div class='del'>-	if (rss-&gt;inner_ft_support)</div><div class='add'>+	if (rss-&gt;params.inner_ft_support)</div><div class='ctx'> 		mlx5e_rss_destroy_tirs(rss, true);</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_rqt_destroy(&amp;rss-&gt;rqt);</div><div class='hunk'>@@ -442,20 +456,30 @@ u32 mlx5e_rss_get_tirn(struct mlx5e_rss *rss, enum mlx5_traffic_types tt,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_tir *tir;</div><div class='ctx'> </div><div class='del'>-	WARN_ON(inner &amp;&amp; !rss-&gt;inner_ft_support);</div><div class='add'>+	WARN_ON(inner &amp;&amp; !rss-&gt;params.inner_ft_support);</div><div class='ctx'> 	tir = rss_get_tir(rss, tt, inner);</div><div class='ctx'> 	WARN_ON(!tir);</div><div class='ctx'> </div><div class='ctx'> 	return mlx5e_tir_get_tirn(tir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+u32 mlx5e_rss_get_rqtn(struct mlx5e_rss *rss)</div><div class='add'>+{</div><div class='add'>+	return mlx5e_rqt_get_rqtn(&amp;rss-&gt;rqt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mlx5e_rss_valid_tir(struct mlx5e_rss *rss, enum mlx5_traffic_types tt, bool inner)</div><div class='add'>+{</div><div class='add'>+	return !!rss_get_tir(rss, tt, inner);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Fill the "tirn" output parameter.</div><div class='ctx'>  * Create the requested TIR if it's its first usage.</div><div class='ctx'>  */</div><div class='del'>-int mlx5e_rss_obtain_tirn(struct mlx5e_rss *rss,</div><div class='del'>-			  enum mlx5_traffic_types tt,</div><div class='del'>-			  const struct mlx5e_packet_merge_param *init_pkt_merge_param,</div><div class='del'>-			  bool inner, u32 *tirn)</div><div class='add'>+int</div><div class='add'>+mlx5e_rss_obtain_tirn(struct mlx5e_rss *rss, enum mlx5_traffic_types tt,</div><div class='add'>+		      const struct mlx5e_packet_merge_param *pkt_merge_param,</div><div class='add'>+		      bool inner, u32 *tirn)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_tir *tir;</div><div class='ctx'> </div><div class='hunk'>@@ -463,7 +487,7 @@ int mlx5e_rss_obtain_tirn(struct mlx5e_rss *rss,</div><div class='ctx'> 	if (!tir) { /* TIR doesn't exist, create one */</div><div class='ctx'> 		int err;</div><div class='ctx'> </div><div class='del'>-		err = mlx5e_rss_create_tir(rss, tt, init_pkt_merge_param, inner);</div><div class='add'>+		err = mlx5e_rss_create_tir(rss, tt, pkt_merge_param, inner);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 		tir = rss_get_tir(rss, tt, inner);</div><div class='hunk'>@@ -496,10 +520,11 @@ void mlx5e_rss_disable(struct mlx5e_rss *rss)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	rss-&gt;enabled = false;</div><div class='del'>-	err = mlx5e_rqt_redirect_direct(&amp;rss-&gt;rqt, rss-&gt;drop_rqn, NULL);</div><div class='add'>+	err = mlx5e_rqt_redirect_direct(&amp;rss-&gt;rqt, rss-&gt;params.drop_rqn, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		mlx5e_rss_warn(rss-&gt;mdev, "Failed to redirect RQT %#x to drop RQ %#x: err = %d\n",</div><div class='del'>-			       mlx5e_rqt_get_rqtn(&amp;rss-&gt;rqt), rss-&gt;drop_rqn, err);</div><div class='add'>+			       mlx5e_rqt_get_rqtn(&amp;rss-&gt;rqt),</div><div class='add'>+			       rss-&gt;params.drop_rqn, err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5e_rss_packet_merge_set_param(struct mlx5e_rss *rss,</div><div class='hunk'>@@ -532,7 +557,7 @@ int mlx5e_rss_packet_merge_set_param(struct mlx5e_rss *rss,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> inner_tir:</div><div class='del'>-		if (!rss-&gt;inner_ft_support)</div><div class='add'>+		if (!rss-&gt;params.inner_ft_support)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		tir = rss_get_tir(rss, tt, true);</div><div class='hunk'>@@ -551,7 +576,8 @@ inner_tir:</div><div class='ctx'> 	return final_err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5e_rss_get_rxfh(struct mlx5e_rss *rss, u32 *indir, u8 *key, u8 *hfunc)</div><div class='add'>+void mlx5e_rss_get_rxfh(struct mlx5e_rss *rss, u32 *indir, u8 *key, u8 *hfunc,</div><div class='add'>+			bool *symmetric)</div><div class='ctx'> {</div><div class='ctx'> 	if (indir)</div><div class='ctx'> 		memcpy(indir, rss-&gt;indir.table,</div><div class='hunk'>@@ -564,11 +590,12 @@ int mlx5e_rss_get_rxfh(struct mlx5e_rss *rss, u32 *indir, u8 *key, u8 *hfunc)</div><div class='ctx'> 	if (hfunc)</div><div class='ctx'> 		*hfunc = rss-&gt;hash.hfunc;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (symmetric)</div><div class='add'>+		*symmetric = rss-&gt;hash.symmetric;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5e_rss_set_rxfh(struct mlx5e_rss *rss, const u32 *indir,</div><div class='del'>-		       const u8 *key, const u8 *hfunc,</div><div class='add'>+		       const u8 *key, const u8 *hfunc, const bool *symmetric,</div><div class='ctx'> 		       u32 *rqns, u32 *vhca_ids, unsigned int num_rqns)</div><div class='ctx'> {</div><div class='ctx'> 	bool changed_indir = false;</div><div class='hunk'>@@ -608,6 +635,11 @@ int mlx5e_rss_set_rxfh(struct mlx5e_rss *rss, const u32 *indir,</div><div class='ctx'> 		       rss-&gt;indir.actual_table_size * sizeof(*rss-&gt;indir.table));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (symmetric) {</div><div class='add'>+		rss-&gt;hash.symmetric = *symmetric;</div><div class='add'>+		changed_hash = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (changed_indir &amp;&amp; rss-&gt;enabled) {</div><div class='ctx'> 		err = mlx5e_rss_apply(rss, rqns, vhca_ids, num_rqns);</div><div class='ctx'> 		if (err) {</div><div class='hunk'>@@ -658,7 +690,7 @@ int mlx5e_rss_set_hash_fields(struct mlx5e_rss *rss, enum mlx5_traffic_types tt,</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!(rss-&gt;inner_ft_support))</div><div class='add'>+	if (!(rss-&gt;params.inner_ft_support))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_rss_update_tir(rss, tt, true);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/rss.h b/drivers/net/ethernet/mellanox/mlx5/core/en/rss.h<br/>index d0df98963c8d..17664757a561 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/rss.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/rss.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/rss.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/rss.h</a></div><div class='hunk'>@@ -13,40 +13,57 @@ enum mlx5e_rss_init_type {</div><div class='ctx'> 	MLX5E_RSS_INIT_TIRS</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mlx5e_rss_init_params {</div><div class='add'>+	enum mlx5e_rss_init_type type;</div><div class='add'>+	const struct mlx5e_packet_merge_param *pkt_merge_param;</div><div class='add'>+	unsigned int nch;</div><div class='add'>+	unsigned int max_nch;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_rss_params {</div><div class='add'>+	bool inner_ft_support;</div><div class='add'>+	u32 drop_rqn;</div><div class='add'>+	bool self_lb_blk;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mlx5e_rss_params_traffic_type</div><div class='ctx'> mlx5e_rss_get_default_tt_config(enum mlx5_traffic_types tt);</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_rss;</div><div class='ctx'> </div><div class='del'>-int mlx5e_rss_params_indir_init(struct mlx5e_rss_params_indir *indir, struct mlx5_core_dev *mdev,</div><div class='add'>+int mlx5e_rss_params_indir_init(struct mlx5e_rss_params_indir *indir,</div><div class='ctx'> 				u32 actual_table_size, u32 max_table_size);</div><div class='ctx'> void mlx5e_rss_params_indir_cleanup(struct mlx5e_rss_params_indir *indir);</div><div class='ctx'> void mlx5e_rss_params_indir_modify_actual_size(struct mlx5e_rss *rss, u32 num_channels);</div><div class='del'>-struct mlx5e_rss *mlx5e_rss_init(struct mlx5_core_dev *mdev, bool inner_ft_support, u32 drop_rqn,</div><div class='del'>-				 const struct mlx5e_packet_merge_param *init_pkt_merge_param,</div><div class='del'>-				 enum mlx5e_rss_init_type type, unsigned int nch,</div><div class='del'>-				 unsigned int max_nch);</div><div class='add'>+struct mlx5e_rss *</div><div class='add'>+mlx5e_rss_init(struct mlx5_core_dev *mdev,</div><div class='add'>+	       const struct mlx5e_rss_params *params,</div><div class='add'>+	       const struct mlx5e_rss_init_params *init_params);</div><div class='ctx'> int mlx5e_rss_cleanup(struct mlx5e_rss *rss);</div><div class='ctx'> </div><div class='ctx'> void mlx5e_rss_refcnt_inc(struct mlx5e_rss *rss);</div><div class='ctx'> void mlx5e_rss_refcnt_dec(struct mlx5e_rss *rss);</div><div class='ctx'> unsigned int mlx5e_rss_refcnt_read(struct mlx5e_rss *rss);</div><div class='ctx'> </div><div class='add'>+bool mlx5e_rss_get_inner_ft_support(struct mlx5e_rss *rss);</div><div class='ctx'> u32 mlx5e_rss_get_tirn(struct mlx5e_rss *rss, enum mlx5_traffic_types tt,</div><div class='ctx'> 		       bool inner);</div><div class='del'>-int mlx5e_rss_obtain_tirn(struct mlx5e_rss *rss,</div><div class='del'>-			  enum mlx5_traffic_types tt,</div><div class='del'>-			  const struct mlx5e_packet_merge_param *init_pkt_merge_param,</div><div class='del'>-			  bool inner, u32 *tirn);</div><div class='add'>+bool mlx5e_rss_valid_tir(struct mlx5e_rss *rss, enum mlx5_traffic_types tt, bool inner);</div><div class='add'>+u32 mlx5e_rss_get_rqtn(struct mlx5e_rss *rss);</div><div class='add'>+int</div><div class='add'>+mlx5e_rss_obtain_tirn(struct mlx5e_rss *rss, enum mlx5_traffic_types tt,</div><div class='add'>+		      const struct mlx5e_packet_merge_param *pkt_merge_param,</div><div class='add'>+		      bool inner, u32 *tirn);</div><div class='ctx'> </div><div class='ctx'> void mlx5e_rss_enable(struct mlx5e_rss *rss, u32 *rqns, u32 *vhca_ids, unsigned int num_rqns);</div><div class='ctx'> void mlx5e_rss_disable(struct mlx5e_rss *rss);</div><div class='ctx'> </div><div class='ctx'> int mlx5e_rss_packet_merge_set_param(struct mlx5e_rss *rss,</div><div class='ctx'> 				     struct mlx5e_packet_merge_param *pkt_merge_param);</div><div class='del'>-int mlx5e_rss_get_rxfh(struct mlx5e_rss *rss, u32 *indir, u8 *key, u8 *hfunc);</div><div class='add'>+void mlx5e_rss_get_rxfh(struct mlx5e_rss *rss, u32 *indir, u8 *key, u8 *hfunc,</div><div class='add'>+			bool *symmetric);</div><div class='ctx'> int mlx5e_rss_set_rxfh(struct mlx5e_rss *rss, const u32 *indir,</div><div class='del'>-		       const u8 *key, const u8 *hfunc,</div><div class='add'>+		       const u8 *key, const u8 *hfunc, const bool *symmetric,</div><div class='ctx'> 		       u32 *rqns, u32 *vhca_ids, unsigned int num_rqns);</div><div class='ctx'> struct mlx5e_rss_params_hash mlx5e_rss_get_hash(struct mlx5e_rss *rss);</div><div class='ctx'> u8 mlx5e_rss_get_hash_fields(struct mlx5e_rss *rss, enum mlx5_traffic_types tt);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c b/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c<br/>index a86eade9a9e0..55c117b7d8c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c</a></div><div class='hunk'>@@ -5,8 +5,6 @@</div><div class='ctx'> #include "channels.h"</div><div class='ctx'> #include "params.h"</div><div class='ctx'> </div><div class='del'>-#define MLX5E_MAX_NUM_RSS 16</div><div class='del'>-</div><div class='ctx'> struct mlx5e_rx_res {</div><div class='ctx'> 	struct mlx5_core_dev *mdev; /* primary */</div><div class='ctx'> 	enum mlx5e_rx_res_features features;</div><div class='hunk'>@@ -56,51 +54,74 @@ static int mlx5e_rx_res_rss_init_def(struct mlx5e_rx_res *res,</div><div class='ctx'> 				     unsigned int init_nch)</div><div class='ctx'> {</div><div class='ctx'> 	bool inner_ft_support = res-&gt;features &amp; MLX5E_RX_RES_FEATURE_INNER_FT;</div><div class='add'>+	struct mlx5e_rss_init_params init_params;</div><div class='add'>+	struct mlx5e_rss_params rss_params;</div><div class='ctx'> 	struct mlx5e_rss *rss;</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(res-&gt;rss[0]))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	rss = mlx5e_rss_init(res-&gt;mdev, inner_ft_support, res-&gt;drop_rqn,</div><div class='del'>-			     &amp;res-&gt;pkt_merge_param, MLX5E_RSS_INIT_TIRS, init_nch, res-&gt;max_nch);</div><div class='add'>+	init_params = (struct mlx5e_rss_init_params) {</div><div class='add'>+		.type = MLX5E_RSS_INIT_TIRS,</div><div class='add'>+		.pkt_merge_param = &amp;res-&gt;pkt_merge_param,</div><div class='add'>+		.nch = init_nch,</div><div class='add'>+		.max_nch = res-&gt;max_nch,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rss_params = (struct mlx5e_rss_params) {</div><div class='add'>+		.inner_ft_support = inner_ft_support,</div><div class='add'>+		.drop_rqn = res-&gt;drop_rqn,</div><div class='add'>+		.self_lb_blk =</div><div class='add'>+			res-&gt;features &amp; MLX5E_RX_RES_FEATURE_SELF_LB_BLOCK,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rss = mlx5e_rss_init(res-&gt;mdev, &amp;rss_params, &amp;init_params);</div><div class='ctx'> 	if (IS_ERR(rss))</div><div class='ctx'> 		return PTR_ERR(rss);</div><div class='ctx'> </div><div class='del'>-	mlx5e_rss_set_indir_uniform(rss, init_nch);</div><div class='add'>+	mlx5e_rss_set_indir_uniform(rss, init_params.nch);</div><div class='ctx'> </div><div class='ctx'> 	res-&gt;rss[0] = rss;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5e_rx_res_rss_init(struct mlx5e_rx_res *res, u32 *rss_idx, unsigned int init_nch)</div><div class='add'>+int mlx5e_rx_res_rss_init(struct mlx5e_rx_res *res, u32 rss_idx, unsigned int init_nch)</div><div class='ctx'> {</div><div class='ctx'> 	bool inner_ft_support = res-&gt;features &amp; MLX5E_RX_RES_FEATURE_INNER_FT;</div><div class='add'>+	struct mlx5e_rss_init_params init_params;</div><div class='add'>+	struct mlx5e_rss_params rss_params;</div><div class='ctx'> 	struct mlx5e_rss *rss;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 1; i &lt; MLX5E_MAX_NUM_RSS; i++)</div><div class='del'>-		if (!res-&gt;rss[i])</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-	if (i == MLX5E_MAX_NUM_RSS)</div><div class='add'>+	if (WARN_ON_ONCE(res-&gt;rss[rss_idx]))</div><div class='ctx'> 		return -ENOSPC;</div><div class='ctx'> </div><div class='del'>-	rss = mlx5e_rss_init(res-&gt;mdev, inner_ft_support, res-&gt;drop_rqn,</div><div class='del'>-			     &amp;res-&gt;pkt_merge_param, MLX5E_RSS_INIT_NO_TIRS, init_nch,</div><div class='del'>-			     res-&gt;max_nch);</div><div class='add'>+	init_params = (struct mlx5e_rss_init_params) {</div><div class='add'>+		.type = MLX5E_RSS_INIT_NO_TIRS,</div><div class='add'>+		.pkt_merge_param = &amp;res-&gt;pkt_merge_param,</div><div class='add'>+		.nch = init_nch,</div><div class='add'>+		.max_nch = res-&gt;max_nch,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rss_params = (struct mlx5e_rss_params) {</div><div class='add'>+		.inner_ft_support = inner_ft_support,</div><div class='add'>+		.drop_rqn = res-&gt;drop_rqn,</div><div class='add'>+		.self_lb_blk =</div><div class='add'>+			res-&gt;features &amp; MLX5E_RX_RES_FEATURE_SELF_LB_BLOCK,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rss = mlx5e_rss_init(res-&gt;mdev, &amp;rss_params, &amp;init_params);</div><div class='ctx'> 	if (IS_ERR(rss))</div><div class='ctx'> 		return PTR_ERR(rss);</div><div class='ctx'> </div><div class='del'>-	mlx5e_rss_set_indir_uniform(rss, init_nch);</div><div class='add'>+	mlx5e_rss_set_indir_uniform(rss, init_params.nch);</div><div class='ctx'> 	if (res-&gt;rss_active) {</div><div class='ctx'> 		u32 *vhca_ids = get_vhca_ids(res, 0);</div><div class='ctx'> </div><div class='ctx'> 		mlx5e_rss_enable(rss, res-&gt;rss_rqns, vhca_ids, res-&gt;rss_nch);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res-&gt;rss[i] = rss;</div><div class='del'>-	*rss_idx = i;</div><div class='add'>+	res-&gt;rss[rss_idx] = rss;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -195,23 +216,22 @@ void mlx5e_rx_res_rss_set_indir_uniform(struct mlx5e_rx_res *res, unsigned int n</div><div class='ctx'> 	mlx5e_rss_set_indir_uniform(res-&gt;rss[0], nch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5e_rx_res_rss_get_rxfh(struct mlx5e_rx_res *res, u32 rss_idx,</div><div class='del'>-			      u32 *indir, u8 *key, u8 *hfunc)</div><div class='add'>+void mlx5e_rx_res_rss_get_rxfh(struct mlx5e_rx_res *res, u32 rss_idx,</div><div class='add'>+			       u32 *indir, u8 *key, u8 *hfunc, bool *symmetric)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5e_rss *rss;</div><div class='add'>+	struct mlx5e_rss *rss = NULL;</div><div class='ctx'> </div><div class='del'>-	if (rss_idx &gt;= MLX5E_MAX_NUM_RSS)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (rss_idx &lt; MLX5E_MAX_NUM_RSS)</div><div class='add'>+		rss = res-&gt;rss[rss_idx];</div><div class='add'>+	if (WARN_ON_ONCE(!rss))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	rss = res-&gt;rss[rss_idx];</div><div class='del'>-	if (!rss)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	return mlx5e_rss_get_rxfh(rss, indir, key, hfunc);</div><div class='add'>+	mlx5e_rss_get_rxfh(rss, indir, key, hfunc, symmetric);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5e_rx_res_rss_set_rxfh(struct mlx5e_rx_res *res, u32 rss_idx,</div><div class='del'>-			      const u32 *indir, const u8 *key, const u8 *hfunc)</div><div class='add'>+			      const u32 *indir, const u8 *key, const u8 *hfunc,</div><div class='add'>+			      const bool *symmetric)</div><div class='ctx'> {</div><div class='ctx'> 	u32 *vhca_ids = get_vhca_ids(res, 0);</div><div class='ctx'> 	struct mlx5e_rss *rss;</div><div class='hunk'>@@ -223,8 +243,8 @@ int mlx5e_rx_res_rss_set_rxfh(struct mlx5e_rx_res *res, u32 rss_idx,</div><div class='ctx'> 	if (!rss)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='del'>-	return mlx5e_rss_set_rxfh(rss, indir, key, hfunc, res-&gt;rss_rqns, vhca_ids,</div><div class='del'>-				  res-&gt;rss_nch);</div><div class='add'>+	return mlx5e_rss_set_rxfh(rss, indir, key, hfunc, symmetric,</div><div class='add'>+				  res-&gt;rss_rqns, vhca_ids, res-&gt;rss_nch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5e_rx_res_rss_get_hash_fields(struct mlx5e_rx_res *res, u32 rss_idx,</div><div class='hunk'>@@ -330,6 +350,7 @@ static struct mlx5e_rx_res *mlx5e_rx_res_alloc(struct mlx5_core_dev *mdev, unsig</div><div class='ctx'> static int mlx5e_rx_res_channels_init(struct mlx5e_rx_res *res)</div><div class='ctx'> {</div><div class='ctx'> 	bool inner_ft_support = res-&gt;features &amp; MLX5E_RX_RES_FEATURE_INNER_FT;</div><div class='add'>+	bool self_lb_blk = res-&gt;features &amp; MLX5E_RX_RES_FEATURE_SELF_LB_BLOCK;</div><div class='ctx'> 	struct mlx5e_tir_builder *builder;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	int ix;</div><div class='hunk'>@@ -360,6 +381,8 @@ static int mlx5e_rx_res_channels_init(struct mlx5e_rx_res *res)</div><div class='ctx'> 					    mlx5e_rqt_get_rqtn(&amp;res-&gt;channels[ix].direct_rqt),</div><div class='ctx'> 					    inner_ft_support);</div><div class='ctx'> 		mlx5e_tir_builder_build_packet_merge(builder, &amp;res-&gt;pkt_merge_param);</div><div class='add'>+		mlx5e_tir_builder_build_self_lb_block(builder, self_lb_blk,</div><div class='add'>+						      self_lb_blk);</div><div class='ctx'> 		mlx5e_tir_builder_build_direct(builder);</div><div class='ctx'> </div><div class='ctx'> 		err = mlx5e_tir_init(&amp;res-&gt;channels[ix].direct_tir, builder, res-&gt;mdev, true);</div><div class='hunk'>@@ -447,7 +470,7 @@ static void mlx5e_rx_res_ptp_destroy(struct mlx5e_rx_res *res)</div><div class='ctx'> struct mlx5e_rx_res *</div><div class='ctx'> mlx5e_rx_res_create(struct mlx5_core_dev *mdev, enum mlx5e_rx_res_features features,</div><div class='ctx'> 		    unsigned int max_nch, u32 drop_rqn,</div><div class='del'>-		    const struct mlx5e_packet_merge_param *init_pkt_merge_param,</div><div class='add'>+		    const struct mlx5e_packet_merge_param *pkt_merge_param,</div><div class='ctx'> 		    unsigned int init_nch)</div><div class='ctx'> {</div><div class='ctx'> 	bool multi_vhca = features &amp; MLX5E_RX_RES_FEATURE_MULTI_VHCA;</div><div class='hunk'>@@ -463,7 +486,7 @@ mlx5e_rx_res_create(struct mlx5_core_dev *mdev, enum mlx5e_rx_res_features featu</div><div class='ctx'> 	res-&gt;max_nch = max_nch;</div><div class='ctx'> 	res-&gt;drop_rqn = drop_rqn;</div><div class='ctx'> </div><div class='del'>-	res-&gt;pkt_merge_param = *init_pkt_merge_param;</div><div class='add'>+	res-&gt;pkt_merge_param = *pkt_merge_param;</div><div class='ctx'> 	init_rwsem(&amp;res-&gt;pkt_merge_param_sem);</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_rx_res_rss_init_def(res, init_nch);</div><div class='hunk'>@@ -497,6 +520,11 @@ void mlx5e_rx_res_destroy(struct mlx5e_rx_res *res)</div><div class='ctx'> 	mlx5e_rx_res_free(res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+unsigned int mlx5e_rx_res_get_max_nch(struct mlx5e_rx_res *res)</div><div class='add'>+{</div><div class='add'>+	return res-&gt;max_nch;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u32 mlx5e_rx_res_get_tirn_direct(struct mlx5e_rx_res *res, unsigned int ix)</div><div class='ctx'> {</div><div class='ctx'> 	return mlx5e_tir_get_tirn(&amp;res-&gt;channels[ix].direct_tir);</div><div class='hunk'>@@ -522,7 +550,7 @@ u32 mlx5e_rx_res_get_tirn_ptp(struct mlx5e_rx_res *res)</div><div class='ctx'> 	return mlx5e_tir_get_tirn(&amp;res-&gt;ptp.tir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 mlx5e_rx_res_get_rqtn_direct(struct mlx5e_rx_res *res, unsigned int ix)</div><div class='add'>+u32 mlx5e_rx_res_get_rqtn_direct(struct mlx5e_rx_res *res, unsigned int ix)</div><div class='ctx'> {</div><div class='ctx'> 	return mlx5e_rqt_get_rqtn(&amp;res-&gt;channels[ix].direct_rqt);</div><div class='ctx'> }</div><div class='hunk'>@@ -575,8 +603,6 @@ void mlx5e_rx_res_channels_activate(struct mlx5e_rx_res *res, struct mlx5e_chann</div><div class='ctx'> </div><div class='ctx'> 	for (ix = 0; ix &lt; nch; ix++)</div><div class='ctx'> 		mlx5e_rx_res_channel_activate_direct(res, chs, ix);</div><div class='del'>-	for (ix = nch; ix &lt; res-&gt;max_nch; ix++)</div><div class='del'>-		mlx5e_rx_res_channel_deactivate_direct(res, ix);</div><div class='ctx'> </div><div class='ctx'> 	if (res-&gt;features &amp; MLX5E_RX_RES_FEATURE_PTP) {</div><div class='ctx'> 		u32 rqn;</div><div class='hunk'>@@ -599,7 +625,7 @@ void mlx5e_rx_res_channels_deactivate(struct mlx5e_rx_res *res)</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_rx_res_rss_disable(res);</div><div class='ctx'> </div><div class='del'>-	for (ix = 0; ix &lt; res-&gt;max_nch; ix++)</div><div class='add'>+	for (ix = 0; ix &lt; res-&gt;rss_nch; ix++)</div><div class='ctx'> 		mlx5e_rx_res_channel_deactivate_direct(res, ix);</div><div class='ctx'> </div><div class='ctx'> 	if (res-&gt;features &amp; MLX5E_RX_RES_FEATURE_PTP) {</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h b/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h<br/>index 7b1a9f0f1874..675780120a20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #include "fs.h"</div><div class='ctx'> #include "rss.h"</div><div class='ctx'> </div><div class='add'>+#define MLX5E_MAX_NUM_RSS 16</div><div class='add'>+</div><div class='ctx'> struct mlx5e_rx_res;</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_channels;</div><div class='hunk'>@@ -19,13 +21,14 @@ enum mlx5e_rx_res_features {</div><div class='ctx'> 	MLX5E_RX_RES_FEATURE_INNER_FT = BIT(0),</div><div class='ctx'> 	MLX5E_RX_RES_FEATURE_PTP = BIT(1),</div><div class='ctx'> 	MLX5E_RX_RES_FEATURE_MULTI_VHCA = BIT(2),</div><div class='add'>+	MLX5E_RX_RES_FEATURE_SELF_LB_BLOCK = BIT(3),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Setup */</div><div class='ctx'> struct mlx5e_rx_res *</div><div class='ctx'> mlx5e_rx_res_create(struct mlx5_core_dev *mdev, enum mlx5e_rx_res_features features,</div><div class='ctx'> 		    unsigned int max_nch, u32 drop_rqn,</div><div class='del'>-		    const struct mlx5e_packet_merge_param *init_pkt_merge_param,</div><div class='add'>+		    const struct mlx5e_packet_merge_param *pkt_merge_param,</div><div class='ctx'> 		    unsigned int init_nch);</div><div class='ctx'> void mlx5e_rx_res_destroy(struct mlx5e_rx_res *res);</div><div class='ctx'> </div><div class='hunk'>@@ -34,6 +37,9 @@ u32 mlx5e_rx_res_get_tirn_direct(struct mlx5e_rx_res *res, unsigned int ix);</div><div class='ctx'> u32 mlx5e_rx_res_get_tirn_rss(struct mlx5e_rx_res *res, enum mlx5_traffic_types tt);</div><div class='ctx'> u32 mlx5e_rx_res_get_tirn_rss_inner(struct mlx5e_rx_res *res, enum mlx5_traffic_types tt);</div><div class='ctx'> u32 mlx5e_rx_res_get_tirn_ptp(struct mlx5e_rx_res *res);</div><div class='add'>+u32 mlx5e_rx_res_get_rqtn_direct(struct mlx5e_rx_res *res, unsigned int ix);</div><div class='add'>+unsigned int mlx5e_rx_res_get_max_nch(struct mlx5e_rx_res *res);</div><div class='add'>+bool mlx5_rx_res_rss_inner_ft_support(struct mlx5e_rx_res *res);</div><div class='ctx'> </div><div class='ctx'> /* Activate/deactivate API */</div><div class='ctx'> void mlx5e_rx_res_channels_activate(struct mlx5e_rx_res *res, struct mlx5e_channels *chs);</div><div class='hunk'>@@ -43,10 +49,12 @@ void mlx5e_rx_res_xsk_update(struct mlx5e_rx_res *res, struct mlx5e_channels *ch</div><div class='ctx'> </div><div class='ctx'> /* Configuration API */</div><div class='ctx'> void mlx5e_rx_res_rss_set_indir_uniform(struct mlx5e_rx_res *res, unsigned int nch);</div><div class='del'>-int mlx5e_rx_res_rss_get_rxfh(struct mlx5e_rx_res *res, u32 rss_idx,</div><div class='del'>-			      u32 *indir, u8 *key, u8 *hfunc);</div><div class='add'>+void mlx5e_rx_res_rss_get_rxfh(struct mlx5e_rx_res *res, u32 rss_idx,</div><div class='add'>+			       u32 *indir, u8 *key, u8 *hfunc,</div><div class='add'>+			       bool *symmetric);</div><div class='ctx'> int mlx5e_rx_res_rss_set_rxfh(struct mlx5e_rx_res *res, u32 rss_idx,</div><div class='del'>-			      const u32 *indir, const u8 *key, const u8 *hfunc);</div><div class='add'>+			      const u32 *indir, const u8 *key, const u8 *hfunc,</div><div class='add'>+			      const bool *symmetric);</div><div class='ctx'> </div><div class='ctx'> int mlx5e_rx_res_rss_get_hash_fields(struct mlx5e_rx_res *res, u32 rss_idx,</div><div class='ctx'> 				     enum mlx5_traffic_types tt);</div><div class='hunk'>@@ -55,7 +63,7 @@ int mlx5e_rx_res_rss_set_hash_fields(struct mlx5e_rx_res *res, u32 rss_idx,</div><div class='ctx'> int mlx5e_rx_res_packet_merge_set_param(struct mlx5e_rx_res *res,</div><div class='ctx'> 					struct mlx5e_packet_merge_param *pkt_merge_param);</div><div class='ctx'> </div><div class='del'>-int mlx5e_rx_res_rss_init(struct mlx5e_rx_res *res, u32 *rss_idx, unsigned int init_nch);</div><div class='add'>+int mlx5e_rx_res_rss_init(struct mlx5e_rx_res *res, u32 rss_idx, unsigned int init_nch);</div><div class='ctx'> int mlx5e_rx_res_rss_destroy(struct mlx5e_rx_res *res, u32 rss_idx);</div><div class='ctx'> int mlx5e_rx_res_rss_cnt(struct mlx5e_rx_res *res);</div><div class='ctx'> int mlx5e_rx_res_rss_index(struct mlx5e_rx_res *res, struct mlx5e_rss *rss);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h b/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h<br/>index d6c12d0ea55b..2e528b2c34d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h</a></div><div class='hunk'>@@ -73,11 +73,6 @@ struct mlx5e_tc_act {</div><div class='ctx'> 	bool is_terminating_action;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mlx5e_tc_flow_action {</div><div class='del'>-	unsigned int num_entries;</div><div class='del'>-	struct flow_action_entry **entries;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> extern struct mlx5e_tc_act mlx5e_tc_act_drop;</div><div class='ctx'> extern struct mlx5e_tc_act mlx5e_tc_act_trap;</div><div class='ctx'> extern struct mlx5e_tc_act mlx5e_tc_act_accept;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c<br/>index feeb41693c17..b6cabe829f19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c</a></div><div class='hunk'>@@ -5,6 +5,16 @@</div><div class='ctx'> #include "en/tc_priv.h"</div><div class='ctx'> #include "en/tc_ct.h"</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+tc_act_can_offload_ct(struct mlx5e_tc_act_parse_state *parse_state,</div><div class='add'>+		      const struct flow_action_entry *act,</div><div class='add'>+		      int act_index,</div><div class='add'>+		      struct mlx5_flow_attr *attr)</div><div class='add'>+{</div><div class='add'>+	return !((act-&gt;ct.action &amp; TCA_CT_ACT_COMMIT) &amp;&amp;</div><div class='add'>+		 flow_action_is_last_entry(parse_state-&gt;flow_action, act));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> tc_act_parse_ct(struct mlx5e_tc_act_parse_state *parse_state,</div><div class='ctx'> 		const struct flow_action_entry *act,</div><div class='hunk'>@@ -56,6 +66,7 @@ tc_act_is_missable_ct(const struct flow_action_entry *act)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_tc_act mlx5e_tc_act_ct = {</div><div class='add'>+	.can_offload = tc_act_can_offload_ct,</div><div class='ctx'> 	.parse_action = tc_act_parse_ct,</div><div class='ctx'> 	.post_parse = tc_act_post_parse_ct,</div><div class='ctx'> 	.is_multi_table_act = tc_act_is_multi_table_act_ct,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c<br/>index a13c5e707b83..9bdb5820c553 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c</a></div><div class='hunk'>@@ -94,29 +94,30 @@ mlx5e_tc_act_vlan_add_push_action(struct mlx5e_priv *priv,</div><div class='ctx'> 				  struct net_device **out_dev,</div><div class='ctx'> 				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *vlan_dev = *out_dev;</div><div class='del'>-	struct flow_action_entry vlan_act = {</div><div class='del'>-		.id = FLOW_ACTION_VLAN_PUSH,</div><div class='del'>-		.vlan.vid = vlan_dev_vlan_id(vlan_dev),</div><div class='del'>-		.vlan.proto = vlan_dev_vlan_proto(vlan_dev),</div><div class='del'>-		.vlan.prio = 0,</div><div class='del'>-	};</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = parse_tc_vlan_action(priv, &amp;vlan_act, attr-&gt;esw_attr, &amp;attr-&gt;action, extack, NULL);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	*out_dev = dev_get_by_index_rcu(dev_net(vlan_dev), dev_get_iflink(vlan_dev));</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-	if (!*out_dev)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	do {</div><div class='add'>+		struct net_device *vlan_dev = *out_dev;</div><div class='add'>+		struct flow_action_entry vlan_act = {</div><div class='add'>+			.id = FLOW_ACTION_VLAN_PUSH,</div><div class='add'>+			.vlan.vid = vlan_dev_vlan_id(vlan_dev),</div><div class='add'>+			.vlan.proto = vlan_dev_vlan_proto(vlan_dev),</div><div class='add'>+			.vlan.prio = 0,</div><div class='add'>+		};</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = parse_tc_vlan_action(priv, &amp;vlan_act, attr-&gt;esw_attr,</div><div class='add'>+					   &amp;attr-&gt;action, extack, NULL);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='ctx'> </div><div class='del'>-	if (is_vlan_dev(*out_dev))</div><div class='del'>-		err = mlx5e_tc_act_vlan_add_push_action(priv, attr, out_dev, extack);</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		*out_dev = dev_get_by_index_rcu(dev_net(vlan_dev),</div><div class='add'>+						dev_get_iflink(vlan_dev));</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		if (!*out_dev)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+	} while (is_vlan_dev(*out_dev));</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs.h b/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs.h<br/>index 62b3f7ff5562..e5b30801314b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs.h</a></div><div class='hunk'>@@ -48,4 +48,14 @@ mlx5_ct_fs_smfs_ops_get(void)</div><div class='ctx'> }</div><div class='ctx'> #endif /* IS_ENABLED(CONFIG_MLX5_SW_STEERING) */</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_MLX5_HW_STEERING)</div><div class='add'>+struct mlx5_ct_fs_ops *mlx5_ct_fs_hmfs_ops_get(void);</div><div class='add'>+#else</div><div class='add'>+static inline struct mlx5_ct_fs_ops *</div><div class='add'>+mlx5_ct_fs_hmfs_ops_get(void)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_MLX5_SW_STEERING) */</div><div class='add'>+</div><div class='ctx'> #endif /* __MLX5_EN_TC_CT_FS_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_hmfs.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_hmfs.c<br/>new file mode 100644<br/>index 000000000000..d3db6146fcad<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_hmfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_hmfs.c</a></div><div class='hunk'>@@ -0,0 +1,294 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2025, NVIDIA CORPORATION &amp; AFFILIATES. */</div><div class='add'>+</div><div class='add'>+#include "en_tc.h"</div><div class='add'>+#include "en/tc_ct.h"</div><div class='add'>+#include "en/tc_priv.h"</div><div class='add'>+#include "en/tc/ct_fs.h"</div><div class='add'>+#include "fs_core.h"</div><div class='add'>+#include "steering/hws/fs_hws_pools.h"</div><div class='add'>+#include "steering/hws/mlx5hws.h"</div><div class='add'>+#include "steering/hws/table.h"</div><div class='add'>+</div><div class='add'>+struct mlx5_ct_fs_hmfs_matcher {</div><div class='add'>+	struct mlx5hws_bwc_matcher *hws_bwc_matcher;</div><div class='add'>+	refcount_t ref;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* We need {ipv4, ipv6} x {tcp, udp, gre}  matchers. */</div><div class='add'>+#define NUM_MATCHERS (2 * 3)</div><div class='add'>+</div><div class='add'>+struct mlx5_ct_fs_hmfs {</div><div class='add'>+	struct mlx5hws_table *ct_tbl;</div><div class='add'>+	struct mlx5hws_table *ct_nat_tbl;</div><div class='add'>+	struct mlx5_flow_table *ct_nat;</div><div class='add'>+	struct mlx5hws_action *fwd_action;</div><div class='add'>+	struct mlx5hws_action *last_action;</div><div class='add'>+	struct mlx5hws_context *ctx;</div><div class='add'>+	struct mutex lock;   /* Guards matchers */</div><div class='add'>+	struct mlx5_ct_fs_hmfs_matcher matchers[NUM_MATCHERS];</div><div class='add'>+	struct mlx5_ct_fs_hmfs_matcher matchers_nat[NUM_MATCHERS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ct_fs_hmfs_rule {</div><div class='add'>+	struct mlx5_ct_fs_rule fs_rule;</div><div class='add'>+	struct mlx5hws_bwc_rule *hws_bwc_rule;</div><div class='add'>+	struct mlx5_ct_fs_hmfs_matcher *hmfs_matcher;</div><div class='add'>+	struct mlx5_fc *counter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 get_matcher_idx(bool ipv4, bool tcp, bool gre)</div><div class='add'>+{</div><div class='add'>+	return ipv4 * 3 + tcp * 2 + gre;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_ct_fs_hmfs_init(struct mlx5_ct_fs *fs, struct mlx5_flow_table *ct,</div><div class='add'>+				struct mlx5_flow_table *ct_nat, struct mlx5_flow_table *post_ct)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;</div><div class='add'>+	struct mlx5hws_table *ct_tbl, *ct_nat_tbl, *post_ct_tbl;</div><div class='add'>+	struct mlx5_ct_fs_hmfs *fs_hmfs = mlx5_ct_fs_priv(fs);</div><div class='add'>+</div><div class='add'>+	ct_tbl = ct-&gt;fs_hws_table.hws_table;</div><div class='add'>+	ct_nat_tbl = ct_nat-&gt;fs_hws_table.hws_table;</div><div class='add'>+	post_ct_tbl = post_ct-&gt;fs_hws_table.hws_table;</div><div class='add'>+	fs_hmfs-&gt;ct_nat = ct_nat;</div><div class='add'>+</div><div class='add'>+	if (!ct_tbl || !ct_nat_tbl || !post_ct_tbl) {</div><div class='add'>+		netdev_warn(fs-&gt;netdev, "ct_fs_hmfs: failed to init, missing backing hws tables");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(fs-&gt;netdev, "using hmfs steering");</div><div class='add'>+</div><div class='add'>+	fs_hmfs-&gt;ct_tbl = ct_tbl;</div><div class='add'>+	fs_hmfs-&gt;ct_nat_tbl = ct_nat_tbl;</div><div class='add'>+	fs_hmfs-&gt;ctx = ct_tbl-&gt;ctx;</div><div class='add'>+	mutex_init(&amp;fs_hmfs-&gt;lock);</div><div class='add'>+</div><div class='add'>+	fs_hmfs-&gt;fwd_action = mlx5hws_action_create_dest_table(ct_tbl-&gt;ctx, post_ct_tbl, flags);</div><div class='add'>+	if (!fs_hmfs-&gt;fwd_action) {</div><div class='add'>+		netdev_warn(fs-&gt;netdev, "ct_fs_hmfs: failed to create fwd action\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	fs_hmfs-&gt;last_action = mlx5hws_action_create_last(ct_tbl-&gt;ctx, flags);</div><div class='add'>+	if (!fs_hmfs-&gt;last_action) {</div><div class='add'>+		netdev_warn(fs-&gt;netdev, "ct_fs_hmfs: failed to create last action\n");</div><div class='add'>+		mlx5hws_action_destroy(fs_hmfs-&gt;fwd_action);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_ct_fs_hmfs_destroy(struct mlx5_ct_fs *fs)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_ct_fs_hmfs *fs_hmfs = mlx5_ct_fs_priv(fs);</div><div class='add'>+</div><div class='add'>+	mlx5hws_action_destroy(fs_hmfs-&gt;last_action);</div><div class='add'>+	mlx5hws_action_destroy(fs_hmfs-&gt;fwd_action);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_bwc_matcher *</div><div class='add'>+mlx5_ct_fs_hmfs_matcher_create(struct mlx5_ct_fs *fs, struct mlx5hws_table *tbl,</div><div class='add'>+			       struct mlx5_flow_spec *spec, bool ipv4, bool tcp, bool gre)</div><div class='add'>+{</div><div class='add'>+	u8 match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2 | MLX5_MATCH_OUTER_HEADERS;</div><div class='add'>+	struct mlx5hws_match_parameters mask = {</div><div class='add'>+		.match_buf = spec-&gt;match_criteria,</div><div class='add'>+		.match_sz = sizeof(spec-&gt;match_criteria),</div><div class='add'>+	};</div><div class='add'>+	u32 priority = get_matcher_idx(ipv4, tcp, gre);  /* Static priority based on params. */</div><div class='add'>+	struct mlx5hws_bwc_matcher *hws_bwc_matcher;</div><div class='add'>+</div><div class='add'>+	hws_bwc_matcher = mlx5hws_bwc_matcher_create(tbl, priority, match_criteria_enable, &amp;mask);</div><div class='add'>+	if (!hws_bwc_matcher)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	return hws_bwc_matcher;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_ct_fs_hmfs_matcher *</div><div class='add'>+mlx5_ct_fs_hmfs_matcher_get(struct mlx5_ct_fs *fs, struct mlx5_flow_spec *spec,</div><div class='add'>+			    bool nat, bool ipv4, bool tcp, bool gre)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_ct_fs_hmfs *fs_hmfs = mlx5_ct_fs_priv(fs);</div><div class='add'>+	u32 matcher_idx = get_matcher_idx(ipv4, tcp, gre);</div><div class='add'>+	struct mlx5_ct_fs_hmfs_matcher *hmfs_matcher;</div><div class='add'>+	struct mlx5hws_bwc_matcher *hws_bwc_matcher;</div><div class='add'>+	struct mlx5hws_table *tbl;</div><div class='add'>+</div><div class='add'>+	hmfs_matcher = nat ?</div><div class='add'>+		(fs_hmfs-&gt;matchers_nat + matcher_idx) :</div><div class='add'>+		(fs_hmfs-&gt;matchers + matcher_idx);</div><div class='add'>+</div><div class='add'>+	if (refcount_inc_not_zero(&amp;hmfs_matcher-&gt;ref))</div><div class='add'>+		return hmfs_matcher;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;fs_hmfs-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Retry with lock, as the matcher might be already created by another cpu. */</div><div class='add'>+	if (refcount_inc_not_zero(&amp;hmfs_matcher-&gt;ref))</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	tbl = nat ? fs_hmfs-&gt;ct_nat_tbl : fs_hmfs-&gt;ct_tbl;</div><div class='add'>+</div><div class='add'>+	hws_bwc_matcher = mlx5_ct_fs_hmfs_matcher_create(fs, tbl, spec, ipv4, tcp, gre);</div><div class='add'>+	if (IS_ERR(hws_bwc_matcher)) {</div><div class='add'>+		netdev_warn(fs-&gt;netdev,</div><div class='add'>+			    "ct_fs_hmfs: failed to create bwc matcher (nat %d, ipv4 %d, tcp %d, gre %d), err: %pe\n",</div><div class='add'>+			    nat, ipv4, tcp, gre, hws_bwc_matcher);</div><div class='add'>+</div><div class='add'>+		hmfs_matcher = ERR_CAST(hws_bwc_matcher);</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hmfs_matcher-&gt;hws_bwc_matcher = hws_bwc_matcher;</div><div class='add'>+	refcount_set(&amp;hmfs_matcher-&gt;ref, 1);</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;fs_hmfs-&gt;lock);</div><div class='add'>+	return hmfs_matcher;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mlx5_ct_fs_hmfs_matcher_put(struct mlx5_ct_fs *fs, struct mlx5_ct_fs_hmfs_matcher *hmfs_matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_ct_fs_hmfs *fs_hmfs = mlx5_ct_fs_priv(fs);</div><div class='add'>+</div><div class='add'>+	if (!refcount_dec_and_mutex_lock(&amp;hmfs_matcher-&gt;ref, &amp;fs_hmfs-&gt;lock))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5hws_bwc_matcher_destroy(hmfs_matcher-&gt;hws_bwc_matcher);</div><div class='add'>+	mutex_unlock(&amp;fs_hmfs-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define NUM_CT_HMFS_RULES 4</div><div class='add'>+</div><div class='add'>+static void mlx5_ct_fs_hmfs_fill_rule_actions(struct mlx5_ct_fs_hmfs *fs_hmfs,</div><div class='add'>+					      struct mlx5_flow_attr *attr,</div><div class='add'>+					      struct mlx5hws_rule_action *rule_actions)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_action *mh_action = &amp;attr-&gt;modify_hdr-&gt;fs_hws_action;</div><div class='add'>+</div><div class='add'>+	memset(rule_actions, 0, NUM_CT_HMFS_RULES * sizeof(*rule_actions));</div><div class='add'>+	rule_actions[0].action = mlx5_fc_get_hws_action(fs_hmfs-&gt;ctx, attr-&gt;counter);</div><div class='add'>+	rule_actions[0].counter.offset =</div><div class='add'>+		attr-&gt;counter-&gt;id - attr-&gt;counter-&gt;bulk-&gt;base_id;</div><div class='add'>+	/* Modify header is special, it may require extra arguments outside the action itself. */</div><div class='add'>+	if (mh_action-&gt;mh_data) {</div><div class='add'>+		rule_actions[1].modify_header.offset = mh_action-&gt;mh_data-&gt;offset;</div><div class='add'>+		rule_actions[1].modify_header.data = mh_action-&gt;mh_data-&gt;data;</div><div class='add'>+	}</div><div class='add'>+	rule_actions[1].action = mh_action-&gt;hws_action;</div><div class='add'>+	rule_actions[2].action = fs_hmfs-&gt;fwd_action;</div><div class='add'>+	rule_actions[3].action = fs_hmfs-&gt;last_action;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_ct_fs_rule *</div><div class='add'>+mlx5_ct_fs_hmfs_ct_rule_add(struct mlx5_ct_fs *fs, struct mlx5_flow_spec *spec,</div><div class='add'>+			    struct mlx5_flow_attr *attr, struct flow_rule *flow_rule)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_rule_action rule_actions[NUM_CT_HMFS_RULES];</div><div class='add'>+	struct mlx5_ct_fs_hmfs *fs_hmfs = mlx5_ct_fs_priv(fs);</div><div class='add'>+	struct mlx5hws_match_parameters match_params = {</div><div class='add'>+		.match_buf = spec-&gt;match_value,</div><div class='add'>+		.match_sz = ARRAY_SIZE(spec-&gt;match_value),</div><div class='add'>+	};</div><div class='add'>+	struct mlx5_ct_fs_hmfs_matcher *hmfs_matcher;</div><div class='add'>+	struct mlx5_ct_fs_hmfs_rule *hmfs_rule;</div><div class='add'>+	bool nat, tcp, ipv4, gre;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mlx5e_tc_ct_is_valid_flow_rule(fs-&gt;netdev, flow_rule))</div><div class='add'>+		return ERR_PTR(-EOPNOTSUPP);</div><div class='add'>+</div><div class='add'>+	hmfs_rule = kzalloc(sizeof(*hmfs_rule), GFP_KERNEL);</div><div class='add'>+	if (!hmfs_rule)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	nat = (attr-&gt;ft == fs_hmfs-&gt;ct_nat);</div><div class='add'>+	ipv4 = mlx5e_tc_get_ip_version(spec, true) == 4;</div><div class='add'>+	tcp = MLX5_GET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+		       outer_headers.ip_protocol) == IPPROTO_TCP;</div><div class='add'>+	gre = MLX5_GET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+		       outer_headers.ip_protocol) == IPPROTO_GRE;</div><div class='add'>+</div><div class='add'>+	hmfs_matcher = mlx5_ct_fs_hmfs_matcher_get(fs, spec, nat, ipv4, tcp, gre);</div><div class='add'>+	if (IS_ERR(hmfs_matcher)) {</div><div class='add'>+		err = PTR_ERR(hmfs_matcher);</div><div class='add'>+		goto err_free_rule;</div><div class='add'>+	}</div><div class='add'>+	hmfs_rule-&gt;hmfs_matcher = hmfs_matcher;</div><div class='add'>+</div><div class='add'>+	mlx5_ct_fs_hmfs_fill_rule_actions(fs_hmfs, attr, rule_actions);</div><div class='add'>+	hmfs_rule-&gt;counter = attr-&gt;counter;</div><div class='add'>+</div><div class='add'>+	hmfs_rule-&gt;hws_bwc_rule =</div><div class='add'>+		mlx5hws_bwc_rule_create(hmfs_matcher-&gt;hws_bwc_matcher, &amp;match_params,</div><div class='add'>+					spec-&gt;flow_context.flow_source, rule_actions);</div><div class='add'>+	if (!hmfs_rule-&gt;hws_bwc_rule) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_put_matcher;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return &amp;hmfs_rule-&gt;fs_rule;</div><div class='add'>+</div><div class='add'>+err_put_matcher:</div><div class='add'>+	mlx5_fc_put_hws_action(hmfs_rule-&gt;counter);</div><div class='add'>+	mlx5_ct_fs_hmfs_matcher_put(fs, hmfs_matcher);</div><div class='add'>+err_free_rule:</div><div class='add'>+	kfree(hmfs_rule);</div><div class='add'>+	return ERR_PTR(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_ct_fs_hmfs_ct_rule_del(struct mlx5_ct_fs *fs, struct mlx5_ct_fs_rule *fs_rule)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_ct_fs_hmfs_rule *hmfs_rule = container_of(fs_rule,</div><div class='add'>+							      struct mlx5_ct_fs_hmfs_rule,</div><div class='add'>+							      fs_rule);</div><div class='add'>+	mlx5hws_bwc_rule_destroy(hmfs_rule-&gt;hws_bwc_rule);</div><div class='add'>+	mlx5_fc_put_hws_action(hmfs_rule-&gt;counter);</div><div class='add'>+	mlx5_ct_fs_hmfs_matcher_put(fs, hmfs_rule-&gt;hmfs_matcher);</div><div class='add'>+	kfree(hmfs_rule);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_ct_fs_hmfs_ct_rule_update(struct mlx5_ct_fs *fs, struct mlx5_ct_fs_rule *fs_rule,</div><div class='add'>+					  struct mlx5_flow_spec *spec, struct mlx5_flow_attr *attr)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_ct_fs_hmfs_rule *hmfs_rule = container_of(fs_rule,</div><div class='add'>+							      struct mlx5_ct_fs_hmfs_rule,</div><div class='add'>+							      fs_rule);</div><div class='add'>+	struct mlx5hws_rule_action rule_actions[NUM_CT_HMFS_RULES];</div><div class='add'>+	struct mlx5_ct_fs_hmfs *fs_hmfs = mlx5_ct_fs_priv(fs);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mlx5_ct_fs_hmfs_fill_rule_actions(fs_hmfs, attr, rule_actions);</div><div class='add'>+</div><div class='add'>+	err = mlx5hws_bwc_rule_action_update(hmfs_rule-&gt;hws_bwc_rule, rule_actions);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_fc_put_hws_action(attr-&gt;counter);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5_fc_put_hws_action(hmfs_rule-&gt;counter);</div><div class='add'>+	hmfs_rule-&gt;counter = attr-&gt;counter;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_ct_fs_ops hmfs_ops = {</div><div class='add'>+	.ct_rule_add = mlx5_ct_fs_hmfs_ct_rule_add,</div><div class='add'>+	.ct_rule_del = mlx5_ct_fs_hmfs_ct_rule_del,</div><div class='add'>+	.ct_rule_update = mlx5_ct_fs_hmfs_ct_rule_update,</div><div class='add'>+</div><div class='add'>+	.init = mlx5_ct_fs_hmfs_init,</div><div class='add'>+	.destroy = mlx5_ct_fs_hmfs_destroy,</div><div class='add'>+</div><div class='add'>+	.priv_size = sizeof(struct mlx5_ct_fs_hmfs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ct_fs_ops *mlx5_ct_fs_hmfs_ops_get(void)</div><div class='add'>+{</div><div class='add'>+	return &amp;hmfs_ops;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_smfs.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_smfs.c<br/>index 45737d039252..4d6924b644c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_smfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_smfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_smfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_smfs.c</a></div><div class='hunk'>@@ -13,7 +13,6 @@</div><div class='ctx'> #define INIT_ERR_PREFIX "ct_fs_smfs init failed"</div><div class='ctx'> #define ct_dbg(fmt, args...)\</div><div class='ctx'> 	netdev_dbg(fs-&gt;netdev, "ct_fs_smfs debug: " fmt "\n", ##args)</div><div class='del'>-#define MLX5_CT_TCP_FLAGS_MASK cpu_to_be16(be32_to_cpu(TCP_FLAG_RST | TCP_FLAG_FIN) &gt;&gt; 16)</div><div class='ctx'> </div><div class='ctx'> struct mlx5_ct_fs_smfs_matcher {</div><div class='ctx'> 	struct mlx5dr_matcher *dr_matcher;</div><div class='hunk'>@@ -149,8 +148,8 @@ mlx5_ct_fs_smfs_matcher_get(struct mlx5_ct_fs *fs, bool nat, bool ipv4, bool tcp</div><div class='ctx'> 	dr_matcher = mlx5_ct_fs_smfs_matcher_create(fs, tbl, ipv4, tcp, gre, prio);</div><div class='ctx'> 	if (IS_ERR(dr_matcher)) {</div><div class='ctx'> 		netdev_warn(fs-&gt;netdev,</div><div class='del'>-			    "ct_fs_smfs: failed to create matcher (nat %d, ipv4 %d, tcp %d, gre %d), err: %ld\n",</div><div class='del'>-			    nat, ipv4, tcp, gre, PTR_ERR(dr_matcher));</div><div class='add'>+			    "ct_fs_smfs: failed to create matcher (nat %d, ipv4 %d, tcp %d, gre %d), err: %pe\n",</div><div class='add'>+			    nat, ipv4, tcp, gre, dr_matcher);</div><div class='ctx'> </div><div class='ctx'> 		smfs_matcher = ERR_CAST(dr_matcher);</div><div class='ctx'> 		goto out_unlock;</div><div class='hunk'>@@ -220,78 +219,6 @@ mlx5_ct_fs_smfs_destroy(struct mlx5_ct_fs *fs)</div><div class='ctx'> 	mlx5_smfs_action_destroy(fs_smfs-&gt;fwd_action);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool</div><div class='del'>-mlx5_tc_ct_valid_used_dissector_keys(const u64 used_keys)</div><div class='del'>-{</div><div class='del'>-#define DISS_BIT(name) BIT_ULL(FLOW_DISSECTOR_KEY_ ## name)</div><div class='del'>-	const u64 basic_keys = DISS_BIT(BASIC) | DISS_BIT(CONTROL) |</div><div class='del'>-				DISS_BIT(META);</div><div class='del'>-	const u64 ipv4_tcp = basic_keys | DISS_BIT(IPV4_ADDRS) |</div><div class='del'>-				DISS_BIT(PORTS) | DISS_BIT(TCP);</div><div class='del'>-	const u64 ipv6_tcp = basic_keys | DISS_BIT(IPV6_ADDRS) |</div><div class='del'>-				DISS_BIT(PORTS) | DISS_BIT(TCP);</div><div class='del'>-	const u64 ipv4_udp = basic_keys | DISS_BIT(IPV4_ADDRS) |</div><div class='del'>-				DISS_BIT(PORTS);</div><div class='del'>-	const u64 ipv6_udp = basic_keys | DISS_BIT(IPV6_ADDRS) |</div><div class='del'>-				 DISS_BIT(PORTS);</div><div class='del'>-	const u64 ipv4_gre = basic_keys | DISS_BIT(IPV4_ADDRS);</div><div class='del'>-	const u64 ipv6_gre = basic_keys | DISS_BIT(IPV6_ADDRS);</div><div class='del'>-</div><div class='del'>-	return (used_keys == ipv4_tcp || used_keys == ipv4_udp || used_keys == ipv6_tcp ||</div><div class='del'>-		used_keys == ipv6_udp || used_keys == ipv4_gre || used_keys == ipv6_gre);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool</div><div class='del'>-mlx5_ct_fs_smfs_ct_validate_flow_rule(struct mlx5_ct_fs *fs, struct flow_rule *flow_rule)</div><div class='del'>-{</div><div class='del'>-	struct flow_match_ipv4_addrs ipv4_addrs;</div><div class='del'>-	struct flow_match_ipv6_addrs ipv6_addrs;</div><div class='del'>-	struct flow_match_control control;</div><div class='del'>-	struct flow_match_basic basic;</div><div class='del'>-	struct flow_match_ports ports;</div><div class='del'>-	struct flow_match_tcp tcp;</div><div class='del'>-</div><div class='del'>-	if (!mlx5_tc_ct_valid_used_dissector_keys(flow_rule-&gt;match.dissector-&gt;used_keys)) {</div><div class='del'>-		ct_dbg("rule uses unexpected dissectors (0x%016llx)",</div><div class='del'>-		       flow_rule-&gt;match.dissector-&gt;used_keys);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	flow_rule_match_basic(flow_rule, &amp;basic);</div><div class='del'>-	flow_rule_match_control(flow_rule, &amp;control);</div><div class='del'>-	flow_rule_match_ipv4_addrs(flow_rule, &amp;ipv4_addrs);</div><div class='del'>-	flow_rule_match_ipv6_addrs(flow_rule, &amp;ipv6_addrs);</div><div class='del'>-	if (basic.key-&gt;ip_proto != IPPROTO_GRE)</div><div class='del'>-		flow_rule_match_ports(flow_rule, &amp;ports);</div><div class='del'>-	if (basic.key-&gt;ip_proto == IPPROTO_TCP)</div><div class='del'>-		flow_rule_match_tcp(flow_rule, &amp;tcp);</div><div class='del'>-</div><div class='del'>-	if (basic.mask-&gt;n_proto != htons(0xFFFF) ||</div><div class='del'>-	    (basic.key-&gt;n_proto != htons(ETH_P_IP) &amp;&amp; basic.key-&gt;n_proto != htons(ETH_P_IPV6)) ||</div><div class='del'>-	    basic.mask-&gt;ip_proto != 0xFF ||</div><div class='del'>-	    (basic.key-&gt;ip_proto != IPPROTO_UDP &amp;&amp; basic.key-&gt;ip_proto != IPPROTO_TCP &amp;&amp;</div><div class='del'>-	     basic.key-&gt;ip_proto != IPPROTO_GRE)) {</div><div class='del'>-		ct_dbg("rule uses unexpected basic match (n_proto 0x%04x/0x%04x, ip_proto 0x%02x/0x%02x)",</div><div class='del'>-		       ntohs(basic.key-&gt;n_proto), ntohs(basic.mask-&gt;n_proto),</div><div class='del'>-		       basic.key-&gt;ip_proto, basic.mask-&gt;ip_proto);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (basic.key-&gt;ip_proto != IPPROTO_GRE &amp;&amp;</div><div class='del'>-	    (ports.mask-&gt;src != htons(0xFFFF) || ports.mask-&gt;dst != htons(0xFFFF))) {</div><div class='del'>-		ct_dbg("rule uses ports match (src 0x%04x, dst 0x%04x)",</div><div class='del'>-		       ports.mask-&gt;src, ports.mask-&gt;dst);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (basic.key-&gt;ip_proto == IPPROTO_TCP &amp;&amp; tcp.mask-&gt;flags != MLX5_CT_TCP_FLAGS_MASK) {</div><div class='del'>-		ct_dbg("rule uses unexpected tcp match (flags 0x%02x)", tcp.mask-&gt;flags);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct mlx5_ct_fs_rule *</div><div class='ctx'> mlx5_ct_fs_smfs_ct_rule_add(struct mlx5_ct_fs *fs, struct mlx5_flow_spec *spec,</div><div class='ctx'> 			    struct mlx5_flow_attr *attr, struct flow_rule *flow_rule)</div><div class='hunk'>@@ -304,7 +231,7 @@ mlx5_ct_fs_smfs_ct_rule_add(struct mlx5_ct_fs *fs, struct mlx5_flow_spec *spec,</div><div class='ctx'> 	int num_actions = 0, err;</div><div class='ctx'> 	bool nat, tcp, ipv4, gre;</div><div class='ctx'> </div><div class='del'>-	if (!mlx5_ct_fs_smfs_ct_validate_flow_rule(fs, flow_rule))</div><div class='add'>+	if (!mlx5e_tc_ct_is_valid_flow_rule(fs-&gt;netdev, flow_rule))</div><div class='ctx'> 		return ERR_PTR(-EOPNOTSUPP);</div><div class='ctx'> </div><div class='ctx'> 	smfs_rule = kzalloc(sizeof(*smfs_rule), GFP_KERNEL);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c<br/>index 8afcec0c5d3c..991f47050643 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c</a></div><div class='hunk'>@@ -93,8 +93,8 @@ mlx5e_int_port_create_rx_rule(struct mlx5_eswitch *esw,</div><div class='ctx'> 	flow_rule = mlx5_add_flow_rules(esw-&gt;offloads.ft_offloads, spec,</div><div class='ctx'> 					&amp;flow_act, dest, 1);</div><div class='ctx'> 	if (IS_ERR(flow_rule))</div><div class='del'>-		mlx5_core_warn(esw-&gt;dev, "ft offloads: Failed to add internal vport rx rule err %ld\n",</div><div class='del'>-			       PTR_ERR(flow_rule));</div><div class='add'>+		mlx5_core_warn(esw-&gt;dev, "ft offloads: Failed to add internal vport rx rule err %pe\n",</div><div class='add'>+			       flow_rule);</div><div class='ctx'> </div><div class='ctx'> 	kvfree(spec);</div><div class='ctx'> </div><div class='hunk'>@@ -307,7 +307,8 @@ mlx5e_tc_int_port_init(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_eswitch *esw = priv-&gt;mdev-&gt;priv.eswitch;</div><div class='ctx'> 	struct mlx5e_tc_int_port_priv *int_port_priv;</div><div class='del'>-	u64 mapping_id;</div><div class='add'>+	u8 mapping_id[MLX5_SW_IMAGE_GUID_MAX_BYTES];</div><div class='add'>+	u8 id_len;</div><div class='ctx'> </div><div class='ctx'> 	if (!mlx5e_tc_int_port_supported(esw))</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -316,14 +317,15 @@ mlx5e_tc_int_port_init(struct mlx5e_priv *priv)</div><div class='ctx'> 	if (!int_port_priv)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	mapping_id = mlx5_query_nic_system_image_guid(priv-&gt;mdev);</div><div class='add'>+	mlx5_query_nic_sw_system_image_guid(priv-&gt;mdev, mapping_id, &amp;id_len);</div><div class='ctx'> </div><div class='del'>-	int_port_priv-&gt;metadata_mapping = mapping_create_for_id(mapping_id, MAPPING_TYPE_INT_PORT,</div><div class='add'>+	int_port_priv-&gt;metadata_mapping = mapping_create_for_id(mapping_id, id_len,</div><div class='add'>+								MAPPING_TYPE_INT_PORT,</div><div class='ctx'> 								sizeof(u32) * 2,</div><div class='ctx'> 								(1 &lt;&lt; ESW_VPORT_BITS) - 1, true);</div><div class='ctx'> 	if (IS_ERR(int_port_priv-&gt;metadata_mapping)) {</div><div class='del'>-		mlx5_core_warn(priv-&gt;mdev, "Can't allocate metadata mapping of int port offload, err=%ld\n",</div><div class='del'>-			       PTR_ERR(int_port_priv-&gt;metadata_mapping));</div><div class='add'>+		mlx5_core_warn(priv-&gt;mdev, "Can't allocate metadata mapping of int port offload, err=%pe\n",</div><div class='add'>+			       int_port_priv-&gt;metadata_mapping);</div><div class='ctx'> 		goto err_mapping;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.c<br/>index 8218c892b161..7819fb297280 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.c</a></div><div class='hunk'>@@ -593,3 +593,8 @@ mlx5e_tc_meter_get_stats(struct mlx5e_flow_meter_handle *meter,</div><div class='ctx'> 	*drops = packets2;</div><div class='ctx'> 	*lastuse = max_t(u64, lastuse1, lastuse2);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int mlx5e_flow_meter_get_base_id(struct mlx5e_flow_meter_handle *meter)</div><div class='add'>+{</div><div class='add'>+	return meter-&gt;meters_obj-&gt;base_id;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.h b/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.h<br/>index 9b795cd106bb..d6afb6556875 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.h</a></div><div class='hunk'>@@ -72,4 +72,17 @@ void</div><div class='ctx'> mlx5e_tc_meter_get_stats(struct mlx5e_flow_meter_handle *meter,</div><div class='ctx'> 			 u64 *bytes, u64 *packets, u64 *drops, u64 *lastuse);</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_MLX5_CLS_ACT)</div><div class='add'>+</div><div class='add'>+int mlx5e_flow_meter_get_base_id(struct mlx5e_flow_meter_handle *meter);</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_MLX5_CLS_ACT */</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mlx5e_flow_meter_get_base_id(struct mlx5e_flow_meter_handle *meter)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_MLX5_CLS_ACT */</div><div class='add'>+</div><div class='ctx'> #endif /* __MLX5_EN_FLOW_METER_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c<br/>index 4877a9d86807..fc0e57403d25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c</a></div><div class='hunk'>@@ -866,7 +866,7 @@ mlx5_tc_ct_entry_add_rule(struct mlx5_tc_ct_priv *ct_priv,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_rule:</div><div class='del'>-	mlx5_tc_ct_entry_destroy_mod_hdr(ct_priv, zone_rule-&gt;attr, zone_rule-&gt;mh);</div><div class='add'>+	mlx5_tc_ct_entry_destroy_mod_hdr(ct_priv, attr, zone_rule-&gt;mh);</div><div class='ctx'> 	mlx5_put_label_mapping(ct_priv, attr-&gt;ct_attr.ct_labels_id);</div><div class='ctx'> err_mod_hdr:</div><div class='ctx'> 	kfree(attr);</div><div class='hunk'>@@ -1195,6 +1195,7 @@ mlx5_tc_ct_block_flow_offload_add(struct mlx5_ct_ft *ft,</div><div class='ctx'> 	struct flow_action_entry *meta_action;</div><div class='ctx'> 	unsigned long cookie = flow-&gt;cookie;</div><div class='ctx'> 	struct mlx5_ct_entry *entry;</div><div class='add'>+	bool has_nat;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	meta_action = mlx5_tc_ct_get_ct_metadata_action(flow_rule);</div><div class='hunk'>@@ -1236,6 +1237,8 @@ mlx5_tc_ct_block_flow_offload_add(struct mlx5_ct_ft *ft,</div><div class='ctx'> 	err = mlx5_tc_ct_rule_to_tuple_nat(&amp;entry-&gt;tuple_nat, flow_rule);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_set;</div><div class='add'>+	has_nat = memcmp(&amp;entry-&gt;tuple, &amp;entry-&gt;tuple_nat,</div><div class='add'>+			 sizeof(entry-&gt;tuple));</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;ct_priv-&gt;ht_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1244,7 +1247,7 @@ mlx5_tc_ct_block_flow_offload_add(struct mlx5_ct_ft *ft,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_entries;</div><div class='ctx'> </div><div class='del'>-	if (memcmp(&amp;entry-&gt;tuple, &amp;entry-&gt;tuple_nat, sizeof(entry-&gt;tuple))) {</div><div class='add'>+	if (has_nat) {</div><div class='ctx'> 		err = rhashtable_lookup_insert_fast(&amp;ct_priv-&gt;ct_tuples_nat_ht,</div><div class='ctx'> 						    &amp;entry-&gt;tuple_nat_node,</div><div class='ctx'> 						    tuples_nat_ht_params);</div><div class='hunk'>@@ -1349,6 +1352,32 @@ mlx5_tc_ct_block_flow_offload_stats(struct mlx5_ct_ft *ft,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+mlx5_tc_ct_filter_legacy_non_nic_flows(struct mlx5_ct_ft *ft,</div><div class='add'>+				       struct flow_cls_offload *flow)</div><div class='add'>+{</div><div class='add'>+	struct flow_rule *rule = flow_cls_offload_flow_rule(flow);</div><div class='add'>+	struct mlx5_tc_ct_priv *ct_priv = ft-&gt;ct_priv;</div><div class='add'>+	struct flow_match_meta match;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	bool same_dev = false;</div><div class='add'>+</div><div class='add'>+	if (!is_mdev_legacy_mode(ct_priv-&gt;dev) ||</div><div class='add'>+	    !flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	flow_rule_match_meta(rule, &amp;match);</div><div class='add'>+</div><div class='add'>+	if (!(match.key-&gt;ingress_ifindex &amp; match.mask-&gt;ingress_ifindex))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	netdev = dev_get_by_index(&amp;init_net, match.key-&gt;ingress_ifindex);</div><div class='add'>+	same_dev = ct_priv-&gt;netdev == netdev;</div><div class='add'>+	dev_put(netdev);</div><div class='add'>+</div><div class='add'>+	return same_dev;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> mlx5_tc_ct_block_flow_offload(enum tc_setup_type type, void *type_data,</div><div class='ctx'> 			      void *cb_priv)</div><div class='hunk'>@@ -1361,6 +1390,9 @@ mlx5_tc_ct_block_flow_offload(enum tc_setup_type type, void *type_data,</div><div class='ctx'> </div><div class='ctx'> 	switch (f-&gt;command) {</div><div class='ctx'> 	case FLOW_CLS_REPLACE:</div><div class='add'>+		if (!mlx5_tc_ct_filter_legacy_non_nic_flows(ft, f))</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 		return mlx5_tc_ct_block_flow_offload_add(ft, f);</div><div class='ctx'> 	case FLOW_CLS_DESTROY:</div><div class='ctx'> 		return mlx5_tc_ct_block_flow_offload_del(ft, f);</div><div class='hunk'>@@ -2065,10 +2097,19 @@ mlx5_tc_ct_fs_init(struct mlx5_tc_ct_priv *ct_priv)</div><div class='ctx'> 	struct mlx5_ct_fs_ops *fs_ops = mlx5_ct_fs_dmfs_ops_get();</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (ct_priv-&gt;ns_type == MLX5_FLOW_NAMESPACE_FDB &amp;&amp;</div><div class='del'>-	    ct_priv-&gt;dev-&gt;priv.steering-&gt;mode == MLX5_FLOW_STEERING_MODE_SMFS) {</div><div class='del'>-		ct_dbg("Using SMFS ct flow steering provider");</div><div class='del'>-		fs_ops = mlx5_ct_fs_smfs_ops_get();</div><div class='add'>+	if (ct_priv-&gt;ns_type == MLX5_FLOW_NAMESPACE_FDB) {</div><div class='add'>+		if (ct_priv-&gt;dev-&gt;priv.steering-&gt;mode == MLX5_FLOW_STEERING_MODE_HMFS) {</div><div class='add'>+			ct_dbg("Using HMFS ct flow steering provider");</div><div class='add'>+			fs_ops = mlx5_ct_fs_hmfs_ops_get();</div><div class='add'>+		} else if (ct_priv-&gt;dev-&gt;priv.steering-&gt;mode == MLX5_FLOW_STEERING_MODE_SMFS) {</div><div class='add'>+			ct_dbg("Using SMFS ct flow steering provider");</div><div class='add'>+			fs_ops = mlx5_ct_fs_smfs_ops_get();</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!fs_ops) {</div><div class='add'>+			ct_dbg("Requested flow steering mode is not enabled.");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ct_priv-&gt;fs = kzalloc(sizeof(*ct_priv-&gt;fs) + fs_ops-&gt;priv_size, GFP_KERNEL);</div><div class='hunk'>@@ -2246,9 +2287,10 @@ mlx5_tc_ct_init(struct mlx5e_priv *priv, struct mlx5_fs_chains *chains,</div><div class='ctx'> 		enum mlx5_flow_namespace_type ns_type,</div><div class='ctx'> 		struct mlx5e_post_act *post_act)</div><div class='ctx'> {</div><div class='add'>+	u8 mapping_id[MLX5_SW_IMAGE_GUID_MAX_BYTES];</div><div class='ctx'> 	struct mlx5_tc_ct_priv *ct_priv;</div><div class='ctx'> 	struct mlx5_core_dev *dev;</div><div class='del'>-	u64 mapping_id;</div><div class='add'>+	u8 id_len;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	dev = priv-&gt;mdev;</div><div class='hunk'>@@ -2260,16 +2302,18 @@ mlx5_tc_ct_init(struct mlx5e_priv *priv, struct mlx5_fs_chains *chains,</div><div class='ctx'> 	if (!ct_priv)</div><div class='ctx'> 		goto err_alloc;</div><div class='ctx'> </div><div class='del'>-	mapping_id = mlx5_query_nic_system_image_guid(dev);</div><div class='add'>+	mlx5_query_nic_sw_system_image_guid(dev, mapping_id, &amp;id_len);</div><div class='ctx'> </div><div class='del'>-	ct_priv-&gt;zone_mapping = mapping_create_for_id(mapping_id, MAPPING_TYPE_ZONE,</div><div class='add'>+	ct_priv-&gt;zone_mapping = mapping_create_for_id(mapping_id, id_len,</div><div class='add'>+						      MAPPING_TYPE_ZONE,</div><div class='ctx'> 						      sizeof(u16), 0, true);</div><div class='ctx'> 	if (IS_ERR(ct_priv-&gt;zone_mapping)) {</div><div class='ctx'> 		err = PTR_ERR(ct_priv-&gt;zone_mapping);</div><div class='ctx'> 		goto err_mapping_zone;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ct_priv-&gt;labels_mapping = mapping_create_for_id(mapping_id, MAPPING_TYPE_LABELS,</div><div class='add'>+	ct_priv-&gt;labels_mapping = mapping_create_for_id(mapping_id, id_len,</div><div class='add'>+							MAPPING_TYPE_LABELS,</div><div class='ctx'> 							sizeof(u32) * 4, 0, true);</div><div class='ctx'> 	if (IS_ERR(ct_priv-&gt;labels_mapping)) {</div><div class='ctx'> 		err = PTR_ERR(ct_priv-&gt;labels_mapping);</div><div class='hunk'>@@ -2421,3 +2465,74 @@ out_inc_drop:</div><div class='ctx'> 	atomic_inc(&amp;ct_priv-&gt;debugfs.stats.rx_dropped);</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static bool mlx5e_tc_ct_valid_used_dissector_keys(const u64 used_keys)</div><div class='add'>+{</div><div class='add'>+#define DISS_BIT(name) BIT_ULL(FLOW_DISSECTOR_KEY_ ## name)</div><div class='add'>+	const u64 basic_keys = DISS_BIT(BASIC) | DISS_BIT(CONTROL) |</div><div class='add'>+				DISS_BIT(META);</div><div class='add'>+	const u64 ipv4_tcp = basic_keys | DISS_BIT(IPV4_ADDRS) |</div><div class='add'>+				DISS_BIT(PORTS) | DISS_BIT(TCP);</div><div class='add'>+	const u64 ipv6_tcp = basic_keys | DISS_BIT(IPV6_ADDRS) |</div><div class='add'>+				DISS_BIT(PORTS) | DISS_BIT(TCP);</div><div class='add'>+	const u64 ipv4_udp = basic_keys | DISS_BIT(IPV4_ADDRS) |</div><div class='add'>+				DISS_BIT(PORTS);</div><div class='add'>+	const u64 ipv6_udp = basic_keys | DISS_BIT(IPV6_ADDRS) |</div><div class='add'>+				 DISS_BIT(PORTS);</div><div class='add'>+	const u64 ipv4_gre = basic_keys | DISS_BIT(IPV4_ADDRS);</div><div class='add'>+	const u64 ipv6_gre = basic_keys | DISS_BIT(IPV6_ADDRS);</div><div class='add'>+</div><div class='add'>+	return (used_keys == ipv4_tcp || used_keys == ipv4_udp || used_keys == ipv6_tcp ||</div><div class='add'>+		used_keys == ipv6_udp || used_keys == ipv4_gre || used_keys == ipv6_gre);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mlx5e_tc_ct_is_valid_flow_rule(const struct net_device *dev, struct flow_rule *flow_rule)</div><div class='add'>+{</div><div class='add'>+	struct flow_match_ipv4_addrs ipv4_addrs;</div><div class='add'>+	struct flow_match_ipv6_addrs ipv6_addrs;</div><div class='add'>+	struct flow_match_control control;</div><div class='add'>+	struct flow_match_basic basic;</div><div class='add'>+	struct flow_match_ports ports;</div><div class='add'>+	struct flow_match_tcp tcp;</div><div class='add'>+</div><div class='add'>+	if (!mlx5e_tc_ct_valid_used_dissector_keys(flow_rule-&gt;match.dissector-&gt;used_keys)) {</div><div class='add'>+		netdev_dbg(dev, "ct_debug: rule uses unexpected dissectors (0x%016llx)",</div><div class='add'>+			   flow_rule-&gt;match.dissector-&gt;used_keys);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow_rule_match_basic(flow_rule, &amp;basic);</div><div class='add'>+	flow_rule_match_control(flow_rule, &amp;control);</div><div class='add'>+	flow_rule_match_ipv4_addrs(flow_rule, &amp;ipv4_addrs);</div><div class='add'>+	flow_rule_match_ipv6_addrs(flow_rule, &amp;ipv6_addrs);</div><div class='add'>+	if (basic.key-&gt;ip_proto != IPPROTO_GRE)</div><div class='add'>+		flow_rule_match_ports(flow_rule, &amp;ports);</div><div class='add'>+	if (basic.key-&gt;ip_proto == IPPROTO_TCP)</div><div class='add'>+		flow_rule_match_tcp(flow_rule, &amp;tcp);</div><div class='add'>+</div><div class='add'>+	if (basic.mask-&gt;n_proto != htons(0xFFFF) ||</div><div class='add'>+	    (basic.key-&gt;n_proto != htons(ETH_P_IP) &amp;&amp; basic.key-&gt;n_proto != htons(ETH_P_IPV6)) ||</div><div class='add'>+	    basic.mask-&gt;ip_proto != 0xFF ||</div><div class='add'>+	    (basic.key-&gt;ip_proto != IPPROTO_UDP &amp;&amp; basic.key-&gt;ip_proto != IPPROTO_TCP &amp;&amp;</div><div class='add'>+	     basic.key-&gt;ip_proto != IPPROTO_GRE)) {</div><div class='add'>+		netdev_dbg(dev, "ct_debug: rule uses unexpected basic match (n_proto 0x%04x/0x%04x, ip_proto 0x%02x/0x%02x)",</div><div class='add'>+			   ntohs(basic.key-&gt;n_proto), ntohs(basic.mask-&gt;n_proto),</div><div class='add'>+			   basic.key-&gt;ip_proto, basic.mask-&gt;ip_proto);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (basic.key-&gt;ip_proto != IPPROTO_GRE &amp;&amp;</div><div class='add'>+	    (ports.mask-&gt;src != htons(0xFFFF) || ports.mask-&gt;dst != htons(0xFFFF))) {</div><div class='add'>+		netdev_dbg(dev, "ct_debug: rule uses ports match (src 0x%04x, dst 0x%04x)",</div><div class='add'>+			   ports.mask-&gt;src, ports.mask-&gt;dst);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (basic.key-&gt;ip_proto == IPPROTO_TCP &amp;&amp; tcp.mask-&gt;flags != MLX5_CT_TCP_FLAGS_MASK) {</div><div class='add'>+		netdev_dbg(dev, "ct_debug: rule uses unexpected tcp match (flags 0x%02x)",</div><div class='add'>+			   tcp.mask-&gt;flags);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h<br/>index b66c5f98067f..5e9dbdd4a5e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h</a></div><div class='hunk'>@@ -128,6 +128,9 @@ bool</div><div class='ctx'> mlx5e_tc_ct_restore_flow(struct mlx5_tc_ct_priv *ct_priv,</div><div class='ctx'> 			 struct sk_buff *skb, u8 zone_restore_id);</div><div class='ctx'> </div><div class='add'>+#define MLX5_CT_TCP_FLAGS_MASK cpu_to_be16(be32_to_cpu(TCP_FLAG_RST | TCP_FLAG_FIN) &gt;&gt; 16)</div><div class='add'>+bool mlx5e_tc_ct_is_valid_flow_rule(const struct net_device *dev, struct flow_rule *flow_rule);</div><div class='add'>+</div><div class='ctx'> #else /* CONFIG_MLX5_TC_CT */</div><div class='ctx'> </div><div class='ctx'> static inline struct mlx5_tc_ct_priv *</div><div class='hunk'>@@ -202,5 +205,12 @@ mlx5e_tc_ct_restore_flow(struct mlx5_tc_ct_priv *ct_priv,</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool</div><div class='add'>+mlx5e_tc_ct_is_valid_flow_rule(const struct net_device *dev,</div><div class='add'>+			       struct flow_rule *flow_rule)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* !IS_ENABLED(CONFIG_MLX5_TC_CT) */</div><div class='ctx'> #endif /* __MLX5_EN_TC_CT_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c<br/>index 721f35e59757..a14f216048cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='ctx'> /* Copyright (c) 2018 Mellanox Technologies. */</div><div class='ctx'> </div><div class='del'>-#include &lt;net/inet_ecn.h&gt;</div><div class='add'>+#include &lt;net/flow.h&gt;</div><div class='add'>+#include &lt;net/inet_dscp.h&gt;</div><div class='ctx'> #include &lt;net/vxlan.h&gt;</div><div class='ctx'> #include &lt;net/gre.h&gt;</div><div class='ctx'> #include &lt;net/geneve.h&gt;</div><div class='hunk'>@@ -31,8 +32,7 @@ static void mlx5e_tc_tun_route_attr_cleanup(struct mlx5e_tc_tun_route_attr *attr</div><div class='ctx'> {</div><div class='ctx'> 	if (attr-&gt;n)</div><div class='ctx'> 		neigh_release(attr-&gt;n);</div><div class='del'>-	if (attr-&gt;route_dev)</div><div class='del'>-		dev_put(attr-&gt;route_dev);</div><div class='add'>+	dev_put(attr-&gt;route_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_tc_tunnel *mlx5e_get_tc_tun(struct net_device *tunnel_dev)</div><div class='hunk'>@@ -68,16 +68,14 @@ static int get_route_and_out_devs(struct mlx5e_priv *priv,</div><div class='ctx'> 	 * while holding rcu read lock. Take the net_device for correctness</div><div class='ctx'> 	 * sake.</div><div class='ctx'> 	 */</div><div class='del'>-	if (uplink_upper)</div><div class='del'>-		dev_hold(uplink_upper);</div><div class='add'>+	dev_hold(uplink_upper);</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	dst_is_lag_dev = (uplink_upper &amp;&amp;</div><div class='ctx'> 			  netif_is_lag_master(uplink_upper) &amp;&amp;</div><div class='ctx'> 			  real_dev == uplink_upper &amp;&amp;</div><div class='ctx'> 			  mlx5_lag_is_sriov(priv-&gt;mdev));</div><div class='del'>-	if (uplink_upper)</div><div class='del'>-		dev_put(uplink_upper);</div><div class='add'>+	dev_put(uplink_upper);</div><div class='ctx'> </div><div class='ctx'> 	/* if the egress device isn't on the same HW e-switch or</div><div class='ctx'> 	 * it's a LAG device, use the uplink</div><div class='hunk'>@@ -236,7 +234,7 @@ int mlx5e_tc_tun_create_header_ipv4(struct mlx5e_priv *priv,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* add the IP fields */</div><div class='del'>-	attr.fl.fl4.flowi4_tos = tun_key-&gt;tos &amp; ~INET_ECN_MASK;</div><div class='add'>+	attr.fl.fl4.flowi4_dscp = inet_dsfield_to_dscp(tun_key-&gt;tos);</div><div class='ctx'> 	attr.fl.fl4.daddr = tun_key-&gt;u.ipv4.dst;</div><div class='ctx'> 	attr.fl.fl4.saddr = tun_key-&gt;u.ipv4.src;</div><div class='ctx'> 	attr.ttl = tun_key-&gt;ttl;</div><div class='hunk'>@@ -352,7 +350,7 @@ int mlx5e_tc_tun_update_header_ipv4(struct mlx5e_priv *priv,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* add the IP fields */</div><div class='del'>-	attr.fl.fl4.flowi4_tos = tun_key-&gt;tos &amp; ~INET_ECN_MASK;</div><div class='add'>+	attr.fl.fl4.flowi4_dscp = inet_dsfield_to_dscp(tun_key-&gt;tos);</div><div class='ctx'> 	attr.fl.fl4.daddr = tun_key-&gt;u.ipv4.dst;</div><div class='ctx'> 	attr.fl.fl4.saddr = tun_key-&gt;u.ipv4.src;</div><div class='ctx'> 	attr.ttl = tun_key-&gt;ttl;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c<br/>index 878cbdbf5ec8..0735d10f2bac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;net/nexthop.h&gt;</div><div class='ctx'> #include &lt;net/ip_tunnels.h&gt;</div><div class='ctx'> #include "tc_tun_encap.h"</div><div class='add'>+#include "fs_core.h"</div><div class='ctx'> #include "en_tc.h"</div><div class='ctx'> #include "tc_tun.h"</div><div class='ctx'> #include "rep/tc.h"</div><div class='hunk'>@@ -24,17 +25,24 @@ static int mlx5e_set_int_port_tunnel(struct mlx5e_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	route_dev = dev_get_by_index(dev_net(e-&gt;out_dev), e-&gt;route_dev_ifindex);</div><div class='ctx'> </div><div class='del'>-	if (!route_dev || !netif_is_ovs_master(route_dev) ||</div><div class='del'>-	    attr-&gt;parse_attr-&gt;filter_dev == e-&gt;out_dev)</div><div class='add'>+	if (!route_dev || !netif_is_ovs_master(route_dev))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;mdev-&gt;priv.steering-&gt;mode == MLX5_FLOW_STEERING_MODE_DMFS &amp;&amp;</div><div class='add'>+	    mlx5e_eswitch_uplink_rep(attr-&gt;parse_attr-&gt;filter_dev) &amp;&amp;</div><div class='add'>+	    (attr-&gt;esw_attr-&gt;dests[out_index].flags &amp; MLX5_ESW_DEST_ENCAP)) {</div><div class='add'>+		mlx5_core_warn(priv-&gt;mdev,</div><div class='add'>+			       "Matching on external port with encap + fwd to table actions is not allowed for firmware steering\n");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = mlx5e_set_fwd_to_int_port_actions(priv, attr, e-&gt;route_dev_ifindex,</div><div class='ctx'> 						MLX5E_TC_INT_PORT_EGRESS,</div><div class='ctx'> 						&amp;attr-&gt;action, out_index);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (route_dev)</div><div class='del'>-		dev_put(route_dev);</div><div class='add'>+	dev_put(route_dev);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -164,8 +172,8 @@ void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv,</div><div class='ctx'> 						     &amp;reformat_params,</div><div class='ctx'> 						     MLX5_FLOW_NAMESPACE_FDB);</div><div class='ctx'> 	if (IS_ERR(e-&gt;pkt_reformat)) {</div><div class='del'>-		mlx5_core_warn(priv-&gt;mdev, "Failed to offload cached encapsulation header, %lu\n",</div><div class='del'>-			       PTR_ERR(e-&gt;pkt_reformat));</div><div class='add'>+		mlx5_core_warn(priv-&gt;mdev, "Failed to offload cached encapsulation header, %pe\n",</div><div class='add'>+			       e-&gt;pkt_reformat);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	e-&gt;flags |= MLX5_ENCAP_ENTRY_VALID;</div><div class='hunk'>@@ -744,8 +752,7 @@ static int mlx5e_set_vf_tunnel(struct mlx5_eswitch *esw,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (route_dev)</div><div class='del'>-		dev_put(route_dev);</div><div class='add'>+	dev_put(route_dev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -779,8 +786,7 @@ static int mlx5e_update_vf_tunnel(struct mlx5_eswitch *esw,</div><div class='ctx'> 	mlx5e_tc_match_to_reg_mod_hdr_change(esw-&gt;dev, mod_hdr_acts, VPORT_TO_REG, act_id, data);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if (route_dev)</div><div class='del'>-		dev_put(route_dev);</div><div class='add'>+	dev_put(route_dev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1839,8 +1845,8 @@ static int mlx5e_tc_tun_fib_event(struct notifier_block *nb, unsigned long event</div><div class='ctx'> 			queue_work(priv-&gt;wq, &amp;fib_work-&gt;work);</div><div class='ctx'> 		} else if (IS_ERR(fib_work)) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(info-&gt;extack, "Failed to init fib work");</div><div class='del'>-			mlx5_core_warn(priv-&gt;mdev, "Failed to init fib work, %ld\n",</div><div class='del'>-				       PTR_ERR(fib_work));</div><div class='add'>+			mlx5_core_warn(priv-&gt;mdev, "Failed to init fib work, %pe\n",</div><div class='add'>+				       fib_work);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c<br/>index e4e487c8431b..7a18a469961d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c</a></div><div class='hunk'>@@ -140,7 +140,7 @@ static int mlx5e_tc_tun_parse_vxlan_gbp_option(struct mlx5e_priv *priv,</div><div class='ctx'> 	gbp_mask = (u32 *)&amp;enc_opts.mask-&gt;data[0];</div><div class='ctx'> </div><div class='ctx'> 	if (*gbp_mask &amp; ~VXLAN_GBP_MASK) {</div><div class='del'>-		NL_SET_ERR_MSG_FMT_MOD(extack, "Wrong VxLAN GBP mask(0x%08X)\n", *gbp_mask);</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack, "Wrong VxLAN GBP mask(0x%08X)", *gbp_mask);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -165,9 +165,6 @@ static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv,</div><div class='ctx'> 	struct flow_match_enc_keyid enc_keyid;</div><div class='ctx'> 	void *misc_c, *misc_v;</div><div class='ctx'> </div><div class='del'>-	misc_c = MLX5_ADDR_OF(fte_match_param, spec-&gt;match_criteria, misc_parameters);</div><div class='del'>-	misc_v = MLX5_ADDR_OF(fte_match_param, spec-&gt;match_value, misc_parameters);</div><div class='del'>-</div><div class='ctx'> 	if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -182,6 +179,30 @@ static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv,</div><div class='ctx'> 		err = mlx5e_tc_tun_parse_vxlan_gbp_option(priv, spec, f);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='add'>+</div><div class='add'>+		/* We can't mix custom tunnel headers with symbolic ones and we</div><div class='add'>+		 * don't have a symbolic field name for GBP, so we use custom</div><div class='add'>+		 * tunnel headers in this case. We need hardware support to</div><div class='add'>+		 * match on custom tunnel headers, but we already know it's</div><div class='add'>+		 * supported because the previous call successfully checked for</div><div class='add'>+		 * that.</div><div class='add'>+		 */</div><div class='add'>+		misc_c = MLX5_ADDR_OF(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+				      misc_parameters_5);</div><div class='add'>+		misc_v = MLX5_ADDR_OF(fte_match_param, spec-&gt;match_value,</div><div class='add'>+				      misc_parameters_5);</div><div class='add'>+</div><div class='add'>+		/* Shift by 8 to account for the reserved bits in the vxlan</div><div class='add'>+		 * header after the VNI.</div><div class='add'>+		 */</div><div class='add'>+		MLX5_SET(fte_match_set_misc5, misc_c, tunnel_header_1,</div><div class='add'>+			 be32_to_cpu(enc_keyid.mask-&gt;keyid) &lt;&lt; 8);</div><div class='add'>+		MLX5_SET(fte_match_set_misc5, misc_v, tunnel_header_1,</div><div class='add'>+			 be32_to_cpu(enc_keyid.key-&gt;keyid) &lt;&lt; 8);</div><div class='add'>+</div><div class='add'>+		spec-&gt;match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_5;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* match on VNI is required */</div><div class='hunk'>@@ -195,6 +216,11 @@ static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv,</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	misc_c = MLX5_ADDR_OF(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+			      misc_parameters);</div><div class='add'>+	misc_v = MLX5_ADDR_OF(fte_match_param, spec-&gt;match_value,</div><div class='add'>+			      misc_parameters);</div><div class='add'>+</div><div class='ctx'> 	MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,</div><div class='ctx'> 		 be32_to_cpu(enc_keyid.mask-&gt;keyid));</div><div class='ctx'> 	MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c b/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c<br/>index 11f724ad90db..0b55e77f19c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tir.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tir.c</a></div><div class='hunk'>@@ -124,7 +124,7 @@ void mlx5e_tir_builder_build_rss(struct mlx5e_tir_builder *builder,</div><div class='ctx'> 		const size_t len = MLX5_FLD_SZ_BYTES(tirc, rx_hash_toeplitz_key);</div><div class='ctx'> 		void *rss_key = MLX5_ADDR_OF(tirc, tirc, rx_hash_toeplitz_key);</div><div class='ctx'> </div><div class='del'>-		MLX5_SET(tirc, tirc, rx_hash_symmetric, 1);</div><div class='add'>+		MLX5_SET(tirc, tirc, rx_hash_symmetric, rss_hash-&gt;symmetric);</div><div class='ctx'> 		memcpy(rss_key, rss_hash-&gt;toeplitz_hash_key, len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -146,6 +146,31 @@ void mlx5e_tir_builder_build_direct(struct mlx5e_tir_builder *builder)</div><div class='ctx'> 	MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_INVERTED_XOR8);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mlx5e_tir_context_self_lb_block(void *tirc, bool enable_uc_lb,</div><div class='add'>+					    bool enable_mc_lb)</div><div class='add'>+{</div><div class='add'>+	u8 lb_flags = 0;</div><div class='add'>+</div><div class='add'>+	if (enable_uc_lb)</div><div class='add'>+		lb_flags = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;</div><div class='add'>+	if (enable_mc_lb)</div><div class='add'>+		lb_flags |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(tirc, tirc, self_lb_block, lb_flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5e_tir_builder_build_self_lb_block(struct mlx5e_tir_builder *builder,</div><div class='add'>+					   bool enable_uc_lb,</div><div class='add'>+					   bool enable_mc_lb)</div><div class='add'>+{</div><div class='add'>+	void *tirc = mlx5e_tir_builder_get_tirc(builder);</div><div class='add'>+</div><div class='add'>+	if (builder-&gt;modify)</div><div class='add'>+		MLX5_SET(modify_tir_in, builder-&gt;in, bitmask.self_lb_en, 1);</div><div class='add'>+</div><div class='add'>+	mlx5e_tir_context_self_lb_block(tirc, enable_uc_lb, enable_mc_lb);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5e_tir_builder_build_tls(struct mlx5e_tir_builder *builder)</div><div class='ctx'> {</div><div class='ctx'> 	void *tirc = mlx5e_tir_builder_get_tirc(builder);</div><div class='hunk'>@@ -153,9 +178,7 @@ void mlx5e_tir_builder_build_tls(struct mlx5e_tir_builder *builder)</div><div class='ctx'> 	WARN_ON(builder-&gt;modify);</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(tirc, tirc, tls_en, 1);</div><div class='del'>-	MLX5_SET(tirc, tirc, self_lb_block,</div><div class='del'>-		 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST |</div><div class='del'>-		 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST);</div><div class='add'>+	mlx5e_tir_context_self_lb_block(tirc, true, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5e_tir_init(struct mlx5e_tir *tir, struct mlx5e_tir_builder *builder,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tir.h b/drivers/net/ethernet/mellanox/mlx5/core/en/tir.h<br/>index 857a84bcd53a..958eeb959a19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tir.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/tir.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/tir.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/tir.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> struct mlx5e_rss_params_hash {</div><div class='ctx'> 	u8 hfunc;</div><div class='ctx'> 	u8 toeplitz_hash_key[40];</div><div class='add'>+	bool symmetric;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_rss_params_traffic_type {</div><div class='hunk'>@@ -34,6 +35,9 @@ void mlx5e_tir_builder_build_rss(struct mlx5e_tir_builder *builder,</div><div class='ctx'> 				 const struct mlx5e_rss_params_traffic_type *rss_tt,</div><div class='ctx'> 				 bool inner);</div><div class='ctx'> void mlx5e_tir_builder_build_direct(struct mlx5e_tir_builder *builder);</div><div class='add'>+void mlx5e_tir_builder_build_self_lb_block(struct mlx5e_tir_builder *builder,</div><div class='add'>+					   bool enable_uc_lb,</div><div class='add'>+					   bool enable_mc_lb);</div><div class='ctx'> void mlx5e_tir_builder_build_tls(struct mlx5e_tir_builder *builder);</div><div class='ctx'> </div><div class='ctx'> struct mlx5_core_dev;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/trap.c b/drivers/net/ethernet/mellanox/mlx5/core/en/trap.c<br/>index 53ca16cb9c41..da8c44f46edb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/trap.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/trap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/trap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/trap.c</a></div><div class='hunk'>@@ -46,8 +46,8 @@ static void mlx5e_init_trap_rq(struct mlx5e_trap *t, struct mlx5e_params *params</div><div class='ctx'> 	rq-&gt;pdev         = t-&gt;pdev;</div><div class='ctx'> 	rq-&gt;netdev       = priv-&gt;netdev;</div><div class='ctx'> 	rq-&gt;priv         = priv;</div><div class='del'>-	rq-&gt;clock        = &amp;mdev-&gt;clock;</div><div class='del'>-	rq-&gt;tstamp       = &amp;priv-&gt;tstamp;</div><div class='add'>+	rq-&gt;clock        = mdev-&gt;clock;</div><div class='add'>+	rq-&gt;hwtstamp_config = &amp;priv-&gt;hwtstamp_config;</div><div class='ctx'> 	rq-&gt;mdev         = mdev;</div><div class='ctx'> 	rq-&gt;hw_mtu       = MLX5E_SW2HW_MTU(params, params-&gt;sw_mtu);</div><div class='ctx'> 	rq-&gt;stats        = &amp;priv-&gt;trap_stats.rq;</div><div class='hunk'>@@ -76,6 +76,7 @@ static int mlx5e_open_trap_rq(struct mlx5e_priv *priv, struct mlx5e_trap *t)</div><div class='ctx'> 	ccp.ch_stats = t-&gt;stats;</div><div class='ctx'> 	ccp.napi     = &amp;t-&gt;napi;</div><div class='ctx'> 	ccp.ix       = 0;</div><div class='add'>+	ccp.uar      = mdev-&gt;priv.bfreg.up;</div><div class='ctx'> 	err = mlx5e_open_cq(priv-&gt;mdev, trap_moder, &amp;rq_param-&gt;cqp, &amp;ccp, &amp;rq-&gt;cq);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -143,13 +144,12 @@ static struct mlx5e_trap *mlx5e_open_trap(struct mlx5e_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	t-&gt;priv     = priv;</div><div class='ctx'> 	t-&gt;mdev     = priv-&gt;mdev;</div><div class='del'>-	t-&gt;tstamp   = &amp;priv-&gt;tstamp;</div><div class='ctx'> 	t-&gt;pdev     = mlx5_core_dma_dev(priv-&gt;mdev);</div><div class='ctx'> 	t-&gt;netdev   = priv-&gt;netdev;</div><div class='ctx'> 	t-&gt;mkey_be  = cpu_to_be32(priv-&gt;mdev-&gt;mlx5e_res.hw_objs.mkey);</div><div class='ctx'> 	t-&gt;stats    = &amp;priv-&gt;trap_stats.ch;</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(netdev, &amp;t-&gt;napi, mlx5e_trap_napi_poll);</div><div class='add'>+	netif_napi_add_locked(netdev, &amp;t-&gt;napi, mlx5e_trap_napi_poll);</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_open_trap_rq(priv, t);</div><div class='ctx'> 	if (unlikely(err))</div><div class='hunk'>@@ -164,7 +164,7 @@ static struct mlx5e_trap *mlx5e_open_trap(struct mlx5e_priv *priv)</div><div class='ctx'> err_close_trap_rq:</div><div class='ctx'> 	mlx5e_close_trap_rq(&amp;t-&gt;rq);</div><div class='ctx'> err_napi_del:</div><div class='del'>-	netif_napi_del(&amp;t-&gt;napi);</div><div class='add'>+	netif_napi_del_locked(&amp;t-&gt;napi);</div><div class='ctx'> 	kvfree(t);</div><div class='ctx'> 	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='hunk'>@@ -173,13 +173,13 @@ void mlx5e_close_trap(struct mlx5e_trap *trap)</div><div class='ctx'> {</div><div class='ctx'> 	mlx5e_tir_destroy(&amp;trap-&gt;tir);</div><div class='ctx'> 	mlx5e_close_trap_rq(&amp;trap-&gt;rq);</div><div class='del'>-	netif_napi_del(&amp;trap-&gt;napi);</div><div class='add'>+	netif_napi_del_locked(&amp;trap-&gt;napi);</div><div class='ctx'> 	kvfree(trap);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_activate_trap(struct mlx5e_trap *trap)</div><div class='ctx'> {</div><div class='del'>-	napi_enable(&amp;trap-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;trap-&gt;napi);</div><div class='ctx'> 	mlx5e_activate_rq(&amp;trap-&gt;rq);</div><div class='ctx'> 	mlx5e_trigger_napi_sched(&amp;trap-&gt;napi);</div><div class='ctx'> }</div><div class='hunk'>@@ -189,7 +189,7 @@ void mlx5e_deactivate_trap(struct mlx5e_priv *priv)</div><div class='ctx'> 	struct mlx5e_trap *trap = priv-&gt;en_trap;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_deactivate_rq(&amp;trap-&gt;rq);</div><div class='del'>-	napi_disable(&amp;trap-&gt;napi);</div><div class='add'>+	napi_disable_locked(&amp;trap-&gt;napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct mlx5e_trap *mlx5e_add_trap_queue(struct mlx5e_priv *priv)</div><div class='hunk'>@@ -285,6 +285,7 @@ int mlx5e_handle_trap_event(struct mlx5e_priv *priv, struct mlx5_trap_ctx *trap_</div><div class='ctx'> 	if (!test_bit(MLX5E_STATE_OPENED, &amp;priv-&gt;state))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	netdev_lock(priv-&gt;netdev);</div><div class='ctx'> 	switch (trap_ctx-&gt;action) {</div><div class='ctx'> 	case DEVLINK_TRAP_ACTION_TRAP:</div><div class='ctx'> 		err = mlx5e_handle_action_trap(priv, trap_ctx-&gt;id);</div><div class='hunk'>@@ -297,6 +298,7 @@ int mlx5e_handle_trap_event(struct mlx5e_priv *priv, struct mlx5_trap_ctx *trap_</div><div class='ctx'> 			    trap_ctx-&gt;action);</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+	netdev_unlock(priv-&gt;netdev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/trap.h b/drivers/net/ethernet/mellanox/mlx5/core/en/trap.h<br/>index aa3f17658c6d..394e917ea2b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/trap.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/trap.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/trap.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/trap.h</a></div><div class='hunk'>@@ -22,7 +22,6 @@ struct mlx5e_trap {</div><div class='ctx'> 	/* control */</div><div class='ctx'> 	struct mlx5e_priv         *priv;</div><div class='ctx'> 	struct mlx5_core_dev      *mdev;</div><div class='del'>-	struct hwtstamp_config    *tstamp;</div><div class='ctx'> 	DECLARE_BITMAP(state, MLX5E_CHANNEL_NUM_STATES);</div><div class='ctx'> </div><div class='ctx'> 	struct mlx5e_params        params;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h b/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h<br/>index 5ec468268d1a..7e191e1569e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h</a></div><div class='hunk'>@@ -92,7 +92,7 @@ int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget);</div><div class='ctx'> void mlx5e_free_rx_descs(struct mlx5e_rq *rq);</div><div class='ctx'> void mlx5e_free_rx_missing_descs(struct mlx5e_rq *rq);</div><div class='ctx'> </div><div class='del'>-static inline bool mlx5e_rx_hw_stamp(struct hwtstamp_config *config)</div><div class='add'>+static inline bool mlx5e_rx_hw_stamp(struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	return config-&gt;rx_filter == HWTSTAMP_FILTER_ALL;</div><div class='ctx'> }</div><div class='hunk'>@@ -214,6 +214,19 @@ static inline u16 mlx5e_txqsq_get_next_pi(struct mlx5e_txqsq *sq, u16 size)</div><div class='ctx'> 	return pi;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline u16 mlx5e_txqsq_get_next_pi_anysize(struct mlx5e_txqsq *sq,</div><div class='add'>+						  u16 *size)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_wq_cyc *wq = &amp;sq-&gt;wq;</div><div class='add'>+	u16 pi, contig_wqebbs;</div><div class='add'>+</div><div class='add'>+	pi = mlx5_wq_cyc_ctr2ix(wq, sq-&gt;pc);</div><div class='add'>+	contig_wqebbs = mlx5_wq_cyc_get_contig_wqebbs(wq, pi);</div><div class='add'>+	*size = min_t(u16, contig_wqebbs, sq-&gt;max_sq_mpw_wqebbs);</div><div class='add'>+</div><div class='add'>+	return pi;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5e_txqsq_wake(struct mlx5e_txqsq *sq);</div><div class='ctx'> </div><div class='ctx'> static inline u16 mlx5e_shampo_get_cqe_header_index(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe)</div><div class='hunk'>@@ -296,10 +309,7 @@ mlx5e_notify_hw(struct mlx5_wq_cyc *wq, u16 pc, void __iomem *uar_map,</div><div class='ctx'> </div><div class='ctx'> static inline void mlx5e_cq_arm(struct mlx5e_cq *cq)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_cq *mcq;</div><div class='del'>-</div><div class='del'>-	mcq = &amp;cq-&gt;mcq;</div><div class='del'>-	mlx5_cq_arm(mcq, MLX5_CQ_DB_REQ_NOT, mcq-&gt;uar-&gt;map, cq-&gt;wq.cc);</div><div class='add'>+	mlx5_cq_arm(&amp;cq-&gt;mcq, MLX5_CQ_DB_REQ_NOT, cq-&gt;uar-&gt;map, cq-&gt;wq.cc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct mlx5e_sq_dma *</div><div class='hunk'>@@ -309,14 +319,24 @@ mlx5e_dma_get(struct mlx5e_txqsq *sq, u32 i)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='del'>-mlx5e_dma_push(struct mlx5e_txqsq *sq, dma_addr_t addr, u32 size,</div><div class='del'>-	       enum mlx5e_dma_map_type map_type)</div><div class='add'>+mlx5e_dma_push_single(struct mlx5e_txqsq *sq, dma_addr_t addr, u32 size)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_sq_dma *dma = mlx5e_dma_get(sq, sq-&gt;dma_fifo_pc++);</div><div class='ctx'> </div><div class='ctx'> 	dma-&gt;addr = addr;</div><div class='ctx'> 	dma-&gt;size = size;</div><div class='del'>-	dma-&gt;type = map_type;</div><div class='add'>+	dma-&gt;type = MLX5E_DMA_MAP_SINGLE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+mlx5e_dma_push_netmem(struct mlx5e_txqsq *sq, netmem_ref netmem,</div><div class='add'>+		      dma_addr_t addr, u32 size)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_sq_dma *dma = mlx5e_dma_get(sq, sq-&gt;dma_fifo_pc++);</div><div class='add'>+</div><div class='add'>+	netmem_dma_unmap_addr_set(netmem, dma, addr, addr);</div><div class='add'>+	dma-&gt;size = size;</div><div class='add'>+	dma-&gt;type = MLX5E_DMA_MAP_PAGE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline</div><div class='hunk'>@@ -349,7 +369,8 @@ mlx5e_tx_dma_unmap(struct device *pdev, struct mlx5e_sq_dma *dma)</div><div class='ctx'> 		dma_unmap_single(pdev, dma-&gt;addr, dma-&gt;size, DMA_TO_DEVICE);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5E_DMA_MAP_PAGE:</div><div class='del'>-		dma_unmap_page(pdev, dma-&gt;addr, dma-&gt;size, DMA_TO_DEVICE);</div><div class='add'>+		netmem_dma_unmap_page_attrs(pdev, dma-&gt;addr, dma-&gt;size,</div><div class='add'>+					    DMA_TO_DEVICE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ONCE(true, "mlx5e_tx_dma_unmap unknown DMA type!\n");</div><div class='hunk'>@@ -358,9 +379,9 @@ mlx5e_tx_dma_unmap(struct device *pdev, struct mlx5e_sq_dma *dma)</div><div class='ctx'> </div><div class='ctx'> void mlx5e_tx_mpwqe_ensure_complete(struct mlx5e_txqsq *sq);</div><div class='ctx'> </div><div class='del'>-static inline bool mlx5e_tx_mpwqe_is_full(struct mlx5e_tx_mpwqe *session, u8 max_sq_mpw_wqebbs)</div><div class='add'>+static inline bool mlx5e_tx_mpwqe_is_full(struct mlx5e_tx_mpwqe *session)</div><div class='ctx'> {</div><div class='del'>-	return session-&gt;ds_count == max_sq_mpw_wqebbs * MLX5_SEND_WQEBB_NUM_DS;</div><div class='add'>+	return session-&gt;ds_count == session-&gt;ds_count_max;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void mlx5e_rqwq_reset(struct mlx5e_rq *rq)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c b/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c<br/>index 4610621a340e..80f9fc10877a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c</a></div><div class='hunk'>@@ -179,7 +179,7 @@ static int mlx5e_xdp_rx_timestamp(const struct xdp_md *ctx, u64 *timestamp)</div><div class='ctx'> {</div><div class='ctx'> 	const struct mlx5e_xdp_buff *_ctx = (void *)ctx;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(!mlx5e_rx_hw_stamp(_ctx-&gt;rq-&gt;tstamp)))</div><div class='add'>+	if (unlikely(!mlx5e_rx_hw_stamp(_ctx-&gt;rq-&gt;hwtstamp_config)))</div><div class='ctx'> 		return -ENODATA;</div><div class='ctx'> </div><div class='ctx'> 	*timestamp =  mlx5e_cqe_ts_to_ns(_ctx-&gt;rq-&gt;ptp_cyc2time,</div><div class='hunk'>@@ -289,9 +289,9 @@ static u64 mlx5e_xsk_fill_timestamp(void *_priv)</div><div class='ctx'> 	ts = get_cqe_ts(priv-&gt;cqe);</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5_is_real_time_rq(priv-&gt;cq-&gt;mdev) || mlx5_is_real_time_sq(priv-&gt;cq-&gt;mdev))</div><div class='del'>-		return mlx5_real_time_cyc2time(&amp;priv-&gt;cq-&gt;mdev-&gt;clock, ts);</div><div class='add'>+		return mlx5_real_time_cyc2time(priv-&gt;cq-&gt;mdev-&gt;clock, ts);</div><div class='ctx'> </div><div class='del'>-	return  mlx5_timecounter_cyc2time(&amp;priv-&gt;cq-&gt;mdev-&gt;clock, ts);</div><div class='add'>+	return  mlx5_timecounter_cyc2time(priv-&gt;cq-&gt;mdev-&gt;clock, ts);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_xsk_request_checksum(u16 csum_start, u16 csum_offset, void *priv)</div><div class='hunk'>@@ -390,6 +390,7 @@ static void mlx5e_xdp_mpwqe_session_start(struct mlx5e_xdpsq *sq)</div><div class='ctx'> 		.wqe = wqe,</div><div class='ctx'> 		.bytes_count = 0,</div><div class='ctx'> 		.ds_count = MLX5E_TX_WQE_EMPTY_DS_COUNT,</div><div class='add'>+		.ds_count_max = sq-&gt;max_sq_mpw_wqebbs * MLX5_SEND_WQEBB_NUM_DS,</div><div class='ctx'> 		.pkt_count = 0,</div><div class='ctx'> 		.inline_on = mlx5e_xdp_get_inline_state(sq, session-&gt;inline_on),</div><div class='ctx'> 	};</div><div class='hunk'>@@ -501,7 +502,7 @@ mlx5e_xmit_xdp_frame_mpwqe(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptx</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_xdp_mpwqe_add_dseg(sq, p, stats);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(mlx5e_xdp_mpwqe_is_full(session, sq-&gt;max_sq_mpw_wqebbs)))</div><div class='add'>+	if (unlikely(mlx5e_xdp_mpwqe_is_full(session)))</div><div class='ctx'> 		mlx5e_xdp_mpwqe_complete(sq);</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;xmit++;</div><div class='hunk'>@@ -546,6 +547,7 @@ mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd,</div><div class='ctx'> 	bool inline_ok;</div><div class='ctx'> 	bool linear;</div><div class='ctx'> 	u16 pi;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	struct mlx5e_xdpsq_stats *stats = sq-&gt;stats;</div><div class='ctx'> </div><div class='hunk'>@@ -612,41 +614,33 @@ mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd,</div><div class='ctx'> </div><div class='ctx'> 	cseg-&gt;opmod_idx_opcode = cpu_to_be32((sq-&gt;pc &lt;&lt; 8) | MLX5_OPCODE_SEND);</div><div class='ctx'> </div><div class='del'>-	if (test_bit(MLX5E_SQ_STATE_XDP_MULTIBUF, &amp;sq-&gt;state)) {</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		memset(&amp;cseg-&gt;trailer, 0, sizeof(cseg-&gt;trailer));</div><div class='del'>-		memset(eseg, 0, sizeof(*eseg) - sizeof(eseg-&gt;trailer));</div><div class='del'>-</div><div class='del'>-		eseg-&gt;inline_hdr.sz = cpu_to_be16(inline_hdr_sz);</div><div class='add'>+	memset(&amp;cseg-&gt;trailer, 0, sizeof(cseg-&gt;trailer));</div><div class='add'>+	memset(eseg, 0, sizeof(*eseg) - sizeof(eseg-&gt;trailer));</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; num_frags; i++) {</div><div class='del'>-			skb_frag_t *frag = &amp;xdptxdf-&gt;sinfo-&gt;frags[i];</div><div class='del'>-			dma_addr_t addr;</div><div class='add'>+	eseg-&gt;inline_hdr.sz = cpu_to_be16(inline_hdr_sz);</div><div class='ctx'> </div><div class='del'>-			addr = xdptxdf-&gt;dma_arr ? xdptxdf-&gt;dma_arr[i] :</div><div class='del'>-				page_pool_get_dma_addr(skb_frag_page(frag)) +</div><div class='del'>-				skb_frag_off(frag);</div><div class='add'>+	for (i = 0; i &lt; num_frags; i++) {</div><div class='add'>+		skb_frag_t *frag = &amp;xdptxdf-&gt;sinfo-&gt;frags[i];</div><div class='add'>+		dma_addr_t addr;</div><div class='ctx'> </div><div class='del'>-			dseg-&gt;addr = cpu_to_be64(addr);</div><div class='del'>-			dseg-&gt;byte_count = cpu_to_be32(skb_frag_size(frag));</div><div class='del'>-			dseg-&gt;lkey = sq-&gt;mkey_be;</div><div class='del'>-			dseg++;</div><div class='del'>-		}</div><div class='add'>+		addr = xdptxdf-&gt;dma_arr ? xdptxdf-&gt;dma_arr[i] :</div><div class='add'>+			page_pool_get_dma_addr(skb_frag_page(frag)) +</div><div class='add'>+			skb_frag_off(frag);</div><div class='ctx'> </div><div class='del'>-		cseg-&gt;qpn_ds = cpu_to_be32((sq-&gt;sqn &lt;&lt; 8) | ds_cnt);</div><div class='add'>+		dseg-&gt;addr = cpu_to_be64(addr);</div><div class='add'>+		dseg-&gt;byte_count = cpu_to_be32(skb_frag_size(frag));</div><div class='add'>+		dseg-&gt;lkey = sq-&gt;mkey_be;</div><div class='add'>+		dseg++;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		sq-&gt;db.wqe_info[pi] = (struct mlx5e_xdp_wqe_info) {</div><div class='del'>-			.num_wqebbs = num_wqebbs,</div><div class='del'>-			.num_pkts = 1,</div><div class='del'>-		};</div><div class='add'>+	cseg-&gt;qpn_ds = cpu_to_be32((sq-&gt;sqn &lt;&lt; 8) | ds_cnt);</div><div class='ctx'> </div><div class='del'>-		sq-&gt;pc += num_wqebbs;</div><div class='del'>-	} else {</div><div class='del'>-		cseg-&gt;fm_ce_se = 0;</div><div class='add'>+	sq-&gt;db.wqe_info[pi] = (struct mlx5e_xdp_wqe_info) {</div><div class='add'>+		.num_wqebbs = num_wqebbs,</div><div class='add'>+		.num_pkts = 1,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-		sq-&gt;pc++;</div><div class='del'>-	}</div><div class='add'>+	sq-&gt;pc += num_wqebbs;</div><div class='ctx'> </div><div class='ctx'> 	xsk_tx_metadata_request(meta, &amp;mlx5e_xsk_tx_metadata_ops, eseg);</div><div class='ctx'> </div><div class='hunk'>@@ -713,10 +707,11 @@ static void mlx5e_free_xdpsq_desc(struct mlx5e_xdpsq *sq,</div><div class='ctx'> 				xdpi = mlx5e_xdpi_fifo_pop(xdpi_fifo);</div><div class='ctx'> 				page = xdpi.page.page;</div><div class='ctx'> </div><div class='del'>-				/* No need to check ((page-&gt;pp_magic &amp; ~0x3UL) == PP_SIGNATURE)</div><div class='del'>-				 * as we know this is a page_pool page.</div><div class='add'>+				/* No need to check page_pool_page_is_pp() as we</div><div class='add'>+				 * know this is a page_pool page.</div><div class='ctx'> 				 */</div><div class='del'>-				page_pool_recycle_direct(page-&gt;pp, page);</div><div class='add'>+				page_pool_recycle_direct(pp_page_to_nmdesc(page)-&gt;pp,</div><div class='add'>+							 page);</div><div class='ctx'> 			} while (++n &lt; num);</div><div class='ctx'> </div><div class='ctx'> 			break;</div><div class='hunk'>@@ -865,7 +860,7 @@ int mlx5e_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='ctx'> 	if (unlikely(sq_num &gt;= priv-&gt;channels.num))</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> </div><div class='del'>-	sq = &amp;priv-&gt;channels.c[sq_num]-&gt;xdpsq;</div><div class='add'>+	sq = priv-&gt;channels.c[sq_num]-&gt;xdpsq;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; n; i++) {</div><div class='ctx'> 		struct mlx5e_xmit_data_frags xdptxdf = {};</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h b/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h<br/>index e054db1e10f8..46ab0a9e8cdd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h</a></div><div class='hunk'>@@ -45,12 +45,6 @@</div><div class='ctx'> 	(MLX5E_XDP_INLINE_WQE_MAX_DS_CNT * MLX5_SEND_WQE_DS - \</div><div class='ctx'> 	 sizeof(struct mlx5_wqe_inline_seg))</div><div class='ctx'> </div><div class='del'>-struct mlx5e_xdp_buff {</div><div class='del'>-	struct xdp_buff xdp;</div><div class='del'>-	struct mlx5_cqe64 *cqe;</div><div class='del'>-	struct mlx5e_rq *rq;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* XDP packets can be transmitted in different ways. On completion, we need to</div><div class='ctx'>  * distinguish between them to clean up things in a proper way.</div><div class='ctx'>  */</div><div class='hunk'>@@ -182,13 +176,13 @@ static inline bool mlx5e_xdp_get_inline_state(struct mlx5e_xdpsq *sq, bool cur)</div><div class='ctx'> 	return cur;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool mlx5e_xdp_mpwqe_is_full(struct mlx5e_tx_mpwqe *session, u8 max_sq_mpw_wqebbs)</div><div class='add'>+static inline bool mlx5e_xdp_mpwqe_is_full(struct mlx5e_tx_mpwqe *session)</div><div class='ctx'> {</div><div class='ctx'> 	if (session-&gt;inline_on)</div><div class='ctx'> 		return session-&gt;ds_count + MLX5E_XDP_INLINE_WQE_MAX_DS_CNT &gt;</div><div class='del'>-		       max_sq_mpw_wqebbs * MLX5_SEND_WQEBB_NUM_DS;</div><div class='add'>+		       session-&gt;ds_count_max;</div><div class='ctx'> </div><div class='del'>-	return mlx5e_tx_mpwqe_is_full(session, max_sq_mpw_wqebbs);</div><div class='add'>+	return mlx5e_tx_mpwqe_is_full(session);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_xdp_wqe_info {</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c<br/>index 1b7132fa70de..2b05536d564a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c</a></div><div class='hunk'>@@ -123,7 +123,7 @@ int mlx5e_xsk_alloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)</div><div class='ctx'> 	bitmap_zero(wi-&gt;skip_release_bitmap, rq-&gt;mpwqe.pages_per_wqe);</div><div class='ctx'> 	wi-&gt;consumed_strides = 0;</div><div class='ctx'> </div><div class='del'>-	umr_wqe-&gt;ctrl.opmod_idx_opcode =</div><div class='add'>+	umr_wqe-&gt;hdr.ctrl.opmod_idx_opcode =</div><div class='ctx'> 		cpu_to_be32((icosq-&gt;pc &lt;&lt; MLX5_WQE_CTRL_WQE_INDEX_SHIFT) | MLX5_OPCODE_UMR);</div><div class='ctx'> </div><div class='ctx'> 	/* Optimized for speed: keep in sync with mlx5e_mpwrq_umr_entry_size. */</div><div class='hunk'>@@ -134,7 +134,7 @@ int mlx5e_xsk_alloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)</div><div class='ctx'> 		offset = offset * sizeof(struct mlx5_klm) * 2 / MLX5_OCTWORD;</div><div class='ctx'> 	else if (unlikely(rq-&gt;mpwqe.umr_mode == MLX5E_MPWRQ_UMR_MODE_TRIPLE))</div><div class='ctx'> 		offset = offset * sizeof(struct mlx5_ksm) * 4 / MLX5_OCTWORD;</div><div class='del'>-	umr_wqe-&gt;uctrl.xlt_offset = cpu_to_be16(offset);</div><div class='add'>+	umr_wqe-&gt;hdr.uctrl.xlt_offset = cpu_to_be16(offset);</div><div class='ctx'> </div><div class='ctx'> 	icosq-&gt;db.wqe_info[pi] = (struct mlx5e_icosq_wqe_info) {</div><div class='ctx'> 		.wqe_type = MLX5E_ICOSQ_WQE_UMR_RX,</div><div class='hunk'>@@ -144,7 +144,7 @@ int mlx5e_xsk_alloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)</div><div class='ctx'> </div><div class='ctx'> 	icosq-&gt;pc += rq-&gt;mpwqe.umr_wqebbs;</div><div class='ctx'> </div><div class='del'>-	icosq-&gt;doorbell_cseg = &amp;umr_wqe-&gt;ctrl;</div><div class='add'>+	icosq-&gt;doorbell_cseg = &amp;umr_wqe-&gt;hdr.ctrl;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c b/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c<br/>index 9240cfe25d10..5981c71cae2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ static void mlx5e_build_xsk_cparam(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				   struct mlx5e_channel_param *cparam)</div><div class='ctx'> {</div><div class='ctx'> 	mlx5e_build_rq_param(mdev, params, xsk, &amp;cparam-&gt;rq);</div><div class='del'>-	mlx5e_build_xdpsq_param(mdev, params, xsk, &amp;cparam-&gt;xdp_sq);</div><div class='add'>+	mlx5e_build_xdpsq_param(mdev, params, &amp;cparam-&gt;xdp_sq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_init_xsk_rq(struct mlx5e_channel *c,</div><div class='hunk'>@@ -71,8 +71,8 @@ static int mlx5e_init_xsk_rq(struct mlx5e_channel *c,</div><div class='ctx'> 	rq-&gt;pdev         = c-&gt;pdev;</div><div class='ctx'> 	rq-&gt;netdev       = c-&gt;netdev;</div><div class='ctx'> 	rq-&gt;priv         = c-&gt;priv;</div><div class='del'>-	rq-&gt;tstamp       = c-&gt;tstamp;</div><div class='del'>-	rq-&gt;clock        = &amp;mdev-&gt;clock;</div><div class='add'>+	rq-&gt;hwtstamp_config = &amp;c-&gt;priv-&gt;hwtstamp_config;</div><div class='add'>+	rq-&gt;clock        = mdev-&gt;clock;</div><div class='ctx'> 	rq-&gt;icosq        = &amp;c-&gt;icosq;</div><div class='ctx'> 	rq-&gt;ix           = c-&gt;ix;</div><div class='ctx'> 	rq-&gt;channel      = c;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h<br/>index 33e32584b07f..8bef99e8367e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h</a></div><div class='hunk'>@@ -42,6 +42,8 @@</div><div class='ctx'> #include &lt;en_accel/macsec.h&gt;</div><div class='ctx'> #include "en.h"</div><div class='ctx'> #include "en/txrx.h"</div><div class='add'>+#include "en_accel/psp.h"</div><div class='add'>+#include "en_accel/psp_rxtx.h"</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_GENEVE)</div><div class='ctx'> #include &lt;net/geneve.h&gt;</div><div class='hunk'>@@ -119,6 +121,9 @@ struct mlx5e_accel_tx_state {</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_IPSEC</div><div class='ctx'> 	struct mlx5e_accel_tx_ipsec_state ipsec;</div><div class='ctx'> #endif</div><div class='add'>+#ifdef CONFIG_MLX5_EN_PSP</div><div class='add'>+	struct mlx5e_accel_tx_psp_state psp_st;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline bool mlx5e_accel_tx_begin(struct net_device *dev,</div><div class='hunk'>@@ -137,6 +142,13 @@ static inline bool mlx5e_accel_tx_begin(struct net_device *dev,</div><div class='ctx'> 			return false;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MLX5_EN_PSP</div><div class='add'>+	if (mlx5e_psp_is_offload(skb, dev)) {</div><div class='add'>+		if (unlikely(!mlx5e_psp_handle_tx_skb(dev, skb, &amp;state-&gt;psp_st)))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_IPSEC</div><div class='ctx'> 	if (test_bit(MLX5E_SQ_STATE_IPSEC, &amp;sq-&gt;state) &amp;&amp; xfrm_offload(skb)) {</div><div class='ctx'> 		if (unlikely(!mlx5e_ipsec_handle_tx_skb(dev, skb, &amp;state-&gt;ipsec)))</div><div class='hunk'>@@ -157,8 +169,14 @@ static inline bool mlx5e_accel_tx_begin(struct net_device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int mlx5e_accel_tx_ids_len(struct mlx5e_txqsq *sq,</div><div class='add'>+						  struct sk_buff *skb,</div><div class='ctx'> 						  struct mlx5e_accel_tx_state *state)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_MLX5_EN_PSP</div><div class='add'>+	if (mlx5e_psp_is_offload_state(&amp;state-&gt;psp_st))</div><div class='add'>+		return mlx5e_psp_tx_ids_len(&amp;state-&gt;psp_st);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_IPSEC</div><div class='ctx'> 	if (test_bit(MLX5E_SQ_STATE_IPSEC, &amp;sq-&gt;state))</div><div class='ctx'> 		return mlx5e_ipsec_tx_ids_len(&amp;state-&gt;ipsec);</div><div class='hunk'>@@ -172,8 +190,14 @@ static inline unsigned int mlx5e_accel_tx_ids_len(struct mlx5e_txqsq *sq,</div><div class='ctx'> </div><div class='ctx'> static inline void mlx5e_accel_tx_eseg(struct mlx5e_priv *priv,</div><div class='ctx'> 				       struct sk_buff *skb,</div><div class='add'>+				       struct mlx5e_accel_tx_state *accel,</div><div class='ctx'> 				       struct mlx5_wqe_eth_seg *eseg, u16 ihs)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_MLX5_EN_PSP</div><div class='add'>+	if (mlx5e_psp_is_offload_state(&amp;accel-&gt;psp_st))</div><div class='add'>+		mlx5e_psp_tx_build_eseg(priv, skb, &amp;accel-&gt;psp_st, eseg);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_IPSEC</div><div class='ctx'> 	if (xfrm_offload(skb))</div><div class='ctx'> 		mlx5e_ipsec_tx_build_eseg(priv, skb, eseg);</div><div class='hunk'>@@ -199,6 +223,11 @@ static inline void mlx5e_accel_tx_finish(struct mlx5e_txqsq *sq,</div><div class='ctx'> 	mlx5e_ktls_handle_tx_wqe(&amp;wqe-&gt;ctrl, &amp;state-&gt;tls);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_MLX5_EN_PSP</div><div class='add'>+	if (mlx5e_psp_is_offload_state(&amp;state-&gt;psp_st))</div><div class='add'>+		mlx5e_psp_handle_tx_wqe(wqe, &amp;state-&gt;psp_st, inlseg);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_IPSEC</div><div class='ctx'> 	if (test_bit(MLX5E_SQ_STATE_IPSEC, &amp;sq-&gt;state) &amp;&amp;</div><div class='ctx'> 	    state-&gt;ipsec.xo &amp;&amp; state-&gt;ipsec.tailen)</div><div class='hunk'>@@ -208,21 +237,40 @@ static inline void mlx5e_accel_tx_finish(struct mlx5e_txqsq *sq,</div><div class='ctx'> </div><div class='ctx'> static inline int mlx5e_accel_init_rx(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	return mlx5e_ktls_init_rx(priv);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_accel_psp_fs_init_rx_tables(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = mlx5e_ktls_init_rx(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		mlx5_accel_psp_fs_cleanup_rx_tables(priv);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void mlx5e_accel_cleanup_rx(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	mlx5e_ktls_cleanup_rx(priv);</div><div class='add'>+	mlx5_accel_psp_fs_cleanup_rx_tables(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int mlx5e_accel_init_tx(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_accel_psp_fs_init_tx_tables(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	return mlx5e_ktls_init_tx(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void mlx5e_accel_cleanup_tx(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	mlx5e_ktls_cleanup_tx(priv);</div><div class='add'>+	mlx5_accel_psp_fs_cleanup_tx_tables(priv);</div><div class='ctx'> }</div><div class='ctx'> #endif /* __MLX5E_EN_ACCEL_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c<br/>index 4f83e3172767..1febdc5b81f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c</a></div><div class='hunk'>@@ -138,7 +138,7 @@ struct mlx5_flow_handle *mlx5e_accel_fs_add_sk(struct mlx5e_flow_steering *fs,</div><div class='ctx'> 	flow = mlx5_add_flow_rules(ft-&gt;t, spec, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(flow))</div><div class='del'>-		fs_err(fs, "mlx5_add_flow_rules() failed, flow is %ld\n", PTR_ERR(flow));</div><div class='add'>+		fs_err(fs, "mlx5_add_flow_rules() failed, flow is %pe\n", flow);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	kvfree(spec);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c<br/>index ca92e518be76..35d9530037a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include &lt;linux/inetdevice.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;net/netevent.h&gt;</div><div class='add'>+#include &lt;net/ipv6_stubs.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "en.h"</div><div class='ctx'> #include "eswitch.h"</div><div class='hunk'>@@ -94,25 +95,14 @@ static bool mlx5e_ipsec_update_esn_state(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> 	u32 esn, esn_msb;</div><div class='ctx'> 	u8 overlap;</div><div class='ctx'> </div><div class='del'>-	switch (x-&gt;xso.type) {</div><div class='del'>-	case XFRM_DEV_OFFLOAD_PACKET:</div><div class='del'>-		switch (x-&gt;xso.dir) {</div><div class='del'>-		case XFRM_DEV_OFFLOAD_IN:</div><div class='del'>-			esn = x-&gt;replay_esn-&gt;seq;</div><div class='del'>-			esn_msb = x-&gt;replay_esn-&gt;seq_hi;</div><div class='del'>-			break;</div><div class='del'>-		case XFRM_DEV_OFFLOAD_OUT:</div><div class='del'>-			esn = x-&gt;replay_esn-&gt;oseq;</div><div class='del'>-			esn_msb = x-&gt;replay_esn-&gt;oseq_hi;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			WARN_ON(true);</div><div class='del'>-			return false;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case XFRM_DEV_OFFLOAD_CRYPTO:</div><div class='del'>-		/* Already parsed by XFRM core */</div><div class='add'>+	switch (x-&gt;xso.dir) {</div><div class='add'>+	case XFRM_DEV_OFFLOAD_IN:</div><div class='ctx'> 		esn = x-&gt;replay_esn-&gt;seq;</div><div class='add'>+		esn_msb = x-&gt;replay_esn-&gt;seq_hi;</div><div class='add'>+		break;</div><div class='add'>+	case XFRM_DEV_OFFLOAD_OUT:</div><div class='add'>+		esn = x-&gt;replay_esn-&gt;oseq;</div><div class='add'>+		esn_msb = x-&gt;replay_esn-&gt;oseq_hi;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ON(true);</div><div class='hunk'>@@ -121,11 +111,15 @@ static bool mlx5e_ipsec_update_esn_state(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> </div><div class='ctx'> 	overlap = sa_entry-&gt;esn_state.overlap;</div><div class='ctx'> </div><div class='del'>-	if (esn &gt;= x-&gt;replay_esn-&gt;replay_window)</div><div class='del'>-		seq_bottom = esn - x-&gt;replay_esn-&gt;replay_window + 1;</div><div class='add'>+	if (!x-&gt;replay_esn-&gt;replay_window) {</div><div class='add'>+		seq_bottom = esn;</div><div class='add'>+	} else {</div><div class='add'>+		if (esn &gt;= x-&gt;replay_esn-&gt;replay_window)</div><div class='add'>+			seq_bottom = esn - x-&gt;replay_esn-&gt;replay_window + 1;</div><div class='ctx'> </div><div class='del'>-	if (x-&gt;xso.type == XFRM_DEV_OFFLOAD_CRYPTO)</div><div class='del'>-		esn_msb = xfrm_replay_seqhi(x, htonl(seq_bottom));</div><div class='add'>+		if (x-&gt;xso.type == XFRM_DEV_OFFLOAD_CRYPTO)</div><div class='add'>+			esn_msb = xfrm_replay_seqhi(x, htonl(seq_bottom));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (sa_entry-&gt;esn_state.esn_msb)</div><div class='ctx'> 		sa_entry-&gt;esn_state.esn = esn;</div><div class='hunk'>@@ -266,10 +260,15 @@ static void mlx5e_ipsec_init_macs(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='ctx'> 				  struct mlx5_accel_esp_xfrm_attrs *attrs)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *mdev = mlx5e_ipsec_sa2dev(sa_entry);</div><div class='add'>+	struct mlx5e_ipsec_addr *addrs = &amp;attrs-&gt;addrs;</div><div class='add'>+	struct net_device *netdev = sa_entry-&gt;dev;</div><div class='ctx'> 	struct xfrm_state *x = sa_entry-&gt;x;</div><div class='del'>-	struct net_device *netdev;</div><div class='add'>+	struct dst_entry *rt_dst_entry;</div><div class='add'>+	struct flowi4 fl4 = {};</div><div class='add'>+	struct flowi6 fl6 = {};</div><div class='ctx'> 	struct neighbour *n;</div><div class='ctx'> 	u8 addr[ETH_ALEN];</div><div class='add'>+	struct rtable *rt;</div><div class='ctx'> 	const void *pkey;</div><div class='ctx'> 	u8 *dst, *src;</div><div class='ctx'> </div><div class='hunk'>@@ -277,25 +276,94 @@ static void mlx5e_ipsec_init_macs(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='ctx'> 	    attrs-&gt;type != XFRM_DEV_OFFLOAD_PACKET)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	netdev = x-&gt;xso.real_dev;</div><div class='del'>-</div><div class='ctx'> 	mlx5_query_mac_address(mdev, addr);</div><div class='ctx'> 	switch (attrs-&gt;dir) {</div><div class='ctx'> 	case XFRM_DEV_OFFLOAD_IN:</div><div class='ctx'> 		src = attrs-&gt;dmac;</div><div class='ctx'> 		dst = attrs-&gt;smac;</div><div class='del'>-		pkey = &amp;attrs-&gt;saddr.a4;</div><div class='add'>+</div><div class='add'>+		switch (addrs-&gt;family) {</div><div class='add'>+		case AF_INET:</div><div class='add'>+			fl4.flowi4_proto = x-&gt;sel.proto;</div><div class='add'>+			fl4.daddr = addrs-&gt;saddr.a4;</div><div class='add'>+			fl4.saddr = addrs-&gt;daddr.a4;</div><div class='add'>+			pkey = &amp;addrs-&gt;saddr.a4;</div><div class='add'>+			break;</div><div class='add'>+		case AF_INET6:</div><div class='add'>+			fl6.flowi6_proto = x-&gt;sel.proto;</div><div class='add'>+			memcpy(fl6.daddr.s6_addr32, addrs-&gt;saddr.a6, 16);</div><div class='add'>+			memcpy(fl6.saddr.s6_addr32, addrs-&gt;daddr.a6, 16);</div><div class='add'>+			pkey = &amp;addrs-&gt;saddr.a6;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XFRM_DEV_OFFLOAD_OUT:</div><div class='ctx'> 		src = attrs-&gt;smac;</div><div class='ctx'> 		dst = attrs-&gt;dmac;</div><div class='del'>-		pkey = &amp;attrs-&gt;daddr.a4;</div><div class='add'>+		switch (addrs-&gt;family) {</div><div class='add'>+		case AF_INET:</div><div class='add'>+			fl4.flowi4_proto = x-&gt;sel.proto;</div><div class='add'>+			fl4.daddr = addrs-&gt;daddr.a4;</div><div class='add'>+			fl4.saddr = addrs-&gt;saddr.a4;</div><div class='add'>+			pkey = &amp;addrs-&gt;daddr.a4;</div><div class='add'>+			break;</div><div class='add'>+		case AF_INET6:</div><div class='add'>+			fl6.flowi6_proto = x-&gt;sel.proto;</div><div class='add'>+			memcpy(fl6.daddr.s6_addr32, addrs-&gt;daddr.a6, 16);</div><div class='add'>+			memcpy(fl6.saddr.s6_addr32, addrs-&gt;saddr.a6, 16);</div><div class='add'>+			pkey = &amp;addrs-&gt;daddr.a6;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ether_addr_copy(src, addr);</div><div class='add'>+</div><div class='add'>+	/* Destination can refer to a routed network, so perform FIB lookup</div><div class='add'>+	 * to resolve nexthop and get its MAC. Neighbour resolution is used as</div><div class='add'>+	 * fallback.</div><div class='add'>+	 */</div><div class='add'>+	switch (addrs-&gt;family) {</div><div class='add'>+	case AF_INET:</div><div class='add'>+		rt = ip_route_output_key(dev_net(netdev), &amp;fl4);</div><div class='add'>+		if (IS_ERR(rt))</div><div class='add'>+			goto neigh;</div><div class='add'>+</div><div class='add'>+		if (rt-&gt;rt_type != RTN_UNICAST) {</div><div class='add'>+			ip_rt_put(rt);</div><div class='add'>+			goto neigh;</div><div class='add'>+		}</div><div class='add'>+		rt_dst_entry = &amp;rt-&gt;dst;</div><div class='add'>+		break;</div><div class='add'>+	case AF_INET6:</div><div class='add'>+		rt_dst_entry = ipv6_stub-&gt;ipv6_dst_lookup_flow(</div><div class='add'>+			dev_net(netdev), NULL, &amp;fl6, NULL);</div><div class='add'>+		if (IS_ERR(rt_dst_entry))</div><div class='add'>+			goto neigh;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	n = dst_neigh_lookup(rt_dst_entry, pkey);</div><div class='add'>+	if (!n) {</div><div class='add'>+		dst_release(rt_dst_entry);</div><div class='add'>+		goto neigh;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	neigh_ha_snapshot(addr, n, netdev);</div><div class='add'>+	ether_addr_copy(dst, addr);</div><div class='add'>+	dst_release(rt_dst_entry);</div><div class='add'>+	neigh_release(n);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+neigh:</div><div class='ctx'> 	n = neigh_lookup(&amp;arp_tbl, pkey, netdev);</div><div class='ctx'> 	if (!n) {</div><div class='ctx'> 		n = neigh_create(&amp;arp_tbl, pkey, netdev);</div><div class='hunk'>@@ -310,6 +378,16 @@ static void mlx5e_ipsec_init_macs(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='ctx'> 	neigh_release(n);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mlx5e_ipsec_state_mask(struct mlx5e_ipsec_addr *addrs)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * State doesn't have subnet prefixes in outer headers.</div><div class='add'>+	 * The match is performed for exaxt source/destination addresses.</div><div class='add'>+	 */</div><div class='add'>+	memset(addrs-&gt;smask.m6, 0xFF, sizeof(__be32) * 4);</div><div class='add'>+	memset(addrs-&gt;dmask.m6, 0xFF, sizeof(__be32) * 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5e_ipsec_build_accel_xfrm_attrs(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='ctx'> 					struct mlx5_accel_esp_xfrm_attrs *attrs)</div><div class='ctx'> {</div><div class='hunk'>@@ -381,9 +459,11 @@ skip_replay_window:</div><div class='ctx'> 	attrs-&gt;spi = be32_to_cpu(x-&gt;id.spi);</div><div class='ctx'> </div><div class='ctx'> 	/* source , destination ips */</div><div class='del'>-	memcpy(&amp;attrs-&gt;saddr, x-&gt;props.saddr.a6, sizeof(attrs-&gt;saddr));</div><div class='del'>-	memcpy(&amp;attrs-&gt;daddr, x-&gt;id.daddr.a6, sizeof(attrs-&gt;daddr));</div><div class='del'>-	attrs-&gt;family = x-&gt;props.family;</div><div class='add'>+	memcpy(&amp;attrs-&gt;addrs.saddr, x-&gt;props.saddr.a6,</div><div class='add'>+	       sizeof(attrs-&gt;addrs.saddr));</div><div class='add'>+	memcpy(&amp;attrs-&gt;addrs.daddr, x-&gt;id.daddr.a6, sizeof(attrs-&gt;addrs.daddr));</div><div class='add'>+	attrs-&gt;addrs.family = x-&gt;props.family;</div><div class='add'>+	mlx5e_ipsec_state_mask(&amp;attrs-&gt;addrs);</div><div class='ctx'> 	attrs-&gt;type = x-&gt;xso.type;</div><div class='ctx'> 	attrs-&gt;reqid = x-&gt;props.reqid;</div><div class='ctx'> 	attrs-&gt;upspec.dport = ntohs(x-&gt;sel.dport);</div><div class='hunk'>@@ -435,7 +515,8 @@ static int mlx5e_xfrm_validate_state(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	if (x-&gt;encap) {</div><div class='ctx'> 		if (!(mlx5_ipsec_device_caps(mdev) &amp; MLX5_IPSEC_CAP_ESPINUDP)) {</div><div class='del'>-			NL_SET_ERR_MSG_MOD(extack, "Encapsulation is not supported");</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Encapsulation is not supported");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -686,17 +767,18 @@ static int mlx5e_ipsec_create_dwork(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5e_xfrm_add_state(struct xfrm_state *x,</div><div class='add'>+static int mlx5e_xfrm_add_state(struct net_device *dev,</div><div class='add'>+				struct xfrm_state *x,</div><div class='ctx'> 				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_ipsec_sa_entry *sa_entry = NULL;</div><div class='del'>-	struct net_device *netdev = x-&gt;xso.real_dev;</div><div class='add'>+	bool allow_tunnel_mode = false;</div><div class='ctx'> 	struct mlx5e_ipsec *ipsec;</div><div class='ctx'> 	struct mlx5e_priv *priv;</div><div class='ctx'> 	gfp_t gfp;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	priv = netdev_priv(netdev);</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='ctx'> 	if (!priv-&gt;ipsec)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='hunk'>@@ -707,6 +789,7 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	sa_entry-&gt;x = x;</div><div class='add'>+	sa_entry-&gt;dev = dev;</div><div class='ctx'> 	sa_entry-&gt;ipsec = ipsec;</div><div class='ctx'> 	/* Check if this SA is originated from acquire flow temporary SA */</div><div class='ctx'> 	if (x-&gt;xso.flags &amp; XFRM_DEV_OFFLOAD_FLAG_ACQ)</div><div class='hunk'>@@ -721,15 +804,36 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x,</div><div class='ctx'> 		goto err_xfrm;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = mlx5_eswitch_block_mode(priv-&gt;mdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unblock_ipsec;</div><div class='add'>+</div><div class='add'>+	if (x-&gt;props.mode == XFRM_MODE_TUNNEL &amp;&amp;</div><div class='add'>+	    x-&gt;xso.type == XFRM_DEV_OFFLOAD_PACKET) {</div><div class='add'>+		allow_tunnel_mode = mlx5e_ipsec_fs_tunnel_allowed(sa_entry);</div><div class='add'>+		if (!allow_tunnel_mode) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Packet offload tunnel mode is disabled due to encap settings");</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto unblock_mode;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* check esn */</div><div class='ctx'> 	if (x-&gt;props.flags &amp; XFRM_STATE_ESN)</div><div class='ctx'> 		mlx5e_ipsec_update_esn_state(sa_entry);</div><div class='add'>+	else</div><div class='add'>+		/* According to RFC4303, section "3.3.3. Sequence Number Generation",</div><div class='add'>+		 * the first packet sent using a given SA will contain a sequence</div><div class='add'>+		 * number of 1.</div><div class='add'>+		 */</div><div class='add'>+		sa_entry-&gt;esn_state.esn = 1;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_ipsec_build_accel_xfrm_attrs(sa_entry, &amp;sa_entry-&gt;attrs);</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_ipsec_create_work(sa_entry);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto unblock_ipsec;</div><div class='add'>+		goto unblock_encap;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_ipsec_create_dwork(sa_entry);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -744,14 +848,6 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_hw_ctx;</div><div class='ctx'> </div><div class='del'>-	if (x-&gt;props.mode == XFRM_MODE_TUNNEL &amp;&amp;</div><div class='del'>-	    x-&gt;xso.type == XFRM_DEV_OFFLOAD_PACKET &amp;&amp;</div><div class='del'>-	    !mlx5e_ipsec_fs_tunnel_enabled(sa_entry)) {</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack, "Packet offload tunnel mode is disabled due to encap settings");</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-		goto err_add_rule;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* We use *_bh() variant because xfrm_timer_handler(), which runs</div><div class='ctx'> 	 * in softirq context, can reach our state delete logic and we need</div><div class='ctx'> 	 * xa_erase_bh() there.</div><div class='hunk'>@@ -767,13 +863,20 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x,</div><div class='ctx'> 		queue_delayed_work(ipsec-&gt;wq, &amp;sa_entry-&gt;dwork-&gt;dwork,</div><div class='ctx'> 				   MLX5_IPSEC_RESCHED);</div><div class='ctx'> </div><div class='del'>-	if (x-&gt;xso.type == XFRM_DEV_OFFLOAD_PACKET &amp;&amp;</div><div class='del'>-	    x-&gt;props.mode == XFRM_MODE_TUNNEL)</div><div class='del'>-		xa_set_mark(&amp;ipsec-&gt;sadb, sa_entry-&gt;ipsec_obj_id,</div><div class='del'>-			    MLX5E_IPSEC_TUNNEL_SA);</div><div class='add'>+	if (allow_tunnel_mode) {</div><div class='add'>+		xa_lock_bh(&amp;ipsec-&gt;sadb);</div><div class='add'>+		__xa_set_mark(&amp;ipsec-&gt;sadb, sa_entry-&gt;ipsec_obj_id,</div><div class='add'>+			      MLX5E_IPSEC_TUNNEL_SA);</div><div class='add'>+		xa_unlock_bh(&amp;ipsec-&gt;sadb);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	x-&gt;xso.offload_handle = (unsigned long)sa_entry;</div><div class='add'>+	if (allow_tunnel_mode)</div><div class='add'>+		mlx5_eswitch_unblock_encap(priv-&gt;mdev);</div><div class='add'>+</div><div class='add'>+	mlx5_eswitch_unblock_mode(priv-&gt;mdev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_add_rule:</div><div class='hunk'>@@ -786,6 +889,11 @@ release_work:</div><div class='ctx'> 	if (sa_entry-&gt;work)</div><div class='ctx'> 		kfree(sa_entry-&gt;work-&gt;data);</div><div class='ctx'> 	kfree(sa_entry-&gt;work);</div><div class='add'>+unblock_encap:</div><div class='add'>+	if (allow_tunnel_mode)</div><div class='add'>+		mlx5_eswitch_unblock_encap(priv-&gt;mdev);</div><div class='add'>+unblock_mode:</div><div class='add'>+	mlx5_eswitch_unblock_mode(priv-&gt;mdev);</div><div class='ctx'> unblock_ipsec:</div><div class='ctx'> 	mlx5_eswitch_unblock_ipsec(priv-&gt;mdev);</div><div class='ctx'> err_xfrm:</div><div class='hunk'>@@ -794,10 +902,9 @@ err_xfrm:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5e_xfrm_del_state(struct xfrm_state *x)</div><div class='add'>+static void mlx5e_xfrm_del_state(struct net_device *dev, struct xfrm_state *x)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_ipsec_sa_entry *sa_entry = to_ipsec_sa_entry(x);</div><div class='del'>-	struct mlx5_accel_esp_xfrm_attrs *attrs = &amp;sa_entry-&gt;attrs;</div><div class='ctx'> 	struct mlx5e_ipsec *ipsec = sa_entry-&gt;ipsec;</div><div class='ctx'> 	struct mlx5e_ipsec_sa_entry *old;</div><div class='ctx'> </div><div class='hunk'>@@ -806,15 +913,9 @@ static void mlx5e_xfrm_del_state(struct xfrm_state *x)</div><div class='ctx'> </div><div class='ctx'> 	old = xa_erase_bh(&amp;ipsec-&gt;sadb, sa_entry-&gt;ipsec_obj_id);</div><div class='ctx'> 	WARN_ON(old != sa_entry);</div><div class='del'>-</div><div class='del'>-	if (attrs-&gt;mode == XFRM_MODE_TUNNEL &amp;&amp;</div><div class='del'>-	    attrs-&gt;type == XFRM_DEV_OFFLOAD_PACKET)</div><div class='del'>-		/* Make sure that no ARP requests are running in parallel */</div><div class='del'>-		flush_workqueue(ipsec-&gt;wq);</div><div class='del'>-</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5e_xfrm_free_state(struct xfrm_state *x)</div><div class='add'>+static void mlx5e_xfrm_free_state(struct net_device *dev, struct xfrm_state *x)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_ipsec_sa_entry *sa_entry = to_ipsec_sa_entry(x);</div><div class='ctx'> 	struct mlx5e_ipsec *ipsec = sa_entry-&gt;ipsec;</div><div class='hunk'>@@ -847,8 +948,6 @@ static int mlx5e_ipsec_netevent_event(struct notifier_block *nb,</div><div class='ctx'> 	struct mlx5e_ipsec_sa_entry *sa_entry;</div><div class='ctx'> 	struct mlx5e_ipsec *ipsec;</div><div class='ctx'> 	struct neighbour *n = ptr;</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	struct xfrm_state *x;</div><div class='ctx'> 	unsigned long idx;</div><div class='ctx'> </div><div class='ctx'> 	if (event != NETEVENT_NEIGH_UPDATE || !(n-&gt;nud_state &amp; NUD_VALID))</div><div class='hunk'>@@ -858,21 +957,19 @@ static int mlx5e_ipsec_netevent_event(struct notifier_block *nb,</div><div class='ctx'> 	xa_for_each_marked(&amp;ipsec-&gt;sadb, idx, sa_entry, MLX5E_IPSEC_TUNNEL_SA) {</div><div class='ctx'> 		attrs = &amp;sa_entry-&gt;attrs;</div><div class='ctx'> </div><div class='del'>-		if (attrs-&gt;family == AF_INET) {</div><div class='del'>-			if (!neigh_key_eq32(n, &amp;attrs-&gt;saddr.a4) &amp;&amp;</div><div class='del'>-			    !neigh_key_eq32(n, &amp;attrs-&gt;daddr.a4))</div><div class='add'>+		if (attrs-&gt;addrs.family == AF_INET) {</div><div class='add'>+			if (!neigh_key_eq32(n, &amp;attrs-&gt;addrs.saddr.a4) &amp;&amp;</div><div class='add'>+			    !neigh_key_eq32(n, &amp;attrs-&gt;addrs.daddr.a4))</div><div class='ctx'> 				continue;</div><div class='ctx'> 		} else {</div><div class='del'>-			if (!neigh_key_eq128(n, &amp;attrs-&gt;saddr.a4) &amp;&amp;</div><div class='del'>-			    !neigh_key_eq128(n, &amp;attrs-&gt;daddr.a4))</div><div class='add'>+			if (!neigh_key_eq128(n, &amp;attrs-&gt;addrs.saddr.a4) &amp;&amp;</div><div class='add'>+			    !neigh_key_eq128(n, &amp;attrs-&gt;addrs.daddr.a4))</div><div class='ctx'> 				continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		x = sa_entry-&gt;x;</div><div class='del'>-		netdev = x-&gt;xso.real_dev;</div><div class='ctx'> 		data = sa_entry-&gt;work-&gt;data;</div><div class='ctx'> </div><div class='del'>-		neigh_ha_snapshot(data-&gt;addr, n, netdev);</div><div class='add'>+		neigh_ha_snapshot(data-&gt;addr, n, sa_entry-&gt;dev);</div><div class='ctx'> 		queue_work(ipsec-&gt;wq, &amp;sa_entry-&gt;work-&gt;work);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -958,21 +1055,6 @@ void mlx5e_ipsec_cleanup(struct mlx5e_priv *priv)</div><div class='ctx'> 	priv-&gt;ipsec = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool mlx5e_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *x)</div><div class='del'>-{</div><div class='del'>-	if (x-&gt;props.family == AF_INET) {</div><div class='del'>-		/* Offload with IPv4 options is not supported yet */</div><div class='del'>-		if (ip_hdr(skb)-&gt;ihl &gt; 5)</div><div class='del'>-			return false;</div><div class='del'>-	} else {</div><div class='del'>-		/* Offload with IPv6 extension headers is not support yet */</div><div class='del'>-		if (ipv6_ext_hdr(ipv6_hdr(skb)-&gt;nexthdr))</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void mlx5e_xfrm_advance_esn_state(struct xfrm_state *x)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_ipsec_sa_entry *sa_entry = to_ipsec_sa_entry(x);</div><div class='hunk'>@@ -1003,8 +1085,8 @@ static void mlx5e_xfrm_update_stats(struct xfrm_state *x)</div><div class='ctx'> 	size_t headers;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert(lockdep_is_held(&amp;x-&gt;lock) ||</div><div class='del'>-		       lockdep_is_held(&amp;dev_net(x-&gt;xso.real_dev)-&gt;xfrm.xfrm_cfg_mutex) ||</div><div class='del'>-		       lockdep_is_held(&amp;dev_net(x-&gt;xso.real_dev)-&gt;xfrm.xfrm_state_lock));</div><div class='add'>+		       lockdep_is_held(&amp;net-&gt;xfrm.xfrm_cfg_mutex) ||</div><div class='add'>+		       lockdep_is_held(&amp;net-&gt;xfrm.xfrm_state_lock));</div><div class='ctx'> </div><div class='ctx'> 	if (x-&gt;xso.flags &amp; XFRM_DEV_OFFLOAD_FLAG_ACQ)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1040,7 +1122,7 @@ static void mlx5e_xfrm_update_stats(struct xfrm_state *x)</div><div class='ctx'> 	 * by removing always available headers.</div><div class='ctx'> 	 */</div><div class='ctx'> 	headers = sizeof(struct ethhdr);</div><div class='del'>-	if (sa_entry-&gt;attrs.family == AF_INET)</div><div class='add'>+	if (sa_entry-&gt;attrs.addrs.family == AF_INET)</div><div class='ctx'> 		headers += sizeof(struct iphdr);</div><div class='ctx'> 	else</div><div class='ctx'> 		headers += sizeof(struct ipv6hdr);</div><div class='hunk'>@@ -1049,6 +1131,43 @@ static void mlx5e_xfrm_update_stats(struct xfrm_state *x)</div><div class='ctx'> 	x-&gt;curlft.bytes += success_bytes - headers * success_packets;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static __be32 word_to_mask(int prefix)</div><div class='add'>+{</div><div class='add'>+	if (prefix &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!prefix || prefix &gt; 31)</div><div class='add'>+		return cpu_to_be32(0xFFFFFFFF);</div><div class='add'>+</div><div class='add'>+	return cpu_to_be32(((1U &lt;&lt; prefix) - 1) &lt;&lt; (32 - prefix));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_ipsec_policy_mask(struct mlx5e_ipsec_addr *addrs,</div><div class='add'>+				    struct xfrm_selector *sel)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (addrs-&gt;family == AF_INET) {</div><div class='add'>+		addrs-&gt;smask.m4 = word_to_mask(sel-&gt;prefixlen_s);</div><div class='add'>+		addrs-&gt;saddr.a4 &amp;= addrs-&gt;smask.m4;</div><div class='add'>+		addrs-&gt;dmask.m4 = word_to_mask(sel-&gt;prefixlen_d);</div><div class='add'>+		addrs-&gt;daddr.a4 &amp;= addrs-&gt;dmask.m4;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		if (sel-&gt;prefixlen_s != 32 * i)</div><div class='add'>+			addrs-&gt;smask.m6[i] =</div><div class='add'>+				word_to_mask(sel-&gt;prefixlen_s - 32 * i);</div><div class='add'>+		addrs-&gt;saddr.a6[i] &amp;= addrs-&gt;smask.m6[i];</div><div class='add'>+</div><div class='add'>+		if (sel-&gt;prefixlen_d != 32 * i)</div><div class='add'>+			addrs-&gt;dmask.m6[i] =</div><div class='add'>+				word_to_mask(sel-&gt;prefixlen_d - 32 * i);</div><div class='add'>+		addrs-&gt;daddr.a6[i] &amp;= addrs-&gt;dmask.m6[i];</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5e_xfrm_validate_policy(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				      struct xfrm_policy *x,</div><div class='ctx'> 				      struct netlink_ext_ack *extack)</div><div class='hunk'>@@ -1121,9 +1240,10 @@ mlx5e_ipsec_build_accel_pol_attrs(struct mlx5e_ipsec_pol_entry *pol_entry,</div><div class='ctx'> 	sel = &amp;x-&gt;selector;</div><div class='ctx'> 	memset(attrs, 0, sizeof(*attrs));</div><div class='ctx'> </div><div class='del'>-	memcpy(&amp;attrs-&gt;saddr, sel-&gt;saddr.a6, sizeof(attrs-&gt;saddr));</div><div class='del'>-	memcpy(&amp;attrs-&gt;daddr, sel-&gt;daddr.a6, sizeof(attrs-&gt;daddr));</div><div class='del'>-	attrs-&gt;family = sel-&gt;family;</div><div class='add'>+	memcpy(&amp;attrs-&gt;addrs.saddr, sel-&gt;saddr.a6, sizeof(attrs-&gt;addrs.saddr));</div><div class='add'>+	memcpy(&amp;attrs-&gt;addrs.daddr, sel-&gt;daddr.a6, sizeof(attrs-&gt;addrs.daddr));</div><div class='add'>+	attrs-&gt;addrs.family = sel-&gt;family;</div><div class='add'>+	mlx5e_ipsec_policy_mask(&amp;attrs-&gt;addrs, sel);</div><div class='ctx'> 	attrs-&gt;dir = x-&gt;xdo.dir;</div><div class='ctx'> 	attrs-&gt;action = x-&gt;action;</div><div class='ctx'> 	attrs-&gt;type = XFRM_DEV_OFFLOAD_PACKET;</div><div class='hunk'>@@ -1139,7 +1259,7 @@ mlx5e_ipsec_build_accel_pol_attrs(struct mlx5e_ipsec_pol_entry *pol_entry,</div><div class='ctx'> static int mlx5e_xfrm_add_policy(struct xfrm_policy *x,</div><div class='ctx'> 				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *netdev = x-&gt;xdo.real_dev;</div><div class='add'>+	struct net_device *netdev = x-&gt;xdo.dev;</div><div class='ctx'> 	struct mlx5e_ipsec_pol_entry *pol_entry;</div><div class='ctx'> 	struct mlx5e_priv *priv;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1201,7 +1321,6 @@ static const struct xfrmdev_ops mlx5e_ipsec_xfrmdev_ops = {</div><div class='ctx'> 	.xdo_dev_state_add	= mlx5e_xfrm_add_state,</div><div class='ctx'> 	.xdo_dev_state_delete	= mlx5e_xfrm_del_state,</div><div class='ctx'> 	.xdo_dev_state_free	= mlx5e_xfrm_free_state,</div><div class='del'>-	.xdo_dev_offload_ok	= mlx5e_ipsec_offload_ok,</div><div class='ctx'> 	.xdo_dev_state_advance_esn = mlx5e_xfrm_advance_esn_state,</div><div class='ctx'> </div><div class='ctx'> 	.xdo_dev_state_update_stats = mlx5e_xfrm_update_stats,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h<br/>index 7d943e93cf6d..f8eaaf37963b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h</a></div><div class='hunk'>@@ -76,27 +76,36 @@ struct mlx5_replay_esn {</div><div class='ctx'> 	u8 trigger : 1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mlx5_accel_esp_xfrm_attrs {</div><div class='del'>-	u32   spi;</div><div class='del'>-	u32   mode;</div><div class='del'>-	struct aes_gcm_keymat aes_gcm;</div><div class='del'>-</div><div class='add'>+struct mlx5e_ipsec_addr {</div><div class='ctx'> 	union {</div><div class='ctx'> 		__be32 a4;</div><div class='ctx'> 		__be32 a6[4];</div><div class='ctx'> 	} saddr;</div><div class='del'>-</div><div class='add'>+	union {</div><div class='add'>+		__be32 m4;</div><div class='add'>+		__be32 m6[4];</div><div class='add'>+	} smask;</div><div class='ctx'> 	union {</div><div class='ctx'> 		__be32 a4;</div><div class='ctx'> 		__be32 a6[4];</div><div class='ctx'> 	} daddr;</div><div class='add'>+	union {</div><div class='add'>+		__be32 m4;</div><div class='add'>+		__be32 m6[4];</div><div class='add'>+	} dmask;</div><div class='add'>+	u8 family;</div><div class='add'>+};</div><div class='ctx'> </div><div class='add'>+struct mlx5_accel_esp_xfrm_attrs {</div><div class='add'>+	u32   spi;</div><div class='add'>+	u32   mode;</div><div class='add'>+	struct aes_gcm_keymat aes_gcm;</div><div class='add'>+	struct mlx5e_ipsec_addr addrs;</div><div class='ctx'> 	struct upspec upspec;</div><div class='ctx'> 	u8 dir : 2;</div><div class='ctx'> 	u8 type : 2;</div><div class='ctx'> 	u8 drop : 1;</div><div class='ctx'> 	u8 encap : 1;</div><div class='del'>-	u8 family;</div><div class='ctx'> 	struct mlx5_replay_esn replay_esn;</div><div class='ctx'> 	u32 authsize;</div><div class='ctx'> 	u32 reqid;</div><div class='hunk'>@@ -128,6 +137,7 @@ struct mlx5e_ipsec_hw_stats {</div><div class='ctx'> 	u64 ipsec_rx_bytes;</div><div class='ctx'> 	u64 ipsec_rx_drop_pkts;</div><div class='ctx'> 	u64 ipsec_rx_drop_bytes;</div><div class='add'>+	u64 ipsec_rx_drop_mismatch_sa_sel;</div><div class='ctx'> 	u64 ipsec_tx_pkts;</div><div class='ctx'> 	u64 ipsec_tx_bytes;</div><div class='ctx'> 	u64 ipsec_tx_drop_pkts;</div><div class='hunk'>@@ -175,6 +185,7 @@ struct mlx5e_ipsec_rx_create_attr {</div><div class='ctx'> 	u32 family;</div><div class='ctx'> 	int prio;</div><div class='ctx'> 	int pol_level;</div><div class='add'>+	int pol_miss_level;</div><div class='ctx'> 	int sa_level;</div><div class='ctx'> 	int status_level;</div><div class='ctx'> 	enum mlx5_flow_namespace_type chains_ns;</div><div class='hunk'>@@ -184,6 +195,7 @@ struct mlx5e_ipsec_ft {</div><div class='ctx'> 	struct mutex mutex; /* Protect changes to this struct */</div><div class='ctx'> 	struct mlx5_flow_table *pol;</div><div class='ctx'> 	struct mlx5_flow_table *sa;</div><div class='add'>+	struct mlx5_flow_table *sa_sel;</div><div class='ctx'> 	struct mlx5_flow_table *status;</div><div class='ctx'> 	u32 refcnt;</div><div class='ctx'> };</div><div class='hunk'>@@ -195,6 +207,8 @@ struct mlx5e_ipsec_drop {</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_ipsec_rule {</div><div class='ctx'> 	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mlx5_flow_handle *status_pass;</div><div class='add'>+	struct mlx5_flow_handle *sa_sel;</div><div class='ctx'> 	struct mlx5_modify_hdr *modify_hdr;</div><div class='ctx'> 	struct mlx5_pkt_reformat *pkt_reformat;</div><div class='ctx'> 	struct mlx5_fc *fc;</div><div class='hunk'>@@ -206,6 +220,7 @@ struct mlx5e_ipsec_rule {</div><div class='ctx'> struct mlx5e_ipsec_miss {</div><div class='ctx'> 	struct mlx5_flow_group *group;</div><div class='ctx'> 	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mlx5_fc *fc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_ipsec_tx_create_attr {</div><div class='hunk'>@@ -260,6 +275,7 @@ struct mlx5e_ipsec_limits {</div><div class='ctx'> struct mlx5e_ipsec_sa_entry {</div><div class='ctx'> 	struct mlx5e_ipsec_esn_state esn_state;</div><div class='ctx'> 	struct xfrm_state *x;</div><div class='add'>+	struct net_device *dev;</div><div class='ctx'> 	struct mlx5e_ipsec *ipsec;</div><div class='ctx'> 	struct mlx5_accel_esp_xfrm_attrs attrs;</div><div class='ctx'> 	void (*set_iv_op)(struct sk_buff *skb, struct xfrm_state *x,</div><div class='hunk'>@@ -274,18 +290,8 @@ struct mlx5e_ipsec_sa_entry {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5_accel_pol_xfrm_attrs {</div><div class='del'>-	union {</div><div class='del'>-		__be32 a4;</div><div class='del'>-		__be32 a6[4];</div><div class='del'>-	} saddr;</div><div class='del'>-</div><div class='del'>-	union {</div><div class='del'>-		__be32 a4;</div><div class='del'>-		__be32 a6[4];</div><div class='del'>-	} daddr;</div><div class='del'>-</div><div class='add'>+	struct mlx5e_ipsec_addr addrs;</div><div class='ctx'> 	struct upspec upspec;</div><div class='del'>-	u8 family;</div><div class='ctx'> 	u8 action;</div><div class='ctx'> 	u8 type : 2;</div><div class='ctx'> 	u8 dir : 2;</div><div class='hunk'>@@ -313,7 +319,7 @@ void mlx5e_accel_ipsec_fs_del_rule(struct mlx5e_ipsec_sa_entry *sa_entry);</div><div class='ctx'> int mlx5e_accel_ipsec_fs_add_pol(struct mlx5e_ipsec_pol_entry *pol_entry);</div><div class='ctx'> void mlx5e_accel_ipsec_fs_del_pol(struct mlx5e_ipsec_pol_entry *pol_entry);</div><div class='ctx'> void mlx5e_accel_ipsec_fs_modify(struct mlx5e_ipsec_sa_entry *sa_entry);</div><div class='del'>-bool mlx5e_ipsec_fs_tunnel_enabled(struct mlx5e_ipsec_sa_entry *sa_entry);</div><div class='add'>+bool mlx5e_ipsec_fs_tunnel_allowed(struct mlx5e_ipsec_sa_entry *sa_entry);</div><div class='ctx'> </div><div class='ctx'> int mlx5_ipsec_create_sa_ctx(struct mlx5e_ipsec_sa_entry *sa_entry);</div><div class='ctx'> void mlx5_ipsec_free_sa_ctx(struct mlx5e_ipsec_sa_entry *sa_entry);</div><div class='hunk'>@@ -336,6 +342,7 @@ void mlx5e_ipsec_build_accel_xfrm_attrs(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='ctx'> void mlx5e_ipsec_handle_mpv_event(int event, struct mlx5e_priv *slave_priv,</div><div class='ctx'> 				  struct mlx5e_priv *master_priv);</div><div class='ctx'> void mlx5e_ipsec_send_event(struct mlx5e_priv *priv, int event);</div><div class='add'>+void mlx5e_ipsec_disable_events(struct mlx5e_priv *priv);</div><div class='ctx'> </div><div class='ctx'> static inline struct mlx5_core_dev *</div><div class='ctx'> mlx5e_ipsec_sa2dev(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='hunk'>@@ -381,6 +388,10 @@ static inline void mlx5e_ipsec_handle_mpv_event(int event, struct mlx5e_priv *sl</div><div class='ctx'> static inline void mlx5e_ipsec_send_event(struct mlx5e_priv *priv, int event)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline void mlx5e_ipsec_disable_events(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif	/* __MLX5E_IPSEC_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c<br/>index e51b03d4c717..feef86fff4bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c</a></div><div class='hunk'>@@ -16,6 +16,16 @@</div><div class='ctx'> #define MLX5_REFORMAT_TYPE_ADD_ESP_TRANSPORT_SIZE 16</div><div class='ctx'> #define IPSEC_TUNNEL_DEFAULT_TTL 0x40</div><div class='ctx'> </div><div class='add'>+#define MLX5_IPSEC_FS_SA_SELECTOR_MAX_NUM_GROUPS 16</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	MLX5_IPSEC_ASO_OK,</div><div class='add'>+	MLX5_IPSEC_ASO_BAD_REPLY,</div><div class='add'>+</div><div class='add'>+	/* For crypto offload, set by driver */</div><div class='add'>+	MLX5_IPSEC_ASO_SW_CRYPTO_OFFLOAD = 0xAA,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mlx5e_ipsec_fc {</div><div class='ctx'> 	struct mlx5_fc *cnt;</div><div class='ctx'> 	struct mlx5_fc *drop;</div><div class='hunk'>@@ -33,6 +43,9 @@ struct mlx5e_ipsec_tx {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5e_ipsec_status_checks {</div><div class='add'>+	struct mlx5_flow_group *pass_group;</div><div class='add'>+	struct mlx5_flow_handle *packet_offload_pass_rule;</div><div class='add'>+	struct mlx5_flow_handle *crypto_offload_pass_rule;</div><div class='ctx'> 	struct mlx5_flow_group *drop_all_group;</div><div class='ctx'> 	struct mlx5e_ipsec_drop all;</div><div class='ctx'> };</div><div class='hunk'>@@ -41,11 +54,14 @@ struct mlx5e_ipsec_rx {</div><div class='ctx'> 	struct mlx5e_ipsec_ft ft;</div><div class='ctx'> 	struct mlx5e_ipsec_miss pol;</div><div class='ctx'> 	struct mlx5e_ipsec_miss sa;</div><div class='del'>-	struct mlx5e_ipsec_rule status;</div><div class='del'>-	struct mlx5e_ipsec_status_checks status_drops;</div><div class='add'>+	struct mlx5e_ipsec_miss sa_sel;</div><div class='add'>+	struct mlx5e_ipsec_status_checks status_checks;</div><div class='ctx'> 	struct mlx5e_ipsec_fc *fc;</div><div class='ctx'> 	struct mlx5_fs_chains *chains;</div><div class='add'>+	struct mlx5_flow_table *pol_miss_ft;</div><div class='add'>+	struct mlx5_flow_handle *pol_miss_rule;</div><div class='ctx'> 	u8 allow_tunnel_mode : 1;</div><div class='add'>+	u8 ttc_rules_added : 1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* IPsec RX flow steering */</div><div class='hunk'>@@ -130,11 +146,12 @@ static void ipsec_chains_put_table(struct mlx5_fs_chains *chains, u32 prio)</div><div class='ctx'> </div><div class='ctx'> static struct mlx5_flow_table *ipsec_ft_create(struct mlx5_flow_namespace *ns,</div><div class='ctx'> 					       int level, int prio,</div><div class='add'>+					       int num_reserved_entries,</div><div class='ctx'> 					       int max_num_groups, u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_flow_table_attr ft_attr = {};</div><div class='ctx'> </div><div class='del'>-	ft_attr.autogroup.num_reserved_entries = 1;</div><div class='add'>+	ft_attr.autogroup.num_reserved_entries = num_reserved_entries;</div><div class='ctx'> 	ft_attr.autogroup.max_num_groups = max_num_groups;</div><div class='ctx'> 	ft_attr.max_fte = NUM_IPSEC_FTE;</div><div class='ctx'> 	ft_attr.level = level;</div><div class='hunk'>@@ -147,22 +164,35 @@ static struct mlx5_flow_table *ipsec_ft_create(struct mlx5_flow_namespace *ns,</div><div class='ctx'> static void ipsec_rx_status_drop_destroy(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 					 struct mlx5e_ipsec_rx *rx)</div><div class='ctx'> {</div><div class='del'>-	mlx5_del_flow_rules(rx-&gt;status_drops.all.rule);</div><div class='del'>-	mlx5_fc_destroy(ipsec-&gt;mdev, rx-&gt;status_drops.all.fc);</div><div class='del'>-	mlx5_destroy_flow_group(rx-&gt;status_drops.drop_all_group);</div><div class='add'>+	mlx5_del_flow_rules(rx-&gt;status_checks.all.rule);</div><div class='add'>+	mlx5_fc_destroy(ipsec-&gt;mdev, rx-&gt;status_checks.all.fc);</div><div class='add'>+	mlx5_destroy_flow_group(rx-&gt;status_checks.drop_all_group);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ipsec_rx_status_pass_destroy(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 					 struct mlx5e_ipsec_rx *rx)</div><div class='ctx'> {</div><div class='del'>-	mlx5_del_flow_rules(rx-&gt;status.rule);</div><div class='add'>+	mlx5_del_flow_rules(rx-&gt;status_checks.packet_offload_pass_rule);</div><div class='add'>+	mlx5_del_flow_rules(rx-&gt;status_checks.crypto_offload_pass_rule);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (rx != ipsec-&gt;rx_esw)</div><div class='del'>-		return;</div><div class='add'>+static void ipsec_rx_rule_add_match_obj(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='add'>+					struct mlx5e_ipsec_rx *rx,</div><div class='add'>+					struct mlx5_flow_spec *spec)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_ipsec *ipsec = sa_entry-&gt;ipsec;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_MLX5_ESWITCH</div><div class='del'>-	mlx5_chains_put_table(esw_chains(ipsec-&gt;mdev-&gt;priv.eswitch), 0, 1, 0);</div><div class='del'>-#endif</div><div class='add'>+	if (rx == ipsec-&gt;rx_esw) {</div><div class='add'>+		mlx5_esw_ipsec_rx_rule_add_match_obj(sa_entry, spec);</div><div class='add'>+	} else {</div><div class='add'>+		MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+				 misc_parameters_2.metadata_reg_c_2);</div><div class='add'>+		MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+			 misc_parameters_2.metadata_reg_c_2,</div><div class='add'>+			 sa_entry-&gt;ipsec_obj_id | BIT(31));</div><div class='add'>+</div><div class='add'>+		spec-&gt;match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rx_add_rule_drop_auth_trailer(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='hunk'>@@ -194,17 +224,14 @@ static int rx_add_rule_drop_auth_trailer(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='ctx'> 	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP | MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 	flow_act.flags = FLOW_ACT_NO_APPEND;</div><div class='ctx'> 	dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dest.counter_id = mlx5_fc_id(flow_counter);</div><div class='add'>+	dest.counter = flow_counter;</div><div class='ctx'> 	if (rx == ipsec-&gt;rx_esw)</div><div class='ctx'> 		spec-&gt;flow_context.flow_source = MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK;</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria, misc_parameters_2.ipsec_syndrome);</div><div class='ctx'> 	MLX5_SET(fte_match_param, spec-&gt;match_value, misc_parameters_2.ipsec_syndrome, 1);</div><div class='del'>-	MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria, misc_parameters_2.metadata_reg_c_2);</div><div class='del'>-	MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='del'>-		 misc_parameters_2.metadata_reg_c_2,</div><div class='del'>-		 sa_entry-&gt;ipsec_obj_id | BIT(31));</div><div class='ctx'> 	spec-&gt;match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2;</div><div class='add'>+	ipsec_rx_rule_add_match_obj(sa_entry, rx, spec);</div><div class='ctx'> 	rule = mlx5_add_flow_rules(ft, spec, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='ctx'> 		err = PTR_ERR(rule);</div><div class='hunk'>@@ -223,7 +250,7 @@ static int rx_add_rule_drop_auth_trailer(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='ctx'> 	}</div><div class='ctx'> 	sa_entry-&gt;ipsec_rule.trailer.fc = flow_counter;</div><div class='ctx'> </div><div class='del'>-	dest.counter_id = mlx5_fc_id(flow_counter);</div><div class='add'>+	dest.counter = flow_counter;</div><div class='ctx'> 	MLX5_SET(fte_match_param, spec-&gt;match_value, misc_parameters_2.ipsec_syndrome, 2);</div><div class='ctx'> 	rule = mlx5_add_flow_rules(ft, spec, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='hunk'>@@ -275,16 +302,14 @@ static int rx_add_rule_drop_replay(struct mlx5e_ipsec_sa_entry *sa_entry, struct</div><div class='ctx'> 	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP | MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 	flow_act.flags = FLOW_ACT_NO_APPEND;</div><div class='ctx'> 	dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dest.counter_id = mlx5_fc_id(flow_counter);</div><div class='add'>+	dest.counter = flow_counter;</div><div class='ctx'> 	if (rx == ipsec-&gt;rx_esw)</div><div class='ctx'> 		spec-&gt;flow_context.flow_source = MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK;</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria, misc_parameters_2.metadata_reg_c_4);</div><div class='ctx'> 	MLX5_SET(fte_match_param, spec-&gt;match_value, misc_parameters_2.metadata_reg_c_4, 1);</div><div class='del'>-	MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria, misc_parameters_2.metadata_reg_c_2);</div><div class='del'>-	MLX5_SET(fte_match_param, spec-&gt;match_value,  misc_parameters_2.metadata_reg_c_2,</div><div class='del'>-		 sa_entry-&gt;ipsec_obj_id | BIT(31));</div><div class='ctx'> 	spec-&gt;match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2;</div><div class='add'>+	ipsec_rx_rule_add_match_obj(sa_entry, rx, spec);</div><div class='ctx'> 	rule = mlx5_add_flow_rules(ft, spec, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='ctx'> 		err = PTR_ERR(rule);</div><div class='hunk'>@@ -348,7 +373,7 @@ static int ipsec_rx_status_drop_all_create(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> </div><div class='ctx'> 	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP | MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 	dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dest.counter_id = mlx5_fc_id(flow_counter);</div><div class='add'>+	dest.counter = flow_counter;</div><div class='ctx'> 	if (rx == ipsec-&gt;rx_esw)</div><div class='ctx'> 		spec-&gt;flow_context.flow_source = MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(ft, spec, &amp;flow_act, &amp;dest, 1);</div><div class='hunk'>@@ -359,9 +384,9 @@ static int ipsec_rx_status_drop_all_create(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 		goto err_rule;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rx-&gt;status_drops.drop_all_group = g;</div><div class='del'>-	rx-&gt;status_drops.all.rule = rule;</div><div class='del'>-	rx-&gt;status_drops.all.fc = flow_counter;</div><div class='add'>+	rx-&gt;status_checks.drop_all_group = g;</div><div class='add'>+	rx-&gt;status_checks.all.rule = rule;</div><div class='add'>+	rx-&gt;status_checks.all.fc = flow_counter;</div><div class='ctx'> </div><div class='ctx'> 	kvfree(flow_group_in);</div><div class='ctx'> 	kvfree(spec);</div><div class='hunk'>@@ -377,9 +402,52 @@ err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ipsec_rx_status_pass_create(struct mlx5e_ipsec *ipsec,</div><div class='del'>-				       struct mlx5e_ipsec_rx *rx,</div><div class='del'>-				       struct mlx5_flow_destination *dest)</div><div class='add'>+static int ipsec_rx_status_pass_group_create(struct mlx5e_ipsec *ipsec,</div><div class='add'>+					     struct mlx5e_ipsec_rx *rx)</div><div class='add'>+{</div><div class='add'>+	int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);</div><div class='add'>+	struct mlx5_flow_table *ft = rx-&gt;ft.status;</div><div class='add'>+	struct mlx5_flow_group *fg;</div><div class='add'>+	void *match_criteria;</div><div class='add'>+	u32 *flow_group_in;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	flow_group_in = kvzalloc(inlen, GFP_KERNEL);</div><div class='add'>+	if (!flow_group_in)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable,</div><div class='add'>+		 MLX5_MATCH_MISC_PARAMETERS_2);</div><div class='add'>+	match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in,</div><div class='add'>+				      match_criteria);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, match_criteria,</div><div class='add'>+			 misc_parameters_2.ipsec_syndrome);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, match_criteria,</div><div class='add'>+			 misc_parameters_2.metadata_reg_c_4);</div><div class='add'>+</div><div class='add'>+	MLX5_SET(create_flow_group_in, flow_group_in,</div><div class='add'>+		 start_flow_index, ft-&gt;max_fte - 3);</div><div class='add'>+	MLX5_SET(create_flow_group_in, flow_group_in,</div><div class='add'>+		 end_flow_index, ft-&gt;max_fte - 2);</div><div class='add'>+</div><div class='add'>+	fg = mlx5_create_flow_group(ft, flow_group_in);</div><div class='add'>+	if (IS_ERR(fg)) {</div><div class='add'>+		err = PTR_ERR(fg);</div><div class='add'>+		mlx5_core_warn(ipsec-&gt;mdev,</div><div class='add'>+			       "Failed to create rx status pass flow group, err=%d\n",</div><div class='add'>+			       err);</div><div class='add'>+	}</div><div class='add'>+	rx-&gt;status_checks.pass_group = fg;</div><div class='add'>+</div><div class='add'>+	kvfree(flow_group_in);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_flow_handle *</div><div class='add'>+ipsec_rx_status_pass_create(struct mlx5e_ipsec *ipsec,</div><div class='add'>+			    struct mlx5e_ipsec_rx *rx,</div><div class='add'>+			    struct mlx5_flow_destination *dest,</div><div class='add'>+			    u8 aso_ok)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_flow_act flow_act = {};</div><div class='ctx'> 	struct mlx5_flow_handle *rule;</div><div class='hunk'>@@ -388,7 +456,7 @@ static int ipsec_rx_status_pass_create(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> </div><div class='ctx'> 	spec = kvzalloc(sizeof(*spec), GFP_KERNEL);</div><div class='ctx'> 	if (!spec)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='ctx'> 			 misc_parameters_2.ipsec_syndrome);</div><div class='hunk'>@@ -397,11 +465,11 @@ static int ipsec_rx_status_pass_create(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 	MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='ctx'> 		 misc_parameters_2.ipsec_syndrome, 0);</div><div class='ctx'> 	MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='del'>-		 misc_parameters_2.metadata_reg_c_4, 0);</div><div class='add'>+		 misc_parameters_2.metadata_reg_c_4, aso_ok);</div><div class='ctx'> 	if (rx == ipsec-&gt;rx_esw)</div><div class='ctx'> 		spec-&gt;flow_context.flow_source = MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK;</div><div class='ctx'> 	spec-&gt;match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2;</div><div class='del'>-	flow_act.flags = FLOW_ACT_NO_APPEND;</div><div class='add'>+	flow_act.flags = FLOW_ACT_NO_APPEND | FLOW_ACT_IGNORE_FLOW_LEVEL;</div><div class='ctx'> 	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |</div><div class='ctx'> 			  MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(rx-&gt;ft.status, spec, &amp;flow_act, dest, 2);</div><div class='hunk'>@@ -412,19 +480,19 @@ static int ipsec_rx_status_pass_create(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 		goto err_rule;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rx-&gt;status.rule = rule;</div><div class='ctx'> 	kvfree(spec);</div><div class='del'>-	return 0;</div><div class='add'>+	return rule;</div><div class='ctx'> </div><div class='ctx'> err_rule:</div><div class='ctx'> 	kvfree(spec);</div><div class='del'>-	return err;</div><div class='add'>+	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5_ipsec_rx_status_destroy(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 					 struct mlx5e_ipsec_rx *rx)</div><div class='ctx'> {</div><div class='ctx'> 	ipsec_rx_status_pass_destroy(ipsec, rx);</div><div class='add'>+	mlx5_destroy_flow_group(rx-&gt;status_checks.pass_group);</div><div class='ctx'> 	ipsec_rx_status_drop_destroy(ipsec, rx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -432,19 +500,44 @@ static int mlx5_ipsec_rx_status_create(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 				       struct mlx5e_ipsec_rx *rx,</div><div class='ctx'> 				       struct mlx5_flow_destination *dest)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_flow_destination pol_dest[2];</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = ipsec_rx_status_drop_all_create(ipsec, rx);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = ipsec_rx_status_pass_create(ipsec, rx, dest);</div><div class='add'>+	err = ipsec_rx_status_pass_group_create(ipsec, rx);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_pass_create;</div><div class='add'>+		goto err_pass_group_create;</div><div class='add'>+</div><div class='add'>+	rule = ipsec_rx_status_pass_create(ipsec, rx, dest,</div><div class='add'>+					   MLX5_IPSEC_ASO_SW_CRYPTO_OFFLOAD);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		goto err_crypto_offload_pass_create;</div><div class='add'>+	}</div><div class='add'>+	rx-&gt;status_checks.crypto_offload_pass_rule = rule;</div><div class='add'>+</div><div class='add'>+	pol_dest[0].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='add'>+	pol_dest[0].ft = rx-&gt;ft.pol;</div><div class='add'>+	pol_dest[1] = dest[1];</div><div class='add'>+	rule = ipsec_rx_status_pass_create(ipsec, rx, pol_dest,</div><div class='add'>+					   MLX5_IPSEC_ASO_OK);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		goto err_packet_offload_pass_create;</div><div class='add'>+	}</div><div class='add'>+	rx-&gt;status_checks.packet_offload_pass_rule = rule;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_pass_create:</div><div class='add'>+err_packet_offload_pass_create:</div><div class='add'>+	mlx5_del_flow_rules(rx-&gt;status_checks.crypto_offload_pass_rule);</div><div class='add'>+err_crypto_offload_pass_create:</div><div class='add'>+	mlx5_destroy_flow_group(rx-&gt;status_checks.pass_group);</div><div class='add'>+err_pass_group_create:</div><div class='ctx'> 	ipsec_rx_status_drop_destroy(ipsec, rx);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -493,35 +586,56 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct mlx5_flow_destination</div><div class='add'>+ipsec_rx_decrypted_pkt_def_dest(struct mlx5_ttc_table *ttc, u32 family)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_destination dest;</div><div class='add'>+</div><div class='add'>+	if (!mlx5_ttc_has_esp_flow_group(ttc))</div><div class='add'>+		return mlx5_ttc_get_default_dest(ttc, family2tt(family));</div><div class='add'>+</div><div class='add'>+	dest.ft = mlx5_get_ttc_flow_table(ttc);</div><div class='add'>+	dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='add'>+</div><div class='add'>+	return dest;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ipsec_rx_update_default_dest(struct mlx5e_ipsec_rx *rx,</div><div class='add'>+					 struct mlx5_flow_destination *old_dest,</div><div class='add'>+					 struct mlx5_flow_destination *new_dest)</div><div class='add'>+{</div><div class='add'>+	mlx5_modify_rule_destination(rx-&gt;pol_miss_rule, new_dest, old_dest);</div><div class='add'>+	mlx5_modify_rule_destination(rx-&gt;status_checks.crypto_offload_pass_rule,</div><div class='add'>+				     new_dest, old_dest);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void handle_ipsec_rx_bringup(struct mlx5e_ipsec *ipsec, u32 family)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_ipsec_rx *rx = ipsec_rx(ipsec, family, XFRM_DEV_OFFLOAD_PACKET);</div><div class='ctx'> 	struct mlx5_flow_namespace *ns = mlx5e_fs_get_ns(ipsec-&gt;fs, false);</div><div class='add'>+	struct mlx5_ttc_table *ttc = mlx5e_fs_get_ttc(ipsec-&gt;fs, false);</div><div class='ctx'> 	struct mlx5_flow_destination old_dest, new_dest;</div><div class='ctx'> </div><div class='del'>-	old_dest = mlx5_ttc_get_default_dest(mlx5e_fs_get_ttc(ipsec-&gt;fs, false),</div><div class='del'>-					     family2tt(family));</div><div class='add'>+	old_dest = ipsec_rx_decrypted_pkt_def_dest(ttc, family);</div><div class='ctx'> </div><div class='ctx'> 	mlx5_ipsec_fs_roce_rx_create(ipsec-&gt;mdev, ipsec-&gt;roce, ns, &amp;old_dest, family,</div><div class='ctx'> 				     MLX5E_ACCEL_FS_ESP_FT_ROCE_LEVEL, MLX5E_NIC_PRIO);</div><div class='ctx'> </div><div class='ctx'> 	new_dest.ft = mlx5_ipsec_fs_roce_ft_get(ipsec-&gt;roce, family);</div><div class='ctx'> 	new_dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='del'>-	mlx5_modify_rule_destination(rx-&gt;status.rule, &amp;new_dest, &amp;old_dest);</div><div class='del'>-	mlx5_modify_rule_destination(rx-&gt;sa.rule, &amp;new_dest, &amp;old_dest);</div><div class='add'>+	ipsec_rx_update_default_dest(rx, &amp;old_dest, &amp;new_dest);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void handle_ipsec_rx_cleanup(struct mlx5e_ipsec *ipsec, u32 family)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_ipsec_rx *rx = ipsec_rx(ipsec, family, XFRM_DEV_OFFLOAD_PACKET);</div><div class='add'>+	struct mlx5_ttc_table *ttc = mlx5e_fs_get_ttc(ipsec-&gt;fs, false);</div><div class='ctx'> 	struct mlx5_flow_destination old_dest, new_dest;</div><div class='ctx'> </div><div class='ctx'> 	old_dest.ft = mlx5_ipsec_fs_roce_ft_get(ipsec-&gt;roce, family);</div><div class='ctx'> 	old_dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='del'>-	new_dest = mlx5_ttc_get_default_dest(mlx5e_fs_get_ttc(ipsec-&gt;fs, false),</div><div class='del'>-					     family2tt(family));</div><div class='del'>-	mlx5_modify_rule_destination(rx-&gt;sa.rule, &amp;new_dest, &amp;old_dest);</div><div class='del'>-	mlx5_modify_rule_destination(rx-&gt;status.rule, &amp;new_dest, &amp;old_dest);</div><div class='add'>+	new_dest = ipsec_rx_decrypted_pkt_def_dest(ttc, family);</div><div class='add'>+	ipsec_rx_update_default_dest(rx, &amp;old_dest, &amp;new_dest);</div><div class='ctx'> </div><div class='ctx'> 	mlx5_ipsec_fs_roce_rx_destroy(ipsec-&gt;roce, family, ipsec-&gt;mdev);</div><div class='ctx'> }</div><div class='hunk'>@@ -570,20 +684,18 @@ static void ipsec_mpv_work_handler(struct work_struct *_work)</div><div class='ctx'> 	complete(&amp;work-&gt;master_priv-&gt;ipsec-&gt;comp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ipsec_rx_ft_disconnect(struct mlx5e_ipsec *ipsec, u32 family)</div><div class='add'>+static void ipsec_rx_ft_disconnect(struct mlx5e_ipsec *ipsec,</div><div class='add'>+				   struct mlx5e_ipsec_rx *rx, u32 family)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_ttc_table *ttc = mlx5e_fs_get_ttc(ipsec-&gt;fs, false);</div><div class='ctx'> </div><div class='add'>+	if (rx-&gt;ttc_rules_added)</div><div class='add'>+		mlx5_ttc_destroy_ipsec_rules(ttc);</div><div class='ctx'> 	mlx5_ttc_fwd_default_dest(ttc, family2tt(family));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rx_destroy(struct mlx5_core_dev *mdev, struct mlx5e_ipsec *ipsec,</div><div class='del'>-		       struct mlx5e_ipsec_rx *rx, u32 family)</div><div class='add'>+static void ipsec_rx_policy_destroy(struct mlx5e_ipsec_rx *rx)</div><div class='ctx'> {</div><div class='del'>-	/* disconnect */</div><div class='del'>-	if (rx != ipsec-&gt;rx_esw)</div><div class='del'>-		ipsec_rx_ft_disconnect(ipsec, family);</div><div class='del'>-</div><div class='ctx'> 	if (rx-&gt;chains) {</div><div class='ctx'> 		ipsec_chains_destroy(rx-&gt;chains);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -592,6 +704,29 @@ static void rx_destroy(struct mlx5_core_dev *mdev, struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 		mlx5_destroy_flow_table(rx-&gt;ft.pol);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (rx-&gt;pol_miss_rule) {</div><div class='add'>+		mlx5_del_flow_rules(rx-&gt;pol_miss_rule);</div><div class='add'>+		mlx5_destroy_flow_table(rx-&gt;pol_miss_ft);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ipsec_rx_sa_selector_destroy(struct mlx5_core_dev *mdev,</div><div class='add'>+					 struct mlx5e_ipsec_rx *rx)</div><div class='add'>+{</div><div class='add'>+	mlx5_del_flow_rules(rx-&gt;sa_sel.rule);</div><div class='add'>+	mlx5_fc_destroy(mdev, rx-&gt;sa_sel.fc);</div><div class='add'>+	rx-&gt;sa_sel.fc = NULL;</div><div class='add'>+	mlx5_destroy_flow_group(rx-&gt;sa_sel.group);</div><div class='add'>+	mlx5_destroy_flow_table(rx-&gt;ft.sa_sel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rx_destroy(struct mlx5_core_dev *mdev, struct mlx5e_ipsec *ipsec,</div><div class='add'>+		       struct mlx5e_ipsec_rx *rx, u32 family)</div><div class='add'>+{</div><div class='add'>+	/* disconnect */</div><div class='add'>+	if (rx != ipsec-&gt;rx_esw)</div><div class='add'>+		ipsec_rx_ft_disconnect(ipsec, rx, family);</div><div class='add'>+</div><div class='ctx'> 	mlx5_del_flow_rules(rx-&gt;sa.rule);</div><div class='ctx'> 	mlx5_destroy_flow_group(rx-&gt;sa.group);</div><div class='ctx'> 	mlx5_destroy_flow_table(rx-&gt;ft.sa);</div><div class='hunk'>@@ -600,7 +735,17 @@ static void rx_destroy(struct mlx5_core_dev *mdev, struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 	mlx5_ipsec_rx_status_destroy(ipsec, rx);</div><div class='ctx'> 	mlx5_destroy_flow_table(rx-&gt;ft.status);</div><div class='ctx'> </div><div class='add'>+	ipsec_rx_sa_selector_destroy(mdev, rx);</div><div class='add'>+</div><div class='add'>+	ipsec_rx_policy_destroy(rx);</div><div class='add'>+</div><div class='ctx'> 	mlx5_ipsec_fs_roce_rx_destroy(ipsec-&gt;roce, family, mdev);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MLX5_ESWITCH</div><div class='add'>+	if (rx == ipsec-&gt;rx_esw)</div><div class='add'>+		mlx5_chains_put_table(esw_chains(ipsec-&gt;mdev-&gt;priv.eswitch),</div><div class='add'>+				      0, 1, 0);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ipsec_rx_create_attr_set(struct mlx5e_ipsec *ipsec,</div><div class='hunk'>@@ -620,6 +765,7 @@ static void ipsec_rx_create_attr_set(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 	attr-&gt;family = family;</div><div class='ctx'> 	attr-&gt;prio = MLX5E_NIC_PRIO;</div><div class='ctx'> 	attr-&gt;pol_level = MLX5E_ACCEL_FS_POL_FT_LEVEL;</div><div class='add'>+	attr-&gt;pol_miss_level = MLX5E_ACCEL_FS_POL_MISS_FT_LEVEL;</div><div class='ctx'> 	attr-&gt;sa_level = MLX5E_ACCEL_FS_ESP_FT_LEVEL;</div><div class='ctx'> 	attr-&gt;status_level = MLX5E_ACCEL_FS_ESP_FT_ERR_LEVEL;</div><div class='ctx'> 	attr-&gt;chains_ns = MLX5_FLOW_NAMESPACE_KERNEL;</div><div class='hunk'>@@ -636,7 +782,7 @@ static int ipsec_rx_status_pass_dest_get(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 	if (rx == ipsec-&gt;rx_esw)</div><div class='ctx'> 		return mlx5_esw_ipsec_rx_status_pass_dest_get(ipsec, dest);</div><div class='ctx'> </div><div class='del'>-	*dest = mlx5_ttc_get_default_dest(attr-&gt;ttc, family2tt(attr-&gt;family));</div><div class='add'>+	*dest = ipsec_rx_decrypted_pkt_def_dest(attr-&gt;ttc, attr-&gt;family);</div><div class='ctx'> 	err = mlx5_ipsec_fs_roce_rx_create(ipsec-&gt;mdev, ipsec-&gt;roce, attr-&gt;ns, dest,</div><div class='ctx'> 					   attr-&gt;family, MLX5E_ACCEL_FS_ESP_FT_ROCE_LEVEL,</div><div class='ctx'> 					   attr-&gt;prio);</div><div class='hunk'>@@ -652,22 +798,254 @@ static int ipsec_rx_status_pass_dest_get(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ipsec_rx_sa_miss_dest_get(struct mlx5e_ipsec *ipsec,</div><div class='add'>+				      struct mlx5e_ipsec_rx *rx,</div><div class='add'>+				      struct mlx5e_ipsec_rx_create_attr *attr,</div><div class='add'>+				      struct mlx5_flow_destination *dest,</div><div class='add'>+				      struct mlx5_flow_destination *miss_dest)</div><div class='add'>+{</div><div class='add'>+	if (rx == ipsec-&gt;rx_esw)</div><div class='add'>+		*miss_dest = *dest;</div><div class='add'>+	else</div><div class='add'>+		*miss_dest =</div><div class='add'>+			mlx5_ttc_get_default_dest(attr-&gt;ttc,</div><div class='add'>+						  family2tt(attr-&gt;family));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ipsec_rx_default_dest_get(struct mlx5e_ipsec *ipsec,</div><div class='add'>+				      struct mlx5e_ipsec_rx *rx,</div><div class='add'>+				      struct mlx5_flow_destination *dest)</div><div class='add'>+{</div><div class='add'>+	dest-&gt;type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='add'>+	dest-&gt;ft = rx-&gt;pol_miss_ft;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ipsec_rx_ft_connect(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 				struct mlx5e_ipsec_rx *rx,</div><div class='ctx'> 				struct mlx5e_ipsec_rx_create_attr *attr)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_flow_destination dest = {};</div><div class='add'>+	struct mlx5_ttc_table *ttc, *inner_ttc;</div><div class='ctx'> </div><div class='ctx'> 	dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='del'>-	dest.ft = rx-&gt;ft.pol;</div><div class='del'>-	mlx5_ttc_fwd_dest(attr-&gt;ttc, family2tt(attr-&gt;family), &amp;dest);</div><div class='add'>+	dest.ft = rx-&gt;ft.sa;</div><div class='add'>+	if (mlx5_ttc_fwd_dest(attr-&gt;ttc, family2tt(attr-&gt;family), &amp;dest))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ttc = mlx5e_fs_get_ttc(ipsec-&gt;fs, false);</div><div class='add'>+	inner_ttc = mlx5e_fs_get_ttc(ipsec-&gt;fs, true);</div><div class='add'>+	rx-&gt;ttc_rules_added = !mlx5_ttc_create_ipsec_rules(ttc, inner_ttc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ipsec_rx_chains_create_miss(struct mlx5e_ipsec *ipsec,</div><div class='add'>+				       struct mlx5e_ipsec_rx *rx,</div><div class='add'>+				       struct mlx5e_ipsec_rx_create_attr *attr,</div><div class='add'>+				       struct mlx5_flow_destination *dest)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_table_attr ft_attr = {};</div><div class='add'>+	MLX5_DECLARE_FLOW_ACT(flow_act);</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mlx5_flow_table *ft;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (rx == ipsec-&gt;rx_esw) {</div><div class='add'>+		/* No need to create miss table for switchdev mode,</div><div class='add'>+		 * just set it to the root chain table.</div><div class='add'>+		 */</div><div class='add'>+		rx-&gt;pol_miss_ft = dest-&gt;ft;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ft_attr.max_fte = 1;</div><div class='add'>+	ft_attr.autogroup.max_num_groups = 1;</div><div class='add'>+	ft_attr.level = attr-&gt;pol_miss_level;</div><div class='add'>+	ft_attr.prio = attr-&gt;prio;</div><div class='add'>+</div><div class='add'>+	ft = mlx5_create_auto_grouped_flow_table(attr-&gt;ns, &amp;ft_attr);</div><div class='add'>+	if (IS_ERR(ft))</div><div class='add'>+		return PTR_ERR(ft);</div><div class='add'>+</div><div class='add'>+	rule = mlx5_add_flow_rules(ft, NULL, &amp;flow_act, dest, 1);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		goto err_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx-&gt;pol_miss_ft = ft;</div><div class='add'>+	rx-&gt;pol_miss_rule = rule;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_rule:</div><div class='add'>+	mlx5_destroy_flow_table(ft);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ipsec_rx_policy_create(struct mlx5e_ipsec *ipsec,</div><div class='add'>+				  struct mlx5e_ipsec_rx *rx,</div><div class='add'>+				  struct mlx5e_ipsec_rx_create_attr *attr,</div><div class='add'>+				  struct mlx5_flow_destination *dest)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_destination default_dest;</div><div class='add'>+	struct mlx5_core_dev *mdev = ipsec-&gt;mdev;</div><div class='add'>+	struct mlx5_flow_table *ft;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ipsec_rx_chains_create_miss(ipsec, rx, attr, dest);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ipsec_rx_default_dest_get(ipsec, rx, &amp;default_dest);</div><div class='add'>+</div><div class='add'>+	if (mlx5_ipsec_device_caps(mdev) &amp; MLX5_IPSEC_CAP_PRIO) {</div><div class='add'>+		rx-&gt;chains = ipsec_chains_create(mdev,</div><div class='add'>+						 default_dest.ft,</div><div class='add'>+						 attr-&gt;chains_ns,</div><div class='add'>+						 attr-&gt;prio,</div><div class='add'>+						 attr-&gt;sa_level,</div><div class='add'>+						 &amp;rx-&gt;ft.pol);</div><div class='add'>+		if (IS_ERR(rx-&gt;chains))</div><div class='add'>+			err = PTR_ERR(rx-&gt;chains);</div><div class='add'>+	} else {</div><div class='add'>+		ft = ipsec_ft_create(attr-&gt;ns, attr-&gt;pol_level,</div><div class='add'>+				     attr-&gt;prio, 1, 2, 0);</div><div class='add'>+		if (IS_ERR(ft)) {</div><div class='add'>+			err = PTR_ERR(ft);</div><div class='add'>+			goto err_out;</div><div class='add'>+		}</div><div class='add'>+		rx-&gt;ft.pol = ft;</div><div class='add'>+</div><div class='add'>+		err = ipsec_miss_create(mdev, rx-&gt;ft.pol, &amp;rx-&gt;pol,</div><div class='add'>+					&amp;default_dest);</div><div class='add'>+		if (err)</div><div class='add'>+			mlx5_destroy_flow_table(rx-&gt;ft.pol);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!err)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	if (rx-&gt;pol_miss_rule) {</div><div class='add'>+		mlx5_del_flow_rules(rx-&gt;pol_miss_rule);</div><div class='add'>+		mlx5_destroy_flow_table(rx-&gt;pol_miss_ft);</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ipsec_rx_sa_selector_create(struct mlx5e_ipsec *ipsec,</div><div class='add'>+				       struct mlx5e_ipsec_rx *rx,</div><div class='add'>+				       struct mlx5e_ipsec_rx_create_attr *attr)</div><div class='add'>+{</div><div class='add'>+	int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);</div><div class='add'>+	struct mlx5_core_dev *mdev = ipsec-&gt;mdev;</div><div class='add'>+	struct mlx5_flow_act flow_act = {};</div><div class='add'>+	struct mlx5_flow_destination dest;</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mlx5_flow_table *ft;</div><div class='add'>+	struct mlx5_flow_group *fg;</div><div class='add'>+	u32 *flow_group_in;</div><div class='add'>+	struct mlx5_fc *fc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	flow_group_in = kvzalloc(inlen, GFP_KERNEL);</div><div class='add'>+	if (!flow_group_in)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ft = ipsec_ft_create(attr-&gt;ns, attr-&gt;status_level, attr-&gt;prio, 1,</div><div class='add'>+			     MLX5_IPSEC_FS_SA_SELECTOR_MAX_NUM_GROUPS, 0);</div><div class='add'>+	if (IS_ERR(ft)) {</div><div class='add'>+		err = PTR_ERR(ft);</div><div class='add'>+		mlx5_core_err(mdev, "Failed to create RX SA selector flow table, err=%d\n",</div><div class='add'>+			      err);</div><div class='add'>+		goto err_ft;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index,</div><div class='add'>+		 ft-&gt;max_fte - 1);</div><div class='add'>+	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index,</div><div class='add'>+		 ft-&gt;max_fte - 1);</div><div class='add'>+	fg = mlx5_create_flow_group(ft, flow_group_in);</div><div class='add'>+	if (IS_ERR(fg)) {</div><div class='add'>+		err = PTR_ERR(fg);</div><div class='add'>+		mlx5_core_err(mdev, "Failed to create RX SA selector miss group, err=%d\n",</div><div class='add'>+			      err);</div><div class='add'>+		goto err_fg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fc = mlx5_fc_create(mdev, false);</div><div class='add'>+	if (IS_ERR(fc)) {</div><div class='add'>+		err = PTR_ERR(fc);</div><div class='add'>+		mlx5_core_err(mdev,</div><div class='add'>+			      "Failed to create ipsec RX SA selector miss rule counter, err=%d\n",</div><div class='add'>+			      err);</div><div class='add'>+		goto err_cnt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='add'>+	dest.counter = fc;</div><div class='add'>+	flow_act.action =</div><div class='add'>+		MLX5_FLOW_CONTEXT_ACTION_COUNT | MLX5_FLOW_CONTEXT_ACTION_DROP;</div><div class='add'>+</div><div class='add'>+	rule = mlx5_add_flow_rules(ft, NULL, &amp;flow_act, &amp;dest, 1);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		mlx5_core_err(mdev, "Failed to create RX SA selector miss drop rule, err=%d\n",</div><div class='add'>+			      err);</div><div class='add'>+		goto err_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx-&gt;ft.sa_sel = ft;</div><div class='add'>+	rx-&gt;sa_sel.group = fg;</div><div class='add'>+	rx-&gt;sa_sel.fc = fc;</div><div class='add'>+	rx-&gt;sa_sel.rule = rule;</div><div class='add'>+</div><div class='add'>+	kvfree(flow_group_in);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_rule:</div><div class='add'>+	mlx5_fc_destroy(mdev, fc);</div><div class='add'>+err_cnt:</div><div class='add'>+	mlx5_destroy_flow_group(fg);</div><div class='add'>+err_fg:</div><div class='add'>+	mlx5_destroy_flow_table(ft);</div><div class='add'>+err_ft:</div><div class='add'>+	kvfree(flow_group_in);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* The decryption processing is as follows:</div><div class='add'>+ *</div><div class='add'>+ *   +----------+                         +-------------+</div><div class='add'>+ *   |          |                         |             |</div><div class='add'>+ *   |  Kernel  &lt;--------------+----------+ policy miss &lt;------------+</div><div class='add'>+ *   |          |              ^          |             |            ^</div><div class='add'>+ *   +----^-----+              |          +-------------+            |</div><div class='add'>+ *        |                  crypto                                  |</div><div class='add'>+ *      miss                offload ok                         allow/default</div><div class='add'>+ *        ^                    ^                                     ^</div><div class='add'>+ *        |                    |                  packet             |</div><div class='add'>+ *   +----+---------+     +----+-------------+   offload ok   +------+---+</div><div class='add'>+ *   |              |     |                  |   (no UPSPEC)  |          |</div><div class='add'>+ *   | SA (decrypt) +-----&gt;      status      +---&gt;-------&gt;----+  policy  |</div><div class='add'>+ *   |              |     |                  |                |          |</div><div class='add'>+ *   +--------------+     ++---------+-------+                +-^----+---+</div><div class='add'>+ *                         |         |                          |    |</div><div class='add'>+ *                         v        packet             +--&gt;-&gt;---+    v</div><div class='add'>+ *                         |       offload ok        match           |</div><div class='add'>+ *                       fails    (with UPSPEC)        |           block</div><div class='add'>+ *                         |         |   +-------------+-+           |</div><div class='add'>+ *                         v         v   |               |  miss     v</div><div class='add'>+ *                        drop       +---&gt;    SA sel     +---------&gt;drop</div><div class='add'>+ *                                       |               |</div><div class='add'>+ *                                       +---------------+</div><div class='add'>+ */</div><div class='add'>+</div><div class='ctx'> static int rx_create(struct mlx5_core_dev *mdev, struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 		     struct mlx5e_ipsec_rx *rx, u32 family)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_flow_destination dest[2], miss_dest;</div><div class='ctx'> 	struct mlx5e_ipsec_rx_create_attr attr;</div><div class='del'>-	struct mlx5_flow_destination dest[2];</div><div class='ctx'> 	struct mlx5_flow_table *ft;</div><div class='ctx'> 	u32 flags = 0;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -678,80 +1056,63 @@ static int rx_create(struct mlx5_core_dev *mdev, struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	ft = ipsec_ft_create(attr.ns, attr.status_level, attr.prio, 3, 0);</div><div class='add'>+	ft = ipsec_ft_create(attr.ns, attr.status_level, attr.prio, 3, 4, 0);</div><div class='ctx'> 	if (IS_ERR(ft)) {</div><div class='ctx'> 		err = PTR_ERR(ft);</div><div class='ctx'> 		goto err_fs_ft_status;</div><div class='ctx'> 	}</div><div class='ctx'> 	rx-&gt;ft.status = ft;</div><div class='ctx'> </div><div class='del'>-	dest[1].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dest[1].counter_id = mlx5_fc_id(rx-&gt;fc-&gt;cnt);</div><div class='del'>-	err = mlx5_ipsec_rx_status_create(ipsec, rx, dest);</div><div class='add'>+	err = ipsec_rx_sa_selector_create(ipsec, rx, &amp;attr);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_add;</div><div class='add'>+		goto err_fs_ft_sa_sel;</div><div class='ctx'> </div><div class='ctx'> 	/* Create FT */</div><div class='ctx'> 	if (mlx5_ipsec_device_caps(mdev) &amp; MLX5_IPSEC_CAP_TUNNEL)</div><div class='del'>-		rx-&gt;allow_tunnel_mode = mlx5_eswitch_block_encap(mdev);</div><div class='add'>+		rx-&gt;allow_tunnel_mode =</div><div class='add'>+			mlx5_eswitch_block_encap(mdev, rx == ipsec-&gt;rx_esw);</div><div class='add'>+</div><div class='ctx'> 	if (rx-&gt;allow_tunnel_mode)</div><div class='ctx'> 		flags = MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;</div><div class='del'>-	ft = ipsec_ft_create(attr.ns, attr.sa_level, attr.prio, 2, flags);</div><div class='add'>+	ft = ipsec_ft_create(attr.ns, attr.sa_level, attr.prio, 1, 2, flags);</div><div class='ctx'> 	if (IS_ERR(ft)) {</div><div class='ctx'> 		err = PTR_ERR(ft);</div><div class='ctx'> 		goto err_fs_ft;</div><div class='ctx'> 	}</div><div class='ctx'> 	rx-&gt;ft.sa = ft;</div><div class='ctx'> </div><div class='del'>-	err = ipsec_miss_create(mdev, rx-&gt;ft.sa, &amp;rx-&gt;sa, dest);</div><div class='add'>+	ipsec_rx_sa_miss_dest_get(ipsec, rx, &amp;attr, &amp;dest[0], &amp;miss_dest);</div><div class='add'>+	err = ipsec_miss_create(mdev, rx-&gt;ft.sa, &amp;rx-&gt;sa, &amp;miss_dest);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_fs;</div><div class='ctx'> </div><div class='del'>-	if (mlx5_ipsec_device_caps(mdev) &amp; MLX5_IPSEC_CAP_PRIO) {</div><div class='del'>-		rx-&gt;chains = ipsec_chains_create(mdev, rx-&gt;ft.sa,</div><div class='del'>-						 attr.chains_ns,</div><div class='del'>-						 attr.prio,</div><div class='del'>-						 attr.pol_level,</div><div class='del'>-						 &amp;rx-&gt;ft.pol);</div><div class='del'>-		if (IS_ERR(rx-&gt;chains)) {</div><div class='del'>-			err = PTR_ERR(rx-&gt;chains);</div><div class='del'>-			goto err_pol_ft;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		goto connect;</div><div class='del'>-	}</div><div class='add'>+	err = ipsec_rx_policy_create(ipsec, rx, &amp;attr, &amp;dest[0]);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_policy;</div><div class='ctx'> </div><div class='del'>-	ft = ipsec_ft_create(attr.ns, attr.pol_level, attr.prio, 2, 0);</div><div class='del'>-	if (IS_ERR(ft)) {</div><div class='del'>-		err = PTR_ERR(ft);</div><div class='del'>-		goto err_pol_ft;</div><div class='del'>-	}</div><div class='del'>-	rx-&gt;ft.pol = ft;</div><div class='del'>-	memset(dest, 0x00, 2 * sizeof(*dest));</div><div class='del'>-	dest[0].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='del'>-	dest[0].ft = rx-&gt;ft.sa;</div><div class='del'>-	err = ipsec_miss_create(mdev, rx-&gt;ft.pol, &amp;rx-&gt;pol, dest);</div><div class='add'>+	dest[1].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='add'>+	dest[1].counter = rx-&gt;fc-&gt;cnt;</div><div class='add'>+	err = mlx5_ipsec_rx_status_create(ipsec, rx, dest);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_pol_miss;</div><div class='add'>+		goto err_add;</div><div class='ctx'> </div><div class='del'>-connect:</div><div class='ctx'> 	/* connect */</div><div class='ctx'> 	if (rx != ipsec-&gt;rx_esw)</div><div class='ctx'> 		ipsec_rx_ft_connect(ipsec, rx, &amp;attr);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_pol_miss:</div><div class='del'>-	mlx5_destroy_flow_table(rx-&gt;ft.pol);</div><div class='del'>-err_pol_ft:</div><div class='add'>+err_add:</div><div class='add'>+	ipsec_rx_policy_destroy(rx);</div><div class='add'>+err_policy:</div><div class='ctx'> 	mlx5_del_flow_rules(rx-&gt;sa.rule);</div><div class='ctx'> 	mlx5_destroy_flow_group(rx-&gt;sa.group);</div><div class='ctx'> err_fs:</div><div class='ctx'> 	mlx5_destroy_flow_table(rx-&gt;ft.sa);</div><div class='del'>-err_fs_ft:</div><div class='ctx'> 	if (rx-&gt;allow_tunnel_mode)</div><div class='ctx'> 		mlx5_eswitch_unblock_encap(mdev);</div><div class='del'>-	mlx5_ipsec_rx_status_destroy(ipsec, rx);</div><div class='del'>-err_add:</div><div class='add'>+err_fs_ft:</div><div class='add'>+	ipsec_rx_sa_selector_destroy(mdev, rx);</div><div class='add'>+err_fs_ft_sa_sel:</div><div class='ctx'> 	mlx5_destroy_flow_table(rx-&gt;ft.status);</div><div class='ctx'> err_fs_ft_status:</div><div class='ctx'> 	mlx5_ipsec_fs_roce_rx_destroy(ipsec-&gt;roce, family, mdev);</div><div class='hunk'>@@ -873,7 +1234,7 @@ static int ipsec_counter_rule_tx(struct mlx5_core_dev *mdev, struct mlx5e_ipsec_</div><div class='ctx'> 	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW |</div><div class='ctx'> 			  MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 	dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dest.counter_id = mlx5_fc_id(tx-&gt;fc-&gt;cnt);</div><div class='add'>+	dest.counter = tx-&gt;fc-&gt;cnt;</div><div class='ctx'> 	fte = mlx5_add_flow_rules(tx-&gt;ft.status, spec, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 	if (IS_ERR(fte)) {</div><div class='ctx'> 		err = PTR_ERR(fte);</div><div class='hunk'>@@ -941,7 +1302,7 @@ static int tx_create(struct mlx5e_ipsec *ipsec, struct mlx5e_ipsec_tx *tx,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	ipsec_tx_create_attr_set(ipsec, tx, &amp;attr);</div><div class='del'>-	ft = ipsec_ft_create(tx-&gt;ns, attr.cnt_level, attr.prio, 1, 0);</div><div class='add'>+	ft = ipsec_ft_create(tx-&gt;ns, attr.cnt_level, attr.prio, 1, 1, 0);</div><div class='ctx'> 	if (IS_ERR(ft))</div><div class='ctx'> 		return PTR_ERR(ft);</div><div class='ctx'> 	tx-&gt;ft.status = ft;</div><div class='hunk'>@@ -951,10 +1312,12 @@ static int tx_create(struct mlx5e_ipsec *ipsec, struct mlx5e_ipsec_tx *tx,</div><div class='ctx'> 		goto err_status_rule;</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5_ipsec_device_caps(mdev) &amp; MLX5_IPSEC_CAP_TUNNEL)</div><div class='del'>-		tx-&gt;allow_tunnel_mode = mlx5_eswitch_block_encap(mdev);</div><div class='add'>+		tx-&gt;allow_tunnel_mode =</div><div class='add'>+			mlx5_eswitch_block_encap(mdev, tx == ipsec-&gt;tx_esw);</div><div class='add'>+</div><div class='ctx'> 	if (tx-&gt;allow_tunnel_mode)</div><div class='ctx'> 		flags = MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT;</div><div class='del'>-	ft = ipsec_ft_create(tx-&gt;ns, attr.sa_level, attr.prio, 4, flags);</div><div class='add'>+	ft = ipsec_ft_create(tx-&gt;ns, attr.sa_level, attr.prio, 1, 4, flags);</div><div class='ctx'> 	if (IS_ERR(ft)) {</div><div class='ctx'> 		err = PTR_ERR(ft);</div><div class='ctx'> 		goto err_sa_ft;</div><div class='hunk'>@@ -982,7 +1345,7 @@ static int tx_create(struct mlx5e_ipsec *ipsec, struct mlx5e_ipsec_tx *tx,</div><div class='ctx'> 		goto connect_roce;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ft = ipsec_ft_create(tx-&gt;ns, attr.pol_level, attr.prio, 2, 0);</div><div class='add'>+	ft = ipsec_ft_create(tx-&gt;ns, attr.pol_level, attr.prio, 1, 2, 0);</div><div class='ctx'> 	if (IS_ERR(ft)) {</div><div class='ctx'> 		err = PTR_ERR(ft);</div><div class='ctx'> 		goto err_pol_ft;</div><div class='hunk'>@@ -1150,9 +1513,14 @@ static void tx_ft_put_policy(struct mlx5e_ipsec *ipsec, u32 prio, int type)</div><div class='ctx'> 	mutex_unlock(&amp;tx-&gt;ft.mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setup_fte_addr4(struct mlx5_flow_spec *spec, __be32 *saddr,</div><div class='del'>-			    __be32 *daddr)</div><div class='add'>+static void setup_fte_addr4(struct mlx5_flow_spec *spec,</div><div class='add'>+			    struct mlx5e_ipsec_addr *addrs)</div><div class='ctx'> {</div><div class='add'>+	__be32 *saddr = &amp;addrs-&gt;saddr.a4;</div><div class='add'>+	__be32 *smask = &amp;addrs-&gt;smask.m4;</div><div class='add'>+	__be32 *daddr = &amp;addrs-&gt;daddr.a4;</div><div class='add'>+	__be32 *dmask = &amp;addrs-&gt;dmask.m4;</div><div class='add'>+</div><div class='ctx'> 	if (!*saddr &amp;&amp; !*daddr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1164,21 +1532,26 @@ static void setup_fte_addr4(struct mlx5_flow_spec *spec, __be32 *saddr,</div><div class='ctx'> 	if (*saddr) {</div><div class='ctx'> 		memcpy(MLX5_ADDR_OF(fte_match_param, spec-&gt;match_value,</div><div class='ctx'> 				    outer_headers.src_ipv4_src_ipv6.ipv4_layout.ipv4), saddr, 4);</div><div class='del'>-		MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='del'>-				 outer_headers.src_ipv4_src_ipv6.ipv4_layout.ipv4);</div><div class='add'>+		memcpy(MLX5_ADDR_OF(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+				    outer_headers.src_ipv4_src_ipv6.ipv4_layout.ipv4), smask, 4);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (*daddr) {</div><div class='ctx'> 		memcpy(MLX5_ADDR_OF(fte_match_param, spec-&gt;match_value,</div><div class='ctx'> 				    outer_headers.dst_ipv4_dst_ipv6.ipv4_layout.ipv4), daddr, 4);</div><div class='del'>-		MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='del'>-				 outer_headers.dst_ipv4_dst_ipv6.ipv4_layout.ipv4);</div><div class='add'>+		memcpy(MLX5_ADDR_OF(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+				    outer_headers.dst_ipv4_dst_ipv6.ipv4_layout.ipv4), dmask, 4);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void setup_fte_addr6(struct mlx5_flow_spec *spec, __be32 *saddr,</div><div class='del'>-			    __be32 *daddr)</div><div class='add'>+static void setup_fte_addr6(struct mlx5_flow_spec *spec,</div><div class='add'>+			    struct mlx5e_ipsec_addr *addrs)</div><div class='ctx'> {</div><div class='add'>+	__be32 *saddr = addrs-&gt;saddr.a6;</div><div class='add'>+	__be32 *smask = addrs-&gt;smask.m6;</div><div class='add'>+	__be32 *daddr = addrs-&gt;daddr.a6;</div><div class='add'>+	__be32 *dmask = addrs-&gt;dmask.m6;</div><div class='add'>+</div><div class='ctx'> 	if (addr6_all_zero(saddr) &amp;&amp; addr6_all_zero(daddr))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1190,15 +1563,15 @@ static void setup_fte_addr6(struct mlx5_flow_spec *spec, __be32 *saddr,</div><div class='ctx'> 	if (!addr6_all_zero(saddr)) {</div><div class='ctx'> 		memcpy(MLX5_ADDR_OF(fte_match_param, spec-&gt;match_value,</div><div class='ctx'> 				    outer_headers.src_ipv4_src_ipv6.ipv6_layout.ipv6), saddr, 16);</div><div class='del'>-		memset(MLX5_ADDR_OF(fte_match_param, spec-&gt;match_criteria,</div><div class='del'>-				    outer_headers.src_ipv4_src_ipv6.ipv6_layout.ipv6), 0xff, 16);</div><div class='add'>+		memcpy(MLX5_ADDR_OF(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+				    outer_headers.src_ipv4_src_ipv6.ipv6_layout.ipv6), dmask, 16);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!addr6_all_zero(daddr)) {</div><div class='ctx'> 		memcpy(MLX5_ADDR_OF(fte_match_param, spec-&gt;match_value,</div><div class='ctx'> 				    outer_headers.dst_ipv4_dst_ipv6.ipv6_layout.ipv6), daddr, 16);</div><div class='del'>-		memset(MLX5_ADDR_OF(fte_match_param, spec-&gt;match_criteria,</div><div class='del'>-				    outer_headers.dst_ipv4_dst_ipv6.ipv6_layout.ipv6), 0xff, 16);</div><div class='add'>+		memcpy(MLX5_ADDR_OF(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+				    outer_headers.dst_ipv4_dst_ipv6.ipv6_layout.ipv6), smask, 16);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1340,7 +1713,8 @@ static int setup_modify_header(struct mlx5e_ipsec *ipsec, int type, u32 val, u8</div><div class='ctx'> 				 MLX5_ACTION_TYPE_SET);</div><div class='ctx'> 			MLX5_SET(set_action_in, action[2], field,</div><div class='ctx'> 				 MLX5_ACTION_IN_FIELD_METADATA_REG_C_4);</div><div class='del'>-			MLX5_SET(set_action_in, action[2], data, 0);</div><div class='add'>+			MLX5_SET(set_action_in, action[2], data,</div><div class='add'>+				 MLX5_IPSEC_ASO_SW_CRYPTO_OFFLOAD);</div><div class='ctx'> 			MLX5_SET(set_action_in, action[2], offset, 0);</div><div class='ctx'> 			MLX5_SET(set_action_in, action[2], length, 32);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1359,8 +1733,8 @@ static int setup_modify_header(struct mlx5e_ipsec *ipsec, int type, u32 val, u8</div><div class='ctx'> </div><div class='ctx'> 	modify_hdr = mlx5_modify_header_alloc(mdev, ns_type, num_of_actions, action);</div><div class='ctx'> 	if (IS_ERR(modify_hdr)) {</div><div class='del'>-		mlx5_core_err(mdev, "Failed to allocate modify_header %ld\n",</div><div class='del'>-			      PTR_ERR(modify_hdr));</div><div class='add'>+		mlx5_core_err(mdev, "Failed to allocate modify_header %pe\n",</div><div class='add'>+			      modify_hdr);</div><div class='ctx'> 		return PTR_ERR(modify_hdr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1387,7 +1761,7 @@ setup_pkt_tunnel_reformat(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	if (attrs-&gt;dir == XFRM_DEV_OFFLOAD_OUT) {</div><div class='ctx'> 		bfflen += sizeof(*esp_hdr) + 8;</div><div class='ctx'> </div><div class='del'>-		switch (attrs-&gt;family) {</div><div class='add'>+		switch (attrs-&gt;addrs.family) {</div><div class='ctx'> 		case AF_INET:</div><div class='ctx'> 			bfflen += sizeof(*iphdr);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1404,7 +1778,7 @@ setup_pkt_tunnel_reformat(struct mlx5_core_dev *mdev,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	eth_hdr = (struct ethhdr *)reformatbf;</div><div class='del'>-	switch (attrs-&gt;family) {</div><div class='add'>+	switch (attrs-&gt;addrs.family) {</div><div class='ctx'> 	case AF_INET:</div><div class='ctx'> 		eth_hdr-&gt;h_proto = htons(ETH_P_IP);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1427,11 +1801,11 @@ setup_pkt_tunnel_reformat(struct mlx5_core_dev *mdev,</div><div class='ctx'> 		reformat_params-&gt;param_0 = attrs-&gt;authsize;</div><div class='ctx'> </div><div class='ctx'> 		hdr = reformatbf + sizeof(*eth_hdr);</div><div class='del'>-		switch (attrs-&gt;family) {</div><div class='add'>+		switch (attrs-&gt;addrs.family) {</div><div class='ctx'> 		case AF_INET:</div><div class='ctx'> 			iphdr = (struct iphdr *)hdr;</div><div class='del'>-			memcpy(&amp;iphdr-&gt;saddr, &amp;attrs-&gt;saddr.a4, 4);</div><div class='del'>-			memcpy(&amp;iphdr-&gt;daddr, &amp;attrs-&gt;daddr.a4, 4);</div><div class='add'>+			memcpy(&amp;iphdr-&gt;saddr, &amp;attrs-&gt;addrs.saddr.a4, 4);</div><div class='add'>+			memcpy(&amp;iphdr-&gt;daddr, &amp;attrs-&gt;addrs.daddr.a4, 4);</div><div class='ctx'> 			iphdr-&gt;version = 4;</div><div class='ctx'> 			iphdr-&gt;ihl = 5;</div><div class='ctx'> 			iphdr-&gt;ttl = IPSEC_TUNNEL_DEFAULT_TTL;</div><div class='hunk'>@@ -1440,8 +1814,8 @@ setup_pkt_tunnel_reformat(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AF_INET6:</div><div class='ctx'> 			ipv6hdr = (struct ipv6hdr *)hdr;</div><div class='del'>-			memcpy(&amp;ipv6hdr-&gt;saddr, &amp;attrs-&gt;saddr.a6, 16);</div><div class='del'>-			memcpy(&amp;ipv6hdr-&gt;daddr, &amp;attrs-&gt;daddr.a6, 16);</div><div class='add'>+			memcpy(&amp;ipv6hdr-&gt;saddr, &amp;attrs-&gt;addrs.saddr.a6, 16);</div><div class='add'>+			memcpy(&amp;ipv6hdr-&gt;daddr, &amp;attrs-&gt;addrs.daddr.a6, 16);</div><div class='ctx'> 			ipv6hdr-&gt;nexthdr = IPPROTO_ESP;</div><div class='ctx'> 			ipv6hdr-&gt;version = 6;</div><div class='ctx'> 			ipv6hdr-&gt;hop_limit = IPSEC_TUNNEL_DEFAULT_TTL;</div><div class='hunk'>@@ -1475,7 +1849,7 @@ static int get_reformat_type(struct mlx5_accel_esp_xfrm_attrs *attrs)</div><div class='ctx'> 			return MLX5_REFORMAT_TYPE_DEL_ESP_TRANSPORT_OVER_UDP;</div><div class='ctx'> 		return MLX5_REFORMAT_TYPE_DEL_ESP_TRANSPORT;</div><div class='ctx'> 	case XFRM_DEV_OFFLOAD_OUT:</div><div class='del'>-		if (attrs-&gt;family == AF_INET) {</div><div class='add'>+		if (attrs-&gt;addrs.family == AF_INET) {</div><div class='ctx'> 			if (attrs-&gt;encap)</div><div class='ctx'> 				return MLX5_REFORMAT_TYPE_ADD_ESP_TRANSPORT_OVER_UDPV4;</div><div class='ctx'> 			return MLX5_REFORMAT_TYPE_ADD_ESP_TRANSPORT_OVER_IPV4;</div><div class='hunk'>@@ -1576,6 +1950,85 @@ static int setup_pkt_reformat(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rx_add_rule_sa_selector(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='add'>+				   struct mlx5e_ipsec_rx *rx,</div><div class='add'>+				   struct upspec *upspec)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_ipsec *ipsec = sa_entry-&gt;ipsec;</div><div class='add'>+	struct mlx5_core_dev *mdev = ipsec-&gt;mdev;</div><div class='add'>+	struct mlx5_flow_destination dest[2];</div><div class='add'>+	struct mlx5_flow_act flow_act = {};</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mlx5_flow_spec *spec;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	spec = kvzalloc(sizeof(*spec), GFP_KERNEL);</div><div class='add'>+	if (!spec)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+			 misc_parameters_2.ipsec_syndrome);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+			 misc_parameters_2.metadata_reg_c_4);</div><div class='add'>+	MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+		 misc_parameters_2.ipsec_syndrome, 0);</div><div class='add'>+	MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+		 misc_parameters_2.metadata_reg_c_4, 0);</div><div class='add'>+	spec-&gt;match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2;</div><div class='add'>+</div><div class='add'>+	ipsec_rx_rule_add_match_obj(sa_entry, rx, spec);</div><div class='add'>+</div><div class='add'>+	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |</div><div class='add'>+			  MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='add'>+	flow_act.flags = FLOW_ACT_IGNORE_FLOW_LEVEL;</div><div class='add'>+	dest[0].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='add'>+	dest[0].ft = rx-&gt;ft.sa_sel;</div><div class='add'>+	dest[1].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='add'>+	dest[1].counter = rx-&gt;fc-&gt;cnt;</div><div class='add'>+</div><div class='add'>+	rule = mlx5_add_flow_rules(rx-&gt;ft.status, spec, &amp;flow_act, dest, 2);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		mlx5_core_err(mdev,</div><div class='add'>+			      "Failed to add ipsec rx pass rule, err=%d\n",</div><div class='add'>+			      err);</div><div class='add'>+		goto err_add_status_pass_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sa_entry-&gt;ipsec_rule.status_pass = rule;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+		 misc_parameters_2.ipsec_syndrome, 0);</div><div class='add'>+	MLX5_SET(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+		 misc_parameters_2.metadata_reg_c_4, 0);</div><div class='add'>+</div><div class='add'>+	setup_fte_upper_proto_match(spec, upspec);</div><div class='add'>+</div><div class='add'>+	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;</div><div class='add'>+	dest[0].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='add'>+	dest[0].ft = rx-&gt;ft.pol;</div><div class='add'>+</div><div class='add'>+	rule = mlx5_add_flow_rules(rx-&gt;ft.sa_sel, spec, &amp;flow_act, &amp;dest[0], 1);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		mlx5_core_err(mdev,</div><div class='add'>+			      "Failed to add ipsec rx sa selector rule, err=%d\n",</div><div class='add'>+			      err);</div><div class='add'>+		goto err_add_sa_sel_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sa_entry-&gt;ipsec_rule.sa_sel = rule;</div><div class='add'>+</div><div class='add'>+	kvfree(spec);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_add_sa_sel_rule:</div><div class='add'>+	mlx5_del_flow_rules(sa_entry-&gt;ipsec_rule.status_pass);</div><div class='add'>+err_add_status_pass_rule:</div><div class='add'>+	kvfree(spec);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rx_add_rule(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_accel_esp_xfrm_attrs *attrs = &amp;sa_entry-&gt;attrs;</div><div class='hunk'>@@ -1589,7 +2042,7 @@ static int rx_add_rule(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> 	struct mlx5_fc *counter;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	rx = rx_ft_get(mdev, ipsec, attrs-&gt;family, attrs-&gt;type);</div><div class='add'>+	rx = rx_ft_get(mdev, ipsec, attrs-&gt;addrs.family, attrs-&gt;type);</div><div class='ctx'> 	if (IS_ERR(rx))</div><div class='ctx'> 		return PTR_ERR(rx);</div><div class='ctx'> </div><div class='hunk'>@@ -1599,16 +2052,15 @@ static int rx_add_rule(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> 		goto err_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (attrs-&gt;family == AF_INET)</div><div class='del'>-		setup_fte_addr4(spec, &amp;attrs-&gt;saddr.a4, &amp;attrs-&gt;daddr.a4);</div><div class='add'>+	if (attrs-&gt;addrs.family == AF_INET)</div><div class='add'>+		setup_fte_addr4(spec, &amp;attrs-&gt;addrs);</div><div class='ctx'> 	else</div><div class='del'>-		setup_fte_addr6(spec, attrs-&gt;saddr.a6, attrs-&gt;daddr.a6);</div><div class='add'>+		setup_fte_addr6(spec, &amp;attrs-&gt;addrs);</div><div class='ctx'> </div><div class='ctx'> 	setup_fte_spi(spec, attrs-&gt;spi, attrs-&gt;encap);</div><div class='ctx'> 	if (!attrs-&gt;encap)</div><div class='ctx'> 		setup_fte_esp(spec);</div><div class='ctx'> 	setup_fte_no_frags(spec);</div><div class='del'>-	setup_fte_upper_proto_match(spec, &amp;attrs-&gt;upspec);</div><div class='ctx'> </div><div class='ctx'> 	if (!attrs-&gt;drop) {</div><div class='ctx'> 		if (rx != ipsec-&gt;rx_esw)</div><div class='hunk'>@@ -1649,13 +2101,20 @@ static int rx_add_rule(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> 	dest[0].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='ctx'> 	dest[0].ft = rx-&gt;ft.status;</div><div class='ctx'> 	dest[1].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dest[1].counter_id = mlx5_fc_id(counter);</div><div class='add'>+	dest[1].counter = counter;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(rx-&gt;ft.sa, spec, &amp;flow_act, dest, 2);</div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='ctx'> 		err = PTR_ERR(rule);</div><div class='ctx'> 		mlx5_core_err(mdev, "fail to add RX ipsec rule err=%d\n", err);</div><div class='ctx'> 		goto err_add_flow;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (attrs-&gt;upspec.proto &amp;&amp; attrs-&gt;type == XFRM_DEV_OFFLOAD_PACKET) {</div><div class='add'>+		err = rx_add_rule_sa_selector(sa_entry, rx, &amp;attrs-&gt;upspec);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_add_sa_sel;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (attrs-&gt;type == XFRM_DEV_OFFLOAD_PACKET)</div><div class='ctx'> 		err = rx_add_rule_drop_replay(sa_entry, rx);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1679,6 +2138,11 @@ err_drop_reason:</div><div class='ctx'> 		mlx5_fc_destroy(mdev, sa_entry-&gt;ipsec_rule.replay.fc);</div><div class='ctx'> 	}</div><div class='ctx'> err_add_replay:</div><div class='add'>+	if (sa_entry-&gt;ipsec_rule.sa_sel) {</div><div class='add'>+		mlx5_del_flow_rules(sa_entry-&gt;ipsec_rule.sa_sel);</div><div class='add'>+		mlx5_del_flow_rules(sa_entry-&gt;ipsec_rule.status_pass);</div><div class='add'>+	}</div><div class='add'>+err_add_sa_sel:</div><div class='ctx'> 	mlx5_del_flow_rules(rule);</div><div class='ctx'> err_add_flow:</div><div class='ctx'> 	mlx5_fc_destroy(mdev, counter);</div><div class='hunk'>@@ -1691,7 +2155,7 @@ err_pkt_reformat:</div><div class='ctx'> err_mod_header:</div><div class='ctx'> 	kvfree(spec);</div><div class='ctx'> err_alloc:</div><div class='del'>-	rx_ft_put(ipsec, attrs-&gt;family, attrs-&gt;type);</div><div class='add'>+	rx_ft_put(ipsec, attrs-&gt;addrs.family, attrs-&gt;type);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1718,23 +2182,21 @@ static int tx_add_rule(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> 		goto err_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (attrs-&gt;family == AF_INET)</div><div class='del'>-		setup_fte_addr4(spec, &amp;attrs-&gt;saddr.a4, &amp;attrs-&gt;daddr.a4);</div><div class='del'>-	else</div><div class='del'>-		setup_fte_addr6(spec, attrs-&gt;saddr.a6, attrs-&gt;daddr.a6);</div><div class='del'>-</div><div class='ctx'> 	setup_fte_no_frags(spec);</div><div class='ctx'> 	setup_fte_upper_proto_match(spec, &amp;attrs-&gt;upspec);</div><div class='ctx'> </div><div class='ctx'> 	switch (attrs-&gt;type) {</div><div class='ctx'> 	case XFRM_DEV_OFFLOAD_CRYPTO:</div><div class='add'>+		if (attrs-&gt;addrs.family == AF_INET)</div><div class='add'>+			setup_fte_addr4(spec, &amp;attrs-&gt;addrs);</div><div class='add'>+		else</div><div class='add'>+			setup_fte_addr6(spec, &amp;attrs-&gt;addrs);</div><div class='ctx'> 		setup_fte_spi(spec, attrs-&gt;spi, false);</div><div class='ctx'> 		setup_fte_esp(spec);</div><div class='ctx'> 		setup_fte_reg_a(spec);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XFRM_DEV_OFFLOAD_PACKET:</div><div class='del'>-		if (attrs-&gt;reqid)</div><div class='del'>-			setup_fte_reg_c4(spec, attrs-&gt;reqid);</div><div class='add'>+		setup_fte_reg_c4(spec, attrs-&gt;reqid);</div><div class='ctx'> 		err = setup_pkt_reformat(ipsec, attrs, &amp;flow_act);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_pkt_reformat;</div><div class='hunk'>@@ -1762,7 +2224,7 @@ static int tx_add_rule(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> 	dest[0].ft = tx-&gt;ft.status;</div><div class='ctx'> 	dest[0].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='ctx'> 	dest[1].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dest[1].counter_id = mlx5_fc_id(counter);</div><div class='add'>+	dest[1].counter = counter;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(tx-&gt;ft.sa, spec, &amp;flow_act, dest, 2);</div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='ctx'> 		err = PTR_ERR(rule);</div><div class='hunk'>@@ -1812,10 +2274,10 @@ static int tx_add_policy(struct mlx5e_ipsec_pol_entry *pol_entry)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tx = ipsec_tx(ipsec, attrs-&gt;type);</div><div class='del'>-	if (attrs-&gt;family == AF_INET)</div><div class='del'>-		setup_fte_addr4(spec, &amp;attrs-&gt;saddr.a4, &amp;attrs-&gt;daddr.a4);</div><div class='add'>+	if (attrs-&gt;addrs.family == AF_INET)</div><div class='add'>+		setup_fte_addr4(spec, &amp;attrs-&gt;addrs);</div><div class='ctx'> 	else</div><div class='del'>-		setup_fte_addr6(spec, attrs-&gt;saddr.a6, attrs-&gt;daddr.a6);</div><div class='add'>+		setup_fte_addr6(spec, &amp;attrs-&gt;addrs);</div><div class='ctx'> </div><div class='ctx'> 	setup_fte_no_frags(spec);</div><div class='ctx'> 	setup_fte_upper_proto_match(spec, &amp;attrs-&gt;upspec);</div><div class='hunk'>@@ -1835,7 +2297,7 @@ static int tx_add_policy(struct mlx5e_ipsec_pol_entry *pol_entry)</div><div class='ctx'> 		flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_DROP |</div><div class='ctx'> 				   MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 		dest[dstn].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-		dest[dstn].counter_id = mlx5_fc_id(tx-&gt;fc-&gt;drop);</div><div class='add'>+		dest[dstn].counter = tx-&gt;fc-&gt;drop;</div><div class='ctx'> 		dstn++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1885,12 +2347,12 @@ static int rx_add_policy(struct mlx5e_ipsec_pol_entry *pol_entry)</div><div class='ctx'> 	struct mlx5e_ipsec_rx *rx;</div><div class='ctx'> 	int err, dstn = 0;</div><div class='ctx'> </div><div class='del'>-	ft = rx_ft_get_policy(mdev, pol_entry-&gt;ipsec, attrs-&gt;family, attrs-&gt;prio,</div><div class='del'>-			      attrs-&gt;type);</div><div class='add'>+	ft = rx_ft_get_policy(mdev, pol_entry-&gt;ipsec, attrs-&gt;addrs.family,</div><div class='add'>+			      attrs-&gt;prio, attrs-&gt;type);</div><div class='ctx'> 	if (IS_ERR(ft))</div><div class='ctx'> 		return PTR_ERR(ft);</div><div class='ctx'> </div><div class='del'>-	rx = ipsec_rx(pol_entry-&gt;ipsec, attrs-&gt;family, attrs-&gt;type);</div><div class='add'>+	rx = ipsec_rx(pol_entry-&gt;ipsec, attrs-&gt;addrs.family, attrs-&gt;type);</div><div class='ctx'> </div><div class='ctx'> 	spec = kvzalloc(sizeof(*spec), GFP_KERNEL);</div><div class='ctx'> 	if (!spec) {</div><div class='hunk'>@@ -1898,10 +2360,10 @@ static int rx_add_policy(struct mlx5e_ipsec_pol_entry *pol_entry)</div><div class='ctx'> 		goto err_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (attrs-&gt;family == AF_INET)</div><div class='del'>-		setup_fte_addr4(spec, &amp;attrs-&gt;saddr.a4, &amp;attrs-&gt;daddr.a4);</div><div class='add'>+	if (attrs-&gt;addrs.family == AF_INET)</div><div class='add'>+		setup_fte_addr4(spec, &amp;attrs-&gt;addrs);</div><div class='ctx'> 	else</div><div class='del'>-		setup_fte_addr6(spec, attrs-&gt;saddr.a6, attrs-&gt;daddr.a6);</div><div class='add'>+		setup_fte_addr6(spec, &amp;attrs-&gt;addrs);</div><div class='ctx'> </div><div class='ctx'> 	setup_fte_no_frags(spec);</div><div class='ctx'> 	setup_fte_upper_proto_match(spec, &amp;attrs-&gt;upspec);</div><div class='hunk'>@@ -1913,7 +2375,7 @@ static int rx_add_policy(struct mlx5e_ipsec_pol_entry *pol_entry)</div><div class='ctx'> 	case XFRM_POLICY_BLOCK:</div><div class='ctx'> 		flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_DROP | MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 		dest[dstn].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-		dest[dstn].counter_id = mlx5_fc_id(rx-&gt;fc-&gt;drop);</div><div class='add'>+		dest[dstn].counter = rx-&gt;fc-&gt;drop;</div><div class='ctx'> 		dstn++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1925,8 +2387,7 @@ static int rx_add_policy(struct mlx5e_ipsec_pol_entry *pol_entry)</div><div class='ctx'> 	flow_act.flags |= FLOW_ACT_NO_APPEND;</div><div class='ctx'> 	if (rx == ipsec-&gt;rx_esw &amp;&amp; rx-&gt;chains)</div><div class='ctx'> 		flow_act.flags |= FLOW_ACT_IGNORE_FLOW_LEVEL;</div><div class='del'>-	dest[dstn].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='del'>-	dest[dstn].ft = rx-&gt;ft.sa;</div><div class='add'>+	ipsec_rx_default_dest_get(ipsec, rx, &amp;dest[dstn]);</div><div class='ctx'> 	dstn++;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(ft, spec, &amp;flow_act, dest, dstn);</div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='hunk'>@@ -1942,7 +2403,8 @@ static int rx_add_policy(struct mlx5e_ipsec_pol_entry *pol_entry)</div><div class='ctx'> err_action:</div><div class='ctx'> 	kvfree(spec);</div><div class='ctx'> err_alloc:</div><div class='del'>-	rx_ft_put_policy(pol_entry-&gt;ipsec, attrs-&gt;family, attrs-&gt;prio, attrs-&gt;type);</div><div class='add'>+	rx_ft_put_policy(pol_entry-&gt;ipsec, attrs-&gt;addrs.family, attrs-&gt;prio,</div><div class='add'>+			 attrs-&gt;type);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2063,6 +2525,7 @@ void mlx5e_accel_ipsec_fs_read_stats(struct mlx5e_priv *priv, void *ipsec_stats)</div><div class='ctx'> 	stats-&gt;ipsec_rx_bytes = 0;</div><div class='ctx'> 	stats-&gt;ipsec_rx_drop_pkts = 0;</div><div class='ctx'> 	stats-&gt;ipsec_rx_drop_bytes = 0;</div><div class='add'>+	stats-&gt;ipsec_rx_drop_mismatch_sa_sel = 0;</div><div class='ctx'> 	stats-&gt;ipsec_tx_pkts = 0;</div><div class='ctx'> 	stats-&gt;ipsec_tx_bytes = 0;</div><div class='ctx'> 	stats-&gt;ipsec_tx_drop_pkts = 0;</div><div class='hunk'>@@ -2072,6 +2535,9 @@ void mlx5e_accel_ipsec_fs_read_stats(struct mlx5e_priv *priv, void *ipsec_stats)</div><div class='ctx'> 	mlx5_fc_query(mdev, fc-&gt;cnt, &amp;stats-&gt;ipsec_rx_pkts, &amp;stats-&gt;ipsec_rx_bytes);</div><div class='ctx'> 	mlx5_fc_query(mdev, fc-&gt;drop, &amp;stats-&gt;ipsec_rx_drop_pkts,</div><div class='ctx'> 		      &amp;stats-&gt;ipsec_rx_drop_bytes);</div><div class='add'>+	if (ipsec-&gt;rx_ipv4-&gt;sa_sel.fc)</div><div class='add'>+		mlx5_fc_query(mdev, ipsec-&gt;rx_ipv4-&gt;sa_sel.fc,</div><div class='add'>+			      &amp;stats-&gt;ipsec_rx_drop_mismatch_sa_sel, &amp;bytes);</div><div class='ctx'> </div><div class='ctx'> 	fc = ipsec-&gt;tx-&gt;fc;</div><div class='ctx'> 	mlx5_fc_query(mdev, fc-&gt;cnt, &amp;stats-&gt;ipsec_tx_pkts, &amp;stats-&gt;ipsec_tx_bytes);</div><div class='hunk'>@@ -2100,6 +2566,11 @@ void mlx5e_accel_ipsec_fs_read_stats(struct mlx5e_priv *priv, void *ipsec_stats)</div><div class='ctx'> 			stats-&gt;ipsec_tx_drop_pkts += packets;</div><div class='ctx'> 			stats-&gt;ipsec_tx_drop_bytes += bytes;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (ipsec-&gt;rx_esw-&gt;sa_sel.fc &amp;&amp;</div><div class='add'>+		    !mlx5_fc_query(mdev, ipsec-&gt;rx_esw-&gt;sa_sel.fc,</div><div class='add'>+				   &amp;packets, &amp;bytes))</div><div class='add'>+			stats-&gt;ipsec_rx_drop_mismatch_sa_sel += packets;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2197,12 +2668,18 @@ void mlx5e_accel_ipsec_fs_del_rule(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> 	mlx5_del_flow_rules(ipsec_rule-&gt;auth.rule);</div><div class='ctx'> 	mlx5_fc_destroy(mdev, ipsec_rule-&gt;auth.fc);</div><div class='ctx'> </div><div class='add'>+	if (ipsec_rule-&gt;sa_sel) {</div><div class='add'>+		mlx5_del_flow_rules(ipsec_rule-&gt;sa_sel);</div><div class='add'>+		mlx5_del_flow_rules(ipsec_rule-&gt;status_pass);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (ipsec_rule-&gt;replay.rule) {</div><div class='ctx'> 		mlx5_del_flow_rules(ipsec_rule-&gt;replay.rule);</div><div class='ctx'> 		mlx5_fc_destroy(mdev, ipsec_rule-&gt;replay.fc);</div><div class='ctx'> 	}</div><div class='ctx'> 	mlx5_esw_ipsec_rx_id_mapping_remove(sa_entry);</div><div class='del'>-	rx_ft_put(sa_entry-&gt;ipsec, sa_entry-&gt;attrs.family, sa_entry-&gt;attrs.type);</div><div class='add'>+	rx_ft_put(sa_entry-&gt;ipsec, sa_entry-&gt;attrs.addrs.family,</div><div class='add'>+		  sa_entry-&gt;attrs.type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5e_accel_ipsec_fs_add_pol(struct mlx5e_ipsec_pol_entry *pol_entry)</div><div class='hunk'>@@ -2238,7 +2715,8 @@ void mlx5e_accel_ipsec_fs_del_pol(struct mlx5e_ipsec_pol_entry *pol_entry)</div><div class='ctx'> 	mlx5e_ipsec_unblock_tc_offload(pol_entry-&gt;ipsec-&gt;mdev);</div><div class='ctx'> </div><div class='ctx'> 	if (pol_entry-&gt;attrs.dir == XFRM_DEV_OFFLOAD_IN) {</div><div class='del'>-		rx_ft_put_policy(pol_entry-&gt;ipsec, pol_entry-&gt;attrs.family,</div><div class='add'>+		rx_ft_put_policy(pol_entry-&gt;ipsec,</div><div class='add'>+				 pol_entry-&gt;attrs.addrs.family,</div><div class='ctx'> 				 pol_entry-&gt;attrs.prio, pol_entry-&gt;attrs.type);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2372,18 +2850,24 @@ void mlx5e_accel_ipsec_fs_modify(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> 	memcpy(sa_entry, &amp;sa_entry_shadow, sizeof(*sa_entry));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool mlx5e_ipsec_fs_tunnel_enabled(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='add'>+bool mlx5e_ipsec_fs_tunnel_allowed(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_accel_esp_xfrm_attrs *attrs = &amp;sa_entry-&gt;attrs;</div><div class='del'>-	struct mlx5e_ipsec_rx *rx;</div><div class='del'>-	struct mlx5e_ipsec_tx *tx;</div><div class='add'>+	struct mlx5e_ipsec *ipsec = sa_entry-&gt;ipsec;</div><div class='add'>+	struct xfrm_state *x = sa_entry-&gt;x;</div><div class='add'>+	bool from_fdb;</div><div class='ctx'> </div><div class='del'>-	rx = ipsec_rx(sa_entry-&gt;ipsec, attrs-&gt;family, attrs-&gt;type);</div><div class='del'>-	tx = ipsec_tx(sa_entry-&gt;ipsec, attrs-&gt;type);</div><div class='del'>-	if (sa_entry-&gt;attrs.dir == XFRM_DEV_OFFLOAD_OUT)</div><div class='del'>-		return tx-&gt;allow_tunnel_mode;</div><div class='add'>+	if (x-&gt;xso.dir == XFRM_DEV_OFFLOAD_OUT) {</div><div class='add'>+		struct mlx5e_ipsec_tx *tx = ipsec_tx(ipsec, x-&gt;xso.type);</div><div class='add'>+</div><div class='add'>+		from_fdb = (tx == ipsec-&gt;tx_esw);</div><div class='add'>+	} else {</div><div class='add'>+		struct mlx5e_ipsec_rx *rx = ipsec_rx(ipsec, x-&gt;props.family,</div><div class='add'>+						     x-&gt;xso.type);</div><div class='add'>+</div><div class='add'>+		from_fdb = (rx == ipsec-&gt;rx_esw);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return rx-&gt;allow_tunnel_mode;</div><div class='add'>+	return mlx5_eswitch_block_encap(ipsec-&gt;mdev, from_fdb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5e_ipsec_handle_mpv_event(int event, struct mlx5e_priv *slave_priv,</div><div class='hunk'>@@ -2409,9 +2893,30 @@ void mlx5e_ipsec_handle_mpv_event(int event, struct mlx5e_priv *slave_priv,</div><div class='ctx'> </div><div class='ctx'> void mlx5e_ipsec_send_event(struct mlx5e_priv *priv, int event)</div><div class='ctx'> {</div><div class='del'>-	if (!priv-&gt;ipsec)</div><div class='del'>-		return; /* IPsec not supported */</div><div class='add'>+	if (!priv-&gt;ipsec || mlx5_devcom_comp_get_size(priv-&gt;devcom) &lt; 2)</div><div class='add'>+		return; /* IPsec not supported or no peers */</div><div class='ctx'> </div><div class='ctx'> 	mlx5_devcom_send_event(priv-&gt;devcom, event, event, priv);</div><div class='ctx'> 	wait_for_completion(&amp;priv-&gt;ipsec-&gt;comp);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void mlx5e_ipsec_disable_events(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_devcom_comp_dev *tmp = NULL;</div><div class='add'>+	struct mlx5e_priv *peer_priv;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;devcom)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!mlx5_devcom_for_each_peer_begin(priv-&gt;devcom))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	peer_priv = mlx5_devcom_get_next_peer_data(priv-&gt;devcom, &amp;tmp);</div><div class='add'>+	if (peer_priv)</div><div class='add'>+		complete_all(&amp;peer_priv-&gt;ipsec-&gt;comp);</div><div class='add'>+</div><div class='add'>+	mlx5_devcom_for_each_peer_end(priv-&gt;devcom);</div><div class='add'>+out:</div><div class='add'>+	mlx5_devcom_unregister_component(priv-&gt;devcom);</div><div class='add'>+	priv-&gt;devcom = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c<br/>index 53cfa39188cb..ef7322d381af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c</a></div><div class='hunk'>@@ -42,8 +42,7 @@ u32 mlx5_ipsec_device_caps(struct mlx5_core_dev *mdev)</div><div class='ctx'> </div><div class='ctx'> 	if (MLX5_CAP_IPSEC(mdev, ipsec_full_offload) &amp;&amp;</div><div class='ctx'> 	    (mdev-&gt;priv.steering-&gt;mode == MLX5_FLOW_STEERING_MODE_DMFS ||</div><div class='del'>-	     (mdev-&gt;priv.steering-&gt;mode == MLX5_FLOW_STEERING_MODE_SMFS &amp;&amp;</div><div class='del'>-	     is_mdev_legacy_mode(mdev)))) {</div><div class='add'>+	     is_mdev_legacy_mode(mdev))) {</div><div class='ctx'> 		if (MLX5_CAP_FLOWTABLE_NIC_TX(mdev,</div><div class='ctx'> 					      reformat_add_esp_trasport) &amp;&amp;</div><div class='ctx'> 		    MLX5_CAP_FLOWTABLE_NIC_RX(mdev,</div><div class='hunk'>@@ -91,8 +90,9 @@ u32 mlx5_ipsec_device_caps(struct mlx5_core_dev *mdev)</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx5_ipsec_device_caps);</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_ipsec_packet_setup(void *obj, u32 pdn,</div><div class='del'>-				     struct mlx5_accel_esp_xfrm_attrs *attrs)</div><div class='add'>+				     struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_accel_esp_xfrm_attrs *attrs = &amp;sa_entry-&gt;attrs;</div><div class='ctx'> 	void *aso_ctx;</div><div class='ctx'> </div><div class='ctx'> 	aso_ctx = MLX5_ADDR_OF(ipsec_obj, obj, ipsec_aso);</div><div class='hunk'>@@ -120,8 +120,12 @@ static void mlx5e_ipsec_packet_setup(void *obj, u32 pdn,</div><div class='ctx'> 	 * active.</div><div class='ctx'> 	 */</div><div class='ctx'> 	MLX5_SET(ipsec_obj, obj, aso_return_reg, MLX5_IPSEC_ASO_REG_C_4_5);</div><div class='del'>-	if (attrs-&gt;dir == XFRM_DEV_OFFLOAD_OUT)</div><div class='add'>+	if (attrs-&gt;dir == XFRM_DEV_OFFLOAD_OUT) {</div><div class='ctx'> 		MLX5_SET(ipsec_aso, aso_ctx, mode, MLX5_IPSEC_ASO_INC_SN);</div><div class='add'>+		if (!attrs-&gt;replay_esn.trigger)</div><div class='add'>+			MLX5_SET(ipsec_aso, aso_ctx, mode_parameter,</div><div class='add'>+				 sa_entry-&gt;esn_state.esn);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (attrs-&gt;lft.hard_packet_limit != XFRM_INF) {</div><div class='ctx'> 		MLX5_SET(ipsec_aso, aso_ctx, remove_flow_pkt_cnt,</div><div class='hunk'>@@ -175,7 +179,7 @@ static int mlx5_create_ipsec_obj(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> </div><div class='ctx'> 	res = &amp;mdev-&gt;mlx5e_res.hw_objs;</div><div class='ctx'> 	if (attrs-&gt;type == XFRM_DEV_OFFLOAD_PACKET)</div><div class='del'>-		mlx5e_ipsec_packet_setup(obj, res-&gt;pdn, attrs);</div><div class='add'>+		mlx5e_ipsec_packet_setup(obj, res-&gt;pdn, sa_entry);</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));</div><div class='ctx'> 	if (!err)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c<br/>index 727fa7c18523..6056106edcc6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c</a></div><div class='hunk'>@@ -327,6 +327,10 @@ void mlx5e_ipsec_offload_handle_rx_skb(struct net_device *netdev,</div><div class='ctx'> 	if (unlikely(!sa_entry)) {</div><div class='ctx'> 		rcu_read_unlock();</div><div class='ctx'> 		atomic64_inc(&amp;ipsec-&gt;sw_stats.ipsec_rx_drop_sadb_miss);</div><div class='add'>+		/* Clear secpath to prevent invalid dereference</div><div class='add'>+		 * in downstream XFRM policy checks.</div><div class='add'>+		 */</div><div class='add'>+		secpath_reset(skb);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	xfrm_state_hold(sa_entry-&gt;x);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h<br/>index 3cc640669247..45b0d19e735c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h</a></div><div class='hunk'>@@ -40,7 +40,7 @@</div><div class='ctx'> #include "en/txrx.h"</div><div class='ctx'> </div><div class='ctx'> /* Bit31: IPsec marker, Bit30: reserved, Bit29-24: IPsec syndrome, Bit23-0: IPsec obj id */</div><div class='del'>-#define MLX5_IPSEC_METADATA_MARKER(metadata)  (((metadata) &gt;&gt; 31) &amp; 0x1)</div><div class='add'>+#define MLX5_IPSEC_METADATA_MARKER(metadata)  ((((metadata) &gt;&gt; 30) &amp; 0x3) == 0x2)</div><div class='ctx'> #define MLX5_IPSEC_METADATA_SYNDROM(metadata) (((metadata) &gt;&gt; 24) &amp; GENMASK(5, 0))</div><div class='ctx'> #define MLX5_IPSEC_METADATA_HANDLE(metadata)  ((metadata) &amp; GENMASK(23, 0))</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c<br/>index 92bf3fa44a3b..93be388068f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c</a></div><div class='hunk'>@@ -42,6 +42,7 @@ static const struct counter_desc mlx5e_ipsec_hw_stats_desc[] = {</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_hw_stats, ipsec_rx_bytes) },</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_hw_stats, ipsec_rx_drop_pkts) },</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_hw_stats, ipsec_rx_drop_bytes) },</div><div class='add'>+	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_hw_stats, ipsec_rx_drop_mismatch_sa_sel) },</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_hw_stats, ipsec_tx_pkts) },</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_hw_stats, ipsec_tx_bytes) },</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_hw_stats, ipsec_tx_drop_pkts) },</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c<br/>index 65ccb33edafb..da2d1eb52c13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c</a></div><div class='hunk'>@@ -320,7 +320,6 @@ err_dma_unmap:</div><div class='ctx'> err_free:</div><div class='ctx'> 	kfree(buf);</div><div class='ctx'> err_out:</div><div class='del'>-	priv_rx-&gt;rq_stats-&gt;tls_resync_req_skip++;</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -339,14 +338,19 @@ static void resync_handle_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(test_bit(MLX5E_PRIV_RX_FLAG_DELETING, priv_rx-&gt;flags))) {</div><div class='ctx'> 		mlx5e_ktls_priv_rx_put(priv_rx);</div><div class='add'>+		priv_rx-&gt;rq_stats-&gt;tls_resync_req_skip++;</div><div class='add'>+		tls_offload_rx_resync_async_request_cancel(&amp;resync-&gt;core);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	c = resync-&gt;priv-&gt;channels.c[priv_rx-&gt;rxq];</div><div class='ctx'> 	sq = &amp;c-&gt;async_icosq;</div><div class='ctx'> </div><div class='del'>-	if (resync_post_get_progress_params(sq, priv_rx))</div><div class='add'>+	if (resync_post_get_progress_params(sq, priv_rx)) {</div><div class='add'>+		priv_rx-&gt;rq_stats-&gt;tls_resync_req_skip++;</div><div class='add'>+		tls_offload_rx_resync_async_request_cancel(&amp;resync-&gt;core);</div><div class='ctx'> 		mlx5e_ktls_priv_rx_put(priv_rx);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void resync_init(struct mlx5e_ktls_rx_resync_ctx *resync,</div><div class='hunk'>@@ -425,14 +429,21 @@ void mlx5e_ktls_handle_get_psv_completion(struct mlx5e_icosq_wqe_info *wi,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_ktls_rx_resync_buf *buf = wi-&gt;tls_get_params.buf;</div><div class='ctx'> 	struct mlx5e_ktls_offload_context_rx *priv_rx;</div><div class='add'>+	struct tls_offload_resync_async *async_resync;</div><div class='add'>+	struct tls_offload_context_rx *rx_ctx;</div><div class='ctx'> 	u8 tracker_state, auth_state, *ctx;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	u32 hw_seq;</div><div class='ctx'> </div><div class='ctx'> 	priv_rx = buf-&gt;priv_rx;</div><div class='ctx'> 	dev = mlx5_core_dma_dev(sq-&gt;channel-&gt;mdev);</div><div class='del'>-	if (unlikely(test_bit(MLX5E_PRIV_RX_FLAG_DELETING, priv_rx-&gt;flags)))</div><div class='add'>+	rx_ctx = tls_offload_ctx_rx(tls_get_ctx(priv_rx-&gt;sk));</div><div class='add'>+	async_resync = rx_ctx-&gt;resync_async;</div><div class='add'>+	if (unlikely(test_bit(MLX5E_PRIV_RX_FLAG_DELETING, priv_rx-&gt;flags))) {</div><div class='add'>+		priv_rx-&gt;rq_stats-&gt;tls_resync_req_skip++;</div><div class='add'>+		tls_offload_rx_resync_async_request_cancel(async_resync);</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dma_sync_single_for_cpu(dev, buf-&gt;dma_addr, PROGRESS_PARAMS_PADDED_SIZE,</div><div class='ctx'> 				DMA_FROM_DEVICE);</div><div class='hunk'>@@ -443,11 +454,13 @@ void mlx5e_ktls_handle_get_psv_completion(struct mlx5e_icosq_wqe_info *wi,</div><div class='ctx'> 	if (tracker_state != MLX5E_TLS_PROGRESS_PARAMS_RECORD_TRACKER_STATE_TRACKING ||</div><div class='ctx'> 	    auth_state != MLX5E_TLS_PROGRESS_PARAMS_AUTH_STATE_NO_OFFLOAD) {</div><div class='ctx'> 		priv_rx-&gt;rq_stats-&gt;tls_resync_req_skip++;</div><div class='add'>+		tls_offload_rx_resync_async_request_cancel(async_resync);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hw_seq = MLX5_GET(tls_progress_params, ctx, hw_resync_tcp_sn);</div><div class='del'>-	tls_offload_rx_resync_async_request_end(priv_rx-&gt;sk, cpu_to_be32(hw_seq));</div><div class='add'>+	tls_offload_rx_resync_async_request_end(async_resync,</div><div class='add'>+						cpu_to_be32(hw_seq));</div><div class='ctx'> 	priv_rx-&gt;rq_stats-&gt;tls_resync_req_end++;</div><div class='ctx'> out:</div><div class='ctx'> 	mlx5e_ktls_priv_rx_put(priv_rx);</div><div class='hunk'>@@ -472,8 +485,10 @@ static bool resync_queue_get_psv(struct sock *sk)</div><div class='ctx'> </div><div class='ctx'> 	resync = &amp;priv_rx-&gt;resync;</div><div class='ctx'> 	mlx5e_ktls_priv_rx_get(priv_rx);</div><div class='del'>-	if (unlikely(!queue_work(resync-&gt;priv-&gt;tls-&gt;rx_wq, &amp;resync-&gt;work)))</div><div class='add'>+	if (unlikely(!queue_work(resync-&gt;priv-&gt;tls-&gt;rx_wq, &amp;resync-&gt;work))) {</div><div class='ctx'> 		mlx5e_ktls_priv_rx_put(priv_rx);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -482,6 +497,7 @@ static bool resync_queue_get_psv(struct sock *sk)</div><div class='ctx'> static void resync_update_sn(struct mlx5e_rq *rq, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct ethhdr *eth = (struct ethhdr *)(skb-&gt;data);</div><div class='add'>+	struct tls_offload_resync_async *resync_async;</div><div class='ctx'> 	struct net_device *netdev = rq-&gt;netdev;</div><div class='ctx'> 	struct net *net = dev_net(netdev);</div><div class='ctx'> 	struct sock *sk = NULL;</div><div class='hunk'>@@ -498,9 +514,9 @@ static void resync_update_sn(struct mlx5e_rq *rq, struct sk_buff *skb)</div><div class='ctx'> 		depth += sizeof(struct iphdr);</div><div class='ctx'> 		th = (void *)iph + sizeof(struct iphdr);</div><div class='ctx'> </div><div class='del'>-		sk = inet_lookup_established(net, net-&gt;ipv4.tcp_death_row.hashinfo,</div><div class='del'>-					     iph-&gt;saddr, th-&gt;source, iph-&gt;daddr,</div><div class='del'>-					     th-&gt;dest, netdev-&gt;ifindex);</div><div class='add'>+		sk = inet_lookup_established(net, iph-&gt;saddr, th-&gt;source,</div><div class='add'>+					     iph-&gt;daddr, th-&gt;dest,</div><div class='add'>+					     netdev-&gt;ifindex);</div><div class='ctx'> #if IS_ENABLED(CONFIG_IPV6)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		struct ipv6hdr *ipv6h = (struct ipv6hdr *)iph;</div><div class='hunk'>@@ -508,8 +524,7 @@ static void resync_update_sn(struct mlx5e_rq *rq, struct sk_buff *skb)</div><div class='ctx'> 		depth += sizeof(struct ipv6hdr);</div><div class='ctx'> 		th = (void *)ipv6h + sizeof(struct ipv6hdr);</div><div class='ctx'> </div><div class='del'>-		sk = __inet6_lookup_established(net, net-&gt;ipv4.tcp_death_row.hashinfo,</div><div class='del'>-						&amp;ipv6h-&gt;saddr, th-&gt;source,</div><div class='add'>+		sk = __inet6_lookup_established(net, &amp;ipv6h-&gt;saddr, th-&gt;source,</div><div class='ctx'> 						&amp;ipv6h-&gt;daddr, ntohs(th-&gt;dest),</div><div class='ctx'> 						netdev-&gt;ifindex, 0);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -528,7 +543,8 @@ static void resync_update_sn(struct mlx5e_rq *rq, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	seq = th-&gt;seq;</div><div class='ctx'> 	datalen = skb-&gt;len - depth;</div><div class='del'>-	tls_offload_rx_resync_async_request_start(sk, seq, datalen);</div><div class='add'>+	resync_async = tls_offload_ctx_rx(tls_get_ctx(sk))-&gt;resync_async;</div><div class='add'>+	tls_offload_rx_resync_async_request_start(resync_async, seq, datalen);</div><div class='ctx'> 	rq-&gt;stats-&gt;tls_resync_req_start++;</div><div class='ctx'> </div><div class='ctx'> unref:</div><div class='hunk'>@@ -557,6 +573,18 @@ void mlx5e_ktls_rx_resync(struct net_device *netdev, struct sock *sk,</div><div class='ctx'> 	resync_handle_seq_match(priv_rx, c);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void</div><div class='add'>+mlx5e_ktls_rx_resync_async_request_cancel(struct mlx5e_icosq_wqe_info *wi)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_ktls_offload_context_rx *priv_rx;</div><div class='add'>+	struct mlx5e_ktls_rx_resync_buf *buf;</div><div class='add'>+</div><div class='add'>+	buf = wi-&gt;tls_get_params.buf;</div><div class='add'>+	priv_rx = buf-&gt;priv_rx;</div><div class='add'>+	priv_rx-&gt;rq_stats-&gt;tls_resync_req_skip++;</div><div class='add'>+	tls_offload_rx_resync_async_request_cancel(&amp;priv_rx-&gt;resync.core);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* End of resync section */</div><div class='ctx'> </div><div class='ctx'> void mlx5e_ktls_handle_rx_skb(struct mlx5e_rq *rq, struct sk_buff *skb,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c<br/>index d61be26a4df1..08f06984407b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c</a></div><div class='hunk'>@@ -660,7 +660,7 @@ tx_sync_info_get(struct mlx5e_ktls_offload_context_tx *priv_tx,</div><div class='ctx'> 	while (remaining &gt; 0) {</div><div class='ctx'> 		skb_frag_t *frag = &amp;record-&gt;frags[i];</div><div class='ctx'> </div><div class='del'>-		get_page(skb_frag_page(frag));</div><div class='add'>+		page_ref_inc(skb_frag_page(frag));</div><div class='ctx'> 		remaining -= skb_frag_size(frag);</div><div class='ctx'> 		info-&gt;frags[i++] = *frag;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -744,7 +744,7 @@ tx_post_resync_dump(struct mlx5e_txqsq *sq, skb_frag_t *frag, u32 tisn)</div><div class='ctx'> 	dseg-&gt;addr       = cpu_to_be64(dma_addr);</div><div class='ctx'> 	dseg-&gt;lkey       = sq-&gt;mkey_be;</div><div class='ctx'> 	dseg-&gt;byte_count = cpu_to_be32(fsz);</div><div class='del'>-	mlx5e_dma_push(sq, dma_addr, fsz, MLX5E_DMA_MAP_PAGE);</div><div class='add'>+	mlx5e_dma_push_netmem(sq, skb_frag_netmem(frag), dma_addr, fsz);</div><div class='ctx'> </div><div class='ctx'> 	tx_fill_wi(sq, pi, MLX5E_KTLS_DUMP_WQEBBS, fsz, skb_frag_page(frag));</div><div class='ctx'> 	sq-&gt;pc += MLX5E_KTLS_DUMP_WQEBBS;</div><div class='hunk'>@@ -763,7 +763,7 @@ void mlx5e_ktls_tx_handle_resync_dump_comp(struct mlx5e_txqsq *sq,</div><div class='ctx'> 	stats = sq-&gt;stats;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_tx_dma_unmap(sq-&gt;pdev, dma);</div><div class='del'>-	put_page(wi-&gt;resync_dump_frag_page);</div><div class='add'>+	page_ref_dec(wi-&gt;resync_dump_frag_page);</div><div class='ctx'> 	stats-&gt;tls_dump_packets++;</div><div class='ctx'> 	stats-&gt;tls_dump_bytes += wi-&gt;num_bytes;</div><div class='ctx'> }</div><div class='hunk'>@@ -816,12 +816,12 @@ mlx5e_ktls_tx_handle_ooo(struct mlx5e_ktls_offload_context_tx *priv_tx,</div><div class='ctx'> </div><div class='ctx'> err_out:</div><div class='ctx'> 	for (; i &lt; info.nr_frags; i++)</div><div class='del'>-		/* The put_page() here undoes the page ref obtained in tx_sync_info_get().</div><div class='add'>+		/* The page_ref_dec() here undoes the page ref obtained in tx_sync_info_get().</div><div class='ctx'> 		 * Page refs obtained for the DUMP WQEs above (by page_ref_add) will be</div><div class='ctx'> 		 * released only upon their completions (or in mlx5e_free_txqsq_descs,</div><div class='ctx'> 		 * if channel closes).</div><div class='ctx'> 		 */</div><div class='del'>-		put_page(skb_frag_page(&amp;info.frags[i]));</div><div class='add'>+		page_ref_dec(skb_frag_page(&amp;info.frags[i]));</div><div class='ctx'> </div><div class='ctx'> 	return MLX5E_KTLS_SYNC_FAIL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h<br/>index f87b65c560ea..cb08799769ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h</a></div><div class='hunk'>@@ -29,6 +29,10 @@ void mlx5e_ktls_handle_get_psv_completion(struct mlx5e_icosq_wqe_info *wi,</div><div class='ctx'> void mlx5e_ktls_tx_handle_resync_dump_comp(struct mlx5e_txqsq *sq,</div><div class='ctx'> 					   struct mlx5e_tx_wqe_info *wi,</div><div class='ctx'> 					   u32 *dma_fifo_cc);</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+mlx5e_ktls_rx_resync_async_request_cancel(struct mlx5e_icosq_wqe_info *wi);</div><div class='add'>+</div><div class='ctx'> static inline bool</div><div class='ctx'> mlx5e_ktls_tx_try_handle_resync_dump_comp(struct mlx5e_txqsq *sq,</div><div class='ctx'> 					  struct mlx5e_tx_wqe_info *wi,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c<br/>index cc9bcc420032..528b04d4de41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c</a></div><div class='hunk'>@@ -339,9 +339,13 @@ static int mlx5e_macsec_init_sa_fs(struct macsec_context *ctx,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='ctx'> 	struct mlx5_macsec_fs *macsec_fs = priv-&gt;mdev-&gt;macsec_fs;</div><div class='add'>+	const struct macsec_tx_sc *tx_sc = &amp;ctx-&gt;secy-&gt;tx_sc;</div><div class='ctx'> 	struct mlx5_macsec_rule_attrs rule_attrs;</div><div class='ctx'> 	union mlx5_macsec_rule *macsec_rule;</div><div class='ctx'> </div><div class='add'>+	if (is_tx &amp;&amp; tx_sc-&gt;encoding_sa != sa-&gt;assoc_num)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	rule_attrs.macsec_obj_id = sa-&gt;macsec_obj_id;</div><div class='ctx'> 	rule_attrs.sci = sa-&gt;sci;</div><div class='ctx'> 	rule_attrs.assoc_num = sa-&gt;assoc_num;</div><div class='hunk'>@@ -1672,7 +1676,7 @@ void mlx5e_macsec_tx_build_eseg(struct mlx5e_macsec *macsec,</div><div class='ctx'> 	if (!fs_id)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	eseg-&gt;flow_table_metadata = cpu_to_be32(MLX5_ETH_WQE_FT_META_MACSEC | fs_id &lt;&lt; 2);</div><div class='add'>+	eseg-&gt;flow_table_metadata = cpu_to_be32(MLX5_MACSEC_TX_METADATA(fs_id));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5e_macsec_offload_handle_rx_skb(struct net_device *netdev,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c<br/>new file mode 100644<br/>index 000000000000..38e7c77cc851<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c</a></div><div class='hunk'>@@ -0,0 +1,1155 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2023, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='add'>+#include &lt;linux/mlx5/device.h&gt;</div><div class='add'>+#include &lt;net/psp.h&gt;</div><div class='add'>+#include &lt;linux/psp.h&gt;</div><div class='add'>+#include "mlx5_core.h"</div><div class='add'>+#include "psp.h"</div><div class='add'>+#include "lib/crypto.h"</div><div class='add'>+#include "en_accel/psp.h"</div><div class='add'>+#include "fs_core.h"</div><div class='add'>+</div><div class='add'>+enum accel_fs_psp_type {</div><div class='add'>+	ACCEL_FS_PSP4,</div><div class='add'>+	ACCEL_FS_PSP6,</div><div class='add'>+	ACCEL_FS_PSP_NUM_TYPES,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum accel_psp_syndrome {</div><div class='add'>+	PSP_OK = 0,</div><div class='add'>+	PSP_ICV_FAIL,</div><div class='add'>+	PSP_BAD_TRAILER,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_psp_tx {</div><div class='add'>+	struct mlx5_flow_namespace *ns;</div><div class='add'>+	struct mlx5_flow_table *ft;</div><div class='add'>+	struct mlx5_flow_group *fg;</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mutex mutex; /* Protect PSP TX steering */</div><div class='add'>+	u32 refcnt;</div><div class='add'>+	struct mlx5_fc *tx_counter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_psp_rx_err {</div><div class='add'>+	struct mlx5_flow_table *ft;</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mlx5_flow_handle *auth_fail_rule;</div><div class='add'>+	struct mlx5_flow_handle *err_rule;</div><div class='add'>+	struct mlx5_flow_handle *bad_rule;</div><div class='add'>+	struct mlx5_modify_hdr *copy_modify_hdr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_accel_fs_psp_prot {</div><div class='add'>+	struct mlx5_flow_table *ft;</div><div class='add'>+	struct mlx5_flow_group *miss_group;</div><div class='add'>+	struct mlx5_flow_handle *miss_rule;</div><div class='add'>+	struct mlx5_flow_destination default_dest;</div><div class='add'>+	struct mlx5e_psp_rx_err rx_err;</div><div class='add'>+	u32 refcnt;</div><div class='add'>+	struct mutex prot_mutex; /* protect ESP4/ESP6 protocol */</div><div class='add'>+	struct mlx5_flow_handle *def_rule;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_accel_fs_psp {</div><div class='add'>+	struct mlx5e_accel_fs_psp_prot fs_prot[ACCEL_FS_PSP_NUM_TYPES];</div><div class='add'>+	struct mlx5_fc *rx_counter;</div><div class='add'>+	struct mlx5_fc *rx_auth_fail_counter;</div><div class='add'>+	struct mlx5_fc *rx_err_counter;</div><div class='add'>+	struct mlx5_fc *rx_bad_counter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_psp_fs {</div><div class='add'>+	struct mlx5_core_dev *mdev;</div><div class='add'>+	struct mlx5e_psp_tx *tx_fs;</div><div class='add'>+	/* Rx manage */</div><div class='add'>+	struct mlx5e_flow_steering *fs;</div><div class='add'>+	struct mlx5e_accel_fs_psp *rx_fs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PSP RX flow steering */</div><div class='add'>+static enum mlx5_traffic_types fs_psp2tt(enum accel_fs_psp_type i)</div><div class='add'>+{</div><div class='add'>+	if (i == ACCEL_FS_PSP4)</div><div class='add'>+		return MLX5_TT_IPV4_UDP;</div><div class='add'>+</div><div class='add'>+	return MLX5_TT_IPV6_UDP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void accel_psp_fs_rx_err_del_rules(struct mlx5e_psp_fs *fs,</div><div class='add'>+					  struct mlx5e_psp_rx_err *rx_err)</div><div class='add'>+{</div><div class='add'>+	if (rx_err-&gt;bad_rule) {</div><div class='add'>+		mlx5_del_flow_rules(rx_err-&gt;bad_rule);</div><div class='add'>+		rx_err-&gt;bad_rule = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_err-&gt;err_rule) {</div><div class='add'>+		mlx5_del_flow_rules(rx_err-&gt;err_rule);</div><div class='add'>+		rx_err-&gt;err_rule = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_err-&gt;auth_fail_rule) {</div><div class='add'>+		mlx5_del_flow_rules(rx_err-&gt;auth_fail_rule);</div><div class='add'>+		rx_err-&gt;auth_fail_rule = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_err-&gt;rule) {</div><div class='add'>+		mlx5_del_flow_rules(rx_err-&gt;rule);</div><div class='add'>+		rx_err-&gt;rule = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_err-&gt;copy_modify_hdr) {</div><div class='add'>+		mlx5_modify_header_dealloc(fs-&gt;mdev, rx_err-&gt;copy_modify_hdr);</div><div class='add'>+		rx_err-&gt;copy_modify_hdr = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void accel_psp_fs_rx_err_destroy_ft(struct mlx5e_psp_fs *fs,</div><div class='add'>+					   struct mlx5e_psp_rx_err *rx_err)</div><div class='add'>+{</div><div class='add'>+	accel_psp_fs_rx_err_del_rules(fs, rx_err);</div><div class='add'>+</div><div class='add'>+	if (rx_err-&gt;ft) {</div><div class='add'>+		mlx5_destroy_flow_table(rx_err-&gt;ft);</div><div class='add'>+		rx_err-&gt;ft = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void accel_psp_setup_syndrome_match(struct mlx5_flow_spec *spec,</div><div class='add'>+					   enum accel_psp_syndrome syndrome)</div><div class='add'>+{</div><div class='add'>+	void *misc_params_2;</div><div class='add'>+</div><div class='add'>+	spec-&gt;match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2;</div><div class='add'>+	misc_params_2 = MLX5_ADDR_OF(fte_match_param, spec-&gt;match_criteria, misc_parameters_2);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_set_misc2, misc_params_2, psp_syndrome);</div><div class='add'>+	misc_params_2 = MLX5_ADDR_OF(fte_match_param, spec-&gt;match_value, misc_parameters_2);</div><div class='add'>+	MLX5_SET(fte_match_set_misc2, misc_params_2, psp_syndrome, syndrome);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int accel_psp_fs_rx_err_add_rule(struct mlx5e_psp_fs *fs,</div><div class='add'>+					struct mlx5e_accel_fs_psp_prot *fs_prot,</div><div class='add'>+					struct mlx5e_psp_rx_err *rx_err)</div><div class='add'>+{</div><div class='add'>+	u8 action[MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto)] = {};</div><div class='add'>+	struct mlx5_core_dev *mdev = fs-&gt;mdev;</div><div class='add'>+	struct mlx5_flow_destination dest[2];</div><div class='add'>+	struct mlx5_flow_act flow_act = {};</div><div class='add'>+	struct mlx5_modify_hdr *modify_hdr;</div><div class='add'>+	struct mlx5_flow_handle *fte;</div><div class='add'>+	struct mlx5_flow_spec *spec;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	spec = kzalloc(sizeof(*spec), GFP_KERNEL);</div><div class='add'>+	if (!spec)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Action to copy 7 bit psp_syndrome to regB[23:29] */</div><div class='add'>+	MLX5_SET(copy_action_in, action, action_type, MLX5_ACTION_TYPE_COPY);</div><div class='add'>+	MLX5_SET(copy_action_in, action, src_field, MLX5_ACTION_IN_FIELD_PSP_SYNDROME);</div><div class='add'>+	MLX5_SET(copy_action_in, action, src_offset, 0);</div><div class='add'>+	MLX5_SET(copy_action_in, action, length, 7);</div><div class='add'>+	MLX5_SET(copy_action_in, action, dst_field, MLX5_ACTION_IN_FIELD_METADATA_REG_B);</div><div class='add'>+	MLX5_SET(copy_action_in, action, dst_offset, 23);</div><div class='add'>+</div><div class='add'>+	modify_hdr = mlx5_modify_header_alloc(mdev, MLX5_FLOW_NAMESPACE_KERNEL,</div><div class='add'>+					      1, action);</div><div class='add'>+	if (IS_ERR(modify_hdr)) {</div><div class='add'>+		err = PTR_ERR(modify_hdr);</div><div class='add'>+		mlx5_core_err(mdev,</div><div class='add'>+			      "fail to alloc psp copy modify_header_id err=%d\n", err);</div><div class='add'>+		goto out_spec;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	accel_psp_setup_syndrome_match(spec, PSP_OK);</div><div class='add'>+	/* create fte */</div><div class='add'>+	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_MOD_HDR |</div><div class='add'>+			  MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |</div><div class='add'>+			  MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='add'>+	flow_act.modify_hdr = modify_hdr;</div><div class='add'>+	dest[0].type = fs_prot-&gt;default_dest.type;</div><div class='add'>+	dest[0].ft = fs_prot-&gt;default_dest.ft;</div><div class='add'>+	dest[1].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='add'>+	dest[1].counter = fs-&gt;rx_fs-&gt;rx_counter;</div><div class='add'>+	fte = mlx5_add_flow_rules(rx_err-&gt;ft, spec, &amp;flow_act, dest, 2);</div><div class='add'>+	if (IS_ERR(fte)) {</div><div class='add'>+		err = PTR_ERR(fte);</div><div class='add'>+		mlx5_core_err(mdev, "fail to add psp rx err copy rule err=%d\n", err);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	rx_err-&gt;rule = fte;</div><div class='add'>+</div><div class='add'>+	/* add auth fail drop rule */</div><div class='add'>+	memset(spec, 0, sizeof(*spec));</div><div class='add'>+	memset(&amp;flow_act, 0, sizeof(flow_act));</div><div class='add'>+	accel_psp_setup_syndrome_match(spec, PSP_ICV_FAIL);</div><div class='add'>+	/* create fte */</div><div class='add'>+	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP |</div><div class='add'>+			  MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='add'>+	dest[0].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='add'>+	dest[0].counter = fs-&gt;rx_fs-&gt;rx_auth_fail_counter;</div><div class='add'>+	fte = mlx5_add_flow_rules(rx_err-&gt;ft, spec, &amp;flow_act, dest, 1);</div><div class='add'>+	if (IS_ERR(fte)) {</div><div class='add'>+		err = PTR_ERR(fte);</div><div class='add'>+		mlx5_core_err(mdev, "fail to add psp rx auth fail drop rule err=%d\n",</div><div class='add'>+			      err);</div><div class='add'>+		goto out_drop_rule;</div><div class='add'>+	}</div><div class='add'>+	rx_err-&gt;auth_fail_rule = fte;</div><div class='add'>+</div><div class='add'>+	/* add framing drop rule */</div><div class='add'>+	memset(spec, 0, sizeof(*spec));</div><div class='add'>+	memset(&amp;flow_act, 0, sizeof(flow_act));</div><div class='add'>+	accel_psp_setup_syndrome_match(spec, PSP_BAD_TRAILER);</div><div class='add'>+	/* create fte */</div><div class='add'>+	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP |</div><div class='add'>+			  MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='add'>+	dest[0].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='add'>+	dest[0].counter = fs-&gt;rx_fs-&gt;rx_err_counter;</div><div class='add'>+	fte = mlx5_add_flow_rules(rx_err-&gt;ft, spec, &amp;flow_act, dest, 1);</div><div class='add'>+	if (IS_ERR(fte)) {</div><div class='add'>+		err = PTR_ERR(fte);</div><div class='add'>+		mlx5_core_err(mdev, "fail to add psp rx framing err drop rule err=%d\n",</div><div class='add'>+			      err);</div><div class='add'>+		goto out_drop_auth_fail_rule;</div><div class='add'>+	}</div><div class='add'>+	rx_err-&gt;err_rule = fte;</div><div class='add'>+</div><div class='add'>+	/* add misc. errors drop rule */</div><div class='add'>+	memset(spec, 0, sizeof(*spec));</div><div class='add'>+	memset(&amp;flow_act, 0, sizeof(flow_act));</div><div class='add'>+	/* create fte */</div><div class='add'>+	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP |</div><div class='add'>+			  MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='add'>+	dest[0].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='add'>+	dest[0].counter = fs-&gt;rx_fs-&gt;rx_bad_counter;</div><div class='add'>+	fte = mlx5_add_flow_rules(rx_err-&gt;ft, spec, &amp;flow_act, dest, 1);</div><div class='add'>+	if (IS_ERR(fte)) {</div><div class='add'>+		err = PTR_ERR(fte);</div><div class='add'>+		mlx5_core_err(mdev, "fail to add psp rx misc. err drop rule err=%d\n",</div><div class='add'>+			      err);</div><div class='add'>+		goto out_drop_error_rule;</div><div class='add'>+	}</div><div class='add'>+	rx_err-&gt;bad_rule = fte;</div><div class='add'>+</div><div class='add'>+	rx_err-&gt;copy_modify_hdr = modify_hdr;</div><div class='add'>+</div><div class='add'>+	goto out_spec;</div><div class='add'>+</div><div class='add'>+out_drop_error_rule:</div><div class='add'>+	mlx5_del_flow_rules(rx_err-&gt;err_rule);</div><div class='add'>+	rx_err-&gt;err_rule = NULL;</div><div class='add'>+out_drop_auth_fail_rule:</div><div class='add'>+	mlx5_del_flow_rules(rx_err-&gt;auth_fail_rule);</div><div class='add'>+	rx_err-&gt;auth_fail_rule = NULL;</div><div class='add'>+out_drop_rule:</div><div class='add'>+	mlx5_del_flow_rules(rx_err-&gt;rule);</div><div class='add'>+	rx_err-&gt;rule = NULL;</div><div class='add'>+out:</div><div class='add'>+	mlx5_modify_header_dealloc(mdev, modify_hdr);</div><div class='add'>+out_spec:</div><div class='add'>+	kfree(spec);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int accel_psp_fs_rx_err_create_ft(struct mlx5e_psp_fs *fs,</div><div class='add'>+					 struct mlx5e_accel_fs_psp_prot *fs_prot,</div><div class='add'>+					 struct mlx5e_psp_rx_err *rx_err)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_namespace *ns = mlx5e_fs_get_ns(fs-&gt;fs, false);</div><div class='add'>+	struct mlx5_flow_table_attr ft_attr = {};</div><div class='add'>+	struct mlx5_flow_table *ft;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ft_attr.max_fte = 2;</div><div class='add'>+	ft_attr.autogroup.max_num_groups = 2;</div><div class='add'>+	ft_attr.level = MLX5E_ACCEL_FS_ESP_FT_ERR_LEVEL; // MLX5E_ACCEL_FS_TCP_FT_LEVEL</div><div class='add'>+	ft_attr.prio = MLX5E_NIC_PRIO;</div><div class='add'>+	ft = mlx5_create_auto_grouped_flow_table(ns, &amp;ft_attr);</div><div class='add'>+	if (IS_ERR(ft)) {</div><div class='add'>+		err = PTR_ERR(ft);</div><div class='add'>+		mlx5_core_err(fs-&gt;mdev, "fail to create psp rx inline ft err=%d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_err-&gt;ft = ft;</div><div class='add'>+	err = accel_psp_fs_rx_err_add_rule(fs, fs_prot, rx_err);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	mlx5_destroy_flow_table(ft);</div><div class='add'>+	rx_err-&gt;ft = NULL;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void accel_psp_fs_rx_fs_destroy(struct mlx5e_accel_fs_psp_prot *fs_prot)</div><div class='add'>+{</div><div class='add'>+	if (fs_prot-&gt;def_rule) {</div><div class='add'>+		mlx5_del_flow_rules(fs_prot-&gt;def_rule);</div><div class='add'>+		fs_prot-&gt;def_rule = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fs_prot-&gt;miss_rule) {</div><div class='add'>+		mlx5_del_flow_rules(fs_prot-&gt;miss_rule);</div><div class='add'>+		fs_prot-&gt;miss_rule = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fs_prot-&gt;miss_group) {</div><div class='add'>+		mlx5_destroy_flow_group(fs_prot-&gt;miss_group);</div><div class='add'>+		fs_prot-&gt;miss_group = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fs_prot-&gt;ft) {</div><div class='add'>+		mlx5_destroy_flow_table(fs_prot-&gt;ft);</div><div class='add'>+		fs_prot-&gt;ft = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void setup_fte_udp_psp(struct mlx5_flow_spec *spec, u16 udp_port)</div><div class='add'>+{</div><div class='add'>+	spec-&gt;match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;</div><div class='add'>+	MLX5_SET(fte_match_set_lyr_2_4, spec-&gt;match_criteria, udp_dport, 0xffff);</div><div class='add'>+	MLX5_SET(fte_match_set_lyr_2_4, spec-&gt;match_value, udp_dport, udp_port);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, spec-&gt;match_criteria, ip_protocol);</div><div class='add'>+	MLX5_SET(fte_match_set_lyr_2_4, spec-&gt;match_value, ip_protocol, IPPROTO_UDP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int accel_psp_fs_rx_create_ft(struct mlx5e_psp_fs *fs,</div><div class='add'>+				     struct mlx5e_accel_fs_psp_prot *fs_prot)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_namespace *ns = mlx5e_fs_get_ns(fs-&gt;fs, false);</div><div class='add'>+	u8 action[MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto)] = {};</div><div class='add'>+	int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);</div><div class='add'>+	struct mlx5_modify_hdr *modify_hdr = NULL;</div><div class='add'>+	struct mlx5_flow_table_attr ft_attr = {};</div><div class='add'>+	struct mlx5_flow_destination dest = {};</div><div class='add'>+	struct mlx5_core_dev *mdev = fs-&gt;mdev;</div><div class='add'>+	struct mlx5_flow_group *miss_group;</div><div class='add'>+	MLX5_DECLARE_FLOW_ACT(flow_act);</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mlx5_flow_spec *spec;</div><div class='add'>+	struct mlx5_flow_table *ft;</div><div class='add'>+	u32 *flow_group_in;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	flow_group_in = kvzalloc(inlen, GFP_KERNEL);</div><div class='add'>+	spec = kvzalloc(sizeof(*spec), GFP_KERNEL);</div><div class='add'>+	if (!flow_group_in || !spec) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Create FT */</div><div class='add'>+	ft_attr.max_fte = 2;</div><div class='add'>+	ft_attr.level = MLX5E_ACCEL_FS_ESP_FT_LEVEL;</div><div class='add'>+	ft_attr.prio = MLX5E_NIC_PRIO;</div><div class='add'>+	ft_attr.autogroup.num_reserved_entries = 1;</div><div class='add'>+	ft_attr.autogroup.max_num_groups = 1;</div><div class='add'>+	ft = mlx5_create_auto_grouped_flow_table(ns, &amp;ft_attr);</div><div class='add'>+	if (IS_ERR(ft)) {</div><div class='add'>+		err = PTR_ERR(ft);</div><div class='add'>+		mlx5_core_err(mdev, "fail to create psp rx ft err=%d\n", err);</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+	fs_prot-&gt;ft = ft;</div><div class='add'>+</div><div class='add'>+	/* Create miss_group */</div><div class='add'>+	MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, ft-&gt;max_fte - 1);</div><div class='add'>+	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, ft-&gt;max_fte - 1);</div><div class='add'>+	miss_group = mlx5_create_flow_group(ft, flow_group_in);</div><div class='add'>+	if (IS_ERR(miss_group)) {</div><div class='add'>+		err = PTR_ERR(miss_group);</div><div class='add'>+		mlx5_core_err(mdev, "fail to create psp rx miss_group err=%d\n", err);</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+	fs_prot-&gt;miss_group = miss_group;</div><div class='add'>+</div><div class='add'>+	/* Create miss rule */</div><div class='add'>+	rule = mlx5_add_flow_rules(ft, spec, &amp;flow_act, &amp;fs_prot-&gt;default_dest, 1);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		mlx5_core_err(mdev, "fail to create psp rx miss_rule err=%d\n", err);</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+	fs_prot-&gt;miss_rule = rule;</div><div class='add'>+</div><div class='add'>+	/* Add default Rx psp rule */</div><div class='add'>+	setup_fte_udp_psp(spec, PSP_DEFAULT_UDP_PORT);</div><div class='add'>+	flow_act.crypto.type = MLX5_FLOW_CONTEXT_ENCRYPT_DECRYPT_TYPE_PSP;</div><div class='add'>+	/* Set bit[31, 30] PSP marker */</div><div class='add'>+	/* Set bit[29-23] psp_syndrome is set in error FT */</div><div class='add'>+#define MLX5E_PSP_MARKER_BIT (BIT(30) | BIT(31))</div><div class='add'>+	MLX5_SET(set_action_in, action, action_type, MLX5_ACTION_TYPE_SET);</div><div class='add'>+	MLX5_SET(set_action_in, action, field, MLX5_ACTION_IN_FIELD_METADATA_REG_B);</div><div class='add'>+	MLX5_SET(set_action_in, action, data, MLX5E_PSP_MARKER_BIT);</div><div class='add'>+	MLX5_SET(set_action_in, action, offset, 0);</div><div class='add'>+	MLX5_SET(set_action_in, action, length, 32);</div><div class='add'>+</div><div class='add'>+	modify_hdr = mlx5_modify_header_alloc(mdev, MLX5_FLOW_NAMESPACE_KERNEL, 1, action);</div><div class='add'>+	if (IS_ERR(modify_hdr)) {</div><div class='add'>+		err = PTR_ERR(modify_hdr);</div><div class='add'>+		mlx5_core_err(mdev, "fail to alloc psp set modify_header_id err=%d\n", err);</div><div class='add'>+		modify_hdr = NULL;</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |</div><div class='add'>+			  MLX5_FLOW_CONTEXT_ACTION_CRYPTO_DECRYPT |</div><div class='add'>+			  MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;</div><div class='add'>+	flow_act.modify_hdr = modify_hdr;</div><div class='add'>+	dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='add'>+	dest.ft = fs_prot-&gt;rx_err.ft;</div><div class='add'>+	rule = mlx5_add_flow_rules(fs_prot-&gt;ft, spec, &amp;flow_act, &amp;dest, 1);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		mlx5_core_err(mdev,</div><div class='add'>+			      "fail to add psp rule Rx decryption, err=%d, flow_act.action = %#04X\n",</div><div class='add'>+			      err, flow_act.action);</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fs_prot-&gt;def_rule = rule;</div><div class='add'>+	goto out;</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	accel_psp_fs_rx_fs_destroy(fs_prot);</div><div class='add'>+out:</div><div class='add'>+	kvfree(flow_group_in);</div><div class='add'>+	kvfree(spec);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int accel_psp_fs_rx_destroy(struct mlx5e_psp_fs *fs, enum accel_fs_psp_type type)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_accel_fs_psp_prot *fs_prot;</div><div class='add'>+	struct mlx5e_accel_fs_psp *accel_psp;</div><div class='add'>+</div><div class='add'>+	accel_psp = fs-&gt;rx_fs;</div><div class='add'>+</div><div class='add'>+	/* The netdev unreg already happened, so all offloaded rule are already removed */</div><div class='add'>+	fs_prot = &amp;accel_psp-&gt;fs_prot[type];</div><div class='add'>+</div><div class='add'>+	accel_psp_fs_rx_fs_destroy(fs_prot);</div><div class='add'>+</div><div class='add'>+	accel_psp_fs_rx_err_destroy_ft(fs, &amp;fs_prot-&gt;rx_err);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int accel_psp_fs_rx_create(struct mlx5e_psp_fs *fs, enum accel_fs_psp_type type)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_ttc_table *ttc = mlx5e_fs_get_ttc(fs-&gt;fs, false);</div><div class='add'>+	struct mlx5e_accel_fs_psp_prot *fs_prot;</div><div class='add'>+	struct mlx5e_accel_fs_psp *accel_psp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	accel_psp = fs-&gt;rx_fs;</div><div class='add'>+	fs_prot = &amp;accel_psp-&gt;fs_prot[type];</div><div class='add'>+</div><div class='add'>+	fs_prot-&gt;default_dest = mlx5_ttc_get_default_dest(ttc, fs_psp2tt(type));</div><div class='add'>+</div><div class='add'>+	err = accel_psp_fs_rx_err_create_ft(fs, fs_prot, &amp;fs_prot-&gt;rx_err);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = accel_psp_fs_rx_create_ft(fs, fs_prot);</div><div class='add'>+	if (err)</div><div class='add'>+		accel_psp_fs_rx_err_destroy_ft(fs, &amp;fs_prot-&gt;rx_err);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int accel_psp_fs_rx_ft_get(struct mlx5e_psp_fs *fs, enum accel_fs_psp_type type)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_accel_fs_psp_prot *fs_prot;</div><div class='add'>+	struct mlx5_flow_destination dest = {};</div><div class='add'>+	struct mlx5e_accel_fs_psp *accel_psp;</div><div class='add'>+	struct mlx5_ttc_table *ttc;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!fs || !fs-&gt;rx_fs)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ttc = mlx5e_fs_get_ttc(fs-&gt;fs, false);</div><div class='add'>+	accel_psp = fs-&gt;rx_fs;</div><div class='add'>+	fs_prot = &amp;accel_psp-&gt;fs_prot[type];</div><div class='add'>+	mutex_lock(&amp;fs_prot-&gt;prot_mutex);</div><div class='add'>+	if (fs_prot-&gt;refcnt++)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* create FT */</div><div class='add'>+	err = accel_psp_fs_rx_create(fs, type);</div><div class='add'>+	if (err) {</div><div class='add'>+		fs_prot-&gt;refcnt--;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* connect */</div><div class='add'>+	dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='add'>+	dest.ft = fs_prot-&gt;ft;</div><div class='add'>+	mlx5_ttc_fwd_dest(ttc, fs_psp2tt(type), &amp;dest);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;fs_prot-&gt;prot_mutex);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void accel_psp_fs_rx_ft_put(struct mlx5e_psp_fs *fs, enum accel_fs_psp_type type)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_ttc_table *ttc = mlx5e_fs_get_ttc(fs-&gt;fs, false);</div><div class='add'>+	struct mlx5e_accel_fs_psp_prot *fs_prot;</div><div class='add'>+	struct mlx5e_accel_fs_psp *accel_psp;</div><div class='add'>+</div><div class='add'>+	accel_psp = fs-&gt;rx_fs;</div><div class='add'>+	fs_prot = &amp;accel_psp-&gt;fs_prot[type];</div><div class='add'>+	mutex_lock(&amp;fs_prot-&gt;prot_mutex);</div><div class='add'>+	if (--fs_prot-&gt;refcnt)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* disconnect */</div><div class='add'>+	mlx5_ttc_fwd_default_dest(ttc, fs_psp2tt(type));</div><div class='add'>+</div><div class='add'>+	/* remove FT */</div><div class='add'>+	accel_psp_fs_rx_destroy(fs, type);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;fs_prot-&gt;prot_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void accel_psp_fs_cleanup_rx(struct mlx5e_psp_fs *fs)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_accel_fs_psp_prot *fs_prot;</div><div class='add'>+	struct mlx5e_accel_fs_psp *accel_psp;</div><div class='add'>+	enum accel_fs_psp_type i;</div><div class='add'>+</div><div class='add'>+	if (!fs-&gt;rx_fs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	accel_psp = fs-&gt;rx_fs;</div><div class='add'>+	mlx5_fc_destroy(fs-&gt;mdev, accel_psp-&gt;rx_bad_counter);</div><div class='add'>+	mlx5_fc_destroy(fs-&gt;mdev, accel_psp-&gt;rx_err_counter);</div><div class='add'>+	mlx5_fc_destroy(fs-&gt;mdev, accel_psp-&gt;rx_auth_fail_counter);</div><div class='add'>+	mlx5_fc_destroy(fs-&gt;mdev, accel_psp-&gt;rx_counter);</div><div class='add'>+	for (i = 0; i &lt; ACCEL_FS_PSP_NUM_TYPES; i++) {</div><div class='add'>+		fs_prot = &amp;accel_psp-&gt;fs_prot[i];</div><div class='add'>+		mutex_destroy(&amp;fs_prot-&gt;prot_mutex);</div><div class='add'>+		WARN_ON(fs_prot-&gt;refcnt);</div><div class='add'>+	}</div><div class='add'>+	kfree(fs-&gt;rx_fs);</div><div class='add'>+	fs-&gt;rx_fs = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int accel_psp_fs_init_rx(struct mlx5e_psp_fs *fs)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_accel_fs_psp_prot *fs_prot;</div><div class='add'>+	struct mlx5e_accel_fs_psp *accel_psp;</div><div class='add'>+	struct mlx5_core_dev *mdev = fs-&gt;mdev;</div><div class='add'>+	struct mlx5_fc *flow_counter;</div><div class='add'>+	enum accel_fs_psp_type i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	accel_psp = kzalloc(sizeof(*accel_psp), GFP_KERNEL);</div><div class='add'>+	if (!accel_psp)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ACCEL_FS_PSP_NUM_TYPES; i++) {</div><div class='add'>+		fs_prot = &amp;accel_psp-&gt;fs_prot[i];</div><div class='add'>+		mutex_init(&amp;fs_prot-&gt;prot_mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow_counter = mlx5_fc_create(mdev, false);</div><div class='add'>+	if (IS_ERR(flow_counter)) {</div><div class='add'>+		mlx5_core_warn(mdev,</div><div class='add'>+			       "fail to create psp rx flow counter err=%pe\n",</div><div class='add'>+			       flow_counter);</div><div class='add'>+		err = PTR_ERR(flow_counter);</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+	accel_psp-&gt;rx_counter = flow_counter;</div><div class='add'>+</div><div class='add'>+	flow_counter = mlx5_fc_create(mdev, false);</div><div class='add'>+	if (IS_ERR(flow_counter)) {</div><div class='add'>+		mlx5_core_warn(mdev,</div><div class='add'>+			       "fail to create psp rx auth fail flow counter err=%pe\n",</div><div class='add'>+			       flow_counter);</div><div class='add'>+		err = PTR_ERR(flow_counter);</div><div class='add'>+		goto out_counter_err;</div><div class='add'>+	}</div><div class='add'>+	accel_psp-&gt;rx_auth_fail_counter = flow_counter;</div><div class='add'>+</div><div class='add'>+	flow_counter = mlx5_fc_create(mdev, false);</div><div class='add'>+	if (IS_ERR(flow_counter)) {</div><div class='add'>+		mlx5_core_warn(mdev,</div><div class='add'>+			       "fail to create psp rx error flow counter err=%pe\n",</div><div class='add'>+			       flow_counter);</div><div class='add'>+		err = PTR_ERR(flow_counter);</div><div class='add'>+		goto out_auth_fail_counter_err;</div><div class='add'>+	}</div><div class='add'>+	accel_psp-&gt;rx_err_counter = flow_counter;</div><div class='add'>+</div><div class='add'>+	flow_counter = mlx5_fc_create(mdev, false);</div><div class='add'>+	if (IS_ERR(flow_counter)) {</div><div class='add'>+		mlx5_core_warn(mdev,</div><div class='add'>+			       "fail to create psp rx bad flow counter err=%pe\n",</div><div class='add'>+			       flow_counter);</div><div class='add'>+		err = PTR_ERR(flow_counter);</div><div class='add'>+		goto out_err_counter_err;</div><div class='add'>+	}</div><div class='add'>+	accel_psp-&gt;rx_bad_counter = flow_counter;</div><div class='add'>+</div><div class='add'>+	fs-&gt;rx_fs = accel_psp;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_err_counter_err:</div><div class='add'>+	mlx5_fc_destroy(mdev, accel_psp-&gt;rx_err_counter);</div><div class='add'>+	accel_psp-&gt;rx_err_counter = NULL;</div><div class='add'>+out_auth_fail_counter_err:</div><div class='add'>+	mlx5_fc_destroy(mdev, accel_psp-&gt;rx_auth_fail_counter);</div><div class='add'>+	accel_psp-&gt;rx_auth_fail_counter = NULL;</div><div class='add'>+out_counter_err:</div><div class='add'>+	mlx5_fc_destroy(mdev, accel_psp-&gt;rx_counter);</div><div class='add'>+	accel_psp-&gt;rx_counter = NULL;</div><div class='add'>+out_err:</div><div class='add'>+	for (i = 0; i &lt; ACCEL_FS_PSP_NUM_TYPES; i++) {</div><div class='add'>+		fs_prot = &amp;accel_psp-&gt;fs_prot[i];</div><div class='add'>+		mutex_destroy(&amp;fs_prot-&gt;prot_mutex);</div><div class='add'>+	}</div><div class='add'>+	kfree(accel_psp);</div><div class='add'>+	fs-&gt;rx_fs = NULL;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_accel_psp_fs_cleanup_rx_tables(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;psp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ACCEL_FS_PSP_NUM_TYPES; i++)</div><div class='add'>+		accel_psp_fs_rx_ft_put(priv-&gt;psp-&gt;fs, i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_accel_psp_fs_init_rx_tables(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_psp_fs *fs;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;psp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	fs = priv-&gt;psp-&gt;fs;</div><div class='add'>+	for (i = 0; i &lt; ACCEL_FS_PSP_NUM_TYPES; i++) {</div><div class='add'>+		err = accel_psp_fs_rx_ft_get(fs, i);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	i--;</div><div class='add'>+	while (i &gt;= 0) {</div><div class='add'>+		accel_psp_fs_rx_ft_put(fs, i);</div><div class='add'>+		--i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int accel_psp_fs_tx_create_ft_table(struct mlx5e_psp_fs *fs)</div><div class='add'>+{</div><div class='add'>+	int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);</div><div class='add'>+	struct mlx5_flow_table_attr ft_attr = {};</div><div class='add'>+	struct mlx5_flow_destination dest = {};</div><div class='add'>+	struct mlx5_core_dev *mdev = fs-&gt;mdev;</div><div class='add'>+	struct mlx5_flow_act flow_act = {};</div><div class='add'>+	u32 *in, *mc, *outer_headers_c;</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mlx5_flow_spec *spec;</div><div class='add'>+	struct mlx5e_psp_tx *tx_fs;</div><div class='add'>+	struct mlx5_flow_table *ft;</div><div class='add'>+	struct mlx5_flow_group *fg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	spec = kvzalloc(sizeof(*spec), GFP_KERNEL);</div><div class='add'>+	in = kvzalloc(inlen, GFP_KERNEL);</div><div class='add'>+	if (!spec || !in) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ft_attr.max_fte = 1;</div><div class='add'>+#define MLX5E_PSP_PRIO 0</div><div class='add'>+	ft_attr.prio = MLX5E_PSP_PRIO;</div><div class='add'>+#define MLX5E_PSP_LEVEL 0</div><div class='add'>+	ft_attr.level = MLX5E_PSP_LEVEL;</div><div class='add'>+	ft_attr.autogroup.max_num_groups = 1;</div><div class='add'>+</div><div class='add'>+	tx_fs = fs-&gt;tx_fs;</div><div class='add'>+	ft = mlx5_create_flow_table(tx_fs-&gt;ns, &amp;ft_attr);</div><div class='add'>+	if (IS_ERR(ft)) {</div><div class='add'>+		err = PTR_ERR(ft);</div><div class='add'>+		mlx5_core_err(mdev, "PSP: fail to add psp tx flow table, err = %d\n", err);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mc = MLX5_ADDR_OF(create_flow_group_in, in, match_criteria);</div><div class='add'>+	outer_headers_c = MLX5_ADDR_OF(fte_match_param, mc, outer_headers);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, outer_headers_c, ip_protocol);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, outer_headers_c, udp_dport);</div><div class='add'>+	MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);</div><div class='add'>+	fg = mlx5_create_flow_group(ft, in);</div><div class='add'>+	if (IS_ERR(fg)) {</div><div class='add'>+		err = PTR_ERR(fg);</div><div class='add'>+		mlx5_core_err(mdev, "PSP: fail to add psp tx flow group, err = %d\n", err);</div><div class='add'>+		goto err_create_fg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	setup_fte_udp_psp(spec, PSP_DEFAULT_UDP_PORT);</div><div class='add'>+	flow_act.crypto.type = MLX5_FLOW_CONTEXT_ENCRYPT_DECRYPT_TYPE_PSP;</div><div class='add'>+	flow_act.flags |= FLOW_ACT_NO_APPEND;</div><div class='add'>+	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW |</div><div class='add'>+			  MLX5_FLOW_CONTEXT_ACTION_CRYPTO_ENCRYPT |</div><div class='add'>+			  MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='add'>+	dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='add'>+	dest.counter = tx_fs-&gt;tx_counter;</div><div class='add'>+	rule = mlx5_add_flow_rules(ft, spec, &amp;flow_act, &amp;dest, 1);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		mlx5_core_err(mdev, "PSP: fail to add psp tx flow rule, err = %d\n", err);</div><div class='add'>+		goto err_add_flow_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_fs-&gt;ft = ft;</div><div class='add'>+	tx_fs-&gt;fg = fg;</div><div class='add'>+	tx_fs-&gt;rule = rule;</div><div class='add'>+	goto out;</div><div class='add'>+</div><div class='add'>+err_add_flow_rule:</div><div class='add'>+	mlx5_destroy_flow_group(fg);</div><div class='add'>+err_create_fg:</div><div class='add'>+	mlx5_destroy_flow_table(ft);</div><div class='add'>+out:</div><div class='add'>+	kvfree(in);</div><div class='add'>+	kvfree(spec);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void accel_psp_fs_tx_destroy(struct mlx5e_psp_tx *tx_fs)</div><div class='add'>+{</div><div class='add'>+	if (!tx_fs-&gt;ft)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5_del_flow_rules(tx_fs-&gt;rule);</div><div class='add'>+	mlx5_destroy_flow_group(tx_fs-&gt;fg);</div><div class='add'>+	mlx5_destroy_flow_table(tx_fs-&gt;ft);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int accel_psp_fs_tx_ft_get(struct mlx5e_psp_fs *fs)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_psp_tx *tx_fs = fs-&gt;tx_fs;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;tx_fs-&gt;mutex);</div><div class='add'>+	if (tx_fs-&gt;refcnt++)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = accel_psp_fs_tx_create_ft_table(fs);</div><div class='add'>+	if (err)</div><div class='add'>+		tx_fs-&gt;refcnt--;</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;tx_fs-&gt;mutex);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void accel_psp_fs_tx_ft_put(struct mlx5e_psp_fs *fs)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_psp_tx *tx_fs = fs-&gt;tx_fs;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;tx_fs-&gt;mutex);</div><div class='add'>+	if (--tx_fs-&gt;refcnt)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	accel_psp_fs_tx_destroy(tx_fs);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;tx_fs-&gt;mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void accel_psp_fs_cleanup_tx(struct mlx5e_psp_fs *fs)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_psp_tx *tx_fs = fs-&gt;tx_fs;</div><div class='add'>+</div><div class='add'>+	if (!tx_fs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5_fc_destroy(fs-&gt;mdev, tx_fs-&gt;tx_counter);</div><div class='add'>+	mutex_destroy(&amp;tx_fs-&gt;mutex);</div><div class='add'>+	WARN_ON(tx_fs-&gt;refcnt);</div><div class='add'>+	kfree(tx_fs);</div><div class='add'>+	fs-&gt;tx_fs = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int accel_psp_fs_init_tx(struct mlx5e_psp_fs *fs)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *mdev = fs-&gt;mdev;</div><div class='add'>+	struct mlx5_flow_namespace *ns;</div><div class='add'>+	struct mlx5_fc *flow_counter;</div><div class='add'>+	struct mlx5e_psp_tx *tx_fs;</div><div class='add'>+</div><div class='add'>+	ns = mlx5_get_flow_namespace(mdev, MLX5_FLOW_NAMESPACE_EGRESS_IPSEC);</div><div class='add'>+	if (!ns)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	tx_fs = kzalloc(sizeof(*tx_fs), GFP_KERNEL);</div><div class='add'>+	if (!tx_fs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	flow_counter = mlx5_fc_create(mdev, false);</div><div class='add'>+	if (IS_ERR(flow_counter)) {</div><div class='add'>+		mlx5_core_warn(mdev,</div><div class='add'>+			       "fail to create psp tx flow counter err=%pe\n",</div><div class='add'>+			       flow_counter);</div><div class='add'>+		kfree(tx_fs);</div><div class='add'>+		return PTR_ERR(flow_counter);</div><div class='add'>+	}</div><div class='add'>+	tx_fs-&gt;tx_counter = flow_counter;</div><div class='add'>+	mutex_init(&amp;tx_fs-&gt;mutex);</div><div class='add'>+	tx_fs-&gt;ns = ns;</div><div class='add'>+	fs-&gt;tx_fs = tx_fs;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mlx5e_accel_psp_fs_get_stats_fill(struct mlx5e_priv *priv,</div><div class='add'>+				  struct mlx5e_psp_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_psp_tx *tx_fs = priv-&gt;psp-&gt;fs-&gt;tx_fs;</div><div class='add'>+	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	struct mlx5e_accel_fs_psp *accel_psp;</div><div class='add'>+</div><div class='add'>+	accel_psp = (struct mlx5e_accel_fs_psp *)priv-&gt;psp-&gt;fs-&gt;rx_fs;</div><div class='add'>+</div><div class='add'>+	if (tx_fs-&gt;tx_counter)</div><div class='add'>+		mlx5_fc_query(mdev, tx_fs-&gt;tx_counter, &amp;stats-&gt;psp_tx_pkts,</div><div class='add'>+			      &amp;stats-&gt;psp_tx_bytes);</div><div class='add'>+</div><div class='add'>+	if (accel_psp-&gt;rx_counter)</div><div class='add'>+		mlx5_fc_query(mdev, accel_psp-&gt;rx_counter, &amp;stats-&gt;psp_rx_pkts,</div><div class='add'>+			      &amp;stats-&gt;psp_rx_bytes);</div><div class='add'>+</div><div class='add'>+	if (accel_psp-&gt;rx_auth_fail_counter)</div><div class='add'>+		mlx5_fc_query(mdev, accel_psp-&gt;rx_auth_fail_counter,</div><div class='add'>+			      &amp;stats-&gt;psp_rx_pkts_auth_fail,</div><div class='add'>+			      &amp;stats-&gt;psp_rx_bytes_auth_fail);</div><div class='add'>+</div><div class='add'>+	if (accel_psp-&gt;rx_err_counter)</div><div class='add'>+		mlx5_fc_query(mdev, accel_psp-&gt;rx_err_counter,</div><div class='add'>+			      &amp;stats-&gt;psp_rx_pkts_frame_err,</div><div class='add'>+			      &amp;stats-&gt;psp_rx_bytes_frame_err);</div><div class='add'>+</div><div class='add'>+	if (accel_psp-&gt;rx_bad_counter)</div><div class='add'>+		mlx5_fc_query(mdev, accel_psp-&gt;rx_bad_counter,</div><div class='add'>+			      &amp;stats-&gt;psp_rx_pkts_drop,</div><div class='add'>+			      &amp;stats-&gt;psp_rx_bytes_drop);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_accel_psp_fs_cleanup_tx_tables(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;psp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	accel_psp_fs_tx_ft_put(priv-&gt;psp-&gt;fs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_accel_psp_fs_init_tx_tables(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;psp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return accel_psp_fs_tx_ft_get(priv-&gt;psp-&gt;fs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_accel_psp_fs_cleanup(struct mlx5e_psp_fs *fs)</div><div class='add'>+{</div><div class='add'>+	accel_psp_fs_cleanup_rx(fs);</div><div class='add'>+	accel_psp_fs_cleanup_tx(fs);</div><div class='add'>+	kfree(fs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5e_psp_fs *mlx5e_accel_psp_fs_init(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_psp_fs *fs;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	fs = kzalloc(sizeof(*fs), GFP_KERNEL);</div><div class='add'>+	if (!fs)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	fs-&gt;mdev = priv-&gt;mdev;</div><div class='add'>+	err = accel_psp_fs_init_tx(fs);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_tx;</div><div class='add'>+</div><div class='add'>+	fs-&gt;fs = priv-&gt;fs;</div><div class='add'>+	err = accel_psp_fs_init_rx(fs);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_rx;</div><div class='add'>+</div><div class='add'>+	return fs;</div><div class='add'>+</div><div class='add'>+err_rx:</div><div class='add'>+	accel_psp_fs_cleanup_tx(fs);</div><div class='add'>+err_tx:</div><div class='add'>+	kfree(fs);</div><div class='add'>+	return ERR_PTR(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5e_psp_set_config(struct psp_dev *psd, struct psp_dev_config *conf,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	return 0; /* TODO: this should actually do things to the device */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5e_psp_generate_key_spi(struct mlx5_core_dev *mdev,</div><div class='add'>+			   enum mlx5_psp_gen_spi_in_key_size keysz,</div><div class='add'>+			   unsigned int keysz_bytes,</div><div class='add'>+			   struct psp_key_parsed *key)</div><div class='add'>+{</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(psp_gen_spi_out) + MLX5_ST_SZ_DW(key_spi)] = {};</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(psp_gen_spi_in)] = {};</div><div class='add'>+	void *outkey;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(keysz_bytes &gt; PSP_MAX_KEY);</div><div class='add'>+</div><div class='add'>+	MLX5_SET(psp_gen_spi_in, in, opcode, MLX5_CMD_OP_PSP_GEN_SPI);</div><div class='add'>+	MLX5_SET(psp_gen_spi_in, in, key_size, keysz);</div><div class='add'>+	MLX5_SET(psp_gen_spi_in, in, num_of_spi, 1);</div><div class='add'>+	err = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	outkey = MLX5_ADDR_OF(psp_gen_spi_out, out, key_spi);</div><div class='add'>+	key-&gt;spi = cpu_to_be32(MLX5_GET(key_spi, outkey, spi));</div><div class='add'>+	memcpy(key-&gt;key, MLX5_ADDR_OF(key_spi, outkey, key) + 32 - keysz_bytes,</div><div class='add'>+	       keysz_bytes);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5e_psp_rx_spi_alloc(struct psp_dev *psd, u32 version,</div><div class='add'>+		       struct psp_key_parsed *assoc,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(psd-&gt;main_netdev);</div><div class='add'>+	enum mlx5_psp_gen_spi_in_key_size keysz;</div><div class='add'>+	u8 keysz_bytes;</div><div class='add'>+</div><div class='add'>+	switch (version) {</div><div class='add'>+	case PSP_VERSION_HDR0_AES_GCM_128:</div><div class='add'>+		keysz = MLX5_PSP_GEN_SPI_IN_KEY_SIZE_128;</div><div class='add'>+		keysz_bytes = 16;</div><div class='add'>+		break;</div><div class='add'>+	case PSP_VERSION_HDR0_AES_GCM_256:</div><div class='add'>+		keysz = MLX5_PSP_GEN_SPI_IN_KEY_SIZE_256;</div><div class='add'>+		keysz_bytes = 32;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mlx5e_psp_generate_key_spi(priv-&gt;mdev, keysz, keysz_bytes, assoc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct psp_key {</div><div class='add'>+	u32 id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mlx5e_psp_assoc_add(struct psp_dev *psd, struct psp_assoc *pas,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(psd-&gt;main_netdev);</div><div class='add'>+	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	struct psp_key_parsed *tx = &amp;pas-&gt;tx;</div><div class='add'>+	struct mlx5e_psp *psp = priv-&gt;psp;</div><div class='add'>+	struct psp_key *nkey;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mdev = priv-&gt;mdev;</div><div class='add'>+	nkey = (struct psp_key *)pas-&gt;drv_data;</div><div class='add'>+</div><div class='add'>+	err = mlx5_create_encryption_key(mdev, tx-&gt;key,</div><div class='add'>+					 psp_key_size(pas-&gt;version),</div><div class='add'>+					 MLX5_ACCEL_OBJ_PSP_KEY,</div><div class='add'>+					 &amp;nkey-&gt;id);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_err(mdev, "Failed to create encryption key (err = %d)\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;psp-&gt;tx_key_cnt);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_psp_assoc_del(struct psp_dev *psd, struct psp_assoc *pas)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(psd-&gt;main_netdev);</div><div class='add'>+	struct mlx5e_psp *psp = priv-&gt;psp;</div><div class='add'>+	struct psp_key *nkey;</div><div class='add'>+</div><div class='add'>+	nkey = (struct psp_key *)pas-&gt;drv_data;</div><div class='add'>+	mlx5_destroy_encryption_key(priv-&gt;mdev, nkey-&gt;id);</div><div class='add'>+	atomic_dec(&amp;psp-&gt;tx_key_cnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5e_psp_rotate_key(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(psp_rotate_key_in)] = {};</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(psp_rotate_key_out)];</div><div class='add'>+</div><div class='add'>+	MLX5_SET(psp_rotate_key_in, in, opcode,</div><div class='add'>+		 MLX5_CMD_OP_PSP_ROTATE_KEY);</div><div class='add'>+</div><div class='add'>+	return mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5e_psp_key_rotate(struct psp_dev *psd, struct netlink_ext_ack *exack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(psd-&gt;main_netdev);</div><div class='add'>+</div><div class='add'>+	/* no support for protecting against external rotations */</div><div class='add'>+	psd-&gt;generation = 0;</div><div class='add'>+</div><div class='add'>+	return mlx5e_psp_rotate_key(priv-&gt;mdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mlx5e_psp_get_stats(struct psp_dev *psd, struct psp_dev_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(psd-&gt;main_netdev);</div><div class='add'>+	struct mlx5e_psp_stats nstats;</div><div class='add'>+</div><div class='add'>+	mlx5e_accel_psp_fs_get_stats_fill(priv, &amp;nstats);</div><div class='add'>+	stats-&gt;rx_packets = nstats.psp_rx_pkts;</div><div class='add'>+	stats-&gt;rx_bytes = nstats.psp_rx_bytes;</div><div class='add'>+	stats-&gt;rx_auth_fail = nstats.psp_rx_pkts_auth_fail;</div><div class='add'>+	stats-&gt;rx_error = nstats.psp_rx_pkts_frame_err;</div><div class='add'>+	stats-&gt;rx_bad = nstats.psp_rx_pkts_drop;</div><div class='add'>+	stats-&gt;tx_packets = nstats.psp_tx_pkts;</div><div class='add'>+	stats-&gt;tx_bytes = nstats.psp_tx_bytes;</div><div class='add'>+	stats-&gt;tx_error = atomic_read(&amp;priv-&gt;psp-&gt;tx_drop);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct psp_dev_ops mlx5_psp_ops = {</div><div class='add'>+	.set_config   = mlx5e_psp_set_config,</div><div class='add'>+	.rx_spi_alloc = mlx5e_psp_rx_spi_alloc,</div><div class='add'>+	.tx_key_add   = mlx5e_psp_assoc_add,</div><div class='add'>+	.tx_key_del   = mlx5e_psp_assoc_del,</div><div class='add'>+	.key_rotate   = mlx5e_psp_key_rotate,</div><div class='add'>+	.get_stats    = mlx5e_psp_get_stats,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void mlx5e_psp_unregister(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;psp || !priv-&gt;psp-&gt;psp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	psp_dev_unregister(priv-&gt;psp-&gt;psp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5e_psp_register(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* FW Caps missing */</div><div class='add'>+	if (!priv-&gt;psp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	priv-&gt;psp-&gt;caps.assoc_drv_spc = sizeof(u32);</div><div class='add'>+	priv-&gt;psp-&gt;caps.versions = 1 &lt;&lt; PSP_VERSION_HDR0_AES_GCM_128;</div><div class='add'>+	if (MLX5_CAP_PSP(priv-&gt;mdev, psp_crypto_esp_aes_gcm_256_encrypt) &amp;&amp;</div><div class='add'>+	    MLX5_CAP_PSP(priv-&gt;mdev, psp_crypto_esp_aes_gcm_256_decrypt))</div><div class='add'>+		priv-&gt;psp-&gt;caps.versions |= 1 &lt;&lt; PSP_VERSION_HDR0_AES_GCM_256;</div><div class='add'>+</div><div class='add'>+	priv-&gt;psp-&gt;psp = psp_dev_create(priv-&gt;netdev, &amp;mlx5_psp_ops,</div><div class='add'>+					&amp;priv-&gt;psp-&gt;caps, NULL);</div><div class='add'>+	if (IS_ERR(priv-&gt;psp-&gt;psp))</div><div class='add'>+		mlx5_core_err(priv-&gt;mdev, "PSP failed to register due to %pe\n",</div><div class='add'>+			      priv-&gt;psp-&gt;psp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5e_psp_init(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	struct mlx5e_psp_fs *fs;</div><div class='add'>+	struct mlx5e_psp *psp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mlx5_is_psp_device(mdev)) {</div><div class='add'>+		mlx5_core_dbg(mdev, "PSP offload not supported\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_ETH(mdev, swp)) {</div><div class='add'>+		mlx5_core_dbg(mdev, "SWP not supported\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_ETH(mdev, swp_csum)) {</div><div class='add'>+		mlx5_core_dbg(mdev, "SWP checksum not supported\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_ETH(mdev, swp_csum_l4_partial)) {</div><div class='add'>+		mlx5_core_dbg(mdev, "SWP L4 partial checksum not supported\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_ETH(mdev, swp_lso)) {</div><div class='add'>+		mlx5_core_dbg(mdev, "PSP LSO not supported\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	psp = kzalloc(sizeof(*psp), GFP_KERNEL);</div><div class='add'>+	if (!psp)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;psp = psp;</div><div class='add'>+	fs = mlx5e_accel_psp_fs_init(priv);</div><div class='add'>+	if (IS_ERR(fs)) {</div><div class='add'>+		err = PTR_ERR(fs);</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	psp-&gt;fs = fs;</div><div class='add'>+</div><div class='add'>+	mlx5_core_dbg(priv-&gt;mdev, "PSP attached to netdevice\n");</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	priv-&gt;psp = NULL;</div><div class='add'>+	kfree(psp);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5e_psp_cleanup(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_psp *psp = priv-&gt;psp;</div><div class='add'>+</div><div class='add'>+	if (!psp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	WARN_ON(atomic_read(&amp;psp-&gt;tx_key_cnt));</div><div class='add'>+	mlx5e_accel_psp_fs_cleanup(psp-&gt;fs);</div><div class='add'>+	priv-&gt;psp = NULL;</div><div class='add'>+	kfree(psp);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.h<br/>new file mode 100644<br/>index 000000000000..6b62fef0d9a7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.h</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2023, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef __MLX5E_ACCEL_PSP_H__</div><div class='add'>+#define __MLX5E_ACCEL_PSP_H__</div><div class='add'>+#if IS_ENABLED(CONFIG_MLX5_EN_PSP)</div><div class='add'>+#include &lt;net/psp/types.h&gt;</div><div class='add'>+#include "en.h"</div><div class='add'>+</div><div class='add'>+struct mlx5e_psp_stats {</div><div class='add'>+	u64 psp_rx_pkts;</div><div class='add'>+	u64 psp_rx_bytes;</div><div class='add'>+	u64 psp_rx_pkts_auth_fail;</div><div class='add'>+	u64 psp_rx_bytes_auth_fail;</div><div class='add'>+	u64 psp_rx_pkts_frame_err;</div><div class='add'>+	u64 psp_rx_bytes_frame_err;</div><div class='add'>+	u64 psp_rx_pkts_drop;</div><div class='add'>+	u64 psp_rx_bytes_drop;</div><div class='add'>+	u64 psp_tx_pkts;</div><div class='add'>+	u64 psp_tx_bytes;</div><div class='add'>+	u64 psp_tx_pkts_drop;</div><div class='add'>+	u64 psp_tx_bytes_drop;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5e_psp {</div><div class='add'>+	struct psp_dev *psp;</div><div class='add'>+	struct psp_dev_caps caps;</div><div class='add'>+	struct mlx5e_psp_fs *fs;</div><div class='add'>+	atomic_t tx_key_cnt;</div><div class='add'>+	atomic_t tx_drop;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool mlx5_is_psp_device(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	if (!MLX5_CAP_GEN(mdev, psp))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_PSP(mdev, psp_crypto_offload) ||</div><div class='add'>+	    !MLX5_CAP_PSP(mdev, psp_crypto_esp_aes_gcm_128_encrypt) ||</div><div class='add'>+	    !MLX5_CAP_PSP(mdev, psp_crypto_esp_aes_gcm_128_decrypt))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_accel_psp_fs_init_rx_tables(struct mlx5e_priv *priv);</div><div class='add'>+void mlx5_accel_psp_fs_cleanup_rx_tables(struct mlx5e_priv *priv);</div><div class='add'>+int mlx5_accel_psp_fs_init_tx_tables(struct mlx5e_priv *priv);</div><div class='add'>+void mlx5_accel_psp_fs_cleanup_tx_tables(struct mlx5e_priv *priv);</div><div class='add'>+void mlx5e_psp_register(struct mlx5e_priv *priv);</div><div class='add'>+void mlx5e_psp_unregister(struct mlx5e_priv *priv);</div><div class='add'>+int mlx5e_psp_init(struct mlx5e_priv *priv);</div><div class='add'>+void mlx5e_psp_cleanup(struct mlx5e_priv *priv);</div><div class='add'>+#else</div><div class='add'>+static inline int mlx5_accel_psp_fs_init_rx_tables(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mlx5_accel_psp_fs_cleanup_rx_tables(struct mlx5e_priv *priv) { }</div><div class='add'>+static inline int mlx5_accel_psp_fs_init_tx_tables(struct mlx5e_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mlx5_accel_psp_fs_cleanup_tx_tables(struct mlx5e_priv *priv) { }</div><div class='add'>+static inline bool mlx5_is_psp_device(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mlx5e_psp_register(struct mlx5e_priv *priv) { }</div><div class='add'>+static inline void mlx5e_psp_unregister(struct mlx5e_priv *priv) { }</div><div class='add'>+static inline int mlx5e_psp_init(struct mlx5e_priv *priv) { return 0; }</div><div class='add'>+static inline void mlx5e_psp_cleanup(struct mlx5e_priv *priv) { }</div><div class='add'>+#endif /* CONFIG_MLX5_EN_PSP */</div><div class='add'>+#endif /* __MLX5E_ACCEL_PSP_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c<br/>new file mode 100644<br/>index 000000000000..c17ea0fcd8ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c</a></div><div class='hunk'>@@ -0,0 +1,201 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2023, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/udp.h&gt;</div><div class='add'>+#include &lt;net/protocol.h&gt;</div><div class='add'>+#include &lt;net/udp.h&gt;</div><div class='add'>+#include &lt;net/ip6_checksum.h&gt;</div><div class='add'>+#include &lt;net/psp/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "en.h"</div><div class='add'>+#include "psp.h"</div><div class='add'>+#include "en_accel/psp_rxtx.h"</div><div class='add'>+#include "en_accel/psp.h"</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	MLX5E_PSP_OFFLOAD_RX_SYNDROME_DECRYPTED,</div><div class='add'>+	MLX5E_PSP_OFFLOAD_RX_SYNDROME_AUTH_FAILED,</div><div class='add'>+	MLX5E_PSP_OFFLOAD_RX_SYNDROME_BAD_TRAILER,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mlx5e_psp_set_swp(struct sk_buff *skb,</div><div class='add'>+			      struct mlx5e_accel_tx_psp_state *psp_st,</div><div class='add'>+			      struct mlx5_wqe_eth_seg *eseg)</div><div class='add'>+{</div><div class='add'>+	/* Tunnel Mode:</div><div class='add'>+	 * SWP:      OutL3       InL3  InL4</div><div class='add'>+	 * Pkt: MAC  IP     ESP  IP    L4</div><div class='add'>+	 *</div><div class='add'>+	 * Transport Mode:</div><div class='add'>+	 * SWP:      OutL3       OutL4</div><div class='add'>+	 * Pkt: MAC  IP     ESP  L4</div><div class='add'>+	 *</div><div class='add'>+	 * Tunnel(VXLAN TCP/UDP) over Transport Mode</div><div class='add'>+	 * SWP:      OutL3                   InL3  InL4</div><div class='add'>+	 * Pkt: MAC  IP     ESP  UDP  VXLAN  IP    L4</div><div class='add'>+	 */</div><div class='add'>+	u8 inner_ipproto = 0;</div><div class='add'>+	struct ethhdr *eth;</div><div class='add'>+</div><div class='add'>+	/* Shared settings */</div><div class='add'>+	eseg-&gt;swp_outer_l3_offset = skb_network_offset(skb) / 2;</div><div class='add'>+	if (skb-&gt;protocol == htons(ETH_P_IPV6))</div><div class='add'>+		eseg-&gt;swp_flags |= MLX5_ETH_WQE_SWP_OUTER_L3_IPV6;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;inner_protocol_type == ENCAP_TYPE_IPPROTO) {</div><div class='add'>+		inner_ipproto = skb-&gt;inner_ipproto;</div><div class='add'>+		/* Set SWP additional flags for packet of type IP|UDP|PSP|[ TCP | UDP ] */</div><div class='add'>+		switch (inner_ipproto) {</div><div class='add'>+		case IPPROTO_UDP:</div><div class='add'>+			eseg-&gt;swp_flags |= MLX5_ETH_WQE_SWP_INNER_L4_UDP;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case IPPROTO_TCP:</div><div class='add'>+			eseg-&gt;swp_inner_l4_offset = skb_inner_transport_offset(skb) / 2;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* IP in IP tunneling like vxlan*/</div><div class='add'>+		if (skb-&gt;inner_protocol_type != ENCAP_TYPE_ETHER)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		eth = (struct ethhdr *)skb_inner_mac_header(skb);</div><div class='add'>+		switch (ntohs(eth-&gt;h_proto)) {</div><div class='add'>+		case ETH_P_IP:</div><div class='add'>+			inner_ipproto = ((struct iphdr *)((char *)skb-&gt;data +</div><div class='add'>+					 skb_inner_network_offset(skb)))-&gt;protocol;</div><div class='add'>+			break;</div><div class='add'>+		case ETH_P_IPV6:</div><div class='add'>+			inner_ipproto = ((struct ipv6hdr *)((char *)skb-&gt;data +</div><div class='add'>+					 skb_inner_network_offset(skb)))-&gt;nexthdr;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Tunnel(VXLAN TCP/UDP) over Transport Mode PSP i.e. PSP payload is vxlan tunnel */</div><div class='add'>+		switch (inner_ipproto) {</div><div class='add'>+		case IPPROTO_UDP:</div><div class='add'>+			eseg-&gt;swp_flags |= MLX5_ETH_WQE_SWP_INNER_L4_UDP;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case IPPROTO_TCP:</div><div class='add'>+			eseg-&gt;swp_inner_l3_offset = skb_inner_network_offset(skb) / 2;</div><div class='add'>+			eseg-&gt;swp_inner_l4_offset =</div><div class='add'>+				(skb-&gt;csum_start + skb-&gt;head - skb-&gt;data) / 2;</div><div class='add'>+			if (skb-&gt;protocol == htons(ETH_P_IPV6))</div><div class='add'>+				eseg-&gt;swp_flags |= MLX5_ETH_WQE_SWP_INNER_L3_IPV6;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		psp_st-&gt;inner_ipproto = inner_ipproto;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mlx5e_psp_set_state(struct mlx5e_priv *priv,</div><div class='add'>+				struct sk_buff *skb,</div><div class='add'>+				struct mlx5e_accel_tx_psp_state *psp_st)</div><div class='add'>+{</div><div class='add'>+	struct psp_assoc *pas;</div><div class='add'>+	bool ret = false;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	pas = psp_skb_get_assoc_rcu(skb);</div><div class='add'>+	if (!pas)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = true;</div><div class='add'>+	psp_st-&gt;tailen = PSP_TRL_SIZE;</div><div class='add'>+	psp_st-&gt;spi = pas-&gt;tx.spi;</div><div class='add'>+	psp_st-&gt;ver = pas-&gt;version;</div><div class='add'>+	psp_st-&gt;keyid = *(u32 *)pas-&gt;drv_data;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mlx5e_psp_offload_handle_rx_skb(struct net_device *netdev, struct sk_buff *skb,</div><div class='add'>+				     struct mlx5_cqe64 *cqe)</div><div class='add'>+{</div><div class='add'>+	u32 psp_meta_data = be32_to_cpu(cqe-&gt;ft_metadata);</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='add'>+	u16 dev_id = priv-&gt;psp-&gt;psp-&gt;id;</div><div class='add'>+	bool strip_icv = true;</div><div class='add'>+	u8 generation = 0;</div><div class='add'>+</div><div class='add'>+	/* TBD: report errors as SW counters to ethtool, any further handling ? */</div><div class='add'>+	if (MLX5_PSP_METADATA_SYNDROME(psp_meta_data) != MLX5E_PSP_OFFLOAD_RX_SYNDROME_DECRYPTED)</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	if (psp_dev_rcv(skb, dev_id, generation, strip_icv))</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	skb-&gt;decrypted = 1;</div><div class='add'>+	return false;</div><div class='add'>+</div><div class='add'>+drop:</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5e_psp_tx_build_eseg(struct mlx5e_priv *priv, struct sk_buff *skb,</div><div class='add'>+			     struct mlx5e_accel_tx_psp_state *psp_st,</div><div class='add'>+			     struct mlx5_wqe_eth_seg *eseg)</div><div class='add'>+{</div><div class='add'>+	if (!mlx5_is_psp_device(priv-&gt;mdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (unlikely(skb-&gt;protocol != htons(ETH_P_IP) &amp;&amp;</div><div class='add'>+		     skb-&gt;protocol != htons(ETH_P_IPV6)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5e_psp_set_swp(skb, psp_st, eseg);</div><div class='add'>+	/* Special WA for PSP LSO in ConnectX7 */</div><div class='add'>+	eseg-&gt;swp_outer_l3_offset = 0;</div><div class='add'>+	eseg-&gt;swp_inner_l3_offset = 0;</div><div class='add'>+</div><div class='add'>+	eseg-&gt;flow_table_metadata |= cpu_to_be32(psp_st-&gt;keyid);</div><div class='add'>+	eseg-&gt;trailer |= cpu_to_be32(MLX5_ETH_WQE_INSERT_TRAILER) |</div><div class='add'>+			 cpu_to_be32(MLX5_ETH_WQE_TRAILER_HDR_OUTER_L4_ASSOC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5e_psp_handle_tx_wqe(struct mlx5e_tx_wqe *wqe,</div><div class='add'>+			     struct mlx5e_accel_tx_psp_state *psp_st,</div><div class='add'>+			     struct mlx5_wqe_inline_seg *inlseg)</div><div class='add'>+{</div><div class='add'>+	inlseg-&gt;byte_count = cpu_to_be32(psp_st-&gt;tailen | MLX5_INLINE_SEG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mlx5e_psp_handle_tx_skb(struct net_device *netdev,</div><div class='add'>+			     struct sk_buff *skb,</div><div class='add'>+			     struct mlx5e_accel_tx_psp_state *psp_st)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct net *net = sock_net(skb-&gt;sk);</div><div class='add'>+	const struct ipv6hdr *ip6;</div><div class='add'>+	struct tcphdr *th;</div><div class='add'>+</div><div class='add'>+	if (!mlx5e_psp_set_state(priv, skb, psp_st))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/* psp_encap of the packet */</div><div class='add'>+	if (!psp_dev_encapsulate(net, skb, psp_st-&gt;spi, psp_st-&gt;ver, 0)) {</div><div class='add'>+		kfree_skb_reason(skb, SKB_DROP_REASON_PSP_OUTPUT);</div><div class='add'>+		atomic_inc(&amp;priv-&gt;psp-&gt;tx_drop);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+	if (skb_is_gso(skb)) {</div><div class='add'>+		ip6 = ipv6_hdr(skb);</div><div class='add'>+		th = inner_tcp_hdr(skb);</div><div class='add'>+</div><div class='add'>+		th-&gt;check = ~tcp_v6_check(skb_shinfo(skb)-&gt;gso_size + inner_tcp_hdrlen(skb), &amp;ip6-&gt;saddr,</div><div class='add'>+					  &amp;ip6-&gt;daddr, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h<br/>new file mode 100644<br/>index 000000000000..70289c921bd6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h</a></div><div class='hunk'>@@ -0,0 +1,121 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2023, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef __MLX5E_PSP_RXTX_H__</div><div class='add'>+#define __MLX5E_PSP_RXTX_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;net/xfrm.h&gt;</div><div class='add'>+#include &lt;net/psp.h&gt;</div><div class='add'>+#include "en.h"</div><div class='add'>+#include "en/txrx.h"</div><div class='add'>+</div><div class='add'>+/* Bit30: PSP marker, Bit29-23: PSP syndrome, Bit22-0: PSP obj id */</div><div class='add'>+#define MLX5_PSP_METADATA_MARKER(metadata)  ((((metadata) &gt;&gt; 30) &amp; 0x3) == 0x3)</div><div class='add'>+#define MLX5_PSP_METADATA_SYNDROME(metadata) (((metadata) &gt;&gt; 23) &amp; GENMASK(6, 0))</div><div class='add'>+#define MLX5_PSP_METADATA_HANDLE(metadata)  ((metadata) &amp; GENMASK(22, 0))</div><div class='add'>+</div><div class='add'>+struct mlx5e_accel_tx_psp_state {</div><div class='add'>+	u32 tailen;</div><div class='add'>+	u32 keyid;</div><div class='add'>+	__be32 spi;</div><div class='add'>+	u8 inner_ipproto;</div><div class='add'>+	u8 ver;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MLX5_EN_PSP</div><div class='add'>+static inline bool mlx5e_psp_is_offload_state(struct mlx5e_accel_tx_psp_state *psp_state)</div><div class='add'>+{</div><div class='add'>+	return (psp_state-&gt;tailen != 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mlx5e_psp_is_offload(struct sk_buff *skb, struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	bool ret;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	ret = !!psp_skb_get_assoc_rcu(skb);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mlx5e_psp_handle_tx_skb(struct net_device *netdev,</div><div class='add'>+			     struct sk_buff *skb,</div><div class='add'>+			     struct mlx5e_accel_tx_psp_state *psp_st);</div><div class='add'>+</div><div class='add'>+void mlx5e_psp_tx_build_eseg(struct mlx5e_priv *priv, struct sk_buff *skb,</div><div class='add'>+			     struct mlx5e_accel_tx_psp_state *psp_st,</div><div class='add'>+			     struct mlx5_wqe_eth_seg *eseg);</div><div class='add'>+</div><div class='add'>+void mlx5e_psp_handle_tx_wqe(struct mlx5e_tx_wqe *wqe,</div><div class='add'>+			     struct mlx5e_accel_tx_psp_state *psp_st,</div><div class='add'>+			     struct mlx5_wqe_inline_seg *inlseg);</div><div class='add'>+</div><div class='add'>+static inline bool mlx5e_psp_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='add'>+						   struct mlx5e_accel_tx_psp_state *psp_st,</div><div class='add'>+						   struct mlx5_wqe_eth_seg *eseg)</div><div class='add'>+{</div><div class='add'>+	u8 inner_ipproto;</div><div class='add'>+</div><div class='add'>+	if (!mlx5e_psp_is_offload_state(psp_st))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	inner_ipproto = psp_st-&gt;inner_ipproto;</div><div class='add'>+	eseg-&gt;cs_flags = MLX5_ETH_WQE_L3_CSUM;</div><div class='add'>+	if (inner_ipproto) {</div><div class='add'>+		eseg-&gt;cs_flags |= MLX5_ETH_WQE_L3_INNER_CSUM;</div><div class='add'>+		if (inner_ipproto == IPPROTO_TCP || inner_ipproto == IPPROTO_UDP)</div><div class='add'>+			eseg-&gt;cs_flags |= MLX5_ETH_WQE_L4_INNER_CSUM;</div><div class='add'>+		if (likely(skb-&gt;ip_summed == CHECKSUM_PARTIAL))</div><div class='add'>+			sq-&gt;stats-&gt;csum_partial_inner++;</div><div class='add'>+	} else if (likely(skb-&gt;ip_summed == CHECKSUM_PARTIAL)) {</div><div class='add'>+		eseg-&gt;cs_flags |= MLX5_ETH_WQE_L4_INNER_CSUM;</div><div class='add'>+		sq-&gt;stats-&gt;csum_partial_inner++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int mlx5e_psp_tx_ids_len(struct mlx5e_accel_tx_psp_state *psp_st)</div><div class='add'>+{</div><div class='add'>+	return psp_st-&gt;tailen;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mlx5e_psp_is_rx_flow(struct mlx5_cqe64 *cqe)</div><div class='add'>+{</div><div class='add'>+	return MLX5_PSP_METADATA_MARKER(be32_to_cpu(cqe-&gt;ft_metadata));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mlx5e_psp_offload_handle_rx_skb(struct net_device *netdev, struct sk_buff *skb,</div><div class='add'>+				     struct mlx5_cqe64 *cqe);</div><div class='add'>+#else</div><div class='add'>+static inline bool mlx5e_psp_is_offload_state(struct mlx5e_accel_tx_psp_state *psp_state)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mlx5e_psp_is_offload(struct sk_buff *skb, struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mlx5e_psp_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='add'>+						   struct mlx5e_accel_tx_psp_state *psp_st,</div><div class='add'>+						   struct mlx5_wqe_eth_seg *eseg)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mlx5e_psp_is_rx_flow(struct mlx5_cqe64 *cqe)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mlx5e_psp_offload_handle_rx_skb(struct net_device *netdev,</div><div class='add'>+						   struct sk_buff *skb,</div><div class='add'>+						   struct mlx5_cqe64 *cqe)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_MLX5_EN_PSP */</div><div class='add'>+#endif /* __MLX5E_PSP_RXTX_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_common.c b/drivers/net/ethernet/mellanox/mlx5/core/en_common.c<br/>index 6ed3a32b7e22..5a2ac7b6f260 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_common.c</a></div><div class='hunk'>@@ -30,6 +30,7 @@</div><div class='ctx'>  * SOFTWARE.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include "devlink.h"</div><div class='ctx'> #include "en.h"</div><div class='ctx'> #include "lib/crypto.h"</div><div class='ctx'> </div><div class='hunk'>@@ -140,9 +141,22 @@ err_close_tises:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int</div><div class='add'>+mlx5e_get_devlink_param_num_doorbells(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	const u32 param_id = DEVLINK_PARAM_GENERIC_ID_NUM_DOORBELLS;</div><div class='add'>+	struct devlink *devlink = priv_to_devlink(dev);</div><div class='add'>+	union devlink_param_value val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = devl_param_driverinit_value_get(devlink, param_id, &amp;val);</div><div class='add'>+	return err ? MLX5_DEFAULT_NUM_DOORBELLS : val.vu32;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev, bool create_tises)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_hw_objs *res = &amp;mdev-&gt;mlx5e_res.hw_objs;</div><div class='add'>+	unsigned int num_doorbells, i;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_core_alloc_pd(mdev, &amp;res-&gt;pdn);</div><div class='hunk'>@@ -163,17 +177,30 @@ int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev, bool create_tises)</div><div class='ctx'> 		goto err_dealloc_transport_domain;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = mlx5_alloc_bfreg(mdev, &amp;res-&gt;bfreg, false, false);</div><div class='del'>-	if (err) {</div><div class='del'>-		mlx5_core_err(mdev, "alloc bfreg failed, %d\n", err);</div><div class='add'>+	num_doorbells = min(mlx5e_get_devlink_param_num_doorbells(mdev),</div><div class='add'>+			    mlx5e_get_max_num_channels(mdev));</div><div class='add'>+	res-&gt;bfregs = kcalloc(num_doorbells, sizeof(*res-&gt;bfregs), GFP_KERNEL);</div><div class='add'>+	if (!res-&gt;bfregs) {</div><div class='add'>+		err = -ENOMEM;</div><div class='ctx'> 		goto err_destroy_mkey;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; num_doorbells; i++) {</div><div class='add'>+		err = mlx5_alloc_bfreg(mdev, res-&gt;bfregs + i, false, false);</div><div class='add'>+		if (err) {</div><div class='add'>+			mlx5_core_warn(mdev,</div><div class='add'>+				       "could only allocate %d/%d doorbells, err %d.\n",</div><div class='add'>+				       i, num_doorbells, err);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	res-&gt;num_bfregs = i;</div><div class='add'>+</div><div class='ctx'> 	if (create_tises) {</div><div class='ctx'> 		err = mlx5e_create_tises(mdev, res-&gt;tisn);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			mlx5_core_err(mdev, "alloc tises failed, %d\n", err);</div><div class='del'>-			goto err_destroy_bfreg;</div><div class='add'>+			goto err_destroy_bfregs;</div><div class='ctx'> 		}</div><div class='ctx'> 		res-&gt;tisn_valid = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -183,15 +210,17 @@ int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev, bool create_tises)</div><div class='ctx'> </div><div class='ctx'> 	mdev-&gt;mlx5e_res.dek_priv = mlx5_crypto_dek_init(mdev);</div><div class='ctx'> 	if (IS_ERR(mdev-&gt;mlx5e_res.dek_priv)) {</div><div class='del'>-		mlx5_core_err(mdev, "crypto dek init failed, %ld\n",</div><div class='del'>-			      PTR_ERR(mdev-&gt;mlx5e_res.dek_priv));</div><div class='add'>+		mlx5_core_err(mdev, "crypto dek init failed, %pe\n",</div><div class='add'>+			      mdev-&gt;mlx5e_res.dek_priv);</div><div class='ctx'> 		mdev-&gt;mlx5e_res.dek_priv = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_destroy_bfreg:</div><div class='del'>-	mlx5_free_bfreg(mdev, &amp;res-&gt;bfreg);</div><div class='add'>+err_destroy_bfregs:</div><div class='add'>+	for (i = 0; i &lt; res-&gt;num_bfregs; i++)</div><div class='add'>+		mlx5_free_bfreg(mdev, res-&gt;bfregs + i);</div><div class='add'>+	kfree(res-&gt;bfregs);</div><div class='ctx'> err_destroy_mkey:</div><div class='ctx'> 	mlx5_core_destroy_mkey(mdev, res-&gt;mkey);</div><div class='ctx'> err_dealloc_transport_domain:</div><div class='hunk'>@@ -209,52 +238,52 @@ void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev)</div><div class='ctx'> 	mdev-&gt;mlx5e_res.dek_priv = NULL;</div><div class='ctx'> 	if (res-&gt;tisn_valid)</div><div class='ctx'> 		mlx5e_destroy_tises(mdev, res-&gt;tisn);</div><div class='del'>-	mlx5_free_bfreg(mdev, &amp;res-&gt;bfreg);</div><div class='add'>+	for (unsigned int i = 0; i &lt; res-&gt;num_bfregs; i++)</div><div class='add'>+		mlx5_free_bfreg(mdev, res-&gt;bfregs + i);</div><div class='add'>+	kfree(res-&gt;bfregs);</div><div class='ctx'> 	mlx5_core_destroy_mkey(mdev, res-&gt;mkey);</div><div class='ctx'> 	mlx5_core_dealloc_transport_domain(mdev, res-&gt;td.tdn);</div><div class='ctx'> 	mlx5_core_dealloc_pd(mdev, res-&gt;pdn);</div><div class='ctx'> 	memset(res, 0, sizeof(*res));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb,</div><div class='del'>-		       bool enable_mc_lb)</div><div class='add'>+int mlx5e_modify_tirs_lb(struct mlx5_core_dev *mdev, bool enable_uc_lb,</div><div class='add'>+			 bool enable_mc_lb)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	struct mlx5e_tir_builder *builder;</div><div class='ctx'> 	struct mlx5e_tir *tir;</div><div class='del'>-	u8 lb_flags = 0;</div><div class='del'>-	int err  = 0;</div><div class='del'>-	u32 tirn = 0;</div><div class='del'>-	int inlen;</div><div class='del'>-	void *in;</div><div class='add'>+	int err = 0;</div><div class='ctx'> </div><div class='del'>-	inlen = MLX5_ST_SZ_BYTES(modify_tir_in);</div><div class='del'>-	in = kvzalloc(inlen, GFP_KERNEL);</div><div class='del'>-	if (!in)</div><div class='add'>+	builder = mlx5e_tir_builder_alloc(true);</div><div class='add'>+	if (!builder)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (enable_uc_lb)</div><div class='del'>-		lb_flags = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;</div><div class='del'>-</div><div class='del'>-	if (enable_mc_lb)</div><div class='del'>-		lb_flags |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;</div><div class='del'>-</div><div class='del'>-	if (lb_flags)</div><div class='del'>-		MLX5_SET(modify_tir_in, in, ctx.self_lb_block, lb_flags);</div><div class='del'>-</div><div class='del'>-	MLX5_SET(modify_tir_in, in, bitmask.self_lb_en, 1);</div><div class='add'>+	mlx5e_tir_builder_build_self_lb_block(builder, enable_uc_lb,</div><div class='add'>+					      enable_mc_lb);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mdev-&gt;mlx5e_res.hw_objs.td.list_lock);</div><div class='ctx'> 	list_for_each_entry(tir, &amp;mdev-&gt;mlx5e_res.hw_objs.td.tirs_list, list) {</div><div class='del'>-		tirn = tir-&gt;tirn;</div><div class='del'>-		err = mlx5_core_modify_tir(mdev, tirn, in);</div><div class='del'>-		if (err)</div><div class='add'>+		err = mlx5e_tir_modify(tir, builder);</div><div class='add'>+		if (err) {</div><div class='add'>+			mlx5_core_err(mdev,</div><div class='add'>+				      "modify tir(0x%x) enable_lb uc(%d) mc(%d) failed, %d\n",</div><div class='add'>+				      mlx5e_tir_get_tirn(tir),</div><div class='add'>+				      enable_uc_lb, enable_mc_lb, err);</div><div class='ctx'> 			break;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;mdev-&gt;mlx5e_res.hw_objs.td.list_lock);</div><div class='ctx'> </div><div class='del'>-	kvfree(in);</div><div class='del'>-	if (err)</div><div class='del'>-		netdev_err(priv-&gt;netdev, "refresh tir(0x%x) failed, %d\n", tirn, err);</div><div class='add'>+	mlx5e_tir_builder_free(builder);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int mlx5e_refresh_tirs(struct mlx5_core_dev *mdev, bool enable_uc_lb,</div><div class='add'>+		       bool enable_mc_lb)</div><div class='add'>+{</div><div class='add'>+	if (MLX5_CAP_GEN(mdev, tis_tir_td_order))</div><div class='add'>+		return 0; /* refresh not needed */</div><div class='add'>+</div><div class='add'>+	return mlx5e_modify_tirs_lb(mdev, enable_uc_lb, enable_mc_lb);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c b/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c<br/>index 8705cffc747f..fddf7c207f8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c</a></div><div class='hunk'>@@ -31,14 +31,15 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='ctx'> #include "en.h"</div><div class='ctx'> #include "en/port.h"</div><div class='ctx'> #include "en/port_buffer.h"</div><div class='ctx'> </div><div class='ctx'> #define MLX5E_MAX_BW_ALLOC 100 /* Max percentage of BW allocation */</div><div class='ctx'> </div><div class='del'>-#define MLX5E_100MB (100000)</div><div class='del'>-#define MLX5E_1GB   (1000000)</div><div class='add'>+#define MLX5E_100MB_TO_KB (100 * MEGA / KILO)</div><div class='add'>+#define MLX5E_1GB_TO_KB   (GIGA / KILO)</div><div class='ctx'> </div><div class='ctx'> #define MLX5E_CEE_STATE_UP    1</div><div class='ctx'> #define MLX5E_CEE_STATE_DOWN  0</div><div class='hunk'>@@ -362,6 +363,7 @@ static int mlx5e_dcbnl_ieee_getpfc(struct net_device *dev,</div><div class='ctx'> static int mlx5e_dcbnl_ieee_setpfc(struct net_device *dev,</div><div class='ctx'> 				   struct ieee_pfc *pfc)</div><div class='ctx'> {</div><div class='add'>+	u8 buffer_ownership = MLX5_BUF_OWNERSHIP_UNKNOWN;</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	u32 old_cable_len = priv-&gt;dcbx.cable_len;</div><div class='hunk'>@@ -389,7 +391,14 @@ static int mlx5e_dcbnl_ieee_setpfc(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	if (MLX5_BUFFER_SUPPORTED(mdev)) {</div><div class='ctx'> 		pfc_new.pfc_en = (changed &amp; MLX5E_PORT_BUFFER_PFC) ? pfc-&gt;pfc_en : curr_pfc_en;</div><div class='del'>-		if (priv-&gt;dcbx.manual_buffer)</div><div class='add'>+		ret = mlx5_query_port_buffer_ownership(mdev,</div><div class='add'>+						       &amp;buffer_ownership);</div><div class='add'>+		if (ret)</div><div class='add'>+			netdev_err(dev,</div><div class='add'>+				   "%s, Failed to get buffer ownership: %d\n",</div><div class='add'>+				   __func__, ret);</div><div class='add'>+</div><div class='add'>+		if (buffer_ownership == MLX5_BUF_OWNERSHIP_SW_OWNED)</div><div class='ctx'> 			ret = mlx5e_port_manual_buffer_config(priv, changed,</div><div class='ctx'> 							      dev-&gt;mtu, &amp;pfc_new,</div><div class='ctx'> 							      NULL, NULL);</div><div class='hunk'>@@ -564,10 +573,10 @@ static int mlx5e_dcbnl_ieee_getmaxrate(struct net_device *netdev,</div><div class='ctx'> 	for (i = 0; i &lt;= mlx5_max_tc(mdev); i++) {</div><div class='ctx'> 		switch (max_bw_unit[i]) {</div><div class='ctx'> 		case MLX5_100_MBPS_UNIT:</div><div class='del'>-			maxrate-&gt;tc_maxrate[i] = max_bw_value[i] * MLX5E_100MB;</div><div class='add'>+			maxrate-&gt;tc_maxrate[i] = max_bw_value[i] * MLX5E_100MB_TO_KB;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case MLX5_GBPS_UNIT:</div><div class='del'>-			maxrate-&gt;tc_maxrate[i] = max_bw_value[i] * MLX5E_1GB;</div><div class='add'>+			maxrate-&gt;tc_maxrate[i] = max_bw_value[i] * MLX5E_1GB_TO_KB;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case MLX5_BW_NO_LIMIT:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -587,32 +596,55 @@ static int mlx5e_dcbnl_ieee_setmaxrate(struct net_device *netdev,</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];</div><div class='ctx'> 	u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];</div><div class='del'>-	__u64 upper_limit_mbps = roundup(255 * MLX5E_100MB, MLX5E_1GB);</div><div class='add'>+	u64 upper_limit_100mbps;</div><div class='add'>+	u64 upper_limit_gbps;</div><div class='ctx'> 	int i;</div><div class='add'>+	struct {</div><div class='add'>+		int scale;</div><div class='add'>+		const char *units_str;</div><div class='add'>+	} units[] = {</div><div class='add'>+		[MLX5_100_MBPS_UNIT] = {</div><div class='add'>+			.scale = 100,</div><div class='add'>+			.units_str = "Mbps",</div><div class='add'>+		},</div><div class='add'>+		[MLX5_GBPS_UNIT] = {</div><div class='add'>+			.scale = 1,</div><div class='add'>+			.units_str = "Gbps",</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	memset(max_bw_value, 0, sizeof(max_bw_value));</div><div class='ctx'> 	memset(max_bw_unit, 0, sizeof(max_bw_unit));</div><div class='add'>+	upper_limit_100mbps = U8_MAX * MLX5E_100MB_TO_KB;</div><div class='add'>+	upper_limit_gbps = U8_MAX * MLX5E_1GB_TO_KB;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt;= mlx5_max_tc(mdev); i++) {</div><div class='ctx'> 		if (!maxrate-&gt;tc_maxrate[i]) {</div><div class='ctx'> 			max_bw_unit[i]  = MLX5_BW_NO_LIMIT;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		if (maxrate-&gt;tc_maxrate[i] &lt; upper_limit_mbps) {</div><div class='add'>+		if (maxrate-&gt;tc_maxrate[i] &lt;= upper_limit_100mbps) {</div><div class='ctx'> 			max_bw_value[i] = div_u64(maxrate-&gt;tc_maxrate[i],</div><div class='del'>-						  MLX5E_100MB);</div><div class='add'>+						  MLX5E_100MB_TO_KB);</div><div class='ctx'> 			max_bw_value[i] = max_bw_value[i] ? max_bw_value[i] : 1;</div><div class='ctx'> 			max_bw_unit[i]  = MLX5_100_MBPS_UNIT;</div><div class='del'>-		} else {</div><div class='add'>+		} else if (maxrate-&gt;tc_maxrate[i] &lt;= upper_limit_gbps) {</div><div class='ctx'> 			max_bw_value[i] = div_u64(maxrate-&gt;tc_maxrate[i],</div><div class='del'>-						  MLX5E_1GB);</div><div class='add'>+						  MLX5E_1GB_TO_KB);</div><div class='ctx'> 			max_bw_unit[i]  = MLX5_GBPS_UNIT;</div><div class='add'>+		} else {</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "tc_%d maxrate %llu Kbps exceeds limit %llu\n",</div><div class='add'>+				   i, maxrate-&gt;tc_maxrate[i],</div><div class='add'>+				   upper_limit_gbps);</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; IEEE_8021QAZ_MAX_TCS; i++) {</div><div class='del'>-		netdev_dbg(netdev, "%s: tc_%d &lt;=&gt; max_bw %d Gbps\n",</div><div class='del'>-			   __func__, i, max_bw_value[i]);</div><div class='add'>+		netdev_dbg(netdev, "%s: tc_%d &lt;=&gt; max_bw %u %s\n", __func__, i,</div><div class='add'>+			   max_bw_value[i] * units[max_bw_unit[i]].scale,</div><div class='add'>+			   units[max_bw_unit[i]].units_str);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return mlx5_modify_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);</div><div class='hunk'>@@ -982,7 +1014,6 @@ static int mlx5e_dcbnl_setbuffer(struct net_device *dev,</div><div class='ctx'> 	if (!changed)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;dcbx.manual_buffer = true;</div><div class='ctx'> 	err = mlx5e_port_manual_buffer_config(priv, changed, dev-&gt;mtu, NULL,</div><div class='ctx'> 					      buffer_size, prio2buffer);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1147,6 +1178,7 @@ static int mlx5e_set_trust_state(struct mlx5e_priv *priv, u8 trust_state)</div><div class='ctx'> 	bool reset = true;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	netdev_lock(priv-&gt;netdev);</div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='ctx'> </div><div class='ctx'> 	new_params = priv-&gt;channels.params;</div><div class='hunk'>@@ -1162,6 +1194,7 @@ static int mlx5e_set_trust_state(struct mlx5e_priv *priv, u8 trust_state)</div><div class='ctx'> 				       &amp;trust_state, reset);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='add'>+	netdev_unlock(priv-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1250,7 +1283,6 @@ void mlx5e_dcbnl_initialize(struct mlx5e_priv *priv)</div><div class='ctx'> 		priv-&gt;dcbx.cap |= DCB_CAP_DCBX_HOST;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;dcbx.port_buff_cell_sz = mlx5e_query_port_buffers_cell_size(priv);</div><div class='del'>-	priv-&gt;dcbx.manual_buffer = false;</div><div class='ctx'> 	priv-&gt;dcbx.cable_len = MLX5E_DEFAULT_CABLE_LEN;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_ets_init(priv);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_dim.c b/drivers/net/ethernet/mellanox/mlx5/core/en_dim.c<br/>index 298bb74ec5e9..d1d629697e28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_dim.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_dim.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_dim.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_dim.c</a></div><div class='hunk'>@@ -113,7 +113,7 @@ int mlx5e_dim_rx_change(struct mlx5e_rq *rq, bool enable)</div><div class='ctx'> 		__set_bit(MLX5E_RQ_STATE_DIM, &amp;rq-&gt;state);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		__clear_bit(MLX5E_RQ_STATE_DIM, &amp;rq-&gt;state);</div><div class='del'>-</div><div class='add'>+		synchronize_net();</div><div class='ctx'> 		mlx5e_dim_disable(rq-&gt;dim);</div><div class='ctx'> 		rq-&gt;dim = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -140,7 +140,7 @@ int mlx5e_dim_tx_change(struct mlx5e_txqsq *sq, bool enable)</div><div class='ctx'> 		__set_bit(MLX5E_SQ_STATE_DIM, &amp;sq-&gt;state);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		__clear_bit(MLX5E_SQ_STATE_DIM, &amp;sq-&gt;state);</div><div class='del'>-</div><div class='add'>+		synchronize_net();</div><div class='ctx'> 		mlx5e_dim_disable(sq-&gt;dim);</div><div class='ctx'> 		sq-&gt;dim = NULL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c<br/>index cae39198b4db..d3fef1e7e2f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/dim.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool_netlink.h&gt;</div><div class='add'>+#include &lt;net/netdev_queues.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "en.h"</div><div class='ctx'> #include "en/channels.h"</div><div class='hunk'>@@ -42,6 +43,8 @@</div><div class='ctx'> #include "lib/clock.h"</div><div class='ctx'> #include "en/fs_ethtool.h"</div><div class='ctx'> </div><div class='add'>+#define LANES_UNKNOWN		 0</div><div class='add'>+</div><div class='ctx'> void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,</div><div class='ctx'> 			       struct ethtool_drvinfo *drvinfo)</div><div class='ctx'> {</div><div class='hunk'>@@ -237,14 +240,38 @@ void mlx5e_build_ptys2ethtool_map(void)</div><div class='ctx'> 				       ETHTOOL_LINK_MODE_800000baseDR8_2_Full_BIT,</div><div class='ctx'> 				       ETHTOOL_LINK_MODE_800000baseSR8_Full_BIT,</div><div class='ctx'> 				       ETHTOOL_LINK_MODE_800000baseVR8_Full_BIT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev,</div><div class='add'>+	MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_1_200GBASE_CR1_KR1, ext,</div><div class='add'>+				       ETHTOOL_LINK_MODE_200000baseCR_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_200000baseKR_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_200000baseDR_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_200000baseDR_2_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_200000baseSR_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_200000baseVR_Full_BIT);</div><div class='add'>+	MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_400GAUI_2_400GBASE_CR2_KR2, ext,</div><div class='add'>+				       ETHTOOL_LINK_MODE_400000baseCR2_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_400000baseKR2_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_400000baseDR2_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_400000baseDR2_2_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_400000baseSR2_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_400000baseVR2_Full_BIT);</div><div class='add'>+	MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_800GAUI_4_800GBASE_CR4_KR4, ext,</div><div class='add'>+				       ETHTOOL_LINK_MODE_800000baseCR4_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_800000baseKR4_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_800000baseDR4_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_800000baseDR4_2_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_800000baseSR4_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_800000baseVR4_Full_BIT);</div><div class='add'>+	MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1600TAUI_8_1600TBASE_CR8_KR8, ext,</div><div class='add'>+				       ETHTOOL_LINK_MODE_1600000baseCR8_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_1600000baseKR8_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_1600000baseDR8_Full_BIT,</div><div class='add'>+				       ETHTOOL_LINK_MODE_1600000baseDR8_2_Full_BIT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_ethtool_get_speed_arr(bool ext,</div><div class='ctx'> 					struct ptys2ethtool_config **arr,</div><div class='ctx'> 					u32 *size)</div><div class='ctx'> {</div><div class='del'>-	bool ext = mlx5_ptys_ext_supported(mdev);</div><div class='del'>-</div><div class='ctx'> 	*arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;</div><div class='ctx'> 	*size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :</div><div class='ctx'> 		      ARRAY_SIZE(ptys2legacy_ethtool_table);</div><div class='hunk'>@@ -344,11 +371,6 @@ void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,</div><div class='ctx'> 	param-&gt;tx_max_pending = 1 &lt;&lt; MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;</div><div class='ctx'> 	param-&gt;rx_pending     = 1 &lt;&lt; priv-&gt;channels.params.log_rq_mtu_frames;</div><div class='ctx'> 	param-&gt;tx_pending     = 1 &lt;&lt; priv-&gt;channels.params.log_sq_size;</div><div class='del'>-</div><div class='del'>-	kernel_param-&gt;tcp_data_split =</div><div class='del'>-		(priv-&gt;channels.params.packet_merge.type == MLX5E_PACKET_MERGE_SHAMPO) ?</div><div class='del'>-		ETHTOOL_TCP_DATA_SPLIT_ENABLED :</div><div class='del'>-		ETHTOOL_TCP_DATA_SPLIT_DISABLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_get_ringparam(struct net_device *dev,</div><div class='hunk'>@@ -361,6 +383,27 @@ static void mlx5e_get_ringparam(struct net_device *dev,</div><div class='ctx'> 	mlx5e_ethtool_get_ringparam(priv, param, kernel_param);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool mlx5e_ethtool_set_tcp_data_split(struct mlx5e_priv *priv,</div><div class='add'>+					     u8 tcp_data_split,</div><div class='add'>+					     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = priv-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	if (tcp_data_split == ETHTOOL_TCP_DATA_SPLIT_ENABLED &amp;&amp;</div><div class='add'>+	    !(dev-&gt;features &amp; NETIF_F_GRO_HW)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "TCP-data-split is not supported when GRO HW is disabled");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Might need to disable HW-GRO if it was kept on due to hds. */</div><div class='add'>+	if (tcp_data_split == ETHTOOL_TCP_DATA_SPLIT_DISABLED &amp;&amp;</div><div class='add'>+	    dev-&gt;cfg-&gt;hds_config == ETHTOOL_TCP_DATA_SPLIT_ENABLED)</div><div class='add'>+		netdev_update_features(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,</div><div class='ctx'> 				struct ethtool_ringparam *param,</div><div class='ctx'> 				struct netlink_ext_ack *extack)</div><div class='hunk'>@@ -419,6 +462,11 @@ static int mlx5e_set_ringparam(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='add'>+	if (!mlx5e_ethtool_set_tcp_data_split(priv,</div><div class='add'>+					      kernel_param-&gt;tcp_data_split,</div><div class='add'>+					      extack))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	return mlx5e_ethtool_set_ringparam(priv, param, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -891,37 +939,19 @@ int mlx5e_set_per_queue_coalesce(struct net_device *dev, u32 queue,</div><div class='ctx'> 	return mlx5e_ethtool_set_per_queue_coalesce(priv, queue, coal);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ptys2ethtool_supported_link(struct mlx5_core_dev *mdev,</div><div class='del'>-					unsigned long *supported_modes,</div><div class='del'>-					u32 eth_proto_cap)</div><div class='del'>-{</div><div class='del'>-	unsigned long proto_cap = eth_proto_cap;</div><div class='del'>-	struct ptys2ethtool_config *table;</div><div class='del'>-	u32 max_size;</div><div class='del'>-	int proto;</div><div class='del'>-</div><div class='del'>-	mlx5e_ethtool_get_speed_arr(mdev, &amp;table, &amp;max_size);</div><div class='del'>-	for_each_set_bit(proto, &amp;proto_cap, max_size)</div><div class='del'>-		bitmap_or(supported_modes, supported_modes,</div><div class='del'>-			  table[proto].supported,</div><div class='del'>-			  __ETHTOOL_LINK_MODE_MASK_NBITS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ptys2ethtool_adver_link(unsigned long *advertising_modes,</div><div class='del'>-				    u32 eth_proto_cap, bool ext)</div><div class='add'>+static void ptys2ethtool_process_link(u32 eth_eproto, bool ext, bool advertised,</div><div class='add'>+				      unsigned long *modes)</div><div class='ctx'> {</div><div class='del'>-	unsigned long proto_cap = eth_proto_cap;</div><div class='add'>+	unsigned long eproto = eth_eproto;</div><div class='ctx'> 	struct ptys2ethtool_config *table;</div><div class='ctx'> 	u32 max_size;</div><div class='ctx'> 	int proto;</div><div class='ctx'> </div><div class='del'>-	table = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;</div><div class='del'>-	max_size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :</div><div class='del'>-			 ARRAY_SIZE(ptys2legacy_ethtool_table);</div><div class='del'>-</div><div class='del'>-	for_each_set_bit(proto, &amp;proto_cap, max_size)</div><div class='del'>-		bitmap_or(advertising_modes, advertising_modes,</div><div class='del'>-			  table[proto].advertised,</div><div class='add'>+	mlx5e_ethtool_get_speed_arr(ext, &amp;table, &amp;max_size);</div><div class='add'>+	for_each_set_bit(proto, &amp;eproto, max_size)</div><div class='add'>+		bitmap_or(modes, modes,</div><div class='add'>+			  advertised ?</div><div class='add'>+			  table[proto].advertised : table[proto].supported,</div><div class='ctx'> 			  __ETHTOOL_LINK_MODE_MASK_NBITS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -931,6 +961,7 @@ static const u32 pplm_fec_2_ethtool[] = {</div><div class='ctx'> 	[MLX5E_FEC_RS_528_514] = ETHTOOL_FEC_RS,</div><div class='ctx'> 	[MLX5E_FEC_RS_544_514] = ETHTOOL_FEC_RS,</div><div class='ctx'> 	[MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_FEC_LLRS,</div><div class='add'>+	[MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD] = ETHTOOL_FEC_RS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size)</div><div class='hunk'>@@ -1074,50 +1105,51 @@ static void ptys2ethtool_supported_advertised_port(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void get_speed_duplex(struct net_device *netdev,</div><div class='del'>-			     u32 eth_proto_oper, bool force_legacy,</div><div class='del'>-			     u16 data_rate_oper,</div><div class='del'>-			     struct ethtool_link_ksettings *link_ksettings)</div><div class='add'>+static void get_link_properties(struct net_device *netdev,</div><div class='add'>+				u32 eth_proto_oper, bool force_legacy,</div><div class='add'>+				u16 data_rate_oper,</div><div class='add'>+				struct ethtool_link_ksettings *link_ksettings)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='del'>-	u32 speed = SPEED_UNKNOWN;</div><div class='add'>+	const struct mlx5_link_info *info;</div><div class='ctx'> 	u8 duplex = DUPLEX_UNKNOWN;</div><div class='add'>+	u32 speed = SPEED_UNKNOWN;</div><div class='add'>+	u32 lanes = LANES_UNKNOWN;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_carrier_ok(netdev))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	speed = mlx5_port_ptys2speed(priv-&gt;mdev, eth_proto_oper, force_legacy);</div><div class='del'>-	if (!speed) {</div><div class='del'>-		if (data_rate_oper)</div><div class='del'>-			speed = 100 * data_rate_oper;</div><div class='del'>-		else</div><div class='del'>-			speed = SPEED_UNKNOWN;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	duplex = DUPLEX_FULL;</div><div class='add'>+	info = mlx5_port_ptys2info(priv-&gt;mdev, eth_proto_oper, force_legacy);</div><div class='add'>+	if (info) {</div><div class='add'>+		speed = info-&gt;speed;</div><div class='add'>+		lanes = info-&gt;lanes;</div><div class='add'>+		duplex = DUPLEX_FULL;</div><div class='add'>+	} else if (data_rate_oper)</div><div class='add'>+		speed = 100 * data_rate_oper;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	link_ksettings-&gt;base.speed = speed;</div><div class='ctx'> 	link_ksettings-&gt;base.duplex = duplex;</div><div class='add'>+	link_ksettings-&gt;base.speed = speed;</div><div class='add'>+	link_ksettings-&gt;lanes = lanes;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void get_supported(struct mlx5_core_dev *mdev, u32 eth_proto_cap,</div><div class='ctx'> 			  struct ethtool_link_ksettings *link_ksettings)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long *supported = link_ksettings-&gt;link_modes.supported;</div><div class='del'>-	ptys2ethtool_supported_link(mdev, supported, eth_proto_cap);</div><div class='add'>+	bool ext = mlx5_ptys_ext_supported(mdev);</div><div class='add'>+</div><div class='add'>+	ptys2ethtool_process_link(eth_proto_cap, ext, false, supported);</div><div class='ctx'> </div><div class='ctx'> 	ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void get_advertising(u32 eth_proto_cap, u8 tx_pause, u8 rx_pause,</div><div class='add'>+static void get_advertising(u32 eth_proto_admin, u8 tx_pause, u8 rx_pause,</div><div class='ctx'> 			    struct ethtool_link_ksettings *link_ksettings,</div><div class='ctx'> 			    bool ext)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long *advertising = link_ksettings-&gt;link_modes.advertising;</div><div class='del'>-	ptys2ethtool_adver_link(advertising, eth_proto_cap, ext);</div><div class='del'>-</div><div class='add'>+	ptys2ethtool_process_link(eth_proto_admin, ext, true, advertising);</div><div class='ctx'> 	if (rx_pause)</div><div class='ctx'> 		ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);</div><div class='ctx'> 	if (tx_pause ^ rx_pause)</div><div class='hunk'>@@ -1173,7 +1205,7 @@ static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp,</div><div class='ctx'> 	unsigned long *lp_advertising = link_ksettings-&gt;link_modes.lp_advertising;</div><div class='ctx'> 	bool ext = mlx5_ptys_ext_supported(mdev);</div><div class='ctx'> </div><div class='del'>-	ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);</div><div class='add'>+	ptys2ethtool_process_link(eth_proto_lp, ext, true, lp_advertising);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,</div><div class='hunk'>@@ -1235,8 +1267,8 @@ static int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,</div><div class='ctx'> 	get_supported(mdev, eth_proto_cap, link_ksettings);</div><div class='ctx'> 	get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,</div><div class='ctx'> 			admin_ext);</div><div class='del'>-	get_speed_duplex(priv-&gt;netdev, eth_proto_oper, !admin_ext,</div><div class='del'>-			 data_rate_oper, link_ksettings);</div><div class='add'>+	get_link_properties(priv-&gt;netdev, eth_proto_oper, !admin_ext,</div><div class='add'>+			    data_rate_oper, link_ksettings);</div><div class='ctx'> </div><div class='ctx'> 	eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;</div><div class='ctx'> 	connector_type = connector_type &lt; MLX5E_CONNECTOR_TYPE_NUMBER ?</div><div class='hunk'>@@ -1341,28 +1373,22 @@ static bool ext_link_mode_requested(const unsigned long *adver)</div><div class='ctx'> 	return bitmap_intersects(modes, adver, __ETHTOOL_LINK_MODE_MASK_NBITS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_supported)</div><div class='del'>-{</div><div class='del'>-	bool ext_link_mode = ext_link_mode_requested(adver);</div><div class='del'>-</div><div class='del'>-	return  autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,</div><div class='ctx'> 					    const struct ethtool_link_ksettings *link_ksettings)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	struct mlx5_port_eth_proto eproto;</div><div class='add'>+	struct mlx5_link_info info = {};</div><div class='ctx'> 	const unsigned long *adver;</div><div class='ctx'> 	bool an_changes = false;</div><div class='ctx'> 	u8 an_disable_admin;</div><div class='ctx'> 	bool ext_supported;</div><div class='add'>+	bool ext_requested;</div><div class='ctx'> 	u8 an_disable_cap;</div><div class='ctx'> 	bool an_disable;</div><div class='ctx'> 	u32 link_modes;</div><div class='ctx'> 	u8 an_status;</div><div class='ctx'> 	u8 autoneg;</div><div class='del'>-	u32 speed;</div><div class='ctx'> 	bool ext;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -1370,13 +1396,15 @@ static int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	adver = link_ksettings-&gt;link_modes.advertising;</div><div class='ctx'> 	autoneg = link_ksettings-&gt;base.autoneg;</div><div class='del'>-	speed = link_ksettings-&gt;base.speed;</div><div class='add'>+	info.speed = link_ksettings-&gt;base.speed;</div><div class='add'>+	info.lanes = link_ksettings-&gt;lanes;</div><div class='ctx'> </div><div class='ctx'> 	ext_supported = mlx5_ptys_ext_supported(mdev);</div><div class='del'>-	ext = ext_requested(autoneg, adver, ext_supported);</div><div class='del'>-	if (!ext_supported &amp;&amp; ext)</div><div class='add'>+	ext_requested = ext_link_mode_requested(adver);</div><div class='add'>+	if (!ext_supported &amp;&amp; ext_requested)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='add'>+	ext = autoneg == AUTONEG_ENABLE ? ext_requested : ext_supported;</div><div class='ctx'> 	ethtool2ptys_adver_func = ext ? mlx5e_ethtool2ptys_ext_adver_link :</div><div class='ctx'> 				  mlx5e_ethtool2ptys_adver_link;</div><div class='ctx'> 	err = mlx5_port_query_eth_proto(mdev, 1, ext, &amp;eproto);</div><div class='hunk'>@@ -1386,7 +1414,7 @@ static int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :</div><div class='del'>-		mlx5_port_speed2linkmodes(mdev, speed, !ext);</div><div class='add'>+		mlx5_port_info2linkmodes(mdev, &amp;info, !ext);</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_speed_validate(priv-&gt;netdev, ext, link_modes, autoneg);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1457,60 +1485,147 @@ static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)</div><div class='ctx'> static int mlx5e_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='del'>-	u32 rss_context = rxfh-&gt;rss_context;</div><div class='del'>-	int err;</div><div class='add'>+	bool symmetric;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='del'>-	err = mlx5e_rx_res_rss_get_rxfh(priv-&gt;rx_res, rss_context,</div><div class='del'>-					rxfh-&gt;indir, rxfh-&gt;key, &amp;rxfh-&gt;hfunc);</div><div class='add'>+	mlx5e_rx_res_rss_get_rxfh(priv-&gt;rx_res, 0, rxfh-&gt;indir, rxfh-&gt;key,</div><div class='add'>+				  &amp;rxfh-&gt;hfunc, &amp;symmetric);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='del'>-	return err;</div><div class='add'>+</div><div class='add'>+	if (symmetric)</div><div class='add'>+		rxfh-&gt;input_xfrm = RXH_XFRM_SYM_OR_XOR;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5e_set_rxfh(struct net_device *dev, struct ethtool_rxfh_param *rxfh,</div><div class='del'>-			  struct netlink_ext_ack *extack)</div><div class='add'>+static int mlx5e_rxfh_hfunc_check(struct mlx5e_priv *priv,</div><div class='add'>+				  const struct ethtool_rxfh_param *rxfh,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 *rss_context = &amp;rxfh-&gt;rss_context;</div><div class='del'>-	u8 hfunc = rxfh-&gt;hfunc;</div><div class='ctx'> 	unsigned int count;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='ctx'> </div><div class='ctx'> 	count = priv-&gt;channels.params.num_channels;</div><div class='ctx'> </div><div class='del'>-	if (hfunc == ETH_RSS_HASH_XOR) {</div><div class='add'>+	if (rxfh-&gt;hfunc == ETH_RSS_HASH_XOR) {</div><div class='ctx'> 		unsigned int xor8_max_channels = mlx5e_rqt_max_num_channels_allowed_for_xor8();</div><div class='ctx'> </div><div class='ctx'> 		if (count &gt; xor8_max_channels) {</div><div class='del'>-			err = -EINVAL;</div><div class='del'>-			netdev_err(priv-&gt;netdev, "%s: Cannot set RSS hash function to XOR, current number of channels (%d) exceeds the maximum allowed for XOR8 RSS hfunc (%d)\n",</div><div class='del'>-				   __func__, count, xor8_max_channels);</div><div class='del'>-			goto unlock;</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(</div><div class='add'>+				extack,</div><div class='add'>+				"Number of channels (%u) exceeds the max for XOR8 RSS (%u)",</div><div class='add'>+				count, xor8_max_channels);</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (*rss_context &amp;&amp; rxfh-&gt;rss_delete) {</div><div class='del'>-		err = mlx5e_rx_res_rss_destroy(priv-&gt;rx_res, *rss_context);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5e_set_rxfh(struct net_device *dev,</div><div class='add'>+			  struct ethtool_rxfh_param *rxfh,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool symmetric = rxfh-&gt;input_xfrm == RXH_XFRM_SYM_OR_XOR;</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='add'>+	u8 hfunc = rxfh-&gt;hfunc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	err = mlx5e_rxfh_hfunc_check(priv, rxfh, extack);</div><div class='add'>+	if (err)</div><div class='ctx'> 		goto unlock;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (*rss_context == ETH_RXFH_CONTEXT_ALLOC) {</div><div class='del'>-		err = mlx5e_rx_res_rss_init(priv-&gt;rx_res, rss_context, count);</div><div class='del'>-		if (err)</div><div class='del'>-			goto unlock;</div><div class='del'>-	}</div><div class='add'>+	err = mlx5e_rx_res_rss_set_rxfh(priv-&gt;rx_res, rxfh-&gt;rss_context,</div><div class='add'>+					rxfh-&gt;indir, rxfh-&gt;key,</div><div class='add'>+					hfunc == ETH_RSS_HASH_NO_CHANGE ? NULL : &amp;hfunc,</div><div class='add'>+					rxfh-&gt;input_xfrm == RXH_XFRM_NO_CHANGE ? NULL : &amp;symmetric);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5e_create_rxfh_context(struct net_device *dev,</div><div class='add'>+				     struct ethtool_rxfh_context *ctx,</div><div class='add'>+				     const struct ethtool_rxfh_param *rxfh,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool symmetric = rxfh-&gt;input_xfrm == RXH_XFRM_SYM_OR_XOR;</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='add'>+	u8 hfunc = rxfh-&gt;hfunc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	err = mlx5e_rxfh_hfunc_check(priv, rxfh, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mlx5e_rx_res_rss_init(priv-&gt;rx_res, rxfh-&gt;rss_context,</div><div class='add'>+				    priv-&gt;channels.params.num_channels);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mlx5e_rx_res_rss_set_rxfh(priv-&gt;rx_res, rxfh-&gt;rss_context,</div><div class='add'>+					rxfh-&gt;indir, rxfh-&gt;key,</div><div class='add'>+					hfunc == ETH_RSS_HASH_NO_CHANGE ? NULL : &amp;hfunc,</div><div class='add'>+					rxfh-&gt;input_xfrm == RXH_XFRM_NO_CHANGE ? NULL : &amp;symmetric);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_rx_res_rss_set_rxfh(priv-&gt;rx_res, *rss_context,</div><div class='add'>+	mlx5e_rx_res_rss_get_rxfh(priv-&gt;rx_res, rxfh-&gt;rss_context,</div><div class='add'>+				  ethtool_rxfh_context_indir(ctx),</div><div class='add'>+				  ethtool_rxfh_context_key(ctx),</div><div class='add'>+				  &amp;ctx-&gt;hfunc, &amp;symmetric);</div><div class='add'>+	if (symmetric)</div><div class='add'>+		ctx-&gt;input_xfrm = RXH_XFRM_SYM_OR_XOR;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5e_modify_rxfh_context(struct net_device *dev,</div><div class='add'>+				     struct ethtool_rxfh_context *ctx,</div><div class='add'>+				     const struct ethtool_rxfh_param *rxfh,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool symmetric = rxfh-&gt;input_xfrm == RXH_XFRM_SYM_OR_XOR;</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='add'>+	u8 hfunc = rxfh-&gt;hfunc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	err = mlx5e_rxfh_hfunc_check(priv, rxfh, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mlx5e_rx_res_rss_set_rxfh(priv-&gt;rx_res, rxfh-&gt;rss_context,</div><div class='ctx'> 					rxfh-&gt;indir, rxfh-&gt;key,</div><div class='del'>-					hfunc == ETH_RSS_HASH_NO_CHANGE ? NULL : &amp;hfunc);</div><div class='add'>+					hfunc == ETH_RSS_HASH_NO_CHANGE ? NULL : &amp;hfunc,</div><div class='add'>+					rxfh-&gt;input_xfrm == RXH_XFRM_NO_CHANGE ? NULL : &amp;symmetric);</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5e_remove_rxfh_context(struct net_device *dev,</div><div class='add'>+				     struct ethtool_rxfh_context *ctx,</div><div class='add'>+				     u32 rss_context,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+	err = mlx5e_rx_res_rss_destroy(priv-&gt;rx_res, rss_context);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC		100</div><div class='ctx'> #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC		8000</div><div class='ctx'> #define MLX5E_PFC_PREVEN_MINOR_PRECENT		85</div><div class='hunk'>@@ -1675,6 +1790,7 @@ int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+				SOF_TIMESTAMPING_TX_SOFTWARE |</div><div class='ctx'> 				SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='ctx'> 				SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='ctx'> </div><div class='hunk'>@@ -1819,11 +1935,12 @@ static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_get_fec_stats(struct net_device *netdev,</div><div class='del'>-				struct ethtool_fec_stats *fec_stats)</div><div class='add'>+				struct ethtool_fec_stats *fec_stats,</div><div class='add'>+				struct ethtool_fec_hist *hist)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	mlx5e_stats_fec_get(priv, fec_stats);</div><div class='add'>+	mlx5e_stats_fec_get(priv, fec_stats, hist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_get_fecparam(struct net_device *netdev,</div><div class='hunk'>@@ -1915,7 +2032,7 @@ static int mlx5e_get_module_info(struct net_device *netdev,</div><div class='ctx'> 	int size_read = 0;</div><div class='ctx'> 	u8 data[4] = {0};</div><div class='ctx'> </div><div class='del'>-	size_read = mlx5_query_module_eeprom(dev, 0, 2, data);</div><div class='add'>+	size_read = mlx5_query_module_eeprom(dev, 0, 2, data, NULL);</div><div class='ctx'> 	if (size_read &lt; 2)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='hunk'>@@ -1957,6 +2074,7 @@ static int mlx5e_get_module_eeprom(struct net_device *netdev,</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	int offset = ee-&gt;offset;</div><div class='ctx'> 	int size_read;</div><div class='add'>+	u8 status = 0;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!ee-&gt;len)</div><div class='hunk'>@@ -1966,15 +2084,15 @@ static int mlx5e_get_module_eeprom(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	while (i &lt; ee-&gt;len) {</div><div class='ctx'> 		size_read = mlx5_query_module_eeprom(mdev, offset, ee-&gt;len - i,</div><div class='del'>-						     data + i);</div><div class='del'>-</div><div class='add'>+						     data + i, &amp;status);</div><div class='ctx'> 		if (!size_read)</div><div class='ctx'> 			/* Done reading */</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='ctx'> 		if (size_read &lt; 0) {</div><div class='del'>-			netdev_err(priv-&gt;netdev, "%s: mlx5_query_eeprom failed:0x%x\n",</div><div class='del'>-				   __func__, size_read);</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "%s: mlx5_query_eeprom failed:0x%x, status %u\n",</div><div class='add'>+				   __func__, size_read, status);</div><div class='ctx'> 			return size_read;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1994,6 +2112,7 @@ static int mlx5e_get_module_eeprom_by_page(struct net_device *netdev,</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	u8 *data = page_data-&gt;data;</div><div class='ctx'> 	int size_read;</div><div class='add'>+	u8 status = 0;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!page_data-&gt;length)</div><div class='hunk'>@@ -2007,20 +2126,19 @@ static int mlx5e_get_module_eeprom_by_page(struct net_device *netdev,</div><div class='ctx'> 	query.page = page_data-&gt;page;</div><div class='ctx'> 	while (i &lt; page_data-&gt;length) {</div><div class='ctx'> 		query.size = page_data-&gt;length - i;</div><div class='del'>-		size_read = mlx5_query_module_eeprom_by_page(mdev, &amp;query, data + i);</div><div class='add'>+		size_read = mlx5_query_module_eeprom_by_page(mdev, &amp;query,</div><div class='add'>+							     data + i, &amp;status);</div><div class='ctx'> </div><div class='ctx'> 		/* Done reading, return how many bytes was read */</div><div class='ctx'> 		if (!size_read)</div><div class='ctx'> 			return i;</div><div class='ctx'> </div><div class='del'>-		if (size_read == -EINVAL)</div><div class='del'>-			return -EINVAL;</div><div class='ctx'> 		if (size_read &lt; 0) {</div><div class='ctx'> 			NL_SET_ERR_MSG_FMT_MOD(</div><div class='ctx'> 				extack,</div><div class='del'>-				"Query module eeprom by page failed, read %u bytes, err %d\n",</div><div class='del'>-				i, size_read);</div><div class='del'>-			return i;</div><div class='add'>+				"Query module eeprom by page failed, read %u bytes, err %d, status %u",</div><div class='add'>+				i, size_read, status);</div><div class='add'>+			return size_read;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		i += size_read;</div><div class='hunk'>@@ -2045,14 +2163,9 @@ int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	dev_hold(dev);</div><div class='del'>-	rtnl_unlock();</div><div class='del'>-</div><div class='ctx'> 	err = mlx5_firmware_flash(mdev, fw, NULL);</div><div class='ctx'> 	release_firmware(fw);</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='del'>-	dev_put(dev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2166,7 +2279,7 @@ static int set_pflag_rx_cqe_compress(struct net_device *netdev,</div><div class='ctx'> 	if (!MLX5_CAP_GEN(mdev, cqe_compression))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	rx_filter = priv-&gt;tstamp.rx_filter != HWTSTAMP_FILTER_NONE;</div><div class='add'>+	rx_filter = priv-&gt;hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE;</div><div class='ctx'> 	err = mlx5e_modify_rx_cqe_compression_locked(priv, enable, rx_filter);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -2181,7 +2294,6 @@ static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	struct mlx5e_params new_params;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		/* Checking the regular RQ here; mlx5e_validate_xsk_param called</div><div class='hunk'>@@ -2202,14 +2314,7 @@ static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)</div><div class='ctx'> 	MLX5E_SET_PFLAG(&amp;new_params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);</div><div class='ctx'> 	mlx5e_set_rq_type(mdev, &amp;new_params);</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_safe_switch_params(priv, &amp;new_params, NULL, NULL, true);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* update XDP supported features */</div><div class='del'>-	mlx5e_set_xdp_feature(netdev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return mlx5e_safe_switch_params(priv, &amp;new_params, NULL, NULL, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)</div><div class='hunk'>@@ -2370,21 +2475,35 @@ static u32 mlx5e_get_priv_flags(struct net_device *netdev)</div><div class='ctx'> 	return priv-&gt;channels.params.pflags;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5e_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 struct ethtool_rxfh_fields *info)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return mlx5e_ethtool_get_rxfh_fields(priv, info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5e_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return mlx5e_ethtool_set_rxfh_fields(priv, cmd, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 mlx5e_get_rx_ring_count(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return priv-&gt;channels.params.num_channels;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='ctx'> 			   u32 *rule_locs)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	/* ETHTOOL_GRXRINGS is needed by ethtool -x which is not part</div><div class='del'>-	 * of rxnfc. We keep this logic out of mlx5e_ethtool_get_rxnfc,</div><div class='del'>-	 * to avoid breaking "ethtool -x" when mlx5e_ethtool_get_rxnfc</div><div class='del'>-	 * is compiled out via CONFIG_MLX5_EN_RXNFC=n.</div><div class='del'>-	 */</div><div class='del'>-	if (info-&gt;cmd == ETHTOOL_GRXRINGS) {</div><div class='del'>-		info-&gt;data = priv-&gt;channels.params.num_channels;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return mlx5e_ethtool_get_rxnfc(priv, info, rule_locs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2607,12 +2726,16 @@ static void mlx5e_get_ts_stats(struct net_device *netdev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct ethtool_ops mlx5e_ethtool_ops = {</div><div class='del'>-	.cap_rss_ctx_supported	= true,</div><div class='add'>+	.cap_link_lanes_supported = true,</div><div class='add'>+	.rxfh_per_ctx_fields	= true,</div><div class='ctx'> 	.rxfh_per_ctx_key	= true,</div><div class='add'>+	.rxfh_max_num_contexts	= MLX5E_MAX_NUM_RSS,</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='ctx'> 				     ETHTOOL_COALESCE_MAX_FRAMES |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_ADAPTIVE |</div><div class='ctx'> 				     ETHTOOL_COALESCE_USE_CQE,</div><div class='add'>+	.supported_input_xfrm = RXH_XFRM_SYM_OR_XOR,</div><div class='add'>+	.supported_ring_params = ETHTOOL_RING_USE_TCP_DATA_SPLIT,</div><div class='ctx'> 	.get_drvinfo       = mlx5e_get_drvinfo,</div><div class='ctx'> 	.get_link          = ethtool_op_get_link,</div><div class='ctx'> 	.get_link_ext_state  = mlx5e_get_link_ext_state,</div><div class='hunk'>@@ -2633,8 +2756,14 @@ const struct ethtool_ops mlx5e_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh          = mlx5e_get_rxfh,</div><div class='ctx'> 	.set_rxfh          = mlx5e_set_rxfh,</div><div class='add'>+	.get_rxfh_fields   = mlx5e_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields   = mlx5e_set_rxfh_fields,</div><div class='add'>+	.create_rxfh_context	= mlx5e_create_rxfh_context,</div><div class='add'>+	.modify_rxfh_context	= mlx5e_modify_rxfh_context,</div><div class='add'>+	.remove_rxfh_context	= mlx5e_remove_rxfh_context,</div><div class='ctx'> 	.get_rxnfc         = mlx5e_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc         = mlx5e_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count = mlx5e_get_rx_ring_count,</div><div class='ctx'> 	.get_tunable       = mlx5e_get_tunable,</div><div class='ctx'> 	.set_tunable       = mlx5e_set_tunable,</div><div class='ctx'> 	.get_pause_stats   = mlx5e_get_pause_stats,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c b/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c<br/>index 05058710d2c7..8928d2dcd43f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_fs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_fs.c</a></div><div class='hunk'>@@ -484,7 +484,9 @@ static int mlx5e_vlan_rx_add_svid(struct mlx5e_flow_steering *fs,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Need to fix some features.. */</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> 	netdev_update_features(netdev);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -521,7 +523,9 @@ int mlx5e_fs_vlan_rx_kill_vid(struct mlx5e_flow_steering *fs,</div><div class='ctx'> 	} else if (be16_to_cpu(proto) == ETH_P_8021AD) {</div><div class='ctx'> 		clear_bit(vid, fs-&gt;vlan-&gt;active_svlans);</div><div class='ctx'> 		mlx5e_fs_del_vlan_rule(fs, MLX5E_VLAN_RULE_TYPE_MATCH_STAG_VID, vid);</div><div class='add'>+		netdev_lock(netdev);</div><div class='ctx'> 		netdev_update_features(netdev);</div><div class='add'>+		netdev_unlock(netdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -776,7 +780,7 @@ static int mlx5e_create_promisc_table(struct mlx5e_flow_steering *fs)</div><div class='ctx'> 	ft_attr.max_fte = MLX5E_PROMISC_TABLE_SIZE;</div><div class='ctx'> 	ft_attr.autogroup.max_num_groups = 1;</div><div class='ctx'> 	ft_attr.level = MLX5E_PROMISC_FT_LEVEL;</div><div class='del'>-	ft_attr.prio = MLX5E_NIC_PRIO;</div><div class='add'>+	ft_attr.prio = MLX5E_PROMISC_PRIO;</div><div class='ctx'> </div><div class='ctx'> 	ft-&gt;t = mlx5_create_auto_grouped_flow_table(fs-&gt;ns, &amp;ft_attr);</div><div class='ctx'> 	if (IS_ERR(ft-&gt;t)) {</div><div class='hunk'>@@ -901,6 +905,9 @@ static void mlx5e_set_inner_ttc_params(struct mlx5e_flow_steering *fs,</div><div class='ctx'> 	ft_attr-&gt;prio = MLX5E_NIC_PRIO;</div><div class='ctx'> </div><div class='ctx'> 	for (tt = 0; tt &lt; MLX5_NUM_TT; tt++) {</div><div class='add'>+		if (mlx5_ttc_is_decrypted_esp_tt(tt))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		ttc_params-&gt;dests[tt].type = MLX5_FLOW_DESTINATION_TYPE_TIR;</div><div class='ctx'> 		ttc_params-&gt;dests[tt].tir_num =</div><div class='ctx'> 			tt == MLX5_TT_ANY ?</div><div class='hunk'>@@ -910,9 +917,17 @@ static void mlx5e_set_inner_ttc_params(struct mlx5e_flow_steering *fs,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool mlx5e_ipsec_rss_supported(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	return MLX5_CAP_NIC_RX_FT_FIELD_SUPPORT_2(mdev, ipsec_next_header) &amp;&amp;</div><div class='add'>+	       MLX5_CAP_NIC_RX_FT_FIELD_SUPPORT_2(mdev, outer_l4_type_ext) &amp;&amp;</div><div class='add'>+	       MLX5_CAP_NIC_RX_FT_FIELD_SUPPORT_2(mdev, inner_l4_type_ext);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5e_set_ttc_params(struct mlx5e_flow_steering *fs,</div><div class='ctx'> 			  struct mlx5e_rx_res *rx_res,</div><div class='del'>-			  struct ttc_params *ttc_params, bool tunnel)</div><div class='add'>+			  struct ttc_params *ttc_params, bool tunnel,</div><div class='add'>+			  bool ipsec_rss)</div><div class='ctx'> </div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_flow_table_attr *ft_attr = &amp;ttc_params-&gt;ft_attr;</div><div class='hunk'>@@ -923,7 +938,13 @@ void mlx5e_set_ttc_params(struct mlx5e_flow_steering *fs,</div><div class='ctx'> 	ft_attr-&gt;level = MLX5E_TTC_FT_LEVEL;</div><div class='ctx'> 	ft_attr-&gt;prio = MLX5E_NIC_PRIO;</div><div class='ctx'> </div><div class='add'>+	ttc_params-&gt;ipsec_rss = ipsec_rss &amp;&amp;</div><div class='add'>+				mlx5e_ipsec_rss_supported(fs-&gt;mdev);</div><div class='add'>+</div><div class='ctx'> 	for (tt = 0; tt &lt; MLX5_NUM_TT; tt++) {</div><div class='add'>+		if (mlx5_ttc_is_decrypted_esp_tt(tt))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		ttc_params-&gt;dests[tt].type = MLX5_FLOW_DESTINATION_TYPE_TIR;</div><div class='ctx'> 		ttc_params-&gt;dests[tt].tir_num =</div><div class='ctx'> 			tt == MLX5_TT_ANY ?</div><div class='hunk'>@@ -1289,7 +1310,7 @@ int mlx5e_create_ttc_table(struct mlx5e_flow_steering *fs,</div><div class='ctx'> {</div><div class='ctx'> 	struct ttc_params ttc_params = {};</div><div class='ctx'> </div><div class='del'>-	mlx5e_set_ttc_params(fs, rx_res, &amp;ttc_params, true);</div><div class='add'>+	mlx5e_set_ttc_params(fs, rx_res, &amp;ttc_params, true, true);</div><div class='ctx'> 	fs-&gt;ttc = mlx5_create_ttc_table(fs-&gt;mdev, &amp;ttc_params);</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(fs-&gt;ttc);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c<br/>index 773624bb2c5d..63bdef5b4ba5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c</a></div><div class='hunk'>@@ -704,7 +704,7 @@ static int validate_flow(struct mlx5e_priv *priv,</div><div class='ctx'> 		num_tuples += ret;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return -ENOTSUPP;</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((fs-&gt;flow_type &amp; FLOW_EXT)) {</div><div class='ctx'> 		ret = validate_vlan(fs);</div><div class='hunk'>@@ -884,25 +884,27 @@ static int flow_type_to_traffic_type(u32 flow_type)</div><div class='ctx'> 	case ESP_V6_FLOW:</div><div class='ctx'> 		return MLX5_TT_IPV6_IPSEC_ESP;</div><div class='ctx'> 	case IPV4_FLOW:</div><div class='add'>+	case IP_USER_FLOW:</div><div class='ctx'> 		return MLX5_TT_IPV4;</div><div class='ctx'> 	case IPV6_FLOW:</div><div class='add'>+	case IPV6_USER_FLOW:</div><div class='ctx'> 		return MLX5_TT_IPV6;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5e_set_rss_hash_opt(struct mlx5e_priv *priv,</div><div class='del'>-				  struct ethtool_rxnfc *nfc)</div><div class='add'>+int mlx5e_ethtool_set_rxfh_fields(struct mlx5e_priv *priv,</div><div class='add'>+				  const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	u8 rx_hash_field = 0;</div><div class='ctx'> 	u32 flow_type = 0;</div><div class='del'>-	u32 rss_idx = 0;</div><div class='add'>+	u32 rss_idx;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int tt;</div><div class='ctx'> </div><div class='del'>-	if (nfc-&gt;flow_type &amp; FLOW_RSS)</div><div class='del'>-		rss_idx = nfc-&gt;rss_context;</div><div class='add'>+	rss_idx = nfc-&gt;rss_context;</div><div class='ctx'> </div><div class='ctx'> 	flow_type = flow_type_mask(nfc-&gt;flow_type);</div><div class='ctx'> 	tt = flow_type_to_traffic_type(flow_type);</div><div class='hunk'>@@ -939,16 +941,15 @@ static int mlx5e_set_rss_hash_opt(struct mlx5e_priv *priv,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5e_get_rss_hash_opt(struct mlx5e_priv *priv,</div><div class='del'>-				  struct ethtool_rxnfc *nfc)</div><div class='add'>+int mlx5e_ethtool_get_rxfh_fields(struct mlx5e_priv *priv,</div><div class='add'>+				  struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='ctx'> 	int hash_field = 0;</div><div class='ctx'> 	u32 flow_type = 0;</div><div class='del'>-	u32 rss_idx = 0;</div><div class='add'>+	u32 rss_idx;</div><div class='ctx'> 	int tt;</div><div class='ctx'> </div><div class='del'>-	if (nfc-&gt;flow_type &amp; FLOW_RSS)</div><div class='del'>-		rss_idx = nfc-&gt;rss_context;</div><div class='add'>+	rss_idx = nfc-&gt;rss_context;</div><div class='ctx'> </div><div class='ctx'> 	flow_type = flow_type_mask(nfc-&gt;flow_type);</div><div class='ctx'> 	tt = flow_type_to_traffic_type(flow_type);</div><div class='hunk'>@@ -984,9 +985,6 @@ int mlx5e_ethtool_set_rxnfc(struct mlx5e_priv *priv, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLDEL:</div><div class='ctx'> 		err = mlx5e_ethtool_flow_remove(priv, cmd-&gt;fs.location);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		err = mlx5e_set_rss_hash_opt(priv, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EOPNOTSUPP;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1011,9 +1009,6 @@ int mlx5e_ethtool_get_rxnfc(struct mlx5e_priv *priv,</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLALL:</div><div class='ctx'> 		err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		err =  mlx5e_get_rss_hash_opt(priv, info);</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		err = -EOPNOTSUPP;</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c<br/>index f37afa52e2b8..6168f0814414 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_main.c</a></div><div class='hunk'>@@ -39,7 +39,9 @@</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/if_bridge.h&gt;</div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/netdev_queues.h&gt;</div><div class='add'>+#include &lt;net/netdev_rx_queue.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/types.h&gt;</div><div class='ctx'> #include &lt;net/pkt_sched.h&gt;</div><div class='ctx'> #include &lt;net/xdp_sock_drv.h&gt;</div><div class='hunk'>@@ -50,6 +52,7 @@</div><div class='ctx'> #include "en_tc.h"</div><div class='ctx'> #include "en_rep.h"</div><div class='ctx'> #include "en_accel/ipsec.h"</div><div class='add'>+#include "en_accel/psp.h"</div><div class='ctx'> #include "en_accel/macsec.h"</div><div class='ctx'> #include "en_accel/en_accel.h"</div><div class='ctx'> #include "en_accel/ktls.h"</div><div class='hunk'>@@ -74,10 +77,12 @@</div><div class='ctx'> #include "en/trap.h"</div><div class='ctx'> #include "lib/devcom.h"</div><div class='ctx'> #include "lib/sd.h"</div><div class='add'>+#include "en/pcie_cong_event.h"</div><div class='ctx'> </div><div class='ctx'> static bool mlx5e_hw_gro_supported(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	if (!MLX5_CAP_GEN(mdev, shampo))</div><div class='add'>+	if (!MLX5_CAP_GEN(mdev, shampo) ||</div><div class='add'>+	    !MLX5_CAP_SHAMPO(mdev, shampo_header_split_data_merge))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* Our HW-GRO implementation relies on "KSM Mkey" for</div><div class='hunk'>@@ -228,13 +233,17 @@ static int mlx5e_devcom_event_mpv(int event, void *my_data, void *event_data)</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_devcom_init_mpv(struct mlx5e_priv *priv, u64 *data)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_devcom_match_attr attr = {</div><div class='add'>+		.key.val = *data,</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;devcom = mlx5_devcom_register_component(priv-&gt;mdev-&gt;priv.devc,</div><div class='ctx'> 						      MLX5_DEVCOM_MPV,</div><div class='del'>-						      *data,</div><div class='add'>+						      &amp;attr,</div><div class='ctx'> 						      mlx5e_devcom_event_mpv,</div><div class='ctx'> 						      priv);</div><div class='del'>-	if (IS_ERR(priv-&gt;devcom))</div><div class='del'>-		return PTR_ERR(priv-&gt;devcom);</div><div class='add'>+	if (!priv-&gt;devcom)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5_core_is_mp_master(priv-&gt;mdev)) {</div><div class='ctx'> 		mlx5_devcom_send_event(priv-&gt;devcom, MPV_DEVCOM_MASTER_UP,</div><div class='hunk'>@@ -247,7 +256,7 @@ static int mlx5e_devcom_init_mpv(struct mlx5e_priv *priv, u64 *data)</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_devcom_cleanup_mpv(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ERR_OR_NULL(priv-&gt;devcom))</div><div class='add'>+	if (!priv-&gt;devcom)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5_core_is_mp_master(priv-&gt;mdev)) {</div><div class='hunk'>@@ -257,6 +266,7 @@ static void mlx5e_devcom_cleanup_mpv(struct mlx5e_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mlx5_devcom_unregister_component(priv-&gt;devcom);</div><div class='add'>+	priv-&gt;devcom = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int blocking_event(struct notifier_block *nb, unsigned long event, void *data)</div><div class='hunk'>@@ -311,8 +321,8 @@ static inline void mlx5e_build_umr_wqe(struct mlx5e_rq *rq,</div><div class='ctx'> 				       struct mlx5e_icosq *sq,</div><div class='ctx'> 				       struct mlx5e_umr_wqe *wqe)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_wqe_ctrl_seg      *cseg = &amp;wqe-&gt;ctrl;</div><div class='del'>-	struct mlx5_wqe_umr_ctrl_seg *ucseg = &amp;wqe-&gt;uctrl;</div><div class='add'>+	struct mlx5_wqe_ctrl_seg      *cseg = &amp;wqe-&gt;hdr.ctrl;</div><div class='add'>+	struct mlx5_wqe_umr_ctrl_seg *ucseg = &amp;wqe-&gt;hdr.uctrl;</div><div class='ctx'> 	u16 octowords;</div><div class='ctx'> 	u8 ds_cnt;</div><div class='ctx'> </div><div class='hunk'>@@ -330,52 +340,6 @@ static inline void mlx5e_build_umr_wqe(struct mlx5e_rq *rq,</div><div class='ctx'> 	ucseg-&gt;mkey_mask     = cpu_to_be64(MLX5_MKEY_MASK_FREE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5e_rq_shampo_hd_alloc(struct mlx5e_rq *rq, int node)</div><div class='del'>-{</div><div class='del'>-	rq-&gt;mpwqe.shampo = kvzalloc_node(sizeof(*rq-&gt;mpwqe.shampo),</div><div class='del'>-					 GFP_KERNEL, node);</div><div class='del'>-	if (!rq-&gt;mpwqe.shampo)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mlx5e_rq_shampo_hd_free(struct mlx5e_rq *rq)</div><div class='del'>-{</div><div class='del'>-	kvfree(rq-&gt;mpwqe.shampo);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mlx5e_rq_shampo_hd_info_alloc(struct mlx5e_rq *rq, int node)</div><div class='del'>-{</div><div class='del'>-	struct mlx5e_shampo_hd *shampo = rq-&gt;mpwqe.shampo;</div><div class='del'>-</div><div class='del'>-	shampo-&gt;bitmap = bitmap_zalloc_node(shampo-&gt;hd_per_wq, GFP_KERNEL,</div><div class='del'>-					    node);</div><div class='del'>-	shampo-&gt;info = kvzalloc_node(array_size(shampo-&gt;hd_per_wq,</div><div class='del'>-						sizeof(*shampo-&gt;info)),</div><div class='del'>-				     GFP_KERNEL, node);</div><div class='del'>-	shampo-&gt;pages = kvzalloc_node(array_size(shampo-&gt;hd_per_wq,</div><div class='del'>-						 sizeof(*shampo-&gt;pages)),</div><div class='del'>-				     GFP_KERNEL, node);</div><div class='del'>-	if (!shampo-&gt;bitmap || !shampo-&gt;info || !shampo-&gt;pages)</div><div class='del'>-		goto err_nomem;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_nomem:</div><div class='del'>-	kvfree(shampo-&gt;info);</div><div class='del'>-	kvfree(shampo-&gt;bitmap);</div><div class='del'>-	kvfree(shampo-&gt;pages);</div><div class='del'>-</div><div class='del'>-	return -ENOMEM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mlx5e_rq_shampo_hd_info_free(struct mlx5e_rq *rq)</div><div class='del'>-{</div><div class='del'>-	kvfree(rq-&gt;mpwqe.shampo-&gt;bitmap);</div><div class='del'>-	kvfree(rq-&gt;mpwqe.shampo-&gt;info);</div><div class='del'>-	kvfree(rq-&gt;mpwqe.shampo-&gt;pages);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mlx5e_rq_alloc_mpwqe_info(struct mlx5e_rq *rq, int node)</div><div class='ctx'> {</div><div class='ctx'> 	int wq_sz = mlx5_wq_ll_get_size(&amp;rq-&gt;mpwqe.wq);</div><div class='hunk'>@@ -398,7 +362,9 @@ static int mlx5e_rq_alloc_mpwqe_info(struct mlx5e_rq *rq, int node)</div><div class='ctx'> 		bitmap_fill(wi-&gt;skip_release_bitmap, rq-&gt;mpwqe.pages_per_wqe);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx5e_build_umr_wqe(rq, rq-&gt;icosq, &amp;rq-&gt;mpwqe.umr_wqe);</div><div class='add'>+	mlx5e_build_umr_wqe(rq, rq-&gt;icosq,</div><div class='add'>+			    container_of(&amp;rq-&gt;mpwqe.umr_wqe,</div><div class='add'>+					 struct mlx5e_umr_wqe, hdr));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -586,19 +552,26 @@ static int mlx5e_create_rq_umr_mkey(struct mlx5_core_dev *mdev, struct mlx5e_rq</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_create_rq_hd_umr_mkey(struct mlx5_core_dev *mdev,</div><div class='del'>-				       struct mlx5e_rq *rq)</div><div class='add'>+				       u16 hd_per_wq, __be32 *umr_mkey)</div><div class='ctx'> {</div><div class='ctx'> 	u32 max_ksm_size = BIT(MLX5_CAP_GEN(mdev, log_max_klm_list_size));</div><div class='add'>+	u32 mkey;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	if (max_ksm_size &lt; rq-&gt;mpwqe.shampo-&gt;hd_per_wq) {</div><div class='add'>+	if (max_ksm_size &lt; hd_per_wq) {</div><div class='ctx'> 		mlx5_core_err(mdev, "max ksm list size 0x%x is smaller than shampo header buffer list size 0x%x\n",</div><div class='del'>-			      max_ksm_size, rq-&gt;mpwqe.shampo-&gt;hd_per_wq);</div><div class='add'>+			      max_ksm_size, hd_per_wq);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return mlx5e_create_umr_ksm_mkey(mdev, rq-&gt;mpwqe.shampo-&gt;hd_per_wq,</div><div class='del'>-					 MLX5E_SHAMPO_LOG_HEADER_ENTRY_SIZE,</div><div class='del'>-					 &amp;rq-&gt;mpwqe.shampo-&gt;mkey);</div><div class='add'>+	err = mlx5e_create_umr_ksm_mkey(mdev, hd_per_wq,</div><div class='add'>+					MLX5E_SHAMPO_LOG_HEADER_ENTRY_SIZE,</div><div class='add'>+					&amp;mkey);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*umr_mkey = cpu_to_be32(mkey);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_init_frags_partition(struct mlx5e_rq *rq)</div><div class='hunk'>@@ -709,6 +682,27 @@ static void mlx5e_rq_err_cqe_work(struct work_struct *recover_work)</div><div class='ctx'> 	mlx5e_reporter_rq_cqe_err(rq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mlx5e_rq_timeout_work(struct work_struct *timeout_work)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_rq *rq = container_of(timeout_work,</div><div class='add'>+					   struct mlx5e_rq,</div><div class='add'>+					   rx_timeout_work);</div><div class='add'>+</div><div class='add'>+	/* Acquire netdev instance lock to synchronize with channel close and</div><div class='add'>+	 * reopen flows. Either successfully obtain the lock, or detect that</div><div class='add'>+	 * channels are closing for another reason, making this work no longer</div><div class='add'>+	 * necessary.</div><div class='add'>+	 */</div><div class='add'>+	while (!netdev_trylock(rq-&gt;netdev)) {</div><div class='add'>+		if (!test_bit(MLX5E_STATE_CHANNELS_ACTIVE, &amp;rq-&gt;priv-&gt;state))</div><div class='add'>+			return;</div><div class='add'>+		msleep(20);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5e_reporter_rx_timeout(rq);</div><div class='add'>+	netdev_unlock(rq-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5e_alloc_mpwqe_rq_drop_page(struct mlx5e_rq *rq)</div><div class='ctx'> {</div><div class='ctx'> 	rq-&gt;wqe_overflow.page = alloc_page(GFP_KERNEL);</div><div class='hunk'>@@ -741,8 +735,8 @@ static int mlx5e_init_rxq_rq(struct mlx5e_channel *c, struct mlx5e_params *param</div><div class='ctx'> 	rq-&gt;pdev         = c-&gt;pdev;</div><div class='ctx'> 	rq-&gt;netdev       = c-&gt;netdev;</div><div class='ctx'> 	rq-&gt;priv         = c-&gt;priv;</div><div class='del'>-	rq-&gt;tstamp       = c-&gt;tstamp;</div><div class='del'>-	rq-&gt;clock        = &amp;mdev-&gt;clock;</div><div class='add'>+	rq-&gt;hwtstamp_config = &amp;c-&gt;priv-&gt;hwtstamp_config;</div><div class='add'>+	rq-&gt;clock        = mdev-&gt;clock;</div><div class='ctx'> 	rq-&gt;icosq        = &amp;c-&gt;icosq;</div><div class='ctx'> 	rq-&gt;ix           = c-&gt;ix;</div><div class='ctx'> 	rq-&gt;channel      = c;</div><div class='hunk'>@@ -760,6 +754,35 @@ static int mlx5e_init_rxq_rq(struct mlx5e_channel *c, struct mlx5e_params *param</div><div class='ctx'> 				  xdp_frag_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5e_rq_shampo_hd_info_alloc(struct mlx5e_rq *rq, u16 hd_per_wq,</div><div class='add'>+					 int node)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_shampo_hd *shampo = rq-&gt;mpwqe.shampo;</div><div class='add'>+</div><div class='add'>+	shampo-&gt;hd_per_wq = hd_per_wq;</div><div class='add'>+</div><div class='add'>+	shampo-&gt;bitmap = bitmap_zalloc_node(hd_per_wq, GFP_KERNEL, node);</div><div class='add'>+	shampo-&gt;pages = kvzalloc_node(array_size(hd_per_wq,</div><div class='add'>+						 sizeof(*shampo-&gt;pages)),</div><div class='add'>+				      GFP_KERNEL, node);</div><div class='add'>+	if (!shampo-&gt;bitmap || !shampo-&gt;pages)</div><div class='add'>+		goto err_nomem;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_nomem:</div><div class='add'>+	kvfree(shampo-&gt;pages);</div><div class='add'>+	bitmap_free(shampo-&gt;bitmap);</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_rq_shampo_hd_info_free(struct mlx5e_rq *rq)</div><div class='add'>+{</div><div class='add'>+	kvfree(rq-&gt;mpwqe.shampo-&gt;pages);</div><div class='add'>+	bitmap_free(rq-&gt;mpwqe.shampo-&gt;bitmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5_rq_shampo_alloc(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				struct mlx5e_params *params,</div><div class='ctx'> 				struct mlx5e_rq_param *rqp,</div><div class='hunk'>@@ -768,43 +791,93 @@ static int mlx5_rq_shampo_alloc(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				int node)</div><div class='ctx'> {</div><div class='ctx'> 	void *wqc = MLX5_ADDR_OF(rqc, rqp-&gt;rqc, wq);</div><div class='add'>+	u8 log_hd_per_page, log_hd_entry_size;</div><div class='add'>+	u16 hd_per_wq, hd_per_wqe;</div><div class='add'>+	u32 hd_pool_size;</div><div class='ctx'> 	int wq_size;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(MLX5E_RQ_STATE_SHAMPO, &amp;rq-&gt;state))</div><div class='ctx'> 		return 0;</div><div class='del'>-	err = mlx5e_rq_shampo_hd_alloc(rq, node);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-	rq-&gt;mpwqe.shampo-&gt;hd_per_wq =</div><div class='del'>-		mlx5e_shampo_hd_per_wq(mdev, params, rqp);</div><div class='del'>-	err = mlx5e_create_rq_hd_umr_mkey(mdev, rq);</div><div class='add'>+</div><div class='add'>+	rq-&gt;mpwqe.shampo = kvzalloc_node(sizeof(*rq-&gt;mpwqe.shampo),</div><div class='add'>+					 GFP_KERNEL, node);</div><div class='add'>+	if (!rq-&gt;mpwqe.shampo)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* split headers data structures */</div><div class='add'>+	hd_per_wq = mlx5e_shampo_hd_per_wq(mdev, params, rqp);</div><div class='add'>+	err = mlx5e_rq_shampo_hd_info_alloc(rq, hd_per_wq, node);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_shampo_hd;</div><div class='del'>-	err = mlx5e_rq_shampo_hd_info_alloc(rq, node);</div><div class='add'>+		goto err_shampo_hd_info_alloc;</div><div class='add'>+</div><div class='add'>+	err = mlx5e_create_rq_hd_umr_mkey(mdev, hd_per_wq,</div><div class='add'>+					  &amp;rq-&gt;mpwqe.shampo-&gt;mkey_be);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_shampo_info;</div><div class='add'>+		goto err_umr_mkey;</div><div class='add'>+</div><div class='add'>+	hd_per_wqe = mlx5e_shampo_hd_per_wqe(mdev, params, rqp);</div><div class='add'>+	wq_size = BIT(MLX5_GET(wq, wqc, log_wq_sz));</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(MLX5E_SHAMPO_LOG_MAX_HEADER_ENTRY_SIZE &gt; PAGE_SHIFT);</div><div class='add'>+	if (hd_per_wqe &gt;= MLX5E_SHAMPO_WQ_HEADER_PER_PAGE) {</div><div class='add'>+		log_hd_per_page = MLX5E_SHAMPO_LOG_WQ_HEADER_PER_PAGE;</div><div class='add'>+		log_hd_entry_size = MLX5E_SHAMPO_LOG_MAX_HEADER_ENTRY_SIZE;</div><div class='add'>+	} else {</div><div class='add'>+		log_hd_per_page = order_base_2(hd_per_wqe);</div><div class='add'>+		log_hd_entry_size = order_base_2(PAGE_SIZE / hd_per_wqe);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rq-&gt;mpwqe.shampo-&gt;hd_per_wqe = hd_per_wqe;</div><div class='add'>+	rq-&gt;mpwqe.shampo-&gt;hd_per_page = BIT(log_hd_per_page);</div><div class='add'>+	rq-&gt;mpwqe.shampo-&gt;log_hd_per_page = log_hd_per_page;</div><div class='add'>+	rq-&gt;mpwqe.shampo-&gt;log_hd_entry_size = log_hd_entry_size;</div><div class='add'>+</div><div class='add'>+	hd_pool_size = (hd_per_wqe * wq_size) &gt;&gt; log_hd_per_page;</div><div class='add'>+</div><div class='add'>+	if (netif_rxq_has_unreadable_mp(rq-&gt;netdev, rq-&gt;ix)) {</div><div class='add'>+		/* Separate page pool for shampo headers */</div><div class='add'>+		struct page_pool_params pp_params = { };</div><div class='add'>+</div><div class='add'>+		pp_params.order     = 0;</div><div class='add'>+		pp_params.flags     = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;</div><div class='add'>+		pp_params.pool_size = hd_pool_size;</div><div class='add'>+		pp_params.nid       = node;</div><div class='add'>+		pp_params.dev       = rq-&gt;pdev;</div><div class='add'>+		pp_params.napi      = rq-&gt;cq.napi;</div><div class='add'>+		pp_params.netdev    = rq-&gt;netdev;</div><div class='add'>+		pp_params.dma_dir   = rq-&gt;buff.map_dir;</div><div class='add'>+		pp_params.max_len   = PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+		rq-&gt;hd_page_pool = page_pool_create(&amp;pp_params);</div><div class='add'>+		if (IS_ERR(rq-&gt;hd_page_pool)) {</div><div class='add'>+			err = PTR_ERR(rq-&gt;hd_page_pool);</div><div class='add'>+			rq-&gt;hd_page_pool = NULL;</div><div class='add'>+			goto err_hds_page_pool;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* Common page pool, reserve space for headers. */</div><div class='add'>+		*pool_size += hd_pool_size;</div><div class='add'>+		rq-&gt;hd_page_pool = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* gro only data structures */</div><div class='ctx'> 	rq-&gt;hw_gro_data = kvzalloc_node(sizeof(*rq-&gt;hw_gro_data), GFP_KERNEL, node);</div><div class='ctx'> 	if (!rq-&gt;hw_gro_data) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_hw_gro_data;</div><div class='ctx'> 	}</div><div class='del'>-	rq-&gt;mpwqe.shampo-&gt;key =</div><div class='del'>-		cpu_to_be32(rq-&gt;mpwqe.shampo-&gt;mkey);</div><div class='del'>-	rq-&gt;mpwqe.shampo-&gt;hd_per_wqe =</div><div class='del'>-		mlx5e_shampo_hd_per_wqe(mdev, params, rqp);</div><div class='del'>-	wq_size = BIT(MLX5_GET(wq, wqc, log_wq_sz));</div><div class='del'>-	*pool_size += (rq-&gt;mpwqe.shampo-&gt;hd_per_wqe * wq_size) /</div><div class='del'>-		     MLX5E_SHAMPO_WQ_HEADER_PER_PAGE;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_hw_gro_data:</div><div class='add'>+	page_pool_destroy(rq-&gt;hd_page_pool);</div><div class='add'>+err_hds_page_pool:</div><div class='add'>+	mlx5_core_destroy_mkey(mdev, be32_to_cpu(rq-&gt;mpwqe.shampo-&gt;mkey_be));</div><div class='add'>+err_umr_mkey:</div><div class='ctx'> 	mlx5e_rq_shampo_hd_info_free(rq);</div><div class='del'>-err_shampo_info:</div><div class='del'>-	mlx5_core_destroy_mkey(mdev, rq-&gt;mpwqe.shampo-&gt;mkey);</div><div class='del'>-err_shampo_hd:</div><div class='del'>-	mlx5e_rq_shampo_hd_free(rq);</div><div class='del'>-out:</div><div class='add'>+err_shampo_hd_info_alloc:</div><div class='add'>+	kvfree(rq-&gt;mpwqe.shampo);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -814,9 +887,12 @@ static void mlx5e_rq_free_shampo(struct mlx5e_rq *rq)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	kvfree(rq-&gt;hw_gro_data);</div><div class='add'>+	if (rq-&gt;hd_page_pool != rq-&gt;page_pool)</div><div class='add'>+		page_pool_destroy(rq-&gt;hd_page_pool);</div><div class='ctx'> 	mlx5e_rq_shampo_hd_info_free(rq);</div><div class='del'>-	mlx5_core_destroy_mkey(rq-&gt;mdev, rq-&gt;mpwqe.shampo-&gt;mkey);</div><div class='del'>-	mlx5e_rq_shampo_hd_free(rq);</div><div class='add'>+	mlx5_core_destroy_mkey(rq-&gt;mdev,</div><div class='add'>+			       be32_to_cpu(rq-&gt;mpwqe.shampo-&gt;mkey_be));</div><div class='add'>+	kvfree(rq-&gt;mpwqe.shampo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_alloc_rq(struct mlx5e_params *params,</div><div class='hunk'>@@ -834,6 +910,7 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params,</div><div class='ctx'> </div><div class='ctx'> 	rqp-&gt;wq.db_numa_node = node;</div><div class='ctx'> 	INIT_WORK(&amp;rq-&gt;recover_work, mlx5e_rq_err_cqe_work);</div><div class='add'>+	INIT_WORK(&amp;rq-&gt;rx_timeout_work, mlx5e_rq_timeout_work);</div><div class='ctx'> </div><div class='ctx'> 	if (params-&gt;xdp_prog)</div><div class='ctx'> 		bpf_prog_inc(params-&gt;xdp_prog);</div><div class='hunk'>@@ -919,6 +996,8 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params,</div><div class='ctx'> 	if (xsk) {</div><div class='ctx'> 		err = xdp_rxq_info_reg_mem_model(&amp;rq-&gt;xdp_rxq,</div><div class='ctx'> 						 MEM_TYPE_XSK_BUFF_POOL, NULL);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_free_by_rq_type;</div><div class='ctx'> 		xsk_pool_set_rxq_info(rq-&gt;xsk_pool, &amp;rq-&gt;xdp_rxq);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Create a page_pool and register it with rxq */</div><div class='hunk'>@@ -933,6 +1012,11 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params,</div><div class='ctx'> 		pp_params.netdev    = rq-&gt;netdev;</div><div class='ctx'> 		pp_params.dma_dir   = rq-&gt;buff.map_dir;</div><div class='ctx'> 		pp_params.max_len   = PAGE_SIZE;</div><div class='add'>+		pp_params.queue_idx = rq-&gt;ix;</div><div class='add'>+</div><div class='add'>+		/* Shampo header data split allow for unreadable netmem */</div><div class='add'>+		if (test_bit(MLX5E_RQ_STATE_SHAMPO, &amp;rq-&gt;state))</div><div class='add'>+			pp_params.flags |= PP_FLAG_ALLOW_UNREADABLE_NETMEM;</div><div class='ctx'> </div><div class='ctx'> 		/* page_pool can be used even when there is no rq-&gt;xdp_prog,</div><div class='ctx'> 		 * given page_pool does not handle DMA mapping there is no</div><div class='hunk'>@@ -945,12 +1029,15 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params,</div><div class='ctx'> 			rq-&gt;page_pool = NULL;</div><div class='ctx'> 			goto err_free_by_rq_type;</div><div class='ctx'> 		}</div><div class='del'>-		if (xdp_rxq_info_is_reg(&amp;rq-&gt;xdp_rxq))</div><div class='add'>+		if (!rq-&gt;hd_page_pool)</div><div class='add'>+			rq-&gt;hd_page_pool = rq-&gt;page_pool;</div><div class='add'>+		if (xdp_rxq_info_is_reg(&amp;rq-&gt;xdp_rxq)) {</div><div class='ctx'> 			err = xdp_rxq_info_reg_mem_model(&amp;rq-&gt;xdp_rxq,</div><div class='ctx'> 							 MEM_TYPE_PAGE_POOL, rq-&gt;page_pool);</div><div class='add'>+			if (err)</div><div class='add'>+				goto err_destroy_page_pool;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_destroy_page_pool;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; wq_sz; i++) {</div><div class='ctx'> 		if (rq-&gt;wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ) {</div><div class='hunk'>@@ -1078,7 +1165,8 @@ int mlx5e_create_rq(struct mlx5e_rq *rq, struct mlx5e_rq_param *param, u16 q_cou</div><div class='ctx'> 	if (test_bit(MLX5E_RQ_STATE_SHAMPO, &amp;rq-&gt;state)) {</div><div class='ctx'> 		MLX5_SET(wq, wq, log_headers_buffer_entry_num,</div><div class='ctx'> 			 order_base_2(rq-&gt;mpwqe.shampo-&gt;hd_per_wq));</div><div class='del'>-		MLX5_SET(wq, wq, headers_mkey, rq-&gt;mpwqe.shampo-&gt;mkey);</div><div class='add'>+		MLX5_SET(wq, wq, headers_mkey,</div><div class='add'>+			 be32_to_cpu(rq-&gt;mpwqe.shampo-&gt;mkey_be));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mlx5_fill_page_frag_array(&amp;rq-&gt;wq_ctrl.buf,</div><div class='hunk'>@@ -1208,7 +1296,8 @@ int mlx5e_wait_for_min_rx_wqes(struct mlx5e_rq *rq, int wait_time)</div><div class='ctx'> 	netdev_warn(rq-&gt;netdev, "Failed to get min RX wqes on Channel[%d] RQN[0x%x] wq cur_sz(%d) min_rx_wqes(%d)\n",</div><div class='ctx'> 		    rq-&gt;ix, rq-&gt;rqn, mlx5e_rqwq_get_cur_sz(rq), min_wqes);</div><div class='ctx'> </div><div class='del'>-	mlx5e_reporter_rx_timeout(rq);</div><div class='add'>+	queue_work(rq-&gt;priv-&gt;wq, &amp;rq-&gt;rx_timeout_work);</div><div class='add'>+</div><div class='ctx'> 	return -ETIMEDOUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1379,6 +1468,7 @@ void mlx5e_close_rq(struct mlx5e_rq *rq)</div><div class='ctx'> 	if (rq-&gt;dim)</div><div class='ctx'> 		cancel_work_sync(&amp;rq-&gt;dim-&gt;work);</div><div class='ctx'> 	cancel_work_sync(&amp;rq-&gt;recover_work);</div><div class='add'>+	cancel_work_sync(&amp;rq-&gt;rx_timeout_work);</div><div class='ctx'> 	mlx5e_destroy_rq(rq);</div><div class='ctx'> 	mlx5e_free_rx_descs(rq);</div><div class='ctx'> 	mlx5e_free_rq(rq);</div><div class='hunk'>@@ -1459,7 +1549,7 @@ static int mlx5e_alloc_xdpsq(struct mlx5e_channel *c,</div><div class='ctx'> 	sq-&gt;pdev      = c-&gt;pdev;</div><div class='ctx'> 	sq-&gt;mkey_be   = c-&gt;mkey_be;</div><div class='ctx'> 	sq-&gt;channel   = c;</div><div class='del'>-	sq-&gt;uar_map   = mdev-&gt;mlx5e_res.hw_objs.bfreg.map;</div><div class='add'>+	sq-&gt;uar_map   = c-&gt;bfreg-&gt;map;</div><div class='ctx'> 	sq-&gt;min_inline_mode = params-&gt;tx_min_inline_mode;</div><div class='ctx'> 	sq-&gt;hw_mtu    = MLX5E_SW2HW_MTU(params, params-&gt;sw_mtu) - ETH_FCS_LEN;</div><div class='ctx'> 	sq-&gt;xsk_pool  = xsk_pool;</div><div class='hunk'>@@ -1544,7 +1634,7 @@ static int mlx5e_alloc_icosq(struct mlx5e_channel *c,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	sq-&gt;channel   = c;</div><div class='del'>-	sq-&gt;uar_map   = mdev-&gt;mlx5e_res.hw_objs.bfreg.map;</div><div class='add'>+	sq-&gt;uar_map   = c-&gt;bfreg-&gt;map;</div><div class='ctx'> 	sq-&gt;reserved_room = param-&gt;stop_room;</div><div class='ctx'> </div><div class='ctx'> 	param-&gt;wq.db_numa_node = cpu_to_node(c-&gt;cpu);</div><div class='hunk'>@@ -1621,7 +1711,7 @@ static int mlx5e_alloc_txqsq(struct mlx5e_channel *c,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	sq-&gt;pdev      = c-&gt;pdev;</div><div class='del'>-	sq-&gt;clock     = &amp;mdev-&gt;clock;</div><div class='add'>+	sq-&gt;clock     = mdev-&gt;clock;</div><div class='ctx'> 	sq-&gt;mkey_be   = c-&gt;mkey_be;</div><div class='ctx'> 	sq-&gt;netdev    = c-&gt;netdev;</div><div class='ctx'> 	sq-&gt;mdev      = c-&gt;mdev;</div><div class='hunk'>@@ -1629,13 +1719,11 @@ static int mlx5e_alloc_txqsq(struct mlx5e_channel *c,</div><div class='ctx'> 	sq-&gt;priv      = c-&gt;priv;</div><div class='ctx'> 	sq-&gt;ch_ix     = c-&gt;ix;</div><div class='ctx'> 	sq-&gt;txq_ix    = txq_ix;</div><div class='del'>-	sq-&gt;uar_map   = mdev-&gt;mlx5e_res.hw_objs.bfreg.map;</div><div class='add'>+	sq-&gt;uar_map   = c-&gt;bfreg-&gt;map;</div><div class='ctx'> 	sq-&gt;min_inline_mode = params-&gt;tx_min_inline_mode;</div><div class='ctx'> 	sq-&gt;hw_mtu    = MLX5E_SW2HW_MTU(params, params-&gt;sw_mtu);</div><div class='ctx'> 	sq-&gt;max_sq_mpw_wqebbs = mlx5e_get_max_sq_aligned_wqebbs(mdev);</div><div class='ctx'> 	INIT_WORK(&amp;sq-&gt;recover_work, mlx5e_tx_err_cqe_work);</div><div class='del'>-	if (!MLX5_CAP_ETH(mdev, wqe_vlan_insert))</div><div class='del'>-		set_bit(MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE, &amp;sq-&gt;state);</div><div class='ctx'> 	if (mlx5_ipsec_device_caps(c-&gt;priv-&gt;mdev))</div><div class='ctx'> 		set_bit(MLX5E_SQ_STATE_IPSEC, &amp;sq-&gt;state);</div><div class='ctx'> 	if (param-&gt;is_mpw)</div><div class='hunk'>@@ -1707,7 +1795,7 @@ static int mlx5e_create_sq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	MLX5_SET(sqc,  sqc, flush_in_error_en, 1);</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(wq,   wq, wq_type,       MLX5_WQ_TYPE_CYCLIC);</div><div class='del'>-	MLX5_SET(wq,   wq, uar_page,      mdev-&gt;mlx5e_res.hw_objs.bfreg.index);</div><div class='add'>+	MLX5_SET(wq,   wq, uar_page,      csp-&gt;uar_page);</div><div class='ctx'> 	MLX5_SET(wq,   wq, log_wq_pg_sz,  csp-&gt;wq_ctrl-&gt;buf.page_shift -</div><div class='ctx'> 					  MLX5_ADAPTER_PAGE_SHIFT);</div><div class='ctx'> 	MLX5_SET64(wq, wq, dbr_addr,      csp-&gt;wq_ctrl-&gt;db.dma);</div><div class='hunk'>@@ -1811,6 +1899,7 @@ int mlx5e_open_txqsq(struct mlx5e_channel *c, u32 tisn, int txq_ix,</div><div class='ctx'> 	csp.cqn             = sq-&gt;cq.mcq.cqn;</div><div class='ctx'> 	csp.wq_ctrl         = &amp;sq-&gt;wq_ctrl;</div><div class='ctx'> 	csp.min_inline_mode = sq-&gt;min_inline_mode;</div><div class='add'>+	csp.uar_page        = c-&gt;bfreg-&gt;index;</div><div class='ctx'> 	err = mlx5e_create_sq_rdy(c-&gt;mdev, param, &amp;csp, qos_queue_group_id, &amp;sq-&gt;sqn);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_txqsq;</div><div class='hunk'>@@ -1908,7 +1997,20 @@ void mlx5e_tx_err_cqe_work(struct work_struct *recover_work)</div><div class='ctx'> 	struct mlx5e_txqsq *sq = container_of(recover_work, struct mlx5e_txqsq,</div><div class='ctx'> 					      recover_work);</div><div class='ctx'> </div><div class='add'>+	/* Recovering queues means re-enabling NAPI, which requires the netdev</div><div class='add'>+	 * instance lock. However, SQ closing flows have to wait for work tasks</div><div class='add'>+	 * to finish while also holding the netdev instance lock. So either get</div><div class='add'>+	 * the lock or find that the SQ is no longer enabled and thus this work</div><div class='add'>+	 * is not relevant anymore.</div><div class='add'>+	 */</div><div class='add'>+	while (!netdev_trylock(sq-&gt;netdev)) {</div><div class='add'>+		if (!test_bit(MLX5E_SQ_STATE_ENABLED, &amp;sq-&gt;state))</div><div class='add'>+			return;</div><div class='add'>+		msleep(20);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mlx5e_reporter_tx_err_cqe(sq);</div><div class='add'>+	netdev_unlock(sq-&gt;netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct dim_cq_moder mlx5e_get_def_tx_moderation(u8 cq_period_mode)</div><div class='hunk'>@@ -1968,6 +2070,7 @@ static int mlx5e_open_icosq(struct mlx5e_channel *c, struct mlx5e_params *params</div><div class='ctx'> 	csp.cqn             = sq-&gt;cq.mcq.cqn;</div><div class='ctx'> 	csp.wq_ctrl         = &amp;sq-&gt;wq_ctrl;</div><div class='ctx'> 	csp.min_inline_mode = params-&gt;tx_min_inline_mode;</div><div class='add'>+	csp.uar_page        = c-&gt;bfreg-&gt;index;</div><div class='ctx'> 	err = mlx5e_create_sq_rdy(c-&gt;mdev, param, &amp;csp, 0, &amp;sq-&gt;sqn);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_icosq;</div><div class='hunk'>@@ -2028,43 +2131,15 @@ int mlx5e_open_xdpsq(struct mlx5e_channel *c, struct mlx5e_params *params,</div><div class='ctx'> 	csp.cqn             = sq-&gt;cq.mcq.cqn;</div><div class='ctx'> 	csp.wq_ctrl         = &amp;sq-&gt;wq_ctrl;</div><div class='ctx'> 	csp.min_inline_mode = sq-&gt;min_inline_mode;</div><div class='add'>+	csp.uar_page        = c-&gt;bfreg-&gt;index;</div><div class='ctx'> 	set_bit(MLX5E_SQ_STATE_ENABLED, &amp;sq-&gt;state);</div><div class='ctx'> </div><div class='del'>-	if (param-&gt;is_xdp_mb)</div><div class='del'>-		set_bit(MLX5E_SQ_STATE_XDP_MULTIBUF, &amp;sq-&gt;state);</div><div class='del'>-</div><div class='ctx'> 	err = mlx5e_create_sq_rdy(c-&gt;mdev, param, &amp;csp, 0, &amp;sq-&gt;sqn);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_xdpsq;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_set_xmit_fp(sq, param-&gt;is_mpw);</div><div class='ctx'> </div><div class='del'>-	if (!param-&gt;is_mpw &amp;&amp; !test_bit(MLX5E_SQ_STATE_XDP_MULTIBUF, &amp;sq-&gt;state)) {</div><div class='del'>-		unsigned int ds_cnt = MLX5E_TX_WQE_EMPTY_DS_COUNT + 1;</div><div class='del'>-		unsigned int inline_hdr_sz = 0;</div><div class='del'>-		int i;</div><div class='del'>-</div><div class='del'>-		if (sq-&gt;min_inline_mode != MLX5_INLINE_MODE_NONE) {</div><div class='del'>-			inline_hdr_sz = MLX5E_XDP_MIN_INLINE;</div><div class='del'>-			ds_cnt++;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Pre initialize fixed WQE fields */</div><div class='del'>-		for (i = 0; i &lt; mlx5_wq_cyc_get_size(&amp;sq-&gt;wq); i++) {</div><div class='del'>-			struct mlx5e_tx_wqe      *wqe  = mlx5_wq_cyc_get_wqe(&amp;sq-&gt;wq, i);</div><div class='del'>-			struct mlx5_wqe_ctrl_seg *cseg = &amp;wqe-&gt;ctrl;</div><div class='del'>-			struct mlx5_wqe_eth_seg  *eseg = &amp;wqe-&gt;eth;</div><div class='del'>-</div><div class='del'>-			sq-&gt;db.wqe_info[i] = (struct mlx5e_xdp_wqe_info) {</div><div class='del'>-				.num_wqebbs = 1,</div><div class='del'>-				.num_pkts   = 1,</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			cseg-&gt;qpn_ds = cpu_to_be32((sq-&gt;sqn &lt;&lt; 8) | ds_cnt);</div><div class='del'>-			eseg-&gt;inline_hdr.sz = cpu_to_be16(inline_hdr_sz);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_free_xdpsq:</div><div class='hunk'>@@ -2086,9 +2161,48 @@ void mlx5e_close_xdpsq(struct mlx5e_xdpsq *sq)</div><div class='ctx'> 	mlx5e_free_xdpsq(sq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct mlx5e_xdpsq *mlx5e_open_xdpredirect_sq(struct mlx5e_channel *c,</div><div class='add'>+						     struct mlx5e_params *params,</div><div class='add'>+						     struct mlx5e_channel_param *cparam,</div><div class='add'>+						     struct mlx5e_create_cq_param *ccp)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_xdpsq *xdpsq;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	xdpsq = kvzalloc_node(sizeof(*xdpsq), GFP_KERNEL, cpu_to_node(c-&gt;cpu));</div><div class='add'>+	if (!xdpsq)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	err = mlx5e_open_cq(c-&gt;mdev, params-&gt;tx_cq_moderation,</div><div class='add'>+			    &amp;cparam-&gt;xdp_sq.cqp, ccp, &amp;xdpsq-&gt;cq);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_xdpsq;</div><div class='add'>+</div><div class='add'>+	err = mlx5e_open_xdpsq(c, params, &amp;cparam-&gt;xdp_sq, NULL, xdpsq, true);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_close_xdpsq_cq;</div><div class='add'>+</div><div class='add'>+	return xdpsq;</div><div class='add'>+</div><div class='add'>+err_close_xdpsq_cq:</div><div class='add'>+	mlx5e_close_cq(&amp;xdpsq-&gt;cq);</div><div class='add'>+err_free_xdpsq:</div><div class='add'>+	kvfree(xdpsq);</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_close_xdpredirect_sq(struct mlx5e_xdpsq *xdpsq)</div><div class='add'>+{</div><div class='add'>+	mlx5e_close_xdpsq(xdpsq);</div><div class='add'>+	mlx5e_close_cq(&amp;xdpsq-&gt;cq);</div><div class='add'>+	kvfree(xdpsq);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5e_alloc_cq_common(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				 struct net_device *netdev,</div><div class='ctx'> 				 struct workqueue_struct *workqueue,</div><div class='add'>+				 struct mlx5_uars_page *uar,</div><div class='ctx'> 				 struct mlx5e_cq_param *param,</div><div class='ctx'> 				 struct mlx5e_cq *cq)</div><div class='ctx'> {</div><div class='hunk'>@@ -2105,7 +2219,6 @@ static int mlx5e_alloc_cq_common(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	mcq-&gt;set_ci_db  = cq-&gt;wq_ctrl.db.db;</div><div class='ctx'> 	mcq-&gt;arm_db     = cq-&gt;wq_ctrl.db.db + 1;</div><div class='ctx'> 	*mcq-&gt;set_ci_db = 0;</div><div class='del'>-	*mcq-&gt;arm_db    = 0;</div><div class='ctx'> 	mcq-&gt;vector     = param-&gt;eq_ix;</div><div class='ctx'> 	mcq-&gt;comp       = mlx5e_completion_event;</div><div class='ctx'> 	mcq-&gt;event      = mlx5e_cq_error_event;</div><div class='hunk'>@@ -2120,6 +2233,7 @@ static int mlx5e_alloc_cq_common(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	cq-&gt;mdev = mdev;</div><div class='ctx'> 	cq-&gt;netdev = netdev;</div><div class='ctx'> 	cq-&gt;workqueue = workqueue;</div><div class='add'>+	cq-&gt;uar = uar;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -2135,7 +2249,8 @@ static int mlx5e_alloc_cq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	param-&gt;wq.db_numa_node  = ccp-&gt;node;</div><div class='ctx'> 	param-&gt;eq_ix            = ccp-&gt;ix;</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_alloc_cq_common(mdev, ccp-&gt;netdev, ccp-&gt;wq, param, cq);</div><div class='add'>+	err = mlx5e_alloc_cq_common(mdev, ccp-&gt;netdev, ccp-&gt;wq,</div><div class='add'>+				    ccp-&gt;uar, param, cq);</div><div class='ctx'> </div><div class='ctx'> 	cq-&gt;napi     = ccp-&gt;napi;</div><div class='ctx'> 	cq-&gt;ch_stats = ccp-&gt;ch_stats;</div><div class='hunk'>@@ -2180,7 +2295,7 @@ static int mlx5e_create_cq(struct mlx5e_cq *cq, struct mlx5e_cq_param *param)</div><div class='ctx'> 	MLX5_SET(cqc, cqc, cq_period_mode, mlx5e_cq_period_mode(param-&gt;cq_period_mode));</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(cqc,   cqc, c_eqn_or_apu_element, eqn);</div><div class='del'>-	MLX5_SET(cqc,   cqc, uar_page,      mdev-&gt;priv.uar-&gt;index);</div><div class='add'>+	MLX5_SET(cqc,   cqc, uar_page,      cq-&gt;uar-&gt;index);</div><div class='ctx'> 	MLX5_SET(cqc,   cqc, log_page_size, cq-&gt;wq_ctrl.buf.page_shift -</div><div class='ctx'> 					    MLX5_ADAPTER_PAGE_SHIFT);</div><div class='ctx'> 	MLX5_SET64(cqc, cqc, dbr_addr,      cq-&gt;wq_ctrl.db.dma);</div><div class='hunk'>@@ -2476,6 +2591,7 @@ static int mlx5e_open_queues(struct mlx5e_channel *c,</div><div class='ctx'> 			     struct mlx5e_params *params,</div><div class='ctx'> 			     struct mlx5e_channel_param *cparam)</div><div class='ctx'> {</div><div class='add'>+	const struct net_device_ops *netdev_ops = c-&gt;netdev-&gt;netdev_ops;</div><div class='ctx'> 	struct dim_cq_moder icocq_moder = {0, 0};</div><div class='ctx'> 	struct mlx5e_create_cq_param ccp;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -2496,15 +2612,18 @@ static int mlx5e_open_queues(struct mlx5e_channel *c,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_close_icosq_cq;</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_open_cq(c-&gt;mdev, params-&gt;tx_cq_moderation, &amp;cparam-&gt;xdp_sq.cqp, &amp;ccp,</div><div class='del'>-			    &amp;c-&gt;xdpsq.cq);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_close_tx_cqs;</div><div class='add'>+	if (netdev_ops-&gt;ndo_xdp_xmit &amp;&amp; c-&gt;xdp) {</div><div class='add'>+		c-&gt;xdpsq = mlx5e_open_xdpredirect_sq(c, params, cparam, &amp;ccp);</div><div class='add'>+		if (IS_ERR(c-&gt;xdpsq)) {</div><div class='add'>+			err = PTR_ERR(c-&gt;xdpsq);</div><div class='add'>+			goto err_close_tx_cqs;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_open_cq(c-&gt;mdev, params-&gt;rx_cq_moderation, &amp;cparam-&gt;rq.cqp, &amp;ccp,</div><div class='ctx'> 			    &amp;c-&gt;rq.cq);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_close_xdp_tx_cqs;</div><div class='add'>+		goto err_close_xdpredirect_sq;</div><div class='ctx'> </div><div class='ctx'> 	err = c-&gt;xdp ? mlx5e_open_cq(c-&gt;mdev, params-&gt;tx_cq_moderation, &amp;cparam-&gt;xdp_sq.cqp,</div><div class='ctx'> 				     &amp;ccp, &amp;c-&gt;rq_xdpsq.cq) : 0;</div><div class='hunk'>@@ -2516,7 +2635,7 @@ static int mlx5e_open_queues(struct mlx5e_channel *c,</div><div class='ctx'> 	err = mlx5e_open_icosq(c, params, &amp;cparam-&gt;async_icosq, &amp;c-&gt;async_icosq,</div><div class='ctx'> 			       mlx5e_async_icosq_err_cqe_work);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_close_xdpsq_cq;</div><div class='add'>+		goto err_close_rq_xdpsq_cq;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;c-&gt;icosq_recovery_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -2540,16 +2659,8 @@ static int mlx5e_open_queues(struct mlx5e_channel *c,</div><div class='ctx'> 			goto err_close_rq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_open_xdpsq(c, params, &amp;cparam-&gt;xdp_sq, NULL, &amp;c-&gt;xdpsq, true);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_close_xdp_sq;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_close_xdp_sq:</div><div class='del'>-	if (c-&gt;xdp)</div><div class='del'>-		mlx5e_close_xdpsq(&amp;c-&gt;rq_xdpsq);</div><div class='del'>-</div><div class='ctx'> err_close_rq:</div><div class='ctx'> 	mlx5e_close_rq(&amp;c-&gt;rq);</div><div class='ctx'> </div><div class='hunk'>@@ -2562,15 +2673,16 @@ err_close_icosq:</div><div class='ctx'> err_close_async_icosq:</div><div class='ctx'> 	mlx5e_close_icosq(&amp;c-&gt;async_icosq);</div><div class='ctx'> </div><div class='del'>-err_close_xdpsq_cq:</div><div class='add'>+err_close_rq_xdpsq_cq:</div><div class='ctx'> 	if (c-&gt;xdp)</div><div class='ctx'> 		mlx5e_close_cq(&amp;c-&gt;rq_xdpsq.cq);</div><div class='ctx'> </div><div class='ctx'> err_close_rx_cq:</div><div class='ctx'> 	mlx5e_close_cq(&amp;c-&gt;rq.cq);</div><div class='ctx'> </div><div class='del'>-err_close_xdp_tx_cqs:</div><div class='del'>-	mlx5e_close_cq(&amp;c-&gt;xdpsq.cq);</div><div class='add'>+err_close_xdpredirect_sq:</div><div class='add'>+	if (c-&gt;xdpsq)</div><div class='add'>+		mlx5e_close_xdpredirect_sq(c-&gt;xdpsq);</div><div class='ctx'> </div><div class='ctx'> err_close_tx_cqs:</div><div class='ctx'> 	mlx5e_close_tx_cqs(c);</div><div class='hunk'>@@ -2586,7 +2698,6 @@ err_close_async_icosq_cq:</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_close_queues(struct mlx5e_channel *c)</div><div class='ctx'> {</div><div class='del'>-	mlx5e_close_xdpsq(&amp;c-&gt;xdpsq);</div><div class='ctx'> 	if (c-&gt;xdp)</div><div class='ctx'> 		mlx5e_close_xdpsq(&amp;c-&gt;rq_xdpsq);</div><div class='ctx'> 	/* The same ICOSQ is used for UMRs for both RQ and XSKRQ. */</div><div class='hunk'>@@ -2599,7 +2710,8 @@ static void mlx5e_close_queues(struct mlx5e_channel *c)</div><div class='ctx'> 	if (c-&gt;xdp)</div><div class='ctx'> 		mlx5e_close_cq(&amp;c-&gt;rq_xdpsq.cq);</div><div class='ctx'> 	mlx5e_close_cq(&amp;c-&gt;rq.cq);</div><div class='del'>-	mlx5e_close_cq(&amp;c-&gt;xdpsq.cq);</div><div class='add'>+	if (c-&gt;xdpsq)</div><div class='add'>+		mlx5e_close_xdpredirect_sq(c-&gt;xdpsq);</div><div class='ctx'> 	mlx5e_close_tx_cqs(c);</div><div class='ctx'> 	mlx5e_close_cq(&amp;c-&gt;icosq.cq);</div><div class='ctx'> 	mlx5e_close_cq(&amp;c-&gt;async_icosq.cq);</div><div class='hunk'>@@ -2650,13 +2762,27 @@ void mlx5e_trigger_napi_sched(struct napi_struct *napi)</div><div class='ctx'> 	local_bh_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mlx5e_channel_pick_doorbell(struct mlx5e_channel *c)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_hw_objs *hw_objs = &amp;c-&gt;mdev-&gt;mlx5e_res.hw_objs;</div><div class='add'>+</div><div class='add'>+	/* No dedicated Ethernet doorbells, use the global one. */</div><div class='add'>+	if (hw_objs-&gt;num_bfregs == 0) {</div><div class='add'>+		c-&gt;bfreg = &amp;c-&gt;mdev-&gt;priv.bfreg;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Round-robin between doorbells. */</div><div class='add'>+	c-&gt;bfreg = hw_objs-&gt;bfregs + c-&gt;vec_ix % hw_objs-&gt;num_bfregs;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,</div><div class='ctx'> 			      struct mlx5e_params *params,</div><div class='del'>-			      struct mlx5e_channel_param *cparam,</div><div class='ctx'> 			      struct xsk_buff_pool *xsk_pool,</div><div class='ctx'> 			      struct mlx5e_channel **cp)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct mlx5e_channel_param *cparam;</div><div class='ctx'> 	struct mlx5_core_dev *mdev;</div><div class='ctx'> 	struct mlx5e_xsk_param xsk;</div><div class='ctx'> 	struct mlx5e_channel *c;</div><div class='hunk'>@@ -2678,12 +2804,18 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	c = kvzalloc_node(sizeof(*c), GFP_KERNEL, cpu_to_node(cpu));</div><div class='del'>-	if (!c)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	cparam = kvzalloc(sizeof(*cparam), GFP_KERNEL);</div><div class='add'>+	if (!c || !cparam) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mlx5e_build_channel_param(mdev, params, cparam);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free;</div><div class='ctx'> </div><div class='ctx'> 	c-&gt;priv     = priv;</div><div class='ctx'> 	c-&gt;mdev     = mdev;</div><div class='del'>-	c-&gt;tstamp   = &amp;priv-&gt;tstamp;</div><div class='ctx'> 	c-&gt;ix       = ix;</div><div class='ctx'> 	c-&gt;vec_ix   = vec_ix;</div><div class='ctx'> 	c-&gt;sd_ix    = mlx5_sd_ch_ix_get_dev_ix(mdev, ix);</div><div class='hunk'>@@ -2697,8 +2829,10 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,</div><div class='ctx'> 	c-&gt;aff_mask = irq_get_effective_affinity_mask(irq);</div><div class='ctx'> 	c-&gt;lag_port = mlx5e_enumerate_lag_port(mdev, ix);</div><div class='ctx'> </div><div class='del'>-	netif_napi_add_config(netdev, &amp;c-&gt;napi, mlx5e_napi_poll, ix);</div><div class='del'>-	netif_napi_set_irq(&amp;c-&gt;napi, irq);</div><div class='add'>+	mlx5e_channel_pick_doorbell(c);</div><div class='add'>+</div><div class='add'>+	netif_napi_add_config_locked(netdev, &amp;c-&gt;napi, mlx5e_napi_poll, ix);</div><div class='add'>+	netif_napi_set_irq_locked(&amp;c-&gt;napi, irq);</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5e_open_queues(c, params, cparam);</div><div class='ctx'> 	if (unlikely(err))</div><div class='hunk'>@@ -2713,14 +2847,17 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,</div><div class='ctx'> </div><div class='ctx'> 	*cp = c;</div><div class='ctx'> </div><div class='add'>+	kvfree(cparam);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_close_queues:</div><div class='ctx'> 	mlx5e_close_queues(c);</div><div class='ctx'> </div><div class='ctx'> err_napi_del:</div><div class='del'>-	netif_napi_del(&amp;c-&gt;napi);</div><div class='add'>+	netif_napi_del_locked(&amp;c-&gt;napi);</div><div class='ctx'> </div><div class='add'>+err_free:</div><div class='add'>+	kvfree(cparam);</div><div class='ctx'> 	kvfree(c);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -2730,7 +2867,7 @@ static void mlx5e_activate_channel(struct mlx5e_channel *c)</div><div class='ctx'> {</div><div class='ctx'> 	int tc;</div><div class='ctx'> </div><div class='del'>-	napi_enable(&amp;c-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;c-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	for (tc = 0; tc &lt; c-&gt;num_tc; tc++)</div><div class='ctx'> 		mlx5e_activate_txqsq(&amp;c-&gt;sq[tc]);</div><div class='hunk'>@@ -2762,7 +2899,7 @@ static void mlx5e_deactivate_channel(struct mlx5e_channel *c)</div><div class='ctx'> 		mlx5e_deactivate_txqsq(&amp;c-&gt;sq[tc]);</div><div class='ctx'> 	mlx5e_qos_deactivate_queues(c);</div><div class='ctx'> </div><div class='del'>-	napi_disable(&amp;c-&gt;napi);</div><div class='add'>+	napi_disable_locked(&amp;c-&gt;napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_close_channel(struct mlx5e_channel *c)</div><div class='hunk'>@@ -2771,7 +2908,7 @@ static void mlx5e_close_channel(struct mlx5e_channel *c)</div><div class='ctx'> 		mlx5e_close_xsk(c);</div><div class='ctx'> 	mlx5e_close_queues(c);</div><div class='ctx'> 	mlx5e_qos_close_queues(c);</div><div class='del'>-	netif_napi_del(&amp;c-&gt;napi);</div><div class='add'>+	netif_napi_del_locked(&amp;c-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	kvfree(c);</div><div class='ctx'> }</div><div class='hunk'>@@ -2779,20 +2916,14 @@ static void mlx5e_close_channel(struct mlx5e_channel *c)</div><div class='ctx'> int mlx5e_open_channels(struct mlx5e_priv *priv,</div><div class='ctx'> 			struct mlx5e_channels *chs)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5e_channel_param *cparam;</div><div class='ctx'> 	int err = -ENOMEM;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	chs-&gt;num = chs-&gt;params.num_channels;</div><div class='ctx'> </div><div class='ctx'> 	chs-&gt;c = kcalloc(chs-&gt;num, sizeof(struct mlx5e_channel *), GFP_KERNEL);</div><div class='del'>-	cparam = kvzalloc(sizeof(struct mlx5e_channel_param), GFP_KERNEL);</div><div class='del'>-	if (!chs-&gt;c || !cparam)</div><div class='del'>-		goto err_free;</div><div class='del'>-</div><div class='del'>-	err = mlx5e_build_channel_param(priv-&gt;mdev, &amp;chs-&gt;params, cparam);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_free;</div><div class='add'>+	if (!chs-&gt;c)</div><div class='add'>+		goto err_out;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; chs-&gt;num; i++) {</div><div class='ctx'> 		struct xsk_buff_pool *xsk_pool = NULL;</div><div class='hunk'>@@ -2800,7 +2931,7 @@ int mlx5e_open_channels(struct mlx5e_priv *priv,</div><div class='ctx'> 		if (chs-&gt;params.xdp_prog)</div><div class='ctx'> 			xsk_pool = mlx5e_xsk_get_pool(&amp;chs-&gt;params, chs-&gt;params.xsk, i);</div><div class='ctx'> </div><div class='del'>-		err = mlx5e_open_channel(priv, i, &amp;chs-&gt;params, cparam, xsk_pool, &amp;chs-&gt;c[i]);</div><div class='add'>+		err = mlx5e_open_channel(priv, i, &amp;chs-&gt;params, xsk_pool, &amp;chs-&gt;c[i]);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_close_channels;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2818,7 +2949,6 @@ int mlx5e_open_channels(struct mlx5e_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_health_channels_update(priv);</div><div class='del'>-	kvfree(cparam);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_close_ptp:</div><div class='hunk'>@@ -2829,9 +2959,8 @@ err_close_channels:</div><div class='ctx'> 	for (i--; i &gt;= 0; i--)</div><div class='ctx'> 		mlx5e_close_channel(chs-&gt;c[i]);</div><div class='ctx'> </div><div class='del'>-err_free:</div><div class='ctx'> 	kfree(chs-&gt;c);</div><div class='del'>-	kvfree(cparam);</div><div class='add'>+err_out:</div><div class='ctx'> 	chs-&gt;num = 0;</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -3236,16 +3365,17 @@ static int mlx5e_switch_priv_params(struct mlx5e_priv *priv,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mlx5e_set_xdp_feature(priv);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_switch_priv_channels(struct mlx5e_priv *priv,</div><div class='add'>+				      struct mlx5e_channels *old_chs,</div><div class='ctx'> 				      struct mlx5e_channels *new_chs,</div><div class='ctx'> 				      mlx5e_fp_preactivate preactivate,</div><div class='ctx'> 				      void *context)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = priv-&gt;netdev;</div><div class='del'>-	struct mlx5e_channels old_chs;</div><div class='ctx'> 	int carrier_ok;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -3254,7 +3384,6 @@ static int mlx5e_switch_priv_channels(struct mlx5e_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_deactivate_priv_channels(priv);</div><div class='ctx'> </div><div class='del'>-	old_chs = priv-&gt;channels;</div><div class='ctx'> 	priv-&gt;channels = *new_chs;</div><div class='ctx'> </div><div class='ctx'> 	/* New channels are ready to roll, call the preactivate hook if needed</div><div class='hunk'>@@ -3263,12 +3392,14 @@ static int mlx5e_switch_priv_channels(struct mlx5e_priv *priv,</div><div class='ctx'> 	if (preactivate) {</div><div class='ctx'> 		err = preactivate(priv, context);</div><div class='ctx'> 		if (err) {</div><div class='del'>-			priv-&gt;channels = old_chs;</div><div class='add'>+			priv-&gt;channels = *old_chs;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx5e_close_channels(&amp;old_chs);</div><div class='add'>+	mlx5e_set_xdp_feature(priv);</div><div class='add'>+	if (!MLX5_CAP_GEN(priv-&gt;mdev, tis_tir_td_order))</div><div class='add'>+		mlx5e_close_channels(old_chs);</div><div class='ctx'> 	priv-&gt;profile-&gt;update_rx(priv);</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_selq_apply(&amp;priv-&gt;selq);</div><div class='hunk'>@@ -3287,16 +3418,20 @@ int mlx5e_safe_switch_params(struct mlx5e_priv *priv,</div><div class='ctx'> 			     mlx5e_fp_preactivate preactivate,</div><div class='ctx'> 			     void *context, bool reset)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5e_channels *new_chs;</div><div class='add'>+	struct mlx5e_channels *old_chs, *new_chs;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	reset &amp;= test_bit(MLX5E_STATE_OPENED, &amp;priv-&gt;state);</div><div class='ctx'> 	if (!reset)</div><div class='ctx'> 		return mlx5e_switch_priv_params(priv, params, preactivate, context);</div><div class='ctx'> </div><div class='add'>+	old_chs = kzalloc(sizeof(*old_chs), GFP_KERNEL);</div><div class='ctx'> 	new_chs = kzalloc(sizeof(*new_chs), GFP_KERNEL);</div><div class='del'>-	if (!new_chs)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (!old_chs || !new_chs) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_free_chs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	new_chs-&gt;params = *params;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_selq_prepare_params(&amp;priv-&gt;selq, &amp;new_chs-&gt;params);</div><div class='hunk'>@@ -3305,11 +3440,18 @@ int mlx5e_safe_switch_params(struct mlx5e_priv *priv,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_cancel_selq;</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_switch_priv_channels(priv, new_chs, preactivate, context);</div><div class='add'>+	*old_chs = priv-&gt;channels;</div><div class='add'>+</div><div class='add'>+	err = mlx5e_switch_priv_channels(priv, old_chs, new_chs,</div><div class='add'>+					 preactivate, context);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_close;</div><div class='ctx'> </div><div class='add'>+	if (MLX5_CAP_GEN(priv-&gt;mdev, tis_tir_td_order))</div><div class='add'>+		mlx5e_close_channels(old_chs);</div><div class='add'>+</div><div class='ctx'> 	kfree(new_chs);</div><div class='add'>+	kfree(old_chs);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_close:</div><div class='hunk'>@@ -3317,7 +3459,9 @@ err_close:</div><div class='ctx'> </div><div class='ctx'> err_cancel_selq:</div><div class='ctx'> 	mlx5e_selq_cancel(&amp;priv-&gt;selq);</div><div class='add'>+err_free_chs:</div><div class='ctx'> 	kfree(new_chs);</div><div class='add'>+	kfree(old_chs);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3328,8 +3472,8 @@ int mlx5e_safe_reopen_channels(struct mlx5e_priv *priv)</div><div class='ctx'> </div><div class='ctx'> void mlx5e_timestamp_init(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	priv-&gt;tstamp.tx_type   = HWTSTAMP_TX_OFF;</div><div class='del'>-	priv-&gt;tstamp.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+	priv-&gt;hwtstamp_config.tx_type   = HWTSTAMP_TX_OFF;</div><div class='add'>+	priv-&gt;hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_modify_admin_state(struct mlx5_core_dev *mdev,</div><div class='hunk'>@@ -3473,7 +3617,8 @@ static int mlx5e_alloc_drop_cq(struct mlx5e_priv *priv,</div><div class='ctx'> 	param-&gt;wq.buf_numa_node = dev_to_node(mlx5_core_dma_dev(mdev));</div><div class='ctx'> 	param-&gt;wq.db_numa_node  = dev_to_node(mlx5_core_dma_dev(mdev));</div><div class='ctx'> </div><div class='del'>-	return mlx5e_alloc_cq_common(priv-&gt;mdev, priv-&gt;netdev, priv-&gt;wq, param, cq);</div><div class='add'>+	return mlx5e_alloc_cq_common(priv-&gt;mdev, priv-&gt;netdev, priv-&gt;wq,</div><div class='add'>+				     mdev-&gt;priv.bfreg.up, param, cq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5e_open_drop_rq(struct mlx5e_priv *priv,</div><div class='hunk'>@@ -3786,8 +3931,11 @@ static int mlx5e_setup_tc_mqprio(struct mlx5e_priv *priv,</div><div class='ctx'> 	/* MQPRIO is another toplevel qdisc that can't be attached</div><div class='ctx'> 	 * simultaneously with the offloaded HTB.</div><div class='ctx'> 	 */</div><div class='del'>-	if (WARN_ON(mlx5e_selq_is_htb_enabled(&amp;priv-&gt;selq)))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (mlx5e_selq_is_htb_enabled(&amp;priv-&gt;selq)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(mqprio-&gt;extack,</div><div class='add'>+				   "MQPRIO cannot be configured when HTB offload is enabled.");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	switch (mqprio-&gt;mode) {</div><div class='ctx'> 	case TC_MQPRIO_MODE_DCB:</div><div class='hunk'>@@ -3878,6 +4026,11 @@ void mlx5e_fold_sw_stats64(struct mlx5e_priv *priv, struct rtnl_link_stats64 *s)</div><div class='ctx'> 		s-&gt;rx_bytes     += rq_stats-&gt;bytes;</div><div class='ctx'> 		s-&gt;multicast    += rq_stats-&gt;mcast_packets;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MLX5_EN_PSP</div><div class='add'>+	if (priv-&gt;psp)</div><div class='add'>+		s-&gt;tx_dropped	+= atomic_read(&amp;priv-&gt;psp-&gt;tx_drop);</div><div class='add'>+#endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void</div><div class='hunk'>@@ -3916,6 +4069,7 @@ mlx5e_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;rx_missed_errors = priv-&gt;stats.qcnt.rx_out_of_buffer;</div><div class='add'>+	stats-&gt;rx_dropped = PPORT_2863_GET(pstats, if_in_discards);</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;rx_length_errors =</div><div class='ctx'> 		PPORT_802_3_GET(pstats, a_in_range_length_errors) +</div><div class='hunk'>@@ -4022,10 +4176,6 @@ static int set_feature_hw_gro(struct net_device *netdev, bool enable)</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		new_params.packet_merge.type = MLX5E_PACKET_MERGE_SHAMPO;</div><div class='del'>-		new_params.packet_merge.shampo.match_criteria_type =</div><div class='del'>-			MLX5_RQC_SHAMPO_MATCH_CRITERIA_TYPE_EXTENDED;</div><div class='del'>-		new_params.packet_merge.shampo.alignment_granularity =</div><div class='del'>-			MLX5_RQC_SHAMPO_NO_MATCH_ALIGNMENT_GRANULARITY_STRIDE;</div><div class='ctx'> 	} else if (new_params.packet_merge.type == MLX5E_PACKET_MERGE_SHAMPO) {</div><div class='ctx'> 		new_params.packet_merge.type = MLX5E_PACKET_MERGE_NONE;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -4261,23 +4411,23 @@ static int mlx5e_handle_feature(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5e_set_xdp_feature(struct net_device *netdev)</div><div class='add'>+void mlx5e_set_xdp_feature(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	struct mlx5e_params *params = &amp;priv-&gt;channels.params;</div><div class='del'>-	xdp_features_t val;</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	xdp_features_t val = 0;</div><div class='ctx'> </div><div class='del'>-	if (params-&gt;packet_merge.type != MLX5E_PACKET_MERGE_NONE) {</div><div class='del'>-		xdp_clear_features_flag(netdev);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	if (netdev-&gt;netdev_ops-&gt;ndo_bpf &amp;&amp;</div><div class='add'>+	    params-&gt;packet_merge.type == MLX5E_PACKET_MERGE_NONE)</div><div class='add'>+		val = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |</div><div class='add'>+		      NETDEV_XDP_ACT_XSK_ZEROCOPY |</div><div class='add'>+		      NETDEV_XDP_ACT_RX_SG;</div><div class='ctx'> </div><div class='del'>-	val = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |</div><div class='del'>-	      NETDEV_XDP_ACT_XSK_ZEROCOPY |</div><div class='del'>-	      NETDEV_XDP_ACT_RX_SG |</div><div class='del'>-	      NETDEV_XDP_ACT_NDO_XMIT |</div><div class='del'>-	      NETDEV_XDP_ACT_NDO_XMIT_SG;</div><div class='del'>-	xdp_set_features_flag(netdev, val);</div><div class='add'>+	if (netdev-&gt;netdev_ops-&gt;ndo_xdp_xmit &amp;&amp; params-&gt;xdp_prog)</div><div class='add'>+		val |= NETDEV_XDP_ACT_NDO_XMIT |</div><div class='add'>+			NETDEV_XDP_ACT_NDO_XMIT_SG;</div><div class='add'>+</div><div class='add'>+	xdp_set_features_flag_locked(netdev, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5e_set_features(struct net_device *netdev, netdev_features_t features)</div><div class='hunk'>@@ -4312,9 +4462,6 @@ int mlx5e_set_features(struct net_device *netdev, netdev_features_t features)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* update XDP supported features */</div><div class='del'>-	mlx5e_set_xdp_feature(netdev);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4341,12 +4488,17 @@ static netdev_features_t mlx5e_fix_uplink_rep_features(struct net_device *netdev</div><div class='ctx'> 	if (netdev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_FILTER)</div><div class='ctx'> 		netdev_warn(netdev, "Disabling HW_VLAN CTAG FILTERING, not supported in switchdev mode\n");</div><div class='ctx'> </div><div class='add'>+	features &amp;= ~NETIF_F_HW_MACSEC;</div><div class='add'>+	if (netdev-&gt;features &amp; NETIF_F_HW_MACSEC)</div><div class='add'>+		netdev_warn(netdev, "Disabling HW MACsec offload, not supported in switchdev mode\n");</div><div class='add'>+</div><div class='ctx'> 	return features;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_features_t mlx5e_fix_features(struct net_device *netdev,</div><div class='ctx'> 					    netdev_features_t features)</div><div class='ctx'> {</div><div class='add'>+	struct netdev_config *cfg = netdev-&gt;cfg_pending;</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='ctx'> 	struct mlx5e_vlan_table *vlan;</div><div class='ctx'> 	struct mlx5e_params *params;</div><div class='hunk'>@@ -4413,11 +4565,18 @@ static netdev_features_t mlx5e_fix_features(struct net_device *netdev,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* The header-data split ring param requires HW GRO to stay enabled. */</div><div class='add'>+	if (cfg &amp;&amp; cfg-&gt;hds_config == ETHTOOL_TCP_DATA_SPLIT_ENABLED &amp;&amp;</div><div class='add'>+	    !(features &amp; NETIF_F_GRO_HW)) {</div><div class='add'>+		netdev_warn(netdev, "Keeping HW-GRO enabled, TCP header-data split depends on it\n");</div><div class='add'>+		features |= NETIF_F_GRO_HW;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (mlx5e_is_uplink_rep(priv)) {</div><div class='ctx'> 		features = mlx5e_fix_uplink_rep_features(netdev, features);</div><div class='del'>-		netdev-&gt;netns_local = true;</div><div class='add'>+		netdev-&gt;netns_immutable = true;</div><div class='ctx'> 	} else {</div><div class='del'>-		netdev-&gt;netns_local = false;</div><div class='add'>+		netdev-&gt;netns_immutable = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='hunk'>@@ -4610,22 +4769,23 @@ static int mlx5e_hwstamp_config_ptp_rx(struct mlx5e_priv *priv, bool ptp_rx)</div><div class='ctx'> 					&amp;new_params.ptp_rx, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr)</div><div class='add'>+int mlx5e_hwtstamp_set(struct mlx5e_priv *priv,</div><div class='add'>+		       struct kernel_hwtstamp_config *config,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	bool rx_cqe_compress_def;</div><div class='ctx'> 	bool ptp_rx;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!MLX5_CAP_GEN(priv-&gt;mdev, device_frequency_khz) ||</div><div class='del'>-	    (mlx5_clock_get_ptp_index(priv-&gt;mdev) == -1))</div><div class='add'>+	    (mlx5_clock_get_ptp_index(priv-&gt;mdev) == -1)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Timestamps are not supported on this device");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* TX HW timestamp */</div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -4637,7 +4797,7 @@ int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr)</div><div class='ctx'> 	rx_cqe_compress_def = priv-&gt;channels.params.rx_cqe_compress_def;</div><div class='ctx'> </div><div class='ctx'> 	/* RX HW timestamp */</div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		ptp_rx = false;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -4656,7 +4816,7 @@ int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		/* ptp_rx is set if both HW TS is set and CQE</div><div class='ctx'> 		 * compression is set</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -4669,47 +4829,50 @@ int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 	if (!mlx5e_profile_feature_cap(priv-&gt;profile, PTP_RX))</div><div class='ctx'> 		err = mlx5e_hwstamp_config_no_ptp_rx(priv,</div><div class='del'>-						     config.rx_filter != HWTSTAMP_FILTER_NONE);</div><div class='add'>+						     config-&gt;rx_filter != HWTSTAMP_FILTER_NONE);</div><div class='ctx'> 	else</div><div class='ctx'> 		err = mlx5e_hwstamp_config_ptp_rx(priv, ptp_rx);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_unlock;</div><div class='ctx'> </div><div class='del'>-	memcpy(&amp;priv-&gt;tstamp, &amp;config, sizeof(config));</div><div class='add'>+	priv-&gt;hwtstamp_config = *config;</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* might need to fix some features */</div><div class='ctx'> 	netdev_update_features(priv-&gt;netdev);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config,</div><div class='del'>-			    sizeof(config)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> err_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5e_hwstamp_get(struct mlx5e_priv *priv, struct ifreq *ifr)</div><div class='add'>+static int mlx5e_hwtstamp_set_ndo(struct net_device *netdev,</div><div class='add'>+				  struct kernel_hwtstamp_config *config,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config *cfg = &amp;priv-&gt;tstamp;</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='ctx'> </div><div class='add'>+	return mlx5e_hwtstamp_set(priv, config, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5e_hwtstamp_get(struct mlx5e_priv *priv,</div><div class='add'>+		       struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='ctx'> 	if (!MLX5_CAP_GEN(priv-&gt;mdev, device_frequency_khz))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, cfg, sizeof(*cfg)) ? -EFAULT : 0;</div><div class='add'>+	*config = priv-&gt;hwtstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5e_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='add'>+static int mlx5e_hwtstamp_get_ndo(struct net_device *dev,</div><div class='add'>+				  struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return mlx5e_hwstamp_set(priv, ifr);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return mlx5e_hwstamp_get(priv, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	return mlx5e_hwtstamp_get(priv, config);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MLX5_ESWITCH</div><div class='hunk'>@@ -4956,21 +5119,19 @@ static void mlx5e_tx_timeout_work(struct work_struct *work)</div><div class='ctx'> 	struct net_device *netdev = priv-&gt;netdev;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	/* Take rtnl_lock to ensure no change in netdev-&gt;real_num_tx_queues</div><div class='del'>-	 * through this flow. However, channel closing flows have to wait for</div><div class='del'>-	 * this work to finish while holding rtnl lock too. So either get the</div><div class='del'>-	 * lock or find that channels are being closed for other reason and</div><div class='del'>-	 * this work is not relevant anymore.</div><div class='add'>+	/* Recovering the TX queues implies re-enabling NAPI, which requires</div><div class='add'>+	 * the netdev instance lock.</div><div class='add'>+	 * However, channel closing flows have to wait for this work to finish</div><div class='add'>+	 * while holding the same lock. So either get the lock or find that</div><div class='add'>+	 * channels are being closed for other reason and this work is not</div><div class='add'>+	 * relevant anymore.</div><div class='ctx'> 	 */</div><div class='del'>-	while (!rtnl_trylock()) {</div><div class='add'>+	while (!netdev_trylock(netdev)) {</div><div class='ctx'> 		if (!test_bit(MLX5E_STATE_CHANNELS_ACTIVE, &amp;priv-&gt;state))</div><div class='ctx'> 			return;</div><div class='ctx'> 		msleep(20);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!test_bit(MLX5E_STATE_OPENED, &amp;priv-&gt;state))</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; netdev-&gt;real_num_tx_queues; i++) {</div><div class='ctx'> 		struct netdev_queue *dev_queue =</div><div class='ctx'> 			netdev_get_tx_queue(netdev, i);</div><div class='hunk'>@@ -4984,8 +5145,7 @@ static void mlx5e_tx_timeout_work(struct work_struct *work)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='hunk'>@@ -5100,11 +5260,9 @@ static int mlx5e_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	u8 mode, setting;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_eswitch_get_vepa(mdev-&gt;priv.eswitch, &amp;setting);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	if (mlx5_eswitch_get_vepa(mdev-&gt;priv.eswitch, &amp;setting))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	mode = setting ? BRIDGE_MODE_VEPA : BRIDGE_MODE_VEB;</div><div class='ctx'> 	return ndo_dflt_bridge_getlink(skb, pid, seq, dev,</div><div class='ctx'> 				       mode,</div><div class='hunk'>@@ -5155,13 +5313,14 @@ const struct net_device_ops mlx5e_netdev_ops = {</div><div class='ctx'> 	.ndo_set_features        = mlx5e_set_features,</div><div class='ctx'> 	.ndo_fix_features        = mlx5e_fix_features,</div><div class='ctx'> 	.ndo_change_mtu          = mlx5e_change_nic_mtu,</div><div class='del'>-	.ndo_eth_ioctl            = mlx5e_ioctl,</div><div class='ctx'> 	.ndo_set_tx_maxrate      = mlx5e_set_tx_maxrate,</div><div class='ctx'> 	.ndo_features_check      = mlx5e_features_check,</div><div class='ctx'> 	.ndo_tx_timeout          = mlx5e_tx_timeout,</div><div class='ctx'> 	.ndo_bpf		 = mlx5e_xdp,</div><div class='ctx'> 	.ndo_xdp_xmit            = mlx5e_xdp_xmit,</div><div class='ctx'> 	.ndo_xsk_wakeup          = mlx5e_xsk_wakeup,</div><div class='add'>+	.ndo_hwtstamp_get        = mlx5e_hwtstamp_get_ndo,</div><div class='add'>+	.ndo_hwtstamp_set        = mlx5e_hwtstamp_set_ndo,</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_ARFS</div><div class='ctx'> 	.ndo_rx_flow_steer	 = mlx5e_rx_flow_steer,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -5282,8 +5441,7 @@ void mlx5e_vxlan_set_netdev_info(struct mlx5e_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;nic_info.set_port = mlx5e_vxlan_set_port;</div><div class='ctx'> 	priv-&gt;nic_info.unset_port = mlx5e_vxlan_unset_port;</div><div class='del'>-	priv-&gt;nic_info.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP |</div><div class='del'>-				UDP_TUNNEL_NIC_INFO_STATIC_IANA_VXLAN;</div><div class='add'>+	priv-&gt;nic_info.flags = UDP_TUNNEL_NIC_INFO_STATIC_IANA_VXLAN;</div><div class='ctx'> 	priv-&gt;nic_info.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN;</div><div class='ctx'> 	/* Don't count the space hard-coded to the IANA port */</div><div class='ctx'> 	priv-&gt;nic_info.tables[0].n_entries =</div><div class='hunk'>@@ -5311,7 +5469,6 @@ static void mlx5e_get_queue_stats_rx(struct net_device *dev, int i,</div><div class='ctx'> 	struct mlx5e_rq_stats *xskrq_stats;</div><div class='ctx'> 	struct mlx5e_rq_stats *rq_stats;</div><div class='ctx'> </div><div class='del'>-	ASSERT_RTNL();</div><div class='ctx'> 	if (mlx5e_is_uplink_rep(priv) || !priv-&gt;stats_nch)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -5331,7 +5488,6 @@ static void mlx5e_get_queue_stats_tx(struct net_device *dev, int i,</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct mlx5e_sq_stats *sq_stats;</div><div class='ctx'> </div><div class='del'>-	ASSERT_RTNL();</div><div class='ctx'> 	if (!priv-&gt;stats_nch)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -5352,7 +5508,6 @@ static void mlx5e_get_base_stats(struct net_device *dev,</div><div class='ctx'> 	struct mlx5e_ptp *ptp_channel;</div><div class='ctx'> 	int i, tc;</div><div class='ctx'> </div><div class='del'>-	ASSERT_RTNL();</div><div class='ctx'> 	if (!mlx5e_is_uplink_rep(priv)) {</div><div class='ctx'> 		rx-&gt;packets = 0;</div><div class='ctx'> 		rx-&gt;bytes = 0;</div><div class='hunk'>@@ -5436,6 +5591,127 @@ static const struct netdev_stat_ops mlx5e_stat_ops = {</div><div class='ctx'> 	.get_base_stats      = mlx5e_get_base_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mlx5_qmgmt_data {</div><div class='add'>+	struct mlx5e_channel *c;</div><div class='add'>+	struct mlx5e_channel_param cparam;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mlx5e_queue_mem_alloc(struct net_device *dev, void *newq,</div><div class='add'>+				 int queue_index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_qmgmt_data *new = (struct mlx5_qmgmt_data *)newq;</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct mlx5e_channels *chs = &amp;priv-&gt;channels;</div><div class='add'>+	struct mlx5e_params params = chs-&gt;params;</div><div class='add'>+	struct mlx5_core_dev *mdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+	if (!test_bit(MLX5E_STATE_OPENED, &amp;priv-&gt;state)) {</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (queue_index &gt;= chs-&gt;num) {</div><div class='add'>+		err = -ERANGE;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (MLX5E_GET_PFLAG(&amp;chs-&gt;params, MLX5E_PFLAG_TX_PORT_TS) ||</div><div class='add'>+	    chs-&gt;params.ptp_rx   ||</div><div class='add'>+	    chs-&gt;params.xdp_prog ||</div><div class='add'>+	    priv-&gt;htb) {</div><div class='add'>+		netdev_err(priv-&gt;netdev,</div><div class='add'>+			   "Cloning channels with Port/rx PTP, XDP or HTB is not supported\n");</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mdev = mlx5_sd_ch_ix_get_dev(priv-&gt;mdev, queue_index);</div><div class='add'>+	err = mlx5e_build_channel_param(mdev, &amp;params, &amp;new-&gt;cparam);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mlx5e_open_channel(priv, queue_index, &amp;params, NULL, &amp;new-&gt;c);</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_queue_mem_free(struct net_device *dev, void *mem)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_qmgmt_data *data = (struct mlx5_qmgmt_data *)mem;</div><div class='add'>+</div><div class='add'>+	/* not supposed to happen since mlx5e_queue_start never fails</div><div class='add'>+	 * but this is how this should be implemented just in case</div><div class='add'>+	 */</div><div class='add'>+	if (data-&gt;c)</div><div class='add'>+		mlx5e_close_channel(data-&gt;c);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5e_queue_stop(struct net_device *dev, void *oldq, int queue_index)</div><div class='add'>+{</div><div class='add'>+	/* In mlx5 a txq cannot be simply stopped in isolation, only restarted.</div><div class='add'>+	 * mlx5e_queue_start does not fail, we stop the old queue there.</div><div class='add'>+	 * TODO: Improve this.</div><div class='add'>+	 */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5e_queue_start(struct net_device *dev, void *newq,</div><div class='add'>+			     int queue_index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_qmgmt_data *new = (struct mlx5_qmgmt_data *)newq;</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct mlx5e_channel *old;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	/* stop and close the old */</div><div class='add'>+	old = priv-&gt;channels.c[queue_index];</div><div class='add'>+	mlx5e_deactivate_priv_channels(priv);</div><div class='add'>+	/* close old before activating new, to avoid napi conflict */</div><div class='add'>+	mlx5e_close_channel(old);</div><div class='add'>+</div><div class='add'>+	/* start the new */</div><div class='add'>+	priv-&gt;channels.c[queue_index] = new-&gt;c;</div><div class='add'>+	mlx5e_activate_priv_channels(priv);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct device *mlx5e_queue_get_dma_dev(struct net_device *dev,</div><div class='add'>+					      int queue_index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct mlx5e_channels *channels;</div><div class='add'>+	struct device *pdev = NULL;</div><div class='add'>+	struct mlx5e_channel *ch;</div><div class='add'>+</div><div class='add'>+	channels = &amp;priv-&gt;channels;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	if (queue_index &gt;= channels-&gt;num)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ch = channels-&gt;c[queue_index];</div><div class='add'>+	pdev = ch-&gt;pdev;</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	return pdev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct netdev_queue_mgmt_ops mlx5e_queue_mgmt_ops = {</div><div class='add'>+	.ndo_queue_mem_size	=	sizeof(struct mlx5_qmgmt_data),</div><div class='add'>+	.ndo_queue_mem_alloc	=	mlx5e_queue_mem_alloc,</div><div class='add'>+	.ndo_queue_mem_free	=	mlx5e_queue_mem_free,</div><div class='add'>+	.ndo_queue_start	=	mlx5e_queue_start,</div><div class='add'>+	.ndo_queue_stop		=	mlx5e_queue_stop,</div><div class='add'>+	.ndo_queue_get_dma_dev	=	mlx5e_queue_get_dma_dev,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void mlx5e_build_nic_netdev(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='hunk'>@@ -5446,8 +5722,11 @@ static void mlx5e_build_nic_netdev(struct net_device *netdev)</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, mdev-&gt;device);</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;mlx5e_netdev_ops;</div><div class='add'>+	netdev-&gt;queue_mgmt_ops = &amp;mlx5e_queue_mgmt_ops;</div><div class='ctx'> 	netdev-&gt;xdp_metadata_ops = &amp;mlx5e_xdp_metadata_ops;</div><div class='ctx'> 	netdev-&gt;xsk_tx_metadata_ops = &amp;mlx5e_xsk_tx_metadata_ops;</div><div class='add'>+	netdev-&gt;request_ops_lock = true;</div><div class='add'>+	netdev_lockdep_set_classes(netdev);</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_dcbnl_build_netdev(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -5486,17 +5765,17 @@ static void mlx5e_build_nic_netdev(struct net_device *netdev)</div><div class='ctx'> 						   MLX5E_MPWRQ_UMR_MODE_ALIGNED))</div><div class='ctx'> 		netdev-&gt;vlan_features    |= NETIF_F_LRO;</div><div class='ctx'> </div><div class='add'>+	if (mlx5e_hw_gro_supported(mdev) &amp;&amp;</div><div class='add'>+	    mlx5e_check_fragmented_striding_rq_cap(mdev, PAGE_SHIFT,</div><div class='add'>+						   MLX5E_MPWRQ_UMR_MODE_ALIGNED))</div><div class='add'>+		netdev-&gt;vlan_features |= NETIF_F_GRO_HW;</div><div class='add'>+</div><div class='ctx'> 	netdev-&gt;hw_features       = netdev-&gt;vlan_features;</div><div class='ctx'> 	netdev-&gt;hw_features      |= NETIF_F_HW_VLAN_CTAG_TX;</div><div class='ctx'> 	netdev-&gt;hw_features      |= NETIF_F_HW_VLAN_CTAG_RX;</div><div class='ctx'> 	netdev-&gt;hw_features      |= NETIF_F_HW_VLAN_CTAG_FILTER;</div><div class='ctx'> 	netdev-&gt;hw_features      |= NETIF_F_HW_VLAN_STAG_TX;</div><div class='ctx'> </div><div class='del'>-	if (mlx5e_hw_gro_supported(mdev) &amp;&amp;</div><div class='del'>-	    mlx5e_check_fragmented_striding_rq_cap(mdev, PAGE_SHIFT,</div><div class='del'>-						   MLX5E_MPWRQ_UMR_MODE_ALIGNED))</div><div class='del'>-		netdev-&gt;hw_features    |= NETIF_F_GRO_HW;</div><div class='del'>-</div><div class='ctx'> 	if (mlx5e_tunnel_any_tx_proto_supported(mdev)) {</div><div class='ctx'> 		netdev-&gt;hw_enc_features |= NETIF_F_HW_CSUM;</div><div class='ctx'> 		netdev-&gt;hw_enc_features |= NETIF_F_TSO;</div><div class='hunk'>@@ -5575,8 +5854,10 @@ static void mlx5e_build_nic_netdev(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;priv_flags       |= IFF_UNICAST_FLT;</div><div class='ctx'> </div><div class='add'>+	netdev-&gt;netmem_tx = true;</div><div class='add'>+</div><div class='ctx'> 	netif_set_tso_max_size(netdev, GSO_MAX_SIZE);</div><div class='del'>-	mlx5e_set_xdp_feature(netdev);</div><div class='add'>+	mlx5e_set_xdp_feature(priv);</div><div class='ctx'> 	mlx5e_set_netdev_dev_addr(netdev);</div><div class='ctx'> 	mlx5e_macsec_build_netdev(priv);</div><div class='ctx'> 	mlx5e_ipsec_build_netdev(priv);</div><div class='hunk'>@@ -5656,6 +5937,10 @@ static int mlx5e_nic_init(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	priv-&gt;fs = fs;</div><div class='ctx'> </div><div class='add'>+	err = mlx5e_psp_init(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		mlx5_core_err(mdev, "PSP initialization failed, %d\n", err);</div><div class='add'>+</div><div class='ctx'> 	err = mlx5e_ktls_init(priv);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		mlx5_core_err(mdev, "TLS initialization failed, %d\n", err);</div><div class='hunk'>@@ -5668,8 +5953,9 @@ static int mlx5e_nic_init(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	if (take_rtnl)</div><div class='ctx'> 		rtnl_lock();</div><div class='ctx'> </div><div class='add'>+	mlx5e_psp_register(priv);</div><div class='ctx'> 	/* update XDP supported features */</div><div class='del'>-	mlx5e_set_xdp_feature(netdev);</div><div class='add'>+	mlx5e_set_xdp_feature(priv);</div><div class='ctx'> </div><div class='ctx'> 	if (take_rtnl)</div><div class='ctx'> 		rtnl_unlock();</div><div class='hunk'>@@ -5680,7 +5966,9 @@ static int mlx5e_nic_init(struct mlx5_core_dev *mdev,</div><div class='ctx'> static void mlx5e_nic_cleanup(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	mlx5e_health_destroy_reporters(priv);</div><div class='add'>+	mlx5e_psp_unregister(priv);</div><div class='ctx'> 	mlx5e_ktls_cleanup(priv);</div><div class='add'>+	mlx5e_psp_cleanup(priv);</div><div class='ctx'> 	mlx5e_fs_cleanup(priv-&gt;fs);</div><div class='ctx'> 	debugfs_remove_recursive(priv-&gt;dfs_root);</div><div class='ctx'> 	priv-&gt;fs = NULL;</div><div class='hunk'>@@ -5821,6 +6109,7 @@ static void mlx5e_nic_enable(struct mlx5e_priv *priv)</div><div class='ctx'> 	if (mlx5e_monitor_counter_supported(priv))</div><div class='ctx'> 		mlx5e_monitor_counter_init(priv);</div><div class='ctx'> </div><div class='add'>+	mlx5e_pcie_cong_event_init(priv);</div><div class='ctx'> 	mlx5e_hv_vhca_stats_create(priv);</div><div class='ctx'> 	if (netdev-&gt;reg_state != NETREG_REGISTERED)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -5829,9 +6118,11 @@ static void mlx5e_nic_enable(struct mlx5e_priv *priv)</div><div class='ctx'> 	mlx5e_nic_set_rx_mode(priv);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		mlx5e_open(netdev);</div><div class='ctx'> 	udp_tunnel_nic_reset_ntf(priv-&gt;netdev);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	netif_device_attach(netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='hunk'>@@ -5844,23 +6135,27 @@ static void mlx5e_nic_disable(struct mlx5e_priv *priv)</div><div class='ctx'> 		mlx5e_dcbnl_delete_app(priv);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(priv-&gt;netdev);</div><div class='ctx'> 	if (netif_running(priv-&gt;netdev))</div><div class='ctx'> 		mlx5e_close(priv-&gt;netdev);</div><div class='ctx'> 	netif_device_detach(priv-&gt;netdev);</div><div class='add'>+	if (priv-&gt;en_trap) {</div><div class='add'>+		mlx5e_deactivate_trap(priv);</div><div class='add'>+		mlx5e_close_trap(priv-&gt;en_trap);</div><div class='add'>+		priv-&gt;en_trap = NULL;</div><div class='add'>+	}</div><div class='add'>+	netdev_unlock(priv-&gt;netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_nic_set_rx_mode(priv);</div><div class='ctx'> </div><div class='add'>+	mlx5e_pcie_cong_event_cleanup(priv);</div><div class='ctx'> 	mlx5e_hv_vhca_stats_destroy(priv);</div><div class='ctx'> 	if (mlx5e_monitor_counter_supported(priv))</div><div class='ctx'> 		mlx5e_monitor_counter_cleanup(priv);</div><div class='ctx'> </div><div class='add'>+	mlx5e_ipsec_disable_events(priv);</div><div class='ctx'> 	mlx5e_disable_blocking_events(priv);</div><div class='del'>-	if (priv-&gt;en_trap) {</div><div class='del'>-		mlx5e_deactivate_trap(priv);</div><div class='del'>-		mlx5e_close_trap(priv-&gt;en_trap);</div><div class='del'>-		priv-&gt;en_trap = NULL;</div><div class='del'>-	}</div><div class='ctx'> 	mlx5e_disable_async_events(priv);</div><div class='ctx'> 	mlx5_lag_remove_netdev(mdev, priv-&gt;netdev);</div><div class='ctx'> 	mlx5_vxlan_reset_to_default(mdev-&gt;vxlan);</div><div class='hunk'>@@ -5870,7 +6165,7 @@ static void mlx5e_nic_disable(struct mlx5e_priv *priv)</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_update_nic_rx(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	return mlx5e_refresh_tirs(priv, false, false);</div><div class='add'>+	return mlx5e_refresh_tirs(priv-&gt;mdev, false, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct mlx5e_profile mlx5e_nic_profile = {</div><div class='hunk'>@@ -6004,8 +6299,15 @@ int mlx5e_priv_init(struct mlx5e_priv *priv,</div><div class='ctx'> 	if (!priv-&gt;channel_stats)</div><div class='ctx'> 		goto err_free_tx_rates;</div><div class='ctx'> </div><div class='add'>+	priv-&gt;fec_ranges = kcalloc(ETHTOOL_FEC_HIST_MAX,</div><div class='add'>+				   sizeof(*priv-&gt;fec_ranges), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;fec_ranges)</div><div class='add'>+		goto err_free_channel_stats;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_free_channel_stats:</div><div class='add'>+	kfree(priv-&gt;channel_stats);</div><div class='ctx'> err_free_tx_rates:</div><div class='ctx'> 	kfree(priv-&gt;tx_rates);</div><div class='ctx'> err_free_txq2sq_stats:</div><div class='hunk'>@@ -6029,6 +6331,7 @@ void mlx5e_priv_cleanup(struct mlx5e_priv *priv)</div><div class='ctx'> 	if (!priv-&gt;mdev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	kfree(priv-&gt;fec_ranges);</div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;stats_nch; i++)</div><div class='ctx'> 		kvfree(priv-&gt;channel_stats[i]);</div><div class='ctx'> 	kfree(priv-&gt;channel_stats);</div><div class='hunk'>@@ -6115,7 +6418,9 @@ static void mlx5e_update_features(struct net_device *netdev)</div><div class='ctx'> 		return; /* features will be updated on netdev registration */</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> 	netdev_update_features(netdev);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6126,7 +6431,7 @@ static void mlx5e_reset_channels(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> int mlx5e_attach_netdev(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	const bool take_rtnl = priv-&gt;netdev-&gt;reg_state == NETREG_REGISTERED;</div><div class='add'>+	const bool need_lock = priv-&gt;netdev-&gt;reg_state == NETREG_REGISTERED;</div><div class='ctx'> 	const struct mlx5e_profile *profile = priv-&gt;profile;</div><div class='ctx'> 	int max_nch;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -6168,15 +6473,19 @@ int mlx5e_attach_netdev(struct mlx5e_priv *priv)</div><div class='ctx'> 	 * 2. Set our default XPS cpumask.</div><div class='ctx'> 	 * 3. Build the RQT.</div><div class='ctx'> 	 *</div><div class='del'>-	 * rtnl_lock is required by netif_set_real_num_*_queues in case the</div><div class='add'>+	 * Locking is required by netif_set_real_num_*_queues in case the</div><div class='ctx'> 	 * netdev has been registered by this point (if this function was called</div><div class='ctx'> 	 * in the reload or resume flow).</div><div class='ctx'> 	 */</div><div class='del'>-	if (take_rtnl)</div><div class='add'>+	if (need_lock) {</div><div class='ctx'> 		rtnl_lock();</div><div class='add'>+		netdev_lock(priv-&gt;netdev);</div><div class='add'>+	}</div><div class='ctx'> 	err = mlx5e_num_channels_changed(priv);</div><div class='del'>-	if (take_rtnl)</div><div class='add'>+	if (need_lock) {</div><div class='add'>+		netdev_unlock(priv-&gt;netdev);</div><div class='ctx'> 		rtnl_unlock();</div><div class='add'>+	}</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -6511,8 +6820,24 @@ static void _mlx5e_remove(struct auxiliary_device *adev)</div><div class='ctx'> </div><div class='ctx'> 	mlx5_core_uplink_netdev_set(mdev, NULL);</div><div class='ctx'> 	mlx5e_dcbnl_delete_app(priv);</div><div class='del'>-	unregister_netdev(priv-&gt;netdev);</div><div class='del'>-	_mlx5e_suspend(adev, false);</div><div class='add'>+	/* When unload driver, the netdev is in registered state</div><div class='add'>+	 * if it's from legacy mode. If from switchdev mode, it</div><div class='add'>+	 * is already unregistered before changing to NIC profile.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;netdev-&gt;reg_state == NETREG_REGISTERED) {</div><div class='add'>+		mlx5e_psp_unregister(priv);</div><div class='add'>+		unregister_netdev(priv-&gt;netdev);</div><div class='add'>+		_mlx5e_suspend(adev, false);</div><div class='add'>+	} else {</div><div class='add'>+		struct mlx5_core_dev *pos;</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		if (test_bit(MLX5E_STATE_DESTROYING, &amp;priv-&gt;state))</div><div class='add'>+			mlx5_sd_for_each_dev(i, mdev, pos)</div><div class='add'>+				mlx5e_destroy_mdev_resources(pos);</div><div class='add'>+		else</div><div class='add'>+			_mlx5e_suspend(adev, true);</div><div class='add'>+	}</div><div class='ctx'> 	/* Avoid cleanup if profile rollback failed. */</div><div class='ctx'> 	if (priv-&gt;profile)</div><div class='ctx'> 		priv-&gt;profile-&gt;cleanup(priv);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c<br/>index 92094bf60d59..ee9595109649 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_rep.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_rep.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include &lt;linux/dim.h&gt;</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/mlx5/fs.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/switchdev.h&gt;</div><div class='ctx'> #include &lt;net/pkt_cls.h&gt;</div><div class='ctx'> #include &lt;net/act_api.h&gt;</div><div class='hunk'>@@ -65,6 +66,7 @@</div><div class='ctx'> #define MLX5E_REP_PARAMS_DEF_LOG_SQ_SIZE \</div><div class='ctx'> 	max(0x7, MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)</div><div class='ctx'> #define MLX5E_REP_PARAMS_DEF_NUM_CHANNELS 1</div><div class='add'>+#define MLX5E_REP_PARAMS_DEF_LOG_RQ_SIZE 0x8</div><div class='ctx'> </div><div class='ctx'> static const char mlx5e_rep_driver_name[] = "mlx5e_rep";</div><div class='ctx'> </div><div class='hunk'>@@ -600,7 +602,8 @@ mlx5e_add_sqs_fwd_rules(struct mlx5e_priv *priv)</div><div class='ctx'> 			if (c-&gt;xdp)</div><div class='ctx'> 				sqs[num_sqs++] = c-&gt;rq_xdpsq.sqn;</div><div class='ctx'> </div><div class='del'>-			sqs[num_sqs++] = c-&gt;xdpsq.sqn;</div><div class='add'>+			if (c-&gt;xdpsq)</div><div class='add'>+				sqs[num_sqs++] = c-&gt;xdpsq-&gt;sqn;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ptp_sq) {</div><div class='hunk'>@@ -801,6 +804,7 @@ static const struct net_device_ops mlx5e_netdev_ops_rep = {</div><div class='ctx'> 	.ndo_stop                = mlx5e_rep_close,</div><div class='ctx'> 	.ndo_start_xmit          = mlx5e_xmit,</div><div class='ctx'> 	.ndo_setup_tc            = mlx5e_rep_setup_tc,</div><div class='add'>+	.ndo_set_mac_address	 = eth_mac_addr,</div><div class='ctx'> 	.ndo_get_stats64         = mlx5e_rep_get_stats,</div><div class='ctx'> 	.ndo_has_offload_stats	 = mlx5e_rep_has_offload_stats,</div><div class='ctx'> 	.ndo_get_offload_stats	 = mlx5e_rep_get_offload_stats,</div><div class='hunk'>@@ -854,6 +858,8 @@ static void mlx5e_build_rep_params(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	/* RQ */</div><div class='ctx'> 	mlx5e_build_rq_params(mdev, params);</div><div class='add'>+	if (!mlx5e_is_uplink_rep(priv) &amp;&amp; mlx5_core_is_ecpf(mdev))</div><div class='add'>+		params-&gt;log_rq_mtu_frames = MLX5E_REP_PARAMS_DEF_LOG_RQ_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/* If netdev is already registered (e.g. move from nic profile to uplink,</div><div class='ctx'> 	 * RTNL lock must be held before triggering netdev notifiers.</div><div class='hunk'>@@ -861,7 +867,7 @@ static void mlx5e_build_rep_params(struct net_device *netdev)</div><div class='ctx'> 	if (take_rtnl)</div><div class='ctx'> 		rtnl_lock();</div><div class='ctx'> 	/* update XDP supported features */</div><div class='del'>-	mlx5e_set_xdp_feature(netdev);</div><div class='add'>+	mlx5e_set_xdp_feature(priv);</div><div class='ctx'> 	if (take_rtnl)</div><div class='ctx'> 		rtnl_unlock();</div><div class='ctx'> </div><div class='hunk'>@@ -881,10 +887,14 @@ static void mlx5e_build_rep_netdev(struct net_device *netdev,</div><div class='ctx'> {</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, mdev-&gt;device);</div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;mlx5e_netdev_ops_rep;</div><div class='add'>+	netdev-&gt;request_ops_lock = true;</div><div class='add'>+	netdev_lockdep_set_classes(netdev);</div><div class='ctx'> 	eth_hw_addr_random(netdev);</div><div class='ctx'> 	netdev-&gt;ethtool_ops = &amp;mlx5e_rep_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;watchdog_timeo    = 15 * HZ;</div><div class='add'>+	if (mlx5_core_is_ecpf(mdev))</div><div class='add'>+		netdev-&gt;tx_queue_len = 1 &lt;&lt; MLX5E_REP_PARAMS_DEF_LOG_SQ_SIZE;</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_MLX5_CLS_ACT)</div><div class='ctx'> 	netdev-&gt;hw_features    |= NETIF_F_HW_TC;</div><div class='hunk'>@@ -899,7 +909,7 @@ static void mlx5e_build_rep_netdev(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;features |= netdev-&gt;hw_features;</div><div class='ctx'> </div><div class='del'>-	netdev-&gt;netns_local = true;</div><div class='add'>+	netdev-&gt;netns_immutable = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_init_rep(struct mlx5_core_dev *mdev,</div><div class='hunk'>@@ -964,7 +974,7 @@ static int mlx5e_create_rep_ttc_table(struct mlx5e_priv *priv)</div><div class='ctx'> 						MLX5_FLOW_NAMESPACE_KERNEL), false);</div><div class='ctx'> </div><div class='ctx'> 	/* The inner_ttc in the ttc params is intentionally not set */</div><div class='del'>-	mlx5e_set_ttc_params(priv-&gt;fs, priv-&gt;rx_res, &amp;ttc_params, false);</div><div class='add'>+	mlx5e_set_ttc_params(priv-&gt;fs, priv-&gt;rx_res, &amp;ttc_params, false, false);</div><div class='ctx'> </div><div class='ctx'> 	if (rep-&gt;vport != MLX5_VPORT_UPLINK)</div><div class='ctx'> 		/* To give uplik rep TTC a lower level for chaining from root ft */</div><div class='hunk'>@@ -1338,9 +1348,11 @@ static void mlx5e_uplink_rep_enable(struct mlx5e_priv *priv)</div><div class='ctx'> 	netdev-&gt;wanted_features |= NETIF_F_HW_TC;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		mlx5e_open(netdev);</div><div class='ctx'> 	udp_tunnel_nic_reset_ntf(priv-&gt;netdev);</div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	netif_device_attach(netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> }</div><div class='hunk'>@@ -1350,9 +1362,11 @@ static void mlx5e_uplink_rep_disable(struct mlx5e_priv *priv)</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(priv-&gt;netdev);</div><div class='ctx'> 	if (netif_running(priv-&gt;netdev))</div><div class='ctx'> 		mlx5e_close(priv-&gt;netdev);</div><div class='ctx'> 	netif_device_detach(priv-&gt;netdev);</div><div class='add'>+	netdev_unlock(priv-&gt;netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_rep_bridge_cleanup(priv);</div><div class='hunk'>@@ -1433,11 +1447,11 @@ static void mlx5e_rep_vnic_reporter_create(struct mlx5e_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	reporter = devl_port_health_reporter_create(dl_port,</div><div class='ctx'> 						    &amp;mlx5_rep_vnic_reporter_ops,</div><div class='del'>-						    0, rpriv);</div><div class='add'>+						    rpriv);</div><div class='ctx'> 	if (IS_ERR(reporter)) {</div><div class='ctx'> 		mlx5_core_err(priv-&gt;mdev,</div><div class='del'>-			      "Failed to create representor vnic reporter, err = %ld\n",</div><div class='del'>-			      PTR_ERR(reporter));</div><div class='add'>+			      "Failed to create representor vnic reporter, err = %pe\n",</div><div class='add'>+			      reporter);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1492,12 +1506,21 @@ static const struct mlx5e_profile mlx5e_uplink_rep_profile = {</div><div class='ctx'> static int</div><div class='ctx'> mlx5e_vport_uplink_rep_load(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5e_priv *priv = netdev_priv(mlx5_uplink_netdev_get(dev));</div><div class='ctx'> 	struct mlx5e_rep_priv *rpriv = mlx5e_rep_to_rep_priv(rep);</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct mlx5e_priv *priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	netdev = mlx5_uplink_netdev_get(dev);</div><div class='add'>+	if (!netdev)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='add'>+	priv = netdev_priv(netdev);</div><div class='ctx'> 	rpriv-&gt;netdev = priv-&gt;netdev;</div><div class='del'>-	return mlx5e_netdev_change_profile(priv, &amp;mlx5e_uplink_rep_profile,</div><div class='del'>-					   rpriv);</div><div class='add'>+	err = mlx5e_netdev_change_profile(priv, &amp;mlx5e_uplink_rep_profile,</div><div class='add'>+					  rpriv);</div><div class='add'>+	mlx5_uplink_netdev_put(dev, netdev);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1508,6 +1531,21 @@ mlx5e_vport_uplink_rep_unload(struct mlx5e_rep_priv *rpriv)</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(netdev);</div><div class='ctx'> </div><div class='add'>+	/* This bit is set when using devlink to change eswitch mode from</div><div class='add'>+	 * switchdev to legacy. As need to keep uplink netdev ifindex, we</div><div class='add'>+	 * detach uplink representor profile and attach NIC profile only.</div><div class='add'>+	 * The netdev will be unregistered later when unload NIC auxiliary</div><div class='add'>+	 * driver for this case.</div><div class='add'>+	 * We explicitly block devlink eswitch mode change if any IPSec rules</div><div class='add'>+	 * offloaded, but can't block other cases, such as driver unload</div><div class='add'>+	 * and devlink reload. We have to unregister netdev before profile</div><div class='add'>+	 * change for those cases. This is to avoid resource leak because</div><div class='add'>+	 * the offloaded rules don't have the chance to be unoffloaded before</div><div class='add'>+	 * cleanup which is triggered by detach uplink representor profile.</div><div class='add'>+	 */</div><div class='add'>+	if (!(priv-&gt;mdev-&gt;priv.flags &amp; MLX5_PRIV_FLAGS_SWITCH_LEGACY))</div><div class='add'>+		unregister_netdev(netdev);</div><div class='add'>+</div><div class='ctx'> 	mlx5e_netdev_attach_nic_profile(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1609,8 +1647,16 @@ mlx5e_vport_rep_unload(struct mlx5_eswitch_rep *rep)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_rep_priv *rpriv = mlx5e_rep_to_rep_priv(rep);</div><div class='ctx'> 	struct net_device *netdev = rpriv-&gt;netdev;</div><div class='del'>-	struct mlx5e_priv *priv = netdev_priv(netdev);</div><div class='del'>-	void *ppriv = priv-&gt;ppriv;</div><div class='add'>+	struct mlx5e_priv *priv;</div><div class='add'>+	void *ppriv;</div><div class='add'>+</div><div class='add'>+	if (!netdev) {</div><div class='add'>+		ppriv = rpriv;</div><div class='add'>+		goto free_ppriv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(netdev);</div><div class='add'>+	ppriv = priv-&gt;ppriv;</div><div class='ctx'> </div><div class='ctx'> 	if (rep-&gt;vport == MLX5_VPORT_UPLINK) {</div><div class='ctx'> 		mlx5e_vport_uplink_rep_unload(rpriv);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c<br/>index d81083f4f316..1f6930c77437 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_rx.c</a></div><div class='hunk'>@@ -51,6 +51,7 @@</div><div class='ctx'> #include "ipoib/ipoib.h"</div><div class='ctx'> #include "en_accel/ipsec.h"</div><div class='ctx'> #include "en_accel/macsec.h"</div><div class='add'>+#include "en_accel/psp_rxtx.h"</div><div class='ctx'> #include "en_accel/ipsec_rxtx.h"</div><div class='ctx'> #include "en_accel/ktls_txrx.h"</div><div class='ctx'> #include "en/xdp.h"</div><div class='hunk'>@@ -273,33 +274,32 @@ static inline u32 mlx5e_decompress_cqes_start(struct mlx5e_rq *rq,</div><div class='ctx'> </div><div class='ctx'> #define MLX5E_PAGECNT_BIAS_MAX (PAGE_SIZE / 64)</div><div class='ctx'> </div><div class='del'>-static int mlx5e_page_alloc_fragmented(struct mlx5e_rq *rq,</div><div class='add'>+static int mlx5e_page_alloc_fragmented(struct page_pool *pp,</div><div class='ctx'> 				       struct mlx5e_frag_page *frag_page)</div><div class='ctx'> {</div><div class='del'>-	struct page *page;</div><div class='add'>+	netmem_ref netmem = page_pool_dev_alloc_netmems(pp);</div><div class='ctx'> </div><div class='del'>-	page = page_pool_dev_alloc_pages(rq-&gt;page_pool);</div><div class='del'>-	if (unlikely(!page))</div><div class='add'>+	if (unlikely(!netmem))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	page_pool_fragment_page(page, MLX5E_PAGECNT_BIAS_MAX);</div><div class='add'>+	page_pool_fragment_netmem(netmem, MLX5E_PAGECNT_BIAS_MAX);</div><div class='ctx'> </div><div class='ctx'> 	*frag_page = (struct mlx5e_frag_page) {</div><div class='del'>-		.page	= page,</div><div class='add'>+		.netmem	= netmem,</div><div class='ctx'> 		.frags	= 0,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5e_page_release_fragmented(struct mlx5e_rq *rq,</div><div class='add'>+static void mlx5e_page_release_fragmented(struct page_pool *pp,</div><div class='ctx'> 					  struct mlx5e_frag_page *frag_page)</div><div class='ctx'> {</div><div class='ctx'> 	u16 drain_count = MLX5E_PAGECNT_BIAS_MAX - frag_page-&gt;frags;</div><div class='del'>-	struct page *page = frag_page-&gt;page;</div><div class='add'>+	netmem_ref netmem = frag_page-&gt;netmem;</div><div class='ctx'> </div><div class='del'>-	if (page_pool_unref_page(page, drain_count) == 0)</div><div class='del'>-		page_pool_put_unrefed_page(rq-&gt;page_pool, page, -1, true);</div><div class='add'>+	if (page_pool_unref_netmem(netmem, drain_count) == 0)</div><div class='add'>+		page_pool_put_unrefed_netmem(pp, netmem, -1, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int mlx5e_get_rx_frag(struct mlx5e_rq *rq,</div><div class='hunk'>@@ -313,7 +313,8 @@ static inline int mlx5e_get_rx_frag(struct mlx5e_rq *rq,</div><div class='ctx'> 		 * offset) should just use the new one without replenishing again</div><div class='ctx'> 		 * by themselves.</div><div class='ctx'> 		 */</div><div class='del'>-		err = mlx5e_page_alloc_fragmented(rq, frag-&gt;frag_page);</div><div class='add'>+		err = mlx5e_page_alloc_fragmented(rq-&gt;page_pool,</div><div class='add'>+						  frag-&gt;frag_page);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -332,7 +333,7 @@ static inline void mlx5e_put_rx_frag(struct mlx5e_rq *rq,</div><div class='ctx'> 				     struct mlx5e_wqe_frag_info *frag)</div><div class='ctx'> {</div><div class='ctx'> 	if (mlx5e_frag_can_release(frag))</div><div class='del'>-		mlx5e_page_release_fragmented(rq, frag-&gt;frag_page);</div><div class='add'>+		mlx5e_page_release_fragmented(rq-&gt;page_pool, frag-&gt;frag_page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline struct mlx5e_wqe_frag_info *get_frag(struct mlx5e_rq *rq, u16 ix)</div><div class='hunk'>@@ -358,7 +359,7 @@ static int mlx5e_alloc_rx_wqe(struct mlx5e_rq *rq, struct mlx5e_rx_wqe_cyc *wqe,</div><div class='ctx'> 		frag-&gt;flags &amp;= ~BIT(MLX5E_WQE_FRAG_SKIP_RELEASE);</div><div class='ctx'> </div><div class='ctx'> 		headroom = i == 0 ? rq-&gt;buff.headroom : 0;</div><div class='del'>-		addr = page_pool_get_dma_addr(frag-&gt;frag_page-&gt;page);</div><div class='add'>+		addr = page_pool_get_dma_addr_netmem(frag-&gt;frag_page-&gt;netmem);</div><div class='ctx'> 		wqe-&gt;data[i].addr = cpu_to_be64(addr + frag-&gt;offset + headroom);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -499,9 +500,10 @@ mlx5e_add_skb_shared_info_frag(struct mlx5e_rq *rq, struct skb_shared_info *sinf</div><div class='ctx'> 			       struct xdp_buff *xdp, struct mlx5e_frag_page *frag_page,</div><div class='ctx'> 			       u32 frag_offset, u32 len)</div><div class='ctx'> {</div><div class='add'>+	netmem_ref netmem = frag_page-&gt;netmem;</div><div class='ctx'> 	skb_frag_t *frag;</div><div class='ctx'> </div><div class='del'>-	dma_addr_t addr = page_pool_get_dma_addr(frag_page-&gt;page);</div><div class='add'>+	dma_addr_t addr = page_pool_get_dma_addr_netmem(netmem);</div><div class='ctx'> </div><div class='ctx'> 	dma_sync_single_for_cpu(rq-&gt;pdev, addr + frag_offset, len, rq-&gt;buff.map_dir);</div><div class='ctx'> 	if (!xdp_buff_has_frags(xdp)) {</div><div class='hunk'>@@ -514,9 +516,9 @@ mlx5e_add_skb_shared_info_frag(struct mlx5e_rq *rq, struct skb_shared_info *sinf</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	frag = &amp;sinfo-&gt;frags[sinfo-&gt;nr_frags++];</div><div class='del'>-	skb_frag_fill_page_desc(frag, frag_page-&gt;page, frag_offset, len);</div><div class='add'>+	skb_frag_fill_netmem_desc(frag, netmem, frag_offset, len);</div><div class='ctx'> </div><div class='del'>-	if (page_is_pfmemalloc(frag_page-&gt;page))</div><div class='add'>+	if (netmem_is_pfmemalloc(netmem))</div><div class='ctx'> 		xdp_buff_set_frag_pfmemalloc(xdp);</div><div class='ctx'> 	sinfo-&gt;xdp_frags_size += len;</div><div class='ctx'> }</div><div class='hunk'>@@ -527,27 +529,29 @@ mlx5e_add_skb_frag(struct mlx5e_rq *rq, struct sk_buff *skb,</div><div class='ctx'> 		   u32 frag_offset, u32 len,</div><div class='ctx'> 		   unsigned int truesize)</div><div class='ctx'> {</div><div class='del'>-	dma_addr_t addr = page_pool_get_dma_addr(frag_page-&gt;page);</div><div class='add'>+	dma_addr_t addr = page_pool_get_dma_addr_netmem(frag_page-&gt;netmem);</div><div class='ctx'> 	u8 next_frag = skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+	netmem_ref netmem = frag_page-&gt;netmem;</div><div class='ctx'> </div><div class='ctx'> 	dma_sync_single_for_cpu(rq-&gt;pdev, addr + frag_offset, len,</div><div class='ctx'> 				rq-&gt;buff.map_dir);</div><div class='ctx'> </div><div class='del'>-	if (skb_can_coalesce(skb, next_frag, frag_page-&gt;page, frag_offset)) {</div><div class='add'>+	if (skb_can_coalesce_netmem(skb, next_frag, netmem, frag_offset)) {</div><div class='ctx'> 		skb_coalesce_rx_frag(skb, next_frag - 1, len, truesize);</div><div class='del'>-	} else {</div><div class='del'>-		frag_page-&gt;frags++;</div><div class='del'>-		skb_add_rx_frag(skb, next_frag, frag_page-&gt;page,</div><div class='del'>-				frag_offset, len, truesize);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	frag_page-&gt;frags++;</div><div class='add'>+	skb_add_rx_frag_netmem(skb, next_frag, netmem,</div><div class='add'>+			       frag_offset, len, truesize);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void</div><div class='ctx'> mlx5e_copy_skb_header(struct mlx5e_rq *rq, struct sk_buff *skb,</div><div class='del'>-		      struct page *page, dma_addr_t addr,</div><div class='add'>+		      netmem_ref netmem, dma_addr_t addr,</div><div class='ctx'> 		      int offset_from, int dma_offset, u32 headlen)</div><div class='ctx'> {</div><div class='del'>-	const void *from = page_address(page) + offset_from;</div><div class='add'>+	const void *from = netmem_address(netmem) + offset_from;</div><div class='ctx'> 	/* Aligning len to sizeof(long) optimizes memcpy performance */</div><div class='ctx'> 	unsigned int len = ALIGN(headlen, sizeof(long));</div><div class='ctx'> </div><div class='hunk'>@@ -584,7 +588,8 @@ mlx5e_free_rx_mpwqe(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi)</div><div class='ctx'> 				struct mlx5e_frag_page *frag_page;</div><div class='ctx'> </div><div class='ctx'> 				frag_page = &amp;wi-&gt;alloc_units.frag_pages[i];</div><div class='del'>-				mlx5e_page_release_fragmented(rq, frag_page);</div><div class='add'>+				mlx5e_page_release_fragmented(rq-&gt;page_pool,</div><div class='add'>+							      frag_page);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -631,95 +636,96 @@ static void build_ksm_umr(struct mlx5e_icosq *sq, struct mlx5e_umr_wqe *umr_wqe,</div><div class='ctx'> 			  __be32 key, u16 offset, u16 ksm_len)</div><div class='ctx'> {</div><div class='ctx'> 	memset(umr_wqe, 0, offsetof(struct mlx5e_umr_wqe, inline_ksms));</div><div class='del'>-	umr_wqe-&gt;ctrl.opmod_idx_opcode =</div><div class='add'>+	umr_wqe-&gt;hdr.ctrl.opmod_idx_opcode =</div><div class='ctx'> 		cpu_to_be32((sq-&gt;pc &lt;&lt; MLX5_WQE_CTRL_WQE_INDEX_SHIFT) |</div><div class='ctx'> 			     MLX5_OPCODE_UMR);</div><div class='del'>-	umr_wqe-&gt;ctrl.umr_mkey = key;</div><div class='del'>-	umr_wqe-&gt;ctrl.qpn_ds = cpu_to_be32((sq-&gt;sqn &lt;&lt; MLX5_WQE_CTRL_QPN_SHIFT)</div><div class='add'>+	umr_wqe-&gt;hdr.ctrl.umr_mkey = key;</div><div class='add'>+	umr_wqe-&gt;hdr.ctrl.qpn_ds = cpu_to_be32((sq-&gt;sqn &lt;&lt; MLX5_WQE_CTRL_QPN_SHIFT)</div><div class='ctx'> 					    | MLX5E_KSM_UMR_DS_CNT(ksm_len));</div><div class='del'>-	umr_wqe-&gt;uctrl.flags = MLX5_UMR_TRANSLATION_OFFSET_EN | MLX5_UMR_INLINE;</div><div class='del'>-	umr_wqe-&gt;uctrl.xlt_offset = cpu_to_be16(offset);</div><div class='del'>-	umr_wqe-&gt;uctrl.xlt_octowords = cpu_to_be16(ksm_len);</div><div class='del'>-	umr_wqe-&gt;uctrl.mkey_mask     = cpu_to_be64(MLX5_MKEY_MASK_FREE);</div><div class='add'>+	umr_wqe-&gt;hdr.uctrl.flags = MLX5_UMR_TRANSLATION_OFFSET_EN | MLX5_UMR_INLINE;</div><div class='add'>+	umr_wqe-&gt;hdr.uctrl.xlt_offset = cpu_to_be16(offset);</div><div class='add'>+	umr_wqe-&gt;hdr.uctrl.xlt_octowords = cpu_to_be16(ksm_len);</div><div class='add'>+	umr_wqe-&gt;hdr.uctrl.mkey_mask     = cpu_to_be64(MLX5_MKEY_MASK_FREE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5e_frag_page *mlx5e_shampo_hd_to_frag_page(struct mlx5e_rq *rq,</div><div class='add'>+							    int header_index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_shampo_hd *shampo = rq-&gt;mpwqe.shampo;</div><div class='add'>+</div><div class='add'>+	return &amp;shampo-&gt;pages[header_index &gt;&gt; shampo-&gt;log_hd_per_page];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u64 mlx5e_shampo_hd_offset(struct mlx5e_rq *rq, int header_index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_shampo_hd *shampo = rq-&gt;mpwqe.shampo;</div><div class='add'>+	u32 hd_per_page = shampo-&gt;hd_per_page;</div><div class='add'>+</div><div class='add'>+	return (header_index &amp; (hd_per_page - 1)) &lt;&lt; shampo-&gt;log_hd_entry_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5e_free_rx_shampo_hd_entry(struct mlx5e_rq *rq, u16 header_index);</div><div class='add'>+</div><div class='ctx'> static int mlx5e_build_shampo_hd_umr(struct mlx5e_rq *rq,</div><div class='ctx'> 				     struct mlx5e_icosq *sq,</div><div class='ctx'> 				     u16 ksm_entries, u16 index)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_shampo_hd *shampo = rq-&gt;mpwqe.shampo;</div><div class='del'>-	u16 entries, pi, header_offset, err, wqe_bbs, new_entries;</div><div class='add'>+	u16 pi, header_offset, err, wqe_bbs;</div><div class='ctx'> 	u32 lkey = rq-&gt;mdev-&gt;mlx5e_res.hw_objs.mkey;</div><div class='del'>-	u16 page_index = shampo-&gt;curr_page_index;</div><div class='del'>-	struct mlx5e_frag_page *frag_page;</div><div class='del'>-	u64 addr = shampo-&gt;last_addr;</div><div class='del'>-	struct mlx5e_dma_info *dma_info;</div><div class='ctx'> 	struct mlx5e_umr_wqe *umr_wqe;</div><div class='ctx'> 	int headroom, i;</div><div class='ctx'> </div><div class='ctx'> 	headroom = rq-&gt;buff.headroom;</div><div class='del'>-	new_entries = ksm_entries - (shampo-&gt;pi &amp; (MLX5_UMR_KSM_NUM_ENTRIES_ALIGNMENT - 1));</div><div class='del'>-	entries = ALIGN(ksm_entries, MLX5_UMR_KSM_NUM_ENTRIES_ALIGNMENT);</div><div class='del'>-	wqe_bbs = MLX5E_KSM_UMR_WQEBBS(entries);</div><div class='add'>+	wqe_bbs = MLX5E_KSM_UMR_WQEBBS(ksm_entries);</div><div class='ctx'> 	pi = mlx5e_icosq_get_next_pi(sq, wqe_bbs);</div><div class='ctx'> 	umr_wqe = mlx5_wq_cyc_get_wqe(&amp;sq-&gt;wq, pi);</div><div class='del'>-	build_ksm_umr(sq, umr_wqe, shampo-&gt;key, index, entries);</div><div class='del'>-</div><div class='del'>-	frag_page = &amp;shampo-&gt;pages[page_index];</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; entries; i++, index++) {</div><div class='del'>-		dma_info = &amp;shampo-&gt;info[index];</div><div class='del'>-		if (i &gt;= ksm_entries || (index &lt; shampo-&gt;pi &amp;&amp; shampo-&gt;pi - index &lt;</div><div class='del'>-					 MLX5_UMR_KSM_NUM_ENTRIES_ALIGNMENT))</div><div class='del'>-			goto update_ksm;</div><div class='del'>-		header_offset = (index &amp; (MLX5E_SHAMPO_WQ_HEADER_PER_PAGE - 1)) &lt;&lt;</div><div class='del'>-			MLX5E_SHAMPO_LOG_MAX_HEADER_ENTRY_SIZE;</div><div class='del'>-		if (!(header_offset &amp; (PAGE_SIZE - 1))) {</div><div class='del'>-			page_index = (page_index + 1) &amp; (shampo-&gt;hd_per_wq - 1);</div><div class='del'>-			frag_page = &amp;shampo-&gt;pages[page_index];</div><div class='del'>-</div><div class='del'>-			err = mlx5e_page_alloc_fragmented(rq, frag_page);</div><div class='del'>-			if (unlikely(err))</div><div class='add'>+	build_ksm_umr(sq, umr_wqe, shampo-&gt;mkey_be, index, ksm_entries);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ksm_entries; i++, index++) {</div><div class='add'>+		struct mlx5e_frag_page *frag_page;</div><div class='add'>+		u64 addr;</div><div class='add'>+</div><div class='add'>+		frag_page = mlx5e_shampo_hd_to_frag_page(rq, index);</div><div class='add'>+		header_offset = mlx5e_shampo_hd_offset(rq, index);</div><div class='add'>+		if (!header_offset) {</div><div class='add'>+			err = mlx5e_page_alloc_fragmented(rq-&gt;hd_page_pool,</div><div class='add'>+							  frag_page);</div><div class='add'>+			if (err)</div><div class='ctx'> 				goto err_unmap;</div><div class='del'>-</div><div class='del'>-			addr = page_pool_get_dma_addr(frag_page-&gt;page);</div><div class='del'>-</div><div class='del'>-			dma_info-&gt;addr = addr;</div><div class='del'>-			dma_info-&gt;frag_page = frag_page;</div><div class='del'>-		} else {</div><div class='del'>-			dma_info-&gt;addr = addr + header_offset;</div><div class='del'>-			dma_info-&gt;frag_page = frag_page;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-update_ksm:</div><div class='add'>+		addr = page_pool_get_dma_addr_netmem(frag_page-&gt;netmem);</div><div class='ctx'> 		umr_wqe-&gt;inline_ksms[i] = (struct mlx5_ksm) {</div><div class='ctx'> 			.key = cpu_to_be32(lkey),</div><div class='del'>-			.va  = cpu_to_be64(dma_info-&gt;addr + headroom),</div><div class='add'>+			.va  = cpu_to_be64(addr + header_offset + headroom),</div><div class='ctx'> 		};</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	sq-&gt;db.wqe_info[pi] = (struct mlx5e_icosq_wqe_info) {</div><div class='ctx'> 		.wqe_type	= MLX5E_ICOSQ_WQE_SHAMPO_HD_UMR,</div><div class='ctx'> 		.num_wqebbs	= wqe_bbs,</div><div class='del'>-		.shampo.len	= new_entries,</div><div class='add'>+		.shampo.len	= ksm_entries,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	shampo-&gt;pi = (shampo-&gt;pi + new_entries) &amp; (shampo-&gt;hd_per_wq - 1);</div><div class='del'>-	shampo-&gt;curr_page_index = page_index;</div><div class='del'>-	shampo-&gt;last_addr = addr;</div><div class='add'>+	shampo-&gt;pi = (shampo-&gt;pi + ksm_entries) &amp; (shampo-&gt;hd_per_wq - 1);</div><div class='ctx'> 	sq-&gt;pc += wqe_bbs;</div><div class='del'>-	sq-&gt;doorbell_cseg = &amp;umr_wqe-&gt;ctrl;</div><div class='add'>+	sq-&gt;doorbell_cseg = &amp;umr_wqe-&gt;hdr.ctrl;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_unmap:</div><div class='ctx'> 	while (--i &gt;= 0) {</div><div class='del'>-		dma_info = &amp;shampo-&gt;info[--index];</div><div class='del'>-		if (!(i &amp; (MLX5E_SHAMPO_WQ_HEADER_PER_PAGE - 1))) {</div><div class='del'>-			dma_info-&gt;addr = ALIGN_DOWN(dma_info-&gt;addr, PAGE_SIZE);</div><div class='del'>-			mlx5e_page_release_fragmented(rq, dma_info-&gt;frag_page);</div><div class='add'>+		--index;</div><div class='add'>+		header_offset = mlx5e_shampo_hd_offset(rq, index);</div><div class='add'>+		if (!header_offset) {</div><div class='add'>+			struct mlx5e_frag_page *frag_page = mlx5e_shampo_hd_to_frag_page(rq, index);</div><div class='add'>+</div><div class='add'>+			mlx5e_page_release_fragmented(rq-&gt;hd_page_pool,</div><div class='add'>+						      frag_page);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	rq-&gt;stats-&gt;buff_alloc_err++;</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -735,12 +741,12 @@ static int mlx5e_alloc_rx_hd_mpwqe(struct mlx5e_rq *rq)</div><div class='ctx'> 	ksm_entries = bitmap_find_window(shampo-&gt;bitmap,</div><div class='ctx'> 					 shampo-&gt;hd_per_wqe,</div><div class='ctx'> 					 shampo-&gt;hd_per_wq, shampo-&gt;pi);</div><div class='del'>-	ksm_entries = ALIGN_DOWN(ksm_entries, MLX5E_SHAMPO_WQ_HEADER_PER_PAGE);</div><div class='add'>+	ksm_entries = ALIGN_DOWN(ksm_entries, shampo-&gt;hd_per_page);</div><div class='ctx'> 	if (!ksm_entries)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ksm_entries += (shampo-&gt;pi &amp; (MLX5_UMR_KSM_NUM_ENTRIES_ALIGNMENT - 1));</div><div class='del'>-	index = ALIGN_DOWN(shampo-&gt;pi, MLX5_UMR_KSM_NUM_ENTRIES_ALIGNMENT);</div><div class='add'>+	/* pi is aligned to MLX5E_SHAMPO_WQ_HEADER_PER_PAGE */</div><div class='add'>+	index = shampo-&gt;pi;</div><div class='ctx'> 	entries_before = shampo-&gt;hd_per_wq - index;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(entries_before &lt; ksm_entries))</div><div class='hunk'>@@ -791,10 +797,11 @@ static int mlx5e_alloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)</div><div class='ctx'> 	for (i = 0; i &lt; rq-&gt;mpwqe.pages_per_wqe; i++, frag_page++) {</div><div class='ctx'> 		dma_addr_t addr;</div><div class='ctx'> </div><div class='del'>-		err = mlx5e_page_alloc_fragmented(rq, frag_page);</div><div class='add'>+		err = mlx5e_page_alloc_fragmented(rq-&gt;page_pool, frag_page);</div><div class='ctx'> 		if (unlikely(err))</div><div class='ctx'> 			goto err_unmap;</div><div class='del'>-		addr = page_pool_get_dma_addr(frag_page-&gt;page);</div><div class='add'>+</div><div class='add'>+		addr = page_pool_get_dma_addr_netmem(frag_page-&gt;netmem);</div><div class='ctx'> 		umr_wqe-&gt;inline_mtts[i] = (struct mlx5_mtt) {</div><div class='ctx'> 			.ptag = cpu_to_be64(addr | MLX5_EN_WR),</div><div class='ctx'> 		};</div><div class='hunk'>@@ -814,12 +821,12 @@ static int mlx5e_alloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)</div><div class='ctx'> 	bitmap_zero(wi-&gt;skip_release_bitmap, rq-&gt;mpwqe.pages_per_wqe);</div><div class='ctx'> 	wi-&gt;consumed_strides = 0;</div><div class='ctx'> </div><div class='del'>-	umr_wqe-&gt;ctrl.opmod_idx_opcode =</div><div class='add'>+	umr_wqe-&gt;hdr.ctrl.opmod_idx_opcode =</div><div class='ctx'> 		cpu_to_be32((sq-&gt;pc &lt;&lt; MLX5_WQE_CTRL_WQE_INDEX_SHIFT) |</div><div class='ctx'> 			    MLX5_OPCODE_UMR);</div><div class='ctx'> </div><div class='ctx'> 	offset = (ix * rq-&gt;mpwqe.mtts_per_wqe) * sizeof(struct mlx5_mtt) / MLX5_OCTWORD;</div><div class='del'>-	umr_wqe-&gt;uctrl.xlt_offset = cpu_to_be16(offset);</div><div class='add'>+	umr_wqe-&gt;hdr.uctrl.xlt_offset = cpu_to_be16(offset);</div><div class='ctx'> </div><div class='ctx'> 	sq-&gt;db.wqe_info[pi] = (struct mlx5e_icosq_wqe_info) {</div><div class='ctx'> 		.wqe_type   = MLX5E_ICOSQ_WQE_UMR_RX,</div><div class='hunk'>@@ -829,14 +836,14 @@ static int mlx5e_alloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix)</div><div class='ctx'> </div><div class='ctx'> 	sq-&gt;pc += rq-&gt;mpwqe.umr_wqebbs;</div><div class='ctx'> </div><div class='del'>-	sq-&gt;doorbell_cseg = &amp;umr_wqe-&gt;ctrl;</div><div class='add'>+	sq-&gt;doorbell_cseg = &amp;umr_wqe-&gt;hdr.ctrl;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_unmap:</div><div class='ctx'> 	while (--i &gt;= 0) {</div><div class='ctx'> 		frag_page--;</div><div class='del'>-		mlx5e_page_release_fragmented(rq, frag_page);</div><div class='add'>+		mlx5e_page_release_fragmented(rq-&gt;page_pool, frag_page);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bitmap_fill(wi-&gt;skip_release_bitmap, rq-&gt;mpwqe.pages_per_wqe);</div><div class='hunk'>@@ -851,13 +858,11 @@ static void</div><div class='ctx'> mlx5e_free_rx_shampo_hd_entry(struct mlx5e_rq *rq, u16 header_index)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_shampo_hd *shampo = rq-&gt;mpwqe.shampo;</div><div class='del'>-	u64 addr = shampo-&gt;info[header_index].addr;</div><div class='ctx'> </div><div class='del'>-	if (((header_index + 1) &amp; (MLX5E_SHAMPO_WQ_HEADER_PER_PAGE - 1)) == 0) {</div><div class='del'>-		struct mlx5e_dma_info *dma_info = &amp;shampo-&gt;info[header_index];</div><div class='add'>+	if (((header_index + 1) &amp; (shampo-&gt;hd_per_page - 1)) == 0) {</div><div class='add'>+		struct mlx5e_frag_page *frag_page = mlx5e_shampo_hd_to_frag_page(rq, header_index);</div><div class='ctx'> </div><div class='del'>-		dma_info-&gt;addr = ALIGN_DOWN(addr, PAGE_SIZE);</div><div class='del'>-		mlx5e_page_release_fragmented(rq, dma_info-&gt;frag_page);</div><div class='add'>+		mlx5e_page_release_fragmented(rq-&gt;hd_page_pool, frag_page);</div><div class='ctx'> 	}</div><div class='ctx'> 	clear_bit(header_index, shampo-&gt;bitmap);</div><div class='ctx'> }</div><div class='hunk'>@@ -1032,6 +1037,10 @@ int mlx5e_poll_ico_cq(struct mlx5e_cq *cq)</div><div class='ctx'> 				netdev_WARN_ONCE(cq-&gt;netdev,</div><div class='ctx'> 						 "Bad OP in ICOSQ CQE: 0x%x\n",</div><div class='ctx'> 						 get_cqe_opcode(cqe));</div><div class='add'>+#ifdef CONFIG_MLX5_EN_TLS</div><div class='add'>+				if (wi-&gt;wqe_type == MLX5E_ICOSQ_WQE_GET_PSV_TLS)</div><div class='add'>+					mlx5e_ktls_rx_resync_async_request_cancel(wi);</div><div class='add'>+#endif</div><div class='ctx'> 				mlx5e_dump_error_cqe(&amp;sq-&gt;cq, sq-&gt;sqn,</div><div class='ctx'> 						     (struct mlx5_err_cqe *)cqe);</div><div class='ctx'> 				mlx5_wq_cyc_wqe_dump(&amp;sq-&gt;wq, ci, wi-&gt;num_wqebbs);</div><div class='hunk'>@@ -1102,6 +1111,8 @@ INDIRECT_CALLABLE_SCOPE bool mlx5e_post_rx_mpwqes(struct mlx5e_rq *rq)</div><div class='ctx'> </div><div class='ctx'> 	if (rq-&gt;page_pool)</div><div class='ctx'> 		page_pool_nid_changed(rq-&gt;page_pool, numa_mem_id());</div><div class='add'>+	if (rq-&gt;hd_page_pool)</div><div class='add'>+		page_pool_nid_changed(rq-&gt;hd_page_pool, numa_mem_id());</div><div class='ctx'> </div><div class='ctx'> 	head = rq-&gt;mpwqe.actual_wq_head;</div><div class='ctx'> 	i = missing;</div><div class='hunk'>@@ -1156,8 +1167,9 @@ static void mlx5e_lro_update_tcp_hdr(struct mlx5_cqe64 *cqe, struct tcphdr *tcp)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5e_lro_update_hdr(struct sk_buff *skb, struct mlx5_cqe64 *cqe,</div><div class='del'>-				 u32 cqe_bcnt)</div><div class='add'>+static unsigned int mlx5e_lro_update_hdr(struct sk_buff *skb,</div><div class='add'>+					 struct mlx5_cqe64 *cqe,</div><div class='add'>+					 u32 cqe_bcnt)</div><div class='ctx'> {</div><div class='ctx'> 	struct ethhdr	*eth = (struct ethhdr *)(skb-&gt;data);</div><div class='ctx'> 	struct tcphdr	*tcp;</div><div class='hunk'>@@ -1207,14 +1219,17 @@ static void mlx5e_lro_update_hdr(struct sk_buff *skb, struct mlx5_cqe64 *cqe,</div><div class='ctx'> 		tcp-&gt;check = tcp_v6_check(payload_len, &amp;ipv6-&gt;saddr,</div><div class='ctx'> 					  &amp;ipv6-&gt;daddr, check);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return (unsigned int)((unsigned char *)tcp + tcp-&gt;doff * 4 - skb-&gt;data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *mlx5e_shampo_get_packet_hd(struct mlx5e_rq *rq, u16 header_index)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5e_dma_info *last_head = &amp;rq-&gt;mpwqe.shampo-&gt;info[header_index];</div><div class='del'>-	u16 head_offset = (last_head-&gt;addr &amp; (PAGE_SIZE - 1)) + rq-&gt;buff.headroom;</div><div class='add'>+	struct mlx5e_frag_page *frag_page = mlx5e_shampo_hd_to_frag_page(rq, header_index);</div><div class='add'>+	u16 head_offset = mlx5e_shampo_hd_offset(rq, header_index);</div><div class='add'>+	void *addr = netmem_address(frag_page-&gt;netmem);</div><div class='ctx'> </div><div class='del'>-	return page_address(last_head-&gt;frag_page-&gt;page) + head_offset;</div><div class='add'>+	return addr + head_offset + rq-&gt;buff.headroom;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_shampo_update_ipv4_udp_hdr(struct mlx5e_rq *rq, struct iphdr *ipv4)</div><div class='hunk'>@@ -1281,8 +1296,12 @@ static void mlx5e_shampo_update_ipv4_tcp_hdr(struct mlx5e_rq *rq, struct iphdr *</div><div class='ctx'> 	tcp-&gt;check = ~tcp_v4_check(skb-&gt;len - tcp_off, ipv4-&gt;saddr,</div><div class='ctx'> 				   ipv4-&gt;daddr, 0);</div><div class='ctx'> 	skb_shinfo(skb)-&gt;gso_type |= SKB_GSO_TCPV4;</div><div class='del'>-	if (ntohs(ipv4-&gt;id) == rq-&gt;hw_gro_data-&gt;second_ip_id)</div><div class='del'>-		skb_shinfo(skb)-&gt;gso_type |= SKB_GSO_TCP_FIXEDID;</div><div class='add'>+	if (ntohs(ipv4-&gt;id) == rq-&gt;hw_gro_data-&gt;second_ip_id) {</div><div class='add'>+		bool encap = rq-&gt;hw_gro_data-&gt;fk.control.flags &amp; FLOW_DIS_ENCAPSULATION;</div><div class='add'>+</div><div class='add'>+		skb_shinfo(skb)-&gt;gso_type |= encap ? SKB_GSO_TCP_FIXEDID_INNER :</div><div class='add'>+						     SKB_GSO_TCP_FIXEDID;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;csum_start = (unsigned char *)tcp - skb-&gt;head;</div><div class='ctx'> 	skb-&gt;csum_offset = offsetof(struct tcphdr, check);</div><div class='hunk'>@@ -1513,6 +1532,11 @@ static inline void mlx5e_handle_csum(struct net_device *netdev,</div><div class='ctx'> 		skb-&gt;ip_summed = CHECKSUM_COMPLETE;</div><div class='ctx'> 		skb-&gt;csum = csum_unfold((__force __sum16)cqe-&gt;check_sum);</div><div class='ctx'> </div><div class='add'>+		if (unlikely(mlx5e_psp_is_rx_flow(cqe))) {</div><div class='add'>+			/* TBD: PSP csum complete corrections for now chose csum_unnecessary path */</div><div class='add'>+			goto csum_unnecessary;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (test_bit(MLX5E_RQ_STATE_CSUM_FULL, &amp;rq-&gt;state))</div><div class='ctx'> 			return; /* CQE csum covers all received bytes */</div><div class='ctx'> </div><div class='hunk'>@@ -1541,7 +1565,7 @@ csum_none:</div><div class='ctx'> </div><div class='ctx'> #define MLX5E_CE_BIT_MASK 0x80</div><div class='ctx'> </div><div class='del'>-static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe,</div><div class='add'>+static inline bool mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe,</div><div class='ctx'> 				      u32 cqe_bcnt,</div><div class='ctx'> 				      struct mlx5e_rq *rq,</div><div class='ctx'> 				      struct sk_buff *skb)</div><div class='hunk'>@@ -1555,6 +1579,11 @@ static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe,</div><div class='ctx'> 	if (unlikely(get_cqe_tls_offload(cqe)))</div><div class='ctx'> 		mlx5e_ktls_handle_rx_skb(rq, skb, cqe, &amp;cqe_bcnt);</div><div class='ctx'> </div><div class='add'>+	if (unlikely(mlx5e_psp_is_rx_flow(cqe))) {</div><div class='add'>+		if (mlx5e_psp_offload_handle_rx_skb(netdev, skb, cqe))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(mlx5_ipsec_is_rx_flow(cqe)))</div><div class='ctx'> 		mlx5e_ipsec_offload_handle_rx_skb(netdev, skb,</div><div class='ctx'> 						  be32_to_cpu(cqe-&gt;ft_metadata));</div><div class='hunk'>@@ -1563,8 +1592,10 @@ static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe,</div><div class='ctx'> 		mlx5e_macsec_offload_handle_rx_skb(netdev, skb, cqe);</div><div class='ctx'> </div><div class='ctx'> 	if (lro_num_seg &gt; 1) {</div><div class='del'>-		mlx5e_lro_update_hdr(skb, cqe, cqe_bcnt);</div><div class='del'>-		skb_shinfo(skb)-&gt;gso_size = DIV_ROUND_UP(cqe_bcnt, lro_num_seg);</div><div class='add'>+		unsigned int hdrlen = mlx5e_lro_update_hdr(skb, cqe, cqe_bcnt);</div><div class='add'>+</div><div class='add'>+		skb_shinfo(skb)-&gt;gso_size = DIV_ROUND_UP(cqe_bcnt - hdrlen, lro_num_seg);</div><div class='add'>+		skb_shinfo(skb)-&gt;gso_segs = lro_num_seg;</div><div class='ctx'> 		/* Subtract one since we already counted this as one</div><div class='ctx'> 		 * "regular" packet in mlx5e_complete_rx_cqe()</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -1573,7 +1604,7 @@ static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe,</div><div class='ctx'> 		stats-&gt;lro_bytes += cqe_bcnt;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (unlikely(mlx5e_rx_hw_stamp(rq-&gt;tstamp)))</div><div class='add'>+	if (unlikely(mlx5e_rx_hw_stamp(rq-&gt;hwtstamp_config)))</div><div class='ctx'> 		skb_hwtstamps(skb)-&gt;hwtstamp = mlx5e_cqe_ts_to_ns(rq-&gt;ptp_cyc2time,</div><div class='ctx'> 								  rq-&gt;clock, get_cqe_ts(cqe));</div><div class='ctx'> 	skb_record_rx_queue(skb, rq-&gt;ix);</div><div class='hunk'>@@ -1598,9 +1629,11 @@ static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe,</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(mlx5e_skb_is_multicast(skb)))</div><div class='ctx'> 		stats-&gt;mcast_packets++;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5e_shampo_complete_rx_cqe(struct mlx5e_rq *rq,</div><div class='add'>+static bool mlx5e_shampo_complete_rx_cqe(struct mlx5e_rq *rq,</div><div class='ctx'> 					 struct mlx5_cqe64 *cqe,</div><div class='ctx'> 					 u32 cqe_bcnt,</div><div class='ctx'> 					 struct sk_buff *skb)</div><div class='hunk'>@@ -1610,16 +1643,20 @@ static void mlx5e_shampo_complete_rx_cqe(struct mlx5e_rq *rq,</div><div class='ctx'> 	stats-&gt;packets++;</div><div class='ctx'> 	stats-&gt;bytes += cqe_bcnt;</div><div class='ctx'> 	if (NAPI_GRO_CB(skb)-&gt;count != 1)</div><div class='del'>-		return;</div><div class='del'>-	mlx5e_build_rx_skb(cqe, cqe_bcnt, rq, skb);</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (mlx5e_build_rx_skb(cqe, cqe_bcnt, rq, skb))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='ctx'> 	skb_reset_network_header(skb);</div><div class='ctx'> 	if (!skb_flow_dissect_flow_keys(skb, &amp;rq-&gt;hw_gro_data-&gt;fk, 0)) {</div><div class='ctx'> 		napi_gro_receive(rq-&gt;cq.napi, skb);</div><div class='ctx'> 		rq-&gt;hw_gro_data-&gt;skb = NULL;</div><div class='ctx'> 	}</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void mlx5e_complete_rx_cqe(struct mlx5e_rq *rq,</div><div class='add'>+static inline bool mlx5e_complete_rx_cqe(struct mlx5e_rq *rq,</div><div class='ctx'> 					 struct mlx5_cqe64 *cqe,</div><div class='ctx'> 					 u32 cqe_bcnt,</div><div class='ctx'> 					 struct sk_buff *skb)</div><div class='hunk'>@@ -1628,7 +1665,7 @@ static inline void mlx5e_complete_rx_cqe(struct mlx5e_rq *rq,</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;packets++;</div><div class='ctx'> 	stats-&gt;bytes += cqe_bcnt;</div><div class='del'>-	mlx5e_build_rx_skb(cqe, cqe_bcnt, rq, skb);</div><div class='add'>+	return mlx5e_build_rx_skb(cqe, cqe_bcnt, rq, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline</div><div class='hunk'>@@ -1675,28 +1712,28 @@ mlx5e_skb_from_cqe_linear(struct mlx5e_rq *rq, struct mlx5e_wqe_frag_info *wi,</div><div class='ctx'> 	dma_addr_t addr;</div><div class='ctx'> 	u32 frag_size;</div><div class='ctx'> </div><div class='del'>-	va             = page_address(frag_page-&gt;page) + wi-&gt;offset;</div><div class='add'>+	va             = netmem_address(frag_page-&gt;netmem) + wi-&gt;offset;</div><div class='ctx'> 	data           = va + rx_headroom;</div><div class='ctx'> 	frag_size      = MLX5_SKB_FRAG_SZ(rx_headroom + cqe_bcnt);</div><div class='ctx'> </div><div class='del'>-	addr = page_pool_get_dma_addr(frag_page-&gt;page);</div><div class='add'>+	addr = page_pool_get_dma_addr_netmem(frag_page-&gt;netmem);</div><div class='ctx'> 	dma_sync_single_range_for_cpu(rq-&gt;pdev, addr, wi-&gt;offset,</div><div class='ctx'> 				      frag_size, rq-&gt;buff.map_dir);</div><div class='ctx'> 	net_prefetch(data);</div><div class='ctx'> </div><div class='ctx'> 	prog = rcu_dereference(rq-&gt;xdp_prog);</div><div class='ctx'> 	if (prog) {</div><div class='del'>-		struct mlx5e_xdp_buff mxbuf;</div><div class='add'>+		struct mlx5e_xdp_buff *mxbuf = &amp;rq-&gt;mxbuf;</div><div class='ctx'> </div><div class='ctx'> 		net_prefetchw(va); /* xdp_frame data area */</div><div class='ctx'> 		mlx5e_fill_mxbuf(rq, cqe, va, rx_headroom, rq-&gt;buff.frame0_sz,</div><div class='del'>-				 cqe_bcnt, &amp;mxbuf);</div><div class='del'>-		if (mlx5e_xdp_handle(rq, prog, &amp;mxbuf))</div><div class='add'>+				 cqe_bcnt, mxbuf);</div><div class='add'>+		if (mlx5e_xdp_handle(rq, prog, mxbuf))</div><div class='ctx'> 			return NULL; /* page/packet was consumed by XDP */</div><div class='ctx'> </div><div class='del'>-		rx_headroom = mxbuf.xdp.data - mxbuf.xdp.data_hard_start;</div><div class='del'>-		metasize = mxbuf.xdp.data - mxbuf.xdp.data_meta;</div><div class='del'>-		cqe_bcnt = mxbuf.xdp.data_end - mxbuf.xdp.data;</div><div class='add'>+		rx_headroom = mxbuf-&gt;xdp.data - mxbuf-&gt;xdp.data_hard_start;</div><div class='add'>+		metasize = mxbuf-&gt;xdp.data - mxbuf-&gt;xdp.data_meta;</div><div class='add'>+		cqe_bcnt = mxbuf-&gt;xdp.data_end - mxbuf-&gt;xdp.data;</div><div class='ctx'> 	}</div><div class='ctx'> 	frag_size = MLX5_SKB_FRAG_SZ(rx_headroom + cqe_bcnt);</div><div class='ctx'> 	skb = mlx5e_build_linear_skb(rq, va, frag_size, rx_headroom, cqe_bcnt, metasize);</div><div class='hunk'>@@ -1715,11 +1752,11 @@ mlx5e_skb_from_cqe_nonlinear(struct mlx5e_rq *rq, struct mlx5e_wqe_frag_info *wi</div><div class='ctx'> 			     struct mlx5_cqe64 *cqe, u32 cqe_bcnt)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_rq_frag_info *frag_info = &amp;rq-&gt;wqe.info.arr[0];</div><div class='add'>+	struct mlx5e_xdp_buff *mxbuf = &amp;rq-&gt;mxbuf;</div><div class='ctx'> 	struct mlx5e_wqe_frag_info *head_wi = wi;</div><div class='ctx'> 	u16 rx_headroom = rq-&gt;buff.headroom;</div><div class='ctx'> 	struct mlx5e_frag_page *frag_page;</div><div class='ctx'> 	struct skb_shared_info *sinfo;</div><div class='del'>-	struct mlx5e_xdp_buff mxbuf;</div><div class='ctx'> 	u32 frag_consumed_bytes;</div><div class='ctx'> 	struct bpf_prog *prog;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -1729,18 +1766,18 @@ mlx5e_skb_from_cqe_nonlinear(struct mlx5e_rq *rq, struct mlx5e_wqe_frag_info *wi</div><div class='ctx'> </div><div class='ctx'> 	frag_page = wi-&gt;frag_page;</div><div class='ctx'> </div><div class='del'>-	va = page_address(frag_page-&gt;page) + wi-&gt;offset;</div><div class='add'>+	va = netmem_address(frag_page-&gt;netmem) + wi-&gt;offset;</div><div class='ctx'> 	frag_consumed_bytes = min_t(u32, frag_info-&gt;frag_size, cqe_bcnt);</div><div class='ctx'> </div><div class='del'>-	addr = page_pool_get_dma_addr(frag_page-&gt;page);</div><div class='add'>+	addr = page_pool_get_dma_addr_netmem(frag_page-&gt;netmem);</div><div class='ctx'> 	dma_sync_single_range_for_cpu(rq-&gt;pdev, addr, wi-&gt;offset,</div><div class='ctx'> 				      rq-&gt;buff.frame0_sz, rq-&gt;buff.map_dir);</div><div class='ctx'> 	net_prefetchw(va); /* xdp_frame data area */</div><div class='ctx'> 	net_prefetch(va + rx_headroom);</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_fill_mxbuf(rq, cqe, va, rx_headroom, rq-&gt;buff.frame0_sz,</div><div class='del'>-			 frag_consumed_bytes, &amp;mxbuf);</div><div class='del'>-	sinfo = xdp_get_shared_info_from_buff(&amp;mxbuf.xdp);</div><div class='add'>+			 frag_consumed_bytes, mxbuf);</div><div class='add'>+	sinfo = xdp_get_shared_info_from_buff(&amp;mxbuf-&gt;xdp);</div><div class='ctx'> 	truesize = 0;</div><div class='ctx'> </div><div class='ctx'> 	cqe_bcnt -= frag_consumed_bytes;</div><div class='hunk'>@@ -1752,8 +1789,9 @@ mlx5e_skb_from_cqe_nonlinear(struct mlx5e_rq *rq, struct mlx5e_wqe_frag_info *wi</div><div class='ctx'> </div><div class='ctx'> 		frag_consumed_bytes = min_t(u32, frag_info-&gt;frag_size, cqe_bcnt);</div><div class='ctx'> </div><div class='del'>-		mlx5e_add_skb_shared_info_frag(rq, sinfo, &amp;mxbuf.xdp, frag_page,</div><div class='del'>-					       wi-&gt;offset, frag_consumed_bytes);</div><div class='add'>+		mlx5e_add_skb_shared_info_frag(rq, sinfo, &amp;mxbuf-&gt;xdp,</div><div class='add'>+					       frag_page, wi-&gt;offset,</div><div class='add'>+					       frag_consumed_bytes);</div><div class='ctx'> 		truesize += frag_info-&gt;frag_stride;</div><div class='ctx'> </div><div class='ctx'> 		cqe_bcnt -= frag_consumed_bytes;</div><div class='hunk'>@@ -1762,31 +1800,45 @@ mlx5e_skb_from_cqe_nonlinear(struct mlx5e_rq *rq, struct mlx5e_wqe_frag_info *wi</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	prog = rcu_dereference(rq-&gt;xdp_prog);</div><div class='del'>-	if (prog &amp;&amp; mlx5e_xdp_handle(rq, prog, &amp;mxbuf)) {</div><div class='del'>-		if (__test_and_clear_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq-&gt;flags)) {</div><div class='del'>-			struct mlx5e_wqe_frag_info *pwi;</div><div class='add'>+	if (prog) {</div><div class='add'>+		u8 nr_frags_free, old_nr_frags = sinfo-&gt;nr_frags;</div><div class='add'>+</div><div class='add'>+		if (mlx5e_xdp_handle(rq, prog, mxbuf)) {</div><div class='add'>+			if (__test_and_clear_bit(MLX5E_RQ_FLAG_XDP_XMIT,</div><div class='add'>+						 rq-&gt;flags)) {</div><div class='add'>+				struct mlx5e_wqe_frag_info *pwi;</div><div class='add'>+</div><div class='add'>+				wi -= old_nr_frags - sinfo-&gt;nr_frags;</div><div class='ctx'> </div><div class='del'>-			for (pwi = head_wi; pwi &lt; wi; pwi++)</div><div class='del'>-				pwi-&gt;frag_page-&gt;frags++;</div><div class='add'>+				for (pwi = head_wi; pwi &lt; wi; pwi++)</div><div class='add'>+					pwi-&gt;frag_page-&gt;frags++;</div><div class='add'>+			}</div><div class='add'>+			return NULL; /* page/packet was consumed by XDP */</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nr_frags_free = old_nr_frags - sinfo-&gt;nr_frags;</div><div class='add'>+		if (unlikely(nr_frags_free)) {</div><div class='add'>+			wi -= nr_frags_free;</div><div class='add'>+			truesize -= nr_frags_free * frag_info-&gt;frag_stride;</div><div class='ctx'> 		}</div><div class='del'>-		return NULL; /* page/packet was consumed by XDP */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	skb = mlx5e_build_linear_skb(rq, mxbuf.xdp.data_hard_start, rq-&gt;buff.frame0_sz,</div><div class='del'>-				     mxbuf.xdp.data - mxbuf.xdp.data_hard_start,</div><div class='del'>-				     mxbuf.xdp.data_end - mxbuf.xdp.data,</div><div class='del'>-				     mxbuf.xdp.data - mxbuf.xdp.data_meta);</div><div class='add'>+	skb = mlx5e_build_linear_skb(</div><div class='add'>+		rq, mxbuf-&gt;xdp.data_hard_start, rq-&gt;buff.frame0_sz,</div><div class='add'>+		mxbuf-&gt;xdp.data - mxbuf-&gt;xdp.data_hard_start,</div><div class='add'>+		mxbuf-&gt;xdp.data_end - mxbuf-&gt;xdp.data,</div><div class='add'>+		mxbuf-&gt;xdp.data - mxbuf-&gt;xdp.data_meta);</div><div class='ctx'> 	if (unlikely(!skb))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	skb_mark_for_recycle(skb);</div><div class='ctx'> 	head_wi-&gt;frag_page-&gt;frags++;</div><div class='ctx'> </div><div class='del'>-	if (xdp_buff_has_frags(&amp;mxbuf.xdp)) {</div><div class='add'>+	if (xdp_buff_has_frags(&amp;mxbuf-&gt;xdp)) {</div><div class='ctx'> 		/* sinfo-&gt;nr_frags is reset by build_skb, calculate again. */</div><div class='del'>-		xdp_update_skb_shared_info(skb, wi - head_wi - 1,</div><div class='del'>-					   sinfo-&gt;xdp_frags_size, truesize,</div><div class='del'>-					   xdp_buff_is_frag_pfmemalloc(&amp;mxbuf.xdp));</div><div class='add'>+		xdp_update_skb_frags_info(skb, wi - head_wi - 1,</div><div class='add'>+					  sinfo-&gt;xdp_frags_size, truesize,</div><div class='add'>+					  xdp_buff_get_skb_flags(&amp;mxbuf-&gt;xdp));</div><div class='ctx'> </div><div class='ctx'> 		for (struct mlx5e_wqe_frag_info *pwi = head_wi + 1; pwi &lt; wi; pwi++)</div><div class='ctx'> 			pwi-&gt;frag_page-&gt;frags++;</div><div class='hunk'>@@ -1842,7 +1894,8 @@ static void mlx5e_handle_rx_cqe(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe)</div><div class='ctx'> 		goto wq_cyc_pop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb);</div><div class='add'>+	if (mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb))</div><div class='add'>+		goto wq_cyc_pop;</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5e_cqe_regb_chain(cqe))</div><div class='ctx'> 		if (!mlx5e_tc_update_skb_nic(cqe, skb)) {</div><div class='hunk'>@@ -1889,7 +1942,8 @@ static void mlx5e_handle_rx_cqe_rep(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe)</div><div class='ctx'> 		goto wq_cyc_pop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb);</div><div class='add'>+	if (mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb))</div><div class='add'>+		goto wq_cyc_pop;</div><div class='ctx'> </div><div class='ctx'> 	if (rep-&gt;vlan &amp;&amp; skb_vlan_tag_present(skb))</div><div class='ctx'> 		skb_vlan_pop(skb);</div><div class='hunk'>@@ -1938,7 +1992,8 @@ static void mlx5e_handle_rx_cqe_mpwrq_rep(struct mlx5e_rq *rq, struct mlx5_cqe64</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		goto mpwrq_cqe_out;</div><div class='ctx'> </div><div class='del'>-	mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb);</div><div class='add'>+	if (mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb))</div><div class='add'>+		goto mpwrq_cqe_out;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_rep_tc_receive(cqe, rq, skb);</div><div class='ctx'> </div><div class='hunk'>@@ -1986,11 +2041,12 @@ mlx5e_skb_from_cqe_mpwrq_nonlinear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *w</div><div class='ctx'> 	struct mlx5e_frag_page *frag_page = &amp;wi-&gt;alloc_units.frag_pages[page_idx];</div><div class='ctx'> 	u16 headlen = min_t(u16, MLX5E_RX_MAX_HEAD, cqe_bcnt);</div><div class='ctx'> 	struct mlx5e_frag_page *head_page = frag_page;</div><div class='add'>+	struct mlx5e_xdp_buff *mxbuf = &amp;rq-&gt;mxbuf;</div><div class='ctx'> 	u32 frag_offset    = head_offset;</div><div class='ctx'> 	u32 byte_cnt       = cqe_bcnt;</div><div class='ctx'> 	struct skb_shared_info *sinfo;</div><div class='del'>-	struct mlx5e_xdp_buff mxbuf;</div><div class='ctx'> 	unsigned int truesize = 0;</div><div class='add'>+	u32 pg_consumed_bytes;</div><div class='ctx'> 	struct bpf_prog *prog;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	u32 linear_frame_sz;</div><div class='hunk'>@@ -2002,12 +2058,14 @@ mlx5e_skb_from_cqe_mpwrq_nonlinear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *w</div><div class='ctx'> </div><div class='ctx'> 	if (prog) {</div><div class='ctx'> 		/* area for bpf_xdp_[store|load]_bytes */</div><div class='del'>-		net_prefetchw(page_address(frag_page-&gt;page) + frag_offset);</div><div class='del'>-		if (unlikely(mlx5e_page_alloc_fragmented(rq, &amp;wi-&gt;linear_page))) {</div><div class='add'>+		net_prefetchw(netmem_address(frag_page-&gt;netmem) + frag_offset);</div><div class='add'>+		if (unlikely(mlx5e_page_alloc_fragmented(rq-&gt;page_pool,</div><div class='add'>+							 &amp;wi-&gt;linear_page))) {</div><div class='ctx'> 			rq-&gt;stats-&gt;buff_alloc_err++;</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='del'>-		va = page_address(wi-&gt;linear_page.page);</div><div class='add'>+</div><div class='add'>+		va = netmem_address(wi-&gt;linear_page.netmem);</div><div class='ctx'> 		net_prefetchw(va); /* xdp_frame data area */</div><div class='ctx'> 		linear_hr = XDP_PACKET_HEADROOM;</div><div class='ctx'> 		linear_data_len = 0;</div><div class='hunk'>@@ -2035,20 +2093,23 @@ mlx5e_skb_from_cqe_mpwrq_nonlinear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *w</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx5e_fill_mxbuf(rq, cqe, va, linear_hr, linear_frame_sz, linear_data_len, &amp;mxbuf);</div><div class='add'>+	mlx5e_fill_mxbuf(rq, cqe, va, linear_hr, linear_frame_sz,</div><div class='add'>+			 linear_data_len, mxbuf);</div><div class='ctx'> </div><div class='del'>-	sinfo = xdp_get_shared_info_from_buff(&amp;mxbuf.xdp);</div><div class='add'>+	sinfo = xdp_get_shared_info_from_buff(&amp;mxbuf-&gt;xdp);</div><div class='ctx'> </div><div class='ctx'> 	while (byte_cnt) {</div><div class='ctx'> 		/* Non-linear mode, hence non-XSK, which always uses PAGE_SIZE. */</div><div class='del'>-		u32 pg_consumed_bytes = min_t(u32, PAGE_SIZE - frag_offset, byte_cnt);</div><div class='add'>+		pg_consumed_bytes =</div><div class='add'>+			min_t(u32, PAGE_SIZE - frag_offset, byte_cnt);</div><div class='ctx'> </div><div class='ctx'> 		if (test_bit(MLX5E_RQ_STATE_SHAMPO, &amp;rq-&gt;state))</div><div class='ctx'> 			truesize += pg_consumed_bytes;</div><div class='ctx'> 		else</div><div class='ctx'> 			truesize += ALIGN(pg_consumed_bytes, BIT(rq-&gt;mpwqe.log_stride_sz));</div><div class='ctx'> </div><div class='del'>-		mlx5e_add_skb_shared_info_frag(rq, sinfo, &amp;mxbuf.xdp, frag_page, frag_offset,</div><div class='add'>+		mlx5e_add_skb_shared_info_frag(rq, sinfo, &amp;mxbuf-&gt;xdp,</div><div class='add'>+					       frag_page, frag_offset,</div><div class='ctx'> 					       pg_consumed_bytes);</div><div class='ctx'> 		byte_cnt -= pg_consumed_bytes;</div><div class='ctx'> 		frag_offset = 0;</div><div class='hunk'>@@ -2056,55 +2117,77 @@ mlx5e_skb_from_cqe_mpwrq_nonlinear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *w</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (prog) {</div><div class='del'>-		if (mlx5e_xdp_handle(rq, prog, &amp;mxbuf)) {</div><div class='add'>+		u8 nr_frags_free, old_nr_frags = sinfo-&gt;nr_frags;</div><div class='add'>+		u32 len;</div><div class='add'>+</div><div class='add'>+		if (mlx5e_xdp_handle(rq, prog, mxbuf)) {</div><div class='ctx'> 			if (__test_and_clear_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq-&gt;flags)) {</div><div class='ctx'> 				struct mlx5e_frag_page *pfp;</div><div class='ctx'> </div><div class='add'>+				frag_page -= old_nr_frags - sinfo-&gt;nr_frags;</div><div class='add'>+</div><div class='ctx'> 				for (pfp = head_page; pfp &lt; frag_page; pfp++)</div><div class='ctx'> 					pfp-&gt;frags++;</div><div class='ctx'> </div><div class='ctx'> 				wi-&gt;linear_page.frags++;</div><div class='ctx'> 			}</div><div class='del'>-			mlx5e_page_release_fragmented(rq, &amp;wi-&gt;linear_page);</div><div class='add'>+			mlx5e_page_release_fragmented(rq-&gt;page_pool,</div><div class='add'>+						      &amp;wi-&gt;linear_page);</div><div class='ctx'> 			return NULL; /* page/packet was consumed by XDP */</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		skb = mlx5e_build_linear_skb(rq, mxbuf.xdp.data_hard_start,</div><div class='del'>-					     linear_frame_sz,</div><div class='del'>-					     mxbuf.xdp.data - mxbuf.xdp.data_hard_start, 0,</div><div class='del'>-					     mxbuf.xdp.data - mxbuf.xdp.data_meta);</div><div class='add'>+		nr_frags_free = old_nr_frags - sinfo-&gt;nr_frags;</div><div class='add'>+		if (unlikely(nr_frags_free)) {</div><div class='add'>+			frag_page -= nr_frags_free;</div><div class='add'>+			truesize -= (nr_frags_free - 1) * PAGE_SIZE +</div><div class='add'>+				ALIGN(pg_consumed_bytes,</div><div class='add'>+				      BIT(rq-&gt;mpwqe.log_stride_sz));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		len = mxbuf-&gt;xdp.data_end - mxbuf-&gt;xdp.data;</div><div class='add'>+</div><div class='add'>+		skb = mlx5e_build_linear_skb(</div><div class='add'>+			rq, mxbuf-&gt;xdp.data_hard_start, linear_frame_sz,</div><div class='add'>+			mxbuf-&gt;xdp.data - mxbuf-&gt;xdp.data_hard_start, len,</div><div class='add'>+			mxbuf-&gt;xdp.data - mxbuf-&gt;xdp.data_meta);</div><div class='ctx'> 		if (unlikely(!skb)) {</div><div class='del'>-			mlx5e_page_release_fragmented(rq, &amp;wi-&gt;linear_page);</div><div class='add'>+			mlx5e_page_release_fragmented(rq-&gt;page_pool,</div><div class='add'>+						      &amp;wi-&gt;linear_page);</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		skb_mark_for_recycle(skb);</div><div class='ctx'> 		wi-&gt;linear_page.frags++;</div><div class='del'>-		mlx5e_page_release_fragmented(rq, &amp;wi-&gt;linear_page);</div><div class='add'>+		mlx5e_page_release_fragmented(rq-&gt;page_pool, &amp;wi-&gt;linear_page);</div><div class='ctx'> </div><div class='del'>-		if (xdp_buff_has_frags(&amp;mxbuf.xdp)) {</div><div class='add'>+		if (xdp_buff_has_frags(&amp;mxbuf-&gt;xdp)) {</div><div class='ctx'> 			struct mlx5e_frag_page *pagep;</div><div class='ctx'> </div><div class='ctx'> 			/* sinfo-&gt;nr_frags is reset by build_skb, calculate again. */</div><div class='del'>-			xdp_update_skb_shared_info(skb, frag_page - head_page,</div><div class='del'>-						   sinfo-&gt;xdp_frags_size, truesize,</div><div class='del'>-						   xdp_buff_is_frag_pfmemalloc(&amp;mxbuf.xdp));</div><div class='add'>+			xdp_update_skb_frags_info(skb, frag_page - head_page,</div><div class='add'>+						  sinfo-&gt;xdp_frags_size,</div><div class='add'>+						  truesize,</div><div class='add'>+						  xdp_buff_get_skb_flags(&amp;mxbuf-&gt;xdp));</div><div class='ctx'> </div><div class='ctx'> 			pagep = head_page;</div><div class='ctx'> 			do</div><div class='ctx'> 				pagep-&gt;frags++;</div><div class='ctx'> 			while (++pagep &lt; frag_page);</div><div class='add'>+</div><div class='add'>+			headlen = min_t(u16, MLX5E_RX_MAX_HEAD - len,</div><div class='add'>+					skb-&gt;data_len);</div><div class='add'>+			__pskb_pull_tail(skb, headlen);</div><div class='ctx'> 		}</div><div class='del'>-		__pskb_pull_tail(skb, headlen);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dma_addr_t addr;</div><div class='ctx'> </div><div class='del'>-		if (xdp_buff_has_frags(&amp;mxbuf.xdp)) {</div><div class='add'>+		if (xdp_buff_has_frags(&amp;mxbuf-&gt;xdp)) {</div><div class='ctx'> 			struct mlx5e_frag_page *pagep;</div><div class='ctx'> </div><div class='del'>-			xdp_update_skb_shared_info(skb, sinfo-&gt;nr_frags,</div><div class='del'>-						   sinfo-&gt;xdp_frags_size, truesize,</div><div class='del'>-						   xdp_buff_is_frag_pfmemalloc(&amp;mxbuf.xdp));</div><div class='add'>+			xdp_update_skb_frags_info(skb, sinfo-&gt;nr_frags,</div><div class='add'>+						  sinfo-&gt;xdp_frags_size,</div><div class='add'>+						  truesize,</div><div class='add'>+						  xdp_buff_get_skb_flags(&amp;mxbuf-&gt;xdp));</div><div class='ctx'> </div><div class='ctx'> 			pagep = frag_page - sinfo-&gt;nr_frags;</div><div class='ctx'> 			do</div><div class='hunk'>@@ -2112,8 +2195,8 @@ mlx5e_skb_from_cqe_mpwrq_nonlinear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *w</div><div class='ctx'> 			while (++pagep &lt; frag_page);</div><div class='ctx'> 		}</div><div class='ctx'> 		/* copy header */</div><div class='del'>-		addr = page_pool_get_dma_addr(head_page-&gt;page);</div><div class='del'>-		mlx5e_copy_skb_header(rq, skb, head_page-&gt;page, addr,</div><div class='add'>+		addr = page_pool_get_dma_addr_netmem(head_page-&gt;netmem);</div><div class='add'>+		mlx5e_copy_skb_header(rq, skb, head_page-&gt;netmem, addr,</div><div class='ctx'> 				      head_offset, head_offset, headlen);</div><div class='ctx'> 		/* skb linear part was allocated with headlen and aligned to long */</div><div class='ctx'> 		skb-&gt;tail += headlen;</div><div class='hunk'>@@ -2143,31 +2226,31 @@ mlx5e_skb_from_cqe_mpwrq_linear(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	va             = page_address(frag_page-&gt;page) + head_offset;</div><div class='add'>+	va             = netmem_address(frag_page-&gt;netmem) + head_offset;</div><div class='ctx'> 	data           = va + rx_headroom;</div><div class='ctx'> 	frag_size      = MLX5_SKB_FRAG_SZ(rx_headroom + cqe_bcnt);</div><div class='ctx'> </div><div class='del'>-	addr = page_pool_get_dma_addr(frag_page-&gt;page);</div><div class='add'>+	addr = page_pool_get_dma_addr_netmem(frag_page-&gt;netmem);</div><div class='ctx'> 	dma_sync_single_range_for_cpu(rq-&gt;pdev, addr, head_offset,</div><div class='ctx'> 				      frag_size, rq-&gt;buff.map_dir);</div><div class='ctx'> 	net_prefetch(data);</div><div class='ctx'> </div><div class='ctx'> 	prog = rcu_dereference(rq-&gt;xdp_prog);</div><div class='ctx'> 	if (prog) {</div><div class='del'>-		struct mlx5e_xdp_buff mxbuf;</div><div class='add'>+		struct mlx5e_xdp_buff *mxbuf = &amp;rq-&gt;mxbuf;</div><div class='ctx'> </div><div class='ctx'> 		net_prefetchw(va); /* xdp_frame data area */</div><div class='ctx'> 		mlx5e_fill_mxbuf(rq, cqe, va, rx_headroom, rq-&gt;buff.frame0_sz,</div><div class='del'>-				 cqe_bcnt, &amp;mxbuf);</div><div class='del'>-		if (mlx5e_xdp_handle(rq, prog, &amp;mxbuf)) {</div><div class='add'>+				 cqe_bcnt, mxbuf);</div><div class='add'>+		if (mlx5e_xdp_handle(rq, prog, mxbuf)) {</div><div class='ctx'> 			if (__test_and_clear_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq-&gt;flags))</div><div class='ctx'> 				frag_page-&gt;frags++;</div><div class='ctx'> 			return NULL; /* page/packet was consumed by XDP */</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		rx_headroom = mxbuf.xdp.data - mxbuf.xdp.data_hard_start;</div><div class='del'>-		metasize = mxbuf.xdp.data - mxbuf.xdp.data_meta;</div><div class='del'>-		cqe_bcnt = mxbuf.xdp.data_end - mxbuf.xdp.data;</div><div class='add'>+		rx_headroom = mxbuf-&gt;xdp.data - mxbuf-&gt;xdp.data_hard_start;</div><div class='add'>+		metasize =  mxbuf-&gt;xdp.data -  mxbuf-&gt;xdp.data_meta;</div><div class='add'>+		cqe_bcnt =  mxbuf-&gt;xdp.data_end -  mxbuf-&gt;xdp.data;</div><div class='ctx'> 	}</div><div class='ctx'> 	frag_size = MLX5_SKB_FRAG_SZ(rx_headroom + cqe_bcnt);</div><div class='ctx'> 	skb = mlx5e_build_linear_skb(rq, va, frag_size, rx_headroom, cqe_bcnt, metasize);</div><div class='hunk'>@@ -2185,29 +2268,34 @@ static struct sk_buff *</div><div class='ctx'> mlx5e_skb_from_cqe_shampo(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi,</div><div class='ctx'> 			  struct mlx5_cqe64 *cqe, u16 header_index)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5e_dma_info *head = &amp;rq-&gt;mpwqe.shampo-&gt;info[header_index];</div><div class='del'>-	u16 head_offset = head-&gt;addr &amp; (PAGE_SIZE - 1);</div><div class='add'>+	struct mlx5e_frag_page *frag_page = mlx5e_shampo_hd_to_frag_page(rq, header_index);</div><div class='add'>+	u16 head_offset = mlx5e_shampo_hd_offset(rq, header_index);</div><div class='add'>+	struct mlx5e_shampo_hd *shampo = rq-&gt;mpwqe.shampo;</div><div class='ctx'> 	u16 head_size = cqe-&gt;shampo.header_size;</div><div class='ctx'> 	u16 rx_headroom = rq-&gt;buff.headroom;</div><div class='ctx'> 	struct sk_buff *skb = NULL;</div><div class='add'>+	dma_addr_t page_dma_addr;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='ctx'> 	void *hdr, *data;</div><div class='ctx'> 	u32 frag_size;</div><div class='ctx'> </div><div class='del'>-	hdr		= page_address(head-&gt;frag_page-&gt;page) + head_offset;</div><div class='add'>+	page_dma_addr = page_pool_get_dma_addr_netmem(frag_page-&gt;netmem);</div><div class='add'>+	dma_addr = page_dma_addr + head_offset;</div><div class='add'>+</div><div class='add'>+	hdr		= netmem_address(frag_page-&gt;netmem) + head_offset;</div><div class='ctx'> 	data		= hdr + rx_headroom;</div><div class='ctx'> 	frag_size	= MLX5_SKB_FRAG_SZ(rx_headroom + head_size);</div><div class='ctx'> </div><div class='del'>-	if (likely(frag_size &lt;= BIT(MLX5E_SHAMPO_LOG_MAX_HEADER_ENTRY_SIZE))) {</div><div class='add'>+	if (likely(frag_size &lt;= BIT(shampo-&gt;log_hd_entry_size))) {</div><div class='ctx'> 		/* build SKB around header */</div><div class='del'>-		dma_sync_single_range_for_cpu(rq-&gt;pdev, head-&gt;addr, 0, frag_size, rq-&gt;buff.map_dir);</div><div class='add'>+		dma_sync_single_range_for_cpu(rq-&gt;pdev, dma_addr, 0, frag_size, rq-&gt;buff.map_dir);</div><div class='ctx'> 		net_prefetchw(hdr);</div><div class='ctx'> 		net_prefetch(data);</div><div class='ctx'> 		skb = mlx5e_build_linear_skb(rq, hdr, frag_size, rx_headroom, head_size, 0);</div><div class='del'>-</div><div class='ctx'> 		if (unlikely(!skb))</div><div class='ctx'> 			return NULL;</div><div class='ctx'> </div><div class='del'>-		head-&gt;frag_page-&gt;frags++;</div><div class='add'>+		frag_page-&gt;frags++;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* allocate SKB and copy header for large header */</div><div class='ctx'> 		rq-&gt;stats-&gt;gro_large_hds++;</div><div class='hunk'>@@ -2219,7 +2307,7 @@ mlx5e_skb_from_cqe_shampo(struct mlx5e_rq *rq, struct mlx5e_mpw_info *wi,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		net_prefetchw(skb-&gt;data);</div><div class='del'>-		mlx5e_copy_skb_header(rq, skb, head-&gt;frag_page-&gt;page, head-&gt;addr,</div><div class='add'>+		mlx5e_copy_skb_header(rq, skb, frag_page-&gt;netmem, dma_addr,</div><div class='ctx'> 				      head_offset + rx_headroom,</div><div class='ctx'> 				      rx_headroom, head_size);</div><div class='ctx'> 		/* skb linear part was allocated with headlen and aligned to long */</div><div class='hunk'>@@ -2271,7 +2359,10 @@ mlx5e_hw_gro_skb_has_enough_space(struct sk_buff *skb, u16 data_bcnt)</div><div class='ctx'> {</div><div class='ctx'> 	int nr_frags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='ctx'> </div><div class='del'>-	return PAGE_SIZE * nr_frags + data_bcnt &lt;= GRO_LEGACY_MAX_SIZE;</div><div class='add'>+	if (PAGE_SIZE &gt;= GRO_LEGACY_MAX_SIZE)</div><div class='add'>+		return skb-&gt;len + data_bcnt &lt;= GRO_LEGACY_MAX_SIZE;</div><div class='add'>+	else</div><div class='add'>+		return PAGE_SIZE * nr_frags + data_bcnt &lt;= GRO_LEGACY_MAX_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_handle_rx_cqe_mpwrq_shampo(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe)</div><div class='hunk'>@@ -2313,11 +2404,23 @@ static void mlx5e_handle_rx_cqe_mpwrq_shampo(struct mlx5e_rq *rq, struct mlx5_cq</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!*skb) {</div><div class='del'>-		if (likely(head_size))</div><div class='add'>+		if (likely(head_size)) {</div><div class='ctx'> 			*skb = mlx5e_skb_from_cqe_shampo(rq, wi, cqe, header_index);</div><div class='del'>-		else</div><div class='del'>-			*skb = mlx5e_skb_from_cqe_mpwrq_nonlinear(rq, wi, cqe, cqe_bcnt,</div><div class='del'>-								  data_offset, page_idx);</div><div class='add'>+		} else {</div><div class='add'>+			struct mlx5e_frag_page *frag_page;</div><div class='add'>+</div><div class='add'>+			frag_page = &amp;wi-&gt;alloc_units.frag_pages[page_idx];</div><div class='add'>+			/* Drop packets with header in unreadable data area to</div><div class='add'>+			 * prevent the kernel from touching it.</div><div class='add'>+			 */</div><div class='add'>+			if (unlikely(netmem_is_net_iov(frag_page-&gt;netmem)))</div><div class='add'>+				goto free_hd_entry;</div><div class='add'>+			*skb = mlx5e_skb_from_cqe_mpwrq_nonlinear(rq, wi, cqe,</div><div class='add'>+								  cqe_bcnt,</div><div class='add'>+								  data_offset,</div><div class='add'>+								  page_idx);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (unlikely(!*skb))</div><div class='ctx'> 			goto free_hd_entry;</div><div class='ctx'> </div><div class='hunk'>@@ -2351,7 +2454,10 @@ static void mlx5e_handle_rx_cqe_mpwrq_shampo(struct mlx5e_rq *rq, struct mlx5_cq</div><div class='ctx'> 		stats-&gt;hds_nosplit_bytes += data_bcnt;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx5e_shampo_complete_rx_cqe(rq, cqe, cqe_bcnt, *skb);</div><div class='add'>+	if (mlx5e_shampo_complete_rx_cqe(rq, cqe, cqe_bcnt, *skb)) {</div><div class='add'>+		*skb = NULL;</div><div class='add'>+		goto free_hd_entry;</div><div class='add'>+	}</div><div class='ctx'> 	if (flush &amp;&amp; rq-&gt;hw_gro_data-&gt;skb)</div><div class='ctx'> 		mlx5e_shampo_flush_skb(rq, cqe, match);</div><div class='ctx'> free_hd_entry:</div><div class='hunk'>@@ -2409,7 +2515,8 @@ static void mlx5e_handle_rx_cqe_mpwrq(struct mlx5e_rq *rq, struct mlx5_cqe64 *cq</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		goto mpwrq_cqe_out;</div><div class='ctx'> </div><div class='del'>-	mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb);</div><div class='add'>+	if (mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb))</div><div class='add'>+		goto mpwrq_cqe_out;</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5e_cqe_regb_chain(cqe))</div><div class='ctx'> 		if (!mlx5e_tc_update_skb_nic(cqe, skb)) {</div><div class='hunk'>@@ -2549,7 +2656,6 @@ static inline void mlx5i_complete_rx_cqe(struct mlx5e_rq *rq,</div><div class='ctx'> 					 u32 cqe_bcnt,</div><div class='ctx'> 					 struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config *tstamp;</div><div class='ctx'> 	struct mlx5e_rq_stats *stats;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct mlx5e_priv *priv;</div><div class='hunk'>@@ -2573,7 +2679,6 @@ static inline void mlx5i_complete_rx_cqe(struct mlx5e_rq *rq,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv = mlx5i_epriv(netdev);</div><div class='del'>-	tstamp = &amp;priv-&gt;tstamp;</div><div class='ctx'> 	stats = &amp;priv-&gt;channel_stats[rq-&gt;ix]-&gt;rq;</div><div class='ctx'> </div><div class='ctx'> 	flags_rqpn = be32_to_cpu(cqe-&gt;flags_rqpn);</div><div class='hunk'>@@ -2609,7 +2714,7 @@ static inline void mlx5i_complete_rx_cqe(struct mlx5e_rq *rq,</div><div class='ctx'> 		stats-&gt;csum_none++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (unlikely(mlx5e_rx_hw_stamp(tstamp)))</div><div class='add'>+	if (unlikely(mlx5e_rx_hw_stamp(&amp;priv-&gt;hwtstamp_config)))</div><div class='ctx'> 		skb_hwtstamps(skb)-&gt;hwtstamp = mlx5e_cqe_ts_to_ns(rq-&gt;ptp_cyc2time,</div><div class='ctx'> 								  rq-&gt;clock, get_cqe_ts(cqe));</div><div class='ctx'> 	skb_record_rx_queue(skb, rq-&gt;ix);</div><div class='hunk'>@@ -2742,7 +2847,8 @@ static void mlx5e_trap_handle_rx_cqe(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		goto wq_cyc_pop;</div><div class='ctx'> </div><div class='del'>-	mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb);</div><div class='add'>+	if (mlx5e_complete_rx_cqe(rq, cqe, cqe_bcnt, skb))</div><div class='add'>+		goto wq_cyc_pop;</div><div class='ctx'> 	skb_push(skb, ETH_HLEN);</div><div class='ctx'> </div><div class='ctx'> 	mlx5_devlink_trap_report(rq-&gt;mdev, trap_id, skb,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c b/drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c<br/>index 5bf8318cc48b..fcad464bc4d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include "en.h"</div><div class='ctx'> #include "en/port.h"</div><div class='ctx'> #include "eswitch.h"</div><div class='add'>+#include "lib/mlx5.h"</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_test_health_info(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -165,6 +166,9 @@ mlx5e_test_loopback_validate(struct sk_buff *skb,</div><div class='ctx'> 	struct udphdr *udph;</div><div class='ctx'> 	struct iphdr *iph;</div><div class='ctx'> </div><div class='add'>+	if (skb_linearize(skb))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='ctx'> 	/* We are only going to peek, no need to clone the SKB */</div><div class='ctx'> 	if (MLX5E_TEST_PKT_SIZE - ETH_HLEN &gt; skb_headlen(skb))</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -210,7 +214,7 @@ static int mlx5e_test_loopback_setup(struct mlx5e_priv *priv,</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_refresh_tirs(priv, true, false);</div><div class='add'>+	err = mlx5e_modify_tirs_lb(priv-&gt;mdev, true, false);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -239,7 +243,7 @@ static void mlx5e_test_loopback_cleanup(struct mlx5e_priv *priv,</div><div class='ctx'> 		mlx5_nic_vport_update_local_lb(priv-&gt;mdev, false);</div><div class='ctx'> </div><div class='ctx'> 	dev_remove_pack(&amp;lbtp-&gt;pt);</div><div class='del'>-	mlx5e_refresh_tirs(priv, false, false);</div><div class='add'>+	mlx5e_modify_tirs_lb(priv-&gt;mdev, false, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5e_cond_loopback(struct mlx5e_priv *priv)</div><div class='hunk'>@@ -247,6 +251,9 @@ static int mlx5e_cond_loopback(struct mlx5e_priv *priv)</div><div class='ctx'> 	if (is_mdev_switchdev_mode(priv-&gt;mdev))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='add'>+	if (mlx5_get_sd(priv-&gt;mdev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c<br/>index 611ec4b6f370..a2802cfc9b98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.c</a></div><div class='hunk'>@@ -37,9 +37,7 @@</div><div class='ctx'> #include "en/ptp.h"</div><div class='ctx'> #include "en/port.h"</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PAGE_POOL_STATS</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> void mlx5e_ethtool_put_stat(u64 **data, u64 val)</div><div class='ctx'> {</div><div class='hunk'>@@ -196,7 +194,6 @@ static const struct counter_desc sw_stats_desc[] = {</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_arfs_err) },</div><div class='ctx'> #endif</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_recover) },</div><div class='del'>-#ifdef CONFIG_PAGE_POOL_STATS</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_alloc_fast) },</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_alloc_slow) },</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_alloc_slow_high_order) },</div><div class='hunk'>@@ -208,7 +205,6 @@ static const struct counter_desc sw_stats_desc[] = {</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_recycle_ring) },</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_recycle_ring_full) },</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_pp_recycle_released_ref) },</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_TLS</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_decrypted_packets) },</div><div class='ctx'> 	{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_tls_decrypted_bytes) },</div><div class='hunk'>@@ -377,7 +373,6 @@ static void mlx5e_stats_grp_sw_update_stats_rq_stats(struct mlx5e_sw_stats *s,</div><div class='ctx'> 	s-&gt;rx_arfs_err                += rq_stats-&gt;arfs_err;</div><div class='ctx'> #endif</div><div class='ctx'> 	s-&gt;rx_recover                 += rq_stats-&gt;recover;</div><div class='del'>-#ifdef CONFIG_PAGE_POOL_STATS</div><div class='ctx'> 	s-&gt;rx_pp_alloc_fast          += rq_stats-&gt;pp_alloc_fast;</div><div class='ctx'> 	s-&gt;rx_pp_alloc_slow          += rq_stats-&gt;pp_alloc_slow;</div><div class='ctx'> 	s-&gt;rx_pp_alloc_empty         += rq_stats-&gt;pp_alloc_empty;</div><div class='hunk'>@@ -389,7 +384,6 @@ static void mlx5e_stats_grp_sw_update_stats_rq_stats(struct mlx5e_sw_stats *s,</div><div class='ctx'> 	s-&gt;rx_pp_recycle_ring			+= rq_stats-&gt;pp_recycle_ring;</div><div class='ctx'> 	s-&gt;rx_pp_recycle_ring_full		+= rq_stats-&gt;pp_recycle_ring_full;</div><div class='ctx'> 	s-&gt;rx_pp_recycle_released_ref		+= rq_stats-&gt;pp_recycle_released_ref;</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_TLS</div><div class='ctx'> 	s-&gt;rx_tls_decrypted_packets   += rq_stats-&gt;tls_decrypted_packets;</div><div class='ctx'> 	s-&gt;rx_tls_decrypted_bytes     += rq_stats-&gt;tls_decrypted_bytes;</div><div class='hunk'>@@ -496,7 +490,6 @@ static void mlx5e_stats_grp_sw_update_stats_qos(struct mlx5e_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PAGE_POOL_STATS</div><div class='ctx'> static void mlx5e_stats_update_stats_rq_page_pool(struct mlx5e_channel *c)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_rq_stats *rq_stats = c-&gt;rq.stats;</div><div class='hunk'>@@ -519,11 +512,6 @@ static void mlx5e_stats_update_stats_rq_page_pool(struct mlx5e_channel *c)</div><div class='ctx'> 	rq_stats-&gt;pp_recycle_ring_full = stats.recycle_stats.ring_full;</div><div class='ctx'> 	rq_stats-&gt;pp_recycle_released_ref = stats.recycle_stats.released_refcnt;</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static void mlx5e_stats_update_stats_rq_page_pool(struct mlx5e_channel *c)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(sw)</div><div class='ctx'> {</div><div class='hunk'>@@ -1227,6 +1215,13 @@ out:</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;state_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define PPORT_PHY_LAYER_OFF(c) \</div><div class='add'>+	MLX5_BYTE_OFF(ppcnt_reg, \</div><div class='add'>+		      counter_set.phys_layer_cntrs.c)</div><div class='add'>+static const struct counter_desc pport_phy_layer_cntrs_stats_desc[] = {</div><div class='add'>+	{ "link_down_events_phy", PPORT_PHY_LAYER_OFF(link_down_events) }</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define PPORT_PHY_STATISTICAL_OFF(c) \</div><div class='ctx'> 	MLX5_BYTE_OFF(ppcnt_reg, \</div><div class='ctx'> 		      counter_set.phys_layer_statistical_cntrs.c##_high)</div><div class='hunk'>@@ -1243,25 +1238,45 @@ pport_phy_statistical_err_lanes_stats_desc[] = {</div><div class='ctx'> 	{ "rx_err_lane_3_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits_lane3) },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define PPORT_PHY_RECOVERY_OFF(c) \</div><div class='add'>+	MLX5_BYTE_OFF(ppcnt_reg, counter_set.phys_layer_recovery_cntrs.c)</div><div class='add'>+static const struct counter_desc</div><div class='add'>+pport_phy_recovery_cntrs_stats_desc[] = {</div><div class='add'>+	{ "total_success_recovery_phy",</div><div class='add'>+	  PPORT_PHY_RECOVERY_OFF(total_successful_recovery_events) }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define NUM_PPORT_PHY_LAYER_COUNTERS \</div><div class='add'>+	ARRAY_SIZE(pport_phy_layer_cntrs_stats_desc)</div><div class='ctx'> #define NUM_PPORT_PHY_STATISTICAL_COUNTERS \</div><div class='ctx'> 	ARRAY_SIZE(pport_phy_statistical_stats_desc)</div><div class='ctx'> #define NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS \</div><div class='ctx'> 	ARRAY_SIZE(pport_phy_statistical_err_lanes_stats_desc)</div><div class='add'>+#define NUM_PPORT_PHY_RECOVERY_COUNTERS \</div><div class='add'>+	ARRAY_SIZE(pport_phy_recovery_cntrs_stats_desc)</div><div class='add'>+</div><div class='add'>+#define NUM_PPORT_PHY_STATISTICAL_LOOPBACK_COUNTERS(dev) \</div><div class='add'>+	(MLX5_CAP_PCAM_FEATURE(dev, ppcnt_statistical_group) ? \</div><div class='add'>+	NUM_PPORT_PHY_STATISTICAL_COUNTERS : 0)</div><div class='add'>+#define NUM_PPORT_PHY_STATISTICAL_PER_LANE_LOOPBACK_COUNTERS(dev) \</div><div class='add'>+	(MLX5_CAP_PCAM_FEATURE(dev, per_lane_error_counters) ? \</div><div class='add'>+	NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS : 0)</div><div class='add'>+#define NUM_PPORT_PHY_RECOVERY_LOOPBACK_COUNTERS(dev) \</div><div class='add'>+	(MLX5_CAP_PCAM_FEATURE(dev, ppcnt_recovery_counters) ? \</div><div class='add'>+	NUM_PPORT_PHY_RECOVERY_COUNTERS : 0)</div><div class='ctx'> </div><div class='ctx'> static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(phy)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	int num_stats;</div><div class='ctx'> </div><div class='del'>-	/* "1" for link_down_events special counter */</div><div class='del'>-	num_stats = 1;</div><div class='add'>+	num_stats = NUM_PPORT_PHY_LAYER_COUNTERS;</div><div class='ctx'> </div><div class='del'>-	num_stats += MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group) ?</div><div class='del'>-		     NUM_PPORT_PHY_STATISTICAL_COUNTERS : 0;</div><div class='add'>+	num_stats += NUM_PPORT_PHY_STATISTICAL_LOOPBACK_COUNTERS(mdev);</div><div class='ctx'> </div><div class='del'>-	num_stats += MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters) ?</div><div class='del'>-		     NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS : 0;</div><div class='add'>+	num_stats += NUM_PPORT_PHY_STATISTICAL_PER_LANE_LOOPBACK_COUNTERS(mdev);</div><div class='ctx'> </div><div class='add'>+	num_stats += NUM_PPORT_PHY_RECOVERY_LOOPBACK_COUNTERS(mdev);</div><div class='ctx'> 	return num_stats;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1270,18 +1285,22 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(phy)</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	ethtool_puts(data, "link_down_events_phy");</div><div class='del'>-</div><div class='del'>-	if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group))</div><div class='del'>-		return;</div><div class='add'>+	for (i = 0; i &lt; NUM_PPORT_PHY_LAYER_COUNTERS; i++)</div><div class='add'>+		ethtool_puts(data, pport_phy_layer_cntrs_stats_desc[i].format);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++)</div><div class='add'>+	for (i = 0; i &lt; NUM_PPORT_PHY_STATISTICAL_LOOPBACK_COUNTERS(mdev); i++)</div><div class='ctx'> 		ethtool_puts(data, pport_phy_statistical_stats_desc[i].format);</div><div class='ctx'> </div><div class='del'>-	if (MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters))</div><div class='del'>-		for (i = 0; i &lt; NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS; i++)</div><div class='del'>-			ethtool_puts(data,</div><div class='del'>-				     pport_phy_statistical_err_lanes_stats_desc[i].format);</div><div class='add'>+	for (i = 0;</div><div class='add'>+	     i &lt; NUM_PPORT_PHY_STATISTICAL_PER_LANE_LOOPBACK_COUNTERS(mdev);</div><div class='add'>+	     i++)</div><div class='add'>+		ethtool_puts(data,</div><div class='add'>+			     pport_phy_statistical_err_lanes_stats_desc[i]</div><div class='add'>+			     .format);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; NUM_PPORT_PHY_RECOVERY_LOOPBACK_COUNTERS(mdev); i++)</div><div class='add'>+		ethtool_puts(data,</div><div class='add'>+			     pport_phy_recovery_cntrs_stats_desc[i].format);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(phy)</div><div class='hunk'>@@ -1289,30 +1308,35 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(phy)</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	/* link_down_events_phy has special handling since it is not stored in __be64 format */</div><div class='del'>-	mlx5e_ethtool_put_stat(</div><div class='del'>-		data, MLX5_GET(ppcnt_reg, priv-&gt;stats.pport.phy_counters,</div><div class='del'>-			       counter_set.phys_layer_cntrs.link_down_events));</div><div class='del'>-</div><div class='del'>-	if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group))</div><div class='del'>-		return;</div><div class='add'>+	for (i = 0; i &lt; NUM_PPORT_PHY_LAYER_COUNTERS; i++)</div><div class='add'>+		mlx5e_ethtool_put_stat(</div><div class='add'>+				data,</div><div class='add'>+				MLX5E_READ_CTR32_BE(&amp;priv-&gt;stats.pport</div><div class='add'>+					.phy_counters,</div><div class='add'>+					pport_phy_layer_cntrs_stats_desc, i));</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; NUM_PPORT_PHY_STATISTICAL_COUNTERS; i++)</div><div class='add'>+	for (i = 0; i &lt; NUM_PPORT_PHY_STATISTICAL_LOOPBACK_COUNTERS(mdev); i++)</div><div class='ctx'> 		mlx5e_ethtool_put_stat(</div><div class='ctx'> 			data,</div><div class='ctx'> 			MLX5E_READ_CTR64_BE(</div><div class='ctx'> 				&amp;priv-&gt;stats.pport.phy_statistical_counters,</div><div class='ctx'> 				pport_phy_statistical_stats_desc, i));</div><div class='ctx'> </div><div class='del'>-	if (MLX5_CAP_PCAM_FEATURE(mdev, per_lane_error_counters))</div><div class='del'>-		for (i = 0; i &lt; NUM_PPORT_PHY_STATISTICAL_PER_LANE_COUNTERS; i++)</div><div class='del'>-			mlx5e_ethtool_put_stat(</div><div class='del'>-				data,</div><div class='del'>-				MLX5E_READ_CTR64_BE(</div><div class='del'>-					&amp;priv-&gt;stats.pport</div><div class='del'>-						 .phy_statistical_counters,</div><div class='del'>-					pport_phy_statistical_err_lanes_stats_desc,</div><div class='del'>-					i));</div><div class='add'>+	for (i = 0;</div><div class='add'>+	     i &lt; NUM_PPORT_PHY_STATISTICAL_PER_LANE_LOOPBACK_COUNTERS(mdev);</div><div class='add'>+	     i++)</div><div class='add'>+		mlx5e_ethtool_put_stat(</div><div class='add'>+			data,</div><div class='add'>+			MLX5E_READ_CTR64_BE(</div><div class='add'>+				&amp;priv-&gt;stats.pport.phy_statistical_counters,</div><div class='add'>+				pport_phy_statistical_err_lanes_stats_desc, i));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; NUM_PPORT_PHY_RECOVERY_LOOPBACK_COUNTERS(mdev); i++)</div><div class='add'>+		mlx5e_ethtool_put_stat(</div><div class='add'>+			data,</div><div class='add'>+			MLX5E_READ_CTR32_BE(</div><div class='add'>+				&amp;priv-&gt;stats.pport.phy_recovery_counters,</div><div class='add'>+				pport_phy_recovery_cntrs_stats_desc, i));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(phy)</div><div class='hunk'>@@ -1328,12 +1352,21 @@ static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(phy)</div><div class='ctx'> 	MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_COUNTERS_GROUP);</div><div class='ctx'> 	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);</div><div class='ctx'> </div><div class='del'>-	if (!MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group))</div><div class='del'>-		return;</div><div class='add'>+	if (MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_statistical_group)) {</div><div class='add'>+		out = pstats-&gt;phy_statistical_counters;</div><div class='add'>+		MLX5_SET(ppcnt_reg, in, grp,</div><div class='add'>+			 MLX5_PHYSICAL_LAYER_STATISTICAL_GROUP);</div><div class='add'>+		mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0,</div><div class='add'>+				     0);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	out = pstats-&gt;phy_statistical_counters;</div><div class='del'>-	MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_STATISTICAL_GROUP);</div><div class='del'>-	mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0);</div><div class='add'>+	if (MLX5_CAP_PCAM_FEATURE(mdev, ppcnt_recovery_counters)) {</div><div class='add'>+		out = pstats-&gt;phy_recovery_counters;</div><div class='add'>+		MLX5_SET(ppcnt_reg, in, grp,</div><div class='add'>+			 MLX5_PHYSICAL_LAYER_RECOVERY_GROUP);</div><div class='add'>+		mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0,</div><div class='add'>+				     0);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5e_get_link_ext_stats(struct net_device *dev,</div><div class='hunk'>@@ -1413,16 +1446,13 @@ static void fec_set_rs_stats(struct ethtool_fec_stats *fec_stats, u32 *ppcnt)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fec_set_block_stats(struct mlx5e_priv *priv,</div><div class='add'>+				int mode,</div><div class='ctx'> 				struct ethtool_fec_stats *fec_stats)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	u32 out[MLX5_ST_SZ_DW(ppcnt_reg)] = {};</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {};</div><div class='ctx'> 	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);</div><div class='del'>-	int mode = fec_active_mode(mdev);</div><div class='del'>-</div><div class='del'>-	if (mode == MLX5E_FEC_NOFEC)</div><div class='del'>-		return;</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(ppcnt_reg, in, local_port, 1);</div><div class='ctx'> 	MLX5_SET(ppcnt_reg, in, grp, MLX5_PHYSICAL_LAYER_COUNTERS_GROUP);</div><div class='hunk'>@@ -1433,6 +1463,7 @@ static void fec_set_block_stats(struct mlx5e_priv *priv,</div><div class='ctx'> 	case MLX5E_FEC_RS_528_514:</div><div class='ctx'> 	case MLX5E_FEC_RS_544_514:</div><div class='ctx'> 	case MLX5E_FEC_LLRS_272_257_1:</div><div class='add'>+	case MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD:</div><div class='ctx'> 		fec_set_rs_stats(fec_stats, out);</div><div class='ctx'> 		return;</div><div class='ctx'> 	case MLX5E_FEC_FIRECODE:</div><div class='hunk'>@@ -1460,14 +1491,132 @@ static void fec_set_corrected_bits_total(struct mlx5e_priv *priv,</div><div class='ctx'> 				      phy_corrected_bits);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define MLX5_RS_HISTOGRAM_ENTRIES \</div><div class='add'>+	(MLX5_FLD_SZ_BYTES(rs_histogram_cntrs, hist) / \</div><div class='add'>+	 MLX5_FLD_SZ_BYTES(rs_histogram_cntrs, hist[0]))</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	MLX5E_HISTOGRAM_FEC_RS_544_514 = 1,</div><div class='add'>+	MLX5E_HISTOGRAM_FEC_LLRS = 2,</div><div class='add'>+	MLX5E_HISTOGRAM_FEC_RS_528_514 = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool fec_rs_validate_hist_type(int mode, int hist_type)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case MLX5E_FEC_RS_528_514:</div><div class='add'>+		return hist_type == MLX5E_HISTOGRAM_FEC_RS_528_514;</div><div class='add'>+	case MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD:</div><div class='add'>+	case MLX5E_FEC_RS_544_514:</div><div class='add'>+		return hist_type == MLX5E_HISTOGRAM_FEC_RS_544_514;</div><div class='add'>+	case MLX5E_FEC_LLRS_272_257_1:</div><div class='add'>+		return hist_type == MLX5E_HISTOGRAM_FEC_LLRS;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8</div><div class='add'>+fec_rs_histogram_fill_ranges(struct mlx5e_priv *priv, int mode,</div><div class='add'>+			     const struct ethtool_fec_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(pphcr_reg)] = {0};</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(pphcr_reg)] = {0};</div><div class='add'>+	int sz = MLX5_ST_SZ_BYTES(pphcr_reg);</div><div class='add'>+	u8 hist_type, num_of_bins;</div><div class='add'>+</div><div class='add'>+	memset(priv-&gt;fec_ranges, 0,</div><div class='add'>+	       ETHTOOL_FEC_HIST_MAX * sizeof(*priv-&gt;fec_ranges));</div><div class='add'>+	MLX5_SET(pphcr_reg, in, local_port, 1);</div><div class='add'>+	if (mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPHCR, 0, 0))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	hist_type = MLX5_GET(pphcr_reg, out, active_hist_type);</div><div class='add'>+	if (!fec_rs_validate_hist_type(mode, hist_type))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	num_of_bins = MLX5_GET(pphcr_reg, out, num_of_bins);</div><div class='add'>+	if (WARN_ON_ONCE(num_of_bins &gt; MLX5_RS_HISTOGRAM_ENTRIES))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; num_of_bins; i++) {</div><div class='add'>+		void *bin_range = MLX5_ADDR_OF(pphcr_reg, out, bin_range[i]);</div><div class='add'>+</div><div class='add'>+		priv-&gt;fec_ranges[i].high = MLX5_GET(bin_range_layout, bin_range,</div><div class='add'>+						    high_val);</div><div class='add'>+		priv-&gt;fec_ranges[i].low = MLX5_GET(bin_range_layout, bin_range,</div><div class='add'>+						   low_val);</div><div class='add'>+	}</div><div class='add'>+	*ranges = priv-&gt;fec_ranges;</div><div class='add'>+</div><div class='add'>+	return num_of_bins;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fec_rs_histogram_fill_stats(struct mlx5e_priv *priv,</div><div class='add'>+					u8 num_of_bins,</div><div class='add'>+					struct ethtool_fec_hist *hist)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {0};</div><div class='add'>+	int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);</div><div class='add'>+	void *rs_histogram_cntrs;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(ppcnt_reg, in, local_port, 1);</div><div class='add'>+	MLX5_SET(ppcnt_reg, in, grp, MLX5_RS_FEC_HISTOGRAM_GROUP);</div><div class='add'>+	if (mlx5_core_access_reg(mdev, in, sz, out, sz, MLX5_REG_PPCNT, 0, 0))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rs_histogram_cntrs = MLX5_ADDR_OF(ppcnt_reg, out,</div><div class='add'>+					  counter_set.rs_histogram_cntrs);</div><div class='add'>+	/* Guaranteed that num_of_bins is less than MLX5E_FEC_RS_HIST_MAX</div><div class='add'>+	 * by fec_rs_histogram_fill_ranges().</div><div class='add'>+	 */</div><div class='add'>+	for (int i = 0; i &lt; num_of_bins; i++)</div><div class='add'>+		hist-&gt;values[i].sum = MLX5_GET64(rs_histogram_cntrs,</div><div class='add'>+						 rs_histogram_cntrs,</div><div class='add'>+						 hist[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fec_set_histograms_stats(struct mlx5e_priv *priv, int mode,</div><div class='add'>+				     struct ethtool_fec_hist *hist)</div><div class='add'>+{</div><div class='add'>+	u8 num_of_bins;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case MLX5E_FEC_RS_528_514:</div><div class='add'>+	case MLX5E_FEC_RS_544_514:</div><div class='add'>+	case MLX5E_FEC_LLRS_272_257_1:</div><div class='add'>+	case MLX5E_FEC_RS_544_514_INTERLEAVED_QUAD:</div><div class='add'>+		num_of_bins =</div><div class='add'>+			fec_rs_histogram_fill_ranges(priv, mode, &amp;hist-&gt;ranges);</div><div class='add'>+		if (num_of_bins)</div><div class='add'>+			return fec_rs_histogram_fill_stats(priv, num_of_bins,</div><div class='add'>+							   hist);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5e_stats_fec_get(struct mlx5e_priv *priv,</div><div class='del'>-			 struct ethtool_fec_stats *fec_stats)</div><div class='add'>+			 struct ethtool_fec_stats *fec_stats,</div><div class='add'>+			 struct ethtool_fec_hist *hist)</div><div class='ctx'> {</div><div class='del'>-	if (!MLX5_CAP_PCAM_FEATURE(priv-&gt;mdev, ppcnt_statistical_group))</div><div class='add'>+	int mode = fec_active_mode(priv-&gt;mdev);</div><div class='add'>+</div><div class='add'>+	if (mode == MLX5E_FEC_NOFEC ||</div><div class='add'>+	    !MLX5_CAP_PCAM_FEATURE(priv-&gt;mdev, ppcnt_statistical_group))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	fec_set_corrected_bits_total(priv, fec_stats);</div><div class='del'>-	fec_set_block_stats(priv, fec_stats);</div><div class='add'>+	fec_set_block_stats(priv, mode, fec_stats);</div><div class='add'>+</div><div class='add'>+	if (MLX5_CAP_PCAM_REG(priv-&gt;mdev, pphcr))</div><div class='add'>+		fec_set_histograms_stats(priv, mode, hist);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define PPORT_ETH_EXT_OFF(c) \</div><div class='hunk'>@@ -2086,7 +2235,6 @@ static const struct counter_desc rq_stats_desc[] = {</div><div class='ctx'> 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, arfs_err) },</div><div class='ctx'> #endif</div><div class='ctx'> 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, recover) },</div><div class='del'>-#ifdef CONFIG_PAGE_POOL_STATS</div><div class='ctx'> 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_alloc_fast) },</div><div class='ctx'> 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_alloc_slow) },</div><div class='ctx'> 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_alloc_slow_high_order) },</div><div class='hunk'>@@ -2098,7 +2246,6 @@ static const struct counter_desc rq_stats_desc[] = {</div><div class='ctx'> 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_recycle_ring) },</div><div class='ctx'> 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_recycle_ring_full) },</div><div class='ctx'> 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, pp_recycle_released_ref) },</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_TLS</div><div class='ctx'> 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_decrypted_packets) },</div><div class='ctx'> 	{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, tls_decrypted_bytes) },</div><div class='hunk'>@@ -2393,8 +2540,7 @@ static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(ptp)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (priv-&gt;rx_ptp_opened) {</div><div class='ctx'> 		for (i = 0; i &lt; NUM_PTP_RQ_STATS; i++)</div><div class='del'>-			ethtool_sprintf(data, ptp_rq_stats_desc[i].format,</div><div class='del'>-					MLX5E_PTP_CHANNEL_IX);</div><div class='add'>+			ethtool_puts(data, ptp_rq_stats_desc[i].format);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2582,6 +2728,7 @@ mlx5e_stats_grp_t mlx5e_nic_stats_grps[] = {</div><div class='ctx'> #ifdef CONFIG_MLX5_MACSEC</div><div class='ctx'> 	&amp;MLX5E_STATS_GRP(macsec_hw),</div><div class='ctx'> #endif</div><div class='add'>+	&amp;MLX5E_STATS_GRP(pcie_cong),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> unsigned int mlx5e_nic_stats_grps_num(struct mlx5e_priv *priv)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h<br/>index 5961c569cfe0..09f155acb461 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.h</a></div><div class='hunk'>@@ -54,7 +54,7 @@</div><div class='ctx'> #define MLX5E_DECLARE_PTP_TX_STAT(type, fld) "ptp_tx%d_"#fld, offsetof(type, fld)</div><div class='ctx'> #define MLX5E_DECLARE_PTP_CH_STAT(type, fld) "ptp_ch_"#fld, offsetof(type, fld)</div><div class='ctx'> #define MLX5E_DECLARE_PTP_CQ_STAT(type, fld) "ptp_cq%d_"#fld, offsetof(type, fld)</div><div class='del'>-#define MLX5E_DECLARE_PTP_RQ_STAT(type, fld) "ptp_rq%d_"#fld, offsetof(type, fld)</div><div class='add'>+#define MLX5E_DECLARE_PTP_RQ_STAT(type, fld) "ptp_rq0_"#fld, offsetof(type, fld)</div><div class='ctx'> </div><div class='ctx'> #define MLX5E_DECLARE_QOS_TX_STAT(type, fld) "qos_tx%d_"#fld, offsetof(type, fld)</div><div class='ctx'> </div><div class='hunk'>@@ -117,7 +117,8 @@ void mlx5e_stats_update_ndo_stats(struct mlx5e_priv *priv);</div><div class='ctx'> void mlx5e_stats_pause_get(struct mlx5e_priv *priv,</div><div class='ctx'> 			   struct ethtool_pause_stats *pause_stats);</div><div class='ctx'> void mlx5e_stats_fec_get(struct mlx5e_priv *priv,</div><div class='del'>-			 struct ethtool_fec_stats *fec_stats);</div><div class='add'>+			 struct ethtool_fec_stats *fec_stats,</div><div class='add'>+			 struct ethtool_fec_hist *hist);</div><div class='ctx'> </div><div class='ctx'> void mlx5e_stats_eth_phy_get(struct mlx5e_priv *priv,</div><div class='ctx'> 			     struct ethtool_eth_phy_stats *phy_stats);</div><div class='hunk'>@@ -215,7 +216,6 @@ struct mlx5e_sw_stats {</div><div class='ctx'> 	u64 ch_aff_change;</div><div class='ctx'> 	u64 ch_force_irq;</div><div class='ctx'> 	u64 ch_eq_rearm;</div><div class='del'>-#ifdef CONFIG_PAGE_POOL_STATS</div><div class='ctx'> 	u64 rx_pp_alloc_fast;</div><div class='ctx'> 	u64 rx_pp_alloc_slow;</div><div class='ctx'> 	u64 rx_pp_alloc_slow_high_order;</div><div class='hunk'>@@ -227,7 +227,6 @@ struct mlx5e_sw_stats {</div><div class='ctx'> 	u64 rx_pp_recycle_ring;</div><div class='ctx'> 	u64 rx_pp_recycle_ring_full;</div><div class='ctx'> 	u64 rx_pp_recycle_released_ref;</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_TLS</div><div class='ctx'> 	u64 tx_tls_encrypted_packets;</div><div class='ctx'> 	u64 tx_tls_encrypted_bytes;</div><div class='hunk'>@@ -309,6 +308,9 @@ struct mlx5e_vport_stats {</div><div class='ctx'> #define PPORT_PHY_STATISTICAL_GET(pstats, c) \</div><div class='ctx'> 	MLX5_GET64(ppcnt_reg, (pstats)-&gt;phy_statistical_counters, \</div><div class='ctx'> 		   counter_set.phys_layer_statistical_cntrs.c##_high)</div><div class='add'>+#define PPORT_PHY_RECOVERY_GET(pstats, c) \</div><div class='add'>+	MLX5_GET64(ppcnt_reg, (pstats)-&gt;phy_recovery_counters, \</div><div class='add'>+		   counter_set.phys_layer_recovery_cntrs.c)</div><div class='ctx'> #define PPORT_PER_PRIO_GET(pstats, prio, c) \</div><div class='ctx'> 	MLX5_GET64(ppcnt_reg, pstats-&gt;per_prio_counters[prio], \</div><div class='ctx'> 		   counter_set.eth_per_prio_grp_data_layout.c##_high)</div><div class='hunk'>@@ -324,6 +326,7 @@ struct mlx5e_pport_stats {</div><div class='ctx'> 	__be64 per_prio_counters[NUM_PPORT_PRIO][MLX5_ST_SZ_QW(ppcnt_reg)];</div><div class='ctx'> 	__be64 phy_counters[MLX5_ST_SZ_QW(ppcnt_reg)];</div><div class='ctx'> 	__be64 phy_statistical_counters[MLX5_ST_SZ_QW(ppcnt_reg)];</div><div class='add'>+	__be64 phy_recovery_counters[MLX5_ST_SZ_QW(ppcnt_reg)];</div><div class='ctx'> 	__be64 eth_ext_counters[MLX5_ST_SZ_QW(ppcnt_reg)];</div><div class='ctx'> 	__be64 per_tc_prio_counters[NUM_PPORT_PRIO][MLX5_ST_SZ_QW(ppcnt_reg)];</div><div class='ctx'> 	__be64 per_tc_congest_prio_counters[NUM_PPORT_PRIO][MLX5_ST_SZ_QW(ppcnt_reg)];</div><div class='hunk'>@@ -381,7 +384,6 @@ struct mlx5e_rq_stats {</div><div class='ctx'> 	u64 arfs_err;</div><div class='ctx'> #endif</div><div class='ctx'> 	u64 recover;</div><div class='del'>-#ifdef CONFIG_PAGE_POOL_STATS</div><div class='ctx'> 	u64 pp_alloc_fast;</div><div class='ctx'> 	u64 pp_alloc_slow;</div><div class='ctx'> 	u64 pp_alloc_slow_high_order;</div><div class='hunk'>@@ -393,7 +395,6 @@ struct mlx5e_rq_stats {</div><div class='ctx'> 	u64 pp_recycle_ring;</div><div class='ctx'> 	u64 pp_recycle_ring_full;</div><div class='ctx'> 	u64 pp_recycle_released_ref;</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_MLX5_EN_TLS</div><div class='ctx'> 	u64 tls_decrypted_packets;</div><div class='ctx'> 	u64 tls_decrypted_bytes;</div><div class='hunk'>@@ -535,5 +536,6 @@ extern MLX5E_DECLARE_STATS_GRP(ipsec_hw);</div><div class='ctx'> extern MLX5E_DECLARE_STATS_GRP(ipsec_sw);</div><div class='ctx'> extern MLX5E_DECLARE_STATS_GRP(ptp);</div><div class='ctx'> extern MLX5E_DECLARE_STATS_GRP(macsec_hw);</div><div class='add'>+extern MLX5E_DECLARE_STATS_GRP(pcie_cong);</div><div class='ctx'> </div><div class='ctx'> #endif /* __MLX5_EN_STATS_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c<br/>index 6b3b1afe8312..a8773b2342c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_tc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_tc.c</a></div><div class='hunk'>@@ -66,6 +66,7 @@</div><div class='ctx'> #include "lib/devcom.h"</div><div class='ctx'> #include "lib/geneve.h"</div><div class='ctx'> #include "lib/fs_chains.h"</div><div class='add'>+#include "lib/mlx5.h"</div><div class='ctx'> #include "diag/en_tc_tracepoint.h"</div><div class='ctx'> #include &lt;asm/div64.h&gt;</div><div class='ctx'> #include "lag/lag.h"</div><div class='hunk'>@@ -757,11 +758,11 @@ static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)</div><div class='ctx'> 	struct mlx5e_priv *priv = hp-&gt;func_priv;</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='ctx'> 	struct mlx5e_rss_params_indir indir;</div><div class='add'>+	u32 rqt_size;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = mlx5e_rss_params_indir_init(&amp;indir, mdev,</div><div class='del'>-					  mlx5e_rqt_size(mdev, hp-&gt;num_channels),</div><div class='del'>-					  mlx5e_rqt_size(mdev, hp-&gt;num_channels));</div><div class='add'>+	rqt_size = mlx5e_rqt_size(mdev, hp-&gt;num_channels);</div><div class='add'>+	err = mlx5e_rss_params_indir_init(&amp;indir, rqt_size, rqt_size);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -837,6 +838,9 @@ static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,</div><div class='ctx'> </div><div class='ctx'> 	ttc_params-&gt;ns_type = MLX5_FLOW_NAMESPACE_KERNEL;</div><div class='ctx'> 	for (tt = 0; tt &lt; MLX5_NUM_TT; tt++) {</div><div class='add'>+		if (mlx5_ttc_is_decrypted_esp_tt(tt))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		ttc_params-&gt;dests[tt].type = MLX5_FLOW_DESTINATION_TYPE_TIR;</div><div class='ctx'> 		ttc_params-&gt;dests[tt].tir_num =</div><div class='ctx'> 			tt == MLX5_TT_ANY ?</div><div class='hunk'>@@ -1282,7 +1286,7 @@ mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	if (flow_act.action &amp; MLX5_FLOW_CONTEXT_ACTION_COUNT) {</div><div class='ctx'> 		dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-		dest[dest_ix].counter_id = mlx5_fc_id(attr-&gt;counter);</div><div class='add'>+		dest[dest_ix].counter = attr-&gt;counter;</div><div class='ctx'> 		dest_ix++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1750,9 +1754,6 @@ extra_split_attr_dests_needed(struct mlx5e_tc_flow *flow, struct mlx5_flow_attr</div><div class='ctx'> 	    !list_is_first(&amp;attr-&gt;list, &amp;flow-&gt;attrs))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (flow_flag_test(flow, SLOW))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	esw_attr = attr-&gt;esw_attr;</div><div class='ctx'> 	if (!esw_attr-&gt;split_count ||</div><div class='ctx'> 	    esw_attr-&gt;split_count == esw_attr-&gt;out_count - 1)</div><div class='hunk'>@@ -1766,7 +1767,7 @@ extra_split_attr_dests_needed(struct mlx5e_tc_flow *flow, struct mlx5_flow_attr</div><div class='ctx'> 	for (i = esw_attr-&gt;split_count; i &lt; esw_attr-&gt;out_count; i++) {</div><div class='ctx'> 		/* external dest with encap is considered as internal by firmware */</div><div class='ctx'> 		if (esw_attr-&gt;dests[i].vport == MLX5_VPORT_UPLINK &amp;&amp;</div><div class='del'>-		    !(esw_attr-&gt;dests[i].flags &amp; MLX5_ESW_DEST_ENCAP_VALID))</div><div class='add'>+		    !(esw_attr-&gt;dests[i].flags &amp; MLX5_ESW_DEST_ENCAP))</div><div class='ctx'> 			ext_dest = true;</div><div class='ctx'> 		else</div><div class='ctx'> 			int_dest = true;</div><div class='hunk'>@@ -2031,9 +2032,8 @@ err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool mlx5_flow_has_geneve_opt(struct mlx5e_tc_flow *flow)</div><div class='add'>+static bool mlx5_flow_has_geneve_opt(struct mlx5_flow_spec *spec)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_flow_spec *spec = &amp;flow-&gt;attr-&gt;parse_attr-&gt;spec;</div><div class='ctx'> 	void *headers_v = MLX5_ADDR_OF(fte_match_param,</div><div class='ctx'> 				       spec-&gt;match_value,</div><div class='ctx'> 				       misc_parameters_3);</div><div class='hunk'>@@ -2072,7 +2072,7 @@ static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> 	complete_all(&amp;flow-&gt;del_hw_done);</div><div class='ctx'> </div><div class='del'>-	if (mlx5_flow_has_geneve_opt(flow))</div><div class='add'>+	if (mlx5_flow_has_geneve_opt(&amp;attr-&gt;parse_attr-&gt;spec))</div><div class='ctx'> 		mlx5_geneve_tlv_option_del(priv-&gt;mdev-&gt;geneve);</div><div class='ctx'> </div><div class='ctx'> 	if (flow-&gt;decap_route)</div><div class='hunk'>@@ -2577,12 +2577,13 @@ static int parse_tunnel_attr(struct mlx5e_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 		err = mlx5e_tc_tun_parse(filter_dev, priv, tmp_spec, f, match_level);</div><div class='ctx'> 		if (err) {</div><div class='del'>-			kvfree(tmp_spec);</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack, "Failed to parse tunnel attributes");</div><div class='ctx'> 			netdev_warn(priv-&gt;netdev, "Failed to parse tunnel attributes");</div><div class='del'>-			return err;</div><div class='add'>+		} else {</div><div class='add'>+			err = mlx5e_tc_set_attr_rx_tun(flow, tmp_spec);</div><div class='ctx'> 		}</div><div class='del'>-		err = mlx5e_tc_set_attr_rx_tun(flow, tmp_spec);</div><div class='add'>+		if (mlx5_flow_has_geneve_opt(tmp_spec))</div><div class='add'>+			mlx5_geneve_tlv_option_del(priv-&gt;mdev-&gt;geneve);</div><div class='ctx'> 		kvfree(tmp_spec);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='hunk'>@@ -3613,15 +3614,11 @@ static bool same_port_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv</div><div class='ctx'> bool mlx5e_same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *fmdev, *pmdev;</div><div class='del'>-	u64 fsystem_guid, psystem_guid;</div><div class='ctx'> </div><div class='ctx'> 	fmdev = priv-&gt;mdev;</div><div class='ctx'> 	pmdev = peer_priv-&gt;mdev;</div><div class='ctx'> </div><div class='del'>-	fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);</div><div class='del'>-	psystem_guid = mlx5_query_nic_system_image_guid(pmdev);</div><div class='del'>-</div><div class='del'>-	return (fsystem_guid == psystem_guid);</div><div class='add'>+	return mlx5_same_hw_devs(fmdev, pmdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -5236,10 +5233,11 @@ static void mlx5e_tc_nic_destroy_miss_table(struct mlx5e_priv *priv)</div><div class='ctx'> int mlx5e_tc_nic_init(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_tc_table *tc = mlx5e_fs_get_tc(priv-&gt;fs);</div><div class='add'>+	u8 mapping_id[MLX5_SW_IMAGE_GUID_MAX_BYTES];</div><div class='ctx'> 	struct mlx5_core_dev *dev = priv-&gt;mdev;</div><div class='ctx'> 	struct mapping_ctx *chains_mapping;</div><div class='ctx'> 	struct mlx5_chains_attr attr = {};</div><div class='del'>-	u64 mapping_id;</div><div class='add'>+	u8 id_len;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	mlx5e_mod_hdr_tbl_init(&amp;tc-&gt;mod_hdr);</div><div class='hunk'>@@ -5255,11 +5253,13 @@ int mlx5e_tc_nic_init(struct mlx5e_priv *priv)</div><div class='ctx'> 	lockdep_set_class(&amp;tc-&gt;ht.mutex, &amp;tc_ht_lock_key);</div><div class='ctx'> 	lockdep_init_map(&amp;tc-&gt;ht.run_work.lockdep_map, "tc_ht_wq_key", &amp;tc_ht_wq_key, 0);</div><div class='ctx'> </div><div class='del'>-	mapping_id = mlx5_query_nic_system_image_guid(dev);</div><div class='add'>+	mlx5_query_nic_sw_system_image_guid(dev, mapping_id, &amp;id_len);</div><div class='ctx'> </div><div class='del'>-	chains_mapping = mapping_create_for_id(mapping_id, MAPPING_TYPE_CHAIN,</div><div class='add'>+	chains_mapping = mapping_create_for_id(mapping_id, id_len,</div><div class='add'>+					       MAPPING_TYPE_CHAIN,</div><div class='ctx'> 					       sizeof(struct mlx5_mapped_obj),</div><div class='del'>-					       MLX5E_TC_TABLE_CHAIN_TAG_MASK, true);</div><div class='add'>+					       MLX5E_TC_TABLE_CHAIN_TAG_MASK,</div><div class='add'>+					       true);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(chains_mapping)) {</div><div class='ctx'> 		err = PTR_ERR(chains_mapping);</div><div class='hunk'>@@ -5390,13 +5390,15 @@ void mlx5e_tc_ht_cleanup(struct rhashtable *tc_ht)</div><div class='ctx'> int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv)</div><div class='ctx'> {</div><div class='ctx'> 	const size_t sz_enc_opts = sizeof(struct tunnel_match_enc_opts);</div><div class='add'>+	u8 mapping_id[MLX5_SW_IMAGE_GUID_MAX_BYTES];</div><div class='add'>+	struct mlx5_devcom_match_attr attr = {};</div><div class='ctx'> 	struct netdev_phys_item_id ppid;</div><div class='ctx'> 	struct mlx5e_rep_priv *rpriv;</div><div class='ctx'> 	struct mapping_ctx *mapping;</div><div class='ctx'> 	struct mlx5_eswitch *esw;</div><div class='ctx'> 	struct mlx5e_priv *priv;</div><div class='del'>-	u64 mapping_id, key;</div><div class='ctx'> 	int err = 0;</div><div class='add'>+	u8 id_len;</div><div class='ctx'> </div><div class='ctx'> 	rpriv = container_of(uplink_priv, struct mlx5e_rep_priv, uplink_priv);</div><div class='ctx'> 	priv = netdev_priv(rpriv-&gt;netdev);</div><div class='hunk'>@@ -5414,9 +5416,9 @@ int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv)</div><div class='ctx'> </div><div class='ctx'> 	uplink_priv-&gt;tc_psample = mlx5e_tc_sample_init(esw, uplink_priv-&gt;post_act);</div><div class='ctx'> </div><div class='del'>-	mapping_id = mlx5_query_nic_system_image_guid(esw-&gt;dev);</div><div class='add'>+	mlx5_query_nic_sw_system_image_guid(esw-&gt;dev, mapping_id, &amp;id_len);</div><div class='ctx'> </div><div class='del'>-	mapping = mapping_create_for_id(mapping_id, MAPPING_TYPE_TUNNEL,</div><div class='add'>+	mapping = mapping_create_for_id(mapping_id, id_len, MAPPING_TYPE_TUNNEL,</div><div class='ctx'> 					sizeof(struct tunnel_match_key),</div><div class='ctx'> 					TUNNEL_INFO_BITS_MASK, true);</div><div class='ctx'> </div><div class='hunk'>@@ -5429,8 +5431,10 @@ int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv)</div><div class='ctx'> 	/* Two last values are reserved for stack devices slow path table mark</div><div class='ctx'> 	 * and bridge ingress push mark.</div><div class='ctx'> 	 */</div><div class='del'>-	mapping = mapping_create_for_id(mapping_id, MAPPING_TYPE_TUNNEL_ENC_OPTS,</div><div class='del'>-					sz_enc_opts, ENC_OPTS_BITS_MASK - 2, true);</div><div class='add'>+	mapping = mapping_create_for_id(mapping_id, id_len,</div><div class='add'>+					MAPPING_TYPE_TUNNEL_ENC_OPTS,</div><div class='add'>+					sz_enc_opts, ENC_OPTS_BITS_MASK - 2,</div><div class='add'>+					true);</div><div class='ctx'> 	if (IS_ERR(mapping)) {</div><div class='ctx'> 		err = PTR_ERR(mapping);</div><div class='ctx'> 		goto err_enc_opts_mapping;</div><div class='hunk'>@@ -5449,10 +5453,12 @@ int mlx5e_tc_esw_init(struct mlx5_rep_uplink_priv *uplink_priv)</div><div class='ctx'> 		goto err_action_counter;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = dev_get_port_parent_id(priv-&gt;netdev, &amp;ppid, false);</div><div class='add'>+	err = netif_get_port_parent_id(priv-&gt;netdev, &amp;ppid, false);</div><div class='ctx'> 	if (!err) {</div><div class='del'>-		memcpy(&amp;key, &amp;ppid.id, sizeof(key));</div><div class='del'>-		mlx5_esw_offloads_devcom_init(esw, key);</div><div class='add'>+		memcpy(&amp;attr.key.buf, &amp;ppid.id, ppid.id_len);</div><div class='add'>+		attr.flags = MLX5_DEVCOM_MATCH_FLAGS_NS;</div><div class='add'>+		attr.net = mlx5_core_net(esw-&gt;dev);</div><div class='add'>+		mlx5_esw_offloads_devcom_init(esw, &amp;attr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c<br/>index f8c7912abe0e..14884b9ea7f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_tx.c</a></div><div class='hunk'>@@ -39,6 +39,7 @@</div><div class='ctx'> #include "ipoib/ipoib.h"</div><div class='ctx'> #include "en_accel/en_accel.h"</div><div class='ctx'> #include "en_accel/ipsec_rxtx.h"</div><div class='add'>+#include "en_accel/psp_rxtx.h"</div><div class='ctx'> #include "en_accel/macsec.h"</div><div class='ctx'> #include "en/ptp.h"</div><div class='ctx'> #include &lt;net/ipv6.h&gt;</div><div class='hunk'>@@ -120,6 +121,11 @@ mlx5e_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> 			    struct mlx5e_accel_tx_state *accel,</div><div class='ctx'> 			    struct mlx5_wqe_eth_seg *eseg)</div><div class='ctx'> {</div><div class='add'>+#ifdef CONFIG_MLX5_EN_PSP</div><div class='add'>+	if (unlikely(mlx5e_psp_txwqe_build_eseg_csum(sq, skb, &amp;accel-&gt;psp_st, eseg)))</div><div class='add'>+		return;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	if (unlikely(mlx5e_ipsec_txwqe_build_eseg_csum(sq, skb, eseg)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -196,7 +202,7 @@ mlx5e_txwqe_build_dsegs(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> 		dseg-&gt;lkey       = sq-&gt;mkey_be;</div><div class='ctx'> 		dseg-&gt;byte_count = cpu_to_be32(headlen);</div><div class='ctx'> </div><div class='del'>-		mlx5e_dma_push(sq, dma_addr, headlen, MLX5E_DMA_MAP_SINGLE);</div><div class='add'>+		mlx5e_dma_push_single(sq, dma_addr, headlen);</div><div class='ctx'> 		num_dma++;</div><div class='ctx'> 		dseg++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -214,7 +220,7 @@ mlx5e_txwqe_build_dsegs(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> 		dseg-&gt;lkey       = sq-&gt;mkey_be;</div><div class='ctx'> 		dseg-&gt;byte_count = cpu_to_be32(fsz);</div><div class='ctx'> </div><div class='del'>-		mlx5e_dma_push(sq, dma_addr, fsz, MLX5E_DMA_MAP_PAGE);</div><div class='add'>+		mlx5e_dma_push_netmem(sq, skb_frag_netmem(frag), dma_addr, fsz);</div><div class='ctx'> 		num_dma++;</div><div class='ctx'> 		dseg++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -250,14 +256,13 @@ mlx5e_tx_wqe_inline_mode(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> 	u8 mode;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MLX5_EN_TLS</div><div class='del'>-	if (accel &amp;&amp; accel-&gt;tls.tls_tisn)</div><div class='add'>+	if (accel-&gt;tls.tls_tisn)</div><div class='ctx'> 		return MLX5_INLINE_MODE_TCP_UDP;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	mode = sq-&gt;min_inline_mode;</div><div class='ctx'> </div><div class='del'>-	if (skb_vlan_tag_present(skb) &amp;&amp;</div><div class='del'>-	    test_bit(MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE, &amp;sq-&gt;state))</div><div class='add'>+	if (skb_vlan_tag_present(skb))</div><div class='ctx'> 		mode = max_t(u8, MLX5_INLINE_MODE_L2, mode);</div><div class='ctx'> </div><div class='ctx'> 	return mode;</div><div class='hunk'>@@ -298,7 +303,7 @@ static void mlx5e_sq_xmit_prepare(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> 		stats-&gt;packets++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	attr-&gt;insz = mlx5e_accel_tx_ids_len(sq, accel);</div><div class='add'>+	attr-&gt;insz = mlx5e_accel_tx_ids_len(sq, skb, accel);</div><div class='ctx'> 	stats-&gt;bytes += attr-&gt;num_bytes;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -337,10 +342,11 @@ static void mlx5e_sq_calc_wqe_attr(struct sk_buff *skb, const struct mlx5e_tx_at</div><div class='ctx'> 	};</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5e_tx_skb_update_hwts_flags(struct sk_buff *skb)</div><div class='add'>+static void mlx5e_tx_skb_update_ts_flags(struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	if (unlikely(skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP))</div><div class='ctx'> 		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5e_tx_check_stop(struct mlx5e_txqsq *sq)</div><div class='hunk'>@@ -392,7 +398,7 @@ mlx5e_txwqe_complete(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> 	cseg-&gt;opmod_idx_opcode = cpu_to_be32((sq-&gt;pc &lt;&lt; 8) | attr-&gt;opcode);</div><div class='ctx'> 	cseg-&gt;qpn_ds           = cpu_to_be32((sq-&gt;sqn &lt;&lt; 8) | wqe_attr-&gt;ds_cnt);</div><div class='ctx'> </div><div class='del'>-	mlx5e_tx_skb_update_hwts_flags(skb);</div><div class='add'>+	mlx5e_tx_skb_update_ts_flags(skb);</div><div class='ctx'> </div><div class='ctx'> 	sq-&gt;pc += wi-&gt;num_wqebbs;</div><div class='ctx'> </div><div class='hunk'>@@ -482,12 +488,6 @@ mlx5e_sq_xmit_wqe(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> 		}</div><div class='ctx'> 		eseg-&gt;inline_hdr.sz |= cpu_to_be16(ihs);</div><div class='ctx'> 		dseg += wqe_attr-&gt;ds_cnt_inl;</div><div class='del'>-	} else if (skb_vlan_tag_present(skb)) {</div><div class='del'>-		eseg-&gt;insert.type = cpu_to_be16(MLX5_ETH_WQE_INSERT_VLAN);</div><div class='del'>-		if (skb-&gt;vlan_proto == cpu_to_be16(ETH_P_8021AD))</div><div class='del'>-			eseg-&gt;insert.type |= cpu_to_be16(MLX5_ETH_WQE_SVLAN);</div><div class='del'>-		eseg-&gt;insert.vlan_tci = cpu_to_be16(skb_vlan_tag_get(skb));</div><div class='del'>-		stats-&gt;added_vlan_packets++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dseg += wqe_attr-&gt;ds_cnt_ids;</div><div class='hunk'>@@ -525,9 +525,9 @@ static void mlx5e_tx_mpwqe_session_start(struct mlx5e_txqsq *sq,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_tx_mpwqe *session = &amp;sq-&gt;mpwqe;</div><div class='ctx'> 	struct mlx5e_tx_wqe *wqe;</div><div class='del'>-	u16 pi;</div><div class='add'>+	u16 pi, num_wqebbs;</div><div class='ctx'> </div><div class='del'>-	pi = mlx5e_txqsq_get_next_pi(sq, sq-&gt;max_sq_mpw_wqebbs);</div><div class='add'>+	pi = mlx5e_txqsq_get_next_pi_anysize(sq, &amp;num_wqebbs);</div><div class='ctx'> 	wqe = MLX5E_TX_FETCH_WQE(sq, pi);</div><div class='ctx'> 	net_prefetchw(wqe-&gt;data);</div><div class='ctx'> </div><div class='hunk'>@@ -535,6 +535,7 @@ static void mlx5e_tx_mpwqe_session_start(struct mlx5e_txqsq *sq,</div><div class='ctx'> 		.wqe = wqe,</div><div class='ctx'> 		.bytes_count = 0,</div><div class='ctx'> 		.ds_count = MLX5E_TX_WQE_EMPTY_DS_COUNT,</div><div class='add'>+		.ds_count_max = num_wqebbs * MLX5_SEND_WQEBB_NUM_DS,</div><div class='ctx'> 		.pkt_count = 0,</div><div class='ctx'> 		.inline_on = 0,</div><div class='ctx'> 	};</div><div class='hunk'>@@ -621,12 +622,12 @@ mlx5e_sq_xmit_mpwqe(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	sq-&gt;stats-&gt;xmit_more += xmit_more;</div><div class='ctx'> </div><div class='del'>-	mlx5e_dma_push(sq, txd.dma_addr, txd.len, MLX5E_DMA_MAP_SINGLE);</div><div class='add'>+	mlx5e_dma_push_single(sq, txd.dma_addr, txd.len);</div><div class='ctx'> 	mlx5e_skb_fifo_push(&amp;sq-&gt;db.skb_fifo, skb);</div><div class='ctx'> 	mlx5e_tx_mpwqe_add_dseg(sq, &amp;txd);</div><div class='del'>-	mlx5e_tx_skb_update_hwts_flags(skb);</div><div class='add'>+	mlx5e_tx_skb_update_ts_flags(skb);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(mlx5e_tx_mpwqe_is_full(&amp;sq-&gt;mpwqe, sq-&gt;max_sq_mpw_wqebbs))) {</div><div class='add'>+	if (unlikely(mlx5e_tx_mpwqe_is_full(&amp;sq-&gt;mpwqe))) {</div><div class='ctx'> 		/* Might stop the queue and affect the retval of __netdev_tx_sent_queue. */</div><div class='ctx'> 		cseg = mlx5e_tx_mpwqe_session_complete(sq);</div><div class='ctx'> </div><div class='hunk'>@@ -658,7 +659,7 @@ static void mlx5e_cqe_ts_id_eseg(struct mlx5e_ptpsq *ptpsq, struct sk_buff *skb,</div><div class='ctx'> 				 struct mlx5_wqe_eth_seg *eseg)</div><div class='ctx'> {</div><div class='ctx'> 	if (unlikely(skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP))</div><div class='del'>-		eseg-&gt;flow_table_metadata =</div><div class='add'>+		eseg-&gt;flow_table_metadata |=</div><div class='ctx'> 			cpu_to_be32(mlx5e_ptp_metadata_fifo_peek(&amp;ptpsq-&gt;metadata_freelist));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -666,7 +667,7 @@ static void mlx5e_txwqe_build_eseg(struct mlx5e_priv *priv, struct mlx5e_txqsq *</div><div class='ctx'> 				   struct sk_buff *skb, struct mlx5e_accel_tx_state *accel,</div><div class='ctx'> 				   struct mlx5_wqe_eth_seg *eseg, u16 ihs)</div><div class='ctx'> {</div><div class='del'>-	mlx5e_accel_tx_eseg(priv, skb, eseg, ihs);</div><div class='add'>+	mlx5e_accel_tx_eseg(priv, skb, accel, eseg, ihs);</div><div class='ctx'> 	mlx5e_txwqe_build_eseg_csum(sq, skb, accel, eseg);</div><div class='ctx'> 	if (unlikely(sq-&gt;ptpsq))</div><div class='ctx'> 		mlx5e_cqe_ts_id_eseg(sq-&gt;ptpsq, skb, eseg);</div><div class='hunk'>@@ -754,7 +755,7 @@ static void mlx5e_consume_skb(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> 		hwts.hwtstamp = mlx5e_cqe_ts_to_ns(sq-&gt;ptp_cyc2time, sq-&gt;clock, ts);</div><div class='ctx'> 		if (sq-&gt;ptpsq) {</div><div class='ctx'> 			mlx5e_skb_cb_hwtstamp_handler(skb, MLX5E_SKB_CB_CQE_HWTSTAMP,</div><div class='del'>-						      hwts.hwtstamp, sq-&gt;ptpsq-&gt;cq_stats);</div><div class='add'>+						      hwts.hwtstamp, sq-&gt;ptpsq);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			skb_tstamp_tx(skb, &amp;hwts);</div><div class='ctx'> 			sq-&gt;stats-&gt;timestamps++;</div><div class='hunk'>@@ -981,6 +982,7 @@ void mlx5i_sq_xmit(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> 	struct mlx5e_tx_attr attr;</div><div class='ctx'> 	struct mlx5i_tx_wqe *wqe;</div><div class='ctx'> </div><div class='add'>+	struct mlx5e_accel_tx_state accel = {};</div><div class='ctx'> 	struct mlx5_wqe_datagram_seg *datagram;</div><div class='ctx'> 	struct mlx5_wqe_ctrl_seg *cseg;</div><div class='ctx'> 	struct mlx5_wqe_eth_seg  *eseg;</div><div class='hunk'>@@ -991,7 +993,7 @@ void mlx5i_sq_xmit(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> 	int num_dma;</div><div class='ctx'> 	u16 pi;</div><div class='ctx'> </div><div class='del'>-	mlx5e_sq_xmit_prepare(sq, skb, NULL, &amp;attr);</div><div class='add'>+	mlx5e_sq_xmit_prepare(sq, skb, &amp;accel, &amp;attr);</div><div class='ctx'> 	mlx5i_sq_calc_wqe_attr(skb, &amp;attr, &amp;wqe_attr);</div><div class='ctx'> </div><div class='ctx'> 	pi = mlx5e_txqsq_get_next_pi(sq, wqe_attr.num_wqebbs);</div><div class='hunk'>@@ -1008,7 +1010,7 @@ void mlx5i_sq_xmit(struct mlx5e_txqsq *sq, struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	mlx5i_txwqe_build_datagram(av, dqpn, dqkey, datagram);</div><div class='ctx'> </div><div class='del'>-	mlx5e_txwqe_build_eseg_csum(sq, skb, NULL, eseg);</div><div class='add'>+	mlx5e_txwqe_build_eseg_csum(sq, skb, &amp;accel, eseg);</div><div class='ctx'> </div><div class='ctx'> 	eseg-&gt;mss = attr.mss;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c<br/>index 417098f0b2bb..76108299ea57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c</a></div><div class='hunk'>@@ -165,7 +165,8 @@ int mlx5e_napi_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	if (unlikely(!budget))</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	busy |= mlx5e_poll_xdpsq_cq(&amp;c-&gt;xdpsq.cq);</div><div class='add'>+	if (c-&gt;xdpsq)</div><div class='add'>+		busy |= mlx5e_poll_xdpsq_cq(&amp;c-&gt;xdpsq-&gt;cq);</div><div class='ctx'> </div><div class='ctx'> 	if (c-&gt;xdp)</div><div class='ctx'> 		busy |= mlx5e_poll_xdpsq_cq(&amp;c-&gt;rq_xdpsq.cq);</div><div class='hunk'>@@ -236,7 +237,8 @@ int mlx5e_napi_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	mlx5e_cq_arm(&amp;rq-&gt;cq);</div><div class='ctx'> 	mlx5e_cq_arm(&amp;c-&gt;icosq.cq);</div><div class='ctx'> 	mlx5e_cq_arm(&amp;c-&gt;async_icosq.cq);</div><div class='del'>-	mlx5e_cq_arm(&amp;c-&gt;xdpsq.cq);</div><div class='add'>+	if (c-&gt;xdpsq)</div><div class='add'>+		mlx5e_cq_arm(&amp;c-&gt;xdpsq-&gt;cq);</div><div class='ctx'> </div><div class='ctx'> 	if (xsk_open) {</div><div class='ctx'> 		mlx5e_handle_rx_dim(xskrq);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eq.c b/drivers/net/ethernet/mellanox/mlx5/core/eq.c<br/>index 859dcf09b770..25499da177bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/eq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/eq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/eq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/eq.c</a></div><div class='hunk'>@@ -32,9 +32,7 @@ enum {</div><div class='ctx'> 	MLX5_EQ_STATE_ALWAYS_ARMED	= 0xb,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum {</div><div class='del'>-	MLX5_EQ_DOORBEL_OFFSET	= 0x40,</div><div class='del'>-};</div><div class='add'>+#define MLX5_EQ_DOORBELL_OFFSET 0x40</div><div class='ctx'> </div><div class='ctx'> /* budget must be smaller than MLX5_NUM_SPARE_EQE to guarantee that we update</div><div class='ctx'>  * the ci before we polled all the entries in the EQ. MLX5_NUM_SPARE_EQE is</div><div class='hunk'>@@ -114,10 +112,10 @@ static int mlx5_eq_comp_int(struct notifier_block *nb,</div><div class='ctx'> 	struct mlx5_eq *eq = &amp;eq_comp-&gt;core;</div><div class='ctx'> 	struct mlx5_eqe *eqe;</div><div class='ctx'> 	int num_eqes = 0;</div><div class='del'>-	u32 cqn = -1;</div><div class='ctx'> </div><div class='ctx'> 	while ((eqe = next_eqe_sw(eq))) {</div><div class='ctx'> 		struct mlx5_core_cq *cq;</div><div class='add'>+		u32 cqn;</div><div class='ctx'> </div><div class='ctx'> 		/* Make sure we read EQ entry contents after we've</div><div class='ctx'> 		 * checked the ownership bit.</div><div class='hunk'>@@ -144,9 +142,6 @@ static int mlx5_eq_comp_int(struct notifier_block *nb,</div><div class='ctx'> </div><div class='ctx'> 	eq_update_ci(eq, 1);</div><div class='ctx'> </div><div class='del'>-	if (cqn != -1)</div><div class='del'>-		tasklet_schedule(&amp;eq_comp-&gt;tasklet_ctx.task);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -312,7 +307,7 @@ create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq,</div><div class='ctx'> </div><div class='ctx'> 	eqc = MLX5_ADDR_OF(create_eq_in, in, eq_context_entry);</div><div class='ctx'> 	MLX5_SET(eqc, eqc, log_eq_size, eq-&gt;fbc.log_sz);</div><div class='del'>-	MLX5_SET(eqc, eqc, uar_page, priv-&gt;uar-&gt;index);</div><div class='add'>+	MLX5_SET(eqc, eqc, uar_page, priv-&gt;bfreg.up-&gt;index);</div><div class='ctx'> 	MLX5_SET(eqc, eqc, intr, vecidx);</div><div class='ctx'> 	MLX5_SET(eqc, eqc, log_page_size,</div><div class='ctx'> 		 eq-&gt;frag_buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT);</div><div class='hunk'>@@ -325,7 +320,7 @@ create_map_eq(struct mlx5_core_dev *dev, struct mlx5_eq *eq,</div><div class='ctx'> 	eq-&gt;eqn = MLX5_GET(create_eq_out, out, eq_number);</div><div class='ctx'> 	eq-&gt;irqn = pci_irq_vector(dev-&gt;pdev, vecidx);</div><div class='ctx'> 	eq-&gt;dev = dev;</div><div class='del'>-	eq-&gt;doorbell = priv-&gt;uar-&gt;map + MLX5_EQ_DOORBEL_OFFSET;</div><div class='add'>+	eq-&gt;doorbell = priv-&gt;bfreg.up-&gt;map + MLX5_EQ_DOORBELL_OFFSET;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_debug_eq_add(dev, eq);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -588,6 +583,9 @@ static void gather_async_events_mask(struct mlx5_core_dev *dev, u64 mask[4])</div><div class='ctx'> 		async_event_mask |=</div><div class='ctx'> 			(1ull &lt;&lt; MLX5_EVENT_TYPE_OBJECT_CHANGE);</div><div class='ctx'> </div><div class='add'>+	if (mlx5_pcie_cong_event_supported(dev))</div><div class='add'>+		async_event_mask |= (1ull &lt;&lt; MLX5_EVENT_TYPE_OBJECT_CHANGE);</div><div class='add'>+</div><div class='ctx'> 	mask[0] = async_event_mask;</div><div class='ctx'> </div><div class='ctx'> 	if (MLX5_CAP_GEN(dev, event_cap))</div><div class='hunk'>@@ -804,15 +802,8 @@ EXPORT_SYMBOL(mlx5_eq_get_eqe);</div><div class='ctx'> </div><div class='ctx'> void mlx5_eq_update_ci(struct mlx5_eq *eq, u32 cc, bool arm)</div><div class='ctx'> {</div><div class='del'>-	__be32 __iomem *addr = eq-&gt;doorbell + (arm ? 0 : 2);</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='ctx'> 	eq-&gt;cons_index += cc;</div><div class='del'>-	val = (eq-&gt;cons_index &amp; 0xffffff) | (eq-&gt;eqn &lt;&lt; 24);</div><div class='del'>-</div><div class='del'>-	__raw_writel((__force u32)cpu_to_be32(val), addr);</div><div class='del'>-	/* We still want ordering, just not swabbing, so add a barrier */</div><div class='del'>-	wmb();</div><div class='add'>+	eq_update_ci(eq, arm);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mlx5_eq_update_ci);</div><div class='ctx'> </div><div class='hunk'>@@ -881,21 +872,27 @@ static void comp_irq_release_sf(struct mlx5_core_dev *dev, u16 vecidx)</div><div class='ctx'> </div><div class='ctx'> static int comp_irq_request_sf(struct mlx5_core_dev *dev, u16 vecidx)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_irq_pool *pool = mlx5_irq_table_get_comp_irq_pool(dev);</div><div class='ctx'> 	struct mlx5_eq_table *table = dev-&gt;priv.eq_table;</div><div class='del'>-	struct mlx5_irq_pool *pool = mlx5_irq_pool_get(dev);</div><div class='del'>-	struct irq_affinity_desc af_desc = {};</div><div class='add'>+	struct irq_affinity_desc *af_desc;</div><div class='ctx'> 	struct mlx5_irq *irq;</div><div class='ctx'> </div><div class='del'>-	/* In case SF irq pool does not exist, fallback to the PF irqs*/</div><div class='add'>+	/* In case SF irq pool does not exist, fallback to the PF irqs */</div><div class='ctx'> 	if (!mlx5_irq_pool_is_sf_pool(pool))</div><div class='ctx'> 		return comp_irq_request_pci(dev, vecidx);</div><div class='ctx'> </div><div class='del'>-	af_desc.is_managed = false;</div><div class='del'>-	cpumask_copy(&amp;af_desc.mask, cpu_online_mask);</div><div class='del'>-	cpumask_andnot(&amp;af_desc.mask, &amp;af_desc.mask, &amp;table-&gt;used_cpus);</div><div class='del'>-	irq = mlx5_irq_affinity_request(dev, pool, &amp;af_desc);</div><div class='del'>-	if (IS_ERR(irq))</div><div class='add'>+	af_desc = kvzalloc(sizeof(*af_desc), GFP_KERNEL);</div><div class='add'>+	if (!af_desc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	af_desc-&gt;is_managed = false;</div><div class='add'>+	cpumask_copy(&amp;af_desc-&gt;mask, cpu_online_mask);</div><div class='add'>+	cpumask_andnot(&amp;af_desc-&gt;mask, &amp;af_desc-&gt;mask, &amp;table-&gt;used_cpus);</div><div class='add'>+	irq = mlx5_irq_affinity_request(dev, pool, af_desc);</div><div class='add'>+	if (IS_ERR(irq)) {</div><div class='add'>+		kvfree(af_desc);</div><div class='ctx'> 		return PTR_ERR(irq);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	cpumask_or(&amp;table-&gt;used_cpus, &amp;table-&gt;used_cpus, mlx5_irq_get_affinity_mask(irq));</div><div class='ctx'> 	mlx5_core_dbg(pool-&gt;dev, "IRQ %u mapped to cpu %*pbl, %u EQs on this irq\n",</div><div class='hunk'>@@ -903,6 +900,8 @@ static int comp_irq_request_sf(struct mlx5_core_dev *dev, u16 vecidx)</div><div class='ctx'> 		      cpumask_pr_args(mlx5_irq_get_affinity_mask(irq)),</div><div class='ctx'> 		      mlx5_irq_read_locked(irq) / MLX5_EQ_REFS_PER_IRQ);</div><div class='ctx'> </div><div class='add'>+	kvfree(af_desc);</div><div class='add'>+</div><div class='ctx'> 	return xa_err(xa_store(&amp;table-&gt;comp_irqs, vecidx, irq, GFP_KERNEL));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c<br/>index 6b4c9ffad95b..c9a1654d83a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c</a></div><div class='hunk'>@@ -87,8 +87,8 @@ int esw_acl_egress_lgcy_setup(struct mlx5_eswitch *esw,</div><div class='ctx'> 		drop_counter = mlx5_fc_create(esw-&gt;dev, false);</div><div class='ctx'> 		if (IS_ERR(drop_counter)) {</div><div class='ctx'> 			esw_warn(esw-&gt;dev,</div><div class='del'>-				 "vport[%d] configure egress drop rule counter err(%ld)\n",</div><div class='del'>-				 vport-&gt;vport, PTR_ERR(drop_counter));</div><div class='add'>+				 "vport[%d] configure egress drop rule counter err(%pe)\n",</div><div class='add'>+				 vport-&gt;vport, drop_counter);</div><div class='ctx'> 			drop_counter = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 		vport-&gt;egress.legacy.drop_counter = drop_counter;</div><div class='hunk'>@@ -135,7 +135,7 @@ int esw_acl_egress_lgcy_setup(struct mlx5_eswitch *esw,</div><div class='ctx'> 	if (drop_counter) {</div><div class='ctx'> 		flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 		drop_ctr_dst.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-		drop_ctr_dst.counter_id = mlx5_fc_id(drop_counter);</div><div class='add'>+		drop_ctr_dst.counter = drop_counter;</div><div class='ctx'> 		dst = &amp;drop_ctr_dst;</div><div class='ctx'> 		dest_num++;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c<br/>index d599e50af346..3ce455c2535c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c</a></div><div class='hunk'>@@ -27,7 +27,7 @@ esw_acl_table_create(struct mlx5_eswitch *esw, struct mlx5_vport *vport, int ns,</div><div class='ctx'> 	esw_debug(dev, "Create vport[%d] %s ACL table\n", vport_num,</div><div class='ctx'> 		  ns == MLX5_FLOW_NAMESPACE_ESW_INGRESS ? "ingress" : "egress");</div><div class='ctx'> </div><div class='del'>-	root_ns = mlx5_get_flow_vport_acl_namespace(dev, ns, vport-&gt;index);</div><div class='add'>+	root_ns = mlx5_get_flow_vport_namespace(dev, ns, vport-&gt;index);</div><div class='ctx'> 	if (!root_ns) {</div><div class='ctx'> 		esw_warn(dev, "Failed to get E-Switch root namespace for vport (%d)\n",</div><div class='ctx'> 			 vport_num);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c<br/>index 093ed86a0acd..1c37098e09ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c</a></div><div class='hunk'>@@ -260,7 +260,7 @@ int esw_acl_ingress_lgcy_setup(struct mlx5_eswitch *esw,</div><div class='ctx'> 	if (counter) {</div><div class='ctx'> 		flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 		drop_ctr_dst.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-		drop_ctr_dst.counter_id = mlx5_fc_id(counter);</div><div class='add'>+		drop_ctr_dst.counter = counter;</div><div class='ctx'> 		dst = &amp;drop_ctr_dst;</div><div class='ctx'> 		dest_num++;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/adj_vport.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/adj_vport.c<br/>new file mode 100644<br/>index 000000000000..250af09b5af2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/adj_vport.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/adj_vport.c</a></div><div class='hunk'>@@ -0,0 +1,202 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+// Copyright (c) 2025, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+</div><div class='add'>+#include "fs_core.h"</div><div class='add'>+#include "eswitch.h"</div><div class='add'>+</div><div class='add'>+int mlx5_esw_adj_vport_modify(struct mlx5_core_dev *dev, u16 vport,</div><div class='add'>+			      bool connect)</div><div class='add'>+{</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(modify_vport_state_in)] = {};</div><div class='add'>+</div><div class='add'>+	MLX5_SET(modify_vport_state_in, in, opcode,</div><div class='add'>+		 MLX5_CMD_OP_MODIFY_VPORT_STATE);</div><div class='add'>+	MLX5_SET(modify_vport_state_in, in, op_mod,</div><div class='add'>+		 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT);</div><div class='add'>+	MLX5_SET(modify_vport_state_in, in, other_vport, 1);</div><div class='add'>+	MLX5_SET(modify_vport_state_in, in, vport_number, vport);</div><div class='add'>+	MLX5_SET(modify_vport_state_in, in, ingress_connect_valid, 1);</div><div class='add'>+	MLX5_SET(modify_vport_state_in, in, egress_connect_valid, 1);</div><div class='add'>+	MLX5_SET(modify_vport_state_in, in, ingress_connect, connect);</div><div class='add'>+	MLX5_SET(modify_vport_state_in, in, egress_connect, connect);</div><div class='add'>+	MLX5_SET(modify_vport_state_in, in, admin_state, connect);</div><div class='add'>+	return mlx5_cmd_exec_in(dev, modify_vport_state, in);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_esw_destroy_esw_vport(struct mlx5_core_dev *dev, u16 vport)</div><div class='add'>+{</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(destroy_esw_vport_in)] = {};</div><div class='add'>+</div><div class='add'>+	MLX5_SET(destroy_esw_vport_in, in, opcode,</div><div class='add'>+		 MLX5_CMD_OPCODE_DESTROY_ESW_VPORT);</div><div class='add'>+	MLX5_SET(destroy_esw_vport_in, in, vport_num, vport);</div><div class='add'>+</div><div class='add'>+	mlx5_cmd_exec_in(dev, destroy_esw_vport, in);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_esw_create_esw_vport(struct mlx5_core_dev *dev, u16 vhca_id,</div><div class='add'>+				     u16 *vport_num)</div><div class='add'>+{</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(create_esw_vport_out)] = {};</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(create_esw_vport_in)] = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(create_esw_vport_in, in, opcode,</div><div class='add'>+		 MLX5_CMD_OPCODE_CREATE_ESW_VPORT);</div><div class='add'>+	MLX5_SET(create_esw_vport_in, in, managed_vhca_id, vhca_id);</div><div class='add'>+</div><div class='add'>+	err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));</div><div class='add'>+	if (!err)</div><div class='add'>+		*vport_num = MLX5_GET(create_esw_vport_out, out, vport_num);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_esw_adj_vport_create(struct mlx5_eswitch *esw, u16 vhca_id,</div><div class='add'>+				     const void *rid_info_reg)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_vport *vport;</div><div class='add'>+	u16 vport_num;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_esw_create_esw_vport(esw-&gt;dev, vhca_id, &amp;vport_num);</div><div class='add'>+	if (err) {</div><div class='add'>+		esw_warn(esw-&gt;dev,</div><div class='add'>+			 "Failed to create adjacent vport for vhca_id %d, err %d\n",</div><div class='add'>+			 vhca_id, err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	esw_debug(esw-&gt;dev, "Created adjacent vport[%d] %d for vhca_id 0x%x\n",</div><div class='add'>+		  esw-&gt;last_vport_idx, vport_num, vhca_id);</div><div class='add'>+</div><div class='add'>+	err = mlx5_esw_vport_alloc(esw, esw-&gt;last_vport_idx++, vport_num);</div><div class='add'>+	if (err)</div><div class='add'>+		goto destroy_esw_vport;</div><div class='add'>+</div><div class='add'>+	xa_set_mark(&amp;esw-&gt;vports, vport_num, MLX5_ESW_VPT_VF);</div><div class='add'>+	vport = mlx5_eswitch_get_vport(esw, vport_num);</div><div class='add'>+	vport-&gt;adjacent = true;</div><div class='add'>+	vport-&gt;vhca_id = vhca_id;</div><div class='add'>+</div><div class='add'>+	vport-&gt;adj_info.parent_pci_devfn =</div><div class='add'>+		MLX5_GET(function_vhca_rid_info_reg, rid_info_reg,</div><div class='add'>+			 parent_pci_device_function);</div><div class='add'>+	vport-&gt;adj_info.function_id =</div><div class='add'>+		MLX5_GET(function_vhca_rid_info_reg, rid_info_reg, function_id);</div><div class='add'>+</div><div class='add'>+	mlx5_fs_vport_egress_acl_ns_add(esw-&gt;dev-&gt;priv.steering, vport-&gt;index);</div><div class='add'>+	mlx5_fs_vport_ingress_acl_ns_add(esw-&gt;dev-&gt;priv.steering, vport-&gt;index);</div><div class='add'>+	err = mlx5_esw_offloads_rep_add(esw, vport);</div><div class='add'>+	if (err)</div><div class='add'>+		goto acl_ns_remove;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+acl_ns_remove:</div><div class='add'>+	mlx5_fs_vport_ingress_acl_ns_remove(esw-&gt;dev-&gt;priv.steering,</div><div class='add'>+					    vport-&gt;index);</div><div class='add'>+	mlx5_fs_vport_egress_acl_ns_remove(esw-&gt;dev-&gt;priv.steering,</div><div class='add'>+					   vport-&gt;index);</div><div class='add'>+	mlx5_esw_vport_free(esw, vport);</div><div class='add'>+destroy_esw_vport:</div><div class='add'>+	mlx5_esw_destroy_esw_vport(esw-&gt;dev, vport_num);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_esw_adj_vport_destroy(struct mlx5_eswitch *esw,</div><div class='add'>+				       struct mlx5_vport *vport)</div><div class='add'>+{</div><div class='add'>+	u16 vport_num = vport-&gt;vport;</div><div class='add'>+</div><div class='add'>+	esw_debug(esw-&gt;dev, "Destroying adjacent vport %d for vhca_id 0x%x\n",</div><div class='add'>+		  vport_num, vport-&gt;vhca_id);</div><div class='add'>+</div><div class='add'>+	mlx5_esw_offloads_rep_remove(esw, vport);</div><div class='add'>+	mlx5_fs_vport_egress_acl_ns_remove(esw-&gt;dev-&gt;priv.steering,</div><div class='add'>+					   vport-&gt;index);</div><div class='add'>+	mlx5_fs_vport_ingress_acl_ns_remove(esw-&gt;dev-&gt;priv.steering,</div><div class='add'>+					    vport-&gt;index);</div><div class='add'>+	mlx5_esw_vport_free(esw, vport);</div><div class='add'>+	/* Reset the vport index back so new adj vports can use this index.</div><div class='add'>+	 * When vport count can incrementally change, this needs to be modified.</div><div class='add'>+	 */</div><div class='add'>+	esw-&gt;last_vport_idx--;</div><div class='add'>+	mlx5_esw_destroy_esw_vport(esw-&gt;dev, vport_num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_esw_adjacent_vhcas_cleanup(struct mlx5_eswitch *esw)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_vport *vport;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_GEN_2(esw-&gt;dev, delegated_vhca_max))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5_esw_for_each_vf_vport(esw, i, vport, U16_MAX) {</div><div class='add'>+		if (!vport-&gt;adjacent)</div><div class='add'>+			continue;</div><div class='add'>+		mlx5_esw_adj_vport_destroy(esw, vport);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_esw_adjacent_vhcas_setup(struct mlx5_eswitch *esw)</div><div class='add'>+{</div><div class='add'>+	u32 delegated_vhca_max = MLX5_CAP_GEN_2(esw-&gt;dev, delegated_vhca_max);</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(query_delegated_vhca_in)] = {};</div><div class='add'>+	int outlen, err, i = 0;</div><div class='add'>+	u8 *out;</div><div class='add'>+	u32 count;</div><div class='add'>+</div><div class='add'>+	if (!delegated_vhca_max)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	outlen = MLX5_ST_SZ_BYTES(query_delegated_vhca_out) +</div><div class='add'>+		 delegated_vhca_max *</div><div class='add'>+		 MLX5_ST_SZ_BYTES(delegated_function_vhca_rid_info);</div><div class='add'>+</div><div class='add'>+	esw_debug(esw-&gt;dev, "delegated_vhca_max=%d\n", delegated_vhca_max);</div><div class='add'>+</div><div class='add'>+	out = kvzalloc(outlen, GFP_KERNEL);</div><div class='add'>+	if (!out)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(query_delegated_vhca_in, in, opcode,</div><div class='add'>+		 MLX5_CMD_OPCODE_QUERY_DELEGATED_VHCA);</div><div class='add'>+</div><div class='add'>+	err = mlx5_cmd_exec(esw-&gt;dev, in, sizeof(in), out, outlen);</div><div class='add'>+	if (err) {</div><div class='add'>+		kvfree(out);</div><div class='add'>+		esw_warn(esw-&gt;dev, "Failed to query delegated vhca, err %d\n",</div><div class='add'>+			 err);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	count = MLX5_GET(query_delegated_vhca_out, out, functions_count);</div><div class='add'>+	esw_debug(esw-&gt;dev, "Delegated vhca functions count %d\n", count);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		const void *rid_info, *rid_info_reg;</div><div class='add'>+		u16 vhca_id;</div><div class='add'>+</div><div class='add'>+		rid_info = MLX5_ADDR_OF(query_delegated_vhca_out, out,</div><div class='add'>+					delegated_function_vhca_rid_info[i]);</div><div class='add'>+</div><div class='add'>+		rid_info_reg = MLX5_ADDR_OF(delegated_function_vhca_rid_info,</div><div class='add'>+					    rid_info, function_vhca_rid_info);</div><div class='add'>+</div><div class='add'>+		vhca_id = MLX5_GET(function_vhca_rid_info_reg, rid_info_reg,</div><div class='add'>+				   vhca_id);</div><div class='add'>+		esw_debug(esw-&gt;dev, "Delegating vhca_id 0x%x\n", vhca_id);</div><div class='add'>+</div><div class='add'>+		err = mlx5_esw_adj_vport_create(esw, vhca_id, rid_info_reg);</div><div class='add'>+		if (err) {</div><div class='add'>+			esw_warn(esw-&gt;dev,</div><div class='add'>+				 "Failed to init adjacent vhca 0x%x, err %d\n",</div><div class='add'>+				 vhca_id, err);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvfree(out);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c<br/>index c5ea1d1d2b03..60e10047770f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c</a></div><div class='hunk'>@@ -81,7 +81,8 @@ mlx5_esw_bridge_table_create(int max_fte, u32 level, struct mlx5_eswitch *esw)</div><div class='ctx'> 	ft_attr.prio = FDB_BR_OFFLOAD;</div><div class='ctx'> 	fdb = mlx5_create_flow_table(ns, &amp;ft_attr);</div><div class='ctx'> 	if (IS_ERR(fdb))</div><div class='del'>-		esw_warn(dev, "Failed to create bridge FDB Table (err=%ld)\n", PTR_ERR(fdb));</div><div class='add'>+		esw_warn(dev, "Failed to create bridge FDB Table (err=%pe)\n",</div><div class='add'>+			 fdb);</div><div class='ctx'> </div><div class='ctx'> 	return fdb;</div><div class='ctx'> }</div><div class='hunk'>@@ -121,8 +122,8 @@ mlx5_esw_bridge_ingress_vlan_proto_fg_create(unsigned int from, unsigned int to,</div><div class='ctx'> 	kvfree(in);</div><div class='ctx'> 	if (IS_ERR(fg))</div><div class='ctx'> 		esw_warn(esw-&gt;dev,</div><div class='del'>-			 "Failed to create VLAN(proto=%x) flow group for bridge ingress table (err=%ld)\n",</div><div class='del'>-			 vlan_proto, PTR_ERR(fg));</div><div class='add'>+			 "Failed to create VLAN(proto=%x) flow group for bridge ingress table (err=%pe)\n",</div><div class='add'>+			 vlan_proto, fg);</div><div class='ctx'> </div><div class='ctx'> 	return fg;</div><div class='ctx'> }</div><div class='hunk'>@@ -180,8 +181,8 @@ mlx5_esw_bridge_ingress_vlan_proto_filter_fg_create(unsigned int from, unsigned</div><div class='ctx'> 	fg = mlx5_create_flow_group(ingress_ft, in);</div><div class='ctx'> 	if (IS_ERR(fg))</div><div class='ctx'> 		esw_warn(esw-&gt;dev,</div><div class='del'>-			 "Failed to create bridge ingress table VLAN filter flow group (err=%ld)\n",</div><div class='del'>-			 PTR_ERR(fg));</div><div class='add'>+			 "Failed to create bridge ingress table VLAN filter flow group (err=%pe)\n",</div><div class='add'>+			 fg);</div><div class='ctx'> 	kvfree(in);</div><div class='ctx'> 	return fg;</div><div class='ctx'> }</div><div class='hunk'>@@ -237,8 +238,8 @@ mlx5_esw_bridge_ingress_mac_fg_create(struct mlx5_eswitch *esw, struct mlx5_flow</div><div class='ctx'> 	fg = mlx5_create_flow_group(ingress_ft, in);</div><div class='ctx'> 	if (IS_ERR(fg))</div><div class='ctx'> 		esw_warn(esw-&gt;dev,</div><div class='del'>-			 "Failed to create MAC flow group for bridge ingress table (err=%ld)\n",</div><div class='del'>-			 PTR_ERR(fg));</div><div class='add'>+			 "Failed to create MAC flow group for bridge ingress table (err=%pe)\n",</div><div class='add'>+			 fg);</div><div class='ctx'> </div><div class='ctx'> 	kvfree(in);</div><div class='ctx'> 	return fg;</div><div class='hunk'>@@ -274,8 +275,8 @@ mlx5_esw_bridge_egress_vlan_proto_fg_create(unsigned int from, unsigned int to,</div><div class='ctx'> 	fg = mlx5_create_flow_group(egress_ft, in);</div><div class='ctx'> 	if (IS_ERR(fg))</div><div class='ctx'> 		esw_warn(esw-&gt;dev,</div><div class='del'>-			 "Failed to create VLAN flow group for bridge egress table (err=%ld)\n",</div><div class='del'>-			 PTR_ERR(fg));</div><div class='add'>+			 "Failed to create VLAN flow group for bridge egress table (err=%pe)\n",</div><div class='add'>+			 fg);</div><div class='ctx'> 	kvfree(in);</div><div class='ctx'> 	return fg;</div><div class='ctx'> }</div><div class='hunk'>@@ -324,8 +325,8 @@ mlx5_esw_bridge_egress_mac_fg_create(struct mlx5_eswitch *esw, struct mlx5_flow_</div><div class='ctx'> 	fg = mlx5_create_flow_group(egress_ft, in);</div><div class='ctx'> 	if (IS_ERR(fg))</div><div class='ctx'> 		esw_warn(esw-&gt;dev,</div><div class='del'>-			 "Failed to create bridge egress table MAC flow group (err=%ld)\n",</div><div class='del'>-			 PTR_ERR(fg));</div><div class='add'>+			 "Failed to create bridge egress table MAC flow group (err=%pe)\n",</div><div class='add'>+			 fg);</div><div class='ctx'> 	kvfree(in);</div><div class='ctx'> 	return fg;</div><div class='ctx'> }</div><div class='hunk'>@@ -354,8 +355,8 @@ mlx5_esw_bridge_egress_miss_fg_create(struct mlx5_eswitch *esw, struct mlx5_flow</div><div class='ctx'> 	fg = mlx5_create_flow_group(egress_ft, in);</div><div class='ctx'> 	if (IS_ERR(fg))</div><div class='ctx'> 		esw_warn(esw-&gt;dev,</div><div class='del'>-			 "Failed to create bridge egress table miss flow group (err=%ld)\n",</div><div class='del'>-			 PTR_ERR(fg));</div><div class='add'>+			 "Failed to create bridge egress table miss flow group (err=%pe)\n",</div><div class='add'>+			 fg);</div><div class='ctx'> 	kvfree(in);</div><div class='ctx'> 	return fg;</div><div class='ctx'> }</div><div class='hunk'>@@ -501,8 +502,8 @@ mlx5_esw_bridge_egress_table_init(struct mlx5_esw_bridge_offloads *br_offloads,</div><div class='ctx'> 	if (mlx5_esw_bridge_pkt_reformat_vlan_pop_supported(esw)) {</div><div class='ctx'> 		miss_fg = mlx5_esw_bridge_egress_miss_fg_create(esw, egress_ft);</div><div class='ctx'> 		if (IS_ERR(miss_fg)) {</div><div class='del'>-			esw_warn(esw-&gt;dev, "Failed to create miss flow group (err=%ld)\n",</div><div class='del'>-				 PTR_ERR(miss_fg));</div><div class='add'>+			esw_warn(esw-&gt;dev, "Failed to create miss flow group (err=%pe)\n",</div><div class='add'>+				 miss_fg);</div><div class='ctx'> 			miss_fg = NULL;</div><div class='ctx'> 			goto skip_miss_flow;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -510,8 +511,8 @@ mlx5_esw_bridge_egress_table_init(struct mlx5_esw_bridge_offloads *br_offloads,</div><div class='ctx'> 		miss_pkt_reformat = mlx5_esw_bridge_pkt_reformat_vlan_pop_create(esw);</div><div class='ctx'> 		if (IS_ERR(miss_pkt_reformat)) {</div><div class='ctx'> 			esw_warn(esw-&gt;dev,</div><div class='del'>-				 "Failed to alloc packet reformat REMOVE_HEADER (err=%ld)\n",</div><div class='del'>-				 PTR_ERR(miss_pkt_reformat));</div><div class='add'>+				 "Failed to alloc packet reformat REMOVE_HEADER (err=%pe)\n",</div><div class='add'>+				 miss_pkt_reformat);</div><div class='ctx'> 			miss_pkt_reformat = NULL;</div><div class='ctx'> 			mlx5_destroy_flow_group(miss_fg);</div><div class='ctx'> 			miss_fg = NULL;</div><div class='hunk'>@@ -522,8 +523,8 @@ mlx5_esw_bridge_egress_table_init(struct mlx5_esw_bridge_offloads *br_offloads,</div><div class='ctx'> 								      br_offloads-&gt;skip_ft,</div><div class='ctx'> 								      miss_pkt_reformat);</div><div class='ctx'> 		if (IS_ERR(miss_handle)) {</div><div class='del'>-			esw_warn(esw-&gt;dev, "Failed to create miss flow (err=%ld)\n",</div><div class='del'>-				 PTR_ERR(miss_handle));</div><div class='add'>+			esw_warn(esw-&gt;dev, "Failed to create miss flow (err=%pe)\n",</div><div class='add'>+				 miss_handle);</div><div class='ctx'> 			miss_handle = NULL;</div><div class='ctx'> 			mlx5_packet_reformat_dealloc(esw-&gt;dev, miss_pkt_reformat);</div><div class='ctx'> 			miss_pkt_reformat = NULL;</div><div class='hunk'>@@ -570,7 +571,8 @@ mlx5_esw_bridge_egress_table_cleanup(struct mlx5_esw_bridge *bridge)</div><div class='ctx'> </div><div class='ctx'> static struct mlx5_flow_handle *</div><div class='ctx'> mlx5_esw_bridge_ingress_flow_with_esw_create(u16 vport_num, const unsigned char *addr,</div><div class='del'>-					     struct mlx5_esw_bridge_vlan *vlan, u32 counter_id,</div><div class='add'>+					     struct mlx5_esw_bridge_vlan *vlan,</div><div class='add'>+					     struct mlx5_fc *counter,</div><div class='ctx'> 					     struct mlx5_esw_bridge *bridge,</div><div class='ctx'> 					     struct mlx5_eswitch *esw)</div><div class='ctx'> {</div><div class='hunk'>@@ -628,7 +630,7 @@ mlx5_esw_bridge_ingress_flow_with_esw_create(u16 vport_num, const unsigned char</div><div class='ctx'> 	dests[0].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='ctx'> 	dests[0].ft = bridge-&gt;egress_ft;</div><div class='ctx'> 	dests[1].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dests[1].counter_id = counter_id;</div><div class='add'>+	dests[1].counter = counter;</div><div class='ctx'> </div><div class='ctx'> 	handle = mlx5_add_flow_rules(br_offloads-&gt;ingress_ft, rule_spec, &amp;flow_act, dests,</div><div class='ctx'> 				     ARRAY_SIZE(dests));</div><div class='hunk'>@@ -639,17 +641,19 @@ mlx5_esw_bridge_ingress_flow_with_esw_create(u16 vport_num, const unsigned char</div><div class='ctx'> </div><div class='ctx'> static struct mlx5_flow_handle *</div><div class='ctx'> mlx5_esw_bridge_ingress_flow_create(u16 vport_num, const unsigned char *addr,</div><div class='del'>-				    struct mlx5_esw_bridge_vlan *vlan, u32 counter_id,</div><div class='add'>+				    struct mlx5_esw_bridge_vlan *vlan,</div><div class='add'>+				    struct mlx5_fc *counter,</div><div class='ctx'> 				    struct mlx5_esw_bridge *bridge)</div><div class='ctx'> {</div><div class='del'>-	return mlx5_esw_bridge_ingress_flow_with_esw_create(vport_num, addr, vlan, counter_id,</div><div class='add'>+	return mlx5_esw_bridge_ingress_flow_with_esw_create(vport_num, addr, vlan, counter,</div><div class='ctx'> 							    bridge, bridge-&gt;br_offloads-&gt;esw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct mlx5_flow_handle *</div><div class='ctx'> mlx5_esw_bridge_ingress_flow_peer_create(u16 vport_num, u16 esw_owner_vhca_id,</div><div class='ctx'> 					 const unsigned char *addr,</div><div class='del'>-					 struct mlx5_esw_bridge_vlan *vlan, u32 counter_id,</div><div class='add'>+					 struct mlx5_esw_bridge_vlan *vlan,</div><div class='add'>+					 struct mlx5_fc *counter,</div><div class='ctx'> 					 struct mlx5_esw_bridge *bridge)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_devcom_comp_dev *devcom = bridge-&gt;br_offloads-&gt;esw-&gt;devcom, *pos;</div><div class='hunk'>@@ -671,7 +675,7 @@ mlx5_esw_bridge_ingress_flow_peer_create(u16 vport_num, u16 esw_owner_vhca_id,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	handle = mlx5_esw_bridge_ingress_flow_with_esw_create(vport_num, addr, vlan, counter_id,</div><div class='add'>+	handle = mlx5_esw_bridge_ingress_flow_with_esw_create(vport_num, addr, vlan, counter,</div><div class='ctx'> 							      bridge, peer_esw);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -1045,8 +1049,8 @@ mlx5_esw_bridge_vlan_push_create(u16 vlan_proto, struct mlx5_esw_bridge_vlan *vl</div><div class='ctx'> 						  &amp;reformat_params,</div><div class='ctx'> 						  MLX5_FLOW_NAMESPACE_FDB);</div><div class='ctx'> 	if (IS_ERR(pkt_reformat)) {</div><div class='del'>-		esw_warn(esw-&gt;dev, "Failed to alloc packet reformat INSERT_HEADER (err=%ld)\n",</div><div class='del'>-			 PTR_ERR(pkt_reformat));</div><div class='add'>+		esw_warn(esw-&gt;dev, "Failed to alloc packet reformat INSERT_HEADER (err=%pe)\n",</div><div class='add'>+			 pkt_reformat);</div><div class='ctx'> 		return PTR_ERR(pkt_reformat);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1073,8 +1077,8 @@ mlx5_esw_bridge_vlan_pop_create(struct mlx5_esw_bridge_vlan *vlan, struct mlx5_e</div><div class='ctx'> </div><div class='ctx'> 	pkt_reformat = mlx5_esw_bridge_pkt_reformat_vlan_pop_create(esw);</div><div class='ctx'> 	if (IS_ERR(pkt_reformat)) {</div><div class='del'>-		esw_warn(esw-&gt;dev, "Failed to alloc packet reformat REMOVE_HEADER (err=%ld)\n",</div><div class='del'>-			 PTR_ERR(pkt_reformat));</div><div class='add'>+		esw_warn(esw-&gt;dev, "Failed to alloc packet reformat REMOVE_HEADER (err=%pe)\n",</div><div class='add'>+			 pkt_reformat);</div><div class='ctx'> 		return PTR_ERR(pkt_reformat);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1385,10 +1389,9 @@ mlx5_esw_bridge_fdb_entry_init(struct net_device *dev, u16 vport_num, u16 esw_ow</div><div class='ctx'> </div><div class='ctx'> 	handle = peer ?</div><div class='ctx'> 		mlx5_esw_bridge_ingress_flow_peer_create(vport_num, esw_owner_vhca_id,</div><div class='del'>-							 addr, vlan, mlx5_fc_id(counter),</div><div class='del'>-							 bridge) :</div><div class='add'>+							 addr, vlan, counter, bridge) :</div><div class='ctx'> 		mlx5_esw_bridge_ingress_flow_create(vport_num, addr, vlan,</div><div class='del'>-						    mlx5_fc_id(counter), bridge);</div><div class='add'>+						    counter, bridge);</div><div class='ctx'> 	if (IS_ERR(handle)) {</div><div class='ctx'> 		err = PTR_ERR(handle);</div><div class='ctx'> 		esw_warn(esw-&gt;dev, "Failed to create ingress flow(vport=%u,err=%d,peer=%d)\n",</div><div class='hunk'>@@ -1861,7 +1864,7 @@ int mlx5_esw_bridge_port_mdb_add(struct net_device *dev, u16 vport_num, u16 esw_</div><div class='ctx'> 			 "Failed to lookup bridge port to add MDB (MAC=%pM,vport=%u)\n",</div><div class='ctx'> 			 addr, vport_num);</div><div class='ctx'> 		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='del'>-				       "Failed to lookup bridge port to add MDB (MAC=%pM,vport=%u)\n",</div><div class='add'>+				       "Failed to lookup bridge port to add MDB (MAC=%pM,vport=%u)",</div><div class='ctx'> 				       addr, vport_num);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1874,7 +1877,7 @@ int mlx5_esw_bridge_port_mdb_add(struct net_device *dev, u16 vport_num, u16 esw_</div><div class='ctx'> 				 "Failed to lookup bridge port vlan metadata to create MDB (MAC=%pM,vid=%u,vport=%u)\n",</div><div class='ctx'> 				 addr, vid, vport_num);</div><div class='ctx'> 			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='del'>-					       "Failed to lookup vlan metadata for MDB (MAC=%pM,vid=%u,vport=%u)\n",</div><div class='add'>+					       "Failed to lookup vlan metadata for MDB (MAC=%pM,vid=%u,vport=%u)",</div><div class='ctx'> 					       addr, vid, vport_num);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1882,7 +1885,7 @@ int mlx5_esw_bridge_port_mdb_add(struct net_device *dev, u16 vport_num, u16 esw_</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_esw_bridge_port_mdb_attach(dev, port, addr, vid);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		NL_SET_ERR_MSG_FMT_MOD(extack, "Failed to add MDB (MAC=%pM,vid=%u,vport=%u)\n",</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack, "Failed to add MDB (MAC=%pM,vid=%u,vport=%u)",</div><div class='ctx'> 				       addr, vid, vport_num);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c<br/>index d0f38818363f..89a58dee50b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c</a></div><div class='hunk'>@@ -7,11 +7,7 @@</div><div class='ctx'> static void</div><div class='ctx'> mlx5_esw_get_port_parent_id(struct mlx5_core_dev *dev, struct netdev_phys_item_id *ppid)</div><div class='ctx'> {</div><div class='del'>-	u64 parent_id;</div><div class='del'>-</div><div class='del'>-	parent_id = mlx5_query_nic_system_image_guid(dev);</div><div class='del'>-	ppid-&gt;id_len = sizeof(parent_id);</div><div class='del'>-	memcpy(ppid-&gt;id, &amp;parent_id, sizeof(parent_id));</div><div class='add'>+	mlx5_query_nic_sw_system_image_guid(dev, ppid-&gt;id, &amp;ppid-&gt;id_len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool mlx5_esw_devlink_port_supported(struct mlx5_eswitch *esw, u16 vport_num)</div><div class='hunk'>@@ -27,12 +23,13 @@ static void mlx5_esw_offloads_pf_vf_devlink_port_attrs_set(struct mlx5_eswitch *</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *dev = esw-&gt;dev;</div><div class='ctx'> 	struct netdev_phys_item_id ppid = {};</div><div class='add'>+	struct mlx5_vport *vport;</div><div class='ctx'> 	u32 controller_num = 0;</div><div class='ctx'> 	bool external;</div><div class='ctx'> 	u16 pfnum;</div><div class='ctx'> </div><div class='ctx'> 	mlx5_esw_get_port_parent_id(dev, &amp;ppid);</div><div class='del'>-	pfnum = mlx5_get_dev_index(dev);</div><div class='add'>+	pfnum = PCI_FUNC(dev-&gt;pdev-&gt;devfn);</div><div class='ctx'> 	external = mlx5_core_is_ecpf_esw_manager(dev);</div><div class='ctx'> 	if (external)</div><div class='ctx'> 		controller_num = dev-&gt;priv.eswitch-&gt;offloads.host_number + 1;</div><div class='hunk'>@@ -42,15 +39,25 @@ static void mlx5_esw_offloads_pf_vf_devlink_port_attrs_set(struct mlx5_eswitch *</div><div class='ctx'> 		dl_port-&gt;attrs.switch_id.id_len = ppid.id_len;</div><div class='ctx'> 		devlink_port_attrs_pci_pf_set(dl_port, controller_num, pfnum, external);</div><div class='ctx'> 	} else if (mlx5_eswitch_is_vf_vport(esw, vport_num)) {</div><div class='add'>+		u16 func_id = vport_num - 1;</div><div class='add'>+</div><div class='add'>+		vport = mlx5_eswitch_get_vport(esw, vport_num);</div><div class='ctx'> 		memcpy(dl_port-&gt;attrs.switch_id.id, ppid.id, ppid.id_len);</div><div class='ctx'> 		dl_port-&gt;attrs.switch_id.id_len = ppid.id_len;</div><div class='add'>+		if (vport-&gt;adjacent) {</div><div class='add'>+			func_id = vport-&gt;adj_info.function_id;</div><div class='add'>+			pfnum = vport-&gt;adj_info.parent_pci_devfn;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		devlink_port_attrs_pci_vf_set(dl_port, controller_num, pfnum,</div><div class='del'>-					      vport_num - 1, external);</div><div class='add'>+					      func_id, external);</div><div class='ctx'> 	}  else if (mlx5_core_is_ec_vf_vport(esw-&gt;dev, vport_num)) {</div><div class='add'>+		u16 base_vport = mlx5_core_ec_vf_vport_base(dev);</div><div class='add'>+</div><div class='ctx'> 		memcpy(dl_port-&gt;attrs.switch_id.id, ppid.id, ppid.id_len);</div><div class='ctx'> 		dl_port-&gt;attrs.switch_id.id_len = ppid.id_len;</div><div class='ctx'> 		devlink_port_attrs_pci_vf_set(dl_port, 0, pfnum,</div><div class='del'>-					      vport_num - 1, false);</div><div class='add'>+					      vport_num - base_vport, false);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -110,7 +117,7 @@ static void mlx5_esw_offloads_sf_devlink_port_attrs_set(struct mlx5_eswitch *esw</div><div class='ctx'> 	struct netdev_phys_item_id ppid = {};</div><div class='ctx'> 	u16 pfnum;</div><div class='ctx'> </div><div class='del'>-	pfnum = mlx5_get_dev_index(dev);</div><div class='add'>+	pfnum = PCI_FUNC(dev-&gt;pdev-&gt;devfn);</div><div class='ctx'> 	mlx5_esw_get_port_parent_id(dev, &amp;ppid);</div><div class='ctx'> 	memcpy(dl_port-&gt;attrs.switch_id.id, &amp;ppid.id[0], ppid.id_len);</div><div class='ctx'> 	dl_port-&gt;attrs.switch_id.id_len = ppid.id_len;</div><div class='hunk'>@@ -195,7 +202,7 @@ void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_vport *vport)</div><div class='ctx'> 		return;</div><div class='ctx'> 	dl_port = vport-&gt;dl_port;</div><div class='ctx'> </div><div class='del'>-	mlx5_esw_qos_vport_update_node(vport, NULL, NULL);</div><div class='add'>+	mlx5_esw_qos_vport_update_parent(vport, NULL, NULL);</div><div class='ctx'> 	devl_rate_leaf_destroy(&amp;dl_port-&gt;dl_port);</div><div class='ctx'> </div><div class='ctx'> 	devl_port_unregister(&amp;dl_port-&gt;dl_port);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.c<br/>index 5a0047bdcb51..3cfe743610d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.c</a></div><div class='hunk'>@@ -10,9 +10,9 @@</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='del'>-	MLX5_ESW_IPSEC_RX_POL_FT_LEVEL,</div><div class='ctx'> 	MLX5_ESW_IPSEC_RX_ESP_FT_LEVEL,</div><div class='ctx'> 	MLX5_ESW_IPSEC_RX_ESP_FT_CHK_LEVEL,</div><div class='add'>+	MLX5_ESW_IPSEC_RX_POL_FT_LEVEL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -85,6 +85,19 @@ err_header_alloc:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void mlx5_esw_ipsec_rx_rule_add_match_obj(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='add'>+					  struct mlx5_flow_spec *spec)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+		 misc_parameters_2.metadata_reg_c_1,</div><div class='add'>+		 ESW_IPSEC_RX_MAPPED_ID_MATCH_MASK);</div><div class='add'>+	MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+		 misc_parameters_2.metadata_reg_c_1,</div><div class='add'>+		 sa_entry-&gt;rx_mapped_id &lt;&lt; ESW_ZONE_ID_BITS);</div><div class='add'>+</div><div class='add'>+	spec-&gt;match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5_esw_ipsec_rx_id_mapping_remove(struct mlx5e_ipsec_sa_entry *sa_entry)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_ipsec *ipsec = sa_entry-&gt;ipsec;</div><div class='hunk'>@@ -150,11 +163,11 @@ void mlx5_esw_ipsec_restore_dest_uplink(struct mlx5_core_dev *mdev)</div><div class='ctx'> 	unsigned long i;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	xa_for_each(&amp;esw-&gt;offloads.vport_reps, i, rep) {</div><div class='del'>-		rpriv = rep-&gt;rep_data[REP_ETH].priv;</div><div class='del'>-		if (!rpriv || !rpriv-&gt;netdev)</div><div class='add'>+	mlx5_esw_for_each_rep(esw, i, rep) {</div><div class='add'>+		if (atomic_read(&amp;rep-&gt;rep_data[REP_ETH].state) != REP_LOADED)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		rpriv = rep-&gt;rep_data[REP_ETH].priv;</div><div class='ctx'> 		rhashtable_walk_enter(&amp;rpriv-&gt;tc_ht, &amp;iter);</div><div class='ctx'> 		rhashtable_walk_start(&amp;iter);</div><div class='ctx'> 		while ((flow = rhashtable_walk_next(&amp;iter)) != NULL) {</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.h b/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.h<br/>index ac9c65b89166..514c15258b1d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.h</a></div><div class='hunk'>@@ -20,6 +20,8 @@ int mlx5_esw_ipsec_rx_ipsec_obj_id_search(struct mlx5e_priv *priv, u32 id,</div><div class='ctx'> void mlx5_esw_ipsec_tx_create_attr_set(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 				       struct mlx5e_ipsec_tx_create_attr *attr);</div><div class='ctx'> void mlx5_esw_ipsec_restore_dest_uplink(struct mlx5_core_dev *mdev);</div><div class='add'>+void mlx5_esw_ipsec_rx_rule_add_match_obj(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='add'>+					  struct mlx5_flow_spec *spec);</div><div class='ctx'> #else</div><div class='ctx'> static inline void mlx5_esw_ipsec_rx_create_attr_set(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 						     struct mlx5e_ipsec_rx_create_attr *attr) {}</div><div class='hunk'>@@ -48,5 +50,8 @@ static inline void mlx5_esw_ipsec_tx_create_attr_set(struct mlx5e_ipsec *ipsec,</div><div class='ctx'> 						     struct mlx5e_ipsec_tx_create_attr *attr) {}</div><div class='ctx'> </div><div class='ctx'> static inline void mlx5_esw_ipsec_restore_dest_uplink(struct mlx5_core_dev *mdev) {}</div><div class='add'>+static inline void</div><div class='add'>+mlx5_esw_ipsec_rx_rule_add_match_obj(struct mlx5e_ipsec_sa_entry *sa_entry,</div><div class='add'>+				     struct mlx5_flow_spec *spec) {}</div><div class='ctx'> #endif /* CONFIG_MLX5_ESWITCH */</div><div class='ctx'> #endif /* __MLX5_ESW_IPSEC_FS_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c<br/>index 45183de424f3..929adeb50a98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c</a></div><div class='hunk'>@@ -66,7 +66,6 @@ static void esw_destroy_legacy_fdb_table(struct mlx5_eswitch *esw)</div><div class='ctx'> 	esw-&gt;fdb_table.legacy.addr_grp = NULL;</div><div class='ctx'> 	esw-&gt;fdb_table.legacy.allmulti_grp = NULL;</div><div class='ctx'> 	esw-&gt;fdb_table.legacy.promisc_grp = NULL;</div><div class='del'>-	atomic64_set(&amp;esw-&gt;user_count, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw)</div><div class='hunk'>@@ -96,7 +95,7 @@ static int esw_create_legacy_fdb_table(struct mlx5_eswitch *esw)</div><div class='ctx'> 	if (!flow_group_in)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ft_attr.max_fte = POOL_NEXT_SIZE;</div><div class='add'>+	ft_attr.max_fte = MLX5_FS_MAX_POOL_SIZE;</div><div class='ctx'> 	ft_attr.prio = LEGACY_FDB_PRIO;</div><div class='ctx'> 	fdb = mlx5_create_flow_table(root_ns, &amp;ft_attr);</div><div class='ctx'> 	if (IS_ERR(fdb)) {</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c<br/>index 7e7f99b38a37..4278bcb04c72 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c</a></div><div class='hunk'>@@ -64,11 +64,19 @@ static void esw_qos_domain_release(struct mlx5_eswitch *esw)</div><div class='ctx'> enum sched_node_type {</div><div class='ctx'> 	SCHED_NODE_TYPE_VPORTS_TSAR,</div><div class='ctx'> 	SCHED_NODE_TYPE_VPORT,</div><div class='add'>+	SCHED_NODE_TYPE_TC_ARBITER_TSAR,</div><div class='add'>+	SCHED_NODE_TYPE_RATE_LIMITER,</div><div class='add'>+	SCHED_NODE_TYPE_VPORT_TC,</div><div class='add'>+	SCHED_NODE_TYPE_VPORTS_TC_TSAR,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const char * const sched_node_type_str[] = {</div><div class='ctx'> 	[SCHED_NODE_TYPE_VPORTS_TSAR] = "vports TSAR",</div><div class='ctx'> 	[SCHED_NODE_TYPE_VPORT] = "vport",</div><div class='add'>+	[SCHED_NODE_TYPE_TC_ARBITER_TSAR] = "TC Arbiter TSAR",</div><div class='add'>+	[SCHED_NODE_TYPE_RATE_LIMITER] = "Rate Limiter",</div><div class='add'>+	[SCHED_NODE_TYPE_VPORT_TC] = "vport TC",</div><div class='add'>+	[SCHED_NODE_TYPE_VPORTS_TC_TSAR] = "vports TC TSAR",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5_esw_sched_node {</div><div class='hunk'>@@ -90,15 +98,77 @@ struct mlx5_esw_sched_node {</div><div class='ctx'> 	struct list_head children;</div><div class='ctx'> 	/* Valid only if this node is associated with a vport. */</div><div class='ctx'> 	struct mlx5_vport *vport;</div><div class='add'>+	/* Level in the hierarchy. The root node level is 1. */</div><div class='add'>+	u8 level;</div><div class='add'>+	/* Valid only when this node represents a traffic class. */</div><div class='add'>+	u8 tc;</div><div class='add'>+	/* Valid only for a TC arbiter node or vport TC arbiter. */</div><div class='add'>+	u32 tc_bw[DEVLINK_RATE_TCS_MAX];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void esw_qos_node_attach_to_parent(struct mlx5_esw_sched_node *node)</div><div class='add'>+{</div><div class='add'>+	if (!node-&gt;parent) {</div><div class='add'>+		/* Root children are assigned a depth level of 2. */</div><div class='add'>+		node-&gt;level = 2;</div><div class='add'>+		list_add_tail(&amp;node-&gt;entry, &amp;node-&gt;esw-&gt;qos.domain-&gt;nodes);</div><div class='add'>+	} else {</div><div class='add'>+		node-&gt;level = node-&gt;parent-&gt;level + 1;</div><div class='add'>+		list_add_tail(&amp;node-&gt;entry, &amp;node-&gt;parent-&gt;children);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_num_tcs(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int num_tcs = mlx5_max_tc(dev) + 1;</div><div class='add'>+</div><div class='add'>+	return num_tcs &lt; DEVLINK_RATE_TCS_MAX ? num_tcs : DEVLINK_RATE_TCS_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> esw_qos_node_set_parent(struct mlx5_esw_sched_node *node, struct mlx5_esw_sched_node *parent)</div><div class='ctx'> {</div><div class='ctx'> 	list_del_init(&amp;node-&gt;entry);</div><div class='ctx'> 	node-&gt;parent = parent;</div><div class='del'>-	list_add_tail(&amp;node-&gt;entry, &amp;parent-&gt;children);</div><div class='del'>-	node-&gt;esw = parent-&gt;esw;</div><div class='add'>+	if (parent)</div><div class='add'>+		node-&gt;esw = parent-&gt;esw;</div><div class='add'>+	esw_qos_node_attach_to_parent(node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void esw_qos_nodes_set_parent(struct list_head *nodes,</div><div class='add'>+				     struct mlx5_esw_sched_node *parent)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *node, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(node, tmp, nodes, entry) {</div><div class='add'>+		esw_qos_node_set_parent(node, parent);</div><div class='add'>+		if (!list_empty(&amp;node-&gt;children) &amp;&amp;</div><div class='add'>+		    parent-&gt;type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {</div><div class='add'>+			struct mlx5_esw_sched_node *child;</div><div class='add'>+</div><div class='add'>+			list_for_each_entry(child, &amp;node-&gt;children, entry) {</div><div class='add'>+				struct mlx5_vport *vport = child-&gt;vport;</div><div class='add'>+</div><div class='add'>+				if (vport)</div><div class='add'>+					vport-&gt;qos.sched_node-&gt;parent = parent;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_esw_qos_vport_qos_free(struct mlx5_vport *vport)</div><div class='add'>+{</div><div class='add'>+	if (vport-&gt;qos.sched_nodes) {</div><div class='add'>+		int num_tcs = esw_qos_num_tcs(vport-&gt;qos.sched_node-&gt;esw-&gt;dev);</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; num_tcs; i++)</div><div class='add'>+			kfree(vport-&gt;qos.sched_nodes[i]);</div><div class='add'>+		kfree(vport-&gt;qos.sched_nodes);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(vport-&gt;qos.sched_node);</div><div class='add'>+	memset(&amp;vport-&gt;qos, 0, sizeof(vport-&gt;qos));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u32 mlx5_esw_qos_vport_get_sched_elem_ix(const struct mlx5_vport *vport)</div><div class='hunk'>@@ -118,18 +188,70 @@ mlx5_esw_qos_vport_get_parent(const struct mlx5_vport *vport)</div><div class='ctx'> 	return vport-&gt;qos.sched_node-&gt;parent;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void esw_qos_sched_elem_config_warn(struct mlx5_esw_sched_node *node, int err)</div><div class='add'>+static void esw_qos_sched_elem_warn(struct mlx5_esw_sched_node *node, int err, const char *op)</div><div class='ctx'> {</div><div class='del'>-	if (node-&gt;vport) {</div><div class='add'>+	switch (node-&gt;type) {</div><div class='add'>+	case SCHED_NODE_TYPE_VPORTS_TC_TSAR:</div><div class='ctx'> 		esw_warn(node-&gt;esw-&gt;dev,</div><div class='del'>-			 "E-Switch modify %s scheduling element failed (vport=%d,err=%d)\n",</div><div class='del'>-			 sched_node_type_str[node-&gt;type], node-&gt;vport-&gt;vport, err);</div><div class='del'>-		return;</div><div class='add'>+			 "E-Switch %s %s scheduling element failed (tc=%d,err=%d)\n",</div><div class='add'>+			 op, sched_node_type_str[node-&gt;type], node-&gt;tc, err);</div><div class='add'>+		break;</div><div class='add'>+	case SCHED_NODE_TYPE_VPORT_TC:</div><div class='add'>+		esw_warn(node-&gt;esw-&gt;dev,</div><div class='add'>+			 "E-Switch %s %s scheduling element failed (vport=%d,tc=%d,err=%d)\n",</div><div class='add'>+			 op,</div><div class='add'>+			 sched_node_type_str[node-&gt;type],</div><div class='add'>+			 node-&gt;vport-&gt;vport, node-&gt;tc, err);</div><div class='add'>+		break;</div><div class='add'>+	case SCHED_NODE_TYPE_VPORT:</div><div class='add'>+		esw_warn(node-&gt;esw-&gt;dev,</div><div class='add'>+			 "E-Switch %s %s scheduling element failed (vport=%d,err=%d)\n",</div><div class='add'>+			 op, sched_node_type_str[node-&gt;type], node-&gt;vport-&gt;vport, err);</div><div class='add'>+		break;</div><div class='add'>+	case SCHED_NODE_TYPE_RATE_LIMITER:</div><div class='add'>+	case SCHED_NODE_TYPE_TC_ARBITER_TSAR:</div><div class='add'>+	case SCHED_NODE_TYPE_VPORTS_TSAR:</div><div class='add'>+		esw_warn(node-&gt;esw-&gt;dev,</div><div class='add'>+			 "E-Switch %s %s scheduling element failed (err=%d)\n",</div><div class='add'>+			 op, sched_node_type_str[node-&gt;type], err);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		esw_warn(node-&gt;esw-&gt;dev,</div><div class='add'>+			 "E-Switch %s scheduling element failed (err=%d)\n",</div><div class='add'>+			 op, err);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_node_create_sched_element(struct mlx5_esw_sched_node *node, void *ctx,</div><div class='add'>+					     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_create_scheduling_element_cmd(node-&gt;esw-&gt;dev, SCHEDULING_HIERARCHY_E_SWITCH, ctx,</div><div class='add'>+						 &amp;node-&gt;ix);</div><div class='add'>+	if (err) {</div><div class='add'>+		esw_qos_sched_elem_warn(node, err, "create");</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "E-Switch create scheduling element failed");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_node_destroy_sched_element(struct mlx5_esw_sched_node *node,</div><div class='add'>+					      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_destroy_scheduling_element_cmd(node-&gt;esw-&gt;dev,</div><div class='add'>+						  SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='add'>+						  node-&gt;ix);</div><div class='add'>+	if (err) {</div><div class='add'>+		esw_qos_sched_elem_warn(node, err, "destroy");</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "E-Switch destroying scheduling element failed.");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	esw_warn(node-&gt;esw-&gt;dev,</div><div class='del'>-		 "E-Switch modify %s scheduling element failed (err=%d)\n",</div><div class='del'>-		 sched_node_type_str[node-&gt;type], err);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int esw_qos_sched_elem_config(struct mlx5_esw_sched_node *node, u32 max_rate, u32 bw_share,</div><div class='hunk'>@@ -143,10 +265,21 @@ static int esw_qos_sched_elem_config(struct mlx5_esw_sched_node *node, u32 max_r</div><div class='ctx'> 	if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	MLX5_SET(scheduling_context, sched_ctx, max_average_bw, max_rate);</div><div class='del'>-	MLX5_SET(scheduling_context, sched_ctx, bw_share, bw_share);</div><div class='del'>-	bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW;</div><div class='del'>-	bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE;</div><div class='add'>+	if (bw_share &amp;&amp; (!MLX5_CAP_QOS(dev, esw_bw_share) ||</div><div class='add'>+			 MLX5_CAP_QOS(dev, max_tsar_bw_share) &lt; MLX5_MIN_BW_SHARE))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (node-&gt;max_rate == max_rate &amp;&amp; node-&gt;bw_share == bw_share)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (node-&gt;max_rate != max_rate) {</div><div class='add'>+		MLX5_SET(scheduling_context, sched_ctx, max_average_bw, max_rate);</div><div class='add'>+		bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW;</div><div class='add'>+	}</div><div class='add'>+	if (node-&gt;bw_share != bw_share) {</div><div class='add'>+		MLX5_SET(scheduling_context, sched_ctx, bw_share, bw_share);</div><div class='add'>+		bitmask |= MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_modify_scheduling_element_cmd(dev,</div><div class='ctx'> 						 SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='hunk'>@@ -154,12 +287,14 @@ static int esw_qos_sched_elem_config(struct mlx5_esw_sched_node *node, u32 max_r</div><div class='ctx'> 						 node-&gt;ix,</div><div class='ctx'> 						 bitmask);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		esw_qos_sched_elem_config_warn(node, err);</div><div class='add'>+		esw_qos_sched_elem_warn(node, err, "modify");</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "E-Switch modify scheduling element failed");</div><div class='ctx'> </div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	node-&gt;max_rate = max_rate;</div><div class='add'>+	node-&gt;bw_share = bw_share;</div><div class='ctx'> 	if (node-&gt;type == SCHED_NODE_TYPE_VPORTS_TSAR)</div><div class='ctx'> 		trace_mlx5_esw_node_qos_config(dev, node, node-&gt;ix, bw_share, max_rate);</div><div class='ctx'> 	else if (node-&gt;type == SCHED_NODE_TYPE_VPORT)</div><div class='hunk'>@@ -168,6 +303,24 @@ static int esw_qos_sched_elem_config(struct mlx5_esw_sched_node *node, u32 max_r</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int esw_qos_create_rate_limit_element(struct mlx5_esw_sched_node *node,</div><div class='add'>+					     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {};</div><div class='add'>+</div><div class='add'>+	if (!mlx5_qos_element_type_supported(</div><div class='add'>+		node-&gt;esw-&gt;dev,</div><div class='add'>+		SCHEDULING_CONTEXT_ELEMENT_TYPE_RATE_LIMIT,</div><div class='add'>+		SCHEDULING_HIERARCHY_E_SWITCH))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(scheduling_context, sched_ctx, max_average_bw, node-&gt;max_rate);</div><div class='add'>+	MLX5_SET(scheduling_context, sched_ctx, element_type,</div><div class='add'>+		 SCHEDULING_CONTEXT_ELEMENT_TYPE_RATE_LIMIT);</div><div class='add'>+</div><div class='add'>+	return esw_qos_node_create_sched_element(node, sched_ctx, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u32 esw_qos_calculate_min_rate_divider(struct mlx5_eswitch *esw,</div><div class='ctx'> 					      struct mlx5_esw_sched_node *parent)</div><div class='ctx'> {</div><div class='hunk'>@@ -188,190 +341,91 @@ static u32 esw_qos_calculate_min_rate_divider(struct mlx5_eswitch *esw,</div><div class='ctx'> 	if (max_guarantee)</div><div class='ctx'> 		return max_t(u32, max_guarantee / fw_max_bw_share, 1);</div><div class='ctx'> </div><div class='del'>-	/* If nodes max min_rate divider is 0 but their parent has bw_share</div><div class='del'>-	 * configured, then set bw_share for nodes to minimal value.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if (parent &amp;&amp; parent-&gt;bw_share)</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='ctx'> 	/* If the node nodes has min_rate configured, a divider of 0 sets all</div><div class='ctx'> 	 * nodes' bw_share to 0, effectively disabling min guarantees.</div><div class='ctx'> 	 */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 esw_qos_calc_bw_share(u32 min_rate, u32 divider, u32 fw_max)</div><div class='add'>+static u32 esw_qos_calc_bw_share(u32 value, u32 divider, u32 fw_max)</div><div class='ctx'> {</div><div class='ctx'> 	if (!divider)</div><div class='ctx'> 		return 0;</div><div class='del'>-	return min_t(u32, max_t(u32, DIV_ROUND_UP(min_rate, divider), MLX5_MIN_BW_SHARE), fw_max);</div><div class='add'>+	return min_t(u32, fw_max,</div><div class='add'>+		     max_t(u32,</div><div class='add'>+			   DIV_ROUND_UP(value, divider), MLX5_MIN_BW_SHARE));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int esw_qos_update_sched_node_bw_share(struct mlx5_esw_sched_node *node,</div><div class='del'>-					      u32 divider,</div><div class='del'>-					      struct netlink_ext_ack *extack)</div><div class='add'>+static void esw_qos_update_sched_node_bw_share(struct mlx5_esw_sched_node *node,</div><div class='add'>+					       u32 divider,</div><div class='add'>+					       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	u32 fw_max_bw_share = MLX5_CAP_QOS(node-&gt;esw-&gt;dev, max_tsar_bw_share);</div><div class='ctx'> 	u32 bw_share;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	bw_share = esw_qos_calc_bw_share(node-&gt;min_rate, divider, fw_max_bw_share);</div><div class='ctx'> </div><div class='del'>-	if (bw_share == node-&gt;bw_share)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	err = esw_qos_sched_elem_config(node, node-&gt;max_rate, bw_share, extack);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	node-&gt;bw_share = bw_share;</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	esw_qos_sched_elem_config(node, node-&gt;max_rate, bw_share, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int esw_qos_normalize_min_rate(struct mlx5_eswitch *esw,</div><div class='del'>-				      struct mlx5_esw_sched_node *parent,</div><div class='del'>-				      struct netlink_ext_ack *extack)</div><div class='add'>+static void esw_qos_normalize_min_rate(struct mlx5_eswitch *esw,</div><div class='add'>+				       struct mlx5_esw_sched_node *parent,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct list_head *nodes = parent ? &amp;parent-&gt;children : &amp;esw-&gt;qos.domain-&gt;nodes;</div><div class='ctx'> 	u32 divider = esw_qos_calculate_min_rate_divider(esw, parent);</div><div class='ctx'> 	struct mlx5_esw_sched_node *node;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(node, nodes, entry) {</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='ctx'> 		if (node-&gt;esw != esw || node-&gt;ix == esw-&gt;qos.root_tsar_ix)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		err = esw_qos_update_sched_node_bw_share(node, divider, extack);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='add'>+		/* Vports TC TSARs don't have a minimum rate configured,</div><div class='add'>+		 * so there's no need to update the bw_share on them.</div><div class='add'>+		 */</div><div class='add'>+		if (node-&gt;type != SCHED_NODE_TYPE_VPORTS_TC_TSAR) {</div><div class='add'>+			esw_qos_update_sched_node_bw_share(node, divider,</div><div class='add'>+							   extack);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (list_empty(&amp;node-&gt;children))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		err = esw_qos_normalize_min_rate(node-&gt;esw, node, extack);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='add'>+		esw_qos_normalize_min_rate(node-&gt;esw, node, extack);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int esw_qos_set_vport_min_rate(struct mlx5_vport *vport,</div><div class='del'>-				      u32 min_rate, struct netlink_ext_ack *extack)</div><div class='del'>-{</div><div class='del'>-	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='del'>-	u32 fw_max_bw_share, previous_min_rate;</div><div class='del'>-	bool min_rate_supported;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	esw_assert_qos_lock_held(vport_node-&gt;esw);</div><div class='del'>-	fw_max_bw_share = MLX5_CAP_QOS(vport-&gt;dev, max_tsar_bw_share);</div><div class='del'>-	min_rate_supported = MLX5_CAP_QOS(vport-&gt;dev, esw_bw_share) &amp;&amp;</div><div class='del'>-				fw_max_bw_share &gt;= MLX5_MIN_BW_SHARE;</div><div class='del'>-	if (min_rate &amp;&amp; !min_rate_supported)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	if (min_rate == vport_node-&gt;min_rate)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	previous_min_rate = vport_node-&gt;min_rate;</div><div class='del'>-	vport_node-&gt;min_rate = min_rate;</div><div class='del'>-	err = esw_qos_normalize_min_rate(vport_node-&gt;parent-&gt;esw, vport_node-&gt;parent, extack);</div><div class='del'>-	if (err)</div><div class='del'>-		vport_node-&gt;min_rate = previous_min_rate;</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int esw_qos_set_vport_max_rate(struct mlx5_vport *vport,</div><div class='del'>-				      u32 max_rate, struct netlink_ext_ack *extack)</div><div class='add'>+static u32 esw_qos_calculate_tc_bw_divider(u32 *tc_bw)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='del'>-	u32 act_max_rate = max_rate;</div><div class='del'>-	bool max_rate_supported;</div><div class='del'>-	int err;</div><div class='add'>+	u32 total = 0;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	esw_assert_qos_lock_held(vport_node-&gt;esw);</div><div class='del'>-	max_rate_supported = MLX5_CAP_QOS(vport-&gt;dev, esw_rate_limit);</div><div class='add'>+	for (i = 0; i &lt; DEVLINK_RATE_TCS_MAX; i++)</div><div class='add'>+		total += tc_bw[i];</div><div class='ctx'> </div><div class='del'>-	if (max_rate &amp;&amp; !max_rate_supported)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	if (max_rate == vport_node-&gt;max_rate)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Use parent node limit if new max rate is 0. */</div><div class='del'>-	if (!max_rate)</div><div class='del'>-		act_max_rate = vport_node-&gt;parent-&gt;max_rate;</div><div class='del'>-</div><div class='del'>-	err = esw_qos_sched_elem_config(vport_node, act_max_rate, vport_node-&gt;bw_share, extack);</div><div class='del'>-	if (!err)</div><div class='del'>-		vport_node-&gt;max_rate = max_rate;</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	/* If total is zero, tc-bw config is disabled and we shouldn't reach</div><div class='add'>+	 * here.</div><div class='add'>+	 */</div><div class='add'>+	return WARN_ON(!total) ? 1 : total;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int esw_qos_set_node_min_rate(struct mlx5_esw_sched_node *node,</div><div class='ctx'> 				     u32 min_rate, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_eswitch *esw = node-&gt;esw;</div><div class='del'>-	u32 previous_min_rate;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!MLX5_CAP_QOS(esw-&gt;dev, esw_bw_share) ||</div><div class='del'>-	    MLX5_CAP_QOS(esw-&gt;dev, max_tsar_bw_share) &lt; MLX5_MIN_BW_SHARE)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	if (min_rate == node-&gt;min_rate)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	previous_min_rate = node-&gt;min_rate;</div><div class='ctx'> 	node-&gt;min_rate = min_rate;</div><div class='del'>-	err = esw_qos_normalize_min_rate(esw, NULL, extack);</div><div class='del'>-	if (err) {</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack, "E-Switch node min rate setting failed");</div><div class='del'>-</div><div class='del'>-		/* Attempt restoring previous configuration */</div><div class='del'>-		node-&gt;min_rate = previous_min_rate;</div><div class='del'>-		if (esw_qos_normalize_min_rate(esw, NULL, extack))</div><div class='del'>-			NL_SET_ERR_MSG_MOD(extack, "E-Switch BW share restore failed");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='add'>+	esw_qos_normalize_min_rate(esw, node-&gt;parent, extack);</div><div class='ctx'> </div><div class='del'>-static int esw_qos_set_node_max_rate(struct mlx5_esw_sched_node *node,</div><div class='del'>-				     u32 max_rate, struct netlink_ext_ack *extack)</div><div class='del'>-{</div><div class='del'>-	struct mlx5_esw_sched_node *vport_node;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (node-&gt;max_rate == max_rate)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	err = esw_qos_sched_elem_config(node, max_rate, node-&gt;bw_share, extack);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	node-&gt;max_rate = max_rate;</div><div class='del'>-</div><div class='del'>-	/* Any unlimited vports in the node should be set with the value of the node. */</div><div class='del'>-	list_for_each_entry(vport_node, &amp;node-&gt;children, entry) {</div><div class='del'>-		if (vport_node-&gt;max_rate)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		err = esw_qos_sched_elem_config(vport_node, max_rate, vport_node-&gt;bw_share, extack);</div><div class='del'>-		if (err)</div><div class='del'>-			NL_SET_ERR_MSG_MOD(extack,</div><div class='del'>-					   "E-Switch vport implicit rate limit setting failed");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int esw_qos_create_node_sched_elem(struct mlx5_core_dev *dev, u32 parent_element_id,</div><div class='del'>-					  u32 *tsar_ix)</div><div class='add'>+static int</div><div class='add'>+esw_qos_create_node_sched_elem(struct mlx5_core_dev *dev, u32 parent_element_id,</div><div class='add'>+			       u32 max_rate, u32 bw_share, u32 *tsar_ix)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {};</div><div class='ctx'> 	void *attr;</div><div class='hunk'>@@ -388,6 +442,8 @@ static int esw_qos_create_node_sched_elem(struct mlx5_core_dev *dev, u32 parent_</div><div class='ctx'> 		 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR);</div><div class='ctx'> 	MLX5_SET(scheduling_context, tsar_ctx, parent_element_id,</div><div class='ctx'> 		 parent_element_id);</div><div class='add'>+	MLX5_SET(scheduling_context, tsar_ctx, max_average_bw, max_rate);</div><div class='add'>+	MLX5_SET(scheduling_context, tsar_ctx, bw_share, bw_share);</div><div class='ctx'> 	attr = MLX5_ADDR_OF(scheduling_context, tsar_ctx, element_attributes);</div><div class='ctx'> 	MLX5_SET(tsar_element, attr, tsar_type, TSAR_ELEMENT_TSAR_TYPE_DWRR);</div><div class='ctx'> </div><div class='hunk'>@@ -398,116 +454,68 @@ static int esw_qos_create_node_sched_elem(struct mlx5_core_dev *dev, u32 parent_</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-esw_qos_vport_create_sched_element(struct mlx5_vport *vport, struct mlx5_esw_sched_node *parent,</div><div class='del'>-				   u32 max_rate, u32 bw_share, u32 *sched_elem_ix)</div><div class='add'>+esw_qos_vport_create_sched_element(struct mlx5_esw_sched_node *vport_node,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_esw_sched_node *parent = vport_node-&gt;parent;</div><div class='ctx'> 	u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {};</div><div class='del'>-	struct mlx5_core_dev *dev = parent-&gt;esw-&gt;dev;</div><div class='add'>+	struct mlx5_core_dev *dev = vport_node-&gt;esw-&gt;dev;</div><div class='ctx'> 	void *attr;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='del'>-	if (!mlx5_qos_element_type_supported(dev,</div><div class='del'>-					     SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT,</div><div class='del'>-					     SCHEDULING_HIERARCHY_E_SWITCH))</div><div class='add'>+	if (!mlx5_qos_element_type_supported(</div><div class='add'>+		dev,</div><div class='add'>+		SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT,</div><div class='add'>+		SCHEDULING_HIERARCHY_E_SWITCH))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(scheduling_context, sched_ctx, element_type,</div><div class='ctx'> 		 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT);</div><div class='ctx'> 	attr = MLX5_ADDR_OF(scheduling_context, sched_ctx, element_attributes);</div><div class='del'>-	MLX5_SET(vport_element, attr, vport_number, vport-&gt;vport);</div><div class='del'>-	MLX5_SET(scheduling_context, sched_ctx, parent_element_id, parent-&gt;ix);</div><div class='del'>-	MLX5_SET(scheduling_context, sched_ctx, max_average_bw, max_rate);</div><div class='del'>-	MLX5_SET(scheduling_context, sched_ctx, bw_share, bw_share);</div><div class='add'>+	MLX5_SET(vport_element, attr, vport_number, vport_node-&gt;vport-&gt;vport);</div><div class='add'>+	MLX5_SET(scheduling_context, sched_ctx, parent_element_id,</div><div class='add'>+		 parent ? parent-&gt;ix : vport_node-&gt;esw-&gt;qos.root_tsar_ix);</div><div class='add'>+	MLX5_SET(scheduling_context, sched_ctx, max_average_bw,</div><div class='add'>+		 vport_node-&gt;max_rate);</div><div class='ctx'> </div><div class='del'>-	err = mlx5_create_scheduling_element_cmd(dev,</div><div class='del'>-						 SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='del'>-						 sched_ctx,</div><div class='del'>-						 sched_elem_ix);</div><div class='del'>-	if (err) {</div><div class='del'>-		esw_warn(dev,</div><div class='del'>-			 "E-Switch create vport scheduling element failed (vport=%d,err=%d)\n",</div><div class='del'>-			 vport-&gt;vport, err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int esw_qos_update_node_scheduling_element(struct mlx5_vport *vport,</div><div class='del'>-						  struct mlx5_esw_sched_node *curr_node,</div><div class='del'>-						  struct mlx5_esw_sched_node *new_node,</div><div class='del'>-						  struct netlink_ext_ack *extack)</div><div class='del'>-{</div><div class='del'>-	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='del'>-	u32 max_rate;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = mlx5_destroy_scheduling_element_cmd(curr_node-&gt;esw-&gt;dev,</div><div class='del'>-						  SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='del'>-						  vport_node-&gt;ix);</div><div class='del'>-	if (err) {</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack, "E-Switch destroy vport scheduling element failed");</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Use new node max rate if vport max rate is unlimited. */</div><div class='del'>-	max_rate = vport_node-&gt;max_rate ? vport_node-&gt;max_rate : new_node-&gt;max_rate;</div><div class='del'>-	err = esw_qos_vport_create_sched_element(vport, new_node, max_rate,</div><div class='del'>-						 vport_node-&gt;bw_share,</div><div class='del'>-						 &amp;vport_node-&gt;ix);</div><div class='del'>-	if (err) {</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack, "E-Switch vport node set failed.");</div><div class='del'>-		goto err_sched;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	esw_qos_node_set_parent(vport-&gt;qos.sched_node, new_node);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_sched:</div><div class='del'>-	max_rate = vport_node-&gt;max_rate ? vport_node-&gt;max_rate : curr_node-&gt;max_rate;</div><div class='del'>-	if (esw_qos_vport_create_sched_element(vport, curr_node, max_rate,</div><div class='del'>-					       vport_node-&gt;bw_share,</div><div class='del'>-					       &amp;vport_node-&gt;ix))</div><div class='del'>-		esw_warn(curr_node-&gt;esw-&gt;dev, "E-Switch vport node restore failed (vport=%d)\n",</div><div class='del'>-			 vport-&gt;vport);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	return esw_qos_node_create_sched_element(vport_node, sched_ctx, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int esw_qos_vport_update_node(struct mlx5_vport *vport,</div><div class='del'>-				     struct mlx5_esw_sched_node *node,</div><div class='del'>-				     struct netlink_ext_ack *extack)</div><div class='add'>+static int</div><div class='add'>+esw_qos_vport_tc_create_sched_element(struct mlx5_esw_sched_node *vport_tc_node,</div><div class='add'>+				      u32 rate_limit_elem_ix,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='del'>-	struct mlx5_eswitch *esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='del'>-	struct mlx5_esw_sched_node *new_node, *curr_node;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	esw_assert_qos_lock_held(esw);</div><div class='del'>-	curr_node = vport_node-&gt;parent;</div><div class='del'>-	new_node = node ?: esw-&gt;qos.node0;</div><div class='del'>-	if (curr_node == new_node)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	err = esw_qos_update_node_scheduling_element(vport, curr_node, new_node, extack);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {};</div><div class='add'>+	struct mlx5_core_dev *dev = vport_tc_node-&gt;esw-&gt;dev;</div><div class='add'>+	void *attr;</div><div class='ctx'> </div><div class='del'>-	/* Recalculate bw share weights of old and new nodes */</div><div class='del'>-	if (vport_node-&gt;bw_share || new_node-&gt;bw_share) {</div><div class='del'>-		esw_qos_normalize_min_rate(curr_node-&gt;esw, curr_node, extack);</div><div class='del'>-		esw_qos_normalize_min_rate(new_node-&gt;esw, new_node, extack);</div><div class='del'>-	}</div><div class='add'>+	if (!mlx5_qos_element_type_supported(</div><div class='add'>+		dev,</div><div class='add'>+		SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC,</div><div class='add'>+		SCHEDULING_HIERARCHY_E_SWITCH))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	MLX5_SET(scheduling_context, sched_ctx, element_type,</div><div class='add'>+		 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC);</div><div class='add'>+	attr = MLX5_ADDR_OF(scheduling_context, sched_ctx, element_attributes);</div><div class='add'>+	MLX5_SET(vport_tc_element, attr, vport_number,</div><div class='add'>+		 vport_tc_node-&gt;vport-&gt;vport);</div><div class='add'>+	MLX5_SET(vport_tc_element, attr, traffic_class, vport_tc_node-&gt;tc);</div><div class='add'>+	MLX5_SET(scheduling_context, sched_ctx, max_bw_obj_id,</div><div class='add'>+		 rate_limit_elem_ix);</div><div class='add'>+	MLX5_SET(scheduling_context, sched_ctx, parent_element_id,</div><div class='add'>+		 vport_tc_node-&gt;parent-&gt;ix);</div><div class='add'>+	MLX5_SET(scheduling_context, sched_ctx, bw_share,</div><div class='add'>+		 vport_tc_node-&gt;bw_share);</div><div class='add'>+</div><div class='add'>+	return esw_qos_node_create_sched_element(vport_tc_node, sched_ctx,</div><div class='add'>+						 extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct mlx5_esw_sched_node *</div><div class='ctx'> __esw_qos_alloc_node(struct mlx5_eswitch *esw, u32 tsar_ix, enum sched_node_type type,</div><div class='ctx'> 		     struct mlx5_esw_sched_node *parent)</div><div class='ctx'> {</div><div class='del'>-	struct list_head *parent_children;</div><div class='ctx'> 	struct mlx5_esw_sched_node *node;</div><div class='ctx'> </div><div class='ctx'> 	node = kzalloc(sizeof(*node), GFP_KERNEL);</div><div class='hunk'>@@ -519,8 +527,15 @@ __esw_qos_alloc_node(struct mlx5_eswitch *esw, u32 tsar_ix, enum sched_node_type</div><div class='ctx'> 	node-&gt;type = type;</div><div class='ctx'> 	node-&gt;parent = parent;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;node-&gt;children);</div><div class='del'>-	parent_children = parent ? &amp;parent-&gt;children : &amp;esw-&gt;qos.domain-&gt;nodes;</div><div class='del'>-	list_add_tail(&amp;node-&gt;entry, parent_children);</div><div class='add'>+	esw_qos_node_attach_to_parent(node);</div><div class='add'>+	if (!parent) {</div><div class='add'>+		/* The caller is responsible for inserting the node into the</div><div class='add'>+		 * parent list if necessary. This function can also be used with</div><div class='add'>+		 * a NULL parent, which doesn't necessarily indicate that it</div><div class='add'>+		 * refers to the root scheduling element.</div><div class='add'>+		 */</div><div class='add'>+		list_del_init(&amp;node-&gt;entry);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return node;</div><div class='ctx'> }</div><div class='hunk'>@@ -531,6 +546,153 @@ static void __esw_qos_free_node(struct mlx5_esw_sched_node *node)</div><div class='ctx'> 	kfree(node);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void esw_qos_destroy_node(struct mlx5_esw_sched_node *node, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	esw_qos_node_destroy_sched_element(node, extack);</div><div class='add'>+	__esw_qos_free_node(node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_create_vports_tc_node(struct mlx5_esw_sched_node *parent,</div><div class='add'>+					 u8 tc, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {};</div><div class='add'>+	struct mlx5_core_dev *dev = parent-&gt;esw-&gt;dev;</div><div class='add'>+	struct mlx5_esw_sched_node *vports_tc_node;</div><div class='add'>+	void *attr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mlx5_qos_element_type_supported(</div><div class='add'>+		dev,</div><div class='add'>+		SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR,</div><div class='add'>+		SCHEDULING_HIERARCHY_E_SWITCH) ||</div><div class='add'>+	    !mlx5_qos_tsar_type_supported(dev,</div><div class='add'>+					  TSAR_ELEMENT_TSAR_TYPE_DWRR,</div><div class='add'>+					  SCHEDULING_HIERARCHY_E_SWITCH))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	vports_tc_node = __esw_qos_alloc_node(parent-&gt;esw, 0,</div><div class='add'>+					      SCHED_NODE_TYPE_VPORTS_TC_TSAR,</div><div class='add'>+					      parent);</div><div class='add'>+	if (!vports_tc_node) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "E-Switch alloc node failed");</div><div class='add'>+		esw_warn(dev, "Failed to alloc vports TC node (tc=%d)\n", tc);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	attr = MLX5_ADDR_OF(scheduling_context, tsar_ctx, element_attributes);</div><div class='add'>+	MLX5_SET(tsar_element, attr, tsar_type, TSAR_ELEMENT_TSAR_TYPE_DWRR);</div><div class='add'>+	MLX5_SET(tsar_element, attr, traffic_class, tc);</div><div class='add'>+	MLX5_SET(scheduling_context, tsar_ctx, parent_element_id, parent-&gt;ix);</div><div class='add'>+	MLX5_SET(scheduling_context, tsar_ctx, element_type,</div><div class='add'>+		 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR);</div><div class='add'>+</div><div class='add'>+	err = esw_qos_node_create_sched_element(vports_tc_node, tsar_ctx,</div><div class='add'>+						extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_create_sched_element;</div><div class='add'>+</div><div class='add'>+	vports_tc_node-&gt;tc = tc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_create_sched_element:</div><div class='add'>+	__esw_qos_free_node(vports_tc_node);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+esw_qos_tc_arbiter_get_bw_shares(struct mlx5_esw_sched_node *tc_arbiter_node,</div><div class='add'>+				 u32 *tc_bw)</div><div class='add'>+{</div><div class='add'>+	memcpy(tc_bw, tc_arbiter_node-&gt;tc_bw, sizeof(tc_arbiter_node-&gt;tc_bw));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+esw_qos_set_tc_arbiter_bw_shares(struct mlx5_esw_sched_node *tc_arbiter_node,</div><div class='add'>+				 u32 *tc_bw, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_eswitch *esw = tc_arbiter_node-&gt;esw;</div><div class='add'>+	struct mlx5_esw_sched_node *vports_tc_node;</div><div class='add'>+	u32 divider, fw_max_bw_share;</div><div class='add'>+</div><div class='add'>+	fw_max_bw_share = MLX5_CAP_QOS(esw-&gt;dev, max_tsar_bw_share);</div><div class='add'>+	divider = esw_qos_calculate_tc_bw_divider(tc_bw);</div><div class='add'>+	list_for_each_entry(vports_tc_node, &amp;tc_arbiter_node-&gt;children, entry) {</div><div class='add'>+		u8 tc = vports_tc_node-&gt;tc;</div><div class='add'>+		u32 bw_share;</div><div class='add'>+</div><div class='add'>+		tc_arbiter_node-&gt;tc_bw[tc] = tc_bw[tc];</div><div class='add'>+		bw_share = tc_bw[tc] * fw_max_bw_share;</div><div class='add'>+		bw_share = esw_qos_calc_bw_share(bw_share, divider,</div><div class='add'>+						 fw_max_bw_share);</div><div class='add'>+		esw_qos_sched_elem_config(vports_tc_node, 0, bw_share, extack);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+esw_qos_destroy_vports_tc_nodes(struct mlx5_esw_sched_node *tc_arbiter_node,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vports_tc_node, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(vports_tc_node, tmp,</div><div class='add'>+				 &amp;tc_arbiter_node-&gt;children, entry)</div><div class='add'>+		esw_qos_destroy_node(vports_tc_node, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+esw_qos_create_vports_tc_nodes(struct mlx5_esw_sched_node *tc_arbiter_node,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_eswitch *esw = tc_arbiter_node-&gt;esw;</div><div class='add'>+	int err, i, num_tcs = esw_qos_num_tcs(esw-&gt;dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_tcs; i++) {</div><div class='add'>+		err = esw_qos_create_vports_tc_node(tc_arbiter_node, i, extack);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_tc_node_create;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_tc_node_create:</div><div class='add'>+	esw_qos_destroy_vports_tc_nodes(tc_arbiter_node, NULL);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_create_tc_arbiter_sched_elem(</div><div class='add'>+		struct mlx5_esw_sched_node *tc_arbiter_node,</div><div class='add'>+		struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 tsar_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {};</div><div class='add'>+	u32 tsar_parent_ix;</div><div class='add'>+	void *attr;</div><div class='add'>+</div><div class='add'>+	if (!mlx5_qos_tsar_type_supported(tc_arbiter_node-&gt;esw-&gt;dev,</div><div class='add'>+					  TSAR_ELEMENT_TSAR_TYPE_TC_ARB,</div><div class='add'>+					  SCHEDULING_HIERARCHY_E_SWITCH)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "E-Switch TC Arbiter scheduling element is not supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	attr = MLX5_ADDR_OF(scheduling_context, tsar_ctx, element_attributes);</div><div class='add'>+	MLX5_SET(tsar_element, attr, tsar_type, TSAR_ELEMENT_TSAR_TYPE_TC_ARB);</div><div class='add'>+	tsar_parent_ix = tc_arbiter_node-&gt;parent ? tc_arbiter_node-&gt;parent-&gt;ix :</div><div class='add'>+			 tc_arbiter_node-&gt;esw-&gt;qos.root_tsar_ix;</div><div class='add'>+	MLX5_SET(scheduling_context, tsar_ctx, parent_element_id,</div><div class='add'>+		 tsar_parent_ix);</div><div class='add'>+	MLX5_SET(scheduling_context, tsar_ctx, element_type,</div><div class='add'>+		 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR);</div><div class='add'>+	MLX5_SET(scheduling_context, tsar_ctx, max_average_bw,</div><div class='add'>+		 tc_arbiter_node-&gt;max_rate);</div><div class='add'>+	MLX5_SET(scheduling_context, tsar_ctx, bw_share,</div><div class='add'>+		 tc_arbiter_node-&gt;bw_share);</div><div class='add'>+</div><div class='add'>+	return esw_qos_node_create_sched_element(tc_arbiter_node, tsar_ctx,</div><div class='add'>+						 extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct mlx5_esw_sched_node *</div><div class='ctx'> __esw_qos_create_vports_sched_node(struct mlx5_eswitch *esw, struct mlx5_esw_sched_node *parent,</div><div class='ctx'> 				   struct netlink_ext_ack *extack)</div><div class='hunk'>@@ -539,7 +701,8 @@ __esw_qos_create_vports_sched_node(struct mlx5_eswitch *esw, struct mlx5_esw_sch</div><div class='ctx'> 	u32 tsar_ix;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = esw_qos_create_node_sched_elem(esw-&gt;dev, esw-&gt;qos.root_tsar_ix, &amp;tsar_ix);</div><div class='add'>+	err = esw_qos_create_node_sched_elem(esw-&gt;dev, esw-&gt;qos.root_tsar_ix, 0,</div><div class='add'>+					     0, &amp;tsar_ix);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "E-Switch create TSAR for node failed");</div><div class='ctx'> 		return ERR_PTR(err);</div><div class='hunk'>@@ -552,17 +715,12 @@ __esw_qos_create_vports_sched_node(struct mlx5_eswitch *esw, struct mlx5_esw_sch</div><div class='ctx'> 		goto err_alloc_node;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = esw_qos_normalize_min_rate(esw, NULL, extack);</div><div class='del'>-	if (err) {</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack, "E-Switch nodes normalization failed");</div><div class='del'>-		goto err_min_rate;</div><div class='del'>-	}</div><div class='add'>+	list_add_tail(&amp;node-&gt;entry, &amp;esw-&gt;qos.domain-&gt;nodes);</div><div class='add'>+	esw_qos_normalize_min_rate(esw, NULL, extack);</div><div class='ctx'> 	trace_mlx5_esw_node_qos_create(esw-&gt;dev, node, node-&gt;ix);</div><div class='ctx'> </div><div class='ctx'> 	return node;</div><div class='ctx'> </div><div class='del'>-err_min_rate:</div><div class='del'>-	__esw_qos_free_node(node);</div><div class='ctx'> err_alloc_node:</div><div class='ctx'> 	if (mlx5_destroy_scheduling_element_cmd(esw-&gt;dev,</div><div class='ctx'> 						SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='hunk'>@@ -595,26 +753,16 @@ esw_qos_create_vports_sched_node(struct mlx5_eswitch *esw, struct netlink_ext_ac</div><div class='ctx'> 	return node;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __esw_qos_destroy_node(struct mlx5_esw_sched_node *node, struct netlink_ext_ack *extack)</div><div class='add'>+static void __esw_qos_destroy_node(struct mlx5_esw_sched_node *node, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_eswitch *esw = node-&gt;esw;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	trace_mlx5_esw_node_qos_destroy(esw-&gt;dev, node, node-&gt;ix);</div><div class='del'>-</div><div class='del'>-	err = mlx5_destroy_scheduling_element_cmd(esw-&gt;dev,</div><div class='del'>-						  SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='del'>-						  node-&gt;ix);</div><div class='del'>-	if (err)</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack, "E-Switch destroy TSAR_ID failed");</div><div class='del'>-	__esw_qos_free_node(node);</div><div class='del'>-</div><div class='del'>-	err = esw_qos_normalize_min_rate(esw, NULL, extack);</div><div class='del'>-	if (err)</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack, "E-Switch nodes normalization failed");</div><div class='ctx'> </div><div class='add'>+	if (node-&gt;type == SCHED_NODE_TYPE_TC_ARBITER_TSAR)</div><div class='add'>+		esw_qos_destroy_vports_tc_nodes(node, extack);</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	trace_mlx5_esw_node_qos_destroy(esw-&gt;dev, node, node-&gt;ix);</div><div class='add'>+	esw_qos_destroy_node(node, extack);</div><div class='add'>+	esw_qos_normalize_min_rate(esw, NULL, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int esw_qos_create(struct mlx5_eswitch *esw, struct netlink_ext_ack *extack)</div><div class='hunk'>@@ -625,51 +773,22 @@ static int esw_qos_create(struct mlx5_eswitch *esw, struct netlink_ext_ack *exta</div><div class='ctx'> 	if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	err = esw_qos_create_node_sched_elem(esw-&gt;dev, 0, &amp;esw-&gt;qos.root_tsar_ix);</div><div class='add'>+	err = esw_qos_create_node_sched_elem(esw-&gt;dev, 0, 0, 0,</div><div class='add'>+					     &amp;esw-&gt;qos.root_tsar_ix);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		esw_warn(dev, "E-Switch create root TSAR failed (%d)\n", err);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (MLX5_CAP_QOS(dev, log_esw_max_sched_depth)) {</div><div class='del'>-		esw-&gt;qos.node0 = __esw_qos_create_vports_sched_node(esw, NULL, extack);</div><div class='del'>-	} else {</div><div class='del'>-		/* The eswitch doesn't support scheduling nodes.</div><div class='del'>-		 * Create a software-only node0 using the root TSAR to attach vport QoS to.</div><div class='del'>-		 */</div><div class='del'>-		if (!__esw_qos_alloc_node(esw,</div><div class='del'>-					  esw-&gt;qos.root_tsar_ix,</div><div class='del'>-					  SCHED_NODE_TYPE_VPORTS_TSAR,</div><div class='del'>-					  NULL))</div><div class='del'>-			esw-&gt;qos.node0 = ERR_PTR(-ENOMEM);</div><div class='del'>-	}</div><div class='del'>-	if (IS_ERR(esw-&gt;qos.node0)) {</div><div class='del'>-		err = PTR_ERR(esw-&gt;qos.node0);</div><div class='del'>-		esw_warn(dev, "E-Switch create rate node 0 failed (%d)\n", err);</div><div class='del'>-		goto err_node0;</div><div class='del'>-	}</div><div class='ctx'> 	refcount_set(&amp;esw-&gt;qos.refcnt, 1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_node0:</div><div class='del'>-	if (mlx5_destroy_scheduling_element_cmd(esw-&gt;dev, SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='del'>-						esw-&gt;qos.root_tsar_ix))</div><div class='del'>-		esw_warn(esw-&gt;dev, "E-Switch destroy root TSAR failed.\n");</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void esw_qos_destroy(struct mlx5_eswitch *esw)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (esw-&gt;qos.node0-&gt;ix != esw-&gt;qos.root_tsar_ix)</div><div class='del'>-		__esw_qos_destroy_node(esw-&gt;qos.node0, NULL);</div><div class='del'>-	else</div><div class='del'>-		__esw_qos_free_node(esw-&gt;qos.node0);</div><div class='del'>-	esw-&gt;qos.node0 = NULL;</div><div class='del'>-</div><div class='ctx'> 	err = mlx5_destroy_scheduling_element_cmd(esw-&gt;dev,</div><div class='ctx'> 						  SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='ctx'> 						  esw-&gt;qos.root_tsar_ix);</div><div class='hunk'>@@ -699,97 +818,383 @@ static void esw_qos_put(struct mlx5_eswitch *esw)</div><div class='ctx'> 		esw_qos_destroy(esw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int esw_qos_vport_enable(struct mlx5_vport *vport,</div><div class='del'>-				u32 max_rate, u32 bw_share, struct netlink_ext_ack *extack)</div><div class='add'>+static void</div><div class='add'>+esw_qos_tc_arbiter_scheduling_teardown(struct mlx5_esw_sched_node *node,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_eswitch *esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='del'>-	u32 sched_elem_ix;</div><div class='del'>-	int err;</div><div class='add'>+	/* Clean up all Vports TC nodes within the TC arbiter node. */</div><div class='add'>+	esw_qos_destroy_vports_tc_nodes(node, extack);</div><div class='add'>+	/* Destroy the scheduling element for the TC arbiter node itself. */</div><div class='add'>+	esw_qos_node_destroy_sched_element(node, extack);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	esw_assert_qos_lock_held(esw);</div><div class='del'>-	if (vport-&gt;qos.sched_node)</div><div class='del'>-		return 0;</div><div class='add'>+static int esw_qos_tc_arbiter_scheduling_setup(struct mlx5_esw_sched_node *node,</div><div class='add'>+					       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 curr_ix = node-&gt;ix;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	err = esw_qos_get(esw, extack);</div><div class='add'>+	err = esw_qos_create_tc_arbiter_sched_elem(node, extack);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='add'>+	/* Initialize the vports TC nodes within created TC arbiter TSAR. */</div><div class='add'>+	err = esw_qos_create_vports_tc_nodes(node, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_vports_tc_nodes;</div><div class='ctx'> </div><div class='del'>-	err = esw_qos_vport_create_sched_element(vport, esw-&gt;qos.node0, max_rate, bw_share,</div><div class='del'>-						 &amp;sched_elem_ix);</div><div class='add'>+	node-&gt;type = SCHED_NODE_TYPE_TC_ARBITER_TSAR;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_vports_tc_nodes:</div><div class='add'>+	/* If initialization fails, clean up the scheduling element</div><div class='add'>+	 * for the TC arbiter node.</div><div class='add'>+	 */</div><div class='add'>+	esw_qos_node_destroy_sched_element(node, NULL);</div><div class='add'>+	node-&gt;ix = curr_ix;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+esw_qos_create_vport_tc_sched_node(struct mlx5_vport *vport,</div><div class='add'>+				   u32 rate_limit_elem_ix,</div><div class='add'>+				   struct mlx5_esw_sched_node *vports_tc_node,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+	struct mlx5_esw_sched_node *vport_tc_node;</div><div class='add'>+	u8 tc = vports_tc_node-&gt;tc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	vport_tc_node = __esw_qos_alloc_node(vport_node-&gt;esw, 0,</div><div class='add'>+					     SCHED_NODE_TYPE_VPORT_TC,</div><div class='add'>+					     vports_tc_node);</div><div class='add'>+	if (!vport_tc_node)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	vport_tc_node-&gt;min_rate = vport_node-&gt;min_rate;</div><div class='add'>+	vport_tc_node-&gt;tc = tc;</div><div class='add'>+	vport_tc_node-&gt;vport = vport;</div><div class='add'>+	err = esw_qos_vport_tc_create_sched_element(vport_tc_node,</div><div class='add'>+						    rate_limit_elem_ix,</div><div class='add'>+						    extack);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='del'>-	vport-&gt;qos.sched_node = __esw_qos_alloc_node(esw, sched_elem_ix, SCHED_NODE_TYPE_VPORT,</div><div class='del'>-						     esw-&gt;qos.node0);</div><div class='del'>-	if (!vport-&gt;qos.sched_node) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_alloc;</div><div class='add'>+	vport-&gt;qos.sched_nodes[tc] = vport_tc_node;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_out:</div><div class='add'>+	__esw_qos_free_node(vport_tc_node);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+esw_qos_destroy_vport_tc_sched_elements(struct mlx5_vport *vport,</div><div class='add'>+					struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int i, num_tcs = esw_qos_num_tcs(vport-&gt;qos.sched_node-&gt;esw-&gt;dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_tcs; i++) {</div><div class='add'>+		if (vport-&gt;qos.sched_nodes[i]) {</div><div class='add'>+			__esw_qos_destroy_node(vport-&gt;qos.sched_nodes[i],</div><div class='add'>+					       extack);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vport-&gt;qos.sched_node-&gt;vport = vport;</div><div class='add'>+	kfree(vport-&gt;qos.sched_nodes);</div><div class='add'>+	vport-&gt;qos.sched_nodes = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+esw_qos_create_vport_tc_sched_elements(struct mlx5_vport *vport,</div><div class='add'>+				       enum sched_node_type type,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+	struct mlx5_esw_sched_node *tc_arbiter_node, *vports_tc_node;</div><div class='add'>+	int err, num_tcs = esw_qos_num_tcs(vport_node-&gt;esw-&gt;dev);</div><div class='add'>+	u32 rate_limit_elem_ix;</div><div class='add'>+</div><div class='add'>+	vport-&gt;qos.sched_nodes = kcalloc(num_tcs,</div><div class='add'>+					 sizeof(struct mlx5_esw_sched_node *),</div><div class='add'>+					 GFP_KERNEL);</div><div class='add'>+	if (!vport-&gt;qos.sched_nodes) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Allocating the vport TC scheduling elements failed.");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	trace_mlx5_esw_vport_qos_create(vport-&gt;dev, vport, bw_share, max_rate);</div><div class='add'>+	rate_limit_elem_ix = type == SCHED_NODE_TYPE_RATE_LIMITER ?</div><div class='add'>+			     vport_node-&gt;ix : 0;</div><div class='add'>+	tc_arbiter_node = type == SCHED_NODE_TYPE_RATE_LIMITER ?</div><div class='add'>+			   vport_node-&gt;parent : vport_node;</div><div class='add'>+	list_for_each_entry(vports_tc_node, &amp;tc_arbiter_node-&gt;children, entry) {</div><div class='add'>+		err = esw_qos_create_vport_tc_sched_node(vport,</div><div class='add'>+							 rate_limit_elem_ix,</div><div class='add'>+							 vports_tc_node,</div><div class='add'>+							 extack);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_create_vport_tc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_alloc:</div><div class='del'>-	if (mlx5_destroy_scheduling_element_cmd(esw-&gt;dev,</div><div class='del'>-						SCHEDULING_HIERARCHY_E_SWITCH, sched_elem_ix))</div><div class='del'>-		esw_warn(esw-&gt;dev, "E-Switch destroy vport scheduling element failed.\n");</div><div class='add'>+err_create_vport_tc:</div><div class='add'>+	esw_qos_destroy_vport_tc_sched_elements(vport, NULL);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+esw_qos_vport_tc_enable(struct mlx5_vport *vport, enum sched_node_type type,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+	struct mlx5_esw_sched_node *parent = vport_node-&gt;parent;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {</div><div class='add'>+		int new_level, max_level;</div><div class='add'>+</div><div class='add'>+		/* Increase the parent's level by 2 to account for both the</div><div class='add'>+		 * TC arbiter and the vports TC scheduling element.</div><div class='add'>+		 */</div><div class='add'>+		new_level = (parent ? parent-&gt;level : 2) + 2;</div><div class='add'>+		max_level = 1 &lt;&lt; MLX5_CAP_QOS(vport_node-&gt;esw-&gt;dev,</div><div class='add'>+					      log_esw_max_sched_depth);</div><div class='add'>+		if (new_level &gt; max_level) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "TC arbitration on leafs is not supported beyond max depth %d",</div><div class='add'>+					       max_level);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	esw_assert_qos_lock_held(vport-&gt;dev-&gt;priv.eswitch);</div><div class='add'>+</div><div class='add'>+	if (type == SCHED_NODE_TYPE_RATE_LIMITER)</div><div class='add'>+		err = esw_qos_create_rate_limit_element(vport_node, extack);</div><div class='add'>+	else</div><div class='add'>+		err = esw_qos_tc_arbiter_scheduling_setup(vport_node, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Rate limiters impact multiple nodes not directly connected to them</div><div class='add'>+	 * and are not direct members of the QoS hierarchy.</div><div class='add'>+	 * Unlink it from the parent to reflect that.</div><div class='add'>+	 */</div><div class='add'>+	if (type == SCHED_NODE_TYPE_RATE_LIMITER) {</div><div class='add'>+		list_del_init(&amp;vport_node-&gt;entry);</div><div class='add'>+		vport_node-&gt;level = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err  = esw_qos_create_vport_tc_sched_elements(vport, type, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_sched_nodes;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_sched_nodes:</div><div class='add'>+	if (type == SCHED_NODE_TYPE_RATE_LIMITER) {</div><div class='add'>+		esw_qos_node_destroy_sched_element(vport_node, NULL);</div><div class='add'>+		esw_qos_node_attach_to_parent(vport_node);</div><div class='add'>+	} else {</div><div class='add'>+		esw_qos_tc_arbiter_scheduling_teardown(vport_node, NULL);</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void esw_qos_vport_tc_disable(struct mlx5_vport *vport,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+	enum sched_node_type curr_type = vport_node-&gt;type;</div><div class='add'>+</div><div class='add'>+	esw_qos_destroy_vport_tc_sched_elements(vport, extack);</div><div class='add'>+</div><div class='add'>+	if (curr_type == SCHED_NODE_TYPE_RATE_LIMITER)</div><div class='add'>+		esw_qos_node_destroy_sched_element(vport_node, extack);</div><div class='add'>+	else</div><div class='add'>+		esw_qos_tc_arbiter_scheduling_teardown(vport_node, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_set_vport_tcs_min_rate(struct mlx5_vport *vport,</div><div class='add'>+					  u32 min_rate,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+	int err, i, num_tcs = esw_qos_num_tcs(vport_node-&gt;esw-&gt;dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_tcs; i++) {</div><div class='add'>+		err = esw_qos_set_node_min_rate(vport-&gt;qos.sched_nodes[i],</div><div class='add'>+						min_rate, extack);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_out;</div><div class='add'>+	}</div><div class='add'>+	vport_node-&gt;min_rate = min_rate;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> err_out:</div><div class='del'>-	esw_qos_put(esw);</div><div class='add'>+	for (--i; i &gt;= 0; i--) {</div><div class='add'>+		esw_qos_set_node_min_rate(vport-&gt;qos.sched_nodes[i],</div><div class='add'>+					  vport_node-&gt;min_rate, extack);</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void esw_qos_vport_disable(struct mlx5_vport *vport, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+	enum sched_node_type curr_type = vport_node-&gt;type;</div><div class='add'>+</div><div class='add'>+	if (curr_type == SCHED_NODE_TYPE_VPORT)</div><div class='add'>+		esw_qos_node_destroy_sched_element(vport_node, extack);</div><div class='add'>+	else</div><div class='add'>+		esw_qos_vport_tc_disable(vport, extack);</div><div class='add'>+</div><div class='add'>+	vport_node-&gt;bw_share = 0;</div><div class='add'>+	memset(vport_node-&gt;tc_bw, 0, sizeof(vport_node-&gt;tc_bw));</div><div class='add'>+	list_del_init(&amp;vport_node-&gt;entry);</div><div class='add'>+	esw_qos_normalize_min_rate(vport_node-&gt;esw, vport_node-&gt;parent, extack);</div><div class='add'>+</div><div class='add'>+	trace_mlx5_esw_vport_qos_destroy(vport_node-&gt;esw-&gt;dev, vport);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_vport_enable(struct mlx5_vport *vport,</div><div class='add'>+				enum sched_node_type type,</div><div class='add'>+				struct mlx5_esw_sched_node *parent,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	esw_assert_qos_lock_held(vport-&gt;dev-&gt;priv.eswitch);</div><div class='add'>+</div><div class='add'>+	esw_qos_node_set_parent(vport_node, parent);</div><div class='add'>+	if (type == SCHED_NODE_TYPE_VPORT)</div><div class='add'>+		err = esw_qos_vport_create_sched_element(vport_node, extack);</div><div class='add'>+	else</div><div class='add'>+		err = esw_qos_vport_tc_enable(vport, type, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	vport_node-&gt;type = type;</div><div class='add'>+	esw_qos_normalize_min_rate(vport_node-&gt;esw, parent, extack);</div><div class='add'>+	trace_mlx5_esw_vport_qos_create(vport-&gt;dev, vport, vport_node-&gt;max_rate,</div><div class='add'>+					vport_node-&gt;bw_share);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_esw_qos_vport_enable(struct mlx5_vport *vport, enum sched_node_type type,</div><div class='add'>+				     struct mlx5_esw_sched_node *parent, u32 max_rate,</div><div class='add'>+				     u32 min_rate, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_eswitch *esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='add'>+	struct mlx5_esw_sched_node *sched_node;</div><div class='add'>+	struct mlx5_eswitch *parent_esw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	esw_assert_qos_lock_held(esw);</div><div class='add'>+	err = esw_qos_get(esw, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	parent_esw = parent ? parent-&gt;esw : esw;</div><div class='add'>+	sched_node = __esw_qos_alloc_node(parent_esw, 0, type, parent);</div><div class='add'>+	if (!sched_node) {</div><div class='add'>+		esw_qos_put(esw);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	if (!parent)</div><div class='add'>+		list_add_tail(&amp;sched_node-&gt;entry, &amp;esw-&gt;qos.domain-&gt;nodes);</div><div class='add'>+</div><div class='add'>+	sched_node-&gt;max_rate = max_rate;</div><div class='add'>+	sched_node-&gt;min_rate = min_rate;</div><div class='add'>+	sched_node-&gt;vport = vport;</div><div class='add'>+	vport-&gt;qos.sched_node = sched_node;</div><div class='add'>+	err = esw_qos_vport_enable(vport, type, parent, extack);</div><div class='add'>+	if (err) {</div><div class='add'>+		__esw_qos_free_node(sched_node);</div><div class='add'>+		esw_qos_put(esw);</div><div class='add'>+		vport-&gt;qos.sched_node = NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mlx5_esw_qos_vport_disable_locked(struct mlx5_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_eswitch *esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='add'>+</div><div class='add'>+	esw_assert_qos_lock_held(esw);</div><div class='add'>+	if (!vport-&gt;qos.sched_node)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	esw_qos_vport_disable(vport, NULL);</div><div class='add'>+	mlx5_esw_qos_vport_qos_free(vport);</div><div class='add'>+	esw_qos_put(esw);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5_esw_qos_vport_disable(struct mlx5_vport *vport)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_eswitch *esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='del'>-	struct mlx5_esw_sched_node *vport_node;</div><div class='del'>-	struct mlx5_core_dev *dev;</div><div class='del'>-	int err;</div><div class='add'>+	struct mlx5_esw_sched_node *parent;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;esw-&gt;state_lock);</div><div class='ctx'> 	esw_qos_lock(esw);</div><div class='del'>-	vport_node = vport-&gt;qos.sched_node;</div><div class='del'>-	if (!vport_node)</div><div class='add'>+	if (!vport-&gt;qos.sched_node)</div><div class='ctx'> 		goto unlock;</div><div class='del'>-	WARN(vport_node-&gt;parent != esw-&gt;qos.node0,</div><div class='del'>-	     "Disabling QoS on port before detaching it from node");</div><div class='ctx'> </div><div class='del'>-	dev = vport_node-&gt;esw-&gt;dev;</div><div class='del'>-	trace_mlx5_esw_vport_qos_destroy(dev, vport);</div><div class='add'>+	parent = vport-&gt;qos.sched_node-&gt;parent;</div><div class='add'>+	WARN(parent, "Disabling QoS on port before detaching it from node");</div><div class='ctx'> </div><div class='del'>-	err = mlx5_destroy_scheduling_element_cmd(dev,</div><div class='del'>-						  SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='del'>-						  vport_node-&gt;ix);</div><div class='del'>-	if (err)</div><div class='del'>-		esw_warn(dev,</div><div class='del'>-			 "E-Switch destroy vport scheduling element failed (vport=%d,err=%d)\n",</div><div class='del'>-			 vport-&gt;vport, err);</div><div class='del'>-</div><div class='del'>-	__esw_qos_free_node(vport_node);</div><div class='del'>-	memset(&amp;vport-&gt;qos, 0, sizeof(vport-&gt;qos));</div><div class='del'>-</div><div class='del'>-	esw_qos_put(esw);</div><div class='add'>+	mlx5_esw_qos_vport_disable_locked(vport);</div><div class='ctx'> unlock:</div><div class='ctx'> 	esw_qos_unlock(esw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5_esw_qos_set_vport_max_rate(struct mlx5_vport *vport, u32 max_rate,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+</div><div class='add'>+	esw_assert_qos_lock_held(vport-&gt;dev-&gt;priv.eswitch);</div><div class='add'>+</div><div class='add'>+	if (!vport_node)</div><div class='add'>+		return mlx5_esw_qos_vport_enable(vport, SCHED_NODE_TYPE_VPORT, NULL, max_rate, 0,</div><div class='add'>+						 extack);</div><div class='add'>+	else</div><div class='add'>+		return esw_qos_sched_elem_config(vport_node, max_rate, vport_node-&gt;bw_share,</div><div class='add'>+						 extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_esw_qos_set_vport_min_rate(struct mlx5_vport *vport, u32 min_rate,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+</div><div class='add'>+	esw_assert_qos_lock_held(vport-&gt;dev-&gt;priv.eswitch);</div><div class='add'>+</div><div class='add'>+	if (!vport_node)</div><div class='add'>+		return mlx5_esw_qos_vport_enable(vport, SCHED_NODE_TYPE_VPORT, NULL, 0, min_rate,</div><div class='add'>+						 extack);</div><div class='add'>+	else if (vport_node-&gt;type == SCHED_NODE_TYPE_RATE_LIMITER)</div><div class='add'>+		return esw_qos_set_vport_tcs_min_rate(vport, min_rate, extack);</div><div class='add'>+	else</div><div class='add'>+		return esw_qos_set_node_min_rate(vport_node, min_rate, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5_esw_qos_set_vport_rate(struct mlx5_vport *vport, u32 max_rate, u32 min_rate)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_eswitch *esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	esw_qos_lock(esw);</div><div class='del'>-	err = esw_qos_vport_enable(vport, 0, 0, NULL);</div><div class='del'>-	if (err)</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='del'>-	err = esw_qos_set_vport_min_rate(vport, min_rate, NULL);</div><div class='add'>+	err = mlx5_esw_qos_set_vport_min_rate(vport, min_rate, NULL);</div><div class='ctx'> 	if (!err)</div><div class='del'>-		err = esw_qos_set_vport_max_rate(vport, max_rate, NULL);</div><div class='del'>-unlock:</div><div class='add'>+		err = mlx5_esw_qos_set_vport_max_rate(vport, max_rate, NULL);</div><div class='ctx'> 	esw_qos_unlock(esw);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -809,6 +1214,282 @@ bool mlx5_esw_qos_get_vport_rate(struct mlx5_vport *vport, u32 *max_rate, u32 *m</div><div class='ctx'> 	return enabled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int esw_qos_vport_tc_check_type(enum sched_node_type curr_type,</div><div class='add'>+				       enum sched_node_type new_type,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (curr_type == SCHED_NODE_TYPE_TC_ARBITER_TSAR &amp;&amp;</div><div class='add'>+	    new_type == SCHED_NODE_TYPE_RATE_LIMITER) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot switch from vport-level TC arbitration to node-level TC arbitration");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (curr_type == SCHED_NODE_TYPE_RATE_LIMITER &amp;&amp;</div><div class='add'>+	    new_type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot switch from node-level TC arbitration to vport-level TC arbitration");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_vport_update(struct mlx5_vport *vport,</div><div class='add'>+				enum sched_node_type type,</div><div class='add'>+				struct mlx5_esw_sched_node *parent,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+	struct mlx5_esw_sched_node *curr_parent = vport_node-&gt;parent;</div><div class='add'>+	enum sched_node_type curr_type = vport_node-&gt;type;</div><div class='add'>+	u32 curr_tc_bw[DEVLINK_RATE_TCS_MAX] = {0};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	esw_assert_qos_lock_held(vport-&gt;dev-&gt;priv.eswitch);</div><div class='add'>+	if (curr_type == type &amp;&amp; curr_parent == parent)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = esw_qos_vport_tc_check_type(curr_type, type, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (curr_type == SCHED_NODE_TYPE_TC_ARBITER_TSAR &amp;&amp; curr_type == type)</div><div class='add'>+		esw_qos_tc_arbiter_get_bw_shares(vport_node, curr_tc_bw);</div><div class='add'>+</div><div class='add'>+	esw_qos_vport_disable(vport, extack);</div><div class='add'>+</div><div class='add'>+	err = esw_qos_vport_enable(vport, type, parent, extack);</div><div class='add'>+	if (err) {</div><div class='add'>+		esw_qos_vport_enable(vport, curr_type, curr_parent, NULL);</div><div class='add'>+		extack = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (curr_type == SCHED_NODE_TYPE_TC_ARBITER_TSAR &amp;&amp; curr_type == type) {</div><div class='add'>+		esw_qos_set_tc_arbiter_bw_shares(vport_node, curr_tc_bw,</div><div class='add'>+						 extack);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_vport_update_parent(struct mlx5_vport *vport, struct mlx5_esw_sched_node *parent,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_eswitch *esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='add'>+	struct mlx5_esw_sched_node *curr_parent;</div><div class='add'>+	enum sched_node_type type;</div><div class='add'>+</div><div class='add'>+	esw_assert_qos_lock_held(esw);</div><div class='add'>+	curr_parent = vport-&gt;qos.sched_node-&gt;parent;</div><div class='add'>+	if (curr_parent == parent)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Set vport QoS type based on parent node type if different from</div><div class='add'>+	 * default QoS; otherwise, use the vport's current QoS type.</div><div class='add'>+	 */</div><div class='add'>+	if (parent &amp;&amp; parent-&gt;type == SCHED_NODE_TYPE_TC_ARBITER_TSAR)</div><div class='add'>+		type = SCHED_NODE_TYPE_RATE_LIMITER;</div><div class='add'>+	else if (curr_parent &amp;&amp;</div><div class='add'>+		 curr_parent-&gt;type == SCHED_NODE_TYPE_TC_ARBITER_TSAR)</div><div class='add'>+		type = SCHED_NODE_TYPE_VPORT;</div><div class='add'>+	else</div><div class='add'>+		type = vport-&gt;qos.sched_node-&gt;type;</div><div class='add'>+</div><div class='add'>+	return esw_qos_vport_update(vport, type, parent, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+esw_qos_switch_vport_tcs_to_vport(struct mlx5_esw_sched_node *tc_arbiter_node,</div><div class='add'>+				  struct mlx5_esw_sched_node *node,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vports_tc_node, *vport_tc_node, *tmp;</div><div class='add'>+</div><div class='add'>+	vports_tc_node = list_first_entry(&amp;tc_arbiter_node-&gt;children,</div><div class='add'>+					  struct mlx5_esw_sched_node,</div><div class='add'>+					  entry);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(vport_tc_node, tmp, &amp;vports_tc_node-&gt;children,</div><div class='add'>+				 entry)</div><div class='add'>+		esw_qos_vport_update_parent(vport_tc_node-&gt;vport, node, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_switch_tc_arbiter_node_to_vports(</div><div class='add'>+	struct mlx5_esw_sched_node *tc_arbiter_node,</div><div class='add'>+	struct mlx5_esw_sched_node *node,</div><div class='add'>+	struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 parent_tsar_ix = node-&gt;parent ?</div><div class='add'>+			     node-&gt;parent-&gt;ix : node-&gt;esw-&gt;qos.root_tsar_ix;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = esw_qos_create_node_sched_elem(node-&gt;esw-&gt;dev, parent_tsar_ix,</div><div class='add'>+					     node-&gt;max_rate, node-&gt;bw_share,</div><div class='add'>+					     &amp;node-&gt;ix);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to create scheduling element for vports node when disabling vports TC QoS");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	node-&gt;type = SCHED_NODE_TYPE_VPORTS_TSAR;</div><div class='add'>+</div><div class='add'>+	/* Disable TC QoS for vports in the arbiter node. */</div><div class='add'>+	esw_qos_switch_vport_tcs_to_vport(tc_arbiter_node, node, extack);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_switch_vports_node_to_tc_arbiter(</div><div class='add'>+	struct mlx5_esw_sched_node *node,</div><div class='add'>+	struct mlx5_esw_sched_node *tc_arbiter_node,</div><div class='add'>+	struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node, *tmp;</div><div class='add'>+	struct mlx5_vport *vport;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Enable TC QoS for each vport in the node. */</div><div class='add'>+	list_for_each_entry_safe(vport_node, tmp, &amp;node-&gt;children, entry) {</div><div class='add'>+		vport = vport_node-&gt;vport;</div><div class='add'>+		err = esw_qos_vport_update_parent(vport, tc_arbiter_node,</div><div class='add'>+						  extack);</div><div class='add'>+		if  (err)</div><div class='add'>+			goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Destroy the current vports node TSAR. */</div><div class='add'>+	err = mlx5_destroy_scheduling_element_cmd(node-&gt;esw-&gt;dev,</div><div class='add'>+						  SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='add'>+						  node-&gt;ix);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_out:</div><div class='add'>+	/* Restore vports back into the node if an error occurs. */</div><div class='add'>+	esw_qos_switch_vport_tcs_to_vport(tc_arbiter_node, node, NULL);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_esw_sched_node *</div><div class='add'>+esw_qos_move_node(struct mlx5_esw_sched_node *curr_node)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *new_node;</div><div class='add'>+</div><div class='add'>+	new_node = __esw_qos_alloc_node(curr_node-&gt;esw, curr_node-&gt;ix,</div><div class='add'>+					curr_node-&gt;type, NULL);</div><div class='add'>+	if (!new_node)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	esw_qos_nodes_set_parent(&amp;curr_node-&gt;children, new_node);</div><div class='add'>+	return new_node;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_node_disable_tc_arbitration(struct mlx5_esw_sched_node *node,</div><div class='add'>+					       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *curr_node;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (node-&gt;type != SCHED_NODE_TYPE_TC_ARBITER_TSAR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Allocate a new rate node to hold the current state, which will allow</div><div class='add'>+	 * for restoring the vports back to this node after disabling TC</div><div class='add'>+	 * arbitration.</div><div class='add'>+	 */</div><div class='add'>+	curr_node = esw_qos_move_node(node);</div><div class='add'>+	if (IS_ERR(curr_node)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed setting up vports node");</div><div class='add'>+		return PTR_ERR(curr_node);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable TC QoS for all vports, and assign them back to the node. */</div><div class='add'>+	err = esw_qos_switch_tc_arbiter_node_to_vports(curr_node, node, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	/* Clean up the TC arbiter node after disabling TC QoS for vports. */</div><div class='add'>+	esw_qos_tc_arbiter_scheduling_teardown(curr_node, extack);</div><div class='add'>+	goto out;</div><div class='add'>+err_out:</div><div class='add'>+	esw_qos_nodes_set_parent(&amp;curr_node-&gt;children, node);</div><div class='add'>+out:</div><div class='add'>+	__esw_qos_free_node(curr_node);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_node_enable_tc_arbitration(struct mlx5_esw_sched_node *node,</div><div class='add'>+					      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *curr_node, *child;</div><div class='add'>+	int err, new_level, max_level;</div><div class='add'>+</div><div class='add'>+	if (node-&gt;type == SCHED_NODE_TYPE_TC_ARBITER_TSAR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Increase the hierarchy level by one to account for the additional</div><div class='add'>+	 * vports TC scheduling node, and verify that the new level does not</div><div class='add'>+	 * exceed the maximum allowed depth.</div><div class='add'>+	 */</div><div class='add'>+	new_level = node-&gt;level + 1;</div><div class='add'>+	max_level = 1 &lt;&lt; MLX5_CAP_QOS(node-&gt;esw-&gt;dev, log_esw_max_sched_depth);</div><div class='add'>+	if (new_level &gt; max_level) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "TC arbitration on nodes is not supported beyond max depth %d",</div><div class='add'>+				       max_level);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Ensure the node does not contain non-leaf children before assigning</div><div class='add'>+	 * TC bandwidth.</div><div class='add'>+	 */</div><div class='add'>+	if (!list_empty(&amp;node-&gt;children)) {</div><div class='add'>+		list_for_each_entry(child, &amp;node-&gt;children, entry) {</div><div class='add'>+			if (!child-&gt;vport) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "Cannot configure TC bandwidth on a node with non-leaf children");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allocate a new node that will store the information of the current</div><div class='add'>+	 * node. This will be used later to restore the node if necessary.</div><div class='add'>+	 */</div><div class='add'>+	curr_node = esw_qos_move_node(node);</div><div class='add'>+	if (IS_ERR(curr_node)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed setting up node TC QoS");</div><div class='add'>+		return PTR_ERR(curr_node);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize the TC arbiter node for QoS management.</div><div class='add'>+	 * This step prepares the node for handling Traffic Class arbitration.</div><div class='add'>+	 */</div><div class='add'>+	err = esw_qos_tc_arbiter_scheduling_setup(node, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_setup;</div><div class='add'>+</div><div class='add'>+	/* Enable TC QoS for each vport within the current node. */</div><div class='add'>+	err = esw_qos_switch_vports_node_to_tc_arbiter(curr_node, node, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_switch_vports;</div><div class='add'>+	goto out;</div><div class='add'>+</div><div class='add'>+err_switch_vports:</div><div class='add'>+	esw_qos_tc_arbiter_scheduling_teardown(node, NULL);</div><div class='add'>+	node-&gt;ix = curr_node-&gt;ix;</div><div class='add'>+	node-&gt;type = curr_node-&gt;type;</div><div class='add'>+err_setup:</div><div class='add'>+	esw_qos_nodes_set_parent(&amp;curr_node-&gt;children, node);</div><div class='add'>+out:</div><div class='add'>+	__esw_qos_free_node(curr_node);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u32 mlx5_esw_qos_lag_link_speed_get_locked(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ethtool_link_ksettings lksettings;</div><div class='hunk'>@@ -829,6 +1510,7 @@ static u32 mlx5_esw_qos_lag_link_speed_get_locked(struct mlx5_core_dev *mdev)</div><div class='ctx'> 		speed = lksettings.base.speed;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='add'>+	mlx5_uplink_netdev_put(mdev, slave);</div><div class='ctx'> 	return speed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -875,10 +1557,8 @@ static int mlx5_esw_qos_link_speed_verify(struct mlx5_core_dev *mdev,</div><div class='ctx'> </div><div class='ctx'> int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32 rate_mbps)</div><div class='ctx'> {</div><div class='del'>-	u32 ctx[MLX5_ST_SZ_DW(scheduling_context)] = {};</div><div class='ctx'> 	struct mlx5_vport *vport;</div><div class='ctx'> 	u32 link_speed_max;</div><div class='del'>-	u32 bitmask;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	vport = mlx5_eswitch_get_vport(esw, vport_num);</div><div class='hunk'>@@ -897,20 +1577,7 @@ int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	esw_qos_lock(esw);</div><div class='del'>-	if (!vport-&gt;qos.sched_node) {</div><div class='del'>-		/* Eswitch QoS wasn't enabled yet. Enable it and vport QoS. */</div><div class='del'>-		err = esw_qos_vport_enable(vport, rate_mbps, 0, NULL);</div><div class='del'>-	} else {</div><div class='del'>-		struct mlx5_core_dev *dev = vport-&gt;qos.sched_node-&gt;parent-&gt;esw-&gt;dev;</div><div class='del'>-</div><div class='del'>-		MLX5_SET(scheduling_context, ctx, max_average_bw, rate_mbps);</div><div class='del'>-		bitmask = MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW;</div><div class='del'>-		err = mlx5_modify_scheduling_element_cmd(dev,</div><div class='del'>-							 SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='del'>-							 ctx,</div><div class='del'>-							 vport-&gt;qos.sched_node-&gt;ix,</div><div class='del'>-							 bitmask);</div><div class='del'>-	}</div><div class='add'>+	err = mlx5_esw_qos_set_vport_max_rate(vport, rate_mbps, NULL);</div><div class='ctx'> 	esw_qos_unlock(esw);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -949,8 +1616,62 @@ static int esw_qos_devlink_rate_to_mbps(struct mlx5_core_dev *mdev, const char *</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool esw_qos_validate_unsupported_tc_bw(struct mlx5_eswitch *esw,</div><div class='add'>+					       u32 *tc_bw)</div><div class='add'>+{</div><div class='add'>+	int i, num_tcs = esw_qos_num_tcs(esw-&gt;dev);</div><div class='add'>+</div><div class='add'>+	for (i = num_tcs; i &lt; DEVLINK_RATE_TCS_MAX; i++) {</div><div class='add'>+		if (tc_bw[i])</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool esw_qos_vport_validate_unsupported_tc_bw(struct mlx5_vport *vport,</div><div class='add'>+						     u32 *tc_bw)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *node = vport-&gt;qos.sched_node;</div><div class='add'>+	struct mlx5_eswitch *esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='add'>+</div><div class='add'>+	esw = (node &amp;&amp; node-&gt;parent) ? node-&gt;parent-&gt;esw : esw;</div><div class='add'>+</div><div class='add'>+	return esw_qos_validate_unsupported_tc_bw(esw, tc_bw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool esw_qos_tc_bw_disabled(u32 *tc_bw)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DEVLINK_RATE_TCS_MAX; i++) {</div><div class='add'>+		if (tc_bw[i])</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void esw_vport_qos_prune_empty(struct mlx5_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+</div><div class='add'>+	esw_assert_qos_lock_held(vport-&gt;dev-&gt;priv.eswitch);</div><div class='add'>+	if (!vport_node)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (vport_node-&gt;parent || vport_node-&gt;max_rate ||</div><div class='add'>+	    vport_node-&gt;min_rate || !esw_qos_tc_bw_disabled(vport_node-&gt;tc_bw))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5_esw_qos_vport_disable_locked(vport);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5_esw_qos_init(struct mlx5_eswitch *esw)</div><div class='ctx'> {</div><div class='add'>+	if (esw-&gt;qos.domain)</div><div class='add'>+		return 0;  /* Nothing to change. */</div><div class='add'>+</div><div class='ctx'> 	return esw_qos_domain_init(esw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -978,12 +1699,11 @@ int mlx5_esw_devlink_rate_leaf_tx_share_set(struct devlink_rate *rate_leaf, void</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	esw_qos_lock(esw);</div><div class='del'>-	err = esw_qos_vport_enable(vport, 0, 0, extack);</div><div class='add'>+	err = mlx5_esw_qos_set_vport_min_rate(vport, tx_share, extack);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='del'>-	err = esw_qos_set_vport_min_rate(vport, tx_share, extack);</div><div class='del'>-unlock:</div><div class='add'>+		goto out;</div><div class='add'>+	esw_vport_qos_prune_empty(vport);</div><div class='add'>+out:</div><div class='ctx'> 	esw_qos_unlock(esw);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1004,11 +1724,95 @@ int mlx5_esw_devlink_rate_leaf_tx_max_set(struct devlink_rate *rate_leaf, void *</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	esw_qos_lock(esw);</div><div class='del'>-	err = esw_qos_vport_enable(vport, 0, 0, extack);</div><div class='add'>+	err = mlx5_esw_qos_set_vport_max_rate(vport, tx_max, extack);</div><div class='ctx'> 	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+	esw_vport_qos_prune_empty(vport);</div><div class='add'>+out:</div><div class='add'>+	esw_qos_unlock(esw);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_esw_devlink_rate_leaf_tc_bw_set(struct devlink_rate *rate_leaf,</div><div class='add'>+					 void *priv,</div><div class='add'>+					 u32 *tc_bw,</div><div class='add'>+					 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *vport_node;</div><div class='add'>+	struct mlx5_vport *vport = priv;</div><div class='add'>+	struct mlx5_eswitch *esw;</div><div class='add'>+	bool disable;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='add'>+	if (!mlx5_esw_allowed(esw))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	disable = esw_qos_tc_bw_disabled(tc_bw);</div><div class='add'>+	esw_qos_lock(esw);</div><div class='add'>+</div><div class='add'>+	if (!esw_qos_vport_validate_unsupported_tc_bw(vport, tc_bw)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "E-Switch traffic classes number is not supported");</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+	if (disable &amp;&amp; !vport_node)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (disable) {</div><div class='add'>+		if (vport_node-&gt;type == SCHED_NODE_TYPE_TC_ARBITER_TSAR)</div><div class='add'>+			err = esw_qos_vport_update(vport, SCHED_NODE_TYPE_VPORT,</div><div class='add'>+						   vport_node-&gt;parent, extack);</div><div class='add'>+		esw_vport_qos_prune_empty(vport);</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!vport_node) {</div><div class='add'>+		err = mlx5_esw_qos_vport_enable(vport,</div><div class='add'>+						SCHED_NODE_TYPE_TC_ARBITER_TSAR,</div><div class='add'>+						NULL, 0, 0, extack);</div><div class='add'>+		vport_node = vport-&gt;qos.sched_node;</div><div class='add'>+	} else {</div><div class='add'>+		err = esw_qos_vport_update(vport,</div><div class='add'>+					   SCHED_NODE_TYPE_TC_ARBITER_TSAR,</div><div class='add'>+					   vport_node-&gt;parent, extack);</div><div class='add'>+	}</div><div class='add'>+	if (!err)</div><div class='add'>+		esw_qos_set_tc_arbiter_bw_shares(vport_node, tc_bw, extack);</div><div class='add'>+unlock:</div><div class='add'>+	esw_qos_unlock(esw);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_esw_devlink_rate_node_tc_bw_set(struct devlink_rate *rate_node,</div><div class='add'>+					 void *priv,</div><div class='add'>+					 u32 *tc_bw,</div><div class='add'>+					 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *node = priv;</div><div class='add'>+	struct mlx5_eswitch *esw = node-&gt;esw;</div><div class='add'>+	bool disable;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!esw_qos_validate_unsupported_tc_bw(esw, tc_bw)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "E-Switch traffic classes number is not supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	disable = esw_qos_tc_bw_disabled(tc_bw);</div><div class='add'>+	esw_qos_lock(esw);</div><div class='add'>+	if (disable) {</div><div class='add'>+		err = esw_qos_node_disable_tc_arbitration(node, extack);</div><div class='ctx'> 		goto unlock;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	err = esw_qos_set_vport_max_rate(vport, tx_max, extack);</div><div class='add'>+	err = esw_qos_node_enable_tc_arbitration(node, extack);</div><div class='add'>+	if (!err)</div><div class='add'>+		esw_qos_set_tc_arbiter_bw_shares(node, tc_bw, extack);</div><div class='ctx'> unlock:</div><div class='ctx'> 	esw_qos_unlock(esw);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1043,7 +1847,7 @@ int mlx5_esw_devlink_rate_node_tx_max_set(struct devlink_rate *rate_node, void *</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	esw_qos_lock(esw);</div><div class='del'>-	err = esw_qos_set_node_max_rate(node, tx_max, extack);</div><div class='add'>+	err = esw_qos_sched_elem_config(node, tx_max, node-&gt;bw_share, extack);</div><div class='ctx'> 	esw_qos_unlock(esw);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1084,50 +1888,220 @@ int mlx5_esw_devlink_rate_node_del(struct devlink_rate *rate_node, void *priv,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_esw_sched_node *node = priv;</div><div class='ctx'> 	struct mlx5_eswitch *esw = node-&gt;esw;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	esw_qos_lock(esw);</div><div class='del'>-	err = __esw_qos_destroy_node(node, extack);</div><div class='add'>+	__esw_qos_destroy_node(node, extack);</div><div class='ctx'> 	esw_qos_put(esw);</div><div class='ctx'> 	esw_qos_unlock(esw);</div><div class='del'>-	return err;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5_esw_qos_vport_update_node(struct mlx5_vport *vport,</div><div class='del'>-				   struct mlx5_esw_sched_node *node,</div><div class='del'>-				   struct netlink_ext_ack *extack)</div><div class='add'>+int mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport, struct mlx5_esw_sched_node *parent,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_eswitch *esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	if (node &amp;&amp; node-&gt;esw != esw) {</div><div class='add'>+	if (parent &amp;&amp; parent-&gt;esw != esw) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Cross E-Switch scheduling is not supported");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	esw_qos_lock(esw);</div><div class='del'>-	if (!vport-&gt;qos.sched_node &amp;&amp; !node)</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='del'>-	err = esw_qos_vport_enable(vport, 0, 0, extack);</div><div class='del'>-	if (!err)</div><div class='del'>-		err = esw_qos_vport_update_node(vport, node, extack);</div><div class='del'>-unlock:</div><div class='add'>+	if (!vport-&gt;qos.sched_node &amp;&amp; parent) {</div><div class='add'>+		enum sched_node_type type;</div><div class='add'>+</div><div class='add'>+		type = parent-&gt;type == SCHED_NODE_TYPE_TC_ARBITER_TSAR ?</div><div class='add'>+		       SCHED_NODE_TYPE_RATE_LIMITER : SCHED_NODE_TYPE_VPORT;</div><div class='add'>+		err = mlx5_esw_qos_vport_enable(vport, type, parent, 0, 0,</div><div class='add'>+						extack);</div><div class='add'>+	} else if (vport-&gt;qos.sched_node) {</div><div class='add'>+		err = esw_qos_vport_update_parent(vport, parent, extack);</div><div class='add'>+	}</div><div class='ctx'> 	esw_qos_unlock(esw);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5_esw_devlink_rate_parent_set(struct devlink_rate *devlink_rate,</div><div class='del'>-				     struct devlink_rate *parent,</div><div class='del'>-				     void *priv, void *parent_priv,</div><div class='del'>-				     struct netlink_ext_ack *extack)</div><div class='add'>+int mlx5_esw_devlink_rate_leaf_parent_set(struct devlink_rate *devlink_rate,</div><div class='add'>+					  struct devlink_rate *parent,</div><div class='add'>+					  void *priv, void *parent_priv,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_esw_sched_node *node;</div><div class='add'>+	struct mlx5_esw_sched_node *node = parent ? parent_priv : NULL;</div><div class='ctx'> 	struct mlx5_vport *vport = priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_esw_qos_vport_update_parent(vport, node, extack);</div><div class='add'>+	if (!err) {</div><div class='add'>+		struct mlx5_eswitch *esw = vport-&gt;dev-&gt;priv.eswitch;</div><div class='add'>+</div><div class='add'>+		esw_qos_lock(esw);</div><div class='add'>+		esw_vport_qos_prune_empty(vport);</div><div class='add'>+		esw_qos_unlock(esw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool esw_qos_is_node_empty(struct mlx5_esw_sched_node *node)</div><div class='add'>+{</div><div class='add'>+	if (list_empty(&amp;node-&gt;children))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (node-&gt;type != SCHED_NODE_TYPE_TC_ARBITER_TSAR)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	node = list_first_entry(&amp;node-&gt;children, struct mlx5_esw_sched_node,</div><div class='add'>+				entry);</div><div class='add'>+</div><div class='add'>+	return esw_qos_is_node_empty(node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_esw_qos_node_validate_set_parent(struct mlx5_esw_sched_node *node,</div><div class='add'>+				      struct mlx5_esw_sched_node *parent,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u8 new_level, max_level;</div><div class='add'>+</div><div class='add'>+	if (parent &amp;&amp; parent-&gt;esw != node-&gt;esw) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot assign node to another E-Switch");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!esw_qos_is_node_empty(node)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot reassign a node that contains rate objects");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (parent &amp;&amp; parent-&gt;type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot attach a node to a parent with TC bandwidth configured");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	new_level = parent ? parent-&gt;level + 1 : 2;</div><div class='add'>+	if (node-&gt;type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {</div><div class='add'>+		/* Increase by one to account for the vports TC scheduling</div><div class='add'>+		 * element.</div><div class='add'>+		 */</div><div class='add'>+		new_level += 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	max_level = 1 &lt;&lt; MLX5_CAP_QOS(node-&gt;esw-&gt;dev, log_esw_max_sched_depth);</div><div class='add'>+	if (new_level &gt; max_level) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "Node hierarchy depth %d exceeds the maximum supported level %d",</div><div class='add'>+				       new_level, max_level);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+esw_qos_tc_arbiter_node_update_parent(struct mlx5_esw_sched_node *node,</div><div class='add'>+				      struct mlx5_esw_sched_node *parent,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *curr_parent = node-&gt;parent;</div><div class='add'>+	u32 curr_tc_bw[DEVLINK_RATE_TCS_MAX] = {0};</div><div class='add'>+	struct mlx5_eswitch *esw = node-&gt;esw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	esw_qos_tc_arbiter_get_bw_shares(node, curr_tc_bw);</div><div class='add'>+	esw_qos_tc_arbiter_scheduling_teardown(node, extack);</div><div class='add'>+	esw_qos_node_set_parent(node, parent);</div><div class='add'>+	err = esw_qos_tc_arbiter_scheduling_setup(node, extack);</div><div class='add'>+	if (err) {</div><div class='add'>+		esw_qos_node_set_parent(node, curr_parent);</div><div class='add'>+		if (esw_qos_tc_arbiter_scheduling_setup(node, extack)) {</div><div class='add'>+			esw_warn(esw-&gt;dev, "Node restore QoS failed\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	esw_qos_set_tc_arbiter_bw_shares(node, curr_tc_bw, extack);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esw_qos_vports_node_update_parent(struct mlx5_esw_sched_node *node,</div><div class='add'>+					     struct mlx5_esw_sched_node *parent,</div><div class='add'>+					     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *curr_parent = node-&gt;parent;</div><div class='add'>+	struct mlx5_eswitch *esw = node-&gt;esw;</div><div class='add'>+	u32 parent_ix;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	parent_ix = parent ? parent-&gt;ix : node-&gt;esw-&gt;qos.root_tsar_ix;</div><div class='add'>+	mlx5_destroy_scheduling_element_cmd(esw-&gt;dev,</div><div class='add'>+					    SCHEDULING_HIERARCHY_E_SWITCH,</div><div class='add'>+					    node-&gt;ix);</div><div class='add'>+	err = esw_qos_create_node_sched_elem(esw-&gt;dev, parent_ix,</div><div class='add'>+					     node-&gt;max_rate, 0, &amp;node-&gt;ix);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to create a node under the new hierarchy.");</div><div class='add'>+		if (esw_qos_create_node_sched_elem(esw-&gt;dev, curr_parent-&gt;ix,</div><div class='add'>+						   node-&gt;max_rate,</div><div class='add'>+						   node-&gt;bw_share,</div><div class='add'>+						   &amp;node-&gt;ix))</div><div class='add'>+			esw_warn(esw-&gt;dev, "Node restore QoS failed\n");</div><div class='add'>+</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	esw_qos_node_set_parent(node, parent);</div><div class='add'>+	node-&gt;bw_share = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_esw_qos_node_update_parent(struct mlx5_esw_sched_node *node,</div><div class='add'>+					   struct mlx5_esw_sched_node *parent,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *curr_parent;</div><div class='add'>+	struct mlx5_eswitch *esw = node-&gt;esw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_esw_qos_node_validate_set_parent(node, parent, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	esw_qos_lock(esw);</div><div class='add'>+	curr_parent = node-&gt;parent;</div><div class='add'>+	if (node-&gt;type == SCHED_NODE_TYPE_TC_ARBITER_TSAR) {</div><div class='add'>+		err = esw_qos_tc_arbiter_node_update_parent(node, parent,</div><div class='add'>+							    extack);</div><div class='add'>+	} else {</div><div class='add'>+		err = esw_qos_vports_node_update_parent(node, parent, extack);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	esw_qos_normalize_min_rate(esw, curr_parent, extack);</div><div class='add'>+	esw_qos_normalize_min_rate(esw, parent, extack);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	esw_qos_unlock(esw);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_esw_devlink_rate_node_parent_set(struct devlink_rate *devlink_rate,</div><div class='add'>+					  struct devlink_rate *parent,</div><div class='add'>+					  void *priv, void *parent_priv,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_esw_sched_node *node = priv, *parent_node;</div><div class='ctx'> </div><div class='ctx'> 	if (!parent)</div><div class='del'>-		return mlx5_esw_qos_vport_update_node(vport, NULL, extack);</div><div class='add'>+		return mlx5_esw_qos_node_update_parent(node, NULL, extack);</div><div class='ctx'> </div><div class='del'>-	node = parent_priv;</div><div class='del'>-	return mlx5_esw_qos_vport_update_node(vport, node, extack);</div><div class='add'>+	parent_node = parent_priv;</div><div class='add'>+	return mlx5_esw_qos_node_update_parent(node, parent_node, extack);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h b/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h<br/>index 61a6fdd5c267..0a50982b0e27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h</a></div><div class='hunk'>@@ -13,6 +13,7 @@ int mlx5_esw_qos_set_vport_rate(struct mlx5_vport *evport, u32 max_rate, u32 min</div><div class='ctx'> bool mlx5_esw_qos_get_vport_rate(struct mlx5_vport *vport, u32 *max_rate, u32 *min_rate);</div><div class='ctx'> void mlx5_esw_qos_vport_disable(struct mlx5_vport *vport);</div><div class='ctx'> </div><div class='add'>+void mlx5_esw_qos_vport_qos_free(struct mlx5_vport *vport);</div><div class='ctx'> u32 mlx5_esw_qos_vport_get_sched_elem_ix(const struct mlx5_vport *vport);</div><div class='ctx'> struct mlx5_esw_sched_node *mlx5_esw_qos_vport_get_parent(const struct mlx5_vport *vport);</div><div class='ctx'> </div><div class='hunk'>@@ -20,6 +21,14 @@ int mlx5_esw_devlink_rate_leaf_tx_share_set(struct devlink_rate *rate_leaf, void</div><div class='ctx'> 					    u64 tx_share, struct netlink_ext_ack *extack);</div><div class='ctx'> int mlx5_esw_devlink_rate_leaf_tx_max_set(struct devlink_rate *rate_leaf, void *priv,</div><div class='ctx'> 					  u64 tx_max, struct netlink_ext_ack *extack);</div><div class='add'>+int mlx5_esw_devlink_rate_leaf_tc_bw_set(struct devlink_rate *rate_node,</div><div class='add'>+					 void *priv,</div><div class='add'>+					 u32 *tc_bw,</div><div class='add'>+					 struct netlink_ext_ack *extack);</div><div class='add'>+int mlx5_esw_devlink_rate_node_tc_bw_set(struct devlink_rate *rate_node,</div><div class='add'>+					 void *priv,</div><div class='add'>+					 u32 *tc_bw,</div><div class='add'>+					 struct netlink_ext_ack *extack);</div><div class='ctx'> int mlx5_esw_devlink_rate_node_tx_share_set(struct devlink_rate *rate_node, void *priv,</div><div class='ctx'> 					    u64 tx_share, struct netlink_ext_ack *extack);</div><div class='ctx'> int mlx5_esw_devlink_rate_node_tx_max_set(struct devlink_rate *rate_node, void *priv,</div><div class='hunk'>@@ -28,10 +37,14 @@ int mlx5_esw_devlink_rate_node_new(struct devlink_rate *rate_node, void **priv,</div><div class='ctx'> 				   struct netlink_ext_ack *extack);</div><div class='ctx'> int mlx5_esw_devlink_rate_node_del(struct devlink_rate *rate_node, void *priv,</div><div class='ctx'> 				   struct netlink_ext_ack *extack);</div><div class='del'>-int mlx5_esw_devlink_rate_parent_set(struct devlink_rate *devlink_rate,</div><div class='del'>-				     struct devlink_rate *parent,</div><div class='del'>-				     void *priv, void *parent_priv,</div><div class='del'>-				     struct netlink_ext_ack *extack);</div><div class='add'>+int mlx5_esw_devlink_rate_leaf_parent_set(struct devlink_rate *devlink_rate,</div><div class='add'>+					  struct devlink_rate *parent,</div><div class='add'>+					  void *priv, void *parent_priv,</div><div class='add'>+					  struct netlink_ext_ack *extack);</div><div class='add'>+int mlx5_esw_devlink_rate_node_parent_set(struct devlink_rate *devlink_rate,</div><div class='add'>+					  struct devlink_rate *parent,</div><div class='add'>+					  void *priv, void *parent_priv,</div><div class='add'>+					  struct netlink_ext_ack *extack);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c<br/>index 749c3957a128..407062096a82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c</a></div><div class='hunk'>@@ -45,8 +45,8 @@ esw_vport_tbl_create(struct mlx5_eswitch *esw, struct mlx5_flow_namespace *ns,</div><div class='ctx'> 	ft_attr.flags = vport_ns-&gt;flags;</div><div class='ctx'> 	fdb = mlx5_create_auto_grouped_flow_table(ns, &amp;ft_attr);</div><div class='ctx'> 	if (IS_ERR(fdb)) {</div><div class='del'>-		esw_warn(esw-&gt;dev, "Failed to create per vport FDB Table err %ld\n",</div><div class='del'>-			 PTR_ERR(fdb));</div><div class='add'>+		esw_warn(esw-&gt;dev, "Failed to create per vport FDB Table err %pe\n",</div><div class='add'>+			 fdb);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return fdb;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c<br/>index 09719e9b8611..4b7a1ce7f406 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/eswitch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/eswitch.c</a></div><div class='hunk'>@@ -257,8 +257,8 @@ __esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u16 vport, bool rx_rule,</div><div class='ctx'> 				    &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 	if (IS_ERR(flow_rule)) {</div><div class='ctx'> 		esw_warn(esw-&gt;dev,</div><div class='del'>-			 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -&gt; vport(%d), err(%ld)\n",</div><div class='del'>-			 dmac_v, dmac_c, vport, PTR_ERR(flow_rule));</div><div class='add'>+			 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -&gt; vport(%d), err(%pe)\n",</div><div class='add'>+			 dmac_v, dmac_c, vport, flow_rule);</div><div class='ctx'> 		flow_rule = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -820,6 +820,7 @@ static int mlx5_esw_vport_caps_get(struct mlx5_eswitch *esw, struct mlx5_vport *</div><div class='ctx'> </div><div class='ctx'> 	hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);</div><div class='ctx'> 	vport-&gt;info.roce_enabled = MLX5_GET(cmd_hca_cap, hca_caps, roce);</div><div class='add'>+	vport-&gt;vhca_id = MLX5_GET(cmd_hca_cap, hca_caps, vhca_id);</div><div class='ctx'> </div><div class='ctx'> 	if (!MLX5_CAP_GEN_MAX(esw-&gt;dev, hca_cap_2))</div><div class='ctx'> 		goto out_free;</div><div class='hunk'>@@ -839,6 +840,18 @@ out_free:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool mlx5_esw_vport_vhca_id(struct mlx5_eswitch *esw, u16 vportn, u16 *vhca_id)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_vport *vport;</div><div class='add'>+</div><div class='add'>+	vport = mlx5_eswitch_get_vport(esw, vportn);</div><div class='add'>+	if (IS_ERR(vport) || MLX5_VPORT_INVAL_VHCA_ID(vport))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	*vhca_id = vport-&gt;vhca_id;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int esw_vport_setup(struct mlx5_eswitch *esw, struct mlx5_vport *vport)</div><div class='ctx'> {</div><div class='ctx'> 	bool vst_mode_steering = esw_vst_mode_is_steering(esw);</div><div class='hunk'>@@ -862,13 +875,10 @@ static int esw_vport_setup(struct mlx5_eswitch *esw, struct mlx5_vport *vport)</div><div class='ctx'> 				      vport_num, 1,</div><div class='ctx'> 				      vport-&gt;info.link_state);</div><div class='ctx'> </div><div class='del'>-	/* Host PF has its own mac/guid. */</div><div class='del'>-	if (vport_num) {</div><div class='del'>-		mlx5_modify_nic_vport_mac_address(esw-&gt;dev, vport_num,</div><div class='del'>-						  vport-&gt;info.mac);</div><div class='del'>-		mlx5_modify_nic_vport_node_guid(esw-&gt;dev, vport_num,</div><div class='del'>-						vport-&gt;info.node_guid);</div><div class='del'>-	}</div><div class='add'>+	mlx5_query_nic_vport_mac_address(esw-&gt;dev, vport_num, true,</div><div class='add'>+					 vport-&gt;info.mac);</div><div class='add'>+	mlx5_query_nic_vport_node_guid(esw-&gt;dev, vport_num, true,</div><div class='add'>+				       &amp;vport-&gt;info.node_guid);</div><div class='ctx'> </div><div class='ctx'> 	flags = (vport-&gt;info.vlan || vport-&gt;info.qos) ?</div><div class='ctx'> 		SET_VLAN_STRIP | SET_VLAN_INSERT : 0;</div><div class='hunk'>@@ -929,17 +939,11 @@ int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, struct mlx5_vport *vport,</div><div class='ctx'> </div><div class='ctx'> 	if (!mlx5_esw_is_manager_vport(esw, vport_num) &amp;&amp;</div><div class='ctx'> 	    MLX5_CAP_GEN(esw-&gt;dev, vhca_resource_manager)) {</div><div class='del'>-		ret = mlx5_esw_vport_vhca_id_set(esw, vport_num);</div><div class='add'>+		ret = mlx5_esw_vport_vhca_id_map(esw, vport);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto err_vhca_mapping;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* External controller host PF has factory programmed MAC.</div><div class='del'>-	 * Read it from the device.</div><div class='del'>-	 */</div><div class='del'>-	if (mlx5_core_is_ecpf(esw-&gt;dev) &amp;&amp; vport_num == MLX5_VPORT_PF)</div><div class='del'>-		mlx5_query_nic_vport_mac_address(esw-&gt;dev, vport_num, true, vport-&gt;info.mac);</div><div class='del'>-</div><div class='ctx'> 	esw_vport_change_handle_locked(vport);</div><div class='ctx'> </div><div class='ctx'> 	esw-&gt;enabled_vports++;</div><div class='hunk'>@@ -973,7 +977,7 @@ void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, struct mlx5_vport *vport)</div><div class='ctx'> </div><div class='ctx'> 	if (!mlx5_esw_is_manager_vport(esw, vport_num) &amp;&amp;</div><div class='ctx'> 	    MLX5_CAP_GEN(esw-&gt;dev, vhca_resource_manager))</div><div class='del'>-		mlx5_esw_vport_vhca_id_clear(esw, vport_num);</div><div class='add'>+		mlx5_esw_vport_vhca_id_unmap(esw, vport);</div><div class='ctx'> </div><div class='ctx'> 	if (vport-&gt;vport != MLX5_VPORT_PF &amp;&amp;</div><div class='ctx'> 	    (vport-&gt;info.ipsec_crypto_enabled || vport-&gt;info.ipsec_packet_enabled))</div><div class='hunk'>@@ -1038,6 +1042,25 @@ const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)</div><div class='ctx'> 	return ERR_PTR(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5_esw_host_functions_enabled_query(struct mlx5_eswitch *esw)</div><div class='add'>+{</div><div class='add'>+	const u32 *query_host_out;</div><div class='add'>+</div><div class='add'>+	if (!mlx5_core_is_ecpf_esw_manager(esw-&gt;dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	query_host_out = mlx5_esw_query_functions(esw-&gt;dev);</div><div class='add'>+	if (IS_ERR(query_host_out))</div><div class='add'>+		return PTR_ERR(query_host_out);</div><div class='add'>+</div><div class='add'>+	esw-&gt;esw_funcs.host_funcs_disabled =</div><div class='add'>+		MLX5_GET(query_esw_functions_out, query_host_out,</div><div class='add'>+			 host_params_context.host_pf_not_exist);</div><div class='add'>+</div><div class='add'>+	kvfree(query_host_out);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mlx5_eswitch_event_handler_register(struct mlx5_eswitch *esw)</div><div class='ctx'> {</div><div class='ctx'> 	if (esw-&gt;mode == MLX5_ESWITCH_OFFLOADS &amp;&amp; mlx5_eswitch_is_funcs_handler(esw-&gt;dev)) {</div><div class='hunk'>@@ -1061,8 +1084,7 @@ static void mlx5_eswitch_clear_vf_vports_info(struct mlx5_eswitch *esw)</div><div class='ctx'> 	unsigned long i;</div><div class='ctx'> </div><div class='ctx'> 	mlx5_esw_for_each_vf_vport(esw, i, vport, esw-&gt;esw_funcs.num_vfs) {</div><div class='del'>-		kfree(vport-&gt;qos.sched_node);</div><div class='del'>-		memset(&amp;vport-&gt;qos, 0, sizeof(vport-&gt;qos));</div><div class='add'>+		mlx5_esw_qos_vport_qos_free(vport);</div><div class='ctx'> 		memset(&amp;vport-&gt;info, 0, sizeof(vport-&gt;info));</div><div class='ctx'> 		vport-&gt;info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1074,8 +1096,7 @@ static void mlx5_eswitch_clear_ec_vf_vports_info(struct mlx5_eswitch *esw)</div><div class='ctx'> 	unsigned long i;</div><div class='ctx'> </div><div class='ctx'> 	mlx5_esw_for_each_ec_vf_vport(esw, i, vport, esw-&gt;esw_funcs.num_ec_vfs) {</div><div class='del'>-		kfree(vport-&gt;qos.sched_node);</div><div class='del'>-		memset(&amp;vport-&gt;qos, 0, sizeof(vport-&gt;qos));</div><div class='add'>+		mlx5_esw_qos_vport_qos_free(vport);</div><div class='ctx'> 		memset(&amp;vport-&gt;info, 0, sizeof(vport-&gt;info));</div><div class='ctx'> 		vport-&gt;info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1187,7 +1208,8 @@ void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs)</div><div class='ctx'> 	unsigned long i;</div><div class='ctx'> </div><div class='ctx'> 	mlx5_esw_for_each_vf_vport(esw, i, vport, num_vfs) {</div><div class='del'>-		if (!vport-&gt;enabled)</div><div class='add'>+		/* Adjacent VFs are unloaded separately */</div><div class='add'>+		if (!vport-&gt;enabled || vport-&gt;adjacent)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		mlx5_eswitch_unload_pf_vf_vport(esw, vport-&gt;vport);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1206,6 +1228,42 @@ static void mlx5_eswitch_unload_ec_vf_vports(struct mlx5_eswitch *esw,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mlx5_eswitch_unload_adj_vf_vports(struct mlx5_eswitch *esw)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_vport *vport;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	mlx5_esw_for_each_vf_vport(esw, i, vport, U16_MAX) {</div><div class='add'>+		if (!vport-&gt;enabled || !vport-&gt;adjacent)</div><div class='add'>+			continue;</div><div class='add'>+		mlx5_eswitch_unload_pf_vf_vport(esw, vport-&gt;vport);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_eswitch_load_adj_vf_vports(struct mlx5_eswitch *esw,</div><div class='add'>+				enum mlx5_eswitch_vport_event enabled_events)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_vport *vport;</div><div class='add'>+	unsigned long i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mlx5_esw_for_each_vf_vport(esw, i, vport, U16_MAX) {</div><div class='add'>+		if (!vport-&gt;adjacent)</div><div class='add'>+			continue;</div><div class='add'>+		err = mlx5_eswitch_load_pf_vf_vport(esw, vport-&gt;vport,</div><div class='add'>+						    enabled_events);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unload_adj_vf_vport;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unload_adj_vf_vport:</div><div class='add'>+	mlx5_eswitch_unload_adj_vf_vports(esw);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,</div><div class='ctx'> 				enum mlx5_eswitch_vport_event enabled_events)</div><div class='ctx'> {</div><div class='hunk'>@@ -1280,29 +1338,34 @@ mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,</div><div class='ctx'> 		    esw-&gt;mode == MLX5_ESWITCH_LEGACY;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable PF vport */</div><div class='del'>-	if (pf_needed) {</div><div class='add'>+	if (pf_needed &amp;&amp; mlx5_esw_host_functions_enabled(esw-&gt;dev)) {</div><div class='ctx'> 		ret = mlx5_eswitch_load_pf_vf_vport(esw, MLX5_VPORT_PF,</div><div class='ctx'> 						    enabled_events);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Enable external host PF HCA */</div><div class='del'>-	ret = host_pf_enable_hca(esw-&gt;dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto pf_hca_err;</div><div class='add'>+	if (mlx5_esw_host_functions_enabled(esw-&gt;dev)) {</div><div class='add'>+		/* Enable external host PF HCA */</div><div class='add'>+		ret = host_pf_enable_hca(esw-&gt;dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto pf_hca_err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable ECPF vport */</div><div class='ctx'> 	if (mlx5_ecpf_vport_exists(esw-&gt;dev)) {</div><div class='ctx'> 		ret = mlx5_eswitch_load_pf_vf_vport(esw, MLX5_VPORT_ECPF, enabled_events);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto ecpf_err;</div><div class='del'>-		if (mlx5_core_ec_sriov_enabled(esw-&gt;dev)) {</div><div class='del'>-			ret = mlx5_eswitch_load_ec_vf_vports(esw, esw-&gt;esw_funcs.num_ec_vfs,</div><div class='del'>-							     enabled_events);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto ec_vf_err;</div><div class='del'>-		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable ECVF vports */</div><div class='add'>+	if (mlx5_core_ec_sriov_enabled(esw-&gt;dev)) {</div><div class='add'>+		ret = mlx5_eswitch_load_ec_vf_vports(esw,</div><div class='add'>+						     esw-&gt;esw_funcs.num_ec_vfs,</div><div class='add'>+						     enabled_events);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto ec_vf_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable VF vports */</div><div class='hunk'>@@ -1310,8 +1373,16 @@ mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,</div><div class='ctx'> 					  enabled_events);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto vf_err;</div><div class='add'>+</div><div class='add'>+	/* Enable adjacent VF vports */</div><div class='add'>+	ret = mlx5_eswitch_load_adj_vf_vports(esw, enabled_events);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unload_vf_vports;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+unload_vf_vports:</div><div class='add'>+	mlx5_eswitch_unload_vf_vports(esw, esw-&gt;esw_funcs.num_vfs);</div><div class='ctx'> vf_err:</div><div class='ctx'> 	if (mlx5_core_ec_sriov_enabled(esw-&gt;dev))</div><div class='ctx'> 		mlx5_eswitch_unload_ec_vf_vports(esw, esw-&gt;esw_funcs.num_ec_vfs);</div><div class='hunk'>@@ -1319,9 +1390,10 @@ ec_vf_err:</div><div class='ctx'> 	if (mlx5_ecpf_vport_exists(esw-&gt;dev))</div><div class='ctx'> 		mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_ECPF);</div><div class='ctx'> ecpf_err:</div><div class='del'>-	host_pf_disable_hca(esw-&gt;dev);</div><div class='add'>+	if (mlx5_esw_host_functions_enabled(esw-&gt;dev))</div><div class='add'>+		host_pf_disable_hca(esw-&gt;dev);</div><div class='ctx'> pf_hca_err:</div><div class='del'>-	if (pf_needed)</div><div class='add'>+	if (pf_needed &amp;&amp; mlx5_esw_host_functions_enabled(esw-&gt;dev))</div><div class='ctx'> 		mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_PF);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1331,18 +1403,24 @@ pf_hca_err:</div><div class='ctx'>  */</div><div class='ctx'> void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw)</div><div class='ctx'> {</div><div class='add'>+	mlx5_eswitch_unload_adj_vf_vports(esw);</div><div class='add'>+</div><div class='ctx'> 	mlx5_eswitch_unload_vf_vports(esw, esw-&gt;esw_funcs.num_vfs);</div><div class='ctx'> </div><div class='add'>+	if (mlx5_core_ec_sriov_enabled(esw-&gt;dev))</div><div class='add'>+		mlx5_eswitch_unload_ec_vf_vports(esw,</div><div class='add'>+						 esw-&gt;esw_funcs.num_ec_vfs);</div><div class='add'>+</div><div class='ctx'> 	if (mlx5_ecpf_vport_exists(esw-&gt;dev)) {</div><div class='del'>-		if (mlx5_core_ec_sriov_enabled(esw-&gt;dev))</div><div class='del'>-			mlx5_eswitch_unload_ec_vf_vports(esw, esw-&gt;esw_funcs.num_vfs);</div><div class='ctx'> 		mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_ECPF);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	host_pf_disable_hca(esw-&gt;dev);</div><div class='add'>+	if (mlx5_esw_host_functions_enabled(esw-&gt;dev))</div><div class='add'>+		host_pf_disable_hca(esw-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	if (mlx5_core_is_ecpf_esw_manager(esw-&gt;dev) ||</div><div class='del'>-	    esw-&gt;mode == MLX5_ESWITCH_LEGACY)</div><div class='add'>+	if ((mlx5_core_is_ecpf_esw_manager(esw-&gt;dev) ||</div><div class='add'>+	     esw-&gt;mode == MLX5_ESWITCH_LEGACY) &amp;&amp;</div><div class='add'>+	    mlx5_esw_host_functions_enabled(esw-&gt;dev))</div><div class='ctx'> 		mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_PF);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1396,22 +1474,79 @@ static void mlx5_esw_mode_change_notify(struct mlx5_eswitch *esw, u16 mode)</div><div class='ctx'> </div><div class='ctx'> 	info.new_mode = mode;</div><div class='ctx'> </div><div class='del'>-	blocking_notifier_call_chain(&amp;esw-&gt;n_head, 0, &amp;info);</div><div class='add'>+	blocking_notifier_call_chain(&amp;esw-&gt;dev-&gt;priv.esw_n_head, 0, &amp;info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_esw_egress_acls_init(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_steering *steering = dev-&gt;priv.steering;</div><div class='add'>+	int total_vports = mlx5_eswitch_get_total_vports(dev);</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; total_vports; i++) {</div><div class='add'>+		err = mlx5_fs_vport_egress_acl_ns_add(steering, i);</div><div class='add'>+		if (err)</div><div class='add'>+			goto acl_ns_remove;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+acl_ns_remove:</div><div class='add'>+	while (i--)</div><div class='add'>+		mlx5_fs_vport_egress_acl_ns_remove(steering, i);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_esw_egress_acls_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_steering *steering = dev-&gt;priv.steering;</div><div class='add'>+	int total_vports = mlx5_eswitch_get_total_vports(dev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = total_vports - 1; i &gt;= 0; i--)</div><div class='add'>+		mlx5_fs_vport_egress_acl_ns_remove(steering, i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_esw_ingress_acls_init(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_steering *steering = dev-&gt;priv.steering;</div><div class='add'>+	int total_vports = mlx5_eswitch_get_total_vports(dev);</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; total_vports; i++) {</div><div class='add'>+		err = mlx5_fs_vport_ingress_acl_ns_add(steering, i);</div><div class='add'>+		if (err)</div><div class='add'>+			goto acl_ns_remove;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+acl_ns_remove:</div><div class='add'>+	while (i--)</div><div class='add'>+		mlx5_fs_vport_ingress_acl_ns_remove(steering, i);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_esw_ingress_acls_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_steering *steering = dev-&gt;priv.steering;</div><div class='add'>+	int total_vports = mlx5_eswitch_get_total_vports(dev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = total_vports - 1; i &gt;= 0; i--)</div><div class='add'>+		mlx5_fs_vport_ingress_acl_ns_remove(steering, i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_esw_acls_ns_init(struct mlx5_eswitch *esw)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *dev = esw-&gt;dev;</div><div class='del'>-	int total_vports;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (esw-&gt;flags &amp; MLX5_ESWITCH_VPORT_ACL_NS_CREATED)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	total_vports = mlx5_eswitch_get_total_vports(dev);</div><div class='del'>-</div><div class='ctx'> 	if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support)) {</div><div class='del'>-		err = mlx5_fs_egress_acls_init(dev, total_vports);</div><div class='add'>+		err = mlx5_esw_egress_acls_init(dev);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1419,7 +1554,7 @@ static int mlx5_esw_acls_ns_init(struct mlx5_eswitch *esw)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support)) {</div><div class='del'>-		err = mlx5_fs_ingress_acls_init(dev, total_vports);</div><div class='add'>+		err = mlx5_esw_ingress_acls_init(dev);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1430,7 +1565,7 @@ static int mlx5_esw_acls_ns_init(struct mlx5_eswitch *esw)</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='ctx'> 	if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))</div><div class='del'>-		mlx5_fs_egress_acls_cleanup(dev);</div><div class='add'>+		mlx5_esw_egress_acls_cleanup(dev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1440,9 +1575,9 @@ static void mlx5_esw_acls_ns_cleanup(struct mlx5_eswitch *esw)</div><div class='ctx'> </div><div class='ctx'> 	esw-&gt;flags &amp;= ~MLX5_ESWITCH_VPORT_ACL_NS_CREATED;</div><div class='ctx'> 	if (MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support))</div><div class='del'>-		mlx5_fs_ingress_acls_cleanup(dev);</div><div class='add'>+		mlx5_esw_ingress_acls_cleanup(dev);</div><div class='ctx'> 	if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))</div><div class='del'>-		mlx5_fs_egress_acls_cleanup(dev);</div><div class='add'>+		mlx5_esw_egress_acls_cleanup(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1485,17 +1620,16 @@ int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int num_vfs)</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_esw_qos_init(esw);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_qos_init;</div><div class='add'>+		goto err_esw_init;</div><div class='ctx'> </div><div class='ctx'> 	if (esw-&gt;mode == MLX5_ESWITCH_LEGACY) {</div><div class='ctx'> 		err = esw_legacy_enable(esw);</div><div class='ctx'> 	} else {</div><div class='del'>-		mlx5_rescan_drivers(esw-&gt;dev);</div><div class='ctx'> 		err = esw_offloads_enable(esw);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_esw_enable;</div><div class='add'>+		goto err_esw_init;</div><div class='ctx'> </div><div class='ctx'> 	esw-&gt;fdb_table.flags |= MLX5_ESW_FDB_CREATED;</div><div class='ctx'> </div><div class='hunk'>@@ -1509,9 +1643,7 @@ int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int num_vfs)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_esw_enable:</div><div class='del'>-	mlx5_esw_qos_cleanup(esw);</div><div class='del'>-err_qos_init:</div><div class='add'>+err_esw_init:</div><div class='ctx'> 	mlx5_eq_notifier_unregister(esw-&gt;dev, &amp;esw-&gt;nb);</div><div class='ctx'> 	mlx5_esw_acls_ns_cleanup(esw);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1640,7 +1772,6 @@ void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw)</div><div class='ctx'> </div><div class='ctx'> 	if (esw-&gt;mode == MLX5_ESWITCH_OFFLOADS)</div><div class='ctx'> 		devl_rate_nodes_destroy(devlink);</div><div class='del'>-	mlx5_esw_qos_cleanup(esw);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_eswitch_disable(struct mlx5_eswitch *esw)</div><div class='hunk'>@@ -1675,7 +1806,8 @@ int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *</div><div class='ctx'> 	void *hca_caps;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (!mlx5_core_is_ecpf(dev)) {</div><div class='add'>+	if (!mlx5_core_is_ecpf(dev) ||</div><div class='add'>+	    !mlx5_esw_host_functions_enabled(dev)) {</div><div class='ctx'> 		*max_sfs = 0;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1697,8 +1829,7 @@ out_free:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5_esw_vport_alloc(struct mlx5_eswitch *esw,</div><div class='del'>-				int index, u16 vport_num)</div><div class='add'>+int mlx5_esw_vport_alloc(struct mlx5_eswitch *esw, int index, u16 vport_num)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_vport *vport;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1711,6 +1842,7 @@ static int mlx5_esw_vport_alloc(struct mlx5_eswitch *esw,</div><div class='ctx'> 	vport-&gt;vport = vport_num;</div><div class='ctx'> 	vport-&gt;index = index;</div><div class='ctx'> 	vport-&gt;info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;</div><div class='add'>+	vport-&gt;vhca_id = MLX5_VHCA_ID_INVALID;</div><div class='ctx'> 	INIT_WORK(&amp;vport-&gt;vport_change_handler, esw_vport_change_handler);</div><div class='ctx'> 	err = xa_insert(&amp;esw-&gt;vports, vport_num, vport, GFP_KERNEL);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1724,8 +1856,9 @@ insert_err:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_esw_vport_free(struct mlx5_eswitch *esw, struct mlx5_vport *vport)</div><div class='add'>+void mlx5_esw_vport_free(struct mlx5_eswitch *esw, struct mlx5_vport *vport)</div><div class='ctx'> {</div><div class='add'>+	esw-&gt;total_vports--;</div><div class='ctx'> 	xa_erase(&amp;esw-&gt;vports, vport-&gt;vport);</div><div class='ctx'> 	kfree(vport);</div><div class='ctx'> }</div><div class='hunk'>@@ -1751,21 +1884,23 @@ static int mlx5_esw_vports_init(struct mlx5_eswitch *esw)</div><div class='ctx'> </div><div class='ctx'> 	xa_init(&amp;esw-&gt;vports);</div><div class='ctx'> </div><div class='del'>-	err = mlx5_esw_vport_alloc(esw, idx, MLX5_VPORT_PF);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err;</div><div class='del'>-	if (esw-&gt;first_host_vport == MLX5_VPORT_PF)</div><div class='del'>-		xa_set_mark(&amp;esw-&gt;vports, idx, MLX5_ESW_VPT_HOST_FN);</div><div class='del'>-	idx++;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; mlx5_core_max_vfs(dev); i++) {</div><div class='del'>-		err = mlx5_esw_vport_alloc(esw, idx, idx);</div><div class='add'>+	if (mlx5_esw_host_functions_enabled(dev)) {</div><div class='add'>+		err = mlx5_esw_vport_alloc(esw, idx, MLX5_VPORT_PF);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err;</div><div class='del'>-		xa_set_mark(&amp;esw-&gt;vports, idx, MLX5_ESW_VPT_VF);</div><div class='del'>-		xa_set_mark(&amp;esw-&gt;vports, idx, MLX5_ESW_VPT_HOST_FN);</div><div class='add'>+		if (esw-&gt;first_host_vport == MLX5_VPORT_PF)</div><div class='add'>+			xa_set_mark(&amp;esw-&gt;vports, idx, MLX5_ESW_VPT_HOST_FN);</div><div class='ctx'> 		idx++;</div><div class='add'>+		for (i = 0; i &lt; mlx5_core_max_vfs(dev); i++) {</div><div class='add'>+			err = mlx5_esw_vport_alloc(esw, idx, idx);</div><div class='add'>+			if (err)</div><div class='add'>+				goto err;</div><div class='add'>+			xa_set_mark(&amp;esw-&gt;vports, idx, MLX5_ESW_VPT_VF);</div><div class='add'>+			xa_set_mark(&amp;esw-&gt;vports, idx, MLX5_ESW_VPT_HOST_FN);</div><div class='add'>+			idx++;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	base_sf_num = mlx5_sf_start_function_id(dev);</div><div class='ctx'> 	for (i = 0; i &lt; mlx5_sf_max_functions(dev); i++) {</div><div class='ctx'> 		err = mlx5_esw_vport_alloc(esw, idx, base_sf_num + i);</div><div class='hunk'>@@ -1807,6 +1942,9 @@ static int mlx5_esw_vports_init(struct mlx5_eswitch *esw)</div><div class='ctx'> 	err = mlx5_esw_vport_alloc(esw, idx, MLX5_VPORT_UPLINK);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err;</div><div class='add'>+</div><div class='add'>+	/* Adjacent vports or other dynamically create vports will use this */</div><div class='add'>+	esw-&gt;last_vport_idx = ++idx;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='hunk'>@@ -1831,7 +1969,8 @@ static int mlx5_devlink_esw_multiport_set(struct devlink *devlink, u32 id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_devlink_esw_multiport_get(struct devlink *devlink, u32 id,</div><div class='del'>-					  struct devlink_param_gset_ctx *ctx)</div><div class='add'>+					  struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='ctx'> </div><div class='hunk'>@@ -1865,6 +2004,7 @@ int mlx5_eswitch_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 		goto free_esw;</div><div class='ctx'> </div><div class='ctx'> 	esw-&gt;dev = dev;</div><div class='add'>+	dev-&gt;priv.eswitch = esw;</div><div class='ctx'> 	esw-&gt;manager_vport = mlx5_eswitch_manager_vport(dev);</div><div class='ctx'> 	esw-&gt;first_host_vport = mlx5_eswitch_first_host_vport_num(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1875,15 +2015,23 @@ int mlx5_eswitch_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 		goto abort;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = mlx5_esw_host_functions_enabled_query(esw);</div><div class='add'>+	if (err)</div><div class='add'>+		goto abort;</div><div class='add'>+</div><div class='ctx'> 	err = mlx5_esw_vports_init(esw);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto abort;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;priv.eswitch = esw;</div><div class='ctx'> 	err = esw_offloads_init(esw);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto reps_err;</div><div class='ctx'> </div><div class='add'>+	esw-&gt;mode = MLX5_ESWITCH_LEGACY;</div><div class='add'>+	err = mlx5_esw_qos_init(esw);</div><div class='add'>+	if (err)</div><div class='add'>+		goto reps_err;</div><div class='add'>+</div><div class='ctx'> 	mutex_init(&amp;esw-&gt;offloads.encap_tbl_lock);</div><div class='ctx'> 	hash_init(esw-&gt;offloads.encap_tbl);</div><div class='ctx'> 	mutex_init(&amp;esw-&gt;offloads.decap_tbl_lock);</div><div class='hunk'>@@ -1897,14 +2045,12 @@ int mlx5_eswitch_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 	refcount_set(&amp;esw-&gt;qos.refcnt, 0);</div><div class='ctx'> </div><div class='ctx'> 	esw-&gt;enabled_vports = 0;</div><div class='del'>-	esw-&gt;mode = MLX5_ESWITCH_LEGACY;</div><div class='ctx'> 	esw-&gt;offloads.inline_mode = MLX5_INLINE_MODE_NONE;</div><div class='ctx'> 	if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, reformat) &amp;&amp;</div><div class='ctx'> 	    MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap))</div><div class='ctx'> 		esw-&gt;offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_BASIC;</div><div class='ctx'> 	else</div><div class='ctx'> 		esw-&gt;offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_NONE;</div><div class='del'>-	BLOCKING_INIT_NOTIFIER_HEAD(&amp;esw-&gt;n_head);</div><div class='ctx'> </div><div class='ctx'> 	esw_info(dev,</div><div class='ctx'> 		 "Total vports %d, per vport: max uc(%d) max mc(%d)\n",</div><div class='hunk'>@@ -1934,6 +2080,7 @@ void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)</div><div class='ctx'> </div><div class='ctx'> 	esw_info(esw-&gt;dev, "cleanup\n");</div><div class='ctx'> </div><div class='add'>+	mlx5_esw_qos_cleanup(esw);</div><div class='ctx'> 	destroy_workqueue(esw-&gt;work_queue);</div><div class='ctx'> 	WARN_ON(refcount_read(&amp;esw-&gt;qos.refcnt));</div><div class='ctx'> 	mutex_destroy(&amp;esw-&gt;state_lock);</div><div class='hunk'>@@ -2079,6 +2226,9 @@ int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,</div><div class='ctx'> 	ivi-&gt;vf = vport - 1;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;esw-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	mlx5_query_nic_vport_mac_address(esw-&gt;dev, vport, true,</div><div class='add'>+					 evport-&gt;info.mac);</div><div class='ctx'> 	ether_addr_copy(ivi-&gt;mac, evport-&gt;info.mac);</div><div class='ctx'> 	ivi-&gt;linkstate = evport-&gt;info.link_state;</div><div class='ctx'> 	ivi-&gt;vlan = evport-&gt;info.vlan;</div><div class='hunk'>@@ -2229,14 +2379,16 @@ bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,</div><div class='ctx'> 		dev1-&gt;priv.eswitch-&gt;mode == MLX5_ESWITCH_OFFLOADS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5_esw_event_notifier_register(struct mlx5_eswitch *esw, struct notifier_block *nb)</div><div class='add'>+int mlx5_esw_event_notifier_register(struct mlx5_core_dev *dev,</div><div class='add'>+				     struct notifier_block *nb)</div><div class='ctx'> {</div><div class='del'>-	return blocking_notifier_chain_register(&amp;esw-&gt;n_head, nb);</div><div class='add'>+	return blocking_notifier_chain_register(&amp;dev-&gt;priv.esw_n_head, nb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5_esw_event_notifier_unregister(struct mlx5_eswitch *esw, struct notifier_block *nb)</div><div class='add'>+void mlx5_esw_event_notifier_unregister(struct mlx5_core_dev *dev,</div><div class='add'>+					struct notifier_block *nb)</div><div class='ctx'> {</div><div class='del'>-	blocking_notifier_chain_unregister(&amp;esw-&gt;n_head, nb);</div><div class='add'>+	blocking_notifier_chain_unregister(&amp;dev-&gt;priv.esw_n_head, nb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2406,3 +2558,11 @@ void mlx5_eswitch_unblock_ipsec(struct mlx5_core_dev *dev)</div><div class='ctx'> 	dev-&gt;num_ipsec_offloads--;</div><div class='ctx'> 	mutex_unlock(&amp;esw-&gt;state_lock);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool mlx5_esw_host_functions_enabled(const struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	if (!dev-&gt;priv.eswitch)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return !dev-&gt;priv.eswitch-&gt;esw_funcs.host_funcs_disabled;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h b/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h<br/>index 14dd42d44e6f..ad1073f7b79f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/eswitch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/eswitch.h</a></div><div class='hunk'>@@ -197,6 +197,11 @@ static inline struct mlx5_vport *mlx5_devlink_port_vport_get(struct devlink_port</div><div class='ctx'> 	return mlx5_devlink_port_get(dl_port)-&gt;vport;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define MLX5_VHCA_ID_INVALID (-1)</div><div class='add'>+</div><div class='add'>+#define MLX5_VPORT_INVAL_VHCA_ID(vport) \</div><div class='add'>+	((vport)-&gt;vhca_id == MLX5_VHCA_ID_INVALID)</div><div class='add'>+</div><div class='ctx'> struct mlx5_vport {</div><div class='ctx'> 	struct mlx5_core_dev    *dev;</div><div class='ctx'> 	struct hlist_head       uc_list[MLX5_L2_ADDR_HASH_SIZE];</div><div class='hunk'>@@ -209,13 +214,30 @@ struct mlx5_vport {</div><div class='ctx'> 	struct vport_egress     egress;</div><div class='ctx'> 	u32                     default_metadata;</div><div class='ctx'> 	u32                     metadata;</div><div class='add'>+	int                     vhca_id;</div><div class='add'>+</div><div class='add'>+	bool adjacent; /* delegated vhca from adjacent function */</div><div class='add'>+	struct {</div><div class='add'>+		u16 parent_pci_devfn; /* Adjacent parent PCI device function */</div><div class='add'>+		u16 function_id; /* Function ID of the delegated VPort */</div><div class='add'>+	} adj_info;</div><div class='ctx'> </div><div class='ctx'> 	struct mlx5_vport_info  info;</div><div class='ctx'> </div><div class='del'>-	/* Protected with the E-Switch qos domain lock. */</div><div class='add'>+	/* Protected with the E-Switch qos domain lock. The Vport QoS can</div><div class='add'>+	 * either be disabled (sched_node is NULL) or in one of three states:</div><div class='add'>+	 * 1. Regular QoS (sched_node is a vport node).</div><div class='add'>+	 * 2. TC QoS enabled on the vport (sched_node is a TC arbiter).</div><div class='add'>+	 * 3. TC QoS enabled on the vport's parent node</div><div class='add'>+	 *    (sched_node is a rate limit node).</div><div class='add'>+	 * When TC is enabled in either mode, the vport owns vport TC scheduling</div><div class='add'>+	 * nodes.</div><div class='add'>+	 */</div><div class='ctx'> 	struct {</div><div class='del'>-		/* Vport scheduling element node. */</div><div class='add'>+		/* Vport scheduling node. */</div><div class='ctx'> 		struct mlx5_esw_sched_node *sched_node;</div><div class='add'>+		/* Array of vport traffic class scheduling nodes. */</div><div class='add'>+		struct mlx5_esw_sched_node **sched_nodes;</div><div class='ctx'> 	} qos;</div><div class='ctx'> </div><div class='ctx'> 	u16 vport;</div><div class='hunk'>@@ -242,6 +264,9 @@ struct mlx5_eswitch_fdb {</div><div class='ctx'> </div><div class='ctx'> 		struct offloads_fdb {</div><div class='ctx'> 			struct mlx5_flow_namespace *ns;</div><div class='add'>+			struct mlx5_flow_table *drop_root;</div><div class='add'>+			struct mlx5_flow_handle *drop_root_rule;</div><div class='add'>+			struct mlx5_fc *drop_root_fc;</div><div class='ctx'> 			struct mlx5_flow_table *tc_miss_table;</div><div class='ctx'> 			struct mlx5_flow_table *slow_fdb;</div><div class='ctx'> 			struct mlx5_flow_group *send_to_vport_grp;</div><div class='hunk'>@@ -313,6 +338,7 @@ struct mlx5_host_work {</div><div class='ctx'> </div><div class='ctx'> struct mlx5_esw_functions {</div><div class='ctx'> 	struct mlx5_nb		nb;</div><div class='add'>+	bool			host_funcs_disabled;</div><div class='ctx'> 	u16			num_vfs;</div><div class='ctx'> 	u16			num_ec_vfs;</div><div class='ctx'> };</div><div class='hunk'>@@ -363,16 +389,13 @@ struct mlx5_eswitch {</div><div class='ctx'> 		refcount_t refcnt;</div><div class='ctx'> 		u32 root_tsar_ix;</div><div class='ctx'> 		struct mlx5_qos_domain *domain;</div><div class='del'>-		/* Contains all vports with QoS enabled but no explicit node.</div><div class='del'>-		 * Cannot be NULL if QoS is enabled, but may be a fake node</div><div class='del'>-		 * referencing the root TSAR if the esw doesn't support nodes.</div><div class='del'>-		 */</div><div class='del'>-		struct mlx5_esw_sched_node *node0;</div><div class='ctx'> 	} qos;</div><div class='ctx'> </div><div class='ctx'> 	struct mlx5_esw_bridge_offloads *br_offloads;</div><div class='ctx'> 	struct mlx5_esw_offload offloads;</div><div class='add'>+	u32 last_vport_idx;</div><div class='ctx'> 	int                     mode;</div><div class='add'>+	bool                    offloads_inactive;</div><div class='ctx'> 	u16                     manager_vport;</div><div class='ctx'> 	u16                     first_host_vport;</div><div class='ctx'> 	u8			num_peers;</div><div class='hunk'>@@ -380,7 +403,6 @@ struct mlx5_eswitch {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		u32             large_group_num;</div><div class='ctx'> 	}  params;</div><div class='del'>-	struct blocking_notifier_head n_head;</div><div class='ctx'> 	struct xarray paired;</div><div class='ctx'> 	struct mlx5_devcom_comp_dev *devcom;</div><div class='ctx'> 	u16 enabled_ipsec_vf_count;</div><div class='hunk'>@@ -405,6 +427,8 @@ int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32</div><div class='ctx'> /* E-Switch API */</div><div class='ctx'> int mlx5_eswitch_init(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);</div><div class='add'>+int mlx5_esw_vport_alloc(struct mlx5_eswitch *esw, int index, u16 vport_num);</div><div class='add'>+void mlx5_esw_vport_free(struct mlx5_eswitch *esw, struct mlx5_vport *vport);</div><div class='ctx'> </div><div class='ctx'> #define MLX5_ESWITCH_IGNORE_NUM_VFS (-1)</div><div class='ctx'> int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int num_vfs);</div><div class='hunk'>@@ -412,7 +436,8 @@ int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs);</div><div class='ctx'> void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf);</div><div class='ctx'> void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw);</div><div class='ctx'> void mlx5_eswitch_disable(struct mlx5_eswitch *esw);</div><div class='del'>-void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, u64 key);</div><div class='add'>+void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw,</div><div class='add'>+				   const struct mlx5_devcom_match_attr *attr);</div><div class='ctx'> void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw);</div><div class='ctx'> bool mlx5_esw_offloads_devcom_is_ready(struct mlx5_eswitch *esw);</div><div class='ctx'> int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,</div><div class='hunk'>@@ -427,9 +452,8 @@ int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,</div><div class='ctx'> 				 u16 vport_num, bool setting);</div><div class='ctx'> int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,</div><div class='ctx'> 				u32 max_rate, u32 min_rate);</div><div class='del'>-int mlx5_esw_qos_vport_update_node(struct mlx5_vport *vport,</div><div class='del'>-				   struct mlx5_esw_sched_node *node,</div><div class='del'>-				   struct netlink_ext_ack *extack);</div><div class='add'>+int mlx5_esw_qos_vport_update_parent(struct mlx5_vport *vport, struct mlx5_esw_sched_node *node,</div><div class='add'>+				     struct netlink_ext_ack *extack);</div><div class='ctx'> int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting);</div><div class='ctx'> int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting);</div><div class='ctx'> int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,</div><div class='hunk'>@@ -611,6 +635,11 @@ bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,</div><div class='ctx'> </div><div class='ctx'> const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='add'>+void mlx5_esw_adjacent_vhcas_setup(struct mlx5_eswitch *esw);</div><div class='add'>+void mlx5_esw_adjacent_vhcas_cleanup(struct mlx5_eswitch *esw);</div><div class='add'>+int mlx5_esw_adj_vport_modify(struct mlx5_core_dev *dev, u16 vport,</div><div class='add'>+			      bool connect);</div><div class='add'>+</div><div class='ctx'> #define MLX5_DEBUG_ESWITCH_MASK BIT(3)</div><div class='ctx'> </div><div class='ctx'> #define esw_info(__dev, format, ...)			\</div><div class='hunk'>@@ -715,6 +744,9 @@ void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);</div><div class='ctx'> 			  MLX5_CAP_GEN_2((esw-&gt;dev), ec_vf_vport_base) +\</div><div class='ctx'> 			  (last) - 1)</div><div class='ctx'> </div><div class='add'>+#define mlx5_esw_for_each_rep(esw, i, rep) \</div><div class='add'>+	xa_for_each(&amp;((esw)-&gt;offloads.vport_reps), i, rep)</div><div class='add'>+</div><div class='ctx'> struct mlx5_eswitch *__must_check</div><div class='ctx'> mlx5_devlink_eswitch_get(struct devlink *devlink);</div><div class='ctx'> </div><div class='hunk'>@@ -810,12 +842,20 @@ struct devlink_port *mlx5_esw_offloads_devlink_port(struct mlx5_eswitch *esw, u1</div><div class='ctx'> </div><div class='ctx'> int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id);</div><div class='ctx'> </div><div class='del'>-int mlx5_esw_vport_vhca_id_set(struct mlx5_eswitch *esw, u16 vport_num);</div><div class='del'>-void mlx5_esw_vport_vhca_id_clear(struct mlx5_eswitch *esw, u16 vport_num);</div><div class='add'>+int mlx5_esw_vport_vhca_id_map(struct mlx5_eswitch *esw,</div><div class='add'>+			       struct mlx5_vport *vport);</div><div class='add'>+void mlx5_esw_vport_vhca_id_unmap(struct mlx5_eswitch *esw,</div><div class='add'>+				  struct mlx5_vport *vport);</div><div class='ctx'> int mlx5_eswitch_vhca_id_to_vport(struct mlx5_eswitch *esw, u16 vhca_id, u16 *vport_num);</div><div class='add'>+bool mlx5_esw_vport_vhca_id(struct mlx5_eswitch *esw, u16 vportn, u16 *vhca_id);</div><div class='add'>+</div><div class='add'>+void mlx5_esw_offloads_rep_remove(struct mlx5_eswitch *esw,</div><div class='add'>+				  const struct mlx5_vport *vport);</div><div class='add'>+int mlx5_esw_offloads_rep_add(struct mlx5_eswitch *esw,</div><div class='add'>+			      const struct mlx5_vport *vport);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * mlx5_esw_event_info - Indicates eswitch mode changed/changing.</div><div class='add'>+ * struct mlx5_esw_event_info - Indicates eswitch mode changed/changing.</div><div class='ctx'>  *</div><div class='ctx'>  * @new_mode: New mode of eswitch.</div><div class='ctx'>  */</div><div class='hunk'>@@ -823,8 +863,10 @@ struct mlx5_esw_event_info {</div><div class='ctx'> 	u16 new_mode;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int mlx5_esw_event_notifier_register(struct mlx5_eswitch *esw, struct notifier_block *n);</div><div class='del'>-void mlx5_esw_event_notifier_unregister(struct mlx5_eswitch *esw, struct notifier_block *n);</div><div class='add'>+int mlx5_esw_event_notifier_register(struct mlx5_core_dev *dev,</div><div class='add'>+				     struct notifier_block *n);</div><div class='add'>+void mlx5_esw_event_notifier_unregister(struct mlx5_core_dev *dev,</div><div class='add'>+					struct notifier_block *n);</div><div class='ctx'> </div><div class='ctx'> bool mlx5_esw_hold(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_esw_release(struct mlx5_core_dev *dev);</div><div class='hunk'>@@ -844,7 +886,7 @@ void mlx5_eswitch_offloads_single_fdb_del_one(struct mlx5_eswitch *master_esw,</div><div class='ctx'> 					      struct mlx5_eswitch *slave_esw);</div><div class='ctx'> int mlx5_eswitch_reload_ib_reps(struct mlx5_eswitch *esw);</div><div class='ctx'> </div><div class='del'>-bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev);</div><div class='add'>+bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev, bool from_fdb);</div><div class='ctx'> void mlx5_eswitch_unblock_encap(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='ctx'> int mlx5_eswitch_block_mode(struct mlx5_core_dev *dev);</div><div class='hunk'>@@ -886,6 +928,7 @@ int mlx5_esw_ipsec_vf_packet_offload_set(struct mlx5_eswitch *esw, struct mlx5_v</div><div class='ctx'> 					 bool enable);</div><div class='ctx'> int mlx5_esw_ipsec_vf_packet_offload_supported(struct mlx5_core_dev *dev,</div><div class='ctx'> 					       u16 vport_num);</div><div class='add'>+bool mlx5_esw_host_functions_enabled(const struct mlx5_core_dev *dev);</div><div class='ctx'> #else  /* CONFIG_MLX5_ESWITCH */</div><div class='ctx'> /* eswitch API stubs */</div><div class='ctx'> static inline int  mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }</div><div class='hunk'>@@ -893,7 +936,9 @@ static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}</div><div class='ctx'> static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; }</div><div class='ctx'> static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf) {}</div><div class='ctx'> static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw) {}</div><div class='del'>-static inline void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, u64 key) {}</div><div class='add'>+static inline void</div><div class='add'>+mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw,</div><div class='add'>+			      const struct mlx5_devcom_match_attr *attr) {}</div><div class='ctx'> static inline void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw) {}</div><div class='ctx'> static inline bool mlx5_esw_offloads_devcom_is_ready(struct mlx5_eswitch *esw) { return false; }</div><div class='ctx'> static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }</div><div class='hunk'>@@ -936,7 +981,8 @@ mlx5_eswitch_reload_ib_reps(struct mlx5_eswitch *esw)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev)</div><div class='add'>+static inline bool</div><div class='add'>+mlx5_eswitch_block_encap(struct mlx5_core_dev *dev, bool from_fdb)</div><div class='ctx'> {</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -953,6 +999,19 @@ static inline bool mlx5_eswitch_block_ipsec(struct mlx5_core_dev *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void mlx5_eswitch_unblock_ipsec(struct mlx5_core_dev *dev) {}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+mlx5_esw_host_functions_enabled(const struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+mlx5_esw_vport_vhca_id(struct mlx5_eswitch *esw, u16 vportn, u16 *vhca_id)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* CONFIG_MLX5_ESWITCH */</div><div class='ctx'> </div><div class='ctx'> #endif /* __MLX5_ESWITCH_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c<br/>index fd34f43d18d5..8de6c7f6c294 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c</a></div><div class='hunk'>@@ -53,9 +53,6 @@</div><div class='ctx'> #include "lag/lag.h"</div><div class='ctx'> #include "en/tc/post_meter.h"</div><div class='ctx'> </div><div class='del'>-#define mlx5_esw_for_each_rep(esw, i, rep) \</div><div class='del'>-	xa_for_each(&amp;((esw)-&gt;offloads.vport_reps), i, rep)</div><div class='del'>-</div><div class='ctx'> /* There are two match-all miss flows, one for unicast dst mac and</div><div class='ctx'>  * one for multicast.</div><div class='ctx'>  */</div><div class='hunk'>@@ -651,6 +648,7 @@ esw_setup_meter(struct mlx5_flow_attr *attr, struct mlx5_flow_act *flow_act)</div><div class='ctx'> 	meter = attr-&gt;meter_attr.meter;</div><div class='ctx'> 	flow_act-&gt;exe_aso.type = attr-&gt;exe_aso_type;</div><div class='ctx'> 	flow_act-&gt;exe_aso.object_id = meter-&gt;obj_id;</div><div class='add'>+	flow_act-&gt;exe_aso.base_id = mlx5e_flow_meter_get_base_id(meter);</div><div class='ctx'> 	flow_act-&gt;exe_aso.flow_meter.meter_idx = meter-&gt;idx;</div><div class='ctx'> 	flow_act-&gt;exe_aso.flow_meter.init_color = MLX5_FLOW_METER_COLOR_GREEN;</div><div class='ctx'> 	/* use metadata reg 5 for packet color */</div><div class='hunk'>@@ -724,7 +722,7 @@ mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,</div><div class='ctx'> </div><div class='ctx'> 	if (flow_act.action &amp; MLX5_FLOW_CONTEXT_ACTION_COUNT) {</div><div class='ctx'> 		dest[i].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-		dest[i].counter_id = mlx5_fc_id(attr-&gt;counter);</div><div class='add'>+		dest[i].counter = attr-&gt;counter;</div><div class='ctx'> 		i++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1018,8 +1016,8 @@ mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *on_esw,</div><div class='ctx'> 	flow_rule = mlx5_add_flow_rules(mlx5_eswitch_get_slow_fdb(on_esw),</div><div class='ctx'> 					spec, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 	if (IS_ERR(flow_rule))</div><div class='del'>-		esw_warn(on_esw-&gt;dev, "FDB: Failed to add send to vport rule err %ld\n",</div><div class='del'>-			 PTR_ERR(flow_rule));</div><div class='add'>+		esw_warn(on_esw-&gt;dev, "FDB: Failed to add send to vport rule err %pe\n",</div><div class='add'>+			 flow_rule);</div><div class='ctx'> out:</div><div class='ctx'> 	kvfree(spec);</div><div class='ctx'> 	return flow_rule;</div><div class='hunk'>@@ -1067,8 +1065,8 @@ mlx5_eswitch_add_send_to_vport_meta_rule(struct mlx5_eswitch *esw, u16 vport_num</div><div class='ctx'> 	flow_rule = mlx5_add_flow_rules(mlx5_eswitch_get_slow_fdb(esw),</div><div class='ctx'> 					spec, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 	if (IS_ERR(flow_rule))</div><div class='del'>-		esw_warn(esw-&gt;dev, "FDB: Failed to add send to vport meta rule vport %d, err %ld\n",</div><div class='del'>-			 vport_num, PTR_ERR(flow_rule));</div><div class='add'>+		esw_warn(esw-&gt;dev, "FDB: Failed to add send to vport meta rule vport %d, err %pe\n",</div><div class='add'>+			 vport_num, flow_rule);</div><div class='ctx'> </div><div class='ctx'> 	kvfree(spec);</div><div class='ctx'> 	return flow_rule;</div><div class='hunk'>@@ -1184,19 +1182,19 @@ static void esw_set_peer_miss_rule_source_port(struct mlx5_eswitch *esw,</div><div class='ctx'> static int esw_add_fdb_peer_miss_rules(struct mlx5_eswitch *esw,</div><div class='ctx'> 				       struct mlx5_core_dev *peer_dev)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_eswitch *peer_esw = peer_dev-&gt;priv.eswitch;</div><div class='ctx'> 	struct mlx5_flow_destination dest = {};</div><div class='ctx'> 	struct mlx5_flow_act flow_act = {0};</div><div class='ctx'> 	struct mlx5_flow_handle **flows;</div><div class='del'>-	/* total vports is the same for both e-switches */</div><div class='del'>-	int nvports = esw-&gt;total_vports;</div><div class='ctx'> 	struct mlx5_flow_handle *flow;</div><div class='add'>+	struct mlx5_vport *peer_vport;</div><div class='ctx'> 	struct mlx5_flow_spec *spec;</div><div class='del'>-	struct mlx5_vport *vport;</div><div class='ctx'> 	int err, pfindex;</div><div class='ctx'> 	unsigned long i;</div><div class='ctx'> 	void *misc;</div><div class='ctx'> </div><div class='del'>-	if (!MLX5_VPORT_MANAGER(esw-&gt;dev) &amp;&amp; !mlx5_core_is_ecpf_esw_manager(esw-&gt;dev))</div><div class='add'>+	if (!MLX5_VPORT_MANAGER(peer_dev) &amp;&amp;</div><div class='add'>+	    !mlx5_core_is_ecpf_esw_manager(peer_dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	spec = kvzalloc(sizeof(*spec), GFP_KERNEL);</div><div class='hunk'>@@ -1205,7 +1203,7 @@ static int esw_add_fdb_peer_miss_rules(struct mlx5_eswitch *esw,</div><div class='ctx'> </div><div class='ctx'> 	peer_miss_rules_setup(esw, peer_dev, spec, &amp;dest);</div><div class='ctx'> </div><div class='del'>-	flows = kvcalloc(nvports, sizeof(*flows), GFP_KERNEL);</div><div class='add'>+	flows = kvcalloc(peer_esw-&gt;total_vports, sizeof(*flows), GFP_KERNEL);</div><div class='ctx'> 	if (!flows) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto alloc_flows_err;</div><div class='hunk'>@@ -1215,10 +1213,11 @@ static int esw_add_fdb_peer_miss_rules(struct mlx5_eswitch *esw,</div><div class='ctx'> 	misc = MLX5_ADDR_OF(fte_match_param, spec-&gt;match_value,</div><div class='ctx'> 			    misc_parameters);</div><div class='ctx'> </div><div class='del'>-	if (mlx5_core_is_ecpf_esw_manager(esw-&gt;dev)) {</div><div class='del'>-		vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_PF);</div><div class='del'>-		esw_set_peer_miss_rule_source_port(esw, peer_dev-&gt;priv.eswitch,</div><div class='del'>-						   spec, MLX5_VPORT_PF);</div><div class='add'>+	if (mlx5_core_is_ecpf_esw_manager(peer_dev) &amp;&amp;</div><div class='add'>+	    mlx5_esw_host_functions_enabled(peer_dev)) {</div><div class='add'>+		peer_vport = mlx5_eswitch_get_vport(peer_esw, MLX5_VPORT_PF);</div><div class='add'>+		esw_set_peer_miss_rule_source_port(esw, peer_esw, spec,</div><div class='add'>+						   MLX5_VPORT_PF);</div><div class='ctx'> </div><div class='ctx'> 		flow = mlx5_add_flow_rules(mlx5_eswitch_get_slow_fdb(esw),</div><div class='ctx'> 					   spec, &amp;flow_act, &amp;dest, 1);</div><div class='hunk'>@@ -1226,11 +1225,11 @@ static int esw_add_fdb_peer_miss_rules(struct mlx5_eswitch *esw,</div><div class='ctx'> 			err = PTR_ERR(flow);</div><div class='ctx'> 			goto add_pf_flow_err;</div><div class='ctx'> 		}</div><div class='del'>-		flows[vport-&gt;index] = flow;</div><div class='add'>+		flows[peer_vport-&gt;index] = flow;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mlx5_ecpf_vport_exists(esw-&gt;dev)) {</div><div class='del'>-		vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_ECPF);</div><div class='add'>+	if (mlx5_ecpf_vport_exists(peer_dev)) {</div><div class='add'>+		peer_vport = mlx5_eswitch_get_vport(peer_esw, MLX5_VPORT_ECPF);</div><div class='ctx'> 		MLX5_SET(fte_match_set_misc, misc, source_port, MLX5_VPORT_ECPF);</div><div class='ctx'> 		flow = mlx5_add_flow_rules(mlx5_eswitch_get_slow_fdb(esw),</div><div class='ctx'> 					   spec, &amp;flow_act, &amp;dest, 1);</div><div class='hunk'>@@ -1238,36 +1237,39 @@ static int esw_add_fdb_peer_miss_rules(struct mlx5_eswitch *esw,</div><div class='ctx'> 			err = PTR_ERR(flow);</div><div class='ctx'> 			goto add_ecpf_flow_err;</div><div class='ctx'> 		}</div><div class='del'>-		flows[vport-&gt;index] = flow;</div><div class='add'>+		flows[peer_vport-&gt;index] = flow;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx5_esw_for_each_vf_vport(esw, i, vport, mlx5_core_max_vfs(esw-&gt;dev)) {</div><div class='del'>-		esw_set_peer_miss_rule_source_port(esw,</div><div class='del'>-						   peer_dev-&gt;priv.eswitch,</div><div class='del'>-						   spec, vport-&gt;vport);</div><div class='add'>+	if (mlx5_esw_host_functions_enabled(esw-&gt;dev)) {</div><div class='add'>+		mlx5_esw_for_each_vf_vport(peer_esw, i, peer_vport,</div><div class='add'>+					   mlx5_core_max_vfs(peer_dev)) {</div><div class='add'>+			esw_set_peer_miss_rule_source_port(esw, peer_esw,</div><div class='add'>+							   spec,</div><div class='add'>+							   peer_vport-&gt;vport);</div><div class='ctx'> </div><div class='del'>-		flow = mlx5_add_flow_rules(mlx5_eswitch_get_slow_fdb(esw),</div><div class='del'>-					   spec, &amp;flow_act, &amp;dest, 1);</div><div class='del'>-		if (IS_ERR(flow)) {</div><div class='del'>-			err = PTR_ERR(flow);</div><div class='del'>-			goto add_vf_flow_err;</div><div class='add'>+			flow = mlx5_add_flow_rules(mlx5_eswitch_get_slow_fdb(esw),</div><div class='add'>+						   spec, &amp;flow_act, &amp;dest, 1);</div><div class='add'>+			if (IS_ERR(flow)) {</div><div class='add'>+				err = PTR_ERR(flow);</div><div class='add'>+				goto add_vf_flow_err;</div><div class='add'>+			}</div><div class='add'>+			flows[peer_vport-&gt;index] = flow;</div><div class='ctx'> 		}</div><div class='del'>-		flows[vport-&gt;index] = flow;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mlx5_core_ec_sriov_enabled(esw-&gt;dev)) {</div><div class='del'>-		mlx5_esw_for_each_ec_vf_vport(esw, i, vport, mlx5_core_max_ec_vfs(esw-&gt;dev)) {</div><div class='del'>-			if (i &gt;= mlx5_core_max_ec_vfs(peer_dev))</div><div class='del'>-				break;</div><div class='del'>-			esw_set_peer_miss_rule_source_port(esw, peer_dev-&gt;priv.eswitch,</div><div class='del'>-							   spec, vport-&gt;vport);</div><div class='add'>+	if (mlx5_core_ec_sriov_enabled(peer_dev)) {</div><div class='add'>+		mlx5_esw_for_each_ec_vf_vport(peer_esw, i, peer_vport,</div><div class='add'>+					      mlx5_core_max_ec_vfs(peer_dev)) {</div><div class='add'>+			esw_set_peer_miss_rule_source_port(esw, peer_esw,</div><div class='add'>+							   spec,</div><div class='add'>+							   peer_vport-&gt;vport);</div><div class='ctx'> 			flow = mlx5_add_flow_rules(esw-&gt;fdb_table.offloads.slow_fdb,</div><div class='ctx'> 						   spec, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 			if (IS_ERR(flow)) {</div><div class='ctx'> 				err = PTR_ERR(flow);</div><div class='ctx'> 				goto add_ec_vf_flow_err;</div><div class='ctx'> 			}</div><div class='del'>-			flows[vport-&gt;index] = flow;</div><div class='add'>+			flows[peer_vport-&gt;index] = flow;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1284,25 +1286,29 @@ static int esw_add_fdb_peer_miss_rules(struct mlx5_eswitch *esw,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> add_ec_vf_flow_err:</div><div class='del'>-	mlx5_esw_for_each_ec_vf_vport(esw, i, vport, mlx5_core_max_ec_vfs(esw-&gt;dev)) {</div><div class='del'>-		if (!flows[vport-&gt;index])</div><div class='add'>+	mlx5_esw_for_each_ec_vf_vport(peer_esw, i, peer_vport,</div><div class='add'>+				      mlx5_core_max_ec_vfs(peer_dev)) {</div><div class='add'>+		if (!flows[peer_vport-&gt;index])</div><div class='ctx'> 			continue;</div><div class='del'>-		mlx5_del_flow_rules(flows[vport-&gt;index]);</div><div class='add'>+		mlx5_del_flow_rules(flows[peer_vport-&gt;index]);</div><div class='ctx'> 	}</div><div class='ctx'> add_vf_flow_err:</div><div class='del'>-	mlx5_esw_for_each_vf_vport(esw, i, vport, mlx5_core_max_vfs(esw-&gt;dev)) {</div><div class='del'>-		if (!flows[vport-&gt;index])</div><div class='add'>+	mlx5_esw_for_each_vf_vport(peer_esw, i, peer_vport,</div><div class='add'>+				   mlx5_core_max_vfs(peer_dev)) {</div><div class='add'>+		if (!flows[peer_vport-&gt;index])</div><div class='ctx'> 			continue;</div><div class='del'>-		mlx5_del_flow_rules(flows[vport-&gt;index]);</div><div class='add'>+		mlx5_del_flow_rules(flows[peer_vport-&gt;index]);</div><div class='ctx'> 	}</div><div class='del'>-	if (mlx5_ecpf_vport_exists(esw-&gt;dev)) {</div><div class='del'>-		vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_ECPF);</div><div class='del'>-		mlx5_del_flow_rules(flows[vport-&gt;index]);</div><div class='add'>+	if (mlx5_ecpf_vport_exists(peer_dev)) {</div><div class='add'>+		peer_vport = mlx5_eswitch_get_vport(peer_esw, MLX5_VPORT_ECPF);</div><div class='add'>+		mlx5_del_flow_rules(flows[peer_vport-&gt;index]);</div><div class='ctx'> 	}</div><div class='ctx'> add_ecpf_flow_err:</div><div class='del'>-	if (mlx5_core_is_ecpf_esw_manager(esw-&gt;dev)) {</div><div class='del'>-		vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_PF);</div><div class='del'>-		mlx5_del_flow_rules(flows[vport-&gt;index]);</div><div class='add'>+</div><div class='add'>+	if (mlx5_core_is_ecpf_esw_manager(peer_dev) &amp;&amp;</div><div class='add'>+	    mlx5_esw_host_functions_enabled(peer_dev)) {</div><div class='add'>+		peer_vport = mlx5_eswitch_get_vport(peer_esw, MLX5_VPORT_PF);</div><div class='add'>+		mlx5_del_flow_rules(flows[peer_vport-&gt;index]);</div><div class='ctx'> 	}</div><div class='ctx'> add_pf_flow_err:</div><div class='ctx'> 	esw_warn(esw-&gt;dev, "FDB: Failed to add peer miss flow rule err %d\n", err);</div><div class='hunk'>@@ -1315,37 +1321,34 @@ alloc_flows_err:</div><div class='ctx'> static void esw_del_fdb_peer_miss_rules(struct mlx5_eswitch *esw,</div><div class='ctx'> 					struct mlx5_core_dev *peer_dev)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_eswitch *peer_esw = peer_dev-&gt;priv.eswitch;</div><div class='ctx'> 	u16 peer_index = mlx5_get_dev_index(peer_dev);</div><div class='ctx'> 	struct mlx5_flow_handle **flows;</div><div class='del'>-	struct mlx5_vport *vport;</div><div class='add'>+	struct mlx5_vport *peer_vport;</div><div class='ctx'> 	unsigned long i;</div><div class='ctx'> </div><div class='ctx'> 	flows = esw-&gt;fdb_table.offloads.peer_miss_rules[peer_index];</div><div class='ctx'> 	if (!flows)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (mlx5_core_ec_sriov_enabled(esw-&gt;dev)) {</div><div class='del'>-		mlx5_esw_for_each_ec_vf_vport(esw, i, vport, mlx5_core_max_ec_vfs(esw-&gt;dev)) {</div><div class='del'>-			/* The flow for a particular vport could be NULL if the other ECPF</div><div class='del'>-			 * has fewer or no VFs enabled</div><div class='del'>-			 */</div><div class='del'>-			if (!flows[vport-&gt;index])</div><div class='del'>-				continue;</div><div class='del'>-			mlx5_del_flow_rules(flows[vport-&gt;index]);</div><div class='del'>-		}</div><div class='add'>+	if (mlx5_core_ec_sriov_enabled(peer_dev)) {</div><div class='add'>+		mlx5_esw_for_each_ec_vf_vport(peer_esw, i, peer_vport,</div><div class='add'>+					      mlx5_core_max_ec_vfs(peer_dev))</div><div class='add'>+			mlx5_del_flow_rules(flows[peer_vport-&gt;index]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx5_esw_for_each_vf_vport(esw, i, vport, mlx5_core_max_vfs(esw-&gt;dev))</div><div class='del'>-		mlx5_del_flow_rules(flows[vport-&gt;index]);</div><div class='add'>+	mlx5_esw_for_each_vf_vport(peer_esw, i, peer_vport,</div><div class='add'>+				   mlx5_core_max_vfs(peer_dev))</div><div class='add'>+		mlx5_del_flow_rules(flows[peer_vport-&gt;index]);</div><div class='ctx'> </div><div class='del'>-	if (mlx5_ecpf_vport_exists(esw-&gt;dev)) {</div><div class='del'>-		vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_ECPF);</div><div class='del'>-		mlx5_del_flow_rules(flows[vport-&gt;index]);</div><div class='add'>+	if (mlx5_ecpf_vport_exists(peer_dev)) {</div><div class='add'>+		peer_vport = mlx5_eswitch_get_vport(peer_esw, MLX5_VPORT_ECPF);</div><div class='add'>+		mlx5_del_flow_rules(flows[peer_vport-&gt;index]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (mlx5_core_is_ecpf_esw_manager(esw-&gt;dev)) {</div><div class='del'>-		vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_PF);</div><div class='del'>-		mlx5_del_flow_rules(flows[vport-&gt;index]);</div><div class='add'>+	if (mlx5_core_is_ecpf_esw_manager(peer_dev)) {</div><div class='add'>+		peer_vport = mlx5_eswitch_get_vport(peer_esw, MLX5_VPORT_PF);</div><div class='add'>+		mlx5_del_flow_rules(flows[peer_vport-&gt;index]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kvfree(flows);</div><div class='hunk'>@@ -1574,6 +1577,7 @@ esw_chains_create(struct mlx5_eswitch *esw, struct mlx5_flow_table *miss_fdb)</div><div class='ctx'> 	attr.max_grp_num = esw-&gt;params.large_group_num;</div><div class='ctx'> 	attr.default_ft = miss_fdb;</div><div class='ctx'> 	attr.mapping = esw-&gt;offloads.reg_c0_obj_pool;</div><div class='add'>+	attr.fs_base_prio = FDB_BYPASS_PATH;</div><div class='ctx'> </div><div class='ctx'> 	chains = mlx5_chains_create(dev, &amp;attr);</div><div class='ctx'> 	if (IS_ERR(chains)) {</div><div class='hunk'>@@ -1975,7 +1979,6 @@ static void esw_destroy_offloads_fdb_tables(struct mlx5_eswitch *esw)</div><div class='ctx'> 	/* Holds true only as long as DMFS is the default */</div><div class='ctx'> 	mlx5_flow_namespace_set_mode(esw-&gt;fdb_table.offloads.ns,</div><div class='ctx'> 				     MLX5_FLOW_STEERING_MODE_DMFS);</div><div class='del'>-	atomic64_set(&amp;esw-&gt;user_count, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int esw_get_nr_ft_offloads_steering_src_ports(struct mlx5_eswitch *esw)</div><div class='hunk'>@@ -2156,7 +2159,9 @@ mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,</div><div class='ctx'> 	flow_rule = mlx5_add_flow_rules(esw-&gt;offloads.ft_offloads, spec,</div><div class='ctx'> 					&amp;flow_act, dest, 1);</div><div class='ctx'> 	if (IS_ERR(flow_rule)) {</div><div class='del'>-		esw_warn(esw-&gt;dev, "fs offloads: Failed to add vport rx rule err %ld\n", PTR_ERR(flow_rule));</div><div class='add'>+		esw_warn(esw-&gt;dev,</div><div class='add'>+			 "fs offloads: Failed to add vport rx rule err %pe\n",</div><div class='add'>+			 flow_rule);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2175,8 +2180,8 @@ static int esw_create_vport_rx_drop_rule(struct mlx5_eswitch *esw)</div><div class='ctx'> 					&amp;flow_act, NULL, 0);</div><div class='ctx'> 	if (IS_ERR(flow_rule)) {</div><div class='ctx'> 		esw_warn(esw-&gt;dev,</div><div class='del'>-			 "fs offloads: Failed to add vport rx drop rule err %ld\n",</div><div class='del'>-			 PTR_ERR(flow_rule));</div><div class='add'>+			 "fs offloads: Failed to add vport rx drop rule err %pe\n",</div><div class='add'>+			 flow_rule);</div><div class='ctx'> 		return PTR_ERR(flow_rule);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2332,18 +2337,161 @@ out_free:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void esw_mode_change(struct mlx5_eswitch *esw, u16 mode)</div><div class='add'>+{</div><div class='add'>+	mlx5_devcom_comp_lock(esw-&gt;dev-&gt;priv.hca_devcom_comp);</div><div class='add'>+	if (esw-&gt;dev-&gt;priv.flags &amp; MLX5_PRIV_FLAGS_DISABLE_IB_ADEV ||</div><div class='add'>+	    mlx5_core_mp_enabled(esw-&gt;dev)) {</div><div class='add'>+		esw-&gt;mode = mode;</div><div class='add'>+		mlx5_rescan_drivers_locked(esw-&gt;dev);</div><div class='add'>+		mlx5_devcom_comp_unlock(esw-&gt;dev-&gt;priv.hca_devcom_comp);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	esw-&gt;dev-&gt;priv.flags |= MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;</div><div class='add'>+	mlx5_rescan_drivers_locked(esw-&gt;dev);</div><div class='add'>+	esw-&gt;mode = mode;</div><div class='add'>+	esw-&gt;dev-&gt;priv.flags &amp;= ~MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;</div><div class='add'>+	mlx5_rescan_drivers_locked(esw-&gt;dev);</div><div class='add'>+	mlx5_devcom_comp_unlock(esw-&gt;dev-&gt;priv.hca_devcom_comp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_esw_fdb_drop_destroy(struct mlx5_eswitch *esw)</div><div class='add'>+{</div><div class='add'>+	if (!esw-&gt;fdb_table.offloads.drop_root)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	esw_debug(esw-&gt;dev, "Destroying FDB drop root table %#x fc %#x\n",</div><div class='add'>+		  esw-&gt;fdb_table.offloads.drop_root-&gt;id,</div><div class='add'>+		  esw-&gt;fdb_table.offloads.drop_root_fc-&gt;id);</div><div class='add'>+	mlx5_del_flow_rules(esw-&gt;fdb_table.offloads.drop_root_rule);</div><div class='add'>+	/* Don't free flow counter here, can be reused on a later activation */</div><div class='add'>+	mlx5_destroy_flow_table(esw-&gt;fdb_table.offloads.drop_root);</div><div class='add'>+	esw-&gt;fdb_table.offloads.drop_root_rule = NULL;</div><div class='add'>+	esw-&gt;fdb_table.offloads.drop_root = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_esw_fdb_drop_create(struct mlx5_eswitch *esw)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_destination drop_fc_dst = {};</div><div class='add'>+	struct mlx5_flow_table_attr ft_attr = {};</div><div class='add'>+	struct mlx5_flow_destination *dst = NULL;</div><div class='add'>+	struct mlx5_core_dev *dev = esw-&gt;dev;</div><div class='add'>+	struct mlx5_flow_namespace *root_ns;</div><div class='add'>+	struct mlx5_flow_act flow_act = {};</div><div class='add'>+	struct mlx5_flow_handle *flow_rule;</div><div class='add'>+	struct mlx5_flow_table *table;</div><div class='add'>+	int err = 0, dst_num = 0;</div><div class='add'>+</div><div class='add'>+	if (esw-&gt;fdb_table.offloads.drop_root)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	root_ns = esw-&gt;fdb_table.offloads.ns;</div><div class='add'>+</div><div class='add'>+	ft_attr.prio = FDB_DROP_ROOT;</div><div class='add'>+	ft_attr.max_fte = 1;</div><div class='add'>+	ft_attr.autogroup.max_num_groups = 1;</div><div class='add'>+	table = mlx5_create_auto_grouped_flow_table(root_ns, &amp;ft_attr);</div><div class='add'>+	if (IS_ERR(table)) {</div><div class='add'>+		esw_warn(dev, "Failed to create fdb drop root table, err %pe\n",</div><div class='add'>+			 table);</div><div class='add'>+		return PTR_ERR(table);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Drop FC reusable, create once on first deactivation of FDB */</div><div class='add'>+	if (!esw-&gt;fdb_table.offloads.drop_root_fc) {</div><div class='add'>+		struct mlx5_fc *counter = mlx5_fc_create(dev, 0);</div><div class='add'>+</div><div class='add'>+		err = PTR_ERR_OR_ZERO(counter);</div><div class='add'>+		if (err)</div><div class='add'>+			esw_warn(esw-&gt;dev, "create fdb drop fc err %d\n", err);</div><div class='add'>+		else</div><div class='add'>+			esw-&gt;fdb_table.offloads.drop_root_fc = counter;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP;</div><div class='add'>+</div><div class='add'>+	if (esw-&gt;fdb_table.offloads.drop_root_fc) {</div><div class='add'>+		flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='add'>+		drop_fc_dst.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='add'>+		drop_fc_dst.counter = esw-&gt;fdb_table.offloads.drop_root_fc;</div><div class='add'>+		dst = &amp;drop_fc_dst;</div><div class='add'>+		dst_num++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow_rule = mlx5_add_flow_rules(table, NULL, &amp;flow_act, dst, dst_num);</div><div class='add'>+	err = PTR_ERR_OR_ZERO(flow_rule);</div><div class='add'>+	if (err) {</div><div class='add'>+		esw_warn(esw-&gt;dev,</div><div class='add'>+			 "fs offloads: Failed to add vport rx drop rule err %d\n",</div><div class='add'>+			 err);</div><div class='add'>+		goto err_flow_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	esw-&gt;fdb_table.offloads.drop_root = table;</div><div class='add'>+	esw-&gt;fdb_table.offloads.drop_root_rule = flow_rule;</div><div class='add'>+	esw_debug(esw-&gt;dev, "Created FDB drop root table %#x fc %#x\n",</div><div class='add'>+		  table-&gt;id, dst ? dst-&gt;counter-&gt;id : 0);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_flow_rule:</div><div class='add'>+	/* no need to free drop fc, esw_offloads_steering_cleanup will do it */</div><div class='add'>+	mlx5_destroy_flow_table(table);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_esw_fdb_active(struct mlx5_eswitch *esw)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_vport *vport;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	mlx5_esw_fdb_drop_destroy(esw);</div><div class='add'>+	mlx5_mpfs_enable(esw-&gt;dev);</div><div class='add'>+</div><div class='add'>+	mlx5_esw_for_each_vf_vport(esw, i, vport, U16_MAX) {</div><div class='add'>+		if (!vport-&gt;adjacent)</div><div class='add'>+			continue;</div><div class='add'>+		esw_debug(esw-&gt;dev, "Connecting vport %d to eswitch\n",</div><div class='add'>+			  vport-&gt;vport);</div><div class='add'>+		mlx5_esw_adj_vport_modify(esw-&gt;dev, vport-&gt;vport, true);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	esw-&gt;offloads_inactive = false;</div><div class='add'>+	esw_warn(esw-&gt;dev, "MPFS/FDB active\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_esw_fdb_inactive(struct mlx5_eswitch *esw)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_vport *vport;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	mlx5_mpfs_disable(esw-&gt;dev);</div><div class='add'>+	mlx5_esw_fdb_drop_create(esw);</div><div class='add'>+</div><div class='add'>+	mlx5_esw_for_each_vf_vport(esw, i, vport, U16_MAX) {</div><div class='add'>+		if (!vport-&gt;adjacent)</div><div class='add'>+			continue;</div><div class='add'>+		esw_debug(esw-&gt;dev, "Disconnecting vport %u from eswitch\n",</div><div class='add'>+			  vport-&gt;vport);</div><div class='add'>+</div><div class='add'>+		mlx5_esw_adj_vport_modify(esw-&gt;dev, vport-&gt;vport, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	esw-&gt;offloads_inactive = true;</div><div class='add'>+	esw_warn(esw-&gt;dev, "MPFS/FDB inactive\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int esw_offloads_start(struct mlx5_eswitch *esw,</div><div class='ctx'> 			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	esw-&gt;mode = MLX5_ESWITCH_OFFLOADS;</div><div class='add'>+	esw_mode_change(esw, MLX5_ESWITCH_OFFLOADS);</div><div class='ctx'> 	err = mlx5_eswitch_enable_locked(esw, esw-&gt;dev-&gt;priv.sriov.num_vfs);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack,</div><div class='ctx'> 				   "Failed setting eswitch to offloads");</div><div class='del'>-		esw-&gt;mode = MLX5_ESWITCH_LEGACY;</div><div class='del'>-		mlx5_rescan_drivers(esw-&gt;dev);</div><div class='add'>+		esw_mode_change(esw, MLX5_ESWITCH_LEGACY);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (esw-&gt;offloads.inline_mode == MLX5_INLINE_MODE_NONE) {</div><div class='hunk'>@@ -2357,7 +2505,20 @@ static int esw_offloads_start(struct mlx5_eswitch *esw,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5_esw_offloads_rep_init(struct mlx5_eswitch *esw, const struct mlx5_vport *vport)</div><div class='add'>+void mlx5_esw_offloads_rep_remove(struct mlx5_eswitch *esw,</div><div class='add'>+				  const struct mlx5_vport *vport)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_eswitch_rep *rep = xa_load(&amp;esw-&gt;offloads.vport_reps,</div><div class='add'>+					       vport-&gt;vport);</div><div class='add'>+</div><div class='add'>+	if (!rep)</div><div class='add'>+		return;</div><div class='add'>+	xa_erase(&amp;esw-&gt;offloads.vport_reps, vport-&gt;vport);</div><div class='add'>+	kfree(rep);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_esw_offloads_rep_add(struct mlx5_eswitch *esw,</div><div class='add'>+			      const struct mlx5_vport *vport)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_eswitch_rep *rep;</div><div class='ctx'> 	int rep_type;</div><div class='hunk'>@@ -2369,9 +2530,19 @@ static int mlx5_esw_offloads_rep_init(struct mlx5_eswitch *esw, const struct mlx</div><div class='ctx'> </div><div class='ctx'> 	rep-&gt;vport = vport-&gt;vport;</div><div class='ctx'> 	rep-&gt;vport_index = vport-&gt;index;</div><div class='del'>-	for (rep_type = 0; rep_type &lt; NUM_REP_TYPES; rep_type++)</div><div class='del'>-		atomic_set(&amp;rep-&gt;rep_data[rep_type].state, REP_UNREGISTERED);</div><div class='del'>-</div><div class='add'>+	for (rep_type = 0; rep_type &lt; NUM_REP_TYPES; rep_type++) {</div><div class='add'>+		if (!esw-&gt;offloads.rep_ops[rep_type]) {</div><div class='add'>+			atomic_set(&amp;rep-&gt;rep_data[rep_type].state,</div><div class='add'>+				   REP_UNREGISTERED);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		/* Dynamic/delegated vports add their representors after</div><div class='add'>+		 * mlx5_eswitch_register_vport_reps, so mark them as registered</div><div class='add'>+		 * for them to be loaded later with the others.</div><div class='add'>+		 */</div><div class='add'>+		rep-&gt;esw = esw;</div><div class='add'>+		atomic_set(&amp;rep-&gt;rep_data[rep_type].state, REP_REGISTERED);</div><div class='add'>+	}</div><div class='ctx'> 	err = xa_insert(&amp;esw-&gt;offloads.vport_reps, rep-&gt;vport, rep, GFP_KERNEL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto insert_err;</div><div class='hunk'>@@ -2409,7 +2580,7 @@ static int esw_offloads_init_reps(struct mlx5_eswitch *esw)</div><div class='ctx'> 	xa_init(&amp;esw-&gt;offloads.vport_reps);</div><div class='ctx'> </div><div class='ctx'> 	mlx5_esw_for_each_vport(esw, i, vport) {</div><div class='del'>-		err = mlx5_esw_offloads_rep_init(esw, vport);</div><div class='add'>+		err = mlx5_esw_offloads_rep_add(esw, vport);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2447,7 +2618,8 @@ done:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int esw_port_metadata_get(struct devlink *devlink, u32 id,</div><div class='del'>-				 struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				 struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='ctx'> </div><div class='hunk'>@@ -2527,8 +2699,11 @@ static void __esw_offloads_unload_rep(struct mlx5_eswitch *esw,</div><div class='ctx'> 				      struct mlx5_eswitch_rep *rep, u8 rep_type)</div><div class='ctx'> {</div><div class='ctx'> 	if (atomic_cmpxchg(&amp;rep-&gt;rep_data[rep_type].state,</div><div class='del'>-			   REP_LOADED, REP_REGISTERED) == REP_LOADED)</div><div class='add'>+			   REP_LOADED, REP_REGISTERED) == REP_LOADED) {</div><div class='add'>+		if (rep_type == REP_ETH)</div><div class='add'>+			__esw_offloads_unload_rep(esw, rep, REP_IB);</div><div class='ctx'> 		esw-&gt;offloads.rep_ops[rep_type]-&gt;unload(rep);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __unload_reps_all_vport(struct mlx5_eswitch *esw, u8 rep_type)</div><div class='hunk'>@@ -2810,9 +2985,9 @@ static int esw_set_master_egress_rule(struct mlx5_core_dev *master,</div><div class='ctx'> 	if (IS_ERR(vport))</div><div class='ctx'> 		return PTR_ERR(vport);</div><div class='ctx'> </div><div class='del'>-	egress_ns = mlx5_get_flow_vport_acl_namespace(master,</div><div class='del'>-						      MLX5_FLOW_NAMESPACE_ESW_EGRESS,</div><div class='del'>-						      vport-&gt;index);</div><div class='add'>+	egress_ns = mlx5_get_flow_vport_namespace(master,</div><div class='add'>+						  MLX5_FLOW_NAMESPACE_ESW_EGRESS,</div><div class='add'>+						  vport-&gt;index);</div><div class='ctx'> 	if (!egress_ns)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -3057,7 +3232,8 @@ err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, u64 key)</div><div class='add'>+void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw,</div><div class='add'>+				   const struct mlx5_devcom_match_attr *attr)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -3076,10 +3252,10 @@ void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, u64 key)</div><div class='ctx'> 	esw-&gt;num_peers = 0;</div><div class='ctx'> 	esw-&gt;devcom = mlx5_devcom_register_component(esw-&gt;dev-&gt;priv.devc,</div><div class='ctx'> 						     MLX5_DEVCOM_ESW_OFFLOADS,</div><div class='del'>-						     key,</div><div class='add'>+						     attr,</div><div class='ctx'> 						     mlx5_esw_offloads_devcom_event,</div><div class='ctx'> 						     esw);</div><div class='del'>-	if (IS_ERR(esw-&gt;devcom))</div><div class='add'>+	if (!esw-&gt;devcom)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mlx5_devcom_send_event(esw-&gt;devcom,</div><div class='hunk'>@@ -3090,7 +3266,7 @@ void mlx5_esw_offloads_devcom_init(struct mlx5_eswitch *esw, u64 key)</div><div class='ctx'> </div><div class='ctx'> void mlx5_esw_offloads_devcom_cleanup(struct mlx5_eswitch *esw)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ERR_OR_NULL(esw-&gt;devcom))</div><div class='add'>+	if (!esw-&gt;devcom)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mlx5_devcom_send_event(esw-&gt;devcom,</div><div class='hunk'>@@ -3389,6 +3565,10 @@ create_indir_err:</div><div class='ctx'> </div><div class='ctx'> static void esw_offloads_steering_cleanup(struct mlx5_eswitch *esw)</div><div class='ctx'> {</div><div class='add'>+	mlx5_esw_fdb_drop_destroy(esw);</div><div class='add'>+	if (esw-&gt;fdb_table.offloads.drop_root_fc)</div><div class='add'>+		mlx5_fc_destroy(esw-&gt;dev, esw-&gt;fdb_table.offloads.drop_root_fc);</div><div class='add'>+	esw-&gt;fdb_table.offloads.drop_root_fc = NULL;</div><div class='ctx'> 	esw_destroy_vport_rx_drop_rule(esw);</div><div class='ctx'> 	esw_destroy_vport_rx_drop_group(esw);</div><div class='ctx'> 	esw_destroy_vport_rx_group(esw);</div><div class='hunk'>@@ -3507,14 +3687,19 @@ bool mlx5_esw_offloads_controller_valid(const struct mlx5_eswitch *esw, u32 cont</div><div class='ctx'> </div><div class='ctx'> int esw_offloads_enable(struct mlx5_eswitch *esw)</div><div class='ctx'> {</div><div class='add'>+	u8 mapping_id[MLX5_SW_IMAGE_GUID_MAX_BYTES];</div><div class='ctx'> 	struct mapping_ctx *reg_c0_obj_pool;</div><div class='ctx'> 	struct mlx5_vport *vport;</div><div class='ctx'> 	unsigned long i;</div><div class='del'>-	u64 mapping_id;</div><div class='add'>+	u8 id_len;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;esw-&gt;offloads.termtbl_mutex);</div><div class='del'>-	mlx5_rdma_enable_roce(esw-&gt;dev);</div><div class='add'>+	mlx5_esw_adjacent_vhcas_setup(esw);</div><div class='add'>+</div><div class='add'>+	err = mlx5_rdma_enable_roce(esw-&gt;dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_roce;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_esw_host_number_init(esw);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -3528,9 +3713,10 @@ int esw_offloads_enable(struct mlx5_eswitch *esw)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_vport_metadata;</div><div class='ctx'> </div><div class='del'>-	mapping_id = mlx5_query_nic_system_image_guid(esw-&gt;dev);</div><div class='add'>+	mlx5_query_nic_sw_system_image_guid(esw-&gt;dev, mapping_id, &amp;id_len);</div><div class='ctx'> </div><div class='del'>-	reg_c0_obj_pool = mapping_create_for_id(mapping_id, MAPPING_TYPE_CHAIN,</div><div class='add'>+	reg_c0_obj_pool = mapping_create_for_id(mapping_id, id_len,</div><div class='add'>+						MAPPING_TYPE_CHAIN,</div><div class='ctx'> 						sizeof(struct mlx5_mapped_obj),</div><div class='ctx'> 						ESW_REG_C0_USER_DATA_METADATA_MASK,</div><div class='ctx'> 						true);</div><div class='hunk'>@@ -3545,6 +3731,11 @@ int esw_offloads_enable(struct mlx5_eswitch *esw)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_steering_init;</div><div class='ctx'> </div><div class='add'>+	if (esw-&gt;offloads_inactive)</div><div class='add'>+		mlx5_esw_fdb_inactive(esw);</div><div class='add'>+	else</div><div class='add'>+		mlx5_esw_fdb_active(esw);</div><div class='add'>+</div><div class='ctx'> 	/* Representor will control the vport link state */</div><div class='ctx'> 	mlx5_esw_for_each_vf_vport(esw, i, vport, esw-&gt;esw_funcs.num_vfs)</div><div class='ctx'> 		vport-&gt;info.link_state = MLX5_VPORT_ADMIN_STATE_DOWN;</div><div class='hunk'>@@ -3575,6 +3766,8 @@ err_vport_metadata:</div><div class='ctx'> 	esw_offloads_metadata_uninit(esw);</div><div class='ctx'> err_metadata:</div><div class='ctx'> 	mlx5_rdma_disable_roce(esw-&gt;dev);</div><div class='add'>+err_roce:</div><div class='add'>+	mlx5_esw_adjacent_vhcas_cleanup(esw);</div><div class='ctx'> 	mutex_destroy(&amp;esw-&gt;offloads.termtbl_mutex);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -3584,7 +3777,7 @@ static int esw_offloads_stop(struct mlx5_eswitch *esw,</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	esw-&gt;mode = MLX5_ESWITCH_LEGACY;</div><div class='add'>+	esw_mode_change(esw, MLX5_ESWITCH_LEGACY);</div><div class='ctx'> </div><div class='ctx'> 	/* If changing from switchdev to legacy mode without sriov enabled,</div><div class='ctx'> 	 * no need to create legacy fdb.</div><div class='hunk'>@@ -3608,6 +3801,10 @@ void esw_offloads_disable(struct mlx5_eswitch *esw)</div><div class='ctx'> 	mapping_destroy(esw-&gt;offloads.reg_c0_obj_pool);</div><div class='ctx'> 	esw_offloads_metadata_uninit(esw);</div><div class='ctx'> 	mlx5_rdma_disable_roce(esw-&gt;dev);</div><div class='add'>+	mlx5_esw_adjacent_vhcas_cleanup(esw);</div><div class='add'>+	/* must be done after vhcas cleanup to avoid adjacent vports connect */</div><div class='add'>+	if (esw-&gt;offloads_inactive)</div><div class='add'>+		mlx5_esw_fdb_active(esw); /* legacy mode always active */</div><div class='ctx'> 	mutex_destroy(&amp;esw-&gt;offloads.termtbl_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3618,6 +3815,7 @@ static int esw_mode_from_devlink(u16 mode, u16 *mlx5_mode)</div><div class='ctx'> 		*mlx5_mode = MLX5_ESWITCH_LEGACY;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DEVLINK_ESWITCH_MODE_SWITCHDEV:</div><div class='add'>+	case DEVLINK_ESWITCH_MODE_SWITCHDEV_INACTIVE:</div><div class='ctx'> 		*mlx5_mode = MLX5_ESWITCH_OFFLOADS;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -3627,14 +3825,17 @@ static int esw_mode_from_devlink(u16 mode, u16 *mlx5_mode)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int esw_mode_to_devlink(u16 mlx5_mode, u16 *mode)</div><div class='add'>+static int esw_mode_to_devlink(struct mlx5_eswitch *esw, u16 *mode)</div><div class='ctx'> {</div><div class='del'>-	switch (mlx5_mode) {</div><div class='add'>+	switch (esw-&gt;mode) {</div><div class='ctx'> 	case MLX5_ESWITCH_LEGACY:</div><div class='ctx'> 		*mode = DEVLINK_ESWITCH_MODE_LEGACY;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5_ESWITCH_OFFLOADS:</div><div class='del'>-		*mode = DEVLINK_ESWITCH_MODE_SWITCHDEV;</div><div class='add'>+		if (esw-&gt;offloads_inactive)</div><div class='add'>+			*mode = DEVLINK_ESWITCH_MODE_SWITCHDEV_INACTIVE;</div><div class='add'>+		else</div><div class='add'>+			*mode = DEVLINK_ESWITCH_MODE_SWITCHDEV;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -3717,6 +3918,68 @@ void mlx5_eswitch_unblock_mode(struct mlx5_core_dev *dev)</div><div class='ctx'> 	up_write(&amp;esw-&gt;mode_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Returns false only when uplink netdev exists and its netns is different from</div><div class='add'>+ * devlink's netns. True for all others so entering switchdev mode is allowed.</div><div class='add'>+ */</div><div class='add'>+static bool mlx5_devlink_netdev_netns_immutable_set(struct devlink *devlink,</div><div class='add'>+						    bool immutable)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *mdev = devlink_priv(devlink);</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	bool ret;</div><div class='add'>+</div><div class='add'>+	netdev = mlx5_uplink_netdev_get(mdev);</div><div class='add'>+	if (!netdev)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	netdev-&gt;netns_immutable = immutable;</div><div class='add'>+	ret = net_eq(dev_net(netdev), devlink_net(devlink));</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	mlx5_uplink_netdev_put(mdev, netdev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Returns true when only changing between active and inactive switchdev mode */</div><div class='add'>+static bool mlx5_devlink_switchdev_active_mode_change(struct mlx5_eswitch *esw,</div><div class='add'>+						      u16 devlink_mode)</div><div class='add'>+{</div><div class='add'>+	/* current mode is not switchdev */</div><div class='add'>+	if (esw-&gt;mode != MLX5_ESWITCH_OFFLOADS)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* new mode is not switchdev */</div><div class='add'>+	if (devlink_mode != DEVLINK_ESWITCH_MODE_SWITCHDEV &amp;&amp;</div><div class='add'>+	    devlink_mode != DEVLINK_ESWITCH_MODE_SWITCHDEV_INACTIVE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* already inactive: no change in current state */</div><div class='add'>+	if (devlink_mode == DEVLINK_ESWITCH_MODE_SWITCHDEV_INACTIVE &amp;&amp;</div><div class='add'>+	    esw-&gt;offloads_inactive)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* already active: no change in current state */</div><div class='add'>+	if (devlink_mode == DEVLINK_ESWITCH_MODE_SWITCHDEV &amp;&amp;</div><div class='add'>+	    !esw-&gt;offloads_inactive)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	down_write(&amp;esw-&gt;mode_lock);</div><div class='add'>+	esw-&gt;offloads_inactive = !esw-&gt;offloads_inactive;</div><div class='add'>+	esw-&gt;eswitch_operation_in_progress = true;</div><div class='add'>+	up_write(&amp;esw-&gt;mode_lock);</div><div class='add'>+</div><div class='add'>+	if (esw-&gt;offloads_inactive)</div><div class='add'>+		mlx5_esw_fdb_inactive(esw);</div><div class='add'>+	else</div><div class='add'>+		mlx5_esw_fdb_active(esw);</div><div class='add'>+</div><div class='add'>+	down_write(&amp;esw-&gt;mode_lock);</div><div class='add'>+	esw-&gt;eswitch_operation_in_progress = false;</div><div class='add'>+	up_write(&amp;esw-&gt;mode_lock);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,</div><div class='ctx'> 				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='hunk'>@@ -3731,12 +3994,16 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,</div><div class='ctx'> 	if (esw_mode_from_devlink(mode, &amp;mlx5_mode))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (mode == DEVLINK_ESWITCH_MODE_SWITCHDEV &amp;&amp; mlx5_get_sd(esw-&gt;dev)) {</div><div class='add'>+	if (mlx5_mode == MLX5_ESWITCH_OFFLOADS &amp;&amp; mlx5_get_sd(esw-&gt;dev)) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack,</div><div class='ctx'> 				   "Can't change E-Switch mode to switchdev when multi-PF netdev (Socket Direct) is configured.");</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Avoid try_lock, active/inactive mode change is not restricted */</div><div class='add'>+	if (mlx5_devlink_switchdev_active_mode_change(esw, mode))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	mlx5_lag_disable_change(esw-&gt;dev);</div><div class='ctx'> 	err = mlx5_esw_try_lock(esw);</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='hunk'>@@ -3759,23 +4026,36 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,</div><div class='ctx'> 	esw-&gt;eswitch_operation_in_progress = true;</div><div class='ctx'> 	up_write(&amp;esw-&gt;mode_lock);</div><div class='ctx'> </div><div class='add'>+	if (mlx5_mode == MLX5_ESWITCH_OFFLOADS &amp;&amp;</div><div class='add'>+	    !mlx5_devlink_netdev_netns_immutable_set(devlink, true)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Can't change E-Switch mode to switchdev when netdev net namespace has diverged from the devlink's.");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto skip;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mlx5_mode == MLX5_ESWITCH_LEGACY)</div><div class='add'>+		esw-&gt;dev-&gt;priv.flags |= MLX5_PRIV_FLAGS_SWITCH_LEGACY;</div><div class='ctx'> 	mlx5_eswitch_disable_locked(esw);</div><div class='del'>-	if (mode == DEVLINK_ESWITCH_MODE_SWITCHDEV) {</div><div class='add'>+	if (mlx5_mode == MLX5_ESWITCH_OFFLOADS) {</div><div class='ctx'> 		if (mlx5_devlink_trap_get_num_active(esw-&gt;dev)) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack,</div><div class='ctx'> 					   "Can't change mode while devlink traps are active");</div><div class='ctx'> 			err = -EOPNOTSUPP;</div><div class='ctx'> 			goto skip;</div><div class='ctx'> 		}</div><div class='add'>+		esw-&gt;offloads_inactive =</div><div class='add'>+			(mode == DEVLINK_ESWITCH_MODE_SWITCHDEV_INACTIVE);</div><div class='ctx'> 		err = esw_offloads_start(esw, extack);</div><div class='del'>-	} else if (mode == DEVLINK_ESWITCH_MODE_LEGACY) {</div><div class='add'>+	} else if (mlx5_mode == MLX5_ESWITCH_LEGACY) {</div><div class='ctx'> 		err = esw_offloads_stop(esw, extack);</div><div class='del'>-		mlx5_rescan_drivers(esw-&gt;dev);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> skip:</div><div class='add'>+	if (mlx5_mode == MLX5_ESWITCH_OFFLOADS &amp;&amp; err)</div><div class='add'>+		mlx5_devlink_netdev_netns_immutable_set(devlink, false);</div><div class='ctx'> 	down_write(&amp;esw-&gt;mode_lock);</div><div class='ctx'> 	esw-&gt;eswitch_operation_in_progress = false;</div><div class='ctx'> unlock:</div><div class='hunk'>@@ -3793,7 +4073,7 @@ int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode)</div><div class='ctx'> 	if (IS_ERR(esw))</div><div class='ctx'> 		return PTR_ERR(esw);</div><div class='ctx'> </div><div class='del'>-	return esw_mode_to_devlink(esw-&gt;mode, mode);</div><div class='add'>+	return esw_mode_to_devlink(esw, mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_esw_vports_inline_set(struct mlx5_eswitch *esw, u8 mlx5_mode,</div><div class='hunk'>@@ -3915,23 +4195,25 @@ int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode)</div><div class='ctx'> 	return esw_inline_mode_to_devlink(esw-&gt;offloads.inline_mode, mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev)</div><div class='add'>+bool mlx5_eswitch_block_encap(struct mlx5_core_dev *dev, bool from_fdb)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_eswitch *esw = dev-&gt;priv.eswitch;</div><div class='add'>+	enum devlink_eswitch_encap_mode encap;</div><div class='add'>+	bool allow_tunnel = false;</div><div class='ctx'> </div><div class='ctx'> 	if (!mlx5_esw_allowed(esw))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	down_write(&amp;esw-&gt;mode_lock);</div><div class='del'>-	if (esw-&gt;mode != MLX5_ESWITCH_LEGACY &amp;&amp;</div><div class='del'>-	    esw-&gt;offloads.encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE) {</div><div class='del'>-		up_write(&amp;esw-&gt;mode_lock);</div><div class='del'>-		return false;</div><div class='add'>+	encap = esw-&gt;offloads.encap;</div><div class='add'>+	if (esw-&gt;mode == MLX5_ESWITCH_LEGACY ||</div><div class='add'>+	    (encap == DEVLINK_ESWITCH_ENCAP_MODE_NONE &amp;&amp; !from_fdb)) {</div><div class='add'>+		allow_tunnel = true;</div><div class='add'>+		esw-&gt;offloads.num_block_encap++;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	esw-&gt;offloads.num_block_encap++;</div><div class='ctx'> 	up_write(&amp;esw-&gt;mode_lock);</div><div class='del'>-	return true;</div><div class='add'>+</div><div class='add'>+	return allow_tunnel;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_eswitch_unblock_encap(struct mlx5_core_dev *dev)</div><div class='hunk'>@@ -4036,7 +4318,8 @@ mlx5_eswitch_vport_has_rep(const struct mlx5_eswitch *esw, u16 vport_num)</div><div class='ctx'> {</div><div class='ctx'> 	/* Currently, only ECPF based device has representor for host PF. */</div><div class='ctx'> 	if (vport_num == MLX5_VPORT_PF &amp;&amp;</div><div class='del'>-	    !mlx5_core_is_ecpf_esw_manager(esw-&gt;dev))</div><div class='add'>+	    (!mlx5_core_is_ecpf_esw_manager(esw-&gt;dev) ||</div><div class='add'>+	     !mlx5_esw_host_functions_enabled(esw-&gt;dev)))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (vport_num == MLX5_VPORT_ECPF &amp;&amp;</div><div class='hunk'>@@ -4138,48 +4421,28 @@ u32 mlx5_eswitch_get_vport_metadata_for_match(struct mlx5_eswitch *esw,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mlx5_eswitch_get_vport_metadata_for_match);</div><div class='ctx'> </div><div class='del'>-static int mlx5_esw_query_vport_vhca_id(struct mlx5_eswitch *esw, u16 vport_num, u16 *vhca_id)</div><div class='del'>-{</div><div class='del'>-	int query_out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out);</div><div class='del'>-	void *query_ctx;</div><div class='del'>-	void *hca_caps;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	*vhca_id = 0;</div><div class='del'>-</div><div class='del'>-	query_ctx = kzalloc(query_out_sz, GFP_KERNEL);</div><div class='del'>-	if (!query_ctx)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	err = mlx5_vport_get_other_func_general_cap(esw-&gt;dev, vport_num, query_ctx);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_free;</div><div class='del'>-</div><div class='del'>-	hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);</div><div class='del'>-	*vhca_id = MLX5_GET(cmd_hca_cap, hca_caps, vhca_id);</div><div class='del'>-</div><div class='del'>-out_free:</div><div class='del'>-	kfree(query_ctx);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mlx5_esw_vport_vhca_id_set(struct mlx5_eswitch *esw, u16 vport_num)</div><div class='add'>+int mlx5_esw_vport_vhca_id_map(struct mlx5_eswitch *esw,</div><div class='add'>+			       struct mlx5_vport *vport)</div><div class='ctx'> {</div><div class='ctx'> 	u16 *old_entry, *vhca_map_entry, vhca_id;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_esw_query_vport_vhca_id(esw, vport_num, &amp;vhca_id);</div><div class='del'>-	if (err) {</div><div class='del'>-		esw_warn(esw-&gt;dev, "Getting vhca_id for vport failed (vport=%u,err=%d)\n",</div><div class='del'>-			 vport_num, err);</div><div class='del'>-		return err;</div><div class='add'>+	if (WARN_ONCE(MLX5_VPORT_INVAL_VHCA_ID(vport),</div><div class='add'>+		      "vport %d vhca_id is not set", vport-&gt;vport)) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = mlx5_vport_get_vhca_id(vport-&gt;dev, vport-&gt;vport,</div><div class='add'>+					     &amp;vhca_id);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		vport-&gt;vhca_id = vhca_id;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	vhca_id = vport-&gt;vhca_id;</div><div class='ctx'> 	vhca_map_entry = kmalloc(sizeof(*vhca_map_entry), GFP_KERNEL);</div><div class='ctx'> 	if (!vhca_map_entry)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	*vhca_map_entry = vport_num;</div><div class='add'>+	*vhca_map_entry = vport-&gt;vport;</div><div class='ctx'> 	old_entry = xa_store(&amp;esw-&gt;offloads.vhca_map, vhca_id, vhca_map_entry, GFP_KERNEL);</div><div class='ctx'> 	if (xa_is_err(old_entry)) {</div><div class='ctx'> 		kfree(vhca_map_entry);</div><div class='hunk'>@@ -4189,17 +4452,12 @@ int mlx5_esw_vport_vhca_id_set(struct mlx5_eswitch *esw, u16 vport_num)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5_esw_vport_vhca_id_clear(struct mlx5_eswitch *esw, u16 vport_num)</div><div class='add'>+void mlx5_esw_vport_vhca_id_unmap(struct mlx5_eswitch *esw,</div><div class='add'>+				  struct mlx5_vport *vport)</div><div class='ctx'> {</div><div class='del'>-	u16 *vhca_map_entry, vhca_id;</div><div class='del'>-	int err;</div><div class='add'>+	u16 *vhca_map_entry;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_esw_query_vport_vhca_id(esw, vport_num, &amp;vhca_id);</div><div class='del'>-	if (err)</div><div class='del'>-		esw_warn(esw-&gt;dev, "Getting vhca_id for vport failed (vport=%hu,err=%d)\n",</div><div class='del'>-			 vport_num, err);</div><div class='del'>-</div><div class='del'>-	vhca_map_entry = xa_erase(&amp;esw-&gt;offloads.vhca_map, vhca_id);</div><div class='add'>+	vhca_map_entry = xa_erase(&amp;esw-&gt;offloads.vhca_map, vport-&gt;vhca_id);</div><div class='ctx'> 	kfree(vhca_map_entry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4234,6 +4492,9 @@ int mlx5_devlink_port_fn_hw_addr_get(struct devlink_port *port,</div><div class='ctx'> 	struct mlx5_vport *vport = mlx5_devlink_port_vport_get(port);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;esw-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	mlx5_query_nic_vport_mac_address(esw-&gt;dev, vport-&gt;vport, true,</div><div class='add'>+					 vport-&gt;info.mac);</div><div class='ctx'> 	ether_addr_copy(hw_addr, vport-&gt;info.mac);</div><div class='ctx'> 	*hw_addr_len = ETH_ALEN;</div><div class='ctx'> 	mutex_unlock(&amp;esw-&gt;state_lock);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/events.c b/drivers/net/ethernet/mellanox/mlx5/core/events.c<br/>index d91ea53eb394..01c5f5990f9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/events.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/events.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/events.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/events.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include "mlx5_core.h"</div><div class='ctx'> #include "lib/eq.h"</div><div class='ctx'> #include "lib/events.h"</div><div class='add'>+#include "hwmon.h"</div><div class='ctx'> </div><div class='ctx'> struct mlx5_event_nb {</div><div class='ctx'> 	struct mlx5_nb  nb;</div><div class='hunk'>@@ -153,21 +154,50 @@ static int any_notifier(struct notifier_block *nb,</div><div class='ctx'> 	return NOTIFY_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_HWMON)</div><div class='add'>+static void print_sensor_names_in_bit_set(struct mlx5_core_dev *dev, struct mlx5_hwmon *hwmon,</div><div class='add'>+					  u64 bit_set, int bit_set_offset)</div><div class='add'>+{</div><div class='add'>+	unsigned long *bit_set_ptr = (unsigned long *)&amp;bit_set;</div><div class='add'>+	int num_bits = sizeof(bit_set) * BITS_PER_BYTE;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(i, bit_set_ptr, num_bits) {</div><div class='add'>+		const char *sensor_name = hwmon_get_sensor_name(hwmon, i + bit_set_offset);</div><div class='add'>+</div><div class='add'>+		mlx5_core_warn(dev, "Sensor name[%d]: %s\n", i + bit_set_offset, sensor_name);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_HWMON */</div><div class='add'>+</div><div class='ctx'> /* type == MLX5_EVENT_TYPE_TEMP_WARN_EVENT */</div><div class='ctx'> static int temp_warn(struct notifier_block *nb, unsigned long type, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_event_nb *event_nb = mlx5_nb_cof(nb, struct mlx5_event_nb, nb);</div><div class='ctx'> 	struct mlx5_events   *events   = event_nb-&gt;ctx;</div><div class='add'>+	struct mlx5_core_dev *dev      = events-&gt;dev;</div><div class='ctx'> 	struct mlx5_eqe      *eqe      = data;</div><div class='ctx'> 	u64 value_lsb;</div><div class='ctx'> 	u64 value_msb;</div><div class='ctx'> </div><div class='ctx'> 	value_lsb = be64_to_cpu(eqe-&gt;data.temp_warning.sensor_warning_lsb);</div><div class='add'>+	/* bit 1-63 are not supported for NICs,</div><div class='add'>+	 * hence read only bit 0 (asic) from lsb.</div><div class='add'>+	 */</div><div class='add'>+	value_lsb &amp;= 0x1;</div><div class='ctx'> 	value_msb = be64_to_cpu(eqe-&gt;data.temp_warning.sensor_warning_msb);</div><div class='ctx'> </div><div class='del'>-	mlx5_core_warn(events-&gt;dev,</div><div class='del'>-		       "High temperature on sensors with bit set %llx %llx",</div><div class='del'>-		       value_msb, value_lsb);</div><div class='add'>+	if (net_ratelimit()) {</div><div class='add'>+		mlx5_core_warn(dev, "High temperature on sensors with bit set %#llx %#llx.\n",</div><div class='add'>+			       value_msb, value_lsb);</div><div class='add'>+#if IS_ENABLED(CONFIG_HWMON)</div><div class='add'>+		if (dev-&gt;hwmon) {</div><div class='add'>+			print_sensor_names_in_bit_set(dev, dev-&gt;hwmon, value_lsb, 0);</div><div class='add'>+			print_sensor_names_in_bit_set(dev, dev-&gt;hwmon, value_msb,</div><div class='add'>+						      sizeof(value_lsb) * BITS_PER_BYTE);</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return NOTIFY_OK;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c b/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c<br/>index c4de6bf8d1b6..ccef64fb40b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c</a></div><div class='hunk'>@@ -421,6 +421,13 @@ static int mlx5_fpga_conn_create_cq(struct mlx5_fpga_conn *conn, int cq_size)</div><div class='ctx'> 	__be64 *pas;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='add'>+	conn-&gt;cq.mcq.cqe_sz     = 64;</div><div class='add'>+	conn-&gt;cq.mcq.set_ci_db  = conn-&gt;cq.wq_ctrl.db.db;</div><div class='add'>+	conn-&gt;cq.mcq.arm_db     = conn-&gt;cq.wq_ctrl.db.db + 1;</div><div class='add'>+	*conn-&gt;cq.mcq.set_ci_db = 0;</div><div class='add'>+	conn-&gt;cq.mcq.vector     = 0;</div><div class='add'>+	conn-&gt;cq.mcq.comp       = mlx5_fpga_conn_cq_complete;</div><div class='add'>+</div><div class='ctx'> 	cq_size = roundup_pow_of_two(cq_size);</div><div class='ctx'> 	MLX5_SET(cqc, temp_cqc, log_cq_size, ilog2(cq_size));</div><div class='ctx'> </div><div class='hunk'>@@ -468,16 +475,7 @@ static int mlx5_fpga_conn_create_cq(struct mlx5_fpga_conn *conn, int cq_size)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_cqwq;</div><div class='ctx'> </div><div class='del'>-	conn-&gt;cq.mcq.cqe_sz     = 64;</div><div class='del'>-	conn-&gt;cq.mcq.set_ci_db  = conn-&gt;cq.wq_ctrl.db.db;</div><div class='del'>-	conn-&gt;cq.mcq.arm_db     = conn-&gt;cq.wq_ctrl.db.db + 1;</div><div class='del'>-	*conn-&gt;cq.mcq.set_ci_db = 0;</div><div class='del'>-	*conn-&gt;cq.mcq.arm_db    = 0;</div><div class='del'>-	conn-&gt;cq.mcq.vector     = 0;</div><div class='del'>-	conn-&gt;cq.mcq.comp       = mlx5_fpga_conn_cq_complete;</div><div class='del'>-	conn-&gt;cq.mcq.uar        = fdev-&gt;conn_res.uar;</div><div class='ctx'> 	tasklet_setup(&amp;conn-&gt;cq.tasklet, mlx5_fpga_conn_cq_tasklet);</div><div class='del'>-</div><div class='ctx'> 	mlx5_fpga_dbg(fdev, "Created CQ #0x%x\n", conn-&gt;cq.mcq.cqn);</div><div class='ctx'> </div><div class='ctx'> 	goto out;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c b/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c<br/>index e5c1012921d2..1ec61164e6b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c</a></div><div class='hunk'>@@ -211,7 +211,7 @@ int mlx5_fpga_device_start(struct mlx5_core_dev *mdev)</div><div class='ctx'> 	max_num_qps = MLX5_CAP_FPGA(mdev, shell_caps.max_num_qps);</div><div class='ctx'> 	if (!max_num_qps) {</div><div class='ctx'> 		mlx5_fpga_err(fdev, "FPGA reports 0 QPs in SHELL_CAPS\n");</div><div class='del'>-		err = -ENOTSUPP;</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c<br/>index 676005854dad..ced747bef641 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c</a></div><div class='hunk'>@@ -217,7 +217,8 @@ static int mlx5_cmd_update_root_ft(struct mlx5_flow_root_namespace *ns,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if ((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_IB) &amp;&amp;</div><div class='del'>-	    underlay_qpn == 0)</div><div class='add'>+	    underlay_qpn == 0 &amp;&amp;</div><div class='add'>+	    (ft-&gt;type != FS_FT_RDMA_RX &amp;&amp; ft-&gt;type != FS_FT_RDMA_TX))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (ft-&gt;type == FS_FT_FDB &amp;&amp;</div><div class='hunk'>@@ -238,6 +239,10 @@ static int mlx5_cmd_update_root_ft(struct mlx5_flow_root_namespace *ns,</div><div class='ctx'> 	MLX5_SET(set_flow_table_root_in, in, vport_number, ft-&gt;vport);</div><div class='ctx'> 	MLX5_SET(set_flow_table_root_in, in, other_vport,</div><div class='ctx'> 		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_VPORT));</div><div class='add'>+	MLX5_SET(set_flow_table_root_in, in, eswitch_owner_vhca_id,</div><div class='add'>+		 ft-&gt;esw_owner_vhca_id);</div><div class='add'>+	MLX5_SET(set_flow_table_root_in, in, other_eswitch,</div><div class='add'>+		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_ESWITCH));</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_cmd_exec_in(dev, set_flow_table_root, in);</div><div class='ctx'> 	if (!err &amp;&amp;</div><div class='hunk'>@@ -301,6 +306,10 @@ static int mlx5_cmd_create_flow_table(struct mlx5_flow_root_namespace *ns,</div><div class='ctx'> 	MLX5_SET(create_flow_table_in, in, vport_number, ft-&gt;vport);</div><div class='ctx'> 	MLX5_SET(create_flow_table_in, in, other_vport,</div><div class='ctx'> 		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_VPORT));</div><div class='add'>+	MLX5_SET(create_flow_table_in, in, eswitch_owner_vhca_id,</div><div class='add'>+		 ft-&gt;esw_owner_vhca_id);</div><div class='add'>+	MLX5_SET(create_flow_table_in, in, other_eswitch,</div><div class='add'>+		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_ESWITCH));</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(create_flow_table_in, in, flow_table_context.decap_en,</div><div class='ctx'> 		 en_decap);</div><div class='hunk'>@@ -359,6 +368,10 @@ static int mlx5_cmd_destroy_flow_table(struct mlx5_flow_root_namespace *ns,</div><div class='ctx'> 	MLX5_SET(destroy_flow_table_in, in, vport_number, ft-&gt;vport);</div><div class='ctx'> 	MLX5_SET(destroy_flow_table_in, in, other_vport,</div><div class='ctx'> 		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_VPORT));</div><div class='add'>+	MLX5_SET(destroy_flow_table_in, in, eswitch_owner_vhca_id,</div><div class='add'>+		 ft-&gt;esw_owner_vhca_id);</div><div class='add'>+	MLX5_SET(destroy_flow_table_in, in, other_eswitch,</div><div class='add'>+		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_ESWITCH));</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_cmd_exec_in(dev, destroy_flow_table, in);</div><div class='ctx'> 	if (!err)</div><div class='hunk'>@@ -393,6 +406,10 @@ static int mlx5_cmd_modify_flow_table(struct mlx5_flow_root_namespace *ns,</div><div class='ctx'> 		MLX5_SET(modify_flow_table_in, in, vport_number, ft-&gt;vport);</div><div class='ctx'> 		MLX5_SET(modify_flow_table_in, in, other_vport,</div><div class='ctx'> 			 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_VPORT));</div><div class='add'>+		MLX5_SET(modify_flow_table_in, in, eswitch_owner_vhca_id,</div><div class='add'>+			 ft-&gt;esw_owner_vhca_id);</div><div class='add'>+		MLX5_SET(modify_flow_table_in, in, other_eswitch,</div><div class='add'>+			 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_ESWITCH));</div><div class='ctx'> 		MLX5_SET(modify_flow_table_in, in, modify_field_select,</div><div class='ctx'> 			 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID);</div><div class='ctx'> 		if (next_ft) {</div><div class='hunk'>@@ -428,6 +445,10 @@ static int mlx5_cmd_create_flow_group(struct mlx5_flow_root_namespace *ns,</div><div class='ctx'> 	MLX5_SET(create_flow_group_in, in, vport_number, ft-&gt;vport);</div><div class='ctx'> 	MLX5_SET(create_flow_group_in, in, other_vport,</div><div class='ctx'> 		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_VPORT));</div><div class='add'>+	MLX5_SET(create_flow_group_in, in, eswitch_owner_vhca_id,</div><div class='add'>+		 ft-&gt;esw_owner_vhca_id);</div><div class='add'>+	MLX5_SET(create_flow_group_in, in, other_eswitch,</div><div class='add'>+		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_ESWITCH));</div><div class='ctx'> 	err = mlx5_cmd_exec_inout(dev, create_flow_group, in, out);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		fg-&gt;id = MLX5_GET(create_flow_group_out, out,</div><div class='hunk'>@@ -450,6 +471,10 @@ static int mlx5_cmd_destroy_flow_group(struct mlx5_flow_root_namespace *ns,</div><div class='ctx'> 	MLX5_SET(destroy_flow_group_in, in, vport_number, ft-&gt;vport);</div><div class='ctx'> 	MLX5_SET(destroy_flow_group_in, in, other_vport,</div><div class='ctx'> 		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_VPORT));</div><div class='add'>+	MLX5_SET(destroy_flow_group_in, in, eswitch_owner_vhca_id,</div><div class='add'>+		 ft-&gt;esw_owner_vhca_id);</div><div class='add'>+	MLX5_SET(destroy_flow_group_in, in, other_eswitch,</div><div class='add'>+		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_ESWITCH));</div><div class='ctx'> 	return mlx5_cmd_exec_in(dev, destroy_flow_group, in);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -526,7 +551,7 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev,</div><div class='ctx'> 	struct mlx5_flow_rule *dst;</div><div class='ctx'> 	void *in_flow_context, *vlan;</div><div class='ctx'> 	void *in_match_value;</div><div class='del'>-	int reformat_id = 0;</div><div class='add'>+	u32 reformat_id = 0;</div><div class='ctx'> 	unsigned int inlen;</div><div class='ctx'> 	int dst_cnt_size;</div><div class='ctx'> 	u32 *in, action;</div><div class='hunk'>@@ -558,6 +583,9 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev,</div><div class='ctx'> 	MLX5_SET(set_fte_in, in, vport_number, ft-&gt;vport);</div><div class='ctx'> 	MLX5_SET(set_fte_in, in, other_vport,</div><div class='ctx'> 		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_VPORT));</div><div class='add'>+	MLX5_SET(set_fte_in, in, eswitch_owner_vhca_id, ft-&gt;esw_owner_vhca_id);</div><div class='add'>+	MLX5_SET(set_fte_in, in, other_eswitch,</div><div class='add'>+		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_ESWITCH));</div><div class='ctx'> </div><div class='ctx'> 	in_flow_context = MLX5_ADDR_OF(set_fte_in, in, flow_context);</div><div class='ctx'> 	MLX5_SET(flow_context, in_flow_context, group_id, group_id);</div><div class='hunk'>@@ -579,23 +607,21 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev,</div><div class='ctx'> 	MLX5_SET(flow_context, in_flow_context, action, action);</div><div class='ctx'> </div><div class='ctx'> 	if (!extended_dest &amp;&amp; fte-&gt;act_dests.action.pkt_reformat) {</div><div class='del'>-		struct mlx5_pkt_reformat *pkt_reformat = fte-&gt;act_dests.action.pkt_reformat;</div><div class='del'>-</div><div class='del'>-		if (pkt_reformat-&gt;owner == MLX5_FLOW_RESOURCE_OWNER_SW) {</div><div class='del'>-			reformat_id = mlx5_fs_dr_action_get_pkt_reformat_id(pkt_reformat);</div><div class='del'>-			if (reformat_id &lt; 0) {</div><div class='del'>-				mlx5_core_err(dev,</div><div class='del'>-					      "Unsupported SW-owned pkt_reformat type (%d) in FW-owned table\n",</div><div class='del'>-					      pkt_reformat-&gt;reformat_type);</div><div class='del'>-				err = reformat_id;</div><div class='del'>-				goto err_out;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			reformat_id = fte-&gt;act_dests.action.pkt_reformat-&gt;id;</div><div class='add'>+		struct mlx5_pkt_reformat *pkt_reformat =</div><div class='add'>+			fte-&gt;act_dests.action.pkt_reformat;</div><div class='add'>+</div><div class='add'>+		err = mlx5_fs_get_packet_reformat_id(pkt_reformat,</div><div class='add'>+						     &amp;reformat_id);</div><div class='add'>+		if (err) {</div><div class='add'>+			mlx5_core_err(dev,</div><div class='add'>+				      "Unsupported pkt_reformat type (%d)\n",</div><div class='add'>+				      pkt_reformat-&gt;reformat_type);</div><div class='add'>+			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	MLX5_SET(flow_context, in_flow_context, packet_reformat_id, (u32)reformat_id);</div><div class='add'>+	MLX5_SET(flow_context, in_flow_context, packet_reformat_id,</div><div class='add'>+		 reformat_id);</div><div class='ctx'> </div><div class='ctx'> 	if (fte-&gt;act_dests.action.modify_hdr) {</div><div class='ctx'> 		if (fte-&gt;act_dests.action.modify_hdr-&gt;owner == MLX5_FLOW_RESOURCE_OWNER_SW) {</div><div class='hunk'>@@ -718,7 +744,7 @@ static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev,</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			MLX5_SET(flow_counter_list, in_dests, flow_counter_id,</div><div class='del'>-				 dst-&gt;dest_attr.counter_id);</div><div class='add'>+				 mlx5_fc_id(dst-&gt;dest_attr.counter));</div><div class='ctx'> 			in_dests += dst_cnt_size;</div><div class='ctx'> 			list_size++;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -789,6 +815,10 @@ static int mlx5_cmd_delete_fte(struct mlx5_flow_root_namespace *ns,</div><div class='ctx'> 	MLX5_SET(delete_fte_in, in, vport_number, ft-&gt;vport);</div><div class='ctx'> 	MLX5_SET(delete_fte_in, in, other_vport,</div><div class='ctx'> 		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_VPORT));</div><div class='add'>+	MLX5_SET(delete_fte_in, in, eswitch_owner_vhca_id,</div><div class='add'>+		 ft-&gt;esw_owner_vhca_id);</div><div class='add'>+	MLX5_SET(delete_fte_in, in, other_eswitch,</div><div class='add'>+		 !!(ft-&gt;flags &amp; MLX5_FLOW_TABLE_OTHER_ESWITCH));</div><div class='ctx'> </div><div class='ctx'> 	return mlx5_cmd_exec_in(dev, delete_fte, in);</div><div class='ctx'> }</div><div class='hunk'>@@ -1141,6 +1171,8 @@ const struct mlx5_flow_cmds *mlx5_fs_cmd_get_default(enum fs_flow_table_type typ</div><div class='ctx'> 	case FS_FT_RDMA_RX:</div><div class='ctx'> 	case FS_FT_RDMA_TX:</div><div class='ctx'> 	case FS_FT_PORT_SEL:</div><div class='add'>+	case FS_FT_RDMA_TRANSPORT_RX:</div><div class='add'>+	case FS_FT_RDMA_TRANSPORT_TX:</div><div class='ctx'> 		return mlx5_fs_cmd_get_fw_cmds();</div><div class='ctx'> 	default:</div><div class='ctx'> 		return mlx5_fs_cmd_get_stub_cmds();</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c<br/>index c2db0a1c132b..0a6031a64c6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.c</a></div><div class='hunk'>@@ -113,13 +113,16 @@</div><div class='ctx'> #define ETHTOOL_PRIO_NUM_LEVELS 1</div><div class='ctx'> #define ETHTOOL_NUM_PRIOS 11</div><div class='ctx'> #define ETHTOOL_MIN_LEVEL (KERNEL_MIN_LEVEL + ETHTOOL_NUM_PRIOS)</div><div class='del'>-/* Promiscuous, Vlan, mac, ttc, inner ttc, {UDP/ANY/aRFS/accel/{esp, esp_err}}, IPsec policy,</div><div class='del'>- * {IPsec RoCE MPV,Alias table},IPsec RoCE policy</div><div class='add'>+/* Vlan, mac, ttc, inner ttc, {UDP/ANY/aRFS/accel/{esp, esp_err}}, IPsec policy,</div><div class='add'>+ * IPsec policy miss, {IPsec RoCE MPV,Alias table},IPsec RoCE policy</div><div class='ctx'>  */</div><div class='ctx'> #define KERNEL_NIC_PRIO_NUM_LEVELS 11</div><div class='ctx'> #define KERNEL_NIC_NUM_PRIOS 1</div><div class='del'>-/* One more level for tc */</div><div class='del'>-#define KERNEL_MIN_LEVEL (KERNEL_NIC_PRIO_NUM_LEVELS + 1)</div><div class='add'>+/* One more level for tc, and one more for promisc */</div><div class='add'>+#define KERNEL_MIN_LEVEL (KERNEL_NIC_PRIO_NUM_LEVELS + 2)</div><div class='add'>+</div><div class='add'>+#define KERNEL_NIC_PROMISC_NUM_PRIOS 1</div><div class='add'>+#define KERNEL_NIC_PROMISC_NUM_LEVELS 1</div><div class='ctx'> </div><div class='ctx'> #define KERNEL_NIC_TC_NUM_PRIOS  1</div><div class='ctx'> #define KERNEL_NIC_TC_NUM_LEVELS 3</div><div class='hunk'>@@ -187,6 +190,8 @@ static struct init_tree_node {</div><div class='ctx'> 			   ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,</div><div class='ctx'> 				  ADD_MULTIPLE_PRIO(KERNEL_NIC_TC_NUM_PRIOS,</div><div class='ctx'> 						    KERNEL_NIC_TC_NUM_LEVELS),</div><div class='add'>+				  ADD_MULTIPLE_PRIO(KERNEL_NIC_PROMISC_NUM_PRIOS,</div><div class='add'>+						    KERNEL_NIC_PROMISC_NUM_LEVELS),</div><div class='ctx'> 				  ADD_MULTIPLE_PRIO(KERNEL_NIC_NUM_PRIOS,</div><div class='ctx'> 						    KERNEL_NIC_PRIO_NUM_LEVELS))),</div><div class='ctx'> 		  ADD_PRIO(0, BY_PASS_MIN_LEVEL, 0, FS_CHAINING_CAPS,</div><div class='hunk'>@@ -658,6 +663,7 @@ static void del_sw_hw_rule(struct fs_node *node)</div><div class='ctx'> 			BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION) |</div><div class='ctx'> 			BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS);</div><div class='ctx'> 		fte-&gt;act_dests.action.action &amp;= ~MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='add'>+		mlx5_fc_local_put(rule-&gt;dest_attr.counter);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -820,11 +826,17 @@ static int insert_fte(struct mlx5_flow_group *fg, struct fs_fte *fte)</div><div class='ctx'> 		return index;</div><div class='ctx'> </div><div class='ctx'> 	fte-&gt;index = index + fg-&gt;start_index;</div><div class='add'>+retry_insert:</div><div class='ctx'> 	ret = rhashtable_insert_fast(&amp;fg-&gt;ftes_hash,</div><div class='ctx'> 				     &amp;fte-&gt;hash,</div><div class='ctx'> 				     rhash_fte);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret == -EBUSY) {</div><div class='add'>+			cond_resched();</div><div class='add'>+			goto retry_insert;</div><div class='add'>+		}</div><div class='ctx'> 		goto err_ida_remove;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	tree_add_node(&amp;fte-&gt;node, &amp;fg-&gt;node);</div><div class='ctx'> 	list_add_tail(&amp;fte-&gt;node.list, &amp;fg-&gt;node.children);</div><div class='hunk'>@@ -927,10 +939,10 @@ static struct mlx5_flow_group *alloc_insert_flow_group(struct mlx5_flow_table *f</div><div class='ctx'> 	return fg;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct mlx5_flow_table *alloc_flow_table(int level, u16 vport,</div><div class='del'>-						enum fs_flow_table_type table_type,</div><div class='del'>-						enum fs_flow_table_op_mod op_mod,</div><div class='del'>-						u32 flags)</div><div class='add'>+static struct mlx5_flow_table *</div><div class='add'>+alloc_flow_table(struct mlx5_flow_table_attr *ft_attr, u16 vport,</div><div class='add'>+		 enum fs_flow_table_type table_type,</div><div class='add'>+		 enum fs_flow_table_op_mod op_mod)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_flow_table *ft;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -945,12 +957,13 @@ static struct mlx5_flow_table *alloc_flow_table(int level, u16 vport,</div><div class='ctx'> 		return ERR_PTR(ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ft-&gt;level = level;</div><div class='add'>+	ft-&gt;level = ft_attr-&gt;level;</div><div class='ctx'> 	ft-&gt;node.type = FS_TYPE_FLOW_TABLE;</div><div class='ctx'> 	ft-&gt;op_mod = op_mod;</div><div class='ctx'> 	ft-&gt;type = table_type;</div><div class='ctx'> 	ft-&gt;vport = vport;</div><div class='del'>-	ft-&gt;flags = flags;</div><div class='add'>+	ft-&gt;esw_owner_vhca_id = ft_attr-&gt;esw_owner_vhca_id;</div><div class='add'>+	ft-&gt;flags = ft_attr-&gt;flags;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;ft-&gt;fwd_rules);</div><div class='ctx'> 	mutex_init(&amp;ft-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1358,10 +1371,7 @@ static struct mlx5_flow_table *__mlx5_create_flow_table(struct mlx5_flow_namespa</div><div class='ctx'> 	/* The level is related to the</div><div class='ctx'> 	 * priority level range.</div><div class='ctx'> 	 */</div><div class='del'>-	ft = alloc_flow_table(ft_attr-&gt;level,</div><div class='del'>-			      vport,</div><div class='del'>-			      root-&gt;table_type,</div><div class='del'>-			      op_mod, ft_attr-&gt;flags);</div><div class='add'>+	ft = alloc_flow_table(ft_attr, vport, root-&gt;table_type, op_mod);</div><div class='ctx'> 	if (IS_ERR(ft)) {</div><div class='ctx'> 		err = PTR_ERR(ft);</div><div class='ctx'> 		goto unlock_root;</div><div class='hunk'>@@ -1449,7 +1459,7 @@ mlx5_create_auto_grouped_flow_table(struct mlx5_flow_namespace *ns,</div><div class='ctx'> 	struct mlx5_flow_table *ft;</div><div class='ctx'> 	int autogroups_max_fte;</div><div class='ctx'> </div><div class='del'>-	ft = mlx5_create_flow_table(ns, ft_attr);</div><div class='add'>+	ft = mlx5_create_vport_flow_table(ns, ft_attr, ft_attr-&gt;vport);</div><div class='ctx'> 	if (IS_ERR(ft))</div><div class='ctx'> 		return ft;</div><div class='ctx'> </div><div class='hunk'>@@ -1823,14 +1833,35 @@ static int create_auto_flow_group(struct mlx5_flow_table *ft,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mlx5_fs_get_packet_reformat_id(struct mlx5_pkt_reformat *pkt_reformat,</div><div class='add'>+				   u32 *id)</div><div class='add'>+{</div><div class='add'>+	switch (pkt_reformat-&gt;owner) {</div><div class='add'>+	case MLX5_FLOW_RESOURCE_OWNER_FW:</div><div class='add'>+		*id = pkt_reformat-&gt;id;</div><div class='add'>+		return 0;</div><div class='add'>+	case MLX5_FLOW_RESOURCE_OWNER_SW:</div><div class='add'>+		return mlx5_fs_dr_action_get_pkt_reformat_id(pkt_reformat, id);</div><div class='add'>+	case MLX5_FLOW_RESOURCE_OWNER_HWS:</div><div class='add'>+		return mlx5_fs_hws_action_get_pkt_reformat_id(pkt_reformat, id);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool mlx5_pkt_reformat_cmp(struct mlx5_pkt_reformat *p1,</div><div class='ctx'> 				  struct mlx5_pkt_reformat *p2)</div><div class='ctx'> {</div><div class='del'>-	return p1-&gt;owner == p2-&gt;owner &amp;&amp;</div><div class='del'>-		(p1-&gt;owner == MLX5_FLOW_RESOURCE_OWNER_FW ?</div><div class='del'>-		 p1-&gt;id == p2-&gt;id :</div><div class='del'>-		 mlx5_fs_dr_action_get_pkt_reformat_id(p1) ==</div><div class='del'>-		 mlx5_fs_dr_action_get_pkt_reformat_id(p2));</div><div class='add'>+	int err1, err2;</div><div class='add'>+	u32 id1, id2;</div><div class='add'>+</div><div class='add'>+	if (p1-&gt;owner != p2-&gt;owner)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	err1 = mlx5_fs_get_packet_reformat_id(p1, &amp;id1);</div><div class='add'>+	err2 = mlx5_fs_get_packet_reformat_id(p2, &amp;id2);</div><div class='add'>+</div><div class='add'>+	return !err1 &amp;&amp; !err2 &amp;&amp; id1 == id2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool mlx5_flow_dests_cmp(struct mlx5_flow_destination *d1,</div><div class='hunk'>@@ -2105,13 +2136,22 @@ lookup_fte_locked(struct mlx5_flow_group *g,</div><div class='ctx'> 		fte_tmp = NULL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	nested_down_write_ref_node(&amp;fte_tmp-&gt;node, FS_LOCK_CHILD);</div><div class='add'>+</div><div class='ctx'> 	if (!fte_tmp-&gt;node.active) {</div><div class='add'>+		up_write_ref_node(&amp;fte_tmp-&gt;node, false);</div><div class='add'>+</div><div class='add'>+		if (take_write)</div><div class='add'>+			up_write_ref_node(&amp;g-&gt;node, false);</div><div class='add'>+		else</div><div class='add'>+			up_read_ref_node(&amp;g-&gt;node);</div><div class='add'>+</div><div class='ctx'> 		tree_put_node(&amp;fte_tmp-&gt;node, false);</div><div class='del'>-		fte_tmp = NULL;</div><div class='del'>-		goto out;</div><div class='add'>+</div><div class='add'>+		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	nested_down_write_ref_node(&amp;fte_tmp-&gt;node, FS_LOCK_CHILD);</div><div class='ctx'> out:</div><div class='ctx'> 	if (take_write)</div><div class='ctx'> 		up_write_ref_node(&amp;g-&gt;node, false);</div><div class='hunk'>@@ -2191,6 +2231,7 @@ try_add_to_existing_fg(struct mlx5_flow_table *ft,</div><div class='ctx'> 	struct mlx5_flow_handle *rule;</div><div class='ctx'> 	struct match_list *iter;</div><div class='ctx'> 	bool take_write = false;</div><div class='add'>+	bool try_again = false;</div><div class='ctx'> 	struct fs_fte *fte;</div><div class='ctx'> 	u64  version = 0;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -2255,6 +2296,7 @@ skip_search:</div><div class='ctx'> 		nested_down_write_ref_node(&amp;g-&gt;node, FS_LOCK_PARENT);</div><div class='ctx'> </div><div class='ctx'> 		if (!g-&gt;node.active) {</div><div class='add'>+			try_again = true;</div><div class='ctx'> 			up_write_ref_node(&amp;g-&gt;node, false);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2276,7 +2318,8 @@ skip_search:</div><div class='ctx'> 			tree_put_node(&amp;fte-&gt;node, false);</div><div class='ctx'> 		return rule;</div><div class='ctx'> 	}</div><div class='del'>-	rule = ERR_PTR(-ENOENT);</div><div class='add'>+	err = try_again ? -EAGAIN : -ENOENT;</div><div class='add'>+	rule = ERR_PTR(err);</div><div class='ctx'> out:</div><div class='ctx'> 	kmem_cache_free(steering-&gt;ftes_cache, fte);</div><div class='ctx'> 	return rule;</div><div class='hunk'>@@ -2700,6 +2743,7 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5_FLOW_NAMESPACE_RDMA_TX:</div><div class='ctx'> 		root_ns = steering-&gt;rdma_tx_root_ns;</div><div class='add'>+		prio = RDMA_TX_BYPASS_PRIO;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5_FLOW_NAMESPACE_RDMA_RX_COUNTERS:</div><div class='ctx'> 		root_ns = steering-&gt;rdma_rx_root_ns;</div><div class='hunk'>@@ -2747,36 +2791,56 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mlx5_get_flow_namespace);</div><div class='ctx'> </div><div class='del'>-struct mlx5_flow_namespace *mlx5_get_flow_vport_acl_namespace(struct mlx5_core_dev *dev,</div><div class='del'>-							      enum mlx5_flow_namespace_type type,</div><div class='del'>-							      int vport)</div><div class='add'>+struct mlx5_vport_acl_root_ns {</div><div class='add'>+	u16 vport_idx;</div><div class='add'>+	struct mlx5_flow_root_namespace *root_ns;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_flow_namespace *</div><div class='add'>+mlx5_get_flow_vport_namespace(struct mlx5_core_dev *dev,</div><div class='add'>+			      enum mlx5_flow_namespace_type type, int vport_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_flow_steering *steering = dev-&gt;priv.steering;</div><div class='add'>+	struct mlx5_vport_acl_root_ns *vport_ns;</div><div class='ctx'> </div><div class='ctx'> 	if (!steering)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case MLX5_FLOW_NAMESPACE_ESW_EGRESS:</div><div class='del'>-		if (vport &gt;= steering-&gt;esw_egress_acl_vports)</div><div class='del'>-			return NULL;</div><div class='del'>-		if (steering-&gt;esw_egress_root_ns &amp;&amp;</div><div class='del'>-		    steering-&gt;esw_egress_root_ns[vport])</div><div class='del'>-			return &amp;steering-&gt;esw_egress_root_ns[vport]-&gt;ns;</div><div class='add'>+		vport_ns = xa_load(&amp;steering-&gt;esw_egress_root_ns, vport_idx);</div><div class='add'>+		if (vport_ns)</div><div class='add'>+			return &amp;vport_ns-&gt;root_ns-&gt;ns;</div><div class='ctx'> 		else</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 	case MLX5_FLOW_NAMESPACE_ESW_INGRESS:</div><div class='del'>-		if (vport &gt;= steering-&gt;esw_ingress_acl_vports)</div><div class='add'>+		vport_ns = xa_load(&amp;steering-&gt;esw_ingress_root_ns, vport_idx);</div><div class='add'>+		if (vport_ns)</div><div class='add'>+			return &amp;vport_ns-&gt;root_ns-&gt;ns;</div><div class='add'>+		else</div><div class='add'>+			return NULL;</div><div class='add'>+	case MLX5_FLOW_NAMESPACE_RDMA_TRANSPORT_RX:</div><div class='add'>+		if (vport_idx &gt;= steering-&gt;rdma_transport_rx_vports)</div><div class='ctx'> 			return NULL;</div><div class='del'>-		if (steering-&gt;esw_ingress_root_ns &amp;&amp;</div><div class='del'>-		    steering-&gt;esw_ingress_root_ns[vport])</div><div class='del'>-			return &amp;steering-&gt;esw_ingress_root_ns[vport]-&gt;ns;</div><div class='add'>+		if (steering-&gt;rdma_transport_rx_root_ns &amp;&amp;</div><div class='add'>+		    steering-&gt;rdma_transport_rx_root_ns[vport_idx])</div><div class='add'>+			return &amp;steering-&gt;rdma_transport_rx_root_ns[vport_idx]-&gt;ns;</div><div class='add'>+		else</div><div class='add'>+			return NULL;</div><div class='add'>+	case MLX5_FLOW_NAMESPACE_RDMA_TRANSPORT_TX:</div><div class='add'>+		if (vport_idx &gt;= steering-&gt;rdma_transport_tx_vports)</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		if (steering-&gt;rdma_transport_tx_root_ns &amp;&amp;</div><div class='add'>+		    steering-&gt;rdma_transport_tx_root_ns[vport_idx])</div><div class='add'>+			return &amp;steering-&gt;rdma_transport_tx_root_ns[vport_idx]-&gt;ns;</div><div class='ctx'> 		else</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(mlx5_get_flow_vport_namespace);</div><div class='ctx'> </div><div class='ctx'> static struct fs_prio *_fs_create_prio(struct mlx5_flow_namespace *ns,</div><div class='ctx'> 				       unsigned int prio,</div><div class='hunk'>@@ -3182,6 +3246,211 @@ out_err:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+init_rdma_transport_rx_root_ns_one(struct mlx5_flow_steering *steering,</div><div class='add'>+				   int vport_idx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_root_namespace *root_ns;</div><div class='add'>+	struct fs_prio *prio;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	steering-&gt;rdma_transport_rx_root_ns[vport_idx] =</div><div class='add'>+		create_root_ns(steering, FS_FT_RDMA_TRANSPORT_RX);</div><div class='add'>+	if (!steering-&gt;rdma_transport_rx_root_ns[vport_idx])</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	root_ns = steering-&gt;rdma_transport_rx_root_ns[vport_idx];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MLX5_RDMA_TRANSPORT_BYPASS_PRIO; i++) {</div><div class='add'>+		prio = fs_create_prio(&amp;root_ns-&gt;ns, i, 1);</div><div class='add'>+		if (IS_ERR(prio)) {</div><div class='add'>+			ret = PTR_ERR(prio);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	set_prio_attrs(root_ns);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	cleanup_root_ns(root_ns);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+init_rdma_transport_tx_root_ns_one(struct mlx5_flow_steering *steering,</div><div class='add'>+				   int vport_idx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_root_namespace *root_ns;</div><div class='add'>+	struct fs_prio *prio;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	steering-&gt;rdma_transport_tx_root_ns[vport_idx] =</div><div class='add'>+		create_root_ns(steering, FS_FT_RDMA_TRANSPORT_TX);</div><div class='add'>+	if (!steering-&gt;rdma_transport_tx_root_ns[vport_idx])</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	root_ns = steering-&gt;rdma_transport_tx_root_ns[vport_idx];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MLX5_RDMA_TRANSPORT_BYPASS_PRIO; i++) {</div><div class='add'>+		prio = fs_create_prio(&amp;root_ns-&gt;ns, i, 1);</div><div class='add'>+		if (IS_ERR(prio)) {</div><div class='add'>+			ret = PTR_ERR(prio);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	set_prio_attrs(root_ns);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	cleanup_root_ns(root_ns);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mlx5_fs_ns_is_empty(struct mlx5_flow_namespace *ns)</div><div class='add'>+{</div><div class='add'>+	struct fs_prio *iter_prio;</div><div class='add'>+</div><div class='add'>+	fs_for_each_prio(iter_prio, ns) {</div><div class='add'>+		if (iter_prio-&gt;num_ft)</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_fs_set_root_dev(struct mlx5_core_dev *dev,</div><div class='add'>+			 struct mlx5_core_dev *new_dev,</div><div class='add'>+			 enum fs_flow_table_type table_type)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_root_namespace	**root;</div><div class='add'>+	int total_vports;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	switch (table_type) {</div><div class='add'>+	case FS_FT_RDMA_TRANSPORT_TX:</div><div class='add'>+		root = dev-&gt;priv.steering-&gt;rdma_transport_tx_root_ns;</div><div class='add'>+		total_vports = dev-&gt;priv.steering-&gt;rdma_transport_tx_vports;</div><div class='add'>+		break;</div><div class='add'>+	case FS_FT_RDMA_TRANSPORT_RX:</div><div class='add'>+		root = dev-&gt;priv.steering-&gt;rdma_transport_rx_root_ns;</div><div class='add'>+		total_vports = dev-&gt;priv.steering-&gt;rdma_transport_rx_vports;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(true);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; total_vports; i++) {</div><div class='add'>+		mutex_lock(&amp;root[i]-&gt;chain_lock);</div><div class='add'>+		if (!mlx5_fs_ns_is_empty(&amp;root[i]-&gt;ns)) {</div><div class='add'>+			mutex_unlock(&amp;root[i]-&gt;chain_lock);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		root[i]-&gt;dev = new_dev;</div><div class='add'>+		mutex_unlock(&amp;root[i]-&gt;chain_lock);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	while (i--) {</div><div class='add'>+		mutex_lock(&amp;root[i]-&gt;chain_lock);</div><div class='add'>+		root[i]-&gt;dev = dev;</div><div class='add'>+		mutex_unlock(&amp;root[i]-&gt;chain_lock);</div><div class='add'>+	}</div><div class='add'>+	/* If you hit this error try destroying all flow tables and try again */</div><div class='add'>+	mlx5_core_err(dev, "Failed to set root device for RDMA TRANSPORT\n");</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mlx5_fs_set_root_dev);</div><div class='add'>+</div><div class='add'>+static int init_rdma_transport_rx_root_ns(struct mlx5_flow_steering *steering)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = steering-&gt;dev;</div><div class='add'>+	int total_vports;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* In case eswitch not supported and working in legacy mode */</div><div class='add'>+	total_vports = mlx5_eswitch_get_total_vports(dev) ?: 1;</div><div class='add'>+</div><div class='add'>+	steering-&gt;rdma_transport_rx_root_ns =</div><div class='add'>+			kcalloc(total_vports,</div><div class='add'>+				sizeof(*steering-&gt;rdma_transport_rx_root_ns),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!steering-&gt;rdma_transport_rx_root_ns)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; total_vports; i++) {</div><div class='add'>+		err = init_rdma_transport_rx_root_ns_one(steering, i);</div><div class='add'>+		if (err)</div><div class='add'>+			goto cleanup_root_ns;</div><div class='add'>+	}</div><div class='add'>+	steering-&gt;rdma_transport_rx_vports = total_vports;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+cleanup_root_ns:</div><div class='add'>+	while (i--)</div><div class='add'>+		cleanup_root_ns(steering-&gt;rdma_transport_rx_root_ns[i]);</div><div class='add'>+	kfree(steering-&gt;rdma_transport_rx_root_ns);</div><div class='add'>+	steering-&gt;rdma_transport_rx_root_ns = NULL;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int init_rdma_transport_tx_root_ns(struct mlx5_flow_steering *steering)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = steering-&gt;dev;</div><div class='add'>+	int total_vports;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* In case eswitch not supported and working in legacy mode */</div><div class='add'>+	total_vports = mlx5_eswitch_get_total_vports(dev) ?: 1;</div><div class='add'>+</div><div class='add'>+	steering-&gt;rdma_transport_tx_root_ns =</div><div class='add'>+			kcalloc(total_vports,</div><div class='add'>+				sizeof(*steering-&gt;rdma_transport_tx_root_ns),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!steering-&gt;rdma_transport_tx_root_ns)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; total_vports; i++) {</div><div class='add'>+		err = init_rdma_transport_tx_root_ns_one(steering, i);</div><div class='add'>+		if (err)</div><div class='add'>+			goto cleanup_root_ns;</div><div class='add'>+	}</div><div class='add'>+	steering-&gt;rdma_transport_tx_vports = total_vports;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+cleanup_root_ns:</div><div class='add'>+	while (i--)</div><div class='add'>+		cleanup_root_ns(steering-&gt;rdma_transport_tx_root_ns[i]);</div><div class='add'>+	kfree(steering-&gt;rdma_transport_tx_root_ns);</div><div class='add'>+	steering-&gt;rdma_transport_tx_root_ns = NULL;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void cleanup_rdma_transport_roots_ns(struct mlx5_flow_steering *steering)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (steering-&gt;rdma_transport_rx_root_ns) {</div><div class='add'>+		for (i = 0; i &lt; steering-&gt;rdma_transport_rx_vports; i++)</div><div class='add'>+			cleanup_root_ns(steering-&gt;rdma_transport_rx_root_ns[i]);</div><div class='add'>+</div><div class='add'>+		kfree(steering-&gt;rdma_transport_rx_root_ns);</div><div class='add'>+		steering-&gt;rdma_transport_rx_root_ns = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (steering-&gt;rdma_transport_tx_root_ns) {</div><div class='add'>+		for (i = 0; i &lt; steering-&gt;rdma_transport_tx_vports; i++)</div><div class='add'>+			cleanup_root_ns(steering-&gt;rdma_transport_tx_root_ns[i]);</div><div class='add'>+</div><div class='add'>+		kfree(steering-&gt;rdma_transport_tx_root_ns);</div><div class='add'>+		steering-&gt;rdma_transport_tx_root_ns = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* FT and tc chains are stored in the same array so we can re-use the</div><div class='ctx'>  * mlx5_get_fdb_sub_ns() and tc api for FT chains.</div><div class='ctx'>  * When creating a new ns for each chain store it in the first available slot.</div><div class='hunk'>@@ -3305,6 +3574,11 @@ static int init_fdb_root_ns(struct mlx5_flow_steering *steering)</div><div class='ctx'> 	if (!steering-&gt;fdb_root_ns)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	maj_prio = fs_create_prio(&amp;steering-&gt;fdb_root_ns-&gt;ns, FDB_DROP_ROOT, 1);</div><div class='add'>+	err = PTR_ERR_OR_ZERO(maj_prio);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='ctx'> 	err = create_fdb_bypass(steering);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_err;</div><div class='hunk'>@@ -3362,118 +3636,102 @@ out_err:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int init_egress_acl_root_ns(struct mlx5_flow_steering *steering, int vport)</div><div class='add'>+static void</div><div class='add'>+mlx5_fs_remove_vport_acl_root_ns(struct xarray *esw_acl_root_ns, u16 vport_idx)</div><div class='ctx'> {</div><div class='del'>-	struct fs_prio *prio;</div><div class='add'>+	struct mlx5_vport_acl_root_ns *vport_ns;</div><div class='ctx'> </div><div class='del'>-	steering-&gt;esw_egress_root_ns[vport] = create_root_ns(steering, FS_FT_ESW_EGRESS_ACL);</div><div class='del'>-	if (!steering-&gt;esw_egress_root_ns[vport])</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	/* create 1 prio*/</div><div class='del'>-	prio = fs_create_prio(&amp;steering-&gt;esw_egress_root_ns[vport]-&gt;ns, 0, 1);</div><div class='del'>-	return PTR_ERR_OR_ZERO(prio);</div><div class='add'>+	vport_ns = xa_erase(esw_acl_root_ns, vport_idx);</div><div class='add'>+	if (vport_ns) {</div><div class='add'>+		cleanup_root_ns(vport_ns-&gt;root_ns);</div><div class='add'>+		kfree(vport_ns);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int init_ingress_acl_root_ns(struct mlx5_flow_steering *steering, int vport)</div><div class='add'>+static int</div><div class='add'>+mlx5_fs_add_vport_acl_root_ns(struct mlx5_flow_steering *steering,</div><div class='add'>+			      struct xarray *esw_acl_root_ns,</div><div class='add'>+			      enum fs_flow_table_type table_type,</div><div class='add'>+			      u16 vport_idx)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_vport_acl_root_ns *vport_ns;</div><div class='ctx'> 	struct fs_prio *prio;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	steering-&gt;esw_ingress_root_ns[vport] = create_root_ns(steering, FS_FT_ESW_INGRESS_ACL);</div><div class='del'>-	if (!steering-&gt;esw_ingress_root_ns[vport])</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	/* sanity check, intended xarrays are used */</div><div class='add'>+	if (WARN_ON(esw_acl_root_ns != &amp;steering-&gt;esw_egress_root_ns &amp;&amp;</div><div class='add'>+		    esw_acl_root_ns != &amp;steering-&gt;esw_ingress_root_ns))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* create 1 prio*/</div><div class='del'>-	prio = fs_create_prio(&amp;steering-&gt;esw_ingress_root_ns[vport]-&gt;ns, 0, 1);</div><div class='del'>-	return PTR_ERR_OR_ZERO(prio);</div><div class='del'>-}</div><div class='add'>+	if (table_type != FS_FT_ESW_EGRESS_ACL &amp;&amp;</div><div class='add'>+	    table_type != FS_FT_ESW_INGRESS_ACL) {</div><div class='add'>+		mlx5_core_err(steering-&gt;dev,</div><div class='add'>+			      "Invalid table type %d for egress/ingress ACLs\n",</div><div class='add'>+			      table_type);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-int mlx5_fs_egress_acls_init(struct mlx5_core_dev *dev, int total_vports)</div><div class='del'>-{</div><div class='del'>-	struct mlx5_flow_steering *steering = dev-&gt;priv.steering;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='add'>+	if (xa_load(esw_acl_root_ns, vport_idx))</div><div class='add'>+		return -EEXIST;</div><div class='ctx'> </div><div class='del'>-	steering-&gt;esw_egress_root_ns =</div><div class='del'>-			kcalloc(total_vports,</div><div class='del'>-				sizeof(*steering-&gt;esw_egress_root_ns),</div><div class='del'>-				GFP_KERNEL);</div><div class='del'>-	if (!steering-&gt;esw_egress_root_ns)</div><div class='add'>+	vport_ns = kzalloc(sizeof(*vport_ns), GFP_KERNEL);</div><div class='add'>+	if (!vport_ns)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; total_vports; i++) {</div><div class='del'>-		err = init_egress_acl_root_ns(steering, i);</div><div class='del'>-		if (err)</div><div class='del'>-			goto cleanup_root_ns;</div><div class='add'>+	vport_ns-&gt;root_ns = create_root_ns(steering, table_type);</div><div class='add'>+	if (!vport_ns-&gt;root_ns) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto kfree_vport_ns;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* create 1 prio*/</div><div class='add'>+	prio = fs_create_prio(&amp;vport_ns-&gt;root_ns-&gt;ns, 0, 1);</div><div class='add'>+	if (IS_ERR(prio)) {</div><div class='add'>+		err = PTR_ERR(prio);</div><div class='add'>+		goto cleanup_root_ns;</div><div class='ctx'> 	}</div><div class='del'>-	steering-&gt;esw_egress_acl_vports = total_vports;</div><div class='add'>+</div><div class='add'>+	vport_ns-&gt;vport_idx = vport_idx;</div><div class='add'>+	err = xa_insert(esw_acl_root_ns, vport_idx, vport_ns, GFP_KERNEL);</div><div class='add'>+	if (err)</div><div class='add'>+		goto cleanup_root_ns;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> cleanup_root_ns:</div><div class='del'>-	for (i--; i &gt;= 0; i--)</div><div class='del'>-		cleanup_root_ns(steering-&gt;esw_egress_root_ns[i]);</div><div class='del'>-	kfree(steering-&gt;esw_egress_root_ns);</div><div class='del'>-	steering-&gt;esw_egress_root_ns = NULL;</div><div class='add'>+	cleanup_root_ns(vport_ns-&gt;root_ns);</div><div class='add'>+kfree_vport_ns:</div><div class='add'>+	kfree(vport_ns);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5_fs_egress_acls_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+int mlx5_fs_vport_egress_acl_ns_add(struct mlx5_flow_steering *steering,</div><div class='add'>+				    u16 vport_idx)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_flow_steering *steering = dev-&gt;priv.steering;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!steering-&gt;esw_egress_root_ns)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; steering-&gt;esw_egress_acl_vports; i++)</div><div class='del'>-		cleanup_root_ns(steering-&gt;esw_egress_root_ns[i]);</div><div class='del'>-</div><div class='del'>-	kfree(steering-&gt;esw_egress_root_ns);</div><div class='del'>-	steering-&gt;esw_egress_root_ns = NULL;</div><div class='add'>+	return mlx5_fs_add_vport_acl_root_ns(steering,</div><div class='add'>+					     &amp;steering-&gt;esw_egress_root_ns,</div><div class='add'>+					     FS_FT_ESW_EGRESS_ACL, vport_idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5_fs_ingress_acls_init(struct mlx5_core_dev *dev, int total_vports)</div><div class='add'>+int mlx5_fs_vport_ingress_acl_ns_add(struct mlx5_flow_steering *steering,</div><div class='add'>+				     u16 vport_idx)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_flow_steering *steering = dev-&gt;priv.steering;</div><div class='del'>-	int err;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	steering-&gt;esw_ingress_root_ns =</div><div class='del'>-			kcalloc(total_vports,</div><div class='del'>-				sizeof(*steering-&gt;esw_ingress_root_ns),</div><div class='del'>-				GFP_KERNEL);</div><div class='del'>-	if (!steering-&gt;esw_ingress_root_ns)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; total_vports; i++) {</div><div class='del'>-		err = init_ingress_acl_root_ns(steering, i);</div><div class='del'>-		if (err)</div><div class='del'>-			goto cleanup_root_ns;</div><div class='del'>-	}</div><div class='del'>-	steering-&gt;esw_ingress_acl_vports = total_vports;</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-cleanup_root_ns:</div><div class='del'>-	for (i--; i &gt;= 0; i--)</div><div class='del'>-		cleanup_root_ns(steering-&gt;esw_ingress_root_ns[i]);</div><div class='del'>-	kfree(steering-&gt;esw_ingress_root_ns);</div><div class='del'>-	steering-&gt;esw_ingress_root_ns = NULL;</div><div class='del'>-	return err;</div><div class='add'>+	return mlx5_fs_add_vport_acl_root_ns(steering,</div><div class='add'>+					     &amp;steering-&gt;esw_ingress_root_ns,</div><div class='add'>+					     FS_FT_ESW_INGRESS_ACL, vport_idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5_fs_ingress_acls_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+void mlx5_fs_vport_egress_acl_ns_remove(struct mlx5_flow_steering *steering,</div><div class='add'>+					int vport_idx)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_flow_steering *steering = dev-&gt;priv.steering;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!steering-&gt;esw_ingress_root_ns)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; steering-&gt;esw_ingress_acl_vports; i++)</div><div class='del'>-		cleanup_root_ns(steering-&gt;esw_ingress_root_ns[i]);</div><div class='add'>+	mlx5_fs_remove_vport_acl_root_ns(&amp;steering-&gt;esw_egress_root_ns,</div><div class='add'>+					 vport_idx);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	kfree(steering-&gt;esw_ingress_root_ns);</div><div class='del'>-	steering-&gt;esw_ingress_root_ns = NULL;</div><div class='add'>+void mlx5_fs_vport_ingress_acl_ns_remove(struct mlx5_flow_steering *steering,</div><div class='add'>+					 int vport_idx)</div><div class='add'>+{</div><div class='add'>+	mlx5_fs_remove_vport_acl_root_ns(&amp;steering-&gt;esw_ingress_root_ns,</div><div class='add'>+					 vport_idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u32 mlx5_fs_get_capabilities(struct mlx5_core_dev *dev, enum mlx5_flow_namespace_type type)</div><div class='hunk'>@@ -3519,35 +3777,41 @@ static int mlx5_fs_mode_validate(struct devlink *devlink, u32 id,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='ctx'> 	char *value = val.vstr;</div><div class='del'>-	int err = 0;</div><div class='add'>+	u8 eswitch_mode;</div><div class='ctx'> </div><div class='del'>-	if (!strcmp(value, "dmfs")) {</div><div class='add'>+	eswitch_mode = mlx5_eswitch_mode(dev);</div><div class='add'>+	if (eswitch_mode == MLX5_ESWITCH_OFFLOADS) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "Changing fs mode is not supported when eswitch offloads enabled.");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!strcmp(value, "dmfs"))</div><div class='ctx'> 		return 0;</div><div class='del'>-	} else if (!strcmp(value, "smfs")) {</div><div class='del'>-		u8 eswitch_mode;</div><div class='del'>-		bool smfs_cap;</div><div class='ctx'> </div><div class='del'>-		eswitch_mode = mlx5_eswitch_mode(dev);</div><div class='del'>-		smfs_cap = mlx5_fs_dr_is_supported(dev);</div><div class='add'>+	if (!strcmp(value, "smfs")) {</div><div class='add'>+		bool smfs_cap = mlx5_fs_dr_is_supported(dev);</div><div class='ctx'> </div><div class='ctx'> 		if (!smfs_cap) {</div><div class='del'>-			err = -EOPNOTSUPP;</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack,</div><div class='ctx'> 					   "Software managed steering is not supported by current device");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='add'>+	} else if (!strcmp(value, "hmfs")) {</div><div class='add'>+		bool hmfs_cap = mlx5_fs_hws_is_supported(dev);</div><div class='ctx'> </div><div class='del'>-		else if (eswitch_mode == MLX5_ESWITCH_OFFLOADS) {</div><div class='add'>+		if (!hmfs_cap) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack,</div><div class='del'>-					   "Software managed steering is not supported when eswitch offloads enabled.");</div><div class='del'>-			err = -EOPNOTSUPP;</div><div class='add'>+					   "Hardware steering is not supported by current device");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack,</div><div class='del'>-				   "Bad parameter: supported values are [\"dmfs\", \"smfs\"]");</div><div class='del'>-		err = -EINVAL;</div><div class='add'>+				   "Bad parameter: supported values are [\"dmfs\", \"smfs\", \"hmfs\"]");</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_fs_mode_set(struct devlink *devlink, u32 id,</div><div class='hunk'>@@ -3559,6 +3823,8 @@ static int mlx5_fs_mode_set(struct devlink *devlink, u32 id,</div><div class='ctx'> </div><div class='ctx'> 	if (!strcmp(ctx-&gt;val.vstr, "smfs"))</div><div class='ctx'> 		mode = MLX5_FLOW_STEERING_MODE_SMFS;</div><div class='add'>+	else if (!strcmp(ctx-&gt;val.vstr, "hmfs"))</div><div class='add'>+		mode = MLX5_FLOW_STEERING_MODE_HMFS;</div><div class='ctx'> 	else</div><div class='ctx'> 		mode = MLX5_FLOW_STEERING_MODE_DMFS;</div><div class='ctx'> 	dev-&gt;priv.steering-&gt;mode = mode;</div><div class='hunk'>@@ -3567,14 +3833,22 @@ static int mlx5_fs_mode_set(struct devlink *devlink, u32 id,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_fs_mode_get(struct devlink *devlink, u32 id,</div><div class='del'>-			    struct devlink_param_gset_ctx *ctx)</div><div class='add'>+			    struct devlink_param_gset_ctx *ctx,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;priv.steering-&gt;mode == MLX5_FLOW_STEERING_MODE_SMFS)</div><div class='add'>+	switch (dev-&gt;priv.steering-&gt;mode) {</div><div class='add'>+	case MLX5_FLOW_STEERING_MODE_SMFS:</div><div class='ctx'> 		strscpy(ctx-&gt;val.vstr, "smfs", sizeof(ctx-&gt;val.vstr));</div><div class='del'>-	else</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_FLOW_STEERING_MODE_HMFS:</div><div class='add'>+		strscpy(ctx-&gt;val.vstr, "hmfs", sizeof(ctx-&gt;val.vstr));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='ctx'> 		strscpy(ctx-&gt;val.vstr, "dmfs", sizeof(ctx-&gt;val.vstr));</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3590,6 +3864,11 @@ void mlx5_fs_core_cleanup(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_flow_steering *steering = dev-&gt;priv.steering;</div><div class='ctx'> </div><div class='add'>+	WARN_ON(!xa_empty(&amp;steering-&gt;esw_egress_root_ns));</div><div class='add'>+	WARN_ON(!xa_empty(&amp;steering-&gt;esw_ingress_root_ns));</div><div class='add'>+	xa_destroy(&amp;steering-&gt;esw_egress_root_ns);</div><div class='add'>+	xa_destroy(&amp;steering-&gt;esw_ingress_root_ns);</div><div class='add'>+</div><div class='ctx'> 	cleanup_root_ns(steering-&gt;root_ns);</div><div class='ctx'> 	cleanup_fdb_root_ns(steering);</div><div class='ctx'> 	cleanup_root_ns(steering-&gt;port_sel_root_ns);</div><div class='hunk'>@@ -3598,6 +3877,7 @@ void mlx5_fs_core_cleanup(struct mlx5_core_dev *dev)</div><div class='ctx'> 	cleanup_root_ns(steering-&gt;rdma_rx_root_ns);</div><div class='ctx'> 	cleanup_root_ns(steering-&gt;rdma_tx_root_ns);</div><div class='ctx'> 	cleanup_root_ns(steering-&gt;egress_root_ns);</div><div class='add'>+	cleanup_rdma_transport_roots_ns(steering);</div><div class='ctx'> </div><div class='ctx'> 	devl_params_unregister(priv_to_devlink(dev), mlx5_fs_params,</div><div class='ctx'> 			       ARRAY_SIZE(mlx5_fs_params));</div><div class='hunk'>@@ -3649,8 +3929,7 @@ int mlx5_fs_core_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (MLX5_CAP_FLOWTABLE_RDMA_RX(dev, ft_support) &amp;&amp;</div><div class='del'>-	    MLX5_CAP_FLOWTABLE_RDMA_RX(dev, table_miss_action_domain)) {</div><div class='add'>+	if (MLX5_CAP_FLOWTABLE_RDMA_RX(dev, ft_support)) {</div><div class='ctx'> 		err = init_rdma_rx_root_ns(steering);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err;</div><div class='hunk'>@@ -3668,6 +3947,20 @@ int mlx5_fs_core_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (MLX5_CAP_FLOWTABLE_RDMA_TRANSPORT_RX(dev, ft_support)) {</div><div class='add'>+		err = init_rdma_transport_rx_root_ns(steering);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (MLX5_CAP_FLOWTABLE_RDMA_TRANSPORT_TX(dev, ft_support)) {</div><div class='add'>+		err = init_rdma_transport_tx_root_ns(steering);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xa_init(&amp;steering-&gt;esw_egress_root_ns);</div><div class='add'>+	xa_init(&amp;steering-&gt;esw_ingress_root_ns);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='hunk'>@@ -3711,6 +4004,8 @@ int mlx5_fs_core_alloc(struct mlx5_core_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5_fs_dr_is_supported(dev))</div><div class='ctx'> 		steering-&gt;mode = MLX5_FLOW_STEERING_MODE_SMFS;</div><div class='add'>+	else if (mlx5_fs_hws_is_supported(dev))</div><div class='add'>+		steering-&gt;mode = MLX5_FLOW_STEERING_MODE_HMFS;</div><div class='ctx'> 	else</div><div class='ctx'> 		steering-&gt;mode = MLX5_FLOW_STEERING_MODE_DMFS;</div><div class='ctx'> </div><div class='hunk'>@@ -3818,8 +4113,10 @@ mlx5_get_root_namespace(struct mlx5_core_dev *dev, enum mlx5_flow_namespace_type</div><div class='ctx'> 	struct mlx5_flow_namespace *ns;</div><div class='ctx'> </div><div class='ctx'> 	if (ns_type == MLX5_FLOW_NAMESPACE_ESW_EGRESS ||</div><div class='del'>-	    ns_type == MLX5_FLOW_NAMESPACE_ESW_INGRESS)</div><div class='del'>-		ns = mlx5_get_flow_vport_acl_namespace(dev, ns_type, 0);</div><div class='add'>+	    ns_type == MLX5_FLOW_NAMESPACE_ESW_INGRESS ||</div><div class='add'>+	    ns_type == MLX5_FLOW_NAMESPACE_RDMA_TRANSPORT_TX ||</div><div class='add'>+	    ns_type == MLX5_FLOW_NAMESPACE_RDMA_TRANSPORT_RX)</div><div class='add'>+		ns = mlx5_get_flow_vport_namespace(dev, ns_type, 0);</div><div class='ctx'> 	else</div><div class='ctx'> 		ns = mlx5_get_flow_namespace(dev, ns_type);</div><div class='ctx'> 	if (!ns)</div><div class='hunk'>@@ -3994,6 +4291,8 @@ int mlx5_flow_namespace_set_mode(struct mlx5_flow_namespace *ns,</div><div class='ctx'> </div><div class='ctx'> 	if (mode == MLX5_FLOW_STEERING_MODE_SMFS)</div><div class='ctx'> 		cmds = mlx5_fs_cmd_get_dr_cmds();</div><div class='add'>+	else if (mode == MLX5_FLOW_STEERING_MODE_HMFS)</div><div class='add'>+		cmds = mlx5_fs_cmd_get_hws_cmds();</div><div class='ctx'> 	else</div><div class='ctx'> 		cmds = mlx5_fs_cmd_get_fw_cmds();</div><div class='ctx'> 	if (!cmds)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h b/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h<br/>index b30976627c6b..1c6591425260 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.h</a></div><div class='hunk'>@@ -37,7 +37,8 @@</div><div class='ctx'> #include &lt;linux/mlx5/fs.h&gt;</div><div class='ctx'> #include &lt;linux/rhashtable.h&gt;</div><div class='ctx'> #include &lt;linux/llist.h&gt;</div><div class='del'>-#include &lt;steering/fs_dr.h&gt;</div><div class='add'>+#include &lt;steering/sws/fs_dr.h&gt;</div><div class='add'>+#include &lt;steering/hws/fs_hws.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define FDB_TC_MAX_CHAIN 3</div><div class='ctx'> #define FDB_FT_CHAIN (FDB_TC_MAX_CHAIN + 1)</div><div class='hunk'>@@ -57,6 +58,7 @@ struct mlx5_flow_definer {</div><div class='ctx'> enum mlx5_flow_resource_owner {</div><div class='ctx'> 	MLX5_FLOW_RESOURCE_OWNER_FW,</div><div class='ctx'> 	MLX5_FLOW_RESOURCE_OWNER_SW,</div><div class='add'>+	MLX5_FLOW_RESOURCE_OWNER_HWS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5_modify_hdr {</div><div class='hunk'>@@ -64,6 +66,7 @@ struct mlx5_modify_hdr {</div><div class='ctx'> 	enum mlx5_flow_resource_owner owner;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct mlx5_fs_dr_action fs_dr_action;</div><div class='add'>+		struct mlx5_fs_hws_action fs_hws_action;</div><div class='ctx'> 		u32 id;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -74,6 +77,7 @@ struct mlx5_pkt_reformat {</div><div class='ctx'> 	enum mlx5_flow_resource_owner owner;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct mlx5_fs_dr_action fs_dr_action;</div><div class='add'>+		struct mlx5_fs_hws_action fs_hws_action;</div><div class='ctx'> 		u32 id;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='hunk'>@@ -99,22 +103,6 @@ enum fs_node_type {</div><div class='ctx'> 	FS_TYPE_FLOW_DEST</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum fs_flow_table_type {</div><div class='del'>-	FS_FT_NIC_RX          = 0x0,</div><div class='del'>-	FS_FT_NIC_TX          = 0x1,</div><div class='del'>-	FS_FT_ESW_EGRESS_ACL  = 0x2,</div><div class='del'>-	FS_FT_ESW_INGRESS_ACL = 0x3,</div><div class='del'>-	FS_FT_FDB             = 0X4,</div><div class='del'>-	FS_FT_SNIFFER_RX	= 0X5,</div><div class='del'>-	FS_FT_SNIFFER_TX	= 0X6,</div><div class='del'>-	FS_FT_RDMA_RX		= 0X7,</div><div class='del'>-	FS_FT_RDMA_TX		= 0X8,</div><div class='del'>-	FS_FT_PORT_SEL		= 0X9,</div><div class='del'>-	FS_FT_FDB_RX		= 0xa,</div><div class='del'>-	FS_FT_FDB_TX		= 0xb,</div><div class='del'>-	FS_FT_MAX_TYPE = FS_FT_FDB_TX,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum fs_flow_table_op_mod {</div><div class='ctx'> 	FS_FT_OP_MOD_NORMAL,</div><div class='ctx'> 	FS_FT_OP_MOD_LAG_DEMUX,</div><div class='hunk'>@@ -126,7 +114,8 @@ enum fs_fte_status {</div><div class='ctx'> </div><div class='ctx'> enum mlx5_flow_steering_mode {</div><div class='ctx'> 	MLX5_FLOW_STEERING_MODE_DMFS,</div><div class='del'>-	MLX5_FLOW_STEERING_MODE_SMFS</div><div class='add'>+	MLX5_FLOW_STEERING_MODE_SMFS,</div><div class='add'>+	MLX5_FLOW_STEERING_MODE_HMFS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum mlx5_flow_steering_capabilty {</div><div class='hunk'>@@ -144,16 +133,18 @@ struct mlx5_flow_steering {</div><div class='ctx'> 	struct mlx5_flow_root_namespace *root_ns;</div><div class='ctx'> 	struct mlx5_flow_root_namespace *fdb_root_ns;</div><div class='ctx'> 	struct mlx5_flow_namespace	**fdb_sub_ns;</div><div class='del'>-	struct mlx5_flow_root_namespace **esw_egress_root_ns;</div><div class='del'>-	struct mlx5_flow_root_namespace **esw_ingress_root_ns;</div><div class='add'>+	struct xarray			esw_egress_root_ns;</div><div class='add'>+	struct xarray			esw_ingress_root_ns;</div><div class='ctx'> 	struct mlx5_flow_root_namespace	*sniffer_tx_root_ns;</div><div class='ctx'> 	struct mlx5_flow_root_namespace	*sniffer_rx_root_ns;</div><div class='ctx'> 	struct mlx5_flow_root_namespace	*rdma_rx_root_ns;</div><div class='ctx'> 	struct mlx5_flow_root_namespace	*rdma_tx_root_ns;</div><div class='ctx'> 	struct mlx5_flow_root_namespace	*egress_root_ns;</div><div class='ctx'> 	struct mlx5_flow_root_namespace	*port_sel_root_ns;</div><div class='del'>-	int esw_egress_acl_vports;</div><div class='del'>-	int esw_ingress_acl_vports;</div><div class='add'>+	struct mlx5_flow_root_namespace **rdma_transport_rx_root_ns;</div><div class='add'>+	struct mlx5_flow_root_namespace **rdma_transport_tx_root_ns;</div><div class='add'>+	int rdma_transport_rx_vports;</div><div class='add'>+	int rdma_transport_tx_vports;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct fs_node {</div><div class='hunk'>@@ -190,9 +181,13 @@ struct mlx5_flow_handle {</div><div class='ctx'> /* Type of children is mlx5_flow_group */</div><div class='ctx'> struct mlx5_flow_table {</div><div class='ctx'> 	struct fs_node			node;</div><div class='del'>-	struct mlx5_fs_dr_table		fs_dr_table;</div><div class='add'>+	union {</div><div class='add'>+		struct mlx5_fs_dr_table		fs_dr_table;</div><div class='add'>+		struct mlx5_fs_hws_table	fs_hws_table;</div><div class='add'>+	};</div><div class='ctx'> 	u32				id;</div><div class='ctx'> 	u16				vport;</div><div class='add'>+	u16				esw_owner_vhca_id;</div><div class='ctx'> 	unsigned int			max_fte;</div><div class='ctx'> 	unsigned int			level;</div><div class='ctx'> 	enum fs_flow_table_type		type;</div><div class='hunk'>@@ -247,7 +242,10 @@ struct fs_fte_dup {</div><div class='ctx'> /* Type of children is mlx5_flow_rule */</div><div class='ctx'> struct fs_fte {</div><div class='ctx'> 	struct fs_node			node;</div><div class='del'>-	struct mlx5_fs_dr_rule		fs_dr_rule;</div><div class='add'>+	union {</div><div class='add'>+		struct mlx5_fs_dr_rule		fs_dr_rule;</div><div class='add'>+		struct mlx5_fs_hws_rule		fs_hws_rule;</div><div class='add'>+	};</div><div class='ctx'> 	u32				val[MLX5_ST_SZ_DW_MATCH_PARAM];</div><div class='ctx'> 	struct fs_fte_action		act_dests;</div><div class='ctx'> 	struct fs_fte_dup		*dup;</div><div class='hunk'>@@ -280,7 +278,10 @@ struct mlx5_flow_group_mask {</div><div class='ctx'> /* Type of children is fs_fte */</div><div class='ctx'> struct mlx5_flow_group {</div><div class='ctx'> 	struct fs_node			node;</div><div class='del'>-	struct mlx5_fs_dr_matcher	fs_dr_matcher;</div><div class='add'>+	union {</div><div class='add'>+		struct mlx5_fs_dr_matcher	fs_dr_matcher;</div><div class='add'>+		struct mlx5_fs_hws_matcher	fs_hws_matcher;</div><div class='add'>+	};</div><div class='ctx'> 	struct mlx5_flow_group_mask	mask;</div><div class='ctx'> 	u32				start_index;</div><div class='ctx'> 	u32				max_ftes;</div><div class='hunk'>@@ -293,7 +294,10 @@ struct mlx5_flow_group {</div><div class='ctx'> struct mlx5_flow_root_namespace {</div><div class='ctx'> 	struct mlx5_flow_namespace	ns;</div><div class='ctx'> 	enum   mlx5_flow_steering_mode	mode;</div><div class='del'>-	struct mlx5_fs_dr_domain	fs_dr_domain;</div><div class='add'>+	union {</div><div class='add'>+		struct mlx5_fs_dr_domain	fs_dr_domain;</div><div class='add'>+		struct mlx5_fs_hws_context	fs_hws_context;</div><div class='add'>+	};</div><div class='ctx'> 	enum   fs_flow_table_type	table_type;</div><div class='ctx'> 	struct mlx5_core_dev		*dev;</div><div class='ctx'> 	struct mlx5_flow_table		*root_ft;</div><div class='hunk'>@@ -303,6 +307,37 @@ struct mlx5_flow_root_namespace {</div><div class='ctx'> 	const struct mlx5_flow_cmds	*cmds;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum mlx5_fc_type {</div><div class='add'>+	MLX5_FC_TYPE_ACQUIRED = 0,</div><div class='add'>+	MLX5_FC_TYPE_LOCAL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fc_cache {</div><div class='add'>+	u64 packets;</div><div class='add'>+	u64 bytes;</div><div class='add'>+	u64 lastuse;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fc {</div><div class='add'>+	u32 id;</div><div class='add'>+	bool aging;</div><div class='add'>+	enum mlx5_fc_type type;</div><div class='add'>+	struct mlx5_fc_bulk *bulk;</div><div class='add'>+	struct mlx5_fc_cache cache;</div><div class='add'>+	refcount_t fc_local_refcount;</div><div class='add'>+	/* last{packets,bytes} are used for calculating deltas since last reading. */</div><div class='add'>+	u64 lastpackets;</div><div class='add'>+	u64 lastbytes;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fc_bulk {</div><div class='add'>+	struct mlx5_fs_bulk fs_bulk;</div><div class='add'>+	u32 base_id;</div><div class='add'>+	struct mlx5_fs_hws_data hws_data;</div><div class='add'>+	struct mlx5_fc fcs[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u32 mlx5_fc_get_base_id(struct mlx5_fc *counter);</div><div class='ctx'> int mlx5_init_fc_stats(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_cleanup_fc_stats(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_fc_queue_stats_work(struct mlx5_core_dev *dev,</div><div class='hunk'>@@ -325,15 +360,22 @@ void mlx5_fs_core_free(struct mlx5_core_dev *dev);</div><div class='ctx'> int mlx5_fs_core_init(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_fs_core_cleanup(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='del'>-int mlx5_fs_egress_acls_init(struct mlx5_core_dev *dev, int total_vports);</div><div class='del'>-void mlx5_fs_egress_acls_cleanup(struct mlx5_core_dev *dev);</div><div class='del'>-int mlx5_fs_ingress_acls_init(struct mlx5_core_dev *dev, int total_vports);</div><div class='del'>-void mlx5_fs_ingress_acls_cleanup(struct mlx5_core_dev *dev);</div><div class='add'>+int mlx5_fs_vport_egress_acl_ns_add(struct mlx5_flow_steering *steering,</div><div class='add'>+				    u16 vport_idx);</div><div class='add'>+int mlx5_fs_vport_ingress_acl_ns_add(struct mlx5_flow_steering *steering,</div><div class='add'>+				     u16 vport_idx);</div><div class='add'>+void mlx5_fs_vport_egress_acl_ns_remove(struct mlx5_flow_steering *steering,</div><div class='add'>+					int vport_idx);</div><div class='add'>+void mlx5_fs_vport_ingress_acl_ns_remove(struct mlx5_flow_steering *steering,</div><div class='add'>+					 int vport_idx);</div><div class='ctx'> </div><div class='ctx'> u32 mlx5_fs_get_capabilities(struct mlx5_core_dev *dev, enum mlx5_flow_namespace_type type);</div><div class='ctx'> </div><div class='ctx'> struct mlx5_flow_root_namespace *find_root(struct fs_node *node);</div><div class='ctx'> </div><div class='add'>+int mlx5_fs_get_packet_reformat_id(struct mlx5_pkt_reformat *pkt_reformat,</div><div class='add'>+				   u32 *id);</div><div class='add'>+</div><div class='ctx'> #define fs_get_obj(v, _node)  {v = container_of((_node), typeof(*v), node); }</div><div class='ctx'> </div><div class='ctx'> #define fs_list_for_each_entry(pos, root)		\</div><div class='hunk'>@@ -382,7 +424,9 @@ struct mlx5_flow_root_namespace *find_root(struct fs_node *node);</div><div class='ctx'> 	(type == FS_FT_PORT_SEL) ? MLX5_CAP_FLOWTABLE_PORT_SELECTION(mdev, cap) :      \</div><div class='ctx'> 	(type == FS_FT_FDB_RX) ? MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, cap) :      \</div><div class='ctx'> 	(type == FS_FT_FDB_TX) ? MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, cap) :      \</div><div class='del'>-	(BUILD_BUG_ON_ZERO(FS_FT_FDB_TX != FS_FT_MAX_TYPE))\</div><div class='add'>+	(type == FS_FT_RDMA_TRANSPORT_RX) ? MLX5_CAP_FLOWTABLE_RDMA_TRANSPORT_RX(mdev, cap) :      \</div><div class='add'>+	(type == FS_FT_RDMA_TRANSPORT_TX) ? MLX5_CAP_FLOWTABLE_RDMA_TRANSPORT_TX(mdev, cap) :      \</div><div class='add'>+	(BUILD_BUG_ON_ZERO(FS_FT_RDMA_TRANSPORT_TX != FS_FT_MAX_TYPE))\</div><div class='ctx'> 	)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c<br/>index 62d0c689796b..83001eda3884 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c</a></div><div class='hunk'>@@ -34,6 +34,7 @@</div><div class='ctx'> #include &lt;linux/mlx5/fs.h&gt;</div><div class='ctx'> #include "mlx5_core.h"</div><div class='ctx'> #include "fs_core.h"</div><div class='add'>+#include "fs_pool.h"</div><div class='ctx'> #include "fs_cmd.h"</div><div class='ctx'> </div><div class='ctx'> #define MLX5_FC_STATS_PERIOD msecs_to_jiffies(1000)</div><div class='hunk'>@@ -43,33 +44,6 @@</div><div class='ctx'> #define MLX5_FC_POOL_MAX_THRESHOLD BIT(18)</div><div class='ctx'> #define MLX5_FC_POOL_USED_BUFF_RATIO 10</div><div class='ctx'> </div><div class='del'>-struct mlx5_fc_cache {</div><div class='del'>-	u64 packets;</div><div class='del'>-	u64 bytes;</div><div class='del'>-	u64 lastuse;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5_fc {</div><div class='del'>-	u32 id;</div><div class='del'>-	bool aging;</div><div class='del'>-	struct mlx5_fc_bulk *bulk;</div><div class='del'>-	struct mlx5_fc_cache cache;</div><div class='del'>-	/* last{packets,bytes} are used for calculating deltas since last reading. */</div><div class='del'>-	u64 lastpackets;</div><div class='del'>-	u64 lastbytes;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5_fc_pool {</div><div class='del'>-	struct mlx5_core_dev *dev;</div><div class='del'>-	struct mutex pool_lock; /* protects pool lists */</div><div class='del'>-	struct list_head fully_used;</div><div class='del'>-	struct list_head partially_used;</div><div class='del'>-	struct list_head unused;</div><div class='del'>-	int available_fcs;</div><div class='del'>-	int used_fcs;</div><div class='del'>-	int threshold;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct mlx5_fc_stats {</div><div class='ctx'> 	struct xarray counters;</div><div class='ctx'> </div><div class='hunk'>@@ -80,13 +54,13 @@ struct mlx5_fc_stats {</div><div class='ctx'> 	int bulk_query_len;</div><div class='ctx'> 	bool bulk_query_alloc_failed;</div><div class='ctx'> 	unsigned long next_bulk_query_alloc;</div><div class='del'>-	struct mlx5_fc_pool fc_pool;</div><div class='add'>+	struct mlx5_fs_pool fc_pool;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void mlx5_fc_pool_init(struct mlx5_fc_pool *fc_pool, struct mlx5_core_dev *dev);</div><div class='del'>-static void mlx5_fc_pool_cleanup(struct mlx5_fc_pool *fc_pool);</div><div class='del'>-static struct mlx5_fc *mlx5_fc_pool_acquire_counter(struct mlx5_fc_pool *fc_pool);</div><div class='del'>-static void mlx5_fc_pool_release_counter(struct mlx5_fc_pool *fc_pool, struct mlx5_fc *fc);</div><div class='add'>+static void mlx5_fc_pool_init(struct mlx5_fs_pool *fc_pool, struct mlx5_core_dev *dev);</div><div class='add'>+static void mlx5_fc_pool_cleanup(struct mlx5_fs_pool *fc_pool);</div><div class='add'>+static struct mlx5_fc *mlx5_fc_pool_acquire_counter(struct mlx5_fs_pool *fc_pool);</div><div class='add'>+static void mlx5_fc_pool_release_counter(struct mlx5_fs_pool *fc_pool, struct mlx5_fc *fc);</div><div class='ctx'> </div><div class='ctx'> static int get_init_bulk_query_len(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -186,6 +160,9 @@ static void mlx5_fc_release(struct mlx5_core_dev *dev, struct mlx5_fc *counter)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_fc_stats *fc_stats = dev-&gt;priv.fc_stats;</div><div class='ctx'> </div><div class='add'>+	if (WARN_ON(counter-&gt;type == MLX5_FC_TYPE_LOCAL))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	if (counter-&gt;bulk)</div><div class='ctx'> 		mlx5_fc_pool_release_counter(&amp;fc_stats-&gt;fc_pool, counter);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -435,15 +412,7 @@ void mlx5_fc_update_sampling_interval(struct mlx5_core_dev *dev,</div><div class='ctx'> 					    fc_stats-&gt;sampling_interval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Flow counter bluks */</div><div class='del'>-</div><div class='del'>-struct mlx5_fc_bulk {</div><div class='del'>-	struct list_head pool_list;</div><div class='del'>-	u32 base_id;</div><div class='del'>-	int bulk_len;</div><div class='del'>-	unsigned long *bitmask;</div><div class='del'>-	struct mlx5_fc fcs[] __counted_by(bulk_len);</div><div class='del'>-};</div><div class='add'>+/* Flow counter bulks */</div><div class='ctx'> </div><div class='ctx'> static void mlx5_fc_init(struct mlx5_fc *counter, struct mlx5_fc_bulk *bulk,</div><div class='ctx'> 			 u32 id)</div><div class='hunk'>@@ -452,16 +421,16 @@ static void mlx5_fc_init(struct mlx5_fc *counter, struct mlx5_fc_bulk *bulk,</div><div class='ctx'> 	counter-&gt;id = id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5_fc_bulk_get_free_fcs_amount(struct mlx5_fc_bulk *bulk)</div><div class='add'>+u32 mlx5_fc_get_base_id(struct mlx5_fc *counter)</div><div class='ctx'> {</div><div class='del'>-	return bitmap_weight(bulk-&gt;bitmask, bulk-&gt;bulk_len);</div><div class='add'>+	return counter-&gt;bulk-&gt;base_id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct mlx5_fc_bulk *mlx5_fc_bulk_create(struct mlx5_core_dev *dev)</div><div class='add'>+static struct mlx5_fs_bulk *mlx5_fc_bulk_create(struct mlx5_core_dev *dev,</div><div class='add'>+						void *pool_ctx)</div><div class='ctx'> {</div><div class='ctx'> 	enum mlx5_fc_bulk_alloc_bitmask alloc_bitmask;</div><div class='del'>-	struct mlx5_fc_bulk *bulk;</div><div class='del'>-	int err = -ENOMEM;</div><div class='add'>+	struct mlx5_fc_bulk *fc_bulk;</div><div class='ctx'> 	int bulk_len;</div><div class='ctx'> 	u32 base_id;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -469,207 +438,160 @@ static struct mlx5_fc_bulk *mlx5_fc_bulk_create(struct mlx5_core_dev *dev)</div><div class='ctx'> 	alloc_bitmask = MLX5_CAP_GEN(dev, flow_counter_bulk_alloc);</div><div class='ctx'> 	bulk_len = alloc_bitmask &gt; 0 ? MLX5_FC_BULK_NUM_FCS(alloc_bitmask) : 1;</div><div class='ctx'> </div><div class='del'>-	bulk = kvzalloc(struct_size(bulk, fcs, bulk_len), GFP_KERNEL);</div><div class='del'>-	if (!bulk)</div><div class='del'>-		goto err_alloc_bulk;</div><div class='del'>-</div><div class='del'>-	bulk-&gt;bitmask = kvcalloc(BITS_TO_LONGS(bulk_len), sizeof(unsigned long),</div><div class='del'>-				 GFP_KERNEL);</div><div class='del'>-	if (!bulk-&gt;bitmask)</div><div class='del'>-		goto err_alloc_bitmask;</div><div class='add'>+	fc_bulk = kvzalloc(struct_size(fc_bulk, fcs, bulk_len), GFP_KERNEL);</div><div class='add'>+	if (!fc_bulk)</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_cmd_fc_bulk_alloc(dev, alloc_bitmask, &amp;base_id);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_mlx5_cmd_bulk_alloc;</div><div class='add'>+	if (mlx5_fs_bulk_init(dev, &amp;fc_bulk-&gt;fs_bulk, bulk_len))</div><div class='add'>+		goto fc_bulk_free;</div><div class='ctx'> </div><div class='del'>-	bulk-&gt;base_id = base_id;</div><div class='del'>-	bulk-&gt;bulk_len = bulk_len;</div><div class='del'>-	for (i = 0; i &lt; bulk_len; i++) {</div><div class='del'>-		mlx5_fc_init(&amp;bulk-&gt;fcs[i], bulk, base_id + i);</div><div class='del'>-		set_bit(i, bulk-&gt;bitmask);</div><div class='del'>-	}</div><div class='add'>+	if (mlx5_cmd_fc_bulk_alloc(dev, alloc_bitmask, &amp;base_id))</div><div class='add'>+		goto fs_bulk_cleanup;</div><div class='add'>+	fc_bulk-&gt;base_id = base_id;</div><div class='add'>+	for (i = 0; i &lt; bulk_len; i++)</div><div class='add'>+		mlx5_fc_init(&amp;fc_bulk-&gt;fcs[i], fc_bulk, base_id + i);</div><div class='ctx'> </div><div class='del'>-	return bulk;</div><div class='add'>+	refcount_set(&amp;fc_bulk-&gt;hws_data.hws_action_refcount, 0);</div><div class='add'>+	mutex_init(&amp;fc_bulk-&gt;hws_data.lock);</div><div class='add'>+	return &amp;fc_bulk-&gt;fs_bulk;</div><div class='ctx'> </div><div class='del'>-err_mlx5_cmd_bulk_alloc:</div><div class='del'>-	kvfree(bulk-&gt;bitmask);</div><div class='del'>-err_alloc_bitmask:</div><div class='del'>-	kvfree(bulk);</div><div class='del'>-err_alloc_bulk:</div><div class='del'>-	return ERR_PTR(err);</div><div class='add'>+fs_bulk_cleanup:</div><div class='add'>+	mlx5_fs_bulk_cleanup(&amp;fc_bulk-&gt;fs_bulk);</div><div class='add'>+fc_bulk_free:</div><div class='add'>+	kvfree(fc_bulk);</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-mlx5_fc_bulk_destroy(struct mlx5_core_dev *dev, struct mlx5_fc_bulk *bulk)</div><div class='add'>+mlx5_fc_bulk_destroy(struct mlx5_core_dev *dev, struct mlx5_fs_bulk *fs_bulk)</div><div class='ctx'> {</div><div class='del'>-	if (mlx5_fc_bulk_get_free_fcs_amount(bulk) &lt; bulk-&gt;bulk_len) {</div><div class='add'>+	struct mlx5_fc_bulk *fc_bulk = container_of(fs_bulk,</div><div class='add'>+						    struct mlx5_fc_bulk,</div><div class='add'>+						    fs_bulk);</div><div class='add'>+</div><div class='add'>+	if (mlx5_fs_bulk_get_free_amount(fs_bulk) &lt; fs_bulk-&gt;bulk_len) {</div><div class='ctx'> 		mlx5_core_err(dev, "Freeing bulk before all counters were released\n");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx5_cmd_fc_free(dev, bulk-&gt;base_id);</div><div class='del'>-	kvfree(bulk-&gt;bitmask);</div><div class='del'>-	kvfree(bulk);</div><div class='add'>+	mlx5_cmd_fc_free(dev, fc_bulk-&gt;base_id);</div><div class='add'>+	mlx5_fs_bulk_cleanup(fs_bulk);</div><div class='add'>+	kvfree(fc_bulk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct mlx5_fc *mlx5_fc_bulk_acquire_fc(struct mlx5_fc_bulk *bulk)</div><div class='add'>+static void mlx5_fc_pool_update_threshold(struct mlx5_fs_pool *fc_pool)</div><div class='ctx'> {</div><div class='del'>-	int free_fc_index = find_first_bit(bulk-&gt;bitmask, bulk-&gt;bulk_len);</div><div class='del'>-</div><div class='del'>-	if (free_fc_index &gt;= bulk-&gt;bulk_len)</div><div class='del'>-		return ERR_PTR(-ENOSPC);</div><div class='del'>-</div><div class='del'>-	clear_bit(free_fc_index, bulk-&gt;bitmask);</div><div class='del'>-	return &amp;bulk-&gt;fcs[free_fc_index];</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mlx5_fc_bulk_release_fc(struct mlx5_fc_bulk *bulk, struct mlx5_fc *fc)</div><div class='del'>-{</div><div class='del'>-	int fc_index = fc-&gt;id - bulk-&gt;base_id;</div><div class='del'>-</div><div class='del'>-	if (test_bit(fc_index, bulk-&gt;bitmask))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	set_bit(fc_index, bulk-&gt;bitmask);</div><div class='del'>-	return 0;</div><div class='add'>+	fc_pool-&gt;threshold = min_t(int, MLX5_FC_POOL_MAX_THRESHOLD,</div><div class='add'>+				   fc_pool-&gt;used_units / MLX5_FC_POOL_USED_BUFF_RATIO);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Flow counters pool API */</div><div class='ctx'> </div><div class='del'>-static void mlx5_fc_pool_init(struct mlx5_fc_pool *fc_pool, struct mlx5_core_dev *dev)</div><div class='del'>-{</div><div class='del'>-	fc_pool-&gt;dev = dev;</div><div class='del'>-	mutex_init(&amp;fc_pool-&gt;pool_lock);</div><div class='del'>-	INIT_LIST_HEAD(&amp;fc_pool-&gt;fully_used);</div><div class='del'>-	INIT_LIST_HEAD(&amp;fc_pool-&gt;partially_used);</div><div class='del'>-	INIT_LIST_HEAD(&amp;fc_pool-&gt;unused);</div><div class='del'>-	fc_pool-&gt;available_fcs = 0;</div><div class='del'>-	fc_pool-&gt;used_fcs = 0;</div><div class='del'>-	fc_pool-&gt;threshold = 0;</div><div class='del'>-}</div><div class='add'>+static const struct mlx5_fs_pool_ops mlx5_fc_pool_ops = {</div><div class='add'>+	.bulk_destroy = mlx5_fc_bulk_destroy,</div><div class='add'>+	.bulk_create = mlx5_fc_bulk_create,</div><div class='add'>+	.update_threshold = mlx5_fc_pool_update_threshold,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void mlx5_fc_pool_cleanup(struct mlx5_fc_pool *fc_pool)</div><div class='add'>+static void</div><div class='add'>+mlx5_fc_pool_init(struct mlx5_fs_pool *fc_pool, struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev = fc_pool-&gt;dev;</div><div class='del'>-	struct mlx5_fc_bulk *bulk;</div><div class='del'>-	struct mlx5_fc_bulk *tmp;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(bulk, tmp, &amp;fc_pool-&gt;fully_used, pool_list)</div><div class='del'>-		mlx5_fc_bulk_destroy(dev, bulk);</div><div class='del'>-	list_for_each_entry_safe(bulk, tmp, &amp;fc_pool-&gt;partially_used, pool_list)</div><div class='del'>-		mlx5_fc_bulk_destroy(dev, bulk);</div><div class='del'>-	list_for_each_entry_safe(bulk, tmp, &amp;fc_pool-&gt;unused, pool_list)</div><div class='del'>-		mlx5_fc_bulk_destroy(dev, bulk);</div><div class='add'>+	mlx5_fs_pool_init(fc_pool, dev, &amp;mlx5_fc_pool_ops, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_fc_pool_update_threshold(struct mlx5_fc_pool *fc_pool)</div><div class='add'>+static void mlx5_fc_pool_cleanup(struct mlx5_fs_pool *fc_pool)</div><div class='ctx'> {</div><div class='del'>-	fc_pool-&gt;threshold = min_t(int, MLX5_FC_POOL_MAX_THRESHOLD,</div><div class='del'>-				   fc_pool-&gt;used_fcs / MLX5_FC_POOL_USED_BUFF_RATIO);</div><div class='add'>+	mlx5_fs_pool_cleanup(fc_pool);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct mlx5_fc_bulk *</div><div class='del'>-mlx5_fc_pool_alloc_new_bulk(struct mlx5_fc_pool *fc_pool)</div><div class='add'>+static struct mlx5_fc *</div><div class='add'>+mlx5_fc_pool_acquire_counter(struct mlx5_fs_pool *fc_pool)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev = fc_pool-&gt;dev;</div><div class='del'>-	struct mlx5_fc_bulk *new_bulk;</div><div class='add'>+	struct mlx5_fs_pool_index pool_index = {};</div><div class='add'>+	struct mlx5_fc_bulk *fc_bulk;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	new_bulk = mlx5_fc_bulk_create(dev);</div><div class='del'>-	if (!IS_ERR(new_bulk))</div><div class='del'>-		fc_pool-&gt;available_fcs += new_bulk-&gt;bulk_len;</div><div class='del'>-	mlx5_fc_pool_update_threshold(fc_pool);</div><div class='del'>-	return new_bulk;</div><div class='add'>+	err = mlx5_fs_pool_acquire_index(fc_pool, &amp;pool_index);</div><div class='add'>+	if (err)</div><div class='add'>+		return ERR_PTR(err);</div><div class='add'>+	fc_bulk = container_of(pool_index.fs_bulk, struct mlx5_fc_bulk, fs_bulk);</div><div class='add'>+	return &amp;fc_bulk-&gt;fcs[pool_index.index];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-mlx5_fc_pool_free_bulk(struct mlx5_fc_pool *fc_pool, struct mlx5_fc_bulk *bulk)</div><div class='add'>+mlx5_fc_pool_release_counter(struct mlx5_fs_pool *fc_pool, struct mlx5_fc *fc)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_fs_bulk *fs_bulk = &amp;fc-&gt;bulk-&gt;fs_bulk;</div><div class='add'>+	struct mlx5_fs_pool_index pool_index = {};</div><div class='ctx'> 	struct mlx5_core_dev *dev = fc_pool-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	fc_pool-&gt;available_fcs -= bulk-&gt;bulk_len;</div><div class='del'>-	mlx5_fc_bulk_destroy(dev, bulk);</div><div class='del'>-	mlx5_fc_pool_update_threshold(fc_pool);</div><div class='add'>+	pool_index.fs_bulk = fs_bulk;</div><div class='add'>+	pool_index.index = fc-&gt;id - fc-&gt;bulk-&gt;base_id;</div><div class='add'>+	if (mlx5_fs_pool_release_index(fc_pool, &amp;pool_index))</div><div class='add'>+		mlx5_core_warn(dev, "Attempted to release a counter which is not acquired\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct mlx5_fc *</div><div class='del'>-mlx5_fc_pool_acquire_from_list(struct list_head *src_list,</div><div class='del'>-			       struct list_head *next_list,</div><div class='del'>-			       bool move_non_full_bulk)</div><div class='add'>+/**</div><div class='add'>+ * mlx5_fc_local_create - Allocate mlx5_fc struct for a counter which</div><div class='add'>+ * was already acquired using its counter id and bulk data.</div><div class='add'>+ *</div><div class='add'>+ * @counter_id: counter acquired counter id</div><div class='add'>+ * @offset: counter offset from bulk base</div><div class='add'>+ * @bulk_size: counter's bulk size as was allocated</div><div class='add'>+ *</div><div class='add'>+ * Return: Pointer to mlx5_fc on success, ERR_PTR otherwise.</div><div class='add'>+ */</div><div class='add'>+struct mlx5_fc *</div><div class='add'>+mlx5_fc_local_create(u32 counter_id, u32 offset, u32 bulk_size)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_fc_bulk *bulk;</div><div class='del'>-	struct mlx5_fc *fc;</div><div class='add'>+	struct mlx5_fc_bulk *fc_bulk;</div><div class='add'>+	struct mlx5_fc *counter;</div><div class='ctx'> </div><div class='del'>-	if (list_empty(src_list))</div><div class='del'>-		return ERR_PTR(-ENODATA);</div><div class='add'>+	counter = kzalloc(sizeof(*counter), GFP_KERNEL);</div><div class='add'>+	if (!counter)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	fc_bulk = kzalloc(sizeof(*fc_bulk), GFP_KERNEL);</div><div class='add'>+	if (!fc_bulk) {</div><div class='add'>+		kfree(counter);</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	bulk = list_first_entry(src_list, struct mlx5_fc_bulk, pool_list);</div><div class='del'>-	fc = mlx5_fc_bulk_acquire_fc(bulk);</div><div class='del'>-	if (move_non_full_bulk || mlx5_fc_bulk_get_free_fcs_amount(bulk) == 0)</div><div class='del'>-		list_move(&amp;bulk-&gt;pool_list, next_list);</div><div class='del'>-	return fc;</div><div class='add'>+	counter-&gt;type = MLX5_FC_TYPE_LOCAL;</div><div class='add'>+	counter-&gt;id = counter_id;</div><div class='add'>+	fc_bulk-&gt;base_id = counter_id - offset;</div><div class='add'>+	fc_bulk-&gt;fs_bulk.bulk_len = bulk_size;</div><div class='add'>+	refcount_set(&amp;fc_bulk-&gt;hws_data.hws_action_refcount, 0);</div><div class='add'>+	mutex_init(&amp;fc_bulk-&gt;hws_data.lock);</div><div class='add'>+	counter-&gt;bulk = fc_bulk;</div><div class='add'>+	refcount_set(&amp;counter-&gt;fc_local_refcount, 1);</div><div class='add'>+	return counter;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(mlx5_fc_local_create);</div><div class='ctx'> </div><div class='del'>-static struct mlx5_fc *</div><div class='del'>-mlx5_fc_pool_acquire_counter(struct mlx5_fc_pool *fc_pool)</div><div class='del'>-{</div><div class='del'>-	struct mlx5_fc_bulk *new_bulk;</div><div class='del'>-	struct mlx5_fc *fc;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;fc_pool-&gt;pool_lock);</div><div class='del'>-</div><div class='del'>-	fc = mlx5_fc_pool_acquire_from_list(&amp;fc_pool-&gt;partially_used,</div><div class='del'>-					    &amp;fc_pool-&gt;fully_used, false);</div><div class='del'>-	if (IS_ERR(fc))</div><div class='del'>-		fc = mlx5_fc_pool_acquire_from_list(&amp;fc_pool-&gt;unused,</div><div class='del'>-						    &amp;fc_pool-&gt;partially_used,</div><div class='del'>-						    true);</div><div class='del'>-	if (IS_ERR(fc)) {</div><div class='del'>-		new_bulk = mlx5_fc_pool_alloc_new_bulk(fc_pool);</div><div class='del'>-		if (IS_ERR(new_bulk)) {</div><div class='del'>-			fc = ERR_CAST(new_bulk);</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='del'>-		fc = mlx5_fc_bulk_acquire_fc(new_bulk);</div><div class='del'>-		list_add(&amp;new_bulk-&gt;pool_list, &amp;fc_pool-&gt;partially_used);</div><div class='del'>-	}</div><div class='del'>-	fc_pool-&gt;available_fcs--;</div><div class='del'>-	fc_pool-&gt;used_fcs++;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;fc_pool-&gt;pool_lock);</div><div class='del'>-	return fc;</div><div class='add'>+void mlx5_fc_local_destroy(struct mlx5_fc *counter)</div><div class='add'>+{</div><div class='add'>+	kfree(counter-&gt;bulk);</div><div class='add'>+	kfree(counter);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(mlx5_fc_local_destroy);</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-mlx5_fc_pool_release_counter(struct mlx5_fc_pool *fc_pool, struct mlx5_fc *fc)</div><div class='add'>+void mlx5_fc_local_get(struct mlx5_fc *counter)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev = fc_pool-&gt;dev;</div><div class='del'>-	struct mlx5_fc_bulk *bulk = fc-&gt;bulk;</div><div class='del'>-	int bulk_free_fcs_amount;</div><div class='add'>+	if (!counter || counter-&gt;type != MLX5_FC_TYPE_LOCAL)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;fc_pool-&gt;pool_lock);</div><div class='add'>+	refcount_inc(&amp;counter-&gt;fc_local_refcount);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (mlx5_fc_bulk_release_fc(bulk, fc)) {</div><div class='del'>-		mlx5_core_warn(dev, "Attempted to release a counter which is not acquired\n");</div><div class='del'>-		goto unlock;</div><div class='del'>-	}</div><div class='add'>+void mlx5_fc_local_put(struct mlx5_fc *counter)</div><div class='add'>+{</div><div class='add'>+	if (!counter || counter-&gt;type != MLX5_FC_TYPE_LOCAL)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	fc_pool-&gt;available_fcs++;</div><div class='del'>-	fc_pool-&gt;used_fcs--;</div><div class='del'>-</div><div class='del'>-	bulk_free_fcs_amount = mlx5_fc_bulk_get_free_fcs_amount(bulk);</div><div class='del'>-	if (bulk_free_fcs_amount == 1)</div><div class='del'>-		list_move_tail(&amp;bulk-&gt;pool_list, &amp;fc_pool-&gt;partially_used);</div><div class='del'>-	if (bulk_free_fcs_amount == bulk-&gt;bulk_len) {</div><div class='del'>-		list_del(&amp;bulk-&gt;pool_list);</div><div class='del'>-		if (fc_pool-&gt;available_fcs &gt; fc_pool-&gt;threshold)</div><div class='del'>-			mlx5_fc_pool_free_bulk(fc_pool, bulk);</div><div class='del'>-		else</div><div class='del'>-			list_add(&amp;bulk-&gt;pool_list, &amp;fc_pool-&gt;unused);</div><div class='del'>-	}</div><div class='add'>+	if (!refcount_dec_and_test(&amp;counter-&gt;fc_local_refcount))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-unlock:</div><div class='del'>-	mutex_unlock(&amp;fc_pool-&gt;pool_lock);</div><div class='add'>+	mlx5_fc_local_destroy(counter);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.c<br/>index c14590acc772..f6abfd00d7e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.c</a></div><div class='hunk'>@@ -50,10 +50,12 @@ mlx5_ft_pool_get_avail_sz(struct mlx5_core_dev *dev, enum fs_flow_table_type tab</div><div class='ctx'> 	int i, found_i = -1;</div><div class='ctx'> </div><div class='ctx'> 	for (i = ARRAY_SIZE(FT_POOLS) - 1; i &gt;= 0; i--) {</div><div class='del'>-		if (dev-&gt;priv.ft_pool-&gt;ft_left[i] &amp;&amp; FT_POOLS[i] &gt;= desired_size &amp;&amp;</div><div class='add'>+		if (dev-&gt;priv.ft_pool-&gt;ft_left[i] &amp;&amp;</div><div class='add'>+		    (FT_POOLS[i] &gt;= desired_size ||</div><div class='add'>+		     desired_size == MLX5_FS_MAX_POOL_SIZE) &amp;&amp;</div><div class='ctx'> 		    FT_POOLS[i] &lt;= max_ft_size) {</div><div class='ctx'> 			found_i = i;</div><div class='del'>-			if (desired_size != POOL_NEXT_SIZE)</div><div class='add'>+			if (desired_size != MLX5_FS_MAX_POOL_SIZE)</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.h b/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.h<br/>index 25f4274b372b..173e312db720 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.h</a></div><div class='hunk'>@@ -7,8 +7,6 @@</div><div class='ctx'> #include &lt;linux/mlx5/driver.h&gt;</div><div class='ctx'> #include "fs_core.h"</div><div class='ctx'> </div><div class='del'>-#define POOL_NEXT_SIZE 0</div><div class='del'>-</div><div class='ctx'> int mlx5_ft_pool_init(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_ft_pool_destroy(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_pool.c b/drivers/net/ethernet/mellanox/mlx5/core/fs_pool.c<br/>new file mode 100644<br/>index 000000000000..f6c226664602<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_pool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fs_pool.c</a></div><div class='hunk'>@@ -0,0 +1,195 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#include &lt;mlx5_core.h&gt;</div><div class='add'>+#include "fs_pool.h"</div><div class='add'>+</div><div class='add'>+int mlx5_fs_bulk_init(struct mlx5_core_dev *dev, struct mlx5_fs_bulk *fs_bulk,</div><div class='add'>+		      int bulk_len)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	fs_bulk-&gt;bitmask = kvcalloc(BITS_TO_LONGS(bulk_len), sizeof(unsigned long),</div><div class='add'>+				    GFP_KERNEL);</div><div class='add'>+	if (!fs_bulk-&gt;bitmask)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	fs_bulk-&gt;bulk_len = bulk_len;</div><div class='add'>+	for (i = 0; i &lt; bulk_len; i++)</div><div class='add'>+		set_bit(i, fs_bulk-&gt;bitmask);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_fs_bulk_cleanup(struct mlx5_fs_bulk *fs_bulk)</div><div class='add'>+{</div><div class='add'>+	kvfree(fs_bulk-&gt;bitmask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_fs_bulk_get_free_amount(struct mlx5_fs_bulk *bulk)</div><div class='add'>+{</div><div class='add'>+	return bitmap_weight(bulk-&gt;bitmask, bulk-&gt;bulk_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_fs_bulk_acquire_index(struct mlx5_fs_bulk *fs_bulk,</div><div class='add'>+				      struct mlx5_fs_pool_index *pool_index)</div><div class='add'>+{</div><div class='add'>+	int free_index = find_first_bit(fs_bulk-&gt;bitmask, fs_bulk-&gt;bulk_len);</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(!pool_index || !fs_bulk);</div><div class='add'>+	if (free_index &gt;= fs_bulk-&gt;bulk_len)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	clear_bit(free_index, fs_bulk-&gt;bitmask);</div><div class='add'>+	pool_index-&gt;fs_bulk = fs_bulk;</div><div class='add'>+	pool_index-&gt;index = free_index;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_fs_bulk_release_index(struct mlx5_fs_bulk *fs_bulk, int index)</div><div class='add'>+{</div><div class='add'>+	if (test_bit(index, fs_bulk-&gt;bitmask))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	set_bit(index, fs_bulk-&gt;bitmask);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_fs_pool_init(struct mlx5_fs_pool *pool, struct mlx5_core_dev *dev,</div><div class='add'>+		       const struct mlx5_fs_pool_ops *ops, void *pool_ctx)</div><div class='add'>+{</div><div class='add'>+	WARN_ON_ONCE(!ops || !ops-&gt;bulk_destroy || !ops-&gt;bulk_create ||</div><div class='add'>+		     !ops-&gt;update_threshold);</div><div class='add'>+	pool-&gt;dev = dev;</div><div class='add'>+	pool-&gt;pool_ctx = pool_ctx;</div><div class='add'>+	mutex_init(&amp;pool-&gt;pool_lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;pool-&gt;fully_used);</div><div class='add'>+	INIT_LIST_HEAD(&amp;pool-&gt;partially_used);</div><div class='add'>+	INIT_LIST_HEAD(&amp;pool-&gt;unused);</div><div class='add'>+	pool-&gt;available_units = 0;</div><div class='add'>+	pool-&gt;used_units = 0;</div><div class='add'>+	pool-&gt;threshold = 0;</div><div class='add'>+	pool-&gt;ops = ops;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_fs_pool_cleanup(struct mlx5_fs_pool *pool)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = pool-&gt;dev;</div><div class='add'>+	struct mlx5_fs_bulk *bulk;</div><div class='add'>+	struct mlx5_fs_bulk *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(bulk, tmp, &amp;pool-&gt;fully_used, pool_list)</div><div class='add'>+		pool-&gt;ops-&gt;bulk_destroy(dev, bulk);</div><div class='add'>+	list_for_each_entry_safe(bulk, tmp, &amp;pool-&gt;partially_used, pool_list)</div><div class='add'>+		pool-&gt;ops-&gt;bulk_destroy(dev, bulk);</div><div class='add'>+	list_for_each_entry_safe(bulk, tmp, &amp;pool-&gt;unused, pool_list)</div><div class='add'>+		pool-&gt;ops-&gt;bulk_destroy(dev, bulk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_fs_bulk *</div><div class='add'>+mlx5_fs_pool_alloc_new_bulk(struct mlx5_fs_pool *fs_pool)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = fs_pool-&gt;dev;</div><div class='add'>+	struct mlx5_fs_bulk *new_bulk;</div><div class='add'>+</div><div class='add'>+	new_bulk = fs_pool-&gt;ops-&gt;bulk_create(dev, fs_pool-&gt;pool_ctx);</div><div class='add'>+	if (new_bulk)</div><div class='add'>+		fs_pool-&gt;available_units += new_bulk-&gt;bulk_len;</div><div class='add'>+	fs_pool-&gt;ops-&gt;update_threshold(fs_pool);</div><div class='add'>+	return new_bulk;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mlx5_fs_pool_free_bulk(struct mlx5_fs_pool *fs_pool, struct mlx5_fs_bulk *bulk)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = fs_pool-&gt;dev;</div><div class='add'>+</div><div class='add'>+	fs_pool-&gt;available_units -= bulk-&gt;bulk_len;</div><div class='add'>+	fs_pool-&gt;ops-&gt;bulk_destroy(dev, bulk);</div><div class='add'>+	fs_pool-&gt;ops-&gt;update_threshold(fs_pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_fs_pool_acquire_from_list(struct list_head *src_list,</div><div class='add'>+			       struct list_head *next_list,</div><div class='add'>+			       bool move_non_full_bulk,</div><div class='add'>+			       struct mlx5_fs_pool_index *pool_index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_bulk *fs_bulk;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (list_empty(src_list))</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	fs_bulk = list_first_entry(src_list, struct mlx5_fs_bulk, pool_list);</div><div class='add'>+	err = mlx5_fs_bulk_acquire_index(fs_bulk, pool_index);</div><div class='add'>+	if (move_non_full_bulk || mlx5_fs_bulk_get_free_amount(fs_bulk) == 0)</div><div class='add'>+		list_move(&amp;fs_bulk-&gt;pool_list, next_list);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_fs_pool_acquire_index(struct mlx5_fs_pool *fs_pool,</div><div class='add'>+			       struct mlx5_fs_pool_index *pool_index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_bulk *new_bulk;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;fs_pool-&gt;pool_lock);</div><div class='add'>+</div><div class='add'>+	err = mlx5_fs_pool_acquire_from_list(&amp;fs_pool-&gt;partially_used,</div><div class='add'>+					     &amp;fs_pool-&gt;fully_used, false,</div><div class='add'>+					     pool_index);</div><div class='add'>+	if (err)</div><div class='add'>+		err = mlx5_fs_pool_acquire_from_list(&amp;fs_pool-&gt;unused,</div><div class='add'>+						     &amp;fs_pool-&gt;partially_used,</div><div class='add'>+						     true, pool_index);</div><div class='add'>+	if (err) {</div><div class='add'>+		new_bulk = mlx5_fs_pool_alloc_new_bulk(fs_pool);</div><div class='add'>+		if (!new_bulk) {</div><div class='add'>+			err = -ENOENT;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		err = mlx5_fs_bulk_acquire_index(new_bulk, pool_index);</div><div class='add'>+		WARN_ON_ONCE(err);</div><div class='add'>+		list_add(&amp;new_bulk-&gt;pool_list, &amp;fs_pool-&gt;partially_used);</div><div class='add'>+	}</div><div class='add'>+	fs_pool-&gt;available_units--;</div><div class='add'>+	fs_pool-&gt;used_units++;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;fs_pool-&gt;pool_lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_fs_pool_release_index(struct mlx5_fs_pool *fs_pool,</div><div class='add'>+			       struct mlx5_fs_pool_index *pool_index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_bulk *bulk = pool_index-&gt;fs_bulk;</div><div class='add'>+	int bulk_free_amount;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;fs_pool-&gt;pool_lock);</div><div class='add'>+</div><div class='add'>+	/* TBD would rather return void if there was no warn here in original code */</div><div class='add'>+	err = mlx5_fs_bulk_release_index(bulk, pool_index-&gt;index);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	fs_pool-&gt;available_units++;</div><div class='add'>+	fs_pool-&gt;used_units--;</div><div class='add'>+</div><div class='add'>+	bulk_free_amount = mlx5_fs_bulk_get_free_amount(bulk);</div><div class='add'>+	if (bulk_free_amount == 1)</div><div class='add'>+		list_move_tail(&amp;bulk-&gt;pool_list, &amp;fs_pool-&gt;partially_used);</div><div class='add'>+	if (bulk_free_amount == bulk-&gt;bulk_len) {</div><div class='add'>+		list_del(&amp;bulk-&gt;pool_list);</div><div class='add'>+		if (fs_pool-&gt;available_units &gt; fs_pool-&gt;threshold)</div><div class='add'>+			mlx5_fs_pool_free_bulk(fs_pool, bulk);</div><div class='add'>+		else</div><div class='add'>+			list_add(&amp;bulk-&gt;pool_list, &amp;fs_pool-&gt;unused);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;fs_pool-&gt;pool_lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fs_pool.h b/drivers/net/ethernet/mellanox/mlx5/core/fs_pool.h<br/>new file mode 100644<br/>index 000000000000..f04ec3107498<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fs_pool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fs_pool.h</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#ifndef __MLX5_FS_POOL_H__</div><div class='add'>+#define __MLX5_FS_POOL_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mlx5/driver.h&gt;</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_bulk {</div><div class='add'>+	struct list_head pool_list;</div><div class='add'>+	int bulk_len;</div><div class='add'>+	unsigned long *bitmask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_pool_index {</div><div class='add'>+	struct mlx5_fs_bulk *fs_bulk;</div><div class='add'>+	int index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_pool;</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_pool_ops {</div><div class='add'>+	int (*bulk_destroy)(struct mlx5_core_dev *dev, struct mlx5_fs_bulk *bulk);</div><div class='add'>+	struct mlx5_fs_bulk * (*bulk_create)(struct mlx5_core_dev *dev,</div><div class='add'>+					     void *pool_ctx);</div><div class='add'>+	void (*update_threshold)(struct mlx5_fs_pool *pool);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_pool {</div><div class='add'>+	struct mlx5_core_dev *dev;</div><div class='add'>+	void *pool_ctx;</div><div class='add'>+	const struct mlx5_fs_pool_ops *ops;</div><div class='add'>+	struct mutex pool_lock; /* protects pool lists */</div><div class='add'>+	struct list_head fully_used;</div><div class='add'>+	struct list_head partially_used;</div><div class='add'>+	struct list_head unused;</div><div class='add'>+	int available_units;</div><div class='add'>+	int used_units;</div><div class='add'>+	int threshold;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mlx5_fs_bulk_init(struct mlx5_core_dev *dev, struct mlx5_fs_bulk *fs_bulk,</div><div class='add'>+		      int bulk_len);</div><div class='add'>+void mlx5_fs_bulk_cleanup(struct mlx5_fs_bulk *fs_bulk);</div><div class='add'>+int mlx5_fs_bulk_get_free_amount(struct mlx5_fs_bulk *bulk);</div><div class='add'>+</div><div class='add'>+void mlx5_fs_pool_init(struct mlx5_fs_pool *pool, struct mlx5_core_dev *dev,</div><div class='add'>+		       const struct mlx5_fs_pool_ops *ops, void *pool_ctx);</div><div class='add'>+void mlx5_fs_pool_cleanup(struct mlx5_fs_pool *pool);</div><div class='add'>+int mlx5_fs_pool_acquire_index(struct mlx5_fs_pool *fs_pool,</div><div class='add'>+			       struct mlx5_fs_pool_index *pool_index);</div><div class='add'>+int mlx5_fs_pool_release_index(struct mlx5_fs_pool *fs_pool,</div><div class='add'>+			       struct mlx5_fs_pool_index *pool_index);</div><div class='add'>+</div><div class='add'>+#endif /* __MLX5_FS_POOL_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw.c b/drivers/net/ethernet/mellanox/mlx5/core/fw.c<br/>index 76ad46bf477d..eeb4437975f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fw.c</a></div><div class='hunk'>@@ -281,6 +281,25 @@ int mlx5_query_hca_caps(struct mlx5_core_dev *dev)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (MLX5_CAP_GEN(dev, shampo)) {</div><div class='add'>+		err = mlx5_core_get_caps_mode(dev, MLX5_CAP_SHAMPO, HCA_CAP_OPMOD_GET_CUR);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (MLX5_CAP_GEN(dev, adv_rdma)) {</div><div class='add'>+		err = mlx5_core_get_caps_mode(dev, MLX5_CAP_ADV_RDMA,</div><div class='add'>+					      HCA_CAP_OPMOD_GET_CUR);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (MLX5_CAP_GEN(dev, psp)) {</div><div class='add'>+		err = mlx5_core_get_caps(dev, MLX5_CAP_PSP);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c<br/>index 566710d34a7b..2bceb42c98cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c</a></div><div class='hunk'>@@ -6,13 +6,15 @@</div><div class='ctx'> #include "fw_reset.h"</div><div class='ctx'> #include "diag/fw_tracer.h"</div><div class='ctx'> #include "lib/tout.h"</div><div class='add'>+#include "sf/sf.h"</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='ctx'> 	MLX5_FW_RESET_FLAGS_RESET_REQUESTED,</div><div class='ctx'> 	MLX5_FW_RESET_FLAGS_NACK_RESET_REQUEST,</div><div class='ctx'> 	MLX5_FW_RESET_FLAGS_PENDING_COMP,</div><div class='ctx'> 	MLX5_FW_RESET_FLAGS_DROP_NEW_REQUESTS,</div><div class='del'>-	MLX5_FW_RESET_FLAGS_RELOAD_REQUIRED</div><div class='add'>+	MLX5_FW_RESET_FLAGS_RELOAD_REQUIRED,</div><div class='add'>+	MLX5_FW_RESET_FLAGS_UNLOAD_EVENT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5_fw_reset {</div><div class='hunk'>@@ -25,6 +27,7 @@ struct mlx5_fw_reset {</div><div class='ctx'> 	struct work_struct reset_reload_work;</div><div class='ctx'> 	struct work_struct reset_now_work;</div><div class='ctx'> 	struct work_struct reset_abort_work;</div><div class='add'>+	struct delayed_work reset_timeout_work;</div><div class='ctx'> 	unsigned long reset_flags;</div><div class='ctx'> 	u8 reset_method;</div><div class='ctx'> 	struct timer_list timer;</div><div class='hunk'>@@ -70,7 +73,8 @@ static int mlx5_fw_reset_enable_remote_dev_reset_set(struct devlink *devlink, u3</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_fw_reset_enable_remote_dev_reset_get(struct devlink *devlink, u32 id,</div><div class='del'>-						     struct devlink_param_gset_ctx *ctx)</div><div class='add'>+						     struct devlink_param_gset_ctx *ctx,</div><div class='add'>+						     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='ctx'> 	struct mlx5_fw_reset *fw_reset;</div><div class='hunk'>@@ -219,7 +223,7 @@ int mlx5_fw_reset_set_live_patch(struct mlx5_core_dev *dev)</div><div class='ctx'> 	return mlx5_reg_mfrl_set(dev, MLX5_MFRL_REG_RESET_LEVEL0, 0, 0, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_fw_reset_complete_reload(struct mlx5_core_dev *dev, bool unloaded)</div><div class='add'>+static void mlx5_fw_reset_complete_reload(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_fw_reset *fw_reset = dev-&gt;priv.fw_reset;</div><div class='ctx'> 	struct devlink *devlink = priv_to_devlink(dev);</div><div class='hunk'>@@ -228,8 +232,7 @@ static void mlx5_fw_reset_complete_reload(struct mlx5_core_dev *dev, bool unload</div><div class='ctx'> 	if (test_bit(MLX5_FW_RESET_FLAGS_PENDING_COMP, &amp;fw_reset-&gt;reset_flags)) {</div><div class='ctx'> 		complete(&amp;fw_reset-&gt;done);</div><div class='ctx'> 	} else {</div><div class='del'>-		if (!unloaded)</div><div class='del'>-			mlx5_unload_one(dev, false);</div><div class='add'>+		mlx5_sync_reset_unload_flow(dev, false);</div><div class='ctx'> 		if (mlx5_health_wait_pci_up(dev))</div><div class='ctx'> 			mlx5_core_err(dev, "reset reload flow aborted, PCI reads still not working\n");</div><div class='ctx'> 		else</div><div class='hunk'>@@ -246,7 +249,7 @@ static void mlx5_stop_sync_reset_poll(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_fw_reset *fw_reset = dev-&gt;priv.fw_reset;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;fw_reset-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;fw_reset-&gt;timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_sync_reset_clear_reset_requested(struct mlx5_core_dev *dev, bool poll_health)</div><div class='hunk'>@@ -258,6 +261,8 @@ static int mlx5_sync_reset_clear_reset_requested(struct mlx5_core_dev *dev, bool</div><div class='ctx'> 		return -EALREADY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (current_work() != &amp;fw_reset-&gt;reset_timeout_work.work)</div><div class='add'>+		cancel_delayed_work(&amp;fw_reset-&gt;reset_timeout_work);</div><div class='ctx'> 	mlx5_stop_sync_reset_poll(dev);</div><div class='ctx'> 	if (poll_health)</div><div class='ctx'> 		mlx5_start_health_poll(dev);</div><div class='hunk'>@@ -272,13 +277,14 @@ static void mlx5_sync_reset_reload_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	mlx5_sync_reset_clear_reset_requested(dev, false);</div><div class='ctx'> 	mlx5_enter_error_state(dev, true);</div><div class='del'>-	mlx5_fw_reset_complete_reload(dev, false);</div><div class='add'>+	mlx5_fw_reset_complete_reload(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define MLX5_RESET_POLL_INTERVAL	(HZ / 10)</div><div class='ctx'> static void poll_sync_reset(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_fw_reset *fw_reset = from_timer(fw_reset, t, timer);</div><div class='add'>+	struct mlx5_fw_reset *fw_reset = timer_container_of(fw_reset, t,</div><div class='add'>+							    timer);</div><div class='ctx'> 	struct mlx5_core_dev *dev = fw_reset-&gt;dev;</div><div class='ctx'> 	u32 fatal_error;</div><div class='ctx'> </div><div class='hunk'>@@ -328,6 +334,11 @@ static int mlx5_sync_reset_set_reset_requested(struct mlx5_core_dev *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	mlx5_stop_health_poll(dev, true);</div><div class='ctx'> 	mlx5_start_sync_reset_poll(dev);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(MLX5_FW_RESET_FLAGS_DROP_NEW_REQUESTS,</div><div class='add'>+		      &amp;fw_reset-&gt;reset_flags))</div><div class='add'>+		schedule_delayed_work(&amp;fw_reset-&gt;reset_timeout_work,</div><div class='add'>+			msecs_to_jiffies(mlx5_tout_ms(dev, PCI_SYNC_UPDATE)));</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -345,15 +356,12 @@ static void mlx5_fw_live_patch_event(struct work_struct *work)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)</div><div class='del'>-static int mlx5_check_hotplug_interrupt(struct mlx5_core_dev *dev)</div><div class='add'>+static int mlx5_check_hotplug_interrupt(struct mlx5_core_dev *dev,</div><div class='add'>+					struct pci_dev *bridge)</div><div class='ctx'> {</div><div class='del'>-	struct pci_dev *bridge = dev-&gt;pdev-&gt;bus-&gt;self;</div><div class='ctx'> 	u16 reg16;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (!bridge)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	err = pcie_capability_read_word(bridge, PCI_EXP_SLTCTL, &amp;reg16);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -416,17 +424,28 @@ static int mlx5_check_dev_ids(struct mlx5_core_dev *dev, u16 dev_id)</div><div class='ctx'> static bool mlx5_is_reset_now_capable(struct mlx5_core_dev *dev,</div><div class='ctx'> 				      u8 reset_method)</div><div class='ctx'> {</div><div class='add'>+	struct pci_dev *bridge = dev-&gt;pdev-&gt;bus-&gt;self;</div><div class='ctx'> 	u16 dev_id;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (!bridge) {</div><div class='add'>+		mlx5_core_warn(dev, "PCI bus bridge is not accessible\n");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!MLX5_CAP_GEN(dev, fast_teardown)) {</div><div class='ctx'> 		mlx5_core_warn(dev, "fast teardown is not supported by firmware\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!mlx5_core_is_ecpf(dev) &amp;&amp; !mlx5_sf_table_empty(dev)) {</div><div class='add'>+		mlx5_core_warn(dev, "SFs should be removed before reset\n");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> #if IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)</div><div class='ctx'> 	if (reset_method != MLX5_MFRL_REG_PCI_RESET_METHOD_HOT_RESET) {</div><div class='del'>-		err = mlx5_check_hotplug_interrupt(dev);</div><div class='add'>+		err = mlx5_check_hotplug_interrupt(dev, bridge);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return false;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -582,6 +601,65 @@ static int mlx5_sync_pci_reset(struct mlx5_core_dev *dev, u8 reset_method)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void mlx5_sync_reset_unload_flow(struct mlx5_core_dev *dev, bool locked)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fw_reset *fw_reset = dev-&gt;priv.fw_reset;</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+	int poll_freq = 20;</div><div class='add'>+	bool reset_action;</div><div class='add'>+	u8 rst_state;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (locked)</div><div class='add'>+		mlx5_unload_one_devl_locked(dev, false);</div><div class='add'>+	else</div><div class='add'>+		mlx5_unload_one(dev, false);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(MLX5_FW_RESET_FLAGS_UNLOAD_EVENT, &amp;fw_reset-&gt;reset_flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5_set_fw_rst_ack(dev);</div><div class='add'>+	mlx5_core_warn(dev, "Sync Reset Unload done, device reset expected\n");</div><div class='add'>+</div><div class='add'>+	reset_action = false;</div><div class='add'>+	timeout = jiffies + msecs_to_jiffies(mlx5_tout_ms(dev, RESET_UNLOAD));</div><div class='add'>+	do {</div><div class='add'>+		rst_state = mlx5_get_fw_rst_state(dev);</div><div class='add'>+		if (rst_state == MLX5_FW_RST_STATE_TOGGLE_REQ ||</div><div class='add'>+		    rst_state == MLX5_FW_RST_STATE_IDLE) {</div><div class='add'>+			reset_action = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (rst_state == MLX5_FW_RST_STATE_DROP_MODE) {</div><div class='add'>+			mlx5_core_info(dev, "Sync Reset Drop mode ack\n");</div><div class='add'>+			mlx5_set_fw_rst_ack(dev);</div><div class='add'>+			poll_freq = 1000;</div><div class='add'>+		}</div><div class='add'>+		msleep(poll_freq);</div><div class='add'>+	} while (!time_after(jiffies, timeout));</div><div class='add'>+</div><div class='add'>+	if (!reset_action) {</div><div class='add'>+		mlx5_core_err(dev, "Got timeout waiting for sync reset action, state = %u\n",</div><div class='add'>+			      rst_state);</div><div class='add'>+		fw_reset-&gt;ret = -ETIMEDOUT;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5_core_warn(dev, "Sync Reset, got reset action. rst_state = %u\n",</div><div class='add'>+		       rst_state);</div><div class='add'>+	if (rst_state == MLX5_FW_RST_STATE_TOGGLE_REQ) {</div><div class='add'>+		err = mlx5_sync_pci_reset(dev, fw_reset-&gt;reset_method);</div><div class='add'>+		if (err) {</div><div class='add'>+			mlx5_core_warn(dev, "mlx5_sync_pci_reset failed, err %d\n",</div><div class='add'>+				       err);</div><div class='add'>+			fw_reset-&gt;ret = err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	clear_bit(MLX5_FW_RESET_FLAGS_UNLOAD_EVENT, &amp;fw_reset-&gt;reset_flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mlx5_sync_reset_now_event(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_fw_reset *fw_reset = container_of(work, struct mlx5_fw_reset,</div><div class='hunk'>@@ -609,17 +687,13 @@ static void mlx5_sync_reset_now_event(struct work_struct *work)</div><div class='ctx'> 	mlx5_enter_error_state(dev, true);</div><div class='ctx'> done:</div><div class='ctx'> 	fw_reset-&gt;ret = err;</div><div class='del'>-	mlx5_fw_reset_complete_reload(dev, false);</div><div class='add'>+	mlx5_fw_reset_complete_reload(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5_sync_reset_unload_event(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_fw_reset *fw_reset;</div><div class='ctx'> 	struct mlx5_core_dev *dev;</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-	int poll_freq = 20;</div><div class='del'>-	bool reset_action;</div><div class='del'>-	u8 rst_state;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	fw_reset = container_of(work, struct mlx5_fw_reset, reset_unload_work);</div><div class='hunk'>@@ -628,6 +702,7 @@ static void mlx5_sync_reset_unload_event(struct work_struct *work)</div><div class='ctx'> 	if (mlx5_sync_reset_clear_reset_requested(dev, false))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	set_bit(MLX5_FW_RESET_FLAGS_UNLOAD_EVENT, &amp;fw_reset-&gt;reset_flags);</div><div class='ctx'> 	mlx5_core_warn(dev, "Sync Reset Unload. Function is forced down.\n");</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_cmd_fast_teardown_hca(dev);</div><div class='hunk'>@@ -636,49 +711,7 @@ static void mlx5_sync_reset_unload_event(struct work_struct *work)</div><div class='ctx'> 	else</div><div class='ctx'> 		mlx5_enter_error_state(dev, true);</div><div class='ctx'> </div><div class='del'>-	if (test_bit(MLX5_FW_RESET_FLAGS_PENDING_COMP, &amp;fw_reset-&gt;reset_flags))</div><div class='del'>-		mlx5_unload_one_devl_locked(dev, false);</div><div class='del'>-	else</div><div class='del'>-		mlx5_unload_one(dev, false);</div><div class='del'>-</div><div class='del'>-	mlx5_set_fw_rst_ack(dev);</div><div class='del'>-	mlx5_core_warn(dev, "Sync Reset Unload done, device reset expected\n");</div><div class='del'>-</div><div class='del'>-	reset_action = false;</div><div class='del'>-	timeout = jiffies + msecs_to_jiffies(mlx5_tout_ms(dev, RESET_UNLOAD));</div><div class='del'>-	do {</div><div class='del'>-		rst_state = mlx5_get_fw_rst_state(dev);</div><div class='del'>-		if (rst_state == MLX5_FW_RST_STATE_TOGGLE_REQ ||</div><div class='del'>-		    rst_state == MLX5_FW_RST_STATE_IDLE) {</div><div class='del'>-			reset_action = true;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (rst_state == MLX5_FW_RST_STATE_DROP_MODE) {</div><div class='del'>-			mlx5_core_info(dev, "Sync Reset Drop mode ack\n");</div><div class='del'>-			mlx5_set_fw_rst_ack(dev);</div><div class='del'>-			poll_freq = 1000;</div><div class='del'>-		}</div><div class='del'>-		msleep(poll_freq);</div><div class='del'>-	} while (!time_after(jiffies, timeout));</div><div class='del'>-</div><div class='del'>-	if (!reset_action) {</div><div class='del'>-		mlx5_core_err(dev, "Got timeout waiting for sync reset action, state = %u\n",</div><div class='del'>-			      rst_state);</div><div class='del'>-		fw_reset-&gt;ret = -ETIMEDOUT;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mlx5_core_warn(dev, "Sync Reset, got reset action. rst_state = %u\n", rst_state);</div><div class='del'>-	if (rst_state == MLX5_FW_RST_STATE_TOGGLE_REQ) {</div><div class='del'>-		err = mlx5_sync_pci_reset(dev, fw_reset-&gt;reset_method);</div><div class='del'>-		if (err) {</div><div class='del'>-			mlx5_core_warn(dev, "mlx5_sync_pci_reset failed, err %d\n", err);</div><div class='del'>-			fw_reset-&gt;ret = err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	mlx5_fw_reset_complete_reload(dev, true);</div><div class='add'>+	mlx5_fw_reset_complete_reload(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5_sync_reset_abort_event(struct work_struct *work)</div><div class='hunk'>@@ -715,6 +748,19 @@ static void mlx5_sync_reset_events_handle(struct mlx5_fw_reset *fw_reset, struct</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mlx5_sync_reset_timeout_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *dwork = container_of(work, struct delayed_work,</div><div class='add'>+						  work);</div><div class='add'>+	struct mlx5_fw_reset *fw_reset =</div><div class='add'>+		container_of(dwork, struct mlx5_fw_reset, reset_timeout_work);</div><div class='add'>+	struct mlx5_core_dev *dev = fw_reset-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (mlx5_sync_reset_clear_reset_requested(dev, true))</div><div class='add'>+		return;</div><div class='add'>+	mlx5_core_warn(dev, "PCI Sync FW Update Reset Timeout.\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int fw_reset_event_notifier(struct notifier_block *nb, unsigned long action, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_fw_reset *fw_reset = mlx5_nb_cof(nb, struct mlx5_fw_reset, nb);</div><div class='hunk'>@@ -798,6 +844,7 @@ void mlx5_drain_fw_reset(struct mlx5_core_dev *dev)</div><div class='ctx'> 	cancel_work_sync(&amp;fw_reset-&gt;reset_reload_work);</div><div class='ctx'> 	cancel_work_sync(&amp;fw_reset-&gt;reset_now_work);</div><div class='ctx'> 	cancel_work_sync(&amp;fw_reset-&gt;reset_abort_work);</div><div class='add'>+	cancel_delayed_work(&amp;fw_reset-&gt;reset_timeout_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct devlink_param mlx5_fw_reset_devlink_params[] = {</div><div class='hunk'>@@ -841,6 +888,8 @@ int mlx5_fw_reset_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 	INIT_WORK(&amp;fw_reset-&gt;reset_reload_work, mlx5_sync_reset_reload_work);</div><div class='ctx'> 	INIT_WORK(&amp;fw_reset-&gt;reset_now_work, mlx5_sync_reset_now_event);</div><div class='ctx'> 	INIT_WORK(&amp;fw_reset-&gt;reset_abort_work, mlx5_sync_reset_abort_event);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;fw_reset-&gt;reset_timeout_work,</div><div class='add'>+			  mlx5_sync_reset_timeout_work);</div><div class='ctx'> </div><div class='ctx'> 	init_completion(&amp;fw_reset-&gt;done);</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h<br/>index ea527d06a85f..d5b28525c960 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h</a></div><div class='hunk'>@@ -12,6 +12,7 @@ int mlx5_fw_reset_set_reset_sync(struct mlx5_core_dev *dev, u8 reset_type_sel,</div><div class='ctx'> int mlx5_fw_reset_set_live_patch(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='ctx'> int mlx5_fw_reset_wait_reset_done(struct mlx5_core_dev *dev);</div><div class='add'>+void mlx5_sync_reset_unload_flow(struct mlx5_core_dev *dev, bool locked);</div><div class='ctx'> int mlx5_fw_reset_verify_fw_complete(struct mlx5_core_dev *dev,</div><div class='ctx'> 				     struct netlink_ext_ack *extack);</div><div class='ctx'> void mlx5_fw_reset_events_start(struct mlx5_core_dev *dev);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/health.c b/drivers/net/ethernet/mellanox/mlx5/core/health.c<br/>index a6329ca2d9bf..aeeb136f5ebc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/health.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/health.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/health.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/health.c</a></div><div class='hunk'>@@ -96,6 +96,11 @@ static int mlx5_health_get_rfr(u8 rfr_severity)</div><div class='ctx'> 	return rfr_severity &gt;&gt; MLX5_RFR_BIT_OFFSET;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5_health_get_crr(u8 rfr_severity)</div><div class='add'>+{</div><div class='add'>+	return (rfr_severity &gt;&gt; MLX5_CRR_BIT_OFFSET) &amp; 0x01;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool sensor_fw_synd_rfr(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_health *health = &amp;dev-&gt;priv.health;</div><div class='hunk'>@@ -375,6 +380,8 @@ static const char *hsynd_str(u8 synd)</div><div class='ctx'> 		return "High temperature";</div><div class='ctx'> 	case MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PCI_POISONED_ERR:</div><div class='ctx'> 		return "ICM fetch PCI data poisoned error";</div><div class='add'>+	case MLX5_INITIAL_SEG_HEALTH_SYNDROME_TRUST_LOCKDOWN_ERR:</div><div class='add'>+		return "Trust lockdown error";</div><div class='ctx'> 	default:</div><div class='ctx'> 		return "unrecognized error";</div><div class='ctx'> 	}</div><div class='hunk'>@@ -442,12 +449,15 @@ static void print_health_info(struct mlx5_core_dev *dev)</div><div class='ctx'> 	mlx5_log(dev, severity, "time %u\n", ioread32be(&amp;h-&gt;time));</div><div class='ctx'> 	mlx5_log(dev, severity, "hw_id 0x%08x\n", ioread32be(&amp;h-&gt;hw_id));</div><div class='ctx'> 	mlx5_log(dev, severity, "rfr %d\n", mlx5_health_get_rfr(rfr_severity));</div><div class='add'>+	mlx5_log(dev, severity, "crr %d\n", mlx5_health_get_crr(rfr_severity));</div><div class='ctx'> 	mlx5_log(dev, severity, "severity %d (%s)\n", severity, mlx5_loglevel_str(severity));</div><div class='ctx'> 	mlx5_log(dev, severity, "irisc_index %d\n", ioread8(&amp;h-&gt;irisc_index));</div><div class='ctx'> 	mlx5_log(dev, severity, "synd 0x%x: %s\n", ioread8(&amp;h-&gt;synd),</div><div class='ctx'> 		 hsynd_str(ioread8(&amp;h-&gt;synd)));</div><div class='ctx'> 	mlx5_log(dev, severity, "ext_synd 0x%04x\n", ioread16be(&amp;h-&gt;ext_synd));</div><div class='ctx'> 	mlx5_log(dev, severity, "raw fw_ver 0x%08x\n", ioread32be(&amp;h-&gt;fw_ver));</div><div class='add'>+	if (mlx5_health_get_crr(rfr_severity))</div><div class='add'>+		mlx5_core_warn(dev, "Cold reset is required\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -659,57 +669,64 @@ static void mlx5_fw_fatal_reporter_err_work(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define MLX5_FW_REPORTER_ECPF_GRACEFUL_PERIOD 180000</div><div class='add'>+#define MLX5_FW_REPORTER_PF_GRACEFUL_PERIOD 60000</div><div class='add'>+#define MLX5_FW_REPORTER_VF_GRACEFUL_PERIOD 30000</div><div class='add'>+#define MLX5_FW_REPORTER_DEFAULT_GRACEFUL_PERIOD \</div><div class='add'>+	MLX5_FW_REPORTER_VF_GRACEFUL_PERIOD</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+const struct devlink_health_reporter_ops mlx5_fw_fatal_reporter_ecpf_ops = {</div><div class='add'>+		.name = "fw_fatal",</div><div class='add'>+		.recover = mlx5_fw_fatal_reporter_recover,</div><div class='add'>+		.dump = mlx5_fw_fatal_reporter_dump,</div><div class='add'>+		.default_graceful_period =</div><div class='add'>+			MLX5_FW_REPORTER_ECPF_GRACEFUL_PERIOD,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct devlink_health_reporter_ops mlx5_fw_fatal_reporter_pf_ops = {</div><div class='ctx'> 		.name = "fw_fatal",</div><div class='ctx'> 		.recover = mlx5_fw_fatal_reporter_recover,</div><div class='ctx'> 		.dump = mlx5_fw_fatal_reporter_dump,</div><div class='add'>+		.default_graceful_period = MLX5_FW_REPORTER_PF_GRACEFUL_PERIOD,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct devlink_health_reporter_ops mlx5_fw_fatal_reporter_ops = {</div><div class='ctx'> 		.name = "fw_fatal",</div><div class='ctx'> 		.recover = mlx5_fw_fatal_reporter_recover,</div><div class='add'>+		.default_graceful_period =</div><div class='add'>+			MLX5_FW_REPORTER_DEFAULT_GRACEFUL_PERIOD,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define MLX5_FW_REPORTER_ECPF_GRACEFUL_PERIOD 180000</div><div class='del'>-#define MLX5_FW_REPORTER_PF_GRACEFUL_PERIOD 60000</div><div class='del'>-#define MLX5_FW_REPORTER_VF_GRACEFUL_PERIOD 30000</div><div class='del'>-#define MLX5_FW_REPORTER_DEFAULT_GRACEFUL_PERIOD MLX5_FW_REPORTER_VF_GRACEFUL_PERIOD</div><div class='del'>-</div><div class='ctx'> void mlx5_fw_reporters_create(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct devlink_health_reporter_ops *fw_fatal_ops;</div><div class='ctx'> 	struct mlx5_core_health *health = &amp;dev-&gt;priv.health;</div><div class='ctx'> 	const struct devlink_health_reporter_ops *fw_ops;</div><div class='ctx'> 	struct devlink *devlink = priv_to_devlink(dev);</div><div class='del'>-	u64 grace_period;</div><div class='ctx'> </div><div class='del'>-	fw_fatal_ops = &amp;mlx5_fw_fatal_reporter_pf_ops;</div><div class='ctx'> 	fw_ops = &amp;mlx5_fw_reporter_pf_ops;</div><div class='ctx'> 	if (mlx5_core_is_ecpf(dev)) {</div><div class='del'>-		grace_period = MLX5_FW_REPORTER_ECPF_GRACEFUL_PERIOD;</div><div class='add'>+		fw_fatal_ops = &amp;mlx5_fw_fatal_reporter_ecpf_ops;</div><div class='ctx'> 	} else if (mlx5_core_is_pf(dev)) {</div><div class='del'>-		grace_period = MLX5_FW_REPORTER_PF_GRACEFUL_PERIOD;</div><div class='add'>+		fw_fatal_ops = &amp;mlx5_fw_fatal_reporter_pf_ops;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* VF or SF */</div><div class='del'>-		grace_period = MLX5_FW_REPORTER_DEFAULT_GRACEFUL_PERIOD;</div><div class='ctx'> 		fw_fatal_ops = &amp;mlx5_fw_fatal_reporter_ops;</div><div class='ctx'> 		fw_ops = &amp;mlx5_fw_reporter_ops;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	health-&gt;fw_reporter =</div><div class='del'>-		devl_health_reporter_create(devlink, fw_ops, 0, dev);</div><div class='add'>+	health-&gt;fw_reporter = devl_health_reporter_create(devlink, fw_ops, dev);</div><div class='ctx'> 	if (IS_ERR(health-&gt;fw_reporter))</div><div class='del'>-		mlx5_core_warn(dev, "Failed to create fw reporter, err = %ld\n",</div><div class='del'>-			       PTR_ERR(health-&gt;fw_reporter));</div><div class='del'>-</div><div class='del'>-	health-&gt;fw_fatal_reporter =</div><div class='del'>-		devl_health_reporter_create(devlink,</div><div class='del'>-					    fw_fatal_ops,</div><div class='del'>-					    grace_period,</div><div class='del'>-					    dev);</div><div class='add'>+		mlx5_core_warn(dev, "Failed to create fw reporter, err = %pe\n",</div><div class='add'>+			       health-&gt;fw_reporter);</div><div class='add'>+</div><div class='add'>+	health-&gt;fw_fatal_reporter = devl_health_reporter_create(devlink,</div><div class='add'>+								fw_fatal_ops,</div><div class='add'>+								dev);</div><div class='ctx'> 	if (IS_ERR(health-&gt;fw_fatal_reporter))</div><div class='del'>-		mlx5_core_warn(dev, "Failed to create fw fatal reporter, err = %ld\n",</div><div class='del'>-			       PTR_ERR(health-&gt;fw_fatal_reporter));</div><div class='add'>+		mlx5_core_warn(dev, "Failed to create fw fatal reporter, err = %pe\n",</div><div class='add'>+			       health-&gt;fw_fatal_reporter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5_fw_reporters_destroy(struct mlx5_core_dev *dev)</div><div class='hunk'>@@ -769,7 +786,8 @@ static void mlx5_health_log_ts_update(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void poll_health(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev = from_timer(dev, t, priv.health.timer);</div><div class='add'>+	struct mlx5_core_dev *dev = timer_container_of(dev, t,</div><div class='add'>+						       priv.health.timer);</div><div class='ctx'> 	struct mlx5_core_health *health = &amp;dev-&gt;priv.health;</div><div class='ctx'> 	struct health_buffer __iomem *h = health-&gt;health;</div><div class='ctx'> 	u32 fatal_error;</div><div class='hunk'>@@ -799,14 +817,17 @@ static void poll_health(struct timer_list *t)</div><div class='ctx'> 	health-&gt;prev = count;</div><div class='ctx'> 	if (health-&gt;miss_counter == MAX_MISSES) {</div><div class='ctx'> 		mlx5_core_err(dev, "device's health compromised - reached miss count\n");</div><div class='add'>+		health-&gt;synd = ioread8(&amp;h-&gt;synd);</div><div class='ctx'> 		print_health_info(dev);</div><div class='ctx'> 		queue_work(health-&gt;wq, &amp;health-&gt;report_work);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	prev_synd = health-&gt;synd;</div><div class='ctx'> 	health-&gt;synd = ioread8(&amp;h-&gt;synd);</div><div class='del'>-	if (health-&gt;synd &amp;&amp; health-&gt;synd != prev_synd)</div><div class='add'>+	if (health-&gt;synd &amp;&amp; health-&gt;synd != prev_synd) {</div><div class='add'>+		print_health_info(dev);</div><div class='ctx'> 		queue_work(health-&gt;wq, &amp;health-&gt;report_work);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	mod_timer(&amp;health-&gt;timer, get_next_poll_jiffies(dev));</div><div class='hunk'>@@ -834,7 +855,7 @@ void mlx5_stop_health_poll(struct mlx5_core_dev *dev, bool disable_health)</div><div class='ctx'> 	if (disable_health)</div><div class='ctx'> 		set_bit(MLX5_DROP_HEALTH_WORK, &amp;health-&gt;flags);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;health-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;health-&gt;timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_start_health_fw_log_up(struct mlx5_core_dev *dev)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/hwmon.c b/drivers/net/ethernet/mellanox/mlx5/core/hwmon.c<br/>index 353f81dccd1c..4ba2636d7fb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/hwmon.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/hwmon.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/hwmon.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/hwmon.c</a></div><div class='hunk'>@@ -416,3 +416,8 @@ void mlx5_hwmon_dev_unregister(struct mlx5_core_dev *mdev)</div><div class='ctx'> 	mlx5_hwmon_free(hwmon);</div><div class='ctx'> 	mdev-&gt;hwmon = NULL;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+const char *hwmon_get_sensor_name(struct mlx5_hwmon *hwmon, int channel)</div><div class='add'>+{</div><div class='add'>+	return hwmon-&gt;temp_channel_desc[channel].sensor_name;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/hwmon.h b/drivers/net/ethernet/mellanox/mlx5/core/hwmon.h<br/>index 999654a9b9da..f38271c22c10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/hwmon.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/hwmon.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/hwmon.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/hwmon.h</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> </div><div class='ctx'> int mlx5_hwmon_dev_register(struct mlx5_core_dev *mdev);</div><div class='ctx'> void mlx5_hwmon_dev_unregister(struct mlx5_core_dev *mdev);</div><div class='add'>+const char *hwmon_get_sensor_name(struct mlx5_hwmon *hwmon, int channel);</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> static inline int mlx5_hwmon_dev_register(struct mlx5_core_dev *mdev)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c<br/>index 9772327d5124..3b2f54ca30a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c</a></div><div class='hunk'>@@ -238,6 +238,23 @@ static u32 mlx5i_flow_type_mask(u32 flow_type)</div><div class='ctx'> 	return flow_type &amp; ~(FLOW_EXT | FLOW_MAC_EXT | FLOW_RSS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5i_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = mlx5i_epriv(dev);</div><div class='add'>+</div><div class='add'>+	return mlx5e_ethtool_set_rxfh_fields(priv, cmd, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5i_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 struct ethtool_rxfh_fields *info)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = mlx5i_epriv(dev);</div><div class='add'>+</div><div class='add'>+	return mlx5e_ethtool_get_rxfh_fields(priv, info);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5i_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = mlx5i_epriv(dev);</div><div class='hunk'>@@ -249,21 +266,18 @@ static int mlx5i_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	return mlx5e_ethtool_set_rxnfc(priv, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 mlx5i_get_rx_ring_count(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *priv = mlx5i_epriv(dev);</div><div class='add'>+</div><div class='add'>+	return priv-&gt;channels.params.num_channels;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5i_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='ctx'> 			   u32 *rule_locs)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv *priv = mlx5i_epriv(dev);</div><div class='ctx'> </div><div class='del'>-	/* ETHTOOL_GRXRINGS is needed by ethtool -x which is not part</div><div class='del'>-	 * of rxnfc. We keep this logic out of mlx5e_ethtool_get_rxnfc,</div><div class='del'>-	 * to avoid breaking "ethtool -x" when mlx5e_ethtool_get_rxnfc</div><div class='del'>-	 * is compiled out via CONFIG_MLX5_EN_RXNFC=n.</div><div class='del'>-	 */</div><div class='del'>-	if (info-&gt;cmd == ETHTOOL_GRXRINGS) {</div><div class='del'>-		info-&gt;data = priv-&gt;channels.params.num_channels;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return mlx5e_ethtool_get_rxnfc(priv, info, rule_locs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -283,8 +297,11 @@ const struct ethtool_ops mlx5i_ethtool_ops = {</div><div class='ctx'> 	.get_coalesce       = mlx5i_get_coalesce,</div><div class='ctx'> 	.set_coalesce       = mlx5i_set_coalesce,</div><div class='ctx'> 	.get_ts_info        = mlx5i_get_ts_info,</div><div class='add'>+	.get_rxfh_fields    = mlx5i_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields    = mlx5i_set_rxfh_fields,</div><div class='ctx'> 	.get_rxnfc          = mlx5i_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc          = mlx5i_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count  = mlx5i_get_rx_ring_count,</div><div class='ctx'> 	.get_link_ksettings = mlx5i_get_link_ksettings,</div><div class='ctx'> 	.get_link           = ethtool_op_get_link,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c b/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c<br/>index 0979d672d47f..0a6003fe60e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;rdma/ib_verbs.h&gt;</div><div class='ctx'> #include &lt;linux/mlx5/fs.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include "en.h"</div><div class='ctx'> #include "en/params.h"</div><div class='ctx'> #include "ipoib.h"</div><div class='hunk'>@@ -44,6 +45,23 @@ static int mlx5i_open(struct net_device *netdev);</div><div class='ctx'> static int mlx5i_close(struct net_device *netdev);</div><div class='ctx'> static int mlx5i_change_mtu(struct net_device *netdev, int new_mtu);</div><div class='ctx'> </div><div class='add'>+int mlx5i_hwtstamp_set(struct net_device *dev,</div><div class='add'>+		       struct kernel_hwtstamp_config *config,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *epriv = mlx5i_epriv(dev);</div><div class='add'>+</div><div class='add'>+	return mlx5e_hwtstamp_set(epriv, config, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5i_hwtstamp_get(struct net_device *dev,</div><div class='add'>+		       struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct mlx5e_priv *epriv = mlx5i_epriv(dev);</div><div class='add'>+</div><div class='add'>+	return mlx5e_hwtstamp_get(epriv, config);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops mlx5i_netdev_ops = {</div><div class='ctx'> 	.ndo_open                = mlx5i_open,</div><div class='ctx'> 	.ndo_stop                = mlx5i_close,</div><div class='hunk'>@@ -51,7 +69,8 @@ static const struct net_device_ops mlx5i_netdev_ops = {</div><div class='ctx'> 	.ndo_init                = mlx5i_dev_init,</div><div class='ctx'> 	.ndo_uninit              = mlx5i_dev_cleanup,</div><div class='ctx'> 	.ndo_change_mtu          = mlx5i_change_mtu,</div><div class='del'>-	.ndo_eth_ioctl            = mlx5i_ioctl,</div><div class='add'>+	.ndo_hwtstamp_get        = mlx5i_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set        = mlx5i_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* IPoIB mlx5 netdev profile */</div><div class='hunk'>@@ -102,6 +121,8 @@ int mlx5i_init(struct mlx5_core_dev *mdev, struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;mlx5i_netdev_ops;</div><div class='ctx'> 	netdev-&gt;ethtool_ops = &amp;mlx5i_ethtool_ops;</div><div class='add'>+	netdev-&gt;request_ops_lock = true;</div><div class='add'>+	netdev_lockdep_set_classes(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -313,7 +334,7 @@ void mlx5i_destroy_underlay_qp(struct mlx5_core_dev *mdev, u32 qpn)</div><div class='ctx'> </div><div class='ctx'> int mlx5i_update_nic_rx(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	return mlx5e_refresh_tirs(priv, true, true);</div><div class='add'>+	return mlx5e_refresh_tirs(priv-&gt;mdev, true, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5i_create_tis(struct mlx5_core_dev *mdev, u32 underlay_qpn, u32 *tisn)</div><div class='hunk'>@@ -406,6 +427,7 @@ static void mlx5i_destroy_flow_steering(struct mlx5e_priv *priv)</div><div class='ctx'> static int mlx5i_init_rx(struct mlx5e_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_core_dev *mdev = priv-&gt;mdev;</div><div class='add'>+	enum mlx5e_rx_res_features features;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;fs = mlx5e_fs_init(priv-&gt;profile, mdev,</div><div class='hunk'>@@ -424,7 +446,9 @@ static int mlx5i_init_rx(struct mlx5e_priv *priv)</div><div class='ctx'> 		goto err_destroy_q_counters;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;rx_res = mlx5e_rx_res_create(priv-&gt;mdev, 0, priv-&gt;max_nch, priv-&gt;drop_rq.rqn,</div><div class='add'>+	features = MLX5E_RX_RES_FEATURE_SELF_LB_BLOCK;</div><div class='add'>+	priv-&gt;rx_res = mlx5e_rx_res_create(priv-&gt;mdev, features, priv-&gt;max_nch,</div><div class='add'>+					   priv-&gt;drop_rq.rqn,</div><div class='ctx'> 					   &amp;priv-&gt;channels.params.packet_merge,</div><div class='ctx'> 					   priv-&gt;channels.params.num_channels);</div><div class='ctx'> 	if (IS_ERR(priv-&gt;rx_res)) {</div><div class='hunk'>@@ -554,20 +578,6 @@ int mlx5i_dev_init(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5i_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct mlx5e_priv *priv = mlx5i_epriv(dev);</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return mlx5e_hwstamp_set(priv, ifr);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return mlx5e_hwstamp_get(priv, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void mlx5i_dev_cleanup(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5e_priv    *priv   = mlx5i_epriv(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.h b/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.h<br/>index 2ab6437a1c49..d67d5a72bb41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.h</a></div><div class='hunk'>@@ -88,7 +88,11 @@ struct net_device *mlx5i_pkey_get_netdev(struct net_device *netdev, u32 qpn);</div><div class='ctx'> /* Shared ndo functions */</div><div class='ctx'> int mlx5i_dev_init(struct net_device *dev);</div><div class='ctx'> void mlx5i_dev_cleanup(struct net_device *dev);</div><div class='del'>-int mlx5i_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);</div><div class='add'>+int mlx5i_hwtstamp_set(struct net_device *dev,</div><div class='add'>+		       struct kernel_hwtstamp_config *config,</div><div class='add'>+		       struct netlink_ext_ack *extack);</div><div class='add'>+int mlx5i_hwtstamp_get(struct net_device *dev,</div><div class='add'>+		       struct kernel_hwtstamp_config *config);</div><div class='ctx'> </div><div class='ctx'> /* Parent profile functions */</div><div class='ctx'> int mlx5i_init(struct mlx5_core_dev *mdev, struct net_device *netdev);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c b/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c<br/>index 028a76944d82..04444dad3a0d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c</a></div><div class='hunk'>@@ -140,7 +140,6 @@ static int mlx5i_pkey_close(struct net_device *netdev);</div><div class='ctx'> static int mlx5i_pkey_dev_init(struct net_device *dev);</div><div class='ctx'> static void mlx5i_pkey_dev_cleanup(struct net_device *netdev);</div><div class='ctx'> static int mlx5i_pkey_change_mtu(struct net_device *netdev, int new_mtu);</div><div class='del'>-static int mlx5i_pkey_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops mlx5i_pkey_netdev_ops = {</div><div class='ctx'> 	.ndo_open                = mlx5i_pkey_open,</div><div class='hunk'>@@ -149,7 +148,8 @@ static const struct net_device_ops mlx5i_pkey_netdev_ops = {</div><div class='ctx'> 	.ndo_get_stats64         = mlx5i_get_stats,</div><div class='ctx'> 	.ndo_uninit              = mlx5i_pkey_dev_cleanup,</div><div class='ctx'> 	.ndo_change_mtu          = mlx5i_pkey_change_mtu,</div><div class='del'>-	.ndo_eth_ioctl            = mlx5i_pkey_ioctl,</div><div class='add'>+	.ndo_hwtstamp_get        = mlx5i_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set        = mlx5i_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Child NDOs */</div><div class='hunk'>@@ -184,11 +184,6 @@ static int mlx5i_pkey_dev_init(struct net_device *dev)</div><div class='ctx'> 	return mlx5i_dev_init(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5i_pkey_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	return mlx5i_ioctl(dev, ifr, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void mlx5i_pkey_dev_cleanup(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	mlx5i_parent_put(netdev);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c b/drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c<br/>index 1477db7f5307..14d339eceb92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c</a></div><div class='hunk'>@@ -47,29 +47,40 @@ static int cpu_get_least_loaded(struct mlx5_irq_pool *pool,</div><div class='ctx'> static struct mlx5_irq *</div><div class='ctx'> irq_pool_request_irq(struct mlx5_irq_pool *pool, struct irq_affinity_desc *af_desc)</div><div class='ctx'> {</div><div class='del'>-	struct irq_affinity_desc auto_desc = {};</div><div class='add'>+	struct irq_affinity_desc *auto_desc;</div><div class='ctx'> 	struct mlx5_irq *irq;</div><div class='ctx'> 	u32 irq_index;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	auto_desc = kvzalloc(sizeof(*auto_desc), GFP_KERNEL);</div><div class='add'>+	if (!auto_desc)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='ctx'> 	err = xa_alloc(&amp;pool-&gt;irqs, &amp;irq_index, NULL, pool-&gt;xa_num_irqs, GFP_KERNEL);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		kvfree(auto_desc);</div><div class='ctx'> 		return ERR_PTR(err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (pool-&gt;irqs_per_cpu) {</div><div class='ctx'> 		if (cpumask_weight(&amp;af_desc-&gt;mask) &gt; 1)</div><div class='ctx'> 			/* if req_mask contain more then one CPU, set the least loadad CPU</div><div class='ctx'> 			 * of req_mask</div><div class='ctx'> 			 */</div><div class='ctx'> 			cpumask_set_cpu(cpu_get_least_loaded(pool, &amp;af_desc-&gt;mask),</div><div class='del'>-					&amp;auto_desc.mask);</div><div class='add'>+					&amp;auto_desc-&gt;mask);</div><div class='ctx'> 		else</div><div class='ctx'> 			cpu_get(pool, cpumask_first(&amp;af_desc-&gt;mask));</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	irq = mlx5_irq_alloc(pool, irq_index,</div><div class='del'>-			     cpumask_empty(&amp;auto_desc.mask) ? af_desc : &amp;auto_desc,</div><div class='add'>+			     cpumask_empty(&amp;auto_desc-&gt;mask) ? af_desc : auto_desc,</div><div class='ctx'> 			     NULL);</div><div class='ctx'> 	if (IS_ERR(irq))</div><div class='ctx'> 		xa_erase(&amp;pool-&gt;irqs, irq_index);</div><div class='add'>+</div><div class='add'>+	kvfree(auto_desc);</div><div class='add'>+</div><div class='ctx'> 	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -139,8 +150,8 @@ mlx5_irq_affinity_request(struct mlx5_core_dev *dev, struct mlx5_irq_pool *pool,</div><div class='ctx'> 	if (IS_ERR(new_irq)) {</div><div class='ctx'> 		if (!least_loaded_irq) {</div><div class='ctx'> 			/* We failed to create an IRQ and we didn't find an IRQ */</div><div class='del'>-			mlx5_core_err(pool-&gt;dev, "Didn't find a matching IRQ. err = %ld\n",</div><div class='del'>-				      PTR_ERR(new_irq));</div><div class='add'>+			mlx5_core_err(pool-&gt;dev, "Didn't find a matching IRQ. err = %pe\n",</div><div class='add'>+				      new_irq);</div><div class='ctx'> 			mutex_unlock(&amp;pool-&gt;lock);</div><div class='ctx'> 			return new_irq;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -175,7 +186,7 @@ unlock:</div><div class='ctx'> </div><div class='ctx'> void mlx5_irq_affinity_irq_release(struct mlx5_core_dev *dev, struct mlx5_irq *irq)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_irq_pool *pool = mlx5_irq_pool_get(dev);</div><div class='add'>+	struct mlx5_irq_pool *pool = mlx5_irq_get_pool(irq);</div><div class='ctx'> 	int cpu;</div><div class='ctx'> </div><div class='ctx'> 	cpu = cpumask_first(mlx5_irq_get_affinity_mask(irq));</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/debugfs.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/debugfs.c<br/>index f4b777d4e108..62b6faa4276a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lag/debugfs.c</a></div><div class='hunk'>@@ -105,20 +105,20 @@ static int mapping_show(struct seq_file *file, void *priv)</div><div class='ctx'> 	struct mlx5_lag *ldev;</div><div class='ctx'> 	bool hash = false;</div><div class='ctx'> 	bool lag_active;</div><div class='add'>+	int i, idx = 0;</div><div class='ctx'> 	int num_ports;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	ldev = mlx5_lag_dev(dev);</div><div class='ctx'> 	mutex_lock(&amp;ldev-&gt;lock);</div><div class='ctx'> 	lag_active = __mlx5_lag_is_active(ldev);</div><div class='ctx'> 	if (lag_active) {</div><div class='ctx'> 		if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &amp;ldev-&gt;mode_flags)) {</div><div class='del'>-			mlx5_infer_tx_enabled(&amp;ldev-&gt;tracker, ldev-&gt;ports, ports,</div><div class='add'>+			mlx5_infer_tx_enabled(&amp;ldev-&gt;tracker, ldev, ports,</div><div class='ctx'> 					      &amp;num_ports);</div><div class='ctx'> 			hash = true;</div><div class='ctx'> 		} else {</div><div class='del'>-			for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='del'>-				ports[i] = ldev-&gt;v2p_map[i];</div><div class='add'>+			mlx5_ldev_for_each(i, 0, ldev)</div><div class='add'>+				ports[idx++] = ldev-&gt;v2p_map[i];</div><div class='ctx'> 			num_ports = ldev-&gt;ports;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -144,11 +144,8 @@ static int members_show(struct seq_file *file, void *priv)</div><div class='ctx'> </div><div class='ctx'> 	ldev = mlx5_lag_dev(dev);</div><div class='ctx'> 	mutex_lock(&amp;ldev-&gt;lock);</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='del'>-		if (!ldev-&gt;pf[i].dev)</div><div class='del'>-			continue;</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		seq_printf(file, "%s\n", dev_name(ldev-&gt;pf[i].dev-&gt;device));</div><div class='del'>-	}</div><div class='ctx'> 	mutex_unlock(&amp;ldev-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c<br/>index 8577db3308cc..1ac933cd8f02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> #include &lt;linux/mlx5/driver.h&gt;</div><div class='ctx'> #include &lt;linux/mlx5/eswitch.h&gt;</div><div class='ctx'> #include &lt;linux/mlx5/vport.h&gt;</div><div class='add'>+#include "lib/mlx5.h"</div><div class='ctx'> #include "lib/devcom.h"</div><div class='ctx'> #include "mlx5_core.h"</div><div class='ctx'> #include "eswitch.h"</div><div class='hunk'>@@ -43,10 +44,6 @@</div><div class='ctx'> #include "mp.h"</div><div class='ctx'> #include "mpesw.h"</div><div class='ctx'> </div><div class='del'>-enum {</div><div class='del'>-	MLX5_LAG_EGRESS_PORT_1 = 1,</div><div class='del'>-	MLX5_LAG_EGRESS_PORT_2,</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> /* General purpose, use for short periods of time.</div><div class='ctx'>  * Beware of lock dependencies (preferably, no locks should be acquired</div><div class='hunk'>@@ -72,7 +69,7 @@ static u8 lag_active_port_bits(struct mlx5_lag *ldev)</div><div class='ctx'> 	int num_enabled;</div><div class='ctx'> 	int idx;</div><div class='ctx'> </div><div class='del'>-	mlx5_infer_tx_enabled(&amp;ldev-&gt;tracker, ldev-&gt;ports, enabled_ports,</div><div class='add'>+	mlx5_infer_tx_enabled(&amp;ldev-&gt;tracker, ldev, enabled_ports,</div><div class='ctx'> 			      &amp;num_enabled);</div><div class='ctx'> 	for (idx = 0; idx &lt; num_enabled; idx++)</div><div class='ctx'> 		active_port |= BIT_MASK(enabled_ports[idx]);</div><div class='hunk'>@@ -80,23 +77,30 @@ static u8 lag_active_port_bits(struct mlx5_lag *ldev)</div><div class='ctx'> 	return active_port;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5_cmd_create_lag(struct mlx5_core_dev *dev, u8 *ports, int mode,</div><div class='del'>-			       unsigned long flags)</div><div class='add'>+static int mlx5_cmd_create_lag(struct mlx5_core_dev *dev, struct mlx5_lag *ldev,</div><div class='add'>+			       int mode, unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	bool fdb_sel_mode = test_bit(MLX5_LAG_MODE_FLAG_FDB_SEL_MODE_NATIVE,</div><div class='ctx'> 				     &amp;flags);</div><div class='ctx'> 	int port_sel_mode = get_port_sel_mode(mode, flags);</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(create_lag_in)] = {};</div><div class='add'>+	u8 *ports = ldev-&gt;v2p_map;</div><div class='add'>+	int idx0, idx1;</div><div class='ctx'> 	void *lag_ctx;</div><div class='ctx'> </div><div class='ctx'> 	lag_ctx = MLX5_ADDR_OF(create_lag_in, in, ctx);</div><div class='ctx'> 	MLX5_SET(create_lag_in, in, opcode, MLX5_CMD_OP_CREATE_LAG);</div><div class='ctx'> 	MLX5_SET(lagc, lag_ctx, fdb_selection_mode, fdb_sel_mode);</div><div class='add'>+	idx0 = mlx5_lag_get_dev_index_by_seq(ldev, 0);</div><div class='add'>+	idx1 = mlx5_lag_get_dev_index_by_seq(ldev, 1);</div><div class='add'>+</div><div class='add'>+	if (idx0 &lt; 0 || idx1 &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	switch (port_sel_mode) {</div><div class='ctx'> 	case MLX5_LAG_PORT_SELECT_MODE_QUEUE_AFFINITY:</div><div class='del'>-		MLX5_SET(lagc, lag_ctx, tx_remap_affinity_1, ports[0]);</div><div class='del'>-		MLX5_SET(lagc, lag_ctx, tx_remap_affinity_2, ports[1]);</div><div class='add'>+		MLX5_SET(lagc, lag_ctx, tx_remap_affinity_1, ports[idx0]);</div><div class='add'>+		MLX5_SET(lagc, lag_ctx, tx_remap_affinity_2, ports[idx1]);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5_LAG_PORT_SELECT_MODE_PORT_SELECT_FT:</div><div class='ctx'> 		if (!MLX5_CAP_PORT_SELECTION(dev, port_select_flow_table_bypass))</div><div class='hunk'>@@ -113,17 +117,23 @@ static int mlx5_cmd_create_lag(struct mlx5_core_dev *dev, u8 *ports, int mode,</div><div class='ctx'> 	return mlx5_cmd_exec_in(dev, create_lag, in);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5_cmd_modify_lag(struct mlx5_core_dev *dev, u8 num_ports,</div><div class='add'>+static int mlx5_cmd_modify_lag(struct mlx5_core_dev *dev, struct mlx5_lag *ldev,</div><div class='ctx'> 			       u8 *ports)</div><div class='ctx'> {</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(modify_lag_in)] = {};</div><div class='ctx'> 	void *lag_ctx = MLX5_ADDR_OF(modify_lag_in, in, ctx);</div><div class='add'>+	int idx0, idx1;</div><div class='add'>+</div><div class='add'>+	idx0 = mlx5_lag_get_dev_index_by_seq(ldev, 0);</div><div class='add'>+	idx1 = mlx5_lag_get_dev_index_by_seq(ldev, 1);</div><div class='add'>+	if (idx0 &lt; 0 || idx1 &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(modify_lag_in, in, opcode, MLX5_CMD_OP_MODIFY_LAG);</div><div class='ctx'> 	MLX5_SET(modify_lag_in, in, field_select, 0x1);</div><div class='ctx'> </div><div class='del'>-	MLX5_SET(lagc, lag_ctx, tx_remap_affinity_1, ports[0]);</div><div class='del'>-	MLX5_SET(lagc, lag_ctx, tx_remap_affinity_2, ports[1]);</div><div class='add'>+	MLX5_SET(lagc, lag_ctx, tx_remap_affinity_1, ports[idx0]);</div><div class='add'>+	MLX5_SET(lagc, lag_ctx, tx_remap_affinity_2, ports[idx1]);</div><div class='ctx'> </div><div class='ctx'> 	return mlx5_cmd_exec_in(dev, modify_lag, in);</div><div class='ctx'> }</div><div class='hunk'>@@ -148,33 +158,31 @@ int mlx5_cmd_destroy_vport_lag(struct mlx5_core_dev *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mlx5_cmd_destroy_vport_lag);</div><div class='ctx'> </div><div class='del'>-static void mlx5_infer_tx_disabled(struct lag_tracker *tracker, u8 num_ports,</div><div class='add'>+static void mlx5_infer_tx_disabled(struct lag_tracker *tracker, struct mlx5_lag *ldev,</div><div class='ctx'> 				   u8 *ports, int *num_disabled)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	*num_disabled = 0;</div><div class='del'>-	for (i = 0; i &lt; num_ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		if (!tracker-&gt;netdev_state[i].tx_enabled ||</div><div class='ctx'> 		    !tracker-&gt;netdev_state[i].link_up)</div><div class='ctx'> 			ports[(*num_disabled)++] = i;</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5_infer_tx_enabled(struct lag_tracker *tracker, u8 num_ports,</div><div class='add'>+void mlx5_infer_tx_enabled(struct lag_tracker *tracker, struct mlx5_lag *ldev,</div><div class='ctx'> 			   u8 *ports, int *num_enabled)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	*num_enabled = 0;</div><div class='del'>-	for (i = 0; i &lt; num_ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		if (tracker-&gt;netdev_state[i].tx_enabled &amp;&amp;</div><div class='ctx'> 		    tracker-&gt;netdev_state[i].link_up)</div><div class='ctx'> 			ports[(*num_enabled)++] = i;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (*num_enabled == 0)</div><div class='del'>-		mlx5_infer_tx_disabled(tracker, num_ports, ports, num_enabled);</div><div class='add'>+		mlx5_infer_tx_disabled(tracker, ldev, ports, num_enabled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5_lag_print_mapping(struct mlx5_core_dev *dev,</div><div class='hunk'>@@ -192,7 +200,7 @@ static void mlx5_lag_print_mapping(struct mlx5_core_dev *dev,</div><div class='ctx'> 	int j;</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &amp;flags)) {</div><div class='del'>-		mlx5_infer_tx_enabled(tracker, ldev-&gt;ports, enabled_ports,</div><div class='add'>+		mlx5_infer_tx_enabled(tracker, ldev, enabled_ports,</div><div class='ctx'> 				      &amp;num_enabled);</div><div class='ctx'> 		for (i = 0; i &lt; num_enabled; i++) {</div><div class='ctx'> 			err = scnprintf(buf + written, 4, "%d, ", enabled_ports[i] + 1);</div><div class='hunk'>@@ -203,7 +211,7 @@ static void mlx5_lag_print_mapping(struct mlx5_core_dev *dev,</div><div class='ctx'> 		buf[written - 2] = 0;</div><div class='ctx'> 		mlx5_core_info(dev, "lag map active ports: %s\n", buf);</div><div class='ctx'> 	} else {</div><div class='del'>-		for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+		mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 			for (j  = 0; j &lt; ldev-&gt;buckets; j++) {</div><div class='ctx'> 				idx = i * ldev-&gt;buckets + j;</div><div class='ctx'> 				err = scnprintf(buf + written, 10,</div><div class='hunk'>@@ -224,9 +232,13 @@ static void mlx5_do_bond_work(struct work_struct *work);</div><div class='ctx'> static void mlx5_ldev_free(struct kref *ref)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_lag *ldev = container_of(ref, struct mlx5_lag, ref);</div><div class='add'>+	struct net *net;</div><div class='add'>+</div><div class='add'>+	if (ldev-&gt;nb.notifier_call) {</div><div class='add'>+		net = read_pnet(&amp;ldev-&gt;net);</div><div class='add'>+		unregister_netdevice_notifier_net(net, &amp;ldev-&gt;nb);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (ldev-&gt;nb.notifier_call)</div><div class='del'>-		unregister_netdevice_notifier_net(&amp;init_net, &amp;ldev-&gt;nb);</div><div class='ctx'> 	mlx5_lag_mp_cleanup(ldev);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;ldev-&gt;bond_work);</div><div class='ctx'> 	destroy_workqueue(ldev-&gt;wq);</div><div class='hunk'>@@ -264,7 +276,8 @@ static struct mlx5_lag *mlx5_lag_dev_alloc(struct mlx5_core_dev *dev)</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;ldev-&gt;bond_work, mlx5_do_bond_work);</div><div class='ctx'> </div><div class='ctx'> 	ldev-&gt;nb.notifier_call = mlx5_lag_netdev_event;</div><div class='del'>-	if (register_netdevice_notifier_net(&amp;init_net, &amp;ldev-&gt;nb)) {</div><div class='add'>+	write_pnet(&amp;ldev-&gt;net, mlx5_core_net(dev));</div><div class='add'>+	if (register_netdevice_notifier_net(read_pnet(&amp;ldev-&gt;net), &amp;ldev-&gt;nb)) {</div><div class='ctx'> 		ldev-&gt;nb.notifier_call = NULL;</div><div class='ctx'> 		mlx5_core_err(dev, "Failed to register LAG netdev notifier\n");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -286,13 +299,55 @@ int mlx5_lag_dev_get_netdev_idx(struct mlx5_lag *ldev,</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		if (ldev-&gt;pf[i].netdev == ndev)</div><div class='ctx'> 			return i;</div><div class='ctx'> </div><div class='ctx'> 	return -ENOENT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mlx5_lag_get_dev_index_by_seq(struct mlx5_lag *ldev, int seq)</div><div class='add'>+{</div><div class='add'>+	int i, num = 0;</div><div class='add'>+</div><div class='add'>+	if (!ldev)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='add'>+		if (num == seq)</div><div class='add'>+			return i;</div><div class='add'>+		num++;</div><div class='add'>+	}</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_lag_num_devs(struct mlx5_lag *ldev)</div><div class='add'>+{</div><div class='add'>+	int i, num = 0;</div><div class='add'>+</div><div class='add'>+	if (!ldev)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='add'>+		(void)i;</div><div class='add'>+		num++;</div><div class='add'>+	}</div><div class='add'>+	return num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_lag_num_netdevs(struct mlx5_lag *ldev)</div><div class='add'>+{</div><div class='add'>+	int i, num = 0;</div><div class='add'>+</div><div class='add'>+	if (!ldev)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='add'>+		if (ldev-&gt;pf[i].netdev)</div><div class='add'>+			num++;</div><div class='add'>+	return num;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool __mlx5_lag_is_roce(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='ctx'> 	return ldev-&gt;mode == MLX5_LAG_MODE_ROCE;</div><div class='hunk'>@@ -310,7 +365,7 @@ static bool __mlx5_lag_is_sriov(struct mlx5_lag *ldev)</div><div class='ctx'>  * with mapping that points to active ports.</div><div class='ctx'>  */</div><div class='ctx'> static void mlx5_infer_tx_affinity_mapping(struct lag_tracker *tracker,</div><div class='del'>-					   u8 num_ports,</div><div class='add'>+					   struct mlx5_lag *ldev,</div><div class='ctx'> 					   u8 buckets,</div><div class='ctx'> 					   u8 *ports)</div><div class='ctx'> {</div><div class='hunk'>@@ -323,7 +378,7 @@ static void mlx5_infer_tx_affinity_mapping(struct lag_tracker *tracker,</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int j;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; num_ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		if (tracker-&gt;netdev_state[i].tx_enabled &amp;&amp;</div><div class='ctx'> 		    tracker-&gt;netdev_state[i].link_up)</div><div class='ctx'> 			enabled[enabled_ports_num++] = i;</div><div class='hunk'>@@ -334,15 +389,16 @@ static void mlx5_infer_tx_affinity_mapping(struct lag_tracker *tracker,</div><div class='ctx'> 	/* Use native mapping by default where each port's buckets</div><div class='ctx'> 	 * point the native port: 1 1 1 .. 1 2 2 2 ... 2 3 3 3 ... 3 etc</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; num_ports; i++)</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		for (j = 0; j &lt; buckets; j++) {</div><div class='ctx'> 			idx = i * buckets + j;</div><div class='del'>-			ports[idx] = MLX5_LAG_EGRESS_PORT_1 + i;</div><div class='add'>+			ports[idx] = i + 1;</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* If all ports are disabled/enabled keep native mapping */</div><div class='del'>-	if (enabled_ports_num == num_ports ||</div><div class='del'>-	    disabled_ports_num == num_ports)</div><div class='add'>+	if (enabled_ports_num == ldev-&gt;ports ||</div><div class='add'>+	    disabled_ports_num == ldev-&gt;ports)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Go over the disabled ports and for each assign a random active port */</div><div class='hunk'>@@ -358,7 +414,7 @@ static bool mlx5_lag_has_drop_rule(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		if (ldev-&gt;pf[i].has_drop)</div><div class='ctx'> 			return true;</div><div class='ctx'> 	return false;</div><div class='hunk'>@@ -368,7 +424,7 @@ static void mlx5_lag_drop_rule_cleanup(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		if (!ldev-&gt;pf[i].has_drop)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -396,7 +452,7 @@ static void mlx5_lag_drop_rule_setup(struct mlx5_lag *ldev,</div><div class='ctx'> 	if (!ldev-&gt;tracker.has_inactive)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mlx5_infer_tx_disabled(tracker, ldev-&gt;ports, disabled_ports, &amp;num_disabled);</div><div class='add'>+	mlx5_infer_tx_disabled(tracker, ldev, disabled_ports, &amp;num_disabled);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_disabled; i++) {</div><div class='ctx'> 		disabled_index = disabled_ports[i];</div><div class='hunk'>@@ -428,10 +484,15 @@ static int mlx5_cmd_modify_active_port(struct mlx5_core_dev *dev, u8 ports)</div><div class='ctx'> </div><div class='ctx'> static int _mlx5_modify_lag(struct mlx5_lag *ldev, u8 *ports)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev0 = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='add'>+	struct mlx5_core_dev *dev0;</div><div class='ctx'> 	u8 active_ports;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev0 = ldev-&gt;pf[idx].dev;</div><div class='ctx'> 	if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &amp;ldev-&gt;mode_flags)) {</div><div class='ctx'> 		ret = mlx5_lag_port_sel_modify(ldev, ports);</div><div class='ctx'> 		if (ret ||</div><div class='hunk'>@@ -442,7 +503,7 @@ static int _mlx5_modify_lag(struct mlx5_lag *ldev, u8 *ports)</div><div class='ctx'> </div><div class='ctx'> 		return mlx5_cmd_modify_active_port(dev0, active_ports);</div><div class='ctx'> 	}</div><div class='del'>-	return mlx5_cmd_modify_lag(dev0, ldev-&gt;ports, ports);</div><div class='add'>+	return mlx5_cmd_modify_lag(dev0, ldev, ports);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct net_device *mlx5_lag_active_backup_get_netdev(struct mlx5_core_dev *dev)</div><div class='hunk'>@@ -450,7 +511,7 @@ static struct net_device *mlx5_lag_active_backup_get_netdev(struct mlx5_core_dev</div><div class='ctx'> 	struct net_device *ndev = NULL;</div><div class='ctx'> 	struct mlx5_lag *ldev;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int i;</div><div class='add'>+	int i, last_idx;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;lag_lock, flags);</div><div class='ctx'> 	ldev = mlx5_lag_dev(dev);</div><div class='hunk'>@@ -458,14 +519,17 @@ static struct net_device *mlx5_lag_active_backup_get_netdev(struct mlx5_core_dev</div><div class='ctx'> 	if (!ldev)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		if (ldev-&gt;tracker.netdev_state[i].tx_enabled)</div><div class='ctx'> 			ndev = ldev-&gt;pf[i].netdev;</div><div class='del'>-	if (!ndev)</div><div class='del'>-		ndev = ldev-&gt;pf[ldev-&gt;ports - 1].netdev;</div><div class='add'>+	if (!ndev) {</div><div class='add'>+		last_idx = mlx5_lag_get_dev_index_by_seq(ldev, ldev-&gt;ports - 1);</div><div class='add'>+		if (last_idx &lt; 0)</div><div class='add'>+			goto unlock;</div><div class='add'>+		ndev = ldev-&gt;pf[last_idx].netdev;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (ndev)</div><div class='del'>-		dev_hold(ndev);</div><div class='add'>+	dev_hold(ndev);</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lag_lock, flags);</div><div class='hunk'>@@ -476,16 +540,21 @@ unlock:</div><div class='ctx'> void mlx5_modify_lag(struct mlx5_lag *ldev,</div><div class='ctx'> 		     struct lag_tracker *tracker)</div><div class='ctx'> {</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	u8 ports[MLX5_MAX_PORTS * MLX5_LAG_MAX_HASH_BUCKETS] = {};</div><div class='del'>-	struct mlx5_core_dev *dev0 = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	struct mlx5_core_dev *dev0;</div><div class='ctx'> 	int idx;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int j;</div><div class='ctx'> </div><div class='del'>-	mlx5_infer_tx_affinity_mapping(tracker, ldev-&gt;ports, ldev-&gt;buckets, ports);</div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev0 = ldev-&gt;pf[first_idx].dev;</div><div class='add'>+	mlx5_infer_tx_affinity_mapping(tracker, ldev, ldev-&gt;buckets, ports);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		for (j = 0; j &lt; ldev-&gt;buckets; j++) {</div><div class='ctx'> 			idx = i * ldev-&gt;buckets + j;</div><div class='ctx'> 			if (ports[idx] == ldev-&gt;v2p_map[idx])</div><div class='hunk'>@@ -516,13 +585,25 @@ void mlx5_modify_lag(struct mlx5_lag *ldev,</div><div class='ctx'> 		blocking_notifier_call_chain(&amp;dev0-&gt;priv.lag_nh,</div><div class='ctx'> 					     MLX5_DRIVER_EVENT_ACTIVE_BACKUP_LAG_CHANGE_LOWERSTATE,</div><div class='ctx'> 					     ndev);</div><div class='add'>+		dev_put(ndev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5_lag_set_port_sel_mode_roce(struct mlx5_lag *ldev,</div><div class='del'>-					   unsigned long *flags)</div><div class='add'>+static int mlx5_lag_set_port_sel_mode(struct mlx5_lag *ldev,</div><div class='add'>+				      enum mlx5_lag_mode mode,</div><div class='add'>+				      unsigned long *flags)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev0 = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='add'>+	struct mlx5_core_dev *dev0;</div><div class='add'>+</div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (mode == MLX5_LAG_MODE_MPESW ||</div><div class='add'>+	    mode == MLX5_LAG_MODE_MULTIPATH)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev0 = ldev-&gt;pf[first_idx].dev;</div><div class='ctx'> </div><div class='ctx'> 	if (!MLX5_CAP_PORT_SELECTION(dev0, port_select_flow_table)) {</div><div class='ctx'> 		if (ldev-&gt;ports &gt; 2)</div><div class='hunk'>@@ -538,30 +619,10 @@ static int mlx5_lag_set_port_sel_mode_roce(struct mlx5_lag *ldev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_lag_set_port_sel_mode_offloads(struct mlx5_lag *ldev,</div><div class='del'>-						struct lag_tracker *tracker,</div><div class='del'>-						enum mlx5_lag_mode mode,</div><div class='del'>-						unsigned long *flags)</div><div class='del'>-{</div><div class='del'>-	struct lag_func *dev0 = &amp;ldev-&gt;pf[MLX5_LAG_P1];</div><div class='del'>-</div><div class='del'>-	if (mode == MLX5_LAG_MODE_MPESW)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (MLX5_CAP_PORT_SELECTION(dev0-&gt;dev, port_select_flow_table) &amp;&amp;</div><div class='del'>-	    tracker-&gt;tx_type == NETDEV_LAG_TX_TYPE_HASH) {</div><div class='del'>-		if (ldev-&gt;ports &gt; 2)</div><div class='del'>-			ldev-&gt;buckets = MLX5_LAG_MAX_HASH_BUCKETS;</div><div class='del'>-		set_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, flags);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mlx5_lag_set_flags(struct mlx5_lag *ldev, enum mlx5_lag_mode mode,</div><div class='ctx'> 			      struct lag_tracker *tracker, bool shared_fdb,</div><div class='ctx'> 			      unsigned long *flags)</div><div class='ctx'> {</div><div class='del'>-	bool roce_lag = mode == MLX5_LAG_MODE_ROCE;</div><div class='del'>-</div><div class='ctx'> 	*flags = 0;</div><div class='ctx'> 	if (shared_fdb) {</div><div class='ctx'> 		set_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, flags);</div><div class='hunk'>@@ -571,11 +632,7 @@ static int mlx5_lag_set_flags(struct mlx5_lag *ldev, enum mlx5_lag_mode mode,</div><div class='ctx'> 	if (mode == MLX5_LAG_MODE_MPESW)</div><div class='ctx'> 		set_bit(MLX5_LAG_MODE_FLAG_FDB_SEL_MODE_NATIVE, flags);</div><div class='ctx'> </div><div class='del'>-	if (roce_lag)</div><div class='del'>-		return mlx5_lag_set_port_sel_mode_roce(ldev, flags);</div><div class='del'>-</div><div class='del'>-	mlx5_lag_set_port_sel_mode_offloads(ldev, tracker, mode, flags);</div><div class='del'>-	return 0;</div><div class='add'>+	return mlx5_lag_set_port_sel_mode(ldev, mode, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> char *mlx5_get_str_port_sel_mode(enum mlx5_lag_mode mode, unsigned long flags)</div><div class='hunk'>@@ -592,12 +649,18 @@ char *mlx5_get_str_port_sel_mode(enum mlx5_lag_mode mode, unsigned long flags)</div><div class='ctx'> </div><div class='ctx'> static int mlx5_lag_create_single_fdb(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev0 = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='del'>-	struct mlx5_eswitch *master_esw = dev0-&gt;priv.eswitch;</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='add'>+	struct mlx5_eswitch *master_esw;</div><div class='add'>+	struct mlx5_core_dev *dev0;</div><div class='add'>+	int i, j;</div><div class='ctx'> 	int err;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = MLX5_LAG_P1 + 1; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev0 = ldev-&gt;pf[first_idx].dev;</div><div class='add'>+	master_esw = dev0-&gt;priv.eswitch;</div><div class='add'>+	mlx5_ldev_for_each(i, first_idx + 1, ldev) {</div><div class='ctx'> 		struct mlx5_eswitch *slave_esw = ldev-&gt;pf[i].dev-&gt;priv.eswitch;</div><div class='ctx'> </div><div class='ctx'> 		err = mlx5_eswitch_offloads_single_fdb_add_one(master_esw,</div><div class='hunk'>@@ -607,9 +670,9 @@ static int mlx5_lag_create_single_fdb(struct mlx5_lag *ldev)</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> err:</div><div class='del'>-	for (; i &gt; MLX5_LAG_P1; i--)</div><div class='add'>+	mlx5_ldev_for_each_reverse(j, i, first_idx + 1, ldev)</div><div class='ctx'> 		mlx5_eswitch_offloads_single_fdb_del_one(master_esw,</div><div class='del'>-							 ldev-&gt;pf[i].dev-&gt;priv.eswitch);</div><div class='add'>+							 ldev-&gt;pf[j].dev-&gt;priv.eswitch);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -619,16 +682,21 @@ static int mlx5_create_lag(struct mlx5_lag *ldev,</div><div class='ctx'> 			   unsigned long flags)</div><div class='ctx'> {</div><div class='ctx'> 	bool shared_fdb = test_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, &amp;flags);</div><div class='del'>-	struct mlx5_core_dev *dev0 = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(destroy_lag_in)] = {};</div><div class='add'>+	struct mlx5_core_dev *dev0;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev0 = ldev-&gt;pf[first_idx].dev;</div><div class='ctx'> 	if (tracker)</div><div class='ctx'> 		mlx5_lag_print_mapping(dev0, ldev, tracker, flags);</div><div class='ctx'> 	mlx5_core_info(dev0, "shared_fdb:%d mode:%s\n",</div><div class='ctx'> 		       shared_fdb, mlx5_get_str_port_sel_mode(mode, flags));</div><div class='ctx'> </div><div class='del'>-	err = mlx5_cmd_create_lag(dev0, ldev-&gt;v2p_map, mode, flags);</div><div class='add'>+	err = mlx5_cmd_create_lag(dev0, ldev, mode, flags);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mlx5_core_err(dev0,</div><div class='ctx'> 			      "Failed to create LAG (%d)\n",</div><div class='hunk'>@@ -660,17 +728,22 @@ int mlx5_activate_lag(struct mlx5_lag *ldev,</div><div class='ctx'> 		      enum mlx5_lag_mode mode,</div><div class='ctx'> 		      bool shared_fdb)</div><div class='ctx'> {</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	bool roce_lag = mode == MLX5_LAG_MODE_ROCE;</div><div class='del'>-	struct mlx5_core_dev *dev0 = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	struct mlx5_core_dev *dev0;</div><div class='ctx'> 	unsigned long flags = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev0 = ldev-&gt;pf[first_idx].dev;</div><div class='ctx'> 	err = mlx5_lag_set_flags(ldev, mode, tracker, shared_fdb, &amp;flags);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	if (mode != MLX5_LAG_MODE_MPESW) {</div><div class='del'>-		mlx5_infer_tx_affinity_mapping(tracker, ldev-&gt;ports, ldev-&gt;buckets, ldev-&gt;v2p_map);</div><div class='add'>+		mlx5_infer_tx_affinity_mapping(tracker, ldev, ldev-&gt;buckets, ldev-&gt;v2p_map);</div><div class='ctx'> 		if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &amp;flags)) {</div><div class='ctx'> 			err = mlx5_lag_port_sel_create(ldev, tracker-&gt;hash_type,</div><div class='ctx'> 						       ldev-&gt;v2p_map);</div><div class='hunk'>@@ -708,20 +781,26 @@ int mlx5_activate_lag(struct mlx5_lag *ldev,</div><div class='ctx'> </div><div class='ctx'> int mlx5_deactivate_lag(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev0 = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='del'>-	struct mlx5_eswitch *master_esw = dev0-&gt;priv.eswitch;</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(destroy_lag_in)] = {};</div><div class='ctx'> 	bool roce_lag = __mlx5_lag_is_roce(ldev);</div><div class='ctx'> 	unsigned long flags = ldev-&gt;mode_flags;</div><div class='add'>+	struct mlx5_eswitch *master_esw;</div><div class='add'>+	struct mlx5_core_dev *dev0;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev0 = ldev-&gt;pf[first_idx].dev;</div><div class='add'>+	master_esw = dev0-&gt;priv.eswitch;</div><div class='ctx'> 	ldev-&gt;mode = MLX5_LAG_MODE_NONE;</div><div class='ctx'> 	ldev-&gt;mode_flags = 0;</div><div class='ctx'> 	mlx5_lag_mp_reset(ldev);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, &amp;flags)) {</div><div class='del'>-		for (i = MLX5_LAG_P1 + 1; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+		mlx5_ldev_for_each(i, first_idx + 1, ldev)</div><div class='ctx'> 			mlx5_eswitch_offloads_single_fdb_del_one(master_esw,</div><div class='ctx'> 								 ldev-&gt;pf[i].dev-&gt;priv.eswitch);</div><div class='ctx'> 		clear_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, &amp;flags);</div><div class='hunk'>@@ -753,6 +832,7 @@ int mlx5_deactivate_lag(struct mlx5_lag *ldev)</div><div class='ctx'> </div><div class='ctx'> bool mlx5_lag_check_prereq(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> #ifdef CONFIG_MLX5_ESWITCH</div><div class='ctx'> 	struct mlx5_core_dev *dev;</div><div class='ctx'> 	u8 mode;</div><div class='hunk'>@@ -760,30 +840,29 @@ bool mlx5_lag_check_prereq(struct mlx5_lag *ldev)</div><div class='ctx'> 	bool roce_support;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='del'>-		if (!ldev-&gt;pf[i].dev)</div><div class='del'>-			return false;</div><div class='add'>+	if (first_idx &lt; 0 || mlx5_lag_num_devs(ldev) != ldev-&gt;ports)</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MLX5_ESWITCH</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		dev = ldev-&gt;pf[i].dev;</div><div class='ctx'> 		if (mlx5_eswitch_num_vfs(dev-&gt;priv.eswitch) &amp;&amp; !is_mdev_switchdev_mode(dev))</div><div class='ctx'> 			return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	dev = ldev-&gt;pf[first_idx].dev;</div><div class='ctx'> 	mode = mlx5_eswitch_mode(dev);</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		if (mlx5_eswitch_mode(ldev-&gt;pf[i].dev) != mode)</div><div class='ctx'> 			return false;</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		if (mlx5_sriov_is_enabled(ldev-&gt;pf[i].dev))</div><div class='ctx'> 			return false;</div><div class='ctx'> #endif</div><div class='del'>-	roce_support = mlx5_get_roce_state(ldev-&gt;pf[MLX5_LAG_P1].dev);</div><div class='del'>-	for (i = 1; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+	roce_support = mlx5_get_roce_state(ldev-&gt;pf[first_idx].dev);</div><div class='add'>+	mlx5_ldev_for_each(i, first_idx + 1, ldev)</div><div class='ctx'> 		if (mlx5_get_roce_state(ldev-&gt;pf[i].dev) != roce_support)</div><div class='ctx'> 			return false;</div><div class='ctx'> </div><div class='hunk'>@@ -794,10 +873,7 @@ void mlx5_lag_add_devices(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='del'>-		if (!ldev-&gt;pf[i].dev)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		if (ldev-&gt;pf[i].dev-&gt;priv.flags &amp;</div><div class='ctx'> 		    MLX5_PRIV_FLAGS_DISABLE_ALL_ADEV)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -811,10 +887,7 @@ void mlx5_lag_remove_devices(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='del'>-		if (!ldev-&gt;pf[i].dev)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		if (ldev-&gt;pf[i].dev-&gt;priv.flags &amp;</div><div class='ctx'> 		    MLX5_PRIV_FLAGS_DISABLE_ALL_ADEV)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -827,11 +900,16 @@ void mlx5_lag_remove_devices(struct mlx5_lag *ldev)</div><div class='ctx'> void mlx5_disable_lag(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='ctx'> 	bool shared_fdb = test_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, &amp;ldev-&gt;mode_flags);</div><div class='del'>-	struct mlx5_core_dev *dev0 = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='add'>+	struct mlx5_core_dev *dev0;</div><div class='ctx'> 	bool roce_lag;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (idx &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev0 = ldev-&gt;pf[idx].dev;</div><div class='ctx'> 	roce_lag = __mlx5_lag_is_roce(ldev);</div><div class='ctx'> </div><div class='ctx'> 	if (shared_fdb) {</div><div class='hunk'>@@ -841,7 +919,7 @@ void mlx5_disable_lag(struct mlx5_lag *ldev)</div><div class='ctx'> 			dev0-&gt;priv.flags |= MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;</div><div class='ctx'> 			mlx5_rescan_drivers_locked(dev0);</div><div class='ctx'> 		}</div><div class='del'>-		for (i = 1; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+		mlx5_ldev_for_each(i, idx + 1, ldev)</div><div class='ctx'> 			mlx5_nic_vport_disable_roce(ldev-&gt;pf[i].dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -853,17 +931,21 @@ void mlx5_disable_lag(struct mlx5_lag *ldev)</div><div class='ctx'> 		mlx5_lag_add_devices(ldev);</div><div class='ctx'> </div><div class='ctx'> 	if (shared_fdb)</div><div class='del'>-		for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+		mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 			if (!(ldev-&gt;pf[i].dev-&gt;priv.flags &amp; MLX5_PRIV_FLAGS_DISABLE_ALL_ADEV))</div><div class='ctx'> 				mlx5_eswitch_reload_ib_reps(ldev-&gt;pf[i].dev-&gt;priv.eswitch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool mlx5_shared_fdb_supported(struct mlx5_lag *ldev)</div><div class='add'>+bool mlx5_lag_shared_fdb_supported(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='add'>+	int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	struct mlx5_core_dev *dev;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = MLX5_LAG_P1 + 1; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	if (idx &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	mlx5_ldev_for_each(i, idx + 1, ldev) {</div><div class='ctx'> 		dev = ldev-&gt;pf[i].dev;</div><div class='ctx'> 		if (is_mdev_switchdev_mode(dev) &amp;&amp;</div><div class='ctx'> 		    mlx5_eswitch_vport_match_metadata_enabled(dev-&gt;priv.eswitch) &amp;&amp;</div><div class='hunk'>@@ -875,7 +957,7 @@ static bool mlx5_shared_fdb_supported(struct mlx5_lag *ldev)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	dev = ldev-&gt;pf[idx].dev;</div><div class='ctx'> 	if (is_mdev_switchdev_mode(dev) &amp;&amp;</div><div class='ctx'> 	    mlx5_eswitch_vport_match_metadata_enabled(dev-&gt;priv.eswitch) &amp;&amp;</div><div class='ctx'> 	    mlx5_esw_offloads_devcom_is_ready(dev-&gt;priv.eswitch) &amp;&amp;</div><div class='hunk'>@@ -891,11 +973,11 @@ static bool mlx5_lag_is_roce_lag(struct mlx5_lag *ldev)</div><div class='ctx'> 	bool roce_lag = true;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		roce_lag = roce_lag &amp;&amp; !mlx5_sriov_is_enabled(ldev-&gt;pf[i].dev);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MLX5_ESWITCH</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		roce_lag = roce_lag &amp;&amp; is_mdev_legacy_mode(ldev-&gt;pf[i].dev);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -916,12 +998,18 @@ static bool mlx5_lag_should_disable_lag(struct mlx5_lag *ldev, bool do_bond)</div><div class='ctx'> </div><div class='ctx'> static void mlx5_do_bond(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev0 = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	struct lag_tracker tracker = { };</div><div class='add'>+	struct mlx5_core_dev *dev0;</div><div class='add'>+	struct net_device *ndev;</div><div class='ctx'> 	bool do_bond, roce_lag;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (idx &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev0 = ldev-&gt;pf[idx].dev;</div><div class='ctx'> 	if (!mlx5_lag_is_ready(ldev)) {</div><div class='ctx'> 		do_bond = false;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -935,7 +1023,7 @@ static void mlx5_do_bond(struct mlx5_lag *ldev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (do_bond &amp;&amp; !__mlx5_lag_is_active(ldev)) {</div><div class='del'>-		bool shared_fdb = mlx5_shared_fdb_supported(ldev);</div><div class='add'>+		bool shared_fdb = mlx5_lag_shared_fdb_supported(ldev);</div><div class='ctx'> </div><div class='ctx'> 		roce_lag = mlx5_lag_is_roce_lag(ldev);</div><div class='ctx'> </div><div class='hunk'>@@ -949,12 +1037,16 @@ static void mlx5_do_bond(struct mlx5_lag *ldev)</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			if (shared_fdb || roce_lag)</div><div class='ctx'> 				mlx5_lag_add_devices(ldev);</div><div class='add'>+			if (shared_fdb) {</div><div class='add'>+				mlx5_ldev_for_each(i, 0, ldev)</div><div class='add'>+					mlx5_eswitch_reload_ib_reps(ldev-&gt;pf[i].dev-&gt;priv.eswitch);</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			return;</div><div class='ctx'> 		} else if (roce_lag) {</div><div class='ctx'> 			dev0-&gt;priv.flags &amp;= ~MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;</div><div class='ctx'> 			mlx5_rescan_drivers_locked(dev0);</div><div class='del'>-			for (i = 1; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+			mlx5_ldev_for_each(i, idx + 1, ldev) {</div><div class='ctx'> 				if (mlx5_get_roce_state(ldev-&gt;pf[i].dev))</div><div class='ctx'> 					mlx5_nic_vport_enable_roce(ldev-&gt;pf[i].dev);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -964,7 +1056,7 @@ static void mlx5_do_bond(struct mlx5_lag *ldev)</div><div class='ctx'> 			dev0-&gt;priv.flags &amp;= ~MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;</div><div class='ctx'> 			mlx5_rescan_drivers_locked(dev0);</div><div class='ctx'> </div><div class='del'>-			for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+			mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 				err = mlx5_eswitch_reload_ib_reps(ldev-&gt;pf[i].dev-&gt;priv.eswitch);</div><div class='ctx'> 				if (err)</div><div class='ctx'> 					break;</div><div class='hunk'>@@ -975,12 +1067,22 @@ static void mlx5_do_bond(struct mlx5_lag *ldev)</div><div class='ctx'> 				mlx5_rescan_drivers_locked(dev0);</div><div class='ctx'> 				mlx5_deactivate_lag(ldev);</div><div class='ctx'> 				mlx5_lag_add_devices(ldev);</div><div class='del'>-				for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+				mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 					mlx5_eswitch_reload_ib_reps(ldev-&gt;pf[i].dev-&gt;priv.eswitch);</div><div class='ctx'> 				mlx5_core_err(dev0, "Failed to enable lag\n");</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+		if (tracker.tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP) {</div><div class='add'>+			ndev = mlx5_lag_active_backup_get_netdev(dev0);</div><div class='add'>+			/** Only sriov and roce lag should have tracker-&gt;TX_type</div><div class='add'>+			 *  set so no need to check the mode</div><div class='add'>+			 */</div><div class='add'>+			blocking_notifier_call_chain(&amp;dev0-&gt;priv.lag_nh,</div><div class='add'>+						     MLX5_DRIVER_EVENT_ACTIVE_BACKUP_LAG_CHANGE_LOWERSTATE,</div><div class='add'>+						     ndev);</div><div class='add'>+			dev_put(ndev);</div><div class='add'>+		}</div><div class='ctx'> 	} else if (mlx5_lag_should_modify_lag(ldev, do_bond)) {</div><div class='ctx'> 		mlx5_modify_lag(ldev, &amp;tracker);</div><div class='ctx'> 	} else if (mlx5_lag_should_disable_lag(ldev, do_bond)) {</div><div class='hunk'>@@ -998,12 +1100,9 @@ struct mlx5_devcom_comp_dev *mlx5_lag_get_devcom_comp(struct mlx5_lag *ldev)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ldev-&gt;lock);</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='del'>-		if (ldev-&gt;pf[i].dev) {</div><div class='del'>-			devcom = ldev-&gt;pf[i].dev-&gt;priv.hca_devcom_comp;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	i = mlx5_get_next_ldev_func(ldev, 0);</div><div class='add'>+	if (i &lt; MLX5_MAX_PORTS)</div><div class='add'>+		devcom = ldev-&gt;pf[i].dev-&gt;priv.hca_devcom_comp;</div><div class='ctx'> 	mutex_unlock(&amp;ldev-&gt;lock);</div><div class='ctx'> 	return devcom;</div><div class='ctx'> }</div><div class='hunk'>@@ -1056,7 +1155,7 @@ static int mlx5_handle_changeupper_event(struct mlx5_lag *ldev,</div><div class='ctx'> 	u8 bond_status = 0;</div><div class='ctx'> 	int num_slaves = 0;</div><div class='ctx'> 	int changed = 0;</div><div class='del'>-	int idx;</div><div class='add'>+	int i, idx = -1;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_is_lag_master(upper))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1071,8 +1170,13 @@ static int mlx5_handle_changeupper_event(struct mlx5_lag *ldev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	for_each_netdev_in_bond_rcu(upper, ndev_tmp) {</div><div class='del'>-		idx = mlx5_lag_dev_get_netdev_idx(ldev, ndev_tmp);</div><div class='del'>-		if (idx &gt;= 0) {</div><div class='add'>+		mlx5_ldev_for_each(i, 0, ldev) {</div><div class='add'>+			if (ldev-&gt;pf[i].netdev == ndev_tmp) {</div><div class='add'>+				idx++;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (i &lt; MLX5_MAX_PORTS) {</div><div class='ctx'> 			slave = bond_slave_get_rcu(ndev_tmp);</div><div class='ctx'> 			if (slave)</div><div class='ctx'> 				has_inactive |= bond_is_slave_inactive(slave);</div><div class='hunk'>@@ -1222,15 +1326,12 @@ static int mlx5_lag_netdev_event(struct notifier_block *this,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5_ldev_add_netdev(struct mlx5_lag *ldev,</div><div class='del'>-				 struct mlx5_core_dev *dev,</div><div class='del'>-				 struct net_device *netdev)</div><div class='add'>+				struct mlx5_core_dev *dev,</div><div class='add'>+				struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int fn = mlx5_get_dev_index(dev);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (fn &gt;= ldev-&gt;ports)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	spin_lock_irqsave(&amp;lag_lock, flags);</div><div class='ctx'> 	ldev-&gt;pf[fn].netdev = netdev;</div><div class='ctx'> 	ldev-&gt;tracker.netdev_state[fn].link_up = 0;</div><div class='hunk'>@@ -1245,7 +1346,7 @@ static void mlx5_ldev_remove_netdev(struct mlx5_lag *ldev,</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;lag_lock, flags);</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		if (ldev-&gt;pf[i].netdev == netdev) {</div><div class='ctx'> 			ldev-&gt;pf[i].netdev = NULL;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1255,13 +1356,10 @@ static void mlx5_ldev_remove_netdev(struct mlx5_lag *ldev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5_ldev_add_mdev(struct mlx5_lag *ldev,</div><div class='del'>-			       struct mlx5_core_dev *dev)</div><div class='add'>+			      struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int fn = mlx5_get_dev_index(dev);</div><div class='ctx'> </div><div class='del'>-	if (fn &gt;= ldev-&gt;ports)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	ldev-&gt;pf[fn].dev = dev;</div><div class='ctx'> 	dev-&gt;priv.lag = ldev;</div><div class='ctx'> }</div><div class='hunk'>@@ -1269,16 +1367,13 @@ static void mlx5_ldev_add_mdev(struct mlx5_lag *ldev,</div><div class='ctx'> static void mlx5_ldev_remove_mdev(struct mlx5_lag *ldev,</div><div class='ctx'> 				  struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='del'>-		if (ldev-&gt;pf[i].dev == dev)</div><div class='del'>-			break;</div><div class='add'>+	int fn;</div><div class='ctx'> </div><div class='del'>-	if (i == ldev-&gt;ports)</div><div class='add'>+	fn = mlx5_get_dev_index(dev);</div><div class='add'>+	if (ldev-&gt;pf[fn].dev != dev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	ldev-&gt;pf[i].dev = NULL;</div><div class='add'>+	ldev-&gt;pf[fn].dev = NULL;</div><div class='ctx'> 	dev-&gt;priv.lag = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1315,6 +1410,37 @@ static int __mlx5_lag_dev_add_mdev(struct mlx5_core_dev *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mlx5_lag_unregister_hca_devcom_comp(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	mlx5_devcom_unregister_component(dev-&gt;priv.hca_devcom_comp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_lag_register_hca_devcom_comp(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_devcom_match_attr attr = {</div><div class='add'>+		.flags = MLX5_DEVCOM_MATCH_FLAGS_NS,</div><div class='add'>+		.net = mlx5_core_net(dev),</div><div class='add'>+	};</div><div class='add'>+	u8 len __always_unused;</div><div class='add'>+</div><div class='add'>+	mlx5_query_nic_sw_system_image_guid(dev, attr.key.buf, &amp;len);</div><div class='add'>+</div><div class='add'>+	/* This component is use to sync adding core_dev to lag_dev and to sync</div><div class='add'>+	 * changes of mlx5_adev_devices between LAG layer and other layers.</div><div class='add'>+	 */</div><div class='add'>+	dev-&gt;priv.hca_devcom_comp =</div><div class='add'>+		mlx5_devcom_register_component(dev-&gt;priv.devc,</div><div class='add'>+					       MLX5_DEVCOM_HCA_PORTS,</div><div class='add'>+					       &amp;attr, NULL, dev);</div><div class='add'>+	if (!dev-&gt;priv.hca_devcom_comp) {</div><div class='add'>+		mlx5_core_err(dev,</div><div class='add'>+			      "Failed to register devcom HCA component.");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5_lag_remove_mdev(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_lag *ldev;</div><div class='hunk'>@@ -1336,6 +1462,7 @@ recheck:</div><div class='ctx'> 	}</div><div class='ctx'> 	mlx5_ldev_remove_mdev(ldev, dev);</div><div class='ctx'> 	mutex_unlock(&amp;ldev-&gt;lock);</div><div class='add'>+	mlx5_lag_unregister_hca_devcom_comp(dev);</div><div class='ctx'> 	mlx5_ldev_put(ldev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1346,7 +1473,7 @@ void mlx5_lag_add_mdev(struct mlx5_core_dev *dev)</div><div class='ctx'> 	if (!mlx5_lag_is_supported(dev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR_OR_NULL(dev-&gt;priv.hca_devcom_comp))</div><div class='add'>+	if (mlx5_lag_register_hca_devcom_comp(dev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> recheck:</div><div class='hunk'>@@ -1386,7 +1513,7 @@ void mlx5_lag_add_netdev(struct mlx5_core_dev *dev,</div><div class='ctx'> 			 struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_lag *ldev;</div><div class='del'>-	int i;</div><div class='add'>+	int num = 0;</div><div class='ctx'> </div><div class='ctx'> 	ldev = mlx5_lag_dev(dev);</div><div class='ctx'> 	if (!ldev)</div><div class='hunk'>@@ -1394,17 +1521,33 @@ void mlx5_lag_add_netdev(struct mlx5_core_dev *dev,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ldev-&gt;lock);</div><div class='ctx'> 	mlx5_ldev_add_netdev(ldev, dev, netdev);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='del'>-		if (!ldev-&gt;pf[i].netdev)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-	if (i &gt;= ldev-&gt;ports)</div><div class='add'>+	num = mlx5_lag_num_netdevs(ldev);</div><div class='add'>+	if (num &gt;= ldev-&gt;ports)</div><div class='ctx'> 		set_bit(MLX5_LAG_FLAG_NDEVS_READY, &amp;ldev-&gt;state_flags);</div><div class='ctx'> 	mutex_unlock(&amp;ldev-&gt;lock);</div><div class='ctx'> 	mlx5_queue_bond_work(ldev, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mlx5_get_pre_ldev_func(struct mlx5_lag *ldev, int start_idx, int end_idx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = start_idx; i &gt;= end_idx; i--)</div><div class='add'>+		if (ldev-&gt;pf[i].dev)</div><div class='add'>+			return i;</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_get_next_ldev_func(struct mlx5_lag *ldev, int start_idx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = start_idx; i &lt; MLX5_MAX_PORTS; i++)</div><div class='add'>+		if (ldev-&gt;pf[i].dev)</div><div class='add'>+			return i;</div><div class='add'>+	return MLX5_MAX_PORTS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool mlx5_lag_is_roce(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_lag *ldev;</div><div class='hunk'>@@ -1455,12 +1598,13 @@ bool mlx5_lag_is_master(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_lag *ldev;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	bool res;</div><div class='add'>+	bool res = false;</div><div class='add'>+	int idx;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;lag_lock, flags);</div><div class='ctx'> 	ldev = mlx5_lag_dev(dev);</div><div class='del'>-	res = ldev &amp;&amp; __mlx5_lag_is_active(ldev) &amp;&amp;</div><div class='del'>-		dev == ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='add'>+	res = ldev &amp;&amp; __mlx5_lag_is_active(ldev) &amp;&amp; idx &gt;= 0 &amp;&amp; dev == ldev-&gt;pf[idx].dev;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lag_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return res;</div><div class='hunk'>@@ -1543,7 +1687,7 @@ u8 mlx5_lag_get_slave_port(struct mlx5_core_dev *dev,</div><div class='ctx'> 	if (!(ldev &amp;&amp; __mlx5_lag_is_roce(ldev)))</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		if (ldev-&gt;pf[i].netdev == slave) {</div><div class='ctx'> 			port = i;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1582,13 +1726,13 @@ struct mlx5_core_dev *mlx5_lag_get_next_peer_mdev(struct mlx5_core_dev *dev, int</div><div class='ctx'> 	if (!ldev)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='del'>-	if (*i == ldev-&gt;ports)</div><div class='add'>+	if (*i == MLX5_MAX_PORTS)</div><div class='ctx'> 		goto unlock;</div><div class='del'>-	for (idx = *i; idx &lt; ldev-&gt;ports; idx++)</div><div class='add'>+	mlx5_ldev_for_each(idx, *i, ldev)</div><div class='ctx'> 		if (ldev-&gt;pf[idx].dev != dev)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-	if (idx == ldev-&gt;ports) {</div><div class='add'>+	if (idx == MLX5_MAX_PORTS) {</div><div class='ctx'> 		*i = idx;</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1609,10 +1753,10 @@ int mlx5_lag_query_cong_counters(struct mlx5_core_dev *dev,</div><div class='ctx'> {</div><div class='ctx'> 	int outlen = MLX5_ST_SZ_BYTES(query_cong_statistics_out);</div><div class='ctx'> 	struct mlx5_core_dev **mdev;</div><div class='add'>+	int ret = 0, i, j, idx = 0;</div><div class='ctx'> 	struct mlx5_lag *ldev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int num_ports;</div><div class='del'>-	int ret, i, j;</div><div class='ctx'> 	void *out;</div><div class='ctx'> </div><div class='ctx'> 	out = kvzalloc(outlen, GFP_KERNEL);</div><div class='hunk'>@@ -1631,8 +1775,8 @@ int mlx5_lag_query_cong_counters(struct mlx5_core_dev *dev,</div><div class='ctx'> 	ldev = mlx5_lag_dev(dev);</div><div class='ctx'> 	if (ldev &amp;&amp; __mlx5_lag_is_active(ldev)) {</div><div class='ctx'> 		num_ports = ldev-&gt;ports;</div><div class='del'>-		for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='del'>-			mdev[i] = ldev-&gt;pf[i].dev;</div><div class='add'>+		mlx5_ldev_for_each(i, 0, ldev)</div><div class='add'>+			mdev[idx++] = ldev-&gt;pf[i].dev;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		num_ports = 1;</div><div class='ctx'> 		mdev[MLX5_LAG_P1] = dev;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h<br/>index 50fcb1eee574..4918eee2b3da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h</a></div><div class='hunk'>@@ -67,6 +67,7 @@ struct mlx5_lag {</div><div class='ctx'> 	struct workqueue_struct   *wq;</div><div class='ctx'> 	struct delayed_work       bond_work;</div><div class='ctx'> 	struct notifier_block     nb;</div><div class='add'>+	possible_net_t net;</div><div class='ctx'> 	struct lag_mp             lag_mp;</div><div class='ctx'> 	struct mlx5_lag_port_sel  port_sel;</div><div class='ctx'> 	/* Protect lag fields/state changes */</div><div class='hunk'>@@ -92,6 +93,7 @@ mlx5_lag_is_ready(struct mlx5_lag *ldev)</div><div class='ctx'> 	return test_bit(MLX5_LAG_FLAG_NDEVS_READY, &amp;ldev-&gt;state_flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool mlx5_lag_shared_fdb_supported(struct mlx5_lag *ldev);</div><div class='ctx'> bool mlx5_lag_check_prereq(struct mlx5_lag *ldev);</div><div class='ctx'> void mlx5_modify_lag(struct mlx5_lag *ldev,</div><div class='ctx'> 		     struct lag_tracker *tracker);</div><div class='hunk'>@@ -103,7 +105,7 @@ int mlx5_lag_dev_get_netdev_idx(struct mlx5_lag *ldev,</div><div class='ctx'> 				struct net_device *ndev);</div><div class='ctx'> </div><div class='ctx'> char *mlx5_get_str_port_sel_mode(enum mlx5_lag_mode mode, unsigned long flags);</div><div class='del'>-void mlx5_infer_tx_enabled(struct lag_tracker *tracker, u8 num_ports,</div><div class='add'>+void mlx5_infer_tx_enabled(struct lag_tracker *tracker, struct mlx5_lag *ldev,</div><div class='ctx'> 			   u8 *ports, int *num_enabled);</div><div class='ctx'> </div><div class='ctx'> void mlx5_ldev_add_debugfs(struct mlx5_core_dev *dev);</div><div class='hunk'>@@ -119,9 +121,24 @@ static inline bool mlx5_lag_is_supported(struct mlx5_core_dev *dev)</div><div class='ctx'> 	if (!MLX5_CAP_GEN(dev, vport_group_manager) ||</div><div class='ctx'> 	    !MLX5_CAP_GEN(dev, lag_master) ||</div><div class='ctx'> 	    MLX5_CAP_GEN(dev, num_lag_ports) &lt; 2 ||</div><div class='add'>+	    mlx5_get_dev_index(dev) &gt;= MLX5_MAX_PORTS ||</div><div class='ctx'> 	    MLX5_CAP_GEN(dev, num_lag_ports) &gt; MLX5_MAX_PORTS)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define mlx5_ldev_for_each(i, start_index, ldev) \</div><div class='add'>+	for (int tmp = start_index; tmp = mlx5_get_next_ldev_func(ldev, tmp), \</div><div class='add'>+	     i = tmp, tmp &lt; MLX5_MAX_PORTS; tmp++)</div><div class='add'>+</div><div class='add'>+#define mlx5_ldev_for_each_reverse(i, start_index, end_index, ldev)      \</div><div class='add'>+	for (int tmp = start_index, tmp1 = end_index; \</div><div class='add'>+	     tmp = mlx5_get_pre_ldev_func(ldev, tmp, tmp1), \</div><div class='add'>+	     i = tmp, tmp &gt;= tmp1; tmp--)</div><div class='add'>+</div><div class='add'>+int mlx5_get_pre_ldev_func(struct mlx5_lag *ldev, int start_idx, int end_idx);</div><div class='add'>+int mlx5_get_next_ldev_func(struct mlx5_lag *ldev, int start_idx);</div><div class='add'>+int mlx5_lag_get_dev_index_by_seq(struct mlx5_lag *ldev, int seq);</div><div class='add'>+int mlx5_lag_num_devs(struct mlx5_lag *ldev);</div><div class='add'>+int mlx5_lag_num_netdevs(struct mlx5_lag *ldev);</div><div class='ctx'> #endif /* __MLX5_LAG_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c<br/>index b1aa494c76ba..aee17fcf3b36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c</a></div><div class='hunk'>@@ -17,7 +17,10 @@ static bool __mlx5_lag_is_multipath(struct mlx5_lag *ldev)</div><div class='ctx'> #define MLX5_LAG_MULTIPATH_OFFLOADS_SUPPORTED_PORTS 2</div><div class='ctx'> static bool mlx5_lag_multipath_check_prereq(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='del'>-	if (!mlx5_lag_is_ready(ldev))</div><div class='add'>+	int idx0 = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='add'>+	int idx1 = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P2);</div><div class='add'>+</div><div class='add'>+	if (idx0 &lt; 0 || idx1 &lt; 0 || !mlx5_lag_is_ready(ldev))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (__mlx5_lag_is_active(ldev) &amp;&amp; !__mlx5_lag_is_multipath(ldev))</div><div class='hunk'>@@ -26,8 +29,8 @@ static bool mlx5_lag_multipath_check_prereq(struct mlx5_lag *ldev)</div><div class='ctx'> 	if (ldev-&gt;ports &gt; MLX5_LAG_MULTIPATH_OFFLOADS_SUPPORTED_PORTS)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	return mlx5_esw_multipath_prereq(ldev-&gt;pf[MLX5_LAG_P1].dev,</div><div class='del'>-					 ldev-&gt;pf[MLX5_LAG_P2].dev);</div><div class='add'>+	return mlx5_esw_multipath_prereq(ldev-&gt;pf[idx0].dev,</div><div class='add'>+					 ldev-&gt;pf[idx1].dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool mlx5_lag_is_multipath(struct mlx5_core_dev *dev)</div><div class='hunk'>@@ -50,43 +53,45 @@ bool mlx5_lag_is_multipath(struct mlx5_core_dev *dev)</div><div class='ctx'> static void mlx5_lag_set_port_affinity(struct mlx5_lag *ldev,</div><div class='ctx'> 				       enum mlx5_lag_port_affinity port)</div><div class='ctx'> {</div><div class='add'>+	int idx0 = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='add'>+	int idx1 = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P2);</div><div class='ctx'> 	struct lag_tracker tracker = {};</div><div class='ctx'> </div><div class='del'>-	if (!__mlx5_lag_is_multipath(ldev))</div><div class='add'>+	if (idx0 &lt; 0 || idx1 &lt; 0 || !__mlx5_lag_is_multipath(ldev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	switch (port) {</div><div class='ctx'> 	case MLX5_LAG_NORMAL_AFFINITY:</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P1].tx_enabled = true;</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P2].tx_enabled = true;</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P1].link_up = true;</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P2].link_up = true;</div><div class='add'>+		tracker.netdev_state[idx0].tx_enabled = true;</div><div class='add'>+		tracker.netdev_state[idx1].tx_enabled = true;</div><div class='add'>+		tracker.netdev_state[idx0].link_up = true;</div><div class='add'>+		tracker.netdev_state[idx1].link_up = true;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5_LAG_P1_AFFINITY:</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P1].tx_enabled = true;</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P1].link_up = true;</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P2].tx_enabled = false;</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P2].link_up = false;</div><div class='add'>+		tracker.netdev_state[idx0].tx_enabled = true;</div><div class='add'>+		tracker.netdev_state[idx0].link_up = true;</div><div class='add'>+		tracker.netdev_state[idx1].tx_enabled = false;</div><div class='add'>+		tracker.netdev_state[idx1].link_up = false;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5_LAG_P2_AFFINITY:</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P1].tx_enabled = false;</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P1].link_up = false;</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P2].tx_enabled = true;</div><div class='del'>-		tracker.netdev_state[MLX5_LAG_P2].link_up = true;</div><div class='add'>+		tracker.netdev_state[idx0].tx_enabled = false;</div><div class='add'>+		tracker.netdev_state[idx0].link_up = false;</div><div class='add'>+		tracker.netdev_state[idx1].tx_enabled = true;</div><div class='add'>+		tracker.netdev_state[idx1].link_up = true;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		mlx5_core_warn(ldev-&gt;pf[MLX5_LAG_P1].dev,</div><div class='add'>+		mlx5_core_warn(ldev-&gt;pf[idx0].dev,</div><div class='ctx'> 			       "Invalid affinity port %d", port);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (tracker.netdev_state[MLX5_LAG_P1].tx_enabled)</div><div class='del'>-		mlx5_notifier_call_chain(ldev-&gt;pf[MLX5_LAG_P1].dev-&gt;priv.events,</div><div class='add'>+	if (tracker.netdev_state[idx0].tx_enabled)</div><div class='add'>+		mlx5_notifier_call_chain(ldev-&gt;pf[idx0].dev-&gt;priv.events,</div><div class='ctx'> 					 MLX5_DEV_EVENT_PORT_AFFINITY,</div><div class='ctx'> 					 (void *)0);</div><div class='ctx'> </div><div class='del'>-	if (tracker.netdev_state[MLX5_LAG_P2].tx_enabled)</div><div class='del'>-		mlx5_notifier_call_chain(ldev-&gt;pf[MLX5_LAG_P2].dev-&gt;priv.events,</div><div class='add'>+	if (tracker.netdev_state[idx1].tx_enabled)</div><div class='add'>+		mlx5_notifier_call_chain(ldev-&gt;pf[idx1].dev-&gt;priv.events,</div><div class='ctx'> 					 MLX5_DEV_EVENT_PORT_AFFINITY,</div><div class='ctx'> 					 (void *)0);</div><div class='ctx'> </div><div class='hunk'>@@ -150,9 +155,14 @@ mlx5_lag_get_next_fib_dev(struct mlx5_lag *ldev,</div><div class='ctx'> static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev, unsigned long event,</div><div class='ctx'> 				     struct fib_entry_notifier_info *fen_info)</div><div class='ctx'> {</div><div class='add'>+	int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	struct net_device *nh_dev0, *nh_dev1;</div><div class='ctx'> 	struct fib_info *fi = fen_info-&gt;fi;</div><div class='ctx'> 	struct lag_mp *mp = &amp;ldev-&gt;lag_mp;</div><div class='add'>+	int i, dev_idx = 0;</div><div class='add'>+</div><div class='add'>+	if (idx &lt; 0)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Handle delete event */</div><div class='ctx'> 	if (event == FIB_EVENT_ENTRY_DEL) {</div><div class='hunk'>@@ -179,17 +189,19 @@ static void mlx5_lag_fib_route_event(struct mlx5_lag *ldev, unsigned long event,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (nh_dev0 == nh_dev1) {</div><div class='del'>-		mlx5_core_warn(ldev-&gt;pf[MLX5_LAG_P1].dev,</div><div class='add'>+		mlx5_core_warn(ldev-&gt;pf[idx].dev,</div><div class='ctx'> 			       "Multipath offload doesn't support routes with multiple nexthops of the same device");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!nh_dev1) {</div><div class='ctx'> 		if (__mlx5_lag_is_active(ldev)) {</div><div class='del'>-			int i = mlx5_lag_dev_get_netdev_idx(ldev, nh_dev0);</div><div class='del'>-</div><div class='del'>-			i++;</div><div class='del'>-			mlx5_lag_set_port_affinity(ldev, i);</div><div class='add'>+			mlx5_ldev_for_each(i, 0, ldev) {</div><div class='add'>+				dev_idx++;</div><div class='add'>+				if (ldev-&gt;pf[i].netdev == nh_dev0)</div><div class='add'>+					break;</div><div class='add'>+			}</div><div class='add'>+			mlx5_lag_set_port_affinity(ldev, dev_idx);</div><div class='ctx'> 			mlx5_lag_fib_set(mp, fi, fen_info-&gt;dst, fen_info-&gt;dst_len);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -214,6 +226,7 @@ static void mlx5_lag_fib_nexthop_event(struct mlx5_lag *ldev,</div><div class='ctx'> 				       struct fib_info *fi)</div><div class='ctx'> {</div><div class='ctx'> 	struct lag_mp *mp = &amp;ldev-&gt;lag_mp;</div><div class='add'>+	int i, dev_idx = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Check the nh event is related to the route */</div><div class='ctx'> 	if (!mp-&gt;fib.mfi || mp-&gt;fib.mfi != fi)</div><div class='hunk'>@@ -221,11 +234,15 @@ static void mlx5_lag_fib_nexthop_event(struct mlx5_lag *ldev,</div><div class='ctx'> </div><div class='ctx'> 	/* nh added/removed */</div><div class='ctx'> 	if (event == FIB_EVENT_NH_DEL) {</div><div class='del'>-		int i = mlx5_lag_dev_get_netdev_idx(ldev, fib_nh-&gt;fib_nh_dev);</div><div class='add'>+		mlx5_ldev_for_each(i, 0, ldev) {</div><div class='add'>+			if (ldev-&gt;pf[i].netdev == fib_nh-&gt;fib_nh_dev)</div><div class='add'>+				break;</div><div class='add'>+			dev_idx++;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if (i &gt;= 0) {</div><div class='del'>-			i = (i + 1) % 2 + 1; /* peer port */</div><div class='del'>-			mlx5_lag_set_port_affinity(ldev, i);</div><div class='add'>+		if (dev_idx &gt;= 0) {</div><div class='add'>+			dev_idx = (dev_idx + 1) % 2 + 1; /* peer port */</div><div class='add'>+			mlx5_lag_set_port_affinity(ldev, dev_idx);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (event == FIB_EVENT_NH_ADD &amp;&amp;</div><div class='ctx'> 		   fib_info_num_path(fi) == 2) {</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c<br/>index 571ea26edd0c..aad52d3a90e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c</a></div><div class='hunk'>@@ -15,7 +15,7 @@ static void mlx5_mpesw_metadata_cleanup(struct mlx5_lag *ldev)</div><div class='ctx'> 	u32 pf_metadata;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		dev = ldev-&gt;pf[i].dev;</div><div class='ctx'> 		esw = dev-&gt;priv.eswitch;</div><div class='ctx'> 		pf_metadata = ldev-&gt;lag_mpesw.pf_metadata[i];</div><div class='hunk'>@@ -36,7 +36,7 @@ static int mlx5_mpesw_metadata_set(struct mlx5_lag *ldev)</div><div class='ctx'> 	u32 pf_metadata;</div><div class='ctx'> 	int i, err;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		dev = ldev-&gt;pf[i].dev;</div><div class='ctx'> 		esw = dev-&gt;priv.eswitch;</div><div class='ctx'> 		pf_metadata = mlx5_esw_match_metadata_alloc(esw);</div><div class='hunk'>@@ -52,7 +52,7 @@ static int mlx5_mpesw_metadata_set(struct mlx5_lag *ldev)</div><div class='ctx'> 			goto err_metadata;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		dev = ldev-&gt;pf[i].dev;</div><div class='ctx'> 		mlx5_notifier_call_chain(dev-&gt;priv.events, MLX5_DEV_EVENT_MULTIPORT_ESW,</div><div class='ctx'> 					 (void *)0);</div><div class='hunk'>@@ -65,23 +65,22 @@ err_metadata:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define MLX5_LAG_MPESW_OFFLOADS_SUPPORTED_PORTS 4</div><div class='ctx'> static int enable_mpesw(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev0 = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='add'>+	struct mlx5_core_dev *dev0;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (ldev-&gt;mode != MLX5_LAG_MODE_NONE)</div><div class='add'>+	if (idx &lt; 0 || ldev-&gt;mode != MLX5_LAG_MODE_NONE)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (ldev-&gt;ports &gt; MLX5_LAG_MPESW_OFFLOADS_SUPPORTED_PORTS)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='add'>+	dev0 = ldev-&gt;pf[idx].dev;</div><div class='ctx'> 	if (mlx5_eswitch_mode(dev0) != MLX5_ESWITCH_OFFLOADS ||</div><div class='ctx'> 	    !MLX5_CAP_PORT_SELECTION(dev0, port_select_flow_table) ||</div><div class='ctx'> 	    !MLX5_CAP_GEN(dev0, create_lag_when_not_master_up) ||</div><div class='del'>-	    !mlx5_lag_check_prereq(ldev))</div><div class='add'>+	    !mlx5_lag_check_prereq(ldev) ||</div><div class='add'>+	    !mlx5_lag_shared_fdb_supported(ldev))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_mpesw_metadata_set(ldev);</div><div class='hunk'>@@ -98,7 +97,7 @@ static int enable_mpesw(struct mlx5_lag *ldev)</div><div class='ctx'> </div><div class='ctx'> 	dev0-&gt;priv.flags &amp;= ~MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;</div><div class='ctx'> 	mlx5_rescan_drivers_locked(dev0);</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		err = mlx5_eswitch_reload_ib_reps(ldev-&gt;pf[i].dev-&gt;priv.eswitch);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_rescan_drivers;</div><div class='hunk'>@@ -112,7 +111,7 @@ err_rescan_drivers:</div><div class='ctx'> 	mlx5_deactivate_lag(ldev);</div><div class='ctx'> err_add_devices:</div><div class='ctx'> 	mlx5_lag_add_devices(ldev);</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++)</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev)</div><div class='ctx'> 		mlx5_eswitch_reload_ib_reps(ldev-&gt;pf[i].dev-&gt;priv.eswitch);</div><div class='ctx'> 	mlx5_mpesw_metadata_cleanup(ldev);</div><div class='ctx'> 	return err;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c<br/>index ab2717012b79..d832a12ffec0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c</a></div><div class='hunk'>@@ -39,15 +39,18 @@ static int mlx5_lag_create_port_sel_table(struct mlx5_lag *ldev,</div><div class='ctx'> 					  struct mlx5_lag_definer *lag_definer,</div><div class='ctx'> 					  u8 *ports)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	struct mlx5_flow_table_attr ft_attr = {};</div><div class='ctx'> 	struct mlx5_flow_destination dest = {};</div><div class='ctx'> 	MLX5_DECLARE_FLOW_ACT(flow_act);</div><div class='ctx'> 	struct mlx5_flow_namespace *ns;</div><div class='del'>-	int err, i;</div><div class='del'>-	int idx;</div><div class='del'>-	int j;</div><div class='add'>+	struct mlx5_core_dev *dev;</div><div class='add'>+	int err, i, j, k, idx;</div><div class='ctx'> </div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev = ldev-&gt;pf[first_idx].dev;</div><div class='ctx'> 	ft_attr.max_fte = ldev-&gt;ports * ldev-&gt;buckets;</div><div class='ctx'> 	ft_attr.level = MLX5_LAG_FT_LEVEL_DEFINER;</div><div class='ctx'> </div><div class='hunk'>@@ -74,7 +77,7 @@ static int mlx5_lag_create_port_sel_table(struct mlx5_lag *ldev,</div><div class='ctx'> 	dest.type = MLX5_FLOW_DESTINATION_TYPE_UPLINK;</div><div class='ctx'> 	dest.vport.flags |= MLX5_FLOW_DEST_VPORT_VHCA_ID;</div><div class='ctx'> 	flow_act.flags |= FLOW_ACT_NO_APPEND;</div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		for (j = 0; j &lt; ldev-&gt;buckets; j++) {</div><div class='ctx'> 			u8 affinity;</div><div class='ctx'> </div><div class='hunk'>@@ -88,13 +91,13 @@ static int mlx5_lag_create_port_sel_table(struct mlx5_lag *ldev,</div><div class='ctx'> 								      &amp;dest, 1);</div><div class='ctx'> 			if (IS_ERR(lag_definer-&gt;rules[idx])) {</div><div class='ctx'> 				err = PTR_ERR(lag_definer-&gt;rules[idx]);</div><div class='del'>-				do {</div><div class='add'>+				mlx5_ldev_for_each_reverse(k, i, 0, ldev) {</div><div class='ctx'> 					while (j--) {</div><div class='del'>-						idx = i * ldev-&gt;buckets + j;</div><div class='add'>+						idx = k * ldev-&gt;buckets + j;</div><div class='ctx'> 						mlx5_del_flow_rules(lag_definer-&gt;rules[idx]);</div><div class='ctx'> 					}</div><div class='ctx'> 					j = ldev-&gt;buckets;</div><div class='del'>-				} while (i--);</div><div class='add'>+				}</div><div class='ctx'> 				goto destroy_fg;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -295,11 +298,16 @@ static struct mlx5_lag_definer *</div><div class='ctx'> mlx5_lag_create_definer(struct mlx5_lag *ldev, enum netdev_lag_hash hash,</div><div class='ctx'> 			enum mlx5_traffic_types tt, bool tunnel, u8 *ports)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	struct mlx5_lag_definer *lag_definer;</div><div class='add'>+	struct mlx5_core_dev *dev;</div><div class='ctx'> 	u32 *match_definer_mask;</div><div class='ctx'> 	int format_id, err;</div><div class='ctx'> </div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	dev = ldev-&gt;pf[first_idx].dev;</div><div class='ctx'> 	lag_definer = kzalloc(sizeof(*lag_definer), GFP_KERNEL);</div><div class='ctx'> 	if (!lag_definer)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='hunk'>@@ -341,12 +349,15 @@ free_lag_definer:</div><div class='ctx'> static void mlx5_lag_destroy_definer(struct mlx5_lag *ldev,</div><div class='ctx'> 				     struct mlx5_lag_definer *lag_definer)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='del'>-	int idx;</div><div class='del'>-	int i;</div><div class='del'>-	int j;</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='add'>+	struct mlx5_core_dev *dev;</div><div class='add'>+	int idx, i, j;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev = ldev-&gt;pf[first_idx].dev;</div><div class='add'>+	mlx5_ldev_for_each(i, first_idx, ldev) {</div><div class='ctx'> 		for (j = 0; j &lt; ldev-&gt;buckets; j++) {</div><div class='ctx'> 			idx = i * ldev-&gt;buckets + j;</div><div class='ctx'> 			mlx5_del_flow_rules(lag_definer-&gt;rules[idx]);</div><div class='hunk'>@@ -501,10 +512,15 @@ static void mlx5_lag_set_outer_ttc_params(struct mlx5_lag *ldev,</div><div class='ctx'> </div><div class='ctx'> static int mlx5_lag_create_ttc_table(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	struct mlx5_lag_port_sel *port_sel = &amp;ldev-&gt;port_sel;</div><div class='ctx'> 	struct ttc_params ttc_params = {};</div><div class='add'>+	struct mlx5_core_dev *dev;</div><div class='add'>+</div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	dev = ldev-&gt;pf[first_idx].dev;</div><div class='ctx'> 	mlx5_lag_set_outer_ttc_params(ldev, &amp;ttc_params);</div><div class='ctx'> 	port_sel-&gt;outer.ttc = mlx5_create_ttc_table(dev, &amp;ttc_params);</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(port_sel-&gt;outer.ttc);</div><div class='hunk'>@@ -512,10 +528,15 @@ static int mlx5_lag_create_ttc_table(struct mlx5_lag *ldev)</div><div class='ctx'> </div><div class='ctx'> static int mlx5_lag_create_inner_ttc_table(struct mlx5_lag *ldev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *dev = ldev-&gt;pf[MLX5_LAG_P1].dev;</div><div class='add'>+	int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);</div><div class='ctx'> 	struct mlx5_lag_port_sel *port_sel = &amp;ldev-&gt;port_sel;</div><div class='ctx'> 	struct ttc_params ttc_params = {};</div><div class='add'>+	struct mlx5_core_dev *dev;</div><div class='ctx'> </div><div class='add'>+	if (first_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev = ldev-&gt;pf[first_idx].dev;</div><div class='ctx'> 	mlx5_lag_set_inner_ttc_params(ldev, &amp;ttc_params);</div><div class='ctx'> 	port_sel-&gt;inner.ttc = mlx5_create_inner_ttc_table(dev, &amp;ttc_params);</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(port_sel-&gt;inner.ttc);</div><div class='hunk'>@@ -530,7 +551,7 @@ int mlx5_lag_port_sel_create(struct mlx5_lag *ldev,</div><div class='ctx'> 	set_tt_map(port_sel, hash_type);</div><div class='ctx'> 	err = mlx5_lag_create_definers(ldev, hash_type, ports);</div><div class='ctx'> 	if (err)</div><div class='del'>-		return err;</div><div class='add'>+		goto clear_port_sel;</div><div class='ctx'> </div><div class='ctx'> 	if (port_sel-&gt;tunnel) {</div><div class='ctx'> 		err = mlx5_lag_create_inner_ttc_table(ldev);</div><div class='hunk'>@@ -549,6 +570,8 @@ destroy_inner:</div><div class='ctx'> 		mlx5_destroy_ttc_table(port_sel-&gt;inner.ttc);</div><div class='ctx'> destroy_definers:</div><div class='ctx'> 	mlx5_lag_destroy_definers(ldev);</div><div class='add'>+clear_port_sel:</div><div class='add'>+	memset(port_sel, 0, sizeof(*port_sel));</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -565,7 +588,7 @@ static int __mlx5_lag_modify_definers_destinations(struct mlx5_lag *ldev,</div><div class='ctx'> 	dest.type = MLX5_FLOW_DESTINATION_TYPE_UPLINK;</div><div class='ctx'> 	dest.vport.flags |= MLX5_FLOW_DEST_VPORT_VHCA_ID;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ldev-&gt;ports; i++) {</div><div class='add'>+	mlx5_ldev_for_each(i, 0, ldev) {</div><div class='ctx'> 		for (j = 0; j &lt; ldev-&gt;buckets; j++) {</div><div class='ctx'> 			idx = i * ldev-&gt;buckets + j;</div><div class='ctx'> 			if (ldev-&gt;v2p_map[idx] == ports[idx])</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c<br/>index 58bd749b5e4d..129725159a93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c</a></div><div class='hunk'>@@ -100,7 +100,7 @@ static int create_aso_cq(struct mlx5_aso_cq *cq, void *cqc_data)</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(cqc,   cqc, cq_period_mode, MLX5_CQ_PERIOD_MODE_START_FROM_EQE);</div><div class='ctx'> 	MLX5_SET(cqc,   cqc, c_eqn_or_apu_element, eqn);</div><div class='del'>-	MLX5_SET(cqc,   cqc, uar_page,      mdev-&gt;priv.uar-&gt;index);</div><div class='add'>+	MLX5_SET(cqc,   cqc, uar_page,      mdev-&gt;priv.bfreg.up-&gt;index);</div><div class='ctx'> 	MLX5_SET(cqc,   cqc, log_page_size, cq-&gt;wq_ctrl.buf.page_shift -</div><div class='ctx'> 					    MLX5_ADAPTER_PAGE_SHIFT);</div><div class='ctx'> 	MLX5_SET64(cqc, cqc, dbr_addr,      cq-&gt;wq_ctrl.db.dma);</div><div class='hunk'>@@ -129,7 +129,7 @@ static int mlx5_aso_create_cq(struct mlx5_core_dev *mdev, int numa_node,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(cqc, cqc_data, log_cq_size, 1);</div><div class='del'>-	MLX5_SET(cqc, cqc_data, uar_page, mdev-&gt;priv.uar-&gt;index);</div><div class='add'>+	MLX5_SET(cqc, cqc_data, uar_page, mdev-&gt;priv.bfreg.up-&gt;index);</div><div class='ctx'> 	if (MLX5_CAP_GEN(mdev, cqe_128_always) &amp;&amp; cache_line_size() &gt;= 128)</div><div class='ctx'> 		MLX5_SET(cqc, cqc_data, cqe_sz, CQE_STRIDE_128_PAD);</div><div class='ctx'> </div><div class='hunk'>@@ -163,7 +163,7 @@ static int mlx5_aso_alloc_sq(struct mlx5_core_dev *mdev, int numa_node,</div><div class='ctx'> 	struct mlx5_wq_param param;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	sq-&gt;uar_map = mdev-&gt;mlx5e_res.hw_objs.bfreg.map;</div><div class='add'>+	sq-&gt;uar_map = mdev-&gt;priv.bfreg.map;</div><div class='ctx'> </div><div class='ctx'> 	param.db_numa_node = numa_node;</div><div class='ctx'> 	param.buf_numa_node = numa_node;</div><div class='hunk'>@@ -203,7 +203,7 @@ static int create_aso_sq(struct mlx5_core_dev *mdev, int pdn,</div><div class='ctx'> 	MLX5_SET(sqc, sqc, ts_format, ts_format);</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(wq,   wq, wq_type,       MLX5_WQ_TYPE_CYCLIC);</div><div class='del'>-	MLX5_SET(wq,   wq, uar_page,      mdev-&gt;mlx5e_res.hw_objs.bfreg.index);</div><div class='add'>+	MLX5_SET(wq,   wq, uar_page,      mdev-&gt;priv.bfreg.index);</div><div class='ctx'> 	MLX5_SET(wq,   wq, log_wq_pg_sz,  sq-&gt;wq_ctrl.buf.page_shift -</div><div class='ctx'> 					  MLX5_ADAPTER_PAGE_SHIFT);</div><div class='ctx'> 	MLX5_SET64(wq, wq, dbr_addr,      sq-&gt;wq_ctrl.db.dma);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c<br/>index b306ae79bf97..0ba0ef8bae42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c</a></div><div class='hunk'>@@ -43,6 +43,8 @@</div><div class='ctx'> #include &lt;linux/cpufeature.h&gt;</div><div class='ctx'> #endif /* CONFIG_X86 */</div><div class='ctx'> </div><div class='add'>+#define MLX5_RT_CLOCK_IDENTITY_SIZE MLX5_FLD_SZ_BYTES(mrtcq_reg, rt_clock_identity)</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	MLX5_PIN_MODE_IN		= 0x0,</div><div class='ctx'> 	MLX5_PIN_MODE_OUT		= 0x1,</div><div class='hunk'>@@ -77,6 +79,56 @@ enum {</div><div class='ctx'> 	MLX5_MTUTC_OPERATION_ADJUST_TIME_EXTENDED_MAX = 200000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mlx5_clock_dev_state {</div><div class='add'>+	struct mlx5_core_dev *mdev;</div><div class='add'>+	struct mlx5_devcom_comp_dev *compdev;</div><div class='add'>+	struct mlx5_nb pps_nb;</div><div class='add'>+	struct work_struct out_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_clock_priv {</div><div class='add'>+	struct mlx5_clock clock;</div><div class='add'>+	struct mlx5_core_dev *mdev;</div><div class='add'>+	struct mutex lock; /* protect mdev and used in PTP callbacks */</div><div class='add'>+	struct mlx5_core_dev *event_mdev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mlx5_clock_priv *clock_priv(struct mlx5_clock *clock)</div><div class='add'>+{</div><div class='add'>+	return container_of(clock, struct mlx5_clock_priv, clock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_clock_lockdep_assert(struct mlx5_clock *clock)</div><div class='add'>+{</div><div class='add'>+	if (!clock-&gt;shared)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	lockdep_assert(lockdep_is_held(&amp;clock_priv(clock)-&gt;lock));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_core_dev *mlx5_clock_mdev_get(struct mlx5_clock *clock)</div><div class='add'>+{</div><div class='add'>+	mlx5_clock_lockdep_assert(clock);</div><div class='add'>+</div><div class='add'>+	return clock_priv(clock)-&gt;mdev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_clock_lock(struct mlx5_clock *clock)</div><div class='add'>+{</div><div class='add'>+	if (!clock-&gt;shared)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;clock_priv(clock)-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_clock_unlock(struct mlx5_clock *clock)</div><div class='add'>+{</div><div class='add'>+	if (!clock-&gt;shared)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;clock_priv(clock)-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool mlx5_real_time_mode(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	return (mlx5_is_real_time_rq(mdev) || mlx5_is_real_time_sq(mdev));</div><div class='hunk'>@@ -94,6 +146,22 @@ static bool mlx5_modify_mtutc_allowed(struct mlx5_core_dev *mdev)</div><div class='ctx'> 	return MLX5_CAP_MCAM_FEATURE(mdev, ptpcyc2realtime_modify);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5_clock_identity_get(struct mlx5_core_dev *mdev,</div><div class='add'>+				   u8 identify[MLX5_RT_CLOCK_IDENTITY_SIZE])</div><div class='add'>+{</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(mrtcq_reg)] = {};</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(mrtcq_reg)] = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_core_access_reg(mdev, in, sizeof(in),</div><div class='add'>+				   out, sizeof(out), MLX5_REG_MRTCQ, 0, 0);</div><div class='add'>+	if (!err)</div><div class='add'>+		memcpy(identify, MLX5_ADDR_OF(mrtcq_reg, out, rt_clock_identity),</div><div class='add'>+		       MLX5_RT_CLOCK_IDENTITY_SIZE);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u32 mlx5_ptp_shift_constant(u32 dev_freq_khz)</div><div class='ctx'> {</div><div class='ctx'> 	/* Optimal shift constant leads to corrections above just 1 scaled ppm.</div><div class='hunk'>@@ -119,21 +187,30 @@ static u32 mlx5_ptp_shift_constant(u32 dev_freq_khz)</div><div class='ctx'> 		   ilog2((U32_MAX / NSEC_PER_MSEC) * dev_freq_khz));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static s32 mlx5_clock_getmaxphase(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	return MLX5_CAP_MCAM_FEATURE(mdev, mtutc_time_adjustment_extended_range) ?</div><div class='add'>+		       MLX5_MTUTC_OPERATION_ADJUST_TIME_EXTENDED_MAX :</div><div class='add'>+			     MLX5_MTUTC_OPERATION_ADJUST_TIME_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static s32 mlx5_ptp_getmaxphase(struct ptp_clock_info *ptp)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);</div><div class='ctx'> 	struct mlx5_core_dev *mdev;</div><div class='add'>+	s32 ret;</div><div class='ctx'> </div><div class='del'>-	mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='add'>+	ret = mlx5_clock_getmaxphase(mdev);</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='ctx'> </div><div class='del'>-	return MLX5_CAP_MCAM_FEATURE(mdev, mtutc_time_adjustment_extended_range) ?</div><div class='del'>-		       MLX5_MTUTC_OPERATION_ADJUST_TIME_EXTENDED_MAX :</div><div class='del'>-			     MLX5_MTUTC_OPERATION_ADJUST_TIME_MAX;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool mlx5_is_mtutc_time_adj_cap(struct mlx5_core_dev *mdev, s64 delta)</div><div class='ctx'> {</div><div class='del'>-	s64 max = mlx5_ptp_getmaxphase(&amp;mdev-&gt;clock.ptp_info);</div><div class='add'>+	s64 max = mlx5_clock_getmaxphase(mdev);</div><div class='ctx'> </div><div class='ctx'> 	if (delta &lt; -max || delta &gt; max)</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -170,27 +247,24 @@ static bool mlx5_is_ptm_source_time_available(struct mlx5_core_dev *dev)</div><div class='ctx'> 	return !!MLX5_GET(mtptm_reg, out, psta);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5_mtctr_syncdevicetime(ktime_t *device_time,</div><div class='del'>-				     struct system_counterval_t *sys_counterval,</div><div class='del'>-				     void *ctx)</div><div class='add'>+static int mlx5_mtctr_read(struct mlx5_core_dev *mdev,</div><div class='add'>+			   bool real_time_mode,</div><div class='add'>+			   struct system_counterval_t *sys_counterval,</div><div class='add'>+			   u64 *device)</div><div class='ctx'> {</div><div class='ctx'> 	u32 out[MLX5_ST_SZ_DW(mtctr_reg)] = {0};</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(mtctr_reg)] = {0};</div><div class='del'>-	struct mlx5_core_dev *mdev = ctx;</div><div class='del'>-	bool real_time_mode;</div><div class='del'>-	u64 host, device;</div><div class='add'>+	u64 host;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	real_time_mode = mlx5_real_time_mode(mdev);</div><div class='del'>-</div><div class='ctx'> 	MLX5_SET(mtctr_reg, in, first_clock_timestamp_request,</div><div class='ctx'> 		 MLX5_MTCTR_REQUEST_PTM_ROOT_CLOCK);</div><div class='ctx'> 	MLX5_SET(mtctr_reg, in, second_clock_timestamp_request,</div><div class='ctx'> 		 real_time_mode ? MLX5_MTCTR_REQUEST_REAL_TIME_CLOCK :</div><div class='del'>-		 MLX5_MTCTR_REQUEST_FREE_RUNNING_COUNTER);</div><div class='add'>+				  MLX5_MTCTR_REQUEST_FREE_RUNNING_COUNTER);</div><div class='ctx'> </div><div class='del'>-	err = mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out), MLX5_REG_MTCTR,</div><div class='del'>-				   0, 0);</div><div class='add'>+	err = mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out),</div><div class='add'>+				   MLX5_REG_MTCTR, 0, 0);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -204,12 +278,47 @@ static int mlx5_mtctr_syncdevicetime(ktime_t *device_time,</div><div class='ctx'> 			.cs_id = CSID_X86_ART,</div><div class='ctx'> 			.use_nsecs = true,</div><div class='ctx'> 	};</div><div class='add'>+	*device = MLX5_GET64(mtctr_reg, out, second_clock_timestamp);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_mtctr_syncdevicetime(ktime_t *device_time,</div><div class='add'>+				     struct system_counterval_t *sys_counterval,</div><div class='add'>+				     void *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *mdev = ctx;</div><div class='add'>+	bool real_time_mode;</div><div class='add'>+	u64 device;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	real_time_mode = mlx5_real_time_mode(mdev);</div><div class='add'>+</div><div class='add'>+	err = mlx5_mtctr_read(mdev, real_time_mode, sys_counterval, &amp;device);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	device = MLX5_GET64(mtctr_reg, out, second_clock_timestamp);</div><div class='ctx'> 	if (real_time_mode)</div><div class='ctx'> 		*device_time = ns_to_ktime(REAL_TIME_TO_NS(device &gt;&gt; 32, device &amp; U32_MAX));</div><div class='ctx'> 	else</div><div class='del'>-		*device_time = mlx5_timecounter_cyc2time(&amp;mdev-&gt;clock, device);</div><div class='add'>+		*device_time = mlx5_timecounter_cyc2time(mdev-&gt;clock, device);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_mtctr_syncdevicecyclestime(ktime_t *device_time,</div><div class='add'>+				struct system_counterval_t *sys_counterval,</div><div class='add'>+				void *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *mdev = ctx;</div><div class='add'>+	u64 device;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_mtctr_read(mdev, false, sys_counterval, &amp;device);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	*device_time = ns_to_ktime(device);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -220,16 +329,49 @@ static int mlx5_ptp_getcrosststamp(struct ptp_clock_info *ptp,</div><div class='ctx'> 	struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);</div><div class='ctx'> 	struct system_time_snapshot history_begin = {0};</div><div class='ctx'> 	struct mlx5_core_dev *mdev;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='ctx'> </div><div class='del'>-	if (!mlx5_is_ptm_source_time_available(mdev))</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	if (!mlx5_is_ptm_source_time_available(mdev)) {</div><div class='add'>+		err = -EBUSY;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ktime_get_snapshot(&amp;history_begin);</div><div class='ctx'> </div><div class='del'>-	return get_device_system_crosststamp(mlx5_mtctr_syncdevicetime, mdev,</div><div class='del'>-					     &amp;history_begin, cts);</div><div class='add'>+	err = get_device_system_crosststamp(mlx5_mtctr_syncdevicetime, mdev,</div><div class='add'>+					    &amp;history_begin, cts);</div><div class='add'>+unlock:</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_ptp_getcrosscycles(struct ptp_clock_info *ptp,</div><div class='add'>+				   struct system_device_crosststamp *cts)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_clock *clock =</div><div class='add'>+		container_of(ptp, struct mlx5_clock, ptp_info);</div><div class='add'>+	struct system_time_snapshot history_begin = {0};</div><div class='add'>+	struct mlx5_core_dev *mdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='add'>+</div><div class='add'>+	if (!mlx5_is_ptm_source_time_available(mdev)) {</div><div class='add'>+		err = -EBUSY;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ktime_get_snapshot(&amp;history_begin);</div><div class='add'>+</div><div class='add'>+	err = get_device_system_crosststamp(mlx5_mtctr_syncdevicecyclestime,</div><div class='add'>+					    mdev, &amp;history_begin, cts);</div><div class='add'>+unlock:</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_X86 */</div><div class='ctx'> </div><div class='hunk'>@@ -259,12 +401,11 @@ static u64 mlx5_read_time(struct mlx5_core_dev *dev,</div><div class='ctx'> 			   (u64)timer_l | (u64)timer_h1 &lt;&lt; 32;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 read_internal_timer(const struct cyclecounter *cc)</div><div class='add'>+static u64 read_internal_timer(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_timer *timer = container_of(cc, struct mlx5_timer, cycles);</div><div class='ctx'> 	struct mlx5_clock *clock = container_of(timer, struct mlx5_clock, timer);</div><div class='del'>-	struct mlx5_core_dev *mdev = container_of(clock, struct mlx5_core_dev,</div><div class='del'>-						  clock);</div><div class='add'>+	struct mlx5_core_dev *mdev = mlx5_clock_mdev_get(clock);</div><div class='ctx'> </div><div class='ctx'> 	return mlx5_read_time(mdev, NULL, false) &amp; cc-&gt;mask;</div><div class='ctx'> }</div><div class='hunk'>@@ -272,7 +413,7 @@ static u64 read_internal_timer(const struct cyclecounter *cc)</div><div class='ctx'> static void mlx5_update_clock_info_page(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_ib_clock_info *clock_info = mdev-&gt;clock_info;</div><div class='del'>-	struct mlx5_clock *clock = &amp;mdev-&gt;clock;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> 	struct mlx5_timer *timer;</div><div class='ctx'> 	u32 sign;</div><div class='ctx'> </div><div class='hunk'>@@ -295,12 +436,10 @@ static void mlx5_update_clock_info_page(struct mlx5_core_dev *mdev)</div><div class='ctx'> </div><div class='ctx'> static void mlx5_pps_out(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_pps *pps_info = container_of(work, struct mlx5_pps,</div><div class='del'>-						 out_work);</div><div class='del'>-	struct mlx5_clock *clock = container_of(pps_info, struct mlx5_clock,</div><div class='del'>-						pps_info);</div><div class='del'>-	struct mlx5_core_dev *mdev = container_of(clock, struct mlx5_core_dev,</div><div class='del'>-						  clock);</div><div class='add'>+	struct mlx5_clock_dev_state *clock_state = container_of(work, struct mlx5_clock_dev_state,</div><div class='add'>+								out_work);</div><div class='add'>+	struct mlx5_core_dev *mdev = clock_state-&gt;mdev;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(mtpps_reg)] = {0};</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -322,17 +461,17 @@ static void mlx5_pps_out(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_timestamp_overflow(struct work_struct *work)</div><div class='add'>+static long mlx5_timestamp_overflow(struct ptp_clock_info *ptp_info)</div><div class='ctx'> {</div><div class='del'>-	struct delayed_work *dwork = to_delayed_work(work);</div><div class='ctx'> 	struct mlx5_core_dev *mdev;</div><div class='ctx'> 	struct mlx5_timer *timer;</div><div class='ctx'> 	struct mlx5_clock *clock;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	timer = container_of(dwork, struct mlx5_timer, overflow_work);</div><div class='del'>-	clock = container_of(timer, struct mlx5_clock, timer);</div><div class='del'>-	mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='add'>+	clock = container_of(ptp_info, struct mlx5_clock, ptp_info);</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='add'>+	timer = &amp;clock-&gt;timer;</div><div class='ctx'> </div><div class='ctx'> 	if (mdev-&gt;state == MLX5_DEVICE_STATE_INTERNAL_ERROR)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -343,7 +482,8 @@ static void mlx5_timestamp_overflow(struct work_struct *work)</div><div class='ctx'> 	write_sequnlock_irqrestore(&amp;clock-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	schedule_delayed_work(&amp;timer-&gt;overflow_work, timer-&gt;overflow_period);</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+	return timer-&gt;overflow_period;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_ptp_settime_real_time(struct mlx5_core_dev *mdev,</div><div class='hunk'>@@ -362,15 +502,12 @@ static int mlx5_ptp_settime_real_time(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	return mlx5_set_mtutc(mdev, in, sizeof(in));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts)</div><div class='add'>+static int mlx5_clock_settime(struct mlx5_core_dev *mdev, struct mlx5_clock *clock,</div><div class='add'>+			      const struct timespec64 *ts)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);</div><div class='ctx'> 	struct mlx5_timer *timer = &amp;clock-&gt;timer;</div><div class='del'>-	struct mlx5_core_dev *mdev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='del'>-</div><div class='ctx'> 	if (mlx5_modify_mtutc_allowed(mdev)) {</div><div class='ctx'> 		int err = mlx5_ptp_settime_real_time(mdev, ts);</div><div class='ctx'> </div><div class='hunk'>@@ -386,6 +523,20 @@ static int mlx5_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);</div><div class='add'>+	struct mlx5_core_dev *mdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='add'>+	err = mlx5_clock_settime(mdev, clock, ts);</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static</div><div class='ctx'> struct timespec64 mlx5_ptp_gettimex_real_time(struct mlx5_core_dev *mdev,</div><div class='ctx'> 					      struct ptp_system_timestamp *sts)</div><div class='hunk'>@@ -402,23 +553,39 @@ static int mlx5_ptp_gettimex(struct ptp_clock_info *ptp, struct timespec64 *ts,</div><div class='ctx'> 			     struct ptp_system_timestamp *sts)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);</div><div class='del'>-	struct mlx5_timer *timer = &amp;clock-&gt;timer;</div><div class='ctx'> 	struct mlx5_core_dev *mdev;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	u64 cycles, ns;</div><div class='ctx'> </div><div class='del'>-	mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='ctx'> 	if (mlx5_real_time_mode(mdev)) {</div><div class='ctx'> 		*ts = mlx5_ptp_gettimex_real_time(mdev, sts);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	write_seqlock_irqsave(&amp;clock-&gt;lock, flags);</div><div class='ctx'> 	cycles = mlx5_read_time(mdev, sts, false);</div><div class='del'>-	ns = timecounter_cyc2time(&amp;timer-&gt;tc, cycles);</div><div class='del'>-	write_sequnlock_irqrestore(&amp;clock-&gt;lock, flags);</div><div class='add'>+	ns = mlx5_timecounter_cyc2time(clock, cycles);</div><div class='ctx'> 	*ts = ns_to_timespec64(ns);</div><div class='ctx'> out:</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_ptp_getcyclesx(struct ptp_clock_info *ptp,</div><div class='add'>+			       struct timespec64 *ts,</div><div class='add'>+			       struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock,</div><div class='add'>+						ptp_info);</div><div class='add'>+	struct mlx5_core_dev *mdev;</div><div class='add'>+	u64 cycles;</div><div class='add'>+</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='add'>+</div><div class='add'>+	cycles = mlx5_read_time(mdev, sts, false);</div><div class='add'>+	*ts = ns_to_timespec64(cycles);</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -449,14 +616,16 @@ static int mlx5_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='ctx'> 	struct mlx5_timer *timer = &amp;clock-&gt;timer;</div><div class='ctx'> 	struct mlx5_core_dev *mdev;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	int err = 0;</div><div class='ctx'> </div><div class='del'>-	mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5_modify_mtutc_allowed(mdev)) {</div><div class='del'>-		int err = mlx5_ptp_adjtime_real_time(mdev, delta);</div><div class='add'>+		err = mlx5_ptp_adjtime_real_time(mdev, delta);</div><div class='ctx'> </div><div class='ctx'> 		if (err)</div><div class='del'>-			return err;</div><div class='add'>+			goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	write_seqlock_irqsave(&amp;clock-&gt;lock, flags);</div><div class='hunk'>@@ -464,17 +633,23 @@ static int mlx5_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='ctx'> 	mlx5_update_clock_info_page(mdev);</div><div class='ctx'> 	write_sequnlock_irqrestore(&amp;clock-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+unlock:</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_ptp_adjphase(struct ptp_clock_info *ptp, s32 delta)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);</div><div class='ctx'> 	struct mlx5_core_dev *mdev;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='add'>+	err = mlx5_ptp_adjtime_real_time(mdev, delta);</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='ctx'> </div><div class='del'>-	return mlx5_ptp_adjtime_real_time(mdev, delta);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_ptp_freq_adj_real_time(struct mlx5_core_dev *mdev, long scaled_ppm)</div><div class='hunk'>@@ -503,15 +678,17 @@ static int mlx5_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)</div><div class='ctx'> 	struct mlx5_timer *timer = &amp;clock-&gt;timer;</div><div class='ctx'> 	struct mlx5_core_dev *mdev;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	int err = 0;</div><div class='ctx'> 	u32 mult;</div><div class='ctx'> </div><div class='del'>-	mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5_modify_mtutc_allowed(mdev)) {</div><div class='del'>-		int err = mlx5_ptp_freq_adj_real_time(mdev, scaled_ppm);</div><div class='add'>+		err = mlx5_ptp_freq_adj_real_time(mdev, scaled_ppm);</div><div class='ctx'> </div><div class='ctx'> 		if (err)</div><div class='del'>-			return err;</div><div class='add'>+			goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mult = (u32)adjust_by_scaled_ppm(timer-&gt;nominal_c_mult, scaled_ppm);</div><div class='hunk'>@@ -521,8 +698,11 @@ static int mlx5_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)</div><div class='ctx'> 	timer-&gt;cycles.mult = mult;</div><div class='ctx'> 	mlx5_update_clock_info_page(mdev);</div><div class='ctx'> 	write_sequnlock_irqrestore(&amp;clock-&gt;lock, flags);</div><div class='add'>+	ptp_schedule_worker(clock-&gt;ptp, timer-&gt;overflow_period);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+unlock:</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_extts_configure(struct ptp_clock_info *ptp,</div><div class='hunk'>@@ -531,25 +711,14 @@ static int mlx5_extts_configure(struct ptp_clock_info *ptp,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_clock *clock =</div><div class='ctx'> 			container_of(ptp, struct mlx5_clock, ptp_info);</div><div class='del'>-	struct mlx5_core_dev *mdev =</div><div class='del'>-			container_of(clock, struct mlx5_core_dev, clock);</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(mtpps_reg)] = {0};</div><div class='add'>+	struct mlx5_core_dev *mdev;</div><div class='ctx'> 	u32 field_select = 0;</div><div class='ctx'> 	u8 pin_mode = 0;</div><div class='ctx'> 	u8 pattern = 0;</div><div class='ctx'> 	int pin = -1;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	if (!MLX5_PPS_CAP(mdev))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-	if (rq-&gt;extts.flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-				PTP_RISING_EDGE |</div><div class='del'>-				PTP_FALLING_EDGE |</div><div class='del'>-				PTP_STRICT_FLAGS))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	/* Reject requests to enable time stamping on both edges. */</div><div class='ctx'> 	if ((rq-&gt;extts.flags &amp; PTP_STRICT_FLAGS) &amp;&amp;</div><div class='ctx'> 	    (rq-&gt;extts.flags &amp; PTP_ENABLE_FEATURE) &amp;&amp;</div><div class='hunk'>@@ -573,6 +742,14 @@ static int mlx5_extts_configure(struct ptp_clock_info *ptp,</div><div class='ctx'> 		field_select = MLX5_MTPPS_FS_ENABLE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='add'>+</div><div class='add'>+	if (!MLX5_PPS_CAP(mdev)) {</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	MLX5_SET(mtpps_reg, in, pin, pin);</div><div class='ctx'> 	MLX5_SET(mtpps_reg, in, pin_mode, pin_mode);</div><div class='ctx'> 	MLX5_SET(mtpps_reg, in, pattern, pattern);</div><div class='hunk'>@@ -581,15 +758,23 @@ static int mlx5_extts_configure(struct ptp_clock_info *ptp,</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_set_mtpps(mdev, in, sizeof(in));</div><div class='ctx'> 	if (err)</div><div class='del'>-		return err;</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='del'>-	return mlx5_set_mtppse(mdev, pin, 0,</div><div class='del'>-			       MLX5_EVENT_MODE_REPETETIVE &amp; on);</div><div class='add'>+	err = mlx5_set_mtppse(mdev, pin, 0, MLX5_EVENT_MODE_REPETETIVE &amp; on);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	clock-&gt;pps_info.pin_armed[pin] = on;</div><div class='add'>+	clock_priv(clock)-&gt;event_mdev = mdev;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u64 find_target_cycles(struct mlx5_core_dev *mdev, s64 target_ns)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = &amp;mdev-&gt;clock;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> 	u64 cycles_now, cycles_delta;</div><div class='ctx'> 	u64 nsec_now, nsec_delta;</div><div class='ctx'> 	struct mlx5_timer *timer;</div><div class='hunk'>@@ -648,7 +833,7 @@ static int mlx5_perout_conf_out_pulse_duration(struct mlx5_core_dev *mdev,</div><div class='ctx'> 					       struct ptp_clock_request *rq,</div><div class='ctx'> 					       u32 *out_pulse_duration_ns)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_pps *pps_info = &amp;mdev-&gt;clock.pps_info;</div><div class='add'>+	struct mlx5_pps *pps_info = &amp;mdev-&gt;clock-&gt;pps_info;</div><div class='ctx'> 	u32 out_pulse_duration;</div><div class='ctx'> 	struct timespec64 ts;</div><div class='ctx'> </div><div class='hunk'>@@ -681,7 +866,7 @@ static int perout_conf_npps_real_time(struct mlx5_core_dev *mdev, struct ptp_clo</div><div class='ctx'> 				      u32 *field_select, u32 *out_pulse_duration_ns,</div><div class='ctx'> 				      u64 *period, u64 *time_stamp)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_pps *pps_info = &amp;mdev-&gt;clock.pps_info;</div><div class='add'>+	struct mlx5_pps *pps_info = &amp;mdev-&gt;clock-&gt;pps_info;</div><div class='ctx'> 	struct ptp_clock_time *time = &amp;rq-&gt;perout.start;</div><div class='ctx'> 	struct timespec64 ts;</div><div class='ctx'> </div><div class='hunk'>@@ -704,38 +889,24 @@ static int perout_conf_npps_real_time(struct mlx5_core_dev *mdev, struct ptp_clo</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool mlx5_perout_verify_flags(struct mlx5_core_dev *mdev, unsigned int flags)</div><div class='del'>-{</div><div class='del'>-	return ((!mlx5_npps_real_time_supported(mdev) &amp;&amp; flags) ||</div><div class='del'>-		(mlx5_npps_real_time_supported(mdev) &amp;&amp; flags &amp; ~PTP_PEROUT_DUTY_CYCLE));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mlx5_perout_configure(struct ptp_clock_info *ptp,</div><div class='ctx'> 				 struct ptp_clock_request *rq,</div><div class='ctx'> 				 int on)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_clock *clock =</div><div class='ctx'> 			container_of(ptp, struct mlx5_clock, ptp_info);</div><div class='del'>-	struct mlx5_core_dev *mdev =</div><div class='del'>-			container_of(clock, struct mlx5_core_dev, clock);</div><div class='del'>-	bool rt_mode = mlx5_real_time_mode(mdev);</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(mtpps_reg)] = {0};</div><div class='ctx'> 	u32 out_pulse_duration_ns = 0;</div><div class='add'>+	struct mlx5_core_dev *mdev;</div><div class='ctx'> 	u32 field_select = 0;</div><div class='ctx'> 	u64 npps_period = 0;</div><div class='ctx'> 	u64 time_stamp = 0;</div><div class='ctx'> 	u8 pin_mode = 0;</div><div class='ctx'> 	u8 pattern = 0;</div><div class='add'>+	bool rt_mode;</div><div class='ctx'> 	int pin = -1;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	if (!MLX5_PPS_CAP(mdev))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-	if (mlx5_perout_verify_flags(mdev, rq-&gt;perout.flags))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	if (rq-&gt;perout.index &gt;= clock-&gt;ptp_info.n_pins)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -744,14 +915,23 @@ static int mlx5_perout_configure(struct ptp_clock_info *ptp,</div><div class='ctx'> 	if (pin &lt; 0)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	if (on) {</div><div class='del'>-		bool rt_mode = mlx5_real_time_mode(mdev);</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mdev = mlx5_clock_mdev_get(clock);</div><div class='add'>+	rt_mode = mlx5_real_time_mode(mdev);</div><div class='ctx'> </div><div class='add'>+	if (!MLX5_PPS_CAP(mdev)) {</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (on) {</div><div class='ctx'> 		pin_mode = MLX5_PIN_MODE_OUT;</div><div class='ctx'> 		pattern = MLX5_OUT_PATTERN_PERIODIC;</div><div class='ctx'> </div><div class='del'>-		if (rt_mode &amp;&amp;  rq-&gt;perout.start.sec &gt; U32_MAX)</div><div class='del'>-			return -EINVAL;</div><div class='add'>+		if (rt_mode &amp;&amp;  rq-&gt;perout.start.sec &gt; U32_MAX) {</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		field_select |= MLX5_MTPPS_FS_PIN_MODE |</div><div class='ctx'> 				MLX5_MTPPS_FS_PATTERN |</div><div class='hunk'>@@ -764,7 +944,7 @@ static int mlx5_perout_configure(struct ptp_clock_info *ptp,</div><div class='ctx'> 		else</div><div class='ctx'> 			err = perout_conf_1pps(mdev, rq, &amp;time_stamp, rt_mode);</div><div class='ctx'> 		if (err)</div><div class='del'>-			return err;</div><div class='add'>+			goto unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(mtpps_reg, in, pin, pin);</div><div class='hunk'>@@ -777,13 +957,16 @@ static int mlx5_perout_configure(struct ptp_clock_info *ptp,</div><div class='ctx'> 	MLX5_SET(mtpps_reg, in, out_pulse_duration_ns, out_pulse_duration_ns);</div><div class='ctx'> 	err = mlx5_set_mtpps(mdev, in, sizeof(in));</div><div class='ctx'> 	if (err)</div><div class='del'>-		return err;</div><div class='add'>+		goto unlock;</div><div class='ctx'> </div><div class='ctx'> 	if (rt_mode)</div><div class='del'>-		return 0;</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mlx5_set_mtppse(mdev, pin, 0, MLX5_EVENT_MODE_REPETETIVE &amp; on);</div><div class='ctx'> </div><div class='del'>-	return mlx5_set_mtppse(mdev, pin, 0,</div><div class='del'>-			       MLX5_EVENT_MODE_REPETETIVE &amp; on);</div><div class='add'>+unlock:</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_pps_configure(struct ptp_clock_info *ptp,</div><div class='hunk'>@@ -856,6 +1039,7 @@ static const struct ptp_clock_info mlx5_ptp_clock_info = {</div><div class='ctx'> 	.settime64	= mlx5_ptp_settime,</div><div class='ctx'> 	.enable		= NULL,</div><div class='ctx'> 	.verify		= NULL,</div><div class='add'>+	.do_aux_work	= mlx5_timestamp_overflow,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int mlx5_query_mtpps_pin_mode(struct mlx5_core_dev *mdev, u8 pin,</div><div class='hunk'>@@ -869,10 +1053,8 @@ static int mlx5_query_mtpps_pin_mode(struct mlx5_core_dev *mdev, u8 pin,</div><div class='ctx'> 				    mtpps_size, MLX5_REG_MTPPS, 0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5_get_pps_pin_mode(struct mlx5_clock *clock, u8 pin)</div><div class='add'>+static int mlx5_get_pps_pin_mode(struct mlx5_core_dev *mdev, u8 pin)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='del'>-</div><div class='ctx'> 	u32 out[MLX5_ST_SZ_DW(mtpps_reg)] = {};</div><div class='ctx'> 	u8 mode;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -891,8 +1073,9 @@ static int mlx5_get_pps_pin_mode(struct mlx5_clock *clock, u8 pin)</div><div class='ctx'> 	return PTP_PF_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_init_pin_config(struct mlx5_clock *clock)</div><div class='add'>+static void mlx5_init_pin_config(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!clock-&gt;ptp_info.n_pins)</div><div class='hunk'>@@ -908,20 +1091,27 @@ static void mlx5_init_pin_config(struct mlx5_clock *clock)</div><div class='ctx'> 	clock-&gt;ptp_info.verify = mlx5_ptp_verify;</div><div class='ctx'> 	clock-&gt;ptp_info.pps = 1;</div><div class='ctx'> </div><div class='add'>+	clock-&gt;ptp_info.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+						PTP_FALLING_EDGE |</div><div class='add'>+						PTP_STRICT_FLAGS;</div><div class='add'>+</div><div class='add'>+	if (mlx5_npps_real_time_supported(mdev))</div><div class='add'>+		clock-&gt;ptp_info.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; clock-&gt;ptp_info.n_pins; i++) {</div><div class='ctx'> 		snprintf(clock-&gt;ptp_info.pin_config[i].name,</div><div class='ctx'> 			 sizeof(clock-&gt;ptp_info.pin_config[i].name),</div><div class='ctx'> 			 "mlx5_pps%d", i);</div><div class='ctx'> 		clock-&gt;ptp_info.pin_config[i].index = i;</div><div class='del'>-		clock-&gt;ptp_info.pin_config[i].func = mlx5_get_pps_pin_mode(clock, i);</div><div class='add'>+		clock-&gt;ptp_info.pin_config[i].func = mlx5_get_pps_pin_mode(mdev, i);</div><div class='ctx'> 		clock-&gt;ptp_info.pin_config[i].chan = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5_get_pps_caps(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = &amp;mdev-&gt;clock;</div><div class='ctx'> 	u32 out[MLX5_ST_SZ_DW(mtpps_reg)] = {0};</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> </div><div class='ctx'> 	mlx5_query_mtpps(mdev, out, sizeof(out));</div><div class='ctx'> </div><div class='hunk'>@@ -971,16 +1161,16 @@ static u64 perout_conf_next_event_timer(struct mlx5_core_dev *mdev,</div><div class='ctx'> static int mlx5_pps_event(struct notifier_block *nb,</div><div class='ctx'> 			  unsigned long type, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = mlx5_nb_cof(nb, struct mlx5_clock, pps_nb);</div><div class='add'>+	struct mlx5_clock_dev_state *clock_state = mlx5_nb_cof(nb, struct mlx5_clock_dev_state,</div><div class='add'>+							       pps_nb);</div><div class='add'>+	struct mlx5_core_dev *mdev = clock_state-&gt;mdev;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> 	struct ptp_clock_event ptp_event;</div><div class='ctx'> 	struct mlx5_eqe *eqe = data;</div><div class='ctx'> 	int pin = eqe-&gt;data.pps.pin;</div><div class='del'>-	struct mlx5_core_dev *mdev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u64 ns;</div><div class='ctx'> </div><div class='del'>-	mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='del'>-</div><div class='ctx'> 	switch (clock-&gt;ptp_info.pin_config[pin].func) {</div><div class='ctx'> 	case PTP_PF_EXTTS:</div><div class='ctx'> 		ptp_event.index = pin;</div><div class='hunk'>@@ -1000,11 +1190,15 @@ static int mlx5_pps_event(struct notifier_block *nb,</div><div class='ctx'> 		ptp_clock_event(clock-&gt;ptp, &amp;ptp_event);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PTP_PF_PEROUT:</div><div class='add'>+		if (clock-&gt;shared) {</div><div class='add'>+			mlx5_core_warn(mdev, " Received unexpected PPS out event\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 		ns = perout_conf_next_event_timer(mdev, clock);</div><div class='ctx'> 		write_seqlock_irqsave(&amp;clock-&gt;lock, flags);</div><div class='ctx'> 		clock-&gt;pps_info.start[pin] = ns;</div><div class='ctx'> 		write_sequnlock_irqrestore(&amp;clock-&gt;lock, flags);</div><div class='del'>-		schedule_work(&amp;clock-&gt;pps_info.out_work);</div><div class='add'>+		schedule_work(&amp;clock_state-&gt;out_work);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		mlx5_core_err(mdev, " Unhandled clock PPS event, func %d\n",</div><div class='hunk'>@@ -1016,7 +1210,7 @@ static int mlx5_pps_event(struct notifier_block *nb,</div><div class='ctx'> </div><div class='ctx'> static void mlx5_timecounter_init(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = &amp;mdev-&gt;clock;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> 	struct mlx5_timer *timer = &amp;clock-&gt;timer;</div><div class='ctx'> 	u32 dev_freq;</div><div class='ctx'> </div><div class='hunk'>@@ -1032,10 +1226,10 @@ static void mlx5_timecounter_init(struct mlx5_core_dev *mdev)</div><div class='ctx'> 			 ktime_to_ns(ktime_get_real()));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_init_overflow_period(struct mlx5_clock *clock)</div><div class='add'>+static void mlx5_init_overflow_period(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_core_dev *mdev = container_of(clock, struct mlx5_core_dev, clock);</div><div class='ctx'> 	struct mlx5_ib_clock_info *clock_info = mdev-&gt;clock_info;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> 	struct mlx5_timer *timer = &amp;clock-&gt;timer;</div><div class='ctx'> 	u64 overflow_cycles;</div><div class='ctx'> 	u64 frac = 0;</div><div class='hunk'>@@ -1056,12 +1250,11 @@ static void mlx5_init_overflow_period(struct mlx5_clock *clock)</div><div class='ctx'> 	do_div(ns, NSEC_PER_SEC / HZ);</div><div class='ctx'> 	timer-&gt;overflow_period = ns;</div><div class='ctx'> </div><div class='del'>-	INIT_DELAYED_WORK(&amp;timer-&gt;overflow_work, mlx5_timestamp_overflow);</div><div class='del'>-	if (timer-&gt;overflow_period)</div><div class='del'>-		schedule_delayed_work(&amp;timer-&gt;overflow_work, 0);</div><div class='del'>-	else</div><div class='add'>+	if (!timer-&gt;overflow_period) {</div><div class='add'>+		timer-&gt;overflow_period = HZ;</div><div class='ctx'> 		mlx5_core_warn(mdev,</div><div class='del'>-			       "invalid overflow period, overflow_work is not scheduled\n");</div><div class='add'>+			       "invalid overflow period, overflow_work is scheduled once per second\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (clock_info)</div><div class='ctx'> 		clock_info-&gt;overflow_period = timer-&gt;overflow_period;</div><div class='hunk'>@@ -1069,7 +1262,7 @@ static void mlx5_init_overflow_period(struct mlx5_clock *clock)</div><div class='ctx'> </div><div class='ctx'> static void mlx5_init_clock_info(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = &amp;mdev-&gt;clock;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> 	struct mlx5_ib_clock_info *info;</div><div class='ctx'> 	struct mlx5_timer *timer;</div><div class='ctx'> </div><div class='hunk'>@@ -1092,7 +1285,7 @@ static void mlx5_init_clock_info(struct mlx5_core_dev *mdev)</div><div class='ctx'> </div><div class='ctx'> static void mlx5_init_timer_max_freq_adjustment(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = &amp;mdev-&gt;clock;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> 	u32 out[MLX5_ST_SZ_DW(mtutc_reg)] = {};</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(mtutc_reg)] = {};</div><div class='ctx'> 	u8 log_max_freq_adjustment = 0;</div><div class='hunk'>@@ -1111,7 +1304,8 @@ static void mlx5_init_timer_max_freq_adjustment(struct mlx5_core_dev *mdev)</div><div class='ctx'> </div><div class='ctx'> static void mlx5_init_timer_clock(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = &amp;mdev-&gt;clock;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='add'>+	bool expose_cycles;</div><div class='ctx'> </div><div class='ctx'> 	/* Configure the PHC */</div><div class='ctx'> 	clock-&gt;ptp_info = mlx5_ptp_clock_info;</div><div class='hunk'>@@ -1119,46 +1313,48 @@ static void mlx5_init_timer_clock(struct mlx5_core_dev *mdev)</div><div class='ctx'> 	if (MLX5_CAP_MCAM_REG(mdev, mtutc))</div><div class='ctx'> 		mlx5_init_timer_max_freq_adjustment(mdev);</div><div class='ctx'> </div><div class='add'>+	expose_cycles = !MLX5_CAP_GEN(mdev, disciplined_fr_counter) ||</div><div class='add'>+			!mlx5_real_time_mode(mdev);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_X86</div><div class='ctx'> 	if (MLX5_CAP_MCAM_REG3(mdev, mtptm) &amp;&amp;</div><div class='del'>-	    MLX5_CAP_MCAM_REG3(mdev, mtctr) &amp;&amp; boot_cpu_has(X86_FEATURE_ART))</div><div class='add'>+	    MLX5_CAP_MCAM_REG3(mdev, mtctr) &amp;&amp; boot_cpu_has(X86_FEATURE_ART)) {</div><div class='ctx'> 		clock-&gt;ptp_info.getcrosststamp = mlx5_ptp_getcrosststamp;</div><div class='add'>+		if (expose_cycles)</div><div class='add'>+			clock-&gt;ptp_info.getcrosscycles =</div><div class='add'>+				mlx5_ptp_getcrosscycles;</div><div class='add'>+	}</div><div class='ctx'> #endif /* CONFIG_X86 */</div><div class='ctx'> </div><div class='add'>+	if (expose_cycles)</div><div class='add'>+		clock-&gt;ptp_info.getcyclesx64 = mlx5_ptp_getcyclesx;</div><div class='add'>+</div><div class='ctx'> 	mlx5_timecounter_init(mdev);</div><div class='ctx'> 	mlx5_init_clock_info(mdev);</div><div class='del'>-	mlx5_init_overflow_period(clock);</div><div class='add'>+	mlx5_init_overflow_period(mdev);</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5_real_time_mode(mdev)) {</div><div class='ctx'> 		struct timespec64 ts;</div><div class='ctx'> </div><div class='ctx'> 		ktime_get_real_ts64(&amp;ts);</div><div class='del'>-		mlx5_ptp_settime(&amp;clock-&gt;ptp_info, &amp;ts);</div><div class='add'>+		mlx5_clock_settime(mdev, clock, &amp;ts);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5_init_pps(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = &amp;mdev-&gt;clock;</div><div class='del'>-</div><div class='ctx'> 	if (!MLX5_PPS_CAP(mdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mlx5_get_pps_caps(mdev);</div><div class='del'>-	mlx5_init_pin_config(clock);</div><div class='add'>+	mlx5_init_pin_config(mdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5_init_clock(struct mlx5_core_dev *mdev)</div><div class='add'>+static void mlx5_init_clock_dev(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = &amp;mdev-&gt;clock;</div><div class='del'>-</div><div class='del'>-	if (!MLX5_CAP_GEN(mdev, device_frequency_khz)) {</div><div class='del'>-		mlx5_core_warn(mdev, "invalid device_frequency_khz, aborting HW clock init\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> </div><div class='ctx'> 	seqlock_init(&amp;clock-&gt;lock);</div><div class='del'>-	INIT_WORK(&amp;clock-&gt;pps_info.out_work, mlx5_pps_out);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the device clock */</div><div class='ctx'> 	mlx5_init_timer_clock(mdev);</div><div class='hunk'>@@ -1167,33 +1363,27 @@ void mlx5_init_clock(struct mlx5_core_dev *mdev)</div><div class='ctx'> 	mlx5_init_pps(mdev);</div><div class='ctx'> </div><div class='ctx'> 	clock-&gt;ptp = ptp_clock_register(&amp;clock-&gt;ptp_info,</div><div class='del'>-					&amp;mdev-&gt;pdev-&gt;dev);</div><div class='add'>+					clock-&gt;shared ? NULL : &amp;mdev-&gt;pdev-&gt;dev);</div><div class='ctx'> 	if (IS_ERR(clock-&gt;ptp)) {</div><div class='del'>-		mlx5_core_warn(mdev, "ptp_clock_register failed %ld\n",</div><div class='del'>-			       PTR_ERR(clock-&gt;ptp));</div><div class='add'>+		mlx5_core_warn(mdev, "%sptp_clock_register failed %pe\n",</div><div class='add'>+			       clock-&gt;shared ? "shared clock " : "",</div><div class='add'>+			       clock-&gt;ptp);</div><div class='ctx'> 		clock-&gt;ptp = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	MLX5_NB_INIT(&amp;clock-&gt;pps_nb, mlx5_pps_event, PPS_EVENT);</div><div class='del'>-	mlx5_eq_notifier_register(mdev, &amp;clock-&gt;pps_nb);</div><div class='add'>+	if (clock-&gt;ptp)</div><div class='add'>+		ptp_schedule_worker(clock-&gt;ptp, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5_cleanup_clock(struct mlx5_core_dev *mdev)</div><div class='add'>+static void mlx5_destroy_clock_dev(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_clock *clock = &amp;mdev-&gt;clock;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='ctx'> </div><div class='del'>-	if (!MLX5_CAP_GEN(mdev, device_frequency_khz))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mlx5_eq_notifier_unregister(mdev, &amp;clock-&gt;pps_nb);</div><div class='ctx'> 	if (clock-&gt;ptp) {</div><div class='ctx'> 		ptp_clock_unregister(clock-&gt;ptp);</div><div class='ctx'> 		clock-&gt;ptp = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cancel_work_sync(&amp;clock-&gt;pps_info.out_work);</div><div class='del'>-	cancel_delayed_work_sync(&amp;clock-&gt;timer.overflow_work);</div><div class='del'>-</div><div class='ctx'> 	if (mdev-&gt;clock_info) {</div><div class='ctx'> 		free_page((unsigned long)mdev-&gt;clock_info);</div><div class='ctx'> 		mdev-&gt;clock_info = NULL;</div><div class='hunk'>@@ -1201,3 +1391,253 @@ void mlx5_cleanup_clock(struct mlx5_core_dev *mdev)</div><div class='ctx'> </div><div class='ctx'> 	kfree(clock-&gt;ptp_info.pin_config);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void mlx5_clock_free(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_clock_priv *cpriv = clock_priv(mdev-&gt;clock);</div><div class='add'>+</div><div class='add'>+	mlx5_destroy_clock_dev(mdev);</div><div class='add'>+	mutex_destroy(&amp;cpriv-&gt;lock);</div><div class='add'>+	kfree(cpriv);</div><div class='add'>+	mdev-&gt;clock = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_clock_alloc(struct mlx5_core_dev *mdev, bool shared)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_clock_priv *cpriv;</div><div class='add'>+	struct mlx5_clock *clock;</div><div class='add'>+</div><div class='add'>+	cpriv = kzalloc(sizeof(*cpriv), GFP_KERNEL);</div><div class='add'>+	if (!cpriv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;cpriv-&gt;lock);</div><div class='add'>+	cpriv-&gt;mdev = mdev;</div><div class='add'>+	clock = &amp;cpriv-&gt;clock;</div><div class='add'>+	clock-&gt;shared = shared;</div><div class='add'>+	mdev-&gt;clock = clock;</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	mlx5_init_clock_dev(mdev);</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+</div><div class='add'>+	if (!clock-&gt;shared)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!clock-&gt;ptp) {</div><div class='add'>+		mlx5_core_warn(mdev, "failed to create ptp dev shared by multiple functions");</div><div class='add'>+		mlx5_clock_free(mdev);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_shared_clock_register(struct mlx5_core_dev *mdev,</div><div class='add'>+				       u8 identity[MLX5_RT_CLOCK_IDENTITY_SIZE])</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *peer_dev, *next = NULL;</div><div class='add'>+	struct mlx5_devcom_match_attr attr = {};</div><div class='add'>+	struct mlx5_devcom_comp_dev *compd;</div><div class='add'>+	struct mlx5_devcom_comp_dev *pos;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(MLX5_RT_CLOCK_IDENTITY_SIZE &gt; MLX5_DEVCOM_MATCH_KEY_MAX);</div><div class='add'>+	memcpy(attr.key.buf, identity, MLX5_RT_CLOCK_IDENTITY_SIZE);</div><div class='add'>+</div><div class='add'>+	compd = mlx5_devcom_register_component(mdev-&gt;priv.devc,</div><div class='add'>+					       MLX5_DEVCOM_SHARED_CLOCK,</div><div class='add'>+					       &amp;attr, NULL, mdev);</div><div class='add'>+	if (!compd)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mdev-&gt;clock_state-&gt;compdev = compd;</div><div class='add'>+</div><div class='add'>+	mlx5_devcom_comp_lock(mdev-&gt;clock_state-&gt;compdev);</div><div class='add'>+	mlx5_devcom_for_each_peer_entry(mdev-&gt;clock_state-&gt;compdev, peer_dev, pos) {</div><div class='add'>+		if (peer_dev-&gt;clock) {</div><div class='add'>+			next = peer_dev;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (next) {</div><div class='add'>+		mdev-&gt;clock = next-&gt;clock;</div><div class='add'>+		/* clock info is shared among all the functions using the same clock */</div><div class='add'>+		mdev-&gt;clock_info = next-&gt;clock_info;</div><div class='add'>+	} else {</div><div class='add'>+		mlx5_clock_alloc(mdev, true);</div><div class='add'>+	}</div><div class='add'>+	mlx5_devcom_comp_unlock(mdev-&gt;clock_state-&gt;compdev);</div><div class='add'>+</div><div class='add'>+	if (!mdev-&gt;clock) {</div><div class='add'>+		mlx5_devcom_unregister_component(mdev-&gt;clock_state-&gt;compdev);</div><div class='add'>+		mdev-&gt;clock_state-&gt;compdev = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_shared_clock_unregister(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *peer_dev, *next = NULL;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='add'>+	struct mlx5_devcom_comp_dev *pos;</div><div class='add'>+</div><div class='add'>+	mlx5_devcom_comp_lock(mdev-&gt;clock_state-&gt;compdev);</div><div class='add'>+	mlx5_devcom_for_each_peer_entry(mdev-&gt;clock_state-&gt;compdev, peer_dev, pos) {</div><div class='add'>+		if (peer_dev-&gt;clock &amp;&amp; peer_dev != mdev) {</div><div class='add'>+			next = peer_dev;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (next) {</div><div class='add'>+		struct mlx5_clock_priv *cpriv = clock_priv(clock);</div><div class='add'>+</div><div class='add'>+		mlx5_clock_lock(clock);</div><div class='add'>+		if (mdev == cpriv-&gt;mdev)</div><div class='add'>+			cpriv-&gt;mdev = next;</div><div class='add'>+		mlx5_clock_unlock(clock);</div><div class='add'>+	} else {</div><div class='add'>+		mlx5_clock_free(mdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mdev-&gt;clock = NULL;</div><div class='add'>+	mdev-&gt;clock_info = NULL;</div><div class='add'>+	mlx5_devcom_comp_unlock(mdev-&gt;clock_state-&gt;compdev);</div><div class='add'>+</div><div class='add'>+	mlx5_devcom_unregister_component(mdev-&gt;clock_state-&gt;compdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_clock_arm_pps_in_event(struct mlx5_clock *clock,</div><div class='add'>+					struct mlx5_core_dev *new_mdev,</div><div class='add'>+					struct mlx5_core_dev *old_mdev)</div><div class='add'>+{</div><div class='add'>+	struct ptp_clock_info *ptp_info = &amp;clock-&gt;ptp_info;</div><div class='add'>+	struct mlx5_clock_priv *cpriv = clock_priv(clock);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ptp_info-&gt;n_pins; i++) {</div><div class='add'>+		if (ptp_info-&gt;pin_config[i].func != PTP_PF_EXTTS ||</div><div class='add'>+		    !clock-&gt;pps_info.pin_armed[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (new_mdev) {</div><div class='add'>+			mlx5_set_mtppse(new_mdev, i, 0, MLX5_EVENT_MODE_REPETETIVE);</div><div class='add'>+			cpriv-&gt;event_mdev = new_mdev;</div><div class='add'>+		} else {</div><div class='add'>+			cpriv-&gt;event_mdev = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (old_mdev)</div><div class='add'>+			mlx5_set_mtppse(old_mdev, i, 0, MLX5_EVENT_MODE_DISABLE);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_clock_load(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='add'>+	struct mlx5_clock_priv *cpriv;</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_GEN(mdev, device_frequency_khz))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;mdev-&gt;clock_state-&gt;out_work, mlx5_pps_out);</div><div class='add'>+	MLX5_NB_INIT(&amp;mdev-&gt;clock_state-&gt;pps_nb, mlx5_pps_event, PPS_EVENT);</div><div class='add'>+	mlx5_eq_notifier_register(mdev, &amp;mdev-&gt;clock_state-&gt;pps_nb);</div><div class='add'>+</div><div class='add'>+	if (!clock-&gt;shared) {</div><div class='add'>+		mlx5_clock_arm_pps_in_event(clock, mdev, NULL);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpriv = clock_priv(clock);</div><div class='add'>+	mlx5_devcom_comp_lock(mdev-&gt;clock_state-&gt;compdev);</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	if (mdev == cpriv-&gt;mdev &amp;&amp; mdev != cpriv-&gt;event_mdev)</div><div class='add'>+		mlx5_clock_arm_pps_in_event(clock, mdev, cpriv-&gt;event_mdev);</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+	mlx5_devcom_comp_unlock(mdev-&gt;clock_state-&gt;compdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_clock_unload(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *peer_dev, *next = NULL;</div><div class='add'>+	struct mlx5_clock *clock = mdev-&gt;clock;</div><div class='add'>+	struct mlx5_devcom_comp_dev *pos;</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_GEN(mdev, device_frequency_khz))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!clock-&gt;shared) {</div><div class='add'>+		mlx5_clock_arm_pps_in_event(clock, NULL, mdev);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5_devcom_comp_lock(mdev-&gt;clock_state-&gt;compdev);</div><div class='add'>+	mlx5_devcom_for_each_peer_entry(mdev-&gt;clock_state-&gt;compdev, peer_dev, pos) {</div><div class='add'>+		if (peer_dev-&gt;clock &amp;&amp; peer_dev != mdev) {</div><div class='add'>+			next = peer_dev;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5_clock_lock(clock);</div><div class='add'>+	if (mdev == clock_priv(clock)-&gt;event_mdev)</div><div class='add'>+		mlx5_clock_arm_pps_in_event(clock, next, mdev);</div><div class='add'>+	mlx5_clock_unlock(clock);</div><div class='add'>+	mlx5_devcom_comp_unlock(mdev-&gt;clock_state-&gt;compdev);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mlx5_eq_notifier_unregister(mdev, &amp;mdev-&gt;clock_state-&gt;pps_nb);</div><div class='add'>+	cancel_work_sync(&amp;mdev-&gt;clock_state-&gt;out_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_clock null_clock;</div><div class='add'>+</div><div class='add'>+int mlx5_init_clock(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	u8 identity[MLX5_RT_CLOCK_IDENTITY_SIZE];</div><div class='add'>+	struct mlx5_clock_dev_state *clock_state;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_GEN(mdev, device_frequency_khz)) {</div><div class='add'>+		mdev-&gt;clock = &amp;null_clock;</div><div class='add'>+		mlx5_core_warn(mdev, "invalid device_frequency_khz, aborting HW clock init\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clock_state = kzalloc(sizeof(*clock_state), GFP_KERNEL);</div><div class='add'>+	if (!clock_state)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	clock_state-&gt;mdev = mdev;</div><div class='add'>+	mdev-&gt;clock_state = clock_state;</div><div class='add'>+</div><div class='add'>+	if (MLX5_CAP_MCAM_REG3(mdev, mrtcq) &amp;&amp; mlx5_real_time_mode(mdev)) {</div><div class='add'>+		if (mlx5_clock_identity_get(mdev, identity))</div><div class='add'>+			mlx5_core_warn(mdev, "failed to get rt clock identity, create ptp dev per function\n");</div><div class='add'>+		else</div><div class='add'>+			mlx5_shared_clock_register(mdev, identity);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!mdev-&gt;clock) {</div><div class='add'>+		err = mlx5_clock_alloc(mdev, false);</div><div class='add'>+		if (err) {</div><div class='add'>+			kfree(clock_state);</div><div class='add'>+			mdev-&gt;clock_state = NULL;</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_cleanup_clock(struct mlx5_core_dev *mdev)</div><div class='add'>+{</div><div class='add'>+	if (!MLX5_CAP_GEN(mdev, device_frequency_khz))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;clock-&gt;shared)</div><div class='add'>+		mlx5_shared_clock_unregister(mdev);</div><div class='add'>+	else</div><div class='add'>+		mlx5_clock_free(mdev);</div><div class='add'>+	kfree(mdev-&gt;clock_state);</div><div class='add'>+	mdev-&gt;clock_state = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h b/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h<br/>index bd95b9f8d143..aff3aed62c74 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h</a></div><div class='hunk'>@@ -33,6 +33,34 @@</div><div class='ctx'> #ifndef __LIB_CLOCK_H__</div><div class='ctx'> #define __LIB_CLOCK_H__</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+</div><div class='add'>+#define MAX_PIN_NUM	8</div><div class='add'>+struct mlx5_pps {</div><div class='add'>+	u8                         pin_caps[MAX_PIN_NUM];</div><div class='add'>+	u64                        start[MAX_PIN_NUM];</div><div class='add'>+	u8                         enabled;</div><div class='add'>+	u64                        min_npps_period;</div><div class='add'>+	u64                        min_out_pulse_duration_ns;</div><div class='add'>+	bool                       pin_armed[MAX_PIN_NUM];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_timer {</div><div class='add'>+	struct cyclecounter        cycles;</div><div class='add'>+	struct timecounter         tc;</div><div class='add'>+	u32                        nominal_c_mult;</div><div class='add'>+	unsigned long              overflow_period;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_clock {</div><div class='add'>+	seqlock_t                  lock;</div><div class='add'>+	struct ptp_clock          *ptp;</div><div class='add'>+	struct ptp_clock_info      ptp_info;</div><div class='add'>+	struct mlx5_pps            pps_info;</div><div class='add'>+	struct mlx5_timer          timer;</div><div class='add'>+	bool                       shared;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static inline bool mlx5_is_real_time_rq(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	u8 rq_ts_format_cap = MLX5_CAP_GEN(mdev, rq_ts_format);</div><div class='hunk'>@@ -54,12 +82,14 @@ static inline bool mlx5_is_real_time_sq(struct mlx5_core_dev *mdev)</div><div class='ctx'> typedef ktime_t (*cqe_ts_to_ns)(struct mlx5_clock *, u64);</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_PTP_1588_CLOCK)</div><div class='del'>-void mlx5_init_clock(struct mlx5_core_dev *mdev);</div><div class='add'>+int mlx5_init_clock(struct mlx5_core_dev *mdev);</div><div class='ctx'> void mlx5_cleanup_clock(struct mlx5_core_dev *mdev);</div><div class='add'>+void mlx5_clock_load(struct mlx5_core_dev *mdev);</div><div class='add'>+void mlx5_clock_unload(struct mlx5_core_dev *mdev);</div><div class='ctx'> </div><div class='ctx'> static inline int mlx5_clock_get_ptp_index(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	return mdev-&gt;clock.ptp ? ptp_clock_index(mdev-&gt;clock.ptp) : -1;</div><div class='add'>+	return mdev-&gt;clock-&gt;ptp ? ptp_clock_index(mdev-&gt;clock-&gt;ptp) : -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline ktime_t mlx5_timecounter_cyc2time(struct mlx5_clock *clock,</div><div class='hunk'>@@ -87,8 +117,10 @@ static inline ktime_t mlx5_real_time_cyc2time(struct mlx5_clock *clock,</div><div class='ctx'> 	return ns_to_ktime(time);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-static inline void mlx5_init_clock(struct mlx5_core_dev *mdev) {}</div><div class='add'>+static inline int mlx5_init_clock(struct mlx5_core_dev *mdev) { return 0; }</div><div class='ctx'> static inline void mlx5_cleanup_clock(struct mlx5_core_dev *mdev) {}</div><div class='add'>+static inline void mlx5_clock_load(struct mlx5_core_dev *mdev) {}</div><div class='add'>+static inline void mlx5_clock_unload(struct mlx5_core_dev *mdev) {}</div><div class='ctx'> static inline int mlx5_clock_get_ptp_index(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	return -1;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.h b/drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.h<br/>index c819c047bb9c..4821163a547f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.h</a></div><div class='hunk'>@@ -8,6 +8,7 @@ enum {</div><div class='ctx'> 	MLX5_ACCEL_OBJ_TLS_KEY = MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_PURPOSE_TLS,</div><div class='ctx'> 	MLX5_ACCEL_OBJ_IPSEC_KEY = MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_PURPOSE_IPSEC,</div><div class='ctx'> 	MLX5_ACCEL_OBJ_MACSEC_KEY = MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_PURPOSE_MACSEC,</div><div class='add'>+	MLX5_ACCEL_OBJ_PSP_KEY = MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_PURPOSE_PSP,</div><div class='ctx'> 	MLX5_ACCEL_OBJ_TYPE_KEY_NUM,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c<br/>index 7b0766c89f4c..e749618229bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'> #include &lt;linux/mlx5/vport.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include "lib/devcom.h"</div><div class='add'>+#include "lib/mlx5.h"</div><div class='ctx'> #include "mlx5_core.h"</div><div class='ctx'> </div><div class='ctx'> static LIST_HEAD(devcom_dev_list);</div><div class='hunk'>@@ -22,11 +23,17 @@ struct mlx5_devcom_dev {</div><div class='ctx'> 	struct kref ref;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mlx5_devcom_key {</div><div class='add'>+	u32 flags;</div><div class='add'>+	union mlx5_devcom_match_key key;</div><div class='add'>+	possible_net_t net;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mlx5_devcom_comp {</div><div class='ctx'> 	struct list_head comp_list;</div><div class='ctx'> 	enum mlx5_devcom_component id;</div><div class='del'>-	u64 key;</div><div class='ctx'> 	struct list_head comp_dev_list_head;</div><div class='add'>+	struct mlx5_devcom_key key;</div><div class='ctx'> 	mlx5_devcom_event_handler_t handler;</div><div class='ctx'> 	struct kref ref;</div><div class='ctx'> 	bool ready;</div><div class='hunk'>@@ -69,20 +76,18 @@ mlx5_devcom_dev_alloc(struct mlx5_core_dev *dev)</div><div class='ctx'> struct mlx5_devcom_dev *</div><div class='ctx'> mlx5_devcom_register_device(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_devcom_dev *devc;</div><div class='add'>+	struct mlx5_devcom_dev *devc = NULL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (devcom_dev_exists(dev)) {</div><div class='del'>-		devc = ERR_PTR(-EEXIST);</div><div class='add'>+		mlx5_core_err(dev, "devcom device already exists");</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	devc = mlx5_devcom_dev_alloc(dev);</div><div class='del'>-	if (!devc) {</div><div class='del'>-		devc = ERR_PTR(-ENOMEM);</div><div class='add'>+	if (!devc)</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	list_add_tail(&amp;devc-&gt;list, &amp;devcom_dev_list);</div><div class='ctx'> out:</div><div class='hunk'>@@ -103,21 +108,27 @@ mlx5_devcom_dev_release(struct kref *ref)</div><div class='ctx'> </div><div class='ctx'> void mlx5_devcom_unregister_device(struct mlx5_devcom_dev *devc)</div><div class='ctx'> {</div><div class='del'>-	if (!IS_ERR_OR_NULL(devc))</div><div class='del'>-		kref_put(&amp;devc-&gt;ref, mlx5_devcom_dev_release);</div><div class='add'>+	if (!devc)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kref_put(&amp;devc-&gt;ref, mlx5_devcom_dev_release);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct mlx5_devcom_comp *</div><div class='del'>-mlx5_devcom_comp_alloc(u64 id, u64 key, mlx5_devcom_event_handler_t handler)</div><div class='add'>+mlx5_devcom_comp_alloc(u64 id, const struct mlx5_devcom_match_attr *attr,</div><div class='add'>+		       mlx5_devcom_event_handler_t handler)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_devcom_comp *comp;</div><div class='ctx'> </div><div class='ctx'> 	comp = kzalloc(sizeof(*comp), GFP_KERNEL);</div><div class='ctx'> 	if (!comp)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	comp-&gt;id = id;</div><div class='del'>-	comp-&gt;key = key;</div><div class='add'>+	comp-&gt;key.key = attr-&gt;key;</div><div class='add'>+	comp-&gt;key.flags = attr-&gt;flags;</div><div class='add'>+	if (attr-&gt;flags &amp; MLX5_DEVCOM_MATCH_FLAGS_NS)</div><div class='add'>+		write_pnet(&amp;comp-&gt;key.net, attr-&gt;net);</div><div class='ctx'> 	comp-&gt;handler = handler;</div><div class='ctx'> 	init_rwsem(&amp;comp-&gt;sem);</div><div class='ctx'> 	lockdep_register_key(&amp;comp-&gt;lock_key);</div><div class='hunk'>@@ -149,7 +160,7 @@ devcom_alloc_comp_dev(struct mlx5_devcom_dev *devc,</div><div class='ctx'> </div><div class='ctx'> 	devcom = kzalloc(sizeof(*devcom), GFP_KERNEL);</div><div class='ctx'> 	if (!devcom)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	kref_get(&amp;devc-&gt;ref);</div><div class='ctx'> 	devcom-&gt;devc = devc;</div><div class='hunk'>@@ -180,21 +191,34 @@ devcom_free_comp_dev(struct mlx5_devcom_comp_dev *devcom)</div><div class='ctx'> static bool</div><div class='ctx'> devcom_component_equal(struct mlx5_devcom_comp *devcom,</div><div class='ctx'> 		       enum mlx5_devcom_component id,</div><div class='del'>-		       u64 key)</div><div class='add'>+		       const struct mlx5_devcom_match_attr *attr)</div><div class='ctx'> {</div><div class='del'>-	return devcom-&gt;id == id &amp;&amp; devcom-&gt;key == key;</div><div class='add'>+	if (devcom-&gt;id != id)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (devcom-&gt;key.flags != attr-&gt;flags)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (memcmp(&amp;devcom-&gt;key.key, &amp;attr-&gt;key, sizeof(devcom-&gt;key.key)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (devcom-&gt;key.flags &amp; MLX5_DEVCOM_MATCH_FLAGS_NS &amp;&amp;</div><div class='add'>+	    !net_eq(read_pnet(&amp;devcom-&gt;key.net), attr-&gt;net))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct mlx5_devcom_comp *</div><div class='ctx'> devcom_component_get(struct mlx5_devcom_dev *devc,</div><div class='ctx'> 		     enum mlx5_devcom_component id,</div><div class='del'>-		     u64 key,</div><div class='add'>+		     const struct mlx5_devcom_match_attr *attr,</div><div class='ctx'> 		     mlx5_devcom_event_handler_t handler)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_devcom_comp *comp;</div><div class='ctx'> </div><div class='ctx'> 	devcom_for_each_component(comp) {</div><div class='del'>-		if (devcom_component_equal(comp, id, key)) {</div><div class='add'>+		if (devcom_component_equal(comp, id, attr)) {</div><div class='ctx'> 			if (handler == comp-&gt;handler) {</div><div class='ctx'> 				kref_get(&amp;comp-&gt;ref);</div><div class='ctx'> 				return comp;</div><div class='hunk'>@@ -212,35 +236,32 @@ devcom_component_get(struct mlx5_devcom_dev *devc,</div><div class='ctx'> struct mlx5_devcom_comp_dev *</div><div class='ctx'> mlx5_devcom_register_component(struct mlx5_devcom_dev *devc,</div><div class='ctx'> 			       enum mlx5_devcom_component id,</div><div class='del'>-			       u64 key,</div><div class='add'>+			       const struct mlx5_devcom_match_attr *attr,</div><div class='ctx'> 			       mlx5_devcom_event_handler_t handler,</div><div class='ctx'> 			       void *data)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_devcom_comp_dev *devcom;</div><div class='add'>+	struct mlx5_devcom_comp_dev *devcom = NULL;</div><div class='ctx'> 	struct mlx5_devcom_comp *comp;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR_OR_NULL(devc))</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='add'>+	if (!devc)</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;comp_list_lock);</div><div class='del'>-	comp = devcom_component_get(devc, id, key, handler);</div><div class='del'>-	if (IS_ERR(comp)) {</div><div class='del'>-		devcom = ERR_PTR(-EINVAL);</div><div class='add'>+	comp = devcom_component_get(devc, id, attr, handler);</div><div class='add'>+	if (IS_ERR(comp))</div><div class='ctx'> 		goto out_unlock;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (!comp) {</div><div class='del'>-		comp = mlx5_devcom_comp_alloc(id, key, handler);</div><div class='del'>-		if (IS_ERR(comp)) {</div><div class='del'>-			devcom = ERR_CAST(comp);</div><div class='add'>+		comp = mlx5_devcom_comp_alloc(id, attr, handler);</div><div class='add'>+		if (!comp)</div><div class='ctx'> 			goto out_unlock;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		list_add_tail(&amp;comp-&gt;comp_list, &amp;devcom_comp_list);</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;comp_list_lock);</div><div class='ctx'> </div><div class='ctx'> 	devcom = devcom_alloc_comp_dev(devc, comp, data);</div><div class='del'>-	if (IS_ERR(devcom))</div><div class='add'>+	if (!devcom)</div><div class='ctx'> 		kref_put(&amp;comp-&gt;ref, mlx5_devcom_comp_release);</div><div class='ctx'> </div><div class='ctx'> 	return devcom;</div><div class='hunk'>@@ -252,8 +273,10 @@ out_unlock:</div><div class='ctx'> </div><div class='ctx'> void mlx5_devcom_unregister_component(struct mlx5_devcom_comp_dev *devcom)</div><div class='ctx'> {</div><div class='del'>-	if (!IS_ERR_OR_NULL(devcom))</div><div class='del'>-		devcom_free_comp_dev(devcom);</div><div class='add'>+	if (!devcom)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	devcom_free_comp_dev(devcom);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5_devcom_comp_get_size(struct mlx5_devcom_comp_dev *devcom)</div><div class='hunk'>@@ -272,7 +295,7 @@ int mlx5_devcom_send_event(struct mlx5_devcom_comp_dev *devcom,</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	void *data;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR_OR_NULL(devcom))</div><div class='add'>+	if (!devcom)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	comp = devcom-&gt;comp;</div><div class='hunk'>@@ -314,7 +337,7 @@ void mlx5_devcom_comp_set_ready(struct mlx5_devcom_comp_dev *devcom, bool ready)</div><div class='ctx'> </div><div class='ctx'> bool mlx5_devcom_comp_is_ready(struct mlx5_devcom_comp_dev *devcom)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ERR_OR_NULL(devcom))</div><div class='add'>+	if (!devcom)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	return READ_ONCE(devcom-&gt;comp-&gt;ready);</div><div class='hunk'>@@ -324,7 +347,7 @@ bool mlx5_devcom_for_each_peer_begin(struct mlx5_devcom_comp_dev *devcom)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_devcom_comp *comp;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR_OR_NULL(devcom))</div><div class='add'>+	if (!devcom)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	comp = devcom-&gt;comp;</div><div class='hunk'>@@ -397,21 +420,21 @@ void *mlx5_devcom_get_next_peer_data_rcu(struct mlx5_devcom_comp_dev *devcom,</div><div class='ctx'> </div><div class='ctx'> void mlx5_devcom_comp_lock(struct mlx5_devcom_comp_dev *devcom)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ERR_OR_NULL(devcom))</div><div class='add'>+	if (!devcom)</div><div class='ctx'> 		return;</div><div class='ctx'> 	down_write(&amp;devcom-&gt;comp-&gt;sem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_devcom_comp_unlock(struct mlx5_devcom_comp_dev *devcom)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ERR_OR_NULL(devcom))</div><div class='add'>+	if (!devcom)</div><div class='ctx'> 		return;</div><div class='ctx'> 	up_write(&amp;devcom-&gt;comp-&gt;sem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5_devcom_comp_trylock(struct mlx5_devcom_comp_dev *devcom)</div><div class='ctx'> {</div><div class='del'>-	if (IS_ERR_OR_NULL(devcom))</div><div class='add'>+	if (!devcom)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	return down_write_trylock(&amp;devcom-&gt;comp-&gt;sem);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h b/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h<br/>index d58032dd0df7..91e5ae529d5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h</a></div><div class='hunk'>@@ -6,11 +6,28 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mlx5/driver.h&gt;</div><div class='ctx'> </div><div class='add'>+enum mlx5_devom_match_flags {</div><div class='add'>+	MLX5_DEVCOM_MATCH_FLAGS_NS = BIT(0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MLX5_DEVCOM_MATCH_KEY_MAX 32</div><div class='add'>+union mlx5_devcom_match_key {</div><div class='add'>+	u64 val;</div><div class='add'>+	u8 buf[MLX5_DEVCOM_MATCH_KEY_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_devcom_match_attr {</div><div class='add'>+	u32 flags;</div><div class='add'>+	union mlx5_devcom_match_key key;</div><div class='add'>+	struct net *net;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum mlx5_devcom_component {</div><div class='ctx'> 	MLX5_DEVCOM_ESW_OFFLOADS,</div><div class='ctx'> 	MLX5_DEVCOM_MPV,</div><div class='ctx'> 	MLX5_DEVCOM_HCA_PORTS,</div><div class='ctx'> 	MLX5_DEVCOM_SD_GROUP,</div><div class='add'>+	MLX5_DEVCOM_SHARED_CLOCK,</div><div class='ctx'> 	MLX5_DEVCOM_NUM_COMPONENTS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -24,7 +41,7 @@ void mlx5_devcom_unregister_device(struct mlx5_devcom_dev *devc);</div><div class='ctx'> struct mlx5_devcom_comp_dev *</div><div class='ctx'> mlx5_devcom_register_component(struct mlx5_devcom_dev *devc,</div><div class='ctx'> 			       enum mlx5_devcom_component id,</div><div class='del'>-			       u64 key,</div><div class='add'>+			       const struct mlx5_devcom_match_attr *attr,</div><div class='ctx'> 			       mlx5_devcom_event_handler_t handler,</div><div class='ctx'> 			       void *data);</div><div class='ctx'> void mlx5_devcom_unregister_component(struct mlx5_devcom_comp_dev *devcom);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c<br/>index 7c5516b0a844..8115071c34a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c</a></div><div class='hunk'>@@ -30,7 +30,7 @@ struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	dm = kzalloc(sizeof(*dm), GFP_KERNEL);</div><div class='ctx'> 	if (!dm)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;dm-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +96,7 @@ err_modify_hdr:</div><div class='ctx'> err_steering:</div><div class='ctx'> 	kfree(dm);</div><div class='ctx'> </div><div class='del'>-	return ERR_PTR(-ENOMEM);</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_dm_cleanup(struct mlx5_core_dev *dev)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h b/drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h<br/>index 4b7f7131c560..b1edc71ffc6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h</a></div><div class='hunk'>@@ -72,7 +72,7 @@ static inline void eq_update_ci(struct mlx5_eq *eq, int arm)</div><div class='ctx'> </div><div class='ctx'> 	__raw_writel((__force u32)cpu_to_be32(val), addr);</div><div class='ctx'> 	/* We still want ordering, just not swabbing, so add a barrier */</div><div class='del'>-	mb();</div><div class='add'>+	wmb();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5_eq_table_init(struct mlx5_core_dev *dev);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c<br/>index a80ecb672f33..0a3c260af377 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c</a></div><div class='hunk'>@@ -161,7 +161,8 @@ mlx5_chains_create_table(struct mlx5_fs_chains *chains,</div><div class='ctx'> 		ft_attr.flags |= (MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT |</div><div class='ctx'> 				  MLX5_FLOW_TABLE_TUNNEL_EN_DECAP);</div><div class='ctx'> </div><div class='del'>-	sz = (chain == mlx5_chains_get_nf_ft_chain(chains)) ? FT_TBL_SZ : POOL_NEXT_SIZE;</div><div class='add'>+	sz = (chain == mlx5_chains_get_nf_ft_chain(chains)) ?</div><div class='add'>+		FT_TBL_SZ : MLX5_FS_MAX_POOL_SIZE;</div><div class='ctx'> 	ft_attr.max_fte = sz;</div><div class='ctx'> </div><div class='ctx'> 	/* We use chains_default_ft(chains) as the table's next_ft till</div><div class='hunk'>@@ -196,6 +197,11 @@ mlx5_chains_create_table(struct mlx5_fs_chains *chains,</div><div class='ctx'> 		ns = mlx5_get_flow_namespace(chains-&gt;dev, chains-&gt;ns);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!ns) {</div><div class='add'>+		mlx5_core_warn(chains-&gt;dev, "Failed to get flow namespace\n");</div><div class='add'>+		return ERR_PTR(-EOPNOTSUPP);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ft_attr.autogroup.num_reserved_entries = 2;</div><div class='ctx'> 	ft_attr.autogroup.max_num_groups = chains-&gt;group_num;</div><div class='ctx'> 	ft = mlx5_create_auto_grouped_flow_table(ns, &amp;ft_attr);</div><div class='hunk'>@@ -699,7 +705,7 @@ mlx5_chains_create_global_table(struct mlx5_fs_chains *chains)</div><div class='ctx'> 		goto err_ignore;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	chain = mlx5_chains_get_chain_range(chains),</div><div class='add'>+	chain = mlx5_chains_get_chain_range(chains);</div><div class='ctx'> 	prio = mlx5_chains_get_prio_range(chains);</div><div class='ctx'> 	level = mlx5_chains_get_level_range(chains);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c<br/>index 9f13cea16446..7adad784ad46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include "mlx5_core.h"</div><div class='ctx'> #include "lib/fs_ttc.h"</div><div class='ctx'> </div><div class='del'>-#define MLX5_TTC_MAX_NUM_GROUPS		4</div><div class='add'>+#define MLX5_TTC_MAX_NUM_GROUPS		7</div><div class='ctx'> #define MLX5_TTC_GROUP_TCPUDP_SIZE	(MLX5_TT_IPV6_UDP + 1)</div><div class='ctx'> </div><div class='ctx'> struct mlx5_fs_ttc_groups {</div><div class='hunk'>@@ -31,10 +31,14 @@ static int mlx5_fs_ttc_table_size(const struct mlx5_fs_ttc_groups *groups)</div><div class='ctx'> /* L3/L4 traffic type classifier */</div><div class='ctx'> struct mlx5_ttc_table {</div><div class='ctx'> 	int num_groups;</div><div class='add'>+	const struct mlx5_fs_ttc_groups *groups;</div><div class='add'>+	struct mlx5_core_dev *mdev;</div><div class='ctx'> 	struct mlx5_flow_table *t;</div><div class='ctx'> 	struct mlx5_flow_group **g;</div><div class='ctx'> 	struct mlx5_ttc_rule rules[MLX5_NUM_TT];</div><div class='ctx'> 	struct mlx5_flow_handle *tunnel_rules[MLX5_NUM_TUNNEL_TT];</div><div class='add'>+	u32 refcnt;</div><div class='add'>+	struct mutex mutex; /* Protect adding rules for ipsec crypto offload */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5_flow_table *mlx5_get_ttc_flow_table(struct mlx5_ttc_table *ttc)</div><div class='hunk'>@@ -61,6 +65,25 @@ static void mlx5_cleanup_ttc_rules(struct mlx5_ttc_table *ttc)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const char *mlx5_traffic_types_names[MLX5_NUM_TT] = {</div><div class='add'>+	[MLX5_TT_IPV4_TCP] =  "TT_IPV4_TCP",</div><div class='add'>+	[MLX5_TT_IPV6_TCP] =  "TT_IPV6_TCP",</div><div class='add'>+	[MLX5_TT_IPV4_UDP] =  "TT_IPV4_UDP",</div><div class='add'>+	[MLX5_TT_IPV6_UDP] =  "TT_IPV6_UDP",</div><div class='add'>+	[MLX5_TT_IPV4_IPSEC_AH] = "TT_IPV4_IPSEC_AH",</div><div class='add'>+	[MLX5_TT_IPV6_IPSEC_AH] = "TT_IPV6_IPSEC_AH",</div><div class='add'>+	[MLX5_TT_IPV4_IPSEC_ESP] = "TT_IPV4_IPSEC_ESP",</div><div class='add'>+	[MLX5_TT_IPV6_IPSEC_ESP] = "TT_IPV6_IPSEC_ESP",</div><div class='add'>+	[MLX5_TT_IPV4] = "TT_IPV4",</div><div class='add'>+	[MLX5_TT_IPV6] = "TT_IPV6",</div><div class='add'>+	[MLX5_TT_ANY] = "TT_ANY"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const char *mlx5_ttc_get_name(enum mlx5_traffic_types tt)</div><div class='add'>+{</div><div class='add'>+	return mlx5_traffic_types_names[tt];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct mlx5_etype_proto {</div><div class='ctx'> 	u16 etype;</div><div class='ctx'> 	u8 proto;</div><div class='hunk'>@@ -144,6 +167,8 @@ static struct mlx5_etype_proto ttc_tunnel_rules[] = {</div><div class='ctx'> enum TTC_GROUP_TYPE {</div><div class='ctx'> 	TTC_GROUPS_DEFAULT = 0,</div><div class='ctx'> 	TTC_GROUPS_USE_L4_TYPE = 1,</div><div class='add'>+	TTC_GROUPS_DEFAULT_ESP = 2,</div><div class='add'>+	TTC_GROUPS_USE_L4_TYPE_ESP = 3,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct mlx5_fs_ttc_groups ttc_groups[] = {</div><div class='hunk'>@@ -165,6 +190,31 @@ static const struct mlx5_fs_ttc_groups ttc_groups[] = {</div><div class='ctx'> 			BIT(0),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='add'>+	[TTC_GROUPS_DEFAULT_ESP] = {</div><div class='add'>+		.num_groups = 6,</div><div class='add'>+		.group_size = {</div><div class='add'>+			MLX5_TTC_GROUP_TCPUDP_SIZE + BIT(1) +</div><div class='add'>+			MLX5_NUM_TUNNEL_TT,</div><div class='add'>+			BIT(2), /* decrypted outer L4 */</div><div class='add'>+			BIT(2), /* decrypted inner L4 */</div><div class='add'>+			BIT(1), /* ESP */</div><div class='add'>+			BIT(1),</div><div class='add'>+			BIT(0),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	[TTC_GROUPS_USE_L4_TYPE_ESP] = {</div><div class='add'>+		.use_l4_type = true,</div><div class='add'>+		.num_groups = 7,</div><div class='add'>+		.group_size = {</div><div class='add'>+			MLX5_TTC_GROUP_TCPUDP_SIZE,</div><div class='add'>+			BIT(1) + MLX5_NUM_TUNNEL_TT,</div><div class='add'>+			BIT(2), /* decrypted outer L4 */</div><div class='add'>+			BIT(2), /* decrypted inner L4 */</div><div class='add'>+			BIT(1), /* ESP */</div><div class='add'>+			BIT(1),</div><div class='add'>+			BIT(0),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct mlx5_fs_ttc_groups inner_ttc_groups[] = {</div><div class='hunk'>@@ -188,6 +238,23 @@ static const struct mlx5_fs_ttc_groups inner_ttc_groups[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct mlx5_fs_ttc_groups *</div><div class='add'>+mlx5_ttc_get_fs_groups(bool use_l4_type, bool ipsec_rss)</div><div class='add'>+{</div><div class='add'>+	if (!ipsec_rss)</div><div class='add'>+		return use_l4_type ? &amp;ttc_groups[TTC_GROUPS_USE_L4_TYPE] :</div><div class='add'>+				     &amp;ttc_groups[TTC_GROUPS_DEFAULT];</div><div class='add'>+</div><div class='add'>+	return use_l4_type ? &amp;ttc_groups[TTC_GROUPS_USE_L4_TYPE_ESP] :</div><div class='add'>+			     &amp;ttc_groups[TTC_GROUPS_DEFAULT_ESP];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mlx5_ttc_has_esp_flow_group(struct mlx5_ttc_table *ttc)</div><div class='add'>+{</div><div class='add'>+	return ttc-&gt;groups == &amp;ttc_groups[TTC_GROUPS_DEFAULT_ESP] ||</div><div class='add'>+	       ttc-&gt;groups == &amp;ttc_groups[TTC_GROUPS_USE_L4_TYPE_ESP];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u8 mlx5_get_proto_by_tunnel_type(enum mlx5_tunnel_types tt)</div><div class='ctx'> {</div><div class='ctx'> 	return ttc_tunnel_rules[tt].proto;</div><div class='hunk'>@@ -238,6 +305,31 @@ static u8 mlx5_etype_to_ipv(u16 ethertype)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mlx5_fs_ttc_set_match_ipv_outer(struct mlx5_core_dev *mdev,</div><div class='add'>+					    struct mlx5_flow_spec *spec,</div><div class='add'>+					    u16 etype)</div><div class='add'>+{</div><div class='add'>+	int match_ipv_outer =</div><div class='add'>+		MLX5_CAP_FLOWTABLE_NIC_RX(mdev,</div><div class='add'>+					  ft_field_support.outer_ip_version);</div><div class='add'>+	u8 ipv;</div><div class='add'>+</div><div class='add'>+	ipv = mlx5_etype_to_ipv(etype);</div><div class='add'>+	if (match_ipv_outer &amp;&amp; ipv) {</div><div class='add'>+		MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+				 outer_headers.ip_version);</div><div class='add'>+		MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+			 outer_headers.ip_version, ipv);</div><div class='add'>+	} else {</div><div class='add'>+		MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+				 outer_headers.ethertype);</div><div class='add'>+		MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+			 outer_headers.ethertype, etype);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spec-&gt;match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mlx5_fs_ttc_set_match_proto(void *headers_c, void *headers_v,</div><div class='ctx'> 					u8 proto, bool use_l4_type)</div><div class='ctx'> {</div><div class='hunk'>@@ -260,16 +352,12 @@ static void mlx5_fs_ttc_set_match_proto(void *headers_c, void *headers_v,</div><div class='ctx'> static struct mlx5_flow_handle *</div><div class='ctx'> mlx5_generate_ttc_rule(struct mlx5_core_dev *dev, struct mlx5_flow_table *ft,</div><div class='ctx'> 		       struct mlx5_flow_destination *dest, u16 etype, u8 proto,</div><div class='del'>-		       bool use_l4_type)</div><div class='add'>+		       bool use_l4_type, bool ipsec_rss)</div><div class='ctx'> {</div><div class='del'>-	int match_ipv_outer =</div><div class='del'>-		MLX5_CAP_FLOWTABLE_NIC_RX(dev,</div><div class='del'>-					  ft_field_support.outer_ip_version);</div><div class='ctx'> 	MLX5_DECLARE_FLOW_ACT(flow_act);</div><div class='ctx'> 	struct mlx5_flow_handle *rule;</div><div class='ctx'> 	struct mlx5_flow_spec *spec;</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	u8 ipv;</div><div class='ctx'> </div><div class='ctx'> 	spec = kvzalloc(sizeof(*spec), GFP_KERNEL);</div><div class='ctx'> 	if (!spec)</div><div class='hunk'>@@ -286,15 +374,15 @@ mlx5_generate_ttc_rule(struct mlx5_core_dev *dev, struct mlx5_flow_table *ft,</div><div class='ctx'> 					    proto, use_l4_type);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ipv = mlx5_etype_to_ipv(etype);</div><div class='del'>-	if (match_ipv_outer &amp;&amp; ipv) {</div><div class='del'>-		spec-&gt;match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;</div><div class='del'>-		MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria, outer_headers.ip_version);</div><div class='del'>-		MLX5_SET(fte_match_param, spec-&gt;match_value, outer_headers.ip_version, ipv);</div><div class='del'>-	} else if (etype) {</div><div class='del'>-		spec-&gt;match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;</div><div class='del'>-		MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria, outer_headers.ethertype);</div><div class='del'>-		MLX5_SET(fte_match_param, spec-&gt;match_value, outer_headers.ethertype, etype);</div><div class='add'>+	if (etype)</div><div class='add'>+		mlx5_fs_ttc_set_match_ipv_outer(dev, spec, etype);</div><div class='add'>+</div><div class='add'>+	if (ipsec_rss &amp;&amp; proto == IPPROTO_ESP) {</div><div class='add'>+		MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+				 misc_parameters_2.ipsec_next_header);</div><div class='add'>+		MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+			 misc_parameters_2.ipsec_next_header, 0);</div><div class='add'>+		spec-&gt;match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rule = mlx5_add_flow_rules(ft, spec, &amp;flow_act, dest, 1);</div><div class='hunk'>@@ -323,12 +411,16 @@ static int mlx5_generate_ttc_table_rules(struct mlx5_core_dev *dev,</div><div class='ctx'> 	for (tt = 0; tt &lt; MLX5_NUM_TT; tt++) {</div><div class='ctx'> 		struct mlx5_ttc_rule *rule = &amp;rules[tt];</div><div class='ctx'> </div><div class='add'>+		if (mlx5_ttc_is_decrypted_esp_tt(tt))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		if (test_bit(tt, params-&gt;ignore_dests))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		rule-&gt;rule = mlx5_generate_ttc_rule(dev, ft, &amp;params-&gt;dests[tt],</div><div class='ctx'> 						    ttc_rules[tt].etype,</div><div class='ctx'> 						    ttc_rules[tt].proto,</div><div class='del'>-						    use_l4_type);</div><div class='add'>+						    use_l4_type,</div><div class='add'>+						    params-&gt;ipsec_rss);</div><div class='ctx'> 		if (IS_ERR(rule-&gt;rule)) {</div><div class='ctx'> 			err = PTR_ERR(rule-&gt;rule);</div><div class='ctx'> 			rule-&gt;rule = NULL;</div><div class='hunk'>@@ -351,7 +443,7 @@ static int mlx5_generate_ttc_table_rules(struct mlx5_core_dev *dev,</div><div class='ctx'> 						    &amp;params-&gt;tunnel_dests[tt],</div><div class='ctx'> 						    ttc_tunnel_rules[tt].etype,</div><div class='ctx'> 						    ttc_tunnel_rules[tt].proto,</div><div class='del'>-						    use_l4_type);</div><div class='add'>+						    use_l4_type, false);</div><div class='ctx'> 		if (IS_ERR(trules[tt])) {</div><div class='ctx'> 			err = PTR_ERR(trules[tt]);</div><div class='ctx'> 			trules[tt] = NULL;</div><div class='hunk'>@@ -366,10 +458,78 @@ del_rules:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlx5_create_ttc_table_ipsec_groups(struct mlx5_ttc_table *ttc,</div><div class='add'>+					      bool use_ipv,</div><div class='add'>+					      u32 *in, int *next_ix)</div><div class='add'>+{</div><div class='add'>+	u8 *mc = MLX5_ADDR_OF(create_flow_group_in, in, match_criteria);</div><div class='add'>+	const struct mlx5_fs_ttc_groups *groups = ttc-&gt;groups;</div><div class='add'>+	int ix = *next_ix;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(fte_match_param, mc, outer_headers.ip_protocol, 0);</div><div class='add'>+</div><div class='add'>+	/* decrypted ESP outer group */</div><div class='add'>+	MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, mc, outer_headers.l4_type_ext);</div><div class='add'>+	MLX5_SET_CFG(in, start_flow_index, ix);</div><div class='add'>+	ix += groups-&gt;group_size[ttc-&gt;num_groups];</div><div class='add'>+	MLX5_SET_CFG(in, end_flow_index, ix - 1);</div><div class='add'>+	ttc-&gt;g[ttc-&gt;num_groups] = mlx5_create_flow_group(ttc-&gt;t, in);</div><div class='add'>+	if (IS_ERR(ttc-&gt;g[ttc-&gt;num_groups]))</div><div class='add'>+		goto err;</div><div class='add'>+	ttc-&gt;num_groups++;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(fte_match_param, mc, outer_headers.l4_type_ext, 0);</div><div class='add'>+</div><div class='add'>+	/* decrypted ESP inner group */</div><div class='add'>+	MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_INNER_HEADERS);</div><div class='add'>+	if (use_ipv)</div><div class='add'>+		MLX5_SET(fte_match_param, mc, outer_headers.ip_version, 0);</div><div class='add'>+	else</div><div class='add'>+		MLX5_SET(fte_match_param, mc, outer_headers.ethertype, 0);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, mc, inner_headers.ip_version);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, mc, inner_headers.l4_type_ext);</div><div class='add'>+	MLX5_SET_CFG(in, start_flow_index, ix);</div><div class='add'>+	ix += groups-&gt;group_size[ttc-&gt;num_groups];</div><div class='add'>+	MLX5_SET_CFG(in, end_flow_index, ix - 1);</div><div class='add'>+	ttc-&gt;g[ttc-&gt;num_groups] = mlx5_create_flow_group(ttc-&gt;t, in);</div><div class='add'>+	if (IS_ERR(ttc-&gt;g[ttc-&gt;num_groups]))</div><div class='add'>+		goto err;</div><div class='add'>+	ttc-&gt;num_groups++;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(fte_match_param, mc, inner_headers.ip_version, 0);</div><div class='add'>+	MLX5_SET(fte_match_param, mc, inner_headers.l4_type_ext, 0);</div><div class='add'>+</div><div class='add'>+	/* undecrypted ESP group */</div><div class='add'>+	MLX5_SET_CFG(in, match_criteria_enable,</div><div class='add'>+		     MLX5_MATCH_OUTER_HEADERS | MLX5_MATCH_MISC_PARAMETERS_2);</div><div class='add'>+	if (use_ipv)</div><div class='add'>+		MLX5_SET_TO_ONES(fte_match_param, mc, outer_headers.ip_version);</div><div class='add'>+	else</div><div class='add'>+		MLX5_SET_TO_ONES(fte_match_param, mc, outer_headers.ethertype);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, mc, outer_headers.ip_protocol);</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, mc,</div><div class='add'>+			 misc_parameters_2.ipsec_next_header);</div><div class='add'>+	MLX5_SET_CFG(in, start_flow_index, ix);</div><div class='add'>+	ix += groups-&gt;group_size[ttc-&gt;num_groups];</div><div class='add'>+	MLX5_SET_CFG(in, end_flow_index, ix - 1);</div><div class='add'>+	ttc-&gt;g[ttc-&gt;num_groups] = mlx5_create_flow_group(ttc-&gt;t, in);</div><div class='add'>+	if (IS_ERR(ttc-&gt;g[ttc-&gt;num_groups]))</div><div class='add'>+		goto err;</div><div class='add'>+	ttc-&gt;num_groups++;</div><div class='add'>+</div><div class='add'>+	*next_ix = ix;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	return PTR_ERR(ttc-&gt;g[ttc-&gt;num_groups]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mlx5_create_ttc_table_groups(struct mlx5_ttc_table *ttc,</div><div class='del'>-					bool use_ipv,</div><div class='del'>-					const struct mlx5_fs_ttc_groups *groups)</div><div class='add'>+					bool use_ipv)</div><div class='ctx'> {</div><div class='add'>+	const struct mlx5_fs_ttc_groups *groups = ttc-&gt;groups;</div><div class='ctx'> 	int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);</div><div class='ctx'> 	int ix = 0;</div><div class='ctx'> 	u32 *in;</div><div class='hunk'>@@ -417,8 +577,18 @@ static int mlx5_create_ttc_table_groups(struct mlx5_ttc_table *ttc,</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	ttc-&gt;num_groups++;</div><div class='ctx'> </div><div class='add'>+	if (mlx5_ttc_has_esp_flow_group(ttc)) {</div><div class='add'>+		err = mlx5_create_ttc_table_ipsec_groups(ttc, use_ipv, in, &amp;ix);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		MLX5_SET(fte_match_param, mc,</div><div class='add'>+			 misc_parameters_2.ipsec_next_header, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* L3 Group */</div><div class='ctx'> 	MLX5_SET(fte_match_param, mc, outer_headers.ip_protocol, 0);</div><div class='add'>+	MLX5_SET_CFG(in, match_criteria_enable, MLX5_MATCH_OUTER_HEADERS);</div><div class='ctx'> 	MLX5_SET_CFG(in, start_flow_index, ix);</div><div class='ctx'> 	ix += groups-&gt;group_size[ttc-&gt;num_groups];</div><div class='ctx'> 	MLX5_SET_CFG(in, end_flow_index, ix - 1);</div><div class='hunk'>@@ -508,6 +678,9 @@ static int mlx5_generate_inner_ttc_table_rules(struct mlx5_core_dev *dev,</div><div class='ctx'> 	for (tt = 0; tt &lt; MLX5_NUM_TT; tt++) {</div><div class='ctx'> 		struct mlx5_ttc_rule *rule = &amp;rules[tt];</div><div class='ctx'> </div><div class='add'>+		if (mlx5_ttc_is_decrypted_esp_tt(tt))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		if (test_bit(tt, params-&gt;ignore_dests))</div><div class='ctx'> 			continue;</div><div class='ctx'> 		rule-&gt;rule = mlx5_generate_inner_ttc_rule(dev, ft,</div><div class='hunk'>@@ -618,10 +791,6 @@ struct mlx5_ttc_table *mlx5_create_inner_ttc_table(struct mlx5_core_dev *dev,</div><div class='ctx'> 	bool use_l4_type;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	ttc = kvzalloc(sizeof(*ttc), GFP_KERNEL);</div><div class='del'>-	if (!ttc)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='ctx'> 	switch (params-&gt;ns_type) {</div><div class='ctx'> 	case MLX5_FLOW_NAMESPACE_PORT_SEL:</div><div class='ctx'> 		use_l4_type = MLX5_CAP_GEN_2(dev, pcc_ifa2) &amp;&amp;</div><div class='hunk'>@@ -635,7 +804,16 @@ struct mlx5_ttc_table *mlx5_create_inner_ttc_table(struct mlx5_core_dev *dev,</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ttc = kvzalloc(sizeof(*ttc), GFP_KERNEL);</div><div class='add'>+	if (!ttc)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='ctx'> 	ns = mlx5_get_flow_namespace(dev, params-&gt;ns_type);</div><div class='add'>+	if (!ns) {</div><div class='add'>+		kvfree(ttc);</div><div class='add'>+		return ERR_PTR(-EOPNOTSUPP);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	groups = use_l4_type ? &amp;inner_ttc_groups[TTC_GROUPS_USE_L4_TYPE] :</div><div class='ctx'> 			       &amp;inner_ttc_groups[TTC_GROUPS_DEFAULT];</div><div class='ctx'> </div><div class='hunk'>@@ -676,6 +854,7 @@ void mlx5_destroy_ttc_table(struct mlx5_ttc_table *ttc)</div><div class='ctx'> </div><div class='ctx'> 	kfree(ttc-&gt;g);</div><div class='ctx'> 	mlx5_destroy_flow_table(ttc-&gt;t);</div><div class='add'>+	mutex_destroy(&amp;ttc-&gt;mutex);</div><div class='ctx'> 	kvfree(ttc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -685,16 +864,11 @@ struct mlx5_ttc_table *mlx5_create_ttc_table(struct mlx5_core_dev *dev,</div><div class='ctx'> 	bool match_ipv_outer =</div><div class='ctx'> 		MLX5_CAP_FLOWTABLE_NIC_RX(dev,</div><div class='ctx'> 					  ft_field_support.outer_ip_version);</div><div class='del'>-	const struct mlx5_fs_ttc_groups *groups;</div><div class='ctx'> 	struct mlx5_flow_namespace *ns;</div><div class='ctx'> 	struct mlx5_ttc_table *ttc;</div><div class='ctx'> 	bool use_l4_type;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	ttc = kvzalloc(sizeof(*ttc), GFP_KERNEL);</div><div class='del'>-	if (!ttc)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='ctx'> 	switch (params-&gt;ns_type) {</div><div class='ctx'> 	case MLX5_FLOW_NAMESPACE_PORT_SEL:</div><div class='ctx'> 		use_l4_type = MLX5_CAP_GEN_2(dev, pcc_ifa2) &amp;&amp;</div><div class='hunk'>@@ -708,12 +882,20 @@ struct mlx5_ttc_table *mlx5_create_ttc_table(struct mlx5_core_dev *dev,</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ttc = kvzalloc(sizeof(*ttc), GFP_KERNEL);</div><div class='add'>+	if (!ttc)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='ctx'> 	ns = mlx5_get_flow_namespace(dev, params-&gt;ns_type);</div><div class='del'>-	groups = use_l4_type ? &amp;ttc_groups[TTC_GROUPS_USE_L4_TYPE] :</div><div class='del'>-			       &amp;ttc_groups[TTC_GROUPS_DEFAULT];</div><div class='add'>+	if (!ns) {</div><div class='add'>+		kvfree(ttc);</div><div class='add'>+		return ERR_PTR(-EOPNOTSUPP);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ttc-&gt;groups = mlx5_ttc_get_fs_groups(use_l4_type, params-&gt;ipsec_rss);</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON_ONCE(params-&gt;ft_attr.max_fte);</div><div class='del'>-	params-&gt;ft_attr.max_fte = mlx5_fs_ttc_table_size(groups);</div><div class='add'>+	params-&gt;ft_attr.max_fte = mlx5_fs_ttc_table_size(ttc-&gt;groups);</div><div class='ctx'> 	ttc-&gt;t = mlx5_create_flow_table(ns, &amp;params-&gt;ft_attr);</div><div class='ctx'> 	if (IS_ERR(ttc-&gt;t)) {</div><div class='ctx'> 		err = PTR_ERR(ttc-&gt;t);</div><div class='hunk'>@@ -721,7 +903,7 @@ struct mlx5_ttc_table *mlx5_create_ttc_table(struct mlx5_core_dev *dev,</div><div class='ctx'> 		return ERR_PTR(err);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = mlx5_create_ttc_table_groups(ttc, match_ipv_outer, groups);</div><div class='add'>+	err = mlx5_create_ttc_table_groups(ttc, match_ipv_outer);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto destroy_ft;</div><div class='ctx'> </div><div class='hunk'>@@ -729,6 +911,9 @@ struct mlx5_ttc_table *mlx5_create_ttc_table(struct mlx5_core_dev *dev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto destroy_ft;</div><div class='ctx'> </div><div class='add'>+	ttc-&gt;mdev = dev;</div><div class='add'>+	mutex_init(&amp;ttc-&gt;mutex);</div><div class='add'>+</div><div class='ctx'> 	return ttc;</div><div class='ctx'> </div><div class='ctx'> destroy_ft:</div><div class='hunk'>@@ -762,3 +947,194 @@ int mlx5_ttc_fwd_default_dest(struct mlx5_ttc_table *ttc,</div><div class='ctx'> </div><div class='ctx'> 	return mlx5_ttc_fwd_dest(ttc, type, &amp;dest);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void _mlx5_ttc_destroy_ipsec_rules(struct mlx5_ttc_table *ttc)</div><div class='add'>+{</div><div class='add'>+	enum mlx5_traffic_types i;</div><div class='add'>+</div><div class='add'>+	for (i = MLX5_TT_DECRYPTED_ESP_OUTER_IPV4_TCP;</div><div class='add'>+	     i &lt;= MLX5_TT_DECRYPTED_ESP_INNER_IPV6_UDP; i++) {</div><div class='add'>+		if (!ttc-&gt;rules[i].rule)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mlx5_del_flow_rules(ttc-&gt;rules[i].rule);</div><div class='add'>+		ttc-&gt;rules[i].rule = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_ttc_destroy_ipsec_rules(struct mlx5_ttc_table *ttc)</div><div class='add'>+{</div><div class='add'>+	if (!mlx5_ttc_has_esp_flow_group(ttc))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ttc-&gt;mutex);</div><div class='add'>+	if (--ttc-&gt;refcnt)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	_mlx5_ttc_destroy_ipsec_rules(ttc);</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;ttc-&gt;mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_ttc_get_tt_attrs(enum mlx5_traffic_types type,</div><div class='add'>+				 u16 *etype, int *l4_type_ext,</div><div class='add'>+				 enum mlx5_traffic_types *tir_tt)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case MLX5_TT_DECRYPTED_ESP_OUTER_IPV4_TCP:</div><div class='add'>+	case MLX5_TT_DECRYPTED_ESP_INNER_IPV4_TCP:</div><div class='add'>+		*etype = ETH_P_IP;</div><div class='add'>+		*l4_type_ext = MLX5_PACKET_L4_TYPE_EXT_TCP;</div><div class='add'>+		*tir_tt = MLX5_TT_IPV4_TCP;</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_TT_DECRYPTED_ESP_OUTER_IPV6_TCP:</div><div class='add'>+	case MLX5_TT_DECRYPTED_ESP_INNER_IPV6_TCP:</div><div class='add'>+		*etype = ETH_P_IPV6;</div><div class='add'>+		*l4_type_ext = MLX5_PACKET_L4_TYPE_EXT_TCP;</div><div class='add'>+		*tir_tt = MLX5_TT_IPV6_TCP;</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_TT_DECRYPTED_ESP_OUTER_IPV4_UDP:</div><div class='add'>+	case MLX5_TT_DECRYPTED_ESP_INNER_IPV4_UDP:</div><div class='add'>+		*etype = ETH_P_IP;</div><div class='add'>+		*l4_type_ext = MLX5_PACKET_L4_TYPE_EXT_UDP;</div><div class='add'>+		*tir_tt = MLX5_TT_IPV4_UDP;</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_TT_DECRYPTED_ESP_OUTER_IPV6_UDP:</div><div class='add'>+	case MLX5_TT_DECRYPTED_ESP_INNER_IPV6_UDP:</div><div class='add'>+		*etype = ETH_P_IPV6;</div><div class='add'>+		*l4_type_ext = MLX5_PACKET_L4_TYPE_EXT_UDP;</div><div class='add'>+		*tir_tt = MLX5_TT_IPV6_UDP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_flow_handle *</div><div class='add'>+mlx5_ttc_create_ipsec_outer_rule(struct mlx5_ttc_table *ttc,</div><div class='add'>+				 enum mlx5_traffic_types type)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_destination dest;</div><div class='add'>+	MLX5_DECLARE_FLOW_ACT(flow_act);</div><div class='add'>+	enum mlx5_traffic_types tir_tt;</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mlx5_flow_spec *spec;</div><div class='add'>+	int l4_type_ext;</div><div class='add'>+	u16 etype;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_ttc_get_tt_attrs(type, &amp;etype, &amp;l4_type_ext, &amp;tir_tt);</div><div class='add'>+	if (err)</div><div class='add'>+		return ERR_PTR(err);</div><div class='add'>+</div><div class='add'>+	spec = kvzalloc(sizeof(*spec), GFP_KERNEL);</div><div class='add'>+	if (!spec)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	mlx5_fs_ttc_set_match_ipv_outer(ttc-&gt;mdev, spec, etype);</div><div class='add'>+</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+			 outer_headers.l4_type_ext);</div><div class='add'>+	MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+		 outer_headers.l4_type_ext, l4_type_ext);</div><div class='add'>+</div><div class='add'>+	dest = mlx5_ttc_get_default_dest(ttc, tir_tt);</div><div class='add'>+</div><div class='add'>+	rule = mlx5_add_flow_rules(ttc-&gt;t, spec, &amp;flow_act, &amp;dest, 1);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		mlx5_core_err(ttc-&gt;mdev, "%s: add rule failed\n", __func__);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvfree(spec);</div><div class='add'>+	return err ? ERR_PTR(err) : rule;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_flow_handle *</div><div class='add'>+mlx5_ttc_create_ipsec_inner_rule(struct mlx5_ttc_table *ttc,</div><div class='add'>+				 struct mlx5_ttc_table *inner_ttc,</div><div class='add'>+				 enum mlx5_traffic_types type)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_destination dest;</div><div class='add'>+	MLX5_DECLARE_FLOW_ACT(flow_act);</div><div class='add'>+	enum mlx5_traffic_types tir_tt;</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='add'>+	struct mlx5_flow_spec *spec;</div><div class='add'>+	int l4_type_ext;</div><div class='add'>+	u16 etype;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_ttc_get_tt_attrs(type, &amp;etype, &amp;l4_type_ext, &amp;tir_tt);</div><div class='add'>+	if (err)</div><div class='add'>+		return ERR_PTR(err);</div><div class='add'>+</div><div class='add'>+	spec = kvzalloc(sizeof(*spec), GFP_KERNEL);</div><div class='add'>+	if (!spec)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+			 inner_headers.ip_version);</div><div class='add'>+	MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+		 inner_headers.ip_version, mlx5_etype_to_ipv(etype));</div><div class='add'>+	MLX5_SET_TO_ONES(fte_match_param, spec-&gt;match_criteria,</div><div class='add'>+			 inner_headers.l4_type_ext);</div><div class='add'>+	MLX5_SET(fte_match_param, spec-&gt;match_value,</div><div class='add'>+		 inner_headers.l4_type_ext, l4_type_ext);</div><div class='add'>+</div><div class='add'>+	dest = mlx5_ttc_get_default_dest(inner_ttc, tir_tt);</div><div class='add'>+</div><div class='add'>+	spec-&gt;match_criteria_enable = MLX5_MATCH_INNER_HEADERS;</div><div class='add'>+</div><div class='add'>+	rule = mlx5_add_flow_rules(ttc-&gt;t, spec, &amp;flow_act, &amp;dest, 1);</div><div class='add'>+	if (IS_ERR(rule)) {</div><div class='add'>+		err = PTR_ERR(rule);</div><div class='add'>+		mlx5_core_err(ttc-&gt;mdev, "%s: add rule failed\n", __func__);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvfree(spec);</div><div class='add'>+	return err ? ERR_PTR(err) : rule;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_ttc_create_ipsec_rules(struct mlx5_ttc_table *ttc,</div><div class='add'>+				struct mlx5_ttc_table *inner_ttc)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_handle *rule;</div><div class='add'>+	enum mlx5_traffic_types i;</div><div class='add'>+</div><div class='add'>+	if (!mlx5_ttc_has_esp_flow_group(ttc))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ttc-&gt;mutex);</div><div class='add'>+	if (ttc-&gt;refcnt)</div><div class='add'>+		goto skip;</div><div class='add'>+</div><div class='add'>+	for (i = MLX5_TT_DECRYPTED_ESP_OUTER_IPV4_TCP;</div><div class='add'>+	     i &lt;= MLX5_TT_DECRYPTED_ESP_OUTER_IPV6_UDP; i++) {</div><div class='add'>+		rule = mlx5_ttc_create_ipsec_outer_rule(ttc, i);</div><div class='add'>+		if (IS_ERR(rule))</div><div class='add'>+			goto err_out;</div><div class='add'>+</div><div class='add'>+		ttc-&gt;rules[i].rule = rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = MLX5_TT_DECRYPTED_ESP_INNER_IPV4_TCP;</div><div class='add'>+	     i &lt;= MLX5_TT_DECRYPTED_ESP_INNER_IPV6_UDP; i++) {</div><div class='add'>+		rule = mlx5_ttc_create_ipsec_inner_rule(ttc, inner_ttc, i);</div><div class='add'>+		if (IS_ERR(rule))</div><div class='add'>+			goto err_out;</div><div class='add'>+</div><div class='add'>+		ttc-&gt;rules[i].rule = rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+skip:</div><div class='add'>+	ttc-&gt;refcnt++;</div><div class='add'>+	mutex_unlock(&amp;ttc-&gt;mutex);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	_mlx5_ttc_destroy_ipsec_rules(ttc);</div><div class='add'>+	mutex_unlock(&amp;ttc-&gt;mutex);</div><div class='add'>+	return PTR_ERR(rule);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h b/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h<br/>index 92eea6bea310..95f6e56724a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h</a></div><div class='hunk'>@@ -18,6 +18,14 @@ enum mlx5_traffic_types {</div><div class='ctx'> 	MLX5_TT_IPV4,</div><div class='ctx'> 	MLX5_TT_IPV6,</div><div class='ctx'> 	MLX5_TT_ANY,</div><div class='add'>+	MLX5_TT_DECRYPTED_ESP_OUTER_IPV4_TCP,</div><div class='add'>+	MLX5_TT_DECRYPTED_ESP_OUTER_IPV6_TCP,</div><div class='add'>+	MLX5_TT_DECRYPTED_ESP_OUTER_IPV4_UDP,</div><div class='add'>+	MLX5_TT_DECRYPTED_ESP_OUTER_IPV6_UDP,</div><div class='add'>+	MLX5_TT_DECRYPTED_ESP_INNER_IPV4_TCP,</div><div class='add'>+	MLX5_TT_DECRYPTED_ESP_INNER_IPV6_TCP,</div><div class='add'>+	MLX5_TT_DECRYPTED_ESP_INNER_IPV4_UDP,</div><div class='add'>+	MLX5_TT_DECRYPTED_ESP_INNER_IPV6_UDP,</div><div class='ctx'> 	MLX5_NUM_TT,</div><div class='ctx'> 	MLX5_NUM_INDIR_TIRS = MLX5_TT_ANY,</div><div class='ctx'> };</div><div class='hunk'>@@ -47,8 +55,10 @@ struct ttc_params {</div><div class='ctx'> 	bool   inner_ttc;</div><div class='ctx'> 	DECLARE_BITMAP(ignore_tunnel_dests, MLX5_NUM_TUNNEL_TT);</div><div class='ctx'> 	struct mlx5_flow_destination tunnel_dests[MLX5_NUM_TUNNEL_TT];</div><div class='add'>+	bool ipsec_rss;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+const char *mlx5_ttc_get_name(enum mlx5_traffic_types tt);</div><div class='ctx'> struct mlx5_flow_table *mlx5_get_ttc_flow_table(struct mlx5_ttc_table *ttc);</div><div class='ctx'> </div><div class='ctx'> struct mlx5_ttc_table *mlx5_create_ttc_table(struct mlx5_core_dev *dev,</div><div class='hunk'>@@ -69,4 +79,14 @@ int mlx5_ttc_fwd_default_dest(struct mlx5_ttc_table *ttc,</div><div class='ctx'> bool mlx5_tunnel_inner_ft_supported(struct mlx5_core_dev *mdev);</div><div class='ctx'> u8 mlx5_get_proto_by_tunnel_type(enum mlx5_tunnel_types tt);</div><div class='ctx'> </div><div class='add'>+bool mlx5_ttc_has_esp_flow_group(struct mlx5_ttc_table *ttc);</div><div class='add'>+int mlx5_ttc_create_ipsec_rules(struct mlx5_ttc_table *ttc,</div><div class='add'>+				struct mlx5_ttc_table *inner_ttc);</div><div class='add'>+void mlx5_ttc_destroy_ipsec_rules(struct mlx5_ttc_table *ttc);</div><div class='add'>+static inline bool mlx5_ttc_is_decrypted_esp_tt(enum mlx5_traffic_types tt)</div><div class='add'>+{</div><div class='add'>+	return tt &gt;= MLX5_TT_DECRYPTED_ESP_OUTER_IPV4_TCP &amp;&amp;</div><div class='add'>+	       tt &lt;= MLX5_TT_DECRYPTED_ESP_INNER_IPV6_UDP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* __MLX5_FS_TTC_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c<br/>index b7d4b1a2baf2..d524f0220513 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c</a></div><div class='hunk'>@@ -164,6 +164,8 @@ ipsec_fs_roce_rx_rule_setup(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	roce-&gt;rule = rule;</div><div class='ctx'> </div><div class='ctx'> 	memset(spec, 0, sizeof(*spec));</div><div class='add'>+	if (default_dst-&gt;type == MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE)</div><div class='add'>+		flow_act.flags |= FLOW_ACT_IGNORE_FLOW_LEVEL;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(roce-&gt;ft, spec, &amp;flow_act, default_dst, 1);</div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='ctx'> 		err = PTR_ERR(rule);</div><div class='hunk'>@@ -178,6 +180,8 @@ ipsec_fs_roce_rx_rule_setup(struct mlx5_core_dev *mdev,</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;</div><div class='add'>+	if (default_dst-&gt;type == MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE)</div><div class='add'>+		flow_act.flags &amp;= ~FLOW_ACT_IGNORE_FLOW_LEVEL;</div><div class='ctx'> 	dst.type = MLX5_FLOW_DESTINATION_TYPE_TABLE_TYPE;</div><div class='ctx'> 	dst.ft = roce-&gt;ft_rdma;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(roce-&gt;nic_master_ft, NULL, &amp;flow_act, &amp;dst,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c<br/>index 4a078113e292..e6be2f01daf4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c</a></div><div class='hunk'>@@ -45,11 +45,7 @@</div><div class='ctx'> #define MLX5_SECTAG_HEADER_SIZE_WITHOUT_SCI 0x8</div><div class='ctx'> #define MLX5_SECTAG_HEADER_SIZE_WITH_SCI (MLX5_SECTAG_HEADER_SIZE_WITHOUT_SCI + MACSEC_SCI_LEN)</div><div class='ctx'> </div><div class='del'>-/* MACsec RX flow steering */</div><div class='del'>-#define MLX5_ETH_WQE_FT_META_MACSEC_MASK 0x3E</div><div class='del'>-</div><div class='ctx'> /* MACsec fs_id handling for steering */</div><div class='del'>-#define macsec_fs_set_tx_fs_id(fs_id) (MLX5_ETH_WQE_FT_META_MACSEC | (fs_id) &lt;&lt; 2)</div><div class='ctx'> #define macsec_fs_set_rx_fs_id(fs_id) ((fs_id) | BIT(30))</div><div class='ctx'> </div><div class='ctx'> struct mlx5_sectag_header {</div><div class='hunk'>@@ -497,7 +493,7 @@ static int macsec_fs_tx_create(struct mlx5_macsec_fs *macsec_fs)</div><div class='ctx'> 	memset(&amp;dest, 0, sizeof(struct mlx5_flow_destination));</div><div class='ctx'> 	memset(&amp;flow_act, 0, sizeof(flow_act));</div><div class='ctx'> 	dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dest.counter_id = mlx5_fc_id(tx_tables-&gt;check_miss_rule_counter);</div><div class='add'>+	dest.counter = tx_tables-&gt;check_miss_rule_counter;</div><div class='ctx'> 	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP | MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(tx_tables-&gt;ft_check,  NULL, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='hunk'>@@ -519,7 +515,7 @@ static int macsec_fs_tx_create(struct mlx5_macsec_fs *macsec_fs)</div><div class='ctx'> 	flow_act.flags = FLOW_ACT_NO_APPEND;</div><div class='ctx'> 	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW | MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 	dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dest.counter_id = mlx5_fc_id(tx_tables-&gt;check_rule_counter);</div><div class='add'>+	dest.counter = tx_tables-&gt;check_rule_counter;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(tx_tables-&gt;ft_check, spec, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='ctx'> 		err = PTR_ERR(rule);</div><div class='hunk'>@@ -597,7 +593,7 @@ static int macsec_fs_tx_setup_fte(struct mlx5_macsec_fs *macsec_fs,</div><div class='ctx'> 	MLX5_SET(fte_match_param, spec-&gt;match_criteria, misc_parameters_2.metadata_reg_a,</div><div class='ctx'> 		 MLX5_ETH_WQE_FT_META_MACSEC_MASK);</div><div class='ctx'> 	MLX5_SET(fte_match_param, spec-&gt;match_value, misc_parameters_2.metadata_reg_a,</div><div class='del'>-		 macsec_fs_set_tx_fs_id(id));</div><div class='add'>+		 MLX5_MACSEC_TX_METADATA(id));</div><div class='ctx'> </div><div class='ctx'> 	*fs_id = id;</div><div class='ctx'> 	flow_act-&gt;crypto.type = MLX5_FLOW_CONTEXT_ENCRYPT_DECRYPT_TYPE_MACSEC;</div><div class='hunk'>@@ -1200,7 +1196,7 @@ static int macsec_fs_rx_create_check_decap_rule(struct mlx5_macsec_fs *macsec_fs</div><div class='ctx'> 	flow_act-&gt;action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |</div><div class='ctx'> 			    MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 	roce_dest[dstn].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	roce_dest[dstn].counter_id = mlx5_fc_id(rx_tables-&gt;check_rule_counter);</div><div class='add'>+	roce_dest[dstn].counter = rx_tables-&gt;check_rule_counter;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(rx_tables-&gt;ft_check, spec, flow_act, roce_dest, dstn + 1);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='hunk'>@@ -1592,7 +1588,7 @@ static int macsec_fs_rx_create(struct mlx5_macsec_fs *macsec_fs)</div><div class='ctx'> 	memset(&amp;flow_act, 0, sizeof(flow_act));</div><div class='ctx'> </div><div class='ctx'> 	dest.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;</div><div class='del'>-	dest.counter_id = mlx5_fc_id(rx_tables-&gt;check_miss_rule_counter);</div><div class='add'>+	dest.counter = rx_tables-&gt;check_miss_rule_counter;</div><div class='ctx'> 	flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP | MLX5_FLOW_CONTEXT_ACTION_COUNT;</div><div class='ctx'> 	rule = mlx5_add_flow_rules(rx_tables-&gt;ft_check,  NULL, &amp;flow_act, &amp;dest, 1);</div><div class='ctx'> 	if (IS_ERR(rule)) {</div><div class='hunk'>@@ -2219,9 +2215,11 @@ static int mlx5_macsec_fs_add_roce_rule_tx(struct mlx5_macsec_fs *macsec_fs, u32</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(set_action_in, action, action_type, MLX5_ACTION_TYPE_SET);</div><div class='ctx'> 	MLX5_SET(set_action_in, action, field, MLX5_ACTION_IN_FIELD_METADATA_REG_A);</div><div class='del'>-	MLX5_SET(set_action_in, action, data, macsec_fs_set_tx_fs_id(fs_id));</div><div class='del'>-	MLX5_SET(set_action_in, action, offset, 0);</div><div class='del'>-	MLX5_SET(set_action_in, action, length, 32);</div><div class='add'>+	MLX5_SET(set_action_in, action, data,</div><div class='add'>+		 mlx5_macsec_fs_set_tx_fs_id(fs_id));</div><div class='add'>+	MLX5_SET(set_action_in, action, offset,</div><div class='add'>+		 MLX5_ETH_WQE_FT_META_MACSEC_SHIFT);</div><div class='add'>+	MLX5_SET(set_action_in, action, length, 8);</div><div class='ctx'> </div><div class='ctx'> 	modify_hdr = mlx5_modify_header_alloc(mdev, MLX5_FLOW_NAMESPACE_RDMA_TX_MACSEC,</div><div class='ctx'> 					      1, action);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h b/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h<br/>index 34b80c3ef6a5..15acaff43641 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h</a></div><div class='hunk'>@@ -12,6 +12,21 @@</div><div class='ctx'> #define MLX5_MACSEC_METADATA_MARKER(metadata)  ((((metadata) &gt;&gt; 30) &amp; 0x3)  == 0x1)</div><div class='ctx'> #define MLX5_MACSEC_RX_METADAT_HANDLE(metadata)  ((metadata) &amp; MLX5_MACSEC_RX_FS_ID_MASK)</div><div class='ctx'> </div><div class='add'>+/* MACsec TX flow steering */</div><div class='add'>+#define MLX5_ETH_WQE_FT_META_MACSEC_MASK \</div><div class='add'>+	(MLX5_ETH_WQE_FT_META_MACSEC | MLX5_ETH_WQE_FT_META_MACSEC_FS_ID_MASK)</div><div class='add'>+#define MLX5_ETH_WQE_FT_META_MACSEC_SHIFT MLX5_ETH_WQE_FT_META_SHIFT</div><div class='add'>+</div><div class='add'>+/* MACsec fs_id handling for steering */</div><div class='add'>+#define mlx5_macsec_fs_set_tx_fs_id(fs_id) \</div><div class='add'>+	(((MLX5_ETH_WQE_FT_META_MACSEC) &gt;&gt; MLX5_ETH_WQE_FT_META_MACSEC_SHIFT) \</div><div class='add'>+	 | ((fs_id) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define MLX5_MACSEC_TX_METADATA(fs_id) \</div><div class='add'>+	(mlx5_macsec_fs_set_tx_fs_id(fs_id) &lt;&lt; \</div><div class='add'>+	 MLX5_ETH_WQE_FT_META_MACSEC_SHIFT)</div><div class='add'>+</div><div class='add'>+/* MACsec fs_id uses 4 bits, supports up to 16 interfaces */</div><div class='ctx'> #define MLX5_MACSEC_NUM_OF_SUPPORTED_INTERFACES 16</div><div class='ctx'> </div><div class='ctx'> struct mlx5_macsec_fs;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h b/drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h<br/>index 37d5f445598c..74ea5da58b7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h</a></div><div class='hunk'>@@ -45,14 +45,22 @@ int mlx5_crdump_enable(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_crdump_disable(struct mlx5_core_dev *dev);</div><div class='ctx'> int mlx5_crdump_collect(struct mlx5_core_dev *dev, u32 *cr_data);</div><div class='ctx'> </div><div class='del'>-static inline struct net *mlx5_core_net(struct mlx5_core_dev *dev)</div><div class='add'>+static inline struct net_device *mlx5_uplink_netdev_get(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='del'>-	return devlink_net(priv_to_devlink(dev));</div><div class='add'>+	struct mlx5e_resources *mlx5e_res = &amp;mdev-&gt;mlx5e_res;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mlx5e_res-&gt;uplink_netdev_lock);</div><div class='add'>+	netdev = mlx5e_res-&gt;uplink_netdev;</div><div class='add'>+	netdev_hold(netdev, &amp;mlx5e_res-&gt;tracker, GFP_KERNEL);</div><div class='add'>+	mutex_unlock(&amp;mlx5e_res-&gt;uplink_netdev_lock);</div><div class='add'>+	return netdev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct net_device *mlx5_uplink_netdev_get(struct mlx5_core_dev *mdev)</div><div class='add'>+static inline void mlx5_uplink_netdev_put(struct mlx5_core_dev *mdev,</div><div class='add'>+					  struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	return mdev-&gt;mlx5e_res.uplink_netdev;</div><div class='add'>+	netdev_put(netdev, &amp;mdev-&gt;mlx5e_res.tracker);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct mlx5_sd;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c<br/>index 4450091e181a..4a88a42ae4f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c</a></div><div class='hunk'>@@ -65,13 +65,14 @@ static int del_l2table_entry_cmd(struct mlx5_core_dev *dev, u32 index)</div><div class='ctx'> /* UC L2 table hash node */</div><div class='ctx'> struct l2table_node {</div><div class='ctx'> 	struct l2addr_node node;</div><div class='del'>-	u32                index; /* index in HW l2 table */</div><div class='add'>+	int                index; /* index in HW l2 table */</div><div class='ctx'> 	int                ref_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5_mpfs {</div><div class='ctx'> 	struct hlist_head    hash[MLX5_L2_ADDR_HASH_SIZE];</div><div class='ctx'> 	struct mutex         lock; /* Synchronize l2 table access */</div><div class='add'>+	bool                 enabled;</div><div class='ctx'> 	u32                  size;</div><div class='ctx'> 	unsigned long        *bitmap;</div><div class='ctx'> };</div><div class='hunk'>@@ -114,6 +115,8 @@ int mlx5_mpfs_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mpfs-&gt;enabled = true;</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;priv.mpfs = mpfs;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -135,7 +138,7 @@ int mlx5_mpfs_add_mac(struct mlx5_core_dev *dev, u8 *mac)</div><div class='ctx'> 	struct mlx5_mpfs *mpfs = dev-&gt;priv.mpfs;</div><div class='ctx'> 	struct l2table_node *l2addr;</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	u32 index;</div><div class='add'>+	int index;</div><div class='ctx'> </div><div class='ctx'> 	if (!mpfs)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -148,30 +151,34 @@ int mlx5_mpfs_add_mac(struct mlx5_core_dev *dev, u8 *mac)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = alloc_l2table_index(mpfs, &amp;index);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='ctx'> 	l2addr = l2addr_hash_add(mpfs-&gt;hash, mac, struct l2table_node, GFP_KERNEL);</div><div class='ctx'> 	if (!l2addr) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		goto hash_add_err;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = set_l2table_entry_cmd(dev, index, mac);</div><div class='del'>-	if (err)</div><div class='del'>-		goto set_table_entry_err;</div><div class='add'>+	index = -1;</div><div class='add'>+</div><div class='add'>+	if (mpfs-&gt;enabled) {</div><div class='add'>+		err = alloc_l2table_index(mpfs, &amp;index);</div><div class='add'>+		if (err)</div><div class='add'>+			goto hash_del;</div><div class='add'>+		err = set_l2table_entry_cmd(dev, index, mac);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_l2table_index;</div><div class='add'>+		mlx5_core_dbg(dev, "MPFS entry %pM, set @index (%d)\n",</div><div class='add'>+			      l2addr-&gt;node.addr, index);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	l2addr-&gt;index = index;</div><div class='ctx'> 	l2addr-&gt;ref_count = 1;</div><div class='ctx'> </div><div class='ctx'> 	mlx5_core_dbg(dev, "MPFS mac added %pM, index (%d)\n", mac, index);</div><div class='ctx'> 	goto out;</div><div class='del'>-</div><div class='del'>-set_table_entry_err:</div><div class='del'>-	l2addr_hash_del(l2addr);</div><div class='del'>-hash_add_err:</div><div class='add'>+free_l2table_index:</div><div class='ctx'> 	free_l2table_index(mpfs, index);</div><div class='add'>+hash_del:</div><div class='add'>+	l2addr_hash_del(l2addr);</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;mpfs-&gt;lock);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -183,7 +190,7 @@ int mlx5_mpfs_del_mac(struct mlx5_core_dev *dev, u8 *mac)</div><div class='ctx'> 	struct mlx5_mpfs *mpfs = dev-&gt;priv.mpfs;</div><div class='ctx'> 	struct l2table_node *l2addr;</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	u32 index;</div><div class='add'>+	int index;</div><div class='ctx'> </div><div class='ctx'> 	if (!mpfs)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -200,12 +207,87 @@ int mlx5_mpfs_del_mac(struct mlx5_core_dev *dev, u8 *mac)</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> </div><div class='ctx'> 	index = l2addr-&gt;index;</div><div class='del'>-	del_l2table_entry_cmd(dev, index);</div><div class='add'>+	if (index &gt;= 0) {</div><div class='add'>+		del_l2table_entry_cmd(dev, index);</div><div class='add'>+		free_l2table_index(mpfs, index);</div><div class='add'>+		mlx5_core_dbg(dev, "MPFS entry %pM, deleted @index (%d)\n",</div><div class='add'>+			      mac, index);</div><div class='add'>+	}</div><div class='ctx'> 	l2addr_hash_del(l2addr);</div><div class='del'>-	free_l2table_index(mpfs, index);</div><div class='ctx'> 	mlx5_core_dbg(dev, "MPFS mac deleted %pM, index (%d)\n", mac, index);</div><div class='ctx'> unlock:</div><div class='ctx'> 	mutex_unlock(&amp;mpfs-&gt;lock);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mlx5_mpfs_del_mac);</div><div class='add'>+</div><div class='add'>+int mlx5_mpfs_enable(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_mpfs *mpfs = dev-&gt;priv.mpfs;</div><div class='add'>+	struct l2table_node *l2addr;</div><div class='add'>+	struct hlist_node *n;</div><div class='add'>+	int err = 0, i;</div><div class='add'>+</div><div class='add'>+	if (!mpfs)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mpfs-&gt;lock);</div><div class='add'>+	if (mpfs-&gt;enabled)</div><div class='add'>+		goto out;</div><div class='add'>+	mpfs-&gt;enabled = true;</div><div class='add'>+	mlx5_core_dbg(dev, "MPFS enabling mpfs\n");</div><div class='add'>+</div><div class='add'>+	mlx5_mpfs_foreach(l2addr, n, mpfs, i) {</div><div class='add'>+		u32 index;</div><div class='add'>+</div><div class='add'>+		err = alloc_l2table_index(mpfs, &amp;index);</div><div class='add'>+		if (err) {</div><div class='add'>+			mlx5_core_err(dev, "Failed to allocated MPFS index for %pM, err(%d)\n",</div><div class='add'>+				      l2addr-&gt;node.addr, err);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = set_l2table_entry_cmd(dev, index, l2addr-&gt;node.addr);</div><div class='add'>+		if (err) {</div><div class='add'>+			mlx5_core_err(dev, "Failed to set MPFS l2table entry for %pM index=%d, err(%d)\n",</div><div class='add'>+				      l2addr-&gt;node.addr, index, err);</div><div class='add'>+			free_l2table_index(mpfs, index);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		l2addr-&gt;index = index;</div><div class='add'>+		mlx5_core_dbg(dev, "MPFS entry %pM, set @index (%d)\n",</div><div class='add'>+			      l2addr-&gt;node.addr, l2addr-&gt;index);</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;mpfs-&gt;lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_mpfs_disable(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_mpfs *mpfs = dev-&gt;priv.mpfs;</div><div class='add'>+	struct l2table_node *l2addr;</div><div class='add'>+	struct hlist_node *n;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!mpfs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mpfs-&gt;lock);</div><div class='add'>+	if (!mpfs-&gt;enabled)</div><div class='add'>+		goto unlock;</div><div class='add'>+	mlx5_mpfs_foreach(l2addr, n, mpfs, i) {</div><div class='add'>+		if (l2addr-&gt;index &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+		del_l2table_entry_cmd(dev, l2addr-&gt;index);</div><div class='add'>+		free_l2table_index(mpfs, l2addr-&gt;index);</div><div class='add'>+		mlx5_core_dbg(dev, "MPFS entry %pM, deleted @index (%d)\n",</div><div class='add'>+			      l2addr-&gt;node.addr, l2addr-&gt;index);</div><div class='add'>+		l2addr-&gt;index = -1;</div><div class='add'>+	}</div><div class='add'>+	mpfs-&gt;enabled = false;</div><div class='add'>+	mlx5_core_dbg(dev, "MPFS disabled\n");</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;mpfs-&gt;lock);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.h b/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.h<br/>index 4a293542a7aa..9c63838ce1f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.h</a></div><div class='hunk'>@@ -45,6 +45,10 @@ struct l2addr_node {</div><div class='ctx'> 	u8                addr[ETH_ALEN];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define mlx5_mpfs_foreach(hs, tmp, mpfs, i) \</div><div class='add'>+	for (i = 0; i &lt; MLX5_L2_ADDR_HASH_SIZE; i++) \</div><div class='add'>+		hlist_for_each_entry_safe(hs, tmp, &amp;(mpfs)-&gt;hash[i], node.hlist)</div><div class='add'>+</div><div class='ctx'> #define for_each_l2hash_node(hn, tmp, hash, i) \</div><div class='ctx'> 	for (i = 0; i &lt; MLX5_L2_ADDR_HASH_SIZE; i++) \</div><div class='ctx'> 		hlist_for_each_entry_safe(hn, tmp, &amp;(hash)[i], hlist)</div><div class='hunk'>@@ -82,11 +86,16 @@ struct l2addr_node {</div><div class='ctx'> })</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MLX5_MPFS</div><div class='add'>+struct mlx5_core_dev;</div><div class='ctx'> int  mlx5_mpfs_init(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_mpfs_cleanup(struct mlx5_core_dev *dev);</div><div class='add'>+int mlx5_mpfs_enable(struct mlx5_core_dev *dev);</div><div class='add'>+void mlx5_mpfs_disable(struct mlx5_core_dev *dev);</div><div class='ctx'> #else /* #ifndef CONFIG_MLX5_MPFS */</div><div class='ctx'> static inline int  mlx5_mpfs_init(struct mlx5_core_dev *dev) { return 0; }</div><div class='ctx'> static inline void mlx5_mpfs_cleanup(struct mlx5_core_dev *dev) {}</div><div class='add'>+static inline int mlx5_mpfs_enable(struct mlx5_core_dev *dev) { return 0; }</div><div class='add'>+static inline void mlx5_mpfs_disable(struct mlx5_core_dev *dev) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c<br/>new file mode 100644<br/>index 000000000000..19bb620b7436<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c</a></div><div class='hunk'>@@ -0,0 +1,799 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2024, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#include "nv_param.h"</div><div class='add'>+#include "mlx5_core.h"</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	MLX5_CLASS_0_CTRL_ID_NV_GLOBAL_PCI_CONF               = 0x80,</div><div class='add'>+	MLX5_CLASS_0_CTRL_ID_NV_GLOBAL_PCI_CAP                = 0x81,</div><div class='add'>+	MLX5_CLASS_0_CTRL_ID_NV_SW_OFFLOAD_CONFIG             = 0x10a,</div><div class='add'>+	MLX5_CLASS_0_CTRL_ID_NV_SW_OFFLOAD_CAP                = 0x10b,</div><div class='add'>+	MLX5_CLASS_0_CTRL_ID_NV_SW_ACCELERATE_CONF            = 0x11d,</div><div class='add'>+</div><div class='add'>+	MLX5_CLASS_3_CTRL_ID_NV_PF_PCI_CONF                   = 0x80,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_configuration_item_type_class_global_bits {</div><div class='add'>+	u8         type_class[0x8];</div><div class='add'>+	u8         parameter_index[0x18];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_configuration_item_type_class_per_host_pf_bits {</div><div class='add'>+	u8         type_class[0x8];</div><div class='add'>+	u8         pf_index[0x6];</div><div class='add'>+	u8         pci_bus_index[0x8];</div><div class='add'>+	u8         parameter_index[0xa];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union mlx5_ifc_config_item_type_auto_bits {</div><div class='add'>+	struct mlx5_ifc_configuration_item_type_class_global_bits</div><div class='add'>+				configuration_item_type_class_global;</div><div class='add'>+	struct mlx5_ifc_configuration_item_type_class_per_host_pf_bits</div><div class='add'>+				configuration_item_type_class_per_host_pf;</div><div class='add'>+	u8 reserved_at_0[0x20];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	MLX5_ACCESS_MODE_NEXT = 0,</div><div class='add'>+	MLX5_ACCESS_MODE_CURRENT,</div><div class='add'>+	MLX5_ACCESS_MODE_DEFAULT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_config_item_bits {</div><div class='add'>+	u8         valid[0x2];</div><div class='add'>+	u8         priority[0x2];</div><div class='add'>+	u8         header_type[0x2];</div><div class='add'>+	u8         ovr_en[0x1];</div><div class='add'>+	u8         rd_en[0x1];</div><div class='add'>+	u8         access_mode[0x2];</div><div class='add'>+	u8         reserved_at_a[0x1];</div><div class='add'>+	u8         writer_id[0x5];</div><div class='add'>+	u8         version[0x4];</div><div class='add'>+	u8         reserved_at_14[0x2];</div><div class='add'>+	u8         host_id_valid[0x1];</div><div class='add'>+	u8         length[0x9];</div><div class='add'>+</div><div class='add'>+	union mlx5_ifc_config_item_type_auto_bits type;</div><div class='add'>+</div><div class='add'>+	u8         reserved_at_40[0x10];</div><div class='add'>+	u8         crc16[0x10];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_mnvda_reg_bits {</div><div class='add'>+	struct mlx5_ifc_config_item_bits configuration_item_header;</div><div class='add'>+</div><div class='add'>+	u8         configuration_item_data[64][0x20];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_nv_global_pci_conf_bits {</div><div class='add'>+	u8         sriov_valid[0x1];</div><div class='add'>+	u8         reserved_at_1[0x10];</div><div class='add'>+	u8         per_pf_total_vf[0x1];</div><div class='add'>+	u8         reserved_at_12[0xe];</div><div class='add'>+</div><div class='add'>+	u8         sriov_en[0x1];</div><div class='add'>+	u8         reserved_at_21[0xf];</div><div class='add'>+	u8         total_vfs[0x10];</div><div class='add'>+</div><div class='add'>+	u8         reserved_at_40[0x20];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_nv_global_pci_cap_bits {</div><div class='add'>+	u8         max_vfs_per_pf_valid[0x1];</div><div class='add'>+	u8         reserved_at_1[0x13];</div><div class='add'>+	u8         per_pf_total_vf_supported[0x1];</div><div class='add'>+	u8         reserved_at_15[0xb];</div><div class='add'>+</div><div class='add'>+	u8         sriov_support[0x1];</div><div class='add'>+	u8         reserved_at_21[0xf];</div><div class='add'>+	u8         max_vfs_per_pf[0x10];</div><div class='add'>+</div><div class='add'>+	u8         reserved_at_40[0x60];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_nv_pf_pci_conf_bits {</div><div class='add'>+	u8         reserved_at_0[0x9];</div><div class='add'>+	u8         pf_total_vf_en[0x1];</div><div class='add'>+	u8         reserved_at_a[0x16];</div><div class='add'>+</div><div class='add'>+	u8         reserved_at_20[0x20];</div><div class='add'>+</div><div class='add'>+	u8         reserved_at_40[0x10];</div><div class='add'>+	u8         total_vf[0x10];</div><div class='add'>+</div><div class='add'>+	u8         reserved_at_60[0x20];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_nv_sw_offload_conf_bits {</div><div class='add'>+	u8         ip_over_vxlan_port[0x10];</div><div class='add'>+	u8         tunnel_ecn_copy_offload_disable[0x1];</div><div class='add'>+	u8         pci_atomic_mode[0x3];</div><div class='add'>+	u8         sr_enable[0x1];</div><div class='add'>+	u8         ptp_cyc2realtime[0x1];</div><div class='add'>+	u8         vector_calc_disable[0x1];</div><div class='add'>+	u8         uctx_en[0x1];</div><div class='add'>+	u8         prio_tag_required_en[0x1];</div><div class='add'>+	u8         esw_fdb_ipv4_ttl_modify_enable[0x1];</div><div class='add'>+	u8         mkey_by_name[0x1];</div><div class='add'>+	u8         ip_over_vxlan_en[0x1];</div><div class='add'>+	u8         one_qp_per_recovery[0x1];</div><div class='add'>+	u8         cqe_compression[0x3];</div><div class='add'>+	u8         tunnel_udp_entropy_proto_disable[0x1];</div><div class='add'>+	u8         reserved_at_21[0x1];</div><div class='add'>+	u8         ar_enable[0x1];</div><div class='add'>+	u8         log_max_outstanding_wqe[0x5];</div><div class='add'>+	u8         vf_migration[0x2];</div><div class='add'>+	u8         log_tx_psn_win[0x6];</div><div class='add'>+	u8         lro_log_timeout3[0x4];</div><div class='add'>+	u8         lro_log_timeout2[0x4];</div><div class='add'>+	u8         lro_log_timeout1[0x4];</div><div class='add'>+	u8         lro_log_timeout0[0x4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_nv_sw_offload_cap_bits {</div><div class='add'>+	u8         reserved_at_0[0x19];</div><div class='add'>+	u8         swp_l4_csum_mode_l4_only[0x1];</div><div class='add'>+	u8         reserved_at_1a[0x6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_nv_sw_accelerate_conf_bits {</div><div class='add'>+	u8         swp_l4_csum_mode[0x2];</div><div class='add'>+	u8         reserved_at_2[0x3e];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MNVDA_HDR_SZ \</div><div class='add'>+	(MLX5_ST_SZ_BYTES(mnvda_reg) - \</div><div class='add'>+	 MLX5_BYTE_OFF(mnvda_reg, configuration_item_data))</div><div class='add'>+</div><div class='add'>+#define MLX5_SET_CFG_ITEM_TYPE(_cls_name, _mnvda_ptr, _field, _val) \</div><div class='add'>+	MLX5_SET(mnvda_reg, _mnvda_ptr, \</div><div class='add'>+		 configuration_item_header.type.configuration_item_type_class_##_cls_name._field, \</div><div class='add'>+		 _val)</div><div class='add'>+</div><div class='add'>+#define MLX5_SET_CFG_HDR_LEN(_mnvda_ptr, _cls_name) \</div><div class='add'>+	MLX5_SET(mnvda_reg, _mnvda_ptr, configuration_item_header.length, \</div><div class='add'>+		 MLX5_ST_SZ_BYTES(_cls_name))</div><div class='add'>+</div><div class='add'>+#define MLX5_GET_CFG_HDR_LEN(_mnvda_ptr) \</div><div class='add'>+	MLX5_GET(mnvda_reg, _mnvda_ptr, configuration_item_header.length)</div><div class='add'>+</div><div class='add'>+static int mlx5_nv_param_read(struct mlx5_core_dev *dev, void *mnvda,</div><div class='add'>+			      size_t len)</div><div class='add'>+{</div><div class='add'>+	u32 param_idx, type_class;</div><div class='add'>+	u32 header_len;</div><div class='add'>+	void *cls_ptr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(len &gt; MLX5_ST_SZ_BYTES(mnvda_reg)) || len &lt; MNVDA_HDR_SZ)</div><div class='add'>+		return -EINVAL; /* A caller bug */</div><div class='add'>+</div><div class='add'>+	err = mlx5_core_access_reg(dev, mnvda, len, mnvda, len, MLX5_REG_MNVDA,</div><div class='add'>+				   0, 0);</div><div class='add'>+	if (!err)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	cls_ptr = MLX5_ADDR_OF(mnvda_reg, mnvda,</div><div class='add'>+			       configuration_item_header.type.configuration_item_type_class_global);</div><div class='add'>+</div><div class='add'>+	type_class = MLX5_GET(configuration_item_type_class_global, cls_ptr,</div><div class='add'>+			      type_class);</div><div class='add'>+	param_idx = MLX5_GET(configuration_item_type_class_global, cls_ptr,</div><div class='add'>+			     parameter_index);</div><div class='add'>+	header_len = MLX5_GET_CFG_HDR_LEN(mnvda);</div><div class='add'>+</div><div class='add'>+	mlx5_core_warn(dev, "Failed to read mnvda reg: type_class 0x%x, param_idx 0x%x, header_len %u, err %d\n",</div><div class='add'>+		       type_class, param_idx, header_len, err);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_nv_param_write(struct mlx5_core_dev *dev, void *mnvda,</div><div class='add'>+			       size_t len)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON(len &gt; MLX5_ST_SZ_BYTES(mnvda_reg)) || len &lt; MNVDA_HDR_SZ)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(MLX5_GET_CFG_HDR_LEN(mnvda) == 0))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return mlx5_core_access_reg(dev, mnvda, len, mnvda, len, MLX5_REG_MNVDA,</div><div class='add'>+				    0, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_nv_param_read_sw_offload_conf(struct mlx5_core_dev *dev, void *mnvda,</div><div class='add'>+				   size_t len)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(global, mnvda, type_class, 0);</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(global, mnvda, parameter_index,</div><div class='add'>+			       MLX5_CLASS_0_CTRL_ID_NV_SW_OFFLOAD_CONFIG);</div><div class='add'>+	MLX5_SET_CFG_HDR_LEN(mnvda, nv_sw_offload_conf);</div><div class='add'>+</div><div class='add'>+	return mlx5_nv_param_read(dev, mnvda, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_nv_param_read_sw_offload_cap(struct mlx5_core_dev *dev, void *mnvda,</div><div class='add'>+				  size_t len)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(global, mnvda, type_class, 0);</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(global, mnvda, parameter_index,</div><div class='add'>+			       MLX5_CLASS_0_CTRL_ID_NV_SW_OFFLOAD_CAP);</div><div class='add'>+	MLX5_SET_CFG_HDR_LEN(mnvda, nv_sw_offload_cap);</div><div class='add'>+</div><div class='add'>+	return mlx5_nv_param_read(dev, mnvda, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_nv_param_read_sw_accelerate_conf(struct mlx5_core_dev *dev, void *mnvda,</div><div class='add'>+				      size_t len, int access_mode)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(global, mnvda, type_class, 0);</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(global, mnvda, parameter_index,</div><div class='add'>+			       MLX5_CLASS_0_CTRL_ID_NV_SW_ACCELERATE_CONF);</div><div class='add'>+	MLX5_SET_CFG_HDR_LEN(mnvda, nv_sw_accelerate_conf);</div><div class='add'>+	MLX5_SET(mnvda_reg, mnvda, configuration_item_header.access_mode,</div><div class='add'>+		 access_mode);</div><div class='add'>+</div><div class='add'>+	return mlx5_nv_param_read(dev, mnvda, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *const</div><div class='add'>+	cqe_compress_str[] = { "balanced", "aggressive" };</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_nv_param_devlink_cqe_compress_get(struct devlink *devlink, u32 id,</div><div class='add'>+				       struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	u32 mnvda[MLX5_ST_SZ_DW(mnvda_reg)] = {};</div><div class='add'>+	u8 value = U8_MAX;</div><div class='add'>+	void *data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_read_sw_offload_conf(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+	value = MLX5_GET(nv_sw_offload_conf, data, cqe_compression);</div><div class='add'>+</div><div class='add'>+	if (value &gt;= ARRAY_SIZE(cqe_compress_str))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	strscpy(ctx-&gt;val.vstr, cqe_compress_str[value], sizeof(ctx-&gt;val.vstr));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_nv_param_devlink_cqe_compress_validate(struct devlink *devlink, u32 id,</div><div class='add'>+					    union devlink_param_value val,</div><div class='add'>+					    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(cqe_compress_str); i++) {</div><div class='add'>+		if (!strcmp(val.vstr, cqe_compress_str[i]))</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+			   "Invalid value, supported values are balanced/aggressive");</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_nv_param_devlink_cqe_compress_set(struct devlink *devlink, u32 id,</div><div class='add'>+				       struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	u32 mnvda[MLX5_ST_SZ_DW(mnvda_reg)] = {};</div><div class='add'>+	int err = 0;</div><div class='add'>+	void *data;</div><div class='add'>+	u8 value;</div><div class='add'>+</div><div class='add'>+	if (!strcmp(ctx-&gt;val.vstr, "aggressive"))</div><div class='add'>+		value = 1;</div><div class='add'>+	else /* balanced: can't be anything else already validated above */</div><div class='add'>+		value = 0;</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_read_sw_offload_conf(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to read sw_offload_conf mnvda reg");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+	MLX5_SET(nv_sw_offload_conf, data, cqe_compression, value);</div><div class='add'>+</div><div class='add'>+	return mlx5_nv_param_write(dev, mnvda, sizeof(mnvda));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum swp_l4_csum_mode {</div><div class='add'>+	SWP_L4_CSUM_MODE_DEFAULT = 0,</div><div class='add'>+	SWP_L4_CSUM_MODE_FULL_CSUM = 1,</div><div class='add'>+	SWP_L4_CSUM_MODE_L4_ONLY = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const</div><div class='add'>+	swp_l4_csum_mode_str[] = { "default", "full_csum", "l4_only" };</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_swp_l4_csum_mode_get(struct devlink *devlink, u32 id,</div><div class='add'>+			  int access_mode, u8 *value,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	u32 mnvda[MLX5_ST_SZ_DW(mnvda_reg)] = {};</div><div class='add'>+	void *data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_read_sw_accelerate_conf(dev, mnvda, sizeof(mnvda),</div><div class='add'>+						    access_mode);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to read sw_accelerate_conf mnvda reg");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+	*value = MLX5_GET(nv_sw_accelerate_conf, data, swp_l4_csum_mode);</div><div class='add'>+</div><div class='add'>+	if (*value &gt;= ARRAY_SIZE(swp_l4_csum_mode_str)) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "Invalid swp_l4_csum_mode value %u read from device",</div><div class='add'>+				       *value);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_devlink_swp_l4_csum_mode_get(struct devlink *devlink, u32 id,</div><div class='add'>+				  struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u8 value;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_swp_l4_csum_mode_get(devlink, id, MLX5_ACCESS_MODE_NEXT,</div><div class='add'>+					&amp;value, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	strscpy(ctx-&gt;val.vstr, swp_l4_csum_mode_str[value],</div><div class='add'>+		sizeof(ctx-&gt;val.vstr));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_devlink_swp_l4_csum_mode_validate(struct devlink *devlink, u32 id,</div><div class='add'>+				       union devlink_param_value val,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	u32 cap[MLX5_ST_SZ_DW(mnvda_reg)] = {};</div><div class='add'>+	void *data;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(swp_l4_csum_mode_str); i++) {</div><div class='add'>+		if (!strcmp(val.vstr, swp_l4_csum_mode_str[i]))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i &gt;= ARRAY_SIZE(swp_l4_csum_mode_str) ||</div><div class='add'>+	    i == SWP_L4_CSUM_MODE_DEFAULT) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Invalid value, supported values are full_csum/l4_only");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == SWP_L4_CSUM_MODE_L4_ONLY) {</div><div class='add'>+		err = mlx5_nv_param_read_sw_offload_cap(dev, cap, sizeof(cap));</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Failed to read sw_offload_cap");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		data = MLX5_ADDR_OF(mnvda_reg, cap, configuration_item_data);</div><div class='add'>+		if (!MLX5_GET(nv_sw_offload_cap, data, swp_l4_csum_mode_l4_only)) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "l4_only mode is not supported on this device");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_swp_l4_csum_mode_set(struct devlink *devlink, u32 id, u8 value,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	u32 mnvda[MLX5_ST_SZ_DW(mnvda_reg)] = {};</div><div class='add'>+	void *data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_read_sw_accelerate_conf(dev, mnvda, sizeof(mnvda),</div><div class='add'>+						    MLX5_ACCESS_MODE_NEXT);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to read sw_accelerate_conf mnvda reg");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+	MLX5_SET(nv_sw_accelerate_conf, data, swp_l4_csum_mode, value);</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_write(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to write sw_accelerate_conf mnvda reg");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_devlink_swp_l4_csum_mode_set(struct devlink *devlink, u32 id,</div><div class='add'>+				  struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u8 value;</div><div class='add'>+</div><div class='add'>+	if (!strcmp(ctx-&gt;val.vstr, "full_csum"))</div><div class='add'>+		value = SWP_L4_CSUM_MODE_FULL_CSUM;</div><div class='add'>+	else</div><div class='add'>+		value = SWP_L4_CSUM_MODE_L4_ONLY;</div><div class='add'>+</div><div class='add'>+	return mlx5_swp_l4_csum_mode_set(devlink, id, value, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_devlink_swp_l4_csum_mode_get_default(struct devlink *devlink, u32 id,</div><div class='add'>+					  struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u8 value;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_swp_l4_csum_mode_get(devlink, id, MLX5_ACCESS_MODE_DEFAULT,</div><div class='add'>+					&amp;value, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	strscpy(ctx-&gt;val.vstr, swp_l4_csum_mode_str[value],</div><div class='add'>+		sizeof(ctx-&gt;val.vstr));</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_devlink_swp_l4_csum_mode_set_default(struct devlink *devlink, u32 id,</div><div class='add'>+					  enum devlink_param_cmode cmode,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u8 value;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_swp_l4_csum_mode_get(devlink, id, MLX5_ACCESS_MODE_DEFAULT,</div><div class='add'>+					&amp;value, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mlx5_swp_l4_csum_mode_set(devlink, id, value, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_nv_param_read_global_pci_conf(struct mlx5_core_dev *dev,</div><div class='add'>+					      void *mnvda, size_t len)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(global, mnvda, type_class, 0);</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(global, mnvda, parameter_index,</div><div class='add'>+			       MLX5_CLASS_0_CTRL_ID_NV_GLOBAL_PCI_CONF);</div><div class='add'>+	MLX5_SET_CFG_HDR_LEN(mnvda, nv_global_pci_conf);</div><div class='add'>+</div><div class='add'>+	return mlx5_nv_param_read(dev, mnvda, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_nv_param_read_global_pci_cap(struct mlx5_core_dev *dev,</div><div class='add'>+					     void *mnvda, size_t len)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(global, mnvda, type_class, 0);</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(global, mnvda, parameter_index,</div><div class='add'>+			       MLX5_CLASS_0_CTRL_ID_NV_GLOBAL_PCI_CAP);</div><div class='add'>+	MLX5_SET_CFG_HDR_LEN(mnvda, nv_global_pci_cap);</div><div class='add'>+</div><div class='add'>+	return mlx5_nv_param_read(dev, mnvda, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_nv_param_read_per_host_pf_conf(struct mlx5_core_dev *dev,</div><div class='add'>+					       void *mnvda, size_t len)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(per_host_pf, mnvda, type_class, 3);</div><div class='add'>+	MLX5_SET_CFG_ITEM_TYPE(per_host_pf, mnvda, parameter_index,</div><div class='add'>+			       MLX5_CLASS_3_CTRL_ID_NV_PF_PCI_CONF);</div><div class='add'>+	MLX5_SET_CFG_HDR_LEN(mnvda, nv_pf_pci_conf);</div><div class='add'>+</div><div class='add'>+	return mlx5_nv_param_read(dev, mnvda, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_devlink_enable_sriov_get(struct devlink *devlink, u32 id,</div><div class='add'>+					 struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	u32 mnvda[MLX5_ST_SZ_DW(mnvda_reg)] = {};</div><div class='add'>+	bool sriov_en = false;</div><div class='add'>+	void *data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_read_global_pci_cap(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+	if (!MLX5_GET(nv_global_pci_cap, data, sriov_support)) {</div><div class='add'>+		ctx-&gt;val.vbool = false;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(mnvda, 0, sizeof(mnvda));</div><div class='add'>+	err = mlx5_nv_param_read_global_pci_conf(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+	sriov_en = MLX5_GET(nv_global_pci_conf, data, sriov_en);</div><div class='add'>+	if (!MLX5_GET(nv_global_pci_conf, data, per_pf_total_vf)) {</div><div class='add'>+		ctx-&gt;val.vbool = sriov_en;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* SRIOV is per PF */</div><div class='add'>+	memset(mnvda, 0, sizeof(mnvda));</div><div class='add'>+	err = mlx5_nv_param_read_per_host_pf_conf(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+	ctx-&gt;val.vbool = sriov_en &amp;&amp;</div><div class='add'>+			 MLX5_GET(nv_pf_pci_conf, data, pf_total_vf_en);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_devlink_enable_sriov_set(struct devlink *devlink, u32 id,</div><div class='add'>+					 struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	u32 mnvda[MLX5_ST_SZ_DW(mnvda_reg)] = {};</div><div class='add'>+	bool per_pf_support;</div><div class='add'>+	void *cap, *data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_read_global_pci_cap(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to read global PCI capability");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cap = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+	per_pf_support = MLX5_GET(nv_global_pci_cap, cap,</div><div class='add'>+				  per_pf_total_vf_supported);</div><div class='add'>+</div><div class='add'>+	if (!MLX5_GET(nv_global_pci_cap, cap, sriov_support)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "SRIOV is not supported on this device");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!per_pf_support) {</div><div class='add'>+		/* We don't allow global SRIOV setting on per PF devlink */</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "SRIOV is not per PF on this device");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(mnvda, 0, sizeof(mnvda));</div><div class='add'>+	err = mlx5_nv_param_read_global_pci_conf(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Unable to read global PCI configuration");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+</div><div class='add'>+	/* setup per PF sriov mode */</div><div class='add'>+	MLX5_SET(nv_global_pci_conf, data, sriov_valid, 1);</div><div class='add'>+	MLX5_SET(nv_global_pci_conf, data, sriov_en, 1);</div><div class='add'>+	MLX5_SET(nv_global_pci_conf, data, per_pf_total_vf, 1);</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_write(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Unable to write global PCI configuration");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enable/disable sriov on this PF */</div><div class='add'>+	memset(mnvda, 0, sizeof(mnvda));</div><div class='add'>+	err = mlx5_nv_param_read_per_host_pf_conf(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Unable to read per host PF configuration");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	MLX5_SET(nv_pf_pci_conf, data, pf_total_vf_en, ctx-&gt;val.vbool);</div><div class='add'>+	return mlx5_nv_param_write(dev, mnvda, sizeof(mnvda));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_devlink_total_vfs_get(struct devlink *devlink, u32 id,</div><div class='add'>+				      struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	u32 mnvda[MLX5_ST_SZ_DW(mnvda_reg)] = {};</div><div class='add'>+	void *data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_read_global_pci_cap(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!MLX5_GET(nv_global_pci_cap, data, sriov_support)) {</div><div class='add'>+		ctx-&gt;val.vu32 = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(mnvda, 0, sizeof(mnvda));</div><div class='add'>+	err = mlx5_nv_param_read_global_pci_conf(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!MLX5_GET(nv_global_pci_conf, data, per_pf_total_vf)) {</div><div class='add'>+		ctx-&gt;val.vu32 = MLX5_GET(nv_global_pci_conf, data, total_vfs);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* SRIOV is per PF */</div><div class='add'>+	memset(mnvda, 0, sizeof(mnvda));</div><div class='add'>+	err = mlx5_nv_param_read_per_host_pf_conf(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;val.vu32 = MLX5_GET(nv_pf_pci_conf, data, total_vf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_devlink_total_vfs_set(struct devlink *devlink, u32 id,</div><div class='add'>+				      struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	u32 mnvda[MLX5_ST_SZ_DW(mnvda_reg)];</div><div class='add'>+	void *data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_read_global_pci_cap(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to read global pci cap");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+	if (!MLX5_GET(nv_global_pci_cap, data, sriov_support)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Not configurable on this device");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!MLX5_GET(nv_global_pci_cap, data, per_pf_total_vf_supported)) {</div><div class='add'>+		/* We don't allow global SRIOV setting on per PF devlink */</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "SRIOV is not per PF on this device");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(mnvda, 0, sizeof(mnvda));</div><div class='add'>+	err = mlx5_nv_param_read_global_pci_conf(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	MLX5_SET(nv_global_pci_conf, data, sriov_valid, 1);</div><div class='add'>+	MLX5_SET(nv_global_pci_conf, data, per_pf_total_vf, 1);</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_write(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	memset(mnvda, 0, sizeof(mnvda));</div><div class='add'>+	err = mlx5_nv_param_read_per_host_pf_conf(dev, mnvda, sizeof(mnvda));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, mnvda, configuration_item_data);</div><div class='add'>+	MLX5_SET(nv_pf_pci_conf, data, total_vf, ctx-&gt;val.vu32);</div><div class='add'>+	return mlx5_nv_param_write(dev, mnvda, sizeof(mnvda));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_devlink_total_vfs_validate(struct devlink *devlink, u32 id,</div><div class='add'>+					   union devlink_param_value val,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_core_dev *dev = devlink_priv(devlink);</div><div class='add'>+	u32 cap[MLX5_ST_SZ_DW(mnvda_reg)];</div><div class='add'>+	void *data;</div><div class='add'>+	u16 max;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	data = MLX5_ADDR_OF(mnvda_reg, cap, configuration_item_data);</div><div class='add'>+</div><div class='add'>+	err = mlx5_nv_param_read_global_pci_cap(dev, cap, sizeof(cap));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!MLX5_GET(nv_global_pci_cap, data, max_vfs_per_pf_valid))</div><div class='add'>+		return 0; /* optimistic, but set might fail later */</div><div class='add'>+</div><div class='add'>+	max = MLX5_GET(nv_global_pci_cap, data, max_vfs_per_pf);</div><div class='add'>+	if (val.vu16 &gt; max) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "Max allowed by device is %u", max);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_param mlx5_nv_param_devlink_params[] = {</div><div class='add'>+	DEVLINK_PARAM_GENERIC(ENABLE_SRIOV, BIT(DEVLINK_PARAM_CMODE_PERMANENT),</div><div class='add'>+			      mlx5_devlink_enable_sriov_get,</div><div class='add'>+			      mlx5_devlink_enable_sriov_set, NULL),</div><div class='add'>+	DEVLINK_PARAM_GENERIC(TOTAL_VFS, BIT(DEVLINK_PARAM_CMODE_PERMANENT),</div><div class='add'>+			      mlx5_devlink_total_vfs_get,</div><div class='add'>+			      mlx5_devlink_total_vfs_set,</div><div class='add'>+			      mlx5_devlink_total_vfs_validate),</div><div class='add'>+	DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_CQE_COMPRESSION_TYPE,</div><div class='add'>+			     "cqe_compress_type", DEVLINK_PARAM_TYPE_STRING,</div><div class='add'>+			     BIT(DEVLINK_PARAM_CMODE_PERMANENT),</div><div class='add'>+			     mlx5_nv_param_devlink_cqe_compress_get,</div><div class='add'>+			     mlx5_nv_param_devlink_cqe_compress_set,</div><div class='add'>+			     mlx5_nv_param_devlink_cqe_compress_validate),</div><div class='add'>+	DEVLINK_PARAM_DRIVER_WITH_DEFAULTS(MLX5_DEVLINK_PARAM_ID_SWP_L4_CSUM_MODE,</div><div class='add'>+					   "swp_l4_csum_mode", DEVLINK_PARAM_TYPE_STRING,</div><div class='add'>+					   BIT(DEVLINK_PARAM_CMODE_PERMANENT),</div><div class='add'>+					   mlx5_devlink_swp_l4_csum_mode_get,</div><div class='add'>+					   mlx5_devlink_swp_l4_csum_mode_set,</div><div class='add'>+					   mlx5_devlink_swp_l4_csum_mode_validate,</div><div class='add'>+					   mlx5_devlink_swp_l4_csum_mode_get_default,</div><div class='add'>+					   mlx5_devlink_swp_l4_csum_mode_set_default),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mlx5_nv_param_register_dl_params(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	if (!mlx5_core_is_pf(devlink_priv(devlink)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return devl_params_register(devlink, mlx5_nv_param_devlink_params,</div><div class='add'>+				    ARRAY_SIZE(mlx5_nv_param_devlink_params));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_nv_param_unregister_dl_params(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	if (!mlx5_core_is_pf(devlink_priv(devlink)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	devl_params_unregister(devlink, mlx5_nv_param_devlink_params,</div><div class='add'>+			       ARRAY_SIZE(mlx5_nv_param_devlink_params));</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.h b/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.h<br/>new file mode 100644<br/>index 000000000000..9f4922ff7745<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.h</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2024, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef __MLX5_NV_PARAM_H</div><div class='add'>+#define __MLX5_NV_PARAM_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mlx5/driver.h&gt;</div><div class='add'>+#include "devlink.h"</div><div class='add'>+</div><div class='add'>+int mlx5_nv_param_register_dl_params(struct devlink *devlink);</div><div class='add'>+void mlx5_nv_param_unregister_dl_params(struct devlink *devlink);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c<br/>index eeb0b7ea05f1..8e17daae48af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c</a></div><div class='hunk'>@@ -210,15 +210,19 @@ static void sd_cleanup(struct mlx5_core_dev *dev)</div><div class='ctx'> static int sd_register(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_devcom_comp_dev *devcom, *pos;</div><div class='add'>+	struct mlx5_devcom_match_attr attr = {};</div><div class='ctx'> 	struct mlx5_core_dev *peer, *primary;</div><div class='ctx'> 	struct mlx5_sd *sd, *primary_sd;</div><div class='ctx'> 	int err, i;</div><div class='ctx'> </div><div class='ctx'> 	sd = mlx5_get_sd(dev);</div><div class='add'>+	attr.key.val = sd-&gt;group_id;</div><div class='add'>+	attr.flags = MLX5_DEVCOM_MATCH_FLAGS_NS;</div><div class='add'>+	attr.net = mlx5_core_net(dev);</div><div class='ctx'> 	devcom = mlx5_devcom_register_component(dev-&gt;priv.devc, MLX5_DEVCOM_SD_GROUP,</div><div class='del'>-						sd-&gt;group_id, NULL, dev);</div><div class='del'>-	if (IS_ERR(devcom))</div><div class='del'>-		return PTR_ERR(devcom);</div><div class='add'>+						&amp;attr, NULL, dev);</div><div class='add'>+	if (!devcom)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	sd-&gt;devcom = devcom;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.h b/drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.h<br/>index 452d0df339ac..404f3d4b6380 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.h</a></div><div class='hunk'>@@ -4,8 +4,8 @@</div><div class='ctx'> #ifndef __MLX5_LIB_SMFS_H__</div><div class='ctx'> #define __MLX5_LIB_SMFS_H__</div><div class='ctx'> </div><div class='del'>-#include "steering/mlx5dr.h"</div><div class='del'>-#include "steering/dr_types.h"</div><div class='add'>+#include "steering/sws/mlx5dr.h"</div><div class='add'>+#include "steering/sws/dr_types.h"</div><div class='ctx'> </div><div class='ctx'> struct mlx5dr_matcher *</div><div class='ctx'> mlx5_smfs_matcher_create(struct mlx5dr_table *table, u32 priority, struct mlx5_flow_spec *spec);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c<br/>new file mode 100644<br/>index 000000000000..ef06fe6cbb51<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/st.c</a></div><div class='hunk'>@@ -0,0 +1,185 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mlx5/driver.h&gt;</div><div class='add'>+#include &lt;linux/mlx5/device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mlx5_core.h"</div><div class='add'>+#include "lib/mlx5.h"</div><div class='add'>+</div><div class='add'>+struct mlx5_st_idx_data {</div><div class='add'>+	refcount_t usecount;</div><div class='add'>+	u16 tag;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_st {</div><div class='add'>+	/* serialize access upon alloc/free flows */</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	struct xa_limit index_limit;</div><div class='add'>+	struct xarray idx_xa; /* key == index, value == struct mlx5_st_idx_data */</div><div class='add'>+	u8 direct_mode : 1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_st *mlx5_st_create(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = dev-&gt;pdev;</div><div class='add'>+	struct mlx5_st *st;</div><div class='add'>+	u8 direct_mode = 0;</div><div class='add'>+	u16 num_entries;</div><div class='add'>+	u32 tbl_loc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_GEN(dev, mkey_pcie_tph))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MLX5_SF</div><div class='add'>+	if (mlx5_core_is_sf(dev))</div><div class='add'>+		return dev-&gt;priv.parent_mdev-&gt;st;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Checking whether the device is capable */</div><div class='add'>+	if (!pdev-&gt;tph_cap)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	tbl_loc = pcie_tph_get_st_table_loc(pdev);</div><div class='add'>+	if (tbl_loc == PCI_TPH_LOC_NONE)</div><div class='add'>+		direct_mode = 1;</div><div class='add'>+</div><div class='add'>+	if (!direct_mode) {</div><div class='add'>+		num_entries = pcie_tph_get_st_table_size(pdev);</div><div class='add'>+		/* We need a reserved entry for non TPH cases */</div><div class='add'>+		if (num_entries &lt; 2)</div><div class='add'>+			return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The OS doesn't support ST */</div><div class='add'>+	ret = pcie_enable_tph(pdev, PCI_TPH_ST_DS_MODE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	st = kzalloc(sizeof(*st), GFP_KERNEL);</div><div class='add'>+	if (!st)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;st-&gt;lock);</div><div class='add'>+	xa_init_flags(&amp;st-&gt;idx_xa, XA_FLAGS_ALLOC);</div><div class='add'>+	st-&gt;direct_mode = direct_mode;</div><div class='add'>+	if (st-&gt;direct_mode)</div><div class='add'>+		return st;</div><div class='add'>+</div><div class='add'>+	/* entry 0 is reserved for non TPH cases */</div><div class='add'>+	st-&gt;index_limit.min = MLX5_MKC_PCIE_TPH_NO_STEERING_TAG_INDEX + 1;</div><div class='add'>+	st-&gt;index_limit.max = num_entries - 1;</div><div class='add'>+</div><div class='add'>+	return st;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	pcie_disable_tph(dev-&gt;pdev);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_st_destroy(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_st *st = dev-&gt;st;</div><div class='add'>+</div><div class='add'>+	if (mlx5_core_is_sf(dev) || !st)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pcie_disable_tph(dev-&gt;pdev);</div><div class='add'>+	WARN_ON_ONCE(!xa_empty(&amp;st-&gt;idx_xa));</div><div class='add'>+	kfree(st);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5_st_alloc_index(struct mlx5_core_dev *dev, enum tph_mem_type mem_type,</div><div class='add'>+			unsigned int cpu_uid, u16 *st_index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_st_idx_data *idx_data;</div><div class='add'>+	struct mlx5_st *st = dev-&gt;st;</div><div class='add'>+	unsigned long index;</div><div class='add'>+	u32 xa_id;</div><div class='add'>+	u16 tag;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!st)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ret = pcie_tph_get_cpu_st(dev-&gt;pdev, mem_type, cpu_uid, &amp;tag);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (st-&gt;direct_mode) {</div><div class='add'>+		*st_index = tag;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;st-&gt;lock);</div><div class='add'>+</div><div class='add'>+	xa_for_each(&amp;st-&gt;idx_xa, index, idx_data) {</div><div class='add'>+		if (tag == idx_data-&gt;tag) {</div><div class='add'>+			refcount_inc(&amp;idx_data-&gt;usecount);</div><div class='add'>+			*st_index = index;</div><div class='add'>+			goto end;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idx_data = kzalloc(sizeof(*idx_data), GFP_KERNEL);</div><div class='add'>+	if (!idx_data) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	refcount_set(&amp;idx_data-&gt;usecount, 1);</div><div class='add'>+	idx_data-&gt;tag = tag;</div><div class='add'>+</div><div class='add'>+	ret = xa_alloc(&amp;st-&gt;idx_xa, &amp;xa_id, idx_data, st-&gt;index_limit, GFP_KERNEL);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto clean_idx_data;</div><div class='add'>+</div><div class='add'>+	ret = pcie_tph_set_st_entry(dev-&gt;pdev, xa_id, tag);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto clean_idx_xa;</div><div class='add'>+</div><div class='add'>+	*st_index = xa_id;</div><div class='add'>+	goto end;</div><div class='add'>+</div><div class='add'>+clean_idx_xa:</div><div class='add'>+	xa_erase(&amp;st-&gt;idx_xa, xa_id);</div><div class='add'>+clean_idx_data:</div><div class='add'>+	kfree(idx_data);</div><div class='add'>+end:</div><div class='add'>+	mutex_unlock(&amp;st-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mlx5_st_alloc_index);</div><div class='add'>+</div><div class='add'>+int mlx5_st_dealloc_index(struct mlx5_core_dev *dev, u16 st_index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_st_idx_data *idx_data;</div><div class='add'>+	struct mlx5_st *st = dev-&gt;st;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!st)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (st-&gt;direct_mode)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;st-&gt;lock);</div><div class='add'>+	idx_data = xa_load(&amp;st-&gt;idx_xa, st_index);</div><div class='add'>+	if (WARN_ON_ONCE(!idx_data)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (refcount_dec_and_test(&amp;idx_data-&gt;usecount)) {</div><div class='add'>+		xa_erase(&amp;st-&gt;idx_xa, st_index);</div><div class='add'>+		/* We leave PCI config space as was before, no mkey will refer to it */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	mutex_unlock(&amp;st-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mlx5_st_dealloc_index);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c<br/>index d55e15c1f380..304912637c35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c</a></div><div class='hunk'>@@ -149,7 +149,7 @@ struct mlx5_vxlan *mlx5_vxlan_create(struct mlx5_core_dev *mdev)</div><div class='ctx'> 	struct mlx5_vxlan *vxlan;</div><div class='ctx'> </div><div class='ctx'> 	if (!MLX5_CAP_ETH(mdev, tunnel_stateless_vxlan) || !mlx5_core_is_pf(mdev))</div><div class='del'>-		return ERR_PTR(-ENOTSUPP);</div><div class='add'>+		return ERR_PTR(-EOPNOTSUPP);</div><div class='ctx'> </div><div class='ctx'> 	vxlan = kzalloc(sizeof(*vxlan), GFP_KERNEL);</div><div class='ctx'> 	if (!vxlan)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c<br/>index 220a9ac75c8b..1ab569ce3fcf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/main.c</a></div><div class='hunk'>@@ -368,6 +368,10 @@ int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_ty</div><div class='ctx'> 	u16 opmod = (cap_type &lt;&lt; 1) | (cap_mode &amp; 0x01);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (WARN_ON(!dev-&gt;caps.hca[cap_type]))</div><div class='add'>+		/* this cap_type must be added to mlx5_hca_caps_alloc() */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	memset(in, 0, sizeof(in));</div><div class='ctx'> 	out = kzalloc(out_sz, GFP_KERNEL);</div><div class='ctx'> 	if (!out)</div><div class='hunk'>@@ -549,6 +553,7 @@ EXPORT_SYMBOL(mlx5_is_roce_on);</div><div class='ctx'> </div><div class='ctx'> static int handle_hca_cap_2(struct mlx5_core_dev *dev, void *set_ctx)</div><div class='ctx'> {</div><div class='add'>+	bool do_set = false;</div><div class='ctx'> 	void *set_hca_cap;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -559,17 +564,27 @@ static int handle_hca_cap_2(struct mlx5_core_dev *dev, void *set_ctx)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	if (!MLX5_CAP_GEN_2_MAX(dev, sw_vhca_id_valid) ||</div><div class='del'>-	    !(dev-&gt;priv.sw_vhca_id &gt; 0))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='ctx'> 	set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx,</div><div class='ctx'> 				   capability);</div><div class='ctx'> 	memcpy(set_hca_cap, dev-&gt;caps.hca[MLX5_CAP_GENERAL_2]-&gt;cur,</div><div class='ctx'> 	       MLX5_ST_SZ_BYTES(cmd_hca_cap_2));</div><div class='del'>-	MLX5_SET(cmd_hca_cap_2, set_hca_cap, sw_vhca_id_valid, 1);</div><div class='ctx'> </div><div class='del'>-	return set_caps(dev, set_ctx, MLX5_CAP_GENERAL_2);</div><div class='add'>+	if (MLX5_CAP_GEN_2_MAX(dev, sw_vhca_id_valid) &amp;&amp;</div><div class='add'>+	    dev-&gt;priv.sw_vhca_id &gt; 0) {</div><div class='add'>+		MLX5_SET(cmd_hca_cap_2, set_hca_cap, sw_vhca_id_valid, 1);</div><div class='add'>+		do_set = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (MLX5_CAP_GEN_2_MAX(dev, lag_per_mp_group)) {</div><div class='add'>+		MLX5_SET(cmd_hca_cap_2, set_hca_cap, lag_per_mp_group, 1);</div><div class='add'>+		do_set = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* some FW versions that support querying MLX5_CAP_GENERAL_2</div><div class='add'>+	 * capabilities but don't support setting them.</div><div class='add'>+	 * Skip unnecessary update to hca_cap_2 when no changes were introduced</div><div class='add'>+	 */</div><div class='add'>+	return do_set ? set_caps(dev, set_ctx, MLX5_CAP_GENERAL_2) : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int handle_hca_cap(struct mlx5_core_dev *dev, void *set_ctx)</div><div class='hunk'>@@ -664,6 +679,10 @@ static int handle_hca_cap(struct mlx5_core_dev *dev, void *set_ctx)</div><div class='ctx'> 		MLX5_SET(cmd_hca_cap, set_hca_cap, log_max_current_uc_list,</div><div class='ctx'> 			 ilog2(max_uc_list));</div><div class='ctx'> </div><div class='add'>+	/* enable absolute native port num */</div><div class='add'>+	if (MLX5_CAP_GEN_MAX(dev, abs_native_port_num))</div><div class='add'>+		MLX5_SET(cmd_hca_cap, set_hca_cap, abs_native_port_num, 1);</div><div class='add'>+</div><div class='ctx'> 	return set_caps(dev, set_ctx, MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -941,9 +960,7 @@ static int mlx5_pci_init(struct mlx5_core_dev *dev, struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	mlx5_pci_vsc_init(dev);</div><div class='ctx'> </div><div class='del'>-	err = pci_enable_ptm(pdev, NULL);</div><div class='del'>-	if (err)</div><div class='del'>-		mlx5_core_info(dev, "PTM is not supported by PCIe\n");</div><div class='add'>+	pci_enable_ptm(pdev, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -967,36 +984,13 @@ static void mlx5_pci_close(struct mlx5_core_dev *dev)</div><div class='ctx'> 	mlx5_pci_disable_device(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_register_hca_devcom_comp(struct mlx5_core_dev *dev)</div><div class='del'>-{</div><div class='del'>-	/* This component is use to sync adding core_dev to lag_dev and to sync</div><div class='del'>-	 * changes of mlx5_adev_devices between LAG layer and other layers.</div><div class='del'>-	 */</div><div class='del'>-	if (!mlx5_lag_is_supported(dev))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	dev-&gt;priv.hca_devcom_comp =</div><div class='del'>-		mlx5_devcom_register_component(dev-&gt;priv.devc, MLX5_DEVCOM_HCA_PORTS,</div><div class='del'>-					       mlx5_query_nic_system_image_guid(dev),</div><div class='del'>-					       NULL, dev);</div><div class='del'>-	if (IS_ERR(dev-&gt;priv.hca_devcom_comp))</div><div class='del'>-		mlx5_core_err(dev, "Failed to register devcom HCA component\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mlx5_unregister_hca_devcom_comp(struct mlx5_core_dev *dev)</div><div class='del'>-{</div><div class='del'>-	mlx5_devcom_unregister_component(dev-&gt;priv.hca_devcom_comp);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mlx5_init_once(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;priv.devc = mlx5_devcom_register_device(dev);</div><div class='del'>-	if (IS_ERR(dev-&gt;priv.devc))</div><div class='del'>-		mlx5_core_warn(dev, "failed to register devcom device %ld\n",</div><div class='del'>-			       PTR_ERR(dev-&gt;priv.devc));</div><div class='del'>-	mlx5_register_hca_devcom_comp(dev);</div><div class='add'>+	if (!dev-&gt;priv.devc)</div><div class='add'>+		mlx5_core_warn(dev, "failed to register devcom device\n");</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_query_board_id(dev);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -1016,23 +1010,21 @@ static int mlx5_init_once(struct mlx5_core_dev *dev)</div><div class='ctx'> 		goto err_irq_cleanup;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = mlx5_events_init(dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		mlx5_core_err(dev, "failed to initialize events\n");</div><div class='del'>-		goto err_eq_cleanup;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	err = mlx5_fw_reset_init(dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mlx5_core_err(dev, "failed to initialize fw reset events\n");</div><div class='del'>-		goto err_events_cleanup;</div><div class='add'>+		goto err_eq_cleanup;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mlx5_cq_debugfs_init(dev);</div><div class='ctx'> </div><div class='ctx'> 	mlx5_init_reserved_gids(dev);</div><div class='ctx'> </div><div class='del'>-	mlx5_init_clock(dev);</div><div class='add'>+	err = mlx5_init_clock(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_err(dev, "failed to initialize hardware clock\n");</div><div class='add'>+		goto err_tables_cleanup;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;vxlan = mlx5_vxlan_create(dev);</div><div class='ctx'> 	dev-&gt;geneve = mlx5_geneve_create(dev);</div><div class='hunk'>@@ -1040,7 +1032,7 @@ static int mlx5_init_once(struct mlx5_core_dev *dev)</div><div class='ctx'> 	err = mlx5_init_rl_table(dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mlx5_core_err(dev, "Failed to init rate limiting\n");</div><div class='del'>-		goto err_tables_cleanup;</div><div class='add'>+		goto err_clock_cleanup;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_mpfs_init(dev);</div><div class='hunk'>@@ -1092,9 +1084,7 @@ static int mlx5_init_once(struct mlx5_core_dev *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;dm = mlx5_dm_create(dev);</div><div class='del'>-	if (IS_ERR(dev-&gt;dm))</div><div class='del'>-		mlx5_core_warn(dev, "Failed to init device memory %ld\n", PTR_ERR(dev-&gt;dm));</div><div class='del'>-</div><div class='add'>+	dev-&gt;st = mlx5_st_create(dev);</div><div class='ctx'> 	dev-&gt;tracer = mlx5_fw_tracer_create(dev);</div><div class='ctx'> 	dev-&gt;hv_vhca = mlx5_hv_vhca_create(dev);</div><div class='ctx'> 	dev-&gt;rsc_dump = mlx5_rsc_dump_create(dev);</div><div class='hunk'>@@ -1117,21 +1107,19 @@ err_mpfs_cleanup:</div><div class='ctx'> 	mlx5_mpfs_cleanup(dev);</div><div class='ctx'> err_rl_cleanup:</div><div class='ctx'> 	mlx5_cleanup_rl_table(dev);</div><div class='del'>-err_tables_cleanup:</div><div class='add'>+err_clock_cleanup:</div><div class='ctx'> 	mlx5_geneve_destroy(dev-&gt;geneve);</div><div class='ctx'> 	mlx5_vxlan_destroy(dev-&gt;vxlan);</div><div class='ctx'> 	mlx5_cleanup_clock(dev);</div><div class='add'>+err_tables_cleanup:</div><div class='ctx'> 	mlx5_cleanup_reserved_gids(dev);</div><div class='ctx'> 	mlx5_cq_debugfs_cleanup(dev);</div><div class='ctx'> 	mlx5_fw_reset_cleanup(dev);</div><div class='del'>-err_events_cleanup:</div><div class='del'>-	mlx5_events_cleanup(dev);</div><div class='ctx'> err_eq_cleanup:</div><div class='ctx'> 	mlx5_eq_table_cleanup(dev);</div><div class='ctx'> err_irq_cleanup:</div><div class='ctx'> 	mlx5_irq_table_cleanup(dev);</div><div class='ctx'> err_devcom:</div><div class='del'>-	mlx5_unregister_hca_devcom_comp(dev);</div><div class='ctx'> 	mlx5_devcom_unregister_device(dev-&gt;priv.devc);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1142,6 +1130,7 @@ static void mlx5_cleanup_once(struct mlx5_core_dev *dev)</div><div class='ctx'> 	mlx5_rsc_dump_destroy(dev);</div><div class='ctx'> 	mlx5_hv_vhca_destroy(dev-&gt;hv_vhca);</div><div class='ctx'> 	mlx5_fw_tracer_destroy(dev-&gt;tracer);</div><div class='add'>+	mlx5_st_destroy(dev);</div><div class='ctx'> 	mlx5_dm_cleanup(dev);</div><div class='ctx'> 	mlx5_fs_core_free(dev);</div><div class='ctx'> 	mlx5_sf_table_cleanup(dev);</div><div class='hunk'>@@ -1158,10 +1147,8 @@ static void mlx5_cleanup_once(struct mlx5_core_dev *dev)</div><div class='ctx'> 	mlx5_cleanup_reserved_gids(dev);</div><div class='ctx'> 	mlx5_cq_debugfs_cleanup(dev);</div><div class='ctx'> 	mlx5_fw_reset_cleanup(dev);</div><div class='del'>-	mlx5_events_cleanup(dev);</div><div class='ctx'> 	mlx5_eq_table_cleanup(dev);</div><div class='ctx'> 	mlx5_irq_table_cleanup(dev);</div><div class='del'>-	mlx5_unregister_hca_devcom_comp(dev);</div><div class='ctx'> 	mlx5_devcom_unregister_device(dev-&gt;priv.devc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1199,24 +1186,24 @@ static int mlx5_function_enable(struct mlx5_core_dev *dev, bool boot, u64 timeou</div><div class='ctx'> 	dev-&gt;caps.embedded_cpu = mlx5_read_embedded_cpu(dev);</div><div class='ctx'> 	mlx5_cmd_set_state(dev, MLX5_CMDIF_STATE_UP);</div><div class='ctx'> </div><div class='del'>-	mlx5_start_health_poll(dev);</div><div class='del'>-</div><div class='ctx'> 	err = mlx5_core_enable_hca(dev, 0);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mlx5_core_err(dev, "enable hca failed\n");</div><div class='del'>-		goto stop_health_poll;</div><div class='add'>+		goto err_cmd_cleanup;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mlx5_start_health_poll(dev);</div><div class='add'>+</div><div class='ctx'> 	err = mlx5_core_set_issi(dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mlx5_core_err(dev, "failed to set issi\n");</div><div class='del'>-		goto err_disable_hca;</div><div class='add'>+		goto stop_health_poll;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_satisfy_startup_pages(dev, 1);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mlx5_core_err(dev, "failed to allocate boot pages\n");</div><div class='del'>-		goto err_disable_hca;</div><div class='add'>+		goto stop_health_poll;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_tout_query_dtor(dev);</div><div class='hunk'>@@ -1229,10 +1216,9 @@ static int mlx5_function_enable(struct mlx5_core_dev *dev, bool boot, u64 timeou</div><div class='ctx'> </div><div class='ctx'> reclaim_boot_pages:</div><div class='ctx'> 	mlx5_reclaim_startup_pages(dev);</div><div class='del'>-err_disable_hca:</div><div class='del'>-	mlx5_core_disable_hca(dev, 0);</div><div class='ctx'> stop_health_poll:</div><div class='ctx'> 	mlx5_stop_health_poll(dev, boot);</div><div class='add'>+	mlx5_core_disable_hca(dev, 0);</div><div class='ctx'> err_cmd_cleanup:</div><div class='ctx'> 	mlx5_cmd_set_state(dev, MLX5_CMDIF_STATE_DOWN);</div><div class='ctx'> 	mlx5_cmd_disable(dev);</div><div class='hunk'>@@ -1243,8 +1229,8 @@ err_cmd_cleanup:</div><div class='ctx'> static void mlx5_function_disable(struct mlx5_core_dev *dev, bool boot)</div><div class='ctx'> {</div><div class='ctx'> 	mlx5_reclaim_startup_pages(dev);</div><div class='del'>-	mlx5_core_disable_hca(dev, 0);</div><div class='ctx'> 	mlx5_stop_health_poll(dev, boot);</div><div class='add'>+	mlx5_core_disable_hca(dev, 0);</div><div class='ctx'> 	mlx5_cmd_set_state(dev, MLX5_CMDIF_STATE_DOWN);</div><div class='ctx'> 	mlx5_cmd_disable(dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -1331,10 +1317,9 @@ static int mlx5_load(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;priv.uar = mlx5_get_uars_page(dev);</div><div class='del'>-	if (IS_ERR(dev-&gt;priv.uar)) {</div><div class='del'>-		mlx5_core_err(dev, "Failed allocating uar, aborting\n");</div><div class='del'>-		err = PTR_ERR(dev-&gt;priv.uar);</div><div class='add'>+	err = mlx5_alloc_bfreg(dev, &amp;dev-&gt;priv.bfreg, false, false);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_err(dev, "Failed allocating bfreg, %d\n", err);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1353,6 +1338,8 @@ static int mlx5_load(struct mlx5_core_dev *dev)</div><div class='ctx'> 		goto err_eq_table;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mlx5_clock_load(dev);</div><div class='add'>+</div><div class='ctx'> 	err = mlx5_fw_tracer_init(dev-&gt;tracer);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mlx5_core_err(dev, "Failed to init FW tracer %d\n", err);</div><div class='hunk'>@@ -1390,12 +1377,6 @@ static int mlx5_load(struct mlx5_core_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	mlx5_vhca_event_start(dev);</div><div class='ctx'> </div><div class='del'>-	err = mlx5_sf_hw_table_create(dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		mlx5_core_err(dev, "sf table create failed %d\n", err);</div><div class='del'>-		goto err_vhca;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	err = mlx5_ec_init(dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mlx5_core_err(dev, "Failed to init embedded CPU\n");</div><div class='hunk'>@@ -1424,8 +1405,6 @@ err_sriov:</div><div class='ctx'> 	mlx5_lag_remove_mdev(dev);</div><div class='ctx'> 	mlx5_ec_cleanup(dev);</div><div class='ctx'> err_ec:</div><div class='del'>-	mlx5_sf_hw_table_destroy(dev);</div><div class='del'>-err_vhca:</div><div class='ctx'> 	mlx5_vhca_event_stop(dev);</div><div class='ctx'> err_set_hca:</div><div class='ctx'> 	mlx5_fs_core_cleanup(dev);</div><div class='hunk'>@@ -1436,13 +1415,14 @@ err_fpga_start:</div><div class='ctx'> 	mlx5_hv_vhca_cleanup(dev-&gt;hv_vhca);</div><div class='ctx'> 	mlx5_fw_reset_events_stop(dev);</div><div class='ctx'> 	mlx5_fw_tracer_cleanup(dev-&gt;tracer);</div><div class='add'>+	mlx5_clock_unload(dev);</div><div class='ctx'> 	mlx5_eq_table_destroy(dev);</div><div class='ctx'> err_eq_table:</div><div class='ctx'> 	mlx5_irq_table_destroy(dev);</div><div class='ctx'> err_irq_table:</div><div class='ctx'> 	mlx5_pagealloc_stop(dev);</div><div class='ctx'> 	mlx5_events_stop(dev);</div><div class='del'>-	mlx5_put_uars_page(dev, dev-&gt;priv.uar);</div><div class='add'>+	mlx5_free_bfreg(dev, &amp;dev-&gt;priv.bfreg);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1450,23 +1430,24 @@ static void mlx5_unload(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	mlx5_eswitch_disable(dev-&gt;priv.eswitch);</div><div class='ctx'> 	mlx5_devlink_traps_unregister(priv_to_devlink(dev));</div><div class='add'>+	mlx5_vhca_event_stop(dev);</div><div class='ctx'> 	mlx5_sf_dev_table_destroy(dev);</div><div class='ctx'> 	mlx5_sriov_detach(dev);</div><div class='ctx'> 	mlx5_lag_remove_mdev(dev);</div><div class='ctx'> 	mlx5_ec_cleanup(dev);</div><div class='ctx'> 	mlx5_sf_hw_table_destroy(dev);</div><div class='del'>-	mlx5_vhca_event_stop(dev);</div><div class='ctx'> 	mlx5_fs_core_cleanup(dev);</div><div class='ctx'> 	mlx5_fpga_device_stop(dev);</div><div class='ctx'> 	mlx5_rsc_dump_cleanup(dev);</div><div class='ctx'> 	mlx5_hv_vhca_cleanup(dev-&gt;hv_vhca);</div><div class='ctx'> 	mlx5_fw_reset_events_stop(dev);</div><div class='ctx'> 	mlx5_fw_tracer_cleanup(dev-&gt;tracer);</div><div class='add'>+	mlx5_clock_unload(dev);</div><div class='ctx'> 	mlx5_eq_table_destroy(dev);</div><div class='ctx'> 	mlx5_irq_table_destroy(dev);</div><div class='ctx'> 	mlx5_pagealloc_stop(dev);</div><div class='ctx'> 	mlx5_events_stop(dev);</div><div class='del'>-	mlx5_put_uars_page(dev, dev-&gt;priv.uar);</div><div class='add'>+	mlx5_free_bfreg(dev, &amp;dev-&gt;priv.bfreg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5_init_one_devl_locked(struct mlx5_core_dev *dev)</div><div class='hunk'>@@ -1785,9 +1766,12 @@ static const int types[] = {</div><div class='ctx'> 	MLX5_CAP_VDPA_EMULATION,</div><div class='ctx'> 	MLX5_CAP_IPSEC,</div><div class='ctx'> 	MLX5_CAP_PORT_SELECTION,</div><div class='add'>+	MLX5_CAP_PSP,</div><div class='ctx'> 	MLX5_CAP_MACSEC,</div><div class='ctx'> 	MLX5_CAP_ADV_VIRTUALIZATION,</div><div class='ctx'> 	MLX5_CAP_CRYPTO,</div><div class='add'>+	MLX5_CAP_SHAMPO,</div><div class='add'>+	MLX5_CAP_ADV_RDMA,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void mlx5_hca_caps_free(struct mlx5_core_dev *dev)</div><div class='hunk'>@@ -1832,6 +1816,50 @@ static int vhca_id_show(struct seq_file *file, void *priv)</div><div class='ctx'> </div><div class='ctx'> DEFINE_SHOW_ATTRIBUTE(vhca_id);</div><div class='ctx'> </div><div class='add'>+static int mlx5_notifiers_init(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_events_init(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_err(dev, "failed to initialize events\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	BLOCKING_INIT_NOTIFIER_HEAD(&amp;dev-&gt;priv.esw_n_head);</div><div class='add'>+	mlx5_vhca_state_notifier_init(dev);</div><div class='add'>+</div><div class='add'>+	err = mlx5_sf_hw_notifier_init(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_sf_hw_notifier;</div><div class='add'>+</div><div class='add'>+	err = mlx5_sf_notifiers_init(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_sf_notifiers;</div><div class='add'>+</div><div class='add'>+	err = mlx5_sf_dev_notifier_init(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_sf_dev_notifier;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_sf_dev_notifier:</div><div class='add'>+	mlx5_sf_notifiers_cleanup(dev);</div><div class='add'>+err_sf_notifiers:</div><div class='add'>+	mlx5_sf_hw_notifier_cleanup(dev);</div><div class='add'>+err_sf_hw_notifier:</div><div class='add'>+	mlx5_events_cleanup(dev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_notifiers_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	mlx5_sf_dev_notifier_cleanup(dev);</div><div class='add'>+	mlx5_sf_notifiers_cleanup(dev);</div><div class='add'>+	mlx5_sf_hw_notifier_cleanup(dev);</div><div class='add'>+	mlx5_events_cleanup(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5_mdev_init(struct mlx5_core_dev *dev, int profile_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_priv *priv = &amp;dev-&gt;priv;</div><div class='hunk'>@@ -1887,6 +1915,10 @@ int mlx5_mdev_init(struct mlx5_core_dev *dev, int profile_idx)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_hca_caps;</div><div class='ctx'> </div><div class='add'>+	err = mlx5_notifiers_init(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_hca_caps;</div><div class='add'>+</div><div class='ctx'> 	/* The conjunction of sw_vhca_id with sw_owner_id will be a global</div><div class='ctx'> 	 * unique id per function which uses mlx5_core.</div><div class='ctx'> 	 * Those values are supplied to FW as part of the init HCA command to</div><div class='hunk'>@@ -1929,6 +1961,7 @@ void mlx5_mdev_uninit(struct mlx5_core_dev *dev)</div><div class='ctx'> 	if (priv-&gt;sw_vhca_id &gt; 0)</div><div class='ctx'> 		ida_free(&amp;sw_vhca_ida, dev-&gt;priv.sw_vhca_id);</div><div class='ctx'> </div><div class='add'>+	mlx5_notifiers_cleanup(dev);</div><div class='ctx'> 	mlx5_hca_caps_free(dev);</div><div class='ctx'> 	mlx5_adev_cleanup(dev);</div><div class='ctx'> 	mlx5_pagealloc_cleanup(dev);</div><div class='hunk'>@@ -2104,7 +2137,6 @@ static pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 	err = wait_vital(pdev);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -2241,6 +2273,7 @@ static const struct pci_device_id mlx5_core_pci_table[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(MELLANOX, 0x1021) },			/* ConnectX-7 */</div><div class='ctx'> 	{ PCI_VDEVICE(MELLANOX, 0x1023) },			/* ConnectX-8 */</div><div class='ctx'> 	{ PCI_VDEVICE(MELLANOX, 0x1025) },			/* ConnectX-9 */</div><div class='add'>+	{ PCI_VDEVICE(MELLANOX, 0x1027) },			/* ConnectX-10 */</div><div class='ctx'> 	{ PCI_VDEVICE(MELLANOX, 0xa2d2) },			/* BlueField integrated ConnectX-5 network controller */</div><div class='ctx'> 	{ PCI_VDEVICE(MELLANOX, 0xa2d3), MLX5_PCI_DEV_IS_VF},	/* BlueField integrated ConnectX-5 network controller VF */</div><div class='ctx'> 	{ PCI_VDEVICE(MELLANOX, 0xa2d6) },			/* BlueField-2 integrated ConnectX-6 Dx network controller */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h<br/>index 99de67c3aa74..cfebc110c02f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h</a></div><div class='hunk'>@@ -114,6 +114,26 @@ struct mlx5_cmd_alias_obj_create_attr {</div><div class='ctx'> 	u8 access_key[ACCESS_KEY_LEN];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mlx5_port_eth_proto {</div><div class='add'>+	u32 cap;</div><div class='add'>+	u32 admin;</div><div class='add'>+	u32 oper;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_module_eeprom_query_params {</div><div class='add'>+	u16 size;</div><div class='add'>+	u16 offset;</div><div class='add'>+	u16 i2c_address;</div><div class='add'>+	u32 page;</div><div class='add'>+	u32 bank;</div><div class='add'>+	u32 module_number;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_link_info {</div><div class='add'>+	u32 speed;</div><div class='add'>+	u32 lanes;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static inline void mlx5_printk(struct mlx5_core_dev *dev, int level, const char *format, ...)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *device = dev-&gt;device;</div><div class='hunk'>@@ -280,6 +300,89 @@ int mlx5_set_mtppse(struct mlx5_core_dev *mdev, u8 pin, u8 arm, u8 mode);</div><div class='ctx'> struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_dm_cleanup(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PCIE_TPH</div><div class='add'>+struct mlx5_st *mlx5_st_create(struct mlx5_core_dev *dev);</div><div class='add'>+void mlx5_st_destroy(struct mlx5_core_dev *dev);</div><div class='add'>+#else</div><div class='add'>+static inline struct mlx5_st *</div><div class='add'>+mlx5_st_create(struct mlx5_core_dev *dev) { return NULL; }</div><div class='add'>+static inline void mlx5_st_destroy(struct mlx5_core_dev *dev) { return; }</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void mlx5_toggle_port_link(struct mlx5_core_dev *dev);</div><div class='add'>+int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,</div><div class='add'>+			       enum mlx5_port_status status);</div><div class='add'>+int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,</div><div class='add'>+				 enum mlx5_port_status *status);</div><div class='add'>+int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);</div><div class='add'>+</div><div class='add'>+int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);</div><div class='add'>+int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause);</div><div class='add'>+int mlx5_query_port_pause(struct mlx5_core_dev *dev,</div><div class='add'>+			  u32 *rx_pause, u32 *tx_pause);</div><div class='add'>+</div><div class='add'>+int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx);</div><div class='add'>+int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx,</div><div class='add'>+			u8 *pfc_en_rx);</div><div class='add'>+</div><div class='add'>+int mlx5_set_port_stall_watermark(struct mlx5_core_dev *dev,</div><div class='add'>+				  u16 stall_critical_watermark,</div><div class='add'>+				  u16 stall_minor_watermark);</div><div class='add'>+int mlx5_query_port_stall_watermark(struct mlx5_core_dev *dev,</div><div class='add'>+				    u16 *stall_critical_watermark,</div><div class='add'>+				    u16 *stall_minor_watermark);</div><div class='add'>+</div><div class='add'>+int mlx5_max_tc(struct mlx5_core_dev *mdev);</div><div class='add'>+int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc);</div><div class='add'>+int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,</div><div class='add'>+			    u8 prio, u8 *tc);</div><div class='add'>+int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group);</div><div class='add'>+int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,</div><div class='add'>+			     u8 tc, u8 *tc_group);</div><div class='add'>+int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw);</div><div class='add'>+int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,</div><div class='add'>+				u8 tc, u8 *bw_pct);</div><div class='add'>+int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,</div><div class='add'>+				    u8 *max_bw_value,</div><div class='add'>+				    u8 *max_bw_unit);</div><div class='add'>+int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,</div><div class='add'>+				   u8 *max_bw_value,</div><div class='add'>+				   u8 *max_bw_unit);</div><div class='add'>+int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);</div><div class='add'>+int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);</div><div class='add'>+</div><div class='add'>+int mlx5_query_ports_check(struct mlx5_core_dev *mdev, u32 *out, int outlen);</div><div class='add'>+int mlx5_set_ports_check(struct mlx5_core_dev *mdev, u32 *in, int inlen);</div><div class='add'>+int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);</div><div class='add'>+void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,</div><div class='add'>+			 bool *enabled);</div><div class='add'>+int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,</div><div class='add'>+			     u16 offset, u16 size, u8 *data, u8 *status);</div><div class='add'>+int</div><div class='add'>+mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev,</div><div class='add'>+				 struct mlx5_module_eeprom_query_params *params,</div><div class='add'>+				 u8 *data, u8 *status);</div><div class='add'>+</div><div class='add'>+int mlx5_query_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *out);</div><div class='add'>+int mlx5_set_port_dcbx_param(struct mlx5_core_dev *mdev, u32 *in);</div><div class='add'>+int mlx5_set_trust_state(struct mlx5_core_dev *mdev, u8 trust_state);</div><div class='add'>+int mlx5_query_trust_state(struct mlx5_core_dev *mdev, u8 *trust_state);</div><div class='add'>+int mlx5_query_port_buffer_ownership(struct mlx5_core_dev *mdev,</div><div class='add'>+				     u8 *buffer_ownership);</div><div class='add'>+int mlx5_set_dscp2prio(struct mlx5_core_dev *mdev, u8 dscp, u8 prio);</div><div class='add'>+int mlx5_query_dscp2prio(struct mlx5_core_dev *mdev, u8 *dscp2prio);</div><div class='add'>+</div><div class='add'>+int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,</div><div class='add'>+			      struct mlx5_port_eth_proto *eproto);</div><div class='add'>+bool mlx5_ptys_ext_supported(struct mlx5_core_dev *mdev);</div><div class='add'>+const struct mlx5_link_info *mlx5_port_ptys2info(struct mlx5_core_dev *mdev,</div><div class='add'>+						 u32 eth_proto_oper,</div><div class='add'>+						 bool force_legacy);</div><div class='add'>+u32 mlx5_port_info2linkmodes(struct mlx5_core_dev *mdev,</div><div class='add'>+			     struct mlx5_link_info *info,</div><div class='add'>+			     bool force_legacy);</div><div class='add'>+int mlx5_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);</div><div class='add'>+</div><div class='ctx'> #define MLX5_PPS_CAP(mdev) (MLX5_CAP_GEN((mdev), pps) &amp;&amp;		\</div><div class='ctx'> 			    MLX5_CAP_GEN((mdev), pps_modify) &amp;&amp;		\</div><div class='ctx'> 			    MLX5_CAP_MCAM_FEATURE((mdev), mtpps_fs) &amp;&amp;	\</div><div class='hunk'>@@ -341,6 +444,8 @@ int mlx5_init_one_light(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_uninit_one_light(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_unload_one_light(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='add'>+void mlx5_query_nic_sw_system_image_guid(struct mlx5_core_dev *mdev, u8 *buf,</div><div class='add'>+					 u8 *len);</div><div class='ctx'> int mlx5_vport_set_other_func_cap(struct mlx5_core_dev *dev, const void *hca_cap, u16 vport,</div><div class='ctx'> 				  u16 opmod);</div><div class='ctx'> #define mlx5_vport_get_other_func_general_cap(dev, vport, out)		\</div><div class='hunk'>@@ -401,4 +506,17 @@ static inline int mlx5_max_eq_cap_get(const struct mlx5_core_dev *dev)</div><div class='ctx'> </div><div class='ctx'> 	return 1 &lt;&lt; MLX5_CAP_GEN(dev, log_max_eq);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static inline bool mlx5_pcie_cong_event_supported(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	u64 features = MLX5_CAP_GEN_2_64(dev, general_obj_types_127_64);</div><div class='add'>+</div><div class='add'>+	if (!(features &amp; MLX5_HCA_CAP_2_GENERAL_OBJECT_TYPES_PCIE_CONG_EVENT))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;sd)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='ctx'> #endif /* __MLX5_CORE_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h<br/>index 0881e961d8b1..586688da9940 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h</a></div><div class='hunk'>@@ -10,12 +10,15 @@</div><div class='ctx'> </div><div class='ctx'> struct mlx5_irq;</div><div class='ctx'> struct cpu_rmap;</div><div class='add'>+struct mlx5_irq_pool;</div><div class='ctx'> </div><div class='ctx'> int mlx5_irq_table_init(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_irq_table_cleanup(struct mlx5_core_dev *dev);</div><div class='ctx'> int mlx5_irq_table_create(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_irq_table_destroy(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_irq_table_free_irqs(struct mlx5_core_dev *dev);</div><div class='add'>+struct mlx5_irq_pool *</div><div class='add'>+mlx5_irq_table_get_comp_irq_pool(struct mlx5_core_dev *dev);</div><div class='ctx'> int mlx5_irq_table_get_num_comp(struct mlx5_irq_table *table);</div><div class='ctx'> int mlx5_irq_table_get_sfs_vec(struct mlx5_irq_table *table);</div><div class='ctx'> struct mlx5_irq_table *mlx5_irq_table_get(struct mlx5_core_dev *dev);</div><div class='hunk'>@@ -38,7 +41,6 @@ struct cpumask *mlx5_irq_get_affinity_mask(struct mlx5_irq *irq);</div><div class='ctx'> int mlx5_irq_get_index(struct mlx5_irq *irq);</div><div class='ctx'> int mlx5_irq_get_irq(const struct mlx5_irq *irq);</div><div class='ctx'> </div><div class='del'>-struct mlx5_irq_pool;</div><div class='ctx'> #ifdef CONFIG_MLX5_SF</div><div class='ctx'> struct mlx5_irq *mlx5_irq_affinity_irq_request_auto(struct mlx5_core_dev *dev,</div><div class='ctx'> 						    struct cpumask *used_cpus, u16 vecidx);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c b/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c<br/>index 972e8e9df585..cd68c4b2c0bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c</a></div><div class='hunk'>@@ -291,7 +291,7 @@ static void free_4k(struct mlx5_core_dev *dev, u64 addr, u32 function)</div><div class='ctx'> static int alloc_system_page(struct mlx5_core_dev *dev, u32 function)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *device = mlx5_core_dma_dev(dev);</div><div class='del'>-	int nid = dev_to_node(device);</div><div class='add'>+	int nid = dev-&gt;priv.numa_node;</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> 	u64 zero_addr = 1;</div><div class='ctx'> 	u64 addr;</div><div class='hunk'>@@ -489,9 +489,12 @@ static int reclaim_pages_cmd(struct mlx5_core_dev *dev,</div><div class='ctx'> 	u32 func_id;</div><div class='ctx'> 	u32 npages;</div><div class='ctx'> 	u32 i = 0;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	if (!mlx5_cmd_is_down(dev))</div><div class='del'>-		return mlx5_cmd_do(dev, in, in_size, out, out_size);</div><div class='add'>+	err = mlx5_cmd_do(dev, in, in_size, out, out_size);</div><div class='add'>+	/* If FW is gone (-ENXIO), proceed to forceful reclaim */</div><div class='add'>+	if (err != -ENXIO)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* No hard feelings, we want our pages back! */</div><div class='ctx'> 	npages = MLX5_GET(manage_pages_in, in, input_num_entries);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c b/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c<br/>index 81a9232a03e1..aa3b5878e3da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ static int mlx5_core_func_to_vport(const struct mlx5_core_dev *dev,</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * mlx5_get_default_msix_vec_count - Get the default number of MSI-X vectors</div><div class='del'>- *                                   to be ssigned to each VF.</div><div class='add'>+ *                                   to be assigned to each VF.</div><div class='ctx'>  * @dev: PF to work on</div><div class='ctx'>  * @num_vfs: Number of enabled VFs</div><div class='ctx'>  */</div><div class='hunk'>@@ -148,7 +148,7 @@ out:</div><div class='ctx'>  * Free the IRQ and other resources such as rmap from the system.</div><div class='ctx'>  * BUT doesn't free or remove reference from mlx5.</div><div class='ctx'>  * This function is very important for the shutdown flow, where we need to</div><div class='del'>- * cleanup system resoruces but keep mlx5 objects alive,</div><div class='add'>+ * cleanup system resources but keep mlx5 objects alive,</div><div class='ctx'>  * see mlx5_irq_table_free_irqs().</div><div class='ctx'>  */</div><div class='ctx'> static void mlx5_system_free_irq(struct mlx5_irq *irq)</div><div class='hunk'>@@ -324,10 +324,8 @@ err_xa:</div><div class='ctx'> 	free_irq(irq-&gt;map.virq, &amp;irq-&gt;nh);</div><div class='ctx'> err_req_irq:</div><div class='ctx'> #ifdef CONFIG_RFS_ACCEL</div><div class='del'>-	if (i &amp;&amp; rmap &amp;&amp; *rmap) {</div><div class='del'>-		free_irq_cpu_rmap(*rmap);</div><div class='del'>-		*rmap = NULL;</div><div class='del'>-	}</div><div class='add'>+	if (i &amp;&amp; rmap &amp;&amp; *rmap)</div><div class='add'>+		irq_cpu_rmap_remove(*rmap, irq-&gt;map.virq);</div><div class='ctx'> err_irq_rmap:</div><div class='ctx'> #endif</div><div class='ctx'> 	if (i &amp;&amp; pci_msix_can_alloc_dyn(dev-&gt;pdev))</div><div class='hunk'>@@ -378,6 +376,11 @@ int mlx5_irq_get_index(struct mlx5_irq *irq)</div><div class='ctx'> 	return irq-&gt;map.index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct mlx5_irq_pool *mlx5_irq_get_pool(struct mlx5_irq *irq)</div><div class='add'>+{</div><div class='add'>+	return irq-&gt;pool;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* irq_pool API */</div><div class='ctx'> </div><div class='ctx'> /* requesting an irq from a given pool according to given index */</div><div class='hunk'>@@ -405,18 +408,20 @@ static struct mlx5_irq_pool *sf_ctrl_irq_pool_get(struct mlx5_irq_table *irq_tab</div><div class='ctx'> 	return irq_table-&gt;sf_ctrl_pool;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct mlx5_irq_pool *sf_irq_pool_get(struct mlx5_irq_table *irq_table)</div><div class='add'>+static struct mlx5_irq_pool *</div><div class='add'>+sf_comp_irq_pool_get(struct mlx5_irq_table *irq_table)</div><div class='ctx'> {</div><div class='ctx'> 	return irq_table-&gt;sf_comp_pool;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct mlx5_irq_pool *mlx5_irq_pool_get(struct mlx5_core_dev *dev)</div><div class='add'>+struct mlx5_irq_pool *</div><div class='add'>+mlx5_irq_table_get_comp_irq_pool(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_irq_table *irq_table = mlx5_irq_table_get(dev);</div><div class='ctx'> 	struct mlx5_irq_pool *pool = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (mlx5_core_is_sf(dev))</div><div class='del'>-		pool = sf_irq_pool_get(irq_table);</div><div class='add'>+		pool = sf_comp_irq_pool_get(irq_table);</div><div class='ctx'> </div><div class='ctx'> 	/* In some configs, there won't be a pool of SFs IRQs. Hence, returning</div><div class='ctx'> 	 * the PF IRQs pool in case the SF pool doesn't exist.</div><div class='hunk'>@@ -463,26 +468,32 @@ void mlx5_ctrl_irq_release(struct mlx5_core_dev *dev, struct mlx5_irq *ctrl_irq)</div><div class='ctx'> struct mlx5_irq *mlx5_ctrl_irq_request(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_irq_pool *pool = ctrl_irq_pool_get(dev);</div><div class='del'>-	struct irq_affinity_desc af_desc;</div><div class='add'>+	struct irq_affinity_desc *af_desc;</div><div class='ctx'> 	struct mlx5_irq *irq;</div><div class='ctx'> </div><div class='del'>-	cpumask_copy(&amp;af_desc.mask, cpu_online_mask);</div><div class='del'>-	af_desc.is_managed = false;</div><div class='add'>+	af_desc = kvzalloc(sizeof(*af_desc), GFP_KERNEL);</div><div class='add'>+	if (!af_desc)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	cpumask_copy(&amp;af_desc-&gt;mask, cpu_online_mask);</div><div class='add'>+	af_desc-&gt;is_managed = false;</div><div class='ctx'> 	if (!mlx5_irq_pool_is_sf_pool(pool)) {</div><div class='ctx'> 		/* In case we are allocating a control IRQ from a pci device's pool.</div><div class='ctx'> 		 * This can happen also for a SF if the SFs pool is empty.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!pool-&gt;xa_num_irqs.max) {</div><div class='del'>-			cpumask_clear(&amp;af_desc.mask);</div><div class='add'>+			cpumask_clear(&amp;af_desc-&gt;mask);</div><div class='ctx'> 			/* In case we only have a single IRQ for PF/VF */</div><div class='del'>-			cpumask_set_cpu(cpumask_first(cpu_online_mask), &amp;af_desc.mask);</div><div class='add'>+			cpumask_set_cpu(cpumask_first(cpu_online_mask), &amp;af_desc-&gt;mask);</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Allocate the IRQ in index 0. The vector was already allocated */</div><div class='del'>-		irq = irq_pool_request_vector(pool, 0, &amp;af_desc, NULL);</div><div class='add'>+		irq = irq_pool_request_vector(pool, 0, af_desc, NULL);</div><div class='ctx'> 	} else {</div><div class='del'>-		irq = mlx5_irq_affinity_request(dev, pool, &amp;af_desc);</div><div class='add'>+		irq = mlx5_irq_affinity_request(dev, pool, af_desc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	kvfree(af_desc);</div><div class='add'>+</div><div class='ctx'> 	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -541,16 +552,26 @@ struct mlx5_irq *mlx5_irq_request_vector(struct mlx5_core_dev *dev, u16 cpu,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_irq_table *table = mlx5_irq_table_get(dev);</div><div class='ctx'> 	struct mlx5_irq_pool *pool = table-&gt;pcif_pool;</div><div class='del'>-	struct irq_affinity_desc af_desc;</div><div class='ctx'> 	int offset = MLX5_IRQ_VEC_COMP_BASE;</div><div class='add'>+	struct irq_affinity_desc *af_desc;</div><div class='add'>+	struct mlx5_irq *irq;</div><div class='add'>+</div><div class='add'>+	af_desc = kvzalloc(sizeof(*af_desc), GFP_KERNEL);</div><div class='add'>+	if (!af_desc)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='ctx'> 	if (!pool-&gt;xa_num_irqs.max)</div><div class='ctx'> 		offset = 0;</div><div class='ctx'> </div><div class='del'>-	af_desc.is_managed = false;</div><div class='del'>-	cpumask_clear(&amp;af_desc.mask);</div><div class='del'>-	cpumask_set_cpu(cpu, &amp;af_desc.mask);</div><div class='del'>-	return mlx5_irq_request(dev, vecidx + offset, &amp;af_desc, rmap);</div><div class='add'>+	af_desc-&gt;is_managed = false;</div><div class='add'>+	cpumask_clear(&amp;af_desc-&gt;mask);</div><div class='add'>+	cpumask_set_cpu(cpu, &amp;af_desc-&gt;mask);</div><div class='add'>+</div><div class='add'>+	irq = mlx5_irq_request(dev, vecidx + offset, af_desc, rmap);</div><div class='add'>+</div><div class='add'>+	kvfree(af_desc);</div><div class='add'>+</div><div class='add'>+	return irq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct mlx5_irq_pool *</div><div class='hunk'>@@ -572,7 +593,7 @@ irq_pool_alloc(struct mlx5_core_dev *dev, int start, int size, char *name,</div><div class='ctx'> 	pool-&gt;min_threshold = min_threshold * MLX5_EQ_REFS_PER_IRQ;</div><div class='ctx'> 	pool-&gt;max_threshold = max_threshold * MLX5_EQ_REFS_PER_IRQ;</div><div class='ctx'> 	mlx5_core_dbg(dev, "pool-&gt;name = %s, pool-&gt;size = %d, pool-&gt;start = %d",</div><div class='del'>-		      name, size, start);</div><div class='add'>+		      name ? name : "mlx5_pcif_pool", size, start);</div><div class='ctx'> 	return pool;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -581,7 +602,7 @@ static void irq_pool_free(struct mlx5_irq_pool *pool)</div><div class='ctx'> 	struct mlx5_irq *irq;</div><div class='ctx'> 	unsigned long index;</div><div class='ctx'> </div><div class='del'>-	/* There are cases in which we are destrying the irq_table before</div><div class='add'>+	/* There are cases in which we are destroying the irq_table before</div><div class='ctx'> 	 * freeing all the IRQs, fast teardown for example. Hence, free the irqs</div><div class='ctx'> 	 * which might not have been freed.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -593,9 +614,11 @@ static void irq_pool_free(struct mlx5_irq_pool *pool)</div><div class='ctx'> 	kvfree(pool);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int irq_pools_init(struct mlx5_core_dev *dev, int sf_vec, int pcif_vec)</div><div class='add'>+static int irq_pools_init(struct mlx5_core_dev *dev, int sf_vec, int pcif_vec,</div><div class='add'>+			  bool dynamic_vec)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_irq_table *table = dev-&gt;priv.irq_table;</div><div class='add'>+	int sf_vec_available = sf_vec;</div><div class='ctx'> 	int num_sf_ctrl;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -608,7 +631,7 @@ static int irq_pools_init(struct mlx5_core_dev *dev, int sf_vec, int pcif_vec)</div><div class='ctx'> 	if (!mlx5_sf_max_functions(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	if (sf_vec &lt; MLX5_IRQ_VEC_COMP_BASE_SF) {</div><div class='del'>-		mlx5_core_dbg(dev, "Not enught IRQs for SFs. SF may run at lower performance\n");</div><div class='add'>+		mlx5_core_dbg(dev, "Not enough IRQs for SFs. SF may run at lower performance\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -616,6 +639,13 @@ static int irq_pools_init(struct mlx5_core_dev *dev, int sf_vec, int pcif_vec)</div><div class='ctx'> 	num_sf_ctrl = DIV_ROUND_UP(mlx5_sf_max_functions(dev),</div><div class='ctx'> 				   MLX5_SFS_PER_CTRL_IRQ);</div><div class='ctx'> 	num_sf_ctrl = min_t(int, MLX5_IRQ_CTRL_SF_MAX, num_sf_ctrl);</div><div class='add'>+	if (!dynamic_vec &amp;&amp; (num_sf_ctrl + 1) &gt; sf_vec_available) {</div><div class='add'>+		mlx5_core_dbg(dev,</div><div class='add'>+			      "Not enough IRQs for SFs control and completion pool, required=%d avail=%d\n",</div><div class='add'>+			      num_sf_ctrl + 1, sf_vec_available);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	table-&gt;sf_ctrl_pool = irq_pool_alloc(dev, pcif_vec, num_sf_ctrl,</div><div class='ctx'> 					     "mlx5_sf_ctrl",</div><div class='ctx'> 					     MLX5_EQ_SHARE_IRQ_MIN_CTRL,</div><div class='hunk'>@@ -624,9 +654,11 @@ static int irq_pools_init(struct mlx5_core_dev *dev, int sf_vec, int pcif_vec)</div><div class='ctx'> 		err = PTR_ERR(table-&gt;sf_ctrl_pool);</div><div class='ctx'> 		goto err_pf;</div><div class='ctx'> 	}</div><div class='del'>-	/* init sf_comp_pool */</div><div class='add'>+	sf_vec_available -= num_sf_ctrl;</div><div class='add'>+</div><div class='add'>+	/* init sf_comp_pool, remaining vectors are for the SF completions */</div><div class='ctx'> 	table-&gt;sf_comp_pool = irq_pool_alloc(dev, pcif_vec + num_sf_ctrl,</div><div class='del'>-					     sf_vec - num_sf_ctrl, "mlx5_sf_comp",</div><div class='add'>+					     sf_vec_available, "mlx5_sf_comp",</div><div class='ctx'> 					     MLX5_EQ_SHARE_IRQ_MIN_COMP,</div><div class='ctx'> 					     MLX5_EQ_SHARE_IRQ_MAX_COMP);</div><div class='ctx'> 	if (IS_ERR(table-&gt;sf_comp_pool)) {</div><div class='hunk'>@@ -715,6 +747,7 @@ int mlx5_irq_table_get_num_comp(struct mlx5_irq_table *table)</div><div class='ctx'> int mlx5_irq_table_create(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int num_eqs = mlx5_max_eq_cap_get(dev);</div><div class='add'>+	bool dynamic_vec;</div><div class='ctx'> 	int total_vec;</div><div class='ctx'> 	int pcif_vec;</div><div class='ctx'> 	int req_vec;</div><div class='hunk'>@@ -724,21 +757,31 @@ int mlx5_irq_table_create(struct mlx5_core_dev *dev)</div><div class='ctx'> 	if (mlx5_core_is_sf(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	/* PCI PF vectors usage is limited by online cpus, device EQs and</div><div class='add'>+	 * PCI MSI-X capability.</div><div class='add'>+	 */</div><div class='ctx'> 	pcif_vec = MLX5_CAP_GEN(dev, num_ports) * num_online_cpus() + 1;</div><div class='ctx'> 	pcif_vec = min_t(int, pcif_vec, num_eqs);</div><div class='add'>+	pcif_vec = min_t(int, pcif_vec, pci_msix_vec_count(dev-&gt;pdev));</div><div class='ctx'> </div><div class='ctx'> 	total_vec = pcif_vec;</div><div class='ctx'> 	if (mlx5_sf_max_functions(dev))</div><div class='ctx'> 		total_vec += MLX5_MAX_MSIX_PER_SF * mlx5_sf_max_functions(dev);</div><div class='ctx'> 	total_vec = min_t(int, total_vec, pci_msix_vec_count(dev-&gt;pdev));</div><div class='del'>-	pcif_vec = min_t(int, pcif_vec, pci_msix_vec_count(dev-&gt;pdev));</div><div class='ctx'> </div><div class='ctx'> 	req_vec = pci_msix_can_alloc_dyn(dev-&gt;pdev) ? 1 : total_vec;</div><div class='ctx'> 	n = pci_alloc_irq_vectors(dev-&gt;pdev, 1, req_vec, PCI_IRQ_MSIX);</div><div class='ctx'> 	if (n &lt; 0)</div><div class='ctx'> 		return n;</div><div class='ctx'> </div><div class='del'>-	err = irq_pools_init(dev, total_vec - pcif_vec, pcif_vec);</div><div class='add'>+	/* Further limit vectors of the pools based on platform for non dynamic case */</div><div class='add'>+	dynamic_vec = pci_msix_can_alloc_dyn(dev-&gt;pdev);</div><div class='add'>+	if (!dynamic_vec) {</div><div class='add'>+		pcif_vec = min_t(int, n, pcif_vec);</div><div class='add'>+		total_vec = min_t(int, n, total_vec);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = irq_pools_init(dev, total_vec - pcif_vec, pcif_vec, dynamic_vec);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		pci_free_irq_vectors(dev-&gt;pdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h b/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h<br/>index c4d377f8df30..cc064425fe16 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h</a></div><div class='hunk'>@@ -28,7 +28,6 @@ struct mlx5_irq_pool {</div><div class='ctx'> 	struct mlx5_core_dev *dev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mlx5_irq_pool *mlx5_irq_pool_get(struct mlx5_core_dev *dev);</div><div class='ctx'> static inline bool mlx5_irq_pool_is_sf_pool(struct mlx5_irq_pool *pool)</div><div class='ctx'> {</div><div class='ctx'> 	return !strncmp("mlx5_sf", pool-&gt;name, strlen("mlx5_sf"));</div><div class='hunk'>@@ -40,5 +39,6 @@ struct mlx5_irq *mlx5_irq_alloc(struct mlx5_irq_pool *pool, int i,</div><div class='ctx'> int mlx5_irq_get_locked(struct mlx5_irq *irq);</div><div class='ctx'> int mlx5_irq_read_locked(struct mlx5_irq *irq);</div><div class='ctx'> int mlx5_irq_put(struct mlx5_irq *irq);</div><div class='add'>+struct mlx5_irq_pool *mlx5_irq_get_pool(struct mlx5_irq *irq);</div><div class='ctx'> </div><div class='ctx'> #endif /* __PCI_IRQ_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/port.c b/drivers/net/ethernet/mellanox/mlx5/core/port.c<br/>index 50931584132b..85a9e534f442 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/port.c</a></div><div class='hunk'>@@ -196,7 +196,6 @@ void mlx5_toggle_port_link(struct mlx5_core_dev *dev)</div><div class='ctx'> 	if (ps == MLX5_PORT_UP)</div><div class='ctx'> 		mlx5_set_port_admin_status(dev, MLX5_PORT_UP);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_toggle_port_link);</div><div class='ctx'> </div><div class='ctx'> int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,</div><div class='ctx'> 			       enum mlx5_port_status status)</div><div class='hunk'>@@ -210,7 +209,6 @@ int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,</div><div class='ctx'> 	return mlx5_core_access_reg(dev, in, sizeof(in), out,</div><div class='ctx'> 				    sizeof(out), MLX5_REG_PAOS, 0, 1);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_set_port_admin_status);</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,</div><div class='ctx'> 				 enum mlx5_port_status *status)</div><div class='hunk'>@@ -227,7 +225,6 @@ int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,</div><div class='ctx'> 	*status = MLX5_GET(paos_reg, out, admin_status);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_query_port_admin_status);</div><div class='ctx'> </div><div class='ctx'> static void mlx5_query_port_mtu(struct mlx5_core_dev *dev, u16 *admin_mtu,</div><div class='ctx'> 				u16 *max_mtu, u16 *oper_mtu, u8 port)</div><div class='hunk'>@@ -257,7 +254,6 @@ int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port)</div><div class='ctx'> 	return mlx5_core_access_reg(dev, in, sizeof(in), out,</div><div class='ctx'> 				   sizeof(out), MLX5_REG_PMTU, 0, 1);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_set_port_mtu);</div><div class='ctx'> </div><div class='ctx'> void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu,</div><div class='ctx'> 			     u8 port)</div><div class='hunk'>@@ -293,11 +289,11 @@ int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_query_module_id(struct mlx5_core_dev *dev, int module_num,</div><div class='del'>-				u8 *module_id)</div><div class='add'>+				u8 *module_id, u8 *status)</div><div class='ctx'> {</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(mcia_reg)] = {};</div><div class='ctx'> 	u32 out[MLX5_ST_SZ_DW(mcia_reg)];</div><div class='del'>-	int err, status;</div><div class='add'>+	int err;</div><div class='ctx'> 	u8 *ptr;</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(mcia_reg, in, i2c_device_address, MLX5_I2C_ADDR_LOW);</div><div class='hunk'>@@ -312,12 +308,12 @@ static int mlx5_query_module_id(struct mlx5_core_dev *dev, int module_num,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	status = MLX5_GET(mcia_reg, out, status);</div><div class='del'>-	if (status) {</div><div class='del'>-		mlx5_core_err(dev, "query_mcia_reg failed: status: 0x%x\n",</div><div class='del'>-			      status);</div><div class='add'>+	if (MLX5_GET(mcia_reg, out, status)) {</div><div class='add'>+		if (status)</div><div class='add'>+			*status = MLX5_GET(mcia_reg, out, status);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	ptr = MLX5_ADDR_OF(mcia_reg, out, dword_0);</div><div class='ctx'> </div><div class='ctx'> 	*module_id = ptr[0];</div><div class='hunk'>@@ -374,13 +370,14 @@ static int mlx5_mcia_max_bytes(struct mlx5_core_dev *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_query_mcia(struct mlx5_core_dev *dev,</div><div class='del'>-			   struct mlx5_module_eeprom_query_params *params, u8 *data)</div><div class='add'>+			   struct mlx5_module_eeprom_query_params *params,</div><div class='add'>+			   u8 *data, u8 *status)</div><div class='ctx'> {</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(mcia_reg)] = {};</div><div class='ctx'> 	u32 out[MLX5_ST_SZ_DW(mcia_reg)];</div><div class='del'>-	int status, err;</div><div class='ctx'> 	void *ptr;</div><div class='ctx'> 	u16 size;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	size = min_t(int, params-&gt;size, mlx5_mcia_max_bytes(dev));</div><div class='ctx'> </div><div class='hunk'>@@ -396,12 +393,9 @@ static int mlx5_query_mcia(struct mlx5_core_dev *dev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	status = MLX5_GET(mcia_reg, out, status);</div><div class='del'>-	if (status) {</div><div class='del'>-		mlx5_core_err(dev, "query_mcia_reg failed: status: 0x%x\n",</div><div class='del'>-			      status);</div><div class='add'>+	*status = MLX5_GET(mcia_reg, out, status);</div><div class='add'>+	if (*status)</div><div class='ctx'> 		return -EIO;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ptr = MLX5_ADDR_OF(mcia_reg, out, dword_0);</div><div class='ctx'> 	memcpy(data, ptr, size);</div><div class='hunk'>@@ -410,7 +404,7 @@ static int mlx5_query_mcia(struct mlx5_core_dev *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,</div><div class='del'>-			     u16 offset, u16 size, u8 *data)</div><div class='add'>+			     u16 offset, u16 size, u8 *data, u8 *status)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_module_eeprom_query_params query = {0};</div><div class='ctx'> 	u8 module_id;</div><div class='hunk'>@@ -420,7 +414,8 @@ int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_query_module_id(dev, query.module_number, &amp;module_id);</div><div class='add'>+	err = mlx5_query_module_id(dev, query.module_number, &amp;module_id,</div><div class='add'>+				   status);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -445,13 +440,12 @@ int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,</div><div class='ctx'> 	query.size = size;</div><div class='ctx'> 	query.offset = offset;</div><div class='ctx'> </div><div class='del'>-	return mlx5_query_mcia(dev, &amp;query, data);</div><div class='add'>+	return mlx5_query_mcia(dev, &amp;query, data, status);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_query_module_eeprom);</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev,</div><div class='ctx'> 				     struct mlx5_module_eeprom_query_params *params,</div><div class='del'>-				     u8 *data)</div><div class='add'>+				     u8 *data, u8 *status)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -465,9 +459,8 @@ int mlx5_query_module_eeprom_by_page(struct mlx5_core_dev *dev,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return mlx5_query_mcia(dev, params, data);</div><div class='add'>+	return mlx5_query_mcia(dev, params, data, status);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_query_module_eeprom_by_page);</div><div class='ctx'> </div><div class='ctx'> static int mlx5_query_port_pvlc(struct mlx5_core_dev *dev, u32 *pvlc,</div><div class='ctx'> 				int pvlc_size,  u8 local_port)</div><div class='hunk'>@@ -518,7 +511,6 @@ int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 rx_pause, u32 tx_pause)</div><div class='ctx'> 	return mlx5_core_access_reg(dev, in, sizeof(in), out,</div><div class='ctx'> 				    sizeof(out), MLX5_REG_PFCC, 0, 1);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_set_port_pause);</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_port_pause(struct mlx5_core_dev *dev,</div><div class='ctx'> 			  u32 *rx_pause, u32 *tx_pause)</div><div class='hunk'>@@ -538,7 +530,6 @@ int mlx5_query_port_pause(struct mlx5_core_dev *dev,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_query_port_pause);</div><div class='ctx'> </div><div class='ctx'> int mlx5_set_port_stall_watermark(struct mlx5_core_dev *dev,</div><div class='ctx'> 				  u16 stall_critical_watermark,</div><div class='hunk'>@@ -597,7 +588,6 @@ int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx)</div><div class='ctx'> 	return mlx5_core_access_reg(dev, in, sizeof(in), out,</div><div class='ctx'> 				    sizeof(out), MLX5_REG_PFCC, 0, 1);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_set_port_pfc);</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, u8 *pfc_en_rx)</div><div class='ctx'> {</div><div class='hunk'>@@ -616,7 +606,6 @@ int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, u8 *pfc_en_rx)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_query_port_pfc);</div><div class='ctx'> </div><div class='ctx'> int mlx5_max_tc(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -667,7 +656,6 @@ int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, u8 *prio_tc)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_set_port_prio_tc);</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			    u8 prio, u8 *tc)</div><div class='hunk'>@@ -689,7 +677,6 @@ int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_query_port_prio_tc);</div><div class='ctx'> </div><div class='ctx'> static int mlx5_set_port_qetcr_reg(struct mlx5_core_dev *mdev, u32 *in,</div><div class='ctx'> 				   int inlen)</div><div class='hunk'>@@ -728,7 +715,6 @@ int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, u8 *tc_group)</div><div class='ctx'> </div><div class='ctx'> 	return mlx5_set_port_qetcr_reg(mdev, in, sizeof(in));</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_set_port_tc_group);</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			     u8 tc, u8 *tc_group)</div><div class='hunk'>@@ -749,7 +735,6 @@ int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_query_port_tc_group);</div><div class='ctx'> </div><div class='ctx'> int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw)</div><div class='ctx'> {</div><div class='hunk'>@@ -763,7 +748,6 @@ int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *tc_bw)</div><div class='ctx'> </div><div class='ctx'> 	return mlx5_set_port_qetcr_reg(mdev, in, sizeof(in));</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_set_port_tc_bw_alloc);</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				u8 tc, u8 *bw_pct)</div><div class='hunk'>@@ -784,7 +768,6 @@ int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_query_port_tc_bw_alloc);</div><div class='ctx'> </div><div class='ctx'> int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				    u8 *max_bw_value,</div><div class='hunk'>@@ -808,7 +791,6 @@ int mlx5_modify_port_ets_rate_limit(struct mlx5_core_dev *mdev,</div><div class='ctx'> </div><div class='ctx'> 	return mlx5_set_port_qetcr_reg(mdev, in, sizeof(in));</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_modify_port_ets_rate_limit);</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				   u8 *max_bw_value,</div><div class='hunk'>@@ -834,7 +816,6 @@ int mlx5_query_port_ets_rate_limit(struct mlx5_core_dev *mdev,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_query_port_ets_rate_limit);</div><div class='ctx'> </div><div class='ctx'> int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode)</div><div class='ctx'> {</div><div class='hunk'>@@ -845,7 +826,6 @@ int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode)</div><div class='ctx'> 	MLX5_SET(set_wol_rol_in, in, wol_mode, wol_mode);</div><div class='ctx'> 	return mlx5_cmd_exec_in(mdev, set_wol_rol, in);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_set_port_wol);</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode)</div><div class='ctx'> {</div><div class='hunk'>@@ -860,7 +840,6 @@ int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode)</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mlx5_query_port_wol);</div><div class='ctx'> </div><div class='ctx'> int mlx5_query_ports_check(struct mlx5_core_dev *mdev, u32 *out, int outlen)</div><div class='ctx'> {</div><div class='hunk'>@@ -988,6 +967,26 @@ int mlx5_query_trust_state(struct mlx5_core_dev *mdev, u8 *trust_state)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mlx5_query_port_buffer_ownership(struct mlx5_core_dev *mdev,</div><div class='add'>+				     u8 *buffer_ownership)</div><div class='add'>+{</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(pfcc_reg)] = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!MLX5_CAP_PCAM_FEATURE(mdev, buffer_ownership)) {</div><div class='add'>+		*buffer_ownership = MLX5_BUF_OWNERSHIP_UNKNOWN;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mlx5_query_pfcc_reg(mdev, out, sizeof(out));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*buffer_ownership = MLX5_GET(pfcc_reg, out, buf_ownership);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5_set_dscp2prio(struct mlx5_core_dev *mdev, u8 dscp, u8 prio)</div><div class='ctx'> {</div><div class='ctx'> 	int sz = MLX5_ST_SZ_BYTES(qpdpm_reg);</div><div class='hunk'>@@ -1058,53 +1057,58 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* speed in units of 1Mb */</div><div class='del'>-static const u32 mlx5e_link_speed[MLX5E_LINK_MODES_NUMBER] = {</div><div class='del'>-	[MLX5E_1000BASE_CX_SGMII] = 1000,</div><div class='del'>-	[MLX5E_1000BASE_KX]       = 1000,</div><div class='del'>-	[MLX5E_10GBASE_CX4]       = 10000,</div><div class='del'>-	[MLX5E_10GBASE_KX4]       = 10000,</div><div class='del'>-	[MLX5E_10GBASE_KR]        = 10000,</div><div class='del'>-	[MLX5E_20GBASE_KR2]       = 20000,</div><div class='del'>-	[MLX5E_40GBASE_CR4]       = 40000,</div><div class='del'>-	[MLX5E_40GBASE_KR4]       = 40000,</div><div class='del'>-	[MLX5E_56GBASE_R4]        = 56000,</div><div class='del'>-	[MLX5E_10GBASE_CR]        = 10000,</div><div class='del'>-	[MLX5E_10GBASE_SR]        = 10000,</div><div class='del'>-	[MLX5E_10GBASE_ER]        = 10000,</div><div class='del'>-	[MLX5E_40GBASE_SR4]       = 40000,</div><div class='del'>-	[MLX5E_40GBASE_LR4]       = 40000,</div><div class='del'>-	[MLX5E_50GBASE_SR2]       = 50000,</div><div class='del'>-	[MLX5E_100GBASE_CR4]      = 100000,</div><div class='del'>-	[MLX5E_100GBASE_SR4]      = 100000,</div><div class='del'>-	[MLX5E_100GBASE_KR4]      = 100000,</div><div class='del'>-	[MLX5E_100GBASE_LR4]      = 100000,</div><div class='del'>-	[MLX5E_100BASE_TX]        = 100,</div><div class='del'>-	[MLX5E_1000BASE_T]        = 1000,</div><div class='del'>-	[MLX5E_10GBASE_T]         = 10000,</div><div class='del'>-	[MLX5E_25GBASE_CR]        = 25000,</div><div class='del'>-	[MLX5E_25GBASE_KR]        = 25000,</div><div class='del'>-	[MLX5E_25GBASE_SR]        = 25000,</div><div class='del'>-	[MLX5E_50GBASE_CR2]       = 50000,</div><div class='del'>-	[MLX5E_50GBASE_KR2]       = 50000,</div><div class='add'>+static const struct mlx5_link_info mlx5e_link_info[MLX5E_LINK_MODES_NUMBER] = {</div><div class='add'>+	[MLX5E_1000BASE_CX_SGMII]	= {.speed = 1000, .lanes = 1},</div><div class='add'>+	[MLX5E_1000BASE_KX]		= {.speed = 1000, .lanes = 1},</div><div class='add'>+	[MLX5E_10GBASE_CX4]		= {.speed = 10000, .lanes = 4},</div><div class='add'>+	[MLX5E_10GBASE_KX4]		= {.speed = 10000, .lanes = 4},</div><div class='add'>+	[MLX5E_10GBASE_KR]		= {.speed = 10000, .lanes = 1},</div><div class='add'>+	[MLX5E_20GBASE_KR2]		= {.speed = 20000, .lanes = 2},</div><div class='add'>+	[MLX5E_40GBASE_CR4]		= {.speed = 40000, .lanes = 4},</div><div class='add'>+	[MLX5E_40GBASE_KR4]		= {.speed = 40000, .lanes = 4},</div><div class='add'>+	[MLX5E_56GBASE_R4]		= {.speed = 56000, .lanes = 4},</div><div class='add'>+	[MLX5E_10GBASE_CR]		= {.speed = 10000, .lanes = 1},</div><div class='add'>+	[MLX5E_10GBASE_SR]		= {.speed = 10000, .lanes = 1},</div><div class='add'>+	[MLX5E_10GBASE_ER]		= {.speed = 10000, .lanes = 1},</div><div class='add'>+	[MLX5E_40GBASE_SR4]		= {.speed = 40000, .lanes = 4},</div><div class='add'>+	[MLX5E_40GBASE_LR4]		= {.speed = 40000, .lanes = 4},</div><div class='add'>+	[MLX5E_50GBASE_SR2]		= {.speed = 50000, .lanes = 2},</div><div class='add'>+	[MLX5E_100GBASE_CR4]		= {.speed = 100000, .lanes = 4},</div><div class='add'>+	[MLX5E_100GBASE_SR4]		= {.speed = 100000, .lanes = 4},</div><div class='add'>+	[MLX5E_100GBASE_KR4]		= {.speed = 100000, .lanes = 4},</div><div class='add'>+	[MLX5E_100GBASE_LR4]		= {.speed = 100000, .lanes = 4},</div><div class='add'>+	[MLX5E_100BASE_TX]		= {.speed = 100, .lanes = 1},</div><div class='add'>+	[MLX5E_1000BASE_T]		= {.speed = 1000, .lanes = 1},</div><div class='add'>+	[MLX5E_10GBASE_T]		= {.speed = 10000, .lanes = 1},</div><div class='add'>+	[MLX5E_25GBASE_CR]		= {.speed = 25000, .lanes = 1},</div><div class='add'>+	[MLX5E_25GBASE_KR]		= {.speed = 25000, .lanes = 1},</div><div class='add'>+	[MLX5E_25GBASE_SR]		= {.speed = 25000, .lanes = 1},</div><div class='add'>+	[MLX5E_50GBASE_CR2]		= {.speed = 50000, .lanes = 2},</div><div class='add'>+	[MLX5E_50GBASE_KR2]		= {.speed = 50000, .lanes = 2},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u32 mlx5e_ext_link_speed[MLX5E_EXT_LINK_MODES_NUMBER] = {</div><div class='del'>-	[MLX5E_SGMII_100M] = 100,</div><div class='del'>-	[MLX5E_1000BASE_X_SGMII] = 1000,</div><div class='del'>-	[MLX5E_5GBASE_R] = 5000,</div><div class='del'>-	[MLX5E_10GBASE_XFI_XAUI_1] = 10000,</div><div class='del'>-	[MLX5E_40GBASE_XLAUI_4_XLPPI_4] = 40000,</div><div class='del'>-	[MLX5E_25GAUI_1_25GBASE_CR_KR] = 25000,</div><div class='del'>-	[MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2] = 50000,</div><div class='del'>-	[MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR] = 50000,</div><div class='del'>-	[MLX5E_CAUI_4_100GBASE_CR4_KR4] = 100000,</div><div class='del'>-	[MLX5E_100GAUI_2_100GBASE_CR2_KR2] = 100000,</div><div class='del'>-	[MLX5E_200GAUI_4_200GBASE_CR4_KR4] = 200000,</div><div class='del'>-	[MLX5E_400GAUI_8_400GBASE_CR8] = 400000,</div><div class='del'>-	[MLX5E_100GAUI_1_100GBASE_CR_KR] = 100000,</div><div class='del'>-	[MLX5E_200GAUI_2_200GBASE_CR2_KR2] = 200000,</div><div class='del'>-	[MLX5E_400GAUI_4_400GBASE_CR4_KR4] = 400000,</div><div class='del'>-	[MLX5E_800GAUI_8_800GBASE_CR8_KR8] = 800000,</div><div class='add'>+static const struct mlx5_link_info</div><div class='add'>+mlx5e_ext_link_info[MLX5E_EXT_LINK_MODES_NUMBER] = {</div><div class='add'>+	[MLX5E_SGMII_100M]			= {.speed = 100, .lanes = 1},</div><div class='add'>+	[MLX5E_1000BASE_X_SGMII]		= {.speed = 1000, .lanes = 1},</div><div class='add'>+	[MLX5E_5GBASE_R]			= {.speed = 5000, .lanes = 1},</div><div class='add'>+	[MLX5E_10GBASE_XFI_XAUI_1]		= {.speed = 10000, .lanes = 1},</div><div class='add'>+	[MLX5E_40GBASE_XLAUI_4_XLPPI_4]		= {.speed = 40000, .lanes = 4},</div><div class='add'>+	[MLX5E_25GAUI_1_25GBASE_CR_KR]		= {.speed = 25000, .lanes = 1},</div><div class='add'>+	[MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2]	= {.speed = 50000, .lanes = 2},</div><div class='add'>+	[MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR]	= {.speed = 50000, .lanes = 1},</div><div class='add'>+	[MLX5E_CAUI_4_100GBASE_CR4_KR4]		= {.speed = 100000, .lanes = 4},</div><div class='add'>+	[MLX5E_100GAUI_2_100GBASE_CR2_KR2]	= {.speed = 100000, .lanes = 2},</div><div class='add'>+	[MLX5E_200GAUI_4_200GBASE_CR4_KR4]	= {.speed = 200000, .lanes = 4},</div><div class='add'>+	[MLX5E_400GAUI_8_400GBASE_CR8]		= {.speed = 400000, .lanes = 8},</div><div class='add'>+	[MLX5E_100GAUI_1_100GBASE_CR_KR]	= {.speed = 100000, .lanes = 1},</div><div class='add'>+	[MLX5E_200GAUI_2_200GBASE_CR2_KR2]	= {.speed = 200000, .lanes = 2},</div><div class='add'>+	[MLX5E_400GAUI_4_400GBASE_CR4_KR4]	= {.speed = 400000, .lanes = 4},</div><div class='add'>+	[MLX5E_800GAUI_8_800GBASE_CR8_KR8]	= {.speed = 800000, .lanes = 8},</div><div class='add'>+	[MLX5E_200GAUI_1_200GBASE_CR1_KR1]	= {.speed = 200000, .lanes = 1},</div><div class='add'>+	[MLX5E_400GAUI_2_400GBASE_CR2_KR2]	= {.speed = 400000, .lanes = 2},</div><div class='add'>+	[MLX5E_800GAUI_4_800GBASE_CR4_KR4]	= {.speed = 800000, .lanes = 4},</div><div class='add'>+	[MLX5E_1600TAUI_8_1600TBASE_CR8_KR8]	= {.speed = 1600000, .lanes = 8},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,</div><div class='hunk'>@@ -1142,54 +1146,65 @@ bool mlx5_ptys_ext_supported(struct mlx5_core_dev *mdev)</div><div class='ctx'> 	return !!eproto.cap;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5e_port_get_speed_arr(struct mlx5_core_dev *mdev,</div><div class='del'>-				     const u32 **arr, u32 *size,</div><div class='del'>-				     bool force_legacy)</div><div class='add'>+static void mlx5e_port_get_link_mode_info_arr(struct mlx5_core_dev *mdev,</div><div class='add'>+					      const struct mlx5_link_info **arr,</div><div class='add'>+					      u32 *size,</div><div class='add'>+					      bool force_legacy)</div><div class='ctx'> {</div><div class='ctx'> 	bool ext = force_legacy ? false : mlx5_ptys_ext_supported(mdev);</div><div class='ctx'> </div><div class='del'>-	*size = ext ? ARRAY_SIZE(mlx5e_ext_link_speed) :</div><div class='del'>-		      ARRAY_SIZE(mlx5e_link_speed);</div><div class='del'>-	*arr  = ext ? mlx5e_ext_link_speed : mlx5e_link_speed;</div><div class='add'>+	*size = ext ? ARRAY_SIZE(mlx5e_ext_link_info) :</div><div class='add'>+		      ARRAY_SIZE(mlx5e_link_info);</div><div class='add'>+	*arr  = ext ? mlx5e_ext_link_info : mlx5e_link_info;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u32 mlx5_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper,</div><div class='del'>-			 bool force_legacy)</div><div class='add'>+const struct mlx5_link_info *mlx5_port_ptys2info(struct mlx5_core_dev *mdev,</div><div class='add'>+						 u32 eth_proto_oper,</div><div class='add'>+						 bool force_legacy)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long temp = eth_proto_oper;</div><div class='del'>-	const u32 *table;</div><div class='del'>-	u32 speed = 0;</div><div class='add'>+	const struct mlx5_link_info *table;</div><div class='ctx'> 	u32 max_size;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	mlx5e_port_get_speed_arr(mdev, &amp;table, &amp;max_size, force_legacy);</div><div class='add'>+	mlx5e_port_get_link_mode_info_arr(mdev, &amp;table, &amp;max_size,</div><div class='add'>+					  force_legacy);</div><div class='ctx'> 	i = find_first_bit(&amp;temp, max_size);</div><div class='del'>-	if (i &lt; max_size)</div><div class='del'>-		speed = table[i];</div><div class='del'>-	return speed;</div><div class='add'>+</div><div class='add'>+	/* mlx5e_link_info has holes. Check speed</div><div class='add'>+	 * is not zero as indication of one.</div><div class='add'>+	 */</div><div class='add'>+	if (i &lt; max_size &amp;&amp; table[i].speed)</div><div class='add'>+		return &amp;table[i];</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u32 mlx5_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed,</div><div class='del'>-			      bool force_legacy)</div><div class='add'>+u32 mlx5_port_info2linkmodes(struct mlx5_core_dev *mdev,</div><div class='add'>+			     struct mlx5_link_info *info,</div><div class='add'>+			     bool force_legacy)</div><div class='ctx'> {</div><div class='add'>+	const struct mlx5_link_info *table;</div><div class='ctx'> 	u32 link_modes = 0;</div><div class='del'>-	const u32 *table;</div><div class='ctx'> 	u32 max_size;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	mlx5e_port_get_speed_arr(mdev, &amp;table, &amp;max_size, force_legacy);</div><div class='add'>+	mlx5e_port_get_link_mode_info_arr(mdev, &amp;table, &amp;max_size,</div><div class='add'>+					  force_legacy);</div><div class='ctx'> 	for (i = 0; i &lt; max_size; ++i) {</div><div class='del'>-		if (table[i] == speed)</div><div class='del'>-			link_modes |= MLX5E_PROT_MASK(i);</div><div class='add'>+		if (table[i].speed == info-&gt;speed) {</div><div class='add'>+			if (!info-&gt;lanes || table[i].lanes == info-&gt;lanes)</div><div class='add'>+				link_modes |= MLX5E_PROT_MASK(i);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return link_modes;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)</div><div class='ctx'> {</div><div class='add'>+	const struct mlx5_link_info *table;</div><div class='ctx'> 	struct mlx5_port_eth_proto eproto;</div><div class='ctx'> 	u32 max_speed = 0;</div><div class='del'>-	const u32 *table;</div><div class='ctx'> 	u32 max_size;</div><div class='ctx'> 	bool ext;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1200,10 +1215,10 @@ int mlx5_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	mlx5e_port_get_speed_arr(mdev, &amp;table, &amp;max_size, false);</div><div class='add'>+	mlx5e_port_get_link_mode_info_arr(mdev, &amp;table, &amp;max_size, false);</div><div class='ctx'> 	for (i = 0; i &lt; max_size; ++i)</div><div class='ctx'> 		if (eproto.cap &amp; MLX5E_PROT_MASK(i))</div><div class='del'>-			max_speed = max(max_speed, table[i]);</div><div class='add'>+			max_speed = max(max_speed, table[i].speed);</div><div class='ctx'> </div><div class='ctx'> 	*speed = max_speed;</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/rdma.c b/drivers/net/ethernet/mellanox/mlx5/core/rdma.c<br/>index a42f6cd99b74..5c552b71e371 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/rdma.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/rdma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/rdma.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/rdma.c</a></div><div class='hunk'>@@ -118,8 +118,8 @@ static void mlx5_rdma_make_default_gid(struct mlx5_core_dev *dev, union ib_gid *</div><div class='ctx'> </div><div class='ctx'> static int mlx5_rdma_add_roce_addr(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='add'>+	u8 mac[ETH_ALEN] = {};</div><div class='ctx'> 	union ib_gid gid;</div><div class='del'>-	u8 mac[ETH_ALEN];</div><div class='ctx'> </div><div class='ctx'> 	mlx5_rdma_make_default_gid(dev, &amp;gid);</div><div class='ctx'> 	return mlx5_core_roce_gid_set(dev, 0,</div><div class='hunk'>@@ -140,17 +140,17 @@ void mlx5_rdma_disable_roce(struct mlx5_core_dev *dev)</div><div class='ctx'> 	mlx5_nic_vport_disable_roce(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5_rdma_enable_roce(struct mlx5_core_dev *dev)</div><div class='add'>+int mlx5_rdma_enable_roce(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!MLX5_CAP_GEN(dev, roce))</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_nic_vport_enable_roce(dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		mlx5_core_err(dev, "Failed to enable RoCE: %d\n", err);</div><div class='del'>-		return;</div><div class='add'>+		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = mlx5_rdma_add_roce_addr(dev);</div><div class='hunk'>@@ -165,10 +165,11 @@ void mlx5_rdma_enable_roce(struct mlx5_core_dev *dev)</div><div class='ctx'> 		goto del_roce_addr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='add'>+	return err;</div><div class='ctx'> </div><div class='ctx'> del_roce_addr:</div><div class='ctx'> 	mlx5_rdma_del_roce_addr(dev);</div><div class='ctx'> disable_roce:</div><div class='ctx'> 	mlx5_nic_vport_disable_roce(dev);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/rdma.h b/drivers/net/ethernet/mellanox/mlx5/core/rdma.h<br/>index 750cff2a71a4..3d9e76c3d42f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/rdma.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/rdma.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/rdma.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/rdma.h</a></div><div class='hunk'>@@ -8,12 +8,12 @@</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_MLX5_ESWITCH</div><div class='ctx'> </div><div class='del'>-void mlx5_rdma_enable_roce(struct mlx5_core_dev *dev);</div><div class='add'>+int mlx5_rdma_enable_roce(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_rdma_disable_roce(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='ctx'> #else /* CONFIG_MLX5_ESWITCH */</div><div class='ctx'> </div><div class='del'>-static inline void mlx5_rdma_enable_roce(struct mlx5_core_dev *dev) {}</div><div class='add'>+static inline int mlx5_rdma_enable_roce(struct mlx5_core_dev *dev) { return 0; }</div><div class='ctx'> static inline void mlx5_rdma_disable_roce(struct mlx5_core_dev *dev) {}</div><div class='ctx'> </div><div class='ctx'> #endif /* CONFIG_MLX5_ESWITCH */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/rl.c b/drivers/net/ethernet/mellanox/mlx5/core/rl.c<br/>index e393391966e0..39a209b9b684 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/rl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/rl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/rl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/rl.c</a></div><div class='hunk'>@@ -56,6 +56,8 @@ bool mlx5_qos_tsar_type_supported(struct mlx5_core_dev *dev, int type, u8 hierar</div><div class='ctx'> 		return cap &amp; TSAR_TYPE_CAP_MASK_ROUND_ROBIN;</div><div class='ctx'> 	case TSAR_ELEMENT_TSAR_TYPE_ETS:</div><div class='ctx'> 		return cap &amp; TSAR_TYPE_CAP_MASK_ETS;</div><div class='add'>+	case TSAR_ELEMENT_TSAR_TYPE_TC_ARB:</div><div class='add'>+		return cap &amp; TSAR_TYPE_CAP_MASK_TC_ARB;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='hunk'>@@ -87,6 +89,8 @@ bool mlx5_qos_element_type_supported(struct mlx5_core_dev *dev, int type, u8 hie</div><div class='ctx'> 		return cap &amp; ELEMENT_TYPE_CAP_MASK_PARA_VPORT_TC;</div><div class='ctx'> 	case SCHEDULING_CONTEXT_ELEMENT_TYPE_QUEUE_GROUP:</div><div class='ctx'> 		return cap &amp; ELEMENT_TYPE_CAP_MASK_QUEUE_GROUP;</div><div class='add'>+	case SCHEDULING_CONTEXT_ELEMENT_TYPE_RATE_LIMIT:</div><div class='add'>+		return cap &amp; ELEMENT_TYPE_CAP_MASK_RATE_LIMIT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c b/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c<br/>index 99219ea52c4b..f310bde3d11f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c</a></div><div class='hunk'>@@ -16,7 +16,6 @@ struct mlx5_sf_dev_table {</div><div class='ctx'> 	struct xarray devices;</div><div class='ctx'> 	phys_addr_t base_address;</div><div class='ctx'> 	u64 sf_bar_length;</div><div class='del'>-	struct notifier_block nb;</div><div class='ctx'> 	struct workqueue_struct *active_wq;</div><div class='ctx'> 	struct work_struct work;</div><div class='ctx'> 	u8 stop_active_wq:1;</div><div class='hunk'>@@ -156,18 +155,23 @@ static void mlx5_sf_dev_del(struct mlx5_core_dev *dev, struct mlx5_sf_dev *sf_de</div><div class='ctx'> static int</div><div class='ctx'> mlx5_sf_dev_state_change_handler(struct notifier_block *nb, unsigned long event_code, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_sf_dev_table *table = container_of(nb, struct mlx5_sf_dev_table, nb);</div><div class='add'>+	struct mlx5_core_dev *dev = container_of(nb, struct mlx5_core_dev,</div><div class='add'>+						 priv.sf_dev_nb);</div><div class='add'>+	struct mlx5_sf_dev_table *table = dev-&gt;priv.sf_dev_table;</div><div class='ctx'> 	const struct mlx5_vhca_state_event *event = data;</div><div class='ctx'> 	struct mlx5_sf_dev *sf_dev;</div><div class='ctx'> 	u16 max_functions;</div><div class='ctx'> 	u16 sf_index;</div><div class='ctx'> 	u16 base_id;</div><div class='ctx'> </div><div class='del'>-	max_functions = mlx5_sf_max_functions(table-&gt;dev);</div><div class='add'>+	if (!table)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	max_functions = mlx5_sf_max_functions(dev);</div><div class='ctx'> 	if (!max_functions)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	base_id = mlx5_sf_start_function_id(table-&gt;dev);</div><div class='add'>+	base_id = mlx5_sf_start_function_id(dev);</div><div class='ctx'> 	if (event-&gt;function_id &lt; base_id || event-&gt;function_id &gt;= (base_id + max_functions))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -177,19 +181,19 @@ mlx5_sf_dev_state_change_handler(struct notifier_block *nb, unsigned long event_</div><div class='ctx'> 	case MLX5_VHCA_STATE_INVALID:</div><div class='ctx'> 	case MLX5_VHCA_STATE_ALLOCATED:</div><div class='ctx'> 		if (sf_dev)</div><div class='del'>-			mlx5_sf_dev_del(table-&gt;dev, sf_dev, sf_index);</div><div class='add'>+			mlx5_sf_dev_del(dev, sf_dev, sf_index);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5_VHCA_STATE_TEARDOWN_REQUEST:</div><div class='ctx'> 		if (sf_dev)</div><div class='del'>-			mlx5_sf_dev_del(table-&gt;dev, sf_dev, sf_index);</div><div class='add'>+			mlx5_sf_dev_del(dev, sf_dev, sf_index);</div><div class='ctx'> 		else</div><div class='del'>-			mlx5_core_err(table-&gt;dev,</div><div class='add'>+			mlx5_core_err(dev,</div><div class='ctx'> 				      "SF DEV: teardown state for invalid dev index=%d sfnum=0x%x\n",</div><div class='ctx'> 				      sf_index, event-&gt;sw_function_id);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5_VHCA_STATE_ACTIVE:</div><div class='ctx'> 		if (!sf_dev)</div><div class='del'>-			mlx5_sf_dev_add(table-&gt;dev, sf_index, event-&gt;function_id,</div><div class='add'>+			mlx5_sf_dev_add(dev, sf_index, event-&gt;function_id,</div><div class='ctx'> 					event-&gt;sw_function_id);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -315,6 +319,15 @@ static void mlx5_sf_dev_destroy_active_works(struct mlx5_sf_dev_table *table)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mlx5_sf_dev_notifier_init(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	if (mlx5_core_is_sf(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev-&gt;priv.sf_dev_nb.notifier_call = mlx5_sf_dev_state_change_handler;</div><div class='add'>+	return mlx5_vhca_event_notifier_register(dev, &amp;dev-&gt;priv.sf_dev_nb);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5_sf_dev_table_create(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_sf_dev_table *table;</div><div class='hunk'>@@ -329,17 +342,12 @@ void mlx5_sf_dev_table_create(struct mlx5_core_dev *dev)</div><div class='ctx'> 		goto table_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	table-&gt;nb.notifier_call = mlx5_sf_dev_state_change_handler;</div><div class='ctx'> 	table-&gt;dev = dev;</div><div class='ctx'> 	table-&gt;sf_bar_length = 1 &lt;&lt; (MLX5_CAP_GEN(dev, log_min_sf_size) + 12);</div><div class='ctx'> 	table-&gt;base_address = pci_resource_start(dev-&gt;pdev, 2);</div><div class='ctx'> 	xa_init(&amp;table-&gt;devices);</div><div class='ctx'> 	dev-&gt;priv.sf_dev_table = table;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_vhca_event_notifier_register(dev, &amp;table-&gt;nb);</div><div class='del'>-	if (err)</div><div class='del'>-		goto vhca_err;</div><div class='del'>-</div><div class='ctx'> 	err = mlx5_sf_dev_create_active_works(table);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto add_active_err;</div><div class='hunk'>@@ -351,10 +359,8 @@ void mlx5_sf_dev_table_create(struct mlx5_core_dev *dev)</div><div class='ctx'> </div><div class='ctx'> arm_err:</div><div class='ctx'> 	mlx5_sf_dev_destroy_active_works(table);</div><div class='del'>-add_active_err:</div><div class='del'>-	mlx5_vhca_event_notifier_unregister(dev, &amp;table-&gt;nb);</div><div class='ctx'> 	mlx5_vhca_event_work_queues_flush(dev);</div><div class='del'>-vhca_err:</div><div class='add'>+add_active_err:</div><div class='ctx'> 	kfree(table);</div><div class='ctx'> 	dev-&gt;priv.sf_dev_table = NULL;</div><div class='ctx'> table_err:</div><div class='hunk'>@@ -372,6 +378,14 @@ static void mlx5_sf_dev_destroy_all(struct mlx5_sf_dev_table *table)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void mlx5_sf_dev_notifier_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	if (mlx5_core_is_sf(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5_vhca_event_notifier_unregister(dev, &amp;dev-&gt;priv.sf_dev_nb);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mlx5_sf_dev_table_destroy(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_sf_dev_table *table = dev-&gt;priv.sf_dev_table;</div><div class='hunk'>@@ -380,8 +394,6 @@ void mlx5_sf_dev_table_destroy(struct mlx5_core_dev *dev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mlx5_sf_dev_destroy_active_works(table);</div><div class='del'>-	mlx5_vhca_event_notifier_unregister(dev, &amp;table-&gt;nb);</div><div class='del'>-	mlx5_vhca_event_work_queues_flush(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Now that event handler is not running, it is safe to destroy</div><div class='ctx'> 	 * the sf device without race.</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.h b/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.h<br/>index b99131e95e37..3ab0449c770c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.h</a></div><div class='hunk'>@@ -25,7 +25,9 @@ struct mlx5_sf_peer_devlink_event_ctx {</div><div class='ctx'> 	int err;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+int mlx5_sf_dev_notifier_init(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_sf_dev_table_create(struct mlx5_core_dev *dev);</div><div class='add'>+void mlx5_sf_dev_notifier_cleanup(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_sf_dev_table_destroy(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='ctx'> int mlx5_sf_driver_register(void);</div><div class='hunk'>@@ -35,10 +37,19 @@ bool mlx5_sf_dev_allocated(const struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='add'>+static inline int mlx5_sf_dev_notifier_init(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void mlx5_sf_dev_table_create(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void mlx5_sf_dev_notifier_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void mlx5_sf_dev_table_destroy(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/diag/dev_tracepoint.h b/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/diag/dev_tracepoint.h<br/>index 0537de86f981..9b0f44253f33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/diag/dev_tracepoint.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/diag/dev_tracepoint.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/diag/dev_tracepoint.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/diag/dev_tracepoint.h</a></div><div class='hunk'>@@ -28,7 +28,7 @@ DECLARE_EVENT_CLASS(mlx5_sf_dev_template,</div><div class='ctx'> 				   __entry-&gt;hw_fn_id = sfdev-&gt;fn_id;</div><div class='ctx'> 				   __entry-&gt;sfnum = sfdev-&gt;sfnum;</div><div class='ctx'> 		    ),</div><div class='del'>-		    TP_printk("(%s) sfdev=%pK aux_id=%d hw_id=0x%x sfnum=%u\n",</div><div class='add'>+		    TP_printk("(%s) sfdev=%p aux_id=%d hw_id=0x%x sfnum=%u\n",</div><div class='ctx'> 			      __get_str(devname), __entry-&gt;sfdev,</div><div class='ctx'> 			      __entry-&gt;aux_id, __entry-&gt;hw_fn_id,</div><div class='ctx'> 			      __entry-&gt;sfnum)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c b/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c<br/>index a96be98be032..b82323b8449e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c</a></div><div class='hunk'>@@ -31,9 +31,6 @@ struct mlx5_sf_table {</div><div class='ctx'> 	struct mlx5_core_dev *dev; /* To refer from notifier context. */</div><div class='ctx'> 	struct xarray function_ids; /* function id based lookup. */</div><div class='ctx'> 	struct mutex sf_state_lock; /* Serializes sf state among user cmds &amp; vhca event handler. */</div><div class='del'>-	struct notifier_block esw_nb;</div><div class='del'>-	struct notifier_block vhca_nb;</div><div class='del'>-	struct notifier_block mdev_nb;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct mlx5_sf *</div><div class='hunk'>@@ -257,6 +254,7 @@ static int mlx5_sf_add(struct mlx5_core_dev *dev, struct mlx5_sf_table *table,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> esw_err:</div><div class='add'>+	mlx5_sf_function_id_erase(table, sf);</div><div class='ctx'> 	mlx5_sf_free(table, sf);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -284,7 +282,7 @@ mlx5_sf_new_check_attr(struct mlx5_core_dev *dev, const struct devlink_port_new_</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "External controller is unsupported");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='del'>-	if (new_attr-&gt;pfnum != mlx5_get_dev_index(dev)) {</div><div class='add'>+	if (new_attr-&gt;pfnum != PCI_FUNC(dev-&gt;pdev-&gt;devfn)) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Invalid pfnum supplied");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -390,11 +388,16 @@ static bool mlx5_sf_state_update_check(const struct mlx5_sf *sf, u8 new_state)</div><div class='ctx'> </div><div class='ctx'> static int mlx5_sf_vhca_event(struct notifier_block *nb, unsigned long opcode, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_sf_table *table = container_of(nb, struct mlx5_sf_table, vhca_nb);</div><div class='add'>+	struct mlx5_core_dev *dev = container_of(nb, struct mlx5_core_dev,</div><div class='add'>+						 priv.sf_table_vhca_nb);</div><div class='add'>+	struct mlx5_sf_table *table = dev-&gt;priv.sf_table;</div><div class='ctx'> 	const struct mlx5_vhca_state_event *event = data;</div><div class='ctx'> 	bool update = false;</div><div class='ctx'> 	struct mlx5_sf *sf;</div><div class='ctx'> </div><div class='add'>+	if (!table)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;table-&gt;sf_state_lock);</div><div class='ctx'> 	sf = mlx5_sf_lookup_by_function_id(table, event-&gt;function_id);</div><div class='ctx'> 	if (!sf)</div><div class='hunk'>@@ -406,7 +409,7 @@ static int mlx5_sf_vhca_event(struct notifier_block *nb, unsigned long opcode, v</div><div class='ctx'> 	update = mlx5_sf_state_update_check(sf, event-&gt;new_vhca_state);</div><div class='ctx'> 	if (update)</div><div class='ctx'> 		sf-&gt;hw_state = event-&gt;new_vhca_state;</div><div class='del'>-	trace_mlx5_sf_update_state(table-&gt;dev, sf-&gt;port_index, sf-&gt;controller,</div><div class='add'>+	trace_mlx5_sf_update_state(dev, sf-&gt;port_index, sf-&gt;controller,</div><div class='ctx'> 				   sf-&gt;hw_fn_id, sf-&gt;hw_state);</div><div class='ctx'> unlock:</div><div class='ctx'> 	mutex_unlock(&amp;table-&gt;sf_state_lock);</div><div class='hunk'>@@ -424,12 +427,16 @@ static void mlx5_sf_del_all(struct mlx5_sf_table *table)</div><div class='ctx'> </div><div class='ctx'> static int mlx5_sf_esw_event(struct notifier_block *nb, unsigned long event, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_sf_table *table = container_of(nb, struct mlx5_sf_table, esw_nb);</div><div class='add'>+	struct mlx5_core_dev *dev = container_of(nb, struct mlx5_core_dev,</div><div class='add'>+						 priv.sf_table_esw_nb);</div><div class='ctx'> 	const struct mlx5_esw_event_info *mode = data;</div><div class='ctx'> </div><div class='add'>+	if (!dev-&gt;priv.sf_table)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	switch (mode-&gt;new_mode) {</div><div class='ctx'> 	case MLX5_ESWITCH_LEGACY:</div><div class='del'>-		mlx5_sf_del_all(table);</div><div class='add'>+		mlx5_sf_del_all(dev-&gt;priv.sf_table);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -440,15 +447,16 @@ static int mlx5_sf_esw_event(struct notifier_block *nb, unsigned long event, voi</div><div class='ctx'> </div><div class='ctx'> static int mlx5_sf_mdev_event(struct notifier_block *nb, unsigned long event, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_sf_table *table = container_of(nb, struct mlx5_sf_table, mdev_nb);</div><div class='add'>+	struct mlx5_core_dev *dev = container_of(nb, struct mlx5_core_dev,</div><div class='add'>+						 priv.sf_table_mdev_nb);</div><div class='ctx'> 	struct mlx5_sf_peer_devlink_event_ctx *event_ctx = data;</div><div class='add'>+	struct mlx5_sf_table *table = dev-&gt;priv.sf_table;</div><div class='ctx'> 	int ret = NOTIFY_DONE;</div><div class='ctx'> 	struct mlx5_sf *sf;</div><div class='ctx'> </div><div class='del'>-	if (event != MLX5_DRIVER_EVENT_SF_PEER_DEVLINK)</div><div class='add'>+	if (!table || event != MLX5_DRIVER_EVENT_SF_PEER_DEVLINK)</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;table-&gt;sf_state_lock);</div><div class='ctx'> 	sf = mlx5_sf_lookup_by_function_id(table, event_ctx-&gt;fn_id);</div><div class='ctx'> 	if (!sf)</div><div class='hunk'>@@ -463,10 +471,40 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mlx5_sf_notifiers_init(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (mlx5_core_is_sf(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev-&gt;priv.sf_table_esw_nb.notifier_call = mlx5_sf_esw_event;</div><div class='add'>+	err = mlx5_esw_event_notifier_register(dev, &amp;dev-&gt;priv.sf_table_esw_nb);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev-&gt;priv.sf_table_vhca_nb.notifier_call = mlx5_sf_vhca_event;</div><div class='add'>+	err = mlx5_vhca_event_notifier_register(dev,</div><div class='add'>+						&amp;dev-&gt;priv.sf_table_vhca_nb);</div><div class='add'>+	if (err)</div><div class='add'>+		goto vhca_err;</div><div class='add'>+</div><div class='add'>+	dev-&gt;priv.sf_table_mdev_nb.notifier_call = mlx5_sf_mdev_event;</div><div class='add'>+	err = mlx5_blocking_notifier_register(dev, &amp;dev-&gt;priv.sf_table_mdev_nb);</div><div class='add'>+	if (err)</div><div class='add'>+		goto mdev_err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+mdev_err:</div><div class='add'>+	mlx5_vhca_event_notifier_unregister(dev, &amp;dev-&gt;priv.sf_table_vhca_nb);</div><div class='add'>+vhca_err:</div><div class='add'>+	mlx5_esw_event_notifier_unregister(dev, &amp;dev-&gt;priv.sf_table_esw_nb);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5_sf_table_init(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_sf_table *table;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!mlx5_sf_table_supported(dev) || !mlx5_vhca_event_supported(dev))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -479,28 +517,18 @@ int mlx5_sf_table_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 	table-&gt;dev = dev;</div><div class='ctx'> 	xa_init(&amp;table-&gt;function_ids);</div><div class='ctx'> 	dev-&gt;priv.sf_table = table;</div><div class='del'>-	table-&gt;esw_nb.notifier_call = mlx5_sf_esw_event;</div><div class='del'>-	err = mlx5_esw_event_notifier_register(dev-&gt;priv.eswitch, &amp;table-&gt;esw_nb);</div><div class='del'>-	if (err)</div><div class='del'>-		goto reg_err;</div><div class='del'>-</div><div class='del'>-	table-&gt;vhca_nb.notifier_call = mlx5_sf_vhca_event;</div><div class='del'>-	err = mlx5_vhca_event_notifier_register(table-&gt;dev, &amp;table-&gt;vhca_nb);</div><div class='del'>-	if (err)</div><div class='del'>-		goto vhca_err;</div><div class='del'>-</div><div class='del'>-	table-&gt;mdev_nb.notifier_call = mlx5_sf_mdev_event;</div><div class='del'>-	mlx5_blocking_notifier_register(dev, &amp;table-&gt;mdev_nb);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-vhca_err:</div><div class='del'>-	mlx5_esw_event_notifier_unregister(dev-&gt;priv.eswitch, &amp;table-&gt;esw_nb);</div><div class='del'>-reg_err:</div><div class='del'>-	mutex_destroy(&amp;table-&gt;sf_state_lock);</div><div class='del'>-	kfree(table);</div><div class='del'>-	dev-&gt;priv.sf_table = NULL;</div><div class='del'>-	return err;</div><div class='add'>+void mlx5_sf_notifiers_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	if (mlx5_core_is_sf(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5_blocking_notifier_unregister(dev, &amp;dev-&gt;priv.sf_table_mdev_nb);</div><div class='add'>+	mlx5_vhca_event_notifier_unregister(dev, &amp;dev-&gt;priv.sf_table_vhca_nb);</div><div class='add'>+	mlx5_esw_event_notifier_unregister(dev, &amp;dev-&gt;priv.sf_table_esw_nb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_sf_table_cleanup(struct mlx5_core_dev *dev)</div><div class='hunk'>@@ -510,10 +538,17 @@ void mlx5_sf_table_cleanup(struct mlx5_core_dev *dev)</div><div class='ctx'> 	if (!table)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mlx5_blocking_notifier_unregister(dev, &amp;table-&gt;mdev_nb);</div><div class='del'>-	mlx5_vhca_event_notifier_unregister(table-&gt;dev, &amp;table-&gt;vhca_nb);</div><div class='del'>-	mlx5_esw_event_notifier_unregister(dev-&gt;priv.eswitch, &amp;table-&gt;esw_nb);</div><div class='ctx'> 	mutex_destroy(&amp;table-&gt;sf_state_lock);</div><div class='ctx'> 	WARN_ON(!xa_empty(&amp;table-&gt;function_ids));</div><div class='ctx'> 	kfree(table);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+bool mlx5_sf_table_empty(const struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_sf_table *table = dev-&gt;priv.sf_table;</div><div class='add'>+</div><div class='add'>+	if (!table)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return xa_empty(&amp;table-&gt;function_ids);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c b/drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c<br/>index 1f613320fe07..bd968f3b3855 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c</a></div><div class='hunk'>@@ -30,9 +30,7 @@ enum mlx5_sf_hwc_index {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5_sf_hw_table {</div><div class='del'>-	struct mlx5_core_dev *dev;</div><div class='ctx'> 	struct mutex table_lock; /* Serializes sf deletion and vhca state change handler. */</div><div class='del'>-	struct notifier_block vhca_nb;</div><div class='ctx'> 	struct mlx5_sf_hwc_table hwc[MLX5_SF_HWC_MAX];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -71,14 +69,16 @@ mlx5_sf_table_fn_to_hwc(struct mlx5_sf_hw_table *table, u16 fn_id)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlx5_sf_hw_table_id_alloc(struct mlx5_sf_hw_table *table, u32 controller,</div><div class='add'>+static int mlx5_sf_hw_table_id_alloc(struct mlx5_core_dev *dev,</div><div class='add'>+				     struct mlx5_sf_hw_table *table,</div><div class='add'>+				     u32 controller,</div><div class='ctx'> 				     u32 usr_sfnum)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_sf_hwc_table *hwc;</div><div class='ctx'> 	int free_idx = -1;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	hwc = mlx5_sf_controller_to_hwc(table-&gt;dev, controller);</div><div class='add'>+	hwc = mlx5_sf_controller_to_hwc(dev, controller);</div><div class='ctx'> 	if (!hwc-&gt;sfs)</div><div class='ctx'> 		return -ENOSPC;</div><div class='ctx'> </div><div class='hunk'>@@ -100,11 +100,13 @@ static int mlx5_sf_hw_table_id_alloc(struct mlx5_sf_hw_table *table, u32 control</div><div class='ctx'> 	return free_idx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_sf_hw_table_id_free(struct mlx5_sf_hw_table *table, u32 controller, int id)</div><div class='add'>+static void mlx5_sf_hw_table_id_free(struct mlx5_core_dev *dev,</div><div class='add'>+				     struct mlx5_sf_hw_table *table,</div><div class='add'>+				     u32 controller, int id)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_sf_hwc_table *hwc;</div><div class='ctx'> </div><div class='del'>-	hwc = mlx5_sf_controller_to_hwc(table-&gt;dev, controller);</div><div class='add'>+	hwc = mlx5_sf_controller_to_hwc(dev, controller);</div><div class='ctx'> 	hwc-&gt;sfs[id].allocated = false;</div><div class='ctx'> 	hwc-&gt;sfs[id].pending_delete = false;</div><div class='ctx'> }</div><div class='hunk'>@@ -120,7 +122,7 @@ int mlx5_sf_hw_table_sf_alloc(struct mlx5_core_dev *dev, u32 controller, u32 usr</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;table-&gt;table_lock);</div><div class='del'>-	sw_id = mlx5_sf_hw_table_id_alloc(table, controller, usr_sfnum);</div><div class='add'>+	sw_id = mlx5_sf_hw_table_id_alloc(dev, table, controller, usr_sfnum);</div><div class='ctx'> 	if (sw_id &lt; 0) {</div><div class='ctx'> 		err = sw_id;</div><div class='ctx'> 		goto exist_err;</div><div class='hunk'>@@ -151,7 +153,7 @@ int mlx5_sf_hw_table_sf_alloc(struct mlx5_core_dev *dev, u32 controller, u32 usr</div><div class='ctx'> vhca_err:</div><div class='ctx'> 	mlx5_cmd_dealloc_sf(dev, hw_fn_id);</div><div class='ctx'> err:</div><div class='del'>-	mlx5_sf_hw_table_id_free(table, controller, sw_id);</div><div class='add'>+	mlx5_sf_hw_table_id_free(dev, table, controller, sw_id);</div><div class='ctx'> exist_err:</div><div class='ctx'> 	mutex_unlock(&amp;table-&gt;table_lock);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -165,7 +167,7 @@ void mlx5_sf_hw_table_sf_free(struct mlx5_core_dev *dev, u32 controller, u16 id)</div><div class='ctx'> 	mutex_lock(&amp;table-&gt;table_lock);</div><div class='ctx'> 	hw_fn_id = mlx5_sf_sw_to_hw_id(dev, controller, id);</div><div class='ctx'> 	mlx5_cmd_dealloc_sf(dev, hw_fn_id);</div><div class='del'>-	mlx5_sf_hw_table_id_free(table, controller, id);</div><div class='add'>+	mlx5_sf_hw_table_id_free(dev, table, controller, id);</div><div class='ctx'> 	mutex_unlock(&amp;table-&gt;table_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -216,10 +218,12 @@ static void mlx5_sf_hw_table_hwc_dealloc_all(struct mlx5_core_dev *dev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_sf_hw_table_dealloc_all(struct mlx5_sf_hw_table *table)</div><div class='add'>+static void mlx5_sf_hw_table_dealloc_all(struct mlx5_core_dev *dev,</div><div class='add'>+					 struct mlx5_sf_hw_table *table)</div><div class='ctx'> {</div><div class='del'>-	mlx5_sf_hw_table_hwc_dealloc_all(table-&gt;dev, &amp;table-&gt;hwc[MLX5_SF_HWC_EXTERNAL]);</div><div class='del'>-	mlx5_sf_hw_table_hwc_dealloc_all(table-&gt;dev, &amp;table-&gt;hwc[MLX5_SF_HWC_LOCAL]);</div><div class='add'>+	mlx5_sf_hw_table_hwc_dealloc_all(dev,</div><div class='add'>+					 &amp;table-&gt;hwc[MLX5_SF_HWC_EXTERNAL]);</div><div class='add'>+	mlx5_sf_hw_table_hwc_dealloc_all(dev, &amp;table-&gt;hwc[MLX5_SF_HWC_LOCAL]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_sf_hw_table_hwc_init(struct mlx5_sf_hwc_table *hwc, u16 max_fn, u16 base_id)</div><div class='hunk'>@@ -301,7 +305,6 @@ int mlx5_sf_hw_table_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;table-&gt;table_lock);</div><div class='del'>-	table-&gt;dev = dev;</div><div class='ctx'> 	dev-&gt;priv.sf_hw_table = table;</div><div class='ctx'> </div><div class='ctx'> 	base_id = mlx5_sf_start_function_id(dev);</div><div class='hunk'>@@ -338,19 +341,22 @@ void mlx5_sf_hw_table_cleanup(struct mlx5_core_dev *dev)</div><div class='ctx'> 	mlx5_sf_hw_table_hwc_cleanup(&amp;table-&gt;hwc[MLX5_SF_HWC_LOCAL]);</div><div class='ctx'> 	mutex_destroy(&amp;table-&gt;table_lock);</div><div class='ctx'> 	kfree(table);</div><div class='add'>+	dev-&gt;priv.sf_hw_table = NULL;</div><div class='ctx'> res_unregister:</div><div class='ctx'> 	mlx5_sf_hw_table_res_unregister(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_sf_hw_vhca_event(struct notifier_block *nb, unsigned long opcode, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_sf_hw_table *table = container_of(nb, struct mlx5_sf_hw_table, vhca_nb);</div><div class='add'>+	struct mlx5_core_dev *dev = container_of(nb, struct mlx5_core_dev,</div><div class='add'>+						 priv.sf_hw_table_vhca_nb);</div><div class='add'>+	struct mlx5_sf_hw_table *table = dev-&gt;priv.sf_hw_table;</div><div class='ctx'> 	const struct mlx5_vhca_state_event *event = data;</div><div class='ctx'> 	struct mlx5_sf_hwc_table *hwc;</div><div class='ctx'> 	struct mlx5_sf_hw *sf_hw;</div><div class='ctx'> 	u16 sw_id;</div><div class='ctx'> </div><div class='del'>-	if (event-&gt;new_vhca_state != MLX5_VHCA_STATE_ALLOCATED)</div><div class='add'>+	if (!table || event-&gt;new_vhca_state != MLX5_VHCA_STATE_ALLOCATED)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	hwc = mlx5_sf_table_fn_to_hwc(table, event-&gt;function_id);</div><div class='hunk'>@@ -365,20 +371,28 @@ static int mlx5_sf_hw_vhca_event(struct notifier_block *nb, unsigned long opcode</div><div class='ctx'> 	 * Hence recycle the sf hardware id for reuse.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (sf_hw-&gt;allocated &amp;&amp; sf_hw-&gt;pending_delete)</div><div class='del'>-		mlx5_sf_hw_table_hwc_sf_free(table-&gt;dev, hwc, sw_id);</div><div class='add'>+		mlx5_sf_hw_table_hwc_sf_free(dev, hwc, sw_id);</div><div class='ctx'> 	mutex_unlock(&amp;table-&gt;table_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5_sf_hw_table_create(struct mlx5_core_dev *dev)</div><div class='add'>+int mlx5_sf_hw_notifier_init(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_sf_hw_table *table = dev-&gt;priv.sf_hw_table;</div><div class='del'>-</div><div class='del'>-	if (!table)</div><div class='add'>+	if (mlx5_core_is_sf(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	table-&gt;vhca_nb.notifier_call = mlx5_sf_hw_vhca_event;</div><div class='del'>-	return mlx5_vhca_event_notifier_register(dev, &amp;table-&gt;vhca_nb);</div><div class='add'>+	dev-&gt;priv.sf_hw_table_vhca_nb.notifier_call = mlx5_sf_hw_vhca_event;</div><div class='add'>+	return mlx5_vhca_event_notifier_register(dev,</div><div class='add'>+						 &amp;dev-&gt;priv.sf_hw_table_vhca_nb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_sf_hw_notifier_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	if (mlx5_core_is_sf(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5_vhca_event_notifier_unregister(dev,</div><div class='add'>+					    &amp;dev-&gt;priv.sf_hw_table_vhca_nb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_sf_hw_table_destroy(struct mlx5_core_dev *dev)</div><div class='hunk'>@@ -388,9 +402,8 @@ void mlx5_sf_hw_table_destroy(struct mlx5_core_dev *dev)</div><div class='ctx'> 	if (!table)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	mlx5_vhca_event_notifier_unregister(dev, &amp;table-&gt;vhca_nb);</div><div class='ctx'> 	/* Dealloc SFs whose firmware event has been missed. */</div><div class='del'>-	mlx5_sf_hw_table_dealloc_all(table);</div><div class='add'>+	mlx5_sf_hw_table_dealloc_all(dev, table);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool mlx5_sf_hw_table_supported(const struct mlx5_core_dev *dev)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/sf.h b/drivers/net/ethernet/mellanox/mlx5/core/sf/sf.h<br/>index 860f9ddb7107..d8a934a0e968 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/sf.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/sf.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/sf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/sf/sf.h</a></div><div class='hunk'>@@ -12,11 +12,15 @@</div><div class='ctx'> int mlx5_sf_hw_table_init(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_sf_hw_table_cleanup(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='del'>-int mlx5_sf_hw_table_create(struct mlx5_core_dev *dev);</div><div class='add'>+int mlx5_sf_hw_notifier_init(struct mlx5_core_dev *dev);</div><div class='add'>+void mlx5_sf_hw_notifier_cleanup(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_sf_hw_table_destroy(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='add'>+int mlx5_sf_notifiers_init(struct mlx5_core_dev *dev);</div><div class='ctx'> int mlx5_sf_table_init(struct mlx5_core_dev *dev);</div><div class='add'>+void mlx5_sf_notifiers_cleanup(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_sf_table_cleanup(struct mlx5_core_dev *dev);</div><div class='add'>+bool mlx5_sf_table_empty(const struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='ctx'> int mlx5_devlink_sf_port_new(struct devlink *devlink,</div><div class='ctx'> 			     const struct devlink_port_new_attrs *add_attr,</div><div class='hunk'>@@ -43,24 +47,42 @@ static inline void mlx5_sf_hw_table_cleanup(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int mlx5_sf_hw_table_create(struct mlx5_core_dev *dev)</div><div class='add'>+static inline int mlx5_sf_hw_notifier_init(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void mlx5_sf_hw_notifier_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void mlx5_sf_hw_table_destroy(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int mlx5_sf_notifiers_init(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int mlx5_sf_table_init(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void mlx5_sf_notifiers_cleanup(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline void mlx5_sf_table_cleanup(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool mlx5_sf_table_empty(const struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c b/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c<br/>index cda01ba441ae..b04cf6cf8956 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c</a></div><div class='hunk'>@@ -9,15 +9,9 @@</div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='ctx'> #include "diag/vhca_tracepoint.h"</div><div class='ctx'> </div><div class='del'>-struct mlx5_vhca_state_notifier {</div><div class='del'>-	struct mlx5_core_dev *dev;</div><div class='del'>-	struct mlx5_nb nb;</div><div class='del'>-	struct blocking_notifier_head n_head;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct mlx5_vhca_event_work {</div><div class='ctx'> 	struct work_struct work;</div><div class='del'>-	struct mlx5_vhca_state_notifier *notifier;</div><div class='add'>+	struct mlx5_core_dev *dev;</div><div class='ctx'> 	struct mlx5_vhca_state_event event;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -95,16 +89,14 @@ mlx5_vhca_event_notify(struct mlx5_core_dev *dev, struct mlx5_vhca_state_event *</div><div class='ctx'> 	mlx5_vhca_event_arm(dev, event-&gt;function_id);</div><div class='ctx'> 	trace_mlx5_sf_vhca_event(dev, event);</div><div class='ctx'> </div><div class='del'>-	blocking_notifier_call_chain(&amp;dev-&gt;priv.vhca_state_notifier-&gt;n_head, 0, event);</div><div class='add'>+	blocking_notifier_call_chain(&amp;dev-&gt;priv.vhca_state_n_head, 0, event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlx5_vhca_state_work_handler(struct work_struct *_work)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5_vhca_event_work *work = container_of(_work, struct mlx5_vhca_event_work, work);</div><div class='del'>-	struct mlx5_vhca_state_notifier *notifier = work-&gt;notifier;</div><div class='del'>-	struct mlx5_core_dev *dev = notifier-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	mlx5_vhca_event_notify(dev, &amp;work-&gt;event);</div><div class='add'>+	mlx5_vhca_event_notify(work-&gt;dev, &amp;work-&gt;event);</div><div class='ctx'> 	kfree(work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -116,8 +108,8 @@ void mlx5_vhca_events_work_enqueue(struct mlx5_core_dev *dev, int idx, struct wo</div><div class='ctx'> static int</div><div class='ctx'> mlx5_vhca_state_change_notifier(struct notifier_block *nb, unsigned long type, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_vhca_state_notifier *notifier =</div><div class='del'>-				mlx5_nb_cof(nb, struct mlx5_vhca_state_notifier, nb);</div><div class='add'>+	struct mlx5_core_dev *dev = mlx5_nb_cof(nb, struct mlx5_core_dev,</div><div class='add'>+						priv.vhca_state_nb);</div><div class='ctx'> 	struct mlx5_vhca_event_work *work;</div><div class='ctx'> 	struct mlx5_eqe *eqe = data;</div><div class='ctx'> 	int wq_idx;</div><div class='hunk'>@@ -126,10 +118,10 @@ mlx5_vhca_state_change_notifier(struct notifier_block *nb, unsigned long type, v</div><div class='ctx'> 	if (!work)</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='ctx'> 	INIT_WORK(&amp;work-&gt;work, &amp;mlx5_vhca_state_work_handler);</div><div class='del'>-	work-&gt;notifier = notifier;</div><div class='add'>+	work-&gt;dev = dev;</div><div class='ctx'> 	work-&gt;event.function_id = be16_to_cpu(eqe-&gt;data.vhca_state.function_id);</div><div class='ctx'> 	wq_idx = work-&gt;event.function_id % MLX5_DEV_MAX_WQS;</div><div class='del'>-	mlx5_vhca_events_work_enqueue(notifier-&gt;dev, wq_idx, &amp;work-&gt;work);</div><div class='add'>+	mlx5_vhca_events_work_enqueue(dev, wq_idx, &amp;work-&gt;work);</div><div class='ctx'> 	return NOTIFY_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -145,9 +137,15 @@ void mlx5_vhca_state_cap_handle(struct mlx5_core_dev *dev, void *set_hca_cap)</div><div class='ctx'> 	MLX5_SET(cmd_hca_cap, set_hca_cap, event_on_vhca_state_teardown_request, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void mlx5_vhca_state_notifier_init(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	BLOCKING_INIT_NOTIFIER_HEAD(&amp;dev-&gt;priv.vhca_state_n_head);</div><div class='add'>+	MLX5_NB_INIT(&amp;dev-&gt;priv.vhca_state_nb, mlx5_vhca_state_change_notifier,</div><div class='add'>+		     VHCA_STATE_CHANGE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5_vhca_event_init(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_vhca_state_notifier *notifier;</div><div class='ctx'> 	char wq_name[MLX5_CMD_WQ_MAX_NAME];</div><div class='ctx'> 	struct mlx5_vhca_events *events;</div><div class='ctx'> 	int err, i;</div><div class='hunk'>@@ -160,7 +158,6 @@ int mlx5_vhca_event_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	events-&gt;dev = dev;</div><div class='del'>-	dev-&gt;priv.vhca_events = events;</div><div class='ctx'> 	for (i = 0; i &lt; MLX5_DEV_MAX_WQS; i++) {</div><div class='ctx'> 		snprintf(wq_name, MLX5_CMD_WQ_MAX_NAME, "mlx5_vhca_event%d", i);</div><div class='ctx'> 		events-&gt;handler[i].wq = create_singlethread_workqueue(wq_name);</div><div class='hunk'>@@ -169,20 +166,10 @@ int mlx5_vhca_event_init(struct mlx5_core_dev *dev)</div><div class='ctx'> 			goto err_create_wq;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	dev-&gt;priv.vhca_events = events;</div><div class='ctx'> </div><div class='del'>-	notifier = kzalloc(sizeof(*notifier), GFP_KERNEL);</div><div class='del'>-	if (!notifier) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_notifier;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;priv.vhca_state_notifier = notifier;</div><div class='del'>-	notifier-&gt;dev = dev;</div><div class='del'>-	BLOCKING_INIT_NOTIFIER_HEAD(&amp;notifier-&gt;n_head);</div><div class='del'>-	MLX5_NB_INIT(&amp;notifier-&gt;nb, mlx5_vhca_state_change_notifier, VHCA_STATE_CHANGE);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_notifier:</div><div class='ctx'> err_create_wq:</div><div class='ctx'> 	for (--i; i &gt;= 0; i--)</div><div class='ctx'> 		destroy_workqueue(events-&gt;handler[i].wq);</div><div class='hunk'>@@ -211,8 +198,6 @@ void mlx5_vhca_event_cleanup(struct mlx5_core_dev *dev)</div><div class='ctx'> 	if (!mlx5_vhca_event_supported(dev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	kfree(dev-&gt;priv.vhca_state_notifier);</div><div class='del'>-	dev-&gt;priv.vhca_state_notifier = NULL;</div><div class='ctx'> 	vhca_events = dev-&gt;priv.vhca_events;</div><div class='ctx'> 	for (i = 0; i &lt; MLX5_DEV_MAX_WQS; i++)</div><div class='ctx'> 		destroy_workqueue(vhca_events-&gt;handler[i].wq);</div><div class='hunk'>@@ -221,34 +206,30 @@ void mlx5_vhca_event_cleanup(struct mlx5_core_dev *dev)</div><div class='ctx'> </div><div class='ctx'> void mlx5_vhca_event_start(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_vhca_state_notifier *notifier;</div><div class='del'>-</div><div class='del'>-	if (!dev-&gt;priv.vhca_state_notifier)</div><div class='add'>+	if (!mlx5_vhca_event_supported(dev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	notifier = dev-&gt;priv.vhca_state_notifier;</div><div class='del'>-	mlx5_eq_notifier_register(dev, &amp;notifier-&gt;nb);</div><div class='add'>+	mlx5_eq_notifier_register(dev, &amp;dev-&gt;priv.vhca_state_nb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_vhca_event_stop(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5_vhca_state_notifier *notifier;</div><div class='del'>-</div><div class='del'>-	if (!dev-&gt;priv.vhca_state_notifier)</div><div class='add'>+	if (!mlx5_vhca_event_supported(dev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	notifier = dev-&gt;priv.vhca_state_notifier;</div><div class='del'>-	mlx5_eq_notifier_unregister(dev, &amp;notifier-&gt;nb);</div><div class='add'>+	mlx5_eq_notifier_unregister(dev, &amp;dev-&gt;priv.vhca_state_nb);</div><div class='add'>+</div><div class='add'>+	/* Flush workqueues of all pending events. */</div><div class='add'>+	mlx5_vhca_event_work_queues_flush(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5_vhca_event_notifier_register(struct mlx5_core_dev *dev, struct notifier_block *nb)</div><div class='ctx'> {</div><div class='del'>-	if (!dev-&gt;priv.vhca_state_notifier)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	return blocking_notifier_chain_register(&amp;dev-&gt;priv.vhca_state_notifier-&gt;n_head, nb);</div><div class='add'>+	return blocking_notifier_chain_register(&amp;dev-&gt;priv.vhca_state_n_head,</div><div class='add'>+						nb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_vhca_event_notifier_unregister(struct mlx5_core_dev *dev, struct notifier_block *nb)</div><div class='ctx'> {</div><div class='del'>-	blocking_notifier_chain_unregister(&amp;dev-&gt;priv.vhca_state_notifier-&gt;n_head, nb);</div><div class='add'>+	blocking_notifier_chain_unregister(&amp;dev-&gt;priv.vhca_state_n_head, nb);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.h b/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.h<br/>index 1725ba64f8af..52790423874c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.h</a></div><div class='hunk'>@@ -18,6 +18,7 @@ static inline bool mlx5_vhca_event_supported(const struct mlx5_core_dev *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void mlx5_vhca_state_cap_handle(struct mlx5_core_dev *dev, void *set_hca_cap);</div><div class='add'>+void mlx5_vhca_state_notifier_init(struct mlx5_core_dev *dev);</div><div class='ctx'> int mlx5_vhca_event_init(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_vhca_event_cleanup(struct mlx5_core_dev *dev);</div><div class='ctx'> void mlx5_vhca_event_start(struct mlx5_core_dev *dev);</div><div class='hunk'>@@ -37,6 +38,10 @@ static inline void mlx5_vhca_state_cap_handle(struct mlx5_core_dev *dev, void *s</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void mlx5_vhca_state_notifier_init(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int mlx5_vhca_event_init(struct mlx5_core_dev *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.h<br/>deleted file mode 100644<br/>index e2fc69867088..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,97 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='del'>-/* Copyright (c) 2022, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='del'>-</div><div class='del'>-#ifndef	_DR_STE_V1_</div><div class='del'>-#define	_DR_STE_V1_</div><div class='del'>-</div><div class='del'>-#include "dr_types.h"</div><div class='del'>-#include "dr_ste.h"</div><div class='del'>-</div><div class='del'>-bool dr_ste_v1_is_miss_addr_set(u8 *hw_ste_p);</div><div class='del'>-void dr_ste_v1_set_miss_addr(u8 *hw_ste_p, u64 miss_addr);</div><div class='del'>-u64 dr_ste_v1_get_miss_addr(u8 *hw_ste_p);</div><div class='del'>-void dr_ste_v1_set_byte_mask(u8 *hw_ste_p, u16 byte_mask);</div><div class='del'>-u16 dr_ste_v1_get_byte_mask(u8 *hw_ste_p);</div><div class='del'>-void dr_ste_v1_set_next_lu_type(u8 *hw_ste_p, u16 lu_type);</div><div class='del'>-u16 dr_ste_v1_get_next_lu_type(u8 *hw_ste_p);</div><div class='del'>-void dr_ste_v1_set_hit_addr(u8 *hw_ste_p, u64 icm_addr, u32 ht_size);</div><div class='del'>-void dr_ste_v1_init(u8 *hw_ste_p, u16 lu_type, bool is_rx, u16 gvmi);</div><div class='del'>-void dr_ste_v1_prepare_for_postsend(u8 *hw_ste_p, u32 ste_size);</div><div class='del'>-void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn, u8 *action_type_set,</div><div class='del'>-			      u32 actions_caps, u8 *last_ste,</div><div class='del'>-			      struct mlx5dr_ste_actions_attr *attr, u32 *added_stes);</div><div class='del'>-void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn, u8 *action_type_set,</div><div class='del'>-			      u32 actions_caps, u8 *last_ste,</div><div class='del'>-			      struct mlx5dr_ste_actions_attr *attr, u32 *added_stes);</div><div class='del'>-void dr_ste_v1_set_action_set(u8 *d_action, u8 hw_field, u8 shifter,</div><div class='del'>-			      u8 length, u32 data);</div><div class='del'>-void dr_ste_v1_set_action_add(u8 *d_action, u8 hw_field, u8 shifter,</div><div class='del'>-			      u8 length, u32 data);</div><div class='del'>-void dr_ste_v1_set_action_copy(u8 *d_action, u8 dst_hw_field, u8 dst_shifter,</div><div class='del'>-			       u8 dst_len, u8 src_hw_field, u8 src_shifter);</div><div class='del'>-int dr_ste_v1_set_action_decap_l3_list(void *data, u32 data_sz, u8 *hw_action,</div><div class='del'>-				       u32 hw_action_sz, u16 *used_hw_action_num);</div><div class='del'>-int dr_ste_v1_alloc_modify_hdr_ptrn_arg(struct mlx5dr_action *action);</div><div class='del'>-void dr_ste_v1_free_modify_hdr_ptrn_arg(struct mlx5dr_action *action);</div><div class='del'>-void dr_ste_v1_build_eth_l2_src_dst_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					 struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_eth_l3_ipv6_dst_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					  struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_eth_l3_ipv6_src_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					  struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_eth_l3_ipv4_5_tuple_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					      struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_eth_l2_src_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-				     struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_eth_l2_dst_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-				     struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_eth_l2_tnl_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-				     struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_eth_l3_ipv4_misc_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					   struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_eth_ipv6_l3_l4_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					 struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_mpls_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-			       struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_tnl_gre_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-				  struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_tnl_mpls_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-				   struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_tnl_mpls_over_udp_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					    struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_tnl_mpls_over_gre_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					    struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_icmp_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-			       struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_general_purpose_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					  struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_eth_l4_misc_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-				      struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_flex_parser_tnl_vxlan_gpe_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-						    struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_flex_parser_tnl_geneve_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-						 struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_tnl_header_0_1_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					 struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_register_0_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-				     struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_register_1_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-				     struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_src_gvmi_qpn_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-				       struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_flex_parser_0_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_flex_parser_1_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-							 struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_exist_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-							       struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_flex_parser_tnl_gtpu_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-					       struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_tnl_gtpu_flex_parser_0_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-						 struct mlx5dr_match_param *mask);</div><div class='del'>-void dr_ste_v1_build_tnl_gtpu_flex_parser_1_init(struct mlx5dr_ste_build *sb,</div><div class='del'>-						 struct mlx5dr_match_param *mask);</div><div class='del'>-</div><div class='del'>-#endif  /* _DR_STE_V1_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_action.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c<br/>index b27bb4106532..fe56b59e24c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_action.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_action.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> #define MLX5HWS_ACTION_METER_INIT_COLOR_OFFSET 1</div><div class='ctx'> </div><div class='hunk'>@@ -11,31 +11,29 @@</div><div class='ctx'> /* This is the longest supported action sequence for FDB table:</div><div class='ctx'>  * DECAP, POP_VLAN, MODIFY, CTR, ASO, PUSH_VLAN, MODIFY, ENCAP, Term.</div><div class='ctx'>  */</div><div class='del'>-static const u32 action_order_arr[MLX5HWS_TABLE_TYPE_MAX][MLX5HWS_ACTION_TYP_MAX] = {</div><div class='del'>-	[MLX5HWS_TABLE_TYPE_FDB] = {</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_REMOVE_HEADER) |</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_POP_VLAN),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_POP_VLAN),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_MODIFY_HDR),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_PUSH_VLAN),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_PUSH_VLAN),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_INSERT_HEADER) |</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_CTR),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_TAG),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_ASO_METER),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_MODIFY_HDR),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_TBL) |</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_VPORT) |</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_DROP) |</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_SAMPLER) |</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_RANGE) |</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_DEST_ARRAY),</div><div class='del'>-		BIT(MLX5HWS_ACTION_TYP_LAST),</div><div class='del'>-	},</div><div class='add'>+static const u32 action_order_arr[MLX5HWS_ACTION_TYP_MAX] = {</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_REMOVE_HEADER) |</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_POP_VLAN),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_POP_VLAN),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_MODIFY_HDR),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_PUSH_VLAN),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_PUSH_VLAN),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_INSERT_HEADER) |</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_CTR),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_TAG),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_ASO_METER),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_MODIFY_HDR),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_TBL) |</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_VPORT) |</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_DROP) |</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_SAMPLER) |</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_RANGE) |</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_DEST_ARRAY),</div><div class='add'>+	BIT(MLX5HWS_ACTION_TYP_LAST),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const char * const mlx5hws_action_type_str[] = {</div><div class='hunk'>@@ -74,6 +72,11 @@ enum mlx5hws_action_type mlx5hws_action_get_type(struct mlx5hws_action *action)</div><div class='ctx'> 	return action-&gt;type;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+struct mlx5_core_dev *mlx5hws_action_get_dev(struct mlx5hws_action *action)</div><div class='add'>+{</div><div class='add'>+	return action-&gt;ctx-&gt;mdev;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hws_action_get_shared_stc_nic(struct mlx5hws_context *ctx,</div><div class='ctx'> 					 enum mlx5hws_context_shared_stc_type stc_type,</div><div class='ctx'> 					 u8 tbl_type)</div><div class='hunk'>@@ -83,8 +86,8 @@ static int hws_action_get_shared_stc_nic(struct mlx5hws_context *ctx,</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ctx-&gt;ctrl_lock);</div><div class='del'>-	if (ctx-&gt;common_res[tbl_type].shared_stc[stc_type]) {</div><div class='del'>-		ctx-&gt;common_res[tbl_type].shared_stc[stc_type]-&gt;refcount++;</div><div class='add'>+	if (ctx-&gt;common_res.shared_stc[stc_type]) {</div><div class='add'>+		ctx-&gt;common_res.shared_stc[stc_type]-&gt;refcount++;</div><div class='ctx'> 		mutex_unlock(&amp;ctx-&gt;ctrl_lock);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -114,7 +117,7 @@ static int hws_action_get_shared_stc_nic(struct mlx5hws_context *ctx,</div><div class='ctx'> 		mlx5hws_err(ctx, "No such stc_type: %d\n", stc_type);</div><div class='ctx'> 		pr_warn("HWS: Invalid stc_type: %d\n", stc_type);</div><div class='ctx'> 		ret = -EINVAL;</div><div class='del'>-		goto unlock_and_out;</div><div class='add'>+		goto free_shared_stc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = mlx5hws_action_alloc_single_stc(ctx, &amp;stc_attr, tbl_type,</div><div class='hunk'>@@ -124,8 +127,8 @@ static int hws_action_get_shared_stc_nic(struct mlx5hws_context *ctx,</div><div class='ctx'> 		goto free_shared_stc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;common_res[tbl_type].shared_stc[stc_type] = shared_stc;</div><div class='del'>-	ctx-&gt;common_res[tbl_type].shared_stc[stc_type]-&gt;refcount = 1;</div><div class='add'>+	ctx-&gt;common_res.shared_stc[stc_type] = shared_stc;</div><div class='add'>+	ctx-&gt;common_res.shared_stc[stc_type]-&gt;refcount = 1;</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;ctx-&gt;ctrl_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -178,16 +181,16 @@ static void hws_action_put_shared_stc(struct mlx5hws_action *action,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ctx-&gt;ctrl_lock);</div><div class='del'>-	if (--ctx-&gt;common_res[tbl_type].shared_stc[stc_type]-&gt;refcount) {</div><div class='add'>+	if (--ctx-&gt;common_res.shared_stc[stc_type]-&gt;refcount) {</div><div class='ctx'> 		mutex_unlock(&amp;ctx-&gt;ctrl_lock);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	shared_stc = ctx-&gt;common_res[tbl_type].shared_stc[stc_type];</div><div class='add'>+	shared_stc = ctx-&gt;common_res.shared_stc[stc_type];</div><div class='ctx'> </div><div class='ctx'> 	mlx5hws_action_free_single_stc(ctx, tbl_type, &amp;shared_stc-&gt;stc_chunk);</div><div class='ctx'> 	kfree(shared_stc);</div><div class='del'>-	ctx-&gt;common_res[tbl_type].shared_stc[stc_type] = NULL;</div><div class='add'>+	ctx-&gt;common_res.shared_stc[stc_type] = NULL;</div><div class='ctx'> 	mutex_unlock(&amp;ctx-&gt;ctrl_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -206,10 +209,10 @@ bool mlx5hws_action_check_combo(struct mlx5hws_context *ctx,</div><div class='ctx'> 				enum mlx5hws_action_type *user_actions,</div><div class='ctx'> 				enum mlx5hws_table_type table_type)</div><div class='ctx'> {</div><div class='del'>-	const u32 *order_arr = action_order_arr[table_type];</div><div class='add'>+	const u32 *order_arr = action_order_arr;</div><div class='add'>+	bool valid_combo;</div><div class='ctx'> 	u8 order_idx = 0;</div><div class='ctx'> 	u8 user_idx = 0;</div><div class='del'>-	bool valid_combo;</div><div class='ctx'> </div><div class='ctx'> 	if (table_type &gt;= MLX5HWS_TABLE_TYPE_MAX) {</div><div class='ctx'> 		mlx5hws_err(ctx, "Invalid table_type %d", table_type);</div><div class='hunk'>@@ -240,6 +243,7 @@ hws_action_fixup_stc_attr(struct mlx5hws_context *ctx,</div><div class='ctx'> 			  enum mlx5hws_table_type table_type,</div><div class='ctx'> 			  bool is_mirror)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5hws_pool *pool;</div><div class='ctx'> 	bool use_fixup = false;</div><div class='ctx'> 	u32 fw_tbl_type;</div><div class='ctx'> 	u32 base_id;</div><div class='hunk'>@@ -255,13 +259,11 @@ hws_action_fixup_stc_attr(struct mlx5hws_context *ctx,</div><div class='ctx'> 			use_fixup = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+		pool = stc_attr-&gt;ste_table.ste_pool;</div><div class='ctx'> 		if (!is_mirror)</div><div class='del'>-			base_id = mlx5hws_pool_chunk_get_base_id(stc_attr-&gt;ste_table.ste_pool,</div><div class='del'>-								 &amp;stc_attr-&gt;ste_table.ste);</div><div class='add'>+			base_id = mlx5hws_pool_get_base_id(pool);</div><div class='ctx'> 		else</div><div class='del'>-			base_id =</div><div class='del'>-				mlx5hws_pool_chunk_get_base_mirror_id(stc_attr-&gt;ste_table.ste_pool,</div><div class='del'>-								      &amp;stc_attr-&gt;ste_table.ste);</div><div class='add'>+			base_id = mlx5hws_pool_get_base_mirror_id(pool);</div><div class='ctx'> </div><div class='ctx'> 		*fixup_stc_attr = *stc_attr;</div><div class='ctx'> 		fixup_stc_attr-&gt;ste_table.ste_obj_id = base_id;</div><div class='hunk'>@@ -321,8 +323,8 @@ int mlx5hws_action_alloc_single_stc(struct mlx5hws_context *ctx,</div><div class='ctx'> __must_hold(&amp;ctx-&gt;ctrl_lock)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_cmd_stc_modify_attr cleanup_stc_attr = {0};</div><div class='del'>-	struct mlx5hws_pool *stc_pool = ctx-&gt;stc_pool[table_type];</div><div class='ctx'> 	struct mlx5hws_cmd_stc_modify_attr fixup_stc_attr = {0};</div><div class='add'>+	struct mlx5hws_pool *stc_pool = ctx-&gt;stc_pool;</div><div class='ctx'> 	bool use_fixup;</div><div class='ctx'> 	u32 obj_0_id;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -339,7 +341,7 @@ __must_hold(&amp;ctx-&gt;ctrl_lock)</div><div class='ctx'> 	if (!mlx5hws_context_cap_dynamic_reparse(ctx))</div><div class='ctx'> 		stc_attr-&gt;reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE;</div><div class='ctx'> </div><div class='del'>-	obj_0_id = mlx5hws_pool_chunk_get_base_id(stc_pool, stc);</div><div class='add'>+	obj_0_id = mlx5hws_pool_get_base_id(stc_pool);</div><div class='ctx'> </div><div class='ctx'> 	/* According to table/action limitation change the stc_attr */</div><div class='ctx'> 	use_fixup = hws_action_fixup_stc_attr(ctx, stc_attr, &amp;fixup_stc_attr, table_type, false);</div><div class='hunk'>@@ -355,7 +357,7 @@ __must_hold(&amp;ctx-&gt;ctrl_lock)</div><div class='ctx'> 	if (table_type == MLX5HWS_TABLE_TYPE_FDB) {</div><div class='ctx'> 		u32 obj_1_id;</div><div class='ctx'> </div><div class='del'>-		obj_1_id = mlx5hws_pool_chunk_get_base_mirror_id(stc_pool, stc);</div><div class='add'>+		obj_1_id = mlx5hws_pool_get_base_mirror_id(stc_pool);</div><div class='ctx'> </div><div class='ctx'> 		use_fixup = hws_action_fixup_stc_attr(ctx, stc_attr,</div><div class='ctx'> 						      &amp;fixup_stc_attr,</div><div class='hunk'>@@ -387,19 +389,19 @@ void mlx5hws_action_free_single_stc(struct mlx5hws_context *ctx,</div><div class='ctx'> 				    struct mlx5hws_pool_chunk *stc)</div><div class='ctx'> __must_hold(&amp;ctx-&gt;ctrl_lock)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5hws_pool *stc_pool = ctx-&gt;stc_pool[table_type];</div><div class='ctx'> 	struct mlx5hws_cmd_stc_modify_attr stc_attr = {0};</div><div class='add'>+	struct mlx5hws_pool *stc_pool = ctx-&gt;stc_pool;</div><div class='ctx'> 	u32 obj_id;</div><div class='ctx'> </div><div class='ctx'> 	/* Modify the STC not to point to an object */</div><div class='ctx'> 	stc_attr.action_type = MLX5_IFC_STC_ACTION_TYPE_DROP;</div><div class='ctx'> 	stc_attr.action_offset = MLX5HWS_ACTION_OFFSET_HIT;</div><div class='ctx'> 	stc_attr.stc_offset = stc-&gt;offset;</div><div class='del'>-	obj_id = mlx5hws_pool_chunk_get_base_id(stc_pool, stc);</div><div class='add'>+	obj_id = mlx5hws_pool_get_base_id(stc_pool);</div><div class='ctx'> 	mlx5hws_cmd_stc_modify(ctx-&gt;mdev, obj_id, &amp;stc_attr);</div><div class='ctx'> </div><div class='ctx'> 	if (table_type == MLX5HWS_TABLE_TYPE_FDB) {</div><div class='del'>-		obj_id = mlx5hws_pool_chunk_get_base_mirror_id(stc_pool, stc);</div><div class='add'>+		obj_id = mlx5hws_pool_get_base_mirror_id(stc_pool);</div><div class='ctx'> 		mlx5hws_cmd_stc_modify(ctx-&gt;mdev, obj_id, &amp;stc_attr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -473,6 +475,7 @@ static void hws_action_fill_stc_attr(struct mlx5hws_action *action,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5HWS_ACTION_TYP_TBL:</div><div class='ctx'> 	case MLX5HWS_ACTION_TYP_DEST_ARRAY:</div><div class='add'>+	case MLX5HWS_ACTION_TYP_SAMPLER:</div><div class='ctx'> 		attr-&gt;action_type = MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_FT;</div><div class='ctx'> 		attr-&gt;action_offset = MLX5HWS_ACTION_OFFSET_HIT;</div><div class='ctx'> 		attr-&gt;dest_table_id = obj_id;</div><div class='hunk'>@@ -561,7 +564,7 @@ hws_action_create_stcs(struct mlx5hws_action *action, u32 obj_id)</div><div class='ctx'> 	if (action-&gt;flags &amp; MLX5HWS_ACTION_FLAG_HWS_FDB) {</div><div class='ctx'> 		ret = mlx5hws_action_alloc_single_stc(ctx, &amp;stc_attr,</div><div class='ctx'> 						      MLX5HWS_TABLE_TYPE_FDB,</div><div class='del'>-						      &amp;action-&gt;stc[MLX5HWS_TABLE_TYPE_FDB]);</div><div class='add'>+						      &amp;action-&gt;stc);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out_err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -585,7 +588,7 @@ hws_action_destroy_stcs(struct mlx5hws_action *action)</div><div class='ctx'> </div><div class='ctx'> 	if (action-&gt;flags &amp; MLX5HWS_ACTION_FLAG_HWS_FDB)</div><div class='ctx'> 		mlx5hws_action_free_single_stc(ctx, MLX5HWS_TABLE_TYPE_FDB,</div><div class='del'>-					       &amp;action-&gt;stc[MLX5HWS_TABLE_TYPE_FDB]);</div><div class='add'>+					       &amp;action-&gt;stc);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;ctx-&gt;ctrl_lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -1187,14 +1190,15 @@ hws_action_create_modify_header_hws(struct mlx5hws_action *action,</div><div class='ctx'> 				    struct mlx5hws_action_mh_pattern *pattern,</div><div class='ctx'> 				    u32 log_bulk_size)</div><div class='ctx'> {</div><div class='add'>+	u16 num_actions, max_mh_actions = 0, hw_max_actions;</div><div class='ctx'> 	struct mlx5hws_context *ctx = action-&gt;ctx;</div><div class='del'>-	u16 num_actions, max_mh_actions = 0;</div><div class='ctx'> 	int i, ret, size_in_bytes;</div><div class='ctx'> 	u32 pat_id, arg_id = 0;</div><div class='ctx'> 	__be64 *new_pattern;</div><div class='ctx'> 	size_t pat_max_sz;</div><div class='ctx'> </div><div class='ctx'> 	pat_max_sz = MLX5HWS_ARG_CHUNK_SIZE_MAX * MLX5HWS_ARG_DATA_SIZE;</div><div class='add'>+	hw_max_actions = pat_max_sz / MLX5HWS_MODIFY_ACTION_SIZE;</div><div class='ctx'> 	size_in_bytes = pat_max_sz * sizeof(__be64);</div><div class='ctx'> 	new_pattern = kcalloc(num_of_patterns, size_in_bytes, GFP_KERNEL);</div><div class='ctx'> 	if (!new_pattern)</div><div class='hunk'>@@ -1204,16 +1208,20 @@ hws_action_create_modify_header_hws(struct mlx5hws_action *action,</div><div class='ctx'> 	for (i = 0; i &lt; num_of_patterns; i++) {</div><div class='ctx'> 		size_t new_num_actions;</div><div class='ctx'> 		size_t cur_num_actions;</div><div class='del'>-		u32 nope_location;</div><div class='add'>+		u32 nop_locations;</div><div class='ctx'> </div><div class='ctx'> 		cur_num_actions = pattern[i].sz / MLX5HWS_MODIFY_ACTION_SIZE;</div><div class='ctx'> </div><div class='del'>-		mlx5hws_pat_calc_nope(pattern[i].data, cur_num_actions,</div><div class='del'>-				      pat_max_sz / MLX5HWS_MODIFY_ACTION_SIZE,</div><div class='del'>-				      &amp;new_num_actions, &amp;nope_location,</div><div class='del'>-				      &amp;new_pattern[i * pat_max_sz]);</div><div class='add'>+		ret = mlx5hws_pat_calc_nop(pattern[i].data, cur_num_actions,</div><div class='add'>+					   hw_max_actions, &amp;new_num_actions,</div><div class='add'>+					   &amp;nop_locations,</div><div class='add'>+					   &amp;new_pattern[i * pat_max_sz]);</div><div class='add'>+		if (ret) {</div><div class='add'>+			mlx5hws_err(ctx, "Too many actions after nop insertion\n");</div><div class='add'>+			goto free_new_pat;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		action[i].modify_header.nope_locations = nope_location;</div><div class='add'>+		action[i].modify_header.nop_locations = nop_locations;</div><div class='ctx'> 		action[i].modify_header.num_of_actions = new_num_actions;</div><div class='ctx'> </div><div class='ctx'> 		max_mh_actions = max(max_mh_actions, new_num_actions);</div><div class='hunk'>@@ -1260,7 +1268,7 @@ hws_action_create_modify_header_hws(struct mlx5hws_action *action,</div><div class='ctx'> 				MLX5_GET(set_action_in, pattern[i].data, action_type);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Multiple modify actions require a pattern */</div><div class='del'>-			if (unlikely(action[i].modify_header.nope_locations)) {</div><div class='add'>+			if (unlikely(action[i].modify_header.nop_locations)) {</div><div class='ctx'> 				size_t pattern_sz;</div><div class='ctx'> </div><div class='ctx'> 				pattern_sz = action[i].modify_header.num_of_actions *</div><div class='hunk'>@@ -1350,11 +1358,8 @@ free_action:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_action *</div><div class='del'>-mlx5hws_action_create_dest_array(struct mlx5hws_context *ctx,</div><div class='del'>-				 size_t num_dest,</div><div class='add'>+mlx5hws_action_create_dest_array(struct mlx5hws_context *ctx, size_t num_dest,</div><div class='ctx'> 				 struct mlx5hws_action_dest_attr *dests,</div><div class='del'>-				 bool ignore_flow_level,</div><div class='del'>-				 u32 flow_source,</div><div class='ctx'> 				 u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_cmd_set_fte_dest *dest_list = NULL;</div><div class='hunk'>@@ -1362,8 +1367,8 @@ mlx5hws_action_create_dest_array(struct mlx5hws_context *ctx,</div><div class='ctx'> 	struct mlx5hws_cmd_set_fte_attr fte_attr = {0};</div><div class='ctx'> 	struct mlx5hws_cmd_forward_tbl *fw_island;</div><div class='ctx'> 	struct mlx5hws_action *action;</div><div class='del'>-	u32 i /*, packet_reformat_id*/;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, last_dest_idx = -1;</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	if (num_dest &lt;= 1) {</div><div class='ctx'> 		mlx5hws_err(ctx, "Action must have multiple dests\n");</div><div class='hunk'>@@ -1392,12 +1397,9 @@ mlx5hws_action_create_dest_array(struct mlx5hws_context *ctx,</div><div class='ctx'> 				MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;</div><div class='ctx'> 			dest_list[i].destination_id = dests[i].dest-&gt;dest_obj.obj_id;</div><div class='ctx'> 			fte_attr.action_flags |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;</div><div class='del'>-			fte_attr.ignore_flow_level = ignore_flow_level;</div><div class='del'>-			/* ToDo: In SW steering we have a handling of 'go to WIRE'</div><div class='del'>-			 * destination here by upper layer setting 'is_wire_ft' flag</div><div class='del'>-			 * if the destination is wire.</div><div class='del'>-			 * This is because uplink should be last dest in the list.</div><div class='del'>-			 */</div><div class='add'>+			fte_attr.ignore_flow_level = 1;</div><div class='add'>+			if (dests[i].is_wire_ft)</div><div class='add'>+				last_dest_idx = i;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case MLX5HWS_ACTION_TYP_VPORT:</div><div class='ctx'> 			dest_list[i].destination_type = MLX5_FLOW_DESTINATION_TYPE_VPORT;</div><div class='hunk'>@@ -1421,6 +1423,9 @@ mlx5hws_action_create_dest_array(struct mlx5hws_context *ctx,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (last_dest_idx != -1)</div><div class='add'>+		swap(dest_list[last_dest_idx], dest_list[num_dest - 1]);</div><div class='add'>+</div><div class='ctx'> 	fte_attr.dests_num = num_dest;</div><div class='ctx'> 	fte_attr.dests = dest_list;</div><div class='ctx'> </div><div class='hunk'>@@ -1576,17 +1581,15 @@ hws_action_create_dest_match_range_definer(struct mlx5hws_context *ctx)</div><div class='ctx'> 	return definer;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct mlx5hws_matcher_action_ste *</div><div class='add'>+static struct mlx5hws_range_action_table *</div><div class='ctx'> hws_action_create_dest_match_range_table(struct mlx5hws_context *ctx,</div><div class='ctx'> 					 struct mlx5hws_definer *definer,</div><div class='ctx'> 					 u32 miss_ft_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_cmd_rtc_create_attr rtc_attr = {0};</div><div class='del'>-	struct mlx5hws_action_default_stc *default_stc;</div><div class='del'>-	struct mlx5hws_matcher_action_ste *table_ste;</div><div class='add'>+	struct mlx5hws_range_action_table *table_ste;</div><div class='ctx'> 	struct mlx5hws_pool_attr pool_attr = {0};</div><div class='ctx'> 	struct mlx5hws_pool *ste_pool, *stc_pool;</div><div class='del'>-	struct mlx5hws_pool_chunk *ste;</div><div class='ctx'> 	u32 *rtc_0_id, *rtc_1_id;</div><div class='ctx'> 	u32 obj_id;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1605,7 +1608,6 @@ hws_action_create_dest_match_range_table(struct mlx5hws_context *ctx,</div><div class='ctx'> </div><div class='ctx'> 	pool_attr.table_type = MLX5HWS_TABLE_TYPE_FDB;</div><div class='ctx'> 	pool_attr.pool_type = MLX5HWS_POOL_TYPE_STE;</div><div class='del'>-	pool_attr.flags = MLX5HWS_POOL_FLAGS_FOR_STE_ACTION_POOL;</div><div class='ctx'> 	pool_attr.alloc_log_sz = 1;</div><div class='ctx'> 	table_ste-&gt;pool = mlx5hws_pool_create(ctx, &amp;pool_attr);</div><div class='ctx'> 	if (!table_ste-&gt;pool) {</div><div class='hunk'>@@ -1617,8 +1619,6 @@ hws_action_create_dest_match_range_table(struct mlx5hws_context *ctx,</div><div class='ctx'> 	rtc_0_id = &amp;table_ste-&gt;rtc_0_id;</div><div class='ctx'> 	rtc_1_id = &amp;table_ste-&gt;rtc_1_id;</div><div class='ctx'> 	ste_pool = table_ste-&gt;pool;</div><div class='del'>-	ste = &amp;table_ste-&gt;ste;</div><div class='del'>-	ste-&gt;order = 1;</div><div class='ctx'> </div><div class='ctx'> 	rtc_attr.log_size = 0;</div><div class='ctx'> 	rtc_attr.log_depth = 0;</div><div class='hunk'>@@ -1630,18 +1630,16 @@ hws_action_create_dest_match_range_table(struct mlx5hws_context *ctx,</div><div class='ctx'> 	rtc_attr.fw_gen_wqe = true;</div><div class='ctx'> 	rtc_attr.is_scnd_range = true;</div><div class='ctx'> </div><div class='del'>-	obj_id = mlx5hws_pool_chunk_get_base_id(ste_pool, ste);</div><div class='add'>+	obj_id = mlx5hws_pool_get_base_id(ste_pool);</div><div class='ctx'> </div><div class='ctx'> 	rtc_attr.pd = ctx-&gt;pd_num;</div><div class='ctx'> 	rtc_attr.ste_base = obj_id;</div><div class='del'>-	rtc_attr.ste_offset = ste-&gt;offset;</div><div class='ctx'> 	rtc_attr.reparse_mode = mlx5hws_context_get_reparse_mode(ctx);</div><div class='ctx'> 	rtc_attr.table_type = mlx5hws_table_get_res_fw_ft_type(MLX5HWS_TABLE_TYPE_FDB, false);</div><div class='ctx'> </div><div class='ctx'> 	/* STC is a single resource (obj_id), use any STC for the ID */</div><div class='del'>-	stc_pool = ctx-&gt;stc_pool[MLX5HWS_TABLE_TYPE_FDB];</div><div class='del'>-	default_stc = ctx-&gt;common_res[MLX5HWS_TABLE_TYPE_FDB].default_stc;</div><div class='del'>-	obj_id = mlx5hws_pool_chunk_get_base_id(stc_pool, &amp;default_stc-&gt;default_hit);</div><div class='add'>+	stc_pool = ctx-&gt;stc_pool;</div><div class='add'>+	obj_id = mlx5hws_pool_get_base_id(stc_pool);</div><div class='ctx'> 	rtc_attr.stc_base = obj_id;</div><div class='ctx'> </div><div class='ctx'> 	ret = mlx5hws_cmd_rtc_create(ctx-&gt;mdev, &amp;rtc_attr, rtc_0_id);</div><div class='hunk'>@@ -1651,11 +1649,11 @@ hws_action_create_dest_match_range_table(struct mlx5hws_context *ctx,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Create mirror RTC */</div><div class='del'>-	obj_id = mlx5hws_pool_chunk_get_base_mirror_id(ste_pool, ste);</div><div class='add'>+	obj_id = mlx5hws_pool_get_base_mirror_id(ste_pool);</div><div class='ctx'> 	rtc_attr.ste_base = obj_id;</div><div class='ctx'> 	rtc_attr.table_type = mlx5hws_table_get_res_fw_ft_type(MLX5HWS_TABLE_TYPE_FDB, true);</div><div class='ctx'> </div><div class='del'>-	obj_id = mlx5hws_pool_chunk_get_base_mirror_id(stc_pool, &amp;default_stc-&gt;default_hit);</div><div class='add'>+	obj_id = mlx5hws_pool_get_base_mirror_id(stc_pool);</div><div class='ctx'> 	rtc_attr.stc_base = obj_id;</div><div class='ctx'> </div><div class='ctx'> 	ret = mlx5hws_cmd_rtc_create(ctx-&gt;mdev, &amp;rtc_attr, rtc_1_id);</div><div class='hunk'>@@ -1678,9 +1676,9 @@ free_ste:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-hws_action_destroy_dest_match_range_table(struct mlx5hws_context *ctx,</div><div class='del'>-					  struct mlx5hws_matcher_action_ste *table_ste)</div><div class='add'>+static void hws_action_destroy_dest_match_range_table(</div><div class='add'>+	struct mlx5hws_context *ctx,</div><div class='add'>+	struct mlx5hws_range_action_table *table_ste)</div><div class='ctx'> {</div><div class='ctx'> 	mutex_lock(&amp;ctx-&gt;ctrl_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1692,12 +1690,11 @@ hws_action_destroy_dest_match_range_table(struct mlx5hws_context *ctx,</div><div class='ctx'> 	mutex_unlock(&amp;ctx-&gt;ctrl_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-hws_action_create_dest_match_range_fill_table(struct mlx5hws_context *ctx,</div><div class='del'>-					      struct mlx5hws_matcher_action_ste *table_ste,</div><div class='del'>-					      struct mlx5hws_action *hit_ft_action,</div><div class='del'>-					      struct mlx5hws_definer *range_definer,</div><div class='del'>-					      u32 min, u32 max)</div><div class='add'>+static int hws_action_create_dest_match_range_fill_table(</div><div class='add'>+	struct mlx5hws_context *ctx,</div><div class='add'>+	struct mlx5hws_range_action_table *table_ste,</div><div class='add'>+	struct mlx5hws_action *hit_ft_action,</div><div class='add'>+	struct mlx5hws_definer *range_definer, u32 min, u32 max)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_wqe_gta_data_seg_ste match_wqe_data = {0};</div><div class='ctx'> 	struct mlx5hws_wqe_gta_data_seg_ste range_wqe_data = {0};</div><div class='hunk'>@@ -1731,7 +1728,7 @@ hws_action_create_dest_match_range_fill_table(struct mlx5hws_context *ctx,</div><div class='ctx'> 	ste_attr.used_id_rtc_0 = &amp;used_rtc_0_id;</div><div class='ctx'> 	ste_attr.used_id_rtc_1 = &amp;used_rtc_1_id;</div><div class='ctx'> </div><div class='del'>-	common_res = &amp;ctx-&gt;common_res[MLX5HWS_TABLE_TYPE_FDB];</div><div class='add'>+	common_res = &amp;ctx-&gt;common_res;</div><div class='ctx'> </div><div class='ctx'> 	/* init an empty match STE which will always hit */</div><div class='ctx'> 	ste_attr.wqe_ctrl = &amp;wqe_ctrl;</div><div class='hunk'>@@ -1750,7 +1747,7 @@ hws_action_create_dest_match_range_fill_table(struct mlx5hws_context *ctx,</div><div class='ctx'> 	wqe_ctrl.stc_ix[MLX5HWS_ACTION_STC_IDX_CTRL] |=</div><div class='ctx'> 		htonl(MLX5HWS_ACTION_STC_IDX_LAST_COMBO2 &lt;&lt; 29);</div><div class='ctx'> 	wqe_ctrl.stc_ix[MLX5HWS_ACTION_STC_IDX_HIT] =</div><div class='del'>-		htonl(hit_ft_action-&gt;stc[MLX5HWS_TABLE_TYPE_FDB].offset);</div><div class='add'>+		htonl(hit_ft_action-&gt;stc.offset);</div><div class='ctx'> </div><div class='ctx'> 	wqe_data_arr = (__force __be32 *)&amp;range_wqe_data;</div><div class='ctx'> </div><div class='hunk'>@@ -1793,7 +1790,7 @@ mlx5hws_action_create_dest_match_range(struct mlx5hws_context *ctx,</div><div class='ctx'> 				       u32 min, u32 max, u32 flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_cmd_stc_modify_attr stc_attr = {0};</div><div class='del'>-	struct mlx5hws_matcher_action_ste *table_ste;</div><div class='add'>+	struct mlx5hws_range_action_table *table_ste;</div><div class='ctx'> 	struct mlx5hws_action *hit_ft_action;</div><div class='ctx'> 	struct mlx5hws_definer *definer;</div><div class='ctx'> 	struct mlx5hws_action *action;</div><div class='hunk'>@@ -1838,12 +1835,11 @@ mlx5hws_action_create_dest_match_range(struct mlx5hws_context *ctx,</div><div class='ctx'> 	stc_attr.action_offset = MLX5HWS_ACTION_OFFSET_HIT;</div><div class='ctx'> 	stc_attr.action_type = MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_STE_TABLE;</div><div class='ctx'> 	stc_attr.reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE;</div><div class='del'>-	stc_attr.ste_table.ste = table_ste-&gt;ste;</div><div class='ctx'> 	stc_attr.ste_table.ste_pool = table_ste-&gt;pool;</div><div class='ctx'> 	stc_attr.ste_table.match_definer_id = ctx-&gt;caps-&gt;trivial_match_definer;</div><div class='ctx'> </div><div class='ctx'> 	ret = mlx5hws_action_alloc_single_stc(ctx, &amp;stc_attr, MLX5HWS_TABLE_TYPE_FDB,</div><div class='del'>-					      &amp;action-&gt;stc[MLX5HWS_TABLE_TYPE_FDB]);</div><div class='add'>+					      &amp;action-&gt;stc);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto error_unlock;</div><div class='ctx'> </div><div class='hunk'>@@ -1875,7 +1871,50 @@ struct mlx5hws_action *</div><div class='ctx'> mlx5hws_action_create_flow_sampler(struct mlx5hws_context *ctx,</div><div class='ctx'> 				   u32 sampler_id, u32 flags)</div><div class='ctx'> {</div><div class='del'>-	mlx5hws_err(ctx, "Flow sampler action - unsupported\n");</div><div class='add'>+	struct mlx5hws_cmd_ft_create_attr ft_attr = {0};</div><div class='add'>+	struct mlx5hws_cmd_set_fte_attr fte_attr = {0};</div><div class='add'>+	struct mlx5hws_cmd_forward_tbl *fw_island;</div><div class='add'>+	struct mlx5hws_cmd_set_fte_dest dest;</div><div class='add'>+	struct mlx5hws_action *action;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (flags != (MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED)) {</div><div class='add'>+		mlx5hws_err(ctx, "Unsupported flags for flow sampler\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ft_attr.type = FS_FT_FDB;</div><div class='add'>+	ft_attr.level = ctx-&gt;caps-&gt;fdb_ft.max_level - 1;</div><div class='add'>+</div><div class='add'>+	dest.destination_type = MLX5_FLOW_DESTINATION_TYPE_FLOW_SAMPLER;</div><div class='add'>+	dest.destination_id = sampler_id;</div><div class='add'>+</div><div class='add'>+	fte_attr.dests_num = 1;</div><div class='add'>+	fte_attr.dests = &amp;dest;</div><div class='add'>+	fte_attr.action_flags = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;</div><div class='add'>+	fte_attr.ignore_flow_level = 1;</div><div class='add'>+</div><div class='add'>+	fw_island = mlx5hws_cmd_forward_tbl_create(ctx-&gt;mdev, &amp;ft_attr, &amp;fte_attr);</div><div class='add'>+	if (!fw_island)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	action = hws_action_create_generic(ctx, flags,</div><div class='add'>+					   MLX5HWS_ACTION_TYP_SAMPLER);</div><div class='add'>+	if (!action)</div><div class='add'>+		goto destroy_fw_island;</div><div class='add'>+</div><div class='add'>+	ret = hws_action_create_stcs(action, fw_island-&gt;ft_id);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_action;</div><div class='add'>+</div><div class='add'>+	action-&gt;flow_sampler.fw_island = fw_island;</div><div class='add'>+</div><div class='add'>+	return action;</div><div class='add'>+</div><div class='add'>+free_action:</div><div class='add'>+	kfree(action);</div><div class='add'>+destroy_fw_island:</div><div class='add'>+	mlx5hws_cmd_forward_tbl_destroy(ctx-&gt;mdev, fw_island);</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1914,6 +1953,11 @@ static void hws_action_destroy_hws(struct mlx5hws_action *action)</div><div class='ctx'> 		}</div><div class='ctx'> 		kfree(action-&gt;dest_array.dest_list);</div><div class='ctx'> 		break;</div><div class='add'>+	case MLX5HWS_ACTION_TYP_SAMPLER:</div><div class='add'>+		hws_action_destroy_stcs(action);</div><div class='add'>+		mlx5hws_cmd_forward_tbl_destroy(action-&gt;ctx-&gt;mdev,</div><div class='add'>+						action-&gt;flow_sampler.fw_island);</div><div class='add'>+		break;</div><div class='ctx'> 	case MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:</div><div class='ctx'> 	case MLX5HWS_ACTION_TYP_MODIFY_HDR:</div><div class='ctx'> 		shared_arg = false;</div><div class='hunk'>@@ -1970,8 +2014,8 @@ __must_hold(&amp;ctx-&gt;ctrl_lock)</div><div class='ctx'> 	struct mlx5hws_action_default_stc *default_stc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;common_res[tbl_type].default_stc) {</div><div class='del'>-		ctx-&gt;common_res[tbl_type].default_stc-&gt;refcount++;</div><div class='add'>+	if (ctx-&gt;common_res.default_stc) {</div><div class='add'>+		ctx-&gt;common_res.default_stc-&gt;refcount++;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2023,8 +2067,8 @@ __must_hold(&amp;ctx-&gt;ctrl_lock)</div><div class='ctx'> 		goto free_nop_dw7;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ctx-&gt;common_res[tbl_type].default_stc = default_stc;</div><div class='del'>-	ctx-&gt;common_res[tbl_type].default_stc-&gt;refcount++;</div><div class='add'>+	ctx-&gt;common_res.default_stc = default_stc;</div><div class='add'>+	ctx-&gt;common_res.default_stc-&gt;refcount++;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2046,9 +2090,7 @@ __must_hold(&amp;ctx-&gt;ctrl_lock)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_action_default_stc *default_stc;</div><div class='ctx'> </div><div class='del'>-	default_stc = ctx-&gt;common_res[tbl_type].default_stc;</div><div class='del'>-</div><div class='del'>-	default_stc = ctx-&gt;common_res[tbl_type].default_stc;</div><div class='add'>+	default_stc = ctx-&gt;common_res.default_stc;</div><div class='ctx'> 	if (--default_stc-&gt;refcount)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -2058,28 +2100,30 @@ __must_hold(&amp;ctx-&gt;ctrl_lock)</div><div class='ctx'> 	mlx5hws_action_free_single_stc(ctx, tbl_type, &amp;default_stc-&gt;nop_dw5);</div><div class='ctx'> 	mlx5hws_action_free_single_stc(ctx, tbl_type, &amp;default_stc-&gt;nop_ctr);</div><div class='ctx'> 	kfree(default_stc);</div><div class='del'>-	ctx-&gt;common_res[tbl_type].default_stc = NULL;</div><div class='add'>+	ctx-&gt;common_res.default_stc = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hws_action_modify_write(struct mlx5hws_send_engine *queue,</div><div class='ctx'> 				    u32 arg_idx,</div><div class='ctx'> 				    u8 *arg_data,</div><div class='ctx'> 				    u16 num_of_actions,</div><div class='del'>-				    u32 nope_locations)</div><div class='add'>+				    u32 nop_locations)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *new_arg_data = NULL;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(nope_locations)) {</div><div class='add'>+	if (unlikely(nop_locations)) {</div><div class='ctx'> 		new_arg_data = kcalloc(num_of_actions,</div><div class='ctx'> 				       MLX5HWS_MODIFY_ACTION_SIZE, GFP_KERNEL);</div><div class='ctx'> 		if (unlikely(!new_arg_data))</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		for (i = 0, j = 0; i &lt; num_of_actions; i++, j++) {</div><div class='del'>-			memcpy(&amp;new_arg_data[j], arg_data, MLX5HWS_MODIFY_ACTION_SIZE);</div><div class='del'>-			if (BIT(i) &amp; nope_locations)</div><div class='add'>+		for (i = 0, j = 0; j &lt; num_of_actions; i++, j++) {</div><div class='add'>+			if (BIT(i) &amp; nop_locations)</div><div class='ctx'> 				j++;</div><div class='add'>+			memcpy(&amp;new_arg_data[j * MLX5HWS_MODIFY_ACTION_SIZE],</div><div class='add'>+			       &amp;arg_data[i * MLX5HWS_MODIFY_ACTION_SIZE],</div><div class='add'>+			       MLX5HWS_MODIFY_ACTION_SIZE);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2150,8 +2194,7 @@ hws_action_apply_stc(struct mlx5hws_actions_apply_data *apply,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_action *action = apply-&gt;rule_action[action_idx].action;</div><div class='ctx'> </div><div class='del'>-	apply-&gt;wqe_ctrl-&gt;stc_ix[stc_idx] =</div><div class='del'>-		htonl(action-&gt;stc[apply-&gt;tbl_type].offset);</div><div class='add'>+	apply-&gt;wqe_ctrl-&gt;stc_ix[stc_idx] = htonl(action-&gt;stc.offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -2176,12 +2219,13 @@ hws_action_setter_modify_header(struct mlx5hws_actions_apply_data *apply,</div><div class='ctx'> 	struct mlx5hws_action *action;</div><div class='ctx'> 	u32 arg_sz, arg_idx;</div><div class='ctx'> 	u8 *single_action;</div><div class='add'>+	u8 max_actions;</div><div class='ctx'> 	__be32 stc_idx;</div><div class='ctx'> </div><div class='ctx'> 	rule_action = &amp;apply-&gt;rule_action[setter-&gt;idx_double];</div><div class='ctx'> 	action = rule_action-&gt;action;</div><div class='ctx'> </div><div class='del'>-	stc_idx = htonl(action-&gt;stc[apply-&gt;tbl_type].offset);</div><div class='add'>+	stc_idx = htonl(action-&gt;stc.offset);</div><div class='ctx'> 	apply-&gt;wqe_ctrl-&gt;stc_ix[MLX5HWS_ACTION_STC_IDX_DW6] = stc_idx;</div><div class='ctx'> 	apply-&gt;wqe_ctrl-&gt;stc_ix[MLX5HWS_ACTION_STC_IDX_DW7] = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2203,21 +2247,23 @@ hws_action_setter_modify_header(struct mlx5hws_actions_apply_data *apply,</div><div class='ctx'> </div><div class='ctx'> 		apply-&gt;wqe_data[MLX5HWS_ACTION_OFFSET_DW7] =</div><div class='ctx'> 			*(__be32 *)MLX5_ADDR_OF(set_action_in, single_action, data);</div><div class='del'>-	} else {</div><div class='del'>-		/* Argument offset multiple with number of args per these actions */</div><div class='del'>-		arg_sz = mlx5hws_arg_get_arg_size(action-&gt;modify_header.max_num_of_actions);</div><div class='del'>-		arg_idx = rule_action-&gt;modify_header.offset * arg_sz;</div><div class='del'>-</div><div class='del'>-		apply-&gt;wqe_data[MLX5HWS_ACTION_OFFSET_DW7] = htonl(arg_idx);</div><div class='del'>-</div><div class='del'>-		if (!(action-&gt;flags &amp; MLX5HWS_ACTION_FLAG_SHARED)) {</div><div class='del'>-			apply-&gt;require_dep = 1;</div><div class='del'>-			hws_action_modify_write(apply-&gt;queue,</div><div class='del'>-						action-&gt;modify_header.arg_id + arg_idx,</div><div class='del'>-						rule_action-&gt;modify_header.data,</div><div class='del'>-						action-&gt;modify_header.num_of_actions,</div><div class='del'>-						action-&gt;modify_header.nope_locations);</div><div class='del'>-		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Argument offset multiple with number of args per these actions */</div><div class='add'>+	max_actions = action-&gt;modify_header.max_num_of_actions;</div><div class='add'>+	arg_sz = mlx5hws_arg_get_arg_size(max_actions);</div><div class='add'>+	arg_idx = rule_action-&gt;modify_header.offset * arg_sz;</div><div class='add'>+</div><div class='add'>+	apply-&gt;wqe_data[MLX5HWS_ACTION_OFFSET_DW7] = htonl(arg_idx);</div><div class='add'>+</div><div class='add'>+	if (!(action-&gt;flags &amp; MLX5HWS_ACTION_FLAG_SHARED)) {</div><div class='add'>+		apply-&gt;require_dep = 1;</div><div class='add'>+		hws_action_modify_write(apply-&gt;queue,</div><div class='add'>+					action-&gt;modify_header.arg_id + arg_idx,</div><div class='add'>+					rule_action-&gt;modify_header.data,</div><div class='add'>+					action-&gt;modify_header.num_of_actions,</div><div class='add'>+					action-&gt;modify_header.nop_locations);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2240,7 +2286,7 @@ hws_action_setter_insert_ptr(struct mlx5hws_actions_apply_data *apply,</div><div class='ctx'> 	apply-&gt;wqe_data[MLX5HWS_ACTION_OFFSET_DW6] = 0;</div><div class='ctx'> 	apply-&gt;wqe_data[MLX5HWS_ACTION_OFFSET_DW7] = htonl(arg_idx);</div><div class='ctx'> </div><div class='del'>-	stc_idx = htonl(action-&gt;stc[apply-&gt;tbl_type].offset);</div><div class='add'>+	stc_idx = htonl(action-&gt;stc.offset);</div><div class='ctx'> 	apply-&gt;wqe_ctrl-&gt;stc_ix[MLX5HWS_ACTION_STC_IDX_DW6] = stc_idx;</div><div class='ctx'> 	apply-&gt;wqe_ctrl-&gt;stc_ix[MLX5HWS_ACTION_STC_IDX_DW7] = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2272,7 +2318,7 @@ hws_action_setter_tnl_l3_to_l2(struct mlx5hws_actions_apply_data *apply,</div><div class='ctx'> 	apply-&gt;wqe_data[MLX5HWS_ACTION_OFFSET_DW6] = 0;</div><div class='ctx'> 	apply-&gt;wqe_data[MLX5HWS_ACTION_OFFSET_DW7] = htonl(arg_idx);</div><div class='ctx'> </div><div class='del'>-	stc_idx = htonl(action-&gt;stc[apply-&gt;tbl_type].offset);</div><div class='add'>+	stc_idx = htonl(action-&gt;stc.offset);</div><div class='ctx'> 	apply-&gt;wqe_ctrl-&gt;stc_ix[MLX5HWS_ACTION_STC_IDX_DW6] = stc_idx;</div><div class='ctx'> 	apply-&gt;wqe_ctrl-&gt;stc_ix[MLX5HWS_ACTION_STC_IDX_DW7] = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2434,6 +2480,7 @@ int mlx5hws_action_template_process(struct mlx5hws_action_template *at)</div><div class='ctx'> 		case MLX5HWS_ACTION_TYP_DROP:</div><div class='ctx'> 		case MLX5HWS_ACTION_TYP_TBL:</div><div class='ctx'> 		case MLX5HWS_ACTION_TYP_DEST_ARRAY:</div><div class='add'>+		case MLX5HWS_ACTION_TYP_SAMPLER:</div><div class='ctx'> 		case MLX5HWS_ACTION_TYP_VPORT:</div><div class='ctx'> 		case MLX5HWS_ACTION_TYP_MISS:</div><div class='ctx'> 			/* Hit action */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_action.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h<br/>index bf5c1b241006..55a079fdd08f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_action.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_action.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#ifndef MLX5HWS_ACTION_H_</div><div class='del'>-#define MLX5HWS_ACTION_H_</div><div class='add'>+#ifndef HWS_ACTION_H_</div><div class='add'>+#define HWS_ACTION_H_</div><div class='ctx'> </div><div class='ctx'> /* Max number of STEs needed for a rule (including match) */</div><div class='ctx'> #define MLX5HWS_ACTION_MAX_STE 20</div><div class='hunk'>@@ -70,12 +70,12 @@ struct mlx5hws_action_default_stc {</div><div class='ctx'> 	struct mlx5hws_pool_chunk nop_dw6;</div><div class='ctx'> 	struct mlx5hws_pool_chunk nop_dw7;</div><div class='ctx'> 	struct mlx5hws_pool_chunk default_hit;</div><div class='del'>-	u32 refcount;</div><div class='add'>+	u32 refcount; /* protected by context ctrl lock */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_action_shared_stc {</div><div class='ctx'> 	struct mlx5hws_pool_chunk stc_chunk;</div><div class='del'>-	u32 refcount;</div><div class='add'>+	u32 refcount; /* protected by context ctrl lock */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_actions_apply_data {</div><div class='hunk'>@@ -118,19 +118,25 @@ struct mlx5hws_action_template {</div><div class='ctx'> 	u8 only_term;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mlx5hws_range_action_table {</div><div class='add'>+	struct mlx5hws_pool *pool;</div><div class='add'>+	u32 rtc_0_id;</div><div class='add'>+	u32 rtc_1_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mlx5hws_action {</div><div class='ctx'> 	u8 type;</div><div class='ctx'> 	u8 flags;</div><div class='ctx'> 	struct mlx5hws_context *ctx;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct {</div><div class='del'>-			struct mlx5hws_pool_chunk stc[MLX5HWS_TABLE_TYPE_MAX];</div><div class='add'>+			struct mlx5hws_pool_chunk stc;</div><div class='ctx'> 			union {</div><div class='ctx'> 				struct {</div><div class='ctx'> 					u32 pat_id;</div><div class='ctx'> 					u32 arg_id;</div><div class='ctx'> 					__be64 single_action;</div><div class='del'>-					u32 nope_locations;</div><div class='add'>+					u32 nop_locations;</div><div class='ctx'> 					u8 num_of_patterns;</div><div class='ctx'> 					u8 single_action_type;</div><div class='ctx'> 					u8 num_of_actions;</div><div class='hunk'>@@ -166,6 +172,9 @@ struct mlx5hws_action {</div><div class='ctx'> 					struct mlx5hws_cmd_set_fte_dest *dest_list;</div><div class='ctx'> 				} dest_array;</div><div class='ctx'> 				struct {</div><div class='add'>+					struct mlx5hws_cmd_forward_tbl *fw_island;</div><div class='add'>+				} flow_sampler;</div><div class='add'>+				struct {</div><div class='ctx'> 					u8 type;</div><div class='ctx'> 					u8 start_anchor;</div><div class='ctx'> 					u8 end_anchor;</div><div class='hunk'>@@ -183,7 +192,7 @@ struct mlx5hws_action {</div><div class='ctx'> 					size_t size;</div><div class='ctx'> 				} remove_header;</div><div class='ctx'> 				struct {</div><div class='del'>-					struct mlx5hws_matcher_action_ste *table_ste;</div><div class='add'>+					struct mlx5hws_range_action_table *table_ste;</div><div class='ctx'> 					struct mlx5hws_action *hit_ft_action;</div><div class='ctx'> 					struct mlx5hws_definer *definer;</div><div class='ctx'> 				} range;</div><div class='hunk'>@@ -304,4 +313,4 @@ mlx5hws_action_apply_setter(struct mlx5hws_actions_apply_data *apply,</div><div class='ctx'> 		htonl(num_of_actions &lt;&lt; 29);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* MLX5HWS_ACTION_H_ */</div><div class='add'>+#endif /* HWS_ACTION_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.c<br/>new file mode 100644<br/>index 000000000000..5766a9c82f96<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.c</a></div><div class='hunk'>@@ -0,0 +1,467 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2025 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#include "internal.h"</div><div class='add'>+</div><div class='add'>+static const char *</div><div class='add'>+hws_pool_opt_to_str(enum mlx5hws_pool_optimize opt)</div><div class='add'>+{</div><div class='add'>+	switch (opt) {</div><div class='add'>+	case MLX5HWS_POOL_OPTIMIZE_NONE:</div><div class='add'>+		return "rx-and-tx";</div><div class='add'>+	case MLX5HWS_POOL_OPTIMIZE_ORIG:</div><div class='add'>+		return "rx-only";</div><div class='add'>+	case MLX5HWS_POOL_OPTIMIZE_MIRROR:</div><div class='add'>+		return "tx-only";</div><div class='add'>+	default:</div><div class='add'>+		return "unknown";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hws_action_ste_table_create_pool(struct mlx5hws_context *ctx,</div><div class='add'>+				 struct mlx5hws_action_ste_table *action_tbl,</div><div class='add'>+				 enum mlx5hws_pool_optimize opt, size_t log_sz)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_pool_attr pool_attr = { 0 };</div><div class='add'>+</div><div class='add'>+	pool_attr.pool_type = MLX5HWS_POOL_TYPE_STE;</div><div class='add'>+	pool_attr.table_type = MLX5HWS_TABLE_TYPE_FDB;</div><div class='add'>+	pool_attr.flags = MLX5HWS_POOL_FLAG_BUDDY;</div><div class='add'>+	pool_attr.opt_type = opt;</div><div class='add'>+	pool_attr.alloc_log_sz = log_sz;</div><div class='add'>+</div><div class='add'>+	action_tbl-&gt;pool = mlx5hws_pool_create(ctx, &amp;pool_attr);</div><div class='add'>+	if (!action_tbl-&gt;pool) {</div><div class='add'>+		mlx5hws_err(ctx, "Failed to allocate STE pool\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_action_ste_table_create_single_rtc(</div><div class='add'>+	struct mlx5hws_context *ctx,</div><div class='add'>+	struct mlx5hws_action_ste_table *action_tbl,</div><div class='add'>+	enum mlx5hws_pool_optimize opt, size_t log_sz, bool tx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_cmd_rtc_create_attr rtc_attr = { 0 };</div><div class='add'>+	u32 *rtc_id;</div><div class='add'>+</div><div class='add'>+	rtc_attr.log_depth = 0;</div><div class='add'>+	rtc_attr.update_index_mode = MLX5_IFC_RTC_STE_UPDATE_MODE_BY_OFFSET;</div><div class='add'>+	/* Action STEs use the default always hit definer. */</div><div class='add'>+	rtc_attr.match_definer_0 = ctx-&gt;caps-&gt;trivial_match_definer;</div><div class='add'>+	rtc_attr.is_frst_jumbo = false;</div><div class='add'>+	rtc_attr.miss_ft_id = 0;</div><div class='add'>+	rtc_attr.pd = ctx-&gt;pd_num;</div><div class='add'>+	rtc_attr.reparse_mode = mlx5hws_context_get_reparse_mode(ctx);</div><div class='add'>+</div><div class='add'>+	if (tx) {</div><div class='add'>+		rtc_attr.table_type = FS_FT_FDB_TX;</div><div class='add'>+		rtc_attr.ste_base =</div><div class='add'>+			mlx5hws_pool_get_base_mirror_id(action_tbl-&gt;pool);</div><div class='add'>+		rtc_attr.stc_base =</div><div class='add'>+			mlx5hws_pool_get_base_mirror_id(ctx-&gt;stc_pool);</div><div class='add'>+		rtc_attr.log_size =</div><div class='add'>+			opt == MLX5HWS_POOL_OPTIMIZE_ORIG ? 0 : log_sz;</div><div class='add'>+		rtc_id = &amp;action_tbl-&gt;rtc_1_id;</div><div class='add'>+	} else {</div><div class='add'>+		rtc_attr.table_type = FS_FT_FDB_RX;</div><div class='add'>+		rtc_attr.ste_base = mlx5hws_pool_get_base_id(action_tbl-&gt;pool);</div><div class='add'>+		rtc_attr.stc_base = mlx5hws_pool_get_base_id(ctx-&gt;stc_pool);</div><div class='add'>+		rtc_attr.log_size =</div><div class='add'>+			opt == MLX5HWS_POOL_OPTIMIZE_MIRROR ? 0 : log_sz;</div><div class='add'>+		rtc_id = &amp;action_tbl-&gt;rtc_0_id;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mlx5hws_cmd_rtc_create(ctx-&gt;mdev, &amp;rtc_attr, rtc_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hws_action_ste_table_create_rtcs(struct mlx5hws_context *ctx,</div><div class='add'>+				 struct mlx5hws_action_ste_table *action_tbl,</div><div class='add'>+				 enum mlx5hws_pool_optimize opt, size_t log_sz)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hws_action_ste_table_create_single_rtc(ctx, action_tbl, opt,</div><div class='add'>+						     log_sz, false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = hws_action_ste_table_create_single_rtc(ctx, action_tbl, opt,</div><div class='add'>+						     log_sz, true);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5hws_cmd_rtc_destroy(ctx-&gt;mdev, action_tbl-&gt;rtc_0_id);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+hws_action_ste_table_destroy_rtcs(struct mlx5hws_action_ste_table *action_tbl)</div><div class='add'>+{</div><div class='add'>+	mlx5hws_cmd_rtc_destroy(action_tbl-&gt;pool-&gt;ctx-&gt;mdev,</div><div class='add'>+				action_tbl-&gt;rtc_1_id);</div><div class='add'>+	mlx5hws_cmd_rtc_destroy(action_tbl-&gt;pool-&gt;ctx-&gt;mdev,</div><div class='add'>+				action_tbl-&gt;rtc_0_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hws_action_ste_table_create_stc(struct mlx5hws_context *ctx,</div><div class='add'>+				struct mlx5hws_action_ste_table *action_tbl)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_cmd_stc_modify_attr stc_attr = { 0 };</div><div class='add'>+</div><div class='add'>+	stc_attr.action_offset = MLX5HWS_ACTION_OFFSET_HIT;</div><div class='add'>+	stc_attr.action_type = MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_STE_TABLE;</div><div class='add'>+	stc_attr.reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE;</div><div class='add'>+	stc_attr.ste_table.ste_pool = action_tbl-&gt;pool;</div><div class='add'>+	stc_attr.ste_table.match_definer_id = ctx-&gt;caps-&gt;trivial_match_definer;</div><div class='add'>+</div><div class='add'>+	return mlx5hws_action_alloc_single_stc(ctx, &amp;stc_attr,</div><div class='add'>+					       MLX5HWS_TABLE_TYPE_FDB,</div><div class='add'>+					       &amp;action_tbl-&gt;stc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action_ste_table *</div><div class='add'>+hws_action_ste_table_alloc(struct mlx5hws_action_ste_pool_element *parent_elem)</div><div class='add'>+{</div><div class='add'>+	enum mlx5hws_pool_optimize opt = parent_elem-&gt;opt;</div><div class='add'>+	struct mlx5hws_context *ctx = parent_elem-&gt;ctx;</div><div class='add'>+	struct mlx5hws_action_ste_table *action_tbl;</div><div class='add'>+	size_t log_sz;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	log_sz = min(parent_elem-&gt;log_sz ?</div><div class='add'>+			     parent_elem-&gt;log_sz +</div><div class='add'>+				     MLX5HWS_ACTION_STE_TABLE_STEP_LOG_SZ :</div><div class='add'>+				   MLX5HWS_ACTION_STE_TABLE_INIT_LOG_SZ,</div><div class='add'>+		     MLX5HWS_ACTION_STE_TABLE_MAX_LOG_SZ);</div><div class='add'>+</div><div class='add'>+	action_tbl = kzalloc(sizeof(*action_tbl), GFP_KERNEL);</div><div class='add'>+	if (!action_tbl)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	err = hws_action_ste_table_create_pool(ctx, action_tbl, opt, log_sz);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_tbl;</div><div class='add'>+</div><div class='add'>+	err = hws_action_ste_table_create_rtcs(ctx, action_tbl, opt, log_sz);</div><div class='add'>+	if (err)</div><div class='add'>+		goto destroy_pool;</div><div class='add'>+</div><div class='add'>+	err = hws_action_ste_table_create_stc(ctx, action_tbl);</div><div class='add'>+	if (err)</div><div class='add'>+		goto destroy_rtcs;</div><div class='add'>+</div><div class='add'>+	action_tbl-&gt;parent_elem = parent_elem;</div><div class='add'>+	INIT_LIST_HEAD(&amp;action_tbl-&gt;list_node);</div><div class='add'>+	action_tbl-&gt;last_used = jiffies;</div><div class='add'>+	list_add(&amp;action_tbl-&gt;list_node, &amp;parent_elem-&gt;available);</div><div class='add'>+	parent_elem-&gt;log_sz = log_sz;</div><div class='add'>+</div><div class='add'>+	mlx5hws_dbg(ctx,</div><div class='add'>+		    "Allocated %s action STE table log_sz %zu; STEs (%d, %d); RTCs (%d, %d); STC %d\n",</div><div class='add'>+		    hws_pool_opt_to_str(opt), log_sz,</div><div class='add'>+		    mlx5hws_pool_get_base_id(action_tbl-&gt;pool),</div><div class='add'>+		    mlx5hws_pool_get_base_mirror_id(action_tbl-&gt;pool),</div><div class='add'>+		    action_tbl-&gt;rtc_0_id, action_tbl-&gt;rtc_1_id,</div><div class='add'>+		    action_tbl-&gt;stc.offset);</div><div class='add'>+</div><div class='add'>+	return action_tbl;</div><div class='add'>+</div><div class='add'>+destroy_rtcs:</div><div class='add'>+	hws_action_ste_table_destroy_rtcs(action_tbl);</div><div class='add'>+destroy_pool:</div><div class='add'>+	mlx5hws_pool_destroy(action_tbl-&gt;pool);</div><div class='add'>+free_tbl:</div><div class='add'>+	kfree(action_tbl);</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+hws_action_ste_table_destroy(struct mlx5hws_action_ste_table *action_tbl)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *ctx = action_tbl-&gt;parent_elem-&gt;ctx;</div><div class='add'>+</div><div class='add'>+	mlx5hws_dbg(ctx,</div><div class='add'>+		    "Destroying %s action STE table: STEs (%d, %d); RTCs (%d, %d); STC %d\n",</div><div class='add'>+		    hws_pool_opt_to_str(action_tbl-&gt;parent_elem-&gt;opt),</div><div class='add'>+		    mlx5hws_pool_get_base_id(action_tbl-&gt;pool),</div><div class='add'>+		    mlx5hws_pool_get_base_mirror_id(action_tbl-&gt;pool),</div><div class='add'>+		    action_tbl-&gt;rtc_0_id, action_tbl-&gt;rtc_1_id,</div><div class='add'>+		    action_tbl-&gt;stc.offset);</div><div class='add'>+</div><div class='add'>+	mlx5hws_action_free_single_stc(ctx, MLX5HWS_TABLE_TYPE_FDB,</div><div class='add'>+				       &amp;action_tbl-&gt;stc);</div><div class='add'>+	hws_action_ste_table_destroy_rtcs(action_tbl);</div><div class='add'>+	mlx5hws_pool_destroy(action_tbl-&gt;pool);</div><div class='add'>+</div><div class='add'>+	list_del(&amp;action_tbl-&gt;list_node);</div><div class='add'>+	kfree(action_tbl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hws_action_ste_pool_element_init(struct mlx5hws_context *ctx,</div><div class='add'>+				 struct mlx5hws_action_ste_pool_element *elem,</div><div class='add'>+				 enum mlx5hws_pool_optimize opt)</div><div class='add'>+{</div><div class='add'>+	elem-&gt;ctx = ctx;</div><div class='add'>+	elem-&gt;opt = opt;</div><div class='add'>+	INIT_LIST_HEAD(&amp;elem-&gt;available);</div><div class='add'>+	INIT_LIST_HEAD(&amp;elem-&gt;full);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_action_ste_pool_element_destroy(</div><div class='add'>+	struct mlx5hws_action_ste_pool_element *elem)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_ste_table *action_tbl, *p;</div><div class='add'>+</div><div class='add'>+	/* This should be empty, but attempt to free its elements anyway. */</div><div class='add'>+	list_for_each_entry_safe(action_tbl, p, &amp;elem-&gt;full, list_node)</div><div class='add'>+		hws_action_ste_table_destroy(action_tbl);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(action_tbl, p, &amp;elem-&gt;available, list_node)</div><div class='add'>+		hws_action_ste_table_destroy(action_tbl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_action_ste_pool_init(struct mlx5hws_context *ctx,</div><div class='add'>+				    struct mlx5hws_action_ste_pool *pool)</div><div class='add'>+{</div><div class='add'>+	enum mlx5hws_pool_optimize opt;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;pool-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Rules which are added for both RX and TX must use the same action STE</div><div class='add'>+	 * indices for both. If we were to use a single table, then RX-only and</div><div class='add'>+	 * TX-only rules would waste the unused entries. Thus, we use separate</div><div class='add'>+	 * table sets for the three cases.</div><div class='add'>+	 */</div><div class='add'>+	for (opt = MLX5HWS_POOL_OPTIMIZE_NONE; opt &lt; MLX5HWS_POOL_OPTIMIZE_MAX;</div><div class='add'>+	     opt++) {</div><div class='add'>+		err = hws_action_ste_pool_element_init(ctx, &amp;pool-&gt;elems[opt],</div><div class='add'>+						       opt);</div><div class='add'>+		if (err)</div><div class='add'>+			goto destroy_elems;</div><div class='add'>+		pool-&gt;elems[opt].parent_pool = pool;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy_elems:</div><div class='add'>+	while (opt-- &gt; MLX5HWS_POOL_OPTIMIZE_NONE)</div><div class='add'>+		hws_action_ste_pool_element_destroy(&amp;pool-&gt;elems[opt]);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_action_ste_pool_destroy(struct mlx5hws_action_ste_pool *pool)</div><div class='add'>+{</div><div class='add'>+	int opt;</div><div class='add'>+</div><div class='add'>+	for (opt = MLX5HWS_POOL_OPTIMIZE_MAX - 1;</div><div class='add'>+	     opt &gt;= MLX5HWS_POOL_OPTIMIZE_NONE; opt--)</div><div class='add'>+		hws_action_ste_pool_element_destroy(&amp;pool-&gt;elems[opt]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_action_ste_pool_element_collect_stale(</div><div class='add'>+	struct mlx5hws_action_ste_pool_element *elem, struct list_head *cleanup)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_ste_table *action_tbl, *p;</div><div class='add'>+	unsigned long expire_time, now;</div><div class='add'>+</div><div class='add'>+	expire_time = secs_to_jiffies(MLX5HWS_ACTION_STE_POOL_EXPIRE_SECONDS);</div><div class='add'>+	now = jiffies;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(action_tbl, p, &amp;elem-&gt;available, list_node) {</div><div class='add'>+		if (mlx5hws_pool_full(action_tbl-&gt;pool) &amp;&amp;</div><div class='add'>+		    time_before(action_tbl-&gt;last_used + expire_time, now))</div><div class='add'>+			list_move(&amp;action_tbl-&gt;list_node, cleanup);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_action_ste_table_cleanup_list(struct list_head *cleanup)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_ste_table *action_tbl, *p;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(action_tbl, p, cleanup, list_node)</div><div class='add'>+		hws_action_ste_table_destroy(action_tbl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_action_ste_pool_cleanup(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	enum mlx5hws_pool_optimize opt;</div><div class='add'>+	struct mlx5hws_context *ctx;</div><div class='add'>+	LIST_HEAD(cleanup);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ctx = container_of(work, struct mlx5hws_context,</div><div class='add'>+			   action_ste_cleanup.work);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ctx-&gt;queues; i++) {</div><div class='add'>+		struct mlx5hws_action_ste_pool *p = &amp;ctx-&gt;action_ste_pool[i];</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;p-&gt;lock);</div><div class='add'>+		for (opt = MLX5HWS_POOL_OPTIMIZE_NONE;</div><div class='add'>+		     opt &lt; MLX5HWS_POOL_OPTIMIZE_MAX; opt++)</div><div class='add'>+			hws_action_ste_pool_element_collect_stale(</div><div class='add'>+				&amp;p-&gt;elems[opt], &amp;cleanup);</div><div class='add'>+		mutex_unlock(&amp;p-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hws_action_ste_table_cleanup_list(&amp;cleanup);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;ctx-&gt;action_ste_cleanup,</div><div class='add'>+			      secs_to_jiffies(</div><div class='add'>+				  MLX5HWS_ACTION_STE_POOL_CLEANUP_SECONDS));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5hws_action_ste_pool_init(struct mlx5hws_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_ste_pool *pool;</div><div class='add'>+	size_t queues = ctx-&gt;queues;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	pool = kcalloc(queues, sizeof(*pool), GFP_KERNEL);</div><div class='add'>+	if (!pool)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; queues; i++) {</div><div class='add'>+		err = hws_action_ste_pool_init(ctx, &amp;pool[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_pool;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctx-&gt;action_ste_pool = pool;</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;ctx-&gt;action_ste_cleanup,</div><div class='add'>+			  hws_action_ste_pool_cleanup);</div><div class='add'>+	schedule_delayed_work(</div><div class='add'>+		&amp;ctx-&gt;action_ste_cleanup,</div><div class='add'>+		secs_to_jiffies(MLX5HWS_ACTION_STE_POOL_CLEANUP_SECONDS));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_pool:</div><div class='add'>+	while (i--)</div><div class='add'>+		hws_action_ste_pool_destroy(&amp;pool[i]);</div><div class='add'>+	kfree(pool);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5hws_action_ste_pool_uninit(struct mlx5hws_context *ctx)</div><div class='add'>+{</div><div class='add'>+	size_t queues = ctx-&gt;queues;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;ctx-&gt;action_ste_cleanup);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; queues; i++)</div><div class='add'>+		hws_action_ste_pool_destroy(&amp;ctx-&gt;action_ste_pool[i]);</div><div class='add'>+</div><div class='add'>+	kfree(ctx-&gt;action_ste_pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action_ste_pool_element *</div><div class='add'>+hws_action_ste_choose_elem(struct mlx5hws_action_ste_pool *pool,</div><div class='add'>+			   bool skip_rx, bool skip_tx)</div><div class='add'>+{</div><div class='add'>+	if (skip_rx)</div><div class='add'>+		return &amp;pool-&gt;elems[MLX5HWS_POOL_OPTIMIZE_MIRROR];</div><div class='add'>+</div><div class='add'>+	if (skip_tx)</div><div class='add'>+		return &amp;pool-&gt;elems[MLX5HWS_POOL_OPTIMIZE_ORIG];</div><div class='add'>+</div><div class='add'>+	return &amp;pool-&gt;elems[MLX5HWS_POOL_OPTIMIZE_NONE];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hws_action_ste_table_chunk_alloc(struct mlx5hws_action_ste_table *action_tbl,</div><div class='add'>+				 struct mlx5hws_action_ste_chunk *chunk)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5hws_pool_chunk_alloc(action_tbl-&gt;pool, &amp;chunk-&gt;ste);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	chunk-&gt;action_tbl = action_tbl;</div><div class='add'>+	action_tbl-&gt;last_used = jiffies;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5hws_action_ste_chunk_alloc(struct mlx5hws_action_ste_pool *pool,</div><div class='add'>+				   bool skip_rx, bool skip_tx,</div><div class='add'>+				   struct mlx5hws_action_ste_chunk *chunk)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_ste_pool_element *elem;</div><div class='add'>+	struct mlx5hws_action_ste_table *action_tbl;</div><div class='add'>+	bool found;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (skip_rx &amp;&amp; skip_tx)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pool-&gt;lock);</div><div class='add'>+</div><div class='add'>+	elem = hws_action_ste_choose_elem(pool, skip_rx, skip_tx);</div><div class='add'>+</div><div class='add'>+	mlx5hws_dbg(elem-&gt;ctx,</div><div class='add'>+		    "Allocating action STEs skip_rx %d skip_tx %d order %d\n",</div><div class='add'>+		    skip_rx, skip_tx, chunk-&gt;ste.order);</div><div class='add'>+</div><div class='add'>+	found = false;</div><div class='add'>+	list_for_each_entry(action_tbl, &amp;elem-&gt;available, list_node) {</div><div class='add'>+		if (!hws_action_ste_table_chunk_alloc(action_tbl, chunk)) {</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!found) {</div><div class='add'>+		action_tbl = hws_action_ste_table_alloc(elem);</div><div class='add'>+		if (IS_ERR(action_tbl)) {</div><div class='add'>+			err = PTR_ERR(action_tbl);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = hws_action_ste_table_chunk_alloc(action_tbl, chunk);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mlx5hws_pool_empty(action_tbl-&gt;pool))</div><div class='add'>+		list_move(&amp;action_tbl-&gt;list_node, &amp;elem-&gt;full);</div><div class='add'>+</div><div class='add'>+	err = 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;pool-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5hws_action_ste_chunk_free(struct mlx5hws_action_ste_chunk *chunk)</div><div class='add'>+{</div><div class='add'>+	struct mutex *lock = &amp;chunk-&gt;action_tbl-&gt;parent_elem-&gt;parent_pool-&gt;lock;</div><div class='add'>+</div><div class='add'>+	mlx5hws_dbg(chunk-&gt;action_tbl-&gt;pool-&gt;ctx,</div><div class='add'>+		    "Freeing action STEs offset %d order %d\n",</div><div class='add'>+		    chunk-&gt;ste.offset, chunk-&gt;ste.order);</div><div class='add'>+</div><div class='add'>+	mutex_lock(lock);</div><div class='add'>+	mlx5hws_pool_chunk_free(chunk-&gt;action_tbl-&gt;pool, &amp;chunk-&gt;ste);</div><div class='add'>+	chunk-&gt;action_tbl-&gt;last_used = jiffies;</div><div class='add'>+	list_move(&amp;chunk-&gt;action_tbl-&gt;list_node,</div><div class='add'>+		  &amp;chunk-&gt;action_tbl-&gt;parent_elem-&gt;available);</div><div class='add'>+	mutex_unlock(lock);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.h<br/>new file mode 100644<br/>index 000000000000..a8ba97359e31<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.h</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2025 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#ifndef ACTION_STE_POOL_H_</div><div class='add'>+#define ACTION_STE_POOL_H_</div><div class='add'>+</div><div class='add'>+#define MLX5HWS_ACTION_STE_TABLE_INIT_LOG_SZ 10</div><div class='add'>+#define MLX5HWS_ACTION_STE_TABLE_STEP_LOG_SZ 1</div><div class='add'>+#define MLX5HWS_ACTION_STE_TABLE_MAX_LOG_SZ 20</div><div class='add'>+</div><div class='add'>+#define MLX5HWS_ACTION_STE_POOL_CLEANUP_SECONDS 300</div><div class='add'>+#define MLX5HWS_ACTION_STE_POOL_EXPIRE_SECONDS 300</div><div class='add'>+</div><div class='add'>+struct mlx5hws_action_ste_pool_element;</div><div class='add'>+</div><div class='add'>+struct mlx5hws_action_ste_table {</div><div class='add'>+	struct mlx5hws_action_ste_pool_element *parent_elem;</div><div class='add'>+	/* Wraps the RTC and STE range for this given action. */</div><div class='add'>+	struct mlx5hws_pool *pool;</div><div class='add'>+	/* Match STEs use this STC to jump to this pool's RTC. */</div><div class='add'>+	struct mlx5hws_pool_chunk stc;</div><div class='add'>+	u32 rtc_0_id;</div><div class='add'>+	u32 rtc_1_id;</div><div class='add'>+	struct list_head list_node;</div><div class='add'>+	unsigned long last_used;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5hws_action_ste_pool_element {</div><div class='add'>+	struct mlx5hws_context *ctx;</div><div class='add'>+	struct mlx5hws_action_ste_pool *parent_pool;</div><div class='add'>+	size_t log_sz;  /* Size of the largest table so far. */</div><div class='add'>+	enum mlx5hws_pool_optimize opt;</div><div class='add'>+	struct list_head available;</div><div class='add'>+	struct list_head full;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Central repository of action STEs. The context contains one of these pools</div><div class='add'>+ * per queue.</div><div class='add'>+ */</div><div class='add'>+struct mlx5hws_action_ste_pool {</div><div class='add'>+	/* Protects the entire pool. We have one pool per queue and only one</div><div class='add'>+	 * operation can be active per rule at a given time. Thus this lock</div><div class='add'>+	 * protects solely against concurrent garbage collection and we expect</div><div class='add'>+	 * very little contention.</div><div class='add'>+	 */</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	struct mlx5hws_action_ste_pool_element elems[MLX5HWS_POOL_OPTIMIZE_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* A chunk of STEs and the table it was allocated from. Used by rules. */</div><div class='add'>+struct mlx5hws_action_ste_chunk {</div><div class='add'>+	struct mlx5hws_action_ste_table *action_tbl;</div><div class='add'>+	struct mlx5hws_pool_chunk ste;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mlx5hws_action_ste_pool_init(struct mlx5hws_context *ctx);</div><div class='add'>+</div><div class='add'>+void mlx5hws_action_ste_pool_uninit(struct mlx5hws_context *ctx);</div><div class='add'>+</div><div class='add'>+/* Callers are expected to fill chunk-&gt;ste.order. On success, this function</div><div class='add'>+ * populates chunk-&gt;tbl and chunk-&gt;ste.offset.</div><div class='add'>+ */</div><div class='add'>+int mlx5hws_action_ste_chunk_alloc(struct mlx5hws_action_ste_pool *pool,</div><div class='add'>+				   bool skip_rx, bool skip_tx,</div><div class='add'>+				   struct mlx5hws_action_ste_chunk *chunk);</div><div class='add'>+</div><div class='add'>+void mlx5hws_action_ste_chunk_free(struct mlx5hws_action_ste_chunk *chunk);</div><div class='add'>+</div><div class='add'>+#endif /* ACTION_STE_POOL_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_buddy.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.c<br/>index e6ed66202a40..b9aef80ba094 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_buddy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_buddy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.c</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='del'>-#include "mlx5hws_buddy.h"</div><div class='add'>+#include "internal.h"</div><div class='add'>+#include "buddy.h"</div><div class='ctx'> </div><div class='ctx'> static int hws_buddy_init(struct mlx5hws_buddy_mem *buddy, u32 max_order)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_buddy.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.h<br/>index 338c44bbedaf..ef6b223677aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_buddy.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_buddy.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#ifndef MLX5HWS_BUDDY_H_</div><div class='del'>-#define MLX5HWS_BUDDY_H_</div><div class='add'>+#ifndef HWS_BUDDY_H_</div><div class='add'>+#define HWS_BUDDY_H_</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_buddy_mem {</div><div class='ctx'> 	unsigned long **bitmap;</div><div class='hunk'>@@ -18,4 +18,4 @@ int mlx5hws_buddy_alloc_mem(struct mlx5hws_buddy_mem *buddy, u32 order);</div><div class='ctx'> </div><div class='ctx'> void mlx5hws_buddy_free_mem(struct mlx5hws_buddy_mem *buddy, u32 seg, u32 order);</div><div class='ctx'> </div><div class='del'>-#endif /* MLX5HWS_BUDDY_H_ */</div><div class='add'>+#endif /* HWS_BUDDY_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c<br/>index 8f3a6f9d703d..6ef0c4be27e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> static u16 hws_bwc_gen_queue_idx(struct mlx5hws_context *ctx)</div><div class='ctx'> {</div><div class='hunk'>@@ -46,9 +46,10 @@ static void hws_bwc_unlock_all_queues(struct mlx5hws_context *ctx)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hws_bwc_matcher_init_attr(struct mlx5hws_matcher_attr *attr,</div><div class='add'>+static void hws_bwc_matcher_init_attr(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='ctx'> 				      u32 priority,</div><div class='del'>-				      u8 size_log)</div><div class='add'>+				      u8 size_log_rx, u8 size_log_tx,</div><div class='add'>+				      struct mlx5hws_matcher_attr *attr)</div><div class='ctx'> {</div><div class='ctx'> 	memset(attr, 0, sizeof(*attr));</div><div class='ctx'> </div><div class='hunk'>@@ -58,11 +59,170 @@ static void hws_bwc_matcher_init_attr(struct mlx5hws_matcher_attr *attr,</div><div class='ctx'> 	attr-&gt;optimize_flow_src = MLX5HWS_MATCHER_FLOW_SRC_ANY;</div><div class='ctx'> 	attr-&gt;insert_mode = MLX5HWS_MATCHER_INSERT_BY_HASH;</div><div class='ctx'> 	attr-&gt;distribute_mode = MLX5HWS_MATCHER_DISTRIBUTE_BY_HASH;</div><div class='del'>-	attr-&gt;rule.num_log = size_log;</div><div class='add'>+	attr-&gt;size[MLX5HWS_MATCHER_SIZE_TYPE_RX].rule.num_log = size_log_rx;</div><div class='add'>+	attr-&gt;size[MLX5HWS_MATCHER_SIZE_TYPE_TX].rule.num_log = size_log_tx;</div><div class='ctx'> 	attr-&gt;resizable = true;</div><div class='ctx'> 	attr-&gt;max_num_of_at_attach = MLX5HWS_BWC_MATCHER_ATTACH_AT_NUM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+hws_bwc_matcher_move_all_simple(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	struct mlx5hws_matcher *matcher = bwc_matcher-&gt;matcher;</div><div class='add'>+	int drain_error = 0, move_error = 0, poll_error = 0;</div><div class='add'>+	u16 bwc_queues = mlx5hws_bwc_queues(ctx);</div><div class='add'>+	struct mlx5hws_rule_attr rule_attr;</div><div class='add'>+	struct mlx5hws_bwc_rule *bwc_rule;</div><div class='add'>+	struct mlx5hws_send_engine *queue;</div><div class='add'>+	struct list_head *rules_list;</div><div class='add'>+	u32 pending_rules;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+	bool drain;</div><div class='add'>+</div><div class='add'>+	mlx5hws_bwc_rule_fill_attr(bwc_matcher, 0, 0, &amp;rule_attr);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bwc_queues; i++) {</div><div class='add'>+		if (list_empty(&amp;bwc_matcher-&gt;rules[i]))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pending_rules = 0;</div><div class='add'>+		rule_attr.queue_id = mlx5hws_bwc_get_queue_id(ctx, i);</div><div class='add'>+		rules_list = &amp;bwc_matcher-&gt;rules[i];</div><div class='add'>+</div><div class='add'>+		list_for_each_entry(bwc_rule, rules_list, list_node) {</div><div class='add'>+			ret = mlx5hws_matcher_resize_rule_move(matcher,</div><div class='add'>+							       bwc_rule-&gt;rule,</div><div class='add'>+							       &amp;rule_attr);</div><div class='add'>+			if (unlikely(ret)) {</div><div class='add'>+				if (!move_error) {</div><div class='add'>+					mlx5hws_err(ctx,</div><div class='add'>+						    "Moving BWC rule: move failed (%d), attempting to move rest of the rules\n",</div><div class='add'>+						    ret);</div><div class='add'>+					move_error = ret;</div><div class='add'>+				}</div><div class='add'>+				/* Rule wasn't queued, no need to poll */</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			pending_rules++;</div><div class='add'>+			drain = pending_rules &gt;=</div><div class='add'>+				hws_bwc_get_burst_th(ctx, rule_attr.queue_id);</div><div class='add'>+			ret = mlx5hws_bwc_queue_poll(ctx,</div><div class='add'>+						     rule_attr.queue_id,</div><div class='add'>+						     &amp;pending_rules,</div><div class='add'>+						     drain);</div><div class='add'>+			if (unlikely(ret)) {</div><div class='add'>+				if (ret == -ETIMEDOUT) {</div><div class='add'>+					mlx5hws_err(ctx,</div><div class='add'>+						    "Moving BWC rule: timeout polling for completions (%d), aborting rehash\n",</div><div class='add'>+						    ret);</div><div class='add'>+					return ret;</div><div class='add'>+				}</div><div class='add'>+				if (!poll_error) {</div><div class='add'>+					mlx5hws_err(ctx,</div><div class='add'>+						    "Moving BWC rule: polling for completions failed (%d), attempting to move rest of the rules\n",</div><div class='add'>+						    ret);</div><div class='add'>+					poll_error = ret;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pending_rules) {</div><div class='add'>+			queue = &amp;ctx-&gt;send_queue[rule_attr.queue_id];</div><div class='add'>+			mlx5hws_send_engine_flush_queue(queue);</div><div class='add'>+			ret = mlx5hws_bwc_queue_poll(ctx,</div><div class='add'>+						     rule_attr.queue_id,</div><div class='add'>+						     &amp;pending_rules,</div><div class='add'>+						     true);</div><div class='add'>+			if (unlikely(ret)) {</div><div class='add'>+				if (ret == -ETIMEDOUT) {</div><div class='add'>+					mlx5hws_err(ctx,</div><div class='add'>+						    "Moving bwc rule: timeout draining completions (%d), aborting rehash\n",</div><div class='add'>+						    ret);</div><div class='add'>+					return ret;</div><div class='add'>+				}</div><div class='add'>+				if (!drain_error) {</div><div class='add'>+					mlx5hws_err(ctx,</div><div class='add'>+						    "Moving bwc rule: drain failed (%d), attempting to move rest of the rules\n",</div><div class='add'>+						    ret);</div><div class='add'>+					drain_error = ret;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Return the first error that happened */</div><div class='add'>+	if (unlikely(move_error))</div><div class='add'>+		return move_error;</div><div class='add'>+	if (unlikely(poll_error))</div><div class='add'>+		return poll_error;</div><div class='add'>+	if (unlikely(drain_error))</div><div class='add'>+		return drain_error;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_bwc_matcher_move_all(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+{</div><div class='add'>+	switch (bwc_matcher-&gt;matcher_type) {</div><div class='add'>+	case MLX5HWS_BWC_MATCHER_SIMPLE:</div><div class='add'>+		return hws_bwc_matcher_move_all_simple(bwc_matcher);</div><div class='add'>+	case MLX5HWS_BWC_MATCHER_COMPLEX_FIRST:</div><div class='add'>+		return mlx5hws_bwc_matcher_complex_move_first(bwc_matcher);</div><div class='add'>+	case MLX5HWS_BWC_MATCHER_COMPLEX_SUBMATCHER:</div><div class='add'>+		return mlx5hws_bwc_matcher_complex_move(bwc_matcher);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_bwc_matcher_move(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	struct mlx5hws_matcher_attr matcher_attr = {0};</div><div class='add'>+	struct mlx5hws_matcher *old_matcher;</div><div class='add'>+	struct mlx5hws_matcher *new_matcher;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	hws_bwc_matcher_init_attr(bwc_matcher,</div><div class='add'>+				  bwc_matcher-&gt;priority,</div><div class='add'>+				  bwc_matcher-&gt;rx_size.size_log,</div><div class='add'>+				  bwc_matcher-&gt;tx_size.size_log,</div><div class='add'>+				  &amp;matcher_attr);</div><div class='add'>+</div><div class='add'>+	old_matcher = bwc_matcher-&gt;matcher;</div><div class='add'>+	new_matcher = mlx5hws_matcher_create(old_matcher-&gt;tbl,</div><div class='add'>+					     &amp;bwc_matcher-&gt;mt, 1,</div><div class='add'>+					     bwc_matcher-&gt;at,</div><div class='add'>+					     bwc_matcher-&gt;num_of_at,</div><div class='add'>+					     &amp;matcher_attr);</div><div class='add'>+	if (!new_matcher) {</div><div class='add'>+		mlx5hws_err(ctx, "Rehash error: matcher creation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mlx5hws_matcher_resize_set_target(old_matcher, new_matcher);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(ctx, "Rehash error: failed setting resize target\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hws_bwc_matcher_move_all(bwc_matcher);</div><div class='add'>+	if (ret)</div><div class='add'>+		mlx5hws_err(ctx, "Rehash error: moving rules failed, attempting to remove the old matcher\n");</div><div class='add'>+</div><div class='add'>+	/* Error during rehash can't be rolled back.</div><div class='add'>+	 * The best option here is to allow the rehash to complete and remove</div><div class='add'>+	 * the old matcher - can't leave the matcher in the 'in_resize' state.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	bwc_matcher-&gt;matcher = new_matcher;</div><div class='add'>+	mlx5hws_matcher_destroy(old_matcher);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5hws_bwc_matcher_create_simple(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='ctx'> 				      struct mlx5hws_table *table,</div><div class='ctx'> 				      u32 priority,</div><div class='hunk'>@@ -83,12 +243,20 @@ int mlx5hws_bwc_matcher_create_simple(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='ctx'> 	for (i = 0; i &lt; bwc_queues; i++)</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;bwc_matcher-&gt;rules[i]);</div><div class='ctx'> </div><div class='del'>-	hws_bwc_matcher_init_attr(&amp;attr,</div><div class='add'>+	hws_bwc_matcher_init_attr(bwc_matcher,</div><div class='ctx'> 				  priority,</div><div class='del'>-				  MLX5HWS_BWC_MATCHER_INIT_SIZE_LOG);</div><div class='add'>+				  bwc_matcher-&gt;rx_size.size_log,</div><div class='add'>+				  bwc_matcher-&gt;tx_size.size_log,</div><div class='add'>+				  &amp;attr);</div><div class='ctx'> </div><div class='add'>+	bwc_matcher-&gt;matcher_type = MLX5HWS_BWC_MATCHER_SIMPLE;</div><div class='ctx'> 	bwc_matcher-&gt;priority = priority;</div><div class='del'>-	bwc_matcher-&gt;size_log = MLX5HWS_BWC_MATCHER_INIT_SIZE_LOG;</div><div class='add'>+</div><div class='add'>+	bwc_matcher-&gt;size_of_at_array = MLX5HWS_BWC_MATCHER_ATTACH_AT_NUM;</div><div class='add'>+	bwc_matcher-&gt;at = kcalloc(bwc_matcher-&gt;size_of_at_array,</div><div class='add'>+				  sizeof(*bwc_matcher-&gt;at), GFP_KERNEL);</div><div class='add'>+	if (!bwc_matcher-&gt;at)</div><div class='add'>+		goto free_bwc_matcher_rules;</div><div class='ctx'> </div><div class='ctx'> 	/* create dummy action template */</div><div class='ctx'> 	bwc_matcher-&gt;at[0] =</div><div class='hunk'>@@ -96,7 +264,7 @@ int mlx5hws_bwc_matcher_create_simple(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='ctx'> 					       action_types : init_action_types);</div><div class='ctx'> 	if (!bwc_matcher-&gt;at[0]) {</div><div class='ctx'> 		mlx5hws_err(table-&gt;ctx, "BWC matcher: failed creating action template\n");</div><div class='del'>-		goto free_bwc_matcher_rules;</div><div class='add'>+		goto free_bwc_matcher_at_array;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bwc_matcher-&gt;num_of_at = 1;</div><div class='hunk'>@@ -126,12 +294,28 @@ free_mt:</div><div class='ctx'> 	mlx5hws_match_template_destroy(bwc_matcher-&gt;mt);</div><div class='ctx'> free_at:</div><div class='ctx'> 	mlx5hws_action_template_destroy(bwc_matcher-&gt;at[0]);</div><div class='add'>+free_bwc_matcher_at_array:</div><div class='add'>+	kfree(bwc_matcher-&gt;at);</div><div class='ctx'> free_bwc_matcher_rules:</div><div class='ctx'> 	kfree(bwc_matcher-&gt;rules);</div><div class='ctx'> err:</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+hws_bwc_matcher_init_size_rxtx(struct mlx5hws_bwc_matcher_size *size)</div><div class='add'>+{</div><div class='add'>+	size-&gt;size_log = MLX5HWS_BWC_MATCHER_INIT_SIZE_LOG;</div><div class='add'>+	atomic_set(&amp;size-&gt;num_of_rules, 0);</div><div class='add'>+	atomic_set(&amp;size-&gt;rehash_required, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_bwc_matcher_init_size(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+{</div><div class='add'>+	hws_bwc_matcher_init_size_rxtx(&amp;bwc_matcher-&gt;rx_size);</div><div class='add'>+	hws_bwc_matcher_init_size_rxtx(&amp;bwc_matcher-&gt;tx_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct mlx5hws_bwc_matcher *</div><div class='ctx'> mlx5hws_bwc_matcher_create(struct mlx5hws_table *table,</div><div class='ctx'> 			   u32 priority,</div><div class='hunk'>@@ -152,6 +336,8 @@ mlx5hws_bwc_matcher_create(struct mlx5hws_table *table,</div><div class='ctx'> 	if (!bwc_matcher)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	hws_bwc_matcher_init_size(bwc_matcher);</div><div class='add'>+</div><div class='ctx'> 	/* Check if the required match params can be all matched</div><div class='ctx'> 	 * in single STE, otherwise complex matcher is needed.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -190,6 +376,7 @@ int mlx5hws_bwc_matcher_destroy_simple(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; bwc_matcher-&gt;num_of_at; i++)</div><div class='ctx'> 		mlx5hws_action_template_destroy(bwc_matcher-&gt;at[i]);</div><div class='add'>+	kfree(bwc_matcher-&gt;at);</div><div class='ctx'> </div><div class='ctx'> 	mlx5hws_match_template_destroy(bwc_matcher-&gt;mt);</div><div class='ctx'> 	kfree(bwc_matcher-&gt;rules);</div><div class='hunk'>@@ -199,22 +386,30 @@ int mlx5hws_bwc_matcher_destroy_simple(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='ctx'> </div><div class='ctx'> int mlx5hws_bwc_matcher_destroy(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='ctx'> {</div><div class='del'>-	if (bwc_matcher-&gt;num_of_rules)</div><div class='add'>+	u32 rx_rules = atomic_read(&amp;bwc_matcher-&gt;rx_size.num_of_rules);</div><div class='add'>+	u32 tx_rules = atomic_read(&amp;bwc_matcher-&gt;tx_size.num_of_rules);</div><div class='add'>+</div><div class='add'>+	if (rx_rules || tx_rules)</div><div class='ctx'> 		mlx5hws_err(bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx,</div><div class='del'>-			    "BWC matcher destroy: matcher still has %d rules\n",</div><div class='del'>-			    bwc_matcher-&gt;num_of_rules);</div><div class='add'>+			    "BWC matcher destroy: matcher still has %u RX and %u TX rules\n",</div><div class='add'>+			    rx_rules, tx_rules);</div><div class='ctx'> </div><div class='del'>-	mlx5hws_bwc_matcher_destroy_simple(bwc_matcher);</div><div class='add'>+	if (bwc_matcher-&gt;matcher_type == MLX5HWS_BWC_MATCHER_COMPLEX_FIRST)</div><div class='add'>+		mlx5hws_bwc_matcher_destroy_complex(bwc_matcher);</div><div class='add'>+	else</div><div class='add'>+		mlx5hws_bwc_matcher_destroy_simple(bwc_matcher);</div><div class='ctx'> </div><div class='ctx'> 	kfree(bwc_matcher);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hws_bwc_queue_poll(struct mlx5hws_context *ctx,</div><div class='del'>-			      u16 queue_id,</div><div class='del'>-			      u32 *pending_rules,</div><div class='del'>-			      bool drain)</div><div class='add'>+int mlx5hws_bwc_queue_poll(struct mlx5hws_context *ctx,</div><div class='add'>+			   u16 queue_id,</div><div class='add'>+			   u32 *pending_rules,</div><div class='add'>+			   bool drain)</div><div class='ctx'> {</div><div class='add'>+	unsigned long timeout = jiffies +</div><div class='add'>+				secs_to_jiffies(MLX5HWS_BWC_POLLING_TIMEOUT);</div><div class='ctx'> 	struct mlx5hws_flow_op_result comp[MLX5HWS_BWC_MATCHER_REHASH_BURST_TH];</div><div class='ctx'> 	u16 burst_th = hws_bwc_get_burst_th(ctx, queue_id);</div><div class='ctx'> 	bool got_comp = *pending_rules &gt;= burst_th;</div><div class='hunk'>@@ -250,6 +445,11 @@ static int hws_bwc_queue_poll(struct mlx5hws_context *ctx,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		got_comp = !!ret;</div><div class='add'>+</div><div class='add'>+		if (unlikely(!got_comp &amp;&amp; time_after(jiffies, timeout))) {</div><div class='add'>+			mlx5hws_err(ctx, "BWC poll error: polling queue %d - TIMEOUT\n", queue_id);</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -309,16 +509,12 @@ static void hws_bwc_rule_list_add(struct mlx5hws_bwc_rule *bwc_rule, u16 idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule-&gt;bwc_matcher;</div><div class='ctx'> </div><div class='del'>-	bwc_matcher-&gt;num_of_rules++;</div><div class='ctx'> 	bwc_rule-&gt;bwc_queue_idx = idx;</div><div class='ctx'> 	list_add(&amp;bwc_rule-&gt;list_node, &amp;bwc_matcher-&gt;rules[idx]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hws_bwc_rule_list_remove(struct mlx5hws_bwc_rule *bwc_rule)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule-&gt;bwc_matcher;</div><div class='del'>-</div><div class='del'>-	bwc_matcher-&gt;num_of_rules--;</div><div class='ctx'> 	list_del_init(&amp;bwc_rule-&gt;list_node);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -334,28 +530,102 @@ hws_bwc_rule_destroy_hws_sync(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> 			      struct mlx5hws_rule_attr *rule_attr)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_context *ctx = bwc_rule-&gt;bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='del'>-	struct mlx5hws_flow_op_result completion;</div><div class='add'>+	u32 expected_completions = 1;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = hws_bwc_rule_destroy_hws_async(bwc_rule, rule_attr);</div><div class='ctx'> 	if (unlikely(ret))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		ret = mlx5hws_send_queue_poll(ctx, rule_attr-&gt;queue_id, &amp;completion, 1);</div><div class='del'>-	} while (ret != 1);</div><div class='add'>+	ret = mlx5hws_bwc_queue_poll(ctx, rule_attr-&gt;queue_id,</div><div class='add'>+				     &amp;expected_completions, true);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(completion.status != MLX5HWS_FLOW_OP_SUCCESS ||</div><div class='del'>-		     (bwc_rule-&gt;rule-&gt;status != MLX5HWS_RULE_STATUS_DELETED &amp;&amp;</div><div class='del'>-		      bwc_rule-&gt;rule-&gt;status != MLX5HWS_RULE_STATUS_DELETING))) {</div><div class='del'>-		mlx5hws_err(ctx, "Failed destroying BWC rule: completion %d, rule status %d\n",</div><div class='del'>-			    completion.status, bwc_rule-&gt;rule-&gt;status);</div><div class='add'>+	if (unlikely(bwc_rule-&gt;rule-&gt;status != MLX5HWS_RULE_STATUS_DELETED &amp;&amp;</div><div class='add'>+		     bwc_rule-&gt;rule-&gt;status != MLX5HWS_RULE_STATUS_DELETING)) {</div><div class='add'>+		mlx5hws_err(ctx, "Failed destroying BWC rule: rule status %d\n",</div><div class='add'>+			    bwc_rule-&gt;rule-&gt;status);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hws_bwc_rule_cnt_dec(struct mlx5hws_bwc_rule *bwc_rule)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule-&gt;bwc_matcher;</div><div class='add'>+</div><div class='add'>+	if (!bwc_rule-&gt;skip_rx)</div><div class='add'>+		atomic_dec(&amp;bwc_matcher-&gt;rx_size.num_of_rules);</div><div class='add'>+	if (!bwc_rule-&gt;skip_tx)</div><div class='add'>+		atomic_dec(&amp;bwc_matcher-&gt;tx_size.num_of_rules);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hws_bwc_matcher_rehash_shrink(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_matcher_size *rx_size = &amp;bwc_matcher-&gt;rx_size;</div><div class='add'>+	struct mlx5hws_bwc_matcher_size *tx_size = &amp;bwc_matcher-&gt;tx_size;</div><div class='add'>+</div><div class='add'>+	/* It is possible that another thread has added a rule.</div><div class='add'>+	 * Need to check again if we really need rehash/shrink.</div><div class='add'>+	 */</div><div class='add'>+	if (atomic_read(&amp;rx_size-&gt;num_of_rules) ||</div><div class='add'>+	    atomic_read(&amp;tx_size-&gt;num_of_rules))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* If the current matcher RX/TX size is already at its initial size. */</div><div class='add'>+	if (rx_size-&gt;size_log == MLX5HWS_BWC_MATCHER_INIT_SIZE_LOG &amp;&amp;</div><div class='add'>+	    tx_size-&gt;size_log == MLX5HWS_BWC_MATCHER_INIT_SIZE_LOG)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Now we've done all the checking - do the shrinking:</div><div class='add'>+	 *  - reset match RTC size to the initial size</div><div class='add'>+	 *  - create new matcher</div><div class='add'>+	 *  - move the rules, which will not do anything as the matcher is empty</div><div class='add'>+	 *  - destroy the old matcher</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	rx_size-&gt;size_log = MLX5HWS_BWC_MATCHER_INIT_SIZE_LOG;</div><div class='add'>+	tx_size-&gt;size_log = MLX5HWS_BWC_MATCHER_INIT_SIZE_LOG;</div><div class='add'>+</div><div class='add'>+	return hws_bwc_matcher_move(bwc_matcher);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_bwc_rule_cnt_dec_with_shrink(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='add'>+					    u16 bwc_queue_idx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule-&gt;bwc_matcher;</div><div class='add'>+	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	struct mutex *queue_lock; /* Protect the queue */</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	hws_bwc_rule_cnt_dec(bwc_rule);</div><div class='add'>+</div><div class='add'>+	if (atomic_read(&amp;bwc_matcher-&gt;rx_size.num_of_rules) ||</div><div class='add'>+	    atomic_read(&amp;bwc_matcher-&gt;tx_size.num_of_rules))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Matcher has no more rules - shrink it to save ICM. */</div><div class='add'>+</div><div class='add'>+	queue_lock = hws_bwc_get_queue_lock(ctx, bwc_queue_idx);</div><div class='add'>+	mutex_unlock(queue_lock);</div><div class='add'>+</div><div class='add'>+	hws_bwc_lock_all_queues(ctx);</div><div class='add'>+	ret = hws_bwc_matcher_rehash_shrink(bwc_matcher);</div><div class='add'>+	hws_bwc_unlock_all_queues(ctx);</div><div class='add'>+</div><div class='add'>+	mutex_lock(queue_lock);</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		mlx5hws_err(ctx,</div><div class='add'>+			    "BWC rule deletion: shrinking empty matcher failed (%d)\n",</div><div class='add'>+			    ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5hws_bwc_rule_destroy_simple(struct mlx5hws_bwc_rule *bwc_rule)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule-&gt;bwc_matcher;</div><div class='hunk'>@@ -373,6 +643,7 @@ int mlx5hws_bwc_rule_destroy_simple(struct mlx5hws_bwc_rule *bwc_rule)</div><div class='ctx'> </div><div class='ctx'> 	ret = hws_bwc_rule_destroy_hws_sync(bwc_rule, &amp;attr);</div><div class='ctx'> 	hws_bwc_rule_list_remove(bwc_rule);</div><div class='add'>+	hws_bwc_rule_cnt_dec_with_shrink(bwc_rule, idx);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(queue_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -381,9 +652,14 @@ int mlx5hws_bwc_rule_destroy_simple(struct mlx5hws_bwc_rule *bwc_rule)</div><div class='ctx'> </div><div class='ctx'> int mlx5hws_bwc_rule_destroy(struct mlx5hws_bwc_rule *bwc_rule)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	bool is_complex = bwc_rule-&gt;bwc_matcher-&gt;matcher_type ==</div><div class='add'>+			  MLX5HWS_BWC_MATCHER_COMPLEX_FIRST;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	ret = mlx5hws_bwc_rule_destroy_simple(bwc_rule);</div><div class='add'>+	if (is_complex)</div><div class='add'>+		ret = mlx5hws_bwc_rule_destroy_complex(bwc_rule);</div><div class='add'>+	else</div><div class='add'>+		ret = mlx5hws_bwc_rule_destroy_simple(bwc_rule);</div><div class='ctx'> </div><div class='ctx'> 	mlx5hws_bwc_rule_free(bwc_rule);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -423,9 +699,8 @@ hws_bwc_rule_create_sync(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> 	if (unlikely(ret))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = hws_bwc_queue_poll(ctx, rule_attr-&gt;queue_id, &amp;expected_completions, true);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return mlx5hws_bwc_queue_poll(ctx, rule_attr-&gt;queue_id,</div><div class='add'>+				      &amp;expected_completions, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -446,7 +721,8 @@ hws_bwc_rule_update_sync(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> 	if (unlikely(ret))</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = hws_bwc_queue_poll(ctx, rule_attr-&gt;queue_id, &amp;expected_completions, true);</div><div class='add'>+	ret = mlx5hws_bwc_queue_poll(ctx, rule_attr-&gt;queue_id,</div><div class='add'>+				     &amp;expected_completions, true);</div><div class='ctx'> 	if (unlikely(ret))</div><div class='ctx'> 		mlx5hws_err(ctx, "Failed updating BWC rule (%d)\n", ret);</div><div class='ctx'> </div><div class='hunk'>@@ -454,23 +730,27 @@ hws_bwc_rule_update_sync(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='del'>-hws_bwc_matcher_size_maxed_out(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+hws_bwc_matcher_size_maxed_out(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='add'>+			       struct mlx5hws_bwc_matcher_size *size)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_cmd_query_caps *caps = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx-&gt;caps;</div><div class='ctx'> </div><div class='del'>-	return bwc_matcher-&gt;size_log + MLX5HWS_MATCHER_ASSURED_MAIN_TBL_DEPTH &gt;=</div><div class='del'>-	       caps-&gt;ste_alloc_log_max - 1;</div><div class='add'>+	/* check the match RTC size */</div><div class='add'>+	return (size-&gt;size_log + MLX5HWS_MATCHER_ASSURED_MAIN_TBL_DEPTH +</div><div class='add'>+		MLX5HWS_BWC_MATCHER_SIZE_LOG_STEP) &gt;</div><div class='add'>+	       (caps-&gt;ste_alloc_log_max - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='ctx'> hws_bwc_matcher_rehash_size_needed(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='add'>+				   struct mlx5hws_bwc_matcher_size *size,</div><div class='ctx'> 				   u32 num_of_rules)</div><div class='ctx'> {</div><div class='del'>-	if (unlikely(hws_bwc_matcher_size_maxed_out(bwc_matcher)))</div><div class='add'>+	if (unlikely(hws_bwc_matcher_size_maxed_out(bwc_matcher, size)))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely((num_of_rules * 100 / MLX5HWS_BWC_MATCHER_REHASH_PERCENT_TH) &gt;=</div><div class='del'>-		     (1UL &lt;&lt; bwc_matcher-&gt;size_log)))</div><div class='add'>+		     (1UL &lt;&lt; size-&gt;size_log)))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='hunk'>@@ -496,6 +776,23 @@ hws_bwc_matcher_extend_at(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='ctx'> 			  struct mlx5hws_rule_action rule_actions[])</div><div class='ctx'> {</div><div class='ctx'> 	enum mlx5hws_action_type action_types[MLX5HWS_BWC_MAX_ACTS];</div><div class='add'>+	void *p;</div><div class='add'>+</div><div class='add'>+	if (unlikely(bwc_matcher-&gt;num_of_at &gt;= bwc_matcher-&gt;size_of_at_array)) {</div><div class='add'>+		if (bwc_matcher-&gt;size_of_at_array &gt;= MLX5HWS_MATCHER_MAX_AT)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		bwc_matcher-&gt;size_of_at_array *= 2;</div><div class='add'>+		p = krealloc(bwc_matcher-&gt;at,</div><div class='add'>+			     bwc_matcher-&gt;size_of_at_array *</div><div class='add'>+				     sizeof(*bwc_matcher-&gt;at),</div><div class='add'>+			     __GFP_ZERO | GFP_KERNEL);</div><div class='add'>+		if (!p) {</div><div class='add'>+			bwc_matcher-&gt;size_of_at_array /= 2;</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		bwc_matcher-&gt;at = p;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	hws_bwc_rule_actions_to_action_types(rule_actions, action_types);</div><div class='ctx'> </div><div class='hunk'>@@ -510,20 +807,21 @@ hws_bwc_matcher_extend_at(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-hws_bwc_matcher_extend_size(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+hws_bwc_matcher_extend_size(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='add'>+			    struct mlx5hws_bwc_matcher_size *size)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='ctx'> 	struct mlx5hws_cmd_query_caps *caps = ctx-&gt;caps;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(hws_bwc_matcher_size_maxed_out(bwc_matcher))) {</div><div class='add'>+	if (unlikely(hws_bwc_matcher_size_maxed_out(bwc_matcher, size))) {</div><div class='ctx'> 		mlx5hws_err(ctx, "Can't resize matcher: depth exceeds limit %d\n",</div><div class='ctx'> 			    caps-&gt;rtc_log_depth_max);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bwc_matcher-&gt;size_log =</div><div class='del'>-		min(bwc_matcher-&gt;size_log + MLX5HWS_BWC_MATCHER_SIZE_LOG_STEP,</div><div class='del'>-		    caps-&gt;ste_alloc_log_max - MLX5HWS_MATCHER_ASSURED_MAIN_TBL_DEPTH);</div><div class='add'>+	size-&gt;size_log = min(size-&gt;size_log + MLX5HWS_BWC_MATCHER_SIZE_LOG_STEP,</div><div class='add'>+			     caps-&gt;ste_alloc_log_max -</div><div class='add'>+				     MLX5HWS_MATCHER_ASSURED_MAIN_TBL_DEPTH);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -556,182 +854,171 @@ hws_bwc_matcher_find_at(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hws_bwc_matcher_move_all_simple(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+static int</div><div class='add'>+hws_bwc_matcher_rehash_size(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='del'>-	u16 bwc_queues = mlx5hws_bwc_queues(ctx);</div><div class='del'>-	struct mlx5hws_bwc_rule **bwc_rules;</div><div class='del'>-	struct mlx5hws_rule_attr rule_attr;</div><div class='del'>-	u32 *pending_rules;</div><div class='del'>-	int i, j, ret = 0;</div><div class='del'>-	bool all_done;</div><div class='del'>-	u16 burst_th;</div><div class='add'>+	bool need_rx_rehash, need_tx_rehash;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	mlx5hws_bwc_rule_fill_attr(bwc_matcher, 0, 0, &amp;rule_attr);</div><div class='add'>+	need_rx_rehash = atomic_read(&amp;bwc_matcher-&gt;rx_size.rehash_required);</div><div class='add'>+	need_tx_rehash = atomic_read(&amp;bwc_matcher-&gt;tx_size.rehash_required);</div><div class='ctx'> </div><div class='del'>-	pending_rules = kcalloc(bwc_queues, sizeof(*pending_rules), GFP_KERNEL);</div><div class='del'>-	if (!pending_rules)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	/* It is possible that another rule has already performed rehash.</div><div class='add'>+	 * Need to check again if we really need rehash.</div><div class='add'>+	 */</div><div class='add'>+	if (!need_rx_rehash &amp;&amp; !need_tx_rehash)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	bwc_rules = kcalloc(bwc_queues, sizeof(*bwc_rules), GFP_KERNEL);</div><div class='del'>-	if (!bwc_rules) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto free_pending_rules;</div><div class='add'>+	/* If the current matcher RX/TX size is already at its max size,</div><div class='add'>+	 * it can't be rehashed.</div><div class='add'>+	 */</div><div class='add'>+	if (need_rx_rehash &amp;&amp;</div><div class='add'>+	    hws_bwc_matcher_size_maxed_out(bwc_matcher,</div><div class='add'>+					   &amp;bwc_matcher-&gt;rx_size)) {</div><div class='add'>+		atomic_set(&amp;bwc_matcher-&gt;rx_size.rehash_required, false);</div><div class='add'>+		need_rx_rehash = false;</div><div class='add'>+	}</div><div class='add'>+	if (need_tx_rehash &amp;&amp;</div><div class='add'>+	    hws_bwc_matcher_size_maxed_out(bwc_matcher,</div><div class='add'>+					   &amp;bwc_matcher-&gt;tx_size)) {</div><div class='add'>+		atomic_set(&amp;bwc_matcher-&gt;tx_size.rehash_required, false);</div><div class='add'>+		need_tx_rehash = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; bwc_queues; i++) {</div><div class='del'>-		if (list_empty(&amp;bwc_matcher-&gt;rules[i]))</div><div class='del'>-			bwc_rules[i] = NULL;</div><div class='del'>-		else</div><div class='del'>-			bwc_rules[i] = list_first_entry(&amp;bwc_matcher-&gt;rules[i],</div><div class='del'>-							struct mlx5hws_bwc_rule,</div><div class='del'>-							list_node);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		all_done = true;</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; bwc_queues; i++) {</div><div class='del'>-			rule_attr.queue_id = mlx5hws_bwc_get_queue_id(ctx, i);</div><div class='del'>-			burst_th = hws_bwc_get_burst_th(ctx, rule_attr.queue_id);</div><div class='del'>-</div><div class='del'>-			for (j = 0; j &lt; burst_th &amp;&amp; bwc_rules[i]; j++) {</div><div class='del'>-				rule_attr.burst = !!((j + 1) % burst_th);</div><div class='del'>-				ret = mlx5hws_matcher_resize_rule_move(bwc_matcher-&gt;matcher,</div><div class='del'>-								       bwc_rules[i]-&gt;rule,</div><div class='del'>-								       &amp;rule_attr);</div><div class='del'>-				if (unlikely(ret)) {</div><div class='del'>-					mlx5hws_err(ctx,</div><div class='del'>-						    "Moving BWC rule failed during rehash (%d)\n",</div><div class='del'>-						    ret);</div><div class='del'>-					goto free_bwc_rules;</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				all_done = false;</div><div class='del'>-				pending_rules[i]++;</div><div class='del'>-				bwc_rules[i] = list_is_last(&amp;bwc_rules[i]-&gt;list_node,</div><div class='del'>-							    &amp;bwc_matcher-&gt;rules[i]) ?</div><div class='del'>-					       NULL : list_next_entry(bwc_rules[i], list_node);</div><div class='add'>+	/* If both RX and TX rehash flags are now off, it means that whatever</div><div class='add'>+	 * we wanted to rehash is now at its max size - no rehash can be done.</div><div class='add'>+	 * Return and try adding the rule again - perhaps there was some change.</div><div class='add'>+	 */</div><div class='add'>+	if (!need_rx_rehash &amp;&amp; !need_tx_rehash)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-				ret = hws_bwc_queue_poll(ctx, rule_attr.queue_id,</div><div class='del'>-							 &amp;pending_rules[i], false);</div><div class='del'>-				if (unlikely(ret))</div><div class='del'>-					goto free_bwc_rules;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	} while (!all_done);</div><div class='add'>+	/* Now we're done all the checking - do the rehash:</div><div class='add'>+	 *  - extend match RTC size</div><div class='add'>+	 *  - create new matcher</div><div class='add'>+	 *  - move all the rules to the new matcher</div><div class='add'>+	 *  - destroy the old matcher</div><div class='add'>+	 */</div><div class='add'>+	atomic_set(&amp;bwc_matcher-&gt;rx_size.rehash_required, false);</div><div class='add'>+	atomic_set(&amp;bwc_matcher-&gt;tx_size.rehash_required, false);</div><div class='ctx'> </div><div class='del'>-	/* drain all the bwc queues */</div><div class='del'>-	for (i = 0; i &lt; bwc_queues; i++) {</div><div class='del'>-		if (pending_rules[i]) {</div><div class='del'>-			u16 queue_id = mlx5hws_bwc_get_queue_id(ctx, i);</div><div class='del'>-</div><div class='del'>-			mlx5hws_send_engine_flush_queue(&amp;ctx-&gt;send_queue[queue_id]);</div><div class='del'>-			ret = hws_bwc_queue_poll(ctx, queue_id,</div><div class='del'>-						 &amp;pending_rules[i], true);</div><div class='del'>-			if (unlikely(ret))</div><div class='del'>-				goto free_bwc_rules;</div><div class='del'>-		}</div><div class='add'>+	if (need_rx_rehash) {</div><div class='add'>+		ret = hws_bwc_matcher_extend_size(bwc_matcher,</div><div class='add'>+						  &amp;bwc_matcher-&gt;rx_size);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-free_bwc_rules:</div><div class='del'>-	kfree(bwc_rules);</div><div class='del'>-free_pending_rules:</div><div class='del'>-	kfree(pending_rules);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='add'>+	if (need_tx_rehash) {</div><div class='add'>+		ret = hws_bwc_matcher_extend_size(bwc_matcher,</div><div class='add'>+						  &amp;bwc_matcher-&gt;tx_size);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-static int hws_bwc_matcher_move_all(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='del'>-{</div><div class='del'>-	return hws_bwc_matcher_move_all_simple(bwc_matcher);</div><div class='add'>+	return hws_bwc_matcher_move(bwc_matcher);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hws_bwc_matcher_move(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+static int hws_bwc_rule_get_at_idx(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='add'>+				   struct mlx5hws_rule_action rule_actions[],</div><div class='add'>+				   u16 bwc_queue_idx)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule-&gt;bwc_matcher;</div><div class='ctx'> 	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='del'>-	struct mlx5hws_matcher_attr matcher_attr = {0};</div><div class='del'>-	struct mlx5hws_matcher *old_matcher;</div><div class='del'>-	struct mlx5hws_matcher *new_matcher;</div><div class='del'>-	int ret;</div><div class='add'>+	struct mutex *queue_lock; /* Protect the queue */</div><div class='add'>+	int at_idx, ret;</div><div class='ctx'> </div><div class='del'>-	hws_bwc_matcher_init_attr(&amp;matcher_attr,</div><div class='del'>-				  bwc_matcher-&gt;priority,</div><div class='del'>-				  bwc_matcher-&gt;size_log);</div><div class='add'>+	/* check if rehash needed due to missing action template */</div><div class='add'>+	at_idx = hws_bwc_matcher_find_at(bwc_matcher, rule_actions);</div><div class='add'>+	if (likely(at_idx &gt;= 0))</div><div class='add'>+		return at_idx;</div><div class='ctx'> </div><div class='del'>-	old_matcher = bwc_matcher-&gt;matcher;</div><div class='del'>-	new_matcher = mlx5hws_matcher_create(old_matcher-&gt;tbl,</div><div class='del'>-					     &amp;bwc_matcher-&gt;mt, 1,</div><div class='del'>-					     bwc_matcher-&gt;at,</div><div class='del'>-					     bwc_matcher-&gt;num_of_at,</div><div class='del'>-					     &amp;matcher_attr);</div><div class='del'>-	if (!new_matcher) {</div><div class='del'>-		mlx5hws_err(ctx, "Rehash error: matcher creation failed\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='add'>+	/* we need to extend BWC matcher action templates array */</div><div class='add'>+	queue_lock = hws_bwc_get_queue_lock(ctx, bwc_queue_idx);</div><div class='add'>+	mutex_unlock(queue_lock);</div><div class='add'>+	hws_bwc_lock_all_queues(ctx);</div><div class='ctx'> </div><div class='del'>-	ret = mlx5hws_matcher_resize_set_target(old_matcher, new_matcher);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mlx5hws_err(ctx, "Rehash error: failed setting resize target\n");</div><div class='del'>-		return ret;</div><div class='add'>+	/* check again - perhaps other thread already did extend_at */</div><div class='add'>+	at_idx = hws_bwc_matcher_find_at(bwc_matcher, rule_actions);</div><div class='add'>+	if (at_idx &gt;= 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = hws_bwc_matcher_extend_at(bwc_matcher, rule_actions);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		mlx5hws_err(ctx, "BWC rule: failed extending AT (%d)", ret);</div><div class='add'>+		at_idx = -EINVAL;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = hws_bwc_matcher_move_all(bwc_matcher);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mlx5hws_err(ctx, "Rehash error: moving rules failed\n");</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	/* action templates array was extended, we need the last idx */</div><div class='add'>+	at_idx = bwc_matcher-&gt;num_of_at - 1;</div><div class='add'>+	ret = mlx5hws_matcher_attach_at(bwc_matcher-&gt;matcher,</div><div class='add'>+					bwc_matcher-&gt;at[at_idx]);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		mlx5hws_err(ctx, "BWC rule: failed attaching new AT (%d)", ret);</div><div class='add'>+		at_idx = -EINVAL;</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bwc_matcher-&gt;matcher = new_matcher;</div><div class='del'>-	mlx5hws_matcher_destroy(old_matcher);</div><div class='add'>+out:</div><div class='add'>+	hws_bwc_unlock_all_queues(ctx);</div><div class='add'>+	mutex_lock(queue_lock);</div><div class='add'>+	return at_idx;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+static void hws_bwc_rule_cnt_inc_rxtx(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='add'>+				      struct mlx5hws_bwc_matcher_size *size)</div><div class='add'>+{</div><div class='add'>+	u32 num_of_rules = atomic_inc_return(&amp;size-&gt;num_of_rules);</div><div class='add'>+</div><div class='add'>+	if (unlikely(hws_bwc_matcher_rehash_size_needed(bwc_rule-&gt;bwc_matcher,</div><div class='add'>+							size, num_of_rules)))</div><div class='add'>+		atomic_set(&amp;size-&gt;rehash_required, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-hws_bwc_matcher_rehash_size(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+static void hws_bwc_rule_cnt_inc(struct mlx5hws_bwc_rule *bwc_rule)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule-&gt;bwc_matcher;</div><div class='add'>+</div><div class='add'>+	if (!bwc_rule-&gt;skip_rx)</div><div class='add'>+		hws_bwc_rule_cnt_inc_rxtx(bwc_rule, &amp;bwc_matcher-&gt;rx_size);</div><div class='add'>+	if (!bwc_rule-&gt;skip_tx)</div><div class='add'>+		hws_bwc_rule_cnt_inc_rxtx(bwc_rule, &amp;bwc_matcher-&gt;tx_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_bwc_rule_cnt_inc_with_rehash(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='add'>+					    u16 bwc_queue_idx)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule-&gt;bwc_matcher;</div><div class='add'>+	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	struct mutex *queue_lock; /* Protect the queue */</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* If the current matcher size is already at its max size, we can't</div><div class='del'>-	 * do the rehash. Skip it and try adding the rule again - perhaps</div><div class='del'>-	 * there was some change.</div><div class='del'>-	 */</div><div class='del'>-	if (hws_bwc_matcher_size_maxed_out(bwc_matcher))</div><div class='del'>-		return 0;</div><div class='add'>+	hws_bwc_rule_cnt_inc(bwc_rule);</div><div class='ctx'> </div><div class='del'>-	/* It is possible that other rule has already performed rehash.</div><div class='del'>-	 * Need to check again if we really need rehash.</div><div class='del'>-	 * If the reason for rehash was size, but not any more - skip rehash.</div><div class='del'>-	 */</div><div class='del'>-	if (!hws_bwc_matcher_rehash_size_needed(bwc_matcher, bwc_matcher-&gt;num_of_rules))</div><div class='add'>+	if (!atomic_read(&amp;bwc_matcher-&gt;rx_size.rehash_required) &amp;&amp;</div><div class='add'>+	    !atomic_read(&amp;bwc_matcher-&gt;tx_size.rehash_required))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/* Now we're done all the checking - do the rehash:</div><div class='del'>-	 *  - extend match RTC size</div><div class='del'>-	 *  - create new matcher</div><div class='del'>-	 *  - move all the rules to the new matcher</div><div class='del'>-	 *  - destroy the old matcher</div><div class='del'>-	 */</div><div class='add'>+	queue_lock = hws_bwc_get_queue_lock(ctx, bwc_queue_idx);</div><div class='add'>+	mutex_unlock(queue_lock);</div><div class='ctx'> </div><div class='del'>-	ret = hws_bwc_matcher_extend_size(bwc_matcher);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	hws_bwc_lock_all_queues(ctx);</div><div class='add'>+	ret = hws_bwc_matcher_rehash_size(bwc_matcher);</div><div class='add'>+	hws_bwc_unlock_all_queues(ctx);</div><div class='ctx'> </div><div class='del'>-	return hws_bwc_matcher_move(bwc_matcher);</div><div class='del'>-}</div><div class='add'>+	mutex_lock(queue_lock);</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-hws_bwc_matcher_rehash_at(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='del'>-{</div><div class='del'>-	/* Rehash by action template doesn't require any additional checking.</div><div class='del'>-	 * The bwc_matcher already contains the new action template.</div><div class='del'>-	 * Just do the usual rehash:</div><div class='del'>-	 *  - create new matcher</div><div class='del'>-	 *  - move all the rules to the new matcher</div><div class='del'>-	 *  - destroy the old matcher</div><div class='del'>-	 */</div><div class='del'>-	return hws_bwc_matcher_move(bwc_matcher);</div><div class='add'>+	if (likely(!ret))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Failed to rehash. Print a diagnostic and rollback the counters. */</div><div class='add'>+	mlx5hws_err(ctx,</div><div class='add'>+		    "BWC rule insertion: rehash to sizes [%d, %d] failed (%d)\n",</div><div class='add'>+		    bwc_matcher-&gt;rx_size.size_log,</div><div class='add'>+		    bwc_matcher-&gt;tx_size.size_log, ret);</div><div class='add'>+	hws_bwc_rule_cnt_dec(bwc_rule);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlx5hws_bwc_rule_create_simple(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='hunk'>@@ -744,7 +1031,6 @@ int mlx5hws_bwc_rule_create_simple(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> 	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='ctx'> 	struct mlx5hws_rule_attr rule_attr;</div><div class='ctx'> 	struct mutex *queue_lock; /* Protect the queue */</div><div class='del'>-	u32 num_of_rules;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	int at_idx;</div><div class='ctx'> </div><div class='hunk'>@@ -754,67 +1040,18 @@ int mlx5hws_bwc_rule_create_simple(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(queue_lock);</div><div class='ctx'> </div><div class='del'>-	/* check if rehash needed due to missing action template */</div><div class='del'>-	at_idx = hws_bwc_matcher_find_at(bwc_matcher, rule_actions);</div><div class='add'>+	at_idx = hws_bwc_rule_get_at_idx(bwc_rule, rule_actions, bwc_queue_idx);</div><div class='ctx'> 	if (unlikely(at_idx &lt; 0)) {</div><div class='del'>-		/* we need to extend BWC matcher action templates array */</div><div class='ctx'> 		mutex_unlock(queue_lock);</div><div class='del'>-		hws_bwc_lock_all_queues(ctx);</div><div class='del'>-</div><div class='del'>-		ret = hws_bwc_matcher_extend_at(bwc_matcher, rule_actions);</div><div class='del'>-		if (unlikely(ret)) {</div><div class='del'>-			hws_bwc_unlock_all_queues(ctx);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* action templates array was extended, we need the last idx */</div><div class='del'>-		at_idx = bwc_matcher-&gt;num_of_at - 1;</div><div class='del'>-</div><div class='del'>-		ret = mlx5hws_matcher_attach_at(bwc_matcher-&gt;matcher,</div><div class='del'>-						bwc_matcher-&gt;at[at_idx]);</div><div class='del'>-		if (unlikely(ret)) {</div><div class='del'>-			/* Action template attach failed, possibly due to</div><div class='del'>-			 * requiring more action STEs.</div><div class='del'>-			 * Need to attempt creating new matcher with all</div><div class='del'>-			 * the action templates, including the new one.</div><div class='del'>-			 */</div><div class='del'>-			ret = hws_bwc_matcher_rehash_at(bwc_matcher);</div><div class='del'>-			if (unlikely(ret)) {</div><div class='del'>-				mlx5hws_action_template_destroy(bwc_matcher-&gt;at[at_idx]);</div><div class='del'>-				bwc_matcher-&gt;at[at_idx] = NULL;</div><div class='del'>-				bwc_matcher-&gt;num_of_at--;</div><div class='del'>-</div><div class='del'>-				hws_bwc_unlock_all_queues(ctx);</div><div class='del'>-</div><div class='del'>-				mlx5hws_err(ctx,</div><div class='del'>-					    "BWC rule insertion: rehash AT failed (%d)\n", ret);</div><div class='del'>-				return ret;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		hws_bwc_unlock_all_queues(ctx);</div><div class='del'>-		mutex_lock(queue_lock);</div><div class='add'>+		mlx5hws_err(ctx, "BWC rule create: failed getting AT (%d)",</div><div class='add'>+			    ret);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* check if number of rules require rehash */</div><div class='del'>-	num_of_rules = bwc_matcher-&gt;num_of_rules;</div><div class='del'>-</div><div class='del'>-	if (unlikely(hws_bwc_matcher_rehash_size_needed(bwc_matcher, num_of_rules))) {</div><div class='add'>+	ret = hws_bwc_rule_cnt_inc_with_rehash(bwc_rule, bwc_queue_idx);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='ctx'> 		mutex_unlock(queue_lock);</div><div class='del'>-</div><div class='del'>-		hws_bwc_lock_all_queues(ctx);</div><div class='del'>-		ret = hws_bwc_matcher_rehash_size(bwc_matcher);</div><div class='del'>-		hws_bwc_unlock_all_queues(ctx);</div><div class='del'>-</div><div class='del'>-		if (ret) {</div><div class='del'>-			mlx5hws_err(ctx, "BWC rule insertion: rehash size [%d -&gt; %d] failed (%d)\n",</div><div class='del'>-				    bwc_matcher-&gt;size_log - MLX5HWS_BWC_MATCHER_SIZE_LOG_STEP,</div><div class='del'>-				    bwc_matcher-&gt;size_log,</div><div class='del'>-				    ret);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		mutex_lock(queue_lock);</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = hws_bwc_rule_create_sync(bwc_rule,</div><div class='hunk'>@@ -828,12 +1065,29 @@ int mlx5hws_bwc_rule_create_simple(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> 		return 0; /* rule inserted successfully */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Rule insertion could fail due to queue being full, timeout, or</div><div class='add'>+	 * matcher in resize. In such cases, no point in trying to rehash.</div><div class='add'>+	 */</div><div class='add'>+	if (ret == -EBUSY || ret == -ETIMEDOUT || ret == -EAGAIN) {</div><div class='add'>+		mutex_unlock(queue_lock);</div><div class='add'>+		mlx5hws_err(ctx,</div><div class='add'>+			    "BWC rule insertion failed - %s (%d)\n",</div><div class='add'>+			    ret == -EBUSY ? "queue is full" :</div><div class='add'>+			    ret == -ETIMEDOUT ? "timeout" :</div><div class='add'>+			    ret == -EAGAIN ? "matcher in resize" : "N/A",</div><div class='add'>+			    ret);</div><div class='add'>+		hws_bwc_rule_cnt_dec(bwc_rule);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* At this point the rule wasn't added.</div><div class='ctx'> 	 * It could be because there was collision, or some other problem.</div><div class='del'>-	 * If we don't dive deeper than API, the only thing we know is that</div><div class='del'>-	 * the status of completion is RTE_FLOW_OP_ERROR.</div><div class='ctx'> 	 * Try rehash by size and insert rule again - last chance.</div><div class='ctx'> 	 */</div><div class='add'>+	if (!bwc_rule-&gt;skip_rx)</div><div class='add'>+		atomic_set(&amp;bwc_matcher-&gt;rx_size.rehash_required, true);</div><div class='add'>+	if (!bwc_rule-&gt;skip_tx)</div><div class='add'>+		atomic_set(&amp;bwc_matcher-&gt;tx_size.rehash_required, true);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(queue_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -843,6 +1097,7 @@ int mlx5hws_bwc_rule_create_simple(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		mlx5hws_err(ctx, "BWC rule insertion: rehash failed (%d)\n", ret);</div><div class='add'>+		hws_bwc_rule_cnt_dec(bwc_rule);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -858,6 +1113,7 @@ int mlx5hws_bwc_rule_create_simple(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> 	if (unlikely(ret)) {</div><div class='ctx'> 		mutex_unlock(queue_lock);</div><div class='ctx'> 		mlx5hws_err(ctx, "BWC rule insertion failed (%d)\n", ret);</div><div class='add'>+		hws_bwc_rule_cnt_dec(bwc_rule);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -887,13 +1143,24 @@ mlx5hws_bwc_rule_create(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='ctx'> 	if (unlikely(!bwc_rule))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	bwc_rule-&gt;flow_source = flow_source;</div><div class='add'>+	mlx5hws_rule_skip(bwc_matcher-&gt;matcher, flow_source,</div><div class='add'>+			  &amp;bwc_rule-&gt;skip_rx, &amp;bwc_rule-&gt;skip_tx);</div><div class='add'>+</div><div class='ctx'> 	bwc_queue_idx = hws_bwc_gen_queue_idx(ctx);</div><div class='ctx'> </div><div class='del'>-	ret = mlx5hws_bwc_rule_create_simple(bwc_rule,</div><div class='del'>-					     params-&gt;match_buf,</div><div class='del'>-					     rule_actions,</div><div class='del'>-					     flow_source,</div><div class='del'>-					     bwc_queue_idx);</div><div class='add'>+	if (bwc_matcher-&gt;matcher_type == MLX5HWS_BWC_MATCHER_COMPLEX_FIRST)</div><div class='add'>+		ret = mlx5hws_bwc_rule_create_complex(bwc_rule,</div><div class='add'>+						      params,</div><div class='add'>+						      flow_source,</div><div class='add'>+						      rule_actions,</div><div class='add'>+						      bwc_queue_idx);</div><div class='add'>+	else</div><div class='add'>+		ret = mlx5hws_bwc_rule_create_simple(bwc_rule,</div><div class='add'>+						     params-&gt;match_buf,</div><div class='add'>+						     rule_actions,</div><div class='add'>+						     flow_source,</div><div class='add'>+						     bwc_queue_idx);</div><div class='ctx'> 	if (unlikely(ret)) {</div><div class='ctx'> 		mlx5hws_bwc_rule_free(bwc_rule);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -915,57 +1182,17 @@ hws_bwc_rule_action_update(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> </div><div class='ctx'> 	idx = bwc_rule-&gt;bwc_queue_idx;</div><div class='ctx'> </div><div class='del'>-	mlx5hws_bwc_rule_fill_attr(bwc_matcher, idx, 0, &amp;rule_attr);</div><div class='add'>+	mlx5hws_bwc_rule_fill_attr(bwc_matcher, idx, bwc_rule-&gt;flow_source,</div><div class='add'>+				   &amp;rule_attr);</div><div class='ctx'> 	queue_lock = hws_bwc_get_queue_lock(ctx, idx);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(queue_lock);</div><div class='ctx'> </div><div class='del'>-	/* check if rehash needed due to missing action template */</div><div class='del'>-	at_idx = hws_bwc_matcher_find_at(bwc_matcher, rule_actions);</div><div class='add'>+	at_idx = hws_bwc_rule_get_at_idx(bwc_rule, rule_actions, idx);</div><div class='ctx'> 	if (unlikely(at_idx &lt; 0)) {</div><div class='del'>-		/* we need to extend BWC matcher action templates array */</div><div class='ctx'> 		mutex_unlock(queue_lock);</div><div class='del'>-		hws_bwc_lock_all_queues(ctx);</div><div class='del'>-</div><div class='del'>-		/* check again - perhaps other thread already did extend_at */</div><div class='del'>-		at_idx = hws_bwc_matcher_find_at(bwc_matcher, rule_actions);</div><div class='del'>-		if (likely(at_idx &lt; 0)) {</div><div class='del'>-			ret = hws_bwc_matcher_extend_at(bwc_matcher, rule_actions);</div><div class='del'>-			if (unlikely(ret)) {</div><div class='del'>-				hws_bwc_unlock_all_queues(ctx);</div><div class='del'>-				mlx5hws_err(ctx, "BWC rule update: failed extending AT (%d)", ret);</div><div class='del'>-				return -EINVAL;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* action templates array was extended, we need the last idx */</div><div class='del'>-			at_idx = bwc_matcher-&gt;num_of_at - 1;</div><div class='del'>-</div><div class='del'>-			ret = mlx5hws_matcher_attach_at(bwc_matcher-&gt;matcher,</div><div class='del'>-							bwc_matcher-&gt;at[at_idx]);</div><div class='del'>-			if (unlikely(ret)) {</div><div class='del'>-				/* Action template attach failed, possibly due to</div><div class='del'>-				 * requiring more action STEs.</div><div class='del'>-				 * Need to attempt creating new matcher with all</div><div class='del'>-				 * the action templates, including the new one.</div><div class='del'>-				 */</div><div class='del'>-				ret = hws_bwc_matcher_rehash_at(bwc_matcher);</div><div class='del'>-				if (unlikely(ret)) {</div><div class='del'>-					mlx5hws_action_template_destroy(bwc_matcher-&gt;at[at_idx]);</div><div class='del'>-					bwc_matcher-&gt;at[at_idx] = NULL;</div><div class='del'>-					bwc_matcher-&gt;num_of_at--;</div><div class='del'>-</div><div class='del'>-					hws_bwc_unlock_all_queues(ctx);</div><div class='del'>-</div><div class='del'>-					mlx5hws_err(ctx,</div><div class='del'>-						    "BWC rule update: rehash AT failed (%d)\n",</div><div class='del'>-						    ret);</div><div class='del'>-					return ret;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		hws_bwc_unlock_all_queues(ctx);</div><div class='del'>-		mutex_lock(queue_lock);</div><div class='add'>+		mlx5hws_err(ctx, "BWC rule update: failed getting AT\n");</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = hws_bwc_rule_update_sync(bwc_rule,</div><div class='hunk'>@@ -991,5 +1218,9 @@ int mlx5hws_bwc_rule_action_update(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* For complex rules, the update should happen on the last subrule. */</div><div class='add'>+	while (bwc_rule-&gt;next_subrule)</div><div class='add'>+		bwc_rule = bwc_rule-&gt;next_subrule;</div><div class='add'>+</div><div class='ctx'> 	return hws_bwc_rule_action_update(bwc_rule, rule_actions);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h<br/>index 4fe8c32d8fbe..b905511f5c53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h</a></div><div class='hunk'>@@ -1,32 +1,69 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#ifndef MLX5HWS_BWC_H_</div><div class='del'>-#define MLX5HWS_BWC_H_</div><div class='add'>+#ifndef HWS_BWC_H_</div><div class='add'>+#define HWS_BWC_H_</div><div class='ctx'> </div><div class='ctx'> #define MLX5HWS_BWC_MATCHER_INIT_SIZE_LOG 1</div><div class='ctx'> #define MLX5HWS_BWC_MATCHER_SIZE_LOG_STEP 1</div><div class='ctx'> #define MLX5HWS_BWC_MATCHER_REHASH_PERCENT_TH 70</div><div class='ctx'> #define MLX5HWS_BWC_MATCHER_REHASH_BURST_TH 32</div><div class='del'>-#define MLX5HWS_BWC_MATCHER_ATTACH_AT_NUM 255</div><div class='add'>+</div><div class='add'>+/* Max number of AT attach operations for the same matcher.</div><div class='add'>+ * When the limit is reached, a larger buffer is allocated for the ATs.</div><div class='add'>+ */</div><div class='add'>+#define MLX5HWS_BWC_MATCHER_ATTACH_AT_NUM 8</div><div class='ctx'> </div><div class='ctx'> #define MLX5HWS_BWC_MAX_ACTS 16</div><div class='ctx'> </div><div class='add'>+#define MLX5HWS_BWC_POLLING_TIMEOUT 60</div><div class='add'>+</div><div class='add'>+enum mlx5hws_bwc_matcher_type {</div><div class='add'>+	/* Standalone bwc matcher. */</div><div class='add'>+	MLX5HWS_BWC_MATCHER_SIMPLE,</div><div class='add'>+	/* The first matcher of a complex matcher. When rules are inserted into</div><div class='add'>+	 * a matcher of this type, they are split into subrules and inserted</div><div class='add'>+	 * into their corresponding submatchers.</div><div class='add'>+	 */</div><div class='add'>+	MLX5HWS_BWC_MATCHER_COMPLEX_FIRST,</div><div class='add'>+	/* A submatcher that is part of a complex matcher. For most purposes</div><div class='add'>+	 * these are treated as simple matchers, except when it comes to moving</div><div class='add'>+	 * rules during resize.</div><div class='add'>+	 */</div><div class='add'>+	MLX5HWS_BWC_MATCHER_COMPLEX_SUBMATCHER,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5hws_bwc_matcher_complex_data;</div><div class='add'>+</div><div class='add'>+struct mlx5hws_bwc_matcher_size {</div><div class='add'>+	u8 size_log;</div><div class='add'>+	atomic_t num_of_rules;</div><div class='add'>+	atomic_t rehash_required;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mlx5hws_bwc_matcher {</div><div class='ctx'> 	struct mlx5hws_matcher *matcher;</div><div class='ctx'> 	struct mlx5hws_match_template *mt;</div><div class='del'>-	struct mlx5hws_action_template *at[MLX5HWS_BWC_MATCHER_ATTACH_AT_NUM];</div><div class='add'>+	struct mlx5hws_action_template **at;</div><div class='add'>+	struct mlx5hws_bwc_matcher_complex_data *complex;</div><div class='ctx'> 	u8 num_of_at;</div><div class='del'>-	u16 priority;</div><div class='del'>-	u8 size_log;</div><div class='del'>-	u32 num_of_rules; /* atomically accessed */</div><div class='add'>+	u8 size_of_at_array;</div><div class='add'>+	enum mlx5hws_bwc_matcher_type matcher_type;</div><div class='add'>+	u32 priority;</div><div class='add'>+	struct mlx5hws_bwc_matcher_size rx_size;</div><div class='add'>+	struct mlx5hws_bwc_matcher_size tx_size;</div><div class='ctx'> 	struct list_head *rules;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_bwc_rule {</div><div class='ctx'> 	struct mlx5hws_bwc_matcher *bwc_matcher;</div><div class='ctx'> 	struct mlx5hws_rule *rule;</div><div class='add'>+	struct mlx5hws_bwc_rule *next_subrule;</div><div class='add'>+	struct mlx5hws_bwc_complex_subrule_data *subrule_data;</div><div class='add'>+	u32 flow_source;</div><div class='ctx'> 	u16 bwc_queue_idx;</div><div class='add'>+	bool skip_rx;</div><div class='add'>+	bool skip_tx;</div><div class='ctx'> 	struct list_head list_node;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -57,12 +94,19 @@ void mlx5hws_bwc_rule_fill_attr(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='ctx'> 				u32 flow_source,</div><div class='ctx'> 				struct mlx5hws_rule_attr *rule_attr);</div><div class='ctx'> </div><div class='add'>+int mlx5hws_bwc_queue_poll(struct mlx5hws_context *ctx,</div><div class='add'>+			   u16 queue_id,</div><div class='add'>+			   u32 *pending_rules,</div><div class='add'>+			   bool drain);</div><div class='add'>+</div><div class='ctx'> static inline u16 mlx5hws_bwc_queues(struct mlx5hws_context *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	/* Besides the control queue, half of the queues are</div><div class='del'>-	 * reguler HWS queues, and the other half are BWC queues.</div><div class='add'>+	 * regular HWS queues, and the other half are BWC queues.</div><div class='ctx'> 	 */</div><div class='del'>-	return (ctx-&gt;queues - 1) / 2;</div><div class='add'>+	if (mlx5hws_context_bwc_supported(ctx))</div><div class='add'>+		return (ctx-&gt;queues - 1) / 2;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u16 mlx5hws_bwc_get_queue_id(struct mlx5hws_context *ctx, u16 idx)</div><div class='hunk'>@@ -70,4 +114,4 @@ static inline u16 mlx5hws_bwc_get_queue_id(struct mlx5hws_context *ctx, u16 idx)</div><div class='ctx'> 	return idx + mlx5hws_bwc_queues(ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* MLX5HWS_BWC_H_ */</div><div class='add'>+#endif /* HWS_BWC_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.c<br/>new file mode 100644<br/>index 000000000000..660630f18ce9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.c</a></div><div class='hunk'>@@ -0,0 +1,1101 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#include "internal.h"</div><div class='add'>+</div><div class='add'>+/* We chain submatchers by applying three rules on a subrule: modify header (to</div><div class='add'>+ * set register C6), jump to table (to the next submatcher) and the mandatory</div><div class='add'>+ * last rule.</div><div class='add'>+ */</div><div class='add'>+#define HWS_NUM_CHAIN_ACTIONS 3</div><div class='add'>+</div><div class='add'>+static const struct rhashtable_params hws_rules_hash_params = {</div><div class='add'>+	.key_len = sizeof_field(struct mlx5hws_bwc_complex_subrule_data,</div><div class='add'>+				match_tag),</div><div class='add'>+	.key_offset =</div><div class='add'>+		offsetof(struct mlx5hws_bwc_complex_subrule_data, match_tag),</div><div class='add'>+	.head_offset =</div><div class='add'>+		offsetof(struct mlx5hws_bwc_complex_subrule_data, hash_node),</div><div class='add'>+	.automatic_shrinking = true, .min_size = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+hws_match_params_exceeds_definer(struct mlx5hws_context *ctx,</div><div class='add'>+				 u8 match_criteria_enable,</div><div class='add'>+				 struct mlx5hws_match_parameters *mask,</div><div class='add'>+				 bool allow_jumbo)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_definer match_layout = {0};</div><div class='add'>+	struct mlx5hws_match_template *mt;</div><div class='add'>+	bool is_complex = false;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!match_criteria_enable)</div><div class='add'>+		return false; /* empty matcher */</div><div class='add'>+</div><div class='add'>+	mt = mlx5hws_match_template_create(ctx,</div><div class='add'>+					   mask-&gt;match_buf,</div><div class='add'>+					   mask-&gt;match_sz,</div><div class='add'>+					   match_criteria_enable);</div><div class='add'>+	if (!mt) {</div><div class='add'>+		mlx5hws_err(ctx, "Complex matcher: failed creating match template\n");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mlx5hws_definer_calc_layout(ctx, mt, &amp;match_layout, allow_jumbo);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* The only case that we're interested in is E2BIG,</div><div class='add'>+		 * which means that the match parameters need to be</div><div class='add'>+		 * split into complex martcher.</div><div class='add'>+		 * For all other cases (good or bad) - just return true</div><div class='add'>+		 * and let the usual match creation path handle it,</div><div class='add'>+		 * both for good and bad flows.</div><div class='add'>+		 */</div><div class='add'>+		if (ret == -E2BIG) {</div><div class='add'>+			is_complex = true;</div><div class='add'>+			mlx5hws_dbg(ctx, "Matcher definer layout: need complex matcher\n");</div><div class='add'>+		} else {</div><div class='add'>+			mlx5hws_err(ctx, "Failed to calculate matcher definer layout\n");</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		kfree(mt-&gt;fc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5hws_match_template_destroy(mt);</div><div class='add'>+</div><div class='add'>+	return is_complex;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mlx5hws_bwc_match_params_is_complex(struct mlx5hws_context *ctx,</div><div class='add'>+					 u8 match_criteria_enable,</div><div class='add'>+					 struct mlx5hws_match_parameters *mask)</div><div class='add'>+{</div><div class='add'>+	return hws_match_params_exceeds_definer(ctx, match_criteria_enable,</div><div class='add'>+						mask, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hws_get_last_set_dword_idx(const struct mlx5hws_match_parameters *mask)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = mask-&gt;match_sz / 4 - 1; i &gt;= 0; i--)</div><div class='add'>+		if (mask-&gt;match_buf[i])</div><div class='add'>+			return i;</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool hws_match_mask_is_empty(const struct mlx5hws_match_parameters *mask)</div><div class='add'>+{</div><div class='add'>+	return hws_get_last_set_dword_idx(mask) == -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool hws_dword_is_inner_ipaddr_off(int dword_off)</div><div class='add'>+{</div><div class='add'>+	/* IPv4 and IPv6 addresses share the same entry via a union, and the</div><div class='add'>+	 * source and dest addresses are contiguous in the fte_match_param. So</div><div class='add'>+	 * we need to check 8 words.</div><div class='add'>+	 */</div><div class='add'>+	static const int inner_ip_dword_off =</div><div class='add'>+		__mlx5_dw_off(fte_match_param, inner_headers.src_ipv4_src_ipv6);</div><div class='add'>+</div><div class='add'>+	return dword_off &gt;= inner_ip_dword_off &amp;&amp;</div><div class='add'>+	       dword_off &lt; inner_ip_dword_off + 8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool hws_dword_is_outer_ipaddr_off(int dword_off)</div><div class='add'>+{</div><div class='add'>+	static const int outer_ip_dword_off =</div><div class='add'>+		__mlx5_dw_off(fte_match_param, outer_headers.src_ipv4_src_ipv6);</div><div class='add'>+</div><div class='add'>+	return dword_off &gt;= outer_ip_dword_off &amp;&amp;</div><div class='add'>+	       dword_off &lt; outer_ip_dword_off + 8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_add_dword_to_mask(struct mlx5hws_match_parameters *mask,</div><div class='add'>+				  const struct mlx5hws_match_parameters *orig,</div><div class='add'>+				  int dword_idx, bool *added_inner_ipv,</div><div class='add'>+				  bool *added_outer_ipv)</div><div class='add'>+{</div><div class='add'>+	mask-&gt;match_buf[dword_idx] |= orig-&gt;match_buf[dword_idx];</div><div class='add'>+</div><div class='add'>+	*added_inner_ipv = false;</div><div class='add'>+	*added_outer_ipv = false;</div><div class='add'>+</div><div class='add'>+	/* Any IP address fragment must be accompanied by a match on IP version.</div><div class='add'>+	 * Use the `added_ipv` variables to keep track if we added IP versions</div><div class='add'>+	 * specifically for this dword, so that we can roll them back if the</div><div class='add'>+	 * match params become too large to fit into a definer.</div><div class='add'>+	 */</div><div class='add'>+	if (hws_dword_is_inner_ipaddr_off(dword_idx) &amp;&amp;</div><div class='add'>+	    !MLX5_GET(fte_match_param, mask-&gt;match_buf,</div><div class='add'>+		      inner_headers.ip_version)) {</div><div class='add'>+		MLX5_SET(fte_match_param, mask-&gt;match_buf,</div><div class='add'>+			 inner_headers.ip_version, 0xf);</div><div class='add'>+		*added_inner_ipv = true;</div><div class='add'>+	}</div><div class='add'>+	if (hws_dword_is_outer_ipaddr_off(dword_idx) &amp;&amp;</div><div class='add'>+	    !MLX5_GET(fte_match_param, mask-&gt;match_buf,</div><div class='add'>+		      outer_headers.ip_version)) {</div><div class='add'>+		MLX5_SET(fte_match_param, mask-&gt;match_buf,</div><div class='add'>+			 outer_headers.ip_version, 0xf);</div><div class='add'>+		*added_outer_ipv = true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_remove_dword_from_mask(struct mlx5hws_match_parameters *mask,</div><div class='add'>+				       int dword_idx, bool added_inner_ipv,</div><div class='add'>+				       bool added_outer_ipv)</div><div class='add'>+{</div><div class='add'>+	mask-&gt;match_buf[dword_idx] = 0;</div><div class='add'>+	if (added_inner_ipv)</div><div class='add'>+		MLX5_SET(fte_match_param, mask-&gt;match_buf,</div><div class='add'>+			 inner_headers.ip_version, 0);</div><div class='add'>+	if (added_outer_ipv)</div><div class='add'>+		MLX5_SET(fte_match_param, mask-&gt;match_buf,</div><div class='add'>+			 outer_headers.ip_version, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Avoid leaving a single lower dword in `mask` if there are others present in</div><div class='add'>+ * `orig`. Splitting IPv6 addresses like this causes them to be interpreted as</div><div class='add'>+ * IPv4.</div><div class='add'>+ */</div><div class='add'>+static void hws_avoid_ipv6_split_of(struct mlx5hws_match_parameters *orig,</div><div class='add'>+				    struct mlx5hws_match_parameters *mask,</div><div class='add'>+				    int off)</div><div class='add'>+{</div><div class='add'>+	/* Masks are allocated to a full fte_match_param, but it can't hurt to</div><div class='add'>+	 * double check.</div><div class='add'>+	 */</div><div class='add'>+	if (orig-&gt;match_sz &lt;= off + 3 || mask-&gt;match_sz &lt;= off + 3)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Lower dword is not set, nothing to do. */</div><div class='add'>+	if (!mask-&gt;match_buf[off + 3])</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Higher dwords also present in `mask`, no ambiguity. */</div><div class='add'>+	if (mask-&gt;match_buf[off] || mask-&gt;match_buf[off + 1] ||</div><div class='add'>+	    mask-&gt;match_buf[off + 2])</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* There are no higher dwords in `orig`, i.e. we match on IPv4. */</div><div class='add'>+	if (!orig-&gt;match_buf[off] &amp;&amp; !orig-&gt;match_buf[off + 1] &amp;&amp;</div><div class='add'>+	    !orig-&gt;match_buf[off + 2])</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Put the lower dword back in `orig`. It is always safe to do this, the</div><div class='add'>+	 * dword will just be picked up in the next submask.</div><div class='add'>+	 */</div><div class='add'>+	orig-&gt;match_buf[off + 3] = mask-&gt;match_buf[off + 3];</div><div class='add'>+	mask-&gt;match_buf[off + 3] = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_avoid_ipv6_split(struct mlx5hws_match_parameters *orig,</div><div class='add'>+				 struct mlx5hws_match_parameters *mask)</div><div class='add'>+{</div><div class='add'>+	hws_avoid_ipv6_split_of(orig, mask,</div><div class='add'>+				__mlx5_dw_off(fte_match_param,</div><div class='add'>+					      outer_headers.src_ipv4_src_ipv6));</div><div class='add'>+	hws_avoid_ipv6_split_of(orig, mask,</div><div class='add'>+				__mlx5_dw_off(fte_match_param,</div><div class='add'>+					      outer_headers.dst_ipv4_dst_ipv6));</div><div class='add'>+	hws_avoid_ipv6_split_of(orig, mask,</div><div class='add'>+				__mlx5_dw_off(fte_match_param,</div><div class='add'>+					      inner_headers.src_ipv4_src_ipv6));</div><div class='add'>+	hws_avoid_ipv6_split_of(orig, mask,</div><div class='add'>+				__mlx5_dw_off(fte_match_param,</div><div class='add'>+					      inner_headers.dst_ipv4_dst_ipv6));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Build a subset of the `orig` match parameters into `mask`. This subset is</div><div class='add'>+ * guaranteed to fit in a single definer an as such is a candidate for being a</div><div class='add'>+ * part of a complex matcher. Upon successful execution, the match params that</div><div class='add'>+ * go into `mask` are cleared from `orig`.</div><div class='add'>+ */</div><div class='add'>+static int hws_get_simple_params(struct mlx5hws_context *ctx, u8 match_criteria,</div><div class='add'>+				 struct mlx5hws_match_parameters *orig,</div><div class='add'>+				 struct mlx5hws_match_parameters *mask)</div><div class='add'>+{</div><div class='add'>+	bool added_inner_ipv, added_outer_ipv;</div><div class='add'>+	int dword_idx;</div><div class='add'>+	u32 *backup;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dword_idx = hws_get_last_set_dword_idx(orig);</div><div class='add'>+	/* Nothing to do, we consumed all of the match params before. */</div><div class='add'>+	if (dword_idx == -1)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	backup = kzalloc(MLX5_ST_SZ_BYTES(fte_match_param), GFP_KERNEL);</div><div class='add'>+	if (!backup)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		dword_idx = hws_get_last_set_dword_idx(orig);</div><div class='add'>+		/* Nothing to do, we consumed all of the original match params</div><div class='add'>+		 * into this subset, which still fits into a single matcher.</div><div class='add'>+		 */</div><div class='add'>+		if (dword_idx == -1) {</div><div class='add'>+			ret = 0;</div><div class='add'>+			goto free_backup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		memcpy(backup, mask-&gt;match_buf, mask-&gt;match_sz);</div><div class='add'>+</div><div class='add'>+		/* Try to add this dword to the current subset. */</div><div class='add'>+		hws_add_dword_to_mask(mask, orig, dword_idx, &amp;added_inner_ipv,</div><div class='add'>+				      &amp;added_outer_ipv);</div><div class='add'>+</div><div class='add'>+		if (hws_match_params_exceeds_definer(ctx, match_criteria, mask,</div><div class='add'>+						     false)) {</div><div class='add'>+			/* We just added a match param that makes the definer</div><div class='add'>+			 * too large. Revert and return what we had before.</div><div class='add'>+			 * Note that we can't just zero out the affected fields,</div><div class='add'>+			 * because it's possible that the dword we're looking at</div><div class='add'>+			 * wasn't zero before (e.g. it included auto-added</div><div class='add'>+			 * matches in IP version. This is why we employ the</div><div class='add'>+			 * rather cumbersome memcpy for backing up.</div><div class='add'>+			 */</div><div class='add'>+			memcpy(mask-&gt;match_buf, backup, mask-&gt;match_sz);</div><div class='add'>+			/* Possible future improvement: We can't add any more</div><div class='add'>+			 * dwords, but it may be possible to squeeze in</div><div class='add'>+			 * individual bytes, as definers have special slots for</div><div class='add'>+			 * those.</div><div class='add'>+			 *</div><div class='add'>+			 * For now, keep the code simple. This results in an</div><div class='add'>+			 * extra submatcher in some cases, but it's good enough.</div><div class='add'>+			 */</div><div class='add'>+			ret = 0;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* The current subset of match params still fits in a single</div><div class='add'>+		 * definer. Remove the dword from the original mask.</div><div class='add'>+		 *</div><div class='add'>+		 * Also remove any explicit match on IP version if we just</div><div class='add'>+		 * included one here. We will still automatically add it to</div><div class='add'>+		 * accompany any IP address fragment, but do not need to</div><div class='add'>+		 * consider it by itself.</div><div class='add'>+		 */</div><div class='add'>+		hws_remove_dword_from_mask(orig, dword_idx, added_inner_ipv,</div><div class='add'>+					   added_outer_ipv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Make sure we have not picked up a single lower dword of an IPv6</div><div class='add'>+	 * address, as the firmware will erroneously treat it as an IPv4</div><div class='add'>+	 * address.</div><div class='add'>+	 */</div><div class='add'>+	hws_avoid_ipv6_split(orig, mask);</div><div class='add'>+</div><div class='add'>+free_backup:</div><div class='add'>+	kfree(backup);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hws_bwc_matcher_split_mask(struct mlx5hws_context *ctx, u8 match_criteria,</div><div class='add'>+			   const struct mlx5hws_match_parameters *mask,</div><div class='add'>+			   struct mlx5hws_match_parameters *submasks,</div><div class='add'>+			   int *num_submasks)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_match_parameters mask_copy;</div><div class='add'>+	int ret, i = 0;</div><div class='add'>+</div><div class='add'>+	mask_copy.match_sz = MLX5_ST_SZ_BYTES(fte_match_param);</div><div class='add'>+	mask_copy.match_buf = kzalloc(mask_copy.match_sz, GFP_KERNEL);</div><div class='add'>+	if (!mask_copy.match_buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	memcpy(mask_copy.match_buf, mask-&gt;match_buf, mask-&gt;match_sz);</div><div class='add'>+</div><div class='add'>+	while (!hws_match_mask_is_empty(&amp;mask_copy)) {</div><div class='add'>+		if (i &gt;= MLX5HWS_BWC_COMPLEX_MAX_SUBMATCHERS) {</div><div class='add'>+			mlx5hws_err(ctx,</div><div class='add'>+				    "Complex matcher: mask too large for %d matchers\n",</div><div class='add'>+				    MLX5HWS_BWC_COMPLEX_MAX_SUBMATCHERS);</div><div class='add'>+			ret = -E2BIG;</div><div class='add'>+			goto free_copy;</div><div class='add'>+		}</div><div class='add'>+		/* All but the first matcher need to match on register C6 to</div><div class='add'>+		 * connect pieces of the complex rule together.</div><div class='add'>+		 */</div><div class='add'>+		if (i &gt; 0) {</div><div class='add'>+			MLX5_SET(fte_match_param, submasks[i].match_buf,</div><div class='add'>+				 misc_parameters_2.metadata_reg_c_6, -1);</div><div class='add'>+			match_criteria |= MLX5HWS_DEFINER_MATCH_CRITERIA_MISC2;</div><div class='add'>+		}</div><div class='add'>+		ret = hws_get_simple_params(ctx, match_criteria, &amp;mask_copy,</div><div class='add'>+					    &amp;submasks[i]);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto free_copy;</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*num_submasks = i;</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+free_copy:</div><div class='add'>+	kfree(mask_copy.match_buf);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_table *</div><div class='add'>+hws_isolated_table_create(const struct mlx5hws_bwc_matcher *cmatcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_complex_submatcher *first_subm;</div><div class='add'>+	struct mlx5hws_cmd_ft_modify_attr ft_attr = {0};</div><div class='add'>+	struct mlx5hws_table_attr tbl_attr = {0};</div><div class='add'>+	struct mlx5hws_table *orig_tbl;</div><div class='add'>+	struct mlx5hws_context *ctx;</div><div class='add'>+	struct mlx5hws_table *tbl;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	first_subm = &amp;cmatcher-&gt;complex-&gt;submatchers[0];</div><div class='add'>+	orig_tbl = first_subm-&gt;tbl;</div><div class='add'>+	ctx = orig_tbl-&gt;ctx;</div><div class='add'>+</div><div class='add'>+	tbl_attr.type = orig_tbl-&gt;type;</div><div class='add'>+	tbl_attr.level = orig_tbl-&gt;level;</div><div class='add'>+	tbl = mlx5hws_table_create(ctx, &amp;tbl_attr);</div><div class='add'>+	if (!tbl)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	/* Set the default miss of the isolated table to point</div><div class='add'>+	 * to the end anchor of the original matcher.</div><div class='add'>+	 */</div><div class='add'>+	mlx5hws_cmd_set_attr_connect_miss_tbl(ctx, tbl-&gt;fw_ft_type,</div><div class='add'>+					      tbl-&gt;type, &amp;ft_attr);</div><div class='add'>+	ft_attr.table_miss_id = first_subm-&gt;bwc_matcher-&gt;matcher-&gt;end_ft_id;</div><div class='add'>+</div><div class='add'>+	ret = mlx5hws_cmd_flow_table_modify(ctx-&gt;mdev, &amp;ft_attr, tbl-&gt;ft_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(ctx, "Complex matcher: failed to set isolated tbl default miss\n");</div><div class='add'>+		goto destroy_tbl;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return tbl;</div><div class='add'>+</div><div class='add'>+destroy_tbl:</div><div class='add'>+	mlx5hws_table_destroy(tbl);</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_submatcher_init_first(struct mlx5hws_bwc_matcher *cmatcher,</div><div class='add'>+				     struct mlx5hws_table *table, u32 priority,</div><div class='add'>+				     u8 match_criteria,</div><div class='add'>+				     struct mlx5hws_match_parameters *mask)</div><div class='add'>+{</div><div class='add'>+	enum mlx5hws_action_type action_types[HWS_NUM_CHAIN_ACTIONS];</div><div class='add'>+	struct mlx5hws_bwc_complex_submatcher *subm;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	subm = &amp;cmatcher-&gt;complex-&gt;submatchers[0];</div><div class='add'>+</div><div class='add'>+	/* The first submatcher lives in the original table and does not have an</div><div class='add'>+	 * associated jump to table action. It also points to the outer complex</div><div class='add'>+	 * matcher.</div><div class='add'>+	 */</div><div class='add'>+	subm-&gt;tbl = table;</div><div class='add'>+	subm-&gt;action_tbl = NULL;</div><div class='add'>+	subm-&gt;bwc_matcher = cmatcher;</div><div class='add'>+</div><div class='add'>+	action_types[0] = MLX5HWS_ACTION_TYP_MODIFY_HDR;</div><div class='add'>+	action_types[1] = MLX5HWS_ACTION_TYP_TBL;</div><div class='add'>+	action_types[2] = MLX5HWS_ACTION_TYP_LAST;</div><div class='add'>+</div><div class='add'>+	ret = mlx5hws_bwc_matcher_create_simple(subm-&gt;bwc_matcher, subm-&gt;tbl,</div><div class='add'>+						priority, match_criteria, mask,</div><div class='add'>+						action_types);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	subm-&gt;bwc_matcher-&gt;matcher_type = MLX5HWS_BWC_MATCHER_COMPLEX_FIRST;</div><div class='add'>+</div><div class='add'>+	ret = rhashtable_init(&amp;subm-&gt;rules_hash, &amp;hws_rules_hash_params);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto destroy_matcher;</div><div class='add'>+	mutex_init(&amp;subm-&gt;hash_lock);</div><div class='add'>+	ida_init(&amp;subm-&gt;chain_ida);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy_matcher:</div><div class='add'>+	mlx5hws_bwc_matcher_destroy_simple(subm-&gt;bwc_matcher);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_submatcher_init(struct mlx5hws_bwc_matcher *cmatcher, int idx,</div><div class='add'>+			       struct mlx5hws_table *table, u32 priority,</div><div class='add'>+			       u8 match_criteria,</div><div class='add'>+			       struct mlx5hws_match_parameters *mask)</div><div class='add'>+{</div><div class='add'>+	enum mlx5hws_action_type action_types[HWS_NUM_CHAIN_ACTIONS];</div><div class='add'>+	struct mlx5hws_bwc_complex_submatcher *subm;</div><div class='add'>+	bool is_last;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!idx)</div><div class='add'>+		return hws_submatcher_init_first(cmatcher, table, priority,</div><div class='add'>+						 match_criteria, mask);</div><div class='add'>+</div><div class='add'>+	subm = &amp;cmatcher-&gt;complex-&gt;submatchers[idx];</div><div class='add'>+	is_last = idx == cmatcher-&gt;complex-&gt;num_submatchers - 1;</div><div class='add'>+</div><div class='add'>+	subm-&gt;tbl = hws_isolated_table_create(cmatcher);</div><div class='add'>+	if (IS_ERR(subm-&gt;tbl))</div><div class='add'>+		return PTR_ERR(subm-&gt;tbl);</div><div class='add'>+</div><div class='add'>+	subm-&gt;action_tbl =</div><div class='add'>+		mlx5hws_action_create_dest_table(subm-&gt;tbl-&gt;ctx, subm-&gt;tbl,</div><div class='add'>+						 MLX5HWS_ACTION_FLAG_HWS_FDB);</div><div class='add'>+	if (!subm-&gt;action_tbl) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto destroy_tbl;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	subm-&gt;bwc_matcher = kzalloc(sizeof(*subm-&gt;bwc_matcher), GFP_KERNEL);</div><div class='add'>+	if (!subm-&gt;bwc_matcher) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto destroy_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Every matcher other than the first also matches of register C6 to</div><div class='add'>+	 * bind subrules together in the complex rule using the chain ids.</div><div class='add'>+	 */</div><div class='add'>+	match_criteria |= MLX5HWS_DEFINER_MATCH_CRITERIA_MISC2;</div><div class='add'>+</div><div class='add'>+	action_types[0] = MLX5HWS_ACTION_TYP_MODIFY_HDR;</div><div class='add'>+	action_types[1] = MLX5HWS_ACTION_TYP_TBL;</div><div class='add'>+	action_types[2] = MLX5HWS_ACTION_TYP_LAST;</div><div class='add'>+</div><div class='add'>+	/* Every matcher other than the last sets register C6 and jumps to the</div><div class='add'>+	 * next submatcher's table. The final submatcher will use the</div><div class='add'>+	 * user-supplied actions and will attach an action template at rule</div><div class='add'>+	 * insertion time.</div><div class='add'>+	 */</div><div class='add'>+	ret = mlx5hws_bwc_matcher_create_simple(subm-&gt;bwc_matcher, subm-&gt;tbl,</div><div class='add'>+						priority, match_criteria, mask,</div><div class='add'>+						is_last ? NULL : action_types);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_matcher;</div><div class='add'>+</div><div class='add'>+	subm-&gt;bwc_matcher-&gt;matcher_type =</div><div class='add'>+		MLX5HWS_BWC_MATCHER_COMPLEX_SUBMATCHER;</div><div class='add'>+</div><div class='add'>+	ret = rhashtable_init(&amp;subm-&gt;rules_hash, &amp;hws_rules_hash_params);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto destroy_matcher;</div><div class='add'>+	mutex_init(&amp;subm-&gt;hash_lock);</div><div class='add'>+	ida_init(&amp;subm-&gt;chain_ida);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy_matcher:</div><div class='add'>+	mlx5hws_bwc_matcher_destroy_simple(subm-&gt;bwc_matcher);</div><div class='add'>+free_matcher:</div><div class='add'>+	kfree(subm-&gt;bwc_matcher);</div><div class='add'>+destroy_action:</div><div class='add'>+	mlx5hws_action_destroy(subm-&gt;action_tbl);</div><div class='add'>+destroy_tbl:</div><div class='add'>+	mlx5hws_table_destroy(subm-&gt;tbl);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_submatcher_destroy(struct mlx5hws_bwc_matcher *cmatcher,</div><div class='add'>+				   int idx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_complex_submatcher *subm;</div><div class='add'>+</div><div class='add'>+	subm = &amp;cmatcher-&gt;complex-&gt;submatchers[idx];</div><div class='add'>+</div><div class='add'>+	ida_destroy(&amp;subm-&gt;chain_ida);</div><div class='add'>+	mutex_destroy(&amp;subm-&gt;hash_lock);</div><div class='add'>+	rhashtable_destroy(&amp;subm-&gt;rules_hash);</div><div class='add'>+</div><div class='add'>+	if (subm-&gt;bwc_matcher) {</div><div class='add'>+		mlx5hws_bwc_matcher_destroy_simple(subm-&gt;bwc_matcher);</div><div class='add'>+		if (idx)</div><div class='add'>+			kfree(subm-&gt;bwc_matcher);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We own all of the isolated tables, but not the original one. */</div><div class='add'>+	if (idx) {</div><div class='add'>+		mlx5hws_action_destroy(subm-&gt;action_tbl);</div><div class='add'>+		mlx5hws_table_destroy(subm-&gt;tbl);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hws_complex_data_actions_init(struct mlx5hws_bwc_matcher_complex_data *cdata)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *ctx = cdata-&gt;submatchers[0].tbl-&gt;ctx;</div><div class='add'>+	u8 modify_hdr_action[MLX5_ST_SZ_BYTES(set_action_in)] = {0};</div><div class='add'>+	struct mlx5hws_action_mh_pattern ptrn;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Create modify header action to set REG_C_6 */</div><div class='add'>+	MLX5_SET(set_action_in, modify_hdr_action,</div><div class='add'>+		 action_type, MLX5_MODIFICATION_TYPE_SET);</div><div class='add'>+	MLX5_SET(set_action_in, modify_hdr_action,</div><div class='add'>+		 field, MLX5_MODI_META_REG_C_6);</div><div class='add'>+	MLX5_SET(set_action_in, modify_hdr_action,</div><div class='add'>+		 length, 0); /* zero means length of 32 */</div><div class='add'>+	MLX5_SET(set_action_in, modify_hdr_action, offset, 0);</div><div class='add'>+	MLX5_SET(set_action_in, modify_hdr_action, data, 0);</div><div class='add'>+</div><div class='add'>+	ptrn.data = (void *)modify_hdr_action;</div><div class='add'>+	ptrn.sz = MLX5HWS_ACTION_DOUBLE_SIZE;</div><div class='add'>+</div><div class='add'>+	cdata-&gt;action_metadata =</div><div class='add'>+		mlx5hws_action_create_modify_header(ctx, 1, &amp;ptrn, 0,</div><div class='add'>+						    MLX5HWS_ACTION_FLAG_HWS_FDB);</div><div class='add'>+	if (!cdata-&gt;action_metadata) {</div><div class='add'>+		mlx5hws_err(ctx, "Complex matcher: failed to create set reg C6 action\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Create last action */</div><div class='add'>+	cdata-&gt;action_last =</div><div class='add'>+		mlx5hws_action_create_last(ctx, MLX5HWS_ACTION_FLAG_HWS_FDB);</div><div class='add'>+	if (!cdata-&gt;action_last) {</div><div class='add'>+		mlx5hws_err(ctx, "Complex matcher: failed to create last action\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto destroy_action_metadata;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy_action_metadata:</div><div class='add'>+	mlx5hws_action_destroy(cdata-&gt;action_metadata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+hws_complex_data_actions_destroy(struct mlx5hws_bwc_matcher_complex_data *cdata)</div><div class='add'>+{</div><div class='add'>+	mlx5hws_action_destroy(cdata-&gt;action_last);</div><div class='add'>+	mlx5hws_action_destroy(cdata-&gt;action_metadata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5hws_bwc_matcher_create_complex(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='add'>+				       struct mlx5hws_table *table,</div><div class='add'>+				       u32 priority, u8 match_criteria_enable,</div><div class='add'>+				       struct mlx5hws_match_parameters *mask)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_match_parameters</div><div class='add'>+		submasks[MLX5HWS_BWC_COMPLEX_MAX_SUBMATCHERS] = {0};</div><div class='add'>+	struct mlx5hws_bwc_matcher_complex_data *cdata;</div><div class='add'>+	struct mlx5hws_context *ctx = table-&gt;ctx;</div><div class='add'>+	int num_submatchers;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(submasks); i++) {</div><div class='add'>+		submasks[i].match_sz = MLX5_ST_SZ_BYTES(fte_match_param);</div><div class='add'>+		submasks[i].match_buf = kzalloc(submasks[i].match_sz,</div><div class='add'>+						GFP_KERNEL);</div><div class='add'>+		if (!submasks[i].match_buf) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto free_submasks;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hws_bwc_matcher_split_mask(ctx, match_criteria_enable, mask,</div><div class='add'>+					 submasks, &amp;num_submatchers);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_submasks;</div><div class='add'>+</div><div class='add'>+	cdata = kzalloc(sizeof(*cdata), GFP_KERNEL);</div><div class='add'>+	if (!cdata) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto free_submasks;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bwc_matcher-&gt;complex = cdata;</div><div class='add'>+	cdata-&gt;num_submatchers = num_submatchers;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_submatchers; i++) {</div><div class='add'>+		ret = hws_submatcher_init(bwc_matcher, i, table, priority,</div><div class='add'>+					  match_criteria_enable, &amp;submasks[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto destroy_submatchers;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hws_complex_data_actions_init(cdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto destroy_submatchers;</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+	goto free_submasks;</div><div class='add'>+</div><div class='add'>+destroy_submatchers:</div><div class='add'>+	while (i--)</div><div class='add'>+		hws_submatcher_destroy(bwc_matcher, i);</div><div class='add'>+	kfree(cdata);</div><div class='add'>+	bwc_matcher-&gt;complex = NULL;</div><div class='add'>+</div><div class='add'>+free_submasks:</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(submasks); i++)</div><div class='add'>+		kfree(submasks[i].match_buf);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+mlx5hws_bwc_matcher_destroy_complex(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	hws_complex_data_actions_destroy(bwc_matcher-&gt;complex);</div><div class='add'>+	for (i = 0; i &lt; bwc_matcher-&gt;complex-&gt;num_submatchers; i++)</div><div class='add'>+		hws_submatcher_destroy(bwc_matcher, i);</div><div class='add'>+	kfree(bwc_matcher-&gt;complex);</div><div class='add'>+	bwc_matcher-&gt;complex = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hws_complex_get_subrule_data(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='add'>+			     struct mlx5hws_bwc_complex_submatcher *subm,</div><div class='add'>+			     u32 *match_params)</div><div class='add'>+__must_hold(&amp;subm-&gt;hash_lock)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_matcher *bwc_matcher = subm-&gt;bwc_matcher;</div><div class='add'>+	struct mlx5hws_bwc_complex_subrule_data *sr_data, *old_data;</div><div class='add'>+	struct mlx5hws_match_template *mt;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	sr_data = kzalloc(sizeof(*sr_data), GFP_KERNEL);</div><div class='add'>+	if (!sr_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = ida_alloc(&amp;subm-&gt;chain_ida, GFP_KERNEL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto free_sr_data;</div><div class='add'>+	sr_data-&gt;chain_id = ret;</div><div class='add'>+</div><div class='add'>+	refcount_set(&amp;sr_data-&gt;refcount, 1);</div><div class='add'>+</div><div class='add'>+	mt  = bwc_matcher-&gt;matcher-&gt;mt;</div><div class='add'>+	mlx5hws_definer_create_tag(match_params, mt-&gt;fc, mt-&gt;fc_sz,</div><div class='add'>+				   (u8 *)&amp;sr_data-&gt;match_tag);</div><div class='add'>+</div><div class='add'>+	old_data = rhashtable_lookup_get_insert_fast(&amp;subm-&gt;rules_hash,</div><div class='add'>+						     &amp;sr_data-&gt;hash_node,</div><div class='add'>+						     hws_rules_hash_params);</div><div class='add'>+	if (IS_ERR(old_data)) {</div><div class='add'>+		ret = PTR_ERR(old_data);</div><div class='add'>+		goto free_ida;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (old_data) {</div><div class='add'>+		/* Rule with the same tag already exists - update refcount */</div><div class='add'>+		refcount_inc(&amp;old_data-&gt;refcount);</div><div class='add'>+		/* Let the new rule use the same tag as the existing rule.</div><div class='add'>+		 * Note that we don't have any indication for the rule creation</div><div class='add'>+		 * process that a rule with similar matching params already</div><div class='add'>+		 * exists - no harm done when this rule is be overwritten by</div><div class='add'>+		 * the same STE.</div><div class='add'>+		 * There's some performance advantage in skipping such cases,</div><div class='add'>+		 * so this is left for future optimizations.</div><div class='add'>+		 */</div><div class='add'>+		bwc_rule-&gt;subrule_data = old_data;</div><div class='add'>+		ret = 0;</div><div class='add'>+		goto free_ida;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bwc_rule-&gt;subrule_data = sr_data;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_ida:</div><div class='add'>+	ida_free(&amp;subm-&gt;chain_ida, sr_data-&gt;chain_id);</div><div class='add'>+free_sr_data:</div><div class='add'>+	kfree(sr_data);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+hws_complex_put_subrule_data(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='add'>+			     struct mlx5hws_bwc_complex_submatcher *subm,</div><div class='add'>+			     bool *is_last_rule)</div><div class='add'>+__must_hold(&amp;subm-&gt;hash_lock)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_complex_subrule_data *sr_data;</div><div class='add'>+</div><div class='add'>+	if (is_last_rule)</div><div class='add'>+		*is_last_rule = false;</div><div class='add'>+</div><div class='add'>+	sr_data = bwc_rule-&gt;subrule_data;</div><div class='add'>+	if (refcount_dec_and_test(&amp;sr_data-&gt;refcount)) {</div><div class='add'>+		rhashtable_remove_fast(&amp;subm-&gt;rules_hash,</div><div class='add'>+				       &amp;sr_data-&gt;hash_node,</div><div class='add'>+				       hws_rules_hash_params);</div><div class='add'>+		ida_free(&amp;subm-&gt;chain_ida, sr_data-&gt;chain_id);</div><div class='add'>+		kfree(sr_data);</div><div class='add'>+		if (is_last_rule)</div><div class='add'>+			*is_last_rule = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bwc_rule-&gt;subrule_data = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_complex_subrule_create(struct mlx5hws_bwc_matcher *cmatcher,</div><div class='add'>+				      struct mlx5hws_bwc_rule *subrule,</div><div class='add'>+				      u32 *match_params, u32 flow_source,</div><div class='add'>+				      int bwc_queue_idx, int subm_idx,</div><div class='add'>+				      struct mlx5hws_rule_action *actions,</div><div class='add'>+				      u32 *chain_id)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_rule_action chain_actions[HWS_NUM_CHAIN_ACTIONS] = {0};</div><div class='add'>+	u8 modify_hdr_action[MLX5_ST_SZ_BYTES(set_action_in)] = {0};</div><div class='add'>+	struct mlx5hws_bwc_matcher_complex_data *cdata;</div><div class='add'>+	struct mlx5hws_bwc_complex_submatcher *subm;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cdata = cmatcher-&gt;complex;</div><div class='add'>+	subm = &amp;cdata-&gt;submatchers[subm_idx];</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;subm-&gt;hash_lock);</div><div class='add'>+</div><div class='add'>+	ret = hws_complex_get_subrule_data(subrule, subm, match_params);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	*chain_id = subrule-&gt;subrule_data-&gt;chain_id;</div><div class='add'>+</div><div class='add'>+	if (!actions) {</div><div class='add'>+		MLX5_SET(set_action_in, modify_hdr_action, data, *chain_id);</div><div class='add'>+		chain_actions[0].action = cdata-&gt;action_metadata;</div><div class='add'>+		chain_actions[0].modify_header.data = modify_hdr_action;</div><div class='add'>+		chain_actions[1].action =</div><div class='add'>+			cdata-&gt;submatchers[subm_idx + 1].action_tbl;</div><div class='add'>+		chain_actions[2].action = cdata-&gt;action_last;</div><div class='add'>+		actions = chain_actions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mlx5hws_bwc_rule_create_simple(subrule, match_params, actions,</div><div class='add'>+					     flow_source, bwc_queue_idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto put_subrule_data;</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+	goto unlock;</div><div class='add'>+</div><div class='add'>+put_subrule_data:</div><div class='add'>+	hws_complex_put_subrule_data(subrule, subm, NULL);</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;subm-&gt;hash_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_complex_subrule_destroy(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='add'>+				       struct mlx5hws_bwc_matcher *cmatcher,</div><div class='add'>+				       int subm_idx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_matcher_complex_data *cdata;</div><div class='add'>+	struct mlx5hws_bwc_complex_submatcher *subm;</div><div class='add'>+	struct mlx5hws_context *ctx;</div><div class='add'>+	bool is_last_rule;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	cdata = cmatcher-&gt;complex;</div><div class='add'>+	subm = &amp;cdata-&gt;submatchers[subm_idx];</div><div class='add'>+	ctx = subm-&gt;tbl-&gt;ctx;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;subm-&gt;hash_lock);</div><div class='add'>+</div><div class='add'>+	hws_complex_put_subrule_data(bwc_rule, subm, &amp;is_last_rule);</div><div class='add'>+	bwc_rule-&gt;rule-&gt;skip_delete = !is_last_rule;</div><div class='add'>+	ret = mlx5hws_bwc_rule_destroy_simple(bwc_rule);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		mlx5hws_err(ctx,</div><div class='add'>+			    "Complex rule: failed to delete subrule %d (%d)\n",</div><div class='add'>+			    subm_idx, ret);</div><div class='add'>+</div><div class='add'>+	if (subm_idx)</div><div class='add'>+		mlx5hws_bwc_rule_free(bwc_rule);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;subm-&gt;hash_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5hws_bwc_rule_create_complex(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='add'>+				    struct mlx5hws_match_parameters *params,</div><div class='add'>+				    u32 flow_source,</div><div class='add'>+				    struct mlx5hws_rule_action rule_actions[],</div><div class='add'>+				    u16 bwc_queue_idx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_rule</div><div class='add'>+		*subrules[MLX5HWS_BWC_COMPLEX_MAX_SUBMATCHERS] = {0};</div><div class='add'>+	struct mlx5hws_bwc_matcher *cmatcher = bwc_rule-&gt;bwc_matcher;</div><div class='add'>+	struct mlx5hws_bwc_matcher_complex_data *cdata;</div><div class='add'>+	struct mlx5hws_rule_action *subrule_actions;</div><div class='add'>+	struct mlx5hws_bwc_complex_submatcher *subm;</div><div class='add'>+	struct mlx5hws_bwc_rule *subrule;</div><div class='add'>+	u32 *match_params;</div><div class='add'>+	u32 chain_id;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	cdata = cmatcher-&gt;complex;</div><div class='add'>+	if (!cdata)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Duplicate user data because we will modify it to set register C6</div><div class='add'>+	 * values. For the same reason, make sure that we allocate a full</div><div class='add'>+	 * match_param even if the user gave us fewer bytes. We need to ensure</div><div class='add'>+	 * there is space for the match on C6.</div><div class='add'>+	 */</div><div class='add'>+	match_params = kzalloc(MLX5_ST_SZ_BYTES(fte_match_param), GFP_KERNEL);</div><div class='add'>+	if (!match_params)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	memcpy(match_params, params-&gt;match_buf, params-&gt;match_sz);</div><div class='add'>+</div><div class='add'>+	ret = hws_complex_subrule_create(cmatcher, bwc_rule, match_params,</div><div class='add'>+					 flow_source, bwc_queue_idx, 0,</div><div class='add'>+					 NULL, &amp;chain_id);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_match_params;</div><div class='add'>+	subrules[0] = bwc_rule;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; cdata-&gt;num_submatchers; i++) {</div><div class='add'>+		subm = &amp;cdata-&gt;submatchers[i];</div><div class='add'>+		subrule = mlx5hws_bwc_rule_alloc(subm-&gt;bwc_matcher);</div><div class='add'>+		if (!subrule) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto destroy_subrules;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Match on the previous subrule's chain_id. This is how</div><div class='add'>+		 * subrules are connected in steering.</div><div class='add'>+		 */</div><div class='add'>+		MLX5_SET(fte_match_param, match_params,</div><div class='add'>+			 misc_parameters_2.metadata_reg_c_6, chain_id);</div><div class='add'>+</div><div class='add'>+		/* The last subrule uses the complex rule's user-specified</div><div class='add'>+		 * actions. Everything else uses the chaining rules based on the</div><div class='add'>+		 * next table and chain_id.</div><div class='add'>+		 */</div><div class='add'>+		subrule_actions =</div><div class='add'>+			i == cdata-&gt;num_submatchers - 1 ? rule_actions : NULL;</div><div class='add'>+</div><div class='add'>+		ret = hws_complex_subrule_create(cmatcher, subrule,</div><div class='add'>+						 match_params, flow_source,</div><div class='add'>+						 bwc_queue_idx, i,</div><div class='add'>+						 subrule_actions, &amp;chain_id);</div><div class='add'>+		if (ret) {</div><div class='add'>+			mlx5hws_bwc_rule_free(subrule);</div><div class='add'>+			goto destroy_subrules;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		subrules[i] = subrule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cdata-&gt;num_submatchers - 1; i++)</div><div class='add'>+		subrules[i]-&gt;next_subrule = subrules[i + 1];</div><div class='add'>+</div><div class='add'>+	kfree(match_params);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy_subrules:</div><div class='add'>+	while (i--)</div><div class='add'>+		hws_complex_subrule_destroy(subrules[i], cmatcher, i);</div><div class='add'>+free_match_params:</div><div class='add'>+	kfree(match_params);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5hws_bwc_rule_destroy_complex(struct mlx5hws_bwc_rule *bwc_rule)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_bwc_matcher *bwc_matcher = bwc_rule-&gt;bwc_matcher;</div><div class='add'>+	struct mlx5hws_bwc_rule</div><div class='add'>+		*subrules[MLX5HWS_BWC_COMPLEX_MAX_SUBMATCHERS] = {0};</div><div class='add'>+	struct mlx5hws_bwc_matcher_complex_data *cdata;</div><div class='add'>+	int i, err, ret_val;</div><div class='add'>+</div><div class='add'>+	cdata = bwc_matcher-&gt;complex;</div><div class='add'>+</div><div class='add'>+	/* Construct a list of all the subrules we need to destroy. */</div><div class='add'>+	subrules[0] = bwc_rule;</div><div class='add'>+	for (i = 1; i &lt; cdata-&gt;num_submatchers; i++)</div><div class='add'>+		subrules[i] = subrules[i - 1]-&gt;next_subrule;</div><div class='add'>+</div><div class='add'>+	ret_val = 0;</div><div class='add'>+	for (i = 0; i &lt; cdata-&gt;num_submatchers; i++) {</div><div class='add'>+		err = hws_complex_subrule_destroy(subrules[i], bwc_matcher, i);</div><div class='add'>+		/* If something goes wrong, plow along to destroy all of the</div><div class='add'>+		 * subrules but return an error upstack.</div><div class='add'>+		 */</div><div class='add'>+		if (unlikely(err))</div><div class='add'>+			ret_val = err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+hws_bwc_matcher_init_move(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	u16 bwc_queues = mlx5hws_bwc_queues(ctx);</div><div class='add'>+	struct mlx5hws_bwc_rule *bwc_rule;</div><div class='add'>+	struct list_head *rules_list;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bwc_queues; i++) {</div><div class='add'>+		rules_list = &amp;bwc_matcher-&gt;rules[i];</div><div class='add'>+		if (list_empty(rules_list))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		list_for_each_entry(bwc_rule, rules_list, list_node) {</div><div class='add'>+			if (!bwc_rule-&gt;subrule_data)</div><div class='add'>+				continue;</div><div class='add'>+			bwc_rule-&gt;subrule_data-&gt;was_moved = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5hws_bwc_matcher_complex_move(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	struct mlx5hws_matcher *matcher = bwc_matcher-&gt;matcher;</div><div class='add'>+	u16 bwc_queues = mlx5hws_bwc_queues(ctx);</div><div class='add'>+	struct mlx5hws_bwc_rule *tmp_bwc_rule;</div><div class='add'>+	struct mlx5hws_rule_attr rule_attr;</div><div class='add'>+	int move_error = 0, poll_error = 0;</div><div class='add'>+	struct mlx5hws_rule *tmp_rule;</div><div class='add'>+	struct list_head *rules_list;</div><div class='add'>+	u32 expected_completions = 1;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	hws_bwc_matcher_init_move(bwc_matcher);</div><div class='add'>+</div><div class='add'>+	mlx5hws_bwc_rule_fill_attr(bwc_matcher, 0, 0, &amp;rule_attr);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bwc_queues; i++) {</div><div class='add'>+		rules_list = &amp;bwc_matcher-&gt;rules[i];</div><div class='add'>+		if (list_empty(rules_list))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rule_attr.queue_id = mlx5hws_bwc_get_queue_id(ctx, i);</div><div class='add'>+</div><div class='add'>+		list_for_each_entry(tmp_bwc_rule, rules_list, list_node) {</div><div class='add'>+			/* Check if a rule with similar tag has already</div><div class='add'>+			 * been moved.</div><div class='add'>+			 */</div><div class='add'>+			if (tmp_bwc_rule-&gt;subrule_data-&gt;was_moved) {</div><div class='add'>+				/* This rule is a duplicate of rule with</div><div class='add'>+				 * identical tag that has already been moved</div><div class='add'>+				 * earlier. Just update this rule's RTCs.</div><div class='add'>+				 */</div><div class='add'>+				tmp_bwc_rule-&gt;rule-&gt;rtc_0 =</div><div class='add'>+					tmp_bwc_rule-&gt;subrule_data-&gt;rtc_0;</div><div class='add'>+				tmp_bwc_rule-&gt;rule-&gt;rtc_1 =</div><div class='add'>+					tmp_bwc_rule-&gt;subrule_data-&gt;rtc_1;</div><div class='add'>+				tmp_bwc_rule-&gt;rule-&gt;matcher =</div><div class='add'>+					tmp_bwc_rule-&gt;rule-&gt;matcher-&gt;resize_dst;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* First time we're moving rule with this tag.</div><div class='add'>+			 * Move it for real.</div><div class='add'>+			 */</div><div class='add'>+			tmp_rule = tmp_bwc_rule-&gt;rule;</div><div class='add'>+			tmp_rule-&gt;skip_delete = false;</div><div class='add'>+			ret = mlx5hws_matcher_resize_rule_move(matcher,</div><div class='add'>+							       tmp_rule,</div><div class='add'>+							       &amp;rule_attr);</div><div class='add'>+			if (unlikely(ret)) {</div><div class='add'>+				if (!move_error) {</div><div class='add'>+					mlx5hws_err(ctx,</div><div class='add'>+						    "Moving complex BWC rule: move failed (%d), attempting to move rest of the rules\n",</div><div class='add'>+						    ret);</div><div class='add'>+					move_error = ret;</div><div class='add'>+				}</div><div class='add'>+				/* Rule wasn't queued, no need to poll */</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			expected_completions = 1;</div><div class='add'>+			ret = mlx5hws_bwc_queue_poll(ctx,</div><div class='add'>+						     rule_attr.queue_id,</div><div class='add'>+						     &amp;expected_completions,</div><div class='add'>+						     true);</div><div class='add'>+			if (unlikely(ret)) {</div><div class='add'>+				if (ret == -ETIMEDOUT) {</div><div class='add'>+					mlx5hws_err(ctx,</div><div class='add'>+						    "Moving complex BWC rule: timeout polling for completions (%d), aborting rehash\n",</div><div class='add'>+						    ret);</div><div class='add'>+					return ret;</div><div class='add'>+				}</div><div class='add'>+				if (!poll_error) {</div><div class='add'>+					mlx5hws_err(ctx,</div><div class='add'>+						    "Moving complex BWC rule: polling for completions failed (%d), attempting to move rest of the rules\n",</div><div class='add'>+						    ret);</div><div class='add'>+					poll_error = ret;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Done moving the rule to the new matcher,</div><div class='add'>+			 * now update RTCs for all the duplicated rules.</div><div class='add'>+			 */</div><div class='add'>+			tmp_bwc_rule-&gt;subrule_data-&gt;rtc_0 =</div><div class='add'>+				tmp_bwc_rule-&gt;rule-&gt;rtc_0;</div><div class='add'>+			tmp_bwc_rule-&gt;subrule_data-&gt;rtc_1 =</div><div class='add'>+				tmp_bwc_rule-&gt;rule-&gt;rtc_1;</div><div class='add'>+</div><div class='add'>+			tmp_bwc_rule-&gt;subrule_data-&gt;was_moved = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Return the first error that happened */</div><div class='add'>+	if (unlikely(move_error))</div><div class='add'>+		return move_error;</div><div class='add'>+	if (unlikely(poll_error))</div><div class='add'>+		return poll_error;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+mlx5hws_bwc_matcher_complex_move_first(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *ctx = bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	struct mlx5hws_bwc_matcher_complex_data *cdata;</div><div class='add'>+	struct mlx5hws_table *isolated_tbl;</div><div class='add'>+	u32 end_ft_id;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	cdata = bwc_matcher-&gt;complex;</div><div class='add'>+</div><div class='add'>+	/* We are rehashing the first submatcher. We need to update the</div><div class='add'>+	 * subsequent submatchers to point to the end_ft of this new matcher.</div><div class='add'>+	 * This needs to be done before moving any rules to prevent possible</div><div class='add'>+	 * steering loops.</div><div class='add'>+	 */</div><div class='add'>+	end_ft_id = bwc_matcher-&gt;matcher-&gt;resize_dst-&gt;end_ft_id;</div><div class='add'>+	for (i = 1; i &lt; cdata-&gt;num_submatchers; i++) {</div><div class='add'>+		isolated_tbl = cdata-&gt;submatchers[i].tbl;</div><div class='add'>+		ret = mlx5hws_matcher_update_end_ft_isolated(isolated_tbl,</div><div class='add'>+							     end_ft_id);</div><div class='add'>+		if (ret) {</div><div class='add'>+			mlx5hws_err(ctx,</div><div class='add'>+				    "Complex matcher: failed updating end_ft of isolated matcher (%d)\n",</div><div class='add'>+				    ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mlx5hws_bwc_matcher_complex_move(bwc_matcher);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.h<br/>new file mode 100644<br/>index 000000000000..d07de631ce9f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.h</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#ifndef HWS_BWC_COMPLEX_H_</div><div class='add'>+#define HWS_BWC_COMPLEX_H_</div><div class='add'>+</div><div class='add'>+#define MLX5HWS_BWC_COMPLEX_MAX_SUBMATCHERS 4</div><div class='add'>+</div><div class='add'>+/* A matcher can't contain two rules with the same match tag, but it is possible</div><div class='add'>+ * that two different complex rules' subrules have the same match tag. In that</div><div class='add'>+ * case, those subrules correspond to a single rule, and we need to refcount.</div><div class='add'>+ */</div><div class='add'>+struct mlx5hws_bwc_complex_subrule_data {</div><div class='add'>+	struct mlx5hws_rule_match_tag match_tag;</div><div class='add'>+	refcount_t refcount;</div><div class='add'>+	/* The chain_id is what glues individual subrules into larger complex</div><div class='add'>+	 * rules. It is the value that this subrule writes to register C6, and</div><div class='add'>+	 * that the next subrule matches against.</div><div class='add'>+	 */</div><div class='add'>+	u32 chain_id;</div><div class='add'>+	u32 rtc_0;</div><div class='add'>+	u32 rtc_1;</div><div class='add'>+	/* During rehash we iterate through all the subrules to move them. But</div><div class='add'>+	 * two or more subrules can share the same physical rule in the</div><div class='add'>+	 * submatcher, so we use `was_moved` to keep track if a given rule was</div><div class='add'>+	 * already moved.</div><div class='add'>+	 */</div><div class='add'>+	bool was_moved;</div><div class='add'>+	struct rhash_head hash_node;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5hws_bwc_complex_submatcher {</div><div class='add'>+	/* Isolated table that the matcher lives in. Not set for the first</div><div class='add'>+	 * matcher, which lives in the original table.</div><div class='add'>+	 */</div><div class='add'>+	struct mlx5hws_table *tbl;</div><div class='add'>+	/* Match a rule with this action to go to `tbl`. This is set in all</div><div class='add'>+	 * submatchers but the first.</div><div class='add'>+	 */</div><div class='add'>+	struct mlx5hws_action *action_tbl;</div><div class='add'>+	/* This submatcher's simple matcher. The first submatcher points to the</div><div class='add'>+	 * outer (complex) matcher.</div><div class='add'>+	 */</div><div class='add'>+	struct mlx5hws_bwc_matcher *bwc_matcher;</div><div class='add'>+	struct rhashtable rules_hash;</div><div class='add'>+	struct ida chain_ida;</div><div class='add'>+	struct mutex hash_lock; /* Protect the hash and ida. */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5hws_bwc_matcher_complex_data {</div><div class='add'>+	struct mlx5hws_bwc_complex_submatcher</div><div class='add'>+		submatchers[MLX5HWS_BWC_COMPLEX_MAX_SUBMATCHERS];</div><div class='add'>+	int num_submatchers;</div><div class='add'>+	/* Actions used by all but the last submatcher to point to the next</div><div class='add'>+	 * submatcher in the chain. The last submatcher uses the action template</div><div class='add'>+	 * from the complex matcher, to perform the actions that the user</div><div class='add'>+	 * originally requested.</div><div class='add'>+	 */</div><div class='add'>+	struct mlx5hws_action *action_metadata;</div><div class='add'>+	struct mlx5hws_action *action_last;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+bool mlx5hws_bwc_match_params_is_complex(struct mlx5hws_context *ctx,</div><div class='add'>+					 u8 match_criteria_enable,</div><div class='add'>+					 struct mlx5hws_match_parameters *mask);</div><div class='add'>+</div><div class='add'>+int mlx5hws_bwc_matcher_create_complex(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='add'>+				       struct mlx5hws_table *table,</div><div class='add'>+				       u32 priority,</div><div class='add'>+				       u8 match_criteria_enable,</div><div class='add'>+				       struct mlx5hws_match_parameters *mask);</div><div class='add'>+</div><div class='add'>+void mlx5hws_bwc_matcher_destroy_complex(struct mlx5hws_bwc_matcher *bwc_matcher);</div><div class='add'>+</div><div class='add'>+int mlx5hws_bwc_matcher_complex_move(struct mlx5hws_bwc_matcher *bwc_matcher);</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+mlx5hws_bwc_matcher_complex_move_first(struct mlx5hws_bwc_matcher *bwc_matcher);</div><div class='add'>+</div><div class='add'>+int mlx5hws_bwc_rule_create_complex(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='add'>+				    struct mlx5hws_match_parameters *params,</div><div class='add'>+				    u32 flow_source,</div><div class='add'>+				    struct mlx5hws_rule_action rule_actions[],</div><div class='add'>+				    u16 bwc_queue_idx);</div><div class='add'>+</div><div class='add'>+int mlx5hws_bwc_rule_destroy_complex(struct mlx5hws_bwc_rule *bwc_rule);</div><div class='add'>+</div><div class='add'>+#endif /* HWS_BWC_COMPLEX_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c<br/>index 2c7b14172049..f22eaf506d28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_cmd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_cmd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> static enum mlx5_ifc_flow_destination_type</div><div class='ctx'> hws_cmd_dest_type_to_ifc_dest_type(enum mlx5_flow_destination_type type)</div><div class='hunk'>@@ -55,6 +55,7 @@ int mlx5hws_cmd_flow_table_create(struct mlx5_core_dev *mdev,</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(create_flow_table_in, in, opcode, MLX5_CMD_OP_CREATE_FLOW_TABLE);</div><div class='ctx'> 	MLX5_SET(create_flow_table_in, in, table_type, ft_attr-&gt;type);</div><div class='add'>+	MLX5_SET(create_flow_table_in, in, uid, ft_attr-&gt;uid);</div><div class='ctx'> </div><div class='ctx'> 	ft_ctx = MLX5_ADDR_OF(create_flow_table_in, in, flow_table_context);</div><div class='ctx'> 	MLX5_SET(flow_table_context, ft_ctx, level, ft_attr-&gt;level);</div><div class='hunk'>@@ -130,12 +131,6 @@ int mlx5hws_cmd_flow_table_destroy(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	return mlx5_cmd_exec_in(mdev, destroy_flow_table, in);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5hws_cmd_alias_flow_table_destroy(struct mlx5_core_dev *mdev,</div><div class='del'>-					  u32 table_id)</div><div class='del'>-{</div><div class='del'>-	hws_cmd_general_obj_destroy(mdev, MLX5_OBJ_TYPE_FT_ALIAS, table_id);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int hws_cmd_flow_group_create(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				     struct mlx5hws_cmd_fg_attr *fg_attr,</div><div class='ctx'> 				     u32 *group_id)</div><div class='hunk'>@@ -257,6 +252,12 @@ int mlx5hws_cmd_set_fte(struct mlx5_core_dev *mdev,</div><div class='ctx'> 						 dest-&gt;ext_reformat_id);</div><div class='ctx'> 				}</div><div class='ctx'> 				break;</div><div class='add'>+			case MLX5_FLOW_DESTINATION_TYPE_FLOW_SAMPLER:</div><div class='add'>+				MLX5_SET(dest_format, in_dests,</div><div class='add'>+					 destination_type, ifc_dest_type);</div><div class='add'>+				MLX5_SET(dest_format, in_dests, destination_id,</div><div class='add'>+					 dest-&gt;destination_id);</div><div class='add'>+				break;</div><div class='ctx'> 			default:</div><div class='ctx'> 				ret = -EOPNOTSUPP;</div><div class='ctx'> 				goto out;</div><div class='hunk'>@@ -359,7 +360,7 @@ void mlx5hws_cmd_set_attr_connect_miss_tbl(struct mlx5hws_context *ctx,</div><div class='ctx'> 	ft_attr-&gt;type = fw_ft_type;</div><div class='ctx'> 	ft_attr-&gt;table_miss_action = MLX5_IFC_MODIFY_FLOW_TABLE_MISS_ACTION_GOTO_TBL;</div><div class='ctx'> </div><div class='del'>-	default_miss_tbl = ctx-&gt;common_res[type].default_miss-&gt;ft_id;</div><div class='add'>+	default_miss_tbl = ctx-&gt;common_res.default_miss-&gt;ft_id;</div><div class='ctx'> 	if (!default_miss_tbl) {</div><div class='ctx'> 		pr_warn("HWS: no flow table ID for default miss\n");</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -406,7 +407,6 @@ int mlx5hws_cmd_rtc_create(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	MLX5_SET(rtc, attr, match_definer_1, rtc_attr-&gt;match_definer_1);</div><div class='ctx'> 	MLX5_SET(rtc, attr, stc_id, rtc_attr-&gt;stc_base);</div><div class='ctx'> 	MLX5_SET(rtc, attr, ste_table_base_id, rtc_attr-&gt;ste_base);</div><div class='del'>-	MLX5_SET(rtc, attr, ste_table_offset, rtc_attr-&gt;ste_offset);</div><div class='ctx'> 	MLX5_SET(rtc, attr, miss_flow_table_id, rtc_attr-&gt;miss_ft_id);</div><div class='ctx'> 	MLX5_SET(rtc, attr, reparse_mode, rtc_attr-&gt;reparse_mode);</div><div class='ctx'> </div><div class='hunk'>@@ -622,12 +622,12 @@ int mlx5hws_cmd_arg_create(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			   u32 pd,</div><div class='ctx'> 			   u32 *arg_id)</div><div class='ctx'> {</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(create_modify_header_arg_in)] = {0};</div><div class='ctx'> 	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};</div><div class='del'>-	u32 in[MLX5_ST_SZ_DW(create_arg_in)] = {0};</div><div class='ctx'> 	void *attr;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	attr = MLX5_ADDR_OF(create_arg_in, in, hdr);</div><div class='add'>+	attr = MLX5_ADDR_OF(create_modify_header_arg_in, in, hdr);</div><div class='ctx'> 	MLX5_SET(general_obj_in_cmd_hdr,</div><div class='ctx'> 		 attr, opcode, MLX5_CMD_OP_CREATE_GENERAL_OBJECT);</div><div class='ctx'> 	MLX5_SET(general_obj_in_cmd_hdr,</div><div class='hunk'>@@ -635,8 +635,8 @@ int mlx5hws_cmd_arg_create(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	MLX5_SET(general_obj_in_cmd_hdr,</div><div class='ctx'> 		 attr, op_param.create.log_obj_range, log_obj_range);</div><div class='ctx'> </div><div class='del'>-	attr = MLX5_ADDR_OF(create_arg_in, in, arg);</div><div class='del'>-	MLX5_SET(arg, attr, access_pd, pd);</div><div class='add'>+	attr = MLX5_ADDR_OF(create_modify_header_arg_in, in, arg);</div><div class='add'>+	MLX5_SET(modify_header_arg, attr, access_pd, pd);</div><div class='ctx'> </div><div class='ctx'> 	ret = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -812,7 +812,7 @@ int mlx5hws_cmd_packet_reformat_create(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				       struct mlx5hws_cmd_packet_reformat_create_attr *attr,</div><div class='ctx'> 				       u32 *reformat_id)</div><div class='ctx'> {</div><div class='del'>-	u32 out[MLX5_ST_SZ_DW(alloc_packet_reformat_out)] = {0};</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(alloc_packet_reformat_context_out)] = {0};</div><div class='ctx'> 	size_t insz, cmd_data_sz, cmd_total_sz;</div><div class='ctx'> 	void *prctx;</div><div class='ctx'> 	void *pdata;</div><div class='hunk'>@@ -845,7 +845,7 @@ int mlx5hws_cmd_packet_reformat_create(struct mlx5_core_dev *mdev,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*reformat_id = MLX5_GET(alloc_packet_reformat_out, out, packet_reformat_id);</div><div class='add'>+	*reformat_id = MLX5_GET(alloc_packet_reformat_context_out, out, packet_reformat_id);</div><div class='ctx'> out:</div><div class='ctx'> 	kfree(in);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -854,13 +854,13 @@ out:</div><div class='ctx'> int mlx5hws_cmd_packet_reformat_destroy(struct mlx5_core_dev *mdev,</div><div class='ctx'> 					u32 reformat_id)</div><div class='ctx'> {</div><div class='del'>-	u32 out[MLX5_ST_SZ_DW(dealloc_packet_reformat_out)] = {0};</div><div class='del'>-	u32 in[MLX5_ST_SZ_DW(dealloc_packet_reformat_in)] = {0};</div><div class='add'>+	u32 out[MLX5_ST_SZ_DW(dealloc_packet_reformat_context_out)] = {0};</div><div class='add'>+	u32 in[MLX5_ST_SZ_DW(dealloc_packet_reformat_context_in)] = {0};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	MLX5_SET(dealloc_packet_reformat_in, in, opcode,</div><div class='add'>+	MLX5_SET(dealloc_packet_reformat_context_in, in, opcode,</div><div class='ctx'> 		 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);</div><div class='del'>-	MLX5_SET(dealloc_packet_reformat_in, in,</div><div class='add'>+	MLX5_SET(dealloc_packet_reformat_context_in, in,</div><div class='ctx'> 		 packet_reformat_id, reformat_id);</div><div class='ctx'> </div><div class='ctx'> 	ret = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));</div><div class='hunk'>@@ -889,73 +889,6 @@ int mlx5hws_cmd_sq_modify_rdy(struct mlx5_core_dev *mdev, u32 sqn)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5hws_cmd_allow_other_vhca_access(struct mlx5_core_dev *mdev,</div><div class='del'>-					struct mlx5hws_cmd_allow_other_vhca_access_attr *attr)</div><div class='del'>-{</div><div class='del'>-	u32 out[MLX5_ST_SZ_DW(allow_other_vhca_access_out)] = {0};</div><div class='del'>-	u32 in[MLX5_ST_SZ_DW(allow_other_vhca_access_in)] = {0};</div><div class='del'>-	void *key;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	MLX5_SET(allow_other_vhca_access_in,</div><div class='del'>-		 in, opcode, MLX5_CMD_OP_ALLOW_OTHER_VHCA_ACCESS);</div><div class='del'>-	MLX5_SET(allow_other_vhca_access_in,</div><div class='del'>-		 in, object_type_to_be_accessed, attr-&gt;obj_type);</div><div class='del'>-	MLX5_SET(allow_other_vhca_access_in,</div><div class='del'>-		 in, object_id_to_be_accessed, attr-&gt;obj_id);</div><div class='del'>-</div><div class='del'>-	key = MLX5_ADDR_OF(allow_other_vhca_access_in, in, access_key);</div><div class='del'>-	memcpy(key, attr-&gt;access_key, sizeof(attr-&gt;access_key));</div><div class='del'>-</div><div class='del'>-	ret = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));</div><div class='del'>-	if (ret)</div><div class='del'>-		mlx5_core_err(mdev, "Failed to execute ALLOW_OTHER_VHCA_ACCESS command\n");</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mlx5hws_cmd_alias_obj_create(struct mlx5_core_dev *mdev,</div><div class='del'>-				 struct mlx5hws_cmd_alias_obj_create_attr *alias_attr,</div><div class='del'>-				 u32 *obj_id)</div><div class='del'>-{</div><div class='del'>-	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {0};</div><div class='del'>-	u32 in[MLX5_ST_SZ_DW(create_alias_obj_in)] = {0};</div><div class='del'>-	void *attr;</div><div class='del'>-	void *key;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	attr = MLX5_ADDR_OF(create_alias_obj_in, in, hdr);</div><div class='del'>-	MLX5_SET(general_obj_in_cmd_hdr,</div><div class='del'>-		 attr, opcode, MLX5_CMD_OP_CREATE_GENERAL_OBJECT);</div><div class='del'>-	MLX5_SET(general_obj_in_cmd_hdr,</div><div class='del'>-		 attr, obj_type, alias_attr-&gt;obj_type);</div><div class='del'>-	MLX5_SET(general_obj_in_cmd_hdr, attr, op_param.create.alias_object, 1);</div><div class='del'>-</div><div class='del'>-	attr = MLX5_ADDR_OF(create_alias_obj_in, in, alias_ctx);</div><div class='del'>-	MLX5_SET(alias_context, attr, vhca_id_to_be_accessed, alias_attr-&gt;vhca_id);</div><div class='del'>-	MLX5_SET(alias_context, attr, object_id_to_be_accessed, alias_attr-&gt;obj_id);</div><div class='del'>-</div><div class='del'>-	key = MLX5_ADDR_OF(alias_context, attr, access_key);</div><div class='del'>-	memcpy(key, alias_attr-&gt;access_key, sizeof(alias_attr-&gt;access_key));</div><div class='del'>-</div><div class='del'>-	ret = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out));</div><div class='del'>-	if (ret) {</div><div class='del'>-		mlx5_core_err(mdev, "Failed to create ALIAS OBJ\n");</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*obj_id = MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mlx5hws_cmd_alias_obj_destroy(struct mlx5_core_dev *mdev,</div><div class='del'>-				  u16 obj_type,</div><div class='del'>-				  u32 obj_id)</div><div class='del'>-{</div><div class='del'>-	return hws_cmd_general_obj_destroy(mdev, obj_type, obj_id);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int mlx5hws_cmd_generate_wqe(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			     struct mlx5hws_cmd_generate_wqe_attr *attr,</div><div class='ctx'> 			     struct mlx5_cqe64 *ret_cqe)</div><div class='hunk'>@@ -1267,34 +1200,20 @@ out:</div><div class='ctx'> int mlx5hws_cmd_query_gvmi(struct mlx5_core_dev *mdev, bool other_function,</div><div class='ctx'> 			   u16 vport_number, u16 *gvmi)</div><div class='ctx'> {</div><div class='del'>-	bool ec_vf_func = other_function ? mlx5_core_is_ec_vf_vport(mdev, vport_number) : false;</div><div class='del'>-	u32 in[MLX5_ST_SZ_DW(query_hca_cap_in)] = {};</div><div class='del'>-	int out_size;</div><div class='del'>-	void *out;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	out_size = MLX5_ST_SZ_BYTES(query_hca_cap_out);</div><div class='del'>-	out = kzalloc(out_size, GFP_KERNEL);</div><div class='del'>-	if (!out)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, other_function, other_function);</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, function_id,</div><div class='del'>-		 mlx5_vport_to_func_id(mdev, vport_number, ec_vf_func));</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, ec_vf_function, ec_vf_func);</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, op_mod,</div><div class='del'>-		 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE &lt;&lt; 1 | HCA_CAP_OPMOD_GET_CUR);</div><div class='add'>+	if (!other_function) {</div><div class='add'>+		/* self vhca_id */</div><div class='add'>+		*gvmi = MLX5_CAP_GEN(mdev, vhca_id);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	err = mlx5_cmd_exec_inout(mdev, query_hca_cap, in, out);</div><div class='add'>+	err = mlx5_vport_get_vhca_id(mdev, vport_number, gvmi);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		kfree(out);</div><div class='add'>+		mlx5_core_err(mdev, "Failed to get vport vhca id for vport %d\n",</div><div class='add'>+			      vport_number);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*gvmi = MLX5_GET(query_hca_cap_out, out, capability.cmd_hca_cap.vhca_id);</div><div class='del'>-</div><div class='del'>-	kfree(out);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_cmd.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h<br/>index 2fbcf4ff571a..122ccc671628 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_cmd.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_cmd.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#ifndef MLX5HWS_CMD_H_</div><div class='del'>-#define MLX5HWS_CMD_H_</div><div class='add'>+#ifndef HWS_CMD_H_</div><div class='add'>+#define HWS_CMD_H_</div><div class='ctx'> </div><div class='ctx'> #define WIRE_PORT 0xFFFF</div><div class='ctx'> </div><div class='hunk'>@@ -36,6 +36,7 @@ struct mlx5hws_cmd_set_fte_attr {</div><div class='ctx'> struct mlx5hws_cmd_ft_create_attr {</div><div class='ctx'> 	u8 type;</div><div class='ctx'> 	u8 level;</div><div class='add'>+	u16 uid;</div><div class='ctx'> 	bool rtc_valid;</div><div class='ctx'> 	bool decap_en;</div><div class='ctx'> 	bool reformat_en;</div><div class='hunk'>@@ -63,14 +64,13 @@ struct mlx5hws_cmd_forward_tbl {</div><div class='ctx'> 	u8 type;</div><div class='ctx'> 	u32 ft_id;</div><div class='ctx'> 	u32 fg_id;</div><div class='del'>-	u32 refcount;</div><div class='add'>+	u32 refcount; /* protected by context ctrl lock */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_cmd_rtc_create_attr {</div><div class='ctx'> 	u32 pd;</div><div class='ctx'> 	u32 stc_base;</div><div class='ctx'> 	u32 ste_base;</div><div class='del'>-	u32 ste_offset;</div><div class='ctx'> 	u32 miss_ft_id;</div><div class='ctx'> 	bool fw_gen_wqe;</div><div class='ctx'> 	u8 update_index_mode;</div><div class='hunk'>@@ -258,9 +258,6 @@ int mlx5hws_cmd_flow_table_query(struct mlx5_core_dev *mdev,</div><div class='ctx'> int mlx5hws_cmd_flow_table_destroy(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				   u8 fw_ft_type, u32 table_id);</div><div class='ctx'> </div><div class='del'>-void mlx5hws_cmd_alias_flow_table_destroy(struct mlx5_core_dev *mdev,</div><div class='del'>-					  u32 table_id);</div><div class='del'>-</div><div class='ctx'> int mlx5hws_cmd_rtc_create(struct mlx5_core_dev *mdev,</div><div class='ctx'> 			   struct mlx5hws_cmd_rtc_create_attr *rtc_attr,</div><div class='ctx'> 			   u32 *rtc_id);</div><div class='hunk'>@@ -334,14 +331,6 @@ mlx5hws_cmd_forward_tbl_create(struct mlx5_core_dev *mdev,</div><div class='ctx'> void mlx5hws_cmd_forward_tbl_destroy(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				     struct mlx5hws_cmd_forward_tbl *tbl);</div><div class='ctx'> </div><div class='del'>-int mlx5hws_cmd_alias_obj_create(struct mlx5_core_dev *mdev,</div><div class='del'>-				 struct mlx5hws_cmd_alias_obj_create_attr *alias_attr,</div><div class='del'>-				 u32 *obj_id);</div><div class='del'>-</div><div class='del'>-int mlx5hws_cmd_alias_obj_destroy(struct mlx5_core_dev *mdev,</div><div class='del'>-				  u16 obj_type,</div><div class='del'>-				  u32 obj_id);</div><div class='del'>-</div><div class='ctx'> int mlx5hws_cmd_sq_modify_rdy(struct mlx5_core_dev *mdev, u32 sqn);</div><div class='ctx'> </div><div class='ctx'> int mlx5hws_cmd_query_caps(struct mlx5_core_dev *mdev,</div><div class='hunk'>@@ -352,10 +341,7 @@ void mlx5hws_cmd_set_attr_connect_miss_tbl(struct mlx5hws_context *ctx,</div><div class='ctx'> 					   enum mlx5hws_table_type type,</div><div class='ctx'> 					   struct mlx5hws_cmd_ft_modify_attr *ft_attr);</div><div class='ctx'> </div><div class='del'>-int mlx5hws_cmd_allow_other_vhca_access(struct mlx5_core_dev *mdev,</div><div class='del'>-					struct mlx5hws_cmd_allow_other_vhca_access_attr *attr);</div><div class='del'>-</div><div class='ctx'> int mlx5hws_cmd_query_gvmi(struct mlx5_core_dev *mdev, bool other_function,</div><div class='ctx'> 			   u16 vport_number, u16 *gvmi);</div><div class='ctx'> </div><div class='del'>-#endif /* MLX5HWS_CMD_H_ */</div><div class='add'>+#endif /* HWS_CMD_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_context.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c<br/>index 00e4fdf4a558..428dae869706 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_context.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_context.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA CORPORATION. All rights reserved. */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> bool mlx5hws_context_cap_dynamic_reparse(struct mlx5hws_context *ctx)</div><div class='ctx'> {</div><div class='hunk'>@@ -23,7 +23,6 @@ static int hws_context_pools_init(struct mlx5hws_context *ctx)</div><div class='ctx'> 	struct mlx5hws_pool_attr pool_attr = {0};</div><div class='ctx'> 	u8 max_log_sz;</div><div class='ctx'> 	int ret;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	ret = mlx5hws_pat_init_pattern_cache(&amp;ctx-&gt;pattern_cache);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -35,27 +34,20 @@ static int hws_context_pools_init(struct mlx5hws_context *ctx)</div><div class='ctx'> </div><div class='ctx'> 	/* Create an STC pool per FT type */</div><div class='ctx'> 	pool_attr.pool_type = MLX5HWS_POOL_TYPE_STC;</div><div class='del'>-	pool_attr.flags = MLX5HWS_POOL_FLAGS_FOR_STC_POOL;</div><div class='ctx'> 	max_log_sz = min(MLX5HWS_POOL_STC_LOG_SZ, ctx-&gt;caps-&gt;stc_alloc_log_max);</div><div class='ctx'> 	pool_attr.alloc_log_sz = max(max_log_sz, ctx-&gt;caps-&gt;stc_alloc_log_gran);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MLX5HWS_TABLE_TYPE_MAX; i++) {</div><div class='del'>-		pool_attr.table_type = i;</div><div class='del'>-		ctx-&gt;stc_pool[i] = mlx5hws_pool_create(ctx, &amp;pool_attr);</div><div class='del'>-		if (!ctx-&gt;stc_pool[i]) {</div><div class='del'>-			mlx5hws_err(ctx, "Failed to allocate STC pool [%d]", i);</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto free_stc_pools;</div><div class='del'>-		}</div><div class='add'>+	pool_attr.table_type = MLX5HWS_TABLE_TYPE_FDB;</div><div class='add'>+	ctx-&gt;stc_pool = mlx5hws_pool_create(ctx, &amp;pool_attr);</div><div class='add'>+	if (!ctx-&gt;stc_pool) {</div><div class='add'>+		mlx5hws_err(ctx, "Failed to allocate STC pool\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto uninit_cache;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-free_stc_pools:</div><div class='del'>-	for (i = 0; i &lt; MLX5HWS_TABLE_TYPE_MAX; i++)</div><div class='del'>-		if (ctx-&gt;stc_pool[i])</div><div class='del'>-			mlx5hws_pool_destroy(ctx-&gt;stc_pool[i]);</div><div class='del'>-</div><div class='add'>+uninit_cache:</div><div class='ctx'> 	mlx5hws_definer_uninit_cache(ctx-&gt;definer_cache);</div><div class='ctx'> uninit_pat_cache:</div><div class='ctx'> 	mlx5hws_pat_uninit_pattern_cache(ctx-&gt;pattern_cache);</div><div class='hunk'>@@ -64,12 +56,8 @@ uninit_pat_cache:</div><div class='ctx'> </div><div class='ctx'> static void hws_context_pools_uninit(struct mlx5hws_context *ctx)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MLX5HWS_TABLE_TYPE_MAX; i++) {</div><div class='del'>-		if (ctx-&gt;stc_pool[i])</div><div class='del'>-			mlx5hws_pool_destroy(ctx-&gt;stc_pool[i]);</div><div class='del'>-	}</div><div class='add'>+	if (ctx-&gt;stc_pool)</div><div class='add'>+		mlx5hws_pool_destroy(ctx-&gt;stc_pool);</div><div class='ctx'> </div><div class='ctx'> 	mlx5hws_definer_uninit_cache(ctx-&gt;definer_cache);</div><div class='ctx'> 	mlx5hws_pat_uninit_pattern_cache(ctx-&gt;pattern_cache);</div><div class='hunk'>@@ -161,17 +149,25 @@ static int hws_context_init_hws(struct mlx5hws_context *ctx,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto uninit_pd;</div><div class='ctx'> </div><div class='del'>-	if (attr-&gt;bwc)</div><div class='del'>-		ctx-&gt;flags |= MLX5HWS_CONTEXT_FLAG_BWC_SUPPORT;</div><div class='add'>+	/* Context has support for backward compatible API,</div><div class='add'>+	 * and does not have support for native HWS API.</div><div class='add'>+	 */</div><div class='add'>+	ctx-&gt;flags |= MLX5HWS_CONTEXT_FLAG_BWC_SUPPORT;</div><div class='ctx'> </div><div class='ctx'> 	ret = mlx5hws_send_queues_open(ctx, attr-&gt;queues, attr-&gt;queue_size);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto pools_uninit;</div><div class='ctx'> </div><div class='add'>+	ret = mlx5hws_action_ste_pool_init(ctx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto close_queues;</div><div class='add'>+</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;ctx-&gt;tbl_list);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+close_queues:</div><div class='add'>+	mlx5hws_send_queues_close(ctx);</div><div class='ctx'> pools_uninit:</div><div class='ctx'> 	hws_context_pools_uninit(ctx);</div><div class='ctx'> uninit_pd:</div><div class='hunk'>@@ -184,6 +180,7 @@ static void hws_context_uninit_hws(struct mlx5hws_context *ctx)</div><div class='ctx'> 	if (!(ctx-&gt;flags &amp; MLX5HWS_CONTEXT_FLAG_HWS_SUPPORT))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	mlx5hws_action_ste_pool_uninit(ctx);</div><div class='ctx'> 	mlx5hws_send_queues_close(ctx);</div><div class='ctx'> 	hws_context_pools_uninit(ctx);</div><div class='ctx'> 	hws_context_uninit_pd(ctx);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_context.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h<br/>index 8ab548aa402b..3f8938c73dc0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_context.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_context.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h</a></div><div class='hunk'>@@ -1,13 +1,14 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#ifndef MLX5HWS_CONTEXT_H_</div><div class='del'>-#define MLX5HWS_CONTEXT_H_</div><div class='add'>+#ifndef HWS_CONTEXT_H_</div><div class='add'>+#define HWS_CONTEXT_H_</div><div class='ctx'> </div><div class='ctx'> enum mlx5hws_context_flags {</div><div class='ctx'> 	MLX5HWS_CONTEXT_FLAG_HWS_SUPPORT = 1 &lt;&lt; 0,</div><div class='ctx'> 	MLX5HWS_CONTEXT_FLAG_PRIVATE_PD = 1 &lt;&lt; 1,</div><div class='ctx'> 	MLX5HWS_CONTEXT_FLAG_BWC_SUPPORT = 1 &lt;&lt; 2,</div><div class='add'>+	MLX5HWS_CONTEXT_FLAG_NATIVE_SUPPORT = 1 &lt;&lt; 3,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum mlx5hws_context_shared_stc_type {</div><div class='hunk'>@@ -37,8 +38,10 @@ struct mlx5hws_context {</div><div class='ctx'> 	struct mlx5_core_dev *mdev;</div><div class='ctx'> 	struct mlx5hws_cmd_query_caps *caps;</div><div class='ctx'> 	u32 pd_num;</div><div class='del'>-	struct mlx5hws_pool *stc_pool[MLX5HWS_TABLE_TYPE_MAX];</div><div class='del'>-	struct mlx5hws_context_common_res common_res[MLX5HWS_TABLE_TYPE_MAX];</div><div class='add'>+	struct mlx5hws_pool *stc_pool;</div><div class='add'>+	struct mlx5hws_action_ste_pool *action_ste_pool; /* One per queue */</div><div class='add'>+	struct delayed_work action_ste_cleanup;</div><div class='add'>+	struct mlx5hws_context_common_res common_res;</div><div class='ctx'> 	struct mlx5hws_pattern_cache *pattern_cache;</div><div class='ctx'> 	struct mlx5hws_definer_cache *definer_cache;</div><div class='ctx'> 	struct mutex ctrl_lock; /* control lock to protect the whole context */</div><div class='hunk'>@@ -58,8 +61,13 @@ static inline bool mlx5hws_context_bwc_supported(struct mlx5hws_context *ctx)</div><div class='ctx'> 	return ctx-&gt;flags &amp; MLX5HWS_CONTEXT_FLAG_BWC_SUPPORT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool mlx5hws_context_native_supported(struct mlx5hws_context *ctx)</div><div class='add'>+{</div><div class='add'>+	return ctx-&gt;flags &amp; MLX5HWS_CONTEXT_FLAG_NATIVE_SUPPORT;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> bool mlx5hws_context_cap_dynamic_reparse(struct mlx5hws_context *ctx);</div><div class='ctx'> </div><div class='ctx'> u8 mlx5hws_context_get_reparse_mode(struct mlx5hws_context *ctx);</div><div class='ctx'> </div><div class='del'>-#endif /* MLX5HWS_CONTEXT_H_ */</div><div class='add'>+#endif /* HWS_CONTEXT_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_debug.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c<br/>index 2b8c5a4e1c4c..2ec8cb10139a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_debug.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_debug.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='ctx'> #include &lt;linux/version.h&gt;</div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> hws_debug_dump_matcher_template_definer(struct seq_file *f,</div><div class='hunk'>@@ -99,17 +99,19 @@ hws_debug_dump_matcher_attr(struct seq_file *f, struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_matcher_attr *attr = &amp;matcher-&gt;attr;</div><div class='ctx'> </div><div class='del'>-	seq_printf(f, "%d,0x%llx,%d,%d,%d,%d,%d,%d,%d,%d\n",</div><div class='add'>+	seq_printf(f, "%d,0x%llx,%d,%d,%d,%d,%d,%d,%d,%d,-1,-1,%d,%d\n",</div><div class='ctx'> 		   MLX5HWS_DEBUG_RES_TYPE_MATCHER_ATTR,</div><div class='ctx'> 		   HWS_PTR_TO_ID(matcher),</div><div class='ctx'> 		   attr-&gt;priority,</div><div class='ctx'> 		   attr-&gt;mode,</div><div class='del'>-		   attr-&gt;table.sz_row_log,</div><div class='del'>-		   attr-&gt;table.sz_col_log,</div><div class='add'>+		   attr-&gt;size[MLX5HWS_MATCHER_SIZE_TYPE_RX].table.sz_row_log,</div><div class='add'>+		   attr-&gt;size[MLX5HWS_MATCHER_SIZE_TYPE_RX].table.sz_col_log,</div><div class='ctx'> 		   attr-&gt;optimize_using_rule_idx,</div><div class='ctx'> 		   attr-&gt;optimize_flow_src,</div><div class='ctx'> 		   attr-&gt;insert_mode,</div><div class='del'>-		   attr-&gt;distribute_mode);</div><div class='add'>+		   attr-&gt;distribute_mode,</div><div class='add'>+		   attr-&gt;size[MLX5HWS_MATCHER_SIZE_TYPE_TX].table.sz_row_log,</div><div class='add'>+		   attr-&gt;size[MLX5HWS_MATCHER_SIZE_TYPE_TX].table.sz_col_log);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -118,8 +120,6 @@ static int hws_debug_dump_matcher(struct seq_file *f, struct mlx5hws_matcher *ma</div><div class='ctx'> {</div><div class='ctx'> 	enum mlx5hws_table_type tbl_type = matcher-&gt;tbl-&gt;type;</div><div class='ctx'> 	struct mlx5hws_cmd_ft_query_attr ft_attr = {0};</div><div class='del'>-	struct mlx5hws_pool_chunk *ste;</div><div class='del'>-	struct mlx5hws_pool *ste_pool;</div><div class='ctx'> 	u64 icm_addr_0 = 0;</div><div class='ctx'> 	u64 icm_addr_1 = 0;</div><div class='ctx'> 	u32 ste_0_id = -1;</div><div class='hunk'>@@ -134,13 +134,9 @@ static int hws_debug_dump_matcher(struct seq_file *f, struct mlx5hws_matcher *ma</div><div class='ctx'> 		   matcher-&gt;end_ft_id,</div><div class='ctx'> 		   matcher-&gt;col_matcher ? HWS_PTR_TO_ID(matcher-&gt;col_matcher) : 0);</div><div class='ctx'> </div><div class='del'>-	ste = &amp;matcher-&gt;match_ste.ste;</div><div class='del'>-	ste_pool = matcher-&gt;match_ste.pool;</div><div class='del'>-	if (ste_pool) {</div><div class='del'>-		ste_0_id = mlx5hws_pool_chunk_get_base_id(ste_pool, ste);</div><div class='del'>-		if (tbl_type == MLX5HWS_TABLE_TYPE_FDB)</div><div class='del'>-			ste_1_id = mlx5hws_pool_chunk_get_base_mirror_id(ste_pool, ste);</div><div class='del'>-	}</div><div class='add'>+	ste_0_id = matcher-&gt;match_ste.ste_0_base;</div><div class='add'>+	if (tbl_type == MLX5HWS_TABLE_TYPE_FDB)</div><div class='add'>+		ste_1_id = matcher-&gt;match_ste.ste_1_base;</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(f, ",%d,%d,%d,%d",</div><div class='ctx'> 		   matcher-&gt;match_ste.rtc_0_id,</div><div class='hunk'>@@ -148,19 +144,6 @@ static int hws_debug_dump_matcher(struct seq_file *f, struct mlx5hws_matcher *ma</div><div class='ctx'> 		   matcher-&gt;match_ste.rtc_1_id,</div><div class='ctx'> 		   (int)ste_1_id);</div><div class='ctx'> </div><div class='del'>-	ste = &amp;matcher-&gt;action_ste[0].ste;</div><div class='del'>-	ste_pool = matcher-&gt;action_ste[0].pool;</div><div class='del'>-	if (ste_pool) {</div><div class='del'>-		ste_0_id = mlx5hws_pool_chunk_get_base_id(ste_pool, ste);</div><div class='del'>-		if (tbl_type == MLX5HWS_TABLE_TYPE_FDB)</div><div class='del'>-			ste_1_id = mlx5hws_pool_chunk_get_base_mirror_id(ste_pool, ste);</div><div class='del'>-		else</div><div class='del'>-			ste_1_id = -1;</div><div class='del'>-	} else {</div><div class='del'>-		ste_0_id = -1;</div><div class='del'>-		ste_1_id = -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ft_attr.type = matcher-&gt;tbl-&gt;fw_ft_type;</div><div class='ctx'> 	ret = mlx5hws_cmd_flow_table_query(matcher-&gt;tbl-&gt;ctx-&gt;mdev,</div><div class='ctx'> 					   matcher-&gt;end_ft_id,</div><div class='hunk'>@@ -170,12 +153,7 @@ static int hws_debug_dump_matcher(struct seq_file *f, struct mlx5hws_matcher *ma</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	seq_printf(f, ",%d,%d,%d,%d,%d,0x%llx,0x%llx\n",</div><div class='del'>-		   matcher-&gt;action_ste[0].rtc_0_id,</div><div class='del'>-		   (int)ste_0_id,</div><div class='del'>-		   matcher-&gt;action_ste[0].rtc_1_id,</div><div class='del'>-		   (int)ste_1_id,</div><div class='del'>-		   0,</div><div class='add'>+	seq_printf(f, ",-1,-1,-1,-1,0,0x%llx,0x%llx\n",</div><div class='ctx'> 		   mlx5hws_debug_icm_to_idx(icm_addr_0),</div><div class='ctx'> 		   mlx5hws_debug_icm_to_idx(icm_addr_1));</div><div class='ctx'> </div><div class='hunk'>@@ -368,9 +346,10 @@ static int hws_debug_dump_context_info(struct seq_file *f, struct mlx5hws_contex</div><div class='ctx'> </div><div class='ctx'> static int hws_debug_dump_context_stc_resource(struct seq_file *f,</div><div class='ctx'> 					       struct mlx5hws_context *ctx,</div><div class='del'>-					       u32 tbl_type,</div><div class='ctx'> 					       struct mlx5hws_pool_resource *resource)</div><div class='ctx'> {</div><div class='add'>+	u32 tbl_type = MLX5HWS_TABLE_TYPE_BASE + MLX5HWS_TABLE_TYPE_FDB;</div><div class='add'>+</div><div class='ctx'> 	seq_printf(f, "%d,0x%llx,%u,%u\n",</div><div class='ctx'> 		   MLX5HWS_DEBUG_RES_TYPE_CONTEXT_STC,</div><div class='ctx'> 		   HWS_PTR_TO_ID(ctx),</div><div class='hunk'>@@ -382,40 +361,65 @@ static int hws_debug_dump_context_stc_resource(struct seq_file *f,</div><div class='ctx'> </div><div class='ctx'> static int hws_debug_dump_context_stc(struct seq_file *f, struct mlx5hws_context *ctx)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5hws_pool *stc_pool;</div><div class='del'>-	u32 table_type;</div><div class='add'>+	struct mlx5hws_pool *stc_pool = ctx-&gt;stc_pool;</div><div class='ctx'> 	int ret;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MLX5HWS_TABLE_TYPE_MAX; i++) {</div><div class='del'>-		stc_pool = ctx-&gt;stc_pool[i];</div><div class='del'>-		table_type = MLX5HWS_TABLE_TYPE_BASE + i;</div><div class='add'>+	if (!stc_pool)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-		if (!stc_pool)</div><div class='del'>-			continue;</div><div class='add'>+	if (stc_pool-&gt;resource) {</div><div class='add'>+		ret = hws_debug_dump_context_stc_resource(f, ctx,</div><div class='add'>+							  stc_pool-&gt;resource);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (stc_pool-&gt;resource[0]) {</div><div class='del'>-			ret = hws_debug_dump_context_stc_resource(f, ctx, table_type,</div><div class='del'>-								  stc_pool-&gt;resource[0]);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='add'>+	if (stc_pool-&gt;mirror_resource) {</div><div class='add'>+		struct mlx5hws_pool_resource *res = stc_pool-&gt;mirror_resource;</div><div class='ctx'> </div><div class='del'>-		if (i == MLX5HWS_TABLE_TYPE_FDB &amp;&amp; stc_pool-&gt;mirror_resource[0]) {</div><div class='del'>-			ret = hws_debug_dump_context_stc_resource(f, ctx, table_type,</div><div class='del'>-								  stc_pool-&gt;mirror_resource[0]);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='add'>+		ret = hws_debug_dump_context_stc_resource(f, ctx, res);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+hws_debug_dump_action_ste_table(struct seq_file *f,</div><div class='add'>+				struct mlx5hws_action_ste_table *action_tbl)</div><div class='add'>+{</div><div class='add'>+	int ste_0_id = mlx5hws_pool_get_base_id(action_tbl-&gt;pool);</div><div class='add'>+	int ste_1_id = mlx5hws_pool_get_base_mirror_id(action_tbl-&gt;pool);</div><div class='add'>+</div><div class='add'>+	seq_printf(f, "%d,0x%llx,%d,%d,%d,%d\n",</div><div class='add'>+		   MLX5HWS_DEBUG_RES_TYPE_ACTION_STE_TABLE,</div><div class='add'>+		   HWS_PTR_TO_ID(action_tbl),</div><div class='add'>+		   action_tbl-&gt;rtc_0_id, ste_0_id,</div><div class='add'>+		   action_tbl-&gt;rtc_1_id, ste_1_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_debug_dump_action_ste_pool(struct seq_file *f,</div><div class='add'>+					   struct mlx5hws_action_ste_pool *pool)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_ste_table *action_tbl;</div><div class='add'>+	enum mlx5hws_pool_optimize opt;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pool-&gt;lock);</div><div class='add'>+	for (opt = MLX5HWS_POOL_OPTIMIZE_NONE; opt &lt; MLX5HWS_POOL_OPTIMIZE_MAX;</div><div class='add'>+	     opt++) {</div><div class='add'>+		list_for_each_entry(action_tbl, &amp;pool-&gt;elems[opt].available,</div><div class='add'>+				    list_node) {</div><div class='add'>+			hws_debug_dump_action_ste_table(f, action_tbl);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;pool-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hws_debug_dump_context(struct seq_file *f, struct mlx5hws_context *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_table *tbl;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	ret = hws_debug_dump_context_info(f, ctx);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -435,6 +439,9 @@ static int hws_debug_dump_context(struct seq_file *f, struct mlx5hws_context *ct</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; ctx-&gt;queues; i++)</div><div class='add'>+		hws_debug_dump_action_ste_pool(f, &amp;ctx-&gt;action_ste_pool[i]);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_debug.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.h<br/>index b93a536035d9..89c396f9f266 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_debug.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_debug.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#ifndef MLX5HWS_DEBUG_H_</div><div class='del'>-#define MLX5HWS_DEBUG_H_</div><div class='add'>+#ifndef HWS_DEBUG_H_</div><div class='add'>+#define HWS_DEBUG_H_</div><div class='ctx'> </div><div class='ctx'> #define HWS_DEBUG_FORMAT_VERSION "1.0"</div><div class='ctx'> </div><div class='hunk'>@@ -26,6 +26,8 @@ enum mlx5hws_debug_res_type {</div><div class='ctx'> 	MLX5HWS_DEBUG_RES_TYPE_MATCHER_TEMPLATE_HASH_DEFINER = 4205,</div><div class='ctx'> 	MLX5HWS_DEBUG_RES_TYPE_MATCHER_TEMPLATE_RANGE_DEFINER = 4206,</div><div class='ctx'> 	MLX5HWS_DEBUG_RES_TYPE_MATCHER_TEMPLATE_COMPARE_MATCH_DEFINER = 4207,</div><div class='add'>+</div><div class='add'>+	MLX5HWS_DEBUG_RES_TYPE_ACTION_STE_TABLE = 4300,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline u64</div><div class='hunk'>@@ -37,4 +39,4 @@ mlx5hws_debug_icm_to_idx(u64 icm_addr)</div><div class='ctx'> void mlx5hws_debug_init_dump(struct mlx5hws_context *ctx);</div><div class='ctx'> void mlx5hws_debug_uninit_dump(struct mlx5hws_context *ctx);</div><div class='ctx'> </div><div class='del'>-#endif /* MLX5HWS_DEBUG_H_ */</div><div class='add'>+#endif /* HWS_DEBUG_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_definer.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c<br/>index 3f4c58bada37..82fd122d4284 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_definer.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_definer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> /* Pattern tunnel Layer bits. */</div><div class='ctx'> #define MLX5_FLOW_LAYER_VXLAN      BIT(12)</div><div class='hunk'>@@ -70,7 +70,7 @@</div><div class='ctx'> 			u32 second_dw_mask = (mask) &amp; ((1 &lt;&lt; _bit_off) - 1); \</div><div class='ctx'> 			_HWS_SET32(p, (v) &gt;&gt; _bit_off, byte_off, 0, (mask) &gt;&gt; _bit_off); \</div><div class='ctx'> 			_HWS_SET32(p, (v) &amp; second_dw_mask, (byte_off) + DW_SIZE, \</div><div class='del'>-				    (bit_off) % BITS_IN_DW, second_dw_mask); \</div><div class='add'>+				    (bit_off + BITS_IN_DW) % BITS_IN_DW, second_dw_mask); \</div><div class='ctx'> 		} else { \</div><div class='ctx'> 			_HWS_SET32(p, v, byte_off, (bit_off), (mask)); \</div><div class='ctx'> 		} \</div><div class='hunk'>@@ -158,6 +158,218 @@ struct mlx5hws_definer_conv_data {</div><div class='ctx'> 	u32 match_flags;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define HWS_DEFINER_ENTRY(name)[MLX5HWS_DEFINER_FNAME_##name] = #name</div><div class='add'>+</div><div class='add'>+static const char * const hws_definer_fname_to_str[] = {</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_SMAC_47_16_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_SMAC_47_16_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_SMAC_15_0_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_SMAC_15_0_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_DMAC_47_16_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_DMAC_47_16_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_DMAC_15_0_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_DMAC_15_0_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_TYPE_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_TYPE_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_L3_TYPE_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(ETH_L3_TYPE_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_TYPE_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_TYPE_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_FIRST_PRIO_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_FIRST_PRIO_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_CFI_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_CFI_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_ID_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_ID_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_SECOND_TYPE_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_SECOND_TYPE_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_SECOND_PRIO_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_SECOND_PRIO_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_SECOND_CFI_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_SECOND_CFI_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_SECOND_ID_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(VLAN_SECOND_ID_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV4_IHL_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV4_IHL_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_DSCP_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_DSCP_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_ECN_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_ECN_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_TTL_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_TTL_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV4_DST_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV4_DST_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV4_SRC_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV4_SRC_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_VERSION_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_VERSION_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_FRAG_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_FRAG_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_LEN_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_LEN_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_TOS_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_TOS_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_FLOW_LABEL_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_FLOW_LABEL_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_DST_127_96_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_DST_95_64_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_DST_63_32_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_DST_31_0_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_DST_127_96_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_DST_95_64_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_DST_63_32_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_DST_31_0_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_SRC_127_96_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_SRC_95_64_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_SRC_63_32_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_SRC_31_0_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_SRC_127_96_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_SRC_95_64_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_SRC_63_32_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPV6_SRC_31_0_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_PROTOCOL_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(IP_PROTOCOL_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(L4_SPORT_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(L4_SPORT_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(L4_DPORT_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(L4_DPORT_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(TCP_FLAGS_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(TCP_FLAGS_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(TCP_SEQ_NUM),</div><div class='add'>+	HWS_DEFINER_ENTRY(TCP_ACK_NUM),</div><div class='add'>+	HWS_DEFINER_ENTRY(GTP_TEID),</div><div class='add'>+	HWS_DEFINER_ENTRY(GTP_MSG_TYPE),</div><div class='add'>+	HWS_DEFINER_ENTRY(GTP_EXT_FLAG),</div><div class='add'>+	HWS_DEFINER_ENTRY(GTP_NEXT_EXT_HDR),</div><div class='add'>+	HWS_DEFINER_ENTRY(GTP_EXT_HDR_PDU),</div><div class='add'>+	HWS_DEFINER_ENTRY(GTP_EXT_HDR_QFI),</div><div class='add'>+	HWS_DEFINER_ENTRY(GTPU_DW0),</div><div class='add'>+	HWS_DEFINER_ENTRY(GTPU_FIRST_EXT_DW0),</div><div class='add'>+	HWS_DEFINER_ENTRY(GTPU_DW2),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER_0),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER_1),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER_2),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER_3),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER_4),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER_5),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER_6),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER_7),</div><div class='add'>+	HWS_DEFINER_ENTRY(VPORT_REG_C_0),</div><div class='add'>+	HWS_DEFINER_ENTRY(VXLAN_FLAGS),</div><div class='add'>+	HWS_DEFINER_ENTRY(VXLAN_VNI),</div><div class='add'>+	HWS_DEFINER_ENTRY(VXLAN_GPE_FLAGS),</div><div class='add'>+	HWS_DEFINER_ENTRY(VXLAN_GPE_RSVD0),</div><div class='add'>+	HWS_DEFINER_ENTRY(VXLAN_GPE_PROTO),</div><div class='add'>+	HWS_DEFINER_ENTRY(VXLAN_GPE_VNI),</div><div class='add'>+	HWS_DEFINER_ENTRY(VXLAN_GPE_RSVD1),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_LEN),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OAM),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_PROTO),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_VNI),</div><div class='add'>+	HWS_DEFINER_ENTRY(SOURCE_QP),</div><div class='add'>+	HWS_DEFINER_ENTRY(SOURCE_GVMI),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_0),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_1),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_2),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_3),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_4),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_5),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_6),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_7),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_8),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_9),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_10),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_11),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_A),</div><div class='add'>+	HWS_DEFINER_ENTRY(REG_B),</div><div class='add'>+	HWS_DEFINER_ENTRY(GRE_KEY_PRESENT),</div><div class='add'>+	HWS_DEFINER_ENTRY(GRE_C),</div><div class='add'>+	HWS_DEFINER_ENTRY(GRE_K),</div><div class='add'>+	HWS_DEFINER_ENTRY(GRE_S),</div><div class='add'>+	HWS_DEFINER_ENTRY(GRE_PROTOCOL),</div><div class='add'>+	HWS_DEFINER_ENTRY(GRE_OPT_KEY),</div><div class='add'>+	HWS_DEFINER_ENTRY(GRE_OPT_SEQ),</div><div class='add'>+	HWS_DEFINER_ENTRY(GRE_OPT_CHECKSUM),</div><div class='add'>+	HWS_DEFINER_ENTRY(INTEGRITY_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(INTEGRITY_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(ICMP_DW1),</div><div class='add'>+	HWS_DEFINER_ENTRY(ICMP_DW2),</div><div class='add'>+	HWS_DEFINER_ENTRY(ICMP_DW3),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPSEC_SPI),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPSEC_SEQUENCE_NUMBER),</div><div class='add'>+	HWS_DEFINER_ENTRY(IPSEC_SYNDROME),</div><div class='add'>+	HWS_DEFINER_ENTRY(MPLS0_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(MPLS1_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(MPLS2_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(MPLS3_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(MPLS4_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(MPLS0_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(MPLS1_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(MPLS2_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(MPLS3_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(MPLS4_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER0_OK),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER1_OK),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER2_OK),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER3_OK),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER4_OK),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER5_OK),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER6_OK),</div><div class='add'>+	HWS_DEFINER_ENTRY(FLEX_PARSER7_OK),</div><div class='add'>+	HWS_DEFINER_ENTRY(OKS2_MPLS0_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(OKS2_MPLS1_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(OKS2_MPLS2_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(OKS2_MPLS3_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(OKS2_MPLS4_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(OKS2_MPLS0_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(OKS2_MPLS1_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(OKS2_MPLS2_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(OKS2_MPLS3_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(OKS2_MPLS4_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_OK_0),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_OK_1),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_OK_2),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_OK_3),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_OK_4),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_OK_5),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_OK_6),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_OK_7),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_DW_0),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_DW_1),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_DW_2),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_DW_3),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_DW_4),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_DW_5),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_DW_6),</div><div class='add'>+	HWS_DEFINER_ENTRY(GENEVE_OPT_DW_7),</div><div class='add'>+	HWS_DEFINER_ENTRY(IB_L4_OPCODE),</div><div class='add'>+	HWS_DEFINER_ENTRY(IB_L4_QPN),</div><div class='add'>+	HWS_DEFINER_ENTRY(IB_L4_A),</div><div class='add'>+	HWS_DEFINER_ENTRY(RANDOM_NUM),</div><div class='add'>+	HWS_DEFINER_ENTRY(PTYPE_L2_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(PTYPE_L2_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(PTYPE_L3_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(PTYPE_L3_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(PTYPE_L4_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(PTYPE_L4_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(PTYPE_L4_EXT_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(PTYPE_L4_EXT_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(PTYPE_FRAG_O),</div><div class='add'>+	HWS_DEFINER_ENTRY(PTYPE_FRAG_I),</div><div class='add'>+	HWS_DEFINER_ENTRY(TNL_HDR_0),</div><div class='add'>+	HWS_DEFINER_ENTRY(TNL_HDR_1),</div><div class='add'>+	HWS_DEFINER_ENTRY(TNL_HDR_2),</div><div class='add'>+	HWS_DEFINER_ENTRY(TNL_HDR_3),</div><div class='add'>+	[MLX5HWS_DEFINER_FNAME_MAX] = "DEFINER_FNAME_UNKNOWN",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const char *mlx5hws_definer_fname_to_str(enum mlx5hws_definer_fname fname)</div><div class='add'>+{</div><div class='add'>+	if (fname &gt; MLX5HWS_DEFINER_FNAME_MAX)</div><div class='add'>+		fname = MLX5HWS_DEFINER_FNAME_MAX;</div><div class='add'>+	return hws_definer_fname_to_str[fname];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> hws_definer_ones_set(struct mlx5hws_definer_fc *fc,</div><div class='ctx'> 		     void *match_param,</div><div class='hunk'>@@ -500,7 +712,8 @@ hws_definer_check_match_flags(struct mlx5hws_definer_conv_data *cd)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_conflict:</div><div class='del'>-	mlx5hws_err(cd-&gt;ctx, "Invalid definer fields combination\n");</div><div class='add'>+	mlx5hws_err(cd-&gt;ctx, "Invalid definer fields combination: match_flags = 0x%08x\n",</div><div class='add'>+		    cd-&gt;match_flags);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -508,18 +721,33 @@ static int</div><div class='ctx'> hws_definer_conv_outer(struct mlx5hws_definer_conv_data *cd,</div><div class='ctx'> 		       u32 *match_param)</div><div class='ctx'> {</div><div class='del'>-	bool is_s_ipv6, is_d_ipv6, smac_set, dmac_set;</div><div class='add'>+	bool is_ipv6, smac_set, dmac_set, ip_addr_set, ip_ver_set;</div><div class='ctx'> 	struct mlx5hws_definer_fc *fc = cd-&gt;fc;</div><div class='ctx'> 	struct mlx5hws_definer_fc *curr_fc;</div><div class='ctx'> 	u32 *s_ipv6, *d_ipv6;</div><div class='ctx'> </div><div class='ctx'> 	if (HWS_IS_FLD_SET_SZ(match_param, outer_headers.l4_type, 0x2) ||</div><div class='del'>-	    HWS_IS_FLD_SET_SZ(match_param, outer_headers.reserved_at_c2, 0xe) ||</div><div class='del'>-	    HWS_IS_FLD_SET_SZ(match_param, outer_headers.reserved_at_c4, 0x4)) {</div><div class='add'>+	    HWS_IS_FLD_SET_SZ(match_param, outer_headers.l4_type_ext, 0x4) ||</div><div class='add'>+	    HWS_IS_FLD_SET_SZ(match_param, outer_headers.reserved_at_c6, 0xa) ||</div><div class='add'>+	    HWS_IS_FLD_SET_SZ(match_param, outer_headers.reserved_at_d4, 0x4)) {</div><div class='ctx'> 		mlx5hws_err(cd-&gt;ctx, "Unsupported outer parameters set\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ip_addr_set = HWS_IS_FLD_SET_SZ(match_param,</div><div class='add'>+					outer_headers.src_ipv4_src_ipv6,</div><div class='add'>+					0x80) ||</div><div class='add'>+		      HWS_IS_FLD_SET_SZ(match_param,</div><div class='add'>+					outer_headers.dst_ipv4_dst_ipv6, 0x80);</div><div class='add'>+	ip_ver_set = HWS_IS_FLD_SET(match_param, outer_headers.ip_version) ||</div><div class='add'>+		     HWS_IS_FLD_SET(match_param, outer_headers.ethertype);</div><div class='add'>+</div><div class='add'>+	if (ip_addr_set &amp;&amp; !ip_ver_set) {</div><div class='add'>+		mlx5hws_err(cd-&gt;ctx,</div><div class='add'>+			    "Unsupported match on IP address without version or ethertype\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* L2 Check ethertype */</div><div class='ctx'> 	HWS_SET_HDR(fc, match_param, ETH_TYPE_O,</div><div class='ctx'> 		    outer_headers.ethertype,</div><div class='hunk'>@@ -558,6 +786,9 @@ hws_definer_conv_outer(struct mlx5hws_definer_conv_data *cd,</div><div class='ctx'> 	HWS_SET_HDR(fc, match_param, IP_PROTOCOL_O,</div><div class='ctx'> 		    outer_headers.ip_protocol,</div><div class='ctx'> 		    eth_l3_outer.protocol_next_header);</div><div class='add'>+	HWS_SET_HDR(fc, match_param, IP_VERSION_O,</div><div class='add'>+		    outer_headers.ip_version,</div><div class='add'>+		    eth_l3_outer.ip_version);</div><div class='ctx'> 	HWS_SET_HDR(fc, match_param, IP_TTL_O,</div><div class='ctx'> 		    outer_headers.ttl_hoplimit,</div><div class='ctx'> 		    eth_l3_outer.time_to_live_hop_limit);</div><div class='hunk'>@@ -569,10 +800,16 @@ hws_definer_conv_outer(struct mlx5hws_definer_conv_data *cd,</div><div class='ctx'> 			      outer_headers.dst_ipv4_dst_ipv6.ipv6_layout);</div><div class='ctx'> </div><div class='ctx'> 	/* Assume IPv6 is used if ipv6 bits are set */</div><div class='del'>-	is_s_ipv6 = s_ipv6[0] || s_ipv6[1] || s_ipv6[2];</div><div class='del'>-	is_d_ipv6 = d_ipv6[0] || d_ipv6[1] || d_ipv6[2];</div><div class='add'>+	is_ipv6 = s_ipv6[0] || s_ipv6[1] || s_ipv6[2] ||</div><div class='add'>+		  d_ipv6[0] || d_ipv6[1] || d_ipv6[2];</div><div class='add'>+</div><div class='add'>+	/* IHL is an IPv4-specific field. */</div><div class='add'>+	if (is_ipv6 &amp;&amp; HWS_IS_FLD_SET(match_param, outer_headers.ipv4_ihl)) {</div><div class='add'>+		mlx5hws_err(cd-&gt;ctx, "Unsupported match on IPv6 address and IPv4 IHL\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (is_s_ipv6) {</div><div class='add'>+	if (is_ipv6) {</div><div class='ctx'> 		/* Handle IPv6 source address */</div><div class='ctx'> 		HWS_SET_HDR(fc, match_param, IPV6_SRC_127_96_O,</div><div class='ctx'> 			    outer_headers.src_ipv4_src_ipv6.ipv6_simple_layout.ipv6_127_96,</div><div class='hunk'>@@ -586,13 +823,6 @@ hws_definer_conv_outer(struct mlx5hws_definer_conv_data *cd,</div><div class='ctx'> 		HWS_SET_HDR(fc, match_param, IPV6_SRC_31_0_O,</div><div class='ctx'> 			    outer_headers.src_ipv4_src_ipv6.ipv6_simple_layout.ipv6_31_0,</div><div class='ctx'> 			    ipv6_src_outer.ipv6_address_31_0);</div><div class='del'>-	} else {</div><div class='del'>-		/* Handle IPv4 source address */</div><div class='del'>-		HWS_SET_HDR(fc, match_param, IPV4_SRC_O,</div><div class='del'>-			    outer_headers.src_ipv4_src_ipv6.ipv6_simple_layout.ipv6_31_0,</div><div class='del'>-			    ipv4_src_dest_outer.source_address);</div><div class='del'>-	}</div><div class='del'>-	if (is_d_ipv6) {</div><div class='ctx'> 		/* Handle IPv6 destination address */</div><div class='ctx'> 		HWS_SET_HDR(fc, match_param, IPV6_DST_127_96_O,</div><div class='ctx'> 			    outer_headers.dst_ipv4_dst_ipv6.ipv6_simple_layout.ipv6_127_96,</div><div class='hunk'>@@ -607,6 +837,10 @@ hws_definer_conv_outer(struct mlx5hws_definer_conv_data *cd,</div><div class='ctx'> 			    outer_headers.dst_ipv4_dst_ipv6.ipv6_simple_layout.ipv6_31_0,</div><div class='ctx'> 			    ipv6_dst_outer.ipv6_address_31_0);</div><div class='ctx'> 	} else {</div><div class='add'>+		/* Handle IPv4 source address */</div><div class='add'>+		HWS_SET_HDR(fc, match_param, IPV4_SRC_O,</div><div class='add'>+			    outer_headers.src_ipv4_src_ipv6.ipv6_simple_layout.ipv6_31_0,</div><div class='add'>+			    ipv4_src_dest_outer.source_address);</div><div class='ctx'> 		/* Handle IPv4 destination address */</div><div class='ctx'> 		HWS_SET_HDR(fc, match_param, IPV4_DST_O,</div><div class='ctx'> 			    outer_headers.dst_ipv4_dst_ipv6.ipv6_simple_layout.ipv6_31_0,</div><div class='hunk'>@@ -664,18 +898,33 @@ static int</div><div class='ctx'> hws_definer_conv_inner(struct mlx5hws_definer_conv_data *cd,</div><div class='ctx'> 		       u32 *match_param)</div><div class='ctx'> {</div><div class='del'>-	bool is_s_ipv6, is_d_ipv6, smac_set, dmac_set;</div><div class='add'>+	bool is_ipv6, smac_set, dmac_set, ip_addr_set, ip_ver_set;</div><div class='ctx'> 	struct mlx5hws_definer_fc *fc = cd-&gt;fc;</div><div class='ctx'> 	struct mlx5hws_definer_fc *curr_fc;</div><div class='ctx'> 	u32 *s_ipv6, *d_ipv6;</div><div class='ctx'> </div><div class='ctx'> 	if (HWS_IS_FLD_SET_SZ(match_param, inner_headers.l4_type, 0x2) ||</div><div class='del'>-	    HWS_IS_FLD_SET_SZ(match_param, inner_headers.reserved_at_c2, 0xe) ||</div><div class='del'>-	    HWS_IS_FLD_SET_SZ(match_param, inner_headers.reserved_at_c4, 0x4)) {</div><div class='add'>+	    HWS_IS_FLD_SET_SZ(match_param, inner_headers.l4_type_ext, 0x4) ||</div><div class='add'>+	    HWS_IS_FLD_SET_SZ(match_param, inner_headers.reserved_at_c6, 0xa) ||</div><div class='add'>+	    HWS_IS_FLD_SET_SZ(match_param, inner_headers.reserved_at_d4, 0x4)) {</div><div class='ctx'> 		mlx5hws_err(cd-&gt;ctx, "Unsupported inner parameters set\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ip_addr_set = HWS_IS_FLD_SET_SZ(match_param,</div><div class='add'>+					inner_headers.src_ipv4_src_ipv6,</div><div class='add'>+					0x80) ||</div><div class='add'>+		      HWS_IS_FLD_SET_SZ(match_param,</div><div class='add'>+					inner_headers.dst_ipv4_dst_ipv6, 0x80);</div><div class='add'>+	ip_ver_set = HWS_IS_FLD_SET(match_param, inner_headers.ip_version) ||</div><div class='add'>+		     HWS_IS_FLD_SET(match_param, inner_headers.ethertype);</div><div class='add'>+</div><div class='add'>+	if (ip_addr_set &amp;&amp; !ip_ver_set) {</div><div class='add'>+		mlx5hws_err(cd-&gt;ctx,</div><div class='add'>+			    "Unsupported match on IP address without version or ethertype\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* L2 Check ethertype */</div><div class='ctx'> 	HWS_SET_HDR(fc, match_param, ETH_TYPE_I,</div><div class='ctx'> 		    inner_headers.ethertype,</div><div class='hunk'>@@ -727,10 +976,16 @@ hws_definer_conv_inner(struct mlx5hws_definer_conv_data *cd,</div><div class='ctx'> 			      inner_headers.dst_ipv4_dst_ipv6.ipv6_layout);</div><div class='ctx'> </div><div class='ctx'> 	/* Assume IPv6 is used if ipv6 bits are set */</div><div class='del'>-	is_s_ipv6 = s_ipv6[0] || s_ipv6[1] || s_ipv6[2];</div><div class='del'>-	is_d_ipv6 = d_ipv6[0] || d_ipv6[1] || d_ipv6[2];</div><div class='add'>+	is_ipv6 = s_ipv6[0] || s_ipv6[1] || s_ipv6[2] ||</div><div class='add'>+		  d_ipv6[0] || d_ipv6[1] || d_ipv6[2];</div><div class='add'>+</div><div class='add'>+	/* IHL is an IPv4-specific field. */</div><div class='add'>+	if (is_ipv6 &amp;&amp; HWS_IS_FLD_SET(match_param, inner_headers.ipv4_ihl)) {</div><div class='add'>+		mlx5hws_err(cd-&gt;ctx, "Unsupported match on IPv6 address and IPv4 IHL\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (is_s_ipv6) {</div><div class='add'>+	if (is_ipv6) {</div><div class='ctx'> 		/* Handle IPv6 source address */</div><div class='ctx'> 		HWS_SET_HDR(fc, match_param, IPV6_SRC_127_96_I,</div><div class='ctx'> 			    inner_headers.src_ipv4_src_ipv6.ipv6_simple_layout.ipv6_127_96,</div><div class='hunk'>@@ -744,13 +999,6 @@ hws_definer_conv_inner(struct mlx5hws_definer_conv_data *cd,</div><div class='ctx'> 		HWS_SET_HDR(fc, match_param, IPV6_SRC_31_0_I,</div><div class='ctx'> 			    inner_headers.src_ipv4_src_ipv6.ipv6_simple_layout.ipv6_31_0,</div><div class='ctx'> 			    ipv6_src_inner.ipv6_address_31_0);</div><div class='del'>-	} else {</div><div class='del'>-		/* Handle IPv4 source address */</div><div class='del'>-		HWS_SET_HDR(fc, match_param, IPV4_SRC_I,</div><div class='del'>-			    inner_headers.src_ipv4_src_ipv6.ipv6_simple_layout.ipv6_31_0,</div><div class='del'>-			    ipv4_src_dest_inner.source_address);</div><div class='del'>-	}</div><div class='del'>-	if (is_d_ipv6) {</div><div class='ctx'> 		/* Handle IPv6 destination address */</div><div class='ctx'> 		HWS_SET_HDR(fc, match_param, IPV6_DST_127_96_I,</div><div class='ctx'> 			    inner_headers.dst_ipv4_dst_ipv6.ipv6_simple_layout.ipv6_127_96,</div><div class='hunk'>@@ -765,6 +1013,10 @@ hws_definer_conv_inner(struct mlx5hws_definer_conv_data *cd,</div><div class='ctx'> 			    inner_headers.dst_ipv4_dst_ipv6.ipv6_simple_layout.ipv6_31_0,</div><div class='ctx'> 			    ipv6_dst_inner.ipv6_address_31_0);</div><div class='ctx'> 	} else {</div><div class='add'>+		/* Handle IPv4 source address */</div><div class='add'>+		HWS_SET_HDR(fc, match_param, IPV4_SRC_I,</div><div class='add'>+			    inner_headers.src_ipv4_src_ipv6.ipv6_simple_layout.ipv6_31_0,</div><div class='add'>+			    ipv4_src_dest_inner.source_address);</div><div class='ctx'> 		/* Handle IPv4 destination address */</div><div class='ctx'> 		HWS_SET_HDR(fc, match_param, IPV4_DST_I,</div><div class='ctx'> 			    inner_headers.dst_ipv4_dst_ipv6.ipv6_simple_layout.ipv6_31_0,</div><div class='hunk'>@@ -1028,8 +1280,9 @@ hws_definer_conv_misc2(struct mlx5hws_definer_conv_data *cd,</div><div class='ctx'> 	struct mlx5hws_definer_fc *fc = cd-&gt;fc;</div><div class='ctx'> 	struct mlx5hws_definer_fc *curr_fc;</div><div class='ctx'> </div><div class='del'>-	if (HWS_IS_FLD_SET_SZ(match_param, misc_parameters_2.reserved_at_1a0, 0x8) ||</div><div class='del'>-	    HWS_IS_FLD_SET_SZ(match_param, misc_parameters_2.reserved_at_1b8, 0x8) ||</div><div class='add'>+	if (HWS_IS_FLD_SET_SZ(match_param, misc_parameters_2.psp_syndrome, 0x8) ||</div><div class='add'>+	    HWS_IS_FLD_SET_SZ(match_param,</div><div class='add'>+			      misc_parameters_2.ipsec_next_header, 0x8) ||</div><div class='ctx'> 	    HWS_IS_FLD_SET_SZ(match_param, misc_parameters_2.reserved_at_1c0, 0x40) ||</div><div class='ctx'> 	    HWS_IS_FLD_SET(match_param, misc_parameters_2.macsec_syndrome) ||</div><div class='ctx'> 	    HWS_IS_FLD_SET(match_param, misc_parameters_2.ipsec_syndrome)) {</div><div class='hunk'>@@ -1578,80 +1831,6 @@ err_free_fc:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct mlx5hws_definer_fc *</div><div class='del'>-mlx5hws_definer_conv_match_params_to_compressed_fc(struct mlx5hws_context *ctx,</div><div class='del'>-						   u8 match_criteria_enable,</div><div class='del'>-						   u32 *match_param,</div><div class='del'>-						   int *fc_sz)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_definer_fc *compressed_fc = NULL;</div><div class='del'>-	struct mlx5hws_definer_conv_data cd = {0};</div><div class='del'>-	struct mlx5hws_definer_fc *fc;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	fc = hws_definer_alloc_fc(ctx, MLX5HWS_DEFINER_FNAME_MAX);</div><div class='del'>-	if (!fc)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	cd.fc = fc;</div><div class='del'>-	cd.ctx = ctx;</div><div class='del'>-</div><div class='del'>-	if (match_criteria_enable &amp; MLX5HWS_DEFINER_MATCH_CRITERIA_OUTER) {</div><div class='del'>-		ret = hws_definer_conv_outer(&amp;cd, match_param);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_free_fc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (match_criteria_enable &amp; MLX5HWS_DEFINER_MATCH_CRITERIA_INNER) {</div><div class='del'>-		ret = hws_definer_conv_inner(&amp;cd, match_param);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_free_fc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (match_criteria_enable &amp; MLX5HWS_DEFINER_MATCH_CRITERIA_MISC) {</div><div class='del'>-		ret = hws_definer_conv_misc(&amp;cd, match_param);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_free_fc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (match_criteria_enable &amp; MLX5HWS_DEFINER_MATCH_CRITERIA_MISC2) {</div><div class='del'>-		ret = hws_definer_conv_misc2(&amp;cd, match_param);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_free_fc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (match_criteria_enable &amp; MLX5HWS_DEFINER_MATCH_CRITERIA_MISC3) {</div><div class='del'>-		ret = hws_definer_conv_misc3(&amp;cd, match_param);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_free_fc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (match_criteria_enable &amp; MLX5HWS_DEFINER_MATCH_CRITERIA_MISC4) {</div><div class='del'>-		ret = hws_definer_conv_misc4(&amp;cd, match_param);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_free_fc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (match_criteria_enable &amp; MLX5HWS_DEFINER_MATCH_CRITERIA_MISC5) {</div><div class='del'>-		ret = hws_definer_conv_misc5(&amp;cd, match_param);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_free_fc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Allocate fc array on mt */</div><div class='del'>-	compressed_fc = hws_definer_alloc_compressed_fc(fc);</div><div class='del'>-	if (!compressed_fc) {</div><div class='del'>-		mlx5hws_err(ctx,</div><div class='del'>-			    "Convert to compressed fc: failed to set field copy to match template\n");</div><div class='del'>-		goto err_free_fc;</div><div class='del'>-	}</div><div class='del'>-	*fc_sz = hws_definer_get_fc_size(fc);</div><div class='del'>-</div><div class='del'>-err_free_fc:</div><div class='del'>-	kfree(fc);</div><div class='del'>-	return compressed_fc;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int</div><div class='ctx'> hws_definer_find_byte_in_tag(struct mlx5hws_definer *definer,</div><div class='ctx'> 			     u32 hl_byte_off,</div><div class='hunk'>@@ -1814,7 +1993,7 @@ hws_definer_copy_sel_ctrl(struct mlx5hws_definer_sel_ctrl *ctrl,</div><div class='ctx'> static int</div><div class='ctx'> hws_definer_find_best_match_fit(struct mlx5hws_context *ctx,</div><div class='ctx'> 				struct mlx5hws_definer *definer,</div><div class='del'>-				u8 *hl)</div><div class='add'>+				u8 *hl, bool allow_jumbo)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_definer_sel_ctrl ctrl = {0};</div><div class='ctx'> 	bool found;</div><div class='hunk'>@@ -1831,6 +2010,9 @@ hws_definer_find_best_match_fit(struct mlx5hws_context *ctx,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!allow_jumbo)</div><div class='add'>+		return -E2BIG;</div><div class='add'>+</div><div class='ctx'> 	/* Try to create a full/limited jumbo definer */</div><div class='ctx'> 	ctrl.allowed_full_dw = ctx-&gt;caps-&gt;full_dw_jumbo_support ? DW_SELECTORS :</div><div class='ctx'> 								  DW_SELECTORS_MATCH;</div><div class='hunk'>@@ -1907,7 +2089,8 @@ int mlx5hws_definer_compare(struct mlx5hws_definer *definer_a,</div><div class='ctx'> int</div><div class='ctx'> mlx5hws_definer_calc_layout(struct mlx5hws_context *ctx,</div><div class='ctx'> 			    struct mlx5hws_match_template *mt,</div><div class='del'>-			    struct mlx5hws_definer *match_definer)</div><div class='add'>+			    struct mlx5hws_definer *match_definer,</div><div class='add'>+			    bool allow_jumbo)</div><div class='ctx'> {</div><div class='ctx'> 	u8 *match_hl;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1929,7 +2112,8 @@ mlx5hws_definer_calc_layout(struct mlx5hws_context *ctx,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Find the match definer layout for header layout match union */</div><div class='del'>-	ret = hws_definer_find_best_match_fit(ctx, match_definer, match_hl);</div><div class='add'>+	ret = hws_definer_find_best_match_fit(ctx, match_definer, match_hl,</div><div class='add'>+					      allow_jumbo);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		if (ret == -E2BIG)</div><div class='ctx'> 			mlx5hws_dbg(ctx,</div><div class='hunk'>@@ -1985,8 +2169,7 @@ int mlx5hws_definer_get_obj(struct mlx5hws_context *ctx,</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* Reuse definer and set LRU (move to be first in the list) */</div><div class='del'>-		list_del_init(&amp;cached_definer-&gt;list_node);</div><div class='del'>-		list_add(&amp;cached_definer-&gt;list_node, &amp;cache-&gt;list_head);</div><div class='add'>+		list_move(&amp;cached_definer-&gt;list_node, &amp;cache-&gt;list_head);</div><div class='ctx'> 		cached_definer-&gt;refcount++;</div><div class='ctx'> 		return cached_definer-&gt;definer.obj_id;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2118,7 +2301,7 @@ int mlx5hws_definer_mt_init(struct mlx5hws_context *ctx,</div><div class='ctx'> 	struct mlx5hws_definer match_layout = {0};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = mlx5hws_definer_calc_layout(ctx, mt, &amp;match_layout);</div><div class='add'>+	ret = mlx5hws_definer_calc_layout(ctx, mt, &amp;match_layout, true);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		mlx5hws_err(ctx, "Failed to calculate matcher definer layout\n");</div><div class='ctx'> 		return ret;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_definer.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h<br/>index 2f6a7df4021c..141f3eb2e307 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_definer.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_definer.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#ifndef MLX5HWS_DEFINER_H_</div><div class='del'>-#define MLX5HWS_DEFINER_H_</div><div class='add'>+#ifndef HWS_DEFINER_H_</div><div class='add'>+#define HWS_DEFINER_H_</div><div class='ctx'> </div><div class='ctx'> /* Max available selecotrs */</div><div class='ctx'> #define DW_SELECTORS 9</div><div class='hunk'>@@ -785,7 +785,7 @@ struct mlx5hws_definer_cache {</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_definer_cache_item {</div><div class='ctx'> 	struct mlx5hws_definer definer;</div><div class='del'>-	u32 refcount;</div><div class='add'>+	u32 refcount; /* protected by context ctrl lock */</div><div class='ctx'> 	struct list_head list_node;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -823,12 +823,9 @@ void mlx5hws_definer_free(struct mlx5hws_context *ctx,</div><div class='ctx'> </div><div class='ctx'> int mlx5hws_definer_calc_layout(struct mlx5hws_context *ctx,</div><div class='ctx'> 				struct mlx5hws_match_template *mt,</div><div class='del'>-				struct mlx5hws_definer *match_definer);</div><div class='add'>+				struct mlx5hws_definer *match_definer,</div><div class='add'>+				bool allow_jumbo);</div><div class='ctx'> </div><div class='del'>-struct mlx5hws_definer_fc *</div><div class='del'>-mlx5hws_definer_conv_match_params_to_compressed_fc(struct mlx5hws_context *ctx,</div><div class='del'>-						   u8 match_criteria_enable,</div><div class='del'>-						   u32 *match_param,</div><div class='del'>-						   int *fc_sz);</div><div class='add'>+const char *mlx5hws_definer_fname_to_str(enum mlx5hws_definer_fname fname);</div><div class='ctx'> </div><div class='del'>-#endif /* MLX5HWS_DEFINER_H_ */</div><div class='add'>+#endif /* HWS_DEFINER_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c<br/>new file mode 100644<br/>index 000000000000..6a4c4cccd643<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c</a></div><div class='hunk'>@@ -0,0 +1,1641 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2025 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mlx5/vport.h&gt;</div><div class='add'>+#include &lt;mlx5_core.h&gt;</div><div class='add'>+#include &lt;fs_core.h&gt;</div><div class='add'>+#include &lt;fs_cmd.h&gt;</div><div class='add'>+#include "fs_hws_pools.h"</div><div class='add'>+#include "mlx5hws.h"</div><div class='add'>+</div><div class='add'>+#define MLX5HWS_CTX_MAX_NUM_OF_QUEUES 16</div><div class='add'>+#define MLX5HWS_CTX_QUEUE_SIZE 256</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_create_action_remove_header_vlan(struct mlx5hws_context *ctx);</div><div class='add'>+static void</div><div class='add'>+mlx5_fs_destroy_pr_pool(struct mlx5_fs_pool *pool, struct xarray *pr_pools,</div><div class='add'>+			unsigned long index);</div><div class='add'>+static void</div><div class='add'>+mlx5_fs_destroy_mh_pool(struct mlx5_fs_pool *pool, struct xarray *mh_pools,</div><div class='add'>+			unsigned long index);</div><div class='add'>+</div><div class='add'>+static int mlx5_fs_init_hws_actions_pool(struct mlx5_core_dev *dev,</div><div class='add'>+					 struct mlx5_fs_hws_context *fs_ctx)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;</div><div class='add'>+	struct mlx5_fs_hws_actions_pool *hws_pool = &amp;fs_ctx-&gt;hws_pool;</div><div class='add'>+	struct mlx5hws_action_reformat_header reformat_hdr = {};</div><div class='add'>+	struct mlx5hws_context *ctx = fs_ctx-&gt;hws_ctx;</div><div class='add'>+	enum mlx5hws_action_type action_type;</div><div class='add'>+	int err = -ENOSPC;</div><div class='add'>+</div><div class='add'>+	hws_pool-&gt;tag_action = mlx5hws_action_create_tag(ctx, flags);</div><div class='add'>+	if (!hws_pool-&gt;tag_action)</div><div class='add'>+		return err;</div><div class='add'>+	hws_pool-&gt;pop_vlan_action = mlx5hws_action_create_pop_vlan(ctx, flags);</div><div class='add'>+	if (!hws_pool-&gt;pop_vlan_action)</div><div class='add'>+		goto destroy_tag;</div><div class='add'>+	hws_pool-&gt;push_vlan_action = mlx5hws_action_create_push_vlan(ctx, flags);</div><div class='add'>+	if (!hws_pool-&gt;push_vlan_action)</div><div class='add'>+		goto destroy_pop_vlan;</div><div class='add'>+	hws_pool-&gt;drop_action = mlx5hws_action_create_dest_drop(ctx, flags);</div><div class='add'>+	if (!hws_pool-&gt;drop_action)</div><div class='add'>+		goto destroy_push_vlan;</div><div class='add'>+	action_type = MLX5HWS_ACTION_TYP_REFORMAT_TNL_L2_TO_L2;</div><div class='add'>+	hws_pool-&gt;decapl2_action =</div><div class='add'>+		mlx5hws_action_create_reformat(ctx, action_type, 1,</div><div class='add'>+					       &amp;reformat_hdr, 0, flags);</div><div class='add'>+	if (!hws_pool-&gt;decapl2_action)</div><div class='add'>+		goto destroy_drop;</div><div class='add'>+	hws_pool-&gt;remove_hdr_vlan_action =</div><div class='add'>+		mlx5_fs_create_action_remove_header_vlan(ctx);</div><div class='add'>+	if (!hws_pool-&gt;remove_hdr_vlan_action)</div><div class='add'>+		goto destroy_decapl2;</div><div class='add'>+	err = mlx5_fs_hws_pr_pool_init(&amp;hws_pool-&gt;insert_hdr_pool, dev, 0,</div><div class='add'>+				       MLX5HWS_ACTION_TYP_INSERT_HEADER);</div><div class='add'>+	if (err)</div><div class='add'>+		goto destroy_remove_hdr;</div><div class='add'>+	err = mlx5_fs_hws_pr_pool_init(&amp;hws_pool-&gt;dl3tnltol2_pool, dev, 0,</div><div class='add'>+				       MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2);</div><div class='add'>+	if (err)</div><div class='add'>+		goto cleanup_insert_hdr;</div><div class='add'>+	xa_init(&amp;hws_pool-&gt;el2tol3tnl_pools);</div><div class='add'>+	xa_init(&amp;hws_pool-&gt;el2tol2tnl_pools);</div><div class='add'>+	xa_init(&amp;hws_pool-&gt;mh_pools);</div><div class='add'>+	xa_init(&amp;hws_pool-&gt;table_dests);</div><div class='add'>+	xa_init(&amp;hws_pool-&gt;vport_dests);</div><div class='add'>+	xa_init(&amp;hws_pool-&gt;vport_vhca_dests);</div><div class='add'>+	xa_init(&amp;hws_pool-&gt;aso_meters);</div><div class='add'>+	xa_init(&amp;hws_pool-&gt;sample_dests);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+cleanup_insert_hdr:</div><div class='add'>+	mlx5_fs_hws_pr_pool_cleanup(&amp;hws_pool-&gt;insert_hdr_pool);</div><div class='add'>+destroy_remove_hdr:</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;remove_hdr_vlan_action);</div><div class='add'>+destroy_decapl2:</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;decapl2_action);</div><div class='add'>+destroy_drop:</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;drop_action);</div><div class='add'>+destroy_push_vlan:</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;push_vlan_action);</div><div class='add'>+destroy_pop_vlan:</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;pop_vlan_action);</div><div class='add'>+destroy_tag:</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;tag_action);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_fs_cleanup_hws_actions_pool(struct mlx5_fs_hws_context *fs_ctx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_actions_pool *hws_pool = &amp;fs_ctx-&gt;hws_pool;</div><div class='add'>+	struct mlx5_fs_hws_data *fs_hws_data;</div><div class='add'>+	struct mlx5hws_action *action;</div><div class='add'>+	struct mlx5_fs_pool *pool;</div><div class='add'>+	unsigned long i;</div><div class='add'>+</div><div class='add'>+	xa_for_each(&amp;hws_pool-&gt;sample_dests, i, fs_hws_data)</div><div class='add'>+		kfree(fs_hws_data);</div><div class='add'>+	xa_destroy(&amp;hws_pool-&gt;sample_dests);</div><div class='add'>+	xa_for_each(&amp;hws_pool-&gt;aso_meters, i, fs_hws_data)</div><div class='add'>+		kfree(fs_hws_data);</div><div class='add'>+	xa_destroy(&amp;hws_pool-&gt;aso_meters);</div><div class='add'>+	xa_for_each(&amp;hws_pool-&gt;vport_vhca_dests, i, action)</div><div class='add'>+		mlx5hws_action_destroy(action);</div><div class='add'>+	xa_destroy(&amp;hws_pool-&gt;vport_vhca_dests);</div><div class='add'>+	xa_for_each(&amp;hws_pool-&gt;vport_dests, i, action)</div><div class='add'>+		mlx5hws_action_destroy(action);</div><div class='add'>+	xa_destroy(&amp;hws_pool-&gt;vport_dests);</div><div class='add'>+	xa_destroy(&amp;hws_pool-&gt;table_dests);</div><div class='add'>+	xa_for_each(&amp;hws_pool-&gt;mh_pools, i, pool)</div><div class='add'>+		mlx5_fs_destroy_mh_pool(pool, &amp;hws_pool-&gt;mh_pools, i);</div><div class='add'>+	xa_destroy(&amp;hws_pool-&gt;mh_pools);</div><div class='add'>+	xa_for_each(&amp;hws_pool-&gt;el2tol2tnl_pools, i, pool)</div><div class='add'>+		mlx5_fs_destroy_pr_pool(pool, &amp;hws_pool-&gt;el2tol2tnl_pools, i);</div><div class='add'>+	xa_destroy(&amp;hws_pool-&gt;el2tol2tnl_pools);</div><div class='add'>+	xa_for_each(&amp;hws_pool-&gt;el2tol3tnl_pools, i, pool)</div><div class='add'>+		mlx5_fs_destroy_pr_pool(pool, &amp;hws_pool-&gt;el2tol3tnl_pools, i);</div><div class='add'>+	xa_destroy(&amp;hws_pool-&gt;el2tol3tnl_pools);</div><div class='add'>+	mlx5_fs_hws_pr_pool_cleanup(&amp;hws_pool-&gt;dl3tnltol2_pool);</div><div class='add'>+	mlx5_fs_hws_pr_pool_cleanup(&amp;hws_pool-&gt;insert_hdr_pool);</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;remove_hdr_vlan_action);</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;decapl2_action);</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;drop_action);</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;push_vlan_action);</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;pop_vlan_action);</div><div class='add'>+	mlx5hws_action_destroy(hws_pool-&gt;tag_action);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_create_ns(struct mlx5_flow_root_namespace *ns)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context_attr hws_ctx_attr = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hws_ctx_attr.queues = min_t(int, num_online_cpus(),</div><div class='add'>+				    MLX5HWS_CTX_MAX_NUM_OF_QUEUES);</div><div class='add'>+	hws_ctx_attr.queue_size = MLX5HWS_CTX_QUEUE_SIZE;</div><div class='add'>+</div><div class='add'>+	ns-&gt;fs_hws_context.hws_ctx =</div><div class='add'>+		mlx5hws_context_open(ns-&gt;dev, &amp;hws_ctx_attr);</div><div class='add'>+	if (!ns-&gt;fs_hws_context.hws_ctx) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed to create hws flow namespace\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	err = mlx5_fs_init_hws_actions_pool(ns-&gt;dev, &amp;ns-&gt;fs_hws_context);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed to init hws actions pool\n");</div><div class='add'>+		mlx5hws_context_close(ns-&gt;fs_hws_context.hws_ctx);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_destroy_ns(struct mlx5_flow_root_namespace *ns)</div><div class='add'>+{</div><div class='add'>+	mlx5_fs_cleanup_hws_actions_pool(&amp;ns-&gt;fs_hws_context);</div><div class='add'>+	return mlx5hws_context_close(ns-&gt;fs_hws_context.hws_ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_set_peer(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+				 struct mlx5_flow_root_namespace *peer_ns,</div><div class='add'>+				 u16 peer_vhca_id)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *peer_ctx = NULL;</div><div class='add'>+</div><div class='add'>+	if (peer_ns)</div><div class='add'>+		peer_ctx = peer_ns-&gt;fs_hws_context.hws_ctx;</div><div class='add'>+	mlx5hws_context_set_peer(ns-&gt;fs_hws_context.hws_ctx, peer_ctx,</div><div class='add'>+				 peer_vhca_id);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_fs_set_ft_default_miss(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+				       struct mlx5_flow_table *ft,</div><div class='add'>+				       struct mlx5_flow_table *next_ft)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_table *next_tbl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!ns-&gt;fs_hws_context.hws_ctx)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* if no change required, return */</div><div class='add'>+	if (!next_ft &amp;&amp; !ft-&gt;fs_hws_table.miss_ft_set)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	next_tbl = next_ft ? next_ft-&gt;fs_hws_table.hws_table : NULL;</div><div class='add'>+	err = mlx5hws_table_set_default_miss(ft-&gt;fs_hws_table.hws_table, next_tbl);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed setting FT default miss (%d)\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	ft-&gt;fs_hws_table.miss_ft_set = !!next_tbl;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_fs_add_flow_table_dest_action(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					      struct mlx5_flow_table *ft)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;</div><div class='add'>+	struct mlx5_fs_hws_context *fs_ctx = &amp;ns-&gt;fs_hws_context;</div><div class='add'>+	struct mlx5hws_action *dest_ft_action;</div><div class='add'>+	struct xarray *dests_xa;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	dest_ft_action = mlx5hws_action_create_dest_table_num(fs_ctx-&gt;hws_ctx,</div><div class='add'>+							      ft-&gt;id, flags);</div><div class='add'>+	if (!dest_ft_action) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed creating dest table action\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dests_xa = &amp;fs_ctx-&gt;hws_pool.table_dests;</div><div class='add'>+	err = xa_insert(dests_xa, ft-&gt;id, dest_ft_action, GFP_KERNEL);</div><div class='add'>+	if (err)</div><div class='add'>+		mlx5hws_action_destroy(dest_ft_action);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_fs_del_flow_table_dest_action(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					      struct mlx5_flow_table *ft)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_context *fs_ctx = &amp;ns-&gt;fs_hws_context;</div><div class='add'>+	struct mlx5hws_action *dest_ft_action;</div><div class='add'>+	struct xarray *dests_xa;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	dests_xa = &amp;fs_ctx-&gt;hws_pool.table_dests;</div><div class='add'>+	dest_ft_action = xa_erase(dests_xa, ft-&gt;id);</div><div class='add'>+	if (!dest_ft_action) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed to erase dest ft action\n");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mlx5hws_action_destroy(dest_ft_action);</div><div class='add'>+	if (err)</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed to destroy dest ft action\n");</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_create_flow_table(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					  struct mlx5_flow_table *ft,</div><div class='add'>+					  struct mlx5_flow_table_attr *ft_attr,</div><div class='add'>+					  struct mlx5_flow_table *next_ft)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *ctx = ns-&gt;fs_hws_context.hws_ctx;</div><div class='add'>+	struct mlx5hws_table_attr tbl_attr = {};</div><div class='add'>+	struct mlx5hws_table *tbl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (mlx5_fs_cmd_is_fw_term_table(ft)) {</div><div class='add'>+		err = mlx5_fs_cmd_get_fw_cmds()-&gt;create_flow_table(ns, ft, ft_attr,</div><div class='add'>+								   next_ft);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		err = mlx5_fs_add_flow_table_dest_action(ns, ft);</div><div class='add'>+		if (err)</div><div class='add'>+			mlx5_fs_cmd_get_fw_cmds()-&gt;destroy_flow_table(ns, ft);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ns-&gt;table_type != FS_FT_FDB) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Table type %d not supported for HWS\n",</div><div class='add'>+			      ns-&gt;table_type);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tbl_attr.type = MLX5HWS_TABLE_TYPE_FDB;</div><div class='add'>+	tbl_attr.level = ft_attr-&gt;level;</div><div class='add'>+	tbl_attr.uid = ft_attr-&gt;uid;</div><div class='add'>+	tbl = mlx5hws_table_create(ctx, &amp;tbl_attr);</div><div class='add'>+	if (!tbl) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed creating hws flow_table\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ft-&gt;fs_hws_table.hws_table = tbl;</div><div class='add'>+	ft-&gt;id = mlx5hws_table_get_id(tbl);</div><div class='add'>+</div><div class='add'>+	if (next_ft) {</div><div class='add'>+		err = mlx5_fs_set_ft_default_miss(ns, ft, next_ft);</div><div class='add'>+		if (err)</div><div class='add'>+			goto destroy_table;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ft-&gt;max_fte = INT_MAX;</div><div class='add'>+</div><div class='add'>+	err = mlx5_fs_add_flow_table_dest_action(ns, ft);</div><div class='add'>+	if (err)</div><div class='add'>+		goto clear_ft_miss;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+clear_ft_miss:</div><div class='add'>+	mlx5_fs_set_ft_default_miss(ns, ft, NULL);</div><div class='add'>+destroy_table:</div><div class='add'>+	mlx5hws_table_destroy(tbl);</div><div class='add'>+	ft-&gt;fs_hws_table.hws_table = NULL;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_destroy_flow_table(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					   struct mlx5_flow_table *ft)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_fs_del_flow_table_dest_action(ns, ft);</div><div class='add'>+	if (err)</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed to remove dest action (%d)\n", err);</div><div class='add'>+</div><div class='add'>+	if (mlx5_fs_cmd_is_fw_term_table(ft))</div><div class='add'>+		return mlx5_fs_cmd_get_fw_cmds()-&gt;destroy_flow_table(ns, ft);</div><div class='add'>+</div><div class='add'>+	err = mlx5_fs_set_ft_default_miss(ns, ft, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed to disconnect next table (%d)\n", err);</div><div class='add'>+</div><div class='add'>+	err = mlx5hws_table_destroy(ft-&gt;fs_hws_table.hws_table);</div><div class='add'>+	if (err)</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed to destroy flow_table (%d)\n", err);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_modify_flow_table(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					  struct mlx5_flow_table *ft,</div><div class='add'>+					  struct mlx5_flow_table *next_ft)</div><div class='add'>+{</div><div class='add'>+	if (mlx5_fs_cmd_is_fw_term_table(ft))</div><div class='add'>+		return mlx5_fs_cmd_get_fw_cmds()-&gt;modify_flow_table(ns, ft, next_ft);</div><div class='add'>+</div><div class='add'>+	return mlx5_fs_set_ft_default_miss(ns, ft, next_ft);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_update_root_ft(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+				       struct mlx5_flow_table *ft,</div><div class='add'>+				       u32 underlay_qpn,</div><div class='add'>+				       bool disconnect)</div><div class='add'>+{</div><div class='add'>+	return mlx5_fs_cmd_get_fw_cmds()-&gt;update_root_ft(ns, ft, underlay_qpn,</div><div class='add'>+							 disconnect);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_create_flow_group(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					  struct mlx5_flow_table *ft, u32 *in,</div><div class='add'>+					  struct mlx5_flow_group *fg)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_match_parameters mask;</div><div class='add'>+	struct mlx5hws_bwc_matcher *matcher;</div><div class='add'>+	u8 match_criteria_enable;</div><div class='add'>+	u32 priority;</div><div class='add'>+</div><div class='add'>+	if (mlx5_fs_cmd_is_fw_term_table(ft))</div><div class='add'>+		return mlx5_fs_cmd_get_fw_cmds()-&gt;create_flow_group(ns, ft, in, fg);</div><div class='add'>+</div><div class='add'>+	mask.match_buf = MLX5_ADDR_OF(create_flow_group_in, in, match_criteria);</div><div class='add'>+	mask.match_sz = sizeof(fg-&gt;mask.match_criteria);</div><div class='add'>+</div><div class='add'>+	match_criteria_enable = MLX5_GET(create_flow_group_in, in,</div><div class='add'>+					 match_criteria_enable);</div><div class='add'>+	priority = MLX5_GET(create_flow_group_in, in, start_flow_index);</div><div class='add'>+	matcher = mlx5hws_bwc_matcher_create(ft-&gt;fs_hws_table.hws_table,</div><div class='add'>+					     priority, match_criteria_enable,</div><div class='add'>+					     &amp;mask);</div><div class='add'>+	if (!matcher) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed creating matcher\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fg-&gt;fs_hws_matcher.matcher = matcher;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_destroy_flow_group(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					   struct mlx5_flow_table *ft,</div><div class='add'>+					   struct mlx5_flow_group *fg)</div><div class='add'>+{</div><div class='add'>+	if (mlx5_fs_cmd_is_fw_term_table(ft))</div><div class='add'>+		return mlx5_fs_cmd_get_fw_cmds()-&gt;destroy_flow_group(ns, ft, fg);</div><div class='add'>+</div><div class='add'>+	return mlx5hws_bwc_matcher_destroy(fg-&gt;fs_hws_matcher.matcher);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_dest_action_ft(struct mlx5_fs_hws_context *fs_ctx,</div><div class='add'>+			   struct mlx5_flow_rule *dst)</div><div class='add'>+{</div><div class='add'>+	return xa_load(&amp;fs_ctx-&gt;hws_pool.table_dests, dst-&gt;dest_attr.ft-&gt;id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_dest_action_table_num(struct mlx5_fs_hws_context *fs_ctx,</div><div class='add'>+				  struct mlx5_flow_rule *dst)</div><div class='add'>+{</div><div class='add'>+	u32 table_num = dst-&gt;dest_attr.ft_num;</div><div class='add'>+</div><div class='add'>+	return xa_load(&amp;fs_ctx-&gt;hws_pool.table_dests, table_num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_create_dest_action_table_num(struct mlx5_fs_hws_context *fs_ctx,</div><div class='add'>+				     struct mlx5_flow_rule *dst)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;</div><div class='add'>+	struct mlx5hws_context *ctx = fs_ctx-&gt;hws_ctx;</div><div class='add'>+	u32 table_num = dst-&gt;dest_attr.ft_num;</div><div class='add'>+</div><div class='add'>+	return mlx5hws_action_create_dest_table_num(ctx, table_num, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_dest_action_vport(struct mlx5_fs_hws_context *fs_ctx,</div><div class='add'>+			      struct mlx5_flow_rule *dst,</div><div class='add'>+			      bool is_dest_type_uplink)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;</div><div class='add'>+	struct mlx5_flow_destination *dest_attr = &amp;dst-&gt;dest_attr;</div><div class='add'>+	struct mlx5hws_context *ctx = fs_ctx-&gt;hws_ctx;</div><div class='add'>+	struct mlx5hws_action *dest;</div><div class='add'>+	struct xarray *dests_xa;</div><div class='add'>+	bool vhca_id_valid;</div><div class='add'>+	unsigned long idx;</div><div class='add'>+	u16 vport_num;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	vhca_id_valid = is_dest_type_uplink ||</div><div class='add'>+			(dest_attr-&gt;vport.flags &amp; MLX5_FLOW_DEST_VPORT_VHCA_ID);</div><div class='add'>+	vport_num = is_dest_type_uplink ? MLX5_VPORT_UPLINK : dest_attr-&gt;vport.num;</div><div class='add'>+	if (vhca_id_valid) {</div><div class='add'>+		dests_xa = &amp;fs_ctx-&gt;hws_pool.vport_vhca_dests;</div><div class='add'>+		idx = (unsigned long)dest_attr-&gt;vport.vhca_id &lt;&lt; 16 | vport_num;</div><div class='add'>+	} else {</div><div class='add'>+		dests_xa = &amp;fs_ctx-&gt;hws_pool.vport_dests;</div><div class='add'>+		idx = vport_num;</div><div class='add'>+	}</div><div class='add'>+dest_load:</div><div class='add'>+	dest = xa_load(dests_xa, idx);</div><div class='add'>+	if (dest)</div><div class='add'>+		return dest;</div><div class='add'>+</div><div class='add'>+	dest = mlx5hws_action_create_dest_vport(ctx, vport_num,	vhca_id_valid,</div><div class='add'>+						dest_attr-&gt;vport.vhca_id, flags);</div><div class='add'>+</div><div class='add'>+	err = xa_insert(dests_xa, idx, dest, GFP_KERNEL);</div><div class='add'>+	if (err) {</div><div class='add'>+		mlx5hws_action_destroy(dest);</div><div class='add'>+		dest = NULL;</div><div class='add'>+</div><div class='add'>+		if (err == -EBUSY)</div><div class='add'>+			/* xarray entry was already stored by another thread */</div><div class='add'>+			goto dest_load;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dest;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_create_dest_action_range(struct mlx5hws_context *ctx,</div><div class='add'>+				 struct mlx5_flow_rule *dst)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;</div><div class='add'>+	struct mlx5_flow_destination *dest_attr = &amp;dst-&gt;dest_attr;</div><div class='add'>+</div><div class='add'>+	return mlx5hws_action_create_dest_match_range(ctx,</div><div class='add'>+						      dest_attr-&gt;range.field,</div><div class='add'>+						      dest_attr-&gt;range.hit_ft,</div><div class='add'>+						      dest_attr-&gt;range.miss_ft,</div><div class='add'>+						      dest_attr-&gt;range.min,</div><div class='add'>+						      dest_attr-&gt;range.max,</div><div class='add'>+						      flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_fs_hws_data *</div><div class='add'>+mlx5_fs_get_cached_hws_data(struct xarray *cache_xa, unsigned long index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_data *fs_hws_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	xa_lock(cache_xa);</div><div class='add'>+	fs_hws_data = xa_load(cache_xa, index);</div><div class='add'>+	if (!fs_hws_data) {</div><div class='add'>+		fs_hws_data = kzalloc(sizeof(*fs_hws_data), GFP_ATOMIC);</div><div class='add'>+		if (!fs_hws_data) {</div><div class='add'>+			xa_unlock(cache_xa);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		refcount_set(&amp;fs_hws_data-&gt;hws_action_refcount, 0);</div><div class='add'>+		mutex_init(&amp;fs_hws_data-&gt;lock);</div><div class='add'>+		err = __xa_insert(cache_xa, index, fs_hws_data, GFP_ATOMIC);</div><div class='add'>+		if (err) {</div><div class='add'>+			kfree(fs_hws_data);</div><div class='add'>+			xa_unlock(cache_xa);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	xa_unlock(cache_xa);</div><div class='add'>+</div><div class='add'>+	return fs_hws_data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_action_aso_meter(struct mlx5_fs_hws_context *fs_ctx,</div><div class='add'>+			     struct mlx5_exe_aso *exe_aso)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_create_action_ctx create_ctx;</div><div class='add'>+	struct mlx5hws_context *ctx = fs_ctx-&gt;hws_ctx;</div><div class='add'>+	struct mlx5_fs_hws_data *meter_hws_data;</div><div class='add'>+	u32 id = exe_aso-&gt;base_id;</div><div class='add'>+	struct xarray *meters_xa;</div><div class='add'>+</div><div class='add'>+	meters_xa = &amp;fs_ctx-&gt;hws_pool.aso_meters;</div><div class='add'>+	meter_hws_data = mlx5_fs_get_cached_hws_data(meters_xa, id);</div><div class='add'>+	if (!meter_hws_data)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	create_ctx.hws_ctx = ctx;</div><div class='add'>+	create_ctx.actions_type = MLX5HWS_ACTION_TYP_ASO_METER;</div><div class='add'>+	create_ctx.id = id;</div><div class='add'>+	create_ctx.return_reg_id = exe_aso-&gt;return_reg_id;</div><div class='add'>+</div><div class='add'>+	return mlx5_fs_get_hws_action(meter_hws_data, &amp;create_ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_fs_put_action_aso_meter(struct mlx5_fs_hws_context *fs_ctx,</div><div class='add'>+					 struct mlx5_exe_aso *exe_aso)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_data *meter_hws_data;</div><div class='add'>+	struct xarray *meters_xa;</div><div class='add'>+</div><div class='add'>+	meters_xa = &amp;fs_ctx-&gt;hws_pool.aso_meters;</div><div class='add'>+	meter_hws_data = xa_load(meters_xa, exe_aso-&gt;base_id);</div><div class='add'>+	if (!meter_hws_data)</div><div class='add'>+		return;</div><div class='add'>+	return mlx5_fs_put_hws_action(meter_hws_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_dest_action_sampler(struct mlx5_fs_hws_context *fs_ctx,</div><div class='add'>+				struct mlx5_flow_rule *dst)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_create_action_ctx create_ctx;</div><div class='add'>+	struct mlx5hws_context *ctx = fs_ctx-&gt;hws_ctx;</div><div class='add'>+	struct mlx5_fs_hws_data *sampler_hws_data;</div><div class='add'>+	u32 id = dst-&gt;dest_attr.sampler_id;</div><div class='add'>+	struct xarray *sampler_xa;</div><div class='add'>+</div><div class='add'>+	sampler_xa = &amp;fs_ctx-&gt;hws_pool.sample_dests;</div><div class='add'>+	sampler_hws_data = mlx5_fs_get_cached_hws_data(sampler_xa, id);</div><div class='add'>+	if (!sampler_hws_data)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	create_ctx.hws_ctx = ctx;</div><div class='add'>+	create_ctx.actions_type = MLX5HWS_ACTION_TYP_SAMPLER;</div><div class='add'>+	create_ctx.id = id;</div><div class='add'>+</div><div class='add'>+	return mlx5_fs_get_hws_action(sampler_hws_data, &amp;create_ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_fs_put_dest_action_sampler(struct mlx5_fs_hws_context *fs_ctx,</div><div class='add'>+					    u32 sampler_id)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_data *sampler_hws_data;</div><div class='add'>+	struct xarray *sampler_xa;</div><div class='add'>+</div><div class='add'>+	sampler_xa = &amp;fs_ctx-&gt;hws_pool.sample_dests;</div><div class='add'>+	sampler_hws_data = xa_load(sampler_xa, sampler_id);</div><div class='add'>+	if (!sampler_hws_data)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mlx5_fs_put_hws_action(sampler_hws_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_create_action_dest_array(struct mlx5hws_context *ctx,</div><div class='add'>+				 struct mlx5hws_action_dest_attr *dests,</div><div class='add'>+				 u32 num_of_dests)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;</div><div class='add'>+</div><div class='add'>+	return mlx5hws_action_create_dest_array(ctx, num_of_dests, dests,</div><div class='add'>+						flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_action_push_vlan(struct mlx5_fs_hws_context *fs_ctx)</div><div class='add'>+{</div><div class='add'>+	return fs_ctx-&gt;hws_pool.push_vlan_action;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 mlx5_fs_calc_vlan_hdr(struct mlx5_fs_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	u16 n_ethtype = vlan-&gt;ethtype;</div><div class='add'>+	u8 prio = vlan-&gt;prio;</div><div class='add'>+	u16 vid = vlan-&gt;vid;</div><div class='add'>+</div><div class='add'>+	return (u32)n_ethtype &lt;&lt; 16 | (u32)(prio) &lt;&lt; 12 | (u32)vid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_action_pop_vlan(struct mlx5_fs_hws_context *fs_ctx)</div><div class='add'>+{</div><div class='add'>+	return fs_ctx-&gt;hws_pool.pop_vlan_action;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_action_decap_tnl_l2_to_l2(struct mlx5_fs_hws_context *fs_ctx)</div><div class='add'>+{</div><div class='add'>+	return fs_ctx-&gt;hws_pool.decapl2_action;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_dest_action_drop(struct mlx5_fs_hws_context *fs_ctx)</div><div class='add'>+{</div><div class='add'>+	return fs_ctx-&gt;hws_pool.drop_action;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_action_tag(struct mlx5_fs_hws_context *fs_ctx)</div><div class='add'>+{</div><div class='add'>+	return fs_ctx-&gt;hws_pool.tag_action;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_create_action_last(struct mlx5hws_context *ctx)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;</div><div class='add'>+</div><div class='add'>+	return mlx5hws_action_create_last(ctx, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_create_hws_action(struct mlx5_fs_hws_create_action_ctx *create_ctx)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;</div><div class='add'>+</div><div class='add'>+	switch (create_ctx-&gt;actions_type) {</div><div class='add'>+	case MLX5HWS_ACTION_TYP_CTR:</div><div class='add'>+		return mlx5hws_action_create_counter(create_ctx-&gt;hws_ctx,</div><div class='add'>+						     create_ctx-&gt;id, flags);</div><div class='add'>+	case MLX5HWS_ACTION_TYP_ASO_METER:</div><div class='add'>+		return mlx5hws_action_create_aso_meter(create_ctx-&gt;hws_ctx,</div><div class='add'>+						       create_ctx-&gt;id,</div><div class='add'>+						       create_ctx-&gt;return_reg_id,</div><div class='add'>+						       flags);</div><div class='add'>+	case MLX5HWS_ACTION_TYP_SAMPLER:</div><div class='add'>+		return mlx5hws_action_create_flow_sampler(create_ctx-&gt;hws_ctx,</div><div class='add'>+							  create_ctx-&gt;id, flags);</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_hws_action(struct mlx5_fs_hws_data *fs_hws_data,</div><div class='add'>+		       struct mlx5_fs_hws_create_action_ctx *create_ctx)</div><div class='add'>+{</div><div class='add'>+	/* try avoid locking if not necessary */</div><div class='add'>+	if (refcount_inc_not_zero(&amp;fs_hws_data-&gt;hws_action_refcount))</div><div class='add'>+		return fs_hws_data-&gt;hws_action;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;fs_hws_data-&gt;lock);</div><div class='add'>+	if (refcount_inc_not_zero(&amp;fs_hws_data-&gt;hws_action_refcount)) {</div><div class='add'>+		mutex_unlock(&amp;fs_hws_data-&gt;lock);</div><div class='add'>+		return fs_hws_data-&gt;hws_action;</div><div class='add'>+	}</div><div class='add'>+	fs_hws_data-&gt;hws_action = mlx5_fs_create_hws_action(create_ctx);</div><div class='add'>+	if (!fs_hws_data-&gt;hws_action) {</div><div class='add'>+		mutex_unlock(&amp;fs_hws_data-&gt;lock);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	refcount_set(&amp;fs_hws_data-&gt;hws_action_refcount, 1);</div><div class='add'>+	mutex_unlock(&amp;fs_hws_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return fs_hws_data-&gt;hws_action;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_fs_put_hws_action(struct mlx5_fs_hws_data *fs_hws_data)</div><div class='add'>+{</div><div class='add'>+	if (!fs_hws_data)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* try avoid locking if not necessary */</div><div class='add'>+	if (refcount_dec_not_one(&amp;fs_hws_data-&gt;hws_action_refcount))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;fs_hws_data-&gt;lock);</div><div class='add'>+	if (!refcount_dec_and_test(&amp;fs_hws_data-&gt;hws_action_refcount)) {</div><div class='add'>+		mutex_unlock(&amp;fs_hws_data-&gt;lock);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	mlx5hws_action_destroy(fs_hws_data-&gt;hws_action);</div><div class='add'>+	fs_hws_data-&gt;hws_action = NULL;</div><div class='add'>+	mutex_unlock(&amp;fs_hws_data-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_fs_destroy_fs_action(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+				      struct mlx5_fs_hws_rule_action *fs_action)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_context *fs_ctx = &amp;ns-&gt;fs_hws_context;</div><div class='add'>+</div><div class='add'>+	switch (mlx5hws_action_get_type(fs_action-&gt;action)) {</div><div class='add'>+	case MLX5HWS_ACTION_TYP_CTR:</div><div class='add'>+		mlx5_fc_put_hws_action(fs_action-&gt;counter);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5HWS_ACTION_TYP_ASO_METER:</div><div class='add'>+		mlx5_fs_put_action_aso_meter(fs_ctx, fs_action-&gt;exe_aso);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5HWS_ACTION_TYP_SAMPLER:</div><div class='add'>+		mlx5_fs_put_dest_action_sampler(fs_ctx, fs_action-&gt;sampler_id);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		mlx5hws_action_destroy(fs_action-&gt;action);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mlx5_fs_destroy_fs_actions(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+			   struct mlx5_fs_hws_rule_action **fs_actions,</div><div class='add'>+			   int *num_fs_actions)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Free in reverse order to handle action dependencies */</div><div class='add'>+	for (i = *num_fs_actions - 1; i &gt;= 0; i--)</div><div class='add'>+		mlx5_fs_destroy_fs_action(ns, *fs_actions + i);</div><div class='add'>+	*num_fs_actions = 0;</div><div class='add'>+	kfree(*fs_actions);</div><div class='add'>+	*fs_actions = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Splits FTE's actions into cached, rule and destination actions.</div><div class='add'>+ * The cached and destination actions are saved on the fte hws rule.</div><div class='add'>+ * The rule actions are returned as a parameter, together with their count.</div><div class='add'>+ * We want to support a rule with 32 destinations, which means we need to</div><div class='add'>+ * account for 32 destinations plus usually a counter plus one more action</div><div class='add'>+ * for a multi-destination flow table.</div><div class='add'>+ * 32 is SW limitation for array size, keep. HWS limitation is 16M STEs per matcher</div><div class='add'>+ */</div><div class='add'>+#define MLX5_FLOW_CONTEXT_ACTION_MAX 34</div><div class='add'>+static int mlx5_fs_fte_get_hws_actions(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+				       struct mlx5_flow_table *ft,</div><div class='add'>+				       struct mlx5_flow_group *group,</div><div class='add'>+				       struct fs_fte *fte,</div><div class='add'>+				       struct mlx5hws_rule_action **ractions)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_act *fte_action = &amp;fte-&gt;act_dests.action;</div><div class='add'>+	struct mlx5_fs_hws_context *fs_ctx = &amp;ns-&gt;fs_hws_context;</div><div class='add'>+	struct mlx5hws_action_dest_attr *dest_actions;</div><div class='add'>+	struct mlx5hws_context *ctx = fs_ctx-&gt;hws_ctx;</div><div class='add'>+	struct mlx5_fs_hws_rule_action *fs_actions;</div><div class='add'>+	struct mlx5_core_dev *dev = ns-&gt;dev;</div><div class='add'>+	struct mlx5hws_action *dest_action;</div><div class='add'>+	struct mlx5hws_action *tmp_action;</div><div class='add'>+	struct mlx5_fs_hws_pr *pr_data;</div><div class='add'>+	struct mlx5_fs_hws_mh *mh_data;</div><div class='add'>+	bool delay_encap_set = false;</div><div class='add'>+	struct mlx5_flow_rule *dst;</div><div class='add'>+	int num_dest_actions = 0;</div><div class='add'>+	int num_fs_actions = 0;</div><div class='add'>+	int num_actions = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	*ractions = kcalloc(MLX5_FLOW_CONTEXT_ACTION_MAX, sizeof(**ractions),</div><div class='add'>+			    GFP_KERNEL);</div><div class='add'>+	if (!*ractions) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fs_actions = kcalloc(MLX5_FLOW_CONTEXT_ACTION_MAX,</div><div class='add'>+			     sizeof(*fs_actions), GFP_KERNEL);</div><div class='add'>+	if (!fs_actions) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto free_actions_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dest_actions = kcalloc(MLX5_FLOW_CONTEXT_ACTION_MAX,</div><div class='add'>+			       sizeof(*dest_actions), GFP_KERNEL);</div><div class='add'>+	if (!dest_actions) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto free_fs_actions_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The order of the actions are must to be kept, only the following</div><div class='add'>+	 * order is supported by HW steering:</div><div class='add'>+	 * HWS: decap -&gt; remove_hdr -&gt; pop_vlan -&gt; modify header -&gt; push_vlan</div><div class='add'>+	 *      -&gt; reformat (insert_hdr/encap) -&gt; ctr -&gt; tag -&gt; aso</div><div class='add'>+	 *      -&gt; drop -&gt; FWD:tbl/vport/sampler/tbl_num/range -&gt; dest_array -&gt; last</div><div class='add'>+	 */</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_DECAP) {</div><div class='add'>+		tmp_action = mlx5_fs_get_action_decap_tnl_l2_to_l2(fs_ctx);</div><div class='add'>+		if (!tmp_action) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_dest_actions_alloc;</div><div class='add'>+		}</div><div class='add'>+		(*ractions)[num_actions++].action = tmp_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) {</div><div class='add'>+		int reformat_type = fte_action-&gt;pkt_reformat-&gt;reformat_type;</div><div class='add'>+</div><div class='add'>+		if (fte_action-&gt;pkt_reformat-&gt;owner == MLX5_FLOW_RESOURCE_OWNER_FW) {</div><div class='add'>+			mlx5_core_err(dev, "FW-owned reformat can't be used in HWS rule\n");</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (reformat_type == MLX5_REFORMAT_TYPE_L3_TUNNEL_TO_L2) {</div><div class='add'>+			pr_data = fte_action-&gt;pkt_reformat-&gt;fs_hws_action.pr_data;</div><div class='add'>+			(*ractions)[num_actions].reformat.offset = pr_data-&gt;offset;</div><div class='add'>+			(*ractions)[num_actions].reformat.hdr_idx = pr_data-&gt;hdr_idx;</div><div class='add'>+			(*ractions)[num_actions].reformat.data = pr_data-&gt;data;</div><div class='add'>+			(*ractions)[num_actions++].action =</div><div class='add'>+				fte_action-&gt;pkt_reformat-&gt;fs_hws_action.hws_action;</div><div class='add'>+		} else if (reformat_type == MLX5_REFORMAT_TYPE_REMOVE_HDR) {</div><div class='add'>+			(*ractions)[num_actions++].action =</div><div class='add'>+				fte_action-&gt;pkt_reformat-&gt;fs_hws_action.hws_action;</div><div class='add'>+		} else {</div><div class='add'>+			delay_encap_set = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_VLAN_POP) {</div><div class='add'>+		tmp_action = mlx5_fs_get_action_pop_vlan(fs_ctx);</div><div class='add'>+		if (!tmp_action) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		(*ractions)[num_actions++].action = tmp_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2) {</div><div class='add'>+		tmp_action = mlx5_fs_get_action_pop_vlan(fs_ctx);</div><div class='add'>+		if (!tmp_action) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		(*ractions)[num_actions++].action = tmp_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {</div><div class='add'>+		mh_data = fte_action-&gt;modify_hdr-&gt;fs_hws_action.mh_data;</div><div class='add'>+		(*ractions)[num_actions].modify_header.offset = mh_data-&gt;offset;</div><div class='add'>+		(*ractions)[num_actions].modify_header.data = mh_data-&gt;data;</div><div class='add'>+		(*ractions)[num_actions++].action =</div><div class='add'>+			fte_action-&gt;modify_hdr-&gt;fs_hws_action.hws_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH) {</div><div class='add'>+		tmp_action = mlx5_fs_get_action_push_vlan(fs_ctx);</div><div class='add'>+		if (!tmp_action) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		(*ractions)[num_actions].push_vlan.vlan_hdr =</div><div class='add'>+			htonl(mlx5_fs_calc_vlan_hdr(&amp;fte_action-&gt;vlan[0]));</div><div class='add'>+		(*ractions)[num_actions++].action = tmp_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2) {</div><div class='add'>+		tmp_action = mlx5_fs_get_action_push_vlan(fs_ctx);</div><div class='add'>+		if (!tmp_action) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		(*ractions)[num_actions].push_vlan.vlan_hdr =</div><div class='add'>+			htonl(mlx5_fs_calc_vlan_hdr(&amp;fte_action-&gt;vlan[1]));</div><div class='add'>+		(*ractions)[num_actions++].action = tmp_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (delay_encap_set) {</div><div class='add'>+		pr_data = fte_action-&gt;pkt_reformat-&gt;fs_hws_action.pr_data;</div><div class='add'>+		(*ractions)[num_actions].reformat.offset = pr_data-&gt;offset;</div><div class='add'>+		(*ractions)[num_actions].reformat.data = pr_data-&gt;data;</div><div class='add'>+		(*ractions)[num_actions++].action =</div><div class='add'>+			fte_action-&gt;pkt_reformat-&gt;fs_hws_action.hws_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_COUNT) {</div><div class='add'>+		list_for_each_entry(dst, &amp;fte-&gt;node.children, node.list) {</div><div class='add'>+			struct mlx5_fc *counter;</div><div class='add'>+</div><div class='add'>+			if (dst-&gt;dest_attr.type !=</div><div class='add'>+			    MLX5_FLOW_DESTINATION_TYPE_COUNTER)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (num_actions == MLX5_FLOW_CONTEXT_ACTION_MAX) {</div><div class='add'>+				err = -EOPNOTSUPP;</div><div class='add'>+				goto free_actions;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			counter = dst-&gt;dest_attr.counter;</div><div class='add'>+			tmp_action = mlx5_fc_get_hws_action(ctx, counter);</div><div class='add'>+			if (!tmp_action) {</div><div class='add'>+				err = -EINVAL;</div><div class='add'>+				goto free_actions;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			(*ractions)[num_actions].counter.offset =</div><div class='add'>+				mlx5_fc_id(counter) - mlx5_fc_get_base_id(counter);</div><div class='add'>+			(*ractions)[num_actions++].action = tmp_action;</div><div class='add'>+			fs_actions[num_fs_actions].action = tmp_action;</div><div class='add'>+			fs_actions[num_fs_actions++].counter = counter;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte-&gt;act_dests.flow_context.flow_tag) {</div><div class='add'>+		if (num_actions == MLX5_FLOW_CONTEXT_ACTION_MAX) {</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		tmp_action = mlx5_fs_get_action_tag(fs_ctx);</div><div class='add'>+		if (!tmp_action) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		(*ractions)[num_actions].tag.value = fte-&gt;act_dests.flow_context.flow_tag;</div><div class='add'>+		(*ractions)[num_actions++].action = tmp_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_EXECUTE_ASO) {</div><div class='add'>+		if (fte_action-&gt;exe_aso.type != MLX5_EXE_ASO_FLOW_METER ||</div><div class='add'>+		    num_actions == MLX5_FLOW_CONTEXT_ACTION_MAX) {</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tmp_action = mlx5_fs_get_action_aso_meter(fs_ctx,</div><div class='add'>+							  &amp;fte_action-&gt;exe_aso);</div><div class='add'>+		if (!tmp_action) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		(*ractions)[num_actions].aso_meter.offset =</div><div class='add'>+			fte_action-&gt;exe_aso.flow_meter.meter_idx;</div><div class='add'>+		(*ractions)[num_actions].aso_meter.init_color =</div><div class='add'>+			fte_action-&gt;exe_aso.flow_meter.init_color;</div><div class='add'>+		(*ractions)[num_actions++].action = tmp_action;</div><div class='add'>+		fs_actions[num_fs_actions].action = tmp_action;</div><div class='add'>+		fs_actions[num_fs_actions++].exe_aso = &amp;fte_action-&gt;exe_aso;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_DROP) {</div><div class='add'>+		dest_action = mlx5_fs_get_dest_action_drop(fs_ctx);</div><div class='add'>+		if (!dest_action) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		dest_actions[num_dest_actions++].dest = dest_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fte_action-&gt;action &amp; MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {</div><div class='add'>+		list_for_each_entry(dst, &amp;fte-&gt;node.children, node.list) {</div><div class='add'>+			struct mlx5_flow_destination *attr = &amp;dst-&gt;dest_attr;</div><div class='add'>+			bool type_uplink =</div><div class='add'>+				attr-&gt;type == MLX5_FLOW_DESTINATION_TYPE_UPLINK;</div><div class='add'>+</div><div class='add'>+			if (num_fs_actions == MLX5_FLOW_CONTEXT_ACTION_MAX ||</div><div class='add'>+			    num_dest_actions == MLX5_FLOW_CONTEXT_ACTION_MAX) {</div><div class='add'>+				err = -EOPNOTSUPP;</div><div class='add'>+				goto free_actions;</div><div class='add'>+			}</div><div class='add'>+			if (attr-&gt;type == MLX5_FLOW_DESTINATION_TYPE_COUNTER)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			switch (attr-&gt;type) {</div><div class='add'>+			case MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE:</div><div class='add'>+				dest_action = mlx5_fs_get_dest_action_ft(fs_ctx, dst);</div><div class='add'>+				if (dst-&gt;dest_attr.ft-&gt;flags &amp;</div><div class='add'>+				    MLX5_FLOW_TABLE_UPLINK_VPORT)</div><div class='add'>+					dest_actions[num_dest_actions].is_wire_ft = true;</div><div class='add'>+				break;</div><div class='add'>+			case MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE_NUM:</div><div class='add'>+				dest_action = mlx5_fs_get_dest_action_table_num(fs_ctx,</div><div class='add'>+										dst);</div><div class='add'>+				if (dest_action)</div><div class='add'>+					break;</div><div class='add'>+				dest_action = mlx5_fs_create_dest_action_table_num(fs_ctx,</div><div class='add'>+										   dst);</div><div class='add'>+				fs_actions[num_fs_actions++].action = dest_action;</div><div class='add'>+				break;</div><div class='add'>+			case MLX5_FLOW_DESTINATION_TYPE_RANGE:</div><div class='add'>+				dest_action = mlx5_fs_create_dest_action_range(ctx, dst);</div><div class='add'>+				fs_actions[num_fs_actions++].action = dest_action;</div><div class='add'>+				break;</div><div class='add'>+			case MLX5_FLOW_DESTINATION_TYPE_UPLINK:</div><div class='add'>+			case MLX5_FLOW_DESTINATION_TYPE_VPORT:</div><div class='add'>+				dest_action = mlx5_fs_get_dest_action_vport(fs_ctx, dst,</div><div class='add'>+									    type_uplink);</div><div class='add'>+				break;</div><div class='add'>+			case MLX5_FLOW_DESTINATION_TYPE_FLOW_SAMPLER:</div><div class='add'>+				dest_action =</div><div class='add'>+					mlx5_fs_get_dest_action_sampler(fs_ctx,</div><div class='add'>+									dst);</div><div class='add'>+				fs_actions[num_fs_actions].action = dest_action;</div><div class='add'>+				fs_actions[num_fs_actions++].sampler_id =</div><div class='add'>+							dst-&gt;dest_attr.sampler_id;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				err = -EOPNOTSUPP;</div><div class='add'>+				goto free_actions;</div><div class='add'>+			}</div><div class='add'>+			if (!dest_action) {</div><div class='add'>+				err = -ENOMEM;</div><div class='add'>+				goto free_actions;</div><div class='add'>+			}</div><div class='add'>+			dest_actions[num_dest_actions++].dest = dest_action;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (num_dest_actions == 1) {</div><div class='add'>+		if (num_actions == MLX5_FLOW_CONTEXT_ACTION_MAX) {</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		(*ractions)[num_actions++].action = dest_actions-&gt;dest;</div><div class='add'>+	} else if (num_dest_actions &gt; 1) {</div><div class='add'>+		if (num_actions == MLX5_FLOW_CONTEXT_ACTION_MAX ||</div><div class='add'>+		    num_fs_actions == MLX5_FLOW_CONTEXT_ACTION_MAX) {</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		tmp_action =</div><div class='add'>+			mlx5_fs_create_action_dest_array(ctx, dest_actions,</div><div class='add'>+							 num_dest_actions);</div><div class='add'>+		if (!tmp_action) {</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+			goto free_actions;</div><div class='add'>+		}</div><div class='add'>+		fs_actions[num_fs_actions++].action = tmp_action;</div><div class='add'>+		(*ractions)[num_actions++].action = tmp_action;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (num_actions == MLX5_FLOW_CONTEXT_ACTION_MAX ||</div><div class='add'>+	    num_fs_actions == MLX5_FLOW_CONTEXT_ACTION_MAX) {</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		goto free_actions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tmp_action = mlx5_fs_create_action_last(ctx);</div><div class='add'>+	if (!tmp_action) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto free_actions;</div><div class='add'>+	}</div><div class='add'>+	fs_actions[num_fs_actions++].action = tmp_action;</div><div class='add'>+	(*ractions)[num_actions++].action = tmp_action;</div><div class='add'>+</div><div class='add'>+	kfree(dest_actions);</div><div class='add'>+</div><div class='add'>+	/* Actions created specifically for this rule will be destroyed</div><div class='add'>+	 * once rule is deleted.</div><div class='add'>+	 */</div><div class='add'>+	fte-&gt;fs_hws_rule.num_fs_actions = num_fs_actions;</div><div class='add'>+	fte-&gt;fs_hws_rule.hws_fs_actions = fs_actions;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_actions:</div><div class='add'>+	mlx5_fs_destroy_fs_actions(ns, &amp;fs_actions, &amp;num_fs_actions);</div><div class='add'>+free_dest_actions_alloc:</div><div class='add'>+	kfree(dest_actions);</div><div class='add'>+free_fs_actions_alloc:</div><div class='add'>+	kfree(fs_actions);</div><div class='add'>+free_actions_alloc:</div><div class='add'>+	kfree(*ractions);</div><div class='add'>+	*ractions = NULL;</div><div class='add'>+out_err:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_create_fte(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+				   struct mlx5_flow_table *ft,</div><div class='add'>+				   struct mlx5_flow_group *group,</div><div class='add'>+				   struct fs_fte *fte)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_match_parameters params;</div><div class='add'>+	struct mlx5hws_rule_action *ractions;</div><div class='add'>+	struct mlx5hws_bwc_rule *rule;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (mlx5_fs_cmd_is_fw_term_table(ft))</div><div class='add'>+		return mlx5_fs_cmd_get_fw_cmds()-&gt;create_fte(ns, ft, group, fte);</div><div class='add'>+</div><div class='add'>+	err = mlx5_fs_fte_get_hws_actions(ns, ft, group, fte, &amp;ractions);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	params.match_sz = sizeof(fte-&gt;val);</div><div class='add'>+	params.match_buf = fte-&gt;val;</div><div class='add'>+</div><div class='add'>+	rule = mlx5hws_bwc_rule_create(group-&gt;fs_hws_matcher.matcher, &amp;params,</div><div class='add'>+				       fte-&gt;act_dests.flow_context.flow_source,</div><div class='add'>+				       ractions);</div><div class='add'>+	kfree(ractions);</div><div class='add'>+	if (!rule) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto free_actions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fte-&gt;fs_hws_rule.bwc_rule = rule;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_actions:</div><div class='add'>+	mlx5_fs_destroy_fs_actions(ns, &amp;fte-&gt;fs_hws_rule.hws_fs_actions,</div><div class='add'>+				   &amp;fte-&gt;fs_hws_rule.num_fs_actions);</div><div class='add'>+out_err:</div><div class='add'>+	mlx5_core_err(ns-&gt;dev, "Failed to create hws rule err(%d)\n", err);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_delete_fte(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+				   struct mlx5_flow_table *ft,</div><div class='add'>+				   struct fs_fte *fte)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_rule *rule = &amp;fte-&gt;fs_hws_rule;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (mlx5_fs_cmd_is_fw_term_table(ft))</div><div class='add'>+		return mlx5_fs_cmd_get_fw_cmds()-&gt;delete_fte(ns, ft, fte);</div><div class='add'>+</div><div class='add'>+	err = mlx5hws_bwc_rule_destroy(rule-&gt;bwc_rule);</div><div class='add'>+	rule-&gt;bwc_rule = NULL;</div><div class='add'>+</div><div class='add'>+	mlx5_fs_destroy_fs_actions(ns, &amp;rule-&gt;hws_fs_actions,</div><div class='add'>+				   &amp;rule-&gt;num_fs_actions);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_update_fte(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+				   struct mlx5_flow_table *ft,</div><div class='add'>+				   struct mlx5_flow_group *group,</div><div class='add'>+				   int modify_mask,</div><div class='add'>+				   struct fs_fte *fte)</div><div class='add'>+{</div><div class='add'>+	int allowed_mask = BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION) |</div><div class='add'>+		BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST) |</div><div class='add'>+		BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS);</div><div class='add'>+	struct mlx5_fs_hws_rule_action *saved_hws_fs_actions;</div><div class='add'>+	struct mlx5hws_rule_action *ractions;</div><div class='add'>+	int saved_num_fs_actions;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (mlx5_fs_cmd_is_fw_term_table(ft))</div><div class='add'>+		return mlx5_fs_cmd_get_fw_cmds()-&gt;update_fte(ns, ft, group,</div><div class='add'>+							     modify_mask, fte);</div><div class='add'>+</div><div class='add'>+	if ((modify_mask &amp; ~allowed_mask) != 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	saved_hws_fs_actions = fte-&gt;fs_hws_rule.hws_fs_actions;</div><div class='add'>+	saved_num_fs_actions = fte-&gt;fs_hws_rule.num_fs_actions;</div><div class='add'>+</div><div class='add'>+	ret = mlx5_fs_fte_get_hws_actions(ns, ft, group, fte, &amp;ractions);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = mlx5hws_bwc_rule_action_update(fte-&gt;fs_hws_rule.bwc_rule, ractions);</div><div class='add'>+	kfree(ractions);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto restore_actions;</div><div class='add'>+</div><div class='add'>+	mlx5_fs_destroy_fs_actions(ns, &amp;saved_hws_fs_actions,</div><div class='add'>+				   &amp;saved_num_fs_actions);</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+restore_actions:</div><div class='add'>+	mlx5_fs_destroy_fs_actions(ns, &amp;fte-&gt;fs_hws_rule.hws_fs_actions,</div><div class='add'>+				   &amp;fte-&gt;fs_hws_rule.num_fs_actions);</div><div class='add'>+	fte-&gt;fs_hws_rule.hws_fs_actions = saved_hws_fs_actions;</div><div class='add'>+	fte-&gt;fs_hws_rule.num_fs_actions = saved_num_fs_actions;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_create_action_remove_header_vlan(struct mlx5hws_context *ctx)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;</div><div class='add'>+	struct mlx5hws_action_remove_header_attr remove_hdr_vlan = {};</div><div class='add'>+</div><div class='add'>+	/* MAC anchor not supported in HWS reformat, use VLAN anchor */</div><div class='add'>+	remove_hdr_vlan.anchor = MLX5_REFORMAT_CONTEXT_ANCHOR_VLAN_START;</div><div class='add'>+	remove_hdr_vlan.offset = 0;</div><div class='add'>+	remove_hdr_vlan.size = sizeof(struct vlan_hdr);</div><div class='add'>+	return mlx5hws_action_create_remove_header(ctx, &amp;remove_hdr_vlan, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_action_remove_header_vlan(struct mlx5_fs_hws_context *fs_ctx,</div><div class='add'>+				      struct mlx5_pkt_reformat_params *params)</div><div class='add'>+{</div><div class='add'>+	if (!params ||</div><div class='add'>+	    params-&gt;param_0 != MLX5_REFORMAT_CONTEXT_ANCHOR_MAC_START ||</div><div class='add'>+	    params-&gt;param_1 != offsetof(struct vlan_ethhdr, h_vlan_proto) ||</div><div class='add'>+	    params-&gt;size != sizeof(struct vlan_hdr))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return fs_ctx-&gt;hws_pool.remove_hdr_vlan_action;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_fs_verify_insert_header_params(struct mlx5_core_dev *mdev,</div><div class='add'>+				    struct mlx5_pkt_reformat_params *params)</div><div class='add'>+{</div><div class='add'>+	if ((!params-&gt;data &amp;&amp; params-&gt;size) || (params-&gt;data &amp;&amp; !params-&gt;size) ||</div><div class='add'>+	    MLX5_CAP_GEN_2(mdev, max_reformat_insert_size) &lt; params-&gt;size ||</div><div class='add'>+	    MLX5_CAP_GEN_2(mdev, max_reformat_insert_offset) &lt; params-&gt;param_1) {</div><div class='add'>+		mlx5_core_err(mdev, "Invalid reformat params for INSERT_HDR\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (params-&gt;param_0 != MLX5_FS_INSERT_HDR_VLAN_ANCHOR ||</div><div class='add'>+	    params-&gt;param_1 != MLX5_FS_INSERT_HDR_VLAN_OFFSET ||</div><div class='add'>+	    params-&gt;size != MLX5_FS_INSERT_HDR_VLAN_SIZE) {</div><div class='add'>+		mlx5_core_err(mdev, "Only vlan insert header supported\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_fs_verify_encap_decap_params(struct mlx5_core_dev *dev,</div><div class='add'>+				  struct mlx5_pkt_reformat_params *params)</div><div class='add'>+{</div><div class='add'>+	if (params-&gt;param_0 || params-&gt;param_1) {</div><div class='add'>+		mlx5_core_err(dev, "Invalid reformat params\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_fs_pool *</div><div class='add'>+mlx5_fs_get_pr_encap_pool(struct mlx5_core_dev *dev, struct xarray *pr_pools,</div><div class='add'>+			  enum mlx5hws_action_type reformat_type, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_pool *pr_pool;</div><div class='add'>+	unsigned long index = size;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pr_pool = xa_load(pr_pools, index);</div><div class='add'>+	if (pr_pool)</div><div class='add'>+		return pr_pool;</div><div class='add'>+</div><div class='add'>+	pr_pool = kzalloc(sizeof(*pr_pool), GFP_KERNEL);</div><div class='add'>+	if (!pr_pool)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	err = mlx5_fs_hws_pr_pool_init(pr_pool, dev, size, reformat_type);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_pr_pool;</div><div class='add'>+	err = xa_insert(pr_pools, index, pr_pool, GFP_KERNEL);</div><div class='add'>+	if (err)</div><div class='add'>+		goto cleanup_pr_pool;</div><div class='add'>+	return pr_pool;</div><div class='add'>+</div><div class='add'>+cleanup_pr_pool:</div><div class='add'>+	mlx5_fs_hws_pr_pool_cleanup(pr_pool);</div><div class='add'>+free_pr_pool:</div><div class='add'>+	kfree(pr_pool);</div><div class='add'>+	return ERR_PTR(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mlx5_fs_destroy_pr_pool(struct mlx5_fs_pool *pool, struct xarray *pr_pools,</div><div class='add'>+			unsigned long index)</div><div class='add'>+{</div><div class='add'>+	xa_erase(pr_pools, index);</div><div class='add'>+	mlx5_fs_hws_pr_pool_cleanup(pool);</div><div class='add'>+	kfree(pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_cmd_hws_packet_reformat_alloc(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+				   struct mlx5_pkt_reformat_params *params,</div><div class='add'>+				   enum mlx5_flow_namespace_type namespace,</div><div class='add'>+				   struct mlx5_pkt_reformat *pkt_reformat)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_context *fs_ctx = &amp;ns-&gt;fs_hws_context;</div><div class='add'>+	struct mlx5_fs_hws_actions_pool *hws_pool;</div><div class='add'>+	struct mlx5hws_action *hws_action = NULL;</div><div class='add'>+	struct mlx5_fs_hws_pr *pr_data = NULL;</div><div class='add'>+	struct mlx5_fs_pool *pr_pool = NULL;</div><div class='add'>+	struct mlx5_core_dev *dev = ns-&gt;dev;</div><div class='add'>+	u8 hdr_idx = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!params)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	hws_pool = &amp;fs_ctx-&gt;hws_pool;</div><div class='add'>+</div><div class='add'>+	switch (params-&gt;type) {</div><div class='add'>+	case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:</div><div class='add'>+	case MLX5_REFORMAT_TYPE_L2_TO_NVGRE:</div><div class='add'>+	case MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL:</div><div class='add'>+		if (mlx5_fs_verify_encap_decap_params(dev, params))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		pr_pool = mlx5_fs_get_pr_encap_pool(dev, &amp;hws_pool-&gt;el2tol2tnl_pools,</div><div class='add'>+						    MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2,</div><div class='add'>+						    params-&gt;size);</div><div class='add'>+		if (IS_ERR(pr_pool))</div><div class='add'>+			return PTR_ERR(pr_pool);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL:</div><div class='add'>+		if (mlx5_fs_verify_encap_decap_params(dev, params))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		pr_pool = mlx5_fs_get_pr_encap_pool(dev, &amp;hws_pool-&gt;el2tol3tnl_pools,</div><div class='add'>+						    MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L3,</div><div class='add'>+						    params-&gt;size);</div><div class='add'>+		if (IS_ERR(pr_pool))</div><div class='add'>+			return PTR_ERR(pr_pool);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_REFORMAT_TYPE_L3_TUNNEL_TO_L2:</div><div class='add'>+		if (mlx5_fs_verify_encap_decap_params(dev, params))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		pr_pool = &amp;hws_pool-&gt;dl3tnltol2_pool;</div><div class='add'>+		hdr_idx = params-&gt;size == ETH_HLEN ?</div><div class='add'>+			  MLX5_FS_DL3TNLTOL2_MAC_HDR_IDX :</div><div class='add'>+			  MLX5_FS_DL3TNLTOL2_MAC_VLAN_HDR_IDX;</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_REFORMAT_TYPE_INSERT_HDR:</div><div class='add'>+		err = mlx5_fs_verify_insert_header_params(dev, params);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		pr_pool = &amp;hws_pool-&gt;insert_hdr_pool;</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_REFORMAT_TYPE_REMOVE_HDR:</div><div class='add'>+		hws_action = mlx5_fs_get_action_remove_header_vlan(fs_ctx, params);</div><div class='add'>+		if (!hws_action)</div><div class='add'>+			mlx5_core_err(dev, "Only vlan remove header supported\n");</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Packet-reformat not supported(%d)\n",</div><div class='add'>+			      params-&gt;type);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pr_pool) {</div><div class='add'>+		pr_data = mlx5_fs_hws_pr_pool_acquire_pr(pr_pool);</div><div class='add'>+		if (IS_ERR_OR_NULL(pr_data))</div><div class='add'>+			return !pr_data ? -EINVAL : PTR_ERR(pr_data);</div><div class='add'>+		hws_action = pr_data-&gt;bulk-&gt;hws_action;</div><div class='add'>+		if (!hws_action) {</div><div class='add'>+			mlx5_core_err(dev,</div><div class='add'>+				      "Failed allocating packet-reformat action\n");</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto release_pr;</div><div class='add'>+		}</div><div class='add'>+		pr_data-&gt;data = kmemdup(params-&gt;data, params-&gt;size, GFP_KERNEL);</div><div class='add'>+		if (!pr_data-&gt;data) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto release_pr;</div><div class='add'>+		}</div><div class='add'>+		pr_data-&gt;hdr_idx = hdr_idx;</div><div class='add'>+		pr_data-&gt;data_size = params-&gt;size;</div><div class='add'>+		pkt_reformat-&gt;fs_hws_action.pr_data = pr_data;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;pkt_reformat-&gt;fs_hws_action.lock);</div><div class='add'>+	pkt_reformat-&gt;owner = MLX5_FLOW_RESOURCE_OWNER_HWS;</div><div class='add'>+	pkt_reformat-&gt;fs_hws_action.hws_action = hws_action;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+release_pr:</div><div class='add'>+	if (pr_pool &amp;&amp; pr_data)</div><div class='add'>+		mlx5_fs_hws_pr_pool_release_pr(pr_pool, pr_data);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_cmd_hws_packet_reformat_dealloc(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+						 struct mlx5_pkt_reformat *pkt_reformat)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_actions_pool *hws_pool = &amp;ns-&gt;fs_hws_context.hws_pool;</div><div class='add'>+	struct mlx5_core_dev *dev = ns-&gt;dev;</div><div class='add'>+	struct mlx5_fs_hws_pr *pr_data;</div><div class='add'>+	struct mlx5_fs_pool *pr_pool;</div><div class='add'>+</div><div class='add'>+	if (pkt_reformat-&gt;fs_hws_action.fw_reformat_id != 0) {</div><div class='add'>+		struct mlx5_pkt_reformat fw_pkt_reformat = { 0 };</div><div class='add'>+</div><div class='add'>+		fw_pkt_reformat.id = pkt_reformat-&gt;fs_hws_action.fw_reformat_id;</div><div class='add'>+		mlx5_fs_cmd_get_fw_cmds()-&gt;</div><div class='add'>+			packet_reformat_dealloc(ns, &amp;fw_pkt_reformat);</div><div class='add'>+		pkt_reformat-&gt;fs_hws_action.fw_reformat_id = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pkt_reformat-&gt;reformat_type == MLX5_REFORMAT_TYPE_REMOVE_HDR)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!pkt_reformat-&gt;fs_hws_action.pr_data) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed release packet-reformat\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	pr_data = pkt_reformat-&gt;fs_hws_action.pr_data;</div><div class='add'>+</div><div class='add'>+	switch (pkt_reformat-&gt;reformat_type) {</div><div class='add'>+	case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:</div><div class='add'>+	case MLX5_REFORMAT_TYPE_L2_TO_NVGRE:</div><div class='add'>+	case MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL:</div><div class='add'>+		pr_pool = mlx5_fs_get_pr_encap_pool(dev, &amp;hws_pool-&gt;el2tol2tnl_pools,</div><div class='add'>+						    MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2,</div><div class='add'>+						    pr_data-&gt;data_size);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL:</div><div class='add'>+		pr_pool = mlx5_fs_get_pr_encap_pool(dev, &amp;hws_pool-&gt;el2tol2tnl_pools,</div><div class='add'>+						    MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2,</div><div class='add'>+						    pr_data-&gt;data_size);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_REFORMAT_TYPE_L3_TUNNEL_TO_L2:</div><div class='add'>+		pr_pool = &amp;hws_pool-&gt;dl3tnltol2_pool;</div><div class='add'>+		break;</div><div class='add'>+	case MLX5_REFORMAT_TYPE_INSERT_HDR:</div><div class='add'>+		pr_pool = &amp;hws_pool-&gt;insert_hdr_pool;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Unknown packet-reformat type\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (!pkt_reformat-&gt;fs_hws_action.pr_data || IS_ERR(pr_pool)) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed release packet-reformat\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	kfree(pr_data-&gt;data);</div><div class='add'>+	mlx5_fs_hws_pr_pool_release_pr(pr_pool, pr_data);</div><div class='add'>+	pkt_reformat-&gt;fs_hws_action.pr_data = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_fs_pool *</div><div class='add'>+mlx5_fs_create_mh_pool(struct mlx5_core_dev *dev,</div><div class='add'>+		       struct mlx5hws_action_mh_pattern *pattern,</div><div class='add'>+		       struct xarray *mh_pools, unsigned long index)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_pool *pool;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pool = kzalloc(sizeof(*pool), GFP_KERNEL);</div><div class='add'>+	if (!pool)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	err = mlx5_fs_hws_mh_pool_init(pool, dev, pattern);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_pool;</div><div class='add'>+	err = xa_insert(mh_pools, index, pool, GFP_KERNEL);</div><div class='add'>+	if (err)</div><div class='add'>+		goto cleanup_pool;</div><div class='add'>+	return pool;</div><div class='add'>+</div><div class='add'>+cleanup_pool:</div><div class='add'>+	mlx5_fs_hws_mh_pool_cleanup(pool);</div><div class='add'>+free_pool:</div><div class='add'>+	kfree(pool);</div><div class='add'>+	return ERR_PTR(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mlx5_fs_destroy_mh_pool(struct mlx5_fs_pool *pool, struct xarray *mh_pools,</div><div class='add'>+			unsigned long index)</div><div class='add'>+{</div><div class='add'>+	xa_erase(mh_pools, index);</div><div class='add'>+	mlx5_fs_hws_mh_pool_cleanup(pool);</div><div class='add'>+	kfree(pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_modify_header_alloc(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					    u8 namespace, u8 num_actions,</div><div class='add'>+					    void *modify_actions,</div><div class='add'>+					    struct mlx5_modify_hdr *modify_hdr)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_actions_pool *hws_pool = &amp;ns-&gt;fs_hws_context.hws_pool;</div><div class='add'>+	struct mlx5hws_action_mh_pattern pattern = {};</div><div class='add'>+	struct mlx5_fs_hws_mh *mh_data = NULL;</div><div class='add'>+	struct mlx5hws_action *hws_action;</div><div class='add'>+	struct mlx5_fs_pool *pool;</div><div class='add'>+	unsigned long i, cnt = 0;</div><div class='add'>+	bool known_pattern;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pattern.sz = MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto) * num_actions;</div><div class='add'>+	pattern.data = modify_actions;</div><div class='add'>+</div><div class='add'>+	known_pattern = false;</div><div class='add'>+	xa_for_each(&amp;hws_pool-&gt;mh_pools, i, pool) {</div><div class='add'>+		if (mlx5_fs_hws_mh_pool_match(pool, &amp;pattern)) {</div><div class='add'>+			known_pattern = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		cnt++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!known_pattern) {</div><div class='add'>+		pool = mlx5_fs_create_mh_pool(ns-&gt;dev, &amp;pattern,</div><div class='add'>+					      &amp;hws_pool-&gt;mh_pools, cnt);</div><div class='add'>+		if (IS_ERR(pool))</div><div class='add'>+			return PTR_ERR(pool);</div><div class='add'>+	}</div><div class='add'>+	mh_data = mlx5_fs_hws_mh_pool_acquire_mh(pool);</div><div class='add'>+	if (IS_ERR(mh_data)) {</div><div class='add'>+		err = PTR_ERR(mh_data);</div><div class='add'>+		goto destroy_pool;</div><div class='add'>+	}</div><div class='add'>+	hws_action = mh_data-&gt;bulk-&gt;hws_action;</div><div class='add'>+	mh_data-&gt;data = kmemdup(pattern.data, pattern.sz, GFP_KERNEL);</div><div class='add'>+	if (!mh_data-&gt;data) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto release_mh;</div><div class='add'>+	}</div><div class='add'>+	modify_hdr-&gt;fs_hws_action.mh_data = mh_data;</div><div class='add'>+	modify_hdr-&gt;fs_hws_action.fs_pool = pool;</div><div class='add'>+	modify_hdr-&gt;owner = MLX5_FLOW_RESOURCE_OWNER_SW;</div><div class='add'>+	modify_hdr-&gt;fs_hws_action.hws_action = hws_action;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+release_mh:</div><div class='add'>+	mlx5_fs_hws_mh_pool_release_mh(pool, mh_data);</div><div class='add'>+destroy_pool:</div><div class='add'>+	if (!known_pattern)</div><div class='add'>+		mlx5_fs_destroy_mh_pool(pool, &amp;hws_pool-&gt;mh_pools, cnt);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_cmd_hws_modify_header_dealloc(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					       struct mlx5_modify_hdr *modify_hdr)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_mh *mh_data;</div><div class='add'>+	struct mlx5_fs_pool *pool;</div><div class='add'>+</div><div class='add'>+	if (!modify_hdr-&gt;fs_hws_action.fs_pool || !modify_hdr-&gt;fs_hws_action.mh_data) {</div><div class='add'>+		mlx5_core_err(ns-&gt;dev, "Failed release modify-header\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mh_data = modify_hdr-&gt;fs_hws_action.mh_data;</div><div class='add'>+	kfree(mh_data-&gt;data);</div><div class='add'>+	pool = modify_hdr-&gt;fs_hws_action.fs_pool;</div><div class='add'>+	mlx5_fs_hws_mh_pool_release_mh(pool, mh_data);</div><div class='add'>+	modify_hdr-&gt;fs_hws_action.mh_data = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+mlx5_fs_hws_action_get_pkt_reformat_id(struct mlx5_pkt_reformat *pkt_reformat,</div><div class='add'>+				       u32 *reformat_id)</div><div class='add'>+{</div><div class='add'>+	enum mlx5_flow_namespace_type ns_type = pkt_reformat-&gt;ns_type;</div><div class='add'>+	struct mutex *lock = &amp;pkt_reformat-&gt;fs_hws_action.lock;</div><div class='add'>+	u32 *id = &amp;pkt_reformat-&gt;fs_hws_action.fw_reformat_id;</div><div class='add'>+	struct mlx5_pkt_reformat fw_pkt_reformat = { 0 };</div><div class='add'>+	struct mlx5_pkt_reformat_params params = { 0 };</div><div class='add'>+	struct mlx5_flow_root_namespace *ns;</div><div class='add'>+	struct mlx5_core_dev *dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(lock);</div><div class='add'>+</div><div class='add'>+	if (*id != 0) {</div><div class='add'>+		*reformat_id = *id;</div><div class='add'>+		ret = 0;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev = mlx5hws_action_get_dev(pkt_reformat-&gt;fs_hws_action.hws_action);</div><div class='add'>+	if (!dev) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ns = mlx5_get_root_namespace(dev, ns_type);</div><div class='add'>+	if (!ns) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	params.type = pkt_reformat-&gt;reformat_type;</div><div class='add'>+	params.size = pkt_reformat-&gt;fs_hws_action.pr_data-&gt;data_size;</div><div class='add'>+	params.data = pkt_reformat-&gt;fs_hws_action.pr_data-&gt;data;</div><div class='add'>+</div><div class='add'>+	ret = mlx5_fs_cmd_get_fw_cmds()-&gt;</div><div class='add'>+		packet_reformat_alloc(ns, &amp;params, ns_type, &amp;fw_pkt_reformat);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	*id = fw_pkt_reformat.id;</div><div class='add'>+	*reformat_id = *id;</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_create_match_definer(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					     u16 format_id, u32 *match_mask)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mlx5_cmd_hws_destroy_match_definer(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					      int definer_id)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 mlx5_cmd_hws_get_capabilities(struct mlx5_flow_root_namespace *ns,</div><div class='add'>+					 enum fs_flow_table_type ft_type)</div><div class='add'>+{</div><div class='add'>+	if (ft_type != FS_FT_FDB)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return MLX5_FLOW_STEERING_CAP_VLAN_PUSH_ON_RX |</div><div class='add'>+	       MLX5_FLOW_STEERING_CAP_VLAN_POP_ON_TX |</div><div class='add'>+	       MLX5_FLOW_STEERING_CAP_MATCH_RANGES;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mlx5_fs_hws_is_supported(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	return mlx5hws_is_supported(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mlx5_flow_cmds mlx5_flow_cmds_hws = {</div><div class='add'>+	.create_flow_table = mlx5_cmd_hws_create_flow_table,</div><div class='add'>+	.destroy_flow_table = mlx5_cmd_hws_destroy_flow_table,</div><div class='add'>+	.modify_flow_table = mlx5_cmd_hws_modify_flow_table,</div><div class='add'>+	.update_root_ft = mlx5_cmd_hws_update_root_ft,</div><div class='add'>+	.create_flow_group = mlx5_cmd_hws_create_flow_group,</div><div class='add'>+	.destroy_flow_group = mlx5_cmd_hws_destroy_flow_group,</div><div class='add'>+	.create_fte = mlx5_cmd_hws_create_fte,</div><div class='add'>+	.delete_fte = mlx5_cmd_hws_delete_fte,</div><div class='add'>+	.update_fte = mlx5_cmd_hws_update_fte,</div><div class='add'>+	.packet_reformat_alloc = mlx5_cmd_hws_packet_reformat_alloc,</div><div class='add'>+	.packet_reformat_dealloc = mlx5_cmd_hws_packet_reformat_dealloc,</div><div class='add'>+	.modify_header_alloc = mlx5_cmd_hws_modify_header_alloc,</div><div class='add'>+	.modify_header_dealloc = mlx5_cmd_hws_modify_header_dealloc,</div><div class='add'>+	.create_match_definer = mlx5_cmd_hws_create_match_definer,</div><div class='add'>+	.destroy_match_definer = mlx5_cmd_hws_destroy_match_definer,</div><div class='add'>+	.create_ns = mlx5_cmd_hws_create_ns,</div><div class='add'>+	.destroy_ns = mlx5_cmd_hws_destroy_ns,</div><div class='add'>+	.set_peer = mlx5_cmd_hws_set_peer,</div><div class='add'>+	.get_capabilities = mlx5_cmd_hws_get_capabilities,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct mlx5_flow_cmds *mlx5_fs_cmd_get_hws_cmds(void)</div><div class='add'>+{</div><div class='add'>+	return &amp;mlx5_flow_cmds_hws;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h<br/>new file mode 100644<br/>index 000000000000..b92d55b2d147<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h</a></div><div class='hunk'>@@ -0,0 +1,120 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2025 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#ifndef _MLX5_FS_HWS_</div><div class='add'>+#define _MLX5_FS_HWS_</div><div class='add'>+</div><div class='add'>+#include "mlx5hws.h"</div><div class='add'>+#include "fs_hws_pools.h"</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_actions_pool {</div><div class='add'>+	struct mlx5hws_action *tag_action;</div><div class='add'>+	struct mlx5hws_action *pop_vlan_action;</div><div class='add'>+	struct mlx5hws_action *push_vlan_action;</div><div class='add'>+	struct mlx5hws_action *drop_action;</div><div class='add'>+	struct mlx5hws_action *decapl2_action;</div><div class='add'>+	struct mlx5hws_action *remove_hdr_vlan_action;</div><div class='add'>+	struct mlx5_fs_pool insert_hdr_pool;</div><div class='add'>+	struct mlx5_fs_pool dl3tnltol2_pool;</div><div class='add'>+	struct xarray el2tol3tnl_pools;</div><div class='add'>+	struct xarray el2tol2tnl_pools;</div><div class='add'>+	struct xarray mh_pools;</div><div class='add'>+	struct xarray table_dests;</div><div class='add'>+	struct xarray vport_vhca_dests;</div><div class='add'>+	struct xarray vport_dests;</div><div class='add'>+	struct xarray aso_meters;</div><div class='add'>+	struct xarray sample_dests;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_context {</div><div class='add'>+	struct mlx5hws_context	*hws_ctx;</div><div class='add'>+	struct mlx5_fs_hws_actions_pool hws_pool;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_table {</div><div class='add'>+	struct mlx5hws_table *hws_table;</div><div class='add'>+	bool miss_ft_set;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_action {</div><div class='add'>+	struct mlx5hws_action *hws_action;</div><div class='add'>+	struct mlx5_fs_pool *fs_pool;</div><div class='add'>+	struct mlx5_fs_hws_pr *pr_data;</div><div class='add'>+	struct mlx5_fs_hws_mh *mh_data;</div><div class='add'>+	u32 fw_reformat_id;</div><div class='add'>+	/* Protect `fw_reformat_id` against being initialized from multiple</div><div class='add'>+	 * threads.</div><div class='add'>+	 */</div><div class='add'>+	struct mutex lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_matcher {</div><div class='add'>+	struct mlx5hws_bwc_matcher *matcher;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_rule_action {</div><div class='add'>+	struct mlx5hws_action *action;</div><div class='add'>+	union {</div><div class='add'>+		struct mlx5_fc *counter;</div><div class='add'>+		struct mlx5_exe_aso *exe_aso;</div><div class='add'>+		u32 sampler_id;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_rule {</div><div class='add'>+	struct mlx5hws_bwc_rule *bwc_rule;</div><div class='add'>+	struct mlx5_fs_hws_rule_action *hws_fs_actions;</div><div class='add'>+	int num_fs_actions;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_data {</div><div class='add'>+	struct mlx5hws_action *hws_action;</div><div class='add'>+	struct mutex lock; /* protects hws_action */</div><div class='add'>+	refcount_t hws_action_refcount;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_create_action_ctx {</div><div class='add'>+	enum mlx5hws_action_type actions_type;</div><div class='add'>+	struct mlx5hws_context *hws_ctx;</div><div class='add'>+	u32 id;</div><div class='add'>+	union {</div><div class='add'>+		u8 return_reg_id;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5hws_action *</div><div class='add'>+mlx5_fs_get_hws_action(struct mlx5_fs_hws_data *fs_hws_data,</div><div class='add'>+		       struct mlx5_fs_hws_create_action_ctx *create_ctx);</div><div class='add'>+void mlx5_fs_put_hws_action(struct mlx5_fs_hws_data *fs_hws_data);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_MLX5_HW_STEERING</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+mlx5_fs_hws_action_get_pkt_reformat_id(struct mlx5_pkt_reformat *pkt_reformat,</div><div class='add'>+				       u32 *reformat_id);</div><div class='add'>+</div><div class='add'>+bool mlx5_fs_hws_is_supported(struct mlx5_core_dev *dev);</div><div class='add'>+</div><div class='add'>+const struct mlx5_flow_cmds *mlx5_fs_cmd_get_hws_cmds(void);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mlx5_fs_hws_action_get_pkt_reformat_id(struct mlx5_pkt_reformat *pkt_reformat,</div><div class='add'>+				       u32 *reformat_id)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mlx5_fs_hws_is_supported(struct mlx5_core_dev *dev)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline const struct mlx5_flow_cmds *mlx5_fs_cmd_get_hws_cmds(void)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_MLX5_HWS_STEERING */</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c<br/>new file mode 100644<br/>index 000000000000..839d71bd4216<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c</a></div><div class='hunk'>@@ -0,0 +1,427 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2025 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#include &lt;mlx5_core.h&gt;</div><div class='add'>+#include "fs_hws_pools.h"</div><div class='add'>+</div><div class='add'>+#define MLX5_FS_HWS_DEFAULT_BULK_LEN 65536</div><div class='add'>+#define MLX5_FS_HWS_POOL_MAX_THRESHOLD BIT(18)</div><div class='add'>+#define MLX5_FS_HWS_POOL_USED_BUFF_RATIO 10</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_dl3tnltol2_bulk_action_create(struct mlx5hws_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_reformat_header reformat_hdr[2] = {};</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB;</div><div class='add'>+	enum mlx5hws_action_type reformat_type;</div><div class='add'>+	u32 log_bulk_size;</div><div class='add'>+</div><div class='add'>+	reformat_type = MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2;</div><div class='add'>+	reformat_hdr[MLX5_FS_DL3TNLTOL2_MAC_HDR_IDX].sz = ETH_HLEN;</div><div class='add'>+	reformat_hdr[MLX5_FS_DL3TNLTOL2_MAC_VLAN_HDR_IDX].sz = ETH_HLEN + VLAN_HLEN;</div><div class='add'>+</div><div class='add'>+	log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN);</div><div class='add'>+	return mlx5hws_action_create_reformat(ctx, reformat_type, 2,</div><div class='add'>+					      reformat_hdr, log_bulk_size, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_el2tol3tnl_bulk_action_create(struct mlx5hws_context *ctx, size_t data_size)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_reformat_header reformat_hdr = {};</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB;</div><div class='add'>+	enum mlx5hws_action_type reformat_type;</div><div class='add'>+	u32 log_bulk_size;</div><div class='add'>+</div><div class='add'>+	reformat_type = MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L3;</div><div class='add'>+	reformat_hdr.sz = data_size;</div><div class='add'>+</div><div class='add'>+	log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN);</div><div class='add'>+	return mlx5hws_action_create_reformat(ctx, reformat_type, 1,</div><div class='add'>+					      &amp;reformat_hdr, log_bulk_size, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_el2tol2tnl_bulk_action_create(struct mlx5hws_context *ctx, size_t data_size)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_reformat_header reformat_hdr = {};</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB;</div><div class='add'>+	enum mlx5hws_action_type reformat_type;</div><div class='add'>+	u32 log_bulk_size;</div><div class='add'>+</div><div class='add'>+	reformat_type = MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;</div><div class='add'>+	reformat_hdr.sz = data_size;</div><div class='add'>+</div><div class='add'>+	log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN);</div><div class='add'>+	return mlx5hws_action_create_reformat(ctx, reformat_type, 1,</div><div class='add'>+					      &amp;reformat_hdr, log_bulk_size, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_insert_hdr_bulk_action_create(struct mlx5hws_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_insert_header insert_hdr = {};</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB;</div><div class='add'>+	u32 log_bulk_size;</div><div class='add'>+</div><div class='add'>+	log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN);</div><div class='add'>+	insert_hdr.hdr.sz = MLX5_FS_INSERT_HDR_VLAN_SIZE;</div><div class='add'>+	insert_hdr.anchor = MLX5_FS_INSERT_HDR_VLAN_ANCHOR;</div><div class='add'>+	insert_hdr.offset = MLX5_FS_INSERT_HDR_VLAN_OFFSET;</div><div class='add'>+</div><div class='add'>+	return mlx5hws_action_create_insert_header(ctx, 1, &amp;insert_hdr,</div><div class='add'>+						   log_bulk_size, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_pr_bulk_action_create(struct mlx5_core_dev *dev,</div><div class='add'>+			      struct mlx5_fs_hws_pr_pool_ctx *pr_pool_ctx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_flow_root_namespace *root_ns;</div><div class='add'>+	struct mlx5hws_context *ctx;</div><div class='add'>+	size_t encap_data_size;</div><div class='add'>+</div><div class='add'>+	root_ns = mlx5_get_root_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);</div><div class='add'>+	if (!root_ns || root_ns-&gt;mode != MLX5_FLOW_STEERING_MODE_HMFS)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ctx = root_ns-&gt;fs_hws_context.hws_ctx;</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	encap_data_size = pr_pool_ctx-&gt;encap_data_size;</div><div class='add'>+	switch (pr_pool_ctx-&gt;reformat_type) {</div><div class='add'>+	case MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:</div><div class='add'>+		return mlx5_fs_dl3tnltol2_bulk_action_create(ctx);</div><div class='add'>+	case MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L3:</div><div class='add'>+		return mlx5_fs_el2tol3tnl_bulk_action_create(ctx, encap_data_size);</div><div class='add'>+	case MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2:</div><div class='add'>+		return mlx5_fs_el2tol2tnl_bulk_action_create(ctx, encap_data_size);</div><div class='add'>+	case MLX5HWS_ACTION_TYP_INSERT_HEADER:</div><div class='add'>+		return mlx5_fs_insert_hdr_bulk_action_create(ctx);</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_fs_bulk *</div><div class='add'>+mlx5_fs_hws_pr_bulk_create(struct mlx5_core_dev *dev, void *pool_ctx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_pr_pool_ctx *pr_pool_ctx;</div><div class='add'>+	struct mlx5_fs_hws_pr_bulk *pr_bulk;</div><div class='add'>+	int bulk_len;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!pool_ctx)</div><div class='add'>+		return NULL;</div><div class='add'>+	pr_pool_ctx = pool_ctx;</div><div class='add'>+	bulk_len = MLX5_FS_HWS_DEFAULT_BULK_LEN;</div><div class='add'>+	pr_bulk = kvzalloc(struct_size(pr_bulk, prs_data, bulk_len), GFP_KERNEL);</div><div class='add'>+	if (!pr_bulk)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (mlx5_fs_bulk_init(dev, &amp;pr_bulk-&gt;fs_bulk, bulk_len))</div><div class='add'>+		goto free_pr_bulk;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bulk_len; i++) {</div><div class='add'>+		pr_bulk-&gt;prs_data[i].bulk = pr_bulk;</div><div class='add'>+		pr_bulk-&gt;prs_data[i].offset = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_bulk-&gt;hws_action = mlx5_fs_pr_bulk_action_create(dev, pr_pool_ctx);</div><div class='add'>+	if (!pr_bulk-&gt;hws_action)</div><div class='add'>+		goto cleanup_fs_bulk;</div><div class='add'>+</div><div class='add'>+	return &amp;pr_bulk-&gt;fs_bulk;</div><div class='add'>+</div><div class='add'>+cleanup_fs_bulk:</div><div class='add'>+	mlx5_fs_bulk_cleanup(&amp;pr_bulk-&gt;fs_bulk);</div><div class='add'>+free_pr_bulk:</div><div class='add'>+	kvfree(pr_bulk);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_fs_hws_pr_bulk_destroy(struct mlx5_core_dev *dev, struct mlx5_fs_bulk *fs_bulk)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_pr_bulk *pr_bulk;</div><div class='add'>+</div><div class='add'>+	pr_bulk = container_of(fs_bulk, struct mlx5_fs_hws_pr_bulk, fs_bulk);</div><div class='add'>+	if (mlx5_fs_bulk_get_free_amount(fs_bulk) &lt; fs_bulk-&gt;bulk_len) {</div><div class='add'>+		mlx5_core_err(dev, "Freeing bulk before all reformats were released\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5hws_action_destroy(pr_bulk-&gt;hws_action);</div><div class='add'>+	mlx5_fs_bulk_cleanup(fs_bulk);</div><div class='add'>+	kvfree(pr_bulk);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_hws_pool_update_threshold(struct mlx5_fs_pool *hws_pool)</div><div class='add'>+{</div><div class='add'>+	hws_pool-&gt;threshold = min_t(int, MLX5_FS_HWS_POOL_MAX_THRESHOLD,</div><div class='add'>+				    hws_pool-&gt;used_units / MLX5_FS_HWS_POOL_USED_BUFF_RATIO);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mlx5_fs_pool_ops mlx5_fs_hws_pr_pool_ops = {</div><div class='add'>+	.bulk_create = mlx5_fs_hws_pr_bulk_create,</div><div class='add'>+	.bulk_destroy = mlx5_fs_hws_pr_bulk_destroy,</div><div class='add'>+	.update_threshold = mlx5_hws_pool_update_threshold,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mlx5_fs_hws_pr_pool_init(struct mlx5_fs_pool *pr_pool,</div><div class='add'>+			     struct mlx5_core_dev *dev, size_t encap_data_size,</div><div class='add'>+			     enum mlx5hws_action_type reformat_type)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_pr_pool_ctx *pr_pool_ctx;</div><div class='add'>+</div><div class='add'>+	if (reformat_type != MLX5HWS_ACTION_TYP_INSERT_HEADER &amp;&amp;</div><div class='add'>+	    reformat_type != MLX5HWS_ACTION_TYP_REFORMAT_TNL_L3_TO_L2 &amp;&amp;</div><div class='add'>+	    reformat_type != MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L3 &amp;&amp;</div><div class='add'>+	    reformat_type != MLX5HWS_ACTION_TYP_REFORMAT_L2_TO_TNL_L2)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	pr_pool_ctx = kzalloc(sizeof(*pr_pool_ctx), GFP_KERNEL);</div><div class='add'>+	if (!pr_pool_ctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	pr_pool_ctx-&gt;reformat_type = reformat_type;</div><div class='add'>+	pr_pool_ctx-&gt;encap_data_size = encap_data_size;</div><div class='add'>+	mlx5_fs_pool_init(pr_pool, dev, &amp;mlx5_fs_hws_pr_pool_ops, pr_pool_ctx);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_fs_hws_pr_pool_cleanup(struct mlx5_fs_pool *pr_pool)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_pr_pool_ctx *pr_pool_ctx;</div><div class='add'>+</div><div class='add'>+	mlx5_fs_pool_cleanup(pr_pool);</div><div class='add'>+	pr_pool_ctx = pr_pool-&gt;pool_ctx;</div><div class='add'>+	if (!pr_pool_ctx)</div><div class='add'>+		return;</div><div class='add'>+	kfree(pr_pool_ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_pr *</div><div class='add'>+mlx5_fs_hws_pr_pool_acquire_pr(struct mlx5_fs_pool *pr_pool)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_pool_index pool_index = {};</div><div class='add'>+	struct mlx5_fs_hws_pr_bulk *pr_bulk;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_fs_pool_acquire_index(pr_pool, &amp;pool_index);</div><div class='add'>+	if (err)</div><div class='add'>+		return ERR_PTR(err);</div><div class='add'>+	pr_bulk = container_of(pool_index.fs_bulk, struct mlx5_fs_hws_pr_bulk,</div><div class='add'>+			       fs_bulk);</div><div class='add'>+	return &amp;pr_bulk-&gt;prs_data[pool_index.index];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_fs_hws_pr_pool_release_pr(struct mlx5_fs_pool *pr_pool,</div><div class='add'>+				    struct mlx5_fs_hws_pr *pr_data)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_bulk *fs_bulk = &amp;pr_data-&gt;bulk-&gt;fs_bulk;</div><div class='add'>+	struct mlx5_fs_pool_index pool_index = {};</div><div class='add'>+	struct mlx5_core_dev *dev = pr_pool-&gt;dev;</div><div class='add'>+</div><div class='add'>+	pool_index.fs_bulk = fs_bulk;</div><div class='add'>+	pool_index.index = pr_data-&gt;offset;</div><div class='add'>+	if (mlx5_fs_pool_release_index(pr_pool, &amp;pool_index))</div><div class='add'>+		mlx5_core_warn(dev, "Attempted to release packet reformat which is not acquired\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mlx5hws_action *mlx5_fs_hws_pr_get_action(struct mlx5_fs_hws_pr *pr_data)</div><div class='add'>+{</div><div class='add'>+	return pr_data-&gt;bulk-&gt;hws_action;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_action *</div><div class='add'>+mlx5_fs_mh_bulk_action_create(struct mlx5hws_context *ctx,</div><div class='add'>+			      struct mlx5hws_action_mh_pattern *pattern)</div><div class='add'>+{</div><div class='add'>+	u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB;</div><div class='add'>+	u32 log_bulk_size;</div><div class='add'>+</div><div class='add'>+	log_bulk_size = ilog2(MLX5_FS_HWS_DEFAULT_BULK_LEN);</div><div class='add'>+	return mlx5hws_action_create_modify_header(ctx, 1, pattern,</div><div class='add'>+						   log_bulk_size, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5_fs_bulk *</div><div class='add'>+mlx5_fs_hws_mh_bulk_create(struct mlx5_core_dev *dev, void *pool_ctx)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_mh_pattern *pattern;</div><div class='add'>+	struct mlx5_flow_root_namespace *root_ns;</div><div class='add'>+	struct mlx5_fs_hws_mh_bulk *mh_bulk;</div><div class='add'>+	struct mlx5hws_context *ctx;</div><div class='add'>+	int bulk_len;</div><div class='add'>+</div><div class='add'>+	if (!pool_ctx)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	root_ns = mlx5_get_root_namespace(dev, MLX5_FLOW_NAMESPACE_FDB);</div><div class='add'>+	if (!root_ns || root_ns-&gt;mode != MLX5_FLOW_STEERING_MODE_HMFS)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ctx = root_ns-&gt;fs_hws_context.hws_ctx;</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	pattern = pool_ctx;</div><div class='add'>+	bulk_len = MLX5_FS_HWS_DEFAULT_BULK_LEN;</div><div class='add'>+	mh_bulk = kvzalloc(struct_size(mh_bulk, mhs_data, bulk_len), GFP_KERNEL);</div><div class='add'>+	if (!mh_bulk)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (mlx5_fs_bulk_init(dev, &amp;mh_bulk-&gt;fs_bulk, bulk_len))</div><div class='add'>+		goto free_mh_bulk;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; bulk_len; i++) {</div><div class='add'>+		mh_bulk-&gt;mhs_data[i].bulk = mh_bulk;</div><div class='add'>+		mh_bulk-&gt;mhs_data[i].offset = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mh_bulk-&gt;hws_action = mlx5_fs_mh_bulk_action_create(ctx, pattern);</div><div class='add'>+	if (!mh_bulk-&gt;hws_action)</div><div class='add'>+		goto cleanup_fs_bulk;</div><div class='add'>+</div><div class='add'>+	return &amp;mh_bulk-&gt;fs_bulk;</div><div class='add'>+</div><div class='add'>+cleanup_fs_bulk:</div><div class='add'>+	mlx5_fs_bulk_cleanup(&amp;mh_bulk-&gt;fs_bulk);</div><div class='add'>+free_mh_bulk:</div><div class='add'>+	kvfree(mh_bulk);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mlx5_fs_hws_mh_bulk_destroy(struct mlx5_core_dev *dev,</div><div class='add'>+			    struct mlx5_fs_bulk *fs_bulk)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_mh_bulk *mh_bulk;</div><div class='add'>+</div><div class='add'>+	mh_bulk = container_of(fs_bulk, struct mlx5_fs_hws_mh_bulk, fs_bulk);</div><div class='add'>+	if (mlx5_fs_bulk_get_free_amount(fs_bulk) &lt; fs_bulk-&gt;bulk_len) {</div><div class='add'>+		mlx5_core_err(dev, "Freeing bulk before all modify header were released\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5hws_action_destroy(mh_bulk-&gt;hws_action);</div><div class='add'>+	mlx5_fs_bulk_cleanup(fs_bulk);</div><div class='add'>+	kvfree(mh_bulk);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mlx5_fs_pool_ops mlx5_fs_hws_mh_pool_ops = {</div><div class='add'>+	.bulk_create = mlx5_fs_hws_mh_bulk_create,</div><div class='add'>+	.bulk_destroy = mlx5_fs_hws_mh_bulk_destroy,</div><div class='add'>+	.update_threshold = mlx5_hws_pool_update_threshold,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mlx5_fs_hws_mh_pool_init(struct mlx5_fs_pool *fs_hws_mh_pool,</div><div class='add'>+			     struct mlx5_core_dev *dev,</div><div class='add'>+			     struct mlx5hws_action_mh_pattern *pattern)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_mh_pattern *pool_pattern;</div><div class='add'>+</div><div class='add'>+	pool_pattern = kzalloc(sizeof(*pool_pattern), GFP_KERNEL);</div><div class='add'>+	if (!pool_pattern)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	pool_pattern-&gt;data = kmemdup(pattern-&gt;data, pattern-&gt;sz, GFP_KERNEL);</div><div class='add'>+	if (!pool_pattern-&gt;data) {</div><div class='add'>+		kfree(pool_pattern);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	pool_pattern-&gt;sz = pattern-&gt;sz;</div><div class='add'>+	mlx5_fs_pool_init(fs_hws_mh_pool, dev, &amp;mlx5_fs_hws_mh_pool_ops,</div><div class='add'>+			  pool_pattern);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_fs_hws_mh_pool_cleanup(struct mlx5_fs_pool *fs_hws_mh_pool)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_mh_pattern *pool_pattern;</div><div class='add'>+</div><div class='add'>+	mlx5_fs_pool_cleanup(fs_hws_mh_pool);</div><div class='add'>+	pool_pattern = fs_hws_mh_pool-&gt;pool_ctx;</div><div class='add'>+	if (!pool_pattern)</div><div class='add'>+		return;</div><div class='add'>+	kfree(pool_pattern-&gt;data);</div><div class='add'>+	kfree(pool_pattern);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_mh *</div><div class='add'>+mlx5_fs_hws_mh_pool_acquire_mh(struct mlx5_fs_pool *mh_pool)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_pool_index pool_index = {};</div><div class='add'>+	struct mlx5_fs_hws_mh_bulk *mh_bulk;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mlx5_fs_pool_acquire_index(mh_pool, &amp;pool_index);</div><div class='add'>+	if (err)</div><div class='add'>+		return ERR_PTR(err);</div><div class='add'>+	mh_bulk = container_of(pool_index.fs_bulk, struct mlx5_fs_hws_mh_bulk,</div><div class='add'>+			       fs_bulk);</div><div class='add'>+	return &amp;mh_bulk-&gt;mhs_data[pool_index.index];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_fs_hws_mh_pool_release_mh(struct mlx5_fs_pool *mh_pool,</div><div class='add'>+				    struct mlx5_fs_hws_mh *mh_data)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_bulk *fs_bulk = &amp;mh_data-&gt;bulk-&gt;fs_bulk;</div><div class='add'>+	struct mlx5_fs_pool_index pool_index = {};</div><div class='add'>+	struct mlx5_core_dev *dev = mh_pool-&gt;dev;</div><div class='add'>+</div><div class='add'>+	pool_index.fs_bulk = fs_bulk;</div><div class='add'>+	pool_index.index = mh_data-&gt;offset;</div><div class='add'>+	if (mlx5_fs_pool_release_index(mh_pool, &amp;pool_index))</div><div class='add'>+		mlx5_core_warn(dev, "Attempted to release modify header which is not acquired\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mlx5_fs_hws_mh_pool_match(struct mlx5_fs_pool *mh_pool,</div><div class='add'>+			       struct mlx5hws_action_mh_pattern *pattern)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_action_mh_pattern *pool_pattern;</div><div class='add'>+	int num_actions, i;</div><div class='add'>+</div><div class='add'>+	pool_pattern = mh_pool-&gt;pool_ctx;</div><div class='add'>+	if (WARN_ON_ONCE(!pool_pattern))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (pattern-&gt;sz != pool_pattern-&gt;sz)</div><div class='add'>+		return false;</div><div class='add'>+	num_actions = pattern-&gt;sz / MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto);</div><div class='add'>+	for (i = 0; i &lt; num_actions; i++) {</div><div class='add'>+		if ((__force __be32)pattern-&gt;data[i] !=</div><div class='add'>+		    (__force __be32)pool_pattern-&gt;data[i])</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mlx5hws_action *mlx5_fc_get_hws_action(struct mlx5hws_context *ctx,</div><div class='add'>+					      struct mlx5_fc *counter)</div><div class='add'>+{</div><div class='add'>+	struct mlx5_fs_hws_create_action_ctx create_ctx;</div><div class='add'>+	struct mlx5_fc_bulk *fc_bulk = counter-&gt;bulk;</div><div class='add'>+	struct mlx5hws_action *hws_action;</div><div class='add'>+</div><div class='add'>+	create_ctx.hws_ctx = ctx;</div><div class='add'>+	create_ctx.id = fc_bulk-&gt;base_id;</div><div class='add'>+	create_ctx.actions_type = MLX5HWS_ACTION_TYP_CTR;</div><div class='add'>+</div><div class='add'>+	mlx5_fc_local_get(counter);</div><div class='add'>+	hws_action = mlx5_fs_get_hws_action(&amp;fc_bulk-&gt;hws_data, &amp;create_ctx);</div><div class='add'>+	if (!hws_action)</div><div class='add'>+		mlx5_fc_local_put(counter);</div><div class='add'>+	return hws_action;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5_fc_put_hws_action(struct mlx5_fc *counter)</div><div class='add'>+{</div><div class='add'>+	mlx5_fs_put_hws_action(&amp;counter-&gt;bulk-&gt;hws_data);</div><div class='add'>+	mlx5_fc_local_put(counter);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.h<br/>new file mode 100644<br/>index 000000000000..34072551dd21<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.h</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2025 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#ifndef __MLX5_FS_HWS_POOLS_H__</div><div class='add'>+#define __MLX5_FS_HWS_POOLS_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include "fs_pool.h"</div><div class='add'>+#include "fs_core.h"</div><div class='add'>+</div><div class='add'>+#define MLX5_FS_INSERT_HDR_VLAN_ANCHOR MLX5_REFORMAT_CONTEXT_ANCHOR_MAC_START</div><div class='add'>+#define MLX5_FS_INSERT_HDR_VLAN_OFFSET offsetof(struct vlan_ethhdr, h_vlan_proto)</div><div class='add'>+#define MLX5_FS_INSERT_HDR_VLAN_SIZE sizeof(struct vlan_hdr)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	MLX5_FS_DL3TNLTOL2_MAC_HDR_IDX = 0,</div><div class='add'>+	MLX5_FS_DL3TNLTOL2_MAC_VLAN_HDR_IDX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_pr {</div><div class='add'>+	struct mlx5_fs_hws_pr_bulk *bulk;</div><div class='add'>+	u32 offset;</div><div class='add'>+	u8 hdr_idx;</div><div class='add'>+	u8 *data;</div><div class='add'>+	size_t data_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_pr_bulk {</div><div class='add'>+	struct mlx5_fs_bulk fs_bulk;</div><div class='add'>+	struct mlx5hws_action *hws_action;</div><div class='add'>+	struct mlx5_fs_hws_pr prs_data[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_pr_pool_ctx {</div><div class='add'>+	enum mlx5hws_action_type reformat_type;</div><div class='add'>+	size_t encap_data_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_mh {</div><div class='add'>+	struct mlx5_fs_hws_mh_bulk *bulk;</div><div class='add'>+	u32 offset;</div><div class='add'>+	u8 *data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_mh_bulk {</div><div class='add'>+	struct mlx5_fs_bulk fs_bulk;</div><div class='add'>+	struct mlx5_fs_pool *mh_pool;</div><div class='add'>+	struct mlx5hws_action *hws_action;</div><div class='add'>+	struct mlx5_fs_hws_mh mhs_data[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mlx5_fs_hws_pr_pool_init(struct mlx5_fs_pool *pr_pool,</div><div class='add'>+			     struct mlx5_core_dev *dev, size_t encap_data_size,</div><div class='add'>+			     enum mlx5hws_action_type reformat_type);</div><div class='add'>+void mlx5_fs_hws_pr_pool_cleanup(struct mlx5_fs_pool *pr_pool);</div><div class='add'>+</div><div class='add'>+struct mlx5_fs_hws_pr *mlx5_fs_hws_pr_pool_acquire_pr(struct mlx5_fs_pool *pr_pool);</div><div class='add'>+void mlx5_fs_hws_pr_pool_release_pr(struct mlx5_fs_pool *pr_pool,</div><div class='add'>+				    struct mlx5_fs_hws_pr *pr_data);</div><div class='add'>+struct mlx5hws_action *mlx5_fs_hws_pr_get_action(struct mlx5_fs_hws_pr *pr_data);</div><div class='add'>+int mlx5_fs_hws_mh_pool_init(struct mlx5_fs_pool *fs_hws_mh_pool,</div><div class='add'>+			     struct mlx5_core_dev *dev,</div><div class='add'>+			     struct mlx5hws_action_mh_pattern *pattern);</div><div class='add'>+void mlx5_fs_hws_mh_pool_cleanup(struct mlx5_fs_pool *fs_hws_mh_pool);</div><div class='add'>+struct mlx5_fs_hws_mh *mlx5_fs_hws_mh_pool_acquire_mh(struct mlx5_fs_pool *mh_pool);</div><div class='add'>+void mlx5_fs_hws_mh_pool_release_mh(struct mlx5_fs_pool *mh_pool,</div><div class='add'>+				    struct mlx5_fs_hws_mh *mh_data);</div><div class='add'>+bool mlx5_fs_hws_mh_pool_match(struct mlx5_fs_pool *mh_pool,</div><div class='add'>+			       struct mlx5hws_action_mh_pattern *pattern);</div><div class='add'>+struct mlx5hws_action *mlx5_fc_get_hws_action(struct mlx5hws_context *ctx,</div><div class='add'>+					      struct mlx5_fc *counter);</div><div class='add'>+void mlx5_fc_put_hws_action(struct mlx5_fc *counter);</div><div class='add'>+#endif /* __MLX5_FS_HWS_POOLS_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_internal.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/internal.h<br/>index 5643be1cd5bf..21279d503117 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_internal.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_internal.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/internal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/internal.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#ifndef MLX5HWS_INTERNAL_H_</div><div class='del'>-#define MLX5HWS_INTERNAL_H_</div><div class='add'>+#ifndef HWS_INTERNAL_H_</div><div class='add'>+#define HWS_INTERNAL_H_</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mlx5/transobj.h&gt;</div><div class='ctx'> #include &lt;linux/mlx5/vport.h&gt;</div><div class='hunk'>@@ -10,22 +10,23 @@</div><div class='ctx'> #include "wq.h"</div><div class='ctx'> #include "lib/mlx5.h"</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_prm.h"</div><div class='add'>+#include "prm.h"</div><div class='ctx'> #include "mlx5hws.h"</div><div class='del'>-#include "mlx5hws_pool.h"</div><div class='del'>-#include "mlx5hws_vport.h"</div><div class='del'>-#include "mlx5hws_context.h"</div><div class='del'>-#include "mlx5hws_table.h"</div><div class='del'>-#include "mlx5hws_send.h"</div><div class='del'>-#include "mlx5hws_rule.h"</div><div class='del'>-#include "mlx5hws_cmd.h"</div><div class='del'>-#include "mlx5hws_action.h"</div><div class='del'>-#include "mlx5hws_definer.h"</div><div class='del'>-#include "mlx5hws_matcher.h"</div><div class='del'>-#include "mlx5hws_debug.h"</div><div class='del'>-#include "mlx5hws_pat_arg.h"</div><div class='del'>-#include "mlx5hws_bwc.h"</div><div class='del'>-#include "mlx5hws_bwc_complex.h"</div><div class='add'>+#include "pool.h"</div><div class='add'>+#include "vport.h"</div><div class='add'>+#include "context.h"</div><div class='add'>+#include "table.h"</div><div class='add'>+#include "send.h"</div><div class='add'>+#include "action_ste_pool.h"</div><div class='add'>+#include "rule.h"</div><div class='add'>+#include "cmd.h"</div><div class='add'>+#include "action.h"</div><div class='add'>+#include "definer.h"</div><div class='add'>+#include "matcher.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+#include "pat_arg.h"</div><div class='add'>+#include "bwc.h"</div><div class='add'>+#include "bwc_complex.h"</div><div class='ctx'> </div><div class='ctx'> #define W_SIZE		2</div><div class='ctx'> #define DW_SIZE		4</div><div class='hunk'>@@ -39,7 +40,6 @@</div><div class='ctx'> #define mlx5hws_dbg(ctx, arg...) mlx5_core_dbg((ctx)-&gt;mdev, ##arg)</div><div class='ctx'> </div><div class='ctx'> #define MLX5HWS_TABLE_TYPE_BASE 2</div><div class='del'>-#define MLX5HWS_ACTION_STE_IDX_ANY 0</div><div class='ctx'> </div><div class='ctx'> static inline bool is_mem_zero(const u8 *mem, size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -56,4 +56,4 @@ static inline unsigned long align(unsigned long val, unsigned long align)</div><div class='ctx'> 	return (val + align - 1) &amp; ~(align - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* MLX5HWS_INTERNAL_H_ */</div><div class='add'>+#endif /* HWS_INTERNAL_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_matcher.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c<br/>index 61a1155d4b4f..32f87fdf3213 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_matcher.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_matcher.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c</a></div><div class='hunk'>@@ -1,26 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='del'>-</div><div class='del'>-enum mlx5hws_matcher_rtc_type {</div><div class='del'>-	HWS_MATCHER_RTC_TYPE_MATCH,</div><div class='del'>-	HWS_MATCHER_RTC_TYPE_STE_ARRAY,</div><div class='del'>-	HWS_MATCHER_RTC_TYPE_MAX,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const char * const mlx5hws_matcher_rtc_type_str[] = {</div><div class='del'>-	[HWS_MATCHER_RTC_TYPE_MATCH] = "MATCH",</div><div class='del'>-	[HWS_MATCHER_RTC_TYPE_STE_ARRAY] = "STE_ARRAY",</div><div class='del'>-	[HWS_MATCHER_RTC_TYPE_MAX] = "UNKNOWN",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const char *hws_matcher_rtc_type_to_str(enum mlx5hws_matcher_rtc_type rtc_type)</div><div class='del'>-{</div><div class='del'>-	if (rtc_type &gt; HWS_MATCHER_RTC_TYPE_MAX)</div><div class='del'>-		rtc_type = HWS_MATCHER_RTC_TYPE_MAX;</div><div class='del'>-	return mlx5hws_matcher_rtc_type_str[rtc_type];</div><div class='del'>-}</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> static bool hws_matcher_requires_col_tbl(u8 log_num_of_rules)</div><div class='ctx'> {</div><div class='hunk'>@@ -42,19 +23,202 @@ static void hws_matcher_destroy_end_ft(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 	mlx5hws_table_destroy_default_ft(matcher-&gt;tbl, matcher-&gt;end_ft_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mlx5hws_matcher_update_end_ft_isolated(struct mlx5hws_table *tbl,</div><div class='add'>+					   u32 miss_ft_id)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_matcher *tmp_matcher;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;tbl-&gt;matchers_list))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Update isolated_matcher_end_ft_id attribute for all</div><div class='add'>+	 * the matchers in isolated table.</div><div class='add'>+	 */</div><div class='add'>+	list_for_each_entry(tmp_matcher, &amp;tbl-&gt;matchers_list, list_node)</div><div class='add'>+		tmp_matcher-&gt;attr.isolated_matcher_end_ft_id = miss_ft_id;</div><div class='add'>+</div><div class='add'>+	tmp_matcher = list_last_entry(&amp;tbl-&gt;matchers_list,</div><div class='add'>+				      struct mlx5hws_matcher,</div><div class='add'>+				      list_node);</div><div class='add'>+</div><div class='add'>+	return mlx5hws_table_ft_set_next_ft(tbl-&gt;ctx,</div><div class='add'>+					    tmp_matcher-&gt;end_ft_id,</div><div class='add'>+					    tbl-&gt;fw_ft_type,</div><div class='add'>+					    miss_ft_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_matcher_connect_end_ft_isolated(struct mlx5hws_matcher *matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='add'>+	u32 end_ft_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Reset end_ft next RTCs */</div><div class='add'>+	ret = mlx5hws_table_ft_set_next_rtc(tbl-&gt;ctx,</div><div class='add'>+					    matcher-&gt;end_ft_id,</div><div class='add'>+					    matcher-&gt;tbl-&gt;fw_ft_type,</div><div class='add'>+					    0, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(tbl-&gt;ctx, "Isolated matcher: failed to reset FT's next RTCs\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Connect isolated matcher's end_ft to the complex matcher's end FT */</div><div class='add'>+	end_ft_id = matcher-&gt;attr.isolated_matcher_end_ft_id;</div><div class='add'>+	ret = mlx5hws_table_ft_set_next_ft(tbl-&gt;ctx,</div><div class='add'>+					   matcher-&gt;end_ft_id,</div><div class='add'>+					   matcher-&gt;tbl-&gt;fw_ft_type,</div><div class='add'>+					   end_ft_id);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(tbl-&gt;ctx, "Isolated matcher: failed to set FT's miss_ft_id\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_matcher_create_end_ft_isolated(struct mlx5hws_matcher *matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mlx5hws_table_create_default_ft(tbl-&gt;ctx-&gt;mdev,</div><div class='add'>+					      tbl,</div><div class='add'>+					      0,</div><div class='add'>+					      &amp;matcher-&gt;end_ft_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(tbl-&gt;ctx, "Isolated matcher: failed to create end flow table\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hws_matcher_connect_end_ft_isolated(matcher);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(tbl-&gt;ctx, "Isolated matcher: failed to connect end FT\n");</div><div class='add'>+		goto destroy_default_ft;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy_default_ft:</div><div class='add'>+	mlx5hws_table_destroy_default_ft(tbl, matcher-&gt;end_ft_id);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hws_matcher_create_end_ft(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = mlx5hws_table_create_default_ft(tbl-&gt;ctx-&gt;mdev, tbl, &amp;matcher-&gt;end_ft_id);</div><div class='add'>+	if (mlx5hws_matcher_is_isolated(matcher))</div><div class='add'>+		ret = hws_matcher_create_end_ft_isolated(matcher);</div><div class='add'>+	else</div><div class='add'>+		ret = mlx5hws_table_create_default_ft(tbl-&gt;ctx-&gt;mdev,</div><div class='add'>+						      tbl,</div><div class='add'>+						      0,</div><div class='add'>+						      &amp;matcher-&gt;end_ft_id);</div><div class='add'>+</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		mlx5hws_err(tbl-&gt;ctx, "Failed to create matcher end flow table\n");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_matcher_connect_isolated_first(struct mlx5hws_matcher *matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='add'>+	struct mlx5hws_context *ctx = tbl-&gt;ctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Isolated matcher's end_ft is already pointing to the end_ft</div><div class='add'>+	 * of the complex matcher - it was set at creation of end_ft,</div><div class='add'>+	 * so no need to connect it.</div><div class='add'>+	 * We still need to connect the isolated table's start FT to</div><div class='add'>+	 * this matcher's RTC.</div><div class='add'>+	 */</div><div class='add'>+	ret = mlx5hws_table_ft_set_next_rtc(ctx,</div><div class='add'>+					    tbl-&gt;ft_id,</div><div class='add'>+					    tbl-&gt;fw_ft_type,</div><div class='add'>+					    matcher-&gt;match_ste.rtc_0_id,</div><div class='add'>+					    matcher-&gt;match_ste.rtc_1_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(ctx, "Isolated matcher: failed to connect start FT to match RTC\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset table's FT default miss (drop refcount) */</div><div class='add'>+	ret = mlx5hws_table_ft_set_default_next_ft(tbl, tbl-&gt;ft_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(ctx, "Isolated matcher: failed to reset table ft default miss\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_add(&amp;matcher-&gt;list_node, &amp;tbl-&gt;matchers_list);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_matcher_connect_isolated_last(struct mlx5hws_matcher *matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='add'>+	struct mlx5hws_context *ctx = tbl-&gt;ctx;</div><div class='add'>+	struct mlx5hws_matcher *last;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	last = list_last_entry(&amp;tbl-&gt;matchers_list,</div><div class='add'>+			       struct mlx5hws_matcher,</div><div class='add'>+			       list_node);</div><div class='add'>+</div><div class='add'>+	/* New matcher's end_ft is already pointing to the end_ft of</div><div class='add'>+	 * the complex matcher.</div><div class='add'>+	 * Connect previous matcher's end_ft to this new matcher RTC.</div><div class='add'>+	 */</div><div class='add'>+	ret = mlx5hws_table_ft_set_next_rtc(ctx,</div><div class='add'>+					    last-&gt;end_ft_id,</div><div class='add'>+					    tbl-&gt;fw_ft_type,</div><div class='add'>+					    matcher-&gt;match_ste.rtc_0_id,</div><div class='add'>+					    matcher-&gt;match_ste.rtc_1_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(ctx,</div><div class='add'>+			    "Isolated matcher: failed to connect matcher end_ft to new match RTC\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset prev matcher FT default miss (drop refcount) */</div><div class='add'>+	ret = mlx5hws_table_ft_set_default_next_ft(tbl, last-&gt;end_ft_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(ctx, "Isolated matcher: failed to reset matcher ft default miss\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Insert after the last matcher */</div><div class='add'>+	list_add(&amp;matcher-&gt;list_node, &amp;last-&gt;list_node);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hws_matcher_connect_isolated(struct mlx5hws_matcher *matcher)</div><div class='add'>+{</div><div class='add'>+	/* Isolated matcher is expected to be the only one in its table.</div><div class='add'>+	 * However, it can have a collision matcher, and it can go through</div><div class='add'>+	 * rehash process, in which case we will temporary have both old and</div><div class='add'>+	 * new matchers in the isolated table.</div><div class='add'>+	 * Check if this is the first matcher in the isolated table.</div><div class='add'>+	 */</div><div class='add'>+	if (list_empty(&amp;matcher-&gt;tbl-&gt;matchers_list))</div><div class='add'>+		return hws_matcher_connect_isolated_first(matcher);</div><div class='add'>+</div><div class='add'>+	/* If this wasn't the first matcher, then we have 3 possible cases:</div><div class='add'>+	 *  - this is a collision matcher for the first matcher</div><div class='add'>+	 *  - this is a new rehash dest matcher</div><div class='add'>+	 *  - this is a collision matcher for the new rehash dest matcher</div><div class='add'>+	 * The logic to add new matcher is the same for all these cases.</div><div class='add'>+	 */</div><div class='add'>+	return hws_matcher_connect_isolated_last(matcher);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hws_matcher_connect(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='hunk'>@@ -64,6 +228,9 @@ static int hws_matcher_connect(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 	struct mlx5hws_matcher *tmp_matcher;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (mlx5hws_matcher_is_isolated(matcher))</div><div class='add'>+		return hws_matcher_connect_isolated(matcher);</div><div class='add'>+</div><div class='ctx'> 	/* Find location in matcher list */</div><div class='ctx'> 	if (list_empty(&amp;tbl-&gt;matchers_list)) {</div><div class='ctx'> 		list_add(&amp;matcher-&gt;list_node, &amp;tbl-&gt;matchers_list);</div><div class='hunk'>@@ -140,6 +307,92 @@ remove_from_list:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hws_matcher_disconnect_isolated(struct mlx5hws_matcher *matcher)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_matcher *first, *last, *prev, *next;</div><div class='add'>+	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='add'>+	struct mlx5hws_context *ctx = tbl-&gt;ctx;</div><div class='add'>+	u32 end_ft_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	first = list_first_entry(&amp;tbl-&gt;matchers_list,</div><div class='add'>+				 struct mlx5hws_matcher,</div><div class='add'>+				 list_node);</div><div class='add'>+	last = list_last_entry(&amp;tbl-&gt;matchers_list,</div><div class='add'>+			       struct mlx5hws_matcher,</div><div class='add'>+			       list_node);</div><div class='add'>+	prev = list_prev_entry(matcher, list_node);</div><div class='add'>+	next = list_next_entry(matcher, list_node);</div><div class='add'>+</div><div class='add'>+	list_del_init(&amp;matcher-&gt;list_node);</div><div class='add'>+</div><div class='add'>+	if (first == last) {</div><div class='add'>+		/* This was the only matcher in the list.</div><div class='add'>+		 * Reset isolated table FT next RTCs and connect it</div><div class='add'>+		 * to the whole complex matcher end FT instead.</div><div class='add'>+		 */</div><div class='add'>+		ret = mlx5hws_table_ft_set_next_rtc(ctx,</div><div class='add'>+						    tbl-&gt;ft_id,</div><div class='add'>+						    tbl-&gt;fw_ft_type,</div><div class='add'>+						    0, 0);</div><div class='add'>+		if (ret) {</div><div class='add'>+			mlx5hws_err(tbl-&gt;ctx, "Isolated matcher: failed to reset FT's next RTCs\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		end_ft_id = matcher-&gt;attr.isolated_matcher_end_ft_id;</div><div class='add'>+		ret = mlx5hws_table_ft_set_next_ft(tbl-&gt;ctx,</div><div class='add'>+						   tbl-&gt;ft_id,</div><div class='add'>+						   tbl-&gt;fw_ft_type,</div><div class='add'>+						   end_ft_id);</div><div class='add'>+		if (ret) {</div><div class='add'>+			mlx5hws_err(tbl-&gt;ctx, "Isolated matcher: failed to set FT's miss_ft_id\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* At this point we know that there are more matchers in the list */</div><div class='add'>+</div><div class='add'>+	if (matcher == first) {</div><div class='add'>+		/* We've disconnected the first matcher.</div><div class='add'>+		 * Now update isolated table default FT.</div><div class='add'>+		 */</div><div class='add'>+		if (!next)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		return mlx5hws_table_ft_set_next_rtc(ctx,</div><div class='add'>+						     tbl-&gt;ft_id,</div><div class='add'>+						     tbl-&gt;fw_ft_type,</div><div class='add'>+						     next-&gt;match_ste.rtc_0_id,</div><div class='add'>+						     next-&gt;match_ste.rtc_1_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (matcher == last) {</div><div class='add'>+		/* If we've disconnected the last matcher - update prev</div><div class='add'>+		 * matcher's end_ft to point to the complex matcher end_ft.</div><div class='add'>+		 */</div><div class='add'>+		if (!prev)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		return hws_matcher_connect_end_ft_isolated(prev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This wasn't the first or the last matcher, which means that it has</div><div class='add'>+	 * both prev and next matchers. Note that this only happens if we're</div><div class='add'>+	 * disconnecting collision matcher of the old matcher during rehash.</div><div class='add'>+	 */</div><div class='add'>+	if (!prev || !next ||</div><div class='add'>+	    !(matcher-&gt;flags &amp; MLX5HWS_MATCHER_FLAGS_COLLISION))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Update prev end FT to point to next match RTC */</div><div class='add'>+	return mlx5hws_table_ft_set_next_rtc(ctx,</div><div class='add'>+					     prev-&gt;end_ft_id,</div><div class='add'>+					     tbl-&gt;fw_ft_type,</div><div class='add'>+					     next-&gt;match_ste.rtc_0_id,</div><div class='add'>+					     next-&gt;match_ste.rtc_1_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int hws_matcher_disconnect(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_matcher *next = NULL, *prev = NULL;</div><div class='hunk'>@@ -147,6 +400,9 @@ static int hws_matcher_disconnect(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 	u32 prev_ft_id = tbl-&gt;ft_id;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (mlx5hws_matcher_is_isolated(matcher))</div><div class='add'>+		return hws_matcher_disconnect_isolated(matcher);</div><div class='add'>+</div><div class='ctx'> 	if (!list_is_first(&amp;matcher-&gt;list_node, &amp;tbl-&gt;matchers_list)) {</div><div class='ctx'> 		prev = list_prev_entry(matcher, list_node);</div><div class='ctx'> 		prev_ft_id = prev-&gt;end_ft_id;</div><div class='hunk'>@@ -165,14 +421,14 @@ static int hws_matcher_disconnect(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 						    next-&gt;match_ste.rtc_0_id,</div><div class='ctx'> 						    next-&gt;match_ste.rtc_1_id);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			mlx5hws_err(tbl-&gt;ctx, "Failed to disconnect matcher\n");</div><div class='del'>-			goto matcher_reconnect;</div><div class='add'>+			mlx5hws_err(tbl-&gt;ctx, "Fatal error, failed to disconnect matcher\n");</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = mlx5hws_table_connect_to_miss_table(tbl, tbl-&gt;default_miss.miss_tbl);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			mlx5hws_err(tbl-&gt;ctx, "Failed to disconnect last matcher\n");</div><div class='del'>-			goto matcher_reconnect;</div><div class='add'>+			mlx5hws_err(tbl-&gt;ctx, "Fatal error, failed to disconnect last matcher\n");</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -180,169 +436,115 @@ static int hws_matcher_disconnect(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 	if (prev_ft_id == tbl-&gt;ft_id) {</div><div class='ctx'> 		ret = mlx5hws_table_update_connected_miss_tables(tbl);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			mlx5hws_err(tbl-&gt;ctx, "Fatal error, failed to update connected miss table\n");</div><div class='del'>-			goto matcher_reconnect;</div><div class='add'>+			mlx5hws_err(tbl-&gt;ctx,</div><div class='add'>+				    "Fatal error, failed to update connected miss table\n");</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = mlx5hws_table_ft_set_default_next_ft(tbl, prev_ft_id);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		mlx5hws_err(tbl-&gt;ctx, "Fatal error, failed to restore matcher ft default miss\n");</div><div class='del'>-		goto matcher_reconnect;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-matcher_reconnect:</div><div class='del'>-	if (list_empty(&amp;tbl-&gt;matchers_list) || !prev)</div><div class='del'>-		list_add(&amp;matcher-&gt;list_node, &amp;tbl-&gt;matchers_list);</div><div class='del'>-	else</div><div class='del'>-		/* insert after prev matcher */</div><div class='del'>-		list_add(&amp;matcher-&gt;list_node, &amp;prev-&gt;list_node);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hws_matcher_set_rtc_attr_sz(struct mlx5hws_matcher *matcher,</div><div class='ctx'> 					struct mlx5hws_cmd_rtc_create_attr *rtc_attr,</div><div class='del'>-					enum mlx5hws_matcher_rtc_type rtc_type,</div><div class='ctx'> 					bool is_mirror)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5hws_pool_chunk *ste = &amp;matcher-&gt;action_ste[MLX5HWS_ACTION_STE_IDX_ANY].ste;</div><div class='ctx'> 	enum mlx5hws_matcher_flow_src flow_src = matcher-&gt;attr.optimize_flow_src;</div><div class='del'>-	bool is_match_rtc = rtc_type == HWS_MATCHER_RTC_TYPE_MATCH;</div><div class='ctx'> </div><div class='ctx'> 	if ((flow_src == MLX5HWS_MATCHER_FLOW_SRC_VPORT &amp;&amp; !is_mirror) ||</div><div class='ctx'> 	    (flow_src == MLX5HWS_MATCHER_FLOW_SRC_WIRE &amp;&amp; is_mirror)) {</div><div class='ctx'> 		/* Optimize FDB RTC */</div><div class='ctx'> 		rtc_attr-&gt;log_size = 0;</div><div class='ctx'> 		rtc_attr-&gt;log_depth = 0;</div><div class='del'>-	} else {</div><div class='del'>-		/* Keep original values */</div><div class='del'>-		rtc_attr-&gt;log_size = is_match_rtc ? matcher-&gt;attr.table.sz_row_log : ste-&gt;order;</div><div class='del'>-		rtc_attr-&gt;log_depth = is_match_rtc ? matcher-&gt;attr.table.sz_col_log : 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hws_matcher_create_rtc(struct mlx5hws_matcher *matcher,</div><div class='del'>-				  enum mlx5hws_matcher_rtc_type rtc_type,</div><div class='del'>-				  u8 action_ste_selector)</div><div class='add'>+static int hws_matcher_create_rtc(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_matcher_attr *attr = &amp;matcher-&gt;attr;</div><div class='ctx'> 	struct mlx5hws_cmd_rtc_create_attr rtc_attr = {0};</div><div class='ctx'> 	struct mlx5hws_match_template *mt = matcher-&gt;mt;</div><div class='ctx'> 	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='del'>-	struct mlx5hws_action_default_stc *default_stc;</div><div class='del'>-	struct mlx5hws_matcher_action_ste *action_ste;</div><div class='add'>+	union mlx5hws_matcher_size *size_rx, *size_tx;</div><div class='ctx'> 	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='del'>-	struct mlx5hws_pool *ste_pool, *stc_pool;</div><div class='del'>-	struct mlx5hws_pool_chunk *ste;</div><div class='del'>-	u32 *rtc_0_id, *rtc_1_id;</div><div class='ctx'> 	u32 obj_id;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	switch (rtc_type) {</div><div class='del'>-	case HWS_MATCHER_RTC_TYPE_MATCH:</div><div class='del'>-		rtc_0_id = &amp;matcher-&gt;match_ste.rtc_0_id;</div><div class='del'>-		rtc_1_id = &amp;matcher-&gt;match_ste.rtc_1_id;</div><div class='del'>-		ste_pool = matcher-&gt;match_ste.pool;</div><div class='del'>-		ste = &amp;matcher-&gt;match_ste.ste;</div><div class='del'>-		ste-&gt;order = attr-&gt;table.sz_col_log + attr-&gt;table.sz_row_log;</div><div class='del'>-</div><div class='del'>-		rtc_attr.log_size = attr-&gt;table.sz_row_log;</div><div class='del'>-		rtc_attr.log_depth = attr-&gt;table.sz_col_log;</div><div class='del'>-		rtc_attr.is_frst_jumbo = mlx5hws_matcher_mt_is_jumbo(mt);</div><div class='del'>-		rtc_attr.is_scnd_range = 0;</div><div class='del'>-		rtc_attr.miss_ft_id = matcher-&gt;end_ft_id;</div><div class='del'>-</div><div class='del'>-		if (attr-&gt;insert_mode == MLX5HWS_MATCHER_INSERT_BY_HASH) {</div><div class='del'>-			/* The usual Hash Table */</div><div class='del'>-			rtc_attr.update_index_mode = MLX5_IFC_RTC_STE_UPDATE_MODE_BY_HASH;</div><div class='del'>-</div><div class='del'>-			/* The first mt is used since all share the same definer */</div><div class='del'>-			rtc_attr.match_definer_0 = mlx5hws_definer_get_id(mt-&gt;definer);</div><div class='del'>-		} else if (attr-&gt;insert_mode == MLX5HWS_MATCHER_INSERT_BY_INDEX) {</div><div class='del'>-			rtc_attr.update_index_mode = MLX5_IFC_RTC_STE_UPDATE_MODE_BY_OFFSET;</div><div class='del'>-			rtc_attr.num_hash_definer = 1;</div><div class='del'>-</div><div class='del'>-			if (attr-&gt;distribute_mode == MLX5HWS_MATCHER_DISTRIBUTE_BY_HASH) {</div><div class='del'>-				/* Hash Split Table */</div><div class='del'>-				rtc_attr.access_index_mode = MLX5_IFC_RTC_STE_ACCESS_MODE_BY_HASH;</div><div class='del'>-				rtc_attr.match_definer_0 = mlx5hws_definer_get_id(mt-&gt;definer);</div><div class='del'>-			} else if (attr-&gt;distribute_mode == MLX5HWS_MATCHER_DISTRIBUTE_BY_LINEAR) {</div><div class='del'>-				/* Linear Lookup Table */</div><div class='del'>-				rtc_attr.access_index_mode = MLX5_IFC_RTC_STE_ACCESS_MODE_LINEAR;</div><div class='del'>-				rtc_attr.match_definer_0 = ctx-&gt;caps-&gt;linear_match_definer;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Match pool requires implicit allocation */</div><div class='del'>-		ret = mlx5hws_pool_chunk_alloc(ste_pool, ste);</div><div class='del'>-		if (ret) {</div><div class='del'>-			mlx5hws_err(ctx, "Failed to allocate STE for %s RTC",</div><div class='del'>-				    hws_matcher_rtc_type_to_str(rtc_type));</div><div class='del'>-			return ret;</div><div class='add'>+	size_rx = &amp;attr-&gt;size[MLX5HWS_MATCHER_SIZE_TYPE_RX];</div><div class='add'>+	size_tx = &amp;attr-&gt;size[MLX5HWS_MATCHER_SIZE_TYPE_TX];</div><div class='add'>+</div><div class='add'>+	rtc_attr.log_size = size_rx-&gt;table.sz_row_log;</div><div class='add'>+	rtc_attr.log_depth = size_rx-&gt;table.sz_col_log;</div><div class='add'>+	rtc_attr.is_frst_jumbo = mlx5hws_matcher_mt_is_jumbo(mt);</div><div class='add'>+	rtc_attr.is_scnd_range = 0;</div><div class='add'>+	rtc_attr.miss_ft_id = matcher-&gt;end_ft_id;</div><div class='add'>+</div><div class='add'>+	if (attr-&gt;insert_mode == MLX5HWS_MATCHER_INSERT_BY_HASH) {</div><div class='add'>+		/* The usual Hash Table */</div><div class='add'>+		rtc_attr.update_index_mode =</div><div class='add'>+			MLX5_IFC_RTC_STE_UPDATE_MODE_BY_HASH;</div><div class='add'>+</div><div class='add'>+		/* The first mt is used since all share the same definer */</div><div class='add'>+		rtc_attr.match_definer_0 = mlx5hws_definer_get_id(mt-&gt;definer);</div><div class='add'>+	} else if (attr-&gt;insert_mode == MLX5HWS_MATCHER_INSERT_BY_INDEX) {</div><div class='add'>+		rtc_attr.update_index_mode =</div><div class='add'>+			MLX5_IFC_RTC_STE_UPDATE_MODE_BY_OFFSET;</div><div class='add'>+		rtc_attr.num_hash_definer = 1;</div><div class='add'>+</div><div class='add'>+		if (attr-&gt;distribute_mode ==</div><div class='add'>+		    MLX5HWS_MATCHER_DISTRIBUTE_BY_HASH) {</div><div class='add'>+			/* Hash Split Table */</div><div class='add'>+			rtc_attr.access_index_mode =</div><div class='add'>+				MLX5_IFC_RTC_STE_ACCESS_MODE_BY_HASH;</div><div class='add'>+			rtc_attr.match_definer_0 =</div><div class='add'>+				mlx5hws_definer_get_id(mt-&gt;definer);</div><div class='add'>+		} else if (attr-&gt;distribute_mode ==</div><div class='add'>+			   MLX5HWS_MATCHER_DISTRIBUTE_BY_LINEAR) {</div><div class='add'>+			/* Linear Lookup Table */</div><div class='add'>+			rtc_attr.access_index_mode =</div><div class='add'>+				MLX5_IFC_RTC_STE_ACCESS_MODE_LINEAR;</div><div class='add'>+			rtc_attr.match_definer_0 =</div><div class='add'>+				ctx-&gt;caps-&gt;linear_match_definer;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HWS_MATCHER_RTC_TYPE_STE_ARRAY:</div><div class='del'>-		action_ste = &amp;matcher-&gt;action_ste[action_ste_selector];</div><div class='del'>-</div><div class='del'>-		rtc_0_id = &amp;action_ste-&gt;rtc_0_id;</div><div class='del'>-		rtc_1_id = &amp;action_ste-&gt;rtc_1_id;</div><div class='del'>-		ste_pool = action_ste-&gt;pool;</div><div class='del'>-		ste = &amp;action_ste-&gt;ste;</div><div class='del'>-		ste-&gt;order = ilog2(roundup_pow_of_two(action_ste-&gt;max_stes)) +</div><div class='del'>-			     attr-&gt;table.sz_row_log;</div><div class='del'>-		rtc_attr.log_size = ste-&gt;order;</div><div class='del'>-		rtc_attr.log_depth = 0;</div><div class='del'>-		rtc_attr.update_index_mode = MLX5_IFC_RTC_STE_UPDATE_MODE_BY_OFFSET;</div><div class='del'>-		/* The action STEs use the default always hit definer */</div><div class='del'>-		rtc_attr.match_definer_0 = ctx-&gt;caps-&gt;trivial_match_definer;</div><div class='del'>-		rtc_attr.is_frst_jumbo = false;</div><div class='del'>-		rtc_attr.miss_ft_id = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		mlx5hws_err(ctx, "HWS Invalid RTC type\n");</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	obj_id = mlx5hws_pool_chunk_get_base_id(ste_pool, ste);</div><div class='del'>-</div><div class='ctx'> 	rtc_attr.pd = ctx-&gt;pd_num;</div><div class='del'>-	rtc_attr.ste_base = obj_id;</div><div class='del'>-	rtc_attr.ste_offset = ste-&gt;offset;</div><div class='add'>+	rtc_attr.ste_base = matcher-&gt;match_ste.ste_0_base;</div><div class='ctx'> 	rtc_attr.reparse_mode = mlx5hws_context_get_reparse_mode(ctx);</div><div class='ctx'> 	rtc_attr.table_type = mlx5hws_table_get_res_fw_ft_type(tbl-&gt;type, false);</div><div class='del'>-	hws_matcher_set_rtc_attr_sz(matcher, &amp;rtc_attr, rtc_type, false);</div><div class='add'>+	hws_matcher_set_rtc_attr_sz(matcher, &amp;rtc_attr, false);</div><div class='ctx'> </div><div class='ctx'> 	/* STC is a single resource (obj_id), use any STC for the ID */</div><div class='del'>-	stc_pool = ctx-&gt;stc_pool[tbl-&gt;type];</div><div class='del'>-	default_stc = ctx-&gt;common_res[tbl-&gt;type].default_stc;</div><div class='del'>-	obj_id = mlx5hws_pool_chunk_get_base_id(stc_pool, &amp;default_stc-&gt;default_hit);</div><div class='add'>+	obj_id = mlx5hws_pool_get_base_id(ctx-&gt;stc_pool);</div><div class='ctx'> 	rtc_attr.stc_base = obj_id;</div><div class='ctx'> </div><div class='del'>-	ret = mlx5hws_cmd_rtc_create(ctx-&gt;mdev, &amp;rtc_attr, rtc_0_id);</div><div class='add'>+	ret = mlx5hws_cmd_rtc_create(ctx-&gt;mdev, &amp;rtc_attr,</div><div class='add'>+				     &amp;matcher-&gt;match_ste.rtc_0_id);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		mlx5hws_err(ctx, "Failed to create matcher RTC of type %s",</div><div class='del'>-			    hws_matcher_rtc_type_to_str(rtc_type));</div><div class='del'>-		goto free_ste;</div><div class='add'>+		mlx5hws_err(ctx, "Failed to create matcher RTC\n");</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (tbl-&gt;type == MLX5HWS_TABLE_TYPE_FDB) {</div><div class='del'>-		obj_id = mlx5hws_pool_chunk_get_base_mirror_id(ste_pool, ste);</div><div class='del'>-		rtc_attr.ste_base = obj_id;</div><div class='add'>+		rtc_attr.log_size = size_tx-&gt;table.sz_row_log;</div><div class='add'>+		rtc_attr.log_depth = size_tx-&gt;table.sz_col_log;</div><div class='add'>+		rtc_attr.ste_base = matcher-&gt;match_ste.ste_1_base;</div><div class='ctx'> 		rtc_attr.table_type = mlx5hws_table_get_res_fw_ft_type(tbl-&gt;type, true);</div><div class='ctx'> </div><div class='del'>-		obj_id = mlx5hws_pool_chunk_get_base_mirror_id(stc_pool, &amp;default_stc-&gt;default_hit);</div><div class='add'>+		obj_id = mlx5hws_pool_get_base_mirror_id(ctx-&gt;stc_pool);</div><div class='ctx'> 		rtc_attr.stc_base = obj_id;</div><div class='del'>-		hws_matcher_set_rtc_attr_sz(matcher, &amp;rtc_attr, rtc_type, true);</div><div class='add'>+		hws_matcher_set_rtc_attr_sz(matcher, &amp;rtc_attr, true);</div><div class='ctx'> </div><div class='del'>-		ret = mlx5hws_cmd_rtc_create(ctx-&gt;mdev, &amp;rtc_attr, rtc_1_id);</div><div class='add'>+		ret = mlx5hws_cmd_rtc_create(ctx-&gt;mdev, &amp;rtc_attr,</div><div class='add'>+					     &amp;matcher-&gt;match_ste.rtc_1_id);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			mlx5hws_err(ctx, "Failed to create peer matcher RTC of type %s",</div><div class='del'>-				    hws_matcher_rtc_type_to_str(rtc_type));</div><div class='add'>+			mlx5hws_err(ctx, "Failed to create mirror matcher RTC\n");</div><div class='ctx'> 			goto destroy_rtc_0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -350,47 +552,18 @@ static int hws_matcher_create_rtc(struct mlx5hws_matcher *matcher,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> destroy_rtc_0:</div><div class='del'>-	mlx5hws_cmd_rtc_destroy(ctx-&gt;mdev, *rtc_0_id);</div><div class='del'>-free_ste:</div><div class='del'>-	if (rtc_type == HWS_MATCHER_RTC_TYPE_MATCH)</div><div class='del'>-		mlx5hws_pool_chunk_free(ste_pool, ste);</div><div class='add'>+	mlx5hws_cmd_rtc_destroy(ctx-&gt;mdev, matcher-&gt;match_ste.rtc_0_id);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hws_matcher_destroy_rtc(struct mlx5hws_matcher *matcher,</div><div class='del'>-				    enum mlx5hws_matcher_rtc_type rtc_type,</div><div class='del'>-				    u8 action_ste_selector)</div><div class='add'>+static void hws_matcher_destroy_rtc(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5hws_matcher_action_ste *action_ste;</div><div class='del'>-	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='del'>-	struct mlx5hws_pool_chunk *ste;</div><div class='del'>-	struct mlx5hws_pool *ste_pool;</div><div class='del'>-	u32 rtc_0_id, rtc_1_id;</div><div class='del'>-</div><div class='del'>-	switch (rtc_type) {</div><div class='del'>-	case HWS_MATCHER_RTC_TYPE_MATCH:</div><div class='del'>-		rtc_0_id = matcher-&gt;match_ste.rtc_0_id;</div><div class='del'>-		rtc_1_id = matcher-&gt;match_ste.rtc_1_id;</div><div class='del'>-		ste_pool = matcher-&gt;match_ste.pool;</div><div class='del'>-		ste = &amp;matcher-&gt;match_ste.ste;</div><div class='del'>-		break;</div><div class='del'>-	case HWS_MATCHER_RTC_TYPE_STE_ARRAY:</div><div class='del'>-		action_ste = &amp;matcher-&gt;action_ste[action_ste_selector];</div><div class='del'>-		rtc_0_id = action_ste-&gt;rtc_0_id;</div><div class='del'>-		rtc_1_id = action_ste-&gt;rtc_1_id;</div><div class='del'>-		ste_pool = action_ste-&gt;pool;</div><div class='del'>-		ste = &amp;action_ste-&gt;ste;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	struct mlx5_core_dev *mdev = matcher-&gt;tbl-&gt;ctx-&gt;mdev;</div><div class='ctx'> </div><div class='del'>-	if (tbl-&gt;type == MLX5HWS_TABLE_TYPE_FDB)</div><div class='del'>-		mlx5hws_cmd_rtc_destroy(matcher-&gt;tbl-&gt;ctx-&gt;mdev, rtc_1_id);</div><div class='add'>+	if (matcher-&gt;tbl-&gt;type == MLX5HWS_TABLE_TYPE_FDB)</div><div class='add'>+		mlx5hws_cmd_rtc_destroy(mdev, matcher-&gt;match_ste.rtc_1_id);</div><div class='ctx'> </div><div class='del'>-	mlx5hws_cmd_rtc_destroy(matcher-&gt;tbl-&gt;ctx-&gt;mdev, rtc_0_id);</div><div class='del'>-	if (rtc_type == HWS_MATCHER_RTC_TYPE_MATCH)</div><div class='del'>-		mlx5hws_pool_chunk_free(ste_pool, ste);</div><div class='add'>+	mlx5hws_cmd_rtc_destroy(mdev, matcher-&gt;match_ste.rtc_0_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -398,43 +571,38 @@ hws_matcher_check_attr_sz(struct mlx5hws_cmd_query_caps *caps,</div><div class='ctx'> 			  struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_matcher_attr *attr = &amp;matcher-&gt;attr;</div><div class='add'>+	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	union mlx5hws_matcher_size *size;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	if (attr-&gt;table.sz_col_log &gt; caps-&gt;rtc_log_depth_max) {</div><div class='del'>-		mlx5hws_err(matcher-&gt;tbl-&gt;ctx, "Matcher depth exceeds limit %d\n",</div><div class='del'>-			    caps-&gt;rtc_log_depth_max);</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; 2; i++) {</div><div class='add'>+		size = &amp;attr-&gt;size[i];</div><div class='ctx'> </div><div class='del'>-	if (attr-&gt;table.sz_col_log + attr-&gt;table.sz_row_log &gt; caps-&gt;ste_alloc_log_max) {</div><div class='del'>-		mlx5hws_err(matcher-&gt;tbl-&gt;ctx, "Total matcher size exceeds limit %d\n",</div><div class='del'>-			    caps-&gt;ste_alloc_log_max);</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+		if (size-&gt;table.sz_col_log &gt; caps-&gt;rtc_log_depth_max) {</div><div class='add'>+			mlx5hws_err(ctx, "Matcher depth exceeds limit %d\n",</div><div class='add'>+				    caps-&gt;rtc_log_depth_max);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (attr-&gt;table.sz_col_log + attr-&gt;table.sz_row_log &lt; caps-&gt;ste_alloc_log_gran) {</div><div class='del'>-		mlx5hws_err(matcher-&gt;tbl-&gt;ctx, "Total matcher size below limit %d\n",</div><div class='del'>-			    caps-&gt;ste_alloc_log_gran);</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+		if (size-&gt;table.sz_col_log + size-&gt;table.sz_row_log &gt;</div><div class='add'>+		    caps-&gt;ste_alloc_log_max) {</div><div class='add'>+			mlx5hws_err(ctx,</div><div class='add'>+				    "Total matcher size exceeds limit %d\n",</div><div class='add'>+				    caps-&gt;ste_alloc_log_max);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (size-&gt;table.sz_col_log + size-&gt;table.sz_row_log &lt;</div><div class='add'>+		    caps-&gt;ste_alloc_log_gran) {</div><div class='add'>+			mlx5hws_err(ctx, "Total matcher size below limit %d\n",</div><div class='add'>+				    caps-&gt;ste_alloc_log_gran);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hws_matcher_set_pool_attr(struct mlx5hws_pool_attr *attr,</div><div class='del'>-				      struct mlx5hws_matcher *matcher)</div><div class='del'>-{</div><div class='del'>-	switch (matcher-&gt;attr.optimize_flow_src) {</div><div class='del'>-	case MLX5HWS_MATCHER_FLOW_SRC_VPORT:</div><div class='del'>-		attr-&gt;opt_type = MLX5HWS_POOL_OPTIMIZE_ORIG;</div><div class='del'>-		break;</div><div class='del'>-	case MLX5HWS_MATCHER_FLOW_SRC_WIRE:</div><div class='del'>-		attr-&gt;opt_type = MLX5HWS_POOL_OPTIMIZE_MIRROR;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int hws_matcher_check_and_process_at(struct mlx5hws_matcher *matcher,</div><div class='ctx'> 					    struct mlx5hws_action_template *at)</div><div class='ctx'> {</div><div class='hunk'>@@ -458,170 +626,17 @@ static int hws_matcher_check_and_process_at(struct mlx5hws_matcher *matcher,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hws_matcher_resize_init(struct mlx5hws_matcher *src_matcher)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_matcher_resize_data *resize_data;</div><div class='del'>-</div><div class='del'>-	resize_data = kzalloc(sizeof(*resize_data), GFP_KERNEL);</div><div class='del'>-	if (!resize_data)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	resize_data-&gt;max_stes = src_matcher-&gt;action_ste[MLX5HWS_ACTION_STE_IDX_ANY].max_stes;</div><div class='del'>-</div><div class='del'>-	resize_data-&gt;action_ste[0].stc = src_matcher-&gt;action_ste[0].stc;</div><div class='del'>-	resize_data-&gt;action_ste[0].rtc_0_id = src_matcher-&gt;action_ste[0].rtc_0_id;</div><div class='del'>-	resize_data-&gt;action_ste[0].rtc_1_id = src_matcher-&gt;action_ste[0].rtc_1_id;</div><div class='del'>-	resize_data-&gt;action_ste[0].pool = src_matcher-&gt;action_ste[0].max_stes ?</div><div class='del'>-					  src_matcher-&gt;action_ste[0].pool :</div><div class='del'>-					  NULL;</div><div class='del'>-	resize_data-&gt;action_ste[1].stc = src_matcher-&gt;action_ste[1].stc;</div><div class='del'>-	resize_data-&gt;action_ste[1].rtc_0_id = src_matcher-&gt;action_ste[1].rtc_0_id;</div><div class='del'>-	resize_data-&gt;action_ste[1].rtc_1_id = src_matcher-&gt;action_ste[1].rtc_1_id;</div><div class='del'>-	resize_data-&gt;action_ste[1].pool = src_matcher-&gt;action_ste[1].max_stes ?</div><div class='del'>-					  src_matcher-&gt;action_ste[1].pool :</div><div class='del'>-					   NULL;</div><div class='del'>-</div><div class='del'>-	/* Place the new resized matcher on the dst matcher's list */</div><div class='del'>-	list_add(&amp;resize_data-&gt;list_node, &amp;src_matcher-&gt;resize_dst-&gt;resize_data);</div><div class='del'>-</div><div class='del'>-	/* Move all the previous resized matchers to the dst matcher's list */</div><div class='del'>-	while (!list_empty(&amp;src_matcher-&gt;resize_data)) {</div><div class='del'>-		resize_data = list_first_entry(&amp;src_matcher-&gt;resize_data,</div><div class='del'>-					       struct mlx5hws_matcher_resize_data,</div><div class='del'>-					       list_node);</div><div class='del'>-		list_del_init(&amp;resize_data-&gt;list_node);</div><div class='del'>-		list_add(&amp;resize_data-&gt;list_node, &amp;src_matcher-&gt;resize_dst-&gt;resize_data);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_matcher_resize_uninit(struct mlx5hws_matcher *matcher)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_matcher_resize_data *resize_data;</div><div class='del'>-</div><div class='del'>-	if (!mlx5hws_matcher_is_resizable(matcher))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	while (!list_empty(&amp;matcher-&gt;resize_data)) {</div><div class='del'>-		resize_data = list_first_entry(&amp;matcher-&gt;resize_data,</div><div class='del'>-					       struct mlx5hws_matcher_resize_data,</div><div class='del'>-					       list_node);</div><div class='del'>-		list_del_init(&amp;resize_data-&gt;list_node);</div><div class='del'>-</div><div class='del'>-		if (resize_data-&gt;max_stes) {</div><div class='del'>-			mlx5hws_action_free_single_stc(matcher-&gt;tbl-&gt;ctx,</div><div class='del'>-						       matcher-&gt;tbl-&gt;type,</div><div class='del'>-						       &amp;resize_data-&gt;action_ste[1].stc);</div><div class='del'>-			mlx5hws_action_free_single_stc(matcher-&gt;tbl-&gt;ctx,</div><div class='del'>-						       matcher-&gt;tbl-&gt;type,</div><div class='del'>-						       &amp;resize_data-&gt;action_ste[0].stc);</div><div class='del'>-</div><div class='del'>-			if (matcher-&gt;tbl-&gt;type == MLX5HWS_TABLE_TYPE_FDB) {</div><div class='del'>-				mlx5hws_cmd_rtc_destroy(matcher-&gt;tbl-&gt;ctx-&gt;mdev,</div><div class='del'>-							resize_data-&gt;action_ste[1].rtc_1_id);</div><div class='del'>-				mlx5hws_cmd_rtc_destroy(matcher-&gt;tbl-&gt;ctx-&gt;mdev,</div><div class='del'>-							resize_data-&gt;action_ste[0].rtc_1_id);</div><div class='del'>-			}</div><div class='del'>-			mlx5hws_cmd_rtc_destroy(matcher-&gt;tbl-&gt;ctx-&gt;mdev,</div><div class='del'>-						resize_data-&gt;action_ste[1].rtc_0_id);</div><div class='del'>-			mlx5hws_cmd_rtc_destroy(matcher-&gt;tbl-&gt;ctx-&gt;mdev,</div><div class='del'>-						resize_data-&gt;action_ste[0].rtc_0_id);</div><div class='del'>-			if (resize_data-&gt;action_ste[MLX5HWS_ACTION_STE_IDX_ANY].pool) {</div><div class='del'>-				mlx5hws_pool_destroy(resize_data-&gt;action_ste[1].pool);</div><div class='del'>-				mlx5hws_pool_destroy(resize_data-&gt;action_ste[0].pool);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		kfree(resize_data);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-hws_matcher_bind_at_idx(struct mlx5hws_matcher *matcher, u8 action_ste_selector)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_cmd_stc_modify_attr stc_attr = {0};</div><div class='del'>-	struct mlx5hws_matcher_action_ste *action_ste;</div><div class='del'>-	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='del'>-	struct mlx5hws_pool_attr pool_attr = {0};</div><div class='del'>-	struct mlx5hws_context *ctx = tbl-&gt;ctx;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	action_ste = &amp;matcher-&gt;action_ste[action_ste_selector];</div><div class='del'>-</div><div class='del'>-	/* Allocate action STE mempool */</div><div class='del'>-	pool_attr.table_type = tbl-&gt;type;</div><div class='del'>-	pool_attr.pool_type = MLX5HWS_POOL_TYPE_STE;</div><div class='del'>-	pool_attr.flags = MLX5HWS_POOL_FLAGS_FOR_STE_ACTION_POOL;</div><div class='del'>-	pool_attr.alloc_log_sz = ilog2(roundup_pow_of_two(action_ste-&gt;max_stes)) +</div><div class='del'>-				 matcher-&gt;attr.table.sz_row_log;</div><div class='del'>-	hws_matcher_set_pool_attr(&amp;pool_attr, matcher);</div><div class='del'>-	action_ste-&gt;pool = mlx5hws_pool_create(ctx, &amp;pool_attr);</div><div class='del'>-	if (!action_ste-&gt;pool) {</div><div class='del'>-		mlx5hws_err(ctx, "Failed to create action ste pool\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Allocate action RTC */</div><div class='del'>-	ret = hws_matcher_create_rtc(matcher, HWS_MATCHER_RTC_TYPE_STE_ARRAY, action_ste_selector);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mlx5hws_err(ctx, "Failed to create action RTC\n");</div><div class='del'>-		goto free_ste_pool;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Allocate STC for jumps to STE */</div><div class='del'>-	stc_attr.action_offset = MLX5HWS_ACTION_OFFSET_HIT;</div><div class='del'>-	stc_attr.action_type = MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_STE_TABLE;</div><div class='del'>-	stc_attr.reparse_mode = MLX5_IFC_STC_REPARSE_IGNORE;</div><div class='del'>-	stc_attr.ste_table.ste = action_ste-&gt;ste;</div><div class='del'>-	stc_attr.ste_table.ste_pool = action_ste-&gt;pool;</div><div class='del'>-	stc_attr.ste_table.match_definer_id = ctx-&gt;caps-&gt;trivial_match_definer;</div><div class='del'>-</div><div class='del'>-	ret = mlx5hws_action_alloc_single_stc(ctx, &amp;stc_attr, tbl-&gt;type,</div><div class='del'>-					      &amp;action_ste-&gt;stc);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mlx5hws_err(ctx, "Failed to create action jump to table STC\n");</div><div class='del'>-		goto free_rtc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-free_rtc:</div><div class='del'>-	hws_matcher_destroy_rtc(matcher, HWS_MATCHER_RTC_TYPE_STE_ARRAY, action_ste_selector);</div><div class='del'>-free_ste_pool:</div><div class='del'>-	mlx5hws_pool_destroy(action_ste-&gt;pool);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_matcher_unbind_at_idx(struct mlx5hws_matcher *matcher, u8 action_ste_selector)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_matcher_action_ste *action_ste;</div><div class='del'>-	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='del'>-</div><div class='del'>-	action_ste = &amp;matcher-&gt;action_ste[action_ste_selector];</div><div class='del'>-</div><div class='del'>-	if (!action_ste-&gt;max_stes ||</div><div class='del'>-	    matcher-&gt;flags &amp; MLX5HWS_MATCHER_FLAGS_COLLISION ||</div><div class='del'>-	    mlx5hws_matcher_is_in_resize(matcher))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	mlx5hws_action_free_single_stc(tbl-&gt;ctx, tbl-&gt;type, &amp;action_ste-&gt;stc);</div><div class='del'>-	hws_matcher_destroy_rtc(matcher, HWS_MATCHER_RTC_TYPE_STE_ARRAY, action_ste_selector);</div><div class='del'>-	mlx5hws_pool_destroy(action_ste-&gt;pool);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int hws_matcher_bind_at(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='ctx'> 	bool is_jumbo = mlx5hws_matcher_mt_is_jumbo(matcher-&gt;mt);</div><div class='del'>-	struct mlx5hws_table *tbl = matcher-&gt;tbl;</div><div class='del'>-	struct mlx5hws_context *ctx = tbl-&gt;ctx;</div><div class='del'>-	u32 required_stes;</div><div class='del'>-	u8 max_stes = 0;</div><div class='add'>+	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	u8 required_stes, max_stes;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	if (matcher-&gt;flags &amp; MLX5HWS_MATCHER_FLAGS_COLLISION)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	max_stes = 0;</div><div class='ctx'> 	for (i = 0; i &lt; matcher-&gt;num_of_at; i++) {</div><div class='ctx'> 		struct mlx5hws_action_template *at = &amp;matcher-&gt;at[i];</div><div class='ctx'> </div><div class='hunk'>@@ -637,38 +652,40 @@ static int hws_matcher_bind_at(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 		/* Future: Optimize reparse */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* There are no additional STEs required for matcher */</div><div class='del'>-	if (!max_stes)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	matcher-&gt;action_ste[0].max_stes = max_stes;</div><div class='del'>-	matcher-&gt;action_ste[1].max_stes = max_stes;</div><div class='del'>-</div><div class='del'>-	ret = hws_matcher_bind_at_idx(matcher, 0);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = hws_matcher_bind_at_idx(matcher, 1);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto free_at_0;</div><div class='add'>+	matcher-&gt;num_of_action_stes = max_stes;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-free_at_0:</div><div class='del'>-	hws_matcher_unbind_at_idx(matcher, 0);</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hws_matcher_unbind_at(struct mlx5hws_matcher *matcher)</div><div class='add'>+static void hws_matcher_set_ip_version_match(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='del'>-	hws_matcher_unbind_at_idx(matcher, 1);</div><div class='del'>-	hws_matcher_unbind_at_idx(matcher, 0);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; matcher-&gt;mt-&gt;fc_sz; i++) {</div><div class='add'>+		switch (matcher-&gt;mt-&gt;fc[i].fname) {</div><div class='add'>+		case MLX5HWS_DEFINER_FNAME_ETH_TYPE_O:</div><div class='add'>+			matcher-&gt;matches_outer_ethertype = 1;</div><div class='add'>+			break;</div><div class='add'>+		case MLX5HWS_DEFINER_FNAME_ETH_L3_TYPE_O:</div><div class='add'>+			matcher-&gt;matches_outer_ip_version = 1;</div><div class='add'>+			break;</div><div class='add'>+		case MLX5HWS_DEFINER_FNAME_ETH_TYPE_I:</div><div class='add'>+			matcher-&gt;matches_inner_ethertype = 1;</div><div class='add'>+			break;</div><div class='add'>+		case MLX5HWS_DEFINER_FNAME_ETH_L3_TYPE_I:</div><div class='add'>+			matcher-&gt;matches_inner_ip_version = 1;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hws_matcher_bind_mt(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5hws_cmd_ste_create_attr ste_attr = {};</div><div class='ctx'> 	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='del'>-	struct mlx5hws_pool_attr pool_attr = {0};</div><div class='add'>+	union mlx5hws_matcher_size *size;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Calculate match, range and hash definers */</div><div class='hunk'>@@ -681,23 +698,41 @@ static int hws_matcher_bind_mt(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Create an STE pool per matcher*/</div><div class='del'>-	pool_attr.table_type = matcher-&gt;tbl-&gt;type;</div><div class='del'>-	pool_attr.pool_type = MLX5HWS_POOL_TYPE_STE;</div><div class='del'>-	pool_attr.flags = MLX5HWS_POOL_FLAGS_FOR_MATCHER_STE_POOL;</div><div class='del'>-	pool_attr.alloc_log_sz = matcher-&gt;attr.table.sz_col_log +</div><div class='del'>-				 matcher-&gt;attr.table.sz_row_log;</div><div class='del'>-	hws_matcher_set_pool_attr(&amp;pool_attr, matcher);</div><div class='del'>-</div><div class='del'>-	matcher-&gt;match_ste.pool = mlx5hws_pool_create(ctx, &amp;pool_attr);</div><div class='del'>-	if (!matcher-&gt;match_ste.pool) {</div><div class='del'>-		mlx5hws_err(ctx, "Failed to allocate matcher STE pool\n");</div><div class='del'>-		ret = -EOPNOTSUPP;</div><div class='add'>+	hws_matcher_set_ip_version_match(matcher);</div><div class='add'>+</div><div class='add'>+	/* Create an STE range each for RX and TX. */</div><div class='add'>+	ste_attr.table_type = FS_FT_FDB_RX;</div><div class='add'>+	size = &amp;matcher-&gt;attr.size[MLX5HWS_MATCHER_SIZE_TYPE_RX];</div><div class='add'>+	ste_attr.log_obj_range =</div><div class='add'>+		matcher-&gt;attr.optimize_flow_src ==</div><div class='add'>+			MLX5HWS_MATCHER_FLOW_SRC_VPORT ?</div><div class='add'>+			0 : size-&gt;table.sz_col_log + size-&gt;table.sz_row_log;</div><div class='add'>+</div><div class='add'>+	ret = mlx5hws_cmd_ste_create(ctx-&gt;mdev, &amp;ste_attr,</div><div class='add'>+				     &amp;matcher-&gt;match_ste.ste_0_base);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(ctx, "Failed to allocate RX STE range (%d)\n", ret);</div><div class='ctx'> 		goto uninit_match_definer;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ste_attr.table_type = FS_FT_FDB_TX;</div><div class='add'>+	size = &amp;matcher-&gt;attr.size[MLX5HWS_MATCHER_SIZE_TYPE_TX];</div><div class='add'>+	ste_attr.log_obj_range =</div><div class='add'>+		matcher-&gt;attr.optimize_flow_src ==</div><div class='add'>+			MLX5HWS_MATCHER_FLOW_SRC_WIRE ?</div><div class='add'>+			0 : size-&gt;table.sz_col_log + size-&gt;table.sz_row_log;</div><div class='add'>+</div><div class='add'>+	ret = mlx5hws_cmd_ste_create(ctx-&gt;mdev, &amp;ste_attr,</div><div class='add'>+				     &amp;matcher-&gt;match_ste.ste_1_base);</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(ctx, "Failed to allocate TX STE range (%d)\n", ret);</div><div class='add'>+		goto destroy_rx_ste_range;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+destroy_rx_ste_range:</div><div class='add'>+	mlx5hws_cmd_ste_destroy(ctx-&gt;mdev, matcher-&gt;match_ste.ste_0_base);</div><div class='ctx'> uninit_match_definer:</div><div class='ctx'> 	if (!(matcher-&gt;flags &amp; MLX5HWS_MATCHER_FLAGS_COLLISION))</div><div class='ctx'> 		mlx5hws_definer_mt_uninit(ctx, matcher-&gt;mt);</div><div class='hunk'>@@ -706,9 +741,12 @@ uninit_match_definer:</div><div class='ctx'> </div><div class='ctx'> static void hws_matcher_unbind_mt(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='del'>-	mlx5hws_pool_destroy(matcher-&gt;match_ste.pool);</div><div class='add'>+	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+</div><div class='add'>+	mlx5hws_cmd_ste_destroy(ctx-&gt;mdev, matcher-&gt;match_ste.ste_1_base);</div><div class='add'>+	mlx5hws_cmd_ste_destroy(ctx-&gt;mdev, matcher-&gt;match_ste.ste_0_base);</div><div class='ctx'> 	if (!(matcher-&gt;flags &amp; MLX5HWS_MATCHER_FLAGS_COLLISION))</div><div class='del'>-		mlx5hws_definer_mt_uninit(matcher-&gt;tbl-&gt;ctx, matcher-&gt;mt);</div><div class='add'>+		mlx5hws_definer_mt_uninit(ctx, matcher-&gt;mt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -717,6 +755,10 @@ hws_matcher_validate_insert_mode(struct mlx5hws_cmd_query_caps *caps,</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_matcher_attr *attr = &amp;matcher-&gt;attr;</div><div class='ctx'> 	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	union mlx5hws_matcher_size *size_rx, *size_tx;</div><div class='add'>+</div><div class='add'>+	size_rx = &amp;matcher-&gt;attr.size[MLX5HWS_MATCHER_SIZE_TYPE_RX];</div><div class='add'>+	size_tx = &amp;matcher-&gt;attr.size[MLX5HWS_MATCHER_SIZE_TYPE_TX];</div><div class='ctx'> </div><div class='ctx'> 	switch (attr-&gt;insert_mode) {</div><div class='ctx'> 	case MLX5HWS_MATCHER_INSERT_BY_HASH:</div><div class='hunk'>@@ -727,7 +769,7 @@ hws_matcher_validate_insert_mode(struct mlx5hws_cmd_query_caps *caps,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case MLX5HWS_MATCHER_INSERT_BY_INDEX:</div><div class='del'>-		if (attr-&gt;table.sz_col_log) {</div><div class='add'>+		if (size_rx-&gt;table.sz_col_log || size_tx-&gt;table.sz_col_log) {</div><div class='ctx'> 			mlx5hws_err(ctx, "Matcher with INSERT_BY_INDEX supports only Nx1 table size\n");</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -747,7 +789,10 @@ hws_matcher_validate_insert_mode(struct mlx5hws_cmd_query_caps *caps,</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (attr-&gt;table.sz_row_log &gt; MLX5_IFC_RTC_LINEAR_LOOKUP_TBL_LOG_MAX) {</div><div class='add'>+			if (size_rx-&gt;table.sz_row_log &gt;</div><div class='add'>+				MLX5_IFC_RTC_LINEAR_LOOKUP_TBL_LOG_MAX ||</div><div class='add'>+			    size_tx-&gt;table.sz_row_log &gt;</div><div class='add'>+				MLX5_IFC_RTC_LINEAR_LOOKUP_TBL_LOG_MAX) {</div><div class='ctx'> 				mlx5hws_err(ctx, "Matcher with linear distribute: rows exceed limit %d",</div><div class='ctx'> 					    MLX5_IFC_RTC_LINEAR_LOOKUP_TBL_LOG_MAX);</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='hunk'>@@ -771,6 +816,10 @@ hws_matcher_process_attr(struct mlx5hws_cmd_query_caps *caps,</div><div class='ctx'> 			 struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_matcher_attr *attr = &amp;matcher-&gt;attr;</div><div class='add'>+	union mlx5hws_matcher_size *size_rx, *size_tx;</div><div class='add'>+</div><div class='add'>+	size_rx = &amp;attr-&gt;size[MLX5HWS_MATCHER_SIZE_TYPE_RX];</div><div class='add'>+	size_tx = &amp;attr-&gt;size[MLX5HWS_MATCHER_SIZE_TYPE_TX];</div><div class='ctx'> </div><div class='ctx'> 	if (hws_matcher_validate_insert_mode(caps, matcher))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='hunk'>@@ -782,10 +831,16 @@ hws_matcher_process_attr(struct mlx5hws_cmd_query_caps *caps,</div><div class='ctx'> </div><div class='ctx'> 	/* Convert number of rules to the required depth */</div><div class='ctx'> 	if (attr-&gt;mode == MLX5HWS_MATCHER_RESOURCE_MODE_RULE &amp;&amp;</div><div class='del'>-	    attr-&gt;insert_mode == MLX5HWS_MATCHER_INSERT_BY_HASH)</div><div class='del'>-		attr-&gt;table.sz_col_log = hws_matcher_rules_to_tbl_depth(attr-&gt;rule.num_log);</div><div class='add'>+	    attr-&gt;insert_mode == MLX5HWS_MATCHER_INSERT_BY_HASH) {</div><div class='add'>+		size_rx-&gt;table.sz_col_log =</div><div class='add'>+			hws_matcher_rules_to_tbl_depth(size_rx-&gt;rule.num_log);</div><div class='add'>+		size_tx-&gt;table.sz_col_log =</div><div class='add'>+			hws_matcher_rules_to_tbl_depth(size_tx-&gt;rule.num_log);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	matcher-&gt;flags |= attr-&gt;resizable ? MLX5HWS_MATCHER_FLAGS_RESIZABLE : 0;</div><div class='add'>+	matcher-&gt;flags |= attr-&gt;isolated_matcher_end_ft_id ?</div><div class='add'>+			  MLX5HWS_MATCHER_FLAGS_ISOLATED : 0;</div><div class='ctx'> </div><div class='ctx'> 	return hws_matcher_check_attr_sz(caps, matcher);</div><div class='ctx'> }</div><div class='hunk'>@@ -807,10 +862,10 @@ static int hws_matcher_create_and_connect(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 	/* Create matcher end flow table anchor */</div><div class='ctx'> 	ret = hws_matcher_create_end_ft(matcher);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto unbind_at;</div><div class='add'>+		goto unbind_mt;</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate the RTC for the new matcher */</div><div class='del'>-	ret = hws_matcher_create_rtc(matcher, HWS_MATCHER_RTC_TYPE_MATCH, 0);</div><div class='add'>+	ret = hws_matcher_create_rtc(matcher);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto destroy_end_ft;</div><div class='ctx'> </div><div class='hunk'>@@ -822,11 +877,9 @@ static int hws_matcher_create_and_connect(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> destroy_rtc:</div><div class='del'>-	hws_matcher_destroy_rtc(matcher, HWS_MATCHER_RTC_TYPE_MATCH, 0);</div><div class='add'>+	hws_matcher_destroy_rtc(matcher);</div><div class='ctx'> destroy_end_ft:</div><div class='ctx'> 	hws_matcher_destroy_end_ft(matcher);</div><div class='del'>-unbind_at:</div><div class='del'>-	hws_matcher_unbind_at(matcher);</div><div class='ctx'> unbind_mt:</div><div class='ctx'> 	hws_matcher_unbind_mt(matcher);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -834,11 +887,9 @@ unbind_mt:</div><div class='ctx'> </div><div class='ctx'> static void hws_matcher_destroy_and_disconnect(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='del'>-	hws_matcher_resize_uninit(matcher);</div><div class='ctx'> 	hws_matcher_disconnect(matcher);</div><div class='del'>-	hws_matcher_destroy_rtc(matcher, HWS_MATCHER_RTC_TYPE_MATCH, 0);</div><div class='add'>+	hws_matcher_destroy_rtc(matcher);</div><div class='ctx'> 	hws_matcher_destroy_end_ft(matcher);</div><div class='del'>-	hws_matcher_unbind_at(matcher);</div><div class='ctx'> 	hws_matcher_unbind_mt(matcher);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -846,22 +897,25 @@ static int</div><div class='ctx'> hws_matcher_create_col_matcher(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	union mlx5hws_matcher_size *size_rx, *size_tx;</div><div class='ctx'> 	struct mlx5hws_matcher *col_matcher;</div><div class='del'>-	int ret;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	size_rx = &amp;matcher-&gt;attr.size[MLX5HWS_MATCHER_SIZE_TYPE_RX];</div><div class='add'>+	size_tx = &amp;matcher-&gt;attr.size[MLX5HWS_MATCHER_SIZE_TYPE_TX];</div><div class='ctx'> </div><div class='ctx'> 	if (matcher-&gt;attr.mode != MLX5HWS_MATCHER_RESOURCE_MODE_RULE ||</div><div class='ctx'> 	    matcher-&gt;attr.insert_mode == MLX5HWS_MATCHER_INSERT_BY_INDEX)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (!hws_matcher_requires_col_tbl(matcher-&gt;attr.rule.num_log))</div><div class='add'>+	if (!hws_matcher_requires_col_tbl(size_rx-&gt;rule.num_log) &amp;&amp;</div><div class='add'>+	    !hws_matcher_requires_col_tbl(size_tx-&gt;rule.num_log))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	col_matcher = kzalloc(sizeof(*matcher), GFP_KERNEL);</div><div class='ctx'> 	if (!col_matcher)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	INIT_LIST_HEAD(&amp;col_matcher-&gt;resize_data);</div><div class='del'>-</div><div class='ctx'> 	col_matcher-&gt;tbl = matcher-&gt;tbl;</div><div class='ctx'> 	col_matcher-&gt;mt = matcher-&gt;mt;</div><div class='ctx'> 	col_matcher-&gt;at = matcher-&gt;at;</div><div class='hunk'>@@ -872,12 +926,20 @@ hws_matcher_create_col_matcher(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 	col_matcher-&gt;flags |= MLX5HWS_MATCHER_FLAGS_COLLISION;</div><div class='ctx'> 	col_matcher-&gt;attr.mode = MLX5HWS_MATCHER_RESOURCE_MODE_HTABLE;</div><div class='ctx'> 	col_matcher-&gt;attr.optimize_flow_src = matcher-&gt;attr.optimize_flow_src;</div><div class='del'>-	col_matcher-&gt;attr.table.sz_row_log = matcher-&gt;attr.rule.num_log;</div><div class='del'>-	col_matcher-&gt;attr.table.sz_col_log = MLX5HWS_MATCHER_ASSURED_COL_TBL_DEPTH;</div><div class='del'>-	if (col_matcher-&gt;attr.table.sz_row_log &gt; MLX5HWS_MATCHER_ASSURED_ROW_RATIO)</div><div class='del'>-		col_matcher-&gt;attr.table.sz_row_log -= MLX5HWS_MATCHER_ASSURED_ROW_RATIO;</div><div class='add'>+	for (i = 0; i &lt; 2; i++) {</div><div class='add'>+		union mlx5hws_matcher_size *dst = &amp;col_matcher-&gt;attr.size[i];</div><div class='add'>+		union mlx5hws_matcher_size *src = &amp;matcher-&gt;attr.size[i];</div><div class='add'>+</div><div class='add'>+		dst-&gt;table.sz_row_log = src-&gt;rule.num_log;</div><div class='add'>+		dst-&gt;table.sz_col_log = MLX5HWS_MATCHER_ASSURED_COL_TBL_DEPTH;</div><div class='add'>+		if (dst-&gt;table.sz_row_log &gt; MLX5HWS_MATCHER_ASSURED_ROW_RATIO)</div><div class='add'>+			dst-&gt;table.sz_row_log -=</div><div class='add'>+				MLX5HWS_MATCHER_ASSURED_ROW_RATIO;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	col_matcher-&gt;attr.max_num_of_at_attach = matcher-&gt;attr.max_num_of_at_attach;</div><div class='add'>+	col_matcher-&gt;attr.isolated_matcher_end_ft_id =</div><div class='add'>+		matcher-&gt;attr.isolated_matcher_end_ft_id;</div><div class='ctx'> </div><div class='ctx'> 	ret = hws_matcher_process_attr(ctx-&gt;caps, col_matcher);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -915,8 +977,6 @@ static int hws_matcher_init(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	INIT_LIST_HEAD(&amp;matcher-&gt;resize_data);</div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;ctx-&gt;ctrl_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate matcher resource and connect to the packet pipe */</div><div class='hunk'>@@ -951,18 +1011,44 @@ static int hws_matcher_uninit(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int hws_matcher_grow_at_array(struct mlx5hws_matcher *matcher)</div><div class='add'>+{</div><div class='add'>+	void *p;</div><div class='add'>+</div><div class='add'>+	if (matcher-&gt;size_of_at_array &gt;= MLX5HWS_MATCHER_MAX_AT)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	matcher-&gt;size_of_at_array *= 2;</div><div class='add'>+	p = krealloc(matcher-&gt;at,</div><div class='add'>+		     matcher-&gt;size_of_at_array * sizeof(*matcher-&gt;at),</div><div class='add'>+		     __GFP_ZERO | GFP_KERNEL);</div><div class='add'>+	if (!p) {</div><div class='add'>+		matcher-&gt;size_of_at_array /= 2;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	matcher-&gt;at = p;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5hws_matcher_attach_at(struct mlx5hws_matcher *matcher,</div><div class='ctx'> 			      struct mlx5hws_action_template *at)</div><div class='ctx'> {</div><div class='ctx'> 	bool is_jumbo = mlx5hws_matcher_mt_is_jumbo(matcher-&gt;mt);</div><div class='del'>-	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='ctx'> 	u32 required_stes;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!matcher-&gt;attr.max_num_of_at_attach) {</div><div class='del'>-		mlx5hws_dbg(ctx, "Num of current at (%d) exceed allowed value\n",</div><div class='del'>-			    matcher-&gt;num_of_at);</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+	if (unlikely(matcher-&gt;num_of_at &gt;= matcher-&gt;size_of_at_array)) {</div><div class='add'>+		ret = hws_matcher_grow_at_array(matcher);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (matcher-&gt;col_matcher) {</div><div class='add'>+			ret = hws_matcher_grow_at_array(matcher-&gt;col_matcher);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = hws_matcher_check_and_process_at(matcher, at);</div><div class='hunk'>@@ -970,16 +1056,11 @@ int mlx5hws_matcher_attach_at(struct mlx5hws_matcher *matcher,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	required_stes = at-&gt;num_of_action_stes - (!is_jumbo || at-&gt;only_term);</div><div class='del'>-	if (matcher-&gt;action_ste[MLX5HWS_ACTION_STE_IDX_ANY].max_stes &lt; required_stes) {</div><div class='del'>-		mlx5hws_dbg(ctx, "Required STEs [%d] exceeds initial action template STE [%d]\n",</div><div class='del'>-			    required_stes,</div><div class='del'>-			    matcher-&gt;action_ste[MLX5HWS_ACTION_STE_IDX_ANY].max_stes);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='add'>+	if (matcher-&gt;num_of_action_stes &lt; required_stes)</div><div class='add'>+		matcher-&gt;num_of_action_stes = required_stes;</div><div class='ctx'> </div><div class='ctx'> 	matcher-&gt;at[matcher-&gt;num_of_at] = *at;</div><div class='ctx'> 	matcher-&gt;num_of_at += 1;</div><div class='del'>-	matcher-&gt;attr.max_num_of_at_attach -= 1;</div><div class='ctx'> </div><div class='ctx'> 	if (matcher-&gt;col_matcher)</div><div class='ctx'> 		matcher-&gt;col_matcher-&gt;num_of_at = matcher-&gt;num_of_at;</div><div class='hunk'>@@ -1007,9 +1088,10 @@ hws_matcher_set_templates(struct mlx5hws_matcher *matcher,</div><div class='ctx'> 	if (!matcher-&gt;mt)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	matcher-&gt;at = kcalloc(num_of_at + matcher-&gt;attr.max_num_of_at_attach,</div><div class='del'>-			      sizeof(*matcher-&gt;at),</div><div class='del'>-			      GFP_KERNEL);</div><div class='add'>+	matcher-&gt;size_of_at_array =</div><div class='add'>+		num_of_at + matcher-&gt;attr.max_num_of_at_attach;</div><div class='add'>+	matcher-&gt;at = kvcalloc(matcher-&gt;size_of_at_array, sizeof(*matcher-&gt;at),</div><div class='add'>+			       GFP_KERNEL);</div><div class='ctx'> 	if (!matcher-&gt;at) {</div><div class='ctx'> 		mlx5hws_err(ctx, "Failed to allocate action template array\n");</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -1035,7 +1117,7 @@ free_mt:</div><div class='ctx'> static void</div><div class='ctx'> hws_matcher_unset_templates(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='del'>-	kfree(matcher-&gt;at);</div><div class='add'>+	kvfree(matcher-&gt;at);</div><div class='ctx'> 	kfree(matcher-&gt;mt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1157,8 +1239,7 @@ static int hws_matcher_resize_precheck(struct mlx5hws_matcher *src_matcher,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (src_matcher-&gt;action_ste[MLX5HWS_ACTION_STE_IDX_ANY].max_stes &gt;</div><div class='del'>-	    dst_matcher-&gt;action_ste[0].max_stes) {</div><div class='add'>+	if (src_matcher-&gt;num_of_action_stes &gt; dst_matcher-&gt;num_of_action_stes) {</div><div class='ctx'> 		mlx5hws_err(ctx, "Src/dst matcher max STEs mismatch\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1187,10 +1268,6 @@ int mlx5hws_matcher_resize_set_target(struct mlx5hws_matcher *src_matcher,</div><div class='ctx'> </div><div class='ctx'> 	src_matcher-&gt;resize_dst = dst_matcher;</div><div class='ctx'> </div><div class='del'>-	ret = hws_matcher_resize_init(src_matcher);</div><div class='del'>-	if (ret)</div><div class='del'>-		src_matcher-&gt;resize_dst = NULL;</div><div class='del'>-</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;src_matcher-&gt;tbl-&gt;ctx-&gt;ctrl_lock);</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_matcher.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.h<br/>index 125391d1a114..ae20bcebfdde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_matcher.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_matcher.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.h</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#ifndef MLX5HWS_MATCHER_H_</div><div class='del'>-#define MLX5HWS_MATCHER_H_</div><div class='add'>+#ifndef HWS_MATCHER_H_</div><div class='add'>+#define HWS_MATCHER_H_</div><div class='ctx'> </div><div class='ctx'> /* We calculated that concatenating a collision table to the main table with</div><div class='ctx'>  * 3% of the main table rows will be enough resources for high insertion</div><div class='hunk'>@@ -18,6 +18,14 @@</div><div class='ctx'> /* Required depth of the main large table */</div><div class='ctx'> #define MLX5HWS_MATCHER_ASSURED_MAIN_TBL_DEPTH 2</div><div class='ctx'> </div><div class='add'>+/* Action RTC size multiplier that is required in order</div><div class='add'>+ * to support rule update for rules with action STEs.</div><div class='add'>+ */</div><div class='add'>+#define MLX5HWS_MATCHER_ACTION_RTC_UPDATE_MULT 1</div><div class='add'>+</div><div class='add'>+/* Maximum number of action templates that can be attached to a matcher. */</div><div class='add'>+#define MLX5HWS_MATCHER_MAX_AT 128</div><div class='add'>+</div><div class='ctx'> enum mlx5hws_matcher_offset {</div><div class='ctx'> 	MLX5HWS_MATCHER_OFFSET_TAG_DW1 = 12,</div><div class='ctx'> 	MLX5HWS_MATCHER_OFFSET_TAG_DW0 = 13,</div><div class='hunk'>@@ -26,6 +34,7 @@ enum mlx5hws_matcher_offset {</div><div class='ctx'> enum mlx5hws_matcher_flags {</div><div class='ctx'> 	MLX5HWS_MATCHER_FLAGS_COLLISION = 1 &lt;&lt; 2,</div><div class='ctx'> 	MLX5HWS_MATCHER_FLAGS_RESIZABLE	= 1 &lt;&lt; 3,</div><div class='add'>+	MLX5HWS_MATCHER_FLAGS_ISOLATED	= 1 &lt;&lt; 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_match_template {</div><div class='hunk'>@@ -37,32 +46,16 @@ struct mlx5hws_match_template {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_matcher_match_ste {</div><div class='del'>-	struct mlx5hws_pool_chunk ste;</div><div class='del'>-	u32 rtc_0_id;</div><div class='del'>-	u32 rtc_1_id;</div><div class='del'>-	struct mlx5hws_pool *pool;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5hws_matcher_action_ste {</div><div class='del'>-	struct mlx5hws_pool_chunk ste;</div><div class='del'>-	struct mlx5hws_pool_chunk stc;</div><div class='del'>-	u32 rtc_0_id;</div><div class='del'>-	u32 rtc_1_id;</div><div class='del'>-	struct mlx5hws_pool *pool;</div><div class='del'>-	u8 max_stes;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5hws_matcher_resize_data_node {</div><div class='del'>-	struct mlx5hws_pool_chunk stc;</div><div class='ctx'> 	u32 rtc_0_id;</div><div class='ctx'> 	u32 rtc_1_id;</div><div class='del'>-	struct mlx5hws_pool *pool;</div><div class='add'>+	u32 ste_0_base;</div><div class='add'>+	u32 ste_1_base;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mlx5hws_matcher_resize_data {</div><div class='del'>-	struct mlx5hws_matcher_resize_data_node action_ste[2];</div><div class='del'>-	u8 max_stes;</div><div class='del'>-	struct list_head list_node;</div><div class='add'>+enum {</div><div class='add'>+	MLX5HWS_MATCHER_IPV_UNSET = 0,</div><div class='add'>+	MLX5HWS_MATCHER_IPV_4 = 1,</div><div class='add'>+	MLX5HWS_MATCHER_IPV_6 = 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_matcher {</div><div class='hunk'>@@ -71,16 +64,22 @@ struct mlx5hws_matcher {</div><div class='ctx'> 	struct mlx5hws_match_template *mt;</div><div class='ctx'> 	struct mlx5hws_action_template *at;</div><div class='ctx'> 	u8 num_of_at;</div><div class='add'>+	u8 size_of_at_array;</div><div class='ctx'> 	u8 num_of_mt;</div><div class='add'>+	u8 num_of_action_stes;</div><div class='ctx'> 	/* enum mlx5hws_matcher_flags */</div><div class='ctx'> 	u8 flags;</div><div class='add'>+	u8 matches_outer_ethertype:1;</div><div class='add'>+	u8 matches_outer_ip_version:1;</div><div class='add'>+	u8 matches_inner_ethertype:1;</div><div class='add'>+	u8 matches_inner_ip_version:1;</div><div class='add'>+	u8 outer_ip_version:2;</div><div class='add'>+	u8 inner_ip_version:2;</div><div class='ctx'> 	u32 end_ft_id;</div><div class='ctx'> 	struct mlx5hws_matcher *col_matcher;</div><div class='ctx'> 	struct mlx5hws_matcher *resize_dst;</div><div class='ctx'> 	struct mlx5hws_matcher_match_ste match_ste;</div><div class='del'>-	struct mlx5hws_matcher_action_ste action_ste[2];</div><div class='ctx'> 	struct list_head list_node;</div><div class='del'>-	struct list_head resize_data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline bool</div><div class='hunk'>@@ -99,9 +98,17 @@ static inline bool mlx5hws_matcher_is_in_resize(struct mlx5hws_matcher *matcher)</div><div class='ctx'> 	return !!matcher-&gt;resize_dst;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool mlx5hws_matcher_is_isolated(struct mlx5hws_matcher *matcher)</div><div class='add'>+{</div><div class='add'>+	return !!(matcher-&gt;flags &amp; MLX5HWS_MATCHER_FLAGS_ISOLATED);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline bool mlx5hws_matcher_is_insert_by_idx(struct mlx5hws_matcher *matcher)</div><div class='ctx'> {</div><div class='ctx'> 	return matcher-&gt;attr.insert_mode == MLX5HWS_MATCHER_INSERT_BY_INDEX;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* MLX5HWS_MATCHER_H_ */</div><div class='add'>+int mlx5hws_matcher_update_end_ft_isolated(struct mlx5hws_table *tbl,</div><div class='add'>+					   u32 miss_ft_id);</div><div class='add'>+</div><div class='add'>+#endif /* HWS_MATCHER_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h<br/>index f39d636ff39a..1ad7a50d938b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h</a></div><div class='hunk'>@@ -70,12 +70,12 @@ enum mlx5hws_send_queue_actions {</div><div class='ctx'> struct mlx5hws_context_attr {</div><div class='ctx'> 	u16 queues;</div><div class='ctx'> 	u16 queue_size;</div><div class='del'>-	bool bwc; /* add support for backward compatible API*/</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_table_attr {</div><div class='ctx'> 	enum mlx5hws_table_type type;</div><div class='ctx'> 	u32 level;</div><div class='add'>+	u16 uid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum mlx5hws_matcher_flow_src {</div><div class='hunk'>@@ -94,6 +94,23 @@ enum mlx5hws_matcher_distribute_mode {</div><div class='ctx'> 	MLX5HWS_MATCHER_DISTRIBUTE_BY_LINEAR = 0x1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum mlx5hws_matcher_size_type {</div><div class='add'>+	MLX5HWS_MATCHER_SIZE_TYPE_RX,</div><div class='add'>+	MLX5HWS_MATCHER_SIZE_TYPE_TX,</div><div class='add'>+	MLX5HWS_MATCHER_SIZE_TYPE_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union mlx5hws_matcher_size {</div><div class='add'>+	struct {</div><div class='add'>+		u8 sz_row_log;</div><div class='add'>+		u8 sz_col_log;</div><div class='add'>+	} table;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u8 num_log;</div><div class='add'>+	} rule;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mlx5hws_matcher_attr {</div><div class='ctx'> 	/* Processing priority inside table */</div><div class='ctx'> 	u32 priority;</div><div class='hunk'>@@ -108,18 +125,11 @@ struct mlx5hws_matcher_attr {</div><div class='ctx'> 	enum mlx5hws_matcher_distribute_mode distribute_mode;</div><div class='ctx'> 	/* Define whether the created matcher supports resizing into a bigger matcher */</div><div class='ctx'> 	bool resizable;</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			u8 sz_row_log;</div><div class='del'>-			u8 sz_col_log;</div><div class='del'>-		} table;</div><div class='del'>-</div><div class='del'>-		struct {</div><div class='del'>-			u8 num_log;</div><div class='del'>-		} rule;</div><div class='del'>-	};</div><div class='add'>+	union mlx5hws_matcher_size size[MLX5HWS_MATCHER_SIZE_TYPE_MAX];</div><div class='ctx'> 	/* Optional AT attach configuration - Max number of additional AT */</div><div class='ctx'> 	u8 max_num_of_at_attach;</div><div class='add'>+	/* Optional end FT (miss FT ID) for match RTC (for isolated matcher) */</div><div class='add'>+	u32 isolated_matcher_end_ft_id;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_rule_attr {</div><div class='hunk'>@@ -212,6 +222,7 @@ struct mlx5hws_action_dest_attr {</div><div class='ctx'> 	struct mlx5hws_action *dest;</div><div class='ctx'> 	/* Optional reformat action */</div><div class='ctx'> 	struct mlx5hws_action *reformat;</div><div class='add'>+	bool is_wire_ft;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -503,6 +514,15 @@ enum mlx5hws_action_type</div><div class='ctx'> mlx5hws_action_get_type(struct mlx5hws_action *action);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * mlx5hws_action_get_dev - Get mlx5 core device.</div><div class='add'>+ *</div><div class='add'>+ * @action: The action to get the device from.</div><div class='add'>+ *</div><div class='add'>+ * Return: mlx5 core device.</div><div class='add'>+ */</div><div class='add'>+struct mlx5_core_dev *mlx5hws_action_get_dev(struct mlx5hws_action *action);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * mlx5hws_action_create_dest_drop - Create a direct rule drop action.</div><div class='ctx'>  *</div><div class='ctx'>  * @ctx: The context in which the new action will be created.</div><div class='hunk'>@@ -715,18 +735,13 @@ mlx5hws_action_create_push_vlan(struct mlx5hws_context *ctx, u32 flags);</div><div class='ctx'>  * @num_dest: The number of dests attributes.</div><div class='ctx'>  * @dests: The destination array. Each contains a destination action and can</div><div class='ctx'>  *	   have additional actions.</div><div class='del'>- * @ignore_flow_level: Whether to turn on 'ignore_flow_level' for this dest.</div><div class='del'>- * @flow_source: Source port of the traffic for this actions.</div><div class='ctx'>  * @flags: Action creation flags (enum mlx5hws_action_flags).</div><div class='ctx'>  *</div><div class='ctx'>  * Return: pointer to mlx5hws_action on success NULL otherwise.</div><div class='ctx'>  */</div><div class='ctx'> struct mlx5hws_action *</div><div class='del'>-mlx5hws_action_create_dest_array(struct mlx5hws_context *ctx,</div><div class='del'>-				 size_t num_dest,</div><div class='add'>+mlx5hws_action_create_dest_array(struct mlx5hws_context *ctx, size_t num_dest,</div><div class='ctx'> 				 struct mlx5hws_action_dest_attr *dests,</div><div class='del'>-				 bool ignore_flow_level,</div><div class='del'>-				 u32 flow_source,</div><div class='ctx'> 				 u32 flags);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.c<br/>deleted file mode 100644<br/>index 601fad5fc54a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,86 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='del'>-/* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='del'>-</div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='del'>-</div><div class='del'>-bool mlx5hws_bwc_match_params_is_complex(struct mlx5hws_context *ctx,</div><div class='del'>-					 u8 match_criteria_enable,</div><div class='del'>-					 struct mlx5hws_match_parameters *mask)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_definer match_layout = {0};</div><div class='del'>-	struct mlx5hws_match_template *mt;</div><div class='del'>-	bool is_complex = false;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!match_criteria_enable)</div><div class='del'>-		return false; /* empty matcher */</div><div class='del'>-</div><div class='del'>-	mt = mlx5hws_match_template_create(ctx,</div><div class='del'>-					   mask-&gt;match_buf,</div><div class='del'>-					   mask-&gt;match_sz,</div><div class='del'>-					   match_criteria_enable);</div><div class='del'>-	if (!mt) {</div><div class='del'>-		mlx5hws_err(ctx, "BWC: failed creating match template\n");</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = mlx5hws_definer_calc_layout(ctx, mt, &amp;match_layout);</div><div class='del'>-	if (ret) {</div><div class='del'>-		/* The only case that we're interested in is E2BIG,</div><div class='del'>-		 * which means that the match parameters need to be</div><div class='del'>-		 * split into complex martcher.</div><div class='del'>-		 * For all other cases (good or bad) - just return true</div><div class='del'>-		 * and let the usual match creation path handle it,</div><div class='del'>-		 * both for good and bad flows.</div><div class='del'>-		 */</div><div class='del'>-		if (ret == -E2BIG) {</div><div class='del'>-			is_complex = true;</div><div class='del'>-			mlx5hws_dbg(ctx, "Matcher definer layout: need complex matcher\n");</div><div class='del'>-		} else {</div><div class='del'>-			mlx5hws_err(ctx, "Failed to calculate matcher definer layout\n");</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mlx5hws_match_template_destroy(mt);</div><div class='del'>-</div><div class='del'>-	return is_complex;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mlx5hws_bwc_matcher_create_complex(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='del'>-				       struct mlx5hws_table *table,</div><div class='del'>-				       u32 priority,</div><div class='del'>-				       u8 match_criteria_enable,</div><div class='del'>-				       struct mlx5hws_match_parameters *mask)</div><div class='del'>-{</div><div class='del'>-	mlx5hws_err(table-&gt;ctx, "Complex matcher is not supported yet\n");</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-mlx5hws_bwc_matcher_destroy_complex(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='del'>-{</div><div class='del'>-	/* nothing to do here */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mlx5hws_bwc_rule_create_complex(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='del'>-				    struct mlx5hws_match_parameters *params,</div><div class='del'>-				    u32 flow_source,</div><div class='del'>-				    struct mlx5hws_rule_action rule_actions[],</div><div class='del'>-				    u16 bwc_queue_idx)</div><div class='del'>-{</div><div class='del'>-	mlx5hws_err(bwc_rule-&gt;bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx,</div><div class='del'>-		    "Complex rule is not supported yet\n");</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mlx5hws_bwc_rule_destroy_complex(struct mlx5hws_bwc_rule *bwc_rule)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mlx5hws_bwc_matcher_move_all_complex(struct mlx5hws_bwc_matcher *bwc_matcher)</div><div class='del'>-{</div><div class='del'>-	mlx5hws_err(bwc_matcher-&gt;matcher-&gt;tbl-&gt;ctx,</div><div class='del'>-		    "Moving complex rule is not supported yet\n");</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.h<br/>deleted file mode 100644<br/>index 068ee8118609..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_bwc_complex.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='del'>-/* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='del'>-</div><div class='del'>-#ifndef MLX5HWS_BWC_COMPLEX_H_</div><div class='del'>-#define MLX5HWS_BWC_COMPLEX_H_</div><div class='del'>-</div><div class='del'>-bool mlx5hws_bwc_match_params_is_complex(struct mlx5hws_context *ctx,</div><div class='del'>-					 u8 match_criteria_enable,</div><div class='del'>-					 struct mlx5hws_match_parameters *mask);</div><div class='del'>-</div><div class='del'>-int mlx5hws_bwc_matcher_create_complex(struct mlx5hws_bwc_matcher *bwc_matcher,</div><div class='del'>-				       struct mlx5hws_table *table,</div><div class='del'>-				       u32 priority,</div><div class='del'>-				       u8 match_criteria_enable,</div><div class='del'>-				       struct mlx5hws_match_parameters *mask);</div><div class='del'>-</div><div class='del'>-void mlx5hws_bwc_matcher_destroy_complex(struct mlx5hws_bwc_matcher *bwc_matcher);</div><div class='del'>-</div><div class='del'>-int mlx5hws_bwc_matcher_move_all_complex(struct mlx5hws_bwc_matcher *bwc_matcher);</div><div class='del'>-</div><div class='del'>-int mlx5hws_bwc_rule_create_complex(struct mlx5hws_bwc_rule *bwc_rule,</div><div class='del'>-				    struct mlx5hws_match_parameters *params,</div><div class='del'>-				    u32 flow_source,</div><div class='del'>-				    struct mlx5hws_rule_action rule_actions[],</div><div class='del'>-				    u16 bwc_queue_idx);</div><div class='del'>-</div><div class='del'>-int mlx5hws_bwc_rule_destroy_complex(struct mlx5hws_bwc_rule *bwc_rule);</div><div class='del'>-</div><div class='del'>-#endif /* MLX5HWS_BWC_COMPLEX_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.c<br/>deleted file mode 100644<br/>index a8a63e3278be..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,640 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='del'>-/* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='del'>-</div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='del'>-#include "mlx5hws_buddy.h"</div><div class='del'>-</div><div class='del'>-static void hws_pool_free_one_resource(struct mlx5hws_pool_resource *resource)</div><div class='del'>-{</div><div class='del'>-	switch (resource-&gt;pool-&gt;type) {</div><div class='del'>-	case MLX5HWS_POOL_TYPE_STE:</div><div class='del'>-		mlx5hws_cmd_ste_destroy(resource-&gt;pool-&gt;ctx-&gt;mdev, resource-&gt;base_id);</div><div class='del'>-		break;</div><div class='del'>-	case MLX5HWS_POOL_TYPE_STC:</div><div class='del'>-		mlx5hws_cmd_stc_destroy(resource-&gt;pool-&gt;ctx-&gt;mdev, resource-&gt;base_id);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kfree(resource);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_pool_resource_free(struct mlx5hws_pool *pool,</div><div class='del'>-				   int resource_idx)</div><div class='del'>-{</div><div class='del'>-	hws_pool_free_one_resource(pool-&gt;resource[resource_idx]);</div><div class='del'>-	pool-&gt;resource[resource_idx] = NULL;</div><div class='del'>-</div><div class='del'>-	if (pool-&gt;tbl_type == MLX5HWS_TABLE_TYPE_FDB) {</div><div class='del'>-		hws_pool_free_one_resource(pool-&gt;mirror_resource[resource_idx]);</div><div class='del'>-		pool-&gt;mirror_resource[resource_idx] = NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct mlx5hws_pool_resource *</div><div class='del'>-hws_pool_create_one_resource(struct mlx5hws_pool *pool, u32 log_range,</div><div class='del'>-			     u32 fw_ft_type)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_cmd_ste_create_attr ste_attr;</div><div class='del'>-	struct mlx5hws_cmd_stc_create_attr stc_attr;</div><div class='del'>-	struct mlx5hws_pool_resource *resource;</div><div class='del'>-	u32 obj_id = 0;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	resource = kzalloc(sizeof(*resource), GFP_KERNEL);</div><div class='del'>-	if (!resource)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	switch (pool-&gt;type) {</div><div class='del'>-	case MLX5HWS_POOL_TYPE_STE:</div><div class='del'>-		ste_attr.log_obj_range = log_range;</div><div class='del'>-		ste_attr.table_type = fw_ft_type;</div><div class='del'>-		ret = mlx5hws_cmd_ste_create(pool-&gt;ctx-&gt;mdev, &amp;ste_attr, &amp;obj_id);</div><div class='del'>-		break;</div><div class='del'>-	case MLX5HWS_POOL_TYPE_STC:</div><div class='del'>-		stc_attr.log_obj_range = log_range;</div><div class='del'>-		stc_attr.table_type = fw_ft_type;</div><div class='del'>-		ret = mlx5hws_cmd_stc_create(pool-&gt;ctx-&gt;mdev, &amp;stc_attr, &amp;obj_id);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "Failed to allocate resource objects\n");</div><div class='del'>-		goto free_resource;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	resource-&gt;pool = pool;</div><div class='del'>-	resource-&gt;range = 1 &lt;&lt; log_range;</div><div class='del'>-	resource-&gt;base_id = obj_id;</div><div class='del'>-</div><div class='del'>-	return resource;</div><div class='del'>-</div><div class='del'>-free_resource:</div><div class='del'>-	kfree(resource);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-hws_pool_resource_alloc(struct mlx5hws_pool *pool, u32 log_range, int idx)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_pool_resource *resource;</div><div class='del'>-	u32 fw_ft_type, opt_log_range;</div><div class='del'>-</div><div class='del'>-	fw_ft_type = mlx5hws_table_get_res_fw_ft_type(pool-&gt;tbl_type, false);</div><div class='del'>-	opt_log_range = pool-&gt;opt_type == MLX5HWS_POOL_OPTIMIZE_ORIG ? 0 : log_range;</div><div class='del'>-	resource = hws_pool_create_one_resource(pool, opt_log_range, fw_ft_type);</div><div class='del'>-	if (!resource) {</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "Failed allocating resource\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pool-&gt;resource[idx] = resource;</div><div class='del'>-</div><div class='del'>-	if (pool-&gt;tbl_type == MLX5HWS_TABLE_TYPE_FDB) {</div><div class='del'>-		struct mlx5hws_pool_resource *mirror_resource;</div><div class='del'>-</div><div class='del'>-		fw_ft_type = mlx5hws_table_get_res_fw_ft_type(pool-&gt;tbl_type, true);</div><div class='del'>-		opt_log_range = pool-&gt;opt_type == MLX5HWS_POOL_OPTIMIZE_MIRROR ? 0 : log_range;</div><div class='del'>-		mirror_resource = hws_pool_create_one_resource(pool, opt_log_range, fw_ft_type);</div><div class='del'>-		if (!mirror_resource) {</div><div class='del'>-			mlx5hws_err(pool-&gt;ctx, "Failed allocating mirrored resource\n");</div><div class='del'>-			hws_pool_free_one_resource(resource);</div><div class='del'>-			pool-&gt;resource[idx] = NULL;</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-		pool-&gt;mirror_resource[idx] = mirror_resource;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned long *hws_pool_create_and_init_bitmap(u32 log_range)</div><div class='del'>-{</div><div class='del'>-	unsigned long *cur_bmp;</div><div class='del'>-</div><div class='del'>-	cur_bmp = bitmap_zalloc(1 &lt;&lt; log_range, GFP_KERNEL);</div><div class='del'>-	if (!cur_bmp)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	bitmap_fill(cur_bmp, 1 &lt;&lt; log_range);</div><div class='del'>-</div><div class='del'>-	return cur_bmp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_pool_buddy_db_put_chunk(struct mlx5hws_pool *pool,</div><div class='del'>-					struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_buddy_mem *buddy;</div><div class='del'>-</div><div class='del'>-	buddy = pool-&gt;db.buddy_manager-&gt;buddies[chunk-&gt;resource_idx];</div><div class='del'>-	if (!buddy) {</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "No such buddy (%d)\n", chunk-&gt;resource_idx);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mlx5hws_buddy_free_mem(buddy, chunk-&gt;offset, chunk-&gt;order);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct mlx5hws_buddy_mem *</div><div class='del'>-hws_pool_buddy_get_next_buddy(struct mlx5hws_pool *pool, int idx,</div><div class='del'>-			      u32 order, bool *is_new_buddy)</div><div class='del'>-{</div><div class='del'>-	static struct mlx5hws_buddy_mem *buddy;</div><div class='del'>-	u32 new_buddy_size;</div><div class='del'>-</div><div class='del'>-	buddy = pool-&gt;db.buddy_manager-&gt;buddies[idx];</div><div class='del'>-	if (buddy)</div><div class='del'>-		return buddy;</div><div class='del'>-</div><div class='del'>-	new_buddy_size = max(pool-&gt;alloc_log_sz, order);</div><div class='del'>-	*is_new_buddy = true;</div><div class='del'>-	buddy = mlx5hws_buddy_create(new_buddy_size);</div><div class='del'>-	if (!buddy) {</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "Failed to create buddy order: %d index: %d\n",</div><div class='del'>-			    new_buddy_size, idx);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (hws_pool_resource_alloc(pool, new_buddy_size, idx) != 0) {</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "Failed to create resource type: %d: size %d index: %d\n",</div><div class='del'>-			    pool-&gt;type, new_buddy_size, idx);</div><div class='del'>-		mlx5hws_buddy_cleanup(buddy);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pool-&gt;db.buddy_manager-&gt;buddies[idx] = buddy;</div><div class='del'>-</div><div class='del'>-	return buddy;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hws_pool_buddy_get_mem_chunk(struct mlx5hws_pool *pool,</div><div class='del'>-					int order,</div><div class='del'>-					u32 *buddy_idx,</div><div class='del'>-					int *seg)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_buddy_mem *buddy;</div><div class='del'>-	bool new_mem = false;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	*seg = -1;</div><div class='del'>-</div><div class='del'>-	/* Find the next free place from the buddy array */</div><div class='del'>-	while (*seg == -1) {</div><div class='del'>-		for (i = 0; i &lt; MLX5HWS_POOL_RESOURCE_ARR_SZ; i++) {</div><div class='del'>-			buddy = hws_pool_buddy_get_next_buddy(pool, i,</div><div class='del'>-							      order,</div><div class='del'>-							      &amp;new_mem);</div><div class='del'>-			if (!buddy) {</div><div class='del'>-				ret = -ENOMEM;</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			*seg = mlx5hws_buddy_alloc_mem(buddy, order);</div><div class='del'>-			if (*seg != -1)</div><div class='del'>-				goto found;</div><div class='del'>-</div><div class='del'>-			if (pool-&gt;flags &amp; MLX5HWS_POOL_FLAGS_ONE_RESOURCE) {</div><div class='del'>-				mlx5hws_err(pool-&gt;ctx,</div><div class='del'>-					    "Fail to allocate seg for one resource pool\n");</div><div class='del'>-				ret = -ENOMEM;</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (new_mem) {</div><div class='del'>-				/* We have new memory pool, should be place for us */</div><div class='del'>-				mlx5hws_err(pool-&gt;ctx,</div><div class='del'>-					    "No memory for order: %d with buddy no: %d\n",</div><div class='del'>-					    order, i);</div><div class='del'>-				ret = -ENOMEM;</div><div class='del'>-				goto out;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-found:</div><div class='del'>-	*buddy_idx = i;</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hws_pool_buddy_db_get_chunk(struct mlx5hws_pool *pool,</div><div class='del'>-				       struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	/* Go over the buddies and find next free slot */</div><div class='del'>-	ret = hws_pool_buddy_get_mem_chunk(pool, chunk-&gt;order,</div><div class='del'>-					   &amp;chunk-&gt;resource_idx,</div><div class='del'>-					   &amp;chunk-&gt;offset);</div><div class='del'>-	if (ret)</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "Failed to get free slot for chunk with order: %d\n",</div><div class='del'>-			    chunk-&gt;order);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_pool_buddy_db_uninit(struct mlx5hws_pool *pool)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_buddy_mem *buddy;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MLX5HWS_POOL_RESOURCE_ARR_SZ; i++) {</div><div class='del'>-		buddy = pool-&gt;db.buddy_manager-&gt;buddies[i];</div><div class='del'>-		if (buddy) {</div><div class='del'>-			mlx5hws_buddy_cleanup(buddy);</div><div class='del'>-			kfree(buddy);</div><div class='del'>-			pool-&gt;db.buddy_manager-&gt;buddies[i] = NULL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kfree(pool-&gt;db.buddy_manager);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hws_pool_buddy_db_init(struct mlx5hws_pool *pool, u32 log_range)</div><div class='del'>-{</div><div class='del'>-	pool-&gt;db.buddy_manager = kzalloc(sizeof(*pool-&gt;db.buddy_manager), GFP_KERNEL);</div><div class='del'>-	if (!pool-&gt;db.buddy_manager)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (pool-&gt;flags &amp; MLX5HWS_POOL_FLAGS_ALLOC_MEM_ON_CREATE) {</div><div class='del'>-		bool new_buddy;</div><div class='del'>-</div><div class='del'>-		if (!hws_pool_buddy_get_next_buddy(pool, 0, log_range, &amp;new_buddy)) {</div><div class='del'>-			mlx5hws_err(pool-&gt;ctx,</div><div class='del'>-				    "Failed allocating memory on create log_sz: %d\n", log_range);</div><div class='del'>-			kfree(pool-&gt;db.buddy_manager);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pool-&gt;p_db_uninit = &amp;hws_pool_buddy_db_uninit;</div><div class='del'>-	pool-&gt;p_get_chunk = &amp;hws_pool_buddy_db_get_chunk;</div><div class='del'>-	pool-&gt;p_put_chunk = &amp;hws_pool_buddy_db_put_chunk;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hws_pool_create_resource_on_index(struct mlx5hws_pool *pool,</div><div class='del'>-					     u32 alloc_size, int idx)</div><div class='del'>-{</div><div class='del'>-	int ret = hws_pool_resource_alloc(pool, alloc_size, idx);</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "Failed to create resource type: %d: size %d index: %d\n",</div><div class='del'>-			    pool-&gt;type, alloc_size, idx);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct mlx5hws_pool_elements *</div><div class='del'>-hws_pool_element_create_new_elem(struct mlx5hws_pool *pool, u32 order, int idx)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_pool_elements *elem;</div><div class='del'>-	u32 alloc_size;</div><div class='del'>-</div><div class='del'>-	alloc_size = pool-&gt;alloc_log_sz;</div><div class='del'>-</div><div class='del'>-	elem = kzalloc(sizeof(*elem), GFP_KERNEL);</div><div class='del'>-	if (!elem)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	/* Sharing the same resource, also means that all the elements are with size 1 */</div><div class='del'>-	if ((pool-&gt;flags &amp; MLX5HWS_POOL_FLAGS_FIXED_SIZE_OBJECTS) &amp;&amp;</div><div class='del'>-	    !(pool-&gt;flags &amp; MLX5HWS_POOL_FLAGS_RESOURCE_PER_CHUNK)) {</div><div class='del'>-		 /* Currently all chunks in size 1 */</div><div class='del'>-		elem-&gt;bitmap = hws_pool_create_and_init_bitmap(alloc_size - order);</div><div class='del'>-		if (!elem-&gt;bitmap) {</div><div class='del'>-			mlx5hws_err(pool-&gt;ctx,</div><div class='del'>-				    "Failed to create bitmap type: %d: size %d index: %d\n",</div><div class='del'>-				    pool-&gt;type, alloc_size, idx);</div><div class='del'>-			goto free_elem;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		elem-&gt;log_size = alloc_size - order;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (hws_pool_create_resource_on_index(pool, alloc_size, idx)) {</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "Failed to create resource type: %d: size %d index: %d\n",</div><div class='del'>-			    pool-&gt;type, alloc_size, idx);</div><div class='del'>-		goto free_db;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pool-&gt;db.element_manager-&gt;elements[idx] = elem;</div><div class='del'>-</div><div class='del'>-	return elem;</div><div class='del'>-</div><div class='del'>-free_db:</div><div class='del'>-	bitmap_free(elem-&gt;bitmap);</div><div class='del'>-free_elem:</div><div class='del'>-	kfree(elem);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hws_pool_element_find_seg(struct mlx5hws_pool_elements *elem, int *seg)</div><div class='del'>-{</div><div class='del'>-	unsigned int segment, size;</div><div class='del'>-</div><div class='del'>-	size = 1 &lt;&lt; elem-&gt;log_size;</div><div class='del'>-</div><div class='del'>-	segment = find_first_bit(elem-&gt;bitmap, size);</div><div class='del'>-	if (segment &gt;= size) {</div><div class='del'>-		elem-&gt;is_full = true;</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bitmap_clear(elem-&gt;bitmap, segment, 1);</div><div class='del'>-	*seg = segment;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-hws_pool_onesize_element_get_mem_chunk(struct mlx5hws_pool *pool, u32 order,</div><div class='del'>-				       u32 *idx, int *seg)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_pool_elements *elem;</div><div class='del'>-</div><div class='del'>-	elem = pool-&gt;db.element_manager-&gt;elements[0];</div><div class='del'>-	if (!elem)</div><div class='del'>-		elem = hws_pool_element_create_new_elem(pool, order, 0);</div><div class='del'>-	if (!elem)</div><div class='del'>-		goto err_no_elem;</div><div class='del'>-</div><div class='del'>-	if (hws_pool_element_find_seg(elem, seg) != 0) {</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "No more resources (last request order: %d)\n", order);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*idx = 0;</div><div class='del'>-	elem-&gt;num_of_elements++;</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_no_elem:</div><div class='del'>-	mlx5hws_err(pool-&gt;ctx, "Failed to allocate element for order: %d\n", order);</div><div class='del'>-	return -ENOMEM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-hws_pool_general_element_get_mem_chunk(struct mlx5hws_pool *pool, u32 order,</div><div class='del'>-				       u32 *idx, int *seg)</div><div class='del'>-{</div><div class='del'>-	int ret, i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MLX5HWS_POOL_RESOURCE_ARR_SZ; i++) {</div><div class='del'>-		if (!pool-&gt;resource[i]) {</div><div class='del'>-			ret = hws_pool_create_resource_on_index(pool, order, i);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto err_no_res;</div><div class='del'>-			*idx = i;</div><div class='del'>-			*seg = 0; /* One memory slot in that element */</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mlx5hws_err(pool-&gt;ctx, "No more resources (last request order: %d)\n", order);</div><div class='del'>-	return -ENOMEM;</div><div class='del'>-</div><div class='del'>-err_no_res:</div><div class='del'>-	mlx5hws_err(pool-&gt;ctx, "Failed to allocate element for order: %d\n", order);</div><div class='del'>-	return -ENOMEM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hws_pool_general_element_db_get_chunk(struct mlx5hws_pool *pool,</div><div class='del'>-						 struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Go over all memory elements and find/allocate free slot */</div><div class='del'>-	ret = hws_pool_general_element_get_mem_chunk(pool, chunk-&gt;order,</div><div class='del'>-						     &amp;chunk-&gt;resource_idx,</div><div class='del'>-						     &amp;chunk-&gt;offset);</div><div class='del'>-	if (ret)</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "Failed to get free slot for chunk with order: %d\n",</div><div class='del'>-			    chunk-&gt;order);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_pool_general_element_db_put_chunk(struct mlx5hws_pool *pool,</div><div class='del'>-						  struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(!pool-&gt;resource[chunk-&gt;resource_idx]))</div><div class='del'>-		pr_warn("HWS: invalid resource with index %d\n", chunk-&gt;resource_idx);</div><div class='del'>-</div><div class='del'>-	if (pool-&gt;flags &amp; MLX5HWS_POOL_FLAGS_RELEASE_FREE_RESOURCE)</div><div class='del'>-		hws_pool_resource_free(pool, chunk-&gt;resource_idx);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_pool_general_element_db_uninit(struct mlx5hws_pool *pool)</div><div class='del'>-{</div><div class='del'>-	(void)pool;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* This memory management works as the following:</div><div class='del'>- * - At start doesn't allocate no mem at all.</div><div class='del'>- * - When new request for chunk arrived:</div><div class='del'>- *	allocate resource and give it.</div><div class='del'>- * - When free that chunk:</div><div class='del'>- *	the resource is freed.</div><div class='del'>- */</div><div class='del'>-static int hws_pool_general_element_db_init(struct mlx5hws_pool *pool)</div><div class='del'>-{</div><div class='del'>-	pool-&gt;p_db_uninit = &amp;hws_pool_general_element_db_uninit;</div><div class='del'>-	pool-&gt;p_get_chunk = &amp;hws_pool_general_element_db_get_chunk;</div><div class='del'>-	pool-&gt;p_put_chunk = &amp;hws_pool_general_element_db_put_chunk;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_onesize_element_db_destroy_element(struct mlx5hws_pool *pool,</div><div class='del'>-						   struct mlx5hws_pool_elements *elem,</div><div class='del'>-						   struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(!pool-&gt;resource[chunk-&gt;resource_idx]))</div><div class='del'>-		pr_warn("HWS: invalid resource with index %d\n", chunk-&gt;resource_idx);</div><div class='del'>-</div><div class='del'>-	hws_pool_resource_free(pool, chunk-&gt;resource_idx);</div><div class='del'>-	kfree(elem);</div><div class='del'>-	pool-&gt;db.element_manager-&gt;elements[chunk-&gt;resource_idx] = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_onesize_element_db_put_chunk(struct mlx5hws_pool *pool,</div><div class='del'>-					     struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_pool_elements *elem;</div><div class='del'>-</div><div class='del'>-	if (unlikely(chunk-&gt;resource_idx))</div><div class='del'>-		pr_warn("HWS: invalid resource with index %d\n", chunk-&gt;resource_idx);</div><div class='del'>-</div><div class='del'>-	elem = pool-&gt;db.element_manager-&gt;elements[chunk-&gt;resource_idx];</div><div class='del'>-	if (!elem) {</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "No such element (%d)\n", chunk-&gt;resource_idx);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bitmap_set(elem-&gt;bitmap, chunk-&gt;offset, 1);</div><div class='del'>-	elem-&gt;is_full = false;</div><div class='del'>-	elem-&gt;num_of_elements--;</div><div class='del'>-</div><div class='del'>-	if (pool-&gt;flags &amp; MLX5HWS_POOL_FLAGS_RELEASE_FREE_RESOURCE &amp;&amp;</div><div class='del'>-	    !elem-&gt;num_of_elements)</div><div class='del'>-		hws_onesize_element_db_destroy_element(pool, elem, chunk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hws_onesize_element_db_get_chunk(struct mlx5hws_pool *pool,</div><div class='del'>-					    struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	/* Go over all memory elements and find/allocate free slot */</div><div class='del'>-	ret = hws_pool_onesize_element_get_mem_chunk(pool, chunk-&gt;order,</div><div class='del'>-						     &amp;chunk-&gt;resource_idx,</div><div class='del'>-						     &amp;chunk-&gt;offset);</div><div class='del'>-	if (ret)</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "Failed to get free slot for chunk with order: %d\n",</div><div class='del'>-			    chunk-&gt;order);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_onesize_element_db_uninit(struct mlx5hws_pool *pool)</div><div class='del'>-{</div><div class='del'>-	struct mlx5hws_pool_elements *elem;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MLX5HWS_POOL_RESOURCE_ARR_SZ; i++) {</div><div class='del'>-		elem = pool-&gt;db.element_manager-&gt;elements[i];</div><div class='del'>-		if (elem) {</div><div class='del'>-			bitmap_free(elem-&gt;bitmap);</div><div class='del'>-			kfree(elem);</div><div class='del'>-			pool-&gt;db.element_manager-&gt;elements[i] = NULL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	kfree(pool-&gt;db.element_manager);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* This memory management works as the following:</div><div class='del'>- * - At start doesn't allocate no mem at all.</div><div class='del'>- * - When new request for chunk arrived:</div><div class='del'>- *  aloocate the first and only slot of memory/resource</div><div class='del'>- *  when it ended return error.</div><div class='del'>- */</div><div class='del'>-static int hws_pool_onesize_element_db_init(struct mlx5hws_pool *pool)</div><div class='del'>-{</div><div class='del'>-	pool-&gt;db.element_manager = kzalloc(sizeof(*pool-&gt;db.element_manager), GFP_KERNEL);</div><div class='del'>-	if (!pool-&gt;db.element_manager)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	pool-&gt;p_db_uninit = &amp;hws_onesize_element_db_uninit;</div><div class='del'>-	pool-&gt;p_get_chunk = &amp;hws_onesize_element_db_get_chunk;</div><div class='del'>-	pool-&gt;p_put_chunk = &amp;hws_onesize_element_db_put_chunk;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hws_pool_db_init(struct mlx5hws_pool *pool,</div><div class='del'>-			    enum mlx5hws_db_type db_type)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (db_type == MLX5HWS_POOL_DB_TYPE_GENERAL_SIZE)</div><div class='del'>-		ret = hws_pool_general_element_db_init(pool);</div><div class='del'>-	else if (db_type == MLX5HWS_POOL_DB_TYPE_ONE_SIZE_RESOURCE)</div><div class='del'>-		ret = hws_pool_onesize_element_db_init(pool);</div><div class='del'>-	else</div><div class='del'>-		ret = hws_pool_buddy_db_init(pool, pool-&gt;alloc_log_sz);</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		mlx5hws_err(pool-&gt;ctx, "Failed to init general db : %d (ret: %d)\n", db_type, ret);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void hws_pool_db_unint(struct mlx5hws_pool *pool)</div><div class='del'>-{</div><div class='del'>-	pool-&gt;p_db_uninit(pool);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mlx5hws_pool_chunk_alloc(struct mlx5hws_pool *pool,</div><div class='del'>-			     struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;pool-&gt;lock);</div><div class='del'>-	ret = pool-&gt;p_get_chunk(pool, chunk);</div><div class='del'>-	mutex_unlock(&amp;pool-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void mlx5hws_pool_chunk_free(struct mlx5hws_pool *pool,</div><div class='del'>-			     struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	mutex_lock(&amp;pool-&gt;lock);</div><div class='del'>-	pool-&gt;p_put_chunk(pool, chunk);</div><div class='del'>-	mutex_unlock(&amp;pool-&gt;lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct mlx5hws_pool *</div><div class='del'>-mlx5hws_pool_create(struct mlx5hws_context *ctx, struct mlx5hws_pool_attr *pool_attr)</div><div class='del'>-{</div><div class='del'>-	enum mlx5hws_db_type res_db_type;</div><div class='del'>-	struct mlx5hws_pool *pool;</div><div class='del'>-</div><div class='del'>-	pool = kzalloc(sizeof(*pool), GFP_KERNEL);</div><div class='del'>-	if (!pool)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	pool-&gt;ctx = ctx;</div><div class='del'>-	pool-&gt;type = pool_attr-&gt;pool_type;</div><div class='del'>-	pool-&gt;alloc_log_sz = pool_attr-&gt;alloc_log_sz;</div><div class='del'>-	pool-&gt;flags = pool_attr-&gt;flags;</div><div class='del'>-	pool-&gt;tbl_type = pool_attr-&gt;table_type;</div><div class='del'>-	pool-&gt;opt_type = pool_attr-&gt;opt_type;</div><div class='del'>-</div><div class='del'>-	/* Support general db */</div><div class='del'>-	if (pool-&gt;flags == (MLX5HWS_POOL_FLAGS_RELEASE_FREE_RESOURCE |</div><div class='del'>-			    MLX5HWS_POOL_FLAGS_RESOURCE_PER_CHUNK))</div><div class='del'>-		res_db_type = MLX5HWS_POOL_DB_TYPE_GENERAL_SIZE;</div><div class='del'>-	else if (pool-&gt;flags == (MLX5HWS_POOL_FLAGS_ONE_RESOURCE |</div><div class='del'>-				 MLX5HWS_POOL_FLAGS_FIXED_SIZE_OBJECTS))</div><div class='del'>-		res_db_type = MLX5HWS_POOL_DB_TYPE_ONE_SIZE_RESOURCE;</div><div class='del'>-	else</div><div class='del'>-		res_db_type = MLX5HWS_POOL_DB_TYPE_BUDDY;</div><div class='del'>-</div><div class='del'>-	pool-&gt;alloc_log_sz = pool_attr-&gt;alloc_log_sz;</div><div class='del'>-</div><div class='del'>-	if (hws_pool_db_init(pool, res_db_type))</div><div class='del'>-		goto free_pool;</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;pool-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return pool;</div><div class='del'>-</div><div class='del'>-free_pool:</div><div class='del'>-	kfree(pool);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mlx5hws_pool_destroy(struct mlx5hws_pool *pool)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	mutex_destroy(&amp;pool-&gt;lock);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MLX5HWS_POOL_RESOURCE_ARR_SZ; i++)</div><div class='del'>-		if (pool-&gt;resource[i])</div><div class='del'>-			hws_pool_resource_free(pool, i);</div><div class='del'>-</div><div class='del'>-	hws_pool_db_unint(pool);</div><div class='del'>-</div><div class='del'>-	kfree(pool);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.h<br/>deleted file mode 100644<br/>index 621298b352b2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pool.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,151 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='del'>-/* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='del'>-</div><div class='del'>-#ifndef MLX5HWS_POOL_H_</div><div class='del'>-#define MLX5HWS_POOL_H_</div><div class='del'>-</div><div class='del'>-#define MLX5HWS_POOL_STC_LOG_SZ 15</div><div class='del'>-</div><div class='del'>-#define MLX5HWS_POOL_RESOURCE_ARR_SZ 100</div><div class='del'>-</div><div class='del'>-enum mlx5hws_pool_type {</div><div class='del'>-	MLX5HWS_POOL_TYPE_STE,</div><div class='del'>-	MLX5HWS_POOL_TYPE_STC,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5hws_pool_chunk {</div><div class='del'>-	u32 resource_idx;</div><div class='del'>-	/* Internal offset, relative to base index */</div><div class='del'>-	int offset;</div><div class='del'>-	int order;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5hws_pool_resource {</div><div class='del'>-	struct mlx5hws_pool *pool;</div><div class='del'>-	u32 base_id;</div><div class='del'>-	u32 range;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum mlx5hws_pool_flags {</div><div class='del'>-	/* Only a one resource in that pool */</div><div class='del'>-	MLX5HWS_POOL_FLAGS_ONE_RESOURCE = 1 &lt;&lt; 0,</div><div class='del'>-	MLX5HWS_POOL_FLAGS_RELEASE_FREE_RESOURCE = 1 &lt;&lt; 1,</div><div class='del'>-	/* No sharing resources between chunks */</div><div class='del'>-	MLX5HWS_POOL_FLAGS_RESOURCE_PER_CHUNK = 1 &lt;&lt; 2,</div><div class='del'>-	/* All objects are in the same size */</div><div class='del'>-	MLX5HWS_POOL_FLAGS_FIXED_SIZE_OBJECTS = 1 &lt;&lt; 3,</div><div class='del'>-	/* Managed by buddy allocator */</div><div class='del'>-	MLX5HWS_POOL_FLAGS_BUDDY_MANAGED = 1 &lt;&lt; 4,</div><div class='del'>-	/* Allocate pool_type memory on pool creation */</div><div class='del'>-	MLX5HWS_POOL_FLAGS_ALLOC_MEM_ON_CREATE = 1 &lt;&lt; 5,</div><div class='del'>-</div><div class='del'>-	/* These values should be used by the caller */</div><div class='del'>-	MLX5HWS_POOL_FLAGS_FOR_STC_POOL =</div><div class='del'>-		MLX5HWS_POOL_FLAGS_ONE_RESOURCE |</div><div class='del'>-		MLX5HWS_POOL_FLAGS_FIXED_SIZE_OBJECTS,</div><div class='del'>-	MLX5HWS_POOL_FLAGS_FOR_MATCHER_STE_POOL =</div><div class='del'>-		MLX5HWS_POOL_FLAGS_RELEASE_FREE_RESOURCE |</div><div class='del'>-		MLX5HWS_POOL_FLAGS_RESOURCE_PER_CHUNK,</div><div class='del'>-	MLX5HWS_POOL_FLAGS_FOR_STE_ACTION_POOL =</div><div class='del'>-		MLX5HWS_POOL_FLAGS_ONE_RESOURCE |</div><div class='del'>-		MLX5HWS_POOL_FLAGS_BUDDY_MANAGED |</div><div class='del'>-		MLX5HWS_POOL_FLAGS_ALLOC_MEM_ON_CREATE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum mlx5hws_pool_optimize {</div><div class='del'>-	MLX5HWS_POOL_OPTIMIZE_NONE = 0x0,</div><div class='del'>-	MLX5HWS_POOL_OPTIMIZE_ORIG = 0x1,</div><div class='del'>-	MLX5HWS_POOL_OPTIMIZE_MIRROR = 0x2,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5hws_pool_attr {</div><div class='del'>-	enum mlx5hws_pool_type pool_type;</div><div class='del'>-	enum mlx5hws_table_type table_type;</div><div class='del'>-	enum mlx5hws_pool_flags flags;</div><div class='del'>-	enum mlx5hws_pool_optimize opt_type;</div><div class='del'>-	/* Allocation size once memory is depleted */</div><div class='del'>-	size_t alloc_log_sz;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum mlx5hws_db_type {</div><div class='del'>-	/* Uses for allocating chunk of big memory, each element has its own resource in the FW*/</div><div class='del'>-	MLX5HWS_POOL_DB_TYPE_GENERAL_SIZE,</div><div class='del'>-	/* One resource only, all the elements are with same one size */</div><div class='del'>-	MLX5HWS_POOL_DB_TYPE_ONE_SIZE_RESOURCE,</div><div class='del'>-	/* Many resources, the memory allocated with buddy mechanism */</div><div class='del'>-	MLX5HWS_POOL_DB_TYPE_BUDDY,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5hws_buddy_manager {</div><div class='del'>-	struct mlx5hws_buddy_mem *buddies[MLX5HWS_POOL_RESOURCE_ARR_SZ];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5hws_pool_elements {</div><div class='del'>-	u32 num_of_elements;</div><div class='del'>-	unsigned long *bitmap;</div><div class='del'>-	u32 log_size;</div><div class='del'>-	bool is_full;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5hws_element_manager {</div><div class='del'>-	struct mlx5hws_pool_elements *elements[MLX5HWS_POOL_RESOURCE_ARR_SZ];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5hws_pool_db {</div><div class='del'>-	enum mlx5hws_db_type type;</div><div class='del'>-	union {</div><div class='del'>-		struct mlx5hws_element_manager *element_manager;</div><div class='del'>-		struct mlx5hws_buddy_manager *buddy_manager;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-typedef int (*mlx5hws_pool_db_get_chunk)(struct mlx5hws_pool *pool,</div><div class='del'>-					struct mlx5hws_pool_chunk *chunk);</div><div class='del'>-typedef void (*mlx5hws_pool_db_put_chunk)(struct mlx5hws_pool *pool,</div><div class='del'>-					 struct mlx5hws_pool_chunk *chunk);</div><div class='del'>-typedef void (*mlx5hws_pool_unint_db)(struct mlx5hws_pool *pool);</div><div class='del'>-</div><div class='del'>-struct mlx5hws_pool {</div><div class='del'>-	struct mlx5hws_context *ctx;</div><div class='del'>-	enum mlx5hws_pool_type type;</div><div class='del'>-	enum mlx5hws_pool_flags flags;</div><div class='del'>-	struct mutex lock; /* protect the pool */</div><div class='del'>-	size_t alloc_log_sz;</div><div class='del'>-	enum mlx5hws_table_type tbl_type;</div><div class='del'>-	enum mlx5hws_pool_optimize opt_type;</div><div class='del'>-	struct mlx5hws_pool_resource *resource[MLX5HWS_POOL_RESOURCE_ARR_SZ];</div><div class='del'>-	struct mlx5hws_pool_resource *mirror_resource[MLX5HWS_POOL_RESOURCE_ARR_SZ];</div><div class='del'>-	/* DB */</div><div class='del'>-	struct mlx5hws_pool_db db;</div><div class='del'>-	/* Functions */</div><div class='del'>-	mlx5hws_pool_unint_db p_db_uninit;</div><div class='del'>-	mlx5hws_pool_db_get_chunk p_get_chunk;</div><div class='del'>-	mlx5hws_pool_db_put_chunk p_put_chunk;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5hws_pool *</div><div class='del'>-mlx5hws_pool_create(struct mlx5hws_context *ctx,</div><div class='del'>-		    struct mlx5hws_pool_attr *pool_attr);</div><div class='del'>-</div><div class='del'>-int mlx5hws_pool_destroy(struct mlx5hws_pool *pool);</div><div class='del'>-</div><div class='del'>-int mlx5hws_pool_chunk_alloc(struct mlx5hws_pool *pool,</div><div class='del'>-			     struct mlx5hws_pool_chunk *chunk);</div><div class='del'>-</div><div class='del'>-void mlx5hws_pool_chunk_free(struct mlx5hws_pool *pool,</div><div class='del'>-			     struct mlx5hws_pool_chunk *chunk);</div><div class='del'>-</div><div class='del'>-static inline u32</div><div class='del'>-mlx5hws_pool_chunk_get_base_id(struct mlx5hws_pool *pool,</div><div class='del'>-			       struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	return pool-&gt;resource[chunk-&gt;resource_idx]-&gt;base_id;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u32</div><div class='del'>-mlx5hws_pool_chunk_get_base_mirror_id(struct mlx5hws_pool *pool,</div><div class='del'>-				      struct mlx5hws_pool_chunk *chunk)</div><div class='del'>-{</div><div class='del'>-	return pool-&gt;mirror_resource[chunk-&gt;resource_idx]-&gt;base_id;</div><div class='del'>-}</div><div class='del'>-#endif /* MLX5HWS_POOL_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pat_arg.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c<br/>index e084a5cbf81f..d56271a9e4f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pat_arg.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pat_arg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> enum mlx5hws_arg_chunk_size</div><div class='ctx'> mlx5hws_arg_data_size_to_arg_log_size(u16 data_size)</div><div class='hunk'>@@ -153,8 +153,7 @@ mlx5hws_pat_get_existing_cached_pattern(struct mlx5hws_pattern_cache *cache,</div><div class='ctx'> 	cached_pattern = mlx5hws_pat_find_cached_pattern(cache, num_of_actions, actions);</div><div class='ctx'> 	if (cached_pattern) {</div><div class='ctx'> 		/* LRU: move it to be first in the list */</div><div class='del'>-		list_del_init(&amp;cached_pattern-&gt;ptrn_list_node);</div><div class='del'>-		list_add(&amp;cached_pattern-&gt;ptrn_list_node, &amp;cache-&gt;ptrn_list);</div><div class='add'>+		list_move(&amp;cached_pattern-&gt;ptrn_list_node, &amp;cache-&gt;ptrn_list);</div><div class='ctx'> 		cached_pattern-&gt;refcount++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -280,7 +279,7 @@ int mlx5hws_pat_get_pattern(struct mlx5hws_context *ctx,</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> clean_pattern:</div><div class='del'>-	mlx5hws_cmd_header_modify_pattern_destroy(ctx-&gt;mdev, *pattern_id);</div><div class='add'>+	mlx5hws_cmd_header_modify_pattern_destroy(ctx-&gt;mdev, ptrn_id);</div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;ctx-&gt;pattern_cache-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -344,7 +343,7 @@ void mlx5hws_arg_write(struct mlx5hws_send_engine *queue,</div><div class='ctx'> 		mlx5hws_send_engine_post_req_wqe(&amp;ctrl, (void *)&amp;wqe_ctrl, &amp;wqe_len);</div><div class='ctx'> 		memset(wqe_ctrl, 0, wqe_len);</div><div class='ctx'> 		mlx5hws_send_engine_post_req_wqe(&amp;ctrl, (void *)&amp;wqe_arg, &amp;wqe_len);</div><div class='del'>-		memcpy(wqe_arg, arg_data, wqe_len);</div><div class='add'>+		memcpy(wqe_arg, arg_data, MLX5HWS_ARG_DATA_SIZE);</div><div class='ctx'> 		send_attr.id = arg_idx++;</div><div class='ctx'> 		mlx5hws_send_engine_post_end(&amp;ctrl, &amp;send_attr);</div><div class='ctx'> </div><div class='hunk'>@@ -491,8 +490,8 @@ hws_action_modify_get_target_fields(u8 action_type, __be64 *pattern,</div><div class='ctx'> 	switch (action_type) {</div><div class='ctx'> 	case MLX5_ACTION_TYPE_SET:</div><div class='ctx'> 	case MLX5_ACTION_TYPE_ADD:</div><div class='del'>-		*src_field = MLX5_GET(set_action_in, pattern, field);</div><div class='del'>-		*dst_field = INVALID_FIELD;</div><div class='add'>+		*src_field = INVALID_FIELD;</div><div class='add'>+		*dst_field = MLX5_GET(set_action_in, pattern, field);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5_ACTION_TYPE_COPY:</div><div class='ctx'> 		*src_field = MLX5_GET(copy_action_in, pattern, src_field);</div><div class='hunk'>@@ -523,57 +522,61 @@ bool mlx5hws_pat_verify_actions(struct mlx5hws_context *ctx, __be64 pattern[], s</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5hws_pat_calc_nope(__be64 *pattern, size_t num_actions,</div><div class='del'>-			   size_t max_actions, size_t *new_size,</div><div class='del'>-			   u32 *nope_location, __be64 *new_pat)</div><div class='add'>+int mlx5hws_pat_calc_nop(__be64 *pattern, size_t num_actions,</div><div class='add'>+			 size_t max_actions, size_t *new_size,</div><div class='add'>+			 u32 *nop_locations, __be64 *new_pat)</div><div class='ctx'> {</div><div class='del'>-	u16 prev_src_field = 0, prev_dst_field = 0;</div><div class='del'>-	u16 src_field, dst_field;</div><div class='add'>+	u16 prev_src_field = INVALID_FIELD, prev_dst_field = INVALID_FIELD;</div><div class='ctx'> 	u8 action_type;</div><div class='add'>+	bool dependent;</div><div class='ctx'> 	size_t i, j;</div><div class='ctx'> </div><div class='ctx'> 	*new_size = num_actions;</div><div class='del'>-	*nope_location = 0;</div><div class='add'>+	*nop_locations = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (num_actions == 1)</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0, j = 0; i &lt; num_actions; i++, j++) {</div><div class='del'>-		action_type = MLX5_GET(set_action_in, &amp;pattern[i], action_type);</div><div class='add'>+		u16 src_field = INVALID_FIELD;</div><div class='add'>+		u16 dst_field = INVALID_FIELD;</div><div class='add'>+</div><div class='add'>+		if (j &gt;= max_actions)</div><div class='add'>+			return -EINVAL;</div><div class='ctx'> </div><div class='add'>+		action_type = MLX5_GET(set_action_in, &amp;pattern[i], action_type);</div><div class='ctx'> 		hws_action_modify_get_target_fields(action_type, &amp;pattern[i],</div><div class='ctx'> 						    &amp;src_field, &amp;dst_field);</div><div class='del'>-		if (i % 2) {</div><div class='del'>-			if (action_type == MLX5_ACTION_TYPE_COPY &amp;&amp;</div><div class='del'>-			    (prev_src_field == src_field ||</div><div class='del'>-			     prev_dst_field == dst_field)) {</div><div class='del'>-				/* need Nope */</div><div class='del'>-				*new_size += 1;</div><div class='del'>-				*nope_location |= BIT(i);</div><div class='del'>-				memset(&amp;new_pat[j], 0, MLX5HWS_MODIFY_ACTION_SIZE);</div><div class='del'>-				MLX5_SET(set_action_in, &amp;new_pat[j],</div><div class='del'>-					 action_type,</div><div class='del'>-					 MLX5_MODIFICATION_TYPE_NOP);</div><div class='del'>-				j++;</div><div class='del'>-			} else if (prev_src_field == src_field) {</div><div class='del'>-				/* need Nope*/</div><div class='del'>-				*new_size += 1;</div><div class='del'>-				*nope_location |= BIT(i);</div><div class='del'>-				MLX5_SET(set_action_in, &amp;new_pat[j],</div><div class='del'>-					 action_type,</div><div class='del'>-					 MLX5_MODIFICATION_TYPE_NOP);</div><div class='del'>-				j++;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		memcpy(&amp;new_pat[j], &amp;pattern[i], MLX5HWS_MODIFY_ACTION_SIZE);</div><div class='del'>-		/* check if no more space */</div><div class='del'>-		if (j &gt; max_actions) {</div><div class='del'>-			*new_size = num_actions;</div><div class='del'>-			*nope_location = 0;</div><div class='del'>-			return;</div><div class='add'>+</div><div class='add'>+		/* For every action, look at it and the previous one. The two</div><div class='add'>+		 * actions are dependent if:</div><div class='add'>+		 */</div><div class='add'>+		dependent =</div><div class='add'>+			(i &gt; 0) &amp;&amp;</div><div class='add'>+			/* At least one of the actions is a write and */</div><div class='add'>+			(dst_field != INVALID_FIELD ||</div><div class='add'>+			 prev_dst_field != INVALID_FIELD) &amp;&amp;</div><div class='add'>+			/* One reads from the other's source */</div><div class='add'>+			(dst_field == prev_src_field ||</div><div class='add'>+			 src_field == prev_dst_field ||</div><div class='add'>+			 /* Or both write to the same destination */</div><div class='add'>+			 dst_field == prev_dst_field);</div><div class='add'>+</div><div class='add'>+		if (dependent) {</div><div class='add'>+			*new_size += 1;</div><div class='add'>+			*nop_locations |= BIT(i);</div><div class='add'>+			memset(&amp;new_pat[j], 0, MLX5HWS_MODIFY_ACTION_SIZE);</div><div class='add'>+			MLX5_SET(set_action_in, &amp;new_pat[j], action_type,</div><div class='add'>+				 MLX5_MODIFICATION_TYPE_NOP);</div><div class='add'>+			j++;</div><div class='add'>+			if (j &gt;= max_actions)</div><div class='add'>+				return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		memcpy(&amp;new_pat[j], &amp;pattern[i], MLX5HWS_MODIFY_ACTION_SIZE);</div><div class='ctx'> 		prev_src_field = src_field;</div><div class='ctx'> 		prev_dst_field = dst_field;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pat_arg.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h<br/>index 27ca93385b08..7fbd8dc7aa18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pat_arg.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_pat_arg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h</a></div><div class='hunk'>@@ -31,7 +31,7 @@ struct mlx5hws_pattern_cache_item {</div><div class='ctx'> 		u8 *data;</div><div class='ctx'> 		u16 num_of_actions;</div><div class='ctx'> 	} mh_data;</div><div class='del'>-	u32 refcount;</div><div class='add'>+	u32 refcount; /* protected by pattern_cache lock */</div><div class='ctx'> 	struct list_head ptrn_list_node;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -96,6 +96,7 @@ int mlx5hws_arg_write_inline_arg_data(struct mlx5hws_context *ctx,</div><div class='ctx'> 				      u8 *arg_data,</div><div class='ctx'> 				      size_t data_size);</div><div class='ctx'> </div><div class='del'>-void mlx5hws_pat_calc_nope(__be64 *pattern, size_t num_actions, size_t max_actions,</div><div class='del'>-			   size_t *new_size, u32 *nope_location, __be64 *new_pat);</div><div class='add'>+int mlx5hws_pat_calc_nop(__be64 *pattern, size_t num_actions,</div><div class='add'>+			 size_t max_actions, size_t *new_size,</div><div class='add'>+			 u32 *nop_locations, __be64 *new_pat);</div><div class='ctx'> #endif /* MLX5HWS_PAT_ARG_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c<br/>new file mode 100644<br/>index 000000000000..7b5071c3df36<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c</a></div><div class='hunk'>@@ -0,0 +1,394 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#include "internal.h"</div><div class='add'>+#include "buddy.h"</div><div class='add'>+</div><div class='add'>+static void hws_pool_free_one_resource(struct mlx5hws_pool_resource *resource)</div><div class='add'>+{</div><div class='add'>+	switch (resource-&gt;pool-&gt;type) {</div><div class='add'>+	case MLX5HWS_POOL_TYPE_STE:</div><div class='add'>+		mlx5hws_cmd_ste_destroy(resource-&gt;pool-&gt;ctx-&gt;mdev, resource-&gt;base_id);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5HWS_POOL_TYPE_STC:</div><div class='add'>+		mlx5hws_cmd_stc_destroy(resource-&gt;pool-&gt;ctx-&gt;mdev, resource-&gt;base_id);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(resource);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_pool_resource_free(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	hws_pool_free_one_resource(pool-&gt;resource);</div><div class='add'>+	pool-&gt;resource = NULL;</div><div class='add'>+</div><div class='add'>+	if (pool-&gt;tbl_type == MLX5HWS_TABLE_TYPE_FDB) {</div><div class='add'>+		hws_pool_free_one_resource(pool-&gt;mirror_resource);</div><div class='add'>+		pool-&gt;mirror_resource = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5hws_pool_resource *</div><div class='add'>+hws_pool_create_one_resource(struct mlx5hws_pool *pool, u32 log_range,</div><div class='add'>+			     u32 fw_ft_type)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_cmd_ste_create_attr ste_attr;</div><div class='add'>+	struct mlx5hws_cmd_stc_create_attr stc_attr;</div><div class='add'>+	struct mlx5hws_pool_resource *resource;</div><div class='add'>+	u32 obj_id = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	resource = kzalloc(sizeof(*resource), GFP_KERNEL);</div><div class='add'>+	if (!resource)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	switch (pool-&gt;type) {</div><div class='add'>+	case MLX5HWS_POOL_TYPE_STE:</div><div class='add'>+		ste_attr.log_obj_range = log_range;</div><div class='add'>+		ste_attr.table_type = fw_ft_type;</div><div class='add'>+		ret = mlx5hws_cmd_ste_create(pool-&gt;ctx-&gt;mdev, &amp;ste_attr, &amp;obj_id);</div><div class='add'>+		break;</div><div class='add'>+	case MLX5HWS_POOL_TYPE_STC:</div><div class='add'>+		stc_attr.log_obj_range = log_range;</div><div class='add'>+		stc_attr.table_type = fw_ft_type;</div><div class='add'>+		ret = mlx5hws_cmd_stc_create(pool-&gt;ctx-&gt;mdev, &amp;stc_attr, &amp;obj_id);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_resource;</div><div class='add'>+</div><div class='add'>+	resource-&gt;pool = pool;</div><div class='add'>+	resource-&gt;range = 1 &lt;&lt; log_range;</div><div class='add'>+	resource-&gt;base_id = obj_id;</div><div class='add'>+</div><div class='add'>+	return resource;</div><div class='add'>+</div><div class='add'>+free_resource:</div><div class='add'>+	kfree(resource);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_pool_resource_alloc(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_pool_resource *resource;</div><div class='add'>+	u32 fw_ft_type, opt_log_range;</div><div class='add'>+</div><div class='add'>+	fw_ft_type = mlx5hws_table_get_res_fw_ft_type(pool-&gt;tbl_type, false);</div><div class='add'>+	opt_log_range = pool-&gt;opt_type == MLX5HWS_POOL_OPTIMIZE_MIRROR ?</div><div class='add'>+				0 : pool-&gt;alloc_log_sz;</div><div class='add'>+	resource = hws_pool_create_one_resource(pool, opt_log_range, fw_ft_type);</div><div class='add'>+	if (!resource) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Failed to allocate resource\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pool-&gt;resource = resource;</div><div class='add'>+</div><div class='add'>+	if (pool-&gt;tbl_type == MLX5HWS_TABLE_TYPE_FDB) {</div><div class='add'>+		struct mlx5hws_pool_resource *mirror_resource;</div><div class='add'>+</div><div class='add'>+		fw_ft_type = mlx5hws_table_get_res_fw_ft_type(pool-&gt;tbl_type, true);</div><div class='add'>+		opt_log_range = pool-&gt;opt_type == MLX5HWS_POOL_OPTIMIZE_ORIG ?</div><div class='add'>+					0 : pool-&gt;alloc_log_sz;</div><div class='add'>+		mirror_resource = hws_pool_create_one_resource(pool, opt_log_range, fw_ft_type);</div><div class='add'>+		if (!mirror_resource) {</div><div class='add'>+			mlx5hws_err(pool-&gt;ctx, "Failed to allocate mirrored resource\n");</div><div class='add'>+			hws_pool_free_one_resource(resource);</div><div class='add'>+			pool-&gt;resource = NULL;</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		pool-&gt;mirror_resource = mirror_resource;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_pool_buddy_init(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_buddy_mem *buddy;</div><div class='add'>+</div><div class='add'>+	buddy = mlx5hws_buddy_create(pool-&gt;alloc_log_sz);</div><div class='add'>+	if (!buddy) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Failed to create buddy order: %zu\n",</div><div class='add'>+			    pool-&gt;alloc_log_sz);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hws_pool_resource_alloc(pool) != 0) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Failed to create resource type: %d size %zu\n",</div><div class='add'>+			    pool-&gt;type, pool-&gt;alloc_log_sz);</div><div class='add'>+		mlx5hws_buddy_cleanup(buddy);</div><div class='add'>+		kfree(buddy);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pool-&gt;db.buddy = buddy;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_pool_buddy_db_get_chunk(struct mlx5hws_pool *pool,</div><div class='add'>+				       struct mlx5hws_pool_chunk *chunk)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_buddy_mem *buddy = pool-&gt;db.buddy;</div><div class='add'>+</div><div class='add'>+	if (!buddy) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Bad buddy state\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chunk-&gt;offset = mlx5hws_buddy_alloc_mem(buddy, chunk-&gt;order);</div><div class='add'>+	if (chunk-&gt;offset &gt;= 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_pool_buddy_db_put_chunk(struct mlx5hws_pool *pool,</div><div class='add'>+					struct mlx5hws_pool_chunk *chunk)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_buddy_mem *buddy;</div><div class='add'>+</div><div class='add'>+	buddy = pool-&gt;db.buddy;</div><div class='add'>+	if (!buddy) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Bad buddy state\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5hws_buddy_free_mem(buddy, chunk-&gt;offset, chunk-&gt;order);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_pool_buddy_db_uninit(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_buddy_mem *buddy;</div><div class='add'>+</div><div class='add'>+	buddy = pool-&gt;db.buddy;</div><div class='add'>+	if (buddy) {</div><div class='add'>+		mlx5hws_buddy_cleanup(buddy);</div><div class='add'>+		kfree(buddy);</div><div class='add'>+		pool-&gt;db.buddy = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_pool_buddy_db_init(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = hws_pool_buddy_init(pool);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pool-&gt;p_db_uninit = &amp;hws_pool_buddy_db_uninit;</div><div class='add'>+	pool-&gt;p_get_chunk = &amp;hws_pool_buddy_db_get_chunk;</div><div class='add'>+	pool-&gt;p_put_chunk = &amp;hws_pool_buddy_db_put_chunk;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long *hws_pool_create_and_init_bitmap(u32 log_range)</div><div class='add'>+{</div><div class='add'>+	unsigned long *bitmap;</div><div class='add'>+</div><div class='add'>+	bitmap = bitmap_zalloc(1 &lt;&lt; log_range, GFP_KERNEL);</div><div class='add'>+	if (!bitmap)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	bitmap_fill(bitmap, 1 &lt;&lt; log_range);</div><div class='add'>+</div><div class='add'>+	return bitmap;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_pool_bitmap_init(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	unsigned long *bitmap;</div><div class='add'>+</div><div class='add'>+	bitmap = hws_pool_create_and_init_bitmap(pool-&gt;alloc_log_sz);</div><div class='add'>+	if (!bitmap) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Failed to create bitmap order: %zu\n",</div><div class='add'>+			    pool-&gt;alloc_log_sz);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hws_pool_resource_alloc(pool) != 0) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Failed to create resource type: %d: size %zu\n",</div><div class='add'>+			    pool-&gt;type, pool-&gt;alloc_log_sz);</div><div class='add'>+		bitmap_free(bitmap);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pool-&gt;db.bitmap = bitmap;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_pool_bitmap_db_get_chunk(struct mlx5hws_pool *pool,</div><div class='add'>+					struct mlx5hws_pool_chunk *chunk)</div><div class='add'>+{</div><div class='add'>+	unsigned long *bitmap, size;</div><div class='add'>+</div><div class='add'>+	if (chunk-&gt;order != 0) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Pool only supports order 0 allocs\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bitmap = pool-&gt;db.bitmap;</div><div class='add'>+	if (!bitmap) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Bad bitmap state\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = 1 &lt;&lt; pool-&gt;alloc_log_sz;</div><div class='add'>+</div><div class='add'>+	chunk-&gt;offset = find_first_bit(bitmap, size);</div><div class='add'>+	if (chunk-&gt;offset &gt;= size)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bitmap_clear(bitmap, chunk-&gt;offset, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_pool_bitmap_db_put_chunk(struct mlx5hws_pool *pool,</div><div class='add'>+					 struct mlx5hws_pool_chunk *chunk)</div><div class='add'>+{</div><div class='add'>+	unsigned long *bitmap;</div><div class='add'>+</div><div class='add'>+	bitmap = pool-&gt;db.bitmap;</div><div class='add'>+	if (!bitmap) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Bad bitmap state\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bitmap_set(bitmap, chunk-&gt;offset, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_pool_bitmap_db_uninit(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	unsigned long *bitmap;</div><div class='add'>+</div><div class='add'>+	bitmap = pool-&gt;db.bitmap;</div><div class='add'>+	if (bitmap) {</div><div class='add'>+		bitmap_free(bitmap);</div><div class='add'>+		pool-&gt;db.bitmap = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_pool_bitmap_db_init(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = hws_pool_bitmap_init(pool);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pool-&gt;p_db_uninit = &amp;hws_pool_bitmap_db_uninit;</div><div class='add'>+	pool-&gt;p_get_chunk = &amp;hws_pool_bitmap_db_get_chunk;</div><div class='add'>+	pool-&gt;p_put_chunk = &amp;hws_pool_bitmap_db_put_chunk;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_pool_db_init(struct mlx5hws_pool *pool,</div><div class='add'>+			    enum mlx5hws_db_type db_type)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (db_type == MLX5HWS_POOL_DB_TYPE_BITMAP)</div><div class='add'>+		ret = hws_pool_bitmap_db_init(pool);</div><div class='add'>+	else</div><div class='add'>+		ret = hws_pool_buddy_db_init(pool);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Failed to init pool type: %d (ret: %d)\n",</div><div class='add'>+			    db_type, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hws_pool_db_unint(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	pool-&gt;p_db_uninit(pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mlx5hws_pool_chunk_alloc(struct mlx5hws_pool *pool,</div><div class='add'>+			     struct mlx5hws_pool_chunk *chunk)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pool-&gt;lock);</div><div class='add'>+	ret = pool-&gt;p_get_chunk(pool, chunk);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		pool-&gt;available_elems -= 1 &lt;&lt; chunk-&gt;order;</div><div class='add'>+	mutex_unlock(&amp;pool-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5hws_pool_chunk_free(struct mlx5hws_pool *pool,</div><div class='add'>+			     struct mlx5hws_pool_chunk *chunk)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;pool-&gt;lock);</div><div class='add'>+	pool-&gt;p_put_chunk(pool, chunk);</div><div class='add'>+	pool-&gt;available_elems += 1 &lt;&lt; chunk-&gt;order;</div><div class='add'>+	mutex_unlock(&amp;pool-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mlx5hws_pool *</div><div class='add'>+mlx5hws_pool_create(struct mlx5hws_context *ctx, struct mlx5hws_pool_attr *pool_attr)</div><div class='add'>+{</div><div class='add'>+	enum mlx5hws_db_type res_db_type;</div><div class='add'>+	struct mlx5hws_pool *pool;</div><div class='add'>+</div><div class='add'>+	pool = kzalloc(sizeof(*pool), GFP_KERNEL);</div><div class='add'>+	if (!pool)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	pool-&gt;ctx = ctx;</div><div class='add'>+	pool-&gt;type = pool_attr-&gt;pool_type;</div><div class='add'>+	pool-&gt;alloc_log_sz = pool_attr-&gt;alloc_log_sz;</div><div class='add'>+	pool-&gt;flags = pool_attr-&gt;flags;</div><div class='add'>+	pool-&gt;tbl_type = pool_attr-&gt;table_type;</div><div class='add'>+	pool-&gt;opt_type = pool_attr-&gt;opt_type;</div><div class='add'>+</div><div class='add'>+	if (pool-&gt;flags &amp; MLX5HWS_POOL_FLAG_BUDDY)</div><div class='add'>+		res_db_type = MLX5HWS_POOL_DB_TYPE_BUDDY;</div><div class='add'>+	else</div><div class='add'>+		res_db_type = MLX5HWS_POOL_DB_TYPE_BITMAP;</div><div class='add'>+</div><div class='add'>+	pool-&gt;alloc_log_sz = pool_attr-&gt;alloc_log_sz;</div><div class='add'>+	pool-&gt;available_elems = 1 &lt;&lt; pool_attr-&gt;alloc_log_sz;</div><div class='add'>+</div><div class='add'>+	if (hws_pool_db_init(pool, res_db_type))</div><div class='add'>+		goto free_pool;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;pool-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return pool;</div><div class='add'>+</div><div class='add'>+free_pool:</div><div class='add'>+	kfree(pool);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlx5hws_pool_destroy(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	mutex_destroy(&amp;pool-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (pool-&gt;available_elems != 1 &lt;&lt; pool-&gt;alloc_log_sz)</div><div class='add'>+		mlx5hws_err(pool-&gt;ctx, "Attempting to destroy non-empty pool\n");</div><div class='add'>+</div><div class='add'>+	if (pool-&gt;resource)</div><div class='add'>+		hws_pool_resource_free(pool);</div><div class='add'>+</div><div class='add'>+	hws_pool_db_unint(pool);</div><div class='add'>+</div><div class='add'>+	kfree(pool);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.h<br/>new file mode 100644<br/>index 000000000000..33e33d5f1fb3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.h</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='add'>+</div><div class='add'>+#ifndef MLX5HWS_POOL_H_</div><div class='add'>+#define MLX5HWS_POOL_H_</div><div class='add'>+</div><div class='add'>+#define MLX5HWS_POOL_STC_LOG_SZ 15</div><div class='add'>+</div><div class='add'>+enum mlx5hws_pool_type {</div><div class='add'>+	MLX5HWS_POOL_TYPE_STE,</div><div class='add'>+	MLX5HWS_POOL_TYPE_STC,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5hws_pool_chunk {</div><div class='add'>+	int offset;</div><div class='add'>+	int order;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5hws_pool_resource {</div><div class='add'>+	struct mlx5hws_pool *pool;</div><div class='add'>+	u32 base_id;</div><div class='add'>+	u32 range;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mlx5hws_pool_flags {</div><div class='add'>+	/* Managed by a buddy allocator. If this is not set only allocations of</div><div class='add'>+	 * order 0 are supported.</div><div class='add'>+	 */</div><div class='add'>+	MLX5HWS_POOL_FLAG_BUDDY = BIT(0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mlx5hws_pool_optimize {</div><div class='add'>+	MLX5HWS_POOL_OPTIMIZE_NONE = 0x0,</div><div class='add'>+	MLX5HWS_POOL_OPTIMIZE_ORIG = 0x1,</div><div class='add'>+	MLX5HWS_POOL_OPTIMIZE_MIRROR = 0x2,</div><div class='add'>+	MLX5HWS_POOL_OPTIMIZE_MAX = 0x3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5hws_pool_attr {</div><div class='add'>+	enum mlx5hws_pool_type pool_type;</div><div class='add'>+	enum mlx5hws_table_type table_type;</div><div class='add'>+	enum mlx5hws_pool_flags flags;</div><div class='add'>+	enum mlx5hws_pool_optimize opt_type;</div><div class='add'>+	/* Allocation size once memory is depleted */</div><div class='add'>+	size_t alloc_log_sz;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mlx5hws_db_type {</div><div class='add'>+	/* Uses a bitmap, supports only allocations of order 0. */</div><div class='add'>+	MLX5HWS_POOL_DB_TYPE_BITMAP,</div><div class='add'>+	/* Entries are managed using a buddy mechanism. */</div><div class='add'>+	MLX5HWS_POOL_DB_TYPE_BUDDY,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5hws_pool_db {</div><div class='add'>+	enum mlx5hws_db_type type;</div><div class='add'>+	union {</div><div class='add'>+		unsigned long *bitmap;</div><div class='add'>+		struct mlx5hws_buddy_mem *buddy;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+typedef int (*mlx5hws_pool_db_get_chunk)(struct mlx5hws_pool *pool,</div><div class='add'>+					struct mlx5hws_pool_chunk *chunk);</div><div class='add'>+typedef void (*mlx5hws_pool_db_put_chunk)(struct mlx5hws_pool *pool,</div><div class='add'>+					 struct mlx5hws_pool_chunk *chunk);</div><div class='add'>+typedef void (*mlx5hws_pool_unint_db)(struct mlx5hws_pool *pool);</div><div class='add'>+</div><div class='add'>+struct mlx5hws_pool {</div><div class='add'>+	struct mlx5hws_context *ctx;</div><div class='add'>+	enum mlx5hws_pool_type type;</div><div class='add'>+	enum mlx5hws_pool_flags flags;</div><div class='add'>+	struct mutex lock; /* protect the pool */</div><div class='add'>+	size_t alloc_log_sz;</div><div class='add'>+	size_t available_elems;</div><div class='add'>+	enum mlx5hws_table_type tbl_type;</div><div class='add'>+	enum mlx5hws_pool_optimize opt_type;</div><div class='add'>+	struct mlx5hws_pool_resource *resource;</div><div class='add'>+	struct mlx5hws_pool_resource *mirror_resource;</div><div class='add'>+	struct mlx5hws_pool_db db;</div><div class='add'>+	/* Functions */</div><div class='add'>+	mlx5hws_pool_unint_db p_db_uninit;</div><div class='add'>+	mlx5hws_pool_db_get_chunk p_get_chunk;</div><div class='add'>+	mlx5hws_pool_db_put_chunk p_put_chunk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5hws_pool *</div><div class='add'>+mlx5hws_pool_create(struct mlx5hws_context *ctx,</div><div class='add'>+		    struct mlx5hws_pool_attr *pool_attr);</div><div class='add'>+</div><div class='add'>+void mlx5hws_pool_destroy(struct mlx5hws_pool *pool);</div><div class='add'>+</div><div class='add'>+int mlx5hws_pool_chunk_alloc(struct mlx5hws_pool *pool,</div><div class='add'>+			     struct mlx5hws_pool_chunk *chunk);</div><div class='add'>+</div><div class='add'>+void mlx5hws_pool_chunk_free(struct mlx5hws_pool *pool,</div><div class='add'>+			     struct mlx5hws_pool_chunk *chunk);</div><div class='add'>+</div><div class='add'>+static inline u32 mlx5hws_pool_get_base_id(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	return pool-&gt;resource-&gt;base_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 mlx5hws_pool_get_base_mirror_id(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	return pool-&gt;mirror_resource-&gt;base_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+mlx5hws_pool_empty(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	bool ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pool-&gt;lock);</div><div class='add'>+	ret = pool-&gt;available_elems == 0;</div><div class='add'>+	mutex_unlock(&amp;pool-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+mlx5hws_pool_full(struct mlx5hws_pool *pool)</div><div class='add'>+{</div><div class='add'>+	bool ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pool-&gt;lock);</div><div class='add'>+	ret = pool-&gt;available_elems == (1 &lt;&lt; pool-&gt;alloc_log_sz);</div><div class='add'>+	mutex_unlock(&amp;pool-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif /* MLX5HWS_POOL_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_prm.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h<br/>index de92cecbeb92..271490a51b96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_prm.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_prm.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h</a></div><div class='hunk'>@@ -390,11 +390,6 @@ struct mlx5_ifc_definer_bits {</div><div class='ctx'> 	u8 match_mask[0x160];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mlx5_ifc_arg_bits {</div><div class='del'>-	u8 rsvd0[0x88];</div><div class='del'>-	u8 access_pd[0x18];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct mlx5_ifc_header_modify_pattern_in_bits {</div><div class='ctx'> 	u8 modify_field_select[0x40];</div><div class='ctx'> </div><div class='hunk'>@@ -428,11 +423,6 @@ struct mlx5_ifc_create_definer_in_bits {</div><div class='ctx'> 	struct mlx5_ifc_definer_bits definer;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mlx5_ifc_create_arg_in_bits {</div><div class='del'>-	struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;</div><div class='del'>-	struct mlx5_ifc_arg_bits arg;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct mlx5_ifc_create_header_modify_pattern_in_bits {</div><div class='ctx'> 	struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;</div><div class='ctx'> 	struct mlx5_ifc_header_modify_pattern_in_bits pattern;</div><div class='hunk'>@@ -479,36 +469,4 @@ enum {</div><div class='ctx'> 	MLX5_IFC_MODIFY_FLOW_TABLE_MISS_ACTION_GOTO_TBL = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mlx5_ifc_alloc_packet_reformat_out_bits {</div><div class='del'>-	u8 status[0x8];</div><div class='del'>-	u8 reserved_at_8[0x18];</div><div class='del'>-</div><div class='del'>-	u8 syndrome[0x20];</div><div class='del'>-</div><div class='del'>-	u8 packet_reformat_id[0x20];</div><div class='del'>-</div><div class='del'>-	u8 reserved_at_60[0x20];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5_ifc_dealloc_packet_reformat_in_bits {</div><div class='del'>-	u8 opcode[0x10];</div><div class='del'>-	u8 reserved_at_10[0x10];</div><div class='del'>-</div><div class='del'>-	u8 reserved_at_20[0x10];</div><div class='del'>-	u8 op_mod[0x10];</div><div class='del'>-</div><div class='del'>-	u8 packet_reformat_id[0x20];</div><div class='del'>-</div><div class='del'>-	u8 reserved_at_60[0x20];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5_ifc_dealloc_packet_reformat_out_bits {</div><div class='del'>-	u8 status[0x8];</div><div class='del'>-	u8 reserved_at_8[0x18];</div><div class='del'>-</div><div class='del'>-	u8 syndrome[0x20];</div><div class='del'>-</div><div class='del'>-	u8 reserved_at_40[0x40];</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #endif /* MLX5_PRM_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_rule.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c<br/>index 8a011b958b43..a94f094e72ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_rule.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_rule.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c</a></div><div class='hunk'>@@ -1,12 +1,10 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='del'>-static void hws_rule_skip(struct mlx5hws_matcher *matcher,</div><div class='del'>-			  struct mlx5hws_match_template *mt,</div><div class='del'>-			  u32 flow_source,</div><div class='del'>-			  bool *skip_rx, bool *skip_tx)</div><div class='add'>+void mlx5hws_rule_skip(struct mlx5hws_matcher *matcher, u32 flow_source,</div><div class='add'>+		       bool *skip_rx, bool *skip_tx)</div><div class='ctx'> {</div><div class='ctx'> 	/* By default FDB rules are added to both RX and TX */</div><div class='ctx'> 	*skip_rx = false;</div><div class='hunk'>@@ -14,20 +12,21 @@ static void hws_rule_skip(struct mlx5hws_matcher *matcher,</div><div class='ctx'> </div><div class='ctx'> 	if (flow_source == MLX5_FLOW_CONTEXT_FLOW_SOURCE_LOCAL_VPORT) {</div><div class='ctx'> 		*skip_rx = true;</div><div class='del'>-	} else if (flow_source == MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK) {</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flow_source == MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK) {</div><div class='ctx'> 		*skip_tx = true;</div><div class='del'>-	} else {</div><div class='del'>-		/* If no flow source was set for current rule,</div><div class='del'>-		 * check for flow source in matcher attributes.</div><div class='del'>-		 */</div><div class='del'>-		if (matcher-&gt;attr.optimize_flow_src) {</div><div class='del'>-			*skip_tx =</div><div class='del'>-				matcher-&gt;attr.optimize_flow_src == MLX5HWS_MATCHER_FLOW_SRC_WIRE;</div><div class='del'>-			*skip_rx =</div><div class='del'>-				matcher-&gt;attr.optimize_flow_src == MLX5HWS_MATCHER_FLOW_SRC_VPORT;</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* If no flow source was set for current rule,</div><div class='add'>+	 * check for flow source in matcher attributes.</div><div class='add'>+	 */</div><div class='add'>+	*skip_tx = matcher-&gt;attr.optimize_flow_src ==</div><div class='add'>+			MLX5HWS_MATCHER_FLOW_SRC_WIRE;</div><div class='add'>+	*skip_rx = matcher-&gt;attr.optimize_flow_src ==</div><div class='add'>+			MLX5HWS_MATCHER_FLOW_SRC_VPORT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -66,7 +65,8 @@ static void hws_rule_init_dep_wqe(struct mlx5hws_send_ring_dep_wqe *dep_wqe,</div><div class='ctx'> 				attr-&gt;rule_idx : 0;</div><div class='ctx'> </div><div class='ctx'> 	if (tbl-&gt;type == MLX5HWS_TABLE_TYPE_FDB) {</div><div class='del'>-		hws_rule_skip(matcher, mt, attr-&gt;flow_source, &amp;skip_rx, &amp;skip_tx);</div><div class='add'>+		mlx5hws_rule_skip(matcher, attr-&gt;flow_source,</div><div class='add'>+				  &amp;skip_rx, &amp;skip_tx);</div><div class='ctx'> </div><div class='ctx'> 		if (!skip_rx) {</div><div class='ctx'> 			dep_wqe-&gt;rtc_0 = matcher-&gt;match_ste.rtc_0_id;</div><div class='hunk'>@@ -129,27 +129,18 @@ static void hws_rule_gen_comp(struct mlx5hws_send_engine *queue,</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> hws_rule_save_resize_info(struct mlx5hws_rule *rule,</div><div class='del'>-			  struct mlx5hws_send_ste_attr *ste_attr,</div><div class='del'>-			  bool is_update)</div><div class='add'>+			  struct mlx5hws_send_ste_attr *ste_attr)</div><div class='ctx'> {</div><div class='ctx'> 	if (!mlx5hws_matcher_is_resizable(rule-&gt;matcher))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (likely(!is_update)) {</div><div class='add'>+	/* resize_info might already exist (if we're in update flow) */</div><div class='add'>+	if (likely(!rule-&gt;resize_info)) {</div><div class='ctx'> 		rule-&gt;resize_info = kzalloc(sizeof(*rule-&gt;resize_info), GFP_KERNEL);</div><div class='ctx'> 		if (unlikely(!rule-&gt;resize_info)) {</div><div class='ctx'> 			pr_warn("HWS: resize info isn't allocated for rule\n");</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		rule-&gt;resize_info-&gt;max_stes =</div><div class='del'>-			rule-&gt;matcher-&gt;action_ste[MLX5HWS_ACTION_STE_IDX_ANY].max_stes;</div><div class='del'>-		rule-&gt;resize_info-&gt;action_ste_pool[0] = rule-&gt;matcher-&gt;action_ste[0].max_stes ?</div><div class='del'>-							rule-&gt;matcher-&gt;action_ste[0].pool :</div><div class='del'>-							NULL;</div><div class='del'>-		rule-&gt;resize_info-&gt;action_ste_pool[1] = rule-&gt;matcher-&gt;action_ste[1].max_stes ?</div><div class='del'>-							rule-&gt;matcher-&gt;action_ste[1].pool :</div><div class='del'>-							NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(rule-&gt;resize_info-&gt;ctrl_seg, ste_attr-&gt;wqe_ctrl,</div><div class='hunk'>@@ -204,84 +195,30 @@ hws_rule_load_delete_info(struct mlx5hws_rule *rule,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hws_rule_alloc_action_ste_idx(struct mlx5hws_rule *rule,</div><div class='del'>-					 u8 action_ste_selector)</div><div class='add'>+static int mlx5hws_rule_alloc_action_ste(struct mlx5hws_rule *rule,</div><div class='add'>+					 u16 queue_id, bool skip_rx,</div><div class='add'>+					 bool skip_tx)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_matcher *matcher = rule-&gt;matcher;</div><div class='del'>-	struct mlx5hws_matcher_action_ste *action_ste;</div><div class='del'>-	struct mlx5hws_pool_chunk ste = {0};</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	action_ste = &amp;matcher-&gt;action_ste[action_ste_selector];</div><div class='del'>-	ste.order = ilog2(roundup_pow_of_two(action_ste-&gt;max_stes));</div><div class='del'>-	ret = mlx5hws_pool_chunk_alloc(action_ste-&gt;pool, &amp;ste);</div><div class='del'>-	if (unlikely(ret)) {</div><div class='del'>-		mlx5hws_err(matcher-&gt;tbl-&gt;ctx,</div><div class='del'>-			    "Failed to allocate STE for rule actions");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-	rule-&gt;action_ste_idx = ste.offset;</div><div class='add'>+	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	rule-&gt;action_ste.ste.order =</div><div class='add'>+		ilog2(roundup_pow_of_two(matcher-&gt;num_of_action_stes));</div><div class='add'>+	return mlx5hws_action_ste_chunk_alloc(&amp;ctx-&gt;action_ste_pool[queue_id],</div><div class='add'>+					      skip_rx, skip_tx,</div><div class='add'>+					      &amp;rule-&gt;action_ste);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hws_rule_free_action_ste_idx(struct mlx5hws_rule *rule,</div><div class='del'>-					 u8 action_ste_selector)</div><div class='add'>+void mlx5hws_rule_free_action_ste(struct mlx5hws_action_ste_chunk *action_ste)</div><div class='ctx'> {</div><div class='del'>-	struct mlx5hws_matcher *matcher = rule-&gt;matcher;</div><div class='del'>-	struct mlx5hws_pool_chunk ste = {0};</div><div class='del'>-	struct mlx5hws_pool *pool;</div><div class='del'>-	u8 max_stes;</div><div class='del'>-</div><div class='del'>-	if (mlx5hws_matcher_is_resizable(matcher)) {</div><div class='del'>-		/* Free the original action pool if rule was resized */</div><div class='del'>-		max_stes = rule-&gt;resize_info-&gt;max_stes;</div><div class='del'>-		pool = rule-&gt;resize_info-&gt;action_ste_pool[action_ste_selector];</div><div class='del'>-	} else {</div><div class='del'>-		max_stes = matcher-&gt;action_ste[action_ste_selector].max_stes;</div><div class='del'>-		pool = matcher-&gt;action_ste[action_ste_selector].pool;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* This release is safe only when the rule match part was deleted */</div><div class='del'>-	ste.order = ilog2(roundup_pow_of_two(max_stes));</div><div class='del'>-	ste.offset = rule-&gt;action_ste_idx;</div><div class='del'>-</div><div class='del'>-	mlx5hws_pool_chunk_free(pool, &amp;ste);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int hws_rule_alloc_action_ste(struct mlx5hws_rule *rule,</div><div class='del'>-				     struct mlx5hws_rule_attr *attr)</div><div class='del'>-{</div><div class='del'>-	int action_ste_idx;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = hws_rule_alloc_action_ste_idx(rule, 0);</div><div class='del'>-	if (unlikely(ret))</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	action_ste_idx = rule-&gt;action_ste_idx;</div><div class='del'>-</div><div class='del'>-	ret = hws_rule_alloc_action_ste_idx(rule, 1);</div><div class='del'>-	if (unlikely(ret)) {</div><div class='del'>-		hws_rule_free_action_ste_idx(rule, 0);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Both pools have to return the same index */</div><div class='del'>-	if (unlikely(rule-&gt;action_ste_idx != action_ste_idx)) {</div><div class='del'>-		pr_warn("HWS: allocation of action STE failed - pool indexes mismatch\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	if (!action_ste-&gt;action_tbl)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-void mlx5hws_rule_free_action_ste(struct mlx5hws_rule *rule)</div><div class='del'>-{</div><div class='del'>-	if (rule-&gt;action_ste_idx &gt; -1) {</div><div class='del'>-		hws_rule_free_action_ste_idx(rule, 1);</div><div class='del'>-		hws_rule_free_action_ste_idx(rule, 0);</div><div class='del'>-	}</div><div class='add'>+	/* This release is safe only when the rule match STE was deleted</div><div class='add'>+	 * (when the rule is being deleted) or replaced with the new STE that</div><div class='add'>+	 * isn't pointing to old action STEs (when the rule is being updated).</div><div class='add'>+	 */</div><div class='add'>+	mlx5hws_action_ste_chunk_free(action_ste);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hws_rule_create_init(struct mlx5hws_rule *rule,</div><div class='hunk'>@@ -298,14 +235,17 @@ static void hws_rule_create_init(struct mlx5hws_rule *rule,</div><div class='ctx'> 		/* In update we use these rtc's */</div><div class='ctx'> 		rule-&gt;rtc_0 = 0;</div><div class='ctx'> 		rule-&gt;rtc_1 = 0;</div><div class='del'>-		rule-&gt;action_ste_selector = 0;</div><div class='add'>+</div><div class='add'>+		rule-&gt;status = MLX5HWS_RULE_STATUS_CREATING;</div><div class='ctx'> 	} else {</div><div class='del'>-		rule-&gt;action_ste_selector = !rule-&gt;action_ste_selector;</div><div class='add'>+		rule-&gt;status = MLX5HWS_RULE_STATUS_UPDATING;</div><div class='add'>+		/* Save the old action STE info so we can free it after writing</div><div class='add'>+		 * new action STEs and a corresponding match STE.</div><div class='add'>+		 */</div><div class='add'>+		rule-&gt;old_action_ste = rule-&gt;action_ste;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rule-&gt;pending_wqes = 0;</div><div class='del'>-	rule-&gt;action_ste_idx = -1;</div><div class='del'>-	rule-&gt;status = MLX5HWS_RULE_STATUS_CREATING;</div><div class='ctx'> </div><div class='ctx'> 	/* Init default send STE attributes */</div><div class='ctx'> 	ste_attr-&gt;gta_opcode = MLX5HWS_WQE_GTA_OP_ACTIVATE;</div><div class='hunk'>@@ -315,8 +255,7 @@ static void hws_rule_create_init(struct mlx5hws_rule *rule,</div><div class='ctx'> </div><div class='ctx'> 	/* Init default action apply */</div><div class='ctx'> 	apply-&gt;tbl_type = tbl-&gt;type;</div><div class='del'>-	apply-&gt;common_res = &amp;ctx-&gt;common_res[tbl-&gt;type];</div><div class='del'>-	apply-&gt;jump_to_action_stc = matcher-&gt;action_ste[0].stc.offset;</div><div class='add'>+	apply-&gt;common_res = &amp;ctx-&gt;common_res;</div><div class='ctx'> 	apply-&gt;require_dep = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -332,8 +271,6 @@ static void hws_rule_move_init(struct mlx5hws_rule *rule,</div><div class='ctx'> 	rule-&gt;rtc_1 = 0;</div><div class='ctx'> </div><div class='ctx'> 	rule-&gt;pending_wqes = 0;</div><div class='del'>-	rule-&gt;action_ste_idx = -1;</div><div class='del'>-	rule-&gt;action_ste_selector = 0;</div><div class='ctx'> 	rule-&gt;status = MLX5HWS_RULE_STATUS_CREATING;</div><div class='ctx'> 	rule-&gt;resize_info-&gt;state = MLX5HWS_RULE_RESIZE_STATE_WRITING;</div><div class='ctx'> }</div><div class='hunk'>@@ -394,21 +331,24 @@ static int hws_rule_create_hws(struct mlx5hws_rule *rule,</div><div class='ctx'> </div><div class='ctx'> 	if (action_stes) {</div><div class='ctx'> 		/* Allocate action STEs for rules that need more than match STE */</div><div class='del'>-		if (!is_update) {</div><div class='del'>-			ret = hws_rule_alloc_action_ste(rule, attr);</div><div class='del'>-			if (ret) {</div><div class='del'>-				mlx5hws_err(ctx, "Failed to allocate action memory %d", ret);</div><div class='del'>-				mlx5hws_send_abort_new_dep_wqe(queue);</div><div class='del'>-				return ret;</div><div class='del'>-			}</div><div class='add'>+		ret = mlx5hws_rule_alloc_action_ste(rule, attr-&gt;queue_id,</div><div class='add'>+						    !!ste_attr.rtc_0,</div><div class='add'>+						    !!ste_attr.rtc_1);</div><div class='add'>+		if (ret) {</div><div class='add'>+			mlx5hws_err(ctx, "Failed to allocate action memory %d", ret);</div><div class='add'>+			mlx5hws_send_abort_new_dep_wqe(queue);</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='add'>+		apply.jump_to_action_stc =</div><div class='add'>+			rule-&gt;action_ste.action_tbl-&gt;stc.offset;</div><div class='ctx'> 		/* Skip RX/TX based on the dep_wqe init */</div><div class='ctx'> 		ste_attr.rtc_0 = dep_wqe-&gt;rtc_0 ?</div><div class='del'>-				 matcher-&gt;action_ste[rule-&gt;action_ste_selector].rtc_0_id : 0;</div><div class='add'>+				 rule-&gt;action_ste.action_tbl-&gt;rtc_0_id : 0;</div><div class='ctx'> 		ste_attr.rtc_1 = dep_wqe-&gt;rtc_1 ?</div><div class='del'>-				 matcher-&gt;action_ste[rule-&gt;action_ste_selector].rtc_1_id : 0;</div><div class='add'>+				 rule-&gt;action_ste.action_tbl-&gt;rtc_1_id : 0;</div><div class='ctx'> 		/* Action STEs are written to a specific index last to first */</div><div class='del'>-		ste_attr.direct_index = rule-&gt;action_ste_idx + action_stes;</div><div class='add'>+		ste_attr.direct_index =</div><div class='add'>+			rule-&gt;action_ste.ste.offset + action_stes;</div><div class='ctx'> 		apply.next_direct_idx = ste_attr.direct_index;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		apply.next_direct_idx = 0;</div><div class='hunk'>@@ -459,7 +399,7 @@ static int hws_rule_create_hws(struct mlx5hws_rule *rule,</div><div class='ctx'> 	if (!is_update)</div><div class='ctx'> 		hws_rule_save_delete_info(rule, &amp;ste_attr);</div><div class='ctx'> </div><div class='del'>-	hws_rule_save_resize_info(rule, &amp;ste_attr, is_update);</div><div class='add'>+	hws_rule_save_resize_info(rule, &amp;ste_attr);</div><div class='ctx'> 	mlx5hws_send_engine_inc_rule(queue);</div><div class='ctx'> </div><div class='ctx'> 	if (!attr-&gt;burst)</div><div class='hunk'>@@ -480,7 +420,10 @@ static void hws_rule_destroy_failed_hws(struct mlx5hws_rule *rule,</div><div class='ctx'> 			  attr-&gt;user_data, MLX5HWS_RULE_STATUS_DELETED);</div><div class='ctx'> </div><div class='ctx'> 	/* Rule failed now we can safely release action STEs */</div><div class='del'>-	mlx5hws_rule_free_action_ste(rule);</div><div class='add'>+	mlx5hws_rule_free_action_ste(&amp;rule-&gt;action_ste);</div><div class='add'>+</div><div class='add'>+	/* Perhaps the rule failed updating - release old action STEs as well */</div><div class='add'>+	mlx5hws_rule_free_action_ste(&amp;rule-&gt;old_action_ste);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear complex tag */</div><div class='ctx'> 	hws_rule_clear_delete_info(rule);</div><div class='hunk'>@@ -517,7 +460,8 @@ static int hws_rule_destroy_hws(struct mlx5hws_rule *rule,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Rule is not completed yet */</div><div class='del'>-	if (rule-&gt;status == MLX5HWS_RULE_STATUS_CREATING)</div><div class='add'>+	if (rule-&gt;status == MLX5HWS_RULE_STATUS_CREATING ||</div><div class='add'>+	    rule-&gt;status == MLX5HWS_RULE_STATUS_UPDATING)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	/* Rule failed and doesn't require cleanup */</div><div class='hunk'>@@ -534,7 +478,7 @@ static int hws_rule_destroy_hws(struct mlx5hws_rule *rule,</div><div class='ctx'> 		hws_rule_gen_comp(queue, rule, false,</div><div class='ctx'> 				  attr-&gt;user_data, MLX5HWS_RULE_STATUS_DELETED);</div><div class='ctx'> </div><div class='del'>-		mlx5hws_rule_free_action_ste(rule);</div><div class='add'>+		mlx5hws_rule_free_action_ste(&amp;rule-&gt;action_ste);</div><div class='ctx'> 		mlx5hws_rule_clear_resize_info(rule);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -711,6 +655,124 @@ int mlx5hws_rule_move_hws_add(struct mlx5hws_rule *rule,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u8 hws_rule_ethertype_to_matcher_ipv(u32 ethertype)</div><div class='add'>+{</div><div class='add'>+	switch (ethertype) {</div><div class='add'>+	case ETH_P_IP:</div><div class='add'>+		return MLX5HWS_MATCHER_IPV_4;</div><div class='add'>+	case ETH_P_IPV6:</div><div class='add'>+		return MLX5HWS_MATCHER_IPV_6;</div><div class='add'>+	default:</div><div class='add'>+		return MLX5HWS_MATCHER_IPV_UNSET;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 hws_rule_ip_version_to_matcher_ipv(u32 ip_version)</div><div class='add'>+{</div><div class='add'>+	switch (ip_version) {</div><div class='add'>+	case 4:</div><div class='add'>+		return MLX5HWS_MATCHER_IPV_4;</div><div class='add'>+	case 6:</div><div class='add'>+		return MLX5HWS_MATCHER_IPV_6;</div><div class='add'>+	default:</div><div class='add'>+		return MLX5HWS_MATCHER_IPV_UNSET;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_rule_check_outer_ip_version(struct mlx5hws_matcher *matcher,</div><div class='add'>+					   u32 *match_param)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	u8 outer_ipv_ether = MLX5HWS_MATCHER_IPV_UNSET;</div><div class='add'>+	u8 outer_ipv_ip = MLX5HWS_MATCHER_IPV_UNSET;</div><div class='add'>+	u8 outer_ipv, ver;</div><div class='add'>+</div><div class='add'>+	if (matcher-&gt;matches_outer_ethertype) {</div><div class='add'>+		ver = MLX5_GET(fte_match_param, match_param,</div><div class='add'>+			       outer_headers.ethertype);</div><div class='add'>+		outer_ipv_ether = hws_rule_ethertype_to_matcher_ipv(ver);</div><div class='add'>+	}</div><div class='add'>+	if (matcher-&gt;matches_outer_ip_version) {</div><div class='add'>+		ver = MLX5_GET(fte_match_param, match_param,</div><div class='add'>+			       outer_headers.ip_version);</div><div class='add'>+		outer_ipv_ip = hws_rule_ip_version_to_matcher_ipv(ver);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (outer_ipv_ether != MLX5HWS_MATCHER_IPV_UNSET &amp;&amp;</div><div class='add'>+	    outer_ipv_ip != MLX5HWS_MATCHER_IPV_UNSET &amp;&amp;</div><div class='add'>+	    outer_ipv_ether != outer_ipv_ip) {</div><div class='add'>+		mlx5hws_err(ctx, "Rule matches on inconsistent outer ethertype and ip version\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	outer_ipv = outer_ipv_ether != MLX5HWS_MATCHER_IPV_UNSET ?</div><div class='add'>+		    outer_ipv_ether : outer_ipv_ip;</div><div class='add'>+	if (outer_ipv != MLX5HWS_MATCHER_IPV_UNSET &amp;&amp;</div><div class='add'>+	    matcher-&gt;outer_ip_version != MLX5HWS_MATCHER_IPV_UNSET &amp;&amp;</div><div class='add'>+	    outer_ipv != matcher-&gt;outer_ip_version) {</div><div class='add'>+		mlx5hws_err(ctx, "Matcher and rule disagree on outer IP version\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	matcher-&gt;outer_ip_version = outer_ipv;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_rule_check_inner_ip_version(struct mlx5hws_matcher *matcher,</div><div class='add'>+					   u32 *match_param)</div><div class='add'>+{</div><div class='add'>+	struct mlx5hws_context *ctx = matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	u8 inner_ipv_ether = MLX5HWS_MATCHER_IPV_UNSET;</div><div class='add'>+	u8 inner_ipv_ip = MLX5HWS_MATCHER_IPV_UNSET;</div><div class='add'>+	u8 inner_ipv, ver;</div><div class='add'>+</div><div class='add'>+	if (matcher-&gt;matches_inner_ethertype) {</div><div class='add'>+		ver = MLX5_GET(fte_match_param, match_param,</div><div class='add'>+			       inner_headers.ethertype);</div><div class='add'>+		inner_ipv_ether = hws_rule_ethertype_to_matcher_ipv(ver);</div><div class='add'>+	}</div><div class='add'>+	if (matcher-&gt;matches_inner_ip_version) {</div><div class='add'>+		ver = MLX5_GET(fte_match_param, match_param,</div><div class='add'>+			       inner_headers.ip_version);</div><div class='add'>+		inner_ipv_ip = hws_rule_ip_version_to_matcher_ipv(ver);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (inner_ipv_ether != MLX5HWS_MATCHER_IPV_UNSET &amp;&amp;</div><div class='add'>+	    inner_ipv_ip != MLX5HWS_MATCHER_IPV_UNSET &amp;&amp;</div><div class='add'>+	    inner_ipv_ether != inner_ipv_ip) {</div><div class='add'>+		mlx5hws_err(ctx, "Rule matches on inconsistent inner ethertype and ip version\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	inner_ipv = inner_ipv_ether != MLX5HWS_MATCHER_IPV_UNSET ?</div><div class='add'>+		    inner_ipv_ether : inner_ipv_ip;</div><div class='add'>+	if (inner_ipv != MLX5HWS_MATCHER_IPV_UNSET &amp;&amp;</div><div class='add'>+	    matcher-&gt;inner_ip_version != MLX5HWS_MATCHER_IPV_UNSET &amp;&amp;</div><div class='add'>+	    inner_ipv != matcher-&gt;inner_ip_version) {</div><div class='add'>+		mlx5hws_err(ctx, "Matcher and rule disagree on inner IP version\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	matcher-&gt;inner_ip_version = inner_ipv;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hws_rule_check_ip_version(struct mlx5hws_matcher *matcher,</div><div class='add'>+				     u32 *match_param)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = hws_rule_check_outer_ip_version(matcher, match_param);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = hws_rule_check_inner_ip_version(matcher, match_param);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5hws_rule_create(struct mlx5hws_matcher *matcher,</div><div class='ctx'> 			u8 mt_idx,</div><div class='ctx'> 			u32 *match_param,</div><div class='hunk'>@@ -721,6 +783,10 @@ int mlx5hws_rule_create(struct mlx5hws_matcher *matcher,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	ret = hws_rule_check_ip_version(matcher, match_param);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	rule_handle-&gt;matcher = matcher;</div><div class='ctx'> </div><div class='ctx'> 	ret = hws_rule_enqueue_precheck_create(rule_handle, attr);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_rule.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.h<br/>index 495cdd17e9f3..d0f082b8dbf5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_rule.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_rule.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.h</a></div><div class='hunk'>@@ -15,6 +15,8 @@ enum mlx5hws_rule_status {</div><div class='ctx'> 	MLX5HWS_RULE_STATUS_UNKNOWN,</div><div class='ctx'> 	MLX5HWS_RULE_STATUS_CREATING,</div><div class='ctx'> 	MLX5HWS_RULE_STATUS_CREATED,</div><div class='add'>+	MLX5HWS_RULE_STATUS_UPDATING,</div><div class='add'>+	MLX5HWS_RULE_STATUS_UPDATED,</div><div class='ctx'> 	MLX5HWS_RULE_STATUS_DELETING,</div><div class='ctx'> 	MLX5HWS_RULE_STATUS_DELETED,</div><div class='ctx'> 	MLX5HWS_RULE_STATUS_FAILING,</div><div class='hunk'>@@ -42,12 +44,10 @@ struct mlx5hws_rule_match_tag {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlx5hws_rule_resize_info {</div><div class='del'>-	struct mlx5hws_pool *action_ste_pool[2];</div><div class='ctx'> 	u32 rtc_0;</div><div class='ctx'> 	u32 rtc_1;</div><div class='ctx'> 	u32 rule_idx;</div><div class='ctx'> 	u8 state;</div><div class='del'>-	u8 max_stes;</div><div class='ctx'> 	u8 ctrl_seg[MLX5HWS_WQE_SZ_GTA_CTRL]; /* Ctrl segment of STE: 48 bytes */</div><div class='ctx'> 	u8 data_seg[MLX5HWS_WQE_SZ_GTA_DATA]; /* Data segment of STE: 64 bytes */</div><div class='ctx'> };</div><div class='hunk'>@@ -58,18 +58,21 @@ struct mlx5hws_rule {</div><div class='ctx'> 		struct mlx5hws_rule_match_tag tag;</div><div class='ctx'> 		struct mlx5hws_rule_resize_info *resize_info;</div><div class='ctx'> 	};</div><div class='add'>+	struct mlx5hws_action_ste_chunk action_ste;</div><div class='add'>+	struct mlx5hws_action_ste_chunk old_action_ste;</div><div class='ctx'> 	u32 rtc_0; /* The RTC into which the STE was inserted */</div><div class='ctx'> 	u32 rtc_1; /* The RTC into which the STE was inserted */</div><div class='del'>-	int action_ste_idx; /* STE array index */</div><div class='ctx'> 	u8 status; /* enum mlx5hws_rule_status */</div><div class='del'>-	u8 action_ste_selector; /* For rule update - which action STE is in use */</div><div class='ctx'> 	u8 pending_wqes;</div><div class='ctx'> 	bool skip_delete; /* For complex rules - another rule with same tag</div><div class='ctx'> 			   * still exists, so don't actually delete this rule.</div><div class='ctx'> 			   */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void mlx5hws_rule_free_action_ste(struct mlx5hws_rule *rule);</div><div class='add'>+void mlx5hws_rule_skip(struct mlx5hws_matcher *matcher, u32 flow_source,</div><div class='add'>+		       bool *skip_rx, bool *skip_tx);</div><div class='add'>+</div><div class='add'>+void mlx5hws_rule_free_action_ste(struct mlx5hws_action_ste_chunk *action_ste);</div><div class='ctx'> </div><div class='ctx'> int mlx5hws_rule_move_hws_remove(struct mlx5hws_rule *rule,</div><div class='ctx'> 				 void *queue, void *user_data);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c<br/>index 6d443e6ee8d9..7510c46e58a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> #include "lib/clock.h"</div><div class='ctx'> </div><div class='ctx'> enum { CQ_OK = 0, CQ_EMPTY = -1, CQ_POLL_ERR = -2 };</div><div class='hunk'>@@ -344,18 +344,133 @@ hws_send_engine_update_rule_resize(struct mlx5hws_send_engine *queue,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void hws_send_engine_dump_error_cqe(struct mlx5hws_send_engine *queue,</div><div class='add'>+					   struct mlx5hws_send_ring_priv *priv,</div><div class='add'>+					   struct mlx5_cqe64 *cqe)</div><div class='add'>+{</div><div class='add'>+	u8 wqe_opcode = cqe ? be32_to_cpu(cqe-&gt;sop_drop_qpn) &gt;&gt; 24 : 0;</div><div class='add'>+	struct mlx5hws_context *ctx = priv-&gt;rule-&gt;matcher-&gt;tbl-&gt;ctx;</div><div class='add'>+	u32 opcode = cqe ? get_cqe_opcode(cqe) : 0;</div><div class='add'>+	struct mlx5hws_rule *rule = priv-&gt;rule;</div><div class='add'>+</div><div class='add'>+	/* If something bad happens and lots of rules are failing, we don't</div><div class='add'>+	 * want to pollute dmesg. Print only the first bad cqe per engine,</div><div class='add'>+	 * the one that started the avalanche.</div><div class='add'>+	 */</div><div class='add'>+	if (queue-&gt;error_cqe_printed)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	queue-&gt;error_cqe_printed = true;</div><div class='add'>+</div><div class='add'>+	if (mlx5hws_rule_move_in_progress(rule))</div><div class='add'>+		mlx5hws_err(ctx,</div><div class='add'>+			    "--- rule 0x%08llx: error completion moving rule: phase %s, wqes left %d\n",</div><div class='add'>+			    HWS_PTR_TO_ID(rule),</div><div class='add'>+			    rule-&gt;resize_info-&gt;state ==</div><div class='add'>+			    MLX5HWS_RULE_RESIZE_STATE_WRITING ? "WRITING" :</div><div class='add'>+			    rule-&gt;resize_info-&gt;state ==</div><div class='add'>+			    MLX5HWS_RULE_RESIZE_STATE_DELETING ? "DELETING" :</div><div class='add'>+			    "UNKNOWN",</div><div class='add'>+			    rule-&gt;pending_wqes);</div><div class='add'>+	else</div><div class='add'>+		mlx5hws_err(ctx,</div><div class='add'>+			    "--- rule 0x%08llx: error completion %s (%d), wqes left %d\n",</div><div class='add'>+			    HWS_PTR_TO_ID(rule),</div><div class='add'>+			    rule-&gt;status ==</div><div class='add'>+			    MLX5HWS_RULE_STATUS_CREATING ? "CREATING" :</div><div class='add'>+			    rule-&gt;status ==</div><div class='add'>+			    MLX5HWS_RULE_STATUS_DELETING ? "DELETING" :</div><div class='add'>+			    rule-&gt;status ==</div><div class='add'>+			    MLX5HWS_RULE_STATUS_FAILING ? "FAILING" :</div><div class='add'>+			    rule-&gt;status ==</div><div class='add'>+			    MLX5HWS_RULE_STATUS_UPDATING ? "UPDATING" : "NA",</div><div class='add'>+			    rule-&gt;status,</div><div class='add'>+			    rule-&gt;pending_wqes);</div><div class='add'>+</div><div class='add'>+	mlx5hws_err(ctx, "    rule 0x%08llx: matcher 0x%llx %s\n",</div><div class='add'>+		    HWS_PTR_TO_ID(rule),</div><div class='add'>+		    HWS_PTR_TO_ID(rule-&gt;matcher),</div><div class='add'>+		    (rule-&gt;matcher-&gt;flags &amp; MLX5HWS_MATCHER_FLAGS_ISOLATED) ?</div><div class='add'>+		    "(isolated)" : "");</div><div class='add'>+</div><div class='add'>+	if (!cqe) {</div><div class='add'>+		mlx5hws_err(ctx, "    rule 0x%08llx: no CQE\n",</div><div class='add'>+			    HWS_PTR_TO_ID(rule));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5hws_err(ctx, "    rule 0x%08llx: cqe-&gt;opcode      = %d %s\n",</div><div class='add'>+		    HWS_PTR_TO_ID(rule), opcode,</div><div class='add'>+		    opcode == MLX5_CQE_REQ ? "(MLX5_CQE_REQ)" :</div><div class='add'>+		    opcode == MLX5_CQE_REQ_ERR ? "(MLX5_CQE_REQ_ERR)" : " ");</div><div class='add'>+</div><div class='add'>+	if (opcode == MLX5_CQE_REQ_ERR) {</div><div class='add'>+		struct mlx5_err_cqe *err_cqe = (struct mlx5_err_cqe *)cqe;</div><div class='add'>+</div><div class='add'>+		mlx5hws_err(ctx,</div><div class='add'>+			    "    rule 0x%08llx:  |--- hw_error_syndrome = 0x%x\n",</div><div class='add'>+			    HWS_PTR_TO_ID(rule),</div><div class='add'>+			    err_cqe-&gt;rsvd1[16]);</div><div class='add'>+		mlx5hws_err(ctx,</div><div class='add'>+			    "    rule 0x%08llx:  |--- hw_syndrome_type = 0x%x\n",</div><div class='add'>+			    HWS_PTR_TO_ID(rule),</div><div class='add'>+			    err_cqe-&gt;rsvd1[17] &gt;&gt; 4);</div><div class='add'>+		mlx5hws_err(ctx,</div><div class='add'>+			    "    rule 0x%08llx:  |--- vendor_err_synd = 0x%x\n",</div><div class='add'>+			    HWS_PTR_TO_ID(rule),</div><div class='add'>+			    err_cqe-&gt;vendor_err_synd);</div><div class='add'>+		mlx5hws_err(ctx,</div><div class='add'>+			    "    rule 0x%08llx:  |--- syndrome = 0x%x\n",</div><div class='add'>+			    HWS_PTR_TO_ID(rule),</div><div class='add'>+			    err_cqe-&gt;syndrome);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mlx5hws_err(ctx,</div><div class='add'>+		    "    rule 0x%08llx: cqe-&gt;byte_cnt      = 0x%08x\n",</div><div class='add'>+		    HWS_PTR_TO_ID(rule), be32_to_cpu(cqe-&gt;byte_cnt));</div><div class='add'>+	mlx5hws_err(ctx,</div><div class='add'>+		    "    rule 0x%08llx:  |-- UPDATE STATUS = %s\n",</div><div class='add'>+		    HWS_PTR_TO_ID(rule),</div><div class='add'>+		    (be32_to_cpu(cqe-&gt;byte_cnt) &amp; 0x80000000) ?</div><div class='add'>+		    "FAILURE" : "SUCCESS");</div><div class='add'>+	mlx5hws_err(ctx,</div><div class='add'>+		    "    rule 0x%08llx:  |------- SYNDROME = %s\n",</div><div class='add'>+		    HWS_PTR_TO_ID(rule),</div><div class='add'>+		    ((be32_to_cpu(cqe-&gt;byte_cnt) &amp; 0x00000003) == 1) ?</div><div class='add'>+		    "SET_FLOW_FAIL" :</div><div class='add'>+		    ((be32_to_cpu(cqe-&gt;byte_cnt) &amp; 0x00000003) == 2) ?</div><div class='add'>+		    "DISABLE_FLOW_FAIL" : "UNKNOWN");</div><div class='add'>+	mlx5hws_err(ctx,</div><div class='add'>+		    "    rule 0x%08llx: cqe-&gt;sop_drop_qpn  = 0x%08x\n",</div><div class='add'>+		    HWS_PTR_TO_ID(rule), be32_to_cpu(cqe-&gt;sop_drop_qpn));</div><div class='add'>+	mlx5hws_err(ctx,</div><div class='add'>+		    "    rule 0x%08llx:  |-send wqe opcode = 0x%02x %s\n",</div><div class='add'>+		    HWS_PTR_TO_ID(rule), wqe_opcode,</div><div class='add'>+		    wqe_opcode == MLX5HWS_WQE_OPCODE_TBL_ACCESS ?</div><div class='add'>+		    "(MLX5HWS_WQE_OPCODE_TBL_ACCESS)" : "(UNKNOWN)");</div><div class='add'>+	mlx5hws_err(ctx,</div><div class='add'>+		    "    rule 0x%08llx:  |------------ qpn = 0x%06x\n",</div><div class='add'>+		    HWS_PTR_TO_ID(rule),</div><div class='add'>+		    be32_to_cpu(cqe-&gt;sop_drop_qpn) &amp; 0xffffff);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void hws_send_engine_update_rule(struct mlx5hws_send_engine *queue,</div><div class='ctx'> 					struct mlx5hws_send_ring_priv *priv,</div><div class='ctx'> 					u16 wqe_cnt,</div><div class='del'>-					enum mlx5hws_flow_op_status *status)</div><div class='add'>+					enum mlx5hws_flow_op_status *status,</div><div class='add'>+					struct mlx5_cqe64 *cqe)</div><div class='ctx'> {</div><div class='ctx'> 	priv-&gt;rule-&gt;pending_wqes--;</div><div class='ctx'> </div><div class='del'>-	if (*status == MLX5HWS_FLOW_OP_ERROR) {</div><div class='add'>+	if (unlikely(*status == MLX5HWS_FLOW_OP_ERROR)) {</div><div class='ctx'> 		if (priv-&gt;retry_id) {</div><div class='add'>+			/* If there is a retry_id, then it's not an error yet,</div><div class='add'>+			 * retry to insert this rule in the collision RTC.</div><div class='add'>+			 */</div><div class='ctx'> 			hws_send_engine_retry_post_send(queue, priv, wqe_cnt);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='add'>+		hws_send_engine_dump_error_cqe(queue, priv, cqe);</div><div class='ctx'> 		/* Some part of the rule failed */</div><div class='ctx'> 		priv-&gt;rule-&gt;status = MLX5HWS_RULE_STATUS_FAILING;</div><div class='ctx'> 		*priv-&gt;used_id = 0;</div><div class='hunk'>@@ -377,17 +492,25 @@ static void hws_send_engine_update_rule(struct mlx5hws_send_engine *queue,</div><div class='ctx'> </div><div class='ctx'> 			*status = MLX5HWS_FLOW_OP_ERROR;</div><div class='ctx'> 		} else {</div><div class='del'>-			/* Increase the status, this only works on good flow as the enum</div><div class='del'>-			 * is arrange it away creating -&gt; created -&gt; deleting -&gt; deleted</div><div class='add'>+			/* Increase the status, this only works on good flow as</div><div class='add'>+			 * the enum is arranged this way:</div><div class='add'>+			 *  - creating -&gt; created</div><div class='add'>+			 *  - updating -&gt; updated</div><div class='add'>+			 *  - deleting -&gt; deleted</div><div class='ctx'> 			 */</div><div class='ctx'> 			priv-&gt;rule-&gt;status++;</div><div class='ctx'> 			*status = MLX5HWS_FLOW_OP_SUCCESS;</div><div class='del'>-			/* Rule was deleted now we can safely release action STEs</div><div class='del'>-			 * and clear resize info</div><div class='del'>-			 */</div><div class='ctx'> 			if (priv-&gt;rule-&gt;status == MLX5HWS_RULE_STATUS_DELETED) {</div><div class='del'>-				mlx5hws_rule_free_action_ste(priv-&gt;rule);</div><div class='add'>+				/* Rule was deleted, now we can safely release</div><div class='add'>+				 * action STEs and clear resize info</div><div class='add'>+				 */</div><div class='add'>+				mlx5hws_rule_free_action_ste(&amp;priv-&gt;rule-&gt;action_ste);</div><div class='ctx'> 				mlx5hws_rule_clear_resize_info(priv-&gt;rule);</div><div class='add'>+			} else if (priv-&gt;rule-&gt;status == MLX5HWS_RULE_STATUS_UPDATED) {</div><div class='add'>+				/* Rule was updated, free the old action STEs */</div><div class='add'>+				mlx5hws_rule_free_action_ste(&amp;priv-&gt;rule-&gt;old_action_ste);</div><div class='add'>+				/* Update completed - move the rule back to "created" */</div><div class='add'>+				priv-&gt;rule-&gt;status = MLX5HWS_RULE_STATUS_CREATED;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -412,7 +535,8 @@ static void hws_send_engine_update(struct mlx5hws_send_engine *queue,</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;user_data) {</div><div class='ctx'> 		if (priv-&gt;rule) {</div><div class='del'>-			hws_send_engine_update_rule(queue, priv, wqe_cnt, &amp;status);</div><div class='add'>+			hws_send_engine_update_rule(queue, priv, wqe_cnt,</div><div class='add'>+						    &amp;status, cqe);</div><div class='ctx'> 			/* Completion is provided on the last rule WQE */</div><div class='ctx'> 			if (priv-&gt;rule-&gt;pending_wqes)</div><div class='ctx'> 				return;</div><div class='hunk'>@@ -566,7 +690,7 @@ static int hws_send_ring_alloc_sq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	size_t buf_sz;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	sq-&gt;uar_map = mdev-&gt;mlx5e_res.hw_objs.bfreg.map;</div><div class='add'>+	sq-&gt;uar_map = mdev-&gt;priv.bfreg.map;</div><div class='ctx'> 	sq-&gt;mdev = mdev;</div><div class='ctx'> </div><div class='ctx'> 	param.db_numa_node = numa_node;</div><div class='hunk'>@@ -633,13 +757,14 @@ static int hws_send_ring_create_sq(struct mlx5_core_dev *mdev, u32 pdn,</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST);</div><div class='ctx'> 	MLX5_SET(sqc, sqc, flush_in_error_en, 1);</div><div class='add'>+	MLX5_SET(sqc, sqc, non_wire, 1);</div><div class='ctx'> </div><div class='ctx'> 	ts_format = mlx5_is_real_time_sq(mdev) ? MLX5_TIMESTAMP_FORMAT_REAL_TIME :</div><div class='ctx'> 						 MLX5_TIMESTAMP_FORMAT_FREE_RUNNING;</div><div class='ctx'> 	MLX5_SET(sqc, sqc, ts_format, ts_format);</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC);</div><div class='del'>-	MLX5_SET(wq, wq, uar_page, mdev-&gt;mlx5e_res.hw_objs.bfreg.index);</div><div class='add'>+	MLX5_SET(wq, wq, uar_page, mdev-&gt;priv.bfreg.index);</div><div class='ctx'> 	MLX5_SET(wq, wq, log_wq_pg_sz, sq-&gt;wq_ctrl.buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT);</div><div class='ctx'> 	MLX5_SET64(wq, wq, dbr_addr, sq-&gt;wq_ctrl.db.dma);</div><div class='ctx'> </div><div class='hunk'>@@ -748,12 +873,6 @@ err_free_sqc:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void hws_cq_complete(struct mlx5_core_cq *mcq,</div><div class='del'>-			    struct mlx5_eqe *eqe)</div><div class='del'>-{</div><div class='del'>-	pr_err("CQ completion CQ: #%u\n", mcq-&gt;cqn);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int hws_send_ring_alloc_cq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				  int numa_node,</div><div class='ctx'> 				  struct mlx5hws_send_engine *queue,</div><div class='hunk'>@@ -776,7 +895,6 @@ static int hws_send_ring_alloc_cq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	mcq-&gt;cqe_sz = 64;</div><div class='ctx'> 	mcq-&gt;set_ci_db = cq-&gt;wq_ctrl.db.db;</div><div class='ctx'> 	mcq-&gt;arm_db = cq-&gt;wq_ctrl.db.db + 1;</div><div class='del'>-	mcq-&gt;comp = hws_cq_complete;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; mlx5_cqwq_get_size(&amp;cq-&gt;wq); i++) {</div><div class='ctx'> 		cqe = mlx5_cqwq_get_wqe(&amp;cq-&gt;wq, i);</div><div class='hunk'>@@ -815,7 +933,7 @@ static int hws_send_ring_create_cq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				  (__be64 *)MLX5_ADDR_OF(create_cq_in, in, pas));</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(cqc, cqc, c_eqn_or_apu_element, eqn);</div><div class='del'>-	MLX5_SET(cqc, cqc, uar_page, mdev-&gt;priv.uar-&gt;index);</div><div class='add'>+	MLX5_SET(cqc, cqc, uar_page, mdev-&gt;priv.bfreg.up-&gt;index);</div><div class='ctx'> 	MLX5_SET(cqc, cqc, log_page_size, cq-&gt;wq_ctrl.buf.page_shift - MLX5_ADAPTER_PAGE_SHIFT);</div><div class='ctx'> 	MLX5_SET64(cqc, cqc, dbr_addr, cq-&gt;wq_ctrl.db.dma);</div><div class='ctx'> </div><div class='hunk'>@@ -838,8 +956,7 @@ static int hws_send_ring_open_cq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	if (!cqc_data)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	MLX5_SET(cqc, cqc_data, uar_page, mdev-&gt;priv.uar-&gt;index);</div><div class='del'>-	MLX5_SET(cqc, cqc_data, cqe_sz, queue-&gt;num_entries);</div><div class='add'>+	MLX5_SET(cqc, cqc_data, uar_page, mdev-&gt;priv.bfreg.up-&gt;index);</div><div class='ctx'> 	MLX5_SET(cqc, cqc_data, log_cq_size, ilog2(queue-&gt;num_entries));</div><div class='ctx'> </div><div class='ctx'> 	err = hws_send_ring_alloc_cq(mdev, numa_node, queue, cqc_data, cq);</div><div class='hunk'>@@ -896,15 +1013,18 @@ close_cq:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlx5hws_send_queue_close(struct mlx5hws_send_engine *queue)</div><div class='add'>+static void mlx5hws_send_queue_close(struct mlx5hws_send_engine *queue)</div><div class='ctx'> {</div><div class='add'>+	if (!queue-&gt;num_entries)</div><div class='add'>+		return; /* this queue wasn't initialized */</div><div class='add'>+</div><div class='ctx'> 	hws_send_ring_close(queue);</div><div class='ctx'> 	kfree(queue-&gt;completed.entries);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5hws_send_queue_open(struct mlx5hws_context *ctx,</div><div class='del'>-			    struct mlx5hws_send_engine *queue,</div><div class='del'>-			    u16 queue_size)</div><div class='add'>+static int mlx5hws_send_queue_open(struct mlx5hws_context *ctx,</div><div class='add'>+				   struct mlx5hws_send_engine *queue,</div><div class='add'>+				   u16 queue_size)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -990,6 +1110,7 @@ static int hws_bwc_send_queues_init(struct mlx5hws_context *ctx)</div><div class='ctx'> 	for (i = 0; i &lt; bwc_queues; i++) {</div><div class='ctx'> 		mutex_init(&amp;ctx-&gt;bwc_send_queue_locks[i]);</div><div class='ctx'> 		lockdep_register_key(ctx-&gt;bwc_lock_class_keys + i);</div><div class='add'>+		lockdep_set_class(ctx-&gt;bwc_send_queue_locks + i, ctx-&gt;bwc_lock_class_keys + i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1004,7 +1125,7 @@ int mlx5hws_send_queues_open(struct mlx5hws_context *ctx,</div><div class='ctx'> 			     u16 queue_size)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='del'>-	u32 i;</div><div class='add'>+	int i = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Open one extra queue for control path */</div><div class='ctx'> 	ctx-&gt;queues = queues + 1;</div><div class='hunk'>@@ -1020,7 +1141,13 @@ int mlx5hws_send_queues_open(struct mlx5hws_context *ctx,</div><div class='ctx'> 		goto free_bwc_locks;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ctx-&gt;queues; i++) {</div><div class='add'>+	/* If native API isn't supported, skip the unused native queues:</div><div class='add'>+	 * initialize BWC queues and control queue only.</div><div class='add'>+	 */</div><div class='add'>+	if (!mlx5hws_context_native_supported(ctx))</div><div class='add'>+		i = mlx5hws_bwc_get_queue_id(ctx, 0);</div><div class='add'>+</div><div class='add'>+	for (; i &lt; ctx-&gt;queues; i++) {</div><div class='ctx'> 		err = mlx5hws_send_queue_open(ctx, &amp;ctx-&gt;send_queue[i], queue_size);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto close_send_queues;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.h<br/>index b50825d6dc53..3fb8e99309b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_send.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.h</a></div><div class='hunk'>@@ -140,6 +140,7 @@ struct mlx5hws_send_engine {</div><div class='ctx'> 	u16 used_entries;</div><div class='ctx'> 	u16 num_entries;</div><div class='ctx'> 	bool err;</div><div class='add'>+	bool error_cqe_printed;</div><div class='ctx'> 	struct mutex lock; /* Protects the send engine */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -189,12 +190,6 @@ void mlx5hws_send_abort_new_dep_wqe(struct mlx5hws_send_engine *queue);</div><div class='ctx'> </div><div class='ctx'> void mlx5hws_send_all_dep_wqe(struct mlx5hws_send_engine *queue);</div><div class='ctx'> </div><div class='del'>-void mlx5hws_send_queue_close(struct mlx5hws_send_engine *queue);</div><div class='del'>-</div><div class='del'>-int mlx5hws_send_queue_open(struct mlx5hws_context *ctx,</div><div class='del'>-			    struct mlx5hws_send_engine *queue,</div><div class='del'>-			    u16 queue_size);</div><div class='del'>-</div><div class='ctx'> void mlx5hws_send_queues_close(struct mlx5hws_context *ctx);</div><div class='ctx'> </div><div class='ctx'> int mlx5hws_send_queues_open(struct mlx5hws_context *ctx,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_table.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c<br/>index 8c063a8d87d7..6113383ae47b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_table.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_table.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> u32 mlx5hws_table_get_id(struct mlx5hws_table *tbl)</div><div class='ctx'> {</div><div class='hunk'>@@ -9,6 +9,7 @@ u32 mlx5hws_table_get_id(struct mlx5hws_table *tbl)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hws_table_init_next_ft_attr(struct mlx5hws_table *tbl,</div><div class='add'>+					u16 uid,</div><div class='ctx'> 					struct mlx5hws_cmd_ft_create_attr *ft_attr)</div><div class='ctx'> {</div><div class='ctx'> 	ft_attr-&gt;type = tbl-&gt;fw_ft_type;</div><div class='hunk'>@@ -16,7 +17,9 @@ static void hws_table_init_next_ft_attr(struct mlx5hws_table *tbl,</div><div class='ctx'> 		ft_attr-&gt;level = tbl-&gt;ctx-&gt;caps-&gt;fdb_ft.max_level - 1;</div><div class='ctx'> 	else</div><div class='ctx'> 		ft_attr-&gt;level = tbl-&gt;ctx-&gt;caps-&gt;nic_ft.max_level - 1;</div><div class='add'>+</div><div class='ctx'> 	ft_attr-&gt;rtc_valid = true;</div><div class='add'>+	ft_attr-&gt;uid = uid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void hws_table_set_cap_attr(struct mlx5hws_table *tbl,</div><div class='hunk'>@@ -37,6 +40,7 @@ static void hws_table_set_cap_attr(struct mlx5hws_table *tbl,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hws_table_up_default_fdb_miss_tbl(struct mlx5hws_table *tbl)</div><div class='add'>+__must_hold(&amp;tbl-&gt;ctx-&gt;ctrl_lock)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_cmd_ft_create_attr ft_attr = {0};</div><div class='ctx'> 	struct mlx5hws_cmd_set_fte_attr fte_attr = {0};</div><div class='hunk'>@@ -48,8 +52,8 @@ static int hws_table_up_default_fdb_miss_tbl(struct mlx5hws_table *tbl)</div><div class='ctx'> 	if (tbl-&gt;type != MLX5HWS_TABLE_TYPE_FDB)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (ctx-&gt;common_res[tbl_type].default_miss) {</div><div class='del'>-		ctx-&gt;common_res[tbl_type].default_miss-&gt;refcount++;</div><div class='add'>+	if (ctx-&gt;common_res.default_miss) {</div><div class='add'>+		ctx-&gt;common_res.default_miss-&gt;refcount++;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -70,29 +74,28 @@ static int hws_table_up_default_fdb_miss_tbl(struct mlx5hws_table *tbl)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* ctx-&gt;ctrl_lock must be held here */</div><div class='del'>-	ctx-&gt;common_res[tbl_type].default_miss = default_miss;</div><div class='del'>-	ctx-&gt;common_res[tbl_type].default_miss-&gt;refcount++;</div><div class='add'>+	ctx-&gt;common_res.default_miss = default_miss;</div><div class='add'>+	ctx-&gt;common_res.default_miss-&gt;refcount++;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Called under ctx-&gt;ctrl_lock */</div><div class='ctx'> static void hws_table_down_default_fdb_miss_tbl(struct mlx5hws_table *tbl)</div><div class='add'>+__must_hold(&amp;tbl-&gt;ctx-&gt;ctrl_lock)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_cmd_forward_tbl *default_miss;</div><div class='ctx'> 	struct mlx5hws_context *ctx = tbl-&gt;ctx;</div><div class='del'>-	u8 tbl_type = tbl-&gt;type;</div><div class='ctx'> </div><div class='ctx'> 	if (tbl-&gt;type != MLX5HWS_TABLE_TYPE_FDB)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	default_miss = ctx-&gt;common_res[tbl_type].default_miss;</div><div class='add'>+	default_miss = ctx-&gt;common_res.default_miss;</div><div class='ctx'> 	if (--default_miss-&gt;refcount)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mlx5hws_cmd_forward_tbl_destroy(ctx-&gt;mdev, default_miss);</div><div class='del'>-	ctx-&gt;common_res[tbl_type].default_miss = NULL;</div><div class='add'>+	ctx-&gt;common_res.default_miss = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int hws_table_connect_to_default_miss_tbl(struct mlx5hws_table *tbl, u32 ft_id)</div><div class='hunk'>@@ -119,12 +122,12 @@ static int hws_table_connect_to_default_miss_tbl(struct mlx5hws_table *tbl, u32</div><div class='ctx'> </div><div class='ctx'> int mlx5hws_table_create_default_ft(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				    struct mlx5hws_table *tbl,</div><div class='del'>-				    u32 *ft_id)</div><div class='add'>+				    u16 uid, u32 *ft_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_cmd_ft_create_attr ft_attr = {0};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	hws_table_init_next_ft_attr(tbl, &amp;ft_attr);</div><div class='add'>+	hws_table_init_next_ft_attr(tbl, uid, &amp;ft_attr);</div><div class='ctx'> 	hws_table_set_cap_attr(tbl, &amp;ft_attr);</div><div class='ctx'> </div><div class='ctx'> 	ret = mlx5hws_cmd_flow_table_create(mdev, &amp;ft_attr, ft_id);</div><div class='hunk'>@@ -189,7 +192,10 @@ static int hws_table_init(struct mlx5hws_table *tbl)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ctx-&gt;ctrl_lock);</div><div class='del'>-	ret = mlx5hws_table_create_default_ft(tbl-&gt;ctx-&gt;mdev, tbl, &amp;tbl-&gt;ft_id);</div><div class='add'>+	ret = mlx5hws_table_create_default_ft(tbl-&gt;ctx-&gt;mdev,</div><div class='add'>+					      tbl,</div><div class='add'>+					      tbl-&gt;uid,</div><div class='add'>+					      &amp;tbl-&gt;ft_id);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		mlx5hws_err(tbl-&gt;ctx, "Failed to create flow table object\n");</div><div class='ctx'> 		mutex_unlock(&amp;ctx-&gt;ctrl_lock);</div><div class='hunk'>@@ -239,6 +245,7 @@ struct mlx5hws_table *mlx5hws_table_create(struct mlx5hws_context *ctx,</div><div class='ctx'> 	tbl-&gt;ctx = ctx;</div><div class='ctx'> 	tbl-&gt;type = attr-&gt;type;</div><div class='ctx'> 	tbl-&gt;level = attr-&gt;level;</div><div class='add'>+	tbl-&gt;uid = attr-&gt;uid;</div><div class='ctx'> </div><div class='ctx'> 	ret = hws_table_init(tbl);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -342,10 +349,10 @@ int mlx5hws_table_ft_set_next_rtc(struct mlx5hws_context *ctx,</div><div class='ctx'> 	return mlx5hws_cmd_flow_table_modify(ctx-&gt;mdev, &amp;ft_attr, ft_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hws_table_ft_set_next_ft(struct mlx5hws_context *ctx,</div><div class='del'>-				    u32 ft_id,</div><div class='del'>-				    u32 fw_ft_type,</div><div class='del'>-				    u32 next_ft_id)</div><div class='add'>+int mlx5hws_table_ft_set_next_ft(struct mlx5hws_context *ctx,</div><div class='add'>+				 u32 ft_id,</div><div class='add'>+				 u32 fw_ft_type,</div><div class='add'>+				 u32 next_ft_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlx5hws_cmd_ft_modify_attr ft_attr = {0};</div><div class='ctx'> </div><div class='hunk'>@@ -389,10 +396,10 @@ int mlx5hws_table_connect_to_miss_table(struct mlx5hws_table *src_tbl,</div><div class='ctx'> 	if (dst_tbl) {</div><div class='ctx'> 		if (list_empty(&amp;dst_tbl-&gt;matchers_list)) {</div><div class='ctx'> 			/* Connect src_tbl last_ft to dst_tbl start anchor */</div><div class='del'>-			ret = hws_table_ft_set_next_ft(src_tbl-&gt;ctx,</div><div class='del'>-						       last_ft_id,</div><div class='del'>-						       src_tbl-&gt;fw_ft_type,</div><div class='del'>-						       dst_tbl-&gt;ft_id);</div><div class='add'>+			ret = mlx5hws_table_ft_set_next_ft(src_tbl-&gt;ctx,</div><div class='add'>+							   last_ft_id,</div><div class='add'>+							   src_tbl-&gt;fw_ft_type,</div><div class='add'>+							   dst_tbl-&gt;ft_id);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -478,15 +485,9 @@ int mlx5hws_table_set_default_miss(struct mlx5hws_table *tbl,</div><div class='ctx'> 	if (old_miss_tbl)</div><div class='ctx'> 		list_del_init(&amp;tbl-&gt;default_miss.next);</div><div class='ctx'> </div><div class='del'>-	old_miss_tbl = tbl-&gt;default_miss.miss_tbl;</div><div class='del'>-	if (old_miss_tbl)</div><div class='del'>-		list_del_init(&amp;old_miss_tbl-&gt;default_miss.head);</div><div class='del'>-</div><div class='ctx'> 	if (miss_tbl)</div><div class='ctx'> 		list_add(&amp;tbl-&gt;default_miss.next, &amp;miss_tbl-&gt;default_miss.head);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;ctx-&gt;ctrl_lock);</div><div class='del'>-	return 0;</div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;ctx-&gt;ctrl_lock);</div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_table.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.h<br/>index dd50420eec9e..1246f9bd8422 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_table.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_table.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.h</a></div><div class='hunk'>@@ -18,6 +18,7 @@ struct mlx5hws_table {</div><div class='ctx'> 	enum mlx5hws_table_type type;</div><div class='ctx'> 	u32 fw_ft_type;</div><div class='ctx'> 	u32 level;</div><div class='add'>+	u16 uid;</div><div class='ctx'> 	struct list_head matchers_list;</div><div class='ctx'> 	struct list_head tbl_list_node;</div><div class='ctx'> 	struct mlx5hws_default_miss default_miss;</div><div class='hunk'>@@ -47,7 +48,7 @@ u32 mlx5hws_table_get_res_fw_ft_type(enum mlx5hws_table_type tbl_type,</div><div class='ctx'> </div><div class='ctx'> int mlx5hws_table_create_default_ft(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				    struct mlx5hws_table *tbl,</div><div class='del'>-				    u32 *ft_id);</div><div class='add'>+				    u16 uid, u32 *ft_id);</div><div class='ctx'> </div><div class='ctx'> void mlx5hws_table_destroy_default_ft(struct mlx5hws_table *tbl,</div><div class='ctx'> 				      u32 ft_id);</div><div class='hunk'>@@ -65,4 +66,9 @@ int mlx5hws_table_ft_set_next_rtc(struct mlx5hws_context *ctx,</div><div class='ctx'> 				  u32 rtc_0_id,</div><div class='ctx'> 				  u32 rtc_1_id);</div><div class='ctx'> </div><div class='add'>+int mlx5hws_table_ft_set_next_ft(struct mlx5hws_context *ctx,</div><div class='add'>+				 u32 ft_id,</div><div class='add'>+				 u32 fw_ft_type,</div><div class='add'>+				 u32 next_ft_id);</div><div class='add'>+</div><div class='ctx'> #endif /* MLX5HWS_TABLE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_vport.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.c<br/>index faf42421c43f..d8e382b9fa61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_vport.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_vport.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='ctx'> /* Copyright (c) 2024 NVIDIA Corporation &amp; Affiliates */</div><div class='ctx'> </div><div class='del'>-#include "mlx5hws_internal.h"</div><div class='add'>+#include "internal.h"</div><div class='ctx'> </div><div class='ctx'> int mlx5hws_vport_init_vports(struct mlx5hws_context *ctx)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_vport.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.h<br/>index 0912fc166b3a..0912fc166b3a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_vport.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws_vport.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.h</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_action.c<br/>index 2ebb61ef3ea9..2ebb61ef3ea9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_action.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_action.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_arg.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_arg.c<br/>index 01ed6442095d..01ed6442095d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_arg.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_arg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_arg.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_arg.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_buddy.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_buddy.c<br/>index fe228d948b47..fe228d948b47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_buddy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_buddy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_buddy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_buddy.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c<br/>index baefb9a3fa05..1ebb2b15c080 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Copyright (c) 2019 Mellanox Technologies. */</div><div class='ctx'> </div><div class='ctx'> #include "dr_types.h"</div><div class='add'>+#include "eswitch.h"</div><div class='ctx'> </div><div class='ctx'> int mlx5dr_cmd_query_esw_vport_context(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				       bool other_vport,</div><div class='hunk'>@@ -34,34 +35,21 @@ int mlx5dr_cmd_query_esw_vport_context(struct mlx5_core_dev *mdev,</div><div class='ctx'> int mlx5dr_cmd_query_gvmi(struct mlx5_core_dev *mdev, bool other_vport,</div><div class='ctx'> 			  u16 vport_number, u16 *gvmi)</div><div class='ctx'> {</div><div class='del'>-	bool ec_vf_func = other_vport ? mlx5_core_is_ec_vf_vport(mdev, vport_number) : false;</div><div class='del'>-	u32 in[MLX5_ST_SZ_DW(query_hca_cap_in)] = {};</div><div class='del'>-	int out_size;</div><div class='del'>-	void *out;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	out_size = MLX5_ST_SZ_BYTES(query_hca_cap_out);</div><div class='del'>-	out = kzalloc(out_size, GFP_KERNEL);</div><div class='del'>-	if (!out)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, other_function, other_vport);</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, function_id, mlx5_vport_to_func_id(mdev, vport_number, ec_vf_func));</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, ec_vf_function, ec_vf_func);</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, op_mod,</div><div class='del'>-		 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE &lt;&lt; 1 |</div><div class='del'>-		 HCA_CAP_OPMOD_GET_CUR);</div><div class='add'>+	if (!other_vport) {</div><div class='add'>+		/* self vhca_id */</div><div class='add'>+		*gvmi = MLX5_CAP_GEN(mdev, vhca_id);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	err = mlx5_cmd_exec_inout(mdev, query_hca_cap, in, out);</div><div class='add'>+	err = mlx5_vport_get_vhca_id(mdev, vport_number, gvmi);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		kfree(out);</div><div class='add'>+		mlx5_core_err(mdev, "Failed to get vport vhca id for vport %d\n",</div><div class='add'>+			      vport_number);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*gvmi = MLX5_GET(query_hca_cap_out, out, capability.cmd_hca_cap.vhca_id);</div><div class='del'>-</div><div class='del'>-	kfree(out);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.c<br/>index 030a5776c937..030a5776c937 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.h<br/>index 57c6b363b870..57c6b363b870 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_dbg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.h</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_definer.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_definer.c<br/>index d5ea97751945..d5ea97751945 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_definer.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_definer.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_definer.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_definer.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_domain.c<br/>index 3d74109f8230..e8c67ed9f748 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_domain.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_domain.c</a></div><div class='hunk'>@@ -8,7 +8,7 @@</div><div class='ctx'> #define DR_DOMAIN_SW_STEERING_SUPPORTED(dmn, dmn_type)	\</div><div class='ctx'> 	((dmn)-&gt;info.caps.dmn_type##_sw_owner ||	\</div><div class='ctx'> 	 ((dmn)-&gt;info.caps.dmn_type##_sw_owner_v2 &amp;&amp;	\</div><div class='del'>-	  (dmn)-&gt;info.caps.sw_format_ver &lt;= MLX5_STEERING_FORMAT_CONNECTX_7))</div><div class='add'>+	  (dmn)-&gt;info.caps.sw_format_ver &lt;= MLX5_STEERING_FORMAT_CONNECTX_8))</div><div class='ctx'> </div><div class='ctx'> bool mlx5dr_domain_is_support_ptrn_arg(struct mlx5dr_domain *dmn)</div><div class='ctx'> {</div><div class='hunk'>@@ -297,7 +297,9 @@ dr_domain_add_vport_cap(struct mlx5dr_domain *dmn, u16 vport)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		mlx5dr_dbg(dmn, "Couldn't insert new vport into xarray (%d)\n", ret);</div><div class='ctx'> 		kvfree(vport_caps);</div><div class='del'>-		return ERR_PTR(ret);</div><div class='add'>+		if (ret == -EBUSY)</div><div class='add'>+			return ERR_PTR(-EBUSY);</div><div class='add'>+		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return vport_caps;</div><div class='hunk'>@@ -408,7 +410,7 @@ static int dr_domain_caps_init(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	switch (dmn-&gt;type) {</div><div class='ctx'> 	case MLX5DR_DOMAIN_TYPE_NIC_RX:</div><div class='ctx'> 		if (!DR_DOMAIN_SW_STEERING_SUPPORTED(dmn, rx))</div><div class='del'>-			return -ENOTSUPP;</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 		dmn-&gt;info.supp_sw_steering = true;</div><div class='ctx'> 		dmn-&gt;info.rx.type = DR_DOMAIN_NIC_TYPE_RX;</div><div class='hunk'>@@ -417,7 +419,7 @@ static int dr_domain_caps_init(struct mlx5_core_dev *mdev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5DR_DOMAIN_TYPE_NIC_TX:</div><div class='ctx'> 		if (!DR_DOMAIN_SW_STEERING_SUPPORTED(dmn, tx))</div><div class='del'>-			return -ENOTSUPP;</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 		dmn-&gt;info.supp_sw_steering = true;</div><div class='ctx'> 		dmn-&gt;info.tx.type = DR_DOMAIN_NIC_TYPE_TX;</div><div class='hunk'>@@ -426,10 +428,10 @@ static int dr_domain_caps_init(struct mlx5_core_dev *mdev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MLX5DR_DOMAIN_TYPE_FDB:</div><div class='ctx'> 		if (!dmn-&gt;info.caps.eswitch_manager)</div><div class='del'>-			return -ENOTSUPP;</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 		if (!DR_DOMAIN_SW_STEERING_SUPPORTED(dmn, fdb))</div><div class='del'>-			return -ENOTSUPP;</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 		dmn-&gt;info.rx.type = DR_DOMAIN_NIC_TYPE_RX;</div><div class='ctx'> 		dmn-&gt;info.tx.type = DR_DOMAIN_NIC_TYPE_TX;</div><div class='hunk'>@@ -514,30 +516,6 @@ def_xa_destroy:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Assure synchronization of the device steering tables with updates made by SW</div><div class='del'>- * insertion.</div><div class='del'>- */</div><div class='del'>-int mlx5dr_domain_sync(struct mlx5dr_domain *dmn, u32 flags)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (flags &amp; MLX5DR_DOMAIN_SYNC_FLAGS_SW) {</div><div class='del'>-		mlx5dr_domain_lock(dmn);</div><div class='del'>-		ret = mlx5dr_send_ring_force_drain(dmn);</div><div class='del'>-		mlx5dr_domain_unlock(dmn);</div><div class='del'>-		if (ret) {</div><div class='del'>-			mlx5dr_err(dmn, "Force drain failed flags: %d, ret: %d\n",</div><div class='del'>-				   flags, ret);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (flags &amp; MLX5DR_DOMAIN_SYNC_FLAGS_HW)</div><div class='del'>-		ret = mlx5dr_cmd_sync_steering(dmn-&gt;mdev);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int mlx5dr_domain_destroy(struct mlx5dr_domain *dmn)</div><div class='ctx'> {</div><div class='ctx'> 	if (WARN_ON_ONCE(refcount_read(&amp;dmn-&gt;refcount) &gt; 1))</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_fw.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_fw.c<br/>index f05ef0cd54ba..f05ef0cd54ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_fw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_fw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_fw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_fw.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_icm_pool.c<br/>index 0b5af9f3f605..0b5af9f3f605 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_icm_pool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_icm_pool.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_matcher.c<br/>index 0726848eb3ff..0726848eb3ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_matcher.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_matcher.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ptrn.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ptrn.c<br/>index 8ca534ef5d03..8ca534ef5d03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ptrn.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ptrn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ptrn.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ptrn.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_rule.c<br/>index d1db04baa1fa..d1db04baa1fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_rule.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_rule.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_send.c<br/>index 6fa06ba2d346..d034372fa047 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_send.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_send.c</a></div><div class='hunk'>@@ -1049,12 +1049,6 @@ static int dr_prepare_qp_to_rts(struct mlx5dr_domain *dmn)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dr_cq_complete(struct mlx5_core_cq *mcq,</div><div class='del'>-			   struct mlx5_eqe *eqe)</div><div class='del'>-{</div><div class='del'>-	pr_err("CQ completion CQ: #%u\n", mcq-&gt;cqn);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static struct mlx5dr_cq *dr_create_cq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 				      struct mlx5_uars_page *uar,</div><div class='ctx'> 				      size_t ncqe)</div><div class='hunk'>@@ -1067,7 +1061,6 @@ static struct mlx5dr_cq *dr_create_cq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	int inlen, err, eqn;</div><div class='ctx'> 	void *cqc, *in;</div><div class='ctx'> 	__be64 *pas;</div><div class='del'>-	int vector;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	cq = kzalloc(sizeof(*cq), GFP_KERNEL);</div><div class='hunk'>@@ -1090,14 +1083,20 @@ static struct mlx5dr_cq *dr_create_cq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 		cqe-&gt;op_own = MLX5_CQE_INVALID &lt;&lt; 4 | MLX5_CQE_OWNER_MASK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	cq-&gt;mcq.cqe_sz = 64;</div><div class='add'>+	cq-&gt;mcq.set_ci_db = cq-&gt;wq_ctrl.db.db;</div><div class='add'>+	cq-&gt;mcq.arm_db = cq-&gt;wq_ctrl.db.db + 1;</div><div class='add'>+	*cq-&gt;mcq.set_ci_db = 0;</div><div class='add'>+	cq-&gt;mcq.vector = 0;</div><div class='add'>+	cq-&gt;mdev = mdev;</div><div class='add'>+</div><div class='ctx'> 	inlen = MLX5_ST_SZ_BYTES(create_cq_in) +</div><div class='ctx'> 		sizeof(u64) * cq-&gt;wq_ctrl.buf.npages;</div><div class='ctx'> 	in = kvzalloc(inlen, GFP_KERNEL);</div><div class='ctx'> 	if (!in)</div><div class='ctx'> 		goto err_cqwq;</div><div class='ctx'> </div><div class='del'>-	vector = raw_smp_processor_id() % mlx5_comp_vectors_max(mdev);</div><div class='del'>-	err = mlx5_comp_eqn_get(mdev, vector, &amp;eqn);</div><div class='add'>+	err = mlx5_comp_eqn_get(mdev, 0, &amp;eqn);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		kvfree(in);</div><div class='ctx'> 		goto err_cqwq;</div><div class='hunk'>@@ -1114,28 +1113,12 @@ static struct mlx5dr_cq *dr_create_cq(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	pas = (__be64 *)MLX5_ADDR_OF(create_cq_in, in, pas);</div><div class='ctx'> 	mlx5_fill_page_frag_array(&amp;cq-&gt;wq_ctrl.buf, pas);</div><div class='ctx'> </div><div class='del'>-	cq-&gt;mcq.comp  = dr_cq_complete;</div><div class='del'>-</div><div class='ctx'> 	err = mlx5_core_create_cq(mdev, &amp;cq-&gt;mcq, in, inlen, out, sizeof(out));</div><div class='ctx'> 	kvfree(in);</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_cqwq;</div><div class='ctx'> </div><div class='del'>-	cq-&gt;mcq.cqe_sz = 64;</div><div class='del'>-	cq-&gt;mcq.set_ci_db = cq-&gt;wq_ctrl.db.db;</div><div class='del'>-	cq-&gt;mcq.arm_db = cq-&gt;wq_ctrl.db.db + 1;</div><div class='del'>-	*cq-&gt;mcq.set_ci_db = 0;</div><div class='del'>-</div><div class='del'>-	/* set no-zero value, in order to avoid the HW to run db-recovery on</div><div class='del'>-	 * CQ that used in polling mode.</div><div class='del'>-	 */</div><div class='del'>-	*cq-&gt;mcq.arm_db = cpu_to_be32(2 &lt;&lt; 28);</div><div class='del'>-</div><div class='del'>-	cq-&gt;mcq.vector = 0;</div><div class='del'>-	cq-&gt;mcq.uar = uar;</div><div class='del'>-	cq-&gt;mdev = mdev;</div><div class='del'>-</div><div class='ctx'> 	return cq;</div><div class='ctx'> </div><div class='ctx'> err_cqwq:</div><div class='hunk'>@@ -1333,36 +1316,3 @@ void mlx5dr_send_ring_free(struct mlx5dr_domain *dmn,</div><div class='ctx'> 	kfree(send_ring-&gt;sync_buff);</div><div class='ctx'> 	kfree(send_ring);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-int mlx5dr_send_ring_force_drain(struct mlx5dr_domain *dmn)</div><div class='del'>-{</div><div class='del'>-	struct mlx5dr_send_ring *send_ring = dmn-&gt;send_ring;</div><div class='del'>-	struct postsend_info send_info = {};</div><div class='del'>-	u8 data[DR_STE_SIZE];</div><div class='del'>-	int num_of_sends_req;</div><div class='del'>-	int ret;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Sending this amount of requests makes sure we will get drain */</div><div class='del'>-	num_of_sends_req = send_ring-&gt;signal_th * TH_NUMS_TO_DRAIN / 2;</div><div class='del'>-</div><div class='del'>-	/* Send fake requests forcing the last to be signaled */</div><div class='del'>-	send_info.write.addr = (uintptr_t)data;</div><div class='del'>-	send_info.write.length = DR_STE_SIZE;</div><div class='del'>-	send_info.write.lkey = 0;</div><div class='del'>-	/* Using the sync_mr in order to write/read */</div><div class='del'>-	send_info.remote_addr = (uintptr_t)send_ring-&gt;sync_mr-&gt;addr;</div><div class='del'>-	send_info.rkey = send_ring-&gt;sync_mr-&gt;mkey;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; num_of_sends_req; i++) {</div><div class='del'>-		ret = dr_postsend_icm_data(dmn, &amp;send_info);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;send_ring-&gt;lock);</div><div class='del'>-	ret = dr_handle_pending_wc(dmn, send_ring);</div><div class='del'>-	spin_unlock(&amp;send_ring-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.c<br/>index e94fbb015efa..c8b8ff80c7c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.c</a></div><div class='hunk'>@@ -555,7 +555,7 @@ void mlx5dr_ste_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx,</div><div class='ctx'> 			       struct mlx5dr_ste_actions_attr *attr,</div><div class='ctx'> 			       u32 *added_stes)</div><div class='ctx'> {</div><div class='del'>-	ste_ctx-&gt;set_actions_tx(dmn, action_type_set, ste_ctx-&gt;actions_caps,</div><div class='add'>+	ste_ctx-&gt;set_actions_tx(ste_ctx, dmn, action_type_set, ste_ctx-&gt;actions_caps,</div><div class='ctx'> 				hw_ste_arr, attr, added_stes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -566,7 +566,7 @@ void mlx5dr_ste_set_actions_rx(struct mlx5dr_ste_ctx *ste_ctx,</div><div class='ctx'> 			       struct mlx5dr_ste_actions_attr *attr,</div><div class='ctx'> 			       u32 *added_stes)</div><div class='ctx'> {</div><div class='del'>-	ste_ctx-&gt;set_actions_rx(dmn, action_type_set, ste_ctx-&gt;actions_caps,</div><div class='add'>+	ste_ctx-&gt;set_actions_rx(ste_ctx, dmn, action_type_set, ste_ctx-&gt;actions_caps,</div><div class='ctx'> 				hw_ste_arr, attr, added_stes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1458,6 +1458,8 @@ struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx(u8 version)</div><div class='ctx'> 		return mlx5dr_ste_get_ctx_v1();</div><div class='ctx'> 	else if (version == MLX5_STEERING_FORMAT_CONNECTX_7)</div><div class='ctx'> 		return mlx5dr_ste_get_ctx_v2();</div><div class='add'>+	else if (version == MLX5_STEERING_FORMAT_CONNECTX_8)</div><div class='add'>+		return mlx5dr_ste_get_ctx_v3();</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.h<br/>index 54a6619c3ecb..3d5afc832fa5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.h</a></div><div class='hunk'>@@ -160,13 +160,15 @@ struct mlx5dr_ste_ctx {</div><div class='ctx'> </div><div class='ctx'> 	/* Actions */</div><div class='ctx'> 	u32 actions_caps;</div><div class='del'>-	void (*set_actions_rx)(struct mlx5dr_domain *dmn,</div><div class='add'>+	void (*set_actions_rx)(struct mlx5dr_ste_ctx *ste_ctx,</div><div class='add'>+			       struct mlx5dr_domain *dmn,</div><div class='ctx'> 			       u8 *action_type_set,</div><div class='ctx'> 			       u32 actions_caps,</div><div class='ctx'> 			       u8 *hw_ste_arr,</div><div class='ctx'> 			       struct mlx5dr_ste_actions_attr *attr,</div><div class='ctx'> 			       u32 *added_stes);</div><div class='del'>-	void (*set_actions_tx)(struct mlx5dr_domain *dmn,</div><div class='add'>+	void (*set_actions_tx)(struct mlx5dr_ste_ctx *ste_ctx,</div><div class='add'>+			       struct mlx5dr_domain *dmn,</div><div class='ctx'> 			       u8 *action_type_set,</div><div class='ctx'> 			       u32 actions_caps,</div><div class='ctx'> 			       u8 *hw_ste_arr,</div><div class='hunk'>@@ -197,7 +199,21 @@ struct mlx5dr_ste_ctx {</div><div class='ctx'> 					u16 *used_hw_action_num);</div><div class='ctx'> 	int (*alloc_modify_hdr_chunk)(struct mlx5dr_action *action);</div><div class='ctx'> 	void (*dealloc_modify_hdr_chunk)(struct mlx5dr_action *action);</div><div class='del'>-</div><div class='add'>+	/* Actions bit set */</div><div class='add'>+	void (*set_encap)(u8 *hw_ste_p, u8 *d_action,</div><div class='add'>+			  u32 reformat_id, int size);</div><div class='add'>+	void (*set_push_vlan)(u8 *ste, u8 *d_action,</div><div class='add'>+			      u32 vlan_hdr);</div><div class='add'>+	void (*set_pop_vlan)(u8 *hw_ste_p, u8 *s_action,</div><div class='add'>+			     u8 vlans_num);</div><div class='add'>+	void (*set_rx_decap)(u8 *hw_ste_p, u8 *s_action);</div><div class='add'>+	void (*set_encap_l3)(u8 *hw_ste_p, u8 *frst_s_action,</div><div class='add'>+			     u8 *scnd_d_action, u32 reformat_id,</div><div class='add'>+			     int size);</div><div class='add'>+	void (*set_insert_hdr)(u8 *hw_ste_p, u8 *d_action, u32 reformat_id,</div><div class='add'>+			       u8 anchor, u8 offset, int size);</div><div class='add'>+	void (*set_remove_hdr)(u8 *hw_ste_p, u8 *s_action, u8 anchor,</div><div class='add'>+			       u8 offset, int size);</div><div class='ctx'> 	/* Send */</div><div class='ctx'> 	void (*prepare_for_postsend)(u8 *hw_ste_p, u32 ste_size);</div><div class='ctx'> };</div><div class='hunk'>@@ -205,5 +221,6 @@ struct mlx5dr_ste_ctx {</div><div class='ctx'> struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx_v0(void);</div><div class='ctx'> struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx_v1(void);</div><div class='ctx'> struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx_v2(void);</div><div class='add'>+struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx_v3(void);</div><div class='ctx'> </div><div class='ctx'> #endif  /* _DR_STE_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v0.c<br/>index e9f6c7ed7a7b..42536bee55e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v0.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v0.c</a></div><div class='hunk'>@@ -406,7 +406,8 @@ static void dr_ste_v0_arr_init_next(u8 **last_ste,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-dr_ste_v0_set_actions_tx(struct mlx5dr_domain *dmn,</div><div class='add'>+dr_ste_v0_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx,</div><div class='add'>+			 struct mlx5dr_domain *dmn,</div><div class='ctx'> 			 u8 *action_type_set,</div><div class='ctx'> 			 u32 actions_caps,</div><div class='ctx'> 			 u8 *last_ste,</div><div class='hunk'>@@ -476,7 +477,8 @@ dr_ste_v0_set_actions_tx(struct mlx5dr_domain *dmn,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-dr_ste_v0_set_actions_rx(struct mlx5dr_domain *dmn,</div><div class='add'>+dr_ste_v0_set_actions_rx(struct mlx5dr_ste_ctx *ste_ctx,</div><div class='add'>+			 struct mlx5dr_domain *dmn,</div><div class='ctx'> 			 u8 *action_type_set,</div><div class='ctx'> 			 u32 actions_caps,</div><div class='ctx'> 			 u8 *last_ste,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.c<br/>index 1d49704b9542..6447efbae00d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.c</a></div><div class='hunk'>@@ -5,136 +5,6 @@</div><div class='ctx'> #include "mlx5_ifc_dr_ste_v1.h"</div><div class='ctx'> #include "dr_ste_v1.h"</div><div class='ctx'> </div><div class='del'>-#define DR_STE_CALC_DFNR_TYPE(lookup_type, inner) \</div><div class='del'>-	((inner) ? DR_STE_V1_LU_TYPE_##lookup_type##_I : \</div><div class='del'>-		   DR_STE_V1_LU_TYPE_##lookup_type##_O)</div><div class='del'>-</div><div class='del'>-enum dr_ste_v1_entry_format {</div><div class='del'>-	DR_STE_V1_TYPE_BWC_BYTE	= 0x0,</div><div class='del'>-	DR_STE_V1_TYPE_BWC_DW	= 0x1,</div><div class='del'>-	DR_STE_V1_TYPE_MATCH	= 0x2,</div><div class='del'>-	DR_STE_V1_TYPE_MATCH_RANGES = 0x7,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Lookup type is built from 2B: [ Definer mode 1B ][ Definer index 1B ] */</div><div class='del'>-enum {</div><div class='del'>-	DR_STE_V1_LU_TYPE_NOP				= 0x0000,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL2_TNL			= 0x0002,</div><div class='del'>-	DR_STE_V1_LU_TYPE_IBL3_EXT			= 0x0102,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL2_O			= 0x0003,</div><div class='del'>-	DR_STE_V1_LU_TYPE_IBL4				= 0x0103,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL2_I			= 0x0004,</div><div class='del'>-	DR_STE_V1_LU_TYPE_SRC_QP_GVMI			= 0x0104,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL2_SRC_O			= 0x0005,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL2_HEADERS_O		= 0x0105,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL2_SRC_I			= 0x0006,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL2_HEADERS_I		= 0x0106,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL3_IPV4_5_TUPLE_O		= 0x0007,</div><div class='del'>-	DR_STE_V1_LU_TYPE_IPV6_DES_O			= 0x0107,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL3_IPV4_5_TUPLE_I		= 0x0008,</div><div class='del'>-	DR_STE_V1_LU_TYPE_IPV6_DES_I			= 0x0108,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL4_O			= 0x0009,</div><div class='del'>-	DR_STE_V1_LU_TYPE_IPV6_SRC_O			= 0x0109,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL4_I			= 0x000a,</div><div class='del'>-	DR_STE_V1_LU_TYPE_IPV6_SRC_I			= 0x010a,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL2_SRC_DST_O		= 0x000b,</div><div class='del'>-	DR_STE_V1_LU_TYPE_MPLS_O			= 0x010b,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL2_SRC_DST_I		= 0x000c,</div><div class='del'>-	DR_STE_V1_LU_TYPE_MPLS_I			= 0x010c,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL3_IPV4_MISC_O		= 0x000d,</div><div class='del'>-	DR_STE_V1_LU_TYPE_GRE				= 0x010d,</div><div class='del'>-	DR_STE_V1_LU_TYPE_FLEX_PARSER_TNL_HEADER	= 0x000e,</div><div class='del'>-	DR_STE_V1_LU_TYPE_GENERAL_PURPOSE		= 0x010e,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL3_IPV4_MISC_I		= 0x000f,</div><div class='del'>-	DR_STE_V1_LU_TYPE_STEERING_REGISTERS_0		= 0x010f,</div><div class='del'>-	DR_STE_V1_LU_TYPE_STEERING_REGISTERS_1		= 0x0110,</div><div class='del'>-	DR_STE_V1_LU_TYPE_FLEX_PARSER_OK		= 0x0011,</div><div class='del'>-	DR_STE_V1_LU_TYPE_FLEX_PARSER_0			= 0x0111,</div><div class='del'>-	DR_STE_V1_LU_TYPE_FLEX_PARSER_1			= 0x0112,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL4_MISC_O			= 0x0113,</div><div class='del'>-	DR_STE_V1_LU_TYPE_ETHL4_MISC_I			= 0x0114,</div><div class='del'>-	DR_STE_V1_LU_TYPE_INVALID			= 0x00ff,</div><div class='del'>-	DR_STE_V1_LU_TYPE_DONT_CARE			= MLX5DR_STE_LU_TYPE_DONT_CARE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum dr_ste_v1_header_anchors {</div><div class='del'>-	DR_STE_HEADER_ANCHOR_START_OUTER		= 0x00,</div><div class='del'>-	DR_STE_HEADER_ANCHOR_1ST_VLAN			= 0x02,</div><div class='del'>-	DR_STE_HEADER_ANCHOR_IPV6_IPV4			= 0x07,</div><div class='del'>-	DR_STE_HEADER_ANCHOR_INNER_MAC			= 0x13,</div><div class='del'>-	DR_STE_HEADER_ANCHOR_INNER_IPV6_IPV4		= 0x19,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum dr_ste_v1_action_size {</div><div class='del'>-	DR_STE_ACTION_SINGLE_SZ = 4,</div><div class='del'>-	DR_STE_ACTION_DOUBLE_SZ = 8,</div><div class='del'>-	DR_STE_ACTION_TRIPLE_SZ = 12,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum dr_ste_v1_action_insert_ptr_attr {</div><div class='del'>-	DR_STE_V1_ACTION_INSERT_PTR_ATTR_NONE = 0,  /* Regular push header (e.g. push vlan) */</div><div class='del'>-	DR_STE_V1_ACTION_INSERT_PTR_ATTR_ENCAP = 1, /* Encapsulation / Tunneling */</div><div class='del'>-	DR_STE_V1_ACTION_INSERT_PTR_ATTR_ESP = 2,   /* IPsec */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum dr_ste_v1_action_id {</div><div class='del'>-	DR_STE_V1_ACTION_ID_NOP				= 0x00,</div><div class='del'>-	DR_STE_V1_ACTION_ID_COPY			= 0x05,</div><div class='del'>-	DR_STE_V1_ACTION_ID_SET				= 0x06,</div><div class='del'>-	DR_STE_V1_ACTION_ID_ADD				= 0x07,</div><div class='del'>-	DR_STE_V1_ACTION_ID_REMOVE_BY_SIZE		= 0x08,</div><div class='del'>-	DR_STE_V1_ACTION_ID_REMOVE_HEADER_TO_HEADER	= 0x09,</div><div class='del'>-	DR_STE_V1_ACTION_ID_INSERT_INLINE		= 0x0a,</div><div class='del'>-	DR_STE_V1_ACTION_ID_INSERT_POINTER		= 0x0b,</div><div class='del'>-	DR_STE_V1_ACTION_ID_FLOW_TAG			= 0x0c,</div><div class='del'>-	DR_STE_V1_ACTION_ID_QUEUE_ID_SEL		= 0x0d,</div><div class='del'>-	DR_STE_V1_ACTION_ID_ACCELERATED_LIST		= 0x0e,</div><div class='del'>-	DR_STE_V1_ACTION_ID_MODIFY_LIST			= 0x0f,</div><div class='del'>-	DR_STE_V1_ACTION_ID_ASO				= 0x12,</div><div class='del'>-	DR_STE_V1_ACTION_ID_TRAILER			= 0x13,</div><div class='del'>-	DR_STE_V1_ACTION_ID_COUNTER_ID			= 0x14,</div><div class='del'>-	DR_STE_V1_ACTION_ID_MAX				= 0x21,</div><div class='del'>-	/* use for special cases */</div><div class='del'>-	DR_STE_V1_ACTION_ID_SPECIAL_ENCAP_L3		= 0x22,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum {</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_L2_OUT_0		= 0x00,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_L2_OUT_1		= 0x01,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_L2_OUT_2		= 0x02,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_SRC_L2_OUT_0		= 0x08,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_SRC_L2_OUT_1		= 0x09,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_L3_OUT_0		= 0x0e,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_L4_OUT_0		= 0x18,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_L4_OUT_1		= 0x19,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_IPV4_OUT_0		= 0x40,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_IPV4_OUT_1		= 0x41,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_IPV6_DST_OUT_0	= 0x44,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_IPV6_DST_OUT_1	= 0x45,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_IPV6_DST_OUT_2	= 0x46,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_IPV6_DST_OUT_3	= 0x47,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_IPV6_SRC_OUT_0	= 0x4c,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_IPV6_SRC_OUT_1	= 0x4d,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_IPV6_SRC_OUT_2	= 0x4e,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_IPV6_SRC_OUT_3	= 0x4f,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_TCP_MISC_0		= 0x5e,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_TCP_MISC_1		= 0x5f,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_CFG_HDR_0_0		= 0x6f,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_CFG_HDR_0_1		= 0x70,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_METADATA_2_CQE	= 0x7b,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_GNRL_PURPOSE		= 0x7c,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_2_0		= 0x8c,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_2_1		= 0x8d,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_1_0		= 0x8e,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_1_1		= 0x8f,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_0_0		= 0x90,</div><div class='del'>-	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_0_1		= 0x91,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum dr_ste_v1_aso_ctx_type {</div><div class='del'>-	DR_STE_V1_ASO_CTX_TYPE_POLICERS = 0x2,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct mlx5dr_ste_action_modify_field dr_ste_v1_action_modify_field_arr[] = {</div><div class='ctx'> 	[MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16] = {</div><div class='ctx'> 		.hw_field = DR_STE_V1_ACTION_MDFY_FLD_SRC_L2_OUT_0, .start = 0, .end = 31,</div><div class='hunk'>@@ -379,13 +249,12 @@ static void dr_ste_v1_set_counter_id(u8 *hw_ste_p, u32 ctr_id)</div><div class='ctx'> 	MLX5_SET(ste_match_bwc_v1, hw_ste_p, counter_id, ctr_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dr_ste_v1_set_reparse(u8 *hw_ste_p)</div><div class='add'>+void dr_ste_v1_set_reparse(u8 *hw_ste_p)</div><div class='ctx'> {</div><div class='ctx'> 	MLX5_SET(ste_match_bwc_v1, hw_ste_p, reparse, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dr_ste_v1_set_encap(u8 *hw_ste_p, u8 *d_action,</div><div class='del'>-				u32 reformat_id, int size)</div><div class='add'>+void dr_ste_v1_set_encap(u8 *hw_ste_p, u8 *d_action, u32 reformat_id, int size)</div><div class='ctx'> {</div><div class='ctx'> 	MLX5_SET(ste_double_action_insert_with_ptr_v1, d_action, action_id,</div><div class='ctx'> 		 DR_STE_V1_ACTION_ID_INSERT_POINTER);</div><div class='hunk'>@@ -397,10 +266,10 @@ static void dr_ste_v1_set_encap(u8 *hw_ste_p, u8 *d_action,</div><div class='ctx'> 	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,</div><div class='del'>-				     u32 reformat_id,</div><div class='del'>-				     u8 anchor, u8 offset,</div><div class='del'>-				     int size)</div><div class='add'>+void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,</div><div class='add'>+			      u32 reformat_id,</div><div class='add'>+			      u8 anchor, u8 offset,</div><div class='add'>+			      int size)</div><div class='ctx'> {</div><div class='ctx'> 	MLX5_SET(ste_double_action_insert_with_ptr_v1, d_action,</div><div class='ctx'> 		 action_id, DR_STE_V1_ACTION_ID_INSERT_POINTER);</div><div class='hunk'>@@ -417,9 +286,9 @@ static void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,</div><div class='ctx'> 	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dr_ste_v1_set_remove_hdr(u8 *hw_ste_p, u8 *s_action,</div><div class='del'>-				     u8 anchor, u8 offset,</div><div class='del'>-				     int size)</div><div class='add'>+void dr_ste_v1_set_remove_hdr(u8 *hw_ste_p, u8 *s_action,</div><div class='add'>+			      u8 anchor, u8 offset,</div><div class='add'>+			      int size)</div><div class='ctx'> {</div><div class='ctx'> 	MLX5_SET(ste_single_action_remove_header_size_v1, s_action,</div><div class='ctx'> 		 action_id, DR_STE_V1_ACTION_ID_REMOVE_BY_SIZE);</div><div class='hunk'>@@ -432,8 +301,7 @@ static void dr_ste_v1_set_remove_hdr(u8 *hw_ste_p, u8 *s_action,</div><div class='ctx'> 	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dr_ste_v1_set_push_vlan(u8 *hw_ste_p, u8 *d_action,</div><div class='del'>-				    u32 vlan_hdr)</div><div class='add'>+void dr_ste_v1_set_push_vlan(u8 *hw_ste_p, u8 *d_action, u32 vlan_hdr)</div><div class='ctx'> {</div><div class='ctx'> 	MLX5_SET(ste_double_action_insert_with_inline_v1, d_action,</div><div class='ctx'> 		 action_id, DR_STE_V1_ACTION_ID_INSERT_INLINE);</div><div class='hunk'>@@ -446,7 +314,7 @@ static void dr_ste_v1_set_push_vlan(u8 *hw_ste_p, u8 *d_action,</div><div class='ctx'> 	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dr_ste_v1_set_pop_vlan(u8 *hw_ste_p, u8 *s_action, u8 vlans_num)</div><div class='add'>+void dr_ste_v1_set_pop_vlan(u8 *hw_ste_p, u8 *s_action, u8 vlans_num)</div><div class='ctx'> {</div><div class='ctx'> 	MLX5_SET(ste_single_action_remove_header_size_v1, s_action,</div><div class='ctx'> 		 action_id, DR_STE_V1_ACTION_ID_REMOVE_BY_SIZE);</div><div class='hunk'>@@ -459,11 +327,8 @@ static void dr_ste_v1_set_pop_vlan(u8 *hw_ste_p, u8 *s_action, u8 vlans_num)</div><div class='ctx'> 	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dr_ste_v1_set_encap_l3(u8 *hw_ste_p,</div><div class='del'>-				   u8 *frst_s_action,</div><div class='del'>-				   u8 *scnd_d_action,</div><div class='del'>-				   u32 reformat_id,</div><div class='del'>-				   int size)</div><div class='add'>+void dr_ste_v1_set_encap_l3(u8 *hw_ste_p, u8 *frst_s_action, u8 *scnd_d_action,</div><div class='add'>+			    u32 reformat_id, int size)</div><div class='ctx'> {</div><div class='ctx'> 	/* Remove L2 headers */</div><div class='ctx'> 	MLX5_SET(ste_single_action_remove_header_v1, frst_s_action, action_id,</div><div class='hunk'>@@ -483,7 +348,7 @@ static void dr_ste_v1_set_encap_l3(u8 *hw_ste_p,</div><div class='ctx'> 	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dr_ste_v1_set_rx_decap(u8 *hw_ste_p, u8 *s_action)</div><div class='add'>+void dr_ste_v1_set_rx_decap(u8 *hw_ste_p, u8 *s_action)</div><div class='ctx'> {</div><div class='ctx'> 	MLX5_SET(ste_single_action_remove_header_v1, s_action, action_id,</div><div class='ctx'> 		 DR_STE_V1_ACTION_ID_REMOVE_HEADER_TO_HEADER);</div><div class='hunk'>@@ -620,7 +485,8 @@ static void dr_ste_v1_arr_init_next_match_range(u8 **last_ste,</div><div class='ctx'> 	dr_ste_v1_set_entry_type(*last_ste, DR_STE_V1_TYPE_MATCH_RANGES);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn,</div><div class='add'>+void dr_ste_v1_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx,</div><div class='add'>+			      struct mlx5dr_domain *dmn,</div><div class='ctx'> 			      u8 *action_type_set,</div><div class='ctx'> 			      u32 actions_caps,</div><div class='ctx'> 			      u8 *last_ste,</div><div class='hunk'>@@ -640,7 +506,7 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 					      last_ste, action);</div><div class='ctx'> 			action_sz = DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 		}</div><div class='del'>-		dr_ste_v1_set_pop_vlan(last_ste, action, attr-&gt;vlans.count);</div><div class='add'>+		ste_ctx-&gt;set_pop_vlan(last_ste, action, attr-&gt;vlans.count);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> 		action += DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> </div><div class='hunk'>@@ -677,8 +543,8 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 				action_sz = DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 				allow_encap = true;</div><div class='ctx'> 			}</div><div class='del'>-			dr_ste_v1_set_push_vlan(last_ste, action,</div><div class='del'>-						attr-&gt;vlans.headers[i]);</div><div class='add'>+			ste_ctx-&gt;set_push_vlan(last_ste, action,</div><div class='add'>+					       attr-&gt;vlans.headers[i]);</div><div class='ctx'> 			action_sz -= DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 			action += DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -691,9 +557,9 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 			action_sz = DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 			allow_encap = true;</div><div class='ctx'> 		}</div><div class='del'>-		dr_ste_v1_set_encap(last_ste, action,</div><div class='del'>-				    attr-&gt;reformat.id,</div><div class='del'>-				    attr-&gt;reformat.size);</div><div class='add'>+		ste_ctx-&gt;set_encap(last_ste, action,</div><div class='add'>+				   attr-&gt;reformat.id,</div><div class='add'>+				   attr-&gt;reformat.size);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 		action += DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 	} else if (action_type_set[DR_ACTION_TYP_L2_TO_TNL_L3]) {</div><div class='hunk'>@@ -706,10 +572,10 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 		}</div><div class='ctx'> 		d_action = action + DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> </div><div class='del'>-		dr_ste_v1_set_encap_l3(last_ste,</div><div class='del'>-				       action, d_action,</div><div class='del'>-				       attr-&gt;reformat.id,</div><div class='del'>-				       attr-&gt;reformat.size);</div><div class='add'>+		ste_ctx-&gt;set_encap_l3(last_ste,</div><div class='add'>+				      action, d_action,</div><div class='add'>+				      attr-&gt;reformat.id,</div><div class='add'>+				      attr-&gt;reformat.size);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 		action += DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 	} else if (action_type_set[DR_ACTION_TYP_INSERT_HDR]) {</div><div class='hunk'>@@ -718,11 +584,11 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 			action = MLX5_ADDR_OF(ste_mask_and_match_v1, last_ste, action);</div><div class='ctx'> 			action_sz = DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 		}</div><div class='del'>-		dr_ste_v1_set_insert_hdr(last_ste, action,</div><div class='del'>-					 attr-&gt;reformat.id,</div><div class='del'>-					 attr-&gt;reformat.param_0,</div><div class='del'>-					 attr-&gt;reformat.param_1,</div><div class='del'>-					 attr-&gt;reformat.size);</div><div class='add'>+		ste_ctx-&gt;set_insert_hdr(last_ste, action,</div><div class='add'>+					attr-&gt;reformat.id,</div><div class='add'>+					attr-&gt;reformat.param_0,</div><div class='add'>+					attr-&gt;reformat.param_1,</div><div class='add'>+					attr-&gt;reformat.size);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 		action += DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 	} else if (action_type_set[DR_ACTION_TYP_REMOVE_HDR]) {</div><div class='hunk'>@@ -731,10 +597,10 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 			action = MLX5_ADDR_OF(ste_mask_and_match_v1, last_ste, action);</div><div class='ctx'> 			action_sz = DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 		}</div><div class='del'>-		dr_ste_v1_set_remove_hdr(last_ste, action,</div><div class='del'>-					 attr-&gt;reformat.param_0,</div><div class='del'>-					 attr-&gt;reformat.param_1,</div><div class='del'>-					 attr-&gt;reformat.size);</div><div class='add'>+		ste_ctx-&gt;set_remove_hdr(last_ste, action,</div><div class='add'>+					attr-&gt;reformat.param_0,</div><div class='add'>+					attr-&gt;reformat.param_1,</div><div class='add'>+					attr-&gt;reformat.size);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> 		action += DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -776,7 +642,8 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 	dr_ste_v1_set_hit_addr(last_ste, attr-&gt;final_icm_addr, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn,</div><div class='add'>+void dr_ste_v1_set_actions_rx(struct mlx5dr_ste_ctx *ste_ctx,</div><div class='add'>+			      struct mlx5dr_domain *dmn,</div><div class='ctx'> 			      u8 *action_type_set,</div><div class='ctx'> 			      u32 actions_caps,</div><div class='ctx'> 			      u8 *last_ste,</div><div class='hunk'>@@ -799,7 +666,7 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 		allow_modify_hdr = false;</div><div class='ctx'> 		allow_ctr = false;</div><div class='ctx'> 	} else if (action_type_set[DR_ACTION_TYP_TNL_L2_TO_L2]) {</div><div class='del'>-		dr_ste_v1_set_rx_decap(last_ste, action);</div><div class='add'>+		ste_ctx-&gt;set_rx_decap(last_ste, action);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> 		action += DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> 		allow_modify_hdr = false;</div><div class='hunk'>@@ -827,7 +694,7 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 			action_sz = DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		dr_ste_v1_set_pop_vlan(last_ste, action, attr-&gt;vlans.count);</div><div class='add'>+		ste_ctx-&gt;set_pop_vlan(last_ste, action, attr-&gt;vlans.count);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> 		action += DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> 		allow_ctr = false;</div><div class='hunk'>@@ -868,8 +735,8 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 						      last_ste, action);</div><div class='ctx'> 				action_sz = DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 			}</div><div class='del'>-			dr_ste_v1_set_push_vlan(last_ste, action,</div><div class='del'>-						attr-&gt;vlans.headers[i]);</div><div class='add'>+			ste_ctx-&gt;set_push_vlan(last_ste, action,</div><div class='add'>+					       attr-&gt;vlans.headers[i]);</div><div class='ctx'> 			action_sz -= DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 			action += DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -895,9 +762,9 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 			action = MLX5_ADDR_OF(ste_mask_and_match_v1, last_ste, action);</div><div class='ctx'> 			action_sz = DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 		}</div><div class='del'>-		dr_ste_v1_set_encap(last_ste, action,</div><div class='del'>-				    attr-&gt;reformat.id,</div><div class='del'>-				    attr-&gt;reformat.size);</div><div class='add'>+		ste_ctx-&gt;set_encap(last_ste, action,</div><div class='add'>+				   attr-&gt;reformat.id,</div><div class='add'>+				   attr-&gt;reformat.size);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 		action += DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 		allow_modify_hdr = false;</div><div class='hunk'>@@ -912,10 +779,10 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn,</div><div class='ctx'> </div><div class='ctx'> 		d_action = action + DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> </div><div class='del'>-		dr_ste_v1_set_encap_l3(last_ste,</div><div class='del'>-				       action, d_action,</div><div class='del'>-				       attr-&gt;reformat.id,</div><div class='del'>-				       attr-&gt;reformat.size);</div><div class='add'>+		ste_ctx-&gt;set_encap_l3(last_ste,</div><div class='add'>+				      action, d_action,</div><div class='add'>+				      attr-&gt;reformat.id,</div><div class='add'>+				      attr-&gt;reformat.size);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 		allow_modify_hdr = false;</div><div class='ctx'> 	} else if (action_type_set[DR_ACTION_TYP_INSERT_HDR]) {</div><div class='hunk'>@@ -925,11 +792,11 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 			action = MLX5_ADDR_OF(ste_mask_and_match_v1, last_ste, action);</div><div class='ctx'> 			action_sz = DR_STE_ACTION_TRIPLE_SZ;</div><div class='ctx'> 		}</div><div class='del'>-		dr_ste_v1_set_insert_hdr(last_ste, action,</div><div class='del'>-					 attr-&gt;reformat.id,</div><div class='del'>-					 attr-&gt;reformat.param_0,</div><div class='del'>-					 attr-&gt;reformat.param_1,</div><div class='del'>-					 attr-&gt;reformat.size);</div><div class='add'>+		ste_ctx-&gt;set_insert_hdr(last_ste, action,</div><div class='add'>+					attr-&gt;reformat.id,</div><div class='add'>+					attr-&gt;reformat.param_0,</div><div class='add'>+					attr-&gt;reformat.param_1,</div><div class='add'>+					attr-&gt;reformat.size);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 		action += DR_STE_ACTION_DOUBLE_SZ;</div><div class='ctx'> 		allow_modify_hdr = false;</div><div class='hunk'>@@ -941,10 +808,10 @@ void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn,</div><div class='ctx'> 			allow_modify_hdr = true;</div><div class='ctx'> 			allow_ctr = true;</div><div class='ctx'> 		}</div><div class='del'>-		dr_ste_v1_set_remove_hdr(last_ste, action,</div><div class='del'>-					 attr-&gt;reformat.param_0,</div><div class='del'>-					 attr-&gt;reformat.param_1,</div><div class='del'>-					 attr-&gt;reformat.size);</div><div class='add'>+		ste_ctx-&gt;set_remove_hdr(last_ste, action,</div><div class='add'>+					attr-&gt;reformat.param_0,</div><div class='add'>+					attr-&gt;reformat.param_1,</div><div class='add'>+					attr-&gt;reformat.size);</div><div class='ctx'> 		action_sz -= DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> 		action += DR_STE_ACTION_SINGLE_SZ;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1027,9 +894,6 @@ void dr_ste_v1_set_action_copy(u8 *d_action,</div><div class='ctx'> 	MLX5_SET(ste_double_action_copy_v1, d_action, source_right_shifter, src_shifter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define DR_STE_DECAP_L3_ACTION_NUM	8</div><div class='del'>-#define DR_STE_L2_HDR_MAX_SZ		20</div><div class='del'>-</div><div class='ctx'> int dr_ste_v1_set_action_decap_l3_list(void *data,</div><div class='ctx'> 				       u32 data_sz,</div><div class='ctx'> 				       u8 *hw_action,</div><div class='hunk'>@@ -2330,7 +2194,14 @@ static struct mlx5dr_ste_ctx ste_ctx_v1 = {</div><div class='ctx'> 	.set_action_decap_l3_list	= &amp;dr_ste_v1_set_action_decap_l3_list,</div><div class='ctx'> 	.alloc_modify_hdr_chunk		= &amp;dr_ste_v1_alloc_modify_hdr_ptrn_arg,</div><div class='ctx'> 	.dealloc_modify_hdr_chunk	= &amp;dr_ste_v1_free_modify_hdr_ptrn_arg,</div><div class='del'>-</div><div class='add'>+	/* Actions bit set */</div><div class='add'>+	.set_encap			= &amp;dr_ste_v1_set_encap,</div><div class='add'>+	.set_push_vlan			= &amp;dr_ste_v1_set_push_vlan,</div><div class='add'>+	.set_pop_vlan			= &amp;dr_ste_v1_set_pop_vlan,</div><div class='add'>+	.set_rx_decap			= &amp;dr_ste_v1_set_rx_decap,</div><div class='add'>+	.set_encap_l3			= &amp;dr_ste_v1_set_encap_l3,</div><div class='add'>+	.set_insert_hdr			= &amp;dr_ste_v1_set_insert_hdr,</div><div class='add'>+	.set_remove_hdr			= &amp;dr_ste_v1_set_remove_hdr,</div><div class='ctx'> 	/* Send */</div><div class='ctx'> 	.prepare_for_postsend		= &amp;dr_ste_v1_prepare_for_postsend,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h<br/>new file mode 100644<br/>index 000000000000..591c20c95a6a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h</a></div><div class='hunk'>@@ -0,0 +1,240 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2022, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#ifndef	_DR_STE_V1_</div><div class='add'>+#define	_DR_STE_V1_</div><div class='add'>+</div><div class='add'>+#include "dr_types.h"</div><div class='add'>+#include "dr_ste.h"</div><div class='add'>+</div><div class='add'>+#define DR_STE_DECAP_L3_ACTION_NUM	8</div><div class='add'>+#define DR_STE_L2_HDR_MAX_SZ		20</div><div class='add'>+#define DR_STE_CALC_DFNR_TYPE(lookup_type, inner) \</div><div class='add'>+	((inner) ? DR_STE_V1_LU_TYPE_##lookup_type##_I : \</div><div class='add'>+		   DR_STE_V1_LU_TYPE_##lookup_type##_O)</div><div class='add'>+</div><div class='add'>+enum dr_ste_v1_entry_format {</div><div class='add'>+	DR_STE_V1_TYPE_BWC_BYTE	= 0x0,</div><div class='add'>+	DR_STE_V1_TYPE_BWC_DW	= 0x1,</div><div class='add'>+	DR_STE_V1_TYPE_MATCH	= 0x2,</div><div class='add'>+	DR_STE_V1_TYPE_MATCH_RANGES = 0x7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Lookup type is built from 2B: [ Definer mode 1B ][ Definer index 1B ] */</div><div class='add'>+enum {</div><div class='add'>+	DR_STE_V1_LU_TYPE_NOP				= 0x0000,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL2_TNL			= 0x0002,</div><div class='add'>+	DR_STE_V1_LU_TYPE_IBL3_EXT			= 0x0102,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL2_O			= 0x0003,</div><div class='add'>+	DR_STE_V1_LU_TYPE_IBL4				= 0x0103,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL2_I			= 0x0004,</div><div class='add'>+	DR_STE_V1_LU_TYPE_SRC_QP_GVMI			= 0x0104,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL2_SRC_O			= 0x0005,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL2_HEADERS_O		= 0x0105,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL2_SRC_I			= 0x0006,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL2_HEADERS_I		= 0x0106,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL3_IPV4_5_TUPLE_O		= 0x0007,</div><div class='add'>+	DR_STE_V1_LU_TYPE_IPV6_DES_O			= 0x0107,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL3_IPV4_5_TUPLE_I		= 0x0008,</div><div class='add'>+	DR_STE_V1_LU_TYPE_IPV6_DES_I			= 0x0108,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL4_O			= 0x0009,</div><div class='add'>+	DR_STE_V1_LU_TYPE_IPV6_SRC_O			= 0x0109,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL4_I			= 0x000a,</div><div class='add'>+	DR_STE_V1_LU_TYPE_IPV6_SRC_I			= 0x010a,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL2_SRC_DST_O		= 0x000b,</div><div class='add'>+	DR_STE_V1_LU_TYPE_MPLS_O			= 0x010b,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL2_SRC_DST_I		= 0x000c,</div><div class='add'>+	DR_STE_V1_LU_TYPE_MPLS_I			= 0x010c,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL3_IPV4_MISC_O		= 0x000d,</div><div class='add'>+	DR_STE_V1_LU_TYPE_GRE				= 0x010d,</div><div class='add'>+	DR_STE_V1_LU_TYPE_FLEX_PARSER_TNL_HEADER	= 0x000e,</div><div class='add'>+	DR_STE_V1_LU_TYPE_GENERAL_PURPOSE		= 0x010e,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL3_IPV4_MISC_I		= 0x000f,</div><div class='add'>+	DR_STE_V1_LU_TYPE_STEERING_REGISTERS_0		= 0x010f,</div><div class='add'>+	DR_STE_V1_LU_TYPE_STEERING_REGISTERS_1		= 0x0110,</div><div class='add'>+	DR_STE_V1_LU_TYPE_FLEX_PARSER_OK		= 0x0011,</div><div class='add'>+	DR_STE_V1_LU_TYPE_FLEX_PARSER_0			= 0x0111,</div><div class='add'>+	DR_STE_V1_LU_TYPE_FLEX_PARSER_1			= 0x0112,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL4_MISC_O			= 0x0113,</div><div class='add'>+	DR_STE_V1_LU_TYPE_ETHL4_MISC_I			= 0x0114,</div><div class='add'>+	DR_STE_V1_LU_TYPE_INVALID			= 0x00ff,</div><div class='add'>+	DR_STE_V1_LU_TYPE_DONT_CARE			= MLX5DR_STE_LU_TYPE_DONT_CARE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum dr_ste_v1_header_anchors {</div><div class='add'>+	DR_STE_HEADER_ANCHOR_START_OUTER		= 0x00,</div><div class='add'>+	DR_STE_HEADER_ANCHOR_1ST_VLAN			= 0x02,</div><div class='add'>+	DR_STE_HEADER_ANCHOR_IPV6_IPV4			= 0x07,</div><div class='add'>+	DR_STE_HEADER_ANCHOR_INNER_MAC			= 0x13,</div><div class='add'>+	DR_STE_HEADER_ANCHOR_INNER_IPV6_IPV4		= 0x19,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum dr_ste_v1_action_size {</div><div class='add'>+	DR_STE_ACTION_SINGLE_SZ = 4,</div><div class='add'>+	DR_STE_ACTION_DOUBLE_SZ = 8,</div><div class='add'>+	DR_STE_ACTION_TRIPLE_SZ = 12,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum dr_ste_v1_action_insert_ptr_attr {</div><div class='add'>+	DR_STE_V1_ACTION_INSERT_PTR_ATTR_NONE = 0,  /* Regular push header (e.g. push vlan) */</div><div class='add'>+	DR_STE_V1_ACTION_INSERT_PTR_ATTR_ENCAP = 1, /* Encapsulation / Tunneling */</div><div class='add'>+	DR_STE_V1_ACTION_INSERT_PTR_ATTR_ESP = 2,   /* IPsec */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum dr_ste_v1_action_id {</div><div class='add'>+	DR_STE_V1_ACTION_ID_NOP				= 0x00,</div><div class='add'>+	DR_STE_V1_ACTION_ID_COPY			= 0x05,</div><div class='add'>+	DR_STE_V1_ACTION_ID_SET				= 0x06,</div><div class='add'>+	DR_STE_V1_ACTION_ID_ADD				= 0x07,</div><div class='add'>+	DR_STE_V1_ACTION_ID_REMOVE_BY_SIZE		= 0x08,</div><div class='add'>+	DR_STE_V1_ACTION_ID_REMOVE_HEADER_TO_HEADER	= 0x09,</div><div class='add'>+	DR_STE_V1_ACTION_ID_INSERT_INLINE		= 0x0a,</div><div class='add'>+	DR_STE_V1_ACTION_ID_INSERT_POINTER		= 0x0b,</div><div class='add'>+	DR_STE_V1_ACTION_ID_FLOW_TAG			= 0x0c,</div><div class='add'>+	DR_STE_V1_ACTION_ID_QUEUE_ID_SEL		= 0x0d,</div><div class='add'>+	DR_STE_V1_ACTION_ID_ACCELERATED_LIST		= 0x0e,</div><div class='add'>+	DR_STE_V1_ACTION_ID_MODIFY_LIST			= 0x0f,</div><div class='add'>+	DR_STE_V1_ACTION_ID_ASO				= 0x12,</div><div class='add'>+	DR_STE_V1_ACTION_ID_TRAILER			= 0x13,</div><div class='add'>+	DR_STE_V1_ACTION_ID_COUNTER_ID			= 0x14,</div><div class='add'>+	DR_STE_V1_ACTION_ID_MAX				= 0x21,</div><div class='add'>+	/* use for special cases */</div><div class='add'>+	DR_STE_V1_ACTION_ID_SPECIAL_ENCAP_L3		= 0x22,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_L2_OUT_0		= 0x00,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_L2_OUT_1		= 0x01,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_L2_OUT_2		= 0x02,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_SRC_L2_OUT_0		= 0x08,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_SRC_L2_OUT_1		= 0x09,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_L3_OUT_0		= 0x0e,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_L4_OUT_0		= 0x18,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_L4_OUT_1		= 0x19,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_IPV4_OUT_0		= 0x40,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_IPV4_OUT_1		= 0x41,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_IPV6_DST_OUT_0	= 0x44,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_IPV6_DST_OUT_1	= 0x45,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_IPV6_DST_OUT_2	= 0x46,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_IPV6_DST_OUT_3	= 0x47,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_IPV6_SRC_OUT_0	= 0x4c,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_IPV6_SRC_OUT_1	= 0x4d,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_IPV6_SRC_OUT_2	= 0x4e,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_IPV6_SRC_OUT_3	= 0x4f,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_TCP_MISC_0		= 0x5e,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_TCP_MISC_1		= 0x5f,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_CFG_HDR_0_0		= 0x6f,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_CFG_HDR_0_1		= 0x70,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_METADATA_2_CQE	= 0x7b,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_GNRL_PURPOSE		= 0x7c,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_2_0		= 0x8c,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_2_1		= 0x8d,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_1_0		= 0x8e,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_1_1		= 0x8f,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_0_0		= 0x90,</div><div class='add'>+	DR_STE_V1_ACTION_MDFY_FLD_REGISTER_0_1		= 0x91,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum dr_ste_v1_aso_ctx_type {</div><div class='add'>+	DR_STE_V1_ASO_CTX_TYPE_POLICERS = 0x2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+bool dr_ste_v1_is_miss_addr_set(u8 *hw_ste_p);</div><div class='add'>+void dr_ste_v1_set_miss_addr(u8 *hw_ste_p, u64 miss_addr);</div><div class='add'>+u64 dr_ste_v1_get_miss_addr(u8 *hw_ste_p);</div><div class='add'>+void dr_ste_v1_set_byte_mask(u8 *hw_ste_p, u16 byte_mask);</div><div class='add'>+u16 dr_ste_v1_get_byte_mask(u8 *hw_ste_p);</div><div class='add'>+void dr_ste_v1_set_next_lu_type(u8 *hw_ste_p, u16 lu_type);</div><div class='add'>+u16 dr_ste_v1_get_next_lu_type(u8 *hw_ste_p);</div><div class='add'>+void dr_ste_v1_set_hit_addr(u8 *hw_ste_p, u64 icm_addr, u32 ht_size);</div><div class='add'>+void dr_ste_v1_init(u8 *hw_ste_p, u16 lu_type, bool is_rx, u16 gvmi);</div><div class='add'>+void dr_ste_v1_prepare_for_postsend(u8 *hw_ste_p, u32 ste_size);</div><div class='add'>+void dr_ste_v1_set_reparse(u8 *hw_ste_p);</div><div class='add'>+void dr_ste_v1_set_encap(u8 *hw_ste_p, u8 *d_action, u32 reformat_id, int size);</div><div class='add'>+void dr_ste_v1_set_push_vlan(u8 *hw_ste_p, u8 *d_action, u32 vlan_hdr);</div><div class='add'>+void dr_ste_v1_set_pop_vlan(u8 *hw_ste_p, u8 *s_action, u8 vlans_num);</div><div class='add'>+void dr_ste_v1_set_encap_l3(u8 *hw_ste_p, u8 *frst_s_action, u8 *scnd_d_action,</div><div class='add'>+			    u32 reformat_id, int size);</div><div class='add'>+void dr_ste_v1_set_rx_decap(u8 *hw_ste_p, u8 *s_action);</div><div class='add'>+void dr_ste_v1_set_insert_hdr(u8 *hw_ste_p, u8 *d_action, u32 reformat_id,</div><div class='add'>+			      u8 anchor, u8 offset, int size);</div><div class='add'>+void dr_ste_v1_set_remove_hdr(u8 *hw_ste_p, u8 *s_action, u8 anchor,</div><div class='add'>+			      u8 offset, int size);</div><div class='add'>+void dr_ste_v1_set_actions_tx(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_domain *dmn,</div><div class='add'>+			      u8 *action_type_set, u32 actions_caps, u8 *last_ste,</div><div class='add'>+			      struct mlx5dr_ste_actions_attr *attr, u32 *added_stes);</div><div class='add'>+void dr_ste_v1_set_actions_rx(struct mlx5dr_ste_ctx *ste_ctx, struct mlx5dr_domain *dmn,</div><div class='add'>+			      u8 *action_type_set, u32 actions_caps, u8 *last_ste,</div><div class='add'>+			      struct mlx5dr_ste_actions_attr *attr, u32 *added_stes);</div><div class='add'>+void dr_ste_v1_set_action_set(u8 *d_action, u8 hw_field, u8 shifter,</div><div class='add'>+			      u8 length, u32 data);</div><div class='add'>+void dr_ste_v1_set_action_add(u8 *d_action, u8 hw_field, u8 shifter,</div><div class='add'>+			      u8 length, u32 data);</div><div class='add'>+void dr_ste_v1_set_action_copy(u8 *d_action, u8 dst_hw_field, u8 dst_shifter,</div><div class='add'>+			       u8 dst_len, u8 src_hw_field, u8 src_shifter);</div><div class='add'>+int dr_ste_v1_set_action_decap_l3_list(void *data, u32 data_sz, u8 *hw_action,</div><div class='add'>+				       u32 hw_action_sz, u16 *used_hw_action_num);</div><div class='add'>+int dr_ste_v1_alloc_modify_hdr_ptrn_arg(struct mlx5dr_action *action);</div><div class='add'>+void dr_ste_v1_free_modify_hdr_ptrn_arg(struct mlx5dr_action *action);</div><div class='add'>+void dr_ste_v1_build_eth_l2_src_dst_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					 struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_eth_l3_ipv6_dst_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					  struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_eth_l3_ipv6_src_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					  struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_eth_l3_ipv4_5_tuple_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					      struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_eth_l2_src_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+				     struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_eth_l2_dst_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+				     struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_eth_l2_tnl_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+				     struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_eth_l3_ipv4_misc_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					   struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_eth_ipv6_l3_l4_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					 struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_mpls_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+			       struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_tnl_gre_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+				  struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_tnl_mpls_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+				   struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_tnl_mpls_over_udp_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					    struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_tnl_mpls_over_gre_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					    struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_icmp_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+			       struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_general_purpose_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					  struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_eth_l4_misc_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+				      struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_flex_parser_tnl_vxlan_gpe_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+						    struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_flex_parser_tnl_geneve_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+						 struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_tnl_header_0_1_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					 struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_register_0_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+				     struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_register_1_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+				     struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_src_gvmi_qpn_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+				       struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_flex_parser_0_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_flex_parser_1_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+							 struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_exist_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+							       struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_flex_parser_tnl_gtpu_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+					       struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_tnl_gtpu_flex_parser_0_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+						 struct mlx5dr_match_param *mask);</div><div class='add'>+void dr_ste_v1_build_tnl_gtpu_flex_parser_1_init(struct mlx5dr_ste_build *sb,</div><div class='add'>+						 struct mlx5dr_match_param *mask);</div><div class='add'>+</div><div class='add'>+#endif  /* _DR_STE_V1_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.c<br/>new file mode 100644<br/>index 000000000000..d0ebaf820d42<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.c</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2022, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#include "dr_ste_v1.h"</div><div class='add'>+#include "dr_ste_v2.h"</div><div class='add'>+</div><div class='add'>+static struct mlx5dr_ste_ctx ste_ctx_v2 = {</div><div class='add'>+	/* Builders */</div><div class='add'>+	.build_eth_l2_src_dst_init	= &amp;dr_ste_v1_build_eth_l2_src_dst_init,</div><div class='add'>+	.build_eth_l3_ipv6_src_init	= &amp;dr_ste_v1_build_eth_l3_ipv6_src_init,</div><div class='add'>+	.build_eth_l3_ipv6_dst_init	= &amp;dr_ste_v1_build_eth_l3_ipv6_dst_init,</div><div class='add'>+	.build_eth_l3_ipv4_5_tuple_init	= &amp;dr_ste_v1_build_eth_l3_ipv4_5_tuple_init,</div><div class='add'>+	.build_eth_l2_src_init		= &amp;dr_ste_v1_build_eth_l2_src_init,</div><div class='add'>+	.build_eth_l2_dst_init		= &amp;dr_ste_v1_build_eth_l2_dst_init,</div><div class='add'>+	.build_eth_l2_tnl_init		= &amp;dr_ste_v1_build_eth_l2_tnl_init,</div><div class='add'>+	.build_eth_l3_ipv4_misc_init	= &amp;dr_ste_v1_build_eth_l3_ipv4_misc_init,</div><div class='add'>+	.build_eth_ipv6_l3_l4_init	= &amp;dr_ste_v1_build_eth_ipv6_l3_l4_init,</div><div class='add'>+	.build_mpls_init		= &amp;dr_ste_v1_build_mpls_init,</div><div class='add'>+	.build_tnl_gre_init		= &amp;dr_ste_v1_build_tnl_gre_init,</div><div class='add'>+	.build_tnl_mpls_init		= &amp;dr_ste_v1_build_tnl_mpls_init,</div><div class='add'>+	.build_tnl_mpls_over_udp_init	= &amp;dr_ste_v1_build_tnl_mpls_over_udp_init,</div><div class='add'>+	.build_tnl_mpls_over_gre_init	= &amp;dr_ste_v1_build_tnl_mpls_over_gre_init,</div><div class='add'>+	.build_icmp_init		= &amp;dr_ste_v1_build_icmp_init,</div><div class='add'>+	.build_general_purpose_init	= &amp;dr_ste_v1_build_general_purpose_init,</div><div class='add'>+	.build_eth_l4_misc_init		= &amp;dr_ste_v1_build_eth_l4_misc_init,</div><div class='add'>+	.build_tnl_vxlan_gpe_init	= &amp;dr_ste_v1_build_flex_parser_tnl_vxlan_gpe_init,</div><div class='add'>+	.build_tnl_geneve_init		= &amp;dr_ste_v1_build_flex_parser_tnl_geneve_init,</div><div class='add'>+	.build_tnl_geneve_tlv_opt_init	= &amp;dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_init,</div><div class='add'>+	.build_tnl_geneve_tlv_opt_exist_init =</div><div class='add'>+				  &amp;dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_exist_init,</div><div class='add'>+	.build_register_0_init		= &amp;dr_ste_v1_build_register_0_init,</div><div class='add'>+	.build_register_1_init		= &amp;dr_ste_v1_build_register_1_init,</div><div class='add'>+	.build_src_gvmi_qpn_init	= &amp;dr_ste_v1_build_src_gvmi_qpn_init,</div><div class='add'>+	.build_flex_parser_0_init	= &amp;dr_ste_v1_build_flex_parser_0_init,</div><div class='add'>+	.build_flex_parser_1_init	= &amp;dr_ste_v1_build_flex_parser_1_init,</div><div class='add'>+	.build_tnl_gtpu_init		= &amp;dr_ste_v1_build_flex_parser_tnl_gtpu_init,</div><div class='add'>+	.build_tnl_header_0_1_init	= &amp;dr_ste_v1_build_tnl_header_0_1_init,</div><div class='add'>+	.build_tnl_gtpu_flex_parser_0_init = &amp;dr_ste_v1_build_tnl_gtpu_flex_parser_0_init,</div><div class='add'>+	.build_tnl_gtpu_flex_parser_1_init = &amp;dr_ste_v1_build_tnl_gtpu_flex_parser_1_init,</div><div class='add'>+</div><div class='add'>+	/* Getters and Setters */</div><div class='add'>+	.ste_init			= &amp;dr_ste_v1_init,</div><div class='add'>+	.set_next_lu_type		= &amp;dr_ste_v1_set_next_lu_type,</div><div class='add'>+	.get_next_lu_type		= &amp;dr_ste_v1_get_next_lu_type,</div><div class='add'>+	.is_miss_addr_set		= &amp;dr_ste_v1_is_miss_addr_set,</div><div class='add'>+	.set_miss_addr			= &amp;dr_ste_v1_set_miss_addr,</div><div class='add'>+	.get_miss_addr			= &amp;dr_ste_v1_get_miss_addr,</div><div class='add'>+	.set_hit_addr			= &amp;dr_ste_v1_set_hit_addr,</div><div class='add'>+	.set_byte_mask			= &amp;dr_ste_v1_set_byte_mask,</div><div class='add'>+	.get_byte_mask			= &amp;dr_ste_v1_get_byte_mask,</div><div class='add'>+</div><div class='add'>+	/* Actions */</div><div class='add'>+	.actions_caps			= DR_STE_CTX_ACTION_CAP_TX_POP |</div><div class='add'>+					  DR_STE_CTX_ACTION_CAP_RX_PUSH |</div><div class='add'>+					  DR_STE_CTX_ACTION_CAP_RX_ENCAP,</div><div class='add'>+	.set_actions_rx			= &amp;dr_ste_v1_set_actions_rx,</div><div class='add'>+	.set_actions_tx			= &amp;dr_ste_v1_set_actions_tx,</div><div class='add'>+	.modify_field_arr_sz		= ARRAY_SIZE(dr_ste_v2_action_modify_field_arr),</div><div class='add'>+	.modify_field_arr		= dr_ste_v2_action_modify_field_arr,</div><div class='add'>+	.set_action_set			= &amp;dr_ste_v1_set_action_set,</div><div class='add'>+	.set_action_add			= &amp;dr_ste_v1_set_action_add,</div><div class='add'>+	.set_action_copy		= &amp;dr_ste_v1_set_action_copy,</div><div class='add'>+	.set_action_decap_l3_list	= &amp;dr_ste_v1_set_action_decap_l3_list,</div><div class='add'>+	.alloc_modify_hdr_chunk		= &amp;dr_ste_v1_alloc_modify_hdr_ptrn_arg,</div><div class='add'>+	.dealloc_modify_hdr_chunk	= &amp;dr_ste_v1_free_modify_hdr_ptrn_arg,</div><div class='add'>+	/* Actions bit set */</div><div class='add'>+	.set_encap			= &amp;dr_ste_v1_set_encap,</div><div class='add'>+	.set_push_vlan			= &amp;dr_ste_v1_set_push_vlan,</div><div class='add'>+	.set_pop_vlan			= &amp;dr_ste_v1_set_pop_vlan,</div><div class='add'>+	.set_rx_decap			= &amp;dr_ste_v1_set_rx_decap,</div><div class='add'>+	.set_encap_l3			= &amp;dr_ste_v1_set_encap_l3,</div><div class='add'>+	.set_insert_hdr			= &amp;dr_ste_v1_set_insert_hdr,</div><div class='add'>+	.set_remove_hdr			= &amp;dr_ste_v1_set_remove_hdr,</div><div class='add'>+	/* Send */</div><div class='add'>+	.prepare_for_postsend		= &amp;dr_ste_v1_prepare_for_postsend,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx_v2(void)</div><div class='add'>+{</div><div class='add'>+	return &amp;ste_ctx_v2;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v2.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h<br/>index 808b013cf48c..d853fde49cfc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='del'>-/* Copyright (c) 2022, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) 2024, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='ctx'> </div><div class='del'>-#include "dr_ste_v1.h"</div><div class='add'>+#ifndef	_DR_STE_V2_</div><div class='add'>+#define	_DR_STE_V2_</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='ctx'> 	DR_STE_V2_ACTION_MDFY_FLD_L2_OUT_0		= 0x00,</div><div class='hunk'>@@ -164,71 +165,4 @@ static const struct mlx5dr_ste_action_modify_field dr_ste_v2_action_modify_field</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct mlx5dr_ste_ctx ste_ctx_v2 = {</div><div class='del'>-	/* Builders */</div><div class='del'>-	.build_eth_l2_src_dst_init	= &amp;dr_ste_v1_build_eth_l2_src_dst_init,</div><div class='del'>-	.build_eth_l3_ipv6_src_init	= &amp;dr_ste_v1_build_eth_l3_ipv6_src_init,</div><div class='del'>-	.build_eth_l3_ipv6_dst_init	= &amp;dr_ste_v1_build_eth_l3_ipv6_dst_init,</div><div class='del'>-	.build_eth_l3_ipv4_5_tuple_init	= &amp;dr_ste_v1_build_eth_l3_ipv4_5_tuple_init,</div><div class='del'>-	.build_eth_l2_src_init		= &amp;dr_ste_v1_build_eth_l2_src_init,</div><div class='del'>-	.build_eth_l2_dst_init		= &amp;dr_ste_v1_build_eth_l2_dst_init,</div><div class='del'>-	.build_eth_l2_tnl_init		= &amp;dr_ste_v1_build_eth_l2_tnl_init,</div><div class='del'>-	.build_eth_l3_ipv4_misc_init	= &amp;dr_ste_v1_build_eth_l3_ipv4_misc_init,</div><div class='del'>-	.build_eth_ipv6_l3_l4_init	= &amp;dr_ste_v1_build_eth_ipv6_l3_l4_init,</div><div class='del'>-	.build_mpls_init		= &amp;dr_ste_v1_build_mpls_init,</div><div class='del'>-	.build_tnl_gre_init		= &amp;dr_ste_v1_build_tnl_gre_init,</div><div class='del'>-	.build_tnl_mpls_init		= &amp;dr_ste_v1_build_tnl_mpls_init,</div><div class='del'>-	.build_tnl_mpls_over_udp_init	= &amp;dr_ste_v1_build_tnl_mpls_over_udp_init,</div><div class='del'>-	.build_tnl_mpls_over_gre_init	= &amp;dr_ste_v1_build_tnl_mpls_over_gre_init,</div><div class='del'>-	.build_icmp_init		= &amp;dr_ste_v1_build_icmp_init,</div><div class='del'>-	.build_general_purpose_init	= &amp;dr_ste_v1_build_general_purpose_init,</div><div class='del'>-	.build_eth_l4_misc_init		= &amp;dr_ste_v1_build_eth_l4_misc_init,</div><div class='del'>-	.build_tnl_vxlan_gpe_init	= &amp;dr_ste_v1_build_flex_parser_tnl_vxlan_gpe_init,</div><div class='del'>-	.build_tnl_geneve_init		= &amp;dr_ste_v1_build_flex_parser_tnl_geneve_init,</div><div class='del'>-	.build_tnl_geneve_tlv_opt_init	= &amp;dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_init,</div><div class='del'>-	.build_tnl_geneve_tlv_opt_exist_init =</div><div class='del'>-				  &amp;dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_exist_init,</div><div class='del'>-	.build_register_0_init		= &amp;dr_ste_v1_build_register_0_init,</div><div class='del'>-	.build_register_1_init		= &amp;dr_ste_v1_build_register_1_init,</div><div class='del'>-	.build_src_gvmi_qpn_init	= &amp;dr_ste_v1_build_src_gvmi_qpn_init,</div><div class='del'>-	.build_flex_parser_0_init	= &amp;dr_ste_v1_build_flex_parser_0_init,</div><div class='del'>-	.build_flex_parser_1_init	= &amp;dr_ste_v1_build_flex_parser_1_init,</div><div class='del'>-	.build_tnl_gtpu_init		= &amp;dr_ste_v1_build_flex_parser_tnl_gtpu_init,</div><div class='del'>-	.build_tnl_header_0_1_init	= &amp;dr_ste_v1_build_tnl_header_0_1_init,</div><div class='del'>-	.build_tnl_gtpu_flex_parser_0_init = &amp;dr_ste_v1_build_tnl_gtpu_flex_parser_0_init,</div><div class='del'>-	.build_tnl_gtpu_flex_parser_1_init = &amp;dr_ste_v1_build_tnl_gtpu_flex_parser_1_init,</div><div class='del'>-</div><div class='del'>-	/* Getters and Setters */</div><div class='del'>-	.ste_init			= &amp;dr_ste_v1_init,</div><div class='del'>-	.set_next_lu_type		= &amp;dr_ste_v1_set_next_lu_type,</div><div class='del'>-	.get_next_lu_type		= &amp;dr_ste_v1_get_next_lu_type,</div><div class='del'>-	.is_miss_addr_set		= &amp;dr_ste_v1_is_miss_addr_set,</div><div class='del'>-	.set_miss_addr			= &amp;dr_ste_v1_set_miss_addr,</div><div class='del'>-	.get_miss_addr			= &amp;dr_ste_v1_get_miss_addr,</div><div class='del'>-	.set_hit_addr			= &amp;dr_ste_v1_set_hit_addr,</div><div class='del'>-	.set_byte_mask			= &amp;dr_ste_v1_set_byte_mask,</div><div class='del'>-	.get_byte_mask			= &amp;dr_ste_v1_get_byte_mask,</div><div class='del'>-</div><div class='del'>-	/* Actions */</div><div class='del'>-	.actions_caps			= DR_STE_CTX_ACTION_CAP_TX_POP |</div><div class='del'>-					  DR_STE_CTX_ACTION_CAP_RX_PUSH |</div><div class='del'>-					  DR_STE_CTX_ACTION_CAP_RX_ENCAP,</div><div class='del'>-	.set_actions_rx			= &amp;dr_ste_v1_set_actions_rx,</div><div class='del'>-	.set_actions_tx			= &amp;dr_ste_v1_set_actions_tx,</div><div class='del'>-	.modify_field_arr_sz		= ARRAY_SIZE(dr_ste_v2_action_modify_field_arr),</div><div class='del'>-	.modify_field_arr		= dr_ste_v2_action_modify_field_arr,</div><div class='del'>-	.set_action_set			= &amp;dr_ste_v1_set_action_set,</div><div class='del'>-	.set_action_add			= &amp;dr_ste_v1_set_action_add,</div><div class='del'>-	.set_action_copy		= &amp;dr_ste_v1_set_action_copy,</div><div class='del'>-	.set_action_decap_l3_list	= &amp;dr_ste_v1_set_action_decap_l3_list,</div><div class='del'>-	.alloc_modify_hdr_chunk		= &amp;dr_ste_v1_alloc_modify_hdr_ptrn_arg,</div><div class='del'>-	.dealloc_modify_hdr_chunk	= &amp;dr_ste_v1_free_modify_hdr_ptrn_arg,</div><div class='del'>-</div><div class='del'>-	/* Send */</div><div class='del'>-	.prepare_for_postsend		= &amp;dr_ste_v1_prepare_for_postsend,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx_v2(void)</div><div class='del'>-{</div><div class='del'>-	return &amp;ste_ctx_v2;</div><div class='del'>-}</div><div class='add'>+#endif  /* _DR_STE_V2_ */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v3.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v3.c<br/>new file mode 100644<br/>index 000000000000..e468a9ae44e8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v3.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v3.c</a></div><div class='hunk'>@@ -0,0 +1,263 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) 2024, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved. */</div><div class='add'>+</div><div class='add'>+#include "dr_ste_v1.h"</div><div class='add'>+#include "dr_ste_v2.h"</div><div class='add'>+</div><div class='add'>+static void dr_ste_v3_set_encap(u8 *hw_ste_p, u8 *d_action,</div><div class='add'>+				u32 reformat_id, int size)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action, action_id,</div><div class='add'>+		 DR_STE_V1_ACTION_ID_INSERT_POINTER);</div><div class='add'>+	/* The hardware expects here size in words (2 byte) */</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action, size, size / 2);</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action, pointer, reformat_id);</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action, attributes,</div><div class='add'>+		 DR_STE_V1_ACTION_INSERT_PTR_ATTR_ENCAP);</div><div class='add'>+	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dr_ste_v3_set_push_vlan(u8 *ste, u8 *d_action,</div><div class='add'>+				    u32 vlan_hdr)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_inline_v3, d_action, action_id,</div><div class='add'>+		 DR_STE_V1_ACTION_ID_INSERT_INLINE);</div><div class='add'>+	/* The hardware expects here offset to vlan header in words (2 byte) */</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_inline_v3, d_action, start_offset,</div><div class='add'>+		 HDR_LEN_L2_MACS &gt;&gt; 1);</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_inline_v3, d_action, inline_data, vlan_hdr);</div><div class='add'>+	dr_ste_v1_set_reparse(ste);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dr_ste_v3_set_pop_vlan(u8 *hw_ste_p, u8 *s_action,</div><div class='add'>+				   u8 vlans_num)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,</div><div class='add'>+		 action_id, DR_STE_V1_ACTION_ID_REMOVE_BY_SIZE);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,</div><div class='add'>+		 start_anchor, DR_STE_HEADER_ANCHOR_1ST_VLAN);</div><div class='add'>+	/* The hardware expects here size in words (2 byte) */</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,</div><div class='add'>+		 remove_size, (HDR_LEN_L2_VLAN &gt;&gt; 1) * vlans_num);</div><div class='add'>+</div><div class='add'>+	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dr_ste_v3_set_encap_l3(u8 *hw_ste_p,</div><div class='add'>+				   u8 *frst_s_action,</div><div class='add'>+				   u8 *scnd_d_action,</div><div class='add'>+				   u32 reformat_id,</div><div class='add'>+				   int size)</div><div class='add'>+{</div><div class='add'>+	/* Remove L2 headers */</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_v3, frst_s_action, action_id,</div><div class='add'>+		 DR_STE_V1_ACTION_ID_REMOVE_HEADER_TO_HEADER);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_v3, frst_s_action, end_anchor,</div><div class='add'>+		 DR_STE_HEADER_ANCHOR_IPV6_IPV4);</div><div class='add'>+</div><div class='add'>+	/* Encapsulate with given reformat ID */</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, scnd_d_action, action_id,</div><div class='add'>+		 DR_STE_V1_ACTION_ID_INSERT_POINTER);</div><div class='add'>+	/* The hardware expects here size in words (2 byte) */</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, scnd_d_action, size, size / 2);</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, scnd_d_action, pointer, reformat_id);</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, scnd_d_action, attributes,</div><div class='add'>+		 DR_STE_V1_ACTION_INSERT_PTR_ATTR_ENCAP);</div><div class='add'>+</div><div class='add'>+	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dr_ste_v3_set_rx_decap(u8 *hw_ste_p, u8 *s_action)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_v3, s_action, action_id,</div><div class='add'>+		 DR_STE_V1_ACTION_ID_REMOVE_HEADER_TO_HEADER);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_v3, s_action, decap, 1);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_v3, s_action, vni_to_cqe, 1);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_v3, s_action, end_anchor,</div><div class='add'>+		 DR_STE_HEADER_ANCHOR_INNER_MAC);</div><div class='add'>+</div><div class='add'>+	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dr_ste_v3_set_insert_hdr(u8 *hw_ste_p, u8 *d_action,</div><div class='add'>+				     u32 reformat_id, u8 anchor,</div><div class='add'>+				     u8 offset, int size)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,</div><div class='add'>+		 action_id, DR_STE_V1_ACTION_ID_INSERT_POINTER);</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,</div><div class='add'>+		 start_anchor, anchor);</div><div class='add'>+</div><div class='add'>+	/* The hardware expects here size and offset in words (2 byte) */</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,</div><div class='add'>+		 size, size / 2);</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,</div><div class='add'>+		 start_offset, offset / 2);</div><div class='add'>+</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,</div><div class='add'>+		 pointer, reformat_id);</div><div class='add'>+	MLX5_SET(ste_double_action_insert_with_ptr_v3, d_action,</div><div class='add'>+		 attributes, DR_STE_V1_ACTION_INSERT_PTR_ATTR_NONE);</div><div class='add'>+</div><div class='add'>+	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dr_ste_v3_set_remove_hdr(u8 *hw_ste_p, u8 *s_action,</div><div class='add'>+				     u8 anchor, u8 offset, int size)</div><div class='add'>+{</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,</div><div class='add'>+		 action_id, DR_STE_V1_ACTION_ID_REMOVE_BY_SIZE);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,</div><div class='add'>+		 start_anchor, anchor);</div><div class='add'>+</div><div class='add'>+	/* The hardware expects here size and offset in words (2 byte) */</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,</div><div class='add'>+		 remove_size, size / 2);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_size_v3, s_action,</div><div class='add'>+		 start_offset, offset / 2);</div><div class='add'>+</div><div class='add'>+	dr_ste_v1_set_reparse(hw_ste_p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+dr_ste_v3_set_action_decap_l3_list(void *data, u32 data_sz,</div><div class='add'>+				   u8 *hw_action, u32 hw_action_sz,</div><div class='add'>+				   uint16_t *used_hw_action_num)</div><div class='add'>+{</div><div class='add'>+	u8 padded_data[DR_STE_L2_HDR_MAX_SZ] = {};</div><div class='add'>+	void *data_ptr = padded_data;</div><div class='add'>+	u16 used_actions = 0;</div><div class='add'>+	u32 inline_data_sz;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	if (hw_action_sz / DR_STE_ACTION_DOUBLE_SZ &lt; DR_STE_DECAP_L3_ACTION_NUM)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	inline_data_sz =</div><div class='add'>+		MLX5_FLD_SZ_BYTES(ste_double_action_insert_with_inline_v3, inline_data);</div><div class='add'>+</div><div class='add'>+	/* Add an alignment padding  */</div><div class='add'>+	memcpy(padded_data + data_sz % inline_data_sz, data, data_sz);</div><div class='add'>+</div><div class='add'>+	/* Remove L2L3 outer headers */</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_v3, hw_action, action_id,</div><div class='add'>+		 DR_STE_V1_ACTION_ID_REMOVE_HEADER_TO_HEADER);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_v3, hw_action, decap, 1);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_v3, hw_action, vni_to_cqe, 1);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_v3, hw_action, end_anchor,</div><div class='add'>+		 DR_STE_HEADER_ANCHOR_INNER_IPV6_IPV4);</div><div class='add'>+	hw_action += DR_STE_ACTION_DOUBLE_SZ;</div><div class='add'>+	used_actions++; /* Remove and NOP are a single double action */</div><div class='add'>+</div><div class='add'>+	/* Point to the last dword of the header */</div><div class='add'>+	data_ptr += (data_sz / inline_data_sz) * inline_data_sz;</div><div class='add'>+</div><div class='add'>+	/* Add the new header using inline action 4Byte at a time, the header</div><div class='add'>+	 * is added in reversed order to the beginning of the packet to avoid</div><div class='add'>+	 * incorrect parsing by the HW. Since header is 14B or 18B an extra</div><div class='add'>+	 * two bytes are padded and later removed.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; data_sz / inline_data_sz + 1; i++) {</div><div class='add'>+		void *addr_inline;</div><div class='add'>+</div><div class='add'>+		MLX5_SET(ste_double_action_insert_with_inline_v3, hw_action, action_id,</div><div class='add'>+			 DR_STE_V1_ACTION_ID_INSERT_INLINE);</div><div class='add'>+		/* The hardware expects here offset to words (2 bytes) */</div><div class='add'>+		MLX5_SET(ste_double_action_insert_with_inline_v3, hw_action, start_offset, 0);</div><div class='add'>+</div><div class='add'>+		/* Copy bytes one by one to avoid endianness problem */</div><div class='add'>+		addr_inline = MLX5_ADDR_OF(ste_double_action_insert_with_inline_v3,</div><div class='add'>+					   hw_action, inline_data);</div><div class='add'>+		memcpy(addr_inline, data_ptr - i * inline_data_sz, inline_data_sz);</div><div class='add'>+		hw_action += DR_STE_ACTION_DOUBLE_SZ;</div><div class='add'>+		used_actions++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Remove first 2 extra bytes */</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_size_v3, hw_action, action_id,</div><div class='add'>+		 DR_STE_V1_ACTION_ID_REMOVE_BY_SIZE);</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_size_v3, hw_action, start_offset, 0);</div><div class='add'>+	/* The hardware expects here size in words (2 bytes) */</div><div class='add'>+	MLX5_SET(ste_single_action_remove_header_size_v3, hw_action, remove_size, 1);</div><div class='add'>+	used_actions++;</div><div class='add'>+</div><div class='add'>+	*used_hw_action_num = used_actions;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mlx5dr_ste_ctx ste_ctx_v3 = {</div><div class='add'>+	/* Builders */</div><div class='add'>+	.build_eth_l2_src_dst_init	= &amp;dr_ste_v1_build_eth_l2_src_dst_init,</div><div class='add'>+	.build_eth_l3_ipv6_src_init	= &amp;dr_ste_v1_build_eth_l3_ipv6_src_init,</div><div class='add'>+	.build_eth_l3_ipv6_dst_init	= &amp;dr_ste_v1_build_eth_l3_ipv6_dst_init,</div><div class='add'>+	.build_eth_l3_ipv4_5_tuple_init	= &amp;dr_ste_v1_build_eth_l3_ipv4_5_tuple_init,</div><div class='add'>+	.build_eth_l2_src_init		= &amp;dr_ste_v1_build_eth_l2_src_init,</div><div class='add'>+	.build_eth_l2_dst_init		= &amp;dr_ste_v1_build_eth_l2_dst_init,</div><div class='add'>+	.build_eth_l2_tnl_init		= &amp;dr_ste_v1_build_eth_l2_tnl_init,</div><div class='add'>+	.build_eth_l3_ipv4_misc_init	= &amp;dr_ste_v1_build_eth_l3_ipv4_misc_init,</div><div class='add'>+	.build_eth_ipv6_l3_l4_init	= &amp;dr_ste_v1_build_eth_ipv6_l3_l4_init,</div><div class='add'>+	.build_mpls_init		= &amp;dr_ste_v1_build_mpls_init,</div><div class='add'>+	.build_tnl_gre_init		= &amp;dr_ste_v1_build_tnl_gre_init,</div><div class='add'>+	.build_tnl_mpls_init		= &amp;dr_ste_v1_build_tnl_mpls_init,</div><div class='add'>+	.build_tnl_mpls_over_udp_init	= &amp;dr_ste_v1_build_tnl_mpls_over_udp_init,</div><div class='add'>+	.build_tnl_mpls_over_gre_init	= &amp;dr_ste_v1_build_tnl_mpls_over_gre_init,</div><div class='add'>+	.build_icmp_init		= &amp;dr_ste_v1_build_icmp_init,</div><div class='add'>+	.build_general_purpose_init	= &amp;dr_ste_v1_build_general_purpose_init,</div><div class='add'>+	.build_eth_l4_misc_init		= &amp;dr_ste_v1_build_eth_l4_misc_init,</div><div class='add'>+	.build_tnl_vxlan_gpe_init	= &amp;dr_ste_v1_build_flex_parser_tnl_vxlan_gpe_init,</div><div class='add'>+	.build_tnl_geneve_init		= &amp;dr_ste_v1_build_flex_parser_tnl_geneve_init,</div><div class='add'>+	.build_tnl_geneve_tlv_opt_init	= &amp;dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_init,</div><div class='add'>+	.build_tnl_geneve_tlv_opt_exist_init =</div><div class='add'>+				  &amp;dr_ste_v1_build_flex_parser_tnl_geneve_tlv_opt_exist_init,</div><div class='add'>+	.build_register_0_init		= &amp;dr_ste_v1_build_register_0_init,</div><div class='add'>+	.build_register_1_init		= &amp;dr_ste_v1_build_register_1_init,</div><div class='add'>+	.build_src_gvmi_qpn_init	= &amp;dr_ste_v1_build_src_gvmi_qpn_init,</div><div class='add'>+	.build_flex_parser_0_init	= &amp;dr_ste_v1_build_flex_parser_0_init,</div><div class='add'>+	.build_flex_parser_1_init	= &amp;dr_ste_v1_build_flex_parser_1_init,</div><div class='add'>+	.build_tnl_gtpu_init		= &amp;dr_ste_v1_build_flex_parser_tnl_gtpu_init,</div><div class='add'>+	.build_tnl_header_0_1_init	= &amp;dr_ste_v1_build_tnl_header_0_1_init,</div><div class='add'>+	.build_tnl_gtpu_flex_parser_0_init = &amp;dr_ste_v1_build_tnl_gtpu_flex_parser_0_init,</div><div class='add'>+	.build_tnl_gtpu_flex_parser_1_init = &amp;dr_ste_v1_build_tnl_gtpu_flex_parser_1_init,</div><div class='add'>+</div><div class='add'>+	/* Getters and Setters */</div><div class='add'>+	.ste_init			= &amp;dr_ste_v1_init,</div><div class='add'>+	.set_next_lu_type		= &amp;dr_ste_v1_set_next_lu_type,</div><div class='add'>+	.get_next_lu_type		= &amp;dr_ste_v1_get_next_lu_type,</div><div class='add'>+	.is_miss_addr_set		= &amp;dr_ste_v1_is_miss_addr_set,</div><div class='add'>+	.set_miss_addr			= &amp;dr_ste_v1_set_miss_addr,</div><div class='add'>+	.get_miss_addr			= &amp;dr_ste_v1_get_miss_addr,</div><div class='add'>+	.set_hit_addr			= &amp;dr_ste_v1_set_hit_addr,</div><div class='add'>+	.set_byte_mask			= &amp;dr_ste_v1_set_byte_mask,</div><div class='add'>+	.get_byte_mask			= &amp;dr_ste_v1_get_byte_mask,</div><div class='add'>+</div><div class='add'>+	/* Actions */</div><div class='add'>+	.actions_caps			= DR_STE_CTX_ACTION_CAP_TX_POP |</div><div class='add'>+					  DR_STE_CTX_ACTION_CAP_RX_PUSH |</div><div class='add'>+					  DR_STE_CTX_ACTION_CAP_RX_ENCAP,</div><div class='add'>+	.set_actions_rx			= &amp;dr_ste_v1_set_actions_rx,</div><div class='add'>+	.set_actions_tx			= &amp;dr_ste_v1_set_actions_tx,</div><div class='add'>+	.modify_field_arr_sz		= ARRAY_SIZE(dr_ste_v2_action_modify_field_arr),</div><div class='add'>+	.modify_field_arr		= dr_ste_v2_action_modify_field_arr,</div><div class='add'>+	.set_action_set			= &amp;dr_ste_v1_set_action_set,</div><div class='add'>+	.set_action_add			= &amp;dr_ste_v1_set_action_add,</div><div class='add'>+	.set_action_copy		= &amp;dr_ste_v1_set_action_copy,</div><div class='add'>+	.set_action_decap_l3_list	= &amp;dr_ste_v3_set_action_decap_l3_list,</div><div class='add'>+	.alloc_modify_hdr_chunk		= &amp;dr_ste_v1_alloc_modify_hdr_ptrn_arg,</div><div class='add'>+	.dealloc_modify_hdr_chunk	= &amp;dr_ste_v1_free_modify_hdr_ptrn_arg,</div><div class='add'>+	/* Actions bit set */</div><div class='add'>+	.set_encap			= &amp;dr_ste_v3_set_encap,</div><div class='add'>+	.set_push_vlan			= &amp;dr_ste_v3_set_push_vlan,</div><div class='add'>+	.set_pop_vlan			= &amp;dr_ste_v3_set_pop_vlan,</div><div class='add'>+	.set_rx_decap			= &amp;dr_ste_v3_set_rx_decap,</div><div class='add'>+	.set_encap_l3			= &amp;dr_ste_v3_set_encap_l3,</div><div class='add'>+	.set_insert_hdr			= &amp;dr_ste_v3_set_insert_hdr,</div><div class='add'>+	.set_remove_hdr			= &amp;dr_ste_v3_set_remove_hdr,</div><div class='add'>+	/* Send */</div><div class='add'>+	.prepare_for_postsend		= &amp;dr_ste_v1_prepare_for_postsend,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx_v3(void)</div><div class='add'>+{</div><div class='add'>+	return &amp;ste_ctx_v3;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_table.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_table.c<br/>index 69294a66fd7f..69294a66fd7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_table.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_table.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_table.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_table.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_types.h<br/>index 7618c6147f86..cc328292bf84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_types.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_types.h</a></div><div class='hunk'>@@ -1473,7 +1473,6 @@ struct mlx5dr_send_ring {</div><div class='ctx'> int mlx5dr_send_ring_alloc(struct mlx5dr_domain *dmn);</div><div class='ctx'> void mlx5dr_send_ring_free(struct mlx5dr_domain *dmn,</div><div class='ctx'> 			   struct mlx5dr_send_ring *send_ring);</div><div class='del'>-int mlx5dr_send_ring_force_drain(struct mlx5dr_domain *dmn);</div><div class='ctx'> int mlx5dr_send_postsend_ste(struct mlx5dr_domain *dmn,</div><div class='ctx'> 			     struct mlx5dr_ste *ste,</div><div class='ctx'> 			     u8 *data,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/fs_dr.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.c<br/>index 4b349d4005e4..f367997ab61e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/fs_dr.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/fs_dr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.c</a></div><div class='hunk'>@@ -521,7 +521,7 @@ static int mlx5_cmd_dr_create_fte(struct mlx5_flow_root_namespace *ns,</div><div class='ctx'> 				goto free_actions;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			id = dst-&gt;dest_attr.counter_id;</div><div class='add'>+			id = mlx5_fc_id(dst-&gt;dest_attr.counter);</div><div class='ctx'> 			tmp_action =</div><div class='ctx'> 				mlx5dr_action_create_flow_counter(id);</div><div class='ctx'> 			if (!tmp_action) {</div><div class='hunk'>@@ -833,15 +833,21 @@ static u32 mlx5_cmd_dr_get_capabilities(struct mlx5_flow_root_namespace *ns,</div><div class='ctx'> 	return steering_caps;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5_fs_dr_action_get_pkt_reformat_id(struct mlx5_pkt_reformat *pkt_reformat)</div><div class='add'>+int</div><div class='add'>+mlx5_fs_dr_action_get_pkt_reformat_id(struct mlx5_pkt_reformat *pkt_reformat,</div><div class='add'>+				      u32 *reformat_id)</div><div class='ctx'> {</div><div class='add'>+	struct mlx5dr_action *dr_action;</div><div class='add'>+</div><div class='ctx'> 	switch (pkt_reformat-&gt;reformat_type) {</div><div class='ctx'> 	case MLX5_REFORMAT_TYPE_L2_TO_VXLAN:</div><div class='ctx'> 	case MLX5_REFORMAT_TYPE_L2_TO_NVGRE:</div><div class='ctx'> 	case MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL:</div><div class='ctx'> 	case MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL:</div><div class='ctx'> 	case MLX5_REFORMAT_TYPE_INSERT_HDR:</div><div class='del'>-		return mlx5dr_action_get_pkt_reformat_id(pkt_reformat-&gt;fs_dr_action.dr_action);</div><div class='add'>+		dr_action = pkt_reformat-&gt;fs_dr_action.dr_action;</div><div class='add'>+		*reformat_id = mlx5dr_action_get_pkt_reformat_id(dr_action);</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/fs_dr.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.h<br/>index 99a3b2eff6b8..f869f2daefbf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/fs_dr.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/fs_dr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.h</a></div><div class='hunk'>@@ -38,7 +38,9 @@ struct mlx5_fs_dr_table {</div><div class='ctx'> </div><div class='ctx'> bool mlx5_fs_dr_is_supported(struct mlx5_core_dev *dev);</div><div class='ctx'> </div><div class='del'>-int mlx5_fs_dr_action_get_pkt_reformat_id(struct mlx5_pkt_reformat *pkt_reformat);</div><div class='add'>+int</div><div class='add'>+mlx5_fs_dr_action_get_pkt_reformat_id(struct mlx5_pkt_reformat *pkt_reformat,</div><div class='add'>+				      u32 *reformat_id);</div><div class='ctx'> </div><div class='ctx'> const struct mlx5_flow_cmds *mlx5_fs_cmd_get_dr_cmds(void);</div><div class='ctx'> </div><div class='hunk'>@@ -49,9 +51,11 @@ static inline const struct mlx5_flow_cmds *mlx5_fs_cmd_get_dr_cmds(void)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 mlx5_fs_dr_action_get_pkt_reformat_id(struct mlx5_pkt_reformat *pkt_reformat)</div><div class='add'>+static inline int</div><div class='add'>+mlx5_fs_dr_action_get_pkt_reformat_id(struct mlx5_pkt_reformat *pkt_reformat,</div><div class='add'>+				      u32 *reformat_id)</div><div class='ctx'> {</div><div class='del'>-	return 0;</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline bool mlx5_fs_dr_is_supported(struct mlx5_core_dev *dev)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr.h<br/>index fb078fa0f0cc..898c3618ff26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr.h</a></div><div class='hunk'>@@ -600,4 +600,44 @@ struct mlx5_ifc_ste_double_action_aso_v1_bits {</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mlx5_ifc_ste_single_action_remove_header_v3_bits {</div><div class='add'>+	u8         action_id[0x8];</div><div class='add'>+	u8         start_anchor[0x7];</div><div class='add'>+	u8         end_anchor[0x7];</div><div class='add'>+	u8         reserved_at_16[0x1];</div><div class='add'>+	u8         outer_l4_remove[0x1];</div><div class='add'>+	u8         reserved_at_18[0x4];</div><div class='add'>+	u8         decap[0x1];</div><div class='add'>+	u8         vni_to_cqe[0x1];</div><div class='add'>+	u8         qos_profile[0x2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_ste_single_action_remove_header_size_v3_bits {</div><div class='add'>+	u8         action_id[0x8];</div><div class='add'>+	u8         start_anchor[0x7];</div><div class='add'>+	u8         start_offset[0x8];</div><div class='add'>+	u8         outer_l4_remove[0x1];</div><div class='add'>+	u8         reserved_at_18[0x2];</div><div class='add'>+	u8         remove_size[0x6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_ste_double_action_insert_with_inline_v3_bits {</div><div class='add'>+	u8         action_id[0x8];</div><div class='add'>+	u8         start_anchor[0x7];</div><div class='add'>+	u8         start_offset[0x8];</div><div class='add'>+	u8         reserved_at_17[0x9];</div><div class='add'>+</div><div class='add'>+	u8         inline_data[0x20];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mlx5_ifc_ste_double_action_insert_with_ptr_v3_bits {</div><div class='add'>+	u8         action_id[0x8];</div><div class='add'>+	u8         start_anchor[0x7];</div><div class='add'>+	u8         start_offset[0x8];</div><div class='add'>+	u8         size[0x6];</div><div class='add'>+	u8         attributes[0x3];</div><div class='add'>+</div><div class='add'>+	u8         pointer[0x20];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* MLX5_IFC_DR_H */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr_ste_v1.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr_ste_v1.h<br/>index ca3b0f1453a7..ca3b0f1453a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr_ste_v1.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr_ste_v1.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr_ste_v1.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr_ste_v1.h</a></div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5dr.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5dr.h<br/>index 3ac7dc67509f..fc8a2169d1a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5dr.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5dr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5dr.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5dr.h</a></div><div class='hunk'>@@ -45,8 +45,6 @@ mlx5dr_domain_create(struct mlx5_core_dev *mdev, enum mlx5dr_domain_type type);</div><div class='ctx'> </div><div class='ctx'> int mlx5dr_domain_destroy(struct mlx5dr_domain *domain);</div><div class='ctx'> </div><div class='del'>-int mlx5dr_domain_sync(struct mlx5dr_domain *domain, u32 flags);</div><div class='del'>-</div><div class='ctx'> void mlx5dr_domain_set_peer(struct mlx5dr_domain *dmn,</div><div class='ctx'> 			    struct mlx5dr_domain *peer_dmn,</div><div class='ctx'> 			    u16 peer_vhca_id);</div><div class='hunk'>@@ -160,7 +158,7 @@ mlx5dr_is_supported(struct mlx5_core_dev *dev)</div><div class='ctx'> 	       (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, sw_owner) ||</div><div class='ctx'> 		(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, sw_owner_v2) &amp;&amp;</div><div class='ctx'> 		 (MLX5_CAP_GEN(dev, steering_format_version) &lt;=</div><div class='del'>-		  MLX5_STEERING_FORMAT_CONNECTX_7)));</div><div class='add'>+		  MLX5_STEERING_FORMAT_CONNECTX_8)));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* buddy functions &amp; structure */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/vport.c b/drivers/net/ethernet/mellanox/mlx5/core/vport.c<br/>index 0d5f750faa45..306affbcfd3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/vport.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/vport.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/vport.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/vport.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include &lt;linux/mlx5/vport.h&gt;</div><div class='ctx'> #include &lt;linux/mlx5/eswitch.h&gt;</div><div class='ctx'> #include "mlx5_core.h"</div><div class='add'>+#include "eswitch.h"</div><div class='ctx'> #include "sf/sf.h"</div><div class='ctx'> </div><div class='ctx'> /* Mutex to hold while enabling or disabling RoCE */</div><div class='hunk'>@@ -77,15 +78,14 @@ int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_query_nic_vport_context(struct mlx5_core_dev *mdev, u16 vport,</div><div class='del'>-					u32 *out)</div><div class='add'>+					bool other_vport, u32 *out)</div><div class='ctx'> {</div><div class='ctx'> 	u32 in[MLX5_ST_SZ_DW(query_nic_vport_context_in)] = {};</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(query_nic_vport_context_in, in, opcode,</div><div class='ctx'> 		 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT);</div><div class='ctx'> 	MLX5_SET(query_nic_vport_context_in, in, vport_number, vport);</div><div class='del'>-	if (vport)</div><div class='del'>-		MLX5_SET(query_nic_vport_context_in, in, other_vport, 1);</div><div class='add'>+	MLX5_SET(query_nic_vport_context_in, in, other_vport, other_vport);</div><div class='ctx'> </div><div class='ctx'> 	return mlx5_cmd_exec_inout(mdev, query_nic_vport_context, in, out);</div><div class='ctx'> }</div><div class='hunk'>@@ -96,7 +96,7 @@ int mlx5_query_nic_vport_min_inline(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	u32 out[MLX5_ST_SZ_DW(query_nic_vport_context_out)] = {};</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_query_nic_vport_context(mdev, vport, out);</div><div class='add'>+	err = mlx5_query_nic_vport_context(mdev, vport, vport &gt; 0, out);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		*min_inline = MLX5_GET(query_nic_vport_context_out, out,</div><div class='ctx'> 				       nic_vport_context.min_wqe_inline_mode);</div><div class='hunk'>@@ -218,7 +218,7 @@ int mlx5_query_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 *mtu)</div><div class='ctx'> 	if (!out)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_query_nic_vport_context(mdev, 0, out);</div><div class='add'>+	err = mlx5_query_nic_vport_context(mdev, 0, false, out);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		*mtu = MLX5_GET(query_nic_vport_context_out, out,</div><div class='ctx'> 				nic_vport_context.mtu);</div><div class='hunk'>@@ -428,7 +428,7 @@ int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	if (!out)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_query_nic_vport_context(mdev, 0, out);</div><div class='add'>+	err = mlx5_query_nic_vport_context(mdev, 0, false, out);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -450,7 +450,7 @@ int mlx5_query_nic_vport_sd_group(struct mlx5_core_dev *mdev, u8 *sd_group)</div><div class='ctx'> 	if (!out)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_query_nic_vport_context(mdev, 0, out);</div><div class='add'>+	err = mlx5_query_nic_vport_context(mdev, 0, false, out);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -461,23 +461,27 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid)</div><div class='add'>+int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev,</div><div class='add'>+				   u16 vport, bool other_vport, u64 *node_guid)</div><div class='ctx'> {</div><div class='ctx'> 	u32 *out;</div><div class='ctx'> 	int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	out = kvzalloc(outlen, GFP_KERNEL);</div><div class='ctx'> 	if (!out)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	mlx5_query_nic_vport_context(mdev, 0, out);</div><div class='add'>+	err = mlx5_query_nic_vport_context(mdev, vport, other_vport, out);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	*node_guid = MLX5_GET64(query_nic_vport_context_out, out,</div><div class='ctx'> 				nic_vport_context.node_guid);</div><div class='del'>-</div><div class='add'>+out:</div><div class='ctx'> 	kvfree(out);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);</div><div class='ctx'> </div><div class='hunk'>@@ -519,19 +523,22 @@ int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,</div><div class='ctx'> {</div><div class='ctx'> 	u32 *out;</div><div class='ctx'> 	int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	out = kvzalloc(outlen, GFP_KERNEL);</div><div class='ctx'> 	if (!out)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	mlx5_query_nic_vport_context(mdev, 0, out);</div><div class='add'>+	err = mlx5_query_nic_vport_context(mdev, 0, false, out);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	*qkey_viol_cntr = MLX5_GET(query_nic_vport_context_out, out,</div><div class='ctx'> 				   nic_vport_context.qkey_violation_counter);</div><div class='del'>-</div><div class='add'>+out:</div><div class='ctx'> 	kvfree(out);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_qkey_viol_cntr);</div><div class='ctx'> </div><div class='hunk'>@@ -797,7 +804,7 @@ int mlx5_query_nic_vport_promisc(struct mlx5_core_dev *mdev,</div><div class='ctx'> 	if (!out)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_query_nic_vport_context(mdev, vport, out);</div><div class='add'>+	err = mlx5_query_nic_vport_context(mdev, vport, vport &gt; 0, out);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -901,7 +908,7 @@ int mlx5_nic_vport_query_local_lb(struct mlx5_core_dev *mdev, bool *status)</div><div class='ctx'> 	if (!out)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	err = mlx5_query_nic_vport_context(mdev, 0, out);</div><div class='add'>+	err = mlx5_query_nic_vport_context(mdev, 0, false, out);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -1183,27 +1190,101 @@ u64 mlx5_query_nic_system_image_guid(struct mlx5_core_dev *mdev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx5_query_nic_system_image_guid);</div><div class='ctx'> </div><div class='add'>+void mlx5_query_nic_sw_system_image_guid(struct mlx5_core_dev *mdev, u8 *buf,</div><div class='add'>+					 u8 *len)</div><div class='add'>+{</div><div class='add'>+	u64 fw_system_image_guid;</div><div class='add'>+</div><div class='add'>+	*len = 0;</div><div class='add'>+</div><div class='add'>+	fw_system_image_guid = mlx5_query_nic_system_image_guid(mdev);</div><div class='add'>+	if (!fw_system_image_guid)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	memcpy(buf, &amp;fw_system_image_guid, sizeof(fw_system_image_guid));</div><div class='add'>+	*len += sizeof(fw_system_image_guid);</div><div class='add'>+</div><div class='add'>+	if (MLX5_CAP_GEN_2(mdev, load_balance_id) &amp;&amp;</div><div class='add'>+	    MLX5_CAP_GEN_2(mdev, lag_per_mp_group))</div><div class='add'>+		buf[(*len)++] = MLX5_CAP_GEN_2(mdev, load_balance_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mlx5_vport_use_vhca_id_as_func_id(struct mlx5_core_dev *dev,</div><div class='add'>+					      u16 vport_num, u16 *vhca_id)</div><div class='add'>+{</div><div class='add'>+	if (!MLX5_CAP_GEN_2(dev, function_id_type_vhca_id))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return mlx5_esw_vport_vhca_id(dev-&gt;priv.eswitch, vport_num, vhca_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mlx5_vport_get_other_func_cap(struct mlx5_core_dev *dev, u16 vport, void *out,</div><div class='ctx'> 				  u16 opmod)</div><div class='ctx'> {</div><div class='del'>-	bool ec_vf_func = mlx5_core_is_ec_vf_vport(dev, vport);</div><div class='ctx'> 	u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)] = {};</div><div class='add'>+	u16 vhca_id = 0, function_id = 0;</div><div class='add'>+	bool ec_vf_func = false;</div><div class='add'>+</div><div class='add'>+	/* if this vport is referring to a vport on the ec PF (embedded cpu )</div><div class='add'>+	 * let the FW know which domain we are querying since vport numbers or</div><div class='add'>+	 * function_ids are not unique across the different PF domains,</div><div class='add'>+	 * unless we use vhca_id as the function_id below.</div><div class='add'>+	 */</div><div class='add'>+	ec_vf_func = mlx5_core_is_ec_vf_vport(dev, vport);</div><div class='add'>+	function_id = mlx5_vport_to_func_id(dev, vport, ec_vf_func);</div><div class='add'>+</div><div class='add'>+	if (mlx5_vport_use_vhca_id_as_func_id(dev, vport, &amp;vhca_id)) {</div><div class='add'>+		MLX5_SET(query_hca_cap_in, in, function_id_type, 1);</div><div class='add'>+		function_id = vhca_id;</div><div class='add'>+		ec_vf_func = false;</div><div class='add'>+		mlx5_core_dbg(dev, "%s using vhca_id as function_id for vport %d vhca_id 0x%x\n",</div><div class='add'>+			      __func__, vport, vhca_id);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	opmod = (opmod &lt;&lt; 1) | (HCA_CAP_OPMOD_GET_MAX &amp; 0x01);</div><div class='ctx'> 	MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);</div><div class='ctx'> 	MLX5_SET(query_hca_cap_in, in, op_mod, opmod);</div><div class='del'>-	MLX5_SET(query_hca_cap_in, in, function_id, mlx5_vport_to_func_id(dev, vport, ec_vf_func));</div><div class='ctx'> 	MLX5_SET(query_hca_cap_in, in, other_function, true);</div><div class='ctx'> 	MLX5_SET(query_hca_cap_in, in, ec_vf_function, ec_vf_func);</div><div class='add'>+	MLX5_SET(query_hca_cap_in, in, function_id, function_id);</div><div class='ctx'> 	return mlx5_cmd_exec_inout(dev, query_hca_cap, in, out);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(mlx5_vport_get_other_func_cap);</div><div class='ctx'> </div><div class='add'>+int mlx5_vport_get_vhca_id(struct mlx5_core_dev *dev, u16 vport, u16 *vhca_id)</div><div class='add'>+{</div><div class='add'>+	int query_out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out);</div><div class='add'>+	void *query_ctx;</div><div class='add'>+	void *hca_caps;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* try get vhca_id via eswitch */</div><div class='add'>+	if (mlx5_esw_vport_vhca_id(dev-&gt;priv.eswitch, vport, vhca_id))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	query_ctx = kzalloc(query_out_sz, GFP_KERNEL);</div><div class='add'>+	if (!query_ctx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = mlx5_vport_get_other_func_general_cap(dev, vport, query_ctx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free;</div><div class='add'>+</div><div class='add'>+	hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);</div><div class='add'>+	*vhca_id = MLX5_GET(cmd_hca_cap, hca_caps, vhca_id);</div><div class='add'>+</div><div class='add'>+out_free:</div><div class='add'>+	kfree(query_ctx);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mlx5_vport_get_vhca_id);</div><div class='add'>+</div><div class='ctx'> int mlx5_vport_set_other_func_cap(struct mlx5_core_dev *dev, const void *hca_cap,</div><div class='ctx'> 				  u16 vport, u16 opmod)</div><div class='ctx'> {</div><div class='del'>-	bool ec_vf_func = mlx5_core_is_ec_vf_vport(dev, vport);</div><div class='ctx'> 	int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in);</div><div class='add'>+	u16 vhca_id = 0, function_id = 0;</div><div class='add'>+	bool ec_vf_func = false;</div><div class='ctx'> 	void *set_hca_cap;</div><div class='ctx'> 	void *set_ctx;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1212,14 +1293,29 @@ int mlx5_vport_set_other_func_cap(struct mlx5_core_dev *dev, const void *hca_cap</div><div class='ctx'> 	if (!set_ctx)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	/* if this vport is referring to a vport on the ec PF (embedded cpu )</div><div class='add'>+	 * let the FW know which domain we are querying since vport numbers or</div><div class='add'>+	 * function_ids are not unique across the different PF domains,</div><div class='add'>+	 * unless we use vhca_id as the function_id below.</div><div class='add'>+	 */</div><div class='add'>+	ec_vf_func = mlx5_core_is_ec_vf_vport(dev, vport);</div><div class='add'>+	function_id = mlx5_vport_to_func_id(dev, vport, ec_vf_func);</div><div class='add'>+</div><div class='add'>+	if (mlx5_vport_use_vhca_id_as_func_id(dev, vport, &amp;vhca_id)) {</div><div class='add'>+		MLX5_SET(set_hca_cap_in, set_ctx, function_id_type, 1);</div><div class='add'>+		function_id = vhca_id;</div><div class='add'>+		ec_vf_func = false;</div><div class='add'>+		mlx5_core_dbg(dev, "%s using vhca_id as function_id for vport %d vhca_id 0x%x\n",</div><div class='add'>+			      __func__, vport, vhca_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	MLX5_SET(set_hca_cap_in, set_ctx, opcode, MLX5_CMD_OP_SET_HCA_CAP);</div><div class='ctx'> 	MLX5_SET(set_hca_cap_in, set_ctx, op_mod, opmod &lt;&lt; 1);</div><div class='ctx'> 	set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability);</div><div class='ctx'> 	memcpy(set_hca_cap, hca_cap, MLX5_ST_SZ_BYTES(cmd_hca_cap));</div><div class='del'>-	MLX5_SET(set_hca_cap_in, set_ctx, function_id,</div><div class='del'>-		 mlx5_vport_to_func_id(dev, vport, ec_vf_func));</div><div class='ctx'> 	MLX5_SET(set_hca_cap_in, set_ctx, other_function, true);</div><div class='ctx'> 	MLX5_SET(set_hca_cap_in, set_ctx, ec_vf_function, ec_vf_func);</div><div class='add'>+	MLX5_SET(set_hca_cap_in, set_ctx, function_id, function_id);</div><div class='ctx'> 	ret = mlx5_cmd_exec_in(dev, set_hca_cap, set_ctx);</div><div class='ctx'> </div><div class='ctx'> 	kfree(set_ctx);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlx5/core/wc.c b/drivers/net/ethernet/mellanox/mlx5/core/wc.c<br/>index 1bed75eca97d..815a7c97d6b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/wc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlx5/core/wc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlx5/core/wc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlx5/core/wc.c</a></div><div class='hunk'>@@ -7,6 +7,11 @@</div><div class='ctx'> #include "mlx5_core.h"</div><div class='ctx'> #include "wq.h"</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; IS_ENABLED(CONFIG_ARM64)</div><div class='add'>+#include &lt;asm/neon.h&gt;</div><div class='add'>+#include &lt;asm/simd.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #define TEST_WC_NUM_WQES 255</div><div class='ctx'> #define TEST_WC_LOG_CQ_SZ (order_base_2(TEST_WC_NUM_WQES))</div><div class='ctx'> #define TEST_WC_SQ_LOG_WQ_SZ TEST_WC_LOG_CQ_SZ</div><div class='hunk'>@@ -94,7 +99,7 @@ static int create_wc_cq(struct mlx5_wc_cq *cq, void *cqc_data)</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(cqc,   cqc, cq_period_mode, MLX5_CQ_PERIOD_MODE_START_FROM_EQE);</div><div class='ctx'> 	MLX5_SET(cqc,   cqc, c_eqn_or_apu_element, eqn);</div><div class='del'>-	MLX5_SET(cqc,   cqc, uar_page,      mdev-&gt;priv.uar-&gt;index);</div><div class='add'>+	MLX5_SET(cqc,   cqc, uar_page,      mdev-&gt;priv.bfreg.up-&gt;index);</div><div class='ctx'> 	MLX5_SET(cqc,   cqc, log_page_size, cq-&gt;wq_ctrl.buf.page_shift -</div><div class='ctx'> 					    MLX5_ADAPTER_PAGE_SHIFT);</div><div class='ctx'> 	MLX5_SET64(cqc, cqc, dbr_addr,      cq-&gt;wq_ctrl.db.dma);</div><div class='hunk'>@@ -116,7 +121,7 @@ static int mlx5_wc_create_cq(struct mlx5_core_dev *mdev, struct mlx5_wc_cq *cq)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	MLX5_SET(cqc, cqc, log_cq_size, TEST_WC_LOG_CQ_SZ);</div><div class='del'>-	MLX5_SET(cqc, cqc, uar_page, mdev-&gt;priv.uar-&gt;index);</div><div class='add'>+	MLX5_SET(cqc, cqc, uar_page, mdev-&gt;priv.bfreg.up-&gt;index);</div><div class='ctx'> 	if (MLX5_CAP_GEN(mdev, cqe_128_always) &amp;&amp; cache_line_size() &gt;= 128)</div><div class='ctx'> 		MLX5_SET(cqc, cqc, cqe_sz, CQE_STRIDE_128_PAD);</div><div class='ctx'> </div><div class='hunk'>@@ -255,7 +260,29 @@ static void mlx5_wc_destroy_sq(struct mlx5_wc_sq *sq)</div><div class='ctx'> 	mlx5_wq_destroy(&amp;sq-&gt;wq_ctrl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mlx5_wc_post_nop(struct mlx5_wc_sq *sq, bool signaled)</div><div class='add'>+static void mlx5_iowrite64_copy(struct mlx5_wc_sq *sq, __be32 mmio_wqe[16],</div><div class='add'>+				size_t mmio_wqe_size, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+#if IS_ENABLED(CONFIG_KERNEL_MODE_NEON) &amp;&amp; IS_ENABLED(CONFIG_ARM64)</div><div class='add'>+	if (cpu_has_neon()) {</div><div class='add'>+		scoped_ksimd() {</div><div class='add'>+			asm volatile(</div><div class='add'>+				".arch_extension simd\n\t"</div><div class='add'>+				"ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [%0]\n\t"</div><div class='add'>+				"st1 {v0.16b, v1.16b, v2.16b, v3.16b}, [%1]"</div><div class='add'>+				:</div><div class='add'>+				: "r"(mmio_wqe), "r"(sq-&gt;bfreg.map + offset)</div><div class='add'>+				: "memory", "v0", "v1", "v2", "v3");</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	__iowrite64_copy(sq-&gt;bfreg.map + offset, mmio_wqe,</div><div class='add'>+			 mmio_wqe_size / 8);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mlx5_wc_post_nop(struct mlx5_wc_sq *sq, unsigned int *offset,</div><div class='add'>+			     bool signaled)</div><div class='ctx'> {</div><div class='ctx'> 	int buf_size = (1 &lt;&lt; MLX5_CAP_GEN(sq-&gt;cq.mdev, log_bf_reg_size)) / 2;</div><div class='ctx'> 	struct mlx5_wqe_ctrl_seg *ctrl;</div><div class='hunk'>@@ -288,10 +315,9 @@ static void mlx5_wc_post_nop(struct mlx5_wc_sq *sq, bool signaled)</div><div class='ctx'> 	 */</div><div class='ctx'> 	wmb();</div><div class='ctx'> </div><div class='del'>-	__iowrite64_copy(sq-&gt;bfreg.map + sq-&gt;bfreg.offset, mmio_wqe,</div><div class='del'>-			 sizeof(mmio_wqe) / 8);</div><div class='add'>+	mlx5_iowrite64_copy(sq, mmio_wqe, sizeof(mmio_wqe), *offset);</div><div class='ctx'> </div><div class='del'>-	sq-&gt;bfreg.offset ^= buf_size;</div><div class='add'>+	*offset ^= buf_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlx5_wc_poll_cq(struct mlx5_wc_sq *sq)</div><div class='hunk'>@@ -332,6 +358,7 @@ static int mlx5_wc_poll_cq(struct mlx5_wc_sq *sq)</div><div class='ctx'> </div><div class='ctx'> static void mlx5_core_test_wc(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='add'>+	unsigned int offset = 0;</div><div class='ctx'> 	unsigned long expires;</div><div class='ctx'> 	struct mlx5_wc_sq *sq;</div><div class='ctx'> 	int i, err;</div><div class='hunk'>@@ -358,9 +385,9 @@ static void mlx5_core_test_wc(struct mlx5_core_dev *mdev)</div><div class='ctx'> 		goto err_create_sq;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; TEST_WC_NUM_WQES - 1; i++)</div><div class='del'>-		mlx5_wc_post_nop(sq, false);</div><div class='add'>+		mlx5_wc_post_nop(sq, &amp;offset, false);</div><div class='ctx'> </div><div class='del'>-	mlx5_wc_post_nop(sq, true);</div><div class='add'>+	mlx5_wc_post_nop(sq, &amp;offset, true);</div><div class='ctx'> </div><div class='ctx'> 	expires = jiffies + TEST_WC_POLLING_MAX_TIME_JIFFIES;</div><div class='ctx'> 	do {</div><div class='hunk'>@@ -378,10 +405,14 @@ err_create_cq:</div><div class='ctx'> 	mlx5_free_bfreg(mdev, &amp;sq-&gt;bfreg);</div><div class='ctx'> err_alloc_bfreg:</div><div class='ctx'> 	kfree(sq);</div><div class='add'>+</div><div class='add'>+	if (mdev-&gt;wc_state == MLX5_WC_STATE_UNSUPPORTED)</div><div class='add'>+		mlx5_core_warn(mdev, "Write combining is not supported\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool mlx5_wc_support_get(struct mlx5_core_dev *mdev)</div><div class='ctx'> {</div><div class='add'>+	struct mutex *wc_state_lock = &amp;mdev-&gt;wc_state_lock;</div><div class='ctx'> 	struct mlx5_core_dev *parent = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (!MLX5_CAP_GEN(mdev, bf)) {</div><div class='hunk'>@@ -400,32 +431,31 @@ bool mlx5_wc_support_get(struct mlx5_core_dev *mdev)</div><div class='ctx'> 		 */</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;mdev-&gt;wc_state_lock);</div><div class='del'>-</div><div class='del'>-	if (mdev-&gt;wc_state != MLX5_WC_STATE_UNINITIALIZED)</div><div class='del'>-		goto unlock;</div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_MLX5_SF</div><div class='del'>-	if (mlx5_core_is_sf(mdev))</div><div class='add'>+	if (mlx5_core_is_sf(mdev)) {</div><div class='ctx'> 		parent = mdev-&gt;priv.parent_mdev;</div><div class='add'>+		wc_state_lock = &amp;parent-&gt;wc_state_lock;</div><div class='add'>+	}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	if (parent) {</div><div class='del'>-		mutex_lock(&amp;parent-&gt;wc_state_lock);</div><div class='add'>+	mutex_lock(wc_state_lock);</div><div class='ctx'> </div><div class='add'>+	if (mdev-&gt;wc_state != MLX5_WC_STATE_UNINITIALIZED)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (parent) {</div><div class='ctx'> 		mlx5_core_test_wc(parent);</div><div class='ctx'> </div><div class='ctx'> 		mlx5_core_dbg(mdev, "parent set wc_state=%d\n",</div><div class='ctx'> 			      parent-&gt;wc_state);</div><div class='ctx'> 		mdev-&gt;wc_state = parent-&gt;wc_state;</div><div class='ctx'> </div><div class='del'>-		mutex_unlock(&amp;parent-&gt;wc_state_lock);</div><div class='add'>+	} else {</div><div class='add'>+		mlx5_core_test_wc(mdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mlx5_core_test_wc(mdev);</div><div class='del'>-</div><div class='ctx'> unlock:</div><div class='del'>-	mutex_unlock(&amp;mdev-&gt;wc_state_lock);</div><div class='add'>+	mutex_unlock(wc_state_lock);</div><div class='ctx'> out:</div><div class='ctx'> 	mlx5_core_dbg(mdev, "wc_state=%d\n", mdev-&gt;wc_state);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c b/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c<br/>index fb2e5b844c15..d1f8a72cae53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c</a></div><div class='hunk'>@@ -142,8 +142,10 @@ static int mlxbf_gige_open(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	mlxbf_gige_cache_stats(priv);</div><div class='ctx'> 	err = mlxbf_gige_clean_port(priv);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "open: clean_port failed: %pe\n", ERR_PTR(err));</div><div class='ctx'> 		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Clear driver's valid_polarity to match hardware,</div><div class='ctx'> 	 * since the above call to clean_port() resets the</div><div class='hunk'>@@ -154,19 +156,25 @@ static int mlxbf_gige_open(struct net_device *netdev)</div><div class='ctx'> 	phy_start(phydev);</div><div class='ctx'> </div><div class='ctx'> 	err = mlxbf_gige_tx_init(priv);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "open: tx_init failed: %pe\n", ERR_PTR(err));</div><div class='ctx'> 		goto phy_deinit;</div><div class='add'>+	}</div><div class='ctx'> 	err = mlxbf_gige_rx_init(priv);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "open: rx_init failed: %pe\n", ERR_PTR(err));</div><div class='ctx'> 		goto tx_deinit;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	netif_napi_add(netdev, &amp;priv-&gt;napi, mlxbf_gige_poll);</div><div class='ctx'> 	napi_enable(&amp;priv-&gt;napi);</div><div class='ctx'> 	netif_start_queue(netdev);</div><div class='ctx'> </div><div class='ctx'> 	err = mlxbf_gige_request_irqs(priv);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "open: request_irqs failed: %pe\n", ERR_PTR(err));</div><div class='ctx'> 		goto napi_deinit;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mlxbf_gige_enable_mac_rx_filter(priv, MLXBF_GIGE_BCAST_MAC_FILTER_IDX);</div><div class='ctx'> 	mlxbf_gige_enable_mac_rx_filter(priv, MLXBF_GIGE_LOCAL_MAC_FILTER_IDX);</div><div class='hunk'>@@ -418,8 +426,10 @@ static int mlxbf_gige_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	/* Attach MDIO device */</div><div class='ctx'> 	err = mlxbf_gige_mdio_probe(pdev, priv);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "probe: mdio_probe failed: %pe\n", ERR_PTR(err));</div><div class='ctx'> 		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;base = base;</div><div class='ctx'> 	priv-&gt;llu_base = llu_base;</div><div class='hunk'>@@ -438,7 +448,7 @@ static int mlxbf_gige_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "DMA configuration failed: 0x%x\n", err);</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "DMA configuration failed: %pe\n", ERR_PTR(err));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -447,8 +457,10 @@ static int mlxbf_gige_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv-&gt;llu_plu_irq = platform_get_irq(pdev, MLXBF_GIGE_LLU_PLU_INTR_IDX);</div><div class='ctx'> </div><div class='ctx'> 	phy_irq = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(&amp;pdev-&gt;dev), "phy", 0);</div><div class='del'>-	if (phy_irq &lt; 0) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Error getting PHY irq. Use polling instead");</div><div class='add'>+	if (phy_irq == -EPROBE_DEFER) {</div><div class='add'>+		err = -EPROBE_DEFER;</div><div class='add'>+		goto out;</div><div class='add'>+	} else if (phy_irq &lt; 0) {</div><div class='ctx'> 		phy_irq = PHY_POLL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -466,7 +478,7 @@ static int mlxbf_gige_probe(struct platform_device *pdev)</div><div class='ctx'> 				 mlxbf_gige_link_cfgs[priv-&gt;hw_version].adjust_link,</div><div class='ctx'> 				 mlxbf_gige_link_cfgs[priv-&gt;hw_version].phy_mode);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Could not attach to PHY\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Could not attach to PHY: %pe\n", ERR_PTR(err));</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -477,7 +489,7 @@ static int mlxbf_gige_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdev(netdev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Failed to register netdev\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to register netdev: %pe\n", ERR_PTR(err));</div><div class='ctx'> 		phy_disconnect(phydev);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c b/drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c<br/>index 46245e0b2462..43c84900369a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c</a></div><div class='hunk'>@@ -14,7 +14,6 @@</div><div class='ctx'> #define MLXFW_FSM_STATE_WAIT_TIMEOUT_MS 30000</div><div class='ctx'> #define MLXFW_FSM_STATE_WAIT_ROUNDS \</div><div class='ctx'> 	(MLXFW_FSM_STATE_WAIT_TIMEOUT_MS / MLXFW_FSM_STATE_WAIT_CYCLE_MS)</div><div class='del'>-#define MLXFW_FSM_MAX_COMPONENT_SIZE (10 * (1 &lt;&lt; 20))</div><div class='ctx'> </div><div class='ctx'> static const int mlxfw_fsm_state_errno[] = {</div><div class='ctx'> 	[MLXFW_FSM_STATE_ERR_ERROR] = -EIO,</div><div class='hunk'>@@ -229,7 +228,6 @@ static int mlxfw_flash_component(struct mlxfw_dev *mlxfw_dev,</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	comp_max_size = min_t(u32, comp_max_size, MLXFW_FSM_MAX_COMPONENT_SIZE);</div><div class='ctx'> 	if (comp-&gt;data_size &gt; comp_max_size) {</div><div class='ctx'> 		MLXFW_ERR_MSG(mlxfw_dev, extack,</div><div class='ctx'> 			      "Component size is bigger than limit", -EINVAL);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c<br/>index 4a79c0d7e7ad..83c7cf3bbea3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/core.c</a></div><div class='hunk'>@@ -35,6 +35,7 @@</div><div class='ctx'> #include "reg.h"</div><div class='ctx'> #include "resources.h"</div><div class='ctx'> #include "../mlxfw/mlxfw.h"</div><div class='add'>+#include "txheader.h"</div><div class='ctx'> </div><div class='ctx'> static LIST_HEAD(mlxsw_core_driver_list);</div><div class='ctx'> static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);</div><div class='hunk'>@@ -677,7 +678,7 @@ struct mlxsw_reg_trans {</div><div class='ctx'> 	struct list_head bulk_list;</div><div class='ctx'> 	struct mlxsw_core *core;</div><div class='ctx'> 	struct sk_buff *tx_skb;</div><div class='del'>-	struct mlxsw_tx_info tx_info;</div><div class='add'>+	struct mlxsw_txhdr_info txhdr_info;</div><div class='ctx'> 	struct delayed_work timeout_dw;</div><div class='ctx'> 	unsigned int retries;</div><div class='ctx'> 	u64 tid;</div><div class='hunk'>@@ -737,12 +738,11 @@ static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,</div><div class='del'>-			    skb-&gt;data + mlxsw_core-&gt;driver-&gt;txhdr_len,</div><div class='del'>-			    skb-&gt;len - mlxsw_core-&gt;driver-&gt;txhdr_len);</div><div class='add'>+	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0, skb-&gt;data,</div><div class='add'>+			    skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	atomic_set(&amp;trans-&gt;active, 1);</div><div class='del'>-	err = mlxsw_core_skb_transmit(mlxsw_core, skb, &amp;trans-&gt;tx_info);</div><div class='add'>+	err = mlxsw_core_skb_transmit(mlxsw_core, skb, &amp;trans-&gt;txhdr_info);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -886,7 +886,7 @@ static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)</div><div class='ctx'> 	if (!(mlxsw_core-&gt;bus-&gt;features &amp; MLXSW_BUS_F_TXRX))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0);</div><div class='add'>+	emad_wq = alloc_workqueue("mlxsw_core_emad", WQ_PERCPU, 0);</div><div class='ctx'> 	if (!emad_wq)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	mlxsw_core-&gt;emad_wq = emad_wq;</div><div class='hunk'>@@ -944,7 +944,7 @@ static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,</div><div class='ctx'> </div><div class='ctx'> 	emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +</div><div class='ctx'> 		    (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *</div><div class='del'>-		    sizeof(u32) + mlxsw_core-&gt;driver-&gt;txhdr_len);</div><div class='add'>+		    sizeof(u32) + MLXSW_TXHDR_LEN);</div><div class='ctx'> 	if (mlxsw_core-&gt;emad.enable_string_tlv)</div><div class='ctx'> 		emad_len += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32);</div><div class='ctx'> 	if (mlxsw_core-&gt;emad.enable_latency_tlv)</div><div class='hunk'>@@ -984,8 +984,8 @@ static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,</div><div class='ctx'> 	list_add_tail(&amp;trans-&gt;bulk_list, bulk_list);</div><div class='ctx'> 	trans-&gt;core = mlxsw_core;</div><div class='ctx'> 	trans-&gt;tx_skb = skb;</div><div class='del'>-	trans-&gt;tx_info.local_port = MLXSW_PORT_CPU_PORT;</div><div class='del'>-	trans-&gt;tx_info.is_emad = true;</div><div class='add'>+	trans-&gt;txhdr_info.tx_info.local_port = MLXSW_PORT_CPU_PORT;</div><div class='add'>+	trans-&gt;txhdr_info.tx_info.is_emad = true;</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;trans-&gt;timeout_dw, mlxsw_emad_trans_timeout_work);</div><div class='ctx'> 	trans-&gt;tid = tid;</div><div class='ctx'> 	init_completion(&amp;trans-&gt;completion);</div><div class='hunk'>@@ -995,7 +995,6 @@ static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,</div><div class='ctx'> 	trans-&gt;type = type;</div><div class='ctx'> </div><div class='ctx'> 	mlxsw_emad_construct(mlxsw_core, skb, reg, payload, type, trans-&gt;tid);</div><div class='del'>-	mlxsw_core-&gt;driver-&gt;txhdr_construct(skb, &amp;trans-&gt;tx_info);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;mlxsw_core-&gt;emad.trans_list_lock);</div><div class='ctx'> 	list_add_tail_rcu(&amp;trans-&gt;list, &amp;mlxsw_core-&gt;emad.trans_list);</div><div class='hunk'>@@ -2044,7 +2043,7 @@ static int mlxsw_core_health_init(struct mlxsw_core *mlxsw_core)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	fw_fatal = devl_health_reporter_create(devlink, &amp;mlxsw_core_health_fw_fatal_ops,</div><div class='del'>-					       0, mlxsw_core);</div><div class='add'>+					       mlxsw_core);</div><div class='ctx'> 	if (IS_ERR(fw_fatal)) {</div><div class='ctx'> 		dev_err(mlxsw_core-&gt;bus_info-&gt;dev, "Failed to create fw fatal reporter");</div><div class='ctx'> 		return PTR_ERR(fw_fatal);</div><div class='hunk'>@@ -2330,10 +2329,10 @@ bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,</div><div class='ctx'> EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);</div><div class='ctx'> </div><div class='ctx'> int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,</div><div class='del'>-			    const struct mlxsw_tx_info *tx_info)</div><div class='add'>+			    const struct mlxsw_txhdr_info *txhdr_info)</div><div class='ctx'> {</div><div class='ctx'> 	return mlxsw_core-&gt;bus-&gt;skb_transmit(mlxsw_core-&gt;bus_priv, skb,</div><div class='del'>-					     tx_info);</div><div class='add'>+					     txhdr_info);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mlxsw_core_skb_transmit);</div><div class='ctx'> </div><div class='hunk'>@@ -3382,7 +3381,7 @@ static int __init mlxsw_core_module_init(void)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0);</div><div class='add'>+	mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, WQ_PERCPU, 0);</div><div class='ctx'> 	if (!mlxsw_wq) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_alloc_workqueue;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h<br/>index 6d11225594dd..1a871397a6df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/core.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/core.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/core.h</a></div><div class='hunk'>@@ -72,7 +72,14 @@ struct mlxsw_tx_info {</div><div class='ctx'> 	bool is_emad;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct mlxsw_txhdr_info {</div><div class='add'>+	struct mlxsw_tx_info tx_info;</div><div class='add'>+	bool data;</div><div class='add'>+	u16 max_fid; /* Used for PTP packets which are sent as data. */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mlxsw_rx_md_info {</div><div class='add'>+	struct napi_struct *napi;</div><div class='ctx'> 	u32 cookie_index;</div><div class='ctx'> 	u32 latency;</div><div class='ctx'> 	u32 tx_congestion;</div><div class='hunk'>@@ -94,7 +101,7 @@ struct mlxsw_rx_md_info {</div><div class='ctx'> bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,</div><div class='ctx'> 				  const struct mlxsw_tx_info *tx_info);</div><div class='ctx'> int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,</div><div class='del'>-			    const struct mlxsw_tx_info *tx_info);</div><div class='add'>+			    const struct mlxsw_txhdr_info *txhdr_info);</div><div class='ctx'> void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,</div><div class='ctx'> 				struct sk_buff *skb, u16 local_port);</div><div class='ctx'> </div><div class='hunk'>@@ -425,8 +432,6 @@ struct mlxsw_driver {</div><div class='ctx'> 	int (*trap_policer_counter_get)(struct mlxsw_core *mlxsw_core,</div><div class='ctx'> 					const struct devlink_trap_policer *policer,</div><div class='ctx'> 					u64 *p_drops);</div><div class='del'>-	void (*txhdr_construct)(struct sk_buff *skb,</div><div class='del'>-				const struct mlxsw_tx_info *tx_info);</div><div class='ctx'> 	int (*resources_register)(struct mlxsw_core *mlxsw_core);</div><div class='ctx'> 	int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core,</div><div class='ctx'> 			     const struct mlxsw_config_profile *profile,</div><div class='hunk'>@@ -439,7 +444,6 @@ struct mlxsw_driver {</div><div class='ctx'> 	void (*ptp_transmitted)(struct mlxsw_core *mlxsw_core,</div><div class='ctx'> 				struct sk_buff *skb, u16 local_port);</div><div class='ctx'> </div><div class='del'>-	u8 txhdr_len;</div><div class='ctx'> 	const struct mlxsw_config_profile *profile;</div><div class='ctx'> 	bool sdq_supports_cqe_v2;</div><div class='ctx'> };</div><div class='hunk'>@@ -486,7 +490,7 @@ struct mlxsw_bus {</div><div class='ctx'> 	bool (*skb_transmit_busy)(void *bus_priv,</div><div class='ctx'> 				  const struct mlxsw_tx_info *tx_info);</div><div class='ctx'> 	int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,</div><div class='del'>-			    const struct mlxsw_tx_info *tx_info);</div><div class='add'>+			    const struct mlxsw_txhdr_info *txhdr_info);</div><div class='ctx'> 	int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,</div><div class='ctx'> 			u32 in_mod, bool out_mbox_direct,</div><div class='ctx'> 			char *in_mbox, size_t in_mbox_size,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c b/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c<br/>index b032d5a4b3b8..10f5bc4892fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/core_linecards.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/core_linecards.c</a></div><div class='hunk'>@@ -601,6 +601,8 @@ int mlxsw_linecard_devlink_info_get(struct mlxsw_linecard *linecard,</div><div class='ctx'> 		err = devlink_info_version_fixed_put(req,</div><div class='ctx'> 						     DEVLINK_INFO_VERSION_GENERIC_FW_PSID,</div><div class='ctx'> 						     info-&gt;psid);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlock;</div><div class='ctx'> </div><div class='ctx'> 		sprintf(buf, "%u.%u.%u", info-&gt;fw_major, info-&gt;fw_minor,</div><div class='ctx'> 			info-&gt;fw_sub_minor);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c<br/>index e746cd9c68ed..eac9a14a6058 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/core_thermal.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/core_thermal.c</a></div><div class='hunk'>@@ -205,11 +205,11 @@ static int mlxsw_thermal_get_temp(struct thermal_zone_device *tzdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct thermal_zone_params mlxsw_thermal_params = {</div><div class='add'>+static const struct thermal_zone_params mlxsw_thermal_params = {</div><div class='ctx'> 	.no_hwmon = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct thermal_zone_device_ops mlxsw_thermal_ops = {</div><div class='add'>+static const struct thermal_zone_device_ops mlxsw_thermal_ops = {</div><div class='ctx'> 	.should_bind = mlxsw_thermal_should_bind,</div><div class='ctx'> 	.get_temp = mlxsw_thermal_get_temp,</div><div class='ctx'> };</div><div class='hunk'>@@ -252,7 +252,7 @@ static int mlxsw_thermal_module_temp_get(struct thermal_zone_device *tzdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct thermal_zone_device_ops mlxsw_thermal_module_ops = {</div><div class='add'>+static const struct thermal_zone_device_ops mlxsw_thermal_module_ops = {</div><div class='ctx'> 	.should_bind	= mlxsw_thermal_module_should_bind,</div><div class='ctx'> 	.get_temp	= mlxsw_thermal_module_temp_get,</div><div class='ctx'> };</div><div class='hunk'>@@ -280,7 +280,7 @@ static int mlxsw_thermal_gearbox_temp_get(struct thermal_zone_device *tzdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct thermal_zone_device_ops mlxsw_thermal_gearbox_ops = {</div><div class='add'>+static const struct thermal_zone_device_ops mlxsw_thermal_gearbox_ops = {</div><div class='ctx'> 	.should_bind	= mlxsw_thermal_module_should_bind,</div><div class='ctx'> 	.get_temp	= mlxsw_thermal_gearbox_temp_get,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/i2c.c b/drivers/net/ethernet/mellanox/mlxsw/i2c.c<br/>index 1e150ce1c73a..f9f565c1036d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/i2c.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/i2c.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/i2c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/i2c.c</a></div><div class='hunk'>@@ -516,7 +516,7 @@ static bool mlxsw_i2c_skb_transmit_busy(void *bus_priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlxsw_i2c_skb_transmit(void *bus_priv, struct sk_buff *skb,</div><div class='del'>-				  const struct mlxsw_tx_info *tx_info)</div><div class='add'>+				  const struct mlxsw_txhdr_info *txhdr_info)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c<br/>index d6f37456fb31..8769cba2c746 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/pci.c</a></div><div class='hunk'>@@ -21,6 +21,7 @@</div><div class='ctx'> #include "cmd.h"</div><div class='ctx'> #include "port.h"</div><div class='ctx'> #include "resources.h"</div><div class='add'>+#include "txheader.h"</div><div class='ctx'> </div><div class='ctx'> #define mlxsw_pci_write32(mlxsw_pci, reg, val) \</div><div class='ctx'> 	iowrite32be(val, (mlxsw_pci)-&gt;hw_addr + (MLXSW_PCI_ ## reg))</div><div class='hunk'>@@ -155,7 +156,7 @@ static int mlxsw_pci_napi_devs_init(struct mlxsw_pci *mlxsw_pci)</div><div class='ctx'> 	}</div><div class='ctx'> 	strscpy(mlxsw_pci-&gt;napi_dev_rx-&gt;name, "mlxsw_rx",</div><div class='ctx'> 		sizeof(mlxsw_pci-&gt;napi_dev_rx-&gt;name));</div><div class='del'>-	dev_set_threaded(mlxsw_pci-&gt;napi_dev_rx, true);</div><div class='add'>+	netif_threaded_enable(mlxsw_pci-&gt;napi_dev_rx);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -737,6 +738,7 @@ static void mlxsw_pci_cqe_rdq_md_init(struct sk_buff *skb, const char *cqe)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci,</div><div class='add'>+				     struct napi_struct *napi,</div><div class='ctx'> 				     struct mlxsw_pci_queue *q,</div><div class='ctx'> 				     u16 consumer_counter_limit,</div><div class='ctx'> 				     enum mlxsw_pci_cqe_v cqe_v, char *cqe)</div><div class='hunk'>@@ -807,6 +809,7 @@ static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mlxsw_pci_skb_cb_ts_set(mlxsw_pci, skb, cqe_v, cqe);</div><div class='add'>+	mlxsw_skb_cb(skb)-&gt;rx_md_info.napi = napi;</div><div class='ctx'> </div><div class='ctx'> 	mlxsw_core_skb_receive(mlxsw_pci-&gt;core, skb, &amp;rx_info);</div><div class='ctx'> </div><div class='hunk'>@@ -869,7 +872,7 @@ static int mlxsw_pci_napi_poll_cq_rx(struct napi_struct *napi, int budget)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		mlxsw_pci_cqe_rdq_handle(mlxsw_pci, rdq,</div><div class='add'>+		mlxsw_pci_cqe_rdq_handle(mlxsw_pci, napi, rdq,</div><div class='ctx'> 					 wqe_counter, q-&gt;u.cq.v, cqe);</div><div class='ctx'> </div><div class='ctx'> 		if (++work_done == budget)</div><div class='hunk'>@@ -2093,6 +2096,39 @@ static void mlxsw_pci_fini(void *bus_priv)</div><div class='ctx'> 	mlxsw_pci_free_irq_vectors(mlxsw_pci);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mlxsw_pci_txhdr_construct(struct sk_buff *skb,</div><div class='add'>+				     const struct mlxsw_txhdr_info *txhdr_info)</div><div class='add'>+{</div><div class='add'>+	const struct mlxsw_tx_info tx_info = txhdr_info-&gt;tx_info;</div><div class='add'>+	char *txhdr;</div><div class='add'>+</div><div class='add'>+	if (skb_cow_head(skb, MLXSW_TXHDR_LEN))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	txhdr = skb_push(skb, MLXSW_TXHDR_LEN);</div><div class='add'>+	memset(txhdr, 0, MLXSW_TXHDR_LEN);</div><div class='add'>+</div><div class='add'>+	mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);</div><div class='add'>+	mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);</div><div class='add'>+	mlxsw_tx_hdr_swid_set(txhdr, 0);</div><div class='add'>+</div><div class='add'>+	if (unlikely(txhdr_info-&gt;data)) {</div><div class='add'>+		u16 fid = txhdr_info-&gt;max_fid + tx_info.local_port - 1;</div><div class='add'>+</div><div class='add'>+		mlxsw_tx_hdr_rx_is_router_set(txhdr, true);</div><div class='add'>+		mlxsw_tx_hdr_fid_valid_set(txhdr, true);</div><div class='add'>+		mlxsw_tx_hdr_fid_set(txhdr, fid);</div><div class='add'>+		mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_DATA);</div><div class='add'>+	} else {</div><div class='add'>+		mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);</div><div class='add'>+		mlxsw_tx_hdr_control_tclass_set(txhdr, 1);</div><div class='add'>+		mlxsw_tx_hdr_port_mid_set(txhdr, tx_info.local_port);</div><div class='add'>+		mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct mlxsw_pci_queue *</div><div class='ctx'> mlxsw_pci_sdq_pick(struct mlxsw_pci *mlxsw_pci,</div><div class='ctx'> 		   const struct mlxsw_tx_info *tx_info)</div><div class='hunk'>@@ -2120,7 +2156,7 @@ static bool mlxsw_pci_skb_transmit_busy(void *bus_priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlxsw_pci_skb_transmit(void *bus_priv, struct sk_buff *skb,</div><div class='del'>-				  const struct mlxsw_tx_info *tx_info)</div><div class='add'>+				  const struct mlxsw_txhdr_info *txhdr_info)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlxsw_pci *mlxsw_pci = bus_priv;</div><div class='ctx'> 	struct mlxsw_pci_queue *q;</div><div class='hunk'>@@ -2129,13 +2165,17 @@ static int mlxsw_pci_skb_transmit(void *bus_priv, struct sk_buff *skb,</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	err = mlxsw_pci_txhdr_construct(skb, txhdr_info);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	if (skb_shinfo(skb)-&gt;nr_frags &gt; MLXSW_PCI_WQE_SG_ENTRIES - 1) {</div><div class='ctx'> 		err = skb_linearize(skb);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	q = mlxsw_pci_sdq_pick(mlxsw_pci, tx_info);</div><div class='add'>+	q = mlxsw_pci_sdq_pick(mlxsw_pci, &amp;txhdr_info-&gt;tx_info);</div><div class='ctx'> 	spin_lock_bh(&amp;q-&gt;lock);</div><div class='ctx'> 	elem_info = mlxsw_pci_queue_elem_info_producer_get(q);</div><div class='ctx'> 	if (!elem_info) {</div><div class='hunk'>@@ -2143,7 +2183,7 @@ static int mlxsw_pci_skb_transmit(void *bus_priv, struct sk_buff *skb,</div><div class='ctx'> 		err = -EAGAIN;</div><div class='ctx'> 		goto unlock;</div><div class='ctx'> 	}</div><div class='del'>-	mlxsw_skb_cb(skb)-&gt;tx_info = *tx_info;</div><div class='add'>+	mlxsw_skb_cb(skb)-&gt;tx_info = txhdr_info-&gt;tx_info;</div><div class='ctx'> 	elem_info-&gt;sdq.skb = skb;</div><div class='ctx'> </div><div class='ctx'> 	wqe = elem_info-&gt;elem;</div><div class='hunk'>@@ -2174,6 +2214,8 @@ static int mlxsw_pci_skb_transmit(void *bus_priv, struct sk_buff *skb,</div><div class='ctx'> 	for (i++; i &lt; MLXSW_PCI_WQE_SG_ENTRIES; i++)</div><div class='ctx'> 		mlxsw_pci_wqe_byte_count_set(wqe, i, 0);</div><div class='ctx'> </div><div class='add'>+	mlxsw_pci_wqe_ipcs_set(wqe, skb-&gt;ip_summed == CHECKSUM_PARTIAL);</div><div class='add'>+</div><div class='ctx'> 	/* Everything is set up, ring producer doorbell to get HW going */</div><div class='ctx'> 	q-&gt;producer_counter++;</div><div class='ctx'> 	mlxsw_pci_queue_doorbell_producer_ring(mlxsw_pci, q);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h<br/>index 6bed495dcf0f..7fa94e5828de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/pci_hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/pci_hw.h</a></div><div class='hunk'>@@ -90,6 +90,11 @@ MLXSW_ITEM32(pci, wqe, lp, 0x00, 30, 1);</div><div class='ctx'>  */</div><div class='ctx'> MLXSW_ITEM32(pci, wqe, type, 0x00, 23, 4);</div><div class='ctx'> </div><div class='add'>+/* pci_wqe_ipcs</div><div class='add'>+ * Calculate IPv4 and TCP / UDP checksums.</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(pci, wqe, ipcs, 0x00, 14, 1);</div><div class='add'>+</div><div class='ctx'> /* pci_wqe_byte_count</div><div class='ctx'>  * Size of i-th scatter/gather entry, 0 if entry is unused.</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c<br/>index 3f5e5d99251b..9a2d64a0a858 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum.c</a></div><div class='hunk'>@@ -107,74 +107,6 @@ static const unsigned char mlxsw_sp2_mac_mask[ETH_ALEN] = {</div><div class='ctx'> 	0xff, 0xff, 0xff, 0xff, 0xf0, 0x00</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* tx_hdr_version</div><div class='del'>- * Tx header version.</div><div class='del'>- * Must be set to 1.</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);</div><div class='del'>-</div><div class='del'>-/* tx_hdr_ctl</div><div class='del'>- * Packet control type.</div><div class='del'>- * 0 - Ethernet control (e.g. EMADs, LACP)</div><div class='del'>- * 1 - Ethernet data</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);</div><div class='del'>-</div><div class='del'>-/* tx_hdr_proto</div><div class='del'>- * Packet protocol type. Must be set to 1 (Ethernet).</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);</div><div class='del'>-</div><div class='del'>-/* tx_hdr_rx_is_router</div><div class='del'>- * Packet is sent from the router. Valid for data packets only.</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);</div><div class='del'>-</div><div class='del'>-/* tx_hdr_fid_valid</div><div class='del'>- * Indicates if the 'fid' field is valid and should be used for</div><div class='del'>- * forwarding lookup. Valid for data packets only.</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);</div><div class='del'>-</div><div class='del'>-/* tx_hdr_swid</div><div class='del'>- * Switch partition ID. Must be set to 0.</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);</div><div class='del'>-</div><div class='del'>-/* tx_hdr_control_tclass</div><div class='del'>- * Indicates if the packet should use the control TClass and not one</div><div class='del'>- * of the data TClasses.</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);</div><div class='del'>-</div><div class='del'>-/* tx_hdr_etclass</div><div class='del'>- * Egress TClass to be used on the egress device on the egress port.</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);</div><div class='del'>-</div><div class='del'>-/* tx_hdr_port_mid</div><div class='del'>- * Destination local port for unicast packets.</div><div class='del'>- * Destination multicast ID for multicast packets.</div><div class='del'>- *</div><div class='del'>- * Control packets are directed to a specific egress port, while data</div><div class='del'>- * packets are transmitted through the CPU port (0) into the switch partition,</div><div class='del'>- * where forwarding rules are applied.</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);</div><div class='del'>-</div><div class='del'>-/* tx_hdr_fid</div><div class='del'>- * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is</div><div class='del'>- * set, otherwise calculated based on the packet's VID using VID to FID mapping.</div><div class='del'>- * Valid for data packets only.</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, fid, 0x08, 16, 16);</div><div class='del'>-</div><div class='del'>-/* tx_hdr_type</div><div class='del'>- * 0 - Data packets</div><div class='del'>- * 6 - Control packets</div><div class='del'>- */</div><div class='del'>-MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);</div><div class='del'>-</div><div class='ctx'> int mlxsw_sp_flow_counter_get(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 			      unsigned int counter_index, bool clear,</div><div class='ctx'> 			      u64 *packets, u64 *bytes)</div><div class='hunk'>@@ -233,61 +165,6 @@ void mlxsw_sp_flow_counter_free(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 			       counter_index);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mlxsw_sp_txhdr_construct(struct sk_buff *skb,</div><div class='del'>-			      const struct mlxsw_tx_info *tx_info)</div><div class='del'>-{</div><div class='del'>-	char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);</div><div class='del'>-</div><div class='del'>-	memset(txhdr, 0, MLXSW_TXHDR_LEN);</div><div class='del'>-</div><div class='del'>-	mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);</div><div class='del'>-	mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);</div><div class='del'>-	mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);</div><div class='del'>-	mlxsw_tx_hdr_swid_set(txhdr, 0);</div><div class='del'>-	mlxsw_tx_hdr_control_tclass_set(txhdr, 1);</div><div class='del'>-	mlxsw_tx_hdr_port_mid_set(txhdr, tx_info-&gt;local_port);</div><div class='del'>-	mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-mlxsw_sp_txhdr_ptp_data_construct(struct mlxsw_core *mlxsw_core,</div><div class='del'>-				  struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-				  struct sk_buff *skb,</div><div class='del'>-				  const struct mlxsw_tx_info *tx_info)</div><div class='del'>-{</div><div class='del'>-	char *txhdr;</div><div class='del'>-	u16 max_fid;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (skb_cow_head(skb, MLXSW_TXHDR_LEN)) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_skb_cow_head;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!MLXSW_CORE_RES_VALID(mlxsw_core, FID)) {</div><div class='del'>-		err = -EIO;</div><div class='del'>-		goto err_res_valid;</div><div class='del'>-	}</div><div class='del'>-	max_fid = MLXSW_CORE_RES_GET(mlxsw_core, FID);</div><div class='del'>-</div><div class='del'>-	txhdr = skb_push(skb, MLXSW_TXHDR_LEN);</div><div class='del'>-	memset(txhdr, 0, MLXSW_TXHDR_LEN);</div><div class='del'>-</div><div class='del'>-	mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);</div><div class='del'>-	mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);</div><div class='del'>-	mlxsw_tx_hdr_rx_is_router_set(txhdr, true);</div><div class='del'>-	mlxsw_tx_hdr_fid_valid_set(txhdr, true);</div><div class='del'>-	mlxsw_tx_hdr_fid_set(txhdr, max_fid + tx_info-&gt;local_port - 1);</div><div class='del'>-	mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_DATA);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_res_valid:</div><div class='del'>-err_skb_cow_head:</div><div class='del'>-	this_cpu_inc(mlxsw_sp_port-&gt;pcpu_stats-&gt;tx_dropped);</div><div class='del'>-	dev_kfree_skb_any(skb);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static bool mlxsw_sp_skb_requires_ts(struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int type;</div><div class='hunk'>@@ -299,30 +176,49 @@ static bool mlxsw_sp_skb_requires_ts(struct sk_buff *skb)</div><div class='ctx'> 	return !!ptp_parse_header(skb, type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlxsw_sp_txhdr_handle(struct mlxsw_core *mlxsw_core,</div><div class='del'>-				 struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-				 struct sk_buff *skb,</div><div class='del'>-				 const struct mlxsw_tx_info *tx_info)</div><div class='add'>+static void mlxsw_sp_txhdr_info_data_init(struct mlxsw_core *mlxsw_core,</div><div class='add'>+					  struct sk_buff *skb,</div><div class='add'>+					  struct mlxsw_txhdr_info *txhdr_info)</div><div class='ctx'> {</div><div class='del'>-	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);</div><div class='add'>+	/* Resource validation was done as part of PTP init. */</div><div class='add'>+	u16 max_fid = MLXSW_CORE_RES_GET(mlxsw_core, FID);</div><div class='add'>+</div><div class='add'>+	txhdr_info-&gt;data = true;</div><div class='add'>+	txhdr_info-&gt;max_fid = max_fid;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* In Spectrum-2 and Spectrum-3, PTP events that require a time stamp</div><div class='del'>-	 * need special handling and cannot be transmitted as regular control</div><div class='del'>-	 * packets.</div><div class='add'>+static struct sk_buff *</div><div class='add'>+mlxsw_sp_vlan_tag_push(struct mlxsw_sp *mlxsw_sp, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	/* In some Spectrum ASICs, in order for PTP event packets to have their</div><div class='add'>+	 * correction field correctly set on the egress port they must be</div><div class='add'>+	 * transmitted as data packets. Such packets ingress the ASIC via the</div><div class='add'>+	 * CPU port and must have a VLAN tag, as the CPU port is not configured</div><div class='add'>+	 * with a PVID. Push the default VLAN (4095), which is configured as</div><div class='add'>+	 * egress untagged on all the ports.</div><div class='ctx'> 	 */</div><div class='del'>-	if (unlikely(mlxsw_sp_skb_requires_ts(skb)))</div><div class='del'>-		return mlxsw_sp-&gt;ptp_ops-&gt;txhdr_construct(mlxsw_core,</div><div class='del'>-							  mlxsw_sp_port, skb,</div><div class='del'>-							  tx_info);</div><div class='add'>+	if (skb_vlan_tagged(skb))</div><div class='add'>+		return skb;</div><div class='ctx'> </div><div class='del'>-	if (skb_cow_head(skb, MLXSW_TXHDR_LEN)) {</div><div class='del'>-		this_cpu_inc(mlxsw_sp_port-&gt;pcpu_stats-&gt;tx_dropped);</div><div class='del'>-		dev_kfree_skb_any(skb);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='add'>+	return vlan_insert_tag_set_proto(skb, htons(ETH_P_8021Q),</div><div class='add'>+					 MLXSW_SP_DEFAULT_VID);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	mlxsw_sp_txhdr_construct(skb, tx_info);</div><div class='del'>-	return 0;</div><div class='add'>+static struct sk_buff *</div><div class='add'>+mlxsw_sp_txhdr_preparations(struct mlxsw_sp *mlxsw_sp, struct sk_buff *skb,</div><div class='add'>+			    struct mlxsw_txhdr_info *txhdr_info)</div><div class='add'>+{</div><div class='add'>+	if (likely(!mlxsw_sp_skb_requires_ts(skb)))</div><div class='add'>+		return skb;</div><div class='add'>+</div><div class='add'>+	if (!mlxsw_sp-&gt;ptp_ops-&gt;tx_as_data)</div><div class='add'>+		return skb;</div><div class='add'>+</div><div class='add'>+	/* Special handling for PTP events that require a time stamp and cannot</div><div class='add'>+	 * be transmitted as regular control packets.</div><div class='add'>+	 */</div><div class='add'>+	mlxsw_sp_txhdr_info_data_init(mlxsw_sp-&gt;core, skb, txhdr_info);</div><div class='add'>+	return mlxsw_sp_vlan_tag_push(mlxsw_sp, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum mlxsw_reg_spms_state mlxsw_sp_stp_spms_state(u8 state)</div><div class='hunk'>@@ -721,16 +617,16 @@ static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,</div><div class='ctx'> 	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);</div><div class='ctx'> 	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port-&gt;mlxsw_sp;</div><div class='ctx'> 	struct mlxsw_sp_port_pcpu_stats *pcpu_stats;</div><div class='del'>-	const struct mlxsw_tx_info tx_info = {</div><div class='del'>-		.local_port = mlxsw_sp_port-&gt;local_port,</div><div class='del'>-		.is_emad = false,</div><div class='add'>+	struct mlxsw_txhdr_info txhdr_info = {</div><div class='add'>+		.tx_info.local_port = mlxsw_sp_port-&gt;local_port,</div><div class='add'>+		.tx_info.is_emad = false,</div><div class='ctx'> 	};</div><div class='ctx'> 	u64 len;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	memset(skb-&gt;cb, 0, sizeof(struct mlxsw_skb_cb));</div><div class='ctx'> </div><div class='del'>-	if (mlxsw_core_skb_transmit_busy(mlxsw_sp-&gt;core, &amp;tx_info))</div><div class='add'>+	if (mlxsw_core_skb_transmit_busy(mlxsw_sp-&gt;core, &amp;txhdr_info.tx_info))</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> </div><div class='ctx'> 	if (eth_skb_pad(skb)) {</div><div class='hunk'>@@ -738,10 +634,11 @@ static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = mlxsw_sp_txhdr_handle(mlxsw_sp-&gt;core, mlxsw_sp_port, skb,</div><div class='del'>-				    &amp;tx_info);</div><div class='del'>-	if (err)</div><div class='add'>+	skb = mlxsw_sp_txhdr_preparations(mlxsw_sp, skb, &amp;txhdr_info);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		this_cpu_inc(mlxsw_sp_port-&gt;pcpu_stats-&gt;tx_dropped);</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* TX header is consumed by HW on the way so we shouldn't count its</div><div class='ctx'> 	 * bytes as being sent.</div><div class='hunk'>@@ -751,7 +648,7 @@ static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,</div><div class='ctx'> 	/* Due to a race we might fail here because of a full queue. In that</div><div class='ctx'> 	 * unlikely case we simply drop the packet.</div><div class='ctx'> 	 */</div><div class='del'>-	err = mlxsw_core_skb_transmit(mlxsw_sp-&gt;core, skb, &amp;tx_info);</div><div class='add'>+	err = mlxsw_core_skb_transmit(mlxsw_sp-&gt;core, skb, &amp;txhdr_info);</div><div class='ctx'> </div><div class='ctx'> 	if (!err) {</div><div class='ctx'> 		pcpu_stats = this_cpu_ptr(mlxsw_sp_port-&gt;pcpu_stats);</div><div class='hunk'>@@ -1262,63 +1159,31 @@ static int mlxsw_sp_set_features(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlxsw_sp_port_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-				      struct ifreq *ifr)</div><div class='add'>+static int mlxsw_sp_port_hwtstamp_set(struct net_device *dev,</div><div class='add'>+				      struct kernel_hwtstamp_config *config,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	err = mlxsw_sp_port-&gt;mlxsw_sp-&gt;ptp_ops-&gt;hwtstamp_set(mlxsw_sp_port,</div><div class='del'>-							     &amp;config);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return mlxsw_sp_port-&gt;mlxsw_sp-&gt;ptp_ops-&gt;hwtstamp_set(mlxsw_sp_port,</div><div class='add'>+							      config, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mlxsw_sp_port_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-				      struct ifreq *ifr)</div><div class='add'>+static int mlxsw_sp_port_hwtstamp_get(struct net_device *dev,</div><div class='add'>+				      struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = mlxsw_sp_port-&gt;mlxsw_sp-&gt;ptp_ops-&gt;hwtstamp_get(mlxsw_sp_port,</div><div class='del'>-							     &amp;config);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return mlxsw_sp_port-&gt;mlxsw_sp-&gt;ptp_ops-&gt;hwtstamp_get(mlxsw_sp_port,</div><div class='add'>+							      config);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void mlxsw_sp_port_ptp_clear(struct mlxsw_sp_port *mlxsw_sp_port)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config = {0};</div><div class='del'>-</div><div class='del'>-	mlxsw_sp_port-&gt;mlxsw_sp-&gt;ptp_ops-&gt;hwtstamp_set(mlxsw_sp_port, &amp;config);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-mlxsw_sp_port_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);</div><div class='add'>+	struct kernel_hwtstamp_config config = {};</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return mlxsw_sp_port_hwtstamp_set(mlxsw_sp_port, ifr);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return mlxsw_sp_port_hwtstamp_get(mlxsw_sp_port, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	mlxsw_sp_port-&gt;mlxsw_sp-&gt;ptp_ops-&gt;hwtstamp_set(mlxsw_sp_port, &amp;config,</div><div class='add'>+						       NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops mlxsw_sp_port_netdev_ops = {</div><div class='hunk'>@@ -1335,7 +1200,8 @@ static const struct net_device_ops mlxsw_sp_port_netdev_ops = {</div><div class='ctx'> 	.ndo_vlan_rx_add_vid	= mlxsw_sp_port_add_vid,</div><div class='ctx'> 	.ndo_vlan_rx_kill_vid	= mlxsw_sp_port_kill_vid,</div><div class='ctx'> 	.ndo_set_features	= mlxsw_sp_set_features,</div><div class='del'>-	.ndo_eth_ioctl		= mlxsw_sp_port_ioctl,</div><div class='add'>+	.ndo_hwtstamp_get	= mlxsw_sp_port_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= mlxsw_sp_port_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -1677,10 +1543,12 @@ static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u16 local_port,</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;features |= NETIF_F_SG | NETIF_F_HW_VLAN_CTAG_FILTER |</div><div class='del'>-			 NETIF_F_HW_TC;</div><div class='del'>-	dev-&gt;hw_features |= NETIF_F_HW_TC | NETIF_F_LOOPBACK;</div><div class='add'>+			 NETIF_F_HW_TC | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;</div><div class='add'>+	dev-&gt;hw_features |= NETIF_F_HW_TC | NETIF_F_LOOPBACK |</div><div class='add'>+			    NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;</div><div class='add'>+	dev-&gt;vlan_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;</div><div class='ctx'> 	dev-&gt;lltx = true;</div><div class='del'>-	dev-&gt;netns_local = true;</div><div class='add'>+	dev-&gt;netns_immutable = true;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;min_mtu = ETH_MIN_MTU;</div><div class='ctx'> 	dev-&gt;max_mtu = MLXSW_PORT_MAX_MTU - MLXSW_PORT_ETH_FRAME_HDR;</div><div class='hunk'>@@ -2449,7 +2317,7 @@ void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,</div><div class='ctx'> 	u64_stats_update_end(&amp;pcpu_stats-&gt;syncp);</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;protocol = eth_type_trans(skb, skb-&gt;dev);</div><div class='del'>-	netif_receive_skb(skb);</div><div class='add'>+	napi_gro_receive(mlxsw_skb_cb(skb)-&gt;rx_md_info.napi, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u16 local_port,</div><div class='hunk'>@@ -2507,11 +2375,11 @@ static const struct mlxsw_listener mlxsw_sp_listener[] = {</div><div class='ctx'> 			     ROUTER_EXP, false),</div><div class='ctx'> 	MLXSW_SP_RXL_NO_MARK(DISCARD_ING_ROUTER_DIP_LINK_LOCAL, FORWARD,</div><div class='ctx'> 			     ROUTER_EXP, false),</div><div class='add'>+	MLXSW_SP_RXL_NO_MARK(DISCARD_ING_ROUTER_SIP_LINK_LOCAL, FORWARD,</div><div class='add'>+			     ROUTER_EXP, false),</div><div class='ctx'> 	/* Multicast Router Traps */</div><div class='ctx'> 	MLXSW_SP_RXL_MARK(ACL1, TRAP_TO_CPU, MULTICAST, false),</div><div class='ctx'> 	MLXSW_SP_RXL_L3_MARK(ACL2, TRAP_TO_CPU, MULTICAST, false),</div><div class='del'>-	/* NVE traps */</div><div class='del'>-	MLXSW_SP_RXL_MARK(NVE_ENCAP_ARP, TRAP_TO_CPU, NEIGH_DISCOVERY, false),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct mlxsw_listener mlxsw_sp1_listener[] = {</div><div class='hunk'>@@ -2792,7 +2660,6 @@ static const struct mlxsw_sp_ptp_ops mlxsw_sp1_ptp_ops = {</div><div class='ctx'> 	.get_stats_count = mlxsw_sp1_get_stats_count,</div><div class='ctx'> 	.get_stats_strings = mlxsw_sp1_get_stats_strings,</div><div class='ctx'> 	.get_stats	= mlxsw_sp1_get_stats,</div><div class='del'>-	.txhdr_construct = mlxsw_sp_ptp_txhdr_construct,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct mlxsw_sp_ptp_ops mlxsw_sp2_ptp_ops = {</div><div class='hunk'>@@ -2811,7 +2678,7 @@ static const struct mlxsw_sp_ptp_ops mlxsw_sp2_ptp_ops = {</div><div class='ctx'> 	.get_stats_count = mlxsw_sp2_get_stats_count,</div><div class='ctx'> 	.get_stats_strings = mlxsw_sp2_get_stats_strings,</div><div class='ctx'> 	.get_stats	= mlxsw_sp2_get_stats,</div><div class='del'>-	.txhdr_construct = mlxsw_sp2_ptp_txhdr_construct,</div><div class='add'>+	.tx_as_data     = true,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct mlxsw_sp_ptp_ops mlxsw_sp4_ptp_ops = {</div><div class='hunk'>@@ -2830,7 +2697,6 @@ static const struct mlxsw_sp_ptp_ops mlxsw_sp4_ptp_ops = {</div><div class='ctx'> 	.get_stats_count = mlxsw_sp2_get_stats_count,</div><div class='ctx'> 	.get_stats_strings = mlxsw_sp2_get_stats_strings,</div><div class='ctx'> 	.get_stats	= mlxsw_sp2_get_stats,</div><div class='del'>-	.txhdr_construct = mlxsw_sp_ptp_txhdr_construct,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlxsw_sp_sample_trigger_node {</div><div class='hunk'>@@ -3992,11 +3858,9 @@ static struct mlxsw_driver mlxsw_sp1_driver = {</div><div class='ctx'> 	.trap_policer_fini		= mlxsw_sp_trap_policer_fini,</div><div class='ctx'> 	.trap_policer_set		= mlxsw_sp_trap_policer_set,</div><div class='ctx'> 	.trap_policer_counter_get	= mlxsw_sp_trap_policer_counter_get,</div><div class='del'>-	.txhdr_construct		= mlxsw_sp_txhdr_construct,</div><div class='ctx'> 	.resources_register		= mlxsw_sp1_resources_register,</div><div class='ctx'> 	.kvd_sizes_get			= mlxsw_sp_kvd_sizes_get,</div><div class='ctx'> 	.ptp_transmitted		= mlxsw_sp_ptp_transmitted,</div><div class='del'>-	.txhdr_len			= MLXSW_TXHDR_LEN,</div><div class='ctx'> 	.profile			= &amp;mlxsw_sp1_config_profile,</div><div class='ctx'> 	.sdq_supports_cqe_v2		= false,</div><div class='ctx'> };</div><div class='hunk'>@@ -4030,10 +3894,8 @@ static struct mlxsw_driver mlxsw_sp2_driver = {</div><div class='ctx'> 	.trap_policer_fini		= mlxsw_sp_trap_policer_fini,</div><div class='ctx'> 	.trap_policer_set		= mlxsw_sp_trap_policer_set,</div><div class='ctx'> 	.trap_policer_counter_get	= mlxsw_sp_trap_policer_counter_get,</div><div class='del'>-	.txhdr_construct		= mlxsw_sp_txhdr_construct,</div><div class='ctx'> 	.resources_register		= mlxsw_sp2_resources_register,</div><div class='ctx'> 	.ptp_transmitted		= mlxsw_sp_ptp_transmitted,</div><div class='del'>-	.txhdr_len			= MLXSW_TXHDR_LEN,</div><div class='ctx'> 	.profile			= &amp;mlxsw_sp2_config_profile,</div><div class='ctx'> 	.sdq_supports_cqe_v2		= true,</div><div class='ctx'> };</div><div class='hunk'>@@ -4067,10 +3929,8 @@ static struct mlxsw_driver mlxsw_sp3_driver = {</div><div class='ctx'> 	.trap_policer_fini		= mlxsw_sp_trap_policer_fini,</div><div class='ctx'> 	.trap_policer_set		= mlxsw_sp_trap_policer_set,</div><div class='ctx'> 	.trap_policer_counter_get	= mlxsw_sp_trap_policer_counter_get,</div><div class='del'>-	.txhdr_construct		= mlxsw_sp_txhdr_construct,</div><div class='ctx'> 	.resources_register		= mlxsw_sp2_resources_register,</div><div class='ctx'> 	.ptp_transmitted		= mlxsw_sp_ptp_transmitted,</div><div class='del'>-	.txhdr_len			= MLXSW_TXHDR_LEN,</div><div class='ctx'> 	.profile			= &amp;mlxsw_sp2_config_profile,</div><div class='ctx'> 	.sdq_supports_cqe_v2		= true,</div><div class='ctx'> };</div><div class='hunk'>@@ -4102,10 +3962,8 @@ static struct mlxsw_driver mlxsw_sp4_driver = {</div><div class='ctx'> 	.trap_policer_fini		= mlxsw_sp_trap_policer_fini,</div><div class='ctx'> 	.trap_policer_set		= mlxsw_sp_trap_policer_set,</div><div class='ctx'> 	.trap_policer_counter_get	= mlxsw_sp_trap_policer_counter_get,</div><div class='del'>-	.txhdr_construct		= mlxsw_sp_txhdr_construct,</div><div class='ctx'> 	.resources_register		= mlxsw_sp2_resources_register,</div><div class='ctx'> 	.ptp_transmitted		= mlxsw_sp_ptp_transmitted,</div><div class='del'>-	.txhdr_len			= MLXSW_TXHDR_LEN,</div><div class='ctx'> 	.profile			= &amp;mlxsw_sp4_config_profile,</div><div class='ctx'> 	.sdq_supports_cqe_v2		= true,</div><div class='ctx'> };</div><div class='hunk'>@@ -5343,25 +5201,13 @@ static int mlxsw_sp_netdevice_vxlan_event(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		if (!mlxsw_sp_bridge_vxlan_is_valid(upper_dev, extack))</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='del'>-		if (cu_info-&gt;linking) {</div><div class='del'>-			if (!netif_running(dev))</div><div class='del'>-				return 0;</div><div class='del'>-			/* When the bridge is VLAN-aware, the VNI of the VxLAN</div><div class='del'>-			 * device needs to be mapped to a VLAN, but at this</div><div class='del'>-			 * point no VLANs are configured on the VxLAN device</div><div class='del'>-			 */</div><div class='del'>-			if (br_vlan_enabled(upper_dev))</div><div class='del'>-				return 0;</div><div class='add'>+		if (!netif_running(dev))</div><div class='add'>+			return 0;</div><div class='add'>+		if (cu_info-&gt;linking)</div><div class='ctx'> 			return mlxsw_sp_bridge_vxlan_join(mlxsw_sp, upper_dev,</div><div class='ctx'> 							  dev, 0, extack);</div><div class='del'>-		} else {</div><div class='del'>-			/* VLANs were already flushed, which triggered the</div><div class='del'>-			 * necessary cleanup</div><div class='del'>-			 */</div><div class='del'>-			if (br_vlan_enabled(upper_dev))</div><div class='del'>-				return 0;</div><div class='add'>+		else</div><div class='ctx'> 			mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, dev);</div><div class='del'>-		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NETDEV_PRE_UP:</div><div class='ctx'> 		upper_dev = netdev_master_upper_dev_get(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.h b/drivers/net/ethernet/mellanox/mlxsw/spectrum.h<br/>index 8d3c61287696..b03ff9e044f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum.h</a></div><div class='hunk'>@@ -233,9 +233,10 @@ struct mlxsw_sp_ptp_ops {</div><div class='ctx'> 			    u16 local_port);</div><div class='ctx'> </div><div class='ctx'> 	int (*hwtstamp_get)(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			    struct hwtstamp_config *config);</div><div class='add'>+			    struct kernel_hwtstamp_config *config);</div><div class='ctx'> 	int (*hwtstamp_set)(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			    struct hwtstamp_config *config);</div><div class='add'>+			    struct kernel_hwtstamp_config *config,</div><div class='add'>+			    struct netlink_ext_ack *extack);</div><div class='ctx'> 	void (*shaper_work)(struct work_struct *work);</div><div class='ctx'> 	int (*get_ts_info)(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 			   struct kernel_ethtool_ts_info *info);</div><div class='hunk'>@@ -243,10 +244,7 @@ struct mlxsw_sp_ptp_ops {</div><div class='ctx'> 	void (*get_stats_strings)(u8 **p);</div><div class='ctx'> 	void (*get_stats)(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='ctx'> 			  u64 *data, int data_index);</div><div class='del'>-	int (*txhdr_construct)(struct mlxsw_core *mlxsw_core,</div><div class='del'>-			       struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			       struct sk_buff *skb,</div><div class='del'>-			       const struct mlxsw_tx_info *tx_info);</div><div class='add'>+	bool tx_as_data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlxsw_sp_fid_core_ops {</div><div class='hunk'>@@ -354,7 +352,7 @@ struct mlxsw_sp_port {</div><div class='ctx'> 	struct mlxsw_sp_flow_block *eg_flow_block;</div><div class='ctx'> 	struct {</div><div class='ctx'> 		struct delayed_work shaper_dw;</div><div class='del'>-		struct hwtstamp_config hwtstamp_config;</div><div class='add'>+		struct kernel_hwtstamp_config hwtstamp_config;</div><div class='ctx'> 		u16 ing_types;</div><div class='ctx'> 		u16 egr_types;</div><div class='ctx'> 		struct mlxsw_sp_ptp_port_stats stats;</div><div class='hunk'>@@ -664,10 +662,10 @@ bool mlxsw_sp_bridge_device_is_offloaded(const struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 					 const struct net_device *br_dev);</div><div class='ctx'> int mlxsw_sp_bridge_vxlan_join(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 			       const struct net_device *br_dev,</div><div class='del'>-			       const struct net_device *vxlan_dev, u16 vid,</div><div class='add'>+			       struct net_device *vxlan_dev, u16 vid,</div><div class='ctx'> 			       struct netlink_ext_ack *extack);</div><div class='ctx'> void mlxsw_sp_bridge_vxlan_leave(struct mlxsw_sp *mlxsw_sp,</div><div class='del'>-				 const struct net_device *vxlan_dev);</div><div class='add'>+				 struct net_device *vxlan_dev);</div><div class='ctx'> extern struct notifier_block mlxsw_sp_switchdev_notifier;</div><div class='ctx'> </div><div class='ctx'> /* spectrum.c */</div><div class='hunk'>@@ -711,12 +709,6 @@ int mlxsw_sp_flow_counter_alloc(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 				unsigned int *p_counter_index);</div><div class='ctx'> void mlxsw_sp_flow_counter_free(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 				unsigned int counter_index);</div><div class='del'>-void mlxsw_sp_txhdr_construct(struct sk_buff *skb,</div><div class='del'>-			      const struct mlxsw_tx_info *tx_info);</div><div class='del'>-int mlxsw_sp_txhdr_ptp_data_construct(struct mlxsw_core *mlxsw_core,</div><div class='del'>-				      struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-				      struct sk_buff *skb,</div><div class='del'>-				      const struct mlxsw_tx_info *tx_info);</div><div class='ctx'> bool mlxsw_sp_port_dev_check(const struct net_device *dev);</div><div class='ctx'> struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev);</div><div class='ctx'> struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev);</div><div class='hunk'>@@ -763,9 +755,6 @@ void</div><div class='ctx'> mlxsw_sp_port_vlan_router_leave(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan);</div><div class='ctx'> void mlxsw_sp_rif_destroy_by_dev(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 				 struct net_device *dev);</div><div class='del'>-bool mlxsw_sp_rif_exists(struct mlxsw_sp *mlxsw_sp,</div><div class='del'>-			 const struct net_device *dev);</div><div class='del'>-u16 mlxsw_sp_rif_vid(struct mlxsw_sp *mlxsw_sp, const struct net_device *dev);</div><div class='ctx'> u16 mlxsw_sp_router_port(const struct mlxsw_sp *mlxsw_sp);</div><div class='ctx'> int mlxsw_sp_router_nve_promote_decap(struct mlxsw_sp *mlxsw_sp, u32 ul_tb_id,</div><div class='ctx'> 				      enum mlxsw_sp_l3proto ul_proto,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c<br/>index a54eedb69a3f..067f0055a55a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c</a></div><div class='hunk'>@@ -212,7 +212,22 @@ static const u8 mlxsw_sp4_acl_bf_crc6_tab[256] = {</div><div class='ctx'>  * This array defines key offsets for easy access when copying key blocks from</div><div class='ctx'>  * entry key to Bloom filter chunk.</div><div class='ctx'>  */</div><div class='del'>-static const u8 chunk_key_offsets[MLXSW_BLOOM_KEY_CHUNKS] = {2, 20, 38};</div><div class='add'>+static char *</div><div class='add'>+mlxsw_sp_acl_bf_enc_key_get(struct mlxsw_sp_acl_atcam_entry *aentry,</div><div class='add'>+			    u8 chunk_index)</div><div class='add'>+{</div><div class='add'>+	switch (chunk_index) {</div><div class='add'>+	case 0:</div><div class='add'>+		return &amp;aentry-&gt;ht_key.enc_key[2];</div><div class='add'>+	case 1:</div><div class='add'>+		return &amp;aentry-&gt;ht_key.enc_key[20];</div><div class='add'>+	case 2:</div><div class='add'>+		return &amp;aentry-&gt;ht_key.enc_key[38];</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return &amp;aentry-&gt;ht_key.enc_key[0];</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static u16 mlxsw_sp2_acl_bf_crc16_byte(u16 crc, u8 c)</div><div class='ctx'> {</div><div class='hunk'>@@ -235,9 +250,10 @@ __mlxsw_sp_acl_bf_key_encode(struct mlxsw_sp_acl_atcam_region *aregion,</div><div class='ctx'> 			     u8 key_offset, u8 chunk_key_len, u8 chunk_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlxsw_afk_key_info *key_info = aregion-&gt;region-&gt;key_info;</div><div class='del'>-	u8 chunk_index, chunk_count, block_count;</div><div class='add'>+	u8 chunk_index, chunk_count;</div><div class='ctx'> 	char *chunk = output;</div><div class='ctx'> 	__be16 erp_region_id;</div><div class='add'>+	u32 block_count;</div><div class='ctx'> </div><div class='ctx'> 	block_count = mlxsw_afk_key_info_blocks_count_get(key_info);</div><div class='ctx'> 	chunk_count = 1 + ((block_count - 1) &gt;&gt; 2);</div><div class='hunk'>@@ -245,12 +261,13 @@ __mlxsw_sp_acl_bf_key_encode(struct mlxsw_sp_acl_atcam_region *aregion,</div><div class='ctx'> 				   (aregion-&gt;region-&gt;id &lt;&lt; 4));</div><div class='ctx'> 	for (chunk_index = max_chunks - chunk_count; chunk_index &lt; max_chunks;</div><div class='ctx'> 	     chunk_index++) {</div><div class='add'>+		char *enc_key;</div><div class='add'>+</div><div class='ctx'> 		memset(chunk, 0, pad_bytes);</div><div class='ctx'> 		memcpy(chunk + pad_bytes, &amp;erp_region_id,</div><div class='ctx'> 		       sizeof(erp_region_id));</div><div class='del'>-		memcpy(chunk + key_offset,</div><div class='del'>-		       &amp;aentry-&gt;ht_key.enc_key[chunk_key_offsets[chunk_index]],</div><div class='del'>-		       chunk_key_len);</div><div class='add'>+		enc_key = mlxsw_sp_acl_bf_enc_key_get(aentry, chunk_index);</div><div class='add'>+		memcpy(chunk + key_offset, enc_key, chunk_key_len);</div><div class='ctx'> 		chunk += chunk_len;</div><div class='ctx'> 	}</div><div class='ctx'> 	*len = chunk_count * chunk_len;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c<br/>index 6fe185ea6732..1850a975b380 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c</a></div><div class='hunk'>@@ -324,6 +324,10 @@ static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_mac_5b[] =</div><div class='ctx'> 	MLXSW_AFK_ELEMENT_INST_EXT_U32(SRC_SYS_PORT, 0x04, 0, 9, -1, true), /* RX_ACL_SYSTEM_PORT */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_1b[] = {</div><div class='add'>+	MLXSW_AFK_ELEMENT_INST_BUF(SRC_IP_0_31, 0x04, 4),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct mlxsw_afk_element_inst mlxsw_sp_afk_element_info_ipv4_5b[] = {</div><div class='ctx'> 	MLXSW_AFK_ELEMENT_INST_U32(VIRT_ROUTER, 0x04, 20, 12),</div><div class='ctx'> };</div><div class='hunk'>@@ -341,7 +345,7 @@ static const struct mlxsw_afk_block mlxsw_sp4_afk_blocks[] = {</div><div class='ctx'> 	MLXSW_AFK_BLOCK(0x14, mlxsw_sp_afk_element_info_mac_4),</div><div class='ctx'> 	MLXSW_AFK_BLOCK_HIGH_ENTROPY(0x1A, mlxsw_sp_afk_element_info_mac_5b),</div><div class='ctx'> 	MLXSW_AFK_BLOCK_HIGH_ENTROPY(0x38, mlxsw_sp_afk_element_info_ipv4_0),</div><div class='del'>-	MLXSW_AFK_BLOCK_HIGH_ENTROPY(0x39, mlxsw_sp_afk_element_info_ipv4_1),</div><div class='add'>+	MLXSW_AFK_BLOCK_HIGH_ENTROPY(0x3F, mlxsw_sp_afk_element_info_ipv4_1b),</div><div class='ctx'> 	MLXSW_AFK_BLOCK(0x3A, mlxsw_sp_afk_element_info_ipv4_2),</div><div class='ctx'> 	MLXSW_AFK_BLOCK(0x36, mlxsw_sp_afk_element_info_ipv4_5b),</div><div class='ctx'> 	MLXSW_AFK_BLOCK(0x40, mlxsw_sp_afk_element_info_ipv6_0),</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c<br/>index b1d08e958bf9..69f9da9fb305 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c</a></div><div class='hunk'>@@ -1489,7 +1489,8 @@ mlxsw_sp_acl_tcam_vregion_rehash(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> mlxsw_sp_acl_tcam_region_rehash_intrvl_get(struct devlink *devlink, u32 id,</div><div class='del'>-					   struct devlink_param_gset_ctx *ctx)</div><div class='add'>+					   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);</div><div class='ctx'> 	struct mlxsw_sp_acl_tcam *tcam;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c<br/>index 50e591420bd9..b1094aaffa5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c</a></div><div class='hunk'>@@ -170,8 +170,7 @@ void mlxsw_sp_counter_pool_fini(struct mlxsw_sp *mlxsw_sp)</div><div class='ctx'> 	struct devlink *devlink = priv_to_devlink(mlxsw_sp-&gt;core);</div><div class='ctx'> </div><div class='ctx'> 	mlxsw_sp_counter_sub_pools_fini(mlxsw_sp);</div><div class='del'>-	WARN_ON(find_first_bit(pool-&gt;usage, pool-&gt;pool_size) !=</div><div class='del'>-			       pool-&gt;pool_size);</div><div class='add'>+	WARN_ON(!bitmap_empty(pool-&gt;usage, pool-&gt;pool_size));</div><div class='ctx'> 	WARN_ON(atomic_read(&amp;pool-&gt;active_entries_count));</div><div class='ctx'> 	bitmap_free(pool-&gt;usage);</div><div class='ctx'> 	devl_resource_occ_get_unregister(devlink,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c<br/>index 2bed8c86b7cf..0a8fb9c842d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c</a></div><div class='hunk'>@@ -262,7 +262,7 @@ err_port_pause_configure:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct mlxsw_sp_port_hw_stats {</div><div class='del'>-	char str[ETH_GSTRING_LEN];</div><div class='add'>+	char str[ETH_GSTRING_LEN] __nonstring;</div><div class='ctx'> 	u64 (*getter)(const char *payload);</div><div class='ctx'> 	bool cells_bytes;</div><div class='ctx'> };</div><div class='hunk'>@@ -768,7 +768,9 @@ static void __mlxsw_sp_port_get_stats(struct net_device *dev,</div><div class='ctx'> 	err = mlxsw_sp_get_hw_stats_by_group(&amp;hw_stats, &amp;len, grp);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return;</div><div class='del'>-	mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);</div><div class='add'>+	err = mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);</div><div class='add'>+	if (err)</div><div class='add'>+		return;</div><div class='ctx'> 	for (i = 0; i &lt; len; i++) {</div><div class='ctx'> 		data[data_index + i] = hw_stats[i].getter(ppcnt_pl);</div><div class='ctx'> 		if (!hw_stats[i].cells_bytes)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c<br/>index f07955b5439f..353fd9ca89a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c</a></div><div class='hunk'>@@ -192,6 +192,11 @@ static int mlxsw_sp_flower_parse_actions(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='add'>+			if (sample_act_count) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack, "Mirror action after sample action is not supported");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			err = mlxsw_sp_acl_rulei_act_mirror(mlxsw_sp, rulei,</div><div class='ctx'> 							    block, out_dev,</div><div class='ctx'> 							    extack);</div><div class='hunk'>@@ -265,6 +270,11 @@ static int mlxsw_sp_flower_parse_actions(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='add'>+			if (mirror_act_count) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack, "Sample action after mirror action is not supported");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			err = mlxsw_sp_acl_rulei_act_sample(mlxsw_sp, rulei,</div><div class='ctx'> 							    block,</div><div class='ctx'> 							    act-&gt;sample.psample_group,</div><div class='hunk'>@@ -820,8 +830,10 @@ int mlxsw_sp_flower_stats(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	rule = mlxsw_sp_acl_rule_lookup(mlxsw_sp, ruleset, f-&gt;cookie);</div><div class='del'>-	if (!rule)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (!rule) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_rule_get_stats;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = mlxsw_sp_acl_rule_get_stats(mlxsw_sp, rule, &amp;packets, &amp;bytes,</div><div class='ctx'> 					  &amp;drops, &amp;lastuse, &amp;used_hw_stats);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c<br/>index 69cd689dbc83..5afe6b155ef0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c</a></div><div class='hunk'>@@ -1003,10 +1003,10 @@ static void mlxsw_sp_mr_route_stats_update(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 	mr-&gt;mr_ops-&gt;route_stats(mlxsw_sp, mr_route-&gt;route_priv, &amp;packets,</div><div class='ctx'> 				&amp;bytes);</div><div class='ctx'> </div><div class='del'>-	if (mr_route-&gt;mfc-&gt;mfc_un.res.pkt != packets)</div><div class='del'>-		mr_route-&gt;mfc-&gt;mfc_un.res.lastuse = jiffies;</div><div class='del'>-	mr_route-&gt;mfc-&gt;mfc_un.res.pkt = packets;</div><div class='del'>-	mr_route-&gt;mfc-&gt;mfc_un.res.bytes = bytes;</div><div class='add'>+	if (atomic_long_read(&amp;mr_route-&gt;mfc-&gt;mfc_un.res.pkt) != packets)</div><div class='add'>+		WRITE_ONCE(mr_route-&gt;mfc-&gt;mfc_un.res.lastuse, jiffies);</div><div class='add'>+	atomic_long_set(&amp;mr_route-&gt;mfc-&gt;mfc_un.res.pkt, packets);</div><div class='add'>+	atomic_long_set(&amp;mr_route-&gt;mfc-&gt;mfc_un.res.bytes, bytes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlxsw_sp_mr_stats_update(struct work_struct *work)</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c<br/>index d94081c7658e..5b9f0844b8f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c</a></div><div class='hunk'>@@ -46,7 +46,7 @@ struct mlxsw_sp2_ptp_state {</div><div class='ctx'> 	refcount_t ptp_port_enabled_ref; /* Number of ports with time stamping</div><div class='ctx'> 					  * enabled.</div><div class='ctx'> 					  */</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	struct kernel_hwtstamp_config config;</div><div class='ctx'> 	struct mutex lock; /* Protects 'config' and HW configuration. */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -131,7 +131,7 @@ static u64 __mlxsw_sp1_ptp_read_frc(struct mlxsw_sp1_ptp_clock *clock,</div><div class='ctx'> 	return (u64) frc_l | (u64) frc_h2 &lt;&lt; 32;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 mlxsw_sp1_ptp_read_frc(const struct cyclecounter *cc)</div><div class='add'>+static u64 mlxsw_sp1_ptp_read_frc(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlxsw_sp1_ptp_clock *clock =</div><div class='ctx'> 		container_of(cc, struct mlxsw_sp1_ptp_clock, cycles);</div><div class='hunk'>@@ -1083,14 +1083,14 @@ void mlxsw_sp1_ptp_fini(struct mlxsw_sp_ptp_state *ptp_state_common)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlxsw_sp1_ptp_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			       struct hwtstamp_config *config)</div><div class='add'>+			       struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	*config = mlxsw_sp_port-&gt;ptp.hwtstamp_config;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-mlxsw_sp1_ptp_get_message_types(const struct hwtstamp_config *config,</div><div class='add'>+mlxsw_sp1_ptp_get_message_types(const struct kernel_hwtstamp_config *config,</div><div class='ctx'> 				u16 *p_ing_types, u16 *p_egr_types,</div><div class='ctx'> 				enum hwtstamp_rx_filters *p_rx_filter)</div><div class='ctx'> {</div><div class='hunk'>@@ -1246,7 +1246,8 @@ void mlxsw_sp1_ptp_shaper_work(struct work_struct *work)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlxsw_sp1_ptp_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			       struct hwtstamp_config *config)</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	enum hwtstamp_rx_filters rx_filter;</div><div class='ctx'> 	u16 ing_types;</div><div class='hunk'>@@ -1270,7 +1271,7 @@ int mlxsw_sp1_ptp_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* Notify the ioctl caller what we are actually timestamping. */</div><div class='add'>+	/* Notify the caller what we are actually timestamping. */</div><div class='ctx'> 	config-&gt;rx_filter = rx_filter;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1353,6 +1354,10 @@ struct mlxsw_sp_ptp_state *mlxsw_sp2_ptp_init(struct mlxsw_sp *mlxsw_sp)</div><div class='ctx'> 	struct mlxsw_sp2_ptp_state *ptp_state;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	/* Max FID will be used in data path, check validity as part of init. */</div><div class='add'>+	if (!MLXSW_CORE_RES_VALID(mlxsw_sp-&gt;core, FID))</div><div class='add'>+		return ERR_PTR(-EIO);</div><div class='add'>+</div><div class='ctx'> 	ptp_state = kzalloc(sizeof(*ptp_state), GFP_KERNEL);</div><div class='ctx'> 	if (!ptp_state)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='hunk'>@@ -1447,7 +1452,7 @@ void mlxsw_sp2_ptp_transmitted(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlxsw_sp2_ptp_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			       struct hwtstamp_config *config)</div><div class='add'>+			       struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlxsw_sp2_ptp_state *ptp_state;</div><div class='ctx'> </div><div class='hunk'>@@ -1461,7 +1466,7 @@ int mlxsw_sp2_ptp_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-mlxsw_sp2_ptp_get_message_types(const struct hwtstamp_config *config,</div><div class='add'>+mlxsw_sp2_ptp_get_message_types(const struct kernel_hwtstamp_config *config,</div><div class='ctx'> 				u16 *p_ing_types, u16 *p_egr_types,</div><div class='ctx'> 				enum hwtstamp_rx_filters *p_rx_filter)</div><div class='ctx'> {</div><div class='hunk'>@@ -1538,7 +1543,7 @@ static int mlxsw_sp2_ptp_mtpcpc_set(struct mlxsw_sp *mlxsw_sp, bool ptp_trap_en,</div><div class='ctx'> </div><div class='ctx'> static int mlxsw_sp2_ptp_enable(struct mlxsw_sp *mlxsw_sp, u16 ing_types,</div><div class='ctx'> 				u16 egr_types,</div><div class='del'>-				struct hwtstamp_config new_config)</div><div class='add'>+				struct kernel_hwtstamp_config new_config)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlxsw_sp2_ptp_state *ptp_state = mlxsw_sp2_ptp_state(mlxsw_sp);</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1552,7 +1557,7 @@ static int mlxsw_sp2_ptp_enable(struct mlxsw_sp *mlxsw_sp, u16 ing_types,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlxsw_sp2_ptp_disable(struct mlxsw_sp *mlxsw_sp,</div><div class='del'>-				 struct hwtstamp_config new_config)</div><div class='add'>+				 struct kernel_hwtstamp_config new_config)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlxsw_sp2_ptp_state *ptp_state = mlxsw_sp2_ptp_state(mlxsw_sp);</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1567,7 +1572,7 @@ static int mlxsw_sp2_ptp_disable(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> </div><div class='ctx'> static int mlxsw_sp2_ptp_configure_port(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='ctx'> 					u16 ing_types, u16 egr_types,</div><div class='del'>-					struct hwtstamp_config new_config)</div><div class='add'>+					struct kernel_hwtstamp_config new_config)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlxsw_sp2_ptp_state *ptp_state;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1588,7 +1593,7 @@ static int mlxsw_sp2_ptp_configure_port(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mlxsw_sp2_ptp_deconfigure_port(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-					  struct hwtstamp_config new_config)</div><div class='add'>+					  struct kernel_hwtstamp_config new_config)</div><div class='ctx'> {</div><div class='ctx'> 	struct mlxsw_sp2_ptp_state *ptp_state;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1610,11 +1615,12 @@ err_ptp_disable:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mlxsw_sp2_ptp_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			       struct hwtstamp_config *config)</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct kernel_hwtstamp_config new_config;</div><div class='ctx'> 	struct mlxsw_sp2_ptp_state *ptp_state;</div><div class='ctx'> 	enum hwtstamp_rx_filters rx_filter;</div><div class='del'>-	struct hwtstamp_config new_config;</div><div class='ctx'> 	u16 new_ing_types, new_egr_types;</div><div class='ctx'> 	bool ptp_enabled;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1648,7 +1654,7 @@ int mlxsw_sp2_ptp_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='ctx'> 	mlxsw_sp_port-&gt;ptp.ing_types = new_ing_types;</div><div class='ctx'> 	mlxsw_sp_port-&gt;ptp.egr_types = new_egr_types;</div><div class='ctx'> </div><div class='del'>-	/* Notify the ioctl caller what we are actually timestamping. */</div><div class='add'>+	/* Notify the caller what we are actually timestamping. */</div><div class='ctx'> 	config-&gt;rx_filter = rx_filter;</div><div class='ctx'> 	mutex_unlock(&amp;ptp_state-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1679,43 +1685,3 @@ int mlxsw_sp2_ptp_get_ts_info(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-int mlxsw_sp_ptp_txhdr_construct(struct mlxsw_core *mlxsw_core,</div><div class='del'>-				 struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-				 struct sk_buff *skb,</div><div class='del'>-				 const struct mlxsw_tx_info *tx_info)</div><div class='del'>-{</div><div class='del'>-	if (skb_cow_head(skb, MLXSW_TXHDR_LEN)) {</div><div class='del'>-		this_cpu_inc(mlxsw_sp_port-&gt;pcpu_stats-&gt;tx_dropped);</div><div class='del'>-		dev_kfree_skb_any(skb);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mlxsw_sp_txhdr_construct(skb, tx_info);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mlxsw_sp2_ptp_txhdr_construct(struct mlxsw_core *mlxsw_core,</div><div class='del'>-				  struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-				  struct sk_buff *skb,</div><div class='del'>-				  const struct mlxsw_tx_info *tx_info)</div><div class='del'>-{</div><div class='del'>-	/* In Spectrum-2 and Spectrum-3, in order for PTP event packets to have</div><div class='del'>-	 * their correction field correctly set on the egress port they must be</div><div class='del'>-	 * transmitted as data packets. Such packets ingress the ASIC via the</div><div class='del'>-	 * CPU port and must have a VLAN tag, as the CPU port is not configured</div><div class='del'>-	 * with a PVID. Push the default VLAN (4095), which is configured as</div><div class='del'>-	 * egress untagged on all the ports.</div><div class='del'>-	 */</div><div class='del'>-	if (!skb_vlan_tagged(skb)) {</div><div class='del'>-		skb = vlan_insert_tag_set_proto(skb, htons(ETH_P_8021Q),</div><div class='del'>-						MLXSW_SP_DEFAULT_VID);</div><div class='del'>-		if (!skb) {</div><div class='del'>-			this_cpu_inc(mlxsw_sp_port-&gt;pcpu_stats-&gt;tx_dropped);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return mlxsw_sp_txhdr_ptp_data_construct(mlxsw_core, mlxsw_sp_port, skb,</div><div class='del'>-						 tx_info);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h<br/>index c8aa1452fbb9..df37f1470830 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h</a></div><div class='hunk'>@@ -34,10 +34,11 @@ void mlxsw_sp1_ptp_got_timestamp(struct mlxsw_sp *mlxsw_sp, bool ingress,</div><div class='ctx'> 				 u64 timestamp);</div><div class='ctx'> </div><div class='ctx'> int mlxsw_sp1_ptp_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			       struct hwtstamp_config *config);</div><div class='add'>+			       struct kernel_hwtstamp_config *config);</div><div class='ctx'> </div><div class='ctx'> int mlxsw_sp1_ptp_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			       struct hwtstamp_config *config);</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack);</div><div class='ctx'> </div><div class='ctx'> void mlxsw_sp1_ptp_shaper_work(struct work_struct *work);</div><div class='ctx'> </div><div class='hunk'>@@ -49,11 +50,6 @@ void mlxsw_sp1_get_stats_strings(u8 **p);</div><div class='ctx'> void mlxsw_sp1_get_stats(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='ctx'> 			 u64 *data, int data_index);</div><div class='ctx'> </div><div class='del'>-int mlxsw_sp_ptp_txhdr_construct(struct mlxsw_core *mlxsw_core,</div><div class='del'>-				 struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-				 struct sk_buff *skb,</div><div class='del'>-				 const struct mlxsw_tx_info *tx_info);</div><div class='del'>-</div><div class='ctx'> struct mlxsw_sp_ptp_clock *</div><div class='ctx'> mlxsw_sp2_ptp_clock_init(struct mlxsw_sp *mlxsw_sp, struct device *dev);</div><div class='ctx'> </div><div class='hunk'>@@ -70,19 +66,15 @@ void mlxsw_sp2_ptp_transmitted(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 			       struct sk_buff *skb, u16 local_port);</div><div class='ctx'> </div><div class='ctx'> int mlxsw_sp2_ptp_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			       struct hwtstamp_config *config);</div><div class='add'>+			       struct kernel_hwtstamp_config *config);</div><div class='ctx'> </div><div class='ctx'> int mlxsw_sp2_ptp_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			       struct hwtstamp_config *config);</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack);</div><div class='ctx'> </div><div class='ctx'> int mlxsw_sp2_ptp_get_ts_info(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 			      struct kernel_ethtool_ts_info *info);</div><div class='ctx'> </div><div class='del'>-int mlxsw_sp2_ptp_txhdr_construct(struct mlxsw_core *mlxsw_core,</div><div class='del'>-				  struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-				  struct sk_buff *skb,</div><div class='del'>-				  const struct mlxsw_tx_info *tx_info);</div><div class='del'>-</div><div class='ctx'> #else</div><div class='ctx'> </div><div class='ctx'> static inline struct mlxsw_sp_ptp_clock *</div><div class='hunk'>@@ -127,14 +119,15 @@ mlxsw_sp1_ptp_got_timestamp(struct mlxsw_sp *mlxsw_sp, bool ingress,</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='ctx'> mlxsw_sp1_ptp_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			   struct hwtstamp_config *config)</div><div class='add'>+			   struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='ctx'> mlxsw_sp1_ptp_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			   struct hwtstamp_config *config)</div><div class='add'>+			   struct kernel_hwtstamp_config *config,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='hunk'>@@ -157,15 +150,6 @@ static inline void mlxsw_sp1_get_stats(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int</div><div class='del'>-mlxsw_sp_ptp_txhdr_construct(struct mlxsw_core *mlxsw_core,</div><div class='del'>-			     struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			     struct sk_buff *skb,</div><div class='del'>-			     const struct mlxsw_tx_info *tx_info)</div><div class='del'>-{</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline struct mlxsw_sp_ptp_clock *</div><div class='ctx'> mlxsw_sp2_ptp_clock_init(struct mlxsw_sp *mlxsw_sp, struct device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -200,23 +184,15 @@ static inline void mlxsw_sp2_ptp_transmitted(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='ctx'> mlxsw_sp2_ptp_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			   struct hwtstamp_config *config)</div><div class='add'>+			   struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int</div><div class='ctx'> mlxsw_sp2_ptp_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			   struct hwtstamp_config *config)</div><div class='del'>-{</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-mlxsw_sp2_ptp_txhdr_construct(struct mlxsw_core *mlxsw_core,</div><div class='del'>-			      struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='del'>-			      struct sk_buff *skb,</div><div class='del'>-			      const struct mlxsw_tx_info *tx_info)</div><div class='add'>+			   struct kernel_hwtstamp_config *config,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c<br/>index 7d6d859cef3f..a2033837182e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c</a></div><div class='hunk'>@@ -3014,6 +3014,9 @@ static int mlxsw_sp_neigh_rif_made_sync(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 		.rif = rif,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	if (!mlxsw_sp_dev_lower_is_port(mlxsw_sp_rif_dev(rif)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	neigh_for_each(&amp;arp_tbl, mlxsw_sp_neigh_rif_made_sync_each, &amp;rms);</div><div class='ctx'> 	if (rms.err)</div><div class='ctx'> 		goto err_arp;</div><div class='hunk'>@@ -8184,41 +8187,6 @@ mlxsw_sp_rif_find_by_dev(const struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-bool mlxsw_sp_rif_exists(struct mlxsw_sp *mlxsw_sp,</div><div class='del'>-			 const struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mlxsw_sp_rif *rif;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;mlxsw_sp-&gt;router-&gt;lock);</div><div class='del'>-	rif = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);</div><div class='del'>-	mutex_unlock(&amp;mlxsw_sp-&gt;router-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return rif;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u16 mlxsw_sp_rif_vid(struct mlxsw_sp *mlxsw_sp, const struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct mlxsw_sp_rif *rif;</div><div class='del'>-	u16 vid = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;mlxsw_sp-&gt;router-&gt;lock);</div><div class='del'>-	rif = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);</div><div class='del'>-	if (!rif)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/* We only return the VID for VLAN RIFs. Otherwise we return an</div><div class='del'>-	 * invalid value (0).</div><div class='del'>-	 */</div><div class='del'>-	if (rif-&gt;ops-&gt;type != MLXSW_SP_RIF_TYPE_VLAN)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	vid = mlxsw_sp_fid_8021q_vid(rif-&gt;fid);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;mlxsw_sp-&gt;router-&gt;lock);</div><div class='del'>-	return vid;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mlxsw_sp_router_rif_disable(struct mlxsw_sp *mlxsw_sp, u16 rif)</div><div class='ctx'> {</div><div class='ctx'> 	char ritr_pl[MLXSW_REG_RITR_LEN];</div><div class='hunk'>@@ -8417,19 +8385,6 @@ u16 mlxsw_sp_ipip_lb_rif_index(const struct mlxsw_sp_rif_ipip_lb *lb_rif)</div><div class='ctx'> 	return lb_rif-&gt;common.rif_index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u16 mlxsw_sp_ipip_lb_ul_vr_id(const struct mlxsw_sp_rif_ipip_lb *lb_rif)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = mlxsw_sp_rif_dev(&amp;lb_rif-&gt;common);</div><div class='del'>-	u32 ul_tb_id = mlxsw_sp_ipip_dev_ul_tb_id(dev);</div><div class='del'>-	struct mlxsw_sp_vr *ul_vr;</div><div class='del'>-</div><div class='del'>-	ul_vr = mlxsw_sp_vr_get(lb_rif-&gt;common.mlxsw_sp, ul_tb_id, NULL);</div><div class='del'>-	if (WARN_ON(IS_ERR(ul_vr)))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return ul_vr-&gt;id;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> u16 mlxsw_sp_ipip_lb_ul_rif_id(const struct mlxsw_sp_rif_ipip_lb *lb_rif)</div><div class='ctx'> {</div><div class='ctx'> 	return lb_rif-&gt;ul_rif_id;</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h<br/>index 0432c7cc6b07..313efab5c324 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h</a></div><div class='hunk'>@@ -90,7 +90,6 @@ struct mlxsw_sp_ipip_entry;</div><div class='ctx'> struct mlxsw_sp_rif *mlxsw_sp_rif_by_index(const struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 					   u16 rif_index);</div><div class='ctx'> u16 mlxsw_sp_ipip_lb_rif_index(const struct mlxsw_sp_rif_ipip_lb *rif);</div><div class='del'>-u16 mlxsw_sp_ipip_lb_ul_vr_id(const struct mlxsw_sp_rif_ipip_lb *rif);</div><div class='ctx'> u16 mlxsw_sp_ipip_lb_ul_rif_id(const struct mlxsw_sp_rif_ipip_lb *lb_rif);</div><div class='ctx'> u32 mlxsw_sp_ipip_dev_ul_tb_id(const struct net_device *ol_dev);</div><div class='ctx'> int mlxsw_sp_rif_dev_ifindex(const struct mlxsw_sp_rif *rif);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c<br/>index 4b5fd71c897d..32d2e61f2b82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c</a></div><div class='hunk'>@@ -423,8 +423,7 @@ mlxsw_sp_span_gretap4_route(const struct net_device *to_dev,</div><div class='ctx'> </div><div class='ctx'> 	parms = mlxsw_sp_ipip_netdev_parms4(to_dev);</div><div class='ctx'> 	ip_tunnel_init_flow(&amp;fl4, parms.iph.protocol, *daddrp, *saddrp,</div><div class='del'>-			    0, 0, dev_net(to_dev), parms.link, tun-&gt;fwmark, 0,</div><div class='del'>-			    0);</div><div class='add'>+			    0, 0, tun-&gt;net, parms.link, tun-&gt;fwmark, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	rt = ip_route_output_key(tun-&gt;net, &amp;fl4);</div><div class='ctx'> 	if (IS_ERR(rt))</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c<br/>index 6397ff0dc951..a48bf342084d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c</a></div><div class='hunk'>@@ -2929,23 +2929,8 @@ void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port,</div><div class='ctx'> 	mlxsw_sp_bridge_port_put(mlxsw_sp-&gt;bridge, bridge_port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mlxsw_sp_bridge_vxlan_join(struct mlxsw_sp *mlxsw_sp,</div><div class='del'>-			       const struct net_device *br_dev,</div><div class='del'>-			       const struct net_device *vxlan_dev, u16 vid,</div><div class='del'>-			       struct netlink_ext_ack *extack)</div><div class='del'>-{</div><div class='del'>-	struct mlxsw_sp_bridge_device *bridge_device;</div><div class='del'>-</div><div class='del'>-	bridge_device = mlxsw_sp_bridge_device_find(mlxsw_sp-&gt;bridge, br_dev);</div><div class='del'>-	if (WARN_ON(!bridge_device))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return bridge_device-&gt;ops-&gt;vxlan_join(bridge_device, vxlan_dev, vid,</div><div class='del'>-					      extack);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void mlxsw_sp_bridge_vxlan_leave(struct mlxsw_sp *mlxsw_sp,</div><div class='del'>-				 const struct net_device *vxlan_dev)</div><div class='add'>+static void __mlxsw_sp_bridge_vxlan_leave(struct mlxsw_sp *mlxsw_sp,</div><div class='add'>+					  const struct net_device *vxlan_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(vxlan_dev);</div><div class='ctx'> 	struct mlxsw_sp_fid *fid;</div><div class='hunk'>@@ -2963,6 +2948,47 @@ void mlxsw_sp_bridge_vxlan_leave(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 	mlxsw_sp_fid_put(fid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mlxsw_sp_bridge_vxlan_join(struct mlxsw_sp *mlxsw_sp,</div><div class='add'>+			       const struct net_device *br_dev,</div><div class='add'>+			       struct net_device *vxlan_dev, u16 vid,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mlxsw_sp_bridge_device *bridge_device;</div><div class='add'>+	struct mlxsw_sp_port *mlxsw_sp_port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	bridge_device = mlxsw_sp_bridge_device_find(mlxsw_sp-&gt;bridge, br_dev);</div><div class='add'>+	if (WARN_ON(!bridge_device))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(bridge_device-&gt;dev);</div><div class='add'>+	if (!mlxsw_sp_port)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = bridge_device-&gt;ops-&gt;vxlan_join(bridge_device, vxlan_dev, vid,</div><div class='add'>+					     extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = switchdev_bridge_port_offload(vxlan_dev, mlxsw_sp_port-&gt;dev,</div><div class='add'>+					    NULL, NULL, NULL, false, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_bridge_port_offload;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_bridge_port_offload:</div><div class='add'>+	__mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, vxlan_dev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mlxsw_sp_bridge_vxlan_leave(struct mlxsw_sp *mlxsw_sp,</div><div class='add'>+				 struct net_device *vxlan_dev)</div><div class='add'>+{</div><div class='add'>+	switchdev_bridge_port_unoffload(vxlan_dev, NULL, NULL, NULL);</div><div class='add'>+	__mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, vxlan_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> mlxsw_sp_switchdev_vxlan_addr_convert(const union vxlan_addr *vxlan_addr,</div><div class='ctx'> 				      enum mlxsw_sp_l3proto *proto,</div><div class='hunk'>@@ -3867,7 +3893,7 @@ mlxsw_sp_switchdev_vxlan_vlan_add(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 			mlxsw_sp_fid_put(fid);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-		mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, vxlan_dev);</div><div class='add'>+		__mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, vxlan_dev);</div><div class='ctx'> 		mlxsw_sp_fid_put(fid);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3883,7 +3909,7 @@ mlxsw_sp_switchdev_vxlan_vlan_add(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 	/* Fourth case: Thew new VLAN is PVID, which means the VLAN currently</div><div class='ctx'> 	 * mapped to the VNI should be unmapped</div><div class='ctx'> 	 */</div><div class='del'>-	mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, vxlan_dev);</div><div class='add'>+	__mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, vxlan_dev);</div><div class='ctx'> 	mlxsw_sp_fid_put(fid);</div><div class='ctx'> </div><div class='ctx'> 	/* Fifth case: The new VLAN is also egress untagged, which means the</div><div class='hunk'>@@ -3923,7 +3949,7 @@ mlxsw_sp_switchdev_vxlan_vlan_del(struct mlxsw_sp *mlxsw_sp,</div><div class='ctx'> 	if (mlxsw_sp_fid_8021q_vid(fid) != vid)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, vxlan_dev);</div><div class='add'>+	__mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, vxlan_dev);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	mlxsw_sp_fid_put(fid);</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c<br/>index 899c954e0e5f..b5c3f789c685 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c</a></div><div class='hunk'>@@ -173,7 +173,7 @@ static void mlxsw_sp_rx_no_mark_listener(struct sk_buff *skb, u16 local_port,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	netif_receive_skb(skb);</div><div class='add'>+	napi_gro_receive(mlxsw_skb_cb(skb)-&gt;rx_md_info.napi, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mlxsw_sp_rx_mark_listener(struct sk_buff *skb, u16 local_port,</div><div class='hunk'>@@ -959,18 +959,18 @@ static const struct mlxsw_sp_trap_item mlxsw_sp_trap_items_arr[] = {</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.trap = MLXSW_SP_TRAP_CONTROL(ARP_REQUEST, NEIGH_DISCOVERY,</div><div class='del'>-					      MIRROR),</div><div class='add'>+					      TRAP),</div><div class='ctx'> 		.listeners_arr = {</div><div class='del'>-			MLXSW_SP_RXL_MARK(ROUTER_ARPBC, NEIGH_DISCOVERY,</div><div class='del'>-					  TRAP_TO_CPU, false),</div><div class='add'>+			MLXSW_SP_RXL_NO_MARK(ARPBC, NEIGH_DISCOVERY,</div><div class='add'>+					     TRAP_TO_CPU, false),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.trap = MLXSW_SP_TRAP_CONTROL(ARP_RESPONSE, NEIGH_DISCOVERY,</div><div class='del'>-					      MIRROR),</div><div class='add'>+					      TRAP),</div><div class='ctx'> 		.listeners_arr = {</div><div class='del'>-			MLXSW_SP_RXL_MARK(ROUTER_ARPUC, NEIGH_DISCOVERY,</div><div class='del'>-					  TRAP_TO_CPU, false),</div><div class='add'>+			MLXSW_SP_RXL_NO_MARK(ARPUC, NEIGH_DISCOVERY,</div><div class='add'>+					     TRAP_TO_CPU, false),</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/trap.h b/drivers/net/ethernet/mellanox/mlxsw/trap.h<br/>index 83477c8e6971..9962dc157901 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/trap.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/trap.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/trap.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/trap.h</a></div><div class='hunk'>@@ -29,6 +29,8 @@ enum {</div><div class='ctx'> 	MLXSW_TRAP_ID_FDB_MISMATCH = 0x3B,</div><div class='ctx'> 	MLXSW_TRAP_ID_FID_MISS = 0x3D,</div><div class='ctx'> 	MLXSW_TRAP_ID_DECAP_ECN0 = 0x40,</div><div class='add'>+	MLXSW_TRAP_ID_ARPBC = 0x50,</div><div class='add'>+	MLXSW_TRAP_ID_ARPUC = 0x51,</div><div class='ctx'> 	MLXSW_TRAP_ID_MTUERROR = 0x52,</div><div class='ctx'> 	MLXSW_TRAP_ID_TTLERROR = 0x53,</div><div class='ctx'> 	MLXSW_TRAP_ID_LBERROR = 0x54,</div><div class='hunk'>@@ -66,13 +68,10 @@ enum {</div><div class='ctx'> 	MLXSW_TRAP_ID_HOST_MISS_IPV6 = 0x92,</div><div class='ctx'> 	MLXSW_TRAP_ID_IPIP_DECAP_ERROR = 0xB1,</div><div class='ctx'> 	MLXSW_TRAP_ID_NVE_DECAP_ARP = 0xB8,</div><div class='del'>-	MLXSW_TRAP_ID_NVE_ENCAP_ARP = 0xBD,</div><div class='ctx'> 	MLXSW_TRAP_ID_IPV4_BFD = 0xD0,</div><div class='ctx'> 	MLXSW_TRAP_ID_IPV6_BFD = 0xD1,</div><div class='ctx'> 	MLXSW_TRAP_ID_ROUTER_ALERT_IPV4 = 0xD6,</div><div class='ctx'> 	MLXSW_TRAP_ID_ROUTER_ALERT_IPV6 = 0xD7,</div><div class='del'>-	MLXSW_TRAP_ID_ROUTER_ARPBC = 0xE0,</div><div class='del'>-	MLXSW_TRAP_ID_ROUTER_ARPUC = 0xE1,</div><div class='ctx'> 	MLXSW_TRAP_ID_DISCARD_NON_ROUTABLE = 0x11A,</div><div class='ctx'> 	MLXSW_TRAP_ID_DISCARD_ROUTER2 = 0x130,</div><div class='ctx'> 	MLXSW_TRAP_ID_DISCARD_ROUTER3 = 0x131,</div><div class='hunk'>@@ -95,6 +94,7 @@ enum {</div><div class='ctx'> 	MLXSW_TRAP_ID_DISCARD_ING_ROUTER_IPV4_SIP_BC = 0x16A,</div><div class='ctx'> 	MLXSW_TRAP_ID_DISCARD_ING_ROUTER_IPV4_DIP_LOCAL_NET = 0x16B,</div><div class='ctx'> 	MLXSW_TRAP_ID_DISCARD_ING_ROUTER_DIP_LINK_LOCAL = 0x16C,</div><div class='add'>+	MLXSW_TRAP_ID_DISCARD_ING_ROUTER_SIP_LINK_LOCAL = 0x16D,</div><div class='ctx'> 	MLXSW_TRAP_ID_DISCARD_ROUTER_IRIF_EN = 0x178,</div><div class='ctx'> 	MLXSW_TRAP_ID_DISCARD_ROUTER_ERIF_EN = 0x179,</div><div class='ctx'> 	MLXSW_TRAP_ID_DISCARD_ROUTER_LPM4 = 0x17B,</div><div class='head'>diff --git a/drivers/net/ethernet/mellanox/mlxsw/txheader.h b/drivers/net/ethernet/mellanox/mlxsw/txheader.h<br/>index da51dd9d5e44..e78cba5821b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/txheader.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mellanox/mlxsw/txheader.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mellanox/mlxsw/txheader.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mellanox/mlxsw/txheader.h</a></div><div class='hunk'>@@ -4,6 +4,69 @@</div><div class='ctx'> #ifndef _MLXSW_TXHEADER_H</div><div class='ctx'> #define _MLXSW_TXHEADER_H</div><div class='ctx'> </div><div class='add'>+/* tx_hdr_version</div><div class='add'>+ * Tx header version.</div><div class='add'>+ * Must be set to 1.</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);</div><div class='add'>+</div><div class='add'>+/* tx_hdr_ctl</div><div class='add'>+ * Packet control type.</div><div class='add'>+ * 0 - Ethernet control (e.g. EMADs, LACP)</div><div class='add'>+ * 1 - Ethernet data</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);</div><div class='add'>+</div><div class='add'>+/* tx_hdr_proto</div><div class='add'>+ * Packet protocol type. Must be set to 1 (Ethernet).</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);</div><div class='add'>+</div><div class='add'>+/* tx_hdr_rx_is_router</div><div class='add'>+ * Packet is sent from the router. Valid for data packets only.</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);</div><div class='add'>+</div><div class='add'>+/* tx_hdr_fid_valid</div><div class='add'>+ * Indicates if the 'fid' field is valid and should be used for</div><div class='add'>+ * forwarding lookup. Valid for data packets only.</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);</div><div class='add'>+</div><div class='add'>+/* tx_hdr_swid</div><div class='add'>+ * Switch partition ID. Must be set to 0.</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);</div><div class='add'>+</div><div class='add'>+/* tx_hdr_control_tclass</div><div class='add'>+ * Indicates if the packet should use the control TClass and not one</div><div class='add'>+ * of the data TClasses.</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);</div><div class='add'>+</div><div class='add'>+/* tx_hdr_port_mid</div><div class='add'>+ * Destination local port for unicast packets.</div><div class='add'>+ * Destination multicast ID for multicast packets.</div><div class='add'>+ *</div><div class='add'>+ * Control packets are directed to a specific egress port, while data</div><div class='add'>+ * packets are transmitted through the CPU port (0) into the switch partition,</div><div class='add'>+ * where forwarding rules are applied.</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);</div><div class='add'>+</div><div class='add'>+/* tx_hdr_fid</div><div class='add'>+ * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is</div><div class='add'>+ * set, otherwise calculated based on the packet's VID using VID to FID mapping.</div><div class='add'>+ * Valid for data packets only.</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(tx, hdr, fid, 0x08, 16, 16);</div><div class='add'>+</div><div class='add'>+/* tx_hdr_type</div><div class='add'>+ * 0 - Data packets</div><div class='add'>+ * 6 - Control packets</div><div class='add'>+ */</div><div class='add'>+MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);</div><div class='add'>+</div><div class='ctx'> #define MLXSW_TXHDR_LEN 0x10</div><div class='ctx'> #define MLXSW_TXHDR_VERSION_0 0</div><div class='ctx'> #define MLXSW_TXHDR_VERSION_1 1</div><div class='head'>diff --git a/drivers/net/ethernet/meta/Kconfig b/drivers/net/ethernet/meta/Kconfig<br/>index 831921b9d4d5..ca5c7ac2a5bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/Kconfig</a></div><div class='hunk'>@@ -19,14 +19,16 @@ if NET_VENDOR_META</div><div class='ctx'> </div><div class='ctx'> config FBNIC</div><div class='ctx'> 	tristate "Meta Platforms Host Network Interface"</div><div class='del'>-	depends on X86_64 || COMPILE_TEST</div><div class='add'>+	depends on 64BIT || COMPILE_TEST</div><div class='ctx'> 	depends on !S390</div><div class='ctx'> 	depends on MAX_SKB_FRAGS &lt; 22</div><div class='ctx'> 	depends on PCI_MSI</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select NET_DEVLINK</div><div class='ctx'> 	select PAGE_POOL</div><div class='add'>+	select PCS_XPCS</div><div class='ctx'> 	select PHYLINK</div><div class='add'>+	select PLDMFW</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Meta Platforms Host Network Interface.</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/Makefile b/drivers/net/ethernet/meta/fbnic/Makefile<br/>index cadd4dac6620..72c41af65364 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/Makefile</a></div><div class='hunk'>@@ -7,9 +7,12 @@</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_FBNIC) += fbnic.o</div><div class='ctx'> </div><div class='del'>-fbnic-y := fbnic_devlink.o \</div><div class='add'>+fbnic-y := fbnic_csr.o \</div><div class='add'>+	   fbnic_debugfs.o \</div><div class='add'>+	   fbnic_devlink.o \</div><div class='ctx'> 	   fbnic_ethtool.o \</div><div class='ctx'> 	   fbnic_fw.o \</div><div class='add'>+	   fbnic_fw_log.o \</div><div class='ctx'> 	   fbnic_hw_stats.o \</div><div class='ctx'> 	   fbnic_hwmon.o \</div><div class='ctx'> 	   fbnic_irq.o \</div><div class='hunk'>@@ -18,6 +21,8 @@ fbnic-y := fbnic_devlink.o \</div><div class='ctx'> 	   fbnic_pci.o \</div><div class='ctx'> 	   fbnic_phylink.o \</div><div class='ctx'> 	   fbnic_rpc.o \</div><div class='add'>+	   fbnic_mdio.o \</div><div class='add'>+	   fbnic_time.o \</div><div class='ctx'> 	   fbnic_tlv.o \</div><div class='ctx'> 	   fbnic_txrx.o \</div><div class='del'>-	   fbnic_time.o</div><div class='add'>+# End of objects</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic.h b/drivers/net/ethernet/meta/fbnic/fbnic.h<br/>index fec567c8fe4a..779a083b9215 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic.h</a></div><div class='hunk'>@@ -12,27 +12,41 @@</div><div class='ctx'> </div><div class='ctx'> #include "fbnic_csr.h"</div><div class='ctx'> #include "fbnic_fw.h"</div><div class='add'>+#include "fbnic_fw_log.h"</div><div class='ctx'> #include "fbnic_hw_stats.h"</div><div class='ctx'> #include "fbnic_mac.h"</div><div class='ctx'> #include "fbnic_rpc.h"</div><div class='ctx'> </div><div class='add'>+struct fbnic_napi_vector;</div><div class='add'>+</div><div class='add'>+#define FBNIC_MAX_NAPI_VECTORS		128u</div><div class='add'>+#define FBNIC_MBX_CMPL_SLOTS		4</div><div class='add'>+</div><div class='ctx'> struct fbnic_dev {</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='add'>+	struct dentry *dbg_fbd;</div><div class='ctx'> 	struct device *hwmon;</div><div class='add'>+	struct devlink_health_reporter *fw_reporter;</div><div class='add'>+	struct devlink_health_reporter *otp_reporter;</div><div class='ctx'> </div><div class='ctx'> 	u32 __iomem *uc_addr0;</div><div class='ctx'> 	u32 __iomem *uc_addr4;</div><div class='ctx'> 	const struct fbnic_mac *mac;</div><div class='ctx'> 	unsigned int fw_msix_vector;</div><div class='del'>-	unsigned int pcs_msix_vector;</div><div class='add'>+	unsigned int mac_msix_vector;</div><div class='ctx'> 	unsigned short num_irqs;</div><div class='ctx'> </div><div class='add'>+	struct {</div><div class='add'>+		u8 users;</div><div class='add'>+		char name[IFNAMSIZ + 9];</div><div class='add'>+	} napi_irq[FBNIC_MAX_NAPI_VECTORS];</div><div class='add'>+</div><div class='ctx'> 	struct delayed_work service_task;</div><div class='ctx'> </div><div class='ctx'> 	struct fbnic_fw_mbx mbx[FBNIC_IPC_MBX_INDICES];</div><div class='ctx'> 	struct fbnic_fw_cap fw_cap;</div><div class='del'>-	struct fbnic_fw_completion *cmpl_data;</div><div class='add'>+	struct fbnic_fw_completion *cmpl_data[FBNIC_MBX_CMPL_SLOTS];</div><div class='ctx'> 	/* Lock protecting Tx Mailbox queue to prevent possible races */</div><div class='ctx'> 	spinlock_t fw_tx_lock;</div><div class='ctx'> </div><div class='hunk'>@@ -48,6 +62,13 @@ struct fbnic_dev {</div><div class='ctx'> 	struct fbnic_act_tcam act_tcam[FBNIC_RPC_TCAM_ACT_NUM_ENTRIES];</div><div class='ctx'> 	struct fbnic_mac_addr mac_addr[FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES];</div><div class='ctx'> 	u8 mac_addr_boundary;</div><div class='add'>+	u8 tce_tcam_last;</div><div class='add'>+</div><div class='add'>+	/* IP TCAM */</div><div class='add'>+	struct fbnic_ip_addr ip_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];</div><div class='add'>+	struct fbnic_ip_addr ip_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];</div><div class='add'>+	struct fbnic_ip_addr ipo_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];</div><div class='add'>+	struct fbnic_ip_addr ipo_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];</div><div class='ctx'> </div><div class='ctx'> 	/* Number of TCQs/RCQs available on hardware */</div><div class='ctx'> 	u16 max_num_queues;</div><div class='hunk'>@@ -62,8 +83,21 @@ struct fbnic_dev {</div><div class='ctx'> 	/* Last @time_high refresh time in jiffies (to catch stalls) */</div><div class='ctx'> 	unsigned long last_read;</div><div class='ctx'> </div><div class='add'>+	/* PMD specific data */</div><div class='add'>+	unsigned long end_of_pmd_training;</div><div class='add'>+	u8 pmd_state;</div><div class='add'>+</div><div class='ctx'> 	/* Local copy of hardware statistics */</div><div class='ctx'> 	struct fbnic_hw_stats hw_stats;</div><div class='add'>+</div><div class='add'>+	/* Firmware time since boot in milliseconds */</div><div class='add'>+	u64 firmware_time;</div><div class='add'>+	u64 prev_firmware_time;</div><div class='add'>+</div><div class='add'>+	struct fbnic_fw_log fw_log;</div><div class='add'>+</div><div class='add'>+	/* MDIO bus for PHYs */</div><div class='add'>+	struct mii_bus *mdio_bus;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Reserve entry 0 in the MSI-X "others" array until we have filled all</div><div class='hunk'>@@ -134,18 +168,29 @@ extern char fbnic_driver_name[];</div><div class='ctx'> </div><div class='ctx'> void fbnic_devlink_free(struct fbnic_dev *fbd);</div><div class='ctx'> struct fbnic_dev *fbnic_devlink_alloc(struct pci_dev *pdev);</div><div class='add'>+int fbnic_devlink_health_create(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_devlink_health_destroy(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_devlink_register(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_devlink_unregister(struct fbnic_dev *fbd);</div><div class='add'>+void __printf(2, 3)</div><div class='add'>+fbnic_devlink_fw_report(struct fbnic_dev *fbd, const char *format, ...);</div><div class='add'>+void fbnic_devlink_otp_check(struct fbnic_dev *fbd, const char *msg);</div><div class='ctx'> </div><div class='del'>-int fbnic_fw_enable_mbx(struct fbnic_dev *fbd);</div><div class='del'>-void fbnic_fw_disable_mbx(struct fbnic_dev *fbd);</div><div class='add'>+int fbnic_fw_request_mbx(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_fw_free_mbx(struct fbnic_dev *fbd);</div><div class='ctx'> </div><div class='ctx'> void fbnic_hwmon_register(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_hwmon_unregister(struct fbnic_dev *fbd);</div><div class='ctx'> </div><div class='del'>-int fbnic_pcs_irq_enable(struct fbnic_dev *fbd);</div><div class='del'>-void fbnic_pcs_irq_disable(struct fbnic_dev *fbd);</div><div class='add'>+int fbnic_mac_request_irq(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_mac_free_irq(struct fbnic_dev *fbd);</div><div class='ctx'> </div><div class='add'>+void fbnic_napi_name_irqs(struct fbnic_dev *fbd);</div><div class='add'>+int fbnic_napi_request_irq(struct fbnic_dev *fbd,</div><div class='add'>+			   struct fbnic_napi_vector *nv);</div><div class='add'>+void fbnic_napi_free_irq(struct fbnic_dev *fbd,</div><div class='add'>+			 struct fbnic_napi_vector *nv);</div><div class='add'>+void fbnic_synchronize_irq(struct fbnic_dev *fbd, int nr);</div><div class='ctx'> int fbnic_request_irq(struct fbnic_dev *dev, int nr, irq_handler_t handler,</div><div class='ctx'> 		      unsigned long flags, const char *name, void *data);</div><div class='ctx'> void fbnic_free_irq(struct fbnic_dev *dev, int nr, void *data);</div><div class='hunk'>@@ -155,6 +200,21 @@ int fbnic_alloc_irqs(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version,</div><div class='ctx'> 				 const size_t str_sz);</div><div class='ctx'> </div><div class='add'>+void fbnic_dbg_fbd_init(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_dbg_fbd_exit(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_dbg_init(void);</div><div class='add'>+void fbnic_dbg_exit(void);</div><div class='add'>+</div><div class='add'>+void fbnic_rpc_reset_valid_entries(struct fbnic_dev *fbd);</div><div class='add'>+</div><div class='add'>+int fbnic_mdiobus_create(struct fbnic_dev *fbd);</div><div class='add'>+</div><div class='add'>+void fbnic_csr_get_regs(struct fbnic_dev *fbd, u32 *data, u32 *regs_version);</div><div class='add'>+int fbnic_csr_regs_len(struct fbnic_dev *fbd);</div><div class='add'>+</div><div class='add'>+void fbnic_config_txrx_usecs(struct fbnic_napi_vector *nv, u32 arm);</div><div class='add'>+void fbnic_config_rx_frames(struct fbnic_napi_vector *nv);</div><div class='add'>+</div><div class='ctx'> enum fbnic_boards {</div><div class='ctx'> 	fbnic_board_asic</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_csr.c b/drivers/net/ethernet/meta/fbnic/fbnic_csr.c<br/>new file mode 100644<br/>index 000000000000..d9c0dc1c2af9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_csr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_csr.c</a></div><div class='hunk'>@@ -0,0 +1,149 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) Meta Platforms, Inc. and affiliates. */</div><div class='add'>+</div><div class='add'>+#include "fbnic.h"</div><div class='add'>+</div><div class='add'>+#define FBNIC_BOUNDS(section) { \</div><div class='add'>+	.start = FBNIC_CSR_START_##section, \</div><div class='add'>+	.end = FBNIC_CSR_END_##section + 1, \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct fbnic_csr_bounds {</div><div class='add'>+	u32	start;</div><div class='add'>+	u32	end;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct fbnic_csr_bounds fbnic_csr_sects[] = {</div><div class='add'>+	FBNIC_BOUNDS(INTR),</div><div class='add'>+	FBNIC_BOUNDS(INTR_CQ),</div><div class='add'>+	FBNIC_BOUNDS(QM_TX),</div><div class='add'>+	FBNIC_BOUNDS(QM_RX),</div><div class='add'>+	FBNIC_BOUNDS(TCE),</div><div class='add'>+	FBNIC_BOUNDS(TCE_RAM),</div><div class='add'>+	FBNIC_BOUNDS(TMI),</div><div class='add'>+	FBNIC_BOUNDS(PTP),</div><div class='add'>+	FBNIC_BOUNDS(RXB),</div><div class='add'>+	FBNIC_BOUNDS(RPC),</div><div class='add'>+	FBNIC_BOUNDS(FAB),</div><div class='add'>+	FBNIC_BOUNDS(MASTER),</div><div class='add'>+	FBNIC_BOUNDS(PCS),</div><div class='add'>+	FBNIC_BOUNDS(RSFEC),</div><div class='add'>+	FBNIC_BOUNDS(MAC_MAC),</div><div class='add'>+	FBNIC_BOUNDS(SIG),</div><div class='add'>+	FBNIC_BOUNDS(PCIE_SS_COMPHY),</div><div class='add'>+	FBNIC_BOUNDS(PUL_USER),</div><div class='add'>+	FBNIC_BOUNDS(QUEUE),</div><div class='add'>+	FBNIC_BOUNDS(RPC_RAM),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FBNIC_RPC_TCAM_ACT_DW_PER_ENTRY			14</div><div class='add'>+#define FBNIC_RPC_TCAM_ACT_NUM_ENTRIES			64</div><div class='add'>+</div><div class='add'>+#define FBNIC_RPC_TCAM_MACDA_DW_PER_ENTRY		4</div><div class='add'>+#define FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES		32</div><div class='add'>+</div><div class='add'>+#define FBNIC_RPC_TCAM_OUTER_IPSRC_DW_PER_ENTRY		9</div><div class='add'>+#define FBNIC_RPC_TCAM_OUTER_IPSRC_NUM_ENTRIES		8</div><div class='add'>+</div><div class='add'>+#define FBNIC_RPC_TCAM_OUTER_IPDST_DW_PER_ENTRY		9</div><div class='add'>+#define FBNIC_RPC_TCAM_OUTER_IPDST_NUM_ENTRIES		8</div><div class='add'>+</div><div class='add'>+#define FBNIC_RPC_TCAM_IPSRC_DW_PER_ENTRY		9</div><div class='add'>+#define FBNIC_RPC_TCAM_IPSRC_NUM_ENTRIES		8</div><div class='add'>+</div><div class='add'>+#define FBNIC_RPC_TCAM_IPDST_DW_PER_ENTRY		9</div><div class='add'>+#define FBNIC_RPC_TCAM_IPDST_NUM_ENTRIES		8</div><div class='add'>+</div><div class='add'>+#define FBNIC_RPC_RSS_TBL_DW_PER_ENTRY			2</div><div class='add'>+#define FBNIC_RPC_RSS_TBL_NUM_ENTRIES			256</div><div class='add'>+</div><div class='add'>+static void fbnic_csr_get_regs_rpc_ram(struct fbnic_dev *fbd, u32 **data_p)</div><div class='add'>+{</div><div class='add'>+	u32 start = FBNIC_CSR_START_RPC_RAM;</div><div class='add'>+	u32 end = FBNIC_CSR_END_RPC_RAM;</div><div class='add'>+	u32 *data = *data_p;</div><div class='add'>+	u32 i, j;</div><div class='add'>+</div><div class='add'>+	*(data++) = start;</div><div class='add'>+	*(data++) = end;</div><div class='add'>+</div><div class='add'>+	/* FBNIC_RPC_TCAM_ACT */</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_ACT_NUM_ENTRIES; i++) {</div><div class='add'>+		for (j = 0; j &lt; FBNIC_RPC_TCAM_ACT_DW_PER_ENTRY; j++)</div><div class='add'>+			*(data++) = rd32(fbd, FBNIC_RPC_TCAM_ACT(i, j));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FBNIC_RPC_TCAM_MACDA */</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES; i++) {</div><div class='add'>+		for (j = 0; j &lt; FBNIC_RPC_TCAM_MACDA_DW_PER_ENTRY; j++)</div><div class='add'>+			*(data++) = rd32(fbd, FBNIC_RPC_TCAM_MACDA(i, j));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FBNIC_RPC_TCAM_OUTER_IPSRC */</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_OUTER_IPSRC_NUM_ENTRIES; i++) {</div><div class='add'>+		for (j = 0; j &lt; FBNIC_RPC_TCAM_OUTER_IPSRC_DW_PER_ENTRY; j++)</div><div class='add'>+			*(data++) = rd32(fbd, FBNIC_RPC_TCAM_OUTER_IPSRC(i, j));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FBNIC_RPC_TCAM_OUTER_IPDST */</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_OUTER_IPDST_NUM_ENTRIES; i++) {</div><div class='add'>+		for (j = 0; j &lt; FBNIC_RPC_TCAM_OUTER_IPDST_DW_PER_ENTRY; j++)</div><div class='add'>+			*(data++) = rd32(fbd, FBNIC_RPC_TCAM_OUTER_IPDST(i, j));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FBNIC_RPC_TCAM_IPSRC */</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_IPSRC_NUM_ENTRIES; i++) {</div><div class='add'>+		for (j = 0; j &lt; FBNIC_RPC_TCAM_IPSRC_DW_PER_ENTRY; j++)</div><div class='add'>+			*(data++) = rd32(fbd, FBNIC_RPC_TCAM_IPSRC(i, j));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FBNIC_RPC_TCAM_IPDST */</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_IPDST_NUM_ENTRIES; i++) {</div><div class='add'>+		for (j = 0; j &lt; FBNIC_RPC_TCAM_IPDST_DW_PER_ENTRY; j++)</div><div class='add'>+			*(data++) = rd32(fbd, FBNIC_RPC_TCAM_IPDST(i, j));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FBNIC_RPC_RSS_TBL */</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_RSS_TBL_NUM_ENTRIES; i++) {</div><div class='add'>+		for (j = 0; j &lt; FBNIC_RPC_RSS_TBL_DW_PER_ENTRY; j++)</div><div class='add'>+			*(data++) = rd32(fbd, FBNIC_RPC_RSS_TBL(i, j));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*data_p = data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_csr_get_regs(struct fbnic_dev *fbd, u32 *data, u32 *regs_version)</div><div class='add'>+{</div><div class='add'>+	const struct fbnic_csr_bounds *bound;</div><div class='add'>+	u32 *start = data;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	*regs_version = 1u;</div><div class='add'>+</div><div class='add'>+	/* Skip RPC_RAM section which cannot be dumped linearly */</div><div class='add'>+	for (i = 0, bound = fbnic_csr_sects;</div><div class='add'>+	     i &lt; ARRAY_SIZE(fbnic_csr_sects) - 1; i++, ++bound) {</div><div class='add'>+		*(data++) = bound-&gt;start;</div><div class='add'>+		*(data++) = bound-&gt;end - 1;</div><div class='add'>+		for (j = bound-&gt;start; j &lt; bound-&gt;end; j++)</div><div class='add'>+			*(data++) = rd32(fbd, j);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Dump the RPC_RAM as special case registers */</div><div class='add'>+	fbnic_csr_get_regs_rpc_ram(fbd, &amp;data);</div><div class='add'>+</div><div class='add'>+	WARN_ON(data - start != fbnic_csr_regs_len(fbd));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fbnic_csr_regs_len(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	int i, len = 0;</div><div class='add'>+</div><div class='add'>+	/* Dump includes start and end information of each section</div><div class='add'>+	 * which results in an offset of 2</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(fbnic_csr_sects); i++)</div><div class='add'>+		len += fbnic_csr_sects[i].end - fbnic_csr_sects[i].start + 2;</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_csr.h b/drivers/net/ethernet/meta/fbnic/fbnic_csr.h<br/>index 79cdd231d327..422265dc7abd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_csr.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_csr.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_csr.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_csr.h</a></div><div class='hunk'>@@ -12,13 +12,28 @@</div><div class='ctx'> #define DESC_BIT(nr)		BIT_ULL(nr)</div><div class='ctx'> #define DESC_GENMASK(h, l)	GENMASK_ULL(h, l)</div><div class='ctx'> </div><div class='add'>+#define FW_VER_CODE(_major, _minor, _patch, _build) (		      \</div><div class='add'>+		FIELD_PREP(FBNIC_FW_CAP_RESP_VERSION_MAJOR, _major) | \</div><div class='add'>+		FIELD_PREP(FBNIC_FW_CAP_RESP_VERSION_MINOR, _minor) | \</div><div class='add'>+		FIELD_PREP(FBNIC_FW_CAP_RESP_VERSION_PATCH, _patch) | \</div><div class='add'>+		FIELD_PREP(FBNIC_FW_CAP_RESP_VERSION_BUILD, _build))</div><div class='add'>+</div><div class='ctx'> /* Defines the minimum firmware version required by the driver */</div><div class='del'>-#define MIN_FW_MAJOR_VERSION    0</div><div class='del'>-#define MIN_FW_MINOR_VERSION    10</div><div class='del'>-#define MIN_FW_BUILD_VERSION    6</div><div class='del'>-#define MIN_FW_VERSION_CODE     (MIN_FW_MAJOR_VERSION * (1u &lt;&lt; 24) + \</div><div class='del'>-				 MIN_FW_MINOR_VERSION * (1u &lt;&lt; 16) + \</div><div class='del'>-				 MIN_FW_BUILD_VERSION)</div><div class='add'>+#define MIN_FW_VER_CODE				FW_VER_CODE(0, 10, 6, 0)</div><div class='add'>+</div><div class='add'>+/* Defines the minimum firmware version required for firmware logs */</div><div class='add'>+#define MIN_FW_VER_CODE_LOG			FW_VER_CODE(0, 12, 9, 0)</div><div class='add'>+</div><div class='add'>+/* Driver can request that firmware sends all cached logs in bulk. This</div><div class='add'>+ * feature was enabled on older firmware however firmware has a bug</div><div class='add'>+ * which attempted to send 30 messages per mbx message which caused an</div><div class='add'>+ * overflow flooding the mailbox. This results in a kernel warning</div><div class='add'>+ * related to corrupt mailbox messages.</div><div class='add'>+ *</div><div class='add'>+ * If firmware is new enough only request sending historical logs when</div><div class='add'>+ * the log buffer is empty to prevent duplicate logs.</div><div class='add'>+ */</div><div class='add'>+#define MIN_FW_VER_CODE_HIST			FW_VER_CODE(25, 5, 7, 0)</div><div class='ctx'> </div><div class='ctx'> #define PCI_DEVICE_ID_META_FBNIC_ASIC		0x0013</div><div class='ctx'> </div><div class='hunk'>@@ -397,6 +412,23 @@ enum {</div><div class='ctx'> #define FBNIC_TCE_DROP_CTRL_TTI_FRM_DROP_EN	CSR_BIT(1)</div><div class='ctx'> #define FBNIC_TCE_DROP_CTRL_TTI_TBI_DROP_EN	CSR_BIT(2)</div><div class='ctx'> </div><div class='add'>+#define FBNIC_TCE_TTI_CM_DROP_PKTS	0x0403e		/* 0x100f8 */</div><div class='add'>+#define FBNIC_TCE_TTI_CM_DROP_BYTE_L	0x0403f		/* 0x100fc */</div><div class='add'>+#define FBNIC_TCE_TTI_CM_DROP_BYTE_H	0x04040		/* 0x10100 */</div><div class='add'>+#define FBNIC_TCE_TTI_FRAME_DROP_PKTS	0x04041		/* 0x10104 */</div><div class='add'>+#define FBNIC_TCE_TTI_FRAME_DROP_BYTE_L	0x04042		/* 0x10108 */</div><div class='add'>+#define FBNIC_TCE_TTI_FRAME_DROP_BYTE_H	0x04043		/* 0x1010c */</div><div class='add'>+#define FBNIC_TCE_TBI_DROP_PKTS		0x04044		/* 0x10110 */</div><div class='add'>+#define FBNIC_TCE_TBI_DROP_BYTE_L	0x04045		/* 0x10114 */</div><div class='add'>+</div><div class='add'>+#define FBNIC_TCE_TCAM_IDX2DEST_MAP	0x0404A		/* 0x10128 */</div><div class='add'>+#define FBNIC_TCE_TCAM_IDX2DEST_MAP_DEST_ID_0	CSR_GENMASK(3, 0)</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_TCE_TCAM_DEST_MAC		= 1,</div><div class='add'>+	FBNIC_TCE_TCAM_DEST_BMC		= 2,</div><div class='add'>+	FBNIC_TCE_TCAM_DEST_FW		= 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define FBNIC_TCE_TXB_TX_BMC_Q_CTRL	0x0404B		/* 0x1012c */</div><div class='ctx'> #define FBNIC_TCE_TXB_BMC_DWRR_CTRL	0x0404C		/* 0x10130 */</div><div class='ctx'> #define FBNIC_TCE_TXB_BMC_DWRR_CTRL_QUANTUM0	CSR_GENMASK(7, 0)</div><div class='hunk'>@@ -407,11 +439,48 @@ enum {</div><div class='ctx'> #define FBNIC_TCE_TXB_BMC_DWRR_CTRL_EXT	0x0404F		/* 0x1013c */</div><div class='ctx'> #define FBNIC_CSR_END_TCE		0x04050	/* CSR section delimiter */</div><div class='ctx'> </div><div class='add'>+/* TCE RAM registers */</div><div class='add'>+#define FBNIC_CSR_START_TCE_RAM		0x04200	/* CSR section delimiter */</div><div class='add'>+#define FBNIC_TCE_RAM_TCAM(m, n) \</div><div class='add'>+	(0x04200 + 0x8 * (n) + (m))		/* 0x10800 + 32*n + 4*m */</div><div class='add'>+#define FBNIC_TCE_RAM_TCAM_MASK			CSR_GENMASK(15, 0)</div><div class='add'>+#define FBNIC_TCE_RAM_TCAM_VALUE		CSR_GENMASK(31, 16)</div><div class='add'>+#define FBNIC_TCE_RAM_TCAM3(n)		(0x04218 + (n))	/* 0x010860 + 4*n */</div><div class='add'>+#define FBNIC_TCE_RAM_TCAM3_DEST_MASK		CSR_GENMASK(5, 3)</div><div class='add'>+#define FBNIC_TCE_RAM_TCAM3_MCQ_MASK		CSR_BIT(7)</div><div class='add'>+#define FBNIC_TCE_RAM_TCAM3_VALIDATE		CSR_BIT(31)</div><div class='add'>+#define FBNIC_CSR_END_TCE_RAM		0x0421F	/* CSR section delimiter */</div><div class='add'>+</div><div class='ctx'> /* TMI registers */</div><div class='ctx'> #define FBNIC_CSR_START_TMI		0x04400	/* CSR section delimiter */</div><div class='ctx'> #define FBNIC_TMI_SOP_PROT_CTRL		0x04400		/* 0x11000 */</div><div class='ctx'> #define FBNIC_TMI_DROP_CTRL		0x04401		/* 0x11004 */</div><div class='ctx'> #define FBNIC_TMI_DROP_CTRL_EN			CSR_BIT(0)</div><div class='add'>+#define FBNIC_TMI_DROP_PKTS		0x04402		/* 0x11008 */</div><div class='add'>+#define FBNIC_TMI_DROP_BYTE_L		0x04403		/* 0x1100c */</div><div class='add'>+#define FBNIC_TMI_ILLEGAL_PTP_REQS	0x04409		/* 0x11024 */</div><div class='add'>+#define FBNIC_TMI_GOOD_PTP_TS		0x0440a		/* 0x11028 */</div><div class='add'>+#define FBNIC_TMI_BAD_PTP_TS		0x0440b		/* 0x1102c */</div><div class='add'>+#define FBNIC_TMI_STAT_TX_PACKET_1519_2047_BYTES_L \</div><div class='add'>+					0x04433		/* 0x110cc */</div><div class='add'>+#define FBNIC_TMI_STAT_TX_PACKET_1519_2047_BYTES_H \</div><div class='add'>+					0x04434		/* 0x110d0 */</div><div class='add'>+#define FBNIC_TMI_STAT_TX_PACKET_2048_4095_BYTES_L \</div><div class='add'>+					0x04435		/* 0x110d4 */</div><div class='add'>+#define FBNIC_TMI_STAT_TX_PACKET_2048_4095_BYTES_H \</div><div class='add'>+					0x04436		/* 0x110d8 */</div><div class='add'>+#define FBNIC_TMI_STAT_TX_PACKET_4096_8191_BYTES_L \</div><div class='add'>+					0x04437		/* 0x110dc */</div><div class='add'>+#define FBNIC_TMI_STAT_TX_PACKET_4096_8191_BYTES_H \</div><div class='add'>+					0x04438		/* 0x110e0 */</div><div class='add'>+#define FBNIC_TMI_STAT_TX_PACKET_8192_9216_BYTES_L \</div><div class='add'>+					0x04439		/* 0x110e4 */</div><div class='add'>+#define FBNIC_TMI_STAT_TX_PACKET_8192_9216_BYTES_H \</div><div class='add'>+					0x0443a		/* 0x110e8 */</div><div class='add'>+#define FBNIC_TMI_STAT_TX_PACKET_9217_MAX_BYTES_L \</div><div class='add'>+					0x0443b		/* 0x110ec */</div><div class='add'>+#define FBNIC_TMI_STAT_TX_PACKET_9217_MAX_BYTES_H \</div><div class='add'>+					0x0443c		/* 0x110f0 */</div><div class='ctx'> #define FBNIC_CSR_END_TMI		0x0443f	/* CSR section delimiter */</div><div class='ctx'> </div><div class='ctx'> /* Precision Time Protocol Registers */</div><div class='hunk'>@@ -439,7 +508,7 @@ enum {</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_PTP_ADD_VAL_NS		0x04806		/* 0x12018 */</div><div class='ctx'> #define FBNIC_PTP_ADD_VAL_NS_MASK		CSR_GENMASK(15, 0)</div><div class='del'>-#define FBNIC_PTP_ADD_VAL_SUBNS		0x04807	/* 0x1201c */</div><div class='add'>+#define FBNIC_PTP_ADD_VAL_SUBNS		0x04807		/* 0x1201c */</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_PTP_CTR_VAL_HI		0x04808		/* 0x12020 */</div><div class='ctx'> #define FBNIC_PTP_CTR_VAL_LO		0x04809		/* 0x12024 */</div><div class='hunk'>@@ -465,6 +534,14 @@ enum {</div><div class='ctx'> 	FBNIC_RXB_FIFO_INDICES		= 8</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum {</div><div class='add'>+	FBNIC_RXB_INTF_NET = 0,</div><div class='add'>+	FBNIC_RXB_INTF_RBT = 1,</div><div class='add'>+	/* Unused */</div><div class='add'>+	/* Unused */</div><div class='add'>+	FBNIC_RXB_INTF_INDICES	= 4</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define FBNIC_RXB_CT_SIZE(n)		(0x08000 + (n))	/* 0x20000 + 4*n */</div><div class='ctx'> #define FBNIC_RXB_CT_SIZE_CNT			8</div><div class='ctx'> #define FBNIC_RXB_CT_SIZE_HEADER		CSR_GENMASK(5, 0)</div><div class='hunk'>@@ -585,8 +662,11 @@ enum {</div><div class='ctx'> 	FBNIC_RPC_ACT_TBL0_DEST_EI	= 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define FBNIC_RPC_ACT_TBL0_Q_SEL		CSR_BIT(4)</div><div class='add'>+#define FBNIC_RPC_ACT_TBL0_Q_ID			CSR_GENMASK(15, 8)</div><div class='ctx'> #define FBNIC_RPC_ACT_TBL0_DMA_HINT		CSR_GENMASK(24, 16)</div><div class='ctx'> #define FBNIC_RPC_ACT_TBL0_TS_ENA		CSR_BIT(28)</div><div class='add'>+#define FBNIC_RPC_ACT_TBL0_ACT_TBL_IDX		CSR_BIT(29)</div><div class='ctx'> #define FBNIC_RPC_ACT_TBL0_RSS_CTXT_ID		CSR_BIT(30)</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_RPC_ACT_TBL1_DEFAULT	0x0840b		/* 0x2102c */</div><div class='hunk'>@@ -618,7 +698,37 @@ enum {</div><div class='ctx'> 		    FBNIC_RPC_RSS_KEY_DWORD_LEN * 32 - \</div><div class='ctx'> 		    FBNIC_RPC_RSS_KEY_BIT_LEN)</div><div class='ctx'> </div><div class='add'>+#define FBNIC_RPC_CNTR_TCP_OPT_ERR	0x0849e		/* 0x21278 */</div><div class='add'>+#define FBNIC_RPC_CNTR_UNKN_ETYPE	0x0849f		/* 0x2127c */</div><div class='add'>+#define FBNIC_RPC_CNTR_IPV4_FRAG	0x084a0		/* 0x21280 */</div><div class='add'>+#define FBNIC_RPC_CNTR_IPV6_FRAG	0x084a1		/* 0x21284 */</div><div class='add'>+#define FBNIC_RPC_CNTR_IPV4_ESP		0x084a2		/* 0x21288 */</div><div class='add'>+#define FBNIC_RPC_CNTR_IPV6_ESP		0x084a3		/* 0x2128c */</div><div class='add'>+#define FBNIC_RPC_CNTR_UNKN_EXT_HDR	0x084a4		/* 0x21290 */</div><div class='add'>+#define FBNIC_RPC_CNTR_OUT_OF_HDR_ERR	0x084a5		/* 0x21294 */</div><div class='add'>+#define FBNIC_RPC_CNTR_OVR_SIZE_ERR	0x084a6		/* 0x21298 */</div><div class='add'>+</div><div class='ctx'> #define FBNIC_RPC_TCAM_MACDA_VALIDATE	0x0852d		/* 0x214b4 */</div><div class='add'>+#define FBNIC_RPC_STAT_RX_PACKET_1519_2047_BYTES_L \</div><div class='add'>+					0x0855f		/* 0x2157c */</div><div class='add'>+#define FBNIC_RPC_STAT_RX_PACKET_1519_2047_BYTES_H \</div><div class='add'>+					0x08560		/* 0x21580 */</div><div class='add'>+#define FBNIC_RPC_STAT_RX_PACKET_2048_4095_BYTES_L \</div><div class='add'>+					0x08561		/* 0x21584 */</div><div class='add'>+#define FBNIC_RPC_STAT_RX_PACKET_2048_4095_BYTES_H \</div><div class='add'>+					0x08562		/* 0x21588 */</div><div class='add'>+#define FBNIC_RPC_STAT_RX_PACKET_4096_8191_BYTES_L \</div><div class='add'>+					0x08563		/* 0x2158c */</div><div class='add'>+#define FBNIC_RPC_STAT_RX_PACKET_4096_8191_BYTES_H \</div><div class='add'>+					0x08564		/* 0x21590 */</div><div class='add'>+#define FBNIC_RPC_STAT_RX_PACKET_8192_9216_BYTES_L \</div><div class='add'>+					0x08565		/* 0x21594 */</div><div class='add'>+#define FBNIC_RPC_STAT_RX_PACKET_8192_9216_BYTES_H \</div><div class='add'>+					0x08566		/* 0x21598 */</div><div class='add'>+#define FBNIC_RPC_STAT_RX_PACKET_9217_MAX_BYTES_L \</div><div class='add'>+					0x08567		/* 0x2159c */</div><div class='add'>+#define FBNIC_RPC_STAT_RX_PACKET_9217_MAX_BYTES_H \</div><div class='add'>+					0x08568		/* 0x215a0 */</div><div class='ctx'> #define FBNIC_CSR_END_RPC		0x0856b	/* CSR section delimiter */</div><div class='ctx'> </div><div class='ctx'> /* RPC RAM Registers */</div><div class='hunk'>@@ -645,6 +755,18 @@ enum {</div><div class='ctx'> #define FBNIC_RPC_TCAM_MACDA_VALUE		CSR_GENMASK(15, 0)</div><div class='ctx'> #define FBNIC_RPC_TCAM_MACDA_MASK		CSR_GENMASK(31, 16)</div><div class='ctx'> </div><div class='add'>+#define FBNIC_RPC_TCAM_OUTER_IPSRC(m, n)\</div><div class='add'>+	(0x08c00 + 0x08 * (n) + (m))		/* 0x023000 + 32*n + 4*m */</div><div class='add'>+#define FBNIC_RPC_TCAM_IP_ADDR_VALUE		CSR_GENMASK(15, 0)</div><div class='add'>+#define FBNIC_RPC_TCAM_IP_ADDR_MASK		CSR_GENMASK(31, 16)</div><div class='add'>+</div><div class='add'>+#define FBNIC_RPC_TCAM_OUTER_IPDST(m, n)\</div><div class='add'>+	(0x08c48 + 0x08 * (n) + (m))		/* 0x023120 + 32*n + 4*m */</div><div class='add'>+#define FBNIC_RPC_TCAM_IPSRC(m, n)\</div><div class='add'>+	(0x08c90 + 0x08 * (n) + (m))		/* 0x023240 + 32*n + 4*m */</div><div class='add'>+#define FBNIC_RPC_TCAM_IPDST(m, n)\</div><div class='add'>+	(0x08cd8 + 0x08 * (n) + (m))		/* 0x023360 + 32*n + 4*m */</div><div class='add'>+</div><div class='ctx'> #define FBNIC_RPC_RSS_TBL(n, m) \</div><div class='ctx'> 	(0x08d20 + 0x100 * (n) + (m))		/* 0x023480 + 1024*n + 4*m */</div><div class='ctx'> #define FBNIC_RPC_RSS_TBL_COUNT			2</div><div class='hunk'>@@ -663,6 +785,30 @@ enum {</div><div class='ctx'> #define FBNIC_MASTER_SPARE_0		0x0C41B		/* 0x3106c */</div><div class='ctx'> #define FBNIC_CSR_END_MASTER		0x0C452	/* CSR section delimiter */</div><div class='ctx'> </div><div class='add'>+/* MAC PCS registers */</div><div class='add'>+#define FBNIC_CSR_START_PCS		0x10000 /* CSR section delimiter */</div><div class='add'>+#define FBNIC_PCS_PAGE(n)	(0x10000 + 0x400 * (n))	/* 0x40000 + 1024*n */</div><div class='add'>+#define FBNIC_PCS(reg, n)	((reg) + FBNIC_PCS_PAGE(n))</div><div class='add'>+#define FBNIC_CSR_END_PCS		0x10668 /* CSR section delimiter */</div><div class='add'>+</div><div class='add'>+#define FBNIC_CSR_START_RSFEC		0x10800 /* CSR section delimiter */</div><div class='add'>+</div><div class='add'>+/* We have 4 RSFEC engines present in our part, however we are only using 1.</div><div class='add'>+ * As such only CCW(0) and NCCW(0) will never be non-zero and the other</div><div class='add'>+ * registers can be ignored.</div><div class='add'>+ */</div><div class='add'>+#define FBNIC_RSFEC_CCW_LO(n)	(0x10802 + 8 * (n))	/* 0x42008 + 32*n */</div><div class='add'>+#define FBNIC_RSFEC_CCW_HI(n)	(0x10803 + 8 * (n))	/* 0x4200c + 32*n */</div><div class='add'>+#define FBNIC_RSFEC_NCCW_LO(n)	(0x10804 + 8 * (n))	/* 0x42010 + 32*n */</div><div class='add'>+#define FBNIC_RSFEC_NCCW_HI(n)	(0x10805 + 8 * (n))	/* 0x42014 + 32*n */</div><div class='add'>+</div><div class='add'>+#define FBNIC_PCS_MAX_LANES			4</div><div class='add'>+#define FBNIC_PCS_SYMBLERR_LO(n) \</div><div class='add'>+				(0x10880 + 2 * (n))	/* 0x42200 + 8*n */</div><div class='add'>+#define FBNIC_PCS_SYMBLERR_HI(n) \</div><div class='add'>+				(0x10881 + 2 * (n))	/* 0x42204 + 8*n */</div><div class='add'>+#define FBNIC_CSR_END_RSFEC		0x108c8 /* CSR section delimiter */</div><div class='add'>+</div><div class='ctx'> /* MAC MAC registers (ASIC only) */</div><div class='ctx'> #define FBNIC_CSR_START_MAC_MAC		0x11000 /* CSR section delimiter */</div><div class='ctx'> #define FBNIC_MAC_COMMAND_CONFIG	0x11002		/* 0x44008 */</div><div class='hunk'>@@ -700,18 +846,18 @@ enum {</div><div class='ctx'> #define FBNIC_CSR_END_SIG		0x1184e /* CSR section delimiter */</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_CSR_START_MAC_STAT	0x11a00</div><div class='add'>+#define FBNIC_MAC_STAT_RX_XOFF_STB_L	0x11a00		/* 0x46800 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_XOFF_STB_H	0x11a01		/* 0x46804 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_XOFF_STB_L	0x11a04		/* 0x46810 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_XOFF_STB_H	0x11a05		/* 0x46814 */</div><div class='ctx'> #define FBNIC_MAC_STAT_RX_BYTE_COUNT_L	0x11a08		/* 0x46820 */</div><div class='ctx'> #define FBNIC_MAC_STAT_RX_BYTE_COUNT_H	0x11a09		/* 0x46824 */</div><div class='del'>-#define FBNIC_MAC_STAT_RX_ALIGN_ERROR_L \</div><div class='del'>-					0x11a0a		/* 0x46828 */</div><div class='del'>-#define FBNIC_MAC_STAT_RX_ALIGN_ERROR_H \</div><div class='del'>-					0x11a0b		/* 0x4682c */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_ALIGN_ERROR_L	0x11a0a		/* 0x46828 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_ALIGN_ERROR_H	0x11a0b		/* 0x4682c */</div><div class='ctx'> #define FBNIC_MAC_STAT_RX_TOOLONG_L	0x11a0e		/* 0x46838 */</div><div class='ctx'> #define FBNIC_MAC_STAT_RX_TOOLONG_H	0x11a0f		/* 0x4683c */</div><div class='del'>-#define FBNIC_MAC_STAT_RX_RECEIVED_OK_L	\</div><div class='del'>-					0x11a12		/* 0x46848 */</div><div class='del'>-#define FBNIC_MAC_STAT_RX_RECEIVED_OK_H	\</div><div class='del'>-					0x11a13		/* 0x4684c */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_RECEIVED_OK_L	0x11a12		/* 0x46848 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_RECEIVED_OK_H	0x11a13		/* 0x4684c */</div><div class='ctx'> #define FBNIC_MAC_STAT_RX_PACKET_BAD_FCS_L \</div><div class='ctx'> 					0x11a14		/* 0x46850 */</div><div class='ctx'> #define FBNIC_MAC_STAT_RX_PACKET_BAD_FCS_H \</div><div class='hunk'>@@ -722,27 +868,138 @@ enum {</div><div class='ctx'> #define FBNIC_MAC_STAT_RX_MULTICAST_H	0x11a1d		/* 0x46874 */</div><div class='ctx'> #define FBNIC_MAC_STAT_RX_BROADCAST_L	0x11a1e		/* 0x46878 */</div><div class='ctx'> #define FBNIC_MAC_STAT_RX_BROADCAST_H	0x11a1f		/* 0x4687c */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_UNDERSIZE_L	0x11a24		/* 0x46890 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_UNDERSIZE_H	0x11a25		/* 0x46894 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_64_BYTES_L \</div><div class='add'>+					0x11a26		/* 0x46898 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_64_BYTES_H \</div><div class='add'>+					0x11a27		/* 0x4689c */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_65_127_BYTES_L \</div><div class='add'>+					0x11a28		/* 0x468a0 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_65_127_BYTES_H \</div><div class='add'>+					0x11a29		/* 0x468a4 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_128_255_BYTES_L \</div><div class='add'>+					0x11a2a		/* 0x468a8 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_128_255_BYTES_H \</div><div class='add'>+					0x11a2b		/* 0x468ac */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_256_511_BYTES_L \</div><div class='add'>+					0x11a2c		/* 0x468b0 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_256_511_BYTES_H \</div><div class='add'>+					0x11a2d		/* 0x468b4 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_512_1023_BYTES_L \</div><div class='add'>+					0x11a2e		/* 0x468b8 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_512_1023_BYTES_H \</div><div class='add'>+					0x11a2f		/* 0x468bc */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_1024_1518_BYTES_L \</div><div class='add'>+					0x11a30		/* 0x468c0 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_1024_1518_BYTES_H \</div><div class='add'>+					0x11a31		/* 0x468c4 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_1519_MAX_BYTES_L \</div><div class='add'>+					0x11a32		/* 0x468c8 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_PACKET_1519_MAX_BYTES_H \</div><div class='add'>+					0x11a33		/* 0x468cc */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_OVERSIZE_L	0x11a34		/* 0x468d0 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_OVERSSIZE_H	0x11a35		/* 0x468d4 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_JABBER_L	0x11a36		/* 0x468d8 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_JABBER_H	0x11a37		/* 0x468dc */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_FRAGMENT_L	0x11a38		/* 0x468e0 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_FRAGMENT_H	0x11a39		/* 0x468e4 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_CONTROL_FRAMES_L \</div><div class='add'>+					0x11a3c		/* 0x468f0 */</div><div class='add'>+#define FBNIC_MAC_STAT_RX_CONTROL_FRAMES_H \</div><div class='add'>+					0x11a3d		/* 0x468f4 */</div><div class='ctx'> #define FBNIC_MAC_STAT_TX_BYTE_COUNT_L	0x11a3e		/* 0x468f8 */</div><div class='ctx'> #define FBNIC_MAC_STAT_TX_BYTE_COUNT_H	0x11a3f		/* 0x468fc */</div><div class='ctx'> #define FBNIC_MAC_STAT_TX_TRANSMITTED_OK_L \</div><div class='ctx'> 					0x11a42		/* 0x46908 */</div><div class='ctx'> #define FBNIC_MAC_STAT_TX_TRANSMITTED_OK_H \</div><div class='ctx'> 					0x11a43		/* 0x4690c */</div><div class='del'>-#define FBNIC_MAC_STAT_TX_IFOUTERRORS_L \</div><div class='del'>-					0x11a46		/* 0x46918 */</div><div class='del'>-#define FBNIC_MAC_STAT_TX_IFOUTERRORS_H \</div><div class='del'>-					0x11a47		/* 0x4691c */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_IFOUTERRORS_L	0x11a46		/* 0x46918 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_IFOUTERRORS_H	0x11a47		/* 0x4691c */</div><div class='ctx'> #define FBNIC_MAC_STAT_TX_MULTICAST_L	0x11a4a		/* 0x46928 */</div><div class='ctx'> #define FBNIC_MAC_STAT_TX_MULTICAST_H	0x11a4b		/* 0x4692c */</div><div class='ctx'> #define FBNIC_MAC_STAT_TX_BROADCAST_L	0x11a4c		/* 0x46930 */</div><div class='ctx'> #define FBNIC_MAC_STAT_TX_BROADCAST_H	0x11a4d		/* 0x46934 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_64_BYTES_L \</div><div class='add'>+					0x11a4e		/* 0x46938 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_64_BYTES_H \</div><div class='add'>+					0x11a4f		/* 0x4693c */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_65_127_BYTES_L \</div><div class='add'>+					0x11a50		/* 0x46940 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_65_127_BYTES_H \</div><div class='add'>+					0x11a51		/* 0x46944 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_128_255_BYTES_L \</div><div class='add'>+					0x11a52		/* 0x46948 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_128_255_BYTES_H \</div><div class='add'>+					0x11a53		/* 0x4694c */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_256_511_BYTES_L \</div><div class='add'>+					0x11a54		/* 0x46950 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_256_511_BYTES_H \</div><div class='add'>+					0x11a55		/* 0x46954 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_512_1023_BYTES_L \</div><div class='add'>+					0x11a56		/* 0x46958 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_512_1023_BYTES_H \</div><div class='add'>+					0x11a57		/* 0x4695c */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_1024_1518_BYTES_L \</div><div class='add'>+					0x11a58		/* 0x46960 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_1024_1518_BYTES_H \</div><div class='add'>+					0x11a59		/* 0x46964 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_1519_MAX_BYTES_L \</div><div class='add'>+					0x11a5a		/* 0x46968 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_PACKET_1519_MAX_BYTES_H \</div><div class='add'>+					0x11a5b		/* 0x4696c */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_CONTROL_FRAMES_L \</div><div class='add'>+					0x11a5e		/* 0x46978 */</div><div class='add'>+#define FBNIC_MAC_STAT_TX_CONTROL_FRAMES_H \</div><div class='add'>+					0x11a5f		/* 0x4697c */</div><div class='add'>+</div><div class='add'>+/* PCIE Comphy Registers */</div><div class='add'>+#define FBNIC_CSR_START_PCIE_SS_COMPHY	0x2442e /* CSR section delimiter */</div><div class='add'>+#define FBNIC_CSR_END_PCIE_SS_COMPHY	0x279d7	/* CSR section delimiter */</div><div class='add'>+</div><div class='ctx'> /* PUL User Registers */</div><div class='ctx'> #define FBNIC_CSR_START_PUL_USER	0x31000	/* CSR section delimiter */</div><div class='ctx'> #define FBNIC_PUL_OB_TLP_HDR_AW_CFG	0x3103d		/* 0xc40f4 */</div><div class='add'>+#define FBNIC_PUL_OB_TLP_HDR_AW_CFG_FLUSH	CSR_BIT(19)</div><div class='ctx'> #define FBNIC_PUL_OB_TLP_HDR_AW_CFG_BME		CSR_BIT(18)</div><div class='ctx'> #define FBNIC_PUL_OB_TLP_HDR_AR_CFG	0x3103e		/* 0xc40f8 */</div><div class='add'>+#define FBNIC_PUL_OB_TLP_HDR_AR_CFG_FLUSH	CSR_BIT(19)</div><div class='ctx'> #define FBNIC_PUL_OB_TLP_HDR_AR_CFG_BME		CSR_BIT(18)</div><div class='del'>-#define FBNIC_CSR_END_PUL_USER	0x31080	/* CSR section delimiter */</div><div class='add'>+#define FBNIC_PUL_USER_OB_RD_TLP_CNT_31_0 \</div><div class='add'>+					0x3106e		/* 0xc41b8 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_RD_DWORD_CNT_31_0 \</div><div class='add'>+					0x31070		/* 0xc41c0 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_RD_DWORD_CNT_63_32 \</div><div class='add'>+					0x31071		/* 0xc41c4 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_WR_TLP_CNT_31_0 \</div><div class='add'>+					0x31072		/* 0xc41c8 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_WR_TLP_CNT_63_32 \</div><div class='add'>+					0x31073		/* 0xc41cc */</div><div class='add'>+#define FBNIC_PUL_USER_OB_WR_DWORD_CNT_31_0 \</div><div class='add'>+					0x31074		/* 0xc41d0 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_WR_DWORD_CNT_63_32 \</div><div class='add'>+					0x31075		/* 0xc41d4 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_CPL_TLP_CNT_31_0 \</div><div class='add'>+					0x31076		/* 0xc41d8 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_CPL_TLP_CNT_63_32 \</div><div class='add'>+					0x31077		/* 0xc41dc */</div><div class='add'>+#define FBNIC_PUL_USER_OB_CPL_DWORD_CNT_31_0 \</div><div class='add'>+					0x31078		/* 0xc41e0 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_CPL_DWORD_CNT_63_32 \</div><div class='add'>+					0x31079		/* 0xc41e4 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_RD_DBG_CNT_CPL_CRED_31_0 \</div><div class='add'>+					0x3107a		/* 0xc41e8 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_RD_DBG_CNT_CPL_CRED_63_32 \</div><div class='add'>+					0x3107b		/* 0xc41ec */</div><div class='add'>+#define FBNIC_PUL_USER_OB_RD_DBG_CNT_TAG_31_0 \</div><div class='add'>+					0x3107c		/* 0xc41f0 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_RD_DBG_CNT_TAG_63_32 \</div><div class='add'>+					0x3107d		/* 0xc41f4 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_RD_DBG_CNT_NP_CRED_31_0 \</div><div class='add'>+					0x3107e		/* 0xc41f8 */</div><div class='add'>+#define FBNIC_PUL_USER_OB_RD_DBG_CNT_NP_CRED_63_32 \</div><div class='add'>+					0x3107f		/* 0xc41fc */</div><div class='add'>+#define FBNIC_CSR_END_PUL_USER		0x310ea	/* CSR section delimiter */</div><div class='ctx'> </div><div class='ctx'> /* Queue Registers</div><div class='ctx'>  *</div><div class='hunk'>@@ -773,6 +1030,12 @@ enum {</div><div class='ctx'> #define FBNIC_QUEUE_TWQ1_BAL		0x022		/* 0x088 */</div><div class='ctx'> #define FBNIC_QUEUE_TWQ1_BAH		0x023		/* 0x08c */</div><div class='ctx'> </div><div class='add'>+/* Tx Work Queue Statistics Registers */</div><div class='add'>+#define FBNIC_QUEUE_TWQ0_PKT_CNT	0x062		/* 0x188 */</div><div class='add'>+#define FBNIC_QUEUE_TWQ0_ERR_CNT	0x063		/* 0x18c */</div><div class='add'>+#define FBNIC_QUEUE_TWQ1_PKT_CNT	0x072		/* 0x1c8 */</div><div class='add'>+#define FBNIC_QUEUE_TWQ1_ERR_CNT	0x073		/* 0x1cc */</div><div class='add'>+</div><div class='ctx'> /* Tx Completion Queue Registers */</div><div class='ctx'> #define FBNIC_QUEUE_TCQ_CTL		0x080		/* 0x200 */</div><div class='ctx'> #define FBNIC_QUEUE_TCQ_CTL_RESET		CSR_BIT(0)</div><div class='hunk'>@@ -862,6 +1125,12 @@ enum {</div><div class='ctx'> 	FBNIC_QUEUE_RDE_CTL1_PAYLD_PACK_RSS	= 2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* Rx Per CQ Statistics Counters */</div><div class='add'>+#define FBNIC_QUEUE_RDE_PKT_CNT		0x2a2		/* 0xa88 */</div><div class='add'>+#define FBNIC_QUEUE_RDE_PKT_ERR_CNT	0x2a3		/* 0xa8c */</div><div class='add'>+#define FBNIC_QUEUE_RDE_CQ_DROP_CNT	0x2a4		/* 0xa90 */</div><div class='add'>+#define FBNIC_QUEUE_RDE_BDQ_DROP_CNT	0x2a5		/* 0xa94 */</div><div class='add'>+</div><div class='ctx'> /* Rx Interrupt Manager Registers */</div><div class='ctx'> #define FBNIC_QUEUE_RIM_CTL		0x2c0		/* 0xb00 */</div><div class='ctx'> #define FBNIC_QUEUE_RIM_CTL_MSIX_MASK		CSR_GENMASK(7, 0)</div><div class='hunk'>@@ -911,4 +1180,22 @@ enum {</div><div class='ctx'> #define FBNIC_IPC_MBX_DESC_FW_CMPL	DESC_BIT(1)</div><div class='ctx'> #define FBNIC_IPC_MBX_DESC_HOST_CMPL	DESC_BIT(0)</div><div class='ctx'> </div><div class='add'>+/* OTP Registers</div><div class='add'>+ * These registers are accessible via bar4 offset and are written by CMRT</div><div class='add'>+ * on boot. For the write status, the register is broken up in half with OTP</div><div class='add'>+ * Write Data Status occupying the top 16 bits and the ECC status occupying the</div><div class='add'>+ * bottom 16 bits.</div><div class='add'>+ */</div><div class='add'>+#define FBNIC_NS_OTP_STATUS		0x0021d</div><div class='add'>+#define FBNIC_NS_OTP_WRITE_STATUS	0x0021e</div><div class='add'>+</div><div class='add'>+#define FBNIC_NS_OTP_WRITE_DATA_STATUS_MASK	CSR_GENMASK(31, 16)</div><div class='add'>+#define FBNIC_NS_OTP_WRITE_ECC_STATUS_MASK	CSR_GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define FBNIC_REGS_VERSION			CSR_GENMASK(31, 16)</div><div class='add'>+#define FBNIC_REGS_HW_TYPE			CSR_GENMASK(15, 8)</div><div class='add'>+enum{</div><div class='add'>+	FBNIC_CSR_VERSION_V1_0_ASIC = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* _FBNIC_CSR_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c b/drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c<br/>new file mode 100644<br/>index 000000000000..b7238dd967fe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,271 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) Meta Platforms, Inc. and affiliates. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+</div><div class='add'>+#include "fbnic.h"</div><div class='add'>+</div><div class='add'>+static struct dentry *fbnic_dbg_root;</div><div class='add'>+</div><div class='add'>+static void fbnic_dbg_desc_break(struct seq_file *s, int i)</div><div class='add'>+{</div><div class='add'>+	while (i--)</div><div class='add'>+		seq_putc(s, '-');</div><div class='add'>+</div><div class='add'>+	seq_putc(s, '\n');</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_dbg_mac_addr_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = s-&gt;private;</div><div class='add'>+	char hdr[80];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Generate Header */</div><div class='add'>+	snprintf(hdr, sizeof(hdr), "%3s %s %-17s %s\n",</div><div class='add'>+		 "Idx", "S", "TCAM Bitmap", "Addr/Mask");</div><div class='add'>+	seq_puts(s, hdr);</div><div class='add'>+	fbnic_dbg_desc_break(s, strnlen(hdr, sizeof(hdr)));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES; i++) {</div><div class='add'>+		struct fbnic_mac_addr *mac_addr = &amp;fbd-&gt;mac_addr[i];</div><div class='add'>+</div><div class='add'>+		seq_printf(s, "%02d  %d %64pb %pm\n",</div><div class='add'>+			   i, mac_addr-&gt;state, mac_addr-&gt;act_tcam,</div><div class='add'>+			   mac_addr-&gt;value.addr8);</div><div class='add'>+		seq_printf(s, "                        %pm\n",</div><div class='add'>+			   mac_addr-&gt;mask.addr8);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(fbnic_dbg_mac_addr);</div><div class='add'>+</div><div class='add'>+static int fbnic_dbg_tce_tcam_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = s-&gt;private;</div><div class='add'>+	int i, tcam_idx = 0;</div><div class='add'>+	char hdr[80];</div><div class='add'>+</div><div class='add'>+	/* Generate Header */</div><div class='add'>+	snprintf(hdr, sizeof(hdr), "%3s %s %-17s %s\n",</div><div class='add'>+		 "Idx", "S", "TCAM Bitmap", "Addr/Mask");</div><div class='add'>+	seq_puts(s, hdr);</div><div class='add'>+	fbnic_dbg_desc_break(s, strnlen(hdr, sizeof(hdr)));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(fbd-&gt;mac_addr); i++) {</div><div class='add'>+		struct fbnic_mac_addr *mac_addr = &amp;fbd-&gt;mac_addr[i];</div><div class='add'>+</div><div class='add'>+		/* Verify BMC bit is set */</div><div class='add'>+		if (!test_bit(FBNIC_MAC_ADDR_T_BMC, mac_addr-&gt;act_tcam))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (tcam_idx == FBNIC_TCE_TCAM_NUM_ENTRIES)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		seq_printf(s, "%02d  %d %64pb %pm\n",</div><div class='add'>+			   tcam_idx, mac_addr-&gt;state, mac_addr-&gt;act_tcam,</div><div class='add'>+			   mac_addr-&gt;value.addr8);</div><div class='add'>+		seq_printf(s, "                        %pm\n",</div><div class='add'>+			   mac_addr-&gt;mask.addr8);</div><div class='add'>+		tcam_idx++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(fbnic_dbg_tce_tcam);</div><div class='add'>+</div><div class='add'>+static int fbnic_dbg_act_tcam_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = s-&gt;private;</div><div class='add'>+	char hdr[80];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Generate Header */</div><div class='add'>+	snprintf(hdr, sizeof(hdr), "%3s %s %-55s %-4s %s\n",</div><div class='add'>+		 "Idx", "S", "Value/Mask", "RSS", "Dest");</div><div class='add'>+	seq_puts(s, hdr);</div><div class='add'>+	fbnic_dbg_desc_break(s, strnlen(hdr, sizeof(hdr)));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_ACT_NUM_ENTRIES; i++) {</div><div class='add'>+		struct fbnic_act_tcam *act_tcam = &amp;fbd-&gt;act_tcam[i];</div><div class='add'>+</div><div class='add'>+		seq_printf(s, "%02d  %d %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x  %04x %08x\n",</div><div class='add'>+			   i, act_tcam-&gt;state,</div><div class='add'>+			   act_tcam-&gt;value.tcam[10], act_tcam-&gt;value.tcam[9],</div><div class='add'>+			   act_tcam-&gt;value.tcam[8], act_tcam-&gt;value.tcam[7],</div><div class='add'>+			   act_tcam-&gt;value.tcam[6], act_tcam-&gt;value.tcam[5],</div><div class='add'>+			   act_tcam-&gt;value.tcam[4], act_tcam-&gt;value.tcam[3],</div><div class='add'>+			   act_tcam-&gt;value.tcam[2], act_tcam-&gt;value.tcam[1],</div><div class='add'>+			   act_tcam-&gt;value.tcam[0], act_tcam-&gt;rss_en_mask,</div><div class='add'>+			   act_tcam-&gt;dest);</div><div class='add'>+		seq_printf(s, "      %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x\n",</div><div class='add'>+			   act_tcam-&gt;mask.tcam[10], act_tcam-&gt;mask.tcam[9],</div><div class='add'>+			   act_tcam-&gt;mask.tcam[8], act_tcam-&gt;mask.tcam[7],</div><div class='add'>+			   act_tcam-&gt;mask.tcam[6], act_tcam-&gt;mask.tcam[5],</div><div class='add'>+			   act_tcam-&gt;mask.tcam[4], act_tcam-&gt;mask.tcam[3],</div><div class='add'>+			   act_tcam-&gt;mask.tcam[2], act_tcam-&gt;mask.tcam[1],</div><div class='add'>+			   act_tcam-&gt;mask.tcam[0]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(fbnic_dbg_act_tcam);</div><div class='add'>+</div><div class='add'>+static int fbnic_dbg_ip_addr_show(struct seq_file *s,</div><div class='add'>+				  struct fbnic_ip_addr *ip_addr)</div><div class='add'>+{</div><div class='add'>+	char hdr[80];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Generate Header */</div><div class='add'>+	snprintf(hdr, sizeof(hdr), "%3s %s %-17s %s %s\n",</div><div class='add'>+		 "Idx", "S", "TCAM Bitmap", "V", "Addr/Mask");</div><div class='add'>+	seq_puts(s, hdr);</div><div class='add'>+	fbnic_dbg_desc_break(s, strnlen(hdr, sizeof(hdr)));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES; i++, ip_addr++) {</div><div class='add'>+		seq_printf(s, "%02d  %d %64pb %d %pi6\n",</div><div class='add'>+			   i, ip_addr-&gt;state, ip_addr-&gt;act_tcam,</div><div class='add'>+			   ip_addr-&gt;version, &amp;ip_addr-&gt;value);</div><div class='add'>+		seq_printf(s, "                          %pi6\n",</div><div class='add'>+			   &amp;ip_addr-&gt;mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_dbg_ip_src_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = s-&gt;private;</div><div class='add'>+</div><div class='add'>+	return fbnic_dbg_ip_addr_show(s, fbd-&gt;ip_src);</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(fbnic_dbg_ip_src);</div><div class='add'>+</div><div class='add'>+static int fbnic_dbg_ip_dst_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = s-&gt;private;</div><div class='add'>+</div><div class='add'>+	return fbnic_dbg_ip_addr_show(s, fbd-&gt;ip_dst);</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(fbnic_dbg_ip_dst);</div><div class='add'>+</div><div class='add'>+static int fbnic_dbg_ipo_src_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = s-&gt;private;</div><div class='add'>+</div><div class='add'>+	return fbnic_dbg_ip_addr_show(s, fbd-&gt;ipo_src);</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(fbnic_dbg_ipo_src);</div><div class='add'>+</div><div class='add'>+static int fbnic_dbg_ipo_dst_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = s-&gt;private;</div><div class='add'>+</div><div class='add'>+	return fbnic_dbg_ip_addr_show(s, fbd-&gt;ipo_dst);</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(fbnic_dbg_ipo_dst);</div><div class='add'>+</div><div class='add'>+static int fbnic_dbg_fw_log_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = s-&gt;private;</div><div class='add'>+	struct fbnic_fw_log_entry *entry;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!fbnic_fw_log_ready(fbd))</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fbd-&gt;fw_log.lock, flags);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_reverse(entry, &amp;fbd-&gt;fw_log.entries, list) {</div><div class='add'>+		seq_printf(s, FBNIC_FW_LOG_FMT, entry-&gt;index,</div><div class='add'>+			   (entry-&gt;timestamp / (MSEC_PER_SEC * 60 * 60 * 24)),</div><div class='add'>+			   (entry-&gt;timestamp / (MSEC_PER_SEC * 60 * 60)) % 24,</div><div class='add'>+			   ((entry-&gt;timestamp / (MSEC_PER_SEC * 60) % 60)),</div><div class='add'>+			   ((entry-&gt;timestamp / MSEC_PER_SEC) % 60),</div><div class='add'>+			   (entry-&gt;timestamp % MSEC_PER_SEC),</div><div class='add'>+			   entry-&gt;msg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;fbd-&gt;fw_log.lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(fbnic_dbg_fw_log);</div><div class='add'>+</div><div class='add'>+static int fbnic_dbg_pcie_stats_show(struct seq_file *s, void *v)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = s-&gt;private;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	fbnic_get_hw_stats(fbd);</div><div class='add'>+</div><div class='add'>+	seq_printf(s, "ob_rd_tlp: %llu\n", fbd-&gt;hw_stats.pcie.ob_rd_tlp.value);</div><div class='add'>+	seq_printf(s, "ob_rd_dword: %llu\n",</div><div class='add'>+		   fbd-&gt;hw_stats.pcie.ob_rd_dword.value);</div><div class='add'>+	seq_printf(s, "ob_wr_tlp: %llu\n", fbd-&gt;hw_stats.pcie.ob_wr_tlp.value);</div><div class='add'>+	seq_printf(s, "ob_wr_dword: %llu\n",</div><div class='add'>+		   fbd-&gt;hw_stats.pcie.ob_wr_dword.value);</div><div class='add'>+	seq_printf(s, "ob_cpl_tlp: %llu\n",</div><div class='add'>+		   fbd-&gt;hw_stats.pcie.ob_cpl_tlp.value);</div><div class='add'>+	seq_printf(s, "ob_cpl_dword: %llu\n",</div><div class='add'>+		   fbd-&gt;hw_stats.pcie.ob_cpl_dword.value);</div><div class='add'>+	seq_printf(s, "ob_rd_no_tag: %llu\n",</div><div class='add'>+		   fbd-&gt;hw_stats.pcie.ob_rd_no_tag.value);</div><div class='add'>+	seq_printf(s, "ob_rd_no_cpl_cred: %llu\n",</div><div class='add'>+		   fbd-&gt;hw_stats.pcie.ob_rd_no_cpl_cred.value);</div><div class='add'>+	seq_printf(s, "ob_rd_no_np_cred: %llu\n",</div><div class='add'>+		   fbd-&gt;hw_stats.pcie.ob_rd_no_np_cred.value);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(fbnic_dbg_pcie_stats);</div><div class='add'>+</div><div class='add'>+void fbnic_dbg_fbd_init(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(fbd-&gt;dev);</div><div class='add'>+	const char *name = pci_name(pdev);</div><div class='add'>+</div><div class='add'>+	fbd-&gt;dbg_fbd = debugfs_create_dir(name, fbnic_dbg_root);</div><div class='add'>+	debugfs_create_file("pcie_stats", 0400, fbd-&gt;dbg_fbd, fbd,</div><div class='add'>+			    &amp;fbnic_dbg_pcie_stats_fops);</div><div class='add'>+	debugfs_create_file("mac_addr", 0400, fbd-&gt;dbg_fbd, fbd,</div><div class='add'>+			    &amp;fbnic_dbg_mac_addr_fops);</div><div class='add'>+	debugfs_create_file("tce_tcam", 0400, fbd-&gt;dbg_fbd, fbd,</div><div class='add'>+			    &amp;fbnic_dbg_tce_tcam_fops);</div><div class='add'>+	debugfs_create_file("act_tcam", 0400, fbd-&gt;dbg_fbd, fbd,</div><div class='add'>+			    &amp;fbnic_dbg_act_tcam_fops);</div><div class='add'>+	debugfs_create_file("ip_src", 0400, fbd-&gt;dbg_fbd, fbd,</div><div class='add'>+			    &amp;fbnic_dbg_ip_src_fops);</div><div class='add'>+	debugfs_create_file("ip_dst", 0400, fbd-&gt;dbg_fbd, fbd,</div><div class='add'>+			    &amp;fbnic_dbg_ip_dst_fops);</div><div class='add'>+	debugfs_create_file("ipo_src", 0400, fbd-&gt;dbg_fbd, fbd,</div><div class='add'>+			    &amp;fbnic_dbg_ipo_src_fops);</div><div class='add'>+	debugfs_create_file("ipo_dst", 0400, fbd-&gt;dbg_fbd, fbd,</div><div class='add'>+			    &amp;fbnic_dbg_ipo_dst_fops);</div><div class='add'>+	debugfs_create_file("fw_log", 0400, fbd-&gt;dbg_fbd, fbd,</div><div class='add'>+			    &amp;fbnic_dbg_fw_log_fops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_dbg_fbd_exit(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(fbd-&gt;dbg_fbd);</div><div class='add'>+	fbd-&gt;dbg_fbd = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_dbg_init(void)</div><div class='add'>+{</div><div class='add'>+	fbnic_dbg_root = debugfs_create_dir(fbnic_driver_name, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_dbg_exit(void)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(fbnic_dbg_root);</div><div class='add'>+	fbnic_dbg_root = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_devlink.c b/drivers/net/ethernet/meta/fbnic/fbnic_devlink.c<br/>index 0072d612215e..b62b1d5b1453 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_devlink.c</a></div><div class='hunk'>@@ -3,10 +3,13 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/pldmfw.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;net/devlink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fbnic.h"</div><div class='add'>+#include "fbnic_fw.h"</div><div class='add'>+#include "fbnic_tlv.h"</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_SN_STR_LEN	24</div><div class='ctx'> </div><div class='hunk'>@@ -109,10 +112,512 @@ static int fbnic_devlink_info_get(struct devlink *devlink,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool</div><div class='add'>+fbnic_pldm_match_record(struct pldmfw *context, struct pldmfw_record *record)</div><div class='add'>+{</div><div class='add'>+	struct pldmfw_desc_tlv *desc;</div><div class='add'>+	u32 anti_rollback_ver = 0;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	struct fbnic_dev *fbd;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+</div><div class='add'>+	/* First, use the standard PCI matching function */</div><div class='add'>+	if (!pldmfw_op_pci_match_record(context, record))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	pdev = to_pci_dev(context-&gt;dev);</div><div class='add'>+	fbd = pci_get_drvdata(pdev);</div><div class='add'>+	devlink = priv_to_devlink(fbd);</div><div class='add'>+</div><div class='add'>+	/* If PCI match is successful, check for vendor-specific descriptors */</div><div class='add'>+	list_for_each_entry(desc, &amp;record-&gt;descs, entry) {</div><div class='add'>+		if (desc-&gt;type != PLDM_DESC_ID_VENDOR_DEFINED)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (desc-&gt;size &lt; 21 || desc-&gt;data[0] != 1 ||</div><div class='add'>+		    desc-&gt;data[1] != 15)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (memcmp(desc-&gt;data + 2, "AntiRollbackVer", 15) != 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		anti_rollback_ver = get_unaligned_le32(desc-&gt;data + 17);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Compare versions and return error if they do not match */</div><div class='add'>+	if (anti_rollback_ver &lt; fbd-&gt;fw_cap.anti_rollback_version) {</div><div class='add'>+		char buf[128];</div><div class='add'>+</div><div class='add'>+		snprintf(buf, sizeof(buf),</div><div class='add'>+			 "New firmware anti-rollback version (0x%x) is older than device version (0x%x)!",</div><div class='add'>+			 anti_rollback_ver, fbd-&gt;fw_cap.anti_rollback_version);</div><div class='add'>+		devlink_flash_update_status_notify(devlink, buf,</div><div class='add'>+						   "Anti-Rollback", 0, 0);</div><div class='add'>+</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_flash_start(struct fbnic_dev *fbd, struct pldmfw_component *component)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmpl = fbnic_fw_alloc_cmpl(FBNIC_TLV_MSG_ID_FW_START_UPGRADE_REQ);</div><div class='add'>+	if (!cmpl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = fbnic_fw_xmit_fw_start_upgrade(fbd, cmpl,</div><div class='add'>+					     component-&gt;identifier,</div><div class='add'>+					     component-&gt;component_size);</div><div class='add'>+	if (err)</div><div class='add'>+		goto cmpl_free;</div><div class='add'>+</div><div class='add'>+	/* Wait for firmware to ack firmware upgrade start */</div><div class='add'>+	if (wait_for_completion_timeout(&amp;cmpl-&gt;done, 10 * HZ))</div><div class='add'>+		err = cmpl-&gt;result;</div><div class='add'>+	else</div><div class='add'>+		err = -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	fbnic_mbx_clear_cmpl(fbd, cmpl);</div><div class='add'>+cmpl_free:</div><div class='add'>+	fbnic_fw_put_cmpl(cmpl);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_flash_component(struct pldmfw *context,</div><div class='add'>+		      struct pldmfw_component *component)</div><div class='add'>+{</div><div class='add'>+	const u8 *data = component-&gt;component_data;</div><div class='add'>+	const u32 size = component-&gt;component_size;</div><div class='add'>+	struct fbnic_fw_completion *cmpl;</div><div class='add'>+	const char *component_name;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	struct fbnic_dev *fbd;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	u32 offset = 0;</div><div class='add'>+	u32 length = 0;</div><div class='add'>+	char buf[32];</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pdev = to_pci_dev(context-&gt;dev);</div><div class='add'>+	fbd = pci_get_drvdata(pdev);</div><div class='add'>+	devlink = priv_to_devlink(fbd);</div><div class='add'>+</div><div class='add'>+	switch (component-&gt;identifier) {</div><div class='add'>+	case QSPI_SECTION_CMRT:</div><div class='add'>+		component_name = "boot1";</div><div class='add'>+		break;</div><div class='add'>+	case QSPI_SECTION_CONTROL_FW:</div><div class='add'>+		component_name = "boot2";</div><div class='add'>+		break;</div><div class='add'>+	case QSPI_SECTION_OPTION_ROM:</div><div class='add'>+		component_name = "option-rom";</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		snprintf(buf, sizeof(buf), "Unknown component ID %u!",</div><div class='add'>+			 component-&gt;identifier);</div><div class='add'>+		devlink_flash_update_status_notify(devlink, buf, NULL, 0,</div><div class='add'>+						   size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Once firmware receives the request to start upgrading it responds</div><div class='add'>+	 * with two messages:</div><div class='add'>+	 * 1. An ACK that it received the message and possible error code</div><div class='add'>+	 *    indicating that an upgrade is not currently possible.</div><div class='add'>+	 * 2. A request for the first chunk of data</div><div class='add'>+	 *</div><div class='add'>+	 * Setup completions for write before issuing the start message so</div><div class='add'>+	 * the driver can catch both messages.</div><div class='add'>+	 */</div><div class='add'>+	cmpl = fbnic_fw_alloc_cmpl(FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_REQ);</div><div class='add'>+	if (!cmpl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = fbnic_mbx_set_cmpl(fbd, cmpl);</div><div class='add'>+	if (err)</div><div class='add'>+		goto cmpl_free;</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_timeout_notify(devlink, "Initializing",</div><div class='add'>+					    component_name, 15);</div><div class='add'>+	err = fbnic_flash_start(fbd, component);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_no_msg;</div><div class='add'>+</div><div class='add'>+	while (offset &lt; size) {</div><div class='add'>+		if (!wait_for_completion_timeout(&amp;cmpl-&gt;done, 15 * HZ)) {</div><div class='add'>+			err = -ETIMEDOUT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = cmpl-&gt;result;</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* Verify firmware is requesting the next chunk in the seq. */</div><div class='add'>+		if (cmpl-&gt;u.fw_update.offset != offset + length) {</div><div class='add'>+			err = -EFAULT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		offset = cmpl-&gt;u.fw_update.offset;</div><div class='add'>+		length = cmpl-&gt;u.fw_update.length;</div><div class='add'>+</div><div class='add'>+		if (length &gt; TLV_MAX_DATA || offset + length &gt; size) {</div><div class='add'>+			err = -EFAULT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		devlink_flash_update_status_notify(devlink, "Flashing",</div><div class='add'>+						   component_name,</div><div class='add'>+						   offset, size);</div><div class='add'>+</div><div class='add'>+		/* Mailbox will set length to 0 once it receives the finish</div><div class='add'>+		 * message.</div><div class='add'>+		 */</div><div class='add'>+		if (!length)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		reinit_completion(&amp;cmpl-&gt;done);</div><div class='add'>+		err = fbnic_fw_xmit_fw_write_chunk(fbd, data, offset, length,</div><div class='add'>+						   0);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		fbnic_fw_xmit_fw_write_chunk(fbd, NULL, 0, 0, err);</div><div class='add'>+err_no_msg:</div><div class='add'>+		snprintf(buf, sizeof(buf), "Mailbox encountered error %d!",</div><div class='add'>+			 err);</div><div class='add'>+		devlink_flash_update_status_notify(devlink, buf,</div><div class='add'>+						   component_name, 0, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fbnic_mbx_clear_cmpl(fbd, cmpl);</div><div class='add'>+cmpl_free:</div><div class='add'>+	fbnic_fw_put_cmpl(cmpl);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pldmfw_ops fbnic_pldmfw_ops = {</div><div class='add'>+	.match_record = fbnic_pldm_match_record,</div><div class='add'>+	.flash_component = fbnic_flash_component,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_devlink_flash_update(struct devlink *devlink,</div><div class='add'>+			   struct devlink_flash_update_params *params,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = devlink_priv(devlink);</div><div class='add'>+	const struct firmware *fw = params-&gt;fw;</div><div class='add'>+	struct device *dev = fbd-&gt;dev;</div><div class='add'>+	struct pldmfw context;</div><div class='add'>+	char *err_msg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	context.ops = &amp;fbnic_pldmfw_ops;</div><div class='add'>+	context.dev = dev;</div><div class='add'>+</div><div class='add'>+	err = pldmfw_flash_image(&amp;context, fw);</div><div class='add'>+	if (err) {</div><div class='add'>+		switch (err) {</div><div class='add'>+		case -EINVAL:</div><div class='add'>+			err_msg = "Invalid image";</div><div class='add'>+			break;</div><div class='add'>+		case -EOPNOTSUPP:</div><div class='add'>+			err_msg = "Unsupported image";</div><div class='add'>+			break;</div><div class='add'>+		case -ENOMEM:</div><div class='add'>+			err_msg = "Out of memory";</div><div class='add'>+			break;</div><div class='add'>+		case -EFAULT:</div><div class='add'>+			err_msg = "Invalid header";</div><div class='add'>+			break;</div><div class='add'>+		case -ENOENT:</div><div class='add'>+			err_msg = "No matching record";</div><div class='add'>+			break;</div><div class='add'>+		case -ENODEV:</div><div class='add'>+			err_msg = "No matching device";</div><div class='add'>+			break;</div><div class='add'>+		case -ETIMEDOUT:</div><div class='add'>+			err_msg = "Timed out waiting for reply";</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			err_msg = "Unknown error";</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "Failed to flash PLDM Image: %s (error: %d)",</div><div class='add'>+				       err_msg, err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct devlink_ops fbnic_devlink_ops = {</div><div class='del'>-	.info_get = fbnic_devlink_info_get,</div><div class='add'>+	.info_get	= fbnic_devlink_info_get,</div><div class='add'>+	.flash_update	= fbnic_devlink_flash_update,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int fbnic_fw_reporter_dump(struct devlink_health_reporter *reporter,</div><div class='add'>+				  struct devlink_fmsg *fmsg, void *priv_ctx,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = devlink_health_reporter_priv(reporter);</div><div class='add'>+	u32 offset, index, index_count, length, size;</div><div class='add'>+	struct fbnic_fw_completion *fw_cmpl;</div><div class='add'>+	u8 *dump_data, **data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	fw_cmpl = fbnic_fw_alloc_cmpl(FBNIC_TLV_MSG_ID_COREDUMP_GET_INFO_RESP);</div><div class='add'>+	if (!fw_cmpl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = fbnic_fw_xmit_coredump_info_msg(fbd, fw_cmpl, true);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to transmit core dump info msg");</div><div class='add'>+		goto cmpl_free;</div><div class='add'>+	}</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;fw_cmpl-&gt;done, 2 * HZ)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Timed out waiting on core dump info");</div><div class='add'>+		err = -ETIMEDOUT;</div><div class='add'>+		goto cmpl_cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = fw_cmpl-&gt;u.coredump_info.size;</div><div class='add'>+	err = fw_cmpl-&gt;result;</div><div class='add'>+</div><div class='add'>+	fbnic_mbx_clear_cmpl(fbd, fw_cmpl);</div><div class='add'>+	fbnic_fw_put_cmpl(fw_cmpl);</div><div class='add'>+</div><div class='add'>+	/* Handle error returned by firmware */</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Firmware core dump returned error");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	if (!size) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Firmware core dump returned size 0");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read the dump, we can only transfer TLV_MAX_DATA at a time */</div><div class='add'>+	index_count = DIV_ROUND_UP(size, TLV_MAX_DATA);</div><div class='add'>+</div><div class='add'>+	fw_cmpl = __fbnic_fw_alloc_cmpl(FBNIC_TLV_MSG_ID_COREDUMP_READ_RESP,</div><div class='add'>+					sizeof(void *) * index_count + size);</div><div class='add'>+	if (!fw_cmpl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Populate pointer table w/ pointer offsets */</div><div class='add'>+	dump_data = (void *)&amp;fw_cmpl-&gt;u.coredump.data[index_count];</div><div class='add'>+	data = fw_cmpl-&gt;u.coredump.data;</div><div class='add'>+	fw_cmpl-&gt;u.coredump.size = size;</div><div class='add'>+	fw_cmpl-&gt;u.coredump.stride = TLV_MAX_DATA;</div><div class='add'>+</div><div class='add'>+	for (index = 0; index &lt; index_count; index++) {</div><div class='add'>+		/* First iteration installs completion */</div><div class='add'>+		struct fbnic_fw_completion *cmpl_arg = index ? NULL : fw_cmpl;</div><div class='add'>+</div><div class='add'>+		offset = index * TLV_MAX_DATA;</div><div class='add'>+		length = min(size - offset, TLV_MAX_DATA);</div><div class='add'>+</div><div class='add'>+		data[index] = dump_data + offset;</div><div class='add'>+		err = fbnic_fw_xmit_coredump_read_msg(fbd, cmpl_arg,</div><div class='add'>+						      offset, length);</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Failed to transmit core dump msg");</div><div class='add'>+			if (cmpl_arg)</div><div class='add'>+				goto cmpl_free;</div><div class='add'>+			else</div><div class='add'>+				goto cmpl_cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (wait_for_completion_timeout(&amp;fw_cmpl-&gt;done, 2 * HZ)) {</div><div class='add'>+			reinit_completion(&amp;fw_cmpl-&gt;done);</div><div class='add'>+		} else {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "Timed out waiting on core dump (%d/%d)",</div><div class='add'>+					       index + 1, index_count);</div><div class='add'>+			err = -ETIMEDOUT;</div><div class='add'>+			goto cmpl_cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* If we didn't see the reply record as incomplete */</div><div class='add'>+		if (fw_cmpl-&gt;u.coredump.data[index]) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "No data for core dump chunk (%d/%d)",</div><div class='add'>+					       index + 1, index_count);</div><div class='add'>+			err = -EIO;</div><div class='add'>+			goto cmpl_cleanup;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_binary_pair_nest_start(fmsg, "FW coredump");</div><div class='add'>+</div><div class='add'>+	for (offset = 0; offset &lt; size; offset += length) {</div><div class='add'>+		length = min_t(u32, size - offset, TLV_MAX_DATA);</div><div class='add'>+</div><div class='add'>+		devlink_fmsg_binary_put(fmsg, dump_data + offset, length);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_binary_pair_nest_end(fmsg);</div><div class='add'>+</div><div class='add'>+cmpl_cleanup:</div><div class='add'>+	fbnic_mbx_clear_cmpl(fbd, fw_cmpl);</div><div class='add'>+cmpl_free:</div><div class='add'>+	fbnic_fw_put_cmpl(fw_cmpl);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_fw_reporter_diagnose(struct devlink_health_reporter *reporter,</div><div class='add'>+			   struct devlink_fmsg *fmsg,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = devlink_health_reporter_priv(reporter);</div><div class='add'>+	u32 sec, msec;</div><div class='add'>+</div><div class='add'>+	/* Device is most likely down, we're not exchanging heartbeats */</div><div class='add'>+	if (!fbd-&gt;prev_firmware_time)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	sec = div_u64_rem(fbd-&gt;firmware_time, MSEC_PER_SEC, &amp;msec);</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_pair_nest_start(fmsg, "last_heartbeat");</div><div class='add'>+	devlink_fmsg_obj_nest_start(fmsg);</div><div class='add'>+	devlink_fmsg_pair_nest_start(fmsg, "fw_uptime");</div><div class='add'>+	devlink_fmsg_obj_nest_start(fmsg);</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "sec", sec);</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "msec", msec);</div><div class='add'>+	devlink_fmsg_obj_nest_end(fmsg);</div><div class='add'>+	devlink_fmsg_pair_nest_end(fmsg);</div><div class='add'>+	devlink_fmsg_obj_nest_end(fmsg);</div><div class='add'>+	devlink_fmsg_pair_nest_end(fmsg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __printf(2, 3)</div><div class='add'>+fbnic_devlink_fw_report(struct fbnic_dev *fbd, const char *format, ...)</div><div class='add'>+{</div><div class='add'>+	char msg[FBNIC_FW_LOG_MAX_SIZE];</div><div class='add'>+	va_list args;</div><div class='add'>+</div><div class='add'>+	va_start(args, format);</div><div class='add'>+	vsnprintf(msg, FBNIC_FW_LOG_MAX_SIZE, format, args);</div><div class='add'>+	va_end(args);</div><div class='add'>+</div><div class='add'>+	devlink_health_report(fbd-&gt;fw_reporter, msg, fbd);</div><div class='add'>+	if (fbnic_fw_log_ready(fbd))</div><div class='add'>+		fbnic_fw_log_write(fbd, 0, fbd-&gt;firmware_time, msg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_health_reporter_ops fbnic_fw_ops = {</div><div class='add'>+	.name = "fw",</div><div class='add'>+	.dump = fbnic_fw_reporter_dump,</div><div class='add'>+	.diagnose = fbnic_fw_reporter_diagnose,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 fbnic_read_otp_status(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	return fbnic_fw_rd32(fbd, FBNIC_NS_OTP_STATUS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_otp_reporter_dump(struct devlink_health_reporter *reporter,</div><div class='add'>+			struct devlink_fmsg *fmsg, void *priv_ctx,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = devlink_health_reporter_priv(reporter);</div><div class='add'>+	u32 otp_status, otp_write_status, m;</div><div class='add'>+</div><div class='add'>+	otp_status = fbnic_read_otp_status(fbd);</div><div class='add'>+	otp_write_status = fbnic_fw_rd32(fbd, FBNIC_NS_OTP_WRITE_STATUS);</div><div class='add'>+</div><div class='add'>+	/* Dump OTP status */</div><div class='add'>+	devlink_fmsg_pair_nest_start(fmsg, "OTP");</div><div class='add'>+	devlink_fmsg_obj_nest_start(fmsg);</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "Status", otp_status);</div><div class='add'>+</div><div class='add'>+	/* Extract OTP Write Data status */</div><div class='add'>+	m = FBNIC_NS_OTP_WRITE_DATA_STATUS_MASK;</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "Data",</div><div class='add'>+				  FIELD_GET(m, otp_write_status));</div><div class='add'>+</div><div class='add'>+	/* Extract OTP Write ECC status */</div><div class='add'>+	m = FBNIC_NS_OTP_WRITE_ECC_STATUS_MASK;</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "ECC",</div><div class='add'>+				  FIELD_GET(m, otp_write_status));</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_obj_nest_end(fmsg);</div><div class='add'>+	devlink_fmsg_pair_nest_end(fmsg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_devlink_otp_check(struct fbnic_dev *fbd, const char *msg)</div><div class='add'>+{</div><div class='add'>+	/* Check if there is anything to report */</div><div class='add'>+	if (!fbnic_read_otp_status(fbd))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	devlink_health_report(fbd-&gt;otp_reporter, msg, fbd);</div><div class='add'>+	if (fbnic_fw_log_ready(fbd))</div><div class='add'>+		fbnic_fw_log_write(fbd, 0, fbd-&gt;firmware_time, msg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_health_reporter_ops fbnic_otp_ops = {</div><div class='add'>+	.name = "otp",</div><div class='add'>+	.dump = fbnic_otp_reporter_dump,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int fbnic_devlink_health_create(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	fbd-&gt;fw_reporter = devlink_health_reporter_create(priv_to_devlink(fbd),</div><div class='add'>+							  &amp;fbnic_fw_ops, fbd);</div><div class='add'>+	if (IS_ERR(fbd-&gt;fw_reporter)) {</div><div class='add'>+		dev_warn(fbd-&gt;dev,</div><div class='add'>+			 "Failed to create FW fault reporter: %pe\n",</div><div class='add'>+			 fbd-&gt;fw_reporter);</div><div class='add'>+		return PTR_ERR(fbd-&gt;fw_reporter);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fbd-&gt;otp_reporter = devlink_health_reporter_create(priv_to_devlink(fbd),</div><div class='add'>+							   &amp;fbnic_otp_ops, fbd);</div><div class='add'>+	if (IS_ERR(fbd-&gt;otp_reporter)) {</div><div class='add'>+		devlink_health_reporter_destroy(fbd-&gt;fw_reporter);</div><div class='add'>+		dev_warn(fbd-&gt;dev,</div><div class='add'>+			 "Failed to create OTP fault reporter: %pe\n",</div><div class='add'>+			 fbd-&gt;otp_reporter);</div><div class='add'>+		return PTR_ERR(fbd-&gt;otp_reporter);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_devlink_health_destroy(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	devlink_health_reporter_destroy(fbd-&gt;otp_reporter);</div><div class='add'>+	devlink_health_reporter_destroy(fbd-&gt;fw_reporter);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void fbnic_devlink_free(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='ctx'> 	struct devlink *devlink = priv_to_devlink(fbd);</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c b/drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c<br/>index 1117d5a32867..693ebdf38705 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c</a></div><div class='hunk'>@@ -1,11 +1,1588 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) Meta Platforms, Inc. and affiliates. */</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/ethtool_netlink.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;net/ipv6.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fbnic.h"</div><div class='ctx'> #include "fbnic_netdev.h"</div><div class='ctx'> #include "fbnic_tlv.h"</div><div class='ctx'> </div><div class='add'>+struct fbnic_stat {</div><div class='add'>+	u8 string[ETH_GSTRING_LEN];</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FBNIC_STAT_FIELDS(type, name, stat) { \</div><div class='add'>+	.string = name, \</div><div class='add'>+	.size = sizeof_field(struct type, stat), \</div><div class='add'>+	.offset = offsetof(struct type, stat), \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Hardware statistics not captured in rtnl_link_stats */</div><div class='add'>+#define FBNIC_HW_STAT(name, stat) \</div><div class='add'>+	FBNIC_STAT_FIELDS(fbnic_hw_stats, name, stat)</div><div class='add'>+</div><div class='add'>+static const struct fbnic_stat fbnic_gstrings_hw_stats[] = {</div><div class='add'>+	/* TTI */</div><div class='add'>+	FBNIC_HW_STAT("tti_cm_drop_frames", tti.cm_drop.frames),</div><div class='add'>+	FBNIC_HW_STAT("tti_cm_drop_bytes", tti.cm_drop.bytes),</div><div class='add'>+	FBNIC_HW_STAT("tti_frame_drop_frames", tti.frame_drop.frames),</div><div class='add'>+	FBNIC_HW_STAT("tti_frame_drop_bytes", tti.frame_drop.bytes),</div><div class='add'>+	FBNIC_HW_STAT("tti_tbi_drop_frames", tti.tbi_drop.frames),</div><div class='add'>+	FBNIC_HW_STAT("tti_tbi_drop_bytes", tti.tbi_drop.bytes),</div><div class='add'>+</div><div class='add'>+	/* TMI */</div><div class='add'>+	FBNIC_HW_STAT("ptp_illegal_req", tmi.ptp_illegal_req),</div><div class='add'>+	FBNIC_HW_STAT("ptp_good_ts", tmi.ptp_good_ts),</div><div class='add'>+	FBNIC_HW_STAT("ptp_bad_ts", tmi.ptp_bad_ts),</div><div class='add'>+</div><div class='add'>+	/* RPC */</div><div class='add'>+	FBNIC_HW_STAT("rpc_unkn_etype", rpc.unkn_etype),</div><div class='add'>+	FBNIC_HW_STAT("rpc_unkn_ext_hdr", rpc.unkn_ext_hdr),</div><div class='add'>+	FBNIC_HW_STAT("rpc_ipv4_frag", rpc.ipv4_frag),</div><div class='add'>+	FBNIC_HW_STAT("rpc_ipv6_frag", rpc.ipv6_frag),</div><div class='add'>+	FBNIC_HW_STAT("rpc_ipv4_esp", rpc.ipv4_esp),</div><div class='add'>+	FBNIC_HW_STAT("rpc_ipv6_esp", rpc.ipv6_esp),</div><div class='add'>+	FBNIC_HW_STAT("rpc_tcp_opt_err", rpc.tcp_opt_err),</div><div class='add'>+	FBNIC_HW_STAT("rpc_out_of_hdr_err", rpc.out_of_hdr_err),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FBNIC_HW_FIXED_STATS_LEN ARRAY_SIZE(fbnic_gstrings_hw_stats)</div><div class='add'>+</div><div class='add'>+#define FBNIC_RXB_ENQUEUE_STAT(name, stat) \</div><div class='add'>+	FBNIC_STAT_FIELDS(fbnic_rxb_enqueue_stats, name, stat)</div><div class='add'>+</div><div class='add'>+static const struct fbnic_stat fbnic_gstrings_rxb_enqueue_stats[] = {</div><div class='add'>+	FBNIC_RXB_ENQUEUE_STAT("rxb_integrity_err%u", integrity_err),</div><div class='add'>+	FBNIC_RXB_ENQUEUE_STAT("rxb_mac_err%u", mac_err),</div><div class='add'>+	FBNIC_RXB_ENQUEUE_STAT("rxb_parser_err%u", parser_err),</div><div class='add'>+	FBNIC_RXB_ENQUEUE_STAT("rxb_frm_err%u", frm_err),</div><div class='add'>+</div><div class='add'>+	FBNIC_RXB_ENQUEUE_STAT("rxb_drbo%u_frames", drbo.frames),</div><div class='add'>+	FBNIC_RXB_ENQUEUE_STAT("rxb_drbo%u_bytes", drbo.bytes),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FBNIC_HW_RXB_ENQUEUE_STATS_LEN \</div><div class='add'>+	ARRAY_SIZE(fbnic_gstrings_rxb_enqueue_stats)</div><div class='add'>+</div><div class='add'>+#define FBNIC_RXB_FIFO_STAT(name, stat) \</div><div class='add'>+	FBNIC_STAT_FIELDS(fbnic_rxb_fifo_stats, name, stat)</div><div class='add'>+</div><div class='add'>+static const struct fbnic_stat fbnic_gstrings_rxb_fifo_stats[] = {</div><div class='add'>+	FBNIC_RXB_FIFO_STAT("rxb_fifo%u_drop", trans_drop),</div><div class='add'>+	FBNIC_RXB_FIFO_STAT("rxb_fifo%u_dropped_frames", drop.frames),</div><div class='add'>+	FBNIC_RXB_FIFO_STAT("rxb_fifo%u_ecn", trans_ecn),</div><div class='add'>+	FBNIC_RXB_FIFO_STAT("rxb_fifo%u_level", level),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FBNIC_HW_RXB_FIFO_STATS_LEN ARRAY_SIZE(fbnic_gstrings_rxb_fifo_stats)</div><div class='add'>+</div><div class='add'>+#define FBNIC_RXB_DEQUEUE_STAT(name, stat) \</div><div class='add'>+	FBNIC_STAT_FIELDS(fbnic_rxb_dequeue_stats, name, stat)</div><div class='add'>+</div><div class='add'>+static const struct fbnic_stat fbnic_gstrings_rxb_dequeue_stats[] = {</div><div class='add'>+	FBNIC_RXB_DEQUEUE_STAT("rxb_intf%u_frames", intf.frames),</div><div class='add'>+	FBNIC_RXB_DEQUEUE_STAT("rxb_intf%u_bytes", intf.bytes),</div><div class='add'>+	FBNIC_RXB_DEQUEUE_STAT("rxb_pbuf%u_frames", pbuf.frames),</div><div class='add'>+	FBNIC_RXB_DEQUEUE_STAT("rxb_pbuf%u_bytes", pbuf.bytes),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FBNIC_HW_RXB_DEQUEUE_STATS_LEN \</div><div class='add'>+	ARRAY_SIZE(fbnic_gstrings_rxb_dequeue_stats)</div><div class='add'>+</div><div class='add'>+#define FBNIC_HW_Q_STAT(name, stat) \</div><div class='add'>+	FBNIC_STAT_FIELDS(fbnic_hw_q_stats, name, stat.value)</div><div class='add'>+</div><div class='add'>+static const struct fbnic_stat fbnic_gstrings_hw_q_stats[] = {</div><div class='add'>+	FBNIC_HW_Q_STAT("rde_%u_pkt_err", rde_pkt_err),</div><div class='add'>+	FBNIC_HW_Q_STAT("rde_%u_pkt_cq_drop", rde_pkt_cq_drop),</div><div class='add'>+	FBNIC_HW_Q_STAT("rde_%u_pkt_bdq_drop", rde_pkt_bdq_drop),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FBNIC_HW_Q_STATS_LEN ARRAY_SIZE(fbnic_gstrings_hw_q_stats)</div><div class='add'>+#define FBNIC_HW_STATS_LEN \</div><div class='add'>+	(FBNIC_HW_FIXED_STATS_LEN + \</div><div class='add'>+	 FBNIC_HW_RXB_ENQUEUE_STATS_LEN * FBNIC_RXB_ENQUEUE_INDICES + \</div><div class='add'>+	 FBNIC_HW_RXB_FIFO_STATS_LEN * FBNIC_RXB_FIFO_INDICES + \</div><div class='add'>+	 FBNIC_HW_RXB_DEQUEUE_STATS_LEN * FBNIC_RXB_DEQUEUE_INDICES + \</div><div class='add'>+	 FBNIC_HW_Q_STATS_LEN * FBNIC_MAX_QUEUES)</div><div class='add'>+</div><div class='add'>+#define FBNIC_QUEUE_STAT(name, stat) \</div><div class='add'>+	FBNIC_STAT_FIELDS(fbnic_ring, name, stat)</div><div class='add'>+</div><div class='add'>+static const struct fbnic_stat fbnic_gstrings_xdp_stats[] = {</div><div class='add'>+	FBNIC_QUEUE_STAT("xdp_tx_queue_%u_packets", stats.packets),</div><div class='add'>+	FBNIC_QUEUE_STAT("xdp_tx_queue_%u_bytes", stats.bytes),</div><div class='add'>+	FBNIC_QUEUE_STAT("xdp_tx_queue_%u_dropped", stats.dropped),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FBNIC_XDP_STATS_LEN ARRAY_SIZE(fbnic_gstrings_xdp_stats)</div><div class='add'>+</div><div class='add'>+#define FBNIC_STATS_LEN \</div><div class='add'>+	(FBNIC_HW_STATS_LEN + FBNIC_XDP_STATS_LEN * FBNIC_MAX_XDPQS)</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+</div><div class='add'>+	fbnic_get_fw_ver_commit_str(fbd, drvinfo-&gt;fw_version,</div><div class='add'>+				    sizeof(drvinfo-&gt;fw_version));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_get_regs_len(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return fbnic_csr_regs_len(fbn-&gt;fbd) * sizeof(u32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_regs(struct net_device *netdev,</div><div class='add'>+			   struct ethtool_regs *regs, void *data)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	fbnic_csr_get_regs(fbn-&gt;fbd, data, &amp;regs-&gt;version);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct fbnic_net *fbnic_clone_create(struct fbnic_net *orig)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *clone;</div><div class='add'>+</div><div class='add'>+	clone = kmemdup(orig, sizeof(*orig), GFP_KERNEL);</div><div class='add'>+	if (!clone)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	memset(clone-&gt;tx, 0, sizeof(clone-&gt;tx));</div><div class='add'>+	memset(clone-&gt;rx, 0, sizeof(clone-&gt;rx));</div><div class='add'>+	memset(clone-&gt;napi, 0, sizeof(clone-&gt;napi));</div><div class='add'>+	return clone;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clone_swap_cfg(struct fbnic_net *orig,</div><div class='add'>+				 struct fbnic_net *clone)</div><div class='add'>+{</div><div class='add'>+	swap(clone-&gt;rcq_size, orig-&gt;rcq_size);</div><div class='add'>+	swap(clone-&gt;hpq_size, orig-&gt;hpq_size);</div><div class='add'>+	swap(clone-&gt;ppq_size, orig-&gt;ppq_size);</div><div class='add'>+	swap(clone-&gt;txq_size, orig-&gt;txq_size);</div><div class='add'>+	swap(clone-&gt;num_rx_queues, orig-&gt;num_rx_queues);</div><div class='add'>+	swap(clone-&gt;num_tx_queues, orig-&gt;num_tx_queues);</div><div class='add'>+	swap(clone-&gt;num_napi, orig-&gt;num_napi);</div><div class='add'>+	swap(clone-&gt;hds_thresh, orig-&gt;hds_thresh);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_aggregate_vector_counters(struct fbnic_net *fbn,</div><div class='add'>+					    struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nv-&gt;txt_count; i++) {</div><div class='add'>+		fbnic_aggregate_ring_tx_counters(fbn, &amp;nv-&gt;qt[i].sub0);</div><div class='add'>+		fbnic_aggregate_ring_xdp_counters(fbn, &amp;nv-&gt;qt[i].sub1);</div><div class='add'>+		fbnic_aggregate_ring_tx_counters(fbn, &amp;nv-&gt;qt[i].cmpl);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; nv-&gt;rxt_count; j++, i++) {</div><div class='add'>+		fbnic_aggregate_ring_bdq_counters(fbn, &amp;nv-&gt;qt[i].sub0);</div><div class='add'>+		fbnic_aggregate_ring_bdq_counters(fbn, &amp;nv-&gt;qt[i].sub1);</div><div class='add'>+		fbnic_aggregate_ring_rx_counters(fbn, &amp;nv-&gt;qt[i].cmpl);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clone_swap(struct fbnic_net *orig,</div><div class='add'>+			     struct fbnic_net *clone)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = orig-&gt;fbd;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max(clone-&gt;num_napi, orig-&gt;num_napi); i++)</div><div class='add'>+		fbnic_synchronize_irq(fbd, FBNIC_NON_NAPI_VECTORS + i);</div><div class='add'>+	for (i = 0; i &lt; orig-&gt;num_napi; i++)</div><div class='add'>+		fbnic_aggregate_vector_counters(orig, orig-&gt;napi[i]);</div><div class='add'>+</div><div class='add'>+	fbnic_clone_swap_cfg(orig, clone);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(orig-&gt;napi); i++)</div><div class='add'>+		swap(clone-&gt;napi[i], orig-&gt;napi[i]);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(orig-&gt;tx); i++)</div><div class='add'>+		swap(clone-&gt;tx[i], orig-&gt;tx[i]);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(orig-&gt;rx); i++)</div><div class='add'>+		swap(clone-&gt;rx[i], orig-&gt;rx[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clone_free(struct fbnic_net *clone)</div><div class='add'>+{</div><div class='add'>+	kfree(clone);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_get_coalesce(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_coalesce *ec,</div><div class='add'>+			      struct kernel_ethtool_coalesce *kernel_coal,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	ec-&gt;tx_coalesce_usecs = fbn-&gt;tx_usecs;</div><div class='add'>+	ec-&gt;rx_coalesce_usecs = fbn-&gt;rx_usecs;</div><div class='add'>+	ec-&gt;rx_max_coalesced_frames = fbn-&gt;rx_max_frames;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_set_coalesce(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_coalesce *ec,</div><div class='add'>+			      struct kernel_ethtool_coalesce *kernel_coal,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	/* Verify against hardware limits */</div><div class='add'>+	if (ec-&gt;rx_coalesce_usecs &gt; FIELD_MAX(FBNIC_INTR_CQ_REARM_RCQ_TIMEOUT)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "rx_usecs is above device max");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (ec-&gt;tx_coalesce_usecs &gt; FIELD_MAX(FBNIC_INTR_CQ_REARM_TCQ_TIMEOUT)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "tx_usecs is above device max");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (ec-&gt;rx_max_coalesced_frames &gt;</div><div class='add'>+	    FIELD_MAX(FBNIC_QUEUE_RIM_THRESHOLD_RCD_MASK) /</div><div class='add'>+	    FBNIC_MIN_RXD_PER_FRAME) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "rx_frames is above device max");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fbn-&gt;tx_usecs = ec-&gt;tx_coalesce_usecs;</div><div class='add'>+	fbn-&gt;rx_usecs = ec-&gt;rx_coalesce_usecs;</div><div class='add'>+	fbn-&gt;rx_max_frames = ec-&gt;rx_max_coalesced_frames;</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev)) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; fbn-&gt;num_napi; i++) {</div><div class='add'>+			struct fbnic_napi_vector *nv = fbn-&gt;napi[i];</div><div class='add'>+</div><div class='add'>+			fbnic_config_txrx_usecs(nv, 0);</div><div class='add'>+			fbnic_config_rx_frames(nv);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_get_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring,</div><div class='add'>+		    struct kernel_ethtool_ringparam *kernel_ring,</div><div class='add'>+		    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	ring-&gt;rx_max_pending = FBNIC_QUEUE_SIZE_MAX;</div><div class='add'>+	ring-&gt;rx_mini_max_pending = FBNIC_QUEUE_SIZE_MAX;</div><div class='add'>+	ring-&gt;rx_jumbo_max_pending = FBNIC_QUEUE_SIZE_MAX;</div><div class='add'>+	ring-&gt;tx_max_pending = FBNIC_QUEUE_SIZE_MAX;</div><div class='add'>+</div><div class='add'>+	ring-&gt;rx_pending = fbn-&gt;rcq_size;</div><div class='add'>+	ring-&gt;rx_mini_pending = fbn-&gt;hpq_size;</div><div class='add'>+	ring-&gt;rx_jumbo_pending = fbn-&gt;ppq_size;</div><div class='add'>+	ring-&gt;tx_pending = fbn-&gt;txq_size;</div><div class='add'>+</div><div class='add'>+	kernel_ring-&gt;tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_ENABLED;</div><div class='add'>+	kernel_ring-&gt;hds_thresh_max = FBNIC_HDS_THRESH_MAX;</div><div class='add'>+	kernel_ring-&gt;hds_thresh = fbn-&gt;hds_thresh;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_set_rings(struct fbnic_net *fbn,</div><div class='add'>+			    struct ethtool_ringparam *ring,</div><div class='add'>+			    struct kernel_ethtool_ringparam *kernel_ring)</div><div class='add'>+{</div><div class='add'>+	fbn-&gt;rcq_size = ring-&gt;rx_pending;</div><div class='add'>+	fbn-&gt;hpq_size = ring-&gt;rx_mini_pending;</div><div class='add'>+	fbn-&gt;ppq_size = ring-&gt;rx_jumbo_pending;</div><div class='add'>+	fbn-&gt;txq_size = ring-&gt;tx_pending;</div><div class='add'>+	fbn-&gt;hds_thresh = kernel_ring-&gt;hds_thresh;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_set_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring,</div><div class='add'>+		    struct kernel_ethtool_ringparam *kernel_ring,</div><div class='add'>+		    struct netlink_ext_ack *extack)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_net *clone;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ring-&gt;rx_pending	= roundup_pow_of_two(ring-&gt;rx_pending);</div><div class='add'>+	ring-&gt;rx_mini_pending	= roundup_pow_of_two(ring-&gt;rx_mini_pending);</div><div class='add'>+	ring-&gt;rx_jumbo_pending	= roundup_pow_of_two(ring-&gt;rx_jumbo_pending);</div><div class='add'>+	ring-&gt;tx_pending	= roundup_pow_of_two(ring-&gt;tx_pending);</div><div class='add'>+</div><div class='add'>+	/* These are absolute minimums allowing the device and driver to operate</div><div class='add'>+	 * but not necessarily guarantee reasonable performance. Settings below</div><div class='add'>+	 * Rx queue size of 128 and BDQs smaller than 64 are likely suboptimal</div><div class='add'>+	 * at best.</div><div class='add'>+	 */</div><div class='add'>+	if (ring-&gt;rx_pending &lt; max(FBNIC_QUEUE_SIZE_MIN, FBNIC_RX_DESC_MIN) ||</div><div class='add'>+	    ring-&gt;rx_mini_pending &lt; FBNIC_QUEUE_SIZE_MIN ||</div><div class='add'>+	    ring-&gt;rx_jumbo_pending &lt; FBNIC_QUEUE_SIZE_MIN ||</div><div class='add'>+	    ring-&gt;tx_pending &lt; max(FBNIC_QUEUE_SIZE_MIN, FBNIC_TX_DESC_MIN)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "requested ring size too small");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (kernel_ring-&gt;tcp_data_split == ETHTOOL_TCP_DATA_SPLIT_DISABLED) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Cannot disable TCP data split");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If an XDP program is attached, we should check for potential frame</div><div class='add'>+	 * splitting. If the new HDS threshold can cause splitting, we should</div><div class='add'>+	 * only allow if the attached XDP program can handle frags.</div><div class='add'>+	 */</div><div class='add'>+	if (fbnic_check_split_frames(fbn-&gt;xdp_prog, netdev-&gt;mtu,</div><div class='add'>+				     kernel_ring-&gt;hds_thresh)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Use higher HDS threshold or multi-buf capable program");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev)) {</div><div class='add'>+		fbnic_set_rings(fbn, ring, kernel_ring);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clone = fbnic_clone_create(fbn);</div><div class='add'>+	if (!clone)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	fbnic_set_rings(clone, ring, kernel_ring);</div><div class='add'>+</div><div class='add'>+	err = fbnic_alloc_napi_vectors(clone);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_clone;</div><div class='add'>+</div><div class='add'>+	err = fbnic_alloc_resources(clone);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_napis;</div><div class='add'>+</div><div class='add'>+	fbnic_down_noidle(fbn);</div><div class='add'>+	err = fbnic_wait_all_queues_idle(fbn-&gt;fbd, true);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_start_stack;</div><div class='add'>+</div><div class='add'>+	err = fbnic_set_netif_queues(clone);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_start_stack;</div><div class='add'>+</div><div class='add'>+	/* Nothing can fail past this point */</div><div class='add'>+	fbnic_flush(fbn);</div><div class='add'>+</div><div class='add'>+	fbnic_clone_swap(fbn, clone);</div><div class='add'>+</div><div class='add'>+	fbnic_up(fbn);</div><div class='add'>+</div><div class='add'>+	fbnic_free_resources(clone);</div><div class='add'>+	fbnic_free_napi_vectors(clone);</div><div class='add'>+	fbnic_clone_free(clone);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_start_stack:</div><div class='add'>+	fbnic_flush(fbn);</div><div class='add'>+	fbnic_up(fbn);</div><div class='add'>+	fbnic_free_resources(clone);</div><div class='add'>+err_free_napis:</div><div class='add'>+	fbnic_free_napi_vectors(clone);</div><div class='add'>+err_free_clone:</div><div class='add'>+	fbnic_clone_free(clone);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_enqueue_strings(u8 **data, unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	const struct fbnic_stat *stat;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	stat = fbnic_gstrings_rxb_enqueue_stats;</div><div class='add'>+	for (i = 0; i &lt; FBNIC_HW_RXB_ENQUEUE_STATS_LEN; i++, stat++)</div><div class='add'>+		ethtool_sprintf(data, stat-&gt;string, idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_fifo_strings(u8 **data, unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	const struct fbnic_stat *stat;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	stat = fbnic_gstrings_rxb_fifo_stats;</div><div class='add'>+	for (i = 0; i &lt; FBNIC_HW_RXB_FIFO_STATS_LEN; i++, stat++)</div><div class='add'>+		ethtool_sprintf(data, stat-&gt;string, idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_dequeue_strings(u8 **data, unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	const struct fbnic_stat *stat;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	stat = fbnic_gstrings_rxb_dequeue_stats;</div><div class='add'>+	for (i = 0; i &lt; FBNIC_HW_RXB_DEQUEUE_STATS_LEN; i++, stat++)</div><div class='add'>+		ethtool_sprintf(data, stat-&gt;string, idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_xdp_queue_strings(u8 **data, unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	const struct fbnic_stat *stat;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	stat = fbnic_gstrings_xdp_stats;</div><div class='add'>+	for (i = 0; i &lt; FBNIC_XDP_STATS_LEN; i++, stat++)</div><div class='add'>+		ethtool_sprintf(data, stat-&gt;string, idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_strings(struct net_device *dev, u32 sset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	const struct fbnic_stat *stat;</div><div class='add'>+	int i, idx;</div><div class='add'>+</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		for (i = 0; i &lt; FBNIC_HW_FIXED_STATS_LEN; i++)</div><div class='add'>+			ethtool_puts(&amp;data, fbnic_gstrings_hw_stats[i].string);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; FBNIC_RXB_ENQUEUE_INDICES; i++)</div><div class='add'>+			fbnic_get_rxb_enqueue_strings(&amp;data, i);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; FBNIC_RXB_FIFO_INDICES; i++)</div><div class='add'>+			fbnic_get_rxb_fifo_strings(&amp;data, i);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; FBNIC_RXB_DEQUEUE_INDICES; i++)</div><div class='add'>+			fbnic_get_rxb_dequeue_strings(&amp;data, i);</div><div class='add'>+</div><div class='add'>+		for (idx = 0; idx &lt; FBNIC_MAX_QUEUES; idx++) {</div><div class='add'>+			stat = fbnic_gstrings_hw_q_stats;</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; FBNIC_HW_Q_STATS_LEN; i++, stat++)</div><div class='add'>+				ethtool_sprintf(&amp;data, stat-&gt;string, idx);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; FBNIC_MAX_XDPQS; i++)</div><div class='add'>+			fbnic_get_xdp_queue_strings(&amp;data, i);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_report_hw_stats(const struct fbnic_stat *stat,</div><div class='add'>+				  const void *base, int len, u64 **data)</div><div class='add'>+{</div><div class='add'>+	while (len--) {</div><div class='add'>+		u8 *curr = (u8 *)base + stat-&gt;offset;</div><div class='add'>+</div><div class='add'>+		**data = *(u64 *)curr;</div><div class='add'>+</div><div class='add'>+		stat++;</div><div class='add'>+		(*data)++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_xdp_queue_stats(struct fbnic_ring *ring, u64 **data)</div><div class='add'>+{</div><div class='add'>+	const struct fbnic_stat *stat;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!ring) {</div><div class='add'>+		*data += FBNIC_XDP_STATS_LEN;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stat = fbnic_gstrings_xdp_stats;</div><div class='add'>+	for (i = 0; i &lt; FBNIC_XDP_STATS_LEN; i++, stat++, (*data)++) {</div><div class='add'>+		u8 *p = (u8 *)ring + stat-&gt;offset;</div><div class='add'>+</div><div class='add'>+		**data = *(u64 *)p;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_ethtool_stats(struct net_device *dev,</div><div class='add'>+				    struct ethtool_stats *stats, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(dev);</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	fbnic_get_hw_stats(fbn-&gt;fbd);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+	fbnic_report_hw_stats(fbnic_gstrings_hw_stats, &amp;fbd-&gt;hw_stats,</div><div class='add'>+			      FBNIC_HW_FIXED_STATS_LEN, &amp;data);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RXB_ENQUEUE_INDICES; i++) {</div><div class='add'>+		const struct fbnic_rxb_enqueue_stats *enq;</div><div class='add'>+</div><div class='add'>+		enq = &amp;fbd-&gt;hw_stats.rxb.enq[i];</div><div class='add'>+		fbnic_report_hw_stats(fbnic_gstrings_rxb_enqueue_stats,</div><div class='add'>+				      enq, FBNIC_HW_RXB_ENQUEUE_STATS_LEN,</div><div class='add'>+				      &amp;data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RXB_FIFO_INDICES; i++) {</div><div class='add'>+		const struct fbnic_rxb_fifo_stats *fifo;</div><div class='add'>+</div><div class='add'>+		fifo = &amp;fbd-&gt;hw_stats.rxb.fifo[i];</div><div class='add'>+		fbnic_report_hw_stats(fbnic_gstrings_rxb_fifo_stats,</div><div class='add'>+				      fifo, FBNIC_HW_RXB_FIFO_STATS_LEN,</div><div class='add'>+				      &amp;data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RXB_DEQUEUE_INDICES; i++) {</div><div class='add'>+		const struct fbnic_rxb_dequeue_stats *deq;</div><div class='add'>+</div><div class='add'>+		deq = &amp;fbd-&gt;hw_stats.rxb.deq[i];</div><div class='add'>+		fbnic_report_hw_stats(fbnic_gstrings_rxb_dequeue_stats,</div><div class='add'>+				      deq, FBNIC_HW_RXB_DEQUEUE_STATS_LEN,</div><div class='add'>+				      &amp;data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i  = 0; i &lt; FBNIC_MAX_QUEUES; i++) {</div><div class='add'>+		const struct fbnic_hw_q_stats *hw_q = &amp;fbd-&gt;hw_stats.hw_q[i];</div><div class='add'>+</div><div class='add'>+		fbnic_report_hw_stats(fbnic_gstrings_hw_q_stats, hw_q,</div><div class='add'>+				      FBNIC_HW_Q_STATS_LEN, &amp;data);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_MAX_XDPQS; i++)</div><div class='add'>+		fbnic_get_xdp_queue_stats(fbn-&gt;tx[i + FBNIC_MAX_TXQS], &amp;data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_get_sset_count(struct net_device *dev, int sset)</div><div class='add'>+{</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		return FBNIC_STATS_LEN;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_get_rss_hash_idx(u32 flow_type)</div><div class='add'>+{</div><div class='add'>+	switch (flow_type &amp; ~(FLOW_EXT | FLOW_MAC_EXT | FLOW_RSS)) {</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+		return FBNIC_TCP4_HASH_OPT;</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+		return FBNIC_TCP6_HASH_OPT;</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+		return FBNIC_UDP4_HASH_OPT;</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+		return FBNIC_UDP6_HASH_OPT;</div><div class='add'>+	case AH_V4_FLOW:</div><div class='add'>+	case ESP_V4_FLOW:</div><div class='add'>+	case AH_ESP_V4_FLOW:</div><div class='add'>+	case SCTP_V4_FLOW:</div><div class='add'>+	case IPV4_FLOW:</div><div class='add'>+	case IPV4_USER_FLOW:</div><div class='add'>+		return FBNIC_IPV4_HASH_OPT;</div><div class='add'>+	case AH_V6_FLOW:</div><div class='add'>+	case ESP_V6_FLOW:</div><div class='add'>+	case AH_ESP_V6_FLOW:</div><div class='add'>+	case SCTP_V6_FLOW:</div><div class='add'>+	case IPV6_FLOW:</div><div class='add'>+	case IPV6_USER_FLOW:</div><div class='add'>+		return FBNIC_IPV6_HASH_OPT;</div><div class='add'>+	case ETHER_FLOW:</div><div class='add'>+		return FBNIC_ETHER_HASH_OPT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_get_cls_rule_all(struct fbnic_net *fbn,</div><div class='add'>+				  struct ethtool_rxnfc *cmd,</div><div class='add'>+				  u32 *rule_locs)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	int i, cnt = 0;</div><div class='add'>+</div><div class='add'>+	/* Report maximum rule count */</div><div class='add'>+	cmd-&gt;data = FBNIC_RPC_ACT_TBL_NFC_ENTRIES;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_ACT_TBL_NFC_ENTRIES; i++) {</div><div class='add'>+		int idx = i + FBNIC_RPC_ACT_TBL_NFC_OFFSET;</div><div class='add'>+		struct fbnic_act_tcam *act_tcam;</div><div class='add'>+</div><div class='add'>+		act_tcam = &amp;fbd-&gt;act_tcam[idx];</div><div class='add'>+		if (act_tcam-&gt;state != FBNIC_TCAM_S_VALID)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (rule_locs) {</div><div class='add'>+			if (cnt == cmd-&gt;rule_cnt)</div><div class='add'>+				return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+			rule_locs[cnt] = i;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cnt++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_get_cls_rule(struct fbnic_net *fbn, struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_rx_flow_spec *fsp;</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	struct fbnic_act_tcam *act_tcam;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	fsp = (struct ethtool_rx_flow_spec *)&amp;cmd-&gt;fs;</div><div class='add'>+</div><div class='add'>+	if (fsp-&gt;location &gt;= FBNIC_RPC_ACT_TBL_NFC_ENTRIES)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	idx = fsp-&gt;location + FBNIC_RPC_ACT_TBL_NFC_OFFSET;</div><div class='add'>+	act_tcam = &amp;fbd-&gt;act_tcam[idx];</div><div class='add'>+</div><div class='add'>+	if (act_tcam-&gt;state != FBNIC_TCAM_S_VALID)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Report maximum rule count */</div><div class='add'>+	cmd-&gt;data = FBNIC_RPC_ACT_TBL_NFC_ENTRIES;</div><div class='add'>+</div><div class='add'>+	/* Set flow type field */</div><div class='add'>+	if (!(act_tcam-&gt;value.tcam[1] &amp; FBNIC_RPC_TCAM_ACT1_IP_VALID)) {</div><div class='add'>+		fsp-&gt;flow_type = ETHER_FLOW;</div><div class='add'>+		if (!FIELD_GET(FBNIC_RPC_TCAM_ACT1_L2_MACDA_IDX,</div><div class='add'>+			       act_tcam-&gt;mask.tcam[1])) {</div><div class='add'>+			struct fbnic_mac_addr *mac_addr;</div><div class='add'>+</div><div class='add'>+			idx = FIELD_GET(FBNIC_RPC_TCAM_ACT1_L2_MACDA_IDX,</div><div class='add'>+					act_tcam-&gt;value.tcam[1]);</div><div class='add'>+			mac_addr = &amp;fbd-&gt;mac_addr[idx];</div><div class='add'>+</div><div class='add'>+			ether_addr_copy(fsp-&gt;h_u.ether_spec.h_dest,</div><div class='add'>+					mac_addr-&gt;value.addr8);</div><div class='add'>+			eth_broadcast_addr(fsp-&gt;m_u.ether_spec.h_dest);</div><div class='add'>+		}</div><div class='add'>+	} else if (act_tcam-&gt;value.tcam[1] &amp;</div><div class='add'>+		   FBNIC_RPC_TCAM_ACT1_OUTER_IP_VALID) {</div><div class='add'>+		fsp-&gt;flow_type = IPV6_USER_FLOW;</div><div class='add'>+		fsp-&gt;h_u.usr_ip6_spec.l4_proto = IPPROTO_IPV6;</div><div class='add'>+		fsp-&gt;m_u.usr_ip6_spec.l4_proto = 0xff;</div><div class='add'>+</div><div class='add'>+		if (!FIELD_GET(FBNIC_RPC_TCAM_ACT0_OUTER_IPSRC_IDX,</div><div class='add'>+			       act_tcam-&gt;mask.tcam[0])) {</div><div class='add'>+			struct fbnic_ip_addr *ip_addr;</div><div class='add'>+			int i;</div><div class='add'>+</div><div class='add'>+			idx = FIELD_GET(FBNIC_RPC_TCAM_ACT0_OUTER_IPSRC_IDX,</div><div class='add'>+					act_tcam-&gt;value.tcam[0]);</div><div class='add'>+			ip_addr = &amp;fbd-&gt;ipo_src[idx];</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; 4; i++) {</div><div class='add'>+				fsp-&gt;h_u.usr_ip6_spec.ip6src[i] =</div><div class='add'>+					ip_addr-&gt;value.s6_addr32[i];</div><div class='add'>+				fsp-&gt;m_u.usr_ip6_spec.ip6src[i] =</div><div class='add'>+					~ip_addr-&gt;mask.s6_addr32[i];</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!FIELD_GET(FBNIC_RPC_TCAM_ACT0_OUTER_IPDST_IDX,</div><div class='add'>+			       act_tcam-&gt;mask.tcam[0])) {</div><div class='add'>+			struct fbnic_ip_addr *ip_addr;</div><div class='add'>+			int i;</div><div class='add'>+</div><div class='add'>+			idx = FIELD_GET(FBNIC_RPC_TCAM_ACT0_OUTER_IPDST_IDX,</div><div class='add'>+					act_tcam-&gt;value.tcam[0]);</div><div class='add'>+			ip_addr = &amp;fbd-&gt;ipo_dst[idx];</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; 4; i++) {</div><div class='add'>+				fsp-&gt;h_u.usr_ip6_spec.ip6dst[i] =</div><div class='add'>+					ip_addr-&gt;value.s6_addr32[i];</div><div class='add'>+				fsp-&gt;m_u.usr_ip6_spec.ip6dst[i] =</div><div class='add'>+					~ip_addr-&gt;mask.s6_addr32[i];</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else if ((act_tcam-&gt;value.tcam[1] &amp; FBNIC_RPC_TCAM_ACT1_IP_IS_V6)) {</div><div class='add'>+		if (act_tcam-&gt;value.tcam[1] &amp; FBNIC_RPC_TCAM_ACT1_L4_VALID) {</div><div class='add'>+			if (act_tcam-&gt;value.tcam[1] &amp;</div><div class='add'>+			    FBNIC_RPC_TCAM_ACT1_L4_IS_UDP)</div><div class='add'>+				fsp-&gt;flow_type = UDP_V6_FLOW;</div><div class='add'>+			else</div><div class='add'>+				fsp-&gt;flow_type = TCP_V6_FLOW;</div><div class='add'>+			fsp-&gt;h_u.tcp_ip6_spec.psrc =</div><div class='add'>+				cpu_to_be16(act_tcam-&gt;value.tcam[3]);</div><div class='add'>+			fsp-&gt;m_u.tcp_ip6_spec.psrc =</div><div class='add'>+				cpu_to_be16(~act_tcam-&gt;mask.tcam[3]);</div><div class='add'>+			fsp-&gt;h_u.tcp_ip6_spec.pdst =</div><div class='add'>+				cpu_to_be16(act_tcam-&gt;value.tcam[4]);</div><div class='add'>+			fsp-&gt;m_u.tcp_ip6_spec.pdst =</div><div class='add'>+				cpu_to_be16(~act_tcam-&gt;mask.tcam[4]);</div><div class='add'>+		} else {</div><div class='add'>+			fsp-&gt;flow_type = IPV6_USER_FLOW;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!FIELD_GET(FBNIC_RPC_TCAM_ACT0_IPSRC_IDX,</div><div class='add'>+			       act_tcam-&gt;mask.tcam[0])) {</div><div class='add'>+			struct fbnic_ip_addr *ip_addr;</div><div class='add'>+			int i;</div><div class='add'>+</div><div class='add'>+			idx = FIELD_GET(FBNIC_RPC_TCAM_ACT0_IPSRC_IDX,</div><div class='add'>+					act_tcam-&gt;value.tcam[0]);</div><div class='add'>+			ip_addr = &amp;fbd-&gt;ip_src[idx];</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; 4; i++) {</div><div class='add'>+				fsp-&gt;h_u.usr_ip6_spec.ip6src[i] =</div><div class='add'>+					ip_addr-&gt;value.s6_addr32[i];</div><div class='add'>+				fsp-&gt;m_u.usr_ip6_spec.ip6src[i] =</div><div class='add'>+					~ip_addr-&gt;mask.s6_addr32[i];</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!FIELD_GET(FBNIC_RPC_TCAM_ACT0_IPDST_IDX,</div><div class='add'>+			       act_tcam-&gt;mask.tcam[0])) {</div><div class='add'>+			struct fbnic_ip_addr *ip_addr;</div><div class='add'>+			int i;</div><div class='add'>+</div><div class='add'>+			idx = FIELD_GET(FBNIC_RPC_TCAM_ACT0_IPDST_IDX,</div><div class='add'>+					act_tcam-&gt;value.tcam[0]);</div><div class='add'>+			ip_addr = &amp;fbd-&gt;ip_dst[idx];</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; 4; i++) {</div><div class='add'>+				fsp-&gt;h_u.usr_ip6_spec.ip6dst[i] =</div><div class='add'>+					ip_addr-&gt;value.s6_addr32[i];</div><div class='add'>+				fsp-&gt;m_u.usr_ip6_spec.ip6dst[i] =</div><div class='add'>+					~ip_addr-&gt;mask.s6_addr32[i];</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (act_tcam-&gt;value.tcam[1] &amp; FBNIC_RPC_TCAM_ACT1_L4_VALID) {</div><div class='add'>+			if (act_tcam-&gt;value.tcam[1] &amp;</div><div class='add'>+			    FBNIC_RPC_TCAM_ACT1_L4_IS_UDP)</div><div class='add'>+				fsp-&gt;flow_type = UDP_V4_FLOW;</div><div class='add'>+			else</div><div class='add'>+				fsp-&gt;flow_type = TCP_V4_FLOW;</div><div class='add'>+			fsp-&gt;h_u.tcp_ip4_spec.psrc =</div><div class='add'>+				cpu_to_be16(act_tcam-&gt;value.tcam[3]);</div><div class='add'>+			fsp-&gt;m_u.tcp_ip4_spec.psrc =</div><div class='add'>+				cpu_to_be16(~act_tcam-&gt;mask.tcam[3]);</div><div class='add'>+			fsp-&gt;h_u.tcp_ip4_spec.pdst =</div><div class='add'>+				cpu_to_be16(act_tcam-&gt;value.tcam[4]);</div><div class='add'>+			fsp-&gt;m_u.tcp_ip4_spec.pdst =</div><div class='add'>+				cpu_to_be16(~act_tcam-&gt;mask.tcam[4]);</div><div class='add'>+		} else {</div><div class='add'>+			fsp-&gt;flow_type = IPV4_USER_FLOW;</div><div class='add'>+			fsp-&gt;h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!FIELD_GET(FBNIC_RPC_TCAM_ACT0_IPSRC_IDX,</div><div class='add'>+			       act_tcam-&gt;mask.tcam[0])) {</div><div class='add'>+			struct fbnic_ip_addr *ip_addr;</div><div class='add'>+</div><div class='add'>+			idx = FIELD_GET(FBNIC_RPC_TCAM_ACT0_IPSRC_IDX,</div><div class='add'>+					act_tcam-&gt;value.tcam[0]);</div><div class='add'>+			ip_addr = &amp;fbd-&gt;ip_src[idx];</div><div class='add'>+</div><div class='add'>+			fsp-&gt;h_u.usr_ip4_spec.ip4src =</div><div class='add'>+				ip_addr-&gt;value.s6_addr32[3];</div><div class='add'>+			fsp-&gt;m_u.usr_ip4_spec.ip4src =</div><div class='add'>+				~ip_addr-&gt;mask.s6_addr32[3];</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!FIELD_GET(FBNIC_RPC_TCAM_ACT0_IPDST_IDX,</div><div class='add'>+			       act_tcam-&gt;mask.tcam[0])) {</div><div class='add'>+			struct fbnic_ip_addr *ip_addr;</div><div class='add'>+</div><div class='add'>+			idx = FIELD_GET(FBNIC_RPC_TCAM_ACT0_IPDST_IDX,</div><div class='add'>+					act_tcam-&gt;value.tcam[0]);</div><div class='add'>+			ip_addr = &amp;fbd-&gt;ip_dst[idx];</div><div class='add'>+</div><div class='add'>+			fsp-&gt;h_u.usr_ip4_spec.ip4dst =</div><div class='add'>+				ip_addr-&gt;value.s6_addr32[3];</div><div class='add'>+			fsp-&gt;m_u.usr_ip4_spec.ip4dst =</div><div class='add'>+				~ip_addr-&gt;mask.s6_addr32[3];</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Record action */</div><div class='add'>+	if (act_tcam-&gt;dest &amp; FBNIC_RPC_ACT_TBL0_DROP)</div><div class='add'>+		fsp-&gt;ring_cookie = RX_CLS_FLOW_DISC;</div><div class='add'>+	else if (act_tcam-&gt;dest &amp; FBNIC_RPC_ACT_TBL0_Q_SEL)</div><div class='add'>+		fsp-&gt;ring_cookie = FIELD_GET(FBNIC_RPC_ACT_TBL0_Q_ID,</div><div class='add'>+					     act_tcam-&gt;dest);</div><div class='add'>+	else</div><div class='add'>+		fsp-&gt;flow_type |= FLOW_RSS;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;rss_context = FIELD_GET(FBNIC_RPC_ACT_TBL0_RSS_CTXT_ID,</div><div class='add'>+				     act_tcam-&gt;dest);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_get_rxnfc(struct net_device *netdev,</div><div class='add'>+			   struct ethtool_rxnfc *cmd, u32 *rule_locs)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	int ret = -EOPNOTSUPP;</div><div class='add'>+	u32 special = 0;</div><div class='add'>+</div><div class='add'>+	switch (cmd-&gt;cmd) {</div><div class='add'>+	case ETHTOOL_GRXRINGS:</div><div class='add'>+		cmd-&gt;data = fbn-&gt;num_rx_queues;</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRULE:</div><div class='add'>+		ret = fbnic_get_cls_rule(fbn, cmd);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRLCNT:</div><div class='add'>+		rule_locs = NULL;</div><div class='add'>+		special = RX_CLS_LOC_SPECIAL;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case ETHTOOL_GRXCLSRLALL:</div><div class='add'>+		ret = fbnic_get_cls_rule_all(fbn, cmd, rule_locs);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		cmd-&gt;data |= special;</div><div class='add'>+		cmd-&gt;rule_cnt = ret;</div><div class='add'>+		ret = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_cls_rule_any_loc(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = FBNIC_RPC_ACT_TBL_NFC_ENTRIES; i--;) {</div><div class='add'>+		int idx = i + FBNIC_RPC_ACT_TBL_NFC_OFFSET;</div><div class='add'>+</div><div class='add'>+		if (fbd-&gt;act_tcam[idx].state != FBNIC_TCAM_S_VALID)</div><div class='add'>+			return i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOSPC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_set_cls_rule_ins(struct fbnic_net *fbn,</div><div class='add'>+				  const struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	u16 flow_value = 0, flow_mask = 0xffff, ip_value = 0, ip_mask = 0xffff;</div><div class='add'>+	u16 sport = 0, sport_mask = ~0, dport = 0, dport_mask = ~0;</div><div class='add'>+	u16 misc = 0, misc_mask = ~0;</div><div class='add'>+	u32 dest = FIELD_PREP(FBNIC_RPC_ACT_TBL0_DEST_MASK,</div><div class='add'>+			      FBNIC_RPC_ACT_TBL0_DEST_HOST);</div><div class='add'>+	struct fbnic_ip_addr *ip_src = NULL, *ip_dst = NULL;</div><div class='add'>+	struct fbnic_mac_addr *mac_addr = NULL;</div><div class='add'>+	struct ethtool_rx_flow_spec *fsp;</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	struct fbnic_act_tcam *act_tcam;</div><div class='add'>+	struct in6_addr *addr6, *mask6;</div><div class='add'>+	struct in_addr *addr4, *mask4;</div><div class='add'>+	int hash_idx, location;</div><div class='add'>+	u32 flow_type;</div><div class='add'>+	int idx, j;</div><div class='add'>+</div><div class='add'>+	fsp = (struct ethtool_rx_flow_spec *)&amp;cmd-&gt;fs;</div><div class='add'>+</div><div class='add'>+	if (fsp-&gt;location != RX_CLS_LOC_ANY)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	location = fbnic_cls_rule_any_loc(fbd);</div><div class='add'>+	if (location &lt; 0)</div><div class='add'>+		return location;</div><div class='add'>+</div><div class='add'>+	if (fsp-&gt;ring_cookie == RX_CLS_FLOW_DISC) {</div><div class='add'>+		dest = FBNIC_RPC_ACT_TBL0_DROP;</div><div class='add'>+	} else if (fsp-&gt;flow_type &amp; FLOW_RSS) {</div><div class='add'>+		if (cmd-&gt;rss_context == 1)</div><div class='add'>+			dest |= FBNIC_RPC_ACT_TBL0_RSS_CTXT_ID;</div><div class='add'>+	} else {</div><div class='add'>+		u32 ring_idx = ethtool_get_flow_spec_ring(fsp-&gt;ring_cookie);</div><div class='add'>+</div><div class='add'>+		if (ring_idx &gt;= fbn-&gt;num_rx_queues)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		dest |= FBNIC_RPC_ACT_TBL0_Q_SEL |</div><div class='add'>+			FIELD_PREP(FBNIC_RPC_ACT_TBL0_Q_ID, ring_idx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idx = location + FBNIC_RPC_ACT_TBL_NFC_OFFSET;</div><div class='add'>+	act_tcam = &amp;fbd-&gt;act_tcam[idx];</div><div class='add'>+</div><div class='add'>+	/* Do not allow overwriting for now.</div><div class='add'>+	 * To support overwriting rules we will need to add logic to free</div><div class='add'>+	 * any IP or MACDA TCAMs that may be associated with the old rule.</div><div class='add'>+	 */</div><div class='add'>+	if (act_tcam-&gt;state != FBNIC_TCAM_S_DISABLED)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	flow_type = fsp-&gt;flow_type &amp; ~(FLOW_EXT | FLOW_RSS);</div><div class='add'>+	hash_idx = fbnic_get_rss_hash_idx(flow_type);</div><div class='add'>+</div><div class='add'>+	switch (flow_type) {</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+udp4_flow:</div><div class='add'>+		flow_value |= FBNIC_RPC_TCAM_ACT1_L4_IS_UDP;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+tcp4_flow:</div><div class='add'>+		flow_value |= FBNIC_RPC_TCAM_ACT1_L4_VALID;</div><div class='add'>+		flow_mask &amp;= ~(FBNIC_RPC_TCAM_ACT1_L4_IS_UDP |</div><div class='add'>+			       FBNIC_RPC_TCAM_ACT1_L4_VALID);</div><div class='add'>+</div><div class='add'>+		sport = be16_to_cpu(fsp-&gt;h_u.tcp_ip4_spec.psrc);</div><div class='add'>+		sport_mask = ~be16_to_cpu(fsp-&gt;m_u.tcp_ip4_spec.psrc);</div><div class='add'>+		dport = be16_to_cpu(fsp-&gt;h_u.tcp_ip4_spec.pdst);</div><div class='add'>+		dport_mask = ~be16_to_cpu(fsp-&gt;m_u.tcp_ip4_spec.pdst);</div><div class='add'>+		goto ip4_flow;</div><div class='add'>+	case IP_USER_FLOW:</div><div class='add'>+		if (!fsp-&gt;m_u.usr_ip4_spec.proto)</div><div class='add'>+			goto ip4_flow;</div><div class='add'>+		if (fsp-&gt;m_u.usr_ip4_spec.proto != 0xff)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		if (fsp-&gt;h_u.usr_ip4_spec.proto == IPPROTO_UDP)</div><div class='add'>+			goto udp4_flow;</div><div class='add'>+		if (fsp-&gt;h_u.usr_ip4_spec.proto == IPPROTO_TCP)</div><div class='add'>+			goto tcp4_flow;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+ip4_flow:</div><div class='add'>+		addr4 = (struct in_addr *)&amp;fsp-&gt;h_u.usr_ip4_spec.ip4src;</div><div class='add'>+		mask4 = (struct in_addr *)&amp;fsp-&gt;m_u.usr_ip4_spec.ip4src;</div><div class='add'>+		if (mask4-&gt;s_addr) {</div><div class='add'>+			ip_src = __fbnic_ip4_sync(fbd, fbd-&gt;ip_src,</div><div class='add'>+						  addr4, mask4);</div><div class='add'>+			if (!ip_src)</div><div class='add'>+				return -ENOSPC;</div><div class='add'>+</div><div class='add'>+			set_bit(idx, ip_src-&gt;act_tcam);</div><div class='add'>+			ip_value |= FBNIC_RPC_TCAM_ACT0_IPSRC_VALID |</div><div class='add'>+				    FIELD_PREP(FBNIC_RPC_TCAM_ACT0_IPSRC_IDX,</div><div class='add'>+					       ip_src - fbd-&gt;ip_src);</div><div class='add'>+			ip_mask &amp;= ~(FBNIC_RPC_TCAM_ACT0_IPSRC_VALID |</div><div class='add'>+				     FBNIC_RPC_TCAM_ACT0_IPSRC_IDX);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		addr4 = (struct in_addr *)&amp;fsp-&gt;h_u.usr_ip4_spec.ip4dst;</div><div class='add'>+		mask4 = (struct in_addr *)&amp;fsp-&gt;m_u.usr_ip4_spec.ip4dst;</div><div class='add'>+		if (mask4-&gt;s_addr) {</div><div class='add'>+			ip_dst = __fbnic_ip4_sync(fbd, fbd-&gt;ip_dst,</div><div class='add'>+						  addr4, mask4);</div><div class='add'>+			if (!ip_dst) {</div><div class='add'>+				if (ip_src &amp;&amp; ip_src-&gt;state == FBNIC_TCAM_S_ADD)</div><div class='add'>+					memset(ip_src, 0, sizeof(*ip_src));</div><div class='add'>+				return -ENOSPC;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			set_bit(idx, ip_dst-&gt;act_tcam);</div><div class='add'>+			ip_value |= FBNIC_RPC_TCAM_ACT0_IPDST_VALID |</div><div class='add'>+				    FIELD_PREP(FBNIC_RPC_TCAM_ACT0_IPDST_IDX,</div><div class='add'>+					       ip_dst - fbd-&gt;ip_dst);</div><div class='add'>+			ip_mask &amp;= ~(FBNIC_RPC_TCAM_ACT0_IPDST_VALID |</div><div class='add'>+				     FBNIC_RPC_TCAM_ACT0_IPDST_IDX);</div><div class='add'>+		}</div><div class='add'>+		flow_value |= FBNIC_RPC_TCAM_ACT1_IP_VALID |</div><div class='add'>+			      FBNIC_RPC_TCAM_ACT1_L2_MACDA_VALID;</div><div class='add'>+		flow_mask &amp;= ~(FBNIC_RPC_TCAM_ACT1_IP_IS_V6 |</div><div class='add'>+			       FBNIC_RPC_TCAM_ACT1_IP_VALID |</div><div class='add'>+			       FBNIC_RPC_TCAM_ACT1_L2_MACDA_VALID);</div><div class='add'>+		break;</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+udp6_flow:</div><div class='add'>+		flow_value |= FBNIC_RPC_TCAM_ACT1_L4_IS_UDP;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+tcp6_flow:</div><div class='add'>+		flow_value |= FBNIC_RPC_TCAM_ACT1_L4_VALID;</div><div class='add'>+		flow_mask &amp;= ~(FBNIC_RPC_TCAM_ACT1_L4_IS_UDP |</div><div class='add'>+			  FBNIC_RPC_TCAM_ACT1_L4_VALID);</div><div class='add'>+</div><div class='add'>+		sport = be16_to_cpu(fsp-&gt;h_u.tcp_ip6_spec.psrc);</div><div class='add'>+		sport_mask = ~be16_to_cpu(fsp-&gt;m_u.tcp_ip6_spec.psrc);</div><div class='add'>+		dport = be16_to_cpu(fsp-&gt;h_u.tcp_ip6_spec.pdst);</div><div class='add'>+		dport_mask = ~be16_to_cpu(fsp-&gt;m_u.tcp_ip6_spec.pdst);</div><div class='add'>+		goto ipv6_flow;</div><div class='add'>+	case IPV6_USER_FLOW:</div><div class='add'>+		if (!fsp-&gt;m_u.usr_ip6_spec.l4_proto)</div><div class='add'>+			goto ipv6_flow;</div><div class='add'>+</div><div class='add'>+		if (fsp-&gt;m_u.usr_ip6_spec.l4_proto != 0xff)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		if (fsp-&gt;h_u.usr_ip6_spec.l4_proto == IPPROTO_UDP)</div><div class='add'>+			goto udp6_flow;</div><div class='add'>+		if (fsp-&gt;h_u.usr_ip6_spec.l4_proto == IPPROTO_TCP)</div><div class='add'>+			goto tcp6_flow;</div><div class='add'>+		if (fsp-&gt;h_u.usr_ip6_spec.l4_proto != IPPROTO_IPV6)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		addr6 = (struct in6_addr *)fsp-&gt;h_u.usr_ip6_spec.ip6src;</div><div class='add'>+		mask6 = (struct in6_addr *)fsp-&gt;m_u.usr_ip6_spec.ip6src;</div><div class='add'>+		if (!ipv6_addr_any(mask6)) {</div><div class='add'>+			ip_src = __fbnic_ip6_sync(fbd, fbd-&gt;ipo_src,</div><div class='add'>+						  addr6, mask6);</div><div class='add'>+			if (!ip_src)</div><div class='add'>+				return -ENOSPC;</div><div class='add'>+</div><div class='add'>+			set_bit(idx, ip_src-&gt;act_tcam);</div><div class='add'>+			ip_value |=</div><div class='add'>+				FBNIC_RPC_TCAM_ACT0_OUTER_IPSRC_VALID |</div><div class='add'>+				FIELD_PREP(FBNIC_RPC_TCAM_ACT0_OUTER_IPSRC_IDX,</div><div class='add'>+					   ip_src - fbd-&gt;ipo_src);</div><div class='add'>+			ip_mask &amp;=</div><div class='add'>+				~(FBNIC_RPC_TCAM_ACT0_OUTER_IPSRC_VALID |</div><div class='add'>+				  FBNIC_RPC_TCAM_ACT0_OUTER_IPSRC_IDX);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		addr6 = (struct in6_addr *)fsp-&gt;h_u.usr_ip6_spec.ip6dst;</div><div class='add'>+		mask6 = (struct in6_addr *)fsp-&gt;m_u.usr_ip6_spec.ip6dst;</div><div class='add'>+		if (!ipv6_addr_any(mask6)) {</div><div class='add'>+			ip_dst = __fbnic_ip6_sync(fbd, fbd-&gt;ipo_dst,</div><div class='add'>+						  addr6, mask6);</div><div class='add'>+			if (!ip_dst) {</div><div class='add'>+				if (ip_src &amp;&amp; ip_src-&gt;state == FBNIC_TCAM_S_ADD)</div><div class='add'>+					memset(ip_src, 0, sizeof(*ip_src));</div><div class='add'>+				return -ENOSPC;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			set_bit(idx, ip_dst-&gt;act_tcam);</div><div class='add'>+			ip_value |=</div><div class='add'>+				FBNIC_RPC_TCAM_ACT0_OUTER_IPDST_VALID |</div><div class='add'>+				FIELD_PREP(FBNIC_RPC_TCAM_ACT0_OUTER_IPDST_IDX,</div><div class='add'>+					   ip_dst - fbd-&gt;ipo_dst);</div><div class='add'>+			ip_mask &amp;= ~(FBNIC_RPC_TCAM_ACT0_OUTER_IPDST_VALID |</div><div class='add'>+				     FBNIC_RPC_TCAM_ACT0_OUTER_IPDST_IDX);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		flow_value |= FBNIC_RPC_TCAM_ACT1_OUTER_IP_VALID;</div><div class='add'>+		flow_mask &amp;= FBNIC_RPC_TCAM_ACT1_OUTER_IP_VALID;</div><div class='add'>+ipv6_flow:</div><div class='add'>+		addr6 = (struct in6_addr *)fsp-&gt;h_u.usr_ip6_spec.ip6src;</div><div class='add'>+		mask6 = (struct in6_addr *)fsp-&gt;m_u.usr_ip6_spec.ip6src;</div><div class='add'>+		if (!ip_src &amp;&amp; !ipv6_addr_any(mask6)) {</div><div class='add'>+			ip_src = __fbnic_ip6_sync(fbd, fbd-&gt;ip_src,</div><div class='add'>+						  addr6, mask6);</div><div class='add'>+			if (!ip_src)</div><div class='add'>+				return -ENOSPC;</div><div class='add'>+</div><div class='add'>+			set_bit(idx, ip_src-&gt;act_tcam);</div><div class='add'>+			ip_value |= FBNIC_RPC_TCAM_ACT0_IPSRC_VALID |</div><div class='add'>+				    FIELD_PREP(FBNIC_RPC_TCAM_ACT0_IPSRC_IDX,</div><div class='add'>+					       ip_src - fbd-&gt;ip_src);</div><div class='add'>+			ip_mask &amp;= ~(FBNIC_RPC_TCAM_ACT0_IPSRC_VALID |</div><div class='add'>+				       FBNIC_RPC_TCAM_ACT0_IPSRC_IDX);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		addr6 = (struct in6_addr *)fsp-&gt;h_u.usr_ip6_spec.ip6dst;</div><div class='add'>+		mask6 = (struct in6_addr *)fsp-&gt;m_u.usr_ip6_spec.ip6dst;</div><div class='add'>+		if (!ip_dst &amp;&amp; !ipv6_addr_any(mask6)) {</div><div class='add'>+			ip_dst = __fbnic_ip6_sync(fbd, fbd-&gt;ip_dst,</div><div class='add'>+						  addr6, mask6);</div><div class='add'>+			if (!ip_dst) {</div><div class='add'>+				if (ip_src &amp;&amp; ip_src-&gt;state == FBNIC_TCAM_S_ADD)</div><div class='add'>+					memset(ip_src, 0, sizeof(*ip_src));</div><div class='add'>+				return -ENOSPC;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			set_bit(idx, ip_dst-&gt;act_tcam);</div><div class='add'>+			ip_value |= FBNIC_RPC_TCAM_ACT0_IPDST_VALID |</div><div class='add'>+				    FIELD_PREP(FBNIC_RPC_TCAM_ACT0_IPDST_IDX,</div><div class='add'>+					       ip_dst - fbd-&gt;ip_dst);</div><div class='add'>+			ip_mask &amp;= ~(FBNIC_RPC_TCAM_ACT0_IPDST_VALID |</div><div class='add'>+				       FBNIC_RPC_TCAM_ACT0_IPDST_IDX);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		flow_value |= FBNIC_RPC_TCAM_ACT1_IP_IS_V6 |</div><div class='add'>+			      FBNIC_RPC_TCAM_ACT1_IP_VALID |</div><div class='add'>+			      FBNIC_RPC_TCAM_ACT1_L2_MACDA_VALID;</div><div class='add'>+		flow_mask &amp;= ~(FBNIC_RPC_TCAM_ACT1_IP_IS_V6 |</div><div class='add'>+			       FBNIC_RPC_TCAM_ACT1_IP_VALID |</div><div class='add'>+			       FBNIC_RPC_TCAM_ACT1_L2_MACDA_VALID);</div><div class='add'>+		break;</div><div class='add'>+	case ETHER_FLOW:</div><div class='add'>+		if (!is_zero_ether_addr(fsp-&gt;m_u.ether_spec.h_dest)) {</div><div class='add'>+			u8 *addr = fsp-&gt;h_u.ether_spec.h_dest;</div><div class='add'>+			u8 *mask = fsp-&gt;m_u.ether_spec.h_dest;</div><div class='add'>+</div><div class='add'>+			/* Do not allow MAC addr of 0 */</div><div class='add'>+			if (is_zero_ether_addr(addr))</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			/* Only support full MAC address to avoid</div><div class='add'>+			 * conflicts with other MAC addresses.</div><div class='add'>+			 */</div><div class='add'>+			if (!is_broadcast_ether_addr(mask))</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			if (is_multicast_ether_addr(addr))</div><div class='add'>+				mac_addr = __fbnic_mc_sync(fbd, addr);</div><div class='add'>+			else</div><div class='add'>+				mac_addr = __fbnic_uc_sync(fbd, addr);</div><div class='add'>+</div><div class='add'>+			if (!mac_addr)</div><div class='add'>+				return -ENOSPC;</div><div class='add'>+</div><div class='add'>+			set_bit(idx, mac_addr-&gt;act_tcam);</div><div class='add'>+			flow_value |=</div><div class='add'>+				FIELD_PREP(FBNIC_RPC_TCAM_ACT1_L2_MACDA_IDX,</div><div class='add'>+					   mac_addr - fbd-&gt;mac_addr);</div><div class='add'>+			flow_mask &amp;= ~FBNIC_RPC_TCAM_ACT1_L2_MACDA_IDX;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		flow_value |= FBNIC_RPC_TCAM_ACT1_L2_MACDA_VALID;</div><div class='add'>+		flow_mask &amp;= ~FBNIC_RPC_TCAM_ACT1_L2_MACDA_VALID;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write action table values */</div><div class='add'>+	act_tcam-&gt;dest = dest;</div><div class='add'>+	act_tcam-&gt;rss_en_mask = fbnic_flow_hash_2_rss_en_mask(fbn, hash_idx);</div><div class='add'>+</div><div class='add'>+	/* Write IP Match value/mask to action_tcam[0] */</div><div class='add'>+	act_tcam-&gt;value.tcam[0] = ip_value;</div><div class='add'>+	act_tcam-&gt;mask.tcam[0] = ip_mask;</div><div class='add'>+</div><div class='add'>+	/* Write flow type value/mask to action_tcam[1] */</div><div class='add'>+	act_tcam-&gt;value.tcam[1] = flow_value;</div><div class='add'>+	act_tcam-&gt;mask.tcam[1] = flow_mask;</div><div class='add'>+</div><div class='add'>+	/* Write error, DSCP, extra L4 matches to action_tcam[2] */</div><div class='add'>+	act_tcam-&gt;value.tcam[2] = misc;</div><div class='add'>+	act_tcam-&gt;mask.tcam[2] = misc_mask;</div><div class='add'>+</div><div class='add'>+	/* Write source/destination port values */</div><div class='add'>+	act_tcam-&gt;value.tcam[3] = sport;</div><div class='add'>+	act_tcam-&gt;mask.tcam[3] = sport_mask;</div><div class='add'>+	act_tcam-&gt;value.tcam[4] = dport;</div><div class='add'>+	act_tcam-&gt;mask.tcam[4] = dport_mask;</div><div class='add'>+</div><div class='add'>+	for (j = 5; j &lt; FBNIC_RPC_TCAM_ACT_WORD_LEN; j++)</div><div class='add'>+		act_tcam-&gt;mask.tcam[j] = 0xffff;</div><div class='add'>+</div><div class='add'>+	act_tcam-&gt;state = FBNIC_TCAM_S_UPDATE;</div><div class='add'>+	fsp-&gt;location = location;</div><div class='add'>+</div><div class='add'>+	if (netif_running(fbn-&gt;netdev)) {</div><div class='add'>+		fbnic_write_rules(fbd);</div><div class='add'>+		if (ip_src || ip_dst)</div><div class='add'>+			fbnic_write_ip_addr(fbd);</div><div class='add'>+		if (mac_addr)</div><div class='add'>+			fbnic_write_macda(fbd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clear_nfc_macda(struct fbnic_net *fbn,</div><div class='add'>+				  unsigned int tcam_idx)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	for (idx = ARRAY_SIZE(fbd-&gt;mac_addr); idx--;)</div><div class='add'>+		__fbnic_xc_unsync(&amp;fbd-&gt;mac_addr[idx], tcam_idx);</div><div class='add'>+</div><div class='add'>+	/* Write updates to hardware */</div><div class='add'>+	if (netif_running(fbn-&gt;netdev))</div><div class='add'>+		fbnic_write_macda(fbd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clear_nfc_ip_addr(struct fbnic_net *fbn,</div><div class='add'>+				    unsigned int tcam_idx)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	for (idx = ARRAY_SIZE(fbd-&gt;ip_src); idx--;)</div><div class='add'>+		__fbnic_ip_unsync(&amp;fbd-&gt;ip_src[idx], tcam_idx);</div><div class='add'>+	for (idx = ARRAY_SIZE(fbd-&gt;ip_dst); idx--;)</div><div class='add'>+		__fbnic_ip_unsync(&amp;fbd-&gt;ip_dst[idx], tcam_idx);</div><div class='add'>+	for (idx = ARRAY_SIZE(fbd-&gt;ipo_src); idx--;)</div><div class='add'>+		__fbnic_ip_unsync(&amp;fbd-&gt;ipo_src[idx], tcam_idx);</div><div class='add'>+	for (idx = ARRAY_SIZE(fbd-&gt;ipo_dst); idx--;)</div><div class='add'>+		__fbnic_ip_unsync(&amp;fbd-&gt;ipo_dst[idx], tcam_idx);</div><div class='add'>+</div><div class='add'>+	/* Write updates to hardware */</div><div class='add'>+	if (netif_running(fbn-&gt;netdev))</div><div class='add'>+		fbnic_write_ip_addr(fbd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_set_cls_rule_del(struct fbnic_net *fbn,</div><div class='add'>+				  const struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_rx_flow_spec *fsp;</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	struct fbnic_act_tcam *act_tcam;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	fsp = (struct ethtool_rx_flow_spec *)&amp;cmd-&gt;fs;</div><div class='add'>+</div><div class='add'>+	if (fsp-&gt;location &gt;= FBNIC_RPC_ACT_TBL_NFC_ENTRIES)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	idx = fsp-&gt;location + FBNIC_RPC_ACT_TBL_NFC_OFFSET;</div><div class='add'>+	act_tcam = &amp;fbd-&gt;act_tcam[idx];</div><div class='add'>+</div><div class='add'>+	if (act_tcam-&gt;state != FBNIC_TCAM_S_VALID)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	act_tcam-&gt;state = FBNIC_TCAM_S_DELETE;</div><div class='add'>+</div><div class='add'>+	if ((act_tcam-&gt;value.tcam[1] &amp; FBNIC_RPC_TCAM_ACT1_L2_MACDA_VALID) &amp;&amp;</div><div class='add'>+	    (~act_tcam-&gt;mask.tcam[1] &amp; FBNIC_RPC_TCAM_ACT1_L2_MACDA_IDX))</div><div class='add'>+		fbnic_clear_nfc_macda(fbn, idx);</div><div class='add'>+</div><div class='add'>+	if ((act_tcam-&gt;value.tcam[0] &amp;</div><div class='add'>+	     (FBNIC_RPC_TCAM_ACT0_IPSRC_VALID |</div><div class='add'>+	      FBNIC_RPC_TCAM_ACT0_IPDST_VALID |</div><div class='add'>+	      FBNIC_RPC_TCAM_ACT0_OUTER_IPSRC_VALID |</div><div class='add'>+	      FBNIC_RPC_TCAM_ACT0_OUTER_IPDST_VALID)) &amp;&amp;</div><div class='add'>+	    (~act_tcam-&gt;mask.tcam[0] &amp;</div><div class='add'>+	     (FBNIC_RPC_TCAM_ACT0_IPSRC_IDX |</div><div class='add'>+	      FBNIC_RPC_TCAM_ACT0_IPDST_IDX |</div><div class='add'>+	      FBNIC_RPC_TCAM_ACT0_OUTER_IPSRC_IDX |</div><div class='add'>+	      FBNIC_RPC_TCAM_ACT0_OUTER_IPDST_IDX)))</div><div class='add'>+		fbnic_clear_nfc_ip_addr(fbn, idx);</div><div class='add'>+</div><div class='add'>+	if (netif_running(fbn-&gt;netdev))</div><div class='add'>+		fbnic_write_rules(fbd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	int ret = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (cmd-&gt;cmd) {</div><div class='add'>+	case ETHTOOL_SRXCLSRLINS:</div><div class='add'>+		ret = fbnic_set_cls_rule_ins(fbn, cmd);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_SRXCLSRLDEL:</div><div class='add'>+		ret = fbnic_set_cls_rule_del(fbn, cmd);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 fbnic_get_rxfh_key_size(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return FBNIC_RPC_RSS_KEY_BYTE_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 fbnic_get_rxfh_indir_size(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return FBNIC_RPC_RSS_TBL_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_get_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;key) {</div><div class='add'>+		for (i = 0; i &lt; FBNIC_RPC_RSS_KEY_BYTE_LEN; i++) {</div><div class='add'>+			u32 rss_key = fbn-&gt;rss_key[i / 4] &lt;&lt; ((i % 4) * 8);</div><div class='add'>+</div><div class='add'>+			rxfh-&gt;key[i] = rss_key &gt;&gt; 24;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;indir) {</div><div class='add'>+		for (i = 0; i &lt; FBNIC_RPC_RSS_TBL_SIZE; i++)</div><div class='add'>+			rxfh-&gt;indir[i] = fbn-&gt;indir_tbl[0][i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int</div><div class='add'>+fbnic_set_indir(struct fbnic_net *fbn, unsigned int idx, const u32 *indir)</div><div class='add'>+{</div><div class='add'>+	unsigned int i, changes = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_RSS_TBL_SIZE; i++) {</div><div class='add'>+		if (fbn-&gt;indir_tbl[idx][i] == indir[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		fbn-&gt;indir_tbl[idx][i] = indir[i];</div><div class='add'>+		changes++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return changes;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_set_rxfh(struct net_device *netdev, struct ethtool_rxfh_param *rxfh,</div><div class='add'>+	       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	unsigned int i, changes = 0;</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;hfunc != ETH_RSS_HASH_NO_CHANGE &amp;&amp;</div><div class='add'>+	    rxfh-&gt;hfunc != ETH_RSS_HASH_TOP)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;key) {</div><div class='add'>+		u32 rss_key = 0;</div><div class='add'>+</div><div class='add'>+		for (i = FBNIC_RPC_RSS_KEY_BYTE_LEN; i--;) {</div><div class='add'>+			rss_key &gt;&gt;= 8;</div><div class='add'>+			rss_key |= (u32)(rxfh-&gt;key[i]) &lt;&lt; 24;</div><div class='add'>+</div><div class='add'>+			if (i % 4)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (fbn-&gt;rss_key[i / 4] == rss_key)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			fbn-&gt;rss_key[i / 4] = rss_key;</div><div class='add'>+			changes++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;indir)</div><div class='add'>+		changes += fbnic_set_indir(fbn, 0, rxfh-&gt;indir);</div><div class='add'>+</div><div class='add'>+	if (changes &amp;&amp; netif_running(netdev))</div><div class='add'>+		fbnic_rss_reinit_hw(fbn-&gt;fbd, fbn);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_get_rss_hash_opts(struct net_device *netdev,</div><div class='add'>+			struct ethtool_rxfh_fields *cmd)</div><div class='add'>+{</div><div class='add'>+	int hash_opt_idx = fbnic_get_rss_hash_idx(cmd-&gt;flow_type);</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (hash_opt_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Report options from rss_en table in fbn */</div><div class='add'>+	cmd-&gt;data = fbn-&gt;rss_flow_hash[hash_opt_idx];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define FBNIC_L2_HASH_OPTIONS \</div><div class='add'>+	(RXH_L2DA | RXH_DISCARD)</div><div class='add'>+#define FBNIC_L3_HASH_OPTIONS \</div><div class='add'>+	(FBNIC_L2_HASH_OPTIONS | RXH_IP_SRC | RXH_IP_DST | RXH_IP6_FL)</div><div class='add'>+#define FBNIC_L4_HASH_OPTIONS \</div><div class='add'>+	(FBNIC_L3_HASH_OPTIONS | RXH_L4_B_0_1 | RXH_L4_B_2_3)</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_set_rss_hash_opts(struct net_device *netdev,</div><div class='add'>+			const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	int hash_opt_idx;</div><div class='add'>+</div><div class='add'>+	/* Verify the type requested is correct */</div><div class='add'>+	hash_opt_idx = fbnic_get_rss_hash_idx(cmd-&gt;flow_type);</div><div class='add'>+	if (hash_opt_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Verify the fields asked for can actually be assigned based on type */</div><div class='add'>+	if (cmd-&gt;data &amp; ~FBNIC_L4_HASH_OPTIONS ||</div><div class='add'>+	    (hash_opt_idx &gt; FBNIC_L4_HASH_OPT &amp;&amp;</div><div class='add'>+	     cmd-&gt;data &amp; ~FBNIC_L3_HASH_OPTIONS) ||</div><div class='add'>+	    (hash_opt_idx &gt; FBNIC_IP_HASH_OPT &amp;&amp;</div><div class='add'>+	     cmd-&gt;data &amp; ~FBNIC_L2_HASH_OPTIONS))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	fbn-&gt;rss_flow_hash[hash_opt_idx] = cmd-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (netif_running(fbn-&gt;netdev)) {</div><div class='add'>+		fbnic_rss_reinit(fbn-&gt;fbd, fbn);</div><div class='add'>+		fbnic_write_rules(fbn-&gt;fbd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_modify_rxfh_context(struct net_device *netdev,</div><div class='add'>+			  struct ethtool_rxfh_context *ctx,</div><div class='add'>+			  const struct ethtool_rxfh_param *rxfh,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	const u32 *indir = rxfh-&gt;indir;</div><div class='add'>+	unsigned int changes;</div><div class='add'>+</div><div class='add'>+	if (!indir)</div><div class='add'>+		indir = ethtool_rxfh_context_indir(ctx);</div><div class='add'>+</div><div class='add'>+	changes = fbnic_set_indir(fbn, rxfh-&gt;rss_context, indir);</div><div class='add'>+	if (changes &amp;&amp; netif_running(netdev))</div><div class='add'>+		fbnic_rss_reinit_hw(fbn-&gt;fbd, fbn);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_create_rxfh_context(struct net_device *netdev,</div><div class='add'>+			  struct ethtool_rxfh_context *ctx,</div><div class='add'>+			  const struct ethtool_rxfh_param *rxfh,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;hfunc &amp;&amp; rxfh-&gt;hfunc != ETH_RSS_HASH_TOP) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "RSS hash function not supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+	ctx-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='add'>+</div><div class='add'>+	if (!rxfh-&gt;indir) {</div><div class='add'>+		u32 *indir = ethtool_rxfh_context_indir(ctx);</div><div class='add'>+		unsigned int num_rx = fbn-&gt;num_rx_queues;</div><div class='add'>+		unsigned int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; FBNIC_RPC_RSS_TBL_SIZE; i++)</div><div class='add'>+			indir[i] = ethtool_rxfh_indir_default(i, num_rx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return fbnic_modify_rxfh_context(netdev, ctx, rxfh, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_remove_rxfh_context(struct net_device *netdev,</div><div class='add'>+			  struct ethtool_rxfh_context *ctx, u32 rss_context,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	/* Nothing to do, contexts are allocated statically */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_channels(struct net_device *netdev,</div><div class='add'>+			       struct ethtool_channels *ch)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+</div><div class='add'>+	ch-&gt;max_rx = fbd-&gt;max_num_queues;</div><div class='add'>+	ch-&gt;max_tx = fbd-&gt;max_num_queues;</div><div class='add'>+	ch-&gt;max_combined = min(ch-&gt;max_rx, ch-&gt;max_tx);</div><div class='add'>+	ch-&gt;max_other =	FBNIC_NON_NAPI_VECTORS;</div><div class='add'>+</div><div class='add'>+	if (fbn-&gt;num_rx_queues &gt; fbn-&gt;num_napi ||</div><div class='add'>+	    fbn-&gt;num_tx_queues &gt; fbn-&gt;num_napi)</div><div class='add'>+		ch-&gt;combined_count = min(fbn-&gt;num_rx_queues,</div><div class='add'>+					 fbn-&gt;num_tx_queues);</div><div class='add'>+	else</div><div class='add'>+		ch-&gt;combined_count =</div><div class='add'>+			fbn-&gt;num_rx_queues + fbn-&gt;num_tx_queues - fbn-&gt;num_napi;</div><div class='add'>+	ch-&gt;rx_count = fbn-&gt;num_rx_queues - ch-&gt;combined_count;</div><div class='add'>+	ch-&gt;tx_count = fbn-&gt;num_tx_queues - ch-&gt;combined_count;</div><div class='add'>+	ch-&gt;other_count = FBNIC_NON_NAPI_VECTORS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_set_queues(struct fbnic_net *fbn, struct ethtool_channels *ch,</div><div class='add'>+			     unsigned int max_napis)</div><div class='add'>+{</div><div class='add'>+	fbn-&gt;num_rx_queues = ch-&gt;rx_count + ch-&gt;combined_count;</div><div class='add'>+	fbn-&gt;num_tx_queues = ch-&gt;tx_count + ch-&gt;combined_count;</div><div class='add'>+	fbn-&gt;num_napi = min(ch-&gt;rx_count + ch-&gt;tx_count + ch-&gt;combined_count,</div><div class='add'>+			    max_napis);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_set_channels(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_channels *ch)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	unsigned int max_napis, standalone;</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	struct fbnic_net *clone;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	max_napis = fbd-&gt;num_irqs - FBNIC_NON_NAPI_VECTORS;</div><div class='add'>+	standalone = ch-&gt;rx_count + ch-&gt;tx_count;</div><div class='add'>+</div><div class='add'>+	/* Limits for standalone queues:</div><div class='add'>+	 *  - each queue has its own NAPI (num_napi &gt;= rx + tx + combined)</div><div class='add'>+	 *  - combining queues (combined not 0, rx or tx must be 0)</div><div class='add'>+	 */</div><div class='add'>+	if ((ch-&gt;rx_count &amp;&amp; ch-&gt;tx_count &amp;&amp; ch-&gt;combined_count) ||</div><div class='add'>+	    (standalone &amp;&amp; standalone + ch-&gt;combined_count &gt; max_napis) ||</div><div class='add'>+	    ch-&gt;rx_count + ch-&gt;combined_count &gt; fbd-&gt;max_num_queues ||</div><div class='add'>+	    ch-&gt;tx_count + ch-&gt;combined_count &gt; fbd-&gt;max_num_queues ||</div><div class='add'>+	    ch-&gt;other_count != FBNIC_NON_NAPI_VECTORS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev)) {</div><div class='add'>+		fbnic_set_queues(fbn, ch, max_napis);</div><div class='add'>+		fbnic_reset_indir_tbl(fbn);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clone = fbnic_clone_create(fbn);</div><div class='add'>+	if (!clone)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	fbnic_set_queues(clone, ch, max_napis);</div><div class='add'>+</div><div class='add'>+	err = fbnic_alloc_napi_vectors(clone);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_clone;</div><div class='add'>+</div><div class='add'>+	err = fbnic_alloc_resources(clone);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_napis;</div><div class='add'>+</div><div class='add'>+	fbnic_down_noidle(fbn);</div><div class='add'>+	err = fbnic_wait_all_queues_idle(fbn-&gt;fbd, true);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_start_stack;</div><div class='add'>+</div><div class='add'>+	err = fbnic_set_netif_queues(clone);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_start_stack;</div><div class='add'>+</div><div class='add'>+	/* Nothing can fail past this point */</div><div class='add'>+	fbnic_flush(fbn);</div><div class='add'>+</div><div class='add'>+	fbnic_clone_swap(fbn, clone);</div><div class='add'>+</div><div class='add'>+	/* Reset RSS indirection table */</div><div class='add'>+	fbnic_reset_indir_tbl(fbn);</div><div class='add'>+</div><div class='add'>+	fbnic_up(fbn);</div><div class='add'>+</div><div class='add'>+	fbnic_free_resources(clone);</div><div class='add'>+	fbnic_free_napi_vectors(clone);</div><div class='add'>+	fbnic_clone_free(clone);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_start_stack:</div><div class='add'>+	fbnic_flush(fbn);</div><div class='add'>+	fbnic_up(fbn);</div><div class='add'>+	fbnic_free_resources(clone);</div><div class='add'>+err_free_napis:</div><div class='add'>+	fbnic_free_napi_vectors(clone);</div><div class='add'>+err_free_clone:</div><div class='add'>+	fbnic_clone_free(clone);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> fbnic_get_ts_info(struct net_device *netdev,</div><div class='ctx'> 		  struct kernel_ethtool_ts_info *tsinfo)</div><div class='hunk'>@@ -35,14 +1612,86 @@ fbnic_get_ts_info(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-fbnic_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)</div><div class='add'>+static void fbnic_get_ts_stats(struct net_device *netdev,</div><div class='add'>+			       struct ethtool_ts_stats *ts_stats)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	u64 ts_packets, ts_lost;</div><div class='add'>+	struct fbnic_ring *ring;</div><div class='add'>+	unsigned int start;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ts_stats-&gt;pkts = fbn-&gt;tx_stats.twq.ts_packets;</div><div class='add'>+	ts_stats-&gt;lost = fbn-&gt;tx_stats.twq.ts_lost;</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_tx_queues; i++) {</div><div class='add'>+		ring = fbn-&gt;tx[i];</div><div class='add'>+		do {</div><div class='add'>+			start = u64_stats_fetch_begin(&amp;ring-&gt;stats.syncp);</div><div class='add'>+			ts_packets = ring-&gt;stats.twq.ts_packets;</div><div class='add'>+			ts_lost = ring-&gt;stats.twq.ts_lost;</div><div class='add'>+		} while (u64_stats_fetch_retry(&amp;ring-&gt;stats.syncp, start));</div><div class='add'>+		ts_stats-&gt;pkts += ts_packets;</div><div class='add'>+		ts_stats-&gt;lost += ts_lost;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_get_module_eeprom_by_page(struct net_device *netdev,</div><div class='add'>+				const struct ethtool_module_eeprom *page_data,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_fw_completion *fw_cmpl;</div><div class='ctx'> 	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	fbnic_get_fw_ver_commit_str(fbd, drvinfo-&gt;fw_version,</div><div class='del'>-				    sizeof(drvinfo-&gt;fw_version));</div><div class='add'>+	if (page_data-&gt;i2c_address != 0x50) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Invalid i2c address. Only 0x50 is supported");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fw_cmpl = __fbnic_fw_alloc_cmpl(FBNIC_TLV_MSG_ID_QSFP_READ_RESP,</div><div class='add'>+					page_data-&gt;length);</div><div class='add'>+	if (!fw_cmpl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Initialize completion and queue it for FW to process */</div><div class='add'>+	fw_cmpl-&gt;u.qsfp.length = page_data-&gt;length;</div><div class='add'>+	fw_cmpl-&gt;u.qsfp.offset = page_data-&gt;offset;</div><div class='add'>+	fw_cmpl-&gt;u.qsfp.page = page_data-&gt;page;</div><div class='add'>+	fw_cmpl-&gt;u.qsfp.bank = page_data-&gt;bank;</div><div class='add'>+</div><div class='add'>+	err = fbnic_fw_xmit_qsfp_read_msg(fbd, fw_cmpl, page_data-&gt;page,</div><div class='add'>+					  page_data-&gt;bank, page_data-&gt;offset,</div><div class='add'>+					  page_data-&gt;length);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Failed to transmit EEPROM read request");</div><div class='add'>+		goto exit_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;fw_cmpl-&gt;done, 2 * HZ)) {</div><div class='add'>+		err = -ETIMEDOUT;</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Timed out waiting for firmware response");</div><div class='add'>+		goto exit_cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fw_cmpl-&gt;result) {</div><div class='add'>+		err = fw_cmpl-&gt;result;</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to read EEPROM");</div><div class='add'>+		goto exit_cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(page_data-&gt;data, fw_cmpl-&gt;u.qsfp.data, page_data-&gt;length);</div><div class='add'>+</div><div class='add'>+exit_cleanup:</div><div class='add'>+	fbnic_mbx_clear_cmpl(fbd, fw_cmpl);</div><div class='add'>+exit_free:</div><div class='add'>+	fbnic_fw_put_cmpl(fw_cmpl);</div><div class='add'>+</div><div class='add'>+	return err ? : page_data-&gt;length;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_set_counter(u64 *stat, struct fbnic_stat_counter *counter)</div><div class='hunk'>@@ -52,6 +1701,63 @@ static void fbnic_set_counter(u64 *stat, struct fbnic_stat_counter *counter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='add'>+fbnic_get_pause_stats(struct net_device *netdev,</div><div class='add'>+		      struct ethtool_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_mac_stats *mac_stats;</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+</div><div class='add'>+	mac_stats = &amp;fbd-&gt;hw_stats.mac;</div><div class='add'>+</div><div class='add'>+	fbd-&gt;mac-&gt;get_pause_stats(fbd, false, &amp;mac_stats-&gt;pause);</div><div class='add'>+</div><div class='add'>+	pause_stats-&gt;tx_pause_frames = mac_stats-&gt;pause.tx_pause_frames.value;</div><div class='add'>+	pause_stats-&gt;rx_pause_frames = mac_stats-&gt;pause.rx_pause_frames.value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_get_fec_stats(struct net_device *netdev,</div><div class='add'>+		    struct ethtool_fec_stats *fec_stats,</div><div class='add'>+		    struct ethtool_fec_hist *hist)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_phy_stats *phy_stats;</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+</div><div class='add'>+	fbnic_get_hw_stats32(fbd);</div><div class='add'>+	phy_stats = &amp;fbd-&gt;hw_stats.phy;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+	fec_stats-&gt;corrected_blocks.total =</div><div class='add'>+		phy_stats-&gt;fec.corrected_blocks.value;</div><div class='add'>+	fec_stats-&gt;uncorrectable_blocks.total =</div><div class='add'>+		phy_stats-&gt;fec.uncorrectable_blocks.value;</div><div class='add'>+	spin_unlock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_get_eth_phy_stats(struct net_device *netdev,</div><div class='add'>+			struct ethtool_eth_phy_stats *eth_phy_stats)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_phy_stats *phy_stats;</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	u64 total = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	fbnic_get_hw_stats32(fbd);</div><div class='add'>+	phy_stats = &amp;fbd-&gt;hw_stats.phy;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+	for (i = 0; i &lt; FBNIC_PCS_MAX_LANES; i++)</div><div class='add'>+		total += phy_stats-&gt;pcs.SymbolErrorDuringCarrier.lanes[i].value;</div><div class='add'>+</div><div class='add'>+	eth_phy_stats-&gt;SymbolErrorDuringCarrier = total;</div><div class='add'>+	spin_unlock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='ctx'> fbnic_get_eth_mac_stats(struct net_device *netdev,</div><div class='ctx'> 			struct ethtool_eth_mac_stats *eth_mac_stats)</div><div class='ctx'> {</div><div class='hunk'>@@ -93,34 +1799,123 @@ fbnic_get_eth_mac_stats(struct net_device *netdev,</div><div class='ctx'> 			  &amp;mac_stats-&gt;eth_mac.FrameTooLongErrors);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_get_ts_stats(struct net_device *netdev,</div><div class='del'>-			       struct ethtool_ts_stats *ts_stats)</div><div class='add'>+static void</div><div class='add'>+fbnic_get_eth_ctrl_stats(struct net_device *netdev,</div><div class='add'>+			 struct ethtool_eth_ctrl_stats *eth_ctrl_stats)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='del'>-	u64 ts_packets, ts_lost;</div><div class='del'>-	struct fbnic_ring *ring;</div><div class='del'>-	unsigned int start;</div><div class='add'>+	struct fbnic_mac_stats *mac_stats;</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+</div><div class='add'>+	mac_stats = &amp;fbd-&gt;hw_stats.mac;</div><div class='add'>+</div><div class='add'>+	fbd-&gt;mac-&gt;get_eth_ctrl_stats(fbd, false, &amp;mac_stats-&gt;eth_ctrl);</div><div class='add'>+</div><div class='add'>+	eth_ctrl_stats-&gt;MACControlFramesReceived =</div><div class='add'>+		mac_stats-&gt;eth_ctrl.MACControlFramesReceived.value;</div><div class='add'>+	eth_ctrl_stats-&gt;MACControlFramesTransmitted =</div><div class='add'>+		mac_stats-&gt;eth_ctrl.MACControlFramesTransmitted.value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range fbnic_rmon_ranges[] = {</div><div class='add'>+	{    0,   64 },</div><div class='add'>+	{   65,  127 },</div><div class='add'>+	{  128,  255 },</div><div class='add'>+	{  256,  511 },</div><div class='add'>+	{  512, 1023 },</div><div class='add'>+	{ 1024, 1518 },</div><div class='add'>+	{ 1519, 2047 },</div><div class='add'>+	{ 2048, 4095 },</div><div class='add'>+	{ 4096, 8191 },</div><div class='add'>+	{ 8192, 9216 },</div><div class='add'>+	{ 9217, FBNIC_MAX_JUMBO_FRAME_SIZE },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_get_rmon_stats(struct net_device *netdev,</div><div class='add'>+		     struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+		     const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_mac_stats *mac_stats;</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	ts_stats-&gt;pkts = fbn-&gt;tx_stats.ts_packets;</div><div class='del'>-	ts_stats-&gt;lost = fbn-&gt;tx_stats.ts_lost;</div><div class='del'>-	for (i = 0; i &lt; fbn-&gt;num_tx_queues; i++) {</div><div class='del'>-		ring = fbn-&gt;tx[i];</div><div class='del'>-		do {</div><div class='del'>-			start = u64_stats_fetch_begin(&amp;ring-&gt;stats.syncp);</div><div class='del'>-			ts_packets = ring-&gt;stats.ts_packets;</div><div class='del'>-			ts_lost = ring-&gt;stats.ts_lost;</div><div class='del'>-		} while (u64_stats_fetch_retry(&amp;ring-&gt;stats.syncp, start));</div><div class='del'>-		ts_stats-&gt;pkts += ts_packets;</div><div class='del'>-		ts_stats-&gt;lost += ts_lost;</div><div class='add'>+	mac_stats = &amp;fbd-&gt;hw_stats.mac;</div><div class='add'>+</div><div class='add'>+	fbd-&gt;mac-&gt;get_rmon_stats(fbd, false, &amp;mac_stats-&gt;rmon);</div><div class='add'>+</div><div class='add'>+	rmon_stats-&gt;undersize_pkts =</div><div class='add'>+		mac_stats-&gt;rmon.undersize_pkts.value;</div><div class='add'>+	rmon_stats-&gt;oversize_pkts =</div><div class='add'>+		mac_stats-&gt;rmon.oversize_pkts.value;</div><div class='add'>+	rmon_stats-&gt;fragments =</div><div class='add'>+		mac_stats-&gt;rmon.fragments.value;</div><div class='add'>+	rmon_stats-&gt;jabbers =</div><div class='add'>+		mac_stats-&gt;rmon.jabbers.value;</div><div class='add'>+</div><div class='add'>+	for (i = 0; fbnic_rmon_ranges[i].high; i++) {</div><div class='add'>+		rmon_stats-&gt;hist[i] = mac_stats-&gt;rmon.hist[i].value;</div><div class='add'>+		rmon_stats-&gt;hist_tx[i] = mac_stats-&gt;rmon.hist_tx[i].value;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	*ranges = fbnic_rmon_ranges;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_link_ext_stats(struct net_device *netdev,</div><div class='add'>+				     struct ethtool_link_ext_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	stats-&gt;link_down_events = fbn-&gt;link_down_events;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops fbnic_ethtool_ops = {</div><div class='del'>-	.get_drvinfo		= fbnic_get_drvinfo,</div><div class='del'>-	.get_ts_info		= fbnic_get_ts_info,</div><div class='del'>-	.get_ts_stats		= fbnic_get_ts_stats,</div><div class='del'>-	.get_eth_mac_stats	= fbnic_get_eth_mac_stats,</div><div class='add'>+	.cap_link_lanes_supported	= true,</div><div class='add'>+	.supported_coalesce_params	= ETHTOOL_COALESCE_USECS |</div><div class='add'>+					  ETHTOOL_COALESCE_RX_MAX_FRAMES,</div><div class='add'>+	.supported_ring_params		= ETHTOOL_RING_USE_TCP_DATA_SPLIT |</div><div class='add'>+					  ETHTOOL_RING_USE_HDS_THRS,</div><div class='add'>+	.rxfh_max_num_contexts		= FBNIC_RPC_RSS_TBL_COUNT,</div><div class='add'>+	.get_drvinfo			= fbnic_get_drvinfo,</div><div class='add'>+	.get_regs_len			= fbnic_get_regs_len,</div><div class='add'>+	.get_regs			= fbnic_get_regs,</div><div class='add'>+	.get_link			= ethtool_op_get_link,</div><div class='add'>+	.get_link_ext_stats		= fbnic_get_link_ext_stats,</div><div class='add'>+	.get_coalesce			= fbnic_get_coalesce,</div><div class='add'>+	.set_coalesce			= fbnic_set_coalesce,</div><div class='add'>+	.get_ringparam			= fbnic_get_ringparam,</div><div class='add'>+	.set_ringparam			= fbnic_set_ringparam,</div><div class='add'>+	.get_pause_stats		= fbnic_get_pause_stats,</div><div class='add'>+	.get_pauseparam			= fbnic_phylink_get_pauseparam,</div><div class='add'>+	.set_pauseparam			= fbnic_phylink_set_pauseparam,</div><div class='add'>+	.get_strings			= fbnic_get_strings,</div><div class='add'>+	.get_ethtool_stats		= fbnic_get_ethtool_stats,</div><div class='add'>+	.get_sset_count			= fbnic_get_sset_count,</div><div class='add'>+	.get_rxnfc			= fbnic_get_rxnfc,</div><div class='add'>+	.set_rxnfc			= fbnic_set_rxnfc,</div><div class='add'>+	.get_rxfh_key_size		= fbnic_get_rxfh_key_size,</div><div class='add'>+	.get_rxfh_indir_size		= fbnic_get_rxfh_indir_size,</div><div class='add'>+	.get_rxfh			= fbnic_get_rxfh,</div><div class='add'>+	.set_rxfh			= fbnic_set_rxfh,</div><div class='add'>+	.get_rxfh_fields		= fbnic_get_rss_hash_opts,</div><div class='add'>+	.set_rxfh_fields		= fbnic_set_rss_hash_opts,</div><div class='add'>+	.create_rxfh_context		= fbnic_create_rxfh_context,</div><div class='add'>+	.modify_rxfh_context		= fbnic_modify_rxfh_context,</div><div class='add'>+	.remove_rxfh_context		= fbnic_remove_rxfh_context,</div><div class='add'>+	.get_channels			= fbnic_get_channels,</div><div class='add'>+	.set_channels			= fbnic_set_channels,</div><div class='add'>+	.get_ts_info			= fbnic_get_ts_info,</div><div class='add'>+	.get_ts_stats			= fbnic_get_ts_stats,</div><div class='add'>+	.get_link_ksettings		= fbnic_phylink_ethtool_ksettings_get,</div><div class='add'>+	.get_fec_stats			= fbnic_get_fec_stats,</div><div class='add'>+	.get_fecparam			= fbnic_phylink_get_fecparam,</div><div class='add'>+	.get_module_eeprom_by_page	= fbnic_get_module_eeprom_by_page,</div><div class='add'>+	.get_eth_phy_stats		= fbnic_get_eth_phy_stats,</div><div class='add'>+	.get_eth_mac_stats		= fbnic_get_eth_mac_stats,</div><div class='add'>+	.get_eth_ctrl_stats		= fbnic_get_eth_ctrl_stats,</div><div class='add'>+	.get_rmon_stats			= fbnic_get_rmon_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void fbnic_set_ethtool_ops(struct net_device *dev)</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_fw.c b/drivers/net/ethernet/meta/fbnic/fbnic_fw.c<br/>index 8f7a2a19ddf8..d8d9b6cfde82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_fw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_fw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_fw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_fw.c</a></div><div class='hunk'>@@ -17,11 +17,29 @@ static void __fbnic_mbx_wr_desc(struct fbnic_dev *fbd, int mbx_idx,</div><div class='ctx'> {</div><div class='ctx'> 	u32 desc_offset = FBNIC_IPC_MBX(mbx_idx, desc_idx);</div><div class='ctx'> </div><div class='add'>+	/* Write the upper 32b and then the lower 32b. Doing this the</div><div class='add'>+	 * FW can then read lower, upper, lower to verify that the state</div><div class='add'>+	 * of the descriptor wasn't changed mid-transaction.</div><div class='add'>+	 */</div><div class='ctx'> 	fw_wr32(fbd, desc_offset + 1, upper_32_bits(desc));</div><div class='ctx'> 	fw_wrfl(fbd);</div><div class='ctx'> 	fw_wr32(fbd, desc_offset, lower_32_bits(desc));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __fbnic_mbx_invalidate_desc(struct fbnic_dev *fbd, int mbx_idx,</div><div class='add'>+					int desc_idx, u32 desc)</div><div class='add'>+{</div><div class='add'>+	u32 desc_offset = FBNIC_IPC_MBX(mbx_idx, desc_idx);</div><div class='add'>+</div><div class='add'>+	/* For initialization we write the lower 32b of the descriptor first.</div><div class='add'>+	 * This way we can set the state to mark it invalid before we clear the</div><div class='add'>+	 * upper 32b.</div><div class='add'>+	 */</div><div class='add'>+	fw_wr32(fbd, desc_offset, desc);</div><div class='add'>+	fw_wrfl(fbd);</div><div class='add'>+	fw_wr32(fbd, desc_offset + 1, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u64 __fbnic_mbx_rd_desc(struct fbnic_dev *fbd, int mbx_idx, int desc_idx)</div><div class='ctx'> {</div><div class='ctx'> 	u32 desc_offset = FBNIC_IPC_MBX(mbx_idx, desc_idx);</div><div class='hunk'>@@ -33,29 +51,41 @@ static u64 __fbnic_mbx_rd_desc(struct fbnic_dev *fbd, int mbx_idx, int desc_idx)</div><div class='ctx'> 	return desc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_mbx_init_desc_ring(struct fbnic_dev *fbd, int mbx_idx)</div><div class='add'>+static void fbnic_mbx_reset_desc_ring(struct fbnic_dev *fbd, int mbx_idx)</div><div class='ctx'> {</div><div class='ctx'> 	int desc_idx;</div><div class='ctx'> </div><div class='add'>+	/* Disable DMA transactions from the device,</div><div class='add'>+	 * and flush any transactions triggered during cleaning</div><div class='add'>+	 */</div><div class='add'>+	switch (mbx_idx) {</div><div class='add'>+	case FBNIC_IPC_MBX_RX_IDX:</div><div class='add'>+		wr32(fbd, FBNIC_PUL_OB_TLP_HDR_AW_CFG,</div><div class='add'>+		     FBNIC_PUL_OB_TLP_HDR_AW_CFG_FLUSH);</div><div class='add'>+		break;</div><div class='add'>+	case FBNIC_IPC_MBX_TX_IDX:</div><div class='add'>+		wr32(fbd, FBNIC_PUL_OB_TLP_HDR_AR_CFG,</div><div class='add'>+		     FBNIC_PUL_OB_TLP_HDR_AR_CFG_FLUSH);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wrfl(fbd);</div><div class='add'>+</div><div class='ctx'> 	/* Initialize first descriptor to all 0s. Doing this gives us a</div><div class='ctx'> 	 * solid stop for the firmware to hit when it is done looping</div><div class='ctx'> 	 * through the ring.</div><div class='ctx'> 	 */</div><div class='del'>-	__fbnic_mbx_wr_desc(fbd, mbx_idx, 0, 0);</div><div class='del'>-</div><div class='del'>-	fw_wrfl(fbd);</div><div class='add'>+	__fbnic_mbx_invalidate_desc(fbd, mbx_idx, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* We then fill the rest of the ring starting at the end and moving</div><div class='ctx'> 	 * back toward descriptor 0 with skip descriptors that have no</div><div class='ctx'> 	 * length nor address, and tell the firmware that they can skip</div><div class='ctx'> 	 * them and just move past them to the one we initialized to 0.</div><div class='ctx'> 	 */</div><div class='del'>-	for (desc_idx = FBNIC_IPC_MBX_DESC_LEN; --desc_idx;) {</div><div class='del'>-		__fbnic_mbx_wr_desc(fbd, mbx_idx, desc_idx,</div><div class='del'>-				    FBNIC_IPC_MBX_DESC_FW_CMPL |</div><div class='del'>-				    FBNIC_IPC_MBX_DESC_HOST_CMPL);</div><div class='del'>-		fw_wrfl(fbd);</div><div class='del'>-	}</div><div class='add'>+	for (desc_idx = FBNIC_IPC_MBX_DESC_LEN; --desc_idx;)</div><div class='add'>+		__fbnic_mbx_invalidate_desc(fbd, mbx_idx, desc_idx,</div><div class='add'>+					    FBNIC_IPC_MBX_DESC_FW_CMPL |</div><div class='add'>+					    FBNIC_IPC_MBX_DESC_HOST_CMPL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fbnic_mbx_init(struct fbnic_dev *fbd)</div><div class='hunk'>@@ -65,6 +95,9 @@ void fbnic_mbx_init(struct fbnic_dev *fbd)</div><div class='ctx'> 	/* Initialize lock to protect Tx ring */</div><div class='ctx'> 	spin_lock_init(&amp;fbd-&gt;fw_tx_lock);</div><div class='ctx'> </div><div class='add'>+	/* Reset FW Capabilities */</div><div class='add'>+	memset(&amp;fbd-&gt;fw_cap, 0, sizeof(fbd-&gt;fw_cap));</div><div class='add'>+</div><div class='ctx'> 	/* Reinitialize mailbox memory */</div><div class='ctx'> 	for (i = 0; i &lt; FBNIC_IPC_MBX_INDICES; i++)</div><div class='ctx'> 		memset(&amp;fbd-&gt;mbx[i], 0, sizeof(struct fbnic_fw_mbx));</div><div class='hunk'>@@ -76,7 +109,7 @@ void fbnic_mbx_init(struct fbnic_dev *fbd)</div><div class='ctx'> 	wr32(fbd, FBNIC_INTR_CLEAR(0), 1u &lt;&lt; FBNIC_FW_MSIX_ENTRY);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; FBNIC_IPC_MBX_INDICES; i++)</div><div class='del'>-		fbnic_mbx_init_desc_ring(fbd, i);</div><div class='add'>+		fbnic_mbx_reset_desc_ring(fbd, i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int fbnic_mbx_map_msg(struct fbnic_dev *fbd, int mbx_idx,</div><div class='hunk'>@@ -97,11 +130,8 @@ static int fbnic_mbx_map_msg(struct fbnic_dev *fbd, int mbx_idx,</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	addr = dma_map_single(fbd-&gt;dev, msg, PAGE_SIZE, direction);</div><div class='del'>-	if (dma_mapping_error(fbd-&gt;dev, addr)) {</div><div class='del'>-		free_page((unsigned long)msg);</div><div class='del'>-</div><div class='add'>+	if (dma_mapping_error(fbd-&gt;dev, addr))</div><div class='ctx'> 		return -ENOSPC;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	mbx-&gt;buf_info[tail].msg = msg;</div><div class='ctx'> 	mbx-&gt;buf_info[tail].addr = addr;</div><div class='hunk'>@@ -141,7 +171,7 @@ static void fbnic_mbx_clean_desc_ring(struct fbnic_dev *fbd, int mbx_idx)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	fbnic_mbx_init_desc_ring(fbd, mbx_idx);</div><div class='add'>+	fbnic_mbx_reset_desc_ring(fbd, mbx_idx);</div><div class='ctx'> </div><div class='ctx'> 	for (i = FBNIC_IPC_MBX_DESC_LEN; i--;)</div><div class='ctx'> 		fbnic_mbx_unmap_and_free_msg(fbd, mbx_idx, i);</div><div class='hunk'>@@ -171,7 +201,7 @@ static int fbnic_mbx_alloc_rx_msgs(struct fbnic_dev *fbd)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/* Fill all but 1 unused descriptors in the Rx queue. */</div><div class='del'>-	count = (head - tail - 1) % FBNIC_IPC_MBX_DESC_LEN;</div><div class='add'>+	count = (head - tail - 1) &amp; (FBNIC_IPC_MBX_DESC_LEN - 1);</div><div class='ctx'> 	while (!err &amp;&amp; count--) {</div><div class='ctx'> 		struct fbnic_tlv_msg *msg;</div><div class='ctx'> </div><div class='hunk'>@@ -207,6 +237,44 @@ static int fbnic_mbx_map_tlv_msg(struct fbnic_dev *fbd,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int fbnic_mbx_set_cmpl_slot(struct fbnic_dev *fbd,</div><div class='add'>+				   struct fbnic_fw_completion *cmpl_data)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_mbx *tx_mbx = &amp;fbd-&gt;mbx[FBNIC_IPC_MBX_TX_IDX];</div><div class='add'>+	int free = -EXFULL;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!tx_mbx-&gt;ready)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_MBX_CMPL_SLOTS; i++) {</div><div class='add'>+		if (!fbd-&gt;cmpl_data[i])</div><div class='add'>+			free = i;</div><div class='add'>+		else if (fbd-&gt;cmpl_data[i]-&gt;msg_type == cmpl_data-&gt;msg_type)</div><div class='add'>+			return -EEXIST;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (free == -EXFULL)</div><div class='add'>+		return -EXFULL;</div><div class='add'>+</div><div class='add'>+	fbd-&gt;cmpl_data[free] = cmpl_data;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_mbx_clear_cmpl_slot(struct fbnic_dev *fbd,</div><div class='add'>+				      struct fbnic_fw_completion *cmpl_data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_MBX_CMPL_SLOTS; i++) {</div><div class='add'>+		if (fbd-&gt;cmpl_data[i] == cmpl_data) {</div><div class='add'>+			fbd-&gt;cmpl_data[i] = NULL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fbnic_mbx_process_tx_msgs(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_fw_mbx *tx_mbx = &amp;fbd-&gt;mbx[FBNIC_IPC_MBX_TX_IDX];</div><div class='hunk'>@@ -228,6 +296,89 @@ static void fbnic_mbx_process_tx_msgs(struct fbnic_dev *fbd)</div><div class='ctx'> 	tx_mbx-&gt;head = head;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int fbnic_mbx_set_cmpl(struct fbnic_dev *fbd,</div><div class='add'>+		       struct fbnic_fw_completion *cmpl_data)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fbd-&gt;fw_tx_lock, flags);</div><div class='add'>+	err = fbnic_mbx_set_cmpl_slot(fbd, cmpl_data);</div><div class='add'>+	spin_unlock_irqrestore(&amp;fbd-&gt;fw_tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_mbx_map_req_w_cmpl(struct fbnic_dev *fbd,</div><div class='add'>+				    struct fbnic_tlv_msg *msg,</div><div class='add'>+				    struct fbnic_fw_completion *cmpl_data)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fbd-&gt;fw_tx_lock, flags);</div><div class='add'>+	if (cmpl_data) {</div><div class='add'>+		err = fbnic_mbx_set_cmpl_slot(fbd, cmpl_data);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlock_mbx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = fbnic_mbx_map_msg(fbd, FBNIC_IPC_MBX_TX_IDX, msg,</div><div class='add'>+				le16_to_cpu(msg-&gt;hdr.len) * sizeof(u32), 1);</div><div class='add'>+</div><div class='add'>+	/* If we successfully reserved a completion and msg failed</div><div class='add'>+	 * then clear completion data for next caller</div><div class='add'>+	 */</div><div class='add'>+	if (err &amp;&amp; cmpl_data)</div><div class='add'>+		fbnic_mbx_clear_cmpl_slot(fbd, cmpl_data);</div><div class='add'>+</div><div class='add'>+unlock_mbx:</div><div class='add'>+	spin_unlock_irqrestore(&amp;fbd-&gt;fw_tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_mbx_clear_cmpl(struct fbnic_dev *fbd,</div><div class='add'>+			  struct fbnic_fw_completion *fw_cmpl)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fbd-&gt;fw_tx_lock, flags);</div><div class='add'>+	fbnic_mbx_clear_cmpl_slot(fbd, fw_cmpl);</div><div class='add'>+	spin_unlock_irqrestore(&amp;fbd-&gt;fw_tx_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_fw_release_cmpl_data(struct kref *kref)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl_data;</div><div class='add'>+</div><div class='add'>+	cmpl_data = container_of(kref, struct fbnic_fw_completion,</div><div class='add'>+				 ref_count);</div><div class='add'>+	kfree(cmpl_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct fbnic_fw_completion *</div><div class='add'>+fbnic_fw_get_cmpl_by_type(struct fbnic_dev *fbd, u32 msg_type)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl_data = NULL;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;fbd-&gt;fw_tx_lock, flags);</div><div class='add'>+	for (i = 0; i &lt; FBNIC_MBX_CMPL_SLOTS; i++) {</div><div class='add'>+		if (fbd-&gt;cmpl_data[i] &amp;&amp;</div><div class='add'>+		    fbd-&gt;cmpl_data[i]-&gt;msg_type == msg_type) {</div><div class='add'>+			cmpl_data = fbd-&gt;cmpl_data[i];</div><div class='add'>+			kref_get(&amp;cmpl_data-&gt;ref_count);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;fbd-&gt;fw_tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	return cmpl_data;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * fbnic_fw_xmit_simple_msg - Transmit a simple single TLV message w/o data</div><div class='ctx'>  * @fbd: FBNIC device structure</div><div class='hunk'>@@ -235,11 +386,11 @@ static void fbnic_mbx_process_tx_msgs(struct fbnic_dev *fbd)</div><div class='ctx'>  *</div><div class='ctx'>  * Return:</div><div class='ctx'>  *   One the following values:</div><div class='del'>- *     -EOPNOTSUPP: Is not ASIC so mailbox is not supported</div><div class='del'>- *     -ENODEV: Device I/O error</div><div class='del'>- *     -ENOMEM: Failed to allocate message</div><div class='del'>- *     -EBUSY: No space in mailbox</div><div class='del'>- *     -ENOSPC: DMA mapping failed</div><div class='add'>+ *	-EOPNOTSUPP: Is not ASIC so mailbox is not supported</div><div class='add'>+ *	-ENODEV: Device I/O error</div><div class='add'>+ *	-ENOMEM: Failed to allocate message</div><div class='add'>+ *	-EBUSY: No space in mailbox</div><div class='add'>+ *	-ENOSPC: DMA mapping failed</div><div class='ctx'>  *</div><div class='ctx'>  * This function sends a single TLV header indicating the host wants to take</div><div class='ctx'>  * some action. However there are no other side effects which means that any</div><div class='hunk'>@@ -265,67 +416,41 @@ static int fbnic_fw_xmit_simple_msg(struct fbnic_dev *fbd, u32 msg_type)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * fbnic_fw_xmit_cap_msg - Allocate and populate a FW capabilities message</div><div class='del'>- * @fbd: FBNIC device structure</div><div class='del'>- *</div><div class='del'>- * Return: NULL on failure to allocate, error pointer on error, or pointer</div><div class='del'>- * to new TLV test message.</div><div class='del'>- *</div><div class='del'>- * Sends a single TLV header indicating the host wants the firmware to</div><div class='del'>- * confirm the capabilities and version.</div><div class='del'>- **/</div><div class='del'>-static int fbnic_fw_xmit_cap_msg(struct fbnic_dev *fbd)</div><div class='del'>-{</div><div class='del'>-	int err = fbnic_fw_xmit_simple_msg(fbd, FBNIC_TLV_MSG_ID_HOST_CAP_REQ);</div><div class='del'>-</div><div class='del'>-	/* Return 0 if we are not calling this on ASIC */</div><div class='del'>-	return (err == -EOPNOTSUPP) ? 0 : err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void fbnic_mbx_postinit_desc_ring(struct fbnic_dev *fbd, int mbx_idx)</div><div class='add'>+static void fbnic_mbx_init_desc_ring(struct fbnic_dev *fbd, int mbx_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_fw_mbx *mbx = &amp;fbd-&gt;mbx[mbx_idx];</div><div class='ctx'> </div><div class='del'>-	/* This is a one time init, so just exit if it is completed */</div><div class='del'>-	if (mbx-&gt;ready)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	mbx-&gt;ready = true;</div><div class='ctx'> </div><div class='ctx'> 	switch (mbx_idx) {</div><div class='ctx'> 	case FBNIC_IPC_MBX_RX_IDX:</div><div class='add'>+		/* Enable DMA writes from the device */</div><div class='add'>+		wr32(fbd, FBNIC_PUL_OB_TLP_HDR_AW_CFG,</div><div class='add'>+		     FBNIC_PUL_OB_TLP_HDR_AW_CFG_BME);</div><div class='add'>+</div><div class='ctx'> 		/* Make sure we have a page for the FW to write to */</div><div class='ctx'> 		fbnic_mbx_alloc_rx_msgs(fbd);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case FBNIC_IPC_MBX_TX_IDX:</div><div class='del'>-		/* Force version to 1 if we successfully requested an update</div><div class='del'>-		 * from the firmware. This should be overwritten once we get</div><div class='del'>-		 * the actual version from the firmware in the capabilities</div><div class='del'>-		 * request message.</div><div class='del'>-		 */</div><div class='del'>-		if (!fbnic_fw_xmit_cap_msg(fbd) &amp;&amp;</div><div class='del'>-		    !fbd-&gt;fw_cap.running.mgmt.version)</div><div class='del'>-			fbd-&gt;fw_cap.running.mgmt.version = 1;</div><div class='add'>+		/* Enable DMA reads from the device */</div><div class='add'>+		wr32(fbd, FBNIC_PUL_OB_TLP_HDR_AR_CFG,</div><div class='add'>+		     FBNIC_PUL_OB_TLP_HDR_AR_CFG_BME);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_mbx_postinit(struct fbnic_dev *fbd)</div><div class='add'>+static bool fbnic_mbx_event(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* We only need to do this on the first interrupt following init.</div><div class='add'>+	/* We only need to do this on the first interrupt following reset.</div><div class='ctx'> 	 * this primes the mailbox so that we will have cleared all the</div><div class='ctx'> 	 * skip descriptors.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!(rd32(fbd, FBNIC_INTR_STATUS(0)) &amp; (1u &lt;&lt; FBNIC_FW_MSIX_ENTRY)))</div><div class='del'>-		return;</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='ctx'> 	wr32(fbd, FBNIC_INTR_CLEAR(0), 1u &lt;&lt; FBNIC_FW_MSIX_ENTRY);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; FBNIC_IPC_MBX_INDICES; i++)</div><div class='del'>-		fbnic_mbx_postinit_desc_ring(fbd, i);</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -370,6 +495,11 @@ int fbnic_fw_xmit_ownership_msg(struct fbnic_dev *fbd, bool take_ownership)</div><div class='ctx'> </div><div class='ctx'> 	fbd-&gt;last_heartbeat_request = req_time;</div><div class='ctx'> </div><div class='add'>+	/* Set prev_firmware_time to 0 to avoid triggering firmware crash</div><div class='add'>+	 * detection until we receive the second uptime in a heartbeat resp.</div><div class='add'>+	 */</div><div class='add'>+	fbd-&gt;prev_firmware_time = 0;</div><div class='add'>+</div><div class='ctx'> 	/* Set heartbeat detection based on if we are taking ownership */</div><div class='ctx'> 	fbd-&gt;fw_heartbeat_enabled = take_ownership;</div><div class='ctx'> </div><div class='hunk'>@@ -403,6 +533,7 @@ static const struct fbnic_tlv_index fbnic_fw_cap_resp_index[] = {</div><div class='ctx'> 	FBNIC_TLV_ATTR_U32(FBNIC_FW_CAP_RESP_UEFI_VERSION),</div><div class='ctx'> 	FBNIC_TLV_ATTR_STRING(FBNIC_FW_CAP_RESP_UEFI_COMMIT_STR,</div><div class='ctx'> 			      FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE),</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_CAP_RESP_ANTI_ROLLBACK_VERSION),</div><div class='ctx'> 	FBNIC_TLV_ATTR_LAST</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -437,29 +568,25 @@ static int fbnic_fw_parse_bmc_addrs(u8 bmc_mac_addr[][ETH_ALEN],</div><div class='ctx'> </div><div class='ctx'> static int fbnic_fw_parse_cap_resp(void *opaque, struct fbnic_tlv_msg **results)</div><div class='ctx'> {</div><div class='del'>-	u32 active_slot = 0, all_multi = 0;</div><div class='add'>+	u32 all_multi = 0, version = 0;</div><div class='ctx'> 	struct fbnic_dev *fbd = opaque;</div><div class='del'>-	u32 speed = 0, fec = 0;</div><div class='del'>-	size_t commit_size = 0;</div><div class='ctx'> 	bool bmc_present;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	get_unsigned_result(FBNIC_FW_CAP_RESP_VERSION,</div><div class='del'>-			    fbd-&gt;fw_cap.running.mgmt.version);</div><div class='del'>-</div><div class='add'>+	version = fta_get_uint(results, FBNIC_FW_CAP_RESP_VERSION);</div><div class='add'>+	fbd-&gt;fw_cap.running.mgmt.version = version;</div><div class='ctx'> 	if (!fbd-&gt;fw_cap.running.mgmt.version)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (fbd-&gt;fw_cap.running.mgmt.version &lt; MIN_FW_VERSION_CODE) {</div><div class='add'>+	if (fbd-&gt;fw_cap.running.mgmt.version &lt; MIN_FW_VER_CODE) {</div><div class='add'>+		char required_ver[FBNIC_FW_VER_MAX_SIZE];</div><div class='ctx'> 		char running_ver[FBNIC_FW_VER_MAX_SIZE];</div><div class='ctx'> </div><div class='ctx'> 		fbnic_mk_fw_ver_str(fbd-&gt;fw_cap.running.mgmt.version,</div><div class='ctx'> 				    running_ver);</div><div class='del'>-		dev_err(fbd-&gt;dev, "Device firmware version(%s) is older than minimum required version(%02d.%02d.%02d)\n",</div><div class='del'>-			running_ver,</div><div class='del'>-			MIN_FW_MAJOR_VERSION,</div><div class='del'>-			MIN_FW_MINOR_VERSION,</div><div class='del'>-			MIN_FW_BUILD_VERSION);</div><div class='add'>+		fbnic_mk_fw_ver_str(MIN_FW_VER_CODE, required_ver);</div><div class='add'>+		dev_err(fbd-&gt;dev, "Device firmware version(%s) is older than minimum required version(%s)\n",</div><div class='add'>+			running_ver, required_ver);</div><div class='ctx'> 		/* Disable TX mailbox to prevent card use until firmware is</div><div class='ctx'> 		 * updated.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -467,43 +594,41 @@ static int fbnic_fw_parse_cap_resp(void *opaque, struct fbnic_tlv_msg **results)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	get_string_result(FBNIC_FW_CAP_RESP_VERSION_COMMIT_STR, commit_size,</div><div class='del'>-			  fbd-&gt;fw_cap.running.mgmt.commit,</div><div class='del'>-			  FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE);</div><div class='del'>-	if (!commit_size)</div><div class='add'>+	if (fta_get_str(results, FBNIC_FW_CAP_RESP_VERSION_COMMIT_STR,</div><div class='add'>+			fbd-&gt;fw_cap.running.mgmt.commit,</div><div class='add'>+			FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE) &lt;= 0)</div><div class='ctx'> 		dev_warn(fbd-&gt;dev, "Firmware did not send mgmt commit!\n");</div><div class='ctx'> </div><div class='del'>-	get_unsigned_result(FBNIC_FW_CAP_RESP_STORED_VERSION,</div><div class='del'>-			    fbd-&gt;fw_cap.stored.mgmt.version);</div><div class='del'>-	get_string_result(FBNIC_FW_CAP_RESP_STORED_COMMIT_STR, commit_size,</div><div class='del'>-			  fbd-&gt;fw_cap.stored.mgmt.commit,</div><div class='del'>-			  FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE);</div><div class='del'>-</div><div class='del'>-	get_unsigned_result(FBNIC_FW_CAP_RESP_CMRT_VERSION,</div><div class='del'>-			    fbd-&gt;fw_cap.running.bootloader.version);</div><div class='del'>-	get_string_result(FBNIC_FW_CAP_RESP_CMRT_COMMIT_STR, commit_size,</div><div class='del'>-			  fbd-&gt;fw_cap.running.bootloader.commit,</div><div class='del'>-			  FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE);</div><div class='del'>-</div><div class='del'>-	get_unsigned_result(FBNIC_FW_CAP_RESP_STORED_CMRT_VERSION,</div><div class='del'>-			    fbd-&gt;fw_cap.stored.bootloader.version);</div><div class='del'>-	get_string_result(FBNIC_FW_CAP_RESP_STORED_CMRT_COMMIT_STR, commit_size,</div><div class='del'>-			  fbd-&gt;fw_cap.stored.bootloader.commit,</div><div class='del'>-			  FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE);</div><div class='del'>-</div><div class='del'>-	get_unsigned_result(FBNIC_FW_CAP_RESP_UEFI_VERSION,</div><div class='del'>-			    fbd-&gt;fw_cap.stored.undi.version);</div><div class='del'>-	get_string_result(FBNIC_FW_CAP_RESP_UEFI_COMMIT_STR, commit_size,</div><div class='del'>-			  fbd-&gt;fw_cap.stored.undi.commit,</div><div class='del'>-			  FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE);</div><div class='del'>-</div><div class='del'>-	get_unsigned_result(FBNIC_FW_CAP_RESP_ACTIVE_FW_SLOT, active_slot);</div><div class='del'>-	fbd-&gt;fw_cap.active_slot = active_slot;</div><div class='del'>-</div><div class='del'>-	get_unsigned_result(FBNIC_FW_CAP_RESP_FW_LINK_SPEED, speed);</div><div class='del'>-	get_unsigned_result(FBNIC_FW_CAP_RESP_FW_LINK_FEC, fec);</div><div class='del'>-	fbd-&gt;fw_cap.link_speed = speed;</div><div class='del'>-	fbd-&gt;fw_cap.link_fec = fec;</div><div class='add'>+	version = fta_get_uint(results, FBNIC_FW_CAP_RESP_STORED_VERSION);</div><div class='add'>+	fbd-&gt;fw_cap.stored.mgmt.version = version;</div><div class='add'>+	fta_get_str(results, FBNIC_FW_CAP_RESP_STORED_COMMIT_STR,</div><div class='add'>+		    fbd-&gt;fw_cap.stored.mgmt.commit,</div><div class='add'>+		    FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE);</div><div class='add'>+</div><div class='add'>+	version = fta_get_uint(results, FBNIC_FW_CAP_RESP_CMRT_VERSION);</div><div class='add'>+	fbd-&gt;fw_cap.running.bootloader.version = version;</div><div class='add'>+	fta_get_str(results, FBNIC_FW_CAP_RESP_CMRT_COMMIT_STR,</div><div class='add'>+		    fbd-&gt;fw_cap.running.bootloader.commit,</div><div class='add'>+		    FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE);</div><div class='add'>+</div><div class='add'>+	version = fta_get_uint(results, FBNIC_FW_CAP_RESP_STORED_CMRT_VERSION);</div><div class='add'>+	fbd-&gt;fw_cap.stored.bootloader.version = version;</div><div class='add'>+	fta_get_str(results, FBNIC_FW_CAP_RESP_STORED_CMRT_COMMIT_STR,</div><div class='add'>+		    fbd-&gt;fw_cap.stored.bootloader.commit,</div><div class='add'>+		    FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE);</div><div class='add'>+</div><div class='add'>+	version = fta_get_uint(results, FBNIC_FW_CAP_RESP_UEFI_VERSION);</div><div class='add'>+	fbd-&gt;fw_cap.stored.undi.version = version;</div><div class='add'>+	fta_get_str(results, FBNIC_FW_CAP_RESP_UEFI_COMMIT_STR,</div><div class='add'>+		    fbd-&gt;fw_cap.stored.undi.commit,</div><div class='add'>+		    FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE);</div><div class='add'>+</div><div class='add'>+	fbd-&gt;fw_cap.active_slot =</div><div class='add'>+		fta_get_uint(results, FBNIC_FW_CAP_RESP_ACTIVE_FW_SLOT);</div><div class='add'>+	fbd-&gt;fw_cap.link_speed =</div><div class='add'>+		fta_get_uint(results, FBNIC_FW_CAP_RESP_FW_LINK_SPEED);</div><div class='add'>+	fbd-&gt;fw_cap.link_fec =</div><div class='add'>+		fta_get_uint(results, FBNIC_FW_CAP_RESP_FW_LINK_FEC);</div><div class='ctx'> </div><div class='ctx'> 	bmc_present = !!results[FBNIC_FW_CAP_RESP_BMC_PRESENT];</div><div class='ctx'> 	if (bmc_present) {</div><div class='hunk'>@@ -518,7 +643,8 @@ static int fbnic_fw_parse_cap_resp(void *opaque, struct fbnic_tlv_msg **results)</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='del'>-		get_unsigned_result(FBNIC_FW_CAP_RESP_BMC_ALL_MULTI, all_multi);</div><div class='add'>+		all_multi =</div><div class='add'>+			fta_get_uint(results, FBNIC_FW_CAP_RESP_BMC_ALL_MULTI);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		memset(fbd-&gt;fw_cap.bmc_mac_addr, 0,</div><div class='ctx'> 		       sizeof(fbd-&gt;fw_cap.bmc_mac_addr));</div><div class='hunk'>@@ -529,10 +655,17 @@ static int fbnic_fw_parse_cap_resp(void *opaque, struct fbnic_tlv_msg **results)</div><div class='ctx'> 	if (results[FBNIC_FW_CAP_RESP_BMC_ALL_MULTI] || !bmc_present)</div><div class='ctx'> 		fbd-&gt;fw_cap.all_multi = all_multi;</div><div class='ctx'> </div><div class='add'>+	fbd-&gt;fw_cap.anti_rollback_version =</div><div class='add'>+		fta_get_uint(results, FBNIC_FW_CAP_RESP_ANTI_ROLLBACK_VERSION);</div><div class='add'>+</div><div class='add'>+	/* Always assume we need a BMC reinit */</div><div class='add'>+	fbd-&gt;fw_cap.need_bmc_tcam_reinit = true;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct fbnic_tlv_index fbnic_ownership_resp_index[] = {</div><div class='add'>+	FBNIC_TLV_ATTR_U64(FBNIC_FW_OWNERSHIP_TIME),</div><div class='ctx'> 	FBNIC_TLV_ATTR_LAST</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -544,10 +677,14 @@ static int fbnic_fw_parse_ownership_resp(void *opaque,</div><div class='ctx'> 	/* Count the ownership response as a heartbeat reply */</div><div class='ctx'> 	fbd-&gt;last_heartbeat_response = jiffies;</div><div class='ctx'> </div><div class='add'>+	/* Capture firmware time for logging and firmware crash check */</div><div class='add'>+	fbd-&gt;firmware_time = fta_get_uint(results, FBNIC_FW_OWNERSHIP_TIME);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct fbnic_tlv_index fbnic_heartbeat_resp_index[] = {</div><div class='add'>+	FBNIC_TLV_ATTR_U64(FBNIC_FW_HEARTBEAT_UPTIME),</div><div class='ctx'> 	FBNIC_TLV_ATTR_LAST</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -558,6 +695,9 @@ static int fbnic_fw_parse_heartbeat_resp(void *opaque,</div><div class='ctx'> </div><div class='ctx'> 	fbd-&gt;last_heartbeat_response = jiffies;</div><div class='ctx'> </div><div class='add'>+	/* Capture firmware time for logging and firmware crash check */</div><div class='add'>+	fbd-&gt;firmware_time = fta_get_uint(results, FBNIC_FW_HEARTBEAT_UPTIME);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -579,6 +719,7 @@ static int fbnic_fw_xmit_heartbeat_message(struct fbnic_dev *fbd)</div><div class='ctx'> 		goto free_message;</div><div class='ctx'> </div><div class='ctx'> 	fbd-&gt;last_heartbeat_request = req_time;</div><div class='add'>+	fbd-&gt;prev_firmware_time = fbd-&gt;firmware_time;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='hunk'>@@ -639,7 +780,8 @@ void fbnic_fw_check_heartbeat(struct fbnic_dev *fbd)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Was the last heartbeat response long time ago? */</div><div class='del'>-	if (!fbnic_fw_heartbeat_current(fbd)) {</div><div class='add'>+	if (!fbnic_fw_heartbeat_current(fbd) ||</div><div class='add'>+	    fbd-&gt;firmware_time &lt; fbd-&gt;prev_firmware_time) {</div><div class='ctx'> 		dev_warn(fbd-&gt;dev,</div><div class='ctx'> 			 "Firmware did not respond to heartbeat message\n");</div><div class='ctx'> 		fbd-&gt;fw_heartbeat_enabled = false;</div><div class='hunk'>@@ -651,6 +793,769 @@ void fbnic_fw_check_heartbeat(struct fbnic_dev *fbd)</div><div class='ctx'> 		dev_warn(fbd-&gt;dev, "Failed to send heartbeat message\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * fbnic_fw_xmit_coredump_info_msg - Create and transmit a coredump info message</div><div class='add'>+ * @fbd: FBNIC device structure</div><div class='add'>+ * @cmpl_data: Structure to store info in</div><div class='add'>+ * @force: Force coredump event if one hasn't already occurred</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, negative errno on failure</div><div class='add'>+ *</div><div class='add'>+ * Asks the FW for info related to coredump. If a coredump doesn't exist it</div><div class='add'>+ * can optionally force one if force is true.</div><div class='add'>+ */</div><div class='add'>+int fbnic_fw_xmit_coredump_info_msg(struct fbnic_dev *fbd,</div><div class='add'>+				    struct fbnic_fw_completion *cmpl_data,</div><div class='add'>+				    bool force)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_tlv_msg *msg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	msg = fbnic_tlv_msg_alloc(FBNIC_TLV_MSG_ID_COREDUMP_GET_INFO_REQ);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (force) {</div><div class='add'>+		err = fbnic_tlv_attr_put_flag(msg, FBNIC_FW_COREDUMP_REQ_INFO_CREATE);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_msg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = fbnic_mbx_map_req_w_cmpl(fbd, msg, cmpl_data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_msg;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_msg:</div><div class='add'>+	free_page((unsigned long)msg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct fbnic_tlv_index fbnic_coredump_info_resp_index[] = {</div><div class='add'>+	FBNIC_TLV_ATTR_FLAG(FBNIC_FW_COREDUMP_INFO_AVAILABLE),</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_COREDUMP_INFO_SIZE),</div><div class='add'>+	FBNIC_TLV_ATTR_S32(FBNIC_FW_COREDUMP_INFO_ERROR),</div><div class='add'>+	FBNIC_TLV_ATTR_LAST</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_fw_parse_coredump_info_resp(void *opaque, struct fbnic_tlv_msg **results)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl_data;</div><div class='add'>+	struct fbnic_dev *fbd = opaque;</div><div class='add'>+	u32 msg_type;</div><div class='add'>+	s32 err;</div><div class='add'>+</div><div class='add'>+	/* Verify we have a completion pointer to provide with data */</div><div class='add'>+	msg_type = FBNIC_TLV_MSG_ID_COREDUMP_GET_INFO_RESP;</div><div class='add'>+	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd, msg_type);</div><div class='add'>+	if (!cmpl_data)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	err = fta_get_sint(results, FBNIC_FW_COREDUMP_INFO_ERROR);</div><div class='add'>+	if (err)</div><div class='add'>+		goto msg_err;</div><div class='add'>+</div><div class='add'>+	if (!results[FBNIC_FW_COREDUMP_INFO_AVAILABLE]) {</div><div class='add'>+		err = -ENOENT;</div><div class='add'>+		goto msg_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmpl_data-&gt;u.coredump_info.size =</div><div class='add'>+		fta_get_uint(results, FBNIC_FW_COREDUMP_INFO_SIZE);</div><div class='add'>+</div><div class='add'>+msg_err:</div><div class='add'>+	cmpl_data-&gt;result = err;</div><div class='add'>+	complete(&amp;cmpl_data-&gt;done);</div><div class='add'>+	fbnic_fw_put_cmpl(cmpl_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fbnic_fw_xmit_coredump_read_msg - Create and transmit a coredump read request</div><div class='add'>+ * @fbd: FBNIC device structure</div><div class='add'>+ * @cmpl_data: Completion struct to store coredump</div><div class='add'>+ * @offset: Offset into coredump requested</div><div class='add'>+ * @length: Length of section of coredump to fetch</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, negative errno on failure</div><div class='add'>+ *</div><div class='add'>+ * Asks the firmware to provide a section of the coredump back in a message.</div><div class='add'>+ * The response will have an offset and size matching the values provided.</div><div class='add'>+ */</div><div class='add'>+int fbnic_fw_xmit_coredump_read_msg(struct fbnic_dev *fbd,</div><div class='add'>+				    struct fbnic_fw_completion *cmpl_data,</div><div class='add'>+				    u32 offset, u32 length)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_tlv_msg *msg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	msg = fbnic_tlv_msg_alloc(FBNIC_TLV_MSG_ID_COREDUMP_READ_REQ);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (offset) {</div><div class='add'>+		err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_COREDUMP_READ_OFFSET,</div><div class='add'>+					     offset);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_message;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (length) {</div><div class='add'>+		err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_COREDUMP_READ_LENGTH,</div><div class='add'>+					     length);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_message;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = fbnic_mbx_map_req_w_cmpl(fbd, msg, cmpl_data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_message:</div><div class='add'>+	free_page((unsigned long)msg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct fbnic_tlv_index fbnic_coredump_resp_index[] = {</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_COREDUMP_READ_OFFSET),</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_COREDUMP_READ_LENGTH),</div><div class='add'>+	FBNIC_TLV_ATTR_RAW_DATA(FBNIC_FW_COREDUMP_READ_DATA),</div><div class='add'>+	FBNIC_TLV_ATTR_S32(FBNIC_FW_COREDUMP_READ_ERROR),</div><div class='add'>+	FBNIC_TLV_ATTR_LAST</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int fbnic_fw_parse_coredump_resp(void *opaque,</div><div class='add'>+					struct fbnic_tlv_msg **results)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl_data;</div><div class='add'>+	u32 index, last_offset, last_length;</div><div class='add'>+	struct fbnic_dev *fbd = opaque;</div><div class='add'>+	struct fbnic_tlv_msg *data_hdr;</div><div class='add'>+	u32 length, offset;</div><div class='add'>+	u32 msg_type;</div><div class='add'>+	s32 err;</div><div class='add'>+</div><div class='add'>+	/* Verify we have a completion pointer to provide with data */</div><div class='add'>+	msg_type = FBNIC_TLV_MSG_ID_COREDUMP_READ_RESP;</div><div class='add'>+	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd, msg_type);</div><div class='add'>+	if (!cmpl_data)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	err = fta_get_sint(results, FBNIC_FW_COREDUMP_READ_ERROR);</div><div class='add'>+	if (err)</div><div class='add'>+		goto msg_err;</div><div class='add'>+</div><div class='add'>+	data_hdr = results[FBNIC_FW_COREDUMP_READ_DATA];</div><div class='add'>+	if (!data_hdr) {</div><div class='add'>+		err = -ENODATA;</div><div class='add'>+		goto msg_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	offset = fta_get_uint(results, FBNIC_FW_COREDUMP_READ_OFFSET);</div><div class='add'>+	length = fta_get_uint(results, FBNIC_FW_COREDUMP_READ_LENGTH);</div><div class='add'>+</div><div class='add'>+	if (length &gt; le16_to_cpu(data_hdr-&gt;hdr.len) - sizeof(u32)) {</div><div class='add'>+		dev_err(fbd-&gt;dev, "length greater than size of message\n");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto msg_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Only the last offset can have a length != stride */</div><div class='add'>+	last_length =</div><div class='add'>+		(cmpl_data-&gt;u.coredump.size % cmpl_data-&gt;u.coredump.stride) ? :</div><div class='add'>+		cmpl_data-&gt;u.coredump.stride;</div><div class='add'>+	last_offset = cmpl_data-&gt;u.coredump.size - last_length;</div><div class='add'>+</div><div class='add'>+	/* Verify offset and length */</div><div class='add'>+	if (offset % cmpl_data-&gt;u.coredump.stride || offset &gt; last_offset) {</div><div class='add'>+		dev_err(fbd-&gt;dev, "offset %d out of range\n", offset);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+	} else if (length != ((offset == last_offset) ?</div><div class='add'>+			      last_length : cmpl_data-&gt;u.coredump.stride)) {</div><div class='add'>+		dev_err(fbd-&gt;dev, "length %d out of range for offset %d\n",</div><div class='add'>+			length, offset);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (err)</div><div class='add'>+		goto msg_err;</div><div class='add'>+</div><div class='add'>+	/* If data pointer is NULL it is already filled, just skip the copy */</div><div class='add'>+	index = offset / cmpl_data-&gt;u.coredump.stride;</div><div class='add'>+	if (!cmpl_data-&gt;u.coredump.data[index])</div><div class='add'>+		goto msg_err;</div><div class='add'>+</div><div class='add'>+	/* Copy data and mark index filled by setting pointer to NULL */</div><div class='add'>+	memcpy(cmpl_data-&gt;u.coredump.data[index],</div><div class='add'>+	       fbnic_tlv_attr_get_value_ptr(data_hdr), length);</div><div class='add'>+	cmpl_data-&gt;u.coredump.data[index] = NULL;</div><div class='add'>+</div><div class='add'>+msg_err:</div><div class='add'>+	cmpl_data-&gt;result = err;</div><div class='add'>+	complete(&amp;cmpl_data-&gt;done);</div><div class='add'>+	fbnic_fw_put_cmpl(cmpl_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fbnic_fw_xmit_fw_start_upgrade(struct fbnic_dev *fbd,</div><div class='add'>+				   struct fbnic_fw_completion *cmpl_data,</div><div class='add'>+				   unsigned int id, unsigned int len)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_tlv_msg *msg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!fbnic_fw_present(fbd))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	msg = fbnic_tlv_msg_alloc(FBNIC_TLV_MSG_ID_FW_START_UPGRADE_REQ);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_START_UPGRADE_SECTION, id);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_START_UPGRADE_IMAGE_LENGTH,</div><div class='add'>+				     len);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	err = fbnic_mbx_map_req_w_cmpl(fbd, msg, cmpl_data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_message:</div><div class='add'>+	free_page((unsigned long)msg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct fbnic_tlv_index fbnic_fw_start_upgrade_resp_index[] = {</div><div class='add'>+	FBNIC_TLV_ATTR_S32(FBNIC_FW_START_UPGRADE_ERROR),</div><div class='add'>+	FBNIC_TLV_ATTR_LAST</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int fbnic_fw_parse_fw_start_upgrade_resp(void *opaque,</div><div class='add'>+						struct fbnic_tlv_msg **results)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl_data;</div><div class='add'>+	struct fbnic_dev *fbd = opaque;</div><div class='add'>+	u32 msg_type;</div><div class='add'>+	s32 err;</div><div class='add'>+</div><div class='add'>+	/* Verify we have a completion pointer */</div><div class='add'>+	msg_type = FBNIC_TLV_MSG_ID_FW_START_UPGRADE_REQ;</div><div class='add'>+	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd, msg_type);</div><div class='add'>+	if (!cmpl_data)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	/* Check for errors */</div><div class='add'>+	err = fta_get_sint(results, FBNIC_FW_START_UPGRADE_ERROR);</div><div class='add'>+</div><div class='add'>+	cmpl_data-&gt;result = err;</div><div class='add'>+	complete(&amp;cmpl_data-&gt;done);</div><div class='add'>+	fbnic_fw_put_cmpl(cmpl_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fbnic_fw_xmit_fw_write_chunk(struct fbnic_dev *fbd,</div><div class='add'>+				 const u8 *data, u32 offset, u16 length,</div><div class='add'>+				 int cancel_error)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_tlv_msg *msg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	msg = fbnic_tlv_msg_alloc(FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_RESP);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Report error to FW to cancel upgrade */</div><div class='add'>+	if (cancel_error) {</div><div class='add'>+		err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_WRITE_CHUNK_ERROR,</div><div class='add'>+					     cancel_error);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_message;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data) {</div><div class='add'>+		err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_WRITE_CHUNK_OFFSET,</div><div class='add'>+					     offset);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_message;</div><div class='add'>+</div><div class='add'>+		err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_WRITE_CHUNK_LENGTH,</div><div class='add'>+					     length);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_message;</div><div class='add'>+</div><div class='add'>+		err = fbnic_tlv_attr_put_value(msg, FBNIC_FW_WRITE_CHUNK_DATA,</div><div class='add'>+					       data + offset, length);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_message;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = fbnic_mbx_map_tlv_msg(fbd, msg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_message:</div><div class='add'>+	free_page((unsigned long)msg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct fbnic_tlv_index fbnic_fw_write_chunk_req_index[] = {</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_WRITE_CHUNK_OFFSET),</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_WRITE_CHUNK_LENGTH),</div><div class='add'>+	FBNIC_TLV_ATTR_LAST</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int fbnic_fw_parse_fw_write_chunk_req(void *opaque,</div><div class='add'>+					     struct fbnic_tlv_msg **results)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl_data;</div><div class='add'>+	struct fbnic_dev *fbd = opaque;</div><div class='add'>+	u32 msg_type;</div><div class='add'>+	u32 offset;</div><div class='add'>+	u32 length;</div><div class='add'>+</div><div class='add'>+	/* Verify we have a completion pointer */</div><div class='add'>+	msg_type = FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_REQ;</div><div class='add'>+	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd, msg_type);</div><div class='add'>+	if (!cmpl_data)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	/* Pull length/offset pair and mark it as complete */</div><div class='add'>+	offset = fta_get_uint(results, FBNIC_FW_WRITE_CHUNK_OFFSET);</div><div class='add'>+	length = fta_get_uint(results, FBNIC_FW_WRITE_CHUNK_LENGTH);</div><div class='add'>+	cmpl_data-&gt;u.fw_update.offset = offset;</div><div class='add'>+	cmpl_data-&gt;u.fw_update.length = length;</div><div class='add'>+</div><div class='add'>+	complete(&amp;cmpl_data-&gt;done);</div><div class='add'>+	fbnic_fw_put_cmpl(cmpl_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct fbnic_tlv_index fbnic_fw_finish_upgrade_req_index[] = {</div><div class='add'>+	FBNIC_TLV_ATTR_S32(FBNIC_FW_FINISH_UPGRADE_ERROR),</div><div class='add'>+	FBNIC_TLV_ATTR_LAST</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int fbnic_fw_parse_fw_finish_upgrade_req(void *opaque,</div><div class='add'>+						struct fbnic_tlv_msg **results)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl_data;</div><div class='add'>+	struct fbnic_dev *fbd = opaque;</div><div class='add'>+	u32 msg_type;</div><div class='add'>+	s32 err;</div><div class='add'>+</div><div class='add'>+	/* Verify we have a completion pointer */</div><div class='add'>+	msg_type = FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_REQ;</div><div class='add'>+	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd, msg_type);</div><div class='add'>+	if (!cmpl_data)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	/* Check for errors */</div><div class='add'>+	err = fta_get_sint(results, FBNIC_FW_FINISH_UPGRADE_ERROR);</div><div class='add'>+</div><div class='add'>+	/* Close out update by incrementing offset by length which should</div><div class='add'>+	 * match the total size of the component. Set length to 0 since no</div><div class='add'>+	 * new chunks will be requested.</div><div class='add'>+	 */</div><div class='add'>+	cmpl_data-&gt;u.fw_update.offset += cmpl_data-&gt;u.fw_update.length;</div><div class='add'>+	cmpl_data-&gt;u.fw_update.length = 0;</div><div class='add'>+</div><div class='add'>+	cmpl_data-&gt;result = err;</div><div class='add'>+	complete(&amp;cmpl_data-&gt;done);</div><div class='add'>+	fbnic_fw_put_cmpl(cmpl_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fbnic_fw_xmit_qsfp_read_msg - Transmit a QSFP read request</div><div class='add'>+ * @fbd: FBNIC device structure</div><div class='add'>+ * @cmpl_data: Structure to store EEPROM response in</div><div class='add'>+ * @page: Refers to page number on page enabled QSFP modules</div><div class='add'>+ * @bank: Refers to a collection of pages</div><div class='add'>+ * @offset: Offset into QSFP EEPROM requested</div><div class='add'>+ * @length: Length of section of QSFP EEPROM to fetch</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, negative value on failure</div><div class='add'>+ *</div><div class='add'>+ * Asks the firmware to provide a section of the QSFP EEPROM back in a</div><div class='add'>+ * message. The response will have an offset and size matching the values</div><div class='add'>+ * provided.</div><div class='add'>+ */</div><div class='add'>+int fbnic_fw_xmit_qsfp_read_msg(struct fbnic_dev *fbd,</div><div class='add'>+				struct fbnic_fw_completion *cmpl_data,</div><div class='add'>+				u32 page, u32 bank, u32 offset, u32 length)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_tlv_msg *msg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!length || length &gt; TLV_MAX_DATA)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	msg = fbnic_tlv_msg_alloc(FBNIC_TLV_MSG_ID_QSFP_READ_REQ);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_QSFP_BANK, bank);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_QSFP_PAGE, page);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_QSFP_OFFSET, offset);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_QSFP_LENGTH, length);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	err = fbnic_mbx_map_req_w_cmpl(fbd, msg, cmpl_data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_message:</div><div class='add'>+	free_page((unsigned long)msg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct fbnic_tlv_index fbnic_qsfp_read_resp_index[] = {</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_QSFP_BANK),</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_QSFP_PAGE),</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_QSFP_OFFSET),</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_QSFP_LENGTH),</div><div class='add'>+	FBNIC_TLV_ATTR_RAW_DATA(FBNIC_FW_QSFP_DATA),</div><div class='add'>+	FBNIC_TLV_ATTR_S32(FBNIC_FW_QSFP_ERROR),</div><div class='add'>+	FBNIC_TLV_ATTR_LAST</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int fbnic_fw_parse_qsfp_read_resp(void *opaque,</div><div class='add'>+					 struct fbnic_tlv_msg **results)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl_data;</div><div class='add'>+	struct fbnic_dev *fbd = opaque;</div><div class='add'>+	struct fbnic_tlv_msg *data_hdr;</div><div class='add'>+	u32 length, offset, page, bank;</div><div class='add'>+	u8 *data;</div><div class='add'>+	s32 err;</div><div class='add'>+</div><div class='add'>+	/* Verify we have a completion pointer to provide with data */</div><div class='add'>+	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd,</div><div class='add'>+					      FBNIC_TLV_MSG_ID_QSFP_READ_RESP);</div><div class='add'>+	if (!cmpl_data)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	bank = fta_get_uint(results, FBNIC_FW_QSFP_BANK);</div><div class='add'>+	if (bank != cmpl_data-&gt;u.qsfp.bank) {</div><div class='add'>+		dev_warn(fbd-&gt;dev, "bank not equal to bank requested: %d vs %d\n",</div><div class='add'>+			 bank, cmpl_data-&gt;u.qsfp.bank);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto msg_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	page = fta_get_uint(results, FBNIC_FW_QSFP_PAGE);</div><div class='add'>+	if (page != cmpl_data-&gt;u.qsfp.page) {</div><div class='add'>+		dev_warn(fbd-&gt;dev, "page not equal to page requested: %d vs %d\n",</div><div class='add'>+			 page, cmpl_data-&gt;u.qsfp.page);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto msg_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	offset = fta_get_uint(results, FBNIC_FW_QSFP_OFFSET);</div><div class='add'>+	length = fta_get_uint(results, FBNIC_FW_QSFP_LENGTH);</div><div class='add'>+</div><div class='add'>+	if (length != cmpl_data-&gt;u.qsfp.length ||</div><div class='add'>+	    offset != cmpl_data-&gt;u.qsfp.offset) {</div><div class='add'>+		dev_warn(fbd-&gt;dev,</div><div class='add'>+			 "offset/length not equal to size requested: %d/%d vs %d/%d\n",</div><div class='add'>+			 offset, length,</div><div class='add'>+			 cmpl_data-&gt;u.qsfp.offset, cmpl_data-&gt;u.qsfp.length);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto msg_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = fta_get_sint(results, FBNIC_FW_QSFP_ERROR);</div><div class='add'>+	if (err)</div><div class='add'>+		goto msg_err;</div><div class='add'>+</div><div class='add'>+	data_hdr = results[FBNIC_FW_QSFP_DATA];</div><div class='add'>+	if (!data_hdr) {</div><div class='add'>+		err = -ENODATA;</div><div class='add'>+		goto msg_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Copy data */</div><div class='add'>+	data = fbnic_tlv_attr_get_value_ptr(data_hdr);</div><div class='add'>+	memcpy(cmpl_data-&gt;u.qsfp.data, data, length);</div><div class='add'>+msg_err:</div><div class='add'>+	cmpl_data-&gt;result = err;</div><div class='add'>+	complete(&amp;cmpl_data-&gt;done);</div><div class='add'>+	fbnic_fw_put_cmpl(cmpl_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fbnic_fw_xmit_tsene_read_msg - Create and transmit a sensor read request</div><div class='add'>+ * @fbd: FBNIC device structure</div><div class='add'>+ * @cmpl_data: Completion data structure to store sensor response</div><div class='add'>+ *</div><div class='add'>+ * Asks the firmware to provide an update with the latest sensor data.</div><div class='add'>+ * The response will contain temperature and voltage readings.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error value on failure</div><div class='add'>+ */</div><div class='add'>+int fbnic_fw_xmit_tsene_read_msg(struct fbnic_dev *fbd,</div><div class='add'>+				 struct fbnic_fw_completion *cmpl_data)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_tlv_msg *msg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!fbnic_fw_present(fbd))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	msg = fbnic_tlv_msg_alloc(FBNIC_TLV_MSG_ID_TSENE_READ_REQ);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = fbnic_mbx_map_req_w_cmpl(fbd, msg, cmpl_data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_message:</div><div class='add'>+	free_page((unsigned long)msg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct fbnic_tlv_index fbnic_tsene_read_resp_index[] = {</div><div class='add'>+	FBNIC_TLV_ATTR_S32(FBNIC_FW_TSENE_THERM),</div><div class='add'>+	FBNIC_TLV_ATTR_S32(FBNIC_FW_TSENE_VOLT),</div><div class='add'>+	FBNIC_TLV_ATTR_S32(FBNIC_FW_TSENE_ERROR),</div><div class='add'>+	FBNIC_TLV_ATTR_LAST</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int fbnic_fw_parse_tsene_read_resp(void *opaque,</div><div class='add'>+					  struct fbnic_tlv_msg **results)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl_data;</div><div class='add'>+	struct fbnic_dev *fbd = opaque;</div><div class='add'>+	s32 err_resp;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* Verify we have a completion pointer to provide with data */</div><div class='add'>+	cmpl_data = fbnic_fw_get_cmpl_by_type(fbd,</div><div class='add'>+					      FBNIC_TLV_MSG_ID_TSENE_READ_RESP);</div><div class='add'>+	if (!cmpl_data)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	err_resp = fta_get_sint(results, FBNIC_FW_TSENE_ERROR);</div><div class='add'>+	if (err_resp)</div><div class='add'>+		goto msg_err;</div><div class='add'>+</div><div class='add'>+	if (!results[FBNIC_FW_TSENE_THERM] || !results[FBNIC_FW_TSENE_VOLT]) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto msg_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmpl_data-&gt;u.tsene.millidegrees =</div><div class='add'>+		fta_get_sint(results, FBNIC_FW_TSENE_THERM);</div><div class='add'>+	cmpl_data-&gt;u.tsene.millivolts =</div><div class='add'>+		fta_get_sint(results, FBNIC_FW_TSENE_VOLT);</div><div class='add'>+</div><div class='add'>+msg_err:</div><div class='add'>+	cmpl_data-&gt;result = err_resp ? : err;</div><div class='add'>+	complete(&amp;cmpl_data-&gt;done);</div><div class='add'>+	fbnic_fw_put_cmpl(cmpl_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct fbnic_tlv_index fbnic_fw_log_req_index[] = {</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_LOG_MSEC),</div><div class='add'>+	FBNIC_TLV_ATTR_U64(FBNIC_FW_LOG_INDEX),</div><div class='add'>+	FBNIC_TLV_ATTR_STRING(FBNIC_FW_LOG_MSG, FBNIC_FW_LOG_MAX_SIZE),</div><div class='add'>+	FBNIC_TLV_ATTR_U32(FBNIC_FW_LOG_LENGTH),</div><div class='add'>+	FBNIC_TLV_ATTR_ARRAY(FBNIC_FW_LOG_MSEC_ARRAY),</div><div class='add'>+	FBNIC_TLV_ATTR_ARRAY(FBNIC_FW_LOG_INDEX_ARRAY),</div><div class='add'>+	FBNIC_TLV_ATTR_ARRAY(FBNIC_FW_LOG_MSG_ARRAY),</div><div class='add'>+	FBNIC_TLV_ATTR_LAST</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int fbnic_fw_process_log_array(struct fbnic_tlv_msg **results,</div><div class='add'>+				      u16 length, u16 arr_type_idx,</div><div class='add'>+				      u16 attr_type_idx,</div><div class='add'>+				      struct fbnic_tlv_msg **tlv_array_out)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_tlv_msg *attr;</div><div class='add'>+	int attr_len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!results[attr_type_idx])</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tlv_array_out[0] = results[attr_type_idx];</div><div class='add'>+</div><div class='add'>+	if (!length)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!results[arr_type_idx])</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	attr = results[arr_type_idx];</div><div class='add'>+	attr_len = le16_to_cpu(attr-&gt;hdr.len) / sizeof(u32) - 1;</div><div class='add'>+	err = fbnic_tlv_attr_parse_array(&amp;attr[1], attr_len, &amp;tlv_array_out[1],</div><div class='add'>+					 fbnic_fw_log_req_index,</div><div class='add'>+					 attr_type_idx,</div><div class='add'>+					 length);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_fw_parse_logs(struct fbnic_dev *fbd,</div><div class='add'>+			       struct fbnic_tlv_msg **msec_tlv,</div><div class='add'>+			       struct fbnic_tlv_msg **index_tlv,</div><div class='add'>+			       struct fbnic_tlv_msg **log_tlv,</div><div class='add'>+			       int count)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		char log[FBNIC_FW_LOG_MAX_SIZE];</div><div class='add'>+		ssize_t len;</div><div class='add'>+		u64 index;</div><div class='add'>+		u32 msec;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		if (!msec_tlv[i] || !index_tlv[i] || !log_tlv[i]) {</div><div class='add'>+			dev_warn(fbd-&gt;dev, "Received log message with missing attributes!\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		index = fbnic_tlv_attr_get_signed(index_tlv[i], 0);</div><div class='add'>+		msec = fbnic_tlv_attr_get_signed(msec_tlv[i], 0);</div><div class='add'>+		len = fbnic_tlv_attr_get_string(log_tlv[i], log,</div><div class='add'>+						FBNIC_FW_LOG_MAX_SIZE);</div><div class='add'>+		if (len &lt; 0)</div><div class='add'>+			return len;</div><div class='add'>+</div><div class='add'>+		err = fbnic_fw_log_write(fbd, index, msec, log);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_fw_parse_log_req(void *opaque,</div><div class='add'>+				  struct fbnic_tlv_msg **results)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_tlv_msg *index_tlv[FBNIC_FW_MAX_LOG_HISTORY];</div><div class='add'>+	struct fbnic_tlv_msg *msec_tlv[FBNIC_FW_MAX_LOG_HISTORY];</div><div class='add'>+	struct fbnic_tlv_msg *log_tlv[FBNIC_FW_MAX_LOG_HISTORY];</div><div class='add'>+	struct fbnic_dev *fbd = opaque;</div><div class='add'>+	u16 length;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	length = fta_get_uint(results, FBNIC_FW_LOG_LENGTH);</div><div class='add'>+	if (length &gt;= FBNIC_FW_MAX_LOG_HISTORY)</div><div class='add'>+		return -E2BIG;</div><div class='add'>+</div><div class='add'>+	err = fbnic_fw_process_log_array(results, length,</div><div class='add'>+					 FBNIC_FW_LOG_MSEC_ARRAY,</div><div class='add'>+					 FBNIC_FW_LOG_MSEC, msec_tlv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = fbnic_fw_process_log_array(results, length,</div><div class='add'>+					 FBNIC_FW_LOG_INDEX_ARRAY,</div><div class='add'>+					 FBNIC_FW_LOG_INDEX, index_tlv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = fbnic_fw_process_log_array(results, length,</div><div class='add'>+					 FBNIC_FW_LOG_MSG_ARRAY,</div><div class='add'>+					 FBNIC_FW_LOG_MSG, log_tlv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = fbnic_fw_parse_logs(fbd, msec_tlv, index_tlv, log_tlv,</div><div class='add'>+				  length + 1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fbnic_fw_xmit_send_logs(struct fbnic_dev *fbd, bool enable,</div><div class='add'>+			    bool send_log_history)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_tlv_msg *msg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (fbd-&gt;fw_cap.running.mgmt.version &lt; MIN_FW_VER_CODE_LOG) {</div><div class='add'>+		dev_warn(fbd-&gt;dev, "Firmware version is too old to support firmware logs!\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg = fbnic_tlv_msg_alloc(FBNIC_TLV_MSG_ID_LOG_SEND_LOGS_REQ);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		err = fbnic_tlv_attr_put_flag(msg, FBNIC_SEND_LOGS);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_message;</div><div class='add'>+</div><div class='add'>+		/* Report request for version 1 of logs */</div><div class='add'>+		err = fbnic_tlv_attr_put_int(msg, FBNIC_SEND_LOGS_VERSION,</div><div class='add'>+					     FBNIC_FW_LOG_VERSION);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_message;</div><div class='add'>+</div><div class='add'>+		if (send_log_history) {</div><div class='add'>+			err = fbnic_tlv_attr_put_flag(msg,</div><div class='add'>+						      FBNIC_SEND_LOGS_HISTORY);</div><div class='add'>+			if (err)</div><div class='add'>+				goto free_message;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = fbnic_mbx_map_tlv_msg(fbd, msg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_message:</div><div class='add'>+	free_page((unsigned long)msg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct fbnic_tlv_parser fbnic_fw_tlv_parser[] = {</div><div class='ctx'> 	FBNIC_TLV_PARSER(FW_CAP_RESP, fbnic_fw_cap_resp_index,</div><div class='ctx'> 			 fbnic_fw_parse_cap_resp),</div><div class='hunk'>@@ -658,6 +1563,29 @@ static const struct fbnic_tlv_parser fbnic_fw_tlv_parser[] = {</div><div class='ctx'> 			 fbnic_fw_parse_ownership_resp),</div><div class='ctx'> 	FBNIC_TLV_PARSER(HEARTBEAT_RESP, fbnic_heartbeat_resp_index,</div><div class='ctx'> 			 fbnic_fw_parse_heartbeat_resp),</div><div class='add'>+	FBNIC_TLV_PARSER(COREDUMP_GET_INFO_RESP,</div><div class='add'>+			 fbnic_coredump_info_resp_index,</div><div class='add'>+			 fbnic_fw_parse_coredump_info_resp),</div><div class='add'>+	FBNIC_TLV_PARSER(COREDUMP_READ_RESP, fbnic_coredump_resp_index,</div><div class='add'>+			 fbnic_fw_parse_coredump_resp),</div><div class='add'>+	FBNIC_TLV_PARSER(FW_START_UPGRADE_RESP,</div><div class='add'>+			 fbnic_fw_start_upgrade_resp_index,</div><div class='add'>+			 fbnic_fw_parse_fw_start_upgrade_resp),</div><div class='add'>+	FBNIC_TLV_PARSER(FW_WRITE_CHUNK_REQ,</div><div class='add'>+			 fbnic_fw_write_chunk_req_index,</div><div class='add'>+			 fbnic_fw_parse_fw_write_chunk_req),</div><div class='add'>+	FBNIC_TLV_PARSER(FW_FINISH_UPGRADE_REQ,</div><div class='add'>+			 fbnic_fw_finish_upgrade_req_index,</div><div class='add'>+			 fbnic_fw_parse_fw_finish_upgrade_req),</div><div class='add'>+	FBNIC_TLV_PARSER(QSFP_READ_RESP,</div><div class='add'>+			 fbnic_qsfp_read_resp_index,</div><div class='add'>+			 fbnic_fw_parse_qsfp_read_resp),</div><div class='add'>+	FBNIC_TLV_PARSER(TSENE_READ_RESP,</div><div class='add'>+			 fbnic_tsene_read_resp_index,</div><div class='add'>+			 fbnic_fw_parse_tsene_read_resp),</div><div class='add'>+	FBNIC_TLV_PARSER(LOG_MSG_REQ,</div><div class='add'>+			 fbnic_fw_log_req_index,</div><div class='add'>+			 fbnic_fw_parse_log_req),</div><div class='ctx'> 	FBNIC_TLV_MSG_ERROR</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -726,7 +1654,7 @@ next_page:</div><div class='ctx'> </div><div class='ctx'> void fbnic_mbx_poll(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	fbnic_mbx_postinit(fbd);</div><div class='add'>+	fbnic_mbx_event(fbd);</div><div class='ctx'> </div><div class='ctx'> 	fbnic_mbx_process_tx_msgs(fbd);</div><div class='ctx'> 	fbnic_mbx_process_rx_msgs(fbd);</div><div class='hunk'>@@ -734,60 +1662,222 @@ void fbnic_mbx_poll(struct fbnic_dev *fbd)</div><div class='ctx'> </div><div class='ctx'> int fbnic_mbx_poll_tx_ready(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_fw_mbx *tx_mbx;</div><div class='del'>-	int attempts = 50;</div><div class='add'>+	struct fbnic_fw_mbx *tx_mbx = &amp;fbd-&gt;mbx[FBNIC_IPC_MBX_TX_IDX];</div><div class='add'>+	unsigned long timeout = jiffies + 10 * HZ + 1;</div><div class='add'>+	int err, i;</div><div class='ctx'> </div><div class='del'>-	/* Immediate fail if BAR4 isn't there */</div><div class='del'>-	if (!fbnic_fw_present(fbd))</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	do {</div><div class='add'>+		if (!time_is_after_jiffies(timeout))</div><div class='add'>+			return -ETIMEDOUT;</div><div class='ctx'> </div><div class='del'>-	tx_mbx = &amp;fbd-&gt;mbx[FBNIC_IPC_MBX_TX_IDX];</div><div class='del'>-	while (!tx_mbx-&gt;ready &amp;&amp; --attempts) {</div><div class='ctx'> 		/* Force the firmware to trigger an interrupt response to</div><div class='ctx'> 		 * avoid the mailbox getting stuck closed if the interrupt</div><div class='ctx'> 		 * is reset.</div><div class='ctx'> 		 */</div><div class='del'>-		fbnic_mbx_init_desc_ring(fbd, FBNIC_IPC_MBX_TX_IDX);</div><div class='add'>+		fbnic_mbx_reset_desc_ring(fbd, FBNIC_IPC_MBX_TX_IDX);</div><div class='ctx'> </div><div class='del'>-		msleep(200);</div><div class='add'>+		/* Immediate fail if BAR4 went away */</div><div class='add'>+		if (!fbnic_fw_present(fbd))</div><div class='add'>+			return -ENODEV;</div><div class='add'>+</div><div class='add'>+		msleep(20);</div><div class='add'>+	} while (!fbnic_mbx_event(fbd));</div><div class='add'>+</div><div class='add'>+	/* FW has shown signs of life. Enable DMA and start Tx/Rx */</div><div class='add'>+	for (i = 0; i &lt; FBNIC_IPC_MBX_INDICES; i++)</div><div class='add'>+		fbnic_mbx_init_desc_ring(fbd, i);</div><div class='add'>+</div><div class='add'>+	/* Request an update from the firmware. This should overwrite</div><div class='add'>+	 * mgmt.version once we get the actual version from the firmware</div><div class='add'>+	 * in the capabilities request message.</div><div class='add'>+	 */</div><div class='add'>+	err = fbnic_fw_xmit_simple_msg(fbd, FBNIC_TLV_MSG_ID_HOST_CAP_REQ);</div><div class='add'>+	if (err)</div><div class='add'>+		goto clean_mbx;</div><div class='add'>+</div><div class='add'>+	/* Poll until we get a current management firmware version, use "1"</div><div class='add'>+	 * to indicate we entered the polling state waiting for a response</div><div class='add'>+	 */</div><div class='add'>+	for (fbd-&gt;fw_cap.running.mgmt.version = 1;</div><div class='add'>+	     fbd-&gt;fw_cap.running.mgmt.version &lt; MIN_FW_VER_CODE;) {</div><div class='add'>+		if (!tx_mbx-&gt;ready)</div><div class='add'>+			err = -ENODEV;</div><div class='add'>+		if (err)</div><div class='add'>+			goto clean_mbx;</div><div class='ctx'> </div><div class='add'>+		msleep(20);</div><div class='ctx'> 		fbnic_mbx_poll(fbd);</div><div class='add'>+</div><div class='add'>+		/* set err, but wait till mgmt.version check to report it */</div><div class='add'>+		if (!time_is_after_jiffies(timeout))</div><div class='add'>+			err = -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+clean_mbx:</div><div class='add'>+	/* Cleanup Rx buffers and disable mailbox */</div><div class='add'>+	fbnic_mbx_clean(fbd);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __fbnic_fw_evict_cmpl(struct fbnic_fw_completion *cmpl_data)</div><div class='add'>+{</div><div class='add'>+	cmpl_data-&gt;result = -EPIPE;</div><div class='add'>+	complete(&amp;cmpl_data-&gt;done);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_mbx_evict_all_cmpl(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_MBX_CMPL_SLOTS; i++) {</div><div class='add'>+		struct fbnic_fw_completion *cmpl_data = fbd-&gt;cmpl_data[i];</div><div class='add'>+</div><div class='add'>+		if (cmpl_data)</div><div class='add'>+			__fbnic_fw_evict_cmpl(cmpl_data);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return attempts ? 0 : -ETIMEDOUT;</div><div class='add'>+	memset(fbd-&gt;cmpl_data, 0, sizeof(fbd-&gt;cmpl_data));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fbnic_mbx_flush_tx(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='add'>+	unsigned long timeout = jiffies + 10 * HZ + 1;</div><div class='ctx'> 	struct fbnic_fw_mbx *tx_mbx;</div><div class='del'>-	int attempts = 50;</div><div class='del'>-	u8 count = 0;</div><div class='del'>-</div><div class='del'>-	/* Nothing to do if there is no mailbox */</div><div class='del'>-	if (!fbnic_fw_present(fbd))</div><div class='del'>-		return;</div><div class='add'>+	u8 tail;</div><div class='ctx'> </div><div class='ctx'> 	/* Record current Rx stats */</div><div class='ctx'> 	tx_mbx = &amp;fbd-&gt;mbx[FBNIC_IPC_MBX_TX_IDX];</div><div class='ctx'> </div><div class='del'>-	/* Nothing to do if mailbox never got to ready */</div><div class='del'>-	if (!tx_mbx-&gt;ready)</div><div class='del'>-		return;</div><div class='add'>+	spin_lock_irq(&amp;fbd-&gt;fw_tx_lock);</div><div class='add'>+</div><div class='add'>+	/* Clear ready to prevent any further attempts to transmit */</div><div class='add'>+	tx_mbx-&gt;ready = false;</div><div class='add'>+</div><div class='add'>+	/* Read tail to determine the last tail state for the ring */</div><div class='add'>+	tail = tx_mbx-&gt;tail;</div><div class='add'>+</div><div class='add'>+	/* Flush any completions as we are no longer processing Rx */</div><div class='add'>+	fbnic_mbx_evict_all_cmpl(fbd);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;fbd-&gt;fw_tx_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Give firmware time to process packet,</div><div class='del'>-	 * we will wait up to 10 seconds which is 50 waits of 200ms.</div><div class='add'>+	 * we will wait up to 10 seconds which is 500 waits of 20ms.</div><div class='ctx'> 	 */</div><div class='ctx'> 	do {</div><div class='ctx'> 		u8 head = tx_mbx-&gt;head;</div><div class='ctx'> </div><div class='del'>-		if (head == tx_mbx-&gt;tail)</div><div class='add'>+		/* Tx ring is empty once head == tail */</div><div class='add'>+		if (head == tail)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		msleep(200);</div><div class='add'>+		msleep(20);</div><div class='ctx'> 		fbnic_mbx_process_tx_msgs(fbd);</div><div class='add'>+	} while (time_is_after_jiffies(timeout));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fbnic_fw_xmit_rpc_macda_sync(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_tlv_msg *mac_array;</div><div class='add'>+	int i, addr_count = 0, err;</div><div class='add'>+	struct fbnic_tlv_msg *msg;</div><div class='add'>+	u32 rx_flags = 0;</div><div class='add'>+</div><div class='add'>+	/* Nothing to do if there is no FW to sync with */</div><div class='add'>+	if (!fbd-&gt;mbx[FBNIC_IPC_MBX_TX_IDX].ready)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	msg = fbnic_tlv_msg_alloc(FBNIC_TLV_MSG_ID_RPC_MAC_SYNC_REQ);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		count += (tx_mbx-&gt;head - head) % FBNIC_IPC_MBX_DESC_LEN;</div><div class='del'>-	} while (count &lt; FBNIC_IPC_MBX_DESC_LEN &amp;&amp; --attempts);</div><div class='add'>+	mac_array = fbnic_tlv_attr_nest_start(msg,</div><div class='add'>+					      FBNIC_FW_RPC_MAC_SYNC_UC_ARRAY);</div><div class='add'>+	if (!mac_array)</div><div class='add'>+		goto free_message_nospc;</div><div class='add'>+</div><div class='add'>+	/* Populate the unicast MAC addrs and capture PROMISC/ALLMULTI flags */</div><div class='add'>+	for (addr_count = 0, i = FBNIC_RPC_TCAM_MACDA_PROMISC_IDX;</div><div class='add'>+	     i &gt;= fbd-&gt;mac_addr_boundary; i--) {</div><div class='add'>+		struct fbnic_mac_addr *mac_addr = &amp;fbd-&gt;mac_addr[i];</div><div class='add'>+</div><div class='add'>+		if (mac_addr-&gt;state != FBNIC_TCAM_S_VALID)</div><div class='add'>+			continue;</div><div class='add'>+		if (test_bit(FBNIC_MAC_ADDR_T_ALLMULTI, mac_addr-&gt;act_tcam))</div><div class='add'>+			rx_flags |= FW_RPC_MAC_SYNC_RX_FLAGS_ALLMULTI;</div><div class='add'>+		if (test_bit(FBNIC_MAC_ADDR_T_PROMISC, mac_addr-&gt;act_tcam))</div><div class='add'>+			rx_flags |= FW_RPC_MAC_SYNC_RX_FLAGS_PROMISC;</div><div class='add'>+		if (!test_bit(FBNIC_MAC_ADDR_T_UNICAST, mac_addr-&gt;act_tcam))</div><div class='add'>+			continue;</div><div class='add'>+		if (addr_count == FW_RPC_MAC_SYNC_UC_ARRAY_SIZE) {</div><div class='add'>+			rx_flags |= FW_RPC_MAC_SYNC_RX_FLAGS_PROMISC;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = fbnic_tlv_attr_put_value(mac_array,</div><div class='add'>+					       FBNIC_FW_RPC_MAC_SYNC_MAC_ADDR,</div><div class='add'>+					       mac_addr-&gt;value.addr8,</div><div class='add'>+					       ETH_ALEN);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_message;</div><div class='add'>+		addr_count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Close array */</div><div class='add'>+	fbnic_tlv_attr_nest_stop(msg);</div><div class='add'>+</div><div class='add'>+	mac_array = fbnic_tlv_attr_nest_start(msg,</div><div class='add'>+					      FBNIC_FW_RPC_MAC_SYNC_MC_ARRAY);</div><div class='add'>+	if (!mac_array)</div><div class='add'>+		goto free_message_nospc;</div><div class='add'>+</div><div class='add'>+	/* Repeat for multicast addrs, record BROADCAST/ALLMULTI flags */</div><div class='add'>+	for (addr_count = 0, i = FBNIC_RPC_TCAM_MACDA_BROADCAST_IDX;</div><div class='add'>+	     i &lt; fbd-&gt;mac_addr_boundary; i++) {</div><div class='add'>+		struct fbnic_mac_addr *mac_addr = &amp;fbd-&gt;mac_addr[i];</div><div class='add'>+</div><div class='add'>+		if (mac_addr-&gt;state != FBNIC_TCAM_S_VALID)</div><div class='add'>+			continue;</div><div class='add'>+		if (test_bit(FBNIC_MAC_ADDR_T_BROADCAST, mac_addr-&gt;act_tcam))</div><div class='add'>+			rx_flags |= FW_RPC_MAC_SYNC_RX_FLAGS_BROADCAST;</div><div class='add'>+		if (test_bit(FBNIC_MAC_ADDR_T_ALLMULTI, mac_addr-&gt;act_tcam))</div><div class='add'>+			rx_flags |= FW_RPC_MAC_SYNC_RX_FLAGS_ALLMULTI;</div><div class='add'>+		if (!test_bit(FBNIC_MAC_ADDR_T_MULTICAST, mac_addr-&gt;act_tcam))</div><div class='add'>+			continue;</div><div class='add'>+		if (addr_count == FW_RPC_MAC_SYNC_MC_ARRAY_SIZE) {</div><div class='add'>+			rx_flags |= FW_RPC_MAC_SYNC_RX_FLAGS_ALLMULTI;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = fbnic_tlv_attr_put_value(mac_array,</div><div class='add'>+					       FBNIC_FW_RPC_MAC_SYNC_MAC_ADDR,</div><div class='add'>+					       mac_addr-&gt;value.addr8,</div><div class='add'>+					       ETH_ALEN);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_message;</div><div class='add'>+		addr_count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Close array */</div><div class='add'>+	fbnic_tlv_attr_nest_stop(msg);</div><div class='add'>+</div><div class='add'>+	/* Report flags at end of list */</div><div class='add'>+	err = fbnic_tlv_attr_put_int(msg, FBNIC_FW_RPC_MAC_SYNC_RX_FLAGS,</div><div class='add'>+				     rx_flags);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+</div><div class='add'>+	/* Send message off to FW notifying it of current RPC config */</div><div class='add'>+	err = fbnic_mbx_map_tlv_msg(fbd, msg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_message;</div><div class='add'>+	return 0;</div><div class='add'>+free_message_nospc:</div><div class='add'>+	err = -ENOSPC;</div><div class='add'>+free_message:</div><div class='add'>+	free_page((unsigned long)msg);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version,</div><div class='hunk'>@@ -802,3 +1892,29 @@ void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version,</div><div class='ctx'> 	fbnic_mk_full_fw_ver_str(mgmt-&gt;version, delim, mgmt-&gt;commit,</div><div class='ctx'> 				 fw_version, str_sz);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+struct fbnic_fw_completion *__fbnic_fw_alloc_cmpl(u32 msg_type,</div><div class='add'>+						  size_t priv_size)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *cmpl;</div><div class='add'>+</div><div class='add'>+	cmpl = kzalloc(sizeof(*cmpl) + priv_size, GFP_KERNEL);</div><div class='add'>+	if (!cmpl)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	cmpl-&gt;msg_type = msg_type;</div><div class='add'>+	init_completion(&amp;cmpl-&gt;done);</div><div class='add'>+	kref_init(&amp;cmpl-&gt;ref_count);</div><div class='add'>+</div><div class='add'>+	return cmpl;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct fbnic_fw_completion *fbnic_fw_alloc_cmpl(u32 msg_type)</div><div class='add'>+{</div><div class='add'>+	return __fbnic_fw_alloc_cmpl(msg_type, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_fw_put_cmpl(struct fbnic_fw_completion *fw_cmpl)</div><div class='add'>+{</div><div class='add'>+	kref_put(&amp;fw_cmpl-&gt;ref_count, fbnic_fw_release_cmpl_data);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_fw.h b/drivers/net/ethernet/meta/fbnic/fbnic_fw.h<br/>index 7cd8841920e4..1ecd777aaada 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_fw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_fw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_fw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_fw.h</a></div><div class='hunk'>@@ -19,10 +19,23 @@ struct fbnic_fw_mbx {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> // FW_VER_MAX_SIZE must match ETHTOOL_FWVERS_LEN</div><div class='del'>-#define FBNIC_FW_VER_MAX_SIZE	                32</div><div class='add'>+#define FBNIC_FW_VER_MAX_SIZE			32</div><div class='ctx'> // Formatted version is in the format XX.YY.ZZ_RRR_COMMIT</div><div class='ctx'> #define FBNIC_FW_CAP_RESP_COMMIT_MAX_SIZE	(FBNIC_FW_VER_MAX_SIZE - 13)</div><div class='del'>-#define FBNIC_FW_LOG_MAX_SIZE	                256</div><div class='add'>+#define FBNIC_FW_LOG_VERSION			1</div><div class='add'>+#define FBNIC_FW_LOG_MAX_SIZE			256</div><div class='add'>+/*</div><div class='add'>+ * The max amount of logs which can fit in a single mailbox message. Firmware</div><div class='add'>+ * assumes each mailbox message is 4096B. The amount of messages supported is</div><div class='add'>+ * calculated as 4096 minus headers for message, arrays, and length minus the</div><div class='add'>+ * size of length divided by headers for each array plus the maximum LOG size,</div><div class='add'>+ * and the size of MSEC and INDEX. Put another way:</div><div class='add'>+ *</div><div class='add'>+ * MAX_LOG_HISTORY = ((4096 - TLV_HDR_SZ * 5 - LENGTH_SZ)</div><div class='add'>+ *                    / (FBNIC_FW_LOG_MAX_SIZE + TLV_HDR_SZ * 3 + MSEC_SZ</div><div class='add'>+ *                       + INDEX_SZ))</div><div class='add'>+ */</div><div class='add'>+#define FBNIC_FW_MAX_LOG_HISTORY		14</div><div class='ctx'> </div><div class='ctx'> struct fbnic_fw_ver {</div><div class='ctx'> 	u32 version;</div><div class='hunk'>@@ -38,27 +51,83 @@ struct fbnic_fw_cap {</div><div class='ctx'> 	} stored;</div><div class='ctx'> 	u8	active_slot;</div><div class='ctx'> 	u8	bmc_mac_addr[4][ETH_ALEN];</div><div class='del'>-	u8	bmc_present	: 1;</div><div class='del'>-	u8	all_multi	: 1;</div><div class='add'>+	u8	bmc_present		: 1;</div><div class='add'>+	u8	need_bmc_tcam_reinit	: 1;</div><div class='add'>+	u8	need_bmc_macda_sync	: 1;</div><div class='add'>+	u8	all_multi		: 1;</div><div class='ctx'> 	u8	link_speed;</div><div class='ctx'> 	u8	link_fec;</div><div class='add'>+	u32	anti_rollback_version;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct fbnic_fw_completion {</div><div class='del'>-	struct {</div><div class='del'>-		s32 millivolts;</div><div class='del'>-		s32 millidegrees;</div><div class='del'>-	} tsene;</div><div class='add'>+	u32 msg_type;</div><div class='add'>+	struct completion done;</div><div class='add'>+	struct kref ref_count;</div><div class='add'>+	int result;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u32 size;</div><div class='add'>+		} coredump_info;</div><div class='add'>+		struct {</div><div class='add'>+			u32 size;</div><div class='add'>+			u16 stride;</div><div class='add'>+			u8 *data[];</div><div class='add'>+		} coredump;</div><div class='add'>+		struct {</div><div class='add'>+			u32 offset;</div><div class='add'>+			u32 length;</div><div class='add'>+		} fw_update;</div><div class='add'>+		struct {</div><div class='add'>+			u16 length;</div><div class='add'>+			u8 offset;</div><div class='add'>+			u8 page;</div><div class='add'>+			u8 bank;</div><div class='add'>+			u8 data[] __aligned(sizeof(u32)) __counted_by(length);</div><div class='add'>+		} qsfp;</div><div class='add'>+		struct {</div><div class='add'>+			s32 millivolts;</div><div class='add'>+			s32 millidegrees;</div><div class='add'>+		} tsene;</div><div class='add'>+	} u;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void fbnic_mbx_init(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_mbx_clean(struct fbnic_dev *fbd);</div><div class='add'>+int fbnic_mbx_set_cmpl(struct fbnic_dev *fbd,</div><div class='add'>+		       struct fbnic_fw_completion *cmpl_data);</div><div class='add'>+void fbnic_mbx_clear_cmpl(struct fbnic_dev *fbd,</div><div class='add'>+			  struct fbnic_fw_completion *cmpl_data);</div><div class='ctx'> void fbnic_mbx_poll(struct fbnic_dev *fbd);</div><div class='ctx'> int fbnic_mbx_poll_tx_ready(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_mbx_flush_tx(struct fbnic_dev *fbd);</div><div class='ctx'> int fbnic_fw_xmit_ownership_msg(struct fbnic_dev *fbd, bool take_ownership);</div><div class='ctx'> int fbnic_fw_init_heartbeat(struct fbnic_dev *fbd, bool poll);</div><div class='ctx'> void fbnic_fw_check_heartbeat(struct fbnic_dev *fbd);</div><div class='add'>+int fbnic_fw_xmit_coredump_info_msg(struct fbnic_dev *fbd,</div><div class='add'>+				    struct fbnic_fw_completion *cmpl_data,</div><div class='add'>+				    bool force);</div><div class='add'>+int fbnic_fw_xmit_coredump_read_msg(struct fbnic_dev *fbd,</div><div class='add'>+				    struct fbnic_fw_completion *cmpl_data,</div><div class='add'>+				    u32 offset, u32 length);</div><div class='add'>+int fbnic_fw_xmit_fw_start_upgrade(struct fbnic_dev *fbd,</div><div class='add'>+				   struct fbnic_fw_completion *cmpl_data,</div><div class='add'>+				   unsigned int id, unsigned int len);</div><div class='add'>+int fbnic_fw_xmit_fw_write_chunk(struct fbnic_dev *fbd,</div><div class='add'>+				 const u8 *data, u32 offset, u16 length,</div><div class='add'>+				 int cancel_error);</div><div class='add'>+int fbnic_fw_xmit_qsfp_read_msg(struct fbnic_dev *fbd,</div><div class='add'>+				struct fbnic_fw_completion *cmpl_data,</div><div class='add'>+				u32 page, u32 bank, u32 offset, u32 length);</div><div class='add'>+int fbnic_fw_xmit_tsene_read_msg(struct fbnic_dev *fbd,</div><div class='add'>+				 struct fbnic_fw_completion *cmpl_data);</div><div class='add'>+int fbnic_fw_xmit_send_logs(struct fbnic_dev *fbd, bool enable,</div><div class='add'>+			    bool send_log_history);</div><div class='add'>+int fbnic_fw_xmit_rpc_macda_sync(struct fbnic_dev *fbd);</div><div class='add'>+struct fbnic_fw_completion *__fbnic_fw_alloc_cmpl(u32 msg_type,</div><div class='add'>+						  size_t priv_size);</div><div class='add'>+struct fbnic_fw_completion *fbnic_fw_alloc_cmpl(u32 msg_type);</div><div class='add'>+void fbnic_fw_put_cmpl(struct fbnic_fw_completion *cmpl_data);</div><div class='ctx'> </div><div class='ctx'> #define fbnic_mk_full_fw_ver_str(_rev_id, _delim, _commit, _str, _str_sz) \</div><div class='ctx'> do {									\</div><div class='hunk'>@@ -74,6 +143,15 @@ do {									\</div><div class='ctx'> #define fbnic_mk_fw_ver_str(_rev_id, _str) \</div><div class='ctx'> 	fbnic_mk_full_fw_ver_str(_rev_id, "", "", _str, sizeof(_str))</div><div class='ctx'> </div><div class='add'>+enum {</div><div class='add'>+	QSPI_SECTION_CMRT			= 0,</div><div class='add'>+	QSPI_SECTION_CONTROL_FW			= 1,</div><div class='add'>+	QSPI_SECTION_UCODE			= 2,</div><div class='add'>+	QSPI_SECTION_OPTION_ROM			= 3,</div><div class='add'>+	QSPI_SECTION_USER			= 4,</div><div class='add'>+	QSPI_SECTION_INVALID,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define FW_HEARTBEAT_PERIOD		(10 * HZ)</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -83,6 +161,24 @@ enum {</div><div class='ctx'> 	FBNIC_TLV_MSG_ID_OWNERSHIP_RESP			= 0x13,</div><div class='ctx'> 	FBNIC_TLV_MSG_ID_HEARTBEAT_REQ			= 0x14,</div><div class='ctx'> 	FBNIC_TLV_MSG_ID_HEARTBEAT_RESP			= 0x15,</div><div class='add'>+	FBNIC_TLV_MSG_ID_COREDUMP_GET_INFO_REQ		= 0x18,</div><div class='add'>+	FBNIC_TLV_MSG_ID_COREDUMP_GET_INFO_RESP		= 0x19,</div><div class='add'>+	FBNIC_TLV_MSG_ID_COREDUMP_READ_REQ		= 0x20,</div><div class='add'>+	FBNIC_TLV_MSG_ID_COREDUMP_READ_RESP		= 0x21,</div><div class='add'>+	FBNIC_TLV_MSG_ID_FW_START_UPGRADE_REQ		= 0x22,</div><div class='add'>+	FBNIC_TLV_MSG_ID_FW_START_UPGRADE_RESP		= 0x23,</div><div class='add'>+	FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_REQ		= 0x24,</div><div class='add'>+	FBNIC_TLV_MSG_ID_FW_WRITE_CHUNK_RESP		= 0x25,</div><div class='add'>+	FBNIC_TLV_MSG_ID_FW_FINISH_UPGRADE_REQ		= 0x28,</div><div class='add'>+	FBNIC_TLV_MSG_ID_FW_FINISH_UPGRADE_RESP		= 0x29,</div><div class='add'>+	FBNIC_TLV_MSG_ID_QSFP_READ_REQ			= 0x38,</div><div class='add'>+	FBNIC_TLV_MSG_ID_QSFP_READ_RESP			= 0x39,</div><div class='add'>+	FBNIC_TLV_MSG_ID_TSENE_READ_REQ			= 0x3C,</div><div class='add'>+	FBNIC_TLV_MSG_ID_TSENE_READ_RESP		= 0x3D,</div><div class='add'>+	FBNIC_TLV_MSG_ID_LOG_SEND_LOGS_REQ		= 0x43,</div><div class='add'>+	FBNIC_TLV_MSG_ID_LOG_MSG_REQ			= 0x44,</div><div class='add'>+	FBNIC_TLV_MSG_ID_LOG_MSG_RESP			= 0x45,</div><div class='add'>+	FBNIC_TLV_MSG_ID_RPC_MAC_SYNC_REQ		= 0x46,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_FW_CAP_RESP_VERSION_MAJOR		CSR_GENMASK(31, 24)</div><div class='hunk'>@@ -108,14 +204,15 @@ enum {</div><div class='ctx'> 	FBNIC_FW_CAP_RESP_STORED_CMRT_COMMIT_STR	= 0x10,</div><div class='ctx'> 	FBNIC_FW_CAP_RESP_UEFI_VERSION			= 0x11,</div><div class='ctx'> 	FBNIC_FW_CAP_RESP_UEFI_COMMIT_STR		= 0x12,</div><div class='add'>+	FBNIC_FW_CAP_RESP_ANTI_ROLLBACK_VERSION		= 0x15,</div><div class='ctx'> 	FBNIC_FW_CAP_RESP_MSG_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='del'>-	FBNIC_FW_LINK_SPEED_25R1		= 1,</div><div class='del'>-	FBNIC_FW_LINK_SPEED_50R2		= 2,</div><div class='del'>-	FBNIC_FW_LINK_SPEED_50R1		= 3,</div><div class='del'>-	FBNIC_FW_LINK_SPEED_100R2		= 4,</div><div class='add'>+	FBNIC_FW_LINK_MODE_25CR			= 1,</div><div class='add'>+	FBNIC_FW_LINK_MODE_50CR2		= 2,</div><div class='add'>+	FBNIC_FW_LINK_MODE_50CR			= 3,</div><div class='add'>+	FBNIC_FW_LINK_MODE_100CR2		= 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -125,7 +222,105 @@ enum {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='add'>+	FBNIC_FW_QSFP_BANK			= 0x0,</div><div class='add'>+	FBNIC_FW_QSFP_PAGE			= 0x1,</div><div class='add'>+	FBNIC_FW_QSFP_OFFSET			= 0x2,</div><div class='add'>+	FBNIC_FW_QSFP_LENGTH			= 0x3,</div><div class='add'>+	FBNIC_FW_QSFP_ERROR			= 0x4,</div><div class='add'>+	FBNIC_FW_QSFP_DATA			= 0x5,</div><div class='add'>+	FBNIC_FW_QSFP_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_FW_TSENE_THERM			= 0x0,</div><div class='add'>+	FBNIC_FW_TSENE_VOLT			= 0x1,</div><div class='add'>+	FBNIC_FW_TSENE_ERROR			= 0x2,</div><div class='add'>+	FBNIC_FW_TSENE_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='ctx'> 	FBNIC_FW_OWNERSHIP_FLAG			= 0x0,</div><div class='add'>+	FBNIC_FW_OWNERSHIP_TIME			= 0x1,</div><div class='ctx'> 	FBNIC_FW_OWNERSHIP_MSG_MAX</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_FW_HEARTBEAT_UPTIME               = 0x0,</div><div class='add'>+	FBNIC_FW_HEARTBEAT_NUMBER_OF_MESSAGES   = 0x1,</div><div class='add'>+	FBNIC_FW_HEARTBEAT_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_FW_COREDUMP_REQ_INFO_CREATE	= 0x0,</div><div class='add'>+	FBNIC_FW_COREDUMP_REQ_INFO_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_FW_COREDUMP_INFO_AVAILABLE	= 0x0,</div><div class='add'>+	FBNIC_FW_COREDUMP_INFO_SIZE		= 0x1,</div><div class='add'>+	FBNIC_FW_COREDUMP_INFO_ERROR		= 0x2,</div><div class='add'>+	FBNIC_FW_COREDUMP_INFO_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_FW_COREDUMP_READ_OFFSET		= 0x0,</div><div class='add'>+	FBNIC_FW_COREDUMP_READ_LENGTH		= 0x1,</div><div class='add'>+	FBNIC_FW_COREDUMP_READ_DATA		= 0x2,</div><div class='add'>+	FBNIC_FW_COREDUMP_READ_ERROR		= 0x3,</div><div class='add'>+	FBNIC_FW_COREDUMP_READ_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_FW_START_UPGRADE_ERROR		= 0x0,</div><div class='add'>+	FBNIC_FW_START_UPGRADE_SECTION		= 0x1,</div><div class='add'>+	FBNIC_FW_START_UPGRADE_IMAGE_LENGTH	= 0x2,</div><div class='add'>+	FBNIC_FW_START_UPGRADE_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_FW_WRITE_CHUNK_OFFSET		= 0x0,</div><div class='add'>+	FBNIC_FW_WRITE_CHUNK_LENGTH		= 0x1,</div><div class='add'>+	FBNIC_FW_WRITE_CHUNK_DATA		= 0x2,</div><div class='add'>+	FBNIC_FW_WRITE_CHUNK_ERROR		= 0x3,</div><div class='add'>+	FBNIC_FW_WRITE_CHUNK_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_FW_FINISH_UPGRADE_ERROR		= 0x0,</div><div class='add'>+	FBNIC_FW_FINISH_UPGRADE_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_SEND_LOGS				= 0x0,</div><div class='add'>+	FBNIC_SEND_LOGS_VERSION			= 0x1,</div><div class='add'>+	FBNIC_SEND_LOGS_HISTORY			= 0x2,</div><div class='add'>+	FBNIC_SEND_LOGS_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_FW_LOG_MSEC			= 0x0,</div><div class='add'>+	FBNIC_FW_LOG_INDEX			= 0x1,</div><div class='add'>+	FBNIC_FW_LOG_MSG			= 0x2,</div><div class='add'>+	FBNIC_FW_LOG_LENGTH			= 0x3,</div><div class='add'>+	FBNIC_FW_LOG_MSEC_ARRAY			= 0x4,</div><div class='add'>+	FBNIC_FW_LOG_INDEX_ARRAY		= 0x5,</div><div class='add'>+	FBNIC_FW_LOG_MSG_ARRAY			= 0x6,</div><div class='add'>+	FBNIC_FW_LOG_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_FW_RPC_MAC_SYNC_RX_FLAGS		= 0x0,</div><div class='add'>+	FBNIC_FW_RPC_MAC_SYNC_UC_ARRAY		= 0x1,</div><div class='add'>+	FBNIC_FW_RPC_MAC_SYNC_MC_ARRAY		= 0x2,</div><div class='add'>+	FBNIC_FW_RPC_MAC_SYNC_MAC_ADDR		= 0x3,</div><div class='add'>+	FBNIC_FW_RPC_MAC_SYNC_MSG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define FW_RPC_MAC_SYNC_RX_FLAGS_PROMISC	1</div><div class='add'>+#define FW_RPC_MAC_SYNC_RX_FLAGS_ALLMULTI	2</div><div class='add'>+#define FW_RPC_MAC_SYNC_RX_FLAGS_BROADCAST	4</div><div class='add'>+</div><div class='add'>+#define FW_RPC_MAC_SYNC_UC_ARRAY_SIZE		8</div><div class='add'>+#define FW_RPC_MAC_SYNC_MC_ARRAY_SIZE		8</div><div class='add'>+</div><div class='ctx'> #endif /* _FBNIC_FW_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_fw_log.c b/drivers/net/ethernet/meta/fbnic/fbnic_fw_log.c<br/>new file mode 100644<br/>index 000000000000..85a883dba385<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_fw_log.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_fw_log.c</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) Meta Platforms, Inc. and affiliates. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "fbnic.h"</div><div class='add'>+#include "fbnic_fw.h"</div><div class='add'>+#include "fbnic_fw_log.h"</div><div class='add'>+</div><div class='add'>+void fbnic_fw_log_enable(struct fbnic_dev *fbd, bool send_hist)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!fbnic_fw_log_ready(fbd))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (fbd-&gt;fw_cap.running.mgmt.version &lt; MIN_FW_VER_CODE_HIST)</div><div class='add'>+		send_hist = false;</div><div class='add'>+</div><div class='add'>+	err = fbnic_fw_xmit_send_logs(fbd, true, send_hist);</div><div class='add'>+	if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+		dev_warn(fbd-&gt;dev, "Unable to enable firmware logs: %d\n", err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_fw_log_disable(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = fbnic_fw_xmit_send_logs(fbd, false, false);</div><div class='add'>+	if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+		dev_warn(fbd-&gt;dev, "Unable to disable firmware logs: %d\n",</div><div class='add'>+			 err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fbnic_fw_log_init(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_log *log = &amp;fbd-&gt;fw_log;</div><div class='add'>+	void *data;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(fbnic_fw_log_ready(fbd)))</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	data = vmalloc(FBNIC_FW_LOG_SIZE);</div><div class='add'>+	if (!data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;fbd-&gt;fw_log.lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;log-&gt;entries);</div><div class='add'>+	log-&gt;size = FBNIC_FW_LOG_SIZE;</div><div class='add'>+	log-&gt;data_start = data;</div><div class='add'>+	log-&gt;data_end = data + FBNIC_FW_LOG_SIZE;</div><div class='add'>+</div><div class='add'>+	fbnic_fw_log_enable(fbd, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_fw_log_free(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_log *log = &amp;fbd-&gt;fw_log;</div><div class='add'>+</div><div class='add'>+	if (!fbnic_fw_log_ready(fbd))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fbnic_fw_log_disable(fbd);</div><div class='add'>+	INIT_LIST_HEAD(&amp;log-&gt;entries);</div><div class='add'>+	log-&gt;size = 0;</div><div class='add'>+	vfree(log-&gt;data_start);</div><div class='add'>+	log-&gt;data_start = NULL;</div><div class='add'>+	log-&gt;data_end = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fbnic_fw_log_write(struct fbnic_dev *fbd, u64 index, u32 timestamp,</div><div class='add'>+		       const char *msg)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_log_entry *entry, *head, *tail, *next;</div><div class='add'>+	struct fbnic_fw_log *log = &amp;fbd-&gt;fw_log;</div><div class='add'>+	size_t msg_len = strlen(msg) + 1;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	void *entry_end;</div><div class='add'>+</div><div class='add'>+	if (!fbnic_fw_log_ready(fbd)) {</div><div class='add'>+		dev_err(fbd-&gt;dev, "Firmware sent log entry without being requested!\n");</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;log-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;log-&gt;entries)) {</div><div class='add'>+		entry = log-&gt;data_start;</div><div class='add'>+	} else {</div><div class='add'>+		head = list_first_entry(&amp;log-&gt;entries, typeof(*head), list);</div><div class='add'>+		entry_end = head-&gt;msg + head-&gt;len + 1;</div><div class='add'>+		entry = PTR_ALIGN(entry_end, 8);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	entry_end = entry-&gt;msg + msg_len + 1;</div><div class='add'>+</div><div class='add'>+	/* We've reached the end of the buffer, wrap around */</div><div class='add'>+	if (entry_end &gt; log-&gt;data_end) {</div><div class='add'>+		entry = log-&gt;data_start;</div><div class='add'>+		entry_end = entry-&gt;msg + msg_len + 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Make room for entry by removing from tail. */</div><div class='add'>+	list_for_each_entry_safe_reverse(tail, next, &amp;log-&gt;entries, list) {</div><div class='add'>+		if (entry &lt;= tail &amp;&amp; entry_end &gt; (void *)tail)</div><div class='add'>+			list_del(&amp;tail-&gt;list);</div><div class='add'>+		else</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	entry-&gt;index = index;</div><div class='add'>+	entry-&gt;timestamp = timestamp;</div><div class='add'>+	entry-&gt;len = msg_len;</div><div class='add'>+	strscpy(entry-&gt;msg, msg, entry-&gt;len);</div><div class='add'>+	list_add(&amp;entry-&gt;list, &amp;log-&gt;entries);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;log-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_fw_log.h b/drivers/net/ethernet/meta/fbnic/fbnic_fw_log.h<br/>new file mode 100644<br/>index 000000000000..50ec79003108<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_fw_log.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_fw_log.h</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Meta Platforms, Inc. and affiliates. */</div><div class='add'>+</div><div class='add'>+#ifndef _FBNIC_FW_LOG_H_</div><div class='add'>+#define _FBNIC_FW_LOG_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/* A 512K log buffer was chosen fairly arbitrarily */</div><div class='add'>+#define FBNIC_FW_LOG_SIZE	(512 * 1024) /* bytes */</div><div class='add'>+</div><div class='add'>+/* Firmware log output is prepended with log index followed by a timestamp.</div><div class='add'>+ * The timestamp is similar to Zephyr's format DD:HH:MM:SS.MMM</div><div class='add'>+ */</div><div class='add'>+#define FBNIC_FW_LOG_FMT	"[%5lld] [%02ld:%02ld:%02ld:%02ld.%03ld] %s\n"</div><div class='add'>+</div><div class='add'>+struct fbnic_dev;</div><div class='add'>+</div><div class='add'>+struct fbnic_fw_log_entry {</div><div class='add'>+	struct list_head	list;</div><div class='add'>+	u64			index;</div><div class='add'>+	u32			timestamp;</div><div class='add'>+	u16			len;</div><div class='add'>+	char			msg[] __counted_by(len);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_fw_log {</div><div class='add'>+	void			*data_start;</div><div class='add'>+	void			*data_end;</div><div class='add'>+	size_t			size;</div><div class='add'>+	struct list_head	entries;</div><div class='add'>+	/* Spin lock for accessing or modifying entries */</div><div class='add'>+	spinlock_t		lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define fbnic_fw_log_ready(_fbd)	(!!(_fbd)-&gt;fw_log.data_start)</div><div class='add'>+</div><div class='add'>+void fbnic_fw_log_enable(struct fbnic_dev *fbd, bool send_hist);</div><div class='add'>+void fbnic_fw_log_disable(struct fbnic_dev *fbd);</div><div class='add'>+int fbnic_fw_log_init(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_fw_log_free(struct fbnic_dev *fbd);</div><div class='add'>+int fbnic_fw_log_write(struct fbnic_dev *fbd, u64 index, u32 timestamp,</div><div class='add'>+		       const char *msg);</div><div class='add'>+#endif /* _FBNIC_FW_LOG_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c b/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c<br/>index a0acc7606aa1..8b9b2076beec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c</a></div><div class='hunk'>@@ -1,5 +1,31 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) Meta Platforms, Inc. and affiliates. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "fbnic.h"</div><div class='ctx'> </div><div class='add'>+static void fbnic_hw_stat_rst32(struct fbnic_dev *fbd, u32 reg,</div><div class='add'>+				struct fbnic_stat_counter *stat)</div><div class='add'>+{</div><div class='add'>+	/* We do not touch the "value" field here.</div><div class='add'>+	 * It gets zeroed out on fbd structure allocation.</div><div class='add'>+	 * After that we want it to grow continuously</div><div class='add'>+	 * through device resets and power state changes.</div><div class='add'>+	 */</div><div class='add'>+	stat-&gt;u.old_reg_value_32 = rd32(fbd, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_hw_stat_rd32(struct fbnic_dev *fbd, u32 reg,</div><div class='add'>+			       struct fbnic_stat_counter *stat)</div><div class='add'>+{</div><div class='add'>+	u32 new_reg_value;</div><div class='add'>+</div><div class='add'>+	new_reg_value = rd32(fbd, reg);</div><div class='add'>+	stat-&gt;value += new_reg_value - stat-&gt;u.old_reg_value_32;</div><div class='add'>+	stat-&gt;u.old_reg_value_32 = new_reg_value;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> u64 fbnic_stat_rd64(struct fbnic_dev *fbd, u32 reg, u32 offset)</div><div class='ctx'> {</div><div class='ctx'> 	u32 prev_upper, upper, lower, diff;</div><div class='hunk'>@@ -25,3 +51,551 @@ u64 fbnic_stat_rd64(struct fbnic_dev *fbd, u32 reg, u32 offset)</div><div class='ctx'> 	 */</div><div class='ctx'> 	return ((u64)upper &lt;&lt; 32);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static void fbnic_hw_stat_rst64(struct fbnic_dev *fbd, u32 reg, s32 offset,</div><div class='add'>+				struct fbnic_stat_counter *stat)</div><div class='add'>+{</div><div class='add'>+	/* Record initial counter values and compute deltas from there to ensure</div><div class='add'>+	 * stats start at 0 after reboot/reset. This avoids exposing absolute</div><div class='add'>+	 * hardware counter values to userspace.</div><div class='add'>+	 */</div><div class='add'>+	stat-&gt;u.old_reg_value_64 = fbnic_stat_rd64(fbd, reg, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_hw_stat_rd64(struct fbnic_dev *fbd, u32 reg, s32 offset,</div><div class='add'>+			       struct fbnic_stat_counter *stat)</div><div class='add'>+{</div><div class='add'>+	u64 new_reg_value;</div><div class='add'>+</div><div class='add'>+	new_reg_value = fbnic_stat_rd64(fbd, reg, offset);</div><div class='add'>+	stat-&gt;value += new_reg_value - stat-&gt;u.old_reg_value_64;</div><div class='add'>+	stat-&gt;u.old_reg_value_64 = new_reg_value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_tmi_stats(struct fbnic_dev *fbd,</div><div class='add'>+				  struct fbnic_tmi_stats *tmi)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_TMI_DROP_PKTS, &amp;tmi-&gt;drop.frames);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd, FBNIC_TMI_DROP_BYTE_L, 1, &amp;tmi-&gt;drop.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rst32(fbd,</div><div class='add'>+			    FBNIC_TMI_ILLEGAL_PTP_REQS,</div><div class='add'>+			    &amp;tmi-&gt;ptp_illegal_req);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_TMI_GOOD_PTP_TS, &amp;tmi-&gt;ptp_good_ts);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_TMI_BAD_PTP_TS, &amp;tmi-&gt;ptp_bad_ts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_tmi_stats32(struct fbnic_dev *fbd,</div><div class='add'>+				  struct fbnic_tmi_stats *tmi)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_TMI_DROP_PKTS, &amp;tmi-&gt;drop.frames);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd32(fbd,</div><div class='add'>+			   FBNIC_TMI_ILLEGAL_PTP_REQS,</div><div class='add'>+			   &amp;tmi-&gt;ptp_illegal_req);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_TMI_GOOD_PTP_TS, &amp;tmi-&gt;ptp_good_ts);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_TMI_BAD_PTP_TS, &amp;tmi-&gt;ptp_bad_ts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_tmi_stats(struct fbnic_dev *fbd,</div><div class='add'>+				struct fbnic_tmi_stats *tmi)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd64(fbd, FBNIC_TMI_DROP_BYTE_L, 1, &amp;tmi-&gt;drop.bytes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_tti_stats(struct fbnic_dev *fbd,</div><div class='add'>+				  struct fbnic_tti_stats *tti)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rst32(fbd,</div><div class='add'>+			    FBNIC_TCE_TTI_CM_DROP_PKTS,</div><div class='add'>+			    &amp;tti-&gt;cm_drop.frames);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_TCE_TTI_CM_DROP_BYTE_L,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;tti-&gt;cm_drop.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rst32(fbd,</div><div class='add'>+			    FBNIC_TCE_TTI_FRAME_DROP_PKTS,</div><div class='add'>+			    &amp;tti-&gt;frame_drop.frames);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_TCE_TTI_FRAME_DROP_BYTE_L,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;tti-&gt;frame_drop.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rst32(fbd,</div><div class='add'>+			    FBNIC_TCE_TBI_DROP_PKTS,</div><div class='add'>+			    &amp;tti-&gt;tbi_drop.frames);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_TCE_TBI_DROP_BYTE_L,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;tti-&gt;tbi_drop.bytes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_tti_stats32(struct fbnic_dev *fbd,</div><div class='add'>+				  struct fbnic_tti_stats *tti)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd32(fbd,</div><div class='add'>+			   FBNIC_TCE_TTI_CM_DROP_PKTS,</div><div class='add'>+			   &amp;tti-&gt;cm_drop.frames);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd32(fbd,</div><div class='add'>+			   FBNIC_TCE_TTI_FRAME_DROP_PKTS,</div><div class='add'>+			   &amp;tti-&gt;frame_drop.frames);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd32(fbd,</div><div class='add'>+			   FBNIC_TCE_TBI_DROP_PKTS,</div><div class='add'>+			   &amp;tti-&gt;tbi_drop.frames);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_tti_stats(struct fbnic_dev *fbd,</div><div class='add'>+				struct fbnic_tti_stats *tti)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_TCE_TTI_CM_DROP_BYTE_L,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;tti-&gt;cm_drop.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_TCE_TTI_FRAME_DROP_BYTE_L,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;tti-&gt;frame_drop.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_TCE_TBI_DROP_BYTE_L,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;tti-&gt;tbi_drop.bytes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_rpc_stats(struct fbnic_dev *fbd,</div><div class='add'>+				  struct fbnic_rpc_stats *rpc)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rst32(fbd,</div><div class='add'>+			    FBNIC_RPC_CNTR_UNKN_ETYPE,</div><div class='add'>+			    &amp;rpc-&gt;unkn_etype);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd,</div><div class='add'>+			    FBNIC_RPC_CNTR_UNKN_EXT_HDR,</div><div class='add'>+			    &amp;rpc-&gt;unkn_ext_hdr);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RPC_CNTR_IPV4_FRAG, &amp;rpc-&gt;ipv4_frag);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RPC_CNTR_IPV6_FRAG, &amp;rpc-&gt;ipv6_frag);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RPC_CNTR_IPV4_ESP, &amp;rpc-&gt;ipv4_esp);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RPC_CNTR_IPV6_ESP, &amp;rpc-&gt;ipv6_esp);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RPC_CNTR_TCP_OPT_ERR, &amp;rpc-&gt;tcp_opt_err);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd,</div><div class='add'>+			    FBNIC_RPC_CNTR_OUT_OF_HDR_ERR,</div><div class='add'>+			    &amp;rpc-&gt;out_of_hdr_err);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd,</div><div class='add'>+			    FBNIC_RPC_CNTR_OVR_SIZE_ERR,</div><div class='add'>+			    &amp;rpc-&gt;ovr_size_err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rpc_stats32(struct fbnic_dev *fbd,</div><div class='add'>+				  struct fbnic_rpc_stats *rpc)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd32(fbd,</div><div class='add'>+			   FBNIC_RPC_CNTR_UNKN_ETYPE,</div><div class='add'>+			   &amp;rpc-&gt;unkn_etype);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd,</div><div class='add'>+			   FBNIC_RPC_CNTR_UNKN_EXT_HDR,</div><div class='add'>+			   &amp;rpc-&gt;unkn_ext_hdr);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RPC_CNTR_IPV4_FRAG, &amp;rpc-&gt;ipv4_frag);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RPC_CNTR_IPV6_FRAG, &amp;rpc-&gt;ipv6_frag);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RPC_CNTR_IPV4_ESP, &amp;rpc-&gt;ipv4_esp);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RPC_CNTR_IPV6_ESP, &amp;rpc-&gt;ipv6_esp);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RPC_CNTR_TCP_OPT_ERR, &amp;rpc-&gt;tcp_opt_err);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd,</div><div class='add'>+			   FBNIC_RPC_CNTR_OUT_OF_HDR_ERR,</div><div class='add'>+			   &amp;rpc-&gt;out_of_hdr_err);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd,</div><div class='add'>+			   FBNIC_RPC_CNTR_OVR_SIZE_ERR,</div><div class='add'>+			   &amp;rpc-&gt;ovr_size_err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_rxb_fifo_stats(struct fbnic_dev *fbd, int i,</div><div class='add'>+				       struct fbnic_rxb_fifo_stats *fifo)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_DROP_FRMS_STS(i),</div><div class='add'>+			    &amp;fifo-&gt;drop.frames);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd, FBNIC_RXB_DROP_BYTES_STS_L(i), 1,</div><div class='add'>+			    &amp;fifo-&gt;drop.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_TRUN_FRMS_STS(i),</div><div class='add'>+			    &amp;fifo-&gt;trunc.frames);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd, FBNIC_RXB_TRUN_BYTES_STS_L(i), 1,</div><div class='add'>+			    &amp;fifo-&gt;trunc.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_TRANS_DROP_STS(i),</div><div class='add'>+			    &amp;fifo-&gt;trans_drop);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_TRANS_ECN_STS(i),</div><div class='add'>+			    &amp;fifo-&gt;trans_ecn);</div><div class='add'>+</div><div class='add'>+	fifo-&gt;level.u.old_reg_value_32 = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_rxb_enq_stats(struct fbnic_dev *fbd, int i,</div><div class='add'>+				      struct fbnic_rxb_enqueue_stats *enq)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_DRBO_FRM_CNT_SRC(i),</div><div class='add'>+			    &amp;enq-&gt;drbo.frames);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd, FBNIC_RXB_DRBO_BYTE_CNT_SRC_L(i), 4,</div><div class='add'>+			    &amp;enq-&gt;drbo.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_INTEGRITY_ERR(i),</div><div class='add'>+			    &amp;enq-&gt;integrity_err);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_MAC_ERR(i),</div><div class='add'>+			    &amp;enq-&gt;mac_err);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_PARSER_ERR(i),</div><div class='add'>+			    &amp;enq-&gt;parser_err);</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_FRM_ERR(i),</div><div class='add'>+			    &amp;enq-&gt;frm_err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_rxb_deq_stats(struct fbnic_dev *fbd, int i,</div><div class='add'>+				      struct fbnic_rxb_dequeue_stats *deq)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_INTF_FRM_CNT_DST(i),</div><div class='add'>+			    &amp;deq-&gt;intf.frames);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd, FBNIC_RXB_INTF_BYTE_CNT_DST_L(i), 4,</div><div class='add'>+			    &amp;deq-&gt;intf.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rst32(fbd, FBNIC_RXB_PBUF_FRM_CNT_DST(i),</div><div class='add'>+			    &amp;deq-&gt;pbuf.frames);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd, FBNIC_RXB_PBUF_BYTE_CNT_DST_L(i), 4,</div><div class='add'>+			    &amp;deq-&gt;pbuf.bytes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_rxb_stats(struct fbnic_dev *fbd,</div><div class='add'>+				  struct fbnic_rxb_stats *rxb)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RXB_FIFO_INDICES; i++)</div><div class='add'>+		fbnic_reset_rxb_fifo_stats(fbd, i, &amp;rxb-&gt;fifo[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RXB_INTF_INDICES; i++) {</div><div class='add'>+		fbnic_reset_rxb_enq_stats(fbd, i, &amp;rxb-&gt;enq[i]);</div><div class='add'>+		fbnic_reset_rxb_deq_stats(fbd, i, &amp;rxb-&gt;deq[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_fifo_stats32(struct fbnic_dev *fbd, int i,</div><div class='add'>+				       struct fbnic_rxb_fifo_stats *fifo)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_DROP_FRMS_STS(i),</div><div class='add'>+			   &amp;fifo-&gt;drop.frames);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_TRUN_FRMS_STS(i),</div><div class='add'>+			   &amp;fifo-&gt;trunc.frames);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_TRANS_DROP_STS(i),</div><div class='add'>+			   &amp;fifo-&gt;trans_drop);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_TRANS_ECN_STS(i),</div><div class='add'>+			   &amp;fifo-&gt;trans_ecn);</div><div class='add'>+</div><div class='add'>+	fifo-&gt;level.value = rd32(fbd, FBNIC_RXB_PBUF_FIFO_LEVEL(i));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_fifo_stats(struct fbnic_dev *fbd, int i,</div><div class='add'>+				     struct fbnic_rxb_fifo_stats *fifo)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd64(fbd, FBNIC_RXB_DROP_BYTES_STS_L(i), 1,</div><div class='add'>+			   &amp;fifo-&gt;drop.bytes);</div><div class='add'>+	fbnic_hw_stat_rd64(fbd, FBNIC_RXB_TRUN_BYTES_STS_L(i), 1,</div><div class='add'>+			   &amp;fifo-&gt;trunc.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_get_rxb_fifo_stats32(fbd, i, fifo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_enq_stats32(struct fbnic_dev *fbd, int i,</div><div class='add'>+				      struct fbnic_rxb_enqueue_stats *enq)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_DRBO_FRM_CNT_SRC(i),</div><div class='add'>+			   &amp;enq-&gt;drbo.frames);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_INTEGRITY_ERR(i),</div><div class='add'>+			   &amp;enq-&gt;integrity_err);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_MAC_ERR(i),</div><div class='add'>+			   &amp;enq-&gt;mac_err);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_PARSER_ERR(i),</div><div class='add'>+			   &amp;enq-&gt;parser_err);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_FRM_ERR(i),</div><div class='add'>+			   &amp;enq-&gt;frm_err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_enq_stats(struct fbnic_dev *fbd, int i,</div><div class='add'>+				    struct fbnic_rxb_enqueue_stats *enq)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd64(fbd, FBNIC_RXB_DRBO_BYTE_CNT_SRC_L(i), 4,</div><div class='add'>+			   &amp;enq-&gt;drbo.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_get_rxb_enq_stats32(fbd, i, enq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_deq_stats32(struct fbnic_dev *fbd, int i,</div><div class='add'>+				      struct fbnic_rxb_dequeue_stats *deq)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_INTF_FRM_CNT_DST(i),</div><div class='add'>+			   &amp;deq-&gt;intf.frames);</div><div class='add'>+	fbnic_hw_stat_rd32(fbd, FBNIC_RXB_PBUF_FRM_CNT_DST(i),</div><div class='add'>+			   &amp;deq-&gt;pbuf.frames);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_deq_stats(struct fbnic_dev *fbd, int i,</div><div class='add'>+				    struct fbnic_rxb_dequeue_stats *deq)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd64(fbd, FBNIC_RXB_INTF_BYTE_CNT_DST_L(i), 4,</div><div class='add'>+			   &amp;deq-&gt;intf.bytes);</div><div class='add'>+	fbnic_hw_stat_rd64(fbd, FBNIC_RXB_PBUF_BYTE_CNT_DST_L(i), 4,</div><div class='add'>+			   &amp;deq-&gt;pbuf.bytes);</div><div class='add'>+</div><div class='add'>+	fbnic_get_rxb_deq_stats32(fbd, i, deq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_stats32(struct fbnic_dev *fbd,</div><div class='add'>+				  struct fbnic_rxb_stats *rxb)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RXB_FIFO_INDICES; i++)</div><div class='add'>+		fbnic_get_rxb_fifo_stats32(fbd, i, &amp;rxb-&gt;fifo[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RXB_INTF_INDICES; i++) {</div><div class='add'>+		fbnic_get_rxb_enq_stats32(fbd, i, &amp;rxb-&gt;enq[i]);</div><div class='add'>+		fbnic_get_rxb_deq_stats32(fbd, i, &amp;rxb-&gt;deq[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_rxb_stats(struct fbnic_dev *fbd,</div><div class='add'>+				struct fbnic_rxb_stats *rxb)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RXB_FIFO_INDICES; i++)</div><div class='add'>+		fbnic_get_rxb_fifo_stats(fbd, i, &amp;rxb-&gt;fifo[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RXB_INTF_INDICES; i++) {</div><div class='add'>+		fbnic_get_rxb_enq_stats(fbd, i, &amp;rxb-&gt;enq[i]);</div><div class='add'>+		fbnic_get_rxb_deq_stats(fbd, i, &amp;rxb-&gt;deq[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_hw_rxq_stats(struct fbnic_dev *fbd,</div><div class='add'>+				     struct fbnic_hw_q_stats *hw_q)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fbd-&gt;max_num_queues; i++, hw_q++) {</div><div class='add'>+		u32 base = FBNIC_QUEUE(i);</div><div class='add'>+</div><div class='add'>+		fbnic_hw_stat_rst32(fbd,</div><div class='add'>+				    base + FBNIC_QUEUE_RDE_PKT_ERR_CNT,</div><div class='add'>+				    &amp;hw_q-&gt;rde_pkt_err);</div><div class='add'>+		fbnic_hw_stat_rst32(fbd,</div><div class='add'>+				    base + FBNIC_QUEUE_RDE_CQ_DROP_CNT,</div><div class='add'>+				    &amp;hw_q-&gt;rde_pkt_cq_drop);</div><div class='add'>+		fbnic_hw_stat_rst32(fbd,</div><div class='add'>+				    base + FBNIC_QUEUE_RDE_BDQ_DROP_CNT,</div><div class='add'>+				    &amp;hw_q-&gt;rde_pkt_bdq_drop);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_hw_rxq_stats32(struct fbnic_dev *fbd,</div><div class='add'>+				     struct fbnic_hw_q_stats *hw_q)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fbd-&gt;max_num_queues; i++, hw_q++) {</div><div class='add'>+		u32 base = FBNIC_QUEUE(i);</div><div class='add'>+</div><div class='add'>+		fbnic_hw_stat_rd32(fbd,</div><div class='add'>+				   base + FBNIC_QUEUE_RDE_PKT_ERR_CNT,</div><div class='add'>+				   &amp;hw_q-&gt;rde_pkt_err);</div><div class='add'>+		fbnic_hw_stat_rd32(fbd,</div><div class='add'>+				   base + FBNIC_QUEUE_RDE_CQ_DROP_CNT,</div><div class='add'>+				   &amp;hw_q-&gt;rde_pkt_cq_drop);</div><div class='add'>+		fbnic_hw_stat_rd32(fbd,</div><div class='add'>+				   base + FBNIC_QUEUE_RDE_BDQ_DROP_CNT,</div><div class='add'>+				   &amp;hw_q-&gt;rde_pkt_bdq_drop);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_get_hw_q_stats(struct fbnic_dev *fbd,</div><div class='add'>+			  struct fbnic_hw_q_stats *hw_q)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+	fbnic_get_hw_rxq_stats32(fbd, hw_q);</div><div class='add'>+	spin_unlock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_pcie_stats_asic(struct fbnic_dev *fbd,</div><div class='add'>+					struct fbnic_pcie_stats *pcie)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_PUL_USER_OB_RD_TLP_CNT_31_0,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;pcie-&gt;ob_rd_tlp);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_PUL_USER_OB_RD_DWORD_CNT_31_0,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;pcie-&gt;ob_rd_dword);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_PUL_USER_OB_CPL_TLP_CNT_31_0,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;pcie-&gt;ob_cpl_tlp);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_PUL_USER_OB_CPL_DWORD_CNT_31_0,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;pcie-&gt;ob_cpl_dword);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_PUL_USER_OB_WR_TLP_CNT_31_0,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;pcie-&gt;ob_wr_tlp);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_PUL_USER_OB_WR_DWORD_CNT_31_0,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;pcie-&gt;ob_wr_dword);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_PUL_USER_OB_RD_DBG_CNT_TAG_31_0,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;pcie-&gt;ob_rd_no_tag);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_PUL_USER_OB_RD_DBG_CNT_CPL_CRED_31_0,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;pcie-&gt;ob_rd_no_cpl_cred);</div><div class='add'>+	fbnic_hw_stat_rst64(fbd,</div><div class='add'>+			    FBNIC_PUL_USER_OB_RD_DBG_CNT_NP_CRED_31_0,</div><div class='add'>+			    1,</div><div class='add'>+			    &amp;pcie-&gt;ob_rd_no_np_cred);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_pcie_stats_asic64(struct fbnic_dev *fbd,</div><div class='add'>+					struct fbnic_pcie_stats *pcie)</div><div class='add'>+{</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_PUL_USER_OB_RD_TLP_CNT_31_0,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;pcie-&gt;ob_rd_tlp);</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_PUL_USER_OB_RD_DWORD_CNT_31_0,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;pcie-&gt;ob_rd_dword);</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_PUL_USER_OB_WR_TLP_CNT_31_0,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;pcie-&gt;ob_wr_tlp);</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_PUL_USER_OB_WR_DWORD_CNT_31_0,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;pcie-&gt;ob_wr_dword);</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_PUL_USER_OB_CPL_TLP_CNT_31_0,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;pcie-&gt;ob_cpl_tlp);</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_PUL_USER_OB_CPL_DWORD_CNT_31_0,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;pcie-&gt;ob_cpl_dword);</div><div class='add'>+</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_PUL_USER_OB_RD_DBG_CNT_TAG_31_0,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;pcie-&gt;ob_rd_no_tag);</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_PUL_USER_OB_RD_DBG_CNT_CPL_CRED_31_0,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;pcie-&gt;ob_rd_no_cpl_cred);</div><div class='add'>+	fbnic_hw_stat_rd64(fbd,</div><div class='add'>+			   FBNIC_PUL_USER_OB_RD_DBG_CNT_NP_CRED_31_0,</div><div class='add'>+			   1,</div><div class='add'>+			   &amp;pcie-&gt;ob_rd_no_np_cred);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_phy_stats(struct fbnic_dev *fbd,</div><div class='add'>+				  struct fbnic_phy_stats *phy_stats)</div><div class='add'>+{</div><div class='add'>+	const struct fbnic_mac *mac = fbd-&gt;mac;</div><div class='add'>+</div><div class='add'>+	mac-&gt;get_fec_stats(fbd, true, &amp;phy_stats-&gt;fec);</div><div class='add'>+	mac-&gt;get_pcs_stats(fbd, true, &amp;phy_stats-&gt;pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_get_phy_stats32(struct fbnic_dev *fbd,</div><div class='add'>+				  struct fbnic_phy_stats *phy_stats)</div><div class='add'>+{</div><div class='add'>+	const struct fbnic_mac *mac = fbd-&gt;mac;</div><div class='add'>+</div><div class='add'>+	mac-&gt;get_fec_stats(fbd, false, &amp;phy_stats-&gt;fec);</div><div class='add'>+	mac-&gt;get_pcs_stats(fbd, false, &amp;phy_stats-&gt;pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_hw_mac_stats(struct fbnic_dev *fbd,</div><div class='add'>+				     struct fbnic_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	const struct fbnic_mac *mac = fbd-&gt;mac;</div><div class='add'>+</div><div class='add'>+	mac-&gt;get_eth_mac_stats(fbd, true, &amp;mac_stats-&gt;eth_mac);</div><div class='add'>+	mac-&gt;get_pause_stats(fbd, true, &amp;mac_stats-&gt;pause);</div><div class='add'>+	mac-&gt;get_eth_ctrl_stats(fbd, true, &amp;mac_stats-&gt;eth_ctrl);</div><div class='add'>+	mac-&gt;get_rmon_stats(fbd, true, &amp;mac_stats-&gt;rmon);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_reset_hw_stats(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+	fbnic_reset_phy_stats(fbd, &amp;fbd-&gt;hw_stats.phy);</div><div class='add'>+	fbnic_reset_tmi_stats(fbd, &amp;fbd-&gt;hw_stats.tmi);</div><div class='add'>+	fbnic_reset_tti_stats(fbd, &amp;fbd-&gt;hw_stats.tti);</div><div class='add'>+	fbnic_reset_rpc_stats(fbd, &amp;fbd-&gt;hw_stats.rpc);</div><div class='add'>+	fbnic_reset_rxb_stats(fbd, &amp;fbd-&gt;hw_stats.rxb);</div><div class='add'>+	fbnic_reset_hw_rxq_stats(fbd, fbd-&gt;hw_stats.hw_q);</div><div class='add'>+	fbnic_reset_pcie_stats_asic(fbd, &amp;fbd-&gt;hw_stats.pcie);</div><div class='add'>+	spin_unlock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+</div><div class='add'>+	/* Once registered, the only other access to MAC stats is via the</div><div class='add'>+	 * ethtool API which is protected by the rtnl_lock. The call to</div><div class='add'>+	 * fbnic_reset_hw_stats() during PCI recovery is also protected</div><div class='add'>+	 * by the rtnl_lock hence, we don't need the spinlock to access</div><div class='add'>+	 * the MAC stats.</div><div class='add'>+	 */</div><div class='add'>+	if (fbd-&gt;netdev)</div><div class='add'>+		ASSERT_RTNL();</div><div class='add'>+	fbnic_reset_hw_mac_stats(fbd, &amp;fbd-&gt;hw_stats.mac);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_init_hw_stats(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	spin_lock_init(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+</div><div class='add'>+	fbnic_reset_hw_stats(fbd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __fbnic_get_hw_stats32(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	fbnic_get_phy_stats32(fbd, &amp;fbd-&gt;hw_stats.phy);</div><div class='add'>+	fbnic_get_tmi_stats32(fbd, &amp;fbd-&gt;hw_stats.tmi);</div><div class='add'>+	fbnic_get_tti_stats32(fbd, &amp;fbd-&gt;hw_stats.tti);</div><div class='add'>+	fbnic_get_rpc_stats32(fbd, &amp;fbd-&gt;hw_stats.rpc);</div><div class='add'>+	fbnic_get_rxb_stats32(fbd, &amp;fbd-&gt;hw_stats.rxb);</div><div class='add'>+	fbnic_get_hw_rxq_stats32(fbd, fbd-&gt;hw_stats.hw_q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_get_hw_stats32(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+	__fbnic_get_hw_stats32(fbd);</div><div class='add'>+	spin_unlock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_get_hw_stats(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	spin_lock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+	__fbnic_get_hw_stats32(fbd);</div><div class='add'>+</div><div class='add'>+	fbnic_get_tmi_stats(fbd, &amp;fbd-&gt;hw_stats.tmi);</div><div class='add'>+	fbnic_get_tti_stats(fbd, &amp;fbd-&gt;hw_stats.tti);</div><div class='add'>+	fbnic_get_rxb_stats(fbd, &amp;fbd-&gt;hw_stats.rxb);</div><div class='add'>+	fbnic_get_pcie_stats_asic64(fbd, &amp;fbd-&gt;hw_stats.pcie);</div><div class='add'>+	spin_unlock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h b/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h<br/>index 30348904b510..aa3f429a9aed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h</a></div><div class='hunk'>@@ -1,4 +1,11 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) Meta Platforms, Inc. and affiliates. */</div><div class='add'>+</div><div class='add'>+#ifndef _FBNIC_HW_STATS_H_</div><div class='add'>+#define _FBNIC_HW_STATS_H_</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fbnic_csr.h"</div><div class='ctx'> </div><div class='hunk'>@@ -11,6 +18,44 @@ struct fbnic_stat_counter {</div><div class='ctx'> 	bool reported;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct fbnic_hw_stat {</div><div class='add'>+	struct fbnic_stat_counter frames;</div><div class='add'>+	struct fbnic_stat_counter bytes;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_fec_stats {</div><div class='add'>+	struct fbnic_stat_counter corrected_blocks, uncorrectable_blocks;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_pcs_stats {</div><div class='add'>+	struct {</div><div class='add'>+		struct fbnic_stat_counter lanes[FBNIC_PCS_MAX_LANES];</div><div class='add'>+	} SymbolErrorDuringCarrier;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Note: not updated by fbnic_get_hw_stats() */</div><div class='add'>+struct fbnic_eth_ctrl_stats {</div><div class='add'>+	struct fbnic_stat_counter MACControlFramesTransmitted;</div><div class='add'>+	struct fbnic_stat_counter MACControlFramesReceived;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Note: not updated by fbnic_get_hw_stats() */</div><div class='add'>+struct fbnic_rmon_stats {</div><div class='add'>+	struct fbnic_stat_counter undersize_pkts;</div><div class='add'>+	struct fbnic_stat_counter oversize_pkts;</div><div class='add'>+	struct fbnic_stat_counter fragments;</div><div class='add'>+	struct fbnic_stat_counter jabbers;</div><div class='add'>+</div><div class='add'>+	struct fbnic_stat_counter hist[ETHTOOL_RMON_HIST_MAX];</div><div class='add'>+	struct fbnic_stat_counter hist_tx[ETHTOOL_RMON_HIST_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Note: not updated by fbnic_get_hw_stats() */</div><div class='add'>+struct fbnic_pause_stats {</div><div class='add'>+	struct fbnic_stat_counter tx_pause_frames;</div><div class='add'>+	struct fbnic_stat_counter rx_pause_frames;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct fbnic_eth_mac_stats {</div><div class='ctx'> 	struct fbnic_stat_counter FramesTransmittedOK;</div><div class='ctx'> 	struct fbnic_stat_counter FramesReceivedOK;</div><div class='hunk'>@@ -27,14 +72,92 @@ struct fbnic_eth_mac_stats {</div><div class='ctx'> 	struct fbnic_stat_counter FrameTooLongErrors;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct fbnic_phy_stats {</div><div class='add'>+	struct fbnic_fec_stats fec;</div><div class='add'>+	struct fbnic_pcs_stats pcs;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct fbnic_mac_stats {</div><div class='ctx'> 	struct fbnic_eth_mac_stats eth_mac;</div><div class='add'>+	struct fbnic_pause_stats pause;</div><div class='add'>+	struct fbnic_eth_ctrl_stats eth_ctrl;</div><div class='add'>+	struct fbnic_rmon_stats rmon;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_tmi_stats {</div><div class='add'>+	struct fbnic_hw_stat drop;</div><div class='add'>+	struct fbnic_stat_counter ptp_illegal_req, ptp_good_ts, ptp_bad_ts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_tti_stats {</div><div class='add'>+	struct fbnic_hw_stat cm_drop, frame_drop, tbi_drop;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_rpc_stats {</div><div class='add'>+	struct fbnic_stat_counter unkn_etype, unkn_ext_hdr;</div><div class='add'>+	struct fbnic_stat_counter ipv4_frag, ipv6_frag, ipv4_esp, ipv6_esp;</div><div class='add'>+	struct fbnic_stat_counter tcp_opt_err, out_of_hdr_err, ovr_size_err;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_rxb_enqueue_stats {</div><div class='add'>+	struct fbnic_hw_stat drbo;</div><div class='add'>+	struct fbnic_stat_counter integrity_err, mac_err;</div><div class='add'>+	struct fbnic_stat_counter parser_err, frm_err;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_rxb_fifo_stats {</div><div class='add'>+	struct fbnic_hw_stat drop, trunc;</div><div class='add'>+	struct fbnic_stat_counter trans_drop, trans_ecn;</div><div class='add'>+	struct fbnic_stat_counter level;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_rxb_dequeue_stats {</div><div class='add'>+	struct fbnic_hw_stat intf, pbuf;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_rxb_stats {</div><div class='add'>+	struct fbnic_rxb_enqueue_stats enq[FBNIC_RXB_ENQUEUE_INDICES];</div><div class='add'>+	struct fbnic_rxb_fifo_stats fifo[FBNIC_RXB_FIFO_INDICES];</div><div class='add'>+	struct fbnic_rxb_dequeue_stats deq[FBNIC_RXB_DEQUEUE_INDICES];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_hw_q_stats {</div><div class='add'>+	struct fbnic_stat_counter rde_pkt_err;</div><div class='add'>+	struct fbnic_stat_counter rde_pkt_cq_drop;</div><div class='add'>+	struct fbnic_stat_counter rde_pkt_bdq_drop;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct fbnic_pcie_stats {</div><div class='add'>+	struct fbnic_stat_counter ob_rd_tlp, ob_rd_dword;</div><div class='add'>+	struct fbnic_stat_counter ob_wr_tlp, ob_wr_dword;</div><div class='add'>+	struct fbnic_stat_counter ob_cpl_tlp, ob_cpl_dword;</div><div class='add'>+</div><div class='add'>+	struct fbnic_stat_counter ob_rd_no_tag;</div><div class='add'>+	struct fbnic_stat_counter ob_rd_no_cpl_cred;</div><div class='add'>+	struct fbnic_stat_counter ob_rd_no_np_cred;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct fbnic_hw_stats {</div><div class='add'>+	struct fbnic_phy_stats phy;</div><div class='ctx'> 	struct fbnic_mac_stats mac;</div><div class='add'>+	struct fbnic_tmi_stats tmi;</div><div class='add'>+	struct fbnic_tti_stats tti;</div><div class='add'>+	struct fbnic_rpc_stats rpc;</div><div class='add'>+	struct fbnic_rxb_stats rxb;</div><div class='add'>+	struct fbnic_hw_q_stats hw_q[FBNIC_MAX_QUEUES];</div><div class='add'>+	struct fbnic_pcie_stats pcie;</div><div class='add'>+</div><div class='add'>+	/* Lock protecting the access to hw stats */</div><div class='add'>+	spinlock_t lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> u64 fbnic_stat_rd64(struct fbnic_dev *fbd, u32 reg, u32 offset);</div><div class='ctx'> </div><div class='add'>+void fbnic_reset_hw_stats(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_init_hw_stats(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_get_hw_q_stats(struct fbnic_dev *fbd,</div><div class='add'>+			  struct fbnic_hw_q_stats *hw_q);</div><div class='add'>+void fbnic_get_hw_stats32(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_get_hw_stats(struct fbnic_dev *fbd);</div><div class='add'>+</div><div class='add'>+#endif /* _FBNIC_HW_STATS_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_hwmon.c b/drivers/net/ethernet/meta/fbnic/fbnic_hwmon.c<br/>index bcd1086e3768..def8598aceec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_hwmon.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_hwmon.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_hwmon.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_hwmon.c</a></div><div class='hunk'>@@ -66,7 +66,7 @@ void fbnic_hwmon_register(struct fbnic_dev *fbd)</div><div class='ctx'> 	if (IS_ERR(fbd-&gt;hwmon)) {</div><div class='ctx'> 		dev_notice(fbd-&gt;dev,</div><div class='ctx'> 			   "Failed to register hwmon device %pe\n",</div><div class='del'>-			fbd-&gt;hwmon);</div><div class='add'>+			   fbd-&gt;hwmon);</div><div class='ctx'> 		fbd-&gt;hwmon = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_irq.c b/drivers/net/ethernet/meta/fbnic/fbnic_irq.c<br/>index 914362195920..02e8b0b257fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_irq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_irq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_irq.c</a></div><div class='hunk'>@@ -19,75 +19,111 @@ static irqreturn_t fbnic_fw_msix_intr(int __always_unused irq, void *data)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __fbnic_fw_enable_mbx(struct fbnic_dev *fbd, int vector)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Initialize mailbox and attempt to poll it into ready state */</div><div class='add'>+	fbnic_mbx_init(fbd);</div><div class='add'>+	err = fbnic_mbx_poll_tx_ready(fbd);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_warn(fbd-&gt;dev, "FW mailbox did not enter ready state\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable interrupt and unmask the vector */</div><div class='add'>+	enable_irq(vector);</div><div class='add'>+	fbnic_wr32(fbd, FBNIC_INTR_MASK_CLEAR(0), 1u &lt;&lt; FBNIC_FW_MSIX_ENTRY);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='del'>- * fbnic_fw_enable_mbx - Configure and initialize Firmware Mailbox</div><div class='add'>+ * fbnic_fw_request_mbx - Configure and initialize Firmware Mailbox</div><div class='ctx'>  * @fbd: Pointer to device to initialize</div><div class='ctx'>  *</div><div class='del'>- * This function will initialize the firmware mailbox rings, enable the IRQ</div><div class='del'>- * and initialize the communication between the Firmware and the host. The</div><div class='del'>- * firmware is expected to respond to the initialization by sending an</div><div class='del'>- * interrupt essentially notifying the host that it has seen the</div><div class='del'>- * initialization and is now synced up.</div><div class='add'>+ * This function will allocate the IRQ and then reinitialize the mailbox</div><div class='add'>+ * starting communication between the host and firmware.</div><div class='ctx'>  *</div><div class='ctx'>  * Return: non-zero on failure.</div><div class='ctx'>  **/</div><div class='del'>-int fbnic_fw_enable_mbx(struct fbnic_dev *fbd)</div><div class='add'>+int fbnic_fw_request_mbx(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	u32 vector = fbd-&gt;fw_msix_vector;</div><div class='del'>-	int err;</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(fbd-&gt;dev);</div><div class='add'>+	int vector, err;</div><div class='add'>+</div><div class='add'>+	WARN_ON(fbd-&gt;fw_msix_vector);</div><div class='add'>+</div><div class='add'>+	vector = pci_irq_vector(pdev, FBNIC_FW_MSIX_ENTRY);</div><div class='add'>+	if (vector &lt; 0)</div><div class='add'>+		return vector;</div><div class='ctx'> </div><div class='ctx'> 	/* Request the IRQ for FW Mailbox vector. */</div><div class='ctx'> 	err = request_threaded_irq(vector, NULL, &amp;fbnic_fw_msix_intr,</div><div class='del'>-				   IRQF_ONESHOT, dev_name(fbd-&gt;dev), fbd);</div><div class='add'>+				   IRQF_ONESHOT | IRQF_NO_AUTOEN,</div><div class='add'>+				   dev_name(fbd-&gt;dev), fbd);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize mailbox and attempt to poll it into ready state */</div><div class='del'>-	fbnic_mbx_init(fbd);</div><div class='del'>-	err = fbnic_mbx_poll_tx_ready(fbd);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_warn(fbd-&gt;dev, "FW mailbox did not enter ready state\n");</div><div class='add'>+	err = __fbnic_fw_enable_mbx(fbd, vector);</div><div class='add'>+	if (err)</div><div class='ctx'> 		free_irq(vector, fbd);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	/* Enable interrupts */</div><div class='del'>-	fbnic_wr32(fbd, FBNIC_INTR_MASK_CLEAR(0), 1u &lt;&lt; FBNIC_FW_MSIX_ENTRY);</div><div class='add'>+	fbd-&gt;fw_msix_vector = vector;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * fbnic_fw_disable_mbx - Disable mailbox and place it in standby state</div><div class='del'>- * @fbd: Pointer to device to disable</div><div class='add'>+ * fbnic_fw_disable_mbx - Temporarily place mailbox in standby state</div><div class='add'>+ * @fbd: Pointer to device</div><div class='ctx'>  *</div><div class='del'>- * This function will disable the mailbox interrupt, free any messages still</div><div class='del'>- * in the mailbox and place it into a standby state. The firmware is</div><div class='del'>- * expected to see the update and assume that the host is in the reset state.</div><div class='add'>+ * Shutdown the mailbox by notifying the firmware to stop sending us logs, mask</div><div class='add'>+ * and synchronize the IRQ, and then clean up the rings.</div><div class='ctx'>  **/</div><div class='del'>-void fbnic_fw_disable_mbx(struct fbnic_dev *fbd)</div><div class='add'>+static void fbnic_fw_disable_mbx(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	/* Disable interrupt and free vector */</div><div class='del'>-	fbnic_wr32(fbd, FBNIC_INTR_MASK_SET(0), 1u &lt;&lt; FBNIC_FW_MSIX_ENTRY);</div><div class='add'>+	/* Disable interrupt and synchronize the IRQ */</div><div class='add'>+	disable_irq(fbd-&gt;fw_msix_vector);</div><div class='ctx'> </div><div class='del'>-	/* Free the vector */</div><div class='del'>-	free_irq(fbd-&gt;fw_msix_vector, fbd);</div><div class='add'>+	/* Mask the vector */</div><div class='add'>+	fbnic_wr32(fbd, FBNIC_INTR_MASK_SET(0), 1u &lt;&lt; FBNIC_FW_MSIX_ENTRY);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure disabling logs message is sent, must be done here to</div><div class='ctx'> 	 * avoid risk of completing without a running interrupt.</div><div class='ctx'> 	 */</div><div class='ctx'> 	fbnic_mbx_flush_tx(fbd);</div><div class='del'>-</div><div class='del'>-	/* Reset the mailboxes to the initialized state */</div><div class='ctx'> 	fbnic_mbx_clean(fbd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t fbnic_pcs_msix_intr(int __always_unused irq, void *data)</div><div class='add'>+/**</div><div class='add'>+ * fbnic_fw_free_mbx - Disable mailbox and place it in standby state</div><div class='add'>+ * @fbd: Pointer to device to disable</div><div class='add'>+ *</div><div class='add'>+ * This function will disable the mailbox interrupt, free any messages still</div><div class='add'>+ * in the mailbox and place it into a disabled state. The firmware is</div><div class='add'>+ * expected to see the update and assume that the host is in the reset state.</div><div class='add'>+ **/</div><div class='add'>+void fbnic_fw_free_mbx(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	/* Vector has already been freed */</div><div class='add'>+	if (!fbd-&gt;fw_msix_vector)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fbnic_fw_disable_mbx(fbd);</div><div class='add'>+</div><div class='add'>+	/* Free the vector */</div><div class='add'>+	free_irq(fbd-&gt;fw_msix_vector, fbd);</div><div class='add'>+	fbd-&gt;fw_msix_vector = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t fbnic_mac_msix_intr(int __always_unused irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_dev *fbd = data;</div><div class='ctx'> 	struct fbnic_net *fbn;</div><div class='ctx'> </div><div class='del'>-	if (fbd-&gt;mac-&gt;pcs_get_link_event(fbd) == FBNIC_LINK_EVENT_NONE) {</div><div class='add'>+	if (fbd-&gt;mac-&gt;get_link_event(fbd) == FBNIC_LINK_EVENT_NONE) {</div><div class='ctx'> 		fbnic_wr32(fbd, FBNIC_INTR_MASK_CLEAR(0),</div><div class='ctx'> 			   1u &lt;&lt; FBNIC_PCS_MSIX_ENTRY);</div><div class='ctx'> 		return IRQ_HANDLED;</div><div class='hunk'>@@ -95,55 +131,88 @@ static irqreturn_t fbnic_pcs_msix_intr(int __always_unused irq, void *data)</div><div class='ctx'> </div><div class='ctx'> 	fbn = netdev_priv(fbd-&gt;netdev);</div><div class='ctx'> </div><div class='del'>-	phylink_pcs_change(&amp;fbn-&gt;phylink_pcs, false);</div><div class='add'>+	/* Record link down events */</div><div class='add'>+	if (!fbd-&gt;mac-&gt;get_link(fbd, fbn-&gt;aui, fbn-&gt;fec))</div><div class='add'>+		phylink_pcs_change(fbn-&gt;pcs, false);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * fbnic_pcs_irq_enable - Configure the MAC to enable it to advertise link</div><div class='add'>+ * fbnic_mac_request_irq - Configure the MAC to enable it to advertise link</div><div class='ctx'>  * @fbd: Pointer to device to initialize</div><div class='ctx'>  *</div><div class='del'>- * This function provides basic bringup for the MAC/PCS IRQ. For now the IRQ</div><div class='add'>+ * This function provides basic bringup for the MAC/PHY IRQ. For now the IRQ</div><div class='ctx'>  * will remain disabled until we start the MAC/PCS/PHY logic via phylink.</div><div class='ctx'>  *</div><div class='ctx'>  * Return: non-zero on failure.</div><div class='ctx'>  **/</div><div class='del'>-int fbnic_pcs_irq_enable(struct fbnic_dev *fbd)</div><div class='add'>+int fbnic_mac_request_irq(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	u32 vector = fbd-&gt;pcs_msix_vector;</div><div class='del'>-	int err;</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(fbd-&gt;dev);</div><div class='add'>+	int vector, err;</div><div class='add'>+</div><div class='add'>+	WARN_ON(fbd-&gt;mac_msix_vector);</div><div class='ctx'> </div><div class='del'>-	/* Request the IRQ for MAC link vector.</div><div class='del'>-	 * Map MAC cause to it, and unmask it</div><div class='add'>+	vector = pci_irq_vector(pdev, FBNIC_PCS_MSIX_ENTRY);</div><div class='add'>+	if (vector &lt; 0)</div><div class='add'>+		return vector;</div><div class='add'>+</div><div class='add'>+	/* Request the IRQ for PCS link vector.</div><div class='add'>+	 * Map PCS cause to it, and unmask it</div><div class='ctx'> 	 */</div><div class='del'>-	err = request_irq(vector, &amp;fbnic_pcs_msix_intr, 0,</div><div class='add'>+	err = request_irq(vector, &amp;fbnic_mac_msix_intr, 0,</div><div class='ctx'> 			  fbd-&gt;netdev-&gt;name, fbd);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	/* Map and enable interrupt, unmask vector after link is configured */</div><div class='ctx'> 	fbnic_wr32(fbd, FBNIC_INTR_MSIX_CTRL(FBNIC_INTR_MSIX_CTRL_PCS_IDX),</div><div class='ctx'> 		   FBNIC_PCS_MSIX_ENTRY | FBNIC_INTR_MSIX_CTRL_ENABLE);</div><div class='ctx'> </div><div class='add'>+	fbd-&gt;mac_msix_vector = vector;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * fbnic_pcs_irq_disable - Teardown the MAC IRQ to prepare for stopping</div><div class='add'>+ * fbnic_mac_free_irq - Teardown the MAC IRQ to prepare for stopping</div><div class='ctx'>  * @fbd: Pointer to device that is stopping</div><div class='ctx'>  *</div><div class='del'>- * This function undoes the work done in fbnic_pcs_irq_enable and prepares</div><div class='add'>+ * This function undoes the work done in fbnic_mac_request_irq and prepares</div><div class='ctx'>  * the device to no longer receive traffic on the host interface.</div><div class='ctx'>  **/</div><div class='del'>-void fbnic_pcs_irq_disable(struct fbnic_dev *fbd)</div><div class='add'>+void fbnic_mac_free_irq(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='add'>+	/* Vector has already been freed */</div><div class='add'>+	if (!fbd-&gt;mac_msix_vector)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	/* Disable interrupt */</div><div class='ctx'> 	fbnic_wr32(fbd, FBNIC_INTR_MSIX_CTRL(FBNIC_INTR_MSIX_CTRL_PCS_IDX),</div><div class='ctx'> 		   FBNIC_PCS_MSIX_ENTRY);</div><div class='add'>+	fbnic_wrfl(fbd);</div><div class='add'>+</div><div class='add'>+	/* Synchronize IRQ to prevent race that would unmask vector */</div><div class='add'>+	synchronize_irq(fbd-&gt;mac_msix_vector);</div><div class='add'>+</div><div class='add'>+	/* Mask the vector */</div><div class='ctx'> 	fbnic_wr32(fbd, FBNIC_INTR_MASK_SET(0), 1u &lt;&lt; FBNIC_PCS_MSIX_ENTRY);</div><div class='ctx'> </div><div class='ctx'> 	/* Free the vector */</div><div class='del'>-	free_irq(fbd-&gt;pcs_msix_vector, fbd);</div><div class='add'>+	free_irq(fbd-&gt;mac_msix_vector, fbd);</div><div class='add'>+	fbd-&gt;mac_msix_vector = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_synchronize_irq(struct fbnic_dev *fbd, int nr)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(fbd-&gt;dev);</div><div class='add'>+	int irq = pci_irq_vector(pdev, nr);</div><div class='add'>+</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	synchronize_irq(irq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int fbnic_request_irq(struct fbnic_dev *fbd, int nr, irq_handler_t handler,</div><div class='hunk'>@@ -169,13 +238,52 @@ void fbnic_free_irq(struct fbnic_dev *fbd, int nr, void *data)</div><div class='ctx'> 	free_irq(irq, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void fbnic_napi_name_irqs(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(fbd-&gt;napi_irq); i++)</div><div class='add'>+		snprintf(fbd-&gt;napi_irq[i].name,</div><div class='add'>+			 sizeof(fbd-&gt;napi_irq[i].name),</div><div class='add'>+			 "%s-TxRx-%u", fbd-&gt;netdev-&gt;name, i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fbnic_napi_request_irq(struct fbnic_dev *fbd,</div><div class='add'>+			   struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(fbd-&gt;netdev);</div><div class='add'>+	int i = fbnic_napi_idx(nv);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!fbd-&gt;napi_irq[i].users) {</div><div class='add'>+		err = fbnic_request_irq(fbd, nv-&gt;v_idx,</div><div class='add'>+					fbnic_msix_clean_rings,	0,</div><div class='add'>+					fbd-&gt;napi_irq[i].name,</div><div class='add'>+					&amp;fbn-&gt;napi[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fbd-&gt;napi_irq[i].users++;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_napi_free_irq(struct fbnic_dev *fbd,</div><div class='add'>+			 struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(fbd-&gt;netdev);</div><div class='add'>+	int i = fbnic_napi_idx(nv);</div><div class='add'>+</div><div class='add'>+	if (--fbd-&gt;napi_irq[i].users)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fbnic_free_irq(fbd, nv-&gt;v_idx, &amp;fbn-&gt;napi[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void fbnic_free_irqs(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = to_pci_dev(fbd-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	fbd-&gt;pcs_msix_vector = 0;</div><div class='del'>-	fbd-&gt;fw_msix_vector = 0;</div><div class='del'>-</div><div class='ctx'> 	fbd-&gt;num_irqs = 0;</div><div class='ctx'> </div><div class='ctx'> 	pci_free_irq_vectors(pdev);</div><div class='hunk'>@@ -201,8 +309,5 @@ int fbnic_alloc_irqs(struct fbnic_dev *fbd)</div><div class='ctx'> </div><div class='ctx'> 	fbd-&gt;num_irqs = num_irqs;</div><div class='ctx'> </div><div class='del'>-	fbd-&gt;pcs_msix_vector = pci_irq_vector(pdev, FBNIC_PCS_MSIX_ENTRY);</div><div class='del'>-	fbd-&gt;fw_msix_vector = pci_irq_vector(pdev, FBNIC_FW_MSIX_ENTRY);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_mac.c b/drivers/net/ethernet/meta/fbnic/fbnic_mac.c<br/>index 80b82ff12c4d..fc7abea4ef5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_mac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_mac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_mac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_mac.c</a></div><div class='hunk'>@@ -79,18 +79,20 @@ static void fbnic_mac_init_axi(struct fbnic_dev *fbd)</div><div class='ctx'> 	fbnic_init_readrq(fbd, FBNIC_QM_RNI_RBP_CTL, cls, readrq);</div><div class='ctx'> 	fbnic_init_mps(fbd, FBNIC_QM_RNI_RDE_CTL, cls, mps);</div><div class='ctx'> 	fbnic_init_mps(fbd, FBNIC_QM_RNI_RCM_CTL, cls, mps);</div><div class='del'>-</div><div class='del'>-	/* Enable XALI AR/AW outbound */</div><div class='del'>-	wr32(fbd, FBNIC_PUL_OB_TLP_HDR_AW_CFG,</div><div class='del'>-	     FBNIC_PUL_OB_TLP_HDR_AW_CFG_BME);</div><div class='del'>-	wr32(fbd, FBNIC_PUL_OB_TLP_HDR_AR_CFG,</div><div class='del'>-	     FBNIC_PUL_OB_TLP_HDR_AR_CFG_BME);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_mac_init_qm(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='add'>+	u64 default_meta = FIELD_PREP(FBNIC_TWD_L2_HLEN_MASK, ETH_HLEN) |</div><div class='add'>+			   FBNIC_TWD_FLAG_REQ_COMPLETION;</div><div class='ctx'> 	u32 clock_freq;</div><div class='ctx'> </div><div class='add'>+	/* Configure default TWQ Metadata descriptor */</div><div class='add'>+	wr32(fbd, FBNIC_QM_TWQ_DEFAULT_META_L,</div><div class='add'>+	     lower_32_bits(default_meta));</div><div class='add'>+	wr32(fbd, FBNIC_QM_TWQ_DEFAULT_META_H,</div><div class='add'>+	     upper_32_bits(default_meta));</div><div class='add'>+</div><div class='ctx'> 	/* Configure TSO behavior */</div><div class='ctx'> 	wr32(fbd, FBNIC_QM_TQS_CTL0,</div><div class='ctx'> 	     FIELD_PREP(FBNIC_QM_TQS_CTL0_LSO_TS_MASK,</div><div class='hunk'>@@ -432,14 +434,14 @@ static void fbnic_mac_tx_pause_config(struct fbnic_dev *fbd, bool tx_pause)</div><div class='ctx'> 	wr32(fbd, FBNIC_RXB_PAUSE_DROP_CTRL, rxb_pause_ctrl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fbnic_pcs_get_link_event_asic(struct fbnic_dev *fbd)</div><div class='add'>+static int fbnic_mac_get_link_event(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	u32 pcs_intr_mask = rd32(fbd, FBNIC_SIG_PCS_INTR_STS);</div><div class='add'>+	u32 intr_mask = rd32(fbd, FBNIC_SIG_PCS_INTR_STS);</div><div class='ctx'> </div><div class='del'>-	if (pcs_intr_mask &amp; FBNIC_SIG_PCS_INTR_LINK_DOWN)</div><div class='add'>+	if (intr_mask &amp; FBNIC_SIG_PCS_INTR_LINK_DOWN)</div><div class='ctx'> 		return FBNIC_LINK_EVENT_DOWN;</div><div class='ctx'> </div><div class='del'>-	return (pcs_intr_mask &amp; FBNIC_SIG_PCS_INTR_LINK_UP) ?</div><div class='add'>+	return (intr_mask &amp; FBNIC_SIG_PCS_INTR_LINK_UP) ?</div><div class='ctx'> 	       FBNIC_LINK_EVENT_UP : FBNIC_LINK_EVENT_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -458,15 +460,14 @@ static u32 __fbnic_mac_cmd_config_asic(struct fbnic_dev *fbd,</div><div class='ctx'> 		command_config |= FBNIC_MAC_COMMAND_CONFIG_RX_PAUSE_DIS;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable fault handling if no FEC is requested */</div><div class='del'>-	if ((fbn-&gt;fec &amp; FBNIC_FEC_MODE_MASK) == FBNIC_FEC_OFF)</div><div class='add'>+	if (fbn-&gt;fec == FBNIC_FEC_OFF)</div><div class='ctx'> 		command_config |= FBNIC_MAC_COMMAND_CONFIG_FLT_HDL_DIS;</div><div class='ctx'> </div><div class='ctx'> 	return command_config;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool fbnic_mac_get_pcs_link_status(struct fbnic_dev *fbd)</div><div class='add'>+static bool fbnic_mac_get_link_status(struct fbnic_dev *fbd, u8 aui, u8 fec)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_net *fbn = netdev_priv(fbd-&gt;netdev);</div><div class='ctx'> 	u32 pcs_status, lane_mask = ~0;</div><div class='ctx'> </div><div class='ctx'> 	pcs_status = rd32(fbd, FBNIC_SIG_PCS_OUT0);</div><div class='hunk'>@@ -474,15 +475,15 @@ static bool fbnic_mac_get_pcs_link_status(struct fbnic_dev *fbd)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* Define the expected lane mask for the status bits we need to check */</div><div class='del'>-	switch (fbn-&gt;link_mode &amp; FBNIC_LINK_MODE_MASK) {</div><div class='del'>-	case FBNIC_LINK_100R2:</div><div class='add'>+	switch (aui) {</div><div class='add'>+	case FBNIC_AUI_100GAUI2:</div><div class='ctx'> 		lane_mask = 0xf;</div><div class='ctx'> 		break;</div><div class='del'>-	case FBNIC_LINK_50R1:</div><div class='add'>+	case FBNIC_AUI_50GAUI1:</div><div class='ctx'> 		lane_mask = 3;</div><div class='ctx'> 		break;</div><div class='del'>-	case FBNIC_LINK_50R2:</div><div class='del'>-		switch (fbn-&gt;fec &amp; FBNIC_FEC_MODE_MASK) {</div><div class='add'>+	case FBNIC_AUI_LAUI2:</div><div class='add'>+		switch (fec) {</div><div class='ctx'> 		case FBNIC_FEC_OFF:</div><div class='ctx'> 			lane_mask = 0x63;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -494,13 +495,13 @@ static bool fbnic_mac_get_pcs_link_status(struct fbnic_dev *fbd)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-	case FBNIC_LINK_25R1:</div><div class='add'>+	case FBNIC_AUI_25GAUI:</div><div class='ctx'> 		lane_mask = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Use an XOR to remove the bits we expect to see set */</div><div class='del'>-	switch (fbn-&gt;fec &amp; FBNIC_FEC_MODE_MASK) {</div><div class='add'>+	switch (fec) {</div><div class='ctx'> 	case FBNIC_FEC_OFF:</div><div class='ctx'> 		lane_mask ^= FIELD_GET(FBNIC_SIG_PCS_OUT0_BLOCK_LOCK,</div><div class='ctx'> 				       pcs_status);</div><div class='hunk'>@@ -519,7 +520,46 @@ static bool fbnic_mac_get_pcs_link_status(struct fbnic_dev *fbd)</div><div class='ctx'> 	return !lane_mask;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool fbnic_pcs_get_link_asic(struct fbnic_dev *fbd)</div><div class='add'>+static bool fbnic_pmd_update_state(struct fbnic_dev *fbd, bool signal_detect)</div><div class='add'>+{</div><div class='add'>+	/* Delay link up for 4 seconds to allow for link training.</div><div class='add'>+	 * The state transitions for this are as follows:</div><div class='add'>+	 *</div><div class='add'>+	 * All states have the following two transitions in common:</div><div class='add'>+	 *	Loss of signal -&gt; FBNIC_PMD_INITIALIZE</div><div class='add'>+	 *		The condition handled below (!signal)</div><div class='add'>+	 *	Reconfiguration -&gt; FBNIC_PMD_INITIALIZE</div><div class='add'>+	 *		Occurs when mac_prepare starts a PHY reconfig</div><div class='add'>+	 * FBNIC_PMD_TRAINING:</div><div class='add'>+	 *	signal still detected &amp;&amp; 4s have passed -&gt; Report link up</div><div class='add'>+	 *	When link is brought up in link_up -&gt; FBNIC_PMD_SEND_DATA</div><div class='add'>+	 * FBNIC_PMD_INITIALIZE:</div><div class='add'>+	 *	signal detected -&gt; FBNIC_PMD_TRAINING</div><div class='add'>+	 */</div><div class='add'>+	if (!signal_detect) {</div><div class='add'>+		fbd-&gt;pmd_state = FBNIC_PMD_INITIALIZE;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (fbd-&gt;pmd_state) {</div><div class='add'>+	case FBNIC_PMD_TRAINING:</div><div class='add'>+		return time_before(fbd-&gt;end_of_pmd_training, jiffies);</div><div class='add'>+	case FBNIC_PMD_LINK_READY:</div><div class='add'>+	case FBNIC_PMD_SEND_DATA:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fbd-&gt;end_of_pmd_training = jiffies + 4 * HZ;</div><div class='add'>+</div><div class='add'>+	/* Ensure end_of_training is visible before the state change */</div><div class='add'>+	smp_wmb();</div><div class='add'>+</div><div class='add'>+	fbd-&gt;pmd_state = FBNIC_PMD_TRAINING;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool fbnic_mac_get_link(struct fbnic_dev *fbd, u8 aui, u8 fec)</div><div class='ctx'> {</div><div class='ctx'> 	bool link;</div><div class='ctx'> </div><div class='hunk'>@@ -536,7 +576,8 @@ static bool fbnic_pcs_get_link_asic(struct fbnic_dev *fbd)</div><div class='ctx'> 	wr32(fbd, FBNIC_SIG_PCS_INTR_STS,</div><div class='ctx'> 	     FBNIC_SIG_PCS_INTR_LINK_DOWN | FBNIC_SIG_PCS_INTR_LINK_UP);</div><div class='ctx'> </div><div class='del'>-	link = fbnic_mac_get_pcs_link_status(fbd);</div><div class='add'>+	link = fbnic_mac_get_link_status(fbd, aui, fec);</div><div class='add'>+	link = fbnic_pmd_update_state(fbd, link);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupt to only capture changes in link state */</div><div class='ctx'> 	wr32(fbd, FBNIC_SIG_PCS_INTR_MASK,</div><div class='hunk'>@@ -546,73 +587,53 @@ static bool fbnic_pcs_get_link_asic(struct fbnic_dev *fbd)</div><div class='ctx'> 	return link;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_pcs_get_fw_settings(struct fbnic_dev *fbd)</div><div class='add'>+void fbnic_mac_get_fw_settings(struct fbnic_dev *fbd, u8 *aui, u8 *fec)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_net *fbn = netdev_priv(fbd-&gt;netdev);</div><div class='del'>-	u8 link_mode = fbn-&gt;link_mode;</div><div class='del'>-	u8 fec = fbn-&gt;fec;</div><div class='del'>-</div><div class='del'>-	/* Update FEC first to reflect FW current mode */</div><div class='del'>-	if (fbn-&gt;fec &amp; FBNIC_FEC_AUTO) {</div><div class='del'>-		switch (fbd-&gt;fw_cap.link_fec) {</div><div class='del'>-		case FBNIC_FW_LINK_FEC_NONE:</div><div class='del'>-			fec = FBNIC_FEC_OFF;</div><div class='del'>-			break;</div><div class='del'>-		case FBNIC_FW_LINK_FEC_RS:</div><div class='del'>-			fec = FBNIC_FEC_RS;</div><div class='del'>-			break;</div><div class='del'>-		case FBNIC_FW_LINK_FEC_BASER:</div><div class='del'>-			fec = FBNIC_FEC_BASER;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		fbn-&gt;fec = fec;</div><div class='add'>+	/* Retrieve default speed from FW */</div><div class='add'>+	switch (fbd-&gt;fw_cap.link_speed) {</div><div class='add'>+	case FBNIC_FW_LINK_MODE_25CR:</div><div class='add'>+		*aui = FBNIC_AUI_25GAUI;</div><div class='add'>+		break;</div><div class='add'>+	case FBNIC_FW_LINK_MODE_50CR2:</div><div class='add'>+		*aui = FBNIC_AUI_LAUI2;</div><div class='add'>+		break;</div><div class='add'>+	case FBNIC_FW_LINK_MODE_50CR:</div><div class='add'>+		*aui = FBNIC_AUI_50GAUI1;</div><div class='add'>+		*fec = FBNIC_FEC_RS;</div><div class='add'>+		return;</div><div class='add'>+	case FBNIC_FW_LINK_MODE_100CR2:</div><div class='add'>+		*aui = FBNIC_AUI_100GAUI2;</div><div class='add'>+		*fec = FBNIC_FEC_RS;</div><div class='add'>+		return;</div><div class='add'>+	default:</div><div class='add'>+		*aui = FBNIC_AUI_UNKNOWN;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Do nothing if AUTO mode is not engaged */</div><div class='del'>-	if (fbn-&gt;link_mode &amp; FBNIC_LINK_AUTO) {</div><div class='del'>-		switch (fbd-&gt;fw_cap.link_speed) {</div><div class='del'>-		case FBNIC_FW_LINK_SPEED_25R1:</div><div class='del'>-			link_mode = FBNIC_LINK_25R1;</div><div class='del'>-			break;</div><div class='del'>-		case FBNIC_FW_LINK_SPEED_50R2:</div><div class='del'>-			link_mode = FBNIC_LINK_50R2;</div><div class='del'>-			break;</div><div class='del'>-		case FBNIC_FW_LINK_SPEED_50R1:</div><div class='del'>-			link_mode = FBNIC_LINK_50R1;</div><div class='del'>-			fec = FBNIC_FEC_RS;</div><div class='del'>-			break;</div><div class='del'>-		case FBNIC_FW_LINK_SPEED_100R2:</div><div class='del'>-			link_mode = FBNIC_LINK_100R2;</div><div class='del'>-			fec = FBNIC_FEC_RS;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		fbn-&gt;link_mode = link_mode;</div><div class='add'>+	/* Update FEC first to reflect FW current mode */</div><div class='add'>+	switch (fbd-&gt;fw_cap.link_fec) {</div><div class='add'>+	case FBNIC_FW_LINK_FEC_NONE:</div><div class='add'>+		*fec = FBNIC_FEC_OFF;</div><div class='add'>+		break;</div><div class='add'>+	case FBNIC_FW_LINK_FEC_RS:</div><div class='add'>+	default:</div><div class='add'>+		*fec = FBNIC_FEC_RS;</div><div class='add'>+		break;</div><div class='add'>+	case FBNIC_FW_LINK_FEC_BASER:</div><div class='add'>+		*fec = FBNIC_FEC_BASER;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fbnic_pcs_enable_asic(struct fbnic_dev *fbd)</div><div class='add'>+static void fbnic_mac_prepare(struct fbnic_dev *fbd, u8 aui, u8 fec)</div><div class='ctx'> {</div><div class='ctx'> 	/* Mask and clear the PCS interrupt, will be enabled by link handler */</div><div class='ctx'> 	wr32(fbd, FBNIC_SIG_PCS_INTR_MASK, ~0);</div><div class='ctx'> 	wr32(fbd, FBNIC_SIG_PCS_INTR_STS, ~0);</div><div class='ctx'> </div><div class='del'>-	/* Pull in settings from FW */</div><div class='del'>-	fbnic_pcs_get_fw_settings(fbd);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void fbnic_pcs_disable_asic(struct fbnic_dev *fbd)</div><div class='del'>-{</div><div class='del'>-	/* Mask and clear the PCS interrupt */</div><div class='del'>-	wr32(fbd, FBNIC_SIG_PCS_INTR_MASK, ~0);</div><div class='del'>-	wr32(fbd, FBNIC_SIG_PCS_INTR_STS, ~0);</div><div class='add'>+	/* If we don't have link tear it all down and start over */</div><div class='add'>+	if (!fbnic_mac_get_link_status(fbd, aui, fec))</div><div class='add'>+		fbd-&gt;pmd_state = FBNIC_PMD_INITIALIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_mac_link_down_asic(struct fbnic_dev *fbd)</div><div class='hunk'>@@ -653,6 +674,50 @@ static void fbnic_mac_link_up_asic(struct fbnic_dev *fbd,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='add'>+fbnic_pcs_rsfec_stat_rd32(struct fbnic_dev *fbd, u32 reg, bool reset,</div><div class='add'>+			  struct fbnic_stat_counter *stat)</div><div class='add'>+{</div><div class='add'>+	u32 pcs_rsfec_stat;</div><div class='add'>+</div><div class='add'>+	/* The PCS/RFSEC registers are only 16b wide each. So what we will</div><div class='add'>+	 * have after the 64b read is 0x0000xxxx0000xxxx. To make it usable</div><div class='add'>+	 * as a full stat we will shift the upper bits into the lower set of</div><div class='add'>+	 * 0s and then mask off the math at 32b.</div><div class='add'>+	 *</div><div class='add'>+	 * Read ordering must be lower reg followed by upper reg.</div><div class='add'>+	 */</div><div class='add'>+	pcs_rsfec_stat = rd32(fbd, reg) &amp; 0xffff;</div><div class='add'>+	pcs_rsfec_stat |= rd32(fbd, reg + 1) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	/* RFSEC registers clear themselves upon being read so there is no</div><div class='add'>+	 * need to store the old_reg_value.</div><div class='add'>+	 */</div><div class='add'>+	if (!reset)</div><div class='add'>+		stat-&gt;value += pcs_rsfec_stat;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_mac_get_fec_stats(struct fbnic_dev *fbd, bool reset,</div><div class='add'>+			struct fbnic_fec_stats *s)</div><div class='add'>+{</div><div class='add'>+	fbnic_pcs_rsfec_stat_rd32(fbd, FBNIC_RSFEC_CCW_LO(0), reset,</div><div class='add'>+				  &amp;s-&gt;corrected_blocks);</div><div class='add'>+	fbnic_pcs_rsfec_stat_rd32(fbd, FBNIC_RSFEC_NCCW_LO(0), reset,</div><div class='add'>+				  &amp;s-&gt;uncorrectable_blocks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_mac_get_pcs_stats(struct fbnic_dev *fbd, bool reset,</div><div class='add'>+			struct fbnic_pcs_stats *s)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_PCS_MAX_LANES; i++)</div><div class='add'>+		fbnic_pcs_rsfec_stat_rd32(fbd, FBNIC_PCS_SYMBLERR_LO(i), reset,</div><div class='add'>+					  &amp;s-&gt;SymbolErrorDuringCarrier.lanes[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='ctx'> fbnic_mac_get_eth_mac_stats(struct fbnic_dev *fbd, bool reset,</div><div class='ctx'> 			    struct fbnic_eth_mac_stats *mac_stats)</div><div class='ctx'> {</div><div class='hunk'>@@ -686,34 +751,165 @@ fbnic_mac_get_eth_mac_stats(struct fbnic_dev *fbd, bool reset,</div><div class='ctx'> 			    MAC_STAT_TX_BROADCAST);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int fbnic_mac_get_sensor_asic(struct fbnic_dev *fbd, int id, long *val)</div><div class='add'>+static void</div><div class='add'>+fbnic_mac_get_pause_stats(struct fbnic_dev *fbd, bool reset,</div><div class='add'>+			  struct fbnic_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, pause_stats-&gt;tx_pause_frames,</div><div class='add'>+			    MAC_STAT_TX_XOFF_STB);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, pause_stats-&gt;rx_pause_frames,</div><div class='add'>+			    MAC_STAT_RX_XOFF_STB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_mac_get_eth_ctrl_stats(struct fbnic_dev *fbd, bool reset,</div><div class='add'>+			     struct fbnic_eth_ctrl_stats *ctrl_stats)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_fw_completion fw_cmpl;</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, ctrl_stats-&gt;MACControlFramesReceived,</div><div class='add'>+			    MAC_STAT_RX_CONTROL_FRAMES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, ctrl_stats-&gt;MACControlFramesTransmitted,</div><div class='add'>+			    MAC_STAT_TX_CONTROL_FRAMES);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_mac_get_rmon_stats(struct fbnic_dev *fbd, bool reset,</div><div class='add'>+			 struct fbnic_rmon_stats *rmon_stats)</div><div class='add'>+{</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;undersize_pkts,</div><div class='add'>+			    MAC_STAT_RX_UNDERSIZE);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;oversize_pkts,</div><div class='add'>+			    MAC_STAT_RX_OVERSIZE);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;fragments,</div><div class='add'>+			    MAC_STAT_RX_FRAGMENT);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;jabbers,</div><div class='add'>+			    MAC_STAT_RX_JABBER);</div><div class='add'>+</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[0],</div><div class='add'>+			    MAC_STAT_RX_PACKET_64_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[1],</div><div class='add'>+			    MAC_STAT_RX_PACKET_65_127_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[2],</div><div class='add'>+			    MAC_STAT_RX_PACKET_128_255_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[3],</div><div class='add'>+			    MAC_STAT_RX_PACKET_256_511_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[4],</div><div class='add'>+			    MAC_STAT_RX_PACKET_512_1023_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[5],</div><div class='add'>+			    MAC_STAT_RX_PACKET_1024_1518_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[6],</div><div class='add'>+			    RPC_STAT_RX_PACKET_1519_2047_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[7],</div><div class='add'>+			    RPC_STAT_RX_PACKET_2048_4095_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[8],</div><div class='add'>+			    RPC_STAT_RX_PACKET_4096_8191_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[9],</div><div class='add'>+			    RPC_STAT_RX_PACKET_8192_9216_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist[10],</div><div class='add'>+			    RPC_STAT_RX_PACKET_9217_MAX_BYTES);</div><div class='add'>+</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[0],</div><div class='add'>+			    MAC_STAT_TX_PACKET_64_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[1],</div><div class='add'>+			    MAC_STAT_TX_PACKET_65_127_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[2],</div><div class='add'>+			    MAC_STAT_TX_PACKET_128_255_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[3],</div><div class='add'>+			    MAC_STAT_TX_PACKET_256_511_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[4],</div><div class='add'>+			    MAC_STAT_TX_PACKET_512_1023_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[5],</div><div class='add'>+			    MAC_STAT_TX_PACKET_1024_1518_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[6],</div><div class='add'>+			    TMI_STAT_TX_PACKET_1519_2047_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[7],</div><div class='add'>+			    TMI_STAT_TX_PACKET_2048_4095_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[8],</div><div class='add'>+			    TMI_STAT_TX_PACKET_4096_8191_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[9],</div><div class='add'>+			    TMI_STAT_TX_PACKET_8192_9216_BYTES);</div><div class='add'>+	fbnic_mac_stat_rd64(fbd, reset, rmon_stats-&gt;hist_tx[10],</div><div class='add'>+			    TMI_STAT_TX_PACKET_9217_MAX_BYTES);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_mac_get_sensor_asic(struct fbnic_dev *fbd, int id,</div><div class='add'>+				     long *val)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_fw_completion *fw_cmpl;</div><div class='add'>+	int err = 0, retries = 5;</div><div class='ctx'> 	s32 *sensor;</div><div class='ctx'> </div><div class='add'>+	fw_cmpl = fbnic_fw_alloc_cmpl(FBNIC_TLV_MSG_ID_TSENE_READ_RESP);</div><div class='add'>+	if (!fw_cmpl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	switch (id) {</div><div class='ctx'> 	case FBNIC_SENSOR_TEMP:</div><div class='del'>-		sensor = &amp;fw_cmpl.tsene.millidegrees;</div><div class='add'>+		sensor = &amp;fw_cmpl-&gt;u.tsene.millidegrees;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case FBNIC_SENSOR_VOLTAGE:</div><div class='del'>-		sensor = &amp;fw_cmpl.tsene.millivolts;</div><div class='add'>+		sensor = &amp;fw_cmpl-&gt;u.tsene.millivolts;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto exit_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = fbnic_fw_xmit_tsene_read_msg(fbd, fw_cmpl);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(fbd-&gt;dev,</div><div class='add'>+			"Failed to transmit TSENE read msg, err %d\n",</div><div class='add'>+			err);</div><div class='add'>+		goto exit_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allow 2 seconds for reply, resend and try up to 5 times */</div><div class='add'>+	while (!wait_for_completion_timeout(&amp;fw_cmpl-&gt;done, 2 * HZ)) {</div><div class='add'>+		retries--;</div><div class='add'>+</div><div class='add'>+		if (retries == 0) {</div><div class='add'>+			dev_err(fbd-&gt;dev,</div><div class='add'>+				"Timed out waiting for TSENE read\n");</div><div class='add'>+			err = -ETIMEDOUT;</div><div class='add'>+			goto exit_cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = fbnic_fw_xmit_tsene_read_msg(fbd, NULL);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(fbd-&gt;dev,</div><div class='add'>+				"Failed to transmit TSENE read msg, err %d\n",</div><div class='add'>+				err);</div><div class='add'>+			goto exit_cleanup;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Handle error returned by firmware */</div><div class='add'>+	if (fw_cmpl-&gt;result) {</div><div class='add'>+		err = fw_cmpl-&gt;result;</div><div class='add'>+		dev_err(fbd-&gt;dev, "%s: Firmware returned error %d\n",</div><div class='add'>+			__func__, err);</div><div class='add'>+		goto exit_cleanup;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	*val = *sensor;</div><div class='add'>+exit_cleanup:</div><div class='add'>+	fbnic_mbx_clear_cmpl(fbd, fw_cmpl);</div><div class='add'>+exit_free:</div><div class='add'>+	fbnic_fw_put_cmpl(fw_cmpl);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct fbnic_mac fbnic_mac_asic = {</div><div class='ctx'> 	.init_regs = fbnic_mac_init_regs,</div><div class='del'>-	.pcs_enable = fbnic_pcs_enable_asic,</div><div class='del'>-	.pcs_disable = fbnic_pcs_disable_asic,</div><div class='del'>-	.pcs_get_link = fbnic_pcs_get_link_asic,</div><div class='del'>-	.pcs_get_link_event = fbnic_pcs_get_link_event_asic,</div><div class='add'>+	.get_link = fbnic_mac_get_link,</div><div class='add'>+	.get_link_event = fbnic_mac_get_link_event,</div><div class='add'>+	.prepare = fbnic_mac_prepare,</div><div class='add'>+	.get_fec_stats = fbnic_mac_get_fec_stats,</div><div class='add'>+	.get_pcs_stats = fbnic_mac_get_pcs_stats,</div><div class='ctx'> 	.get_eth_mac_stats = fbnic_mac_get_eth_mac_stats,</div><div class='add'>+	.get_pause_stats = fbnic_mac_get_pause_stats,</div><div class='add'>+	.get_eth_ctrl_stats = fbnic_mac_get_eth_ctrl_stats,</div><div class='add'>+	.get_rmon_stats = fbnic_mac_get_rmon_stats,</div><div class='ctx'> 	.link_down = fbnic_mac_link_down_asic,</div><div class='ctx'> 	.link_up = fbnic_mac_link_up_asic,</div><div class='ctx'> 	.get_sensor = fbnic_mac_get_sensor_asic,</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_mac.h b/drivers/net/ethernet/meta/fbnic/fbnic_mac.h<br/>index 05a591653e09..f08fe8b7c497 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_mac.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_mac.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_mac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_mac.h</a></div><div class='hunk'>@@ -10,6 +10,24 @@ struct fbnic_dev;</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_MAX_JUMBO_FRAME_SIZE	9742</div><div class='ctx'> </div><div class='add'>+/* States loosely based on section 136.8.11.7.5 of IEEE 802.3-2022 Ethernet</div><div class='add'>+ * Standard.  These are needed to track the state of the PHY as it has a delay</div><div class='add'>+ * of several seconds from the time link comes up until it has completed</div><div class='add'>+ * training that we need to wait to report the link.</div><div class='add'>+ *</div><div class='add'>+ * Currently we treat training as a single block as this is managed by the</div><div class='add'>+ * firmware.</div><div class='add'>+ *</div><div class='add'>+ * We have FBNIC_PMD_SEND_DATA set to 0 as the expected default at driver load</div><div class='add'>+ * and we initialize the structure containing it to zero at allocation.</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	FBNIC_PMD_SEND_DATA	= 0x0,</div><div class='add'>+	FBNIC_PMD_INITIALIZE	= 0x1,</div><div class='add'>+	FBNIC_PMD_TRAINING	= 0x2,</div><div class='add'>+	FBNIC_PMD_LINK_READY	= 0x3,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='ctx'> 	FBNIC_LINK_EVENT_NONE	= 0,</div><div class='ctx'> 	FBNIC_LINK_EVENT_UP	= 1,</div><div class='hunk'>@@ -25,27 +43,24 @@ enum {</div><div class='ctx'> 	FBNIC_FEC_OFF		= 0,</div><div class='ctx'> 	FBNIC_FEC_RS		= 1,</div><div class='ctx'> 	FBNIC_FEC_BASER		= 2,</div><div class='del'>-	FBNIC_FEC_AUTO		= 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define FBNIC_FEC_MODE_MASK	(FBNIC_FEC_AUTO - 1)</div><div class='del'>-</div><div class='del'>-/* Treat the link modes as a set of modulation/lanes bitmask:</div><div class='add'>+/* Treat the AUI modes as a modulation/lanes bitmask:</div><div class='ctx'>  * Bit 0: Lane Count, 0 = R1, 1 = R2</div><div class='ctx'>  * Bit 1: Modulation, 0 = NRZ, 1 = PAM4</div><div class='del'>- * Bit 2: Retrieve link mode from FW</div><div class='add'>+ * Bit 2: Unknown Modulation/Lane Configuration</div><div class='ctx'>  */</div><div class='ctx'> enum {</div><div class='del'>-	FBNIC_LINK_25R1		= 0,</div><div class='del'>-	FBNIC_LINK_50R2		= 1,</div><div class='del'>-	FBNIC_LINK_50R1		= 2,</div><div class='del'>-	FBNIC_LINK_100R2	= 3,</div><div class='del'>-	FBNIC_LINK_AUTO		= 4,</div><div class='add'>+	FBNIC_AUI_25GAUI	= 0,	/* 25.7812GBd	25.78125 * 1 */</div><div class='add'>+	FBNIC_AUI_LAUI2		= 1,	/* 51.5625GBd	25.78128 * 2 */</div><div class='add'>+	FBNIC_AUI_50GAUI1	= 2,	/* 53.125GBd	53.125   * 1 */</div><div class='add'>+	FBNIC_AUI_100GAUI2	= 3,	/* 106.25GBd	53.125   * 2 */</div><div class='add'>+	FBNIC_AUI_UNKNOWN	= 4,</div><div class='add'>+	__FBNIC_AUI_MAX__</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define FBNIC_LINK_MODE_R2	(FBNIC_LINK_50R2)</div><div class='del'>-#define FBNIC_LINK_MODE_PAM4	(FBNIC_LINK_50R1)</div><div class='del'>-#define FBNIC_LINK_MODE_MASK	(FBNIC_LINK_AUTO - 1)</div><div class='add'>+#define FBNIC_AUI_MODE_R2	(FBNIC_AUI_LAUI2)</div><div class='add'>+#define FBNIC_AUI_MODE_PAM4	(FBNIC_AUI_50GAUI1)</div><div class='ctx'> </div><div class='ctx'> enum fbnic_sensor_id {</div><div class='ctx'> 	FBNIC_SENSOR_TEMP,		/* Temp in millidegrees Centigrade */</div><div class='hunk'>@@ -59,15 +74,15 @@ enum fbnic_sensor_id {</div><div class='ctx'>  * void (*init_regs)(struct fbnic_dev *fbd);</div><div class='ctx'>  *	Initialize MAC registers to enable Tx/Rx paths and FIFOs.</div><div class='ctx'>  *</div><div class='del'>- * void (*pcs_enable)(struct fbnic_dev *fbd);</div><div class='del'>- *	Configure and enable PCS to enable link if not already enabled</div><div class='del'>- * void (*pcs_disable)(struct fbnic_dev *fbd);</div><div class='del'>- *	Shutdown the link if we are the only consumer of it.</div><div class='del'>- * bool (*pcs_get_link)(struct fbnic_dev *fbd);</div><div class='del'>- *	Check PCS link status</div><div class='del'>- * int (*pcs_get_link_event)(struct fbnic_dev *fbd)</div><div class='add'>+ * int (*get_link_event)(struct fbnic_dev *fbd)</div><div class='ctx'>  *	Get the current link event status, reports true if link has</div><div class='ctx'>  *	changed to either FBNIC_LINK_EVENT_DOWN or FBNIC_LINK_EVENT_UP</div><div class='add'>+ * bool (*get_link)(struct fbnic_dev *fbd, u8 aui, u8 fec);</div><div class='add'>+ *	Check link status</div><div class='add'>+ *</div><div class='add'>+ * void (*prepare)(struct fbnic_dev *fbd, u8 aui, u8 fec);</div><div class='add'>+ *	Prepare PHY for init by fetching settings, disabling interrupts,</div><div class='add'>+ *	and sending an updated PHY config to FW if needed.</div><div class='ctx'>  *</div><div class='ctx'>  * void (*link_down)(struct fbnic_dev *fbd);</div><div class='ctx'>  *	Configure MAC for link down event</div><div class='hunk'>@@ -78,13 +93,23 @@ enum fbnic_sensor_id {</div><div class='ctx'> struct fbnic_mac {</div><div class='ctx'> 	void (*init_regs)(struct fbnic_dev *fbd);</div><div class='ctx'> </div><div class='del'>-	int (*pcs_enable)(struct fbnic_dev *fbd);</div><div class='del'>-	void (*pcs_disable)(struct fbnic_dev *fbd);</div><div class='del'>-	bool (*pcs_get_link)(struct fbnic_dev *fbd);</div><div class='del'>-	int (*pcs_get_link_event)(struct fbnic_dev *fbd);</div><div class='add'>+	int (*get_link_event)(struct fbnic_dev *fbd);</div><div class='add'>+	bool (*get_link)(struct fbnic_dev *fbd, u8 aui, u8 fec);</div><div class='add'>+</div><div class='add'>+	void (*prepare)(struct fbnic_dev *fbd, u8 aui, u8 fec);</div><div class='ctx'> </div><div class='add'>+	void (*get_fec_stats)(struct fbnic_dev *fbd, bool reset,</div><div class='add'>+			      struct fbnic_fec_stats *fec_stats);</div><div class='add'>+	void (*get_pcs_stats)(struct fbnic_dev *fbd, bool reset,</div><div class='add'>+			      struct fbnic_pcs_stats *pcs_stats);</div><div class='ctx'> 	void (*get_eth_mac_stats)(struct fbnic_dev *fbd, bool reset,</div><div class='ctx'> 				  struct fbnic_eth_mac_stats *mac_stats);</div><div class='add'>+	void (*get_pause_stats)(struct fbnic_dev *fbd, bool reset,</div><div class='add'>+				struct fbnic_pause_stats *pause_stats);</div><div class='add'>+	void (*get_eth_ctrl_stats)(struct fbnic_dev *fbd, bool reset,</div><div class='add'>+				   struct fbnic_eth_ctrl_stats *ctrl_stats);</div><div class='add'>+	void (*get_rmon_stats)(struct fbnic_dev *fbd, bool reset,</div><div class='add'>+			       struct fbnic_rmon_stats *rmon_stats);</div><div class='ctx'> </div><div class='ctx'> 	void (*link_down)(struct fbnic_dev *fbd);</div><div class='ctx'> 	void (*link_up)(struct fbnic_dev *fbd, bool tx_pause, bool rx_pause);</div><div class='hunk'>@@ -93,4 +118,5 @@ struct fbnic_mac {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int fbnic_mac_init(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_mac_get_fw_settings(struct fbnic_dev *fbd, u8 *aui, u8 *fec);</div><div class='ctx'> #endif /* _FBNIC_MAC_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c b/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c<br/>new file mode 100644<br/>index 000000000000..709041f7fc43<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_mdio.c</a></div><div class='hunk'>@@ -0,0 +1,195 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) Meta Platforms, Inc. and affiliates. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/pcs/pcs-xpcs.h&gt;</div><div class='add'>+</div><div class='add'>+#include "fbnic.h"</div><div class='add'>+#include "fbnic_netdev.h"</div><div class='add'>+</div><div class='add'>+#define DW_VENDOR		BIT(15)</div><div class='add'>+#define FBNIC_PCS_VENDOR	BIT(9)</div><div class='add'>+#define FBNIC_PCS_ZERO_MASK	(DW_VENDOR - FBNIC_PCS_VENDOR)</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_mdio_read_pmd(struct fbnic_dev *fbd, int addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	u8 aui = FBNIC_AUI_UNKNOWN;</div><div class='add'>+	struct fbnic_net *fbn;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* We don't need a second PMD, just one can handle both lanes */</div><div class='add'>+	if (addr)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (fbd-&gt;netdev) {</div><div class='add'>+		fbn = netdev_priv(fbd-&gt;netdev);</div><div class='add'>+		if (fbn-&gt;aui &lt; FBNIC_AUI_UNKNOWN)</div><div class='add'>+			aui = fbn-&gt;aui;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (regnum) {</div><div class='add'>+	case MDIO_DEVID1:</div><div class='add'>+		ret = MP_FBNIC_XPCS_PMA_100G_ID &gt;&gt; 16;</div><div class='add'>+		break;</div><div class='add'>+	case MDIO_DEVID2:</div><div class='add'>+		ret = MP_FBNIC_XPCS_PMA_100G_ID &amp; 0xffff;</div><div class='add'>+		break;</div><div class='add'>+	case MDIO_DEVS1:</div><div class='add'>+		ret = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS;</div><div class='add'>+		break;</div><div class='add'>+	case MDIO_STAT2:</div><div class='add'>+		ret = MDIO_STAT2_DEVPRST_VAL;</div><div class='add'>+		break;</div><div class='add'>+	case MDIO_PMA_RXDET:</div><div class='add'>+		/* If training isn't complete default to 0 */</div><div class='add'>+		if (fbd-&gt;pmd_state != FBNIC_PMD_SEND_DATA)</div><div class='add'>+			break;</div><div class='add'>+		/* Report either 1 or 2 lanes detected depending on config */</div><div class='add'>+		ret = (MDIO_PMD_RXDET_GLOBAL | MDIO_PMD_RXDET_0) |</div><div class='add'>+		      ((aui &amp; FBNIC_AUI_MODE_R2) *</div><div class='add'>+		       (MDIO_PMD_RXDET_1 / FBNIC_AUI_MODE_R2));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(fbd-&gt;dev,</div><div class='add'>+		"SWMII PMD Rd: Addr: %d RegNum: %d Value: 0x%04x\n",</div><div class='add'>+		addr, regnum, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_mdio_read_pcs(struct fbnic_dev *fbd, int addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	int ret, offset = 0;</div><div class='add'>+</div><div class='add'>+	/* We will need access to both PCS instances to get config info */</div><div class='add'>+	if (addr &gt;= 2)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Report 0 for reserved registers */</div><div class='add'>+	if (regnum &amp; FBNIC_PCS_ZERO_MASK)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Intercept and return correct ID for PCS */</div><div class='add'>+	if (regnum == MDIO_DEVID1)</div><div class='add'>+		return DW_XPCS_ID &gt;&gt; 16;</div><div class='add'>+	if (regnum == MDIO_DEVID2)</div><div class='add'>+		return DW_XPCS_ID &amp; 0xffff;</div><div class='add'>+	if (regnum == MDIO_DEVS1)</div><div class='add'>+		return MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS;</div><div class='add'>+</div><div class='add'>+	/* Swap vendor page bit for FBNIC PCS vendor page bit */</div><div class='add'>+	if (regnum &amp; DW_VENDOR)</div><div class='add'>+		offset ^= DW_VENDOR | FBNIC_PCS_VENDOR;</div><div class='add'>+</div><div class='add'>+	ret = fbnic_rd32(fbd, FBNIC_PCS_PAGE(addr) + (regnum ^ offset));</div><div class='add'>+</div><div class='add'>+	dev_dbg(fbd-&gt;dev,</div><div class='add'>+		"SWMII PCS Rd: Addr: %d RegNum: %d Value: 0x%04x\n",</div><div class='add'>+		addr, regnum, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_mdio_read_c45(struct mii_bus *bus, int addr, int devnum, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (devnum == MDIO_MMD_PMAPMD)</div><div class='add'>+		return fbnic_mdio_read_pmd(fbd, addr, regnum);</div><div class='add'>+</div><div class='add'>+	if (devnum == MDIO_MMD_PCS)</div><div class='add'>+		return fbnic_mdio_read_pcs(fbd, addr, regnum);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_mdio_write_pmd(struct fbnic_dev *fbd, int addr, int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(fbd-&gt;dev,</div><div class='add'>+		"SWMII PMD Wr: Addr: %d RegNum: %d Value: 0x%04x\n",</div><div class='add'>+		addr, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_mdio_write_pcs(struct fbnic_dev *fbd, int addr, int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(fbd-&gt;dev,</div><div class='add'>+		"SWMII PCS Wr: Addr: %d RegNum: %d Value: 0x%04x\n",</div><div class='add'>+		addr, regnum, val);</div><div class='add'>+</div><div class='add'>+	/* Allow access to both halves of PCS for 50R2 config */</div><div class='add'>+	if (addr &gt; 2)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Skip write for reserved registers */</div><div class='add'>+	if (regnum &amp; FBNIC_PCS_ZERO_MASK)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Swap vendor page bit for FBNIC PCS vendor page bit */</div><div class='add'>+	if (regnum &amp; DW_VENDOR)</div><div class='add'>+		regnum ^= DW_VENDOR | FBNIC_PCS_VENDOR;</div><div class='add'>+</div><div class='add'>+	fbnic_wr32(fbd, FBNIC_PCS_PAGE(addr) + regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_mdio_write_c45(struct mii_bus *bus, int addr, int devnum,</div><div class='add'>+		     int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (devnum == MDIO_MMD_PMAPMD)</div><div class='add'>+		fbnic_mdio_write_pmd(fbd, addr, regnum, val);</div><div class='add'>+</div><div class='add'>+	if (devnum == MDIO_MMD_PCS)</div><div class='add'>+		fbnic_mdio_write_pcs(fbd, addr, regnum, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fbnic_mdiobus_create - Create an MDIO bus to allow interfacing w/ PHYs</div><div class='add'>+ * @fbd: Pointer to FBNIC device structure to populate bus on</div><div class='add'>+ *</div><div class='add'>+ * Initialize an MDIO bus and place a pointer to it on the fbd struct. This bus</div><div class='add'>+ * will be used to interface with the PMA/PMD and PCS.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative on failure</div><div class='add'>+ **/</div><div class='add'>+int fbnic_mdiobus_create(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc(fbd-&gt;dev);</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bus-&gt;name = "fbnic_mii_bus";</div><div class='add'>+	bus-&gt;read_c45 = &amp;fbnic_mdio_read_c45;</div><div class='add'>+	bus-&gt;write_c45 = &amp;fbnic_mdio_write_c45;</div><div class='add'>+</div><div class='add'>+	/* Disable PHY auto probing. We will add PCS manually */</div><div class='add'>+	bus-&gt;phy_mask = ~0;</div><div class='add'>+</div><div class='add'>+	bus-&gt;parent = fbd-&gt;dev;</div><div class='add'>+	bus-&gt;priv = fbd;</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-mii", dev_name(fbd-&gt;dev));</div><div class='add'>+</div><div class='add'>+	err = devm_mdiobus_register(fbd-&gt;dev, bus);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(fbd-&gt;dev, "Failed to create MDIO bus: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fbd-&gt;mdio_bus = bus;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_netdev.c b/drivers/net/ethernet/meta/fbnic/fbnic_netdev.c<br/>index c08798fad203..81c9d5c9a4b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_netdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_netdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_netdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_netdev.c</a></div><div class='hunk'>@@ -23,13 +23,7 @@ int __fbnic_open(struct fbnic_net *fbn)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto free_napi_vectors;</div><div class='ctx'> </div><div class='del'>-	err = netif_set_real_num_tx_queues(fbn-&gt;netdev,</div><div class='del'>-					   fbn-&gt;num_tx_queues);</div><div class='del'>-	if (err)</div><div class='del'>-		goto free_resources;</div><div class='del'>-</div><div class='del'>-	err = netif_set_real_num_rx_queues(fbn-&gt;netdev,</div><div class='del'>-					   fbn-&gt;num_rx_queues);</div><div class='add'>+	err = fbnic_set_netif_queues(fbn);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto free_resources;</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +33,7 @@ int __fbnic_open(struct fbnic_net *fbn)</div><div class='ctx'> 		dev_warn(fbd-&gt;dev,</div><div class='ctx'> 			 "Error %d sending host ownership message to the firmware\n",</div><div class='ctx'> 			 err);</div><div class='del'>-		goto free_resources;</div><div class='add'>+		goto err_reset_queues;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = fbnic_time_start(fbn);</div><div class='hunk'>@@ -50,18 +44,23 @@ int __fbnic_open(struct fbnic_net *fbn)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto time_stop;</div><div class='ctx'> </div><div class='del'>-	err = fbnic_pcs_irq_enable(fbd);</div><div class='add'>+	err = fbnic_mac_request_irq(fbd);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto time_stop;</div><div class='add'>+</div><div class='ctx'> 	/* Pull the BMC config and initialize the RPC */</div><div class='ctx'> 	fbnic_bmc_rpc_init(fbd);</div><div class='ctx'> 	fbnic_rss_reinit(fbd, fbn);</div><div class='ctx'> </div><div class='add'>+	phylink_resume(fbn-&gt;phylink);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> time_stop:</div><div class='ctx'> 	fbnic_time_stop(fbn);</div><div class='ctx'> release_ownership:</div><div class='ctx'> 	fbnic_fw_xmit_ownership_msg(fbn-&gt;fbd, false);</div><div class='add'>+err_reset_queues:</div><div class='add'>+	fbnic_reset_netif_queues(fbn);</div><div class='ctx'> free_resources:</div><div class='ctx'> 	fbnic_free_resources(fbn);</div><div class='ctx'> free_napi_vectors:</div><div class='hunk'>@@ -74,6 +73,8 @@ static int fbnic_open(struct net_device *netdev)</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	fbnic_napi_name_irqs(fbn-&gt;fbd);</div><div class='add'>+</div><div class='ctx'> 	err = __fbnic_open(fbn);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		fbnic_up(fbn);</div><div class='hunk'>@@ -85,12 +86,15 @@ static int fbnic_stop(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='ctx'> </div><div class='add'>+	fbnic_mac_free_irq(fbn-&gt;fbd);</div><div class='add'>+	phylink_suspend(fbn-&gt;phylink, fbnic_bmc_present(fbn-&gt;fbd));</div><div class='add'>+</div><div class='ctx'> 	fbnic_down(fbn);</div><div class='del'>-	fbnic_pcs_irq_disable(fbn-&gt;fbd);</div><div class='ctx'> </div><div class='ctx'> 	fbnic_time_stop(fbn);</div><div class='ctx'> 	fbnic_fw_xmit_ownership_msg(fbn-&gt;fbd, false);</div><div class='ctx'> </div><div class='add'>+	fbnic_reset_netif_queues(fbn);</div><div class='ctx'> 	fbnic_free_resources(fbn);</div><div class='ctx'> 	fbnic_free_napi_vectors(fbn);</div><div class='ctx'> </div><div class='hunk'>@@ -179,11 +183,10 @@ static int fbnic_mc_unsync(struct net_device *netdev, const unsigned char *addr)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __fbnic_set_rx_mode(struct net_device *netdev)</div><div class='add'>+void __fbnic_set_rx_mode(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='ctx'> 	bool uc_promisc = false, mc_promisc = false;</div><div class='del'>-	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	struct net_device *netdev = fbd-&gt;netdev;</div><div class='ctx'> 	struct fbnic_mac_addr *mac_addr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -220,49 +223,8 @@ void __fbnic_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> 	uc_promisc |= !!(netdev-&gt;flags &amp; IFF_PROMISC);</div><div class='ctx'> 	mc_promisc |= !!(netdev-&gt;flags &amp; IFF_ALLMULTI) || uc_promisc;</div><div class='ctx'> </div><div class='del'>-	/* Populate last TCAM entry with promiscuous entry and 0/1 bit mask */</div><div class='del'>-	mac_addr = &amp;fbd-&gt;mac_addr[FBNIC_RPC_TCAM_MACDA_PROMISC_IDX];</div><div class='del'>-	if (uc_promisc) {</div><div class='del'>-		if (!is_zero_ether_addr(mac_addr-&gt;value.addr8) ||</div><div class='del'>-		    mac_addr-&gt;state != FBNIC_TCAM_S_VALID) {</div><div class='del'>-			eth_zero_addr(mac_addr-&gt;value.addr8);</div><div class='del'>-			eth_broadcast_addr(mac_addr-&gt;mask.addr8);</div><div class='del'>-			clear_bit(FBNIC_MAC_ADDR_T_ALLMULTI,</div><div class='del'>-				  mac_addr-&gt;act_tcam);</div><div class='del'>-			set_bit(FBNIC_MAC_ADDR_T_PROMISC,</div><div class='del'>-				mac_addr-&gt;act_tcam);</div><div class='del'>-			mac_addr-&gt;state = FBNIC_TCAM_S_ADD;</div><div class='del'>-		}</div><div class='del'>-	} else if (mc_promisc &amp;&amp;</div><div class='del'>-		   (!fbnic_bmc_present(fbd) || !fbd-&gt;fw_cap.all_multi)) {</div><div class='del'>-		/* We have to add a special handler for multicast as the</div><div class='del'>-		 * BMC may have an all-multi rule already in place. As such</div><div class='del'>-		 * adding a rule ourselves won't do any good so we will have</div><div class='del'>-		 * to modify the rules for the ALL MULTI below if the BMC</div><div class='del'>-		 * already has the rule in place.</div><div class='del'>-		 */</div><div class='del'>-		if (!is_multicast_ether_addr(mac_addr-&gt;value.addr8) ||</div><div class='del'>-		    mac_addr-&gt;state != FBNIC_TCAM_S_VALID) {</div><div class='del'>-			eth_zero_addr(mac_addr-&gt;value.addr8);</div><div class='del'>-			eth_broadcast_addr(mac_addr-&gt;mask.addr8);</div><div class='del'>-			mac_addr-&gt;value.addr8[0] ^= 1;</div><div class='del'>-			mac_addr-&gt;mask.addr8[0] ^= 1;</div><div class='del'>-			set_bit(FBNIC_MAC_ADDR_T_ALLMULTI,</div><div class='del'>-				mac_addr-&gt;act_tcam);</div><div class='del'>-			clear_bit(FBNIC_MAC_ADDR_T_PROMISC,</div><div class='del'>-				  mac_addr-&gt;act_tcam);</div><div class='del'>-			mac_addr-&gt;state = FBNIC_TCAM_S_ADD;</div><div class='del'>-		}</div><div class='del'>-	} else if (mac_addr-&gt;state == FBNIC_TCAM_S_VALID) {</div><div class='del'>-		if (test_bit(FBNIC_MAC_ADDR_T_BMC, mac_addr-&gt;act_tcam)) {</div><div class='del'>-			clear_bit(FBNIC_MAC_ADDR_T_ALLMULTI,</div><div class='del'>-				  mac_addr-&gt;act_tcam);</div><div class='del'>-			clear_bit(FBNIC_MAC_ADDR_T_PROMISC,</div><div class='del'>-				  mac_addr-&gt;act_tcam);</div><div class='del'>-		} else {</div><div class='del'>-			mac_addr-&gt;state = FBNIC_TCAM_S_DELETE;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	/* Update the promiscuous rules */</div><div class='add'>+	fbnic_promisc_sync(fbd, uc_promisc, mc_promisc);</div><div class='ctx'> </div><div class='ctx'> 	/* Add rules for BMC all multicast if it is enabled */</div><div class='ctx'> 	fbnic_bmc_rpc_all_multi_config(fbd, mc_promisc);</div><div class='hunk'>@@ -273,13 +235,17 @@ void __fbnic_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> 	/* Write updates to hardware */</div><div class='ctx'> 	fbnic_write_rules(fbd);</div><div class='ctx'> 	fbnic_write_macda(fbd);</div><div class='add'>+	fbnic_write_tce_tcam(fbd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> {</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+</div><div class='ctx'> 	/* No need to update the hardware if we are not running */</div><div class='ctx'> 	if (netif_running(netdev))</div><div class='del'>-		__fbnic_set_rx_mode(netdev);</div><div class='add'>+		__fbnic_set_rx_mode(fbd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int fbnic_set_mac(struct net_device *netdev, void *p)</div><div class='hunk'>@@ -296,10 +262,9 @@ static int fbnic_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void fbnic_clear_rx_mode(struct net_device *netdev)</div><div class='add'>+void fbnic_clear_rx_mode(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='del'>-	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	struct net_device *netdev = fbd-&gt;netdev;</div><div class='ctx'> 	int idx;</div><div class='ctx'> </div><div class='ctx'> 	for (idx = ARRAY_SIZE(fbd-&gt;mac_addr); idx--;) {</div><div class='hunk'>@@ -405,18 +370,31 @@ static int fbnic_hwtstamp_set(struct net_device *netdev,</div><div class='ctx'> static void fbnic_get_stats64(struct net_device *dev,</div><div class='ctx'> 			      struct rtnl_link_stats64 *stats64)</div><div class='ctx'> {</div><div class='add'>+	u64 rx_bytes, rx_packets, rx_dropped = 0, rx_errors = 0;</div><div class='add'>+	u64 rx_over = 0, rx_missed = 0, rx_length = 0;</div><div class='ctx'> 	u64 tx_bytes, tx_packets, tx_dropped = 0;</div><div class='del'>-	u64 rx_bytes, rx_packets, rx_dropped = 0;</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(dev);</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='ctx'> 	struct fbnic_queue_stats *stats;</div><div class='add'>+</div><div class='ctx'> 	unsigned int start, i;</div><div class='ctx'> </div><div class='add'>+	fbnic_get_hw_stats(fbd);</div><div class='add'>+</div><div class='ctx'> 	stats = &amp;fbn-&gt;tx_stats;</div><div class='ctx'> </div><div class='ctx'> 	tx_bytes = stats-&gt;bytes;</div><div class='ctx'> 	tx_packets = stats-&gt;packets;</div><div class='ctx'> 	tx_dropped = stats-&gt;dropped;</div><div class='ctx'> </div><div class='add'>+	/* Record drops from Tx HW Datapath */</div><div class='add'>+	spin_lock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+	tx_dropped += fbd-&gt;hw_stats.tmi.drop.frames.value +</div><div class='add'>+		      fbd-&gt;hw_stats.tti.cm_drop.frames.value +</div><div class='add'>+		      fbd-&gt;hw_stats.tti.frame_drop.frames.value +</div><div class='add'>+		      fbd-&gt;hw_stats.tti.tbi_drop.frames.value;</div><div class='add'>+	spin_unlock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+</div><div class='ctx'> 	stats64-&gt;tx_bytes = tx_bytes;</div><div class='ctx'> 	stats64-&gt;tx_packets = tx_packets;</div><div class='ctx'> 	stats64-&gt;tx_dropped = tx_dropped;</div><div class='hunk'>@@ -446,11 +424,37 @@ static void fbnic_get_stats64(struct net_device *dev,</div><div class='ctx'> 	rx_packets = stats-&gt;packets;</div><div class='ctx'> 	rx_dropped = stats-&gt;dropped;</div><div class='ctx'> </div><div class='add'>+	spin_lock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+	/* Record drops for the host FIFOs.</div><div class='add'>+	 * 4: network to Host,	6: BMC to Host</div><div class='add'>+	 * Exclude the BMC and MC FIFOs as those stats may contain drops</div><div class='add'>+	 * due to unrelated items such as TCAM misses. They are still</div><div class='add'>+	 * accessible through the ethtool stats.</div><div class='add'>+	 */</div><div class='add'>+	i = FBNIC_RXB_FIFO_HOST;</div><div class='add'>+	rx_missed += fbd-&gt;hw_stats.rxb.fifo[i].drop.frames.value;</div><div class='add'>+	i = FBNIC_RXB_FIFO_BMC_TO_HOST;</div><div class='add'>+	rx_missed += fbd-&gt;hw_stats.rxb.fifo[i].drop.frames.value;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fbd-&gt;max_num_queues; i++) {</div><div class='add'>+		/* Report packets dropped due to CQ/BDQ being full/empty */</div><div class='add'>+		rx_over += fbd-&gt;hw_stats.hw_q[i].rde_pkt_cq_drop.value;</div><div class='add'>+		rx_over += fbd-&gt;hw_stats.hw_q[i].rde_pkt_bdq_drop.value;</div><div class='add'>+</div><div class='add'>+		/* Report packets with errors */</div><div class='add'>+		rx_errors += fbd-&gt;hw_stats.hw_q[i].rde_pkt_err.value;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+</div><div class='ctx'> 	stats64-&gt;rx_bytes = rx_bytes;</div><div class='ctx'> 	stats64-&gt;rx_packets = rx_packets;</div><div class='ctx'> 	stats64-&gt;rx_dropped = rx_dropped;</div><div class='add'>+	stats64-&gt;rx_over_errors = rx_over;</div><div class='add'>+	stats64-&gt;rx_errors = rx_errors;</div><div class='add'>+	stats64-&gt;rx_missed_errors = rx_missed;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; fbn-&gt;num_rx_queues; i++) {</div><div class='add'>+		struct fbnic_ring *xdpr = fbn-&gt;tx[FBNIC_MAX_TXQS + i];</div><div class='ctx'> 		struct fbnic_ring *rxr = fbn-&gt;rx[i];</div><div class='ctx'> </div><div class='ctx'> 		if (!rxr)</div><div class='hunk'>@@ -462,14 +466,66 @@ static void fbnic_get_stats64(struct net_device *dev,</div><div class='ctx'> 			rx_bytes = stats-&gt;bytes;</div><div class='ctx'> 			rx_packets = stats-&gt;packets;</div><div class='ctx'> 			rx_dropped = stats-&gt;dropped;</div><div class='add'>+			rx_length = stats-&gt;rx.length_errors;</div><div class='ctx'> 		} while (u64_stats_fetch_retry(&amp;stats-&gt;syncp, start));</div><div class='ctx'> </div><div class='ctx'> 		stats64-&gt;rx_bytes += rx_bytes;</div><div class='ctx'> 		stats64-&gt;rx_packets += rx_packets;</div><div class='ctx'> 		stats64-&gt;rx_dropped += rx_dropped;</div><div class='add'>+		stats64-&gt;rx_errors += rx_length;</div><div class='add'>+		stats64-&gt;rx_length_errors += rx_length;</div><div class='add'>+</div><div class='add'>+		if (!xdpr)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		stats = &amp;xdpr-&gt;stats;</div><div class='add'>+		do {</div><div class='add'>+			start = u64_stats_fetch_begin(&amp;stats-&gt;syncp);</div><div class='add'>+			tx_bytes = stats-&gt;bytes;</div><div class='add'>+			tx_packets = stats-&gt;packets;</div><div class='add'>+			tx_dropped = stats-&gt;dropped;</div><div class='add'>+		} while (u64_stats_fetch_retry(&amp;stats-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+		stats64-&gt;tx_bytes += tx_bytes;</div><div class='add'>+		stats64-&gt;tx_packets += tx_packets;</div><div class='add'>+		stats64-&gt;tx_dropped += tx_dropped;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool fbnic_check_split_frames(struct bpf_prog *prog, unsigned int mtu,</div><div class='add'>+			      u32 hds_thresh)</div><div class='add'>+{</div><div class='add'>+	if (!prog)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (prog-&gt;aux-&gt;xdp_has_frags)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return mtu + ETH_HLEN &gt; hds_thresh;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_bpf(struct net_device *netdev, struct netdev_bpf *bpf)</div><div class='add'>+{</div><div class='add'>+	struct bpf_prog *prog = bpf-&gt;prog, *prev_prog;</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (bpf-&gt;command != XDP_SETUP_PROG)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (fbnic_check_split_frames(prog, netdev-&gt;mtu,</div><div class='add'>+				     fbn-&gt;hds_thresh)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(bpf-&gt;extack,</div><div class='add'>+				   "MTU too high, or HDS threshold is too low for single buffer XDP");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prev_prog = xchg(&amp;fbn-&gt;xdp_prog, prog);</div><div class='add'>+	if (prev_prog)</div><div class='add'>+		bpf_prog_put(prev_prog);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops fbnic_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= fbnic_open,</div><div class='ctx'> 	.ndo_stop		= fbnic_stop,</div><div class='hunk'>@@ -479,6 +535,7 @@ static const struct net_device_ops fbnic_netdev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address	= fbnic_set_mac,</div><div class='ctx'> 	.ndo_set_rx_mode	= fbnic_set_rx_mode,</div><div class='ctx'> 	.ndo_get_stats64	= fbnic_get_stats64,</div><div class='add'>+	.ndo_bpf		= fbnic_bpf,</div><div class='ctx'> 	.ndo_hwtstamp_get	= fbnic_hwtstamp_get,</div><div class='ctx'> 	.ndo_hwtstamp_set	= fbnic_hwtstamp_set,</div><div class='ctx'> };</div><div class='hunk'>@@ -486,24 +543,59 @@ static const struct net_device_ops fbnic_netdev_ops = {</div><div class='ctx'> static void fbnic_get_queue_stats_rx(struct net_device *dev, int idx,</div><div class='ctx'> 				     struct netdev_queue_stats_rx *rx)</div><div class='ctx'> {</div><div class='add'>+	u64 bytes, packets, alloc_fail, alloc_fail_bdq;</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(dev);</div><div class='ctx'> 	struct fbnic_ring *rxr = fbn-&gt;rx[idx];</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='ctx'> 	struct fbnic_queue_stats *stats;</div><div class='add'>+	u64 csum_complete, csum_none;</div><div class='add'>+	struct fbnic_q_triad *qt;</div><div class='ctx'> 	unsigned int start;</div><div class='del'>-	u64 bytes, packets;</div><div class='ctx'> </div><div class='ctx'> 	if (!rxr)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	/* fbn-&gt;rx points to completion queues */</div><div class='add'>+	qt = container_of(rxr, struct fbnic_q_triad, cmpl);</div><div class='add'>+</div><div class='ctx'> 	stats = &amp;rxr-&gt;stats;</div><div class='ctx'> 	do {</div><div class='ctx'> 		start = u64_stats_fetch_begin(&amp;stats-&gt;syncp);</div><div class='ctx'> 		bytes = stats-&gt;bytes;</div><div class='ctx'> 		packets = stats-&gt;packets;</div><div class='add'>+		alloc_fail = stats-&gt;rx.alloc_failed;</div><div class='add'>+		csum_complete = stats-&gt;rx.csum_complete;</div><div class='add'>+		csum_none = stats-&gt;rx.csum_none;</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;stats-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+	stats = &amp;qt-&gt;sub0.stats;</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;stats-&gt;syncp);</div><div class='add'>+		alloc_fail_bdq = stats-&gt;bdq.alloc_failed;</div><div class='ctx'> 	} while (u64_stats_fetch_retry(&amp;stats-&gt;syncp, start));</div><div class='add'>+	alloc_fail += alloc_fail_bdq;</div><div class='add'>+</div><div class='add'>+	stats = &amp;qt-&gt;sub1.stats;</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;stats-&gt;syncp);</div><div class='add'>+		alloc_fail_bdq = stats-&gt;bdq.alloc_failed;</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;stats-&gt;syncp, start));</div><div class='add'>+	alloc_fail += alloc_fail_bdq;</div><div class='ctx'> </div><div class='ctx'> 	rx-&gt;bytes = bytes;</div><div class='ctx'> 	rx-&gt;packets = packets;</div><div class='add'>+	rx-&gt;alloc_fail = alloc_fail;</div><div class='add'>+	rx-&gt;csum_complete = csum_complete;</div><div class='add'>+	rx-&gt;csum_none = csum_none;</div><div class='add'>+</div><div class='add'>+	fbnic_get_hw_q_stats(fbd, fbd-&gt;hw_stats.hw_q);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;fbd-&gt;hw_stats.lock);</div><div class='add'>+	rx-&gt;hw_drop_overruns = fbd-&gt;hw_stats.hw_q[idx].rde_pkt_cq_drop.value +</div><div class='add'>+			       fbd-&gt;hw_stats.hw_q[idx].rde_pkt_bdq_drop.value;</div><div class='add'>+	rx-&gt;hw_drops = fbd-&gt;hw_stats.hw_q[idx].rde_pkt_err.value +</div><div class='add'>+		       rx-&gt;hw_drop_overruns;</div><div class='add'>+	spin_unlock(&amp;fbd-&gt;hw_stats.lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_get_queue_stats_tx(struct net_device *dev, int idx,</div><div class='hunk'>@@ -512,6 +604,8 @@ static void fbnic_get_queue_stats_tx(struct net_device *dev, int idx,</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(dev);</div><div class='ctx'> 	struct fbnic_ring *txr = fbn-&gt;tx[idx];</div><div class='ctx'> 	struct fbnic_queue_stats *stats;</div><div class='add'>+	u64 stop, wake, csum, lso;</div><div class='add'>+	struct fbnic_ring *xdpr;</div><div class='ctx'> 	unsigned int start;</div><div class='ctx'> 	u64 bytes, packets;</div><div class='ctx'> </div><div class='hunk'>@@ -523,10 +617,31 @@ static void fbnic_get_queue_stats_tx(struct net_device *dev, int idx,</div><div class='ctx'> 		start = u64_stats_fetch_begin(&amp;stats-&gt;syncp);</div><div class='ctx'> 		bytes = stats-&gt;bytes;</div><div class='ctx'> 		packets = stats-&gt;packets;</div><div class='add'>+		csum = stats-&gt;twq.csum_partial;</div><div class='add'>+		lso = stats-&gt;twq.lso;</div><div class='add'>+		stop = stats-&gt;twq.stop;</div><div class='add'>+		wake = stats-&gt;twq.wake;</div><div class='ctx'> 	} while (u64_stats_fetch_retry(&amp;stats-&gt;syncp, start));</div><div class='ctx'> </div><div class='ctx'> 	tx-&gt;bytes = bytes;</div><div class='ctx'> 	tx-&gt;packets = packets;</div><div class='add'>+	tx-&gt;needs_csum = csum + lso;</div><div class='add'>+	tx-&gt;hw_gso_wire_packets = lso;</div><div class='add'>+	tx-&gt;stop = stop;</div><div class='add'>+	tx-&gt;wake = wake;</div><div class='add'>+</div><div class='add'>+	xdpr = fbn-&gt;tx[FBNIC_MAX_TXQS + idx];</div><div class='add'>+	if (xdpr) {</div><div class='add'>+		stats = &amp;xdpr-&gt;stats;</div><div class='add'>+		do {</div><div class='add'>+			start = u64_stats_fetch_begin(&amp;stats-&gt;syncp);</div><div class='add'>+			bytes = stats-&gt;bytes;</div><div class='add'>+			packets = stats-&gt;packets;</div><div class='add'>+		} while (u64_stats_fetch_retry(&amp;stats-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+		tx-&gt;bytes += bytes;</div><div class='add'>+		tx-&gt;packets += packets;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_get_base_stats(struct net_device *dev,</div><div class='hunk'>@@ -537,9 +652,17 @@ static void fbnic_get_base_stats(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	tx-&gt;bytes = fbn-&gt;tx_stats.bytes;</div><div class='ctx'> 	tx-&gt;packets = fbn-&gt;tx_stats.packets;</div><div class='add'>+	tx-&gt;needs_csum = fbn-&gt;tx_stats.twq.csum_partial + fbn-&gt;tx_stats.twq.lso;</div><div class='add'>+	tx-&gt;hw_gso_wire_packets = fbn-&gt;tx_stats.twq.lso;</div><div class='add'>+	tx-&gt;stop = fbn-&gt;tx_stats.twq.stop;</div><div class='add'>+	tx-&gt;wake = fbn-&gt;tx_stats.twq.wake;</div><div class='ctx'> </div><div class='ctx'> 	rx-&gt;bytes = fbn-&gt;rx_stats.bytes;</div><div class='ctx'> 	rx-&gt;packets = fbn-&gt;rx_stats.packets;</div><div class='add'>+	rx-&gt;alloc_fail = fbn-&gt;rx_stats.rx.alloc_failed +</div><div class='add'>+		fbn-&gt;bdq_stats.bdq.alloc_failed;</div><div class='add'>+	rx-&gt;csum_complete = fbn-&gt;rx_stats.rx.csum_complete;</div><div class='add'>+	rx-&gt;csum_none = fbn-&gt;rx_stats.rx.csum_none;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct netdev_stat_ops fbnic_stat_ops = {</div><div class='hunk'>@@ -574,10 +697,7 @@ void fbnic_reset_queues(struct fbnic_net *fbn,</div><div class='ctx'>  **/</div><div class='ctx'> void fbnic_netdev_free(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_net *fbn = netdev_priv(fbd-&gt;netdev);</div><div class='del'>-</div><div class='del'>-	if (fbn-&gt;phylink)</div><div class='del'>-		phylink_destroy(fbn-&gt;phylink);</div><div class='add'>+	fbnic_phylink_destroy(fbd-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 	free_netdev(fbd-&gt;netdev);</div><div class='ctx'> 	fbd-&gt;netdev = NULL;</div><div class='hunk'>@@ -590,7 +710,7 @@ void fbnic_netdev_free(struct fbnic_dev *fbd)</div><div class='ctx'>  * Allocate and initialize the netdev and netdev private structure. Bind</div><div class='ctx'>  * together the hardware, netdev, and pci data structures.</div><div class='ctx'>  *</div><div class='del'>- *  Return: 0 on success, negative on failure</div><div class='add'>+ *  Return: Pointer to net_device on success, NULL on failure</div><div class='ctx'>  **/</div><div class='ctx'> struct net_device *fbnic_netdev_alloc(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='hunk'>@@ -607,6 +727,8 @@ struct net_device *fbnic_netdev_alloc(struct fbnic_dev *fbd)</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;fbnic_netdev_ops;</div><div class='ctx'> 	netdev-&gt;stat_ops = &amp;fbnic_stat_ops;</div><div class='add'>+	netdev-&gt;queue_mgmt_ops = &amp;fbnic_queue_mgmt_ops;</div><div class='add'>+	netdev-&gt;netmem_tx = true;</div><div class='ctx'> </div><div class='ctx'> 	fbnic_set_ethtool_ops(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -614,13 +736,20 @@ struct net_device *fbnic_netdev_alloc(struct fbnic_dev *fbd)</div><div class='ctx'> </div><div class='ctx'> 	fbn-&gt;netdev = netdev;</div><div class='ctx'> 	fbn-&gt;fbd = fbd;</div><div class='del'>-	INIT_LIST_HEAD(&amp;fbn-&gt;napis);</div><div class='ctx'> </div><div class='ctx'> 	fbn-&gt;txq_size = FBNIC_TXQ_SIZE_DEFAULT;</div><div class='ctx'> 	fbn-&gt;hpq_size = FBNIC_HPQ_SIZE_DEFAULT;</div><div class='ctx'> 	fbn-&gt;ppq_size = FBNIC_PPQ_SIZE_DEFAULT;</div><div class='ctx'> 	fbn-&gt;rcq_size = FBNIC_RCQ_SIZE_DEFAULT;</div><div class='ctx'> </div><div class='add'>+	fbn-&gt;tx_usecs = FBNIC_TX_USECS_DEFAULT;</div><div class='add'>+	fbn-&gt;rx_usecs = FBNIC_RX_USECS_DEFAULT;</div><div class='add'>+	fbn-&gt;rx_max_frames = FBNIC_RX_FRAMES_DEFAULT;</div><div class='add'>+</div><div class='add'>+	/* Initialize the hds_thresh */</div><div class='add'>+	netdev-&gt;cfg-&gt;hds_thresh = FBNIC_HDS_THRESH_DEFAULT;</div><div class='add'>+	fbn-&gt;hds_thresh = FBNIC_HDS_THRESH_DEFAULT;</div><div class='add'>+</div><div class='ctx'> 	default_queues = netif_get_num_default_rss_queues();</div><div class='ctx'> 	if (default_queues &gt; fbd-&gt;max_num_queues)</div><div class='ctx'> 		default_queues = fbd-&gt;max_num_queues;</div><div class='hunk'>@@ -631,15 +760,32 @@ struct net_device *fbnic_netdev_alloc(struct fbnic_dev *fbd)</div><div class='ctx'> 	fbnic_rss_key_fill(fbn-&gt;rss_key);</div><div class='ctx'> 	fbnic_rss_init_en_mask(fbn);</div><div class='ctx'> </div><div class='add'>+	netdev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;gso_partial_features =</div><div class='add'>+		NETIF_F_GSO_GRE |</div><div class='add'>+		NETIF_F_GSO_GRE_CSUM |</div><div class='add'>+		NETIF_F_GSO_IPXIP4 |</div><div class='add'>+		NETIF_F_GSO_UDP_TUNNEL |</div><div class='add'>+		NETIF_F_GSO_UDP_TUNNEL_CSUM;</div><div class='add'>+</div><div class='ctx'> 	netdev-&gt;features |=</div><div class='add'>+		netdev-&gt;gso_partial_features |</div><div class='add'>+		FBNIC_TUN_GSO_FEATURES |</div><div class='ctx'> 		NETIF_F_RXHASH |</div><div class='ctx'> 		NETIF_F_SG |</div><div class='ctx'> 		NETIF_F_HW_CSUM |</div><div class='del'>-		NETIF_F_RXCSUM;</div><div class='add'>+		NETIF_F_RXCSUM |</div><div class='add'>+		NETIF_F_TSO |</div><div class='add'>+		NETIF_F_TSO_ECN |</div><div class='add'>+		NETIF_F_TSO6 |</div><div class='add'>+		NETIF_F_GSO_PARTIAL |</div><div class='add'>+		NETIF_F_GSO_UDP_L4;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;hw_features |= netdev-&gt;features;</div><div class='ctx'> 	netdev-&gt;vlan_features |= netdev-&gt;features;</div><div class='ctx'> 	netdev-&gt;hw_enc_features |= netdev-&gt;features;</div><div class='add'>+	netdev-&gt;features |= NETIF_F_NTUPLE;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;min_mtu = IPV6_MIN_MTU;</div><div class='ctx'> 	netdev-&gt;max_mtu = FBNIC_MAX_JUMBO_FRAME_SIZE - ETH_HLEN;</div><div class='hunk'>@@ -649,13 +795,11 @@ struct net_device *fbnic_netdev_alloc(struct fbnic_dev *fbd)</div><div class='ctx'> 	 */</div><div class='ctx'> 	netdev-&gt;ethtool-&gt;wol_enabled = true;</div><div class='ctx'> </div><div class='del'>-	fbn-&gt;fec = FBNIC_FEC_AUTO | FBNIC_FEC_RS;</div><div class='del'>-	fbn-&gt;link_mode = FBNIC_LINK_AUTO | FBNIC_LINK_50R2;</div><div class='ctx'> 	netif_carrier_off(netdev);</div><div class='ctx'> </div><div class='ctx'> 	netif_tx_stop_all_queues(netdev);</div><div class='ctx'> </div><div class='del'>-	if (fbnic_phylink_init(netdev)) {</div><div class='add'>+	if (fbnic_phylink_create(netdev)) {</div><div class='ctx'> 		fbnic_netdev_free(fbd);</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_netdev.h b/drivers/net/ethernet/meta/fbnic/fbnic_netdev.h<br/>index b8417b300778..9129a658f8fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_netdev.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_netdev.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_netdev.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_netdev.h</a></div><div class='hunk'>@@ -4,17 +4,27 @@</div><div class='ctx'> #ifndef _FBNIC_NETDEV_H_</div><div class='ctx'> #define _FBNIC_NETDEV_H_</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fbnic_csr.h"</div><div class='ctx'> #include "fbnic_rpc.h"</div><div class='ctx'> #include "fbnic_txrx.h"</div><div class='ctx'> </div><div class='add'>+#define FBNIC_MAX_NAPI_VECTORS		128u</div><div class='add'>+#define FBNIC_MIN_RXD_PER_FRAME		2</div><div class='add'>+</div><div class='add'>+/* Natively supported tunnel GSO features (not thru GSO_PARTIAL) */</div><div class='add'>+#define FBNIC_TUN_GSO_FEATURES		NETIF_F_GSO_IPXIP6</div><div class='add'>+</div><div class='ctx'> struct fbnic_net {</div><div class='del'>-	struct fbnic_ring *tx[FBNIC_MAX_TXQS];</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='add'>+</div><div class='add'>+	struct fbnic_ring *tx[FBNIC_MAX_TXQS + FBNIC_MAX_XDPQS];</div><div class='ctx'> 	struct fbnic_ring *rx[FBNIC_MAX_RXQS];</div><div class='ctx'> </div><div class='add'>+	struct fbnic_napi_vector *napi[FBNIC_MAX_NAPI_VECTORS];</div><div class='add'>+</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct fbnic_dev *fbd;</div><div class='ctx'> </div><div class='hunk'>@@ -23,15 +33,21 @@ struct fbnic_net {</div><div class='ctx'> 	u32 ppq_size;</div><div class='ctx'> 	u32 rcq_size;</div><div class='ctx'> </div><div class='add'>+	u32 hds_thresh;</div><div class='add'>+</div><div class='add'>+	u16 rx_usecs;</div><div class='add'>+	u16 tx_usecs;</div><div class='add'>+</div><div class='add'>+	u32 rx_max_frames;</div><div class='add'>+</div><div class='ctx'> 	u16 num_napi;</div><div class='ctx'> </div><div class='ctx'> 	struct phylink *phylink;</div><div class='ctx'> 	struct phylink_config phylink_config;</div><div class='del'>-	struct phylink_pcs phylink_pcs;</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='ctx'> </div><div class='del'>-	/* TBD: Remove these when phylink supports FEC and lane config */</div><div class='add'>+	u8 aui;</div><div class='ctx'> 	u8 fec;</div><div class='del'>-	u8 link_mode;</div><div class='ctx'> </div><div class='ctx'> 	/* Cached top bits of the HW time counter for 40b -&gt; 64b conversion */</div><div class='ctx'> 	u32 time_high;</div><div class='hunk'>@@ -52,17 +68,19 @@ struct fbnic_net {</div><div class='ctx'> 	/* Storage for stats after ring destruction */</div><div class='ctx'> 	struct fbnic_queue_stats tx_stats;</div><div class='ctx'> 	struct fbnic_queue_stats rx_stats;</div><div class='add'>+	struct fbnic_queue_stats bdq_stats;</div><div class='ctx'> 	u64 link_down_events;</div><div class='ctx'> </div><div class='del'>-	/* Time stampinn filter config */</div><div class='add'>+	/* Time stamping filter config */</div><div class='ctx'> 	struct kernel_hwtstamp_config hwtstamp_config;</div><div class='ctx'> </div><div class='del'>-	struct list_head napis;</div><div class='add'>+	bool tx_pause;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int __fbnic_open(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_up(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_down(struct fbnic_net *fbn);</div><div class='add'>+void fbnic_down_noidle(struct fbnic_net *fbn);</div><div class='ctx'> </div><div class='ctx'> struct net_device *fbnic_netdev_alloc(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_netdev_free(struct fbnic_dev *fbd);</div><div class='hunk'>@@ -70,6 +88,7 @@ int fbnic_netdev_register(struct net_device *netdev);</div><div class='ctx'> void fbnic_netdev_unregister(struct net_device *netdev);</div><div class='ctx'> void fbnic_reset_queues(struct fbnic_net *fbn,</div><div class='ctx'> 			unsigned int tx, unsigned int rx);</div><div class='add'>+</div><div class='ctx'> void fbnic_set_ethtool_ops(struct net_device *dev);</div><div class='ctx'> </div><div class='ctx'> int fbnic_ptp_setup(struct fbnic_dev *fbd);</div><div class='hunk'>@@ -78,8 +97,21 @@ void fbnic_time_init(struct fbnic_net *fbn);</div><div class='ctx'> int fbnic_time_start(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_time_stop(struct fbnic_net *fbn);</div><div class='ctx'> </div><div class='del'>-void __fbnic_set_rx_mode(struct net_device *netdev);</div><div class='del'>-void fbnic_clear_rx_mode(struct net_device *netdev);</div><div class='del'>-</div><div class='add'>+void __fbnic_set_rx_mode(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_clear_rx_mode(struct fbnic_dev *fbd);</div><div class='add'>+</div><div class='add'>+void fbnic_phylink_get_pauseparam(struct net_device *netdev,</div><div class='add'>+				  struct ethtool_pauseparam *pause);</div><div class='add'>+int fbnic_phylink_set_pauseparam(struct net_device *netdev,</div><div class='add'>+				 struct ethtool_pauseparam *pause);</div><div class='add'>+int fbnic_phylink_ethtool_ksettings_get(struct net_device *netdev,</div><div class='add'>+					struct ethtool_link_ksettings *cmd);</div><div class='add'>+int fbnic_phylink_get_fecparam(struct net_device *netdev,</div><div class='add'>+			       struct ethtool_fecparam *fecparam);</div><div class='add'>+int fbnic_phylink_create(struct net_device *netdev);</div><div class='add'>+void fbnic_phylink_destroy(struct net_device *netdev);</div><div class='ctx'> int fbnic_phylink_init(struct net_device *netdev);</div><div class='add'>+void fbnic_phylink_pmd_training_complete_notify(struct net_device *netdev);</div><div class='add'>+bool fbnic_check_split_frames(struct bpf_prog *prog,</div><div class='add'>+			      unsigned int mtu, u32 hds_threshold);</div><div class='ctx'> #endif /* _FBNIC_NETDEV_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_pci.c b/drivers/net/ethernet/meta/fbnic/fbnic_pci.c<br/>index 2de5a6fde7e8..9240673c7533 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_pci.c</a></div><div class='hunk'>@@ -6,9 +6,11 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fbnic.h"</div><div class='ctx'> #include "fbnic_drvinfo.h"</div><div class='add'>+#include "fbnic_hw_stats.h"</div><div class='ctx'> #include "fbnic_netdev.h"</div><div class='ctx'> </div><div class='ctx'> char fbnic_driver_name[] = DRV_NAME;</div><div class='hunk'>@@ -116,14 +118,12 @@ static void fbnic_service_task_start(struct fbnic_net *fbn)</div><div class='ctx'> 	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='ctx'> </div><div class='ctx'> 	schedule_delayed_work(&amp;fbd-&gt;service_task, HZ);</div><div class='del'>-	phylink_resume(fbn-&gt;phylink);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_service_task_stop(struct fbnic_net *fbn)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='ctx'> </div><div class='del'>-	phylink_suspend(fbn-&gt;phylink, fbnic_bmc_present(fbd));</div><div class='ctx'> 	cancel_delayed_work(&amp;fbd-&gt;service_task);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -135,7 +135,7 @@ void fbnic_up(struct fbnic_net *fbn)</div><div class='ctx'> </div><div class='ctx'> 	fbnic_rss_reinit_hw(fbn-&gt;fbd, fbn);</div><div class='ctx'> </div><div class='del'>-	__fbnic_set_rx_mode(fbn-&gt;netdev);</div><div class='add'>+	__fbnic_set_rx_mode(fbn-&gt;fbd);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable Tx/Rx processing */</div><div class='ctx'> 	fbnic_napi_enable(fbn);</div><div class='hunk'>@@ -144,7 +144,7 @@ void fbnic_up(struct fbnic_net *fbn)</div><div class='ctx'> 	fbnic_service_task_start(fbn);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_down_noidle(struct fbnic_net *fbn)</div><div class='add'>+void fbnic_down_noidle(struct fbnic_net *fbn)</div><div class='ctx'> {</div><div class='ctx'> 	fbnic_service_task_stop(fbn);</div><div class='ctx'> </div><div class='hunk'>@@ -152,7 +152,7 @@ static void fbnic_down_noidle(struct fbnic_net *fbn)</div><div class='ctx'> 	fbnic_napi_disable(fbn);</div><div class='ctx'> 	netif_tx_disable(fbn-&gt;netdev);</div><div class='ctx'> </div><div class='del'>-	fbnic_clear_rx_mode(fbn-&gt;netdev);</div><div class='add'>+	fbnic_clear_rx_mode(fbn-&gt;fbd);</div><div class='ctx'> 	fbnic_clear_rules(fbn-&gt;fbd);</div><div class='ctx'> 	fbnic_rss_disable_hw(fbn-&gt;fbd);</div><div class='ctx'> 	fbnic_disable(fbn);</div><div class='hunk'>@@ -167,11 +167,25 @@ void fbnic_down(struct fbnic_net *fbn)</div><div class='ctx'> 	fbnic_flush(fbn);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int fbnic_fw_config_after_crash(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	if (fbnic_fw_xmit_ownership_msg(fbd, true)) {</div><div class='add'>+		dev_err(fbd-&gt;dev, "NIC failed to take ownership\n");</div><div class='add'>+</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fbnic_rpc_reset_valid_entries(fbd);</div><div class='add'>+	__fbnic_set_rx_mode(fbd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fbnic_health_check(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_fw_mbx *tx_mbx = &amp;fbd-&gt;mbx[FBNIC_IPC_MBX_TX_IDX];</div><div class='ctx'> </div><div class='del'>-	/* As long as the heart is beating the FW is healty */</div><div class='add'>+	/* As long as the heart is beating the FW is healthy */</div><div class='ctx'> 	if (fbd-&gt;fw_heartbeat_enabled)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -182,30 +196,39 @@ static void fbnic_health_check(struct fbnic_dev *fbd)</div><div class='ctx'> 	if (tx_mbx-&gt;head != tx_mbx-&gt;tail)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/* TBD: Need to add a more thorough recovery here.</div><div class='del'>-	 *	Specifically I need to verify what all the firmware will have</div><div class='del'>-	 *	changed since we had setup and it rebooted. May just need to</div><div class='del'>-	 *	perform a down/up. For now we will just reclaim ownership so</div><div class='del'>-	 *	the heartbeat can catch the next fault.</div><div class='del'>-	 */</div><div class='del'>-	fbnic_fw_xmit_ownership_msg(fbd, true);</div><div class='add'>+	fbnic_devlink_fw_report(fbd, "Firmware crash detected!");</div><div class='add'>+	fbnic_devlink_otp_check(fbd, "error detected after firmware recovery");</div><div class='add'>+</div><div class='add'>+	if (fbnic_fw_config_after_crash(fbd))</div><div class='add'>+		dev_err(fbd-&gt;dev, "Firmware recovery failed after crash\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_service_task(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_dev *fbd = container_of(to_delayed_work(work),</div><div class='ctx'> 					     struct fbnic_dev, service_task);</div><div class='add'>+	struct net_device *netdev = fbd-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev))</div><div class='add'>+		fbnic_phylink_pmd_training_complete_notify(netdev);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> </div><div class='add'>+	fbnic_get_hw_stats32(fbd);</div><div class='add'>+</div><div class='ctx'> 	fbnic_fw_check_heartbeat(fbd);</div><div class='ctx'> </div><div class='ctx'> 	fbnic_health_check(fbd);</div><div class='ctx'> </div><div class='del'>-	if (netif_carrier_ok(fbd-&gt;netdev))</div><div class='add'>+	fbnic_bmc_rpc_check(fbd);</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(fbd-&gt;netdev)) {</div><div class='add'>+		netdev_lock(fbd-&gt;netdev);</div><div class='ctx'> 		fbnic_napi_depletion_check(fbd-&gt;netdev);</div><div class='add'>+		netdev_unlock(fbd-&gt;netdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (netif_running(fbd-&gt;netdev))</div><div class='add'>+	if (netif_running(netdev))</div><div class='ctx'> 		schedule_delayed_work(&amp;fbd-&gt;service_task, HZ);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_unlock();</div><div class='hunk'>@@ -262,6 +285,10 @@ static int fbnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = fbnic_devlink_health_create(fbd);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_fbd;</div><div class='add'>+</div><div class='ctx'> 	/* Populate driver with hardware-specific info and handlers */</div><div class='ctx'> 	fbd-&gt;max_num_queues = info-&gt;max_num_queues;</div><div class='ctx'> </div><div class='hunk'>@@ -272,7 +299,7 @@ static int fbnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	err = fbnic_alloc_irqs(fbd);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto free_fbd;</div><div class='add'>+		goto err_destroy_health;</div><div class='ctx'> </div><div class='ctx'> 	err = fbnic_mac_init(fbd);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -280,14 +307,30 @@ static int fbnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto free_irqs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = fbnic_fw_enable_mbx(fbd);</div><div class='add'>+	err = fbnic_fw_request_mbx(fbd);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 			"Firmware mailbox initialization failure\n");</div><div class='ctx'> 		goto free_irqs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Send the request to enable the FW logging to host. Note if this</div><div class='add'>+	 * fails we ignore the error and just display a message as it is</div><div class='add'>+	 * possible the FW is just too old to support the logging and needs</div><div class='add'>+	 * to be updated.</div><div class='add'>+	 */</div><div class='add'>+	err = fbnic_fw_log_init(fbd);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_warn(fbd-&gt;dev,</div><div class='add'>+			 "Unable to initialize firmware log buffer: %d\n",</div><div class='add'>+			 err);</div><div class='add'>+</div><div class='ctx'> 	fbnic_devlink_register(fbd);</div><div class='add'>+	fbnic_devlink_otp_check(fbd, "error detected during probe");</div><div class='add'>+	fbnic_dbg_fbd_init(fbd);</div><div class='add'>+</div><div class='add'>+	/* Capture snapshot of hardware stats so netdev can calculate delta */</div><div class='add'>+	fbnic_init_hw_stats(fbd);</div><div class='ctx'> </div><div class='ctx'> 	fbnic_hwmon_register(fbd);</div><div class='ctx'> </div><div class='hunk'>@@ -296,6 +339,9 @@ static int fbnic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto init_failure_mode;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (fbnic_mdiobus_create(fbd))</div><div class='add'>+		goto init_failure_mode;</div><div class='add'>+</div><div class='ctx'> 	netdev = fbnic_netdev_alloc(fbd);</div><div class='ctx'> 	if (!netdev) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Netdev allocation failed\n");</div><div class='hunk'>@@ -326,8 +372,9 @@ init_failure_mode:</div><div class='ctx'> 	return 0;</div><div class='ctx'> free_irqs:</div><div class='ctx'> 	fbnic_free_irqs(fbd);</div><div class='add'>+err_destroy_health:</div><div class='add'>+	fbnic_devlink_health_destroy(fbd);</div><div class='ctx'> free_fbd:</div><div class='del'>-	pci_disable_device(pdev);</div><div class='ctx'> 	fbnic_devlink_free(fbd);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -338,7 +385,7 @@ free_fbd:</div><div class='ctx'>  * @pdev: PCI device information struct</div><div class='ctx'>  *</div><div class='ctx'>  * Called by the PCI subsystem to alert the driver that it should release</div><div class='del'>- * a PCI device.  The could be caused by a Hot-Plug event, or because the</div><div class='add'>+ * a PCI device.  This could be caused by a Hot-Plug event, or because the</div><div class='ctx'>  * driver is going to be removed from memory.</div><div class='ctx'>  **/</div><div class='ctx'> static void fbnic_remove(struct pci_dev *pdev)</div><div class='hunk'>@@ -355,11 +402,13 @@ static void fbnic_remove(struct pci_dev *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	fbnic_hwmon_unregister(fbd);</div><div class='add'>+	fbnic_dbg_fbd_exit(fbd);</div><div class='ctx'> 	fbnic_devlink_unregister(fbd);</div><div class='del'>-	fbnic_fw_disable_mbx(fbd);</div><div class='add'>+	fbnic_fw_log_free(fbd);</div><div class='add'>+	fbnic_fw_free_mbx(fbd);</div><div class='ctx'> 	fbnic_free_irqs(fbd);</div><div class='ctx'> </div><div class='del'>-	pci_disable_device(pdev);</div><div class='add'>+	fbnic_devlink_health_destroy(fbd);</div><div class='ctx'> 	fbnic_devlink_free(fbd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -372,16 +421,24 @@ static int fbnic_pm_suspend(struct device *dev)</div><div class='ctx'> 		goto null_uc_addr;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		netdev-&gt;netdev_ops-&gt;ndo_stop(netdev);</div><div class='ctx'> </div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> null_uc_addr:</div><div class='del'>-	fbnic_fw_disable_mbx(fbd);</div><div class='add'>+	fbnic_fw_log_disable(fbd);</div><div class='add'>+</div><div class='add'>+	devl_lock(priv_to_devlink(fbd));</div><div class='add'>+</div><div class='add'>+	fbnic_fw_free_mbx(fbd);</div><div class='add'>+</div><div class='add'>+	devl_unlock(priv_to_devlink(fbd));</div><div class='ctx'> </div><div class='ctx'> 	/* Free the IRQs so they aren't trying to occupy sleeping CPUs */</div><div class='ctx'> 	fbnic_free_irqs(fbd);</div><div class='hunk'>@@ -413,11 +470,22 @@ static int __fbnic_pm_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	fbd-&gt;mac-&gt;init_regs(fbd);</div><div class='ctx'> </div><div class='add'>+	devl_lock(priv_to_devlink(fbd));</div><div class='add'>+</div><div class='ctx'> 	/* Re-enable mailbox */</div><div class='del'>-	err = fbnic_fw_enable_mbx(fbd);</div><div class='add'>+	err = fbnic_fw_request_mbx(fbd);</div><div class='add'>+	devl_unlock(priv_to_devlink(fbd));</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_irqs;</div><div class='ctx'> </div><div class='add'>+	/* Only send log history if log buffer is empty to prevent duplicate</div><div class='add'>+	 * log entries.</div><div class='add'>+	 */</div><div class='add'>+	fbnic_fw_log_enable(fbd, list_empty(&amp;fbd-&gt;fw_log.entries));</div><div class='add'>+</div><div class='add'>+	/* Since the FW should be up, check if it reported OTP errors */</div><div class='add'>+	fbnic_devlink_otp_check(fbd, "error detected after PM resume");</div><div class='add'>+</div><div class='ctx'> 	/* No netdev means there isn't a network interface to bring up */</div><div class='ctx'> 	if (fbnic_init_failure(fbd))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -428,19 +496,23 @@ static int __fbnic_pm_resume(struct device *dev)</div><div class='ctx'> 	fbnic_reset_queues(fbn, fbn-&gt;num_tx_queues, fbn-&gt;num_rx_queues);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	netdev_lock(netdev);</div><div class='ctx'> </div><div class='del'>-	if (netif_running(netdev)) {</div><div class='add'>+	if (netif_running(netdev))</div><div class='ctx'> 		err = __fbnic_open(fbn);</div><div class='del'>-		if (err)</div><div class='del'>-			goto err_disable_mbx;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+	netdev_unlock(netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_mbx;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-err_disable_mbx:</div><div class='del'>-	rtnl_unlock();</div><div class='del'>-	fbnic_fw_disable_mbx(fbd);</div><div class='add'>+err_free_mbx:</div><div class='add'>+	fbnic_fw_log_disable(fbd);</div><div class='add'>+</div><div class='add'>+	devl_lock(priv_to_devlink(fbd));</div><div class='add'>+	fbnic_fw_free_mbx(fbd);</div><div class='add'>+	devl_unlock(priv_to_devlink(fbd));</div><div class='ctx'> err_free_irqs:</div><div class='ctx'> 	fbnic_free_irqs(fbd);</div><div class='ctx'> err_invalidate_uc_addr:</div><div class='hunk'>@@ -455,6 +527,10 @@ static void __fbnic_pm_attach(struct device *dev)</div><div class='ctx'> 	struct net_device *netdev = fbd-&gt;netdev;</div><div class='ctx'> 	struct fbnic_net *fbn;</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='add'>+	fbnic_reset_hw_stats(fbd);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='ctx'> 	if (fbnic_init_failure(fbd))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -505,7 +581,6 @@ static pci_ers_result_t fbnic_err_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_power_state(pdev, PCI_D0);</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 	if (pci_enable_device_mem(pdev)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='hunk'>@@ -552,9 +627,13 @@ static int __init fbnic_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	fbnic_dbg_init();</div><div class='add'>+</div><div class='ctx'> 	err = pci_register_driver(&amp;fbnic_driver);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		fbnic_dbg_exit();</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	pr_info(DRV_SUMMARY " (%s)", fbnic_driver.name);</div><div class='ctx'> out:</div><div class='hunk'>@@ -570,5 +649,7 @@ module_init(fbnic_init_module);</div><div class='ctx'> static void __exit fbnic_exit_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	pci_unregister_driver(&amp;fbnic_driver);</div><div class='add'>+</div><div class='add'>+	fbnic_dbg_exit();</div><div class='ctx'> }</div><div class='ctx'> module_exit(fbnic_exit_module);</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_phylink.c b/drivers/net/ethernet/meta/fbnic/fbnic_phylink.c<br/>index 1a5e1e719b30..09c5225111be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_phylink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_phylink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_phylink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_phylink.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* Copyright (c) Meta Platforms, Inc. and affiliates. */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/pcs/pcs-xpcs.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/phylink.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -8,77 +9,99 @@</div><div class='ctx'> #include "fbnic_mac.h"</div><div class='ctx'> #include "fbnic_netdev.h"</div><div class='ctx'> </div><div class='del'>-static struct fbnic_net *</div><div class='del'>-fbnic_pcs_to_net(struct phylink_pcs *pcs)</div><div class='add'>+static phy_interface_t fbnic_phylink_select_interface(u8 aui)</div><div class='ctx'> {</div><div class='del'>-	return container_of(pcs, struct fbnic_net, phylink_pcs);</div><div class='add'>+	switch (aui) {</div><div class='add'>+	case FBNIC_AUI_100GAUI2:</div><div class='add'>+		return PHY_INTERFACE_MODE_100GBASEP;</div><div class='add'>+	case FBNIC_AUI_50GAUI1:</div><div class='add'>+		return PHY_INTERFACE_MODE_50GBASER;</div><div class='add'>+	case FBNIC_AUI_LAUI2:</div><div class='add'>+		return PHY_INTERFACE_MODE_LAUI;</div><div class='add'>+	case FBNIC_AUI_25GAUI:</div><div class='add'>+		return PHY_INTERFACE_MODE_25GBASER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return PHY_INTERFACE_MODE_NA;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-fbnic_phylink_pcs_get_state(struct phylink_pcs *pcs,</div><div class='del'>-			    struct phylink_link_state *state)</div><div class='add'>+void fbnic_phylink_get_pauseparam(struct net_device *netdev,</div><div class='add'>+				  struct ethtool_pauseparam *pause)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_net *fbn = fbnic_pcs_to_net(pcs);</div><div class='del'>-	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='del'>-</div><div class='del'>-	/* For now we use hard-coded defaults and FW config to determine</div><div class='del'>-	 * the current values. In future patches we will add support for</div><div class='del'>-	 * reconfiguring these values and changing link settings.</div><div class='del'>-	 */</div><div class='del'>-	switch (fbd-&gt;fw_cap.link_speed) {</div><div class='del'>-	case FBNIC_FW_LINK_SPEED_25R1:</div><div class='del'>-		state-&gt;speed = SPEED_25000;</div><div class='del'>-		break;</div><div class='del'>-	case FBNIC_FW_LINK_SPEED_50R2:</div><div class='del'>-		state-&gt;speed = SPEED_50000;</div><div class='del'>-		break;</div><div class='del'>-	case FBNIC_FW_LINK_SPEED_100R2:</div><div class='del'>-		state-&gt;speed = SPEED_100000;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		state-&gt;speed = SPEED_UNKNOWN;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	state-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	state-&gt;link = fbd-&gt;mac-&gt;pcs_get_link(fbd);</div><div class='add'>+	phylink_ethtool_get_pauseparam(fbn-&gt;phylink, pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-fbnic_phylink_pcs_enable(struct phylink_pcs *pcs)</div><div class='add'>+int fbnic_phylink_set_pauseparam(struct net_device *netdev,</div><div class='add'>+				 struct ethtool_pauseparam *pause)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_net *fbn = fbnic_pcs_to_net(pcs);</div><div class='del'>-	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	return fbd-&gt;mac-&gt;pcs_enable(fbd);</div><div class='add'>+	return phylink_ethtool_set_pauseparam(fbn-&gt;phylink, pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-fbnic_phylink_pcs_disable(struct phylink_pcs *pcs)</div><div class='add'>+fbnic_phylink_get_supported_fec_modes(unsigned long *supported)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_net *fbn = fbnic_pcs_to_net(pcs);</div><div class='del'>-	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	/* The NIC can support up to 8 possible combinations.</div><div class='add'>+	 * Either 50G-CR, or 100G-CR2</div><div class='add'>+	 *   This is with RS FEC mode only</div><div class='add'>+	 * Either 25G-CR, or 50G-CR2</div><div class='add'>+	 *   This is with No FEC, RS, or Base-R</div><div class='add'>+	 */</div><div class='add'>+	if (phylink_test(supported, 100000baseCR2_Full) ||</div><div class='add'>+	    phylink_test(supported, 50000baseCR_Full))</div><div class='add'>+		phylink_set(supported, FEC_RS);</div><div class='add'>+	if (phylink_test(supported, 50000baseCR2_Full) ||</div><div class='add'>+	    phylink_test(supported, 25000baseCR_Full)) {</div><div class='add'>+		phylink_set(supported, FEC_BASER);</div><div class='add'>+		phylink_set(supported, FEC_NONE);</div><div class='add'>+		phylink_set(supported, FEC_RS);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fbnic_phylink_ethtool_ksettings_get(struct net_device *netdev,</div><div class='add'>+					struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = phylink_ethtool_ksettings_get(fbn-&gt;phylink, cmd);</div><div class='add'>+	if (!err) {</div><div class='add'>+		unsigned long *supp = cmd-&gt;link_modes.supported;</div><div class='ctx'> </div><div class='del'>-	return fbd-&gt;mac-&gt;pcs_disable(fbd);</div><div class='add'>+		cmd-&gt;base.port = PORT_DA;</div><div class='add'>+		cmd-&gt;lanes = (fbn-&gt;aui &amp; FBNIC_AUI_MODE_R2) ? 2 : 1;</div><div class='add'>+</div><div class='add'>+		fbnic_phylink_get_supported_fec_modes(supp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-fbnic_phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='del'>-			 phy_interface_t interface,</div><div class='del'>-			 const unsigned long *advertising,</div><div class='del'>-			 bool permit_pause_to_mac)</div><div class='add'>+int fbnic_phylink_get_fecparam(struct net_device *netdev,</div><div class='add'>+			       struct ethtool_fecparam *fecparam)</div><div class='ctx'> {</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (fbn-&gt;fec &amp; FBNIC_FEC_RS) {</div><div class='add'>+		fecparam-&gt;active_fec = ETHTOOL_FEC_RS;</div><div class='add'>+		fecparam-&gt;fec = ETHTOOL_FEC_RS;</div><div class='add'>+	} else if (fbn-&gt;fec &amp; FBNIC_FEC_BASER) {</div><div class='add'>+		fecparam-&gt;active_fec = ETHTOOL_FEC_BASER;</div><div class='add'>+		fecparam-&gt;fec = ETHTOOL_FEC_BASER;</div><div class='add'>+	} else {</div><div class='add'>+		fecparam-&gt;active_fec = ETHTOOL_FEC_OFF;</div><div class='add'>+		fecparam-&gt;fec = ETHTOOL_FEC_OFF;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fbn-&gt;aui &amp; FBNIC_AUI_MODE_PAM4)</div><div class='add'>+		fecparam-&gt;fec |= ETHTOOL_FEC_AUTO;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct phylink_pcs_ops fbnic_phylink_pcs_ops = {</div><div class='del'>-	.pcs_config = fbnic_phylink_pcs_config,</div><div class='del'>-	.pcs_enable = fbnic_phylink_pcs_enable,</div><div class='del'>-	.pcs_disable = fbnic_phylink_pcs_disable,</div><div class='del'>-	.pcs_get_state = fbnic_phylink_pcs_get_state,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct phylink_pcs *</div><div class='ctx'> fbnic_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='ctx'> 			     phy_interface_t interface)</div><div class='hunk'>@@ -86,7 +109,20 @@ fbnic_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='ctx'> 	struct net_device *netdev = to_net_dev(config-&gt;dev);</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	return &amp;fbn-&gt;phylink_pcs;</div><div class='add'>+	return fbn-&gt;pcs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+fbnic_phylink_mac_prepare(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			  phy_interface_t iface)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+</div><div class='add'>+	fbd-&gt;mac-&gt;prepare(fbd, fbn-&gt;aui, fbn-&gt;fec);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -95,6 +131,20 @@ fbnic_phylink_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+fbnic_phylink_mac_finish(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			 phy_interface_t iface)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+</div><div class='add'>+	/* Retest the link state and restart interrupts */</div><div class='add'>+	fbd-&gt;mac-&gt;get_link(fbd, fbn-&gt;aui, fbn-&gt;fec);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> fbnic_phylink_mac_link_down(struct phylink_config *config, unsigned int mode,</div><div class='ctx'> 			    phy_interface_t interface)</div><div class='hunk'>@@ -118,44 +168,144 @@ fbnic_phylink_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='ctx'> 	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='ctx'> </div><div class='add'>+	fbn-&gt;tx_pause = tx_pause;</div><div class='add'>+	fbnic_config_drop_mode(fbn, tx_pause);</div><div class='add'>+</div><div class='ctx'> 	fbd-&gt;mac-&gt;link_up(fbd, tx_pause, rx_pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_mac_ops fbnic_phylink_mac_ops = {</div><div class='ctx'> 	.mac_select_pcs = fbnic_phylink_mac_select_pcs,</div><div class='add'>+	.mac_prepare = fbnic_phylink_mac_prepare,</div><div class='ctx'> 	.mac_config = fbnic_phylink_mac_config,</div><div class='add'>+	.mac_finish = fbnic_phylink_mac_finish,</div><div class='ctx'> 	.mac_link_down = fbnic_phylink_mac_link_down,</div><div class='ctx'> 	.mac_link_up = fbnic_phylink_mac_link_up,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int fbnic_phylink_init(struct net_device *netdev)</div><div class='add'>+/**</div><div class='add'>+ * fbnic_phylink_create - Phylink device creation</div><div class='add'>+ * @netdev: Network Device struct to attach phylink device</div><div class='add'>+ *</div><div class='add'>+ * Initialize and attach a phylink instance to the device. The phylink</div><div class='add'>+ * device will make use of the netdev struct to track carrier and will</div><div class='add'>+ * eventually be used to expose the current state of the MAC and PCS</div><div class='add'>+ * setup.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative on failure</div><div class='add'>+ **/</div><div class='add'>+int fbnic_phylink_create(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='ctx'> 	struct phylink *phylink;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pcs = xpcs_create_pcs_mdiodev(fbd-&gt;mdio_bus, 0);</div><div class='add'>+	if (IS_ERR(pcs)) {</div><div class='add'>+		err = PTR_ERR(pcs);</div><div class='add'>+		dev_err(fbd-&gt;dev, "Failed to create PCS device: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	fbn-&gt;phylink_pcs.neg_mode = true;</div><div class='del'>-	fbn-&gt;phylink_pcs.ops = &amp;fbnic_phylink_pcs_ops;</div><div class='add'>+	fbn-&gt;pcs = pcs;</div><div class='ctx'> </div><div class='ctx'> 	fbn-&gt;phylink_config.dev = &amp;netdev-&gt;dev;</div><div class='ctx'> 	fbn-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='ctx'> 	fbn-&gt;phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE |</div><div class='del'>-					       MAC_10000FD | MAC_25000FD |</div><div class='del'>-					       MAC_40000FD | MAC_50000FD |</div><div class='add'>+					       MAC_25000FD | MAC_50000FD |</div><div class='ctx'> 					       MAC_100000FD;</div><div class='ctx'> 	fbn-&gt;phylink_config.default_an_inband = true;</div><div class='ctx'> </div><div class='del'>-	__set_bit(PHY_INTERFACE_MODE_XGMII,</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_100GBASEP,</div><div class='ctx'> 		  fbn-&gt;phylink_config.supported_interfaces);</div><div class='del'>-	__set_bit(PHY_INTERFACE_MODE_XLGMII,</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_50GBASER,</div><div class='ctx'> 		  fbn-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_LAUI,</div><div class='add'>+		  fbn-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_25GBASER,</div><div class='add'>+		  fbn-&gt;phylink_config.supported_interfaces);</div><div class='add'>+</div><div class='add'>+	fbnic_mac_get_fw_settings(fbd, &amp;fbn-&gt;aui, &amp;fbn-&gt;fec);</div><div class='ctx'> </div><div class='ctx'> 	phylink = phylink_create(&amp;fbn-&gt;phylink_config, NULL,</div><div class='del'>-				 PHY_INTERFACE_MODE_XLGMII,</div><div class='add'>+				 fbnic_phylink_select_interface(fbn-&gt;aui),</div><div class='ctx'> 				 &amp;fbnic_phylink_mac_ops);</div><div class='del'>-	if (IS_ERR(phylink))</div><div class='del'>-		return PTR_ERR(phylink);</div><div class='add'>+	if (IS_ERR(phylink)) {</div><div class='add'>+		err = PTR_ERR(phylink);</div><div class='add'>+		dev_err(netdev-&gt;dev.parent,</div><div class='add'>+			"Failed to create Phylink interface, err: %d\n", err);</div><div class='add'>+		xpcs_destroy_pcs(pcs);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	fbn-&gt;phylink = phylink;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fbnic_phylink_destroy - Teardown phylink related interfaces</div><div class='add'>+ * @netdev: Network Device struct containing phylink device</div><div class='add'>+ *</div><div class='add'>+ * Detach and free resources related to phylink interface.</div><div class='add'>+ **/</div><div class='add'>+void fbnic_phylink_destroy(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (fbn-&gt;phylink)</div><div class='add'>+		phylink_destroy(fbn-&gt;phylink);</div><div class='add'>+	if (fbn-&gt;pcs)</div><div class='add'>+		xpcs_destroy_pcs(fbn-&gt;pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * fbnic_phylink_pmd_training_complete_notify - PMD training complete notifier</div><div class='add'>+ * @netdev: Netdev struct phylink device attached to</div><div class='add'>+ *</div><div class='add'>+ * When the link first comes up the PMD will have a period of 2 to 3 seconds</div><div class='add'>+ * where the link will flutter due to link training. To avoid spamming the</div><div class='add'>+ * kernel log with messages about this we add a delay of 4 seconds from the</div><div class='add'>+ * time of the last PCS report of link so that we can guarantee we are unlikely</div><div class='add'>+ * to see any further link loss events due to link training.</div><div class='add'>+ **/</div><div class='add'>+void fbnic_phylink_pmd_training_complete_notify(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+</div><div class='add'>+	if (fbd-&gt;pmd_state != FBNIC_PMD_TRAINING)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Prevent reading end_of_pmd_training until we verified state */</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='add'>+	if (!time_before(READ_ONCE(fbd-&gt;end_of_pmd_training), jiffies))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* At this point we have verified that the link has been up for</div><div class='add'>+	 * the full training duration. As a first step we will try</div><div class='add'>+	 * transitioning to link ready.</div><div class='add'>+	 */</div><div class='add'>+	if (cmpxchg(&amp;fbd-&gt;pmd_state, FBNIC_PMD_TRAINING,</div><div class='add'>+		    FBNIC_PMD_LINK_READY) != FBNIC_PMD_TRAINING)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Perform a follow-up check to verify that the link didn't flap</div><div class='add'>+	 * just before our transition by rechecking the training timer.</div><div class='add'>+	 */</div><div class='add'>+	if (!time_before(READ_ONCE(fbd-&gt;end_of_pmd_training), jiffies))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* The training timeout has been completed. We are good to swap out</div><div class='add'>+	 * link_ready for send_data assuming no other events have occurred</div><div class='add'>+	 * that would have pulled us back into initialization or training.</div><div class='add'>+	 */</div><div class='add'>+	if (cmpxchg(&amp;fbd-&gt;pmd_state, FBNIC_PMD_LINK_READY,</div><div class='add'>+		    FBNIC_PMD_SEND_DATA) != FBNIC_PMD_LINK_READY)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	phylink_pcs_change(fbn-&gt;pcs, false);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_rpc.c b/drivers/net/ethernet/meta/fbnic/fbnic_rpc.c<br/>index 337b8b3aef2f..7f31e890031c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_rpc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_rpc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_rpc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_rpc.c</a></div><div class='hunk'>@@ -3,8 +3,10 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;net/ipv6.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fbnic.h"</div><div class='add'>+#include "fbnic_fw.h"</div><div class='ctx'> #include "fbnic_netdev.h"</div><div class='ctx'> #include "fbnic_rpc.h"</div><div class='ctx'> </div><div class='hunk'>@@ -13,10 +15,11 @@ void fbnic_reset_indir_tbl(struct fbnic_net *fbn)</div><div class='ctx'> 	unsigned int num_rx = fbn-&gt;num_rx_queues;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; FBNIC_RPC_RSS_TBL_SIZE; i++) {</div><div class='add'>+	if (netif_is_rxfh_configured(fbn-&gt;netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_RSS_TBL_SIZE; i++)</div><div class='ctx'> 		fbn-&gt;indir_tbl[0][i] = ethtool_rxfh_indir_default(i, num_rx);</div><div class='del'>-		fbn-&gt;indir_tbl[1][i] = ethtool_rxfh_indir_default(i, num_rx);</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fbnic_rss_key_fill(u32 *buffer)</div><div class='hunk'>@@ -59,7 +62,7 @@ void fbnic_rss_disable_hw(struct fbnic_dev *fbd)</div><div class='ctx'> #define FBNIC_FH_2_RSSEM_BIT(_fh, _rssem, _val)		\</div><div class='ctx'> 	FIELD_PREP(FBNIC_RPC_ACT_TBL1_RSS_ENA_##_rssem,	\</div><div class='ctx'> 		   FIELD_GET(RXH_##_fh, _val))</div><div class='del'>-static u16 fbnic_flow_hash_2_rss_en_mask(struct fbnic_net *fbn, int flow_type)</div><div class='add'>+u16 fbnic_flow_hash_2_rss_en_mask(struct fbnic_net *fbn, int flow_type)</div><div class='ctx'> {</div><div class='ctx'> 	u32 flow_hash = fbn-&gt;rss_flow_hash[flow_type];</div><div class='ctx'> 	u32 rss_en_mask = 0;</div><div class='hunk'>@@ -69,6 +72,8 @@ static u16 fbnic_flow_hash_2_rss_en_mask(struct fbnic_net *fbn, int flow_type)</div><div class='ctx'> 	rss_en_mask |= FBNIC_FH_2_RSSEM_BIT(IP_DST, IP_DST, flow_hash);</div><div class='ctx'> 	rss_en_mask |= FBNIC_FH_2_RSSEM_BIT(L4_B_0_1, L4_SRC, flow_hash);</div><div class='ctx'> 	rss_en_mask |= FBNIC_FH_2_RSSEM_BIT(L4_B_2_3, L4_DST, flow_hash);</div><div class='add'>+	rss_en_mask |= FBNIC_FH_2_RSSEM_BIT(IP6_FL, OV6_FL_LBL, flow_hash);</div><div class='add'>+	rss_en_mask |= FBNIC_FH_2_RSSEM_BIT(IP6_FL, IV6_FL_LBL, flow_hash);</div><div class='ctx'> </div><div class='ctx'> 	return rss_en_mask;</div><div class='ctx'> }</div><div class='hunk'>@@ -127,12 +132,9 @@ void fbnic_bmc_rpc_all_multi_config(struct fbnic_dev *fbd,</div><div class='ctx'> 		else</div><div class='ctx'> 			clear_bit(FBNIC_MAC_ADDR_T_ALLMULTI,</div><div class='ctx'> 				  mac_addr-&gt;act_tcam);</div><div class='del'>-	} else if (!test_bit(FBNIC_MAC_ADDR_T_BMC, mac_addr-&gt;act_tcam) &amp;&amp;</div><div class='del'>-		   !is_zero_ether_addr(mac_addr-&gt;mask.addr8) &amp;&amp;</div><div class='del'>-		   mac_addr-&gt;state == FBNIC_TCAM_S_VALID) {</div><div class='del'>-		clear_bit(FBNIC_MAC_ADDR_T_ALLMULTI, mac_addr-&gt;act_tcam);</div><div class='del'>-		clear_bit(FBNIC_MAC_ADDR_T_BMC, mac_addr-&gt;act_tcam);</div><div class='del'>-		mac_addr-&gt;state = FBNIC_TCAM_S_DELETE;</div><div class='add'>+	} else {</div><div class='add'>+		__fbnic_xc_unsync(mac_addr, FBNIC_MAC_ADDR_T_BMC);</div><div class='add'>+		__fbnic_xc_unsync(mac_addr, FBNIC_MAC_ADDR_T_ALLMULTI);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* We have to add a special handler for multicast as the</div><div class='hunk'>@@ -234,8 +236,25 @@ void fbnic_bmc_rpc_init(struct fbnic_dev *fbd)</div><div class='ctx'> 		act_tcam-&gt;mask.tcam[j] = 0xffff;</div><div class='ctx'> </div><div class='ctx'> 	act_tcam-&gt;state = FBNIC_TCAM_S_UPDATE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_bmc_rpc_check(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (fbd-&gt;fw_cap.need_bmc_tcam_reinit) {</div><div class='add'>+		fbnic_bmc_rpc_init(fbd);</div><div class='add'>+		__fbnic_set_rx_mode(fbd);</div><div class='add'>+		fbd-&gt;fw_cap.need_bmc_tcam_reinit = false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	fbnic_bmc_rpc_all_multi_config(fbd, false);</div><div class='add'>+	if (fbd-&gt;fw_cap.need_bmc_macda_sync) {</div><div class='add'>+		err = fbnic_fw_xmit_rpc_macda_sync(fbd);</div><div class='add'>+		if (err)</div><div class='add'>+			dev_warn(fbd-&gt;dev,</div><div class='add'>+				 "Writing MACDA table to FW failed, err: %d\n", err);</div><div class='add'>+		fbd-&gt;fw_cap.need_bmc_macda_sync = false;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_ACT1_INIT(_l4, _udp, _ip, _v6)		\</div><div class='hunk'>@@ -450,6 +469,50 @@ int __fbnic_xc_unsync(struct fbnic_mac_addr *mac_addr, unsigned int tcam_idx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void fbnic_promisc_sync(struct fbnic_dev *fbd,</div><div class='add'>+			bool uc_promisc, bool mc_promisc)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_mac_addr *mac_addr;</div><div class='add'>+</div><div class='add'>+	/* Populate last TCAM entry with promiscuous entry and 0/1 bit mask */</div><div class='add'>+	mac_addr = &amp;fbd-&gt;mac_addr[FBNIC_RPC_TCAM_MACDA_PROMISC_IDX];</div><div class='add'>+	if (uc_promisc) {</div><div class='add'>+		if (!is_zero_ether_addr(mac_addr-&gt;value.addr8) ||</div><div class='add'>+		    mac_addr-&gt;state != FBNIC_TCAM_S_VALID) {</div><div class='add'>+			eth_zero_addr(mac_addr-&gt;value.addr8);</div><div class='add'>+			eth_broadcast_addr(mac_addr-&gt;mask.addr8);</div><div class='add'>+			clear_bit(FBNIC_MAC_ADDR_T_ALLMULTI,</div><div class='add'>+				  mac_addr-&gt;act_tcam);</div><div class='add'>+			set_bit(FBNIC_MAC_ADDR_T_PROMISC,</div><div class='add'>+				mac_addr-&gt;act_tcam);</div><div class='add'>+			mac_addr-&gt;state = FBNIC_TCAM_S_ADD;</div><div class='add'>+		}</div><div class='add'>+	} else if (mc_promisc &amp;&amp;</div><div class='add'>+		   (!fbnic_bmc_present(fbd) || !fbd-&gt;fw_cap.all_multi)) {</div><div class='add'>+		/* We have to add a special handler for multicast as the</div><div class='add'>+		 * BMC may have an all-multi rule already in place. As such</div><div class='add'>+		 * adding a rule ourselves won't do any good so we will have</div><div class='add'>+		 * to modify the rules for the ALL MULTI below if the BMC</div><div class='add'>+		 * already has the rule in place.</div><div class='add'>+		 */</div><div class='add'>+		if (!is_multicast_ether_addr(mac_addr-&gt;value.addr8) ||</div><div class='add'>+		    mac_addr-&gt;state != FBNIC_TCAM_S_VALID) {</div><div class='add'>+			eth_zero_addr(mac_addr-&gt;value.addr8);</div><div class='add'>+			eth_broadcast_addr(mac_addr-&gt;mask.addr8);</div><div class='add'>+			mac_addr-&gt;value.addr8[0] ^= 1;</div><div class='add'>+			mac_addr-&gt;mask.addr8[0] ^= 1;</div><div class='add'>+			set_bit(FBNIC_MAC_ADDR_T_ALLMULTI,</div><div class='add'>+				mac_addr-&gt;act_tcam);</div><div class='add'>+			clear_bit(FBNIC_MAC_ADDR_T_PROMISC,</div><div class='add'>+				  mac_addr-&gt;act_tcam);</div><div class='add'>+			mac_addr-&gt;state = FBNIC_TCAM_S_ADD;</div><div class='add'>+		}</div><div class='add'>+	} else if (mac_addr-&gt;state == FBNIC_TCAM_S_VALID) {</div><div class='add'>+		__fbnic_xc_unsync(mac_addr, FBNIC_MAC_ADDR_T_ALLMULTI);</div><div class='add'>+		__fbnic_xc_unsync(mac_addr, FBNIC_MAC_ADDR_T_PROMISC);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void fbnic_sift_macda(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='ctx'> 	int dest, src;</div><div class='hunk'>@@ -533,6 +596,21 @@ static void fbnic_clear_macda(struct fbnic_dev *fbd)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void fbnic_clear_valid_macda(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	for (idx = ARRAY_SIZE(fbd-&gt;mac_addr); idx--;) {</div><div class='add'>+		struct fbnic_mac_addr *mac_addr = &amp;fbd-&gt;mac_addr[idx];</div><div class='add'>+</div><div class='add'>+		if (mac_addr-&gt;state == FBNIC_TCAM_S_VALID) {</div><div class='add'>+			fbnic_clear_macda_entry(fbd, idx);</div><div class='add'>+</div><div class='add'>+			mac_addr-&gt;state = FBNIC_TCAM_S_UPDATE;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fbnic_write_macda_entry(struct fbnic_dev *fbd, unsigned int idx,</div><div class='ctx'> 				    struct fbnic_mac_addr *mac_addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -554,7 +632,7 @@ static void fbnic_write_macda_entry(struct fbnic_dev *fbd, unsigned int idx,</div><div class='ctx'> </div><div class='ctx'> void fbnic_write_macda(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	int idx;</div><div class='add'>+	int idx, updates = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (idx = ARRAY_SIZE(fbd-&gt;mac_addr); idx--;) {</div><div class='ctx'> 		struct fbnic_mac_addr *mac_addr = &amp;fbd-&gt;mac_addr[idx];</div><div class='hunk'>@@ -563,6 +641,9 @@ void fbnic_write_macda(struct fbnic_dev *fbd)</div><div class='ctx'> 		if (!(mac_addr-&gt;state &amp; FBNIC_TCAM_S_UPDATE))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		/* Record update count */</div><div class='add'>+		updates++;</div><div class='add'>+</div><div class='ctx'> 		/* Clear by writing 0s. */</div><div class='ctx'> 		if (mac_addr-&gt;state == FBNIC_TCAM_S_DELETE) {</div><div class='ctx'> 			/* Invalidate entry and clear addr state info */</div><div class='hunk'>@@ -576,6 +657,14 @@ void fbnic_write_macda(struct fbnic_dev *fbd)</div><div class='ctx'> </div><div class='ctx'> 		mac_addr-&gt;state = FBNIC_TCAM_S_VALID;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* If reinitializing the BMC TCAM we are doing an initial update */</div><div class='add'>+	if (fbd-&gt;fw_cap.need_bmc_tcam_reinit)</div><div class='add'>+		updates++;</div><div class='add'>+</div><div class='add'>+	/* If needed notify firmware of changes to MACDA TCAM */</div><div class='add'>+	if (updates != 0 &amp;&amp; fbnic_bmc_present(fbd))</div><div class='add'>+		fbd-&gt;fw_cap.need_bmc_macda_sync = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_clear_act_tcam(struct fbnic_dev *fbd, unsigned int idx)</div><div class='hunk'>@@ -587,13 +676,488 @@ static void fbnic_clear_act_tcam(struct fbnic_dev *fbd, unsigned int idx)</div><div class='ctx'> 		wr32(fbd, FBNIC_RPC_TCAM_ACT(idx, i), 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void fbnic_clear_rules(struct fbnic_dev *fbd)</div><div class='add'>+static void fbnic_clear_tce_tcam_entry(struct fbnic_dev *fbd, unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Invalidate entry and clear addr state info */</div><div class='add'>+	for (i = 0; i &lt;= FBNIC_TCE_TCAM_WORD_LEN; i++)</div><div class='add'>+		wr32(fbd, FBNIC_TCE_RAM_TCAM(idx, i), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_write_tce_tcam_dest(struct fbnic_dev *fbd, unsigned int idx,</div><div class='add'>+				      struct fbnic_mac_addr *mac_addr)</div><div class='add'>+{</div><div class='add'>+	u32 dest = FBNIC_TCE_TCAM_DEST_BMC;</div><div class='add'>+	u32 idx2dest_map;</div><div class='add'>+</div><div class='add'>+	if (is_multicast_ether_addr(mac_addr-&gt;value.addr8))</div><div class='add'>+		dest |= FBNIC_TCE_TCAM_DEST_MAC;</div><div class='add'>+</div><div class='add'>+	idx2dest_map = rd32(fbd, FBNIC_TCE_TCAM_IDX2DEST_MAP);</div><div class='add'>+	idx2dest_map &amp;= ~(FBNIC_TCE_TCAM_IDX2DEST_MAP_DEST_ID_0 &lt;&lt; (4 * idx));</div><div class='add'>+	idx2dest_map |= dest &lt;&lt; (4 * idx);</div><div class='add'>+</div><div class='add'>+	wr32(fbd, FBNIC_TCE_TCAM_IDX2DEST_MAP, idx2dest_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_write_tce_tcam_entry(struct fbnic_dev *fbd, unsigned int idx,</div><div class='add'>+				       struct fbnic_mac_addr *mac_addr)</div><div class='add'>+{</div><div class='add'>+	__be16 *mask, *value;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mask = &amp;mac_addr-&gt;mask.addr16[FBNIC_TCE_TCAM_WORD_LEN - 1];</div><div class='add'>+	value = &amp;mac_addr-&gt;value.addr16[FBNIC_TCE_TCAM_WORD_LEN - 1];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_TCE_TCAM_WORD_LEN; i++)</div><div class='add'>+		wr32(fbd, FBNIC_TCE_RAM_TCAM(idx, i),</div><div class='add'>+		     FIELD_PREP(FBNIC_TCE_RAM_TCAM_MASK, ntohs(*mask--)) |</div><div class='add'>+		     FIELD_PREP(FBNIC_TCE_RAM_TCAM_VALUE, ntohs(*value--)));</div><div class='add'>+</div><div class='add'>+	wrfl(fbd);</div><div class='add'>+</div><div class='add'>+	wr32(fbd, FBNIC_TCE_RAM_TCAM3(idx), FBNIC_TCE_RAM_TCAM3_MCQ_MASK |</div><div class='add'>+				       FBNIC_TCE_RAM_TCAM3_DEST_MASK |</div><div class='add'>+				       FBNIC_TCE_RAM_TCAM3_VALIDATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __fbnic_write_tce_tcam_rev(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	int tcam_idx = FBNIC_TCE_TCAM_NUM_ENTRIES;</div><div class='add'>+	int mac_idx;</div><div class='add'>+</div><div class='add'>+	for (mac_idx = ARRAY_SIZE(fbd-&gt;mac_addr); mac_idx--;) {</div><div class='add'>+		struct fbnic_mac_addr *mac_addr = &amp;fbd-&gt;mac_addr[mac_idx];</div><div class='add'>+</div><div class='add'>+		/* Verify BMC bit is set */</div><div class='add'>+		if (!test_bit(FBNIC_MAC_ADDR_T_BMC, mac_addr-&gt;act_tcam))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!tcam_idx) {</div><div class='add'>+			dev_err(fbd-&gt;dev, "TCE TCAM overflow\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tcam_idx--;</div><div class='add'>+		fbnic_write_tce_tcam_dest(fbd, tcam_idx, mac_addr);</div><div class='add'>+		fbnic_write_tce_tcam_entry(fbd, tcam_idx, mac_addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (tcam_idx)</div><div class='add'>+		fbnic_clear_tce_tcam_entry(fbd, --tcam_idx);</div><div class='add'>+</div><div class='add'>+	fbd-&gt;tce_tcam_last = tcam_idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __fbnic_write_tce_tcam(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	int tcam_idx = 0;</div><div class='add'>+	int mac_idx;</div><div class='add'>+</div><div class='add'>+	for (mac_idx = 0; mac_idx &lt; ARRAY_SIZE(fbd-&gt;mac_addr); mac_idx++) {</div><div class='add'>+		struct fbnic_mac_addr *mac_addr = &amp;fbd-&gt;mac_addr[mac_idx];</div><div class='add'>+</div><div class='add'>+		/* Verify BMC bit is set */</div><div class='add'>+		if (!test_bit(FBNIC_MAC_ADDR_T_BMC, mac_addr-&gt;act_tcam))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (tcam_idx == FBNIC_TCE_TCAM_NUM_ENTRIES) {</div><div class='add'>+			dev_err(fbd-&gt;dev, "TCE TCAM overflow\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fbnic_write_tce_tcam_dest(fbd, tcam_idx, mac_addr);</div><div class='add'>+		fbnic_write_tce_tcam_entry(fbd, tcam_idx, mac_addr);</div><div class='add'>+		tcam_idx++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (tcam_idx &lt; FBNIC_TCE_TCAM_NUM_ENTRIES)</div><div class='add'>+		fbnic_clear_tce_tcam_entry(fbd, tcam_idx++);</div><div class='add'>+</div><div class='add'>+	fbd-&gt;tce_tcam_last = tcam_idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_write_tce_tcam(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	if (fbd-&gt;tce_tcam_last)</div><div class='add'>+		__fbnic_write_tce_tcam_rev(fbd);</div><div class='add'>+	else</div><div class='add'>+		__fbnic_write_tce_tcam(fbd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct fbnic_ip_addr *__fbnic_ip4_sync(struct fbnic_dev *fbd,</div><div class='add'>+				       struct fbnic_ip_addr *ip_addr,</div><div class='add'>+				       const struct in_addr *addr,</div><div class='add'>+				       const struct in_addr *mask)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_ip_addr *avail_addr = NULL;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	/* Scan from top of list to bottom, filling bottom up. */</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES; i++, ip_addr++) {</div><div class='add'>+		struct in6_addr *m = &amp;ip_addr-&gt;mask;</div><div class='add'>+</div><div class='add'>+		if (ip_addr-&gt;state == FBNIC_TCAM_S_DISABLED) {</div><div class='add'>+			avail_addr = ip_addr;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ip_addr-&gt;version != 4)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Drop avail_addr if mask is a subset of our current mask,</div><div class='add'>+		 * This prevents us from inserting a longer prefix behind a</div><div class='add'>+		 * shorter one.</div><div class='add'>+		 *</div><div class='add'>+		 * The mask is stored inverted value so as an example:</div><div class='add'>+		 * m	ffff ffff ffff ffff ffff ffff ffff 0000 0000</div><div class='add'>+		 * mask 0000 0000 0000 0000 0000 0000 0000 ffff ffff</div><div class='add'>+		 *</div><div class='add'>+		 * "m" and "mask" represent typical IPv4 mask stored in</div><div class='add'>+		 * the TCAM and those provided by the stack. The code below</div><div class='add'>+		 * should return a non-zero result if there is a 0 stored</div><div class='add'>+		 * anywhere in "m" where "mask" has a 0.</div><div class='add'>+		 */</div><div class='add'>+		if (~m-&gt;s6_addr32[3] &amp; ~mask-&gt;s_addr) {</div><div class='add'>+			avail_addr = NULL;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Check to see if the mask actually contains fewer bits than</div><div class='add'>+		 * our new mask "m". The XOR below should only result in 0 if</div><div class='add'>+		 * "m" is masking a bit that we are looking for in our new</div><div class='add'>+		 * "mask", we eliminated the 0^0 case with the check above.</div><div class='add'>+		 *</div><div class='add'>+		 * If it contains fewer bits we need to stop here, otherwise</div><div class='add'>+		 * we might be adding an unreachable rule.</div><div class='add'>+		 */</div><div class='add'>+		if (~(m-&gt;s6_addr32[3] ^ mask-&gt;s_addr))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (ip_addr-&gt;value.s6_addr32[3] == addr-&gt;s_addr) {</div><div class='add'>+			avail_addr = ip_addr;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (avail_addr &amp;&amp; avail_addr-&gt;state == FBNIC_TCAM_S_DISABLED) {</div><div class='add'>+		ipv6_addr_set(&amp;avail_addr-&gt;value, 0, 0, 0, addr-&gt;s_addr);</div><div class='add'>+		ipv6_addr_set(&amp;avail_addr-&gt;mask, htonl(~0), htonl(~0),</div><div class='add'>+			      htonl(~0), ~mask-&gt;s_addr);</div><div class='add'>+		avail_addr-&gt;version = 4;</div><div class='add'>+</div><div class='add'>+		avail_addr-&gt;state = FBNIC_TCAM_S_ADD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return avail_addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct fbnic_ip_addr *__fbnic_ip6_sync(struct fbnic_dev *fbd,</div><div class='add'>+				       struct fbnic_ip_addr *ip_addr,</div><div class='add'>+				       const struct in6_addr *addr,</div><div class='add'>+				       const struct in6_addr *mask)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_ip_addr *avail_addr = NULL;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	ip_addr = &amp;ip_addr[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES - 1];</div><div class='add'>+</div><div class='add'>+	/* Scan from bottom of list to top, filling top down. */</div><div class='add'>+	for (i = FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES; i--; ip_addr--) {</div><div class='add'>+		struct in6_addr *m = &amp;ip_addr-&gt;mask;</div><div class='add'>+</div><div class='add'>+		if (ip_addr-&gt;state == FBNIC_TCAM_S_DISABLED) {</div><div class='add'>+			avail_addr = ip_addr;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ip_addr-&gt;version != 6)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Drop avail_addr if mask is a superset of our current mask.</div><div class='add'>+		 * This prevents us from inserting a longer prefix behind a</div><div class='add'>+		 * shorter one.</div><div class='add'>+		 *</div><div class='add'>+		 * The mask is stored inverted value so as an example:</div><div class='add'>+		 * m	0000 0000 0000 0000 0000 0000 0000 0000 0000</div><div class='add'>+		 * mask ffff ffff ffff ffff ffff ffff ffff ffff ffff</div><div class='add'>+		 *</div><div class='add'>+		 * "m" and "mask" represent typical IPv6 mask stored in</div><div class='add'>+		 * the TCAM and those provided by the stack. The code below</div><div class='add'>+		 * should return a non-zero result which will cause us</div><div class='add'>+		 * to drop the avail_addr value that might be cached</div><div class='add'>+		 * to prevent us from dropping a v6 address behind it.</div><div class='add'>+		 */</div><div class='add'>+		if ((m-&gt;s6_addr32[0] &amp; mask-&gt;s6_addr32[0]) |</div><div class='add'>+		    (m-&gt;s6_addr32[1] &amp; mask-&gt;s6_addr32[1]) |</div><div class='add'>+		    (m-&gt;s6_addr32[2] &amp; mask-&gt;s6_addr32[2]) |</div><div class='add'>+		    (m-&gt;s6_addr32[3] &amp; mask-&gt;s6_addr32[3])) {</div><div class='add'>+			avail_addr = NULL;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* The previous test eliminated any overlap between the</div><div class='add'>+		 * two values so now we need to check for gaps.</div><div class='add'>+		 *</div><div class='add'>+		 * If the mask is equal to our current mask then it should</div><div class='add'>+		 * result with m ^ mask = ffff ffff, if however the value</div><div class='add'>+		 * stored in m is bigger then we should see a 0 appear</div><div class='add'>+		 * somewhere in the mask.</div><div class='add'>+		 */</div><div class='add'>+		if (~(m-&gt;s6_addr32[0] ^ mask-&gt;s6_addr32[0]) |</div><div class='add'>+		    ~(m-&gt;s6_addr32[1] ^ mask-&gt;s6_addr32[1]) |</div><div class='add'>+		    ~(m-&gt;s6_addr32[2] ^ mask-&gt;s6_addr32[2]) |</div><div class='add'>+		    ~(m-&gt;s6_addr32[3] ^ mask-&gt;s6_addr32[3]))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (ipv6_addr_cmp(&amp;ip_addr-&gt;value, addr))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		avail_addr = ip_addr;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (avail_addr &amp;&amp; avail_addr-&gt;state == FBNIC_TCAM_S_DISABLED) {</div><div class='add'>+		memcpy(&amp;avail_addr-&gt;value, addr, sizeof(*addr));</div><div class='add'>+		ipv6_addr_set(&amp;avail_addr-&gt;mask,</div><div class='add'>+			      ~mask-&gt;s6_addr32[0], ~mask-&gt;s6_addr32[1],</div><div class='add'>+			      ~mask-&gt;s6_addr32[2], ~mask-&gt;s6_addr32[3]);</div><div class='add'>+		avail_addr-&gt;version = 6;</div><div class='add'>+</div><div class='add'>+		avail_addr-&gt;state = FBNIC_TCAM_S_ADD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return avail_addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __fbnic_ip_unsync(struct fbnic_ip_addr *ip_addr, unsigned int tcam_idx)</div><div class='add'>+{</div><div class='add'>+	if (!test_and_clear_bit(tcam_idx, ip_addr-&gt;act_tcam))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (bitmap_empty(ip_addr-&gt;act_tcam, FBNIC_RPC_TCAM_ACT_NUM_ENTRIES))</div><div class='add'>+		ip_addr-&gt;state = FBNIC_TCAM_S_DELETE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clear_ip_src_entry(struct fbnic_dev *fbd, unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Invalidate entry and clear addr state info */</div><div class='add'>+	for (i = 0; i &lt;= FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN; i++)</div><div class='add'>+		wr32(fbd, FBNIC_RPC_TCAM_IPSRC(idx, i), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clear_ip_dst_entry(struct fbnic_dev *fbd, unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Invalidate entry and clear addr state info */</div><div class='add'>+	for (i = 0; i &lt;= FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN; i++)</div><div class='add'>+		wr32(fbd, FBNIC_RPC_TCAM_IPDST(idx, i), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clear_ip_outer_src_entry(struct fbnic_dev *fbd,</div><div class='add'>+					   unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Invalidate entry and clear addr state info */</div><div class='add'>+	for (i = 0; i &lt;= FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN; i++)</div><div class='add'>+		wr32(fbd, FBNIC_RPC_TCAM_OUTER_IPSRC(idx, i), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clear_ip_outer_dst_entry(struct fbnic_dev *fbd,</div><div class='add'>+					   unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Invalidate entry and clear addr state info */</div><div class='add'>+	for (i = 0; i &lt;= FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN; i++)</div><div class='add'>+		wr32(fbd, FBNIC_RPC_TCAM_OUTER_IPDST(idx, i), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_write_ip_src_entry(struct fbnic_dev *fbd, unsigned int idx,</div><div class='add'>+				     struct fbnic_ip_addr *ip_addr)</div><div class='add'>+{</div><div class='add'>+	__be16 *mask, *value;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mask = &amp;ip_addr-&gt;mask.s6_addr16[FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN - 1];</div><div class='add'>+	value = &amp;ip_addr-&gt;value.s6_addr16[FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN - 1];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN; i++)</div><div class='add'>+		wr32(fbd, FBNIC_RPC_TCAM_IPSRC(idx, i),</div><div class='add'>+		     FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_MASK, ntohs(*mask--)) |</div><div class='add'>+		     FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_VALUE, ntohs(*value--)));</div><div class='add'>+	wrfl(fbd);</div><div class='add'>+</div><div class='add'>+	/* Bit 129 is used to flag for v4/v6 */</div><div class='add'>+	wr32(fbd, FBNIC_RPC_TCAM_IPSRC(idx, i),</div><div class='add'>+	     (ip_addr-&gt;version == 6) | FBNIC_RPC_TCAM_VALIDATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_write_ip_dst_entry(struct fbnic_dev *fbd, unsigned int idx,</div><div class='add'>+				     struct fbnic_ip_addr *ip_addr)</div><div class='add'>+{</div><div class='add'>+	__be16 *mask, *value;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mask = &amp;ip_addr-&gt;mask.s6_addr16[FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN - 1];</div><div class='add'>+	value = &amp;ip_addr-&gt;value.s6_addr16[FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN - 1];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN; i++)</div><div class='add'>+		wr32(fbd, FBNIC_RPC_TCAM_IPDST(idx, i),</div><div class='add'>+		     FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_MASK, ntohs(*mask--)) |</div><div class='add'>+		     FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_VALUE, ntohs(*value--)));</div><div class='add'>+	wrfl(fbd);</div><div class='add'>+</div><div class='add'>+	/* Bit 129 is used to flag for v4/v6 */</div><div class='add'>+	wr32(fbd, FBNIC_RPC_TCAM_IPDST(idx, i),</div><div class='add'>+	     (ip_addr-&gt;version == 6) | FBNIC_RPC_TCAM_VALIDATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_write_ip_outer_src_entry(struct fbnic_dev *fbd,</div><div class='add'>+					   unsigned int idx,</div><div class='add'>+					   struct fbnic_ip_addr *ip_addr)</div><div class='add'>+{</div><div class='add'>+	__be16 *mask, *value;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mask = &amp;ip_addr-&gt;mask.s6_addr16[FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN - 1];</div><div class='add'>+	value = &amp;ip_addr-&gt;value.s6_addr16[FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN - 1];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN; i++)</div><div class='add'>+		wr32(fbd, FBNIC_RPC_TCAM_OUTER_IPSRC(idx, i),</div><div class='add'>+		     FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_MASK, ntohs(*mask--)) |</div><div class='add'>+		     FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_VALUE, ntohs(*value--)));</div><div class='add'>+	wrfl(fbd);</div><div class='add'>+</div><div class='add'>+	wr32(fbd, FBNIC_RPC_TCAM_OUTER_IPSRC(idx, i), FBNIC_RPC_TCAM_VALIDATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_write_ip_outer_dst_entry(struct fbnic_dev *fbd,</div><div class='add'>+					   unsigned int idx,</div><div class='add'>+					   struct fbnic_ip_addr *ip_addr)</div><div class='add'>+{</div><div class='add'>+	__be16 *mask, *value;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mask = &amp;ip_addr-&gt;mask.s6_addr16[FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN - 1];</div><div class='add'>+	value = &amp;ip_addr-&gt;value.s6_addr16[FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN - 1];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN; i++)</div><div class='add'>+		wr32(fbd, FBNIC_RPC_TCAM_OUTER_IPDST(idx, i),</div><div class='add'>+		     FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_MASK, ntohs(*mask--)) |</div><div class='add'>+		     FIELD_PREP(FBNIC_RPC_TCAM_IP_ADDR_VALUE, ntohs(*value--)));</div><div class='add'>+	wrfl(fbd);</div><div class='add'>+</div><div class='add'>+	wr32(fbd, FBNIC_RPC_TCAM_OUTER_IPDST(idx, i), FBNIC_RPC_TCAM_VALIDATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_write_ip_addr(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	for (idx = ARRAY_SIZE(fbd-&gt;ip_src); idx--;) {</div><div class='add'>+		struct fbnic_ip_addr *ip_addr = &amp;fbd-&gt;ip_src[idx];</div><div class='add'>+</div><div class='add'>+		/* Check if update flag is set else skip. */</div><div class='add'>+		if (!(ip_addr-&gt;state &amp; FBNIC_TCAM_S_UPDATE))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Clear by writing 0s. */</div><div class='add'>+		if (ip_addr-&gt;state == FBNIC_TCAM_S_DELETE) {</div><div class='add'>+			/* Invalidate entry and clear addr state info */</div><div class='add'>+			fbnic_clear_ip_src_entry(fbd, idx);</div><div class='add'>+			memset(ip_addr, 0, sizeof(*ip_addr));</div><div class='add'>+</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fbnic_write_ip_src_entry(fbd, idx, ip_addr);</div><div class='add'>+</div><div class='add'>+		ip_addr-&gt;state = FBNIC_TCAM_S_VALID;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Repeat process for other IP TCAMs */</div><div class='add'>+	for (idx = ARRAY_SIZE(fbd-&gt;ip_dst); idx--;) {</div><div class='add'>+		struct fbnic_ip_addr *ip_addr = &amp;fbd-&gt;ip_dst[idx];</div><div class='add'>+</div><div class='add'>+		if (!(ip_addr-&gt;state &amp; FBNIC_TCAM_S_UPDATE))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ip_addr-&gt;state == FBNIC_TCAM_S_DELETE) {</div><div class='add'>+			fbnic_clear_ip_dst_entry(fbd, idx);</div><div class='add'>+			memset(ip_addr, 0, sizeof(*ip_addr));</div><div class='add'>+</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fbnic_write_ip_dst_entry(fbd, idx, ip_addr);</div><div class='add'>+</div><div class='add'>+		ip_addr-&gt;state = FBNIC_TCAM_S_VALID;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (idx = ARRAY_SIZE(fbd-&gt;ipo_src); idx--;) {</div><div class='add'>+		struct fbnic_ip_addr *ip_addr = &amp;fbd-&gt;ipo_src[idx];</div><div class='add'>+</div><div class='add'>+		if (!(ip_addr-&gt;state &amp; FBNIC_TCAM_S_UPDATE))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ip_addr-&gt;state == FBNIC_TCAM_S_DELETE) {</div><div class='add'>+			fbnic_clear_ip_outer_src_entry(fbd, idx);</div><div class='add'>+			memset(ip_addr, 0, sizeof(*ip_addr));</div><div class='add'>+</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fbnic_write_ip_outer_src_entry(fbd, idx, ip_addr);</div><div class='add'>+</div><div class='add'>+		ip_addr-&gt;state = FBNIC_TCAM_S_VALID;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (idx = ARRAY_SIZE(fbd-&gt;ipo_dst); idx--;) {</div><div class='add'>+		struct fbnic_ip_addr *ip_addr = &amp;fbd-&gt;ipo_dst[idx];</div><div class='add'>+</div><div class='add'>+		if (!(ip_addr-&gt;state &amp; FBNIC_TCAM_S_UPDATE))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ip_addr-&gt;state == FBNIC_TCAM_S_DELETE) {</div><div class='add'>+			fbnic_clear_ip_outer_dst_entry(fbd, idx);</div><div class='add'>+			memset(ip_addr, 0, sizeof(*ip_addr));</div><div class='add'>+</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fbnic_write_ip_outer_dst_entry(fbd, idx, ip_addr);</div><div class='add'>+</div><div class='add'>+		ip_addr-&gt;state = FBNIC_TCAM_S_VALID;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clear_valid_act_tcam(struct fbnic_dev *fbd)</div><div class='ctx'> {</div><div class='del'>-	u32 dest = FIELD_PREP(FBNIC_RPC_ACT_TBL0_DEST_MASK,</div><div class='del'>-			      FBNIC_RPC_ACT_TBL0_DEST_BMC);</div><div class='ctx'> 	int i = FBNIC_RPC_TCAM_ACT_NUM_ENTRIES - 1;</div><div class='ctx'> 	struct fbnic_act_tcam *act_tcam;</div><div class='ctx'> </div><div class='add'>+	/* Work from the bottom up deleting all other rules from hardware */</div><div class='add'>+	do {</div><div class='add'>+		act_tcam = &amp;fbd-&gt;act_tcam[i];</div><div class='add'>+</div><div class='add'>+		if (act_tcam-&gt;state != FBNIC_TCAM_S_VALID)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		fbnic_clear_act_tcam(fbd, i);</div><div class='add'>+		act_tcam-&gt;state = FBNIC_TCAM_S_UPDATE;</div><div class='add'>+	} while (i--);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_clear_rules(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='ctx'> 	/* Clear MAC rules */</div><div class='ctx'> 	fbnic_clear_macda(fbd);</div><div class='ctx'> </div><div class='hunk'>@@ -608,6 +1172,11 @@ void fbnic_clear_rules(struct fbnic_dev *fbd)</div><div class='ctx'> 	 * the interface back up.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (fbnic_bmc_present(fbd)) {</div><div class='add'>+		u32 dest = FIELD_PREP(FBNIC_RPC_ACT_TBL0_DEST_MASK,</div><div class='add'>+				      FBNIC_RPC_ACT_TBL0_DEST_BMC);</div><div class='add'>+		int i = FBNIC_RPC_TCAM_ACT_NUM_ENTRIES - 1;</div><div class='add'>+		struct fbnic_act_tcam *act_tcam;</div><div class='add'>+</div><div class='ctx'> 		act_tcam = &amp;fbd-&gt;act_tcam[i];</div><div class='ctx'> </div><div class='ctx'> 		if (act_tcam-&gt;state == FBNIC_TCAM_S_VALID &amp;&amp;</div><div class='hunk'>@@ -616,21 +1185,10 @@ void fbnic_clear_rules(struct fbnic_dev *fbd)</div><div class='ctx'> 			wr32(fbd, FBNIC_RPC_ACT_TBL1(i), 0);</div><div class='ctx'> </div><div class='ctx'> 			act_tcam-&gt;state = FBNIC_TCAM_S_UPDATE;</div><div class='del'>-</div><div class='del'>-			i--;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Work from the bottom up deleting all other rules from hardware */</div><div class='del'>-	do {</div><div class='del'>-		act_tcam = &amp;fbd-&gt;act_tcam[i];</div><div class='del'>-</div><div class='del'>-		if (act_tcam-&gt;state != FBNIC_TCAM_S_VALID)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		fbnic_clear_act_tcam(fbd, i);</div><div class='del'>-		act_tcam-&gt;state = FBNIC_TCAM_S_UPDATE;</div><div class='del'>-	} while (i--);</div><div class='add'>+	fbnic_clear_valid_act_tcam(fbd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_delete_act_tcam(struct fbnic_dev *fbd, unsigned int idx)</div><div class='hunk'>@@ -680,3 +1238,9 @@ void fbnic_write_rules(struct fbnic_dev *fbd)</div><div class='ctx'> 			fbnic_update_act_tcam(fbd, i);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void fbnic_rpc_reset_valid_entries(struct fbnic_dev *fbd)</div><div class='add'>+{</div><div class='add'>+	fbnic_clear_valid_act_tcam(fbd);</div><div class='add'>+	fbnic_clear_valid_macda(fbd);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_rpc.h b/drivers/net/ethernet/meta/fbnic/fbnic_rpc.h<br/>index d62935f722a2..3d4925b2ac75 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_rpc.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_rpc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_rpc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_rpc.h</a></div><div class='hunk'>@@ -7,6 +7,8 @@</div><div class='ctx'> #include &lt;uapi/linux/in6.h&gt;</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='ctx'> </div><div class='add'>+struct in_addr;</div><div class='add'>+</div><div class='ctx'> /*  The TCAM state definitions follow an expected ordering.</div><div class='ctx'>  *  They start out disabled, then move through the following states:</div><div class='ctx'>  *  Disabled  0	-&gt; Add	      2</div><div class='hunk'>@@ -32,9 +34,18 @@ enum {</div><div class='ctx'> #define FBNIC_RPC_TCAM_MACDA_WORD_LEN		3</div><div class='ctx'> #define FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES	32</div><div class='ctx'> </div><div class='add'>+/* 8 IPSRC and IPDST TCAM Entries each</div><div class='add'>+ * 8 registers, Validate each</div><div class='add'>+ */</div><div class='add'>+#define FBNIC_RPC_TCAM_IP_ADDR_WORD_LEN		8</div><div class='add'>+#define FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES	8</div><div class='add'>+</div><div class='ctx'> #define FBNIC_RPC_TCAM_ACT_WORD_LEN		11</div><div class='ctx'> #define FBNIC_RPC_TCAM_ACT_NUM_ENTRIES		64</div><div class='ctx'> </div><div class='add'>+#define FBNIC_TCE_TCAM_WORD_LEN			3</div><div class='add'>+#define FBNIC_TCE_TCAM_NUM_ENTRIES		8</div><div class='add'>+</div><div class='ctx'> struct fbnic_mac_addr {</div><div class='ctx'> 	union {</div><div class='ctx'> 		unsigned char addr8[ETH_ALEN];</div><div class='hunk'>@@ -44,6 +55,13 @@ struct fbnic_mac_addr {</div><div class='ctx'> 	DECLARE_BITMAP(act_tcam, FBNIC_RPC_TCAM_ACT_NUM_ENTRIES);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct fbnic_ip_addr {</div><div class='add'>+	struct in6_addr mask, value;</div><div class='add'>+	unsigned char version;</div><div class='add'>+	unsigned char state;</div><div class='add'>+	DECLARE_BITMAP(act_tcam, FBNIC_RPC_TCAM_ACT_NUM_ENTRIES);</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct fbnic_act_tcam {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		u16 tcam[FBNIC_RPC_TCAM_ACT_WORD_LEN];</div><div class='hunk'>@@ -78,6 +96,11 @@ enum {</div><div class='ctx'> #define FBNIC_RPC_ACT_TBL_BMC_OFFSET		0</div><div class='ctx'> #define FBNIC_RPC_ACT_TBL_BMC_ALL_MULTI_OFFSET	1</div><div class='ctx'> </div><div class='add'>+/* This should leave us with 48 total entries in the TCAM that can be used</div><div class='add'>+ * for NFC after also deducting the 14 needed for RSS table programming.</div><div class='add'>+ */</div><div class='add'>+#define FBNIC_RPC_ACT_TBL_NFC_OFFSET		2</div><div class='add'>+</div><div class='ctx'> /* We reserve the last 14 entries for RSS rules on the host. The BMC</div><div class='ctx'>  * unicast rule will need to be populated above these and is expected to</div><div class='ctx'>  * use MACDA TCAM entry 23 to store the BMC MAC address.</div><div class='hunk'>@@ -85,6 +108,9 @@ enum {</div><div class='ctx'> #define FBNIC_RPC_ACT_TBL_RSS_OFFSET \</div><div class='ctx'> 	(FBNIC_RPC_ACT_TBL_NUM_ENTRIES - FBNIC_RSS_EN_NUM_ENTRIES)</div><div class='ctx'> </div><div class='add'>+#define FBNIC_RPC_ACT_TBL_NFC_ENTRIES \</div><div class='add'>+	(FBNIC_RPC_ACT_TBL_RSS_OFFSET - FBNIC_RPC_ACT_TBL_NFC_OFFSET)</div><div class='add'>+</div><div class='ctx'> /* Flags used to identify the owner for this MAC filter. Note that any</div><div class='ctx'>  * flags set for Broadcast thru Promisc indicate that the rule belongs</div><div class='ctx'>  * to the RSS filters for the host.</div><div class='hunk'>@@ -158,6 +184,7 @@ struct fbnic_net;</div><div class='ctx'> </div><div class='ctx'> void fbnic_bmc_rpc_init(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_bmc_rpc_all_multi_config(struct fbnic_dev *fbd, bool enable_host);</div><div class='add'>+void fbnic_bmc_rpc_check(struct fbnic_dev *fbd);</div><div class='ctx'> </div><div class='ctx'> void fbnic_reset_indir_tbl(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_rss_key_fill(u32 *buffer);</div><div class='hunk'>@@ -165,6 +192,7 @@ void fbnic_rss_init_en_mask(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_rss_disable_hw(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_rss_reinit_hw(struct fbnic_dev *fbd, struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_rss_reinit(struct fbnic_dev *fbd, struct fbnic_net *fbn);</div><div class='add'>+u16 fbnic_flow_hash_2_rss_en_mask(struct fbnic_net *fbn, int flow_type);</div><div class='ctx'> </div><div class='ctx'> int __fbnic_xc_unsync(struct fbnic_mac_addr *mac_addr, unsigned int tcam_idx);</div><div class='ctx'> struct fbnic_mac_addr *__fbnic_uc_sync(struct fbnic_dev *fbd,</div><div class='hunk'>@@ -174,6 +202,20 @@ struct fbnic_mac_addr *__fbnic_mc_sync(struct fbnic_dev *fbd,</div><div class='ctx'> void fbnic_sift_macda(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_write_macda(struct fbnic_dev *fbd);</div><div class='ctx'> </div><div class='add'>+void fbnic_promisc_sync(struct fbnic_dev *fbd,</div><div class='add'>+			bool uc_promisc, bool mc_promisc);</div><div class='add'>+</div><div class='add'>+struct fbnic_ip_addr *__fbnic_ip4_sync(struct fbnic_dev *fbd,</div><div class='add'>+				       struct fbnic_ip_addr *ip_addr,</div><div class='add'>+				       const struct in_addr *addr,</div><div class='add'>+				       const struct in_addr *mask);</div><div class='add'>+struct fbnic_ip_addr *__fbnic_ip6_sync(struct fbnic_dev *fbd,</div><div class='add'>+				       struct fbnic_ip_addr *ip_addr,</div><div class='add'>+				       const struct in6_addr *addr,</div><div class='add'>+				       const struct in6_addr *mask);</div><div class='add'>+int __fbnic_ip_unsync(struct fbnic_ip_addr *ip_addr, unsigned int tcam_idx);</div><div class='add'>+void fbnic_write_ip_addr(struct fbnic_dev *fbd);</div><div class='add'>+</div><div class='ctx'> static inline int __fbnic_uc_unsync(struct fbnic_mac_addr *mac_addr)</div><div class='ctx'> {</div><div class='ctx'> 	return __fbnic_xc_unsync(mac_addr, FBNIC_MAC_ADDR_T_UNICAST);</div><div class='hunk'>@@ -186,4 +228,5 @@ static inline int __fbnic_mc_unsync(struct fbnic_mac_addr *mac_addr)</div><div class='ctx'> </div><div class='ctx'> void fbnic_clear_rules(struct fbnic_dev *fbd);</div><div class='ctx'> void fbnic_write_rules(struct fbnic_dev *fbd);</div><div class='add'>+void fbnic_write_tce_tcam(struct fbnic_dev *fbd);</div><div class='ctx'> #endif /* _FBNIC_RPC_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_time.c b/drivers/net/ethernet/meta/fbnic/fbnic_time.c<br/>index 39d99677b71e..db7748189f45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_time.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_time.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_time.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_time.c</a></div><div class='hunk'>@@ -253,7 +253,7 @@ static void fbnic_ptp_reset(struct fbnic_dev *fbd)</div><div class='ctx'> </div><div class='ctx'> void fbnic_time_init(struct fbnic_net *fbn)</div><div class='ctx'> {</div><div class='del'>-	/* This is not really a statistic, but the lockng primitive fits</div><div class='add'>+	/* This is not really a statistic, but the locking primitive fits</div><div class='ctx'> 	 * our usecase perfectly, we need an atomic 8 bytes READ_ONCE() /</div><div class='ctx'> 	 * WRITE_ONCE() behavior.</div><div class='ctx'> 	 */</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_tlv.c b/drivers/net/ethernet/meta/fbnic/fbnic_tlv.c<br/>index 2a174ab062a3..517ed8b2f1cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_tlv.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_tlv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_tlv.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_tlv.c</a></div><div class='hunk'>@@ -196,13 +196,17 @@ int fbnic_tlv_attr_put_string(struct fbnic_tlv_msg *msg, u16 attr_id,</div><div class='ctx'> /**</div><div class='ctx'>  * fbnic_tlv_attr_get_unsigned - Retrieve unsigned value from result</div><div class='ctx'>  * @attr: Attribute to retrieve data from</div><div class='add'>+ * @def: The default value if attr is NULL</div><div class='ctx'>  *</div><div class='ctx'>  * Return: unsigned 64b value containing integer value</div><div class='ctx'>  **/</div><div class='del'>-u64 fbnic_tlv_attr_get_unsigned(struct fbnic_tlv_msg *attr)</div><div class='add'>+u64 fbnic_tlv_attr_get_unsigned(struct fbnic_tlv_msg *attr, u64 def)</div><div class='ctx'> {</div><div class='ctx'> 	__le64 le64_value = 0;</div><div class='ctx'> </div><div class='add'>+	if (!attr)</div><div class='add'>+		return def;</div><div class='add'>+</div><div class='ctx'> 	memcpy(&amp;le64_value, &amp;attr-&gt;value[0],</div><div class='ctx'> 	       le16_to_cpu(attr-&gt;hdr.len) - sizeof(*attr));</div><div class='ctx'> </div><div class='hunk'>@@ -212,15 +216,21 @@ u64 fbnic_tlv_attr_get_unsigned(struct fbnic_tlv_msg *attr)</div><div class='ctx'> /**</div><div class='ctx'>  * fbnic_tlv_attr_get_signed - Retrieve signed value from result</div><div class='ctx'>  * @attr: Attribute to retrieve data from</div><div class='add'>+ * @def: The default value if attr is NULL</div><div class='ctx'>  *</div><div class='ctx'>  * Return: signed 64b value containing integer value</div><div class='ctx'>  **/</div><div class='del'>-s64 fbnic_tlv_attr_get_signed(struct fbnic_tlv_msg *attr)</div><div class='add'>+s64 fbnic_tlv_attr_get_signed(struct fbnic_tlv_msg *attr, s64 def)</div><div class='ctx'> {</div><div class='del'>-	int shift = (8 + sizeof(*attr) - le16_to_cpu(attr-&gt;hdr.len)) * 8;</div><div class='ctx'> 	__le64 le64_value = 0;</div><div class='add'>+	int shift;</div><div class='ctx'> 	s64 value;</div><div class='ctx'> </div><div class='add'>+	if (!attr)</div><div class='add'>+		return def;</div><div class='add'>+</div><div class='add'>+	shift = (8 + sizeof(*attr) - le16_to_cpu(attr-&gt;hdr.len)) * 8;</div><div class='add'>+</div><div class='ctx'> 	/* Copy the value and adjust for byte ordering */</div><div class='ctx'> 	memcpy(&amp;le64_value, &amp;attr-&gt;value[0],</div><div class='ctx'> 	       le16_to_cpu(attr-&gt;hdr.len) - sizeof(*attr));</div><div class='hunk'>@@ -233,19 +243,40 @@ s64 fbnic_tlv_attr_get_signed(struct fbnic_tlv_msg *attr)</div><div class='ctx'> /**</div><div class='ctx'>  * fbnic_tlv_attr_get_string - Retrieve string value from result</div><div class='ctx'>  * @attr: Attribute to retrieve data from</div><div class='del'>- * @str: Pointer to an allocated string to store the data</div><div class='del'>- * @max_size: The maximum size which can be in str</div><div class='add'>+ * @dst: Pointer to an allocated string to store the data</div><div class='add'>+ * @dstsize: The maximum size which can be in dst</div><div class='ctx'>  *</div><div class='del'>- * Return: the size of the string read from firmware</div><div class='add'>+ * Return: the size of the string read from firmware or negative error.</div><div class='ctx'>  **/</div><div class='del'>-size_t fbnic_tlv_attr_get_string(struct fbnic_tlv_msg *attr, char *str,</div><div class='del'>-				 size_t max_size)</div><div class='add'>+ssize_t fbnic_tlv_attr_get_string(struct fbnic_tlv_msg *attr, char *dst,</div><div class='add'>+				  size_t dstsize)</div><div class='ctx'> {</div><div class='del'>-	max_size = min_t(size_t, max_size,</div><div class='del'>-			 (le16_to_cpu(attr-&gt;hdr.len) * 4) - sizeof(*attr));</div><div class='del'>-	memcpy(str, &amp;attr-&gt;value, max_size);</div><div class='add'>+	size_t srclen, len;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	if (!attr)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (dstsize == 0)</div><div class='add'>+		return -E2BIG;</div><div class='add'>+</div><div class='add'>+	srclen = le16_to_cpu(attr-&gt;hdr.len) - sizeof(*attr);</div><div class='add'>+	if (srclen &gt; 0 &amp;&amp; ((char *)attr-&gt;value)[srclen - 1] == '\0')</div><div class='add'>+		srclen--;</div><div class='add'>+</div><div class='add'>+	if (srclen &gt;= dstsize) {</div><div class='add'>+		len = dstsize - 1;</div><div class='add'>+		ret = -E2BIG;</div><div class='add'>+	} else {</div><div class='add'>+		len = srclen;</div><div class='add'>+		ret = len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(dst, &amp;attr-&gt;value, len);</div><div class='add'>+	/* Zero pad end of dst. */</div><div class='add'>+	memset(dst + len, 0, dstsize - len);</div><div class='ctx'> </div><div class='del'>-	return max_size;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_tlv.h b/drivers/net/ethernet/meta/fbnic/fbnic_tlv.h<br/>index 67300ab44353..3508b46ebdd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_tlv.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_tlv.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_tlv.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_tlv.h</a></div><div class='hunk'>@@ -80,7 +80,7 @@ struct fbnic_tlv_index {</div><div class='ctx'> 	enum fbnic_tlv_type	type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define TLV_MAX_DATA			(PAGE_SIZE - 512)</div><div class='add'>+#define TLV_MAX_DATA			((PAGE_SIZE - 512) &amp; 0xFFFF)</div><div class='ctx'> #define FBNIC_TLV_ATTR_ID_UNKNOWN	USHRT_MAX</div><div class='ctx'> #define FBNIC_TLV_ATTR_STRING(id, len)	{ id, len, FBNIC_TLV_STRING }</div><div class='ctx'> #define FBNIC_TLV_ATTR_FLAG(id)		{ id, 0, FBNIC_TLV_FLAG }</div><div class='hunk'>@@ -114,34 +114,10 @@ static inline bool fbnic_tlv_attr_get_bool(struct fbnic_tlv_msg *attr)</div><div class='ctx'> 	return !!attr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u64 fbnic_tlv_attr_get_unsigned(struct fbnic_tlv_msg *attr);</div><div class='del'>-s64 fbnic_tlv_attr_get_signed(struct fbnic_tlv_msg *attr);</div><div class='del'>-size_t fbnic_tlv_attr_get_string(struct fbnic_tlv_msg *attr, char *str,</div><div class='del'>-				 size_t max_size);</div><div class='del'>-</div><div class='del'>-#define get_unsigned_result(id, location) \</div><div class='del'>-do { \</div><div class='del'>-	struct fbnic_tlv_msg *result = results[id]; \</div><div class='del'>-	if (result) \</div><div class='del'>-		location = fbnic_tlv_attr_get_unsigned(result); \</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define get_signed_result(id, location) \</div><div class='del'>-do { \</div><div class='del'>-	struct fbnic_tlv_msg *result = results[id]; \</div><div class='del'>-	if (result) \</div><div class='del'>-		location = fbnic_tlv_attr_get_signed(result); \</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define get_string_result(id, size, str, max_size) \</div><div class='del'>-do { \</div><div class='del'>-	struct fbnic_tlv_msg *result = results[id]; \</div><div class='del'>-	if (result) \</div><div class='del'>-		size = fbnic_tlv_attr_get_string(result, str, max_size); \</div><div class='del'>-} while (0)</div><div class='del'>-</div><div class='del'>-#define get_bool(id) (!!(results[id]))</div><div class='del'>-</div><div class='add'>+u64 fbnic_tlv_attr_get_unsigned(struct fbnic_tlv_msg *attr, u64 def);</div><div class='add'>+s64 fbnic_tlv_attr_get_signed(struct fbnic_tlv_msg *attr, s64 def);</div><div class='add'>+ssize_t fbnic_tlv_attr_get_string(struct fbnic_tlv_msg *attr, char *dst,</div><div class='add'>+				  size_t dstsize);</div><div class='ctx'> struct fbnic_tlv_msg *fbnic_tlv_msg_alloc(u16 msg_id);</div><div class='ctx'> int fbnic_tlv_attr_put_flag(struct fbnic_tlv_msg *msg, const u16 attr_id);</div><div class='ctx'> int fbnic_tlv_attr_put_value(struct fbnic_tlv_msg *msg, const u16 attr_id,</div><div class='hunk'>@@ -170,6 +146,13 @@ int fbnic_tlv_msg_parse(void *opaque, struct fbnic_tlv_msg *msg,</div><div class='ctx'> 			const struct fbnic_tlv_parser *parser);</div><div class='ctx'> int fbnic_tlv_parser_error(void *opaque, struct fbnic_tlv_msg **results);</div><div class='ctx'> </div><div class='add'>+#define fta_get_uint(_results, _id) \</div><div class='add'>+	fbnic_tlv_attr_get_unsigned(_results[_id], 0)</div><div class='add'>+#define fta_get_sint(_results, _id) \</div><div class='add'>+	fbnic_tlv_attr_get_signed(_results[_id], 0)</div><div class='add'>+#define fta_get_str(_results, _id, _dst, _dstsize) \</div><div class='add'>+	fbnic_tlv_attr_get_string(_results[_id], _dst, _dstsize)</div><div class='add'>+</div><div class='ctx'> #define FBNIC_TLV_MSG_ERROR \</div><div class='ctx'> 	FBNIC_TLV_PARSER(UNKNOWN, NULL, fbnic_tlv_parser_error)</div><div class='ctx'> #endif /* _FBNIC_TLV_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_txrx.c b/drivers/net/ethernet/meta/fbnic/fbnic_txrx.c<br/>index b5050fabe8fe..13d508ce637f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_txrx.c</a></div><div class='hunk'>@@ -2,10 +2,14 @@</div><div class='ctx'> /* Copyright (c) Meta Platforms, Inc. and affiliates. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bpf.h&gt;</div><div class='add'>+#include &lt;linux/bpf_trace.h&gt;</div><div class='ctx'> #include &lt;linux/iopoll.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;net/netdev_queues.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='add'>+#include &lt;net/tcp.h&gt;</div><div class='add'>+#include &lt;net/xdp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "fbnic.h"</div><div class='ctx'> #include "fbnic_csr.h"</div><div class='hunk'>@@ -13,11 +17,19 @@</div><div class='ctx'> #include "fbnic_txrx.h"</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='add'>+	FBNIC_XDP_PASS = 0,</div><div class='add'>+	FBNIC_XDP_CONSUME,</div><div class='add'>+	FBNIC_XDP_TX,</div><div class='add'>+	FBNIC_XDP_LEN_ERR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='ctx'> 	FBNIC_XMIT_CB_TS	= 0x01,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct fbnic_xmit_cb {</div><div class='ctx'> 	u32 bytecount;</div><div class='add'>+	u16 gso_segs;</div><div class='ctx'> 	u8 desc_count;</div><div class='ctx'> 	u8 flags;</div><div class='ctx'> 	int hw_head;</div><div class='hunk'>@@ -25,6 +37,8 @@ struct fbnic_xmit_cb {</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_XMIT_CB(__skb) ((struct fbnic_xmit_cb *)((__skb)-&gt;cb))</div><div class='ctx'> </div><div class='add'>+#define FBNIC_XMIT_NOUNMAP	((void *)1)</div><div class='add'>+</div><div class='ctx'> static u32 __iomem *fbnic_ring_csr_base(const struct fbnic_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long csr_base = (unsigned long)ring-&gt;doorbell;</div><div class='hunk'>@@ -113,6 +127,11 @@ static int fbnic_maybe_stop_tx(const struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	res = netif_txq_maybe_stop(txq, fbnic_desc_unused(ring), size,</div><div class='ctx'> 				   FBNIC_TX_DESC_WAKEUP);</div><div class='add'>+	if (!res) {</div><div class='add'>+		u64_stats_update_begin(&amp;ring-&gt;stats.syncp);</div><div class='add'>+		ring-&gt;stats.twq.stop++;</div><div class='add'>+		u64_stats_update_end(&amp;ring-&gt;stats.syncp);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return !res;</div><div class='ctx'> }</div><div class='hunk'>@@ -174,8 +193,72 @@ static bool fbnic_tx_tstamp(struct sk_buff *skb)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool</div><div class='add'>+fbnic_tx_lso(struct fbnic_ring *ring, struct sk_buff *skb,</div><div class='add'>+	     struct skb_shared_info *shinfo, __le64 *meta,</div><div class='add'>+	     unsigned int *l2len, unsigned int *i3len)</div><div class='add'>+{</div><div class='add'>+	unsigned int l3_type, l4_type, l4len, hdrlen;</div><div class='add'>+	unsigned char *l4hdr;</div><div class='add'>+	__be16 payload_len;</div><div class='add'>+</div><div class='add'>+	if (unlikely(skb_cow_head(skb, 0)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (shinfo-&gt;gso_type &amp; SKB_GSO_PARTIAL) {</div><div class='add'>+		l3_type = FBNIC_TWD_L3_TYPE_OTHER;</div><div class='add'>+	} else if (!skb-&gt;encapsulation) {</div><div class='add'>+		if (ip_hdr(skb)-&gt;version == 4)</div><div class='add'>+			l3_type = FBNIC_TWD_L3_TYPE_IPV4;</div><div class='add'>+		else</div><div class='add'>+			l3_type = FBNIC_TWD_L3_TYPE_IPV6;</div><div class='add'>+	} else {</div><div class='add'>+		unsigned int o3len;</div><div class='add'>+</div><div class='add'>+		o3len = skb_inner_network_header(skb) - skb_network_header(skb);</div><div class='add'>+		*i3len -= o3len;</div><div class='add'>+		*meta |= cpu_to_le64(FIELD_PREP(FBNIC_TWD_L3_OHLEN_MASK,</div><div class='add'>+						o3len / 2));</div><div class='add'>+		l3_type = FBNIC_TWD_L3_TYPE_V6V6;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	l4hdr = skb_checksum_start(skb);</div><div class='add'>+	payload_len = cpu_to_be16(skb-&gt;len - (l4hdr - skb-&gt;data));</div><div class='add'>+</div><div class='add'>+	if (shinfo-&gt;gso_type &amp; (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {</div><div class='add'>+		struct tcphdr *tcph = (struct tcphdr *)l4hdr;</div><div class='add'>+</div><div class='add'>+		l4_type = FBNIC_TWD_L4_TYPE_TCP;</div><div class='add'>+		l4len = __tcp_hdrlen((struct tcphdr *)l4hdr);</div><div class='add'>+		csum_replace_by_diff(&amp;tcph-&gt;check, (__force __wsum)payload_len);</div><div class='add'>+	} else {</div><div class='add'>+		struct udphdr *udph = (struct udphdr *)l4hdr;</div><div class='add'>+</div><div class='add'>+		l4_type = FBNIC_TWD_L4_TYPE_UDP;</div><div class='add'>+		l4len = sizeof(struct udphdr);</div><div class='add'>+		csum_replace_by_diff(&amp;udph-&gt;check, (__force __wsum)payload_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hdrlen = (l4hdr - skb-&gt;data) + l4len;</div><div class='add'>+	*meta |= cpu_to_le64(FIELD_PREP(FBNIC_TWD_L3_TYPE_MASK, l3_type) |</div><div class='add'>+			     FIELD_PREP(FBNIC_TWD_L4_TYPE_MASK, l4_type) |</div><div class='add'>+			     FIELD_PREP(FBNIC_TWD_L4_HLEN_MASK, l4len / 4) |</div><div class='add'>+			     FIELD_PREP(FBNIC_TWD_MSS_MASK, shinfo-&gt;gso_size) |</div><div class='add'>+			     FBNIC_TWD_FLAG_REQ_LSO);</div><div class='add'>+</div><div class='add'>+	FBNIC_XMIT_CB(skb)-&gt;bytecount += (shinfo-&gt;gso_segs - 1) * hdrlen;</div><div class='add'>+	FBNIC_XMIT_CB(skb)-&gt;gso_segs = shinfo-&gt;gso_segs;</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;ring-&gt;stats.syncp);</div><div class='add'>+	ring-&gt;stats.twq.lso += shinfo-&gt;gso_segs;</div><div class='add'>+	u64_stats_update_end(&amp;ring-&gt;stats.syncp);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='ctx'> fbnic_tx_offloads(struct fbnic_ring *ring, struct sk_buff *skb, __le64 *meta)</div><div class='ctx'> {</div><div class='add'>+	struct skb_shared_info *shinfo = skb_shinfo(skb);</div><div class='ctx'> 	unsigned int l2len, i3len;</div><div class='ctx'> </div><div class='ctx'> 	if (fbnic_tx_tstamp(skb))</div><div class='hunk'>@@ -190,7 +273,15 @@ fbnic_tx_offloads(struct fbnic_ring *ring, struct sk_buff *skb, __le64 *meta)</div><div class='ctx'> 	*meta |= cpu_to_le64(FIELD_PREP(FBNIC_TWD_CSUM_OFFSET_MASK,</div><div class='ctx'> 					skb-&gt;csum_offset / 2));</div><div class='ctx'> </div><div class='del'>-	*meta |= cpu_to_le64(FBNIC_TWD_FLAG_REQ_CSO);</div><div class='add'>+	if (shinfo-&gt;gso_size) {</div><div class='add'>+		if (fbnic_tx_lso(ring, skb, shinfo, meta, &amp;l2len, &amp;i3len))</div><div class='add'>+			return true;</div><div class='add'>+	} else {</div><div class='add'>+		*meta |= cpu_to_le64(FBNIC_TWD_FLAG_REQ_CSO);</div><div class='add'>+		u64_stats_update_begin(&amp;ring-&gt;stats.syncp);</div><div class='add'>+		ring-&gt;stats.twq.csum_partial++;</div><div class='add'>+		u64_stats_update_end(&amp;ring-&gt;stats.syncp);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	*meta |= cpu_to_le64(FIELD_PREP(FBNIC_TWD_L2_HLEN_MASK, l2len / 2) |</div><div class='ctx'> 			     FIELD_PREP(FBNIC_TWD_L3_IHLEN_MASK, i3len / 2));</div><div class='hunk'>@@ -198,12 +289,15 @@ fbnic_tx_offloads(struct fbnic_ring *ring, struct sk_buff *skb, __le64 *meta)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-fbnic_rx_csum(u64 rcd, struct sk_buff *skb, struct fbnic_ring *rcq)</div><div class='add'>+fbnic_rx_csum(u64 rcd, struct sk_buff *skb, struct fbnic_ring *rcq,</div><div class='add'>+	      u64 *csum_cmpl, u64 *csum_none)</div><div class='ctx'> {</div><div class='ctx'> 	skb_checksum_none_assert(skb);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(!(skb-&gt;dev-&gt;features &amp; NETIF_F_RXCSUM)))</div><div class='add'>+	if (unlikely(!(skb-&gt;dev-&gt;features &amp; NETIF_F_RXCSUM))) {</div><div class='add'>+		(*csum_none)++;</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (FIELD_GET(FBNIC_RCD_META_L4_CSUM_UNNECESSARY, rcd)) {</div><div class='ctx'> 		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='hunk'>@@ -212,6 +306,7 @@ fbnic_rx_csum(u64 rcd, struct sk_buff *skb, struct fbnic_ring *rcq)</div><div class='ctx'> </div><div class='ctx'> 		skb-&gt;ip_summed = CHECKSUM_COMPLETE;</div><div class='ctx'> 		skb-&gt;csum = (__force __wsum)csum;</div><div class='add'>+		(*csum_cmpl)++;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -222,6 +317,7 @@ fbnic_tx_map(struct fbnic_ring *ring, struct sk_buff *skb, __le64 *meta)</div><div class='ctx'> 	unsigned int tail = ring-&gt;tail, first;</div><div class='ctx'> 	unsigned int size, data_len;</div><div class='ctx'> 	skb_frag_t *frag;</div><div class='add'>+	bool is_net_iov;</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> 	__le64 *twd;</div><div class='ctx'> </div><div class='hunk'>@@ -237,6 +333,7 @@ fbnic_tx_map(struct fbnic_ring *ring, struct sk_buff *skb, __le64 *meta)</div><div class='ctx'> 	if (size &gt; FIELD_MAX(FBNIC_TWD_LEN_MASK))</div><div class='ctx'> 		goto dma_error;</div><div class='ctx'> </div><div class='add'>+	is_net_iov = false;</div><div class='ctx'> 	dma = dma_map_single(dev, skb-&gt;data, size, DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 	for (frag = &amp;skb_shinfo(skb)-&gt;frags[0];; frag++) {</div><div class='hunk'>@@ -249,6 +346,8 @@ fbnic_tx_map(struct fbnic_ring *ring, struct sk_buff *skb, __le64 *meta)</div><div class='ctx'> 				   FIELD_PREP(FBNIC_TWD_LEN_MASK, size) |</div><div class='ctx'> 				   FIELD_PREP(FBNIC_TWD_TYPE_MASK,</div><div class='ctx'> 					      FBNIC_TWD_TYPE_AL));</div><div class='add'>+		if (is_net_iov)</div><div class='add'>+			ring-&gt;tx_buf[tail] = FBNIC_XMIT_NOUNMAP;</div><div class='ctx'> </div><div class='ctx'> 		tail++;</div><div class='ctx'> 		tail &amp;= ring-&gt;size_mask;</div><div class='hunk'>@@ -262,6 +361,7 @@ fbnic_tx_map(struct fbnic_ring *ring, struct sk_buff *skb, __le64 *meta)</div><div class='ctx'> 		if (size &gt; FIELD_MAX(FBNIC_TWD_LEN_MASK))</div><div class='ctx'> 			goto dma_error;</div><div class='ctx'> </div><div class='add'>+		is_net_iov = skb_frag_is_net_iov(frag);</div><div class='ctx'> 		dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -297,6 +397,8 @@ dma_error:</div><div class='ctx'> 		twd = &amp;ring-&gt;desc[tail];</div><div class='ctx'> 		if (tail == first)</div><div class='ctx'> 			fbnic_unmap_single_twd(dev, twd);</div><div class='add'>+		else if (ring-&gt;tx_buf[tail] == FBNIC_XMIT_NOUNMAP)</div><div class='add'>+			ring-&gt;tx_buf[tail] = NULL;</div><div class='ctx'> 		else</div><div class='ctx'> 			fbnic_unmap_page_twd(dev, twd);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -329,7 +431,9 @@ fbnic_xmit_frame_ring(struct sk_buff *skb, struct fbnic_ring *ring)</div><div class='ctx'> </div><div class='ctx'> 	/* Write all members within DWORD to condense this into 2 4B writes */</div><div class='ctx'> 	FBNIC_XMIT_CB(skb)-&gt;bytecount = skb-&gt;len;</div><div class='add'>+	FBNIC_XMIT_CB(skb)-&gt;gso_segs = 1;</div><div class='ctx'> 	FBNIC_XMIT_CB(skb)-&gt;desc_count = 0;</div><div class='add'>+	FBNIC_XMIT_CB(skb)-&gt;flags = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (fbnic_tx_offloads(ring, skb, meta))</div><div class='ctx'> 		goto err_free;</div><div class='hunk'>@@ -356,6 +460,59 @@ netdev_tx_t fbnic_xmit_frame(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	return fbnic_xmit_frame_ring(skb, fbn-&gt;tx[q_map]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static netdev_features_t</div><div class='add'>+fbnic_features_check_encap_gso(struct sk_buff *skb, struct net_device *dev,</div><div class='add'>+			       netdev_features_t features, unsigned int l3len)</div><div class='add'>+{</div><div class='add'>+	netdev_features_t skb_gso_features;</div><div class='add'>+	struct ipv6hdr *ip6_hdr;</div><div class='add'>+	unsigned char l4_hdr;</div><div class='add'>+	unsigned int start;</div><div class='add'>+	__be16 frag_off;</div><div class='add'>+</div><div class='add'>+	/* Require MANGLEID for GSO_PARTIAL of IPv4.</div><div class='add'>+	 * In theory we could support TSO with single, innermost v4 header</div><div class='add'>+	 * by pretending everything before it is L2, but that needs to be</div><div class='add'>+	 * parsed case by case.. so leaving it for when the need arises.</div><div class='add'>+	 */</div><div class='add'>+	if (!(features &amp; NETIF_F_TSO_MANGLEID))</div><div class='add'>+		features &amp;= ~NETIF_F_TSO;</div><div class='add'>+</div><div class='add'>+	skb_gso_features = skb_shinfo(skb)-&gt;gso_type;</div><div class='add'>+	skb_gso_features &lt;&lt;= NETIF_F_GSO_SHIFT;</div><div class='add'>+</div><div class='add'>+	/* We'd only clear the native GSO features, so don't bother validating</div><div class='add'>+	 * if the match can only be on those supported thru GSO_PARTIAL.</div><div class='add'>+	 */</div><div class='add'>+	if (!(skb_gso_features &amp; FBNIC_TUN_GSO_FEATURES))</div><div class='add'>+		return features;</div><div class='add'>+</div><div class='add'>+	/* We can only do IPv6-in-IPv6, not v4-in-v6. It'd be nice</div><div class='add'>+	 * to fall back to partial for this, or any failure below.</div><div class='add'>+	 * This is just an optimization, UDPv4 will be caught later on.</div><div class='add'>+	 */</div><div class='add'>+	if (skb_gso_features &amp; NETIF_F_TSO)</div><div class='add'>+		return features &amp; ~FBNIC_TUN_GSO_FEATURES;</div><div class='add'>+</div><div class='add'>+	/* Inner headers multiple of 2 */</div><div class='add'>+	if ((skb_inner_network_header(skb) - skb_network_header(skb)) % 2)</div><div class='add'>+		return features &amp; ~FBNIC_TUN_GSO_FEATURES;</div><div class='add'>+</div><div class='add'>+	/* Encapsulated GSO packet, make 100% sure it's IPv6-in-IPv6. */</div><div class='add'>+	ip6_hdr = ipv6_hdr(skb);</div><div class='add'>+	if (ip6_hdr-&gt;version != 6)</div><div class='add'>+		return features &amp; ~FBNIC_TUN_GSO_FEATURES;</div><div class='add'>+</div><div class='add'>+	l4_hdr = ip6_hdr-&gt;nexthdr;</div><div class='add'>+	start = (unsigned char *)ip6_hdr - skb-&gt;data + sizeof(struct ipv6hdr);</div><div class='add'>+	start = ipv6_skip_exthdr(skb, start, &amp;l4_hdr, &amp;frag_off);</div><div class='add'>+	if (frag_off || l4_hdr != IPPROTO_IPV6 ||</div><div class='add'>+	    skb-&gt;data + start != skb_inner_network_header(skb))</div><div class='add'>+		return features &amp; ~FBNIC_TUN_GSO_FEATURES;</div><div class='add'>+</div><div class='add'>+	return features;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> netdev_features_t</div><div class='ctx'> fbnic_features_check(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 		     netdev_features_t features)</div><div class='hunk'>@@ -376,9 +533,12 @@ fbnic_features_check(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	    !FIELD_FIT(FBNIC_TWD_L2_HLEN_MASK, l2len / 2) ||</div><div class='ctx'> 	    !FIELD_FIT(FBNIC_TWD_L3_IHLEN_MASK, l3len / 2) ||</div><div class='ctx'> 	    !FIELD_FIT(FBNIC_TWD_CSUM_OFFSET_MASK, skb-&gt;csum_offset / 2))</div><div class='del'>-		return features &amp; ~NETIF_F_CSUM_MASK;</div><div class='add'>+		return features &amp; ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);</div><div class='ctx'> </div><div class='del'>-	return features;</div><div class='add'>+	if (likely(!skb-&gt;encapsulation) || !skb_is_gso(skb))</div><div class='add'>+		return features;</div><div class='add'>+</div><div class='add'>+	return fbnic_features_check_encap_gso(skb, dev, features, l3len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_clean_twq0(struct fbnic_napi_vector *nv, int napi_budget,</div><div class='hunk'>@@ -423,13 +583,17 @@ static void fbnic_clean_twq0(struct fbnic_napi_vector *nv, int napi_budget,</div><div class='ctx'> 		desc_cnt--;</div><div class='ctx'> </div><div class='ctx'> 		while (desc_cnt--) {</div><div class='del'>-			fbnic_unmap_page_twd(nv-&gt;dev, &amp;ring-&gt;desc[head]);</div><div class='add'>+			if (ring-&gt;tx_buf[head] != FBNIC_XMIT_NOUNMAP)</div><div class='add'>+				fbnic_unmap_page_twd(nv-&gt;dev,</div><div class='add'>+						     &amp;ring-&gt;desc[head]);</div><div class='add'>+			else</div><div class='add'>+				ring-&gt;tx_buf[head] = NULL;</div><div class='ctx'> 			head++;</div><div class='ctx'> 			head &amp;= ring-&gt;size_mask;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		total_bytes += FBNIC_XMIT_CB(skb)-&gt;bytecount;</div><div class='del'>-		total_packets += 1;</div><div class='add'>+		total_packets += FBNIC_XMIT_CB(skb)-&gt;gso_segs;</div><div class='ctx'> </div><div class='ctx'> 		napi_consume_skb(skb, napi_budget);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -444,7 +608,7 @@ static void fbnic_clean_twq0(struct fbnic_napi_vector *nv, int napi_budget,</div><div class='ctx'> 	if (unlikely(discard)) {</div><div class='ctx'> 		u64_stats_update_begin(&amp;ring-&gt;stats.syncp);</div><div class='ctx'> 		ring-&gt;stats.dropped += total_packets;</div><div class='del'>-		ring-&gt;stats.ts_lost += ts_lost;</div><div class='add'>+		ring-&gt;stats.twq.ts_lost += ts_lost;</div><div class='ctx'> 		u64_stats_update_end(&amp;ring-&gt;stats.syncp);</div><div class='ctx'> </div><div class='ctx'> 		netdev_tx_completed_queue(txq, total_packets, total_bytes);</div><div class='hunk'>@@ -456,9 +620,62 @@ static void fbnic_clean_twq0(struct fbnic_napi_vector *nv, int napi_budget,</div><div class='ctx'> 	ring-&gt;stats.packets += total_packets;</div><div class='ctx'> 	u64_stats_update_end(&amp;ring-&gt;stats.syncp);</div><div class='ctx'> </div><div class='del'>-	netif_txq_completed_wake(txq, total_packets, total_bytes,</div><div class='del'>-				 fbnic_desc_unused(ring),</div><div class='del'>-				 FBNIC_TX_DESC_WAKEUP);</div><div class='add'>+	if (!netif_txq_completed_wake(txq, total_packets, total_bytes,</div><div class='add'>+				      fbnic_desc_unused(ring),</div><div class='add'>+				      FBNIC_TX_DESC_WAKEUP)) {</div><div class='add'>+		u64_stats_update_begin(&amp;ring-&gt;stats.syncp);</div><div class='add'>+		ring-&gt;stats.twq.wake++;</div><div class='add'>+		u64_stats_update_end(&amp;ring-&gt;stats.syncp);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_clean_twq1(struct fbnic_napi_vector *nv, bool pp_allow_direct,</div><div class='add'>+			     struct fbnic_ring *ring, bool discard,</div><div class='add'>+			     unsigned int hw_head)</div><div class='add'>+{</div><div class='add'>+	u64 total_bytes = 0, total_packets = 0;</div><div class='add'>+	unsigned int head = ring-&gt;head;</div><div class='add'>+</div><div class='add'>+	while (hw_head != head) {</div><div class='add'>+		struct page *page;</div><div class='add'>+		u64 twd;</div><div class='add'>+</div><div class='add'>+		if (unlikely(!(ring-&gt;desc[head] &amp; FBNIC_TWD_TYPE(AL))))</div><div class='add'>+			goto next_desc;</div><div class='add'>+</div><div class='add'>+		twd = le64_to_cpu(ring-&gt;desc[head]);</div><div class='add'>+		page = ring-&gt;tx_buf[head];</div><div class='add'>+</div><div class='add'>+		/* TYPE_AL is 2, TYPE_LAST_AL is 3. So this trick gives</div><div class='add'>+		 * us one increment per packet, with no branches.</div><div class='add'>+		 */</div><div class='add'>+		total_packets += FIELD_GET(FBNIC_TWD_TYPE_MASK, twd) -</div><div class='add'>+				 FBNIC_TWD_TYPE_AL;</div><div class='add'>+		total_bytes += FIELD_GET(FBNIC_TWD_LEN_MASK, twd);</div><div class='add'>+</div><div class='add'>+		page_pool_put_page(pp_page_to_nmdesc(page)-&gt;pp, page, -1,</div><div class='add'>+				   pp_allow_direct);</div><div class='add'>+next_desc:</div><div class='add'>+		head++;</div><div class='add'>+		head &amp;= ring-&gt;size_mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!total_bytes)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ring-&gt;head = head;</div><div class='add'>+</div><div class='add'>+	if (discard) {</div><div class='add'>+		u64_stats_update_begin(&amp;ring-&gt;stats.syncp);</div><div class='add'>+		ring-&gt;stats.dropped += total_packets;</div><div class='add'>+		u64_stats_update_end(&amp;ring-&gt;stats.syncp);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;ring-&gt;stats.syncp);</div><div class='add'>+	ring-&gt;stats.bytes += total_bytes;</div><div class='add'>+	ring-&gt;stats.packets += total_packets;</div><div class='add'>+	u64_stats_update_end(&amp;ring-&gt;stats.syncp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_clean_tsq(struct fbnic_napi_vector *nv,</div><div class='hunk'>@@ -507,49 +724,70 @@ static void fbnic_clean_tsq(struct fbnic_napi_vector *nv,</div><div class='ctx'> </div><div class='ctx'> 	skb_tstamp_tx(skb, &amp;hwtstamp);</div><div class='ctx'> 	u64_stats_update_begin(&amp;ring-&gt;stats.syncp);</div><div class='del'>-	ring-&gt;stats.ts_packets++;</div><div class='add'>+	ring-&gt;stats.twq.ts_packets++;</div><div class='ctx'> 	u64_stats_update_end(&amp;ring-&gt;stats.syncp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_page_pool_init(struct fbnic_ring *ring, unsigned int idx,</div><div class='del'>-				 struct page *page)</div><div class='add'>+				 netmem_ref netmem)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_rx_buf *rx_buf = &amp;ring-&gt;rx_buf[idx];</div><div class='ctx'> </div><div class='del'>-	page_pool_fragment_page(page, PAGECNT_BIAS_MAX);</div><div class='del'>-	rx_buf-&gt;pagecnt_bias = PAGECNT_BIAS_MAX;</div><div class='del'>-	rx_buf-&gt;page = page;</div><div class='add'>+	page_pool_fragment_netmem(netmem, FBNIC_PAGECNT_BIAS_MAX);</div><div class='add'>+	rx_buf-&gt;pagecnt_bias = FBNIC_PAGECNT_BIAS_MAX;</div><div class='add'>+	rx_buf-&gt;netmem = netmem;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct page *fbnic_page_pool_get(struct fbnic_ring *ring,</div><div class='del'>-					unsigned int idx)</div><div class='add'>+static struct page *</div><div class='add'>+fbnic_page_pool_get_head(struct fbnic_q_triad *qt, unsigned int idx)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_rx_buf *rx_buf = &amp;ring-&gt;rx_buf[idx];</div><div class='add'>+	struct fbnic_rx_buf *rx_buf = &amp;qt-&gt;sub0.rx_buf[idx];</div><div class='ctx'> </div><div class='ctx'> 	rx_buf-&gt;pagecnt_bias--;</div><div class='ctx'> </div><div class='del'>-	return rx_buf-&gt;page;</div><div class='add'>+	/* sub0 is always fed system pages, from the NAPI-level page_pool */</div><div class='add'>+	return netmem_to_page(rx_buf-&gt;netmem);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netmem_ref</div><div class='add'>+fbnic_page_pool_get_data(struct fbnic_q_triad *qt, unsigned int idx)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_rx_buf *rx_buf = &amp;qt-&gt;sub1.rx_buf[idx];</div><div class='add'>+</div><div class='add'>+	rx_buf-&gt;pagecnt_bias--;</div><div class='add'>+</div><div class='add'>+	return rx_buf-&gt;netmem;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_page_pool_drain(struct fbnic_ring *ring, unsigned int idx,</div><div class='del'>-				  struct fbnic_napi_vector *nv, int budget)</div><div class='add'>+				  int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_rx_buf *rx_buf = &amp;ring-&gt;rx_buf[idx];</div><div class='del'>-	struct page *page = rx_buf-&gt;page;</div><div class='add'>+	netmem_ref netmem = rx_buf-&gt;netmem;</div><div class='ctx'> </div><div class='del'>-	if (!page_pool_unref_page(page, rx_buf-&gt;pagecnt_bias))</div><div class='del'>-		page_pool_put_unrefed_page(nv-&gt;page_pool, page, -1, !!budget);</div><div class='add'>+	if (!page_pool_unref_netmem(netmem, rx_buf-&gt;pagecnt_bias))</div><div class='add'>+		page_pool_put_unrefed_netmem(ring-&gt;page_pool, netmem, -1,</div><div class='add'>+					     !!budget);</div><div class='ctx'> </div><div class='del'>-	rx_buf-&gt;page = NULL;</div><div class='add'>+	rx_buf-&gt;netmem = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_clean_twq(struct fbnic_napi_vector *nv, int napi_budget,</div><div class='del'>-			    struct fbnic_q_triad *qt, s32 ts_head, s32 head0)</div><div class='add'>+			    struct fbnic_q_triad *qt, s32 ts_head, s32 head0,</div><div class='add'>+			    s32 head1)</div><div class='ctx'> {</div><div class='ctx'> 	if (head0 &gt;= 0)</div><div class='ctx'> 		fbnic_clean_twq0(nv, napi_budget, &amp;qt-&gt;sub0, false, head0);</div><div class='ctx'> 	else if (ts_head &gt;= 0)</div><div class='ctx'> 		fbnic_clean_twq0(nv, napi_budget, &amp;qt-&gt;sub0, false, ts_head);</div><div class='add'>+</div><div class='add'>+	if (head1 &gt;= 0) {</div><div class='add'>+		qt-&gt;cmpl.deferred_head = -1;</div><div class='add'>+		if (napi_budget)</div><div class='add'>+			fbnic_clean_twq1(nv, true, &amp;qt-&gt;sub1, false, head1);</div><div class='add'>+		else</div><div class='add'>+			qt-&gt;cmpl.deferred_head = head1;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -557,6 +795,7 @@ fbnic_clean_tcq(struct fbnic_napi_vector *nv, struct fbnic_q_triad *qt,</div><div class='ctx'> 		int napi_budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_ring *cmpl = &amp;qt-&gt;cmpl;</div><div class='add'>+	s32 head1 = cmpl-&gt;deferred_head;</div><div class='ctx'> 	s32 head0 = -1, ts_head = -1;</div><div class='ctx'> 	__le64 *raw_tcd, done;</div><div class='ctx'> 	u32 head = cmpl-&gt;head;</div><div class='hunk'>@@ -574,7 +813,10 @@ fbnic_clean_tcq(struct fbnic_napi_vector *nv, struct fbnic_q_triad *qt,</div><div class='ctx'> </div><div class='ctx'> 		switch (FIELD_GET(FBNIC_TCD_TYPE_MASK, tcd)) {</div><div class='ctx'> 		case FBNIC_TCD_TYPE_0:</div><div class='del'>-			if (!(tcd &amp; FBNIC_TCD_TWQ1))</div><div class='add'>+			if (tcd &amp; FBNIC_TCD_TWQ1)</div><div class='add'>+				head1 = FIELD_GET(FBNIC_TCD_TYPE0_HEAD1_MASK,</div><div class='add'>+						  tcd);</div><div class='add'>+			else</div><div class='ctx'> 				head0 = FIELD_GET(FBNIC_TCD_TYPE0_HEAD0_MASK,</div><div class='ctx'> 						  tcd);</div><div class='ctx'> 			/* Currently all err status bits are related to</div><div class='hunk'>@@ -607,11 +849,11 @@ fbnic_clean_tcq(struct fbnic_napi_vector *nv, struct fbnic_q_triad *qt,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Unmap and free processed buffers */</div><div class='del'>-	fbnic_clean_twq(nv, napi_budget, qt, ts_head, head0);</div><div class='add'>+	fbnic_clean_twq(nv, napi_budget, qt, ts_head, head0, head1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_clean_bdq(struct fbnic_napi_vector *nv, int napi_budget,</div><div class='del'>-			    struct fbnic_ring *ring, unsigned int hw_head)</div><div class='add'>+static void fbnic_clean_bdq(struct fbnic_ring *ring, unsigned int hw_head,</div><div class='add'>+			    int napi_budget)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int head = ring-&gt;head;</div><div class='ctx'> </div><div class='hunk'>@@ -619,7 +861,7 @@ static void fbnic_clean_bdq(struct fbnic_napi_vector *nv, int napi_budget,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		fbnic_page_pool_drain(ring, head, nv, napi_budget);</div><div class='add'>+		fbnic_page_pool_drain(ring, head, napi_budget);</div><div class='ctx'> </div><div class='ctx'> 		head++;</div><div class='ctx'> 		head &amp;= ring-&gt;size_mask;</div><div class='hunk'>@@ -628,10 +870,10 @@ static void fbnic_clean_bdq(struct fbnic_napi_vector *nv, int napi_budget,</div><div class='ctx'> 	ring-&gt;head = head;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_bd_prep(struct fbnic_ring *bdq, u16 id, struct page *page)</div><div class='add'>+static void fbnic_bd_prep(struct fbnic_ring *bdq, u16 id, netmem_ref netmem)</div><div class='ctx'> {</div><div class='ctx'> 	__le64 *bdq_desc = &amp;bdq-&gt;desc[id * FBNIC_BD_FRAG_COUNT];</div><div class='del'>-	dma_addr_t dma = page_pool_get_dma_addr(page);</div><div class='add'>+	dma_addr_t dma = page_pool_get_dma_addr_netmem(netmem);</div><div class='ctx'> 	u64 bd, i = FBNIC_BD_FRAG_COUNT;</div><div class='ctx'> </div><div class='ctx'> 	bd = (FBNIC_BD_PAGE_ADDR_MASK &amp; dma) |</div><div class='hunk'>@@ -646,10 +888,11 @@ static void fbnic_bd_prep(struct fbnic_ring *bdq, u16 id, struct page *page)</div><div class='ctx'> 		*bdq_desc = cpu_to_le64(bd);</div><div class='ctx'> 		bd += FIELD_PREP(FBNIC_BD_DESC_ADDR_MASK, 1) |</div><div class='ctx'> 		      FIELD_PREP(FBNIC_BD_DESC_ID_MASK, 1);</div><div class='add'>+		bdq_desc++;</div><div class='ctx'> 	} while (--i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_fill_bdq(struct fbnic_napi_vector *nv, struct fbnic_ring *bdq)</div><div class='add'>+static void fbnic_fill_bdq(struct fbnic_ring *bdq)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int count = fbnic_desc_unused(bdq);</div><div class='ctx'> 	unsigned int i = bdq-&gt;tail;</div><div class='hunk'>@@ -658,14 +901,19 @@ static void fbnic_fill_bdq(struct fbnic_napi_vector *nv, struct fbnic_ring *bdq)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='del'>-		struct page *page;</div><div class='add'>+		netmem_ref netmem;</div><div class='add'>+</div><div class='add'>+		netmem = page_pool_dev_alloc_netmems(bdq-&gt;page_pool);</div><div class='add'>+		if (!netmem) {</div><div class='add'>+			u64_stats_update_begin(&amp;bdq-&gt;stats.syncp);</div><div class='add'>+			bdq-&gt;stats.bdq.alloc_failed++;</div><div class='add'>+			u64_stats_update_end(&amp;bdq-&gt;stats.syncp);</div><div class='ctx'> </div><div class='del'>-		page = page_pool_dev_alloc_pages(nv-&gt;page_pool);</div><div class='del'>-		if (!page)</div><div class='ctx'> 			break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		fbnic_page_pool_init(bdq, i, page);</div><div class='del'>-		fbnic_bd_prep(bdq, i, page);</div><div class='add'>+		fbnic_page_pool_init(bdq, i, netmem);</div><div class='add'>+		fbnic_bd_prep(bdq, i, netmem);</div><div class='ctx'> </div><div class='ctx'> 		i++;</div><div class='ctx'> 		i &amp;= bdq-&gt;size_mask;</div><div class='hunk'>@@ -712,7 +960,7 @@ static void fbnic_pkt_prepare(struct fbnic_napi_vector *nv, u64 rcd,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int hdr_pg_idx = FIELD_GET(FBNIC_RCD_AL_BUFF_PAGE_MASK, rcd);</div><div class='ctx'> 	unsigned int hdr_pg_off = FIELD_GET(FBNIC_RCD_AL_BUFF_OFF_MASK, rcd);</div><div class='del'>-	struct page *page = fbnic_page_pool_get(&amp;qt-&gt;sub0, hdr_pg_idx);</div><div class='add'>+	struct page *page = fbnic_page_pool_get_head(qt, hdr_pg_idx);</div><div class='ctx'> 	unsigned int len = FIELD_GET(FBNIC_RCD_AL_BUFF_LEN_MASK, rcd);</div><div class='ctx'> 	unsigned int frame_sz, hdr_pg_start, hdr_pg_end, headroom;</div><div class='ctx'> 	unsigned char *hdr_start;</div><div class='hunk'>@@ -727,7 +975,7 @@ static void fbnic_pkt_prepare(struct fbnic_napi_vector *nv, u64 rcd,</div><div class='ctx'> </div><div class='ctx'> 	headroom = hdr_pg_off - hdr_pg_start + FBNIC_RX_PAD;</div><div class='ctx'> 	frame_sz = hdr_pg_end - hdr_pg_start;</div><div class='del'>-	xdp_init_buff(&amp;pkt-&gt;buff, frame_sz, NULL);</div><div class='add'>+	xdp_init_buff(&amp;pkt-&gt;buff, frame_sz, &amp;qt-&gt;xdp_rxq);</div><div class='ctx'> 	hdr_pg_start += (FBNIC_RCD_AL_BUFF_FRAG_MASK &amp; rcd) *</div><div class='ctx'> 			FBNIC_BD_FRAG_SIZE;</div><div class='ctx'> </div><div class='hunk'>@@ -738,13 +986,12 @@ static void fbnic_pkt_prepare(struct fbnic_napi_vector *nv, u64 rcd,</div><div class='ctx'> </div><div class='ctx'> 	/* Build frame around buffer */</div><div class='ctx'> 	hdr_start = page_address(page) + hdr_pg_start;</div><div class='del'>-</div><div class='add'>+	net_prefetch(pkt-&gt;buff.data);</div><div class='ctx'> 	xdp_prepare_buff(&amp;pkt-&gt;buff, hdr_start, headroom,</div><div class='ctx'> 			 len - FBNIC_RX_PAD, true);</div><div class='ctx'> </div><div class='del'>-	pkt-&gt;data_truesize = 0;</div><div class='del'>-	pkt-&gt;data_len = 0;</div><div class='del'>-	pkt-&gt;nr_frags = 0;</div><div class='add'>+	pkt-&gt;hwtstamp = 0;</div><div class='add'>+	pkt-&gt;add_frag_failed = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_add_rx_frag(struct fbnic_napi_vector *nv, u64 rcd,</div><div class='hunk'>@@ -754,9 +1001,9 @@ static void fbnic_add_rx_frag(struct fbnic_napi_vector *nv, u64 rcd,</div><div class='ctx'> 	unsigned int pg_idx = FIELD_GET(FBNIC_RCD_AL_BUFF_PAGE_MASK, rcd);</div><div class='ctx'> 	unsigned int pg_off = FIELD_GET(FBNIC_RCD_AL_BUFF_OFF_MASK, rcd);</div><div class='ctx'> 	unsigned int len = FIELD_GET(FBNIC_RCD_AL_BUFF_LEN_MASK, rcd);</div><div class='del'>-	struct page *page = fbnic_page_pool_get(&amp;qt-&gt;sub1, pg_idx);</div><div class='del'>-	struct skb_shared_info *shinfo;</div><div class='add'>+	netmem_ref netmem = fbnic_page_pool_get_data(qt, pg_idx);</div><div class='ctx'> 	unsigned int truesize;</div><div class='add'>+	bool added;</div><div class='ctx'> </div><div class='ctx'> 	truesize = FIELD_GET(FBNIC_RCD_AL_PAGE_FIN, rcd) ?</div><div class='ctx'> 		   FBNIC_BD_FRAG_SIZE - pg_off : ALIGN(len, 128);</div><div class='hunk'>@@ -765,88 +1012,171 @@ static void fbnic_add_rx_frag(struct fbnic_napi_vector *nv, u64 rcd,</div><div class='ctx'> 		  FBNIC_BD_FRAG_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/* Sync DMA buffer */</div><div class='del'>-	dma_sync_single_range_for_cpu(nv-&gt;dev, page_pool_get_dma_addr(page),</div><div class='del'>-				      pg_off, truesize, DMA_BIDIRECTIONAL);</div><div class='del'>-</div><div class='del'>-	/* Add page to xdp shared info */</div><div class='del'>-	shinfo = xdp_get_shared_info_from_buff(&amp;pkt-&gt;buff);</div><div class='del'>-</div><div class='del'>-	/* We use gso_segs to store truesize */</div><div class='del'>-	pkt-&gt;data_truesize += truesize;</div><div class='del'>-</div><div class='del'>-	__skb_fill_page_desc_noacc(shinfo, pkt-&gt;nr_frags++, page, pg_off, len);</div><div class='del'>-</div><div class='del'>-	/* Store data_len in gso_size */</div><div class='del'>-	pkt-&gt;data_len += len;</div><div class='add'>+	page_pool_dma_sync_netmem_for_cpu(qt-&gt;sub1.page_pool, netmem,</div><div class='add'>+					  pg_off, truesize);</div><div class='add'>+</div><div class='add'>+	added = xdp_buff_add_frag(&amp;pkt-&gt;buff, netmem, pg_off, len, truesize);</div><div class='add'>+	if (unlikely(!added)) {</div><div class='add'>+		pkt-&gt;add_frag_failed = true;</div><div class='add'>+		netdev_err_once(nv-&gt;napi.dev,</div><div class='add'>+				"Failed to add fragment to xdp_buff\n");</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_put_pkt_buff(struct fbnic_napi_vector *nv,</div><div class='add'>+static void fbnic_put_pkt_buff(struct fbnic_q_triad *qt,</div><div class='ctx'> 			       struct fbnic_pkt_buff *pkt, int budget)</div><div class='ctx'> {</div><div class='del'>-	struct skb_shared_info *shinfo;</div><div class='ctx'> 	struct page *page;</div><div class='del'>-	int nr_frags;</div><div class='ctx'> </div><div class='ctx'> 	if (!pkt-&gt;buff.data_hard_start)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	shinfo = xdp_get_shared_info_from_buff(&amp;pkt-&gt;buff);</div><div class='del'>-	nr_frags = pkt-&gt;nr_frags;</div><div class='add'>+	if (xdp_buff_has_frags(&amp;pkt-&gt;buff)) {</div><div class='add'>+		struct skb_shared_info *shinfo;</div><div class='add'>+		netmem_ref netmem;</div><div class='add'>+		int nr_frags;</div><div class='ctx'> </div><div class='del'>-	while (nr_frags--) {</div><div class='del'>-		page = skb_frag_page(&amp;shinfo-&gt;frags[nr_frags]);</div><div class='del'>-		page_pool_put_full_page(nv-&gt;page_pool, page, !!budget);</div><div class='add'>+		shinfo = xdp_get_shared_info_from_buff(&amp;pkt-&gt;buff);</div><div class='add'>+		nr_frags = shinfo-&gt;nr_frags;</div><div class='add'>+</div><div class='add'>+		while (nr_frags--) {</div><div class='add'>+			netmem = skb_frag_netmem(&amp;shinfo-&gt;frags[nr_frags]);</div><div class='add'>+			page_pool_put_full_netmem(qt-&gt;sub1.page_pool, netmem,</div><div class='add'>+						  !!budget);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	page = virt_to_page(pkt-&gt;buff.data_hard_start);</div><div class='del'>-	page_pool_put_full_page(nv-&gt;page_pool, page, !!budget);</div><div class='add'>+	page_pool_put_full_page(qt-&gt;sub0.page_pool, page, !!budget);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct sk_buff *fbnic_build_skb(struct fbnic_napi_vector *nv,</div><div class='ctx'> 				       struct fbnic_pkt_buff *pkt)</div><div class='ctx'> {</div><div class='del'>-	unsigned int nr_frags = pkt-&gt;nr_frags;</div><div class='del'>-	struct skb_shared_info *shinfo;</div><div class='del'>-	unsigned int truesize;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='del'>-	truesize = xdp_data_hard_end(&amp;pkt-&gt;buff) + FBNIC_RX_TROOM -</div><div class='del'>-		   pkt-&gt;buff.data_hard_start;</div><div class='del'>-</div><div class='del'>-	/* Build frame around buffer */</div><div class='del'>-	skb = napi_build_skb(pkt-&gt;buff.data_hard_start, truesize);</div><div class='del'>-	if (unlikely(!skb))</div><div class='add'>+	skb = xdp_build_skb_from_buff(&amp;pkt-&gt;buff);</div><div class='add'>+	if (!skb)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	/* Push data pointer to start of data, put tail to end of data */</div><div class='del'>-	skb_reserve(skb, pkt-&gt;buff.data - pkt-&gt;buff.data_hard_start);</div><div class='del'>-	__skb_put(skb, pkt-&gt;buff.data_end - pkt-&gt;buff.data);</div><div class='add'>+	/* Add timestamp if present */</div><div class='add'>+	if (pkt-&gt;hwtstamp)</div><div class='add'>+		skb_hwtstamps(skb)-&gt;hwtstamp = pkt-&gt;hwtstamp;</div><div class='ctx'> </div><div class='del'>-	/* Add tracking for metadata at the start of the frame */</div><div class='del'>-	skb_metadata_set(skb, pkt-&gt;buff.data - pkt-&gt;buff.data_meta);</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Add Rx frags */</div><div class='del'>-	if (nr_frags) {</div><div class='del'>-		/* Verify that shared info didn't move */</div><div class='add'>+static long fbnic_pkt_tx(struct fbnic_napi_vector *nv,</div><div class='add'>+			 struct fbnic_pkt_buff *pkt)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_ring *ring = &amp;nv-&gt;qt[0].sub1;</div><div class='add'>+	int size, offset, nsegs = 1, data_len = 0;</div><div class='add'>+	unsigned int tail = ring-&gt;tail;</div><div class='add'>+	struct skb_shared_info *shinfo;</div><div class='add'>+	skb_frag_t *frag = NULL;</div><div class='add'>+	struct page *page;</div><div class='add'>+	dma_addr_t dma;</div><div class='add'>+	__le64 *twd;</div><div class='add'>+</div><div class='add'>+	if (unlikely(xdp_buff_has_frags(&amp;pkt-&gt;buff))) {</div><div class='ctx'> 		shinfo = xdp_get_shared_info_from_buff(&amp;pkt-&gt;buff);</div><div class='del'>-		WARN_ON(skb_shinfo(skb) != shinfo);</div><div class='add'>+		nsegs += shinfo-&gt;nr_frags;</div><div class='add'>+		data_len = shinfo-&gt;xdp_frags_size;</div><div class='add'>+		frag = &amp;shinfo-&gt;frags[0];</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		skb-&gt;truesize += pkt-&gt;data_truesize;</div><div class='del'>-		skb-&gt;data_len += pkt-&gt;data_len;</div><div class='del'>-		shinfo-&gt;nr_frags = nr_frags;</div><div class='del'>-		skb-&gt;len += pkt-&gt;data_len;</div><div class='add'>+	if (fbnic_desc_unused(ring) &lt; nsegs) {</div><div class='add'>+		u64_stats_update_begin(&amp;ring-&gt;stats.syncp);</div><div class='add'>+		ring-&gt;stats.dropped++;</div><div class='add'>+		u64_stats_update_end(&amp;ring-&gt;stats.syncp);</div><div class='add'>+		return -FBNIC_XDP_CONSUME;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	skb_mark_for_recycle(skb);</div><div class='add'>+	page = virt_to_page(pkt-&gt;buff.data_hard_start);</div><div class='add'>+	offset = offset_in_page(pkt-&gt;buff.data);</div><div class='add'>+	dma = page_pool_get_dma_addr(page);</div><div class='ctx'> </div><div class='del'>-	/* Set MAC header specific fields */</div><div class='del'>-	skb-&gt;protocol = eth_type_trans(skb, nv-&gt;napi.dev);</div><div class='add'>+	size = pkt-&gt;buff.data_end - pkt-&gt;buff.data;</div><div class='ctx'> </div><div class='del'>-	/* Add timestamp if present */</div><div class='del'>-	if (pkt-&gt;hwtstamp)</div><div class='del'>-		skb_hwtstamps(skb)-&gt;hwtstamp = pkt-&gt;hwtstamp;</div><div class='add'>+	while (nsegs--) {</div><div class='add'>+		dma_sync_single_range_for_device(nv-&gt;dev, dma, offset, size,</div><div class='add'>+						 DMA_BIDIRECTIONAL);</div><div class='add'>+		dma += offset;</div><div class='ctx'> </div><div class='del'>-	return skb;</div><div class='add'>+		ring-&gt;tx_buf[tail] = page;</div><div class='add'>+</div><div class='add'>+		twd = &amp;ring-&gt;desc[tail];</div><div class='add'>+		*twd = cpu_to_le64(FIELD_PREP(FBNIC_TWD_ADDR_MASK, dma) |</div><div class='add'>+				   FIELD_PREP(FBNIC_TWD_LEN_MASK, size) |</div><div class='add'>+				   FIELD_PREP(FBNIC_TWD_TYPE_MASK,</div><div class='add'>+					      FBNIC_TWD_TYPE_AL));</div><div class='add'>+</div><div class='add'>+		tail++;</div><div class='add'>+		tail &amp;= ring-&gt;size_mask;</div><div class='add'>+</div><div class='add'>+		if (!data_len)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		offset = skb_frag_off(frag);</div><div class='add'>+		page = skb_frag_page(frag);</div><div class='add'>+		dma = page_pool_get_dma_addr(page);</div><div class='add'>+</div><div class='add'>+		size = skb_frag_size(frag);</div><div class='add'>+		data_len -= size;</div><div class='add'>+		frag++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*twd |= FBNIC_TWD_TYPE(LAST_AL);</div><div class='add'>+</div><div class='add'>+	ring-&gt;tail = tail;</div><div class='add'>+</div><div class='add'>+	return -FBNIC_XDP_TX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_pkt_commit_tail(struct fbnic_napi_vector *nv,</div><div class='add'>+				  unsigned int pkt_tail)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_ring *ring = &amp;nv-&gt;qt[0].sub1;</div><div class='add'>+</div><div class='add'>+	/* Force DMA writes to flush before writing to tail */</div><div class='add'>+	dma_wmb();</div><div class='add'>+</div><div class='add'>+	writel(pkt_tail, ring-&gt;doorbell);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *fbnic_run_xdp(struct fbnic_napi_vector *nv,</div><div class='add'>+				     struct fbnic_pkt_buff *pkt)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(nv-&gt;napi.dev);</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='add'>+	int act;</div><div class='add'>+</div><div class='add'>+	xdp_prog = READ_ONCE(fbn-&gt;xdp_prog);</div><div class='add'>+	if (!xdp_prog)</div><div class='add'>+		goto xdp_pass;</div><div class='add'>+</div><div class='add'>+	/* Should never happen, config paths enforce HDS threshold &gt; MTU */</div><div class='add'>+	if (xdp_buff_has_frags(&amp;pkt-&gt;buff) &amp;&amp; !xdp_prog-&gt;aux-&gt;xdp_has_frags)</div><div class='add'>+		return ERR_PTR(-FBNIC_XDP_LEN_ERR);</div><div class='add'>+</div><div class='add'>+	act = bpf_prog_run_xdp(xdp_prog, &amp;pkt-&gt;buff);</div><div class='add'>+	switch (act) {</div><div class='add'>+	case XDP_PASS:</div><div class='add'>+xdp_pass:</div><div class='add'>+		return fbnic_build_skb(nv, pkt);</div><div class='add'>+	case XDP_TX:</div><div class='add'>+		return ERR_PTR(fbnic_pkt_tx(nv, pkt));</div><div class='add'>+	default:</div><div class='add'>+		bpf_warn_invalid_xdp_action(nv-&gt;napi.dev, xdp_prog, act);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case XDP_ABORTED:</div><div class='add'>+		trace_xdp_exception(nv-&gt;napi.dev, xdp_prog, act);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case XDP_DROP:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(-FBNIC_XDP_CONSUME);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum pkt_hash_types fbnic_skb_hash_type(u64 rcd)</div><div class='hunk'>@@ -875,12 +1205,13 @@ static void fbnic_rx_tstamp(struct fbnic_napi_vector *nv, u64 rcd,</div><div class='ctx'> </div><div class='ctx'> static void fbnic_populate_skb_fields(struct fbnic_napi_vector *nv,</div><div class='ctx'> 				      u64 rcd, struct sk_buff *skb,</div><div class='del'>-				      struct fbnic_q_triad *qt)</div><div class='add'>+				      struct fbnic_q_triad *qt,</div><div class='add'>+				      u64 *csum_cmpl, u64 *csum_none)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = nv-&gt;napi.dev;</div><div class='ctx'> 	struct fbnic_ring *rcq = &amp;qt-&gt;cmpl;</div><div class='ctx'> </div><div class='del'>-	fbnic_rx_csum(rcd, skb, rcq);</div><div class='add'>+	fbnic_rx_csum(rcd, skb, rcq, csum_cmpl, csum_none);</div><div class='ctx'> </div><div class='ctx'> 	if (netdev-&gt;features &amp; NETIF_F_RXHASH)</div><div class='ctx'> 		skb_set_hash(skb,</div><div class='hunk'>@@ -898,10 +1229,11 @@ static bool fbnic_rcd_metadata_err(u64 rcd)</div><div class='ctx'> static int fbnic_clean_rcq(struct fbnic_napi_vector *nv,</div><div class='ctx'> 			   struct fbnic_q_triad *qt, int budget)</div><div class='ctx'> {</div><div class='del'>-	unsigned int packets = 0, bytes = 0, dropped = 0;</div><div class='add'>+	unsigned int packets = 0, bytes = 0, dropped = 0, alloc_failed = 0;</div><div class='add'>+	u64 csum_complete = 0, csum_none = 0, length_errors = 0;</div><div class='add'>+	s32 head0 = -1, head1 = -1, pkt_tail = -1;</div><div class='ctx'> 	struct fbnic_ring *rcq = &amp;qt-&gt;cmpl;</div><div class='ctx'> 	struct fbnic_pkt_buff *pkt;</div><div class='del'>-	s32 head0 = -1, head1 = -1;</div><div class='ctx'> 	__le64 *raw_rcd, done;</div><div class='ctx'> 	u32 head = rcq-&gt;head;</div><div class='ctx'> </div><div class='hunk'>@@ -912,6 +1244,7 @@ static int fbnic_clean_rcq(struct fbnic_napi_vector *nv,</div><div class='ctx'> 	/* Walk the completion queue collecting the heads reported by NIC */</div><div class='ctx'> 	while (likely(packets &lt; budget)) {</div><div class='ctx'> 		struct sk_buff *skb = ERR_PTR(-EINVAL);</div><div class='add'>+		u32 pkt_bytes;</div><div class='ctx'> 		u64 rcd;</div><div class='ctx'> </div><div class='ctx'> 		if ((*raw_rcd &amp; cpu_to_le64(FBNIC_RCD_DONE)) == done)</div><div class='hunk'>@@ -942,22 +1275,38 @@ static int fbnic_clean_rcq(struct fbnic_napi_vector *nv,</div><div class='ctx'> 			/* We currently ignore the action table index */</div><div class='ctx'> 			break;</div><div class='ctx'> 		case FBNIC_RCD_TYPE_META:</div><div class='del'>-			if (likely(!fbnic_rcd_metadata_err(rcd)))</div><div class='del'>-				skb = fbnic_build_skb(nv, pkt);</div><div class='add'>+			if (likely(!fbnic_rcd_metadata_err(rcd) &amp;&amp;</div><div class='add'>+				   !pkt-&gt;add_frag_failed)) {</div><div class='add'>+				pkt_bytes = xdp_get_buff_len(&amp;pkt-&gt;buff);</div><div class='add'>+				skb = fbnic_run_xdp(nv, pkt);</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			/* Populate skb and invalidate XDP */</div><div class='ctx'> 			if (!IS_ERR_OR_NULL(skb)) {</div><div class='del'>-				fbnic_populate_skb_fields(nv, rcd, skb, qt);</div><div class='del'>-</div><div class='del'>-				packets++;</div><div class='del'>-				bytes += skb-&gt;len;</div><div class='del'>-</div><div class='add'>+				fbnic_populate_skb_fields(nv, rcd, skb, qt,</div><div class='add'>+							  &amp;csum_complete,</div><div class='add'>+							  &amp;csum_none);</div><div class='ctx'> 				napi_gro_receive(&amp;nv-&gt;napi, skb);</div><div class='add'>+			} else if (skb == ERR_PTR(-FBNIC_XDP_TX)) {</div><div class='add'>+				pkt_tail = nv-&gt;qt[0].sub1.tail;</div><div class='add'>+			} else if (PTR_ERR(skb) == -FBNIC_XDP_CONSUME) {</div><div class='add'>+				fbnic_put_pkt_buff(qt, pkt, 1);</div><div class='ctx'> 			} else {</div><div class='del'>-				dropped++;</div><div class='del'>-				fbnic_put_pkt_buff(nv, pkt, 1);</div><div class='add'>+				if (!skb)</div><div class='add'>+					alloc_failed++;</div><div class='add'>+</div><div class='add'>+				if (skb == ERR_PTR(-FBNIC_XDP_LEN_ERR))</div><div class='add'>+					length_errors++;</div><div class='add'>+				else</div><div class='add'>+					dropped++;</div><div class='add'>+</div><div class='add'>+				fbnic_put_pkt_buff(qt, pkt, 1);</div><div class='add'>+				goto next_dont_count;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='add'>+			packets++;</div><div class='add'>+			bytes += pkt_bytes;</div><div class='add'>+next_dont_count:</div><div class='ctx'> 			pkt-&gt;buff.data_hard_start = NULL;</div><div class='ctx'> </div><div class='ctx'> 			break;</div><div class='hunk'>@@ -974,19 +1323,24 @@ static int fbnic_clean_rcq(struct fbnic_napi_vector *nv,</div><div class='ctx'> 	u64_stats_update_begin(&amp;rcq-&gt;stats.syncp);</div><div class='ctx'> 	rcq-&gt;stats.packets += packets;</div><div class='ctx'> 	rcq-&gt;stats.bytes += bytes;</div><div class='del'>-	/* Re-add ethernet header length (removed in fbnic_build_skb) */</div><div class='del'>-	rcq-&gt;stats.bytes += ETH_HLEN * packets;</div><div class='ctx'> 	rcq-&gt;stats.dropped += dropped;</div><div class='add'>+	rcq-&gt;stats.rx.alloc_failed += alloc_failed;</div><div class='add'>+	rcq-&gt;stats.rx.csum_complete += csum_complete;</div><div class='add'>+	rcq-&gt;stats.rx.csum_none += csum_none;</div><div class='add'>+	rcq-&gt;stats.rx.length_errors += length_errors;</div><div class='ctx'> 	u64_stats_update_end(&amp;rcq-&gt;stats.syncp);</div><div class='ctx'> </div><div class='add'>+	if (pkt_tail &gt;= 0)</div><div class='add'>+		fbnic_pkt_commit_tail(nv, pkt_tail);</div><div class='add'>+</div><div class='ctx'> 	/* Unmap and free processed buffers */</div><div class='ctx'> 	if (head0 &gt;= 0)</div><div class='del'>-		fbnic_clean_bdq(nv, budget, &amp;qt-&gt;sub0, head0);</div><div class='del'>-	fbnic_fill_bdq(nv, &amp;qt-&gt;sub0);</div><div class='add'>+		fbnic_clean_bdq(&amp;qt-&gt;sub0, head0, budget);</div><div class='add'>+	fbnic_fill_bdq(&amp;qt-&gt;sub0);</div><div class='ctx'> </div><div class='ctx'> 	if (head1 &gt;= 0)</div><div class='del'>-		fbnic_clean_bdq(nv, budget, &amp;qt-&gt;sub1, head1);</div><div class='del'>-	fbnic_fill_bdq(nv, &amp;qt-&gt;sub1);</div><div class='add'>+		fbnic_clean_bdq(&amp;qt-&gt;sub1, head1, budget);</div><div class='add'>+	fbnic_fill_bdq(&amp;qt-&gt;sub1);</div><div class='ctx'> </div><div class='ctx'> 	/* Record the current head/tail of the queue */</div><div class='ctx'> 	if (rcq-&gt;head != head) {</div><div class='hunk'>@@ -1033,20 +1387,20 @@ static int fbnic_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	if (likely(napi_complete_done(napi, work_done)))</div><div class='ctx'> 		fbnic_nv_irq_rearm(nv);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t fbnic_msix_clean_rings(int __always_unused irq, void *data)</div><div class='add'>+irqreturn_t fbnic_msix_clean_rings(int __always_unused irq, void *data)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_napi_vector *nv = data;</div><div class='add'>+	struct fbnic_napi_vector *nv = *(void **)data;</div><div class='ctx'> </div><div class='ctx'> 	napi_schedule_irqoff(&amp;nv-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_aggregate_ring_rx_counters(struct fbnic_net *fbn,</div><div class='del'>-					     struct fbnic_ring *rxr)</div><div class='add'>+void fbnic_aggregate_ring_rx_counters(struct fbnic_net *fbn,</div><div class='add'>+				      struct fbnic_ring *rxr)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_queue_stats *stats = &amp;rxr-&gt;stats;</div><div class='ctx'> </div><div class='hunk'>@@ -1054,10 +1408,27 @@ static void fbnic_aggregate_ring_rx_counters(struct fbnic_net *fbn,</div><div class='ctx'> 	fbn-&gt;rx_stats.bytes += stats-&gt;bytes;</div><div class='ctx'> 	fbn-&gt;rx_stats.packets += stats-&gt;packets;</div><div class='ctx'> 	fbn-&gt;rx_stats.dropped += stats-&gt;dropped;</div><div class='add'>+	fbn-&gt;rx_stats.rx.alloc_failed += stats-&gt;rx.alloc_failed;</div><div class='add'>+	fbn-&gt;rx_stats.rx.csum_complete += stats-&gt;rx.csum_complete;</div><div class='add'>+	fbn-&gt;rx_stats.rx.csum_none += stats-&gt;rx.csum_none;</div><div class='add'>+	fbn-&gt;rx_stats.rx.length_errors += stats-&gt;rx.length_errors;</div><div class='add'>+	/* Remember to add new stats here */</div><div class='add'>+	BUILD_BUG_ON(sizeof(fbn-&gt;rx_stats.rx) / 8 != 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_aggregate_ring_tx_counters(struct fbnic_net *fbn,</div><div class='del'>-					     struct fbnic_ring *txr)</div><div class='add'>+void fbnic_aggregate_ring_bdq_counters(struct fbnic_net *fbn,</div><div class='add'>+				       struct fbnic_ring *bdq)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_queue_stats *stats = &amp;bdq-&gt;stats;</div><div class='add'>+</div><div class='add'>+	/* Capture stats from queues before dissasociating them */</div><div class='add'>+	fbn-&gt;bdq_stats.bdq.alloc_failed += stats-&gt;bdq.alloc_failed;</div><div class='add'>+	/* Remember to add new stats here */</div><div class='add'>+	BUILD_BUG_ON(sizeof(fbn-&gt;rx_stats.bdq) / 8 != 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_aggregate_ring_tx_counters(struct fbnic_net *fbn,</div><div class='add'>+				      struct fbnic_ring *txr)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_queue_stats *stats = &amp;txr-&gt;stats;</div><div class='ctx'> </div><div class='hunk'>@@ -1065,8 +1436,28 @@ static void fbnic_aggregate_ring_tx_counters(struct fbnic_net *fbn,</div><div class='ctx'> 	fbn-&gt;tx_stats.bytes += stats-&gt;bytes;</div><div class='ctx'> 	fbn-&gt;tx_stats.packets += stats-&gt;packets;</div><div class='ctx'> 	fbn-&gt;tx_stats.dropped += stats-&gt;dropped;</div><div class='del'>-	fbn-&gt;tx_stats.ts_lost += stats-&gt;ts_lost;</div><div class='del'>-	fbn-&gt;tx_stats.ts_packets += stats-&gt;ts_packets;</div><div class='add'>+	fbn-&gt;tx_stats.twq.csum_partial += stats-&gt;twq.csum_partial;</div><div class='add'>+	fbn-&gt;tx_stats.twq.lso += stats-&gt;twq.lso;</div><div class='add'>+	fbn-&gt;tx_stats.twq.ts_lost += stats-&gt;twq.ts_lost;</div><div class='add'>+	fbn-&gt;tx_stats.twq.ts_packets += stats-&gt;twq.ts_packets;</div><div class='add'>+	fbn-&gt;tx_stats.twq.stop += stats-&gt;twq.stop;</div><div class='add'>+	fbn-&gt;tx_stats.twq.wake += stats-&gt;twq.wake;</div><div class='add'>+	/* Remember to add new stats here */</div><div class='add'>+	BUILD_BUG_ON(sizeof(fbn-&gt;tx_stats.twq) / 8 != 6);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_aggregate_ring_xdp_counters(struct fbnic_net *fbn,</div><div class='add'>+				       struct fbnic_ring *xdpr)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_queue_stats *stats = &amp;xdpr-&gt;stats;</div><div class='add'>+</div><div class='add'>+	if (!(xdpr-&gt;flags &amp; FBNIC_RING_F_STATS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Capture stats from queues before dissasociating them */</div><div class='add'>+	fbn-&gt;tx_stats.dropped += stats-&gt;dropped;</div><div class='add'>+	fbn-&gt;tx_stats.bytes += stats-&gt;bytes;</div><div class='add'>+	fbn-&gt;tx_stats.packets += stats-&gt;packets;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_remove_tx_ring(struct fbnic_net *fbn,</div><div class='hunk'>@@ -1082,6 +1473,19 @@ static void fbnic_remove_tx_ring(struct fbnic_net *fbn,</div><div class='ctx'> 	fbn-&gt;tx[txr-&gt;q_idx] = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void fbnic_remove_xdp_ring(struct fbnic_net *fbn,</div><div class='add'>+				  struct fbnic_ring *xdpr)</div><div class='add'>+{</div><div class='add'>+	if (!(xdpr-&gt;flags &amp; FBNIC_RING_F_STATS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fbnic_aggregate_ring_xdp_counters(fbn, xdpr);</div><div class='add'>+</div><div class='add'>+	/* Remove pointer to the Tx ring */</div><div class='add'>+	WARN_ON(fbn-&gt;tx[xdpr-&gt;q_idx] &amp;&amp; fbn-&gt;tx[xdpr-&gt;q_idx] != xdpr);</div><div class='add'>+	fbn-&gt;tx[xdpr-&gt;q_idx] = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fbnic_remove_rx_ring(struct fbnic_net *fbn,</div><div class='ctx'> 				 struct fbnic_ring *rxr)</div><div class='ctx'> {</div><div class='hunk'>@@ -1095,66 +1499,70 @@ static void fbnic_remove_rx_ring(struct fbnic_net *fbn,</div><div class='ctx'> 	fbn-&gt;rx[rxr-&gt;q_idx] = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void fbnic_remove_bdq_ring(struct fbnic_net *fbn,</div><div class='add'>+				  struct fbnic_ring *bdq)</div><div class='add'>+{</div><div class='add'>+	if (!(bdq-&gt;flags &amp; FBNIC_RING_F_STATS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fbnic_aggregate_ring_bdq_counters(fbn, bdq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_free_qt_page_pools(struct fbnic_q_triad *qt)</div><div class='add'>+{</div><div class='add'>+	page_pool_destroy(qt-&gt;sub0.page_pool);</div><div class='add'>+	page_pool_destroy(qt-&gt;sub1.page_pool);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fbnic_free_napi_vector(struct fbnic_net *fbn,</div><div class='ctx'> 				   struct fbnic_napi_vector *nv)</div><div class='ctx'> {</div><div class='ctx'> 	struct fbnic_dev *fbd = nv-&gt;fbd;</div><div class='del'>-	u32 v_idx = nv-&gt;v_idx;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nv-&gt;txt_count; i++) {</div><div class='ctx'> 		fbnic_remove_tx_ring(fbn, &amp;nv-&gt;qt[i].sub0);</div><div class='add'>+		fbnic_remove_xdp_ring(fbn, &amp;nv-&gt;qt[i].sub1);</div><div class='ctx'> 		fbnic_remove_tx_ring(fbn, &amp;nv-&gt;qt[i].cmpl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (j = 0; j &lt; nv-&gt;rxt_count; j++, i++) {</div><div class='del'>-		fbnic_remove_rx_ring(fbn, &amp;nv-&gt;qt[i].sub0);</div><div class='del'>-		fbnic_remove_rx_ring(fbn, &amp;nv-&gt;qt[i].sub1);</div><div class='add'>+		fbnic_remove_bdq_ring(fbn, &amp;nv-&gt;qt[i].sub0);</div><div class='add'>+		fbnic_remove_bdq_ring(fbn, &amp;nv-&gt;qt[i].sub1);</div><div class='ctx'> 		fbnic_remove_rx_ring(fbn, &amp;nv-&gt;qt[i].cmpl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	fbnic_free_irq(fbd, v_idx, nv);</div><div class='del'>-	page_pool_destroy(nv-&gt;page_pool);</div><div class='del'>-	netif_napi_del(&amp;nv-&gt;napi);</div><div class='del'>-	list_del(&amp;nv-&gt;napis);</div><div class='add'>+	fbnic_napi_free_irq(fbd, nv);</div><div class='add'>+	netif_napi_del_locked(&amp;nv-&gt;napi);</div><div class='add'>+	fbn-&gt;napi[fbnic_napi_idx(nv)] = NULL;</div><div class='ctx'> 	kfree(nv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fbnic_free_napi_vectors(struct fbnic_net *fbn)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_napi_vector *nv, *temp;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(nv, temp, &amp;fbn-&gt;napis, napis)</div><div class='del'>-		fbnic_free_napi_vector(fbn, nv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void fbnic_name_napi_vector(struct fbnic_napi_vector *nv)</div><div class='del'>-{</div><div class='del'>-	unsigned char *dev_name = nv-&gt;napi.dev-&gt;name;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	if (!nv-&gt;rxt_count)</div><div class='del'>-		snprintf(nv-&gt;name, sizeof(nv-&gt;name), "%s-Tx-%u", dev_name,</div><div class='del'>-			 nv-&gt;v_idx - FBNIC_NON_NAPI_VECTORS);</div><div class='del'>-	else</div><div class='del'>-		snprintf(nv-&gt;name, sizeof(nv-&gt;name), "%s-TxRx-%u", dev_name,</div><div class='del'>-			 nv-&gt;v_idx - FBNIC_NON_NAPI_VECTORS);</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++)</div><div class='add'>+		if (fbn-&gt;napi[i])</div><div class='add'>+			fbnic_free_napi_vector(fbn, fbn-&gt;napi[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define FBNIC_PAGE_POOL_FLAGS \</div><div class='del'>-	(PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV)</div><div class='del'>-</div><div class='del'>-static int fbnic_alloc_nv_page_pool(struct fbnic_net *fbn,</div><div class='del'>-				    struct fbnic_napi_vector *nv)</div><div class='add'>+static int</div><div class='add'>+fbnic_alloc_qt_page_pools(struct fbnic_net *fbn, struct fbnic_q_triad *qt,</div><div class='add'>+			  unsigned int rxq_idx)</div><div class='ctx'> {</div><div class='ctx'> 	struct page_pool_params pp_params = {</div><div class='ctx'> 		.order = 0,</div><div class='del'>-		.flags = FBNIC_PAGE_POOL_FLAGS,</div><div class='del'>-		.pool_size = (fbn-&gt;hpq_size + fbn-&gt;ppq_size) * nv-&gt;rxt_count,</div><div class='add'>+		.flags = PP_FLAG_DMA_MAP |</div><div class='add'>+			 PP_FLAG_DMA_SYNC_DEV,</div><div class='add'>+		.pool_size = fbn-&gt;hpq_size + fbn-&gt;ppq_size,</div><div class='ctx'> 		.nid = NUMA_NO_NODE,</div><div class='del'>-		.dev = nv-&gt;dev,</div><div class='add'>+		.dev = fbn-&gt;netdev-&gt;dev.parent,</div><div class='ctx'> 		.dma_dir = DMA_BIDIRECTIONAL,</div><div class='ctx'> 		.offset = 0,</div><div class='del'>-		.max_len = PAGE_SIZE</div><div class='add'>+		.max_len = PAGE_SIZE,</div><div class='add'>+		.netdev	= fbn-&gt;netdev,</div><div class='add'>+		.queue_idx = rxq_idx,</div><div class='ctx'> 	};</div><div class='ctx'> 	struct page_pool *pp;</div><div class='ctx'> </div><div class='hunk'>@@ -1174,9 +1582,24 @@ static int fbnic_alloc_nv_page_pool(struct fbnic_net *fbn,</div><div class='ctx'> 	if (IS_ERR(pp))</div><div class='ctx'> 		return PTR_ERR(pp);</div><div class='ctx'> </div><div class='del'>-	nv-&gt;page_pool = pp;</div><div class='add'>+	qt-&gt;sub0.page_pool = pp;</div><div class='add'>+	if (netif_rxq_has_unreadable_mp(fbn-&gt;netdev, rxq_idx)) {</div><div class='add'>+		pp_params.flags |= PP_FLAG_ALLOW_UNREADABLE_NETMEM;</div><div class='add'>+		pp_params.dma_dir = DMA_FROM_DEVICE;</div><div class='add'>+</div><div class='add'>+		pp = page_pool_create(&amp;pp_params);</div><div class='add'>+		if (IS_ERR(pp))</div><div class='add'>+			goto err_destroy_sub0;</div><div class='add'>+	} else {</div><div class='add'>+		page_pool_get(pp);</div><div class='add'>+	}</div><div class='add'>+	qt-&gt;sub1.page_pool = pp;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_destroy_sub0:</div><div class='add'>+	page_pool_destroy(pp);</div><div class='add'>+	return PTR_ERR(pp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_ring_init(struct fbnic_ring *ring, u32 __iomem *doorbell,</div><div class='hunk'>@@ -1186,6 +1609,7 @@ static void fbnic_ring_init(struct fbnic_ring *ring, u32 __iomem *doorbell,</div><div class='ctx'> 	ring-&gt;doorbell = doorbell;</div><div class='ctx'> 	ring-&gt;q_idx = q_idx;</div><div class='ctx'> 	ring-&gt;flags = flags;</div><div class='add'>+	ring-&gt;deferred_head = -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int fbnic_alloc_napi_vector(struct fbnic_dev *fbd, struct fbnic_net *fbn,</div><div class='hunk'>@@ -1195,11 +1619,18 @@ static int fbnic_alloc_napi_vector(struct fbnic_dev *fbd, struct fbnic_net *fbn,</div><div class='ctx'> {</div><div class='ctx'> 	int txt_count = txq_count, rxt_count = rxq_count;</div><div class='ctx'> 	u32 __iomem *uc_addr = fbd-&gt;uc_addr0;</div><div class='add'>+	int xdp_count = 0, qt_count, err;</div><div class='ctx'> 	struct fbnic_napi_vector *nv;</div><div class='ctx'> 	struct fbnic_q_triad *qt;</div><div class='del'>-	int qt_count, err;</div><div class='ctx'> 	u32 __iomem *db;</div><div class='ctx'> </div><div class='add'>+	/* We need to reserve at least one Tx Queue Triad for an XDP ring */</div><div class='add'>+	if (rxq_count) {</div><div class='add'>+		xdp_count = 1;</div><div class='add'>+		if (!txt_count)</div><div class='add'>+			txt_count = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	qt_count = txt_count + rxq_count;</div><div class='ctx'> 	if (!qt_count)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -1222,42 +1653,34 @@ static int fbnic_alloc_napi_vector(struct fbnic_dev *fbd, struct fbnic_net *fbn,</div><div class='ctx'> 	nv-&gt;v_idx = v_idx;</div><div class='ctx'> </div><div class='ctx'> 	/* Tie napi to netdev */</div><div class='del'>-	list_add(&amp;nv-&gt;napis, &amp;fbn-&gt;napis);</div><div class='del'>-	netif_napi_add(fbn-&gt;netdev, &amp;nv-&gt;napi, fbnic_poll);</div><div class='add'>+	fbn-&gt;napi[fbnic_napi_idx(nv)] = nv;</div><div class='add'>+	netif_napi_add_config_locked(fbn-&gt;netdev, &amp;nv-&gt;napi, fbnic_poll,</div><div class='add'>+				     fbnic_napi_idx(nv));</div><div class='ctx'> </div><div class='ctx'> 	/* Record IRQ to NAPI struct */</div><div class='del'>-	netif_napi_set_irq(&amp;nv-&gt;napi,</div><div class='del'>-			   pci_irq_vector(to_pci_dev(fbd-&gt;dev), nv-&gt;v_idx));</div><div class='add'>+	netif_napi_set_irq_locked(&amp;nv-&gt;napi,</div><div class='add'>+				  pci_irq_vector(to_pci_dev(fbd-&gt;dev),</div><div class='add'>+						 nv-&gt;v_idx));</div><div class='ctx'> </div><div class='ctx'> 	/* Tie nv back to PCIe dev */</div><div class='ctx'> 	nv-&gt;dev = fbd-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	/* Allocate page pool */</div><div class='del'>-	if (rxq_count) {</div><div class='del'>-		err = fbnic_alloc_nv_page_pool(fbn, nv);</div><div class='del'>-		if (err)</div><div class='del'>-			goto napi_del;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Initialize vector name */</div><div class='del'>-	fbnic_name_napi_vector(nv);</div><div class='del'>-</div><div class='ctx'> 	/* Request the IRQ for napi vector */</div><div class='del'>-	err = fbnic_request_irq(fbd, v_idx, &amp;fbnic_msix_clean_rings,</div><div class='del'>-				IRQF_SHARED, nv-&gt;name, nv);</div><div class='add'>+	err = fbnic_napi_request_irq(fbd, nv);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto pp_destroy;</div><div class='add'>+		goto napi_del;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize queue triads */</div><div class='ctx'> 	qt = nv-&gt;qt;</div><div class='ctx'> </div><div class='ctx'> 	while (txt_count) {</div><div class='add'>+		u8 flags = FBNIC_RING_F_CTX | FBNIC_RING_F_STATS;</div><div class='add'>+</div><div class='ctx'> 		/* Configure Tx queue */</div><div class='ctx'> 		db = &amp;uc_addr[FBNIC_QUEUE(txq_idx) + FBNIC_QUEUE_TWQ0_TAIL];</div><div class='ctx'> </div><div class='ctx'> 		/* Assign Tx queue to netdev if applicable */</div><div class='ctx'> 		if (txq_count &gt; 0) {</div><div class='del'>-			u8 flags = FBNIC_RING_F_CTX | FBNIC_RING_F_STATS;</div><div class='ctx'> </div><div class='ctx'> 			fbnic_ring_init(&amp;qt-&gt;sub0, db, txq_idx, flags);</div><div class='ctx'> 			fbn-&gt;tx[txq_idx] = &amp;qt-&gt;sub0;</div><div class='hunk'>@@ -1267,6 +1690,28 @@ static int fbnic_alloc_napi_vector(struct fbnic_dev *fbd, struct fbnic_net *fbn,</div><div class='ctx'> 					FBNIC_RING_F_DISABLED);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/* Configure XDP queue */</div><div class='add'>+		db = &amp;uc_addr[FBNIC_QUEUE(txq_idx) + FBNIC_QUEUE_TWQ1_TAIL];</div><div class='add'>+</div><div class='add'>+		/* Assign XDP queue to netdev if applicable</div><div class='add'>+		 *</div><div class='add'>+		 * The setup for this is in itself a bit different.</div><div class='add'>+		 * 1. We only need one XDP Tx queue per NAPI vector.</div><div class='add'>+		 * 2. We associate it to the first Rx queue index.</div><div class='add'>+		 * 3. The hardware side is associated based on the Tx Queue.</div><div class='add'>+		 * 4. The netdev queue is offset by FBNIC_MAX_TXQs.</div><div class='add'>+		 */</div><div class='add'>+		if (xdp_count &gt; 0) {</div><div class='add'>+			unsigned int xdp_idx = FBNIC_MAX_TXQS + rxq_idx;</div><div class='add'>+</div><div class='add'>+			fbnic_ring_init(&amp;qt-&gt;sub1, db, xdp_idx, flags);</div><div class='add'>+			fbn-&gt;tx[xdp_idx] = &amp;qt-&gt;sub1;</div><div class='add'>+			xdp_count--;</div><div class='add'>+		} else {</div><div class='add'>+			fbnic_ring_init(&amp;qt-&gt;sub1, db, 0,</div><div class='add'>+					FBNIC_RING_F_DISABLED);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* Configure Tx completion queue */</div><div class='ctx'> 		db = &amp;uc_addr[FBNIC_QUEUE(txq_idx) + FBNIC_QUEUE_TCQ_HEAD];</div><div class='ctx'> 		fbnic_ring_init(&amp;qt-&gt;cmpl, db, 0, 0);</div><div class='hunk'>@@ -1282,11 +1727,13 @@ static int fbnic_alloc_napi_vector(struct fbnic_dev *fbd, struct fbnic_net *fbn,</div><div class='ctx'> 	while (rxt_count) {</div><div class='ctx'> 		/* Configure header queue */</div><div class='ctx'> 		db = &amp;uc_addr[FBNIC_QUEUE(rxq_idx) + FBNIC_QUEUE_BDQ_HPQ_TAIL];</div><div class='del'>-		fbnic_ring_init(&amp;qt-&gt;sub0, db, 0, FBNIC_RING_F_CTX);</div><div class='add'>+		fbnic_ring_init(&amp;qt-&gt;sub0, db, 0,</div><div class='add'>+				FBNIC_RING_F_CTX | FBNIC_RING_F_STATS);</div><div class='ctx'> </div><div class='ctx'> 		/* Configure payload queue */</div><div class='ctx'> 		db = &amp;uc_addr[FBNIC_QUEUE(rxq_idx) + FBNIC_QUEUE_BDQ_PPQ_TAIL];</div><div class='del'>-		fbnic_ring_init(&amp;qt-&gt;sub1, db, 0, FBNIC_RING_F_CTX);</div><div class='add'>+		fbnic_ring_init(&amp;qt-&gt;sub1, db, 0,</div><div class='add'>+				FBNIC_RING_F_CTX | FBNIC_RING_F_STATS);</div><div class='ctx'> </div><div class='ctx'> 		/* Configure Rx completion queue */</div><div class='ctx'> 		db = &amp;uc_addr[FBNIC_QUEUE(rxq_idx) + FBNIC_QUEUE_RCQ_HEAD];</div><div class='hunk'>@@ -1303,11 +1750,9 @@ static int fbnic_alloc_napi_vector(struct fbnic_dev *fbd, struct fbnic_net *fbn,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-pp_destroy:</div><div class='del'>-	page_pool_destroy(nv-&gt;page_pool);</div><div class='ctx'> napi_del:</div><div class='del'>-	netif_napi_del(&amp;nv-&gt;napi);</div><div class='del'>-	list_del(&amp;nv-&gt;napis);</div><div class='add'>+	netif_napi_del_locked(&amp;nv-&gt;napi);</div><div class='add'>+	fbn-&gt;napi[fbnic_napi_idx(nv)] = NULL;</div><div class='ctx'> 	kfree(nv);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1363,7 +1808,7 @@ int fbnic_alloc_napi_vectors(struct fbnic_net *fbn)</div><div class='ctx'> free_vectors:</div><div class='ctx'> 	fbnic_free_napi_vectors(fbn);</div><div class='ctx'> </div><div class='del'>-	return -ENOMEM;</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_free_ring_resources(struct device *dev,</div><div class='hunk'>@@ -1520,6 +1965,12 @@ static void fbnic_free_qt_resources(struct fbnic_net *fbn,</div><div class='ctx'> 	fbnic_free_ring_resources(dev, &amp;qt-&gt;cmpl);</div><div class='ctx'> 	fbnic_free_ring_resources(dev, &amp;qt-&gt;sub1);</div><div class='ctx'> 	fbnic_free_ring_resources(dev, &amp;qt-&gt;sub0);</div><div class='add'>+</div><div class='add'>+	if (xdp_rxq_info_is_reg(&amp;qt-&gt;xdp_rxq)) {</div><div class='add'>+		xdp_rxq_info_unreg_mem_model(&amp;qt-&gt;xdp_rxq);</div><div class='add'>+		xdp_rxq_info_unreg(&amp;qt-&gt;xdp_rxq);</div><div class='add'>+		fbnic_free_qt_page_pools(qt);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int fbnic_alloc_tx_qt_resources(struct fbnic_net *fbn,</div><div class='hunk'>@@ -1532,6 +1983,10 @@ static int fbnic_alloc_tx_qt_resources(struct fbnic_net *fbn,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	err = fbnic_alloc_tx_ring_resources(fbn, &amp;qt-&gt;sub1);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_sub0;</div><div class='add'>+</div><div class='ctx'> 	err = fbnic_alloc_tx_ring_resources(fbn, &amp;qt-&gt;cmpl);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto free_sub1;</div><div class='hunk'>@@ -1539,20 +1994,37 @@ static int fbnic_alloc_tx_qt_resources(struct fbnic_net *fbn,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> free_sub1:</div><div class='add'>+	fbnic_free_ring_resources(dev, &amp;qt-&gt;sub1);</div><div class='add'>+free_sub0:</div><div class='ctx'> 	fbnic_free_ring_resources(dev, &amp;qt-&gt;sub0);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int fbnic_alloc_rx_qt_resources(struct fbnic_net *fbn,</div><div class='add'>+				       struct fbnic_napi_vector *nv,</div><div class='ctx'> 				       struct fbnic_q_triad *qt)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = fbn-&gt;netdev-&gt;dev.parent;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = fbnic_alloc_rx_ring_resources(fbn, &amp;qt-&gt;sub0);</div><div class='add'>+	err = fbnic_alloc_qt_page_pools(fbn, qt, qt-&gt;cmpl.q_idx);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	err = xdp_rxq_info_reg(&amp;qt-&gt;xdp_rxq, fbn-&gt;netdev, qt-&gt;sub0.q_idx,</div><div class='add'>+			       nv-&gt;napi.napi_id);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_page_pools;</div><div class='add'>+</div><div class='add'>+	err = xdp_rxq_info_reg_mem_model(&amp;qt-&gt;xdp_rxq, MEM_TYPE_PAGE_POOL,</div><div class='add'>+					 qt-&gt;sub0.page_pool);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unreg_rxq;</div><div class='add'>+</div><div class='add'>+	err = fbnic_alloc_rx_ring_resources(fbn, &amp;qt-&gt;sub0);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unreg_mm;</div><div class='add'>+</div><div class='ctx'> 	err = fbnic_alloc_rx_ring_resources(fbn, &amp;qt-&gt;sub1);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto free_sub0;</div><div class='hunk'>@@ -1567,19 +2039,21 @@ free_sub1:</div><div class='ctx'> 	fbnic_free_ring_resources(dev, &amp;qt-&gt;sub1);</div><div class='ctx'> free_sub0:</div><div class='ctx'> 	fbnic_free_ring_resources(dev, &amp;qt-&gt;sub0);</div><div class='add'>+unreg_mm:</div><div class='add'>+	xdp_rxq_info_unreg_mem_model(&amp;qt-&gt;xdp_rxq);</div><div class='add'>+unreg_rxq:</div><div class='add'>+	xdp_rxq_info_unreg(&amp;qt-&gt;xdp_rxq);</div><div class='add'>+free_page_pools:</div><div class='add'>+	fbnic_free_qt_page_pools(qt);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_free_nv_resources(struct fbnic_net *fbn,</div><div class='ctx'> 				    struct fbnic_napi_vector *nv)</div><div class='ctx'> {</div><div class='del'>-	int i, j;</div><div class='del'>-</div><div class='del'>-	/* Free Tx Resources  */</div><div class='del'>-	for (i = 0; i &lt; nv-&gt;txt_count; i++)</div><div class='del'>-		fbnic_free_qt_resources(fbn, &amp;nv-&gt;qt[i]);</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	for (j = 0; j &lt; nv-&gt;rxt_count; j++, i++)</div><div class='add'>+	for (i = 0; i &lt; nv-&gt;txt_count + nv-&gt;rxt_count; i++)</div><div class='ctx'> 		fbnic_free_qt_resources(fbn, &amp;nv-&gt;qt[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1592,19 +2066,19 @@ static int fbnic_alloc_nv_resources(struct fbnic_net *fbn,</div><div class='ctx'> 	for (i = 0; i &lt; nv-&gt;txt_count; i++) {</div><div class='ctx'> 		err = fbnic_alloc_tx_qt_resources(fbn, &amp;nv-&gt;qt[i]);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto free_resources;</div><div class='add'>+			goto free_qt_resources;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate Rx Resources */</div><div class='ctx'> 	for (j = 0; j &lt; nv-&gt;rxt_count; j++, i++) {</div><div class='del'>-		err = fbnic_alloc_rx_qt_resources(fbn, &amp;nv-&gt;qt[i]);</div><div class='add'>+		err = fbnic_alloc_rx_qt_resources(fbn, nv, &amp;nv-&gt;qt[i]);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto free_resources;</div><div class='add'>+			goto free_qt_resources;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-free_resources:</div><div class='add'>+free_qt_resources:</div><div class='ctx'> 	while (i--)</div><div class='ctx'> 		fbnic_free_qt_resources(fbn, &amp;nv-&gt;qt[i]);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1612,19 +2086,18 @@ free_resources:</div><div class='ctx'> </div><div class='ctx'> void fbnic_free_resources(struct fbnic_net *fbn)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_napi_vector *nv;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(nv, &amp;fbn-&gt;napis, napis)</div><div class='del'>-		fbnic_free_nv_resources(fbn, nv);</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++)</div><div class='add'>+		fbnic_free_nv_resources(fbn, fbn-&gt;napi[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int fbnic_alloc_resources(struct fbnic_net *fbn)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_napi_vector *nv;</div><div class='del'>-	int err = -ENODEV;</div><div class='add'>+	int i, err = -ENODEV;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(nv, &amp;fbn-&gt;napis, napis) {</div><div class='del'>-		err = fbnic_alloc_nv_resources(fbn, nv);</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++) {</div><div class='add'>+		err = fbnic_alloc_nv_resources(fbn, fbn-&gt;napi[i]);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto free_resources;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1632,12 +2105,77 @@ int fbnic_alloc_resources(struct fbnic_net *fbn)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> free_resources:</div><div class='del'>-	list_for_each_entry_continue_reverse(nv, &amp;fbn-&gt;napis, napis)</div><div class='del'>-		fbnic_free_nv_resources(fbn, nv);</div><div class='add'>+	while (i--)</div><div class='add'>+		fbnic_free_nv_resources(fbn, fbn-&gt;napi[i]);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void fbnic_set_netif_napi(struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	/* Associate Tx queue with NAPI */</div><div class='add'>+	for (i = 0; i &lt; nv-&gt;txt_count; i++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+</div><div class='add'>+		netif_queue_set_napi(nv-&gt;napi.dev, qt-&gt;sub0.q_idx,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_TX, &amp;nv-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Associate Rx queue with NAPI */</div><div class='add'>+	for (j = 0; j &lt; nv-&gt;rxt_count; j++, i++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+</div><div class='add'>+		netif_queue_set_napi(nv-&gt;napi.dev, qt-&gt;cmpl.q_idx,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_RX, &amp;nv-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_reset_netif_napi(struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	/* Disassociate Tx queue from NAPI */</div><div class='add'>+	for (i = 0; i &lt; nv-&gt;txt_count; i++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+</div><div class='add'>+		netif_queue_set_napi(nv-&gt;napi.dev, qt-&gt;sub0.q_idx,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disassociate Rx queue from NAPI */</div><div class='add'>+	for (j = 0; j &lt; nv-&gt;rxt_count; j++, i++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+</div><div class='add'>+		netif_queue_set_napi(nv-&gt;napi.dev, qt-&gt;cmpl.q_idx,</div><div class='add'>+				     NETDEV_QUEUE_TYPE_RX, NULL);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int fbnic_set_netif_queues(struct fbnic_net *fbn)</div><div class='add'>+{</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	err = netif_set_real_num_queues(fbn-&gt;netdev, fbn-&gt;num_tx_queues,</div><div class='add'>+					fbn-&gt;num_rx_queues);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++)</div><div class='add'>+		fbnic_set_netif_napi(fbn-&gt;napi[i]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_reset_netif_queues(struct fbnic_net *fbn)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++)</div><div class='add'>+		fbnic_reset_netif_napi(fbn-&gt;napi[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fbnic_disable_twq0(struct fbnic_ring *txr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 twq_ctl = fbnic_ring_rd32(txr, FBNIC_QUEUE_TWQ0_CTL);</div><div class='hunk'>@@ -1647,6 +2185,15 @@ static void fbnic_disable_twq0(struct fbnic_ring *txr)</div><div class='ctx'> 	fbnic_ring_wr32(txr, FBNIC_QUEUE_TWQ0_CTL, twq_ctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void fbnic_disable_twq1(struct fbnic_ring *txr)</div><div class='add'>+{</div><div class='add'>+	u32 twq_ctl = fbnic_ring_rd32(txr, FBNIC_QUEUE_TWQ1_CTL);</div><div class='add'>+</div><div class='add'>+	twq_ctl &amp;= ~FBNIC_QUEUE_TWQ_CTL_ENABLE;</div><div class='add'>+</div><div class='add'>+	fbnic_ring_wr32(txr, FBNIC_QUEUE_TWQ1_CTL, twq_ctl);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fbnic_disable_tcq(struct fbnic_ring *txr)</div><div class='ctx'> {</div><div class='ctx'> 	fbnic_ring_wr32(txr, FBNIC_QUEUE_TCQ_CTL, 0);</div><div class='hunk'>@@ -1670,38 +2217,51 @@ static void fbnic_disable_rcq(struct fbnic_ring *rxr)</div><div class='ctx'> </div><div class='ctx'> void fbnic_napi_disable(struct fbnic_net *fbn)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_napi_vector *nv;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(nv, &amp;fbn-&gt;napis, napis) {</div><div class='del'>-		napi_disable(&amp;nv-&gt;napi);</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++) {</div><div class='add'>+		napi_disable_locked(&amp;fbn-&gt;napi[i]-&gt;napi);</div><div class='ctx'> </div><div class='del'>-		fbnic_nv_irq_disable(nv);</div><div class='add'>+		fbnic_nv_irq_disable(fbn-&gt;napi[i]);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void fbnic_disable(struct fbnic_net *fbn)</div><div class='add'>+static void __fbnic_nv_disable(struct fbnic_napi_vector *nv)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='del'>-	struct fbnic_napi_vector *nv;</div><div class='del'>-	int i, j;</div><div class='add'>+	int i, t;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(nv, &amp;fbn-&gt;napis, napis) {</div><div class='del'>-		/* Disable Tx queue triads */</div><div class='del'>-		for (i = 0; i &lt; nv-&gt;txt_count; i++) {</div><div class='del'>-			struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+	/* Disable Tx queue triads */</div><div class='add'>+	for (t = 0; t &lt; nv-&gt;txt_count; t++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[t];</div><div class='ctx'> </div><div class='del'>-			fbnic_disable_twq0(&amp;qt-&gt;sub0);</div><div class='del'>-			fbnic_disable_tcq(&amp;qt-&gt;cmpl);</div><div class='del'>-		}</div><div class='add'>+		fbnic_disable_twq0(&amp;qt-&gt;sub0);</div><div class='add'>+		fbnic_disable_twq1(&amp;qt-&gt;sub1);</div><div class='add'>+		fbnic_disable_tcq(&amp;qt-&gt;cmpl);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* Disable Rx queue triads */</div><div class='del'>-		for (j = 0; j &lt; nv-&gt;rxt_count; j++, i++) {</div><div class='del'>-			struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+	/* Disable Rx queue triads */</div><div class='add'>+	for (i = 0; i &lt; nv-&gt;rxt_count; i++, t++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[t];</div><div class='ctx'> </div><div class='del'>-			fbnic_disable_bdq(&amp;qt-&gt;sub0, &amp;qt-&gt;sub1);</div><div class='del'>-			fbnic_disable_rcq(&amp;qt-&gt;cmpl);</div><div class='del'>-		}</div><div class='add'>+		fbnic_disable_bdq(&amp;qt-&gt;sub0, &amp;qt-&gt;sub1);</div><div class='add'>+		fbnic_disable_rcq(&amp;qt-&gt;cmpl);</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+fbnic_nv_disable(struct fbnic_net *fbn, struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	__fbnic_nv_disable(nv);</div><div class='add'>+	fbnic_wrfl(fbn-&gt;fbd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_disable(struct fbnic_net *fbn)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++)</div><div class='add'>+		__fbnic_nv_disable(fbn-&gt;napi[i]);</div><div class='ctx'> </div><div class='ctx'> 	fbnic_wrfl(fbd);</div><div class='ctx'> }</div><div class='hunk'>@@ -1790,94 +2350,117 @@ int fbnic_wait_all_queues_idle(struct fbnic_dev *fbd, bool may_fail)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void fbnic_flush(struct fbnic_net *fbn)</div><div class='add'>+static int</div><div class='add'>+fbnic_wait_queue_idle(struct fbnic_net *fbn, bool rx, unsigned int idx)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_napi_vector *nv;</div><div class='add'>+	static const unsigned int tx_regs[] = {</div><div class='add'>+		FBNIC_QM_TWQ_IDLE(0), FBNIC_QM_TQS_IDLE(0),</div><div class='add'>+		FBNIC_QM_TDE_IDLE(0), FBNIC_QM_TCQ_IDLE(0),</div><div class='add'>+	}, rx_regs[] = {</div><div class='add'>+		FBNIC_QM_HPQ_IDLE(0), FBNIC_QM_PPQ_IDLE(0),</div><div class='add'>+		FBNIC_QM_RCQ_IDLE(0),</div><div class='add'>+	};</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	unsigned int val, mask, off;</div><div class='add'>+	const unsigned int *regs;</div><div class='add'>+	unsigned int reg_cnt;</div><div class='add'>+	int i, err;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(nv, &amp;fbn-&gt;napis, napis) {</div><div class='del'>-		int i, j;</div><div class='add'>+	regs = rx ? rx_regs : tx_regs;</div><div class='add'>+	reg_cnt = rx ? ARRAY_SIZE(rx_regs) : ARRAY_SIZE(tx_regs);</div><div class='ctx'> </div><div class='del'>-		/* Flush any processed Tx Queue Triads and drop the rest */</div><div class='del'>-		for (i = 0; i &lt; nv-&gt;txt_count; i++) {</div><div class='del'>-			struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='del'>-			struct netdev_queue *tx_queue;</div><div class='add'>+	off = idx / 32;</div><div class='add'>+	mask = BIT(idx % 32);</div><div class='ctx'> </div><div class='del'>-			/* Clean the work queues of unprocessed work */</div><div class='del'>-			fbnic_clean_twq0(nv, 0, &amp;qt-&gt;sub0, true, qt-&gt;sub0.tail);</div><div class='add'>+	for (i = 0; i &lt; reg_cnt; i++) {</div><div class='add'>+		err = read_poll_timeout_atomic(fbnic_rd32, val, val &amp; mask,</div><div class='add'>+					       2, 500000, false,</div><div class='add'>+					       fbd, regs[i] + off);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(fbd-&gt;netdev,</div><div class='add'>+				   "wait for queue %s%d idle failed 0x%04x(%d): %08x (mask: %08x)\n",</div><div class='add'>+				   rx ? "Rx" : "Tx", idx, regs[i] + off, i,</div><div class='add'>+				   val, mask);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-			/* Reset completion queue descriptor ring */</div><div class='del'>-			memset(qt-&gt;cmpl.desc, 0, qt-&gt;cmpl.size);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			/* Nothing else to do if Tx queue is disabled */</div><div class='del'>-			if (qt-&gt;sub0.flags &amp; FBNIC_RING_F_DISABLED)</div><div class='del'>-				continue;</div><div class='add'>+static void fbnic_nv_flush(struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	int j, t;</div><div class='ctx'> </div><div class='del'>-			/* Reset BQL associated with Tx queue */</div><div class='del'>-			tx_queue = netdev_get_tx_queue(nv-&gt;napi.dev,</div><div class='del'>-						       qt-&gt;sub0.q_idx);</div><div class='del'>-			netdev_tx_reset_queue(tx_queue);</div><div class='add'>+	/* Flush any processed Tx Queue Triads and drop the rest */</div><div class='add'>+	for (t = 0; t &lt; nv-&gt;txt_count; t++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[t];</div><div class='add'>+		struct netdev_queue *tx_queue;</div><div class='ctx'> </div><div class='del'>-			/* Disassociate Tx queue from NAPI */</div><div class='del'>-			netif_queue_set_napi(nv-&gt;napi.dev, qt-&gt;sub0.q_idx,</div><div class='del'>-					     NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='del'>-		}</div><div class='add'>+		/* Clean the work queues of unprocessed work */</div><div class='add'>+		fbnic_clean_twq0(nv, 0, &amp;qt-&gt;sub0, true, qt-&gt;sub0.tail);</div><div class='add'>+		fbnic_clean_twq1(nv, false, &amp;qt-&gt;sub1, true,</div><div class='add'>+				 qt-&gt;sub1.tail);</div><div class='ctx'> </div><div class='del'>-		/* Flush any processed Rx Queue Triads and drop the rest */</div><div class='del'>-		for (j = 0; j &lt; nv-&gt;rxt_count; j++, i++) {</div><div class='del'>-			struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+		/* Reset completion queue descriptor ring */</div><div class='add'>+		memset(qt-&gt;cmpl.desc, 0, qt-&gt;cmpl.size);</div><div class='ctx'> </div><div class='del'>-			/* Clean the work queues of unprocessed work */</div><div class='del'>-			fbnic_clean_bdq(nv, 0, &amp;qt-&gt;sub0, qt-&gt;sub0.tail);</div><div class='del'>-			fbnic_clean_bdq(nv, 0, &amp;qt-&gt;sub1, qt-&gt;sub1.tail);</div><div class='add'>+		/* Nothing else to do if Tx queue is disabled */</div><div class='add'>+		if (qt-&gt;sub0.flags &amp; FBNIC_RING_F_DISABLED)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Reset BQL associated with Tx queue */</div><div class='add'>+		tx_queue = netdev_get_tx_queue(nv-&gt;napi.dev,</div><div class='add'>+					       qt-&gt;sub0.q_idx);</div><div class='add'>+		netdev_tx_reset_queue(tx_queue);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-			/* Reset completion queue descriptor ring */</div><div class='del'>-			memset(qt-&gt;cmpl.desc, 0, qt-&gt;cmpl.size);</div><div class='add'>+	/* Flush any processed Rx Queue Triads and drop the rest */</div><div class='add'>+	for (j = 0; j &lt; nv-&gt;rxt_count; j++, t++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[t];</div><div class='ctx'> </div><div class='del'>-			fbnic_put_pkt_buff(nv, qt-&gt;cmpl.pkt, 0);</div><div class='del'>-			qt-&gt;cmpl.pkt-&gt;buff.data_hard_start = NULL;</div><div class='add'>+		/* Clean the work queues of unprocessed work */</div><div class='add'>+		fbnic_clean_bdq(&amp;qt-&gt;sub0, qt-&gt;sub0.tail, 0);</div><div class='add'>+		fbnic_clean_bdq(&amp;qt-&gt;sub1, qt-&gt;sub1.tail, 0);</div><div class='ctx'> </div><div class='del'>-			/* Disassociate Rx queue from NAPI */</div><div class='del'>-			netif_queue_set_napi(nv-&gt;napi.dev, qt-&gt;cmpl.q_idx,</div><div class='del'>-					     NETDEV_QUEUE_TYPE_RX, NULL);</div><div class='del'>-		}</div><div class='add'>+		/* Reset completion queue descriptor ring */</div><div class='add'>+		memset(qt-&gt;cmpl.desc, 0, qt-&gt;cmpl.size);</div><div class='add'>+</div><div class='add'>+		fbnic_put_pkt_buff(qt, qt-&gt;cmpl.pkt, 0);</div><div class='add'>+		memset(qt-&gt;cmpl.pkt, 0, sizeof(struct fbnic_pkt_buff));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void fbnic_fill(struct fbnic_net *fbn)</div><div class='add'>+void fbnic_flush(struct fbnic_net *fbn)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_napi_vector *nv;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(nv, &amp;fbn-&gt;napis, napis) {</div><div class='del'>-		int i, j;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-		/* Configure NAPI mapping for Tx */</div><div class='del'>-		for (i = 0; i &lt; nv-&gt;txt_count; i++) {</div><div class='del'>-			struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++)</div><div class='add'>+		fbnic_nv_flush(fbn-&gt;napi[i]);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			/* Nothing to do if Tx queue is disabled */</div><div class='del'>-			if (qt-&gt;sub0.flags &amp; FBNIC_RING_F_DISABLED)</div><div class='del'>-				continue;</div><div class='add'>+static void fbnic_nv_fill(struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	int j, t;</div><div class='ctx'> </div><div class='del'>-			/* Associate Tx queue with NAPI */</div><div class='del'>-			netif_queue_set_napi(nv-&gt;napi.dev, qt-&gt;sub0.q_idx,</div><div class='del'>-					     NETDEV_QUEUE_TYPE_TX, &amp;nv-&gt;napi);</div><div class='del'>-		}</div><div class='add'>+	/* Configure NAPI mapping and populate pages</div><div class='add'>+	 * in the BDQ rings to use for Rx</div><div class='add'>+	 */</div><div class='add'>+	for (j = 0, t = nv-&gt;txt_count; j &lt; nv-&gt;rxt_count; j++, t++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[t];</div><div class='ctx'> </div><div class='del'>-		/* Configure NAPI mapping and populate pages</div><div class='del'>-		 * in the BDQ rings to use for Rx</div><div class='del'>-		 */</div><div class='del'>-		for (j = 0; j &lt; nv-&gt;rxt_count; j++, i++) {</div><div class='del'>-			struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+		/* Populate the header and payload BDQs */</div><div class='add'>+		fbnic_fill_bdq(&amp;qt-&gt;sub0);</div><div class='add'>+		fbnic_fill_bdq(&amp;qt-&gt;sub1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			/* Associate Rx queue with NAPI */</div><div class='del'>-			netif_queue_set_napi(nv-&gt;napi.dev, qt-&gt;cmpl.q_idx,</div><div class='del'>-					     NETDEV_QUEUE_TYPE_RX, &amp;nv-&gt;napi);</div><div class='add'>+void fbnic_fill(struct fbnic_net *fbn)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-			/* Populate the header and payload BDQs */</div><div class='del'>-			fbnic_fill_bdq(nv, &amp;qt-&gt;sub0);</div><div class='del'>-			fbnic_fill_bdq(nv, &amp;qt-&gt;sub1);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++)</div><div class='add'>+		fbnic_nv_fill(fbn-&gt;napi[i]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_enable_twq0(struct fbnic_ring *twq)</div><div class='hunk'>@@ -1902,6 +2485,28 @@ static void fbnic_enable_twq0(struct fbnic_ring *twq)</div><div class='ctx'> 	fbnic_ring_wr32(twq, FBNIC_QUEUE_TWQ0_CTL, FBNIC_QUEUE_TWQ_CTL_ENABLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void fbnic_enable_twq1(struct fbnic_ring *twq)</div><div class='add'>+{</div><div class='add'>+	u32 log_size = fls(twq-&gt;size_mask);</div><div class='add'>+</div><div class='add'>+	if (!twq-&gt;size_mask)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Reset head/tail */</div><div class='add'>+	fbnic_ring_wr32(twq, FBNIC_QUEUE_TWQ1_CTL, FBNIC_QUEUE_TWQ_CTL_RESET);</div><div class='add'>+	twq-&gt;tail = 0;</div><div class='add'>+	twq-&gt;head = 0;</div><div class='add'>+</div><div class='add'>+	/* Store descriptor ring address and size */</div><div class='add'>+	fbnic_ring_wr32(twq, FBNIC_QUEUE_TWQ1_BAL, lower_32_bits(twq-&gt;dma));</div><div class='add'>+	fbnic_ring_wr32(twq, FBNIC_QUEUE_TWQ1_BAH, upper_32_bits(twq-&gt;dma));</div><div class='add'>+</div><div class='add'>+	/* Write lower 4 bits of log size as 64K ring size is 0 */</div><div class='add'>+	fbnic_ring_wr32(twq, FBNIC_QUEUE_TWQ1_SIZE, log_size &amp; 0xf);</div><div class='add'>+</div><div class='add'>+	fbnic_ring_wr32(twq, FBNIC_QUEUE_TWQ1_CTL, FBNIC_QUEUE_TWQ_CTL_ENABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fbnic_enable_tcq(struct fbnic_napi_vector *nv,</div><div class='ctx'> 			     struct fbnic_ring *tcq)</div><div class='ctx'> {</div><div class='hunk'>@@ -1970,11 +2575,15 @@ write_ctl:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void fbnic_config_drop_mode_rcq(struct fbnic_napi_vector *nv,</div><div class='del'>-				       struct fbnic_ring *rcq)</div><div class='add'>+				       struct fbnic_ring *rcq, bool tx_pause)</div><div class='ctx'> {</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(nv-&gt;napi.dev);</div><div class='ctx'> 	u32 drop_mode, rcq_ctl;</div><div class='ctx'> </div><div class='del'>-	drop_mode = FBNIC_QUEUE_RDE_CTL0_DROP_IMMEDIATE;</div><div class='add'>+	if (!tx_pause &amp;&amp; fbn-&gt;num_rx_queues &gt; 1)</div><div class='add'>+		drop_mode = FBNIC_QUEUE_RDE_CTL0_DROP_IMMEDIATE;</div><div class='add'>+	else</div><div class='add'>+		drop_mode = FBNIC_QUEUE_RDE_CTL0_DROP_NEVER;</div><div class='ctx'> </div><div class='ctx'> 	/* Specify packet layout */</div><div class='ctx'> 	rcq_ctl = FIELD_PREP(FBNIC_QUEUE_RDE_CTL0_DROP_MODE_MASK, drop_mode) |</div><div class='hunk'>@@ -1984,17 +2593,83 @@ static void fbnic_config_drop_mode_rcq(struct fbnic_napi_vector *nv,</div><div class='ctx'> 	fbnic_ring_wr32(rcq, FBNIC_QUEUE_RDE_CTL0, rcq_ctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void fbnic_config_drop_mode(struct fbnic_net *fbn, bool tx_pause)</div><div class='add'>+{</div><div class='add'>+	int i, t;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++) {</div><div class='add'>+		struct fbnic_napi_vector *nv = fbn-&gt;napi[i];</div><div class='add'>+</div><div class='add'>+		for (t = 0; t &lt; nv-&gt;rxt_count; t++) {</div><div class='add'>+			struct fbnic_q_triad *qt = &amp;nv-&gt;qt[nv-&gt;txt_count + t];</div><div class='add'>+</div><div class='add'>+			fbnic_config_drop_mode_rcq(nv, &amp;qt-&gt;cmpl, tx_pause);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_config_rim_threshold(struct fbnic_ring *rcq, u16 nv_idx, u32 rx_desc)</div><div class='add'>+{</div><div class='add'>+	u32 threshold;</div><div class='add'>+</div><div class='add'>+	/* Set the threhsold to half the ring size if rx_frames</div><div class='add'>+	 * is not configured</div><div class='add'>+	 */</div><div class='add'>+	threshold = rx_desc ? : rcq-&gt;size_mask / 2;</div><div class='add'>+</div><div class='add'>+	fbnic_ring_wr32(rcq, FBNIC_QUEUE_RIM_CTL, nv_idx);</div><div class='add'>+	fbnic_ring_wr32(rcq, FBNIC_QUEUE_RIM_THRESHOLD, threshold);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_config_txrx_usecs(struct fbnic_napi_vector *nv, u32 arm)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(nv-&gt;napi.dev);</div><div class='add'>+	struct fbnic_dev *fbd = nv-&gt;fbd;</div><div class='add'>+	u32 val = arm;</div><div class='add'>+</div><div class='add'>+	val |= FIELD_PREP(FBNIC_INTR_CQ_REARM_RCQ_TIMEOUT, fbn-&gt;rx_usecs) |</div><div class='add'>+	       FBNIC_INTR_CQ_REARM_RCQ_TIMEOUT_UPD_EN;</div><div class='add'>+	val |= FIELD_PREP(FBNIC_INTR_CQ_REARM_TCQ_TIMEOUT, fbn-&gt;tx_usecs) |</div><div class='add'>+	       FBNIC_INTR_CQ_REARM_TCQ_TIMEOUT_UPD_EN;</div><div class='add'>+</div><div class='add'>+	fbnic_wr32(fbd, FBNIC_INTR_CQ_REARM(nv-&gt;v_idx), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void fbnic_config_rx_frames(struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(nv-&gt;napi.dev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = nv-&gt;txt_count; i &lt; nv-&gt;rxt_count + nv-&gt;txt_count; i++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+</div><div class='add'>+		fbnic_config_rim_threshold(&amp;qt-&gt;cmpl, nv-&gt;v_idx,</div><div class='add'>+					   fbn-&gt;rx_max_frames *</div><div class='add'>+					   FBNIC_MIN_RXD_PER_FRAME);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void fbnic_enable_rcq(struct fbnic_napi_vector *nv,</div><div class='ctx'> 			     struct fbnic_ring *rcq)</div><div class='ctx'> {</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(nv-&gt;napi.dev);</div><div class='ctx'> 	u32 log_size = fls(rcq-&gt;size_mask);</div><div class='del'>-	u32 rcq_ctl;</div><div class='add'>+	u32 hds_thresh = fbn-&gt;hds_thresh;</div><div class='add'>+	u32 rcq_ctl = 0;</div><div class='add'>+</div><div class='add'>+	fbnic_config_drop_mode_rcq(nv, rcq, fbn-&gt;tx_pause);</div><div class='ctx'> </div><div class='del'>-	fbnic_config_drop_mode_rcq(nv, rcq);</div><div class='add'>+	/* Force lower bound on MAX_HEADER_BYTES. Below this, all frames should</div><div class='add'>+	 * be split at L4. It would also result in the frames being split at</div><div class='add'>+	 * L2/L3 depending on the frame size.</div><div class='add'>+	 */</div><div class='add'>+	if (fbn-&gt;hds_thresh &lt; FBNIC_HDR_BYTES_MIN) {</div><div class='add'>+		rcq_ctl = FBNIC_QUEUE_RDE_CTL0_EN_HDR_SPLIT;</div><div class='add'>+		hds_thresh = FBNIC_HDR_BYTES_MIN;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	rcq_ctl = FIELD_PREP(FBNIC_QUEUE_RDE_CTL1_PADLEN_MASK, FBNIC_RX_PAD) |</div><div class='del'>-		   FIELD_PREP(FBNIC_QUEUE_RDE_CTL1_MAX_HDR_MASK,</div><div class='del'>-			      FBNIC_RX_MAX_HDR) |</div><div class='add'>+	rcq_ctl |= FIELD_PREP(FBNIC_QUEUE_RDE_CTL1_PADLEN_MASK, FBNIC_RX_PAD) |</div><div class='add'>+		   FIELD_PREP(FBNIC_QUEUE_RDE_CTL1_MAX_HDR_MASK, hds_thresh) |</div><div class='ctx'> 		   FIELD_PREP(FBNIC_QUEUE_RDE_CTL1_PAYLD_OFF_MASK,</div><div class='ctx'> 			      FBNIC_RX_PAYLD_OFFSET) |</div><div class='ctx'> 		   FIELD_PREP(FBNIC_QUEUE_RDE_CTL1_PAYLD_PG_CL_MASK,</div><div class='hunk'>@@ -2014,61 +2689,73 @@ static void fbnic_enable_rcq(struct fbnic_napi_vector *nv,</div><div class='ctx'> 	fbnic_ring_wr32(rcq, FBNIC_QUEUE_RCQ_SIZE, log_size &amp; 0xf);</div><div class='ctx'> </div><div class='ctx'> 	/* Store interrupt information for the completion queue */</div><div class='del'>-	fbnic_ring_wr32(rcq, FBNIC_QUEUE_RIM_CTL, nv-&gt;v_idx);</div><div class='del'>-	fbnic_ring_wr32(rcq, FBNIC_QUEUE_RIM_THRESHOLD, rcq-&gt;size_mask / 2);</div><div class='add'>+	fbnic_config_rim_threshold(rcq, nv-&gt;v_idx, fbn-&gt;rx_max_frames *</div><div class='add'>+						   FBNIC_MIN_RXD_PER_FRAME);</div><div class='ctx'> 	fbnic_ring_wr32(rcq, FBNIC_QUEUE_RIM_MASK, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable queue */</div><div class='ctx'> 	fbnic_ring_wr32(rcq, FBNIC_QUEUE_RCQ_CTL, FBNIC_QUEUE_RCQ_CTL_ENABLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void fbnic_enable(struct fbnic_net *fbn)</div><div class='add'>+static void __fbnic_nv_enable(struct fbnic_napi_vector *nv)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='del'>-	struct fbnic_napi_vector *nv;</div><div class='del'>-	int i, j;</div><div class='add'>+	int j, t;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(nv, &amp;fbn-&gt;napis, napis) {</div><div class='del'>-		/* Setup Tx Queue Triads */</div><div class='del'>-		for (i = 0; i &lt; nv-&gt;txt_count; i++) {</div><div class='del'>-			struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+	/* Setup Tx Queue Triads */</div><div class='add'>+	for (t = 0; t &lt; nv-&gt;txt_count; t++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[t];</div><div class='ctx'> </div><div class='del'>-			fbnic_enable_twq0(&amp;qt-&gt;sub0);</div><div class='del'>-			fbnic_enable_tcq(nv, &amp;qt-&gt;cmpl);</div><div class='del'>-		}</div><div class='add'>+		fbnic_enable_twq0(&amp;qt-&gt;sub0);</div><div class='add'>+		fbnic_enable_twq1(&amp;qt-&gt;sub1);</div><div class='add'>+		fbnic_enable_tcq(nv, &amp;qt-&gt;cmpl);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* Setup Rx Queue Triads */</div><div class='del'>-		for (j = 0; j &lt; nv-&gt;rxt_count; j++, i++) {</div><div class='del'>-			struct fbnic_q_triad *qt = &amp;nv-&gt;qt[i];</div><div class='add'>+	/* Setup Rx Queue Triads */</div><div class='add'>+	for (j = 0; j &lt; nv-&gt;rxt_count; j++, t++) {</div><div class='add'>+		struct fbnic_q_triad *qt = &amp;nv-&gt;qt[t];</div><div class='ctx'> </div><div class='del'>-			fbnic_enable_bdq(&amp;qt-&gt;sub0, &amp;qt-&gt;sub1);</div><div class='del'>-			fbnic_config_drop_mode_rcq(nv, &amp;qt-&gt;cmpl);</div><div class='del'>-			fbnic_enable_rcq(nv, &amp;qt-&gt;cmpl);</div><div class='del'>-		}</div><div class='add'>+		page_pool_enable_direct_recycling(qt-&gt;sub0.page_pool,</div><div class='add'>+						  &amp;nv-&gt;napi);</div><div class='add'>+		page_pool_enable_direct_recycling(qt-&gt;sub1.page_pool,</div><div class='add'>+						  &amp;nv-&gt;napi);</div><div class='add'>+</div><div class='add'>+		fbnic_enable_bdq(&amp;qt-&gt;sub0, &amp;qt-&gt;sub1);</div><div class='add'>+		fbnic_enable_rcq(nv, &amp;qt-&gt;cmpl);</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	fbnic_wrfl(fbd);</div><div class='add'>+static void fbnic_nv_enable(struct fbnic_net *fbn, struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	__fbnic_nv_enable(nv);</div><div class='add'>+	fbnic_wrfl(fbn-&gt;fbd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void fbnic_nv_irq_enable(struct fbnic_napi_vector *nv)</div><div class='add'>+void fbnic_enable(struct fbnic_net *fbn)</div><div class='ctx'> {</div><div class='del'>-	struct fbnic_dev *fbd = nv-&gt;fbd;</div><div class='del'>-	u32 val;</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	val = FBNIC_INTR_CQ_REARM_INTR_UNMASK;</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++)</div><div class='add'>+		__fbnic_nv_enable(fbn-&gt;napi[i]);</div><div class='ctx'> </div><div class='del'>-	fbnic_wr32(fbd, FBNIC_INTR_CQ_REARM(nv-&gt;v_idx), val);</div><div class='add'>+	fbnic_wrfl(fbd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_nv_irq_enable(struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	fbnic_config_txrx_usecs(nv, FBNIC_INTR_CQ_REARM_INTR_UNMASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void fbnic_napi_enable(struct fbnic_net *fbn)</div><div class='ctx'> {</div><div class='ctx'> 	u32 irqs[FBNIC_MAX_MSIX_VECS / 32] = {};</div><div class='ctx'> 	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='del'>-	struct fbnic_napi_vector *nv;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(nv, &amp;fbn-&gt;napis, napis) {</div><div class='del'>-		napi_enable(&amp;nv-&gt;napi);</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++) {</div><div class='add'>+		struct fbnic_napi_vector *nv = fbn-&gt;napi[i];</div><div class='add'>+</div><div class='add'>+		napi_enable_locked(&amp;nv-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 		fbnic_nv_irq_enable(nv);</div><div class='ctx'> </div><div class='hunk'>@@ -2096,17 +2783,18 @@ void fbnic_napi_depletion_check(struct net_device *netdev)</div><div class='ctx'> 	struct fbnic_net *fbn = netdev_priv(netdev);</div><div class='ctx'> 	u32 irqs[FBNIC_MAX_MSIX_VECS / 32] = {};</div><div class='ctx'> 	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='del'>-	struct fbnic_napi_vector *nv;</div><div class='del'>-	int i, j;</div><div class='add'>+	int i, j, t;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fbn-&gt;num_napi; i++) {</div><div class='add'>+		struct fbnic_napi_vector *nv = fbn-&gt;napi[i];</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(nv, &amp;fbn-&gt;napis, napis) {</div><div class='ctx'> 		/* Find RQs which are completely out of pages */</div><div class='del'>-		for (i = nv-&gt;txt_count, j = 0; j &lt; nv-&gt;rxt_count; j++, i++) {</div><div class='add'>+		for (t = nv-&gt;txt_count, j = 0; j &lt; nv-&gt;rxt_count; j++, t++) {</div><div class='ctx'> 			/* Assume 4 pages is always enough to fit a packet</div><div class='ctx'> 			 * and therefore generate a completion and an IRQ.</div><div class='ctx'> 			 */</div><div class='del'>-			if (fbnic_desc_used(&amp;nv-&gt;qt[i].sub0) &lt; 4 ||</div><div class='del'>-			    fbnic_desc_used(&amp;nv-&gt;qt[i].sub1) &lt; 4)</div><div class='add'>+			if (fbnic_desc_used(&amp;nv-&gt;qt[t].sub0) &lt; 4 ||</div><div class='add'>+			    fbnic_desc_used(&amp;nv-&gt;qt[t].sub1) &lt; 4)</div><div class='ctx'> 				irqs[nv-&gt;v_idx / 32] |= BIT(nv-&gt;v_idx % 32);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2120,3 +2808,123 @@ void fbnic_napi_depletion_check(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	fbnic_wrfl(fbd);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static int fbnic_queue_mem_alloc(struct net_device *dev, void *qmem, int idx)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(dev);</div><div class='add'>+	const struct fbnic_q_triad *real;</div><div class='add'>+	struct fbnic_q_triad *qt = qmem;</div><div class='add'>+	struct fbnic_napi_vector *nv;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(dev))</div><div class='add'>+		return fbnic_alloc_qt_page_pools(fbn, qt, idx);</div><div class='add'>+</div><div class='add'>+	real = container_of(fbn-&gt;rx[idx], struct fbnic_q_triad, cmpl);</div><div class='add'>+	nv = fbn-&gt;napi[idx % fbn-&gt;num_napi];</div><div class='add'>+</div><div class='add'>+	fbnic_ring_init(&amp;qt-&gt;sub0, real-&gt;sub0.doorbell, real-&gt;sub0.q_idx,</div><div class='add'>+			real-&gt;sub0.flags);</div><div class='add'>+	fbnic_ring_init(&amp;qt-&gt;sub1, real-&gt;sub1.doorbell, real-&gt;sub1.q_idx,</div><div class='add'>+			real-&gt;sub1.flags);</div><div class='add'>+	fbnic_ring_init(&amp;qt-&gt;cmpl, real-&gt;cmpl.doorbell, real-&gt;cmpl.q_idx,</div><div class='add'>+			real-&gt;cmpl.flags);</div><div class='add'>+</div><div class='add'>+	return fbnic_alloc_rx_qt_resources(fbn, nv, qt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void fbnic_queue_mem_free(struct net_device *dev, void *qmem)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(dev);</div><div class='add'>+	struct fbnic_q_triad *qt = qmem;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(dev))</div><div class='add'>+		fbnic_free_qt_page_pools(qt);</div><div class='add'>+	else</div><div class='add'>+		fbnic_free_qt_resources(fbn, qt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __fbnic_nv_restart(struct fbnic_net *fbn,</div><div class='add'>+			       struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_dev *fbd = fbn-&gt;fbd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	fbnic_nv_enable(fbn, nv);</div><div class='add'>+	fbnic_nv_fill(nv);</div><div class='add'>+</div><div class='add'>+	napi_enable_locked(&amp;nv-&gt;napi);</div><div class='add'>+	fbnic_nv_irq_enable(nv);</div><div class='add'>+	fbnic_wr32(fbd, FBNIC_INTR_SET(nv-&gt;v_idx / 32), BIT(nv-&gt;v_idx % 32));</div><div class='add'>+	fbnic_wrfl(fbd);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nv-&gt;txt_count; i++)</div><div class='add'>+		netif_wake_subqueue(fbn-&gt;netdev, nv-&gt;qt[i].sub0.q_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_queue_start(struct net_device *dev, void *qmem, int idx)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(dev);</div><div class='add'>+	struct fbnic_napi_vector *nv;</div><div class='add'>+	struct fbnic_q_triad *real;</div><div class='add'>+</div><div class='add'>+	real = container_of(fbn-&gt;rx[idx], struct fbnic_q_triad, cmpl);</div><div class='add'>+	nv = fbn-&gt;napi[idx % fbn-&gt;num_napi];</div><div class='add'>+</div><div class='add'>+	fbnic_aggregate_ring_bdq_counters(fbn, &amp;real-&gt;sub0);</div><div class='add'>+	fbnic_aggregate_ring_bdq_counters(fbn, &amp;real-&gt;sub1);</div><div class='add'>+	fbnic_aggregate_ring_rx_counters(fbn, &amp;real-&gt;cmpl);</div><div class='add'>+</div><div class='add'>+	memcpy(real, qmem, sizeof(*real));</div><div class='add'>+</div><div class='add'>+	__fbnic_nv_restart(fbn, nv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int fbnic_queue_stop(struct net_device *dev, void *qmem, int idx)</div><div class='add'>+{</div><div class='add'>+	struct fbnic_net *fbn = netdev_priv(dev);</div><div class='add'>+	const struct fbnic_q_triad *real;</div><div class='add'>+	struct fbnic_napi_vector *nv;</div><div class='add'>+	int i, t;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	real = container_of(fbn-&gt;rx[idx], struct fbnic_q_triad, cmpl);</div><div class='add'>+	nv = fbn-&gt;napi[idx % fbn-&gt;num_napi];</div><div class='add'>+</div><div class='add'>+	napi_disable_locked(&amp;nv-&gt;napi);</div><div class='add'>+	fbnic_nv_irq_disable(nv);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nv-&gt;txt_count; i++)</div><div class='add'>+		netif_stop_subqueue(dev, nv-&gt;qt[i].sub0.q_idx);</div><div class='add'>+	fbnic_nv_disable(fbn, nv);</div><div class='add'>+</div><div class='add'>+	for (t = 0; t &lt; nv-&gt;txt_count + nv-&gt;rxt_count; t++) {</div><div class='add'>+		err = fbnic_wait_queue_idle(fbn, t &gt;= nv-&gt;txt_count,</div><div class='add'>+					    nv-&gt;qt[t].sub0.q_idx);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_restart;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fbnic_synchronize_irq(fbn-&gt;fbd, nv-&gt;v_idx);</div><div class='add'>+	fbnic_nv_flush(nv);</div><div class='add'>+</div><div class='add'>+	page_pool_disable_direct_recycling(real-&gt;sub0.page_pool);</div><div class='add'>+	page_pool_disable_direct_recycling(real-&gt;sub1.page_pool);</div><div class='add'>+</div><div class='add'>+	memcpy(qmem, real, sizeof(*real));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_restart:</div><div class='add'>+	__fbnic_nv_restart(fbn, nv);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct netdev_queue_mgmt_ops fbnic_queue_mgmt_ops = {</div><div class='add'>+	.ndo_queue_mem_size	= sizeof(struct fbnic_q_triad),</div><div class='add'>+	.ndo_queue_mem_alloc	= fbnic_queue_mem_alloc,</div><div class='add'>+	.ndo_queue_mem_free	= fbnic_queue_mem_free,</div><div class='add'>+	.ndo_queue_start	= fbnic_queue_start,</div><div class='add'>+	.ndo_queue_stop		= fbnic_queue_stop,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/meta/fbnic/fbnic_txrx.h b/drivers/net/ethernet/meta/fbnic/fbnic_txrx.h<br/>index 8d626287c3f4..27776e844e29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_txrx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/meta/fbnic/fbnic_txrx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/meta/fbnic/fbnic_txrx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/meta/fbnic/fbnic_txrx.h</a></div><div class='hunk'>@@ -24,20 +24,37 @@ struct fbnic_net;</div><div class='ctx'> #define FBNIC_TX_DESC_WAKEUP	(FBNIC_MAX_SKB_DESC * 2)</div><div class='ctx'> #define FBNIC_TX_DESC_MIN	roundup_pow_of_two(FBNIC_TX_DESC_WAKEUP)</div><div class='ctx'> </div><div class='add'>+/* To receive the worst case packet we need:</div><div class='add'>+ *	1 descriptor for primary metadata</div><div class='add'>+ *	+ 1 descriptor for optional metadata</div><div class='add'>+ *	+ 1 descriptor for headers</div><div class='add'>+ *	+ 4 descriptors for payload</div><div class='add'>+ */</div><div class='add'>+#define FBNIC_MAX_RX_PKT_DESC	7</div><div class='add'>+#define FBNIC_RX_DESC_MIN	roundup_pow_of_two(FBNIC_MAX_RX_PKT_DESC * 2)</div><div class='add'>+</div><div class='ctx'> #define FBNIC_MAX_TXQS			128u</div><div class='ctx'> #define FBNIC_MAX_RXQS			128u</div><div class='add'>+#define FBNIC_MAX_XDPQS			128u</div><div class='add'>+</div><div class='add'>+/* These apply to TWQs, TCQ, RCQ */</div><div class='add'>+#define FBNIC_QUEUE_SIZE_MIN		16u</div><div class='add'>+#define FBNIC_QUEUE_SIZE_MAX		SZ_64K</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_TXQ_SIZE_DEFAULT		1024</div><div class='ctx'> #define FBNIC_HPQ_SIZE_DEFAULT		256</div><div class='ctx'> #define FBNIC_PPQ_SIZE_DEFAULT		256</div><div class='ctx'> #define FBNIC_RCQ_SIZE_DEFAULT		1024</div><div class='add'>+#define FBNIC_TX_USECS_DEFAULT		35</div><div class='add'>+#define FBNIC_RX_USECS_DEFAULT		30</div><div class='add'>+#define FBNIC_RX_FRAMES_DEFAULT		0</div><div class='ctx'> </div><div class='ctx'> #define FBNIC_RX_TROOM \</div><div class='ctx'> 	SKB_DATA_ALIGN(sizeof(struct skb_shared_info))</div><div class='add'>+#define FBNIC_RX_HROOM_PAD		128</div><div class='ctx'> #define FBNIC_RX_HROOM \</div><div class='del'>-	(ALIGN(FBNIC_RX_TROOM + NET_SKB_PAD, 128) - FBNIC_RX_TROOM)</div><div class='add'>+	(ALIGN(FBNIC_RX_TROOM + FBNIC_RX_HROOM_PAD, 128) - FBNIC_RX_TROOM)</div><div class='ctx'> #define FBNIC_RX_PAD			0</div><div class='del'>-#define FBNIC_RX_MAX_HDR		(1536 - FBNIC_RX_PAD)</div><div class='ctx'> #define FBNIC_RX_PAYLD_OFFSET		0</div><div class='ctx'> #define FBNIC_RX_PAYLD_PG_CL		0</div><div class='ctx'> </div><div class='hunk'>@@ -45,29 +62,48 @@ struct fbnic_net;</div><div class='ctx'> #define FBNIC_RING_F_CTX		BIT(1)</div><div class='ctx'> #define FBNIC_RING_F_STATS		BIT(2)	/* Ring's stats may be used */</div><div class='ctx'> </div><div class='add'>+#define FBNIC_HDS_THRESH_MAX \</div><div class='add'>+	(4096 - FBNIC_RX_HROOM - FBNIC_RX_TROOM - FBNIC_RX_PAD)</div><div class='add'>+#define FBNIC_HDS_THRESH_DEFAULT \</div><div class='add'>+	(1536 - FBNIC_RX_PAD)</div><div class='add'>+#define FBNIC_HDR_BYTES_MIN		128</div><div class='add'>+</div><div class='ctx'> struct fbnic_pkt_buff {</div><div class='ctx'> 	struct xdp_buff buff;</div><div class='ctx'> 	ktime_t hwtstamp;</div><div class='del'>-	u32 data_truesize;</div><div class='del'>-	u16 data_len;</div><div class='del'>-	u16 nr_frags;</div><div class='add'>+	bool add_frag_failed;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct fbnic_queue_stats {</div><div class='ctx'> 	u64 packets;</div><div class='ctx'> 	u64 bytes;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u64 csum_partial;</div><div class='add'>+			u64 lso;</div><div class='add'>+			u64 ts_packets;</div><div class='add'>+			u64 ts_lost;</div><div class='add'>+			u64 stop;</div><div class='add'>+			u64 wake;</div><div class='add'>+		} twq;</div><div class='add'>+		struct {</div><div class='add'>+			u64 alloc_failed;</div><div class='add'>+			u64 csum_complete;</div><div class='add'>+			u64 csum_none;</div><div class='add'>+			u64 length_errors;</div><div class='add'>+		} rx;</div><div class='add'>+		struct {</div><div class='add'>+			u64 alloc_failed;</div><div class='add'>+		} bdq;</div><div class='add'>+	};</div><div class='ctx'> 	u64 dropped;</div><div class='del'>-	u64 ts_packets;</div><div class='del'>-	u64 ts_lost;</div><div class='ctx'> 	struct u64_stats_sync syncp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Pagecnt bias is long max to reserve the last bit to catch overflow</div><div class='del'>- * cases where if we overcharge the bias it will flip over to be negative.</div><div class='del'>- */</div><div class='del'>-#define PAGECNT_BIAS_MAX	LONG_MAX</div><div class='add'>+#define FBNIC_PAGECNT_BIAS_MAX	PAGE_SIZE</div><div class='add'>+</div><div class='ctx'> struct fbnic_rx_buf {</div><div class='del'>-	struct page *page;</div><div class='add'>+	netmem_ref netmem;</div><div class='ctx'> 	long pagecnt_bias;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -88,6 +124,17 @@ struct fbnic_ring {</div><div class='ctx'> </div><div class='ctx'> 	u32 head, tail;			/* Head/Tail of ring */</div><div class='ctx'> </div><div class='add'>+	union {</div><div class='add'>+		/* Rx BDQs only */</div><div class='add'>+		struct page_pool *page_pool;</div><div class='add'>+</div><div class='add'>+		/* Deferred_head is used to cache the head for TWQ1 if</div><div class='add'>+		 * an attempt is made to clean TWQ1 with zero napi_budget.</div><div class='add'>+		 * We do not use it for any other ring.</div><div class='add'>+		 */</div><div class='add'>+		s32 deferred_head;</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	struct fbnic_queue_stats stats;</div><div class='ctx'> </div><div class='ctx'> 	/* Slow path fields follow */</div><div class='hunk'>@@ -97,38 +144,47 @@ struct fbnic_ring {</div><div class='ctx'> </div><div class='ctx'> struct fbnic_q_triad {</div><div class='ctx'> 	struct fbnic_ring sub0, sub1, cmpl;</div><div class='add'>+	struct xdp_rxq_info xdp_rxq;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct fbnic_napi_vector {</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	struct device *dev;		/* Device for DMA unmapping */</div><div class='del'>-	struct page_pool *page_pool;</div><div class='ctx'> 	struct fbnic_dev *fbd;</div><div class='del'>-	char name[IFNAMSIZ + 9];</div><div class='ctx'> </div><div class='ctx'> 	u16 v_idx;</div><div class='ctx'> 	u8 txt_count;</div><div class='ctx'> 	u8 rxt_count;</div><div class='ctx'> </div><div class='del'>-	struct list_head napis;</div><div class='del'>-</div><div class='ctx'> 	struct fbnic_q_triad qt[];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define FBNIC_MAX_TXQS			128u</div><div class='del'>-#define FBNIC_MAX_RXQS			128u</div><div class='add'>+extern const struct netdev_queue_mgmt_ops fbnic_queue_mgmt_ops;</div><div class='ctx'> </div><div class='ctx'> netdev_tx_t fbnic_xmit_frame(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> netdev_features_t</div><div class='ctx'> fbnic_features_check(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 		     netdev_features_t features);</div><div class='ctx'> </div><div class='add'>+void fbnic_aggregate_ring_rx_counters(struct fbnic_net *fbn,</div><div class='add'>+				      struct fbnic_ring *rxr);</div><div class='add'>+void fbnic_aggregate_ring_bdq_counters(struct fbnic_net *fbn,</div><div class='add'>+				       struct fbnic_ring *rxr);</div><div class='add'>+void fbnic_aggregate_ring_tx_counters(struct fbnic_net *fbn,</div><div class='add'>+				      struct fbnic_ring *txr);</div><div class='add'>+void fbnic_aggregate_ring_xdp_counters(struct fbnic_net *fbn,</div><div class='add'>+				       struct fbnic_ring *xdpr);</div><div class='add'>+</div><div class='ctx'> int fbnic_alloc_napi_vectors(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_free_napi_vectors(struct fbnic_net *fbn);</div><div class='ctx'> int fbnic_alloc_resources(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_free_resources(struct fbnic_net *fbn);</div><div class='add'>+int fbnic_set_netif_queues(struct fbnic_net *fbn);</div><div class='add'>+void fbnic_reset_netif_queues(struct fbnic_net *fbn);</div><div class='add'>+irqreturn_t fbnic_msix_clean_rings(int irq, void *data);</div><div class='ctx'> void fbnic_napi_enable(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_napi_disable(struct fbnic_net *fbn);</div><div class='add'>+void fbnic_config_drop_mode(struct fbnic_net *fbn, bool tx_pause);</div><div class='ctx'> void fbnic_enable(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_disable(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_flush(struct fbnic_net *fbn);</div><div class='hunk'>@@ -137,4 +193,9 @@ void fbnic_fill(struct fbnic_net *fbn);</div><div class='ctx'> void fbnic_napi_depletion_check(struct net_device *netdev);</div><div class='ctx'> int fbnic_wait_all_queues_idle(struct fbnic_dev *fbd, bool may_fail);</div><div class='ctx'> </div><div class='add'>+static inline int fbnic_napi_idx(const struct fbnic_napi_vector *nv)</div><div class='add'>+{</div><div class='add'>+	return nv-&gt;v_idx - FBNIC_NON_NAPI_VECTORS;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* _FBNIC_TXRX_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/micrel/ks8842.c b/drivers/net/ethernet/micrel/ks8842.c<br/>index c7b0b09c2b09..541c41a9077a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/micrel/ks8842.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/micrel/ks8842.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/micrel/ks8842.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/micrel/ks8842.c</a></div><div class='hunk'>@@ -335,7 +335,7 @@ static void ks8842_reset_hw(struct ks8842_adapter *adapter)</div><div class='ctx'> 		/* When running in DMA Mode the RX interrupt is not enabled in</div><div class='ctx'> 		   timberdale because RX data is received by DMA callbacks</div><div class='ctx'> 		   it must still be enabled in the KS8842 because it indicates</div><div class='del'>-		   to timberdale when there is RX data for it's DMA FIFOs */</div><div class='add'>+		   to timberdale when there is RX data for its DMA FIFOs */</div><div class='ctx'> 		iowrite16(ENABLED_IRQS_DMA_IP, adapter-&gt;hw_addr + REG_TIMB_IER);</div><div class='ctx'> 		ks8842_write16(adapter, 18, ENABLED_IRQS_DMA, REG_IER);</div><div class='ctx'> 	} else {</div><div class='head'>diff --git a/drivers/net/ethernet/micrel/ks8851_spi.c b/drivers/net/ethernet/micrel/ks8851_spi.c<br/>index 3062cc0f9199..c862b13b447a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/micrel/ks8851_spi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/micrel/ks8851_spi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/micrel/ks8851_spi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/micrel/ks8851_spi.c</a></div><div class='hunk'>@@ -20,8 +20,6 @@</div><div class='ctx'> #include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='del'>-#include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ks8851.h"</div><div class='head'>diff --git a/drivers/net/ethernet/micrel/ksz884x.c b/drivers/net/ethernet/micrel/ksz884x.c<br/>index dc1d9f774565..cdde19b8edc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/micrel/ksz884x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/micrel/ksz884x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/micrel/ksz884x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/micrel/ksz884x.c</a></div><div class='hunk'>@@ -3951,7 +3951,7 @@ static void ksz_stop_timer(struct ksz_timer_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	if (info-&gt;max) {</div><div class='ctx'> 		info-&gt;max = 0;</div><div class='del'>-		del_timer_sync(&amp;info-&gt;timer);</div><div class='add'>+		timer_delete_sync(&amp;info-&gt;timer);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6304,7 +6304,8 @@ static void mib_read_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void mib_monitor(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct dev_info *hw_priv = from_timer(hw_priv, t, mib_timer_info.timer);</div><div class='add'>+	struct dev_info *hw_priv = timer_container_of(hw_priv, t,</div><div class='add'>+						      mib_timer_info.timer);</div><div class='ctx'> </div><div class='ctx'> 	mib_read_work(&amp;hw_priv-&gt;mib_read);</div><div class='ctx'> </div><div class='hunk'>@@ -6331,7 +6332,8 @@ static void mib_monitor(struct timer_list *t)</div><div class='ctx'>  */</div><div class='ctx'> static void dev_monitor(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct dev_priv *priv = from_timer(priv, t, monitor_timer_info.timer);</div><div class='add'>+	struct dev_priv *priv = timer_container_of(priv, t,</div><div class='add'>+						   monitor_timer_info.timer);</div><div class='ctx'> 	struct net_device *dev = priv-&gt;mii_if.dev;</div><div class='ctx'> 	struct dev_info *hw_priv = priv-&gt;adapter;</div><div class='ctx'> 	struct ksz_hw *hw = &amp;hw_priv-&gt;hw;</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/Kconfig b/drivers/net/ethernet/microchip/Kconfig<br/>index 73832fb2bc32..ee046468652c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/Kconfig</a></div><div class='hunk'>@@ -59,7 +59,6 @@ config LAN743X</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/ethernet/microchip/lan865x/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/microchip/lan966x/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/microchip/lan969x/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/microchip/sparx5/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/microchip/vcap/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/microchip/fdma/Kconfig"</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/Makefile b/drivers/net/ethernet/microchip/Makefile<br/>index 7770df82200f..3c65baed9fd8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/Makefile</a></div><div class='hunk'>@@ -11,7 +11,6 @@ lan743x-objs := lan743x_main.o lan743x_ethtool.o lan743x_ptp.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_LAN865X) += lan865x/</div><div class='ctx'> obj-$(CONFIG_LAN966X_SWITCH) += lan966x/</div><div class='del'>-obj-$(CONFIG_LAN969X_SWITCH) += lan969x/</div><div class='ctx'> obj-$(CONFIG_SPARX5_SWITCH) += sparx5/</div><div class='ctx'> obj-$(CONFIG_VCAP) += vcap/</div><div class='ctx'> obj-$(CONFIG_FDMA) += fdma/</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan743x_ethtool.c b/drivers/net/ethernet/microchip/lan743x_ethtool.c<br/>index 1a1cbd034eda..40002d9fe274 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan743x_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan743x_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan743x_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan743x_ethtool.c</a></div><div class='hunk'>@@ -18,6 +18,8 @@</div><div class='ctx'> #define EEPROM_MAC_OFFSET		    (0x01)</div><div class='ctx'> #define MAX_EEPROM_SIZE			    (512)</div><div class='ctx'> #define MAX_OTP_SIZE			    (1024)</div><div class='add'>+#define MAX_HS_OTP_SIZE			    (8 * 1024)</div><div class='add'>+#define MAX_HS_EEPROM_SIZE		    (64 * 1024)</div><div class='ctx'> #define OTP_INDICATOR_1			    (0xF3)</div><div class='ctx'> #define OTP_INDICATOR_2			    (0xF7)</div><div class='ctx'> </div><div class='hunk'>@@ -272,6 +274,9 @@ static int lan743x_hs_otp_read(struct lan743x_adapter *adapter, u32 offset,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (offset + length &gt; MAX_HS_OTP_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	ret = lan743x_hs_syslock_acquire(adapter, LOCK_TIMEOUT_MAX_CNT);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -320,6 +325,9 @@ static int lan743x_hs_otp_write(struct lan743x_adapter *adapter, u32 offset,</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (offset + length &gt; MAX_HS_OTP_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	ret = lan743x_hs_syslock_acquire(adapter, LOCK_TIMEOUT_MAX_CNT);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -497,6 +505,9 @@ static int lan743x_hs_eeprom_read(struct lan743x_adapter *adapter,</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (offset + length &gt; MAX_HS_EEPROM_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	retval = lan743x_hs_syslock_acquire(adapter, LOCK_TIMEOUT_MAX_CNT);</div><div class='ctx'> 	if (retval &lt; 0)</div><div class='ctx'> 		return retval;</div><div class='hunk'>@@ -539,6 +550,9 @@ static int lan743x_hs_eeprom_write(struct lan743x_adapter *adapter,</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (offset + length &gt; MAX_HS_EEPROM_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	retval = lan743x_hs_syslock_acquire(adapter, LOCK_TIMEOUT_MAX_CNT);</div><div class='ctx'> 	if (retval &lt; 0)</div><div class='ctx'> 		return retval;</div><div class='hunk'>@@ -604,9 +618,9 @@ static int lan743x_ethtool_get_eeprom_len(struct net_device *netdev)</div><div class='ctx'> 	struct lan743x_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;flags &amp; LAN743X_ADAPTER_FLAG_OTP)</div><div class='del'>-		return MAX_OTP_SIZE;</div><div class='add'>+		return adapter-&gt;is_pci11x1x ? MAX_HS_OTP_SIZE : MAX_OTP_SIZE;</div><div class='ctx'> </div><div class='del'>-	return MAX_EEPROM_SIZE;</div><div class='add'>+	return adapter-&gt;is_pci11x1x ? MAX_HS_EEPROM_SIZE : MAX_EEPROM_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan743x_ethtool_get_eeprom(struct net_device *netdev,</div><div class='hunk'>@@ -899,23 +913,29 @@ static int lan743x_ethtool_get_sset_count(struct net_device *netdev, int sset)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int lan743x_ethtool_get_rxfh_fields(struct net_device *netdev,</div><div class='add'>+					   struct ethtool_rxfh_fields *fields)</div><div class='add'>+{</div><div class='add'>+	fields-&gt;data = 0;</div><div class='add'>+</div><div class='add'>+	switch (fields-&gt;flow_type) {</div><div class='add'>+	case TCP_V4_FLOW:case UDP_V4_FLOW:</div><div class='add'>+	case TCP_V6_FLOW:case UDP_V6_FLOW:</div><div class='add'>+		fields-&gt;data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case IPV4_FLOW: case IPV6_FLOW:</div><div class='add'>+		fields-&gt;data |= RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int lan743x_ethtool_get_rxnfc(struct net_device *netdev,</div><div class='ctx'> 				     struct ethtool_rxnfc *rxnfc,</div><div class='ctx'> 				     u32 *rule_locs)</div><div class='ctx'> {</div><div class='ctx'> 	switch (rxnfc-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		rxnfc-&gt;data = 0;</div><div class='del'>-		switch (rxnfc-&gt;flow_type) {</div><div class='del'>-		case TCP_V4_FLOW:case UDP_V4_FLOW:</div><div class='del'>-		case TCP_V6_FLOW:case UDP_V6_FLOW:</div><div class='del'>-			rxnfc-&gt;data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='del'>-			fallthrough;</div><div class='del'>-		case IPV4_FLOW: case IPV6_FLOW:</div><div class='del'>-			rxnfc-&gt;data |= RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXRINGS:</div><div class='ctx'> 		rxnfc-&gt;data = LAN743X_USED_RX_CHANNELS;</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1055,9 +1075,6 @@ static int lan743x_ethtool_get_eee(struct net_device *netdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct lan743x_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	eee-&gt;tx_lpi_timer = lan743x_csr_read(adapter,</div><div class='del'>-					     MAC_EEE_TX_LPI_REQ_DLY_CNT);</div><div class='del'>-</div><div class='ctx'> 	return phylink_ethtool_get_eee(adapter-&gt;phylink, eee);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1065,24 +1082,6 @@ static int lan743x_ethtool_set_eee(struct net_device *netdev,</div><div class='ctx'> 				   struct ethtool_keee *eee)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan743x_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	u32 tx_lpi_timer;</div><div class='del'>-</div><div class='del'>-	tx_lpi_timer = lan743x_csr_read(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT);</div><div class='del'>-	if (tx_lpi_timer != eee-&gt;tx_lpi_timer) {</div><div class='del'>-		u32 mac_cr = lan743x_csr_read(adapter, MAC_CR);</div><div class='del'>-</div><div class='del'>-		/* Software should only change this field when Energy Efficient</div><div class='del'>-		 * Ethernet Enable (EEEEN) is cleared.</div><div class='del'>-		 * This function will trigger an autonegotiation restart and</div><div class='del'>-		 * eee will be reenabled during link up if eee was negotiated.</div><div class='del'>-		 */</div><div class='del'>-		lan743x_mac_eee_enable(adapter, false);</div><div class='del'>-		lan743x_csr_write(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT,</div><div class='del'>-				  eee-&gt;tx_lpi_timer);</div><div class='del'>-</div><div class='del'>-		if (mac_cr &amp; MAC_CR_EEE_EN_)</div><div class='del'>-			lan743x_mac_eee_enable(adapter, true);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return phylink_ethtool_set_eee(adapter-&gt;phylink, eee);</div><div class='ctx'> }</div><div class='hunk'>@@ -1375,6 +1374,7 @@ const struct ethtool_ops lan743x_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size = lan743x_ethtool_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh = lan743x_ethtool_get_rxfh,</div><div class='ctx'> 	.set_rxfh = lan743x_ethtool_set_rxfh,</div><div class='add'>+	.get_rxfh_fields = lan743x_ethtool_get_rxfh_fields,</div><div class='ctx'> 	.get_ts_info = lan743x_ethtool_get_ts_info,</div><div class='ctx'> 	.get_eee = lan743x_ethtool_get_eee,</div><div class='ctx'> 	.set_eee = lan743x_ethtool_set_eee,</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan743x_main.c b/drivers/net/ethernet/microchip/lan743x_main.c<br/>index 4dc5adcda6a3..e4c542fc6c2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan743x_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan743x_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan743x_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan743x_main.c</a></div><div class='hunk'>@@ -1330,7 +1330,7 @@ static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* PHY */</div><div class='del'>-static int lan743x_phy_reset(struct lan743x_adapter *adapter)</div><div class='add'>+static int lan743x_hw_reset_phy(struct lan743x_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='hunk'>@@ -1346,11 +1346,6 @@ static int lan743x_phy_reset(struct lan743x_adapter *adapter)</div><div class='ctx'> 				  50000, 1000000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lan743x_phy_init(struct lan743x_adapter *adapter)</div><div class='del'>-{</div><div class='del'>-	return lan743x_phy_reset(adapter);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void lan743x_phy_interface_select(struct lan743x_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	u32 id_rev;</div><div class='hunk'>@@ -1729,6 +1724,7 @@ int lan743x_rx_set_tstamp_mode(struct lan743x_adapter *adapter,</div><div class='ctx'> 	default:</div><div class='ctx'> 			return -ERANGE;</div><div class='ctx'> 	}</div><div class='add'>+	adapter-&gt;rx_tstamp_filter = rx_filter;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1815,6 +1811,7 @@ static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,</div><div class='ctx'> 	if (nr_frags &lt;= 0) {</div><div class='ctx'> 		tx-&gt;frame_data0 |= TX_DESC_DATA0_LS_;</div><div class='ctx'> 		tx-&gt;frame_data0 |= TX_DESC_DATA0_IOC_;</div><div class='add'>+		tx-&gt;frame_last = tx-&gt;frame_first;</div><div class='ctx'> 	}</div><div class='ctx'> 	tx_descriptor = &amp;tx-&gt;ring_cpu_ptr[tx-&gt;frame_tail];</div><div class='ctx'> 	tx_descriptor-&gt;data0 = cpu_to_le32(tx-&gt;frame_data0);</div><div class='hunk'>@@ -1884,6 +1881,7 @@ static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,</div><div class='ctx'> 		tx-&gt;frame_first = 0;</div><div class='ctx'> 		tx-&gt;frame_data0 = 0;</div><div class='ctx'> 		tx-&gt;frame_tail = 0;</div><div class='add'>+		tx-&gt;frame_last = 0;</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1924,16 +1922,18 @@ static void lan743x_tx_frame_end(struct lan743x_tx *tx,</div><div class='ctx'> 	    TX_DESC_DATA0_DTYPE_DATA_) {</div><div class='ctx'> 		tx-&gt;frame_data0 |= TX_DESC_DATA0_LS_;</div><div class='ctx'> 		tx-&gt;frame_data0 |= TX_DESC_DATA0_IOC_;</div><div class='add'>+		tx-&gt;frame_last = tx-&gt;frame_tail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tx_descriptor = &amp;tx-&gt;ring_cpu_ptr[tx-&gt;frame_tail];</div><div class='del'>-	buffer_info = &amp;tx-&gt;buffer_info[tx-&gt;frame_tail];</div><div class='add'>+	tx_descriptor = &amp;tx-&gt;ring_cpu_ptr[tx-&gt;frame_last];</div><div class='add'>+	buffer_info = &amp;tx-&gt;buffer_info[tx-&gt;frame_last];</div><div class='ctx'> 	buffer_info-&gt;skb = skb;</div><div class='ctx'> 	if (time_stamp)</div><div class='ctx'> 		buffer_info-&gt;flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED;</div><div class='ctx'> 	if (ignore_sync)</div><div class='ctx'> 		buffer_info-&gt;flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;</div><div class='ctx'> </div><div class='add'>+	tx_descriptor = &amp;tx-&gt;ring_cpu_ptr[tx-&gt;frame_tail];</div><div class='ctx'> 	tx_descriptor-&gt;data0 = cpu_to_le32(tx-&gt;frame_data0);</div><div class='ctx'> 	tx-&gt;frame_tail = lan743x_tx_next_index(tx, tx-&gt;frame_tail);</div><div class='ctx'> 	tx-&gt;last_tail = tx-&gt;frame_tail;</div><div class='hunk'>@@ -2495,8 +2495,7 @@ static int lan743x_rx_process_buffer(struct lan743x_rx *rx)</div><div class='ctx'> </div><div class='ctx'> 	/* save existing skb, allocate new skb and map to dma */</div><div class='ctx'> 	skb = buffer_info-&gt;skb;</div><div class='del'>-	if (lan743x_rx_init_ring_element(rx, rx-&gt;last_head,</div><div class='del'>-					 GFP_ATOMIC | GFP_DMA)) {</div><div class='add'>+	if (lan743x_rx_init_ring_element(rx, rx-&gt;last_head, GFP_ATOMIC)) {</div><div class='ctx'> 		/* failed to allocate next skb.</div><div class='ctx'> 		 * Memory is very low.</div><div class='ctx'> 		 * Drop this packet and reuse buffer.</div><div class='hunk'>@@ -2966,7 +2965,7 @@ static int lan743x_phylink_2500basex_config(struct lan743x_adapter *adapter)</div><div class='ctx'> 	return lan743x_pcs_power_reset(adapter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable)</div><div class='add'>+static void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mac_cr;</div><div class='ctx'> </div><div class='hunk'>@@ -3027,10 +3026,8 @@ static void lan743x_phylink_mac_link_down(struct phylink_config *config,</div><div class='ctx'> 					  phy_interface_t interface)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = to_net_dev(config-&gt;dev);</div><div class='del'>-	struct lan743x_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	netif_tx_stop_all_queues(to_net_dev(config-&gt;dev));</div><div class='del'>-	lan743x_mac_eee_enable(adapter, false);</div><div class='add'>+	netif_tx_stop_all_queues(netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan743x_phylink_mac_link_up(struct phylink_config *config,</div><div class='hunk'>@@ -3072,16 +3069,40 @@ static void lan743x_phylink_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 					  cap &amp; FLOW_CTRL_TX,</div><div class='ctx'> 					  cap &amp; FLOW_CTRL_RX);</div><div class='ctx'> </div><div class='del'>-	if (phydev)</div><div class='del'>-		lan743x_mac_eee_enable(adapter, phydev-&gt;enable_tx_lpi);</div><div class='del'>-</div><div class='ctx'> 	netif_tx_wake_all_queues(netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void lan743x_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct lan743x_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	lan743x_mac_eee_enable(adapter, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan743x_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,</div><div class='add'>+				     bool tx_clk_stop)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct lan743x_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	/* Software should only change this field when Energy Efficient</div><div class='add'>+	 * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing</div><div class='add'>+	 * EEEEN during probe, and phylink itself guarantees that</div><div class='add'>+	 * mac_disable_tx_lpi() will have been previously called.</div><div class='add'>+	 */</div><div class='add'>+	lan743x_csr_write(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT, timer);</div><div class='add'>+	lan743x_mac_eee_enable(adapter, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct phylink_mac_ops lan743x_phylink_mac_ops = {</div><div class='ctx'> 	.mac_config = lan743x_phylink_mac_config,</div><div class='ctx'> 	.mac_link_down = lan743x_phylink_mac_link_down,</div><div class='ctx'> 	.mac_link_up = lan743x_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = lan743x_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = lan743x_mac_enable_tx_lpi,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int lan743x_phylink_create(struct lan743x_adapter *adapter)</div><div class='hunk'>@@ -3095,6 +3116,9 @@ static int lan743x_phylink_create(struct lan743x_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;phylink_config.mac_capabilities = MAC_ASYM_PAUSE |</div><div class='ctx'> 		MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD;</div><div class='add'>+	adapter-&gt;phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD;</div><div class='add'>+	adapter-&gt;phylink_config.lpi_timer_default =</div><div class='add'>+		lan743x_csr_read(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT);</div><div class='ctx'> </div><div class='ctx'> 	lan743x_phy_interface_select(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -3120,6 +3144,10 @@ static int lan743x_phylink_create(struct lan743x_adapter *adapter)</div><div class='ctx'> 		phy_interface_set_rgmii(adapter-&gt;phylink_config.supported_interfaces);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	memcpy(adapter-&gt;phylink_config.lpi_interfaces,</div><div class='add'>+	       adapter-&gt;phylink_config.supported_interfaces,</div><div class='add'>+	       sizeof(adapter-&gt;phylink_config.lpi_interfaces));</div><div class='add'>+</div><div class='ctx'> 	pl = phylink_create(&amp;adapter-&gt;phylink_config, NULL,</div><div class='ctx'> 			    adapter-&gt;phy_interface, &amp;lan743x_phylink_mac_ops);</div><div class='ctx'> </div><div class='hunk'>@@ -3319,8 +3347,6 @@ static int lan743x_netdev_ioctl(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(netdev))</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	if (cmd == SIOCSHWTSTAMP)</div><div class='del'>-		return lan743x_ptp_ioctl(netdev, ifr, cmd);</div><div class='ctx'> </div><div class='ctx'> 	return phylink_mii_ioctl(adapter-&gt;phylink, ifr, cmd);</div><div class='ctx'> }</div><div class='hunk'>@@ -3415,6 +3441,8 @@ static const struct net_device_ops lan743x_netdev_ops = {</div><div class='ctx'> 	.ndo_change_mtu		= lan743x_netdev_change_mtu,</div><div class='ctx'> 	.ndo_get_stats64	= lan743x_netdev_get_stats64,</div><div class='ctx'> 	.ndo_set_mac_address	= lan743x_netdev_set_mac_address,</div><div class='add'>+	.ndo_hwtstamp_get	= lan743x_ptp_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= lan743x_ptp_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)</div><div class='hunk'>@@ -3462,6 +3490,7 @@ static int lan743x_hardware_init(struct lan743x_adapter *adapter,</div><div class='ctx'> 				 struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan743x_tx *tx;</div><div class='add'>+	u32 sgmii_ctl;</div><div class='ctx'> 	int index;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -3474,6 +3503,15 @@ static int lan743x_hardware_init(struct lan743x_adapter *adapter,</div><div class='ctx'> 		spin_lock_init(&amp;adapter-&gt;eth_syslock_spinlock);</div><div class='ctx'> 		mutex_init(&amp;adapter-&gt;sgmii_rw_lock);</div><div class='ctx'> 		pci11x1x_set_rfe_rd_fifo_threshold(adapter);</div><div class='add'>+		sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);</div><div class='add'>+		if (adapter-&gt;is_sgmii_en) {</div><div class='add'>+			sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_;</div><div class='add'>+			sgmii_ctl &amp;= ~SGMII_CTL_SGMII_POWER_DN_;</div><div class='add'>+		} else {</div><div class='add'>+			sgmii_ctl &amp;= ~SGMII_CTL_SGMII_ENABLE_;</div><div class='add'>+			sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_;</div><div class='add'>+		}</div><div class='add'>+		lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		adapter-&gt;max_tx_channels = LAN743X_MAX_TX_CHANNELS;</div><div class='ctx'> 		adapter-&gt;used_tx_channels = LAN743X_USED_TX_CHANNELS;</div><div class='hunk'>@@ -3491,10 +3529,6 @@ static int lan743x_hardware_init(struct lan743x_adapter *adapter,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = lan743x_phy_init(adapter);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	ret = lan743x_ptp_init(adapter);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -3517,12 +3551,14 @@ static int lan743x_hardware_init(struct lan743x_adapter *adapter,</div><div class='ctx'> 		spin_lock_init(&amp;tx-&gt;ring_lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Ensure EEEEN is clear */</div><div class='add'>+	lan743x_mac_eee_enable(adapter, false);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	u32 sgmii_ctl;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;mdiobus = devm_mdiobus_alloc(&amp;adapter-&gt;pdev-&gt;dev);</div><div class='hunk'>@@ -3534,10 +3570,6 @@ static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)</div><div class='ctx'> 	adapter-&gt;mdiobus-&gt;priv = (void *)adapter;</div><div class='ctx'> 	if (adapter-&gt;is_pci11x1x) {</div><div class='ctx'> 		if (adapter-&gt;is_sgmii_en) {</div><div class='del'>-			sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);</div><div class='del'>-			sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_;</div><div class='del'>-			sgmii_ctl &amp;= ~SGMII_CTL_SGMII_POWER_DN_;</div><div class='del'>-			lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);</div><div class='ctx'> 			netif_dbg(adapter, drv, adapter-&gt;netdev,</div><div class='ctx'> 				  "SGMII operation\n");</div><div class='ctx'> 			adapter-&gt;mdiobus-&gt;read = lan743x_mdiobus_read_c22;</div><div class='hunk'>@@ -3548,10 +3580,6 @@ static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)</div><div class='ctx'> 			netif_dbg(adapter, drv, adapter-&gt;netdev,</div><div class='ctx'> 				  "lan743x-mdiobus-c45\n");</div><div class='ctx'> 		} else {</div><div class='del'>-			sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);</div><div class='del'>-			sgmii_ctl &amp;= ~SGMII_CTL_SGMII_ENABLE_;</div><div class='del'>-			sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_;</div><div class='del'>-			lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);</div><div class='ctx'> 			netif_dbg(adapter, drv, adapter-&gt;netdev,</div><div class='ctx'> 				  "RGMII operation\n");</div><div class='ctx'> 			// Only C22 support when RGMII I/F</div><div class='hunk'>@@ -3637,6 +3665,10 @@ static int lan743x_pcidev_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto cleanup_pci;</div><div class='ctx'> </div><div class='add'>+	ret = lan743x_hw_reset_phy(adapter);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto cleanup_pci;</div><div class='add'>+</div><div class='ctx'> 	ret = lan743x_hardware_init(adapter, pdev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto cleanup_pci;</div><div class='hunk'>@@ -3883,7 +3915,6 @@ static int lan743x_pm_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	pci_set_power_state(pdev, PCI_D0);</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore HW_CFG that was saved during pm suspend */</div><div class='ctx'> 	if (adapter-&gt;is_pci11x1x)</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan743x_main.h b/drivers/net/ethernet/microchip/lan743x_main.h<br/>index 8ef897c114d3..02a28b709163 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan743x_main.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan743x_main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan743x_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan743x_main.h</a></div><div class='hunk'>@@ -980,6 +980,7 @@ struct lan743x_tx {</div><div class='ctx'> 	u32		frame_first;</div><div class='ctx'> 	u32		frame_data0;</div><div class='ctx'> 	u32		frame_tail;</div><div class='add'>+	u32		frame_last;</div><div class='ctx'> </div><div class='ctx'> 	struct lan743x_tx_buffer_info *buffer_info;</div><div class='ctx'> </div><div class='hunk'>@@ -1086,6 +1087,7 @@ struct lan743x_adapter {</div><div class='ctx'> 	phy_interface_t		phy_interface;</div><div class='ctx'> 	struct phylink		*phylink;</div><div class='ctx'> 	struct phylink_config	phylink_config;</div><div class='add'>+	int			rx_tstamp_filter;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define LAN743X_COMPONENT_FLAG_RX(channel)  BIT(20 + (channel))</div><div class='hunk'>@@ -1206,6 +1208,5 @@ void lan743x_hs_syslock_release(struct lan743x_adapter *adapter);</div><div class='ctx'> void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,</div><div class='ctx'> 				       bool tx_enable, bool rx_enable);</div><div class='ctx'> int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr);</div><div class='del'>-void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable);</div><div class='ctx'> </div><div class='ctx'> #endif /* _LAN743X_H */</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan743x_ptp.c b/drivers/net/ethernet/microchip/lan743x_ptp.c<br/>index 4a777b449ecd..a3b48388b3fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan743x_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan743x_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan743x_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan743x_ptp.c</a></div><div class='hunk'>@@ -463,10 +463,6 @@ static int lan743x_ptp_perout(struct lan743x_adapter *adapter, int on,</div><div class='ctx'> 	struct lan743x_ptp_perout *perout = &amp;ptp-&gt;perout[index];</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-	if (perout_request-&gt;flags &amp; ~PTP_PEROUT_DUTY_CYCLE)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	if (on) {</div><div class='ctx'> 		perout_pin = ptp_find_pin(ptp-&gt;ptp_clock, PTP_PF_PEROUT,</div><div class='ctx'> 					  perout_request-&gt;index);</div><div class='hunk'>@@ -1537,6 +1533,10 @@ int lan743x_ptp_open(struct lan743x_adapter *adapter)</div><div class='ctx'> 	ptp-&gt;ptp_clock_info.n_per_out = LAN743X_PTP_N_EVENT_CHAN;</div><div class='ctx'> 	ptp-&gt;ptp_clock_info.n_pins = n_pins;</div><div class='ctx'> 	ptp-&gt;ptp_clock_info.pps = LAN743X_PTP_N_PPS;</div><div class='add'>+	ptp-&gt;ptp_clock_info.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+						    PTP_FALLING_EDGE |</div><div class='add'>+						    PTP_STRICT_FLAGS;</div><div class='add'>+	ptp-&gt;ptp_clock_info.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE;</div><div class='ctx'> 	ptp-&gt;ptp_clock_info.pin_config = ptp-&gt;pin_config;</div><div class='ctx'> 	ptp-&gt;ptp_clock_info.adjfine = lan743x_ptpci_adjfine;</div><div class='ctx'> 	ptp-&gt;ptp_clock_info.adjtime = lan743x_ptpci_adjtime;</div><div class='hunk'>@@ -1736,23 +1736,32 @@ void lan743x_ptp_tx_timestamp_skb(struct lan743x_adapter *adapter,</div><div class='ctx'> 	lan743x_ptp_tx_ts_complete(adapter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int lan743x_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='add'>+int lan743x_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan743x_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	int index;</div><div class='add'>+	struct lan743x_tx *tx = &amp;adapter-&gt;tx[0];</div><div class='ctx'> </div><div class='del'>-	if (!ifr) {</div><div class='del'>-		netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='del'>-			  "SIOCSHWTSTAMP, ifr == NULL\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	if (tx-&gt;ts_flags &amp; TX_TS_FLAG_ONE_STEP_SYNC)</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_ONESTEP_SYNC;</div><div class='add'>+	else if (tx-&gt;ts_flags &amp; TX_TS_FLAG_TIMESTAMPING_ENABLED)</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+	else</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+</div><div class='add'>+	config-&gt;rx_filter = adapter-&gt;rx_tstamp_filter;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+int lan743x_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct lan743x_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 		for (index = 0; index &lt; adapter-&gt;used_tx_channels;</div><div class='ctx'> 		     index++)</div><div class='hunk'>@@ -1776,19 +1785,12 @@ int lan743x_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='ctx'> 		lan743x_ptp_set_sync_ts_insert(adapter, true);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_TX_ONESTEP_P2P:</div><div class='del'>-		ret = -ERANGE;</div><div class='del'>-		break;</div><div class='add'>+		return -ERANGE;</div><div class='ctx'> 	default:</div><div class='ctx'> 		netif_warn(adapter, drv, adapter-&gt;netdev,</div><div class='del'>-			   "  tx_type = %d, UNKNOWN\n", config.tx_type);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='add'>+			   "  tx_type = %d, UNKNOWN\n", config-&gt;tx_type);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = lan743x_rx_set_tstamp_mode(adapter, config.rx_filter);</div><div class='del'>-</div><div class='del'>-	if (!ret)</div><div class='del'>-		return copy_to_user(ifr-&gt;ifr_data, &amp;config,</div><div class='del'>-			sizeof(config)) ? -EFAULT : 0;</div><div class='del'>-	return ret;</div><div class='add'>+	return lan743x_rx_set_tstamp_mode(adapter, config-&gt;rx_filter);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan743x_ptp.h b/drivers/net/ethernet/microchip/lan743x_ptp.h<br/>index 0d29914cd460..f33dc83c5700 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan743x_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan743x_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan743x_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan743x_ptp.h</a></div><div class='hunk'>@@ -18,9 +18,9 @@</div><div class='ctx'>  */</div><div class='ctx'> #define LAN743X_PTP_N_EVENT_CHAN	2</div><div class='ctx'> #define LAN743X_PTP_N_PEROUT		LAN743X_PTP_N_EVENT_CHAN</div><div class='del'>-#define LAN743X_PTP_N_EXTTS		4</div><div class='del'>-#define LAN743X_PTP_N_PPS		0</div><div class='ctx'> #define PCI11X1X_PTP_IO_MAX_CHANNELS	8</div><div class='add'>+#define LAN743X_PTP_N_EXTTS		PCI11X1X_PTP_IO_MAX_CHANNELS</div><div class='add'>+#define LAN743X_PTP_N_PPS		0</div><div class='ctx'> #define PTP_CMD_CTL_TIMEOUT_CNT		50</div><div class='ctx'> </div><div class='ctx'> struct lan743x_adapter;</div><div class='hunk'>@@ -51,8 +51,11 @@ int lan743x_ptp_open(struct lan743x_adapter *adapter);</div><div class='ctx'> void lan743x_ptp_close(struct lan743x_adapter *adapter);</div><div class='ctx'> void lan743x_ptp_update_latency(struct lan743x_adapter *adapter,</div><div class='ctx'> 				u32 link_speed);</div><div class='del'>-</div><div class='del'>-int lan743x_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);</div><div class='add'>+int lan743x_ptp_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config);</div><div class='add'>+int lan743x_ptp_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack);</div><div class='ctx'> </div><div class='ctx'> #define LAN743X_PTP_NUMBER_OF_TX_TIMESTAMPS (4)</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan865x/lan865x.c b/drivers/net/ethernet/microchip/lan865x/lan865x.c<br/>index dd436bdff0f8..0277d9737369 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan865x/lan865x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan865x/lan865x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan865x/lan865x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan865x/lan865x.c</a></div><div class='hunk'>@@ -32,6 +32,10 @@</div><div class='ctx'> /* MAC Specific Addr 1 Top Reg */</div><div class='ctx'> #define LAN865X_REG_MAC_H_SADDR1	0x00010023</div><div class='ctx'> </div><div class='add'>+/* MAC TSU Timer Increment Register */</div><div class='add'>+#define LAN865X_REG_MAC_TSU_TIMER_INCR		0x00010077</div><div class='add'>+#define MAC_TSU_TIMER_INCR_COUNT_NANOSECONDS	0x0028</div><div class='add'>+</div><div class='ctx'> struct lan865x_priv {</div><div class='ctx'> 	struct work_struct multicast_work;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='hunk'>@@ -311,6 +315,8 @@ static int lan865x_net_open(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	phy_start(netdev-&gt;phydev);</div><div class='ctx'> </div><div class='add'>+	netif_start_queue(netdev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -320,6 +326,8 @@ static const struct net_device_ops lan865x_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit		= lan865x_send_packet,</div><div class='ctx'> 	.ndo_set_rx_mode	= lan865x_set_multicast_list,</div><div class='ctx'> 	.ndo_set_mac_address	= lan865x_set_mac_address,</div><div class='add'>+	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+	.ndo_eth_ioctl          = phy_do_ioctl_running,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int lan865x_probe(struct spi_device *spi)</div><div class='hunk'>@@ -344,6 +352,21 @@ static int lan865x_probe(struct spi_device *spi)</div><div class='ctx'> 		goto free_netdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* LAN865x Rev.B0/B1 configuration parameters from AN1760</div><div class='add'>+	 * As per the Configuration Application Note AN1760 published in the</div><div class='add'>+	 * link, https://www.microchip.com/en-us/application-notes/an1760</div><div class='add'>+	 * Revision F (DS60001760G - June 2024), configure the MAC to set time</div><div class='add'>+	 * stamping at the end of the Start of Frame Delimiter (SFD) and set the</div><div class='add'>+	 * Timer Increment reg to 40 ns to be used as a 25 MHz internal clock.</div><div class='add'>+	 */</div><div class='add'>+	ret = oa_tc6_write_register(priv-&gt;tc6, LAN865X_REG_MAC_TSU_TIMER_INCR,</div><div class='add'>+				    MAC_TSU_TIMER_INCR_COUNT_NANOSECONDS);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Failed to config TSU Timer Incr reg: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+		goto oa_tc6_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* As per the point s3 in the below errata, SPI receive Ethernet frame</div><div class='ctx'> 	 * transfer may halt when starting the next frame in the same data block</div><div class='ctx'> 	 * (chunk) as the end of a previous frame. The RFA field should be</div><div class='hunk'>@@ -402,13 +425,16 @@ static void lan865x_remove(struct spi_device *spi)</div><div class='ctx'> 	free_netdev(priv-&gt;netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct spi_device_id spidev_spi_ids[] = {</div><div class='add'>+static const struct spi_device_id lan865x_ids[] = {</div><div class='ctx'> 	{ .name = "lan8650" },</div><div class='add'>+	{ .name = "lan8651" },</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='add'>+MODULE_DEVICE_TABLE(spi, lan865x_ids);</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id lan865x_dt_ids[] = {</div><div class='ctx'> 	{ .compatible = "microchip,lan8650" },</div><div class='add'>+	{ .compatible = "microchip,lan8651" },</div><div class='ctx'> 	{ /* Sentinel */ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, lan865x_dt_ids);</div><div class='hunk'>@@ -420,7 +446,7 @@ static struct spi_driver lan865x_driver = {</div><div class='ctx'> 	 },</div><div class='ctx'> 	.probe = lan865x_probe,</div><div class='ctx'> 	.remove = lan865x_remove,</div><div class='del'>-	.id_table = spidev_spi_ids,</div><div class='add'>+	.id_table = lan865x_ids,</div><div class='ctx'> };</div><div class='ctx'> module_spi_driver(lan865x_driver);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c b/drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c<br/>index 2474dfd330f4..fe4e61405284 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c</a></div><div class='hunk'>@@ -294,7 +294,7 @@ static void lan966x_stats_update(struct lan966x *lan966x)</div><div class='ctx'> {</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_lock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; lan966x-&gt;num_phys_ports; i++) {</div><div class='ctx'> 		uint idx = i * lan966x-&gt;num_stats;</div><div class='hunk'>@@ -310,7 +310,7 @@ static void lan966x_stats_update(struct lan966x *lan966x)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan966x_get_sset_count(struct net_device *dev, int sset)</div><div class='hunk'>@@ -365,7 +365,7 @@ static void lan966x_get_eth_mac_stats(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	idx = port-&gt;chip_port * lan966x-&gt;num_stats;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_lock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> </div><div class='ctx'> 	mac_stats-&gt;FramesTransmittedOK =</div><div class='ctx'> 		lan966x-&gt;stats[idx + SYS_COUNT_TX_UC] +</div><div class='hunk'>@@ -416,7 +416,7 @@ static void lan966x_get_eth_mac_stats(struct net_device *dev,</div><div class='ctx'> 		lan966x-&gt;stats[idx + SYS_COUNT_RX_LONG] +</div><div class='ctx'> 		lan966x-&gt;stats[idx + SYS_COUNT_RX_PMAC_LONG];</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_rmon_hist_range lan966x_rmon_ranges[] = {</div><div class='hunk'>@@ -442,7 +442,7 @@ static void lan966x_get_eth_rmon_stats(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	idx = port-&gt;chip_port * lan966x-&gt;num_stats;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_lock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> </div><div class='ctx'> 	rmon_stats-&gt;undersize_pkts =</div><div class='ctx'> 		lan966x-&gt;stats[idx + SYS_COUNT_RX_SHORT] +</div><div class='hunk'>@@ -500,7 +500,7 @@ static void lan966x_get_eth_rmon_stats(struct net_device *dev,</div><div class='ctx'> 		lan966x-&gt;stats[idx + SYS_COUNT_TX_SZ_1024_1526] +</div><div class='ctx'> 		lan966x-&gt;stats[idx + SYS_COUNT_TX_PMAC_SZ_1024_1526];</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> </div><div class='ctx'> 	*ranges = lan966x_rmon_ranges;</div><div class='ctx'> }</div><div class='hunk'>@@ -603,7 +603,7 @@ void lan966x_stats_get(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	idx = port-&gt;chip_port * lan966x-&gt;num_stats;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_lock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;rx_bytes = lan966x-&gt;stats[idx + SYS_COUNT_RX_OCT] +</div><div class='ctx'> 		lan966x-&gt;stats[idx + SYS_COUNT_RX_PMAC_OCT];</div><div class='hunk'>@@ -685,7 +685,7 @@ void lan966x_stats_get(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;collisions = lan966x-&gt;stats[idx + SYS_COUNT_TX_COL];</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int lan966x_stats_init(struct lan966x *lan966x)</div><div class='hunk'>@@ -701,7 +701,7 @@ int lan966x_stats_init(struct lan966x *lan966x)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* Init stats worker */</div><div class='del'>-	mutex_init(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_lock_init(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> 	snprintf(queue_name, sizeof(queue_name), "%s-stats",</div><div class='ctx'> 		 dev_name(lan966x-&gt;dev));</div><div class='ctx'> 	lan966x-&gt;stats_queue = create_singlethread_workqueue(queue_name);</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.c b/drivers/net/ethernet/microchip/lan966x/lan966x_main.c<br/>index 3234a960fcc3..47752d3fde0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan966x/lan966x_main.c</a></div><div class='hunk'>@@ -353,6 +353,11 @@ static void lan966x_ifh_set_rew_op(void *ifh, u64 rew_op)</div><div class='ctx'> 	lan966x_ifh_set(ifh, rew_op, IFH_POS_REW_CMD, IFH_WID_REW_CMD);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void lan966x_ifh_set_oam_type(void *ifh, u64 oam_type)</div><div class='add'>+{</div><div class='add'>+	lan966x_ifh_set(ifh, oam_type, IFH_POS_PDU_TYPE, IFH_WID_PDU_TYPE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void lan966x_ifh_set_timestamp(void *ifh, u64 timestamp)</div><div class='ctx'> {</div><div class='ctx'> 	lan966x_ifh_set(ifh, timestamp, IFH_POS_TIMESTAMP, IFH_WID_TIMESTAMP);</div><div class='hunk'>@@ -380,6 +385,7 @@ static netdev_tx_t lan966x_port_xmit(struct sk_buff *skb,</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='ctx'> 		lan966x_ifh_set_rew_op(ifh, LAN966X_SKB_CB(skb)-&gt;rew_op);</div><div class='add'>+		lan966x_ifh_set_oam_type(ifh, LAN966X_SKB_CB(skb)-&gt;pdu_type);</div><div class='ctx'> 		lan966x_ifh_set_timestamp(ifh, LAN966X_SKB_CB(skb)-&gt;ts_id);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -828,7 +834,6 @@ static int lan966x_probe_port(struct lan966x *lan966x, u32 p,</div><div class='ctx'> 	port-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='ctx'> 	port-&gt;phylink_pcs.poll = true;</div><div class='ctx'> 	port-&gt;phylink_pcs.ops = &amp;lan966x_phylink_pcs_ops;</div><div class='del'>-	port-&gt;phylink_pcs.neg_mode = true;</div><div class='ctx'> </div><div class='ctx'> 	port-&gt;phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='ctx'> 		MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD;</div><div class='hunk'>@@ -874,6 +879,7 @@ static int lan966x_probe_port(struct lan966x *lan966x, u32 p,</div><div class='ctx'> 	lan966x_vlan_port_set_vlan_aware(port, 0);</div><div class='ctx'> 	lan966x_vlan_port_set_vid(port, HOST_PVID, false, false);</div><div class='ctx'> 	lan966x_vlan_port_apply(port);</div><div class='add'>+	lan966x_vlan_port_rew_host(port);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1255,7 +1261,6 @@ cleanup_ports:</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;lan966x-&gt;stats_work);</div><div class='ctx'> 	destroy_workqueue(lan966x-&gt;stats_queue);</div><div class='del'>-	mutex_destroy(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> </div><div class='ctx'> 	debugfs_remove_recursive(lan966x-&gt;debugfs_root);</div><div class='ctx'> </div><div class='hunk'>@@ -1273,7 +1278,6 @@ static void lan966x_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;lan966x-&gt;stats_work);</div><div class='ctx'> 	destroy_workqueue(lan966x-&gt;stats_queue);</div><div class='del'>-	mutex_destroy(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> </div><div class='ctx'> 	lan966x_mac_purge_entries(lan966x);</div><div class='ctx'> 	lan966x_mdb_deinit(lan966x);</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.h b/drivers/net/ethernet/microchip/lan966x/lan966x_main.h<br/>index 25cb2f61986f..eea286c29474 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_main.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan966x/lan966x_main.h</a></div><div class='hunk'>@@ -75,6 +75,10 @@</div><div class='ctx'> #define IFH_REW_OP_ONE_STEP_PTP		0x3</div><div class='ctx'> #define IFH_REW_OP_TWO_STEP_PTP		0x4</div><div class='ctx'> </div><div class='add'>+#define IFH_PDU_TYPE_NONE		0</div><div class='add'>+#define IFH_PDU_TYPE_IPV4		7</div><div class='add'>+#define IFH_PDU_TYPE_IPV6		8</div><div class='add'>+</div><div class='ctx'> #define FDMA_RX_DCB_MAX_DBS		1</div><div class='ctx'> #define FDMA_TX_DCB_MAX_DBS		1</div><div class='ctx'> </div><div class='hunk'>@@ -254,6 +258,7 @@ struct lan966x_phc {</div><div class='ctx'> </div><div class='ctx'> struct lan966x_skb_cb {</div><div class='ctx'> 	u8 rew_op;</div><div class='add'>+	u8 pdu_type;</div><div class='ctx'> 	u16 ts_id;</div><div class='ctx'> 	unsigned long jiffies;</div><div class='ctx'> };</div><div class='hunk'>@@ -290,8 +295,8 @@ struct lan966x {</div><div class='ctx'> 	const struct lan966x_stat_layout *stats_layout;</div><div class='ctx'> 	u32 num_stats;</div><div class='ctx'> </div><div class='del'>-	/* workqueue for reading stats */</div><div class='del'>-	struct mutex stats_lock;</div><div class='add'>+	/* lock for reading stats */</div><div class='add'>+	spinlock_t stats_lock;</div><div class='ctx'> 	u64 *stats;</div><div class='ctx'> 	struct delayed_work stats_work;</div><div class='ctx'> 	struct workqueue_struct *stats_queue;</div><div class='hunk'>@@ -443,7 +448,7 @@ int lan966x_stats_init(struct lan966x *lan966x);</div><div class='ctx'> </div><div class='ctx'> void lan966x_port_config_down(struct lan966x_port *port);</div><div class='ctx'> void lan966x_port_config_up(struct lan966x_port *port);</div><div class='del'>-void lan966x_port_status_get(struct lan966x_port *port,</div><div class='add'>+void lan966x_port_status_get(struct lan966x_port *port, unsigned int neg_mode,</div><div class='ctx'> 			     struct phylink_link_state *state);</div><div class='ctx'> int lan966x_port_pcs_set(struct lan966x_port *port,</div><div class='ctx'> 			 struct lan966x_port_config *config);</div><div class='hunk'>@@ -492,6 +497,7 @@ void lan966x_vlan_port_apply(struct lan966x_port *port);</div><div class='ctx'> bool lan966x_vlan_cpu_member_cpu_vlan_mask(struct lan966x *lan966x, u16 vid);</div><div class='ctx'> void lan966x_vlan_port_set_vlan_aware(struct lan966x_port *port,</div><div class='ctx'> 				      bool vlan_aware);</div><div class='add'>+void lan966x_vlan_port_rew_host(struct lan966x_port *port);</div><div class='ctx'> int lan966x_vlan_port_set_vid(struct lan966x_port *port,</div><div class='ctx'> 			      u16 vid,</div><div class='ctx'> 			      bool pvid,</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c b/drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c<br/>index 1d63903f9006..75188b99e4e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c</a></div><div class='hunk'>@@ -88,11 +88,12 @@ static struct lan966x_port *lan966x_pcs_to_port(struct phylink_pcs *pcs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan966x_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				  unsigned int neg_mode,</div><div class='ctx'> 				  struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan966x_port *port = lan966x_pcs_to_port(pcs);</div><div class='ctx'> </div><div class='del'>-	lan966x_port_status_get(port, state);</div><div class='add'>+	lan966x_port_status_get(port, neg_mode, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan966x_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_port.c b/drivers/net/ethernet/microchip/lan966x/lan966x_port.c<br/>index fdfa4040d9ee..cf7de0267c32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan966x/lan966x_port.c</a></div><div class='hunk'>@@ -284,7 +284,7 @@ void lan966x_port_config_up(struct lan966x_port *port)</div><div class='ctx'> 	lan966x_port_link_up(port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void lan966x_port_status_get(struct lan966x_port *port,</div><div class='add'>+void lan966x_port_status_get(struct lan966x_port *port, unsigned int neg_mode,</div><div class='ctx'> 			     struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan966x *lan966x = port-&gt;lan966x;</div><div class='hunk'>@@ -314,7 +314,7 @@ void lan966x_port_status_get(struct lan966x_port *port,</div><div class='ctx'> 		bmsr |= BMSR_ANEGCOMPLETE;</div><div class='ctx'> </div><div class='ctx'> 		lp_adv = DEV_PCS1G_ANEG_STATUS_LP_ADV_GET(val);</div><div class='del'>-		phylink_mii_c22_pcs_decode_state(state, bmsr, lp_adv);</div><div class='add'>+		phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lp_adv);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (!state-&gt;link)</div><div class='ctx'> 			return;</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c b/drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c<br/>index 63905bb5a63a..8c40db90ee8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c</a></div><div class='hunk'>@@ -1,11 +1,14 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0+</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ptp_classify.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "lan966x_main.h"</div><div class='ctx'> #include "vcap_api.h"</div><div class='ctx'> #include "vcap_api_client.h"</div><div class='ctx'> </div><div class='add'>+#define LAN9X66_CLOCK_RATE	165617754</div><div class='add'>+</div><div class='ctx'> #define LAN966X_MAX_PTP_ID	512</div><div class='ctx'> </div><div class='ctx'> /* Represents 1ppm adjustment in 2^59 format with 6.037735849ns as reference</div><div class='hunk'>@@ -322,34 +325,55 @@ void lan966x_ptp_hwtstamp_get(struct lan966x_port *port,</div><div class='ctx'> 	*cfg = phc-&gt;hwtstamp_config;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lan966x_ptp_classify(struct lan966x_port *port, struct sk_buff *skb)</div><div class='add'>+static void lan966x_ptp_classify(struct lan966x_port *port, struct sk_buff *skb,</div><div class='add'>+				 u8 *rew_op, u8 *pdu_type)</div><div class='ctx'> {</div><div class='ctx'> 	struct ptp_header *header;</div><div class='ctx'> 	u8 msgtype;</div><div class='ctx'> 	int type;</div><div class='ctx'> </div><div class='del'>-	if (port-&gt;ptp_tx_cmd == IFH_REW_OP_NOOP)</div><div class='del'>-		return IFH_REW_OP_NOOP;</div><div class='add'>+	if (port-&gt;ptp_tx_cmd == IFH_REW_OP_NOOP) {</div><div class='add'>+		*rew_op = IFH_REW_OP_NOOP;</div><div class='add'>+		*pdu_type = IFH_PDU_TYPE_NONE;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	type = ptp_classify_raw(skb);</div><div class='del'>-	if (type == PTP_CLASS_NONE)</div><div class='del'>-		return IFH_REW_OP_NOOP;</div><div class='add'>+	if (type == PTP_CLASS_NONE) {</div><div class='add'>+		*rew_op = IFH_REW_OP_NOOP;</div><div class='add'>+		*pdu_type = IFH_PDU_TYPE_NONE;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	header = ptp_parse_header(skb, type);</div><div class='del'>-	if (!header)</div><div class='del'>-		return IFH_REW_OP_NOOP;</div><div class='add'>+	if (!header) {</div><div class='add'>+		*rew_op = IFH_REW_OP_NOOP;</div><div class='add'>+		*pdu_type = IFH_PDU_TYPE_NONE;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type &amp; PTP_CLASS_L2)</div><div class='add'>+		*pdu_type = IFH_PDU_TYPE_NONE;</div><div class='add'>+	if (type &amp; PTP_CLASS_IPV4)</div><div class='add'>+		*pdu_type = IFH_PDU_TYPE_IPV4;</div><div class='add'>+	if (type &amp; PTP_CLASS_IPV6)</div><div class='add'>+		*pdu_type = IFH_PDU_TYPE_IPV6;</div><div class='ctx'> </div><div class='del'>-	if (port-&gt;ptp_tx_cmd == IFH_REW_OP_TWO_STEP_PTP)</div><div class='del'>-		return IFH_REW_OP_TWO_STEP_PTP;</div><div class='add'>+	if (port-&gt;ptp_tx_cmd == IFH_REW_OP_TWO_STEP_PTP) {</div><div class='add'>+		*rew_op = IFH_REW_OP_TWO_STEP_PTP;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* If it is sync and run 1 step then set the correct operation,</div><div class='ctx'> 	 * otherwise run as 2 step</div><div class='ctx'> 	 */</div><div class='ctx'> 	msgtype = ptp_get_msgtype(header, type);</div><div class='del'>-	if ((msgtype &amp; 0xf) == 0)</div><div class='del'>-		return IFH_REW_OP_ONE_STEP_PTP;</div><div class='add'>+	if ((msgtype &amp; 0xf) == 0) {</div><div class='add'>+		*rew_op = IFH_REW_OP_ONE_STEP_PTP;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return IFH_REW_OP_TWO_STEP_PTP;</div><div class='add'>+	*rew_op = IFH_REW_OP_TWO_STEP_PTP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan966x_ptp_txtstamp_old_release(struct lan966x_port *port)</div><div class='hunk'>@@ -374,10 +398,12 @@ int lan966x_ptp_txtstamp_request(struct lan966x_port *port,</div><div class='ctx'> {</div><div class='ctx'> 	struct lan966x *lan966x = port-&gt;lan966x;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	u8 pdu_type;</div><div class='ctx'> 	u8 rew_op;</div><div class='ctx'> </div><div class='del'>-	rew_op = lan966x_ptp_classify(port, skb);</div><div class='add'>+	lan966x_ptp_classify(port, skb, &amp;rew_op, &amp;pdu_type);</div><div class='ctx'> 	LAN966X_SKB_CB(skb)-&gt;rew_op = rew_op;</div><div class='add'>+	LAN966X_SKB_CB(skb)-&gt;pdu_type = pdu_type;</div><div class='ctx'> </div><div class='ctx'> 	if (rew_op != IFH_REW_OP_TWO_STEP_PTP)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -815,10 +841,6 @@ static int lan966x_ptp_perout(struct ptp_clock_info *ptp,</div><div class='ctx'> 	bool pps = false;</div><div class='ctx'> 	int pin;</div><div class='ctx'> </div><div class='del'>-	if (rq-&gt;perout.flags &amp; ~(PTP_PEROUT_DUTY_CYCLE |</div><div class='del'>-				 PTP_PEROUT_PHASE))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	pin = ptp_find_pin(phc-&gt;clock, PTP_PF_PEROUT, rq-&gt;perout.index);</div><div class='ctx'> 	if (pin == -1 || pin &gt;= LAN966X_PHC_PINS_NUM)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -917,12 +939,6 @@ static int lan966x_ptp_extts(struct ptp_clock_info *ptp,</div><div class='ctx'> 	if (lan966x-&gt;ptp_ext_irq &lt;= 0)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-	if (rq-&gt;extts.flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-				PTP_RISING_EDGE |</div><div class='del'>-				PTP_STRICT_FLAGS))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	pin = ptp_find_pin(phc-&gt;clock, PTP_PF_EXTTS, rq-&gt;extts.index);</div><div class='ctx'> 	if (pin == -1 || pin &gt;= LAN966X_PHC_PINS_NUM)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -978,6 +994,10 @@ static struct ptp_clock_info lan966x_ptp_clock_info = {</div><div class='ctx'> 	.n_per_out	= LAN966X_PHC_PINS_NUM,</div><div class='ctx'> 	.n_ext_ts	= LAN966X_PHC_PINS_NUM,</div><div class='ctx'> 	.n_pins		= LAN966X_PHC_PINS_NUM,</div><div class='add'>+	.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+				 PTP_STRICT_FLAGS,</div><div class='add'>+	.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE |</div><div class='add'>+				  PTP_PEROUT_PHASE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int lan966x_ptp_phc_init(struct lan966x *lan966x,</div><div class='hunk'>@@ -1109,5 +1129,5 @@ void lan966x_ptp_rxtstamp(struct lan966x *lan966x, struct sk_buff *skb,</div><div class='ctx'> u32 lan966x_ptp_get_period_ps(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* This represents the system clock period in picoseconds */</div><div class='del'>-	return 15125;</div><div class='add'>+	return PICO / LAN9X66_CLOCK_RATE;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_switchdev.c b/drivers/net/ethernet/microchip/lan966x/lan966x_switchdev.c<br/>index 1c88120eb291..bcb4db76b75c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_switchdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_switchdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_switchdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan966x/lan966x_switchdev.c</a></div><div class='hunk'>@@ -297,6 +297,7 @@ static void lan966x_port_bridge_leave(struct lan966x_port *port,</div><div class='ctx'> 	lan966x_vlan_port_set_vlan_aware(port, false);</div><div class='ctx'> 	lan966x_vlan_port_set_vid(port, HOST_PVID, false, false);</div><div class='ctx'> 	lan966x_vlan_port_apply(port);</div><div class='add'>+	lan966x_vlan_port_rew_host(port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int lan966x_port_changeupper(struct net_device *dev,</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c b/drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c<br/>index a1471e38d118..2a37fc1ba4bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c</a></div><div class='hunk'>@@ -403,11 +403,11 @@ static void lan966x_es0_read_esdx_counter(struct lan966x *lan966x,</div><div class='ctx'> 	u32 counter;</div><div class='ctx'> </div><div class='ctx'> 	id = id &amp; 0xff; /* counter limit */</div><div class='del'>-	mutex_lock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_lock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> 	lan_wr(SYS_STAT_CFG_STAT_VIEW_SET(id), lan966x, SYS_STAT_CFG);</div><div class='ctx'> 	counter = lan_rd(lan966x, SYS_CNT(LAN966X_STAT_ESDX_GRN_PKTS)) +</div><div class='ctx'> 		  lan_rd(lan966x, SYS_CNT(LAN966X_STAT_ESDX_YEL_PKTS));</div><div class='del'>-	mutex_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> 	if (counter)</div><div class='ctx'> 		admin-&gt;cache.counter = counter;</div><div class='ctx'> }</div><div class='hunk'>@@ -417,14 +417,14 @@ static void lan966x_es0_write_esdx_counter(struct lan966x *lan966x,</div><div class='ctx'> {</div><div class='ctx'> 	id = id &amp; 0xff; /* counter limit */</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_lock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> 	lan_wr(SYS_STAT_CFG_STAT_VIEW_SET(id), lan966x, SYS_STAT_CFG);</div><div class='ctx'> 	lan_wr(0, lan966x, SYS_CNT(LAN966X_STAT_ESDX_GRN_BYTES));</div><div class='ctx'> 	lan_wr(admin-&gt;cache.counter, lan966x,</div><div class='ctx'> 	       SYS_CNT(LAN966X_STAT_ESDX_GRN_PKTS));</div><div class='ctx'> 	lan_wr(0, lan966x, SYS_CNT(LAN966X_STAT_ESDX_YEL_BYTES));</div><div class='ctx'> 	lan_wr(0, lan966x, SYS_CNT(LAN966X_STAT_ESDX_YEL_PKTS));</div><div class='del'>-	mutex_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='add'>+	spin_unlock(&amp;lan966x-&gt;stats_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan966x_vcap_cache_write(struct net_device *dev,</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c b/drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c<br/>index fa34a739c748..7da22520724c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c</a></div><div class='hunk'>@@ -149,6 +149,27 @@ void lan966x_vlan_port_set_vlan_aware(struct lan966x_port *port,</div><div class='ctx'> 	port-&gt;vlan_aware = vlan_aware;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* When the interface is in host mode, the interface should not be vlan aware</div><div class='add'>+ * but it should insert all the tags that it gets from the network stack.</div><div class='add'>+ * The tags are not in the data of the frame but actually in the skb and the ifh</div><div class='add'>+ * is configured already to get this tag. So what we need to do is to update the</div><div class='add'>+ * rewriter to insert the vlan tag for all frames which have a vlan tag</div><div class='add'>+ * different than 0.</div><div class='add'>+ */</div><div class='add'>+void lan966x_vlan_port_rew_host(struct lan966x_port *port)</div><div class='add'>+{</div><div class='add'>+	struct lan966x *lan966x = port-&gt;lan966x;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Tag all frames except when VID=0*/</div><div class='add'>+	val = REW_TAG_CFG_TAG_CFG_SET(2);</div><div class='add'>+</div><div class='add'>+	/* Update only some bits in the register */</div><div class='add'>+	lan_rmw(val,</div><div class='add'>+		REW_TAG_CFG_TAG_CFG,</div><div class='add'>+		lan966x, REW_TAG_CFG(port-&gt;chip_port));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void lan966x_vlan_port_apply(struct lan966x_port *port)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan966x *lan966x = port-&gt;lan966x;</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan969x/Kconfig b/drivers/net/ethernet/microchip/lan969x/Kconfig<br/>deleted file mode 100644<br/>index 728180d3fa33..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan969x/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan969x/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,5 +0,0 @@</div><div class='del'>-config LAN969X_SWITCH</div><div class='del'>-	tristate "Lan969x switch driver"</div><div class='del'>-	depends on SPARX5_SWITCH</div><div class='del'>-	help</div><div class='del'>-	  This driver supports the lan969x family of network switch devices.</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan969x/Makefile b/drivers/net/ethernet/microchip/lan969x/Makefile<br/>deleted file mode 100644<br/>index 82d318a7219c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan969x/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan969x/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-#</div><div class='del'>-# Makefile for the Microchip lan969x network device drivers.</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_LAN969X_SWITCH) += lan969x-switch.o</div><div class='del'>-</div><div class='del'>-lan969x-switch-y := lan969x_regs.o lan969x.o lan969x_calendar.o</div><div class='del'>-</div><div class='del'>-# Provide include files</div><div class='del'>-ccflags-y += -I$(srctree)/drivers/net/ethernet/microchip/fdma</div><div class='del'>-ccflags-y += -I$(srctree)/drivers/net/ethernet/microchip/vcap</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/Kconfig b/drivers/net/ethernet/microchip/sparx5/Kconfig<br/>index 3f04992eace6..a4d6706590d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/Kconfig</a></div><div class='hunk'>@@ -3,7 +3,7 @@ config SPARX5_SWITCH</div><div class='ctx'> 	depends on NET_SWITCHDEV</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='ctx'> 	depends on OF</div><div class='del'>-	depends on ARCH_SPARX5 || COMPILE_TEST</div><div class='add'>+	depends on ARCH_SPARX5 || ARCH_LAN969X || COMPILE_TEST</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	depends on BRIDGE || BRIDGE=n</div><div class='ctx'> 	select PHYLINK</div><div class='hunk'>@@ -24,3 +24,10 @@ config SPARX5_DCB</div><div class='ctx'> 	  DSCP and PCP.</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, set to Y.</div><div class='add'>+</div><div class='add'>+config LAN969X_SWITCH</div><div class='add'>+	bool "Lan969x switch driver"</div><div class='add'>+	depends on SPARX5_SWITCH</div><div class='add'>+	select PAGE_POOL</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the lan969x family of network switch devices.</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/Makefile b/drivers/net/ethernet/microchip/sparx5/Makefile<br/>index 3435ca86dd70..d447f9e84d92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/Makefile</a></div><div class='hunk'>@@ -16,6 +16,14 @@ sparx5-switch-y  := sparx5_main.o sparx5_packet.o \</div><div class='ctx'> sparx5-switch-$(CONFIG_SPARX5_DCB) += sparx5_dcb.o</div><div class='ctx'> sparx5-switch-$(CONFIG_DEBUG_FS) += sparx5_vcap_debugfs.o</div><div class='ctx'> </div><div class='add'>+sparx5-switch-$(CONFIG_LAN969X_SWITCH) += lan969x/lan969x_regs.o \</div><div class='add'>+					  lan969x/lan969x.o \</div><div class='add'>+					  lan969x/lan969x_calendar.o \</div><div class='add'>+					  lan969x/lan969x_vcap_ag_api.o \</div><div class='add'>+					  lan969x/lan969x_vcap_impl.o \</div><div class='add'>+					  lan969x/lan969x_rgmii.o \</div><div class='add'>+					  lan969x/lan969x_fdma.o</div><div class='add'>+</div><div class='ctx'> # Provide include files</div><div class='ctx'> ccflags-y += -I$(srctree)/drivers/net/ethernet/microchip/vcap</div><div class='ctx'> ccflags-y += -I$(srctree)/drivers/net/ethernet/microchip/fdma</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan969x/lan969x.c b/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.c<br/>index 79e5bcefbd73..f3a9c71bea36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan969x/lan969x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan969x/lan969x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.c</a></div><div class='hunk'>@@ -90,9 +90,12 @@ static const struct sparx5_main_io_resource lan969x_main_iomap[] =  {</div><div class='ctx'> 	{ TARGET_DEV2G5 + 27,         0x30d8000, 1 }, /* 0xe30d8000 */</div><div class='ctx'> 	{ TARGET_DEV10G +  9,         0x30dc000, 1 }, /* 0xe30dc000 */</div><div class='ctx'> 	{ TARGET_PCS10G_BR +  9,      0x30e0000, 1 }, /* 0xe30e0000 */</div><div class='add'>+	{ TARGET_DEVRGMII,            0x30e4000, 1 }, /* 0xe30e4000 */</div><div class='add'>+	{ TARGET_DEVRGMII +  1,       0x30e8000, 1 }, /* 0xe30e8000 */</div><div class='ctx'> 	{ TARGET_DSM,                 0x30ec000, 1 }, /* 0xe30ec000 */</div><div class='ctx'> 	{ TARGET_PORT_CONF,           0x30f0000, 1 }, /* 0xe30f0000 */</div><div class='ctx'> 	{ TARGET_ASM,                 0x3200000, 1 }, /* 0xe3200000 */</div><div class='add'>+	{ TARGET_HSIO_WRAP,           0x3408000, 1 }, /* 0xe3408000 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct sparx5_sdlb_group lan969x_sdlb_groups[LAN969X_SDLB_GRP_CNT] = {</div><div class='hunk'>@@ -273,9 +276,9 @@ static irqreturn_t lan969x_ptp_irq_handler(int irq, void *args)</div><div class='ctx'> 		if (WARN_ON(!skb_match))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		spin_lock(&amp;sparx5-&gt;ptp_ts_id_lock);</div><div class='add'>+		spin_lock_irqsave(&amp;sparx5-&gt;ptp_ts_id_lock, flags);</div><div class='ctx'> 		sparx5-&gt;ptp_skbs--;</div><div class='del'>-		spin_unlock(&amp;sparx5-&gt;ptp_ts_id_lock);</div><div class='add'>+		spin_unlock_irqrestore(&amp;sparx5-&gt;ptp_ts_id_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 		/* Get the h/w timestamp */</div><div class='ctx'> 		sparx5_get_hwtimestamp(sparx5, &amp;ts, delay);</div><div class='hunk'>@@ -319,6 +322,9 @@ static const struct sparx5_consts lan969x_consts = {</div><div class='ctx'> 	.qres_max_prio_idx   = 315,</div><div class='ctx'> 	.qres_max_colour_idx = 323,</div><div class='ctx'> 	.tod_pin             = 4,</div><div class='add'>+	.vcaps               = lan969x_vcaps,</div><div class='add'>+	.vcap_stats          = &amp;lan969x_vcap_stats,</div><div class='add'>+	.vcaps_cfg           = lan969x_vcap_inst_cfg,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct sparx5_ops lan969x_ops = {</div><div class='hunk'>@@ -326,6 +332,7 @@ static const struct sparx5_ops lan969x_ops = {</div><div class='ctx'> 	.is_port_5g              = &amp;lan969x_port_is_5g,</div><div class='ctx'> 	.is_port_10g             = &amp;lan969x_port_is_10g,</div><div class='ctx'> 	.is_port_25g             = &amp;lan969x_port_is_25g,</div><div class='add'>+	.is_port_rgmii           = &amp;lan969x_port_is_rgmii,</div><div class='ctx'> 	.get_port_dev_index      = &amp;lan969x_port_dev_mapping,</div><div class='ctx'> 	.get_port_dev_bit        = &amp;lan969x_get_dev_mode_bit,</div><div class='ctx'> 	.get_hsch_max_group_rate = &amp;lan969x_get_hsch_max_group_rate,</div><div class='hunk'>@@ -333,6 +340,11 @@ static const struct sparx5_ops lan969x_ops = {</div><div class='ctx'> 	.set_port_mux            = &amp;lan969x_port_mux_set,</div><div class='ctx'> 	.ptp_irq_handler         = &amp;lan969x_ptp_irq_handler,</div><div class='ctx'> 	.dsm_calendar_calc       = &amp;lan969x_dsm_calendar_calc,</div><div class='add'>+	.port_config_rgmii       = &amp;lan969x_port_config_rgmii,</div><div class='add'>+	.fdma_init               = &amp;lan969x_fdma_init,</div><div class='add'>+	.fdma_deinit             = &amp;lan969x_fdma_deinit,</div><div class='add'>+	.fdma_poll               = &amp;lan969x_fdma_napi_poll,</div><div class='add'>+	.fdma_xmit               = &amp;lan969x_fdma_xmit,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct sparx5_match_data lan969x_desc = {</div><div class='hunk'>@@ -343,8 +355,3 @@ const struct sparx5_match_data lan969x_desc = {</div><div class='ctx'> 	.consts     = &amp;lan969x_consts,</div><div class='ctx'> 	.ops        = &amp;lan969x_ops,</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(lan969x_desc);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Microchip lan969x switch driver");</div><div class='del'>-MODULE_AUTHOR("Daniel Machon &lt;daniel.machon@microchip.com&gt;");</div><div class='del'>-MODULE_LICENSE("Dual MIT/GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan969x/lan969x.h b/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.h<br/>index 7ce047ad9ca4..529fde3d4deb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan969x/lan969x.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan969x/lan969x.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.h</a></div><div class='hunk'>@@ -9,10 +9,18 @@</div><div class='ctx'> </div><div class='ctx'> #include "../sparx5/sparx5_main.h"</div><div class='ctx'> #include "../sparx5/sparx5_regs.h"</div><div class='add'>+#include "../sparx5/sparx5_vcap_impl.h"</div><div class='ctx'> </div><div class='ctx'> /* lan969x.c */</div><div class='ctx'> extern const struct sparx5_match_data lan969x_desc;</div><div class='ctx'> </div><div class='add'>+/* lan969x_vcap_ag_api.c */</div><div class='add'>+extern const struct vcap_statistics lan969x_vcap_stats;</div><div class='add'>+extern const struct vcap_info lan969x_vcaps[];</div><div class='add'>+</div><div class='add'>+/* lan969x_vcap_impl.c */</div><div class='add'>+extern const struct sparx5_vcap_inst lan969x_vcap_inst_cfg[];</div><div class='add'>+</div><div class='ctx'> /* lan969x_regs.c */</div><div class='ctx'> extern const unsigned int lan969x_tsize[TSIZE_LAST];</div><div class='ctx'> extern const unsigned int lan969x_raddr[RADDR_LAST];</div><div class='hunk'>@@ -51,7 +59,24 @@ static inline bool lan969x_port_is_25g(int portno)</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool lan969x_port_is_rgmii(int portno)</div><div class='add'>+{</div><div class='add'>+	return portno == 28 || portno == 29;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* lan969x_calendar.c */</div><div class='ctx'> int lan969x_dsm_calendar_calc(struct sparx5 *sparx5, u32 taxi,</div><div class='ctx'> 			      struct sparx5_calendar_data *data);</div><div class='add'>+</div><div class='add'>+/* lan969x_rgmii.c */</div><div class='add'>+int lan969x_port_config_rgmii(struct sparx5_port *port,</div><div class='add'>+			      struct sparx5_port_config *conf);</div><div class='add'>+</div><div class='add'>+/* lan969x_fdma.c */</div><div class='add'>+int lan969x_fdma_init(struct sparx5 *sparx5);</div><div class='add'>+int lan969x_fdma_deinit(struct sparx5 *sparx5);</div><div class='add'>+int lan969x_fdma_napi_poll(struct napi_struct *napi, int weight);</div><div class='add'>+int lan969x_fdma_xmit(struct sparx5 *sparx5, u32 *ifh, struct sk_buff *skb,</div><div class='add'>+		      struct net_device *dev);</div><div class='add'>+</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan969x/lan969x_calendar.c b/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_calendar.c<br/>index e857640df185..e857640df185 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan969x/lan969x_calendar.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan969x/lan969x_calendar.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_calendar.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_calendar.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c b/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c<br/>new file mode 100644<br/>index 000000000000..1282f5c3ee6d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c</a></div><div class='hunk'>@@ -0,0 +1,406 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/* Microchip lan969x Switch driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025 Microchip Technology Inc. and its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../sparx5_main.h"</div><div class='add'>+#include "../sparx5_main_regs.h"</div><div class='add'>+#include "../sparx5_port.h"</div><div class='add'>+</div><div class='add'>+#include "fdma_api.h"</div><div class='add'>+#include "lan969x.h"</div><div class='add'>+</div><div class='add'>+#define FDMA_PRIV(fdma) ((struct sparx5 *)((fdma)-&gt;priv))</div><div class='add'>+</div><div class='add'>+static int lan969x_fdma_tx_dataptr_cb(struct fdma *fdma, int dcb, int db,</div><div class='add'>+				      u64 *dataptr)</div><div class='add'>+{</div><div class='add'>+	*dataptr = FDMA_PRIV(fdma)-&gt;tx.dbs[dcb].dma_addr;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan969x_fdma_rx_dataptr_cb(struct fdma *fdma, int dcb, int db,</div><div class='add'>+				      u64 *dataptr)</div><div class='add'>+{</div><div class='add'>+	struct sparx5_rx *rx = &amp;FDMA_PRIV(fdma)-&gt;rx;</div><div class='add'>+	struct page *page;</div><div class='add'>+</div><div class='add'>+	page = page_pool_dev_alloc_pages(rx-&gt;page_pool);</div><div class='add'>+	if (unlikely(!page))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rx-&gt;page[dcb][db] = page;</div><div class='add'>+</div><div class='add'>+	*dataptr = page_pool_get_dma_addr(page);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan969x_fdma_get_next_dcb(struct sparx5_tx *tx)</div><div class='add'>+{</div><div class='add'>+	struct fdma *fdma = &amp;tx-&gt;fdma;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; fdma-&gt;n_dcbs; ++i)</div><div class='add'>+		if (!tx-&gt;dbs[i].used &amp;&amp; !fdma_is_last(fdma, &amp;fdma-&gt;dcbs[i]))</div><div class='add'>+			return i;</div><div class='add'>+</div><div class='add'>+	return -ENOSPC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan969x_fdma_tx_clear_buf(struct sparx5 *sparx5, int weight)</div><div class='add'>+{</div><div class='add'>+	struct fdma *fdma = &amp;sparx5-&gt;tx.fdma;</div><div class='add'>+	struct sparx5_tx_buf *db;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;sparx5-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fdma-&gt;n_dcbs; ++i) {</div><div class='add'>+		db = &amp;sparx5-&gt;tx.dbs[i];</div><div class='add'>+</div><div class='add'>+		if (!db-&gt;used)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!fdma_db_is_done(fdma_db_get(fdma, i, 0)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		db-&gt;dev-&gt;stats.tx_bytes += db-&gt;skb-&gt;len;</div><div class='add'>+		db-&gt;dev-&gt;stats.tx_packets++;</div><div class='add'>+		sparx5-&gt;tx.packets++;</div><div class='add'>+</div><div class='add'>+		dma_unmap_single(sparx5-&gt;dev,</div><div class='add'>+				 db-&gt;dma_addr,</div><div class='add'>+				 db-&gt;skb-&gt;len,</div><div class='add'>+				 DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+		if (!db-&gt;ptp)</div><div class='add'>+			napi_consume_skb(db-&gt;skb, weight);</div><div class='add'>+</div><div class='add'>+		db-&gt;used = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;sparx5-&gt;tx_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan969x_fdma_free_pages(struct sparx5_rx *rx)</div><div class='add'>+{</div><div class='add'>+	struct fdma *fdma = &amp;rx-&gt;fdma;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; fdma-&gt;n_dcbs; ++i) {</div><div class='add'>+		for (int j = 0; j &lt; fdma-&gt;n_dbs; ++j)</div><div class='add'>+			page_pool_put_full_page(rx-&gt;page_pool,</div><div class='add'>+						rx-&gt;page[i][j], false);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *lan969x_fdma_rx_get_frame(struct sparx5 *sparx5,</div><div class='add'>+						 struct sparx5_rx *rx)</div><div class='add'>+{</div><div class='add'>+	const struct sparx5_consts *consts = sparx5-&gt;data-&gt;consts;</div><div class='add'>+	struct fdma *fdma = &amp;rx-&gt;fdma;</div><div class='add'>+	struct sparx5_port *port;</div><div class='add'>+	struct frame_info fi;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct fdma_db *db;</div><div class='add'>+	struct page *page;</div><div class='add'>+</div><div class='add'>+	db = &amp;fdma-&gt;dcbs[fdma-&gt;dcb_index].db[fdma-&gt;db_index];</div><div class='add'>+	page = rx-&gt;page[fdma-&gt;dcb_index][fdma-&gt;db_index];</div><div class='add'>+</div><div class='add'>+	sparx5_ifh_parse(sparx5, page_address(page), &amp;fi);</div><div class='add'>+	port = fi.src_port &lt; consts-&gt;n_ports ? sparx5-&gt;ports[fi.src_port] :</div><div class='add'>+					       NULL;</div><div class='add'>+	if (WARN_ON(!port))</div><div class='add'>+		goto free_page;</div><div class='add'>+</div><div class='add'>+	skb = build_skb(page_address(page), fdma-&gt;db_size);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		goto free_page;</div><div class='add'>+</div><div class='add'>+	skb_mark_for_recycle(skb);</div><div class='add'>+	skb_put(skb, fdma_db_len_get(db));</div><div class='add'>+	skb_pull(skb, IFH_LEN * sizeof(u32));</div><div class='add'>+</div><div class='add'>+	skb-&gt;dev = port-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	if (likely(!(skb-&gt;dev-&gt;features &amp; NETIF_F_RXFCS)))</div><div class='add'>+		skb_trim(skb, skb-&gt;len - ETH_FCS_LEN);</div><div class='add'>+</div><div class='add'>+	sparx5_ptp_rxtstamp(sparx5, skb, fi.timestamp);</div><div class='add'>+	skb-&gt;protocol = eth_type_trans(skb, skb-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (test_bit(port-&gt;portno, sparx5-&gt;bridge_mask))</div><div class='add'>+		skb-&gt;offload_fwd_mark = 1;</div><div class='add'>+</div><div class='add'>+	skb-&gt;dev-&gt;stats.rx_bytes += skb-&gt;len;</div><div class='add'>+	skb-&gt;dev-&gt;stats.rx_packets++;</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+</div><div class='add'>+free_page:</div><div class='add'>+	page_pool_recycle_direct(rx-&gt;page_pool, page);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan969x_fdma_rx_alloc(struct sparx5 *sparx5)</div><div class='add'>+{</div><div class='add'>+	struct sparx5_rx *rx = &amp;sparx5-&gt;rx;</div><div class='add'>+	struct fdma *fdma = &amp;rx-&gt;fdma;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	struct page_pool_params pp_params = {</div><div class='add'>+		.order = 0,</div><div class='add'>+		.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV,</div><div class='add'>+		.pool_size = fdma-&gt;n_dcbs * fdma-&gt;n_dbs,</div><div class='add'>+		.nid = NUMA_NO_NODE,</div><div class='add'>+		.dev = sparx5-&gt;dev,</div><div class='add'>+		.dma_dir = DMA_FROM_DEVICE,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.max_len = fdma-&gt;db_size -</div><div class='add'>+			   SKB_DATA_ALIGN(sizeof(struct skb_shared_info)),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rx-&gt;page_pool = page_pool_create(&amp;pp_params);</div><div class='add'>+	if (IS_ERR(rx-&gt;page_pool))</div><div class='add'>+		return PTR_ERR(rx-&gt;page_pool);</div><div class='add'>+</div><div class='add'>+	err = fdma_alloc_coherent(sparx5-&gt;dev, fdma);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	fdma_dcbs_init(fdma,</div><div class='add'>+		       FDMA_DCB_INFO_DATAL(fdma-&gt;db_size),</div><div class='add'>+		       FDMA_DCB_STATUS_INTR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan969x_fdma_tx_alloc(struct sparx5 *sparx5)</div><div class='add'>+{</div><div class='add'>+	struct sparx5_tx *tx = &amp;sparx5-&gt;tx;</div><div class='add'>+	struct fdma *fdma = &amp;tx-&gt;fdma;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	tx-&gt;dbs = kcalloc(fdma-&gt;n_dcbs,</div><div class='add'>+			  sizeof(struct sparx5_tx_buf),</div><div class='add'>+			  GFP_KERNEL);</div><div class='add'>+	if (!tx-&gt;dbs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = fdma_alloc_coherent(sparx5-&gt;dev, fdma);</div><div class='add'>+	if (err) {</div><div class='add'>+		kfree(tx-&gt;dbs);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fdma_dcbs_init(fdma,</div><div class='add'>+		       FDMA_DCB_INFO_DATAL(fdma-&gt;db_size),</div><div class='add'>+		       FDMA_DCB_STATUS_DONE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan969x_fdma_rx_init(struct sparx5 *sparx5)</div><div class='add'>+{</div><div class='add'>+	struct fdma *fdma = &amp;sparx5-&gt;rx.fdma;</div><div class='add'>+</div><div class='add'>+	fdma-&gt;channel_id = FDMA_XTR_CHANNEL;</div><div class='add'>+	fdma-&gt;n_dcbs = FDMA_DCB_MAX;</div><div class='add'>+	fdma-&gt;n_dbs = 1;</div><div class='add'>+	fdma-&gt;priv = sparx5;</div><div class='add'>+	fdma-&gt;size = fdma_get_size(fdma);</div><div class='add'>+	fdma-&gt;db_size = PAGE_SIZE;</div><div class='add'>+	fdma-&gt;ops.dataptr_cb = &amp;lan969x_fdma_rx_dataptr_cb;</div><div class='add'>+	fdma-&gt;ops.nextptr_cb = &amp;fdma_nextptr_cb;</div><div class='add'>+</div><div class='add'>+	/* Fetch a netdev for SKB and NAPI use, any will do */</div><div class='add'>+	for (int idx = 0; idx &lt; sparx5-&gt;data-&gt;consts-&gt;n_ports; ++idx) {</div><div class='add'>+		struct sparx5_port *port = sparx5-&gt;ports[idx];</div><div class='add'>+</div><div class='add'>+		if (port &amp;&amp; port-&gt;ndev) {</div><div class='add'>+			sparx5-&gt;rx.ndev = port-&gt;ndev;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan969x_fdma_tx_init(struct sparx5 *sparx5)</div><div class='add'>+{</div><div class='add'>+	struct fdma *fdma = &amp;sparx5-&gt;tx.fdma;</div><div class='add'>+</div><div class='add'>+	fdma-&gt;channel_id = FDMA_INJ_CHANNEL;</div><div class='add'>+	fdma-&gt;n_dcbs = FDMA_DCB_MAX;</div><div class='add'>+	fdma-&gt;n_dbs = 1;</div><div class='add'>+	fdma-&gt;priv = sparx5;</div><div class='add'>+	fdma-&gt;size = fdma_get_size(fdma);</div><div class='add'>+	fdma-&gt;db_size = PAGE_SIZE;</div><div class='add'>+	fdma-&gt;ops.dataptr_cb = &amp;lan969x_fdma_tx_dataptr_cb;</div><div class='add'>+	fdma-&gt;ops.nextptr_cb = &amp;fdma_nextptr_cb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan969x_fdma_napi_poll(struct napi_struct *napi, int weight)</div><div class='add'>+{</div><div class='add'>+	struct sparx5_rx *rx = container_of(napi, struct sparx5_rx, napi);</div><div class='add'>+	struct sparx5 *sparx5 = container_of(rx, struct sparx5, rx);</div><div class='add'>+	int old_dcb, dcb_reload, counter = 0;</div><div class='add'>+	struct fdma *fdma = &amp;rx-&gt;fdma;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	dcb_reload = fdma-&gt;dcb_index;</div><div class='add'>+</div><div class='add'>+	lan969x_fdma_tx_clear_buf(sparx5, weight);</div><div class='add'>+</div><div class='add'>+	/* Process RX data */</div><div class='add'>+	while (counter &lt; weight) {</div><div class='add'>+		if (!fdma_has_frames(fdma))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		skb = lan969x_fdma_rx_get_frame(sparx5, rx);</div><div class='add'>+		if (!skb)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		napi_gro_receive(&amp;rx-&gt;napi, skb);</div><div class='add'>+</div><div class='add'>+		fdma_db_advance(fdma);</div><div class='add'>+		counter++;</div><div class='add'>+		/* Check if the DCB can be reused */</div><div class='add'>+		if (fdma_dcb_is_reusable(fdma))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		fdma_db_reset(fdma);</div><div class='add'>+		fdma_dcb_advance(fdma);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allocate new pages and map them */</div><div class='add'>+	while (dcb_reload != fdma-&gt;dcb_index) {</div><div class='add'>+		old_dcb = dcb_reload;</div><div class='add'>+		dcb_reload++;</div><div class='add'>+		 /* n_dcbs must be a power of 2 */</div><div class='add'>+		dcb_reload &amp;= fdma-&gt;n_dcbs - 1;</div><div class='add'>+</div><div class='add'>+		fdma_dcb_add(fdma,</div><div class='add'>+			     old_dcb,</div><div class='add'>+			     FDMA_DCB_INFO_DATAL(fdma-&gt;db_size),</div><div class='add'>+			     FDMA_DCB_STATUS_INTR);</div><div class='add'>+</div><div class='add'>+		sparx5_fdma_reload(sparx5, fdma);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (counter &lt; weight &amp;&amp; napi_complete_done(napi, counter))</div><div class='add'>+		spx5_wr(0xff, sparx5, FDMA_INTR_DB_ENA);</div><div class='add'>+</div><div class='add'>+	return counter;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan969x_fdma_xmit(struct sparx5 *sparx5, u32 *ifh, struct sk_buff *skb,</div><div class='add'>+		      struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	int next_dcb, needed_headroom, needed_tailroom, err;</div><div class='add'>+	struct sparx5_tx *tx = &amp;sparx5-&gt;tx;</div><div class='add'>+	struct fdma *fdma = &amp;tx-&gt;fdma;</div><div class='add'>+	struct sparx5_tx_buf *db_buf;</div><div class='add'>+	u64 status;</div><div class='add'>+</div><div class='add'>+	next_dcb = lan969x_fdma_get_next_dcb(tx);</div><div class='add'>+	if (next_dcb &lt; 0)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	needed_headroom = max_t(int, IFH_LEN * 4 - skb_headroom(skb), 0);</div><div class='add'>+	needed_tailroom = max_t(int, ETH_FCS_LEN - skb_tailroom(skb), 0);</div><div class='add'>+	if (needed_headroom || needed_tailroom || skb_header_cloned(skb)) {</div><div class='add'>+		err = pskb_expand_head(skb, needed_headroom, needed_tailroom,</div><div class='add'>+				       GFP_ATOMIC);</div><div class='add'>+		if (unlikely(err))</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_push(skb, IFH_LEN * 4);</div><div class='add'>+	memcpy(skb-&gt;data, ifh, IFH_LEN * 4);</div><div class='add'>+	skb_put(skb, ETH_FCS_LEN);</div><div class='add'>+</div><div class='add'>+	db_buf = &amp;tx-&gt;dbs[next_dcb];</div><div class='add'>+	db_buf-&gt;dma_addr = dma_map_single(sparx5-&gt;dev,</div><div class='add'>+					  skb-&gt;data,</div><div class='add'>+					  skb-&gt;len,</div><div class='add'>+					  DMA_TO_DEVICE);</div><div class='add'>+	if (dma_mapping_error(sparx5-&gt;dev, db_buf-&gt;dma_addr))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	db_buf-&gt;dev = dev;</div><div class='add'>+	db_buf-&gt;skb = skb;</div><div class='add'>+	db_buf-&gt;ptp = false;</div><div class='add'>+	db_buf-&gt;used = true;</div><div class='add'>+</div><div class='add'>+	if (skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP &amp;&amp;</div><div class='add'>+	    SPARX5_SKB_CB(skb)-&gt;rew_op == IFH_REW_OP_TWO_STEP_PTP)</div><div class='add'>+		db_buf-&gt;ptp = true;</div><div class='add'>+</div><div class='add'>+	status = FDMA_DCB_STATUS_SOF |</div><div class='add'>+		 FDMA_DCB_STATUS_EOF |</div><div class='add'>+		 FDMA_DCB_STATUS_BLOCKO(0) |</div><div class='add'>+		 FDMA_DCB_STATUS_BLOCKL(skb-&gt;len) |</div><div class='add'>+		 FDMA_DCB_STATUS_INTR;</div><div class='add'>+</div><div class='add'>+	fdma_dcb_advance(fdma);</div><div class='add'>+	fdma_dcb_add(fdma, next_dcb, 0, status);</div><div class='add'>+</div><div class='add'>+	sparx5_fdma_reload(sparx5, fdma);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan969x_fdma_init(struct sparx5 *sparx5)</div><div class='add'>+{</div><div class='add'>+	struct sparx5_rx *rx = &amp;sparx5-&gt;rx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	lan969x_fdma_rx_init(sparx5);</div><div class='add'>+	lan969x_fdma_tx_init(sparx5);</div><div class='add'>+	sparx5_fdma_injection_mode(sparx5);</div><div class='add'>+</div><div class='add'>+	err = dma_set_mask_and_coherent(sparx5-&gt;dev, DMA_BIT_MASK(64));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(sparx5-&gt;dev, "Failed to set 64-bit FDMA mask");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = lan969x_fdma_rx_alloc(sparx5);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(sparx5-&gt;dev, "Failed to allocate RX buffers: %d\n",</div><div class='add'>+			err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = lan969x_fdma_tx_alloc(sparx5);</div><div class='add'>+	if (err) {</div><div class='add'>+		fdma_free_coherent(sparx5-&gt;dev, &amp;rx-&gt;fdma);</div><div class='add'>+		dev_err(sparx5-&gt;dev, "Failed to allocate TX buffers: %d\n",</div><div class='add'>+			err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset FDMA state */</div><div class='add'>+	spx5_wr(FDMA_CTRL_NRESET_SET(0), sparx5, FDMA_CTRL);</div><div class='add'>+	spx5_wr(FDMA_CTRL_NRESET_SET(1), sparx5, FDMA_CTRL);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan969x_fdma_deinit(struct sparx5 *sparx5)</div><div class='add'>+{</div><div class='add'>+	struct sparx5_rx *rx = &amp;sparx5-&gt;rx;</div><div class='add'>+	struct sparx5_tx *tx = &amp;sparx5-&gt;tx;</div><div class='add'>+</div><div class='add'>+	sparx5_fdma_stop(sparx5);</div><div class='add'>+	fdma_free_coherent(sparx5-&gt;dev, &amp;tx-&gt;fdma);</div><div class='add'>+	fdma_free_coherent(sparx5-&gt;dev, &amp;rx-&gt;fdma);</div><div class='add'>+	lan969x_fdma_free_pages(rx);</div><div class='add'>+	page_pool_destroy(rx-&gt;page_pool);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/lan969x/lan969x_regs.c b/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_regs.c<br/>index ace4ba21eec4..ace4ba21eec4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/lan969x/lan969x_regs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/lan969x/lan969x_regs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_regs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_regs.c</a></div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_rgmii.c b/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_rgmii.c<br/>new file mode 100644<br/>index 000000000000..4e422ca50828<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_rgmii.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_rgmii.c</a></div><div class='hunk'>@@ -0,0 +1,224 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/* Microchip lan969x Switch driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "lan969x.h"</div><div class='add'>+</div><div class='add'>+/* Tx clock selectors */</div><div class='add'>+#define LAN969X_RGMII_TX_CLK_SEL_125MHZ 1  /* 1000Mbps */</div><div class='add'>+#define LAN969X_RGMII_TX_CLK_SEL_25MHZ  2  /* 100Mbps */</div><div class='add'>+#define LAN969X_RGMII_TX_CLK_SEL_2M5MHZ 3  /* 10Mbps */</div><div class='add'>+</div><div class='add'>+/* Port speed selectors */</div><div class='add'>+#define LAN969X_RGMII_SPEED_SEL_10 0   /* Select 10Mbps speed */</div><div class='add'>+#define LAN969X_RGMII_SPEED_SEL_100 1  /* Select 100Mbps speed */</div><div class='add'>+#define LAN969X_RGMII_SPEED_SEL_1000 2 /* Select 1000Mbps speed */</div><div class='add'>+</div><div class='add'>+/* Clock delay selectors */</div><div class='add'>+#define LAN969X_RGMII_CLK_DELAY_SEL_1_0_NS 2  /* Phase shift 45deg */</div><div class='add'>+#define LAN969X_RGMII_CLK_DELAY_SEL_1_7_NS 3  /* Phase shift 77deg */</div><div class='add'>+#define LAN969X_RGMII_CLK_DELAY_SEL_2_0_NS 4  /* Phase shift 90deg */</div><div class='add'>+#define LAN969X_RGMII_CLK_DELAY_SEL_2_5_NS 5  /* Phase shift 112deg */</div><div class='add'>+#define LAN969X_RGMII_CLK_DELAY_SEL_3_0_NS 6  /* Phase shift 135deg */</div><div class='add'>+#define LAN969X_RGMII_CLK_DELAY_SEL_3_3_NS 7  /* Phase shift 147deg */</div><div class='add'>+</div><div class='add'>+#define LAN969X_RGMII_PORT_START_IDX 28 /* Index of the first RGMII port */</div><div class='add'>+#define LAN969X_RGMII_IFG_TX 4          /* TX Inter Frame Gap value */</div><div class='add'>+#define LAN969X_RGMII_IFG_RX1 5         /* RX1 Inter Frame Gap value */</div><div class='add'>+#define LAN969X_RGMII_IFG_RX2 1         /* RX2 Inter Frame Gap value */</div><div class='add'>+</div><div class='add'>+#define RGMII_PORT_IDX(port) ((port)-&gt;portno - LAN969X_RGMII_PORT_START_IDX)</div><div class='add'>+</div><div class='add'>+/* Get the tx clock selector based on the port speed. */</div><div class='add'>+static int lan969x_rgmii_get_clk_sel(int speed)</div><div class='add'>+{</div><div class='add'>+	return (speed == SPEED_10  ? LAN969X_RGMII_TX_CLK_SEL_2M5MHZ :</div><div class='add'>+		speed == SPEED_100 ? LAN969X_RGMII_TX_CLK_SEL_25MHZ :</div><div class='add'>+				     LAN969X_RGMII_TX_CLK_SEL_125MHZ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Get the port speed selector based on the port speed. */</div><div class='add'>+static int lan969x_rgmii_get_speed_sel(int speed)</div><div class='add'>+{</div><div class='add'>+	return (speed == SPEED_10  ? LAN969X_RGMII_SPEED_SEL_10 :</div><div class='add'>+		speed == SPEED_100 ? LAN969X_RGMII_SPEED_SEL_100 :</div><div class='add'>+				     LAN969X_RGMII_SPEED_SEL_1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Get the clock delay selector based on the clock delay in picoseconds. */</div><div class='add'>+static int lan969x_rgmii_get_clk_delay_sel(struct sparx5_port *port,</div><div class='add'>+					   u32 delay_ps, u32 *clk_delay_sel)</div><div class='add'>+{</div><div class='add'>+	switch (delay_ps) {</div><div class='add'>+	case 0:</div><div class='add'>+		/* Hardware default selector. */</div><div class='add'>+		*clk_delay_sel = LAN969X_RGMII_CLK_DELAY_SEL_2_5_NS;</div><div class='add'>+		break;</div><div class='add'>+	case 1000:</div><div class='add'>+		*clk_delay_sel = LAN969X_RGMII_CLK_DELAY_SEL_1_0_NS;</div><div class='add'>+		break;</div><div class='add'>+	case 1700:</div><div class='add'>+		*clk_delay_sel = LAN969X_RGMII_CLK_DELAY_SEL_1_7_NS;</div><div class='add'>+		break;</div><div class='add'>+	case 2000:</div><div class='add'>+		*clk_delay_sel = LAN969X_RGMII_CLK_DELAY_SEL_2_0_NS;</div><div class='add'>+		break;</div><div class='add'>+	case 2500:</div><div class='add'>+		*clk_delay_sel = LAN969X_RGMII_CLK_DELAY_SEL_2_5_NS;</div><div class='add'>+		break;</div><div class='add'>+	case 3000:</div><div class='add'>+		*clk_delay_sel = LAN969X_RGMII_CLK_DELAY_SEL_3_0_NS;</div><div class='add'>+		break;</div><div class='add'>+	case 3300:</div><div class='add'>+		*clk_delay_sel = LAN969X_RGMII_CLK_DELAY_SEL_3_3_NS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(port-&gt;sparx5-&gt;dev, "Invalid RGMII delay: %u", delay_ps);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure the RGMII tx clock frequency. */</div><div class='add'>+static void lan969x_rgmii_tx_clk_config(struct sparx5_port *port,</div><div class='add'>+					struct sparx5_port_config *conf)</div><div class='add'>+{</div><div class='add'>+	u32 clk_sel = lan969x_rgmii_get_clk_sel(conf-&gt;speed);</div><div class='add'>+	u32 idx = RGMII_PORT_IDX(port);</div><div class='add'>+</div><div class='add'>+	/* Take the RGMII clock domain out of reset and set tx clock</div><div class='add'>+	 * frequency.</div><div class='add'>+	 */</div><div class='add'>+	spx5_rmw(HSIO_WRAP_RGMII_CFG_TX_CLK_CFG_SET(clk_sel) |</div><div class='add'>+		 HSIO_WRAP_RGMII_CFG_RGMII_TX_RST_SET(0) |</div><div class='add'>+		 HSIO_WRAP_RGMII_CFG_RGMII_RX_RST_SET(0),</div><div class='add'>+		 HSIO_WRAP_RGMII_CFG_TX_CLK_CFG |</div><div class='add'>+		 HSIO_WRAP_RGMII_CFG_RGMII_TX_RST |</div><div class='add'>+		 HSIO_WRAP_RGMII_CFG_RGMII_RX_RST,</div><div class='add'>+		 port-&gt;sparx5, HSIO_WRAP_RGMII_CFG(idx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure the RGMII port device. */</div><div class='add'>+static void lan969x_rgmii_port_device_config(struct sparx5_port *port,</div><div class='add'>+					     struct sparx5_port_config *conf)</div><div class='add'>+{</div><div class='add'>+	u32 dtag, dotag, etype, speed_sel, idx = RGMII_PORT_IDX(port);</div><div class='add'>+</div><div class='add'>+	speed_sel = lan969x_rgmii_get_speed_sel(conf-&gt;speed);</div><div class='add'>+</div><div class='add'>+	etype = (port-&gt;vlan_type == SPX5_VLAN_PORT_TYPE_S_CUSTOM ?</div><div class='add'>+		 port-&gt;custom_etype :</div><div class='add'>+		 port-&gt;vlan_type == SPX5_VLAN_PORT_TYPE_C ?</div><div class='add'>+		 ETH_P_8021Q : ETH_P_8021AD);</div><div class='add'>+</div><div class='add'>+	dtag = port-&gt;max_vlan_tags == SPX5_PORT_MAX_TAGS_TWO;</div><div class='add'>+	dotag = port-&gt;max_vlan_tags != SPX5_PORT_MAX_TAGS_NONE;</div><div class='add'>+</div><div class='add'>+	/* Enable the MAC. */</div><div class='add'>+	spx5_wr(DEVRGMII_MAC_ENA_CFG_RX_ENA_SET(1) |</div><div class='add'>+		DEVRGMII_MAC_ENA_CFG_TX_ENA_SET(1),</div><div class='add'>+		port-&gt;sparx5, DEVRGMII_MAC_ENA_CFG(idx));</div><div class='add'>+</div><div class='add'>+	/* Configure the Inter Frame Gap. */</div><div class='add'>+	spx5_wr(DEVRGMII_MAC_IFG_CFG_TX_IFG_SET(LAN969X_RGMII_IFG_TX) |</div><div class='add'>+		DEVRGMII_MAC_IFG_CFG_RX_IFG1_SET(LAN969X_RGMII_IFG_RX1) |</div><div class='add'>+		DEVRGMII_MAC_IFG_CFG_RX_IFG2_SET(LAN969X_RGMII_IFG_RX2),</div><div class='add'>+		port-&gt;sparx5, DEVRGMII_MAC_IFG_CFG(idx));</div><div class='add'>+</div><div class='add'>+	/* Configure port data rate. */</div><div class='add'>+	spx5_wr(DEVRGMII_DEV_RST_CTRL_SPEED_SEL_SET(speed_sel),</div><div class='add'>+		port-&gt;sparx5, DEVRGMII_DEV_RST_CTRL(idx));</div><div class='add'>+</div><div class='add'>+	/* Configure VLAN awareness. */</div><div class='add'>+	spx5_wr(DEVRGMII_MAC_TAGS_CFG_TAG_ID_SET(etype) |</div><div class='add'>+		DEVRGMII_MAC_TAGS_CFG_PB_ENA_SET(dtag) |</div><div class='add'>+		DEVRGMII_MAC_TAGS_CFG_VLAN_AWR_ENA_SET(dotag) |</div><div class='add'>+		DEVRGMII_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA_SET(dotag),</div><div class='add'>+		port-&gt;sparx5,</div><div class='add'>+		DEVRGMII_MAC_TAGS_CFG(idx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure the RGMII delay lines in the MAC.</div><div class='add'>+ *</div><div class='add'>+ * We use the rx-internal-delay-ps" and "tx-internal-delay-ps" properties to</div><div class='add'>+ * configure the rx and tx delays for the MAC. If these properties are missing</div><div class='add'>+ * or set to zero, the MAC will not apply any delay.</div><div class='add'>+ *</div><div class='add'>+ * The PHY side delays are determined by the PHY mode</div><div class='add'>+ * (e.g. PHY_INTERFACE_MODE_RGMII_{ID, RXID, TXID}), and ignored by the MAC side</div><div class='add'>+ * entirely.</div><div class='add'>+ */</div><div class='add'>+static int lan969x_rgmii_delay_config(struct sparx5_port *port,</div><div class='add'>+				      struct sparx5_port_config *conf)</div><div class='add'>+{</div><div class='add'>+	u32 tx_clk_sel, rx_clk_sel, tx_delay_ps = 0, rx_delay_ps = 0;</div><div class='add'>+	u32 idx = RGMII_PORT_IDX(port);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	of_property_read_u32(port-&gt;of_node, "rx-internal-delay-ps",</div><div class='add'>+			     &amp;rx_delay_ps);</div><div class='add'>+</div><div class='add'>+	of_property_read_u32(port-&gt;of_node, "tx-internal-delay-ps",</div><div class='add'>+			     &amp;tx_delay_ps);</div><div class='add'>+</div><div class='add'>+	err = lan969x_rgmii_get_clk_delay_sel(port, rx_delay_ps, &amp;rx_clk_sel);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = lan969x_rgmii_get_clk_delay_sel(port, tx_delay_ps, &amp;tx_clk_sel);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Configure rx delay. */</div><div class='add'>+	spx5_rmw(HSIO_WRAP_DLL_CFG_DLL_RST_SET(0) |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_ENA_SET(1) |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_CLK_ENA_SET(!!rx_delay_ps) |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_CLK_SEL_SET(rx_clk_sel),</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_RST |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_ENA |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_CLK_ENA |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_CLK_SEL,</div><div class='add'>+		 port-&gt;sparx5, HSIO_WRAP_DLL_CFG(idx, 0));</div><div class='add'>+</div><div class='add'>+	/* Configure tx delay. */</div><div class='add'>+	spx5_rmw(HSIO_WRAP_DLL_CFG_DLL_RST_SET(0) |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_ENA_SET(1) |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_CLK_ENA_SET(!!tx_delay_ps) |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_CLK_SEL_SET(tx_clk_sel),</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_RST |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_ENA |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_CLK_ENA |</div><div class='add'>+		 HSIO_WRAP_DLL_CFG_DLL_CLK_SEL,</div><div class='add'>+		 port-&gt;sparx5, HSIO_WRAP_DLL_CFG(idx, 1));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure GPIO's to be used as RGMII interface. */</div><div class='add'>+static void lan969x_rgmii_gpio_config(struct sparx5_port *port)</div><div class='add'>+{</div><div class='add'>+	u32 idx = RGMII_PORT_IDX(port);</div><div class='add'>+</div><div class='add'>+	/* Enable the RGMII on the GPIOs. */</div><div class='add'>+	spx5_wr(HSIO_WRAP_XMII_CFG_GPIO_XMII_CFG_SET(1), port-&gt;sparx5,</div><div class='add'>+		HSIO_WRAP_XMII_CFG(!idx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan969x_port_config_rgmii(struct sparx5_port *port,</div><div class='add'>+			      struct sparx5_port_config *conf)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = lan969x_rgmii_delay_config(port, conf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	lan969x_rgmii_tx_clk_config(port, conf);</div><div class='add'>+	lan969x_rgmii_gpio_config(port);</div><div class='add'>+	lan969x_rgmii_port_device_config(port, conf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_ag_api.c b/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_ag_api.c<br/>new file mode 100644<br/>index 000000000000..7acc5bcf337a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_ag_api.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_ag_api.c</a></div><div class='hunk'>@@ -0,0 +1,3843 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/* Copyright (C) 2024 Microchip Technology Inc. and its subsidiaries.</div><div class='add'>+ * Microchip VCAP API</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* This file is autogenerated by cml-utils 2024-10-07 11:10:56 +0200.</div><div class='add'>+ * Commit ID: b5ddc8e244eb2481a9524f1ddc630a8b41e7c391</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+</div><div class='add'>+#include "lan969x.h"</div><div class='add'>+</div><div class='add'>+/* keyfields */</div><div class='add'>+static const struct vcap_field is0_normal_7tuple_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 1,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_GEN_IDX_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 2,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_GEN_IDX] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 4,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U72,</div><div class='add'>+		.offset = 16,</div><div class='add'>+		.width = 65,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 81,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 82,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 83,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_TPID0] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 86,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP0] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 89,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 92,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID0] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 93,</div><div class='add'>+		.width = 12,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_TPID1] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 105,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP1] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 108,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI1] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 111,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID1] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 112,</div><div class='add'>+		.width = 12,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_TPID2] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 124,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP2] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 127,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI2] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 130,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID2] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 131,</div><div class='add'>+		.width = 12,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_DMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 144,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_SMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 192,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 240,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ETYPE_LEN_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 241,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ETYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 242,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP_SNAP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 258,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP4_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 259,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_FRAGMENT_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 260,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_FRAG_INVLD_L4_LEN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 262,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_OPTIONS_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 263,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DSCP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 264,</div><div class='add'>+		.width = 6,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP6_DIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U128,</div><div class='add'>+		.offset = 270,</div><div class='add'>+		.width = 128,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP6_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U128,</div><div class='add'>+		.offset = 398,</div><div class='add'>+		.width = 128,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_TCP_UDP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 526,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_TCP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 527,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SPORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 528,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 544,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field is0_normal_5tuple_ip4_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 2,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_GEN_IDX_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 3,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_GEN_IDX] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 5,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 15,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U72,</div><div class='add'>+		.offset = 17,</div><div class='add'>+		.width = 65,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 82,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 83,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_TPID0] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP0] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 90,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 93,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID0] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 94,</div><div class='add'>+		.width = 12,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_TPID1] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 106,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP1] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 109,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI1] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 112,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID1] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 113,</div><div class='add'>+		.width = 12,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_TPID2] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 125,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP2] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 128,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI2] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 131,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID2] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 132,</div><div class='add'>+		.width = 12,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 145,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP4_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 146,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_FRAGMENT_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 147,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_FRAG_INVLD_L4_LEN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 149,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_OPTIONS_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 150,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DSCP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 151,</div><div class='add'>+		.width = 6,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_DIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 157,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 189,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP_PROTO] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 221,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_TCP_UDP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 229,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_TCP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 230,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 231,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP_PAYLOAD_5TUPLE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 239,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field is2_mac_etype_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 4,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_PAG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 5,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_L3] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 18,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 20,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 52,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 53,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 54,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 56,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 57,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 67,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 80,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 81,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_FWD_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_RT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 88,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_DMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 89,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_SMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 137,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ETYPE_LEN_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 185,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ETYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 186,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_PAYLOAD_ETYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U64,</div><div class='add'>+		.offset = 202,</div><div class='add'>+		.width = 64,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 266,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_OAM_CCM_CNTS_EQ0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 282,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_OAM_Y1731_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 283,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field is2_arp_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 4,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_PAG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 5,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_L3] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 18,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 20,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 52,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 53,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 54,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 56,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 57,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 67,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 80,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 81,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_FWD_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_SMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 85,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_ADDR_SPACE_OK_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 133,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_PROTO_SPACE_OK_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 134,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_LEN_OK_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 135,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_TGT_MATCH_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 136,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_SENDER_MATCH_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 137,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_OPCODE_UNKNOWN_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 138,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_OPCODE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 139,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_DIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 141,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 173,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 205,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 206,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field is2_ip4_tcp_udp_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 4,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_PAG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 5,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_L3] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 18,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 20,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 52,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 53,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 54,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 56,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 57,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 67,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 80,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 81,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_FWD_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_RT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 88,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP4_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 89,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_FRAGMENT_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 90,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_FRAG_INVLD_L4_LEN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 92,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_OPTIONS_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 93,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TTL_GT0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 94,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TOS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 95,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_DIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 103,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 135,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 167,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_TCP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 168,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_DPORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 169,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SPORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 185,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 201,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SPORT_EQ_DPORT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 217,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SEQUENCE_EQ0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 218,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_FIN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 219,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SYN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 220,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RST] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 221,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_PSH] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 222,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_ACK] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 223,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_URG] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 224,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_PAYLOAD] = {</div><div class='add'>+		.type = VCAP_FIELD_U64,</div><div class='add'>+		.offset = 225,</div><div class='add'>+		.width = 64,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field is2_ip4_other_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 4,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_PAG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 5,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_L3] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 18,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 20,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 52,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 53,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 54,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 56,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 57,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 67,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 80,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 81,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_FWD_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_RT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 88,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP4_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 89,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_FRAGMENT_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 90,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_FRAG_INVLD_L4_LEN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 92,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_OPTIONS_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 93,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TTL_GT0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 94,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TOS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 95,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_DIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 103,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 135,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 167,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP_PROTO] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 168,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 176,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_PAYLOAD] = {</div><div class='add'>+		.type = VCAP_FIELD_U112,</div><div class='add'>+		.offset = 192,</div><div class='add'>+		.width = 96,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field is2_ip6_std_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 4,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_PAG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 5,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_L3] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 18,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 20,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 52,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 53,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 54,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 56,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 57,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 67,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 80,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 81,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_FWD_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_RT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TTL_GT0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 89,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP6_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U128,</div><div class='add'>+		.offset = 90,</div><div class='add'>+		.width = 128,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 218,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP_PROTO] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 219,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 227,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_PAYLOAD] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 243,</div><div class='add'>+		.width = 40,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field is2_ip_7tuple_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 2,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_PAG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 3,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_L3] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 11,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 12,</div><div class='add'>+		.width = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 16,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U72,</div><div class='add'>+		.offset = 18,</div><div class='add'>+		.width = 65,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 83,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 85,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 88,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 98,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 111,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 112,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_FWD_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 115,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_RT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 118,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 119,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_DMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 120,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_SMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 168,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP4_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 218,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TTL_GT0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 219,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TOS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 220,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP6_DIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U128,</div><div class='add'>+		.offset = 228,</div><div class='add'>+		.width = 128,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP6_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U128,</div><div class='add'>+		.offset = 356,</div><div class='add'>+		.width = 128,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 484,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_TCP_UDP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 485,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_TCP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 486,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_DPORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 487,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SPORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 503,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 519,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SPORT_EQ_DPORT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 535,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SEQUENCE_EQ0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 536,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_FIN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 537,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SYN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 538,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RST] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 539,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_PSH] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 540,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_ACK] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 541,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_URG] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 542,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_PAYLOAD] = {</div><div class='add'>+		.type = VCAP_FIELD_U64,</div><div class='add'>+		.offset = 543,</div><div class='add'>+		.width = 64,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field es0_isdx_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_NO] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 1,</div><div class='add'>+		.width = 6,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 7,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_COSID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 20,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_TPID] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 23,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DPL_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 26,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 27,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_PROT_ACTIVE] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 28,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 38,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field es2_mac_etype_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 3,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 15,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 16,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 26,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 28,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 41,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 44,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 76,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 77,</div><div class='add'>+		.width = 7,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_COSID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 88,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DPL_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 91,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_RT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 92,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_DMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 96,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_SMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 144,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ETYPE_LEN_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 192,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ETYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 193,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_PAYLOAD_ETYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U64,</div><div class='add'>+		.offset = 209,</div><div class='add'>+		.width = 64,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_OAM_CCM_CNTS_EQ0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 273,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_OAM_Y1731_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 274,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field es2_arp_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 3,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 15,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 16,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 26,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 28,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 41,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 44,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 76,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 77,</div><div class='add'>+		.width = 7,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_COSID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 88,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DPL_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 91,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_SMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 95,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_ADDR_SPACE_OK_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 143,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_PROTO_SPACE_OK_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 144,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_LEN_OK_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 145,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_TGT_MATCH_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 146,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_SENDER_MATCH_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 147,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_OPCODE_UNKNOWN_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 148,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ARP_OPCODE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 149,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_DIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 151,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 183,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 215,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field es2_ip4_tcp_udp_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 3,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 15,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 16,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 26,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 28,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 41,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 44,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 76,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 77,</div><div class='add'>+		.width = 7,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_COSID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 88,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DPL_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 91,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_RT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 92,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP4_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 96,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_FRAGMENT_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 97,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_OPTIONS_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 99,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TTL_GT0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 100,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TOS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 101,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_DIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 109,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 141,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 173,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_TCP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 174,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_DPORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 175,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SPORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 191,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 207,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SPORT_EQ_DPORT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 223,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SEQUENCE_EQ0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 224,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_FIN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 225,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SYN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 226,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RST] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 227,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_PSH] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 228,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_ACK] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 229,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_URG] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 230,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_PAYLOAD] = {</div><div class='add'>+		.type = VCAP_FIELD_U64,</div><div class='add'>+		.offset = 231,</div><div class='add'>+		.width = 64,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field es2_ip4_other_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 3,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 15,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 16,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 26,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 28,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 41,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 44,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 76,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 77,</div><div class='add'>+		.width = 7,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_COSID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 88,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DPL_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 91,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_RT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 92,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP4_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 96,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_FRAGMENT_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 97,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_OPTIONS_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 99,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TTL_GT0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 100,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TOS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 101,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_DIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 109,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP4_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 141,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 173,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP_PROTO] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 174,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_PAYLOAD] = {</div><div class='add'>+		.type = VCAP_FIELD_U112,</div><div class='add'>+		.offset = 182,</div><div class='add'>+		.width = 96,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field es2_ip_7tuple_keyfield[] = {</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 10,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 11,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 12,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 23,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 25,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 38,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 41,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 73,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 74,</div><div class='add'>+		.width = 7,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 81,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_COSID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 85,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DPL_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 88,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_RT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 89,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_DMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 93,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_SMAC] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 141,</div><div class='add'>+		.width = 48,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IP4_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 191,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TTL_GT0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 192,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TOS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 193,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP6_DIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U128,</div><div class='add'>+		.offset = 201,</div><div class='add'>+		.width = 128,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP6_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U128,</div><div class='add'>+		.offset = 329,</div><div class='add'>+		.width = 128,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 457,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_TCP_UDP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 458,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_TCP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 459,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_DPORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 460,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SPORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 476,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 492,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SPORT_EQ_DPORT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 508,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SEQUENCE_EQ0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 509,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_FIN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 510,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_SYN] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 511,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RST] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 512,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_PSH] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 513,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_ACK] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 514,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_URG] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 515,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_PAYLOAD] = {</div><div class='add'>+		.type = VCAP_FIELD_U64,</div><div class='add'>+		.offset = 516,</div><div class='add'>+		.width = 64,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field es2_ip6_std_keyfield[] = {</div><div class='add'>+	[VCAP_KF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 3,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_MC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L2_BC_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 15,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_ISDX_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 16,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 26,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 28,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 41,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 44,</div><div class='add'>+		.width = 32,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 76,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 77,</div><div class='add'>+		.width = 7,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_COSID_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 88,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DPL_CLS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 91,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_RT_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 92,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_TTL_GT0] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 96,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP6_SIP] = {</div><div class='add'>+		.type = VCAP_FIELD_U128,</div><div class='add'>+		.offset = 97,</div><div class='add'>+		.width = 128,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 225,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_IP_PROTO] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 226,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L4_RNG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 234,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KF_L3_PAYLOAD] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 250,</div><div class='add'>+		.width = 40,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* keyfield_set */</div><div class='add'>+static const struct vcap_set is0_keyfield_set[] = {</div><div class='add'>+	[VCAP_KFS_NORMAL_7TUPLE] = {</div><div class='add'>+		.type_id = 0,</div><div class='add'>+		.sw_per_item = 12,</div><div class='add'>+		.sw_cnt = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_NORMAL_5TUPLE_IP4] = {</div><div class='add'>+		.type_id = 2,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_set is2_keyfield_set[] = {</div><div class='add'>+	[VCAP_KFS_MAC_ETYPE] = {</div><div class='add'>+		.type_id = 0,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_ARP] = {</div><div class='add'>+		.type_id = 3,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_IP4_TCP_UDP] = {</div><div class='add'>+		.type_id = 4,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_IP4_OTHER] = {</div><div class='add'>+		.type_id = 5,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_IP6_STD] = {</div><div class='add'>+		.type_id = 6,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_IP_7TUPLE] = {</div><div class='add'>+		.type_id = 1,</div><div class='add'>+		.sw_per_item = 12,</div><div class='add'>+		.sw_cnt = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_set es0_keyfield_set[] = {</div><div class='add'>+	[VCAP_KFS_ISDX] = {</div><div class='add'>+		.type_id = 0,</div><div class='add'>+		.sw_per_item = 1,</div><div class='add'>+		.sw_cnt = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_set es2_keyfield_set[] = {</div><div class='add'>+	[VCAP_KFS_MAC_ETYPE] = {</div><div class='add'>+		.type_id = 0,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_ARP] = {</div><div class='add'>+		.type_id = 1,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_IP4_TCP_UDP] = {</div><div class='add'>+		.type_id = 2,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_IP4_OTHER] = {</div><div class='add'>+		.type_id = 3,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_IP_7TUPLE] = {</div><div class='add'>+		.type_id = -1,</div><div class='add'>+		.sw_per_item = 12,</div><div class='add'>+		.sw_cnt = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_KFS_IP6_STD] = {</div><div class='add'>+		.type_id = 4,</div><div class='add'>+		.sw_per_item = 6,</div><div class='add'>+		.sw_cnt = 2,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* keyfield_set map */</div><div class='add'>+static const struct vcap_field *is0_keyfield_set_map[] = {</div><div class='add'>+	[VCAP_KFS_NORMAL_7TUPLE] = is0_normal_7tuple_keyfield,</div><div class='add'>+	[VCAP_KFS_NORMAL_5TUPLE_IP4] = is0_normal_5tuple_ip4_keyfield,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field *is2_keyfield_set_map[] = {</div><div class='add'>+	[VCAP_KFS_MAC_ETYPE] = is2_mac_etype_keyfield,</div><div class='add'>+	[VCAP_KFS_ARP] = is2_arp_keyfield,</div><div class='add'>+	[VCAP_KFS_IP4_TCP_UDP] = is2_ip4_tcp_udp_keyfield,</div><div class='add'>+	[VCAP_KFS_IP4_OTHER] = is2_ip4_other_keyfield,</div><div class='add'>+	[VCAP_KFS_IP6_STD] = is2_ip6_std_keyfield,</div><div class='add'>+	[VCAP_KFS_IP_7TUPLE] = is2_ip_7tuple_keyfield,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field *es0_keyfield_set_map[] = {</div><div class='add'>+	[VCAP_KFS_ISDX] = es0_isdx_keyfield,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field *es2_keyfield_set_map[] = {</div><div class='add'>+	[VCAP_KFS_MAC_ETYPE] = es2_mac_etype_keyfield,</div><div class='add'>+	[VCAP_KFS_ARP] = es2_arp_keyfield,</div><div class='add'>+	[VCAP_KFS_IP4_TCP_UDP] = es2_ip4_tcp_udp_keyfield,</div><div class='add'>+	[VCAP_KFS_IP4_OTHER] = es2_ip4_other_keyfield,</div><div class='add'>+	[VCAP_KFS_IP_7TUPLE] = es2_ip_7tuple_keyfield,</div><div class='add'>+	[VCAP_KFS_IP6_STD] = es2_ip6_std_keyfield,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* keyfield_set map sizes */</div><div class='add'>+static int is0_keyfield_set_map_size[] = {</div><div class='add'>+	[VCAP_KFS_NORMAL_7TUPLE] = ARRAY_SIZE(is0_normal_7tuple_keyfield),</div><div class='add'>+	[VCAP_KFS_NORMAL_5TUPLE_IP4] = ARRAY_SIZE(is0_normal_5tuple_ip4_keyfield),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int is2_keyfield_set_map_size[] = {</div><div class='add'>+	[VCAP_KFS_MAC_ETYPE] = ARRAY_SIZE(is2_mac_etype_keyfield),</div><div class='add'>+	[VCAP_KFS_ARP] = ARRAY_SIZE(is2_arp_keyfield),</div><div class='add'>+	[VCAP_KFS_IP4_TCP_UDP] = ARRAY_SIZE(is2_ip4_tcp_udp_keyfield),</div><div class='add'>+	[VCAP_KFS_IP4_OTHER] = ARRAY_SIZE(is2_ip4_other_keyfield),</div><div class='add'>+	[VCAP_KFS_IP6_STD] = ARRAY_SIZE(is2_ip6_std_keyfield),</div><div class='add'>+	[VCAP_KFS_IP_7TUPLE] = ARRAY_SIZE(is2_ip_7tuple_keyfield),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int es0_keyfield_set_map_size[] = {</div><div class='add'>+	[VCAP_KFS_ISDX] = ARRAY_SIZE(es0_isdx_keyfield),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int es2_keyfield_set_map_size[] = {</div><div class='add'>+	[VCAP_KFS_MAC_ETYPE] = ARRAY_SIZE(es2_mac_etype_keyfield),</div><div class='add'>+	[VCAP_KFS_ARP] = ARRAY_SIZE(es2_arp_keyfield),</div><div class='add'>+	[VCAP_KFS_IP4_TCP_UDP] = ARRAY_SIZE(es2_ip4_tcp_udp_keyfield),</div><div class='add'>+	[VCAP_KFS_IP4_OTHER] = ARRAY_SIZE(es2_ip4_other_keyfield),</div><div class='add'>+	[VCAP_KFS_IP_7TUPLE] = ARRAY_SIZE(es2_ip_7tuple_keyfield),</div><div class='add'>+	[VCAP_KFS_IP6_STD] = ARRAY_SIZE(es2_ip6_std_keyfield),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* actionfields */</div><div class='add'>+static const struct vcap_field is0_classification_actionfield[] = {</div><div class='add'>+	[VCAP_AF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DSCP_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 1,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DSCP_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 2,</div><div class='add'>+		.width = 6,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_QOS_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 12,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_QOS_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 13,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DP_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 16,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DP_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 17,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DEI_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 19,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DEI_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 20,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PCP_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 21,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PCP_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 22,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MAP_LOOKUP_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 25,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MAP_KEY] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 27,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MAP_IDX] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 30,</div><div class='add'>+		.width = 7,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_CLS_VID_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 37,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_VID_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 43,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_ISDX_ADD_REPLACE_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 66,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_ISDX_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 67,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PAG_OVERRIDE_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 107,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PAG_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 115,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_NXT_IDX_CTRL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 167,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_NXT_IDX] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 170,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field is0_full_actionfield[] = {</div><div class='add'>+	[VCAP_AF_DSCP_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DSCP_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 1,</div><div class='add'>+		.width = 6,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_QOS_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 11,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_QOS_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 12,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DP_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 15,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DP_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 16,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DEI_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 18,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DEI_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 19,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PCP_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 20,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PCP_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 21,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MAP_LOOKUP_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 24,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MAP_KEY] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 26,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MAP_IDX] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 29,</div><div class='add'>+		.width = 7,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_CLS_VID_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 36,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_VID_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 42,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_ISDX_ADD_REPLACE_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 65,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_ISDX_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 66,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MASK_MODE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 76,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 79,</div><div class='add'>+		.width = 37,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PAG_OVERRIDE_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 174,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PAG_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 182,</div><div class='add'>+		.width = 8,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_NXT_IDX_CTRL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 266,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_NXT_IDX] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 269,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field is0_class_reduced_actionfield[] = {</div><div class='add'>+	[VCAP_AF_TYPE] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_QOS_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 5,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_QOS_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 6,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DP_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 9,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DP_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 10,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MAP_LOOKUP_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 12,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MAP_KEY] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_CLS_VID_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 17,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_VID_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 23,</div><div class='add'>+		.width = 13,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_ISDX_ADD_REPLACE_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 46,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_ISDX_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 47,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_NXT_IDX_CTRL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 89,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_NXT_IDX] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 92,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field is2_base_type_actionfield[] = {</div><div class='add'>+	[VCAP_AF_PIPELINE_FORCE_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 1,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PIPELINE_PT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 2,</div><div class='add'>+		.width = 5,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_HIT_ME_ONCE] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 7,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_INTR_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 8,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_CPU_COPY_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 9,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_CPU_QUEUE_NUM] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 10,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_LRN_DIS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 15,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_RT_DIS] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 16,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_POLICE_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 17,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_POLICE_IDX] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 18,</div><div class='add'>+		.width = 5,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_IGNORE_PIPELINE_CTRL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 23,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MASK_MODE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 27,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PORT_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U48,</div><div class='add'>+		.offset = 30,</div><div class='add'>+		.width = 37,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MIRROR_PROBE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 78,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MATCH_ID] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 131,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MATCH_ID_MASK] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 147,</div><div class='add'>+		.width = 16,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_CNT_ID] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 163,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field es0_es0_actionfield[] = {</div><div class='add'>+	[VCAP_AF_PUSH_OUTER_TAG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PUSH_INNER_TAG] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 2,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_A_TPID_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 3,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_A_VID_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 6,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_A_PCP_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 8,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_A_DEI_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 11,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_B_TPID_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 14,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_B_VID_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 17,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_B_PCP_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 19,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_B_DEI_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 22,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_C_TPID_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 25,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_C_PCP_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 28,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_C_DEI_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 31,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_VID_A_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 34,</div><div class='add'>+		.width = 12,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PCP_A_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 46,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DEI_A_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 49,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_VID_B_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 50,</div><div class='add'>+		.width = 12,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PCP_B_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 62,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DEI_B_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 65,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_VID_C_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 66,</div><div class='add'>+		.width = 12,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PCP_C_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 78,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DEI_C_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 81,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_POP_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 82,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_UNTAG_VID_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 84,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PUSH_CUSTOMER_TAG] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 85,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_TAG_C_VID_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 87,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DSCP_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 127,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_DSCP_VAL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 130,</div><div class='add'>+		.width = 6,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_ESDX] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 319,</div><div class='add'>+		.width = 10,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_FWD_SEL] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 438,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_CPU_QU] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 440,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PIPELINE_PT] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 443,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_PIPELINE_ACT] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 445,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_SWAP_MACS_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 454,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_LOOP_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 455,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field es2_base_type_actionfield[] = {</div><div class='add'>+	[VCAP_AF_HIT_ME_ONCE] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_INTR_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 1,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_FWD_MODE] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 2,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_COPY_QUEUE_NUM] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 4,</div><div class='add'>+		.width = 14,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_COPY_PORT_NUM] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 18,</div><div class='add'>+		.width = 6,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_MIRROR_PROBE_ID] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 24,</div><div class='add'>+		.width = 2,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_CPU_COPY_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 26,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_CPU_QUEUE_NUM] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 27,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_POLICE_ENA] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 30,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_POLICE_REMARK] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 31,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_POLICE_IDX] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 32,</div><div class='add'>+		.width = 5,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_ES2_REW_CMD] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 37,</div><div class='add'>+		.width = 3,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_CNT_ID] = {</div><div class='add'>+		.type = VCAP_FIELD_U32,</div><div class='add'>+		.offset = 40,</div><div class='add'>+		.width = 9,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AF_IGNORE_PIPELINE_CTRL] = {</div><div class='add'>+		.type = VCAP_FIELD_BIT,</div><div class='add'>+		.offset = 49,</div><div class='add'>+		.width = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* actionfield_set */</div><div class='add'>+static const struct vcap_set is0_actionfield_set[] = {</div><div class='add'>+	[VCAP_AFS_CLASSIFICATION] = {</div><div class='add'>+		.type_id = 1,</div><div class='add'>+		.sw_per_item = 2,</div><div class='add'>+		.sw_cnt = 6,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AFS_FULL] = {</div><div class='add'>+		.type_id = -1,</div><div class='add'>+		.sw_per_item = 3,</div><div class='add'>+		.sw_cnt = 4,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_AFS_CLASS_REDUCED] = {</div><div class='add'>+		.type_id = 1,</div><div class='add'>+		.sw_per_item = 1,</div><div class='add'>+		.sw_cnt = 12,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_set is2_actionfield_set[] = {</div><div class='add'>+	[VCAP_AFS_BASE_TYPE] = {</div><div class='add'>+		.type_id = -1,</div><div class='add'>+		.sw_per_item = 3,</div><div class='add'>+		.sw_cnt = 4,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_set es0_actionfield_set[] = {</div><div class='add'>+	[VCAP_AFS_ES0] = {</div><div class='add'>+		.type_id = -1,</div><div class='add'>+		.sw_per_item = 1,</div><div class='add'>+		.sw_cnt = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_set es2_actionfield_set[] = {</div><div class='add'>+	[VCAP_AFS_BASE_TYPE] = {</div><div class='add'>+		.type_id = -1,</div><div class='add'>+		.sw_per_item = 3,</div><div class='add'>+		.sw_cnt = 4,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* actionfield_set map */</div><div class='add'>+static const struct vcap_field *is0_actionfield_set_map[] = {</div><div class='add'>+	[VCAP_AFS_CLASSIFICATION] = is0_classification_actionfield,</div><div class='add'>+	[VCAP_AFS_FULL] = is0_full_actionfield,</div><div class='add'>+	[VCAP_AFS_CLASS_REDUCED] = is0_class_reduced_actionfield,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field *is2_actionfield_set_map[] = {</div><div class='add'>+	[VCAP_AFS_BASE_TYPE] = is2_base_type_actionfield,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field *es0_actionfield_set_map[] = {</div><div class='add'>+	[VCAP_AFS_ES0] = es0_es0_actionfield,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field *es2_actionfield_set_map[] = {</div><div class='add'>+	[VCAP_AFS_BASE_TYPE] = es2_base_type_actionfield,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* actionfield_set map size */</div><div class='add'>+static int is0_actionfield_set_map_size[] = {</div><div class='add'>+	[VCAP_AFS_CLASSIFICATION] = ARRAY_SIZE(is0_classification_actionfield),</div><div class='add'>+	[VCAP_AFS_FULL] = ARRAY_SIZE(is0_full_actionfield),</div><div class='add'>+	[VCAP_AFS_CLASS_REDUCED] = ARRAY_SIZE(is0_class_reduced_actionfield),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int is2_actionfield_set_map_size[] = {</div><div class='add'>+	[VCAP_AFS_BASE_TYPE] = ARRAY_SIZE(is2_base_type_actionfield),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int es0_actionfield_set_map_size[] = {</div><div class='add'>+	[VCAP_AFS_ES0] = ARRAY_SIZE(es0_es0_actionfield),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int es2_actionfield_set_map_size[] = {</div><div class='add'>+	[VCAP_AFS_BASE_TYPE] = ARRAY_SIZE(es2_base_type_actionfield),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Type Groups */</div><div class='add'>+static const struct vcap_typegroup is0_x12_keyfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 5,</div><div class='add'>+		.value = 16,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 52,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 104,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 156,</div><div class='add'>+		.width = 3,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 208,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 260,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 312,</div><div class='add'>+		.width = 4,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 364,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 416,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 468,</div><div class='add'>+		.width = 3,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 520,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 572,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is0_x6_keyfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 4,</div><div class='add'>+		.value = 8,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 52,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 104,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 156,</div><div class='add'>+		.width = 3,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 208,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 260,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is0_x3_keyfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is0_x2_keyfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is0_x1_keyfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is2_x12_keyfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 3,</div><div class='add'>+		.value = 4,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 156,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 312,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 468,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is2_x6_keyfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 2,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 156,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is2_x3_keyfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is2_x1_keyfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup es0_x1_keyfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup es2_x12_keyfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 3,</div><div class='add'>+		.value = 4,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 156,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 312,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 468,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup es2_x6_keyfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 2,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 156,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup es2_x3_keyfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup es2_x1_keyfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup *is0_keyfield_set_typegroups[] = {</div><div class='add'>+	[12] = is0_x12_keyfield_set_typegroups,</div><div class='add'>+	[6] = is0_x6_keyfield_set_typegroups,</div><div class='add'>+	[3] = is0_x3_keyfield_set_typegroups,</div><div class='add'>+	[2] = is0_x2_keyfield_set_typegroups,</div><div class='add'>+	[1] = is0_x1_keyfield_set_typegroups,</div><div class='add'>+	[13] = NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup *is2_keyfield_set_typegroups[] = {</div><div class='add'>+	[12] = is2_x12_keyfield_set_typegroups,</div><div class='add'>+	[6] = is2_x6_keyfield_set_typegroups,</div><div class='add'>+	[3] = is2_x3_keyfield_set_typegroups,</div><div class='add'>+	[1] = is2_x1_keyfield_set_typegroups,</div><div class='add'>+	[13] = NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup *es0_keyfield_set_typegroups[] = {</div><div class='add'>+	[1] = es0_x1_keyfield_set_typegroups,</div><div class='add'>+	[2] = NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup *es2_keyfield_set_typegroups[] = {</div><div class='add'>+	[12] = es2_x12_keyfield_set_typegroups,</div><div class='add'>+	[6] = es2_x6_keyfield_set_typegroups,</div><div class='add'>+	[3] = es2_x3_keyfield_set_typegroups,</div><div class='add'>+	[1] = es2_x1_keyfield_set_typegroups,</div><div class='add'>+	[13] = NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is0_x3_actionfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 3,</div><div class='add'>+		.value = 4,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 103,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 206,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is0_x2_actionfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 2,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 103,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is0_x1_actionfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 1,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is2_x3_actionfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 2,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 95,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 190,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup is2_x1_actionfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup es0_x1_actionfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup es2_x3_actionfield_set_typegroups[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.width = 2,</div><div class='add'>+		.value = 2,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 19,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = 38,</div><div class='add'>+		.width = 1,</div><div class='add'>+		.value = 0,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup es2_x1_actionfield_set_typegroups[] = {</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup *is0_actionfield_set_typegroups[] = {</div><div class='add'>+	[3] = is0_x3_actionfield_set_typegroups,</div><div class='add'>+	[2] = is0_x2_actionfield_set_typegroups,</div><div class='add'>+	[1] = is0_x1_actionfield_set_typegroups,</div><div class='add'>+	[13] = NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup *is2_actionfield_set_typegroups[] = {</div><div class='add'>+	[3] = is2_x3_actionfield_set_typegroups,</div><div class='add'>+	[1] = is2_x1_actionfield_set_typegroups,</div><div class='add'>+	[13] = NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup *es0_actionfield_set_typegroups[] = {</div><div class='add'>+	[1] = es0_x1_actionfield_set_typegroups,</div><div class='add'>+	[2] = NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_typegroup *es2_actionfield_set_typegroups[] = {</div><div class='add'>+	[3] = es2_x3_actionfield_set_typegroups,</div><div class='add'>+	[1] = es2_x1_actionfield_set_typegroups,</div><div class='add'>+	[13] = NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Keyfieldset names */</div><div class='add'>+static const char * const vcap_keyfield_set_names[] = {</div><div class='add'>+	[VCAP_KFS_NO_VALUE]                      =  "(None)",</div><div class='add'>+	[VCAP_KFS_ARP]                           =  "VCAP_KFS_ARP",</div><div class='add'>+	[VCAP_KFS_ETAG]                          =  "VCAP_KFS_ETAG",</div><div class='add'>+	[VCAP_KFS_IP4_OTHER]                     =  "VCAP_KFS_IP4_OTHER",</div><div class='add'>+	[VCAP_KFS_IP4_TCP_UDP]                   =  "VCAP_KFS_IP4_TCP_UDP",</div><div class='add'>+	[VCAP_KFS_IP4_VID]                       =  "VCAP_KFS_IP4_VID",</div><div class='add'>+	[VCAP_KFS_IP6_OTHER]                     =  "VCAP_KFS_IP6_OTHER",</div><div class='add'>+	[VCAP_KFS_IP6_STD]                       =  "VCAP_KFS_IP6_STD",</div><div class='add'>+	[VCAP_KFS_IP6_TCP_UDP]                   =  "VCAP_KFS_IP6_TCP_UDP",</div><div class='add'>+	[VCAP_KFS_IP6_VID]                       =  "VCAP_KFS_IP6_VID",</div><div class='add'>+	[VCAP_KFS_IP_7TUPLE]                     =  "VCAP_KFS_IP_7TUPLE",</div><div class='add'>+	[VCAP_KFS_ISDX]                          =  "VCAP_KFS_ISDX",</div><div class='add'>+	[VCAP_KFS_LL_FULL]                       =  "VCAP_KFS_LL_FULL",</div><div class='add'>+	[VCAP_KFS_MAC_ETYPE]                     =  "VCAP_KFS_MAC_ETYPE",</div><div class='add'>+	[VCAP_KFS_MAC_LLC]                       =  "VCAP_KFS_MAC_LLC",</div><div class='add'>+	[VCAP_KFS_MAC_SNAP]                      =  "VCAP_KFS_MAC_SNAP",</div><div class='add'>+	[VCAP_KFS_NORMAL_5TUPLE_IP4]             =  "VCAP_KFS_NORMAL_5TUPLE_IP4",</div><div class='add'>+	[VCAP_KFS_NORMAL_7TUPLE]                 =  "VCAP_KFS_NORMAL_7TUPLE",</div><div class='add'>+	[VCAP_KFS_OAM]                           =  "VCAP_KFS_OAM",</div><div class='add'>+	[VCAP_KFS_PURE_5TUPLE_IP4]               =  "VCAP_KFS_PURE_5TUPLE_IP4",</div><div class='add'>+	[VCAP_KFS_SMAC_SIP4]                     =  "VCAP_KFS_SMAC_SIP4",</div><div class='add'>+	[VCAP_KFS_SMAC_SIP6]                     =  "VCAP_KFS_SMAC_SIP6",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Actionfieldset names */</div><div class='add'>+static const char * const vcap_actionfield_set_names[] = {</div><div class='add'>+	[VCAP_AFS_NO_VALUE]                      =  "(None)",</div><div class='add'>+	[VCAP_AFS_BASE_TYPE]                     =  "VCAP_AFS_BASE_TYPE",</div><div class='add'>+	[VCAP_AFS_CLASSIFICATION]                =  "VCAP_AFS_CLASSIFICATION",</div><div class='add'>+	[VCAP_AFS_CLASS_REDUCED]                 =  "VCAP_AFS_CLASS_REDUCED",</div><div class='add'>+	[VCAP_AFS_ES0]                           =  "VCAP_AFS_ES0",</div><div class='add'>+	[VCAP_AFS_FULL]                          =  "VCAP_AFS_FULL",</div><div class='add'>+	[VCAP_AFS_SMAC_SIP]                      =  "VCAP_AFS_SMAC_SIP",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Keyfield names */</div><div class='add'>+static const char * const vcap_keyfield_names[] = {</div><div class='add'>+	[VCAP_KF_NO_VALUE]                       =  "(None)",</div><div class='add'>+	[VCAP_KF_8021BR_ECID_BASE]               =  "8021BR_ECID_BASE",</div><div class='add'>+	[VCAP_KF_8021BR_ECID_EXT]                =  "8021BR_ECID_EXT",</div><div class='add'>+	[VCAP_KF_8021BR_E_TAGGED]                =  "8021BR_E_TAGGED",</div><div class='add'>+	[VCAP_KF_8021BR_GRP]                     =  "8021BR_GRP",</div><div class='add'>+	[VCAP_KF_8021BR_IGR_ECID_BASE]           =  "8021BR_IGR_ECID_BASE",</div><div class='add'>+	[VCAP_KF_8021BR_IGR_ECID_EXT]            =  "8021BR_IGR_ECID_EXT",</div><div class='add'>+	[VCAP_KF_8021Q_DEI0]                     =  "8021Q_DEI0",</div><div class='add'>+	[VCAP_KF_8021Q_DEI1]                     =  "8021Q_DEI1",</div><div class='add'>+	[VCAP_KF_8021Q_DEI2]                     =  "8021Q_DEI2",</div><div class='add'>+	[VCAP_KF_8021Q_DEI_CLS]                  =  "8021Q_DEI_CLS",</div><div class='add'>+	[VCAP_KF_8021Q_PCP0]                     =  "8021Q_PCP0",</div><div class='add'>+	[VCAP_KF_8021Q_PCP1]                     =  "8021Q_PCP1",</div><div class='add'>+	[VCAP_KF_8021Q_PCP2]                     =  "8021Q_PCP2",</div><div class='add'>+	[VCAP_KF_8021Q_PCP_CLS]                  =  "8021Q_PCP_CLS",</div><div class='add'>+	[VCAP_KF_8021Q_TPID]                     =  "8021Q_TPID",</div><div class='add'>+	[VCAP_KF_8021Q_TPID0]                    =  "8021Q_TPID0",</div><div class='add'>+	[VCAP_KF_8021Q_TPID1]                    =  "8021Q_TPID1",</div><div class='add'>+	[VCAP_KF_8021Q_TPID2]                    =  "8021Q_TPID2",</div><div class='add'>+	[VCAP_KF_8021Q_VID0]                     =  "8021Q_VID0",</div><div class='add'>+	[VCAP_KF_8021Q_VID1]                     =  "8021Q_VID1",</div><div class='add'>+	[VCAP_KF_8021Q_VID2]                     =  "8021Q_VID2",</div><div class='add'>+	[VCAP_KF_8021Q_VID_CLS]                  =  "8021Q_VID_CLS",</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGGED_IS]           =  "8021Q_VLAN_TAGGED_IS",</div><div class='add'>+	[VCAP_KF_8021Q_VLAN_TAGS]                =  "8021Q_VLAN_TAGS",</div><div class='add'>+	[VCAP_KF_ACL_GRP_ID]                     =  "ACL_GRP_ID",</div><div class='add'>+	[VCAP_KF_ARP_ADDR_SPACE_OK_IS]           =  "ARP_ADDR_SPACE_OK_IS",</div><div class='add'>+	[VCAP_KF_ARP_LEN_OK_IS]                  =  "ARP_LEN_OK_IS",</div><div class='add'>+	[VCAP_KF_ARP_OPCODE]                     =  "ARP_OPCODE",</div><div class='add'>+	[VCAP_KF_ARP_OPCODE_UNKNOWN_IS]          =  "ARP_OPCODE_UNKNOWN_IS",</div><div class='add'>+	[VCAP_KF_ARP_PROTO_SPACE_OK_IS]          =  "ARP_PROTO_SPACE_OK_IS",</div><div class='add'>+	[VCAP_KF_ARP_SENDER_MATCH_IS]            =  "ARP_SENDER_MATCH_IS",</div><div class='add'>+	[VCAP_KF_ARP_TGT_MATCH_IS]               =  "ARP_TGT_MATCH_IS",</div><div class='add'>+	[VCAP_KF_COSID_CLS]                      =  "COSID_CLS",</div><div class='add'>+	[VCAP_KF_ES0_ISDX_KEY_ENA]               =  "ES0_ISDX_KEY_ENA",</div><div class='add'>+	[VCAP_KF_ETYPE]                          =  "ETYPE",</div><div class='add'>+	[VCAP_KF_ETYPE_LEN_IS]                   =  "ETYPE_LEN_IS",</div><div class='add'>+	[VCAP_KF_HOST_MATCH]                     =  "HOST_MATCH",</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK]               =  "IF_EGR_PORT_MASK",</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_MASK_RNG]           =  "IF_EGR_PORT_MASK_RNG",</div><div class='add'>+	[VCAP_KF_IF_EGR_PORT_NO]                 =  "IF_EGR_PORT_NO",</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT]                    =  "IF_IGR_PORT",</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK]               =  "IF_IGR_PORT_MASK",</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_L3]            =  "IF_IGR_PORT_MASK_L3",</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_RNG]           =  "IF_IGR_PORT_MASK_RNG",</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_MASK_SEL]           =  "IF_IGR_PORT_MASK_SEL",</div><div class='add'>+	[VCAP_KF_IF_IGR_PORT_SEL]                =  "IF_IGR_PORT_SEL",</div><div class='add'>+	[VCAP_KF_IP4_IS]                         =  "IP4_IS",</div><div class='add'>+	[VCAP_KF_IP_MC_IS]                       =  "IP_MC_IS",</div><div class='add'>+	[VCAP_KF_IP_PAYLOAD_5TUPLE]              =  "IP_PAYLOAD_5TUPLE",</div><div class='add'>+	[VCAP_KF_IP_SNAP_IS]                     =  "IP_SNAP_IS",</div><div class='add'>+	[VCAP_KF_ISDX_CLS]                       =  "ISDX_CLS",</div><div class='add'>+	[VCAP_KF_ISDX_GT0_IS]                    =  "ISDX_GT0_IS",</div><div class='add'>+	[VCAP_KF_L2_BC_IS]                       =  "L2_BC_IS",</div><div class='add'>+	[VCAP_KF_L2_DMAC]                        =  "L2_DMAC",</div><div class='add'>+	[VCAP_KF_L2_FRM_TYPE]                    =  "L2_FRM_TYPE",</div><div class='add'>+	[VCAP_KF_L2_FWD_IS]                      =  "L2_FWD_IS",</div><div class='add'>+	[VCAP_KF_L2_LLC]                         =  "L2_LLC",</div><div class='add'>+	[VCAP_KF_L2_MC_IS]                       =  "L2_MC_IS",</div><div class='add'>+	[VCAP_KF_L2_PAYLOAD0]                    =  "L2_PAYLOAD0",</div><div class='add'>+	[VCAP_KF_L2_PAYLOAD1]                    =  "L2_PAYLOAD1",</div><div class='add'>+	[VCAP_KF_L2_PAYLOAD2]                    =  "L2_PAYLOAD2",</div><div class='add'>+	[VCAP_KF_L2_PAYLOAD_ETYPE]               =  "L2_PAYLOAD_ETYPE",</div><div class='add'>+	[VCAP_KF_L2_SMAC]                        =  "L2_SMAC",</div><div class='add'>+	[VCAP_KF_L2_SNAP]                        =  "L2_SNAP",</div><div class='add'>+	[VCAP_KF_L3_DIP_EQ_SIP_IS]               =  "L3_DIP_EQ_SIP_IS",</div><div class='add'>+	[VCAP_KF_L3_DPL_CLS]                     =  "L3_DPL_CLS",</div><div class='add'>+	[VCAP_KF_L3_DSCP]                        =  "L3_DSCP",</div><div class='add'>+	[VCAP_KF_L3_DST_IS]                      =  "L3_DST_IS",</div><div class='add'>+	[VCAP_KF_L3_FRAGMENT]                    =  "L3_FRAGMENT",</div><div class='add'>+	[VCAP_KF_L3_FRAGMENT_TYPE]               =  "L3_FRAGMENT_TYPE",</div><div class='add'>+	[VCAP_KF_L3_FRAG_INVLD_L4_LEN]           =  "L3_FRAG_INVLD_L4_LEN",</div><div class='add'>+	[VCAP_KF_L3_FRAG_OFS_GT0]                =  "L3_FRAG_OFS_GT0",</div><div class='add'>+	[VCAP_KF_L3_IP4_DIP]                     =  "L3_IP4_DIP",</div><div class='add'>+	[VCAP_KF_L3_IP4_SIP]                     =  "L3_IP4_SIP",</div><div class='add'>+	[VCAP_KF_L3_IP6_DIP]                     =  "L3_IP6_DIP",</div><div class='add'>+	[VCAP_KF_L3_IP6_SIP]                     =  "L3_IP6_SIP",</div><div class='add'>+	[VCAP_KF_L3_IP_PROTO]                    =  "L3_IP_PROTO",</div><div class='add'>+	[VCAP_KF_L3_OPTIONS_IS]                  =  "L3_OPTIONS_IS",</div><div class='add'>+	[VCAP_KF_L3_PAYLOAD]                     =  "L3_PAYLOAD",</div><div class='add'>+	[VCAP_KF_L3_RT_IS]                       =  "L3_RT_IS",</div><div class='add'>+	[VCAP_KF_L3_TOS]                         =  "L3_TOS",</div><div class='add'>+	[VCAP_KF_L3_TTL_GT0]                     =  "L3_TTL_GT0",</div><div class='add'>+	[VCAP_KF_L4_1588_DOM]                    =  "L4_1588_DOM",</div><div class='add'>+	[VCAP_KF_L4_1588_VER]                    =  "L4_1588_VER",</div><div class='add'>+	[VCAP_KF_L4_ACK]                         =  "L4_ACK",</div><div class='add'>+	[VCAP_KF_L4_DPORT]                       =  "L4_DPORT",</div><div class='add'>+	[VCAP_KF_L4_FIN]                         =  "L4_FIN",</div><div class='add'>+	[VCAP_KF_L4_PAYLOAD]                     =  "L4_PAYLOAD",</div><div class='add'>+	[VCAP_KF_L4_PSH]                         =  "L4_PSH",</div><div class='add'>+	[VCAP_KF_L4_RNG]                         =  "L4_RNG",</div><div class='add'>+	[VCAP_KF_L4_RST]                         =  "L4_RST",</div><div class='add'>+	[VCAP_KF_L4_SEQUENCE_EQ0_IS]             =  "L4_SEQUENCE_EQ0_IS",</div><div class='add'>+	[VCAP_KF_L4_SPORT]                       =  "L4_SPORT",</div><div class='add'>+	[VCAP_KF_L4_SPORT_EQ_DPORT_IS]           =  "L4_SPORT_EQ_DPORT_IS",</div><div class='add'>+	[VCAP_KF_L4_SYN]                         =  "L4_SYN",</div><div class='add'>+	[VCAP_KF_L4_URG]                         =  "L4_URG",</div><div class='add'>+	[VCAP_KF_LOOKUP_FIRST_IS]                =  "LOOKUP_FIRST_IS",</div><div class='add'>+	[VCAP_KF_LOOKUP_GEN_IDX]                 =  "LOOKUP_GEN_IDX",</div><div class='add'>+	[VCAP_KF_LOOKUP_GEN_IDX_SEL]             =  "LOOKUP_GEN_IDX_SEL",</div><div class='add'>+	[VCAP_KF_LOOKUP_PAG]                     =  "LOOKUP_PAG",</div><div class='add'>+	[VCAP_KF_MIRROR_PROBE]                   =  "MIRROR_PROBE",</div><div class='add'>+	[VCAP_KF_OAM_CCM_CNTS_EQ0]               =  "OAM_CCM_CNTS_EQ0",</div><div class='add'>+	[VCAP_KF_OAM_DETECTED]                   =  "OAM_DETECTED",</div><div class='add'>+	[VCAP_KF_OAM_FLAGS]                      =  "OAM_FLAGS",</div><div class='add'>+	[VCAP_KF_OAM_MEL_FLAGS]                  =  "OAM_MEL_FLAGS",</div><div class='add'>+	[VCAP_KF_OAM_MEPID]                      =  "OAM_MEPID",</div><div class='add'>+	[VCAP_KF_OAM_OPCODE]                     =  "OAM_OPCODE",</div><div class='add'>+	[VCAP_KF_OAM_VER]                        =  "OAM_VER",</div><div class='add'>+	[VCAP_KF_OAM_Y1731_IS]                   =  "OAM_Y1731_IS",</div><div class='add'>+	[VCAP_KF_PROT_ACTIVE]                    =  "PROT_ACTIVE",</div><div class='add'>+	[VCAP_KF_TCP_IS]                         =  "TCP_IS",</div><div class='add'>+	[VCAP_KF_TCP_UDP_IS]                     =  "TCP_UDP_IS",</div><div class='add'>+	[VCAP_KF_TYPE]                           =  "TYPE",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Actionfield names */</div><div class='add'>+static const char * const vcap_actionfield_names[] = {</div><div class='add'>+	[VCAP_AF_NO_VALUE]                       =  "(None)",</div><div class='add'>+	[VCAP_AF_ACL_ID]                         =  "ACL_ID",</div><div class='add'>+	[VCAP_AF_CLS_VID_SEL]                    =  "CLS_VID_SEL",</div><div class='add'>+	[VCAP_AF_CNT_ID]                         =  "CNT_ID",</div><div class='add'>+	[VCAP_AF_COPY_PORT_NUM]                  =  "COPY_PORT_NUM",</div><div class='add'>+	[VCAP_AF_COPY_QUEUE_NUM]                 =  "COPY_QUEUE_NUM",</div><div class='add'>+	[VCAP_AF_CPU_COPY_ENA]                   =  "CPU_COPY_ENA",</div><div class='add'>+	[VCAP_AF_CPU_QU]                         =  "CPU_QU",</div><div class='add'>+	[VCAP_AF_CPU_QUEUE_NUM]                  =  "CPU_QUEUE_NUM",</div><div class='add'>+	[VCAP_AF_DEI_A_VAL]                      =  "DEI_A_VAL",</div><div class='add'>+	[VCAP_AF_DEI_B_VAL]                      =  "DEI_B_VAL",</div><div class='add'>+	[VCAP_AF_DEI_C_VAL]                      =  "DEI_C_VAL",</div><div class='add'>+	[VCAP_AF_DEI_ENA]                        =  "DEI_ENA",</div><div class='add'>+	[VCAP_AF_DEI_VAL]                        =  "DEI_VAL",</div><div class='add'>+	[VCAP_AF_DP_ENA]                         =  "DP_ENA",</div><div class='add'>+	[VCAP_AF_DP_VAL]                         =  "DP_VAL",</div><div class='add'>+	[VCAP_AF_DSCP_ENA]                       =  "DSCP_ENA",</div><div class='add'>+	[VCAP_AF_DSCP_SEL]                       =  "DSCP_SEL",</div><div class='add'>+	[VCAP_AF_DSCP_VAL]                       =  "DSCP_VAL",</div><div class='add'>+	[VCAP_AF_ES2_REW_CMD]                    =  "ES2_REW_CMD",</div><div class='add'>+	[VCAP_AF_ESDX]                           =  "ESDX",</div><div class='add'>+	[VCAP_AF_FWD_KILL_ENA]                   =  "FWD_KILL_ENA",</div><div class='add'>+	[VCAP_AF_FWD_MODE]                       =  "FWD_MODE",</div><div class='add'>+	[VCAP_AF_FWD_SEL]                        =  "FWD_SEL",</div><div class='add'>+	[VCAP_AF_HIT_ME_ONCE]                    =  "HIT_ME_ONCE",</div><div class='add'>+	[VCAP_AF_HOST_MATCH]                     =  "HOST_MATCH",</div><div class='add'>+	[VCAP_AF_IGNORE_PIPELINE_CTRL]           =  "IGNORE_PIPELINE_CTRL",</div><div class='add'>+	[VCAP_AF_INTR_ENA]                       =  "INTR_ENA",</div><div class='add'>+	[VCAP_AF_ISDX_ADD_REPLACE_SEL]           =  "ISDX_ADD_REPLACE_SEL",</div><div class='add'>+	[VCAP_AF_ISDX_ENA]                       =  "ISDX_ENA",</div><div class='add'>+	[VCAP_AF_ISDX_VAL]                       =  "ISDX_VAL",</div><div class='add'>+	[VCAP_AF_LOOP_ENA]                       =  "LOOP_ENA",</div><div class='add'>+	[VCAP_AF_LRN_DIS]                        =  "LRN_DIS",</div><div class='add'>+	[VCAP_AF_MAP_IDX]                        =  "MAP_IDX",</div><div class='add'>+	[VCAP_AF_MAP_KEY]                        =  "MAP_KEY",</div><div class='add'>+	[VCAP_AF_MAP_LOOKUP_SEL]                 =  "MAP_LOOKUP_SEL",</div><div class='add'>+	[VCAP_AF_MASK_MODE]                      =  "MASK_MODE",</div><div class='add'>+	[VCAP_AF_MATCH_ID]                       =  "MATCH_ID",</div><div class='add'>+	[VCAP_AF_MATCH_ID_MASK]                  =  "MATCH_ID_MASK",</div><div class='add'>+	[VCAP_AF_MIRROR_ENA]                     =  "MIRROR_ENA",</div><div class='add'>+	[VCAP_AF_MIRROR_PROBE]                   =  "MIRROR_PROBE",</div><div class='add'>+	[VCAP_AF_MIRROR_PROBE_ID]                =  "MIRROR_PROBE_ID",</div><div class='add'>+	[VCAP_AF_NXT_IDX]                        =  "NXT_IDX",</div><div class='add'>+	[VCAP_AF_NXT_IDX_CTRL]                   =  "NXT_IDX_CTRL",</div><div class='add'>+	[VCAP_AF_PAG_OVERRIDE_MASK]              =  "PAG_OVERRIDE_MASK",</div><div class='add'>+	[VCAP_AF_PAG_VAL]                        =  "PAG_VAL",</div><div class='add'>+	[VCAP_AF_PCP_A_VAL]                      =  "PCP_A_VAL",</div><div class='add'>+	[VCAP_AF_PCP_B_VAL]                      =  "PCP_B_VAL",</div><div class='add'>+	[VCAP_AF_PCP_C_VAL]                      =  "PCP_C_VAL",</div><div class='add'>+	[VCAP_AF_PCP_ENA]                        =  "PCP_ENA",</div><div class='add'>+	[VCAP_AF_PCP_VAL]                        =  "PCP_VAL",</div><div class='add'>+	[VCAP_AF_PIPELINE_ACT]                   =  "PIPELINE_ACT",</div><div class='add'>+	[VCAP_AF_PIPELINE_FORCE_ENA]             =  "PIPELINE_FORCE_ENA",</div><div class='add'>+	[VCAP_AF_PIPELINE_PT]                    =  "PIPELINE_PT",</div><div class='add'>+	[VCAP_AF_POLICE_ENA]                     =  "POLICE_ENA",</div><div class='add'>+	[VCAP_AF_POLICE_IDX]                     =  "POLICE_IDX",</div><div class='add'>+	[VCAP_AF_POLICE_REMARK]                  =  "POLICE_REMARK",</div><div class='add'>+	[VCAP_AF_POLICE_VCAP_ONLY]               =  "POLICE_VCAP_ONLY",</div><div class='add'>+	[VCAP_AF_POP_VAL]                        =  "POP_VAL",</div><div class='add'>+	[VCAP_AF_PORT_MASK]                      =  "PORT_MASK",</div><div class='add'>+	[VCAP_AF_PUSH_CUSTOMER_TAG]              =  "PUSH_CUSTOMER_TAG",</div><div class='add'>+	[VCAP_AF_PUSH_INNER_TAG]                 =  "PUSH_INNER_TAG",</div><div class='add'>+	[VCAP_AF_PUSH_OUTER_TAG]                 =  "PUSH_OUTER_TAG",</div><div class='add'>+	[VCAP_AF_QOS_ENA]                        =  "QOS_ENA",</div><div class='add'>+	[VCAP_AF_QOS_VAL]                        =  "QOS_VAL",</div><div class='add'>+	[VCAP_AF_REW_OP]                         =  "REW_OP",</div><div class='add'>+	[VCAP_AF_RT_DIS]                         =  "RT_DIS",</div><div class='add'>+	[VCAP_AF_SWAP_MACS_ENA]                  =  "SWAP_MACS_ENA",</div><div class='add'>+	[VCAP_AF_TAG_A_DEI_SEL]                  =  "TAG_A_DEI_SEL",</div><div class='add'>+	[VCAP_AF_TAG_A_PCP_SEL]                  =  "TAG_A_PCP_SEL",</div><div class='add'>+	[VCAP_AF_TAG_A_TPID_SEL]                 =  "TAG_A_TPID_SEL",</div><div class='add'>+	[VCAP_AF_TAG_A_VID_SEL]                  =  "TAG_A_VID_SEL",</div><div class='add'>+	[VCAP_AF_TAG_B_DEI_SEL]                  =  "TAG_B_DEI_SEL",</div><div class='add'>+	[VCAP_AF_TAG_B_PCP_SEL]                  =  "TAG_B_PCP_SEL",</div><div class='add'>+	[VCAP_AF_TAG_B_TPID_SEL]                 =  "TAG_B_TPID_SEL",</div><div class='add'>+	[VCAP_AF_TAG_B_VID_SEL]                  =  "TAG_B_VID_SEL",</div><div class='add'>+	[VCAP_AF_TAG_C_DEI_SEL]                  =  "TAG_C_DEI_SEL",</div><div class='add'>+	[VCAP_AF_TAG_C_PCP_SEL]                  =  "TAG_C_PCP_SEL",</div><div class='add'>+	[VCAP_AF_TAG_C_TPID_SEL]                 =  "TAG_C_TPID_SEL",</div><div class='add'>+	[VCAP_AF_TAG_C_VID_SEL]                  =  "TAG_C_VID_SEL",</div><div class='add'>+	[VCAP_AF_TYPE]                           =  "TYPE",</div><div class='add'>+	[VCAP_AF_UNTAG_VID_ENA]                  =  "UNTAG_VID_ENA",</div><div class='add'>+	[VCAP_AF_VID_A_VAL]                      =  "VID_A_VAL",</div><div class='add'>+	[VCAP_AF_VID_B_VAL]                      =  "VID_B_VAL",</div><div class='add'>+	[VCAP_AF_VID_C_VAL]                      =  "VID_C_VAL",</div><div class='add'>+	[VCAP_AF_VID_VAL]                        =  "VID_VAL",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* VCAPs */</div><div class='add'>+const struct vcap_info lan969x_vcaps[] = {</div><div class='add'>+	[VCAP_TYPE_IS0] = {</div><div class='add'>+		.name = "is0",</div><div class='add'>+		.rows = 256,</div><div class='add'>+		.sw_count = 12,</div><div class='add'>+		.sw_width = 52,</div><div class='add'>+		.sticky_width = 1,</div><div class='add'>+		.act_width = 103,</div><div class='add'>+		.default_cnt = 70,</div><div class='add'>+		.require_cnt_dis = 0,</div><div class='add'>+		.version = 1,</div><div class='add'>+		.keyfield_set = is0_keyfield_set,</div><div class='add'>+		.keyfield_set_size = ARRAY_SIZE(is0_keyfield_set),</div><div class='add'>+		.actionfield_set = is0_actionfield_set,</div><div class='add'>+		.actionfield_set_size = ARRAY_SIZE(is0_actionfield_set),</div><div class='add'>+		.keyfield_set_map = is0_keyfield_set_map,</div><div class='add'>+		.keyfield_set_map_size = is0_keyfield_set_map_size,</div><div class='add'>+		.actionfield_set_map = is0_actionfield_set_map,</div><div class='add'>+		.actionfield_set_map_size = is0_actionfield_set_map_size,</div><div class='add'>+		.keyfield_set_typegroups = is0_keyfield_set_typegroups,</div><div class='add'>+		.actionfield_set_typegroups = is0_actionfield_set_typegroups,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_TYPE_IS2] = {</div><div class='add'>+		.name = "is2",</div><div class='add'>+		.rows = 256,</div><div class='add'>+		.sw_count = 12,</div><div class='add'>+		.sw_width = 52,</div><div class='add'>+		.sticky_width = 1,</div><div class='add'>+		.act_width = 103,</div><div class='add'>+		.default_cnt = 38,</div><div class='add'>+		.require_cnt_dis = 0,</div><div class='add'>+		.version = 1,</div><div class='add'>+		.keyfield_set = is2_keyfield_set,</div><div class='add'>+		.keyfield_set_size = ARRAY_SIZE(is2_keyfield_set),</div><div class='add'>+		.actionfield_set = is2_actionfield_set,</div><div class='add'>+		.actionfield_set_size = ARRAY_SIZE(is2_actionfield_set),</div><div class='add'>+		.keyfield_set_map = is2_keyfield_set_map,</div><div class='add'>+		.keyfield_set_map_size = is2_keyfield_set_map_size,</div><div class='add'>+		.actionfield_set_map = is2_actionfield_set_map,</div><div class='add'>+		.actionfield_set_map_size = is2_actionfield_set_map_size,</div><div class='add'>+		.keyfield_set_typegroups = is2_keyfield_set_typegroups,</div><div class='add'>+		.actionfield_set_typegroups = is2_actionfield_set_typegroups,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_TYPE_ES0] = {</div><div class='add'>+		.name = "es0",</div><div class='add'>+		.rows = 1536,</div><div class='add'>+		.sw_count = 1,</div><div class='add'>+		.sw_width = 51,</div><div class='add'>+		.sticky_width = 1,</div><div class='add'>+		.act_width = 469,</div><div class='add'>+		.default_cnt = 35,</div><div class='add'>+		.require_cnt_dis = 0,</div><div class='add'>+		.version = 1,</div><div class='add'>+		.keyfield_set = es0_keyfield_set,</div><div class='add'>+		.keyfield_set_size = ARRAY_SIZE(es0_keyfield_set),</div><div class='add'>+		.actionfield_set = es0_actionfield_set,</div><div class='add'>+		.actionfield_set_size = ARRAY_SIZE(es0_actionfield_set),</div><div class='add'>+		.keyfield_set_map = es0_keyfield_set_map,</div><div class='add'>+		.keyfield_set_map_size = es0_keyfield_set_map_size,</div><div class='add'>+		.actionfield_set_map = es0_actionfield_set_map,</div><div class='add'>+		.actionfield_set_map_size = es0_actionfield_set_map_size,</div><div class='add'>+		.keyfield_set_typegroups = es0_keyfield_set_typegroups,</div><div class='add'>+		.actionfield_set_typegroups = es0_actionfield_set_typegroups,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_TYPE_ES2] = {</div><div class='add'>+		.name = "es2",</div><div class='add'>+		.rows = 256,</div><div class='add'>+		.sw_count = 12,</div><div class='add'>+		.sw_width = 52,</div><div class='add'>+		.sticky_width = 1,</div><div class='add'>+		.act_width = 19,</div><div class='add'>+		.default_cnt = 39,</div><div class='add'>+		.require_cnt_dis = 0,</div><div class='add'>+		.version = 1,</div><div class='add'>+		.keyfield_set = es2_keyfield_set,</div><div class='add'>+		.keyfield_set_size = ARRAY_SIZE(es2_keyfield_set),</div><div class='add'>+		.actionfield_set = es2_actionfield_set,</div><div class='add'>+		.actionfield_set_size = ARRAY_SIZE(es2_actionfield_set),</div><div class='add'>+		.keyfield_set_map = es2_keyfield_set_map,</div><div class='add'>+		.keyfield_set_map_size = es2_keyfield_set_map_size,</div><div class='add'>+		.actionfield_set_map = es2_actionfield_set_map,</div><div class='add'>+		.actionfield_set_map_size = es2_actionfield_set_map_size,</div><div class='add'>+		.keyfield_set_typegroups = es2_keyfield_set_typegroups,</div><div class='add'>+		.actionfield_set_typegroups = es2_actionfield_set_typegroups,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct vcap_statistics lan969x_vcap_stats = {</div><div class='add'>+	.name = "lan969x",</div><div class='add'>+	.count = 4,</div><div class='add'>+	.keyfield_set_names = vcap_keyfield_set_names,</div><div class='add'>+	.actionfield_set_names = vcap_actionfield_set_names,</div><div class='add'>+	.keyfield_names = vcap_keyfield_names,</div><div class='add'>+	.actionfield_names = vcap_actionfield_names,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_impl.c b/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_impl.c<br/>new file mode 100644<br/>index 000000000000..543a1f2bf6bd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_impl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_impl.c</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+</div><div class='add'>+#include "vcap_api.h"</div><div class='add'>+#include "lan969x.h"</div><div class='add'>+</div><div class='add'>+const struct sparx5_vcap_inst lan969x_vcap_inst_cfg[] = {</div><div class='add'>+	{</div><div class='add'>+		.vtype = VCAP_TYPE_IS0, /* CLM-0 */</div><div class='add'>+		.vinst = 0,</div><div class='add'>+		.map_id = 1,</div><div class='add'>+		.lookups = SPARX5_IS0_LOOKUPS,</div><div class='add'>+		.lookups_per_instance = SPARX5_IS0_LOOKUPS / 3,</div><div class='add'>+		.first_cid = SPARX5_VCAP_CID_IS0_L0,</div><div class='add'>+		.last_cid = SPARX5_VCAP_CID_IS0_L2 - 1,</div><div class='add'>+		.blockno = 2,</div><div class='add'>+		.blocks = 1,</div><div class='add'>+		.ingress = true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.vtype = VCAP_TYPE_IS0, /* CLM-1 */</div><div class='add'>+		.vinst = 1,</div><div class='add'>+		.map_id = 2,</div><div class='add'>+		.lookups = SPARX5_IS0_LOOKUPS,</div><div class='add'>+		.lookups_per_instance = SPARX5_IS0_LOOKUPS / 3,</div><div class='add'>+		.first_cid = SPARX5_VCAP_CID_IS0_L2,</div><div class='add'>+		.last_cid = SPARX5_VCAP_CID_IS0_L4 - 1,</div><div class='add'>+		.blockno = 3,</div><div class='add'>+		.blocks = 1,</div><div class='add'>+		.ingress = true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.vtype = VCAP_TYPE_IS0, /* CLM-2 */</div><div class='add'>+		.vinst = 2,</div><div class='add'>+		.map_id = 3,</div><div class='add'>+		.lookups = SPARX5_IS0_LOOKUPS,</div><div class='add'>+		.lookups_per_instance = SPARX5_IS0_LOOKUPS / 3,</div><div class='add'>+		.first_cid = SPARX5_VCAP_CID_IS0_L4,</div><div class='add'>+		.last_cid = SPARX5_VCAP_CID_IS0_MAX,</div><div class='add'>+		.blockno = 4,</div><div class='add'>+		.blocks = 1,</div><div class='add'>+		.ingress = true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.vtype = VCAP_TYPE_IS2, /* IS2-0 */</div><div class='add'>+		.vinst = 0,</div><div class='add'>+		.map_id = 4,</div><div class='add'>+		.lookups = SPARX5_IS2_LOOKUPS,</div><div class='add'>+		.lookups_per_instance = SPARX5_IS2_LOOKUPS / 2,</div><div class='add'>+		.first_cid = SPARX5_VCAP_CID_IS2_L0,</div><div class='add'>+		.last_cid = SPARX5_VCAP_CID_IS2_L2 - 1,</div><div class='add'>+		.blockno = 0,</div><div class='add'>+		.blocks = 1,</div><div class='add'>+		.ingress = true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.vtype = VCAP_TYPE_IS2, /* IS2-1 */</div><div class='add'>+		.vinst = 1,</div><div class='add'>+		.map_id = 5,</div><div class='add'>+		.lookups = SPARX5_IS2_LOOKUPS,</div><div class='add'>+		.lookups_per_instance = SPARX5_IS2_LOOKUPS / 2,</div><div class='add'>+		.first_cid = SPARX5_VCAP_CID_IS2_L2,</div><div class='add'>+		.last_cid = SPARX5_VCAP_CID_IS2_MAX,</div><div class='add'>+		.blockno = 1,</div><div class='add'>+		.blocks = 1,</div><div class='add'>+		.ingress = true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.vtype = VCAP_TYPE_ES0,</div><div class='add'>+		.lookups = SPARX5_ES0_LOOKUPS,</div><div class='add'>+		.lookups_per_instance = SPARX5_ES0_LOOKUPS,</div><div class='add'>+		.first_cid = SPARX5_VCAP_CID_ES0_L0,</div><div class='add'>+		.last_cid = SPARX5_VCAP_CID_ES0_MAX,</div><div class='add'>+		.count = 1536,</div><div class='add'>+		.ingress = false,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.vtype = VCAP_TYPE_ES2,</div><div class='add'>+		.lookups = SPARX5_ES2_LOOKUPS,</div><div class='add'>+		.lookups_per_instance = SPARX5_ES2_LOOKUPS,</div><div class='add'>+		.first_cid = SPARX5_VCAP_CID_ES2_L0,</div><div class='add'>+		.last_cid = SPARX5_VCAP_CID_ES2_MAX,</div><div class='add'>+		.count = 1024,</div><div class='add'>+		.ingress = false,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c b/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c<br/>index 5fe941c66c17..5c46d81de530 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c</a></div><div class='hunk'>@@ -98,7 +98,6 @@ u32 sparx5_cal_speed_to_value(enum sparx5_cal_bw speed)</div><div class='ctx'> 	default: return 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(sparx5_cal_speed_to_value);</div><div class='ctx'> </div><div class='ctx'> static u32 sparx5_bandwidth_to_calendar(u32 bw)</div><div class='ctx'> {</div><div class='hunk'>@@ -150,7 +149,6 @@ enum sparx5_cal_bw sparx5_get_port_cal_speed(struct sparx5 *sparx5, u32 portno)</div><div class='ctx'> 		return SPX5_CAL_SPEED_NONE;</div><div class='ctx'> 	return sparx5_bandwidth_to_calendar(port-&gt;conf.bandwidth);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(sparx5_get_port_cal_speed);</div><div class='ctx'> </div><div class='ctx'> /* Auto configure the QSYS calendar based on port configuration */</div><div class='ctx'> int sparx5_config_auto_calendar(struct sparx5 *sparx5)</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c b/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c<br/>index 832f4ae57c83..049541eeaae0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c</a></div><div class='hunk'>@@ -1212,6 +1212,22 @@ static int sparx5_get_ts_info(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void sparx5_get_pauseparam(struct net_device *dev,</div><div class='add'>+				  struct ethtool_pauseparam *pause)</div><div class='add'>+{</div><div class='add'>+	struct sparx5_port *port = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	phylink_ethtool_get_pauseparam(port-&gt;phylink, pause);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sparx5_set_pauseparam(struct net_device *dev,</div><div class='add'>+				 struct ethtool_pauseparam *pause)</div><div class='add'>+{</div><div class='add'>+	struct sparx5_port *port = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return phylink_ethtool_set_pauseparam(port-&gt;phylink, pause);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct ethtool_ops sparx5_ethtool_ops = {</div><div class='ctx'> 	.get_sset_count         = sparx5_get_sset_count,</div><div class='ctx'> 	.get_strings            = sparx5_get_sset_strings,</div><div class='hunk'>@@ -1224,6 +1240,8 @@ const struct ethtool_ops sparx5_ethtool_ops = {</div><div class='ctx'> 	.get_eth_ctrl_stats     = sparx5_get_eth_mac_ctrl_stats,</div><div class='ctx'> 	.get_rmon_stats         = sparx5_get_eth_rmon_stats,</div><div class='ctx'> 	.get_ts_info            = sparx5_get_ts_info,</div><div class='add'>+	.get_pauseparam         = sparx5_get_pauseparam,</div><div class='add'>+	.set_pauseparam         = sparx5_set_pauseparam,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int sparx_stats_init(struct sparx5 *sparx5)</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c b/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c<br/>index 0027144a2af2..dbe86f937b21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c</a></div><div class='hunk'>@@ -18,9 +18,6 @@</div><div class='ctx'> #include "sparx5_main.h"</div><div class='ctx'> #include "sparx5_port.h"</div><div class='ctx'> </div><div class='del'>-#define FDMA_XTR_CHANNEL		6</div><div class='del'>-#define FDMA_INJ_CHANNEL		0</div><div class='del'>-</div><div class='ctx'> #define FDMA_XTR_BUFFER_SIZE		2048</div><div class='ctx'> #define FDMA_WEIGHT			4</div><div class='ctx'> </div><div class='hunk'>@@ -133,7 +130,7 @@ static void sparx5_fdma_tx_deactivate(struct sparx5 *sparx5, struct sparx5_tx *t</div><div class='ctx'> 		 sparx5, FDMA_CH_ACTIVATE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sparx5_fdma_reload(struct sparx5 *sparx5, struct fdma *fdma)</div><div class='add'>+void sparx5_fdma_reload(struct sparx5 *sparx5, struct fdma *fdma)</div><div class='ctx'> {</div><div class='ctx'> 	/* Reload the RX channel */</div><div class='ctx'> 	spx5_wr(BIT(fdma-&gt;channel_id), sparx5, FDMA_CH_RELOAD);</div><div class='hunk'>@@ -183,7 +180,7 @@ static bool sparx5_fdma_rx_get_frame(struct sparx5 *sparx5, struct sparx5_rx *rx</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sparx5_fdma_napi_callback(struct napi_struct *napi, int weight)</div><div class='add'>+int sparx5_fdma_napi_callback(struct napi_struct *napi, int weight)</div><div class='ctx'> {</div><div class='ctx'> 	struct sparx5_rx *rx = container_of(napi, struct sparx5_rx, napi);</div><div class='ctx'> 	struct sparx5 *sparx5 = container_of(rx, struct sparx5, rx);</div><div class='hunk'>@@ -213,11 +210,11 @@ static int sparx5_fdma_napi_callback(struct napi_struct *napi, int weight)</div><div class='ctx'> 	return counter;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int sparx5_fdma_xmit(struct sparx5 *sparx5, u32 *ifh, struct sk_buff *skb)</div><div class='add'>+int sparx5_fdma_xmit(struct sparx5 *sparx5, u32 *ifh, struct sk_buff *skb,</div><div class='add'>+		     struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sparx5_tx *tx = &amp;sparx5-&gt;tx;</div><div class='ctx'> 	struct fdma *fdma = &amp;tx-&gt;fdma;</div><div class='del'>-	static bool first_time = true;</div><div class='ctx'> 	void *virt_addr;</div><div class='ctx'> </div><div class='ctx'> 	fdma_dcb_advance(fdma);</div><div class='hunk'>@@ -238,12 +235,8 @@ int sparx5_fdma_xmit(struct sparx5 *sparx5, u32 *ifh, struct sk_buff *skb)</div><div class='ctx'> 		     FDMA_DCB_STATUS_BLOCKO(0) |</div><div class='ctx'> 		     FDMA_DCB_STATUS_BLOCKL(skb-&gt;len + IFH_LEN * 4 + 4));</div><div class='ctx'> </div><div class='del'>-	if (first_time) {</div><div class='del'>-		sparx5_fdma_tx_activate(sparx5, tx);</div><div class='del'>-		first_time = false;</div><div class='del'>-	} else {</div><div class='del'>-		sparx5_fdma_reload(sparx5, fdma);</div><div class='del'>-	}</div><div class='add'>+	sparx5_fdma_reload(sparx5, fdma);</div><div class='add'>+</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -260,10 +253,6 @@ static int sparx5_fdma_rx_alloc(struct sparx5 *sparx5)</div><div class='ctx'> 	fdma_dcbs_init(fdma, FDMA_DCB_INFO_DATAL(fdma-&gt;db_size),</div><div class='ctx'> 		       FDMA_DCB_STATUS_INTR);</div><div class='ctx'> </div><div class='del'>-	netif_napi_add_weight(rx-&gt;ndev, &amp;rx-&gt;napi, sparx5_fdma_napi_callback,</div><div class='del'>-			      FDMA_WEIGHT);</div><div class='del'>-	napi_enable(&amp;rx-&gt;napi);</div><div class='del'>-	sparx5_fdma_rx_activate(sparx5, rx);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -348,7 +337,7 @@ irqreturn_t sparx5_fdma_handler(int irq, void *args)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sparx5_fdma_injection_mode(struct sparx5 *sparx5)</div><div class='add'>+void sparx5_fdma_injection_mode(struct sparx5 *sparx5)</div><div class='ctx'> {</div><div class='ctx'> 	const int byte_swap = 1;</div><div class='ctx'> 	int portno;</div><div class='hunk'>@@ -410,7 +399,7 @@ static void sparx5_fdma_injection_mode(struct sparx5 *sparx5)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int sparx5_fdma_start(struct sparx5 *sparx5)</div><div class='add'>+int sparx5_fdma_init(struct sparx5 *sparx5)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -443,24 +432,55 @@ int sparx5_fdma_start(struct sparx5 *sparx5)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int sparx5_fdma_deinit(struct sparx5 *sparx5)</div><div class='add'>+{</div><div class='add'>+	sparx5_fdma_stop(sparx5);</div><div class='add'>+	fdma_free_phys(&amp;sparx5-&gt;rx.fdma);</div><div class='add'>+	fdma_free_phys(&amp;sparx5-&gt;tx.fdma);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u32 sparx5_fdma_port_ctrl(struct sparx5 *sparx5)</div><div class='ctx'> {</div><div class='ctx'> 	return spx5_rd(sparx5, FDMA_PORT_CTRL(0));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int sparx5_fdma_start(struct sparx5 *sparx5)</div><div class='add'>+{</div><div class='add'>+	const struct sparx5_ops *ops = sparx5-&gt;data-&gt;ops;</div><div class='add'>+	struct sparx5_rx *rx = &amp;sparx5-&gt;rx;</div><div class='add'>+	struct sparx5_tx *tx = &amp;sparx5-&gt;tx;</div><div class='add'>+</div><div class='add'>+	netif_napi_add_weight(rx-&gt;ndev,</div><div class='add'>+			      &amp;rx-&gt;napi,</div><div class='add'>+			      ops-&gt;fdma_poll,</div><div class='add'>+			      FDMA_WEIGHT);</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;rx-&gt;napi);</div><div class='add'>+</div><div class='add'>+	sparx5_fdma_rx_activate(sparx5, rx);</div><div class='add'>+	sparx5_fdma_tx_activate(sparx5, tx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int sparx5_fdma_stop(struct sparx5 *sparx5)</div><div class='ctx'> {</div><div class='add'>+	struct sparx5_rx *rx = &amp;sparx5-&gt;rx;</div><div class='add'>+	struct sparx5_tx *tx = &amp;sparx5-&gt;tx;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	napi_disable(&amp;sparx5-&gt;rx.napi);</div><div class='add'>+	napi_disable(&amp;rx-&gt;napi);</div><div class='add'>+</div><div class='ctx'> 	/* Stop the fdma and channel interrupts */</div><div class='del'>-	sparx5_fdma_rx_deactivate(sparx5, &amp;sparx5-&gt;rx);</div><div class='del'>-	sparx5_fdma_tx_deactivate(sparx5, &amp;sparx5-&gt;tx);</div><div class='add'>+	sparx5_fdma_rx_deactivate(sparx5, rx);</div><div class='add'>+	sparx5_fdma_tx_deactivate(sparx5, tx);</div><div class='add'>+</div><div class='ctx'> 	/* Wait for the RX channel to stop */</div><div class='ctx'> 	read_poll_timeout(sparx5_fdma_port_ctrl, val,</div><div class='ctx'> 			  FDMA_PORT_CTRL_XTR_BUF_IS_EMPTY_GET(val) == 0,</div><div class='ctx'> 			  500, 10000, 0, sparx5);</div><div class='del'>-	fdma_free_phys(&amp;sparx5-&gt;rx.fdma);</div><div class='del'>-	fdma_free_phys(&amp;sparx5-&gt;tx.fdma);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c<br/>index 4f2d5413a64f..582145713cfd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_main.c</a></div><div class='hunk'>@@ -24,12 +24,14 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/reset.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "../lan969x/lan969x.h" /* for lan969x match data */</div><div class='add'>+#include "lan969x/lan969x.h" /* for lan969x match data */</div><div class='ctx'> </div><div class='ctx'> #include "sparx5_main_regs.h"</div><div class='ctx'> #include "sparx5_main.h"</div><div class='ctx'> #include "sparx5_port.h"</div><div class='ctx'> #include "sparx5_qos.h"</div><div class='add'>+#include "sparx5_vcap_ag_api.h"</div><div class='add'>+#include "sparx5_vcap_impl.h"</div><div class='ctx'> </div><div class='ctx'> const struct sparx5_regs *regs;</div><div class='ctx'> </div><div class='hunk'>@@ -311,10 +313,13 @@ static int sparx5_create_port(struct sparx5 *sparx5,</div><div class='ctx'> 			      struct initial_port_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct sparx5_port *spx5_port;</div><div class='add'>+	const struct sparx5_ops *ops;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	struct phylink *phylink;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	ops = sparx5-&gt;data-&gt;ops;</div><div class='add'>+</div><div class='ctx'> 	ndev = sparx5_create_netdev(sparx5, config-&gt;portno);</div><div class='ctx'> 	if (IS_ERR(ndev)) {</div><div class='ctx'> 		dev_err(sparx5-&gt;dev, "Could not create net device: %02u\n",</div><div class='hunk'>@@ -333,7 +338,6 @@ static int sparx5_create_port(struct sparx5 *sparx5,</div><div class='ctx'> 	spx5_port-&gt;custom_etype = 0x8880; /* Vitesse */</div><div class='ctx'> 	spx5_port-&gt;phylink_pcs.poll = true;</div><div class='ctx'> 	spx5_port-&gt;phylink_pcs.ops = &amp;sparx5_phylink_pcs_ops;</div><div class='del'>-	spx5_port-&gt;phylink_pcs.neg_mode = true;</div><div class='ctx'> 	spx5_port-&gt;is_mrouter = false;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;spx5_port-&gt;tc_templates);</div><div class='ctx'> 	sparx5-&gt;ports[config-&gt;portno] = spx5_port;</div><div class='hunk'>@@ -355,6 +359,9 @@ static int sparx5_create_port(struct sparx5 *sparx5,</div><div class='ctx'> 		MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD |</div><div class='ctx'> 		MAC_2500FD | MAC_5000FD | MAC_10000FD | MAC_25000FD;</div><div class='ctx'> </div><div class='add'>+	if (ops-&gt;is_port_rgmii(spx5_port-&gt;portno))</div><div class='add'>+		phy_interface_set_rgmii(spx5_port-&gt;phylink_config.supported_interfaces);</div><div class='add'>+</div><div class='ctx'> 	__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='ctx'> 		  spx5_port-&gt;phylink_config.supported_interfaces);</div><div class='ctx'> 	__set_bit(PHY_INTERFACE_MODE_QSGMII,</div><div class='hunk'>@@ -388,6 +395,8 @@ static int sparx5_create_port(struct sparx5 *sparx5,</div><div class='ctx'> </div><div class='ctx'> 	spx5_port-&gt;phylink = phylink;</div><div class='ctx'> </div><div class='add'>+	spx5_port-&gt;ndev-&gt;dev.of_node = spx5_port-&gt;of_node;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -701,6 +710,11 @@ static int sparx5_start(struct sparx5 *sparx5)</div><div class='ctx'> 	/* Init masks */</div><div class='ctx'> 	sparx5_update_fwd(sparx5);</div><div class='ctx'> </div><div class='add'>+	/* Init flood masks */</div><div class='add'>+	for (int pgid = sparx5_get_pgid(sparx5, PGID_UC_FLOOD);</div><div class='add'>+	     pgid &lt;= sparx5_get_pgid(sparx5, PGID_BCAST); pgid++)</div><div class='add'>+		sparx5_pgid_clear(sparx5, pgid);</div><div class='add'>+</div><div class='ctx'> 	/* CPU copy CPU pgids */</div><div class='ctx'> 	spx5_wr(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1), sparx5,</div><div class='ctx'> 		ANA_AC_PGID_MISC_CFG(sparx5_get_pgid(sparx5, PGID_CPU)));</div><div class='hunk'>@@ -768,26 +782,27 @@ static int sparx5_start(struct sparx5 *sparx5)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	if (is_sparx5(sparx5)) {</div><div class='del'>-		err = sparx5_vcap_init(sparx5);</div><div class='del'>-		if (err) {</div><div class='del'>-			sparx5_unregister_notifier_blocks(sparx5);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='add'>+	err = sparx5_vcap_init(sparx5);</div><div class='add'>+	if (err) {</div><div class='add'>+		sparx5_unregister_notifier_blocks(sparx5);</div><div class='add'>+		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Start Frame DMA with fallback to register based INJ/XTR */</div><div class='ctx'> 	err = -ENXIO;</div><div class='del'>-	if (sparx5-&gt;fdma_irq &gt;= 0 &amp;&amp; is_sparx5(sparx5)) {</div><div class='del'>-		if (GCB_CHIP_ID_REV_ID_GET(sparx5-&gt;chip_id) &gt; 0)</div><div class='del'>-			err = devm_request_threaded_irq(sparx5-&gt;dev,</div><div class='del'>-							sparx5-&gt;fdma_irq,</div><div class='del'>-							NULL,</div><div class='del'>-							sparx5_fdma_handler,</div><div class='del'>-							IRQF_ONESHOT,</div><div class='del'>-							"sparx5-fdma", sparx5);</div><div class='del'>-		if (!err)</div><div class='del'>-			err = sparx5_fdma_start(sparx5);</div><div class='add'>+	if (sparx5-&gt;fdma_irq &gt;= 0) {</div><div class='add'>+		if (GCB_CHIP_ID_REV_ID_GET(sparx5-&gt;chip_id) &gt; 0 ||</div><div class='add'>+		    !is_sparx5(sparx5))</div><div class='add'>+			err = devm_request_irq(sparx5-&gt;dev,</div><div class='add'>+					       sparx5-&gt;fdma_irq,</div><div class='add'>+					       sparx5_fdma_handler,</div><div class='add'>+					       0,</div><div class='add'>+					       "sparx5-fdma", sparx5);</div><div class='add'>+		if (!err) {</div><div class='add'>+			err = ops-&gt;fdma_init(sparx5);</div><div class='add'>+			if (!err)</div><div class='add'>+				sparx5_fdma_start(sparx5);</div><div class='add'>+		}</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			sparx5-&gt;fdma_irq = -ENXIO;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -831,6 +846,7 @@ static int mchp_sparx5_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct initial_port_config *configs, *config;</div><div class='ctx'> 	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='ctx'> 	struct device_node *ports, *portnp;</div><div class='add'>+	const struct sparx5_ops *ops;</div><div class='ctx'> 	struct reset_control *reset;</div><div class='ctx'> 	struct sparx5 *sparx5;</div><div class='ctx'> 	int idx = 0, err = 0;</div><div class='hunk'>@@ -852,6 +868,7 @@ static int mchp_sparx5_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	regs = sparx5-&gt;data-&gt;regs;</div><div class='add'>+	ops = sparx5-&gt;data-&gt;ops;</div><div class='ctx'> </div><div class='ctx'> 	/* Do switch core reset if available */</div><div class='ctx'> 	reset = devm_reset_control_get_optional_shared(&amp;pdev-&gt;dev, "switch");</div><div class='hunk'>@@ -881,7 +898,7 @@ static int mchp_sparx5_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	for_each_available_child_of_node(ports, portnp) {</div><div class='ctx'> 		struct sparx5_port_config *conf;</div><div class='del'>-		struct phy *serdes;</div><div class='add'>+		struct phy *serdes = NULL;</div><div class='ctx'> 		u32 portno;</div><div class='ctx'> </div><div class='ctx'> 		err = of_property_read_u32(portnp, "reg", &amp;portno);</div><div class='hunk'>@@ -911,13 +928,17 @@ static int mchp_sparx5_probe(struct platform_device *pdev)</div><div class='ctx'> 			conf-&gt;sd_sgpio = ~0;</div><div class='ctx'> 		else</div><div class='ctx'> 			sparx5-&gt;sd_sgpio_remapping = true;</div><div class='del'>-		serdes = devm_of_phy_get(sparx5-&gt;dev, portnp, NULL);</div><div class='del'>-		if (IS_ERR(serdes)) {</div><div class='del'>-			err = dev_err_probe(sparx5-&gt;dev, PTR_ERR(serdes),</div><div class='del'>-					    "port %u: missing serdes\n",</div><div class='del'>-					    portno);</div><div class='del'>-			of_node_put(portnp);</div><div class='del'>-			goto cleanup_config;</div><div class='add'>+		/* There is no SerDes node for RGMII ports. */</div><div class='add'>+		if (!ops-&gt;is_port_rgmii(portno)) {</div><div class='add'>+			serdes = devm_of_phy_get(sparx5-&gt;dev, portnp, NULL);</div><div class='add'>+			if (IS_ERR(serdes)) {</div><div class='add'>+				err = dev_err_probe(sparx5-&gt;dev,</div><div class='add'>+						    PTR_ERR(serdes),</div><div class='add'>+						    "port %u: missing serdes\n",</div><div class='add'>+						    portno);</div><div class='add'>+				of_node_put(portnp);</div><div class='add'>+				goto cleanup_config;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		config-&gt;portno = portno;</div><div class='ctx'> 		config-&gt;node = portnp;</div><div class='hunk'>@@ -1015,6 +1036,7 @@ cleanup_pnode:</div><div class='ctx'> static void mchp_sparx5_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sparx5 *sparx5 = platform_get_drvdata(pdev);</div><div class='add'>+	const struct sparx5_ops *ops = sparx5-&gt;data-&gt;ops;</div><div class='ctx'> </div><div class='ctx'> 	debugfs_remove_recursive(sparx5-&gt;debugfs_root);</div><div class='ctx'> 	if (sparx5-&gt;xtr_irq) {</div><div class='hunk'>@@ -1026,7 +1048,7 @@ static void mchp_sparx5_remove(struct platform_device *pdev)</div><div class='ctx'> 		sparx5-&gt;fdma_irq = -ENXIO;</div><div class='ctx'> 	}</div><div class='ctx'> 	sparx5_ptp_deinit(sparx5);</div><div class='del'>-	sparx5_fdma_stop(sparx5);</div><div class='add'>+	ops-&gt;fdma_deinit(sparx5);</div><div class='ctx'> 	sparx5_cleanup_ports(sparx5);</div><div class='ctx'> 	sparx5_vcap_destroy(sparx5);</div><div class='ctx'> 	/* Unregister netdevs */</div><div class='hunk'>@@ -1063,6 +1085,9 @@ static const struct sparx5_consts sparx5_consts = {</div><div class='ctx'> 	.qres_max_prio_idx   = 630,</div><div class='ctx'> 	.qres_max_colour_idx = 638,</div><div class='ctx'> 	.tod_pin             = 4,</div><div class='add'>+	.vcaps               = sparx5_vcaps,</div><div class='add'>+	.vcaps_cfg           = sparx5_vcap_inst_cfg,</div><div class='add'>+	.vcap_stats          = &amp;sparx5_vcap_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct sparx5_ops sparx5_ops = {</div><div class='hunk'>@@ -1070,6 +1095,7 @@ static const struct sparx5_ops sparx5_ops = {</div><div class='ctx'> 	.is_port_5g              = &amp;sparx5_port_is_5g,</div><div class='ctx'> 	.is_port_10g             = &amp;sparx5_port_is_10g,</div><div class='ctx'> 	.is_port_25g             = &amp;sparx5_port_is_25g,</div><div class='add'>+	.is_port_rgmii           = &amp;sparx5_port_is_rgmii,</div><div class='ctx'> 	.get_port_dev_index      = &amp;sparx5_port_dev_mapping,</div><div class='ctx'> 	.get_port_dev_bit        = &amp;sparx5_port_dev_mapping,</div><div class='ctx'> 	.get_hsch_max_group_rate = &amp;sparx5_get_hsch_max_group_rate,</div><div class='hunk'>@@ -1077,6 +1103,10 @@ static const struct sparx5_ops sparx5_ops = {</div><div class='ctx'> 	.set_port_mux            = &amp;sparx5_port_mux_set,</div><div class='ctx'> 	.ptp_irq_handler         = &amp;sparx5_ptp_irq_handler,</div><div class='ctx'> 	.dsm_calendar_calc       = &amp;sparx5_dsm_calendar_calc,</div><div class='add'>+	.fdma_init               = &amp;sparx5_fdma_init,</div><div class='add'>+	.fdma_deinit             = &amp;sparx5_fdma_deinit,</div><div class='add'>+	.fdma_poll               = &amp;sparx5_fdma_napi_callback,</div><div class='add'>+	.fdma_xmit               = &amp;sparx5_fdma_xmit,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct sparx5_match_data sparx5_desc = {</div><div class='hunk'>@@ -1090,7 +1120,7 @@ static const struct sparx5_match_data sparx5_desc = {</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id mchp_sparx5_match[] = {</div><div class='ctx'> 	{ .compatible = "microchip,sparx5-switch", .data = &amp;sparx5_desc },</div><div class='del'>-#if IS_ENABLED(CONFIG_LAN969X_SWITCH)</div><div class='add'>+#ifdef CONFIG_LAN969X_SWITCH</div><div class='ctx'> 	{ .compatible = "microchip,lan9691-switch", .data = &amp;lan969x_desc },</div><div class='ctx'> #endif</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h<br/>index 146bdc938adc..fe7d8bcc0cd9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_main.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_main.h</a></div><div class='hunk'>@@ -112,6 +112,8 @@ enum sparx5_feature {</div><div class='ctx'> #define XTR_QUEUE     0</div><div class='ctx'> #define INJ_QUEUE     0</div><div class='ctx'> </div><div class='add'>+#define FDMA_XTR_CHANNEL		6</div><div class='add'>+#define FDMA_INJ_CHANNEL		0</div><div class='ctx'> #define FDMA_DCB_MAX			64</div><div class='ctx'> #define FDMA_RX_DCB_MAX_DBS		15</div><div class='ctx'> #define FDMA_TX_DCB_MAX_DBS		1</div><div class='hunk'>@@ -157,11 +159,25 @@ struct sparx5_calendar_data {</div><div class='ctx'>  */</div><div class='ctx'> struct sparx5_rx {</div><div class='ctx'> 	struct fdma fdma;</div><div class='del'>-	struct sk_buff *skb[FDMA_DCB_MAX][FDMA_RX_DCB_MAX_DBS];</div><div class='add'>+	struct page_pool *page_pool;</div><div class='add'>+	union {</div><div class='add'>+		struct sk_buff *skb[FDMA_DCB_MAX][FDMA_RX_DCB_MAX_DBS];</div><div class='add'>+		struct page *page[FDMA_DCB_MAX][FDMA_RX_DCB_MAX_DBS];</div><div class='add'>+	};</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	u64 packets;</div><div class='add'>+	u8 page_order;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Used to store information about TX buffers. */</div><div class='add'>+struct sparx5_tx_buf {</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	bool used;</div><div class='add'>+	bool ptp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Frame DMA transmit state:</div><div class='hunk'>@@ -169,6 +185,7 @@ struct sparx5_rx {</div><div class='ctx'>  */</div><div class='ctx'> struct sparx5_tx {</div><div class='ctx'> 	struct fdma fdma;</div><div class='add'>+	struct sparx5_tx_buf *dbs;</div><div class='ctx'> 	u64 packets;</div><div class='ctx'> 	u64 dropped;</div><div class='ctx'> };</div><div class='hunk'>@@ -303,6 +320,9 @@ struct sparx5_consts {</div><div class='ctx'> 	u32 qres_max_prio_idx;   /* Maximum QRES prio index */</div><div class='ctx'> 	u32 qres_max_colour_idx; /* Maximum QRES colour index */</div><div class='ctx'> 	u32 tod_pin;             /* PTP TOD pin */</div><div class='add'>+	const struct sparx5_vcap_inst *vcaps_cfg;</div><div class='add'>+	const struct vcap_info *vcaps;</div><div class='add'>+	const struct vcap_statistics *vcap_stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct sparx5_ops {</div><div class='hunk'>@@ -310,6 +330,7 @@ struct sparx5_ops {</div><div class='ctx'> 	bool (*is_port_5g)(int portno);</div><div class='ctx'> 	bool (*is_port_10g)(int portno);</div><div class='ctx'> 	bool (*is_port_25g)(int portno);</div><div class='add'>+	bool (*is_port_rgmii)(int portno);</div><div class='ctx'> 	u32  (*get_port_dev_index)(struct sparx5 *sparx5, int port);</div><div class='ctx'> 	u32  (*get_port_dev_bit)(struct sparx5 *sparx5, int port);</div><div class='ctx'> 	u32  (*get_hsch_max_group_rate)(int grp);</div><div class='hunk'>@@ -320,6 +341,13 @@ struct sparx5_ops {</div><div class='ctx'> 	irqreturn_t (*ptp_irq_handler)(int irq, void *args);</div><div class='ctx'> 	int (*dsm_calendar_calc)(struct sparx5 *sparx5, u32 taxi,</div><div class='ctx'> 				 struct sparx5_calendar_data *data);</div><div class='add'>+	int (*port_config_rgmii)(struct sparx5_port *port,</div><div class='add'>+				 struct sparx5_port_config *conf);</div><div class='add'>+	int (*fdma_init)(struct sparx5 *sparx5);</div><div class='add'>+	int (*fdma_deinit)(struct sparx5 *sparx5);</div><div class='add'>+	int (*fdma_poll)(struct napi_struct *napi, int weight);</div><div class='add'>+	int (*fdma_xmit)(struct sparx5 *sparx5, u32 *ifh, struct sk_buff *skb,</div><div class='add'>+			 struct net_device *dev);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct sparx5_main_io_resource {</div><div class='hunk'>@@ -430,10 +458,16 @@ int sparx5_manual_injection_mode(struct sparx5 *sparx5);</div><div class='ctx'> void sparx5_port_inj_timer_setup(struct sparx5_port *port);</div><div class='ctx'> </div><div class='ctx'> /* sparx5_fdma.c */</div><div class='add'>+int sparx5_fdma_init(struct sparx5 *sparx5);</div><div class='add'>+int sparx5_fdma_deinit(struct sparx5 *sparx5);</div><div class='ctx'> int sparx5_fdma_start(struct sparx5 *sparx5);</div><div class='ctx'> int sparx5_fdma_stop(struct sparx5 *sparx5);</div><div class='del'>-int sparx5_fdma_xmit(struct sparx5 *sparx5, u32 *ifh, struct sk_buff *skb);</div><div class='add'>+int sparx5_fdma_napi_callback(struct napi_struct *napi, int weight);</div><div class='add'>+int sparx5_fdma_xmit(struct sparx5 *sparx5, u32 *ifh, struct sk_buff *skb,</div><div class='add'>+		     struct net_device *dev);</div><div class='ctx'> irqreturn_t sparx5_fdma_handler(int irq, void *args);</div><div class='add'>+void sparx5_fdma_reload(struct sparx5 *sparx5, struct fdma *fdma);</div><div class='add'>+void sparx5_fdma_injection_mode(struct sparx5 *sparx5);</div><div class='ctx'> </div><div class='ctx'> /* sparx5_mactable.c */</div><div class='ctx'> void sparx5_mact_pull_work(struct work_struct *work);</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h<br/>index 561344f19062..d9ef4ef137b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h</a></div><div class='hunk'>@@ -37,6 +37,7 @@ enum sparx5_target {</div><div class='ctx'> 	TARGET_FDMA = 117,</div><div class='ctx'> 	TARGET_GCB = 118,</div><div class='ctx'> 	TARGET_HSCH = 119,</div><div class='add'>+	TARGET_HSIO_WRAP = 120,</div><div class='ctx'> 	TARGET_LRN = 122,</div><div class='ctx'> 	TARGET_PCEP = 129,</div><div class='ctx'> 	TARGET_PCS10G_BR = 132,</div><div class='hunk'>@@ -54,6 +55,7 @@ enum sparx5_target {</div><div class='ctx'> 	TARGET_VCAP_SUPER = 326,</div><div class='ctx'> 	TARGET_VOP = 327,</div><div class='ctx'> 	TARGET_XQS = 331,</div><div class='add'>+	TARGET_DEVRGMII = 392,</div><div class='ctx'> 	NUM_TARGETS = 517</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -5367,6 +5369,69 @@ extern const struct sparx5_regs *regs;</div><div class='ctx'> #define HSCH_TAS_STATEMACHINE_CFG_REVISIT_DLY_GET(x)\</div><div class='ctx'> 	FIELD_GET(HSCH_TAS_STATEMACHINE_CFG_REVISIT_DLY, x)</div><div class='ctx'> </div><div class='add'>+/* LAN969X ONLY */</div><div class='add'>+/* HSIOWRAP:XMII_CFG:XMII_CFG */</div><div class='add'>+#define HSIO_WRAP_XMII_CFG(g)                                                  \</div><div class='add'>+	__REG(TARGET_HSIO_WRAP, 0, 1, 116, g, 2, 20, 0, 0, 1, 4)</div><div class='add'>+</div><div class='add'>+#define HSIO_WRAP_XMII_CFG_GPIO_XMII_CFG         GENMASK(2, 1)</div><div class='add'>+#define HSIO_WRAP_XMII_CFG_GPIO_XMII_CFG_SET(x)\</div><div class='add'>+	FIELD_PREP(HSIO_WRAP_XMII_CFG_GPIO_XMII_CFG, x)</div><div class='add'>+#define HSIO_WRAP_XMII_CFG_GPIO_XMII_CFG_GET(x)\</div><div class='add'>+	FIELD_GET(HSIO_WRAP_XMII_CFG_GPIO_XMII_CFG, x)</div><div class='add'>+</div><div class='add'>+/* LAN969X ONLY */</div><div class='add'>+/* HSIOWRAP:XMII_CFG:RGMII_CFG */</div><div class='add'>+#define HSIO_WRAP_RGMII_CFG(g)                                                 \</div><div class='add'>+	__REG(TARGET_HSIO_WRAP, 0, 1, 116, g, 2, 20, 4, 0, 1, 4)</div><div class='add'>+</div><div class='add'>+#define HSIO_WRAP_RGMII_CFG_TX_CLK_CFG           GENMASK(4, 2)</div><div class='add'>+#define HSIO_WRAP_RGMII_CFG_TX_CLK_CFG_SET(x)\</div><div class='add'>+	FIELD_PREP(HSIO_WRAP_RGMII_CFG_TX_CLK_CFG, x)</div><div class='add'>+#define HSIO_WRAP_RGMII_CFG_TX_CLK_CFG_GET(x)\</div><div class='add'>+	FIELD_GET(HSIO_WRAP_RGMII_CFG_TX_CLK_CFG, x)</div><div class='add'>+</div><div class='add'>+#define HSIO_WRAP_RGMII_CFG_RGMII_TX_RST         BIT(1)</div><div class='add'>+#define HSIO_WRAP_RGMII_CFG_RGMII_TX_RST_SET(x)\</div><div class='add'>+	FIELD_PREP(HSIO_WRAP_RGMII_CFG_RGMII_TX_RST, x)</div><div class='add'>+#define HSIO_WRAP_RGMII_CFG_RGMII_TX_RST_GET(x)\</div><div class='add'>+	FIELD_GET(HSIO_WRAP_RGMII_CFG_RGMII_TX_RST, x)</div><div class='add'>+</div><div class='add'>+#define HSIO_WRAP_RGMII_CFG_RGMII_RX_RST         BIT(0)</div><div class='add'>+#define HSIO_WRAP_RGMII_CFG_RGMII_RX_RST_SET(x)\</div><div class='add'>+	FIELD_PREP(HSIO_WRAP_RGMII_CFG_RGMII_RX_RST, x)</div><div class='add'>+#define HSIO_WRAP_RGMII_CFG_RGMII_RX_RST_GET(x)\</div><div class='add'>+	FIELD_GET(HSIO_WRAP_RGMII_CFG_RGMII_RX_RST, x)</div><div class='add'>+</div><div class='add'>+/* LAN969X ONLY */</div><div class='add'>+/* HSIOWRAP:XMII_CFG:DLL_CFG */</div><div class='add'>+#define HSIO_WRAP_DLL_CFG(g, r)                                                \</div><div class='add'>+	__REG(TARGET_HSIO_WRAP, 0, 1, 116, g, 2, 20, 12, r, 2, 4)</div><div class='add'>+</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_ENA                BIT(19)</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_ENA_SET(x)\</div><div class='add'>+	FIELD_PREP(HSIO_WRAP_DLL_CFG_DLL_ENA, x)</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_ENA_GET(x)\</div><div class='add'>+	FIELD_GET(HSIO_WRAP_DLL_CFG_DLL_ENA, x)</div><div class='add'>+</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_CLK_ENA            BIT(18)</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_CLK_ENA_SET(x)\</div><div class='add'>+	FIELD_PREP(HSIO_WRAP_DLL_CFG_DLL_CLK_ENA, x)</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_CLK_ENA_GET(x)\</div><div class='add'>+	FIELD_GET(HSIO_WRAP_DLL_CFG_DLL_CLK_ENA, x)</div><div class='add'>+</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_CLK_SEL            GENMASK(17, 15)</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_CLK_SEL_SET(x)\</div><div class='add'>+	FIELD_PREP(HSIO_WRAP_DLL_CFG_DLL_CLK_SEL, x)</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_CLK_SEL_GET(x)\</div><div class='add'>+	FIELD_GET(HSIO_WRAP_DLL_CFG_DLL_CLK_SEL, x)</div><div class='add'>+</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_RST                BIT(0)</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_RST_SET(x)\</div><div class='add'>+	FIELD_PREP(HSIO_WRAP_DLL_CFG_DLL_RST, x)</div><div class='add'>+#define HSIO_WRAP_DLL_CFG_DLL_RST_GET(x)\</div><div class='add'>+	FIELD_GET(HSIO_WRAP_DLL_CFG_DLL_RST, x)</div><div class='add'>+</div><div class='ctx'> /* LRN:COMMON:COMMON_ACCESS_CTRL */</div><div class='ctx'> #define LRN_COMMON_ACCESS_CTRL                                                 \</div><div class='ctx'> 	__REG(TARGET_LRN, 0, 1, 0, 0, 1, 72, 0, 0, 1, 4)</div><div class='hunk'>@@ -8110,4 +8175,84 @@ extern const struct sparx5_regs *regs;</div><div class='ctx'> #define XQS_CNT(g)                                                             \</div><div class='ctx'> 	__REG(TARGET_XQS, 0, 1, 0, g, 1024, 4, 0, 0, 1, 4)</div><div class='ctx'> </div><div class='add'>+/* LAN969X ONLY */</div><div class='add'>+/* DEV1G:DEV_CFG_STATUS:DEV_RST_CTRL */</div><div class='add'>+#define DEVRGMII_DEV_RST_CTRL(t)                                               \</div><div class='add'>+	__REG(TARGET_DEVRGMII, t, 2, 0, 0, 1, 36, 0, 0, 1, 4)</div><div class='add'>+</div><div class='add'>+#define DEVRGMII_DEV_RST_CTRL_SPEED_SEL          GENMASK(22, 20)</div><div class='add'>+#define DEVRGMII_DEV_RST_CTRL_SPEED_SEL_SET(x)\</div><div class='add'>+	FIELD_PREP(DEVRGMII_DEV_RST_CTRL_SPEED_SEL, x)</div><div class='add'>+#define DEVRGMII_DEV_RST_CTRL_SPEED_SEL_GET(x)\</div><div class='add'>+	FIELD_GET(DEVRGMII_DEV_RST_CTRL_SPEED_SEL, x)</div><div class='add'>+</div><div class='add'>+/* LAN969X ONLY */</div><div class='add'>+/* DEV1G:MAC_CFG_STATUS:MAC_ENA_CFG */</div><div class='add'>+#define DEVRGMII_MAC_ENA_CFG(t)                                                \</div><div class='add'>+	__REG(TARGET_DEVRGMII, t, 2, 36, 0, 1, 36, 0, 0, 1, 4)</div><div class='add'>+</div><div class='add'>+#define DEVRGMII_MAC_ENA_CFG_RX_ENA              BIT(4)</div><div class='add'>+#define DEVRGMII_MAC_ENA_CFG_RX_ENA_SET(x)\</div><div class='add'>+	FIELD_PREP(DEVRGMII_MAC_ENA_CFG_RX_ENA, x)</div><div class='add'>+#define DEVRGMII_MAC_ENA_CFG_RX_ENA_GET(x)\</div><div class='add'>+	FIELD_GET(DEVRGMII_MAC_ENA_CFG_RX_ENA, x)</div><div class='add'>+</div><div class='add'>+#define DEVRGMII_MAC_ENA_CFG_TX_ENA              BIT(0)</div><div class='add'>+#define DEVRGMII_MAC_ENA_CFG_TX_ENA_SET(x)\</div><div class='add'>+	FIELD_PREP(DEVRGMII_MAC_ENA_CFG_TX_ENA, x)</div><div class='add'>+#define DEVRGMII_MAC_ENA_CFG_TX_ENA_GET(x)\</div><div class='add'>+	FIELD_GET(DEVRGMII_MAC_ENA_CFG_TX_ENA, x)</div><div class='add'>+</div><div class='add'>+/* LAN969X ONLY */</div><div class='add'>+/* DEV1G:MAC_CFG_STATUS:MAC_TAGS_CFG */</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG(t)                                               \</div><div class='add'>+	__REG(TARGET_DEVRGMII, t, 2, 36, 0, 1, 36, 12, 0, 1, 4)</div><div class='add'>+</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_TAG_ID             GENMASK(31, 16)</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_TAG_ID_SET(x)\</div><div class='add'>+	FIELD_PREP(DEVRGMII_MAC_TAGS_CFG_TAG_ID, x)</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_TAG_ID_GET(x)\</div><div class='add'>+	FIELD_GET(DEVRGMII_MAC_TAGS_CFG_TAG_ID, x)</div><div class='add'>+</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA   BIT(3)</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA_SET(x)\</div><div class='add'>+	FIELD_PREP(DEVRGMII_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA, x)</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA_GET(x)\</div><div class='add'>+	FIELD_GET(DEVRGMII_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA, x)</div><div class='add'>+</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_PB_ENA             GENMASK(2, 1)</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_PB_ENA_SET(x)\</div><div class='add'>+	FIELD_PREP(DEVRGMII_MAC_TAGS_CFG_PB_ENA, x)</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_PB_ENA_GET(x)\</div><div class='add'>+	FIELD_GET(DEVRGMII_MAC_TAGS_CFG_PB_ENA, x)</div><div class='add'>+</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_VLAN_AWR_ENA       BIT(0)</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_VLAN_AWR_ENA_SET(x)\</div><div class='add'>+	FIELD_PREP(DEVRGMII_MAC_TAGS_CFG_VLAN_AWR_ENA, x)</div><div class='add'>+#define DEVRGMII_MAC_TAGS_CFG_VLAN_AWR_ENA_GET(x)\</div><div class='add'>+	FIELD_GET(DEVRGMII_MAC_TAGS_CFG_VLAN_AWR_ENA, x)</div><div class='add'>+</div><div class='add'>+/* LAN969X ONLY */</div><div class='add'>+/* DEV1G:MAC_CFG_STATUS:MAC_IFG_CFG */</div><div class='add'>+#define DEVRGMII_MAC_IFG_CFG(t)                                                \</div><div class='add'>+	__REG(TARGET_DEVRGMII, t, 2, 36, 0, 1, 36, 24, 0, 1, 4)</div><div class='add'>+</div><div class='add'>+#define DEVRGMII_MAC_IFG_CFG_TX_IFG              GENMASK(12, 8)</div><div class='add'>+#define DEVRGMII_MAC_IFG_CFG_TX_IFG_SET(x)\</div><div class='add'>+	FIELD_PREP(DEVRGMII_MAC_IFG_CFG_TX_IFG, x)</div><div class='add'>+#define DEVRGMII_MAC_IFG_CFG_TX_IFG_GET(x)\</div><div class='add'>+	FIELD_GET(DEVRGMII_MAC_IFG_CFG_TX_IFG, x)</div><div class='add'>+</div><div class='add'>+#define DEVRGMII_MAC_IFG_CFG_RX_IFG2             GENMASK(7, 4)</div><div class='add'>+#define DEVRGMII_MAC_IFG_CFG_RX_IFG2_SET(x)\</div><div class='add'>+	FIELD_PREP(DEVRGMII_MAC_IFG_CFG_RX_IFG2, x)</div><div class='add'>+#define DEVRGMII_MAC_IFG_CFG_RX_IFG2_GET(x)\</div><div class='add'>+	FIELD_GET(DEVRGMII_MAC_IFG_CFG_RX_IFG2, x)</div><div class='add'>+</div><div class='add'>+#define DEVRGMII_MAC_IFG_CFG_RX_IFG1             GENMASK(3, 0)</div><div class='add'>+#define DEVRGMII_MAC_IFG_CFG_RX_IFG1_SET(x)\</div><div class='add'>+	FIELD_PREP(DEVRGMII_MAC_IFG_CFG_RX_IFG1, x)</div><div class='add'>+#define DEVRGMII_MAC_IFG_CFG_RX_IFG1_GET(x)\</div><div class='add'>+	FIELD_GET(DEVRGMII_MAC_IFG_CFG_RX_IFG1, x)</div><div class='add'>+</div><div class='ctx'> #endif /* _SPARX5_MAIN_REGS_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c b/drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c<br/>index 9806729e9c62..76097761fa97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c</a></div><div class='hunk'>@@ -12,7 +12,6 @@</div><div class='ctx'> #define SPX5_MIRROR_DISABLED 0</div><div class='ctx'> #define SPX5_MIRROR_EGRESS 1</div><div class='ctx'> #define SPX5_MIRROR_INGRESS 2</div><div class='del'>-#define SPX5_MIRROR_MONITOR_PORT_DEFAULT 65</div><div class='ctx'> #define SPX5_QFWD_MP_OFFSET 9 /* Mirror port offset in the QFWD register */</div><div class='ctx'> </div><div class='ctx'> /* Convert from bool ingress/egress to mirror direction */</div><div class='hunk'>@@ -200,7 +199,7 @@ void sparx5_mirror_del(struct sparx5_mall_entry *entry)</div><div class='ctx'> </div><div class='ctx'> 	sparx5_mirror_monitor_set(sparx5,</div><div class='ctx'> 				  mirror_idx,</div><div class='del'>-				  SPX5_MIRROR_MONITOR_PORT_DEFAULT);</div><div class='add'>+				  sparx5-&gt;data-&gt;consts-&gt;n_ports);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void sparx5_mirror_stats(struct sparx5_mall_entry *entry,</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c b/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c<br/>index b6f635d85820..f713656f1fae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_packet.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_packet.c</a></div><div class='hunk'>@@ -232,9 +232,12 @@ netdev_tx_t sparx5_port_xmit_impl(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='ctx'> 	struct sparx5_port *port = netdev_priv(dev);</div><div class='ctx'> 	struct sparx5 *sparx5 = port-&gt;sparx5;</div><div class='add'>+	const struct sparx5_ops *ops;</div><div class='ctx'> 	u32 ifh[IFH_LEN];</div><div class='ctx'> 	netdev_tx_t ret;</div><div class='ctx'> </div><div class='add'>+	ops = sparx5-&gt;data-&gt;ops;</div><div class='add'>+</div><div class='ctx'> 	memset(ifh, 0, IFH_LEN * 4);</div><div class='ctx'> 	sparx5_set_port_ifh(sparx5, ifh, port-&gt;portno);</div><div class='ctx'> </div><div class='hunk'>@@ -254,7 +257,7 @@ netdev_tx_t sparx5_port_xmit_impl(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='ctx'> 	spin_lock(&amp;sparx5-&gt;tx_lock);</div><div class='ctx'> 	if (sparx5-&gt;fdma_irq &gt; 0)</div><div class='del'>-		ret = sparx5_fdma_xmit(sparx5, ifh, skb);</div><div class='add'>+		ret = ops-&gt;fdma_xmit(sparx5, ifh, skb, dev);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = sparx5_inject(sparx5, ifh, skb, dev);</div><div class='ctx'> 	spin_unlock(&amp;sparx5-&gt;tx_lock);</div><div class='hunk'>@@ -264,6 +267,12 @@ netdev_tx_t sparx5_port_xmit_impl(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto drop;</div><div class='ctx'> </div><div class='add'>+	if (!is_sparx5(sparx5))</div><div class='add'>+		/* When lan969x and TX_OK, stats and SKB consumption is handled</div><div class='add'>+		 * in the TX completion loop, so dont go any further.</div><div class='add'>+		 */</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='ctx'> 	stats-&gt;tx_bytes += skb-&gt;len;</div><div class='ctx'> 	stats-&gt;tx_packets++;</div><div class='ctx'> 	sparx5-&gt;tx.packets++;</div><div class='hunk'>@@ -366,6 +375,6 @@ irqreturn_t sparx5_xtr_handler(int irq, void *_sparx5)</div><div class='ctx'> </div><div class='ctx'> void sparx5_port_inj_timer_setup(struct sparx5_port *port)</div><div class='ctx'> {</div><div class='del'>-	hrtimer_init(&amp;port-&gt;inj_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-	port-&gt;inj_timer.function = sparx5_injection_timeout;</div><div class='add'>+	hrtimer_setup(&amp;port-&gt;inj_timer, sparx5_injection_timeout, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c b/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c<br/>index f8562c1a894d..cfb4b2e17ace 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c</a></div><div class='hunk'>@@ -32,7 +32,19 @@ sparx5_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='ctx'> {</div><div class='ctx'> 	struct sparx5_port *port = netdev_priv(to_net_dev(config-&gt;dev));</div><div class='ctx'> </div><div class='del'>-	return &amp;port-&gt;phylink_pcs;</div><div class='add'>+	/* Return the PCS for all the modes that require it. */</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_QSGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_5GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_10GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_25GBASER:</div><div class='add'>+		return &amp;port-&gt;phylink_pcs;</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sparx5_phylink_mac_config(struct phylink_config *config,</div><div class='hunk'>@@ -77,7 +89,7 @@ static struct sparx5_port *sparx5_pcs_to_port(struct phylink_pcs *pcs)</div><div class='ctx'> 	return container_of(pcs, struct sparx5_port, phylink_pcs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sparx5_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+static void sparx5_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 				 struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct sparx5_port *port = sparx5_pcs_to_port(pcs);</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c<br/>index 1401761c6251..04bc8fffaf96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_port.c</a></div><div class='hunk'>@@ -257,6 +257,15 @@ static int sparx5_port_verify_speed(struct sparx5 *sparx5,</div><div class='ctx'> 		     conf-&gt;speed != SPEED_25000))</div><div class='ctx'> 			return sparx5_port_error(port, conf, SPX5_PERR_SPEED);</div><div class='ctx'> 		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		if (conf-&gt;speed != SPEED_1000 &amp;&amp;</div><div class='add'>+		    conf-&gt;speed != SPEED_100 &amp;&amp;</div><div class='add'>+		    conf-&gt;speed != SPEED_10)</div><div class='add'>+			return sparx5_port_error(port, conf, SPX5_PERR_SPEED);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return sparx5_port_error(port, conf, SPX5_PERR_IFTYPE);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -994,6 +1003,7 @@ int sparx5_port_config(struct sparx5 *sparx5,</div><div class='ctx'> 		       struct sparx5_port *port,</div><div class='ctx'> 		       struct sparx5_port_config *conf)</div><div class='ctx'> {</div><div class='add'>+	bool rgmii = phy_interface_mode_is_rgmii(conf-&gt;phy_mode);</div><div class='ctx'> 	bool high_speed_dev = sparx5_is_baser(conf-&gt;portmode);</div><div class='ctx'> 	const struct sparx5_ops *ops = sparx5-&gt;data-&gt;ops;</div><div class='ctx'> 	int err, urgency, stop_wm;</div><div class='hunk'>@@ -1002,8 +1012,14 @@ int sparx5_port_config(struct sparx5 *sparx5,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	if (rgmii) {</div><div class='add'>+		err = ops-&gt;port_config_rgmii(port, conf);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* high speed device is already configured */</div><div class='del'>-	if (!high_speed_dev)</div><div class='add'>+	if (!rgmii &amp;&amp; !high_speed_dev)</div><div class='ctx'> 		sparx5_port_config_low_set(sparx5, port, conf);</div><div class='ctx'> </div><div class='ctx'> 	/* Configure flow control */</div><div class='hunk'>@@ -1067,24 +1083,6 @@ int sparx5_port_init(struct sparx5 *sparx5,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* Configure MAC vlan awareness */</div><div class='del'>-	err = sparx5_port_max_tags_set(sparx5, port);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Set Max Length */</div><div class='del'>-	spx5_rmw(DEV2G5_MAC_MAXLEN_CFG_MAX_LEN_SET(ETH_MAXLEN),</div><div class='del'>-		 DEV2G5_MAC_MAXLEN_CFG_MAX_LEN,</div><div class='del'>-		 sparx5,</div><div class='del'>-		 DEV2G5_MAC_MAXLEN_CFG(port-&gt;portno));</div><div class='del'>-</div><div class='del'>-	/* 1G/2G5: Signal Detect configuration */</div><div class='del'>-	spx5_wr(DEV2G5_PCS1G_SD_CFG_SD_POL_SET(sd_pol) |</div><div class='del'>-		DEV2G5_PCS1G_SD_CFG_SD_SEL_SET(sd_sel) |</div><div class='del'>-		DEV2G5_PCS1G_SD_CFG_SD_ENA_SET(sd_ena),</div><div class='del'>-		sparx5,</div><div class='del'>-		DEV2G5_PCS1G_SD_CFG(port-&gt;portno));</div><div class='del'>-</div><div class='ctx'> 	/* Set Pause WM hysteresis */</div><div class='ctx'> 	spx5_rmw(QSYS_PAUSE_CFG_PAUSE_START_SET(pause_start) |</div><div class='ctx'> 		 QSYS_PAUSE_CFG_PAUSE_STOP_SET(pause_stop) |</div><div class='hunk'>@@ -1108,6 +1106,27 @@ int sparx5_port_init(struct sparx5 *sparx5,</div><div class='ctx'> 		 ANA_CL_FILTER_CTRL_FILTER_SMAC_MC_DIS,</div><div class='ctx'> 		 sparx5, ANA_CL_FILTER_CTRL(port-&gt;portno));</div><div class='ctx'> </div><div class='add'>+	if (ops-&gt;is_port_rgmii(port-&gt;portno))</div><div class='add'>+		return 0; /* RGMII device - nothing more to configure */</div><div class='add'>+</div><div class='add'>+	/* Configure MAC vlan awareness */</div><div class='add'>+	err = sparx5_port_max_tags_set(sparx5, port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Set Max Length */</div><div class='add'>+	spx5_rmw(DEV2G5_MAC_MAXLEN_CFG_MAX_LEN_SET(ETH_MAXLEN),</div><div class='add'>+		 DEV2G5_MAC_MAXLEN_CFG_MAX_LEN,</div><div class='add'>+		 sparx5,</div><div class='add'>+		 DEV2G5_MAC_MAXLEN_CFG(port-&gt;portno));</div><div class='add'>+</div><div class='add'>+	/* 1G/2G5: Signal Detect configuration */</div><div class='add'>+	spx5_wr(DEV2G5_PCS1G_SD_CFG_SD_POL_SET(sd_pol) |</div><div class='add'>+		DEV2G5_PCS1G_SD_CFG_SD_SEL_SET(sd_sel) |</div><div class='add'>+		DEV2G5_PCS1G_SD_CFG_SD_ENA_SET(sd_ena),</div><div class='add'>+		sparx5,</div><div class='add'>+		DEV2G5_PCS1G_SD_CFG(port-&gt;portno));</div><div class='add'>+</div><div class='ctx'> 	if (conf-&gt;portmode == PHY_INTERFACE_MODE_QSGMII ||</div><div class='ctx'> 	    conf-&gt;portmode == PHY_INTERFACE_MODE_SGMII) {</div><div class='ctx'> 		err = sparx5_serdes_set(sparx5, port, conf);</div><div class='hunk'>@@ -1151,7 +1170,7 @@ int sparx5_port_init(struct sparx5 *sparx5,</div><div class='ctx'> 	spx5_inst_rmw(DEV10G_MAC_MAXLEN_CFG_MAX_LEN_SET(ETH_MAXLEN),</div><div class='ctx'> 		      DEV10G_MAC_MAXLEN_CFG_MAX_LEN,</div><div class='ctx'> 		      devinst,</div><div class='del'>-		      DEV10G_MAC_ENA_CFG(0));</div><div class='add'>+		      DEV10G_MAC_MAXLEN_CFG(0));</div><div class='ctx'> </div><div class='ctx'> 	/* Handle Signal Detect in 10G PCS */</div><div class='ctx'> 	spx5_inst_wr(PCS10G_BR_PCS_SD_CFG_SD_POL_SET(sd_pol) |</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.h b/drivers/net/ethernet/microchip/sparx5/sparx5_port.h<br/>index 9b9bcc6834bc..c8a37468a3d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_port.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_port.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_port.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_port.h</a></div><div class='hunk'>@@ -40,6 +40,11 @@ static inline bool sparx5_port_is_25g(int portno)</div><div class='ctx'> 	return portno &gt;= 56 &amp;&amp; portno &lt;= 63;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool sparx5_port_is_rgmii(int portno)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u32 sparx5_to_high_dev(struct sparx5 *sparx5, int port)</div><div class='ctx'> {</div><div class='ctx'> 	const struct sparx5_ops *ops = sparx5-&gt;data-&gt;ops;</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c b/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c<br/>index 1c2903700a9c..2f168700f63c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c</a></div><div class='hunk'>@@ -303,7 +303,6 @@ void sparx5_get_hwtimestamp(struct sparx5 *sparx5,</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;sparx5-&gt;ptp_clock_lock, flags);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(sparx5_get_hwtimestamp);</div><div class='ctx'> </div><div class='ctx'> irqreturn_t sparx5_ptp_irq_handler(int irq, void *args)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c b/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c<br/>index bc9ecb9392cd..0a71abbd3da5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c</a></div><div class='hunk'>@@ -176,6 +176,7 @@ static int sparx5_port_bridge_join(struct sparx5_port *port,</div><div class='ctx'> 				   struct net_device *bridge,</div><div class='ctx'> 				   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct switchdev_brport_flags flags = {0};</div><div class='ctx'> 	struct sparx5 *sparx5 = port-&gt;sparx5;</div><div class='ctx'> 	struct net_device *ndev = port-&gt;ndev;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -205,6 +206,11 @@ static int sparx5_port_bridge_join(struct sparx5_port *port,</div><div class='ctx'> 	 */</div><div class='ctx'> 	__dev_mc_unsync(ndev, sparx5_mc_unsync);</div><div class='ctx'> </div><div class='add'>+	/* Enable uc/mc/bc flooding */</div><div class='add'>+	flags.mask = BR_FLOOD | BR_MCAST_FLOOD | BR_BCAST_FLOOD;</div><div class='add'>+	flags.val = flags.mask;</div><div class='add'>+	sparx5_port_attr_bridge_flags(port, flags);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_switchdev_offload:</div><div class='hunk'>@@ -215,6 +221,7 @@ err_switchdev_offload:</div><div class='ctx'> static void sparx5_port_bridge_leave(struct sparx5_port *port,</div><div class='ctx'> 				     struct net_device *bridge)</div><div class='ctx'> {</div><div class='add'>+	struct switchdev_brport_flags flags = {0};</div><div class='ctx'> 	struct sparx5 *sparx5 = port-&gt;sparx5;</div><div class='ctx'> </div><div class='ctx'> 	switchdev_bridge_port_unoffload(port-&gt;ndev, NULL, NULL, NULL);</div><div class='hunk'>@@ -234,6 +241,11 @@ static void sparx5_port_bridge_leave(struct sparx5_port *port,</div><div class='ctx'> </div><div class='ctx'> 	/* Port enters in host more therefore restore mc list */</div><div class='ctx'> 	__dev_mc_sync(port-&gt;ndev, sparx5_mc_sync, sparx5_mc_unsync);</div><div class='add'>+</div><div class='add'>+	/* Disable uc/mc/bc flooding */</div><div class='add'>+	flags.mask = BR_FLOOD | BR_MCAST_FLOOD | BR_BCAST_FLOOD;</div><div class='add'>+	flags.val = 0;</div><div class='add'>+	sparx5_port_attr_bridge_flags(port, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sparx5_port_changeupper(struct net_device *dev,</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.h b/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.h<br/>index 7d106f1276fe..e68f5639a40a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.h</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> #ifndef __SPARX5_VCAP_AG_API_H__</div><div class='ctx'> #define __SPARX5_VCAP_AG_API_H__</div><div class='ctx'> </div><div class='add'>+#include "vcap_api.h"</div><div class='add'>+</div><div class='ctx'> /* VCAPs */</div><div class='ctx'> extern const struct vcap_info sparx5_vcaps[];</div><div class='ctx'> extern const struct vcap_statistics sparx5_vcap_stats;</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c b/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c<br/>index 967c8621c250..25066ddb8d4d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c</a></div><div class='hunk'>@@ -17,7 +17,6 @@</div><div class='ctx'> #define SUPER_VCAP_BLK_SIZE 3072 /* addresses per Super VCAP block */</div><div class='ctx'> #define STREAMSIZE (64 * 4)  /* bytes in the VCAP cache area */</div><div class='ctx'> </div><div class='del'>-#define SPARX5_IS2_LOOKUPS 4</div><div class='ctx'> #define VCAP_IS2_KEYSEL(_ena, _noneth, _v4_mc, _v4_uc, _v6_mc, _v6_uc, _arp) \</div><div class='ctx'> 	(ANA_ACL_VCAP_S2_KEY_SEL_KEY_SEL_ENA_SET(_ena) | \</div><div class='ctx'> 	 ANA_ACL_VCAP_S2_KEY_SEL_NON_ETH_KEY_SEL_SET(_noneth) | \</div><div class='hunk'>@@ -27,7 +26,6 @@</div><div class='ctx'> 	 ANA_ACL_VCAP_S2_KEY_SEL_IP6_UC_KEY_SEL_SET(_v6_uc) | \</div><div class='ctx'> 	 ANA_ACL_VCAP_S2_KEY_SEL_ARP_KEY_SEL_SET(_arp))</div><div class='ctx'> </div><div class='del'>-#define SPARX5_IS0_LOOKUPS 6</div><div class='ctx'> #define VCAP_IS0_KEYSEL(_ena, _etype, _ipv4, _ipv6, _mpls_uc, _mpls_mc, _mlbs) \</div><div class='ctx'> 	(ANA_CL_ADV_CL_CFG_LOOKUP_ENA_SET(_ena) | \</div><div class='ctx'> 	ANA_CL_ADV_CL_CFG_ETYPE_CLM_KEY_SEL_SET(_etype) | \</div><div class='hunk'>@@ -37,31 +35,17 @@</div><div class='ctx'> 	ANA_CL_ADV_CL_CFG_MPLS_MC_CLM_KEY_SEL_SET(_mpls_mc) | \</div><div class='ctx'> 	ANA_CL_ADV_CL_CFG_MLBS_CLM_KEY_SEL_SET(_mlbs))</div><div class='ctx'> </div><div class='del'>-#define SPARX5_ES0_LOOKUPS 1</div><div class='ctx'> #define VCAP_ES0_KEYSEL(_key) (REW_RTAG_ETAG_CTRL_ES0_ISDX_KEY_ENA_SET(_key))</div><div class='ctx'> #define SPARX5_STAT_ESDX_GRN_PKTS  0x300</div><div class='ctx'> #define SPARX5_STAT_ESDX_YEL_PKTS  0x301</div><div class='ctx'> </div><div class='del'>-#define SPARX5_ES2_LOOKUPS 2</div><div class='ctx'> #define VCAP_ES2_KEYSEL(_ena, _arp, _ipv4, _ipv6) \</div><div class='ctx'> 	(EACL_VCAP_ES2_KEY_SEL_KEY_ENA_SET(_ena) | \</div><div class='ctx'> 	EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL_SET(_arp) | \</div><div class='ctx'> 	EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL_SET(_ipv4) | \</div><div class='ctx'> 	EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL_SET(_ipv6))</div><div class='ctx'> </div><div class='del'>-static struct sparx5_vcap_inst {</div><div class='del'>-	enum vcap_type vtype; /* type of vcap */</div><div class='del'>-	int vinst; /* instance number within the same type */</div><div class='del'>-	int lookups; /* number of lookups in this vcap type */</div><div class='del'>-	int lookups_per_instance; /* number of lookups in this instance */</div><div class='del'>-	int first_cid; /* first chain id in this vcap */</div><div class='del'>-	int last_cid; /* last chain id in this vcap */</div><div class='del'>-	int count; /* number of available addresses, not in super vcap */</div><div class='del'>-	int map_id; /* id in the super vcap block mapping (if applicable) */</div><div class='del'>-	int blockno; /* starting block in super vcap (if applicable) */</div><div class='del'>-	int blocks; /* number of blocks in super vcap (if applicable) */</div><div class='del'>-	bool ingress; /* is vcap in the ingress path */</div><div class='del'>-} sparx5_vcap_inst_cfg[] = {</div><div class='add'>+const struct sparx5_vcap_inst sparx5_vcap_inst_cfg[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.vtype = VCAP_TYPE_IS0, /* CLM-0 */</div><div class='ctx'> 		.vinst = 0,</div><div class='hunk'>@@ -1793,6 +1777,7 @@ void sparx5_vcap_set_port_keyset(struct net_device *ndev,</div><div class='ctx'> static void sparx5_vcap_is0_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> 					       struct vcap_admin *admin)</div><div class='ctx'> {</div><div class='add'>+	const struct sparx5_consts *consts = sparx5-&gt;data-&gt;consts;</div><div class='ctx'> 	int portno, lookup;</div><div class='ctx'> 	u32 keysel;</div><div class='ctx'> </div><div class='hunk'>@@ -1804,7 +1789,7 @@ static void sparx5_vcap_is0_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> 				 VCAP_IS0_PS_MPLS_FOLLOW_ETYPE,</div><div class='ctx'> 				 VCAP_IS0_PS_MLBS_FOLLOW_ETYPE);</div><div class='ctx'> 	for (lookup = 0; lookup &lt; admin-&gt;lookups; ++lookup) {</div><div class='del'>-		for (portno = 0; portno &lt; SPX5_PORTS; ++portno) {</div><div class='add'>+		for (portno = 0; portno &lt; consts-&gt;n_ports; ++portno) {</div><div class='ctx'> 			spx5_wr(keysel, sparx5,</div><div class='ctx'> 				ANA_CL_ADV_CL_CFG(portno, lookup));</div><div class='ctx'> 			spx5_rmw(ANA_CL_ADV_CL_CFG_LOOKUP_ENA,</div><div class='hunk'>@@ -1819,6 +1804,7 @@ static void sparx5_vcap_is0_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> static void sparx5_vcap_is2_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> 					       struct vcap_admin *admin)</div><div class='ctx'> {</div><div class='add'>+	const struct sparx5_consts *consts = sparx5-&gt;data-&gt;consts;</div><div class='ctx'> 	int portno, lookup;</div><div class='ctx'> 	u32 keysel;</div><div class='ctx'> </div><div class='hunk'>@@ -1829,13 +1815,13 @@ static void sparx5_vcap_is2_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> 				 VCAP_IS2_PS_IPV6_UC_IP_7TUPLE,</div><div class='ctx'> 				 VCAP_IS2_PS_ARP_ARP);</div><div class='ctx'> 	for (lookup = 0; lookup &lt; admin-&gt;lookups; ++lookup) {</div><div class='del'>-		for (portno = 0; portno &lt; SPX5_PORTS; ++portno) {</div><div class='add'>+		for (portno = 0; portno &lt; consts-&gt;n_ports; ++portno) {</div><div class='ctx'> 			spx5_wr(keysel, sparx5,</div><div class='ctx'> 				ANA_ACL_VCAP_S2_KEY_SEL(portno, lookup));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* IS2 lookups are in bit 0:3 */</div><div class='del'>-	for (portno = 0; portno &lt; SPX5_PORTS; ++portno)</div><div class='add'>+	for (portno = 0; portno &lt; consts-&gt;n_ports; ++portno)</div><div class='ctx'> 		spx5_rmw(ANA_ACL_VCAP_S2_CFG_SEC_ENA_SET(0xf),</div><div class='ctx'> 			 ANA_ACL_VCAP_S2_CFG_SEC_ENA,</div><div class='ctx'> 			 sparx5,</div><div class='hunk'>@@ -1846,11 +1832,12 @@ static void sparx5_vcap_is2_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> static void sparx5_vcap_es0_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> 					       struct vcap_admin *admin)</div><div class='ctx'> {</div><div class='add'>+	const struct sparx5_consts *consts = sparx5-&gt;data-&gt;consts;</div><div class='ctx'> 	int portno;</div><div class='ctx'> 	u32 keysel;</div><div class='ctx'> </div><div class='ctx'> 	keysel = VCAP_ES0_KEYSEL(VCAP_ES0_PS_FORCE_ISDX_LOOKUPS);</div><div class='del'>-	for (portno = 0; portno &lt; SPX5_PORTS; ++portno)</div><div class='add'>+	for (portno = 0; portno &lt; consts-&gt;n_ports; ++portno)</div><div class='ctx'> 		spx5_rmw(keysel, REW_RTAG_ETAG_CTRL_ES0_ISDX_KEY_ENA,</div><div class='ctx'> 			 sparx5, REW_RTAG_ETAG_CTRL(portno));</div><div class='ctx'> </div><div class='hunk'>@@ -1862,6 +1849,7 @@ static void sparx5_vcap_es0_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> static void sparx5_vcap_es2_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> 					       struct vcap_admin *admin)</div><div class='ctx'> {</div><div class='add'>+	const struct sparx5_consts *consts = sparx5-&gt;data-&gt;consts;</div><div class='ctx'> 	int portno, lookup;</div><div class='ctx'> 	u32 keysel;</div><div class='ctx'> </div><div class='hunk'>@@ -1869,7 +1857,7 @@ static void sparx5_vcap_es2_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> 				 VCAP_ES2_PS_IPV4_IP4_TCP_UDP_OTHER,</div><div class='ctx'> 				 VCAP_ES2_PS_IPV6_IP_7TUPLE);</div><div class='ctx'> 	for (lookup = 0; lookup &lt; admin-&gt;lookups; ++lookup)</div><div class='del'>-		for (portno = 0; portno &lt; SPX5_PORTS; ++portno)</div><div class='add'>+		for (portno = 0; portno &lt; consts-&gt;n_ports; ++portno)</div><div class='ctx'> 			spx5_wr(keysel, sparx5,</div><div class='ctx'> 				EACL_VCAP_ES2_KEY_SEL(portno, lookup));</div><div class='ctx'> }</div><div class='hunk'>@@ -1901,19 +1889,20 @@ static void sparx5_vcap_port_key_selection(struct sparx5 *sparx5,</div><div class='ctx'> static void sparx5_vcap_port_key_deselection(struct sparx5 *sparx5,</div><div class='ctx'> 					     struct vcap_admin *admin)</div><div class='ctx'> {</div><div class='add'>+	const struct sparx5_consts *consts = sparx5-&gt;data-&gt;consts;</div><div class='ctx'> 	int portno, lookup;</div><div class='ctx'> </div><div class='ctx'> 	switch (admin-&gt;vtype) {</div><div class='ctx'> 	case VCAP_TYPE_IS0:</div><div class='ctx'> 		for (lookup = 0; lookup &lt; admin-&gt;lookups; ++lookup)</div><div class='del'>-			for (portno = 0; portno &lt; SPX5_PORTS; ++portno)</div><div class='add'>+			for (portno = 0; portno &lt; consts-&gt;n_ports; ++portno)</div><div class='ctx'> 				spx5_rmw(ANA_CL_ADV_CL_CFG_LOOKUP_ENA_SET(0),</div><div class='ctx'> 					 ANA_CL_ADV_CL_CFG_LOOKUP_ENA,</div><div class='ctx'> 					 sparx5,</div><div class='ctx'> 					 ANA_CL_ADV_CL_CFG(portno, lookup));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case VCAP_TYPE_IS2:</div><div class='del'>-		for (portno = 0; portno &lt; SPX5_PORTS; ++portno)</div><div class='add'>+		for (portno = 0; portno &lt; consts-&gt;n_ports; ++portno)</div><div class='ctx'> 			spx5_rmw(ANA_ACL_VCAP_S2_CFG_SEC_ENA_SET(0),</div><div class='ctx'> 				 ANA_ACL_VCAP_S2_CFG_SEC_ENA,</div><div class='ctx'> 				 sparx5,</div><div class='hunk'>@@ -1925,7 +1914,7 @@ static void sparx5_vcap_port_key_deselection(struct sparx5 *sparx5,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case VCAP_TYPE_ES2:</div><div class='ctx'> 		for (lookup = 0; lookup &lt; admin-&gt;lookups; ++lookup)</div><div class='del'>-			for (portno = 0; portno &lt; SPX5_PORTS; ++portno)</div><div class='add'>+			for (portno = 0; portno &lt; consts-&gt;n_ports; ++portno)</div><div class='ctx'> 				spx5_rmw(EACL_VCAP_ES2_KEY_SEL_KEY_ENA_SET(0),</div><div class='ctx'> 					 EACL_VCAP_ES2_KEY_SEL_KEY_ENA,</div><div class='ctx'> 					 sparx5,</div><div class='hunk'>@@ -2042,6 +2031,7 @@ static void sparx5_vcap_block_alloc(struct sparx5 *sparx5,</div><div class='ctx'> /* Allocate a vcap control and vcap instances and configure the system */</div><div class='ctx'> int sparx5_vcap_init(struct sparx5 *sparx5)</div><div class='ctx'> {</div><div class='add'>+	const struct sparx5_consts *consts = sparx5-&gt;data-&gt;consts;</div><div class='ctx'> 	const struct sparx5_vcap_inst *cfg;</div><div class='ctx'> 	struct vcap_control *ctrl;</div><div class='ctx'> 	struct vcap_admin *admin;</div><div class='hunk'>@@ -2063,14 +2053,14 @@ int sparx5_vcap_init(struct sparx5 *sparx5)</div><div class='ctx'> </div><div class='ctx'> 	sparx5-&gt;vcap_ctrl = ctrl;</div><div class='ctx'> 	/* select the sparx5 VCAP model */</div><div class='del'>-	ctrl-&gt;vcaps = sparx5_vcaps;</div><div class='del'>-	ctrl-&gt;stats = &amp;sparx5_vcap_stats;</div><div class='add'>+	ctrl-&gt;vcaps = consts-&gt;vcaps;</div><div class='add'>+	ctrl-&gt;stats = consts-&gt;vcap_stats;</div><div class='ctx'> 	/* Setup callbacks to allow the API to use the VCAP HW */</div><div class='ctx'> 	ctrl-&gt;ops = &amp;sparx5_vcap_ops;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;ctrl-&gt;list);</div><div class='ctx'> 	for (idx = 0; idx &lt; ARRAY_SIZE(sparx5_vcap_inst_cfg); ++idx) {</div><div class='del'>-		cfg = &amp;sparx5_vcap_inst_cfg[idx];</div><div class='add'>+		cfg = &amp;consts-&gt;vcaps_cfg[idx];</div><div class='ctx'> 		admin = sparx5_vcap_admin_alloc(sparx5, ctrl, cfg);</div><div class='ctx'> 		if (IS_ERR(admin)) {</div><div class='ctx'> 			err = PTR_ERR(admin);</div><div class='hunk'>@@ -2085,7 +2075,7 @@ int sparx5_vcap_init(struct sparx5 *sparx5)</div><div class='ctx'> 		list_add_tail(&amp;admin-&gt;list, &amp;ctrl-&gt;list);</div><div class='ctx'> 	}</div><div class='ctx'> 	dir = vcap_debugfs(sparx5-&gt;dev, sparx5-&gt;debugfs_root, ctrl);</div><div class='del'>-	for (idx = 0; idx &lt; SPX5_PORTS; ++idx)</div><div class='add'>+	for (idx = 0; idx &lt; consts-&gt;n_ports; ++idx)</div><div class='ctx'> 		if (sparx5-&gt;ports[idx])</div><div class='ctx'> 			vcap_port_debugfs(sparx5-&gt;dev, dir, ctrl,</div><div class='ctx'> 					  sparx5-&gt;ports[idx]-&gt;ndev);</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h b/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h<br/>index 2684d9199b05..d0a42406bf26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h</a></div><div class='hunk'>@@ -16,6 +16,11 @@</div><div class='ctx'> #include "vcap_api.h"</div><div class='ctx'> #include "vcap_api_client.h"</div><div class='ctx'> </div><div class='add'>+#define SPARX5_IS2_LOOKUPS 4</div><div class='add'>+#define SPARX5_IS0_LOOKUPS 6</div><div class='add'>+#define SPARX5_ES0_LOOKUPS 1</div><div class='add'>+#define SPARX5_ES2_LOOKUPS 2</div><div class='add'>+</div><div class='ctx'> #define SPARX5_VCAP_CID_IS0_L0 VCAP_CID_INGRESS_L0 /* IS0/CLM lookup 0 */</div><div class='ctx'> #define SPARX5_VCAP_CID_IS0_L1 VCAP_CID_INGRESS_L1 /* IS0/CLM lookup 1 */</div><div class='ctx'> #define SPARX5_VCAP_CID_IS0_L2 VCAP_CID_INGRESS_L2 /* IS0/CLM lookup 2 */</div><div class='hunk'>@@ -40,6 +45,22 @@</div><div class='ctx'> #define SPARX5_VCAP_CID_ES2_MAX \</div><div class='ctx'> 	(VCAP_CID_EGRESS_STAGE2_L1 + VCAP_CID_LOOKUP_SIZE - 1) /* ES2 Max */</div><div class='ctx'> </div><div class='add'>+struct sparx5_vcap_inst {</div><div class='add'>+	enum vcap_type vtype; /* type of vcap */</div><div class='add'>+	int vinst; /* instance number within the same type */</div><div class='add'>+	int lookups; /* number of lookups in this vcap type */</div><div class='add'>+	int lookups_per_instance; /* number of lookups in this instance */</div><div class='add'>+	int first_cid; /* first chain id in this vcap */</div><div class='add'>+	int last_cid; /* last chain id in this vcap */</div><div class='add'>+	int count; /* number of available addresses, not in super vcap */</div><div class='add'>+	int map_id; /* id in the super vcap block mapping (if applicable) */</div><div class='add'>+	int blockno; /* starting block in super vcap (if applicable) */</div><div class='add'>+	int blocks; /* number of blocks in super vcap (if applicable) */</div><div class='add'>+	bool ingress; /* is vcap in the ingress path */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct sparx5_vcap_inst sparx5_vcap_inst_cfg[];</div><div class='add'>+</div><div class='ctx'> /* IS0 port keyset selection control */</div><div class='ctx'> </div><div class='ctx'> /* IS0 ethernet, IPv4, IPv6 traffic type keyset generation */</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c b/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c<br/>index d42097aa60a0..494782871903 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c</a></div><div class='hunk'>@@ -167,16 +167,6 @@ void sparx5_update_fwd(struct sparx5 *sparx5)</div><div class='ctx'> 	/* Divide up fwd mask in 32 bit words */</div><div class='ctx'> 	bitmap_to_arr32(mask, sparx5-&gt;bridge_fwd_mask, SPX5_PORTS);</div><div class='ctx'> </div><div class='del'>-	/* Update flood masks */</div><div class='del'>-	for (port = sparx5_get_pgid(sparx5, PGID_UC_FLOOD);</div><div class='del'>-	     port &lt;= sparx5_get_pgid(sparx5, PGID_BCAST); port++) {</div><div class='del'>-		spx5_wr(mask[0], sparx5, ANA_AC_PGID_CFG(port));</div><div class='del'>-		if (is_sparx5(sparx5)) {</div><div class='del'>-			spx5_wr(mask[1], sparx5, ANA_AC_PGID_CFG1(port));</div><div class='del'>-			spx5_wr(mask[2], sparx5, ANA_AC_PGID_CFG2(port));</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Update SRC masks */</div><div class='ctx'> 	for (port = 0; port &lt; sparx5-&gt;data-&gt;consts-&gt;n_ports; port++) {</div><div class='ctx'> 		if (test_bit(port, sparx5-&gt;bridge_fwd_mask)) {</div><div class='head'>diff --git a/drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c b/drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c<br/>index 7251121ab196..16eb3de60eb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c</a></div><div class='hunk'>@@ -366,12 +366,13 @@ static void vcap_api_iterator_init_test(struct kunit *test)</div><div class='ctx'> 	struct vcap_typegroup typegroups[] = {</div><div class='ctx'> 		{ .offset = 0, .width = 2, .value = 2, },</div><div class='ctx'> 		{ .offset = 156, .width = 1, .value = 0, },</div><div class='del'>-		{ .offset = 0, .width = 0, .value = 0, },</div><div class='add'>+		{ }</div><div class='ctx'> 	};</div><div class='ctx'> 	struct vcap_typegroup typegroups2[] = {</div><div class='ctx'> 		{ .offset = 0, .width = 3, .value = 4, },</div><div class='ctx'> 		{ .offset = 49, .width = 2, .value = 0, },</div><div class='ctx'> 		{ .offset = 98, .width = 2, .value = 0, },</div><div class='add'>+		{ }</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcap_iter_init(&amp;iter, 52, typegroups, 86);</div><div class='hunk'>@@ -399,6 +400,7 @@ static void vcap_api_iterator_next_test(struct kunit *test)</div><div class='ctx'> 		{ .offset = 147, .width = 3, .value = 0, },</div><div class='ctx'> 		{ .offset = 196, .width = 2, .value = 0, },</div><div class='ctx'> 		{ .offset = 245, .width = 1, .value = 0, },</div><div class='add'>+		{ }</div><div class='ctx'> 	};</div><div class='ctx'> 	int idx;</div><div class='ctx'> </div><div class='hunk'>@@ -433,7 +435,7 @@ static void vcap_api_encode_typegroups_test(struct kunit *test)</div><div class='ctx'> 		{ .offset = 147, .width = 3, .value = 5, },</div><div class='ctx'> 		{ .offset = 196, .width = 2, .value = 2, },</div><div class='ctx'> 		{ .offset = 245, .width = 5, .value = 27, },</div><div class='del'>-		{ .offset = 0, .width = 0, .value = 0, },</div><div class='add'>+		{ }</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcap_encode_typegroups(stream, 49, typegroups, false);</div><div class='hunk'>@@ -463,6 +465,7 @@ static void vcap_api_encode_bit_test(struct kunit *test)</div><div class='ctx'> 		{ .offset = 147, .width = 3, .value = 5, },</div><div class='ctx'> 		{ .offset = 196, .width = 2, .value = 2, },</div><div class='ctx'> 		{ .offset = 245, .width = 1, .value = 0, },</div><div class='add'>+		{ }</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcap_iter_init(&amp;iter, 49, typegroups, 44);</div><div class='hunk'>@@ -489,7 +492,7 @@ static void vcap_api_encode_field_test(struct kunit *test)</div><div class='ctx'> 		{ .offset = 147, .width = 3, .value = 5, },</div><div class='ctx'> 		{ .offset = 196, .width = 2, .value = 2, },</div><div class='ctx'> 		{ .offset = 245, .width = 5, .value = 27, },</div><div class='del'>-		{ .offset = 0, .width = 0, .value = 0, },</div><div class='add'>+		{ }</div><div class='ctx'> 	};</div><div class='ctx'> 	struct vcap_field rf = {</div><div class='ctx'> 		.type = VCAP_FIELD_U32,</div><div class='hunk'>@@ -538,7 +541,7 @@ static void vcap_api_encode_short_field_test(struct kunit *test)</div><div class='ctx'> 		{ .offset = 0, .width = 3, .value = 7, },</div><div class='ctx'> 		{ .offset = 21, .width = 2, .value = 3, },</div><div class='ctx'> 		{ .offset = 42, .width = 1, .value = 1, },</div><div class='del'>-		{ .offset = 0, .width = 0, .value = 0, },</div><div class='add'>+		{ }</div><div class='ctx'> 	};</div><div class='ctx'> 	struct vcap_field rf = {</div><div class='ctx'> 		.type = VCAP_FIELD_U32,</div><div class='hunk'>@@ -608,7 +611,7 @@ static void vcap_api_encode_keyfield_test(struct kunit *test)</div><div class='ctx'> 	struct vcap_typegroup tgt[] = {</div><div class='ctx'> 		{ .offset = 0, .width = 2, .value = 2, },</div><div class='ctx'> 		{ .offset = 156, .width = 1, .value = 1, },</div><div class='del'>-		{ .offset = 0, .width = 0, .value = 0, },</div><div class='add'>+		{ }</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcap_test_api_init(&amp;admin);</div><div class='hunk'>@@ -671,7 +674,7 @@ static void vcap_api_encode_max_keyfield_test(struct kunit *test)</div><div class='ctx'> 	struct vcap_typegroup tgt[] = {</div><div class='ctx'> 		{ .offset = 0, .width = 2, .value = 2, },</div><div class='ctx'> 		{ .offset = 156, .width = 1, .value = 1, },</div><div class='del'>-		{ .offset = 0, .width = 0, .value = 0, },</div><div class='add'>+		{ }</div><div class='ctx'> 	};</div><div class='ctx'> 	u32 keyres[] = {</div><div class='ctx'> 		0x928e8a84,</div><div class='hunk'>@@ -732,7 +735,7 @@ static void vcap_api_encode_actionfield_test(struct kunit *test)</div><div class='ctx'> 		{ .offset = 0, .width = 2, .value = 2, },</div><div class='ctx'> 		{ .offset = 21, .width = 1, .value = 1, },</div><div class='ctx'> 		{ .offset = 42, .width = 1, .value = 0, },</div><div class='del'>-		{ .offset = 0, .width = 0, .value = 0, },</div><div class='add'>+		{ }</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	vcap_encode_actionfield(&amp;rule, &amp;caf, &amp;rf, tgt);</div><div class='head'>diff --git a/drivers/net/ethernet/microsoft/Kconfig b/drivers/net/ethernet/microsoft/Kconfig<br/>index 901fbffbf718..3f36ee6a8ece 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microsoft/Kconfig</a></div><div class='hunk'>@@ -22,6 +22,7 @@ config MICROSOFT_MANA</div><div class='ctx'> 	depends on PCI_HYPERV</div><div class='ctx'> 	select AUXILIARY_BUS</div><div class='ctx'> 	select PAGE_POOL</div><div class='add'>+	select NET_SHAPER</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports Microsoft Azure Network Adapter (MANA).</div><div class='ctx'> 	  So far, the driver is only supported on X86_64.</div><div class='head'>diff --git a/drivers/net/ethernet/microsoft/mana/gdma_main.c b/drivers/net/ethernet/microsoft/mana/gdma_main.c<br/>index e97af7ac2bb2..efb4e412ec7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/mana/gdma_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/mana/gdma_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/mana/gdma_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microsoft/mana/gdma_main.c</a></div><div class='hunk'>@@ -6,11 +6,29 @@</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/utsname.h&gt;</div><div class='ctx'> #include &lt;linux/version.h&gt;</div><div class='add'>+#include &lt;linux/msi.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/mana/mana.h&gt;</div><div class='add'>+#include &lt;net/mana/hw_channel.h&gt;</div><div class='ctx'> </div><div class='ctx'> struct dentry *mana_debugfs_root;</div><div class='ctx'> </div><div class='add'>+struct mana_dev_recovery {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	enum gdma_eqe_type type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mana_dev_recovery_work {</div><div class='add'>+	struct list_head dev_list;</div><div class='add'>+	struct delayed_work work;</div><div class='add'>+</div><div class='add'>+	/* Lock for dev_list above */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+} mana_dev_recovery_work;</div><div class='add'>+</div><div class='ctx'> static u32 mana_gd_r32(struct gdma_context *g, u64 offset)</div><div class='ctx'> {</div><div class='ctx'> 	return readl(g-&gt;bar0_va + offset);</div><div class='hunk'>@@ -31,6 +49,9 @@ static void mana_gd_init_pf_regs(struct pci_dev *pdev)</div><div class='ctx'> 	gc-&gt;db_page_base = gc-&gt;bar0_va +</div><div class='ctx'> 				mana_gd_r64(gc, GDMA_PF_REG_DB_PAGE_OFF);</div><div class='ctx'> </div><div class='add'>+	gc-&gt;phys_db_page_base = gc-&gt;bar0_pa +</div><div class='add'>+				mana_gd_r64(gc, GDMA_PF_REG_DB_PAGE_OFF);</div><div class='add'>+</div><div class='ctx'> 	sriov_base_off = mana_gd_r64(gc, GDMA_SRIOV_REG_CFG_BASE_OFF);</div><div class='ctx'> </div><div class='ctx'> 	sriov_base_va = gc-&gt;bar0_va + sriov_base_off;</div><div class='hunk'>@@ -63,6 +84,24 @@ static void mana_gd_init_registers(struct pci_dev *pdev)</div><div class='ctx'> 		mana_gd_init_vf_regs(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Suppress logging when we set timeout to zero */</div><div class='add'>+bool mana_need_log(struct gdma_context *gc, int err)</div><div class='add'>+{</div><div class='add'>+	struct hw_channel_context *hwc;</div><div class='add'>+</div><div class='add'>+	if (err != -ETIMEDOUT)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (!gc)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	hwc = gc-&gt;hwc.driver_data;</div><div class='add'>+	if (hwc &amp;&amp; hwc-&gt;hwc_timeout == 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mana_gd_query_max_resources(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gdma_context *gc = pci_get_drvdata(pdev);</div><div class='hunk'>@@ -80,8 +119,15 @@ static int mana_gd_query_max_resources(struct pci_dev *pdev)</div><div class='ctx'> 		return err ? err : -EPROTO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (gc-&gt;num_msix_usable &gt; resp.max_msix)</div><div class='del'>-		gc-&gt;num_msix_usable = resp.max_msix;</div><div class='add'>+	if (!pci_msix_can_alloc_dyn(pdev)) {</div><div class='add'>+		if (gc-&gt;num_msix_usable &gt; resp.max_msix)</div><div class='add'>+			gc-&gt;num_msix_usable = resp.max_msix;</div><div class='add'>+	} else {</div><div class='add'>+		/* If dynamic allocation is enabled we have already allocated</div><div class='add'>+		 * hwc msi</div><div class='add'>+		 */</div><div class='add'>+		gc-&gt;num_msix_usable = min(resp.max_msix, num_online_cpus() + 1);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (gc-&gt;num_msix_usable &lt;= 1)</div><div class='ctx'> 		return -ENOSPC;</div><div class='hunk'>@@ -134,9 +180,10 @@ static int mana_gd_detect_devices(struct pci_dev *pdev)</div><div class='ctx'> 	struct gdma_list_devices_resp resp = {};</div><div class='ctx'> 	struct gdma_general_req req = {};</div><div class='ctx'> 	struct gdma_dev_id dev;</div><div class='del'>-	u32 i, max_num_devs;</div><div class='add'>+	int found_dev = 0;</div><div class='ctx'> 	u16 dev_type;</div><div class='ctx'> 	int err;</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	mana_gd_init_req_hdr(&amp;req.hdr, GDMA_LIST_DEVICES, sizeof(req),</div><div class='ctx'> 			     sizeof(resp));</div><div class='hunk'>@@ -148,12 +195,17 @@ static int mana_gd_detect_devices(struct pci_dev *pdev)</div><div class='ctx'> 		return err ? err : -EPROTO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	max_num_devs = min_t(u32, MAX_NUM_GDMA_DEVICES, resp.num_of_devs);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; max_num_devs; i++) {</div><div class='add'>+	for (i = 0; i &lt; GDMA_DEV_LIST_SIZE &amp;&amp;</div><div class='add'>+	     found_dev &lt; resp.num_of_devs; i++) {</div><div class='ctx'> 		dev = resp.devs[i];</div><div class='ctx'> 		dev_type = dev.type;</div><div class='ctx'> </div><div class='add'>+		/* Skip empty devices */</div><div class='add'>+		if (dev.as_uint32 == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		found_dev++;</div><div class='add'>+</div><div class='ctx'> 		/* HWC is already detected in mana_hwc_create_channel(). */</div><div class='ctx'> 		if (dev_type == GDMA_DEVICE_HWC)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -177,7 +229,7 @@ int mana_gd_send_request(struct gdma_context *gc, u32 req_len, const void *req,</div><div class='ctx'> </div><div class='ctx'> 	return mana_hwc_send_request(hwc, req_len, req, resp_len, resp);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_gd_send_request, NET_MANA);</div><div class='add'>+EXPORT_SYMBOL_NS(mana_gd_send_request, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> int mana_gd_alloc_memory(struct gdma_context *gc, unsigned int length,</div><div class='ctx'> 			 struct gdma_mem_info *gmi)</div><div class='hunk'>@@ -260,8 +312,9 @@ static int mana_gd_disable_queue(struct gdma_queue *queue)</div><div class='ctx'> </div><div class='ctx'> 	err = mana_gd_send_request(gc, sizeof(req), &amp;req, sizeof(resp), &amp;resp);</div><div class='ctx'> 	if (err || resp.hdr.status) {</div><div class='del'>-		dev_err(gc-&gt;dev, "Failed to disable queue: %d, 0x%x\n", err,</div><div class='del'>-			resp.hdr.status);</div><div class='add'>+		if (mana_need_log(gc, err))</div><div class='add'>+			dev_err(gc-&gt;dev, "Failed to disable queue: %d, 0x%x\n", err,</div><div class='add'>+				resp.hdr.status);</div><div class='ctx'> 		return err ? err : -EPROTO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -331,6 +384,7 @@ void mana_gd_wq_ring_doorbell(struct gdma_context *gc, struct gdma_queue *queue)</div><div class='ctx'> 	mana_gd_ring_doorbell(gc, queue-&gt;gdma_dev-&gt;doorbell, queue-&gt;type,</div><div class='ctx'> 			      queue-&gt;id, queue-&gt;head * GDMA_WQE_BU_SIZE, 0);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(mana_gd_wq_ring_doorbell, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> void mana_gd_ring_cq(struct gdma_queue *cq, u8 arm_bit)</div><div class='ctx'> {</div><div class='hunk'>@@ -343,12 +397,173 @@ void mana_gd_ring_cq(struct gdma_queue *cq, u8 arm_bit)</div><div class='ctx'> 	mana_gd_ring_doorbell(gc, cq-&gt;gdma_dev-&gt;doorbell, cq-&gt;type, cq-&gt;id,</div><div class='ctx'> 			      head, arm_bit);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(mana_gd_ring_cq, "NET_MANA");</div><div class='add'>+</div><div class='add'>+#define MANA_SERVICE_PERIOD 10</div><div class='add'>+</div><div class='add'>+static void mana_serv_rescan(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci_bus *parent;</div><div class='add'>+</div><div class='add'>+	pci_lock_rescan_remove();</div><div class='add'>+</div><div class='add'>+	parent = pdev-&gt;bus;</div><div class='add'>+	if (!parent) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "MANA service: no parent bus\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_stop_and_remove_bus_device(pdev);</div><div class='add'>+	pci_rescan_bus(parent);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pci_unlock_rescan_remove();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mana_serv_fpga(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci_bus *bus, *parent;</div><div class='add'>+</div><div class='add'>+	pci_lock_rescan_remove();</div><div class='add'>+</div><div class='add'>+	bus = pdev-&gt;bus;</div><div class='add'>+	if (!bus) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "MANA service: no bus\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	parent = bus-&gt;parent;</div><div class='add'>+	if (!parent) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "MANA service: no parent bus\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_stop_and_remove_bus_device(bus-&gt;self);</div><div class='add'>+</div><div class='add'>+	msleep(MANA_SERVICE_PERIOD * 1000);</div><div class='add'>+</div><div class='add'>+	pci_rescan_bus(parent);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pci_unlock_rescan_remove();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mana_serv_reset(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct gdma_context *gc = pci_get_drvdata(pdev);</div><div class='add'>+	struct hw_channel_context *hwc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!gc) {</div><div class='add'>+		/* Perform PCI rescan on device if GC is not set up */</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "MANA service: GC not setup, rescanning\n");</div><div class='add'>+		mana_serv_rescan(pdev);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hwc = gc-&gt;hwc.driver_data;</div><div class='add'>+	if (!hwc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "MANA service: no HWC\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* HWC is not responding in this case, so don't wait */</div><div class='add'>+	hwc-&gt;hwc_timeout = 0;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "MANA reset cycle start\n");</div><div class='add'>+</div><div class='add'>+	mana_gd_suspend(pdev, PMSG_SUSPEND);</div><div class='add'>+</div><div class='add'>+	msleep(MANA_SERVICE_PERIOD * 1000);</div><div class='add'>+</div><div class='add'>+	ret = mana_gd_resume(pdev);</div><div class='add'>+	if (ret == -ETIMEDOUT || ret == -EPROTO) {</div><div class='add'>+		/* Perform PCI rescan on device if we failed on HWC */</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "MANA service: resume failed, rescanning\n");</div><div class='add'>+		mana_serv_rescan(pdev);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "MANA reset cycle failed err %d\n", ret);</div><div class='add'>+	else</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "MANA reset cycle completed\n");</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	gc-&gt;in_service = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mana_serv_work {</div><div class='add'>+	struct work_struct serv_work;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	enum gdma_eqe_type type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mana_do_service(enum gdma_eqe_type type, struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case GDMA_EQE_HWC_FPGA_RECONFIG:</div><div class='add'>+		mana_serv_fpga(pdev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case GDMA_EQE_HWC_RESET_REQUEST:</div><div class='add'>+		mana_serv_reset(pdev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "MANA service: unknown type %d\n", type);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mana_recovery_delayed_func(struct work_struct *w)</div><div class='add'>+{</div><div class='add'>+	struct mana_dev_recovery_work *work;</div><div class='add'>+	struct mana_dev_recovery *dev;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	work = container_of(w, struct mana_dev_recovery_work, work.work);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;work-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	while (!list_empty(&amp;work-&gt;dev_list)) {</div><div class='add'>+		dev = list_first_entry(&amp;work-&gt;dev_list,</div><div class='add'>+				       struct mana_dev_recovery, list);</div><div class='add'>+		list_del(&amp;dev-&gt;list);</div><div class='add'>+		spin_unlock_irqrestore(&amp;work-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+		mana_do_service(dev-&gt;type, dev-&gt;pdev);</div><div class='add'>+		pci_dev_put(dev-&gt;pdev);</div><div class='add'>+		kfree(dev);</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;work-&gt;lock, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;work-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mana_serv_func(struct work_struct *w)</div><div class='add'>+{</div><div class='add'>+	struct mana_serv_work *mns_wk;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+</div><div class='add'>+	mns_wk = container_of(w, struct mana_serv_work, serv_work);</div><div class='add'>+	pdev = mns_wk-&gt;pdev;</div><div class='add'>+</div><div class='add'>+	if (pdev)</div><div class='add'>+		mana_do_service(mns_wk-&gt;type, pdev);</div><div class='add'>+</div><div class='add'>+	pci_dev_put(pdev);</div><div class='add'>+	kfree(mns_wk);</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void mana_gd_process_eqe(struct gdma_queue *eq)</div><div class='ctx'> {</div><div class='ctx'> 	u32 head = eq-&gt;head % (eq-&gt;queue_size / GDMA_EQE_SIZE);</div><div class='ctx'> 	struct gdma_context *gc = eq-&gt;gdma_dev-&gt;gdma_context;</div><div class='ctx'> 	struct gdma_eqe *eq_eqe_ptr = eq-&gt;queue_mem_ptr;</div><div class='add'>+	struct mana_serv_work *mns_wk;</div><div class='ctx'> 	union gdma_eqe_info eqe_info;</div><div class='ctx'> 	enum gdma_eqe_type type;</div><div class='ctx'> 	struct gdma_event event;</div><div class='hunk'>@@ -383,7 +598,9 @@ static void mana_gd_process_eqe(struct gdma_queue *eq)</div><div class='ctx'> 	case GDMA_EQE_HWC_INIT_EQ_ID_DB:</div><div class='ctx'> 	case GDMA_EQE_HWC_INIT_DATA:</div><div class='ctx'> 	case GDMA_EQE_HWC_INIT_DONE:</div><div class='add'>+	case GDMA_EQE_HWC_SOC_SERVICE:</div><div class='ctx'> 	case GDMA_EQE_RNIC_QP_FATAL:</div><div class='add'>+	case GDMA_EQE_HWC_SOC_RECONFIG_DATA:</div><div class='ctx'> 		if (!eq-&gt;eq.callback)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -392,6 +609,46 @@ static void mana_gd_process_eqe(struct gdma_queue *eq)</div><div class='ctx'> 		eq-&gt;eq.callback(eq-&gt;eq.context, eq, &amp;event);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='add'>+	case GDMA_EQE_HWC_FPGA_RECONFIG:</div><div class='add'>+	case GDMA_EQE_HWC_RESET_REQUEST:</div><div class='add'>+		dev_info(gc-&gt;dev, "Recv MANA service type:%d\n", type);</div><div class='add'>+</div><div class='add'>+		if (!test_and_set_bit(GC_PROBE_SUCCEEDED, &amp;gc-&gt;flags)) {</div><div class='add'>+			/*</div><div class='add'>+			 * Device is in probe and we received a hardware reset</div><div class='add'>+			 * event, the probe function will detect that the flag</div><div class='add'>+			 * has changed and perform service procedure.</div><div class='add'>+			 */</div><div class='add'>+			dev_info(gc-&gt;dev,</div><div class='add'>+				 "Service is to be processed in probe\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (gc-&gt;in_service) {</div><div class='add'>+			dev_info(gc-&gt;dev, "Already in service\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!try_module_get(THIS_MODULE)) {</div><div class='add'>+			dev_info(gc-&gt;dev, "Module is unloading\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mns_wk = kzalloc(sizeof(*mns_wk), GFP_ATOMIC);</div><div class='add'>+		if (!mns_wk) {</div><div class='add'>+			module_put(THIS_MODULE);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev_info(gc-&gt;dev, "Start MANA service type:%d\n", type);</div><div class='add'>+		gc-&gt;in_service = true;</div><div class='add'>+		mns_wk-&gt;pdev = to_pci_dev(gc-&gt;dev);</div><div class='add'>+		mns_wk-&gt;type = type;</div><div class='add'>+		pci_dev_get(mns_wk-&gt;pdev);</div><div class='add'>+		INIT_WORK(&amp;mns_wk-&gt;serv_work, mana_serv_func);</div><div class='add'>+		schedule_work(&amp;mns_wk-&gt;serv_work);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -474,7 +731,9 @@ static int mana_gd_register_irq(struct gdma_queue *queue,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	queue-&gt;eq.msix_index = msi_index;</div><div class='del'>-	gic = &amp;gc-&gt;irq_contexts[msi_index];</div><div class='add'>+	gic = xa_load(&amp;gc-&gt;irq_contexts, msi_index);</div><div class='add'>+	if (WARN_ON(!gic))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;gic-&gt;lock, flags);</div><div class='ctx'> 	list_add_rcu(&amp;queue-&gt;entry, &amp;gic-&gt;eq_list);</div><div class='hunk'>@@ -483,7 +742,7 @@ static int mana_gd_register_irq(struct gdma_queue *queue,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mana_gd_deregiser_irq(struct gdma_queue *queue)</div><div class='add'>+static void mana_gd_deregister_irq(struct gdma_queue *queue)</div><div class='ctx'> {</div><div class='ctx'> 	struct gdma_dev *gd = queue-&gt;gdma_dev;</div><div class='ctx'> 	struct gdma_irq_context *gic;</div><div class='hunk'>@@ -499,7 +758,10 @@ static void mana_gd_deregiser_irq(struct gdma_queue *queue)</div><div class='ctx'> 	if (WARN_ON(msix_index &gt;= gc-&gt;num_msix_usable))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	gic = &amp;gc-&gt;irq_contexts[msix_index];</div><div class='add'>+	gic = xa_load(&amp;gc-&gt;irq_contexts, msix_index);</div><div class='add'>+	if (WARN_ON(!gic))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;gic-&gt;lock, flags);</div><div class='ctx'> 	list_for_each_entry_rcu(eq, &amp;gic-&gt;eq_list, entry) {</div><div class='ctx'> 		if (queue == eq) {</div><div class='hunk'>@@ -533,7 +795,8 @@ int mana_gd_test_eq(struct gdma_context *gc, struct gdma_queue *eq)</div><div class='ctx'> </div><div class='ctx'> 	err = mana_gd_send_request(gc, sizeof(req), &amp;req, sizeof(resp), &amp;resp);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(dev, "test_eq failed: %d\n", err);</div><div class='add'>+		if (mana_need_log(gc, err))</div><div class='add'>+			dev_err(dev, "test_eq failed: %d\n", err);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -568,11 +831,11 @@ static void mana_gd_destroy_eq(struct gdma_context *gc, bool flush_evenets,</div><div class='ctx'> </div><div class='ctx'> 	if (flush_evenets) {</div><div class='ctx'> 		err = mana_gd_test_eq(gc, queue);</div><div class='del'>-		if (err)</div><div class='add'>+		if (err &amp;&amp; mana_need_log(gc, err))</div><div class='ctx'> 			dev_warn(gc-&gt;dev, "Failed to flush EQ: %d\n", err);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mana_gd_deregiser_irq(queue);</div><div class='add'>+	mana_gd_deregister_irq(queue);</div><div class='ctx'> </div><div class='ctx'> 	if (queue-&gt;eq.disable_needed)</div><div class='ctx'> 		mana_gd_disable_queue(queue);</div><div class='hunk'>@@ -666,8 +929,11 @@ int mana_gd_create_hwc_queue(struct gdma_dev *gd,</div><div class='ctx'> </div><div class='ctx'> 	gmi = &amp;queue-&gt;mem_info;</div><div class='ctx'> 	err = mana_gd_alloc_memory(gc, spec-&gt;queue_size, gmi);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(gc-&gt;dev, "GDMA queue type: %d, size: %u, gdma memory allocation err: %d\n",</div><div class='add'>+			spec-&gt;type, spec-&gt;queue_size, err);</div><div class='ctx'> 		goto free_q;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	queue-&gt;head = 0;</div><div class='ctx'> 	queue-&gt;tail = 0;</div><div class='hunk'>@@ -688,6 +954,8 @@ int mana_gd_create_hwc_queue(struct gdma_dev *gd,</div><div class='ctx'> 	*queue_ptr = queue;</div><div class='ctx'> 	return 0;</div><div class='ctx'> out:</div><div class='add'>+	dev_err(gc-&gt;dev, "Failed to create queue type %d of size %u, err: %d\n",</div><div class='add'>+		spec-&gt;type, spec-&gt;queue_size, err);</div><div class='ctx'> 	mana_gd_free_memory(gmi);</div><div class='ctx'> free_q:</div><div class='ctx'> 	kfree(queue);</div><div class='hunk'>@@ -709,14 +977,15 @@ int mana_gd_destroy_dma_region(struct gdma_context *gc, u64 dma_region_handle)</div><div class='ctx'> </div><div class='ctx'> 	err = mana_gd_send_request(gc, sizeof(req), &amp;req, sizeof(resp), &amp;resp);</div><div class='ctx'> 	if (err || resp.hdr.status) {</div><div class='del'>-		dev_err(gc-&gt;dev, "Failed to destroy DMA region: %d, 0x%x\n",</div><div class='del'>-			err, resp.hdr.status);</div><div class='add'>+		if (mana_need_log(gc, err))</div><div class='add'>+			dev_err(gc-&gt;dev, "Failed to destroy DMA region: %d, 0x%x\n",</div><div class='add'>+				err, resp.hdr.status);</div><div class='ctx'> 		return -EPROTO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_gd_destroy_dma_region, NET_MANA);</div><div class='add'>+EXPORT_SYMBOL_NS(mana_gd_destroy_dma_region, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> static int mana_gd_create_dma_region(struct gdma_dev *gd,</div><div class='ctx'> 				     struct gdma_mem_info *gmi)</div><div class='hunk'>@@ -770,7 +1039,13 @@ static int mana_gd_create_dma_region(struct gdma_dev *gd,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	gmi-&gt;dma_region_handle = resp.dma_region_handle;</div><div class='add'>+	dev_dbg(gc-&gt;dev, "Created DMA region handle 0x%llx\n",</div><div class='add'>+		gmi-&gt;dma_region_handle);</div><div class='ctx'> out:</div><div class='add'>+	if (err)</div><div class='add'>+		dev_dbg(gc-&gt;dev,</div><div class='add'>+			"Failed to create DMA region of length: %u, page_type: %d, status: 0x%x, err: %d\n",</div><div class='add'>+			length, req-&gt;gdma_page_type, resp.hdr.status, err);</div><div class='ctx'> 	kfree(req);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -793,8 +1068,11 @@ int mana_gd_create_mana_eq(struct gdma_dev *gd,</div><div class='ctx'> </div><div class='ctx'> 	gmi = &amp;queue-&gt;mem_info;</div><div class='ctx'> 	err = mana_gd_alloc_memory(gc, spec-&gt;queue_size, gmi);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(gc-&gt;dev, "GDMA queue type: %d, size: %u, gdma memory allocation err: %d\n",</div><div class='add'>+			spec-&gt;type, spec-&gt;queue_size, err);</div><div class='ctx'> 		goto free_q;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = mana_gd_create_dma_region(gd, gmi);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -815,12 +1093,14 @@ int mana_gd_create_mana_eq(struct gdma_dev *gd,</div><div class='ctx'> 	*queue_ptr = queue;</div><div class='ctx'> 	return 0;</div><div class='ctx'> out:</div><div class='add'>+	dev_err(gc-&gt;dev, "Failed to create queue type %d of size: %u, err: %d\n",</div><div class='add'>+		spec-&gt;type, spec-&gt;queue_size, err);</div><div class='ctx'> 	mana_gd_free_memory(gmi);</div><div class='ctx'> free_q:</div><div class='ctx'> 	kfree(queue);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_gd_create_mana_eq, NET_MANA);</div><div class='add'>+EXPORT_SYMBOL_NS(mana_gd_create_mana_eq, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> int mana_gd_create_mana_wq_cq(struct gdma_dev *gd,</div><div class='ctx'> 			      const struct gdma_queue_spec *spec,</div><div class='hunk'>@@ -841,8 +1121,11 @@ int mana_gd_create_mana_wq_cq(struct gdma_dev *gd,</div><div class='ctx'> </div><div class='ctx'> 	gmi = &amp;queue-&gt;mem_info;</div><div class='ctx'> 	err = mana_gd_alloc_memory(gc, spec-&gt;queue_size, gmi);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(gc-&gt;dev, "GDMA queue type: %d, size: %u, memory allocation err: %d\n",</div><div class='add'>+			spec-&gt;type, spec-&gt;queue_size, err);</div><div class='ctx'> 		goto free_q;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = mana_gd_create_dma_region(gd, gmi);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -862,11 +1145,14 @@ int mana_gd_create_mana_wq_cq(struct gdma_dev *gd,</div><div class='ctx'> 	*queue_ptr = queue;</div><div class='ctx'> 	return 0;</div><div class='ctx'> out:</div><div class='add'>+	dev_err(gc-&gt;dev, "Failed to create queue type %d of size: %u, err: %d\n",</div><div class='add'>+		spec-&gt;type, spec-&gt;queue_size, err);</div><div class='ctx'> 	mana_gd_free_memory(gmi);</div><div class='ctx'> free_q:</div><div class='ctx'> 	kfree(queue);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(mana_gd_create_mana_wq_cq, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> void mana_gd_destroy_queue(struct gdma_context *gc, struct gdma_queue *queue)</div><div class='ctx'> {</div><div class='hunk'>@@ -897,7 +1183,7 @@ void mana_gd_destroy_queue(struct gdma_context *gc, struct gdma_queue *queue)</div><div class='ctx'> 	mana_gd_free_memory(gmi);</div><div class='ctx'> 	kfree(queue);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_gd_destroy_queue, NET_MANA);</div><div class='add'>+EXPORT_SYMBOL_NS(mana_gd_destroy_queue, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> int mana_gd_verify_vf_version(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -934,6 +1220,7 @@ int mana_gd_verify_vf_version(struct pci_dev *pdev)</div><div class='ctx'> 			err, resp.hdr.status);</div><div class='ctx'> 		return err ? err : -EPROTO;</div><div class='ctx'> 	}</div><div class='add'>+	gc-&gt;pf_cap_flags1 = resp.pf_cap_flags1;</div><div class='ctx'> 	if (resp.pf_cap_flags1 &amp; GDMA_DRV_CAP_FLAG_1_HWC_TIMEOUT_RECONFIG) {</div><div class='ctx'> 		err = mana_gd_query_hwc_timeout(pdev, &amp;hwc-&gt;hwc_timeout);</div><div class='ctx'> 		if (err) {</div><div class='hunk'>@@ -974,7 +1261,6 @@ int mana_gd_register_device(struct gdma_dev *gd)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_gd_register_device, NET_MANA);</div><div class='ctx'> </div><div class='ctx'> int mana_gd_deregister_device(struct gdma_dev *gd)</div><div class='ctx'> {</div><div class='hunk'>@@ -993,8 +1279,9 @@ int mana_gd_deregister_device(struct gdma_dev *gd)</div><div class='ctx'> </div><div class='ctx'> 	err = mana_gd_send_request(gc, sizeof(req), &amp;req, sizeof(resp), &amp;resp);</div><div class='ctx'> 	if (err || resp.hdr.status) {</div><div class='del'>-		dev_err(gc-&gt;dev, "Failed to deregister device: %d, 0x%x\n",</div><div class='del'>-			err, resp.hdr.status);</div><div class='add'>+		if (mana_need_log(gc, err))</div><div class='add'>+			dev_err(gc-&gt;dev, "Failed to deregister device: %d, 0x%x\n",</div><div class='add'>+				err, resp.hdr.status);</div><div class='ctx'> 		if (!err)</div><div class='ctx'> 			err = -EPROTO;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1005,7 +1292,6 @@ int mana_gd_deregister_device(struct gdma_dev *gd)</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_gd_deregister_device, NET_MANA);</div><div class='ctx'> </div><div class='ctx'> u32 mana_gd_wq_avail_space(struct gdma_queue *wq)</div><div class='ctx'> {</div><div class='hunk'>@@ -1041,7 +1327,7 @@ static u32 mana_gd_write_client_oob(const struct gdma_wqe_request *wqe_req,</div><div class='ctx'> 	header-&gt;inline_oob_size_div4 = client_oob_size / sizeof(u32);</div><div class='ctx'> </div><div class='ctx'> 	if (oob_in_sgl) {</div><div class='del'>-		WARN_ON_ONCE(!pad_data || wqe_req-&gt;num_sge &lt; 2);</div><div class='add'>+		WARN_ON_ONCE(wqe_req-&gt;num_sge &lt; 2);</div><div class='ctx'> </div><div class='ctx'> 		header-&gt;client_oob_in_sgl = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -1097,7 +1383,6 @@ int mana_gd_post_work_request(struct gdma_queue *wq,</div><div class='ctx'> 			      struct gdma_posted_wqe_info *wqe_info)</div><div class='ctx'> {</div><div class='ctx'> 	u32 client_oob_size = wqe_req-&gt;inline_oob_size;</div><div class='del'>-	struct gdma_context *gc;</div><div class='ctx'> 	u32 sgl_data_size;</div><div class='ctx'> 	u32 max_wqe_size;</div><div class='ctx'> 	u32 wqe_size;</div><div class='hunk'>@@ -1127,11 +1412,8 @@ int mana_gd_post_work_request(struct gdma_queue *wq,</div><div class='ctx'> 	if (wqe_size &gt; max_wqe_size)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (wq-&gt;monitor_avl_buf &amp;&amp; wqe_size &gt; mana_gd_wq_avail_space(wq)) {</div><div class='del'>-		gc = wq-&gt;gdma_dev-&gt;gdma_context;</div><div class='del'>-		dev_err(gc-&gt;dev, "unsuccessful flow control!\n");</div><div class='add'>+	if (wq-&gt;monitor_avl_buf &amp;&amp; wqe_size &gt; mana_gd_wq_avail_space(wq))</div><div class='ctx'> 		return -ENOSPC;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (wqe_info)</div><div class='ctx'> 		wqe_info-&gt;wqe_size_in_bu = wqe_size / GDMA_WQE_BU_SIZE;</div><div class='hunk'>@@ -1148,6 +1430,7 @@ int mana_gd_post_work_request(struct gdma_queue *wq,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(mana_gd_post_work_request, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> int mana_gd_post_and_ring(struct gdma_queue *queue,</div><div class='ctx'> 			  const struct gdma_wqe_request *wqe_req,</div><div class='hunk'>@@ -1157,8 +1440,11 @@ int mana_gd_post_and_ring(struct gdma_queue *queue,</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = mana_gd_post_work_request(queue, wqe_req, wqe_info);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(gc-&gt;dev, "Failed to post work req from queue type %d of size %u (err=%d)\n",</div><div class='add'>+			queue-&gt;type, queue-&gt;queue_size, err);</div><div class='ctx'> 		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mana_gd_wq_ring_doorbell(gc, queue);</div><div class='ctx'> </div><div class='hunk'>@@ -1218,6 +1504,7 @@ int mana_gd_poll_cq(struct gdma_queue *cq, struct gdma_comp *comp, int num_cqe)</div><div class='ctx'> </div><div class='ctx'> 	return cqe_idx;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(mana_gd_poll_cq, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t mana_gd_intr(int irq, void *arg)</div><div class='ctx'> {</div><div class='hunk'>@@ -1253,7 +1540,49 @@ void mana_gd_free_res_map(struct gdma_resource *r)</div><div class='ctx'> 	r-&gt;size = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int irq_setup(unsigned int *irqs, unsigned int len, int node)</div><div class='add'>+/*</div><div class='add'>+ * Spread on CPUs with the following heuristics:</div><div class='add'>+ *</div><div class='add'>+ * 1. No more than one IRQ per CPU, if possible;</div><div class='add'>+ * 2. NUMA locality is the second priority;</div><div class='add'>+ * 3. Sibling dislocality is the last priority.</div><div class='add'>+ *</div><div class='add'>+ * Let's consider this topology:</div><div class='add'>+ *</div><div class='add'>+ * Node            0               1</div><div class='add'>+ * Core        0       1       2       3</div><div class='add'>+ * CPU       0   1   2   3   4   5   6   7</div><div class='add'>+ *</div><div class='add'>+ * The most performant IRQ distribution based on the above topology</div><div class='add'>+ * and heuristics may look like this:</div><div class='add'>+ *</div><div class='add'>+ * IRQ     Nodes   Cores   CPUs</div><div class='add'>+ * 0       1       0       0-1</div><div class='add'>+ * 1       1       1       2-3</div><div class='add'>+ * 2       1       0       0-1</div><div class='add'>+ * 3       1       1       2-3</div><div class='add'>+ * 4       2       2       4-5</div><div class='add'>+ * 5       2       3       6-7</div><div class='add'>+ * 6       2       2       4-5</div><div class='add'>+ * 7       2       3       6-7</div><div class='add'>+ *</div><div class='add'>+ * The heuristics is implemented as follows.</div><div class='add'>+ *</div><div class='add'>+ * The outer for_each() loop resets the 'weight' to the actual number</div><div class='add'>+ * of CPUs in the hop. Then inner for_each() loop decrements it by the</div><div class='add'>+ * number of sibling groups (cores) while assigning first set of IRQs</div><div class='add'>+ * to each group. IRQs 0 and 1 above are distributed this way.</div><div class='add'>+ *</div><div class='add'>+ * Now, because NUMA locality is more important, we should walk the</div><div class='add'>+ * same set of siblings and assign 2nd set of IRQs (2 and 3), and it's</div><div class='add'>+ * implemented by the medium while() loop. We do like this unless the</div><div class='add'>+ * number of IRQs assigned on this hop will not become equal to number</div><div class='add'>+ * of CPUs in the hop (weight == 0). Then we switch to the next hop and</div><div class='add'>+ * do the same thing.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int irq_setup(unsigned int *irqs, unsigned int len, int node,</div><div class='add'>+		     bool skip_first_cpu)</div><div class='ctx'> {</div><div class='ctx'> 	const struct cpumask *next, *prev = cpu_none_mask;</div><div class='ctx'> 	cpumask_var_t cpus __free(free_cpumask_var);</div><div class='hunk'>@@ -1268,11 +1597,18 @@ static int irq_setup(unsigned int *irqs, unsigned int len, int node)</div><div class='ctx'> 		while (weight &gt; 0) {</div><div class='ctx'> 			cpumask_andnot(cpus, next, prev);</div><div class='ctx'> 			for_each_cpu(cpu, cpus) {</div><div class='add'>+				cpumask_andnot(cpus, cpus, topology_sibling_cpumask(cpu));</div><div class='add'>+				--weight;</div><div class='add'>+</div><div class='add'>+				if (unlikely(skip_first_cpu)) {</div><div class='add'>+					skip_first_cpu = false;</div><div class='add'>+					continue;</div><div class='add'>+				}</div><div class='add'>+</div><div class='ctx'> 				if (len-- == 0)</div><div class='ctx'> 					goto done;</div><div class='add'>+</div><div class='ctx'> 				irq_set_affinity_and_hint(*irqs++, topology_sibling_cpumask(cpu));</div><div class='del'>-				cpumask_andnot(cpus, cpus, topology_sibling_cpumask(cpu));</div><div class='del'>-				--weight;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		prev = next;</div><div class='hunk'>@@ -1282,47 +1618,108 @@ done:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mana_gd_setup_irqs(struct pci_dev *pdev)</div><div class='add'>+static int mana_gd_setup_dyn_irqs(struct pci_dev *pdev, int nvec)</div><div class='ctx'> {</div><div class='ctx'> 	struct gdma_context *gc = pci_get_drvdata(pdev);</div><div class='del'>-	unsigned int max_queues_per_port;</div><div class='ctx'> 	struct gdma_irq_context *gic;</div><div class='del'>-	unsigned int max_irqs, cpu;</div><div class='del'>-	int start_irq_index = 1;</div><div class='del'>-	int nvec, *irqs, irq;</div><div class='del'>-	int err, i = 0, j;</div><div class='add'>+	bool skip_first_cpu = false;</div><div class='add'>+	int *irqs, irq, err, i;</div><div class='ctx'> </div><div class='del'>-	cpus_read_lock();</div><div class='del'>-	max_queues_per_port = num_online_cpus();</div><div class='del'>-	if (max_queues_per_port &gt; MANA_MAX_NUM_QUEUES)</div><div class='del'>-		max_queues_per_port = MANA_MAX_NUM_QUEUES;</div><div class='add'>+	irqs = kmalloc_array(nvec, sizeof(int), GFP_KERNEL);</div><div class='add'>+	if (!irqs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * While processing the next pci irq vector, we start with index 1,</div><div class='add'>+	 * as IRQ vector at index 0 is already processed for HWC.</div><div class='add'>+	 * However, the population of irqs array starts with index 0, to be</div><div class='add'>+	 * further used in irq_setup()</div><div class='add'>+	 */</div><div class='add'>+	for (i = 1; i &lt;= nvec; i++) {</div><div class='add'>+		gic = kzalloc(sizeof(*gic), GFP_KERNEL);</div><div class='add'>+		if (!gic) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_irq;</div><div class='add'>+		}</div><div class='add'>+		gic-&gt;handler = mana_gd_process_eq_events;</div><div class='add'>+		INIT_LIST_HEAD(&amp;gic-&gt;eq_list);</div><div class='add'>+		spin_lock_init(&amp;gic-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	/* Need 1 interrupt for the Hardware communication Channel (HWC) */</div><div class='del'>-	max_irqs = max_queues_per_port + 1;</div><div class='add'>+		snprintf(gic-&gt;name, MANA_IRQ_NAME_SZ, "mana_q%d@pci:%s",</div><div class='add'>+			 i - 1, pci_name(pdev));</div><div class='ctx'> </div><div class='del'>-	nvec = pci_alloc_irq_vectors(pdev, 2, max_irqs, PCI_IRQ_MSIX);</div><div class='del'>-	if (nvec &lt; 0) {</div><div class='del'>-		cpus_read_unlock();</div><div class='del'>-		return nvec;</div><div class='add'>+		/* one pci vector is already allocated for HWC */</div><div class='add'>+		irqs[i - 1] = pci_irq_vector(pdev, i);</div><div class='add'>+		if (irqs[i - 1] &lt; 0) {</div><div class='add'>+			err = irqs[i - 1];</div><div class='add'>+			goto free_current_gic;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = request_irq(irqs[i - 1], mana_gd_intr, 0, gic-&gt;name, gic);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_current_gic;</div><div class='add'>+</div><div class='add'>+		xa_store(&amp;gc-&gt;irq_contexts, i, gic, GFP_KERNEL);</div><div class='ctx'> 	}</div><div class='del'>-	if (nvec &lt;= num_online_cpus())</div><div class='del'>-		start_irq_index = 0;</div><div class='ctx'> </div><div class='del'>-	irqs = kmalloc_array((nvec - start_irq_index), sizeof(int), GFP_KERNEL);</div><div class='del'>-	if (!irqs) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto free_irq_vector;</div><div class='add'>+	/*</div><div class='add'>+	 * When calling irq_setup() for dynamically added IRQs, if number of</div><div class='add'>+	 * CPUs is more than or equal to allocated MSI-X, we need to skip the</div><div class='add'>+	 * first CPU sibling group since they are already affinitized to HWC IRQ</div><div class='add'>+	 */</div><div class='add'>+	cpus_read_lock();</div><div class='add'>+	if (gc-&gt;num_msix_usable &lt;= num_online_cpus())</div><div class='add'>+		skip_first_cpu = true;</div><div class='add'>+</div><div class='add'>+	err = irq_setup(irqs, nvec, gc-&gt;numa_node, skip_first_cpu);</div><div class='add'>+	if (err) {</div><div class='add'>+		cpus_read_unlock();</div><div class='add'>+		goto free_irq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	gc-&gt;irq_contexts = kcalloc(nvec, sizeof(struct gdma_irq_context),</div><div class='del'>-				   GFP_KERNEL);</div><div class='del'>-	if (!gc-&gt;irq_contexts) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto free_irq_vector;</div><div class='add'>+	cpus_read_unlock();</div><div class='add'>+	kfree(irqs);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_current_gic:</div><div class='add'>+	kfree(gic);</div><div class='add'>+free_irq:</div><div class='add'>+	for (i -= 1; i &gt; 0; i--) {</div><div class='add'>+		irq = pci_irq_vector(pdev, i);</div><div class='add'>+		gic = xa_load(&amp;gc-&gt;irq_contexts, i);</div><div class='add'>+		if (WARN_ON(!gic))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		irq_update_affinity_hint(irq, NULL);</div><div class='add'>+		free_irq(irq, gic);</div><div class='add'>+		xa_erase(&amp;gc-&gt;irq_contexts, i);</div><div class='add'>+		kfree(gic);</div><div class='ctx'> 	}</div><div class='add'>+	kfree(irqs);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mana_gd_setup_irqs(struct pci_dev *pdev, int nvec)</div><div class='add'>+{</div><div class='add'>+	struct gdma_context *gc = pci_get_drvdata(pdev);</div><div class='add'>+	struct gdma_irq_context *gic;</div><div class='add'>+	int *irqs, *start_irqs, irq;</div><div class='add'>+	unsigned int cpu;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	irqs = kmalloc_array(nvec, sizeof(int), GFP_KERNEL);</div><div class='add'>+	if (!irqs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	start_irqs = irqs;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nvec; i++) {</div><div class='del'>-		gic = &amp;gc-&gt;irq_contexts[i];</div><div class='add'>+		gic = kzalloc(sizeof(*gic), GFP_KERNEL);</div><div class='add'>+		if (!gic) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_irq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		gic-&gt;handler = mana_gd_process_eq_events;</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;gic-&gt;eq_list);</div><div class='ctx'> 		spin_lock_init(&amp;gic-&gt;lock);</div><div class='hunk'>@@ -1334,67 +1731,128 @@ static int mana_gd_setup_irqs(struct pci_dev *pdev)</div><div class='ctx'> 			snprintf(gic-&gt;name, MANA_IRQ_NAME_SZ, "mana_q%d@pci:%s",</div><div class='ctx'> 				 i - 1, pci_name(pdev));</div><div class='ctx'> </div><div class='del'>-		irq = pci_irq_vector(pdev, i);</div><div class='del'>-		if (irq &lt; 0) {</div><div class='del'>-			err = irq;</div><div class='del'>-			goto free_irq;</div><div class='add'>+		irqs[i] = pci_irq_vector(pdev, i);</div><div class='add'>+		if (irqs[i] &lt; 0) {</div><div class='add'>+			err = irqs[i];</div><div class='add'>+			goto free_current_gic;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (!i) {</div><div class='del'>-			err = request_irq(irq, mana_gd_intr, 0, gic-&gt;name, gic);</div><div class='del'>-			if (err)</div><div class='del'>-				goto free_irq;</div><div class='del'>-</div><div class='del'>-			/* If number of IRQ is one extra than number of online CPUs,</div><div class='del'>-			 * then we need to assign IRQ0 (hwc irq) and IRQ1 to</div><div class='del'>-			 * same CPU.</div><div class='del'>-			 * Else we will use different CPUs for IRQ0 and IRQ1.</div><div class='del'>-			 * Also we are using cpumask_local_spread instead of</div><div class='del'>-			 * cpumask_first for the node, because the node can be</div><div class='del'>-			 * mem only.</div><div class='del'>-			 */</div><div class='del'>-			if (start_irq_index) {</div><div class='del'>-				cpu = cpumask_local_spread(i, gc-&gt;numa_node);</div><div class='del'>-				irq_set_affinity_and_hint(irq, cpumask_of(cpu));</div><div class='del'>-			} else {</div><div class='del'>-				irqs[start_irq_index] = irq;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			irqs[i - start_irq_index] = irq;</div><div class='del'>-			err = request_irq(irqs[i - start_irq_index], mana_gd_intr, 0,</div><div class='del'>-					  gic-&gt;name, gic);</div><div class='del'>-			if (err)</div><div class='del'>-				goto free_irq;</div><div class='del'>-		}</div><div class='add'>+		err = request_irq(irqs[i], mana_gd_intr, 0, gic-&gt;name, gic);</div><div class='add'>+		if (err)</div><div class='add'>+			goto free_current_gic;</div><div class='add'>+</div><div class='add'>+		xa_store(&amp;gc-&gt;irq_contexts, i, gic, GFP_KERNEL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = irq_setup(irqs, (nvec - start_irq_index), gc-&gt;numa_node);</div><div class='del'>-	if (err)</div><div class='add'>+	/* If number of IRQ is one extra than number of online CPUs,</div><div class='add'>+	 * then we need to assign IRQ0 (hwc irq) and IRQ1 to</div><div class='add'>+	 * same CPU.</div><div class='add'>+	 * Else we will use different CPUs for IRQ0 and IRQ1.</div><div class='add'>+	 * Also we are using cpumask_local_spread instead of</div><div class='add'>+	 * cpumask_first for the node, because the node can be</div><div class='add'>+	 * mem only.</div><div class='add'>+	 */</div><div class='add'>+	cpus_read_lock();</div><div class='add'>+	if (nvec &gt; num_online_cpus()) {</div><div class='add'>+		cpu = cpumask_local_spread(0, gc-&gt;numa_node);</div><div class='add'>+		irq_set_affinity_and_hint(irqs[0], cpumask_of(cpu));</div><div class='add'>+		irqs++;</div><div class='add'>+		nvec -= 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = irq_setup(irqs, nvec, gc-&gt;numa_node, false);</div><div class='add'>+	if (err) {</div><div class='add'>+		cpus_read_unlock();</div><div class='ctx'> 		goto free_irq;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	gc-&gt;max_num_msix = nvec;</div><div class='del'>-	gc-&gt;num_msix_usable = nvec;</div><div class='ctx'> 	cpus_read_unlock();</div><div class='add'>+	kfree(start_irqs);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+free_current_gic:</div><div class='add'>+	kfree(gic);</div><div class='ctx'> free_irq:</div><div class='del'>-	for (j = i - 1; j &gt;= 0; j--) {</div><div class='del'>-		irq = pci_irq_vector(pdev, j);</div><div class='del'>-		gic = &amp;gc-&gt;irq_contexts[j];</div><div class='add'>+	for (i -= 1; i &gt;= 0; i--) {</div><div class='add'>+		irq = pci_irq_vector(pdev, i);</div><div class='add'>+		gic = xa_load(&amp;gc-&gt;irq_contexts, i);</div><div class='add'>+		if (WARN_ON(!gic))</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='ctx'> 		irq_update_affinity_hint(irq, NULL);</div><div class='ctx'> 		free_irq(irq, gic);</div><div class='add'>+		xa_erase(&amp;gc-&gt;irq_contexts, i);</div><div class='add'>+		kfree(gic);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	kfree(gc-&gt;irq_contexts);</div><div class='del'>-	kfree(irqs);</div><div class='del'>-	gc-&gt;irq_contexts = NULL;</div><div class='del'>-free_irq_vector:</div><div class='del'>-	cpus_read_unlock();</div><div class='del'>-	pci_free_irq_vectors(pdev);</div><div class='add'>+	kfree(start_irqs);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mana_gd_setup_hwc_irqs(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct gdma_context *gc = pci_get_drvdata(pdev);</div><div class='add'>+	unsigned int max_irqs, min_irqs;</div><div class='add'>+	int nvec, err;</div><div class='add'>+</div><div class='add'>+	if (pci_msix_can_alloc_dyn(pdev)) {</div><div class='add'>+		max_irqs = 1;</div><div class='add'>+		min_irqs = 1;</div><div class='add'>+	} else {</div><div class='add'>+		/* Need 1 interrupt for HWC */</div><div class='add'>+		max_irqs = min(num_online_cpus(), MANA_MAX_NUM_QUEUES) + 1;</div><div class='add'>+		min_irqs = 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nvec = pci_alloc_irq_vectors(pdev, min_irqs, max_irqs, PCI_IRQ_MSIX);</div><div class='add'>+	if (nvec &lt; 0)</div><div class='add'>+		return nvec;</div><div class='add'>+</div><div class='add'>+	err = mana_gd_setup_irqs(pdev, nvec);</div><div class='add'>+	if (err) {</div><div class='add'>+		pci_free_irq_vectors(pdev);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gc-&gt;num_msix_usable = nvec;</div><div class='add'>+	gc-&gt;max_num_msix = nvec;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mana_gd_setup_remaining_irqs(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct gdma_context *gc = pci_get_drvdata(pdev);</div><div class='add'>+	struct msi_map irq_map;</div><div class='add'>+	int max_irqs, i, err;</div><div class='add'>+</div><div class='add'>+	if (!pci_msix_can_alloc_dyn(pdev))</div><div class='add'>+		/* remain irqs are already allocated with HWC IRQ */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* allocate only remaining IRQs*/</div><div class='add'>+	max_irqs = gc-&gt;num_msix_usable - 1;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt;= max_irqs; i++) {</div><div class='add'>+		irq_map = pci_msix_alloc_irq_at(pdev, i, NULL);</div><div class='add'>+		if (!irq_map.virq) {</div><div class='add'>+			err = irq_map.index;</div><div class='add'>+			/* caller will handle cleaning up all allocated</div><div class='add'>+			 * irqs, after HWC is destroyed</div><div class='add'>+			 */</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mana_gd_setup_dyn_irqs(pdev, max_irqs);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	gc-&gt;max_num_msix = gc-&gt;max_num_msix + max_irqs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mana_gd_remove_irqs(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gdma_context *gc = pci_get_drvdata(pdev);</div><div class='hunk'>@@ -1409,19 +1867,21 @@ static void mana_gd_remove_irqs(struct pci_dev *pdev)</div><div class='ctx'> 		if (irq &lt; 0)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		gic = &amp;gc-&gt;irq_contexts[i];</div><div class='add'>+		gic = xa_load(&amp;gc-&gt;irq_contexts, i);</div><div class='add'>+		if (WARN_ON(!gic))</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='ctx'> 		/* Need to clear the hint before free_irq */</div><div class='ctx'> 		irq_update_affinity_hint(irq, NULL);</div><div class='ctx'> 		free_irq(irq, gic);</div><div class='add'>+		xa_erase(&amp;gc-&gt;irq_contexts, i);</div><div class='add'>+		kfree(gic);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pci_free_irq_vectors(pdev);</div><div class='ctx'> </div><div class='ctx'> 	gc-&gt;max_num_msix = 0;</div><div class='ctx'> 	gc-&gt;num_msix_usable = 0;</div><div class='del'>-	kfree(gc-&gt;irq_contexts);</div><div class='del'>-	gc-&gt;irq_contexts = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mana_gd_setup(struct pci_dev *pdev)</div><div class='hunk'>@@ -1432,9 +1892,16 @@ static int mana_gd_setup(struct pci_dev *pdev)</div><div class='ctx'> 	mana_gd_init_registers(pdev);</div><div class='ctx'> 	mana_smc_init(&amp;gc-&gt;shm_channel, gc-&gt;dev, gc-&gt;shm_base);</div><div class='ctx'> </div><div class='del'>-	err = mana_gd_setup_irqs(pdev);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	gc-&gt;service_wq = alloc_ordered_workqueue("gdma_service_wq", 0);</div><div class='add'>+	if (!gc-&gt;service_wq)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = mana_gd_setup_hwc_irqs(pdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(gc-&gt;dev, "Failed to setup IRQs for HWC creation: %d\n",</div><div class='add'>+			err);</div><div class='add'>+		goto free_workqueue;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = mana_hwc_create_channel(gc);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1448,16 +1915,26 @@ static int mana_gd_setup(struct pci_dev *pdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto destroy_hwc;</div><div class='ctx'> </div><div class='add'>+	err = mana_gd_setup_remaining_irqs(pdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(gc-&gt;dev, "Failed to setup remaining IRQs: %d", err);</div><div class='add'>+		goto destroy_hwc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = mana_gd_detect_devices(pdev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto destroy_hwc;</div><div class='ctx'> </div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "mana gdma setup successful\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> destroy_hwc:</div><div class='ctx'> 	mana_hwc_destroy_channel(gc);</div><div class='ctx'> remove_irq:</div><div class='ctx'> 	mana_gd_remove_irqs(pdev);</div><div class='add'>+free_workqueue:</div><div class='add'>+	destroy_workqueue(gc-&gt;service_wq);</div><div class='add'>+	dev_err(&amp;pdev-&gt;dev, "%s failed (error %d)\n", __func__, err);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1468,6 +1945,9 @@ static void mana_gd_cleanup(struct pci_dev *pdev)</div><div class='ctx'> 	mana_hwc_destroy_channel(gc);</div><div class='ctx'> </div><div class='ctx'> 	mana_gd_remove_irqs(pdev);</div><div class='add'>+</div><div class='add'>+	destroy_workqueue(gc-&gt;service_wq);</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "mana gdma cleanup successful\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool mana_is_pf(unsigned short dev_id)</div><div class='hunk'>@@ -1486,8 +1966,10 @@ static int mana_gd_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	BUILD_BUG_ON(2 * MAX_PORTS_IN_MANA_DEV * GDMA_EQE_SIZE &gt; EQ_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	err = pci_enable_device(pdev);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to enable pci device (err=%d)\n", err);</div><div class='ctx'> 		return -ENXIO;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1496,9 +1978,10 @@ static int mana_gd_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto disable_dev;</div><div class='ctx'> </div><div class='ctx'> 	err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "DMA set mask failed: %d\n", err);</div><div class='ctx'> 		goto release_region;</div><div class='del'>-</div><div class='add'>+	}</div><div class='ctx'> 	dma_set_max_seg_size(&amp;pdev-&gt;dev, UINT_MAX);</div><div class='ctx'> </div><div class='ctx'> 	err = -ENOMEM;</div><div class='hunk'>@@ -1518,6 +2001,7 @@ static int mana_gd_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	gc-&gt;is_pf = mana_is_pf(pdev-&gt;device);</div><div class='ctx'> 	gc-&gt;bar0_va = bar0_va;</div><div class='ctx'> 	gc-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	xa_init(&amp;gc-&gt;irq_contexts);</div><div class='ctx'> </div><div class='ctx'> 	if (gc-&gt;is_pf)</div><div class='ctx'> 		gc-&gt;mana_pci_debugfs = debugfs_create_dir("0", mana_debugfs_root);</div><div class='hunk'>@@ -1533,8 +2017,25 @@ static int mana_gd_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto cleanup_gd;</div><div class='ctx'> </div><div class='add'>+	err = mana_rdma_probe(&amp;gc-&gt;mana_ib);</div><div class='add'>+	if (err)</div><div class='add'>+		goto cleanup_mana;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If a hardware reset event has occurred over HWC during probe,</div><div class='add'>+	 * rollback and perform hardware reset procedure.</div><div class='add'>+	 */</div><div class='add'>+	if (test_and_set_bit(GC_PROBE_SUCCEEDED, &amp;gc-&gt;flags)) {</div><div class='add'>+		err = -EPROTO;</div><div class='add'>+		goto cleanup_mana_rdma;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+cleanup_mana_rdma:</div><div class='add'>+	mana_rdma_remove(&amp;gc-&gt;mana_ib);</div><div class='add'>+cleanup_mana:</div><div class='add'>+	mana_remove(&amp;gc-&gt;mana, false);</div><div class='ctx'> cleanup_gd:</div><div class='ctx'> 	mana_gd_cleanup(pdev);</div><div class='ctx'> unmap_bar:</div><div class='hunk'>@@ -1545,6 +2046,8 @@ unmap_bar:</div><div class='ctx'> 	 * adapter-MTU file and apc-&gt;mana_pci_debugfs folder.</div><div class='ctx'> 	 */</div><div class='ctx'> 	debugfs_remove_recursive(gc-&gt;mana_pci_debugfs);</div><div class='add'>+	gc-&gt;mana_pci_debugfs = NULL;</div><div class='add'>+	xa_destroy(&amp;gc-&gt;irq_contexts);</div><div class='ctx'> 	pci_iounmap(pdev, bar0_va);</div><div class='ctx'> free_gc:</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='hunk'>@@ -1554,6 +2057,35 @@ release_region:</div><div class='ctx'> disable_dev:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> 	dev_err(&amp;pdev-&gt;dev, "gdma probe failed: err = %d\n", err);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Hardware could be in recovery mode and the HWC returns TIMEDOUT or</div><div class='add'>+	 * EPROTO from mana_gd_setup(), mana_probe() or mana_rdma_probe(), or</div><div class='add'>+	 * we received a hardware reset event over HWC interrupt. In this case,</div><div class='add'>+	 * perform the device recovery procedure after MANA_SERVICE_PERIOD</div><div class='add'>+	 * seconds.</div><div class='add'>+	 */</div><div class='add'>+	if (err == -ETIMEDOUT || err == -EPROTO) {</div><div class='add'>+		struct mana_dev_recovery *dev;</div><div class='add'>+		unsigned long flags;</div><div class='add'>+</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Start MANA recovery mode\n");</div><div class='add'>+</div><div class='add'>+		dev = kzalloc(sizeof(*dev), GFP_KERNEL);</div><div class='add'>+		if (!dev)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		dev-&gt;pdev = pci_dev_get(pdev);</div><div class='add'>+		dev-&gt;type = GDMA_EQE_HWC_RESET_REQUEST;</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;mana_dev_recovery_work.lock, flags);</div><div class='add'>+		list_add_tail(&amp;dev-&gt;list, &amp;mana_dev_recovery_work.dev_list);</div><div class='add'>+		spin_unlock_irqrestore(&amp;mana_dev_recovery_work.lock, flags);</div><div class='add'>+</div><div class='add'>+		schedule_delayed_work(&amp;mana_dev_recovery_work.work,</div><div class='add'>+				      secs_to_jiffies(MANA_SERVICE_PERIOD));</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1561,25 +2093,33 @@ static void mana_gd_remove(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gdma_context *gc = pci_get_drvdata(pdev);</div><div class='ctx'> </div><div class='add'>+	mana_rdma_remove(&amp;gc-&gt;mana_ib);</div><div class='ctx'> 	mana_remove(&amp;gc-&gt;mana, false);</div><div class='ctx'> </div><div class='ctx'> 	mana_gd_cleanup(pdev);</div><div class='ctx'> </div><div class='ctx'> 	debugfs_remove_recursive(gc-&gt;mana_pci_debugfs);</div><div class='ctx'> </div><div class='add'>+	gc-&gt;mana_pci_debugfs = NULL;</div><div class='add'>+</div><div class='add'>+	xa_destroy(&amp;gc-&gt;irq_contexts);</div><div class='add'>+</div><div class='ctx'> 	pci_iounmap(pdev, gc-&gt;bar0_va);</div><div class='ctx'> </div><div class='ctx'> 	vfree(gc);</div><div class='ctx'> </div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "mana gdma remove successful\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* The 'state' parameter is not used. */</div><div class='del'>-static int mana_gd_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='add'>+int mana_gd_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> {</div><div class='ctx'> 	struct gdma_context *gc = pci_get_drvdata(pdev);</div><div class='ctx'> </div><div class='add'>+	mana_rdma_remove(&amp;gc-&gt;mana_ib);</div><div class='ctx'> 	mana_remove(&amp;gc-&gt;mana, true);</div><div class='ctx'> </div><div class='ctx'> 	mana_gd_cleanup(pdev);</div><div class='hunk'>@@ -1591,7 +2131,7 @@ static int mana_gd_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'>  * fail -- if this happens, it's safer to just report an error than try to undo</div><div class='ctx'>  * what has been done.</div><div class='ctx'>  */</div><div class='del'>-static int mana_gd_resume(struct pci_dev *pdev)</div><div class='add'>+int mana_gd_resume(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gdma_context *gc = pci_get_drvdata(pdev);</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1604,6 +2144,10 @@ static int mana_gd_resume(struct pci_dev *pdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='add'>+	err = mana_rdma_probe(&amp;gc-&gt;mana_ib);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1614,12 +2158,15 @@ static void mana_gd_shutdown(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "Shutdown was called\n");</div><div class='ctx'> </div><div class='add'>+	mana_rdma_remove(&amp;gc-&gt;mana_ib);</div><div class='ctx'> 	mana_remove(&amp;gc-&gt;mana, true);</div><div class='ctx'> </div><div class='ctx'> 	mana_gd_cleanup(pdev);</div><div class='ctx'> </div><div class='ctx'> 	debugfs_remove_recursive(gc-&gt;mana_pci_debugfs);</div><div class='ctx'> </div><div class='add'>+	gc-&gt;mana_pci_debugfs = NULL;</div><div class='add'>+</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1643,20 +2190,43 @@ static int __init mana_driver_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	INIT_LIST_HEAD(&amp;mana_dev_recovery_work.dev_list);</div><div class='add'>+	spin_lock_init(&amp;mana_dev_recovery_work.lock);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;mana_dev_recovery_work.work, mana_recovery_delayed_func);</div><div class='add'>+</div><div class='ctx'> 	mana_debugfs_root = debugfs_create_dir("mana", NULL);</div><div class='ctx'> </div><div class='ctx'> 	err = pci_register_driver(&amp;mana_driver);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='ctx'> 		debugfs_remove(mana_debugfs_root);</div><div class='add'>+		mana_debugfs_root = NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit mana_driver_exit(void)</div><div class='ctx'> {</div><div class='del'>-	debugfs_remove(mana_debugfs_root);</div><div class='add'>+	struct mana_dev_recovery *dev;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	disable_delayed_work_sync(&amp;mana_dev_recovery_work.work);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;mana_dev_recovery_work.lock, flags);</div><div class='add'>+	while (!list_empty(&amp;mana_dev_recovery_work.dev_list)) {</div><div class='add'>+		dev = list_first_entry(&amp;mana_dev_recovery_work.dev_list,</div><div class='add'>+				       struct mana_dev_recovery, list);</div><div class='add'>+		list_del(&amp;dev-&gt;list);</div><div class='add'>+		pci_dev_put(dev-&gt;pdev);</div><div class='add'>+		kfree(dev);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;mana_dev_recovery_work.lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	pci_unregister_driver(&amp;mana_driver);</div><div class='add'>+</div><div class='add'>+	debugfs_remove(mana_debugfs_root);</div><div class='add'>+</div><div class='add'>+	mana_debugfs_root = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(mana_driver_init);</div><div class='head'>diff --git a/drivers/net/ethernet/microsoft/mana/hw_channel.c b/drivers/net/ethernet/microsoft/mana/hw_channel.c<br/>index a00f915c5188..aa4e2731e2ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/mana/hw_channel.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/mana/hw_channel.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/mana/hw_channel.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microsoft/mana/hw_channel.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Copyright (c) 2021, Microsoft Corporation. */</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/mana/gdma.h&gt;</div><div class='add'>+#include &lt;net/mana/mana.h&gt;</div><div class='ctx'> #include &lt;net/mana/hw_channel.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -112,11 +113,14 @@ out:</div><div class='ctx'> static void mana_hwc_init_event_handler(void *ctx, struct gdma_queue *q_self,</div><div class='ctx'> 					struct gdma_event *event)</div><div class='ctx'> {</div><div class='add'>+	union hwc_init_soc_service_type service_data;</div><div class='ctx'> 	struct hw_channel_context *hwc = ctx;</div><div class='ctx'> 	struct gdma_dev *gd = hwc-&gt;gdma_dev;</div><div class='ctx'> 	union hwc_init_type_data type_data;</div><div class='ctx'> 	union hwc_init_eq_id_db eq_db;</div><div class='add'>+	struct mana_context *ac;</div><div class='ctx'> 	u32 type, val;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	switch (event-&gt;type) {</div><div class='ctx'> 	case GDMA_EQE_HWC_INIT_EQ_ID_DB:</div><div class='hunk'>@@ -193,13 +197,41 @@ static void mana_hwc_init_event_handler(void *ctx, struct gdma_queue *q_self,</div><div class='ctx'> 			hwc-&gt;hwc_timeout = val;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case HWC_DATA_HW_LINK_CONNECT:</div><div class='add'>+		case HWC_DATA_HW_LINK_DISCONNECT:</div><div class='add'>+			ac = gd-&gt;gdma_context-&gt;mana.driver_data;</div><div class='add'>+			if (!ac)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			WRITE_ONCE(ac-&gt;link_event, type);</div><div class='add'>+			schedule_work(&amp;ac-&gt;link_change_work);</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		default:</div><div class='ctx'> 			dev_warn(hwc-&gt;dev, "Received unknown reconfig type %u\n", type);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='add'>+	case GDMA_EQE_HWC_SOC_SERVICE:</div><div class='add'>+		service_data.as_uint32 = event-&gt;details[0];</div><div class='add'>+		type = service_data.type;</div><div class='ctx'> </div><div class='add'>+		switch (type) {</div><div class='add'>+		case GDMA_SERVICE_TYPE_RDMA_SUSPEND:</div><div class='add'>+		case GDMA_SERVICE_TYPE_RDMA_RESUME:</div><div class='add'>+			ret = mana_rdma_service_event(gd-&gt;gdma_context, type);</div><div class='add'>+			if (ret)</div><div class='add'>+				dev_err(hwc-&gt;dev, "Failed to schedule adev service event: %d\n",</div><div class='add'>+					ret);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			dev_warn(hwc-&gt;dev, "Received unknown SOC service type %u\n", type);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_warn(hwc-&gt;dev, "Received unknown gdma event %u\n", event-&gt;type);</div><div class='ctx'> 		/* Ignore unknown events, which should never happen. */</div><div class='hunk'>@@ -440,7 +472,8 @@ static int mana_hwc_alloc_dma_buf(struct hw_channel_context *hwc, u16 q_depth,</div><div class='ctx'> 	gmi = &amp;dma_buf-&gt;mem_info;</div><div class='ctx'> 	err = mana_gd_alloc_memory(gc, buf_size, gmi);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(hwc-&gt;dev, "Failed to allocate DMA buffer: %d\n", err);</div><div class='add'>+		dev_err(hwc-&gt;dev, "Failed to allocate DMA buffer size: %u, err %d\n",</div><div class='add'>+			buf_size, err);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -529,6 +562,9 @@ static int mana_hwc_create_wq(struct hw_channel_context *hwc,</div><div class='ctx'> out:</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		mana_hwc_destroy_wq(hwc, hwc_wq);</div><div class='add'>+</div><div class='add'>+	dev_err(hwc-&gt;dev, "Failed to create HWC queue size= %u type= %d err= %d\n",</div><div class='add'>+		queue_size, q_type, err);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -856,7 +892,14 @@ int mana_hwc_send_request(struct hw_channel_context *hwc, u32 req_len,</div><div class='ctx'> </div><div class='ctx'> 	if (!wait_for_completion_timeout(&amp;ctx-&gt;comp_event,</div><div class='ctx'> 					 (msecs_to_jiffies(hwc-&gt;hwc_timeout)))) {</div><div class='del'>-		dev_err(hwc-&gt;dev, "HWC: Request timed out!\n");</div><div class='add'>+		if (hwc-&gt;hwc_timeout != 0)</div><div class='add'>+			dev_err(hwc-&gt;dev, "HWC: Request timed out: %u ms\n",</div><div class='add'>+				hwc-&gt;hwc_timeout);</div><div class='add'>+</div><div class='add'>+		/* Reduce further waiting if HWC no response */</div><div class='add'>+		if (hwc-&gt;hwc_timeout &gt; 1)</div><div class='add'>+			hwc-&gt;hwc_timeout = 1;</div><div class='add'>+</div><div class='ctx'> 		err = -ETIMEDOUT;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -867,8 +910,13 @@ int mana_hwc_send_request(struct hw_channel_context *hwc, u32 req_len,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ctx-&gt;status_code &amp;&amp; ctx-&gt;status_code != GDMA_STATUS_MORE_ENTRIES) {</div><div class='del'>-		dev_err(hwc-&gt;dev, "HWC: Failed hw_channel req: 0x%x\n",</div><div class='del'>-			ctx-&gt;status_code);</div><div class='add'>+		if (ctx-&gt;status_code == GDMA_STATUS_CMD_UNSUPPORTED) {</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		if (req_msg-&gt;req.msg_type != MANA_QUERY_PHY_STAT)</div><div class='add'>+			dev_err(hwc-&gt;dev, "HWC: Failed hw_channel req: 0x%x\n",</div><div class='add'>+				ctx-&gt;status_code);</div><div class='ctx'> 		err = -EPROTO;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/microsoft/mana/mana_bpf.c b/drivers/net/ethernet/microsoft/mana/mana_bpf.c<br/>index 23b1521c0df9..7697c9b52ed3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/mana/mana_bpf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/mana/mana_bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/mana/mana_bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microsoft/mana/mana_bpf.c</a></div><div class='hunk'>@@ -91,7 +91,7 @@ u32 mana_run_xdp(struct net_device *ndev, struct mana_rxq *rxq,</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	xdp_init_buff(xdp, PAGE_SIZE, &amp;rxq-&gt;xdp_rxq);</div><div class='del'>-	xdp_prepare_buff(xdp, buf_va, XDP_PACKET_HEADROOM, pkt_len, false);</div><div class='add'>+	xdp_prepare_buff(xdp, buf_va, XDP_PACKET_HEADROOM, pkt_len, true);</div><div class='ctx'> </div><div class='ctx'> 	act = bpf_prog_run_xdp(prog, xdp);</div><div class='ctx'> </div><div class='hunk'>@@ -174,6 +174,7 @@ static int mana_xdp_set(struct net_device *ndev, struct bpf_prog *prog,</div><div class='ctx'> 	struct mana_port_context *apc = netdev_priv(ndev);</div><div class='ctx'> 	struct bpf_prog *old_prog;</div><div class='ctx'> 	struct gdma_context *gc;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	gc = apc-&gt;ac-&gt;gdma_dev-&gt;gdma_context;</div><div class='ctx'> </div><div class='hunk'>@@ -195,11 +196,45 @@ static int mana_xdp_set(struct net_device *ndev, struct bpf_prog *prog,</div><div class='ctx'> 	 */</div><div class='ctx'> 	apc-&gt;bpf_prog = prog;</div><div class='ctx'> </div><div class='del'>-	if (old_prog)</div><div class='del'>-		bpf_prog_put(old_prog);</div><div class='add'>+	if (apc-&gt;port_is_up) {</div><div class='add'>+		/* Re-create rxq's after xdp prog was loaded or unloaded.</div><div class='add'>+		 * Ex: re create rxq's to switch from full pages to smaller</div><div class='add'>+		 * size page fragments when xdp prog is unloaded and</div><div class='add'>+		 * vice-versa.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* Pre-allocate buffers to prevent failure in mana_attach */</div><div class='add'>+		err = mana_pre_alloc_rxbufs(apc, ndev-&gt;mtu, apc-&gt;num_queues);</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "XDP: Insufficient memory for tx/rx re-config");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = mana_detach(ndev, false);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(ndev,</div><div class='add'>+				   "mana_detach failed at xdp set: %d\n", err);</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "XDP: Re-config failed at detach");</div><div class='add'>+			goto err_dealloc_rxbuffs;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = mana_attach(ndev);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(ndev,</div><div class='add'>+				   "mana_attach failed at xdp set: %d\n", err);</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "XDP: Re-config failed at attach");</div><div class='add'>+			goto err_dealloc_rxbuffs;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (apc-&gt;port_is_up)</div><div class='ctx'> 		mana_chn_setxdp(apc, prog);</div><div class='add'>+		mana_pre_dealloc_rxbufs(apc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (old_prog)</div><div class='add'>+		bpf_prog_put(old_prog);</div><div class='ctx'> </div><div class='ctx'> 	if (prog)</div><div class='ctx'> 		ndev-&gt;max_mtu = MANA_XDP_MTU_MAX;</div><div class='hunk'>@@ -207,6 +242,11 @@ static int mana_xdp_set(struct net_device *ndev, struct bpf_prog *prog,</div><div class='ctx'> 		ndev-&gt;max_mtu = gc-&gt;adapter_mtu - ETH_HLEN;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_dealloc_rxbuffs:</div><div class='add'>+	apc-&gt;bpf_prog = old_prog;</div><div class='add'>+	mana_pre_dealloc_rxbufs(apc);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mana_bpf(struct net_device *ndev, struct netdev_bpf *bpf)</div><div class='head'>diff --git a/drivers/net/ethernet/microsoft/mana/mana_en.c b/drivers/net/ethernet/microsoft/mana/mana_en.c<br/>index 57ac732e7707..1ad154f9db1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/mana/mana_en.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/mana/mana_en.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/mana/mana_en.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microsoft/mana/mana_en.c</a></div><div class='hunk'>@@ -10,14 +10,18 @@</div><div class='ctx'> #include &lt;linux/filter.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/checksum.h&gt;</div><div class='ctx'> #include &lt;net/ip6_checksum.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/mana/mana.h&gt;</div><div class='ctx'> #include &lt;net/mana/mana_auxiliary.h&gt;</div><div class='add'>+#include &lt;net/mana/hw_channel.h&gt;</div><div class='ctx'> </div><div class='ctx'> static DEFINE_IDA(mana_adev_ida);</div><div class='ctx'> </div><div class='hunk'>@@ -46,25 +50,44 @@ static const struct file_operations mana_dbg_q_fops = {</div><div class='ctx'> 	.read   = mana_dbg_q_read,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static bool mana_en_need_log(struct mana_port_context *apc, int err)</div><div class='add'>+{</div><div class='add'>+	if (apc &amp;&amp; apc-&gt;ac &amp;&amp; apc-&gt;ac-&gt;gdma_dev &amp;&amp;</div><div class='add'>+	    apc-&gt;ac-&gt;gdma_dev-&gt;gdma_context)</div><div class='add'>+		return mana_need_log(apc-&gt;ac-&gt;gdma_dev-&gt;gdma_context, err);</div><div class='add'>+	else</div><div class='add'>+		return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mana_put_rx_page(struct mana_rxq *rxq, struct page *page,</div><div class='add'>+			     bool from_pool)</div><div class='add'>+{</div><div class='add'>+	if (from_pool)</div><div class='add'>+		page_pool_put_full_page(rxq-&gt;page_pool, page, false);</div><div class='add'>+	else</div><div class='add'>+		put_page(page);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Microsoft Azure Network Adapter (MANA) functions */</div><div class='ctx'> </div><div class='ctx'> static int mana_open(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mana_port_context *apc = netdev_priv(ndev);</div><div class='ctx'> 	int err;</div><div class='del'>-</div><div class='ctx'> 	err = mana_alloc_queues(ndev);</div><div class='del'>-	if (err)</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "%s failed to allocate queues: %d\n", __func__, err);</div><div class='ctx'> 		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	apc-&gt;port_is_up = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Ensure port state updated before txq state */</div><div class='ctx'> 	smp_wmb();</div><div class='ctx'> </div><div class='del'>-	netif_carrier_on(ndev);</div><div class='ctx'> 	netif_tx_wake_all_queues(ndev);</div><div class='del'>-</div><div class='add'>+	netdev_dbg(ndev, "%s successful\n", __func__);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -78,6 +101,46 @@ static int mana_close(struct net_device *ndev)</div><div class='ctx'> 	return mana_detach(ndev, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mana_link_state_handle(struct work_struct *w)</div><div class='add'>+{</div><div class='add'>+	struct mana_context *ac;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	u32 link_event;</div><div class='add'>+	bool link_up;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ac = container_of(w, struct mana_context, link_change_work);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	link_event = READ_ONCE(ac-&gt;link_event);</div><div class='add'>+</div><div class='add'>+	if (link_event == HWC_DATA_HW_LINK_CONNECT)</div><div class='add'>+		link_up = true;</div><div class='add'>+	else if (link_event == HWC_DATA_HW_LINK_DISCONNECT)</div><div class='add'>+		link_up = false;</div><div class='add'>+	else</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Process all ports */</div><div class='add'>+	for (i = 0; i &lt; ac-&gt;num_ports; i++) {</div><div class='add'>+		ndev = ac-&gt;ports[i];</div><div class='add'>+		if (!ndev)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (link_up) {</div><div class='add'>+			netif_carrier_on(ndev);</div><div class='add'>+</div><div class='add'>+			__netdev_notify_peers(ndev);</div><div class='add'>+		} else {</div><div class='add'>+			netif_carrier_off(ndev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool mana_can_tx(struct gdma_queue *wq)</div><div class='ctx'> {</div><div class='ctx'> 	return mana_gd_wq_avail_space(wq) &gt;= MAX_TX_WQE_SIZE;</div><div class='hunk'>@@ -176,6 +239,9 @@ static int mana_map_skb(struct sk_buff *skb, struct mana_port_context *apc,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> frag_err:</div><div class='add'>+	if (net_ratelimit())</div><div class='add'>+		netdev_err(apc-&gt;ndev, "Failed to map skb of size %u to DMA\n",</div><div class='add'>+			   skb-&gt;len);</div><div class='ctx'> 	for (i = sg_i - 1; i &gt;= hsg; i--)</div><div class='ctx'> 		dma_unmap_page(dev, ash-&gt;dma_handle[i], ash-&gt;size[i],</div><div class='ctx'> 			       DMA_TO_DEVICE);</div><div class='hunk'>@@ -245,10 +311,10 @@ netdev_tx_t mana_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 	struct netdev_queue *net_txq;</div><div class='ctx'> 	struct mana_stats_tx *tx_stats;</div><div class='ctx'> 	struct gdma_queue *gdma_sq;</div><div class='add'>+	int err, len, num_gso_seg;</div><div class='ctx'> 	unsigned int csum_type;</div><div class='ctx'> 	struct mana_txq *txq;</div><div class='ctx'> 	struct mana_cq *cq;</div><div class='del'>-	int err, len;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!apc-&gt;port_is_up))</div><div class='ctx'> 		goto tx_drop;</div><div class='hunk'>@@ -256,11 +322,29 @@ netdev_tx_t mana_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 	if (skb_cow_head(skb, MANA_HEADROOM))</div><div class='ctx'> 		goto tx_drop_count;</div><div class='ctx'> </div><div class='add'>+	if (unlikely(ipv6_hopopt_jumbo_remove(skb)))</div><div class='add'>+		goto tx_drop_count;</div><div class='add'>+</div><div class='ctx'> 	txq = &amp;apc-&gt;tx_qp[txq_idx].txq;</div><div class='ctx'> 	gdma_sq = txq-&gt;gdma_sq;</div><div class='ctx'> 	cq = &amp;apc-&gt;tx_qp[txq_idx].tx_cq;</div><div class='ctx'> 	tx_stats = &amp;txq-&gt;stats;</div><div class='ctx'> </div><div class='add'>+	BUILD_BUG_ON(MAX_TX_WQE_SGL_ENTRIES != MANA_MAX_TX_WQE_SGL_ENTRIES);</div><div class='add'>+	if (MAX_SKB_FRAGS + 2 &gt; MAX_TX_WQE_SGL_ENTRIES &amp;&amp;</div><div class='add'>+	    skb_shinfo(skb)-&gt;nr_frags + 2 &gt; MAX_TX_WQE_SGL_ENTRIES) {</div><div class='add'>+		/* GSO skb with Hardware SGE limit exceeded is not expected here</div><div class='add'>+		 * as they are handled in mana_features_check() callback</div><div class='add'>+		 */</div><div class='add'>+		if (skb_linearize(skb)) {</div><div class='add'>+			netdev_warn_once(ndev, "Failed to linearize skb with nr_frags=%d and is_gso=%d\n",</div><div class='add'>+					 skb_shinfo(skb)-&gt;nr_frags,</div><div class='add'>+					 skb_is_gso(skb));</div><div class='add'>+			goto tx_drop_count;</div><div class='add'>+		}</div><div class='add'>+		apc-&gt;eth_stats.tx_linear_pkt_cnt++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pkg.tx_oob.s_oob.vcq_num = cq-&gt;gdma_id;</div><div class='ctx'> 	pkg.tx_oob.s_oob.vsq_frame = txq-&gt;vsq_frame;</div><div class='ctx'> </div><div class='hunk'>@@ -374,8 +458,6 @@ netdev_tx_t mana_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	WARN_ON_ONCE(pkg.wqe_req.num_sge &gt; MAX_TX_WQE_SGL_ENTRIES);</div><div class='del'>-</div><div class='ctx'> 	if (pkg.wqe_req.num_sge &lt;= ARRAY_SIZE(pkg.sgl_array)) {</div><div class='ctx'> 		pkg.wqe_req.sgl = pkg.sgl_array;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -398,6 +480,7 @@ netdev_tx_t mana_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 	skb_queue_tail(&amp;txq-&gt;pending_skbs, skb);</div><div class='ctx'> </div><div class='ctx'> 	len = skb-&gt;len;</div><div class='add'>+	num_gso_seg = skb_is_gso(skb) ? skb_shinfo(skb)-&gt;gso_segs : 1;</div><div class='ctx'> 	net_txq = netdev_get_tx_queue(ndev, txq_idx);</div><div class='ctx'> </div><div class='ctx'> 	err = mana_gd_post_work_request(gdma_sq, &amp;pkg.wqe_req,</div><div class='hunk'>@@ -409,9 +492,9 @@ netdev_tx_t mana_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		(void)skb_dequeue_tail(&amp;txq-&gt;pending_skbs);</div><div class='add'>+		mana_unmap_skb(skb, apc);</div><div class='ctx'> 		netdev_warn(ndev, "Failed to post TX OOB: %d\n", err);</div><div class='del'>-		err = NETDEV_TX_BUSY;</div><div class='del'>-		goto tx_busy;</div><div class='add'>+		goto free_sgl_ptr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = NETDEV_TX_OK;</div><div class='hunk'>@@ -422,13 +505,15 @@ netdev_tx_t mana_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 	/* skb may be freed after mana_gd_post_work_request. Do not use it. */</div><div class='ctx'> 	skb = NULL;</div><div class='ctx'> </div><div class='add'>+	/* Populated the packet and bytes counters based on post GSO packet</div><div class='add'>+	 * calculations</div><div class='add'>+	 */</div><div class='ctx'> 	tx_stats = &amp;txq-&gt;stats;</div><div class='ctx'> 	u64_stats_update_begin(&amp;tx_stats-&gt;syncp);</div><div class='del'>-	tx_stats-&gt;packets++;</div><div class='del'>-	tx_stats-&gt;bytes += len;</div><div class='add'>+	tx_stats-&gt;packets += num_gso_seg;</div><div class='add'>+	tx_stats-&gt;bytes += len + ((num_gso_seg - 1) * gso_hs);</div><div class='ctx'> 	u64_stats_update_end(&amp;tx_stats-&gt;syncp);</div><div class='ctx'> </div><div class='del'>-tx_busy:</div><div class='ctx'> 	if (netif_tx_queue_stopped(net_txq) &amp;&amp; mana_can_tx(gdma_sq)) {</div><div class='ctx'> 		netif_tx_wake_queue(net_txq);</div><div class='ctx'> 		apc-&gt;eth_stats.wake_queue++;</div><div class='hunk'>@@ -446,6 +531,25 @@ tx_drop:</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if (MAX_SKB_FRAGS + 2 &gt; MANA_MAX_TX_WQE_SGL_ENTRIES)</div><div class='add'>+static netdev_features_t mana_features_check(struct sk_buff *skb,</div><div class='add'>+					     struct net_device *ndev,</div><div class='add'>+					     netdev_features_t features)</div><div class='add'>+{</div><div class='add'>+	if (skb_shinfo(skb)-&gt;nr_frags + 2 &gt; MAX_TX_WQE_SGL_ENTRIES) {</div><div class='add'>+		/* Exceeds HW SGE limit.</div><div class='add'>+		 * GSO case:</div><div class='add'>+		 *   Disable GSO so the stack will software-segment the skb</div><div class='add'>+		 *   into smaller skbs that fit the SGE budget.</div><div class='add'>+		 * Non-GSO case:</div><div class='add'>+		 *   The xmit path will attempt skb_linearize() as a fallback.</div><div class='add'>+		 */</div><div class='add'>+		features &amp;= ~NETIF_F_GSO_MASK;</div><div class='add'>+	}</div><div class='add'>+	return features;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void mana_get_stats64(struct net_device *ndev,</div><div class='ctx'> 			     struct rtnl_link_stats64 *st)</div><div class='ctx'> {</div><div class='hunk'>@@ -462,6 +566,11 @@ static void mana_get_stats64(struct net_device *ndev,</div><div class='ctx'> </div><div class='ctx'> 	netdev_stats_to_stats64(st, &amp;ndev-&gt;stats);</div><div class='ctx'> </div><div class='add'>+	if (apc-&gt;ac-&gt;hwc_timeout_occurred)</div><div class='add'>+		netdev_warn_once(ndev, "HWC timeout occurred\n");</div><div class='add'>+</div><div class='add'>+	st-&gt;rx_missed_errors = apc-&gt;ac-&gt;hc_stats.hc_rx_discards_no_wqe;</div><div class='add'>+</div><div class='ctx'> 	for (q = 0; q &lt; num_queues; q++) {</div><div class='ctx'> 		rx_stats = &amp;apc-&gt;rxqs[q]-&gt;stats;</div><div class='ctx'> </div><div class='hunk'>@@ -607,21 +716,40 @@ static void *mana_get_rxbuf_pre(struct mana_rxq *rxq, dma_addr_t *da)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Get RX buffer's data size, alloc size, XDP headroom based on MTU */</div><div class='del'>-static void mana_get_rxbuf_cfg(int mtu, u32 *datasize, u32 *alloc_size,</div><div class='del'>-			       u32 *headroom)</div><div class='add'>+static void mana_get_rxbuf_cfg(struct mana_port_context *apc,</div><div class='add'>+			       int mtu, u32 *datasize, u32 *alloc_size,</div><div class='add'>+			       u32 *headroom, u32 *frag_count)</div><div class='ctx'> {</div><div class='del'>-	if (mtu &gt; MANA_XDP_MTU_MAX)</div><div class='del'>-		*headroom = 0; /* no support for XDP */</div><div class='del'>-	else</div><div class='del'>-		*headroom = XDP_PACKET_HEADROOM;</div><div class='add'>+	u32 len, buf_size;</div><div class='ctx'> </div><div class='del'>-	*alloc_size = SKB_DATA_ALIGN(mtu + MANA_RXBUF_PAD + *headroom);</div><div class='add'>+	/* Calculate datasize first (consistent across all cases) */</div><div class='add'>+	*datasize = mtu + ETH_HLEN;</div><div class='ctx'> </div><div class='del'>-	/* Using page pool in this case, so alloc_size is PAGE_SIZE */</div><div class='del'>-	if (*alloc_size &lt; PAGE_SIZE)</div><div class='del'>-		*alloc_size = PAGE_SIZE;</div><div class='add'>+	/* For xdp and jumbo frames make sure only one packet fits per page */</div><div class='add'>+	if (mtu + MANA_RXBUF_PAD &gt; PAGE_SIZE / 2 || mana_xdp_get(apc)) {</div><div class='add'>+		if (mana_xdp_get(apc)) {</div><div class='add'>+			*headroom = XDP_PACKET_HEADROOM;</div><div class='add'>+			*alloc_size = PAGE_SIZE;</div><div class='add'>+		} else {</div><div class='add'>+			*headroom = 0; /* no support for XDP */</div><div class='add'>+			*alloc_size = SKB_DATA_ALIGN(mtu + MANA_RXBUF_PAD +</div><div class='add'>+						     *headroom);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	*datasize = mtu + ETH_HLEN;</div><div class='add'>+		*frag_count = 1;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Standard MTU case - optimize for multiple packets per page */</div><div class='add'>+	*headroom = 0;</div><div class='add'>+</div><div class='add'>+	/* Calculate base buffer size needed */</div><div class='add'>+	len = SKB_DATA_ALIGN(mtu + MANA_RXBUF_PAD + *headroom);</div><div class='add'>+	buf_size = ALIGN(len, MANA_RX_FRAG_ALIGNMENT);</div><div class='add'>+</div><div class='add'>+	/* Calculate how many packets can fit in a page */</div><div class='add'>+	*frag_count = PAGE_SIZE / buf_size;</div><div class='add'>+	*alloc_size = buf_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int mana_pre_alloc_rxbufs(struct mana_port_context *mpc, int new_mtu, int num_queues)</div><div class='hunk'>@@ -633,8 +761,9 @@ int mana_pre_alloc_rxbufs(struct mana_port_context *mpc, int new_mtu, int num_qu</div><div class='ctx'> 	void *va;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	mana_get_rxbuf_cfg(new_mtu, &amp;mpc-&gt;rxbpre_datasize,</div><div class='del'>-			   &amp;mpc-&gt;rxbpre_alloc_size, &amp;mpc-&gt;rxbpre_headroom);</div><div class='add'>+	mana_get_rxbuf_cfg(mpc, new_mtu, &amp;mpc-&gt;rxbpre_datasize,</div><div class='add'>+			   &amp;mpc-&gt;rxbpre_alloc_size, &amp;mpc-&gt;rxbpre_headroom,</div><div class='add'>+			   &amp;mpc-&gt;rxbpre_frag_count);</div><div class='ctx'> </div><div class='ctx'> 	dev = mpc-&gt;ac-&gt;gdma_dev-&gt;gdma_context-&gt;dev;</div><div class='ctx'> </div><div class='hunk'>@@ -652,30 +781,16 @@ int mana_pre_alloc_rxbufs(struct mana_port_context *mpc, int new_mtu, int num_qu</div><div class='ctx'> 	mpc-&gt;rxbpre_total = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_rxb; i++) {</div><div class='del'>-		if (mpc-&gt;rxbpre_alloc_size &gt; PAGE_SIZE) {</div><div class='del'>-			va = netdev_alloc_frag(mpc-&gt;rxbpre_alloc_size);</div><div class='del'>-			if (!va)</div><div class='del'>-				goto error;</div><div class='del'>-</div><div class='del'>-			page = virt_to_head_page(va);</div><div class='del'>-			/* Check if the frag falls back to single page */</div><div class='del'>-			if (compound_order(page) &lt;</div><div class='del'>-			    get_order(mpc-&gt;rxbpre_alloc_size)) {</div><div class='del'>-				put_page(page);</div><div class='del'>-				goto error;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			page = dev_alloc_page();</div><div class='del'>-			if (!page)</div><div class='del'>-				goto error;</div><div class='add'>+		page = dev_alloc_pages(get_order(mpc-&gt;rxbpre_alloc_size));</div><div class='add'>+		if (!page)</div><div class='add'>+			goto error;</div><div class='ctx'> </div><div class='del'>-			va = page_to_virt(page);</div><div class='del'>-		}</div><div class='add'>+		va = page_to_virt(page);</div><div class='ctx'> </div><div class='ctx'> 		da = dma_map_single(dev, va + mpc-&gt;rxbpre_headroom,</div><div class='ctx'> 				    mpc-&gt;rxbpre_datasize, DMA_FROM_DEVICE);</div><div class='ctx'> 		if (dma_mapping_error(dev, da)) {</div><div class='del'>-			put_page(virt_to_head_page(va));</div><div class='add'>+			put_page(page);</div><div class='ctx'> 			goto error;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -687,6 +802,7 @@ int mana_pre_alloc_rxbufs(struct mana_port_context *mpc, int new_mtu, int num_qu</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> error:</div><div class='add'>+	netdev_err(mpc-&gt;ndev, "Failed to pre-allocate RX buffers for %d queues\n", num_queues);</div><div class='ctx'> 	mana_pre_dealloc_rxbufs(mpc);</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='hunk'>@@ -723,27 +839,102 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mana_shaper_set(struct net_shaper_binding *binding,</div><div class='add'>+			   const struct net_shaper *shaper,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mana_port_context *apc = netdev_priv(binding-&gt;netdev);</div><div class='add'>+	u32 old_speed, rate;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (shaper-&gt;handle.scope != NET_SHAPER_SCOPE_NETDEV) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "net shaper scope should be netdev");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (apc-&gt;handle.id &amp;&amp; shaper-&gt;handle.id != apc-&gt;handle.id) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Cannot create multiple shapers");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!shaper-&gt;bw_max || (shaper-&gt;bw_max % 100000000)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Please use multiples of 100Mbps for bandwidth");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rate = div_u64(shaper-&gt;bw_max, 1000); /* Convert bps to Kbps */</div><div class='add'>+	rate = div_u64(rate, 1000);	      /* Convert Kbps to Mbps */</div><div class='add'>+</div><div class='add'>+	/* Get current speed */</div><div class='add'>+	err = mana_query_link_cfg(apc);</div><div class='add'>+	old_speed = (err) ? SPEED_UNKNOWN : apc-&gt;speed;</div><div class='add'>+</div><div class='add'>+	if (!err) {</div><div class='add'>+		err = mana_set_bw_clamp(apc, rate, TRI_STATE_TRUE);</div><div class='add'>+		apc-&gt;speed = (err) ? old_speed : rate;</div><div class='add'>+		apc-&gt;handle = (err) ? apc-&gt;handle : shaper-&gt;handle;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mana_shaper_del(struct net_shaper_binding *binding,</div><div class='add'>+			   const struct net_shaper_handle *handle,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mana_port_context *apc = netdev_priv(binding-&gt;netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mana_set_bw_clamp(apc, 0, TRI_STATE_FALSE);</div><div class='add'>+</div><div class='add'>+	if (!err) {</div><div class='add'>+		/* Reset mana port context parameters */</div><div class='add'>+		apc-&gt;handle.id = 0;</div><div class='add'>+		apc-&gt;handle.scope = NET_SHAPER_SCOPE_UNSPEC;</div><div class='add'>+		apc-&gt;speed = apc-&gt;max_speed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mana_shaper_cap(struct net_shaper_binding *binding,</div><div class='add'>+			    enum net_shaper_scope scope,</div><div class='add'>+			    unsigned long *flags)</div><div class='add'>+{</div><div class='add'>+	*flags = BIT(NET_SHAPER_A_CAPS_SUPPORT_BW_MAX) |</div><div class='add'>+		 BIT(NET_SHAPER_A_CAPS_SUPPORT_METRIC_BPS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_shaper_ops mana_shaper_ops = {</div><div class='add'>+	.set = mana_shaper_set,</div><div class='add'>+	.delete = mana_shaper_del,</div><div class='add'>+	.capabilities = mana_shaper_cap,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops mana_devops = {</div><div class='ctx'> 	.ndo_open		= mana_open,</div><div class='ctx'> 	.ndo_stop		= mana_close,</div><div class='ctx'> 	.ndo_select_queue	= mana_select_queue,</div><div class='add'>+#if (MAX_SKB_FRAGS + 2 &gt; MANA_MAX_TX_WQE_SGL_ENTRIES)</div><div class='add'>+	.ndo_features_check	= mana_features_check,</div><div class='add'>+#endif</div><div class='ctx'> 	.ndo_start_xmit		= mana_start_xmit,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_get_stats64	= mana_get_stats64,</div><div class='ctx'> 	.ndo_bpf		= mana_bpf,</div><div class='ctx'> 	.ndo_xdp_xmit		= mana_xdp_xmit,</div><div class='ctx'> 	.ndo_change_mtu		= mana_change_mtu,</div><div class='add'>+	.net_shaper_ops         = &amp;mana_shaper_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void mana_cleanup_port_context(struct mana_port_context *apc)</div><div class='ctx'> {</div><div class='ctx'> 	/*</div><div class='del'>-	 * at this point all dir/files under the vport directory</div><div class='del'>-	 * are already cleaned up.</div><div class='del'>-	 * We are sure the apc-&gt;mana_port_debugfs remove will not</div><div class='del'>-	 * cause any freed memory access issues</div><div class='add'>+	 * make sure subsequent cleanup attempts don't end up removing already</div><div class='add'>+	 * cleaned dentry pointer</div><div class='ctx'> 	 */</div><div class='ctx'> 	debugfs_remove(apc-&gt;mana_port_debugfs);</div><div class='add'>+	apc-&gt;mana_port_debugfs = NULL;</div><div class='ctx'> 	kfree(apc-&gt;rxqs);</div><div class='ctx'> 	apc-&gt;rxqs = NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -779,8 +970,13 @@ static int mana_send_request(struct mana_context *ac, void *in_buf,</div><div class='ctx'> 	err = mana_gd_send_request(gc, in_len, in_buf, out_len,</div><div class='ctx'> 				   out_buf);</div><div class='ctx'> 	if (err || resp-&gt;status) {</div><div class='del'>-		dev_err(dev, "Failed to send mana message: %d, 0x%x\n",</div><div class='del'>-			err, resp-&gt;status);</div><div class='add'>+		if (err == -EOPNOTSUPP)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (req-&gt;req.msg_type != MANA_QUERY_PHY_STAT &amp;&amp;</div><div class='add'>+		    mana_need_log(gc, err))</div><div class='add'>+			dev_err(dev, "Failed to send mana message: %d, 0x%x\n",</div><div class='add'>+				err, resp-&gt;status);</div><div class='ctx'> 		return err ? err : -EPROTO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -855,8 +1051,10 @@ static void mana_pf_deregister_hw_vport(struct mana_port_context *apc)</div><div class='ctx'> 	err = mana_send_request(apc-&gt;ac, &amp;req, sizeof(req), &amp;resp,</div><div class='ctx'> 				sizeof(resp));</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_err(apc-&gt;ndev, "Failed to unregister hw vPort: %d\n",</div><div class='del'>-			   err);</div><div class='add'>+		if (mana_en_need_log(apc, err))</div><div class='add'>+			netdev_err(apc-&gt;ndev, "Failed to unregister hw vPort: %d\n",</div><div class='add'>+				   err);</div><div class='add'>+</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -911,8 +1109,10 @@ static void mana_pf_deregister_filter(struct mana_port_context *apc)</div><div class='ctx'> 	err = mana_send_request(apc-&gt;ac, &amp;req, sizeof(req), &amp;resp,</div><div class='ctx'> 				sizeof(resp));</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_err(apc-&gt;ndev, "Failed to unregister filter: %d\n",</div><div class='del'>-			   err);</div><div class='add'>+		if (mana_en_need_log(apc, err))</div><div class='add'>+			netdev_err(apc-&gt;ndev, "Failed to unregister filter: %d\n",</div><div class='add'>+				   err);</div><div class='add'>+</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -926,7 +1126,7 @@ static void mana_pf_deregister_filter(struct mana_port_context *apc)</div><div class='ctx'> </div><div class='ctx'> static int mana_query_device_cfg(struct mana_context *ac, u32 proto_major_ver,</div><div class='ctx'> 				 u32 proto_minor_ver, u32 proto_micro_ver,</div><div class='del'>-				 u16 *max_num_vports)</div><div class='add'>+				 u16 *max_num_vports, u8 *bm_hostmode)</div><div class='ctx'> {</div><div class='ctx'> 	struct gdma_context *gc = ac-&gt;gdma_dev-&gt;gdma_context;</div><div class='ctx'> 	struct mana_query_device_cfg_resp resp = {};</div><div class='hunk'>@@ -937,7 +1137,7 @@ static int mana_query_device_cfg(struct mana_context *ac, u32 proto_major_ver,</div><div class='ctx'> 	mana_gd_init_req_hdr(&amp;req.hdr, MANA_QUERY_DEV_CONFIG,</div><div class='ctx'> 			     sizeof(req), sizeof(resp));</div><div class='ctx'> </div><div class='del'>-	req.hdr.resp.msg_version = GDMA_MESSAGE_V2;</div><div class='add'>+	req.hdr.resp.msg_version = GDMA_MESSAGE_V3;</div><div class='ctx'> </div><div class='ctx'> 	req.proto_major_ver = proto_major_ver;</div><div class='ctx'> 	req.proto_minor_ver = proto_minor_ver;</div><div class='hunk'>@@ -961,11 +1161,16 @@ static int mana_query_device_cfg(struct mana_context *ac, u32 proto_major_ver,</div><div class='ctx'> </div><div class='ctx'> 	*max_num_vports = resp.max_num_vports;</div><div class='ctx'> </div><div class='del'>-	if (resp.hdr.response.msg_version == GDMA_MESSAGE_V2)</div><div class='add'>+	if (resp.hdr.response.msg_version &gt;= GDMA_MESSAGE_V2)</div><div class='ctx'> 		gc-&gt;adapter_mtu = resp.adapter_mtu;</div><div class='ctx'> 	else</div><div class='ctx'> 		gc-&gt;adapter_mtu = ETH_FRAME_LEN;</div><div class='ctx'> </div><div class='add'>+	if (resp.hdr.response.msg_version &gt;= GDMA_MESSAGE_V3)</div><div class='add'>+		*bm_hostmode = resp.bm_hostmode;</div><div class='add'>+	else</div><div class='add'>+		*bm_hostmode = 0;</div><div class='add'>+</div><div class='ctx'> 	debugfs_create_u16("adapter-MTU", 0400, gc-&gt;mana_pci_debugfs, &amp;gc-&gt;adapter_mtu);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1022,7 +1227,7 @@ void mana_uncfg_vport(struct mana_port_context *apc)</div><div class='ctx'> 	WARN_ON(apc-&gt;vport_use_count &lt; 0);</div><div class='ctx'> 	mutex_unlock(&amp;apc-&gt;vport_mutex);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_uncfg_vport, NET_MANA);</div><div class='add'>+EXPORT_SYMBOL_NS(mana_uncfg_vport, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> int mana_cfg_vport(struct mana_port_context *apc, u32 protection_dom_id,</div><div class='ctx'> 		   u32 doorbell_pg_id)</div><div class='hunk'>@@ -1092,7 +1297,7 @@ out:</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_cfg_vport, NET_MANA);</div><div class='add'>+EXPORT_SYMBOL_NS(mana_cfg_vport, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> static int mana_cfg_vport_steering(struct mana_port_context *apc,</div><div class='ctx'> 				   enum TRI_STATE rx,</div><div class='hunk'>@@ -1137,7 +1342,9 @@ static int mana_cfg_vport_steering(struct mana_port_context *apc,</div><div class='ctx'> 	err = mana_send_request(apc-&gt;ac, req, req_buf_size, &amp;resp,</div><div class='ctx'> 				sizeof(resp));</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_err(ndev, "Failed to configure vPort RX: %d\n", err);</div><div class='add'>+		if (mana_en_need_log(apc, err))</div><div class='add'>+			netdev_err(ndev, "Failed to configure vPort RX: %d\n", err);</div><div class='add'>+</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1161,6 +1368,95 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int mana_query_link_cfg(struct mana_port_context *apc)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = apc-&gt;ndev;</div><div class='add'>+	struct mana_query_link_config_resp resp = {};</div><div class='add'>+	struct mana_query_link_config_req req = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mana_gd_init_req_hdr(&amp;req.hdr, MANA_QUERY_LINK_CONFIG,</div><div class='add'>+			     sizeof(req), sizeof(resp));</div><div class='add'>+</div><div class='add'>+	req.vport = apc-&gt;port_handle;</div><div class='add'>+	req.hdr.resp.msg_version = GDMA_MESSAGE_V2;</div><div class='add'>+</div><div class='add'>+	err = mana_send_request(apc-&gt;ac, &amp;req, sizeof(req), &amp;resp,</div><div class='add'>+				sizeof(resp));</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		if (err == -EOPNOTSUPP) {</div><div class='add'>+			netdev_info_once(ndev, "MANA_QUERY_LINK_CONFIG not supported\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+		netdev_err(ndev, "Failed to query link config: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mana_verify_resp_hdr(&amp;resp.hdr, MANA_QUERY_LINK_CONFIG,</div><div class='add'>+				   sizeof(resp));</div><div class='add'>+</div><div class='add'>+	if (err || resp.hdr.status) {</div><div class='add'>+		netdev_err(ndev, "Failed to query link config: %d, 0x%x\n", err,</div><div class='add'>+			   resp.hdr.status);</div><div class='add'>+		if (!err)</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (resp.qos_unconfigured) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	apc-&gt;speed = resp.link_speed_mbps;</div><div class='add'>+	apc-&gt;max_speed = resp.qos_speed_mbps;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mana_set_bw_clamp(struct mana_port_context *apc, u32 speed,</div><div class='add'>+		      int enable_clamping)</div><div class='add'>+{</div><div class='add'>+	struct mana_set_bw_clamp_resp resp = {};</div><div class='add'>+	struct mana_set_bw_clamp_req req = {};</div><div class='add'>+	struct net_device *ndev = apc-&gt;ndev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mana_gd_init_req_hdr(&amp;req.hdr, MANA_SET_BW_CLAMP,</div><div class='add'>+			     sizeof(req), sizeof(resp));</div><div class='add'>+	req.vport = apc-&gt;port_handle;</div><div class='add'>+	req.link_speed_mbps = speed;</div><div class='add'>+	req.enable_clamping = enable_clamping;</div><div class='add'>+</div><div class='add'>+	err = mana_send_request(apc-&gt;ac, &amp;req, sizeof(req), &amp;resp,</div><div class='add'>+				sizeof(resp));</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		if (err == -EOPNOTSUPP) {</div><div class='add'>+			netdev_info_once(ndev, "MANA_SET_BW_CLAMP not supported\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+		netdev_err(ndev, "Failed to set bandwidth clamp for speed %u, err = %d",</div><div class='add'>+			   speed, err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mana_verify_resp_hdr(&amp;resp.hdr, MANA_SET_BW_CLAMP,</div><div class='add'>+				   sizeof(resp));</div><div class='add'>+</div><div class='add'>+	if (err || resp.hdr.status) {</div><div class='add'>+		netdev_err(ndev, "Failed to set bandwidth clamp: %d, 0x%x\n", err,</div><div class='add'>+			   resp.hdr.status);</div><div class='add'>+		if (!err)</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (resp.qos_unconfigured)</div><div class='add'>+		netdev_info(ndev, "QoS is unconfigured\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mana_create_wq_obj(struct mana_port_context *apc,</div><div class='ctx'> 		       mana_handle_t vport,</div><div class='ctx'> 		       u32 wq_type, struct mana_obj_spec *wq_spec,</div><div class='hunk'>@@ -1214,7 +1510,7 @@ int mana_create_wq_obj(struct mana_port_context *apc,</div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_create_wq_obj, NET_MANA);</div><div class='add'>+EXPORT_SYMBOL_NS(mana_create_wq_obj, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> void mana_destroy_wq_obj(struct mana_port_context *apc, u32 wq_type,</div><div class='ctx'> 			 mana_handle_t wq_obj)</div><div class='hunk'>@@ -1232,7 +1528,9 @@ void mana_destroy_wq_obj(struct mana_port_context *apc, u32 wq_type,</div><div class='ctx'> 	err = mana_send_request(apc-&gt;ac, &amp;req, sizeof(req), &amp;resp,</div><div class='ctx'> 				sizeof(resp));</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_err(ndev, "Failed to destroy WQ object: %d\n", err);</div><div class='add'>+		if (mana_en_need_log(apc, err))</div><div class='add'>+			netdev_err(ndev, "Failed to destroy WQ object: %d\n", err);</div><div class='add'>+</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1242,7 +1540,7 @@ void mana_destroy_wq_obj(struct mana_port_context *apc, u32 wq_type,</div><div class='ctx'> 		netdev_err(ndev, "Failed to destroy WQ object: %d, 0x%x\n", err,</div><div class='ctx'> 			   resp.hdr.status);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_destroy_wq_obj, NET_MANA);</div><div class='add'>+EXPORT_SYMBOL_NS(mana_destroy_wq_obj, "NET_MANA");</div><div class='ctx'> </div><div class='ctx'> static void mana_destroy_eq(struct mana_context *ac)</div><div class='ctx'> {</div><div class='hunk'>@@ -1254,6 +1552,7 @@ static void mana_destroy_eq(struct mana_context *ac)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	debugfs_remove_recursive(ac-&gt;mana_eqs_debugfs);</div><div class='add'>+	ac-&gt;mana_eqs_debugfs = NULL;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; gc-&gt;max_num_queues; i++) {</div><div class='ctx'> 		eq = ac-&gt;eqs[i].eq;</div><div class='hunk'>@@ -1304,8 +1603,10 @@ static int mana_create_eq(struct mana_context *ac)</div><div class='ctx'> 	for (i = 0; i &lt; gc-&gt;max_num_queues; i++) {</div><div class='ctx'> 		spec.eq.msix_index = (i + 1) % gc-&gt;num_msix_usable;</div><div class='ctx'> 		err = mana_gd_create_mana_eq(gd, &amp;spec, &amp;ac-&gt;eqs[i].eq);</div><div class='del'>-		if (err)</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(gc-&gt;dev, "Failed to create EQ %d : %d\n", i, err);</div><div class='ctx'> 			goto out;</div><div class='add'>+		}</div><div class='ctx'> 		mana_create_eq_debugfs(ac, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1385,7 +1686,7 @@ static int mana_move_wq_tail(struct gdma_queue *wq, u32 num_units)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mana_unmap_skb(struct sk_buff *skb, struct mana_port_context *apc)</div><div class='add'>+void mana_unmap_skb(struct sk_buff *skb, struct mana_port_context *apc)</div><div class='ctx'> {</div><div class='ctx'> 	struct mana_skb_head *ash = (struct mana_skb_head *)skb-&gt;head;</div><div class='ctx'> 	struct gdma_context *gc = apc-&gt;ac-&gt;gdma_dev-&gt;gdma_context;</div><div class='hunk'>@@ -1547,8 +1848,12 @@ static struct sk_buff *mana_build_skb(struct mana_rxq *rxq, void *buf_va,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (xdp-&gt;data_hard_start) {</div><div class='add'>+		u32 metasize = xdp-&gt;data - xdp-&gt;data_meta;</div><div class='add'>+</div><div class='ctx'> 		skb_reserve(skb, xdp-&gt;data - xdp-&gt;data_hard_start);</div><div class='ctx'> 		skb_put(skb, xdp-&gt;data_end - xdp-&gt;data);</div><div class='add'>+		if (metasize)</div><div class='add'>+			skb_metadata_set(skb, metasize);</div><div class='ctx'> 		return skb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1646,8 +1951,11 @@ drop_xdp:</div><div class='ctx'> </div><div class='ctx'> drop:</div><div class='ctx'> 	if (from_pool) {</div><div class='del'>-		page_pool_recycle_direct(rxq-&gt;page_pool,</div><div class='del'>-					 virt_to_head_page(buf_va));</div><div class='add'>+		if (rxq-&gt;frag_count == 1)</div><div class='add'>+			page_pool_recycle_direct(rxq-&gt;page_pool,</div><div class='add'>+						 virt_to_head_page(buf_va));</div><div class='add'>+		else</div><div class='add'>+			page_pool_free_va(rxq-&gt;page_pool, buf_va, true);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		WARN_ON_ONCE(rxq-&gt;xdp_save_va);</div><div class='ctx'> 		/* Save for reuse */</div><div class='hunk'>@@ -1660,51 +1968,49 @@ drop:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *mana_get_rxfrag(struct mana_rxq *rxq, struct device *dev,</div><div class='del'>-			     dma_addr_t *da, bool *from_pool, bool is_napi)</div><div class='add'>+			     dma_addr_t *da, bool *from_pool)</div><div class='ctx'> {</div><div class='ctx'> 	struct page *page;</div><div class='add'>+	u32 offset;</div><div class='ctx'> 	void *va;</div><div class='del'>-</div><div class='ctx'> 	*from_pool = false;</div><div class='ctx'> </div><div class='del'>-	/* Reuse XDP dropped page if available */</div><div class='del'>-	if (rxq-&gt;xdp_save_va) {</div><div class='del'>-		va = rxq-&gt;xdp_save_va;</div><div class='del'>-		rxq-&gt;xdp_save_va = NULL;</div><div class='del'>-	} else if (rxq-&gt;alloc_size &gt; PAGE_SIZE) {</div><div class='del'>-		if (is_napi)</div><div class='del'>-			va = napi_alloc_frag(rxq-&gt;alloc_size);</div><div class='del'>-		else</div><div class='del'>-			va = netdev_alloc_frag(rxq-&gt;alloc_size);</div><div class='add'>+	/* Don't use fragments for jumbo frames or XDP where it's 1 fragment</div><div class='add'>+	 * per page.</div><div class='add'>+	 */</div><div class='add'>+	if (rxq-&gt;frag_count == 1) {</div><div class='add'>+		/* Reuse XDP dropped page if available */</div><div class='add'>+		if (rxq-&gt;xdp_save_va) {</div><div class='add'>+			va = rxq-&gt;xdp_save_va;</div><div class='add'>+			page = virt_to_head_page(va);</div><div class='add'>+			rxq-&gt;xdp_save_va = NULL;</div><div class='add'>+		} else {</div><div class='add'>+			page = page_pool_dev_alloc_pages(rxq-&gt;page_pool);</div><div class='add'>+			if (!page)</div><div class='add'>+				return NULL;</div><div class='ctx'> </div><div class='del'>-		if (!va)</div><div class='del'>-			return NULL;</div><div class='add'>+			*from_pool = true;</div><div class='add'>+			va = page_to_virt(page);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		page = virt_to_head_page(va);</div><div class='del'>-		/* Check if the frag falls back to single page */</div><div class='del'>-		if (compound_order(page) &lt; get_order(rxq-&gt;alloc_size)) {</div><div class='del'>-			put_page(page);</div><div class='add'>+		*da = dma_map_single(dev, va + rxq-&gt;headroom, rxq-&gt;datasize,</div><div class='add'>+				     DMA_FROM_DEVICE);</div><div class='add'>+		if (dma_mapping_error(dev, *da)) {</div><div class='add'>+			mana_put_rx_page(rxq, page, *from_pool);</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		page = page_pool_dev_alloc_pages(rxq-&gt;page_pool);</div><div class='del'>-		if (!page)</div><div class='del'>-			return NULL;</div><div class='ctx'> </div><div class='del'>-		*from_pool = true;</div><div class='del'>-		va = page_to_virt(page);</div><div class='add'>+		return va;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*da = dma_map_single(dev, va + rxq-&gt;headroom, rxq-&gt;datasize,</div><div class='del'>-			     DMA_FROM_DEVICE);</div><div class='del'>-	if (dma_mapping_error(dev, *da)) {</div><div class='del'>-		if (*from_pool)</div><div class='del'>-			page_pool_put_full_page(rxq-&gt;page_pool, page, false);</div><div class='del'>-		else</div><div class='del'>-			put_page(virt_to_head_page(va));</div><div class='del'>-</div><div class='add'>+	page =  page_pool_dev_alloc_frag(rxq-&gt;page_pool, &amp;offset,</div><div class='add'>+					 rxq-&gt;alloc_size);</div><div class='add'>+	if (!page)</div><div class='ctx'> 		return NULL;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	va  = page_to_virt(page) + offset;</div><div class='add'>+	*da = page_pool_get_dma_addr(page) + offset + rxq-&gt;headroom;</div><div class='add'>+	*from_pool = true;</div><div class='ctx'> </div><div class='ctx'> 	return va;</div><div class='ctx'> }</div><div class='hunk'>@@ -1718,12 +2024,12 @@ static void mana_refill_rx_oob(struct device *dev, struct mana_rxq *rxq,</div><div class='ctx'> 	dma_addr_t da;</div><div class='ctx'> 	void *va;</div><div class='ctx'> </div><div class='del'>-	va = mana_get_rxfrag(rxq, dev, &amp;da, &amp;from_pool, true);</div><div class='add'>+	va = mana_get_rxfrag(rxq, dev, &amp;da, &amp;from_pool);</div><div class='ctx'> 	if (!va)</div><div class='ctx'> 		return;</div><div class='del'>-</div><div class='del'>-	dma_unmap_single(dev, rxoob-&gt;sgl[0].address, rxq-&gt;datasize,</div><div class='del'>-			 DMA_FROM_DEVICE);</div><div class='add'>+	if (!rxoob-&gt;from_pool || rxq-&gt;frag_count == 1)</div><div class='add'>+		dma_unmap_single(dev, rxoob-&gt;sgl[0].address, rxq-&gt;datasize,</div><div class='add'>+				 DMA_FROM_DEVICE);</div><div class='ctx'> 	*old_buf = rxoob-&gt;buf_va;</div><div class='ctx'> 	*old_fp = rxoob-&gt;from_pool;</div><div class='ctx'> </div><div class='hunk'>@@ -1914,12 +2220,13 @@ static void mana_destroy_txq(struct mana_port_context *apc)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; apc-&gt;num_queues; i++) {</div><div class='ctx'> 		debugfs_remove_recursive(apc-&gt;tx_qp[i].mana_tx_debugfs);</div><div class='add'>+		apc-&gt;tx_qp[i].mana_tx_debugfs = NULL;</div><div class='ctx'> </div><div class='ctx'> 		napi = &amp;apc-&gt;tx_qp[i].tx_cq.napi;</div><div class='ctx'> 		if (apc-&gt;tx_qp[i].txq.napi_initialized) {</div><div class='ctx'> 			napi_synchronize(napi);</div><div class='del'>-			napi_disable(napi);</div><div class='del'>-			netif_napi_del(napi);</div><div class='add'>+			napi_disable_locked(napi);</div><div class='add'>+			netif_napi_del_locked(napi);</div><div class='ctx'> 			apc-&gt;tx_qp[i].txq.napi_initialized = false;</div><div class='ctx'> 		}</div><div class='ctx'> 		mana_destroy_wq_obj(apc, GDMA_SQ, apc-&gt;tx_qp[i].tx_object);</div><div class='hunk'>@@ -2071,8 +2378,9 @@ static int mana_create_txq(struct mana_port_context *apc,</div><div class='ctx'> </div><div class='ctx'> 		mana_create_txq_debugfs(apc, i);</div><div class='ctx'> </div><div class='del'>-		netif_napi_add_tx(net, &amp;cq-&gt;napi, mana_poll);</div><div class='del'>-		napi_enable(&amp;cq-&gt;napi);</div><div class='add'>+		set_bit(NAPI_STATE_NO_BUSY_POLL, &amp;cq-&gt;napi.state);</div><div class='add'>+		netif_napi_add_locked(net, &amp;cq-&gt;napi, mana_poll);</div><div class='add'>+		napi_enable_locked(&amp;cq-&gt;napi);</div><div class='ctx'> 		txq-&gt;napi_initialized = true;</div><div class='ctx'> </div><div class='ctx'> 		mana_gd_ring_cq(cq-&gt;gdma_cq, SET_ARM_BIT);</div><div class='hunk'>@@ -2080,6 +2388,8 @@ static int mana_create_txq(struct mana_port_context *apc,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> out:</div><div class='add'>+	netdev_err(net, "Failed to create %d TX queues, %d\n",</div><div class='add'>+		   apc-&gt;num_queues, err);</div><div class='ctx'> 	mana_destroy_txq(apc);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -2099,15 +2409,15 @@ static void mana_destroy_rxq(struct mana_port_context *apc,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	debugfs_remove_recursive(rxq-&gt;mana_rx_debugfs);</div><div class='add'>+	rxq-&gt;mana_rx_debugfs = NULL;</div><div class='ctx'> </div><div class='ctx'> 	napi = &amp;rxq-&gt;rx_cq.napi;</div><div class='ctx'> </div><div class='ctx'> 	if (napi_initialized) {</div><div class='ctx'> 		napi_synchronize(napi);</div><div class='ctx'> </div><div class='del'>-		napi_disable(napi);</div><div class='del'>-</div><div class='del'>-		netif_napi_del(napi);</div><div class='add'>+		napi_disable_locked(napi);</div><div class='add'>+		netif_napi_del_locked(napi);</div><div class='ctx'> 	}</div><div class='ctx'> 	xdp_rxq_info_unreg(&amp;rxq-&gt;xdp_rxq);</div><div class='ctx'> </div><div class='hunk'>@@ -2124,15 +2434,15 @@ static void mana_destroy_rxq(struct mana_port_context *apc,</div><div class='ctx'> 		if (!rx_oob-&gt;buf_va)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		dma_unmap_single(dev, rx_oob-&gt;sgl[0].address,</div><div class='del'>-				 rx_oob-&gt;sgl[0].size, DMA_FROM_DEVICE);</div><div class='del'>-</div><div class='ctx'> 		page = virt_to_head_page(rx_oob-&gt;buf_va);</div><div class='ctx'> </div><div class='del'>-		if (rx_oob-&gt;from_pool)</div><div class='del'>-			page_pool_put_full_page(rxq-&gt;page_pool, page, false);</div><div class='del'>-		else</div><div class='del'>-			put_page(page);</div><div class='add'>+		if (rxq-&gt;frag_count == 1 || !rx_oob-&gt;from_pool) {</div><div class='add'>+			dma_unmap_single(dev, rx_oob-&gt;sgl[0].address,</div><div class='add'>+					 rx_oob-&gt;sgl[0].size, DMA_FROM_DEVICE);</div><div class='add'>+			mana_put_rx_page(rxq, page, rx_oob-&gt;from_pool);</div><div class='add'>+		} else {</div><div class='add'>+			page_pool_free_va(rxq-&gt;page_pool, rx_oob-&gt;buf_va, true);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		rx_oob-&gt;buf_va = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2156,7 +2466,7 @@ static int mana_fill_rx_oob(struct mana_recv_buf_oob *rx_oob, u32 mem_key,</div><div class='ctx'> 	if (mpc-&gt;rxbufs_pre)</div><div class='ctx'> 		va = mana_get_rxbuf_pre(rxq, &amp;da);</div><div class='ctx'> 	else</div><div class='del'>-		va = mana_get_rxfrag(rxq, dev, &amp;da, &amp;from_pool, false);</div><div class='add'>+		va = mana_get_rxfrag(rxq, dev, &amp;da, &amp;from_pool);</div><div class='ctx'> </div><div class='ctx'> 	if (!va)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -2238,10 +2548,22 @@ static int mana_create_page_pool(struct mana_rxq *rxq, struct gdma_context *gc)</div><div class='ctx'> 	struct page_pool_params pprm = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	pprm.pool_size = mpc-&gt;rx_queue_size;</div><div class='add'>+	pprm.pool_size = mpc-&gt;rx_queue_size / rxq-&gt;frag_count + 1;</div><div class='ctx'> 	pprm.nid = gc-&gt;numa_node;</div><div class='ctx'> 	pprm.napi = &amp;rxq-&gt;rx_cq.napi;</div><div class='ctx'> 	pprm.netdev = rxq-&gt;ndev;</div><div class='add'>+	pprm.order = get_order(rxq-&gt;alloc_size);</div><div class='add'>+	pprm.queue_idx = rxq-&gt;rxq_idx;</div><div class='add'>+	pprm.dev = gc-&gt;dev;</div><div class='add'>+</div><div class='add'>+	/* Let the page pool do the dma map when page sharing with multiple</div><div class='add'>+	 * fragments enabled for rx buffers.</div><div class='add'>+	 */</div><div class='add'>+	if (rxq-&gt;frag_count &gt; 1) {</div><div class='add'>+		pprm.flags =  PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;</div><div class='add'>+		pprm.max_len = PAGE_SIZE;</div><div class='add'>+		pprm.dma_dir = DMA_FROM_DEVICE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	rxq-&gt;page_pool = page_pool_create(&amp;pprm);</div><div class='ctx'> </div><div class='hunk'>@@ -2280,9 +2602,8 @@ static struct mana_rxq *mana_create_rxq(struct mana_port_context *apc,</div><div class='ctx'> 	rxq-&gt;rxq_idx = rxq_idx;</div><div class='ctx'> 	rxq-&gt;rxobj = INVALID_MANA_HANDLE;</div><div class='ctx'> </div><div class='del'>-	mana_get_rxbuf_cfg(ndev-&gt;mtu, &amp;rxq-&gt;datasize, &amp;rxq-&gt;alloc_size,</div><div class='del'>-			   &amp;rxq-&gt;headroom);</div><div class='del'>-</div><div class='add'>+	mana_get_rxbuf_cfg(apc, ndev-&gt;mtu, &amp;rxq-&gt;datasize, &amp;rxq-&gt;alloc_size,</div><div class='add'>+			   &amp;rxq-&gt;headroom, &amp;rxq-&gt;frag_count);</div><div class='ctx'> 	/* Create page pool for RX queue */</div><div class='ctx'> 	err = mana_create_page_pool(rxq, gc);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -2357,14 +2678,14 @@ static struct mana_rxq *mana_create_rxq(struct mana_port_context *apc,</div><div class='ctx'> </div><div class='ctx'> 	gc-&gt;cq_table[cq-&gt;gdma_id] = cq-&gt;gdma_cq;</div><div class='ctx'> </div><div class='del'>-	netif_napi_add_weight(ndev, &amp;cq-&gt;napi, mana_poll, 1);</div><div class='add'>+	netif_napi_add_weight_locked(ndev, &amp;cq-&gt;napi, mana_poll, 1);</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(xdp_rxq_info_reg(&amp;rxq-&gt;xdp_rxq, ndev, rxq_idx,</div><div class='ctx'> 				 cq-&gt;napi.napi_id));</div><div class='ctx'> 	WARN_ON(xdp_rxq_info_reg_mem_model(&amp;rxq-&gt;xdp_rxq, MEM_TYPE_PAGE_POOL,</div><div class='ctx'> 					   rxq-&gt;page_pool));</div><div class='ctx'> </div><div class='del'>-	napi_enable(&amp;cq-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;cq-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	mana_gd_ring_cq(cq-&gt;gdma_cq, SET_ARM_BIT);</div><div class='ctx'> out:</div><div class='hunk'>@@ -2415,6 +2736,7 @@ static int mana_add_rx_queues(struct mana_port_context *apc,</div><div class='ctx'> 		rxq = mana_create_rxq(apc, i, &amp;ac-&gt;eqs[i], ndev);</div><div class='ctx'> 		if (!rxq) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='add'>+			netdev_err(ndev, "Failed to create rxq %d : %d\n", i, err);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2448,7 +2770,7 @@ static void mana_destroy_vport(struct mana_port_context *apc)</div><div class='ctx'> 	mana_destroy_txq(apc);</div><div class='ctx'> 	mana_uncfg_vport(apc);</div><div class='ctx'> </div><div class='del'>-	if (gd-&gt;gdma_context-&gt;is_pf)</div><div class='add'>+	if (gd-&gt;gdma_context-&gt;is_pf &amp;&amp; !apc-&gt;ac-&gt;bm_hostmode)</div><div class='ctx'> 		mana_pf_deregister_hw_vport(apc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2460,7 +2782,7 @@ static int mana_create_vport(struct mana_port_context *apc,</div><div class='ctx'> </div><div class='ctx'> 	apc-&gt;default_rxobj = INVALID_MANA_HANDLE;</div><div class='ctx'> </div><div class='del'>-	if (gd-&gt;gdma_context-&gt;is_pf) {</div><div class='add'>+	if (gd-&gt;gdma_context-&gt;is_pf &amp;&amp; !apc-&gt;ac-&gt;bm_hostmode) {</div><div class='ctx'> 		err = mana_pf_register_hw_vport(apc);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='hunk'>@@ -2527,15 +2849,17 @@ int mana_config_rss(struct mana_port_context *apc, enum TRI_STATE rx,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void mana_query_gf_stats(struct mana_port_context *apc)</div><div class='add'>+int mana_query_gf_stats(struct mana_context *ac)</div><div class='ctx'> {</div><div class='add'>+	struct gdma_context *gc = ac-&gt;gdma_dev-&gt;gdma_context;</div><div class='ctx'> 	struct mana_query_gf_stat_resp resp = {};</div><div class='ctx'> 	struct mana_query_gf_stat_req req = {};</div><div class='del'>-	struct net_device *ndev = apc-&gt;ndev;</div><div class='add'>+	struct device *dev = gc-&gt;dev;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	mana_gd_init_req_hdr(&amp;req.hdr, MANA_QUERY_GF_STAT,</div><div class='ctx'> 			     sizeof(req), sizeof(resp));</div><div class='add'>+	req.hdr.resp.msg_version = GDMA_MESSAGE_V2;</div><div class='ctx'> 	req.req_stats = STATISTICS_FLAGS_RX_DISCARDS_NO_WQE |</div><div class='ctx'> 			STATISTICS_FLAGS_RX_ERRORS_VPORT_DISABLED |</div><div class='ctx'> 			STATISTICS_FLAGS_HC_RX_BYTES |</div><div class='hunk'>@@ -2564,52 +2888,136 @@ void mana_query_gf_stats(struct mana_port_context *apc)</div><div class='ctx'> 			STATISTICS_FLAGS_HC_TX_BCAST_BYTES |</div><div class='ctx'> 			STATISTICS_FLAGS_TX_ERRORS_GDMA_ERROR;</div><div class='ctx'> </div><div class='del'>-	err = mana_send_request(apc-&gt;ac, &amp;req, sizeof(req), &amp;resp,</div><div class='add'>+	err = mana_send_request(ac, &amp;req, sizeof(req), &amp;resp,</div><div class='ctx'> 				sizeof(resp));</div><div class='ctx'> 	if (err) {</div><div class='del'>-		netdev_err(ndev, "Failed to query GF stats: %d\n", err);</div><div class='del'>-		return;</div><div class='add'>+		dev_err(dev, "Failed to query GF stats: %d\n", err);</div><div class='add'>+		return err;</div><div class='ctx'> 	}</div><div class='ctx'> 	err = mana_verify_resp_hdr(&amp;resp.hdr, MANA_QUERY_GF_STAT,</div><div class='ctx'> 				   sizeof(resp));</div><div class='ctx'> 	if (err || resp.hdr.status) {</div><div class='del'>-		netdev_err(ndev, "Failed to query GF stats: %d, 0x%x\n", err,</div><div class='del'>-			   resp.hdr.status);</div><div class='del'>-		return;</div><div class='add'>+		dev_err(dev, "Failed to query GF stats: %d, 0x%x\n", err,</div><div class='add'>+			resp.hdr.status);</div><div class='add'>+		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	apc-&gt;eth_stats.hc_rx_discards_no_wqe = resp.rx_discards_nowqe;</div><div class='del'>-	apc-&gt;eth_stats.hc_rx_err_vport_disabled = resp.rx_err_vport_disabled;</div><div class='del'>-	apc-&gt;eth_stats.hc_rx_bytes = resp.hc_rx_bytes;</div><div class='del'>-	apc-&gt;eth_stats.hc_rx_ucast_pkts = resp.hc_rx_ucast_pkts;</div><div class='del'>-	apc-&gt;eth_stats.hc_rx_ucast_bytes = resp.hc_rx_ucast_bytes;</div><div class='del'>-	apc-&gt;eth_stats.hc_rx_bcast_pkts = resp.hc_rx_bcast_pkts;</div><div class='del'>-	apc-&gt;eth_stats.hc_rx_bcast_bytes = resp.hc_rx_bcast_bytes;</div><div class='del'>-	apc-&gt;eth_stats.hc_rx_mcast_pkts = resp.hc_rx_mcast_pkts;</div><div class='del'>-	apc-&gt;eth_stats.hc_rx_mcast_bytes = resp.hc_rx_mcast_bytes;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_gf_disabled = resp.tx_err_gf_disabled;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_vport_disabled = resp.tx_err_vport_disabled;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_inval_vportoffset_pkt =</div><div class='add'>+	ac-&gt;hc_stats.hc_rx_discards_no_wqe = resp.rx_discards_nowqe;</div><div class='add'>+	ac-&gt;hc_stats.hc_rx_err_vport_disabled = resp.rx_err_vport_disabled;</div><div class='add'>+	ac-&gt;hc_stats.hc_rx_bytes = resp.hc_rx_bytes;</div><div class='add'>+	ac-&gt;hc_stats.hc_rx_ucast_pkts = resp.hc_rx_ucast_pkts;</div><div class='add'>+	ac-&gt;hc_stats.hc_rx_ucast_bytes = resp.hc_rx_ucast_bytes;</div><div class='add'>+	ac-&gt;hc_stats.hc_rx_bcast_pkts = resp.hc_rx_bcast_pkts;</div><div class='add'>+	ac-&gt;hc_stats.hc_rx_bcast_bytes = resp.hc_rx_bcast_bytes;</div><div class='add'>+	ac-&gt;hc_stats.hc_rx_mcast_pkts = resp.hc_rx_mcast_pkts;</div><div class='add'>+	ac-&gt;hc_stats.hc_rx_mcast_bytes = resp.hc_rx_mcast_bytes;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_gf_disabled = resp.tx_err_gf_disabled;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_vport_disabled = resp.tx_err_vport_disabled;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_inval_vportoffset_pkt =</div><div class='ctx'> 					     resp.tx_err_inval_vport_offset_pkt;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_vlan_enforcement =</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_vlan_enforcement =</div><div class='ctx'> 					     resp.tx_err_vlan_enforcement;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_eth_type_enforcement =</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_eth_type_enforcement =</div><div class='ctx'> 					     resp.tx_err_ethtype_enforcement;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_sa_enforcement = resp.tx_err_SA_enforcement;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_sqpdid_enforcement =</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_sa_enforcement = resp.tx_err_SA_enforcement;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_sqpdid_enforcement =</div><div class='ctx'> 					     resp.tx_err_SQPDID_enforcement;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_cqpdid_enforcement =</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_cqpdid_enforcement =</div><div class='ctx'> 					     resp.tx_err_CQPDID_enforcement;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_mtu_violation = resp.tx_err_mtu_violation;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_inval_oob = resp.tx_err_inval_oob;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_bytes = resp.hc_tx_bytes;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_ucast_pkts = resp.hc_tx_ucast_pkts;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_ucast_bytes = resp.hc_tx_ucast_bytes;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_bcast_pkts = resp.hc_tx_bcast_pkts;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_bcast_bytes = resp.hc_tx_bcast_bytes;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_mcast_pkts = resp.hc_tx_mcast_pkts;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_mcast_bytes = resp.hc_tx_mcast_bytes;</div><div class='del'>-	apc-&gt;eth_stats.hc_tx_err_gdma = resp.tx_err_gdma;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_mtu_violation = resp.tx_err_mtu_violation;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_inval_oob = resp.tx_err_inval_oob;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_bytes = resp.hc_tx_bytes;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_ucast_pkts = resp.hc_tx_ucast_pkts;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_ucast_bytes = resp.hc_tx_ucast_bytes;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_bcast_pkts = resp.hc_tx_bcast_pkts;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_bcast_bytes = resp.hc_tx_bcast_bytes;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_mcast_pkts = resp.hc_tx_mcast_pkts;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_mcast_bytes = resp.hc_tx_mcast_bytes;</div><div class='add'>+	ac-&gt;hc_stats.hc_tx_err_gdma = resp.tx_err_gdma;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mana_query_phy_stats(struct mana_port_context *apc)</div><div class='add'>+{</div><div class='add'>+	struct mana_query_phy_stat_resp resp = {};</div><div class='add'>+	struct mana_query_phy_stat_req req = {};</div><div class='add'>+	struct net_device *ndev = apc-&gt;ndev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mana_gd_init_req_hdr(&amp;req.hdr, MANA_QUERY_PHY_STAT,</div><div class='add'>+			     sizeof(req), sizeof(resp));</div><div class='add'>+	err = mana_send_request(apc-&gt;ac, &amp;req, sizeof(req), &amp;resp,</div><div class='add'>+				sizeof(resp));</div><div class='add'>+	if (err)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	err = mana_verify_resp_hdr(&amp;resp.hdr, MANA_QUERY_PHY_STAT,</div><div class='add'>+				   sizeof(resp));</div><div class='add'>+	if (err || resp.hdr.status) {</div><div class='add'>+		netdev_err(ndev,</div><div class='add'>+			   "Failed to query PHY stats: %d, resp:0x%x\n",</div><div class='add'>+				err, resp.hdr.status);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Aggregate drop counters */</div><div class='add'>+	apc-&gt;phy_stats.rx_pkt_drop_phy = resp.rx_pkt_drop_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pkt_drop_phy = resp.tx_pkt_drop_phy;</div><div class='add'>+</div><div class='add'>+	/* Per TC traffic Counters */</div><div class='add'>+	apc-&gt;phy_stats.rx_pkt_tc0_phy = resp.rx_pkt_tc0_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pkt_tc0_phy = resp.tx_pkt_tc0_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pkt_tc1_phy = resp.rx_pkt_tc1_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pkt_tc1_phy = resp.tx_pkt_tc1_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pkt_tc2_phy = resp.rx_pkt_tc2_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pkt_tc2_phy = resp.tx_pkt_tc2_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pkt_tc3_phy = resp.rx_pkt_tc3_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pkt_tc3_phy = resp.tx_pkt_tc3_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pkt_tc4_phy = resp.rx_pkt_tc4_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pkt_tc4_phy = resp.tx_pkt_tc4_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pkt_tc5_phy = resp.rx_pkt_tc5_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pkt_tc5_phy = resp.tx_pkt_tc5_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pkt_tc6_phy = resp.rx_pkt_tc6_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pkt_tc6_phy = resp.tx_pkt_tc6_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pkt_tc7_phy = resp.rx_pkt_tc7_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pkt_tc7_phy = resp.tx_pkt_tc7_phy;</div><div class='add'>+</div><div class='add'>+	/* Per TC byte Counters */</div><div class='add'>+	apc-&gt;phy_stats.rx_byte_tc0_phy = resp.rx_byte_tc0_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_byte_tc0_phy = resp.tx_byte_tc0_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_byte_tc1_phy = resp.rx_byte_tc1_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_byte_tc1_phy = resp.tx_byte_tc1_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_byte_tc2_phy = resp.rx_byte_tc2_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_byte_tc2_phy = resp.tx_byte_tc2_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_byte_tc3_phy = resp.rx_byte_tc3_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_byte_tc3_phy = resp.tx_byte_tc3_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_byte_tc4_phy = resp.rx_byte_tc4_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_byte_tc4_phy = resp.tx_byte_tc4_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_byte_tc5_phy = resp.rx_byte_tc5_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_byte_tc5_phy = resp.tx_byte_tc5_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_byte_tc6_phy = resp.rx_byte_tc6_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_byte_tc6_phy = resp.tx_byte_tc6_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_byte_tc7_phy = resp.rx_byte_tc7_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_byte_tc7_phy = resp.tx_byte_tc7_phy;</div><div class='add'>+</div><div class='add'>+	/* Per TC pause Counters */</div><div class='add'>+	apc-&gt;phy_stats.rx_pause_tc0_phy = resp.rx_pause_tc0_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pause_tc0_phy = resp.tx_pause_tc0_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pause_tc1_phy = resp.rx_pause_tc1_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pause_tc1_phy = resp.tx_pause_tc1_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pause_tc2_phy = resp.rx_pause_tc2_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pause_tc2_phy = resp.tx_pause_tc2_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pause_tc3_phy = resp.rx_pause_tc3_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pause_tc3_phy = resp.tx_pause_tc3_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pause_tc4_phy = resp.rx_pause_tc4_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pause_tc4_phy = resp.tx_pause_tc4_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pause_tc5_phy = resp.rx_pause_tc5_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pause_tc5_phy = resp.tx_pause_tc5_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pause_tc6_phy = resp.rx_pause_tc6_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pause_tc6_phy = resp.tx_pause_tc6_phy;</div><div class='add'>+	apc-&gt;phy_stats.rx_pause_tc7_phy = resp.rx_pause_tc7_phy;</div><div class='add'>+	apc-&gt;phy_stats.tx_pause_tc7_phy = resp.tx_pause_tc7_phy;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mana_init_port(struct net_device *ndev)</div><div class='hunk'>@@ -2660,12 +3068,18 @@ int mana_alloc_queues(struct net_device *ndev)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = mana_create_vport(apc, ndev);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "Failed to create vPort %u : %d\n", apc-&gt;port_idx, err);</div><div class='ctx'> 		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = netif_set_real_num_tx_queues(ndev, apc-&gt;num_queues);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev,</div><div class='add'>+			   "netif_set_real_num_tx_queues () failed for ndev with num_queues %u : %d\n",</div><div class='add'>+			   apc-&gt;num_queues, err);</div><div class='ctx'> 		goto destroy_vport;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = mana_add_rx_queues(apc, ndev);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -2674,16 +3088,22 @@ int mana_alloc_queues(struct net_device *ndev)</div><div class='ctx'> 	apc-&gt;rss_state = apc-&gt;num_queues &gt; 1 ? TRI_STATE_TRUE : TRI_STATE_FALSE;</div><div class='ctx'> </div><div class='ctx'> 	err = netif_set_real_num_rx_queues(ndev, apc-&gt;num_queues);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev,</div><div class='add'>+			   "netif_set_real_num_rx_queues () failed for ndev with num_queues %u : %d\n",</div><div class='add'>+			   apc-&gt;num_queues, err);</div><div class='ctx'> 		goto destroy_vport;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mana_rss_table_init(apc);</div><div class='ctx'> </div><div class='ctx'> 	err = mana_config_rss(apc, TRI_STATE_TRUE, true, true);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "Failed to configure RSS table: %d\n", err);</div><div class='ctx'> 		goto destroy_vport;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (gd-&gt;gdma_context-&gt;is_pf) {</div><div class='add'>+	if (gd-&gt;gdma_context-&gt;is_pf &amp;&amp; !apc-&gt;ac-&gt;bm_hostmode) {</div><div class='ctx'> 		err = mana_pf_register_filter(apc);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto destroy_vport;</div><div class='hunk'>@@ -2722,9 +3142,6 @@ int mana_attach(struct net_device *ndev)</div><div class='ctx'> 	/* Ensure port state updated before txq state */</div><div class='ctx'> 	smp_wmb();</div><div class='ctx'> </div><div class='del'>-	if (apc-&gt;port_is_up)</div><div class='del'>-		netif_carrier_on(ndev);</div><div class='del'>-</div><div class='ctx'> 	netif_device_attach(ndev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2745,7 +3162,7 @@ static int mana_dealloc_queues(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	mana_chn_setxdp(apc, NULL);</div><div class='ctx'> </div><div class='del'>-	if (gd-&gt;gdma_context-&gt;is_pf)</div><div class='add'>+	if (gd-&gt;gdma_context-&gt;is_pf &amp;&amp; !apc-&gt;ac-&gt;bm_hostmode)</div><div class='ctx'> 		mana_pf_deregister_filter(apc);</div><div class='ctx'> </div><div class='ctx'> 	/* No packet can be transmitted now since apc-&gt;port_is_up is false.</div><div class='hunk'>@@ -2794,11 +3211,10 @@ static int mana_dealloc_queues(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	apc-&gt;rss_state = TRI_STATE_FALSE;</div><div class='ctx'> 	err = mana_config_rss(apc, TRI_STATE_FALSE, false, false);</div><div class='del'>-	if (err) {</div><div class='add'>+	if (err &amp;&amp; mana_en_need_log(apc, err))</div><div class='ctx'> 		netdev_err(ndev, "Failed to disable vPort: %d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+	/* Even in err case, still need to cleanup the vPort */</div><div class='ctx'> 	mana_destroy_vport(apc);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2818,12 +3234,13 @@ int mana_detach(struct net_device *ndev, bool from_close)</div><div class='ctx'> 	smp_wmb();</div><div class='ctx'> </div><div class='ctx'> 	netif_tx_disable(ndev);</div><div class='del'>-	netif_carrier_off(ndev);</div><div class='ctx'> </div><div class='ctx'> 	if (apc-&gt;port_st_save) {</div><div class='ctx'> 		err = mana_dealloc_queues(ndev);</div><div class='del'>-		if (err)</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(ndev, "%s failed to deallocate queues: %d\n", __func__, err);</div><div class='ctx'> 			return err;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!from_close) {</div><div class='hunk'>@@ -2872,6 +3289,8 @@ static int mana_probe_port(struct mana_context *ac, int port_idx,</div><div class='ctx'> 	ndev-&gt;dev_port = port_idx;</div><div class='ctx'> 	SET_NETDEV_DEV(ndev, gc-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	netif_set_tso_max_size(ndev, GSO_MAX_SIZE);</div><div class='add'>+</div><div class='ctx'> 	netif_carrier_off(ndev);</div><div class='ctx'> </div><div class='ctx'> 	netdev_rss_key_fill(apc-&gt;hashkey, MANA_HASH_KEY_SIZE);</div><div class='hunk'>@@ -2903,6 +3322,10 @@ static int mana_probe_port(struct mana_context *ac, int port_idx,</div><div class='ctx'> 		goto free_indir;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netif_carrier_on(ndev);</div><div class='add'>+</div><div class='add'>+	debugfs_create_u32("current_speed", 0400, apc-&gt;mana_port_debugfs, &amp;apc-&gt;speed);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> free_indir:</div><div class='hunk'>@@ -2935,7 +3358,7 @@ static void remove_adev(struct gdma_dev *gd)</div><div class='ctx'> 	gd-&gt;adev = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int add_adev(struct gdma_dev *gd)</div><div class='add'>+static int add_adev(struct gdma_dev *gd, const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct auxiliary_device *adev;</div><div class='ctx'> 	struct mana_adev *madev;</div><div class='hunk'>@@ -2951,7 +3374,7 @@ static int add_adev(struct gdma_dev *gd)</div><div class='ctx'> 		goto idx_fail;</div><div class='ctx'> 	adev-&gt;id = ret;</div><div class='ctx'> </div><div class='del'>-	adev-&gt;name = "rdma";</div><div class='add'>+	adev-&gt;name = name;</div><div class='ctx'> 	adev-&gt;dev.parent = gd-&gt;gdma_context-&gt;dev;</div><div class='ctx'> 	adev-&gt;dev.release = adev_release;</div><div class='ctx'> 	madev-&gt;mdev = gd;</div><div class='hunk'>@@ -2967,6 +3390,8 @@ static int add_adev(struct gdma_dev *gd)</div><div class='ctx'> 		goto add_fail;</div><div class='ctx'> </div><div class='ctx'> 	gd-&gt;adev = adev;</div><div class='add'>+	dev_dbg(gd-&gt;gdma_context-&gt;dev,</div><div class='add'>+		"Auxiliary device added successfully\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> add_fail:</div><div class='hunk'>@@ -2981,11 +3406,94 @@ idx_fail:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void mana_rdma_service_handle(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct mana_service_work *serv_work =</div><div class='add'>+		container_of(work, struct mana_service_work, work);</div><div class='add'>+	struct gdma_dev *gd = serv_work-&gt;gdma_dev;</div><div class='add'>+	struct device *dev = gd-&gt;gdma_context-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (READ_ONCE(gd-&gt;rdma_teardown))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	switch (serv_work-&gt;event) {</div><div class='add'>+	case GDMA_SERVICE_TYPE_RDMA_SUSPEND:</div><div class='add'>+		if (!gd-&gt;adev || gd-&gt;is_suspended)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		remove_adev(gd);</div><div class='add'>+		gd-&gt;is_suspended = true;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case GDMA_SERVICE_TYPE_RDMA_RESUME:</div><div class='add'>+		if (!gd-&gt;is_suspended)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		ret = add_adev(gd, "rdma");</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(dev, "Failed to add adev on resume: %d\n", ret);</div><div class='add'>+		else</div><div class='add'>+			gd-&gt;is_suspended = false;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(dev, "unknown adev service event %u\n",</div><div class='add'>+			 serv_work-&gt;event);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(serv_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mana_rdma_service_event(struct gdma_context *gc, enum gdma_service_type event)</div><div class='add'>+{</div><div class='add'>+	struct gdma_dev *gd = &amp;gc-&gt;mana_ib;</div><div class='add'>+	struct mana_service_work *serv_work;</div><div class='add'>+</div><div class='add'>+	if (gd-&gt;dev_id.type != GDMA_DEVICE_MANA_IB) {</div><div class='add'>+		/* RDMA device is not detected on pci */</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	serv_work = kzalloc(sizeof(*serv_work), GFP_ATOMIC);</div><div class='add'>+	if (!serv_work)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	serv_work-&gt;event = event;</div><div class='add'>+	serv_work-&gt;gdma_dev = gd;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;serv_work-&gt;work, mana_rdma_service_handle);</div><div class='add'>+	queue_work(gc-&gt;service_wq, &amp;serv_work-&gt;work);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MANA_GF_STATS_PERIOD (2 * HZ)</div><div class='add'>+</div><div class='add'>+static void mana_gf_stats_work_handler(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct mana_context *ac =</div><div class='add'>+		container_of(to_delayed_work(work), struct mana_context, gf_stats_work);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mana_query_gf_stats(ac);</div><div class='add'>+	if (err == -ETIMEDOUT) {</div><div class='add'>+		/* HWC timeout detected - reset stats and stop rescheduling */</div><div class='add'>+		ac-&gt;hwc_timeout_occurred = true;</div><div class='add'>+		memset(&amp;ac-&gt;hc_stats, 0, sizeof(ac-&gt;hc_stats));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	schedule_delayed_work(&amp;ac-&gt;gf_stats_work, MANA_GF_STATS_PERIOD);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int mana_probe(struct gdma_dev *gd, bool resuming)</div><div class='ctx'> {</div><div class='ctx'> 	struct gdma_context *gc = gd-&gt;gdma_context;</div><div class='ctx'> 	struct mana_context *ac = gd-&gt;driver_data;</div><div class='ctx'> 	struct device *dev = gc-&gt;dev;</div><div class='add'>+	u8 bm_hostmode = 0;</div><div class='ctx'> 	u16 num_ports = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -3008,16 +3516,22 @@ int mana_probe(struct gdma_dev *gd, bool resuming)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = mana_create_eq(ac);</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to create EQs: %d\n", err);</div><div class='ctx'> 		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = mana_query_device_cfg(ac, MANA_MAJOR_VERSION, MANA_MINOR_VERSION,</div><div class='del'>-				    MANA_MICRO_VERSION, &amp;num_ports);</div><div class='add'>+				    MANA_MICRO_VERSION, &amp;num_ports, &amp;bm_hostmode);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	ac-&gt;bm_hostmode = bm_hostmode;</div><div class='add'>+</div><div class='ctx'> 	if (!resuming) {</div><div class='ctx'> 		ac-&gt;num_ports = num_ports;</div><div class='add'>+</div><div class='add'>+		INIT_WORK(&amp;ac-&gt;link_change_work, mana_link_state_handle);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (ac-&gt;num_ports != num_ports) {</div><div class='ctx'> 			dev_err(dev, "The number of vPorts changed: %d-&gt;%d\n",</div><div class='hunk'>@@ -3025,6 +3539,8 @@ int mana_probe(struct gdma_dev *gd, bool resuming)</div><div class='ctx'> 			err = -EPROTO;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		enable_work(&amp;ac-&gt;link_change_work);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ac-&gt;num_ports == 0)</div><div class='hunk'>@@ -3063,10 +3579,20 @@ int mana_probe(struct gdma_dev *gd, bool resuming)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = add_adev(gd);</div><div class='add'>+	err = add_adev(gd, "eth");</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;ac-&gt;gf_stats_work, mana_gf_stats_work_handler);</div><div class='add'>+	schedule_delayed_work(&amp;ac-&gt;gf_stats_work, MANA_GF_STATS_PERIOD);</div><div class='add'>+</div><div class='ctx'> out:</div><div class='del'>-	if (err)</div><div class='add'>+	if (err) {</div><div class='ctx'> 		mana_remove(gd, false);</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(dev, "gd=%p, id=%u, num_ports=%d, type=%u, instance=%u\n",</div><div class='add'>+			gd, gd-&gt;dev_id.as_uint32, ac-&gt;num_ports,</div><div class='add'>+			gd-&gt;dev_id.type, gd-&gt;dev_id.instance);</div><div class='add'>+		dev_dbg(dev, "%s succeeded\n", __func__);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -3081,6 +3607,9 @@ void mana_remove(struct gdma_dev *gd, bool suspending)</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	disable_work_sync(&amp;ac-&gt;link_change_work);</div><div class='add'>+	cancel_delayed_work_sync(&amp;ac-&gt;gf_stats_work);</div><div class='add'>+</div><div class='ctx'> 	/* adev currently doesn't support suspending, always remove it */</div><div class='ctx'> 	if (gd-&gt;adev)</div><div class='ctx'> 		remove_adev(gd);</div><div class='hunk'>@@ -3128,23 +3657,68 @@ out:</div><div class='ctx'> 	gd-&gt;driver_data = NULL;</div><div class='ctx'> 	gd-&gt;gdma_context = NULL;</div><div class='ctx'> 	kfree(ac);</div><div class='add'>+	dev_dbg(dev, "%s succeeded\n", __func__);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mana_rdma_probe(struct gdma_dev *gd)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (gd-&gt;dev_id.type != GDMA_DEVICE_MANA_IB) {</div><div class='add'>+		/* RDMA device is not detected on pci */</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mana_gd_register_device(gd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = add_adev(gd, "rdma");</div><div class='add'>+	if (err)</div><div class='add'>+		mana_gd_deregister_device(gd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mana_rdma_remove(struct gdma_dev *gd)</div><div class='add'>+{</div><div class='add'>+	struct gdma_context *gc = gd-&gt;gdma_context;</div><div class='add'>+</div><div class='add'>+	if (gd-&gt;dev_id.type != GDMA_DEVICE_MANA_IB) {</div><div class='add'>+		/* RDMA device is not detected on pci */</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(gd-&gt;rdma_teardown, true);</div><div class='add'>+	flush_workqueue(gc-&gt;service_wq);</div><div class='add'>+</div><div class='add'>+	if (gd-&gt;adev)</div><div class='add'>+		remove_adev(gd);</div><div class='add'>+</div><div class='add'>+	mana_gd_deregister_device(gd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct net_device *mana_get_primary_netdev_rcu(struct mana_context *ac, u32 port_index)</div><div class='add'>+struct net_device *mana_get_primary_netdev(struct mana_context *ac,</div><div class='add'>+					   u32 port_index,</div><div class='add'>+					   netdevice_tracker *tracker)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> </div><div class='del'>-	RCU_LOCKDEP_WARN(!rcu_read_lock_held(),</div><div class='del'>-			 "Taking primary netdev without holding the RCU read lock");</div><div class='ctx'> 	if (port_index &gt;= ac-&gt;num_ports)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	/* When mana is used in netvsc, the upper netdevice should be returned. */</div><div class='del'>-	if (ac-&gt;ports[port_index]-&gt;flags &amp; IFF_SLAVE)</div><div class='del'>-		ndev = netdev_master_upper_dev_get_rcu(ac-&gt;ports[port_index]);</div><div class='del'>-	else</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+</div><div class='add'>+	/* If mana is used in netvsc, the upper netdevice should be returned. */</div><div class='add'>+	ndev = netdev_master_upper_dev_get_rcu(ac-&gt;ports[port_index]);</div><div class='add'>+</div><div class='add'>+	/* If there is no upper device, use the parent Ethernet device */</div><div class='add'>+	if (!ndev)</div><div class='ctx'> 		ndev = ac-&gt;ports[port_index];</div><div class='ctx'> </div><div class='add'>+	netdev_hold(ndev, tracker, GFP_ATOMIC);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='ctx'> 	return ndev;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_NS(mana_get_primary_netdev_rcu, NET_MANA);</div><div class='add'>+EXPORT_SYMBOL_NS(mana_get_primary_netdev, "NET_MANA");</div><div class='head'>diff --git a/drivers/net/ethernet/microsoft/mana/mana_ethtool.c b/drivers/net/ethernet/microsoft/mana/mana_ethtool.c<br/>index c419626073f5..0e2f4343ac67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/mana/mana_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/microsoft/mana/mana_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/microsoft/mana/mana_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/microsoft/mana/mana_ethtool.c</a></div><div class='hunk'>@@ -7,72 +7,132 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/mana/mana.h&gt;</div><div class='ctx'> </div><div class='del'>-static const struct {</div><div class='add'>+struct mana_stats_desc {</div><div class='ctx'> 	char name[ETH_GSTRING_LEN];</div><div class='ctx'> 	u16 offset;</div><div class='del'>-} mana_eth_stats[] = {</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mana_stats_desc mana_eth_stats[] = {</div><div class='ctx'> 	{"stop_queue", offsetof(struct mana_ethtool_stats, stop_queue)},</div><div class='ctx'> 	{"wake_queue", offsetof(struct mana_ethtool_stats, wake_queue)},</div><div class='del'>-	{"hc_rx_discards_no_wqe", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"tx_cq_err", offsetof(struct mana_ethtool_stats, tx_cqe_err)},</div><div class='add'>+	{"tx_cqe_unknown_type", offsetof(struct mana_ethtool_stats,</div><div class='add'>+					tx_cqe_unknown_type)},</div><div class='add'>+	{"tx_linear_pkt_cnt", offsetof(struct mana_ethtool_stats,</div><div class='add'>+				       tx_linear_pkt_cnt)},</div><div class='add'>+	{"rx_coalesced_err", offsetof(struct mana_ethtool_stats,</div><div class='add'>+					rx_coalesced_err)},</div><div class='add'>+	{"rx_cqe_unknown_type", offsetof(struct mana_ethtool_stats,</div><div class='add'>+					rx_cqe_unknown_type)},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mana_stats_desc mana_hc_stats[] = {</div><div class='add'>+	{"hc_rx_discards_no_wqe", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					   hc_rx_discards_no_wqe)},</div><div class='del'>-	{"hc_rx_err_vport_disabled", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_rx_err_vport_disabled", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					      hc_rx_err_vport_disabled)},</div><div class='del'>-	{"hc_rx_bytes", offsetof(struct mana_ethtool_stats, hc_rx_bytes)},</div><div class='del'>-	{"hc_rx_ucast_pkts", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_rx_bytes", offsetof(struct mana_ethtool_hc_stats, hc_rx_bytes)},</div><div class='add'>+	{"hc_rx_ucast_pkts", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 				      hc_rx_ucast_pkts)},</div><div class='del'>-	{"hc_rx_ucast_bytes", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_rx_ucast_bytes", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 				       hc_rx_ucast_bytes)},</div><div class='del'>-	{"hc_rx_bcast_pkts", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_rx_bcast_pkts", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 				      hc_rx_bcast_pkts)},</div><div class='del'>-	{"hc_rx_bcast_bytes", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_rx_bcast_bytes", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 				       hc_rx_bcast_bytes)},</div><div class='del'>-	{"hc_rx_mcast_pkts", offsetof(struct mana_ethtool_stats,</div><div class='del'>-			hc_rx_mcast_pkts)},</div><div class='del'>-	{"hc_rx_mcast_bytes", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_rx_mcast_pkts", offsetof(struct mana_ethtool_hc_stats,</div><div class='add'>+				      hc_rx_mcast_pkts)},</div><div class='add'>+	{"hc_rx_mcast_bytes", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 				       hc_rx_mcast_bytes)},</div><div class='del'>-	{"hc_tx_err_gf_disabled", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_err_gf_disabled", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					   hc_tx_err_gf_disabled)},</div><div class='del'>-	{"hc_tx_err_vport_disabled", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_err_vport_disabled", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					      hc_tx_err_vport_disabled)},</div><div class='ctx'> 	{"hc_tx_err_inval_vportoffset_pkt",</div><div class='del'>-	 offsetof(struct mana_ethtool_stats,</div><div class='add'>+	 offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 		  hc_tx_err_inval_vportoffset_pkt)},</div><div class='del'>-	{"hc_tx_err_vlan_enforcement", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_err_vlan_enforcement", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 						hc_tx_err_vlan_enforcement)},</div><div class='ctx'> 	{"hc_tx_err_eth_type_enforcement",</div><div class='del'>-	 offsetof(struct mana_ethtool_stats, hc_tx_err_eth_type_enforcement)},</div><div class='del'>-	{"hc_tx_err_sa_enforcement", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	 offsetof(struct mana_ethtool_hc_stats, hc_tx_err_eth_type_enforcement)},</div><div class='add'>+	{"hc_tx_err_sa_enforcement", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					      hc_tx_err_sa_enforcement)},</div><div class='ctx'> 	{"hc_tx_err_sqpdid_enforcement",</div><div class='del'>-	 offsetof(struct mana_ethtool_stats, hc_tx_err_sqpdid_enforcement)},</div><div class='add'>+	 offsetof(struct mana_ethtool_hc_stats, hc_tx_err_sqpdid_enforcement)},</div><div class='ctx'> 	{"hc_tx_err_cqpdid_enforcement",</div><div class='del'>-	 offsetof(struct mana_ethtool_stats, hc_tx_err_cqpdid_enforcement)},</div><div class='del'>-	{"hc_tx_err_mtu_violation", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	 offsetof(struct mana_ethtool_hc_stats, hc_tx_err_cqpdid_enforcement)},</div><div class='add'>+	{"hc_tx_err_mtu_violation", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					     hc_tx_err_mtu_violation)},</div><div class='del'>-	{"hc_tx_err_inval_oob", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_err_inval_oob", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					 hc_tx_err_inval_oob)},</div><div class='del'>-	{"hc_tx_err_gdma", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_err_gdma", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 				    hc_tx_err_gdma)},</div><div class='del'>-	{"hc_tx_bytes", offsetof(struct mana_ethtool_stats, hc_tx_bytes)},</div><div class='del'>-	{"hc_tx_ucast_pkts", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_bytes", offsetof(struct mana_ethtool_hc_stats, hc_tx_bytes)},</div><div class='add'>+	{"hc_tx_ucast_pkts", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					hc_tx_ucast_pkts)},</div><div class='del'>-	{"hc_tx_ucast_bytes", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_ucast_bytes", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					hc_tx_ucast_bytes)},</div><div class='del'>-	{"hc_tx_bcast_pkts", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_bcast_pkts", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					hc_tx_bcast_pkts)},</div><div class='del'>-	{"hc_tx_bcast_bytes", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_bcast_bytes", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					hc_tx_bcast_bytes)},</div><div class='del'>-	{"hc_tx_mcast_pkts", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_mcast_pkts", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					hc_tx_mcast_pkts)},</div><div class='del'>-	{"hc_tx_mcast_bytes", offsetof(struct mana_ethtool_stats,</div><div class='add'>+	{"hc_tx_mcast_bytes", offsetof(struct mana_ethtool_hc_stats,</div><div class='ctx'> 					hc_tx_mcast_bytes)},</div><div class='del'>-	{"tx_cq_err", offsetof(struct mana_ethtool_stats, tx_cqe_err)},</div><div class='del'>-	{"tx_cqe_unknown_type", offsetof(struct mana_ethtool_stats,</div><div class='del'>-					tx_cqe_unknown_type)},</div><div class='del'>-	{"rx_coalesced_err", offsetof(struct mana_ethtool_stats,</div><div class='del'>-					rx_coalesced_err)},</div><div class='del'>-	{"rx_cqe_unknown_type", offsetof(struct mana_ethtool_stats,</div><div class='del'>-					rx_cqe_unknown_type)},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mana_stats_desc mana_phy_stats[] = {</div><div class='add'>+	{ "hc_rx_pkt_drop_phy", offsetof(struct mana_ethtool_phy_stats, rx_pkt_drop_phy) },</div><div class='add'>+	{ "hc_tx_pkt_drop_phy", offsetof(struct mana_ethtool_phy_stats, tx_pkt_drop_phy) },</div><div class='add'>+	{ "hc_tc0_rx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, rx_pkt_tc0_phy) },</div><div class='add'>+	{ "hc_tc0_rx_byte_phy", offsetof(struct mana_ethtool_phy_stats, rx_byte_tc0_phy) },</div><div class='add'>+	{ "hc_tc0_tx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, tx_pkt_tc0_phy) },</div><div class='add'>+	{ "hc_tc0_tx_byte_phy", offsetof(struct mana_ethtool_phy_stats, tx_byte_tc0_phy) },</div><div class='add'>+	{ "hc_tc1_rx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, rx_pkt_tc1_phy) },</div><div class='add'>+	{ "hc_tc1_rx_byte_phy", offsetof(struct mana_ethtool_phy_stats, rx_byte_tc1_phy) },</div><div class='add'>+	{ "hc_tc1_tx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, tx_pkt_tc1_phy) },</div><div class='add'>+	{ "hc_tc1_tx_byte_phy", offsetof(struct mana_ethtool_phy_stats, tx_byte_tc1_phy) },</div><div class='add'>+	{ "hc_tc2_rx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, rx_pkt_tc2_phy) },</div><div class='add'>+	{ "hc_tc2_rx_byte_phy", offsetof(struct mana_ethtool_phy_stats, rx_byte_tc2_phy) },</div><div class='add'>+	{ "hc_tc2_tx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, tx_pkt_tc2_phy) },</div><div class='add'>+	{ "hc_tc2_tx_byte_phy", offsetof(struct mana_ethtool_phy_stats, tx_byte_tc2_phy) },</div><div class='add'>+	{ "hc_tc3_rx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, rx_pkt_tc3_phy) },</div><div class='add'>+	{ "hc_tc3_rx_byte_phy", offsetof(struct mana_ethtool_phy_stats, rx_byte_tc3_phy) },</div><div class='add'>+	{ "hc_tc3_tx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, tx_pkt_tc3_phy) },</div><div class='add'>+	{ "hc_tc3_tx_byte_phy", offsetof(struct mana_ethtool_phy_stats, tx_byte_tc3_phy) },</div><div class='add'>+	{ "hc_tc4_rx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, rx_pkt_tc4_phy) },</div><div class='add'>+	{ "hc_tc4_rx_byte_phy", offsetof(struct mana_ethtool_phy_stats, rx_byte_tc4_phy) },</div><div class='add'>+	{ "hc_tc4_tx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, tx_pkt_tc4_phy) },</div><div class='add'>+	{ "hc_tc4_tx_byte_phy", offsetof(struct mana_ethtool_phy_stats, tx_byte_tc4_phy) },</div><div class='add'>+	{ "hc_tc5_rx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, rx_pkt_tc5_phy) },</div><div class='add'>+	{ "hc_tc5_rx_byte_phy", offsetof(struct mana_ethtool_phy_stats, rx_byte_tc5_phy) },</div><div class='add'>+	{ "hc_tc5_tx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, tx_pkt_tc5_phy) },</div><div class='add'>+	{ "hc_tc5_tx_byte_phy", offsetof(struct mana_ethtool_phy_stats, tx_byte_tc5_phy) },</div><div class='add'>+	{ "hc_tc6_rx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, rx_pkt_tc6_phy) },</div><div class='add'>+	{ "hc_tc6_rx_byte_phy", offsetof(struct mana_ethtool_phy_stats, rx_byte_tc6_phy) },</div><div class='add'>+	{ "hc_tc6_tx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, tx_pkt_tc6_phy) },</div><div class='add'>+	{ "hc_tc6_tx_byte_phy", offsetof(struct mana_ethtool_phy_stats, tx_byte_tc6_phy) },</div><div class='add'>+	{ "hc_tc7_rx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, rx_pkt_tc7_phy) },</div><div class='add'>+	{ "hc_tc7_rx_byte_phy", offsetof(struct mana_ethtool_phy_stats, rx_byte_tc7_phy) },</div><div class='add'>+	{ "hc_tc7_tx_pkt_phy", offsetof(struct mana_ethtool_phy_stats, tx_pkt_tc7_phy) },</div><div class='add'>+	{ "hc_tc7_tx_byte_phy", offsetof(struct mana_ethtool_phy_stats, tx_byte_tc7_phy) },</div><div class='add'>+	{ "hc_tc0_rx_pause_phy", offsetof(struct mana_ethtool_phy_stats, rx_pause_tc0_phy) },</div><div class='add'>+	{ "hc_tc0_tx_pause_phy", offsetof(struct mana_ethtool_phy_stats, tx_pause_tc0_phy) },</div><div class='add'>+	{ "hc_tc1_rx_pause_phy", offsetof(struct mana_ethtool_phy_stats, rx_pause_tc1_phy) },</div><div class='add'>+	{ "hc_tc1_tx_pause_phy", offsetof(struct mana_ethtool_phy_stats, tx_pause_tc1_phy) },</div><div class='add'>+	{ "hc_tc2_rx_pause_phy", offsetof(struct mana_ethtool_phy_stats, rx_pause_tc2_phy) },</div><div class='add'>+	{ "hc_tc2_tx_pause_phy", offsetof(struct mana_ethtool_phy_stats, tx_pause_tc2_phy) },</div><div class='add'>+	{ "hc_tc3_rx_pause_phy", offsetof(struct mana_ethtool_phy_stats, rx_pause_tc3_phy) },</div><div class='add'>+	{ "hc_tc3_tx_pause_phy", offsetof(struct mana_ethtool_phy_stats, tx_pause_tc3_phy) },</div><div class='add'>+	{ "hc_tc4_rx_pause_phy", offsetof(struct mana_ethtool_phy_stats, rx_pause_tc4_phy) },</div><div class='add'>+	{ "hc_tc4_tx_pause_phy", offsetof(struct mana_ethtool_phy_stats, tx_pause_tc4_phy) },</div><div class='add'>+	{ "hc_tc5_rx_pause_phy", offsetof(struct mana_ethtool_phy_stats, rx_pause_tc5_phy) },</div><div class='add'>+	{ "hc_tc5_tx_pause_phy", offsetof(struct mana_ethtool_phy_stats, tx_pause_tc5_phy) },</div><div class='add'>+	{ "hc_tc6_rx_pause_phy", offsetof(struct mana_ethtool_phy_stats, rx_pause_tc6_phy) },</div><div class='add'>+	{ "hc_tc6_tx_pause_phy", offsetof(struct mana_ethtool_phy_stats, tx_pause_tc6_phy) },</div><div class='add'>+	{ "hc_tc7_rx_pause_phy", offsetof(struct mana_ethtool_phy_stats, rx_pause_tc7_phy) },</div><div class='add'>+	{ "hc_tc7_tx_pause_phy", offsetof(struct mana_ethtool_phy_stats, tx_pause_tc7_phy) },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int mana_get_sset_count(struct net_device *ndev, int stringset)</div><div class='hunk'>@@ -83,8 +143,8 @@ static int mana_get_sset_count(struct net_device *ndev, int stringset)</div><div class='ctx'> 	if (stringset != ETH_SS_STATS)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return ARRAY_SIZE(mana_eth_stats) + num_queues *</div><div class='del'>-				(MANA_STATS_RX_COUNT + MANA_STATS_TX_COUNT);</div><div class='add'>+	return ARRAY_SIZE(mana_eth_stats) + ARRAY_SIZE(mana_phy_stats) + ARRAY_SIZE(mana_hc_stats) +</div><div class='add'>+			num_queues * (MANA_STATS_RX_COUNT + MANA_STATS_TX_COUNT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mana_get_strings(struct net_device *ndev, u32 stringset, u8 *data)</div><div class='hunk'>@@ -95,10 +155,15 @@ static void mana_get_strings(struct net_device *ndev, u32 stringset, u8 *data)</div><div class='ctx'> </div><div class='ctx'> 	if (stringset != ETH_SS_STATS)</div><div class='ctx'> 		return;</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(mana_eth_stats); i++)</div><div class='ctx'> 		ethtool_puts(&amp;data, mana_eth_stats[i].name);</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mana_hc_stats); i++)</div><div class='add'>+		ethtool_puts(&amp;data, mana_hc_stats[i].name);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mana_phy_stats); i++)</div><div class='add'>+		ethtool_puts(&amp;data, mana_phy_stats[i].name);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; num_queues; i++) {</div><div class='ctx'> 		ethtool_sprintf(&amp;data, "rx_%d_packets", i);</div><div class='ctx'> 		ethtool_sprintf(&amp;data, "rx_%d_bytes", i);</div><div class='hunk'>@@ -128,6 +193,8 @@ static void mana_get_ethtool_stats(struct net_device *ndev,</div><div class='ctx'> 	struct mana_port_context *apc = netdev_priv(ndev);</div><div class='ctx'> 	unsigned int num_queues = apc-&gt;num_queues;</div><div class='ctx'> 	void *eth_stats = &amp;apc-&gt;eth_stats;</div><div class='add'>+	void *hc_stats = &amp;apc-&gt;ac-&gt;hc_stats;</div><div class='add'>+	void *phy_stats = &amp;apc-&gt;phy_stats;</div><div class='ctx'> 	struct mana_stats_rx *rx_stats;</div><div class='ctx'> 	struct mana_stats_tx *tx_stats;</div><div class='ctx'> 	unsigned int start;</div><div class='hunk'>@@ -148,12 +215,22 @@ static void mana_get_ethtool_stats(struct net_device *ndev,</div><div class='ctx'> </div><div class='ctx'> 	if (!apc-&gt;port_is_up)</div><div class='ctx'> 		return;</div><div class='del'>-	/* we call mana function to update stats from GDMA */</div><div class='del'>-	mana_query_gf_stats(apc);</div><div class='add'>+</div><div class='add'>+	/* We call this mana function to get the phy stats from GDMA and includes</div><div class='add'>+	 * aggregate tx/rx drop counters, Per-TC(Traffic Channel) tx/rx and pause</div><div class='add'>+	 * counters.</div><div class='add'>+	 */</div><div class='add'>+	mana_query_phy_stats(apc);</div><div class='ctx'> </div><div class='ctx'> 	for (q = 0; q &lt; ARRAY_SIZE(mana_eth_stats); q++)</div><div class='ctx'> 		data[i++] = *(u64 *)(eth_stats + mana_eth_stats[q].offset);</div><div class='ctx'> </div><div class='add'>+	for (q = 0; q &lt; ARRAY_SIZE(mana_hc_stats); q++)</div><div class='add'>+		data[i++] = *(u64 *)(hc_stats + mana_hc_stats[q].offset);</div><div class='add'>+</div><div class='add'>+	for (q = 0; q &lt; ARRAY_SIZE(mana_phy_stats); q++)</div><div class='add'>+		data[i++] = *(u64 *)(phy_stats + mana_phy_stats[q].offset);</div><div class='add'>+</div><div class='ctx'> 	for (q = 0; q &lt; num_queues; q++) {</div><div class='ctx'> 		rx_stats = &amp;apc-&gt;rxqs[q]-&gt;stats;</div><div class='ctx'> </div><div class='hunk'>@@ -427,6 +504,12 @@ out:</div><div class='ctx'> static int mana_get_link_ksettings(struct net_device *ndev,</div><div class='ctx'> 				   struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct mana_port_context *apc = netdev_priv(ndev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mana_query_link_cfg(apc);</div><div class='add'>+	cmd-&gt;base.speed = (err) ? SPEED_UNKNOWN : apc-&gt;max_speed;</div><div class='add'>+</div><div class='ctx'> 	cmd-&gt;base.duplex = DUPLEX_FULL;</div><div class='ctx'> 	cmd-&gt;base.port = PORT_OTHER;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c<br/>index 3d72aa7b1305..08bee56aea35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mscc/ocelot.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mscc/ocelot.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mscc/ocelot.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mscc/ocelot.c</a></div><div class='hunk'>@@ -830,6 +830,7 @@ EXPORT_SYMBOL(ocelot_vlan_prepare);</div><div class='ctx'> int ocelot_vlan_add(struct ocelot *ocelot, int port, u16 vid, bool pvid,</div><div class='ctx'> 		    bool untagged)</div><div class='ctx'> {</div><div class='add'>+	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* Ignore VID 0 added to our RX filter by the 8021q module, since</div><div class='hunk'>@@ -849,6 +850,11 @@ int ocelot_vlan_add(struct ocelot *ocelot, int port, u16 vid, bool pvid,</div><div class='ctx'> 					   ocelot_bridge_vlan_find(ocelot, vid));</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='add'>+	} else if (ocelot_port-&gt;pvid_vlan &amp;&amp;</div><div class='add'>+		   ocelot_bridge_vlan_find(ocelot, vid) == ocelot_port-&gt;pvid_vlan) {</div><div class='add'>+		err = ocelot_port_set_pvid(ocelot, port, NULL);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Untagged egress vlan clasification */</div><div class='hunk'>@@ -1432,7 +1438,7 @@ void ocelot_ifh_set_basic(void *ifh, struct ocelot *ocelot, int port,</div><div class='ctx'> </div><div class='ctx'> 	memset(ifh, 0, OCELOT_TAG_LEN);</div><div class='ctx'> 	ocelot_ifh_set_bypass(ifh, 1);</div><div class='del'>-	ocelot_ifh_set_src(ifh, BIT_ULL(ocelot-&gt;num_phys_ports));</div><div class='add'>+	ocelot_ifh_set_src(ifh, ocelot-&gt;num_phys_ports);</div><div class='ctx'> 	ocelot_ifh_set_dest(ifh, BIT_ULL(port));</div><div class='ctx'> 	ocelot_ifh_set_qos_class(ifh, qos_class);</div><div class='ctx'> 	ocelot_ifh_set_tag_type(ifh, tag_type);</div><div class='head'>diff --git a/drivers/net/ethernet/mscc/ocelot_net.c b/drivers/net/ethernet/mscc/ocelot_net.c<br/>index 7c9540a71725..469784d3a1a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mscc/ocelot_net.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mscc/ocelot_net.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mscc/ocelot_net.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mscc/ocelot_net.c</a></div><div class='hunk'>@@ -730,7 +730,7 @@ static void ocelot_get_stats64(struct net_device *dev,</div><div class='ctx'> static int ocelot_port_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			       struct net_device *dev,</div><div class='ctx'> 			       const unsigned char *addr,</div><div class='del'>-			       u16 vid, u16 flags,</div><div class='add'>+			       u16 vid, u16 flags, bool *notified,</div><div class='ctx'> 			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ocelot_port_private *priv = netdev_priv(dev);</div><div class='hunk'>@@ -744,7 +744,7 @@ static int ocelot_port_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> static int ocelot_port_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			       struct net_device *dev,</div><div class='ctx'> 			       const unsigned char *addr, u16 vid,</div><div class='del'>-			       struct netlink_ext_ack *extack)</div><div class='add'>+			       bool *notified, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ocelot_port_private *priv = netdev_priv(dev);</div><div class='ctx'> 	struct ocelot_port *ocelot_port = &amp;priv-&gt;port;</div><div class='hunk'>@@ -758,12 +758,13 @@ static int ocelot_port_fdb_do_dump(const unsigned char *addr, u16 vid,</div><div class='ctx'> 				   bool is_static, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct ocelot_dump_ctx *dump = data;</div><div class='add'>+	struct ndo_fdb_dump_context *ctx = (void *)dump-&gt;cb-&gt;ctx;</div><div class='ctx'> 	u32 portid = NETLINK_CB(dump-&gt;cb-&gt;skb).portid;</div><div class='ctx'> 	u32 seq = dump-&gt;cb-&gt;nlh-&gt;nlmsg_seq;</div><div class='ctx'> 	struct nlmsghdr *nlh;</div><div class='ctx'> 	struct ndmsg *ndm;</div><div class='ctx'> </div><div class='del'>-	if (dump-&gt;idx &lt; dump-&gt;cb-&gt;args[2])</div><div class='add'>+	if (dump-&gt;idx &lt; ctx-&gt;fdb_idx)</div><div class='ctx'> 		goto skip;</div><div class='ctx'> </div><div class='ctx'> 	nlh = nlmsg_put(dump-&gt;skb, portid, seq, RTM_NEWNEIGH,</div><div class='hunk'>@@ -869,23 +870,30 @@ static int ocelot_set_features(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> static int ocelot_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='ctx'> {</div><div class='add'>+	return phy_mii_ioctl(dev-&gt;phydev, ifr, cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocelot_port_hwtstamp_get(struct net_device *dev,</div><div class='add'>+				    struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='ctx'> 	struct ocelot_port_private *priv = netdev_priv(dev);</div><div class='ctx'> 	struct ocelot *ocelot = priv-&gt;port.ocelot;</div><div class='ctx'> 	int port = priv-&gt;port.index;</div><div class='ctx'> </div><div class='del'>-	/* If the attached PHY device isn't capable of timestamping operations,</div><div class='del'>-	 * use our own (when possible).</div><div class='del'>-	 */</div><div class='del'>-	if (!phy_has_hwtstamp(dev-&gt;phydev) &amp;&amp; ocelot-&gt;ptp) {</div><div class='del'>-		switch (cmd) {</div><div class='del'>-		case SIOCSHWTSTAMP:</div><div class='del'>-			return ocelot_hwstamp_set(ocelot, port, ifr);</div><div class='del'>-		case SIOCGHWTSTAMP:</div><div class='del'>-			return ocelot_hwstamp_get(ocelot, port, ifr);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	ocelot_hwstamp_get(ocelot, port, cfg);</div><div class='ctx'> </div><div class='del'>-	return phy_mii_ioctl(dev-&gt;phydev, ifr, cmd);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ocelot_port_hwtstamp_set(struct net_device *dev,</div><div class='add'>+				    struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_port_private *priv = netdev_priv(dev);</div><div class='add'>+	struct ocelot *ocelot = priv-&gt;port.ocelot;</div><div class='add'>+	int port = priv-&gt;port.index;</div><div class='add'>+</div><div class='add'>+	return ocelot_hwstamp_set(ocelot, port, cfg, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ocelot_change_mtu(struct net_device *dev, int new_mtu)</div><div class='hunk'>@@ -916,6 +924,8 @@ static const struct net_device_ops ocelot_port_netdev_ops = {</div><div class='ctx'> 	.ndo_set_features		= ocelot_set_features,</div><div class='ctx'> 	.ndo_setup_tc			= ocelot_setup_tc,</div><div class='ctx'> 	.ndo_eth_ioctl			= ocelot_ioctl,</div><div class='add'>+	.ndo_hwtstamp_get		= ocelot_port_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set		= ocelot_port_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct net_device *ocelot_port_to_netdev(struct ocelot *ocelot, int port)</div><div class='hunk'>@@ -992,6 +1002,16 @@ static int ocelot_port_get_ts_info(struct net_device *dev,</div><div class='ctx'> 	return ocelot_get_ts_info(ocelot, port, info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ocelot_port_ts_stats(struct net_device *dev,</div><div class='add'>+				 struct ethtool_ts_stats *ts_stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_port_private *priv = netdev_priv(dev);</div><div class='add'>+	struct ocelot *ocelot = priv-&gt;port.ocelot;</div><div class='add'>+	int port = priv-&gt;port.index;</div><div class='add'>+</div><div class='add'>+	ocelot_port_get_ts_stats(ocelot, port, ts_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops ocelot_ethtool_ops = {</div><div class='ctx'> 	.get_strings		= ocelot_port_get_strings,</div><div class='ctx'> 	.get_ethtool_stats	= ocelot_port_get_ethtool_stats,</div><div class='hunk'>@@ -999,6 +1019,7 @@ static const struct ethtool_ops ocelot_ethtool_ops = {</div><div class='ctx'> 	.get_link_ksettings	= phy_ethtool_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings	= phy_ethtool_set_link_ksettings,</div><div class='ctx'> 	.get_ts_info		= ocelot_port_get_ts_info,</div><div class='add'>+	.get_ts_stats		= ocelot_port_ts_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void ocelot_port_attr_stp_state_set(struct ocelot *ocelot, int port,</div><div class='head'>diff --git a/drivers/net/ethernet/mscc/ocelot_ptp.c b/drivers/net/ethernet/mscc/ocelot_ptp.c<br/>index e172638b0601..88b5422cc2a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mscc/ocelot_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mscc/ocelot_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mscc/ocelot_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mscc/ocelot_ptp.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'> #include &lt;soc/mscc/ocelot.h&gt;</div><div class='ctx'> #include "ocelot.h"</div><div class='ctx'> </div><div class='add'>+#define OCELOT_PTP_TX_TSTAMP_TIMEOUT		(5 * HZ)</div><div class='add'>+</div><div class='ctx'> int ocelot_ptp_gettime64(struct ptp_clock_info *ptp, struct timespec64 *ts)</div><div class='ctx'> {</div><div class='ctx'> 	struct ocelot *ocelot = container_of(ptp, struct ocelot, ptp_info);</div><div class='hunk'>@@ -209,11 +211,6 @@ int ocelot_ptp_enable(struct ptp_clock_info *ptp,</div><div class='ctx'> </div><div class='ctx'> 	switch (rq-&gt;type) {</div><div class='ctx'> 	case PTP_CLK_REQ_PEROUT:</div><div class='del'>-		/* Reject requests with unsupported flags */</div><div class='del'>-		if (rq-&gt;perout.flags &amp; ~(PTP_PEROUT_DUTY_CYCLE |</div><div class='del'>-					 PTP_PEROUT_PHASE))</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 		pin = ptp_find_pin(ocelot-&gt;ptp_clock, PTP_PF_PEROUT,</div><div class='ctx'> 				   rq-&gt;perout.index);</div><div class='ctx'> 		if (pin == 0)</div><div class='hunk'>@@ -495,58 +492,64 @@ static int ocelot_traps_to_ptp_rx_filter(unsigned int proto)</div><div class='ctx'> 	return HWTSTAMP_FILTER_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ocelot_hwstamp_get(struct ocelot *ocelot, int port, struct ifreq *ifr)</div><div class='add'>+static int ocelot_ptp_tx_type_to_cmd(int tx_type, int *ptp_cmd)</div><div class='add'>+{</div><div class='add'>+	switch (tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		*ptp_cmd = IFH_REW_OP_TWO_STEP_PTP;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_TX_ONESTEP_SYNC:</div><div class='add'>+		/* IFH_REW_OP_ONE_STEP_PTP updates the correctionField,</div><div class='add'>+		 * what we need to update is the originTimestamp.</div><div class='add'>+		 */</div><div class='add'>+		*ptp_cmd = IFH_REW_OP_ORIGIN_PTP;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		*ptp_cmd = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ocelot_hwstamp_get(struct ocelot *ocelot, int port,</div><div class='add'>+			struct kernel_hwtstamp_config *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='del'>-	struct hwtstamp_config cfg = {};</div><div class='ctx'> </div><div class='ctx'> 	switch (ocelot_port-&gt;ptp_cmd) {</div><div class='ctx'> 	case IFH_REW_OP_TWO_STEP_PTP:</div><div class='del'>-		cfg.tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+		cfg-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case IFH_REW_OP_ORIGIN_PTP:</div><div class='del'>-		cfg.tx_type = HWTSTAMP_TX_ONESTEP_SYNC;</div><div class='add'>+		cfg-&gt;tx_type = HWTSTAMP_TX_ONESTEP_SYNC;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		cfg.tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+		cfg-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cfg.rx_filter = ocelot_traps_to_ptp_rx_filter(ocelot_port-&gt;trap_proto);</div><div class='del'>-</div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	cfg-&gt;rx_filter = ocelot_traps_to_ptp_rx_filter(ocelot_port-&gt;trap_proto);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ocelot_hwstamp_get);</div><div class='ctx'> </div><div class='del'>-int ocelot_hwstamp_set(struct ocelot *ocelot, int port, struct ifreq *ifr)</div><div class='add'>+int ocelot_hwstamp_set(struct ocelot *ocelot, int port,</div><div class='add'>+		       struct kernel_hwtstamp_config *cfg,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='ctx'> 	bool l2 = false, l4 = false;</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='add'>+	int ptp_cmd;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='ctx'> 	/* Tx type sanity check */</div><div class='del'>-	switch (cfg.tx_type) {</div><div class='del'>-	case HWTSTAMP_TX_ON:</div><div class='del'>-		ocelot_port-&gt;ptp_cmd = IFH_REW_OP_TWO_STEP_PTP;</div><div class='del'>-		break;</div><div class='del'>-	case HWTSTAMP_TX_ONESTEP_SYNC:</div><div class='del'>-		/* IFH_REW_OP_ONE_STEP_PTP updates the correctional field, we</div><div class='del'>-		 * need to update the origin time.</div><div class='del'>-		 */</div><div class='del'>-		ocelot_port-&gt;ptp_cmd = IFH_REW_OP_ORIGIN_PTP;</div><div class='del'>-		break;</div><div class='del'>-	case HWTSTAMP_TX_OFF:</div><div class='del'>-		ocelot_port-&gt;ptp_cmd = 0;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -ERANGE;</div><div class='del'>-	}</div><div class='add'>+	err = ocelot_ptp_tx_type_to_cmd(cfg-&gt;tx_type, &amp;ptp_cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	switch (cfg.rx_filter) {</div><div class='add'>+	switch (cfg-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='hunk'>@@ -573,9 +576,11 @@ int ocelot_hwstamp_set(struct ocelot *ocelot, int port, struct ifreq *ifr)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	cfg.rx_filter = ocelot_traps_to_ptp_rx_filter(ocelot_port-&gt;trap_proto);</div><div class='add'>+	ocelot_port-&gt;ptp_cmd = ptp_cmd;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	cfg-&gt;rx_filter = ocelot_traps_to_ptp_rx_filter(ocelot_port-&gt;trap_proto);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ocelot_hwstamp_set);</div><div class='ctx'> </div><div class='hunk'>@@ -603,34 +608,92 @@ int ocelot_get_ts_info(struct ocelot *ocelot, int port,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ocelot_get_ts_info);</div><div class='ctx'> </div><div class='del'>-static int ocelot_port_add_txtstamp_skb(struct ocelot *ocelot, int port,</div><div class='del'>-					struct sk_buff *clone)</div><div class='add'>+static struct sk_buff *ocelot_port_dequeue_ptp_tx_skb(struct ocelot *ocelot,</div><div class='add'>+						      int port, u8 ts_id,</div><div class='add'>+						      u32 seqid)</div><div class='ctx'> {</div><div class='ctx'> 	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	struct sk_buff *skb, *skb_tmp, *skb_match = NULL;</div><div class='add'>+	struct ptp_header *hdr;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;ocelot-&gt;ts_id_lock, flags);</div><div class='add'>+	spin_lock(&amp;ocelot-&gt;ts_id_lock);</div><div class='ctx'> </div><div class='del'>-	if (ocelot_port-&gt;ptp_skbs_in_flight == OCELOT_MAX_PTP_ID ||</div><div class='del'>-	    ocelot-&gt;ptp_skbs_in_flight == OCELOT_PTP_FIFO_SIZE) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;ocelot-&gt;ts_id_lock, flags);</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	skb_queue_walk_safe(&amp;ocelot_port-&gt;tx_skbs, skb, skb_tmp) {</div><div class='add'>+		if (OCELOT_SKB_CB(skb)-&gt;ts_id != ts_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Check that the timestamp ID is for the expected PTP</div><div class='add'>+		 * sequenceId. We don't have to test ptp_parse_header() against</div><div class='add'>+		 * NULL, because we've pre-validated the packet's ptp_class.</div><div class='add'>+		 */</div><div class='add'>+		hdr = ptp_parse_header(skb, OCELOT_SKB_CB(skb)-&gt;ptp_class);</div><div class='add'>+		if (seqid != ntohs(hdr-&gt;sequence_id))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		__skb_unlink(skb, &amp;ocelot_port-&gt;tx_skbs);</div><div class='add'>+		ocelot-&gt;ptp_skbs_in_flight--;</div><div class='add'>+		skb_match = skb;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	skb_shinfo(clone)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='del'>-	/* Store timestamp ID in OCELOT_SKB_CB(clone)-&gt;ts_id */</div><div class='del'>-	OCELOT_SKB_CB(clone)-&gt;ts_id = ocelot_port-&gt;ts_id;</div><div class='add'>+	spin_unlock(&amp;ocelot-&gt;ts_id_lock);</div><div class='ctx'> </div><div class='del'>-	ocelot_port-&gt;ts_id++;</div><div class='del'>-	if (ocelot_port-&gt;ts_id == OCELOT_MAX_PTP_ID)</div><div class='del'>-		ocelot_port-&gt;ts_id = 0;</div><div class='add'>+	return skb_match;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	ocelot_port-&gt;ptp_skbs_in_flight++;</div><div class='add'>+static int ocelot_port_queue_ptp_tx_skb(struct ocelot *ocelot, int port,</div><div class='add'>+					struct sk_buff *clone)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+	DECLARE_BITMAP(ts_id_in_flight, OCELOT_MAX_PTP_ID);</div><div class='add'>+	struct sk_buff *skb, *skb_tmp;</div><div class='add'>+	unsigned long n;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;ocelot-&gt;ts_id_lock);</div><div class='add'>+</div><div class='add'>+	/* To get a better chance of acquiring a timestamp ID, first flush the</div><div class='add'>+	 * stale packets still waiting in the TX timestamping queue. They are</div><div class='add'>+	 * probably lost.</div><div class='add'>+	 */</div><div class='add'>+	skb_queue_walk_safe(&amp;ocelot_port-&gt;tx_skbs, skb, skb_tmp) {</div><div class='add'>+		if (time_before(OCELOT_SKB_CB(skb)-&gt;ptp_tx_time +</div><div class='add'>+				OCELOT_PTP_TX_TSTAMP_TIMEOUT, jiffies)) {</div><div class='add'>+			u64_stats_update_begin(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='add'>+			ocelot_port-&gt;ts_stats-&gt;lost++;</div><div class='add'>+			u64_stats_update_end(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='add'>+</div><div class='add'>+			dev_dbg_ratelimited(ocelot-&gt;dev,</div><div class='add'>+					    "port %d invalidating stale timestamp ID %u which seems lost\n",</div><div class='add'>+					    port, OCELOT_SKB_CB(skb)-&gt;ts_id);</div><div class='add'>+</div><div class='add'>+			__skb_unlink(skb, &amp;ocelot_port-&gt;tx_skbs);</div><div class='add'>+			kfree_skb(skb);</div><div class='add'>+			ocelot-&gt;ptp_skbs_in_flight--;</div><div class='add'>+		} else {</div><div class='add'>+			__set_bit(OCELOT_SKB_CB(skb)-&gt;ts_id, ts_id_in_flight);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ocelot-&gt;ptp_skbs_in_flight == OCELOT_PTP_FIFO_SIZE) {</div><div class='add'>+		spin_unlock(&amp;ocelot-&gt;ts_id_lock);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	n = find_first_zero_bit(ts_id_in_flight, OCELOT_MAX_PTP_ID);</div><div class='add'>+	if (n == OCELOT_MAX_PTP_ID) {</div><div class='add'>+		spin_unlock(&amp;ocelot-&gt;ts_id_lock);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Found an available timestamp ID, use it */</div><div class='add'>+	OCELOT_SKB_CB(clone)-&gt;ts_id = n;</div><div class='add'>+	OCELOT_SKB_CB(clone)-&gt;ptp_tx_time = jiffies;</div><div class='ctx'> 	ocelot-&gt;ptp_skbs_in_flight++;</div><div class='add'>+	__skb_queue_tail(&amp;ocelot_port-&gt;tx_skbs, clone);</div><div class='ctx'> </div><div class='del'>-	skb_queue_tail(&amp;ocelot_port-&gt;tx_skbs, clone);</div><div class='add'>+	spin_unlock(&amp;ocelot-&gt;ts_id_lock);</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;ocelot-&gt;ts_id_lock, flags);</div><div class='add'>+	dev_dbg_ratelimited(ocelot-&gt;dev, "port %d timestamp id %lu\n", port, n);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -668,13 +731,20 @@ int ocelot_port_txtstamp_request(struct ocelot *ocelot, int port,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ptp_class = ptp_classify_raw(skb);</div><div class='del'>-	if (ptp_class == PTP_CLASS_NONE)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (ptp_class == PTP_CLASS_NONE) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Store ptp_cmd in OCELOT_SKB_CB(skb)-&gt;ptp_cmd */</div><div class='ctx'> 	if (ptp_cmd == IFH_REW_OP_ORIGIN_PTP) {</div><div class='ctx'> 		if (ocelot_ptp_is_onestep_sync(skb, ptp_class)) {</div><div class='ctx'> 			OCELOT_SKB_CB(skb)-&gt;ptp_cmd = ptp_cmd;</div><div class='add'>+</div><div class='add'>+			u64_stats_update_begin(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='add'>+			ocelot_port-&gt;ts_stats-&gt;onestep_pkts_unconfirmed++;</div><div class='add'>+			u64_stats_update_end(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='add'>+</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -684,18 +754,30 @@ int ocelot_port_txtstamp_request(struct ocelot *ocelot, int port,</div><div class='ctx'> </div><div class='ctx'> 	if (ptp_cmd == IFH_REW_OP_TWO_STEP_PTP) {</div><div class='ctx'> 		*clone = skb_clone_sk(skb);</div><div class='del'>-		if (!(*clone))</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+		if (!(*clone)) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		err = ocelot_port_add_txtstamp_skb(ocelot, port, *clone);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='add'>+		/* Store timestamp ID in OCELOT_SKB_CB(clone)-&gt;ts_id */</div><div class='add'>+		err = ocelot_port_queue_ptp_tx_skb(ocelot, port, *clone);</div><div class='add'>+		if (err) {</div><div class='add'>+			kfree_skb(*clone);</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='add'>+		skb_shinfo(*clone)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='ctx'> 		OCELOT_SKB_CB(skb)-&gt;ptp_cmd = ptp_cmd;</div><div class='ctx'> 		OCELOT_SKB_CB(*clone)-&gt;ptp_class = ptp_class;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	u64_stats_update_begin(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='add'>+	ocelot_port-&gt;ts_stats-&gt;err++;</div><div class='add'>+	u64_stats_update_end(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ocelot_port_txtstamp_request);</div><div class='ctx'> </div><div class='hunk'>@@ -726,28 +808,16 @@ static void ocelot_get_hwtimestamp(struct ocelot *ocelot,</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ocelot-&gt;ptp_clock_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool ocelot_validate_ptp_skb(struct sk_buff *clone, u16 seqid)</div><div class='del'>-{</div><div class='del'>-	struct ptp_header *hdr;</div><div class='del'>-</div><div class='del'>-	hdr = ptp_parse_header(clone, OCELOT_SKB_CB(clone)-&gt;ptp_class);</div><div class='del'>-	if (WARN_ON(!hdr))</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	return seqid == ntohs(hdr-&gt;sequence_id);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void ocelot_get_txtstamp(struct ocelot *ocelot)</div><div class='ctx'> {</div><div class='ctx'> 	int budget = OCELOT_PTP_QUEUE_SZ;</div><div class='ctx'> </div><div class='ctx'> 	while (budget--) {</div><div class='del'>-		struct sk_buff *skb, *skb_tmp, *skb_match = NULL;</div><div class='ctx'> 		struct skb_shared_hwtstamps shhwtstamps;</div><div class='add'>+		struct ocelot_port *ocelot_port;</div><div class='ctx'> 		u32 val, id, seqid, txport;</div><div class='del'>-		struct ocelot_port *port;</div><div class='add'>+		struct sk_buff *skb_match;</div><div class='ctx'> 		struct timespec64 ts;</div><div class='del'>-		unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 		val = ocelot_read(ocelot, SYS_PTP_STATUS);</div><div class='ctx'> </div><div class='hunk'>@@ -761,38 +831,26 @@ void ocelot_get_txtstamp(struct ocelot *ocelot)</div><div class='ctx'> 		id = SYS_PTP_STATUS_PTP_MESS_ID_X(val);</div><div class='ctx'> 		txport = SYS_PTP_STATUS_PTP_MESS_TXPORT_X(val);</div><div class='ctx'> 		seqid = SYS_PTP_STATUS_PTP_MESS_SEQ_ID(val);</div><div class='del'>-</div><div class='del'>-		port = ocelot-&gt;ports[txport];</div><div class='del'>-</div><div class='del'>-		spin_lock(&amp;ocelot-&gt;ts_id_lock);</div><div class='del'>-		port-&gt;ptp_skbs_in_flight--;</div><div class='del'>-		ocelot-&gt;ptp_skbs_in_flight--;</div><div class='del'>-		spin_unlock(&amp;ocelot-&gt;ts_id_lock);</div><div class='add'>+		ocelot_port = ocelot-&gt;ports[txport];</div><div class='ctx'> </div><div class='ctx'> 		/* Retrieve its associated skb */</div><div class='del'>-try_again:</div><div class='del'>-		spin_lock_irqsave(&amp;port-&gt;tx_skbs.lock, flags);</div><div class='del'>-</div><div class='del'>-		skb_queue_walk_safe(&amp;port-&gt;tx_skbs, skb, skb_tmp) {</div><div class='del'>-			if (OCELOT_SKB_CB(skb)-&gt;ts_id != id)</div><div class='del'>-				continue;</div><div class='del'>-			__skb_unlink(skb, &amp;port-&gt;tx_skbs);</div><div class='del'>-			skb_match = skb;</div><div class='del'>-			break;</div><div class='add'>+		skb_match = ocelot_port_dequeue_ptp_tx_skb(ocelot, txport, id,</div><div class='add'>+							   seqid);</div><div class='add'>+		if (!skb_match) {</div><div class='add'>+			u64_stats_update_begin(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='add'>+			ocelot_port-&gt;ts_stats-&gt;err++;</div><div class='add'>+			u64_stats_update_end(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='add'>+</div><div class='add'>+			dev_dbg_ratelimited(ocelot-&gt;dev,</div><div class='add'>+					    "port %d received TX timestamp (seqid %d, ts id %u) for packet previously declared stale\n",</div><div class='add'>+					    txport, seqid, id);</div><div class='add'>+</div><div class='add'>+			goto next_ts;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		spin_unlock_irqrestore(&amp;port-&gt;tx_skbs.lock, flags);</div><div class='del'>-</div><div class='del'>-		if (WARN_ON(!skb_match))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (!ocelot_validate_ptp_skb(skb_match, seqid)) {</div><div class='del'>-			dev_err_ratelimited(ocelot-&gt;dev,</div><div class='del'>-					    "port %d received stale TX timestamp for seqid %d, discarding\n",</div><div class='del'>-					    txport, seqid);</div><div class='del'>-			dev_kfree_skb_any(skb);</div><div class='del'>-			goto try_again;</div><div class='del'>-		}</div><div class='add'>+		u64_stats_update_begin(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='add'>+		ocelot_port-&gt;ts_stats-&gt;pkts++;</div><div class='add'>+		u64_stats_update_end(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='ctx'> </div><div class='ctx'> 		/* Get the h/w timestamp */</div><div class='ctx'> 		ocelot_get_hwtimestamp(ocelot, &amp;ts);</div><div class='hunk'>@@ -802,7 +860,7 @@ try_again:</div><div class='ctx'> 		shhwtstamps.hwtstamp = ktime_set(ts.tv_sec, ts.tv_nsec);</div><div class='ctx'> 		skb_complete_tx_timestamp(skb_match, &amp;shhwtstamps);</div><div class='ctx'> </div><div class='del'>-		/* Next ts */</div><div class='add'>+next_ts:</div><div class='ctx'> 		ocelot_write(ocelot, SYS_PTP_NXT_PTP_NXT, SYS_PTP_NXT);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mscc/ocelot_stats.c b/drivers/net/ethernet/mscc/ocelot_stats.c<br/>index c018783757fb..d2be1be37716 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mscc/ocelot_stats.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mscc/ocelot_stats.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mscc/ocelot_stats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mscc/ocelot_stats.c</a></div><div class='hunk'>@@ -821,6 +821,26 @@ void ocelot_port_get_eth_phy_stats(struct ocelot *ocelot, int port,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(ocelot_port_get_eth_phy_stats);</div><div class='ctx'> </div><div class='add'>+void ocelot_port_get_ts_stats(struct ocelot *ocelot, int port,</div><div class='add'>+			      struct ethtool_ts_stats *ts_stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+	struct ocelot_ts_stats *stats = ocelot_port-&gt;ts_stats;</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	if (!ocelot-&gt;ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;stats-&gt;syncp);</div><div class='add'>+		ts_stats-&gt;pkts = stats-&gt;pkts;</div><div class='add'>+		ts_stats-&gt;onestep_pkts_unconfirmed = stats-&gt;onestep_pkts_unconfirmed;</div><div class='add'>+		ts_stats-&gt;lost = stats-&gt;lost;</div><div class='add'>+		ts_stats-&gt;err = stats-&gt;err;</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;stats-&gt;syncp, start));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(ocelot_port_get_ts_stats);</div><div class='add'>+</div><div class='ctx'> void ocelot_port_get_stats64(struct ocelot *ocelot, int port,</div><div class='ctx'> 			     struct rtnl_link_stats64 *stats)</div><div class='ctx'> {</div><div class='hunk'>@@ -960,6 +980,23 @@ int ocelot_stats_init(struct ocelot *ocelot)</div><div class='ctx'> 	if (!ocelot-&gt;stats)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	if (ocelot-&gt;ptp) {</div><div class='add'>+		for (int port = 0; port &lt; ocelot-&gt;num_phys_ports; port++) {</div><div class='add'>+			struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+			if (!ocelot_port)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ocelot_port-&gt;ts_stats = devm_kzalloc(ocelot-&gt;dev,</div><div class='add'>+							     sizeof(*ocelot_port-&gt;ts_stats),</div><div class='add'>+							     GFP_KERNEL);</div><div class='add'>+			if (!ocelot_port-&gt;ts_stats)</div><div class='add'>+				return -ENOMEM;</div><div class='add'>+</div><div class='add'>+			u64_stats_init(&amp;ocelot_port-&gt;ts_stats-&gt;syncp);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	snprintf(queue_name, sizeof(queue_name), "%s-stats",</div><div class='ctx'> 		 dev_name(ocelot-&gt;dev));</div><div class='ctx'> 	ocelot-&gt;stats_queue = create_singlethread_workqueue(queue_name);</div><div class='hunk'>@@ -984,6 +1021,6 @@ int ocelot_stats_init(struct ocelot *ocelot)</div><div class='ctx'> </div><div class='ctx'> void ocelot_stats_deinit(struct ocelot *ocelot)</div><div class='ctx'> {</div><div class='del'>-	cancel_delayed_work(&amp;ocelot-&gt;stats_work);</div><div class='add'>+	disable_delayed_work_sync(&amp;ocelot-&gt;stats_work);</div><div class='ctx'> 	destroy_workqueue(ocelot-&gt;stats_queue);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/mscc/ocelot_vsc7514.c b/drivers/net/ethernet/mscc/ocelot_vsc7514.c<br/>index 055b55651a49..498eec8ae61d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mscc/ocelot_vsc7514.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/mscc/ocelot_vsc7514.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mscc/ocelot_vsc7514.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mscc/ocelot_vsc7514.c</a></div><div class='hunk'>@@ -108,6 +108,8 @@ static struct ptp_clock_info ocelot_ptp_clock_info = {</div><div class='ctx'> 	.n_ext_ts	= 0,</div><div class='ctx'> 	.n_per_out	= OCELOT_PTP_PINS_NUM,</div><div class='ctx'> 	.n_pins		= OCELOT_PTP_PINS_NUM,</div><div class='add'>+	.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE |</div><div class='add'>+				  PTP_PEROUT_PHASE,</div><div class='ctx'> 	.pps		= 0,</div><div class='ctx'> 	.gettime64	= ocelot_ptp_gettime64,</div><div class='ctx'> 	.settime64	= ocelot_ptp_settime64,</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/Kconfig b/drivers/net/ethernet/mucse/Kconfig<br/>new file mode 100644<br/>index 000000000000..0b3e853d625f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Mucse network device configuration</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+config NET_VENDOR_MUCSE</div><div class='add'>+	bool "Mucse devices"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  If you have a network (Ethernet) card from Mucse(R), say Y.</div><div class='add'>+</div><div class='add'>+	  Note that the answer to this question doesn't directly affect the</div><div class='add'>+	  kernel: saying N will just cause the configurator to skip all</div><div class='add'>+	  the questions about Mucse(R) cards. If you say Y, you will</div><div class='add'>+	  be asked for your specific card in the following questions.</div><div class='add'>+</div><div class='add'>+if NET_VENDOR_MUCSE</div><div class='add'>+</div><div class='add'>+config MGBE</div><div class='add'>+	tristate "Mucse(R) 1GbE PCI Express adapters support"</div><div class='add'>+	depends on PCI</div><div class='add'>+	help</div><div class='add'>+	  This driver supports Mucse(R) 1GbE PCI Express family of</div><div class='add'>+	  adapters.</div><div class='add'>+</div><div class='add'>+	  More specific information on configuring the driver is in</div><div class='add'>+	  &lt;file:Documentation/networking/device_drivers/ethernet/mucse/rnpgbe.rst&gt;.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here. The module</div><div class='add'>+	  will be called rnpgbe.</div><div class='add'>+</div><div class='add'>+endif # NET_VENDOR_MUCSE</div><div class='add'>+</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/Makefile b/drivers/net/ethernet/mucse/Makefile<br/>new file mode 100644<br/>index 000000000000..675173fa05f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright(c) 2020 - 2025 MUCSE Corporation.</div><div class='add'>+#</div><div class='add'>+# Makefile for the MUCSE(R) network device drivers</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_MGBE) += rnpgbe/</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/rnpgbe/Makefile b/drivers/net/ethernet/mucse/rnpgbe/Makefile<br/>new file mode 100644<br/>index 000000000000..de8bcb7772ab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/rnpgbe/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/rnpgbe/Makefile</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright(c) 2020 - 2025 MUCSE Corporation.</div><div class='add'>+#</div><div class='add'>+# Makefile for the MUCSE(R) 1GbE PCI Express ethernet driver</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_MGBE) += rnpgbe.o</div><div class='add'>+rnpgbe-objs := rnpgbe_main.o\</div><div class='add'>+	       rnpgbe_chip.o\</div><div class='add'>+	       rnpgbe_mbx.o\</div><div class='add'>+	       rnpgbe_mbx_fw.o</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h<br/>new file mode 100644<br/>index 000000000000..5b024f9f7e17<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2020 - 2025 Mucse Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _RNPGBE_H</div><div class='add'>+#define _RNPGBE_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+</div><div class='add'>+enum rnpgbe_boards {</div><div class='add'>+	board_n500,</div><div class='add'>+	board_n210</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mucse_mbx_info {</div><div class='add'>+	u32 timeout_us;</div><div class='add'>+	u32 delay_us;</div><div class='add'>+	u16 fw_req;</div><div class='add'>+	u16 fw_ack;</div><div class='add'>+	/* lock for only one use mbx */</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	/* fw &lt;--&gt; pf mbx */</div><div class='add'>+	u32 fwpf_shm_base;</div><div class='add'>+	u32 pf2fw_mbx_ctrl;</div><div class='add'>+	u32 fwpf_mbx_mask;</div><div class='add'>+	u32 fwpf_ctrl_base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Enum for firmware notification modes,</div><div class='add'>+ * more modes (e.g., portup, link_report) will be added in future</div><div class='add'>+ **/</div><div class='add'>+enum {</div><div class='add'>+	mucse_fw_powerup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mucse_hw {</div><div class='add'>+	void __iomem *hw_addr;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	struct mucse_mbx_info mbx;</div><div class='add'>+	int port;</div><div class='add'>+	u8 pfvfnum;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mucse_stats {</div><div class='add'>+	u64 tx_dropped;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mucse {</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	struct mucse_hw hw;</div><div class='add'>+	struct mucse_stats stats;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int rnpgbe_get_permanent_mac(struct mucse_hw *hw, u8 *perm_addr);</div><div class='add'>+int rnpgbe_reset_hw(struct mucse_hw *hw);</div><div class='add'>+int rnpgbe_send_notify(struct mucse_hw *hw,</div><div class='add'>+		       bool enable,</div><div class='add'>+		       int mode);</div><div class='add'>+int rnpgbe_init_hw(struct mucse_hw *hw, int board_type);</div><div class='add'>+</div><div class='add'>+/* Device IDs */</div><div class='add'>+#define PCI_VENDOR_ID_MUCSE               0x8848</div><div class='add'>+#define RNPGBE_DEVICE_ID_N500_QUAD_PORT   0x8308</div><div class='add'>+#define RNPGBE_DEVICE_ID_N500_DUAL_PORT   0x8318</div><div class='add'>+#define RNPGBE_DEVICE_ID_N210             0x8208</div><div class='add'>+#define RNPGBE_DEVICE_ID_N210L            0x820a</div><div class='add'>+</div><div class='add'>+#define mucse_hw_wr32(hw, reg, val) \</div><div class='add'>+	writel((val), (hw)-&gt;hw_addr + (reg))</div><div class='add'>+#endif /* _RNPGBE_H */</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c<br/>new file mode 100644<br/>index 000000000000..ebc7b3750157<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c</a></div><div class='hunk'>@@ -0,0 +1,143 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2020 - 2025 Mucse Corporation. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rnpgbe.h"</div><div class='add'>+#include "rnpgbe_hw.h"</div><div class='add'>+#include "rnpgbe_mbx.h"</div><div class='add'>+#include "rnpgbe_mbx_fw.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_get_permanent_mac - Get permanent mac</div><div class='add'>+ * @hw: hw information structure</div><div class='add'>+ * @perm_addr: pointer to store perm_addr</div><div class='add'>+ *</div><div class='add'>+ * rnpgbe_get_permanent_mac tries to get mac from hw</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+int rnpgbe_get_permanent_mac(struct mucse_hw *hw, u8 *perm_addr)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;hw-&gt;pdev-&gt;dev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mucse_mbx_get_macaddr(hw, hw-&gt;pfvfnum, perm_addr, hw-&gt;port);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Failed to get MAC from FW %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(perm_addr)) {</div><div class='add'>+		dev_err(dev, "Failed to get valid MAC from FW\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_reset_hw - Do a hardware reset</div><div class='add'>+ * @hw: hw information structure</div><div class='add'>+ *</div><div class='add'>+ * rnpgbe_reset_hw calls fw to do a hardware</div><div class='add'>+ * reset, and cleans some regs to default.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+int rnpgbe_reset_hw(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	mucse_hw_wr32(hw, RNPGBE_DMA_AXI_EN, 0);</div><div class='add'>+	return mucse_mbx_reset_hw(hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_send_notify - Echo fw status</div><div class='add'>+ * @hw: hw information structure</div><div class='add'>+ * @enable: true or false status</div><div class='add'>+ * @mode: status mode</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+int rnpgbe_send_notify(struct mucse_hw *hw,</div><div class='add'>+		       bool enable,</div><div class='add'>+		       int mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	/* Keep switch struct to support more modes in the future */</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case mucse_fw_powerup:</div><div class='add'>+		err = mucse_mbx_powerup(hw, enable);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_init_n500 - Setup n500 hw info</div><div class='add'>+ * @hw: hw information structure</div><div class='add'>+ *</div><div class='add'>+ * rnpgbe_init_n500 initializes all private</div><div class='add'>+ * structure for n500</div><div class='add'>+ **/</div><div class='add'>+static void rnpgbe_init_n500(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+</div><div class='add'>+	mbx-&gt;fwpf_ctrl_base = MUCSE_N500_FWPF_CTRL_BASE;</div><div class='add'>+	mbx-&gt;fwpf_shm_base = MUCSE_N500_FWPF_SHM_BASE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_init_n210 - Setup n210 hw info</div><div class='add'>+ * @hw: hw information structure</div><div class='add'>+ *</div><div class='add'>+ * rnpgbe_init_n210 initializes all private</div><div class='add'>+ * structure for n210</div><div class='add'>+ **/</div><div class='add'>+static void rnpgbe_init_n210(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+</div><div class='add'>+	mbx-&gt;fwpf_ctrl_base = MUCSE_N210_FWPF_CTRL_BASE;</div><div class='add'>+	mbx-&gt;fwpf_shm_base = MUCSE_N210_FWPF_SHM_BASE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_init_hw - Setup hw info according to board_type</div><div class='add'>+ * @hw: hw information structure</div><div class='add'>+ * @board_type: board type</div><div class='add'>+ *</div><div class='add'>+ * rnpgbe_init_hw initializes all hw data</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -EINVAL on failure</div><div class='add'>+ **/</div><div class='add'>+int rnpgbe_init_hw(struct mucse_hw *hw, int board_type)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+</div><div class='add'>+	hw-&gt;port = 0;</div><div class='add'>+</div><div class='add'>+	mbx-&gt;pf2fw_mbx_ctrl = MUCSE_GBE_PFFW_MBX_CTRL_OFFSET;</div><div class='add'>+	mbx-&gt;fwpf_mbx_mask = MUCSE_GBE_FWPF_MBX_MASK_OFFSET;</div><div class='add'>+</div><div class='add'>+	switch (board_type) {</div><div class='add'>+	case board_n500:</div><div class='add'>+		rnpgbe_init_n500(hw);</div><div class='add'>+		break;</div><div class='add'>+	case board_n210:</div><div class='add'>+		rnpgbe_init_n210(hw);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	/* init_params with mbx base */</div><div class='add'>+	mucse_init_mbx_params_pf(hw);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h<br/>new file mode 100644<br/>index 000000000000..e77e6bc3d3e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2020 - 2025 Mucse Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _RNPGBE_HW_H</div><div class='add'>+#define _RNPGBE_HW_H</div><div class='add'>+</div><div class='add'>+#define MUCSE_N500_FWPF_CTRL_BASE      0x28b00</div><div class='add'>+#define MUCSE_N500_FWPF_SHM_BASE       0x2d000</div><div class='add'>+#define MUCSE_GBE_PFFW_MBX_CTRL_OFFSET 0x5500</div><div class='add'>+#define MUCSE_GBE_FWPF_MBX_MASK_OFFSET 0x5700</div><div class='add'>+#define MUCSE_N210_FWPF_CTRL_BASE      0x29400</div><div class='add'>+#define MUCSE_N210_FWPF_SHM_BASE       0x2d900</div><div class='add'>+</div><div class='add'>+#define RNPGBE_DMA_AXI_EN              0x0010</div><div class='add'>+</div><div class='add'>+#define RNPGBE_MAX_QUEUES 8</div><div class='add'>+#endif /* _RNPGBE_HW_H */</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c<br/>new file mode 100644<br/>index 000000000000..316f941629d4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c</a></div><div class='hunk'>@@ -0,0 +1,320 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2020 - 2025 Mucse Corporation. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;net/rtnetlink.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rnpgbe.h"</div><div class='add'>+#include "rnpgbe_hw.h"</div><div class='add'>+#include "rnpgbe_mbx_fw.h"</div><div class='add'>+</div><div class='add'>+static const char rnpgbe_driver_name[] = "rnpgbe";</div><div class='add'>+</div><div class='add'>+/* rnpgbe_pci_tbl - PCI Device ID Table</div><div class='add'>+ *</div><div class='add'>+ * { PCI_VDEVICE(Vendor ID, Device ID),</div><div class='add'>+ *   private_data (used for different hw chip) }</div><div class='add'>+ */</div><div class='add'>+static struct pci_device_id rnpgbe_pci_tbl[] = {</div><div class='add'>+	{ PCI_VDEVICE(MUCSE, RNPGBE_DEVICE_ID_N210), board_n210 },</div><div class='add'>+	{ PCI_VDEVICE(MUCSE, RNPGBE_DEVICE_ID_N210L), board_n210 },</div><div class='add'>+	{ PCI_VDEVICE(MUCSE, RNPGBE_DEVICE_ID_N500_DUAL_PORT), board_n500 },</div><div class='add'>+	{ PCI_VDEVICE(MUCSE, RNPGBE_DEVICE_ID_N500_QUAD_PORT), board_n500 },</div><div class='add'>+	/* required last entry */</div><div class='add'>+	{0, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_open - Called when a network interface is made active</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ *</div><div class='add'>+ * The open entry point is called when a network interface is made</div><div class='add'>+ * active by the system (IFF_UP).</div><div class='add'>+ *</div><div class='add'>+ * Return: 0</div><div class='add'>+ **/</div><div class='add'>+static int rnpgbe_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_close - Disables a network interface</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ *</div><div class='add'>+ * The close entry point is called when an interface is de-activated</div><div class='add'>+ * by the OS.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0, this is not allowed to fail</div><div class='add'>+ **/</div><div class='add'>+static int rnpgbe_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_xmit_frame - Send a skb to driver</div><div class='add'>+ * @skb: skb structure to be sent</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: NETDEV_TX_OK</div><div class='add'>+ **/</div><div class='add'>+static netdev_tx_t rnpgbe_xmit_frame(struct sk_buff *skb,</div><div class='add'>+				     struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct mucse *mucse = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+	mucse-&gt;stats.tx_dropped++;</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops rnpgbe_netdev_ops = {</div><div class='add'>+	.ndo_open       = rnpgbe_open,</div><div class='add'>+	.ndo_stop       = rnpgbe_close,</div><div class='add'>+	.ndo_start_xmit = rnpgbe_xmit_frame,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_add_adapter - Add netdev for this pci_dev</div><div class='add'>+ * @pdev: PCI device information structure</div><div class='add'>+ * @board_type: board type</div><div class='add'>+ *</div><div class='add'>+ * rnpgbe_add_adapter initializes a netdev for this pci_dev</div><div class='add'>+ * structure. Initializes Bar map, private structure, and a</div><div class='add'>+ * hardware reset occur.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+static int rnpgbe_add_adapter(struct pci_dev *pdev,</div><div class='add'>+			      int board_type)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	u8 perm_addr[ETH_ALEN];</div><div class='add'>+	void __iomem *hw_addr;</div><div class='add'>+	struct mucse *mucse;</div><div class='add'>+	struct mucse_hw *hw;</div><div class='add'>+	int err, err_notify;</div><div class='add'>+</div><div class='add'>+	netdev = alloc_etherdev_mq(sizeof(struct mucse), RNPGBE_MAX_QUEUES);</div><div class='add'>+	if (!netdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='add'>+	mucse = netdev_priv(netdev);</div><div class='add'>+	mucse-&gt;netdev = netdev;</div><div class='add'>+	mucse-&gt;pdev = pdev;</div><div class='add'>+	pci_set_drvdata(pdev, mucse);</div><div class='add'>+</div><div class='add'>+	hw = &amp;mucse-&gt;hw;</div><div class='add'>+	hw_addr = devm_ioremap(&amp;pdev-&gt;dev,</div><div class='add'>+			       pci_resource_start(pdev, 2),</div><div class='add'>+			       pci_resource_len(pdev, 2));</div><div class='add'>+	if (!hw_addr) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto err_free_net;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw-&gt;hw_addr = hw_addr;</div><div class='add'>+	hw-&gt;pdev = pdev;</div><div class='add'>+</div><div class='add'>+	err = rnpgbe_init_hw(hw, board_type);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Init hw err %d\n", err);</div><div class='add'>+		goto err_free_net;</div><div class='add'>+	}</div><div class='add'>+	/* Step 1: Send power-up notification to firmware (no response expected)</div><div class='add'>+	 * This informs firmware to initialize hardware power state, but</div><div class='add'>+	 * firmware only acknowledges receipt without returning data. Must be</div><div class='add'>+	 * done before synchronization as firmware may be in low-power idle</div><div class='add'>+	 * state initially.</div><div class='add'>+	 */</div><div class='add'>+	err_notify = rnpgbe_send_notify(hw, true, mucse_fw_powerup);</div><div class='add'>+	if (err_notify) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "Send powerup to hw failed %d\n",</div><div class='add'>+			 err_notify);</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "Maybe low performance\n");</div><div class='add'>+	}</div><div class='add'>+	/* Step 2: Synchronize mailbox communication with firmware (requires</div><div class='add'>+	 * response) After power-up, confirm firmware is ready to process</div><div class='add'>+	 * requests with responses. This ensures subsequent request/response</div><div class='add'>+	 * interactions work reliably.</div><div class='add'>+	 */</div><div class='add'>+	err = mucse_mbx_sync_fw(hw);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Sync fw failed! %d\n", err);</div><div class='add'>+		goto err_powerdown;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;rnpgbe_netdev_ops;</div><div class='add'>+	err = rnpgbe_reset_hw(hw);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Hw reset failed %d\n", err);</div><div class='add'>+		goto err_powerdown;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = rnpgbe_get_permanent_mac(hw, perm_addr);</div><div class='add'>+	if (!err) {</div><div class='add'>+		eth_hw_addr_set(netdev, perm_addr);</div><div class='add'>+	} else if (err == -EINVAL) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "Using random MAC\n");</div><div class='add'>+		eth_hw_addr_random(netdev);</div><div class='add'>+	} else if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "get perm_addr failed %d\n", err);</div><div class='add'>+		goto err_powerdown;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = register_netdev(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_powerdown;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_powerdown:</div><div class='add'>+	/* notify powerdown only powerup ok */</div><div class='add'>+	if (!err_notify) {</div><div class='add'>+		err_notify = rnpgbe_send_notify(hw, false, mucse_fw_powerup);</div><div class='add'>+		if (err_notify)</div><div class='add'>+			dev_warn(&amp;pdev-&gt;dev, "Send powerdown to hw failed %d\n",</div><div class='add'>+				 err_notify);</div><div class='add'>+	}</div><div class='add'>+err_free_net:</div><div class='add'>+	free_netdev(netdev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_probe - Device initialization routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ * @id: entry in rnpgbe_pci_tbl</div><div class='add'>+ *</div><div class='add'>+ * rnpgbe_probe initializes a PF adapter identified by a pci_dev</div><div class='add'>+ * structure.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+static int rnpgbe_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	int board_type = id-&gt;driver_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device_mem(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = dma_set_coherent_mask(&amp;pdev-&gt;dev, DMA_BIT_MASK(56));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"No usable DMA configuration, aborting %d\n", err);</div><div class='add'>+		goto err_disable_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pci_request_mem_regions(pdev, rnpgbe_driver_name);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"pci_request_selected_regions failed %d\n", err);</div><div class='add'>+		goto err_disable_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+	err = pci_save_state(pdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "pci_save_state failed %d\n", err);</div><div class='add'>+		goto err_free_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = rnpgbe_add_adapter(pdev, board_type);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_regions;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_free_regions:</div><div class='add'>+	pci_release_mem_regions(pdev);</div><div class='add'>+err_disable_dev:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_rm_adapter - Remove netdev for this mucse structure</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ *</div><div class='add'>+ * rnpgbe_rm_adapter remove a netdev for this mucse structure</div><div class='add'>+ **/</div><div class='add'>+static void rnpgbe_rm_adapter(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct mucse *mucse = pci_get_drvdata(pdev);</div><div class='add'>+	struct mucse_hw *hw = &amp;mucse-&gt;hw;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mucse)</div><div class='add'>+		return;</div><div class='add'>+	netdev = mucse-&gt;netdev;</div><div class='add'>+	unregister_netdev(netdev);</div><div class='add'>+	err = rnpgbe_send_notify(hw, false, mucse_fw_powerup);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "Send powerdown to hw failed %d\n", err);</div><div class='add'>+	free_netdev(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_remove - Device removal routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ *</div><div class='add'>+ * rnpgbe_remove is called by the PCI subsystem to alert the driver</div><div class='add'>+ * that it should release a PCI device. This could be caused by a</div><div class='add'>+ * Hot-Plug event, or because the driver is going to be removed from</div><div class='add'>+ * memory.</div><div class='add'>+ **/</div><div class='add'>+static void rnpgbe_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	rnpgbe_rm_adapter(pdev);</div><div class='add'>+	pci_release_mem_regions(pdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_dev_shutdown - Device shutdown routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ **/</div><div class='add'>+static void rnpgbe_dev_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct mucse *mucse = pci_get_drvdata(pdev);</div><div class='add'>+	struct net_device *netdev = mucse-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	netif_device_detach(netdev);</div><div class='add'>+	if (netif_running(netdev))</div><div class='add'>+		rnpgbe_close(netdev);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rnpgbe_shutdown - Device shutdown routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ *</div><div class='add'>+ * rnpgbe_shutdown is called by the PCI subsystem to alert the driver</div><div class='add'>+ * that os shutdown. Device should setup wakeup state here.</div><div class='add'>+ **/</div><div class='add'>+static void rnpgbe_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	rnpgbe_dev_shutdown(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_driver rnpgbe_driver = {</div><div class='add'>+	.name     = rnpgbe_driver_name,</div><div class='add'>+	.id_table = rnpgbe_pci_tbl,</div><div class='add'>+	.probe    = rnpgbe_probe,</div><div class='add'>+	.remove   = rnpgbe_remove,</div><div class='add'>+	.shutdown = rnpgbe_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_pci_driver(rnpgbe_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, rnpgbe_pci_tbl);</div><div class='add'>+MODULE_AUTHOR("Yibo Dong, &lt;dong100@mucse.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Mucse(R) 1 Gigabit PCI Express Network Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c<br/>new file mode 100644<br/>index 000000000000..de5e29230b3c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c</a></div><div class='hunk'>@@ -0,0 +1,406 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2022 - 2025 Mucse Corporation. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rnpgbe_mbx.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mbx_data_rd32 - Reads reg with base mbx-&gt;fwpf_shm_base</div><div class='add'>+ * @mbx: pointer to the MBX structure</div><div class='add'>+ * @reg: register offset</div><div class='add'>+ *</div><div class='add'>+ * Return: register value</div><div class='add'>+ **/</div><div class='add'>+static u32 mbx_data_rd32(struct mucse_mbx_info *mbx, u32 reg)</div><div class='add'>+{</div><div class='add'>+	struct mucse_hw *hw = container_of(mbx, struct mucse_hw, mbx);</div><div class='add'>+</div><div class='add'>+	return readl(hw-&gt;hw_addr + mbx-&gt;fwpf_shm_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mbx_data_wr32 - Writes value to reg with base mbx-&gt;fwpf_shm_base</div><div class='add'>+ * @mbx: pointer to the MBX structure</div><div class='add'>+ * @reg: register offset</div><div class='add'>+ * @value: value to be written</div><div class='add'>+ *</div><div class='add'>+ **/</div><div class='add'>+static void mbx_data_wr32(struct mucse_mbx_info *mbx, u32 reg, u32 value)</div><div class='add'>+{</div><div class='add'>+	struct mucse_hw *hw = container_of(mbx, struct mucse_hw, mbx);</div><div class='add'>+</div><div class='add'>+	writel(value, hw-&gt;hw_addr + mbx-&gt;fwpf_shm_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mbx_ctrl_rd32 - Reads reg with base mbx-&gt;fwpf_ctrl_base</div><div class='add'>+ * @mbx: pointer to the MBX structure</div><div class='add'>+ * @reg: register offset</div><div class='add'>+ *</div><div class='add'>+ * Return: register value</div><div class='add'>+ **/</div><div class='add'>+static u32 mbx_ctrl_rd32(struct mucse_mbx_info *mbx, u32 reg)</div><div class='add'>+{</div><div class='add'>+	struct mucse_hw *hw = container_of(mbx, struct mucse_hw, mbx);</div><div class='add'>+</div><div class='add'>+	return readl(hw-&gt;hw_addr + mbx-&gt;fwpf_ctrl_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mbx_ctrl_wr32 - Writes value to reg with base mbx-&gt;fwpf_ctrl_base</div><div class='add'>+ * @mbx: pointer to the MBX structure</div><div class='add'>+ * @reg: register offset</div><div class='add'>+ * @value: value to be written</div><div class='add'>+ *</div><div class='add'>+ **/</div><div class='add'>+static void mbx_ctrl_wr32(struct mucse_mbx_info *mbx, u32 reg, u32 value)</div><div class='add'>+{</div><div class='add'>+	struct mucse_hw *hw = container_of(mbx, struct mucse_hw, mbx);</div><div class='add'>+</div><div class='add'>+	writel(value, hw-&gt;hw_addr + mbx-&gt;fwpf_ctrl_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_get_lock_pf - Write ctrl and read back lock status</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * Return: register value after write</div><div class='add'>+ **/</div><div class='add'>+static u32 mucse_mbx_get_lock_pf(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	u32 reg = MUCSE_MBX_PF2FW_CTRL(mbx);</div><div class='add'>+</div><div class='add'>+	mbx_ctrl_wr32(mbx, reg, MUCSE_MBX_PFU);</div><div class='add'>+</div><div class='add'>+	return mbx_ctrl_rd32(mbx, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_obtain_mbx_lock_pf - Obtain mailbox lock</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * Pair with mucse_release_mbx_lock_pf()</div><div class='add'>+ * This function maybe used in an irq handler.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+static int mucse_obtain_mbx_lock_pf(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout_atomic(mucse_mbx_get_lock_pf,</div><div class='add'>+					val, val &amp; MUCSE_MBX_PFU,</div><div class='add'>+					mbx-&gt;delay_us,</div><div class='add'>+					mbx-&gt;timeout_us,</div><div class='add'>+					false, hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_release_mbx_lock_pf - Release mailbox lock</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @req: send a request or not</div><div class='add'>+ *</div><div class='add'>+ * Pair with mucse_obtain_mbx_lock_pf():</div><div class='add'>+ * - Releases the mailbox lock by clearing MUCSE_MBX_PFU bit</div><div class='add'>+ * - Simultaneously sends the request by setting MUCSE_MBX_REQ bit</div><div class='add'>+ *   if req is true</div><div class='add'>+ * (Both bits are in the same mailbox control register,</div><div class='add'>+ * so operations are combined)</div><div class='add'>+ **/</div><div class='add'>+static void mucse_release_mbx_lock_pf(struct mucse_hw *hw, bool req)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	u32 reg = MUCSE_MBX_PF2FW_CTRL(mbx);</div><div class='add'>+</div><div class='add'>+	mbx_ctrl_wr32(mbx, reg, req ? MUCSE_MBX_REQ : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_get_fwreq - Read fw req from reg</div><div class='add'>+ * @mbx: pointer to the mbx structure</div><div class='add'>+ *</div><div class='add'>+ * Return: the fwreq value</div><div class='add'>+ **/</div><div class='add'>+static u16 mucse_mbx_get_fwreq(struct mucse_mbx_info *mbx)</div><div class='add'>+{</div><div class='add'>+	u32 val = mbx_data_rd32(mbx, MUCSE_MBX_FW2PF_CNT);</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(GENMASK_U32(15, 0), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_inc_pf_ack - Increase ack</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * mucse_mbx_inc_pf_ack reads pf_ack from hw, then writes</div><div class='add'>+ * new value back after increase</div><div class='add'>+ **/</div><div class='add'>+static void mucse_mbx_inc_pf_ack(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	u16 ack;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = mbx_data_rd32(mbx, MUCSE_MBX_PF2FW_CNT);</div><div class='add'>+	ack = FIELD_GET(GENMASK_U32(31, 16), val);</div><div class='add'>+	ack++;</div><div class='add'>+	val &amp;= ~GENMASK_U32(31, 16);</div><div class='add'>+	val |= FIELD_PREP(GENMASK_U32(31, 16), ack);</div><div class='add'>+	mbx_data_wr32(mbx, MUCSE_MBX_PF2FW_CNT, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_read_mbx_pf - Read a message from the mailbox</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @msg: the message buffer</div><div class='add'>+ * @size: length of buffer</div><div class='add'>+ *</div><div class='add'>+ * mucse_read_mbx_pf copies a message from the mbx buffer to the caller's</div><div class='add'>+ * memory buffer. The presumption is that the caller knows that there was</div><div class='add'>+ * a message due to a fw request so no polling for message is needed.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+static int mucse_read_mbx_pf(struct mucse_hw *hw, u32 *msg, u16 size)</div><div class='add'>+{</div><div class='add'>+	const int size_in_words = size / sizeof(u32);</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mucse_obtain_mbx_lock_pf(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; size_in_words; i++)</div><div class='add'>+		msg[i] = mbx_data_rd32(mbx, MUCSE_MBX_FWPF_SHM + 4 * i);</div><div class='add'>+	/* Hw needs write data_reg at last */</div><div class='add'>+	mbx_data_wr32(mbx, MUCSE_MBX_FWPF_SHM, 0);</div><div class='add'>+	/* flush reqs as we have read this request data */</div><div class='add'>+	hw-&gt;mbx.fw_req = mucse_mbx_get_fwreq(mbx);</div><div class='add'>+	mucse_mbx_inc_pf_ack(hw);</div><div class='add'>+	mucse_release_mbx_lock_pf(hw, false);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_check_for_msg_pf - Check to see if the fw has sent mail</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the fw has set the Status bit or else -EIO</div><div class='add'>+ **/</div><div class='add'>+static int mucse_check_for_msg_pf(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	u16 fw_req;</div><div class='add'>+</div><div class='add'>+	fw_req = mucse_mbx_get_fwreq(mbx);</div><div class='add'>+	/* chip's register is reset to 0 when rc send reset</div><div class='add'>+	 * mbx command. Return -EIO if in this state, others</div><div class='add'>+	 * fw == hw-&gt;mbx.fw_req means no new msg.</div><div class='add'>+	 **/</div><div class='add'>+	if (fw_req == 0 || fw_req == hw-&gt;mbx.fw_req)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_poll_for_msg - Wait for message notification</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+static int mucse_poll_for_msg(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout(mucse_check_for_msg_pf,</div><div class='add'>+				 val, !val, mbx-&gt;delay_us,</div><div class='add'>+				 mbx-&gt;timeout_us,</div><div class='add'>+				 false, hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_poll_and_read_mbx - Wait for message notification and receive message</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @msg: the message buffer</div><div class='add'>+ * @size: length of buffer</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if it successfully received a message notification and</div><div class='add'>+ * copied it into the receive buffer, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+int mucse_poll_and_read_mbx(struct mucse_hw *hw, u32 *msg, u16 size)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mucse_poll_for_msg(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mucse_read_mbx_pf(hw, msg, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_get_fwack - Read fw ack from reg</div><div class='add'>+ * @mbx: pointer to the MBX structure</div><div class='add'>+ *</div><div class='add'>+ * Return: the fwack value</div><div class='add'>+ **/</div><div class='add'>+static u16 mucse_mbx_get_fwack(struct mucse_mbx_info *mbx)</div><div class='add'>+{</div><div class='add'>+	u32 val = mbx_data_rd32(mbx, MUCSE_MBX_FW2PF_CNT);</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(GENMASK_U32(31, 16), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_inc_pf_req - Increase req</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * mucse_mbx_inc_pf_req reads pf_req from hw, then writes</div><div class='add'>+ * new value back after increase</div><div class='add'>+ **/</div><div class='add'>+static void mucse_mbx_inc_pf_req(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	u16 req;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = mbx_data_rd32(mbx, MUCSE_MBX_PF2FW_CNT);</div><div class='add'>+	req = FIELD_GET(GENMASK_U32(15, 0), val);</div><div class='add'>+	req++;</div><div class='add'>+	val &amp;= ~GENMASK_U32(15, 0);</div><div class='add'>+	val |= FIELD_PREP(GENMASK_U32(15, 0), req);</div><div class='add'>+	mbx_data_wr32(mbx, MUCSE_MBX_PF2FW_CNT, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_write_mbx_pf - Place a message in the mailbox</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @msg: the message buffer</div><div class='add'>+ * @size: length of buffer</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if it successfully copied message into the buffer,</div><div class='add'>+ * negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+static int mucse_write_mbx_pf(struct mucse_hw *hw, u32 *msg, u16 size)</div><div class='add'>+{</div><div class='add'>+	const int size_in_words = size / sizeof(u32);</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mucse_obtain_mbx_lock_pf(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; size_in_words; i++)</div><div class='add'>+		mbx_data_wr32(mbx, MUCSE_MBX_FWPF_SHM + i * 4, msg[i]);</div><div class='add'>+</div><div class='add'>+	/* flush acks as we are overwriting the message buffer */</div><div class='add'>+	hw-&gt;mbx.fw_ack = mucse_mbx_get_fwack(mbx);</div><div class='add'>+	mucse_mbx_inc_pf_req(hw);</div><div class='add'>+	mucse_release_mbx_lock_pf(hw, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_check_for_ack_pf - Check to see if the fw has ACKed</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the fw has set the Status bit or else -EIO</div><div class='add'>+ **/</div><div class='add'>+static int mucse_check_for_ack_pf(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	u16 fw_ack;</div><div class='add'>+</div><div class='add'>+	fw_ack = mucse_mbx_get_fwack(mbx);</div><div class='add'>+	/* chip's register is reset to 0 when rc send reset</div><div class='add'>+	 * mbx command. Return -EIO if in this state, others</div><div class='add'>+	 * fw_ack == hw-&gt;mbx.fw_ack means no new ack.</div><div class='add'>+	 **/</div><div class='add'>+	if (fw_ack == 0 || fw_ack == hw-&gt;mbx.fw_ack)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_poll_for_ack - Wait for message acknowledgment</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if it successfully received a message acknowledgment,</div><div class='add'>+ * else negative errno</div><div class='add'>+ **/</div><div class='add'>+static int mucse_poll_for_ack(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout(mucse_check_for_ack_pf,</div><div class='add'>+				 val, !val, mbx-&gt;delay_us,</div><div class='add'>+				 mbx-&gt;timeout_us,</div><div class='add'>+				 false, hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_write_and_wait_ack_mbx - Write a message to the mailbox, wait for ack</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @msg: the message buffer</div><div class='add'>+ * @size: length of buffer</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if it successfully copied message into the buffer and</div><div class='add'>+ * received an ack to that message within delay * timeout_cnt period</div><div class='add'>+ **/</div><div class='add'>+int mucse_write_and_wait_ack_mbx(struct mucse_hw *hw, u32 *msg, u16 size)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mucse_write_mbx_pf(hw, msg, size);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mucse_poll_for_ack(hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_reset - Reset mbx info, sync info from regs</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * mucse_mbx_reset resets all mbx variables to default.</div><div class='add'>+ **/</div><div class='add'>+static void mucse_mbx_reset(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = mbx_data_rd32(mbx, MUCSE_MBX_FW2PF_CNT);</div><div class='add'>+	hw-&gt;mbx.fw_req = FIELD_GET(GENMASK_U32(15, 0), val);</div><div class='add'>+	hw-&gt;mbx.fw_ack = FIELD_GET(GENMASK_U32(31, 16), val);</div><div class='add'>+	mbx_ctrl_wr32(mbx, MUCSE_MBX_PF2FW_CTRL(mbx), 0);</div><div class='add'>+	mbx_ctrl_wr32(mbx, MUCSE_MBX_FWPF_MASK(mbx), GENMASK_U32(31, 16));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_init_mbx_params_pf - Set initial values for pf mailbox</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * Initializes the hw-&gt;mbx struct to correct values for pf mailbox</div><div class='add'>+ */</div><div class='add'>+void mucse_init_mbx_params_pf(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mucse_mbx_info *mbx = &amp;hw-&gt;mbx;</div><div class='add'>+</div><div class='add'>+	mbx-&gt;delay_us = 100;</div><div class='add'>+	mbx-&gt;timeout_us = 4 * USEC_PER_SEC;</div><div class='add'>+	mutex_init(&amp;mbx-&gt;lock);</div><div class='add'>+	mucse_mbx_reset(hw);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h<br/>new file mode 100644<br/>index 000000000000..e6fcc8d1d3ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2020 - 2025 Mucse Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _RNPGBE_MBX_H</div><div class='add'>+#define _RNPGBE_MBX_H</div><div class='add'>+</div><div class='add'>+#include "rnpgbe.h"</div><div class='add'>+</div><div class='add'>+#define MUCSE_MBX_FW2PF_CNT       0</div><div class='add'>+#define MUCSE_MBX_PF2FW_CNT       4</div><div class='add'>+#define MUCSE_MBX_FWPF_SHM        8</div><div class='add'>+#define MUCSE_MBX_PF2FW_CTRL(mbx) ((mbx)-&gt;pf2fw_mbx_ctrl)</div><div class='add'>+#define MUCSE_MBX_FWPF_MASK(mbx)  ((mbx)-&gt;fwpf_mbx_mask)</div><div class='add'>+#define MUCSE_MBX_REQ             BIT(0) /* Request a req to mailbox */</div><div class='add'>+#define MUCSE_MBX_PFU             BIT(3) /* PF owns the mailbox buffer */</div><div class='add'>+</div><div class='add'>+int mucse_write_and_wait_ack_mbx(struct mucse_hw *hw, u32 *msg, u16 size);</div><div class='add'>+void mucse_init_mbx_params_pf(struct mucse_hw *hw);</div><div class='add'>+int mucse_poll_and_read_mbx(struct mucse_hw *hw, u32 *msg, u16 size);</div><div class='add'>+#endif /* _RNPGBE_MBX_H */</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c<br/>new file mode 100644<br/>index 000000000000..8c8bd5e8e1db<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c</a></div><div class='hunk'>@@ -0,0 +1,191 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2020 - 2025 Mucse Corporation. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rnpgbe.h"</div><div class='add'>+#include "rnpgbe_mbx.h"</div><div class='add'>+#include "rnpgbe_mbx_fw.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_fw_send_cmd_wait_resp - Send cmd req and wait for response</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @req: pointer to the cmd req structure</div><div class='add'>+ * @reply: pointer to the fw reply structure</div><div class='add'>+ *</div><div class='add'>+ * mucse_fw_send_cmd_wait_resp sends req to pf-fw mailbox and wait</div><div class='add'>+ * reply from fw.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+static int mucse_fw_send_cmd_wait_resp(struct mucse_hw *hw,</div><div class='add'>+				       struct mbx_fw_cmd_req *req,</div><div class='add'>+				       struct mbx_fw_cmd_reply *reply)</div><div class='add'>+{</div><div class='add'>+	int len = le16_to_cpu(req-&gt;datalen);</div><div class='add'>+	int retry_cnt = 3;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hw-&gt;mbx.lock);</div><div class='add'>+	err = mucse_write_and_wait_ack_mbx(hw, (u32 *)req, len);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+	do {</div><div class='add'>+		err = mucse_poll_and_read_mbx(hw, (u32 *)reply,</div><div class='add'>+					      sizeof(*reply));</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+		/* mucse_write_and_wait_ack_mbx return 0 means fw has</div><div class='add'>+		 * received request, wait for the expect opcode</div><div class='add'>+		 * reply with 'retry_cnt' times.</div><div class='add'>+		 */</div><div class='add'>+	} while (--retry_cnt &gt;= 0 &amp;&amp; reply-&gt;opcode != req-&gt;opcode);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;hw-&gt;mbx.lock);</div><div class='add'>+	if (!err &amp;&amp; retry_cnt &lt; 0)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	if (!err &amp;&amp; reply-&gt;error_code)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_get_info - Get hw info from fw</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * mucse_mbx_get_info tries to get hw info from hw.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+static int mucse_mbx_get_info(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mbx_fw_cmd_req req = {</div><div class='add'>+		.datalen = cpu_to_le16(MUCSE_MBX_REQ_HDR_LEN),</div><div class='add'>+		.opcode  = cpu_to_le16(GET_HW_INFO),</div><div class='add'>+	};</div><div class='add'>+	struct mbx_fw_cmd_reply reply = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mucse_fw_send_cmd_wait_resp(hw, &amp;req, &amp;reply);</div><div class='add'>+	if (!err)</div><div class='add'>+		hw-&gt;pfvfnum = FIELD_GET(GENMASK_U16(7, 0),</div><div class='add'>+					le16_to_cpu(reply.hw_info.pfnum));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_sync_fw - Try to sync with fw</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * mucse_mbx_sync_fw tries to sync with fw. It is only called in</div><div class='add'>+ * probe. Nothing (register network) todo if failed.</div><div class='add'>+ * Try more times to do sync.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+int mucse_mbx_sync_fw(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	int try_cnt = 3;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		err = mucse_mbx_get_info(hw);</div><div class='add'>+	} while (err == -ETIMEDOUT &amp;&amp; try_cnt--);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_powerup - Echo fw to powerup</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @is_powerup: true for powerup, false for powerdown</div><div class='add'>+ *</div><div class='add'>+ * mucse_mbx_powerup echo fw to change working frequency</div><div class='add'>+ * to normal after received true, and reduce working frequency</div><div class='add'>+ * if false.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+int mucse_mbx_powerup(struct mucse_hw *hw, bool is_powerup)</div><div class='add'>+{</div><div class='add'>+	struct mbx_fw_cmd_req req = {</div><div class='add'>+		.datalen = cpu_to_le16(sizeof(req.powerup) +</div><div class='add'>+				       MUCSE_MBX_REQ_HDR_LEN),</div><div class='add'>+		.opcode  = cpu_to_le16(POWER_UP),</div><div class='add'>+		.powerup = {</div><div class='add'>+			/* fw needs this to reply correct cmd */</div><div class='add'>+			.version = cpu_to_le32(GENMASK_U32(31, 0)),</div><div class='add'>+			.status  = cpu_to_le32(is_powerup ? 1 : 0),</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+	int len, err;</div><div class='add'>+</div><div class='add'>+	len = le16_to_cpu(req.datalen);</div><div class='add'>+	mutex_lock(&amp;hw-&gt;mbx.lock);</div><div class='add'>+	err = mucse_write_and_wait_ack_mbx(hw, (u32 *)&amp;req, len);</div><div class='add'>+	mutex_unlock(&amp;hw-&gt;mbx.lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_reset_hw - Posts a mbx req to reset hw</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ * mucse_mbx_reset_hw posts a mbx req to firmware to reset hw.</div><div class='add'>+ * We use mucse_fw_send_cmd_wait_resp to wait hw reset ok.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+int mucse_mbx_reset_hw(struct mucse_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct mbx_fw_cmd_req req = {</div><div class='add'>+		.datalen = cpu_to_le16(MUCSE_MBX_REQ_HDR_LEN),</div><div class='add'>+		.opcode  = cpu_to_le16(RESET_HW),</div><div class='add'>+	};</div><div class='add'>+	struct mbx_fw_cmd_reply reply = {};</div><div class='add'>+</div><div class='add'>+	return mucse_fw_send_cmd_wait_resp(hw, &amp;req, &amp;reply);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mucse_mbx_get_macaddr - Posts a mbx req to request macaddr</div><div class='add'>+ * @hw: pointer to the HW structure</div><div class='add'>+ * @pfvfnum: index of pf/vf num</div><div class='add'>+ * @mac_addr: pointer to store mac_addr</div><div class='add'>+ * @port: port index</div><div class='add'>+ *</div><div class='add'>+ * mucse_mbx_get_macaddr posts a mbx req to firmware to get mac_addr.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative errno on failure</div><div class='add'>+ **/</div><div class='add'>+int mucse_mbx_get_macaddr(struct mucse_hw *hw, int pfvfnum,</div><div class='add'>+			  u8 *mac_addr,</div><div class='add'>+			  int port)</div><div class='add'>+{</div><div class='add'>+	struct mbx_fw_cmd_req req = {</div><div class='add'>+		.datalen      = cpu_to_le16(sizeof(req.get_mac_addr) +</div><div class='add'>+					    MUCSE_MBX_REQ_HDR_LEN),</div><div class='add'>+		.opcode       = cpu_to_le16(GET_MAC_ADDRESS),</div><div class='add'>+		.get_mac_addr = {</div><div class='add'>+			.port_mask = cpu_to_le32(BIT(port)),</div><div class='add'>+			.pfvf_num  = cpu_to_le32(pfvfnum),</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+	struct mbx_fw_cmd_reply reply = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mucse_fw_send_cmd_wait_resp(hw, &amp;req, &amp;reply);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (le32_to_cpu(reply.mac_addr.ports) &amp; BIT(port))</div><div class='add'>+		memcpy(mac_addr, reply.mac_addr.addrs[port].mac, ETH_ALEN);</div><div class='add'>+	else</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h b/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h<br/>new file mode 100644<br/>index 000000000000..fb24fc12b613<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2020 - 2025 Mucse Corporation. */</div><div class='add'>+</div><div class='add'>+#ifndef _RNPGBE_MBX_FW_H</div><div class='add'>+#define _RNPGBE_MBX_FW_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rnpgbe.h"</div><div class='add'>+</div><div class='add'>+#define MUCSE_MBX_REQ_HDR_LEN 24</div><div class='add'>+</div><div class='add'>+enum MUCSE_FW_CMD {</div><div class='add'>+	GET_HW_INFO     = 0x0601,</div><div class='add'>+	GET_MAC_ADDRESS = 0x0602,</div><div class='add'>+	RESET_HW        = 0x0603,</div><div class='add'>+	POWER_UP        = 0x0803,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mucse_hw_info {</div><div class='add'>+	u8 link_stat;</div><div class='add'>+	u8 port_mask;</div><div class='add'>+	__le32 speed;</div><div class='add'>+	__le16 phy_type;</div><div class='add'>+	__le16 nic_mode;</div><div class='add'>+	__le16 pfnum;</div><div class='add'>+	__le32 fw_version;</div><div class='add'>+	__le32 axi_mhz;</div><div class='add'>+	union {</div><div class='add'>+		u8 port_id[4];</div><div class='add'>+		__le32 port_ids;</div><div class='add'>+	};</div><div class='add'>+	__le32 bd_uid;</div><div class='add'>+	__le32 phy_id;</div><div class='add'>+	__le32 wol_status;</div><div class='add'>+	__le32 ext_info;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct mbx_fw_cmd_req {</div><div class='add'>+	__le16 flags;</div><div class='add'>+	__le16 opcode;</div><div class='add'>+	__le16 datalen;</div><div class='add'>+	__le16 ret_value;</div><div class='add'>+	__le32 cookie_lo;</div><div class='add'>+	__le32 cookie_hi;</div><div class='add'>+	__le32 reply_lo;</div><div class='add'>+	__le32 reply_hi;</div><div class='add'>+	union {</div><div class='add'>+		u8 data[32];</div><div class='add'>+		struct {</div><div class='add'>+			__le32 version;</div><div class='add'>+			__le32 status;</div><div class='add'>+		} powerup;</div><div class='add'>+		struct {</div><div class='add'>+			__le32 port_mask;</div><div class='add'>+			__le32 pfvf_num;</div><div class='add'>+		} get_mac_addr;</div><div class='add'>+	};</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct mbx_fw_cmd_reply {</div><div class='add'>+	__le16 flags;</div><div class='add'>+	__le16 opcode;</div><div class='add'>+	__le16 error_code;</div><div class='add'>+	__le16 datalen;</div><div class='add'>+	__le32 cookie_lo;</div><div class='add'>+	__le32 cookie_hi;</div><div class='add'>+	union {</div><div class='add'>+		u8 data[40];</div><div class='add'>+		struct mac_addr {</div><div class='add'>+			__le32 ports;</div><div class='add'>+			struct _addr {</div><div class='add'>+				/* for macaddr:01:02:03:04:05:06</div><div class='add'>+				 * mac-hi=0x01020304 mac-lo=0x05060000</div><div class='add'>+				 */</div><div class='add'>+				u8 mac[8];</div><div class='add'>+			} addrs[4];</div><div class='add'>+		} mac_addr;</div><div class='add'>+		struct mucse_hw_info hw_info;</div><div class='add'>+	};</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+int mucse_mbx_sync_fw(struct mucse_hw *hw);</div><div class='add'>+int mucse_mbx_powerup(struct mucse_hw *hw, bool is_powerup);</div><div class='add'>+int mucse_mbx_reset_hw(struct mucse_hw *hw);</div><div class='add'>+int mucse_mbx_get_macaddr(struct mucse_hw *hw, int pfvfnum,</div><div class='add'>+			  u8 *mac_addr, int port);</div><div class='add'>+#endif /* _RNPGBE_MBX_FW_H */</div><div class='head'>diff --git a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c<br/>index b7d9657a7af3..7be30a8df268 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/myricom/myri10ge/myri10ge.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/myricom/myri10ge/myri10ge.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/myricom/myri10ge/myri10ge.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/myricom/myri10ge/myri10ge.c</a></div><div class='hunk'>@@ -2482,7 +2482,7 @@ static int myri10ge_close(struct net_device *dev)</div><div class='ctx'> 	if (mgp-&gt;ss[0].tx.req_bytes == NULL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;mgp-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;mgp-&gt;watchdog_timer);</div><div class='ctx'> 	mgp-&gt;running = MYRI10GE_ETH_STOPPING;</div><div class='ctx'> 	for (i = 0; i &lt; mgp-&gt;num_slices; i++)</div><div class='ctx'> 		napi_disable(&amp;mgp-&gt;ss[i].napi);</div><div class='hunk'>@@ -3416,10 +3416,6 @@ static void myri10ge_watchdog(struct work_struct *work)</div><div class='ctx'> 		 * nic was resumed from power saving mode.</div><div class='ctx'> 		 */</div><div class='ctx'> 		pci_restore_state(mgp-&gt;pdev);</div><div class='del'>-</div><div class='del'>-		/* save state again for accounting reasons */</div><div class='del'>-		pci_save_state(mgp-&gt;pdev);</div><div class='del'>-</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* if we get back -1's from our slot, perhaps somebody</div><div class='ctx'> 		 * powered off our card.  Don't try to reset it in</div><div class='hunk'>@@ -3478,7 +3474,7 @@ static void myri10ge_watchdog_timer(struct timer_list *t)</div><div class='ctx'> 	u32 rx_pause_cnt;</div><div class='ctx'> 	u16 cmd;</div><div class='ctx'> </div><div class='del'>-	mgp = from_timer(mgp, t, watchdog_timer);</div><div class='add'>+	mgp = timer_container_of(mgp, t, watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	rx_pause_cnt = ntohl(mgp-&gt;ss[0].fw_stats-&gt;dropped_pause);</div><div class='ctx'> 	busy_slice_cnt = 0;</div><div class='head'>diff --git a/drivers/net/ethernet/natsemi/natsemi.c b/drivers/net/ethernet/natsemi/natsemi.c<br/>index ad0c14849115..b253734dbc80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/natsemi/natsemi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/natsemi/natsemi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/natsemi/natsemi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/natsemi/natsemi.c</a></div><div class='hunk'>@@ -846,7 +846,7 @@ static int natsemi_probe1(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	i = pci_request_regions(pdev, DRV_NAME);</div><div class='add'>+	i = pcim_request_all_regions(pdev, DRV_NAME);</div><div class='ctx'> 	if (i)</div><div class='ctx'> 		goto err_pci_request_regions;</div><div class='ctx'> </div><div class='hunk'>@@ -1786,7 +1786,7 @@ static void init_registers(struct net_device *dev)</div><div class='ctx'>  */</div><div class='ctx'> static void netdev_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_private *np = from_timer(np, t, timer);</div><div class='add'>+	struct netdev_private *np = timer_container_of(np, t, timer);</div><div class='ctx'> 	struct net_device *dev = np-&gt;dev;</div><div class='ctx'> 	void __iomem * ioaddr = ns_ioaddr(dev);</div><div class='ctx'> 	int next_tick = NATSEMI_TIMER_FREQ;</div><div class='hunk'>@@ -3179,7 +3179,7 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 	 * the final WOL settings?</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;np-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;timer);</div><div class='ctx'> 	disable_irq(irq);</div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 	natsemi_irq_disable(dev);</div><div class='hunk'>@@ -3278,7 +3278,7 @@ static int __maybe_unused natsemi_suspend(struct device *dev_d)</div><div class='ctx'> 	if (netif_running (dev)) {</div><div class='ctx'> 		const int irq = np-&gt;pci_dev-&gt;irq;</div><div class='ctx'> </div><div class='del'>-		del_timer_sync(&amp;np-&gt;timer);</div><div class='add'>+		timer_delete_sync(&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 		disable_irq(irq);</div><div class='ctx'> 		spin_lock_irq(&amp;np-&gt;lock);</div><div class='head'>diff --git a/drivers/net/ethernet/natsemi/ns83820.c b/drivers/net/ethernet/natsemi/ns83820.c<br/>index bea969dfa536..cdbf82affa7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/natsemi/ns83820.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/natsemi/ns83820.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/natsemi/ns83820.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/natsemi/ns83820.c</a></div><div class='hunk'>@@ -820,7 +820,7 @@ static void rx_irq(struct net_device *ndev)</div><div class='ctx'> 	struct ns83820 *dev = PRIV(ndev);</div><div class='ctx'> 	struct rx_info *info = &amp;dev-&gt;rx_info;</div><div class='ctx'> 	unsigned next_rx;</div><div class='del'>-	int rx_rc, len;</div><div class='add'>+	int len;</div><div class='ctx'> 	u32 cmdsts;</div><div class='ctx'> 	__le32 *desc;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -881,8 +881,10 @@ static void rx_irq(struct net_device *ndev)</div><div class='ctx'> 		if (likely(CMDSTS_OK &amp; cmdsts)) {</div><div class='ctx'> #endif</div><div class='ctx'> 			skb_put(skb, len);</div><div class='del'>-			if (unlikely(!skb))</div><div class='add'>+			if (unlikely(!skb)) {</div><div class='add'>+				ndev-&gt;stats.rx_dropped++;</div><div class='ctx'> 				goto netdev_mangle_me_harder_failed;</div><div class='add'>+			}</div><div class='ctx'> 			if (cmdsts &amp; CMDSTS_DEST_MULTI)</div><div class='ctx'> 				ndev-&gt;stats.multicast++;</div><div class='ctx'> 			ndev-&gt;stats.rx_packets++;</div><div class='hunk'>@@ -901,15 +903,12 @@ static void rx_irq(struct net_device *ndev)</div><div class='ctx'> 				__vlan_hwaccel_put_tag(skb, htons(ETH_P_IPV6), tag);</div><div class='ctx'> 			}</div><div class='ctx'> #endif</div><div class='del'>-			rx_rc = netif_rx(skb);</div><div class='del'>-			if (NET_RX_DROP == rx_rc) {</div><div class='del'>-netdev_mangle_me_harder_failed:</div><div class='del'>-				ndev-&gt;stats.rx_dropped++;</div><div class='del'>-			}</div><div class='add'>+			netif_rx(skb);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dev_kfree_skb_irq(skb);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+netdev_mangle_me_harder_failed:</div><div class='ctx'> 		nr++;</div><div class='ctx'> 		next_rx = info-&gt;next_rx;</div><div class='ctx'> 		desc = info-&gt;descs + (DESC_SIZE * next_rx);</div><div class='hunk'>@@ -1527,7 +1526,7 @@ static int ns83820_stop(struct net_device *ndev)</div><div class='ctx'> 	struct ns83820 *dev = PRIV(ndev);</div><div class='ctx'> </div><div class='ctx'> 	/* FIXME: protect against interrupt handler? */</div><div class='del'>-	del_timer_sync(&amp;dev-&gt;tx_watchdog);</div><div class='add'>+	timer_delete_sync(&amp;dev-&gt;tx_watchdog);</div><div class='ctx'> </div><div class='ctx'> 	ns83820_disable_interrupts(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1587,7 +1586,7 @@ static void ns83820_tx_timeout(struct net_device *ndev, unsigned int txqueue)</div><div class='ctx'> </div><div class='ctx'> static void ns83820_tx_watch(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ns83820 *dev = from_timer(dev, t, tx_watchdog);</div><div class='add'>+	struct ns83820 *dev = timer_container_of(dev, t, tx_watchdog);</div><div class='ctx'> 	struct net_device *ndev = dev-&gt;ndev;</div><div class='ctx'> </div><div class='ctx'> #if defined(DEBUG)</div><div class='head'>diff --git a/drivers/net/ethernet/neterion/s2io.c b/drivers/net/ethernet/neterion/s2io.c<br/>index f8016dc25e0a..1e55ccb4822b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/neterion/s2io.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/neterion/s2io.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/neterion/s2io.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/neterion/s2io.c</a></div><div class='hunk'>@@ -3425,7 +3425,6 @@ static void s2io_reset(struct s2io_nic *sp)</div><div class='ctx'> </div><div class='ctx'> 		/* Restore the PCI state saved during initialization. */</div><div class='ctx'> 		pci_restore_state(sp-&gt;pdev);</div><div class='del'>-		pci_save_state(sp-&gt;pdev);</div><div class='ctx'> 		pci_read_config_word(sp-&gt;pdev, 0x2, &amp;val16);</div><div class='ctx'> 		if (check_pci_device_id(val16) != (u16)PCI_ANY_ID)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -4195,7 +4194,7 @@ pci_map_failed:</div><div class='ctx'> static void</div><div class='ctx'> s2io_alarm_handle(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct s2io_nic *sp = from_timer(sp, t, alarm_timer);</div><div class='add'>+	struct s2io_nic *sp = timer_container_of(sp, t, alarm_timer);</div><div class='ctx'> 	struct net_device *dev = sp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	s2io_handle_errors(dev);</div><div class='hunk'>@@ -4707,7 +4706,7 @@ static irqreturn_t s2io_isr(int irq, void *dev_id)</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * rx_traffic_int reg is an R1 register, writing all 1's</div><div class='ctx'> 			 * will ensure that the actual interrupt causing bit</div><div class='del'>-			 * get's cleared and hence a read can be avoided.</div><div class='add'>+			 * gets cleared and hence a read can be avoided.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (reason &amp; GEN_INTR_RXTRAFFIC)</div><div class='ctx'> 				writeq(S2IO_MINUS_ONE, &amp;bar0-&gt;rx_traffic_int);</div><div class='hunk'>@@ -4721,7 +4720,7 @@ static irqreturn_t s2io_isr(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='ctx'> 		 * tx_traffic_int reg is an R1 register, writing all 1's</div><div class='del'>-		 * will ensure that the actual interrupt causing bit get's</div><div class='add'>+		 * will ensure that the actual interrupt causing bit gets</div><div class='ctx'> 		 * cleared and hence a read can be avoided.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (reason &amp; GEN_INTR_TXTRAFFIC)</div><div class='hunk'>@@ -7019,7 +7018,7 @@ static void do_s2io_card_down(struct s2io_nic *sp, int do_io)</div><div class='ctx'> 	if (!is_s2io_card_up(sp))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;sp-&gt;alarm_timer);</div><div class='add'>+	timer_delete_sync(&amp;sp-&gt;alarm_timer);</div><div class='ctx'> 	/* If s2io_set_link task is executing, wait till it completes. */</div><div class='ctx'> 	while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &amp;(sp-&gt;state)))</div><div class='ctx'> 		msleep(50);</div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/bpf/cmsg.c b/drivers/net/ethernet/netronome/nfp/bpf/cmsg.c<br/>index 2ec62c8d86e1..59486fe2ad18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/bpf/cmsg.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/bpf/cmsg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/bpf/cmsg.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/bpf/cmsg.c</a></div><div class='hunk'>@@ -20,6 +20,8 @@ nfp_bpf_cmsg_alloc(struct nfp_app_bpf *bpf, unsigned int size)</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 	skb = nfp_app_ctrl_msg_alloc(bpf-&gt;app, size, GFP_KERNEL);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return NULL;</div><div class='ctx'> 	skb_put(skb, size);</div><div class='ctx'> </div><div class='ctx'> 	return skb;</div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/bpf/offload.c b/drivers/net/ethernet/netronome/nfp/bpf/offload.c<br/>index 9d97cd281f18..c03558adda91 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/bpf/offload.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/bpf/offload.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/bpf/offload.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/bpf/offload.c</a></div><div class='hunk'>@@ -458,7 +458,8 @@ int nfp_bpf_event_output(struct nfp_app_bpf *bpf, const void *data,</div><div class='ctx'> 	map_id_full = be64_to_cpu(cbe-&gt;map_ptr);</div><div class='ctx'> 	map_id = map_id_full;</div><div class='ctx'> </div><div class='del'>-	if (len &lt; sizeof(struct cmsg_bpf_event) + pkt_size + data_size)</div><div class='add'>+	if (size_add(pkt_size, data_size) &gt; INT_MAX ||</div><div class='add'>+	    len &lt; sizeof(struct cmsg_bpf_event) + pkt_size + data_size)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (cbe-&gt;hdr.ver != NFP_CCM_ABI_VERSION)</div><div class='ctx'> 		return -EINVAL;</div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/crypto/ipsec.c b/drivers/net/ethernet/netronome/nfp/crypto/ipsec.c<br/>index 515069d5637b..9e7c285eaa6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/crypto/ipsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/crypto/ipsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/crypto/ipsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/crypto/ipsec.c</a></div><div class='hunk'>@@ -266,17 +266,17 @@ static void set_sha2_512hmac(struct nfp_ipsec_cfg_add_sa *cfg, int *trunc_len)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nfp_net_xfrm_add_state(struct xfrm_state *x,</div><div class='add'>+static int nfp_net_xfrm_add_state(struct net_device *dev,</div><div class='add'>+				  struct xfrm_state *x,</div><div class='ctx'> 				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *netdev = x-&gt;xso.real_dev;</div><div class='ctx'> 	struct nfp_ipsec_cfg_mssg msg = {};</div><div class='ctx'> 	int i, key_len, trunc_len, err = 0;</div><div class='ctx'> 	struct nfp_ipsec_cfg_add_sa *cfg;</div><div class='ctx'> 	struct nfp_net *nn;</div><div class='ctx'> 	unsigned int saidx;</div><div class='ctx'> </div><div class='del'>-	nn = netdev_priv(netdev);</div><div class='add'>+	nn = netdev_priv(dev);</div><div class='ctx'> 	cfg = &amp;msg.cfg_add_sa;</div><div class='ctx'> </div><div class='ctx'> 	/* General */</div><div class='hunk'>@@ -546,17 +546,16 @@ static int nfp_net_xfrm_add_state(struct xfrm_state *x,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void nfp_net_xfrm_del_state(struct xfrm_state *x)</div><div class='add'>+static void nfp_net_xfrm_del_state(struct net_device *dev, struct xfrm_state *x)</div><div class='ctx'> {</div><div class='ctx'> 	struct nfp_ipsec_cfg_mssg msg = {</div><div class='ctx'> 		.cmd = NFP_IPSEC_CFG_MSSG_INV_SA,</div><div class='ctx'> 		.sa_idx = x-&gt;xso.offload_handle - 1,</div><div class='ctx'> 	};</div><div class='del'>-	struct net_device *netdev = x-&gt;xso.real_dev;</div><div class='ctx'> 	struct nfp_net *nn;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	nn = netdev_priv(netdev);</div><div class='add'>+	nn = netdev_priv(dev);</div><div class='ctx'> 	err = nfp_net_sched_mbox_amsg_work(nn, NFP_NET_CFG_MBOX_CMD_IPSEC, &amp;msg,</div><div class='ctx'> 					   sizeof(msg), nfp_net_ipsec_cfg);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -565,20 +564,9 @@ static void nfp_net_xfrm_del_state(struct xfrm_state *x)</div><div class='ctx'> 	xa_erase(&amp;nn-&gt;xa_ipsec, x-&gt;xso.offload_handle - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool nfp_net_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *x)</div><div class='del'>-{</div><div class='del'>-	if (x-&gt;props.family == AF_INET)</div><div class='del'>-		/* Offload with IPv4 options is not supported yet */</div><div class='del'>-		return ip_hdr(skb)-&gt;ihl == 5;</div><div class='del'>-</div><div class='del'>-	/* Offload with IPv6 extension headers is not support yet */</div><div class='del'>-	return !(ipv6_ext_hdr(ipv6_hdr(skb)-&gt;nexthdr));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct xfrmdev_ops nfp_net_ipsec_xfrmdev_ops = {</div><div class='ctx'> 	.xdo_dev_state_add = nfp_net_xfrm_add_state,</div><div class='ctx'> 	.xdo_dev_state_delete = nfp_net_xfrm_del_state,</div><div class='del'>-	.xdo_dev_offload_ok = nfp_net_ipsec_offload_ok,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void nfp_net_ipsec_init(struct nfp_net *nn)</div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/crypto/tls.c b/drivers/net/ethernet/netronome/nfp/crypto/tls.c<br/>index f80f1a6953fa..f252ecdcd2cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/crypto/tls.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/crypto/tls.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/crypto/tls.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/crypto/tls.c</a></div><div class='hunk'>@@ -495,14 +495,13 @@ int nfp_net_tls_rx_resync_req(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	switch (ipv6h-&gt;version) {</div><div class='ctx'> 	case 4:</div><div class='del'>-		sk = inet_lookup_established(net, net-&gt;ipv4.tcp_death_row.hashinfo,</div><div class='del'>-					     iph-&gt;saddr, th-&gt;source, iph-&gt;daddr,</div><div class='del'>-					     th-&gt;dest, netdev-&gt;ifindex);</div><div class='add'>+		sk = inet_lookup_established(net, iph-&gt;saddr, th-&gt;source,</div><div class='add'>+					     iph-&gt;daddr, th-&gt;dest,</div><div class='add'>+					     netdev-&gt;ifindex);</div><div class='ctx'> 		break;</div><div class='ctx'> #if IS_ENABLED(CONFIG_IPV6)</div><div class='ctx'> 	case 6:</div><div class='del'>-		sk = __inet6_lookup_established(net, net-&gt;ipv4.tcp_death_row.hashinfo,</div><div class='del'>-						&amp;ipv6h-&gt;saddr, th-&gt;source,</div><div class='add'>+		sk = __inet6_lookup_established(net, &amp;ipv6h-&gt;saddr, th-&gt;source,</div><div class='ctx'> 						&amp;ipv6h-&gt;daddr, ntohs(th-&gt;dest),</div><div class='ctx'> 						netdev-&gt;ifindex, 0);</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/devlink_param.c b/drivers/net/ethernet/netronome/nfp/devlink_param.c<br/>index 0e1a3800f371..85e3b19e6165 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/devlink_param.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/devlink_param.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/devlink_param.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/devlink_param.c</a></div><div class='hunk'>@@ -81,7 +81,8 @@ static const struct nfp_devlink_param_u8_arg nfp_devlink_u8_args[] = {</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> nfp_devlink_param_u8_get(struct devlink *devlink, u32 id,</div><div class='del'>-			 struct devlink_param_gset_ctx *ctx)</div><div class='add'>+			 struct devlink_param_gset_ctx *ctx,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	const struct nfp_devlink_param_u8_arg *arg;</div><div class='ctx'> 	struct nfp_pf *pf = devlink_priv(devlink);</div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/flower/metadata.c b/drivers/net/ethernet/netronome/nfp/flower/metadata.c<br/>index 80e4675582bf..dde60c4572fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/flower/metadata.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/flower/metadata.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/flower/metadata.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/flower/metadata.c</a></div><div class='hunk'>@@ -564,8 +564,8 @@ int nfp_flower_metadata_init(struct nfp_app *app, u64 host_ctx_count,</div><div class='ctx'> </div><div class='ctx'> 	/* Init ring buffer and unallocated stats_ids. */</div><div class='ctx'> 	priv-&gt;stats_ids.free_list.buf =</div><div class='del'>-		vmalloc(array_size(NFP_FL_STATS_ELEM_RS,</div><div class='del'>-				   priv-&gt;stats_ring_size));</div><div class='add'>+		vmalloc_array(priv-&gt;stats_ring_size,</div><div class='add'>+			      NFP_FL_STATS_ELEM_RS);</div><div class='ctx'> 	if (!priv-&gt;stats_ids.free_list.buf)</div><div class='ctx'> 		goto err_free_last_used;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/nfd3/dp.c b/drivers/net/ethernet/netronome/nfp/nfd3/dp.c<br/>index f1c6c47564b1..91a227929a5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfd3/dp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfd3/dp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfd3/dp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/nfd3/dp.c</a></div><div class='hunk'>@@ -779,7 +779,7 @@ nfp_nfd3_parse_meta(struct net_device *netdev, struct nfp_meta_parsed *meta,</div><div class='ctx'> 		case NFP_NET_META_CSUM:</div><div class='ctx'> 			meta-&gt;csum_type = CHECKSUM_COMPLETE;</div><div class='ctx'> 			meta-&gt;csum =</div><div class='del'>-				(__force __wsum)__get_unaligned_cpu32(data);</div><div class='add'>+				(__force __wsum)get_unaligned((u32 *)data);</div><div class='ctx'> 			data += 4;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case NFP_NET_META_RESYNC_INFO:</div><div class='hunk'>@@ -1169,14 +1169,10 @@ int nfp_nfd3_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	if (r_vec-&gt;nfp_net-&gt;rx_coalesce_adapt_on &amp;&amp; r_vec-&gt;rx_ring) {</div><div class='ctx'> 		struct dim_sample dim_sample = {};</div><div class='del'>-		unsigned int start;</div><div class='ctx'> 		u64 pkts, bytes;</div><div class='ctx'> </div><div class='del'>-		do {</div><div class='del'>-			start = u64_stats_fetch_begin(&amp;r_vec-&gt;rx_sync);</div><div class='del'>-			pkts = r_vec-&gt;rx_pkts;</div><div class='del'>-			bytes = r_vec-&gt;rx_bytes;</div><div class='del'>-		} while (u64_stats_fetch_retry(&amp;r_vec-&gt;rx_sync, start));</div><div class='add'>+		pkts = r_vec-&gt;rx_pkts;</div><div class='add'>+		bytes = r_vec-&gt;rx_bytes;</div><div class='ctx'> </div><div class='ctx'> 		dim_update_sample(r_vec-&gt;event_ctr, pkts, bytes, &amp;dim_sample);</div><div class='ctx'> 		net_dim(&amp;r_vec-&gt;rx_dim, &amp;dim_sample);</div><div class='hunk'>@@ -1184,14 +1180,10 @@ int nfp_nfd3_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	if (r_vec-&gt;nfp_net-&gt;tx_coalesce_adapt_on &amp;&amp; r_vec-&gt;tx_ring) {</div><div class='ctx'> 		struct dim_sample dim_sample = {};</div><div class='del'>-		unsigned int start;</div><div class='ctx'> 		u64 pkts, bytes;</div><div class='ctx'> </div><div class='del'>-		do {</div><div class='del'>-			start = u64_stats_fetch_begin(&amp;r_vec-&gt;tx_sync);</div><div class='del'>-			pkts = r_vec-&gt;tx_pkts;</div><div class='del'>-			bytes = r_vec-&gt;tx_bytes;</div><div class='del'>-		} while (u64_stats_fetch_retry(&amp;r_vec-&gt;tx_sync, start));</div><div class='add'>+		pkts = r_vec-&gt;tx_pkts;</div><div class='add'>+		bytes = r_vec-&gt;tx_bytes;</div><div class='ctx'> </div><div class='ctx'> 		dim_update_sample(r_vec-&gt;event_ctr, pkts, bytes, &amp;dim_sample);</div><div class='ctx'> 		net_dim(&amp;r_vec-&gt;tx_dim, &amp;dim_sample);</div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/nfdk/dp.c b/drivers/net/ethernet/netronome/nfp/nfdk/dp.c<br/>index ebeb6ab4465c..ee0db3d5fd66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfdk/dp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfdk/dp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfdk/dp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/nfdk/dp.c</a></div><div class='hunk'>@@ -779,7 +779,7 @@ nfp_nfdk_parse_meta(struct net_device *netdev, struct nfp_meta_parsed *meta,</div><div class='ctx'> 		case NFP_NET_META_CSUM:</div><div class='ctx'> 			meta-&gt;csum_type = CHECKSUM_COMPLETE;</div><div class='ctx'> 			meta-&gt;csum =</div><div class='del'>-				(__force __wsum)__get_unaligned_cpu32(data);</div><div class='add'>+				(__force __wsum)get_unaligned((u32 *)data);</div><div class='ctx'> 			data += 4;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case NFP_NET_META_RESYNC_INFO:</div><div class='hunk'>@@ -1279,14 +1279,10 @@ int nfp_nfdk_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	if (r_vec-&gt;nfp_net-&gt;rx_coalesce_adapt_on &amp;&amp; r_vec-&gt;rx_ring) {</div><div class='ctx'> 		struct dim_sample dim_sample = {};</div><div class='del'>-		unsigned int start;</div><div class='ctx'> 		u64 pkts, bytes;</div><div class='ctx'> </div><div class='del'>-		do {</div><div class='del'>-			start = u64_stats_fetch_begin(&amp;r_vec-&gt;rx_sync);</div><div class='del'>-			pkts = r_vec-&gt;rx_pkts;</div><div class='del'>-			bytes = r_vec-&gt;rx_bytes;</div><div class='del'>-		} while (u64_stats_fetch_retry(&amp;r_vec-&gt;rx_sync, start));</div><div class='add'>+		pkts = r_vec-&gt;rx_pkts;</div><div class='add'>+		bytes = r_vec-&gt;rx_bytes;</div><div class='ctx'> </div><div class='ctx'> 		dim_update_sample(r_vec-&gt;event_ctr, pkts, bytes, &amp;dim_sample);</div><div class='ctx'> 		net_dim(&amp;r_vec-&gt;rx_dim, &amp;dim_sample);</div><div class='hunk'>@@ -1294,14 +1290,10 @@ int nfp_nfdk_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	if (r_vec-&gt;nfp_net-&gt;tx_coalesce_adapt_on &amp;&amp; r_vec-&gt;tx_ring) {</div><div class='ctx'> 		struct dim_sample dim_sample = {};</div><div class='del'>-		unsigned int start;</div><div class='ctx'> 		u64 pkts, bytes;</div><div class='ctx'> </div><div class='del'>-		do {</div><div class='del'>-			start = u64_stats_fetch_begin(&amp;r_vec-&gt;tx_sync);</div><div class='del'>-			pkts = r_vec-&gt;tx_pkts;</div><div class='del'>-			bytes = r_vec-&gt;tx_bytes;</div><div class='del'>-		} while (u64_stats_fetch_retry(&amp;r_vec-&gt;tx_sync, start));</div><div class='add'>+		pkts = r_vec-&gt;tx_pkts;</div><div class='add'>+		bytes = r_vec-&gt;tx_bytes;</div><div class='ctx'> </div><div class='ctx'> 		dim_update_sample(r_vec-&gt;event_ctr, pkts, bytes, &amp;dim_sample);</div><div class='ctx'> 		net_dim(&amp;r_vec-&gt;tx_dim, &amp;dim_sample);</div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/nfp_hwmon.c b/drivers/net/ethernet/netronome/nfp/nfp_hwmon.c<br/>index 0d6c59d6d4ae..ea6a288c0d5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfp_hwmon.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfp_hwmon.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfp_hwmon.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/nfp_hwmon.c</a></div><div class='hunk'>@@ -83,42 +83,12 @@ nfp_hwmon_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 nfp_chip_config[] = {</div><div class='del'>-	HWMON_C_REGISTER_TZ,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info nfp_chip = {</div><div class='del'>-	.type = hwmon_chip,</div><div class='del'>-	.config = nfp_chip_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static u32 nfp_temp_config[] = {</div><div class='del'>-	HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info nfp_temp = {</div><div class='del'>-	.type = hwmon_temp,</div><div class='del'>-	.config = nfp_temp_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static u32 nfp_power_config[] = {</div><div class='del'>-	HWMON_P_INPUT | HWMON_P_MAX,</div><div class='del'>-	HWMON_P_INPUT,</div><div class='del'>-	HWMON_P_INPUT,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info nfp_power = {</div><div class='del'>-	.type = hwmon_power,</div><div class='del'>-	.config = nfp_power_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct hwmon_channel_info * const nfp_hwmon_info[] = {</div><div class='del'>-	&amp;nfp_chip,</div><div class='del'>-	&amp;nfp_temp,</div><div class='del'>-	&amp;nfp_power,</div><div class='add'>+	HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),</div><div class='add'>+	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT),</div><div class='add'>+	HWMON_CHANNEL_INFO(power, HWMON_P_INPUT | HWMON_P_MAX,</div><div class='add'>+			   HWMON_P_INPUT,</div><div class='add'>+			   HWMON_P_INPUT),</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/nfp_main.c b/drivers/net/ethernet/netronome/nfp/nfp_main.c<br/>index 71301dbd8fb5..48390b2fd44d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfp_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfp_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfp_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/nfp_main.c</a></div><div class='hunk'>@@ -797,7 +797,7 @@ static int nfp_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	pf-&gt;pdev = pdev;</div><div class='ctx'> 	pf-&gt;dev_info = dev_info;</div><div class='ctx'> </div><div class='del'>-	pf-&gt;wq = alloc_workqueue("nfp-%s", 0, 2, pci_name(pdev));</div><div class='add'>+	pf-&gt;wq = alloc_workqueue("nfp-%s", WQ_PERCPU, 2, pci_name(pdev));</div><div class='ctx'> 	if (!pf-&gt;wq) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_pci_priv_unset;</div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_common.c b/drivers/net/ethernet/netronome/nfp/nfp_net_common.c<br/>index 6e0929af0f72..9ef72f294117 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfp_net_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfp_net_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfp_net_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/nfp_net_common.c</a></div><div class='hunk'>@@ -159,7 +159,7 @@ static int nfp_net_reconfig_wait(struct nfp_net *nn, unsigned long deadline)</div><div class='ctx'> </div><div class='ctx'> static void nfp_net_reconfig_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct nfp_net *nn = from_timer(nn, t, reconfig_timer);</div><div class='add'>+	struct nfp_net *nn = timer_container_of(nn, t, reconfig_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;nn-&gt;reconfig_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -227,7 +227,7 @@ static void nfp_net_reconfig_sync_enter(struct nfp_net *nn)</div><div class='ctx'> 	spin_unlock_bh(&amp;nn-&gt;reconfig_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (cancelled_timer) {</div><div class='del'>-		del_timer_sync(&amp;nn-&gt;reconfig_timer);</div><div class='add'>+		timer_delete_sync(&amp;nn-&gt;reconfig_timer);</div><div class='ctx'> 		nfp_net_reconfig_wait(nn, nn-&gt;reconfig_timer.expires);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -829,7 +829,7 @@ nfp_net_prepare_vector(struct nfp_net *nn, struct nfp_net_r_vector *r_vec,</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	irq_set_affinity_hint(r_vec-&gt;irq_vector, &amp;r_vec-&gt;affinity_mask);</div><div class='add'>+	irq_update_affinity_hint(r_vec-&gt;irq_vector, &amp;r_vec-&gt;affinity_mask);</div><div class='ctx'> </div><div class='ctx'> 	nn_dbg(nn, "RV%02d: irq=%03d/%03d\n", idx, r_vec-&gt;irq_vector,</div><div class='ctx'> 	       r_vec-&gt;irq_entry);</div><div class='hunk'>@@ -840,7 +840,7 @@ nfp_net_prepare_vector(struct nfp_net *nn, struct nfp_net_r_vector *r_vec,</div><div class='ctx'> static void</div><div class='ctx'> nfp_net_cleanup_vector(struct nfp_net *nn, struct nfp_net_r_vector *r_vec)</div><div class='ctx'> {</div><div class='del'>-	irq_set_affinity_hint(r_vec-&gt;irq_vector, NULL);</div><div class='add'>+	irq_update_affinity_hint(r_vec-&gt;irq_vector, NULL);</div><div class='ctx'> 	nfp_net_napi_del(&amp;nn-&gt;dp, r_vec);</div><div class='ctx'> 	free_irq(r_vec-&gt;irq_vector, r_vec);</div><div class='ctx'> }</div><div class='hunk'>@@ -2394,8 +2394,7 @@ static int nfp_udp_tunnel_sync(struct net_device *netdev, unsigned int table)</div><div class='ctx'> </div><div class='ctx'> static const struct udp_tunnel_nic_info nfp_udp_tunnels = {</div><div class='ctx'> 	.sync_table     = nfp_udp_tunnel_sync,</div><div class='del'>-	.flags          = UDP_TUNNEL_NIC_INFO_MAY_SLEEP |</div><div class='del'>-			  UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='add'>+	.flags          = UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='ctx'> 	.tables         = {</div><div class='ctx'> 		{</div><div class='ctx'> 			.n_entries      = NFP_NET_N_VXLAN_PORTS,</div><div class='hunk'>@@ -2538,7 +2537,7 @@ nfp_net_alloc(struct pci_dev *pdev, const struct nfp_dev_info *dev_info,</div><div class='ctx'> 				  nn-&gt;dp.num_r_vecs, num_online_cpus());</div><div class='ctx'> 	nn-&gt;max_r_vecs = nn-&gt;dp.num_r_vecs;</div><div class='ctx'> </div><div class='del'>-	nn-&gt;dp.xsk_pools = kcalloc(nn-&gt;max_r_vecs, sizeof(nn-&gt;dp.xsk_pools),</div><div class='add'>+	nn-&gt;dp.xsk_pools = kcalloc(nn-&gt;max_r_vecs, sizeof(*nn-&gt;dp.xsk_pools),</div><div class='ctx'> 				   GFP_KERNEL);</div><div class='ctx'> 	if (!nn-&gt;dp.xsk_pools) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -2558,14 +2557,16 @@ nfp_net_alloc(struct pci_dev *pdev, const struct nfp_dev_info *dev_info,</div><div class='ctx'> 	err = nfp_net_tlv_caps_parse(&amp;nn-&gt;pdev-&gt;dev, nn-&gt;dp.ctrl_bar,</div><div class='ctx'> 				     &amp;nn-&gt;tlv_caps);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_free_nn;</div><div class='add'>+		goto err_free_xsk_pools;</div><div class='ctx'> </div><div class='ctx'> 	err = nfp_ccm_mbox_alloc(nn);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_free_nn;</div><div class='add'>+		goto err_free_xsk_pools;</div><div class='ctx'> </div><div class='ctx'> 	return nn;</div><div class='ctx'> </div><div class='add'>+err_free_xsk_pools:</div><div class='add'>+	kfree(nn-&gt;dp.xsk_pools);</div><div class='ctx'> err_free_nn:</div><div class='ctx'> 	if (nn-&gt;dp.netdev)</div><div class='ctx'> 		free_netdev(nn-&gt;dp.netdev);</div><div class='hunk'>@@ -2779,7 +2780,7 @@ static void nfp_net_netdev_init(struct nfp_net *nn)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev-&gt;watchdog_timeo = msecs_to_jiffies(5 * 1000);</div><div class='add'>+	netdev-&gt;watchdog_timeo = secs_to_jiffies(5);</div><div class='ctx'> </div><div class='ctx'> 	/* MTU range: 68 - hw-specific max */</div><div class='ctx'> 	netdev-&gt;min_mtu = ETH_MIN_MTU;</div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_debugfs.c b/drivers/net/ethernet/netronome/nfp/nfp_net_debugfs.c<br/>index d8b735ccf899..d843d1e19715 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfp_net_debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfp_net_debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfp_net_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/nfp_net_debugfs.c</a></div><div class='hunk'>@@ -77,7 +77,7 @@ DEFINE_SHOW_ATTRIBUTE(nfp_rx_q);</div><div class='ctx'> static int nfp_tx_q_show(struct seq_file *file, void *data);</div><div class='ctx'> DEFINE_SHOW_ATTRIBUTE(nfp_tx_q);</div><div class='ctx'> </div><div class='del'>-static int nfp_tx_q_show(struct seq_file *file, void *data)</div><div class='add'>+static int __nfp_tx_q_show(struct seq_file *file, void *data, bool is_xdp)</div><div class='ctx'> {</div><div class='ctx'> 	struct nfp_net_r_vector *r_vec = file-&gt;private;</div><div class='ctx'> 	struct nfp_net_tx_ring *tx_ring;</div><div class='hunk'>@@ -86,10 +86,10 @@ static int nfp_tx_q_show(struct seq_file *file, void *data)</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> </div><div class='del'>-	if (debugfs_real_fops(file-&gt;file) == &amp;nfp_tx_q_fops)</div><div class='del'>-		tx_ring = r_vec-&gt;tx_ring;</div><div class='del'>-	else</div><div class='add'>+	if (is_xdp)</div><div class='ctx'> 		tx_ring = r_vec-&gt;xdp_ring;</div><div class='add'>+	else</div><div class='add'>+		tx_ring = r_vec-&gt;tx_ring;</div><div class='ctx'> 	if (!r_vec-&gt;nfp_net || !tx_ring)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	nn = r_vec-&gt;nfp_net;</div><div class='hunk'>@@ -115,9 +115,14 @@ out:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int nfp_tx_q_show(struct seq_file *file, void *data)</div><div class='add'>+{</div><div class='add'>+	return __nfp_tx_q_show(file, data, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int nfp_xdp_q_show(struct seq_file *file, void *data)</div><div class='ctx'> {</div><div class='del'>-	return nfp_tx_q_show(file, data);</div><div class='add'>+	return __nfp_tx_q_show(file, data, true);</div><div class='ctx'> }</div><div class='ctx'> DEFINE_SHOW_ATTRIBUTE(nfp_xdp_q);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c<br/>index fbca8d0efd85..16c828dd5c1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c</a></div><div class='hunk'>@@ -1303,9 +1303,10 @@ static u32 ethtool_flow_to_nfp_flag(u32 flow_type)</div><div class='ctx'> 	return xlate_ethtool_to_nfp[flow_type];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nfp_net_get_rss_hash_opts(struct nfp_net *nn,</div><div class='del'>-				     struct ethtool_rxnfc *cmd)</div><div class='add'>+static int nfp_net_get_rxfh_fields(struct net_device *netdev,</div><div class='add'>+				   struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='add'>+	struct nfp_net *nn = netdev_priv(netdev);</div><div class='ctx'> 	u32 nfp_rss_flag;</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;data = 0;</div><div class='hunk'>@@ -1451,16 +1452,16 @@ static int nfp_net_get_rxnfc(struct net_device *netdev,</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLALL:</div><div class='ctx'> 		cmd-&gt;data = NFP_FS_MAX_ENTRY;</div><div class='ctx'> 		return nfp_net_get_fs_loc(nn, rule_locs);</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		return nfp_net_get_rss_hash_opts(nn, cmd);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nfp_net_set_rss_hash_opt(struct nfp_net *nn,</div><div class='del'>-				    struct ethtool_rxnfc *nfc)</div><div class='add'>+static int nfp_net_set_rxfh_fields(struct net_device *netdev,</div><div class='add'>+				   const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct nfp_net *nn = netdev_priv(netdev);</div><div class='ctx'> 	u32 new_rss_cfg = nn-&gt;rss_cfg;</div><div class='ctx'> 	u32 nfp_rss_flag;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1763,8 +1764,6 @@ static int nfp_net_set_rxnfc(struct net_device *netdev,</div><div class='ctx'> 	struct nfp_net *nn = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		return nfp_net_set_rss_hash_opt(nn, cmd);</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		return nfp_net_fs_add(nn, cmd);</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLDEL:</div><div class='hunk'>@@ -1789,7 +1788,7 @@ static u32 nfp_net_get_rxfh_key_size(struct net_device *netdev)</div><div class='ctx'> 	struct nfp_net *nn = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (!(nn-&gt;cap &amp; NFP_NET_CFG_CTRL_RSS_ANY))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return nfp_net_rss_key_sz(nn);</div><div class='ctx'> }</div><div class='hunk'>@@ -2506,6 +2505,8 @@ static const struct ethtool_ops nfp_net_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_key_size	= nfp_net_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh		= nfp_net_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= nfp_net_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= nfp_net_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= nfp_net_set_rxfh_fields,</div><div class='ctx'> 	.get_regs_len		= nfp_net_get_regs_len,</div><div class='ctx'> 	.get_regs		= nfp_net_get_regs,</div><div class='ctx'> 	.set_dump		= nfp_app_set_dump,</div><div class='head'>diff --git a/drivers/net/ethernet/nvidia/forcedeth.c b/drivers/net/ethernet/nvidia/forcedeth.c<br/>index 720f577929db..19aa1f1538aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/nvidia/forcedeth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/nvidia/forcedeth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/nvidia/forcedeth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/nvidia/forcedeth.c</a></div><div class='hunk'>@@ -1120,20 +1120,6 @@ static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void nv_napi_enable(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct fe_priv *np = get_nvpriv(dev);</div><div class='del'>-</div><div class='del'>-	napi_enable(&amp;np-&gt;napi);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void nv_napi_disable(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct fe_priv *np = get_nvpriv(dev);</div><div class='del'>-</div><div class='del'>-	napi_disable(&amp;np-&gt;napi);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #define MII_READ	(-1)</div><div class='ctx'> /* mii_rw: read/write a register on the PHY.</div><div class='ctx'>  *</div><div class='hunk'>@@ -1905,7 +1891,7 @@ packet_dropped:</div><div class='ctx'> /* If rx bufs are exhausted called after 50ms to attempt to refresh */</div><div class='ctx'> static void nv_do_rx_refill(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct fe_priv *np = from_timer(np, t, oom_kick);</div><div class='add'>+	struct fe_priv *np = timer_container_of(np, t, oom_kick);</div><div class='ctx'> </div><div class='ctx'> 	/* Just reschedule NAPI rx processing */</div><div class='ctx'> 	napi_schedule(&amp;np-&gt;napi);</div><div class='hunk'>@@ -3114,7 +3100,7 @@ static int nv_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 		 * Changing the MTU is a rare event, it shouldn't matter.</div><div class='ctx'> 		 */</div><div class='ctx'> 		nv_disable_irq(dev);</div><div class='del'>-		nv_napi_disable(dev);</div><div class='add'>+		napi_disable(&amp;np-&gt;napi);</div><div class='ctx'> 		netif_tx_lock_bh(dev);</div><div class='ctx'> 		netif_addr_lock(dev);</div><div class='ctx'> 		spin_lock(&amp;np-&gt;lock);</div><div class='hunk'>@@ -3143,7 +3129,7 @@ static int nv_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 		spin_unlock(&amp;np-&gt;lock);</div><div class='ctx'> 		netif_addr_unlock(dev);</div><div class='ctx'> 		netif_tx_unlock_bh(dev);</div><div class='del'>-		nv_napi_enable(dev);</div><div class='add'>+		napi_enable(&amp;np-&gt;napi);</div><div class='ctx'> 		nv_enable_irq(dev);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -4154,7 +4140,7 @@ static void nv_free_irq(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void nv_do_nic_poll(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct fe_priv *np = from_timer(np, t, nic_poll);</div><div class='add'>+	struct fe_priv *np = timer_container_of(np, t, nic_poll);</div><div class='ctx'> 	struct net_device *dev = np-&gt;dev;</div><div class='ctx'> 	u8 __iomem *base = get_hwbase(dev);</div><div class='ctx'> 	u32 mask = 0;</div><div class='hunk'>@@ -4273,7 +4259,7 @@ static void nv_do_stats_poll(struct timer_list *t)</div><div class='ctx'> 	__acquires(&amp;netdev_priv(dev)-&gt;hwstats_lock)</div><div class='ctx'> 	__releases(&amp;netdev_priv(dev)-&gt;hwstats_lock)</div><div class='ctx'> {</div><div class='del'>-	struct fe_priv *np = from_timer(np, t, stats_poll);</div><div class='add'>+	struct fe_priv *np = timer_container_of(np, t, stats_poll);</div><div class='ctx'> 	struct net_device *dev = np-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	/* If lock is currently taken, the stats are being refreshed</div><div class='hunk'>@@ -4731,7 +4717,7 @@ static int nv_set_ringparam(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		nv_disable_irq(dev);</div><div class='del'>-		nv_napi_disable(dev);</div><div class='add'>+		napi_disable(&amp;np-&gt;napi);</div><div class='ctx'> 		netif_tx_lock_bh(dev);</div><div class='ctx'> 		netif_addr_lock(dev);</div><div class='ctx'> 		spin_lock(&amp;np-&gt;lock);</div><div class='hunk'>@@ -4784,7 +4770,7 @@ static int nv_set_ringparam(struct net_device *dev,</div><div class='ctx'> 		spin_unlock(&amp;np-&gt;lock);</div><div class='ctx'> 		netif_addr_unlock(dev);</div><div class='ctx'> 		netif_tx_unlock_bh(dev);</div><div class='del'>-		nv_napi_enable(dev);</div><div class='add'>+		napi_enable(&amp;np-&gt;napi);</div><div class='ctx'> 		nv_enable_irq(dev);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -5277,7 +5263,7 @@ static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64</div><div class='ctx'> 	if (test-&gt;flags &amp; ETH_TEST_FL_OFFLINE) {</div><div class='ctx'> 		if (netif_running(dev)) {</div><div class='ctx'> 			netif_stop_queue(dev);</div><div class='del'>-			nv_napi_disable(dev);</div><div class='add'>+			napi_disable(&amp;np-&gt;napi);</div><div class='ctx'> 			netif_tx_lock_bh(dev);</div><div class='ctx'> 			netif_addr_lock(dev);</div><div class='ctx'> 			spin_lock_irq(&amp;np-&gt;lock);</div><div class='hunk'>@@ -5334,7 +5320,7 @@ static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64</div><div class='ctx'> 			/* restart rx engine */</div><div class='ctx'> 			nv_start_rxtx(dev);</div><div class='ctx'> 			netif_start_queue(dev);</div><div class='del'>-			nv_napi_enable(dev);</div><div class='add'>+			napi_enable(&amp;np-&gt;napi);</div><div class='ctx'> 			nv_enable_hw_interrupts(dev, np-&gt;irqmask);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5576,6 +5562,7 @@ static int nv_open(struct net_device *dev)</div><div class='ctx'> 	/* ask for interrupts */</div><div class='ctx'> 	nv_enable_hw_interrupts(dev, np-&gt;irqmask);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);</div><div class='ctx'> 	writel(0, base + NvRegMulticastAddrB);</div><div class='hunk'>@@ -5594,7 +5581,7 @@ static int nv_open(struct net_device *dev)</div><div class='ctx'> 	ret = nv_update_linkspeed(dev);</div><div class='ctx'> 	nv_start_rxtx(dev);</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='del'>-	nv_napi_enable(dev);</div><div class='add'>+	napi_enable_locked(&amp;np-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netif_carrier_on(dev);</div><div class='hunk'>@@ -5611,6 +5598,7 @@ static int nv_open(struct net_device *dev)</div><div class='ctx'> 			round_jiffies(jiffies + STATS_INTERVAL));</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* If the loopback feature was set while the device was down, make sure</div><div class='ctx'> 	 * that it's set correctly now.</div><div class='hunk'>@@ -5632,12 +5620,12 @@ static int nv_close(struct net_device *dev)</div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 	np-&gt;in_shutdown = 1;</div><div class='ctx'> 	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='del'>-	nv_napi_disable(dev);</div><div class='add'>+	napi_disable(&amp;np-&gt;napi);</div><div class='ctx'> 	synchronize_irq(np-&gt;pci_dev-&gt;irq);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;np-&gt;oom_kick);</div><div class='del'>-	del_timer_sync(&amp;np-&gt;nic_poll);</div><div class='del'>-	del_timer_sync(&amp;np-&gt;stats_poll);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;oom_kick);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;nic_poll);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;stats_poll);</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='head'>diff --git a/drivers/net/ethernet/oa_tc6.c b/drivers/net/ethernet/oa_tc6.c<br/>index f9c0dcd965c2..91a906a7918a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/oa_tc6.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/oa_tc6.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/oa_tc6.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/oa_tc6.c</a></div><div class='hunk'>@@ -113,6 +113,7 @@ struct oa_tc6 {</div><div class='ctx'> 	struct mii_bus *mdiobus;</div><div class='ctx'> 	struct spi_device *spi;</div><div class='ctx'> 	struct mutex spi_ctrl_lock; /* Protects spi control transfer */</div><div class='add'>+	spinlock_t tx_skb_lock; /* Protects tx skb handling */</div><div class='ctx'> 	void *spi_ctrl_tx_buf;</div><div class='ctx'> 	void *spi_ctrl_rx_buf;</div><div class='ctx'> 	void *spi_data_tx_buf;</div><div class='hunk'>@@ -1004,8 +1005,10 @@ static u16 oa_tc6_prepare_spi_tx_buf_for_tx_skbs(struct oa_tc6 *tc6)</div><div class='ctx'> 	for (used_tx_credits = 0; used_tx_credits &lt; tc6-&gt;tx_credits;</div><div class='ctx'> 	     used_tx_credits++) {</div><div class='ctx'> 		if (!tc6-&gt;ongoing_tx_skb) {</div><div class='add'>+			spin_lock_bh(&amp;tc6-&gt;tx_skb_lock);</div><div class='ctx'> 			tc6-&gt;ongoing_tx_skb = tc6-&gt;waiting_tx_skb;</div><div class='ctx'> 			tc6-&gt;waiting_tx_skb = NULL;</div><div class='add'>+			spin_unlock_bh(&amp;tc6-&gt;tx_skb_lock);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!tc6-&gt;ongoing_tx_skb)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1111,8 +1114,9 @@ static int oa_tc6_spi_thread_handler(void *data)</div><div class='ctx'> 		/* This kthread will be waken up if there is a tx skb or mac-phy</div><div class='ctx'> 		 * interrupt to perform spi transfer with tx chunks.</div><div class='ctx'> 		 */</div><div class='del'>-		wait_event_interruptible(tc6-&gt;spi_wq, tc6-&gt;waiting_tx_skb ||</div><div class='del'>-					 tc6-&gt;int_flag ||</div><div class='add'>+		wait_event_interruptible(tc6-&gt;spi_wq, tc6-&gt;int_flag ||</div><div class='add'>+					 (tc6-&gt;waiting_tx_skb &amp;&amp;</div><div class='add'>+					 tc6-&gt;tx_credits) ||</div><div class='ctx'> 					 kthread_should_stop());</div><div class='ctx'> </div><div class='ctx'> 		if (kthread_should_stop())</div><div class='hunk'>@@ -1209,7 +1213,9 @@ netdev_tx_t oa_tc6_start_xmit(struct oa_tc6 *tc6, struct sk_buff *skb)</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;tc6-&gt;tx_skb_lock);</div><div class='ctx'> 	tc6-&gt;waiting_tx_skb = skb;</div><div class='add'>+	spin_unlock_bh(&amp;tc6-&gt;tx_skb_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Wake spi kthread to perform spi transfer */</div><div class='ctx'> 	wake_up_interruptible(&amp;tc6-&gt;spi_wq);</div><div class='hunk'>@@ -1239,10 +1245,12 @@ struct oa_tc6 *oa_tc6_init(struct spi_device *spi, struct net_device *netdev)</div><div class='ctx'> 	tc6-&gt;netdev = netdev;</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;spi-&gt;dev);</div><div class='ctx'> 	mutex_init(&amp;tc6-&gt;spi_ctrl_lock);</div><div class='add'>+	spin_lock_init(&amp;tc6-&gt;tx_skb_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Set the SPI controller to pump at realtime priority */</div><div class='ctx'> 	tc6-&gt;spi-&gt;rt = true;</div><div class='del'>-	spi_setup(tc6-&gt;spi);</div><div class='add'>+	if (spi_setup(tc6-&gt;spi) &lt; 0)</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	tc6-&gt;spi_ctrl_tx_buf = devm_kzalloc(&amp;tc6-&gt;spi-&gt;dev,</div><div class='ctx'> 					    OA_TC6_CTRL_SPI_BUF_SIZE,</div><div class='head'>diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c<br/>index 4ac29cd59f2b..62f05f4569b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c</a></div><div class='hunk'>@@ -198,23 +198,21 @@ pch_tx_timestamp(struct pch_gbe_adapter *adapter, struct sk_buff *skb)</div><div class='ctx'> 	pch_ch_event_write(pdev, TX_SNAPSHOT_LOCKED);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='add'>+static int pch_gbe_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='ctx'> 	struct pch_gbe_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	u8 station[20];</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='ctx'> 	/* Get ieee1588's dev information */</div><div class='ctx'> 	pdev = adapter-&gt;ptp_pdev;</div><div class='ctx'> </div><div class='del'>-	if (cfg.tx_type != HWTSTAMP_TX_OFF &amp;&amp; cfg.tx_type != HWTSTAMP_TX_ON)</div><div class='add'>+	if (cfg-&gt;tx_type != HWTSTAMP_TX_OFF &amp;&amp; cfg-&gt;tx_type != HWTSTAMP_TX_ON)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='del'>-	switch (cfg.rx_filter) {</div><div class='add'>+	switch (cfg-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		adapter-&gt;hwts_rx_en = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -223,17 +221,17 @@ static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='ctx'> 		pch_ch_control_write(pdev, SLAVE_MODE | CAP_MODE0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='del'>-		adapter-&gt;hwts_rx_en = 1;</div><div class='add'>+		adapter-&gt;hwts_rx_en = cfg-&gt;rx_filter;</div><div class='ctx'> 		pch_ch_control_write(pdev, MASTER_MODE | CAP_MODE0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='del'>-		adapter-&gt;hwts_rx_en = 1;</div><div class='add'>+		adapter-&gt;hwts_rx_en = cfg-&gt;rx_filter;</div><div class='ctx'> 		pch_ch_control_write(pdev, V2_MODE | CAP_MODE2);</div><div class='ctx'> 		strcpy(station, PTP_L4_MULTICAST_SA);</div><div class='ctx'> 		pch_set_station_address(station, pdev);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='del'>-		adapter-&gt;hwts_rx_en = 1;</div><div class='add'>+		adapter-&gt;hwts_rx_en = cfg-&gt;rx_filter;</div><div class='ctx'> 		pch_ch_control_write(pdev, V2_MODE | CAP_MODE2);</div><div class='ctx'> 		strcpy(station, PTP_L2_MULTICAST_SA);</div><div class='ctx'> 		pch_set_station_address(station, pdev);</div><div class='hunk'>@@ -242,12 +240,23 @@ static int hwtstamp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;hwts_tx_en = cfg.tx_type == HWTSTAMP_TX_ON;</div><div class='add'>+	adapter-&gt;hwts_tx_en = cfg-&gt;tx_type == HWTSTAMP_TX_ON;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear out any old time stamps. */</div><div class='ctx'> 	pch_ch_event_write(pdev, TX_SNAPSHOT_LOCKED | RX_SNAPSHOT_LOCKED);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pch_gbe_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='add'>+	struct pch_gbe_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	cfg-&gt;tx_type = adapter-&gt;hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='add'>+	cfg-&gt;rx_filter = adapter-&gt;hwts_rx_en;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pch_gbe_mac_load_mac_addr(struct pch_gbe_hw *hw)</div><div class='hunk'>@@ -1014,8 +1023,8 @@ static void pch_gbe_set_mode(struct pch_gbe_adapter *adapter, u16 speed,</div><div class='ctx'>  */</div><div class='ctx'> static void pch_gbe_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct pch_gbe_adapter *adapter = from_timer(adapter, t,</div><div class='del'>-						     watchdog_timer);</div><div class='add'>+	struct pch_gbe_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							     watchdog_timer);</div><div class='ctx'> 	struct net_device *netdev = adapter-&gt;netdev;</div><div class='ctx'> 	struct pch_gbe_hw *hw = &amp;adapter-&gt;hw;</div><div class='ctx'> </div><div class='hunk'>@@ -1916,7 +1925,7 @@ void pch_gbe_down(struct pch_gbe_adapter *adapter)</div><div class='ctx'> 	pch_gbe_irq_disable(adapter);</div><div class='ctx'> 	pch_gbe_free_irq(adapter);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;tx_queue_len = adapter-&gt;tx_queue_len;</div><div class='ctx'> 	netif_carrier_off(netdev);</div><div class='hunk'>@@ -2234,9 +2243,6 @@ static int pch_gbe_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(netdev, "cmd : 0x%04x\n", cmd);</div><div class='ctx'> </div><div class='del'>-	if (cmd == SIOCSHWTSTAMP)</div><div class='del'>-		return hwtstamp_ioctl(netdev, ifr, cmd);</div><div class='del'>-</div><div class='ctx'> 	return generic_mii_ioctl(&amp;adapter-&gt;mii, if_mii(ifr), cmd, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2328,6 +2334,8 @@ static const struct net_device_ops pch_gbe_netdev_ops = {</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller = pch_gbe_netpoll,</div><div class='ctx'> #endif</div><div class='add'>+	.ndo_hwtstamp_get = pch_gbe_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = pch_gbe_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static pci_ers_result_t pch_gbe_io_error_detected(struct pci_dev *pdev,</div><div class='head'>diff --git a/drivers/net/ethernet/packetengines/hamachi.c b/drivers/net/ethernet/packetengines/hamachi.c<br/>index a36d422b5173..b0de7e9f12a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/packetengines/hamachi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/packetengines/hamachi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/packetengines/hamachi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/packetengines/hamachi.c</a></div><div class='hunk'>@@ -1025,7 +1025,7 @@ static inline int hamachi_tx(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void hamachi_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct hamachi_private *hmp = from_timer(hmp, t, timer);</div><div class='add'>+	struct hamachi_private *hmp = timer_container_of(hmp, t, timer);</div><div class='ctx'> 	struct net_device *dev = hmp-&gt;mii_if.dev;</div><div class='ctx'> 	void __iomem *ioaddr = hmp-&gt;base;</div><div class='ctx'> 	int next_tick = 10*HZ;</div><div class='hunk'>@@ -1712,7 +1712,7 @@ static int hamachi_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	free_irq(hmp-&gt;pci_dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;hmp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;hmp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Free all the skbuffs in the Rx queue. */</div><div class='ctx'> 	for (i = 0; i &lt; RX_RING_SIZE; i++) {</div><div class='head'>diff --git a/drivers/net/ethernet/packetengines/yellowfin.c b/drivers/net/ethernet/packetengines/yellowfin.c<br/>index c0515dc63246..1e25ac13a7d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/packetengines/yellowfin.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/packetengines/yellowfin.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/packetengines/yellowfin.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/packetengines/yellowfin.c</a></div><div class='hunk'>@@ -652,7 +652,7 @@ err_free_irq:</div><div class='ctx'> </div><div class='ctx'> static void yellowfin_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct yellowfin_private *yp = from_timer(yp, t, timer);</div><div class='add'>+	struct yellowfin_private *yp = timer_container_of(yp, t, timer);</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(yp-&gt;pci_dev);</div><div class='ctx'> 	void __iomem *ioaddr = yp-&gt;base;</div><div class='ctx'> 	int next_tick = 60*HZ;</div><div class='hunk'>@@ -1222,7 +1222,7 @@ static int yellowfin_close(struct net_device *dev)</div><div class='ctx'> 	iowrite32(0x80000000, ioaddr + RxCtrl);</div><div class='ctx'> 	iowrite32(0x80000000, ioaddr + TxCtrl);</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;yp-&gt;timer);</div><div class='add'>+	timer_delete(&amp;yp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> #if defined(__i386__)</div><div class='ctx'> 	if (yellowfin_debug &gt; 2) {</div><div class='head'>diff --git a/drivers/net/ethernet/pasemi/pasemi_mac.c b/drivers/net/ethernet/pasemi/pasemi_mac.c<br/>index cb4e12df7719..fe58024b5901 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pasemi/pasemi_mac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pasemi/pasemi_mac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pasemi/pasemi_mac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pasemi/pasemi_mac.c</a></div><div class='hunk'>@@ -934,7 +934,8 @@ static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)</div><div class='ctx'> </div><div class='ctx'> static void pasemi_mac_tx_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct pasemi_mac_txring *txring = from_timer(txring, t, clean_timer);</div><div class='add'>+	struct pasemi_mac_txring *txring = timer_container_of(txring, t,</div><div class='add'>+							      clean_timer);</div><div class='ctx'> 	struct pasemi_mac *mac = txring-&gt;mac;</div><div class='ctx'> </div><div class='ctx'> 	pasemi_mac_clean_tx(txring);</div><div class='hunk'>@@ -1288,7 +1289,7 @@ static int pasemi_mac_close(struct net_device *dev)</div><div class='ctx'> 		phy_disconnect(dev-&gt;phydev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;mac-&gt;tx-&gt;clean_timer);</div><div class='add'>+	timer_delete_sync(&amp;mac-&gt;tx-&gt;clean_timer);</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	napi_disable(&amp;mac-&gt;napi);</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/Kconfig b/drivers/net/ethernet/pensando/Kconfig<br/>index 01fe76786f77..c99758adf3ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/Kconfig</a></div><div class='hunk'>@@ -24,6 +24,7 @@ config IONIC</div><div class='ctx'> 	select NET_DEVLINK</div><div class='ctx'> 	select DIMLIB</div><div class='ctx'> 	select PAGE_POOL</div><div class='add'>+	select AUXILIARY_BUS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This enables the support for the Pensando family of Ethernet</div><div class='ctx'> 	  adapters.  More specific information on this driver can be</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/Makefile b/drivers/net/ethernet/pensando/ionic/Makefile<br/>index 4e7642a2d25f..a598972fef41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/Makefile</a></div><div class='hunk'>@@ -5,5 +5,5 @@ obj-$(CONFIG_IONIC) := ionic.o</div><div class='ctx'> </div><div class='ctx'> ionic-y := ionic_main.o ionic_bus_pci.o ionic_devlink.o ionic_dev.o \</div><div class='ctx'> 	   ionic_debugfs.o ionic_lif.o ionic_rx_filter.o ionic_ethtool.o \</div><div class='del'>-	   ionic_txrx.o ionic_stats.o ionic_fw.o</div><div class='add'>+	   ionic_txrx.o ionic_stats.o ionic_fw.o ionic_aux.o</div><div class='ctx'> ionic-$(CONFIG_PTP_1588_CLOCK) += ionic_phc.o</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic.h b/drivers/net/ethernet/pensando/ionic/ionic.h<br/>index 1c61390677f7..85198e6a806e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic.h</a></div><div class='hunk'>@@ -18,8 +18,6 @@ struct ionic_lif;</div><div class='ctx'> #define PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF	0x1002</div><div class='ctx'> #define PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF	0x1003</div><div class='ctx'> </div><div class='del'>-#define IONIC_ASIC_TYPE_ELBA	2</div><div class='del'>-</div><div class='ctx'> #define DEVCMD_TIMEOUT			5</div><div class='ctx'> #define IONIC_ADMINQ_TIME_SLICE		msecs_to_jiffies(100)</div><div class='ctx'> </div><div class='hunk'>@@ -59,7 +57,6 @@ struct ionic {</div><div class='ctx'> 	DECLARE_BITMAP(intrs, IONIC_INTR_CTRL_REGS_MAX);</div><div class='ctx'> 	cpumask_var_t *affinity_masks;</div><div class='ctx'> 	struct delayed_work doorbell_check_dwork;</div><div class='del'>-	struct work_struct nb_work;</div><div class='ctx'> 	struct notifier_block nb;</div><div class='ctx'> 	struct rw_semaphore vf_op_lock;	/* lock for VF operations */</div><div class='ctx'> 	struct ionic_vf *vfs;</div><div class='hunk'>@@ -68,16 +65,9 @@ struct ionic {</div><div class='ctx'> 	int watchdog_period;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ionic_admin_ctx {</div><div class='del'>-	struct completion work;</div><div class='del'>-	union ionic_adminq_cmd cmd;</div><div class='del'>-	union ionic_adminq_comp comp;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);</div><div class='ctx'> int ionic_adminq_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx,</div><div class='ctx'> 		      const int err, const bool do_msg);</div><div class='del'>-int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);</div><div class='ctx'> int ionic_adminq_post_wait_nomsg(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);</div><div class='ctx'> void ionic_adminq_netdev_err_print(struct ionic_lif *lif, u8 opcode,</div><div class='ctx'> 				   u8 status, int err);</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_api.h b/drivers/net/ethernet/pensando/ionic/ionic_api.h<br/>new file mode 100644<br/>index 000000000000..bd88666836b8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_api.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_api.h</a></div><div class='hunk'>@@ -0,0 +1,131 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (C) 2018-2025, Advanced Micro Devices, Inc. */</div><div class='add'>+</div><div class='add'>+#ifndef _IONIC_API_H_</div><div class='add'>+#define _IONIC_API_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/auxiliary_bus.h&gt;</div><div class='add'>+#include "ionic_if.h"</div><div class='add'>+#include "ionic_regs.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ionic_aux_dev - Auxiliary device information</div><div class='add'>+ * @lif:        Logical interface</div><div class='add'>+ * @idx:        Index identifier</div><div class='add'>+ * @adev:       Auxiliary device</div><div class='add'>+ */</div><div class='add'>+struct ionic_aux_dev {</div><div class='add'>+	struct ionic_lif *lif;</div><div class='add'>+	int idx;</div><div class='add'>+	struct auxiliary_device adev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ionic_admin_ctx - Admin command context</div><div class='add'>+ * @work:       Work completion wait queue element</div><div class='add'>+ * @cmd:        Admin command (64B) to be copied to the queue</div><div class='add'>+ * @comp:       Admin completion (16B) copied from the queue</div><div class='add'>+ */</div><div class='add'>+struct ionic_admin_ctx {</div><div class='add'>+	struct completion work;</div><div class='add'>+	union ionic_adminq_cmd cmd;</div><div class='add'>+	union ionic_adminq_comp comp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define IONIC_INTR_INDEX_NOT_ASSIGNED	-1</div><div class='add'>+#define IONIC_INTR_NAME_MAX_SZ		32</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ionic_intr_info - Interrupt information</div><div class='add'>+ * @name:          Name identifier</div><div class='add'>+ * @rearm_count:   Interrupt rearm count</div><div class='add'>+ * @index:         Interrupt index position</div><div class='add'>+ * @vector:        Interrupt number</div><div class='add'>+ * @dim_coal_hw:   Interrupt coalesce value in hardware units</div><div class='add'>+ * @affinity_mask: CPU affinity mask</div><div class='add'>+ * @aff_notify:    context for notification of IRQ affinity changes</div><div class='add'>+ */</div><div class='add'>+struct ionic_intr_info {</div><div class='add'>+	char name[IONIC_INTR_NAME_MAX_SZ];</div><div class='add'>+	u64 rearm_count;</div><div class='add'>+	unsigned int index;</div><div class='add'>+	unsigned int vector;</div><div class='add'>+	u32 dim_coal_hw;</div><div class='add'>+	cpumask_var_t *affinity_mask;</div><div class='add'>+	struct irq_affinity_notify aff_notify;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ionic_adminq_post_wait - Post an admin command and wait for response</div><div class='add'>+ * @lif:        Logical interface</div><div class='add'>+ * @ctx:        API admin command context</div><div class='add'>+ *</div><div class='add'>+ * Post the command to an admin queue in the ethernet driver.  If this command</div><div class='add'>+ * succeeds, then the command has been posted, but that does not indicate a</div><div class='add'>+ * completion.  If this command returns success, then the completion callback</div><div class='add'>+ * will eventually be called.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero or negative error status</div><div class='add'>+ */</div><div class='add'>+int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ionic_error_to_errno - Transform ionic_if errors to os errno</div><div class='add'>+ * @code:       Ionic error number</div><div class='add'>+ *</div><div class='add'>+ * Return:      Negative OS error number or zero</div><div class='add'>+ */</div><div class='add'>+int ionic_error_to_errno(enum ionic_status_code code);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ionic_request_rdma_reset - request reset or disable the device or lif</div><div class='add'>+ * @lif:        Logical interface</div><div class='add'>+ *</div><div class='add'>+ * The reset is triggered asynchronously. It will wait until reset request</div><div class='add'>+ * completes or times out.</div><div class='add'>+ */</div><div class='add'>+void ionic_request_rdma_reset(struct ionic_lif *lif);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ionic_intr_alloc - Reserve a device interrupt</div><div class='add'>+ * @lif:        Logical interface</div><div class='add'>+ * @intr:       Reserved ionic interrupt structure</div><div class='add'>+ *</div><div class='add'>+ * Reserve an interrupt index and get irq number for that index.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero or negative error status</div><div class='add'>+ */</div><div class='add'>+int ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ionic_intr_free - Release a device interrupt index</div><div class='add'>+ * @lif:        Logical interface</div><div class='add'>+ * @intr:       Interrupt index</div><div class='add'>+ *</div><div class='add'>+ * Mark the interrupt index unused so that it can be reserved again.</div><div class='add'>+ */</div><div class='add'>+void ionic_intr_free(struct ionic_lif *lif, int intr);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ionic_get_cmb - Reserve cmb pages</div><div class='add'>+ * @lif:         Logical interface</div><div class='add'>+ * @pgid:        First page index</div><div class='add'>+ * @pgaddr:      First page bus addr (contiguous)</div><div class='add'>+ * @order:       Log base two number of pages (PAGE_SIZE)</div><div class='add'>+ * @stride_log2: Size of stride to determine CMB pool</div><div class='add'>+ * @expdb:       Will be set to true if this CMB region has expdb enabled</div><div class='add'>+ *</div><div class='add'>+ * Return: zero or negative error status</div><div class='add'>+ */</div><div class='add'>+int ionic_get_cmb(struct ionic_lif *lif, u32 *pgid, phys_addr_t *pgaddr,</div><div class='add'>+		  int order, u8 stride_log2, bool *expdb);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ionic_put_cmb - Release cmb pages</div><div class='add'>+ * @lif:        Logical interface</div><div class='add'>+ * @pgid:       First page index</div><div class='add'>+ * @order:      Log base two number of pages (PAGE_SIZE)</div><div class='add'>+ */</div><div class='add'>+void ionic_put_cmb(struct ionic_lif *lif, u32 pgid, int order);</div><div class='add'>+</div><div class='add'>+#endif /* _IONIC_API_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_aux.c b/drivers/net/ethernet/pensando/ionic/ionic_aux.c<br/>new file mode 100644<br/>index 000000000000..a2be338eb3e5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_aux.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_aux.c</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (C) 2018-2025, Advanced Micro Devices, Inc. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include "ionic.h"</div><div class='add'>+#include "ionic_lif.h"</div><div class='add'>+#include "ionic_aux.h"</div><div class='add'>+</div><div class='add'>+static DEFINE_IDA(aux_ida);</div><div class='add'>+</div><div class='add'>+static void ionic_auxbus_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ionic_aux_dev *ionic_adev;</div><div class='add'>+</div><div class='add'>+	ionic_adev = container_of(dev, struct ionic_aux_dev, adev.dev);</div><div class='add'>+	ida_free(&amp;aux_ida, ionic_adev-&gt;adev.id);</div><div class='add'>+	kfree(ionic_adev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ionic_auxbus_register(struct ionic_lif *lif)</div><div class='add'>+{</div><div class='add'>+	struct ionic_aux_dev *ionic_adev;</div><div class='add'>+	struct auxiliary_device *aux_dev;</div><div class='add'>+	int err, id;</div><div class='add'>+</div><div class='add'>+	if (!(le64_to_cpu(lif-&gt;ionic-&gt;ident.lif.capabilities) &amp; IONIC_LIF_CAP_RDMA))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ionic_adev = kzalloc(sizeof(*ionic_adev), GFP_KERNEL);</div><div class='add'>+	if (!ionic_adev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	aux_dev = &amp;ionic_adev-&gt;adev;</div><div class='add'>+</div><div class='add'>+	id = ida_alloc(&amp;aux_ida, GFP_KERNEL);</div><div class='add'>+	if (id &lt; 0) {</div><div class='add'>+		dev_err(lif-&gt;ionic-&gt;dev, "Failed to allocate aux id: %d\n", id);</div><div class='add'>+		kfree(ionic_adev);</div><div class='add'>+		return id;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aux_dev-&gt;id = id;</div><div class='add'>+	aux_dev-&gt;name = "rdma";</div><div class='add'>+	aux_dev-&gt;dev.parent = &amp;lif-&gt;ionic-&gt;pdev-&gt;dev;</div><div class='add'>+	aux_dev-&gt;dev.release = ionic_auxbus_release;</div><div class='add'>+	ionic_adev-&gt;lif = lif;</div><div class='add'>+	err = auxiliary_device_init(aux_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(lif-&gt;ionic-&gt;dev, "Failed to initialize %s aux device: %d\n",</div><div class='add'>+			aux_dev-&gt;name, err);</div><div class='add'>+		ida_free(&amp;aux_ida, id);</div><div class='add'>+		kfree(ionic_adev);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = auxiliary_device_add(aux_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(lif-&gt;ionic-&gt;dev, "Failed to add %s aux device: %d\n",</div><div class='add'>+			aux_dev-&gt;name, err);</div><div class='add'>+		auxiliary_device_uninit(aux_dev);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lif-&gt;ionic_adev = ionic_adev;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ionic_auxbus_unregister(struct ionic_lif *lif)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;lif-&gt;adev_lock);</div><div class='add'>+	if (!lif-&gt;ionic_adev)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	auxiliary_device_delete(&amp;lif-&gt;ionic_adev-&gt;adev);</div><div class='add'>+	auxiliary_device_uninit(&amp;lif-&gt;ionic_adev-&gt;adev);</div><div class='add'>+</div><div class='add'>+	lif-&gt;ionic_adev = NULL;</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;lif-&gt;adev_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ionic_request_rdma_reset(struct ionic_lif *lif)</div><div class='add'>+{</div><div class='add'>+	struct ionic *ionic = lif-&gt;ionic;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	union ionic_dev_cmd cmd = {</div><div class='add'>+		.cmd.opcode = IONIC_CMD_RDMA_RESET_LIF,</div><div class='add'>+		.cmd.lif_index = cpu_to_le16(lif-&gt;index),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ionic-&gt;dev_cmd_lock);</div><div class='add'>+</div><div class='add'>+	ionic_dev_cmd_go(&amp;ionic-&gt;idev, &amp;cmd);</div><div class='add'>+	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ionic-&gt;dev_cmd_lock);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		pr_warn("%s request_reset: error %d\n", __func__, err);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS(ionic_request_rdma_reset, "NET_IONIC");</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_aux.h b/drivers/net/ethernet/pensando/ionic/ionic_aux.h<br/>new file mode 100644<br/>index 000000000000..f5528a9f187d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_aux.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_aux.h</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (C) 2018-2025, Advanced Micro Devices, Inc. */</div><div class='add'>+</div><div class='add'>+#ifndef _IONIC_AUX_H_</div><div class='add'>+#define _IONIC_AUX_H_</div><div class='add'>+</div><div class='add'>+int ionic_auxbus_register(struct ionic_lif *lif);</div><div class='add'>+void ionic_auxbus_unregister(struct ionic_lif *lif);</div><div class='add'>+</div><div class='add'>+#endif /* _IONIC_AUX_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c b/drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c<br/>index b93791d6b593..70d86c5f52fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include "ionic.h"</div><div class='ctx'> #include "ionic_bus.h"</div><div class='ctx'> #include "ionic_lif.h"</div><div class='add'>+#include "ionic_aux.h"</div><div class='ctx'> #include "ionic_debugfs.h"</div><div class='ctx'> </div><div class='ctx'> /* Supported devices */</div><div class='hunk'>@@ -271,6 +272,8 @@ static int ionic_setup_one(struct ionic *ionic)</div><div class='ctx'> 	}</div><div class='ctx'> 	ionic_debugfs_add_ident(ionic);</div><div class='ctx'> </div><div class='add'>+	ionic_map_cmb(ionic);</div><div class='add'>+</div><div class='ctx'> 	err = ionic_init(ionic);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "Cannot init device: %d, aborting\n", err);</div><div class='hunk'>@@ -375,6 +378,8 @@ static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		goto err_out_deregister_devlink;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ionic_auxbus_register(ionic-&gt;lif);</div><div class='add'>+</div><div class='ctx'> 	mod_timer(&amp;ionic-&gt;watchdog_timer,</div><div class='ctx'> 		  round_jiffies(jiffies + ionic-&gt;watchdog_period));</div><div class='ctx'> 	ionic_queue_doorbell_check(ionic, IONIC_NAPI_DEADLINE);</div><div class='hunk'>@@ -394,6 +399,7 @@ err_out_free_irqs:</div><div class='ctx'> err_out_pci:</div><div class='ctx'> 	ionic_dev_teardown(ionic);</div><div class='ctx'> 	ionic_clear_pci(ionic);</div><div class='add'>+	ionic_debugfs_del_dev(ionic);</div><div class='ctx'> err_out:</div><div class='ctx'> 	mutex_destroy(&amp;ionic-&gt;dev_cmd_lock);</div><div class='ctx'> 	ionic_devlink_free(ionic);</div><div class='hunk'>@@ -408,12 +414,14 @@ static void ionic_remove(struct pci_dev *pdev)</div><div class='ctx'> 	timer_shutdown_sync(&amp;ionic-&gt;watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (ionic-&gt;lif) {</div><div class='add'>+		cancel_work_sync(&amp;ionic-&gt;lif-&gt;deferred.work);</div><div class='ctx'> 		/* prevent adminq cmds if already known as down */</div><div class='ctx'> 		if (test_and_clear_bit(IONIC_LIF_F_FW_RESET, ionic-&gt;lif-&gt;state))</div><div class='ctx'> 			set_bit(IONIC_LIF_F_FW_STOPPING, ionic-&gt;lif-&gt;state);</div><div class='ctx'> </div><div class='ctx'> 		if (ionic-&gt;lif-&gt;doorbell_wa)</div><div class='ctx'> 			cancel_delayed_work_sync(&amp;ionic-&gt;doorbell_check_dwork);</div><div class='add'>+		ionic_auxbus_unregister(ionic-&gt;lif);</div><div class='ctx'> 		ionic_lif_unregister(ionic-&gt;lif);</div><div class='ctx'> 		ionic_devlink_unregister(ionic);</div><div class='ctx'> 		ionic_lif_deinit(ionic-&gt;lif);</div><div class='hunk'>@@ -440,9 +448,10 @@ static void ionic_reset_prepare(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	set_bit(IONIC_LIF_F_FW_RESET, lif-&gt;state);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ionic-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;ionic-&gt;watchdog_timer);</div><div class='ctx'> 	cancel_work_sync(&amp;lif-&gt;deferred.work);</div><div class='ctx'> </div><div class='add'>+	ionic_auxbus_unregister(ionic-&gt;lif);</div><div class='ctx'> 	mutex_lock(&amp;lif-&gt;queue_lock);</div><div class='ctx'> 	ionic_stop_queues_reconfig(lif);</div><div class='ctx'> 	ionic_txrx_free(lif);</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_dev.c b/drivers/net/ethernet/pensando/ionic/ionic_dev.c<br/>index 9e42d599840d..ab27e9225c1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_dev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_dev.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> </div><div class='ctx'> static void ionic_watchdog_cb(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ionic *ionic = from_timer(ionic, t, watchdog_timer);</div><div class='add'>+	struct ionic *ionic = timer_container_of(ionic, t, watchdog_timer);</div><div class='ctx'> 	struct ionic_lif *lif = ionic-&gt;lif;</div><div class='ctx'> 	struct ionic_deferred_work *work;</div><div class='ctx'> 	int hb;</div><div class='hunk'>@@ -199,13 +199,201 @@ void ionic_init_devinfo(struct ionic *ionic)</div><div class='ctx'> 	dev_dbg(ionic-&gt;dev, "fw_version %s\n", idev-&gt;dev_info.fw_version);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ionic_map_disc_cmb(struct ionic *ionic)</div><div class='add'>+{</div><div class='add'>+	struct ionic_identity *ident = &amp;ionic-&gt;ident;</div><div class='add'>+	u32 length_reg0, length, offset, num_regions;</div><div class='add'>+	struct ionic_dev_bar *bar = ionic-&gt;bars;</div><div class='add'>+	struct ionic_dev *idev = &amp;ionic-&gt;idev;</div><div class='add'>+	struct device *dev = ionic-&gt;dev;</div><div class='add'>+	int err, sz, i;</div><div class='add'>+	u64 end;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ionic-&gt;dev_cmd_lock);</div><div class='add'>+</div><div class='add'>+	ionic_dev_cmd_discover_cmb(idev);</div><div class='add'>+	err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);</div><div class='add'>+	if (!err) {</div><div class='add'>+		sz = min(sizeof(ident-&gt;cmb_layout),</div><div class='add'>+			 sizeof(idev-&gt;dev_cmd_regs-&gt;data));</div><div class='add'>+		memcpy_fromio(&amp;ident-&gt;cmb_layout,</div><div class='add'>+			      &amp;idev-&gt;dev_cmd_regs-&gt;data, sz);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;ionic-&gt;dev_cmd_lock);</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_warn(dev, "Cannot discover CMB layout, disabling CMB\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bar += 2;</div><div class='add'>+</div><div class='add'>+	num_regions = le32_to_cpu(ident-&gt;cmb_layout.num_regions);</div><div class='add'>+	if (!num_regions || num_regions &gt; IONIC_MAX_CMB_REGIONS) {</div><div class='add'>+		dev_warn(dev, "Invalid number of CMB entries (%d)\n",</div><div class='add'>+			 num_regions);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "ionic_cmb_layout_identity num_regions %d flags %x:\n",</div><div class='add'>+		num_regions, ident-&gt;cmb_layout.flags);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_regions; i++) {</div><div class='add'>+		offset = le32_to_cpu(ident-&gt;cmb_layout.region[i].offset);</div><div class='add'>+		length = le32_to_cpu(ident-&gt;cmb_layout.region[i].length);</div><div class='add'>+		end = offset + length;</div><div class='add'>+</div><div class='add'>+		dev_dbg(dev, "CMB entry %d: bar_num %u cmb_type %u offset %x length %u\n",</div><div class='add'>+			i, ident-&gt;cmb_layout.region[i].bar_num,</div><div class='add'>+			ident-&gt;cmb_layout.region[i].cmb_type,</div><div class='add'>+			offset, length);</div><div class='add'>+</div><div class='add'>+		if (end &gt; (bar-&gt;len &gt;&gt; IONIC_CMB_SHIFT_64K)) {</div><div class='add'>+			dev_warn(dev, "Out of bounds CMB region %d offset %x length %u\n",</div><div class='add'>+				 i, offset, length);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* if first entry matches PCI config, expdb is not supported */</div><div class='add'>+	if (ident-&gt;cmb_layout.region[0].bar_num == bar-&gt;res_index &amp;&amp;</div><div class='add'>+	    le32_to_cpu(ident-&gt;cmb_layout.region[0].length) == bar-&gt;len &amp;&amp;</div><div class='add'>+	    !ident-&gt;cmb_layout.region[0].offset) {</div><div class='add'>+		dev_warn(dev, "No CMB mapping discovered\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* process first entry for regular mapping */</div><div class='add'>+	length_reg0 = le32_to_cpu(ident-&gt;cmb_layout.region[0].length);</div><div class='add'>+	if (!length_reg0) {</div><div class='add'>+		dev_warn(dev, "region len = 0. No CMB mapping discovered\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Verify first entry size matches expected 8MB size (in 64KB pages) */</div><div class='add'>+	if (length_reg0 != IONIC_BAR2_CMB_ENTRY_SIZE &gt;&gt; IONIC_CMB_SHIFT_64K) {</div><div class='add'>+		dev_warn(dev, "Unexpected CMB size in entry 0: %u pages\n",</div><div class='add'>+			 length_reg0);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sz = BITS_TO_LONGS((length_reg0 &lt;&lt; IONIC_CMB_SHIFT_64K) /</div><div class='add'>+			    PAGE_SIZE) * sizeof(long);</div><div class='add'>+	idev-&gt;cmb_inuse = kzalloc(sz, GFP_KERNEL);</div><div class='add'>+	if (!idev-&gt;cmb_inuse) {</div><div class='add'>+		dev_warn(dev, "No memory for CMB, disabling\n");</div><div class='add'>+		idev-&gt;phy_cmb_pages = 0;</div><div class='add'>+		idev-&gt;phy_cmb_expdb64_pages = 0;</div><div class='add'>+		idev-&gt;phy_cmb_expdb128_pages = 0;</div><div class='add'>+		idev-&gt;phy_cmb_expdb256_pages = 0;</div><div class='add'>+		idev-&gt;phy_cmb_expdb512_pages = 0;</div><div class='add'>+		idev-&gt;cmb_npages = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_regions; i++) {</div><div class='add'>+		/* check this region matches first region length as to</div><div class='add'>+		 * ease implementation</div><div class='add'>+		 */</div><div class='add'>+		if (le32_to_cpu(ident-&gt;cmb_layout.region[i].length) !=</div><div class='add'>+		    length_reg0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		offset = le32_to_cpu(ident-&gt;cmb_layout.region[i].offset);</div><div class='add'>+</div><div class='add'>+		switch (ident-&gt;cmb_layout.region[i].cmb_type) {</div><div class='add'>+		case IONIC_CMB_TYPE_DEVMEM:</div><div class='add'>+			idev-&gt;phy_cmb_pages = bar-&gt;bus_addr + offset;</div><div class='add'>+			idev-&gt;cmb_npages =</div><div class='add'>+			    (length_reg0 &lt;&lt; IONIC_CMB_SHIFT_64K) / PAGE_SIZE;</div><div class='add'>+			dev_dbg(dev, "regular cmb mapping: bar-&gt;bus_addr %pa region[%d].length %u\n",</div><div class='add'>+				&amp;bar-&gt;bus_addr, i, length);</div><div class='add'>+			dev_dbg(dev, "idev-&gt;phy_cmb_pages %pad, idev-&gt;cmb_npages %u\n",</div><div class='add'>+				&amp;idev-&gt;phy_cmb_pages, idev-&gt;cmb_npages);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case IONIC_CMB_TYPE_EXPDB64:</div><div class='add'>+			idev-&gt;phy_cmb_expdb64_pages =</div><div class='add'>+				bar-&gt;bus_addr + (offset &lt;&lt; IONIC_CMB_SHIFT_64K);</div><div class='add'>+			dev_dbg(dev, "idev-&gt;phy_cmb_expdb64_pages %pad\n",</div><div class='add'>+				&amp;idev-&gt;phy_cmb_expdb64_pages);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case IONIC_CMB_TYPE_EXPDB128:</div><div class='add'>+			idev-&gt;phy_cmb_expdb128_pages =</div><div class='add'>+				bar-&gt;bus_addr + (offset &lt;&lt; IONIC_CMB_SHIFT_64K);</div><div class='add'>+			dev_dbg(dev, "idev-&gt;phy_cmb_expdb128_pages %pad\n",</div><div class='add'>+				&amp;idev-&gt;phy_cmb_expdb128_pages);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case IONIC_CMB_TYPE_EXPDB256:</div><div class='add'>+			idev-&gt;phy_cmb_expdb256_pages =</div><div class='add'>+				bar-&gt;bus_addr + (offset &lt;&lt; IONIC_CMB_SHIFT_64K);</div><div class='add'>+			dev_dbg(dev, "idev-&gt;phy_cmb_expdb256_pages %pad\n",</div><div class='add'>+				&amp;idev-&gt;phy_cmb_expdb256_pages);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case IONIC_CMB_TYPE_EXPDB512:</div><div class='add'>+			idev-&gt;phy_cmb_expdb512_pages =</div><div class='add'>+				bar-&gt;bus_addr + (offset &lt;&lt; IONIC_CMB_SHIFT_64K);</div><div class='add'>+			dev_dbg(dev, "idev-&gt;phy_cmb_expdb512_pages %pad\n",</div><div class='add'>+				&amp;idev-&gt;phy_cmb_expdb512_pages);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			dev_warn(dev, "[%d] Invalid cmb_type (%d)\n",</div><div class='add'>+				 i, ident-&gt;cmb_layout.region[i].cmb_type);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ionic_map_classic_cmb(struct ionic *ionic)</div><div class='add'>+{</div><div class='add'>+	struct ionic_dev_bar *bar = ionic-&gt;bars;</div><div class='add'>+	struct ionic_dev *idev = &amp;ionic-&gt;idev;</div><div class='add'>+	struct device *dev = ionic-&gt;dev;</div><div class='add'>+	int sz;</div><div class='add'>+</div><div class='add'>+	bar += 2;</div><div class='add'>+	/* classic CMB mapping */</div><div class='add'>+	idev-&gt;phy_cmb_pages = bar-&gt;bus_addr;</div><div class='add'>+	idev-&gt;cmb_npages = bar-&gt;len / PAGE_SIZE;</div><div class='add'>+	dev_dbg(dev, "classic cmb mapping: bar-&gt;bus_addr %pa bar-&gt;len %lu\n",</div><div class='add'>+		&amp;bar-&gt;bus_addr, bar-&gt;len);</div><div class='add'>+	dev_dbg(dev, "idev-&gt;phy_cmb_pages %pad, idev-&gt;cmb_npages %u\n",</div><div class='add'>+		&amp;idev-&gt;phy_cmb_pages, idev-&gt;cmb_npages);</div><div class='add'>+</div><div class='add'>+	sz = BITS_TO_LONGS(idev-&gt;cmb_npages) * sizeof(long);</div><div class='add'>+	idev-&gt;cmb_inuse = kzalloc(sz, GFP_KERNEL);</div><div class='add'>+	if (!idev-&gt;cmb_inuse) {</div><div class='add'>+		idev-&gt;phy_cmb_pages = 0;</div><div class='add'>+		idev-&gt;cmb_npages = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ionic_map_cmb(struct ionic *ionic)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = ionic-&gt;pdev;</div><div class='add'>+	struct device *dev = ionic-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (!(pci_resource_flags(pdev, 4) &amp; IORESOURCE_MEM)) {</div><div class='add'>+		dev_dbg(dev, "No CMB, disabling\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ionic-&gt;ident.dev.capabilities &amp; cpu_to_le64(IONIC_DEV_CAP_DISC_CMB))</div><div class='add'>+		ionic_map_disc_cmb(ionic);</div><div class='add'>+	else</div><div class='add'>+		ionic_map_classic_cmb(ionic);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ionic_dev_setup(struct ionic *ionic)</div><div class='ctx'> {</div><div class='ctx'> 	struct ionic_dev_bar *bar = ionic-&gt;bars;</div><div class='ctx'> 	unsigned int num_bars = ionic-&gt;num_bars;</div><div class='ctx'> 	struct ionic_dev *idev = &amp;ionic-&gt;idev;</div><div class='ctx'> 	struct device *dev = ionic-&gt;dev;</div><div class='del'>-	int size;</div><div class='ctx'> 	u32 sig;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -255,16 +443,11 @@ int ionic_dev_setup(struct ionic *ionic)</div><div class='ctx'> 	mutex_init(&amp;idev-&gt;cmb_inuse_lock);</div><div class='ctx'> 	if (num_bars &lt; 3 || !ionic-&gt;bars[IONIC_PCI_BAR_CMB].len) {</div><div class='ctx'> 		idev-&gt;cmb_inuse = NULL;</div><div class='add'>+		idev-&gt;phy_cmb_pages = 0;</div><div class='add'>+		idev-&gt;cmb_npages = 0;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	idev-&gt;phy_cmb_pages = bar-&gt;bus_addr;</div><div class='del'>-	idev-&gt;cmb_npages = bar-&gt;len / PAGE_SIZE;</div><div class='del'>-	size = BITS_TO_LONGS(idev-&gt;cmb_npages) * sizeof(long);</div><div class='del'>-	idev-&gt;cmb_inuse = kzalloc(size, GFP_KERNEL);</div><div class='del'>-	if (!idev-&gt;cmb_inuse)</div><div class='del'>-		dev_warn(dev, "No memory for CMB, disabling\n");</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -277,7 +460,15 @@ void ionic_dev_teardown(struct ionic *ionic)</div><div class='ctx'> 	idev-&gt;phy_cmb_pages = 0;</div><div class='ctx'> 	idev-&gt;cmb_npages = 0;</div><div class='ctx'> </div><div class='del'>-	destroy_workqueue(ionic-&gt;wq);</div><div class='add'>+	idev-&gt;phy_cmb_expdb64_pages = 0;</div><div class='add'>+	idev-&gt;phy_cmb_expdb128_pages = 0;</div><div class='add'>+	idev-&gt;phy_cmb_expdb256_pages = 0;</div><div class='add'>+	idev-&gt;phy_cmb_expdb512_pages = 0;</div><div class='add'>+</div><div class='add'>+	if (ionic-&gt;wq) {</div><div class='add'>+		destroy_workqueue(ionic-&gt;wq);</div><div class='add'>+		ionic-&gt;wq = NULL;</div><div class='add'>+	}</div><div class='ctx'> 	mutex_destroy(&amp;idev-&gt;cmb_inuse_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -421,9 +612,9 @@ do_check_time:</div><div class='ctx'> 	if (fw_hb_ready != idev-&gt;fw_hb_ready) {</div><div class='ctx'> 		idev-&gt;fw_hb_ready = fw_hb_ready;</div><div class='ctx'> 		if (!fw_hb_ready)</div><div class='del'>-			dev_info(ionic-&gt;dev, "FW heartbeat stalled at %d\n", fw_hb);</div><div class='add'>+			dev_info(ionic-&gt;dev, "FW heartbeat stalled at %u\n", fw_hb);</div><div class='ctx'> 		else</div><div class='del'>-			dev_info(ionic-&gt;dev, "FW heartbeat restored at %d\n", fw_hb);</div><div class='add'>+			dev_info(ionic-&gt;dev, "FW heartbeat restored at %u\n", fw_hb);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!fw_hb_ready)</div><div class='hunk'>@@ -695,28 +886,79 @@ void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq,</div><div class='ctx'> 	ionic_dev_cmd_go(idev, &amp;cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ionic_dev_cmd_discover_cmb(struct ionic_dev *idev)</div><div class='add'>+{</div><div class='add'>+	union ionic_dev_cmd cmd = {</div><div class='add'>+		.discover_cmb.opcode = IONIC_CMD_DISCOVER_CMB,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ionic_dev_cmd_go(idev, &amp;cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ionic_db_page_num(struct ionic_lif *lif, int pid)</div><div class='ctx'> {</div><div class='ctx'> 	return (lif-&gt;hw_index * lif-&gt;dbid_count) + pid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ionic_get_cmb(struct ionic_lif *lif, u32 *pgid, phys_addr_t *pgaddr, int order)</div><div class='add'>+int ionic_get_cmb(struct ionic_lif *lif, u32 *pgid, phys_addr_t *pgaddr,</div><div class='add'>+		  int order, u8 stride_log2, bool *expdb)</div><div class='ctx'> {</div><div class='ctx'> 	struct ionic_dev *idev = &amp;lif-&gt;ionic-&gt;idev;</div><div class='del'>-	int ret;</div><div class='add'>+	void __iomem *nonexpdb_pgptr;</div><div class='add'>+	phys_addr_t nonexpdb_pgaddr;</div><div class='add'>+	int i, idx;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;idev-&gt;cmb_inuse_lock);</div><div class='del'>-	ret = bitmap_find_free_region(idev-&gt;cmb_inuse, idev-&gt;cmb_npages, order);</div><div class='add'>+	idx = bitmap_find_free_region(idev-&gt;cmb_inuse, idev-&gt;cmb_npages, order);</div><div class='ctx'> 	mutex_unlock(&amp;idev-&gt;cmb_inuse_lock);</div><div class='ctx'> </div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+	if (idx &lt; 0)</div><div class='add'>+		return idx;</div><div class='add'>+</div><div class='add'>+	*pgid = (u32)idx;</div><div class='add'>+</div><div class='add'>+	if (idev-&gt;phy_cmb_expdb64_pages &amp;&amp;</div><div class='add'>+	    stride_log2 == IONIC_EXPDB_64B_WQE_LG2) {</div><div class='add'>+		*pgaddr = idev-&gt;phy_cmb_expdb64_pages + idx * PAGE_SIZE;</div><div class='add'>+		if (expdb)</div><div class='add'>+			*expdb = true;</div><div class='add'>+	} else if (idev-&gt;phy_cmb_expdb128_pages &amp;&amp;</div><div class='add'>+		  stride_log2 == IONIC_EXPDB_128B_WQE_LG2) {</div><div class='add'>+		*pgaddr = idev-&gt;phy_cmb_expdb128_pages + idx * PAGE_SIZE;</div><div class='add'>+		if (expdb)</div><div class='add'>+			*expdb = true;</div><div class='add'>+	} else if (idev-&gt;phy_cmb_expdb256_pages &amp;&amp;</div><div class='add'>+		  stride_log2 == IONIC_EXPDB_256B_WQE_LG2) {</div><div class='add'>+		*pgaddr = idev-&gt;phy_cmb_expdb256_pages + idx * PAGE_SIZE;</div><div class='add'>+		if (expdb)</div><div class='add'>+			*expdb = true;</div><div class='add'>+	} else if (idev-&gt;phy_cmb_expdb512_pages &amp;&amp;</div><div class='add'>+		  stride_log2 == IONIC_EXPDB_512B_WQE_LG2) {</div><div class='add'>+		*pgaddr = idev-&gt;phy_cmb_expdb512_pages + idx * PAGE_SIZE;</div><div class='add'>+		if (expdb)</div><div class='add'>+			*expdb = true;</div><div class='add'>+	} else {</div><div class='add'>+		*pgaddr = idev-&gt;phy_cmb_pages + idx * PAGE_SIZE;</div><div class='add'>+		if (expdb)</div><div class='add'>+			*expdb = false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	*pgid = ret;</div><div class='del'>-	*pgaddr = idev-&gt;phy_cmb_pages + ret * PAGE_SIZE;</div><div class='add'>+	/* clear the requested CMB region, 1 PAGE_SIZE ioremap at a time */</div><div class='add'>+	nonexpdb_pgaddr = idev-&gt;phy_cmb_pages + idx * PAGE_SIZE;</div><div class='add'>+	for (i = 0; i &lt; (1 &lt;&lt; order); i++) {</div><div class='add'>+		nonexpdb_pgptr =</div><div class='add'>+			ioremap_wc(nonexpdb_pgaddr + i * PAGE_SIZE, PAGE_SIZE);</div><div class='add'>+		if (!nonexpdb_pgptr) {</div><div class='add'>+			ionic_put_cmb(lif, *pgid, order);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+		memset_io(nonexpdb_pgptr, 0, PAGE_SIZE);</div><div class='add'>+		iounmap(nonexpdb_pgptr);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(ionic_get_cmb, "NET_IONIC");</div><div class='ctx'> </div><div class='ctx'> void ionic_put_cmb(struct ionic_lif *lif, u32 pgid, int order)</div><div class='ctx'> {</div><div class='hunk'>@@ -726,6 +968,7 @@ void ionic_put_cmb(struct ionic_lif *lif, u32 pgid, int order)</div><div class='ctx'> 	bitmap_release_region(idev-&gt;cmb_inuse, pgid, order);</div><div class='ctx'> 	mutex_unlock(&amp;idev-&gt;cmb_inuse_lock);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(ionic_put_cmb, "NET_IONIC");</div><div class='ctx'> </div><div class='ctx'> int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq,</div><div class='ctx'> 		  struct ionic_intr_info *intr,</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_dev.h b/drivers/net/ethernet/pensando/ionic/ionic_dev.h<br/>index c8c710cfe70c..35566f97eaea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_dev.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_dev.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_dev.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_dev.h</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> </div><div class='ctx'> #include "ionic_if.h"</div><div class='ctx'> #include "ionic_regs.h"</div><div class='add'>+#include "ionic_api.h"</div><div class='ctx'> </div><div class='ctx'> #define IONIC_MAX_TX_DESC		8192</div><div class='ctx'> #define IONIC_MAX_RX_DESC		16384</div><div class='hunk'>@@ -34,6 +35,11 @@</div><div class='ctx'> #define IONIC_RX_MIN_DOORBELL_DEADLINE	(HZ / 100)	/* 10ms */</div><div class='ctx'> #define IONIC_RX_MAX_DOORBELL_DEADLINE	(HZ * 4)	/* 4s */</div><div class='ctx'> </div><div class='add'>+#define IONIC_EXPDB_64B_WQE_LG2		6</div><div class='add'>+#define IONIC_EXPDB_128B_WQE_LG2	7</div><div class='add'>+#define IONIC_EXPDB_256B_WQE_LG2	8</div><div class='add'>+#define IONIC_EXPDB_512B_WQE_LG2	9</div><div class='add'>+</div><div class='ctx'> struct ionic_dev_bar {</div><div class='ctx'> 	void __iomem *vaddr;</div><div class='ctx'> 	phys_addr_t bus_addr;</div><div class='hunk'>@@ -170,6 +176,11 @@ struct ionic_dev {</div><div class='ctx'> 	dma_addr_t phy_cmb_pages;</div><div class='ctx'> 	u32 cmb_npages;</div><div class='ctx'> </div><div class='add'>+	dma_addr_t phy_cmb_expdb64_pages;</div><div class='add'>+	dma_addr_t phy_cmb_expdb128_pages;</div><div class='add'>+	dma_addr_t phy_cmb_expdb256_pages;</div><div class='add'>+	dma_addr_t phy_cmb_expdb512_pages;</div><div class='add'>+</div><div class='ctx'> 	u32 port_info_sz;</div><div class='ctx'> 	struct ionic_port_info *port_info;</div><div class='ctx'> 	dma_addr_t port_info_pa;</div><div class='hunk'>@@ -273,19 +284,6 @@ struct ionic_queue {</div><div class='ctx'> 	char name[IONIC_QUEUE_NAME_MAX_SZ];</div><div class='ctx'> } ____cacheline_aligned_in_smp;</div><div class='ctx'> </div><div class='del'>-#define IONIC_INTR_INDEX_NOT_ASSIGNED	-1</div><div class='del'>-#define IONIC_INTR_NAME_MAX_SZ		32</div><div class='del'>-</div><div class='del'>-struct ionic_intr_info {</div><div class='del'>-	char name[IONIC_INTR_NAME_MAX_SZ];</div><div class='del'>-	u64 rearm_count;</div><div class='del'>-	unsigned int index;</div><div class='del'>-	unsigned int vector;</div><div class='del'>-	u32 dim_coal_hw;</div><div class='del'>-	cpumask_var_t *affinity_mask;</div><div class='del'>-	struct irq_affinity_notify aff_notify;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct ionic_cq {</div><div class='ctx'> 	struct ionic_lif *lif;</div><div class='ctx'> 	struct ionic_queue *bound_q;</div><div class='hunk'>@@ -363,8 +361,8 @@ void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq,</div><div class='ctx'> </div><div class='ctx'> int ionic_db_page_num(struct ionic_lif *lif, int pid);</div><div class='ctx'> </div><div class='del'>-int ionic_get_cmb(struct ionic_lif *lif, u32 *pgid, phys_addr_t *pgaddr, int order);</div><div class='del'>-void ionic_put_cmb(struct ionic_lif *lif, u32 pgid, int order);</div><div class='add'>+void ionic_dev_cmd_discover_cmb(struct ionic_dev *idev);</div><div class='add'>+void ionic_map_cmb(struct ionic *ionic);</div><div class='ctx'> </div><div class='ctx'> int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq,</div><div class='ctx'> 		  struct ionic_intr_info *intr,</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c b/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c<br/>index dda22fa4448c..2d9efadb5d2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_ethtool.c</a></div><div class='hunk'>@@ -158,6 +158,20 @@ static int ionic_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 						     25000baseCR_Full);</div><div class='ctx'> 		copper_seen++;</div><div class='ctx'> 		break;</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_50G_CR2_FC:</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_50G_CR2:</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(ks, supported,</div><div class='add'>+						     50000baseCR2_Full);</div><div class='add'>+		copper_seen++;</div><div class='add'>+		break;</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_200G_CR4:</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(ks, supported, 200000baseCR4_Full);</div><div class='add'>+		copper_seen++;</div><div class='add'>+		break;</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_400G_CR4:</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(ks, supported, 400000baseCR4_Full);</div><div class='add'>+		copper_seen++;</div><div class='add'>+		break;</div><div class='ctx'> 	case IONIC_XCVR_PID_SFP_10GBASE_AOC:</div><div class='ctx'> 	case IONIC_XCVR_PID_SFP_10GBASE_CU:</div><div class='ctx'> 		ethtool_link_ksettings_add_link_mode(ks, supported,</div><div class='hunk'>@@ -196,6 +210,31 @@ static int ionic_get_link_ksettings(struct net_device *netdev,</div><div class='ctx'> 		ethtool_link_ksettings_add_link_mode(ks, supported,</div><div class='ctx'> 						     25000baseSR_Full);</div><div class='ctx'> 		break;</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_200G_AOC:</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_200G_SR4:</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(ks, supported,</div><div class='add'>+						     200000baseSR4_Full);</div><div class='add'>+		break;</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_200G_FR4:</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(ks, supported,</div><div class='add'>+						     200000baseLR4_ER4_FR4_Full);</div><div class='add'>+		break;</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_200G_DR4:</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(ks, supported,</div><div class='add'>+						     200000baseDR4_Full);</div><div class='add'>+		break;</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_400G_FR4:</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(ks, supported,</div><div class='add'>+						     400000baseLR4_ER4_FR4_Full);</div><div class='add'>+		break;</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_400G_DR4:</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(ks, supported,</div><div class='add'>+						     400000baseDR4_Full);</div><div class='add'>+		break;</div><div class='add'>+	case IONIC_XCVR_PID_QSFP_400G_SR4:</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(ks, supported,</div><div class='add'>+						     400000baseSR4_Full);</div><div class='add'>+		break;</div><div class='ctx'> 	case IONIC_XCVR_PID_SFP_10GBASE_SR:</div><div class='ctx'> 		ethtool_link_ksettings_add_link_mode(ks, supported,</div><div class='ctx'> 						     10000baseSR_Full);</div><div class='hunk'>@@ -909,63 +948,20 @@ static int ionic_get_tunable(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ionic_get_module_info(struct net_device *netdev,</div><div class='del'>-				 struct ethtool_modinfo *modinfo)</div><div class='del'>-</div><div class='del'>-{</div><div class='del'>-	struct ionic_lif *lif = netdev_priv(netdev);</div><div class='del'>-	struct ionic_dev *idev = &amp;lif-&gt;ionic-&gt;idev;</div><div class='del'>-	struct ionic_xcvr_status *xcvr;</div><div class='del'>-	struct sfp_eeprom_base *sfp;</div><div class='del'>-</div><div class='del'>-	xcvr = &amp;idev-&gt;port_info-&gt;status.xcvr;</div><div class='del'>-	sfp = (struct sfp_eeprom_base *) xcvr-&gt;sprom;</div><div class='del'>-</div><div class='del'>-	/* report the module data type and length */</div><div class='del'>-	switch (sfp-&gt;phys_id) {</div><div class='del'>-	case SFF8024_ID_SFP:</div><div class='del'>-		modinfo-&gt;type = ETH_MODULE_SFF_8079;</div><div class='del'>-		modinfo-&gt;eeprom_len = ETH_MODULE_SFF_8079_LEN;</div><div class='del'>-		break;</div><div class='del'>-	case SFF8024_ID_QSFP_8436_8636:</div><div class='del'>-	case SFF8024_ID_QSFP28_8636:</div><div class='del'>-		modinfo-&gt;type = ETH_MODULE_SFF_8436;</div><div class='del'>-		modinfo-&gt;eeprom_len = ETH_MODULE_SFF_8436_LEN;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		netdev_info(netdev, "unknown xcvr type 0x%02x\n",</div><div class='del'>-			    xcvr-&gt;sprom[0]);</div><div class='del'>-		modinfo-&gt;type = 0;</div><div class='del'>-		modinfo-&gt;eeprom_len = ETH_MODULE_SFF_8079_LEN;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ionic_get_module_eeprom(struct net_device *netdev,</div><div class='del'>-				   struct ethtool_eeprom *ee,</div><div class='del'>-				   u8 *data)</div><div class='add'>+static int ionic_do_module_copy(u8 *dst, u8 *src, u32 len)</div><div class='ctx'> {</div><div class='del'>-	struct ionic_lif *lif = netdev_priv(netdev);</div><div class='del'>-	struct ionic_dev *idev = &amp;lif-&gt;ionic-&gt;idev;</div><div class='del'>-	struct ionic_xcvr_status *xcvr;</div><div class='del'>-	char tbuf[sizeof(xcvr-&gt;sprom)];</div><div class='add'>+	char tbuf[sizeof_field(struct ionic_xcvr_status, sprom)];</div><div class='ctx'> 	int count = 10;</div><div class='del'>-	u32 len;</div><div class='ctx'> </div><div class='ctx'> 	/* The NIC keeps the module prom up-to-date in the DMA space</div><div class='ctx'> 	 * so we can simply copy the module bytes into the data buffer.</div><div class='ctx'> 	 */</div><div class='del'>-	xcvr = &amp;idev-&gt;port_info-&gt;status.xcvr;</div><div class='del'>-	len = min_t(u32, sizeof(xcvr-&gt;sprom), ee-&gt;len);</div><div class='del'>-</div><div class='ctx'> 	do {</div><div class='del'>-		memcpy(data, xcvr-&gt;sprom, len);</div><div class='del'>-		memcpy(tbuf, xcvr-&gt;sprom, len);</div><div class='add'>+		memcpy(dst, src, len);</div><div class='add'>+		memcpy(tbuf, src, len);</div><div class='ctx'> </div><div class='ctx'> 		/* Let's make sure we got a consistent copy */</div><div class='del'>-		if (!memcmp(data, tbuf, len))</div><div class='add'>+		if (!memcmp(dst, tbuf, len))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 	} while (--count);</div><div class='hunk'>@@ -976,6 +972,48 @@ static int ionic_get_module_eeprom(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ionic_get_module_eeprom_by_page(struct net_device *netdev,</div><div class='add'>+					   const struct ethtool_module_eeprom *page_data,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ionic_lif *lif = netdev_priv(netdev);</div><div class='add'>+	struct ionic_dev *idev = &amp;lif-&gt;ionic-&gt;idev;</div><div class='add'>+	int err;</div><div class='add'>+	u8 *src;</div><div class='add'>+</div><div class='add'>+	if (!page_data-&gt;length)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (page_data-&gt;bank != 0) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Only bank 0 is supported");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (page_data-&gt;page) {</div><div class='add'>+	case 0:</div><div class='add'>+		src = &amp;idev-&gt;port_info-&gt;status.xcvr.sprom[page_data-&gt;offset];</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		src = &amp;idev-&gt;port_info-&gt;sprom_page1[page_data-&gt;offset - 128];</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		src = &amp;idev-&gt;port_info-&gt;sprom_page2[page_data-&gt;offset - 128];</div><div class='add'>+		break;</div><div class='add'>+	case 17:</div><div class='add'>+		src = &amp;idev-&gt;port_info-&gt;sprom_page17[page_data-&gt;offset - 128];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(page_data-&gt;data, 0, page_data-&gt;length);</div><div class='add'>+	err = ionic_do_module_copy(page_data-&gt;data, src, page_data-&gt;length);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return page_data-&gt;length;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ionic_get_ts_info(struct net_device *netdev,</div><div class='ctx'> 			     struct kernel_ethtool_ts_info *info)</div><div class='ctx'> {</div><div class='hunk'>@@ -1121,8 +1159,7 @@ static const struct ethtool_ops ionic_ethtool_ops = {</div><div class='ctx'> 	.set_rxfh		= ionic_set_rxfh,</div><div class='ctx'> 	.get_tunable		= ionic_get_tunable,</div><div class='ctx'> 	.set_tunable		= ionic_set_tunable,</div><div class='del'>-	.get_module_info	= ionic_get_module_info,</div><div class='del'>-	.get_module_eeprom	= ionic_get_module_eeprom,</div><div class='add'>+	.get_module_eeprom_by_page	= ionic_get_module_eeprom_by_page,</div><div class='ctx'> 	.get_pauseparam		= ionic_get_pauseparam,</div><div class='ctx'> 	.set_pauseparam		= ionic_set_pauseparam,</div><div class='ctx'> 	.get_fecparam		= ionic_get_fecparam,</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_if.h b/drivers/net/ethernet/pensando/ionic/ionic_if.h<br/>index 9c85c0706c6e..47559c909c8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_if.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_if.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_if.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_if.h</a></div><div class='hunk'>@@ -56,6 +56,9 @@ enum ionic_cmd_opcode {</div><div class='ctx'> 	IONIC_CMD_VF_SETATTR			= 61,</div><div class='ctx'> 	IONIC_CMD_VF_CTRL			= 62,</div><div class='ctx'> </div><div class='add'>+	/* CMB command */</div><div class='add'>+	IONIC_CMD_DISCOVER_CMB			= 80,</div><div class='add'>+</div><div class='ctx'> 	/* QoS commands */</div><div class='ctx'> 	IONIC_CMD_QOS_CLASS_IDENTIFY		= 240,</div><div class='ctx'> 	IONIC_CMD_QOS_CLASS_INIT		= 241,</div><div class='hunk'>@@ -269,9 +272,11 @@ union ionic_drv_identity {</div><div class='ctx'> /**</div><div class='ctx'>  * enum ionic_dev_capability - Device capabilities</div><div class='ctx'>  * @IONIC_DEV_CAP_VF_CTRL:     Device supports VF ctrl operations</div><div class='add'>+ * @IONIC_DEV_CAP_DISC_CMB:    Device supports CMB discovery operations</div><div class='ctx'>  */</div><div class='ctx'> enum ionic_dev_capability {</div><div class='ctx'> 	IONIC_DEV_CAP_VF_CTRL        = BIT(0),</div><div class='add'>+	IONIC_DEV_CAP_DISC_CMB       = BIT(1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -395,6 +400,7 @@ enum ionic_logical_qtype {</div><div class='ctx'>  * @IONIC_Q_F_4X_DESC:      Quadruple main descriptor size</div><div class='ctx'>  * @IONIC_Q_F_4X_CQ_DESC:   Quadruple cq descriptor size</div><div class='ctx'>  * @IONIC_Q_F_4X_SG_DESC:   Quadruple sg descriptor size</div><div class='add'>+ * @IONIC_QIDENT_F_EXPDB:   Queue supports express doorbell</div><div class='ctx'>  */</div><div class='ctx'> enum ionic_q_feature {</div><div class='ctx'> 	IONIC_QIDENT_F_CQ		= BIT_ULL(0),</div><div class='hunk'>@@ -407,6 +413,7 @@ enum ionic_q_feature {</div><div class='ctx'> 	IONIC_Q_F_4X_DESC		= BIT_ULL(7),</div><div class='ctx'> 	IONIC_Q_F_4X_CQ_DESC		= BIT_ULL(8),</div><div class='ctx'> 	IONIC_Q_F_4X_SG_DESC		= BIT_ULL(9),</div><div class='add'>+	IONIC_QIDENT_F_EXPDB		= BIT_ULL(10),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -495,6 +502,16 @@ union ionic_lif_config {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * enum ionic_lif_rdma_cap_stats - LIF stat type</div><div class='add'>+ * @IONIC_LIF_RDMA_STAT_GLOBAL:     Global stats</div><div class='add'>+ * @IONIC_LIF_RDMA_STAT_QP:         Queue pair stats</div><div class='add'>+ */</div><div class='add'>+enum ionic_lif_rdma_cap_stats {</div><div class='add'>+	IONIC_LIF_RDMA_STAT_GLOBAL = BIT(0),</div><div class='add'>+	IONIC_LIF_RDMA_STAT_QP = BIT(1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * struct ionic_lif_identity - LIF identity information (type-specific)</div><div class='ctx'>  *</div><div class='ctx'>  * @capabilities:        LIF capabilities</div><div class='hunk'>@@ -513,10 +530,10 @@ union ionic_lif_config {</div><div class='ctx'>  *	@eth.config:             LIF config struct with features, mtu, mac, q counts</div><div class='ctx'>  *</div><div class='ctx'>  * @rdma:                RDMA identify structure</div><div class='del'>- *	@rdma.version:         RDMA version of opcodes and queue descriptors</div><div class='add'>+ *	@rdma.version:         RDMA capability version</div><div class='ctx'>  *	@rdma.qp_opcodes:      Number of RDMA queue pair opcodes supported</div><div class='ctx'>  *	@rdma.admin_opcodes:   Number of RDMA admin opcodes supported</div><div class='del'>- *	@rdma.rsvd:            reserved byte(s)</div><div class='add'>+ *	@rdma.minor_version:   RDMA capability minor version</div><div class='ctx'>  *	@rdma.npts_per_lif:    Page table size per LIF</div><div class='ctx'>  *	@rdma.nmrs_per_lif:    Number of memory regions per LIF</div><div class='ctx'>  *	@rdma.nahs_per_lif:    Number of address handles per LIF</div><div class='hunk'>@@ -526,12 +543,17 @@ union ionic_lif_config {</div><div class='ctx'>  *	@rdma.rrq_stride:      Remote RQ work request stride</div><div class='ctx'>  *	@rdma.rsq_stride:      Remote SQ work request stride</div><div class='ctx'>  *	@rdma.dcqcn_profiles:  Number of DCQCN profiles</div><div class='del'>- *	@rdma.rsvd_dimensions: reserved byte(s)</div><div class='add'>+ *	@rdma.udma_shift:      Log2 number of queues per queue group</div><div class='add'>+ *	@rdma.rsvd_dimensions: Reserved byte</div><div class='add'>+ *	@rdma.page_size_cap:   Supported page sizes</div><div class='ctx'>  *	@rdma.aq_qtype:        RDMA Admin Qtype</div><div class='ctx'>  *	@rdma.sq_qtype:        RDMA Send Qtype</div><div class='ctx'>  *	@rdma.rq_qtype:        RDMA Receive Qtype</div><div class='ctx'>  *	@rdma.cq_qtype:        RDMA Completion Qtype</div><div class='ctx'>  *	@rdma.eq_qtype:        RDMA Event Qtype</div><div class='add'>+ *	@rdma.stats_type:      Supported statistics type</div><div class='add'>+ *	                       (enum ionic_lif_rdma_cap_stats)</div><div class='add'>+ *	@rdma.rsvd1:           Reserved byte(s)</div><div class='ctx'>  * @words:               word access to struct contents</div><div class='ctx'>  */</div><div class='ctx'> union ionic_lif_identity {</div><div class='hunk'>@@ -557,7 +579,7 @@ union ionic_lif_identity {</div><div class='ctx'> 			u8 version;</div><div class='ctx'> 			u8 qp_opcodes;</div><div class='ctx'> 			u8 admin_opcodes;</div><div class='del'>-			u8 rsvd;</div><div class='add'>+			u8 minor_version;</div><div class='ctx'> 			__le32 npts_per_lif;</div><div class='ctx'> 			__le32 nmrs_per_lif;</div><div class='ctx'> 			__le32 nahs_per_lif;</div><div class='hunk'>@@ -567,12 +589,16 @@ union ionic_lif_identity {</div><div class='ctx'> 			u8 rrq_stride;</div><div class='ctx'> 			u8 rsq_stride;</div><div class='ctx'> 			u8 dcqcn_profiles;</div><div class='del'>-			u8 rsvd_dimensions[10];</div><div class='add'>+			u8 udma_shift;</div><div class='add'>+			u8 rsvd_dimensions;</div><div class='add'>+			__le64 page_size_cap;</div><div class='ctx'> 			struct ionic_lif_logical_qtype aq_qtype;</div><div class='ctx'> 			struct ionic_lif_logical_qtype sq_qtype;</div><div class='ctx'> 			struct ionic_lif_logical_qtype rq_qtype;</div><div class='ctx'> 			struct ionic_lif_logical_qtype cq_qtype;</div><div class='ctx'> 			struct ionic_lif_logical_qtype eq_qtype;</div><div class='add'>+			__le16 stats_type;</div><div class='add'>+			u8 rsvd1[162];</div><div class='ctx'> 		} __packed rdma;</div><div class='ctx'> 	} __packed;</div><div class='ctx'> 	__le32 words[478];</div><div class='hunk'>@@ -1074,7 +1100,7 @@ struct ionic_rxq_sg_desc {</div><div class='ctx'>  *                    first IPv4 header.  If the receive packet</div><div class='ctx'>  *                    contains both a tunnel IPv4 header and a</div><div class='ctx'>  *                    transport IPv4 header, the device validates the</div><div class='del'>- *                    checksum for the both IPv4 headers.</div><div class='add'>+ *                    checksum for both IPv4 headers.</div><div class='ctx'>  *</div><div class='ctx'>  *                  IONIC_RXQ_COMP_CSUM_F_IP_BAD:</div><div class='ctx'>  *                    The IPv4 checksum calculated by the device did</div><div class='hunk'>@@ -1277,7 +1303,10 @@ enum ionic_xcvr_pid {</div><div class='ctx'> 	IONIC_XCVR_PID_SFP_25GBASE_CR_S  = 3,</div><div class='ctx'> 	IONIC_XCVR_PID_SFP_25GBASE_CR_L  = 4,</div><div class='ctx'> 	IONIC_XCVR_PID_SFP_25GBASE_CR_N  = 5,</div><div class='del'>-</div><div class='add'>+	IONIC_XCVR_PID_QSFP_50G_CR2_FC   = 6,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_50G_CR2      = 7,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_200G_CR4     = 8,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_400G_CR4     = 9,</div><div class='ctx'> 	/* Fiber */</div><div class='ctx'> 	IONIC_XCVR_PID_QSFP_100G_AOC    = 50,</div><div class='ctx'> 	IONIC_XCVR_PID_QSFP_100G_ACC    = 51,</div><div class='hunk'>@@ -1303,6 +1332,15 @@ enum ionic_xcvr_pid {</div><div class='ctx'> 	IONIC_XCVR_PID_SFP_25GBASE_ACC  = 71,</div><div class='ctx'> 	IONIC_XCVR_PID_SFP_10GBASE_T    = 72,</div><div class='ctx'> 	IONIC_XCVR_PID_SFP_1000BASE_T   = 73,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_200G_AOC    = 74,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_200G_FR4    = 75,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_200G_DR4    = 76,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_200G_SR4    = 77,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_200G_ACC    = 78,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_400G_FR4    = 79,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_400G_DR4    = 80,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_400G_SR4    = 81,</div><div class='add'>+	IONIC_XCVR_PID_QSFP_400G_VR4    = 82,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1404,6 +1442,8 @@ struct ionic_xcvr_status {</div><div class='ctx'>  */</div><div class='ctx'> union ionic_port_config {</div><div class='ctx'> 	struct {</div><div class='add'>+#define IONIC_SPEED_400G	400000	/* 400G in Mbps */</div><div class='add'>+#define IONIC_SPEED_200G	200000	/* 200G in Mbps */</div><div class='ctx'> #define IONIC_SPEED_100G	100000	/* 100G in Mbps */</div><div class='ctx'> #define IONIC_SPEED_50G		50000	/* 50G in Mbps */</div><div class='ctx'> #define IONIC_SPEED_40G		40000	/* 40G in Mbps */</div><div class='hunk'>@@ -2181,6 +2221,80 @@ struct ionic_vf_ctrl_comp {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * struct ionic_discover_cmb_cmd - CMB discovery command</div><div class='add'>+ * @opcode: Opcode for the command</div><div class='add'>+ * @rsvd:   Reserved bytes</div><div class='add'>+ */</div><div class='add'>+struct ionic_discover_cmb_cmd {</div><div class='add'>+	u8	opcode;</div><div class='add'>+	u8	rsvd[63];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ionic_discover_cmb_comp - CMB discover command completion.</div><div class='add'>+ * @status: Status of the command (enum ionic_status_code)</div><div class='add'>+ * @rsvd:   Reserved bytes</div><div class='add'>+ */</div><div class='add'>+struct ionic_discover_cmb_comp {</div><div class='add'>+	u8	status;</div><div class='add'>+	u8	rsvd[15];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define IONIC_MAX_CMB_REGIONS	16</div><div class='add'>+#define IONIC_CMB_SHIFT_64K	16</div><div class='add'>+</div><div class='add'>+enum ionic_cmb_type {</div><div class='add'>+	IONIC_CMB_TYPE_DEVMEM	= 0,</div><div class='add'>+	IONIC_CMB_TYPE_EXPDB64	= 1,</div><div class='add'>+	IONIC_CMB_TYPE_EXPDB128	= 2,</div><div class='add'>+	IONIC_CMB_TYPE_EXPDB256	= 3,</div><div class='add'>+	IONIC_CMB_TYPE_EXPDB512	= 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * union ionic_cmb_region - Configuration for CMB region</div><div class='add'>+ * @bar_num:	CMB mapping number from FW</div><div class='add'>+ * @cmb_type:	Type of CMB this region describes (enum ionic_cmb_type)</div><div class='add'>+ * @rsvd:	Reserved</div><div class='add'>+ * @offset:	Offset within BAR in 64KB pages</div><div class='add'>+ * @length:	Length of the CMB region</div><div class='add'>+ * @words:	32-bit words for direct access to the entire region</div><div class='add'>+ */</div><div class='add'>+union ionic_cmb_region {</div><div class='add'>+	struct {</div><div class='add'>+		u8	bar_num;</div><div class='add'>+		u8	cmb_type;</div><div class='add'>+		u8	rsvd[6];</div><div class='add'>+		__le32	offset;</div><div class='add'>+		__le32	length;</div><div class='add'>+	} __packed;</div><div class='add'>+	__le32  words[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * union ionic_discover_cmb_identity - CMB layout identity structure</div><div class='add'>+ * @num_regions:    Number of CMB regions, up to 16</div><div class='add'>+ * @flags:          Feature and capability bits (0 for express</div><div class='add'>+ *                  doorbell, 1 for 4K alignment indicator,</div><div class='add'>+ *                  31-24 for version information)</div><div class='add'>+ * @region:         CMB mappings region, entry 0 for regular</div><div class='add'>+ *                  mapping, entries 1-7 for WQE sizes 64,</div><div class='add'>+ *                  128, 256, 512, 1024, 2048 and 4096 bytes</div><div class='add'>+ * @words:          Full union buffer size</div><div class='add'>+ */</div><div class='add'>+union ionic_discover_cmb_identity {</div><div class='add'>+	struct {</div><div class='add'>+		__le32 num_regions;</div><div class='add'>+#define IONIC_CMB_FLAG_EXPDB	BIT(0)</div><div class='add'>+#define IONIC_CMB_FLAG_4KALIGN	BIT(1)</div><div class='add'>+#define IONIC_CMB_FLAG_VERSION	0xff000000</div><div class='add'>+		__le32 flags;</div><div class='add'>+		union ionic_cmb_region region[IONIC_MAX_CMB_REGIONS];</div><div class='add'>+	};</div><div class='add'>+	__le32 words[478];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * struct ionic_qos_identify_cmd - QoS identify command</div><div class='ctx'>  * @opcode:  opcode</div><div class='ctx'>  * @ver:     Highest version of identify supported by driver</div><div class='hunk'>@@ -2825,6 +2939,10 @@ union ionic_port_identity {</div><div class='ctx'>  * @status:          Port status data</div><div class='ctx'>  * @stats:           Port statistics data</div><div class='ctx'>  * @mgmt_stats:      Port management statistics data</div><div class='add'>+ * @sprom_epage:     Extended Transceiver sprom</div><div class='add'>+ * @sprom_page1:     Extended Transceiver sprom, page 1</div><div class='add'>+ * @sprom_page2:     Extended Transceiver sprom, page 2</div><div class='add'>+ * @sprom_page17:    Extended Transceiver sprom, page 17</div><div class='ctx'>  * @rsvd:            reserved byte(s)</div><div class='ctx'>  * @pb_stats:        uplink pb drop stats</div><div class='ctx'>  */</div><div class='hunk'>@@ -2835,8 +2953,17 @@ struct ionic_port_info {</div><div class='ctx'> 		struct ionic_port_stats      stats;</div><div class='ctx'> 		struct ionic_mgmt_port_stats mgmt_stats;</div><div class='ctx'> 	};</div><div class='del'>-	/* room for pb_stats to start at 2k offset */</div><div class='del'>-	u8                          rsvd[760];</div><div class='add'>+	union {</div><div class='add'>+		u8     sprom_epage[384];</div><div class='add'>+		struct {</div><div class='add'>+			u8 sprom_page1[128];</div><div class='add'>+			u8 sprom_page2[128];</div><div class='add'>+			u8 sprom_page17[128];</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	u8     rsvd[376];</div><div class='add'>+</div><div class='add'>+	/* pb_stats must start at 2k offset */</div><div class='ctx'> 	struct ionic_port_pb_stats  pb_stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3027,6 +3154,8 @@ union ionic_dev_cmd {</div><div class='ctx'> 	struct ionic_vf_getattr_cmd vf_getattr;</div><div class='ctx'> 	struct ionic_vf_ctrl_cmd vf_ctrl;</div><div class='ctx'> </div><div class='add'>+	struct ionic_discover_cmb_cmd discover_cmb;</div><div class='add'>+</div><div class='ctx'> 	struct ionic_lif_identify_cmd lif_identify;</div><div class='ctx'> 	struct ionic_lif_init_cmd lif_init;</div><div class='ctx'> 	struct ionic_lif_reset_cmd lif_reset;</div><div class='hunk'>@@ -3066,6 +3195,8 @@ union ionic_dev_cmd_comp {</div><div class='ctx'> 	struct ionic_vf_getattr_comp vf_getattr;</div><div class='ctx'> 	struct ionic_vf_ctrl_comp vf_ctrl;</div><div class='ctx'> </div><div class='add'>+	struct ionic_discover_cmb_comp discover_cmb;</div><div class='add'>+</div><div class='ctx'> 	struct ionic_lif_identify_comp lif_identify;</div><div class='ctx'> 	struct ionic_lif_init_comp lif_init;</div><div class='ctx'> 	ionic_lif_reset_comp lif_reset;</div><div class='hunk'>@@ -3207,9 +3338,16 @@ union ionic_adminq_comp {</div><div class='ctx'> #define IONIC_BAR0_DEV_CMD_DATA_REGS_OFFSET	0x0c00</div><div class='ctx'> #define IONIC_BAR0_INTR_STATUS_OFFSET		0x1000</div><div class='ctx'> #define IONIC_BAR0_INTR_CTRL_OFFSET		0x2000</div><div class='add'>+</div><div class='add'>+/* BAR2 */</div><div class='add'>+#define IONIC_BAR2_CMB_ENTRY_SIZE		0x800000</div><div class='ctx'> #define IONIC_DEV_CMD_DONE			0x00000001</div><div class='ctx'> </div><div class='del'>-#define IONIC_ASIC_TYPE_CAPRI			0</div><div class='add'>+#define IONIC_ASIC_TYPE_NONE			0</div><div class='add'>+#define IONIC_ASIC_TYPE_CAPRI			1</div><div class='add'>+#define IONIC_ASIC_TYPE_ELBA			2</div><div class='add'>+#define IONIC_ASIC_TYPE_GIGLIO			3</div><div class='add'>+#define IONIC_ASIC_TYPE_SALINA			4</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct ionic_doorbell - Doorbell register layout</div><div class='hunk'>@@ -3256,6 +3394,7 @@ struct ionic_identity {</div><div class='ctx'> 	union ionic_port_identity port;</div><div class='ctx'> 	union ionic_qos_identity qos;</div><div class='ctx'> 	union ionic_q_identity txq;</div><div class='add'>+	union ionic_discover_cmb_identity cmb_layout;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif /* _IONIC_IF_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_lif.c b/drivers/net/ethernet/pensando/ionic/ionic_lif.c<br/>index 40496587b2b3..058eea86e141 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_lif.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_lif.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_lif.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_lif.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include "ionic_bus.h"</div><div class='ctx'> #include "ionic_dev.h"</div><div class='ctx'> #include "ionic_lif.h"</div><div class='add'>+#include "ionic_aux.h"</div><div class='ctx'> #include "ionic_txrx.h"</div><div class='ctx'> #include "ionic_ethtool.h"</div><div class='ctx'> #include "ionic_debugfs.h"</div><div class='hunk'>@@ -243,29 +244,36 @@ static int ionic_request_irq(struct ionic_lif *lif, struct ionic_qcq *qcq)</div><div class='ctx'> 				0, intr-&gt;name, &amp;qcq-&gt;napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr)</div><div class='add'>+int ionic_intr_alloc(struct ionic_lif *lif, struct ionic_intr_info *intr)</div><div class='ctx'> {</div><div class='ctx'> 	struct ionic *ionic = lif-&gt;ionic;</div><div class='del'>-	int index;</div><div class='add'>+	int index, err;</div><div class='ctx'> </div><div class='ctx'> 	index = find_first_zero_bit(ionic-&gt;intrs, ionic-&gt;nintrs);</div><div class='del'>-	if (index == ionic-&gt;nintrs) {</div><div class='del'>-		netdev_warn(lif-&gt;netdev, "%s: no intr, index=%d nintrs=%d\n",</div><div class='del'>-			    __func__, index, ionic-&gt;nintrs);</div><div class='add'>+	if (index == ionic-&gt;nintrs)</div><div class='ctx'> 		return -ENOSPC;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	set_bit(index, ionic-&gt;intrs);</div><div class='ctx'> 	ionic_intr_init(&amp;ionic-&gt;idev, intr, index);</div><div class='ctx'> </div><div class='add'>+	err = ionic_bus_get_irq(ionic, intr-&gt;index);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		clear_bit(index, ionic-&gt;intrs);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	intr-&gt;vector = err;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(ionic_intr_alloc, "NET_IONIC");</div><div class='ctx'> </div><div class='del'>-static void ionic_intr_free(struct ionic *ionic, int index)</div><div class='add'>+void ionic_intr_free(struct ionic_lif *lif, int index)</div><div class='ctx'> {</div><div class='del'>-	if (index != IONIC_INTR_INDEX_NOT_ASSIGNED &amp;&amp; index &lt; ionic-&gt;nintrs)</div><div class='del'>-		clear_bit(index, ionic-&gt;intrs);</div><div class='add'>+	if (index != IONIC_INTR_INDEX_NOT_ASSIGNED &amp;&amp; index &lt; lif-&gt;ionic-&gt;nintrs)</div><div class='add'>+		clear_bit(index, lif-&gt;ionic-&gt;intrs);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(ionic_intr_free, "NET_IONIC");</div><div class='ctx'> </div><div class='ctx'> static void ionic_irq_aff_notify(struct irq_affinity_notify *notify,</div><div class='ctx'> 				 const cpumask_t *mask)</div><div class='hunk'>@@ -400,7 +408,7 @@ static void ionic_qcq_intr_free(struct ionic_lif *lif, struct ionic_qcq *qcq)</div><div class='ctx'> 	irq_set_affinity_hint(qcq-&gt;intr.vector, NULL);</div><div class='ctx'> 	devm_free_irq(lif-&gt;ionic-&gt;dev, qcq-&gt;intr.vector, &amp;qcq-&gt;napi);</div><div class='ctx'> 	qcq-&gt;intr.vector = 0;</div><div class='del'>-	ionic_intr_free(lif-&gt;ionic, qcq-&gt;intr.index);</div><div class='add'>+	ionic_intr_free(lif, qcq-&gt;intr.index);</div><div class='ctx'> 	qcq-&gt;intr.index = IONIC_INTR_INDEX_NOT_ASSIGNED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -510,13 +518,6 @@ static int ionic_alloc_qcq_interrupt(struct ionic_lif *lif, struct ionic_qcq *qc</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = ionic_bus_get_irq(lif-&gt;ionic, qcq-&gt;intr.index);</div><div class='del'>-	if (err &lt; 0) {</div><div class='del'>-		netdev_warn(lif-&gt;netdev, "no vector for %s: %d\n",</div><div class='del'>-			    qcq-&gt;q.name, err);</div><div class='del'>-		goto err_out_free_intr;</div><div class='del'>-	}</div><div class='del'>-	qcq-&gt;intr.vector = err;</div><div class='ctx'> 	ionic_intr_mask_assert(lif-&gt;ionic-&gt;idev.intr_ctrl, qcq-&gt;intr.index,</div><div class='ctx'> 			       IONIC_INTR_MASK_SET);</div><div class='ctx'> </div><div class='hunk'>@@ -545,7 +546,7 @@ static int ionic_alloc_qcq_interrupt(struct ionic_lif *lif, struct ionic_qcq *qc</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_out_free_intr:</div><div class='del'>-	ionic_intr_free(lif-&gt;ionic, qcq-&gt;intr.index);</div><div class='add'>+	ionic_intr_free(lif, qcq-&gt;intr.index);</div><div class='ctx'> err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -672,7 +673,7 @@ static int ionic_qcq_alloc(struct ionic_lif *lif, unsigned int type,</div><div class='ctx'> 			new-&gt;cmb_order = order_base_2(new-&gt;cmb_q_size / PAGE_SIZE);</div><div class='ctx'> </div><div class='ctx'> 			err = ionic_get_cmb(lif, &amp;new-&gt;cmb_pgid, &amp;new-&gt;cmb_q_base_pa,</div><div class='del'>-					    new-&gt;cmb_order);</div><div class='add'>+					    new-&gt;cmb_order, 0, NULL);</div><div class='ctx'> 			if (err) {</div><div class='ctx'> 				netdev_err(lif-&gt;netdev,</div><div class='ctx'> 					   "Cannot allocate queue order %d from cmb: err %d\n",</div><div class='hunk'>@@ -740,7 +741,7 @@ err_out_free_q:</div><div class='ctx'> err_out_free_irq:</div><div class='ctx'> 	if (flags &amp; IONIC_QCQ_F_INTR) {</div><div class='ctx'> 		devm_free_irq(dev, new-&gt;intr.vector, &amp;new-&gt;napi);</div><div class='del'>-		ionic_intr_free(lif-&gt;ionic, new-&gt;intr.index);</div><div class='add'>+		ionic_intr_free(lif, new-&gt;intr.index);</div><div class='ctx'> 	}</div><div class='ctx'> err_out_free_page_pool:</div><div class='ctx'> 	page_pool_destroy(new-&gt;q.page_pool);</div><div class='hunk'>@@ -2334,20 +2335,6 @@ static int ionic_stop(struct net_device *netdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ionic_eth_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct ionic_lif *lif = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return ionic_lif_hwstamp_set(lif, ifr);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return ionic_lif_hwstamp_get(lif, ifr);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ionic_get_vf_config(struct net_device *netdev,</div><div class='ctx'> 			       int vf, struct ifla_vf_info *ivf)</div><div class='ctx'> {</div><div class='hunk'>@@ -2811,7 +2798,6 @@ static int ionic_xdp(struct net_device *netdev, struct netdev_bpf *bpf)</div><div class='ctx'> static const struct net_device_ops ionic_netdev_ops = {</div><div class='ctx'> 	.ndo_open               = ionic_open,</div><div class='ctx'> 	.ndo_stop               = ionic_stop,</div><div class='del'>-	.ndo_eth_ioctl		= ionic_eth_ioctl,</div><div class='ctx'> 	.ndo_start_xmit		= ionic_start_xmit,</div><div class='ctx'> 	.ndo_bpf		= ionic_xdp,</div><div class='ctx'> 	.ndo_xdp_xmit		= ionic_xdp_xmit,</div><div class='hunk'>@@ -2832,6 +2818,8 @@ static const struct net_device_ops ionic_netdev_ops = {</div><div class='ctx'> 	.ndo_get_vf_config	= ionic_get_vf_config,</div><div class='ctx'> 	.ndo_set_vf_link_state	= ionic_set_vf_link_state,</div><div class='ctx'> 	.ndo_get_vf_stats       = ionic_get_vf_stats,</div><div class='add'>+	.ndo_hwtstamp_get	= ionic_hwstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= ionic_hwstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int ionic_cmb_reconfig(struct ionic_lif *lif,</div><div class='hunk'>@@ -3265,7 +3253,7 @@ int ionic_lif_alloc(struct ionic *ionic)</div><div class='ctx'> 	lif-&gt;netdev-&gt;min_mtu = max_t(unsigned int, ETH_MIN_MTU,</div><div class='ctx'> 				     le32_to_cpu(lif-&gt;identity-&gt;eth.min_frame_size));</div><div class='ctx'> 	lif-&gt;netdev-&gt;max_mtu =</div><div class='del'>-		le32_to_cpu(lif-&gt;identity-&gt;eth.max_frame_size) - ETH_HLEN - VLAN_HLEN;</div><div class='add'>+		le32_to_cpu(lif-&gt;identity-&gt;eth.max_frame_size) - VLAN_ETH_HLEN;</div><div class='ctx'> </div><div class='ctx'> 	lif-&gt;neqs = ionic-&gt;neqs_per_lif;</div><div class='ctx'> 	lif-&gt;nxqs = ionic-&gt;ntxqs_per_lif;</div><div class='hunk'>@@ -3293,6 +3281,7 @@ int ionic_lif_alloc(struct ionic *ionic)</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;lif-&gt;queue_lock);</div><div class='ctx'> 	mutex_init(&amp;lif-&gt;config_lock);</div><div class='add'>+	mutex_init(&amp;lif-&gt;adev_lock);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;lif-&gt;adminq_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -3349,6 +3338,7 @@ err_out_free_lif_info:</div><div class='ctx'> 	lif-&gt;info = NULL;</div><div class='ctx'> 	lif-&gt;info_pa = 0;</div><div class='ctx'> err_out_free_mutex:</div><div class='add'>+	mutex_destroy(&amp;lif-&gt;adev_lock);</div><div class='ctx'> 	mutex_destroy(&amp;lif-&gt;config_lock);</div><div class='ctx'> 	mutex_destroy(&amp;lif-&gt;queue_lock);</div><div class='ctx'> err_out_free_netdev:</div><div class='hunk'>@@ -3384,6 +3374,7 @@ static void ionic_lif_handle_fw_down(struct ionic_lif *lif)</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(lif-&gt;netdev);</div><div class='ctx'> </div><div class='add'>+	ionic_auxbus_unregister(ionic-&gt;lif);</div><div class='ctx'> 	mutex_lock(&amp;lif-&gt;queue_lock);</div><div class='ctx'> 	if (test_bit(IONIC_LIF_F_UP, lif-&gt;state)) {</div><div class='ctx'> 		dev_info(ionic-&gt;dev, "Surprise FW stop, stopping queues\n");</div><div class='hunk'>@@ -3446,6 +3437,8 @@ int ionic_restart_lif(struct ionic_lif *lif)</div><div class='ctx'> 	netif_device_attach(lif-&gt;netdev);</div><div class='ctx'> 	ionic_queue_doorbell_check(ionic, IONIC_NAPI_DEADLINE);</div><div class='ctx'> </div><div class='add'>+	ionic_auxbus_register(ionic-&gt;lif);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_txrx_free:</div><div class='hunk'>@@ -3526,12 +3519,9 @@ void ionic_lif_free(struct ionic_lif *lif)</div><div class='ctx'> 	lif-&gt;info = NULL;</div><div class='ctx'> 	lif-&gt;info_pa = 0;</div><div class='ctx'> </div><div class='del'>-	/* unmap doorbell page */</div><div class='del'>-	ionic_bus_unmap_dbpage(lif-&gt;ionic, lif-&gt;kern_dbpage);</div><div class='del'>-	lif-&gt;kern_dbpage = NULL;</div><div class='del'>-</div><div class='ctx'> 	mutex_destroy(&amp;lif-&gt;config_lock);</div><div class='ctx'> 	mutex_destroy(&amp;lif-&gt;queue_lock);</div><div class='add'>+	mutex_destroy(&amp;lif-&gt;adev_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* free netdev &amp; lif */</div><div class='ctx'> 	ionic_debugfs_del_lif(lif);</div><div class='hunk'>@@ -3555,6 +3545,9 @@ void ionic_lif_deinit(struct ionic_lif *lif)</div><div class='ctx'> 	ionic_lif_qcq_deinit(lif, lif-&gt;notifyqcq);</div><div class='ctx'> 	ionic_lif_qcq_deinit(lif, lif-&gt;adminqcq);</div><div class='ctx'> </div><div class='add'>+	ionic_bus_unmap_dbpage(lif-&gt;ionic, lif-&gt;kern_dbpage);</div><div class='add'>+	lif-&gt;kern_dbpage = NULL;</div><div class='add'>+</div><div class='ctx'> 	ionic_lif_reset(lif);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3804,10 +3797,6 @@ err_out_adminq_deinit:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ionic_lif_notify_work(struct work_struct *ws)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void ionic_lif_set_netdev_info(struct ionic_lif *lif)</div><div class='ctx'> {</div><div class='ctx'> 	struct ionic_admin_ctx ctx = {</div><div class='hunk'>@@ -3858,8 +3847,6 @@ int ionic_lif_register(struct ionic_lif *lif)</div><div class='ctx'> </div><div class='ctx'> 	ionic_lif_register_phc(lif);</div><div class='ctx'> </div><div class='del'>-	INIT_WORK(&amp;lif-&gt;ionic-&gt;nb_work, ionic_lif_notify_work);</div><div class='del'>-</div><div class='ctx'> 	lif-&gt;ionic-&gt;nb.notifier_call = ionic_lif_notify;</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdevice_notifier(&amp;lif-&gt;ionic-&gt;nb);</div><div class='hunk'>@@ -3869,8 +3856,8 @@ int ionic_lif_register(struct ionic_lif *lif)</div><div class='ctx'> 	/* only register LIF0 for now */</div><div class='ctx'> 	err = register_netdev(lif-&gt;netdev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(lif-&gt;ionic-&gt;dev, "Cannot register net device, aborting\n");</div><div class='del'>-		ionic_lif_unregister_phc(lif);</div><div class='add'>+		dev_err(lif-&gt;ionic-&gt;dev, "Cannot register net device: %d, aborting\n", err);</div><div class='add'>+		ionic_lif_unregister(lif);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3885,7 +3872,6 @@ void ionic_lif_unregister(struct ionic_lif *lif)</div><div class='ctx'> {</div><div class='ctx'> 	if (lif-&gt;ionic-&gt;nb.notifier_call) {</div><div class='ctx'> 		unregister_netdevice_notifier(&amp;lif-&gt;ionic-&gt;nb);</div><div class='del'>-		cancel_work_sync(&amp;lif-&gt;ionic-&gt;nb_work);</div><div class='ctx'> 		lif-&gt;ionic-&gt;nb.notifier_call = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_lif.h b/drivers/net/ethernet/pensando/ionic/ionic_lif.h<br/>index e01756fb7fdd..8e10f66dc50e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_lif.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_lif.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_lif.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_lif.h</a></div><div class='hunk'>@@ -6,10 +6,11 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='ctx'> #include &lt;linux/timecounter.h&gt;</div><div class='del'>-#include &lt;uapi/linux/net_tstamp.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/dim.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include "ionic_rx_filter.h"</div><div class='add'>+#include "ionic_api.h"</div><div class='ctx'> </div><div class='ctx'> #define IONIC_ADMINQ_LENGTH	16	/* must be a power of two */</div><div class='ctx'> #define IONIC_NOTIFYQ_LENGTH	64	/* must be a power of two */</div><div class='hunk'>@@ -225,6 +226,8 @@ struct ionic_lif {</div><div class='ctx'> 	dma_addr_t info_pa;</div><div class='ctx'> 	u32 info_sz;</div><div class='ctx'> 	struct ionic_qtype_info qtype_info[IONIC_QTYPE_MAX];</div><div class='add'>+	struct ionic_aux_dev *ionic_adev;</div><div class='add'>+	struct mutex adev_lock;	/* lock for aux_dev actions */</div><div class='ctx'> </div><div class='ctx'> 	u8 rss_hash_key[IONIC_RSS_HASH_KEY_SIZE];</div><div class='ctx'> 	u8 *rss_ind_tbl;</div><div class='hunk'>@@ -251,7 +254,7 @@ struct ionic_phc {</div><div class='ctx'> 	struct timecounter tc;</div><div class='ctx'> </div><div class='ctx'> 	struct mutex config_lock; /* lock for ts_config */</div><div class='del'>-	struct hwtstamp_config ts_config;</div><div class='add'>+	struct kernel_hwtstamp_config ts_config;</div><div class='ctx'> 	u64 ts_config_rx_filt;</div><div class='ctx'> 	u32 ts_config_tx_mode;</div><div class='ctx'> </div><div class='hunk'>@@ -359,8 +362,11 @@ int ionic_lif_size(struct ionic *ionic);</div><div class='ctx'> #if IS_ENABLED(CONFIG_PTP_1588_CLOCK)</div><div class='ctx'> void ionic_lif_hwstamp_replay(struct ionic_lif *lif);</div><div class='ctx'> void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif);</div><div class='del'>-int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr);</div><div class='del'>-int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr);</div><div class='add'>+int ionic_hwstamp_set(struct net_device *netdev,</div><div class='add'>+		      struct kernel_hwtstamp_config *config,</div><div class='add'>+		      struct netlink_ext_ack *extack);</div><div class='add'>+int ionic_hwstamp_get(struct net_device *netdev,</div><div class='add'>+		      struct kernel_hwtstamp_config *config);</div><div class='ctx'> ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter);</div><div class='ctx'> void ionic_lif_register_phc(struct ionic_lif *lif);</div><div class='ctx'> void ionic_lif_unregister_phc(struct ionic_lif *lif);</div><div class='hunk'>@@ -370,12 +376,15 @@ void ionic_lif_free_phc(struct ionic_lif *lif);</div><div class='ctx'> static inline void ionic_lif_hwstamp_replay(struct ionic_lif *lif) {}</div><div class='ctx'> static inline void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif) {}</div><div class='ctx'> </div><div class='del'>-static inline int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr)</div><div class='add'>+static inline int ionic_hwstamp_set(struct net_device *netdev,</div><div class='add'>+				    struct kernel_hwtstamp_config *config,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr)</div><div class='add'>+static inline int ionic_hwstamp_get(struct net_device *netdev,</div><div class='add'>+				    struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_main.c b/drivers/net/ethernet/pensando/ionic/ionic_main.c<br/>index 0f817c3f92d8..14dc055be3e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_main.c</a></div><div class='hunk'>@@ -72,7 +72,7 @@ static const char *ionic_error_to_str(enum ionic_status_code code)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ionic_error_to_errno(enum ionic_status_code code)</div><div class='add'>+int ionic_error_to_errno(enum ionic_status_code code)</div><div class='ctx'> {</div><div class='ctx'> 	switch (code) {</div><div class='ctx'> 	case IONIC_RC_SUCCESS:</div><div class='hunk'>@@ -81,8 +81,9 @@ static int ionic_error_to_errno(enum ionic_status_code code)</div><div class='ctx'> 	case IONIC_RC_EQTYPE:</div><div class='ctx'> 	case IONIC_RC_EQID:</div><div class='ctx'> 	case IONIC_RC_EINVAL:</div><div class='del'>-	case IONIC_RC_ENOSUPP:</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	case IONIC_RC_ENOSUPP:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> 	case IONIC_RC_EPERM:</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	case IONIC_RC_ENOENT:</div><div class='hunk'>@@ -113,6 +114,7 @@ static int ionic_error_to_errno(enum ionic_status_code code)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(ionic_error_to_errno, "NET_IONIC");</div><div class='ctx'> </div><div class='ctx'> static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode)</div><div class='ctx'> {</div><div class='hunk'>@@ -479,6 +481,7 @@ int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	return __ionic_adminq_post_wait(lif, ctx, true);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_NS(ionic_adminq_post_wait, "NET_IONIC");</div><div class='ctx'> </div><div class='ctx'> int ionic_adminq_post_wait_nomsg(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)</div><div class='ctx'> {</div><div class='hunk'>@@ -515,9 +518,9 @@ static int __ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds,</div><div class='ctx'> 	unsigned long start_time;</div><div class='ctx'> 	unsigned long max_wait;</div><div class='ctx'> 	unsigned long duration;</div><div class='del'>-	int done = 0;</div><div class='ctx'> 	bool fw_up;</div><div class='ctx'> 	int opcode;</div><div class='add'>+	bool done;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for dev cmd to complete, retrying if we get EAGAIN,</div><div class='hunk'>@@ -525,6 +528,7 @@ static int __ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds,</div><div class='ctx'> 	 */</div><div class='ctx'> 	max_wait = jiffies + (max_seconds * HZ);</div><div class='ctx'> try_again:</div><div class='add'>+	done = false;</div><div class='ctx'> 	opcode = idev-&gt;opcode;</div><div class='ctx'> 	start_time = jiffies;</div><div class='ctx'> 	for (fw_up = ionic_is_fw_running(idev);</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_phc.c b/drivers/net/ethernet/pensando/ionic/ionic_phc.c<br/>index 7505efdff8e9..05b44fc482f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_phc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_phc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_phc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_phc.c</a></div><div class='hunk'>@@ -65,11 +65,12 @@ static u64 ionic_hwstamp_rx_filt(int config_rx_filter)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ionic_lif_hwstamp_set_ts_config(struct ionic_lif *lif,</div><div class='del'>-					   struct hwtstamp_config *new_ts)</div><div class='add'>+					   struct kernel_hwtstamp_config *new_ts,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct kernel_hwtstamp_config *config;</div><div class='add'>+	struct kernel_hwtstamp_config ts = {};</div><div class='ctx'> 	struct ionic *ionic = lif-&gt;ionic;</div><div class='del'>-	struct hwtstamp_config *config;</div><div class='del'>-	struct hwtstamp_config ts;</div><div class='ctx'> 	int tx_mode = 0;</div><div class='ctx'> 	u64 rx_filt = 0;</div><div class='ctx'> 	int err, err2;</div><div class='hunk'>@@ -99,12 +100,16 @@ static int ionic_lif_hwstamp_set_ts_config(struct ionic_lif *lif,</div><div class='ctx'> </div><div class='ctx'> 	tx_mode = ionic_hwstamp_tx_mode(config-&gt;tx_type);</div><div class='ctx'> 	if (tx_mode &lt; 0) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "TX time stamping mode isn't supported");</div><div class='ctx'> 		err = tx_mode;</div><div class='ctx'> 		goto err_queues;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mask = cpu_to_le64(BIT_ULL(tx_mode));</div><div class='ctx'> 	if ((ionic-&gt;ident.lif.eth.hwstamp_tx_modes &amp; mask) != mask) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "TX time stamping mode isn't supported");</div><div class='ctx'> 		err = -ERANGE;</div><div class='ctx'> 		goto err_queues;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -124,32 +129,47 @@ static int ionic_lif_hwstamp_set_ts_config(struct ionic_lif *lif,</div><div class='ctx'> </div><div class='ctx'> 	if (tx_mode) {</div><div class='ctx'> 		err = ionic_lif_create_hwstamp_txq(lif);</div><div class='del'>-		if (err)</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Error creating TX timestamp queue");</div><div class='ctx'> 			goto err_queues;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rx_filt) {</div><div class='ctx'> 		err = ionic_lif_create_hwstamp_rxq(lif);</div><div class='del'>-		if (err)</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Error creating RX timestamp queue");</div><div class='ctx'> 			goto err_queues;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (tx_mode != lif-&gt;phc-&gt;ts_config_tx_mode) {</div><div class='ctx'> 		err = ionic_lif_set_hwstamp_txmode(lif, tx_mode);</div><div class='del'>-		if (err)</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Error enabling TX timestamp mode");</div><div class='ctx'> 			goto err_txmode;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rx_filt != lif-&gt;phc-&gt;ts_config_rx_filt) {</div><div class='ctx'> 		err = ionic_lif_set_hwstamp_rxfilt(lif, rx_filt);</div><div class='del'>-		if (err)</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Error enabling RX timestamp mode");</div><div class='ctx'> 			goto err_rxfilt;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rx_all != (lif-&gt;phc-&gt;ts_config.rx_filter == HWTSTAMP_FILTER_ALL)) {</div><div class='ctx'> 		err = ionic_lif_config_hwstamp_rxq_all(lif, rx_all);</div><div class='del'>-		if (err)</div><div class='add'>+		if (err) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Error enabling RX timestamp mode");</div><div class='ctx'> 			goto err_rxall;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(&amp;lif-&gt;phc-&gt;ts_config, config, sizeof(*config));</div><div class='hunk'>@@ -183,28 +203,24 @@ err_queues:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr)</div><div class='add'>+int ionic_hwstamp_set(struct net_device *netdev,</div><div class='add'>+		      struct kernel_hwtstamp_config *config,</div><div class='add'>+		      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	struct ionic_lif *lif = netdev_priv(netdev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!lif-&gt;phc || !lif-&gt;phc-&gt;ptp)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;lif-&gt;queue_lock);</div><div class='del'>-	err = ionic_lif_hwstamp_set_ts_config(lif, &amp;config);</div><div class='add'>+	err = ionic_lif_hwstamp_set_ts_config(lif, config, extack);</div><div class='ctx'> 	mutex_unlock(&amp;lif-&gt;queue_lock);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netdev_info(lif-&gt;netdev, "hwstamp set failed: %d\n", err);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -216,7 +232,7 @@ void ionic_lif_hwstamp_replay(struct ionic_lif *lif)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;lif-&gt;queue_lock);</div><div class='del'>-	err = ionic_lif_hwstamp_set_ts_config(lif, NULL);</div><div class='add'>+	err = ionic_lif_hwstamp_set_ts_config(lif, NULL, NULL);</div><div class='ctx'> 	mutex_unlock(&amp;lif-&gt;queue_lock);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		netdev_info(lif-&gt;netdev, "hwstamp replay failed: %d\n", err);</div><div class='hunk'>@@ -246,19 +262,18 @@ void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif)</div><div class='ctx'> 	mutex_unlock(&amp;lif-&gt;phc-&gt;config_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr)</div><div class='add'>+int ionic_hwstamp_get(struct net_device *netdev,</div><div class='add'>+		      struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	struct ionic_lif *lif = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (!lif-&gt;phc || !lif-&gt;phc-&gt;ptp)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;lif-&gt;phc-&gt;config_lock);</div><div class='del'>-	memcpy(&amp;config, &amp;lif-&gt;phc-&gt;ts_config, sizeof(config));</div><div class='add'>+	memcpy(config, &amp;lif-&gt;phc-&gt;ts_config, sizeof(*config));</div><div class='ctx'> 	mutex_unlock(&amp;lif-&gt;phc-&gt;config_lock);</div><div class='ctx'> </div><div class='del'>-	if (copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -290,7 +305,7 @@ static u64 ionic_hwstamp_read(struct ionic *ionic,</div><div class='ctx'> 	return (u64)tick_low | ((u64)tick_high &lt;&lt; 32);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 ionic_cc_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 ionic_cc_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct ionic_phc *phc = container_of(cc, struct ionic_phc, cc);</div><div class='ctx'> 	struct ionic *ionic = phc-&gt;lif-&gt;ionic;</div><div class='head'>diff --git a/drivers/net/ethernet/pensando/ionic/ionic_txrx.c b/drivers/net/ethernet/pensando/ionic/ionic_txrx.c<br/>index 2ac59564ded1..301ebee2fdc5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/pensando/ionic/ionic_txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/pensando/ionic/ionic_txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/pensando/ionic/ionic_txrx.c</a></div><div class='hunk'>@@ -29,6 +29,10 @@ static void ionic_tx_clean(struct ionic_queue *q,</div><div class='ctx'> </div><div class='ctx'> static inline void ionic_txq_post(struct ionic_queue *q, bool ring_dbell)</div><div class='ctx'> {</div><div class='add'>+	/* Ensure TX descriptor writes reach memory before NIC reads them.</div><div class='add'>+	 * Prevents device from fetching stale descriptors.</div><div class='add'>+	 */</div><div class='add'>+	dma_wmb();</div><div class='ctx'> 	ionic_q_post(q, ring_dbell);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -321,7 +325,7 @@ static int ionic_xdp_post_frame(struct ionic_queue *q, struct xdp_frame *frame,</div><div class='ctx'> 					   len, DMA_TO_DEVICE);</div><div class='ctx'> 	} else /* XDP_REDIRECT */ {</div><div class='ctx'> 		dma_addr = ionic_tx_map_single(q, frame-&gt;data, len);</div><div class='del'>-		if (!dma_addr)</div><div class='add'>+		if (dma_addr == DMA_MAPPING_ERROR)</div><div class='ctx'> 			return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -357,7 +361,7 @@ static int ionic_xdp_post_frame(struct ionic_queue *q, struct xdp_frame *frame,</div><div class='ctx'> 			} else {</div><div class='ctx'> 				dma_addr = ionic_tx_map_frag(q, frag, 0,</div><div class='ctx'> 							     skb_frag_size(frag));</div><div class='del'>-				if (dma_mapping_error(q-&gt;dev, dma_addr)) {</div><div class='add'>+				if (dma_addr == DMA_MAPPING_ERROR) {</div><div class='ctx'> 					ionic_tx_desc_unmap_bufs(q, desc_info);</div><div class='ctx'> 					return -EIO;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -1083,7 +1087,7 @@ static dma_addr_t ionic_tx_map_single(struct ionic_queue *q,</div><div class='ctx'> 		net_warn_ratelimited("%s: DMA single map failed on %s!\n",</div><div class='ctx'> 				     dev_name(dev), q-&gt;name);</div><div class='ctx'> 		q_to_tx_stats(q)-&gt;dma_map_err++;</div><div class='del'>-		return 0;</div><div class='add'>+		return DMA_MAPPING_ERROR;</div><div class='ctx'> 	}</div><div class='ctx'> 	return dma_addr;</div><div class='ctx'> }</div><div class='hunk'>@@ -1100,7 +1104,7 @@ static dma_addr_t ionic_tx_map_frag(struct ionic_queue *q,</div><div class='ctx'> 		net_warn_ratelimited("%s: DMA frag map failed on %s!\n",</div><div class='ctx'> 				     dev_name(dev), q-&gt;name);</div><div class='ctx'> 		q_to_tx_stats(q)-&gt;dma_map_err++;</div><div class='del'>-		return 0;</div><div class='add'>+		return DMA_MAPPING_ERROR;</div><div class='ctx'> 	}</div><div class='ctx'> 	return dma_addr;</div><div class='ctx'> }</div><div class='hunk'>@@ -1116,7 +1120,7 @@ static int ionic_tx_map_skb(struct ionic_queue *q, struct sk_buff *skb,</div><div class='ctx'> 	int frag_idx;</div><div class='ctx'> </div><div class='ctx'> 	dma_addr = ionic_tx_map_single(q, skb-&gt;data, skb_headlen(skb));</div><div class='del'>-	if (!dma_addr)</div><div class='add'>+	if (dma_addr == DMA_MAPPING_ERROR)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	buf_info-&gt;dma_addr = dma_addr;</div><div class='ctx'> 	buf_info-&gt;len = skb_headlen(skb);</div><div class='hunk'>@@ -1126,7 +1130,7 @@ static int ionic_tx_map_skb(struct ionic_queue *q, struct sk_buff *skb,</div><div class='ctx'> 	nfrags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='ctx'> 	for (frag_idx = 0; frag_idx &lt; nfrags; frag_idx++, frag++) {</div><div class='ctx'> 		dma_addr = ionic_tx_map_frag(q, frag, 0, skb_frag_size(frag));</div><div class='del'>-		if (!dma_addr)</div><div class='add'>+		if (dma_addr == DMA_MAPPING_ERROR)</div><div class='ctx'> 			goto dma_fail;</div><div class='ctx'> 		buf_info-&gt;dma_addr = dma_addr;</div><div class='ctx'> 		buf_info-&gt;len = skb_frag_size(frag);</div><div class='hunk'>@@ -1444,19 +1448,6 @@ static int ionic_tx_tso(struct net_device *netdev, struct ionic_queue *q,</div><div class='ctx'> 	bool encap;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	desc_info = &amp;q-&gt;tx_info[q-&gt;head_idx];</div><div class='del'>-</div><div class='del'>-	if (unlikely(ionic_tx_map_skb(q, skb, desc_info)))</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	len = skb-&gt;len;</div><div class='del'>-	mss = skb_shinfo(skb)-&gt;gso_size;</div><div class='del'>-	outer_csum = (skb_shinfo(skb)-&gt;gso_type &amp; (SKB_GSO_GRE |</div><div class='del'>-						   SKB_GSO_GRE_CSUM |</div><div class='del'>-						   SKB_GSO_IPXIP4 |</div><div class='del'>-						   SKB_GSO_IPXIP6 |</div><div class='del'>-						   SKB_GSO_UDP_TUNNEL |</div><div class='del'>-						   SKB_GSO_UDP_TUNNEL_CSUM));</div><div class='ctx'> 	has_vlan = !!skb_vlan_tag_present(skb);</div><div class='ctx'> 	vlan_tci = skb_vlan_tag_get(skb);</div><div class='ctx'> 	encap = skb-&gt;encapsulation;</div><div class='hunk'>@@ -1470,12 +1461,21 @@ static int ionic_tx_tso(struct net_device *netdev, struct ionic_queue *q,</div><div class='ctx'> 		err = ionic_tx_tcp_inner_pseudo_csum(skb);</div><div class='ctx'> 	else</div><div class='ctx'> 		err = ionic_tx_tcp_pseudo_csum(skb);</div><div class='del'>-	if (unlikely(err)) {</div><div class='del'>-		/* clean up mapping from ionic_tx_map_skb */</div><div class='del'>-		ionic_tx_desc_unmap_bufs(q, desc_info);</div><div class='add'>+	if (unlikely(err))</div><div class='ctx'> 		return err;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+	desc_info = &amp;q-&gt;tx_info[q-&gt;head_idx];</div><div class='add'>+	if (unlikely(ionic_tx_map_skb(q, skb, desc_info)))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	len = skb-&gt;len;</div><div class='add'>+	mss = skb_shinfo(skb)-&gt;gso_size;</div><div class='add'>+	outer_csum = (skb_shinfo(skb)-&gt;gso_type &amp; (SKB_GSO_GRE |</div><div class='add'>+						   SKB_GSO_GRE_CSUM |</div><div class='add'>+						   SKB_GSO_IPXIP4 |</div><div class='add'>+						   SKB_GSO_IPXIP6 |</div><div class='add'>+						   SKB_GSO_UDP_TUNNEL |</div><div class='add'>+						   SKB_GSO_UDP_TUNNEL_CSUM));</div><div class='ctx'> 	if (encap)</div><div class='ctx'> 		hdrlen = skb_inner_tcp_all_headers(skb);</div><div class='ctx'> 	else</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c b/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c<br/>index 9cff0a8ffb2c..e8ff661fa4a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c</a></div><div class='hunk'>@@ -2832,7 +2832,7 @@ netxen_sysfs_validate_crb(struct netxen_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static ssize_t</div><div class='ctx'> netxen_sysfs_read_crb(struct file *filp, struct kobject *kobj,</div><div class='del'>-		struct bin_attribute *attr,</div><div class='add'>+		const struct bin_attribute *attr,</div><div class='ctx'> 		char *buf, loff_t offset, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = kobj_to_dev(kobj);</div><div class='hunk'>@@ -2860,7 +2860,7 @@ netxen_sysfs_read_crb(struct file *filp, struct kobject *kobj,</div><div class='ctx'> </div><div class='ctx'> static ssize_t</div><div class='ctx'> netxen_sysfs_write_crb(struct file *filp, struct kobject *kobj,</div><div class='del'>-		struct bin_attribute *attr,</div><div class='add'>+		const struct bin_attribute *attr,</div><div class='ctx'> 		char *buf, loff_t offset, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = kobj_to_dev(kobj);</div><div class='hunk'>@@ -2901,7 +2901,7 @@ netxen_sysfs_validate_mem(struct netxen_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static ssize_t</div><div class='ctx'> netxen_sysfs_read_mem(struct file *filp, struct kobject *kobj,</div><div class='del'>-		struct bin_attribute *attr,</div><div class='add'>+		const struct bin_attribute *attr,</div><div class='ctx'> 		char *buf, loff_t offset, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = kobj_to_dev(kobj);</div><div class='hunk'>@@ -2922,7 +2922,7 @@ netxen_sysfs_read_mem(struct file *filp, struct kobject *kobj,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t netxen_sysfs_write_mem(struct file *filp, struct kobject *kobj,</div><div class='del'>-		struct bin_attribute *attr, char *buf,</div><div class='add'>+		const struct bin_attribute *attr, char *buf,</div><div class='ctx'> 		loff_t offset, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = kobj_to_dev(kobj);</div><div class='hunk'>@@ -2959,7 +2959,7 @@ static const struct bin_attribute bin_attr_mem = {</div><div class='ctx'> </div><div class='ctx'> static ssize_t</div><div class='ctx'> netxen_sysfs_read_dimm(struct file *filp, struct kobject *kobj,</div><div class='del'>-		struct bin_attribute *attr,</div><div class='add'>+		const struct bin_attribute *attr,</div><div class='ctx'> 		char *buf, loff_t offset, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = kobj_to_dev(kobj);</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed.h b/drivers/net/ethernet/qlogic/qed/qed.h<br/>index b7def3b54937..016b575861b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed.h</a></div><div class='hunk'>@@ -939,7 +939,6 @@ u16 qed_get_cm_pq_idx_ofld_mtc(struct qed_hwfn *p_hwfn, u8 tc);</div><div class='ctx'> u16 qed_get_cm_pq_idx_llt_mtc(struct qed_hwfn *p_hwfn, u8 tc);</div><div class='ctx'> </div><div class='ctx'> /* doorbell recovery mechanism */</div><div class='del'>-void qed_db_recovery_dp(struct qed_hwfn *p_hwfn);</div><div class='ctx'> void qed_db_recovery_execute(struct qed_hwfn *p_hwfn);</div><div class='ctx'> bool qed_edpm_enabled(struct qed_hwfn *p_hwfn);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h b/drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h<br/>index f6cd1b3efdfd..27e91d0d39f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h</a></div><div class='hunk'>@@ -1305,37 +1305,6 @@ enum dbg_status qed_print_mcp_trace_results(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 					    char *results_buf);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * qed_print_mcp_trace_results_cont(): Prints MCP Trace results, and</div><div class='del'>- * keeps the MCP trace meta data allocated, to support continuous MCP Trace</div><div class='del'>- * parsing. After the continuous parsing ends, mcp_trace_free_meta_data should</div><div class='del'>- * be called to free the meta data.</div><div class='del'>- *</div><div class='del'>- * @p_hwfn: HW device data.</div><div class='del'>- * @dump_buf: MVP trace dump buffer, starting from the header.</div><div class='del'>- * @results_buf: Buffer for printing the mcp trace results.</div><div class='del'>- *</div><div class='del'>- * Return: Error if the parsing fails, ok otherwise.</div><div class='del'>- */</div><div class='del'>-enum dbg_status qed_print_mcp_trace_results_cont(struct qed_hwfn *p_hwfn,</div><div class='del'>-						 u32 *dump_buf,</div><div class='del'>-						 char *results_buf);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * qed_print_mcp_trace_line(): Prints MCP Trace results for a single line</div><div class='del'>- *</div><div class='del'>- * @p_hwfn: HW device data.</div><div class='del'>- * @dump_buf: MCP trace dump buffer, starting from the header.</div><div class='del'>- * @num_dumped_bytes: Number of bytes that were dumped.</div><div class='del'>- * @results_buf: Buffer for printing the mcp trace results.</div><div class='del'>- *</div><div class='del'>- * Return: Error if the parsing fails, ok otherwise.</div><div class='del'>- */</div><div class='del'>-enum dbg_status qed_print_mcp_trace_line(struct qed_hwfn *p_hwfn,</div><div class='del'>-					 u8 *dump_buf,</div><div class='del'>-					 u32 num_dumped_bytes,</div><div class='del'>-					 char *results_buf);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * qed_mcp_trace_free_meta_data(): Frees the MCP Trace meta data.</div><div class='ctx'>  * Should be called after continuous MCP Trace parsing.</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_debug.c b/drivers/net/ethernet/qlogic/qed/qed_debug.c<br/>index 464a72afb758..1f0cea3cae92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_debug.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_debug.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_debug.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_debug.c</a></div><div class='hunk'>@@ -4462,10 +4462,11 @@ static enum dbg_status qed_protection_override_dump(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Add override window info to buffer */</div><div class='add'>+	/* Add override window info to buffer, preventing buffer overflow */</div><div class='ctx'> 	override_window_dwords =</div><div class='del'>-		qed_rd(p_hwfn, p_ptt, GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW) *</div><div class='del'>-		PROTECTION_OVERRIDE_ELEMENT_DWORDS;</div><div class='add'>+		min(qed_rd(p_hwfn, p_ptt, GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW) *</div><div class='add'>+		PROTECTION_OVERRIDE_ELEMENT_DWORDS,</div><div class='add'>+		PROTECTION_OVERRIDE_DEPTH_DWORDS);</div><div class='ctx'> 	if (override_window_dwords) {</div><div class='ctx'> 		addr = BYTES_TO_DWORDS(GRC_REG_PROTECTION_OVERRIDE_WINDOW);</div><div class='ctx'> 		offset += qed_grc_dump_addr_range(p_hwfn,</div><div class='hunk'>@@ -7614,31 +7615,6 @@ enum dbg_status qed_print_mcp_trace_results(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 					results_buf, &amp;parsed_buf_size, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-enum dbg_status qed_print_mcp_trace_results_cont(struct qed_hwfn *p_hwfn,</div><div class='del'>-						 u32 *dump_buf,</div><div class='del'>-						 char *results_buf)</div><div class='del'>-{</div><div class='del'>-	u32 parsed_buf_size;</div><div class='del'>-</div><div class='del'>-	return qed_parse_mcp_trace_dump(p_hwfn, dump_buf, results_buf,</div><div class='del'>-					&amp;parsed_buf_size, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-enum dbg_status qed_print_mcp_trace_line(struct qed_hwfn *p_hwfn,</div><div class='del'>-					 u8 *dump_buf,</div><div class='del'>-					 u32 num_dumped_bytes,</div><div class='del'>-					 char *results_buf)</div><div class='del'>-{</div><div class='del'>-	u32 parsed_results_bytes;</div><div class='del'>-</div><div class='del'>-	return qed_parse_mcp_trace_buf(p_hwfn,</div><div class='del'>-				       dump_buf,</div><div class='del'>-				       num_dumped_bytes,</div><div class='del'>-				       0,</div><div class='del'>-				       num_dumped_bytes,</div><div class='del'>-				       results_buf, &amp;parsed_results_bytes);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Frees the specified MCP Trace meta data */</div><div class='ctx'> void qed_mcp_trace_free_meta_data(struct qed_hwfn *p_hwfn)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_dev.c b/drivers/net/ethernet/qlogic/qed/qed_dev.c<br/>index 86a93cac2647..f3d2b2b3bad5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_dev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_dev.c</a></div><div class='hunk'>@@ -255,25 +255,6 @@ static void qed_db_recovery_teardown(struct qed_hwfn *p_hwfn)</div><div class='ctx'> 	p_hwfn-&gt;db_recovery_info.db_recovery_counter = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Print the content of the doorbell recovery mechanism */</div><div class='del'>-void qed_db_recovery_dp(struct qed_hwfn *p_hwfn)</div><div class='del'>-{</div><div class='del'>-	struct qed_db_recovery_entry *db_entry = NULL;</div><div class='del'>-</div><div class='del'>-	DP_NOTICE(p_hwfn,</div><div class='del'>-		  "Displaying doorbell recovery database. Counter was %d\n",</div><div class='del'>-		  p_hwfn-&gt;db_recovery_info.db_recovery_counter);</div><div class='del'>-</div><div class='del'>-	/* Protect the list */</div><div class='del'>-	spin_lock_bh(&amp;p_hwfn-&gt;db_recovery_info.lock);</div><div class='del'>-	list_for_each_entry(db_entry,</div><div class='del'>-			    &amp;p_hwfn-&gt;db_recovery_info.list, list_entry) {</div><div class='del'>-		qed_db_recovery_dp_entry(p_hwfn, db_entry, "Printing");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_bh(&amp;p_hwfn-&gt;db_recovery_info.lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Ring the doorbell of a single doorbell recovery entry */</div><div class='ctx'> static void qed_db_recovery_ring(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 				 struct qed_db_recovery_entry *db_entry)</div><div class='hunk'>@@ -2235,7 +2216,7 @@ int qed_resc_alloc(struct qed_dev *cdev)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* CID map / ILT shadow table / T2</div><div class='del'>-		 * The talbes sizes are determined by the computations above</div><div class='add'>+		 * The table sizes are determined by the computations above</div><div class='ctx'> 		 */</div><div class='ctx'> 		rc = qed_cxt_tables_alloc(p_hwfn);</div><div class='ctx'> 		if (rc)</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_devlink.c b/drivers/net/ethernet/qlogic/qed/qed_devlink.c<br/>index 1adc7fbb3f2f..0c5278c0598c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_devlink.c</a></div><div class='hunk'>@@ -87,20 +87,21 @@ qed_fw_fatal_reporter_recover(struct devlink_health_reporter *reporter,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define QED_REPORTER_FW_GRACEFUL_PERIOD 0</div><div class='add'>+</div><div class='ctx'> static const struct devlink_health_reporter_ops qed_fw_fatal_reporter_ops = {</div><div class='ctx'> 		.name = "fw_fatal",</div><div class='ctx'> 		.recover = qed_fw_fatal_reporter_recover,</div><div class='ctx'> 		.dump = qed_fw_fatal_reporter_dump,</div><div class='add'>+		.default_graceful_period = QED_REPORTER_FW_GRACEFUL_PERIOD,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define QED_REPORTER_FW_GRACEFUL_PERIOD 0</div><div class='del'>-</div><div class='ctx'> void qed_fw_reporters_create(struct devlink *devlink)</div><div class='ctx'> {</div><div class='ctx'> 	struct qed_devlink *dl = devlink_priv(devlink);</div><div class='ctx'> </div><div class='del'>-	dl-&gt;fw_reporter = devlink_health_reporter_create(devlink, &amp;qed_fw_fatal_reporter_ops,</div><div class='del'>-							 QED_REPORTER_FW_GRACEFUL_PERIOD, dl);</div><div class='add'>+	dl-&gt;fw_reporter = devlink_health_reporter_create(devlink,</div><div class='add'>+		&amp;qed_fw_fatal_reporter_ops, dl);</div><div class='ctx'> 	if (IS_ERR(dl-&gt;fw_reporter)) {</div><div class='ctx'> 		DP_NOTICE(dl-&gt;cdev, "Failed to create fw reporter, err = %ld\n",</div><div class='ctx'> 			  PTR_ERR(dl-&gt;fw_reporter));</div><div class='hunk'>@@ -120,7 +121,8 @@ void qed_fw_reporters_destroy(struct devlink *devlink)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qed_dl_param_get(struct devlink *dl, u32 id,</div><div class='del'>-			    struct devlink_param_gset_ctx *ctx)</div><div class='add'>+			    struct devlink_param_gset_ctx *ctx,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct qed_devlink *qed_dl = devlink_priv(dl);</div><div class='ctx'> 	struct qed_dev *cdev;</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_hsi.h b/drivers/net/ethernet/qlogic/qed/qed_hsi.h<br/>index ed1a84542ad2..10e355397cee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_hsi.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_hsi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_hsi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_hsi.h</a></div><div class='hunk'>@@ -2666,58 +2666,6 @@ void qed_gft_config(struct qed_hwfn *p_hwfn,</div><div class='ctx'> void qed_enable_context_validation(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 				   struct qed_ptt *p_ptt);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * qed_calc_session_ctx_validation(): Calcualte validation byte for</div><div class='del'>- *                                    session context.</div><div class='del'>- *</div><div class='del'>- * @p_ctx_mem: Pointer to context memory.</div><div class='del'>- * @ctx_size: Context size.</div><div class='del'>- * @ctx_type: Context type.</div><div class='del'>- * @cid: Context cid.</div><div class='del'>- *</div><div class='del'>- * Return: Void.</div><div class='del'>- */</div><div class='del'>-void qed_calc_session_ctx_validation(void *p_ctx_mem,</div><div class='del'>-				     u16 ctx_size, u8 ctx_type, u32 cid);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * qed_calc_task_ctx_validation(): Calcualte validation byte for task</div><div class='del'>- *                                 context.</div><div class='del'>- *</div><div class='del'>- * @p_ctx_mem: Pointer to context memory.</div><div class='del'>- * @ctx_size: Context size.</div><div class='del'>- * @ctx_type: Context type.</div><div class='del'>- * @tid: Context tid.</div><div class='del'>- *</div><div class='del'>- * Return: Void.</div><div class='del'>- */</div><div class='del'>-void qed_calc_task_ctx_validation(void *p_ctx_mem,</div><div class='del'>-				  u16 ctx_size, u8 ctx_type, u32 tid);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * qed_memset_session_ctx(): Memset session context to 0 while</div><div class='del'>- *                            preserving validation bytes.</div><div class='del'>- *</div><div class='del'>- * @p_ctx_mem: Pointer to context memory.</div><div class='del'>- * @ctx_size: Size to initialzie.</div><div class='del'>- * @ctx_type: Context type.</div><div class='del'>- *</div><div class='del'>- * Return: Void.</div><div class='del'>- */</div><div class='del'>-void qed_memset_session_ctx(void *p_ctx_mem, u32 ctx_size, u8 ctx_type);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * qed_memset_task_ctx(): Memset task context to 0 while preserving</div><div class='del'>- *                        validation bytes.</div><div class='del'>- *</div><div class='del'>- * @p_ctx_mem: Pointer to context memory.</div><div class='del'>- * @ctx_size: size to initialzie.</div><div class='del'>- * @ctx_type: context type.</div><div class='del'>- *</div><div class='del'>- * Return: Void.</div><div class='del'>- */</div><div class='del'>-void qed_memset_task_ctx(void *p_ctx_mem, u32 ctx_size, u8 ctx_type);</div><div class='del'>-</div><div class='ctx'> #define NUM_STORMS 6</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_hw.c b/drivers/net/ethernet/qlogic/qed/qed_hw.c<br/>index 9e5f0dbc8a07..9907973399dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_hw.c</a></div><div class='hunk'>@@ -69,17 +69,6 @@ int qed_ptt_pool_alloc(struct qed_hwfn *p_hwfn)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void qed_ptt_invalidate(struct qed_hwfn *p_hwfn)</div><div class='del'>-{</div><div class='del'>-	struct qed_ptt *p_ptt;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; PXP_EXTERNAL_BAR_PF_WINDOW_NUM; i++) {</div><div class='del'>-		p_ptt = &amp;p_hwfn-&gt;p_ptt_pool-&gt;ptts[i];</div><div class='del'>-		p_ptt-&gt;pxp.offset = QED_BAR_INVALID_OFFSET;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void qed_ptt_pool_free(struct qed_hwfn *p_hwfn)</div><div class='ctx'> {</div><div class='ctx'> 	kfree(p_hwfn-&gt;p_ptt_pool);</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_hw.h b/drivers/net/ethernet/qlogic/qed/qed_hw.h<br/>index e535983ce21b..3c98f58a184f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_hw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_hw.h</a></div><div class='hunk'>@@ -62,15 +62,6 @@ enum _dmae_cmd_crc_mask {</div><div class='ctx'> void qed_gtt_init(struct qed_hwfn *p_hwfn);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * qed_ptt_invalidate(): Forces all ptt entries to be re-configured</div><div class='del'>- *</div><div class='del'>- * @p_hwfn: HW device data.</div><div class='del'>- *</div><div class='del'>- * Return: Void.</div><div class='del'>- */</div><div class='del'>-void qed_ptt_invalidate(struct qed_hwfn *p_hwfn);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * qed_ptt_pool_alloc(): Allocate and initialize PTT pool.</div><div class='ctx'>  *</div><div class='ctx'>  * @p_hwfn: HW device data.</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c b/drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c<br/>index 407029a36fa1..aa20bb8caa9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c</a></div><div class='hunk'>@@ -18,16 +18,6 @@</div><div class='ctx'> </div><div class='ctx'> #define CDU_VALIDATION_DEFAULT_CFG CDU_CONTEXT_VALIDATION_DEFAULT_CFG</div><div class='ctx'> </div><div class='del'>-static u16 con_region_offsets[3][NUM_OF_CONNECTION_TYPES] = {</div><div class='del'>-	{400, 336, 352, 368, 304, 384, 416, 352},	/* region 3 offsets */</div><div class='del'>-	{528, 496, 416, 512, 448, 512, 544, 480},	/* region 4 offsets */</div><div class='del'>-	{608, 544, 496, 576, 576, 592, 624, 560}	/* region 5 offsets */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static u16 task_region_offsets[1][NUM_OF_CONNECTION_TYPES] = {</div><div class='del'>-	{240, 240, 112, 0, 0, 0, 0, 96}	/* region 1 offsets */</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* General constants */</div><div class='ctx'> #define QM_PQ_MEM_4KB(pq_size)	(pq_size ? DIV_ROUND_UP((pq_size + 1) *	\</div><div class='ctx'> 							QM_PQ_ELEMENT_SIZE, \</div><div class='hunk'>@@ -1576,134 +1566,6 @@ void qed_gft_config(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 	qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_GFT, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-DECLARE_CRC8_TABLE(cdu_crc8_table);</div><div class='del'>-</div><div class='del'>-/* Calculate and return CDU validation byte per connection type/region/cid */</div><div class='del'>-static u8 qed_calc_cdu_validation_byte(u8 conn_type, u8 region, u32 cid)</div><div class='del'>-{</div><div class='del'>-	const u8 validation_cfg = CDU_VALIDATION_DEFAULT_CFG;</div><div class='del'>-	u8 crc, validation_byte = 0;</div><div class='del'>-	static u8 crc8_table_valid; /* automatically initialized to 0 */</div><div class='del'>-	u32 validation_string = 0;</div><div class='del'>-	__be32 data_to_crc;</div><div class='del'>-</div><div class='del'>-	if (!crc8_table_valid) {</div><div class='del'>-		crc8_populate_msb(cdu_crc8_table, 0x07);</div><div class='del'>-		crc8_table_valid = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* The CRC is calculated on the String-to-compress:</div><div class='del'>-	 * [31:8]  = {CID[31:20],CID[11:0]}</div><div class='del'>-	 * [7:4]   = Region</div><div class='del'>-	 * [3:0]   = Type</div><div class='del'>-	 */</div><div class='del'>-	if ((validation_cfg &gt;&gt; CDU_CONTEXT_VALIDATION_CFG_USE_CID) &amp; 1)</div><div class='del'>-		validation_string |= (cid &amp; 0xFFF00000) | ((cid &amp; 0xFFF) &lt;&lt; 8);</div><div class='del'>-</div><div class='del'>-	if ((validation_cfg &gt;&gt; CDU_CONTEXT_VALIDATION_CFG_USE_REGION) &amp; 1)</div><div class='del'>-		validation_string |= ((region &amp; 0xF) &lt;&lt; 4);</div><div class='del'>-</div><div class='del'>-	if ((validation_cfg &gt;&gt; CDU_CONTEXT_VALIDATION_CFG_USE_TYPE) &amp; 1)</div><div class='del'>-		validation_string |= (conn_type &amp; 0xF);</div><div class='del'>-</div><div class='del'>-	/* Convert to big-endian and calculate CRC8 */</div><div class='del'>-	data_to_crc = cpu_to_be32(validation_string);</div><div class='del'>-	crc = crc8(cdu_crc8_table, (u8 *)&amp;data_to_crc, sizeof(data_to_crc),</div><div class='del'>-		   CRC8_INIT_VALUE);</div><div class='del'>-</div><div class='del'>-	/* The validation byte [7:0] is composed:</div><div class='del'>-	 * for type A validation</div><div class='del'>-	 * [7]          = active configuration bit</div><div class='del'>-	 * [6:0]        = crc[6:0]</div><div class='del'>-	 *</div><div class='del'>-	 * for type B validation</div><div class='del'>-	 * [7]          = active configuration bit</div><div class='del'>-	 * [6:3]        = connection_type[3:0]</div><div class='del'>-	 * [2:0]        = crc[2:0]</div><div class='del'>-	 */</div><div class='del'>-	validation_byte |=</div><div class='del'>-	    ((validation_cfg &gt;&gt;</div><div class='del'>-	      CDU_CONTEXT_VALIDATION_CFG_USE_ACTIVE) &amp; 1) &lt;&lt; 7;</div><div class='del'>-</div><div class='del'>-	if ((validation_cfg &gt;&gt;</div><div class='del'>-	     CDU_CONTEXT_VALIDATION_CFG_VALIDATION_TYPE_SHIFT) &amp; 1)</div><div class='del'>-		validation_byte |= ((conn_type &amp; 0xF) &lt;&lt; 3) | (crc &amp; 0x7);</div><div class='del'>-	else</div><div class='del'>-		validation_byte |= crc &amp; 0x7F;</div><div class='del'>-</div><div class='del'>-	return validation_byte;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Calcualte and set validation bytes for session context */</div><div class='del'>-void qed_calc_session_ctx_validation(void *p_ctx_mem,</div><div class='del'>-				     u16 ctx_size, u8 ctx_type, u32 cid)</div><div class='del'>-{</div><div class='del'>-	u8 *x_val_ptr, *t_val_ptr, *u_val_ptr, *p_ctx;</div><div class='del'>-</div><div class='del'>-	p_ctx = (u8 * const)p_ctx_mem;</div><div class='del'>-	x_val_ptr = &amp;p_ctx[con_region_offsets[0][ctx_type]];</div><div class='del'>-	t_val_ptr = &amp;p_ctx[con_region_offsets[1][ctx_type]];</div><div class='del'>-	u_val_ptr = &amp;p_ctx[con_region_offsets[2][ctx_type]];</div><div class='del'>-</div><div class='del'>-	memset(p_ctx, 0, ctx_size);</div><div class='del'>-</div><div class='del'>-	*x_val_ptr = qed_calc_cdu_validation_byte(ctx_type, 3, cid);</div><div class='del'>-	*t_val_ptr = qed_calc_cdu_validation_byte(ctx_type, 4, cid);</div><div class='del'>-	*u_val_ptr = qed_calc_cdu_validation_byte(ctx_type, 5, cid);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Calcualte and set validation bytes for task context */</div><div class='del'>-void qed_calc_task_ctx_validation(void *p_ctx_mem,</div><div class='del'>-				  u16 ctx_size, u8 ctx_type, u32 tid)</div><div class='del'>-{</div><div class='del'>-	u8 *p_ctx, *region1_val_ptr;</div><div class='del'>-</div><div class='del'>-	p_ctx = (u8 * const)p_ctx_mem;</div><div class='del'>-	region1_val_ptr = &amp;p_ctx[task_region_offsets[0][ctx_type]];</div><div class='del'>-</div><div class='del'>-	memset(p_ctx, 0, ctx_size);</div><div class='del'>-</div><div class='del'>-	*region1_val_ptr = qed_calc_cdu_validation_byte(ctx_type, 1, tid);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Memset session context to 0 while preserving validation bytes */</div><div class='del'>-void qed_memset_session_ctx(void *p_ctx_mem, u32 ctx_size, u8 ctx_type)</div><div class='del'>-{</div><div class='del'>-	u8 *x_val_ptr, *t_val_ptr, *u_val_ptr, *p_ctx;</div><div class='del'>-	u8 x_val, t_val, u_val;</div><div class='del'>-</div><div class='del'>-	p_ctx = (u8 * const)p_ctx_mem;</div><div class='del'>-	x_val_ptr = &amp;p_ctx[con_region_offsets[0][ctx_type]];</div><div class='del'>-	t_val_ptr = &amp;p_ctx[con_region_offsets[1][ctx_type]];</div><div class='del'>-	u_val_ptr = &amp;p_ctx[con_region_offsets[2][ctx_type]];</div><div class='del'>-</div><div class='del'>-	x_val = *x_val_ptr;</div><div class='del'>-	t_val = *t_val_ptr;</div><div class='del'>-	u_val = *u_val_ptr;</div><div class='del'>-</div><div class='del'>-	memset(p_ctx, 0, ctx_size);</div><div class='del'>-</div><div class='del'>-	*x_val_ptr = x_val;</div><div class='del'>-	*t_val_ptr = t_val;</div><div class='del'>-	*u_val_ptr = u_val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Memset task context to 0 while preserving validation bytes */</div><div class='del'>-void qed_memset_task_ctx(void *p_ctx_mem, u32 ctx_size, u8 ctx_type)</div><div class='del'>-{</div><div class='del'>-	u8 *p_ctx, *region1_val_ptr;</div><div class='del'>-	u8 region1_val;</div><div class='del'>-</div><div class='del'>-	p_ctx = (u8 * const)p_ctx_mem;</div><div class='del'>-	region1_val_ptr = &amp;p_ctx[task_region_offsets[0][ctx_type]];</div><div class='del'>-</div><div class='del'>-	region1_val = *region1_val_ptr;</div><div class='del'>-</div><div class='del'>-	memset(p_ctx, 0, ctx_size);</div><div class='del'>-</div><div class='del'>-	*region1_val_ptr = region1_val;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Enable and configure context validation */</div><div class='ctx'> void qed_enable_context_validation(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 				   struct qed_ptt *p_ptt)</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_main.c b/drivers/net/ethernet/qlogic/qed/qed_main.c<br/>index f915c423fe70..d4685ad4b169 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_main.c</a></div><div class='hunk'>@@ -454,7 +454,7 @@ int qed_fill_dev_info(struct qed_dev *cdev,</div><div class='ctx'> </div><div class='ctx'> static void qed_free_cdev(struct qed_dev *cdev)</div><div class='ctx'> {</div><div class='del'>-	kfree((void *)cdev);</div><div class='add'>+	kfree(cdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct qed_dev *qed_alloc_cdev(struct pci_dev *pdev)</div><div class='hunk'>@@ -1214,7 +1214,8 @@ static int qed_slowpath_wq_start(struct qed_dev *cdev)</div><div class='ctx'> 		hwfn = &amp;cdev-&gt;hwfns[i];</div><div class='ctx'> </div><div class='ctx'> 		hwfn-&gt;slowpath_wq = alloc_workqueue("slowpath-%02x:%02x.%02x",</div><div class='del'>-					 0, 0, cdev-&gt;pdev-&gt;bus-&gt;number,</div><div class='add'>+					 WQ_PERCPU, 0,</div><div class='add'>+					 cdev-&gt;pdev-&gt;bus-&gt;number,</div><div class='ctx'> 					 PCI_SLOT(cdev-&gt;pdev-&gt;devfn),</div><div class='ctx'> 					 hwfn-&gt;abs_pf_id);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_mcp.c b/drivers/net/ethernet/qlogic/qed/qed_mcp.c<br/>index 26a714bfad4e..c7f497c36f66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_mcp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_mcp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_mcp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_mcp.c</a></div><div class='hunk'>@@ -3301,7 +3301,9 @@ int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	if (((rsp &amp; FW_MSG_CODE_MASK) != FW_MSG_CODE_OK))</div><div class='add'>+	if (((rsp &amp; FW_MSG_CODE_MASK) == FW_MSG_CODE_UNSUPPORTED))</div><div class='add'>+		rc = -EOPNOTSUPP;</div><div class='add'>+	else if (((rsp &amp; FW_MSG_CODE_MASK) != FW_MSG_CODE_OK))</div><div class='ctx'> 		rc = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -3356,6 +3358,7 @@ int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn)</div><div class='ctx'> 					     p_ptt, &amp;nvm_info.num_images);</div><div class='ctx'> 	if (rc == -EOPNOTSUPP) {</div><div class='ctx'> 		DP_INFO(p_hwfn, "DRV_MSG_CODE_BIST_TEST is not supported\n");</div><div class='add'>+		nvm_info.num_images = 0;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	} else if (rc || !nvm_info.num_images) {</div><div class='ctx'> 		DP_ERR(p_hwfn, "Failed getting number of images\n");</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c b/drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c<br/>index f55eed092f25..7d78f072b0a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c</a></div><div class='hunk'>@@ -242,7 +242,7 @@ static int qed_mfw_get_tlv_group(u8 tlv_type, u8 *tlv_group)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Returns size of the data buffer or, -1 in case TLV data is not available. */</div><div class='del'>-static int</div><div class='add'>+static noinline_for_stack int</div><div class='ctx'> qed_mfw_get_gen_tlv_value(struct qed_drv_tlv_hdr *p_tlv,</div><div class='ctx'> 			  struct qed_mfw_tlv_generic *p_drv_buf,</div><div class='ctx'> 			  struct qed_tlv_parsed_buf *p_buf)</div><div class='hunk'>@@ -304,7 +304,7 @@ qed_mfw_get_gen_tlv_value(struct qed_drv_tlv_hdr *p_tlv,</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='add'>+static noinline_for_stack int</div><div class='ctx'> qed_mfw_get_eth_tlv_value(struct qed_drv_tlv_hdr *p_tlv,</div><div class='ctx'> 			  struct qed_mfw_tlv_eth *p_drv_buf,</div><div class='ctx'> 			  struct qed_tlv_parsed_buf *p_buf)</div><div class='hunk'>@@ -438,7 +438,7 @@ qed_mfw_get_tlv_time_value(struct qed_mfw_tlv_time *p_time,</div><div class='ctx'> 	return QED_MFW_TLV_TIME_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='add'>+static noinline_for_stack int</div><div class='ctx'> qed_mfw_get_fcoe_tlv_value(struct qed_drv_tlv_hdr *p_tlv,</div><div class='ctx'> 			   struct qed_mfw_tlv_fcoe *p_drv_buf,</div><div class='ctx'> 			   struct qed_tlv_parsed_buf *p_buf)</div><div class='hunk'>@@ -1073,7 +1073,7 @@ qed_mfw_get_fcoe_tlv_value(struct qed_drv_tlv_hdr *p_tlv,</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='add'>+static noinline_for_stack int</div><div class='ctx'> qed_mfw_get_iscsi_tlv_value(struct qed_drv_tlv_hdr *p_tlv,</div><div class='ctx'> 			    struct qed_mfw_tlv_iscsi *p_drv_buf,</div><div class='ctx'> 			    struct qed_tlv_parsed_buf *p_buf)</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_ooo.c b/drivers/net/ethernet/qlogic/qed/qed_ooo.c<br/>index 5d725f59db24..8be567a6ad44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_ooo.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_ooo.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_ooo.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_ooo.c</a></div><div class='hunk'>@@ -183,9 +183,6 @@ void qed_ooo_release_connection_isles(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 						    struct qed_ooo_buffer,</div><div class='ctx'> 						    list_entry);</div><div class='ctx'> </div><div class='del'>-			if (!p_buffer)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='ctx'> 			list_move_tail(&amp;p_buffer-&gt;list_entry,</div><div class='ctx'> 				       &amp;p_ooo_info-&gt;free_buffers_list);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -218,9 +215,6 @@ void qed_ooo_release_all_isles(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 						     struct qed_ooo_buffer,</div><div class='ctx'> 						     list_entry);</div><div class='ctx'> </div><div class='del'>-				if (!p_buffer)</div><div class='del'>-					break;</div><div class='del'>-</div><div class='ctx'> 				list_move_tail(&amp;p_buffer-&gt;list_entry,</div><div class='ctx'> 					       &amp;p_ooo_info-&gt;free_buffers_list);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -255,9 +249,6 @@ void qed_ooo_free(struct qed_hwfn *p_hwfn)</div><div class='ctx'> 		p_buffer = list_first_entry(&amp;p_ooo_info-&gt;free_buffers_list,</div><div class='ctx'> 					    struct qed_ooo_buffer, list_entry);</div><div class='ctx'> </div><div class='del'>-		if (!p_buffer)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='ctx'> 		list_del(&amp;p_buffer-&gt;list_entry);</div><div class='ctx'> 		dma_free_coherent(&amp;p_hwfn-&gt;cdev-&gt;pdev-&gt;dev,</div><div class='ctx'> 				  p_buffer-&gt;rx_buffer_size,</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_ptp.c b/drivers/net/ethernet/qlogic/qed/qed_ptp.c<br/>index 295ce435a1a4..4df8a97b717e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_ptp.c</a></div><div class='hunk'>@@ -307,7 +307,7 @@ static int qed_ptp_hw_adjfreq(struct qed_dev *cdev, s32 ppb)</div><div class='ctx'> 	} else if (ppb == 1) {</div><div class='ctx'> 		/* This is a special case as its the only value which wouldn't</div><div class='ctx'> 		 * fit in a s64 variable. In order to prevent castings simple</div><div class='del'>-		 * handle it seperately.</div><div class='add'>+		 * handle it separately.</div><div class='ctx'> 		 */</div><div class='ctx'> 		best_val = 4;</div><div class='ctx'> 		best_period = 0xee6b27f;</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qed/qed_sriov.c b/drivers/net/ethernet/qlogic/qed/qed_sriov.c<br/>index fa167b1aa019..5222a035fd19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_sriov.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qed/qed_sriov.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qed/qed_sriov.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qed/qed_sriov.c</a></div><div class='hunk'>@@ -3033,7 +3033,7 @@ static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 	u16 length;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	/* Valiate PF can send such a request */</div><div class='add'>+	/* Validate PF can send such a request */</div><div class='ctx'> 	if (!vf-&gt;vport_instance) {</div><div class='ctx'> 		DP_VERBOSE(p_hwfn,</div><div class='ctx'> 			   QED_MSG_IOV,</div><div class='hunk'>@@ -3312,7 +3312,7 @@ static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Determine if the unicast filtering is acceptible by PF */</div><div class='add'>+	/* Determine if the unicast filtering is acceptable by PF */</div><div class='ctx'> 	if ((p_bulletin-&gt;valid_bitmap &amp; BIT(VLAN_ADDR_FORCED)) &amp;&amp;</div><div class='ctx'> 	    (params.type == QED_FILTER_VLAN ||</div><div class='ctx'> 	     params.type == QED_FILTER_MAC_VLAN)) {</div><div class='hunk'>@@ -3729,7 +3729,7 @@ qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,</div><div class='ctx'> </div><div class='ctx'> 		rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);</div><div class='ctx'> 		if (rc) {</div><div class='del'>-			DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",</div><div class='add'>+			DP_ERR(p_hwfn, "Failed to re-enable VF[%d] access\n",</div><div class='ctx'> 			       vfid);</div><div class='ctx'> 			return rc;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -4480,7 +4480,7 @@ int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)</div><div class='ctx'> 		struct qed_ptt *ptt = qed_ptt_acquire(hwfn);</div><div class='ctx'> </div><div class='ctx'> 		/* Failure to acquire the ptt in 100g creates an odd error</div><div class='del'>-		 * where the first engine has already relased IOV.</div><div class='add'>+		 * where the first engine has already released IOV.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!ptt) {</div><div class='ctx'> 			DP_ERR(hwfn, "Failed to acquire ptt\n");</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qede/qede_ethtool.c b/drivers/net/ethernet/qlogic/qede/qede_ethtool.c<br/>index c553da16d4b1..23982704273c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qede/qede_ethtool.c</a></div><div class='hunk'>@@ -504,7 +504,7 @@ static int qede_get_link_ksettings(struct net_device *dev,</div><div class='ctx'> 				   struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	typeof(cmd-&gt;link_modes) *link_modes = &amp;cmd-&gt;link_modes;</div><div class='del'>-	struct ethtool_link_settings_hdr *base = &amp;cmd-&gt;base;</div><div class='add'>+	struct ethtool_link_settings *base = &amp;cmd-&gt;base;</div><div class='ctx'> 	struct qede_dev *edev = netdev_priv(dev);</div><div class='ctx'> 	struct qed_link_output current_link;</div><div class='ctx'> </div><div class='hunk'>@@ -537,7 +537,7 @@ static int qede_get_link_ksettings(struct net_device *dev,</div><div class='ctx'> static int qede_set_link_ksettings(struct net_device *dev,</div><div class='ctx'> 				   const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='del'>-	const struct ethtool_link_settings_hdr *base = &amp;cmd-&gt;base;</div><div class='add'>+	const struct ethtool_link_settings *base = &amp;cmd-&gt;base;</div><div class='ctx'> 	const struct ethtool_forced_speed_map *map;</div><div class='ctx'> 	struct qede_dev *edev = netdev_priv(dev);</div><div class='ctx'> 	struct qed_link_output current_link;</div><div class='hunk'>@@ -1168,8 +1168,11 @@ static int qede_set_phys_id(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)</div><div class='add'>+static int qede_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				struct ethtool_rxfh_fields *info)</div><div class='ctx'> {</div><div class='add'>+	struct qede_dev *edev = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='ctx'> </div><div class='ctx'> 	switch (info-&gt;flow_type) {</div><div class='hunk'>@@ -1206,9 +1209,6 @@ static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='ctx'> 	case ETHTOOL_GRXRINGS:</div><div class='ctx'> 		info-&gt;data = QEDE_RSS_COUNT(edev);</div><div class='ctx'> 		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		rc = qede_get_rss_flags(edev, info);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		info-&gt;rule_cnt = qede_get_arfs_filter_count(edev);</div><div class='ctx'> 		info-&gt;data = QEDE_RFS_MAX_FLTR;</div><div class='hunk'>@@ -1227,14 +1227,17 @@ static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)</div><div class='add'>+static int qede_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				const struct ethtool_rxfh_fields *info,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct qed_update_vport_params *vport_update_params;</div><div class='add'>+	struct qede_dev *edev = netdev_priv(dev);</div><div class='ctx'> 	u8 set_caps = 0, clr_caps = 0;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	DP_VERBOSE(edev, QED_MSG_DEBUG,</div><div class='del'>-		   "Set rss flags command parameters: flow type = %d, data = %llu\n",</div><div class='add'>+		   "Set rss flags command parameters: flow type = %d, data = %u\n",</div><div class='ctx'> 		   info-&gt;flow_type, info-&gt;data);</div><div class='ctx'> </div><div class='ctx'> 	switch (info-&gt;flow_type) {</div><div class='hunk'>@@ -1337,9 +1340,6 @@ static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		rc = qede_set_rss_flags(edev, info);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		rc = qede_add_cls_rule(edev, info);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2293,6 +2293,8 @@ static const struct ethtool_ops qede_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_key_size		= qede_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh			= qede_get_rxfh,</div><div class='ctx'> 	.set_rxfh			= qede_set_rxfh,</div><div class='add'>+	.get_rxfh_fields		= qede_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields		= qede_set_rxfh_fields,</div><div class='ctx'> 	.get_ts_info			= qede_get_ts_info,</div><div class='ctx'> 	.get_channels			= qede_get_channels,</div><div class='ctx'> 	.set_channels			= qede_set_channels,</div><div class='hunk'>@@ -2335,6 +2337,8 @@ static const struct ethtool_ops qede_vf_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_key_size		= qede_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh			= qede_get_rxfh,</div><div class='ctx'> 	.set_rxfh			= qede_set_rxfh,</div><div class='add'>+	.get_rxfh_fields		= qede_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields		= qede_set_rxfh_fields,</div><div class='ctx'> 	.get_channels			= qede_get_channels,</div><div class='ctx'> 	.set_channels			= qede_set_channels,</div><div class='ctx'> 	.get_per_queue_coalesce		= qede_get_per_coalesce,</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qede/qede_filter.c b/drivers/net/ethernet/qlogic/qede/qede_filter.c<br/>index 985026dd816f..7e341e026489 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_filter.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_filter.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_filter.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qede/qede_filter.c</a></div><div class='hunk'>@@ -987,20 +987,17 @@ static int qede_udp_tunnel_sync(struct net_device *dev, unsigned int table)</div><div class='ctx'> </div><div class='ctx'> static const struct udp_tunnel_nic_info qede_udp_tunnels_both = {</div><div class='ctx'> 	.sync_table	= qede_udp_tunnel_sync,</div><div class='del'>-	.flags		= UDP_TUNNEL_NIC_INFO_MAY_SLEEP,</div><div class='ctx'> 	.tables		= {</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },</div><div class='ctx'> 	},</div><div class='ctx'> }, qede_udp_tunnels_vxlan = {</div><div class='ctx'> 	.sync_table	= qede_udp_tunnel_sync,</div><div class='del'>-	.flags		= UDP_TUNNEL_NIC_INFO_MAY_SLEEP,</div><div class='ctx'> 	.tables		= {</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },</div><div class='ctx'> 	},</div><div class='ctx'> }, qede_udp_tunnels_geneve = {</div><div class='ctx'> 	.sync_table	= qede_udp_tunnel_sync,</div><div class='del'>-	.flags		= UDP_TUNNEL_NIC_INFO_MAY_SLEEP,</div><div class='ctx'> 	.tables		= {</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qede/qede_fp.c b/drivers/net/ethernet/qlogic/qede/qede_fp.c<br/>index 847fa62c80df..e338bfc8b7b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_fp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_fp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_fp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qede/qede_fp.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * Copyright (c) 2019-2020 Marvell International Ltd.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/array_size.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='hunk'>@@ -960,7 +961,7 @@ static inline void qede_tpa_cont(struct qede_dev *edev,</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; cqe-&gt;len_list[i]; i++)</div><div class='add'>+	for (i = 0; cqe-&gt;len_list[i] &amp;&amp; i &lt; ARRAY_SIZE(cqe-&gt;len_list); i++)</div><div class='ctx'> 		qede_fill_frag_skb(edev, rxq, cqe-&gt;tpa_agg_index,</div><div class='ctx'> 				   le16_to_cpu(cqe-&gt;len_list[i]));</div><div class='ctx'> </div><div class='hunk'>@@ -985,7 +986,7 @@ static int qede_tpa_end(struct qede_dev *edev,</div><div class='ctx'> 		dma_unmap_page(rxq-&gt;dev, tpa_info-&gt;buffer.mapping,</div><div class='ctx'> 			       PAGE_SIZE, rxq-&gt;data_direction);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; cqe-&gt;len_list[i]; i++)</div><div class='add'>+	for (i = 0; cqe-&gt;len_list[i] &amp;&amp; i &lt; ARRAY_SIZE(cqe-&gt;len_list); i++)</div><div class='ctx'> 		qede_fill_frag_skb(edev, rxq, cqe-&gt;tpa_agg_index,</div><div class='ctx'> 				   le16_to_cpu(cqe-&gt;len_list[i]));</div><div class='ctx'> 	if (unlikely(i &gt; 1))</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qede/qede_main.c b/drivers/net/ethernet/qlogic/qede/qede_main.c<br/>index 99df00c30b8c..66ab1b9d65a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qede/qede_main.c</a></div><div class='hunk'>@@ -203,7 +203,7 @@ static struct pci_driver qede_pci_driver = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct qed_eth_cb_ops qede_ll_ops = {</div><div class='del'>-	{</div><div class='add'>+	.common = {</div><div class='ctx'> #ifdef CONFIG_RFS_ACCEL</div><div class='ctx'> 		.arfs_filter_op = qede_arfs_filter_op,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -506,25 +506,6 @@ static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct qede_dev *edev = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (!netif_running(dev))</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return qede_ptp_hw_ts(edev, ifr);</div><div class='del'>-	default:</div><div class='del'>-		DP_VERBOSE(edev, QED_MSG_DEBUG,</div><div class='del'>-			   "default IOCTL cmd 0x%x\n", cmd);</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void qede_fp_sb_dump(struct qede_dev *edev, struct qede_fastpath *fp)</div><div class='ctx'> {</div><div class='ctx'> 	char *p_sb = (char *)fp-&gt;sb_info-&gt;sb_virt;</div><div class='hunk'>@@ -717,7 +698,6 @@ static const struct net_device_ops qede_netdev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address	= qede_set_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_change_mtu		= qede_change_mtu,</div><div class='del'>-	.ndo_eth_ioctl		= qede_ioctl,</div><div class='ctx'> 	.ndo_tx_timeout		= qede_tx_timeout,</div><div class='ctx'> #ifdef CONFIG_QED_SRIOV</div><div class='ctx'> 	.ndo_set_vf_mac		= qede_set_vf_mac,</div><div class='hunk'>@@ -742,6 +722,8 @@ static const struct net_device_ops qede_netdev_ops = {</div><div class='ctx'> #endif</div><div class='ctx'> 	.ndo_xdp_xmit		= qede_xdp_transmit,</div><div class='ctx'> 	.ndo_setup_tc		= qede_setup_tc_offload,</div><div class='add'>+	.ndo_hwtstamp_get	= qede_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= qede_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops qede_netdev_vf_ops = {</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qede/qede_ptp.c b/drivers/net/ethernet/qlogic/qede/qede_ptp.c<br/>index 9d6399a5c780..d351be5fbda1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qede/qede_ptp.c</a></div><div class='hunk'>@@ -181,7 +181,7 @@ static void qede_ptp_task(struct work_struct *work)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Read the PHC. This API is invoked with ptp_lock held. */</div><div class='del'>-static u64 qede_ptp_read_cc(const struct cyclecounter *cc)</div><div class='add'>+static u64 qede_ptp_read_cc(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct qede_dev *edev;</div><div class='ctx'> 	struct qede_ptp *ptp;</div><div class='hunk'>@@ -199,18 +199,15 @@ static u64 qede_ptp_read_cc(const struct cyclecounter *cc)</div><div class='ctx'> 	return phc_cycles;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int qede_ptp_cfg_filters(struct qede_dev *edev)</div><div class='add'>+static void qede_ptp_cfg_filters(struct qede_dev *edev)</div><div class='ctx'> {</div><div class='ctx'> 	enum qed_ptp_hwtstamp_tx_type tx_type = QED_PTP_HWTSTAMP_TX_ON;</div><div class='ctx'> 	enum qed_ptp_filter_type rx_filter = QED_PTP_FILTER_NONE;</div><div class='ctx'> 	struct qede_ptp *ptp = edev-&gt;ptp;</div><div class='ctx'> </div><div class='del'>-	if (!ptp)</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='ctx'> 	if (!ptp-&gt;hw_ts_ioctl_called) {</div><div class='ctx'> 		DP_INFO(edev, "TS IOCTL not called\n");</div><div class='del'>-		return 0;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (ptp-&gt;tx_type) {</div><div class='hunk'>@@ -223,11 +220,6 @@ static int qede_ptp_cfg_filters(struct qede_dev *edev)</div><div class='ctx'> 		clear_bit(QEDE_FLAGS_TX_TIMESTAMPING_EN, &amp;edev-&gt;flags);</div><div class='ctx'> 		tx_type = QED_PTP_HWTSTAMP_TX_OFF;</div><div class='ctx'> 		break;</div><div class='del'>-</div><div class='del'>-	case HWTSTAMP_TX_ONESTEP_SYNC:</div><div class='del'>-	case HWTSTAMP_TX_ONESTEP_P2P:</div><div class='del'>-		DP_ERR(edev, "One-step timestamping is not supported\n");</div><div class='del'>-		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;ptp-&gt;lock);</div><div class='hunk'>@@ -286,39 +278,65 @@ static int qede_ptp_cfg_filters(struct qede_dev *edev)</div><div class='ctx'> 	ptp-&gt;ops-&gt;cfg_filters(edev-&gt;cdev, rx_filter, tx_type);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;ptp-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int qede_ptp_hw_ts(struct qede_dev *edev, struct ifreq *ifr)</div><div class='add'>+int qede_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+		      struct kernel_hwtstamp_config *config,</div><div class='add'>+		      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='add'>+	struct qede_dev *edev = netdev_priv(netdev);</div><div class='ctx'> 	struct qede_ptp *ptp;</div><div class='del'>-	int rc;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Device is down");</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ptp = edev-&gt;ptp;</div><div class='del'>-	if (!ptp)</div><div class='add'>+	if (!ptp) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "HW timestamping is not supported");</div><div class='ctx'> 		return -EIO;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	DP_VERBOSE(edev, QED_MSG_DEBUG,</div><div class='del'>-		   "HWTSTAMP IOCTL: Requested tx_type = %d, requested rx_filters = %d\n",</div><div class='del'>-		   config.tx_type, config.rx_filter);</div><div class='add'>+		   "HWTSTAMP SET: Requested tx_type = %d, requested rx_filters = %d\n",</div><div class='add'>+		   config-&gt;tx_type, config-&gt;rx_filter);</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "One-step timestamping is not supported");</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ptp-&gt;hw_ts_ioctl_called = 1;</div><div class='del'>-	ptp-&gt;tx_type = config.tx_type;</div><div class='del'>-	ptp-&gt;rx_filter = config.rx_filter;</div><div class='add'>+	ptp-&gt;tx_type = config-&gt;tx_type;</div><div class='add'>+	ptp-&gt;rx_filter = config-&gt;rx_filter;</div><div class='ctx'> </div><div class='del'>-	rc = qede_ptp_cfg_filters(edev);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+	qede_ptp_cfg_filters(edev);</div><div class='add'>+</div><div class='add'>+	config-&gt;rx_filter = ptp-&gt;rx_filter;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	config.rx_filter = ptp-&gt;rx_filter;</div><div class='add'>+int qede_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+		      struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct qede_dev *edev = netdev_priv(netdev);</div><div class='add'>+	struct qede_ptp *ptp;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config,</div><div class='del'>-			    sizeof(config)) ? -EFAULT : 0;</div><div class='add'>+	ptp = edev-&gt;ptp;</div><div class='add'>+	if (!ptp)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	config-&gt;tx_type = ptp-&gt;tx_type;</div><div class='add'>+	config-&gt;rx_filter = ptp-&gt;rx_filter;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int qede_ptp_get_ts_info(struct qede_dev *edev, struct kernel_ethtool_ts_info *info)</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qede/qede_ptp.h b/drivers/net/ethernet/qlogic/qede/qede_ptp.h<br/>index adafc894797e..88f168395812 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qede/qede_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qede/qede_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qede/qede_ptp.h</a></div><div class='hunk'>@@ -14,7 +14,11 @@</div><div class='ctx'> </div><div class='ctx'> void qede_ptp_rx_ts(struct qede_dev *edev, struct sk_buff *skb);</div><div class='ctx'> void qede_ptp_tx_ts(struct qede_dev *edev, struct sk_buff *skb);</div><div class='del'>-int qede_ptp_hw_ts(struct qede_dev *edev, struct ifreq *req);</div><div class='add'>+int qede_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+		      struct kernel_hwtstamp_config *config);</div><div class='add'>+int qede_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+		      struct kernel_hwtstamp_config *config,</div><div class='add'>+		      struct netlink_ext_ack *extack);</div><div class='ctx'> void qede_ptp_disable(struct qede_dev *edev);</div><div class='ctx'> int qede_ptp_enable(struct qede_dev *edev);</div><div class='ctx'> int qede_ptp_get_ts_info(struct qede_dev *edev, struct kernel_ethtool_ts_info *ts);</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qla3xxx.c b/drivers/net/ethernet/qlogic/qla3xxx.c<br/>index fc78bc959ded..fca94a69c777 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qla3xxx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qla3xxx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qla3xxx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qla3xxx.c</a></div><div class='hunk'>@@ -1501,7 +1501,7 @@ static int ql_finish_auto_neg(struct ql3_adapter *qdev)</div><div class='ctx'> 				     "Remote error detected. Calling ql_port_start()\n");</div><div class='ctx'> 			/*</div><div class='ctx'> 			 * ql_port_start() is shared code and needs</div><div class='del'>-			 * to lock the PHY on it's own.</div><div class='add'>+			 * to lock the PHY on its own.</div><div class='ctx'> 			 */</div><div class='ctx'> 			ql_sem_unlock(qdev, QL_PHY_GIO_SEM_MASK);</div><div class='ctx'> 			if (ql_port_start(qdev))	/* Restart port */</div><div class='hunk'>@@ -3420,7 +3420,7 @@ static int ql_adapter_down(struct ql3_adapter *qdev, int do_reset)</div><div class='ctx'> 		pci_disable_msi(qdev-&gt;pdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;qdev-&gt;adapter_timer);</div><div class='add'>+	timer_delete_sync(&amp;qdev-&gt;adapter_timer);</div><div class='ctx'> </div><div class='ctx'> 	napi_disable(&amp;qdev-&gt;napi);</div><div class='ctx'> </div><div class='hunk'>@@ -3735,7 +3735,7 @@ static void ql_get_board_info(struct ql3_adapter *qdev)</div><div class='ctx'> </div><div class='ctx'> static void ql3xxx_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ql3_adapter *qdev = from_timer(qdev, t, adapter_timer);</div><div class='add'>+	struct ql3_adapter *qdev = timer_container_of(qdev, t, adapter_timer);</div><div class='ctx'> 	queue_delayed_work(qdev-&gt;workqueue, &amp;qdev-&gt;link_state_work, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c<br/>index d7cdea8f604d..91e7b38143ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c</a></div><div class='hunk'>@@ -4215,7 +4215,6 @@ static pci_ers_result_t qlcnic_83xx_io_slot_reset(struct pci_dev *pdev)</div><div class='ctx'> 	struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	pdev-&gt;error_state = pci_channel_io_normal;</div><div class='ctx'> 	err = pci_enable_device(pdev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto disconnect;</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c<br/>index b733374b4dc5..6145252d8ff8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c</a></div><div class='hunk'>@@ -2051,7 +2051,7 @@ static void qlcnic_83xx_init_hw(struct qlcnic_adapter *p_dev)</div><div class='ctx'> 		dev_err(&amp;p_dev-&gt;pdev-&gt;dev, "%s: failed\n", __func__);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* POST FW related definations*/</div><div class='add'>+/* POST FW related definitions*/</div><div class='ctx'> #define QLC_83XX_POST_SIGNATURE_REG	0x41602014</div><div class='ctx'> #define QLC_83XX_POST_MODE_REG		0x41602018</div><div class='ctx'> #define QLC_83XX_POST_FAST_MODE		0</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c<br/>index b3588a1ebc25..e051d8c7a28d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c</a></div><div class='hunk'>@@ -367,7 +367,7 @@ static int qlcnic_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> </div><div class='ctx'> static int qlcnic_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			struct net_device *netdev,</div><div class='del'>-			const unsigned char *addr, u16 vid,</div><div class='add'>+			const unsigned char *addr, u16 vid, bool *notified,</div><div class='ctx'> 			struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct qlcnic_adapter *adapter = netdev_priv(netdev);</div><div class='hunk'>@@ -394,7 +394,7 @@ static int qlcnic_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> static int qlcnic_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			struct net_device *netdev,</div><div class='ctx'> 			const unsigned char *addr, u16 vid, u16 flags,</div><div class='del'>-			struct netlink_ext_ack *extack)</div><div class='add'>+			bool *notified, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct qlcnic_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	int err = 0;</div><div class='hunk'>@@ -486,7 +486,6 @@ static int qlcnic_udp_tunnel_sync(struct net_device *dev, unsigned int table)</div><div class='ctx'> </div><div class='ctx'> static const struct udp_tunnel_nic_info qlcnic_udp_tunnels = {</div><div class='ctx'> 	.sync_table	= qlcnic_udp_tunnel_sync,</div><div class='del'>-	.flags		= UDP_TUNNEL_NIC_INFO_MAY_SLEEP,</div><div class='ctx'> 	.tables		= {</div><div class='ctx'> 		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },</div><div class='ctx'> 	},</div><div class='hunk'>@@ -3767,8 +3766,6 @@ static int qlcnic_attach_func(struct pci_dev *pdev)</div><div class='ctx'> 	struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct net_device *netdev = adapter-&gt;netdev;</div><div class='ctx'> </div><div class='del'>-	pdev-&gt;error_state = pci_channel_io_normal;</div><div class='del'>-</div><div class='ctx'> 	err = pci_enable_device(pdev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c<br/>index f9dd50152b1e..d57b976b9040 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c</a></div><div class='hunk'>@@ -454,8 +454,10 @@ static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	num_vlans = sriov-&gt;num_allowed_vlans;</div><div class='ctx'> 	sriov-&gt;allowed_vlans = kcalloc(num_vlans, sizeof(u16), GFP_KERNEL);</div><div class='del'>-	if (!sriov-&gt;allowed_vlans)</div><div class='add'>+	if (!sriov-&gt;allowed_vlans) {</div><div class='add'>+		qlcnic_sriov_free_vlans(adapter);</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	vlans = (u16 *)&amp;cmd-&gt;rsp.arg[3];</div><div class='ctx'> 	for (i = 0; i &lt; num_vlans; i++)</div><div class='hunk'>@@ -1482,8 +1484,11 @@ static int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_o</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cmd_op = (cmd.rsp.arg[0] &amp; 0xff);</div><div class='del'>-	if (cmd.rsp.arg[0] &gt;&gt; 25 == 2)</div><div class='del'>-		return 2;</div><div class='add'>+	if (cmd.rsp.arg[0] &gt;&gt; 25 == 2) {</div><div class='add'>+		ret = 2;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)</div><div class='ctx'> 		set_bit(QLC_BC_VF_STATE, &amp;vf-&gt;state);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -2167,8 +2172,10 @@ int qlcnic_sriov_alloc_vlans(struct qlcnic_adapter *adapter)</div><div class='ctx'> 		vf = &amp;sriov-&gt;vf_info[i];</div><div class='ctx'> 		vf-&gt;sriov_vlans = kcalloc(sriov-&gt;num_allowed_vlans,</div><div class='ctx'> 					  sizeof(*vf-&gt;sriov_vlans), GFP_KERNEL);</div><div class='del'>-		if (!vf-&gt;sriov_vlans)</div><div class='add'>+		if (!vf-&gt;sriov_vlans) {</div><div class='add'>+			qlcnic_sriov_free_vlans(adapter);</div><div class='ctx'> 			return -ENOMEM;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c<br/>index 74125188beb8..5296d9a6ee83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c</a></div><div class='hunk'>@@ -264,7 +264,7 @@ static int qlcnic_sysfs_validate_crb(struct qlcnic_adapter *adapter,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_read_crb(struct file *filp, struct kobject *kobj,</div><div class='del'>-				     struct bin_attribute *attr, char *buf,</div><div class='add'>+				     const struct bin_attribute *attr, char *buf,</div><div class='ctx'> 				     loff_t offset, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = kobj_to_dev(kobj);</div><div class='hunk'>@@ -281,7 +281,7 @@ static ssize_t qlcnic_sysfs_read_crb(struct file *filp, struct kobject *kobj,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_write_crb(struct file *filp, struct kobject *kobj,</div><div class='del'>-				      struct bin_attribute *attr, char *buf,</div><div class='add'>+				      const struct bin_attribute *attr, char *buf,</div><div class='ctx'> 				      loff_t offset, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = kobj_to_dev(kobj);</div><div class='hunk'>@@ -310,7 +310,7 @@ static int qlcnic_sysfs_validate_mem(struct qlcnic_adapter *adapter,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_read_mem(struct file *filp, struct kobject *kobj,</div><div class='del'>-				     struct bin_attribute *attr, char *buf,</div><div class='add'>+				     const struct bin_attribute *attr, char *buf,</div><div class='ctx'> 				     loff_t offset, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = kobj_to_dev(kobj);</div><div class='hunk'>@@ -332,7 +332,7 @@ static ssize_t qlcnic_sysfs_read_mem(struct file *filp, struct kobject *kobj,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_write_mem(struct file *filp, struct kobject *kobj,</div><div class='del'>-				      struct bin_attribute *attr, char *buf,</div><div class='add'>+				      const struct bin_attribute *attr, char *buf,</div><div class='ctx'> 				      loff_t offset, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = kobj_to_dev(kobj);</div><div class='hunk'>@@ -396,7 +396,7 @@ static int validate_pm_config(struct qlcnic_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_write_pm_config(struct file *filp,</div><div class='ctx'> 					    struct kobject *kobj,</div><div class='del'>-					    struct bin_attribute *attr,</div><div class='add'>+					    const struct bin_attribute *attr,</div><div class='ctx'> 					    char *buf, loff_t offset,</div><div class='ctx'> 					    size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -446,7 +446,7 @@ static ssize_t qlcnic_sysfs_write_pm_config(struct file *filp,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_read_pm_config(struct file *filp,</div><div class='ctx'> 					   struct kobject *kobj,</div><div class='del'>-					   struct bin_attribute *attr,</div><div class='add'>+					   const struct bin_attribute *attr,</div><div class='ctx'> 					   char *buf, loff_t offset,</div><div class='ctx'> 					   size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -539,7 +539,7 @@ static int validate_esw_config(struct qlcnic_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_write_esw_config(struct file *file,</div><div class='ctx'> 					     struct kobject *kobj,</div><div class='del'>-					     struct bin_attribute *attr,</div><div class='add'>+					     const struct bin_attribute *attr,</div><div class='ctx'> 					     char *buf, loff_t offset,</div><div class='ctx'> 					     size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -623,7 +623,7 @@ out:</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_read_esw_config(struct file *file,</div><div class='ctx'> 					    struct kobject *kobj,</div><div class='del'>-					    struct bin_attribute *attr,</div><div class='add'>+					    const struct bin_attribute *attr,</div><div class='ctx'> 					    char *buf, loff_t offset,</div><div class='ctx'> 					    size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -675,7 +675,7 @@ static int validate_npar_config(struct qlcnic_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_write_npar_config(struct file *file,</div><div class='ctx'> 					      struct kobject *kobj,</div><div class='del'>-					      struct bin_attribute *attr,</div><div class='add'>+					      const struct bin_attribute *attr,</div><div class='ctx'> 					      char *buf, loff_t offset,</div><div class='ctx'> 					      size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -722,7 +722,7 @@ static ssize_t qlcnic_sysfs_write_npar_config(struct file *file,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_read_npar_config(struct file *file,</div><div class='ctx'> 					     struct kobject *kobj,</div><div class='del'>-					     struct bin_attribute *attr,</div><div class='add'>+					     const struct bin_attribute *attr,</div><div class='ctx'> 					     char *buf, loff_t offset,</div><div class='ctx'> 					     size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -769,7 +769,7 @@ static ssize_t qlcnic_sysfs_read_npar_config(struct file *file,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_get_port_stats(struct file *file,</div><div class='ctx'> 					   struct kobject *kobj,</div><div class='del'>-					   struct bin_attribute *attr,</div><div class='add'>+					   const struct bin_attribute *attr,</div><div class='ctx'> 					   char *buf, loff_t offset,</div><div class='ctx'> 					   size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -804,7 +804,7 @@ static ssize_t qlcnic_sysfs_get_port_stats(struct file *file,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_get_esw_stats(struct file *file,</div><div class='ctx'> 					  struct kobject *kobj,</div><div class='del'>-					  struct bin_attribute *attr,</div><div class='add'>+					  const struct bin_attribute *attr,</div><div class='ctx'> 					  char *buf, loff_t offset,</div><div class='ctx'> 					  size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -839,7 +839,7 @@ static ssize_t qlcnic_sysfs_get_esw_stats(struct file *file,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_clear_esw_stats(struct file *file,</div><div class='ctx'> 					    struct kobject *kobj,</div><div class='del'>-					    struct bin_attribute *attr,</div><div class='add'>+					    const struct bin_attribute *attr,</div><div class='ctx'> 					    char *buf, loff_t offset,</div><div class='ctx'> 					    size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -868,7 +868,7 @@ static ssize_t qlcnic_sysfs_clear_esw_stats(struct file *file,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_clear_port_stats(struct file *file,</div><div class='ctx'> 					     struct kobject *kobj,</div><div class='del'>-					     struct bin_attribute *attr,</div><div class='add'>+					     const struct bin_attribute *attr,</div><div class='ctx'> 					     char *buf, loff_t offset,</div><div class='ctx'> 					     size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -898,7 +898,7 @@ static ssize_t qlcnic_sysfs_clear_port_stats(struct file *file,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_sysfs_read_pci_config(struct file *file,</div><div class='ctx'> 					    struct kobject *kobj,</div><div class='del'>-					    struct bin_attribute *attr,</div><div class='add'>+					    const struct bin_attribute *attr,</div><div class='ctx'> 					    char *buf, loff_t offset,</div><div class='ctx'> 					    size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -938,7 +938,7 @@ static ssize_t qlcnic_sysfs_read_pci_config(struct file *file,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_83xx_sysfs_flash_read_handler(struct file *filp,</div><div class='ctx'> 						    struct kobject *kobj,</div><div class='del'>-						    struct bin_attribute *attr,</div><div class='add'>+						    const struct bin_attribute *attr,</div><div class='ctx'> 						    char *buf, loff_t offset,</div><div class='ctx'> 						    size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -1115,7 +1115,7 @@ static int qlcnic_83xx_sysfs_flash_write(struct qlcnic_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static ssize_t qlcnic_83xx_sysfs_flash_write_handler(struct file *filp,</div><div class='ctx'> 						     struct kobject *kobj,</div><div class='del'>-						     struct bin_attribute *attr,</div><div class='add'>+						     const struct bin_attribute *attr,</div><div class='ctx'> 						     char *buf, loff_t offset,</div><div class='ctx'> 						     size_t size)</div><div class='ctx'> {</div><div class='hunk'>@@ -1217,7 +1217,6 @@ static const struct bin_attribute bin_attr_pci_config = {</div><div class='ctx'> 	.attr = { .name = "pci_config", .mode = 0644 },</div><div class='ctx'> 	.size = 0,</div><div class='ctx'> 	.read = qlcnic_sysfs_read_pci_config,</div><div class='del'>-	.write = NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bin_attribute bin_attr_port_stats = {</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/Kconfig b/drivers/net/ethernet/qualcomm/Kconfig<br/>index 9210ff360fdc..ba7efb108637 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/Kconfig</a></div><div class='hunk'>@@ -52,7 +52,6 @@ config QCOM_EMAC</div><div class='ctx'> 	depends on HAS_DMA &amp;&amp; HAS_IOMEM</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select PHYLIB</div><div class='del'>-	select MDIO_DEVRES</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the Qualcomm Technologies, Inc. Gigabit</div><div class='ctx'> 	  Ethernet Media Access Controller (EMAC). The controller</div><div class='hunk'>@@ -61,6 +60,21 @@ config QCOM_EMAC</div><div class='ctx'> 	  low power, Receive-Side Scaling (RSS), and IEEE 1588-2008</div><div class='ctx'> 	  Precision Clock Synchronization Protocol.</div><div class='ctx'> </div><div class='add'>+config QCOM_PPE</div><div class='add'>+	tristate "Qualcomm Technologies, Inc. PPE Ethernet support"</div><div class='add'>+	depends on COMMON_CLK &amp;&amp; HAS_IOMEM &amp;&amp; OF</div><div class='add'>+	depends on ARCH_QCOM || COMPILE_TEST</div><div class='add'>+	select REGMAP_MMIO</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the Qualcomm Technologies, Inc. packet</div><div class='add'>+	  process engine (PPE) available with IPQ SoC. The PPE includes</div><div class='add'>+	  the Ethernet MACs, Ethernet DMA (EDMA) and switch core that</div><div class='add'>+	  supports L3 flow offload, L2 switch function, RSS and tunnel</div><div class='add'>+	  offload.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here. The module</div><div class='add'>+	  will be called qcom-ppe.</div><div class='add'>+</div><div class='ctx'> source "drivers/net/ethernet/qualcomm/rmnet/Kconfig"</div><div class='ctx'> </div><div class='ctx'> endif # NET_VENDOR_QUALCOMM</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/Makefile b/drivers/net/ethernet/qualcomm/Makefile<br/>index 9250976dd884..166a59aea363 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/Makefile</a></div><div class='hunk'>@@ -11,4 +11,5 @@ qcauart-objs := qca_uart.o</div><div class='ctx'> </div><div class='ctx'> obj-y += emac/</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_QCOM_PPE) += ppe/</div><div class='ctx'> obj-$(CONFIG_RMNET) += rmnet/</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/emac/emac-sgmii.c b/drivers/net/ethernet/qualcomm/emac/emac-sgmii.c<br/>index a508ebc4b206..28b3a7071e58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/emac/emac-sgmii.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/emac/emac-sgmii.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/emac/emac-sgmii.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/emac/emac-sgmii.c</a></div><div class='hunk'>@@ -419,7 +419,7 @@ int emac_sgmii_config(struct platform_device *pdev, struct emac_adapter *adpt)</div><div class='ctx'> 		goto error_put_device;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* v2 SGMII has a per-lane digital digital, so parse it if it exists */</div><div class='add'>+	/* v2 SGMII has a per-lane digital, so parse it if it exists */</div><div class='ctx'> 	res = platform_get_resource(sgmii_pdev, IORESOURCE_MEM, 1);</div><div class='ctx'> 	if (res) {</div><div class='ctx'> 		phy-&gt;digital = ioremap(res-&gt;start, resource_size(res));</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/ppe/Makefile b/drivers/net/ethernet/qualcomm/ppe/Makefile<br/>new file mode 100644<br/>index 000000000000..9e60b2400c16<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/ppe/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/ppe/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Makefile for the device driver of PPE (Packet Process Engine) in IPQ SoC</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_QCOM_PPE) += qcom-ppe.o</div><div class='add'>+qcom-ppe-objs := ppe.o ppe_config.o ppe_debugfs.o</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/ppe/ppe.c b/drivers/net/ethernet/qualcomm/ppe/ppe.c<br/>new file mode 100644<br/>index 000000000000..be747510d947<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/ppe/ppe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/ppe/ppe.c</a></div><div class='hunk'>@@ -0,0 +1,239 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* PPE platform device probe, DTSI parser and PPE clock initializations. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/interconnect.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ppe.h"</div><div class='add'>+#include "ppe_config.h"</div><div class='add'>+#include "ppe_debugfs.h"</div><div class='add'>+</div><div class='add'>+#define PPE_PORT_MAX		8</div><div class='add'>+#define PPE_CLK_RATE		353000000</div><div class='add'>+</div><div class='add'>+/* ICC clocks for enabling PPE device. The avg_bw and peak_bw with value 0</div><div class='add'>+ * will be updated by the clock rate of PPE.</div><div class='add'>+ */</div><div class='add'>+static const struct icc_bulk_data ppe_icc_data[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "ppe",</div><div class='add'>+		.avg_bw = 0,</div><div class='add'>+		.peak_bw = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "ppe_cfg",</div><div class='add'>+		.avg_bw = 0,</div><div class='add'>+		.peak_bw = 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "qos_gen",</div><div class='add'>+		.avg_bw = 6000,</div><div class='add'>+		.peak_bw = 6000,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "timeout_ref",</div><div class='add'>+		.avg_bw = 6000,</div><div class='add'>+		.peak_bw = 6000,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "nssnoc_memnoc",</div><div class='add'>+		.avg_bw = 533333,</div><div class='add'>+		.peak_bw = 533333,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "memnoc_nssnoc",</div><div class='add'>+		.avg_bw = 533333,</div><div class='add'>+		.peak_bw = 533333,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "memnoc_nssnoc_1",</div><div class='add'>+		.avg_bw = 533333,</div><div class='add'>+		.peak_bw = 533333,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_range ppe_readable_ranges[] = {</div><div class='add'>+	regmap_reg_range(0x0, 0x1ff),		/* Global */</div><div class='add'>+	regmap_reg_range(0x400, 0x5ff),		/* LPI CSR */</div><div class='add'>+	regmap_reg_range(0x1000, 0x11ff),	/* GMAC0 */</div><div class='add'>+	regmap_reg_range(0x1200, 0x13ff),	/* GMAC1 */</div><div class='add'>+	regmap_reg_range(0x1400, 0x15ff),	/* GMAC2 */</div><div class='add'>+	regmap_reg_range(0x1600, 0x17ff),	/* GMAC3 */</div><div class='add'>+	regmap_reg_range(0x1800, 0x19ff),	/* GMAC4 */</div><div class='add'>+	regmap_reg_range(0x1a00, 0x1bff),	/* GMAC5 */</div><div class='add'>+	regmap_reg_range(0xb000, 0xefff),	/* PRX CSR */</div><div class='add'>+	regmap_reg_range(0xf000, 0x1efff),	/* IPE */</div><div class='add'>+	regmap_reg_range(0x20000, 0x5ffff),	/* PTX CSR */</div><div class='add'>+	regmap_reg_range(0x60000, 0x9ffff),	/* IPE L2 CSR */</div><div class='add'>+	regmap_reg_range(0xb0000, 0xeffff),	/* IPO CSR */</div><div class='add'>+	regmap_reg_range(0x100000, 0x17ffff),	/* IPE PC */</div><div class='add'>+	regmap_reg_range(0x180000, 0x1bffff),	/* PRE IPO CSR */</div><div class='add'>+	regmap_reg_range(0x1d0000, 0x1dffff),	/* Tunnel parser */</div><div class='add'>+	regmap_reg_range(0x1e0000, 0x1effff),	/* Ingress parse */</div><div class='add'>+	regmap_reg_range(0x200000, 0x2fffff),	/* IPE L3 */</div><div class='add'>+	regmap_reg_range(0x300000, 0x3fffff),	/* IPE tunnel */</div><div class='add'>+	regmap_reg_range(0x400000, 0x4fffff),	/* Scheduler */</div><div class='add'>+	regmap_reg_range(0x500000, 0x503fff),	/* XGMAC0 */</div><div class='add'>+	regmap_reg_range(0x504000, 0x507fff),	/* XGMAC1 */</div><div class='add'>+	regmap_reg_range(0x508000, 0x50bfff),	/* XGMAC2 */</div><div class='add'>+	regmap_reg_range(0x50c000, 0x50ffff),	/* XGMAC3 */</div><div class='add'>+	regmap_reg_range(0x510000, 0x513fff),	/* XGMAC4 */</div><div class='add'>+	regmap_reg_range(0x514000, 0x517fff),	/* XGMAC5 */</div><div class='add'>+	regmap_reg_range(0x600000, 0x6fffff),	/* BM */</div><div class='add'>+	regmap_reg_range(0x800000, 0x9fffff),	/* QM */</div><div class='add'>+	regmap_reg_range(0xb00000, 0xbef800),	/* EDMA */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_access_table ppe_reg_table = {</div><div class='add'>+	.yes_ranges = ppe_readable_ranges,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(ppe_readable_ranges),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config regmap_config_ipq9574 = {</div><div class='add'>+	.reg_bits = 32,</div><div class='add'>+	.reg_stride = 4,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.rd_table = &amp;ppe_reg_table,</div><div class='add'>+	.wr_table = &amp;ppe_reg_table,</div><div class='add'>+	.max_register = 0xbef800,</div><div class='add'>+	.fast_io = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ppe_clock_init_and_reset(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	unsigned long ppe_rate = ppe_dev-&gt;clk_rate;</div><div class='add'>+	struct device *dev = ppe_dev-&gt;dev;</div><div class='add'>+	struct reset_control *rstc;</div><div class='add'>+	struct clk_bulk_data *clks;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ppe_dev-&gt;num_icc_paths; i++) {</div><div class='add'>+		ppe_dev-&gt;icc_paths[i].name = ppe_icc_data[i].name;</div><div class='add'>+		ppe_dev-&gt;icc_paths[i].avg_bw = ppe_icc_data[i].avg_bw ? :</div><div class='add'>+					       Bps_to_icc(ppe_rate);</div><div class='add'>+</div><div class='add'>+		/* PPE does not have an explicit peak bandwidth requirement,</div><div class='add'>+		 * so set the peak bandwidth to be equal to the average</div><div class='add'>+		 * bandwidth.</div><div class='add'>+		 */</div><div class='add'>+		ppe_dev-&gt;icc_paths[i].peak_bw = ppe_icc_data[i].peak_bw ? :</div><div class='add'>+						Bps_to_icc(ppe_rate);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = devm_of_icc_bulk_get(dev, ppe_dev-&gt;num_icc_paths,</div><div class='add'>+				   ppe_dev-&gt;icc_paths);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = icc_bulk_set_bw(ppe_dev-&gt;num_icc_paths, ppe_dev-&gt;icc_paths);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* The PPE clocks have a common parent clock. Setting the clock</div><div class='add'>+	 * rate of "ppe" ensures the clock rate of all PPE clocks is</div><div class='add'>+	 * configured to the same rate.</div><div class='add'>+	 */</div><div class='add'>+	clk = devm_clk_get(dev, "ppe");</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return PTR_ERR(clk);</div><div class='add'>+</div><div class='add'>+	ret = clk_set_rate(clk, ppe_rate);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = devm_clk_bulk_get_all_enabled(dev, &amp;clks);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Reset the PPE. */</div><div class='add'>+	rstc = devm_reset_control_get_exclusive(dev, NULL);</div><div class='add'>+	if (IS_ERR(rstc))</div><div class='add'>+		return PTR_ERR(rstc);</div><div class='add'>+</div><div class='add'>+	ret = reset_control_assert(rstc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* The delay 10 ms of assert is necessary for resetting PPE. */</div><div class='add'>+	usleep_range(10000, 11000);</div><div class='add'>+</div><div class='add'>+	return reset_control_deassert(rstc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qcom_ppe_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct ppe_device *ppe_dev;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	int ret, num_icc;</div><div class='add'>+</div><div class='add'>+	num_icc = ARRAY_SIZE(ppe_icc_data);</div><div class='add'>+	ppe_dev = devm_kzalloc(dev, struct_size(ppe_dev, icc_paths, num_icc),</div><div class='add'>+			       GFP_KERNEL);</div><div class='add'>+	if (!ppe_dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	base = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(base))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(base), "PPE ioremap failed\n");</div><div class='add'>+</div><div class='add'>+	ppe_dev-&gt;regmap = devm_regmap_init_mmio(dev, base, &amp;regmap_config_ipq9574);</div><div class='add'>+	if (IS_ERR(ppe_dev-&gt;regmap))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(ppe_dev-&gt;regmap),</div><div class='add'>+				     "PPE initialize regmap failed\n");</div><div class='add'>+	ppe_dev-&gt;dev = dev;</div><div class='add'>+	ppe_dev-&gt;clk_rate = PPE_CLK_RATE;</div><div class='add'>+	ppe_dev-&gt;num_ports = PPE_PORT_MAX;</div><div class='add'>+	ppe_dev-&gt;num_icc_paths = num_icc;</div><div class='add'>+</div><div class='add'>+	ret = ppe_clock_init_and_reset(ppe_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "PPE clock config failed\n");</div><div class='add'>+</div><div class='add'>+	ret = ppe_hw_config(ppe_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "PPE HW config failed\n");</div><div class='add'>+</div><div class='add'>+	ppe_debugfs_setup(ppe_dev);</div><div class='add'>+	platform_set_drvdata(pdev, ppe_dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qcom_ppe_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct ppe_device *ppe_dev;</div><div class='add'>+</div><div class='add'>+	ppe_dev = platform_get_drvdata(pdev);</div><div class='add'>+	ppe_debugfs_teardown(ppe_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id qcom_ppe_of_match[] = {</div><div class='add'>+	{ .compatible = "qcom,ipq9574-ppe" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, qcom_ppe_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver qcom_ppe_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "qcom_ppe",</div><div class='add'>+		.of_match_table = qcom_ppe_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe	= qcom_ppe_probe,</div><div class='add'>+	.remove = qcom_ppe_remove,</div><div class='add'>+};</div><div class='add'>+module_platform_driver(qcom_ppe_driver);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("Qualcomm Technologies, Inc. IPQ PPE driver");</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/ppe/ppe.h b/drivers/net/ethernet/qualcomm/ppe/ppe.h<br/>new file mode 100644<br/>index 000000000000..27458f0bc206<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/ppe/ppe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/ppe/ppe.h</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PPE_H__</div><div class='add'>+#define __PPE_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/interconnect.h&gt;</div><div class='add'>+</div><div class='add'>+struct device;</div><div class='add'>+struct regmap;</div><div class='add'>+struct dentry;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_device - PPE device private data.</div><div class='add'>+ * @dev: PPE device structure.</div><div class='add'>+ * @regmap: PPE register map.</div><div class='add'>+ * @clk_rate: PPE clock rate.</div><div class='add'>+ * @num_ports: Number of PPE ports.</div><div class='add'>+ * @debugfs_root: Debugfs root entry.</div><div class='add'>+ * @num_icc_paths: Number of interconnect paths.</div><div class='add'>+ * @icc_paths: Interconnect path array.</div><div class='add'>+ *</div><div class='add'>+ * PPE device is the instance of PPE hardware, which is used to</div><div class='add'>+ * configure PPE packet process modules such as BM (buffer management),</div><div class='add'>+ * QM (queue management), and scheduler.</div><div class='add'>+ */</div><div class='add'>+struct ppe_device {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	unsigned long clk_rate;</div><div class='add'>+	unsigned int num_ports;</div><div class='add'>+	struct dentry *debugfs_root;</div><div class='add'>+	unsigned int num_icc_paths;</div><div class='add'>+	struct icc_bulk_data icc_paths[] __counted_by(num_icc_paths);</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/ppe/ppe_config.c b/drivers/net/ethernet/qualcomm/ppe/ppe_config.c<br/>new file mode 100644<br/>index 000000000000..e9a0e22907a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/ppe/ppe_config.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/ppe/ppe_config.c</a></div><div class='hunk'>@@ -0,0 +1,2034 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* PPE HW initialization configs such as BM(buffer management),</div><div class='add'>+ * QM(queue management) and scheduler configs.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ppe.h"</div><div class='add'>+#include "ppe_config.h"</div><div class='add'>+#include "ppe_regs.h"</div><div class='add'>+</div><div class='add'>+#define PPE_QUEUE_SCH_PRI_NUM		8</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_bm_port_config - PPE BM port configuration.</div><div class='add'>+ * @port_id_start: The fist BM port ID to configure.</div><div class='add'>+ * @port_id_end: The last BM port ID to configure.</div><div class='add'>+ * @pre_alloc: BM port dedicated buffer number.</div><div class='add'>+ * @in_fly_buf: Buffer number for receiving the packet after pause frame sent.</div><div class='add'>+ * @ceil: Ceil to generate the back pressure.</div><div class='add'>+ * @weight: Weight value.</div><div class='add'>+ * @resume_offset: Resume offset from the threshold value.</div><div class='add'>+ * @resume_ceil: Ceil to resume from the back pressure state.</div><div class='add'>+ * @dynamic: Dynamic threshold used or not.</div><div class='add'>+ *</div><div class='add'>+ * The is for configuring the threshold that impacts the port</div><div class='add'>+ * flow control.</div><div class='add'>+ */</div><div class='add'>+struct ppe_bm_port_config {</div><div class='add'>+	unsigned int port_id_start;</div><div class='add'>+	unsigned int port_id_end;</div><div class='add'>+	unsigned int pre_alloc;</div><div class='add'>+	unsigned int in_fly_buf;</div><div class='add'>+	unsigned int ceil;</div><div class='add'>+	unsigned int weight;</div><div class='add'>+	unsigned int resume_offset;</div><div class='add'>+	unsigned int resume_ceil;</div><div class='add'>+	bool dynamic;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_qm_queue_config - PPE queue config.</div><div class='add'>+ * @queue_start: PPE start of queue ID.</div><div class='add'>+ * @queue_end: PPE end of queue ID.</div><div class='add'>+ * @prealloc_buf: Queue dedicated buffer number.</div><div class='add'>+ * @ceil: Ceil to start drop packet from queue.</div><div class='add'>+ * @weight: Weight value.</div><div class='add'>+ * @resume_offset: Resume offset from the threshold.</div><div class='add'>+ * @dynamic: Threshold value is decided dynamically or statically.</div><div class='add'>+ *</div><div class='add'>+ * Queue configuration decides the threshold to drop packet from PPE</div><div class='add'>+ * hardware queue.</div><div class='add'>+ */</div><div class='add'>+struct ppe_qm_queue_config {</div><div class='add'>+	unsigned int queue_start;</div><div class='add'>+	unsigned int queue_end;</div><div class='add'>+	unsigned int prealloc_buf;</div><div class='add'>+	unsigned int ceil;</div><div class='add'>+	unsigned int weight;</div><div class='add'>+	unsigned int resume_offset;</div><div class='add'>+	bool dynamic;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum ppe_scheduler_direction - PPE scheduler direction for packet.</div><div class='add'>+ * @PPE_SCH_INGRESS: Scheduler for the packet on ingress,</div><div class='add'>+ * @PPE_SCH_EGRESS: Scheduler for the packet on egress,</div><div class='add'>+ */</div><div class='add'>+enum ppe_scheduler_direction {</div><div class='add'>+	PPE_SCH_INGRESS = 0,</div><div class='add'>+	PPE_SCH_EGRESS = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_scheduler_bm_config - PPE arbitration for buffer config.</div><div class='add'>+ * @valid: Arbitration entry valid or not.</div><div class='add'>+ * @dir: Arbitration entry for egress or ingress.</div><div class='add'>+ * @port: Port ID to use arbitration entry.</div><div class='add'>+ * @backup_port_valid: Backup port valid or not.</div><div class='add'>+ * @backup_port: Backup port ID to use.</div><div class='add'>+ *</div><div class='add'>+ * Configure the scheduler settings for accessing and releasing the PPE buffers.</div><div class='add'>+ */</div><div class='add'>+struct ppe_scheduler_bm_config {</div><div class='add'>+	bool valid;</div><div class='add'>+	enum ppe_scheduler_direction dir;</div><div class='add'>+	unsigned int port;</div><div class='add'>+	bool backup_port_valid;</div><div class='add'>+	unsigned int backup_port;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_scheduler_qm_config - PPE arbitration for scheduler config.</div><div class='add'>+ * @ensch_port_bmp: Port bit map for enqueue scheduler.</div><div class='add'>+ * @ensch_port: Port ID to enqueue scheduler.</div><div class='add'>+ * @desch_port: Port ID to dequeue scheduler.</div><div class='add'>+ * @desch_backup_port_valid: Dequeue for the backup port valid or not.</div><div class='add'>+ * @desch_backup_port: Backup port ID to dequeue scheduler.</div><div class='add'>+ *</div><div class='add'>+ * Configure the scheduler settings for enqueuing and dequeuing packets on</div><div class='add'>+ * the PPE port.</div><div class='add'>+ */</div><div class='add'>+struct ppe_scheduler_qm_config {</div><div class='add'>+	unsigned int ensch_port_bmp;</div><div class='add'>+	unsigned int ensch_port;</div><div class='add'>+	unsigned int desch_port;</div><div class='add'>+	bool desch_backup_port_valid;</div><div class='add'>+	unsigned int desch_backup_port;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_scheduler_port_config - PPE port scheduler config.</div><div class='add'>+ * @port: Port ID to be scheduled.</div><div class='add'>+ * @flow_level: Scheduler flow level or not.</div><div class='add'>+ * @node_id: Node ID, for level 0, queue ID is used.</div><div class='add'>+ * @loop_num: Loop number of scheduler config.</div><div class='add'>+ * @pri_max: Max priority configured.</div><div class='add'>+ * @flow_id: Strict priority ID.</div><div class='add'>+ * @drr_node_id: Node ID for scheduler.</div><div class='add'>+ *</div><div class='add'>+ * PPE port scheduler configuration which decides the priority in the</div><div class='add'>+ * packet scheduler for the egress port.</div><div class='add'>+ */</div><div class='add'>+struct ppe_scheduler_port_config {</div><div class='add'>+	unsigned int port;</div><div class='add'>+	bool flow_level;</div><div class='add'>+	unsigned int node_id;</div><div class='add'>+	unsigned int loop_num;</div><div class='add'>+	unsigned int pri_max;</div><div class='add'>+	unsigned int flow_id;</div><div class='add'>+	unsigned int drr_node_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_port_schedule_resource - PPE port scheduler resource.</div><div class='add'>+ * @ucastq_start: Unicast queue start ID.</div><div class='add'>+ * @ucastq_end: Unicast queue end ID.</div><div class='add'>+ * @mcastq_start: Multicast queue start ID.</div><div class='add'>+ * @mcastq_end: Multicast queue end ID.</div><div class='add'>+ * @flow_id_start: Flow start ID.</div><div class='add'>+ * @flow_id_end: Flow end ID.</div><div class='add'>+ * @l0node_start: Scheduler node start ID for queue level.</div><div class='add'>+ * @l0node_end: Scheduler node end ID for queue level.</div><div class='add'>+ * @l1node_start: Scheduler node start ID for flow level.</div><div class='add'>+ * @l1node_end: Scheduler node end ID for flow level.</div><div class='add'>+ *</div><div class='add'>+ * PPE scheduler resource allocated among the PPE ports.</div><div class='add'>+ */</div><div class='add'>+struct ppe_port_schedule_resource {</div><div class='add'>+	unsigned int ucastq_start;</div><div class='add'>+	unsigned int ucastq_end;</div><div class='add'>+	unsigned int mcastq_start;</div><div class='add'>+	unsigned int mcastq_end;</div><div class='add'>+	unsigned int flow_id_start;</div><div class='add'>+	unsigned int flow_id_end;</div><div class='add'>+	unsigned int l0node_start;</div><div class='add'>+	unsigned int l0node_end;</div><div class='add'>+	unsigned int l1node_start;</div><div class='add'>+	unsigned int l1node_end;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* There are total 2048 buffers available in PPE, out of which some</div><div class='add'>+ * buffers are reserved for some specific purposes per PPE port. The</div><div class='add'>+ * rest of the pool of 1550 buffers are assigned to the general 'group0'</div><div class='add'>+ * which is shared among all ports of the PPE.</div><div class='add'>+ */</div><div class='add'>+static const int ipq9574_ppe_bm_group_config = 1550;</div><div class='add'>+</div><div class='add'>+/* The buffer configurations per PPE port. There are 15 BM ports and</div><div class='add'>+ * 4 BM groups supported by PPE. BM port (0-7) is for EDMA port 0,</div><div class='add'>+ * BM port (8-13) is for PPE physical port 1-6 and BM port 14 is for</div><div class='add'>+ * EIP port.</div><div class='add'>+ */</div><div class='add'>+static const struct ppe_bm_port_config ipq9574_ppe_bm_port_config[] = {</div><div class='add'>+	{</div><div class='add'>+		/* Buffer configuration for the BM port ID 0 of EDMA. */</div><div class='add'>+		.port_id_start	= 0,</div><div class='add'>+		.port_id_end	= 0,</div><div class='add'>+		.pre_alloc	= 0,</div><div class='add'>+		.in_fly_buf	= 100,</div><div class='add'>+		.ceil		= 1146,</div><div class='add'>+		.weight		= 7,</div><div class='add'>+		.resume_offset	= 8,</div><div class='add'>+		.resume_ceil	= 0,</div><div class='add'>+		.dynamic	= true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* Buffer configuration for the BM port ID 1-7 of EDMA. */</div><div class='add'>+		.port_id_start	= 1,</div><div class='add'>+		.port_id_end	= 7,</div><div class='add'>+		.pre_alloc	= 0,</div><div class='add'>+		.in_fly_buf	= 100,</div><div class='add'>+		.ceil		= 250,</div><div class='add'>+		.weight		= 4,</div><div class='add'>+		.resume_offset	= 36,</div><div class='add'>+		.resume_ceil	= 0,</div><div class='add'>+		.dynamic	= true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* Buffer configuration for the BM port ID 8-13 of PPE ports. */</div><div class='add'>+		.port_id_start	= 8,</div><div class='add'>+		.port_id_end	= 13,</div><div class='add'>+		.pre_alloc	= 0,</div><div class='add'>+		.in_fly_buf	= 128,</div><div class='add'>+		.ceil		= 250,</div><div class='add'>+		.weight		= 4,</div><div class='add'>+		.resume_offset	= 36,</div><div class='add'>+		.resume_ceil	= 0,</div><div class='add'>+		.dynamic	= true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* Buffer configuration for the BM port ID 14 of EIP. */</div><div class='add'>+		.port_id_start	= 14,</div><div class='add'>+		.port_id_end	= 14,</div><div class='add'>+		.pre_alloc	= 0,</div><div class='add'>+		.in_fly_buf	= 40,</div><div class='add'>+		.ceil		= 250,</div><div class='add'>+		.weight		= 4,</div><div class='add'>+		.resume_offset	= 36,</div><div class='add'>+		.resume_ceil	= 0,</div><div class='add'>+		.dynamic	= true,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* QM fetches the packet from PPE buffer management for transmitting the</div><div class='add'>+ * packet out. The QM group configuration limits the total number of buffers</div><div class='add'>+ * enqueued by all PPE hardware queues.</div><div class='add'>+ * There are total 2048 buffers available, out of which some buffers are</div><div class='add'>+ * dedicated to hardware exception handlers. The remaining buffers are</div><div class='add'>+ * assigned to the general 'group0', which is the group assigned to all</div><div class='add'>+ * queues by default.</div><div class='add'>+ */</div><div class='add'>+static const int ipq9574_ppe_qm_group_config = 2000;</div><div class='add'>+</div><div class='add'>+/* Default QM settings for unicast and multicast queues for IPQ9754. */</div><div class='add'>+static const struct ppe_qm_queue_config ipq9574_ppe_qm_queue_config[] = {</div><div class='add'>+	{</div><div class='add'>+		/* QM settings for unicast queues 0 to 255. */</div><div class='add'>+		.queue_start	= 0,</div><div class='add'>+		.queue_end	= 255,</div><div class='add'>+		.prealloc_buf	= 0,</div><div class='add'>+		.ceil		= 1200,</div><div class='add'>+		.weight		= 7,</div><div class='add'>+		.resume_offset	= 36,</div><div class='add'>+		.dynamic	= true,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* QM settings for multicast queues 256 to 299. */</div><div class='add'>+		.queue_start	= 256,</div><div class='add'>+		.queue_end	= 299,</div><div class='add'>+		.prealloc_buf	= 0,</div><div class='add'>+		.ceil		= 250,</div><div class='add'>+		.weight		= 0,</div><div class='add'>+		.resume_offset	= 36,</div><div class='add'>+		.dynamic	= false,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PPE scheduler configuration for BM includes multiple entries. Each entry</div><div class='add'>+ * indicates the primary port to be assigned the buffers for the ingress or</div><div class='add'>+ * to release the buffers for the egress. Backup port ID will be used when</div><div class='add'>+ * the primary port ID is down.</div><div class='add'>+ */</div><div class='add'>+static const struct ppe_scheduler_bm_config ipq9574_ppe_sch_bm_config[] = {</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 1, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  1, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 7, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  7, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 1, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  1, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 2, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  2, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 1, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  1, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 3, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  3, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 7, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  7, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 1, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  1, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 4, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  4, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 1, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  1, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 2, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  2, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 7, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  7, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 1, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  1, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 3, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  3, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 1, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  1, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 0, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  0, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 5, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  5, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 6, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  6, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 4, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  4, false, 0},</div><div class='add'>+	{true, PPE_SCH_INGRESS, 7, false, 0},</div><div class='add'>+	{true, PPE_SCH_EGRESS,  7, false, 0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PPE scheduler configuration for QM includes multiple entries. Each entry</div><div class='add'>+ * contains ports to be dispatched for enqueueing and dequeueing. The backup</div><div class='add'>+ * port for dequeueing is supported to be used when the primary port for</div><div class='add'>+ * dequeueing is down.</div><div class='add'>+ */</div><div class='add'>+static const struct ppe_scheduler_qm_config ipq9574_ppe_sch_qm_config[] = {</div><div class='add'>+	{0x98, 6, 0, true, 1},</div><div class='add'>+	{0x94, 5, 6, true, 3},</div><div class='add'>+	{0x86, 0, 5, true, 4},</div><div class='add'>+	{0x8C, 1, 6, true, 0},</div><div class='add'>+	{0x1C, 7, 5, true, 1},</div><div class='add'>+	{0x98, 2, 6, true, 0},</div><div class='add'>+	{0x1C, 5, 7, true, 1},</div><div class='add'>+	{0x34, 3, 6, true, 0},</div><div class='add'>+	{0x8C, 4, 5, true, 1},</div><div class='add'>+	{0x98, 2, 6, true, 0},</div><div class='add'>+	{0x8C, 5, 4, true, 1},</div><div class='add'>+	{0xA8, 0, 6, true, 2},</div><div class='add'>+	{0x98, 5, 1, true, 0},</div><div class='add'>+	{0x98, 6, 5, true, 2},</div><div class='add'>+	{0x89, 1, 6, true, 4},</div><div class='add'>+	{0xA4, 3, 0, true, 1},</div><div class='add'>+	{0x8C, 5, 6, true, 4},</div><div class='add'>+	{0xA8, 0, 2, true, 1},</div><div class='add'>+	{0x98, 6, 5, true, 0},</div><div class='add'>+	{0xC4, 4, 3, true, 1},</div><div class='add'>+	{0x94, 6, 5, true, 0},</div><div class='add'>+	{0x1C, 7, 6, true, 1},</div><div class='add'>+	{0x98, 2, 5, true, 0},</div><div class='add'>+	{0x1C, 6, 7, true, 1},</div><div class='add'>+	{0x1C, 5, 6, true, 0},</div><div class='add'>+	{0x94, 3, 5, true, 1},</div><div class='add'>+	{0x8C, 4, 6, true, 0},</div><div class='add'>+	{0x94, 1, 5, true, 3},</div><div class='add'>+	{0x94, 6, 1, true, 0},</div><div class='add'>+	{0xD0, 3, 5, true, 2},</div><div class='add'>+	{0x98, 6, 0, true, 1},</div><div class='add'>+	{0x94, 5, 6, true, 3},</div><div class='add'>+	{0x94, 1, 5, true, 0},</div><div class='add'>+	{0x98, 2, 6, true, 1},</div><div class='add'>+	{0x8C, 4, 5, true, 0},</div><div class='add'>+	{0x1C, 7, 6, true, 1},</div><div class='add'>+	{0x8C, 0, 5, true, 4},</div><div class='add'>+	{0x89, 1, 6, true, 2},</div><div class='add'>+	{0x98, 5, 0, true, 1},</div><div class='add'>+	{0x94, 6, 5, true, 3},</div><div class='add'>+	{0x92, 0, 6, true, 2},</div><div class='add'>+	{0x98, 1, 5, true, 0},</div><div class='add'>+	{0x98, 6, 2, true, 1},</div><div class='add'>+	{0xD0, 0, 5, true, 3},</div><div class='add'>+	{0x94, 6, 0, true, 1},</div><div class='add'>+	{0x8C, 5, 6, true, 4},</div><div class='add'>+	{0x8C, 1, 5, true, 0},</div><div class='add'>+	{0x1C, 6, 7, true, 1},</div><div class='add'>+	{0x1C, 5, 6, true, 0},</div><div class='add'>+	{0xB0, 2, 3, true, 1},</div><div class='add'>+	{0xC4, 4, 5, true, 0},</div><div class='add'>+	{0x8C, 6, 4, true, 1},</div><div class='add'>+	{0xA4, 3, 6, true, 0},</div><div class='add'>+	{0x1C, 5, 7, true, 1},</div><div class='add'>+	{0x4C, 0, 5, true, 4},</div><div class='add'>+	{0x8C, 6, 0, true, 1},</div><div class='add'>+	{0x34, 7, 6, true, 3},</div><div class='add'>+	{0x94, 5, 0, true, 1},</div><div class='add'>+	{0x98, 6, 5, true, 2},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ppe_scheduler_port_config ppe_port_sch_config[] = {</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= true,</div><div class='add'>+		.node_id	= 0,</div><div class='add'>+		.loop_num	= 1,</div><div class='add'>+		.pri_max	= 1,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 0,</div><div class='add'>+		.loop_num	= 8,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 8,</div><div class='add'>+		.loop_num	= 8,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 16,</div><div class='add'>+		.loop_num	= 8,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 24,</div><div class='add'>+		.loop_num	= 8,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 32,</div><div class='add'>+		.loop_num	= 8,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 40,</div><div class='add'>+		.loop_num	= 8,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 48,</div><div class='add'>+		.loop_num	= 8,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 56,</div><div class='add'>+		.loop_num	= 8,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 256,</div><div class='add'>+		.loop_num	= 8,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 0,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 264,</div><div class='add'>+		.loop_num	= 8,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 0,</div><div class='add'>+		.drr_node_id	= 0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 1,</div><div class='add'>+		.flow_level	= true,</div><div class='add'>+		.node_id	= 36,</div><div class='add'>+		.loop_num	= 2,</div><div class='add'>+		.pri_max	= 0,</div><div class='add'>+		.flow_id	= 1,</div><div class='add'>+		.drr_node_id	= 8,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 1,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 144,</div><div class='add'>+		.loop_num	= 16,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 36,</div><div class='add'>+		.drr_node_id	= 48,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 1,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 272,</div><div class='add'>+		.loop_num	= 4,</div><div class='add'>+		.pri_max	= 4,</div><div class='add'>+		.flow_id	= 36,</div><div class='add'>+		.drr_node_id	= 48,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 2,</div><div class='add'>+		.flow_level	= true,</div><div class='add'>+		.node_id	= 40,</div><div class='add'>+		.loop_num	= 2,</div><div class='add'>+		.pri_max	= 0,</div><div class='add'>+		.flow_id	= 2,</div><div class='add'>+		.drr_node_id	= 12,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 2,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 160,</div><div class='add'>+		.loop_num	= 16,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 40,</div><div class='add'>+		.drr_node_id	= 64,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 2,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 276,</div><div class='add'>+		.loop_num	= 4,</div><div class='add'>+		.pri_max	= 4,</div><div class='add'>+		.flow_id	= 40,</div><div class='add'>+		.drr_node_id	= 64,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 3,</div><div class='add'>+		.flow_level	= true,</div><div class='add'>+		.node_id	= 44,</div><div class='add'>+		.loop_num	= 2,</div><div class='add'>+		.pri_max	= 0,</div><div class='add'>+		.flow_id	= 3,</div><div class='add'>+		.drr_node_id	= 16,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 3,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 176,</div><div class='add'>+		.loop_num	= 16,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 44,</div><div class='add'>+		.drr_node_id	= 80,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 3,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 280,</div><div class='add'>+		.loop_num	= 4,</div><div class='add'>+		.pri_max	= 4,</div><div class='add'>+		.flow_id	= 44,</div><div class='add'>+		.drr_node_id	= 80,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 4,</div><div class='add'>+		.flow_level	= true,</div><div class='add'>+		.node_id	= 48,</div><div class='add'>+		.loop_num	= 2,</div><div class='add'>+		.pri_max	= 0,</div><div class='add'>+		.flow_id	= 4,</div><div class='add'>+		.drr_node_id	= 20,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 4,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 192,</div><div class='add'>+		.loop_num	= 16,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 48,</div><div class='add'>+		.drr_node_id	= 96,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 4,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 284,</div><div class='add'>+		.loop_num	= 4,</div><div class='add'>+		.pri_max	= 4,</div><div class='add'>+		.flow_id	= 48,</div><div class='add'>+		.drr_node_id	= 96,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 5,</div><div class='add'>+		.flow_level	= true,</div><div class='add'>+		.node_id	= 52,</div><div class='add'>+		.loop_num	= 2,</div><div class='add'>+		.pri_max	= 0,</div><div class='add'>+		.flow_id	= 5,</div><div class='add'>+		.drr_node_id	= 24,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 5,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 208,</div><div class='add'>+		.loop_num	= 16,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 52,</div><div class='add'>+		.drr_node_id	= 112,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 5,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 288,</div><div class='add'>+		.loop_num	= 4,</div><div class='add'>+		.pri_max	= 4,</div><div class='add'>+		.flow_id	= 52,</div><div class='add'>+		.drr_node_id	= 112,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 6,</div><div class='add'>+		.flow_level	= true,</div><div class='add'>+		.node_id	= 56,</div><div class='add'>+		.loop_num	= 2,</div><div class='add'>+		.pri_max	= 0,</div><div class='add'>+		.flow_id	= 6,</div><div class='add'>+		.drr_node_id	= 28,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 6,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 224,</div><div class='add'>+		.loop_num	= 16,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 56,</div><div class='add'>+		.drr_node_id	= 128,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 6,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 292,</div><div class='add'>+		.loop_num	= 4,</div><div class='add'>+		.pri_max	= 4,</div><div class='add'>+		.flow_id	= 56,</div><div class='add'>+		.drr_node_id	= 128,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 7,</div><div class='add'>+		.flow_level	= true,</div><div class='add'>+		.node_id	= 60,</div><div class='add'>+		.loop_num	= 2,</div><div class='add'>+		.pri_max	= 0,</div><div class='add'>+		.flow_id	= 7,</div><div class='add'>+		.drr_node_id	= 32,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 7,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 240,</div><div class='add'>+		.loop_num	= 16,</div><div class='add'>+		.pri_max	= 8,</div><div class='add'>+		.flow_id	= 60,</div><div class='add'>+		.drr_node_id	= 144,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.port		= 7,</div><div class='add'>+		.flow_level	= false,</div><div class='add'>+		.node_id	= 296,</div><div class='add'>+		.loop_num	= 4,</div><div class='add'>+		.pri_max	= 4,</div><div class='add'>+		.flow_id	= 60,</div><div class='add'>+		.drr_node_id	= 144,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The scheduler resource is applied to each PPE port, The resource</div><div class='add'>+ * includes the unicast &amp; multicast queues, flow nodes and DRR nodes.</div><div class='add'>+ */</div><div class='add'>+static const struct ppe_port_schedule_resource ppe_scheduler_res[] = {</div><div class='add'>+	{	.ucastq_start	= 0,</div><div class='add'>+		.ucastq_end	= 63,</div><div class='add'>+		.mcastq_start	= 256,</div><div class='add'>+		.mcastq_end	= 271,</div><div class='add'>+		.flow_id_start	= 0,</div><div class='add'>+		.flow_id_end	= 0,</div><div class='add'>+		.l0node_start	= 0,</div><div class='add'>+		.l0node_end	= 7,</div><div class='add'>+		.l1node_start	= 0,</div><div class='add'>+		.l1node_end	= 0,</div><div class='add'>+	},</div><div class='add'>+	{	.ucastq_start	= 144,</div><div class='add'>+		.ucastq_end	= 159,</div><div class='add'>+		.mcastq_start	= 272,</div><div class='add'>+		.mcastq_end	= 275,</div><div class='add'>+		.flow_id_start	= 36,</div><div class='add'>+		.flow_id_end	= 39,</div><div class='add'>+		.l0node_start	= 48,</div><div class='add'>+		.l0node_end	= 63,</div><div class='add'>+		.l1node_start	= 8,</div><div class='add'>+		.l1node_end	= 11,</div><div class='add'>+	},</div><div class='add'>+	{	.ucastq_start	= 160,</div><div class='add'>+		.ucastq_end	= 175,</div><div class='add'>+		.mcastq_start	= 276,</div><div class='add'>+		.mcastq_end	= 279,</div><div class='add'>+		.flow_id_start	= 40,</div><div class='add'>+		.flow_id_end	= 43,</div><div class='add'>+		.l0node_start	= 64,</div><div class='add'>+		.l0node_end	= 79,</div><div class='add'>+		.l1node_start	= 12,</div><div class='add'>+		.l1node_end	= 15,</div><div class='add'>+	},</div><div class='add'>+	{	.ucastq_start	= 176,</div><div class='add'>+		.ucastq_end	= 191,</div><div class='add'>+		.mcastq_start	= 280,</div><div class='add'>+		.mcastq_end	= 283,</div><div class='add'>+		.flow_id_start	= 44,</div><div class='add'>+		.flow_id_end	= 47,</div><div class='add'>+		.l0node_start	= 80,</div><div class='add'>+		.l0node_end	= 95,</div><div class='add'>+		.l1node_start	= 16,</div><div class='add'>+		.l1node_end	= 19,</div><div class='add'>+	},</div><div class='add'>+	{	.ucastq_start	= 192,</div><div class='add'>+		.ucastq_end	= 207,</div><div class='add'>+		.mcastq_start	= 284,</div><div class='add'>+		.mcastq_end	= 287,</div><div class='add'>+		.flow_id_start	= 48,</div><div class='add'>+		.flow_id_end	= 51,</div><div class='add'>+		.l0node_start	= 96,</div><div class='add'>+		.l0node_end	= 111,</div><div class='add'>+		.l1node_start	= 20,</div><div class='add'>+		.l1node_end	= 23,</div><div class='add'>+	},</div><div class='add'>+	{	.ucastq_start	= 208,</div><div class='add'>+		.ucastq_end	= 223,</div><div class='add'>+		.mcastq_start	= 288,</div><div class='add'>+		.mcastq_end	= 291,</div><div class='add'>+		.flow_id_start	= 52,</div><div class='add'>+		.flow_id_end	= 55,</div><div class='add'>+		.l0node_start	= 112,</div><div class='add'>+		.l0node_end	= 127,</div><div class='add'>+		.l1node_start	= 24,</div><div class='add'>+		.l1node_end	= 27,</div><div class='add'>+	},</div><div class='add'>+	{	.ucastq_start	= 224,</div><div class='add'>+		.ucastq_end	= 239,</div><div class='add'>+		.mcastq_start	= 292,</div><div class='add'>+		.mcastq_end	= 295,</div><div class='add'>+		.flow_id_start	= 56,</div><div class='add'>+		.flow_id_end	= 59,</div><div class='add'>+		.l0node_start	= 128,</div><div class='add'>+		.l0node_end	= 143,</div><div class='add'>+		.l1node_start	= 28,</div><div class='add'>+		.l1node_end	= 31,</div><div class='add'>+	},</div><div class='add'>+	{	.ucastq_start	= 240,</div><div class='add'>+		.ucastq_end	= 255,</div><div class='add'>+		.mcastq_start	= 296,</div><div class='add'>+		.mcastq_end	= 299,</div><div class='add'>+		.flow_id_start	= 60,</div><div class='add'>+		.flow_id_end	= 63,</div><div class='add'>+		.l0node_start	= 144,</div><div class='add'>+		.l0node_end	= 159,</div><div class='add'>+		.l1node_start	= 32,</div><div class='add'>+		.l1node_end	= 35,</div><div class='add'>+	},</div><div class='add'>+	{	.ucastq_start	= 64,</div><div class='add'>+		.ucastq_end	= 143,</div><div class='add'>+		.mcastq_start	= 0,</div><div class='add'>+		.mcastq_end	= 0,</div><div class='add'>+		.flow_id_start	= 1,</div><div class='add'>+		.flow_id_end	= 35,</div><div class='add'>+		.l0node_start	= 8,</div><div class='add'>+		.l0node_end	= 47,</div><div class='add'>+		.l1node_start	= 1,</div><div class='add'>+		.l1node_end	= 7,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Set the PPE queue level scheduler configuration. */</div><div class='add'>+static int ppe_scheduler_l0_queue_map_set(struct ppe_device *ppe_dev,</div><div class='add'>+					  int node_id, int port,</div><div class='add'>+					  struct ppe_scheduler_cfg scheduler_cfg)</div><div class='add'>+{</div><div class='add'>+	u32 val, reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_L0_FLOW_MAP_TBL_ADDR + node_id * PPE_L0_FLOW_MAP_TBL_INC;</div><div class='add'>+	val = FIELD_PREP(PPE_L0_FLOW_MAP_TBL_FLOW_ID, scheduler_cfg.flow_id);</div><div class='add'>+	val |= FIELD_PREP(PPE_L0_FLOW_MAP_TBL_C_PRI, scheduler_cfg.pri);</div><div class='add'>+	val |= FIELD_PREP(PPE_L0_FLOW_MAP_TBL_E_PRI, scheduler_cfg.pri);</div><div class='add'>+	val |= FIELD_PREP(PPE_L0_FLOW_MAP_TBL_C_NODE_WT, scheduler_cfg.drr_node_wt);</div><div class='add'>+	val |= FIELD_PREP(PPE_L0_FLOW_MAP_TBL_E_NODE_WT, scheduler_cfg.drr_node_wt);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_L0_C_FLOW_CFG_TBL_ADDR +</div><div class='add'>+	      (scheduler_cfg.flow_id * PPE_QUEUE_SCH_PRI_NUM + scheduler_cfg.pri) *</div><div class='add'>+	      PPE_L0_C_FLOW_CFG_TBL_INC;</div><div class='add'>+	val = FIELD_PREP(PPE_L0_C_FLOW_CFG_TBL_NODE_ID, scheduler_cfg.drr_node_id);</div><div class='add'>+	val |= FIELD_PREP(PPE_L0_C_FLOW_CFG_TBL_NODE_CREDIT_UNIT, scheduler_cfg.unit_is_packet);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_L0_E_FLOW_CFG_TBL_ADDR +</div><div class='add'>+	      (scheduler_cfg.flow_id * PPE_QUEUE_SCH_PRI_NUM + scheduler_cfg.pri) *</div><div class='add'>+	      PPE_L0_E_FLOW_CFG_TBL_INC;</div><div class='add'>+	val = FIELD_PREP(PPE_L0_E_FLOW_CFG_TBL_NODE_ID, scheduler_cfg.drr_node_id);</div><div class='add'>+	val |= FIELD_PREP(PPE_L0_E_FLOW_CFG_TBL_NODE_CREDIT_UNIT, scheduler_cfg.unit_is_packet);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_L0_FLOW_PORT_MAP_TBL_ADDR + node_id * PPE_L0_FLOW_PORT_MAP_TBL_INC;</div><div class='add'>+	val = FIELD_PREP(PPE_L0_FLOW_PORT_MAP_TBL_PORT_NUM, port);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_L0_COMP_CFG_TBL_ADDR + node_id * PPE_L0_COMP_CFG_TBL_INC;</div><div class='add'>+	val = FIELD_PREP(PPE_L0_COMP_CFG_TBL_NODE_METER_LEN, scheduler_cfg.frame_mode);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				  PPE_L0_COMP_CFG_TBL_NODE_METER_LEN,</div><div class='add'>+				  val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set the PPE flow level scheduler configuration. */</div><div class='add'>+static int ppe_scheduler_l1_queue_map_set(struct ppe_device *ppe_dev,</div><div class='add'>+					  int node_id, int port,</div><div class='add'>+					  struct ppe_scheduler_cfg scheduler_cfg)</div><div class='add'>+{</div><div class='add'>+	u32 val, reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PPE_L1_FLOW_MAP_TBL_FLOW_ID, scheduler_cfg.flow_id);</div><div class='add'>+	val |= FIELD_PREP(PPE_L1_FLOW_MAP_TBL_C_PRI, scheduler_cfg.pri);</div><div class='add'>+	val |= FIELD_PREP(PPE_L1_FLOW_MAP_TBL_E_PRI, scheduler_cfg.pri);</div><div class='add'>+	val |= FIELD_PREP(PPE_L1_FLOW_MAP_TBL_C_NODE_WT, scheduler_cfg.drr_node_wt);</div><div class='add'>+	val |= FIELD_PREP(PPE_L1_FLOW_MAP_TBL_E_NODE_WT, scheduler_cfg.drr_node_wt);</div><div class='add'>+	reg = PPE_L1_FLOW_MAP_TBL_ADDR + node_id * PPE_L1_FLOW_MAP_TBL_INC;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PPE_L1_C_FLOW_CFG_TBL_NODE_ID, scheduler_cfg.drr_node_id);</div><div class='add'>+	val |= FIELD_PREP(PPE_L1_C_FLOW_CFG_TBL_NODE_CREDIT_UNIT, scheduler_cfg.unit_is_packet);</div><div class='add'>+	reg = PPE_L1_C_FLOW_CFG_TBL_ADDR +</div><div class='add'>+	      (scheduler_cfg.flow_id * PPE_QUEUE_SCH_PRI_NUM + scheduler_cfg.pri) *</div><div class='add'>+	      PPE_L1_C_FLOW_CFG_TBL_INC;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PPE_L1_E_FLOW_CFG_TBL_NODE_ID, scheduler_cfg.drr_node_id);</div><div class='add'>+	val |= FIELD_PREP(PPE_L1_E_FLOW_CFG_TBL_NODE_CREDIT_UNIT, scheduler_cfg.unit_is_packet);</div><div class='add'>+	reg = PPE_L1_E_FLOW_CFG_TBL_ADDR +</div><div class='add'>+		(scheduler_cfg.flow_id * PPE_QUEUE_SCH_PRI_NUM + scheduler_cfg.pri) *</div><div class='add'>+		PPE_L1_E_FLOW_CFG_TBL_INC;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PPE_L1_FLOW_PORT_MAP_TBL_PORT_NUM, port);</div><div class='add'>+	reg = PPE_L1_FLOW_PORT_MAP_TBL_ADDR + node_id * PPE_L1_FLOW_PORT_MAP_TBL_INC;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_L1_COMP_CFG_TBL_ADDR + node_id * PPE_L1_COMP_CFG_TBL_INC;</div><div class='add'>+	val = FIELD_PREP(PPE_L1_COMP_CFG_TBL_NODE_METER_LEN, scheduler_cfg.frame_mode);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(ppe_dev-&gt;regmap, reg, PPE_L1_COMP_CFG_TBL_NODE_METER_LEN, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ppe_queue_scheduler_set - Configure scheduler for PPE hardware queue</div><div class='add'>+ * @ppe_dev: PPE device</div><div class='add'>+ * @node_id: PPE queue ID or flow ID</div><div class='add'>+ * @flow_level: Flow level scheduler or queue level scheduler</div><div class='add'>+ * @port: PPE port ID set scheduler configuration</div><div class='add'>+ * @scheduler_cfg: PPE scheduler configuration</div><div class='add'>+ *</div><div class='add'>+ * PPE scheduler configuration supports queue level and flow level on</div><div class='add'>+ * the PPE egress port.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ppe_queue_scheduler_set(struct ppe_device *ppe_dev,</div><div class='add'>+			    int node_id, bool flow_level, int port,</div><div class='add'>+			    struct ppe_scheduler_cfg scheduler_cfg)</div><div class='add'>+{</div><div class='add'>+	if (flow_level)</div><div class='add'>+		return ppe_scheduler_l1_queue_map_set(ppe_dev, node_id,</div><div class='add'>+						      port, scheduler_cfg);</div><div class='add'>+</div><div class='add'>+	return ppe_scheduler_l0_queue_map_set(ppe_dev, node_id,</div><div class='add'>+					      port, scheduler_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ppe_queue_ucast_base_set - Set PPE unicast queue base ID and profile ID</div><div class='add'>+ * @ppe_dev: PPE device</div><div class='add'>+ * @queue_dst: PPE queue destination configuration</div><div class='add'>+ * @queue_base: PPE queue base ID</div><div class='add'>+ * @profile_id: Profile ID</div><div class='add'>+ *</div><div class='add'>+ * The PPE unicast queue base ID and profile ID are configured based on the</div><div class='add'>+ * destination port information that can be service code or CPU code or the</div><div class='add'>+ * destination port.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ppe_queue_ucast_base_set(struct ppe_device *ppe_dev,</div><div class='add'>+			     struct ppe_queue_ucast_dest queue_dst,</div><div class='add'>+			     int queue_base, int profile_id)</div><div class='add'>+{</div><div class='add'>+	int index, profile_size;</div><div class='add'>+	u32 val, reg;</div><div class='add'>+</div><div class='add'>+	profile_size = queue_dst.src_profile &lt;&lt; 8;</div><div class='add'>+	if (queue_dst.service_code_en)</div><div class='add'>+		index = PPE_QUEUE_BASE_SERVICE_CODE + profile_size +</div><div class='add'>+			queue_dst.service_code;</div><div class='add'>+	else if (queue_dst.cpu_code_en)</div><div class='add'>+		index = PPE_QUEUE_BASE_CPU_CODE + profile_size +</div><div class='add'>+			queue_dst.cpu_code;</div><div class='add'>+	else</div><div class='add'>+		index = profile_size + queue_dst.dest_port;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PPE_UCAST_QUEUE_MAP_TBL_PROFILE_ID, profile_id);</div><div class='add'>+	val |= FIELD_PREP(PPE_UCAST_QUEUE_MAP_TBL_QUEUE_ID, queue_base);</div><div class='add'>+	reg = PPE_UCAST_QUEUE_MAP_TBL_ADDR + index * PPE_UCAST_QUEUE_MAP_TBL_INC;</div><div class='add'>+</div><div class='add'>+	return regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ppe_queue_ucast_offset_pri_set - Set PPE unicast queue offset based on priority</div><div class='add'>+ * @ppe_dev: PPE device</div><div class='add'>+ * @profile_id: Profile ID</div><div class='add'>+ * @priority: PPE internal priority to be used to set queue offset</div><div class='add'>+ * @queue_offset: Queue offset used for calculating the destination queue ID</div><div class='add'>+ *</div><div class='add'>+ * The PPE unicast queue offset is configured based on the PPE</div><div class='add'>+ * internal priority.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ppe_queue_ucast_offset_pri_set(struct ppe_device *ppe_dev,</div><div class='add'>+				   int profile_id,</div><div class='add'>+				   int priority,</div><div class='add'>+				   int queue_offset)</div><div class='add'>+{</div><div class='add'>+	u32 val, reg;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	index = (profile_id &lt;&lt; 4) + priority;</div><div class='add'>+	val = FIELD_PREP(PPE_UCAST_PRIORITY_MAP_TBL_CLASS, queue_offset);</div><div class='add'>+	reg = PPE_UCAST_PRIORITY_MAP_TBL_ADDR + index * PPE_UCAST_PRIORITY_MAP_TBL_INC;</div><div class='add'>+</div><div class='add'>+	return regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ppe_queue_ucast_offset_hash_set - Set PPE unicast queue offset based on hash</div><div class='add'>+ * @ppe_dev: PPE device</div><div class='add'>+ * @profile_id: Profile ID</div><div class='add'>+ * @rss_hash: Packet hash value to be used to set queue offset</div><div class='add'>+ * @queue_offset: Queue offset used for calculating the destination queue ID</div><div class='add'>+ *</div><div class='add'>+ * The PPE unicast queue offset is configured based on the RSS hash value.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ppe_queue_ucast_offset_hash_set(struct ppe_device *ppe_dev,</div><div class='add'>+				    int profile_id,</div><div class='add'>+				    int rss_hash,</div><div class='add'>+				    int queue_offset)</div><div class='add'>+{</div><div class='add'>+	u32 val, reg;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	index = (profile_id &lt;&lt; 8) + rss_hash;</div><div class='add'>+	val = FIELD_PREP(PPE_UCAST_HASH_MAP_TBL_HASH, queue_offset);</div><div class='add'>+	reg = PPE_UCAST_HASH_MAP_TBL_ADDR + index * PPE_UCAST_HASH_MAP_TBL_INC;</div><div class='add'>+</div><div class='add'>+	return regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ppe_port_resource_get - Get PPE resource per port</div><div class='add'>+ * @ppe_dev: PPE device</div><div class='add'>+ * @port: PPE port</div><div class='add'>+ * @type: Resource type</div><div class='add'>+ * @res_start: Resource start ID returned</div><div class='add'>+ * @res_end: Resource end ID returned</div><div class='add'>+ *</div><div class='add'>+ * PPE resource is assigned per PPE port, which is acquired for QoS scheduler.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ppe_port_resource_get(struct ppe_device *ppe_dev, int port,</div><div class='add'>+			  enum ppe_resource_type type,</div><div class='add'>+			  int *res_start, int *res_end)</div><div class='add'>+{</div><div class='add'>+	struct ppe_port_schedule_resource res;</div><div class='add'>+</div><div class='add'>+	/* The reserved resource with the maximum port ID of PPE is</div><div class='add'>+	 * also allowed to be acquired.</div><div class='add'>+	 */</div><div class='add'>+	if (port &gt; ppe_dev-&gt;num_ports)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	res = ppe_scheduler_res[port];</div><div class='add'>+	switch (type) {</div><div class='add'>+	case PPE_RES_UCAST:</div><div class='add'>+		*res_start = res.ucastq_start;</div><div class='add'>+		*res_end = res.ucastq_end;</div><div class='add'>+		break;</div><div class='add'>+	case PPE_RES_MCAST:</div><div class='add'>+		*res_start = res.mcastq_start;</div><div class='add'>+		*res_end = res.mcastq_end;</div><div class='add'>+		break;</div><div class='add'>+	case PPE_RES_FLOW_ID:</div><div class='add'>+		*res_start = res.flow_id_start;</div><div class='add'>+		*res_end = res.flow_id_end;</div><div class='add'>+		break;</div><div class='add'>+	case PPE_RES_L0_NODE:</div><div class='add'>+		*res_start = res.l0node_start;</div><div class='add'>+		*res_end = res.l0node_end;</div><div class='add'>+		break;</div><div class='add'>+	case PPE_RES_L1_NODE:</div><div class='add'>+		*res_start = res.l1node_start;</div><div class='add'>+		*res_end = res.l1node_end;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ppe_sc_config_set - Set PPE service code configuration</div><div class='add'>+ * @ppe_dev: PPE device</div><div class='add'>+ * @sc: Service ID, 0-255 supported by PPE</div><div class='add'>+ * @cfg: Service code configuration</div><div class='add'>+ *</div><div class='add'>+ * PPE service code is used by the PPE during its packet processing stages,</div><div class='add'>+ * to perform or bypass certain selected packet operations on the packet.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ppe_sc_config_set(struct ppe_device *ppe_dev, int sc, struct ppe_sc_cfg cfg)</div><div class='add'>+{</div><div class='add'>+	u32 val, reg, servcode_val[2] = {};</div><div class='add'>+	unsigned long bitmap_value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PPE_IN_L2_SERVICE_TBL_DST_PORT_ID_VALID, cfg.dest_port_valid);</div><div class='add'>+	val |= FIELD_PREP(PPE_IN_L2_SERVICE_TBL_DST_PORT_ID, cfg.dest_port);</div><div class='add'>+	val |= FIELD_PREP(PPE_IN_L2_SERVICE_TBL_DST_DIRECTION, cfg.is_src);</div><div class='add'>+</div><div class='add'>+	bitmap_value = bitmap_read(cfg.bitmaps.egress, 0, PPE_SC_BYPASS_EGRESS_SIZE);</div><div class='add'>+	val |= FIELD_PREP(PPE_IN_L2_SERVICE_TBL_DST_BYPASS_BITMAP, bitmap_value);</div><div class='add'>+	val |= FIELD_PREP(PPE_IN_L2_SERVICE_TBL_RX_CNT_EN,</div><div class='add'>+			  test_bit(PPE_SC_BYPASS_COUNTER_RX, cfg.bitmaps.counter));</div><div class='add'>+	val |= FIELD_PREP(PPE_IN_L2_SERVICE_TBL_TX_CNT_EN,</div><div class='add'>+			  test_bit(PPE_SC_BYPASS_COUNTER_TX, cfg.bitmaps.counter));</div><div class='add'>+	reg = PPE_IN_L2_SERVICE_TBL_ADDR + PPE_IN_L2_SERVICE_TBL_INC * sc;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	bitmap_value = bitmap_read(cfg.bitmaps.ingress, 0, PPE_SC_BYPASS_INGRESS_SIZE);</div><div class='add'>+	PPE_SERVICE_SET_BYPASS_BITMAP(servcode_val, bitmap_value);</div><div class='add'>+	PPE_SERVICE_SET_RX_CNT_EN(servcode_val,</div><div class='add'>+				  test_bit(PPE_SC_BYPASS_COUNTER_RX_VLAN, cfg.bitmaps.counter));</div><div class='add'>+	reg = PPE_SERVICE_TBL_ADDR + PPE_SERVICE_TBL_INC * sc;</div><div class='add'>+</div><div class='add'>+	ret = regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				servcode_val, ARRAY_SIZE(servcode_val));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_EG_SERVICE_TBL_ADDR + PPE_EG_SERVICE_TBL_INC * sc;</div><div class='add'>+	ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+			       servcode_val, ARRAY_SIZE(servcode_val));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	PPE_EG_SERVICE_SET_NEXT_SERVCODE(servcode_val, cfg.next_service_code);</div><div class='add'>+	PPE_EG_SERVICE_SET_UPDATE_ACTION(servcode_val, cfg.eip_field_update_bitmap);</div><div class='add'>+	PPE_EG_SERVICE_SET_HW_SERVICE(servcode_val, cfg.eip_hw_service);</div><div class='add'>+	PPE_EG_SERVICE_SET_OFFSET_SEL(servcode_val, cfg.eip_offset_sel);</div><div class='add'>+	PPE_EG_SERVICE_SET_TX_CNT_EN(servcode_val,</div><div class='add'>+				     test_bit(PPE_SC_BYPASS_COUNTER_TX_VLAN, cfg.bitmaps.counter));</div><div class='add'>+</div><div class='add'>+	ret = regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				servcode_val, ARRAY_SIZE(servcode_val));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	bitmap_value = bitmap_read(cfg.bitmaps.tunnel, 0, PPE_SC_BYPASS_TUNNEL_SIZE);</div><div class='add'>+	val = FIELD_PREP(PPE_TL_SERVICE_TBL_BYPASS_BITMAP, bitmap_value);</div><div class='add'>+	reg = PPE_TL_SERVICE_TBL_ADDR + PPE_TL_SERVICE_TBL_INC * sc;</div><div class='add'>+</div><div class='add'>+	return regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ppe_counter_enable_set - Set PPE port counter enabled</div><div class='add'>+ * @ppe_dev: PPE device</div><div class='add'>+ * @port: PPE port ID</div><div class='add'>+ *</div><div class='add'>+ * Enable PPE counters on the given port for the unicast packet, multicast</div><div class='add'>+ * packet and VLAN packet received and transmitted by PPE.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ppe_counter_enable_set(struct ppe_device *ppe_dev, int port)</div><div class='add'>+{</div><div class='add'>+	u32 reg, mru_mtu_val[3];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_MRU_MTU_CTRL_TBL_ADDR + PPE_MRU_MTU_CTRL_TBL_INC * port;</div><div class='add'>+	ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+			       mru_mtu_val, ARRAY_SIZE(mru_mtu_val));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	PPE_MRU_MTU_CTRL_SET_RX_CNT_EN(mru_mtu_val, true);</div><div class='add'>+	PPE_MRU_MTU_CTRL_SET_TX_CNT_EN(mru_mtu_val, true);</div><div class='add'>+	ret = regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				mru_mtu_val, ARRAY_SIZE(mru_mtu_val));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_MC_MTU_CTRL_TBL_ADDR + PPE_MC_MTU_CTRL_TBL_INC * port;</div><div class='add'>+	ret = regmap_set_bits(ppe_dev-&gt;regmap, reg, PPE_MC_MTU_CTRL_TBL_TX_CNT_EN);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_PORT_EG_VLAN_TBL_ADDR + PPE_PORT_EG_VLAN_TBL_INC * port;</div><div class='add'>+</div><div class='add'>+	return regmap_set_bits(ppe_dev-&gt;regmap, reg, PPE_PORT_EG_VLAN_TBL_TX_COUNTING_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ppe_rss_hash_ipv4_config(struct ppe_device *ppe_dev, int index,</div><div class='add'>+				    struct ppe_rss_hash_cfg cfg)</div><div class='add'>+{</div><div class='add'>+	u32 reg, val;</div><div class='add'>+</div><div class='add'>+	switch (index) {</div><div class='add'>+	case 0:</div><div class='add'>+		val = cfg.hash_sip_mix[0];</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		val = cfg.hash_dip_mix[0];</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		val = cfg.hash_protocol_mix;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		val = cfg.hash_dport_mix;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		val = cfg.hash_sport_mix;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = PPE_RSS_HASH_MIX_IPV4_ADDR + index * PPE_RSS_HASH_MIX_IPV4_INC;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				  PPE_RSS_HASH_MIX_IPV4_VAL,</div><div class='add'>+				  FIELD_PREP(PPE_RSS_HASH_MIX_IPV4_VAL, val));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ppe_rss_hash_ipv6_config(struct ppe_device *ppe_dev, int index,</div><div class='add'>+				    struct ppe_rss_hash_cfg cfg)</div><div class='add'>+{</div><div class='add'>+	u32 reg, val;</div><div class='add'>+</div><div class='add'>+	switch (index) {</div><div class='add'>+	case 0 ... 3:</div><div class='add'>+		val = cfg.hash_sip_mix[index];</div><div class='add'>+		break;</div><div class='add'>+	case 4 ... 7:</div><div class='add'>+		val = cfg.hash_dip_mix[index - 4];</div><div class='add'>+		break;</div><div class='add'>+	case 8:</div><div class='add'>+		val = cfg.hash_protocol_mix;</div><div class='add'>+		break;</div><div class='add'>+	case 9:</div><div class='add'>+		val = cfg.hash_dport_mix;</div><div class='add'>+		break;</div><div class='add'>+	case 10:</div><div class='add'>+		val = cfg.hash_sport_mix;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = PPE_RSS_HASH_MIX_ADDR + index * PPE_RSS_HASH_MIX_INC;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				  PPE_RSS_HASH_MIX_VAL,</div><div class='add'>+				  FIELD_PREP(PPE_RSS_HASH_MIX_VAL, val));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ppe_rss_hash_config_set - Configure the PPE hash settings for the packet received.</div><div class='add'>+ * @ppe_dev: PPE device.</div><div class='add'>+ * @mode: Configure RSS hash for the packet type IPv4 and IPv6.</div><div class='add'>+ * @cfg: RSS hash configuration.</div><div class='add'>+ *</div><div class='add'>+ * PPE RSS hash settings are configured for the packet type IPv4 and IPv6.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ppe_rss_hash_config_set(struct ppe_device *ppe_dev, int mode,</div><div class='add'>+			    struct ppe_rss_hash_cfg cfg)</div><div class='add'>+{</div><div class='add'>+	u32 val, reg;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	if (mode &amp; PPE_RSS_HASH_MODE_IPV4) {</div><div class='add'>+		val = FIELD_PREP(PPE_RSS_HASH_MASK_IPV4_HASH_MASK, cfg.hash_mask);</div><div class='add'>+		val |= FIELD_PREP(PPE_RSS_HASH_MASK_IPV4_FRAGMENT, cfg.hash_fragment_mode);</div><div class='add'>+		ret = regmap_write(ppe_dev-&gt;regmap, PPE_RSS_HASH_MASK_IPV4_ADDR, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		val = FIELD_PREP(PPE_RSS_HASH_SEED_IPV4_VAL, cfg.hash_seed);</div><div class='add'>+		ret = regmap_write(ppe_dev-&gt;regmap, PPE_RSS_HASH_SEED_IPV4_ADDR, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; PPE_RSS_HASH_MIX_IPV4_ENTRIES; i++) {</div><div class='add'>+			ret = ppe_rss_hash_ipv4_config(ppe_dev, i, cfg);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; PPE_RSS_HASH_FIN_IPV4_ENTRIES; i++) {</div><div class='add'>+			val = FIELD_PREP(PPE_RSS_HASH_FIN_IPV4_INNER, cfg.hash_fin_inner[i]);</div><div class='add'>+			val |= FIELD_PREP(PPE_RSS_HASH_FIN_IPV4_OUTER, cfg.hash_fin_outer[i]);</div><div class='add'>+			reg = PPE_RSS_HASH_FIN_IPV4_ADDR + i * PPE_RSS_HASH_FIN_IPV4_INC;</div><div class='add'>+</div><div class='add'>+			ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mode &amp; PPE_RSS_HASH_MODE_IPV6) {</div><div class='add'>+		val = FIELD_PREP(PPE_RSS_HASH_MASK_HASH_MASK, cfg.hash_mask);</div><div class='add'>+		val |= FIELD_PREP(PPE_RSS_HASH_MASK_FRAGMENT, cfg.hash_fragment_mode);</div><div class='add'>+		ret = regmap_write(ppe_dev-&gt;regmap, PPE_RSS_HASH_MASK_ADDR, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		val = FIELD_PREP(PPE_RSS_HASH_SEED_VAL, cfg.hash_seed);</div><div class='add'>+		ret = regmap_write(ppe_dev-&gt;regmap, PPE_RSS_HASH_SEED_ADDR, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; PPE_RSS_HASH_MIX_ENTRIES; i++) {</div><div class='add'>+			ret = ppe_rss_hash_ipv6_config(ppe_dev, i, cfg);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; PPE_RSS_HASH_FIN_ENTRIES; i++) {</div><div class='add'>+			val = FIELD_PREP(PPE_RSS_HASH_FIN_INNER, cfg.hash_fin_inner[i]);</div><div class='add'>+			val |= FIELD_PREP(PPE_RSS_HASH_FIN_OUTER, cfg.hash_fin_outer[i]);</div><div class='add'>+			reg = PPE_RSS_HASH_FIN_ADDR + i * PPE_RSS_HASH_FIN_INC;</div><div class='add'>+</div><div class='add'>+			ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ppe_ring_queue_map_set - Set the PPE queue to Ethernet DMA ring mapping</div><div class='add'>+ * @ppe_dev: PPE device</div><div class='add'>+ * @ring_id: Ethernet DMA ring ID</div><div class='add'>+ * @queue_map: Bit map of queue IDs to given Ethernet DMA ring</div><div class='add'>+ *</div><div class='add'>+ * Configure the mapping from a set of PPE queues to a given Ethernet DMA ring.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ppe_ring_queue_map_set(struct ppe_device *ppe_dev, int ring_id, u32 *queue_map)</div><div class='add'>+{</div><div class='add'>+	u32 reg, queue_bitmap_val[PPE_RING_TO_QUEUE_BITMAP_WORD_CNT];</div><div class='add'>+</div><div class='add'>+	memcpy(queue_bitmap_val, queue_map, sizeof(queue_bitmap_val));</div><div class='add'>+	reg = PPE_RING_Q_MAP_TBL_ADDR + PPE_RING_Q_MAP_TBL_INC * ring_id;</div><div class='add'>+</div><div class='add'>+	return regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				 queue_bitmap_val,</div><div class='add'>+				 ARRAY_SIZE(queue_bitmap_val));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ppe_config_bm_threshold(struct ppe_device *ppe_dev, int bm_port_id,</div><div class='add'>+				   const struct ppe_bm_port_config port_cfg)</div><div class='add'>+{</div><div class='add'>+	u32 reg, val, bm_fc_val[2];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reg = PPE_BM_PORT_FC_CFG_TBL_ADDR + PPE_BM_PORT_FC_CFG_TBL_INC * bm_port_id;</div><div class='add'>+	ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+			       bm_fc_val, ARRAY_SIZE(bm_fc_val));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Configure BM flow control related threshold. */</div><div class='add'>+	PPE_BM_PORT_FC_SET_WEIGHT(bm_fc_val, port_cfg.weight);</div><div class='add'>+	PPE_BM_PORT_FC_SET_RESUME_OFFSET(bm_fc_val, port_cfg.resume_offset);</div><div class='add'>+	PPE_BM_PORT_FC_SET_RESUME_THRESHOLD(bm_fc_val, port_cfg.resume_ceil);</div><div class='add'>+	PPE_BM_PORT_FC_SET_DYNAMIC(bm_fc_val, port_cfg.dynamic);</div><div class='add'>+	PPE_BM_PORT_FC_SET_REACT_LIMIT(bm_fc_val, port_cfg.in_fly_buf);</div><div class='add'>+	PPE_BM_PORT_FC_SET_PRE_ALLOC(bm_fc_val, port_cfg.pre_alloc);</div><div class='add'>+</div><div class='add'>+	/* Configure low/high bits of the ceiling for the BM port. */</div><div class='add'>+	val = FIELD_GET(GENMASK(2, 0), port_cfg.ceil);</div><div class='add'>+	PPE_BM_PORT_FC_SET_CEILING_LOW(bm_fc_val, val);</div><div class='add'>+	val = FIELD_GET(GENMASK(10, 3), port_cfg.ceil);</div><div class='add'>+	PPE_BM_PORT_FC_SET_CEILING_HIGH(bm_fc_val, val);</div><div class='add'>+</div><div class='add'>+	ret = regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				bm_fc_val, ARRAY_SIZE(bm_fc_val));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Assign the default group ID 0 to the BM port. */</div><div class='add'>+	val = FIELD_PREP(PPE_BM_PORT_GROUP_ID_SHARED_GROUP_ID, 0);</div><div class='add'>+	reg = PPE_BM_PORT_GROUP_ID_ADDR + PPE_BM_PORT_GROUP_ID_INC * bm_port_id;</div><div class='add'>+	ret = regmap_update_bits(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				 PPE_BM_PORT_GROUP_ID_SHARED_GROUP_ID,</div><div class='add'>+				 val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Enable BM port flow control. */</div><div class='add'>+	reg = PPE_BM_PORT_FC_MODE_ADDR + PPE_BM_PORT_FC_MODE_INC * bm_port_id;</div><div class='add'>+</div><div class='add'>+	return regmap_set_bits(ppe_dev-&gt;regmap, reg, PPE_BM_PORT_FC_MODE_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure the buffer threshold for the port flow control function. */</div><div class='add'>+static int ppe_config_bm(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	const struct ppe_bm_port_config *port_cfg;</div><div class='add'>+	unsigned int i, bm_port_id, port_cfg_cnt;</div><div class='add'>+	u32 reg, val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Configure the allocated buffer number only for group 0.</div><div class='add'>+	 * The buffer number of group 1-3 is already cleared to 0</div><div class='add'>+	 * after PPE reset during the probe of PPE driver.</div><div class='add'>+	 */</div><div class='add'>+	reg = PPE_BM_SHARED_GROUP_CFG_ADDR;</div><div class='add'>+	val = FIELD_PREP(PPE_BM_SHARED_GROUP_CFG_SHARED_LIMIT,</div><div class='add'>+			 ipq9574_ppe_bm_group_config);</div><div class='add'>+	ret = regmap_update_bits(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				 PPE_BM_SHARED_GROUP_CFG_SHARED_LIMIT,</div><div class='add'>+				 val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto bm_config_fail;</div><div class='add'>+</div><div class='add'>+	/* Configure buffer thresholds for the BM ports. */</div><div class='add'>+	port_cfg = ipq9574_ppe_bm_port_config;</div><div class='add'>+	port_cfg_cnt = ARRAY_SIZE(ipq9574_ppe_bm_port_config);</div><div class='add'>+	for (i = 0; i &lt; port_cfg_cnt; i++) {</div><div class='add'>+		for (bm_port_id = port_cfg[i].port_id_start;</div><div class='add'>+		     bm_port_id &lt;= port_cfg[i].port_id_end; bm_port_id++) {</div><div class='add'>+			ret = ppe_config_bm_threshold(ppe_dev, bm_port_id,</div><div class='add'>+						      port_cfg[i]);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto bm_config_fail;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+bm_config_fail:</div><div class='add'>+	dev_err(ppe_dev-&gt;dev, "PPE BM config error %d\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure PPE hardware queue depth, which is decided by the threshold</div><div class='add'>+ * of queue.</div><div class='add'>+ */</div><div class='add'>+static int ppe_config_qm(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	const struct ppe_qm_queue_config *queue_cfg;</div><div class='add'>+	int ret, i, queue_id, queue_cfg_count;</div><div class='add'>+	u32 reg, multicast_queue_cfg[5];</div><div class='add'>+	u32 unicast_queue_cfg[4];</div><div class='add'>+	u32 group_cfg[3];</div><div class='add'>+</div><div class='add'>+	/* Assign the buffer number to the group 0 by default. */</div><div class='add'>+	reg = PPE_AC_GRP_CFG_TBL_ADDR;</div><div class='add'>+	ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+			       group_cfg, ARRAY_SIZE(group_cfg));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto qm_config_fail;</div><div class='add'>+</div><div class='add'>+	PPE_AC_GRP_SET_BUF_LIMIT(group_cfg, ipq9574_ppe_qm_group_config);</div><div class='add'>+</div><div class='add'>+	ret = regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				group_cfg, ARRAY_SIZE(group_cfg));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto qm_config_fail;</div><div class='add'>+</div><div class='add'>+	queue_cfg = ipq9574_ppe_qm_queue_config;</div><div class='add'>+	queue_cfg_count = ARRAY_SIZE(ipq9574_ppe_qm_queue_config);</div><div class='add'>+	for (i = 0; i &lt; queue_cfg_count; i++) {</div><div class='add'>+		queue_id = queue_cfg[i].queue_start;</div><div class='add'>+</div><div class='add'>+		/* Configure threshold for dropping packets separately for</div><div class='add'>+		 * unicast and multicast PPE queues.</div><div class='add'>+		 */</div><div class='add'>+		while (queue_id &lt;= queue_cfg[i].queue_end) {</div><div class='add'>+			if (queue_id &lt; PPE_AC_UNICAST_QUEUE_CFG_TBL_ENTRIES) {</div><div class='add'>+				reg = PPE_AC_UNICAST_QUEUE_CFG_TBL_ADDR +</div><div class='add'>+				      PPE_AC_UNICAST_QUEUE_CFG_TBL_INC * queue_id;</div><div class='add'>+</div><div class='add'>+				ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+						       unicast_queue_cfg,</div><div class='add'>+						       ARRAY_SIZE(unicast_queue_cfg));</div><div class='add'>+				if (ret)</div><div class='add'>+					goto qm_config_fail;</div><div class='add'>+</div><div class='add'>+				PPE_AC_UNICAST_QUEUE_SET_EN(unicast_queue_cfg, true);</div><div class='add'>+				PPE_AC_UNICAST_QUEUE_SET_GRP_ID(unicast_queue_cfg, 0);</div><div class='add'>+				PPE_AC_UNICAST_QUEUE_SET_PRE_LIMIT(unicast_queue_cfg,</div><div class='add'>+								   queue_cfg[i].prealloc_buf);</div><div class='add'>+				PPE_AC_UNICAST_QUEUE_SET_DYNAMIC(unicast_queue_cfg,</div><div class='add'>+								 queue_cfg[i].dynamic);</div><div class='add'>+				PPE_AC_UNICAST_QUEUE_SET_WEIGHT(unicast_queue_cfg,</div><div class='add'>+								queue_cfg[i].weight);</div><div class='add'>+				PPE_AC_UNICAST_QUEUE_SET_THRESHOLD(unicast_queue_cfg,</div><div class='add'>+								   queue_cfg[i].ceil);</div><div class='add'>+				PPE_AC_UNICAST_QUEUE_SET_GRN_RESUME(unicast_queue_cfg,</div><div class='add'>+								    queue_cfg[i].resume_offset);</div><div class='add'>+</div><div class='add'>+				ret = regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+							unicast_queue_cfg,</div><div class='add'>+							ARRAY_SIZE(unicast_queue_cfg));</div><div class='add'>+				if (ret)</div><div class='add'>+					goto qm_config_fail;</div><div class='add'>+			} else {</div><div class='add'>+				reg = PPE_AC_MULTICAST_QUEUE_CFG_TBL_ADDR +</div><div class='add'>+				      PPE_AC_MULTICAST_QUEUE_CFG_TBL_INC * queue_id;</div><div class='add'>+</div><div class='add'>+				ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+						       multicast_queue_cfg,</div><div class='add'>+						       ARRAY_SIZE(multicast_queue_cfg));</div><div class='add'>+				if (ret)</div><div class='add'>+					goto qm_config_fail;</div><div class='add'>+</div><div class='add'>+				PPE_AC_MULTICAST_QUEUE_SET_EN(multicast_queue_cfg, true);</div><div class='add'>+				PPE_AC_MULTICAST_QUEUE_SET_GRN_GRP_ID(multicast_queue_cfg, 0);</div><div class='add'>+				PPE_AC_MULTICAST_QUEUE_SET_GRN_PRE_LIMIT(multicast_queue_cfg,</div><div class='add'>+									 queue_cfg[i].prealloc_buf);</div><div class='add'>+				PPE_AC_MULTICAST_QUEUE_SET_GRN_THRESHOLD(multicast_queue_cfg,</div><div class='add'>+									 queue_cfg[i].ceil);</div><div class='add'>+				PPE_AC_MULTICAST_QUEUE_SET_GRN_RESUME(multicast_queue_cfg,</div><div class='add'>+								      queue_cfg[i].resume_offset);</div><div class='add'>+</div><div class='add'>+				ret = regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+							multicast_queue_cfg,</div><div class='add'>+							ARRAY_SIZE(multicast_queue_cfg));</div><div class='add'>+				if (ret)</div><div class='add'>+					goto qm_config_fail;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Enable enqueue. */</div><div class='add'>+			reg = PPE_ENQ_OPR_TBL_ADDR + PPE_ENQ_OPR_TBL_INC * queue_id;</div><div class='add'>+			ret = regmap_clear_bits(ppe_dev-&gt;regmap, reg,</div><div class='add'>+						PPE_ENQ_OPR_TBL_ENQ_DISABLE);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto qm_config_fail;</div><div class='add'>+</div><div class='add'>+			/* Enable dequeue. */</div><div class='add'>+			reg = PPE_DEQ_OPR_TBL_ADDR + PPE_DEQ_OPR_TBL_INC * queue_id;</div><div class='add'>+			ret = regmap_clear_bits(ppe_dev-&gt;regmap, reg,</div><div class='add'>+						PPE_DEQ_OPR_TBL_DEQ_DISABLE);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto qm_config_fail;</div><div class='add'>+</div><div class='add'>+			queue_id++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable queue counter for all PPE hardware queues. */</div><div class='add'>+	ret = regmap_set_bits(ppe_dev-&gt;regmap, PPE_EG_BRIDGE_CONFIG_ADDR,</div><div class='add'>+			      PPE_EG_BRIDGE_CONFIG_QUEUE_CNT_EN);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto qm_config_fail;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+qm_config_fail:</div><div class='add'>+	dev_err(ppe_dev-&gt;dev, "PPE QM config error %d\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ppe_node_scheduler_config(struct ppe_device *ppe_dev,</div><div class='add'>+				     const struct ppe_scheduler_port_config config)</div><div class='add'>+{</div><div class='add'>+	struct ppe_scheduler_cfg sch_cfg;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; config.loop_num; i++) {</div><div class='add'>+		if (!config.pri_max) {</div><div class='add'>+			/* Round robin scheduler without priority. */</div><div class='add'>+			sch_cfg.flow_id = config.flow_id;</div><div class='add'>+			sch_cfg.pri = 0;</div><div class='add'>+			sch_cfg.drr_node_id = config.drr_node_id;</div><div class='add'>+		} else {</div><div class='add'>+			sch_cfg.flow_id = config.flow_id + (i / config.pri_max);</div><div class='add'>+			sch_cfg.pri = i % config.pri_max;</div><div class='add'>+			sch_cfg.drr_node_id = config.drr_node_id + i;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Scheduler weight, must be more than 0. */</div><div class='add'>+		sch_cfg.drr_node_wt = 1;</div><div class='add'>+		/* Byte based to be scheduled. */</div><div class='add'>+		sch_cfg.unit_is_packet = false;</div><div class='add'>+		/* Frame + CRC calculated. */</div><div class='add'>+		sch_cfg.frame_mode = PPE_SCH_WITH_FRAME_CRC;</div><div class='add'>+</div><div class='add'>+		ret = ppe_queue_scheduler_set(ppe_dev, config.node_id + i,</div><div class='add'>+					      config.flow_level,</div><div class='add'>+					      config.port,</div><div class='add'>+					      sch_cfg);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Initialize scheduler settings for PPE buffer utilization and dispatching</div><div class='add'>+ * packet on PPE queue.</div><div class='add'>+ */</div><div class='add'>+static int ppe_config_scheduler(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	const struct ppe_scheduler_port_config *port_cfg;</div><div class='add'>+	const struct ppe_scheduler_qm_config *qm_cfg;</div><div class='add'>+	const struct ppe_scheduler_bm_config *bm_cfg;</div><div class='add'>+	int ret, i, count;</div><div class='add'>+	u32 val, reg;</div><div class='add'>+</div><div class='add'>+	count = ARRAY_SIZE(ipq9574_ppe_sch_bm_config);</div><div class='add'>+	bm_cfg = ipq9574_ppe_sch_bm_config;</div><div class='add'>+</div><div class='add'>+	/* Configure the depth of BM scheduler entries. */</div><div class='add'>+	val = FIELD_PREP(PPE_BM_SCH_CTRL_SCH_DEPTH, count);</div><div class='add'>+	val |= FIELD_PREP(PPE_BM_SCH_CTRL_SCH_OFFSET, 0);</div><div class='add'>+	val |= FIELD_PREP(PPE_BM_SCH_CTRL_SCH_EN, 1);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, PPE_BM_SCH_CTRL_ADDR, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto sch_config_fail;</div><div class='add'>+</div><div class='add'>+	/* Configure each BM scheduler entry with the valid ingress port and</div><div class='add'>+	 * egress port, the second port takes effect when the specified port</div><div class='add'>+	 * is in the inactive state.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		val = FIELD_PREP(PPE_BM_SCH_CFG_TBL_VALID, bm_cfg[i].valid);</div><div class='add'>+		val |= FIELD_PREP(PPE_BM_SCH_CFG_TBL_DIR, bm_cfg[i].dir);</div><div class='add'>+		val |= FIELD_PREP(PPE_BM_SCH_CFG_TBL_PORT_NUM, bm_cfg[i].port);</div><div class='add'>+		val |= FIELD_PREP(PPE_BM_SCH_CFG_TBL_SECOND_PORT_VALID,</div><div class='add'>+				  bm_cfg[i].backup_port_valid);</div><div class='add'>+		val |= FIELD_PREP(PPE_BM_SCH_CFG_TBL_SECOND_PORT,</div><div class='add'>+				  bm_cfg[i].backup_port);</div><div class='add'>+</div><div class='add'>+		reg = PPE_BM_SCH_CFG_TBL_ADDR + i * PPE_BM_SCH_CFG_TBL_INC;</div><div class='add'>+		ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto sch_config_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	count = ARRAY_SIZE(ipq9574_ppe_sch_qm_config);</div><div class='add'>+	qm_cfg = ipq9574_ppe_sch_qm_config;</div><div class='add'>+</div><div class='add'>+	/* Configure the depth of QM scheduler entries. */</div><div class='add'>+	val = FIELD_PREP(PPE_PSCH_SCH_DEPTH_CFG_SCH_DEPTH, count);</div><div class='add'>+	ret = regmap_write(ppe_dev-&gt;regmap, PPE_PSCH_SCH_DEPTH_CFG_ADDR, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto sch_config_fail;</div><div class='add'>+</div><div class='add'>+	/* Configure each QM scheduler entry with enqueue port and dequeue</div><div class='add'>+	 * port, the second port takes effect when the specified dequeue</div><div class='add'>+	 * port is in the inactive port.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		val = FIELD_PREP(PPE_PSCH_SCH_CFG_TBL_ENS_PORT_BITMAP,</div><div class='add'>+				 qm_cfg[i].ensch_port_bmp);</div><div class='add'>+		val |= FIELD_PREP(PPE_PSCH_SCH_CFG_TBL_ENS_PORT,</div><div class='add'>+				  qm_cfg[i].ensch_port);</div><div class='add'>+		val |= FIELD_PREP(PPE_PSCH_SCH_CFG_TBL_DES_PORT,</div><div class='add'>+				  qm_cfg[i].desch_port);</div><div class='add'>+		val |= FIELD_PREP(PPE_PSCH_SCH_CFG_TBL_DES_SECOND_PORT_EN,</div><div class='add'>+				  qm_cfg[i].desch_backup_port_valid);</div><div class='add'>+		val |= FIELD_PREP(PPE_PSCH_SCH_CFG_TBL_DES_SECOND_PORT,</div><div class='add'>+				  qm_cfg[i].desch_backup_port);</div><div class='add'>+</div><div class='add'>+		reg = PPE_PSCH_SCH_CFG_TBL_ADDR + i * PPE_PSCH_SCH_CFG_TBL_INC;</div><div class='add'>+		ret = regmap_write(ppe_dev-&gt;regmap, reg, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto sch_config_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	count = ARRAY_SIZE(ppe_port_sch_config);</div><div class='add'>+	port_cfg = ppe_port_sch_config;</div><div class='add'>+</div><div class='add'>+	/* Configure scheduler per PPE queue or flow. */</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		if (port_cfg[i].port &gt;= ppe_dev-&gt;num_ports)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		ret = ppe_node_scheduler_config(ppe_dev, port_cfg[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto sch_config_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+sch_config_fail:</div><div class='add'>+	dev_err(ppe_dev-&gt;dev, "PPE scheduler arbitration config error %d\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Configure PPE queue destination of each PPE port. */</div><div class='add'>+static int ppe_queue_dest_init(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	int ret, port_id, index, q_base, q_offset, res_start, res_end, pri_max;</div><div class='add'>+	struct ppe_queue_ucast_dest queue_dst;</div><div class='add'>+</div><div class='add'>+	for (port_id = 0; port_id &lt; ppe_dev-&gt;num_ports; port_id++) {</div><div class='add'>+		memset(&amp;queue_dst, 0, sizeof(queue_dst));</div><div class='add'>+</div><div class='add'>+		ret = ppe_port_resource_get(ppe_dev, port_id, PPE_RES_UCAST,</div><div class='add'>+					    &amp;res_start, &amp;res_end);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		q_base = res_start;</div><div class='add'>+		queue_dst.dest_port = port_id;</div><div class='add'>+</div><div class='add'>+		/* Configure queue base ID and profile ID that is same as</div><div class='add'>+		 * physical port ID.</div><div class='add'>+		 */</div><div class='add'>+		ret = ppe_queue_ucast_base_set(ppe_dev, queue_dst,</div><div class='add'>+					       q_base, port_id);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Queue priority range supported by each PPE port */</div><div class='add'>+		ret = ppe_port_resource_get(ppe_dev, port_id, PPE_RES_L0_NODE,</div><div class='add'>+					    &amp;res_start, &amp;res_end);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		pri_max = res_end - res_start;</div><div class='add'>+</div><div class='add'>+		/* Redirect ARP reply packet with the max priority on CPU port,</div><div class='add'>+		 * which keeps the ARP reply directed to CPU (CPU code is 101)</div><div class='add'>+		 * with highest priority queue of EDMA.</div><div class='add'>+		 */</div><div class='add'>+		if (port_id == 0) {</div><div class='add'>+			memset(&amp;queue_dst, 0, sizeof(queue_dst));</div><div class='add'>+</div><div class='add'>+			queue_dst.cpu_code_en = true;</div><div class='add'>+			queue_dst.cpu_code = 101;</div><div class='add'>+			ret = ppe_queue_ucast_base_set(ppe_dev, queue_dst,</div><div class='add'>+						       q_base + pri_max,</div><div class='add'>+						       0);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Initialize the queue offset of internal priority. */</div><div class='add'>+		for (index = 0; index &lt; PPE_QUEUE_INTER_PRI_NUM; index++) {</div><div class='add'>+			q_offset = index &gt; pri_max ? pri_max : index;</div><div class='add'>+</div><div class='add'>+			ret = ppe_queue_ucast_offset_pri_set(ppe_dev, port_id,</div><div class='add'>+							     index, q_offset);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Initialize the queue offset of RSS hash as 0 to avoid the</div><div class='add'>+		 * random hardware value that will lead to the unexpected</div><div class='add'>+		 * destination queue generated.</div><div class='add'>+		 */</div><div class='add'>+		for (index = 0; index &lt; PPE_QUEUE_HASH_NUM; index++) {</div><div class='add'>+			ret = ppe_queue_ucast_offset_hash_set(ppe_dev, port_id,</div><div class='add'>+							      index, 0);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Initialize the service code 1 used by CPU port. */</div><div class='add'>+static int ppe_servcode_init(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	struct ppe_sc_cfg sc_cfg = {};</div><div class='add'>+</div><div class='add'>+	bitmap_zero(sc_cfg.bitmaps.counter, PPE_SC_BYPASS_COUNTER_SIZE);</div><div class='add'>+	bitmap_zero(sc_cfg.bitmaps.tunnel, PPE_SC_BYPASS_TUNNEL_SIZE);</div><div class='add'>+</div><div class='add'>+	bitmap_fill(sc_cfg.bitmaps.ingress, PPE_SC_BYPASS_INGRESS_SIZE);</div><div class='add'>+	clear_bit(PPE_SC_BYPASS_INGRESS_FAKE_MAC_HEADER, sc_cfg.bitmaps.ingress);</div><div class='add'>+	clear_bit(PPE_SC_BYPASS_INGRESS_SERVICE_CODE, sc_cfg.bitmaps.ingress);</div><div class='add'>+	clear_bit(PPE_SC_BYPASS_INGRESS_FAKE_L2_PROTO, sc_cfg.bitmaps.ingress);</div><div class='add'>+</div><div class='add'>+	bitmap_fill(sc_cfg.bitmaps.egress, PPE_SC_BYPASS_EGRESS_SIZE);</div><div class='add'>+	clear_bit(PPE_SC_BYPASS_EGRESS_ACL_POST_ROUTING_CHECK, sc_cfg.bitmaps.egress);</div><div class='add'>+</div><div class='add'>+	return ppe_sc_config_set(ppe_dev, PPE_EDMA_SC_BYPASS_ID, sc_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Initialize PPE port configurations. */</div><div class='add'>+static int ppe_port_config_init(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	u32 reg, val, mru_mtu_val[3];</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	/* MTU and MRU settings are not required for CPU port 0. */</div><div class='add'>+	for (i = 1; i &lt; ppe_dev-&gt;num_ports; i++) {</div><div class='add'>+		/* Enable Ethernet port counter */</div><div class='add'>+		ret = ppe_counter_enable_set(ppe_dev, i);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		reg = PPE_MRU_MTU_CTRL_TBL_ADDR + PPE_MRU_MTU_CTRL_TBL_INC * i;</div><div class='add'>+		ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				       mru_mtu_val, ARRAY_SIZE(mru_mtu_val));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Drop the packet when the packet size is more than the MTU</div><div class='add'>+		 * and redirect the packet to the CPU port when the received</div><div class='add'>+		 * packet size is more than the MRU of the physical interface.</div><div class='add'>+		 */</div><div class='add'>+		PPE_MRU_MTU_CTRL_SET_MRU_CMD(mru_mtu_val, PPE_ACTION_REDIRECT_TO_CPU);</div><div class='add'>+		PPE_MRU_MTU_CTRL_SET_MTU_CMD(mru_mtu_val, PPE_ACTION_DROP);</div><div class='add'>+		ret = regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+					mru_mtu_val, ARRAY_SIZE(mru_mtu_val));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		reg = PPE_MC_MTU_CTRL_TBL_ADDR + PPE_MC_MTU_CTRL_TBL_INC * i;</div><div class='add'>+		val = FIELD_PREP(PPE_MC_MTU_CTRL_TBL_MTU_CMD, PPE_ACTION_DROP);</div><div class='add'>+		ret = regmap_update_bits(ppe_dev-&gt;regmap, reg,</div><div class='add'>+					 PPE_MC_MTU_CTRL_TBL_MTU_CMD,</div><div class='add'>+					 val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable CPU port counters. */</div><div class='add'>+	return ppe_counter_enable_set(ppe_dev, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Initialize the PPE RSS configuration for IPv4 and IPv6 packet receive.</div><div class='add'>+ * RSS settings are to calculate the random RSS hash value generated during</div><div class='add'>+ * packet receive. This hash is then used to generate the queue offset used</div><div class='add'>+ * to determine the queue used to transmit the packet.</div><div class='add'>+ */</div><div class='add'>+static int ppe_rss_hash_init(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	u16 fins[PPE_RSS_HASH_TUPLES] = { 0x205, 0x264, 0x227, 0x245, 0x201 };</div><div class='add'>+	u8 ips[PPE_RSS_HASH_IP_LENGTH] = { 0x13, 0xb, 0x13, 0xb };</div><div class='add'>+	struct ppe_rss_hash_cfg hash_cfg;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	hash_cfg.hash_seed = get_random_u32();</div><div class='add'>+	hash_cfg.hash_mask = 0xfff;</div><div class='add'>+</div><div class='add'>+	/* Use 5 tuple as RSS hash key for the first fragment of TCP, UDP</div><div class='add'>+	 * and UDP-Lite packets.</div><div class='add'>+	 */</div><div class='add'>+	hash_cfg.hash_fragment_mode = false;</div><div class='add'>+</div><div class='add'>+	/* The final common seed configs used to calculate the RSS has value,</div><div class='add'>+	 * which is available for both IPv4 and IPv6 packet.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(fins); i++) {</div><div class='add'>+		hash_cfg.hash_fin_inner[i] = fins[i] &amp; 0x1f;</div><div class='add'>+		hash_cfg.hash_fin_outer[i] = fins[i] &gt;&gt; 5;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* RSS seeds for IP protocol, L4 destination &amp; source port and</div><div class='add'>+	 * destination &amp; source IP used to calculate the RSS hash value.</div><div class='add'>+	 */</div><div class='add'>+	hash_cfg.hash_protocol_mix = 0x13;</div><div class='add'>+	hash_cfg.hash_dport_mix = 0xb;</div><div class='add'>+	hash_cfg.hash_sport_mix = 0x13;</div><div class='add'>+	hash_cfg.hash_dip_mix[0] = 0xb;</div><div class='add'>+	hash_cfg.hash_sip_mix[0] = 0x13;</div><div class='add'>+</div><div class='add'>+	/* Configure RSS seed configs for IPv4 packet. */</div><div class='add'>+	ret = ppe_rss_hash_config_set(ppe_dev, PPE_RSS_HASH_MODE_IPV4, hash_cfg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ips); i++) {</div><div class='add'>+		hash_cfg.hash_sip_mix[i] = ips[i];</div><div class='add'>+		hash_cfg.hash_dip_mix[i] = ips[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure RSS seed configs for IPv6 packet. */</div><div class='add'>+	return ppe_rss_hash_config_set(ppe_dev, PPE_RSS_HASH_MODE_IPV6, hash_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Initialize mapping between PPE queues assigned to CPU port 0</div><div class='add'>+ * to Ethernet DMA ring 0.</div><div class='add'>+ */</div><div class='add'>+static int ppe_queues_to_ring_init(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	u32 queue_bmap[PPE_RING_TO_QUEUE_BITMAP_WORD_CNT] = {};</div><div class='add'>+	int ret, queue_id, queue_max;</div><div class='add'>+</div><div class='add'>+	ret = ppe_port_resource_get(ppe_dev, 0, PPE_RES_UCAST,</div><div class='add'>+				    &amp;queue_id, &amp;queue_max);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (; queue_id &lt;= queue_max; queue_id++)</div><div class='add'>+		queue_bmap[queue_id / 32] |= BIT_MASK(queue_id % 32);</div><div class='add'>+</div><div class='add'>+	return ppe_ring_queue_map_set(ppe_dev, 0, queue_bmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Initialize PPE bridge settings to only enable L2 frame receive and</div><div class='add'>+ * transmit between CPU port and PPE Ethernet ports.</div><div class='add'>+ */</div><div class='add'>+static int ppe_bridge_init(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	u32 reg, mask, port_cfg[4], vsi_cfg[2];</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* Configure the following settings for CPU port0:</div><div class='add'>+	 * a.) Enable Bridge TX</div><div class='add'>+	 * b.) Disable FDB new address learning</div><div class='add'>+	 * c.) Disable station move address learning</div><div class='add'>+	 */</div><div class='add'>+	mask = PPE_PORT_BRIDGE_TXMAC_EN;</div><div class='add'>+	mask |= PPE_PORT_BRIDGE_NEW_LRN_EN;</div><div class='add'>+	mask |= PPE_PORT_BRIDGE_STA_MOVE_LRN_EN;</div><div class='add'>+	ret = regmap_update_bits(ppe_dev-&gt;regmap,</div><div class='add'>+				 PPE_PORT_BRIDGE_CTRL_ADDR,</div><div class='add'>+				 mask,</div><div class='add'>+				 PPE_PORT_BRIDGE_TXMAC_EN);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; ppe_dev-&gt;num_ports; i++) {</div><div class='add'>+		/* Enable invalid VSI forwarding for all the physical ports</div><div class='add'>+		 * to CPU port0, in case no VSI is assigned to the physical</div><div class='add'>+		 * port.</div><div class='add'>+		 */</div><div class='add'>+		reg = PPE_L2_VP_PORT_TBL_ADDR + PPE_L2_VP_PORT_TBL_INC * i;</div><div class='add'>+		ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				       port_cfg, ARRAY_SIZE(port_cfg));</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		PPE_L2_PORT_SET_INVALID_VSI_FWD_EN(port_cfg, true);</div><div class='add'>+		PPE_L2_PORT_SET_DST_INFO(port_cfg, 0);</div><div class='add'>+</div><div class='add'>+		ret = regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+					port_cfg, ARRAY_SIZE(port_cfg));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PPE_VSI_TBL_ENTRIES; i++) {</div><div class='add'>+		/* Set the VSI forward membership to include only CPU port0.</div><div class='add'>+		 * FDB learning and forwarding take place only after switchdev</div><div class='add'>+		 * is supported later to create the VSI and join the physical</div><div class='add'>+		 * ports to the VSI port member.</div><div class='add'>+		 */</div><div class='add'>+		reg = PPE_VSI_TBL_ADDR + PPE_VSI_TBL_INC * i;</div><div class='add'>+		ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				       vsi_cfg, ARRAY_SIZE(vsi_cfg));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		PPE_VSI_SET_MEMBER_PORT_BITMAP(vsi_cfg, BIT(0));</div><div class='add'>+		PPE_VSI_SET_UUC_BITMAP(vsi_cfg, BIT(0));</div><div class='add'>+		PPE_VSI_SET_UMC_BITMAP(vsi_cfg, BIT(0));</div><div class='add'>+		PPE_VSI_SET_BC_BITMAP(vsi_cfg, BIT(0));</div><div class='add'>+		PPE_VSI_SET_NEW_ADDR_LRN_EN(vsi_cfg, true);</div><div class='add'>+		PPE_VSI_SET_NEW_ADDR_FWD_CMD(vsi_cfg, PPE_ACTION_FORWARD);</div><div class='add'>+		PPE_VSI_SET_STATION_MOVE_LRN_EN(vsi_cfg, true);</div><div class='add'>+		PPE_VSI_SET_STATION_MOVE_FWD_CMD(vsi_cfg, PPE_ACTION_FORWARD);</div><div class='add'>+</div><div class='add'>+		ret = regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+					vsi_cfg, ARRAY_SIZE(vsi_cfg));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ppe_hw_config(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ppe_config_bm(ppe_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ppe_config_qm(ppe_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ppe_config_scheduler(ppe_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ppe_queue_dest_init(ppe_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ppe_servcode_init(ppe_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ppe_port_config_init(ppe_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ppe_rss_hash_init(ppe_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ppe_queues_to_ring_init(ppe_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ppe_bridge_init(ppe_dev);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/ppe/ppe_config.h b/drivers/net/ethernet/qualcomm/ppe/ppe_config.h<br/>new file mode 100644<br/>index 000000000000..4bb45ca40144<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/ppe/ppe_config.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/ppe/ppe_config.h</a></div><div class='hunk'>@@ -0,0 +1,317 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PPE_CONFIG_H__</div><div class='add'>+#define __PPE_CONFIG_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ppe.h"</div><div class='add'>+</div><div class='add'>+/* There are different table index ranges for configuring queue base ID of</div><div class='add'>+ * the destination port, CPU code and service code.</div><div class='add'>+ */</div><div class='add'>+#define PPE_QUEUE_BASE_DEST_PORT		0</div><div class='add'>+#define PPE_QUEUE_BASE_CPU_CODE			1024</div><div class='add'>+#define PPE_QUEUE_BASE_SERVICE_CODE		2048</div><div class='add'>+</div><div class='add'>+#define PPE_QUEUE_INTER_PRI_NUM			16</div><div class='add'>+#define PPE_QUEUE_HASH_NUM			256</div><div class='add'>+</div><div class='add'>+/* The service code is used by EDMA port to transmit packet to PPE. */</div><div class='add'>+#define PPE_EDMA_SC_BYPASS_ID			1</div><div class='add'>+</div><div class='add'>+/* The PPE RSS hash configured for IPv4 and IPv6 packet separately. */</div><div class='add'>+#define PPE_RSS_HASH_MODE_IPV4			BIT(0)</div><div class='add'>+#define PPE_RSS_HASH_MODE_IPV6			BIT(1)</div><div class='add'>+#define PPE_RSS_HASH_IP_LENGTH			4</div><div class='add'>+#define PPE_RSS_HASH_TUPLES			5</div><div class='add'>+</div><div class='add'>+/* PPE supports 300 queues, each bit presents as one queue. */</div><div class='add'>+#define PPE_RING_TO_QUEUE_BITMAP_WORD_CNT	10</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum ppe_scheduler_frame_mode - PPE scheduler frame mode.</div><div class='add'>+ * @PPE_SCH_WITH_IPG_PREAMBLE_FRAME_CRC: The scheduled frame includes IPG,</div><div class='add'>+ * preamble, Ethernet packet and CRC.</div><div class='add'>+ * @PPE_SCH_WITH_FRAME_CRC: The scheduled frame includes Ethernet frame and CRC</div><div class='add'>+ * excluding IPG and preamble.</div><div class='add'>+ * @PPE_SCH_WITH_L3_PAYLOAD: The scheduled frame includes layer 3 packet data.</div><div class='add'>+ */</div><div class='add'>+enum ppe_scheduler_frame_mode {</div><div class='add'>+	PPE_SCH_WITH_IPG_PREAMBLE_FRAME_CRC = 0,</div><div class='add'>+	PPE_SCH_WITH_FRAME_CRC = 1,</div><div class='add'>+	PPE_SCH_WITH_L3_PAYLOAD = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_scheduler_cfg - PPE scheduler configuration.</div><div class='add'>+ * @flow_id: PPE flow ID.</div><div class='add'>+ * @pri: Scheduler priority.</div><div class='add'>+ * @drr_node_id: Node ID for scheduled traffic.</div><div class='add'>+ * @drr_node_wt: Weight for scheduled traffic.</div><div class='add'>+ * @unit_is_packet: Packet based or byte based unit for scheduled traffic.</div><div class='add'>+ * @frame_mode: Packet mode to be scheduled.</div><div class='add'>+ *</div><div class='add'>+ * PPE scheduler supports commit rate and exceed rate configurations.</div><div class='add'>+ */</div><div class='add'>+struct ppe_scheduler_cfg {</div><div class='add'>+	int flow_id;</div><div class='add'>+	int pri;</div><div class='add'>+	int drr_node_id;</div><div class='add'>+	int drr_node_wt;</div><div class='add'>+	bool unit_is_packet;</div><div class='add'>+	enum ppe_scheduler_frame_mode frame_mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum ppe_resource_type - PPE resource type.</div><div class='add'>+ * @PPE_RES_UCAST: Unicast queue resource.</div><div class='add'>+ * @PPE_RES_MCAST: Multicast queue resource.</div><div class='add'>+ * @PPE_RES_L0_NODE: Level 0 for queue based node resource.</div><div class='add'>+ * @PPE_RES_L1_NODE: Level 1 for flow based node resource.</div><div class='add'>+ * @PPE_RES_FLOW_ID: Flow based node resource.</div><div class='add'>+ */</div><div class='add'>+enum ppe_resource_type {</div><div class='add'>+	PPE_RES_UCAST,</div><div class='add'>+	PPE_RES_MCAST,</div><div class='add'>+	PPE_RES_L0_NODE,</div><div class='add'>+	PPE_RES_L1_NODE,</div><div class='add'>+	PPE_RES_FLOW_ID,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_queue_ucast_dest - PPE unicast queue destination.</div><div class='add'>+ * @src_profile: Source profile.</div><div class='add'>+ * @service_code_en: Enable service code to map the queue base ID.</div><div class='add'>+ * @service_code: Service code.</div><div class='add'>+ * @cpu_code_en: Enable CPU code to map the queue base ID.</div><div class='add'>+ * @cpu_code: CPU code.</div><div class='add'>+ * @dest_port: destination port.</div><div class='add'>+ *</div><div class='add'>+ * PPE egress queue ID is decided by the service code if enabled, otherwise</div><div class='add'>+ * by the CPU code if enabled, or by destination port if both service code</div><div class='add'>+ * and CPU code are disabled.</div><div class='add'>+ */</div><div class='add'>+struct ppe_queue_ucast_dest {</div><div class='add'>+	int src_profile;</div><div class='add'>+	bool service_code_en;</div><div class='add'>+	int service_code;</div><div class='add'>+	bool cpu_code_en;</div><div class='add'>+	int cpu_code;</div><div class='add'>+	int dest_port;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Hardware bitmaps for bypassing features of the ingress packet. */</div><div class='add'>+enum ppe_sc_ingress_type {</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_VLAN_TAG_FMT_CHECK = 0,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_VLAN_MEMBER_CHECK = 1,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_VLAN_TRANSLATE = 2,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_MY_MAC_CHECK = 3,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_DIP_LOOKUP = 4,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_FLOW_LOOKUP = 5,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_FLOW_ACTION = 6,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_ACL = 7,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_FAKE_MAC_HEADER = 8,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_SERVICE_CODE = 9,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_WRONG_PKT_FMT_L2 = 10,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_WRONG_PKT_FMT_L3_IPV4 = 11,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_WRONG_PKT_FMT_L3_IPV6 = 12,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_WRONG_PKT_FMT_L4 = 13,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_FLOW_SERVICE_CODE = 14,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_ACL_SERVICE_CODE = 15,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_FAKE_L2_PROTO = 16,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_PPPOE_TERMINATION = 17,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_DEFAULT_VLAN = 18,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_DEFAULT_PCP = 19,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_VSI_ASSIGN = 20,</div><div class='add'>+	/* Values 21-23 are not specified by hardware. */</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_VLAN_ASSIGN_FAIL = 24,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_SOURCE_GUARD = 25,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_MRU_MTU_CHECK = 26,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_FLOW_SRC_CHECK = 27,</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_FLOW_QOS = 28,</div><div class='add'>+	/* This must be last as it determines the size of the BITMAP. */</div><div class='add'>+	PPE_SC_BYPASS_INGRESS_SIZE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Hardware bitmaps for bypassing features of the egress packet. */</div><div class='add'>+enum ppe_sc_egress_type {</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_VLAN_MEMBER_CHECK = 0,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_VLAN_TRANSLATE = 1,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_VLAN_TAG_FMT_CTRL = 2,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_FDB_LEARN = 3,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_FDB_REFRESH = 4,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_L2_SOURCE_SECURITY = 5,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_MANAGEMENT_FWD = 6,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_BRIDGING_FWD = 7,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_IN_STP_FLTR = 8,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_EG_STP_FLTR = 9,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_SOURCE_FLTR = 10,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_POLICER = 11,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_L2_PKT_EDIT = 12,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_L3_PKT_EDIT = 13,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_ACL_POST_ROUTING_CHECK = 14,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_PORT_ISOLATION = 15,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_PRE_ACL_QOS = 16,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_POST_ACL_QOS = 17,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_DSCP_QOS = 18,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_PCP_QOS = 19,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_PREHEADER_QOS = 20,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_FAKE_MAC_DROP = 21,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_TUNL_CONTEXT = 22,</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_FLOW_POLICER = 23,</div><div class='add'>+	/* This must be last as it determines the size of the BITMAP. */</div><div class='add'>+	PPE_SC_BYPASS_EGRESS_SIZE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Hardware bitmaps for bypassing counter of packet. */</div><div class='add'>+enum ppe_sc_counter_type {</div><div class='add'>+	PPE_SC_BYPASS_COUNTER_RX_VLAN = 0,</div><div class='add'>+	PPE_SC_BYPASS_COUNTER_RX = 1,</div><div class='add'>+	PPE_SC_BYPASS_COUNTER_TX_VLAN = 2,</div><div class='add'>+	PPE_SC_BYPASS_COUNTER_TX = 3,</div><div class='add'>+	/* This must be last as it determines the size of the BITMAP. */</div><div class='add'>+	PPE_SC_BYPASS_COUNTER_SIZE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Hardware bitmaps for bypassing features of tunnel packet. */</div><div class='add'>+enum ppe_sc_tunnel_type {</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_SERVICE_CODE = 0,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_TUNNEL_HANDLE = 1,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_L3_IF_CHECK = 2,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_VLAN_CHECK = 3,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_DMAC_CHECK = 4,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_UDP_CSUM_0_CHECK = 5,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_TBL_DE_ACCE_CHECK = 6,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_PPPOE_MC_TERM_CHECK = 7,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_TTL_EXCEED_CHECK = 8,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_MAP_SRC_CHECK = 9,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_MAP_DST_CHECK = 10,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_LPM_DST_LOOKUP = 11,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_LPM_LOOKUP = 12,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_WRONG_PKT_FMT_L2 = 13,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_WRONG_PKT_FMT_L3_IPV4 = 14,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_WRONG_PKT_FMT_L3_IPV6 = 15,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_WRONG_PKT_FMT_L4 = 16,</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_WRONG_PKT_FMT_TUNNEL = 17,</div><div class='add'>+	/* Values 18-19 are not specified by hardware. */</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_PRE_IPO = 20,</div><div class='add'>+	/* This must be last as it determines the size of the BITMAP. */</div><div class='add'>+	PPE_SC_BYPASS_TUNNEL_SIZE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_sc_bypass - PPE service bypass bitmaps</div><div class='add'>+ * @ingress: Bitmap of features that can be bypassed on the ingress packet.</div><div class='add'>+ * @egress: Bitmap of features that can be bypassed on the egress packet.</div><div class='add'>+ * @counter: Bitmap of features that can be bypassed on the counter type.</div><div class='add'>+ * @tunnel: Bitmap of features that can be bypassed on the tunnel packet.</div><div class='add'>+ */</div><div class='add'>+struct ppe_sc_bypass {</div><div class='add'>+	DECLARE_BITMAP(ingress, PPE_SC_BYPASS_INGRESS_SIZE);</div><div class='add'>+	DECLARE_BITMAP(egress, PPE_SC_BYPASS_EGRESS_SIZE);</div><div class='add'>+	DECLARE_BITMAP(counter, PPE_SC_BYPASS_COUNTER_SIZE);</div><div class='add'>+	DECLARE_BITMAP(tunnel, PPE_SC_BYPASS_TUNNEL_SIZE);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_sc_cfg - PPE service code configuration.</div><div class='add'>+ * @dest_port_valid: Generate destination port or not.</div><div class='add'>+ * @dest_port: Destination port ID.</div><div class='add'>+ * @bitmaps: Bitmap of bypass features.</div><div class='add'>+ * @is_src: Destination port acts as source port, packet sent to CPU.</div><div class='add'>+ * @next_service_code: New service code generated.</div><div class='add'>+ * @eip_field_update_bitmap: Fields updated as actions taken for EIP.</div><div class='add'>+ * @eip_hw_service: Selected hardware functions for EIP.</div><div class='add'>+ * @eip_offset_sel: Packet offset selection, using packet's layer 4 offset</div><div class='add'>+ * or using packet's layer 3 offset for EIP.</div><div class='add'>+ *</div><div class='add'>+ * Service code is generated during the packet passing through PPE.</div><div class='add'>+ */</div><div class='add'>+struct ppe_sc_cfg {</div><div class='add'>+	bool dest_port_valid;</div><div class='add'>+	int dest_port;</div><div class='add'>+	struct ppe_sc_bypass bitmaps;</div><div class='add'>+	bool is_src;</div><div class='add'>+	int next_service_code;</div><div class='add'>+	int eip_field_update_bitmap;</div><div class='add'>+	int eip_hw_service;</div><div class='add'>+	int eip_offset_sel;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum ppe_action_type - PPE action of the received packet.</div><div class='add'>+ * @PPE_ACTION_FORWARD: Packet forwarded per L2/L3 process.</div><div class='add'>+ * @PPE_ACTION_DROP: Packet dropped by PPE.</div><div class='add'>+ * @PPE_ACTION_COPY_TO_CPU: Packet copied to CPU port per multicast queue.</div><div class='add'>+ * @PPE_ACTION_REDIRECT_TO_CPU: Packet redirected to CPU port per unicast queue.</div><div class='add'>+ */</div><div class='add'>+enum ppe_action_type {</div><div class='add'>+	PPE_ACTION_FORWARD = 0,</div><div class='add'>+	PPE_ACTION_DROP = 1,</div><div class='add'>+	PPE_ACTION_COPY_TO_CPU = 2,</div><div class='add'>+	PPE_ACTION_REDIRECT_TO_CPU = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_rss_hash_cfg - PPE RSS hash configuration.</div><div class='add'>+ * @hash_mask: Mask of the generated hash value.</div><div class='add'>+ * @hash_fragment_mode: Hash generation mode for the first fragment of TCP,</div><div class='add'>+ * UDP and UDP-Lite packets, to use either 3 tuple or 5 tuple for RSS hash</div><div class='add'>+ * key computation.</div><div class='add'>+ * @hash_seed: Seed to generate RSS hash.</div><div class='add'>+ * @hash_sip_mix: Source IP selection.</div><div class='add'>+ * @hash_dip_mix: Destination IP selection.</div><div class='add'>+ * @hash_protocol_mix: Protocol selection.</div><div class='add'>+ * @hash_sport_mix: Source L4 port selection.</div><div class='add'>+ * @hash_dport_mix: Destination L4 port selection.</div><div class='add'>+ * @hash_fin_inner: RSS hash value first selection.</div><div class='add'>+ * @hash_fin_outer: RSS hash value second selection.</div><div class='add'>+ *</div><div class='add'>+ * PPE RSS hash value is generated for the packet based on the RSS hash</div><div class='add'>+ * configured.</div><div class='add'>+ */</div><div class='add'>+struct ppe_rss_hash_cfg {</div><div class='add'>+	u32 hash_mask;</div><div class='add'>+	bool hash_fragment_mode;</div><div class='add'>+	u32 hash_seed;</div><div class='add'>+	u8 hash_sip_mix[PPE_RSS_HASH_IP_LENGTH];</div><div class='add'>+	u8 hash_dip_mix[PPE_RSS_HASH_IP_LENGTH];</div><div class='add'>+	u8 hash_protocol_mix;</div><div class='add'>+	u8 hash_sport_mix;</div><div class='add'>+	u8 hash_dport_mix;</div><div class='add'>+	u8 hash_fin_inner[PPE_RSS_HASH_TUPLES];</div><div class='add'>+	u8 hash_fin_outer[PPE_RSS_HASH_TUPLES];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ppe_hw_config(struct ppe_device *ppe_dev);</div><div class='add'>+int ppe_queue_scheduler_set(struct ppe_device *ppe_dev,</div><div class='add'>+			    int node_id, bool flow_level, int port,</div><div class='add'>+			    struct ppe_scheduler_cfg scheduler_cfg);</div><div class='add'>+int ppe_queue_ucast_base_set(struct ppe_device *ppe_dev,</div><div class='add'>+			     struct ppe_queue_ucast_dest queue_dst,</div><div class='add'>+			     int queue_base,</div><div class='add'>+			     int profile_id);</div><div class='add'>+int ppe_queue_ucast_offset_pri_set(struct ppe_device *ppe_dev,</div><div class='add'>+				   int profile_id,</div><div class='add'>+				   int priority,</div><div class='add'>+				   int queue_offset);</div><div class='add'>+int ppe_queue_ucast_offset_hash_set(struct ppe_device *ppe_dev,</div><div class='add'>+				    int profile_id,</div><div class='add'>+				    int rss_hash,</div><div class='add'>+				    int queue_offset);</div><div class='add'>+int ppe_port_resource_get(struct ppe_device *ppe_dev, int port,</div><div class='add'>+			  enum ppe_resource_type type,</div><div class='add'>+			  int *res_start, int *res_end);</div><div class='add'>+int ppe_sc_config_set(struct ppe_device *ppe_dev, int sc,</div><div class='add'>+		      struct ppe_sc_cfg cfg);</div><div class='add'>+int ppe_counter_enable_set(struct ppe_device *ppe_dev, int port);</div><div class='add'>+int ppe_rss_hash_config_set(struct ppe_device *ppe_dev, int mode,</div><div class='add'>+			    struct ppe_rss_hash_cfg hash_cfg);</div><div class='add'>+int ppe_ring_queue_map_set(struct ppe_device *ppe_dev,</div><div class='add'>+			   int ring_id,</div><div class='add'>+			   u32 *queue_map);</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c b/drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c<br/>new file mode 100644<br/>index 000000000000..fd959a76ff43<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,847 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* PPE debugfs routines for display of PPE counters useful for debug. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/dev_printk.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ppe.h"</div><div class='add'>+#include "ppe_config.h"</div><div class='add'>+#include "ppe_debugfs.h"</div><div class='add'>+#include "ppe_regs.h"</div><div class='add'>+</div><div class='add'>+#define PPE_PKT_CNT_TBL_SIZE				3</div><div class='add'>+#define PPE_DROP_PKT_CNT_TBL_SIZE			5</div><div class='add'>+</div><div class='add'>+#define PPE_W0_PKT_CNT					GENMASK(31, 0)</div><div class='add'>+#define PPE_W2_DROP_PKT_CNT_LOW				GENMASK(31, 8)</div><div class='add'>+#define PPE_W3_DROP_PKT_CNT_HIGH			GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define PPE_GET_PKT_CNT(tbl_cnt)			\</div><div class='add'>+	FIELD_GET(PPE_W0_PKT_CNT, *(tbl_cnt))</div><div class='add'>+#define PPE_GET_DROP_PKT_CNT_LOW(tbl_cnt)		\</div><div class='add'>+	FIELD_GET(PPE_W2_DROP_PKT_CNT_LOW, *((tbl_cnt) + 0x2))</div><div class='add'>+#define PPE_GET_DROP_PKT_CNT_HIGH(tbl_cnt)		\</div><div class='add'>+	FIELD_GET(PPE_W3_DROP_PKT_CNT_HIGH, *((tbl_cnt) + 0x3))</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum ppe_cnt_size_type - PPE counter size type</div><div class='add'>+ * @PPE_PKT_CNT_SIZE_1WORD: Counter size with single register</div><div class='add'>+ * @PPE_PKT_CNT_SIZE_3WORD: Counter size with table of 3 words</div><div class='add'>+ * @PPE_PKT_CNT_SIZE_5WORD: Counter size with table of 5 words</div><div class='add'>+ *</div><div class='add'>+ * PPE takes the different register size to record the packet counters.</div><div class='add'>+ * It uses single register, or register table with 3 words or 5 words.</div><div class='add'>+ * The counter with table size 5 words also records the drop counter.</div><div class='add'>+ * There are also some other counter types occupying sizes less than 32</div><div class='add'>+ * bits, which is not covered by this enumeration type.</div><div class='add'>+ */</div><div class='add'>+enum ppe_cnt_size_type {</div><div class='add'>+	PPE_PKT_CNT_SIZE_1WORD,</div><div class='add'>+	PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+	PPE_PKT_CNT_SIZE_5WORD,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum ppe_cnt_type - PPE counter type.</div><div class='add'>+ * @PPE_CNT_BM: Packet counter processed by BM.</div><div class='add'>+ * @PPE_CNT_PARSE: Packet counter parsed on ingress.</div><div class='add'>+ * @PPE_CNT_PORT_RX: Packet counter on the ingress port.</div><div class='add'>+ * @PPE_CNT_VLAN_RX: VLAN packet counter received.</div><div class='add'>+ * @PPE_CNT_L2_FWD: Packet counter processed by L2 forwarding.</div><div class='add'>+ * @PPE_CNT_CPU_CODE: Packet counter marked with various CPU codes.</div><div class='add'>+ * @PPE_CNT_VLAN_TX: VLAN packet counter transmitted.</div><div class='add'>+ * @PPE_CNT_PORT_TX: Packet counter on the egress port.</div><div class='add'>+ * @PPE_CNT_QM: Packet counter processed by QM.</div><div class='add'>+ */</div><div class='add'>+enum ppe_cnt_type {</div><div class='add'>+	PPE_CNT_BM,</div><div class='add'>+	PPE_CNT_PARSE,</div><div class='add'>+	PPE_CNT_PORT_RX,</div><div class='add'>+	PPE_CNT_VLAN_RX,</div><div class='add'>+	PPE_CNT_L2_FWD,</div><div class='add'>+	PPE_CNT_CPU_CODE,</div><div class='add'>+	PPE_CNT_VLAN_TX,</div><div class='add'>+	PPE_CNT_PORT_TX,</div><div class='add'>+	PPE_CNT_QM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ppe_debugfs_entry - PPE debugfs entry.</div><div class='add'>+ * @name: Debugfs file name.</div><div class='add'>+ * @counter_type: PPE packet counter type.</div><div class='add'>+ * @ppe: PPE device.</div><div class='add'>+ *</div><div class='add'>+ * The PPE debugfs entry is used to create the debugfs file and passed</div><div class='add'>+ * to debugfs_create_file() as private data.</div><div class='add'>+ */</div><div class='add'>+struct ppe_debugfs_entry {</div><div class='add'>+	const char *name;</div><div class='add'>+	enum ppe_cnt_type counter_type;</div><div class='add'>+	struct ppe_device *ppe;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ppe_debugfs_entry debugfs_files[] = {</div><div class='add'>+	{</div><div class='add'>+		.name			= "bm",</div><div class='add'>+		.counter_type		= PPE_CNT_BM,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name			= "parse",</div><div class='add'>+		.counter_type		= PPE_CNT_PARSE,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name			= "port_rx",</div><div class='add'>+		.counter_type		= PPE_CNT_PORT_RX,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name			= "vlan_rx",</div><div class='add'>+		.counter_type		= PPE_CNT_VLAN_RX,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name			= "l2_forward",</div><div class='add'>+		.counter_type		= PPE_CNT_L2_FWD,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name			= "cpu_code",</div><div class='add'>+		.counter_type		= PPE_CNT_CPU_CODE,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name			= "vlan_tx",</div><div class='add'>+		.counter_type		= PPE_CNT_VLAN_TX,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name			= "port_tx",</div><div class='add'>+		.counter_type		= PPE_CNT_PORT_TX,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name			= "qm",</div><div class='add'>+		.counter_type		= PPE_CNT_QM,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ppe_pkt_cnt_get(struct ppe_device *ppe_dev, u32 reg,</div><div class='add'>+			   enum ppe_cnt_size_type cnt_type,</div><div class='add'>+			   u32 *cnt, u32 *drop_cnt)</div><div class='add'>+{</div><div class='add'>+	u32 drop_pkt_cnt[PPE_DROP_PKT_CNT_TBL_SIZE];</div><div class='add'>+	u32 pkt_cnt[PPE_PKT_CNT_TBL_SIZE];</div><div class='add'>+	u32 value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (cnt_type) {</div><div class='add'>+	case PPE_PKT_CNT_SIZE_1WORD:</div><div class='add'>+		ret = regmap_read(ppe_dev-&gt;regmap, reg, &amp;value);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		*cnt = value;</div><div class='add'>+		break;</div><div class='add'>+	case PPE_PKT_CNT_SIZE_3WORD:</div><div class='add'>+		ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				       pkt_cnt, ARRAY_SIZE(pkt_cnt));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		*cnt = PPE_GET_PKT_CNT(pkt_cnt);</div><div class='add'>+		break;</div><div class='add'>+	case PPE_PKT_CNT_SIZE_5WORD:</div><div class='add'>+		ret = regmap_bulk_read(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				       drop_pkt_cnt, ARRAY_SIZE(drop_pkt_cnt));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		*cnt = PPE_GET_PKT_CNT(drop_pkt_cnt);</div><div class='add'>+</div><div class='add'>+		/* Drop counter with low 24 bits. */</div><div class='add'>+		value  = PPE_GET_DROP_PKT_CNT_LOW(drop_pkt_cnt);</div><div class='add'>+		*drop_cnt = FIELD_PREP(GENMASK(23, 0), value);</div><div class='add'>+</div><div class='add'>+		/* Drop counter with high 8 bits. */</div><div class='add'>+		value  = PPE_GET_DROP_PKT_CNT_HIGH(drop_pkt_cnt);</div><div class='add'>+		*drop_cnt |= FIELD_PREP(GENMASK(31, 24), value);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ppe_tbl_pkt_cnt_clear(struct ppe_device *ppe_dev, u32 reg,</div><div class='add'>+				  enum ppe_cnt_size_type cnt_type)</div><div class='add'>+{</div><div class='add'>+	u32 drop_pkt_cnt[PPE_DROP_PKT_CNT_TBL_SIZE] = {};</div><div class='add'>+	u32 pkt_cnt[PPE_PKT_CNT_TBL_SIZE] = {};</div><div class='add'>+</div><div class='add'>+	switch (cnt_type) {</div><div class='add'>+	case PPE_PKT_CNT_SIZE_1WORD:</div><div class='add'>+		regmap_write(ppe_dev-&gt;regmap, reg, 0);</div><div class='add'>+		break;</div><div class='add'>+	case PPE_PKT_CNT_SIZE_3WORD:</div><div class='add'>+		regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				  pkt_cnt, ARRAY_SIZE(pkt_cnt));</div><div class='add'>+		break;</div><div class='add'>+	case PPE_PKT_CNT_SIZE_5WORD:</div><div class='add'>+		regmap_bulk_write(ppe_dev-&gt;regmap, reg,</div><div class='add'>+				  drop_pkt_cnt, ARRAY_SIZE(drop_pkt_cnt));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ppe_bm_counter_get(struct ppe_device *ppe_dev, struct seq_file *seq)</div><div class='add'>+{</div><div class='add'>+	u32 reg, val, pkt_cnt, pkt_cnt1;</div><div class='add'>+	int ret, i, tag;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "BM SILENT_DROP:");</div><div class='add'>+	tag = 0;</div><div class='add'>+	for (i = 0; i &lt; PPE_DROP_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_DROP_CNT_TBL_ADDR + i * PPE_DROP_CNT_TBL_INC;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_1WORD,</div><div class='add'>+				      &amp;pkt_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u(%s=%04d)", pkt_cnt, "port", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	/* The number of packets dropped because hardware buffers were</div><div class='add'>+	 * available only partially for the packet.</div><div class='add'>+	 */</div><div class='add'>+	seq_printf(seq, "%-24s", "BM OVERFLOW_DROP:");</div><div class='add'>+	tag = 0;</div><div class='add'>+	for (i = 0; i &lt; PPE_DROP_STAT_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_DROP_STAT_TBL_ADDR + PPE_DROP_STAT_TBL_INC * i;</div><div class='add'>+</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+				      &amp;pkt_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u(%s=%04d)", pkt_cnt, "port", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	/* The number of currently occupied buffers, that can't be flushed. */</div><div class='add'>+	seq_printf(seq, "%-24s", "BM USED/REACT:");</div><div class='add'>+	tag = 0;</div><div class='add'>+	for (i = 0; i &lt; PPE_BM_USED_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_BM_USED_CNT_TBL_ADDR + i * PPE_BM_USED_CNT_TBL_INC;</div><div class='add'>+		ret = regmap_read(ppe_dev-&gt;regmap, reg, &amp;val);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* The number of PPE buffers used for caching the received</div><div class='add'>+		 * packets before the pause frame sent.</div><div class='add'>+		 */</div><div class='add'>+		pkt_cnt = FIELD_GET(PPE_BM_USED_CNT_VAL, val);</div><div class='add'>+</div><div class='add'>+		reg = PPE_BM_REACT_CNT_TBL_ADDR + i * PPE_BM_REACT_CNT_TBL_INC;</div><div class='add'>+		ret = regmap_read(ppe_dev-&gt;regmap, reg, &amp;val);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* The number of PPE buffers used for caching the received</div><div class='add'>+		 * packets after pause frame sent out.</div><div class='add'>+		 */</div><div class='add'>+		pkt_cnt1 = FIELD_GET(PPE_BM_REACT_CNT_VAL, val);</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0 || pkt_cnt1 &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u/%u(%s=%04d)", pkt_cnt, pkt_cnt1,</div><div class='add'>+				   "port", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The number of packets processed by the ingress parser module of PPE. */</div><div class='add'>+static int ppe_parse_pkt_counter_get(struct ppe_device *ppe_dev,</div><div class='add'>+				     struct seq_file *seq)</div><div class='add'>+{</div><div class='add'>+	u32 reg, cnt = 0, tunnel_cnt = 0;</div><div class='add'>+	int i, ret, tag = 0;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "PARSE TPRX/IPRX:");</div><div class='add'>+	for (i = 0; i &lt; PPE_IPR_PKT_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_TPR_PKT_CNT_TBL_ADDR + i * PPE_TPR_PKT_CNT_TBL_INC;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_1WORD,</div><div class='add'>+				      &amp;tunnel_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		reg = PPE_IPR_PKT_CNT_TBL_ADDR + i * PPE_IPR_PKT_CNT_TBL_INC;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_1WORD,</div><div class='add'>+				      &amp;cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (tunnel_cnt &gt; 0 || cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u/%u(%s=%04d)", tunnel_cnt, cnt,</div><div class='add'>+				   "port", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The number of packets received or dropped on the ingress port. */</div><div class='add'>+static int ppe_port_rx_counter_get(struct ppe_device *ppe_dev,</div><div class='add'>+				   struct seq_file *seq)</div><div class='add'>+{</div><div class='add'>+	u32 reg, pkt_cnt = 0, drop_cnt = 0;</div><div class='add'>+	int ret, i, tag;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "PORT RX/RX_DROP:");</div><div class='add'>+	tag = 0;</div><div class='add'>+	for (i = 0; i &lt; PPE_PHY_PORT_RX_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_PHY_PORT_RX_CNT_TBL_ADDR + PPE_PHY_PORT_RX_CNT_TBL_INC * i;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_5WORD,</div><div class='add'>+				      &amp;pkt_cnt, &amp;drop_cnt);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u/%u(%s=%04d)", pkt_cnt, drop_cnt,</div><div class='add'>+				   "port", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "VPORT RX/RX_DROP:");</div><div class='add'>+	tag = 0;</div><div class='add'>+	for (i = 0; i &lt; PPE_PORT_RX_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_PORT_RX_CNT_TBL_ADDR + PPE_PORT_RX_CNT_TBL_INC * i;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_5WORD,</div><div class='add'>+				      &amp;pkt_cnt, &amp;drop_cnt);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u/%u(%s=%04d)", pkt_cnt, drop_cnt,</div><div class='add'>+				   "port", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The number of packets received or dropped by layer 2 processing. */</div><div class='add'>+static int ppe_l2_counter_get(struct ppe_device *ppe_dev,</div><div class='add'>+			      struct seq_file *seq)</div><div class='add'>+{</div><div class='add'>+	u32 reg, pkt_cnt = 0, drop_cnt = 0;</div><div class='add'>+	int ret, i, tag = 0;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "L2 RX/RX_DROP:");</div><div class='add'>+	for (i = 0; i &lt; PPE_PRE_L2_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_PRE_L2_CNT_TBL_ADDR + PPE_PRE_L2_CNT_TBL_INC * i;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_5WORD,</div><div class='add'>+				      &amp;pkt_cnt, &amp;drop_cnt);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u/%u(%s=%04d)", pkt_cnt, drop_cnt,</div><div class='add'>+				   "vsi", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The number of VLAN packets received by PPE. */</div><div class='add'>+static int ppe_vlan_rx_counter_get(struct ppe_device *ppe_dev,</div><div class='add'>+				   struct seq_file *seq)</div><div class='add'>+{</div><div class='add'>+	u32 reg, pkt_cnt = 0;</div><div class='add'>+	int ret, i, tag = 0;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "VLAN RX:");</div><div class='add'>+	for (i = 0; i &lt; PPE_VLAN_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_VLAN_CNT_TBL_ADDR + PPE_VLAN_CNT_TBL_INC * i;</div><div class='add'>+</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+				      &amp;pkt_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u(%s=%04d)", pkt_cnt, "vsi", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The number of packets handed to CPU by PPE. */</div><div class='add'>+static int ppe_cpu_code_counter_get(struct ppe_device *ppe_dev,</div><div class='add'>+				    struct seq_file *seq)</div><div class='add'>+{</div><div class='add'>+	u32 reg, pkt_cnt = 0;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "CPU CODE:");</div><div class='add'>+	for (i = 0; i &lt; PPE_DROP_CPU_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_DROP_CPU_CNT_TBL_ADDR + PPE_DROP_CPU_CNT_TBL_INC * i;</div><div class='add'>+</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+				      &amp;pkt_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!pkt_cnt)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* There are 256 CPU codes saved in the first 256 entries</div><div class='add'>+		 * of register table, and 128 drop codes for each PPE port</div><div class='add'>+		 * (0-7), the total entries is 256 + 8 * 128.</div><div class='add'>+		 */</div><div class='add'>+		if (i &lt; 256)</div><div class='add'>+			seq_printf(seq, "%10u(cpucode:%d)", pkt_cnt, i);</div><div class='add'>+		else</div><div class='add'>+			seq_printf(seq, "%10u(port=%04d),dropcode:%d", pkt_cnt,</div><div class='add'>+				   (i - 256) % 8, (i - 256) / 8);</div><div class='add'>+		seq_putc(seq, '\n');</div><div class='add'>+		seq_printf(seq, "%-24s", "");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The number of packets forwarded by VLAN on the egress direction. */</div><div class='add'>+static int ppe_vlan_tx_counter_get(struct ppe_device *ppe_dev,</div><div class='add'>+				   struct seq_file *seq)</div><div class='add'>+{</div><div class='add'>+	u32 reg, pkt_cnt = 0;</div><div class='add'>+	int ret, i, tag = 0;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "VLAN TX:");</div><div class='add'>+	for (i = 0; i &lt; PPE_EG_VSI_COUNTER_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_EG_VSI_COUNTER_TBL_ADDR + PPE_EG_VSI_COUNTER_TBL_INC * i;</div><div class='add'>+</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+				      &amp;pkt_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u(%s=%04d)", pkt_cnt, "vsi", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The number of packets transmitted or dropped on the egress port. */</div><div class='add'>+static int ppe_port_tx_counter_get(struct ppe_device *ppe_dev,</div><div class='add'>+				   struct seq_file *seq)</div><div class='add'>+{</div><div class='add'>+	u32 reg, pkt_cnt = 0, drop_cnt = 0;</div><div class='add'>+	int ret, i, tag;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "VPORT TX/TX_DROP:");</div><div class='add'>+	tag = 0;</div><div class='add'>+	for (i = 0; i &lt; PPE_VPORT_TX_COUNTER_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_VPORT_TX_COUNTER_TBL_ADDR + PPE_VPORT_TX_COUNTER_TBL_INC * i;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+				      &amp;pkt_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		reg = PPE_VPORT_TX_DROP_CNT_TBL_ADDR + PPE_VPORT_TX_DROP_CNT_TBL_INC * i;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+				      &amp;drop_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0 || drop_cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u/%u(%s=%04d)", pkt_cnt, drop_cnt,</div><div class='add'>+				   "port", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "PORT TX/TX_DROP:");</div><div class='add'>+	tag = 0;</div><div class='add'>+	for (i = 0; i &lt; PPE_PORT_TX_COUNTER_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_PORT_TX_COUNTER_TBL_ADDR + PPE_PORT_TX_COUNTER_TBL_INC * i;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+				      &amp;pkt_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		reg = PPE_PORT_TX_DROP_CNT_TBL_ADDR + PPE_PORT_TX_DROP_CNT_TBL_INC * i;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+				      &amp;drop_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0 || drop_cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u/%u(%s=%04d)", pkt_cnt, drop_cnt,</div><div class='add'>+				   "port", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The number of packets transmitted or pending by the PPE queue. */</div><div class='add'>+static int ppe_queue_counter_get(struct ppe_device *ppe_dev,</div><div class='add'>+				 struct seq_file *seq)</div><div class='add'>+{</div><div class='add'>+	u32 reg, val, pkt_cnt = 0, pend_cnt = 0, drop_cnt = 0;</div><div class='add'>+	int ret, i, tag = 0;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "%-24s", "QUEUE TX/PEND/DROP:");</div><div class='add'>+	for (i = 0; i &lt; PPE_QUEUE_TX_COUNTER_TBL_ENTRIES; i++) {</div><div class='add'>+		reg = PPE_QUEUE_TX_COUNTER_TBL_ADDR + PPE_QUEUE_TX_COUNTER_TBL_INC * i;</div><div class='add'>+		ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+				      &amp;pkt_cnt, NULL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (i &lt; PPE_AC_UNICAST_QUEUE_CFG_TBL_ENTRIES) {</div><div class='add'>+			reg = PPE_AC_UNICAST_QUEUE_CNT_TBL_ADDR +</div><div class='add'>+			      PPE_AC_UNICAST_QUEUE_CNT_TBL_INC * i;</div><div class='add'>+			ret = regmap_read(ppe_dev-&gt;regmap, reg, &amp;val);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			pend_cnt = FIELD_GET(PPE_AC_UNICAST_QUEUE_CNT_TBL_PEND_CNT, val);</div><div class='add'>+</div><div class='add'>+			reg = PPE_UNICAST_DROP_CNT_TBL_ADDR +</div><div class='add'>+			      PPE_AC_UNICAST_QUEUE_CNT_TBL_INC *</div><div class='add'>+			      (i * PPE_UNICAST_DROP_TYPES + PPE_UNICAST_DROP_FORCE_OFFSET);</div><div class='add'>+</div><div class='add'>+			ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+					      &amp;drop_cnt, NULL);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			int mq_offset = i - PPE_AC_UNICAST_QUEUE_CFG_TBL_ENTRIES;</div><div class='add'>+</div><div class='add'>+			reg = PPE_AC_MULTICAST_QUEUE_CNT_TBL_ADDR +</div><div class='add'>+			      PPE_AC_MULTICAST_QUEUE_CNT_TBL_INC * mq_offset;</div><div class='add'>+			ret = regmap_read(ppe_dev-&gt;regmap, reg, &amp;val);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			pend_cnt = FIELD_GET(PPE_AC_MULTICAST_QUEUE_CNT_TBL_PEND_CNT, val);</div><div class='add'>+</div><div class='add'>+			if (mq_offset &lt; PPE_P0_MULTICAST_QUEUE_NUM) {</div><div class='add'>+				reg = PPE_CPU_PORT_MULTICAST_FORCE_DROP_CNT_TBL_ADDR(mq_offset);</div><div class='add'>+			} else {</div><div class='add'>+				mq_offset -= PPE_P0_MULTICAST_QUEUE_NUM;</div><div class='add'>+</div><div class='add'>+				reg = PPE_P1_MULTICAST_DROP_CNT_TBL_ADDR;</div><div class='add'>+				reg += (mq_offset / PPE_MULTICAST_QUEUE_NUM) *</div><div class='add'>+					PPE_MULTICAST_QUEUE_PORT_ADDR_INC;</div><div class='add'>+				reg += (mq_offset % PPE_MULTICAST_QUEUE_NUM) *</div><div class='add'>+					PPE_MULTICAST_DROP_CNT_TBL_INC *</div><div class='add'>+					PPE_MULTICAST_DROP_TYPES;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			ret = ppe_pkt_cnt_get(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD,</div><div class='add'>+					      &amp;drop_cnt, NULL);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(ppe_dev-&gt;dev, "CNT ERROR %d\n", ret);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_cnt &gt; 0 || pend_cnt &gt; 0 || drop_cnt &gt; 0) {</div><div class='add'>+			if (!((++tag) % 4))</div><div class='add'>+				seq_printf(seq, "\n%-24s", "");</div><div class='add'>+</div><div class='add'>+			seq_printf(seq, "%10u/%u/%u(%s=%04d)",</div><div class='add'>+				   pkt_cnt, pend_cnt, drop_cnt, "queue", i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	seq_putc(seq, '\n');</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Display the various packet counters of PPE. */</div><div class='add'>+static int ppe_packet_counter_show(struct seq_file *seq, void *v)</div><div class='add'>+{</div><div class='add'>+	struct ppe_debugfs_entry *entry = seq-&gt;private;</div><div class='add'>+	struct ppe_device *ppe_dev = entry-&gt;ppe;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (entry-&gt;counter_type) {</div><div class='add'>+	case PPE_CNT_BM:</div><div class='add'>+		ret = ppe_bm_counter_get(ppe_dev, seq);</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_PARSE:</div><div class='add'>+		ret = ppe_parse_pkt_counter_get(ppe_dev, seq);</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_PORT_RX:</div><div class='add'>+		ret = ppe_port_rx_counter_get(ppe_dev, seq);</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_VLAN_RX:</div><div class='add'>+		ret = ppe_vlan_rx_counter_get(ppe_dev, seq);</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_L2_FWD:</div><div class='add'>+		ret = ppe_l2_counter_get(ppe_dev, seq);</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_CPU_CODE:</div><div class='add'>+		ret = ppe_cpu_code_counter_get(ppe_dev, seq);</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_VLAN_TX:</div><div class='add'>+		ret = ppe_vlan_tx_counter_get(ppe_dev, seq);</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_PORT_TX:</div><div class='add'>+		ret = ppe_port_tx_counter_get(ppe_dev, seq);</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_QM:</div><div class='add'>+		ret = ppe_queue_counter_get(ppe_dev, seq);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Flush the various packet counters of PPE. */</div><div class='add'>+static ssize_t ppe_packet_counter_write(struct file *file,</div><div class='add'>+					const char __user *buf,</div><div class='add'>+					size_t count, loff_t *pos)</div><div class='add'>+{</div><div class='add'>+	struct ppe_debugfs_entry *entry = file_inode(file)-&gt;i_private;</div><div class='add'>+	struct ppe_device *ppe_dev = entry-&gt;ppe;</div><div class='add'>+	u32 reg;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	switch (entry-&gt;counter_type) {</div><div class='add'>+	case PPE_CNT_BM:</div><div class='add'>+		for (i = 0; i &lt; PPE_DROP_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_DROP_CNT_TBL_ADDR + i * PPE_DROP_CNT_TBL_INC;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_1WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; PPE_DROP_STAT_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_DROP_STAT_TBL_ADDR + PPE_DROP_STAT_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_PARSE:</div><div class='add'>+		for (i = 0; i &lt; PPE_IPR_PKT_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_IPR_PKT_CNT_TBL_ADDR + i * PPE_IPR_PKT_CNT_TBL_INC;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_1WORD);</div><div class='add'>+</div><div class='add'>+			reg = PPE_TPR_PKT_CNT_TBL_ADDR + i * PPE_TPR_PKT_CNT_TBL_INC;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_1WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_PORT_RX:</div><div class='add'>+		for (i = 0; i &lt; PPE_PORT_RX_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_PORT_RX_CNT_TBL_ADDR + PPE_PORT_RX_CNT_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_5WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; PPE_PHY_PORT_RX_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_PHY_PORT_RX_CNT_TBL_ADDR + PPE_PHY_PORT_RX_CNT_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_5WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_VLAN_RX:</div><div class='add'>+		for (i = 0; i &lt; PPE_VLAN_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_VLAN_CNT_TBL_ADDR + PPE_VLAN_CNT_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_L2_FWD:</div><div class='add'>+		for (i = 0; i &lt; PPE_PRE_L2_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_PRE_L2_CNT_TBL_ADDR + PPE_PRE_L2_CNT_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_5WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_CPU_CODE:</div><div class='add'>+		for (i = 0; i &lt; PPE_DROP_CPU_CNT_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_DROP_CPU_CNT_TBL_ADDR + PPE_DROP_CPU_CNT_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_VLAN_TX:</div><div class='add'>+		for (i = 0; i &lt; PPE_EG_VSI_COUNTER_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_EG_VSI_COUNTER_TBL_ADDR + PPE_EG_VSI_COUNTER_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_PORT_TX:</div><div class='add'>+		for (i = 0; i &lt; PPE_PORT_TX_COUNTER_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_PORT_TX_DROP_CNT_TBL_ADDR + PPE_PORT_TX_DROP_CNT_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD);</div><div class='add'>+</div><div class='add'>+			reg = PPE_PORT_TX_COUNTER_TBL_ADDR + PPE_PORT_TX_COUNTER_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; PPE_VPORT_TX_COUNTER_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_VPORT_TX_COUNTER_TBL_ADDR + PPE_VPORT_TX_COUNTER_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD);</div><div class='add'>+</div><div class='add'>+			reg = PPE_VPORT_TX_DROP_CNT_TBL_ADDR + PPE_VPORT_TX_DROP_CNT_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case PPE_CNT_QM:</div><div class='add'>+		for (i = 0; i &lt; PPE_QUEUE_TX_COUNTER_TBL_ENTRIES; i++) {</div><div class='add'>+			reg = PPE_QUEUE_TX_COUNTER_TBL_ADDR + PPE_QUEUE_TX_COUNTER_TBL_INC * i;</div><div class='add'>+			ppe_tbl_pkt_cnt_clear(ppe_dev, reg, PPE_PKT_CNT_SIZE_3WORD);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_STORE_ATTRIBUTE(ppe_packet_counter);</div><div class='add'>+</div><div class='add'>+void ppe_debugfs_setup(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	struct ppe_debugfs_entry *entry;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ppe_dev-&gt;debugfs_root = debugfs_create_dir("ppe", NULL);</div><div class='add'>+	if (IS_ERR(ppe_dev-&gt;debugfs_root))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(debugfs_files); i++) {</div><div class='add'>+		entry = devm_kzalloc(ppe_dev-&gt;dev, sizeof(*entry), GFP_KERNEL);</div><div class='add'>+		if (!entry)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		entry-&gt;ppe = ppe_dev;</div><div class='add'>+		entry-&gt;counter_type = debugfs_files[i].counter_type;</div><div class='add'>+</div><div class='add'>+		debugfs_create_file(debugfs_files[i].name, 0444,</div><div class='add'>+				    ppe_dev-&gt;debugfs_root, entry,</div><div class='add'>+				    &amp;ppe_packet_counter_fops);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ppe_debugfs_teardown(struct ppe_device *ppe_dev)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(ppe_dev-&gt;debugfs_root);</div><div class='add'>+	ppe_dev-&gt;debugfs_root = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.h b/drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.h<br/>new file mode 100644<br/>index 000000000000..81f49a709123<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.h</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* PPE debugfs counters setup. */</div><div class='add'>+</div><div class='add'>+#ifndef __PPE_DEBUGFS_H__</div><div class='add'>+#define __PPE_DEBUGFS_H__</div><div class='add'>+</div><div class='add'>+#include "ppe.h"</div><div class='add'>+</div><div class='add'>+void ppe_debugfs_setup(struct ppe_device *ppe_dev);</div><div class='add'>+void ppe_debugfs_teardown(struct ppe_device *ppe_dev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/ppe/ppe_regs.h b/drivers/net/ethernet/qualcomm/ppe/ppe_regs.h<br/>new file mode 100644<br/>index 000000000000..746dfbb5a682<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/ppe/ppe_regs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/ppe/ppe_regs.h</a></div><div class='hunk'>@@ -0,0 +1,591 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* PPE hardware register and table declarations. */</div><div class='add'>+#ifndef __PPE_REGS_H__</div><div class='add'>+#define __PPE_REGS_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+/* PPE scheduler configurations for buffer manager block. */</div><div class='add'>+#define PPE_BM_SCH_CTRL_ADDR			0xb000</div><div class='add'>+#define PPE_BM_SCH_CTRL_INC			4</div><div class='add'>+#define PPE_BM_SCH_CTRL_SCH_DEPTH		GENMASK(7, 0)</div><div class='add'>+#define PPE_BM_SCH_CTRL_SCH_OFFSET		GENMASK(14, 8)</div><div class='add'>+#define PPE_BM_SCH_CTRL_SCH_EN			BIT(31)</div><div class='add'>+</div><div class='add'>+/* PPE drop counters. */</div><div class='add'>+#define PPE_DROP_CNT_TBL_ADDR			0xb024</div><div class='add'>+#define PPE_DROP_CNT_TBL_ENTRIES		8</div><div class='add'>+#define PPE_DROP_CNT_TBL_INC			4</div><div class='add'>+</div><div class='add'>+/* BM port drop counters. */</div><div class='add'>+#define PPE_DROP_STAT_TBL_ADDR			0xe000</div><div class='add'>+#define PPE_DROP_STAT_TBL_ENTRIES		30</div><div class='add'>+#define PPE_DROP_STAT_TBL_INC			0x10</div><div class='add'>+</div><div class='add'>+/* Egress VLAN counters. */</div><div class='add'>+#define PPE_EG_VSI_COUNTER_TBL_ADDR		0x41000</div><div class='add'>+#define PPE_EG_VSI_COUNTER_TBL_ENTRIES		64</div><div class='add'>+#define PPE_EG_VSI_COUNTER_TBL_INC		0x10</div><div class='add'>+</div><div class='add'>+/* Port TX counters. */</div><div class='add'>+#define PPE_PORT_TX_COUNTER_TBL_ADDR		0x45000</div><div class='add'>+#define PPE_PORT_TX_COUNTER_TBL_ENTRIES		8</div><div class='add'>+#define PPE_PORT_TX_COUNTER_TBL_INC		0x10</div><div class='add'>+</div><div class='add'>+/* Virtual port TX counters. */</div><div class='add'>+#define PPE_VPORT_TX_COUNTER_TBL_ADDR		0x47000</div><div class='add'>+#define PPE_VPORT_TX_COUNTER_TBL_ENTRIES	256</div><div class='add'>+#define PPE_VPORT_TX_COUNTER_TBL_INC		0x10</div><div class='add'>+</div><div class='add'>+/* Queue counters. */</div><div class='add'>+#define PPE_QUEUE_TX_COUNTER_TBL_ADDR		0x4a000</div><div class='add'>+#define PPE_QUEUE_TX_COUNTER_TBL_ENTRIES	300</div><div class='add'>+#define PPE_QUEUE_TX_COUNTER_TBL_INC		0x10</div><div class='add'>+</div><div class='add'>+/* RSS settings are to calculate the random RSS hash value generated during</div><div class='add'>+ * packet receive to ARM cores. This hash is then used to generate the queue</div><div class='add'>+ * offset used to determine the queue used to transmit the packet to ARM cores.</div><div class='add'>+ */</div><div class='add'>+#define PPE_RSS_HASH_MASK_ADDR			0xb4318</div><div class='add'>+#define PPE_RSS_HASH_MASK_HASH_MASK		GENMASK(20, 0)</div><div class='add'>+#define PPE_RSS_HASH_MASK_FRAGMENT		BIT(28)</div><div class='add'>+</div><div class='add'>+#define PPE_RSS_HASH_SEED_ADDR			0xb431c</div><div class='add'>+#define PPE_RSS_HASH_SEED_VAL			GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+#define PPE_RSS_HASH_MIX_ADDR			0xb4320</div><div class='add'>+#define PPE_RSS_HASH_MIX_ENTRIES		11</div><div class='add'>+#define PPE_RSS_HASH_MIX_INC			4</div><div class='add'>+#define PPE_RSS_HASH_MIX_VAL			GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define PPE_RSS_HASH_FIN_ADDR			0xb4350</div><div class='add'>+#define PPE_RSS_HASH_FIN_ENTRIES		5</div><div class='add'>+#define PPE_RSS_HASH_FIN_INC			4</div><div class='add'>+#define PPE_RSS_HASH_FIN_INNER			GENMASK(4, 0)</div><div class='add'>+#define PPE_RSS_HASH_FIN_OUTER			GENMASK(9, 5)</div><div class='add'>+</div><div class='add'>+#define PPE_RSS_HASH_MASK_IPV4_ADDR		0xb4380</div><div class='add'>+#define PPE_RSS_HASH_MASK_IPV4_HASH_MASK	GENMASK(20, 0)</div><div class='add'>+#define PPE_RSS_HASH_MASK_IPV4_FRAGMENT		BIT(28)</div><div class='add'>+</div><div class='add'>+#define PPE_RSS_HASH_SEED_IPV4_ADDR		0xb4384</div><div class='add'>+#define PPE_RSS_HASH_SEED_IPV4_VAL		GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+#define PPE_RSS_HASH_MIX_IPV4_ADDR		0xb4390</div><div class='add'>+#define PPE_RSS_HASH_MIX_IPV4_ENTRIES		5</div><div class='add'>+#define PPE_RSS_HASH_MIX_IPV4_INC		4</div><div class='add'>+#define PPE_RSS_HASH_MIX_IPV4_VAL		GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define PPE_RSS_HASH_FIN_IPV4_ADDR		0xb43b0</div><div class='add'>+#define PPE_RSS_HASH_FIN_IPV4_ENTRIES		5</div><div class='add'>+#define PPE_RSS_HASH_FIN_IPV4_INC		4</div><div class='add'>+#define PPE_RSS_HASH_FIN_IPV4_INNER		GENMASK(4, 0)</div><div class='add'>+#define PPE_RSS_HASH_FIN_IPV4_OUTER		GENMASK(9, 5)</div><div class='add'>+</div><div class='add'>+#define PPE_BM_SCH_CFG_TBL_ADDR			0xc000</div><div class='add'>+#define PPE_BM_SCH_CFG_TBL_ENTRIES		128</div><div class='add'>+#define PPE_BM_SCH_CFG_TBL_INC			0x10</div><div class='add'>+#define PPE_BM_SCH_CFG_TBL_PORT_NUM		GENMASK(3, 0)</div><div class='add'>+#define PPE_BM_SCH_CFG_TBL_DIR			BIT(4)</div><div class='add'>+#define PPE_BM_SCH_CFG_TBL_VALID		BIT(5)</div><div class='add'>+#define PPE_BM_SCH_CFG_TBL_SECOND_PORT_VALID	BIT(6)</div><div class='add'>+#define PPE_BM_SCH_CFG_TBL_SECOND_PORT		GENMASK(11, 8)</div><div class='add'>+</div><div class='add'>+/* PPE service code configuration for the ingress direction functions,</div><div class='add'>+ * including bypass configuration for relevant PPE switch core functions</div><div class='add'>+ * such as flow entry lookup bypass.</div><div class='add'>+ */</div><div class='add'>+#define PPE_SERVICE_TBL_ADDR			0x15000</div><div class='add'>+#define PPE_SERVICE_TBL_ENTRIES			256</div><div class='add'>+#define PPE_SERVICE_TBL_INC			0x10</div><div class='add'>+#define PPE_SERVICE_W0_BYPASS_BITMAP		GENMASK(31, 0)</div><div class='add'>+#define PPE_SERVICE_W1_RX_CNT_EN		BIT(0)</div><div class='add'>+</div><div class='add'>+#define PPE_SERVICE_SET_BYPASS_BITMAP(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_SERVICE_W0_BYPASS_BITMAP, tbl_cfg, value)</div><div class='add'>+#define PPE_SERVICE_SET_RX_CNT_EN(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_SERVICE_W1_RX_CNT_EN, (tbl_cfg) + 0x1, value)</div><div class='add'>+</div><div class='add'>+/* PPE port egress VLAN configurations. */</div><div class='add'>+#define PPE_PORT_EG_VLAN_TBL_ADDR		0x20020</div><div class='add'>+#define PPE_PORT_EG_VLAN_TBL_ENTRIES		8</div><div class='add'>+#define PPE_PORT_EG_VLAN_TBL_INC		4</div><div class='add'>+#define PPE_PORT_EG_VLAN_TBL_VLAN_TYPE		BIT(0)</div><div class='add'>+#define PPE_PORT_EG_VLAN_TBL_CTAG_MODE		GENMASK(2, 1)</div><div class='add'>+#define PPE_PORT_EG_VLAN_TBL_STAG_MODE		GENMASK(4, 3)</div><div class='add'>+#define PPE_PORT_EG_VLAN_TBL_VSI_TAG_MODE_EN	BIT(5)</div><div class='add'>+#define PPE_PORT_EG_VLAN_TBL_PCP_PROP_CMD	BIT(6)</div><div class='add'>+#define PPE_PORT_EG_VLAN_TBL_DEI_PROP_CMD	BIT(7)</div><div class='add'>+#define PPE_PORT_EG_VLAN_TBL_TX_COUNTING_EN	BIT(8)</div><div class='add'>+</div><div class='add'>+/* PPE queue counters enable/disable control. */</div><div class='add'>+#define PPE_EG_BRIDGE_CONFIG_ADDR		0x20044</div><div class='add'>+#define PPE_EG_BRIDGE_CONFIG_QUEUE_CNT_EN	BIT(2)</div><div class='add'>+</div><div class='add'>+/* PPE service code configuration on the egress direction. */</div><div class='add'>+#define PPE_EG_SERVICE_TBL_ADDR			0x43000</div><div class='add'>+#define PPE_EG_SERVICE_TBL_ENTRIES		256</div><div class='add'>+#define PPE_EG_SERVICE_TBL_INC			0x10</div><div class='add'>+#define PPE_EG_SERVICE_W0_UPDATE_ACTION		GENMASK(31, 0)</div><div class='add'>+#define PPE_EG_SERVICE_W1_NEXT_SERVCODE		GENMASK(7, 0)</div><div class='add'>+#define PPE_EG_SERVICE_W1_HW_SERVICE		GENMASK(13, 8)</div><div class='add'>+#define PPE_EG_SERVICE_W1_OFFSET_SEL		BIT(14)</div><div class='add'>+#define PPE_EG_SERVICE_W1_TX_CNT_EN		BIT(15)</div><div class='add'>+</div><div class='add'>+#define PPE_EG_SERVICE_SET_UPDATE_ACTION(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_EG_SERVICE_W0_UPDATE_ACTION, tbl_cfg, value)</div><div class='add'>+#define PPE_EG_SERVICE_SET_NEXT_SERVCODE(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_EG_SERVICE_W1_NEXT_SERVCODE, (tbl_cfg) + 0x1, value)</div><div class='add'>+#define PPE_EG_SERVICE_SET_HW_SERVICE(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_EG_SERVICE_W1_HW_SERVICE, (tbl_cfg) + 0x1, value)</div><div class='add'>+#define PPE_EG_SERVICE_SET_OFFSET_SEL(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_EG_SERVICE_W1_OFFSET_SEL, (tbl_cfg) + 0x1, value)</div><div class='add'>+#define PPE_EG_SERVICE_SET_TX_CNT_EN(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_EG_SERVICE_W1_TX_CNT_EN, (tbl_cfg) + 0x1, value)</div><div class='add'>+</div><div class='add'>+/* PPE port bridge configuration */</div><div class='add'>+#define PPE_PORT_BRIDGE_CTRL_ADDR		0x60300</div><div class='add'>+#define PPE_PORT_BRIDGE_CTRL_ENTRIES		8</div><div class='add'>+#define PPE_PORT_BRIDGE_CTRL_INC		4</div><div class='add'>+#define PPE_PORT_BRIDGE_NEW_LRN_EN		BIT(0)</div><div class='add'>+#define PPE_PORT_BRIDGE_STA_MOVE_LRN_EN		BIT(3)</div><div class='add'>+#define PPE_PORT_BRIDGE_TXMAC_EN		BIT(16)</div><div class='add'>+</div><div class='add'>+/* PPE port control configurations for the traffic to the multicast queues. */</div><div class='add'>+#define PPE_MC_MTU_CTRL_TBL_ADDR		0x60a00</div><div class='add'>+#define PPE_MC_MTU_CTRL_TBL_ENTRIES		8</div><div class='add'>+#define PPE_MC_MTU_CTRL_TBL_INC			4</div><div class='add'>+#define PPE_MC_MTU_CTRL_TBL_MTU			GENMASK(13, 0)</div><div class='add'>+#define PPE_MC_MTU_CTRL_TBL_MTU_CMD		GENMASK(15, 14)</div><div class='add'>+#define PPE_MC_MTU_CTRL_TBL_TX_CNT_EN		BIT(16)</div><div class='add'>+</div><div class='add'>+/* PPE VSI configurations */</div><div class='add'>+#define PPE_VSI_TBL_ADDR			0x63800</div><div class='add'>+#define PPE_VSI_TBL_ENTRIES			64</div><div class='add'>+#define PPE_VSI_TBL_INC				0x10</div><div class='add'>+#define PPE_VSI_W0_MEMBER_PORT_BITMAP		GENMASK(7, 0)</div><div class='add'>+#define PPE_VSI_W0_UUC_BITMAP			GENMASK(15, 8)</div><div class='add'>+#define PPE_VSI_W0_UMC_BITMAP			GENMASK(23, 16)</div><div class='add'>+#define PPE_VSI_W0_BC_BITMAP			GENMASK(31, 24)</div><div class='add'>+#define PPE_VSI_W1_NEW_ADDR_LRN_EN		BIT(0)</div><div class='add'>+#define PPE_VSI_W1_NEW_ADDR_FWD_CMD		GENMASK(2, 1)</div><div class='add'>+#define PPE_VSI_W1_STATION_MOVE_LRN_EN		BIT(3)</div><div class='add'>+#define PPE_VSI_W1_STATION_MOVE_FWD_CMD		GENMASK(5, 4)</div><div class='add'>+</div><div class='add'>+#define PPE_VSI_SET_MEMBER_PORT_BITMAP(tbl_cfg, value)		\</div><div class='add'>+	FIELD_MODIFY(PPE_VSI_W0_MEMBER_PORT_BITMAP, tbl_cfg, value)</div><div class='add'>+#define PPE_VSI_SET_UUC_BITMAP(tbl_cfg, value)			\</div><div class='add'>+	FIELD_MODIFY(PPE_VSI_W0_UUC_BITMAP, tbl_cfg, value)</div><div class='add'>+#define PPE_VSI_SET_UMC_BITMAP(tbl_cfg, value)			\</div><div class='add'>+	FIELD_MODIFY(PPE_VSI_W0_UMC_BITMAP, tbl_cfg, value)</div><div class='add'>+#define PPE_VSI_SET_BC_BITMAP(tbl_cfg, value)			\</div><div class='add'>+	FIELD_MODIFY(PPE_VSI_W0_BC_BITMAP, tbl_cfg, value)</div><div class='add'>+#define PPE_VSI_SET_NEW_ADDR_LRN_EN(tbl_cfg, value)		\</div><div class='add'>+	FIELD_MODIFY(PPE_VSI_W1_NEW_ADDR_LRN_EN, (tbl_cfg) + 0x1, value)</div><div class='add'>+#define PPE_VSI_SET_NEW_ADDR_FWD_CMD(tbl_cfg, value)		\</div><div class='add'>+	FIELD_MODIFY(PPE_VSI_W1_NEW_ADDR_FWD_CMD, (tbl_cfg) + 0x1, value)</div><div class='add'>+#define PPE_VSI_SET_STATION_MOVE_LRN_EN(tbl_cfg, value)		\</div><div class='add'>+	FIELD_MODIFY(PPE_VSI_W1_STATION_MOVE_LRN_EN, (tbl_cfg) + 0x1, value)</div><div class='add'>+#define PPE_VSI_SET_STATION_MOVE_FWD_CMD(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_VSI_W1_STATION_MOVE_FWD_CMD, (tbl_cfg) + 0x1, value)</div><div class='add'>+</div><div class='add'>+/* PPE port control configurations for the traffic to the unicast queues. */</div><div class='add'>+#define PPE_MRU_MTU_CTRL_TBL_ADDR		0x65000</div><div class='add'>+#define PPE_MRU_MTU_CTRL_TBL_ENTRIES		256</div><div class='add'>+#define PPE_MRU_MTU_CTRL_TBL_INC		0x10</div><div class='add'>+#define PPE_MRU_MTU_CTRL_W0_MRU			GENMASK(13, 0)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_W0_MRU_CMD		GENMASK(15, 14)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_W0_MTU			GENMASK(29, 16)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_W0_MTU_CMD		GENMASK(31, 30)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_W1_RX_CNT_EN		BIT(0)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_W1_TX_CNT_EN		BIT(1)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_W1_SRC_PROFILE		GENMASK(3, 2)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_W1_INNER_PREC_LOW	BIT(31)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_W2_INNER_PREC_HIGH	GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+#define PPE_MRU_MTU_CTRL_SET_MRU(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_MRU_MTU_CTRL_W0_MRU, tbl_cfg, value)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_SET_MRU_CMD(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_MRU_MTU_CTRL_W0_MRU_CMD, tbl_cfg, value)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_SET_MTU(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_MRU_MTU_CTRL_W0_MTU, tbl_cfg, value)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_SET_MTU_CMD(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_MRU_MTU_CTRL_W0_MTU_CMD, tbl_cfg, value)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_SET_RX_CNT_EN(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_MRU_MTU_CTRL_W1_RX_CNT_EN, (tbl_cfg) + 0x1, value)</div><div class='add'>+#define PPE_MRU_MTU_CTRL_SET_TX_CNT_EN(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_MRU_MTU_CTRL_W1_TX_CNT_EN, (tbl_cfg) + 0x1, value)</div><div class='add'>+</div><div class='add'>+/* PPE service code configuration for destination port and counter. */</div><div class='add'>+#define PPE_IN_L2_SERVICE_TBL_ADDR		0x66000</div><div class='add'>+#define PPE_IN_L2_SERVICE_TBL_ENTRIES		256</div><div class='add'>+#define PPE_IN_L2_SERVICE_TBL_INC		0x10</div><div class='add'>+#define PPE_IN_L2_SERVICE_TBL_DST_PORT_ID_VALID	BIT(0)</div><div class='add'>+#define PPE_IN_L2_SERVICE_TBL_DST_PORT_ID	GENMASK(4, 1)</div><div class='add'>+#define PPE_IN_L2_SERVICE_TBL_DST_DIRECTION	BIT(5)</div><div class='add'>+#define PPE_IN_L2_SERVICE_TBL_DST_BYPASS_BITMAP	GENMASK(29, 6)</div><div class='add'>+#define PPE_IN_L2_SERVICE_TBL_RX_CNT_EN		BIT(30)</div><div class='add'>+#define PPE_IN_L2_SERVICE_TBL_TX_CNT_EN		BIT(31)</div><div class='add'>+</div><div class='add'>+/* L2 Port configurations */</div><div class='add'>+#define PPE_L2_VP_PORT_TBL_ADDR			0x98000</div><div class='add'>+#define PPE_L2_VP_PORT_TBL_ENTRIES		256</div><div class='add'>+#define PPE_L2_VP_PORT_TBL_INC			0x10</div><div class='add'>+#define PPE_L2_VP_PORT_W0_INVALID_VSI_FWD_EN	BIT(0)</div><div class='add'>+#define PPE_L2_VP_PORT_W0_DST_INFO		GENMASK(9, 2)</div><div class='add'>+</div><div class='add'>+#define PPE_L2_PORT_SET_INVALID_VSI_FWD_EN(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_L2_VP_PORT_W0_INVALID_VSI_FWD_EN, tbl_cfg, value)</div><div class='add'>+#define PPE_L2_PORT_SET_DST_INFO(tbl_cfg, value)		\</div><div class='add'>+	FIELD_MODIFY(PPE_L2_VP_PORT_W0_DST_INFO, tbl_cfg, value)</div><div class='add'>+</div><div class='add'>+/* Port RX and RX drop counters. */</div><div class='add'>+#define PPE_PORT_RX_CNT_TBL_ADDR		0x150000</div><div class='add'>+#define PPE_PORT_RX_CNT_TBL_ENTRIES		256</div><div class='add'>+#define PPE_PORT_RX_CNT_TBL_INC			0x20</div><div class='add'>+</div><div class='add'>+/* Physical port RX and RX drop counters. */</div><div class='add'>+#define PPE_PHY_PORT_RX_CNT_TBL_ADDR		0x156000</div><div class='add'>+#define PPE_PHY_PORT_RX_CNT_TBL_ENTRIES		8</div><div class='add'>+#define PPE_PHY_PORT_RX_CNT_TBL_INC		0x20</div><div class='add'>+</div><div class='add'>+/* Counters for the packet to CPU port. */</div><div class='add'>+#define PPE_DROP_CPU_CNT_TBL_ADDR		0x160000</div><div class='add'>+#define PPE_DROP_CPU_CNT_TBL_ENTRIES		1280</div><div class='add'>+#define PPE_DROP_CPU_CNT_TBL_INC		0x10</div><div class='add'>+</div><div class='add'>+/* VLAN counters. */</div><div class='add'>+#define PPE_VLAN_CNT_TBL_ADDR			0x178000</div><div class='add'>+#define PPE_VLAN_CNT_TBL_ENTRIES		64</div><div class='add'>+#define PPE_VLAN_CNT_TBL_INC			0x10</div><div class='add'>+</div><div class='add'>+/* PPE L2 counters. */</div><div class='add'>+#define PPE_PRE_L2_CNT_TBL_ADDR			0x17c000</div><div class='add'>+#define PPE_PRE_L2_CNT_TBL_ENTRIES		64</div><div class='add'>+#define PPE_PRE_L2_CNT_TBL_INC			0x20</div><div class='add'>+</div><div class='add'>+/* Port TX drop counters. */</div><div class='add'>+#define PPE_PORT_TX_DROP_CNT_TBL_ADDR		0x17d000</div><div class='add'>+#define PPE_PORT_TX_DROP_CNT_TBL_ENTRIES	8</div><div class='add'>+#define PPE_PORT_TX_DROP_CNT_TBL_INC		0x10</div><div class='add'>+</div><div class='add'>+/* Virtual port TX counters. */</div><div class='add'>+#define PPE_VPORT_TX_DROP_CNT_TBL_ADDR		0x17e000</div><div class='add'>+#define PPE_VPORT_TX_DROP_CNT_TBL_ENTRIES	256</div><div class='add'>+#define PPE_VPORT_TX_DROP_CNT_TBL_INC		0x10</div><div class='add'>+</div><div class='add'>+/* Counters for the tunnel packet. */</div><div class='add'>+#define PPE_TPR_PKT_CNT_TBL_ADDR		0x1d0080</div><div class='add'>+#define PPE_TPR_PKT_CNT_TBL_ENTRIES		8</div><div class='add'>+#define PPE_TPR_PKT_CNT_TBL_INC			4</div><div class='add'>+</div><div class='add'>+/* Counters for the all packet received. */</div><div class='add'>+#define PPE_IPR_PKT_CNT_TBL_ADDR		0x1e0080</div><div class='add'>+#define PPE_IPR_PKT_CNT_TBL_ENTRIES		8</div><div class='add'>+#define PPE_IPR_PKT_CNT_TBL_INC			4</div><div class='add'>+</div><div class='add'>+/* PPE service code configuration for the tunnel packet. */</div><div class='add'>+#define PPE_TL_SERVICE_TBL_ADDR			0x306000</div><div class='add'>+#define PPE_TL_SERVICE_TBL_ENTRIES		256</div><div class='add'>+#define PPE_TL_SERVICE_TBL_INC			4</div><div class='add'>+#define PPE_TL_SERVICE_TBL_BYPASS_BITMAP	GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+/* Port scheduler global config. */</div><div class='add'>+#define PPE_PSCH_SCH_DEPTH_CFG_ADDR		0x400000</div><div class='add'>+#define PPE_PSCH_SCH_DEPTH_CFG_INC		4</div><div class='add'>+#define PPE_PSCH_SCH_DEPTH_CFG_SCH_DEPTH	GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+/* PPE queue level scheduler configurations. */</div><div class='add'>+#define PPE_L0_FLOW_MAP_TBL_ADDR		0x402000</div><div class='add'>+#define PPE_L0_FLOW_MAP_TBL_ENTRIES		300</div><div class='add'>+#define PPE_L0_FLOW_MAP_TBL_INC			0x10</div><div class='add'>+#define PPE_L0_FLOW_MAP_TBL_FLOW_ID		GENMASK(5, 0)</div><div class='add'>+#define PPE_L0_FLOW_MAP_TBL_C_PRI		GENMASK(8, 6)</div><div class='add'>+#define PPE_L0_FLOW_MAP_TBL_E_PRI		GENMASK(11, 9)</div><div class='add'>+#define PPE_L0_FLOW_MAP_TBL_C_NODE_WT		GENMASK(21, 12)</div><div class='add'>+#define PPE_L0_FLOW_MAP_TBL_E_NODE_WT		GENMASK(31, 22)</div><div class='add'>+</div><div class='add'>+#define PPE_L0_C_FLOW_CFG_TBL_ADDR		0x404000</div><div class='add'>+#define PPE_L0_C_FLOW_CFG_TBL_ENTRIES		512</div><div class='add'>+#define PPE_L0_C_FLOW_CFG_TBL_INC		0x10</div><div class='add'>+#define PPE_L0_C_FLOW_CFG_TBL_NODE_ID		GENMASK(7, 0)</div><div class='add'>+#define PPE_L0_C_FLOW_CFG_TBL_NODE_CREDIT_UNIT	BIT(8)</div><div class='add'>+</div><div class='add'>+#define PPE_L0_E_FLOW_CFG_TBL_ADDR		0x406000</div><div class='add'>+#define PPE_L0_E_FLOW_CFG_TBL_ENTRIES		512</div><div class='add'>+#define PPE_L0_E_FLOW_CFG_TBL_INC		0x10</div><div class='add'>+#define PPE_L0_E_FLOW_CFG_TBL_NODE_ID		GENMASK(7, 0)</div><div class='add'>+#define PPE_L0_E_FLOW_CFG_TBL_NODE_CREDIT_UNIT	BIT(8)</div><div class='add'>+</div><div class='add'>+#define PPE_L0_FLOW_PORT_MAP_TBL_ADDR		0x408000</div><div class='add'>+#define PPE_L0_FLOW_PORT_MAP_TBL_ENTRIES	300</div><div class='add'>+#define PPE_L0_FLOW_PORT_MAP_TBL_INC		0x10</div><div class='add'>+#define PPE_L0_FLOW_PORT_MAP_TBL_PORT_NUM	GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define PPE_L0_COMP_CFG_TBL_ADDR		0x428000</div><div class='add'>+#define PPE_L0_COMP_CFG_TBL_ENTRIES		300</div><div class='add'>+#define PPE_L0_COMP_CFG_TBL_INC			0x10</div><div class='add'>+#define PPE_L0_COMP_CFG_TBL_SHAPER_METER_LEN	GENMASK(1, 0)</div><div class='add'>+#define PPE_L0_COMP_CFG_TBL_NODE_METER_LEN	GENMASK(3, 2)</div><div class='add'>+</div><div class='add'>+/* PPE queue to Ethernet DMA ring mapping table. */</div><div class='add'>+#define PPE_RING_Q_MAP_TBL_ADDR			0x42a000</div><div class='add'>+#define PPE_RING_Q_MAP_TBL_ENTRIES		24</div><div class='add'>+#define PPE_RING_Q_MAP_TBL_INC			0x40</div><div class='add'>+</div><div class='add'>+/* Table addresses for per-queue dequeue setting. */</div><div class='add'>+#define PPE_DEQ_OPR_TBL_ADDR			0x430000</div><div class='add'>+#define PPE_DEQ_OPR_TBL_ENTRIES			300</div><div class='add'>+#define PPE_DEQ_OPR_TBL_INC			0x10</div><div class='add'>+#define PPE_DEQ_OPR_TBL_DEQ_DISABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+/* PPE flow level scheduler configurations. */</div><div class='add'>+#define PPE_L1_FLOW_MAP_TBL_ADDR		0x440000</div><div class='add'>+#define PPE_L1_FLOW_MAP_TBL_ENTRIES		64</div><div class='add'>+#define PPE_L1_FLOW_MAP_TBL_INC			0x10</div><div class='add'>+#define PPE_L1_FLOW_MAP_TBL_FLOW_ID		GENMASK(3, 0)</div><div class='add'>+#define PPE_L1_FLOW_MAP_TBL_C_PRI		GENMASK(6, 4)</div><div class='add'>+#define PPE_L1_FLOW_MAP_TBL_E_PRI		GENMASK(9, 7)</div><div class='add'>+#define PPE_L1_FLOW_MAP_TBL_C_NODE_WT		GENMASK(19, 10)</div><div class='add'>+#define PPE_L1_FLOW_MAP_TBL_E_NODE_WT		GENMASK(29, 20)</div><div class='add'>+</div><div class='add'>+#define PPE_L1_C_FLOW_CFG_TBL_ADDR		0x442000</div><div class='add'>+#define PPE_L1_C_FLOW_CFG_TBL_ENTRIES		64</div><div class='add'>+#define PPE_L1_C_FLOW_CFG_TBL_INC		0x10</div><div class='add'>+#define PPE_L1_C_FLOW_CFG_TBL_NODE_ID		GENMASK(5, 0)</div><div class='add'>+#define PPE_L1_C_FLOW_CFG_TBL_NODE_CREDIT_UNIT	BIT(6)</div><div class='add'>+</div><div class='add'>+#define PPE_L1_E_FLOW_CFG_TBL_ADDR		0x444000</div><div class='add'>+#define PPE_L1_E_FLOW_CFG_TBL_ENTRIES		64</div><div class='add'>+#define PPE_L1_E_FLOW_CFG_TBL_INC		0x10</div><div class='add'>+#define PPE_L1_E_FLOW_CFG_TBL_NODE_ID		GENMASK(5, 0)</div><div class='add'>+#define PPE_L1_E_FLOW_CFG_TBL_NODE_CREDIT_UNIT	BIT(6)</div><div class='add'>+</div><div class='add'>+#define PPE_L1_FLOW_PORT_MAP_TBL_ADDR		0x446000</div><div class='add'>+#define PPE_L1_FLOW_PORT_MAP_TBL_ENTRIES	64</div><div class='add'>+#define PPE_L1_FLOW_PORT_MAP_TBL_INC		0x10</div><div class='add'>+#define PPE_L1_FLOW_PORT_MAP_TBL_PORT_NUM	GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define PPE_L1_COMP_CFG_TBL_ADDR		0x46a000</div><div class='add'>+#define PPE_L1_COMP_CFG_TBL_ENTRIES		64</div><div class='add'>+#define PPE_L1_COMP_CFG_TBL_INC			0x10</div><div class='add'>+#define PPE_L1_COMP_CFG_TBL_SHAPER_METER_LEN	GENMASK(1, 0)</div><div class='add'>+#define PPE_L1_COMP_CFG_TBL_NODE_METER_LEN	GENMASK(3, 2)</div><div class='add'>+</div><div class='add'>+/* PPE port scheduler configurations for egress. */</div><div class='add'>+#define PPE_PSCH_SCH_CFG_TBL_ADDR		0x47a000</div><div class='add'>+#define PPE_PSCH_SCH_CFG_TBL_ENTRIES		128</div><div class='add'>+#define PPE_PSCH_SCH_CFG_TBL_INC		0x10</div><div class='add'>+#define PPE_PSCH_SCH_CFG_TBL_DES_PORT		GENMASK(3, 0)</div><div class='add'>+#define PPE_PSCH_SCH_CFG_TBL_ENS_PORT		GENMASK(7, 4)</div><div class='add'>+#define PPE_PSCH_SCH_CFG_TBL_ENS_PORT_BITMAP	GENMASK(15, 8)</div><div class='add'>+#define PPE_PSCH_SCH_CFG_TBL_DES_SECOND_PORT_EN	BIT(16)</div><div class='add'>+#define PPE_PSCH_SCH_CFG_TBL_DES_SECOND_PORT	GENMASK(20, 17)</div><div class='add'>+</div><div class='add'>+/* There are 15 BM ports and 4 BM groups supported by PPE.</div><div class='add'>+ * BM port (0-7) is for EDMA port 0, BM port (8-13) is for</div><div class='add'>+ * PPE physical port 1-6 and BM port 14 is for EIP port.</div><div class='add'>+ */</div><div class='add'>+#define PPE_BM_PORT_FC_MODE_ADDR		0x600100</div><div class='add'>+#define PPE_BM_PORT_FC_MODE_ENTRIES		15</div><div class='add'>+#define PPE_BM_PORT_FC_MODE_INC			0x4</div><div class='add'>+#define PPE_BM_PORT_FC_MODE_EN			BIT(0)</div><div class='add'>+</div><div class='add'>+#define PPE_BM_PORT_GROUP_ID_ADDR		0x600180</div><div class='add'>+#define PPE_BM_PORT_GROUP_ID_ENTRIES		15</div><div class='add'>+#define PPE_BM_PORT_GROUP_ID_INC		0x4</div><div class='add'>+#define PPE_BM_PORT_GROUP_ID_SHARED_GROUP_ID	GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+/* Counters for PPE buffers used for packets cached. */</div><div class='add'>+#define PPE_BM_USED_CNT_TBL_ADDR		0x6001c0</div><div class='add'>+#define PPE_BM_USED_CNT_TBL_ENTRIES		15</div><div class='add'>+#define PPE_BM_USED_CNT_TBL_INC			0x4</div><div class='add'>+#define PPE_BM_USED_CNT_VAL			GENMASK(10, 0)</div><div class='add'>+</div><div class='add'>+/* Counters for PPE buffers used for packets received after pause frame sent. */</div><div class='add'>+#define PPE_BM_REACT_CNT_TBL_ADDR		0x600240</div><div class='add'>+#define PPE_BM_REACT_CNT_TBL_ENTRIES		15</div><div class='add'>+#define PPE_BM_REACT_CNT_TBL_INC		0x4</div><div class='add'>+#define PPE_BM_REACT_CNT_VAL			GENMASK(8, 0)</div><div class='add'>+</div><div class='add'>+#define PPE_BM_SHARED_GROUP_CFG_ADDR		0x600290</div><div class='add'>+#define PPE_BM_SHARED_GROUP_CFG_ENTRIES		4</div><div class='add'>+#define PPE_BM_SHARED_GROUP_CFG_INC		0x4</div><div class='add'>+#define PPE_BM_SHARED_GROUP_CFG_SHARED_LIMIT	GENMASK(10, 0)</div><div class='add'>+</div><div class='add'>+#define PPE_BM_PORT_FC_CFG_TBL_ADDR		0x601000</div><div class='add'>+#define PPE_BM_PORT_FC_CFG_TBL_ENTRIES		15</div><div class='add'>+#define PPE_BM_PORT_FC_CFG_TBL_INC		0x10</div><div class='add'>+#define PPE_BM_PORT_FC_W0_REACT_LIMIT		GENMASK(8, 0)</div><div class='add'>+#define PPE_BM_PORT_FC_W0_RESUME_THRESHOLD	GENMASK(17, 9)</div><div class='add'>+#define PPE_BM_PORT_FC_W0_RESUME_OFFSET		GENMASK(28, 18)</div><div class='add'>+#define PPE_BM_PORT_FC_W0_CEILING_LOW		GENMASK(31, 29)</div><div class='add'>+#define PPE_BM_PORT_FC_W1_CEILING_HIGH		GENMASK(7, 0)</div><div class='add'>+#define PPE_BM_PORT_FC_W1_WEIGHT		GENMASK(10, 8)</div><div class='add'>+#define PPE_BM_PORT_FC_W1_DYNAMIC		BIT(11)</div><div class='add'>+#define PPE_BM_PORT_FC_W1_PRE_ALLOC		GENMASK(22, 12)</div><div class='add'>+</div><div class='add'>+#define PPE_BM_PORT_FC_SET_REACT_LIMIT(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_BM_PORT_FC_W0_REACT_LIMIT, tbl_cfg, value)</div><div class='add'>+#define PPE_BM_PORT_FC_SET_RESUME_THRESHOLD(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_BM_PORT_FC_W0_RESUME_THRESHOLD, tbl_cfg, value)</div><div class='add'>+#define PPE_BM_PORT_FC_SET_RESUME_OFFSET(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_BM_PORT_FC_W0_RESUME_OFFSET, tbl_cfg, value)</div><div class='add'>+#define PPE_BM_PORT_FC_SET_CEILING_LOW(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_BM_PORT_FC_W0_CEILING_LOW, tbl_cfg, value)</div><div class='add'>+#define PPE_BM_PORT_FC_SET_CEILING_HIGH(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_BM_PORT_FC_W1_CEILING_HIGH, (tbl_cfg) + 0x1, value)</div><div class='add'>+#define PPE_BM_PORT_FC_SET_WEIGHT(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_BM_PORT_FC_W1_WEIGHT, (tbl_cfg) + 0x1, value)</div><div class='add'>+#define PPE_BM_PORT_FC_SET_DYNAMIC(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_BM_PORT_FC_W1_DYNAMIC, (tbl_cfg) + 0x1, value)</div><div class='add'>+#define PPE_BM_PORT_FC_SET_PRE_ALLOC(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_BM_PORT_FC_W1_PRE_ALLOC, (tbl_cfg) + 0x1, value)</div><div class='add'>+</div><div class='add'>+/* The queue base configurations based on destination port,</div><div class='add'>+ * service code or CPU code.</div><div class='add'>+ */</div><div class='add'>+#define PPE_UCAST_QUEUE_MAP_TBL_ADDR		0x810000</div><div class='add'>+#define PPE_UCAST_QUEUE_MAP_TBL_ENTRIES		3072</div><div class='add'>+#define PPE_UCAST_QUEUE_MAP_TBL_INC		0x10</div><div class='add'>+#define PPE_UCAST_QUEUE_MAP_TBL_PROFILE_ID	GENMASK(3, 0)</div><div class='add'>+#define PPE_UCAST_QUEUE_MAP_TBL_QUEUE_ID	GENMASK(11, 4)</div><div class='add'>+</div><div class='add'>+/* The queue offset configurations based on RSS hash value. */</div><div class='add'>+#define PPE_UCAST_HASH_MAP_TBL_ADDR		0x830000</div><div class='add'>+#define PPE_UCAST_HASH_MAP_TBL_ENTRIES		4096</div><div class='add'>+#define PPE_UCAST_HASH_MAP_TBL_INC		0x10</div><div class='add'>+#define PPE_UCAST_HASH_MAP_TBL_HASH		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+/* The queue offset configurations based on PPE internal priority. */</div><div class='add'>+#define PPE_UCAST_PRIORITY_MAP_TBL_ADDR		0x842000</div><div class='add'>+#define PPE_UCAST_PRIORITY_MAP_TBL_ENTRIES	256</div><div class='add'>+#define PPE_UCAST_PRIORITY_MAP_TBL_INC		0x10</div><div class='add'>+#define PPE_UCAST_PRIORITY_MAP_TBL_CLASS	GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+/* PPE unicast queue (0-255) configurations. */</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_TBL_ADDR	0x848000</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_TBL_ENTRIES	256</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_TBL_INC	0x10</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_W0_EN		BIT(0)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_W0_WRED_EN	BIT(1)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_W0_FC_EN	BIT(2)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_W0_CLR_AWARE	BIT(3)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_W0_GRP_ID	GENMASK(5, 4)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_W0_PRE_LIMIT	GENMASK(16, 6)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_W0_DYNAMIC	BIT(17)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_W0_WEIGHT	GENMASK(20, 18)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_W0_THRESHOLD	GENMASK(31, 21)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CFG_W3_GRN_RESUME	GENMASK(23, 13)</div><div class='add'>+</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_SET_EN(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_UNICAST_QUEUE_CFG_W0_EN, tbl_cfg, value)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_SET_GRP_ID(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_UNICAST_QUEUE_CFG_W0_GRP_ID, tbl_cfg, value)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_SET_PRE_LIMIT(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_UNICAST_QUEUE_CFG_W0_PRE_LIMIT, tbl_cfg, value)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_SET_DYNAMIC(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_UNICAST_QUEUE_CFG_W0_DYNAMIC, tbl_cfg, value)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_SET_WEIGHT(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_UNICAST_QUEUE_CFG_W0_WEIGHT, tbl_cfg, value)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_SET_THRESHOLD(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_UNICAST_QUEUE_CFG_W0_THRESHOLD, tbl_cfg, value)</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_SET_GRN_RESUME(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_UNICAST_QUEUE_CFG_W3_GRN_RESUME, (tbl_cfg) + 0x3, value)</div><div class='add'>+</div><div class='add'>+/* PPE multicast queue (256-299) configurations. */</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CFG_TBL_ADDR	0x84a000</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CFG_TBL_ENTRIES	44</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CFG_TBL_INC	0x10</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CFG_W0_EN	BIT(0)</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CFG_W0_FC_EN	BIT(1)</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CFG_W0_CLR_AWARE	BIT(2)</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CFG_W0_GRP_ID	GENMASK(4, 3)</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CFG_W0_PRE_LIMIT	GENMASK(15, 5)</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CFG_W0_THRESHOLD	GENMASK(26, 16)</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CFG_W2_RESUME	GENMASK(17, 7)</div><div class='add'>+</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_SET_EN(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_MULTICAST_QUEUE_CFG_W0_EN, tbl_cfg, value)</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_SET_GRN_GRP_ID(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_MULTICAST_QUEUE_CFG_W0_GRP_ID, tbl_cfg, value)</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_SET_GRN_PRE_LIMIT(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_MULTICAST_QUEUE_CFG_W0_PRE_LIMIT, tbl_cfg, value)</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_SET_GRN_THRESHOLD(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_MULTICAST_QUEUE_CFG_W0_THRESHOLD, tbl_cfg, value)</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_SET_GRN_RESUME(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_MULTICAST_QUEUE_CFG_W2_RESUME, (tbl_cfg) + 0x2, value)</div><div class='add'>+</div><div class='add'>+/* PPE admission control group (0-3) configurations */</div><div class='add'>+#define PPE_AC_GRP_CFG_TBL_ADDR			0x84c000</div><div class='add'>+#define PPE_AC_GRP_CFG_TBL_ENTRIES		0x4</div><div class='add'>+#define PPE_AC_GRP_CFG_TBL_INC			0x10</div><div class='add'>+#define PPE_AC_GRP_W0_AC_EN			BIT(0)</div><div class='add'>+#define PPE_AC_GRP_W0_AC_FC_EN			BIT(1)</div><div class='add'>+#define PPE_AC_GRP_W0_CLR_AWARE			BIT(2)</div><div class='add'>+#define PPE_AC_GRP_W0_THRESHOLD_LOW		GENMASK(31, 25)</div><div class='add'>+#define PPE_AC_GRP_W1_THRESHOLD_HIGH		GENMASK(3, 0)</div><div class='add'>+#define PPE_AC_GRP_W1_BUF_LIMIT			GENMASK(14, 4)</div><div class='add'>+#define PPE_AC_GRP_W2_RESUME_GRN		GENMASK(15, 5)</div><div class='add'>+#define PPE_AC_GRP_W2_PRE_ALLOC			GENMASK(26, 16)</div><div class='add'>+</div><div class='add'>+#define PPE_AC_GRP_SET_BUF_LIMIT(tbl_cfg, value)	\</div><div class='add'>+	FIELD_MODIFY(PPE_AC_GRP_W1_BUF_LIMIT, (tbl_cfg) + 0x1, value)</div><div class='add'>+</div><div class='add'>+/* Counters for packets handled by unicast queues (0-255). */</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CNT_TBL_ADDR	0x84e000</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CNT_TBL_ENTRIES	256</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CNT_TBL_INC	0x10</div><div class='add'>+#define PPE_AC_UNICAST_QUEUE_CNT_TBL_PEND_CNT	GENMASK(12, 0)</div><div class='add'>+</div><div class='add'>+/* Counters for packets handled by multicast queues (256-299). */</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CNT_TBL_ADDR	0x852000</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CNT_TBL_ENTRIES	44</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CNT_TBL_INC	0x10</div><div class='add'>+#define PPE_AC_MULTICAST_QUEUE_CNT_TBL_PEND_CNT	GENMASK(12, 0)</div><div class='add'>+</div><div class='add'>+/* Table addresses for per-queue enqueue setting. */</div><div class='add'>+#define PPE_ENQ_OPR_TBL_ADDR			0x85c000</div><div class='add'>+#define PPE_ENQ_OPR_TBL_ENTRIES			300</div><div class='add'>+#define PPE_ENQ_OPR_TBL_INC			0x10</div><div class='add'>+#define PPE_ENQ_OPR_TBL_ENQ_DISABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+/* Unicast drop count includes the possible drops with WRED for the green,</div><div class='add'>+ * yellow and red categories.</div><div class='add'>+ */</div><div class='add'>+#define PPE_UNICAST_DROP_CNT_TBL_ADDR		0x9e0000</div><div class='add'>+#define PPE_UNICAST_DROP_CNT_TBL_ENTRIES	1536</div><div class='add'>+#define PPE_UNICAST_DROP_CNT_TBL_INC		0x10</div><div class='add'>+#define PPE_UNICAST_DROP_TYPES			6</div><div class='add'>+#define PPE_UNICAST_DROP_FORCE_OFFSET		3</div><div class='add'>+</div><div class='add'>+/* There are 16 multicast queues dedicated to CPU port 0. Multicast drop</div><div class='add'>+ * count includes the force drop for green, yellow and red category packets.</div><div class='add'>+ */</div><div class='add'>+#define PPE_P0_MULTICAST_DROP_CNT_TBL_ADDR	0x9f0000</div><div class='add'>+#define PPE_P0_MULTICAST_DROP_CNT_TBL_ENTRIES	48</div><div class='add'>+#define PPE_P0_MULTICAST_DROP_CNT_TBL_INC	0x10</div><div class='add'>+#define PPE_P0_MULTICAST_QUEUE_NUM		16</div><div class='add'>+</div><div class='add'>+/* Each PPE physical port has four dedicated multicast queues, providing</div><div class='add'>+ * a total of 12 entries per port. The multicast drop count includes forced</div><div class='add'>+ * drops for green, yellow, and red category packets.</div><div class='add'>+ */</div><div class='add'>+#define PPE_MULTICAST_QUEUE_PORT_ADDR_INC	0x1000</div><div class='add'>+#define PPE_MULTICAST_DROP_CNT_TBL_INC		0x10</div><div class='add'>+#define PPE_MULTICAST_DROP_TYPES		3</div><div class='add'>+#define PPE_MULTICAST_QUEUE_NUM			4</div><div class='add'>+#define PPE_MULTICAST_DROP_CNT_TBL_ENTRIES	12</div><div class='add'>+</div><div class='add'>+#define PPE_CPU_PORT_MULTICAST_FORCE_DROP_CNT_TBL_ADDR(mq_offset)	\</div><div class='add'>+	(PPE_P0_MULTICAST_DROP_CNT_TBL_ADDR +				\</div><div class='add'>+	 (mq_offset) * PPE_P0_MULTICAST_DROP_CNT_TBL_INC *		\</div><div class='add'>+	 PPE_MULTICAST_DROP_TYPES)</div><div class='add'>+</div><div class='add'>+#define PPE_P1_MULTICAST_DROP_CNT_TBL_ADDR	\</div><div class='add'>+	(PPE_P0_MULTICAST_DROP_CNT_TBL_ADDR + PPE_MULTICAST_QUEUE_PORT_ADDR_INC)</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/qca_spi.c b/drivers/net/ethernet/qualcomm/qca_spi.c<br/>index ef9c02b000e4..38a779f4b866 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/qca_spi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/qca_spi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/qca_spi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/qca_spi.c</a></div><div class='hunk'>@@ -54,7 +54,7 @@ MODULE_PARM_DESC(qcaspi_burst_len, "Number of data bytes per burst. Use 1-5000."</div><div class='ctx'> </div><div class='ctx'> #define QCASPI_PLUGGABLE_MIN 0</div><div class='ctx'> #define QCASPI_PLUGGABLE_MAX 1</div><div class='del'>-static int qcaspi_pluggable = QCASPI_PLUGGABLE_MIN;</div><div class='add'>+static int qcaspi_pluggable = QCASPI_PLUGGABLE_MAX;</div><div class='ctx'> module_param(qcaspi_pluggable, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(qcaspi_pluggable, "Pluggable SPI connection (yes/no).");</div><div class='ctx'> </div><div class='hunk'>@@ -818,7 +818,6 @@ qcaspi_netdev_init(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;mtu = QCAFRM_MAX_MTU;</div><div class='ctx'> 	dev-&gt;type = ARPHRD_ETHER;</div><div class='del'>-	qca-&gt;clkspeed = qcaspi_clkspeed;</div><div class='ctx'> 	qca-&gt;burst_len = qcaspi_burst_len;</div><div class='ctx'> 	qca-&gt;spi_thread = NULL;</div><div class='ctx'> 	qca-&gt;buffer_size = (QCAFRM_MAX_MTU + VLAN_ETH_HLEN + QCAFRM_HEADER_LEN +</div><div class='hunk'>@@ -909,17 +908,15 @@ qca_spi_probe(struct spi_device *spi)</div><div class='ctx'> 	legacy_mode = of_property_read_bool(spi-&gt;dev.of_node,</div><div class='ctx'> 					    "qca,legacy-mode");</div><div class='ctx'> </div><div class='del'>-	if (qcaspi_clkspeed == 0) {</div><div class='del'>-		if (spi-&gt;max_speed_hz)</div><div class='del'>-			qcaspi_clkspeed = spi-&gt;max_speed_hz;</div><div class='del'>-		else</div><div class='del'>-			qcaspi_clkspeed = QCASPI_CLK_SPEED;</div><div class='del'>-	}</div><div class='add'>+	if (qcaspi_clkspeed)</div><div class='add'>+		spi-&gt;max_speed_hz = qcaspi_clkspeed;</div><div class='add'>+	else if (!spi-&gt;max_speed_hz)</div><div class='add'>+		spi-&gt;max_speed_hz = QCASPI_CLK_SPEED;</div><div class='ctx'> </div><div class='del'>-	if ((qcaspi_clkspeed &lt; QCASPI_CLK_SPEED_MIN) ||</div><div class='del'>-	    (qcaspi_clkspeed &gt; QCASPI_CLK_SPEED_MAX)) {</div><div class='del'>-		dev_err(&amp;spi-&gt;dev, "Invalid clkspeed: %d\n",</div><div class='del'>-			qcaspi_clkspeed);</div><div class='add'>+	if (spi-&gt;max_speed_hz &lt; QCASPI_CLK_SPEED_MIN ||</div><div class='add'>+	    spi-&gt;max_speed_hz &gt; QCASPI_CLK_SPEED_MAX) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Invalid clkspeed: %u\n",</div><div class='add'>+			spi-&gt;max_speed_hz);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -944,14 +941,13 @@ qca_spi_probe(struct spi_device *spi)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_info(&amp;spi-&gt;dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n",</div><div class='add'>+	dev_info(&amp;spi-&gt;dev, "ver=%s, clkspeed=%u, burst_len=%d, pluggable=%d\n",</div><div class='ctx'> 		 QCASPI_DRV_VERSION,</div><div class='del'>-		 qcaspi_clkspeed,</div><div class='add'>+		 spi-&gt;max_speed_hz,</div><div class='ctx'> 		 qcaspi_burst_len,</div><div class='ctx'> 		 qcaspi_pluggable);</div><div class='ctx'> </div><div class='ctx'> 	spi-&gt;mode = SPI_MODE_3;</div><div class='del'>-	spi-&gt;max_speed_hz = qcaspi_clkspeed;</div><div class='ctx'> 	if (spi_setup(spi) &lt; 0) {</div><div class='ctx'> 		dev_err(&amp;spi-&gt;dev, "Unable to setup SPI device\n");</div><div class='ctx'> 		return -EFAULT;</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/qca_spi.h b/drivers/net/ethernet/qualcomm/qca_spi.h<br/>index 7ba5c9e2f61c..90b290f94c27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/qca_spi.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/qca_spi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/qca_spi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/qca_spi.h</a></div><div class='hunk'>@@ -89,7 +89,6 @@ struct qcaspi {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	/* user configurable options */</div><div class='del'>-	u32 clkspeed;</div><div class='ctx'> 	u8 legacy_mode;</div><div class='ctx'> 	u16 burst_len;</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c b/drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c<br/>index f3bea196a8f9..ba8763cac9d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c</a></div><div class='hunk'>@@ -117,11 +117,14 @@ static void rmnet_unregister_bridge(struct rmnet_port *port)</div><div class='ctx'> 	rmnet_unregister_real_device(bridge_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rmnet_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-			 struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int rmnet_newlink(struct net_device *dev,</div><div class='add'>+			 struct rtnl_newlink_params *params,</div><div class='ctx'> 			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='ctx'> 	u32 data_format = RMNET_FLAGS_INGRESS_DEAGGREGATION;</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	struct net_device *real_dev;</div><div class='ctx'> 	int mode = RMNET_EPMODE_VND;</div><div class='ctx'> 	struct rmnet_endpoint *ep;</div><div class='hunk'>@@ -134,7 +137,7 @@ static int rmnet_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	real_dev = __dev_get_by_index(src_net, nla_get_u32(tb[IFLA_LINK]));</div><div class='add'>+	real_dev = __dev_get_by_index(link_net, nla_get_u32(tb[IFLA_LINK]));</div><div class='ctx'> 	if (!real_dev) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "link does not exist");</div><div class='ctx'> 		return -ENODEV;</div><div class='head'>diff --git a/drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c b/drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c<br/>index a5e3d1a88305..8b4640c5d61e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c</a></div><div class='hunk'>@@ -686,8 +686,8 @@ void rmnet_map_update_ul_agg_config(struct rmnet_port *port, u32 size,</div><div class='ctx'> </div><div class='ctx'> void rmnet_map_tx_aggregate_init(struct rmnet_port *port)</div><div class='ctx'> {</div><div class='del'>-	hrtimer_init(&amp;port-&gt;hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-	port-&gt;hrtimer.function = rmnet_map_flush_tx_packet_queue;</div><div class='add'>+	hrtimer_setup(&amp;port-&gt;hrtimer, rmnet_map_flush_tx_packet_queue, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='ctx'> 	spin_lock_init(&amp;port-&gt;agg_lock);</div><div class='ctx'> 	rmnet_map_update_ul_agg_config(port, 4096, 1, 800);</div><div class='ctx'> 	INIT_WORK(&amp;port-&gt;agg_wq, rmnet_map_flush_tx_packet_work);</div><div class='head'>diff --git a/drivers/net/ethernet/realtek/8139too.c b/drivers/net/ethernet/realtek/8139too.c<br/>index 9ce0e8a64ba8..a73dcaffa8c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/8139too.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/8139too.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/8139too.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/realtek/8139too.c</a></div><div class='hunk'>@@ -1684,6 +1684,7 @@ static void rtl8139_tx_timeout_task (struct work_struct *work)</div><div class='ctx'> 	if (tmp8 &amp; CmdTxEnb)</div><div class='ctx'> 		RTL_W8 (ChipCmd, CmdRxEnb);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	spin_lock_bh(&amp;tp-&gt;rx_lock);</div><div class='ctx'> 	/* Disable interrupts by clearing the interrupt mask. */</div><div class='ctx'> 	RTL_W16 (IntrMask, 0x0000);</div><div class='hunk'>@@ -1694,11 +1695,12 @@ static void rtl8139_tx_timeout_task (struct work_struct *work)</div><div class='ctx'> 	spin_unlock_irq(&amp;tp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* ...and finally, reset everything */</div><div class='del'>-	napi_enable(&amp;tp-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;tp-&gt;napi);</div><div class='ctx'> 	rtl8139_hw_start(dev);</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;tp-&gt;rx_lock);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl8139_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='head'>diff --git a/drivers/net/ethernet/realtek/Kconfig b/drivers/net/ethernet/realtek/Kconfig<br/>index 8a8ea51c639e..272c83bfdc6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/realtek/Kconfig</a></div><div class='hunk'>@@ -58,7 +58,7 @@ config 8139TOO</div><div class='ctx'> config 8139TOO_PIO</div><div class='ctx'> 	bool "Use PIO instead of MMIO"</div><div class='ctx'> 	default y</div><div class='del'>-	depends on 8139TOO</div><div class='add'>+	depends on 8139TOO &amp;&amp; !NO_IOPORT_MAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  This instructs the driver to use programmed I/O ports (PIO) instead</div><div class='ctx'> 	  of PCI shared memory (MMIO).  This can possibly solve some problems</div><div class='hunk'>@@ -114,7 +114,8 @@ config R8169</div><div class='ctx'> 	  will be called r8169.  This is recommended.</div><div class='ctx'> </div><div class='ctx'> config R8169_LEDS</div><div class='del'>-	def_bool R8169 &amp;&amp; LEDS_TRIGGER_NETDEV</div><div class='add'>+	bool "Support for controlling the NIC LEDs"</div><div class='add'>+	depends on R8169 &amp;&amp; LEDS_TRIGGER_NETDEV</div><div class='ctx'> 	depends on !(R8169=y &amp;&amp; LEDS_CLASS=m)</div><div class='ctx'> 	help</div><div class='ctx'> 	  Optional support for controlling the NIC LED's with the netdev</div><div class='head'>diff --git a/drivers/net/ethernet/realtek/atp.c b/drivers/net/ethernet/realtek/atp.c<br/>index 6cbcb3164367..0d65434982a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/atp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/atp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/atp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/realtek/atp.c</a></div><div class='hunk'>@@ -717,7 +717,7 @@ static irqreturn_t atp_interrupt(int irq, void *dev_instance)</div><div class='ctx'>    problem where the adapter forgets its ethernet address. */</div><div class='ctx'> static void atp_timed_checker(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct net_local *lp = from_timer(lp, t, timer);</div><div class='add'>+	struct net_local *lp = timer_container_of(lp, t, timer);</div><div class='ctx'> 	struct net_device *dev = lp-&gt;dev;</div><div class='ctx'> 	long ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	int tickssofar = jiffies - lp-&gt;last_rx_time;</div><div class='hunk'>@@ -832,7 +832,7 @@ net_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;lp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Flush the Tx and disable Rx here. */</div><div class='ctx'> 	lp-&gt;addr_mode = CMR2h_OFF;</div><div class='head'>diff --git a/drivers/net/ethernet/realtek/r8169.h b/drivers/net/ethernet/realtek/r8169.h<br/>index be4c9622618d..2c1a0c21af8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/r8169.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/r8169.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/r8169.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/realtek/r8169.h</a></div><div class='hunk'>@@ -23,7 +23,7 @@ enum mac_version {</div><div class='ctx'> 	RTL_GIGA_MAC_VER_08,</div><div class='ctx'> 	RTL_GIGA_MAC_VER_09,</div><div class='ctx'> 	RTL_GIGA_MAC_VER_10,</div><div class='del'>-	RTL_GIGA_MAC_VER_11,</div><div class='add'>+	/* support for RTL_GIGA_MAC_VER_11 has been removed */</div><div class='ctx'> 	/* RTL_GIGA_MAC_VER_12 was handled the same as VER_17 */</div><div class='ctx'> 	/* RTL_GIGA_MAC_VER_13 was merged with VER_10 */</div><div class='ctx'> 	RTL_GIGA_MAC_VER_14,</div><div class='hunk'>@@ -64,14 +64,15 @@ enum mac_version {</div><div class='ctx'> 	/* support for RTL_GIGA_MAC_VER_50 has been removed */</div><div class='ctx'> 	RTL_GIGA_MAC_VER_51,</div><div class='ctx'> 	RTL_GIGA_MAC_VER_52,</div><div class='del'>-	RTL_GIGA_MAC_VER_53,</div><div class='ctx'> 	/* support for RTL_GIGA_MAC_VER_60 has been removed */</div><div class='ctx'> 	RTL_GIGA_MAC_VER_61,</div><div class='ctx'> 	RTL_GIGA_MAC_VER_63,</div><div class='ctx'> 	RTL_GIGA_MAC_VER_64,</div><div class='del'>-	RTL_GIGA_MAC_VER_65,</div><div class='ctx'> 	RTL_GIGA_MAC_VER_66,</div><div class='del'>-	RTL_GIGA_MAC_NONE</div><div class='add'>+	RTL_GIGA_MAC_VER_70,</div><div class='add'>+	RTL_GIGA_MAC_VER_80,</div><div class='add'>+	RTL_GIGA_MAC_NONE,</div><div class='add'>+	RTL_GIGA_MAC_VER_LAST = RTL_GIGA_MAC_NONE - 1</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct rtl8169_private;</div><div class='head'>diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c<br/>index b84587841e31..405e91eb3141 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/r8169_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/r8169_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/r8169_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/realtek/r8169_main.c</a></div><div class='hunk'>@@ -16,7 +16,6 @@</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='del'>-#include &lt;linux/hwmon.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/in.h&gt;</div><div class='hunk'>@@ -57,8 +56,13 @@</div><div class='ctx'> #define FIRMWARE_8125A_3	"rtl_nic/rtl8125a-3.fw"</div><div class='ctx'> #define FIRMWARE_8125B_2	"rtl_nic/rtl8125b-2.fw"</div><div class='ctx'> #define FIRMWARE_8125D_1	"rtl_nic/rtl8125d-1.fw"</div><div class='add'>+#define FIRMWARE_8125D_2	"rtl_nic/rtl8125d-2.fw"</div><div class='add'>+#define FIRMWARE_8125K_1	"rtl_nic/rtl8125k-1.fw"</div><div class='add'>+#define FIRMWARE_8125BP_2	"rtl_nic/rtl8125bp-2.fw"</div><div class='add'>+#define FIRMWARE_9151A_1	"rtl_nic/rtl9151a-1.fw"</div><div class='ctx'> #define FIRMWARE_8126A_2	"rtl_nic/rtl8126a-2.fw"</div><div class='ctx'> #define FIRMWARE_8126A_3	"rtl_nic/rtl8126a-3.fw"</div><div class='add'>+#define FIRMWARE_8127A_1	"rtl_nic/rtl8127a-1.fw"</div><div class='ctx'> </div><div class='ctx'> #define TX_DMA_BURST	7	/* Maximum PCI burst, '7' is unlimited */</div><div class='ctx'> #define InterFrameGap	0x03	/* 3 means InterFrameGap = the shortest one */</div><div class='hunk'>@@ -88,61 +92,121 @@</div><div class='ctx'> #define JUMBO_6K	(6 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)</div><div class='ctx'> #define JUMBO_7K	(7 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)</div><div class='ctx'> #define JUMBO_9K	(9 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)</div><div class='add'>+#define JUMBO_16K	(SZ_16K - VLAN_ETH_HLEN - ETH_FCS_LEN)</div><div class='ctx'> </div><div class='del'>-static const struct {</div><div class='add'>+static const struct rtl_chip_info {</div><div class='add'>+	u16 mask;</div><div class='add'>+	u16 val;</div><div class='add'>+	enum mac_version mac_version;</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	const char *fw_name;</div><div class='ctx'> } rtl_chip_infos[] = {</div><div class='del'>-	/* PCI devices. */</div><div class='del'>-	[RTL_GIGA_MAC_VER_02] = {"RTL8169s"				},</div><div class='del'>-	[RTL_GIGA_MAC_VER_03] = {"RTL8110s"				},</div><div class='del'>-	[RTL_GIGA_MAC_VER_04] = {"RTL8169sb/8110sb"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_05] = {"RTL8169sc/8110sc"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_06] = {"RTL8169sc/8110sc"			},</div><div class='del'>-	/* PCI-E devices. */</div><div class='del'>-	[RTL_GIGA_MAC_VER_07] = {"RTL8102e"				},</div><div class='del'>-	[RTL_GIGA_MAC_VER_08] = {"RTL8102e"				},</div><div class='del'>-	[RTL_GIGA_MAC_VER_09] = {"RTL8102e/RTL8103e"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_10] = {"RTL8101e/RTL8100e"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_11] = {"RTL8168b/8111b"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_14] = {"RTL8401"				},</div><div class='del'>-	[RTL_GIGA_MAC_VER_17] = {"RTL8168b/8111b"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_18] = {"RTL8168cp/8111cp"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_19] = {"RTL8168c/8111c"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_20] = {"RTL8168c/8111c"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_21] = {"RTL8168c/8111c"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_22] = {"RTL8168c/8111c"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_23] = {"RTL8168cp/8111cp"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_24] = {"RTL8168cp/8111cp"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_25] = {"RTL8168d/8111d",	FIRMWARE_8168D_1},</div><div class='del'>-	[RTL_GIGA_MAC_VER_26] = {"RTL8168d/8111d",	FIRMWARE_8168D_2},</div><div class='del'>-	[RTL_GIGA_MAC_VER_28] = {"RTL8168dp/8111dp"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_29] = {"RTL8105e",		FIRMWARE_8105E_1},</div><div class='del'>-	[RTL_GIGA_MAC_VER_30] = {"RTL8105e",		FIRMWARE_8105E_1},</div><div class='del'>-	[RTL_GIGA_MAC_VER_31] = {"RTL8168dp/8111dp"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_32] = {"RTL8168e/8111e",	FIRMWARE_8168E_1},</div><div class='del'>-	[RTL_GIGA_MAC_VER_33] = {"RTL8168e/8111e",	FIRMWARE_8168E_2},</div><div class='del'>-	[RTL_GIGA_MAC_VER_34] = {"RTL8168evl/8111evl",	FIRMWARE_8168E_3},</div><div class='del'>-	[RTL_GIGA_MAC_VER_35] = {"RTL8168f/8111f",	FIRMWARE_8168F_1},</div><div class='del'>-	[RTL_GIGA_MAC_VER_36] = {"RTL8168f/8111f",	FIRMWARE_8168F_2},</div><div class='del'>-	[RTL_GIGA_MAC_VER_37] = {"RTL8402",		FIRMWARE_8402_1 },</div><div class='del'>-	[RTL_GIGA_MAC_VER_38] = {"RTL8411",		FIRMWARE_8411_1 },</div><div class='del'>-	[RTL_GIGA_MAC_VER_39] = {"RTL8106e",		FIRMWARE_8106E_1},</div><div class='del'>-	[RTL_GIGA_MAC_VER_40] = {"RTL8168g/8111g",	FIRMWARE_8168G_2},</div><div class='del'>-	[RTL_GIGA_MAC_VER_42] = {"RTL8168gu/8111gu",	FIRMWARE_8168G_3},</div><div class='del'>-	[RTL_GIGA_MAC_VER_43] = {"RTL8106eus",		FIRMWARE_8106E_2},</div><div class='del'>-	[RTL_GIGA_MAC_VER_44] = {"RTL8411b",		FIRMWARE_8411_2 },</div><div class='del'>-	[RTL_GIGA_MAC_VER_46] = {"RTL8168h/8111h",	FIRMWARE_8168H_2},</div><div class='del'>-	[RTL_GIGA_MAC_VER_48] = {"RTL8107e",		FIRMWARE_8107E_2},</div><div class='del'>-	[RTL_GIGA_MAC_VER_51] = {"RTL8168ep/8111ep"			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_52] = {"RTL8168fp/RTL8117",  FIRMWARE_8168FP_3},</div><div class='del'>-	[RTL_GIGA_MAC_VER_53] = {"RTL8168fp/RTL8117",			},</div><div class='del'>-	[RTL_GIGA_MAC_VER_61] = {"RTL8125A",		FIRMWARE_8125A_3},</div><div class='del'>-	/* reserve 62 for CFG_METHOD_4 in the vendor driver */</div><div class='del'>-	[RTL_GIGA_MAC_VER_63] = {"RTL8125B",		FIRMWARE_8125B_2},</div><div class='del'>-	[RTL_GIGA_MAC_VER_64] = {"RTL8125D",		FIRMWARE_8125D_1},</div><div class='del'>-	[RTL_GIGA_MAC_VER_65] = {"RTL8126A",		FIRMWARE_8126A_2},</div><div class='del'>-	[RTL_GIGA_MAC_VER_66] = {"RTL8126A",		FIRMWARE_8126A_3},</div><div class='add'>+	/* 8127A family. */</div><div class='add'>+	{ 0x7cf, 0x6c9,	RTL_GIGA_MAC_VER_80, "RTL8127A", FIRMWARE_8127A_1 },</div><div class='add'>+</div><div class='add'>+	/* 8126A family. */</div><div class='add'>+	{ 0x7cf, 0x64a,	RTL_GIGA_MAC_VER_70, "RTL8126A", FIRMWARE_8126A_3 },</div><div class='add'>+	{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_70, "RTL8126A", FIRMWARE_8126A_2 },</div><div class='add'>+</div><div class='add'>+	/* 8125BP family. */</div><div class='add'>+	{ 0x7cf, 0x681,	RTL_GIGA_MAC_VER_66, "RTL8125BP", FIRMWARE_8125BP_2 },</div><div class='add'>+</div><div class='add'>+	/* 8125D family. */</div><div class='add'>+	{ 0x7cf, 0x68b, RTL_GIGA_MAC_VER_64, "RTL9151A", FIRMWARE_9151A_1 },</div><div class='add'>+	{ 0x7cf, 0x68a, RTL_GIGA_MAC_VER_64, "RTL8125K", FIRMWARE_8125K_1 },</div><div class='add'>+	{ 0x7cf, 0x689,	RTL_GIGA_MAC_VER_64, "RTL8125D", FIRMWARE_8125D_2 },</div><div class='add'>+	{ 0x7cf, 0x688,	RTL_GIGA_MAC_VER_64, "RTL8125D", FIRMWARE_8125D_1 },</div><div class='add'>+</div><div class='add'>+	/* 8125B family. */</div><div class='add'>+	{ 0x7cf, 0x641,	RTL_GIGA_MAC_VER_63, "RTL8125B", FIRMWARE_8125B_2 },</div><div class='add'>+</div><div class='add'>+	/* 8125A family. */</div><div class='add'>+	{ 0x7cf, 0x609,	RTL_GIGA_MAC_VER_61, "RTL8125A", FIRMWARE_8125A_3 },</div><div class='add'>+</div><div class='add'>+	/* RTL8117 */</div><div class='add'>+	{ 0x7cf, 0x54b,	RTL_GIGA_MAC_VER_52, "RTL8168fp/RTL8117" },</div><div class='add'>+	{ 0x7cf, 0x54a,	RTL_GIGA_MAC_VER_52, "RTL8168fp/RTL8117",</div><div class='add'>+	  FIRMWARE_8168FP_3 },</div><div class='add'>+</div><div class='add'>+	/* 8168EP family. */</div><div class='add'>+	{ 0x7cf, 0x502,	RTL_GIGA_MAC_VER_51, "RTL8168ep/8111ep" },</div><div class='add'>+</div><div class='add'>+	/* 8168H family. */</div><div class='add'>+	{ 0x7cf, 0x541,	RTL_GIGA_MAC_VER_46, "RTL8168h/8111h",</div><div class='add'>+	  FIRMWARE_8168H_2 },</div><div class='add'>+	/* Realtek calls it RTL8168M, but it's handled like RTL8168H */</div><div class='add'>+	{ 0x7cf, 0x6c0,	RTL_GIGA_MAC_VER_46, "RTL8168M", FIRMWARE_8168H_2 },</div><div class='add'>+</div><div class='add'>+	/* 8168G family. */</div><div class='add'>+	{ 0x7cf, 0x5c8,	RTL_GIGA_MAC_VER_44, "RTL8411b", FIRMWARE_8411_2 },</div><div class='add'>+	{ 0x7cf, 0x509,	RTL_GIGA_MAC_VER_42, "RTL8168gu/8111gu",</div><div class='add'>+	  FIRMWARE_8168G_3 },</div><div class='add'>+	{ 0x7cf, 0x4c0,	RTL_GIGA_MAC_VER_40, "RTL8168g/8111g",</div><div class='add'>+	  FIRMWARE_8168G_2 },</div><div class='add'>+</div><div class='add'>+	/* 8168F family. */</div><div class='add'>+	{ 0x7c8, 0x488,	RTL_GIGA_MAC_VER_38, "RTL8411", FIRMWARE_8411_1 },</div><div class='add'>+	{ 0x7cf, 0x481,	RTL_GIGA_MAC_VER_36, "RTL8168f/8111f",</div><div class='add'>+	  FIRMWARE_8168F_2 },</div><div class='add'>+	{ 0x7cf, 0x480,	RTL_GIGA_MAC_VER_35, "RTL8168f/8111f",</div><div class='add'>+	  FIRMWARE_8168F_1 },</div><div class='add'>+</div><div class='add'>+	/* 8168E family. */</div><div class='add'>+	{ 0x7c8, 0x2c8,	RTL_GIGA_MAC_VER_34, "RTL8168evl/8111evl",</div><div class='add'>+	  FIRMWARE_8168E_3 },</div><div class='add'>+	{ 0x7cf, 0x2c1,	RTL_GIGA_MAC_VER_32, "RTL8168e/8111e",</div><div class='add'>+	  FIRMWARE_8168E_1 },</div><div class='add'>+	{ 0x7c8, 0x2c0,	RTL_GIGA_MAC_VER_33, "RTL8168e/8111e",</div><div class='add'>+	  FIRMWARE_8168E_2 },</div><div class='add'>+</div><div class='add'>+	/* 8168D family. */</div><div class='add'>+	{ 0x7cf, 0x281,	RTL_GIGA_MAC_VER_25, "RTL8168d/8111d",</div><div class='add'>+	  FIRMWARE_8168D_1 },</div><div class='add'>+	{ 0x7c8, 0x280,	RTL_GIGA_MAC_VER_26, "RTL8168d/8111d",</div><div class='add'>+	  FIRMWARE_8168D_2 },</div><div class='add'>+</div><div class='add'>+	/* 8168DP family. */</div><div class='add'>+	{ 0x7cf, 0x28a,	RTL_GIGA_MAC_VER_28, "RTL8168dp/8111dp" },</div><div class='add'>+	{ 0x7cf, 0x28b,	RTL_GIGA_MAC_VER_31, "RTL8168dp/8111dp" },</div><div class='add'>+</div><div class='add'>+	/* 8168C family. */</div><div class='add'>+	{ 0x7cf, 0x3c9,	RTL_GIGA_MAC_VER_23, "RTL8168cp/8111cp" },</div><div class='add'>+	{ 0x7cf, 0x3c8,	RTL_GIGA_MAC_VER_18, "RTL8168cp/8111cp" },</div><div class='add'>+	{ 0x7c8, 0x3c8,	RTL_GIGA_MAC_VER_24, "RTL8168cp/8111cp" },</div><div class='add'>+	{ 0x7cf, 0x3c0,	RTL_GIGA_MAC_VER_19, "RTL8168c/8111c" },</div><div class='add'>+	{ 0x7cf, 0x3c2,	RTL_GIGA_MAC_VER_20, "RTL8168c/8111c" },</div><div class='add'>+	{ 0x7cf, 0x3c3,	RTL_GIGA_MAC_VER_21, "RTL8168c/8111c" },</div><div class='add'>+	{ 0x7c8, 0x3c0,	RTL_GIGA_MAC_VER_22, "RTL8168c/8111c" },</div><div class='add'>+</div><div class='add'>+	/* 8168B family. */</div><div class='add'>+	{ 0x7c8, 0x380,	RTL_GIGA_MAC_VER_17, "RTL8168b/8111b" },</div><div class='add'>+	/* This one is very old and rare, support has been removed.</div><div class='add'>+	 * { 0x7c8, 0x300, RTL_GIGA_MAC_VER_11, "RTL8168b/8111b" },</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* 8101 family. */</div><div class='add'>+	{ 0x7c8, 0x448,	RTL_GIGA_MAC_VER_39, "RTL8106e", FIRMWARE_8106E_1 },</div><div class='add'>+	{ 0x7c8, 0x440,	RTL_GIGA_MAC_VER_37, "RTL8402", FIRMWARE_8402_1 },</div><div class='add'>+	{ 0x7cf, 0x409,	RTL_GIGA_MAC_VER_29, "RTL8105e", FIRMWARE_8105E_1 },</div><div class='add'>+	{ 0x7c8, 0x408,	RTL_GIGA_MAC_VER_30, "RTL8105e", FIRMWARE_8105E_1 },</div><div class='add'>+	{ 0x7cf, 0x349,	RTL_GIGA_MAC_VER_08, "RTL8102e" },</div><div class='add'>+	{ 0x7cf, 0x249,	RTL_GIGA_MAC_VER_08, "RTL8102e" },</div><div class='add'>+	{ 0x7cf, 0x348,	RTL_GIGA_MAC_VER_07, "RTL8102e" },</div><div class='add'>+	{ 0x7cf, 0x248,	RTL_GIGA_MAC_VER_07, "RTL8102e" },</div><div class='add'>+	{ 0x7cf, 0x240,	RTL_GIGA_MAC_VER_14, "RTL8401" },</div><div class='add'>+	{ 0x7c8, 0x348,	RTL_GIGA_MAC_VER_09, "RTL8102e/RTL8103e" },</div><div class='add'>+	{ 0x7c8, 0x248,	RTL_GIGA_MAC_VER_09, "RTL8102e/RTL8103e" },</div><div class='add'>+	{ 0x7c8, 0x340,	RTL_GIGA_MAC_VER_10, "RTL8101e/RTL8100e" },</div><div class='add'>+</div><div class='add'>+	/* 8110 family. */</div><div class='add'>+	{ 0xfc8, 0x980,	RTL_GIGA_MAC_VER_06, "RTL8169sc/8110sc" },</div><div class='add'>+	{ 0xfc8, 0x180,	RTL_GIGA_MAC_VER_05, "RTL8169sc/8110sc" },</div><div class='add'>+	{ 0xfc8, 0x100,	RTL_GIGA_MAC_VER_04, "RTL8169sb/8110sb" },</div><div class='add'>+	{ 0xfc8, 0x040,	RTL_GIGA_MAC_VER_03, "RTL8110s" },</div><div class='add'>+	{ 0xfc8, 0x008,	RTL_GIGA_MAC_VER_02, "RTL8169s" },</div><div class='add'>+</div><div class='add'>+	/* Catch-all */</div><div class='add'>+	{ 0x000, 0x000,	RTL_GIGA_MAC_NONE }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct pci_device_id rtl8169_pci_tbl[] = {</div><div class='hunk'>@@ -156,8 +220,6 @@ static const struct pci_device_id rtl8169_pci_tbl[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(REALTEK,	0x8168) },</div><div class='ctx'> 	{ PCI_VDEVICE(NCUBE,	0x8168) },</div><div class='ctx'> 	{ PCI_VDEVICE(REALTEK,	0x8169) },</div><div class='del'>-	{ PCI_VENDOR_ID_DLINK,	0x4300,</div><div class='del'>-		PCI_VENDOR_ID_DLINK, 0x4b10, 0, 0 },</div><div class='ctx'> 	{ PCI_VDEVICE(DLINK,	0x4300) },</div><div class='ctx'> 	{ PCI_VDEVICE(DLINK,	0x4302) },</div><div class='ctx'> 	{ PCI_VDEVICE(AT,	0xc107) },</div><div class='hunk'>@@ -166,7 +228,10 @@ static const struct pci_device_id rtl8169_pci_tbl[] = {</div><div class='ctx'> 	{ 0x0001, 0x8168, PCI_ANY_ID, 0x2410 },</div><div class='ctx'> 	{ PCI_VDEVICE(REALTEK,	0x8125) },</div><div class='ctx'> 	{ PCI_VDEVICE(REALTEK,	0x8126) },</div><div class='add'>+	{ PCI_VDEVICE(REALTEK,	0x8127) },</div><div class='ctx'> 	{ PCI_VDEVICE(REALTEK,	0x3000) },</div><div class='add'>+	{ PCI_VDEVICE(REALTEK,	0x5000) },</div><div class='add'>+	{ PCI_VDEVICE(REALTEK,	0x0e10) },</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -347,6 +412,8 @@ enum rtl8125_registers {</div><div class='ctx'> 	TxPoll_8125		= 0x90,</div><div class='ctx'> 	LEDSEL3			= 0x96,</div><div class='ctx'> 	MAC0_BKP		= 0x19e0,</div><div class='add'>+	RSS_CTRL_8125		= 0x4500,</div><div class='add'>+	Q_NUM_CTRL_8125		= 0x4800,</div><div class='ctx'> 	EEE_TXIDLE_TIMER_8125	= 0x6048,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -621,7 +688,6 @@ struct rtl8169_tc_offsets {</div><div class='ctx'> </div><div class='ctx'> enum rtl_flag {</div><div class='ctx'> 	RTL_FLAG_TASK_RESET_PENDING,</div><div class='del'>-	RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE,</div><div class='ctx'> 	RTL_FLAG_TASK_TX_TIMEOUT,</div><div class='ctx'> 	RTL_FLAG_MAX</div><div class='ctx'> };</div><div class='hunk'>@@ -630,6 +696,7 @@ enum rtl_dash_type {</div><div class='ctx'> 	RTL_DASH_NONE,</div><div class='ctx'> 	RTL_DASH_DP,</div><div class='ctx'> 	RTL_DASH_EP,</div><div class='add'>+	RTL_DASH_25_BP,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct rtl8169_private {</div><div class='hunk'>@@ -660,13 +727,9 @@ struct rtl8169_private {</div><div class='ctx'> 		struct work_struct work;</div><div class='ctx'> 	} wk;</div><div class='ctx'> </div><div class='del'>-	raw_spinlock_t config25_lock;</div><div class='ctx'> 	raw_spinlock_t mac_ocp_lock;</div><div class='ctx'> 	struct mutex led_lock;	/* serialize LED ctrl RMW access */</div><div class='ctx'> </div><div class='del'>-	raw_spinlock_t cfg9346_usage_lock;</div><div class='del'>-	int cfg9346_usage_count;</div><div class='del'>-</div><div class='ctx'> 	unsigned supports_gmii:1;</div><div class='ctx'> 	unsigned aspm_manageable:1;</div><div class='ctx'> 	unsigned dash_enabled:1;</div><div class='hunk'>@@ -710,8 +773,13 @@ MODULE_FIRMWARE(FIRMWARE_8107E_2);</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_8125A_3);</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_8125B_2);</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_8125D_1);</div><div class='add'>+MODULE_FIRMWARE(FIRMWARE_8125D_2);</div><div class='add'>+MODULE_FIRMWARE(FIRMWARE_8125K_1);</div><div class='add'>+MODULE_FIRMWARE(FIRMWARE_8125BP_2);</div><div class='add'>+MODULE_FIRMWARE(FIRMWARE_9151A_1);</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_8126A_2);</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_8126A_3);</div><div class='add'>+MODULE_FIRMWARE(FIRMWARE_8127A_1);</div><div class='ctx'> </div><div class='ctx'> static inline struct device *tp_to_dev(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='hunk'>@@ -720,22 +788,12 @@ static inline struct device *tp_to_dev(struct rtl8169_private *tp)</div><div class='ctx'> </div><div class='ctx'> static void rtl_lock_config_regs(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	raw_spin_lock_irqsave(&amp;tp-&gt;cfg9346_usage_lock, flags);</div><div class='del'>-	if (!--tp-&gt;cfg9346_usage_count)</div><div class='del'>-		RTL_W8(tp, Cfg9346, Cfg9346_Lock);</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;tp-&gt;cfg9346_usage_lock, flags);</div><div class='add'>+	RTL_W8(tp, Cfg9346, Cfg9346_Lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl_unlock_config_regs(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	raw_spin_lock_irqsave(&amp;tp-&gt;cfg9346_usage_lock, flags);</div><div class='del'>-	if (!tp-&gt;cfg9346_usage_count++)</div><div class='del'>-		RTL_W8(tp, Cfg9346, Cfg9346_Unlock);</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;tp-&gt;cfg9346_usage_lock, flags);</div><div class='add'>+	RTL_W8(tp, Cfg9346, Cfg9346_Unlock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl_pci_commit(struct rtl8169_private *tp)</div><div class='hunk'>@@ -746,24 +804,32 @@ static void rtl_pci_commit(struct rtl8169_private *tp)</div><div class='ctx'> </div><div class='ctx'> static void rtl_mod_config2(struct rtl8169_private *tp, u8 clear, u8 set)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	u8 val;</div><div class='ctx'> </div><div class='del'>-	raw_spin_lock_irqsave(&amp;tp-&gt;config25_lock, flags);</div><div class='ctx'> 	val = RTL_R8(tp, Config2);</div><div class='ctx'> 	RTL_W8(tp, Config2, (val &amp; ~clear) | set);</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;tp-&gt;config25_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl_mod_config5(struct rtl8169_private *tp, u8 clear, u8 set)</div><div class='ctx'> {</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	u8 val;</div><div class='ctx'> </div><div class='del'>-	raw_spin_lock_irqsave(&amp;tp-&gt;config25_lock, flags);</div><div class='ctx'> 	val = RTL_R8(tp, Config5);</div><div class='ctx'> 	RTL_W8(tp, Config5, (val &amp; ~clear) | set);</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;tp-&gt;config25_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void r8169_mod_reg8_cond(struct rtl8169_private *tp, int reg,</div><div class='add'>+				u8 bits, bool cond)</div><div class='add'>+{</div><div class='add'>+	u8 val, old_val;</div><div class='add'>+</div><div class='add'>+	old_val = RTL_R8(tp, reg);</div><div class='add'>+	if (cond)</div><div class='add'>+		val = old_val | bits;</div><div class='add'>+	else</div><div class='add'>+		val = old_val &amp; ~bits;</div><div class='add'>+	if (val != old_val)</div><div class='add'>+		RTL_W8(tp, reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool rtl_is_8125(struct rtl8169_private *tp)</div><div class='hunk'>@@ -775,7 +841,7 @@ static bool rtl_is_8168evl_up(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='ctx'> 	return tp-&gt;mac_version &gt;= RTL_GIGA_MAC_VER_34 &amp;&amp;</div><div class='ctx'> 	       tp-&gt;mac_version != RTL_GIGA_MAC_VER_39 &amp;&amp;</div><div class='del'>-	       tp-&gt;mac_version &lt;= RTL_GIGA_MAC_VER_53;</div><div class='add'>+	       tp-&gt;mac_version &lt;= RTL_GIGA_MAC_VER_52;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool rtl_supports_eee(struct rtl8169_private *tp)</div><div class='hunk'>@@ -943,9 +1009,7 @@ void r8169_get_led_name(struct rtl8169_private *tp, int idx,</div><div class='ctx'> static void r8168fp_adjust_ocp_cmd(struct rtl8169_private *tp, u32 *cmd, int type)</div><div class='ctx'> {</div><div class='ctx'> 	/* based on RTL8168FP_OOBMAC_BASE in vendor driver */</div><div class='del'>-	if (type == ERIAR_OOB &amp;&amp;</div><div class='del'>-	    (tp-&gt;mac_version == RTL_GIGA_MAC_VER_52 ||</div><div class='del'>-	     tp-&gt;mac_version == RTL_GIGA_MAC_VER_53))</div><div class='add'>+	if (type == ERIAR_OOB &amp;&amp; tp-&gt;mac_version == RTL_GIGA_MAC_VER_52)</div><div class='ctx'> 		*cmd |= 0xf70 &lt;&lt; 18;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1234,7 +1298,7 @@ static void rtl_writephy(struct rtl8169_private *tp, int location, int val)</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_31:</div><div class='ctx'> 		r8168dp_2_mdio_write(tp, location, val);</div><div class='ctx'> 		break;</div><div class='del'>-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 		r8168g_mdio_write(tp, location, val);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1249,7 +1313,7 @@ static int rtl_readphy(struct rtl8169_private *tp, int location)</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_28:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_31:</div><div class='ctx'> 		return r8168dp_2_mdio_read(tp, location);</div><div class='del'>-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 		return r8168g_mdio_read(tp, location);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return r8169_mdio_read(tp, location);</div><div class='hunk'>@@ -1364,10 +1428,19 @@ static void rtl8168ep_driver_start(struct rtl8169_private *tp)</div><div class='ctx'> 		rtl_loop_wait_high(tp, &amp;rtl_ep_ocp_read_cond, 10000, 30);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtl8125bp_driver_start(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_START);</div><div class='add'>+	r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);</div><div class='add'>+	r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void rtl8168_driver_start(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='ctx'> 	if (tp-&gt;dash_type == RTL_DASH_DP)</div><div class='ctx'> 		rtl8168dp_driver_start(tp);</div><div class='add'>+	else if (tp-&gt;dash_type == RTL_DASH_25_BP)</div><div class='add'>+		rtl8125bp_driver_start(tp);</div><div class='ctx'> 	else</div><div class='ctx'> 		rtl8168ep_driver_start(tp);</div><div class='ctx'> }</div><div class='hunk'>@@ -1388,10 +1461,19 @@ static void rtl8168ep_driver_stop(struct rtl8169_private *tp)</div><div class='ctx'> 		rtl_loop_wait_low(tp, &amp;rtl_ep_ocp_read_cond, 10000, 10);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtl8125bp_driver_stop(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	r8168ep_ocp_write(tp, 0x01, 0x14, OOB_CMD_DRIVER_STOP);</div><div class='add'>+	r8168ep_ocp_write(tp, 0x01, 0x18, 0x00);</div><div class='add'>+	r8168ep_ocp_write(tp, 0x01, 0x10, 0x01);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void rtl8168_driver_stop(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='ctx'> 	if (tp-&gt;dash_type == RTL_DASH_DP)</div><div class='ctx'> 		rtl8168dp_driver_stop(tp);</div><div class='add'>+	else if (tp-&gt;dash_type == RTL_DASH_25_BP)</div><div class='add'>+		rtl8125bp_driver_stop(tp);</div><div class='ctx'> 	else</div><div class='ctx'> 		rtl8168ep_driver_stop(tp);</div><div class='ctx'> }</div><div class='hunk'>@@ -1414,6 +1496,7 @@ static bool rtl_dash_is_enabled(struct rtl8169_private *tp)</div><div class='ctx'> 	case RTL_DASH_DP:</div><div class='ctx'> 		return r8168dp_check_dash(tp);</div><div class='ctx'> 	case RTL_DASH_EP:</div><div class='add'>+	case RTL_DASH_25_BP:</div><div class='ctx'> 		return r8168ep_check_dash(tp);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -1426,8 +1509,10 @@ static enum rtl_dash_type rtl_get_dash_type(struct rtl8169_private *tp)</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_28:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_31:</div><div class='ctx'> 		return RTL_DASH_DP;</div><div class='del'>-	case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_53:</div><div class='add'>+	case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_52:</div><div class='ctx'> 		return RTL_DASH_EP;</div><div class='add'>+	case RTL_GIGA_MAC_VER_66:</div><div class='add'>+		return RTL_DASH_25_BP;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return RTL_DASH_NONE;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1436,16 +1521,17 @@ static enum rtl_dash_type rtl_get_dash_type(struct rtl8169_private *tp)</div><div class='ctx'> static void rtl_set_d3_pll_down(struct rtl8169_private *tp, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	switch (tp-&gt;mac_version) {</div><div class='del'>-	case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_26:</div><div class='del'>-	case RTL_GIGA_MAC_VER_29 ... RTL_GIGA_MAC_VER_30:</div><div class='del'>-	case RTL_GIGA_MAC_VER_32 ... RTL_GIGA_MAC_VER_37:</div><div class='del'>-	case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:</div><div class='del'>-		if (enable)</div><div class='del'>-			RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) &amp; ~D3_NO_PLL_DOWN);</div><div class='del'>-		else</div><div class='del'>-			RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | D3_NO_PLL_DOWN);</div><div class='add'>+	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_24:</div><div class='add'>+	case RTL_GIGA_MAC_VER_28:</div><div class='add'>+	case RTL_GIGA_MAC_VER_31:</div><div class='add'>+	case RTL_GIGA_MAC_VER_38:</div><div class='add'>+		break;</div><div class='add'>+	case RTL_GIGA_MAC_VER_80:</div><div class='add'>+		r8169_mod_reg8_cond(tp, PMCH, D3_NO_PLL_DOWN, true);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='add'>+		r8169_mod_reg8_cond(tp, PMCH, D3HOT_NO_PLL_DOWN, true);</div><div class='add'>+		r8169_mod_reg8_cond(tp, PMCH, D3COLD_NO_PLL_DOWN, !enable);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1556,61 +1642,40 @@ static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> </div><div class='ctx'> static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts)</div><div class='ctx'> {</div><div class='del'>-	static const struct {</div><div class='del'>-		u32 opt;</div><div class='del'>-		u16 reg;</div><div class='del'>-		u8  mask;</div><div class='del'>-	} cfg[] = {</div><div class='del'>-		{ WAKE_PHY,   Config3, LinkUp },</div><div class='del'>-		{ WAKE_UCAST, Config5, UWF },</div><div class='del'>-		{ WAKE_BCAST, Config5, BWF },</div><div class='del'>-		{ WAKE_MCAST, Config5, MWF },</div><div class='del'>-		{ WAKE_ANY,   Config5, LanWake },</div><div class='del'>-		{ WAKE_MAGIC, Config3, MagicPacket }</div><div class='del'>-	};</div><div class='del'>-	unsigned int i, tmp = ARRAY_SIZE(cfg);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u8 options;</div><div class='del'>-</div><div class='ctx'> 	rtl_unlock_config_regs(tp);</div><div class='ctx'> </div><div class='ctx'> 	if (rtl_is_8168evl_up(tp)) {</div><div class='del'>-		tmp--;</div><div class='ctx'> 		if (wolopts &amp; WAKE_MAGIC)</div><div class='ctx'> 			rtl_eri_set_bits(tp, 0x0dc, MagicPacket_v2);</div><div class='ctx'> 		else</div><div class='ctx'> 			rtl_eri_clear_bits(tp, 0x0dc, MagicPacket_v2);</div><div class='ctx'> 	} else if (rtl_is_8125(tp)) {</div><div class='del'>-		tmp--;</div><div class='ctx'> 		if (wolopts &amp; WAKE_MAGIC)</div><div class='ctx'> 			r8168_mac_ocp_modify(tp, 0xc0b6, 0, BIT(0));</div><div class='ctx'> 		else</div><div class='ctx'> 			r8168_mac_ocp_modify(tp, 0xc0b6, BIT(0), 0);</div><div class='add'>+	} else {</div><div class='add'>+		r8169_mod_reg8_cond(tp, Config3, MagicPacket,</div><div class='add'>+				    wolopts &amp; WAKE_MAGIC);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	raw_spin_lock_irqsave(&amp;tp-&gt;config25_lock, flags);</div><div class='del'>-	for (i = 0; i &lt; tmp; i++) {</div><div class='del'>-		options = RTL_R8(tp, cfg[i].reg) &amp; ~cfg[i].mask;</div><div class='del'>-		if (wolopts &amp; cfg[i].opt)</div><div class='del'>-			options |= cfg[i].mask;</div><div class='del'>-		RTL_W8(tp, cfg[i].reg, options);</div><div class='del'>-	}</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;tp-&gt;config25_lock, flags);</div><div class='add'>+	r8169_mod_reg8_cond(tp, Config3, LinkUp, wolopts &amp; WAKE_PHY);</div><div class='add'>+	if (rtl_is_8125(tp))</div><div class='add'>+		r8168_mac_ocp_modify(tp, 0xe0c6, 0x3f,</div><div class='add'>+				     wolopts &amp; WAKE_PHY ? 0x13 : 0);</div><div class='add'>+	r8169_mod_reg8_cond(tp, Config5, UWF, wolopts &amp; WAKE_UCAST);</div><div class='add'>+	r8169_mod_reg8_cond(tp, Config5, BWF, wolopts &amp; WAKE_BCAST);</div><div class='add'>+	r8169_mod_reg8_cond(tp, Config5, MWF, wolopts &amp; WAKE_MCAST);</div><div class='add'>+	r8169_mod_reg8_cond(tp, Config5, LanWake, wolopts);</div><div class='ctx'> </div><div class='ctx'> 	switch (tp-&gt;mac_version) {</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:</div><div class='del'>-		options = RTL_R8(tp, Config1) &amp; ~PMEnable;</div><div class='del'>-		if (wolopts)</div><div class='del'>-			options |= PMEnable;</div><div class='del'>-		RTL_W8(tp, Config1, options);</div><div class='add'>+		r8169_mod_reg8_cond(tp, Config1, PMEnable, wolopts);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_34:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_37:</div><div class='del'>-	case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:</div><div class='del'>-		if (wolopts)</div><div class='del'>-			rtl_mod_config2(tp, 0, PME_SIGNAL);</div><div class='del'>-		else</div><div class='del'>-			rtl_mod_config2(tp, PME_SIGNAL, 0);</div><div class='add'>+	case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_LAST:</div><div class='add'>+		r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2082,7 +2147,7 @@ static void rtl_set_eee_txidle_timer(struct rtl8169_private *tp)</div><div class='ctx'> 		tp-&gt;tx_lpi_timer = timer_val;</div><div class='ctx'> 		r8168_mac_ocp_write(tp, 0xe048, timer_val);</div><div class='ctx'> 		break;</div><div class='del'>-	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 		tp-&gt;tx_lpi_timer = timer_val;</div><div class='ctx'> 		RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2271,147 +2336,30 @@ static const struct ethtool_ops rtl8169_ethtool_ops = {</div><div class='ctx'> 	.get_eth_ctrl_stats	= rtl8169_get_eth_ctrl_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)</div><div class='add'>+static const struct rtl_chip_info *rtl8169_get_chip_version(u16 xid, bool gmii)</div><div class='ctx'> {</div><div class='del'>-	/*</div><div class='del'>-	 * The driver currently handles the 8168Bf and the 8168Be identically</div><div class='del'>-	 * but they can be identified more specifically through the test below</div><div class='del'>-	 * if needed:</div><div class='del'>-	 *</div><div class='del'>-	 * (RTL_R32(tp, TxConfig) &amp; 0x700000) == 0x500000 ? 8168Bf : 8168Be</div><div class='del'>-	 *</div><div class='del'>-	 * Same thing for the 8101Eb and the 8101Ec:</div><div class='del'>-	 *</div><div class='del'>-	 * (RTL_R32(tp, TxConfig) &amp; 0x700000) == 0x200000 ? 8101Eb : 8101Ec</div><div class='del'>-	 */</div><div class='del'>-	static const struct rtl_mac_info {</div><div class='del'>-		u16 mask;</div><div class='del'>-		u16 val;</div><div class='del'>-		enum mac_version ver;</div><div class='del'>-	} mac_info[] = {</div><div class='del'>-		/* 8126A family. */</div><div class='del'>-		{ 0x7cf, 0x64a,	RTL_GIGA_MAC_VER_66 },</div><div class='del'>-		{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_65 },</div><div class='del'>-</div><div class='del'>-		/* 8125D family. */</div><div class='del'>-		{ 0x7cf, 0x688,	RTL_GIGA_MAC_VER_64 },</div><div class='del'>-</div><div class='del'>-		/* 8125B family. */</div><div class='del'>-		{ 0x7cf, 0x641,	RTL_GIGA_MAC_VER_63 },</div><div class='del'>-</div><div class='del'>-		/* 8125A family. */</div><div class='del'>-		{ 0x7cf, 0x609,	RTL_GIGA_MAC_VER_61 },</div><div class='del'>-		/* It seems only XID 609 made it to the mass market.</div><div class='del'>-		 * { 0x7cf, 0x608,	RTL_GIGA_MAC_VER_60 },</div><div class='del'>-		 * { 0x7c8, 0x608,	RTL_GIGA_MAC_VER_61 },</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		/* RTL8117 */</div><div class='del'>-		{ 0x7cf, 0x54b,	RTL_GIGA_MAC_VER_53 },</div><div class='del'>-		{ 0x7cf, 0x54a,	RTL_GIGA_MAC_VER_52 },</div><div class='del'>-</div><div class='del'>-		/* 8168EP family. */</div><div class='del'>-		{ 0x7cf, 0x502,	RTL_GIGA_MAC_VER_51 },</div><div class='del'>-		/* It seems this chip version never made it to</div><div class='del'>-		 * the wild. Let's disable detection.</div><div class='del'>-		 * { 0x7cf, 0x501,      RTL_GIGA_MAC_VER_50 },</div><div class='del'>-		 * { 0x7cf, 0x500,      RTL_GIGA_MAC_VER_49 },</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		/* 8168H family. */</div><div class='del'>-		{ 0x7cf, 0x541,	RTL_GIGA_MAC_VER_46 },</div><div class='del'>-		/* It seems this chip version never made it to</div><div class='del'>-		 * the wild. Let's disable detection.</div><div class='del'>-		 * { 0x7cf, 0x540,	RTL_GIGA_MAC_VER_45 },</div><div class='del'>-		 */</div><div class='del'>-		/* Realtek calls it RTL8168M, but it's handled like RTL8168H */</div><div class='del'>-		{ 0x7cf, 0x6c0,	RTL_GIGA_MAC_VER_46 },</div><div class='del'>-</div><div class='del'>-		/* 8168G family. */</div><div class='del'>-		{ 0x7cf, 0x5c8,	RTL_GIGA_MAC_VER_44 },</div><div class='del'>-		{ 0x7cf, 0x509,	RTL_GIGA_MAC_VER_42 },</div><div class='del'>-		/* It seems this chip version never made it to</div><div class='del'>-		 * the wild. Let's disable detection.</div><div class='del'>-		 * { 0x7cf, 0x4c1,	RTL_GIGA_MAC_VER_41 },</div><div class='del'>-		 */</div><div class='del'>-		{ 0x7cf, 0x4c0,	RTL_GIGA_MAC_VER_40 },</div><div class='del'>-</div><div class='del'>-		/* 8168F family. */</div><div class='del'>-		{ 0x7c8, 0x488,	RTL_GIGA_MAC_VER_38 },</div><div class='del'>-		{ 0x7cf, 0x481,	RTL_GIGA_MAC_VER_36 },</div><div class='del'>-		{ 0x7cf, 0x480,	RTL_GIGA_MAC_VER_35 },</div><div class='del'>-</div><div class='del'>-		/* 8168E family. */</div><div class='del'>-		{ 0x7c8, 0x2c8,	RTL_GIGA_MAC_VER_34 },</div><div class='del'>-		{ 0x7cf, 0x2c1,	RTL_GIGA_MAC_VER_32 },</div><div class='del'>-		{ 0x7c8, 0x2c0,	RTL_GIGA_MAC_VER_33 },</div><div class='del'>-</div><div class='del'>-		/* 8168D family. */</div><div class='del'>-		{ 0x7cf, 0x281,	RTL_GIGA_MAC_VER_25 },</div><div class='del'>-		{ 0x7c8, 0x280,	RTL_GIGA_MAC_VER_26 },</div><div class='del'>-</div><div class='del'>-		/* 8168DP family. */</div><div class='del'>-		/* It seems this early RTL8168dp version never made it to</div><div class='del'>-		 * the wild. Support has been removed.</div><div class='del'>-		 * { 0x7cf, 0x288,      RTL_GIGA_MAC_VER_27 },</div><div class='del'>-		 */</div><div class='del'>-		{ 0x7cf, 0x28a,	RTL_GIGA_MAC_VER_28 },</div><div class='del'>-		{ 0x7cf, 0x28b,	RTL_GIGA_MAC_VER_31 },</div><div class='del'>-</div><div class='del'>-		/* 8168C family. */</div><div class='del'>-		{ 0x7cf, 0x3c9,	RTL_GIGA_MAC_VER_23 },</div><div class='del'>-		{ 0x7cf, 0x3c8,	RTL_GIGA_MAC_VER_18 },</div><div class='del'>-		{ 0x7c8, 0x3c8,	RTL_GIGA_MAC_VER_24 },</div><div class='del'>-		{ 0x7cf, 0x3c0,	RTL_GIGA_MAC_VER_19 },</div><div class='del'>-		{ 0x7cf, 0x3c2,	RTL_GIGA_MAC_VER_20 },</div><div class='del'>-		{ 0x7cf, 0x3c3,	RTL_GIGA_MAC_VER_21 },</div><div class='del'>-		{ 0x7c8, 0x3c0,	RTL_GIGA_MAC_VER_22 },</div><div class='del'>-</div><div class='del'>-		/* 8168B family. */</div><div class='del'>-		{ 0x7c8, 0x380,	RTL_GIGA_MAC_VER_17 },</div><div class='del'>-		/* This one is very old and rare, let's see if anybody complains.</div><div class='del'>-		 * { 0x7c8, 0x300,	RTL_GIGA_MAC_VER_11 },</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		/* 8101 family. */</div><div class='del'>-		{ 0x7c8, 0x448,	RTL_GIGA_MAC_VER_39 },</div><div class='del'>-		{ 0x7c8, 0x440,	RTL_GIGA_MAC_VER_37 },</div><div class='del'>-		{ 0x7cf, 0x409,	RTL_GIGA_MAC_VER_29 },</div><div class='del'>-		{ 0x7c8, 0x408,	RTL_GIGA_MAC_VER_30 },</div><div class='del'>-		{ 0x7cf, 0x349,	RTL_GIGA_MAC_VER_08 },</div><div class='del'>-		{ 0x7cf, 0x249,	RTL_GIGA_MAC_VER_08 },</div><div class='del'>-		{ 0x7cf, 0x348,	RTL_GIGA_MAC_VER_07 },</div><div class='del'>-		{ 0x7cf, 0x248,	RTL_GIGA_MAC_VER_07 },</div><div class='del'>-		{ 0x7cf, 0x240,	RTL_GIGA_MAC_VER_14 },</div><div class='del'>-		{ 0x7c8, 0x348,	RTL_GIGA_MAC_VER_09 },</div><div class='del'>-		{ 0x7c8, 0x248,	RTL_GIGA_MAC_VER_09 },</div><div class='del'>-		{ 0x7c8, 0x340,	RTL_GIGA_MAC_VER_10 },</div><div class='del'>-</div><div class='del'>-		/* 8110 family. */</div><div class='del'>-		{ 0xfc8, 0x980,	RTL_GIGA_MAC_VER_06 },</div><div class='del'>-		{ 0xfc8, 0x180,	RTL_GIGA_MAC_VER_05 },</div><div class='del'>-		{ 0xfc8, 0x100,	RTL_GIGA_MAC_VER_04 },</div><div class='del'>-		{ 0xfc8, 0x040,	RTL_GIGA_MAC_VER_03 },</div><div class='del'>-		{ 0xfc8, 0x008,	RTL_GIGA_MAC_VER_02 },</div><div class='del'>-</div><div class='del'>-		/* Catch-all */</div><div class='del'>-		{ 0x000, 0x000,	RTL_GIGA_MAC_NONE   }</div><div class='add'>+	/* Chips combining a 1Gbps MAC with a 100Mbps PHY */</div><div class='add'>+	static const struct rtl_chip_info rtl8106eus_info = {</div><div class='add'>+		.mac_version = RTL_GIGA_MAC_VER_43,</div><div class='add'>+		.name = "RTL8106eus",</div><div class='add'>+		.fw_name = FIRMWARE_8106E_2,</div><div class='ctx'> 	};</div><div class='del'>-	const struct rtl_mac_info *p = mac_info;</div><div class='del'>-	enum mac_version ver;</div><div class='add'>+	static const struct rtl_chip_info rtl8107e_info = {</div><div class='add'>+		.mac_version = RTL_GIGA_MAC_VER_48,</div><div class='add'>+		.name = "RTL8107e",</div><div class='add'>+		.fw_name = FIRMWARE_8107E_2,</div><div class='add'>+	};</div><div class='add'>+	const struct rtl_chip_info *p = rtl_chip_infos;</div><div class='ctx'> </div><div class='ctx'> 	while ((xid &amp; p-&gt;mask) != p-&gt;val)</div><div class='ctx'> 		p++;</div><div class='del'>-	ver = p-&gt;ver;</div><div class='ctx'> </div><div class='del'>-	if (ver != RTL_GIGA_MAC_NONE &amp;&amp; !gmii) {</div><div class='del'>-		if (ver == RTL_GIGA_MAC_VER_42)</div><div class='del'>-			ver = RTL_GIGA_MAC_VER_43;</div><div class='del'>-		else if (ver == RTL_GIGA_MAC_VER_46)</div><div class='del'>-			ver = RTL_GIGA_MAC_VER_48;</div><div class='del'>-	}</div><div class='add'>+	if (p-&gt;mac_version == RTL_GIGA_MAC_VER_42 &amp;&amp; !gmii)</div><div class='add'>+		return &amp;rtl8106eus_info;</div><div class='add'>+	if (p-&gt;mac_version == RTL_GIGA_MAC_VER_46 &amp;&amp; !gmii)</div><div class='add'>+		return &amp;rtl8107e_info;</div><div class='ctx'> </div><div class='del'>-	return ver;</div><div class='add'>+	return p;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl_release_firmware(struct rtl8169_private *tp)</div><div class='hunk'>@@ -2440,26 +2388,6 @@ void r8169_apply_firmware(struct rtl8169_private *tp)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl8168_config_eee_mac(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	/* Adjust EEE LED frequency */</div><div class='del'>-	if (tp-&gt;mac_version != RTL_GIGA_MAC_VER_38)</div><div class='del'>-		RTL_W8(tp, EEE_LED, RTL_R8(tp, EEE_LED) &amp; ~0x07);</div><div class='del'>-</div><div class='del'>-	rtl_eri_set_bits(tp, 0x1b0, 0x0003);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rtl8125a_config_eee_mac(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	r8168_mac_ocp_modify(tp, 0xe040, 0, BIT(1) | BIT(0));</div><div class='del'>-	r8168_mac_ocp_modify(tp, 0xeb62, 0, BIT(2) | BIT(1));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rtl8125b_config_eee_mac(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	r8168_mac_ocp_modify(tp, 0xe040, 0, BIT(1) | BIT(0));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void rtl_rar_exgmac_set(struct rtl8169_private *tp, const u8 *addr)</div><div class='ctx'> {</div><div class='ctx'> 	rtl_eri_write(tp, 0xe0, ERIAR_MASK_1111, get_unaligned_le32(addr));</div><div class='hunk'>@@ -2555,13 +2483,13 @@ static void rtl_init_rxcfg(struct rtl8169_private *tp)</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_38:</div><div class='ctx'> 		RTL_W32(tp, RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST);</div><div class='ctx'> 		break;</div><div class='del'>-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_53:</div><div class='add'>+	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_52:</div><div class='ctx'> 		RTL_W32(tp, RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST | RX_EARLY_OFF);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_61:</div><div class='ctx'> 		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);</div><div class='ctx'> 		break;</div><div class='del'>-	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |</div><div class='ctx'> 			RX_PAUSE_SLOT_ON);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2576,86 +2504,31 @@ static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)</div><div class='ctx'> 	tp-&gt;dirty_tx = tp-&gt;cur_tx = tp-&gt;cur_rx = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void r8168c_hw_jumbo_enable(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);</div><div class='del'>-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) &amp; ~Jumbo_En0);</div><div class='del'>-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) &amp; ~Jumbo_En1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void r8168dp_hw_jumbo_disable(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) &amp; ~Jumbo_En0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void r8168e_hw_jumbo_enable(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	RTL_W8(tp, MaxTxPacketSize, 0x24);</div><div class='del'>-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);</div><div class='del'>-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	RTL_W8(tp, MaxTxPacketSize, 0x3f);</div><div class='del'>-	RTL_W8(tp, Config3, RTL_R8(tp, Config3) &amp; ~Jumbo_En0);</div><div class='del'>-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) &amp; ~0x01);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void r8168b_1_hw_jumbo_enable(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 &lt;&lt; 0));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void r8168b_1_hw_jumbo_disable(struct rtl8169_private *tp)</div><div class='del'>-{</div><div class='del'>-	RTL_W8(tp, Config4, RTL_R8(tp, Config4) &amp; ~(1 &lt;&lt; 0));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void rtl_jumbo_config(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='ctx'> 	bool jumbo = tp-&gt;dev-&gt;mtu &gt; ETH_DATA_LEN;</div><div class='ctx'> 	int readrq = 4096;</div><div class='ctx'> </div><div class='add'>+	if (jumbo &amp;&amp; tp-&gt;mac_version &gt;= RTL_GIGA_MAC_VER_17 &amp;&amp;</div><div class='add'>+	    tp-&gt;mac_version &lt;= RTL_GIGA_MAC_VER_26)</div><div class='add'>+		readrq = 512;</div><div class='add'>+</div><div class='ctx'> 	rtl_unlock_config_regs(tp);</div><div class='ctx'> 	switch (tp-&gt;mac_version) {</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_17:</div><div class='del'>-		if (jumbo) {</div><div class='del'>-			readrq = 512;</div><div class='del'>-			r8168b_1_hw_jumbo_enable(tp);</div><div class='del'>-		} else {</div><div class='del'>-			r8168b_1_hw_jumbo_disable(tp);</div><div class='del'>-		}</div><div class='add'>+		r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_26:</div><div class='del'>-		if (jumbo) {</div><div class='del'>-			readrq = 512;</div><div class='del'>-			r8168c_hw_jumbo_enable(tp);</div><div class='del'>-		} else {</div><div class='del'>-			r8168c_hw_jumbo_disable(tp);</div><div class='del'>-		}</div><div class='add'>+		r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);</div><div class='add'>+		r8169_mod_reg8_cond(tp, Config4, Jumbo_En1, jumbo);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_28:</div><div class='del'>-		if (jumbo)</div><div class='del'>-			r8168dp_hw_jumbo_enable(tp);</div><div class='del'>-		else</div><div class='del'>-			r8168dp_hw_jumbo_disable(tp);</div><div class='add'>+		r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_31 ... RTL_GIGA_MAC_VER_33:</div><div class='del'>-		if (jumbo)</div><div class='del'>-			r8168e_hw_jumbo_enable(tp);</div><div class='del'>-		else</div><div class='del'>-			r8168e_hw_jumbo_disable(tp);</div><div class='add'>+		RTL_W8(tp, MaxTxPacketSize, jumbo ? 0x24 : 0x3f);</div><div class='add'>+		r8169_mod_reg8_cond(tp, Config3, Jumbo_En0, jumbo);</div><div class='add'>+		r8169_mod_reg8_cond(tp, Config4, BIT(0), jumbo);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2741,14 +2614,14 @@ DECLARE_RTL_COND(rtl_rxtx_empty_cond_2)</div><div class='ctx'> static void rtl_wait_txrx_fifo_empty(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='ctx'> 	switch (tp-&gt;mac_version) {</div><div class='del'>-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_53:</div><div class='add'>+	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_52:</div><div class='ctx'> 		rtl_loop_wait_high(tp, &amp;rtl_txcfg_empty_cond, 100, 42);</div><div class='ctx'> 		rtl_loop_wait_high(tp, &amp;rtl_rxtx_empty_cond, 100, 42);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:</div><div class='ctx'> 		rtl_loop_wait_high(tp, &amp;rtl_rxtx_empty_cond, 100, 42);</div><div class='ctx'> 		break;</div><div class='del'>-	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 		RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);</div><div class='ctx'> 		rtl_loop_wait_high(tp, &amp;rtl_rxtx_empty_cond, 100, 42);</div><div class='ctx'> 		rtl_loop_wait_high(tp, &amp;rtl_rxtx_empty_cond_2, 100, 42);</div><div class='hunk'>@@ -2909,10 +2782,45 @@ static u32 rtl_csi_read(struct rtl8169_private *tp, int addr)</div><div class='ctx'> 		RTL_R32(tp, CSIDR) : ~0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtl_csi_mod(struct rtl8169_private *tp, int addr,</div><div class='add'>+			u32 mask, u32 set)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	WARN(addr % 4, "Invalid CSI address %#x\n", addr);</div><div class='add'>+</div><div class='add'>+	netdev_notice_once(tp-&gt;dev,</div><div class='add'>+		"No native access to PCI extended config space, falling back to CSI\n");</div><div class='add'>+</div><div class='add'>+	val = rtl_csi_read(tp, addr);</div><div class='add'>+	rtl_csi_write(tp, addr, (val &amp; ~mask) | set);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='add'>+	int rc;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+#define RTL_GEN3_RELATED_OFF	0x0890</div><div class='add'>+#define RTL_GEN3_ZRXDC_NONCOMPL	0x1</div><div class='add'>+	if (pdev-&gt;cfg_size &gt; RTL_GEN3_RELATED_OFF) {</div><div class='add'>+		rc = pci_read_config_byte(pdev, RTL_GEN3_RELATED_OFF, &amp;val);</div><div class='add'>+		if (rc == PCIBIOS_SUCCESSFUL) {</div><div class='add'>+			val &amp;= ~RTL_GEN3_ZRXDC_NONCOMPL;</div><div class='add'>+			rc = pci_write_config_byte(pdev, RTL_GEN3_RELATED_OFF,</div><div class='add'>+						   val);</div><div class='add'>+			if (rc == PCIBIOS_SUCCESSFUL)</div><div class='add'>+				return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rtl_csi_mod(tp, RTL_GEN3_RELATED_OFF, RTL_GEN3_ZRXDC_NONCOMPL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='del'>-	u32 csi;</div><div class='ctx'> </div><div class='ctx'> 	/* According to Realtek the value at config space address 0x070f</div><div class='ctx'> 	 * controls the L0s/L1 entrance latency. We try standard ECAM access</div><div class='hunk'>@@ -2924,10 +2832,7 @@ static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)</div><div class='ctx'> 	    pci_write_config_byte(pdev, 0x070f, val) == PCIBIOS_SUCCESSFUL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	netdev_notice_once(tp-&gt;dev,</div><div class='del'>-		"No native access to PCI extended config space, falling back to CSI\n");</div><div class='del'>-	csi = rtl_csi_read(tp, 0x070c) &amp; 0x00ffffff;</div><div class='del'>-	rtl_csi_write(tp, 0x070c, csi | val &lt;&lt; 24);</div><div class='add'>+	rtl_csi_mod(tp, 0x070c, 0xff000000, val &lt;&lt; 24);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl_set_def_aspm_entry_latency(struct rtl8169_private *tp)</div><div class='hunk'>@@ -2991,7 +2896,7 @@ static void rtl_enable_exit_l1(struct rtl8169_private *tp)</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:</div><div class='ctx'> 		rtl_eri_set_bits(tp, 0xd4, 0x0c00);</div><div class='ctx'> 		break;</div><div class='del'>-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 		r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -3005,7 +2910,7 @@ static void rtl_disable_exit_l1(struct rtl8169_private *tp)</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:</div><div class='ctx'> 		rtl_eri_clear_bits(tp, 0xd4, 0x1f00);</div><div class='ctx'> 		break;</div><div class='del'>-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 		r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -3031,8 +2936,8 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)</div><div class='ctx'> </div><div class='ctx'> 		rtl_mod_config5(tp, 0, ASPM_en);</div><div class='ctx'> 		switch (tp-&gt;mac_version) {</div><div class='del'>-		case RTL_GIGA_MAC_VER_65:</div><div class='del'>-		case RTL_GIGA_MAC_VER_66:</div><div class='add'>+		case RTL_GIGA_MAC_VER_70:</div><div class='add'>+		case RTL_GIGA_MAC_VER_80:</div><div class='ctx'> 			val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;</div><div class='ctx'> 			RTL_W8(tp, INT_CFG0_8125, val8);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -3043,7 +2948,7 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)</div><div class='ctx'> </div><div class='ctx'> 		switch (tp-&gt;mac_version) {</div><div class='ctx'> 		case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:</div><div class='del'>-		case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+		case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 			/* reset ephy tx/rx disable timer */</div><div class='ctx'> 			r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);</div><div class='ctx'> 			/* chip can trigger L1.2 */</div><div class='hunk'>@@ -3055,7 +2960,7 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		switch (tp-&gt;mac_version) {</div><div class='ctx'> 		case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:</div><div class='del'>-		case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+		case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 			r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -3063,8 +2968,8 @@ static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		switch (tp-&gt;mac_version) {</div><div class='del'>-		case RTL_GIGA_MAC_VER_65:</div><div class='del'>-		case RTL_GIGA_MAC_VER_66:</div><div class='add'>+		case RTL_GIGA_MAC_VER_70:</div><div class='add'>+		case RTL_GIGA_MAC_VER_80:</div><div class='ctx'> 			val8 = RTL_R8(tp, INT_CFG0_8125) &amp; ~INT_CFG0_CLKREQEN;</div><div class='ctx'> 			RTL_W8(tp, INT_CFG0_8125, val8);</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -3260,8 +3165,6 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(tp, MCU, RTL_R8(tp, MCU) &amp; ~NOW_IS_OOB);</div><div class='ctx'> </div><div class='del'>-	rtl8168_config_eee_mac(tp);</div><div class='del'>-</div><div class='ctx'> 	RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) | PFM_EN);</div><div class='ctx'> 	RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN);</div><div class='ctx'> 	rtl_mod_config5(tp, Spi_en, 0);</div><div class='hunk'>@@ -3286,8 +3189,6 @@ static void rtl_hw_start_8168f(struct rtl8169_private *tp)</div><div class='ctx'> 	RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) | PFM_EN);</div><div class='ctx'> 	RTL_W32(tp, MISC, RTL_R32(tp, MISC) | PWM_EN);</div><div class='ctx'> 	rtl_mod_config5(tp, Spi_en, 0);</div><div class='del'>-</div><div class='del'>-	rtl8168_config_eee_mac(tp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)</div><div class='hunk'>@@ -3337,8 +3238,6 @@ static void rtl_hw_start_8168g(struct rtl8169_private *tp)</div><div class='ctx'> 	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000);</div><div class='ctx'> 	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000);</div><div class='ctx'> </div><div class='del'>-	rtl8168_config_eee_mac(tp);</div><div class='del'>-</div><div class='ctx'> 	rtl_w0w1_eri(tp, 0x2fc, 0x01, 0x06);</div><div class='ctx'> 	rtl_eri_clear_bits(tp, 0x1b0, BIT(12));</div><div class='ctx'> </div><div class='hunk'>@@ -3479,8 +3378,6 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)</div><div class='ctx'> 	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000);</div><div class='ctx'> 	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000);</div><div class='ctx'> </div><div class='del'>-	rtl8168_config_eee_mac(tp);</div><div class='del'>-</div><div class='ctx'> 	RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) &amp; ~PFM_EN);</div><div class='ctx'> 	RTL_W8(tp, MISC_1, RTL_R8(tp, MISC_1) &amp; ~PFM_D3COLD_EN);</div><div class='ctx'> </div><div class='hunk'>@@ -3499,7 +3396,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)</div><div class='ctx'> 		r8168_mac_ocp_modify(tp, 0xd412, 0x0fff, sw_cnt_1ms_ini);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0070);</div><div class='add'>+	r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0000);</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xe052, 0x6000, 0x8008);</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xe0d6, 0x01ff, 0x017f);</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xd420, 0x0fff, 0x047f);</div><div class='hunk'>@@ -3528,8 +3425,6 @@ static void rtl_hw_start_8168ep(struct rtl8169_private *tp)</div><div class='ctx'> 	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000);</div><div class='ctx'> 	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000);</div><div class='ctx'> </div><div class='del'>-	rtl8168_config_eee_mac(tp);</div><div class='del'>-</div><div class='ctx'> 	rtl_w0w1_eri(tp, 0x2fc, 0x01, 0x06);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) &amp; ~TX_10M_PS_EN);</div><div class='hunk'>@@ -3585,8 +3480,6 @@ static void rtl_hw_start_8117(struct rtl8169_private *tp)</div><div class='ctx'> 	rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000);</div><div class='ctx'> 	rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000);</div><div class='ctx'> </div><div class='del'>-	rtl8168_config_eee_mac(tp);</div><div class='del'>-</div><div class='ctx'> 	RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) &amp; ~PFM_EN);</div><div class='ctx'> 	RTL_W8(tp, MISC_1, RTL_R8(tp, MISC_1) &amp; ~PFM_D3COLD_EN);</div><div class='ctx'> </div><div class='hunk'>@@ -3604,7 +3497,7 @@ static void rtl_hw_start_8117(struct rtl8169_private *tp)</div><div class='ctx'> 		r8168_mac_ocp_modify(tp, 0xd412, 0x0fff, sw_cnt_1ms_ini);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0070);</div><div class='add'>+	r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0000);</div><div class='ctx'> 	r8168_mac_ocp_write(tp, 0xea80, 0x0003);</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xe052, 0x0000, 0x0009);</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xd420, 0x0fff, 0x047f);</div><div class='hunk'>@@ -3766,8 +3659,8 @@ static void rtl_hw_start_8125_common(struct rtl8169_private *tp)</div><div class='ctx'> 	rtl_pcie_state_l2l3_disable(tp);</div><div class='ctx'> </div><div class='ctx'> 	RTL_W16(tp, 0x382, 0x221b);</div><div class='del'>-	RTL_W8(tp, 0x4500, 0);</div><div class='del'>-	RTL_W16(tp, 0x4800, 0);</div><div class='add'>+	RTL_W32(tp, RSS_CTRL_8125, 0);</div><div class='add'>+	RTL_W16(tp, Q_NUM_CTRL_8125, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* disable UPS */</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xd40a, 0x0010, 0x0000);</div><div class='hunk'>@@ -3784,12 +3677,13 @@ static void rtl_hw_start_8125_common(struct rtl8169_private *tp)</div><div class='ctx'> 	/* disable new tx descriptor format */</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);</div><div class='ctx'> </div><div class='del'>-	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_65 ||</div><div class='del'>-	    tp-&gt;mac_version == RTL_GIGA_MAC_VER_66)</div><div class='add'>+	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_70 ||</div><div class='add'>+	    tp-&gt;mac_version == RTL_GIGA_MAC_VER_80)</div><div class='ctx'> 		RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) &amp; ~0x02);</div><div class='ctx'> </div><div class='del'>-	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_65 ||</div><div class='del'>-	    tp-&gt;mac_version == RTL_GIGA_MAC_VER_66)</div><div class='add'>+	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_80)</div><div class='add'>+		r8168_mac_ocp_modify(tp, 0xe614, 0x0f00, 0x0f00);</div><div class='add'>+	else if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_70)</div><div class='ctx'> 		r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);</div><div class='ctx'> 	else if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_63)</div><div class='ctx'> 		r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);</div><div class='hunk'>@@ -3804,11 +3698,11 @@ static void rtl_hw_start_8125_common(struct rtl8169_private *tp)</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xc0b4, 0x0000, 0x000c);</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xeb6a, 0x00ff, 0x0033);</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xeb50, 0x03e0, 0x0040);</div><div class='del'>-	r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);</div><div class='add'>+	r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0000);</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);</div><div class='ctx'> 	r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);</div><div class='del'>-	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_65 ||</div><div class='del'>-	    tp-&gt;mac_version == RTL_GIGA_MAC_VER_66)</div><div class='add'>+	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_70 ||</div><div class='add'>+	    tp-&gt;mac_version == RTL_GIGA_MAC_VER_80)</div><div class='ctx'> 		r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);</div><div class='ctx'> 	else</div><div class='ctx'> 		r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);</div><div class='hunk'>@@ -3826,11 +3720,6 @@ static void rtl_hw_start_8125_common(struct rtl8169_private *tp)</div><div class='ctx'> </div><div class='ctx'> 	rtl_loop_wait_low(tp, &amp;rtl_mac_ocp_e00e_cond, 1000, 10);</div><div class='ctx'> </div><div class='del'>-	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_61)</div><div class='del'>-		rtl8125a_config_eee_mac(tp);</div><div class='del'>-	else</div><div class='del'>-		rtl8125b_config_eee_mac(tp);</div><div class='del'>-</div><div class='ctx'> 	rtl_disable_rxdvgate(tp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3881,6 +3770,13 @@ static void rtl_hw_start_8125d(struct rtl8169_private *tp)</div><div class='ctx'> </div><div class='ctx'> static void rtl_hw_start_8126a(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='add'>+	rtl_disable_zrxdc_timeout(tp);</div><div class='add'>+	rtl_set_def_aspm_entry_latency(tp);</div><div class='add'>+	rtl_hw_start_8125_common(tp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl_hw_start_8127a(struct rtl8169_private *tp)</div><div class='add'>+{</div><div class='ctx'> 	rtl_set_def_aspm_entry_latency(tp);</div><div class='ctx'> 	rtl_hw_start_8125_common(tp);</div><div class='ctx'> }</div><div class='hunk'>@@ -3892,7 +3788,6 @@ static void rtl_hw_config(struct rtl8169_private *tp)</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_08] = rtl_hw_start_8102e_3,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_09] = rtl_hw_start_8102e_2,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_10] = NULL,</div><div class='del'>-		[RTL_GIGA_MAC_VER_11] = rtl_hw_start_8168b,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_14] = rtl_hw_start_8401,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_17] = rtl_hw_start_8168b,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_18] = rtl_hw_start_8168cp_1,</div><div class='hunk'>@@ -3924,12 +3819,12 @@ static void rtl_hw_config(struct rtl8169_private *tp)</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_48] = rtl_hw_start_8168h_1,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_51] = rtl_hw_start_8168ep_3,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_52] = rtl_hw_start_8117,</div><div class='del'>-		[RTL_GIGA_MAC_VER_53] = rtl_hw_start_8117,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,</div><div class='del'>-		[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,</div><div class='del'>-		[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,</div><div class='add'>+		[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,</div><div class='add'>+		[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,</div><div class='add'>+		[RTL_GIGA_MAC_VER_80] = rtl_hw_start_8127a,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	if (hw_configs[tp-&gt;mac_version])</div><div class='hunk'>@@ -3946,12 +3841,15 @@ static void rtl_hw_start_8125(struct rtl8169_private *tp)</div><div class='ctx'> 	switch (tp-&gt;mac_version) {</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_61:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_64:</div><div class='add'>+	case RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_80:</div><div class='ctx'> 		for (i = 0xa00; i &lt; 0xb00; i += 4)</div><div class='ctx'> 			RTL_W32(tp, i, 0);</div><div class='add'>+		if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_80)</div><div class='add'>+			RTL_W16(tp, INT_CFG1_8125, 0x0000);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_63:</div><div class='del'>-	case RTL_GIGA_MAC_VER_65:</div><div class='del'>-	case RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_70:</div><div class='ctx'> 		for (i = 0xa00; i &lt; 0xa80; i += 4)</div><div class='ctx'> 			RTL_W32(tp, i, 0);</div><div class='ctx'> 		RTL_W16(tp, INT_CFG1_8125, 0x0000);</div><div class='hunk'>@@ -4183,7 +4081,7 @@ static void rtl8169_cleanup(struct rtl8169_private *tp)</div><div class='ctx'> 		RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);</div><div class='ctx'> 		rtl_loop_wait_high(tp, &amp;rtl_txcfg_empty_cond, 100, 666);</div><div class='ctx'> 		break;</div><div class='del'>-	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 		rtl_enable_rxdvgate(tp);</div><div class='ctx'> 		fsleep(2000);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -4340,7 +4238,7 @@ static unsigned int rtl_quirk_packet_padto(struct rtl8169_private *tp,</div><div class='ctx'> </div><div class='ctx'> 	switch (tp-&gt;mac_version) {</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_34:</div><div class='del'>-	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 		padto = max_t(unsigned int, padto, ETH_ZLEN);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -4768,12 +4666,6 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)</div><div class='ctx'> 	if (status &amp; LinkChg)</div><div class='ctx'> 		phy_mac_interrupt(tp-&gt;phydev);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(status &amp; RxFIFOOver &amp;&amp;</div><div class='del'>-	    tp-&gt;mac_version == RTL_GIGA_MAC_VER_11)) {</div><div class='del'>-		netif_stop_queue(tp-&gt;dev);</div><div class='del'>-		rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	rtl_irq_disable(tp);</div><div class='ctx'> 	napi_schedule(&amp;tp-&gt;napi);</div><div class='ctx'> out:</div><div class='hunk'>@@ -4811,8 +4703,6 @@ static void rtl_task(struct work_struct *work)</div><div class='ctx'> reset:</div><div class='ctx'> 		rtl_reset_work(tp);</div><div class='ctx'> 		netif_wake_queue(tp-&gt;dev);</div><div class='del'>-	} else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp-&gt;wk.flags)) {</div><div class='del'>-		rtl_reset_work(tp);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4832,6 +4722,41 @@ static int rtl8169_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtl_enable_tx_lpi(struct rtl8169_private *tp, bool enable)</div><div class='add'>+{</div><div class='add'>+	if (!rtl_supports_eee(tp))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (tp-&gt;mac_version) {</div><div class='add'>+	case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_52:</div><div class='add'>+		/* Adjust EEE LED frequency */</div><div class='add'>+		if (tp-&gt;mac_version != RTL_GIGA_MAC_VER_38)</div><div class='add'>+			RTL_W8(tp, EEE_LED, RTL_R8(tp, EEE_LED) &amp; ~0x07);</div><div class='add'>+		if (enable)</div><div class='add'>+			rtl_eri_set_bits(tp, 0x1b0, 0x0003);</div><div class='add'>+		else</div><div class='add'>+			rtl_eri_clear_bits(tp, 0x1b0, 0x0003);</div><div class='add'>+		break;</div><div class='add'>+	case RTL_GIGA_MAC_VER_61:</div><div class='add'>+		if (enable) {</div><div class='add'>+			r8168_mac_ocp_modify(tp, 0xe040, 0, 0x0003);</div><div class='add'>+			r8168_mac_ocp_modify(tp, 0xeb62, 0, 0x0006);</div><div class='add'>+		} else {</div><div class='add'>+			r8168_mac_ocp_modify(tp, 0xe040, 0x0003, 0);</div><div class='add'>+			r8168_mac_ocp_modify(tp, 0xeb62, 0x0006, 0);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_LAST:</div><div class='add'>+		if (enable)</div><div class='add'>+			r8168_mac_ocp_modify(tp, 0xe040, 0, 0x0003);</div><div class='add'>+		else</div><div class='add'>+			r8168_mac_ocp_modify(tp, 0xe040, 0x0003, 0);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void r8169_phylink_handler(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl8169_private *tp = netdev_priv(ndev);</div><div class='hunk'>@@ -4839,6 +4764,7 @@ static void r8169_phylink_handler(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	if (netif_carrier_ok(ndev)) {</div><div class='ctx'> 		rtl_link_chg_patch(tp);</div><div class='add'>+		rtl_enable_tx_lpi(tp, tp-&gt;phydev-&gt;enable_tx_lpi);</div><div class='ctx'> 		pm_request_resume(d);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pm_runtime_idle(d);</div><div class='hunk'>@@ -5082,9 +5008,8 @@ static int rtl8169_resume(struct device *device)</div><div class='ctx'> 	if (!device_may_wakeup(tp_to_dev(tp)))</div><div class='ctx'> 		clk_prepare_enable(tp-&gt;clk);</div><div class='ctx'> </div><div class='del'>-	/* Reportedly at least Asus X453MA truncates packets otherwise */</div><div class='del'>-	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_37)</div><div class='del'>-		rtl_init_rxcfg(tp);</div><div class='add'>+	/* Some chip versions may truncate packets without this initialization */</div><div class='add'>+	rtl_init_rxcfg(tp);</div><div class='ctx'> </div><div class='ctx'> 	return rtl8169_runtime_resume(device);</div><div class='ctx'> }</div><div class='hunk'>@@ -5136,10 +5061,8 @@ static void rtl_shutdown(struct pci_dev *pdev)</div><div class='ctx'> 	/* Restore original MAC address */</div><div class='ctx'> 	rtl_rar_set(tp, tp-&gt;dev-&gt;perm_addr);</div><div class='ctx'> </div><div class='del'>-	if (system_state == SYSTEM_POWER_OFF &amp;&amp; !tp-&gt;dash_enabled) {</div><div class='del'>-		pci_wake_from_d3(pdev, tp-&gt;saved_wolopts);</div><div class='del'>-		pci_set_power_state(pdev, PCI_D3hot);</div><div class='del'>-	}</div><div class='add'>+	if (system_state == SYSTEM_POWER_OFF &amp;&amp; !tp-&gt;dash_enabled)</div><div class='add'>+		pci_prepare_to_sleep(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl_remove_one(struct pci_dev *pdev)</div><div class='hunk'>@@ -5191,9 +5114,6 @@ static void rtl_set_irq_mask(struct rtl8169_private *tp)</div><div class='ctx'> </div><div class='ctx'> 	if (tp-&gt;mac_version &lt;= RTL_GIGA_MAC_VER_06)</div><div class='ctx'> 		tp-&gt;irq_mask |= SYSErr | RxFIFOOver;</div><div class='del'>-	else if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_11)</div><div class='del'>-		/* special workaround needed */</div><div class='del'>-		tp-&gt;irq_mask |= RxFIFOOver;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rtl_alloc_irq(struct rtl8169_private *tp)</div><div class='hunk'>@@ -5266,6 +5186,33 @@ static int r8169_mdio_write_reg(struct mii_bus *mii_bus, int phyaddr,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int r8169_mdio_read_reg_c45(struct mii_bus *mii_bus, int addr,</div><div class='add'>+				   int devnum, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct rtl8169_private *tp = mii_bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (addr &gt; 0)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (devnum == MDIO_MMD_VEND2 &amp;&amp; regnum &gt; MDIO_STAT2)</div><div class='add'>+		return r8168_phy_ocp_read(tp, regnum);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int r8169_mdio_write_reg_c45(struct mii_bus *mii_bus, int addr,</div><div class='add'>+				    int devnum, int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct rtl8169_private *tp = mii_bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (addr &gt; 0 || devnum != MDIO_MMD_VEND2 || regnum &lt;= MDIO_STAT2)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	r8168_phy_ocp_write(tp, regnum, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int r8169_mdio_register(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = tp-&gt;pci_dev;</div><div class='hunk'>@@ -5289,12 +5236,18 @@ static int r8169_mdio_register(struct rtl8169_private *tp)</div><div class='ctx'> 	new_bus-&gt;priv = tp;</div><div class='ctx'> 	new_bus-&gt;parent = &amp;pdev-&gt;dev;</div><div class='ctx'> 	new_bus-&gt;irq[0] = PHY_MAC_INTERRUPT;</div><div class='add'>+	new_bus-&gt;phy_mask = GENMASK(31, 1);</div><div class='ctx'> 	snprintf(new_bus-&gt;id, MII_BUS_ID_SIZE, "r8169-%x-%x",</div><div class='ctx'> 		 pci_domain_nr(pdev-&gt;bus), pci_dev_id(pdev));</div><div class='ctx'> </div><div class='ctx'> 	new_bus-&gt;read = r8169_mdio_read_reg;</div><div class='ctx'> 	new_bus-&gt;write = r8169_mdio_write_reg;</div><div class='ctx'> </div><div class='add'>+	if (tp-&gt;mac_version &gt;= RTL_GIGA_MAC_VER_40) {</div><div class='add'>+		new_bus-&gt;read_c45 = r8169_mdio_read_reg_c45;</div><div class='add'>+		new_bus-&gt;write_c45 = r8169_mdio_write_reg_c45;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = devm_mdiobus_register(&amp;pdev-&gt;dev, new_bus);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -5316,6 +5269,11 @@ static int r8169_mdio_register(struct rtl8169_private *tp)</div><div class='ctx'> 		phy_support_eee(tp-&gt;phydev);</div><div class='ctx'> 	phy_support_asym_pause(tp-&gt;phydev);</div><div class='ctx'> </div><div class='add'>+	/* mimic behavior of r8125/r8126 vendor drivers */</div><div class='add'>+	if (tp-&gt;mac_version == RTL_GIGA_MAC_VER_61)</div><div class='add'>+		phy_disable_eee_mode(tp-&gt;phydev,</div><div class='add'>+				     ETHTOOL_LINK_MODE_2500baseT_Full_BIT);</div><div class='add'>+</div><div class='ctx'> 	/* PHY will be woken up in rtl_open() */</div><div class='ctx'> 	phy_suspend(tp-&gt;phydev);</div><div class='ctx'> </div><div class='hunk'>@@ -5357,13 +5315,13 @@ static void rtl_hw_init_8125(struct rtl8169_private *tp)</div><div class='ctx'> static void rtl_hw_initialize(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='ctx'> 	switch (tp-&gt;mac_version) {</div><div class='del'>-	case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_53:</div><div class='add'>+	case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_52:</div><div class='ctx'> 		rtl8168ep_stop_cmac(tp);</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:</div><div class='ctx'> 		rtl_hw_init_8168g(tp);</div><div class='ctx'> 		break;</div><div class='del'>-	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:</div><div class='add'>+	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:</div><div class='ctx'> 		rtl_hw_init_8125(tp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -5382,12 +5340,14 @@ static int rtl_jumbo_max(struct rtl8169_private *tp)</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:</div><div class='ctx'> 		return JUMBO_7K;</div><div class='ctx'> 	/* RTL8168b */</div><div class='del'>-	case RTL_GIGA_MAC_VER_11:</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_17:</div><div class='ctx'> 		return JUMBO_4K;</div><div class='ctx'> 	/* RTL8168c */</div><div class='ctx'> 	case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_24:</div><div class='ctx'> 		return JUMBO_6K;</div><div class='add'>+	/* RTL8125/8126 */</div><div class='add'>+	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_LAST:</div><div class='add'>+		return JUMBO_16K;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return JUMBO_9K;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5422,55 +5382,18 @@ done:</div><div class='ctx'> /* register is set if system vendor successfully tested ASPM 1.2 */</div><div class='ctx'> static bool rtl_aspm_is_safe(struct rtl8169_private *tp)</div><div class='ctx'> {</div><div class='del'>-	if (tp-&gt;mac_version &gt;= RTL_GIGA_MAC_VER_61 &amp;&amp;</div><div class='add'>+	if (tp-&gt;mac_version &gt;= RTL_GIGA_MAC_VER_46 &amp;&amp;</div><div class='ctx'> 	    r8168_mac_ocp_read(tp, 0xc0b2) &amp; 0xf)</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static umode_t r8169_hwmon_is_visible(const void *drvdata,</div><div class='del'>-				      enum hwmon_sensor_types type,</div><div class='del'>-				      u32 attr, int channel)</div><div class='del'>-{</div><div class='del'>-	return 0444;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int r8169_hwmon_read(struct device *dev, enum hwmon_sensor_types type,</div><div class='del'>-			    u32 attr, int channel, long *val)</div><div class='del'>-{</div><div class='del'>-	struct rtl8169_private *tp = dev_get_drvdata(dev);</div><div class='del'>-	int val_raw;</div><div class='del'>-</div><div class='del'>-	val_raw = phy_read_paged(tp-&gt;phydev, 0xbd8, 0x12) &amp; 0x3ff;</div><div class='del'>-	if (val_raw &gt;= 512)</div><div class='del'>-		val_raw -= 1024;</div><div class='del'>-</div><div class='del'>-	*val = 1000 * val_raw / 2;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct hwmon_ops r8169_hwmon_ops = {</div><div class='del'>-	.is_visible =  r8169_hwmon_is_visible,</div><div class='del'>-	.read = r8169_hwmon_read,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info * const r8169_hwmon_info[] = {</div><div class='del'>-	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),</div><div class='del'>-	NULL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_chip_info r8169_hwmon_chip_info = {</div><div class='del'>-	.ops = &amp;r8169_hwmon_ops,</div><div class='del'>-	.info = r8169_hwmon_info,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='add'>+	const struct rtl_chip_info *chip;</div><div class='ctx'> 	struct rtl8169_private *tp;</div><div class='ctx'> 	int jumbo_max, region, rc;</div><div class='del'>-	enum mac_version chipset;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	u32 txconfig;</div><div class='ctx'> 	u16 xid;</div><div class='hunk'>@@ -5487,8 +5410,6 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	tp-&gt;supports_gmii = ent-&gt;driver_data == RTL_CFG_NO_GBIT ? 0 : 1;</div><div class='ctx'> 	tp-&gt;ocp_base = OCP_STD_PHY_BASE;</div><div class='ctx'> </div><div class='del'>-	raw_spin_lock_init(&amp;tp-&gt;cfg9346_usage_lock);</div><div class='del'>-	raw_spin_lock_init(&amp;tp-&gt;config25_lock);</div><div class='ctx'> 	raw_spin_lock_init(&amp;tp-&gt;mac_ocp_lock);</div><div class='ctx'> 	mutex_init(&amp;tp-&gt;led_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -5510,11 +5431,10 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	if (region &lt; 0)</div><div class='ctx'> 		return dev_err_probe(&amp;pdev-&gt;dev, -ENODEV, "no MMIO resource found\n");</div><div class='ctx'> </div><div class='del'>-	rc = pcim_iomap_regions(pdev, BIT(region), KBUILD_MODNAME);</div><div class='del'>-	if (rc &lt; 0)</div><div class='del'>-		return dev_err_probe(&amp;pdev-&gt;dev, rc, "cannot remap MMIO, aborting\n");</div><div class='del'>-</div><div class='del'>-	tp-&gt;mmio_addr = pcim_iomap_table(pdev)[region];</div><div class='add'>+	tp-&gt;mmio_addr = pcim_iomap_region(pdev, region, KBUILD_MODNAME);</div><div class='add'>+	if (IS_ERR(tp-&gt;mmio_addr))</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(tp-&gt;mmio_addr),</div><div class='add'>+				     "cannot remap MMIO, aborting\n");</div><div class='ctx'> </div><div class='ctx'> 	txconfig = RTL_R32(tp, TxConfig);</div><div class='ctx'> 	if (txconfig == ~0U)</div><div class='hunk'>@@ -5523,22 +5443,34 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	xid = (txconfig &gt;&gt; 20) &amp; 0xfcf;</div><div class='ctx'> </div><div class='ctx'> 	/* Identify chip attached to board */</div><div class='del'>-	chipset = rtl8169_get_mac_version(xid, tp-&gt;supports_gmii);</div><div class='del'>-	if (chipset == RTL_GIGA_MAC_NONE)</div><div class='add'>+	chip = rtl8169_get_chip_version(xid, tp-&gt;supports_gmii);</div><div class='add'>+	if (chip-&gt;mac_version == RTL_GIGA_MAC_NONE)</div><div class='ctx'> 		return dev_err_probe(&amp;pdev-&gt;dev, -ENODEV,</div><div class='ctx'> 				     "unknown chip XID %03x, contact r8169 maintainers (see MAINTAINERS file)\n",</div><div class='ctx'> 				     xid);</div><div class='del'>-	tp-&gt;mac_version = chipset;</div><div class='add'>+	tp-&gt;mac_version = chip-&gt;mac_version;</div><div class='add'>+	tp-&gt;fw_name = chip-&gt;fw_name;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable ASPM L1 as that cause random device stop working</div><div class='ctx'> 	 * problems as well as full system hangs for some PCIe devices users.</div><div class='ctx'> 	 */</div><div class='del'>-	if (rtl_aspm_is_safe(tp))</div><div class='add'>+	if (rtl_aspm_is_safe(tp)) {</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "System vendor flags ASPM as safe\n");</div><div class='ctx'> 		rc = 0;</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='ctx'> 		rc = pci_disable_link_state(pdev, PCIE_LINK_STATE_L1);</div><div class='add'>+	}</div><div class='ctx'> 	tp-&gt;aspm_manageable = !rc;</div><div class='ctx'> </div><div class='add'>+	/* Fiber mode on RTL8127AF isn't supported */</div><div class='add'>+	if (rtl_is_8125(tp)) {</div><div class='add'>+		u16 data = r8168_mac_ocp_read(tp, 0xd006);</div><div class='add'>+</div><div class='add'>+		if ((data &amp; 0xff) == 0x07)</div><div class='add'>+			return dev_err_probe(&amp;pdev-&gt;dev, -ENODEV,</div><div class='add'>+					     "Fiber mode not supported\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	tp-&gt;dash_type = rtl_get_dash_type(tp);</div><div class='ctx'> 	tp-&gt;dash_enabled = rtl_dash_is_enabled(tp);</div><div class='ctx'> </div><div class='hunk'>@@ -5633,8 +5565,6 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	rtl_set_irq_mask(tp);</div><div class='ctx'> </div><div class='del'>-	tp-&gt;fw_name = rtl_chip_infos[chipset].fw_name;</div><div class='del'>-</div><div class='ctx'> 	tp-&gt;counters = dmam_alloc_coherent (&amp;pdev-&gt;dev, sizeof(*tp-&gt;counters),</div><div class='ctx'> 					    &amp;tp-&gt;counters_phys_addr,</div><div class='ctx'> 					    GFP_KERNEL);</div><div class='hunk'>@@ -5647,12 +5577,6 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	/* The temperature sensor is available from RTl8125B */</div><div class='del'>-	if (IS_REACHABLE(CONFIG_HWMON) &amp;&amp; tp-&gt;mac_version &gt;= RTL_GIGA_MAC_VER_63)</div><div class='del'>-		/* ignore errors */</div><div class='del'>-		devm_hwmon_device_register_with_info(&amp;pdev-&gt;dev, "nic_temp", tp,</div><div class='del'>-						     &amp;r8169_hwmon_chip_info,</div><div class='del'>-						     NULL);</div><div class='ctx'> 	rc = register_netdev(dev);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='hunk'>@@ -5665,7 +5589,7 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(dev, "%s, %pM, XID %03x, IRQ %d\n",</div><div class='del'>-		    rtl_chip_infos[chipset].name, dev-&gt;dev_addr, xid, tp-&gt;irq);</div><div class='add'>+		    chip-&gt;name, dev-&gt;dev_addr, xid, tp-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	if (jumbo_max)</div><div class='ctx'> 		netdev_info(dev, "jumbo features [frames: %d bytes, tx checksumming: %s]\n",</div><div class='head'>diff --git a/drivers/net/ethernet/realtek/r8169_phy_config.c b/drivers/net/ethernet/realtek/r8169_phy_config.c<br/>index 1d5b33f6c4b5..032d9d2cfa2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/r8169_phy_config.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/r8169_phy_config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/r8169_phy_config.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/realtek/r8169_phy_config.c</a></div><div class='hunk'>@@ -50,6 +50,15 @@ static void r8168g_phy_param(struct phy_device *phydev, u16 parm,</div><div class='ctx'> 	phy_restore_page(phydev, oldpage, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtl8125_phy_param(struct phy_device *phydev, u16 parm,</div><div class='add'>+			      u16 mask, u16 val)</div><div class='add'>+{</div><div class='add'>+	phy_lock_mdio_bus(phydev);</div><div class='add'>+	__phy_write_mmd(phydev, MDIO_MMD_VEND2, 0xb87c, parm);</div><div class='add'>+	__phy_modify_mmd(phydev, MDIO_MMD_VEND2, 0xb87e, mask, val);</div><div class='add'>+	phy_unlock_mdio_bus(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct phy_reg {</div><div class='ctx'> 	u16 reg;</div><div class='ctx'> 	u16 val;</div><div class='hunk'>@@ -96,15 +105,7 @@ static void rtl8125_common_config_eee_phy(struct phy_device *phydev)</div><div class='ctx'> 	phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl8125a_config_eee_phy(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	rtl8168g_config_eee_phy(phydev);</div><div class='del'>-	/* disable EEE at 2.5Gbps */</div><div class='del'>-	phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000);</div><div class='del'>-	rtl8125_common_config_eee_phy(phydev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rtl8125b_config_eee_phy(struct phy_device *phydev)</div><div class='add'>+static void rtl8125_config_eee_phy(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	rtl8168g_config_eee_phy(phydev);</div><div class='ctx'> 	rtl8125_common_config_eee_phy(phydev);</div><div class='hunk'>@@ -284,15 +285,6 @@ static void rtl8169sce_hw_phy_config(struct rtl8169_private *tp,</div><div class='ctx'> 	rtl_writephy_batch(phydev, phy_reg_init);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rtl8168bb_hw_phy_config(struct rtl8169_private *tp,</div><div class='del'>-				    struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	phy_write(phydev, 0x1f, 0x0001);</div><div class='del'>-	phy_set_bits(phydev, 0x16, BIT(0));</div><div class='del'>-	phy_write(phydev, 0x10, 0xf41b);</div><div class='del'>-	phy_write(phydev, 0x1f, 0x0000);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void rtl8168bef_hw_phy_config(struct rtl8169_private *tp,</div><div class='ctx'> 				     struct phy_device *phydev)</div><div class='ctx'> {</div><div class='hunk'>@@ -1021,12 +1013,8 @@ static void rtl8125a_2_hw_phy_config(struct rtl8169_private *tp,</div><div class='ctx'> 	phy_write_paged(phydev, 0xac5, 0x16, 0x01ff);</div><div class='ctx'> 	phy_modify_paged(phydev, 0xac8, 0x15, 0x00f0, 0x0030);</div><div class='ctx'> </div><div class='del'>-	phy_write(phydev, 0x1f, 0x0b87);</div><div class='del'>-	phy_write(phydev, 0x16, 0x80a2);</div><div class='del'>-	phy_write(phydev, 0x17, 0x0153);</div><div class='del'>-	phy_write(phydev, 0x16, 0x809c);</div><div class='del'>-	phy_write(phydev, 0x17, 0x0153);</div><div class='del'>-	phy_write(phydev, 0x1f, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x80a2, 0xffff, 0x0153);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x809c, 0xffff, 0x0153);</div><div class='ctx'> </div><div class='ctx'> 	phy_write(phydev, 0x1f, 0x0a43);</div><div class='ctx'> 	phy_write(phydev, 0x13, 0x81B3);</div><div class='hunk'>@@ -1066,7 +1054,7 @@ static void rtl8125a_2_hw_phy_config(struct rtl8169_private *tp,</div><div class='ctx'> 	rtl8168g_enable_gphy_10m(phydev);</div><div class='ctx'> </div><div class='ctx'> 	rtl8168g_disable_aldps(phydev);</div><div class='del'>-	rtl8125a_config_eee_phy(phydev);</div><div class='add'>+	rtl8125_config_eee_phy(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl8125b_hw_phy_config(struct rtl8169_private *tp,</div><div class='hunk'>@@ -1078,14 +1066,9 @@ static void rtl8125b_hw_phy_config(struct rtl8169_private *tp,</div><div class='ctx'> 	phy_modify_paged(phydev, 0xac4, 0x13, 0x00f0, 0x0090);</div><div class='ctx'> 	phy_modify_paged(phydev, 0xad3, 0x10, 0x0003, 0x0001);</div><div class='ctx'> </div><div class='del'>-	phy_write(phydev, 0x1f, 0x0b87);</div><div class='del'>-	phy_write(phydev, 0x16, 0x80f5);</div><div class='del'>-	phy_write(phydev, 0x17, 0x760e);</div><div class='del'>-	phy_write(phydev, 0x16, 0x8107);</div><div class='del'>-	phy_write(phydev, 0x17, 0x360e);</div><div class='del'>-	phy_write(phydev, 0x16, 0x8551);</div><div class='del'>-	phy_modify(phydev, 0x17, 0xff00, 0x0800);</div><div class='del'>-	phy_write(phydev, 0x1f, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x80f5, 0xffff, 0x760e);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8107, 0xffff, 0x360e);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8551, 0xff00, 0x0800);</div><div class='ctx'> </div><div class='ctx'> 	phy_modify_paged(phydev, 0xbf0, 0x10, 0xe000, 0xa000);</div><div class='ctx'> 	phy_modify_paged(phydev, 0xbf4, 0x13, 0x0f00, 0x0300);</div><div class='hunk'>@@ -1106,7 +1089,7 @@ static void rtl8125b_hw_phy_config(struct rtl8169_private *tp,</div><div class='ctx'> </div><div class='ctx'> 	rtl8125_legacy_force_mode(phydev);</div><div class='ctx'> 	rtl8168g_disable_aldps(phydev);</div><div class='del'>-	rtl8125b_config_eee_phy(phydev);</div><div class='add'>+	rtl8125_config_eee_phy(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,</div><div class='hunk'>@@ -1116,7 +1099,25 @@ static void rtl8125d_hw_phy_config(struct rtl8169_private *tp,</div><div class='ctx'> 	rtl8168g_enable_gphy_10m(phydev);</div><div class='ctx'> 	rtl8125_legacy_force_mode(phydev);</div><div class='ctx'> 	rtl8168g_disable_aldps(phydev);</div><div class='del'>-	rtl8125b_config_eee_phy(phydev);</div><div class='add'>+	rtl8125_config_eee_phy(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8125bp_hw_phy_config(struct rtl8169_private *tp,</div><div class='add'>+				    struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	r8169_apply_firmware(tp);</div><div class='add'>+	rtl8168g_enable_gphy_10m(phydev);</div><div class='add'>+</div><div class='add'>+	r8168g_phy_param(phydev, 0x8010, 0x0800, 0x0000);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8088, 0xff00, 0x9000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x808f, 0xff00, 0x9000);</div><div class='add'>+</div><div class='add'>+	r8168g_phy_param(phydev, 0x8174, 0x2000, 0x1800);</div><div class='add'>+</div><div class='add'>+	rtl8125_legacy_force_mode(phydev);</div><div class='add'>+	rtl8168g_disable_aldps(phydev);</div><div class='add'>+	rtl8125_config_eee_phy(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,</div><div class='hunk'>@@ -1129,6 +1130,171 @@ static void rtl8126a_hw_phy_config(struct rtl8169_private *tp,</div><div class='ctx'> 	rtl8125_common_config_eee_phy(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtl8127a_1_hw_phy_config(struct rtl8169_private *tp,</div><div class='add'>+				     struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	r8169_apply_firmware(tp);</div><div class='add'>+	rtl8168g_enable_gphy_10m(phydev);</div><div class='add'>+</div><div class='add'>+	r8168g_phy_param(phydev, 0x8415, 0xff00, 0x9300);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81a3, 0xff00, 0x0f00);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81ae, 0xff00, 0x0f00);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81b9, 0xff00, 0xb900);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x83b0, 0x0e00, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x83C5, 0x0e00, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x83da, 0x0e00, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x83ef, 0x0e00, 0x0000);</div><div class='add'>+	phy_modify_paged(phydev, 0x0bf3, 0x14, 0x01f0, 0x0160);</div><div class='add'>+	phy_modify_paged(phydev, 0x0bf3, 0x15, 0x001f, 0x0014);</div><div class='add'>+	phy_modify_paged(phydev, 0x0bf2, 0x14, 0x6000, 0x0000);</div><div class='add'>+	phy_modify_paged(phydev, 0x0bf2, 0x16, 0xc000, 0x0000);</div><div class='add'>+	phy_modify_paged(phydev, 0x0bf2, 0x14, 0x1fff, 0x0187);</div><div class='add'>+	phy_modify_paged(phydev, 0x0bf2, 0x15, 0x003f, 0x0003);</div><div class='add'>+</div><div class='add'>+	r8168g_phy_param(phydev, 0x8173, 0xffff, 0x8620);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8175, 0xffff, 0x8671);</div><div class='add'>+	r8168g_phy_param(phydev, 0x817c, 0x0000, 0x2000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8187, 0x0000, 0x2000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8192, 0x0000, 0x2000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x819d, 0x0000, 0x2000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81a8, 0x2000, 0x0000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81b3, 0x2000, 0x0000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81be, 0x0000, 0x2000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x817d, 0xff00, 0xa600);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8188, 0xff00, 0xa600);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8193, 0xff00, 0xa600);</div><div class='add'>+	r8168g_phy_param(phydev, 0x819e, 0xff00, 0xa600);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81a9, 0xff00, 0x1400);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81b4, 0xff00, 0x1400);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81bf, 0xff00, 0xa600);</div><div class='add'>+</div><div class='add'>+	phy_modify_paged(phydev, 0x0aea, 0x15, 0x0028, 0x0000);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x84f0, 0xffff, 0x201c);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x84f2, 0xffff, 0x3117);</div><div class='add'>+</div><div class='add'>+	phy_write_paged(phydev, 0x0aec, 0x13, 0x0000);</div><div class='add'>+	phy_write_paged(phydev, 0x0ae2, 0x10, 0xffff);</div><div class='add'>+	phy_write_paged(phydev, 0x0aec, 0x17, 0xffff);</div><div class='add'>+	phy_write_paged(phydev, 0x0aed, 0x11, 0xffff);</div><div class='add'>+	phy_write_paged(phydev, 0x0aec, 0x14, 0x0000);</div><div class='add'>+	phy_modify_paged(phydev, 0x0aed, 0x10, 0x0001, 0x0000);</div><div class='add'>+	phy_write_paged(phydev, 0x0adb, 0x14, 0x0150);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8197, 0xff00, 0x5000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8231, 0xff00, 0x5000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x82cb, 0xff00, 0x5000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x82cd, 0xff00, 0x5700);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8233, 0xff00, 0x5700);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8199, 0xff00, 0x5700);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x815a, 0xffff, 0x0150);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x81f4, 0xffff, 0x0150);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x828e, 0xffff, 0x0150);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x81b1, 0xffff, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x824b, 0xffff, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x82e5, 0xffff, 0x0000);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x84f7, 0xff00, 0x2800);</div><div class='add'>+	phy_modify_paged(phydev, 0x0aec, 0x11, 0x0000, 0x1000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x81b3, 0xff00, 0xad00);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x824d, 0xff00, 0xad00);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x82e7, 0xff00, 0xad00);</div><div class='add'>+	phy_modify_paged(phydev, 0x0ae4, 0x17, 0x000f, 0x0001);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x82ce, 0xf000, 0x4000);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x84ac, 0xffff, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x84ae, 0xffff, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x84b0, 0xffff, 0xf818);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x84b2, 0xff00, 0x6000);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8ffc, 0xffff, 0x6008);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8ffe, 0xffff, 0xf450);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8015, 0x0000, 0x0200);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8016, 0x0800, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8fe6, 0xff00, 0x0800);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8fe4, 0xffff, 0x2114);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8647, 0xffff, 0xa7b1);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8649, 0xffff, 0xbbca);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x864b, 0xff00, 0xdc00);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8154, 0xc000, 0x4000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8158, 0xc000, 0x0000);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x826c, 0xffff, 0xffff);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x826e, 0xffff, 0xffff);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8872, 0xff00, 0x0e00);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8012, 0x0000, 0x0800);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8012, 0x0000, 0x4000);</div><div class='add'>+	phy_modify_paged(phydev, 0x0b57, 0x13, 0x0000, 0x0001);</div><div class='add'>+	r8168g_phy_param(phydev, 0x834a, 0xff00, 0x0700);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8217, 0x3f00, 0x2a00);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81b1, 0xff00, 0x0b00);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8fed, 0xff00, 0x4e00);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x88ac, 0xff00, 0x2300);</div><div class='add'>+	phy_modify_paged(phydev, 0x0bf0, 0x16, 0x0000, 0x3800);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x88de, 0xff00, 0x0000);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x80b4, 0xffff, 0x5195);</div><div class='add'>+</div><div class='add'>+	r8168g_phy_param(phydev, 0x8370, 0xffff, 0x8671);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8372, 0xffff, 0x86c8);</div><div class='add'>+</div><div class='add'>+	r8168g_phy_param(phydev, 0x8401, 0xffff, 0x86c8);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8403, 0xffff, 0x86da);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8406, 0x1800, 0x1000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8408, 0x1800, 0x1000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x840a, 0x1800, 0x1000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x840c, 0x1800, 0x1000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x840e, 0x1800, 0x1000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8410, 0x1800, 0x1000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8412, 0x1800, 0x1000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8414, 0x1800, 0x1000);</div><div class='add'>+	r8168g_phy_param(phydev, 0x8416, 0x1800, 0x1000);</div><div class='add'>+</div><div class='add'>+	r8168g_phy_param(phydev, 0x82bd, 0xffff, 0x1f40);</div><div class='add'>+</div><div class='add'>+	phy_modify_paged(phydev, 0x0bfb, 0x12, 0x07ff, 0x0328);</div><div class='add'>+	phy_write_paged(phydev, 0x0bfb, 0x13, 0x3e14);</div><div class='add'>+</div><div class='add'>+	r8168g_phy_param(phydev, 0x81c4, 0xffff, 0x003b);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81c6, 0xffff, 0x0086);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81c8, 0xffff, 0x00b7);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81ca, 0xffff, 0x00db);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81cc, 0xffff, 0x00fe);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81ce, 0xffff, 0x00fe);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81d0, 0xffff, 0x00fe);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81d2, 0xffff, 0x00fe);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81d4, 0xffff, 0x00c3);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81d6, 0xffff, 0x0078);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81d8, 0xffff, 0x0047);</div><div class='add'>+	r8168g_phy_param(phydev, 0x81da, 0xffff, 0x0023);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x88d7, 0xffff, 0x01a0);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x88d9, 0xffff, 0x01a0);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8ffa, 0xffff, 0x002a);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8fee, 0xffff, 0xffdf);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8ff0, 0xffff, 0xffff);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8ff2, 0xffff, 0x0a4a);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8ff4, 0xffff, 0xaa5a);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8ff6, 0xffff, 0x0a4a);</div><div class='add'>+</div><div class='add'>+	rtl8125_phy_param(phydev, 0x8ff8, 0xffff, 0xaa5a);</div><div class='add'>+	rtl8125_phy_param(phydev, 0x88d5, 0xff00, 0x0200);</div><div class='add'>+</div><div class='add'>+	r8168g_phy_param(phydev, 0x84bb, 0xff00, 0x0a00);</div><div class='add'>+	r8168g_phy_param(phydev, 0x84c0, 0xff00, 0x1600);</div><div class='add'>+</div><div class='add'>+	phy_modify_paged(phydev, 0x0a43, 0x10, 0x0000, 0x0003);</div><div class='add'>+</div><div class='add'>+	rtl8125_legacy_force_mode(phydev);</div><div class='add'>+	rtl8168g_disable_aldps(phydev);</div><div class='add'>+	rtl8125_common_config_eee_phy(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,</div><div class='ctx'> 			 enum mac_version ver)</div><div class='ctx'> {</div><div class='hunk'>@@ -1144,7 +1310,6 @@ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_08] = rtl8102e_hw_phy_config,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_09] = rtl8102e_hw_phy_config,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_10] = NULL,</div><div class='del'>-		[RTL_GIGA_MAC_VER_11] = rtl8168bb_hw_phy_config,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_14] = rtl8401_hw_phy_config,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_17] = rtl8168bef_hw_phy_config,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_18] = rtl8168cp_1_hw_phy_config,</div><div class='hunk'>@@ -1176,12 +1341,12 @@ void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_48] = rtl8168h_2_hw_phy_config,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_51] = rtl8168ep_2_hw_phy_config,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_52] = rtl8117_hw_phy_config,</div><div class='del'>-		[RTL_GIGA_MAC_VER_53] = rtl8117_hw_phy_config,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,</div><div class='ctx'> 		[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,</div><div class='del'>-		[RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,</div><div class='del'>-		[RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,</div><div class='add'>+		[RTL_GIGA_MAC_VER_66] = rtl8125bp_hw_phy_config,</div><div class='add'>+		[RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,</div><div class='add'>+		[RTL_GIGA_MAC_VER_80] = rtl8127a_1_hw_phy_config,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	if (phy_configs[ver])</div><div class='head'>diff --git a/drivers/net/ethernet/realtek/rtase/rtase.h b/drivers/net/ethernet/realtek/rtase/rtase.h<br/>index 583c33930f88..b9209eb6ea73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/rtase/rtase.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/rtase/rtase.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/rtase/rtase.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/realtek/rtase/rtase.h</a></div><div class='hunk'>@@ -9,7 +9,11 @@</div><div class='ctx'> #ifndef RTASE_H</div><div class='ctx'> #define RTASE_H</div><div class='ctx'> </div><div class='del'>-#define RTASE_HW_VER_MASK 0x7C800000</div><div class='add'>+#define RTASE_HW_VER_MASK     0x7C800000</div><div class='add'>+#define RTASE_HW_VER_906X_7XA 0x00800000</div><div class='add'>+#define RTASE_HW_VER_906X_7XC 0x04000000</div><div class='add'>+#define RTASE_HW_VER_907XD_V1 0x04800000</div><div class='add'>+#define RTASE_HW_VER_907XD_VA 0x08000000</div><div class='ctx'> </div><div class='ctx'> #define RTASE_RX_DMA_BURST_256       4</div><div class='ctx'> #define RTASE_TX_DMA_BURST_UNLIMITED 7</div><div class='hunk'>@@ -166,11 +170,12 @@ enum rtase_registers {</div><div class='ctx'> #define RTASE_TC_MODE_MASK GENMASK(11, 10)</div><div class='ctx'> </div><div class='ctx'> 	RTASE_TOKSEL      = 0x2046,</div><div class='add'>+	RTASE_TXQCRDT_0   = 0x2500,</div><div class='ctx'> 	RTASE_RFIFONFULL  = 0x4406,</div><div class='ctx'> 	RTASE_INT_MITI_TX = 0x0A00,</div><div class='ctx'> 	RTASE_INT_MITI_RX = 0x0A80,</div><div class='ctx'> </div><div class='del'>-	RTASE_VLAN_ENTRY_0     = 0xAC80,</div><div class='add'>+	RTASE_VLAN_ENTRY_0 = 0xAC80,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum rtase_desc_status_bit {</div><div class='hunk'>@@ -236,7 +241,7 @@ union rtase_rx_desc {</div><div class='ctx'> #define RTASE_RX_RES        BIT(20)</div><div class='ctx'> #define RTASE_RX_RUNT       BIT(19)</div><div class='ctx'> #define RTASE_RX_RWT        BIT(18)</div><div class='del'>-#define RTASE_RX_CRC        BIT(16)</div><div class='add'>+#define RTASE_RX_CRC        BIT(17)</div><div class='ctx'> #define RTASE_RX_V6F        BIT(31)</div><div class='ctx'> #define RTASE_RX_V4F        BIT(30)</div><div class='ctx'> #define RTASE_RX_UDPT       BIT(29)</div><div class='hunk'>@@ -255,6 +260,12 @@ union rtase_rx_desc {</div><div class='ctx'> #define RTASE_VLAN_TAG_MASK     GENMASK(15, 0)</div><div class='ctx'> #define RTASE_RX_PKT_SIZE_MASK  GENMASK(13, 0)</div><div class='ctx'> </div><div class='add'>+/* txqos hardware definitions */</div><div class='add'>+#define RTASE_1T_CLOCK            64</div><div class='add'>+#define RTASE_1T_POWER            10000000</div><div class='add'>+#define RTASE_IDLESLOPE_INT_SHIFT 25</div><div class='add'>+#define RTASE_IDLESLOPE_INT_MASK  GENMASK(31, 25)</div><div class='add'>+</div><div class='ctx'> #define RTASE_IVEC_NAME_SIZE (IFNAMSIZ + 10)</div><div class='ctx'> </div><div class='ctx'> struct rtase_int_vector {</div><div class='hunk'>@@ -277,6 +288,7 @@ struct rtase_ring {</div><div class='ctx'> 	u32 cur_idx;</div><div class='ctx'> 	u32 dirty_idx;</div><div class='ctx'> 	u16 index;</div><div class='add'>+	u8 type;</div><div class='ctx'> </div><div class='ctx'> 	struct sk_buff *skbuff[RTASE_NUM_DESC];</div><div class='ctx'> 	void *data_buf[RTASE_NUM_DESC];</div><div class='hunk'>@@ -290,6 +302,13 @@ struct rtase_ring {</div><div class='ctx'> 	u64 alloc_fail;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct rtase_txqos {</div><div class='add'>+	int hicredit;</div><div class='add'>+	int locredit;</div><div class='add'>+	int idleslope;</div><div class='add'>+	int sendslope;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct rtase_stats {</div><div class='ctx'> 	u64 tx_dropped;</div><div class='ctx'> 	u64 rx_dropped;</div><div class='hunk'>@@ -309,6 +328,7 @@ struct rtase_private {</div><div class='ctx'> </div><div class='ctx'> 	struct page_pool *page_pool;</div><div class='ctx'> 	struct rtase_ring tx_ring[RTASE_NUM_TX_QUEUE];</div><div class='add'>+	struct rtase_txqos tx_qos[RTASE_NUM_TX_QUEUE];</div><div class='ctx'> 	struct rtase_ring rx_ring[RTASE_NUM_RX_QUEUE];</div><div class='ctx'> 	struct rtase_counters *tally_vaddr;</div><div class='ctx'> 	dma_addr_t tally_paddr;</div><div class='hunk'>@@ -327,6 +347,8 @@ struct rtase_private {</div><div class='ctx'> 	u16 int_nums;</div><div class='ctx'> 	u16 tx_int_mit;</div><div class='ctx'> 	u16 rx_int_mit;</div><div class='add'>+</div><div class='add'>+	u32 hw_ver;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RTASE_LSO_64K 64000</div><div class='head'>diff --git a/drivers/net/ethernet/realtek/rtase/rtase_main.c b/drivers/net/ethernet/realtek/rtase/rtase_main.c<br/>index f8777b7663d3..ef13109c49cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/rtase/rtase_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/realtek/rtase/rtase_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/realtek/rtase/rtase_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/realtek/rtase/rtase_main.c</a></div><div class='hunk'>@@ -326,6 +326,7 @@ static void rtase_tx_desc_init(struct rtase_private *tp, u16 idx)</div><div class='ctx'> 	ring-&gt;cur_idx = 0;</div><div class='ctx'> 	ring-&gt;dirty_idx = 0;</div><div class='ctx'> 	ring-&gt;index = idx;</div><div class='add'>+	ring-&gt;type = NETDEV_QUEUE_TYPE_TX;</div><div class='ctx'> 	ring-&gt;alloc_fail = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; RTASE_NUM_DESC; i++) {</div><div class='hunk'>@@ -345,6 +346,9 @@ static void rtase_tx_desc_init(struct rtase_private *tp, u16 idx)</div><div class='ctx'> 		ring-&gt;ivec = &amp;tp-&gt;int_vector[0];</div><div class='ctx'> 		list_add_tail(&amp;ring-&gt;ring_entry, &amp;tp-&gt;int_vector[0].ring_list);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	netif_queue_set_napi(tp-&gt;dev, ring-&gt;index,</div><div class='add'>+			     ring-&gt;type, &amp;ring-&gt;ivec-&gt;napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rtase_map_to_asic(union rtase_rx_desc *desc, dma_addr_t mapping,</div><div class='hunk'>@@ -590,6 +594,7 @@ static void rtase_rx_desc_init(struct rtase_private *tp, u16 idx)</div><div class='ctx'> 	ring-&gt;cur_idx = 0;</div><div class='ctx'> 	ring-&gt;dirty_idx = 0;</div><div class='ctx'> 	ring-&gt;index = idx;</div><div class='add'>+	ring-&gt;type = NETDEV_QUEUE_TYPE_RX;</div><div class='ctx'> 	ring-&gt;alloc_fail = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; RTASE_NUM_DESC; i++)</div><div class='hunk'>@@ -597,6 +602,8 @@ static void rtase_rx_desc_init(struct rtase_private *tp, u16 idx)</div><div class='ctx'> </div><div class='ctx'> 	ring-&gt;ring_handler = rx_handler;</div><div class='ctx'> 	ring-&gt;ivec = &amp;tp-&gt;int_vector[idx];</div><div class='add'>+	netif_queue_set_napi(tp-&gt;dev, ring-&gt;index,</div><div class='add'>+			     ring-&gt;type, &amp;ring-&gt;ivec-&gt;napi);</div><div class='ctx'> 	list_add_tail(&amp;ring-&gt;ring_entry, &amp;tp-&gt;int_vector[idx].ring_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1114,7 +1121,7 @@ static int rtase_open(struct net_device *dev)</div><div class='ctx'> 		/* request other interrupts to handle multiqueue */</div><div class='ctx'> 		for (i = 1; i &lt; tp-&gt;int_nums; i++) {</div><div class='ctx'> 			ivec = &amp;tp-&gt;int_vector[i];</div><div class='del'>-			snprintf(ivec-&gt;name, sizeof(ivec-&gt;name), "%s_int%i",</div><div class='add'>+			snprintf(ivec-&gt;name, sizeof(ivec-&gt;name), "%s_int%u",</div><div class='ctx'> 				 tp-&gt;dev-&gt;name, i);</div><div class='ctx'> 			ret = request_irq(ivec-&gt;irq, rtase_q_interrupt, 0,</div><div class='ctx'> 					  ivec-&gt;name, ivec);</div><div class='hunk'>@@ -1161,8 +1168,12 @@ static void rtase_down(struct net_device *dev)</div><div class='ctx'> 		ivec = &amp;tp-&gt;int_vector[i];</div><div class='ctx'> 		napi_disable(&amp;ivec-&gt;napi);</div><div class='ctx'> 		list_for_each_entry_safe(ring, tmp, &amp;ivec-&gt;ring_list,</div><div class='del'>-					 ring_entry)</div><div class='add'>+					 ring_entry) {</div><div class='add'>+			netif_queue_set_napi(tp-&gt;dev, ring-&gt;index,</div><div class='add'>+					     ring-&gt;type, NULL);</div><div class='add'>+</div><div class='ctx'> 			list_del(&amp;ring-&gt;ring_entry);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	netif_tx_disable(dev);</div><div class='hunk'>@@ -1501,7 +1512,10 @@ static void rtase_wait_for_quiescence(const struct net_device *dev)</div><div class='ctx'> static void rtase_sw_reset(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtase_private *tp = netdev_priv(dev);</div><div class='add'>+	struct rtase_ring *ring, *tmp;</div><div class='add'>+	struct rtase_int_vector *ivec;</div><div class='ctx'> 	int ret;</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='hunk'>@@ -1512,6 +1526,17 @@ static void rtase_sw_reset(struct net_device *dev)</div><div class='ctx'> 	rtase_tx_clear(tp);</div><div class='ctx'> 	rtase_rx_clear(tp);</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; tp-&gt;int_nums; i++) {</div><div class='add'>+		ivec = &amp;tp-&gt;int_vector[i];</div><div class='add'>+		list_for_each_entry_safe(ring, tmp, &amp;ivec-&gt;ring_list,</div><div class='add'>+					 ring_entry) {</div><div class='add'>+			netif_queue_set_napi(tp-&gt;dev, ring-&gt;index,</div><div class='add'>+					     ring-&gt;type, NULL);</div><div class='add'>+</div><div class='add'>+			list_del(&amp;ring-&gt;ring_entry);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = rtase_init_ring(dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_err(dev, "unable to init ring\n");</div><div class='hunk'>@@ -1651,6 +1676,65 @@ static void rtase_get_stats64(struct net_device *dev,</div><div class='ctx'> 	stats-&gt;rx_length_errors = tp-&gt;stats.rx_length_errors;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtase_set_hw_cbs(const struct rtase_private *tp, u32 queue)</div><div class='add'>+{</div><div class='add'>+	u32 idle = tp-&gt;tx_qos[queue].idleslope * RTASE_1T_CLOCK;</div><div class='add'>+	u32 val, i;</div><div class='add'>+</div><div class='add'>+	val = u32_encode_bits(idle / RTASE_1T_POWER, RTASE_IDLESLOPE_INT_MASK);</div><div class='add'>+	idle %= RTASE_1T_POWER;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt;= RTASE_IDLESLOPE_INT_SHIFT; i++) {</div><div class='add'>+		idle *= 2;</div><div class='add'>+		if ((idle / RTASE_1T_POWER) == 1)</div><div class='add'>+			val |= BIT(RTASE_IDLESLOPE_INT_SHIFT - i);</div><div class='add'>+</div><div class='add'>+		idle %= RTASE_1T_POWER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rtase_w32(tp, RTASE_TXQCRDT_0 + queue * 4, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtase_setup_tc_cbs(struct rtase_private *tp,</div><div class='add'>+			      const struct tc_cbs_qopt_offload *qopt)</div><div class='add'>+{</div><div class='add'>+	int queue = qopt-&gt;queue;</div><div class='add'>+</div><div class='add'>+	if (queue &lt; 0 || queue &gt;= tp-&gt;func_tx_queue_num)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!qopt-&gt;enable) {</div><div class='add'>+		tp-&gt;tx_qos[queue].hicredit = 0;</div><div class='add'>+		tp-&gt;tx_qos[queue].locredit = 0;</div><div class='add'>+		tp-&gt;tx_qos[queue].idleslope = 0;</div><div class='add'>+		tp-&gt;tx_qos[queue].sendslope = 0;</div><div class='add'>+</div><div class='add'>+		rtase_w32(tp, RTASE_TXQCRDT_0 + queue * 4, 0);</div><div class='add'>+	} else {</div><div class='add'>+		tp-&gt;tx_qos[queue].hicredit = qopt-&gt;hicredit;</div><div class='add'>+		tp-&gt;tx_qos[queue].locredit = qopt-&gt;locredit;</div><div class='add'>+		tp-&gt;tx_qos[queue].idleslope = qopt-&gt;idleslope;</div><div class='add'>+		tp-&gt;tx_qos[queue].sendslope = qopt-&gt;sendslope;</div><div class='add'>+</div><div class='add'>+		rtase_set_hw_cbs(tp, queue);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtase_setup_tc(struct net_device *dev, enum tc_setup_type type,</div><div class='add'>+			  void *type_data)</div><div class='add'>+{</div><div class='add'>+	struct rtase_private *tp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_QDISC_CBS:</div><div class='add'>+		return rtase_setup_tc_cbs(tp, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static netdev_features_t rtase_fix_features(struct net_device *dev,</div><div class='ctx'> 					    netdev_features_t features)</div><div class='ctx'> {</div><div class='hunk'>@@ -1686,6 +1770,7 @@ static const struct net_device_ops rtase_netdev_ops = {</div><div class='ctx'> 	.ndo_change_mtu = rtase_change_mtu,</div><div class='ctx'> 	.ndo_tx_timeout = rtase_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats64 = rtase_get_stats64,</div><div class='add'>+	.ndo_setup_tc = rtase_setup_tc,</div><div class='ctx'> 	.ndo_fix_features = rtase_fix_features,</div><div class='ctx'> 	.ndo_set_features = rtase_set_features,</div><div class='ctx'> };</div><div class='hunk'>@@ -1714,10 +1799,22 @@ static int rtase_get_settings(struct net_device *dev,</div><div class='ctx'> 			      struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	u32 supported = SUPPORTED_MII | SUPPORTED_Pause | SUPPORTED_Asym_Pause;</div><div class='add'>+	const struct rtase_private *tp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	ethtool_convert_legacy_u32_to_link_mode(cmd-&gt;link_modes.supported,</div><div class='ctx'> 						supported);</div><div class='del'>-	cmd-&gt;base.speed = SPEED_5000;</div><div class='add'>+</div><div class='add'>+	switch (tp-&gt;hw_ver) {</div><div class='add'>+	case RTASE_HW_VER_906X_7XA:</div><div class='add'>+	case RTASE_HW_VER_906X_7XC:</div><div class='add'>+		cmd-&gt;base.speed = SPEED_5000;</div><div class='add'>+		break;</div><div class='add'>+	case RTASE_HW_VER_907XD_V1:</div><div class='add'>+	case RTASE_HW_VER_907XD_VA:</div><div class='add'>+		cmd-&gt;base.speed = SPEED_10000;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	cmd-&gt;base.duplex = DUPLEX_FULL;</div><div class='ctx'> 	cmd-&gt;base.port = PORT_MII;</div><div class='ctx'> 	cmd-&gt;base.autoneg = AUTONEG_DISABLE;</div><div class='hunk'>@@ -1789,6 +1886,18 @@ static void rtase_init_netdev_ops(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;rtase_ethtool_ops;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rtase_init_napi(struct rtase_private *tp)</div><div class='add'>+{</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; tp-&gt;int_nums; i++) {</div><div class='add'>+		netif_napi_add_config(tp-&gt;dev, &amp;tp-&gt;int_vector[i].napi,</div><div class='add'>+				      tp-&gt;int_vector[i].poll, i);</div><div class='add'>+		netif_napi_set_irq(&amp;tp-&gt;int_vector[i].napi,</div><div class='add'>+				   tp-&gt;int_vector[i].irq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void rtase_reset_interrupt(struct pci_dev *pdev,</div><div class='ctx'> 				  const struct rtase_private *tp)</div><div class='ctx'> {</div><div class='hunk'>@@ -1816,7 +1925,7 @@ static int rtase_alloc_msix(struct pci_dev *pdev, struct rtase_private *tp)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; tp-&gt;int_nums; i++) {</div><div class='ctx'> 		irq = pci_irq_vector(pdev, i);</div><div class='del'>-		if (!irq) {</div><div class='add'>+		if (irq &lt; 0) {</div><div class='ctx'> 			pci_disable_msix(pdev);</div><div class='ctx'> 			return irq;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1874,9 +1983,6 @@ static void rtase_init_int_vector(struct rtase_private *tp)</div><div class='ctx'> 	memset(tp-&gt;int_vector[0].name, 0x0, sizeof(tp-&gt;int_vector[0].name));</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;tp-&gt;int_vector[0].ring_list);</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(tp-&gt;dev, &amp;tp-&gt;int_vector[0].napi,</div><div class='del'>-		       tp-&gt;int_vector[0].poll);</div><div class='del'>-</div><div class='ctx'> 	/* interrupt vector 1 ~ 3 */</div><div class='ctx'> 	for (i = 1; i &lt; tp-&gt;int_nums; i++) {</div><div class='ctx'> 		tp-&gt;int_vector[i].tp = tp;</div><div class='hunk'>@@ -1890,9 +1996,6 @@ static void rtase_init_int_vector(struct rtase_private *tp)</div><div class='ctx'> 		memset(tp-&gt;int_vector[i].name, 0x0,</div><div class='ctx'> 		       sizeof(tp-&gt;int_vector[0].name));</div><div class='ctx'> 		INIT_LIST_HEAD(&amp;tp-&gt;int_vector[i].ring_list);</div><div class='del'>-</div><div class='del'>-		netif_napi_add(tp-&gt;dev, &amp;tp-&gt;int_vector[i].napi,</div><div class='del'>-			       tp-&gt;int_vector[i].poll);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1901,10 +2004,10 @@ static u16 rtase_calc_time_mitigation(u32 time_us)</div><div class='ctx'> 	u8 msb, time_count, time_unit;</div><div class='ctx'> 	u16 int_miti;</div><div class='ctx'> </div><div class='del'>-	time_us = min_t(int, time_us, RTASE_MITI_MAX_TIME);</div><div class='add'>+	time_us = min(time_us, RTASE_MITI_MAX_TIME);</div><div class='ctx'> </div><div class='del'>-	msb = fls(time_us);</div><div class='del'>-	if (msb &gt;= RTASE_MITI_COUNT_BIT_NUM) {</div><div class='add'>+	if (time_us &gt; RTASE_MITI_TIME_COUNT_MASK) {</div><div class='add'>+		msb = fls(time_us);</div><div class='ctx'> 		time_unit = msb - RTASE_MITI_COUNT_BIT_NUM;</div><div class='ctx'> 		time_count = time_us &gt;&gt; (msb - RTASE_MITI_COUNT_BIT_NUM);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1923,7 +2026,7 @@ static u16 rtase_calc_packet_num_mitigation(u16 pkt_num)</div><div class='ctx'> 	u8 msb, pkt_num_count, pkt_num_unit;</div><div class='ctx'> 	u16 int_miti;</div><div class='ctx'> </div><div class='del'>-	pkt_num = min_t(int, pkt_num, RTASE_MITI_MAX_PKT_NUM);</div><div class='add'>+	pkt_num = min(pkt_num, RTASE_MITI_MAX_PKT_NUM);</div><div class='ctx'> </div><div class='ctx'> 	if (pkt_num &gt; 60) {</div><div class='ctx'> 		pkt_num_unit = RTASE_MITI_MAX_PKT_NUM_IDX;</div><div class='hunk'>@@ -1972,20 +2075,22 @@ static void rtase_init_software_variable(struct pci_dev *pdev,</div><div class='ctx'> 	tp-&gt;dev-&gt;max_mtu = RTASE_MAX_JUMBO_SIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool rtase_check_mac_version_valid(struct rtase_private *tp)</div><div class='add'>+static int rtase_check_mac_version_valid(struct rtase_private *tp)</div><div class='ctx'> {</div><div class='del'>-	u32 hw_ver = rtase_r32(tp, RTASE_TX_CONFIG_0) &amp; RTASE_HW_VER_MASK;</div><div class='del'>-	bool known_ver = false;</div><div class='add'>+	int ret = -ENODEV;</div><div class='ctx'> </div><div class='del'>-	switch (hw_ver) {</div><div class='del'>-	case 0x00800000:</div><div class='del'>-	case 0x04000000:</div><div class='del'>-	case 0x04800000:</div><div class='del'>-		known_ver = true;</div><div class='add'>+	tp-&gt;hw_ver = rtase_r32(tp, RTASE_TX_CONFIG_0) &amp; RTASE_HW_VER_MASK;</div><div class='add'>+</div><div class='add'>+	switch (tp-&gt;hw_ver) {</div><div class='add'>+	case RTASE_HW_VER_906X_7XA:</div><div class='add'>+	case RTASE_HW_VER_906X_7XC:</div><div class='add'>+	case RTASE_HW_VER_907XD_V1:</div><div class='add'>+	case RTASE_HW_VER_907XD_VA:</div><div class='add'>+		ret = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return known_ver;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rtase_init_board(struct pci_dev *pdev, struct net_device **dev_out,</div><div class='hunk'>@@ -2004,7 +2109,7 @@ static int rtase_init_board(struct pci_dev *pdev, struct net_device **dev_out,</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	ret = pci_enable_device(pdev);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto err_out_free_dev;</div><div class='ctx'> </div><div class='ctx'> 	/* make sure PCI base addr 1 is MMIO */</div><div class='hunk'>@@ -2020,7 +2125,7 @@ static int rtase_init_board(struct pci_dev *pdev, struct net_device **dev_out,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = pci_request_regions(pdev, KBUILD_MODNAME);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto err_out_disable;</div><div class='ctx'> </div><div class='ctx'> 	ret = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='hunk'>@@ -2096,7 +2201,7 @@ static int rtase_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "Automotive Switch Ethernet driver loaded\n");</div><div class='ctx'> </div><div class='ctx'> 	ret = rtase_init_board(pdev, &amp;dev, &amp;ioaddr);</div><div class='del'>-	if (ret != 0)</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	tp = netdev_priv(dev);</div><div class='hunk'>@@ -2105,19 +2210,25 @@ static int rtase_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	tp-&gt;pdev = pdev;</div><div class='ctx'> </div><div class='ctx'> 	/* identify chip attached to board */</div><div class='del'>-	if (!rtase_check_mac_version_valid(tp))</div><div class='del'>-		return dev_err_probe(&amp;pdev-&gt;dev, -ENODEV,</div><div class='del'>-				     "unknown chip version, contact rtase maintainers (see MAINTAINERS file)\n");</div><div class='add'>+	ret = rtase_check_mac_version_valid(tp);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"unknown chip version: 0x%08x, contact rtase maintainers (see MAINTAINERS file)\n",</div><div class='add'>+			tp-&gt;hw_ver);</div><div class='add'>+		goto err_out_release_board;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	rtase_init_software_variable(pdev, tp);</div><div class='ctx'> 	rtase_init_hardware(tp);</div><div class='ctx'> </div><div class='ctx'> 	ret = rtase_alloc_interrupt(pdev, tp);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='add'>+	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "unable to alloc MSIX/MSI\n");</div><div class='del'>-		goto err_out_1;</div><div class='add'>+		goto err_out_del_napi;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	rtase_init_napi(tp);</div><div class='add'>+</div><div class='ctx'> 	rtase_init_netdev_ops(dev);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;</div><div class='hunk'>@@ -2148,7 +2259,7 @@ static int rtase_init_one(struct pci_dev *pdev,</div><div class='ctx'> 					     GFP_KERNEL);</div><div class='ctx'> 	if (!tp-&gt;tally_vaddr) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='del'>-		goto err_out;</div><div class='add'>+		goto err_out_free_dma;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rtase_tally_counter_clear(tp);</div><div class='hunk'>@@ -2158,14 +2269,14 @@ static int rtase_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> </div><div class='ctx'> 	ret = register_netdev(dev);</div><div class='del'>-	if (ret != 0)</div><div class='del'>-		goto err_out;</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_out_free_dma;</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(dev, "%pM, IRQ %d\n", dev-&gt;dev_addr, dev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_out:</div><div class='add'>+err_out_free_dma:</div><div class='ctx'> 	if (tp-&gt;tally_vaddr) {</div><div class='ctx'> 		dma_free_coherent(&amp;pdev-&gt;dev,</div><div class='ctx'> 				  sizeof(*tp-&gt;tally_vaddr),</div><div class='hunk'>@@ -2175,12 +2286,13 @@ err_out:</div><div class='ctx'> 		tp-&gt;tally_vaddr = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-err_out_1:</div><div class='add'>+err_out_del_napi:</div><div class='ctx'> 	for (i = 0; i &lt; tp-&gt;int_nums; i++) {</div><div class='ctx'> 		ivec = &amp;tp-&gt;int_vector[i];</div><div class='ctx'> 		netif_napi_del(&amp;ivec-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+err_out_release_board:</div><div class='ctx'> 	rtase_release_board(pdev, dev, ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/Makefile b/drivers/net/ethernet/renesas/Makefile<br/>index f65fc76f8b4d..d63e0c61bb68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/Makefile</a></div><div class='hunk'>@@ -8,6 +8,7 @@ obj-$(CONFIG_SH_ETH) += sh_eth.o</div><div class='ctx'> ravb-objs := ravb_main.o ravb_ptp.o</div><div class='ctx'> obj-$(CONFIG_RAVB) += ravb.o</div><div class='ctx'> </div><div class='add'>+rswitch-objs := rswitch_main.o rswitch_l2.o</div><div class='ctx'> obj-$(CONFIG_RENESAS_ETHER_SWITCH) += rswitch.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_RENESAS_GEN4_PTP) += rcar_gen4_ptp.o</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h<br/>index 7b48060c250b..5e56ec9b1013 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/ravb.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/ravb.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/ravb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/ravb.h</a></div><div class='hunk'>@@ -35,16 +35,6 @@</div><div class='ctx'> /* Driver's parameters */</div><div class='ctx'> #define RAVB_ALIGN	128</div><div class='ctx'> </div><div class='del'>-/* Hardware time stamp */</div><div class='del'>-#define RAVB_TXTSTAMP_VALID	0x00000001	/* TX timestamp valid */</div><div class='del'>-#define RAVB_TXTSTAMP_ENABLED	0x00000010	/* Enable TX timestamping */</div><div class='del'>-</div><div class='del'>-#define RAVB_RXTSTAMP_VALID	0x00000001	/* RX timestamp valid */</div><div class='del'>-#define RAVB_RXTSTAMP_TYPE	0x00000006	/* RX type mask */</div><div class='del'>-#define RAVB_RXTSTAMP_TYPE_V2_L2_EVENT 0x00000002</div><div class='del'>-#define RAVB_RXTSTAMP_TYPE_ALL	0x00000006</div><div class='del'>-#define RAVB_RXTSTAMP_ENABLED	0x00000010	/* Enable RX timestamping */</div><div class='del'>-</div><div class='ctx'> enum ravb_reg {</div><div class='ctx'> 	/* AVB-DMAC registers */</div><div class='ctx'> 	CCC	= 0x0000,</div><div class='hunk'>@@ -1017,7 +1007,6 @@ enum CSR2_BIT {</div><div class='ctx'> #define CSR2_CSUM_ENABLE (CSR2_RTCP4 | CSR2_RUDP4 | CSR2_RICMP4 | \</div><div class='ctx'> 			  CSR2_RTCP6 | CSR2_RUDP6 | CSR2_RICMP6)</div><div class='ctx'> </div><div class='del'>-#define DBAT_ENTRY_NUM	22</div><div class='ctx'> #define RX_QUEUE_OFFSET	4</div><div class='ctx'> #define NUM_RX_QUEUE	2</div><div class='ctx'> #define NUM_TX_QUEUE	2</div><div class='hunk'>@@ -1062,6 +1051,7 @@ struct ravb_hw_info {</div><div class='ctx'> 	u32 rx_max_frame_size;</div><div class='ctx'> 	u32 rx_buffer_size;</div><div class='ctx'> 	u32 rx_desc_size;</div><div class='add'>+	u32 dbat_entry_num;</div><div class='ctx'> 	unsigned aligned_tx: 1;</div><div class='ctx'> 	unsigned coalesce_irqs:1;	/* Needs software IRQ coalescing */</div><div class='ctx'> </div><div class='hunk'>@@ -1114,8 +1104,8 @@ struct ravb_private {</div><div class='ctx'> 	u32 rx_over_errors;</div><div class='ctx'> 	u32 rx_fifo_errors;</div><div class='ctx'> 	struct net_device_stats stats[NUM_RX_QUEUE];</div><div class='del'>-	u32 tstamp_tx_ctrl;</div><div class='del'>-	u32 tstamp_rx_ctrl;</div><div class='add'>+	enum hwtstamp_tx_types tstamp_tx_ctrl;</div><div class='add'>+	enum hwtstamp_rx_filters tstamp_rx_ctrl;</div><div class='ctx'> 	struct list_head ts_skb_list;</div><div class='ctx'> 	u32 ts_skb_tag;</div><div class='ctx'> 	struct ravb_ptp ptp;</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c<br/>index ac0f093f647a..57b0db314fb5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/ravb_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/ravb_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/ravb_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/ravb_main.c</a></div><div class='hunk'>@@ -802,7 +802,6 @@ static int ravb_rx_gbeth(struct net_device *ndev, int budget, int q)</div><div class='ctx'> 	const struct ravb_hw_info *info = priv-&gt;info;</div><div class='ctx'> 	struct net_device_stats *stats;</div><div class='ctx'> 	struct ravb_rx_desc *desc;</div><div class='del'>-	struct sk_buff *skb;</div><div class='ctx'> 	int rx_packets = 0;</div><div class='ctx'> 	u8  desc_status;</div><div class='ctx'> 	u16 desc_len;</div><div class='hunk'>@@ -815,6 +814,8 @@ static int ravb_rx_gbeth(struct net_device *ndev, int budget, int q)</div><div class='ctx'> 	stats = &amp;priv-&gt;stats[q];</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; limit; i++, priv-&gt;cur_rx[q]++) {</div><div class='add'>+		struct sk_buff *skb = NULL;</div><div class='add'>+</div><div class='ctx'> 		entry = priv-&gt;cur_rx[q] % priv-&gt;num_rx_ring[q];</div><div class='ctx'> 		desc = &amp;priv-&gt;rx_ring[q].desc[entry];</div><div class='ctx'> 		if (rx_packets == budget || desc-&gt;die_dt == DT_FEMPTY)</div><div class='hunk'>@@ -945,6 +946,30 @@ refill:</div><div class='ctx'> 	return rx_packets;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ravb_rx_rcar_hwstamp(struct ravb_private *priv, int q,</div><div class='add'>+				 struct ravb_ex_rx_desc *desc,</div><div class='add'>+				 struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps *shhwtstamps;</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+	bool get_ts;</div><div class='add'>+</div><div class='add'>+	if (q == RAVB_NC)</div><div class='add'>+		get_ts = priv-&gt;tstamp_rx_ctrl != HWTSTAMP_FILTER_NONE;</div><div class='add'>+	else</div><div class='add'>+		get_ts = priv-&gt;tstamp_rx_ctrl == HWTSTAMP_FILTER_ALL;</div><div class='add'>+</div><div class='add'>+	if (!get_ts)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	shhwtstamps = skb_hwtstamps(skb);</div><div class='add'>+	memset(shhwtstamps, 0, sizeof(*shhwtstamps));</div><div class='add'>+	ts.tv_sec = ((u64)le16_to_cpu(desc-&gt;ts_sh) &lt;&lt; 32)</div><div class='add'>+		| le32_to_cpu(desc-&gt;ts_sl);</div><div class='add'>+	ts.tv_nsec = le32_to_cpu(desc-&gt;ts_n);</div><div class='add'>+	shhwtstamps-&gt;hwtstamp = timespec64_to_ktime(ts);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Packet receive function for Ethernet AVB */</div><div class='ctx'> static int ravb_rx_rcar(struct net_device *ndev, int budget, int q)</div><div class='ctx'> {</div><div class='hunk'>@@ -954,7 +979,6 @@ static int ravb_rx_rcar(struct net_device *ndev, int budget, int q)</div><div class='ctx'> 	struct ravb_ex_rx_desc *desc;</div><div class='ctx'> 	unsigned int limit, i;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	struct timespec64 ts;</div><div class='ctx'> 	int rx_packets = 0;</div><div class='ctx'> 	u8  desc_status;</div><div class='ctx'> 	u16 pkt_len;</div><div class='hunk'>@@ -991,7 +1015,6 @@ static int ravb_rx_rcar(struct net_device *ndev, int budget, int q)</div><div class='ctx'> 			if (desc_status &amp; MSC_CEEF)</div><div class='ctx'> 				stats-&gt;rx_missed_errors++;</div><div class='ctx'> 		} else {</div><div class='del'>-			u32 get_ts = priv-&gt;tstamp_rx_ctrl &amp; RAVB_RXTSTAMP_TYPE;</div><div class='ctx'> 			struct ravb_rx_buffer *rx_buff;</div><div class='ctx'> 			void *rx_addr;</div><div class='ctx'> </div><div class='hunk'>@@ -1009,19 +1032,8 @@ static int ravb_rx_rcar(struct net_device *ndev, int budget, int q)</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 			skb_mark_for_recycle(skb);</div><div class='del'>-			get_ts &amp;= (q == RAVB_NC) ?</div><div class='del'>-					RAVB_RXTSTAMP_TYPE_V2_L2_EVENT :</div><div class='del'>-					~RAVB_RXTSTAMP_TYPE_V2_L2_EVENT;</div><div class='del'>-			if (get_ts) {</div><div class='del'>-				struct skb_shared_hwtstamps *shhwtstamps;</div><div class='del'>-</div><div class='del'>-				shhwtstamps = skb_hwtstamps(skb);</div><div class='del'>-				memset(shhwtstamps, 0, sizeof(*shhwtstamps));</div><div class='del'>-				ts.tv_sec = ((u64) le16_to_cpu(desc-&gt;ts_sh) &lt;&lt;</div><div class='del'>-					     32) | le32_to_cpu(desc-&gt;ts_sl);</div><div class='del'>-				ts.tv_nsec = le32_to_cpu(desc-&gt;ts_n);</div><div class='del'>-				shhwtstamps-&gt;hwtstamp = timespec64_to_ktime(ts);</div><div class='del'>-			}</div><div class='add'>+</div><div class='add'>+			ravb_rx_rcar_hwstamp(priv, q, desc, skb);</div><div class='ctx'> </div><div class='ctx'> 			skb_put(skb, pkt_len);</div><div class='ctx'> 			skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='hunk'>@@ -1974,7 +1986,6 @@ out_ptp_stop:</div><div class='ctx'> out_set_reset:</div><div class='ctx'> 	ravb_set_opmode(ndev, CCC_OPC_RESET);</div><div class='ctx'> out_rpm_put:</div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(dev);</div><div class='ctx'> out_napi_off:</div><div class='ctx'> 	if (info-&gt;nc_queues)</div><div class='hunk'>@@ -2210,15 +2221,35 @@ static netdev_tx_t ravb_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 		skb_tx_timestamp(skb);</div><div class='ctx'> 	}</div><div class='del'>-	/* Descriptor type must be set after all the above writes */</div><div class='del'>-	dma_wmb();</div><div class='add'>+</div><div class='ctx'> 	if (num_tx_desc &gt; 1) {</div><div class='ctx'> 		desc-&gt;die_dt = DT_FEND;</div><div class='ctx'> 		desc--;</div><div class='add'>+		/* When using multi-descriptors, DT_FEND needs to get written</div><div class='add'>+		 * before DT_FSTART, but the compiler may reorder the memory</div><div class='add'>+		 * writes in an attempt to optimize the code.</div><div class='add'>+		 * Use a dma_wmb() barrier to make sure DT_FEND and DT_FSTART</div><div class='add'>+		 * are written exactly in the order shown in the code.</div><div class='add'>+		 * This is particularly important for cases where the DMA engine</div><div class='add'>+		 * is already running when we are running this code. If the DMA</div><div class='add'>+		 * sees DT_FSTART without the corresponding DT_FEND it will enter</div><div class='add'>+		 * an error condition.</div><div class='add'>+		 */</div><div class='add'>+		dma_wmb();</div><div class='ctx'> 		desc-&gt;die_dt = DT_FSTART;</div><div class='ctx'> 	} else {</div><div class='add'>+		/* Descriptor type must be set after all the above writes */</div><div class='add'>+		dma_wmb();</div><div class='ctx'> 		desc-&gt;die_dt = DT_FSINGLE;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* Before ringing the doorbell we need to make sure that the latest</div><div class='add'>+	 * writes have been committed to memory, otherwise it could delay</div><div class='add'>+	 * things until the doorbell is rang again.</div><div class='add'>+	 * This is in replacement of the read operation mentioned in the HW</div><div class='add'>+	 * manuals.</div><div class='add'>+	 */</div><div class='add'>+	dma_wmb();</div><div class='ctx'> 	ravb_modify(ndev, TCCR, TCCR_TSRQ0 &lt;&lt; q, TCCR_TSRQ0 &lt;&lt; q);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;cur_tx[q] += num_tx_desc;</div><div class='hunk'>@@ -2383,95 +2414,55 @@ static int ravb_close(struct net_device *ndev)</div><div class='ctx'> 	if (error)</div><div class='ctx'> 		return error;</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ravb_hwtstamp_get(struct net_device *ndev, struct ifreq *req)</div><div class='add'>+static int ravb_hwtstamp_get(struct net_device *ndev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct ravb_private *priv = netdev_priv(ndev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> </div><div class='del'>-	config.flags = 0;</div><div class='del'>-	config.tx_type = priv-&gt;tstamp_tx_ctrl ? HWTSTAMP_TX_ON :</div><div class='del'>-						HWTSTAMP_TX_OFF;</div><div class='del'>-	switch (priv-&gt;tstamp_rx_ctrl &amp; RAVB_RXTSTAMP_TYPE) {</div><div class='del'>-	case RAVB_RXTSTAMP_TYPE_V2_L2_EVENT:</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='del'>-		break;</div><div class='del'>-	case RAVB_RXTSTAMP_TYPE_ALL:</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='del'>-	}</div><div class='add'>+	config-&gt;flags = 0;</div><div class='add'>+	config-&gt;tx_type = priv-&gt;tstamp_tx_ctrl;</div><div class='add'>+	config-&gt;rx_filter = priv-&gt;tstamp_rx_ctrl;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(req-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Control hardware time stamping */</div><div class='del'>-static int ravb_hwtstamp_set(struct net_device *ndev, struct ifreq *req)</div><div class='add'>+static int ravb_hwtstamp_set(struct net_device *ndev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ravb_private *priv = netdev_priv(ndev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-	u32 tstamp_rx_ctrl = RAVB_RXTSTAMP_ENABLED;</div><div class='del'>-	u32 tstamp_tx_ctrl;</div><div class='add'>+	enum hwtstamp_rx_filters tstamp_rx_ctrl;</div><div class='add'>+	enum hwtstamp_tx_types tstamp_tx_ctrl;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, req-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='del'>-		tstamp_tx_ctrl = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='del'>-		tstamp_tx_ctrl = RAVB_TXTSTAMP_ENABLED;</div><div class='add'>+		tstamp_tx_ctrl = config-&gt;tx_type;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='del'>-		tstamp_rx_ctrl = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='del'>-		tstamp_rx_ctrl |= RAVB_RXTSTAMP_TYPE_V2_L2_EVENT;</div><div class='add'>+		tstamp_rx_ctrl = config-&gt;rx_filter;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-		tstamp_rx_ctrl |= RAVB_RXTSTAMP_TYPE_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		tstamp_rx_ctrl = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;tstamp_tx_ctrl = tstamp_tx_ctrl;</div><div class='ctx'> 	priv-&gt;tstamp_rx_ctrl = tstamp_rx_ctrl;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(req-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* ioctl to device function */</div><div class='del'>-static int ravb_do_ioctl(struct net_device *ndev, struct ifreq *req, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct phy_device *phydev = ndev-&gt;phydev;</div><div class='del'>-</div><div class='del'>-	if (!netif_running(ndev))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!phydev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return ravb_hwtstamp_get(ndev, req);</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return ravb_hwtstamp_set(ndev, req);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return phy_mii_ioctl(phydev, req, cmd);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ravb_change_mtu(struct net_device *ndev, int new_mtu)</div><div class='hunk'>@@ -2607,11 +2598,13 @@ static const struct net_device_ops ravb_netdev_ops = {</div><div class='ctx'> 	.ndo_get_stats		= ravb_get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= ravb_set_rx_mode,</div><div class='ctx'> 	.ndo_tx_timeout		= ravb_tx_timeout,</div><div class='del'>-	.ndo_eth_ioctl		= ravb_do_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= phy_do_ioctl_running,</div><div class='ctx'> 	.ndo_change_mtu		= ravb_change_mtu,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> 	.ndo_set_features	= ravb_set_features,</div><div class='add'>+	.ndo_hwtstamp_get	= ravb_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= ravb_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* MDIO bus init function */</div><div class='hunk'>@@ -2693,6 +2686,7 @@ static const struct ravb_hw_info ravb_gen2_hw_info = {</div><div class='ctx'> 	.rx_buffer_size = SZ_2K +</div><div class='ctx'> 			  SKB_DATA_ALIGN(sizeof(struct skb_shared_info)),</div><div class='ctx'> 	.rx_desc_size = sizeof(struct ravb_ex_rx_desc),</div><div class='add'>+	.dbat_entry_num = 22,</div><div class='ctx'> 	.aligned_tx = 1,</div><div class='ctx'> 	.gptp = 1,</div><div class='ctx'> 	.nc_queues = 1,</div><div class='hunk'>@@ -2716,6 +2710,7 @@ static const struct ravb_hw_info ravb_gen3_hw_info = {</div><div class='ctx'> 	.rx_buffer_size = SZ_2K +</div><div class='ctx'> 			  SKB_DATA_ALIGN(sizeof(struct skb_shared_info)),</div><div class='ctx'> 	.rx_desc_size = sizeof(struct ravb_ex_rx_desc),</div><div class='add'>+	.dbat_entry_num = 22,</div><div class='ctx'> 	.internal_delay = 1,</div><div class='ctx'> 	.tx_counters = 1,</div><div class='ctx'> 	.multi_irqs = 1,</div><div class='hunk'>@@ -2742,6 +2737,7 @@ static const struct ravb_hw_info ravb_gen4_hw_info = {</div><div class='ctx'> 	.rx_buffer_size = SZ_2K +</div><div class='ctx'> 			  SKB_DATA_ALIGN(sizeof(struct skb_shared_info)),</div><div class='ctx'> 	.rx_desc_size = sizeof(struct ravb_ex_rx_desc),</div><div class='add'>+	.dbat_entry_num = 22,</div><div class='ctx'> 	.internal_delay = 1,</div><div class='ctx'> 	.tx_counters = 1,</div><div class='ctx'> 	.multi_irqs = 1,</div><div class='hunk'>@@ -2763,10 +2759,12 @@ static const struct ravb_hw_info ravb_rzv2m_hw_info = {</div><div class='ctx'> 	.net_features = NETIF_F_RXCSUM,</div><div class='ctx'> 	.stats_len = ARRAY_SIZE(ravb_gstrings_stats),</div><div class='ctx'> 	.tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,</div><div class='add'>+	.tx_max_frame_size = SZ_2K,</div><div class='ctx'> 	.rx_max_frame_size = SZ_2K,</div><div class='ctx'> 	.rx_buffer_size = SZ_2K +</div><div class='ctx'> 			  SKB_DATA_ALIGN(sizeof(struct skb_shared_info)),</div><div class='ctx'> 	.rx_desc_size = sizeof(struct ravb_ex_rx_desc),</div><div class='add'>+	.dbat_entry_num = 22,</div><div class='ctx'> 	.multi_irqs = 1,</div><div class='ctx'> 	.err_mgmt_irqs = 1,</div><div class='ctx'> 	.gptp = 1,</div><div class='hunk'>@@ -2792,6 +2790,7 @@ static const struct ravb_hw_info gbeth_hw_info = {</div><div class='ctx'> 	.rx_max_frame_size = SZ_8K,</div><div class='ctx'> 	.rx_buffer_size = SZ_2K,</div><div class='ctx'> 	.rx_desc_size = sizeof(struct ravb_rx_desc),</div><div class='add'>+	.dbat_entry_num = 2,</div><div class='ctx'> 	.aligned_tx = 1,</div><div class='ctx'> 	.coalesce_irqs = 1,</div><div class='ctx'> 	.tx_counters = 1,</div><div class='hunk'>@@ -2919,13 +2918,14 @@ static int ravb_probe(struct platform_device *pdev)</div><div class='ctx'> 		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(rstc),</div><div class='ctx'> 				     "failed to get cpg reset\n");</div><div class='ctx'> </div><div class='add'>+	info = of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='ctx'> 	ndev = alloc_etherdev_mqs(sizeof(struct ravb_private),</div><div class='del'>-				  NUM_TX_QUEUE, NUM_RX_QUEUE);</div><div class='add'>+				  info-&gt;nc_queues ? NUM_TX_QUEUE : 1,</div><div class='add'>+				  info-&gt;nc_queues ? NUM_RX_QUEUE : 1);</div><div class='ctx'> 	if (!ndev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	info = of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='ctx'> 	ndev-&gt;features = info-&gt;net_features;</div><div class='ctx'> 	ndev-&gt;hw_features = info-&gt;net_hw_features;</div><div class='ctx'> 	ndev-&gt;vlan_features = info-&gt;vlan_features;</div><div class='hunk'>@@ -3023,7 +3023,7 @@ static int ravb_probe(struct platform_device *pdev)</div><div class='ctx'> 	ravb_parse_delay_mode(np, ndev);</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate descriptor base address table */</div><div class='del'>-	priv-&gt;desc_bat_size = sizeof(struct ravb_desc) * DBAT_ENTRY_NUM;</div><div class='add'>+	priv-&gt;desc_bat_size = sizeof(struct ravb_desc) * info-&gt;dbat_entry_num;</div><div class='ctx'> 	priv-&gt;desc_bat = dma_alloc_coherent(ndev-&gt;dev.parent, priv-&gt;desc_bat_size,</div><div class='ctx'> 					    &amp;priv-&gt;desc_bat_dma, GFP_KERNEL);</div><div class='ctx'> 	if (!priv-&gt;desc_bat) {</div><div class='hunk'>@@ -3033,7 +3033,7 @@ static int ravb_probe(struct platform_device *pdev)</div><div class='ctx'> 		error = -ENOMEM;</div><div class='ctx'> 		goto out_rpm_put;</div><div class='ctx'> 	}</div><div class='del'>-	for (q = RAVB_BE; q &lt; DBAT_ENTRY_NUM; q++)</div><div class='add'>+	for (q = RAVB_BE; q &lt; info-&gt;dbat_entry_num; q++)</div><div class='ctx'> 		priv-&gt;desc_bat[q].die_dt = DT_EOS;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialise HW timestamp list */</div><div class='hunk'>@@ -3074,7 +3074,7 @@ static int ravb_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (info-&gt;coalesce_irqs) {</div><div class='ctx'> 		netdev_sw_irq_coalesce_default_on(ndev);</div><div class='ctx'> 		if (num_present_cpus() == 1)</div><div class='del'>-			dev_set_threaded(ndev, true);</div><div class='add'>+			netif_threaded_enable(ndev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Network device register */</div><div class='hunk'>@@ -3088,7 +3088,6 @@ static int ravb_probe(struct platform_device *pdev)</div><div class='ctx'> 	netdev_info(ndev, "Base address at %#x, %pM, IRQ %d.\n",</div><div class='ctx'> 		    (u32)ndev-&gt;base_addr, ndev-&gt;dev_addr, ndev-&gt;irq);</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(&amp;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3216,10 +3215,15 @@ static int ravb_suspend(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(ndev);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;wol_enabled)</div><div class='del'>-		return ravb_wol_setup(ndev);</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	if (priv-&gt;wol_enabled) {</div><div class='add'>+		ret = ravb_wol_setup(ndev);</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = ravb_close(ndev);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -3244,19 +3248,20 @@ static int ravb_resume(struct device *dev)</div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='ctx'> 	/* If WoL is enabled restore the interface. */</div><div class='del'>-	if (priv-&gt;wol_enabled) {</div><div class='add'>+	if (priv-&gt;wol_enabled)</div><div class='ctx'> 		ret = ravb_wol_restore(ndev);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		ret = pm_runtime_force_resume(dev);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	if (ret) {</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Reopening the interface will restore the device to the working state. */</div><div class='ctx'> 	ret = ravb_open(ndev);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto out_rpm_put;</div><div class='ctx'> </div><div class='hunk'>@@ -3266,10 +3271,8 @@ static int ravb_resume(struct device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_rpm_put:</div><div class='del'>-	if (!priv-&gt;wol_enabled) {</div><div class='del'>-		pm_runtime_mark_last_busy(dev);</div><div class='add'>+	if (!priv-&gt;wol_enabled)</div><div class='ctx'> 		pm_runtime_put_autosuspend(dev);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/ravb_ptp.c b/drivers/net/ethernet/renesas/ravb_ptp.c<br/>index 6e4ef7af27bf..226c6c0ab945 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/ravb_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/ravb_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/ravb_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/ravb_ptp.c</a></div><div class='hunk'>@@ -176,13 +176,6 @@ static int ravb_ptp_extts(struct ptp_clock_info *ptp,</div><div class='ctx'> 	struct net_device *ndev = priv-&gt;ndev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-	if (req-&gt;flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-			   PTP_RISING_EDGE |</div><div class='del'>-			   PTP_FALLING_EDGE |</div><div class='del'>-			   PTP_STRICT_FLAGS))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	if (req-&gt;index)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -213,10 +206,6 @@ static int ravb_ptp_perout(struct ptp_clock_info *ptp,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int error = 0;</div><div class='ctx'> </div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-	if (req-&gt;flags)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	if (req-&gt;index)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -288,6 +277,7 @@ static const struct ptp_clock_info ravb_ptp_info = {</div><div class='ctx'> 	.max_adj	= 50000000,</div><div class='ctx'> 	.n_ext_ts	= N_EXT_TS,</div><div class='ctx'> 	.n_per_out	= N_PER_OUT,</div><div class='add'>+	.supported_extts_flags = PTP_RISING_EDGE | PTP_FALLING_EDGE,</div><div class='ctx'> 	.adjfine	= ravb_ptp_adjfine,</div><div class='ctx'> 	.adjtime	= ravb_ptp_adjtime,</div><div class='ctx'> 	.gettime64	= ravb_ptp_gettime64,</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/rcar_gen4_ptp.c b/drivers/net/ethernet/renesas/rcar_gen4_ptp.c<br/>index 72e7fcc56693..d0979abd36de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rcar_gen4_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rcar_gen4_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rcar_gen4_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/rcar_gen4_ptp.c</a></div><div class='hunk'>@@ -12,25 +12,24 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "rcar_gen4_ptp.h"</div><div class='del'>-#define ptp_to_priv(ptp)	container_of(ptp, struct rcar_gen4_ptp_private, info)</div><div class='ctx'> </div><div class='del'>-static const struct rcar_gen4_ptp_reg_offset gen4_offs = {</div><div class='del'>-	.enable = PTPTMEC,</div><div class='del'>-	.disable = PTPTMDC,</div><div class='del'>-	.increment = PTPTIVC0,</div><div class='del'>-	.config_t0 = PTPTOVC00,</div><div class='del'>-	.config_t1 = PTPTOVC10,</div><div class='del'>-	.config_t2 = PTPTOVC20,</div><div class='del'>-	.monitor_t0 = PTPGPTPTM00,</div><div class='del'>-	.monitor_t1 = PTPGPTPTM10,</div><div class='del'>-	.monitor_t2 = PTPGPTPTM20,</div><div class='del'>-};</div><div class='add'>+#define PTPTMEC_REG		0x0010</div><div class='add'>+#define PTPTMDC_REG		0x0014</div><div class='add'>+#define PTPTIVC0_REG		0x0020</div><div class='add'>+#define PTPTOVC00_REG		0x0030</div><div class='add'>+#define PTPTOVC10_REG		0x0034</div><div class='add'>+#define PTPTOVC20_REG		0x0038</div><div class='add'>+#define PTPGPTPTM00_REG		0x0050</div><div class='add'>+#define PTPGPTPTM10_REG		0x0054</div><div class='add'>+#define PTPGPTPTM20_REG		0x0058</div><div class='add'>+</div><div class='add'>+#define ptp_to_priv(ptp)	container_of(ptp, struct rcar_gen4_ptp_private, info)</div><div class='ctx'> </div><div class='ctx'> static int rcar_gen4_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)</div><div class='ctx'> {</div><div class='ctx'> 	struct rcar_gen4_ptp_private *ptp_priv = ptp_to_priv(ptp);</div><div class='del'>-	bool neg_adj = scaled_ppm &lt; 0 ? true : false;</div><div class='ctx'> 	s64 addend = ptp_priv-&gt;default_addend;</div><div class='add'>+	bool neg_adj = scaled_ppm &lt; 0;</div><div class='ctx'> 	s64 diff;</div><div class='ctx'> </div><div class='ctx'> 	if (neg_adj)</div><div class='hunk'>@@ -38,20 +37,21 @@ static int rcar_gen4_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)</div><div class='ctx'> 	diff = div_s64(addend * scaled_ppm_to_ppb(scaled_ppm), NSEC_PER_SEC);</div><div class='ctx'> 	addend = neg_adj ? addend - diff : addend + diff;</div><div class='ctx'> </div><div class='del'>-	iowrite32(addend, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;increment);</div><div class='add'>+	iowrite32(addend, ptp_priv-&gt;addr + PTPTIVC0_REG);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Caller must hold the lock */</div><div class='ctx'> static void _rcar_gen4_ptp_gettime(struct ptp_clock_info *ptp,</div><div class='ctx'> 				   struct timespec64 *ts)</div><div class='ctx'> {</div><div class='ctx'> 	struct rcar_gen4_ptp_private *ptp_priv = ptp_to_priv(ptp);</div><div class='ctx'> </div><div class='del'>-	ts-&gt;tv_nsec = ioread32(ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;monitor_t0);</div><div class='del'>-	ts-&gt;tv_sec = ioread32(ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;monitor_t1) |</div><div class='del'>-		     ((s64)ioread32(ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;monitor_t2) &lt;&lt; 32);</div><div class='add'>+	lockdep_assert_held(&amp;ptp_priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ts-&gt;tv_nsec = ioread32(ptp_priv-&gt;addr + PTPGPTPTM00_REG);</div><div class='add'>+	ts-&gt;tv_sec = ioread32(ptp_priv-&gt;addr + PTPGPTPTM10_REG) |</div><div class='add'>+		     ((s64)ioread32(ptp_priv-&gt;addr + PTPGPTPTM20_REG) &lt;&lt; 32);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rcar_gen4_ptp_gettime(struct ptp_clock_info *ptp,</div><div class='hunk'>@@ -73,14 +73,14 @@ static void _rcar_gen4_ptp_settime(struct ptp_clock_info *ptp,</div><div class='ctx'> {</div><div class='ctx'> 	struct rcar_gen4_ptp_private *ptp_priv = ptp_to_priv(ptp);</div><div class='ctx'> </div><div class='del'>-	iowrite32(1, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;disable);</div><div class='del'>-	iowrite32(0, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;config_t2);</div><div class='del'>-	iowrite32(0, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;config_t1);</div><div class='del'>-	iowrite32(0, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;config_t0);</div><div class='del'>-	iowrite32(1, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;enable);</div><div class='del'>-	iowrite32(ts-&gt;tv_sec &gt;&gt; 32, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;config_t2);</div><div class='del'>-	iowrite32(ts-&gt;tv_sec, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;config_t1);</div><div class='del'>-	iowrite32(ts-&gt;tv_nsec, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;config_t0);</div><div class='add'>+	iowrite32(1, ptp_priv-&gt;addr + PTPTMDC_REG);</div><div class='add'>+	iowrite32(0, ptp_priv-&gt;addr + PTPTOVC20_REG);</div><div class='add'>+	iowrite32(0, ptp_priv-&gt;addr + PTPTOVC10_REG);</div><div class='add'>+	iowrite32(0, ptp_priv-&gt;addr + PTPTOVC00_REG);</div><div class='add'>+	iowrite32(1, ptp_priv-&gt;addr + PTPTMEC_REG);</div><div class='add'>+	iowrite32(ts-&gt;tv_sec &gt;&gt; 32, ptp_priv-&gt;addr + PTPTOVC20_REG);</div><div class='add'>+	iowrite32(ts-&gt;tv_sec, ptp_priv-&gt;addr + PTPTOVC10_REG);</div><div class='add'>+	iowrite32(ts-&gt;tv_nsec, ptp_priv-&gt;addr + PTPTOVC00_REG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rcar_gen4_ptp_settime(struct ptp_clock_info *ptp,</div><div class='hunk'>@@ -130,17 +130,6 @@ static struct ptp_clock_info rcar_gen4_ptp_info = {</div><div class='ctx'> 	.enable = rcar_gen4_ptp_enable,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int rcar_gen4_ptp_set_offs(struct rcar_gen4_ptp_private *ptp_priv,</div><div class='del'>-				  enum rcar_gen4_ptp_reg_layout layout)</div><div class='del'>-{</div><div class='del'>-	if (layout != RCAR_GEN4_PTP_REG_LAYOUT)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ptp_priv-&gt;offs = &amp;gen4_offs;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static s64 rcar_gen4_ptp_rate_to_increment(u32 rate)</div><div class='ctx'> {</div><div class='ctx'> 	/* Timer increment in ns.</div><div class='hunk'>@@ -151,27 +140,20 @@ static s64 rcar_gen4_ptp_rate_to_increment(u32 rate)</div><div class='ctx'> 	return div_s64(1000000000LL &lt;&lt; 27, rate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int rcar_gen4_ptp_register(struct rcar_gen4_ptp_private *ptp_priv,</div><div class='del'>-			   enum rcar_gen4_ptp_reg_layout layout, u32 rate)</div><div class='add'>+int rcar_gen4_ptp_register(struct rcar_gen4_ptp_private *ptp_priv, u32 rate)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	if (ptp_priv-&gt;initialized)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;ptp_priv-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	ret = rcar_gen4_ptp_set_offs(ptp_priv, layout);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	ptp_priv-&gt;default_addend = rcar_gen4_ptp_rate_to_increment(rate);</div><div class='del'>-	iowrite32(ptp_priv-&gt;default_addend, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;increment);</div><div class='add'>+	iowrite32(ptp_priv-&gt;default_addend, ptp_priv-&gt;addr + PTPTIVC0_REG);</div><div class='ctx'> 	ptp_priv-&gt;clock = ptp_clock_register(&amp;ptp_priv-&gt;info, NULL);</div><div class='ctx'> 	if (IS_ERR(ptp_priv-&gt;clock))</div><div class='ctx'> 		return PTR_ERR(ptp_priv-&gt;clock);</div><div class='ctx'> </div><div class='del'>-	iowrite32(0x01, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;enable);</div><div class='add'>+	iowrite32(0x01, ptp_priv-&gt;addr + PTPTMEC_REG);</div><div class='ctx'> 	ptp_priv-&gt;initialized = true;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -180,7 +162,7 @@ EXPORT_SYMBOL_GPL(rcar_gen4_ptp_register);</div><div class='ctx'> </div><div class='ctx'> int rcar_gen4_ptp_unregister(struct rcar_gen4_ptp_private *ptp_priv)</div><div class='ctx'> {</div><div class='del'>-	iowrite32(1, ptp_priv-&gt;addr + ptp_priv-&gt;offs-&gt;disable);</div><div class='add'>+	iowrite32(1, ptp_priv-&gt;addr + PTPTMDC_REG);</div><div class='ctx'> </div><div class='ctx'> 	return ptp_clock_unregister(ptp_priv-&gt;clock);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/rcar_gen4_ptp.h b/drivers/net/ethernet/renesas/rcar_gen4_ptp.h<br/>index e22da5acd53d..9a9c232c854e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rcar_gen4_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rcar_gen4_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rcar_gen4_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/rcar_gen4_ptp.h</a></div><div class='hunk'>@@ -9,60 +9,16 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='ctx'> </div><div class='del'>-#define RCAR_GEN4_GPTP_OFFSET_S4	0x00018000</div><div class='del'>-</div><div class='del'>-enum rcar_gen4_ptp_reg_layout {</div><div class='del'>-	RCAR_GEN4_PTP_REG_LAYOUT</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* driver's definitions */</div><div class='del'>-#define RCAR_GEN4_RXTSTAMP_ENABLED		BIT(0)</div><div class='del'>-#define RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT	BIT(1)</div><div class='del'>-#define RCAR_GEN4_RXTSTAMP_TYPE_ALL		(RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT | BIT(2))</div><div class='del'>-#define RCAR_GEN4_RXTSTAMP_TYPE			RCAR_GEN4_RXTSTAMP_TYPE_ALL</div><div class='del'>-</div><div class='del'>-#define RCAR_GEN4_TXTSTAMP_ENABLED		BIT(0)</div><div class='del'>-</div><div class='del'>-#define PTPRO				0</div><div class='del'>-</div><div class='del'>-enum rcar_gen4_ptp_reg {</div><div class='del'>-	PTPTMEC		= PTPRO + 0x0010,</div><div class='del'>-	PTPTMDC		= PTPRO + 0x0014,</div><div class='del'>-	PTPTIVC0	= PTPRO + 0x0020,</div><div class='del'>-	PTPTOVC00	= PTPRO + 0x0030,</div><div class='del'>-	PTPTOVC10	= PTPRO + 0x0034,</div><div class='del'>-	PTPTOVC20	= PTPRO + 0x0038,</div><div class='del'>-	PTPGPTPTM00	= PTPRO + 0x0050,</div><div class='del'>-	PTPGPTPTM10	= PTPRO + 0x0054,</div><div class='del'>-	PTPGPTPTM20	= PTPRO + 0x0058,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct rcar_gen4_ptp_reg_offset {</div><div class='del'>-	u16 enable;</div><div class='del'>-	u16 disable;</div><div class='del'>-	u16 increment;</div><div class='del'>-	u16 config_t0;</div><div class='del'>-	u16 config_t1;</div><div class='del'>-	u16 config_t2;</div><div class='del'>-	u16 monitor_t0;</div><div class='del'>-	u16 monitor_t1;</div><div class='del'>-	u16 monitor_t2;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct rcar_gen4_ptp_private {</div><div class='ctx'> 	void __iomem *addr;</div><div class='ctx'> 	struct ptp_clock *clock;</div><div class='ctx'> 	struct ptp_clock_info info;</div><div class='del'>-	const struct rcar_gen4_ptp_reg_offset *offs;</div><div class='ctx'> 	spinlock_t lock;	/* For multiple registers access */</div><div class='del'>-	u32 tstamp_tx_ctrl;</div><div class='del'>-	u32 tstamp_rx_ctrl;</div><div class='ctx'> 	s64 default_addend;</div><div class='ctx'> 	bool initialized;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-int rcar_gen4_ptp_register(struct rcar_gen4_ptp_private *ptp_priv,</div><div class='del'>-			   enum rcar_gen4_ptp_reg_layout layout, u32 rate);</div><div class='add'>+int rcar_gen4_ptp_register(struct rcar_gen4_ptp_private *ptp_priv, u32 rate);</div><div class='ctx'> int rcar_gen4_ptp_unregister(struct rcar_gen4_ptp_private *ptp_priv);</div><div class='ctx'> struct rcar_gen4_ptp_private *rcar_gen4_ptp_alloc(struct platform_device *pdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/renesas/rswitch.h b/drivers/net/ethernet/renesas/rswitch.h<br/>index 72e3ff596d31..aa605304fed0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rswitch.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rswitch.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rswitch.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/rswitch.h</a></div><div class='hunk'>@@ -1,18 +1,25 @@</div><div class='ctx'> /* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /* Renesas Ethernet Switch device driver</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2022 Renesas Electronics Corporation</div><div class='add'>+ * Copyright (C) 2022-2025 Renesas Electronics Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __RSWITCH_H__</div><div class='ctx'> #define __RSWITCH_H__</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "rcar_gen4_ptp.h"</div><div class='ctx'> </div><div class='ctx'> #define RSWITCH_MAX_NUM_QUEUES	128</div><div class='ctx'> </div><div class='add'>+#define RSWITCH_NUM_AGENTS	5</div><div class='ctx'> #define RSWITCH_NUM_PORTS	3</div><div class='add'>+</div><div class='add'>+#define rswitch_for_all_ports(_priv, _rdev)			\</div><div class='add'>+	list_for_each_entry(_rdev, &amp;_priv-&gt;port_list, list)</div><div class='add'>+</div><div class='ctx'> #define rswitch_for_each_enabled_port(priv, i)		\</div><div class='ctx'> 	for (i = 0; i &lt; RSWITCH_NUM_PORTS; i++)		\</div><div class='ctx'> 		if (priv-&gt;rdev[i]-&gt;disabled)		\</div><div class='hunk'>@@ -724,35 +731,28 @@ enum rswitch_etha_mode {</div><div class='ctx'> </div><div class='ctx'> #define EAVCC_VEM_SC_TAG	(0x3 &lt;&lt; 16)</div><div class='ctx'> </div><div class='del'>-#define MPIC_PIS_MII		0x00</div><div class='del'>-#define MPIC_PIS_GMII		0x02</div><div class='del'>-#define MPIC_PIS_XGMII		0x04</div><div class='del'>-#define MPIC_LSC_SHIFT		3</div><div class='del'>-#define MPIC_LSC_100M		(1 &lt;&lt; MPIC_LSC_SHIFT)</div><div class='del'>-#define MPIC_LSC_1G		(2 &lt;&lt; MPIC_LSC_SHIFT)</div><div class='del'>-#define MPIC_LSC_2_5G		(3 &lt;&lt; MPIC_LSC_SHIFT)</div><div class='del'>-</div><div class='del'>-#define MDIO_READ_C45		0x03</div><div class='del'>-#define MDIO_WRITE_C45		0x01</div><div class='add'>+#define MPIC_PIS		GENMASK(2, 0)</div><div class='add'>+#define MPIC_PIS_GMII		2</div><div class='add'>+#define MPIC_PIS_XGMII		4</div><div class='add'>+#define MPIC_LSC		GENMASK(5, 3)</div><div class='add'>+#define MPIC_LSC_100M		1</div><div class='add'>+#define MPIC_LSC_1G		2</div><div class='add'>+#define MPIC_LSC_2_5G		3</div><div class='add'>+#define MPIC_PSMCS		GENMASK(22, 16)</div><div class='add'>+#define MPIC_PSMHT		GENMASK(26, 24)</div><div class='ctx'> </div><div class='ctx'> #define MPSM_PSME		BIT(0)</div><div class='del'>-#define MPSM_MFF_C45		BIT(2)</div><div class='del'>-#define MPSM_PRD_SHIFT		16</div><div class='del'>-#define MPSM_PRD_MASK		GENMASK(31, MPSM_PRD_SHIFT)</div><div class='del'>-</div><div class='del'>-/* Completion flags */</div><div class='del'>-#define MMIS1_PAACS             BIT(2) /* Address */</div><div class='del'>-#define MMIS1_PWACS             BIT(1) /* Write */</div><div class='del'>-#define MMIS1_PRACS             BIT(0) /* Read */</div><div class='del'>-#define MMIS1_CLEAR_FLAGS       0xf</div><div class='del'>-</div><div class='del'>-#define MPIC_PSMCS_SHIFT	16</div><div class='del'>-#define MPIC_PSMCS_MASK		GENMASK(22, MPIC_PSMCS_SHIFT)</div><div class='del'>-#define MPIC_PSMCS(val)		((val) &lt;&lt; MPIC_PSMCS_SHIFT)</div><div class='del'>-</div><div class='del'>-#define MPIC_PSMHT_SHIFT	24</div><div class='del'>-#define MPIC_PSMHT_MASK		GENMASK(26, MPIC_PSMHT_SHIFT)</div><div class='del'>-#define MPIC_PSMHT(val)		((val) &lt;&lt; MPIC_PSMHT_SHIFT)</div><div class='add'>+#define MPSM_MFF		BIT(2)</div><div class='add'>+#define MPSM_MMF_C22		0</div><div class='add'>+#define MPSM_MMF_C45		1</div><div class='add'>+#define MPSM_PDA		GENMASK(7, 3)</div><div class='add'>+#define MPSM_PRA		GENMASK(12, 8)</div><div class='add'>+#define MPSM_POP		GENMASK(14, 13)</div><div class='add'>+#define MPSM_POP_ADDRESS	0</div><div class='add'>+#define MPSM_POP_WRITE		1</div><div class='add'>+#define MPSM_POP_READ_C22	2</div><div class='add'>+#define MPSM_POP_READ_C45	3</div><div class='add'>+#define MPSM_PRD		GENMASK(31, 16)</div><div class='ctx'> </div><div class='ctx'> #define MLVC_PLV		BIT(16)</div><div class='ctx'> </div><div class='hunk'>@@ -806,6 +806,7 @@ enum rswitch_gwca_mode {</div><div class='ctx'> #define CABPPFLC_INIT_VALUE	0x00800080</div><div class='ctx'> </div><div class='ctx'> /* MFWD */</div><div class='add'>+#define FWPC0(i)		(FWPC00 + (i) * 0x10)</div><div class='ctx'> #define FWPC0_LTHTA		BIT(0)</div><div class='ctx'> #define FWPC0_IP4UE		BIT(3)</div><div class='ctx'> #define FWPC0_IP4TE		BIT(4)</div><div class='hunk'>@@ -814,23 +815,42 @@ enum rswitch_gwca_mode {</div><div class='ctx'> #define FWPC0_IP4EA		BIT(10)</div><div class='ctx'> #define FWPC0_IPDSA		BIT(12)</div><div class='ctx'> #define FWPC0_IPHLA		BIT(18)</div><div class='del'>-#define FWPC0_MACSDA		BIT(20)</div><div class='add'>+#define FWPC0_MACDSA		BIT(20)</div><div class='add'>+#define FWPC0_MACSSA		BIT(23)</div><div class='ctx'> #define FWPC0_MACHLA		BIT(26)</div><div class='ctx'> #define FWPC0_MACHMA		BIT(27)</div><div class='ctx'> #define FWPC0_VLANSA		BIT(28)</div><div class='ctx'> </div><div class='del'>-#define FWPC0(i)		(FWPC00 + (i) * 0x10)</div><div class='del'>-#define FWPC0_DEFAULT		(FWPC0_LTHTA | FWPC0_IP4UE | FWPC0_IP4TE | \</div><div class='del'>-				 FWPC0_IP4OE | FWPC0_L2SE | FWPC0_IP4EA | \</div><div class='del'>-				 FWPC0_IPDSA | FWPC0_IPHLA | FWPC0_MACSDA | \</div><div class='del'>-				 FWPC0_MACHLA |	FWPC0_MACHMA | FWPC0_VLANSA)</div><div class='ctx'> #define FWPC1(i)		(FWPC10 + (i) * 0x10)</div><div class='add'>+#define FWCP1_LTHFW		GENMASK(16 + (RSWITCH_NUM_AGENTS - 1), 16)</div><div class='ctx'> #define FWPC1_DDE		BIT(0)</div><div class='ctx'> </div><div class='del'>-#define	FWPBFC(i)		(FWPBFC0 + (i) * 0x10)</div><div class='add'>+#define FWPC2(i)		(FWPC20 + (i) * 0x10)</div><div class='add'>+#define FWCP2_LTWFW		GENMASK(16 + (RSWITCH_NUM_AGENTS - 1), 16)</div><div class='add'>+#define FWCP2_LTWFW_MASK	GENMASK(16 + (RSWITCH_NUM_AGENTS - 1), 16)</div><div class='add'>+</div><div class='add'>+#define FWPBFC(i)		(FWPBFC0 + (i) * 0x10)</div><div class='add'>+#define FWPBFC_PBDV		GENMASK(RSWITCH_NUM_AGENTS - 1, 0)</div><div class='ctx'> </div><div class='ctx'> #define FWPBFCSDC(j, i)         (FWPBFCSDC00 + (i) * 0x10 + (j) * 0x04)</div><div class='ctx'> </div><div class='add'>+#define FWMACHEC_MACHMUE_MASK	GENMASK(26, 16)</div><div class='add'>+</div><div class='add'>+#define FWMACTIM_MACTIOG	BIT(0)</div><div class='add'>+#define FWMACTIM_MACTR		BIT(1)</div><div class='add'>+</div><div class='add'>+#define FWMACAGUSPC_MACAGUSP	GENMASK(9, 0)</div><div class='add'>+#define FWMACAGC_MACAGT		GENMASK(15, 0)</div><div class='add'>+#define FWMACAGC_MACAGE		BIT(16)</div><div class='add'>+#define FWMACAGC_MACAGSL	BIT(17)</div><div class='add'>+#define FWMACAGC_MACAGPM	BIT(18)</div><div class='add'>+#define FWMACAGC_MACDES		BIT(24)</div><div class='add'>+#define FWMACAGC_MACAGOG	BIT(28)</div><div class='add'>+#define FWMACAGC_MACDESOG	BIT(29)</div><div class='add'>+</div><div class='add'>+#define RSW_AGEING_CLK_PER_US	0x140</div><div class='add'>+#define RSW_AGEING_TIME		300</div><div class='add'>+</div><div class='ctx'> /* TOP */</div><div class='ctx'> #define TPEMIMC7(queue)		(TPEMIMC70 + (queue) * 4)</div><div class='ctx'> </div><div class='hunk'>@@ -972,14 +992,6 @@ struct rswitch_gwca_queue {</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct rswitch_gwca_ts_info {</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct list_head list;</div><div class='del'>-</div><div class='del'>-	int port;</div><div class='del'>-	u8 tag;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define RSWITCH_NUM_IRQ_REGS	(RSWITCH_MAX_NUM_QUEUES / BITS_PER_TYPE(u32))</div><div class='ctx'> struct rswitch_gwca {</div><div class='ctx'> 	unsigned int index;</div><div class='hunk'>@@ -989,14 +1001,13 @@ struct rswitch_gwca {</div><div class='ctx'> 	struct rswitch_gwca_queue *queues;</div><div class='ctx'> 	int num_queues;</div><div class='ctx'> 	struct rswitch_gwca_queue ts_queue;</div><div class='del'>-	struct list_head ts_info_list;</div><div class='ctx'> 	DECLARE_BITMAP(used, RSWITCH_MAX_NUM_QUEUES);</div><div class='ctx'> 	u32 tx_irq_bits[RSWITCH_NUM_IRQ_REGS];</div><div class='ctx'> 	u32 rx_irq_bits[RSWITCH_NUM_IRQ_REGS];</div><div class='del'>-	int speed;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define NUM_QUEUES_PER_NDEV	2</div><div class='add'>+#define TS_TAGS_PER_PORT	256</div><div class='ctx'> struct rswitch_device {</div><div class='ctx'> 	struct rswitch_private *priv;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='hunk'>@@ -1004,13 +1015,22 @@ struct rswitch_device {</div><div class='ctx'> 	void __iomem *addr;</div><div class='ctx'> 	struct rswitch_gwca_queue *tx_queue;</div><div class='ctx'> 	struct rswitch_gwca_queue *rx_queue;</div><div class='del'>-	u8 ts_tag;</div><div class='add'>+	struct sk_buff *ts_skb[TS_TAGS_PER_PORT];</div><div class='add'>+	DECLARE_BITMAP(ts_skb_used, TS_TAGS_PER_PORT);</div><div class='ctx'> 	bool disabled;</div><div class='ctx'> </div><div class='add'>+	struct list_head list;</div><div class='add'>+</div><div class='ctx'> 	int port;</div><div class='ctx'> 	struct rswitch_etha *etha;</div><div class='ctx'> 	struct device_node *np_port;</div><div class='ctx'> 	struct phy *serdes;</div><div class='add'>+</div><div class='add'>+	struct net_device *brdev;	/* master bridge device */</div><div class='add'>+	unsigned int learning_requested : 1;</div><div class='add'>+	unsigned int learning_offloaded : 1;</div><div class='add'>+	unsigned int forwarding_requested : 1;</div><div class='add'>+	unsigned int forwarding_offloaded : 1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct rswitch_mfwd_mac_table_entry {</div><div class='hunk'>@@ -1035,11 +1055,20 @@ struct rswitch_private {</div><div class='ctx'> 	struct rswitch_etha etha[RSWITCH_NUM_PORTS];</div><div class='ctx'> 	struct rswitch_mfwd mfwd;</div><div class='ctx'> </div><div class='add'>+	struct list_head port_list;</div><div class='add'>+</div><div class='ctx'> 	spinlock_t lock;	/* lock interrupt registers' control */</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> </div><div class='ctx'> 	bool etha_no_runtime_change;</div><div class='ctx'> 	bool gwca_halt;</div><div class='add'>+	struct net_device *offload_brdev;</div><div class='add'>+</div><div class='add'>+	enum hwtstamp_tx_types tstamp_tx_ctrl;</div><div class='add'>+	enum hwtstamp_rx_filters tstamp_rx_ctrl;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+bool is_rdev(const struct net_device *ndev);</div><div class='add'>+void rswitch_modify(void __iomem *addr, enum rswitch_reg reg, u32 clear, u32 set);</div><div class='add'>+</div><div class='ctx'> #endif	/* #ifndef __RSWITCH_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/rswitch_l2.c b/drivers/net/ethernet/renesas/rswitch_l2.c<br/>new file mode 100644<br/>index 000000000000..4a69ec77d69c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rswitch_l2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/rswitch_l2.c</a></div><div class='hunk'>@@ -0,0 +1,316 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Renesas Ethernet Switch device driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;net/switchdev.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rswitch.h"</div><div class='add'>+#include "rswitch_l2.h"</div><div class='add'>+</div><div class='add'>+static bool rdev_for_l2_offload(struct rswitch_device *rdev)</div><div class='add'>+{</div><div class='add'>+	return rdev-&gt;priv-&gt;offload_brdev &amp;&amp;</div><div class='add'>+	       rdev-&gt;brdev == rdev-&gt;priv-&gt;offload_brdev &amp;&amp;</div><div class='add'>+	       (test_bit(rdev-&gt;port, rdev-&gt;priv-&gt;opened_ports));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rswitch_change_l2_hw_offloading(struct rswitch_device *rdev,</div><div class='add'>+					    bool start, bool learning)</div><div class='add'>+{</div><div class='add'>+	u32 bits = learning ? FWPC0_MACSSA | FWPC0_MACHLA | FWPC0_MACHMA : FWPC0_MACDSA;</div><div class='add'>+	u32 clear = start ? 0 : bits;</div><div class='add'>+	u32 set = start ? bits : 0;</div><div class='add'>+</div><div class='add'>+	if ((learning &amp;&amp; rdev-&gt;learning_offloaded == start) ||</div><div class='add'>+	    (!learning &amp;&amp; rdev-&gt;forwarding_offloaded == start))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rswitch_modify(rdev-&gt;priv-&gt;addr, FWPC0(rdev-&gt;port), clear, set);</div><div class='add'>+</div><div class='add'>+	if (learning)</div><div class='add'>+		rdev-&gt;learning_offloaded = start;</div><div class='add'>+	else</div><div class='add'>+		rdev-&gt;forwarding_offloaded = start;</div><div class='add'>+</div><div class='add'>+	netdev_info(rdev-&gt;ndev, "%s hw %s\n", start ? "starting" : "stopping",</div><div class='add'>+		    learning ? "learning" : "forwarding");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rswitch_update_l2_hw_learning(struct rswitch_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct rswitch_device *rdev;</div><div class='add'>+	bool learning_needed;</div><div class='add'>+</div><div class='add'>+	rswitch_for_all_ports(priv, rdev) {</div><div class='add'>+		if (rdev_for_l2_offload(rdev))</div><div class='add'>+			learning_needed = rdev-&gt;learning_requested;</div><div class='add'>+		else</div><div class='add'>+			learning_needed = false;</div><div class='add'>+</div><div class='add'>+		rswitch_change_l2_hw_offloading(rdev, learning_needed, true);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rswitch_update_l2_hw_forwarding(struct rswitch_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct rswitch_device *rdev;</div><div class='add'>+	unsigned int fwd_mask;</div><div class='add'>+</div><div class='add'>+	/* calculate fwd_mask with zeroes in bits corresponding to ports that</div><div class='add'>+	 * shall participate in hardware forwarding</div><div class='add'>+	 */</div><div class='add'>+	fwd_mask = GENMASK(RSWITCH_NUM_AGENTS - 1, 0);</div><div class='add'>+</div><div class='add'>+	rswitch_for_all_ports(priv, rdev) {</div><div class='add'>+		if (rdev_for_l2_offload(rdev) &amp;&amp; rdev-&gt;forwarding_requested)</div><div class='add'>+			fwd_mask &amp;= ~BIT(rdev-&gt;port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rswitch_for_all_ports(priv, rdev) {</div><div class='add'>+		if ((rdev_for_l2_offload(rdev) &amp;&amp; rdev-&gt;forwarding_requested) ||</div><div class='add'>+		    rdev-&gt;forwarding_offloaded) {</div><div class='add'>+			/* Update allowed offload destinations even for ports</div><div class='add'>+			 * with L2 offload enabled earlier.</div><div class='add'>+			 *</div><div class='add'>+			 * Do not allow L2 forwarding to self for hw port.</div><div class='add'>+			 */</div><div class='add'>+			iowrite32(FIELD_PREP(FWCP2_LTWFW_MASK, fwd_mask | BIT(rdev-&gt;port)),</div><div class='add'>+				  priv-&gt;addr + FWPC2(rdev-&gt;port));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (rdev_for_l2_offload(rdev) &amp;&amp;</div><div class='add'>+		    rdev-&gt;forwarding_requested &amp;&amp;</div><div class='add'>+		    !rdev-&gt;forwarding_offloaded) {</div><div class='add'>+			rswitch_change_l2_hw_offloading(rdev, true, false);</div><div class='add'>+		} else if (rdev-&gt;forwarding_offloaded) {</div><div class='add'>+			rswitch_change_l2_hw_offloading(rdev, false, false);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rswitch_update_l2_offload(struct rswitch_private *priv)</div><div class='add'>+{</div><div class='add'>+	rswitch_update_l2_hw_learning(priv);</div><div class='add'>+	rswitch_update_l2_hw_forwarding(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rswitch_update_offload_brdev(struct rswitch_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *offload_brdev = NULL;</div><div class='add'>+	struct rswitch_device *rdev, *rdev2;</div><div class='add'>+</div><div class='add'>+	rswitch_for_all_ports(priv, rdev) {</div><div class='add'>+		if (!rdev-&gt;brdev)</div><div class='add'>+			continue;</div><div class='add'>+		rswitch_for_all_ports(priv, rdev2) {</div><div class='add'>+			if (rdev2 == rdev)</div><div class='add'>+				break;</div><div class='add'>+			if (rdev2-&gt;brdev == rdev-&gt;brdev) {</div><div class='add'>+				offload_brdev = rdev-&gt;brdev;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (offload_brdev)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (offload_brdev == priv-&gt;offload_brdev)</div><div class='add'>+		dev_dbg(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+			"changing l2 offload from %s to %s\n",</div><div class='add'>+			netdev_name(priv-&gt;offload_brdev),</div><div class='add'>+			netdev_name(offload_brdev));</div><div class='add'>+	else if (offload_brdev)</div><div class='add'>+		dev_dbg(&amp;priv-&gt;pdev-&gt;dev, "starting l2 offload for %s\n",</div><div class='add'>+			netdev_name(offload_brdev));</div><div class='add'>+	else if (!offload_brdev)</div><div class='add'>+		dev_dbg(&amp;priv-&gt;pdev-&gt;dev, "stopping l2 offload for %s\n",</div><div class='add'>+			netdev_name(priv-&gt;offload_brdev));</div><div class='add'>+</div><div class='add'>+	priv-&gt;offload_brdev = offload_brdev;</div><div class='add'>+</div><div class='add'>+	rswitch_update_l2_offload(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool rswitch_port_check(const struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	return is_rdev(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rswitch_port_update_brdev(struct net_device *ndev,</div><div class='add'>+				      struct net_device *brdev)</div><div class='add'>+{</div><div class='add'>+	struct rswitch_device *rdev;</div><div class='add'>+</div><div class='add'>+	if (!is_rdev(ndev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rdev = netdev_priv(ndev);</div><div class='add'>+	rdev-&gt;brdev = brdev;</div><div class='add'>+	rswitch_update_offload_brdev(rdev-&gt;priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rswitch_port_update_stp_state(struct net_device *ndev, u8 stp_state)</div><div class='add'>+{</div><div class='add'>+	struct rswitch_device *rdev;</div><div class='add'>+</div><div class='add'>+	if (!is_rdev(ndev))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	rdev = netdev_priv(ndev);</div><div class='add'>+	rdev-&gt;learning_requested = (stp_state == BR_STATE_LEARNING ||</div><div class='add'>+				    stp_state == BR_STATE_FORWARDING);</div><div class='add'>+	rdev-&gt;forwarding_requested = (stp_state == BR_STATE_FORWARDING);</div><div class='add'>+	rswitch_update_l2_offload(rdev-&gt;priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rswitch_netdevice_event(struct notifier_block *nb,</div><div class='add'>+				   unsigned long event, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = netdev_notifier_info_to_dev(ptr);</div><div class='add'>+	struct netdev_notifier_changeupper_info *info;</div><div class='add'>+	struct net_device *brdev;</div><div class='add'>+</div><div class='add'>+	if (!rswitch_port_check(ndev))</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+	if (event != NETDEV_CHANGEUPPER)</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	info = ptr;</div><div class='add'>+</div><div class='add'>+	if (netif_is_bridge_master(info-&gt;upper_dev)) {</div><div class='add'>+		brdev = info-&gt;linking ? info-&gt;upper_dev : NULL;</div><div class='add'>+		rswitch_port_update_brdev(ndev, brdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NOTIFY_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rswitch_update_ageing_time(struct net_device *ndev, clock_t time)</div><div class='add'>+{</div><div class='add'>+	struct rswitch_device *rdev = netdev_priv(ndev);</div><div class='add'>+	u32 reg_val;</div><div class='add'>+</div><div class='add'>+	if (!is_rdev(ndev))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (!FIELD_FIT(FWMACAGC_MACAGT, time))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	reg_val = FIELD_PREP(FWMACAGC_MACAGT, time);</div><div class='add'>+	reg_val |= FWMACAGC_MACAGE | FWMACAGC_MACAGSL;</div><div class='add'>+	iowrite32(reg_val, rdev-&gt;priv-&gt;addr + FWMACAGC);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rswitch_port_attr_set(struct net_device *ndev, const void *ctx,</div><div class='add'>+				 const struct switchdev_attr *attr,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	switch (attr-&gt;id) {</div><div class='add'>+	case SWITCHDEV_ATTR_ID_PORT_STP_STATE:</div><div class='add'>+		return rswitch_port_update_stp_state(ndev, attr-&gt;u.stp_state);</div><div class='add'>+	case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME:</div><div class='add'>+		return rswitch_update_ageing_time(ndev, attr-&gt;u.ageing_time);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rswitch_switchdev_event(struct notifier_block *nb,</div><div class='add'>+				   unsigned long event, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = switchdev_notifier_info_to_dev(ptr);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (event == SWITCHDEV_PORT_ATTR_SET) {</div><div class='add'>+		ret = switchdev_handle_port_attr_set(ndev, ptr,</div><div class='add'>+						     rswitch_port_check,</div><div class='add'>+						     rswitch_port_attr_set);</div><div class='add'>+		return notifier_from_errno(ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!rswitch_port_check(ndev))</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	return notifier_from_errno(-EOPNOTSUPP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rswitch_switchdev_blocking_event(struct notifier_block *nb,</div><div class='add'>+					    unsigned long event, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = switchdev_notifier_info_to_dev(ptr);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (event) {</div><div class='add'>+	case SWITCHDEV_PORT_OBJ_ADD:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	case SWITCHDEV_PORT_OBJ_DEL:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	case SWITCHDEV_PORT_ATTR_SET:</div><div class='add'>+		ret = switchdev_handle_port_attr_set(ndev, ptr,</div><div class='add'>+						     rswitch_port_check,</div><div class='add'>+						     rswitch_port_attr_set);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		if (!rswitch_port_check(ndev))</div><div class='add'>+			return NOTIFY_DONE;</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return notifier_from_errno(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block rswitch_netdevice_nb = {</div><div class='add'>+	.notifier_call = rswitch_netdevice_event,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct notifier_block rswitch_switchdev_nb = {</div><div class='add'>+	.notifier_call = rswitch_switchdev_event,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct notifier_block rswitch_switchdev_blocking_nb = {</div><div class='add'>+	.notifier_call = rswitch_switchdev_blocking_event,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int rswitch_register_notifiers(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = register_netdevice_notifier(&amp;rswitch_netdevice_nb);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto register_netdevice_notifier_failed;</div><div class='add'>+</div><div class='add'>+	ret = register_switchdev_notifier(&amp;rswitch_switchdev_nb);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto register_switchdev_notifier_failed;</div><div class='add'>+</div><div class='add'>+	ret = register_switchdev_blocking_notifier(&amp;rswitch_switchdev_blocking_nb);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto register_switchdev_blocking_notifier_failed;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+register_switchdev_blocking_notifier_failed:</div><div class='add'>+	unregister_switchdev_notifier(&amp;rswitch_switchdev_nb);</div><div class='add'>+register_switchdev_notifier_failed:</div><div class='add'>+	unregister_netdevice_notifier(&amp;rswitch_netdevice_nb);</div><div class='add'>+register_netdevice_notifier_failed:</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rswitch_unregister_notifiers(void)</div><div class='add'>+{</div><div class='add'>+	unregister_switchdev_blocking_notifier(&amp;rswitch_switchdev_blocking_nb);</div><div class='add'>+	unregister_switchdev_notifier(&amp;rswitch_switchdev_nb);</div><div class='add'>+	unregister_netdevice_notifier(&amp;rswitch_netdevice_nb);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/rswitch_l2.h b/drivers/net/ethernet/renesas/rswitch_l2.h<br/>new file mode 100644<br/>index 000000000000..57050ede8f31<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rswitch_l2.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/rswitch_l2.h</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Renesas Ethernet Switch device driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __RSWITCH_L2_H__</div><div class='add'>+#define __RSWITCH_L2_H__</div><div class='add'>+</div><div class='add'>+void rswitch_update_l2_offload(struct rswitch_private *priv);</div><div class='add'>+</div><div class='add'>+int rswitch_register_notifiers(void);</div><div class='add'>+void rswitch_unregister_notifiers(void);</div><div class='add'>+</div><div class='add'>+#endif	/* #ifndef __RSWITCH_L2_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/rswitch.c b/drivers/net/ethernet/renesas/rswitch_main.c<br/>index 8d18dae4d8fb..e14b21148f27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rswitch.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rswitch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rswitch_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/rswitch_main.c</a></div><div class='hunk'>@@ -1,15 +1,18 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* Renesas Ethernet Switch device driver</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2022 Renesas Electronics Corporation</div><div class='add'>+ * Copyright (C) 2022-2025 Renesas Electronics Corporation</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='ctx'> #include &lt;linux/iopoll.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='hunk'>@@ -25,6 +28,9 @@</div><div class='ctx'> #include &lt;linux/sys_soc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "rswitch.h"</div><div class='add'>+#include "rswitch_l2.h"</div><div class='add'>+</div><div class='add'>+#define RSWITCH_GPTP_OFFSET_S4 0x00018000</div><div class='ctx'> </div><div class='ctx'> static int rswitch_reg_wait(void __iomem *addr, u32 offs, u32 mask, u32 expected)</div><div class='ctx'> {</div><div class='hunk'>@@ -34,7 +40,7 @@ static int rswitch_reg_wait(void __iomem *addr, u32 offs, u32 mask, u32 expected</div><div class='ctx'> 					 1, RSWITCH_TIMEOUT_US);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rswitch_modify(void __iomem *addr, enum rswitch_reg reg, u32 clear, u32 set)</div><div class='add'>+void rswitch_modify(void __iomem *addr, enum rswitch_reg reg, u32 clear, u32 set)</div><div class='ctx'> {</div><div class='ctx'> 	iowrite32((ioread32(addr + reg) &amp; ~clear) | set, addr + reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -109,27 +115,56 @@ static void rswitch_top_init(struct rswitch_private *priv)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Forwarding engine block (MFWD) */</div><div class='del'>-static void rswitch_fwd_init(struct rswitch_private *priv)</div><div class='add'>+static int rswitch_fwd_init(struct rswitch_private *priv)</div><div class='ctx'> {</div><div class='add'>+	u32 all_ports_mask = GENMASK(RSWITCH_NUM_AGENTS - 1, 0);</div><div class='ctx'> 	unsigned int i;</div><div class='del'>-</div><div class='del'>-	/* For ETHA */</div><div class='del'>-	for (i = 0; i &lt; RSWITCH_NUM_PORTS; i++) {</div><div class='del'>-		iowrite32(FWPC0_DEFAULT, priv-&gt;addr + FWPC0(i));</div><div class='add'>+	u32 reg_val;</div><div class='add'>+</div><div class='add'>+	/* Start with empty configuration */</div><div class='add'>+	for (i = 0; i &lt; RSWITCH_NUM_AGENTS; i++) {</div><div class='add'>+		/* Disable all port features */</div><div class='add'>+		iowrite32(0, priv-&gt;addr + FWPC0(i));</div><div class='add'>+		/* Disallow L3 forwarding and direct descriptor forwarding */</div><div class='add'>+		iowrite32(FIELD_PREP(FWCP1_LTHFW, all_ports_mask),</div><div class='add'>+			  priv-&gt;addr + FWPC1(i));</div><div class='add'>+		/* Disallow L2 forwarding */</div><div class='add'>+		iowrite32(FIELD_PREP(FWCP2_LTWFW, all_ports_mask),</div><div class='add'>+			  priv-&gt;addr + FWPC2(i));</div><div class='add'>+		/* Disallow port based forwarding */</div><div class='ctx'> 		iowrite32(0, priv-&gt;addr + FWPBFC(i));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; RSWITCH_NUM_PORTS; i++) {</div><div class='add'>+	/* Configure MAC table aging */</div><div class='add'>+	rswitch_modify(priv-&gt;addr, FWMACAGUSPC, FWMACAGUSPC_MACAGUSP,</div><div class='add'>+		       FIELD_PREP(FWMACAGUSPC_MACAGUSP, RSW_AGEING_CLK_PER_US));</div><div class='add'>+</div><div class='add'>+	reg_val = FIELD_PREP(FWMACAGC_MACAGT, RSW_AGEING_TIME);</div><div class='add'>+	reg_val |= FWMACAGC_MACAGE | FWMACAGC_MACAGSL;</div><div class='add'>+	iowrite32(reg_val, priv-&gt;addr + FWMACAGC);</div><div class='add'>+</div><div class='add'>+	/* For enabled ETHA ports, setup port based forwarding */</div><div class='add'>+	rswitch_for_each_enabled_port(priv, i) {</div><div class='add'>+		/* Port based forwarding from port i to GWCA port */</div><div class='add'>+		rswitch_modify(priv-&gt;addr, FWPBFC(i), FWPBFC_PBDV,</div><div class='add'>+			       FIELD_PREP(FWPBFC_PBDV, BIT(priv-&gt;gwca.index)));</div><div class='add'>+		/* Within GWCA port, forward to Rx queue for port i */</div><div class='ctx'> 		iowrite32(priv-&gt;rdev[i]-&gt;rx_queue-&gt;index,</div><div class='ctx'> 			  priv-&gt;addr + FWPBFCSDC(GWCA_INDEX, i));</div><div class='del'>-		iowrite32(BIT(priv-&gt;gwca.index), priv-&gt;addr + FWPBFC(i));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* For GWCA */</div><div class='del'>-	iowrite32(FWPC0_DEFAULT, priv-&gt;addr + FWPC0(priv-&gt;gwca.index));</div><div class='del'>-	iowrite32(FWPC1_DDE, priv-&gt;addr + FWPC1(priv-&gt;gwca.index));</div><div class='del'>-	iowrite32(0, priv-&gt;addr + FWPBFC(priv-&gt;gwca.index));</div><div class='del'>-	iowrite32(GENMASK(RSWITCH_NUM_PORTS - 1, 0), priv-&gt;addr + FWPBFC(priv-&gt;gwca.index));</div><div class='add'>+	/* For GWCA port, allow direct descriptor forwarding */</div><div class='add'>+	rswitch_modify(priv-&gt;addr, FWPC1(priv-&gt;gwca.index), FWPC1_DDE, FWPC1_DDE);</div><div class='add'>+</div><div class='add'>+	/* Initialize hardware L2 forwarding table */</div><div class='add'>+</div><div class='add'>+	/* Allow entire table to be used for "unsecure" entries */</div><div class='add'>+	rswitch_modify(priv-&gt;addr, FWMACHEC, 0, FWMACHEC_MACHMUE_MASK);</div><div class='add'>+</div><div class='add'>+	/* Initialize MAC hash table */</div><div class='add'>+	iowrite32(FWMACTIM_MACTIOG, priv-&gt;addr + FWMACTIM);</div><div class='add'>+</div><div class='add'>+	return rswitch_reg_wait(priv-&gt;addr, FWMACTIM, FWMACTIM_MACTIOG, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Gateway CPU agent block (GWCA) */</div><div class='hunk'>@@ -547,7 +582,6 @@ static int rswitch_gwca_ts_queue_alloc(struct rswitch_private *priv)</div><div class='ctx'> 	desc = &amp;gq-&gt;ts_ring[gq-&gt;ring_size];</div><div class='ctx'> 	desc-&gt;desc.die_dt = DT_LINKFIX;</div><div class='ctx'> 	rswitch_desc_set_dptr(&amp;desc-&gt;desc, gq-&gt;ring_dma);</div><div class='del'>-	INIT_LIST_HEAD(&amp;priv-&gt;gwca.ts_info_list);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -811,7 +845,7 @@ static bool rswitch_rx(struct net_device *ndev, int *quota)</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='del'>-		get_ts = rdev-&gt;priv-&gt;ptp_priv-&gt;tstamp_rx_ctrl &amp; RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT;</div><div class='add'>+		get_ts = rdev-&gt;priv-&gt;tstamp_rx_ctrl != HWTSTAMP_FILTER_NONE;</div><div class='ctx'> 		if (get_ts) {</div><div class='ctx'> 			struct skb_shared_hwtstamps *shhwtstamps;</div><div class='ctx'> 			struct timespec64 ts;</div><div class='hunk'>@@ -862,13 +896,10 @@ static void rswitch_tx_free(struct net_device *ndev)</div><div class='ctx'> 	struct rswitch_ext_desc *desc;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='del'>-	for (; rswitch_get_num_cur_queues(gq) &gt; 0;</div><div class='del'>-	     gq-&gt;dirty = rswitch_next_queue_index(gq, false, 1)) {</div><div class='del'>-		desc = &amp;gq-&gt;tx_ring[gq-&gt;dirty];</div><div class='del'>-		if ((desc-&gt;desc.die_dt &amp; DT_MASK) != DT_FEMPTY)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='add'>+	desc = &amp;gq-&gt;tx_ring[gq-&gt;dirty];</div><div class='add'>+	while ((desc-&gt;desc.die_dt &amp; DT_MASK) == DT_FEMPTY) {</div><div class='ctx'> 		dma_rmb();</div><div class='add'>+</div><div class='ctx'> 		skb = gq-&gt;skbs[gq-&gt;dirty];</div><div class='ctx'> 		if (skb) {</div><div class='ctx'> 			rdev-&gt;ndev-&gt;stats.tx_packets++;</div><div class='hunk'>@@ -879,7 +910,10 @@ static void rswitch_tx_free(struct net_device *ndev)</div><div class='ctx'> 			dev_kfree_skb_any(gq-&gt;skbs[gq-&gt;dirty]);</div><div class='ctx'> 			gq-&gt;skbs[gq-&gt;dirty] = NULL;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		desc-&gt;desc.die_dt = DT_EEMPTY;</div><div class='add'>+		gq-&gt;dirty = rswitch_next_queue_index(gq, false, 1);</div><div class='add'>+		desc = &amp;gq-&gt;tx_ring[gq-&gt;dirty];</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -908,8 +942,10 @@ retry:</div><div class='ctx'> </div><div class='ctx'> 	if (napi_complete_done(napi, budget - quota)) {</div><div class='ctx'> 		spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='del'>-		rswitch_enadis_data_irq(priv, rdev-&gt;tx_queue-&gt;index, true);</div><div class='del'>-		rswitch_enadis_data_irq(priv, rdev-&gt;rx_queue-&gt;index, true);</div><div class='add'>+		if (test_bit(rdev-&gt;port, priv-&gt;opened_ports)) {</div><div class='add'>+			rswitch_enadis_data_irq(priv, rdev-&gt;tx_queue-&gt;index, true);</div><div class='add'>+			rswitch_enadis_data_irq(priv, rdev-&gt;rx_queue-&gt;index, true);</div><div class='add'>+		}</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1001,9 +1037,10 @@ static int rswitch_gwca_request_irqs(struct rswitch_private *priv)</div><div class='ctx'> static void rswitch_ts(struct rswitch_private *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct rswitch_gwca_queue *gq = &amp;priv-&gt;gwca.ts_queue;</div><div class='del'>-	struct rswitch_gwca_ts_info *ts_info, *ts_info2;</div><div class='ctx'> 	struct skb_shared_hwtstamps shhwtstamps;</div><div class='ctx'> 	struct rswitch_ts_desc *desc;</div><div class='add'>+	struct rswitch_device *rdev;</div><div class='add'>+	struct sk_buff *ts_skb;</div><div class='ctx'> 	struct timespec64 ts;</div><div class='ctx'> 	unsigned int num;</div><div class='ctx'> 	u32 tag, port;</div><div class='hunk'>@@ -1013,23 +1050,28 @@ static void rswitch_ts(struct rswitch_private *priv)</div><div class='ctx'> 		dma_rmb();</div><div class='ctx'> </div><div class='ctx'> 		port = TS_DESC_DPN(__le32_to_cpu(desc-&gt;desc.dptrl));</div><div class='del'>-		tag = TS_DESC_TSUN(__le32_to_cpu(desc-&gt;desc.dptrl));</div><div class='del'>-</div><div class='del'>-		list_for_each_entry_safe(ts_info, ts_info2, &amp;priv-&gt;gwca.ts_info_list, list) {</div><div class='del'>-			if (!(ts_info-&gt;port == port &amp;&amp; ts_info-&gt;tag == tag))</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			memset(&amp;shhwtstamps, 0, sizeof(shhwtstamps));</div><div class='del'>-			ts.tv_sec = __le32_to_cpu(desc-&gt;ts_sec);</div><div class='del'>-			ts.tv_nsec = __le32_to_cpu(desc-&gt;ts_nsec &amp; cpu_to_le32(0x3fffffff));</div><div class='del'>-			shhwtstamps.hwtstamp = timespec64_to_ktime(ts);</div><div class='del'>-			skb_tstamp_tx(ts_info-&gt;skb, &amp;shhwtstamps);</div><div class='del'>-			dev_consume_skb_irq(ts_info-&gt;skb);</div><div class='del'>-			list_del(&amp;ts_info-&gt;list);</div><div class='del'>-			kfree(ts_info);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+		if (unlikely(port &gt;= RSWITCH_NUM_PORTS))</div><div class='add'>+			goto next;</div><div class='add'>+		rdev = priv-&gt;rdev[port];</div><div class='ctx'> </div><div class='add'>+		tag = TS_DESC_TSUN(__le32_to_cpu(desc-&gt;desc.dptrl));</div><div class='add'>+		if (unlikely(tag &gt;= TS_TAGS_PER_PORT))</div><div class='add'>+			goto next;</div><div class='add'>+		ts_skb = xchg(&amp;rdev-&gt;ts_skb[tag], NULL);</div><div class='add'>+		smp_mb(); /* order rdev-&gt;ts_skb[] read before bitmap update */</div><div class='add'>+		clear_bit(tag, rdev-&gt;ts_skb_used);</div><div class='add'>+</div><div class='add'>+		if (unlikely(!ts_skb))</div><div class='add'>+			goto next;</div><div class='add'>+</div><div class='add'>+		memset(&amp;shhwtstamps, 0, sizeof(shhwtstamps));</div><div class='add'>+		ts.tv_sec = __le32_to_cpu(desc-&gt;ts_sec);</div><div class='add'>+		ts.tv_nsec = __le32_to_cpu(desc-&gt;ts_nsec &amp; cpu_to_le32(0x3fffffff));</div><div class='add'>+		shhwtstamps.hwtstamp = timespec64_to_ktime(ts);</div><div class='add'>+		skb_tstamp_tx(ts_skb, &amp;shhwtstamps);</div><div class='add'>+		dev_consume_skb_irq(ts_skb);</div><div class='add'>+</div><div class='add'>+next:</div><div class='ctx'> 		gq-&gt;cur = rswitch_next_queue_index(gq, true, 1);</div><div class='ctx'> 		desc = &amp;gq-&gt;ts_ring[gq-&gt;cur];</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1114,32 +1156,47 @@ static int rswitch_etha_wait_link_verification(struct rswitch_etha *etha)</div><div class='ctx'> </div><div class='ctx'> static void rswitch_rmac_setting(struct rswitch_etha *etha, const u8 *mac)</div><div class='ctx'> {</div><div class='del'>-	u32 val;</div><div class='add'>+	u32 pis, lsc;</div><div class='ctx'> </div><div class='ctx'> 	rswitch_etha_write_mac_address(etha, mac);</div><div class='ctx'> </div><div class='add'>+	switch (etha-&gt;phy_interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+		pis = MPIC_PIS_GMII;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_5GBASER:</div><div class='add'>+		pis = MPIC_PIS_XGMII;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pis = FIELD_GET(MPIC_PIS, ioread32(etha-&gt;addr + MPIC));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (etha-&gt;speed) {</div><div class='ctx'> 	case 100:</div><div class='del'>-		val = MPIC_LSC_100M;</div><div class='add'>+		lsc = MPIC_LSC_100M;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1000:</div><div class='del'>-		val = MPIC_LSC_1G;</div><div class='add'>+		lsc = MPIC_LSC_1G;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 2500:</div><div class='del'>-		val = MPIC_LSC_2_5G;</div><div class='add'>+		lsc = MPIC_LSC_2_5G;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return;</div><div class='add'>+		lsc = FIELD_GET(MPIC_LSC, ioread32(etha-&gt;addr + MPIC));</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	iowrite32(MPIC_PIS_GMII | val, etha-&gt;addr + MPIC);</div><div class='add'>+	rswitch_modify(etha-&gt;addr, MPIC, MPIC_PIS | MPIC_LSC,</div><div class='add'>+		       FIELD_PREP(MPIC_PIS, pis) | FIELD_PREP(MPIC_LSC, lsc));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rswitch_etha_enable_mii(struct rswitch_etha *etha)</div><div class='ctx'> {</div><div class='del'>-	rswitch_modify(etha-&gt;addr, MPIC, MPIC_PSMCS_MASK | MPIC_PSMHT_MASK,</div><div class='del'>-		       MPIC_PSMCS(etha-&gt;psmcs) | MPIC_PSMHT(0x06));</div><div class='del'>-	rswitch_modify(etha-&gt;addr, MPSM, 0, MPSM_MFF_C45);</div><div class='add'>+	rswitch_modify(etha-&gt;addr, MPIC, MPIC_PSMCS | MPIC_PSMHT,</div><div class='add'>+		       FIELD_PREP(MPIC_PSMCS, etha-&gt;psmcs) |</div><div class='add'>+		       FIELD_PREP(MPIC_PSMHT, 0x06));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rswitch_etha_hw_init(struct rswitch_etha *etha, const u8 *mac)</div><div class='hunk'>@@ -1168,42 +1225,29 @@ static int rswitch_etha_hw_init(struct rswitch_etha *etha, const u8 *mac)</div><div class='ctx'> 	return rswitch_etha_change_mode(etha, EAMC_OPC_OPERATION);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rswitch_etha_set_access(struct rswitch_etha *etha, bool read,</div><div class='del'>-				   int phyad, int devad, int regad, int data)</div><div class='add'>+static int rswitch_etha_mpsm_op(struct rswitch_etha *etha, bool read,</div><div class='add'>+				unsigned int mmf, unsigned int pda,</div><div class='add'>+				unsigned int pra, unsigned int pop,</div><div class='add'>+				unsigned int prd)</div><div class='ctx'> {</div><div class='del'>-	int pop = read ? MDIO_READ_C45 : MDIO_WRITE_C45;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (devad == 0xffffffff)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	writel(MMIS1_CLEAR_FLAGS, etha-&gt;addr + MMIS1);</div><div class='del'>-</div><div class='del'>-	val = MPSM_PSME | MPSM_MFF_C45;</div><div class='del'>-	iowrite32((regad &lt;&lt; 16) | (devad &lt;&lt; 8) | (phyad &lt;&lt; 3) | val, etha-&gt;addr + MPSM);</div><div class='add'>+	val = MPSM_PSME |</div><div class='add'>+	      FIELD_PREP(MPSM_MFF, mmf) |</div><div class='add'>+	      FIELD_PREP(MPSM_PDA, pda) |</div><div class='add'>+	      FIELD_PREP(MPSM_PRA, pra) |</div><div class='add'>+	      FIELD_PREP(MPSM_POP, pop) |</div><div class='add'>+	      FIELD_PREP(MPSM_PRD, prd);</div><div class='add'>+	iowrite32(val, etha-&gt;addr + MPSM);</div><div class='ctx'> </div><div class='del'>-	ret = rswitch_reg_wait(etha-&gt;addr, MMIS1, MMIS1_PAACS, MMIS1_PAACS);</div><div class='add'>+	ret = rswitch_reg_wait(etha-&gt;addr, MPSM, MPSM_PSME, 0);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	rswitch_modify(etha-&gt;addr, MMIS1, MMIS1_PAACS, MMIS1_PAACS);</div><div class='del'>-</div><div class='ctx'> 	if (read) {</div><div class='del'>-		writel((pop &lt;&lt; 13) | (devad &lt;&lt; 8) | (phyad &lt;&lt; 3) | val, etha-&gt;addr + MPSM);</div><div class='del'>-</div><div class='del'>-		ret = rswitch_reg_wait(etha-&gt;addr, MMIS1, MMIS1_PRACS, MMIS1_PRACS);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret = (ioread32(etha-&gt;addr + MPSM) &amp; MPSM_PRD_MASK) &gt;&gt; 16;</div><div class='del'>-</div><div class='del'>-		rswitch_modify(etha-&gt;addr, MMIS1, MMIS1_PRACS, MMIS1_PRACS);</div><div class='del'>-	} else {</div><div class='del'>-		iowrite32((data &lt;&lt; 16) | (pop &lt;&lt; 13) | (devad &lt;&lt; 8) | (phyad &lt;&lt; 3) | val,</div><div class='del'>-			  etha-&gt;addr + MPSM);</div><div class='del'>-</div><div class='del'>-		ret = rswitch_reg_wait(etha-&gt;addr, MMIS1, MMIS1_PWACS, MMIS1_PWACS);</div><div class='add'>+		val = ioread32(etha-&gt;addr + MPSM);</div><div class='add'>+		ret = FIELD_GET(MPSM_PRD, val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1213,16 +1257,47 @@ static int rswitch_etha_mii_read_c45(struct mii_bus *bus, int addr, int devad,</div><div class='ctx'> 				     int regad)</div><div class='ctx'> {</div><div class='ctx'> 	struct rswitch_etha *etha = bus-&gt;priv;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	return rswitch_etha_set_access(etha, true, addr, devad, regad, 0);</div><div class='add'>+	ret = rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,</div><div class='add'>+				   MPSM_POP_ADDRESS, regad);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return rswitch_etha_mpsm_op(etha, true, MPSM_MMF_C45, addr, devad,</div><div class='add'>+				    MPSM_POP_READ_C45, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rswitch_etha_mii_write_c45(struct mii_bus *bus, int addr, int devad,</div><div class='ctx'> 				      int regad, u16 val)</div><div class='ctx'> {</div><div class='ctx'> 	struct rswitch_etha *etha = bus-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,</div><div class='add'>+				   MPSM_POP_ADDRESS, regad);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,</div><div class='add'>+				    MPSM_POP_WRITE, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rswitch_etha_mii_read_c22(struct mii_bus *bus, int phyad, int regad)</div><div class='add'>+{</div><div class='add'>+	struct rswitch_etha *etha = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return rswitch_etha_mpsm_op(etha, true, MPSM_MMF_C22, phyad, regad,</div><div class='add'>+				    MPSM_POP_READ_C22, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rswitch_etha_mii_write_c22(struct mii_bus *bus, int phyad,</div><div class='add'>+				      int regad, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct rswitch_etha *etha = bus-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	return rswitch_etha_set_access(etha, false, addr, devad, regad, val);</div><div class='add'>+	return rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C22, phyad, regad,</div><div class='add'>+				    MPSM_POP_WRITE, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Call of_node_put(port) after done */</div><div class='hunk'>@@ -1237,17 +1312,14 @@ static struct device_node *rswitch_get_port_node(struct rswitch_device *rdev)</div><div class='ctx'> 	if (!ports)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	for_each_child_of_node(ports, port) {</div><div class='add'>+	for_each_available_child_of_node(ports, port) {</div><div class='ctx'> 		err = of_property_read_u32(port, "reg", &amp;index);</div><div class='ctx'> 		if (err &lt; 0) {</div><div class='ctx'> 			port = NULL;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='del'>-		if (index == rdev-&gt;etha-&gt;index) {</div><div class='del'>-			if (!of_device_is_available(port))</div><div class='del'>-				port = NULL;</div><div class='add'>+		if (index == rdev-&gt;etha-&gt;index)</div><div class='ctx'> 			break;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -1307,6 +1379,8 @@ static int rswitch_mii_register(struct rswitch_device *rdev)</div><div class='ctx'> 	mii_bus-&gt;priv = rdev-&gt;etha;</div><div class='ctx'> 	mii_bus-&gt;read_c45 = rswitch_etha_mii_read_c45;</div><div class='ctx'> 	mii_bus-&gt;write_c45 = rswitch_etha_mii_write_c45;</div><div class='add'>+	mii_bus-&gt;read = rswitch_etha_mii_read_c22;</div><div class='add'>+	mii_bus-&gt;write = rswitch_etha_mii_write_c22;</div><div class='ctx'> 	mii_bus-&gt;parent = &amp;rdev-&gt;priv-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	mdio_np = of_get_child_by_name(rdev-&gt;np_port, "mdio");</div><div class='hunk'>@@ -1527,7 +1601,7 @@ static void rswitch_ether_port_deinit_all(struct rswitch_private *priv)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; RSWITCH_NUM_PORTS; i++) {</div><div class='add'>+	rswitch_for_each_enabled_port(priv, i) {</div><div class='ctx'> 		phy_exit(priv-&gt;rdev[i]-&gt;serdes);</div><div class='ctx'> 		rswitch_ether_port_deinit_one(priv-&gt;rdev[i]);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1538,54 +1612,61 @@ static int rswitch_open(struct net_device *ndev)</div><div class='ctx'> 	struct rswitch_device *rdev = netdev_priv(ndev);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	phy_start(ndev-&gt;phydev);</div><div class='add'>+	if (bitmap_empty(rdev-&gt;priv-&gt;opened_ports, RSWITCH_NUM_PORTS))</div><div class='add'>+		iowrite32(GWCA_TS_IRQ_BIT, rdev-&gt;priv-&gt;addr + GWTSDIE);</div><div class='ctx'> </div><div class='ctx'> 	napi_enable(&amp;rdev-&gt;napi);</div><div class='del'>-	netif_start_queue(ndev);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;rdev-&gt;priv-&gt;lock, flags);</div><div class='add'>+	bitmap_set(rdev-&gt;priv-&gt;opened_ports, rdev-&gt;port, 1);</div><div class='ctx'> 	rswitch_enadis_data_irq(rdev-&gt;priv, rdev-&gt;tx_queue-&gt;index, true);</div><div class='ctx'> 	rswitch_enadis_data_irq(rdev-&gt;priv, rdev-&gt;rx_queue-&gt;index, true);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;rdev-&gt;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	if (bitmap_empty(rdev-&gt;priv-&gt;opened_ports, RSWITCH_NUM_PORTS))</div><div class='del'>-		iowrite32(GWCA_TS_IRQ_BIT, rdev-&gt;priv-&gt;addr + GWTSDIE);</div><div class='add'>+	phy_start(ndev-&gt;phydev);</div><div class='ctx'> </div><div class='del'>-	bitmap_set(rdev-&gt;priv-&gt;opened_ports, rdev-&gt;port, 1);</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+	if (rdev-&gt;brdev)</div><div class='add'>+		rswitch_update_l2_offload(rdev-&gt;priv);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-};</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int rswitch_stop(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct rswitch_device *rdev = netdev_priv(ndev);</div><div class='del'>-	struct rswitch_gwca_ts_info *ts_info, *ts_info2;</div><div class='add'>+	struct sk_buff *ts_skb;</div><div class='ctx'> 	unsigned long flags;</div><div class='add'>+	unsigned int tag;</div><div class='ctx'> </div><div class='ctx'> 	netif_tx_stop_all_queues(ndev);</div><div class='del'>-	bitmap_clear(rdev-&gt;priv-&gt;opened_ports, rdev-&gt;port, 1);</div><div class='ctx'> </div><div class='del'>-	if (bitmap_empty(rdev-&gt;priv-&gt;opened_ports, RSWITCH_NUM_PORTS))</div><div class='del'>-		iowrite32(GWCA_TS_IRQ_BIT, rdev-&gt;priv-&gt;addr + GWTSDID);</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(ts_info, ts_info2, &amp;rdev-&gt;priv-&gt;gwca.ts_info_list, list) {</div><div class='del'>-		if (ts_info-&gt;port != rdev-&gt;port)</div><div class='del'>-			continue;</div><div class='del'>-		dev_kfree_skb_irq(ts_info-&gt;skb);</div><div class='del'>-		list_del(&amp;ts_info-&gt;list);</div><div class='del'>-		kfree(ts_info);</div><div class='del'>-	}</div><div class='add'>+	phy_stop(ndev-&gt;phydev);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;rdev-&gt;priv-&gt;lock, flags);</div><div class='ctx'> 	rswitch_enadis_data_irq(rdev-&gt;priv, rdev-&gt;tx_queue-&gt;index, false);</div><div class='ctx'> 	rswitch_enadis_data_irq(rdev-&gt;priv, rdev-&gt;rx_queue-&gt;index, false);</div><div class='add'>+	bitmap_clear(rdev-&gt;priv-&gt;opened_ports, rdev-&gt;port, 1);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;rdev-&gt;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	phy_stop(ndev-&gt;phydev);</div><div class='ctx'> 	napi_disable(&amp;rdev-&gt;napi);</div><div class='ctx'> </div><div class='add'>+	if (rdev-&gt;brdev)</div><div class='add'>+		rswitch_update_l2_offload(rdev-&gt;priv);</div><div class='add'>+</div><div class='add'>+	if (bitmap_empty(rdev-&gt;priv-&gt;opened_ports, RSWITCH_NUM_PORTS))</div><div class='add'>+		iowrite32(GWCA_TS_IRQ_BIT, rdev-&gt;priv-&gt;addr + GWTSDID);</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(tag, rdev-&gt;ts_skb_used, TS_TAGS_PER_PORT) {</div><div class='add'>+		ts_skb = xchg(&amp;rdev-&gt;ts_skb[tag], NULL);</div><div class='add'>+		clear_bit(tag, rdev-&gt;ts_skb_used);</div><div class='add'>+		if (ts_skb)</div><div class='add'>+			dev_kfree_skb(ts_skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='del'>-};</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static bool rswitch_ext_desc_set_info1(struct rswitch_device *rdev,</div><div class='ctx'> 				       struct sk_buff *skb,</div><div class='hunk'>@@ -1594,20 +1675,17 @@ static bool rswitch_ext_desc_set_info1(struct rswitch_device *rdev,</div><div class='ctx'> 	desc-&gt;info1 = cpu_to_le64(INFO1_DV(BIT(rdev-&gt;etha-&gt;index)) |</div><div class='ctx'> 				  INFO1_IPV(GWCA_IPV_NUM) | INFO1_FMT);</div><div class='ctx'> 	if (skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP) {</div><div class='del'>-		struct rswitch_gwca_ts_info *ts_info;</div><div class='add'>+		unsigned int tag;</div><div class='ctx'> </div><div class='del'>-		ts_info = kzalloc(sizeof(*ts_info), GFP_ATOMIC);</div><div class='del'>-		if (!ts_info)</div><div class='add'>+		tag = find_first_zero_bit(rdev-&gt;ts_skb_used, TS_TAGS_PER_PORT);</div><div class='add'>+		if (tag == TS_TAGS_PER_PORT)</div><div class='ctx'> 			return false;</div><div class='add'>+		smp_mb(); /* order bitmap read before rdev-&gt;ts_skb[] write */</div><div class='add'>+		rdev-&gt;ts_skb[tag] = skb_get(skb);</div><div class='add'>+		set_bit(tag, rdev-&gt;ts_skb_used);</div><div class='ctx'> </div><div class='ctx'> 		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='del'>-		rdev-&gt;ts_tag++;</div><div class='del'>-		desc-&gt;info1 |= cpu_to_le64(INFO1_TSUN(rdev-&gt;ts_tag) | INFO1_TXC);</div><div class='del'>-</div><div class='del'>-		ts_info-&gt;skb = skb_get(skb);</div><div class='del'>-		ts_info-&gt;port = rdev-&gt;port;</div><div class='del'>-		ts_info-&gt;tag = rdev-&gt;ts_tag;</div><div class='del'>-		list_add_tail(&amp;ts_info-&gt;list, &amp;rdev-&gt;priv-&gt;gwca.ts_info_list);</div><div class='add'>+		desc-&gt;info1 |= cpu_to_le64(INFO1_TSUN(tag) | INFO1_TXC);</div><div class='ctx'> </div><div class='ctx'> 		skb_tx_timestamp(skb);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1681,8 +1759,11 @@ static netdev_tx_t rswitch_start_xmit(struct sk_buff *skb, struct net_device *nd</div><div class='ctx'> 	if (dma_mapping_error(ndev-&gt;dev.parent, dma_addr_orig))</div><div class='ctx'> 		goto err_kfree;</div><div class='ctx'> </div><div class='del'>-	gq-&gt;skbs[gq-&gt;cur] = skb;</div><div class='del'>-	gq-&gt;unmap_addrs[gq-&gt;cur] = dma_addr_orig;</div><div class='add'>+	/* Stored the skb at the last descriptor to avoid skb free before hardware completes send */</div><div class='add'>+	gq-&gt;skbs[(gq-&gt;cur + nr_desc - 1) % gq-&gt;ring_size] = skb;</div><div class='add'>+	gq-&gt;unmap_addrs[(gq-&gt;cur + nr_desc - 1) % gq-&gt;ring_size] = dma_addr_orig;</div><div class='add'>+</div><div class='add'>+	dma_wmb();</div><div class='ctx'> </div><div class='ctx'> 	/* DT_FSTART should be set at last. So, this is reverse order. */</div><div class='ctx'> 	for (i = nr_desc; i-- &gt; 0; ) {</div><div class='hunk'>@@ -1694,14 +1775,13 @@ static netdev_tx_t rswitch_start_xmit(struct sk_buff *skb, struct net_device *nd</div><div class='ctx'> 			goto err_unmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wmb();	/* gq-&gt;cur must be incremented after die_dt was set */</div><div class='del'>-</div><div class='ctx'> 	gq-&gt;cur = rswitch_next_queue_index(gq, true, nr_desc);</div><div class='ctx'> 	rswitch_modify(rdev-&gt;addr, GWTRC(gq-&gt;index), 0, BIT(gq-&gt;index % 32));</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> err_unmap:</div><div class='add'>+	gq-&gt;skbs[(gq-&gt;cur + nr_desc - 1) % gq-&gt;ring_size] = NULL;</div><div class='ctx'> 	dma_unmap_single(ndev-&gt;dev.parent, dma_addr_orig, skb-&gt;len, DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='ctx'> err_kfree:</div><div class='hunk'>@@ -1715,88 +1795,77 @@ static struct net_device_stats *rswitch_get_stats(struct net_device *ndev)</div><div class='ctx'> 	return &amp;ndev-&gt;stats;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rswitch_hwstamp_get(struct net_device *ndev, struct ifreq *req)</div><div class='add'>+static int rswitch_hwstamp_get(struct net_device *ndev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct rswitch_device *rdev = netdev_priv(ndev);</div><div class='del'>-	struct rcar_gen4_ptp_private *ptp_priv;</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-</div><div class='del'>-	ptp_priv = rdev-&gt;priv-&gt;ptp_priv;</div><div class='add'>+	struct rswitch_private *priv = rdev-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	config.flags = 0;</div><div class='del'>-	config.tx_type = ptp_priv-&gt;tstamp_tx_ctrl ? HWTSTAMP_TX_ON :</div><div class='del'>-						    HWTSTAMP_TX_OFF;</div><div class='del'>-	switch (ptp_priv-&gt;tstamp_rx_ctrl &amp; RCAR_GEN4_RXTSTAMP_TYPE) {</div><div class='del'>-	case RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT:</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='del'>-		break;</div><div class='del'>-	case RCAR_GEN4_RXTSTAMP_TYPE_ALL:</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	config-&gt;flags = 0;</div><div class='add'>+	config-&gt;tx_type = priv-&gt;tstamp_tx_ctrl;</div><div class='add'>+	config-&gt;rx_filter = priv-&gt;tstamp_rx_ctrl;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(req-&gt;ifr_data, &amp;config, sizeof(config)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rswitch_hwstamp_set(struct net_device *ndev, struct ifreq *req)</div><div class='add'>+static int rswitch_hwstamp_set(struct net_device *ndev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct rswitch_device *rdev = netdev_priv(ndev);</div><div class='del'>-	u32 tstamp_rx_ctrl = RCAR_GEN4_RXTSTAMP_ENABLED;</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-	u32 tstamp_tx_ctrl;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;config, req-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	enum hwtstamp_rx_filters tstamp_rx_ctrl;</div><div class='add'>+	enum hwtstamp_tx_types tstamp_tx_ctrl;</div><div class='ctx'> </div><div class='del'>-	if (config.flags)</div><div class='add'>+	if (config-&gt;flags)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='del'>-		tstamp_tx_ctrl = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='del'>-		tstamp_tx_ctrl = RCAR_GEN4_TXTSTAMP_ENABLED;</div><div class='add'>+		tstamp_tx_ctrl = config-&gt;tx_type;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='del'>-		tstamp_rx_ctrl = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='del'>-		tstamp_rx_ctrl |= RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT;</div><div class='add'>+		tstamp_rx_ctrl = config-&gt;rx_filter;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-		tstamp_rx_ctrl |= RCAR_GEN4_RXTSTAMP_TYPE_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		tstamp_rx_ctrl = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rdev-&gt;priv-&gt;ptp_priv-&gt;tstamp_tx_ctrl = tstamp_tx_ctrl;</div><div class='del'>-	rdev-&gt;priv-&gt;ptp_priv-&gt;tstamp_rx_ctrl = tstamp_rx_ctrl;</div><div class='add'>+	rdev-&gt;priv-&gt;tstamp_tx_ctrl = tstamp_tx_ctrl;</div><div class='add'>+	rdev-&gt;priv-&gt;tstamp_rx_ctrl = tstamp_rx_ctrl;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(req-&gt;ifr_data, &amp;config, sizeof(config)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rswitch_eth_ioctl(struct net_device *ndev, struct ifreq *req, int cmd)</div><div class='add'>+static int rswitch_get_port_parent_id(struct net_device *ndev,</div><div class='add'>+				      struct netdev_phys_item_id *ppid)</div><div class='ctx'> {</div><div class='del'>-	if (!netif_running(ndev))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	struct rswitch_device *rdev = netdev_priv(ndev);</div><div class='add'>+	const char *name;</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return rswitch_hwstamp_get(ndev, req);</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return rswitch_hwstamp_set(ndev, req);</div><div class='del'>-	default:</div><div class='del'>-		return phy_mii_ioctl(ndev-&gt;phydev, req, cmd);</div><div class='del'>-	}</div><div class='add'>+	name = dev_name(&amp;rdev-&gt;priv-&gt;pdev-&gt;dev);</div><div class='add'>+	ppid-&gt;id_len = min_t(size_t, strlen(name), sizeof(ppid-&gt;id));</div><div class='add'>+	memcpy(ppid-&gt;id, name, ppid-&gt;id_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rswitch_get_phys_port_name(struct net_device *ndev,</div><div class='add'>+				      char *name, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct rswitch_device *rdev = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	snprintf(name, len, "tsn%d", rdev-&gt;port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops rswitch_netdev_ops = {</div><div class='hunk'>@@ -1804,11 +1873,20 @@ static const struct net_device_ops rswitch_netdev_ops = {</div><div class='ctx'> 	.ndo_stop = rswitch_stop,</div><div class='ctx'> 	.ndo_start_xmit = rswitch_start_xmit,</div><div class='ctx'> 	.ndo_get_stats = rswitch_get_stats,</div><div class='del'>-	.ndo_eth_ioctl = rswitch_eth_ioctl,</div><div class='add'>+	.ndo_eth_ioctl = phy_do_ioctl_running,</div><div class='add'>+	.ndo_get_port_parent_id = rswitch_get_port_parent_id,</div><div class='add'>+	.ndo_get_phys_port_name = rswitch_get_phys_port_name,</div><div class='ctx'> 	.ndo_validate_addr = eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address = eth_mac_addr,</div><div class='add'>+	.ndo_hwtstamp_get = rswitch_hwstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = rswitch_hwstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+bool is_rdev(const struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	return (ndev-&gt;netdev_ops == &amp;rswitch_netdev_ops);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rswitch_get_ts_info(struct net_device *ndev, struct kernel_ethtool_ts_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct rswitch_device *rdev = netdev_priv(ndev);</div><div class='hunk'>@@ -1889,7 +1967,6 @@ static int rswitch_device_alloc(struct rswitch_private *priv, unsigned int index</div><div class='ctx'> 	rdev-&gt;np_port = rswitch_get_port_node(rdev);</div><div class='ctx'> 	rdev-&gt;disabled = !rdev-&gt;np_port;</div><div class='ctx'> 	err = of_get_ethdev_address(rdev-&gt;np_port, ndev);</div><div class='del'>-	of_node_put(rdev-&gt;np_port);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		if (is_valid_ether_addr(rdev-&gt;etha-&gt;mac_addr))</div><div class='ctx'> 			eth_hw_addr_set(ndev, rdev-&gt;etha-&gt;mac_addr);</div><div class='hunk'>@@ -1901,9 +1978,6 @@ static int rswitch_device_alloc(struct rswitch_private *priv, unsigned int index</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto out_get_params;</div><div class='ctx'> </div><div class='del'>-	if (rdev-&gt;priv-&gt;gwca.speed &lt; rdev-&gt;etha-&gt;speed)</div><div class='del'>-		rdev-&gt;priv-&gt;gwca.speed = rdev-&gt;etha-&gt;speed;</div><div class='del'>-</div><div class='ctx'> 	err = rswitch_rxdmac_alloc(ndev);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto out_rxdmac;</div><div class='hunk'>@@ -1912,6 +1986,8 @@ static int rswitch_device_alloc(struct rswitch_private *priv, unsigned int index</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto out_txdmac;</div><div class='ctx'> </div><div class='add'>+	list_add_tail(&amp;rdev-&gt;list, &amp;priv-&gt;port_list);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_txdmac:</div><div class='hunk'>@@ -1919,6 +1995,7 @@ out_txdmac:</div><div class='ctx'> </div><div class='ctx'> out_rxdmac:</div><div class='ctx'> out_get_params:</div><div class='add'>+	of_node_put(rdev-&gt;np_port);</div><div class='ctx'> 	netif_napi_del(&amp;rdev-&gt;napi);</div><div class='ctx'> 	free_netdev(ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -1930,8 +2007,10 @@ static void rswitch_device_free(struct rswitch_private *priv, unsigned int index</div><div class='ctx'> 	struct rswitch_device *rdev = priv-&gt;rdev[index];</div><div class='ctx'> 	struct net_device *ndev = rdev-&gt;ndev;</div><div class='ctx'> </div><div class='add'>+	list_del(&amp;rdev-&gt;list);</div><div class='ctx'> 	rswitch_txdmac_free(ndev);</div><div class='ctx'> 	rswitch_rxdmac_free(ndev);</div><div class='add'>+	of_node_put(rdev-&gt;np_port);</div><div class='ctx'> 	netif_napi_del(&amp;rdev-&gt;napi);</div><div class='ctx'> 	free_netdev(ndev);</div><div class='ctx'> }</div><div class='hunk'>@@ -1975,10 +2054,11 @@ static int rswitch_init(struct rswitch_private *priv)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rswitch_fwd_init(priv);</div><div class='add'>+	err = rswitch_fwd_init(priv);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_fwd_init;</div><div class='ctx'> </div><div class='del'>-	err = rcar_gen4_ptp_register(priv-&gt;ptp_priv, RCAR_GEN4_PTP_REG_LAYOUT,</div><div class='del'>-				     clk_get_rate(priv-&gt;clk));</div><div class='add'>+	err = rcar_gen4_ptp_register(priv-&gt;ptp_priv, clk_get_rate(priv-&gt;clk));</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto err_ptp_register;</div><div class='ctx'> </div><div class='hunk'>@@ -2024,6 +2104,7 @@ err_gwca_ts_request_irq:</div><div class='ctx'> err_gwca_request_irq:</div><div class='ctx'> 	rcar_gen4_ptp_unregister(priv-&gt;ptp_priv);</div><div class='ctx'> </div><div class='add'>+err_fwd_init:</div><div class='ctx'> err_ptp_register:</div><div class='ctx'> 	for (i = 0; i &lt; RSWITCH_NUM_PORTS; i++)</div><div class='ctx'> 		rswitch_device_free(priv, i);</div><div class='hunk'>@@ -2058,6 +2139,7 @@ static int renesas_eth_sw_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*priv), GFP_KERNEL);</div><div class='ctx'> 	if (!priv)</div><div class='ctx'> 		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;clk = devm_clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='hunk'>@@ -2078,7 +2160,7 @@ static int renesas_eth_sw_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (IS_ERR(priv-&gt;addr))</div><div class='ctx'> 		return PTR_ERR(priv-&gt;addr);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;ptp_priv-&gt;addr = priv-&gt;addr + RCAR_GEN4_GPTP_OFFSET_S4;</div><div class='add'>+	priv-&gt;ptp_priv-&gt;addr = priv-&gt;addr + RSWITCH_GPTP_OFFSET_S4;</div><div class='ctx'> </div><div class='ctx'> 	ret = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(40));</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='hunk'>@@ -2095,6 +2177,8 @@ static int renesas_eth_sw_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!priv-&gt;gwca.queues)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	INIT_LIST_HEAD(&amp;priv-&gt;port_list);</div><div class='add'>+</div><div class='ctx'> 	pm_runtime_enable(&amp;pdev-&gt;dev);</div><div class='ctx'> 	pm_runtime_get_sync(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='hunk'>@@ -2105,6 +2189,15 @@ static int renesas_eth_sw_probe(struct platform_device *pdev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (list_empty(&amp;priv-&gt;port_list))</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev, "could not initialize any ports\n");</div><div class='add'>+</div><div class='add'>+	ret = rswitch_register_notifiers();</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "could not register notifiers\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	device_set_wakeup_capable(&amp;pdev-&gt;dev, 1);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2138,6 +2231,7 @@ static void renesas_eth_sw_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct rswitch_private *priv = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='add'>+	rswitch_unregister_notifiers();</div><div class='ctx'> 	rswitch_deinit(priv);</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_put(&amp;pdev-&gt;dev);</div><div class='head'>diff --git a/drivers/net/ethernet/renesas/rtsn.c b/drivers/net/ethernet/renesas/rtsn.c<br/>index 6b3f7fca8d15..fdb1e7b7fb06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rtsn.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/rtsn.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/rtsn.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/rtsn.c</a></div><div class='hunk'>@@ -62,6 +62,9 @@ struct rtsn_private {</div><div class='ctx'> </div><div class='ctx'> 	int tx_data_irq;</div><div class='ctx'> 	int rx_data_irq;</div><div class='add'>+</div><div class='add'>+	u32 tstamp_tx_ctrl;</div><div class='add'>+	u32 tstamp_rx_ctrl;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u32 rtsn_read(struct rtsn_private *priv, enum rtsn_reg reg)</div><div class='hunk'>@@ -162,8 +165,7 @@ static int rtsn_rx(struct net_device *ndev, int budget)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	bool get_ts;</div><div class='ctx'> </div><div class='del'>-	get_ts = priv-&gt;ptp_priv-&gt;tstamp_rx_ctrl &amp;</div><div class='del'>-		RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT;</div><div class='add'>+	get_ts = priv-&gt;tstamp_rx_ctrl != HWTSTAMP_FILTER_NONE;</div><div class='ctx'> </div><div class='ctx'> 	ndescriptors = priv-&gt;dirty_rx + priv-&gt;num_rx_ring - priv-&gt;cur_rx;</div><div class='ctx'> 	rx_packets = 0;</div><div class='hunk'>@@ -1122,31 +1124,16 @@ static int rtsn_do_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd)</div><div class='ctx'> static int rtsn_hwtstamp_get(struct net_device *ndev,</div><div class='ctx'> 			     struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='del'>-	struct rcar_gen4_ptp_private *ptp_priv;</div><div class='ctx'> 	struct rtsn_private *priv;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(ndev);</div><div class='del'>-	ptp_priv = priv-&gt;ptp_priv;</div><div class='ctx'> </div><div class='ctx'> 	config-&gt;flags = 0;</div><div class='del'>-</div><div class='del'>-	config-&gt;tx_type =</div><div class='del'>-		ptp_priv-&gt;tstamp_tx_ctrl ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='del'>-</div><div class='del'>-	switch (ptp_priv-&gt;tstamp_rx_ctrl &amp; RCAR_GEN4_RXTSTAMP_TYPE) {</div><div class='del'>-	case RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT:</div><div class='del'>-		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='del'>-		break;</div><div class='del'>-	case RCAR_GEN4_RXTSTAMP_TYPE_ALL:</div><div class='del'>-		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	config-&gt;tx_type = priv-&gt;tstamp_tx_ctrl;</div><div class='add'>+	config-&gt;rx_filter = priv-&gt;tstamp_rx_ctrl;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1155,26 +1142,22 @@ static int rtsn_hwtstamp_set(struct net_device *ndev,</div><div class='ctx'> 			     struct kernel_hwtstamp_config *config,</div><div class='ctx'> 			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct rcar_gen4_ptp_private *ptp_priv;</div><div class='add'>+	enum hwtstamp_rx_filters tstamp_rx_ctrl;</div><div class='add'>+	enum hwtstamp_tx_types tstamp_tx_ctrl;</div><div class='ctx'> 	struct rtsn_private *priv;</div><div class='del'>-	u32 tstamp_rx_ctrl;</div><div class='del'>-	u32 tstamp_tx_ctrl;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(ndev);</div><div class='del'>-	ptp_priv = priv-&gt;ptp_priv;</div><div class='ctx'> </div><div class='ctx'> 	if (config-&gt;flags)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='del'>-		tstamp_tx_ctrl = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='del'>-		tstamp_tx_ctrl = RCAR_GEN4_TXTSTAMP_ENABLED;</div><div class='add'>+		tstamp_tx_ctrl = config-&gt;tx_type;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='hunk'>@@ -1182,21 +1165,17 @@ static int rtsn_hwtstamp_set(struct net_device *ndev,</div><div class='ctx'> </div><div class='ctx'> 	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='del'>-		tstamp_rx_ctrl = 0;</div><div class='del'>-		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='del'>-		tstamp_rx_ctrl = RCAR_GEN4_RXTSTAMP_ENABLED |</div><div class='del'>-			RCAR_GEN4_RXTSTAMP_TYPE_V2_L2_EVENT;</div><div class='add'>+		tstamp_rx_ctrl = config-&gt;rx_filter;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='del'>-		tstamp_rx_ctrl = RCAR_GEN4_RXTSTAMP_ENABLED |</div><div class='del'>-			RCAR_GEN4_RXTSTAMP_TYPE_ALL;</div><div class='add'>+		tstamp_rx_ctrl = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ptp_priv-&gt;tstamp_tx_ctrl = tstamp_tx_ctrl;</div><div class='del'>-	ptp_priv-&gt;tstamp_rx_ctrl = tstamp_rx_ctrl;</div><div class='add'>+	priv-&gt;tstamp_tx_ctrl = tstamp_tx_ctrl;</div><div class='add'>+	priv-&gt;tstamp_rx_ctrl = tstamp_rx_ctrl;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1259,7 +1238,12 @@ static int rtsn_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv = netdev_priv(ndev);</div><div class='ctx'> 	priv-&gt;pdev = pdev;</div><div class='ctx'> 	priv-&gt;ndev = ndev;</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;ptp_priv = rcar_gen4_ptp_alloc(pdev);</div><div class='add'>+	if (!priv-&gt;ptp_priv) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_free;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;lock);</div><div class='ctx'> 	platform_set_drvdata(pdev, priv);</div><div class='hunk'>@@ -1325,8 +1309,7 @@ static int rtsn_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	device_set_wakeup_capable(&amp;pdev-&gt;dev, 1);</div><div class='ctx'> </div><div class='del'>-	ret = rcar_gen4_ptp_register(priv-&gt;ptp_priv, RCAR_GEN4_PTP_REG_LAYOUT,</div><div class='del'>-				     clk_get_rate(priv-&gt;clk));</div><div class='add'>+	ret = rcar_gen4_ptp_register(priv-&gt;ptp_priv, clk_get_rate(priv-&gt;clk));</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto error_pm;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c<br/>index 8887b8921009..6fb0ffc1c844 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/sh_eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/renesas/sh_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/renesas/sh_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/renesas/sh_eth.c</a></div><div class='hunk'>@@ -2233,7 +2233,7 @@ static void sh_eth_get_regs(struct net_device *ndev, struct ethtool_regs *regs,</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_get_sync(&amp;mdp-&gt;pdev-&gt;dev);</div><div class='ctx'> 	__sh_eth_get_regs(ndev, buf);</div><div class='del'>-	pm_runtime_put_sync(&amp;mdp-&gt;pdev-&gt;dev);</div><div class='add'>+	pm_runtime_put(&amp;mdp-&gt;pdev-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 sh_eth_get_msglevel(struct net_device *ndev)</div><div class='hunk'>@@ -2360,6 +2360,7 @@ static int sh_eth_set_ringparam(struct net_device *ndev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='ctx'> static void sh_eth_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='ctx'> 	struct sh_eth_private *mdp = netdev_priv(ndev);</div><div class='hunk'>@@ -2386,6 +2387,7 @@ static int sh_eth_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops sh_eth_ethtool_ops = {</div><div class='ctx'> 	.get_regs_len	= sh_eth_get_regs_len,</div><div class='hunk'>@@ -2401,8 +2403,10 @@ static const struct ethtool_ops sh_eth_ethtool_ops = {</div><div class='ctx'> 	.set_ringparam	= sh_eth_set_ringparam,</div><div class='ctx'> 	.get_link_ksettings = phy_ethtool_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings = phy_ethtool_set_link_ksettings,</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='ctx'> 	.get_wol	= sh_eth_get_wol,</div><div class='ctx'> 	.set_wol	= sh_eth_set_wol,</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* network device open function */</div><div class='hunk'>@@ -2447,7 +2451,7 @@ out_free_irq:</div><div class='ctx'> 	free_irq(ndev-&gt;irq, ndev);</div><div class='ctx'> out_napi_off:</div><div class='ctx'> 	napi_disable(&amp;mdp-&gt;napi);</div><div class='del'>-	pm_runtime_put_sync(&amp;mdp-&gt;pdev-&gt;dev);</div><div class='add'>+	pm_runtime_put(&amp;mdp-&gt;pdev-&gt;dev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3443,8 +3447,6 @@ static void sh_eth_drv_remove(struct platform_device *pdev)</div><div class='ctx'> 	free_netdev(ndev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-#ifdef CONFIG_PM_SLEEP</div><div class='ctx'> static int sh_eth_wol_setup(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sh_eth_private *mdp = netdev_priv(ndev);</div><div class='hunk'>@@ -3494,10 +3496,12 @@ static int sh_eth_suspend(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(ndev);</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='ctx'> 	if (mdp-&gt;wol_enabled)</div><div class='ctx'> 		ret = sh_eth_wol_setup(ndev);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = sh_eth_close(ndev);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -3511,10 +3515,12 @@ static int sh_eth_resume(struct device *dev)</div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='ctx'> 	if (mdp-&gt;wol_enabled)</div><div class='ctx'> 		ret = sh_eth_wol_restore(ndev);</div><div class='ctx'> 	else</div><div class='ctx'> 		ret = sh_eth_open(ndev);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -3523,28 +3529,8 @@ static int sh_eth_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int sh_eth_runtime_nop(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	/* Runtime PM callback shared between -&gt;runtime_suspend()</div><div class='del'>-	 * and -&gt;runtime_resume(). Simply returns success.</div><div class='del'>-	 *</div><div class='del'>-	 * This driver re-initializes all registers after</div><div class='del'>-	 * pm_runtime_get_sync() anyway so there is no need</div><div class='del'>-	 * to save and restore registers here.</div><div class='del'>-	 */</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static const struct dev_pm_ops sh_eth_dev_pm_ops = {</div><div class='del'>-	SET_SYSTEM_SLEEP_PM_OPS(sh_eth_suspend, sh_eth_resume)</div><div class='del'>-	SET_RUNTIME_PM_OPS(sh_eth_runtime_nop, sh_eth_runtime_nop, NULL)</div><div class='del'>-};</div><div class='del'>-#define SH_ETH_PM_OPS (&amp;sh_eth_dev_pm_ops)</div><div class='del'>-#else</div><div class='del'>-#define SH_ETH_PM_OPS NULL</div><div class='del'>-#endif</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(sh_eth_dev_pm_ops, sh_eth_suspend, sh_eth_resume);</div><div class='ctx'> </div><div class='ctx'> static const struct platform_device_id sh_eth_id_table[] = {</div><div class='ctx'> 	{ "sh7619-ether", (kernel_ulong_t)&amp;sh7619_data },</div><div class='hunk'>@@ -3564,7 +3550,7 @@ static struct platform_driver sh_eth_driver = {</div><div class='ctx'> 	.id_table = sh_eth_id_table,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		   .name = CARDNAME,</div><div class='del'>-		   .pm = SH_ETH_PM_OPS,</div><div class='add'>+		   .pm = pm_sleep_ptr(&amp;sh_eth_dev_pm_ops),</div><div class='ctx'> 		   .of_match_table = of_match_ptr(sh_eth_match_table),</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/rocker/rocker_main.c b/drivers/net/ethernet/rocker/rocker_main.c<br/>index 84fa911c78db..36af94a2e062 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/rocker/rocker_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/rocker/rocker_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/rocker/rocker_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/rocker/rocker_main.c</a></div><div class='hunk'>@@ -2502,7 +2502,7 @@ static void rocker_carrier_init(const struct rocker_port *rocker_port)</div><div class='ctx'> 	u64 link_status = rocker_read64(rocker, PORT_PHYS_LINK_STATUS);</div><div class='ctx'> 	bool link_up;</div><div class='ctx'> </div><div class='del'>-	link_up = link_status &amp; (1 &lt;&lt; rocker_port-&gt;pport);</div><div class='add'>+	link_up = link_status &amp; (1ULL &lt;&lt; rocker_port-&gt;pport);</div><div class='ctx'> 	if (link_up)</div><div class='ctx'> 		netif_carrier_on(rocker_port-&gt;dev);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -2576,7 +2576,7 @@ static int rocker_probe_port(struct rocker *rocker, unsigned int port_number)</div><div class='ctx'> 	rocker_carrier_init(rocker_port);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;features |= NETIF_F_SG;</div><div class='del'>-	dev-&gt;netns_local = true;</div><div class='add'>+	dev-&gt;netns_immutable = true;</div><div class='ctx'> </div><div class='ctx'> 	/* MTU range: 68 - 9000 */</div><div class='ctx'> 	dev-&gt;min_mtu = ROCKER_PORT_MIN_MTU;</div><div class='head'>diff --git a/drivers/net/ethernet/rocker/rocker_ofdpa.c b/drivers/net/ethernet/rocker/rocker_ofdpa.c<br/>index 826990459fa4..61e50517c05b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/rocker/rocker_ofdpa.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/rocker/rocker_ofdpa.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/rocker/rocker_ofdpa.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/rocker/rocker_ofdpa.c</a></div><div class='hunk'>@@ -1933,7 +1933,7 @@ static int ofdpa_port_fdb(struct ofdpa_port *ofdpa_port,</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;ofdpa-&gt;fdb_tbl_lock, lock_flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Check if adding and already exists, or removing and can't find */</div><div class='del'>-	if (!found != !removing) {</div><div class='add'>+	if (!found == removing) {</div><div class='ctx'> 		kfree(fdb);</div><div class='ctx'> 		if (!found &amp;&amp; removing)</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -1982,7 +1982,7 @@ err_out:</div><div class='ctx'> </div><div class='ctx'> static void ofdpa_fdb_cleanup(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ofdpa *ofdpa = from_timer(ofdpa, t, fdb_cleanup_timer);</div><div class='add'>+	struct ofdpa *ofdpa = timer_container_of(ofdpa, t, fdb_cleanup_timer);</div><div class='ctx'> 	struct ofdpa_port *ofdpa_port;</div><div class='ctx'> 	struct ofdpa_fdb_tbl_entry *entry;</div><div class='ctx'> 	struct hlist_node *tmp;</div><div class='hunk'>@@ -2386,7 +2386,7 @@ static void ofdpa_fini(struct rocker *rocker)</div><div class='ctx'> 	struct hlist_node *tmp;</div><div class='ctx'> 	int bkt;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ofdpa-&gt;fdb_cleanup_timer);</div><div class='add'>+	timer_delete_sync(&amp;ofdpa-&gt;fdb_cleanup_timer);</div><div class='ctx'> 	flush_workqueue(rocker-&gt;rocker_owq);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ofdpa-&gt;flow_tbl_lock, flags);</div><div class='head'>diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c<br/>index 4a439b34114d..ad73733644f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c</a></div><div class='hunk'>@@ -308,8 +308,8 @@ static int sxgbe_set_coalesce(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sxgbe_get_rss_hash_opts(struct sxgbe_priv_data *priv,</div><div class='del'>-				   struct ethtool_rxnfc *cmd)</div><div class='add'>+static int sxgbe_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 struct ethtool_rxfh_fields *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	cmd-&gt;data = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -344,26 +344,11 @@ static int sxgbe_get_rss_hash_opts(struct sxgbe_priv_data *priv,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sxgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='del'>-			   u32 *rule_locs)</div><div class='add'>+static int sxgbe_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+				 const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct sxgbe_priv_data *priv = netdev_priv(dev);</div><div class='del'>-	int ret = -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ret = sxgbe_get_rss_hash_opts(priv, cmd);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sxgbe_set_rss_hash_opt(struct sxgbe_priv_data *priv,</div><div class='del'>-				  struct ethtool_rxnfc *cmd)</div><div class='del'>-{</div><div class='ctx'> 	u32 reg_val = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* RSS does not support anything other than hashing</div><div class='hunk'>@@ -421,22 +406,6 @@ static int sxgbe_set_rss_hash_opt(struct sxgbe_priv_data *priv,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sxgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='del'>-{</div><div class='del'>-	struct sxgbe_priv_data *priv = netdev_priv(dev);</div><div class='del'>-	int ret = -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = sxgbe_set_rss_hash_opt(priv, cmd);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void sxgbe_get_regs(struct net_device *dev,</div><div class='ctx'> 			   struct ethtool_regs *regs, void *space)</div><div class='ctx'> {</div><div class='hunk'>@@ -489,8 +458,8 @@ static const struct ethtool_ops sxgbe_ethtool_ops = {</div><div class='ctx'> 	.get_channels = sxgbe_get_channels,</div><div class='ctx'> 	.get_coalesce = sxgbe_get_coalesce,</div><div class='ctx'> 	.set_coalesce = sxgbe_set_coalesce,</div><div class='del'>-	.get_rxnfc = sxgbe_get_rxnfc,</div><div class='del'>-	.set_rxnfc = sxgbe_set_rxnfc,</div><div class='add'>+	.get_rxfh_fields = sxgbe_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields = sxgbe_set_rxfh_fields,</div><div class='ctx'> 	.get_regs = sxgbe_get_regs,</div><div class='ctx'> 	.get_regs_len = sxgbe_get_regs_len,</div><div class='ctx'> 	.get_eee = sxgbe_get_eee,</div><div class='head'>diff --git a/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c b/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c<br/>index 12c8396b6942..849c5a6c2af1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c</a></div><div class='hunk'>@@ -91,7 +91,7 @@ void sxgbe_disable_eee_mode(struct sxgbe_priv_data * const priv)</div><div class='ctx'> {</div><div class='ctx'> 	/* Exit and disable EEE in case of we are in LPI state. */</div><div class='ctx'> 	priv-&gt;hw-&gt;mac-&gt;reset_eee_mode(priv-&gt;ioaddr);</div><div class='del'>-	del_timer_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='ctx'> 	priv-&gt;tx_path_in_lpi_mode = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -104,7 +104,8 @@ void sxgbe_disable_eee_mode(struct sxgbe_priv_data * const priv)</div><div class='ctx'>  */</div><div class='ctx'> static void sxgbe_eee_ctrl_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sxgbe_priv_data *priv = from_timer(priv, t, eee_ctrl_timer);</div><div class='add'>+	struct sxgbe_priv_data *priv = timer_container_of(priv, t,</div><div class='add'>+							  eee_ctrl_timer);</div><div class='ctx'> </div><div class='ctx'> 	sxgbe_enable_eee_mode(priv);</div><div class='ctx'> 	mod_timer(&amp;priv-&gt;eee_ctrl_timer, SXGBE_LPI_TIMER(eee_timer));</div><div class='hunk'>@@ -1012,7 +1013,7 @@ static void sxgbe_disable_mtl_engine(struct sxgbe_priv_data *priv)</div><div class='ctx'>  */</div><div class='ctx'> static void sxgbe_tx_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sxgbe_tx_queue *p = from_timer(p, t, txtimer);</div><div class='add'>+	struct sxgbe_tx_queue *p = timer_container_of(p, t, txtimer);</div><div class='ctx'> 	sxgbe_tx_queue_clean(p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1044,7 +1045,7 @@ static void sxgbe_tx_del_timer(struct sxgbe_priv_data *priv)</div><div class='ctx'> </div><div class='ctx'> 	SXGBE_FOR_EACH_QUEUE(SXGBE_TX_QUEUES, queue_num) {</div><div class='ctx'> 		struct sxgbe_tx_queue *p = priv-&gt;txq[queue_num];</div><div class='del'>-		del_timer_sync(&amp;p-&gt;txtimer);</div><div class='add'>+		timer_delete_sync(&amp;p-&gt;txtimer);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1208,7 +1209,7 @@ static int sxgbe_release(struct net_device *dev)</div><div class='ctx'> 	struct sxgbe_priv_data *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;eee_enabled)</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='add'>+		timer_delete_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop and disconnect the PHY */</div><div class='ctx'> 	if (dev-&gt;phydev) {</div><div class='hunk'>@@ -1520,8 +1521,10 @@ static int sxgbe_rx(struct sxgbe_priv_data *priv, int limit)</div><div class='ctx'> </div><div class='ctx'> 		skb = priv-&gt;rxq[qnum]-&gt;rx_skbuff[entry];</div><div class='ctx'> </div><div class='del'>-		if (unlikely(!skb))</div><div class='add'>+		if (unlikely(!skb)) {</div><div class='ctx'> 			netdev_err(priv-&gt;dev, "rx descriptor is not consistent\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		prefetch(skb-&gt;data - NET_IP_ALIGN);</div><div class='ctx'> 		priv-&gt;rxq[qnum]-&gt;rx_skbuff[entry] = NULL;</div><div class='head'>diff --git a/drivers/net/ethernet/seeq/ether3.c b/drivers/net/ethernet/seeq/ether3.c<br/>index 9319a2675e7b..20dad39b5ab9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/seeq/ether3.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/seeq/ether3.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/seeq/ether3.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/seeq/ether3.c</a></div><div class='hunk'>@@ -170,7 +170,7 @@ ether3_setbuffer(struct net_device *dev, buffer_rw_t read, int start)</div><div class='ctx'>  */</div><div class='ctx'> static void ether3_ledoff(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct dev_priv *private = from_timer(private, t, timer);</div><div class='add'>+	struct dev_priv *private = timer_container_of(private, t, timer);</div><div class='ctx'> 	struct net_device *dev = private-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	ether3_outw(priv(dev)-&gt;regs.config2 |= CFG2_CTRLO, REG_CONFIG2);</div><div class='hunk'>@@ -181,7 +181,7 @@ static void ether3_ledoff(struct timer_list *t)</div><div class='ctx'>  */</div><div class='ctx'> static inline void ether3_ledon(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;priv(dev)-&gt;timer);</div><div class='add'>+	timer_delete(&amp;priv(dev)-&gt;timer);</div><div class='ctx'> 	priv(dev)-&gt;timer.expires = jiffies + HZ / 50; /* leave on for 1/50th second */</div><div class='ctx'> 	add_timer(&amp;priv(dev)-&gt;timer);</div><div class='ctx'> 	if (priv(dev)-&gt;regs.config2 &amp; CFG2_CTRLO)</div><div class='hunk'>@@ -454,7 +454,7 @@ static void ether3_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;priv(dev)-&gt;timer);</div><div class='add'>+	timer_delete(&amp;priv(dev)-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> 	printk(KERN_ERR "%s: transmit timed out, network cable problem?\n", dev-&gt;name);</div><div class='hunk'>@@ -851,7 +851,7 @@ static void ether3_remove(struct expansion_card *ec)</div><div class='ctx'> 	ecard_set_drvdata(ec, NULL);</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(dev);</div><div class='del'>-	del_timer_sync(&amp;priv(dev)-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;priv(dev)-&gt;timer);</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> 	ecard_release_resources(ec);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/Kconfig b/drivers/net/ethernet/sfc/Kconfig<br/>index 3eb55dcfa8a6..c4c43434f314 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/Kconfig</a></div><div class='hunk'>@@ -38,8 +38,9 @@ config SFC_MTD</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  This exposes the on-board flash and/or EEPROM as MTD devices</div><div class='del'>-	  (e.g. /dev/mtd1).  This is required to update the firmware or</div><div class='del'>-	  the boot configuration under Linux.</div><div class='add'>+	  (e.g. /dev/mtd1).  This is required to update the boot</div><div class='add'>+	  configuration under Linux, or use some older userland tools to</div><div class='add'>+	  update the firmware.</div><div class='ctx'> config SFC_MCDI_MON</div><div class='ctx'> 	bool "Solarflare SFC9100-family hwmon support"</div><div class='ctx'> 	depends on SFC &amp;&amp; HWMON &amp;&amp; !(SFC=y &amp;&amp; HWMON=m)</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/Makefile b/drivers/net/ethernet/sfc/Makefile<br/>index 8f446b9bd5ee..d99039ec468d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/Makefile</a></div><div class='hunk'>@@ -7,7 +7,7 @@ sfc-y			+= efx.o efx_common.o efx_channels.o nic.o \</div><div class='ctx'> 			   mcdi_functions.o mcdi_filters.o mcdi_mon.o \</div><div class='ctx'> 			   ef100.o ef100_nic.o ef100_netdev.o \</div><div class='ctx'> 			   ef100_ethtool.o ef100_rx.o ef100_tx.o \</div><div class='del'>-			   efx_devlink.o</div><div class='add'>+			   efx_devlink.o efx_reflash.o</div><div class='ctx'> sfc-$(CONFIG_SFC_MTD)	+= mtd.o</div><div class='ctx'> sfc-$(CONFIG_SFC_SRIOV)	+= sriov.o ef10_sriov.o ef100_sriov.o ef100_rep.o \</div><div class='ctx'>                            mae.o tc.o tc_bindings.o tc_counters.o \</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ef10.c b/drivers/net/ethernet/sfc/ef10.c<br/>index de131fc5fa0b..fcec81f862ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ef10.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ef10.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ef10.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/ef10.c</a></div><div class='hunk'>@@ -1751,7 +1751,7 @@ static void efx_ef10_get_stat_mask(struct efx_nic *efx, unsigned long *mask)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static size_t efx_ef10_describe_stats(struct efx_nic *efx, u8 *names)</div><div class='add'>+static size_t efx_ef10_describe_stats(struct efx_nic *efx, u8 **names)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_BITMAP(mask, EF10_STAT_COUNT);</div><div class='ctx'> </div><div class='hunk'>@@ -3501,7 +3501,7 @@ static int efx_ef10_mtd_probe_partition(struct efx_nic *efx,</div><div class='ctx'> 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_METADATA_IN_LEN);</div><div class='ctx'> 	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_METADATA_OUT_LENMAX);</div><div class='ctx'> 	const struct efx_ef10_nvram_type_info *info;</div><div class='del'>-	size_t size, erase_size, outlen;</div><div class='add'>+	size_t size, erase_size, write_size, outlen;</div><div class='ctx'> 	int type_idx = 0;</div><div class='ctx'> 	bool protected;</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -3516,7 +3516,8 @@ static int efx_ef10_mtd_probe_partition(struct efx_nic *efx,</div><div class='ctx'> 	if (info-&gt;port != efx_port_num(efx))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	rc = efx_mcdi_nvram_info(efx, type, &amp;size, &amp;erase_size, &amp;protected);</div><div class='add'>+	rc = efx_mcdi_nvram_info(efx, type, &amp;size, &amp;erase_size, &amp;write_size,</div><div class='add'>+				 &amp;protected);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	if (protected &amp;&amp;</div><div class='hunk'>@@ -3561,6 +3562,8 @@ static int efx_ef10_mtd_probe_partition(struct efx_nic *efx,</div><div class='ctx'> 	if (!erase_size)</div><div class='ctx'> 		part-&gt;common.mtd.flags |= MTD_NO_ERASE;</div><div class='ctx'> </div><div class='add'>+	part-&gt;common.mtd.writesize = write_size;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3982,7 +3985,6 @@ static int efx_ef10_udp_tnl_unset_port(struct net_device *dev,</div><div class='ctx'> static const struct udp_tunnel_nic_info efx_ef10_udp_tunnels = {</div><div class='ctx'> 	.set_port	= efx_ef10_udp_tnl_set_port,</div><div class='ctx'> 	.unset_port	= efx_ef10_udp_tnl_unset_port,</div><div class='del'>-	.flags          = UDP_TUNNEL_NIC_INFO_MAY_SLEEP,</div><div class='ctx'> 	.tables         = {</div><div class='ctx'> 		{</div><div class='ctx'> 			.n_entries = 16,</div><div class='hunk'>@@ -4416,6 +4418,7 @@ const struct efx_nic_type efx_x4_nic_type = {</div><div class='ctx'> 	.can_rx_scatter = true,</div><div class='ctx'> 	.always_rx_scatter = true,</div><div class='ctx'> 	.option_descriptors = true,</div><div class='add'>+	.flash_auto_partition = true,</div><div class='ctx'> 	.min_interrupt_mode = EFX_INT_MODE_MSIX,</div><div class='ctx'> 	.timer_period_max = 1 &lt;&lt; ERF_DD_EVQ_IND_TIMER_VAL_WIDTH,</div><div class='ctx'> 	.offload_features = EF10_OFFLOAD_FEATURES,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ef100_ethtool.c b/drivers/net/ethernet/sfc/ef100_ethtool.c<br/>index 5c2551369812..6c3b74000d3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ef100_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ef100_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ef100_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/ef100_ethtool.c</a></div><div class='hunk'>@@ -59,6 +59,7 @@ const struct ethtool_ops ef100_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size	= efx_ethtool_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh_key_size	= efx_ethtool_get_rxfh_key_size,</div><div class='ctx'> 	.rxfh_per_ctx_key	= true,</div><div class='add'>+	.cap_rss_rxnfc_adds	= true,</div><div class='ctx'> 	.rxfh_priv_size		= sizeof(struct efx_rss_context_priv),</div><div class='ctx'> 	.get_rxfh		= efx_ethtool_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= efx_ethtool_set_rxfh,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ef100_netdev.c b/drivers/net/ethernet/sfc/ef100_netdev.c<br/>index 7f7d560cb2b4..3a06e3b1bd6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ef100_netdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ef100_netdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ef100_netdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/ef100_netdev.c</a></div><div class='hunk'>@@ -450,9 +450,9 @@ int ef100_probe_netdev(struct efx_probe_data *probe_data)</div><div class='ctx'> 	net_dev-&gt;hw_enc_features |= efx-&gt;type-&gt;offload_features;</div><div class='ctx'> 	net_dev-&gt;vlan_features |= NETIF_F_HW_CSUM | NETIF_F_SG |</div><div class='ctx'> 				  NETIF_F_HIGHDMA | NETIF_F_ALL_TSO;</div><div class='del'>-	netif_set_tso_max_segs(net_dev,</div><div class='del'>-			       ESE_EF100_DP_GZ_TSO_MAX_HDR_NUM_SEGS_DEFAULT);</div><div class='del'>-	efx-&gt;mdio.dev = net_dev;</div><div class='add'>+	nic_data = efx-&gt;nic_data;</div><div class='add'>+	netif_set_tso_max_size(efx-&gt;net_dev, nic_data-&gt;tso_max_payload_len);</div><div class='add'>+	netif_set_tso_max_segs(efx-&gt;net_dev, nic_data-&gt;tso_max_payload_num_segs);</div><div class='ctx'> </div><div class='ctx'> 	rc = efx_ef100_init_datapath_caps(efx);</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='hunk'>@@ -478,7 +478,6 @@ int ef100_probe_netdev(struct efx_probe_data *probe_data)</div><div class='ctx'> 	/* Don't fail init if RSS setup doesn't work. */</div><div class='ctx'> 	efx_mcdi_push_default_indir_table(efx, efx-&gt;n_rx_channels);</div><div class='ctx'> </div><div class='del'>-	nic_data = efx-&gt;nic_data;</div><div class='ctx'> 	rc = ef100_get_mac_address(efx, net_dev-&gt;perm_addr, CLIENT_HANDLE_SELF,</div><div class='ctx'> 				   efx-&gt;type-&gt;is_vf);</div><div class='ctx'> 	if (rc)</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ef100_nic.c b/drivers/net/ethernet/sfc/ef100_nic.c<br/>index 6da06931187d..3ad95a4c8af2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ef100_nic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ef100_nic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ef100_nic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/ef100_nic.c</a></div><div class='hunk'>@@ -583,7 +583,7 @@ static const struct efx_hw_stat_desc ef100_stat_desc[EF100_STAT_COUNT] = {</div><div class='ctx'> 	EFX_GENERIC_SW_STAT(rx_noskb_drops),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static size_t ef100_describe_stats(struct efx_nic *efx, u8 *names)</div><div class='add'>+static size_t ef100_describe_stats(struct efx_nic *efx, u8 **names)</div><div class='ctx'> {</div><div class='ctx'> 	DECLARE_BITMAP(mask, EF100_STAT_COUNT) = {};</div><div class='ctx'> </div><div class='hunk'>@@ -887,8 +887,7 @@ static int ef100_process_design_param(struct efx_nic *efx,</div><div class='ctx'> 	case ESE_EF100_DP_GZ_TSO_MAX_HDR_NUM_SEGS:</div><div class='ctx'> 		/* We always put HDR_NUM_SEGS=1 in our TSO descriptors */</div><div class='ctx'> 		if (!reader-&gt;value) {</div><div class='del'>-			netif_err(efx, probe, efx-&gt;net_dev,</div><div class='del'>-				  "TSO_MAX_HDR_NUM_SEGS &lt; 1\n");</div><div class='add'>+			pci_err(efx-&gt;pci_dev, "TSO_MAX_HDR_NUM_SEGS &lt; 1\n");</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -901,32 +900,28 @@ static int ef100_process_design_param(struct efx_nic *efx,</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!reader-&gt;value || reader-&gt;value &gt; EFX_MIN_DMAQ_SIZE ||</div><div class='ctx'> 		    EFX_MIN_DMAQ_SIZE % (u32)reader-&gt;value) {</div><div class='del'>-			netif_err(efx, probe, efx-&gt;net_dev,</div><div class='del'>-				  "%s size granularity is %llu, can't guarantee safety\n",</div><div class='del'>-				  reader-&gt;type == ESE_EF100_DP_GZ_RXQ_SIZE_GRANULARITY ? "RXQ" : "TXQ",</div><div class='del'>-				  reader-&gt;value);</div><div class='add'>+			pci_err(efx-&gt;pci_dev,</div><div class='add'>+				"%s size granularity is %llu, can't guarantee safety\n",</div><div class='add'>+				reader-&gt;type == ESE_EF100_DP_GZ_RXQ_SIZE_GRANULARITY ? "RXQ" : "TXQ",</div><div class='add'>+				reader-&gt;value);</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case ESE_EF100_DP_GZ_TSO_MAX_PAYLOAD_LEN:</div><div class='ctx'> 		nic_data-&gt;tso_max_payload_len = min_t(u64, reader-&gt;value,</div><div class='ctx'> 						      GSO_LEGACY_MAX_SIZE);</div><div class='del'>-		netif_set_tso_max_size(efx-&gt;net_dev,</div><div class='del'>-				       nic_data-&gt;tso_max_payload_len);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case ESE_EF100_DP_GZ_TSO_MAX_PAYLOAD_NUM_SEGS:</div><div class='ctx'> 		nic_data-&gt;tso_max_payload_num_segs = min_t(u64, reader-&gt;value, 0xffff);</div><div class='del'>-		netif_set_tso_max_segs(efx-&gt;net_dev,</div><div class='del'>-				       nic_data-&gt;tso_max_payload_num_segs);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case ESE_EF100_DP_GZ_TSO_MAX_NUM_FRAMES:</div><div class='ctx'> 		nic_data-&gt;tso_max_frames = min_t(u64, reader-&gt;value, 0xffff);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case ESE_EF100_DP_GZ_COMPAT:</div><div class='ctx'> 		if (reader-&gt;value) {</div><div class='del'>-			netif_err(efx, probe, efx-&gt;net_dev,</div><div class='del'>-				  "DP_COMPAT has unknown bits %#llx, driver not compatible with this hw\n",</div><div class='del'>-				  reader-&gt;value);</div><div class='add'>+			pci_err(efx-&gt;pci_dev,</div><div class='add'>+				"DP_COMPAT has unknown bits %#llx, driver not compatible with this hw\n",</div><div class='add'>+				reader-&gt;value);</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -946,10 +941,10 @@ static int ef100_process_design_param(struct efx_nic *efx,</div><div class='ctx'> 		 * So the value of this shouldn't matter.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (reader-&gt;value != ESE_EF100_DP_GZ_VI_STRIDES_DEFAULT)</div><div class='del'>-			netif_dbg(efx, probe, efx-&gt;net_dev,</div><div class='del'>-				  "NIC has other than default VI_STRIDES (mask "</div><div class='del'>-				  "%#llx), early probing might use wrong one\n",</div><div class='del'>-				  reader-&gt;value);</div><div class='add'>+			pci_dbg(efx-&gt;pci_dev,</div><div class='add'>+				"NIC has other than default VI_STRIDES (mask "</div><div class='add'>+				"%#llx), early probing might use wrong one\n",</div><div class='add'>+				reader-&gt;value);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case ESE_EF100_DP_GZ_RX_MAX_RUNT:</div><div class='ctx'> 		/* Driver doesn't look at L2_STATUS:LEN_ERR bit, so we don't</div><div class='hunk'>@@ -961,9 +956,9 @@ static int ef100_process_design_param(struct efx_nic *efx,</div><div class='ctx'> 		/* Host interface says "Drivers should ignore design parameters</div><div class='ctx'> 		 * that they do not recognise."</div><div class='ctx'> 		 */</div><div class='del'>-		netif_dbg(efx, probe, efx-&gt;net_dev,</div><div class='del'>-			  "Ignoring unrecognised design parameter %u\n",</div><div class='del'>-			  reader-&gt;type);</div><div class='add'>+		pci_dbg(efx-&gt;pci_dev,</div><div class='add'>+			"Ignoring unrecognised design parameter %u\n",</div><div class='add'>+			reader-&gt;type);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -999,13 +994,13 @@ static int ef100_check_design_params(struct efx_nic *efx)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (reader.state != EF100_TLV_TYPE) {</div><div class='ctx'> 		if (reader.state == EF100_TLV_TYPE_CONT)</div><div class='del'>-			netif_err(efx, probe, efx-&gt;net_dev,</div><div class='del'>-				  "truncated design parameter (incomplete type %u)\n",</div><div class='del'>-				  reader.type);</div><div class='add'>+			pci_err(efx-&gt;pci_dev,</div><div class='add'>+				"truncated design parameter (incomplete type %u)\n",</div><div class='add'>+				reader.type);</div><div class='ctx'> 		else</div><div class='del'>-			netif_err(efx, probe, efx-&gt;net_dev,</div><div class='del'>-				  "truncated design parameter %u\n",</div><div class='del'>-				  reader.type);</div><div class='add'>+			pci_err(efx-&gt;pci_dev,</div><div class='add'>+				"truncated design parameter %u\n",</div><div class='add'>+				reader.type);</div><div class='ctx'> 		rc = -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ef100_tx.c b/drivers/net/ethernet/sfc/ef100_tx.c<br/>index e6b6be549581..03005757c060 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ef100_tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ef100_tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ef100_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/ef100_tx.c</a></div><div class='hunk'>@@ -189,6 +189,7 @@ static void ef100_make_tso_desc(struct efx_nic *efx,</div><div class='ctx'> {</div><div class='ctx'> 	bool gso_partial = skb_shinfo(skb)-&gt;gso_type &amp; SKB_GSO_PARTIAL;</div><div class='ctx'> 	unsigned int len, ip_offset, tcp_offset, payload_segs;</div><div class='add'>+	u32 mangleid_outer = ESE_GZ_TX_DESC_IP4_ID_INC_MOD16;</div><div class='ctx'> 	u32 mangleid = ESE_GZ_TX_DESC_IP4_ID_INC_MOD16;</div><div class='ctx'> 	unsigned int outer_ip_offset, outer_l4_offset;</div><div class='ctx'> 	u16 vlan_tci = skb_vlan_tag_get(skb);</div><div class='hunk'>@@ -200,8 +201,17 @@ static void ef100_make_tso_desc(struct efx_nic *efx,</div><div class='ctx'> 	bool outer_csum;</div><div class='ctx'> 	u32 paylen;</div><div class='ctx'> </div><div class='del'>-	if (skb_shinfo(skb)-&gt;gso_type &amp; SKB_GSO_TCP_FIXEDID)</div><div class='del'>-		mangleid = ESE_GZ_TX_DESC_IP4_ID_NO_OP;</div><div class='add'>+	if (encap) {</div><div class='add'>+		if (skb_shinfo(skb)-&gt;gso_type &amp; SKB_GSO_TCP_FIXEDID_INNER)</div><div class='add'>+			mangleid = ESE_GZ_TX_DESC_IP4_ID_NO_OP;</div><div class='add'>+		if (skb_shinfo(skb)-&gt;gso_type &amp; SKB_GSO_TCP_FIXEDID)</div><div class='add'>+			mangleid_outer = ESE_GZ_TX_DESC_IP4_ID_NO_OP;</div><div class='add'>+	} else {</div><div class='add'>+		if (skb_shinfo(skb)-&gt;gso_type &amp; SKB_GSO_TCP_FIXEDID)</div><div class='add'>+			mangleid = ESE_GZ_TX_DESC_IP4_ID_NO_OP;</div><div class='add'>+		mangleid_outer = ESE_GZ_TX_DESC_IP4_ID_NO_OP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (efx-&gt;net_dev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_TX)</div><div class='ctx'> 		vlan_enable = skb_vlan_tag_present(skb);</div><div class='ctx'> </div><div class='hunk'>@@ -245,8 +255,7 @@ static void ef100_make_tso_desc(struct efx_nic *efx,</div><div class='ctx'> 			      ESF_GZ_TX_TSO_OUTER_L4_OFF_W, outer_l4_offset &gt;&gt; 1,</div><div class='ctx'> 			      ESF_GZ_TX_TSO_ED_OUTER_UDP_LEN, udp_encap &amp;&amp; !gso_partial,</div><div class='ctx'> 			      ESF_GZ_TX_TSO_ED_OUTER_IP_LEN, encap &amp;&amp; !gso_partial,</div><div class='del'>-			      ESF_GZ_TX_TSO_ED_OUTER_IP4_ID, encap ? mangleid :</div><div class='del'>-								     ESE_GZ_TX_DESC_IP4_ID_NO_OP,</div><div class='add'>+			      ESF_GZ_TX_TSO_ED_OUTER_IP4_ID, mangleid_outer,</div><div class='ctx'> 			      ESF_GZ_TX_TSO_VLAN_INSERT_EN, vlan_enable,</div><div class='ctx'> 			      ESF_GZ_TX_TSO_VLAN_INSERT_TCI, vlan_tci</div><div class='ctx'> 		);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/efx.c b/drivers/net/ethernet/sfc/efx.c<br/>index 90bb7db15519..112e55b98ed3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/efx.c</a></div><div class='hunk'>@@ -418,14 +418,6 @@ unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs)</div><div class='ctx'> 	return usecs * 1000 / efx-&gt;timer_quantum_ns;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks)</div><div class='del'>-{</div><div class='del'>-	/* We must round up when converting ticks to microseconds</div><div class='del'>-	 * because we round down when converting the other way.</div><div class='del'>-	 */</div><div class='del'>-	return DIV_ROUND_UP(ticks * efx-&gt;timer_quantum_ns, 1000);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Set interrupt moderation parameters */</div><div class='ctx'> int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,</div><div class='ctx'> 			    unsigned int rx_usecs, bool rx_adaptive,</div><div class='hunk'>@@ -484,28 +476,6 @@ void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,</div><div class='ctx'> </div><div class='ctx'> /**************************************************************************</div><div class='ctx'>  *</div><div class='del'>- * ioctls</div><div class='del'>- *</div><div class='del'>- *************************************************************************/</div><div class='del'>-</div><div class='del'>-/* Net device ioctl</div><div class='del'>- * Context: process, rtnl_lock() held.</div><div class='del'>- */</div><div class='del'>-static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct efx_nic *efx = efx_netdev_priv(net_dev);</div><div class='del'>-	struct mii_ioctl_data *data = if_mii(ifr);</div><div class='del'>-</div><div class='del'>-	/* Convert phy_id from older PRTAD/DEVAD format */</div><div class='del'>-	if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &amp;&amp;</div><div class='del'>-	    (data-&gt;phy_id &amp; 0xfc00) == 0x0400)</div><div class='del'>-		data-&gt;phy_id ^= MDIO_PHY_ID_C45 | 0x0400;</div><div class='del'>-</div><div class='del'>-	return mdio_mii_ioctl(&amp;efx-&gt;mdio, data, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**************************************************************************</div><div class='del'>- *</div><div class='ctx'>  * Kernel net device interface</div><div class='ctx'>  *</div><div class='ctx'>  *************************************************************************/</div><div class='hunk'>@@ -601,7 +571,6 @@ static const struct net_device_ops efx_netdev_ops = {</div><div class='ctx'> 	.ndo_tx_timeout		= efx_watchdog,</div><div class='ctx'> 	.ndo_start_xmit		= efx_hard_start_xmit,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_eth_ioctl		= efx_ioctl,</div><div class='ctx'> 	.ndo_change_mtu		= efx_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address	= efx_set_mac_address,</div><div class='ctx'> 	.ndo_set_rx_mode	= efx_set_rx_mode,</div><div class='hunk'>@@ -1209,7 +1178,6 @@ static int efx_pci_probe(struct pci_dev *pci_dev,</div><div class='ctx'> 	rc = efx_init_struct(efx, pci_dev);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto fail1;</div><div class='del'>-	efx-&gt;mdio.dev = net_dev;</div><div class='ctx'> </div><div class='ctx'> 	pci_info(pci_dev, "Solarflare NIC detected\n");</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sfc/efx.h b/drivers/net/ethernet/sfc/efx.h<br/>index 7a6cab883d66..45e191686625 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/efx.h</a></div><div class='hunk'>@@ -168,7 +168,6 @@ extern const struct ethtool_ops efx_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> /* Global */</div><div class='ctx'> unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs);</div><div class='del'>-unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks);</div><div class='ctx'> int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,</div><div class='ctx'> 			    unsigned int rx_usecs, bool rx_adaptive,</div><div class='ctx'> 			    bool rx_may_override_tx);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/efx_channels.c b/drivers/net/ethernet/sfc/efx_channels.c<br/>index 06b4f52713ef..ed3a96ebc7f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx_channels.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx_channels.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx_channels.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/efx_channels.c</a></div><div class='hunk'>@@ -216,8 +216,8 @@ static int efx_allocate_msix_channels(struct efx_nic *efx,</div><div class='ctx'> </div><div class='ctx'> 	if (efx_separate_tx_channels) {</div><div class='ctx'> 		efx-&gt;n_tx_channels =</div><div class='del'>-			min(max(n_channels / 2, 1U),</div><div class='del'>-			    efx-&gt;max_tx_channels);</div><div class='add'>+			clamp(n_channels / 2, 1U,</div><div class='add'>+			      efx-&gt;max_tx_channels);</div><div class='ctx'> 		efx-&gt;tx_channel_offset =</div><div class='ctx'> 			n_channels - efx-&gt;n_tx_channels;</div><div class='ctx'> 		efx-&gt;n_rx_channels =</div><div class='hunk'>@@ -1281,7 +1281,7 @@ static int efx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		time = jiffies - channel-&gt;rfs_last_expiry;</div><div class='ctx'> 		/* Would our quota be &gt;= 20? */</div><div class='ctx'> 		if (channel-&gt;rfs_filter_count * time &gt;= 600 * HZ)</div><div class='del'>-			mod_delayed_work(system_wq, &amp;channel-&gt;filter_work, 0);</div><div class='add'>+			mod_delayed_work(system_percpu_wq, &amp;channel-&gt;filter_work, 0);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		/* There is no race here; although napi_disable() will</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/efx_common.c b/drivers/net/ethernet/sfc/efx_common.c<br/>index 13cf647051af..e8fdbb62d872 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/efx_common.c</a></div><div class='hunk'>@@ -635,22 +635,6 @@ int __efx_reconfigure_port(struct efx_nic *efx)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Reinitialise the MAC to pick up new PHY settings, even if the port is</div><div class='del'>- * disabled.</div><div class='del'>- */</div><div class='del'>-int efx_reconfigure_port(struct efx_nic *efx)</div><div class='del'>-{</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	EFX_ASSERT_RESET_SERIALISED(efx);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;efx-&gt;mac_lock);</div><div class='del'>-	rc = __efx_reconfigure_port(efx);</div><div class='del'>-	mutex_unlock(&amp;efx-&gt;mac_lock);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /**************************************************************************</div><div class='ctx'>  *</div><div class='ctx'>  * Device reset and suspend</div><div class='hunk'>@@ -1019,6 +1003,7 @@ int efx_init_struct(struct efx_nic *efx, struct pci_dev *pci_dev)</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;efx-&gt;vf_reps);</div><div class='ctx'> 	INIT_WORK(&amp;efx-&gt;mac_work, efx_mac_work);</div><div class='ctx'> 	init_waitqueue_head(&amp;efx-&gt;flush_wq);</div><div class='add'>+	mutex_init(&amp;efx-&gt;reflash_mutex);</div><div class='ctx'> </div><div class='ctx'> 	efx-&gt;tx_queues_per_channel = 1;</div><div class='ctx'> 	efx-&gt;rxq_entries = EFX_DEFAULT_DMAQ_SIZE;</div><div class='hunk'>@@ -1273,9 +1258,6 @@ out:</div><div class='ctx'> </div><div class='ctx'> /* For simplicity and reliability, we always require a slot reset and try to</div><div class='ctx'>  * reset the hardware when a pci error affecting the device is detected.</div><div class='del'>- * We leave both the link_reset and mmio_enabled callback unimplemented:</div><div class='del'>- * with our request for slot reset the mmio_enabled callback will never be</div><div class='del'>- * called, and the link_reset callback is not used by AER or EEH mechanisms.</div><div class='ctx'>  */</div><div class='ctx'> const struct pci_error_handlers efx_err_handlers = {</div><div class='ctx'> 	.error_detected = efx_io_error_detected,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/efx_common.h b/drivers/net/ethernet/sfc/efx_common.h<br/>index 2c54dac3e662..19a8ca530969 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/efx_common.h</a></div><div class='hunk'>@@ -40,7 +40,6 @@ void efx_destroy_reset_workqueue(void);</div><div class='ctx'> void efx_start_monitor(struct efx_nic *efx);</div><div class='ctx'> </div><div class='ctx'> int __efx_reconfigure_port(struct efx_nic *efx);</div><div class='del'>-int efx_reconfigure_port(struct efx_nic *efx);</div><div class='ctx'> </div><div class='ctx'> #define EFX_ASSERT_RESET_SERIALISED(efx)				\</div><div class='ctx'> 	do {								\</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/efx_devlink.c b/drivers/net/ethernet/sfc/efx_devlink.c<br/>index 3cd750820fdd..d842c60dfc10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx_devlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/efx_devlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/efx_devlink.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include "mae.h"</div><div class='ctx'> #include "ef100_rep.h"</div><div class='ctx'> #endif</div><div class='add'>+#include "efx_reflash.h"</div><div class='ctx'> </div><div class='ctx'> struct efx_devlink {</div><div class='ctx'> 	struct efx_nic *efx;</div><div class='hunk'>@@ -615,7 +616,19 @@ static int efx_devlink_info_get(struct devlink *devlink,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int efx_devlink_flash_update(struct devlink *devlink,</div><div class='add'>+				    struct devlink_flash_update_params *params,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct efx_devlink *devlink_private = devlink_priv(devlink);</div><div class='add'>+	struct efx_nic *efx = devlink_private-&gt;efx;</div><div class='add'>+</div><div class='add'>+	return efx_reflash_flash_firmware(efx, params-&gt;fw, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct devlink_ops sfc_devlink_ops = {</div><div class='add'>+	.supported_flash_update_params	= 0,</div><div class='add'>+	.flash_update			= efx_devlink_flash_update,</div><div class='ctx'> 	.info_get			= efx_devlink_info_get,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sfc/efx_reflash.c b/drivers/net/ethernet/sfc/efx_reflash.c<br/>new file mode 100644<br/>index 000000000000..b12e95f1c80a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx_reflash.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/efx_reflash.c</a></div><div class='hunk'>@@ -0,0 +1,522 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/****************************************************************************</div><div class='add'>+ * Driver for AMD network controllers and boards</div><div class='add'>+ * Copyright (C) 2025, Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ * by the Free Software Foundation, incorporated herein by reference.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+#include "efx_reflash.h"</div><div class='add'>+#include "net_driver.h"</div><div class='add'>+#include "fw_formats.h"</div><div class='add'>+#include "mcdi_pcol.h"</div><div class='add'>+#include "mcdi.h"</div><div class='add'>+</div><div class='add'>+/* Try to parse a Reflash header at the specified offset */</div><div class='add'>+static bool efx_reflash_parse_reflash_header(const struct firmware *fw,</div><div class='add'>+					     size_t header_offset, u32 *type,</div><div class='add'>+					     u32 *subtype, const u8 **data,</div><div class='add'>+					     size_t *data_size)</div><div class='add'>+{</div><div class='add'>+	size_t header_end, trailer_offset, trailer_end;</div><div class='add'>+	u32 magic, version, payload_size, header_len;</div><div class='add'>+	const u8 *header, *trailer;</div><div class='add'>+	u32 expected_crc, crc;</div><div class='add'>+</div><div class='add'>+	if (check_add_overflow(header_offset, EFX_REFLASH_HEADER_LENGTH_OFST +</div><div class='add'>+					      EFX_REFLASH_HEADER_LENGTH_LEN,</div><div class='add'>+			       &amp;header_end))</div><div class='add'>+		return false;</div><div class='add'>+	if (fw-&gt;size &lt; header_end)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	header = fw-&gt;data + header_offset;</div><div class='add'>+	magic = get_unaligned_le32(header + EFX_REFLASH_HEADER_MAGIC_OFST);</div><div class='add'>+	if (magic != EFX_REFLASH_HEADER_MAGIC_VALUE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	version = get_unaligned_le32(header + EFX_REFLASH_HEADER_VERSION_OFST);</div><div class='add'>+	if (version != EFX_REFLASH_HEADER_VERSION_VALUE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	payload_size = get_unaligned_le32(header + EFX_REFLASH_HEADER_PAYLOAD_SIZE_OFST);</div><div class='add'>+	header_len = get_unaligned_le32(header + EFX_REFLASH_HEADER_LENGTH_OFST);</div><div class='add'>+	if (check_add_overflow(header_offset, header_len, &amp;trailer_offset) ||</div><div class='add'>+	    check_add_overflow(trailer_offset, payload_size, &amp;trailer_offset) ||</div><div class='add'>+	    check_add_overflow(trailer_offset, EFX_REFLASH_TRAILER_LEN,</div><div class='add'>+			       &amp;trailer_end))</div><div class='add'>+		return false;</div><div class='add'>+	if (fw-&gt;size &lt; trailer_end)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	trailer = fw-&gt;data + trailer_offset;</div><div class='add'>+	expected_crc = get_unaligned_le32(trailer + EFX_REFLASH_TRAILER_CRC_OFST);</div><div class='add'>+	/* Addition could overflow u32, but not size_t since we already</div><div class='add'>+	 * checked trailer_offset didn't overflow.  So cast to size_t first.</div><div class='add'>+	 */</div><div class='add'>+	crc = crc32_le(0, header, (size_t)header_len + payload_size);</div><div class='add'>+	if (crc != expected_crc)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	*type = get_unaligned_le32(header + EFX_REFLASH_HEADER_FIRMWARE_TYPE_OFST);</div><div class='add'>+	*subtype = get_unaligned_le32(header + EFX_REFLASH_HEADER_FIRMWARE_SUBTYPE_OFST);</div><div class='add'>+	if (*type == EFX_REFLASH_FIRMWARE_TYPE_BUNDLE) {</div><div class='add'>+		/* All the bundle data is written verbatim to NVRAM */</div><div class='add'>+		*data = fw-&gt;data;</div><div class='add'>+		*data_size = fw-&gt;size;</div><div class='add'>+	} else {</div><div class='add'>+		/* Other payload types strip the reflash header and trailer</div><div class='add'>+		 * from the data written to NVRAM</div><div class='add'>+		 */</div><div class='add'>+		*data = header + header_len;</div><div class='add'>+		*data_size = payload_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Map from FIRMWARE_TYPE to NVRAM_PARTITION_TYPE */</div><div class='add'>+static int efx_reflash_partition_type(u32 type, u32 subtype,</div><div class='add'>+				      u32 *partition_type,</div><div class='add'>+				      u32 *partition_subtype)</div><div class='add'>+{</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case EFX_REFLASH_FIRMWARE_TYPE_BOOTROM:</div><div class='add'>+		*partition_type = NVRAM_PARTITION_TYPE_EXPANSION_ROM;</div><div class='add'>+		*partition_subtype = subtype;</div><div class='add'>+		break;</div><div class='add'>+	case EFX_REFLASH_FIRMWARE_TYPE_BUNDLE:</div><div class='add'>+		*partition_type = NVRAM_PARTITION_TYPE_BUNDLE;</div><div class='add'>+		*partition_subtype = subtype;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* Not supported */</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Try to parse a SmartNIC image header at the specified offset */</div><div class='add'>+static bool efx_reflash_parse_snic_header(const struct firmware *fw,</div><div class='add'>+					  size_t header_offset,</div><div class='add'>+					  u32 *partition_type,</div><div class='add'>+					  u32 *partition_subtype,</div><div class='add'>+					  const u8 **data, size_t *data_size)</div><div class='add'>+{</div><div class='add'>+	u32 magic, version, payload_size, header_len, expected_crc, crc;</div><div class='add'>+	size_t header_end, payload_end;</div><div class='add'>+	const u8 *header;</div><div class='add'>+</div><div class='add'>+	if (check_add_overflow(header_offset, EFX_SNICIMAGE_HEADER_MINLEN,</div><div class='add'>+			       &amp;header_end) ||</div><div class='add'>+	    fw-&gt;size &lt; header_end)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	header = fw-&gt;data + header_offset;</div><div class='add'>+	magic = get_unaligned_le32(header + EFX_SNICIMAGE_HEADER_MAGIC_OFST);</div><div class='add'>+	if (magic != EFX_SNICIMAGE_HEADER_MAGIC_VALUE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	version = get_unaligned_le32(header + EFX_SNICIMAGE_HEADER_VERSION_OFST);</div><div class='add'>+	if (version != EFX_SNICIMAGE_HEADER_VERSION_VALUE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	header_len = get_unaligned_le32(header + EFX_SNICIMAGE_HEADER_LENGTH_OFST);</div><div class='add'>+	if (check_add_overflow(header_offset, header_len, &amp;header_end))</div><div class='add'>+		return false;</div><div class='add'>+	payload_size = get_unaligned_le32(header + EFX_SNICIMAGE_HEADER_PAYLOAD_SIZE_OFST);</div><div class='add'>+	if (check_add_overflow(header_end, payload_size, &amp;payload_end) ||</div><div class='add'>+	    fw-&gt;size &lt; payload_end)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	expected_crc = get_unaligned_le32(header + EFX_SNICIMAGE_HEADER_CRC_OFST);</div><div class='add'>+</div><div class='add'>+	/* Calculate CRC omitting the expected CRC field itself */</div><div class='add'>+	crc = crc32_le(~0, header, EFX_SNICIMAGE_HEADER_CRC_OFST);</div><div class='add'>+	crc = ~crc32_le(crc,</div><div class='add'>+			header + EFX_SNICIMAGE_HEADER_CRC_OFST +</div><div class='add'>+			EFX_SNICIMAGE_HEADER_CRC_LEN,</div><div class='add'>+			header_len + payload_size - EFX_SNICIMAGE_HEADER_CRC_OFST -</div><div class='add'>+			EFX_SNICIMAGE_HEADER_CRC_LEN);</div><div class='add'>+	if (crc != expected_crc)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	*partition_type =</div><div class='add'>+		get_unaligned_le32(header + EFX_SNICIMAGE_HEADER_PARTITION_TYPE_OFST);</div><div class='add'>+	*partition_subtype =</div><div class='add'>+		get_unaligned_le32(header + EFX_SNICIMAGE_HEADER_PARTITION_SUBTYPE_OFST);</div><div class='add'>+	*data = fw-&gt;data;</div><div class='add'>+	*data_size = fw-&gt;size;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Try to parse a SmartNIC bundle header at the specified offset */</div><div class='add'>+static bool efx_reflash_parse_snic_bundle_header(const struct firmware *fw,</div><div class='add'>+						 size_t header_offset,</div><div class='add'>+						 u32 *partition_type,</div><div class='add'>+						 u32 *partition_subtype,</div><div class='add'>+						 const u8 **data,</div><div class='add'>+						 size_t *data_size)</div><div class='add'>+{</div><div class='add'>+	u32 magic, version, bundle_type, header_len, expected_crc, crc;</div><div class='add'>+	size_t header_end;</div><div class='add'>+	const u8 *header;</div><div class='add'>+</div><div class='add'>+	if (check_add_overflow(header_offset, EFX_SNICBUNDLE_HEADER_LEN,</div><div class='add'>+			       &amp;header_end))</div><div class='add'>+		return false;</div><div class='add'>+	if (fw-&gt;size &lt; header_end)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	header = fw-&gt;data + header_offset;</div><div class='add'>+	magic = get_unaligned_le32(header + EFX_SNICBUNDLE_HEADER_MAGIC_OFST);</div><div class='add'>+	if (magic != EFX_SNICBUNDLE_HEADER_MAGIC_VALUE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	version = get_unaligned_le32(header + EFX_SNICBUNDLE_HEADER_VERSION_OFST);</div><div class='add'>+	if (version != EFX_SNICBUNDLE_HEADER_VERSION_VALUE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	bundle_type = get_unaligned_le32(header + EFX_SNICBUNDLE_HEADER_BUNDLE_TYPE_OFST);</div><div class='add'>+	if (bundle_type != NVRAM_PARTITION_TYPE_BUNDLE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	header_len = get_unaligned_le32(header + EFX_SNICBUNDLE_HEADER_LENGTH_OFST);</div><div class='add'>+	if (header_len != EFX_SNICBUNDLE_HEADER_LEN)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	expected_crc = get_unaligned_le32(header + EFX_SNICBUNDLE_HEADER_CRC_OFST);</div><div class='add'>+	crc = ~crc32_le(~0, header, EFX_SNICBUNDLE_HEADER_CRC_OFST);</div><div class='add'>+	if (crc != expected_crc)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	*partition_type = NVRAM_PARTITION_TYPE_BUNDLE;</div><div class='add'>+	*partition_subtype = get_unaligned_le32(header + EFX_SNICBUNDLE_HEADER_BUNDLE_SUBTYPE_OFST);</div><div class='add'>+	*data = fw-&gt;data;</div><div class='add'>+	*data_size = fw-&gt;size;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Try to find a valid firmware payload in the firmware data.</div><div class='add'>+ * When we recognise a valid header, we parse it for the partition type</div><div class='add'>+ * (so we know where to ask the MC to write it to) and the location of</div><div class='add'>+ * the data blob to write.</div><div class='add'>+ */</div><div class='add'>+static int efx_reflash_parse_firmware_data(const struct firmware *fw,</div><div class='add'>+					   u32 *partition_type,</div><div class='add'>+					   u32 *partition_subtype,</div><div class='add'>+					   const u8 **data, size_t *data_size)</div><div class='add'>+{</div><div class='add'>+	size_t header_offset;</div><div class='add'>+	u32 type, subtype;</div><div class='add'>+</div><div class='add'>+	/* Some packaging formats (such as CMS/PKCS#7 signed images)</div><div class='add'>+	 * prepend a header for which finding the size is a non-trivial</div><div class='add'>+	 * task, so step through the firmware data until we find a valid</div><div class='add'>+	 * header.</div><div class='add'>+	 *</div><div class='add'>+	 * The checks are intended to reject firmware data that is clearly not</div><div class='add'>+	 * in the expected format.  They do not need to be exhaustive as the</div><div class='add'>+	 * running firmware will perform its own comprehensive validity and</div><div class='add'>+	 * compatibility checks during the update procedure.</div><div class='add'>+	 *</div><div class='add'>+	 * Firmware packages may contain multiple reflash images, e.g. a</div><div class='add'>+	 * bundle containing one or more other images.  Only check the</div><div class='add'>+	 * outermost container by stopping after the first candidate image</div><div class='add'>+	 * found even it is for an unsupported partition type.</div><div class='add'>+	 */</div><div class='add'>+	for (header_offset = 0; header_offset &lt; fw-&gt;size; header_offset++) {</div><div class='add'>+		if (efx_reflash_parse_snic_bundle_header(fw, header_offset,</div><div class='add'>+							 partition_type,</div><div class='add'>+							 partition_subtype,</div><div class='add'>+							 data, data_size))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (efx_reflash_parse_snic_header(fw, header_offset,</div><div class='add'>+						  partition_type,</div><div class='add'>+						  partition_subtype, data,</div><div class='add'>+						  data_size))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (efx_reflash_parse_reflash_header(fw, header_offset, &amp;type,</div><div class='add'>+						     &amp;subtype, data, data_size))</div><div class='add'>+			return efx_reflash_partition_type(type, subtype,</div><div class='add'>+							  partition_type,</div><div class='add'>+							  partition_subtype);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Limit the number of status updates during the erase or write phases */</div><div class='add'>+#define EFX_DEVLINK_STATUS_UPDATE_COUNT		50</div><div class='add'>+</div><div class='add'>+/* Expected timeout for the efx_mcdi_nvram_update_finish_polled() */</div><div class='add'>+#define EFX_DEVLINK_UPDATE_FINISH_TIMEOUT	900</div><div class='add'>+</div><div class='add'>+/* Ideal erase chunk size.  This is a balance between minimising the number of</div><div class='add'>+ * MCDI requests to erase an entire partition whilst avoiding tripping the MCDI</div><div class='add'>+ * RPC timeout.</div><div class='add'>+ */</div><div class='add'>+#define EFX_NVRAM_ERASE_IDEAL_CHUNK_SIZE	(64 * 1024)</div><div class='add'>+</div><div class='add'>+static int efx_reflash_erase_partition(struct efx_nic *efx,</div><div class='add'>+				       struct netlink_ext_ack *extack,</div><div class='add'>+				       struct devlink *devlink, u32 type,</div><div class='add'>+				       size_t partition_size,</div><div class='add'>+				       size_t align)</div><div class='add'>+{</div><div class='add'>+	size_t chunk, offset, next_update;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Partitions that cannot be erased or do not require erase before</div><div class='add'>+	 * write are advertised with a erase alignment/sector size of zero.</div><div class='add'>+	 */</div><div class='add'>+	if (align == 0)</div><div class='add'>+		/* Nothing to do */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (partition_size % align)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Erase the entire NVRAM partition a chunk at a time to avoid</div><div class='add'>+	 * potentially tripping the MCDI RPC timeout.</div><div class='add'>+	 */</div><div class='add'>+	if (align &gt;= EFX_NVRAM_ERASE_IDEAL_CHUNK_SIZE)</div><div class='add'>+		chunk = align;</div><div class='add'>+	else</div><div class='add'>+		chunk = rounddown(EFX_NVRAM_ERASE_IDEAL_CHUNK_SIZE, align);</div><div class='add'>+</div><div class='add'>+	for (offset = 0, next_update = 0; offset &lt; partition_size; offset += chunk) {</div><div class='add'>+		if (offset &gt;= next_update) {</div><div class='add'>+			devlink_flash_update_status_notify(devlink, "Erasing",</div><div class='add'>+							   NULL, offset,</div><div class='add'>+							   partition_size);</div><div class='add'>+			next_update += partition_size / EFX_DEVLINK_STATUS_UPDATE_COUNT;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		chunk = min_t(size_t, partition_size - offset, chunk);</div><div class='add'>+		rc = efx_mcdi_nvram_erase(efx, type, offset, chunk);</div><div class='add'>+		if (rc) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "Erase failed for NVRAM partition %#x at %#zx-%#zx",</div><div class='add'>+					       type, offset, offset + chunk - 1);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_status_notify(devlink, "Erasing", NULL,</div><div class='add'>+					   partition_size, partition_size);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int efx_reflash_write_partition(struct efx_nic *efx,</div><div class='add'>+				       struct netlink_ext_ack *extack,</div><div class='add'>+				       struct devlink *devlink, u32 type,</div><div class='add'>+				       const u8 *data, size_t data_size,</div><div class='add'>+				       size_t align)</div><div class='add'>+{</div><div class='add'>+	size_t write_max, chunk, offset, next_update;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (align == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Write the NVRAM partition in chunks that are the largest multiple</div><div class='add'>+	 * of the partition's required write alignment that will fit into the</div><div class='add'>+	 * MCDI NVRAM_WRITE RPC payload.</div><div class='add'>+	 */</div><div class='add'>+	if (efx-&gt;type-&gt;mcdi_max_ver &lt; 2)</div><div class='add'>+		write_max = MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_LEN *</div><div class='add'>+			    MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_MAXNUM;</div><div class='add'>+	else</div><div class='add'>+		write_max = MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_LEN *</div><div class='add'>+			    MC_CMD_NVRAM_WRITE_IN_WRITE_BUFFER_MAXNUM_MCDI2;</div><div class='add'>+	chunk = rounddown(write_max, align);</div><div class='add'>+</div><div class='add'>+	for (offset = 0, next_update = 0; offset + chunk &lt;= data_size; offset += chunk) {</div><div class='add'>+		if (offset &gt;= next_update) {</div><div class='add'>+			devlink_flash_update_status_notify(devlink, "Writing",</div><div class='add'>+							   NULL, offset,</div><div class='add'>+							   data_size);</div><div class='add'>+			next_update += data_size / EFX_DEVLINK_STATUS_UPDATE_COUNT;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rc = efx_mcdi_nvram_write(efx, type, offset, data + offset, chunk);</div><div class='add'>+		if (rc) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "Write failed for NVRAM partition %#x at %#zx-%#zx",</div><div class='add'>+					       type, offset, offset + chunk - 1);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Round up left over data to satisfy write alignment */</div><div class='add'>+	if (offset &lt; data_size) {</div><div class='add'>+		size_t remaining = data_size - offset;</div><div class='add'>+		u8 *buf;</div><div class='add'>+</div><div class='add'>+		if (offset &gt;= next_update)</div><div class='add'>+			devlink_flash_update_status_notify(devlink, "Writing",</div><div class='add'>+							   NULL, offset,</div><div class='add'>+							   data_size);</div><div class='add'>+</div><div class='add'>+		chunk = roundup(remaining, align);</div><div class='add'>+		buf = kmalloc(chunk, GFP_KERNEL);</div><div class='add'>+		if (!buf)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		memcpy(buf, data + offset, remaining);</div><div class='add'>+		memset(buf + remaining, 0xFF, chunk - remaining);</div><div class='add'>+		rc = efx_mcdi_nvram_write(efx, type, offset, buf, chunk);</div><div class='add'>+		kfree(buf);</div><div class='add'>+		if (rc) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "Write failed for NVRAM partition %#x at %#zx-%#zx",</div><div class='add'>+					       type, offset, offset + chunk - 1);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_status_notify(devlink, "Writing", NULL, data_size,</div><div class='add'>+					   data_size);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int efx_reflash_flash_firmware(struct efx_nic *efx, const struct firmware *fw,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	size_t data_size, size, erase_align, write_align;</div><div class='add'>+	struct devlink *devlink = efx-&gt;devlink;</div><div class='add'>+	u32 type, data_subtype, subtype;</div><div class='add'>+	const u8 *data;</div><div class='add'>+	bool protected;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!efx_has_cap(efx, BUNDLE_UPDATE)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "NVRAM bundle updates are not supported by the firmware");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;efx-&gt;reflash_mutex);</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_status_notify(devlink, "Checking update", NULL, 0, 0);</div><div class='add'>+</div><div class='add'>+	if (efx-&gt;type-&gt;flash_auto_partition) {</div><div class='add'>+		/* NIC wants entire FW file including headers;</div><div class='add'>+		 * FW will validate 'subtype' if there is one</div><div class='add'>+		 */</div><div class='add'>+		type = NVRAM_PARTITION_TYPE_AUTO;</div><div class='add'>+		data = fw-&gt;data;</div><div class='add'>+		data_size = fw-&gt;size;</div><div class='add'>+	} else {</div><div class='add'>+		rc = efx_reflash_parse_firmware_data(fw, &amp;type, &amp;data_subtype, &amp;data,</div><div class='add'>+						     &amp;data_size);</div><div class='add'>+		if (rc) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Firmware image validation check failed");</div><div class='add'>+			goto out_unlock;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rc = efx_mcdi_nvram_metadata(efx, type, &amp;subtype, NULL, NULL, 0);</div><div class='add'>+		if (rc) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "Metadata query for NVRAM partition %#x failed",</div><div class='add'>+					       type);</div><div class='add'>+			goto out_unlock;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (subtype != data_subtype) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Firmware image is not appropriate for this adapter");</div><div class='add'>+			rc = -EINVAL;</div><div class='add'>+			goto out_unlock;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = efx_mcdi_nvram_info(efx, type, &amp;size, &amp;erase_align, &amp;write_align,</div><div class='add'>+				 &amp;protected);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "Info query for NVRAM partition %#x failed",</div><div class='add'>+				       type);</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (protected) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "NVRAM partition %#x is protected",</div><div class='add'>+				       type);</div><div class='add'>+		rc = -EPERM;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (write_align == 0) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "NVRAM partition %#x is not writable",</div><div class='add'>+				       type);</div><div class='add'>+		rc = -EACCES;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (erase_align != 0 &amp;&amp; size % erase_align) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "NVRAM partition %#x has a bad partition table entry, can't erase it",</div><div class='add'>+				       type);</div><div class='add'>+		rc = -EACCES;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data_size &gt; size) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "Firmware image is too big for NVRAM partition %#x",</div><div class='add'>+				       type);</div><div class='add'>+		rc = -EFBIG;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_status_notify(devlink, "Starting update", NULL, 0, 0);</div><div class='add'>+</div><div class='add'>+	rc = efx_mcdi_nvram_update_start(efx, type);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "Update start request for NVRAM partition %#x failed",</div><div class='add'>+				       type);</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = efx_reflash_erase_partition(efx, extack, devlink, type, size,</div><div class='add'>+					 erase_align);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_update_finish;</div><div class='add'>+</div><div class='add'>+	rc = efx_reflash_write_partition(efx, extack, devlink, type, data,</div><div class='add'>+					 data_size, write_align);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_update_finish;</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_timeout_notify(devlink, "Finishing update", NULL,</div><div class='add'>+					    EFX_DEVLINK_UPDATE_FINISH_TIMEOUT);</div><div class='add'>+</div><div class='add'>+out_update_finish:</div><div class='add'>+	if (rc)</div><div class='add'>+		/* Don't obscure the return code from an earlier failure */</div><div class='add'>+		efx_mcdi_nvram_update_finish(efx, type, EFX_UPDATE_FINISH_ABORT);</div><div class='add'>+	else</div><div class='add'>+		rc = efx_mcdi_nvram_update_finish_polled(efx, type);</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;efx-&gt;reflash_mutex);</div><div class='add'>+	devlink_flash_update_status_notify(devlink, rc ? "Update failed" :</div><div class='add'>+							 "Update complete",</div><div class='add'>+					   NULL, 0, 0);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/efx_reflash.h b/drivers/net/ethernet/sfc/efx_reflash.h<br/>new file mode 100644<br/>index 000000000000..3dffac565161<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/efx_reflash.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/efx_reflash.h</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/****************************************************************************</div><div class='add'>+ * Driver for AMD network controllers and boards</div><div class='add'>+ * Copyright (C) 2025, Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ * by the Free Software Foundation, incorporated herein by reference.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _EFX_REFLASH_H</div><div class='add'>+#define _EFX_REFLASH_H</div><div class='add'>+</div><div class='add'>+#include "net_driver.h"</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+</div><div class='add'>+int efx_reflash_flash_firmware(struct efx_nic *efx, const struct firmware *fw,</div><div class='add'>+			       struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='add'>+#endif /* _EFX_REFLASH_H */</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ethtool.c b/drivers/net/ethernet/sfc/ethtool.c<br/>index bb1930818beb..18fe5850a978 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/ethtool.c</a></div><div class='hunk'>@@ -217,7 +217,8 @@ static int efx_ethtool_set_wol(struct net_device *net_dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void efx_ethtool_get_fec_stats(struct net_device *net_dev,</div><div class='del'>-				      struct ethtool_fec_stats *fec_stats)</div><div class='add'>+				      struct ethtool_fec_stats *fec_stats,</div><div class='add'>+				      struct ethtool_fec_hist *hist)</div><div class='ctx'> {</div><div class='ctx'> 	struct efx_nic *efx = efx_netdev_priv(net_dev);</div><div class='ctx'> </div><div class='hunk'>@@ -262,10 +263,13 @@ const struct ethtool_ops efx_ethtool_ops = {</div><div class='ctx'> 	.set_rxnfc		= efx_ethtool_set_rxnfc,</div><div class='ctx'> 	.get_rxfh_indir_size	= efx_ethtool_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh_key_size	= efx_ethtool_get_rxfh_key_size,</div><div class='add'>+	.rxfh_per_ctx_fields	= true,</div><div class='ctx'> 	.rxfh_per_ctx_key	= true,</div><div class='add'>+	.cap_rss_rxnfc_adds	= true,</div><div class='ctx'> 	.rxfh_priv_size		= sizeof(struct efx_rss_context_priv),</div><div class='ctx'> 	.get_rxfh		= efx_ethtool_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= efx_ethtool_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= efx_ethtool_get_rxfh_fields,</div><div class='ctx'> 	.create_rxfh_context	= efx_ethtool_create_rxfh_context,</div><div class='ctx'> 	.modify_rxfh_context	= efx_ethtool_modify_rxfh_context,</div><div class='ctx'> 	.remove_rxfh_context	= efx_ethtool_remove_rxfh_context,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ethtool_common.c b/drivers/net/ethernet/sfc/ethtool_common.c<br/>index ae32e08540fa..fa303e171d98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ethtool_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ethtool_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ethtool_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/ethtool_common.c</a></div><div class='hunk'>@@ -395,7 +395,7 @@ int efx_ethtool_fill_self_tests(struct efx_nic *efx,</div><div class='ctx'> 	return n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static size_t efx_describe_per_queue_stats(struct efx_nic *efx, u8 *strings)</div><div class='add'>+static size_t efx_describe_per_queue_stats(struct efx_nic *efx, u8 **strings)</div><div class='ctx'> {</div><div class='ctx'> 	size_t n_stats = 0;</div><div class='ctx'> 	struct efx_channel *channel;</div><div class='hunk'>@@ -403,24 +403,22 @@ static size_t efx_describe_per_queue_stats(struct efx_nic *efx, u8 *strings)</div><div class='ctx'> 	efx_for_each_channel(channel, efx) {</div><div class='ctx'> 		if (efx_channel_has_tx_queues(channel)) {</div><div class='ctx'> 			n_stats++;</div><div class='del'>-			if (strings != NULL) {</div><div class='del'>-				snprintf(strings, ETH_GSTRING_LEN,</div><div class='del'>-					 "tx-%u.tx_packets",</div><div class='del'>-					 channel-&gt;tx_queue[0].queue /</div><div class='del'>-					 EFX_MAX_TXQ_PER_CHANNEL);</div><div class='add'>+			if (!strings)</div><div class='add'>+				continue;</div><div class='ctx'> </div><div class='del'>-				strings += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='add'>+			ethtool_sprintf(strings, "tx-%u.tx_packets",</div><div class='add'>+					channel-&gt;tx_queue[0].queue /</div><div class='add'>+						EFX_MAX_TXQ_PER_CHANNEL);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	efx_for_each_channel(channel, efx) {</div><div class='ctx'> 		if (efx_channel_has_rx_queue(channel)) {</div><div class='ctx'> 			n_stats++;</div><div class='del'>-			if (strings != NULL) {</div><div class='del'>-				snprintf(strings, ETH_GSTRING_LEN,</div><div class='del'>-					 "rx-%d.rx_packets", channel-&gt;channel);</div><div class='del'>-				strings += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='add'>+			if (!strings)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ethtool_sprintf(strings, "rx-%d.rx_packets",</div><div class='add'>+					channel-&gt;channel);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (efx-&gt;xdp_tx_queue_count &amp;&amp; efx-&gt;xdp_tx_queues) {</div><div class='hunk'>@@ -428,11 +426,11 @@ static size_t efx_describe_per_queue_stats(struct efx_nic *efx, u8 *strings)</div><div class='ctx'> </div><div class='ctx'> 		for (xdp = 0; xdp &lt; efx-&gt;xdp_tx_queue_count; xdp++) {</div><div class='ctx'> 			n_stats++;</div><div class='del'>-			if (strings) {</div><div class='del'>-				snprintf(strings, ETH_GSTRING_LEN,</div><div class='del'>-					 "tx-xdp-cpu-%hu.tx_packets", xdp);</div><div class='del'>-				strings += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='add'>+			if (!strings)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ethtool_sprintf(strings, "tx-xdp-cpu-%hu.tx_packets",</div><div class='add'>+					xdp);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -464,15 +462,11 @@ void efx_ethtool_get_strings(struct net_device *net_dev,</div><div class='ctx'> </div><div class='ctx'> 	switch (string_set) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='del'>-		strings += (efx-&gt;type-&gt;describe_stats(efx, strings) *</div><div class='del'>-			    ETH_GSTRING_LEN);</div><div class='add'>+		efx-&gt;type-&gt;describe_stats(efx, &amp;strings);</div><div class='ctx'> 		for (i = 0; i &lt; EFX_ETHTOOL_SW_STAT_COUNT; i++)</div><div class='del'>-			strscpy(strings + i * ETH_GSTRING_LEN,</div><div class='del'>-				efx_sw_stat_desc[i].name, ETH_GSTRING_LEN);</div><div class='del'>-		strings += EFX_ETHTOOL_SW_STAT_COUNT * ETH_GSTRING_LEN;</div><div class='del'>-		strings += (efx_describe_per_queue_stats(efx, strings) *</div><div class='del'>-			    ETH_GSTRING_LEN);</div><div class='del'>-		efx_ptp_describe_stats(efx, strings);</div><div class='add'>+			ethtool_puts(&amp;strings, efx_sw_stat_desc[i].name);</div><div class='add'>+		efx_describe_per_queue_stats(efx, &amp;strings);</div><div class='add'>+		efx_ptp_describe_stats(efx, &amp;strings);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ETH_SS_TEST:</div><div class='ctx'> 		efx_ethtool_fill_self_tests(efx, NULL, strings, NULL);</div><div class='hunk'>@@ -806,6 +800,56 @@ static int efx_ethtool_get_class_rule(struct efx_nic *efx,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int efx_ethtool_get_rxfh_fields(struct net_device *net_dev,</div><div class='add'>+				struct ethtool_rxfh_fields *info)</div><div class='add'>+{</div><div class='add'>+	struct efx_nic *efx = efx_netdev_priv(net_dev);</div><div class='add'>+	struct efx_rss_context_priv *ctx;</div><div class='add'>+	__u64 data;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	ctx = &amp;efx-&gt;rss_context.priv;</div><div class='add'>+</div><div class='add'>+	if (info-&gt;rss_context) {</div><div class='add'>+		ctx = efx_find_rss_context_entry(efx, info-&gt;rss_context);</div><div class='add'>+		if (!ctx)</div><div class='add'>+			return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = 0;</div><div class='add'>+	if (!efx_rss_active(ctx)) /* No RSS */</div><div class='add'>+		goto out_setdata_unlock;</div><div class='add'>+</div><div class='add'>+	switch (info-&gt;flow_type) {</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+		if (ctx-&gt;rx_hash_udp_4tuple)</div><div class='add'>+			data = (RXH_L4_B_0_1 | RXH_L4_B_2_3 |</div><div class='add'>+				RXH_IP_SRC | RXH_IP_DST);</div><div class='add'>+		else</div><div class='add'>+			data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+		data = (RXH_L4_B_0_1 | RXH_L4_B_2_3 |</div><div class='add'>+			RXH_IP_SRC | RXH_IP_DST);</div><div class='add'>+		break;</div><div class='add'>+	case SCTP_V4_FLOW:</div><div class='add'>+	case SCTP_V6_FLOW:</div><div class='add'>+	case AH_ESP_V4_FLOW:</div><div class='add'>+	case AH_ESP_V6_FLOW:</div><div class='add'>+	case IPV4_FLOW:</div><div class='add'>+	case IPV6_FLOW:</div><div class='add'>+		data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+out_setdata_unlock:</div><div class='add'>+	info-&gt;data = data;</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int efx_ethtool_get_rxnfc(struct net_device *net_dev,</div><div class='ctx'> 			  struct ethtool_rxnfc *info, u32 *rule_locs)</div><div class='ctx'> {</div><div class='hunk'>@@ -818,55 +862,6 @@ int efx_ethtool_get_rxnfc(struct net_device *net_dev,</div><div class='ctx'> 		info-&gt;data = efx-&gt;n_rx_channels;</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	case ETHTOOL_GRXFH: {</div><div class='del'>-		struct efx_rss_context_priv *ctx = &amp;efx-&gt;rss_context.priv;</div><div class='del'>-		__u64 data;</div><div class='del'>-</div><div class='del'>-		mutex_lock(&amp;net_dev-&gt;ethtool-&gt;rss_lock);</div><div class='del'>-		if (info-&gt;flow_type &amp; FLOW_RSS &amp;&amp; info-&gt;rss_context) {</div><div class='del'>-			ctx = efx_find_rss_context_entry(efx, info-&gt;rss_context);</div><div class='del'>-			if (!ctx) {</div><div class='del'>-				rc = -ENOENT;</div><div class='del'>-				goto out_unlock;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		data = 0;</div><div class='del'>-		if (!efx_rss_active(ctx)) /* No RSS */</div><div class='del'>-			goto out_setdata_unlock;</div><div class='del'>-</div><div class='del'>-		switch (info-&gt;flow_type &amp; ~FLOW_RSS) {</div><div class='del'>-		case UDP_V4_FLOW:</div><div class='del'>-		case UDP_V6_FLOW:</div><div class='del'>-			if (ctx-&gt;rx_hash_udp_4tuple)</div><div class='del'>-				data = (RXH_L4_B_0_1 | RXH_L4_B_2_3 |</div><div class='del'>-					RXH_IP_SRC | RXH_IP_DST);</div><div class='del'>-			else</div><div class='del'>-				data = RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		case TCP_V4_FLOW:</div><div class='del'>-		case TCP_V6_FLOW:</div><div class='del'>-			data = (RXH_L4_B_0_1 | RXH_L4_B_2_3 |</div><div class='del'>-				RXH_IP_SRC | RXH_IP_DST);</div><div class='del'>-			break;</div><div class='del'>-		case SCTP_V4_FLOW:</div><div class='del'>-		case SCTP_V6_FLOW:</div><div class='del'>-		case AH_ESP_V4_FLOW:</div><div class='del'>-		case AH_ESP_V6_FLOW:</div><div class='del'>-		case IPV4_FLOW:</div><div class='del'>-		case IPV6_FLOW:</div><div class='del'>-			data = RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-out_setdata_unlock:</div><div class='del'>-		info-&gt;data = data;</div><div class='del'>-out_unlock:</div><div class='del'>-		mutex_unlock(&amp;net_dev-&gt;ethtool-&gt;rss_lock);</div><div class='del'>-		return rc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		info-&gt;data = efx_filter_get_rx_id_limit(efx);</div><div class='ctx'> 		if (info-&gt;data == 0)</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ethtool_common.h b/drivers/net/ethernet/sfc/ethtool_common.h<br/>index fc52e891637d..24db4fccbe78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ethtool_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ethtool_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ethtool_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/ethtool_common.h</a></div><div class='hunk'>@@ -49,6 +49,8 @@ int efx_ethtool_get_rxfh(struct net_device *net_dev,</div><div class='ctx'> int efx_ethtool_set_rxfh(struct net_device *net_dev,</div><div class='ctx'> 			 struct ethtool_rxfh_param *rxfh,</div><div class='ctx'> 			 struct netlink_ext_ack *extack);</div><div class='add'>+int efx_ethtool_get_rxfh_fields(struct net_device *net_dev,</div><div class='add'>+				struct ethtool_rxfh_fields *info);</div><div class='ctx'> int efx_ethtool_create_rxfh_context(struct net_device *net_dev,</div><div class='ctx'> 				    struct ethtool_rxfh_context *ctx,</div><div class='ctx'> 				    const struct ethtool_rxfh_param *rxfh,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/efx.c b/drivers/net/ethernet/sfc/falcon/efx.c<br/>index 8925745f1c17..6ea41f6c9ef5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/efx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/efx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/efx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/efx.c</a></div><div class='hunk'>@@ -1394,9 +1394,8 @@ static int ef4_probe_interrupts(struct ef4_nic *efx)</div><div class='ctx'> 			if (n_channels &gt; extra_channels)</div><div class='ctx'> 				n_channels -= extra_channels;</div><div class='ctx'> 			if (ef4_separate_tx_channels) {</div><div class='del'>-				efx-&gt;n_tx_channels = min(max(n_channels / 2,</div><div class='del'>-							     1U),</div><div class='del'>-							 efx-&gt;max_tx_channels);</div><div class='add'>+				efx-&gt;n_tx_channels = clamp(n_channels / 2, 1U,</div><div class='add'>+							   efx-&gt;max_tx_channels);</div><div class='ctx'> 				efx-&gt;n_rx_channels = max(n_channels -</div><div class='ctx'> 							 efx-&gt;n_tx_channels,</div><div class='ctx'> 							 1U);</div><div class='hunk'>@@ -1886,14 +1885,6 @@ unsigned int ef4_usecs_to_ticks(struct ef4_nic *efx, unsigned int usecs)</div><div class='ctx'> 	return usecs * 1000 / efx-&gt;timer_quantum_ns;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-unsigned int ef4_ticks_to_usecs(struct ef4_nic *efx, unsigned int ticks)</div><div class='del'>-{</div><div class='del'>-	/* We must round up when converting ticks to microseconds</div><div class='del'>-	 * because we round down when converting the other way.</div><div class='del'>-	 */</div><div class='del'>-	return DIV_ROUND_UP(ticks * efx-&gt;timer_quantum_ns, 1000);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Set interrupt moderation parameters */</div><div class='ctx'> int ef4_init_irq_moderation(struct ef4_nic *efx, unsigned int tx_usecs,</div><div class='ctx'> 			    unsigned int rx_usecs, bool rx_adaptive,</div><div class='hunk'>@@ -3136,9 +3127,6 @@ out:</div><div class='ctx'> </div><div class='ctx'> /* For simplicity and reliability, we always require a slot reset and try to</div><div class='ctx'>  * reset the hardware when a pci error affecting the device is detected.</div><div class='del'>- * We leave both the link_reset and mmio_enabled callback unimplemented:</div><div class='del'>- * with our request for slot reset the mmio_enabled callback will never be</div><div class='del'>- * called, and the link_reset callback is not used by AER or EEH mechanisms.</div><div class='ctx'>  */</div><div class='ctx'> static const struct pci_error_handlers ef4_err_handlers = {</div><div class='ctx'> 	.error_detected = ef4_io_error_detected,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/efx.h b/drivers/net/ethernet/sfc/falcon/efx.h<br/>index d3b4646545fa..52508f2c8cb2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/efx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/efx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/efx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/efx.h</a></div><div class='hunk'>@@ -198,7 +198,6 @@ int ef4_try_recovery(struct ef4_nic *efx);</div><div class='ctx'> /* Global */</div><div class='ctx'> void ef4_schedule_reset(struct ef4_nic *efx, enum reset_type type);</div><div class='ctx'> unsigned int ef4_usecs_to_ticks(struct ef4_nic *efx, unsigned int usecs);</div><div class='del'>-unsigned int ef4_ticks_to_usecs(struct ef4_nic *efx, unsigned int ticks);</div><div class='ctx'> int ef4_init_irq_moderation(struct ef4_nic *efx, unsigned int tx_usecs,</div><div class='ctx'> 			    unsigned int rx_usecs, bool rx_adaptive,</div><div class='ctx'> 			    bool rx_may_override_tx);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/ethtool.c b/drivers/net/ethernet/sfc/falcon/ethtool.c<br/>index f4db683b80f7..27d1cd6f24ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/ethtool.c</a></div><div class='hunk'>@@ -353,7 +353,7 @@ static int ef4_ethtool_fill_self_tests(struct ef4_nic *efx,</div><div class='ctx'> 	return n;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static size_t ef4_describe_per_queue_stats(struct ef4_nic *efx, u8 *strings)</div><div class='add'>+static size_t ef4_describe_per_queue_stats(struct ef4_nic *efx, u8 **strings)</div><div class='ctx'> {</div><div class='ctx'> 	size_t n_stats = 0;</div><div class='ctx'> 	struct ef4_channel *channel;</div><div class='hunk'>@@ -361,24 +361,22 @@ static size_t ef4_describe_per_queue_stats(struct ef4_nic *efx, u8 *strings)</div><div class='ctx'> 	ef4_for_each_channel(channel, efx) {</div><div class='ctx'> 		if (ef4_channel_has_tx_queues(channel)) {</div><div class='ctx'> 			n_stats++;</div><div class='del'>-			if (strings != NULL) {</div><div class='del'>-				snprintf(strings, ETH_GSTRING_LEN,</div><div class='del'>-					 "tx-%u.tx_packets",</div><div class='del'>-					 channel-&gt;tx_queue[0].queue /</div><div class='del'>-					 EF4_TXQ_TYPES);</div><div class='add'>+			if (!strings)</div><div class='add'>+				continue;</div><div class='ctx'> </div><div class='del'>-				strings += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='add'>+			ethtool_sprintf(strings, "tx-%u.tx_packets",</div><div class='add'>+					channel-&gt;tx_queue[0].queue /</div><div class='add'>+						EF4_TXQ_TYPES);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	ef4_for_each_channel(channel, efx) {</div><div class='ctx'> 		if (ef4_channel_has_rx_queue(channel)) {</div><div class='ctx'> 			n_stats++;</div><div class='del'>-			if (strings != NULL) {</div><div class='del'>-				snprintf(strings, ETH_GSTRING_LEN,</div><div class='del'>-					 "rx-%d.rx_packets", channel-&gt;channel);</div><div class='del'>-				strings += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='add'>+			if (!strings)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ethtool_sprintf(strings, "rx-%d.rx_packets",</div><div class='add'>+					channel-&gt;channel);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return n_stats;</div><div class='hunk'>@@ -409,14 +407,10 @@ static void ef4_ethtool_get_strings(struct net_device *net_dev,</div><div class='ctx'> </div><div class='ctx'> 	switch (string_set) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='del'>-		strings += (efx-&gt;type-&gt;describe_stats(efx, strings) *</div><div class='del'>-			    ETH_GSTRING_LEN);</div><div class='add'>+		efx-&gt;type-&gt;describe_stats(efx, &amp;strings);</div><div class='ctx'> 		for (i = 0; i &lt; EF4_ETHTOOL_SW_STAT_COUNT; i++)</div><div class='del'>-			strscpy(strings + i * ETH_GSTRING_LEN,</div><div class='del'>-				ef4_sw_stat_desc[i].name, ETH_GSTRING_LEN);</div><div class='del'>-		strings += EF4_ETHTOOL_SW_STAT_COUNT * ETH_GSTRING_LEN;</div><div class='del'>-		strings += (ef4_describe_per_queue_stats(efx, strings) *</div><div class='del'>-			    ETH_GSTRING_LEN);</div><div class='add'>+			ethtool_puts(&amp;strings, ef4_sw_stat_desc[i].name);</div><div class='add'>+		ef4_describe_per_queue_stats(efx, &amp;strings);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ETH_SS_TEST:</div><div class='ctx'> 		ef4_ethtool_fill_self_tests(efx, NULL, strings, NULL);</div><div class='hunk'>@@ -950,6 +944,37 @@ static int ef4_ethtool_get_class_rule(struct ef4_nic *efx,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='add'>+ef4_ethtool_get_rxfh_fields(struct net_device *net_dev,</div><div class='add'>+			    struct ethtool_rxfh_fields *info)</div><div class='add'>+{</div><div class='add'>+	struct ef4_nic *efx = netdev_priv(net_dev);</div><div class='add'>+</div><div class='add'>+	info-&gt;data = 0;</div><div class='add'>+	/* Falcon A0 and A1 had a 4-tuple hash for TCP and UDP, but it was</div><div class='add'>+	 * broken so we do not enable it.</div><div class='add'>+	 * Falcon B0 adds a Toeplitz hash, 4-tuple for TCP and 2-tuple for</div><div class='add'>+	 * other IPv4, including UDP.</div><div class='add'>+	 * See falcon_init_rx_cfg().</div><div class='add'>+	 */</div><div class='add'>+	if (ef4_nic_rev(efx) &lt; EF4_REV_FALCON_B0)</div><div class='add'>+		return 0;</div><div class='add'>+	switch (info-&gt;flow_type) {</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+		info-&gt;data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+	case SCTP_V4_FLOW:</div><div class='add'>+	case AH_ESP_V4_FLOW:</div><div class='add'>+	case IPV4_FLOW:</div><div class='add'>+		info-&gt;data |= RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='ctx'> ef4_ethtool_get_rxnfc(struct net_device *net_dev,</div><div class='ctx'> 		      struct ethtool_rxnfc *info, u32 *rule_locs)</div><div class='ctx'> {</div><div class='hunk'>@@ -960,29 +985,6 @@ ef4_ethtool_get_rxnfc(struct net_device *net_dev,</div><div class='ctx'> 		info-&gt;data = efx-&gt;n_rx_channels;</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	case ETHTOOL_GRXFH: {</div><div class='del'>-		unsigned min_revision = 0;</div><div class='del'>-</div><div class='del'>-		info-&gt;data = 0;</div><div class='del'>-		switch (info-&gt;flow_type) {</div><div class='del'>-		case TCP_V4_FLOW:</div><div class='del'>-			info-&gt;data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='del'>-			fallthrough;</div><div class='del'>-		case UDP_V4_FLOW:</div><div class='del'>-		case SCTP_V4_FLOW:</div><div class='del'>-		case AH_ESP_V4_FLOW:</div><div class='del'>-		case IPV4_FLOW:</div><div class='del'>-			info-&gt;data |= RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			min_revision = EF4_REV_FALCON_B0;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (ef4_nic_rev(efx) &lt; min_revision)</div><div class='del'>-			info-&gt;data = 0;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		info-&gt;data = ef4_filter_get_rx_id_limit(efx);</div><div class='ctx'> 		if (info-&gt;data == 0)</div><div class='hunk'>@@ -1349,6 +1351,7 @@ const struct ethtool_ops ef4_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size	= ef4_ethtool_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh		= ef4_ethtool_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= ef4_ethtool_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= ef4_ethtool_get_rxfh_fields,</div><div class='ctx'> 	.get_module_info	= ef4_ethtool_get_module_info,</div><div class='ctx'> 	.get_module_eeprom	= ef4_ethtool_get_module_eeprom,</div><div class='ctx'> 	.get_link_ksettings	= ef4_ethtool_get_link_ksettings,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/falcon.c b/drivers/net/ethernet/sfc/falcon/falcon.c<br/>index 36114ce88034..c44df8e4dd30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/falcon.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/falcon.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/falcon.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/falcon.c</a></div><div class='hunk'>@@ -1453,8 +1453,8 @@ static void falcon_stats_complete(struct ef4_nic *efx)</div><div class='ctx'> </div><div class='ctx'> static void falcon_stats_timer_func(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct falcon_nic_data *nic_data = from_timer(nic_data, t,</div><div class='del'>-						      stats_timer);</div><div class='add'>+	struct falcon_nic_data *nic_data = timer_container_of(nic_data, t,</div><div class='add'>+							      stats_timer);</div><div class='ctx'> 	struct ef4_nic *efx = nic_data-&gt;efx;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;efx-&gt;stats_lock);</div><div class='hunk'>@@ -2564,7 +2564,7 @@ static void falcon_remove_nic(struct ef4_nic *efx)</div><div class='ctx'> 	efx-&gt;nic_data = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static size_t falcon_describe_nic_stats(struct ef4_nic *efx, u8 *names)</div><div class='add'>+static size_t falcon_describe_nic_stats(struct ef4_nic *efx, u8 **names)</div><div class='ctx'> {</div><div class='ctx'> 	return ef4_nic_describe_stats(falcon_stat_desc, FALCON_STAT_COUNT,</div><div class='ctx'> 				      falcon_stat_mask, names);</div><div class='hunk'>@@ -2657,7 +2657,7 @@ void falcon_stop_nic_stats(struct ef4_nic *efx)</div><div class='ctx'> 	++nic_data-&gt;stats_disable_count;</div><div class='ctx'> 	spin_unlock_bh(&amp;efx-&gt;stats_lock);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;nic_data-&gt;stats_timer);</div><div class='add'>+	timer_delete_sync(&amp;nic_data-&gt;stats_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait enough time for the most recent transfer to</div><div class='ctx'> 	 * complete. */</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/farch.c b/drivers/net/ethernet/sfc/falcon/farch.c<br/>index c64623c2e80c..01017c41338e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/farch.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/farch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/farch.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/farch.c</a></div><div class='hunk'>@@ -1631,28 +1631,6 @@ void ef4_farch_rx_push_indir_table(struct ef4_nic *efx)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Looks at available SRAM resources and works out how many queues we</div><div class='del'>- * can support, and where things like descriptor caches should live.</div><div class='del'>- *</div><div class='del'>- * SRAM is split up as follows:</div><div class='del'>- * 0                          buftbl entries for channels</div><div class='del'>- * efx-&gt;vf_buftbl_base        buftbl entries for SR-IOV</div><div class='del'>- * efx-&gt;rx_dc_base            RX descriptor caches</div><div class='del'>- * efx-&gt;tx_dc_base            TX descriptor caches</div><div class='del'>- */</div><div class='del'>-void ef4_farch_dimension_resources(struct ef4_nic *efx, unsigned sram_lim_qw)</div><div class='del'>-{</div><div class='del'>-	unsigned vi_count;</div><div class='del'>-</div><div class='del'>-	/* Account for the buffer table entries backing the datapath channels</div><div class='del'>-	 * and the descriptor caches for those channels.</div><div class='del'>-	 */</div><div class='del'>-	vi_count = max(efx-&gt;n_channels, efx-&gt;n_tx_channels * EF4_TXQ_TYPES);</div><div class='del'>-</div><div class='del'>-	efx-&gt;tx_dc_base = sram_lim_qw - vi_count * TX_DC_ENTRIES;</div><div class='del'>-	efx-&gt;rx_dc_base = efx-&gt;tx_dc_base - vi_count * RX_DC_ENTRIES;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> u32 ef4_farch_fpga_ver(struct ef4_nic *efx)</div><div class='ctx'> {</div><div class='ctx'> 	ef4_oword_t altera_build;</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/net_driver.h b/drivers/net/ethernet/sfc/falcon/net_driver.h<br/>index a2c7139f2b32..7ab0db44720d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/net_driver.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/net_driver.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/net_driver.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/net_driver.h</a></div><div class='hunk'>@@ -1057,7 +1057,7 @@ struct ef4_nic_type {</div><div class='ctx'> 	void (*finish_flush)(struct ef4_nic *efx);</div><div class='ctx'> 	void (*prepare_flr)(struct ef4_nic *efx);</div><div class='ctx'> 	void (*finish_flr)(struct ef4_nic *efx);</div><div class='del'>-	size_t (*describe_stats)(struct ef4_nic *efx, u8 *names);</div><div class='add'>+	size_t (*describe_stats)(struct ef4_nic *efx, u8 **names);</div><div class='ctx'> 	size_t (*update_stats)(struct ef4_nic *efx, u64 *full_stats,</div><div class='ctx'> 			       struct rtnl_link_stats64 *core_stats);</div><div class='ctx'> 	void (*start_stats)(struct ef4_nic *efx);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/nic.c b/drivers/net/ethernet/sfc/falcon/nic.c<br/>index 78c851b5a56f..a6304686bc90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/nic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/nic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/nic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/nic.c</a></div><div class='hunk'>@@ -444,18 +444,15 @@ void ef4_nic_get_regs(struct ef4_nic *efx, void *buf)</div><div class='ctx'>  * bits in the first @count bits of @mask for which a name is defined.</div><div class='ctx'>  */</div><div class='ctx'> size_t ef4_nic_describe_stats(const struct ef4_hw_stat_desc *desc, size_t count,</div><div class='del'>-			      const unsigned long *mask, u8 *names)</div><div class='add'>+			      const unsigned long *mask, u8 **names)</div><div class='ctx'> {</div><div class='ctx'> 	size_t visible = 0;</div><div class='ctx'> 	size_t index;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(index, mask, count) {</div><div class='ctx'> 		if (desc[index].name) {</div><div class='del'>-			if (names) {</div><div class='del'>-				strscpy(names, desc[index].name,</div><div class='del'>-					ETH_GSTRING_LEN);</div><div class='del'>-				names += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='add'>+			if (names)</div><div class='add'>+				ethtool_puts(names, desc[index].name);</div><div class='ctx'> 			++visible;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -511,14 +508,3 @@ void ef4_nic_update_stats(const struct ef4_hw_stat_desc *desc, size_t count,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-void ef4_nic_fix_nodesc_drop_stat(struct ef4_nic *efx, u64 *rx_nodesc_drops)</div><div class='del'>-{</div><div class='del'>-	/* if down, or this is the first update after coming up */</div><div class='del'>-	if (!(efx-&gt;net_dev-&gt;flags &amp; IFF_UP) || !efx-&gt;rx_nodesc_drops_prev_state)</div><div class='del'>-		efx-&gt;rx_nodesc_drops_while_down +=</div><div class='del'>-			*rx_nodesc_drops - efx-&gt;rx_nodesc_drops_total;</div><div class='del'>-	efx-&gt;rx_nodesc_drops_total = *rx_nodesc_drops;</div><div class='del'>-	efx-&gt;rx_nodesc_drops_prev_state = !!(efx-&gt;net_dev-&gt;flags &amp; IFF_UP);</div><div class='del'>-	*rx_nodesc_drops -= efx-&gt;rx_nodesc_drops_while_down;</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/nic.h b/drivers/net/ethernet/sfc/falcon/nic.h<br/>index ada6e036fd97..bc6ef937d0fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/nic.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/nic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/nic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/nic.h</a></div><div class='hunk'>@@ -477,7 +477,6 @@ void ef4_farch_finish_flr(struct ef4_nic *efx);</div><div class='ctx'> void falcon_start_nic_stats(struct ef4_nic *efx);</div><div class='ctx'> void falcon_stop_nic_stats(struct ef4_nic *efx);</div><div class='ctx'> int falcon_reset_xaui(struct ef4_nic *efx);</div><div class='del'>-void ef4_farch_dimension_resources(struct ef4_nic *efx, unsigned sram_lim_qw);</div><div class='ctx'> void ef4_farch_init_common(struct ef4_nic *efx);</div><div class='ctx'> void ef4_farch_rx_push_indir_table(struct ef4_nic *efx);</div><div class='ctx'> </div><div class='hunk'>@@ -498,14 +497,10 @@ size_t ef4_nic_get_regs_len(struct ef4_nic *efx);</div><div class='ctx'> void ef4_nic_get_regs(struct ef4_nic *efx, void *buf);</div><div class='ctx'> </div><div class='ctx'> size_t ef4_nic_describe_stats(const struct ef4_hw_stat_desc *desc, size_t count,</div><div class='del'>-			      const unsigned long *mask, u8 *names);</div><div class='add'>+			      const unsigned long *mask, u8 **names);</div><div class='ctx'> void ef4_nic_update_stats(const struct ef4_hw_stat_desc *desc, size_t count,</div><div class='ctx'> 			  const unsigned long *mask, u64 *stats,</div><div class='ctx'> 			  const void *dma_buf, bool accumulate);</div><div class='del'>-void ef4_nic_fix_nodesc_drop_stat(struct ef4_nic *efx, u64 *stat);</div><div class='del'>-</div><div class='del'>-#define EF4_MAX_FLUSH_TIME 5000</div><div class='del'>-</div><div class='ctx'> void ef4_farch_generate_event(struct ef4_nic *efx, unsigned int evq,</div><div class='ctx'> 			      ef4_qword_t *event);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/rx.c b/drivers/net/ethernet/sfc/falcon/rx.c<br/>index 6bbdb5d2eebf..f69fcf6caca8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/rx.c</a></div><div class='hunk'>@@ -382,7 +382,8 @@ void ef4_fast_push_rx_descriptors(struct ef4_rx_queue *rx_queue, bool atomic)</div><div class='ctx'> </div><div class='ctx'> void ef4_rx_slow_fill(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ef4_rx_queue *rx_queue = from_timer(rx_queue, t, slow_fill);</div><div class='add'>+	struct ef4_rx_queue *rx_queue = timer_container_of(rx_queue, t,</div><div class='add'>+							   slow_fill);</div><div class='ctx'> </div><div class='ctx'> 	/* Post an event to cause NAPI to run and refill the queue */</div><div class='ctx'> 	ef4_nic_generate_fill_event(rx_queue);</div><div class='hunk'>@@ -791,7 +792,7 @@ void ef4_fini_rx_queue(struct ef4_rx_queue *rx_queue)</div><div class='ctx'> 	netif_dbg(rx_queue-&gt;efx, drv, rx_queue-&gt;efx-&gt;net_dev,</div><div class='ctx'> 		  "shutting down RX queue %d\n", ef4_rx_queue_index(rx_queue));</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;rx_queue-&gt;slow_fill);</div><div class='add'>+	timer_delete_sync(&amp;rx_queue-&gt;slow_fill);</div><div class='ctx'> </div><div class='ctx'> 	/* Release RX buffers from the current read ptr to the write ptr */</div><div class='ctx'> 	if (rx_queue-&gt;buffer) {</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/tx.c b/drivers/net/ethernet/sfc/falcon/tx.c<br/>index b9369483758c..e6e80b039ca2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/tx.c</a></div><div class='hunk'>@@ -40,14 +40,6 @@ static inline u8 *ef4_tx_get_copy_buffer(struct ef4_tx_queue *tx_queue,</div><div class='ctx'> 	return (u8 *)page_buf-&gt;addr + offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u8 *ef4_tx_get_copy_buffer_limited(struct ef4_tx_queue *tx_queue,</div><div class='del'>-				   struct ef4_tx_buffer *buffer, size_t len)</div><div class='del'>-{</div><div class='del'>-	if (len &gt; EF4_TX_CB_SIZE)</div><div class='del'>-		return NULL;</div><div class='del'>-	return ef4_tx_get_copy_buffer(tx_queue, buffer);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void ef4_dequeue_buffer(struct ef4_tx_queue *tx_queue,</div><div class='ctx'> 			       struct ef4_tx_buffer *buffer,</div><div class='ctx'> 			       unsigned int *pkts_compl,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/falcon/tx.h b/drivers/net/ethernet/sfc/falcon/tx.h<br/>index 2a88c59cbbbe..868ed8a861ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/tx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/falcon/tx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/falcon/tx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/falcon/tx.h</a></div><div class='hunk'>@@ -15,9 +15,6 @@</div><div class='ctx'> unsigned int ef4_tx_limit_len(struct ef4_tx_queue *tx_queue,</div><div class='ctx'> 			      dma_addr_t dma_addr, unsigned int len);</div><div class='ctx'> </div><div class='del'>-u8 *ef4_tx_get_copy_buffer_limited(struct ef4_tx_queue *tx_queue,</div><div class='del'>-				   struct ef4_tx_buffer *buffer, size_t len);</div><div class='del'>-</div><div class='ctx'> int ef4_enqueue_skb_tso(struct ef4_tx_queue *tx_queue, struct sk_buff *skb,</div><div class='ctx'> 			bool *data_mapped);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sfc/fw_formats.h b/drivers/net/ethernet/sfc/fw_formats.h<br/>new file mode 100644<br/>index 000000000000..cbc350c96013<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/fw_formats.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/fw_formats.h</a></div><div class='hunk'>@@ -0,0 +1,114 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/****************************************************************************</div><div class='add'>+ * Driver for AMD network controllers and boards</div><div class='add'>+ * Copyright (C) 2025, Advanced Micro Devices, Inc.</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License version 2 as published</div><div class='add'>+ * by the Free Software Foundation, incorporated herein by reference.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _EFX_FW_FORMATS_H</div><div class='add'>+#define _EFX_FW_FORMATS_H</div><div class='add'>+</div><div class='add'>+/* Header layouts of firmware update images recognised by Efx NICs.</div><div class='add'>+ * The sources-of-truth for these layouts are AMD internal documents</div><div class='add'>+ * and sfregistry headers, neither of which are available externally</div><div class='add'>+ * nor usable directly by the driver.</div><div class='add'>+ *</div><div class='add'>+ * While each format includes a 'magic number', these are at different</div><div class='add'>+ * offsets in the various formats, and a legal header for one format</div><div class='add'>+ * could have the right value in whichever field occupies that offset</div><div class='add'>+ * to match another format's magic.</div><div class='add'>+ * Besides, some packaging formats (such as CMS/PKCS#7 signed images)</div><div class='add'>+ * prepend a header for which finding the size is a non-trivial task;</div><div class='add'>+ * rather than trying to parse those headers, we search byte-by-byte</div><div class='add'>+ * through the provided firmware image looking for a valid header.</div><div class='add'>+ * Thus, format recognition has to include validation of the checksum</div><div class='add'>+ * field, even though the firmware will validate that itself before</div><div class='add'>+ * applying the image.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* EF10 (Medford2, X2) "reflash" header format.  Defined in SF-121352-AN */</div><div class='add'>+#define EFX_REFLASH_HEADER_MAGIC_OFST 0</div><div class='add'>+#define EFX_REFLASH_HEADER_MAGIC_LEN 4</div><div class='add'>+#define EFX_REFLASH_HEADER_MAGIC_VALUE 0x106F1A5</div><div class='add'>+</div><div class='add'>+#define EFX_REFLASH_HEADER_VERSION_OFST 4</div><div class='add'>+#define EFX_REFLASH_HEADER_VERSION_LEN 4</div><div class='add'>+#define EFX_REFLASH_HEADER_VERSION_VALUE 4</div><div class='add'>+</div><div class='add'>+#define EFX_REFLASH_HEADER_FIRMWARE_TYPE_OFST 8</div><div class='add'>+#define EFX_REFLASH_HEADER_FIRMWARE_TYPE_LEN 4</div><div class='add'>+#define EFX_REFLASH_FIRMWARE_TYPE_BOOTROM 0x2</div><div class='add'>+#define EFX_REFLASH_FIRMWARE_TYPE_BUNDLE 0xd</div><div class='add'>+</div><div class='add'>+#define EFX_REFLASH_HEADER_FIRMWARE_SUBTYPE_OFST 12</div><div class='add'>+#define EFX_REFLASH_HEADER_FIRMWARE_SUBTYPE_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_REFLASH_HEADER_PAYLOAD_SIZE_OFST 16</div><div class='add'>+#define EFX_REFLASH_HEADER_PAYLOAD_SIZE_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_REFLASH_HEADER_LENGTH_OFST 20</div><div class='add'>+#define EFX_REFLASH_HEADER_LENGTH_LEN 4</div><div class='add'>+</div><div class='add'>+/* Reflash trailer */</div><div class='add'>+#define EFX_REFLASH_TRAILER_CRC_OFST 0</div><div class='add'>+#define EFX_REFLASH_TRAILER_CRC_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_REFLASH_TRAILER_LEN	\</div><div class='add'>+	(EFX_REFLASH_TRAILER_CRC_OFST + EFX_REFLASH_TRAILER_CRC_LEN)</div><div class='add'>+</div><div class='add'>+/* EF100 "SmartNIC image" header format.</div><div class='add'>+ * Defined in sfregistry "src/layout/snic_image_hdr.h".</div><div class='add'>+ */</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_MAGIC_OFST 16</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_MAGIC_LEN 4</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_MAGIC_VALUE 0x541C057A</div><div class='add'>+</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_VERSION_OFST 20</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_VERSION_LEN 4</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_VERSION_VALUE 1</div><div class='add'>+</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_LENGTH_OFST 24</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_LENGTH_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_PARTITION_TYPE_OFST 36</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_PARTITION_TYPE_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_PARTITION_SUBTYPE_OFST 40</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_PARTITION_SUBTYPE_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_PAYLOAD_SIZE_OFST 60</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_PAYLOAD_SIZE_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_CRC_OFST 64</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_CRC_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_SNICIMAGE_HEADER_MINLEN 256</div><div class='add'>+</div><div class='add'>+/* EF100 "SmartNIC bundle" header format.  Defined in SF-122606-TC */</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_MAGIC_OFST 0</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_MAGIC_LEN 4</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_MAGIC_VALUE 0xB1001001</div><div class='add'>+</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_VERSION_OFST 4</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_VERSION_LEN 4</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_VERSION_VALUE 1</div><div class='add'>+</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_BUNDLE_TYPE_OFST 8</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_BUNDLE_TYPE_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_BUNDLE_SUBTYPE_OFST 12</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_BUNDLE_SUBTYPE_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_LENGTH_OFST 20</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_LENGTH_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_CRC_OFST 224</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_CRC_LEN 4</div><div class='add'>+</div><div class='add'>+#define EFX_SNICBUNDLE_HEADER_LEN	\</div><div class='add'>+	(EFX_SNICBUNDLE_HEADER_CRC_OFST + EFX_SNICBUNDLE_HEADER_CRC_LEN)</div><div class='add'>+</div><div class='add'>+#endif /* _EFX_FW_FORMATS_H */</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/io.h b/drivers/net/ethernet/sfc/io.h<br/>index 4cc7b501135f..ef374a8e05c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/io.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/io.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/io.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/io.h</a></div><div class='hunk'>@@ -217,28 +217,4 @@ _efx_writed_page(struct efx_nic *efx, const efx_dword_t *value,</div><div class='ctx'> 					   (reg) != 0xa1c),		\</div><div class='ctx'> 			 page)</div><div class='ctx'> </div><div class='del'>-/* Write TIMER_COMMAND.  This is a page-mapped 32-bit CSR, but a bug</div><div class='del'>- * in the BIU means that writes to TIMER_COMMAND[0] invalidate the</div><div class='del'>- * collector register.</div><div class='del'>- */</div><div class='del'>-static inline void _efx_writed_page_locked(struct efx_nic *efx,</div><div class='del'>-					   const efx_dword_t *value,</div><div class='del'>-					   unsigned int reg,</div><div class='del'>-					   unsigned int page)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags __attribute__ ((unused));</div><div class='del'>-</div><div class='del'>-	if (page == 0) {</div><div class='del'>-		spin_lock_irqsave(&amp;efx-&gt;biu_lock, flags);</div><div class='del'>-		efx_writed(efx, value, efx_paged_reg(efx, page, reg));</div><div class='del'>-		spin_unlock_irqrestore(&amp;efx-&gt;biu_lock, flags);</div><div class='del'>-	} else {</div><div class='del'>-		efx_writed(efx, value, efx_paged_reg(efx, page, reg));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#define efx_writed_page_locked(efx, value, reg, page)			\</div><div class='del'>-	_efx_writed_page_locked(efx, value,				\</div><div class='del'>-				reg + BUILD_BUG_ON_ZERO((reg) != 0x420), \</div><div class='del'>-				page)</div><div class='del'>-</div><div class='ctx'> #endif /* EFX_IO_H */</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/mae.c b/drivers/net/ethernet/sfc/mae.c<br/>index 10709d828a63..7cfd9000f79d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mae.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mae.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mae.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/mae.c</a></div><div class='hunk'>@@ -76,17 +76,6 @@ void efx_mae_mport_uplink(struct efx_nic *efx __always_unused, u32 *out)</div><div class='ctx'> 	*out = EFX_DWORD_VAL(mport);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void efx_mae_mport_vf(struct efx_nic *efx __always_unused, u32 vf_id, u32 *out)</div><div class='del'>-{</div><div class='del'>-	efx_dword_t mport;</div><div class='del'>-</div><div class='del'>-	EFX_POPULATE_DWORD_3(mport,</div><div class='del'>-			     MAE_MPORT_SELECTOR_TYPE, MAE_MPORT_SELECTOR_TYPE_FUNC,</div><div class='del'>-			     MAE_MPORT_SELECTOR_FUNC_PF_ID, MAE_MPORT_SELECTOR_FUNC_PF_ID_CALLER,</div><div class='del'>-			     MAE_MPORT_SELECTOR_FUNC_VF_ID, vf_id);</div><div class='del'>-	*out = EFX_DWORD_VAL(mport);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Constructs an mport selector from an mport ID, because they're not the same */</div><div class='ctx'> void efx_mae_mport_mport(struct efx_nic *efx __always_unused, u32 mport_id, u32 *out)</div><div class='ctx'> {</div><div class='hunk'>@@ -766,7 +755,7 @@ int efx_mae_match_check_caps_lhs(struct efx_nic *efx,</div><div class='ctx'> 	rc = efx_mae_match_check_cap_typ(supported_fields[MAE_FIELD_INGRESS_PORT],</div><div class='ctx'> 					 ingress_port_mask_type);</div><div class='ctx'> 	if (rc) {</div><div class='del'>-		NL_SET_ERR_MSG_FMT_MOD(extack, "No support for %s mask in field %s\n",</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack, "No support for %s mask in field %s",</div><div class='ctx'> 				       mask_type_name(ingress_port_mask_type),</div><div class='ctx'> 				       "ingress_port");</div><div class='ctx'> 		return rc;</div><div class='hunk'>@@ -1101,6 +1090,9 @@ void efx_mae_remove_mport(void *desc, void *arg)</div><div class='ctx'> 	kfree(mport);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Takes ownership of @desc, even if it returns an error</div><div class='add'>+ */</div><div class='ctx'> static int efx_mae_process_mport(struct efx_nic *efx,</div><div class='ctx'> 				 struct mae_mport_desc *desc)</div><div class='ctx'> {</div><div class='hunk'>@@ -1111,6 +1103,7 @@ static int efx_mae_process_mport(struct efx_nic *efx,</div><div class='ctx'> 	if (!IS_ERR_OR_NULL(mport)) {</div><div class='ctx'> 		netif_err(efx, drv, efx-&gt;net_dev,</div><div class='ctx'> 			  "mport with id %u does exist!!!\n", desc-&gt;mport_id);</div><div class='add'>+		kfree(desc);</div><div class='ctx'> 		return -EEXIST;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sfc/mae.h b/drivers/net/ethernet/sfc/mae.h<br/>index 8df30bc4f3ba..db79912c86d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mae.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mae.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mae.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/mae.h</a></div><div class='hunk'>@@ -23,7 +23,6 @@ int efx_mae_free_mport(struct efx_nic *efx, u32 id);</div><div class='ctx'> </div><div class='ctx'> void efx_mae_mport_wire(struct efx_nic *efx, u32 *out);</div><div class='ctx'> void efx_mae_mport_uplink(struct efx_nic *efx, u32 *out);</div><div class='del'>-void efx_mae_mport_vf(struct efx_nic *efx, u32 vf_id, u32 *out);</div><div class='ctx'> void efx_mae_mport_mport(struct efx_nic *efx, u32 mport_id, u32 *out);</div><div class='ctx'> </div><div class='ctx'> int efx_mae_lookup_mport(struct efx_nic *efx, u32 selector, u32 *id);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/mcdi.c b/drivers/net/ethernet/sfc/mcdi.c<br/>index 76578502226e..5e9b8def5e42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mcdi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mcdi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mcdi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/mcdi.c</a></div><div class='hunk'>@@ -530,7 +530,7 @@ static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)</div><div class='ctx'> 	 * of it aborting the next request.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!timeout)</div><div class='del'>-		del_timer_sync(&amp;mcdi-&gt;async_timer);</div><div class='add'>+		timer_delete_sync(&amp;mcdi-&gt;async_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;mcdi-&gt;async_lock);</div><div class='ctx'> 	async = list_first_entry(&amp;mcdi-&gt;async_list,</div><div class='hunk'>@@ -605,7 +605,7 @@ static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,</div><div class='ctx'> </div><div class='ctx'> static void efx_mcdi_timeout_async(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct efx_mcdi_iface *mcdi = from_timer(mcdi, t, async_timer);</div><div class='add'>+	struct efx_mcdi_iface *mcdi = timer_container_of(mcdi, t, async_timer);</div><div class='ctx'> </div><div class='ctx'> 	efx_mcdi_complete_async(mcdi, true);</div><div class='ctx'> }</div><div class='hunk'>@@ -1051,15 +1051,6 @@ efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,</div><div class='ctx'> 				   cookie, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,</div><div class='del'>-			     const efx_dword_t *inbuf, size_t inlen,</div><div class='del'>-			     size_t outlen, efx_mcdi_async_completer *complete,</div><div class='del'>-			     unsigned long cookie)</div><div class='del'>-{</div><div class='del'>-	return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,</div><div class='del'>-				   cookie, true);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,</div><div class='ctx'> 			efx_dword_t *outbuf, size_t outlen,</div><div class='ctx'> 			size_t *outlen_actual)</div><div class='hunk'>@@ -1068,14 +1059,6 @@ int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,</div><div class='ctx'> 				    outlen_actual, false, NULL, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,</div><div class='del'>-			      efx_dword_t *outbuf, size_t outlen,</div><div class='del'>-			      size_t *outlen_actual)</div><div class='del'>-{</div><div class='del'>-	return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,</div><div class='del'>-				    outlen_actual, true, NULL, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,</div><div class='ctx'> 			    size_t inlen, efx_dword_t *outbuf,</div><div class='ctx'> 			    size_t outlen, int rc)</div><div class='hunk'>@@ -1139,7 +1122,7 @@ void efx_mcdi_flush_async(struct efx_nic *efx)</div><div class='ctx'> 	/* We must be in poll or fail mode so no more requests can be queued */</div><div class='ctx'> 	BUG_ON(mcdi-&gt;mode == MCDI_MODE_EVENTS);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;mcdi-&gt;async_timer);</div><div class='add'>+	timer_delete_sync(&amp;mcdi-&gt;async_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* If a request is still running, make sure we give the MC</div><div class='ctx'> 	 * time to complete it so that the response won't overwrite our</div><div class='hunk'>@@ -1642,12 +1625,15 @@ fail:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define EFX_MCDI_NVRAM_DEFAULT_WRITE_LEN 128</div><div class='add'>+</div><div class='ctx'> int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,</div><div class='ctx'> 			size_t *size_out, size_t *erase_size_out,</div><div class='del'>-			bool *protected_out)</div><div class='add'>+			size_t *write_size_out, bool *protected_out)</div><div class='ctx'> {</div><div class='ctx'> 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);</div><div class='del'>-	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);</div><div class='add'>+	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_V2_OUT_LEN);</div><div class='add'>+	size_t write_size = 0;</div><div class='ctx'> 	size_t outlen;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='hunk'>@@ -1662,6 +1648,12 @@ int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (outlen &gt;= MC_CMD_NVRAM_INFO_V2_OUT_LEN)</div><div class='add'>+		write_size = MCDI_DWORD(outbuf, NVRAM_INFO_V2_OUT_WRITESIZE);</div><div class='add'>+	else</div><div class='add'>+		write_size = EFX_MCDI_NVRAM_DEFAULT_WRITE_LEN;</div><div class='add'>+</div><div class='add'>+	*write_size_out = write_size;</div><div class='ctx'> 	*size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);</div><div class='ctx'> 	*erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);</div><div class='ctx'> 	*protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &amp;</div><div class='hunk'>@@ -1982,33 +1974,6 @@ efx_mcdi_wol_filter_set_magic(struct efx_nic *efx,  const u8 *mac, int *id_out)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)</div><div class='del'>-{</div><div class='del'>-	MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);</div><div class='del'>-	size_t outlen;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,</div><div class='del'>-			  outbuf, sizeof(outbuf), &amp;outlen);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto fail;</div><div class='del'>-</div><div class='del'>-	if (outlen &lt; MC_CMD_WOL_FILTER_GET_OUT_LEN) {</div><div class='del'>-		rc = -EIO;</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-fail:</div><div class='del'>-	*id_out = -1;</div><div class='del'>-	netif_err(efx, hw, efx-&gt;net_dev, "%s: failed rc=%d\n", __func__, rc);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)</div><div class='ctx'> {</div><div class='ctx'> 	MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);</div><div class='hunk'>@@ -2021,38 +1986,6 @@ int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int efx_mcdi_flush_rxqs(struct efx_nic *efx)</div><div class='del'>-{</div><div class='del'>-	struct efx_channel *channel;</div><div class='del'>-	struct efx_rx_queue *rx_queue;</div><div class='del'>-	MCDI_DECLARE_BUF(inbuf,</div><div class='del'>-			 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));</div><div class='del'>-	int rc, count;</div><div class='del'>-</div><div class='del'>-	BUILD_BUG_ON(EFX_MAX_CHANNELS &gt;</div><div class='del'>-		     MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);</div><div class='del'>-</div><div class='del'>-	count = 0;</div><div class='del'>-	efx_for_each_channel(channel, efx) {</div><div class='del'>-		efx_for_each_channel_rx_queue(rx_queue, channel) {</div><div class='del'>-			if (rx_queue-&gt;flush_pending) {</div><div class='del'>-				rx_queue-&gt;flush_pending = false;</div><div class='del'>-				atomic_dec(&amp;efx-&gt;rxq_flush_pending);</div><div class='del'>-				MCDI_SET_ARRAY_DWORD(</div><div class='del'>-					inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,</div><div class='del'>-					count, efx_rx_queue_index(rx_queue));</div><div class='del'>-				count++;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,</div><div class='del'>-			  MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);</div><div class='del'>-	WARN_ON(rc &lt; 0);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int efx_mcdi_wol_filter_reset(struct efx_nic *efx)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -2239,11 +2172,9 @@ out_free:</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SFC_MTD</div><div class='del'>-</div><div class='ctx'> #define EFX_MCDI_NVRAM_LEN_MAX 128</div><div class='ctx'> </div><div class='del'>-static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)</div><div class='add'>+int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)</div><div class='ctx'> {</div><div class='ctx'> 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_V2_IN_LEN);</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -2261,6 +2192,8 @@ static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_SFC_MTD</div><div class='add'>+</div><div class='ctx'> static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,</div><div class='ctx'> 			       loff_t offset, u8 *buffer, size_t length)</div><div class='ctx'> {</div><div class='hunk'>@@ -2285,13 +2218,20 @@ static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,</div><div class='del'>-				loff_t offset, const u8 *buffer, size_t length)</div><div class='add'>+#endif /* CONFIG_SFC_MTD */</div><div class='add'>+</div><div class='add'>+int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,</div><div class='add'>+			 loff_t offset, const u8 *buffer, size_t length)</div><div class='ctx'> {</div><div class='del'>-	MCDI_DECLARE_BUF(inbuf,</div><div class='del'>-			 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));</div><div class='add'>+	efx_dword_t *inbuf;</div><div class='add'>+	size_t inlen;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='add'>+	inlen = ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4);</div><div class='add'>+	inbuf = kzalloc(inlen, GFP_KERNEL);</div><div class='add'>+	if (!inbuf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);</div><div class='ctx'> 	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);</div><div class='ctx'> 	MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);</div><div class='hunk'>@@ -2299,14 +2239,14 @@ static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);</div><div class='ctx'> </div><div class='del'>-	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,</div><div class='del'>-			  ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),</div><div class='del'>-			  NULL, 0, NULL);</div><div class='add'>+	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, inlen, NULL, 0, NULL);</div><div class='add'>+	kfree(inbuf);</div><div class='add'>+</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,</div><div class='del'>-				loff_t offset, size_t length)</div><div class='add'>+int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, loff_t offset,</div><div class='add'>+			 size_t length)</div><div class='ctx'> {</div><div class='ctx'> 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);</div><div class='ctx'> 	int rc;</div><div class='hunk'>@@ -2322,7 +2262,8 @@ static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)</div><div class='add'>+int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type,</div><div class='add'>+				 enum efx_update_finish_mode mode)</div><div class='ctx'> {</div><div class='ctx'> 	MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN);</div><div class='ctx'> 	MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN);</div><div class='hunk'>@@ -2330,22 +2271,41 @@ static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)</div><div class='ctx'> 	int rc, rc2;</div><div class='ctx'> </div><div class='ctx'> 	MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);</div><div class='del'>-	/* Always set this flag. Old firmware ignores it */</div><div class='del'>-	MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_FINISH_V2_IN_FLAGS,</div><div class='add'>+</div><div class='add'>+	/* Old firmware doesn't support background update finish and abort</div><div class='add'>+	 * operations. Fallback to waiting if the requested mode is not</div><div class='add'>+	 * supported.</div><div class='add'>+	 */</div><div class='add'>+	if (!efx_has_cap(efx, NVRAM_UPDATE_POLL_VERIFY_RESULT) ||</div><div class='add'>+	    (!efx_has_cap(efx, NVRAM_UPDATE_ABORT_SUPPORTED) &amp;&amp;</div><div class='add'>+	     mode == EFX_UPDATE_FINISH_ABORT))</div><div class='add'>+		mode = EFX_UPDATE_FINISH_WAIT;</div><div class='add'>+</div><div class='add'>+	MCDI_POPULATE_DWORD_4(inbuf, NVRAM_UPDATE_FINISH_V2_IN_FLAGS,</div><div class='ctx'> 			      NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT,</div><div class='del'>-			      1);</div><div class='add'>+			      (mode != EFX_UPDATE_FINISH_ABORT),</div><div class='add'>+			      NVRAM_UPDATE_FINISH_V2_IN_FLAG_RUN_IN_BACKGROUND,</div><div class='add'>+			      (mode == EFX_UPDATE_FINISH_BACKGROUND),</div><div class='add'>+			      NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT,</div><div class='add'>+			      (mode == EFX_UPDATE_FINISH_POLL),</div><div class='add'>+			      NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT,</div><div class='add'>+			      (mode == EFX_UPDATE_FINISH_ABORT));</div><div class='ctx'> </div><div class='ctx'> 	rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),</div><div class='ctx'> 			  outbuf, sizeof(outbuf), &amp;outlen);</div><div class='ctx'> 	if (!rc &amp;&amp; outlen &gt;= MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) {</div><div class='ctx'> 		rc2 = MCDI_DWORD(outbuf, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE);</div><div class='del'>-		if (rc2 != MC_CMD_NVRAM_VERIFY_RC_SUCCESS)</div><div class='add'>+		if (rc2 != MC_CMD_NVRAM_VERIFY_RC_SUCCESS &amp;&amp;</div><div class='add'>+		    rc2 != MC_CMD_NVRAM_VERIFY_RC_PENDING)</div><div class='ctx'> 			netif_err(efx, drv, efx-&gt;net_dev,</div><div class='ctx'> 				  "NVRAM update failed verification with code 0x%x\n",</div><div class='ctx'> 				  rc2);</div><div class='ctx'> 		switch (rc2) {</div><div class='ctx'> 		case MC_CMD_NVRAM_VERIFY_RC_SUCCESS:</div><div class='ctx'> 			break;</div><div class='add'>+		case MC_CMD_NVRAM_VERIFY_RC_PENDING:</div><div class='add'>+			rc = -EAGAIN;</div><div class='add'>+			break;</div><div class='ctx'> 		case MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED:</div><div class='ctx'> 		case MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED:</div><div class='ctx'> 		case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED:</div><div class='hunk'>@@ -2360,6 +2320,8 @@ static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)</div><div class='ctx'> 		case MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES:</div><div class='ctx'> 		case MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS:</div><div class='ctx'> 		case MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH:</div><div class='add'>+		case MC_CMD_NVRAM_VERIFY_RC_REJECT_TEST_SIGNED:</div><div class='add'>+		case MC_CMD_NVRAM_VERIFY_RC_SECURITY_LEVEL_DOWNGRADE:</div><div class='ctx'> 			rc = -EPERM;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -2372,6 +2334,42 @@ static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define	EFX_MCDI_NVRAM_UPDATE_FINISH_INITIAL_POLL_DELAY_MS 5</div><div class='add'>+#define	EFX_MCDI_NVRAM_UPDATE_FINISH_MAX_POLL_DELAY_MS 5000</div><div class='add'>+#define	EFX_MCDI_NVRAM_UPDATE_FINISH_RETRIES 185</div><div class='add'>+</div><div class='add'>+int efx_mcdi_nvram_update_finish_polled(struct efx_nic *efx, unsigned int type)</div><div class='add'>+{</div><div class='add'>+	unsigned int delay = EFX_MCDI_NVRAM_UPDATE_FINISH_INITIAL_POLL_DELAY_MS;</div><div class='add'>+	unsigned int retry = 0;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* NVRAM updates can take a long time (e.g. up to 1 minute for bundle</div><div class='add'>+	 * images). Polling for NVRAM update completion ensures that other MCDI</div><div class='add'>+	 * commands can be issued before the background NVRAM update completes.</div><div class='add'>+	 *</div><div class='add'>+	 * The initial call either completes the update synchronously, or</div><div class='add'>+	 * returns -EAGAIN to indicate processing is continuing. In the latter</div><div class='add'>+	 * case, we poll for at least 900 seconds, at increasing intervals</div><div class='add'>+	 * (5ms, 50ms, 500ms, 5s).</div><div class='add'>+	 */</div><div class='add'>+	rc = efx_mcdi_nvram_update_finish(efx, type, EFX_UPDATE_FINISH_BACKGROUND);</div><div class='add'>+	while (rc == -EAGAIN) {</div><div class='add'>+		if (retry &gt; EFX_MCDI_NVRAM_UPDATE_FINISH_RETRIES)</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		retry++;</div><div class='add'>+</div><div class='add'>+		msleep(delay);</div><div class='add'>+		if (delay &lt; EFX_MCDI_NVRAM_UPDATE_FINISH_MAX_POLL_DELAY_MS)</div><div class='add'>+			delay *= 10;</div><div class='add'>+</div><div class='add'>+		rc = efx_mcdi_nvram_update_finish(efx, type, EFX_UPDATE_FINISH_POLL);</div><div class='add'>+	}</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SFC_MTD</div><div class='add'>+</div><div class='ctx'> int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,</div><div class='ctx'> 		      size_t len, size_t *retlen, u8 *buffer)</div><div class='ctx'> {</div><div class='hunk'>@@ -2465,7 +2463,8 @@ int efx_mcdi_mtd_sync(struct mtd_info *mtd)</div><div class='ctx'> </div><div class='ctx'> 	if (part-&gt;updating) {</div><div class='ctx'> 		part-&gt;updating = false;</div><div class='del'>-		rc = efx_mcdi_nvram_update_finish(efx, part-&gt;nvram_type);</div><div class='add'>+		rc = efx_mcdi_nvram_update_finish(efx, part-&gt;nvram_type,</div><div class='add'>+						  EFX_UPDATE_FINISH_WAIT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/mcdi.h b/drivers/net/ethernet/sfc/mcdi.h<br/>index ea612c619874..3755cd3fe1e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mcdi.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mcdi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mcdi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/mcdi.h</a></div><div class='hunk'>@@ -155,9 +155,6 @@ int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,</div><div class='ctx'> int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,</div><div class='ctx'> 			efx_dword_t *outbuf, size_t outlen,</div><div class='ctx'> 			size_t *outlen_actual);</div><div class='del'>-int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd,</div><div class='del'>-			      size_t inlen, efx_dword_t *outbuf,</div><div class='del'>-			      size_t outlen, size_t *outlen_actual);</div><div class='ctx'> </div><div class='ctx'> typedef void efx_mcdi_async_completer(struct efx_nic *efx,</div><div class='ctx'> 				      unsigned long cookie, int rc,</div><div class='hunk'>@@ -167,11 +164,6 @@ int efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,</div><div class='ctx'> 		       const efx_dword_t *inbuf, size_t inlen, size_t outlen,</div><div class='ctx'> 		       efx_mcdi_async_completer *complete,</div><div class='ctx'> 		       unsigned long cookie);</div><div class='del'>-int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,</div><div class='del'>-			     const efx_dword_t *inbuf, size_t inlen,</div><div class='del'>-			     size_t outlen,</div><div class='del'>-			     efx_mcdi_async_completer *complete,</div><div class='del'>-			     unsigned long cookie);</div><div class='ctx'> </div><div class='ctx'> void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,</div><div class='ctx'> 			    size_t inlen, efx_dword_t *outbuf,</div><div class='hunk'>@@ -400,7 +392,7 @@ int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq);</div><div class='ctx'> int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out);</div><div class='ctx'> int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,</div><div class='ctx'> 			size_t *size_out, size_t *erase_size_out,</div><div class='del'>-			bool *protected_out);</div><div class='add'>+			size_t *write_size_out, bool *protected_out);</div><div class='ctx'> int efx_new_mcdi_nvram_test_all(struct efx_nic *efx);</div><div class='ctx'> int efx_mcdi_nvram_metadata(struct efx_nic *efx, unsigned int type,</div><div class='ctx'> 			    u32 *subtype, u16 version[4], char *desc,</div><div class='hunk'>@@ -410,10 +402,8 @@ int efx_mcdi_handle_assertion(struct efx_nic *efx);</div><div class='ctx'> int efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode);</div><div class='ctx'> int efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac,</div><div class='ctx'> 				  int *id_out);</div><div class='del'>-int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out);</div><div class='ctx'> int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id);</div><div class='ctx'> int efx_mcdi_wol_filter_reset(struct efx_nic *efx);</div><div class='del'>-int efx_mcdi_flush_rxqs(struct efx_nic *efx);</div><div class='ctx'> void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev);</div><div class='ctx'> void efx_mcdi_mac_start_stats(struct efx_nic *efx);</div><div class='ctx'> void efx_mcdi_mac_stop_stats(struct efx_nic *efx);</div><div class='hunk'>@@ -434,6 +424,26 @@ static inline int efx_mcdi_mon_probe(struct efx_nic *efx) { return 0; }</div><div class='ctx'> static inline void efx_mcdi_mon_remove(struct efx_nic *efx) {}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type);</div><div class='add'>+int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,</div><div class='add'>+			 loff_t offset, const u8 *buffer, size_t length);</div><div class='add'>+int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,</div><div class='add'>+			 loff_t offset, size_t length);</div><div class='add'>+int efx_mcdi_nvram_metadata(struct efx_nic *efx, unsigned int type,</div><div class='add'>+			    u32 *subtype, u16 version[4], char *desc,</div><div class='add'>+			    size_t descsize);</div><div class='add'>+</div><div class='add'>+enum efx_update_finish_mode {</div><div class='add'>+	EFX_UPDATE_FINISH_WAIT,</div><div class='add'>+	EFX_UPDATE_FINISH_BACKGROUND,</div><div class='add'>+	EFX_UPDATE_FINISH_POLL,</div><div class='add'>+	EFX_UPDATE_FINISH_ABORT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type,</div><div class='add'>+				 enum efx_update_finish_mode mode);</div><div class='add'>+int efx_mcdi_nvram_update_finish_polled(struct efx_nic *efx, unsigned int type);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_SFC_MTD</div><div class='ctx'> int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start, size_t len,</div><div class='ctx'> 		      size_t *retlen, u8 *buffer);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/mcdi_pcol.h b/drivers/net/ethernet/sfc/mcdi_pcol.h<br/>index cd297e19cddc..b9866e389e6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mcdi_pcol.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mcdi_pcol.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mcdi_pcol.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/mcdi_pcol.h</a></div><div class='hunk'>@@ -72,19 +72,19 @@</div><div class='ctx'>  *               |                      \------- Error</div><div class='ctx'>  *               \------------------------------ Resync (always set)</div><div class='ctx'>  *</div><div class='del'>- * The client writes it's request into MC shared memory, and rings the</div><div class='del'>- * doorbell. Each request is completed by either by the MC writing</div><div class='add'>+ * The client writes its request into MC shared memory, and rings the</div><div class='add'>+ * doorbell. Each request is completed either by the MC writing</div><div class='ctx'>  * back into shared memory, or by writing out an event.</div><div class='ctx'>  *</div><div class='ctx'>  * All MCDI commands support completion by shared memory response. Each</div><div class='ctx'>  * request may also contain additional data (accounted for by HEADER.LEN),</div><div class='del'>- * and some response's may also contain additional data (again, accounted</div><div class='add'>+ * and some responses may also contain additional data (again, accounted</div><div class='ctx'>  * for by HEADER.LEN).</div><div class='ctx'>  *</div><div class='ctx'>  * Some MCDI commands support completion by event, in which any associated</div><div class='ctx'>  * response data is included in the event.</div><div class='ctx'>  *</div><div class='del'>- * The protocol requires one response to be delivered for every request, a</div><div class='add'>+ * The protocol requires one response to be delivered for every request; a</div><div class='ctx'>  * request should not be sent unless the response for the previous request</div><div class='ctx'>  * has been received (either by polling shared memory, or by receiving</div><div class='ctx'>  * an event).</div><div class='hunk'>@@ -165,6 +165,7 @@</div><div class='ctx'> #define FSE_AZ_EV_CODE_MCDI_EVRESPONSE 0xc</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> #define MC_CMD_ERR_CODE_OFST 0</div><div class='ctx'> #define MC_CMD_ERR_PROXY_PENDING_HANDLE_OFST 4</div><div class='ctx'> </div><div class='hunk'>@@ -321,7 +322,7 @@</div><div class='ctx'> /* enum: The requesting client is not a function */</div><div class='ctx'> #define          MC_CMD_ERR_CLIENT_NOT_FN 0x100c</div><div class='ctx'> /* enum: The requested operation might require the command to be passed between</div><div class='del'>- * MCs, and thetransport doesn't support that. Should only ever been seen over</div><div class='add'>+ * MCs, and the transport doesn't support that. Should only ever been seen over</div><div class='ctx'>  * the UART.</div><div class='ctx'>  */</div><div class='ctx'> #define          MC_CMD_ERR_TRANSPORT_NOPROXY 0x100d</div><div class='hunk'>@@ -358,7 +359,7 @@</div><div class='ctx'>  * sub-variant switching.</div><div class='ctx'>  */</div><div class='ctx'> #define          MC_CMD_ERR_FILTERS_PRESENT 0x1014</div><div class='del'>-/* enum: The clock whose frequency you've attempted to set set doesn't exist on</div><div class='add'>+/* enum: The clock whose frequency you've attempted to set doesn't exist on</div><div class='ctx'>  * this NIC</div><div class='ctx'>  */</div><div class='ctx'> #define          MC_CMD_ERR_NO_CLOCK 0x1015</div><div class='hunk'>@@ -387,25 +388,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #define          MC_CMD_ERR_PIOBUFS_PRESENT 0x101b</div><div class='ctx'> </div><div class='del'>-/* MC_CMD_RESOURCE_SPECIFIER enum */</div><div class='del'>-/* enum: Any */</div><div class='del'>-#define          MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff</div><div class='del'>-#define          MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe /* enum */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_FPGA_FLASH_INDEX enum */</div><div class='del'>-#define          MC_CMD_FPGA_FLASH_PRIMARY 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_FPGA_FLASH_SECONDARY 0x1 /* enum */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_EXTERNAL_MAE_LINK_MODE enum */</div><div class='del'>-/* enum: Legacy mode as described in XN-200039-TC. */</div><div class='del'>-#define          MC_CMD_EXTERNAL_MAE_LINK_MODE_LEGACY 0x0</div><div class='del'>-/* enum: Switchdev mode as described in XN-200039-TC. */</div><div class='del'>-#define          MC_CMD_EXTERNAL_MAE_LINK_MODE_SWITCHDEV 0x1</div><div class='del'>-/* enum: Bootstrap mode as described in XN-200039-TC. */</div><div class='del'>-#define          MC_CMD_EXTERNAL_MAE_LINK_MODE_BOOTSTRAP 0x2</div><div class='del'>-/* enum: Link-mode change is in-progress as described in XN-200039-TC. */</div><div class='del'>-#define          MC_CMD_EXTERNAL_MAE_LINK_MODE_PENDING 0xf</div><div class='del'>-</div><div class='ctx'> /* PCIE_INTERFACE enum: From EF100 onwards, SFC products can have multiple PCIe</div><div class='ctx'>  * interfaces. There is a need to refer to interfaces explicitly from drivers</div><div class='ctx'>  * (for example, a management driver on one interface administering a function</div><div class='hunk'>@@ -424,6 +406,14 @@</div><div class='ctx'>  * an on-NIC ARM module is expected to be connected.</div><div class='ctx'>  */</div><div class='ctx'> #define          PCIE_INTERFACE_NIC_EMBEDDED 0x1</div><div class='add'>+/* enum: The PCIe logical interface 0. It is an alias for HOST_PRIMARY. */</div><div class='add'>+#define          PCIE_INTERFACE_PCIE_HOST_INTF_0 0x0</div><div class='add'>+/* enum: The PCIe logical interface 1. */</div><div class='add'>+#define          PCIE_INTERFACE_PCIE_HOST_INTF_1 0x2</div><div class='add'>+/* enum: The PCIe logical interface 2. */</div><div class='add'>+#define          PCIE_INTERFACE_PCIE_HOST_INTF_2 0x3</div><div class='add'>+/* enum: The PCIe logical interface 3. */</div><div class='add'>+#define          PCIE_INTERFACE_PCIE_HOST_INTF_3 0x4</div><div class='ctx'> /* enum: For MCDI commands issued over a PCIe interface, this value is</div><div class='ctx'>  * translated into the interface over which the command was issued. Not</div><div class='ctx'>  * meaningful for other MCDI transports.</div><div class='hunk'>@@ -640,7 +630,11 @@</div><div class='ctx'>  * be allocated by different counter blocks, so e.g. AR counter 42 is different</div><div class='ctx'>  * from CT counter 42. Generation counts are also type-specific. This value is</div><div class='ctx'>  * also present in the header of streaming counter packets, in the IDENTIFIER</div><div class='del'>- * field (see packetiser packet format definitions).</div><div class='add'>+ * field (see packetiser packet format definitions). Also note that LACP</div><div class='add'>+ * counter IDs are not allocated individually, instead the counter IDs are</div><div class='add'>+ * directly tied to the LACP balance table indices. These in turn are allocated</div><div class='add'>+ * in large contiguous blocks as a LAG config. Calling MAE_COUNTER_ALLOC/FREE</div><div class='add'>+ * with an LACP counter type will return EPERM.</div><div class='ctx'>  */</div><div class='ctx'> /* enum: Action Rule counters - can be referenced in AR response. */</div><div class='ctx'> #define          MAE_COUNTER_TYPE_AR 0x0</div><div class='hunk'>@@ -648,6 +642,14 @@</div><div class='ctx'> #define          MAE_COUNTER_TYPE_CT 0x1</div><div class='ctx'> /* enum: Outer Rule counters - can be referenced in OR response. */</div><div class='ctx'> #define          MAE_COUNTER_TYPE_OR 0x2</div><div class='add'>+/* enum: LACP counters - linked to LACP balance table entries. */</div><div class='add'>+#define          MAE_COUNTER_TYPE_LACP 0x3</div><div class='add'>+</div><div class='add'>+/* MAE_COUNTER_ID enum: ID of allocated counter or counter list. */</div><div class='add'>+/* enum: A counter ID that is guaranteed never to represent a real counter or</div><div class='add'>+ * counter list.</div><div class='add'>+ */</div><div class='add'>+#define          MAE_COUNTER_ID_NULL 0xffffffff</div><div class='ctx'> </div><div class='ctx'> /* TABLE_ID enum: Unique IDs for tables. The 32-bit ID values have been</div><div class='ctx'>  * structured with bits [31:24] reserved (0), [23:16] indicating which major</div><div class='hunk'>@@ -656,7 +658,9 @@</div><div class='ctx'>  * variations of the same table. (All of the tables currently defined within</div><div class='ctx'>  * the streaming engines are listed here, but this does not imply that they are</div><div class='ctx'>  * all supported - MC_CMD_TABLE_LIST returns the list of actually supported</div><div class='del'>- * tables.)</div><div class='add'>+ * tables.) The DPU offload engines' enumerators follow a deliberate pattern:</div><div class='add'>+ * 0x01010000 + is_dpu_net * 0x10000 + is_wr_or_tx * 0x8000 + is_lite_pipe *</div><div class='add'>+ * 0x1000 + oe_engine_type * 0x100 + oe_instance_within_pipe * 0x10</div><div class='ctx'>  */</div><div class='ctx'> /* enum: Outer_Rule_Table in the MAE - refer to SF-123102-TC. */</div><div class='ctx'> #define          TABLE_ID_OUTER_RULE_TABLE 0x10000</div><div class='hunk'>@@ -694,45 +698,70 @@</div><div class='ctx'> #define          TABLE_ID_RSS_CONTEXT_TABLE 0x20200</div><div class='ctx'> /* enum: Indirection_Table in VNIC Rx - refer to SF-123102-TC. */</div><div class='ctx'> #define          TABLE_ID_INDIRECTION_TABLE 0x20300</div><div class='del'>-</div><div class='del'>-/* TABLE_COMPRESSED_VLAN enum: Compressed VLAN TPID as used by some field</div><div class='del'>- * types; can be calculated by (((ether_type_msb &gt;&gt; 2) &amp; 0x4) ^ 0x4) |</div><div class='del'>- * (ether_type_msb &amp; 0x3);</div><div class='del'>- */</div><div class='del'>-#define          TABLE_COMPRESSED_VLAN_TPID_8100 0x5 /* enum */</div><div class='del'>-#define          TABLE_COMPRESSED_VLAN_TPID_88A8 0x4 /* enum */</div><div class='del'>-#define          TABLE_COMPRESSED_VLAN_TPID_9100 0x1 /* enum */</div><div class='del'>-#define          TABLE_COMPRESSED_VLAN_TPID_9200 0x2 /* enum */</div><div class='del'>-#define          TABLE_COMPRESSED_VLAN_TPID_9300 0x3 /* enum */</div><div class='del'>-</div><div class='del'>-/* TABLE_NAT_DIR enum: NAT direction. */</div><div class='del'>-#define          TABLE_NAT_DIR_SOURCE 0x0 /* enum */</div><div class='del'>-#define          TABLE_NAT_DIR_DEST 0x1 /* enum */</div><div class='del'>-</div><div class='del'>-/* TABLE_RSS_KEY_MODE enum: Defines how the value for Toeplitz hashing for RSS</div><div class='del'>- * is constructed as a concatenation (indicated here by "++") of packet header</div><div class='del'>- * fields.</div><div class='del'>- */</div><div class='del'>-/* enum: IP src addr ++ IP dst addr */</div><div class='del'>-#define          TABLE_RSS_KEY_MODE_SA_DA 0x0</div><div class='del'>-/* enum: IP src addr ++ IP dst addr ++ TCP/UDP src port ++ TCP/UDP dst port */</div><div class='del'>-#define          TABLE_RSS_KEY_MODE_SA_DA_SP_DP 0x1</div><div class='del'>-/* enum: IP src addr */</div><div class='del'>-#define          TABLE_RSS_KEY_MODE_SA 0x2</div><div class='del'>-/* enum: IP dst addr */</div><div class='del'>-#define          TABLE_RSS_KEY_MODE_DA 0x3</div><div class='del'>-/* enum: IP src addr ++ TCP/UDP src port */</div><div class='del'>-#define          TABLE_RSS_KEY_MODE_SA_SP 0x4</div><div class='del'>-/* enum: IP dest addr ++ TCP dest port */</div><div class='del'>-#define          TABLE_RSS_KEY_MODE_DA_DP 0x5</div><div class='del'>-/* enum: Nothing (produces input of 0, resulting in output hash of 0) */</div><div class='del'>-#define          TABLE_RSS_KEY_MODE_NONE 0x7</div><div class='del'>-</div><div class='del'>-/* TABLE_RSS_SPREAD_MODE enum: RSS spreading mode. */</div><div class='del'>-/* enum: RSS uses Indirection_Table lookup. */</div><div class='del'>-#define          TABLE_RSS_SPREAD_MODE_INDIRECTION 0x0</div><div class='del'>-/* enum: RSS uses even spreading calculation. */</div><div class='del'>-#define          TABLE_RSS_SPREAD_MODE_EVEN 0x1</div><div class='add'>+/* enum: DPU.host read pipe first CRC offload engine profiles - refer to</div><div class='add'>+ * XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_HOST_RD_CRC0_OE_PROFILE 0x1010000</div><div class='add'>+/* enum: DPU.host read pipe second CRC offload engine profiles - refer to</div><div class='add'>+ * XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_HOST_RD_CRC1_OE_PROFILE 0x1010010</div><div class='add'>+/* enum: DPU.host write pipe first CRC offload engine profiles - refer to</div><div class='add'>+ * XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_HOST_WR_CRC0_OE_PROFILE 0x1018000</div><div class='add'>+/* enum: DPU.host write pipe second CRC offload engine profiles - refer to</div><div class='add'>+ * XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_HOST_WR_CRC1_OE_PROFILE 0x1018010</div><div class='add'>+/* enum: DPU.net 'full' receive pipe CRC offload engine profiles - refer to</div><div class='add'>+ * XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_RX_CRC0_OE_PROFILE 0x1020000</div><div class='add'>+/* enum: DPU.net 'full' receive pipe first checksum offload engine profiles -</div><div class='add'>+ * refer to XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_RX_CSUM0_OE_PROFILE 0x1020100</div><div class='add'>+/* enum: DPU.net 'full' receive pipe second checksum offload engine profiles -</div><div class='add'>+ * refer to XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_RX_CSUM1_OE_PROFILE 0x1020110</div><div class='add'>+/* enum: DPU.net 'full' receive pipe AES-GCM offload engine profiles - refer to</div><div class='add'>+ * XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_RX_AES_GCM0_OE_PROFILE 0x1020200</div><div class='add'>+/* enum: DPU.net 'lite' receive pipe CRC offload engine profiles - refer to</div><div class='add'>+ * XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_RXLITE_CRC0_OE_PROFILE 0x1021000</div><div class='add'>+/* enum: DPU.net 'lite' receive pipe checksum offload engine profiles - refer</div><div class='add'>+ * to XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_RXLITE_CSUM0_OE_PROFILE 0x1021100</div><div class='add'>+/* enum: DPU.net 'full' transmit pipe CRC offload engine profiles - refer to</div><div class='add'>+ * XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_TX_CRC0_OE_PROFILE 0x1028000</div><div class='add'>+/* enum: DPU.net 'full' transmit pipe first checksum offload engine profiles -</div><div class='add'>+ * refer to XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_TX_CSUM0_OE_PROFILE 0x1028100</div><div class='add'>+/* enum: DPU.net 'full' transmit pipe second checksum offload engine profiles -</div><div class='add'>+ * refer to XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_TX_CSUM1_OE_PROFILE 0x1028110</div><div class='add'>+/* enum: DPU.net 'full' transmit pipe AES-GCM offload engine profiles - refer</div><div class='add'>+ * to XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_TX_AES_GCM0_OE_PROFILE 0x1028200</div><div class='add'>+/* enum: DPU.net 'lite' transmit pipe CRC offload engine profiles - refer to</div><div class='add'>+ * XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_TXLITE_CRC0_OE_PROFILE 0x1029000</div><div class='add'>+/* enum: DPU.net 'lite' transmit pipe checksum offload engine profiles - refer</div><div class='add'>+ * to XN-200147-AN.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_ID_DPU_NET_TXLITE_CSUM0_OE_PROFILE 0x1029100</div><div class='ctx'> </div><div class='ctx'> /* TABLE_FIELD_ID enum: Unique IDs for fields. Related concepts have been</div><div class='ctx'>  * loosely grouped together into blocks with gaps for expansion, but the values</div><div class='hunk'>@@ -1026,6 +1055,16 @@</div><div class='ctx'> #define          TABLE_FIELD_ID_BAL_TBL_BASE_DIV64 0xde</div><div class='ctx'> /* enum: Length of balance table region: 0=&gt;64, 1=&gt;128, 2=&gt;256. */</div><div class='ctx'> #define          TABLE_FIELD_ID_BAL_TBL_LEN_ID 0xdf</div><div class='add'>+/* enum: LACP LAG ID (i.e. the low 3 bits of LACP LAG mport ID), indexing</div><div class='add'>+ * LACP_LAG_Config_Table. Refer to SF-123102-TC.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_FIELD_ID_LACP_LAG_ID 0xe0</div><div class='add'>+/* enum: Address in LACP_Balance_Table. The balance table is partitioned</div><div class='add'>+ * between LAGs according to the settings in LACP_LAG_Config_Table and then</div><div class='add'>+ * indexed by the LACP hash, providing the mapping to destination mports. Refer</div><div class='add'>+ * to SF-123102-TC.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_FIELD_ID_BAL_TBL_ADDR 0xe1</div><div class='ctx'> /* enum: UDP port to match for UDP-based encapsulations; required to be 0 for</div><div class='ctx'>  * other encapsulation types.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1082,6 +1121,55 @@</div><div class='ctx'> #define          TABLE_FIELD_ID_INDIR_TBL_LEN_ID 0x105</div><div class='ctx'> /* enum: An offset to be applied to the base destination queue ID. */</div><div class='ctx'> #define          TABLE_FIELD_ID_INDIR_OFFSET 0x106</div><div class='add'>+/* enum: DPU offload engine profile ID to address. */</div><div class='add'>+#define          TABLE_FIELD_ID_OE_PROFILE 0x3e8</div><div class='add'>+/* enum: Width of the CRC to calculate - see CRC_VARIANT enum. */</div><div class='add'>+#define          TABLE_FIELD_ID_CRC_VARIANT 0x3f2</div><div class='add'>+/* enum: If set, reflect the bits of each input byte, bit 7 is LSB, bit 0 is</div><div class='add'>+ * MSB. If clear, bit 7 is MSB, bit 0 is LSB.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_FIELD_ID_CRC_REFIN 0x3f3</div><div class='add'>+/* enum: If set, reflect the bits of each output byte, bit 7 is LSB, bit 0 is</div><div class='add'>+ * MSB. If clear, bit 7 is MSB, bit 0 is LSB.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_FIELD_ID_CRC_REFOUT 0x3f4</div><div class='add'>+/* enum: If set, invert every bit of the output value. */</div><div class='add'>+#define          TABLE_FIELD_ID_CRC_INVOUT 0x3f5</div><div class='add'>+/* enum: The CRC polynomial to use for checksumming, in normal form. */</div><div class='add'>+#define          TABLE_FIELD_ID_CRC_POLY 0x3f6</div><div class='add'>+/* enum: Operation for the checksum engine to perform - see DPU_CSUM_OP enum.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_FIELD_ID_CSUM_OP 0x410</div><div class='add'>+/* enum: Byte offset of checksum relative to region_start (for VALIDATE_*</div><div class='add'>+ * operations only).</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_FIELD_ID_CSUM_OFFSET 0x411</div><div class='add'>+/* enum: Indicates there is additional data on OPR bus that needs to be</div><div class='add'>+ * incorporated into the payload checksum.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_FIELD_ID_CSUM_OPR_ADDITIONAL_DATA 0x412</div><div class='add'>+/* enum: Log2 data size of additional data on OPR bus. */</div><div class='add'>+#define          TABLE_FIELD_ID_CSUM_OPR_DATA_SIZE_LOG2 0x413</div><div class='add'>+/* enum: 4 byte offset of where to find the additional data on the OPR bus. */</div><div class='add'>+#define          TABLE_FIELD_ID_CSUM_OPR_4B_OFF 0x414</div><div class='add'>+/* enum: Operation type for the AES-GCM core - see GCM_OP_CODE enum. */</div><div class='add'>+#define          TABLE_FIELD_ID_GCM_OP_CODE 0x41a</div><div class='add'>+/* enum: Key length - AES_KEY_LEN enum. */</div><div class='add'>+#define          TABLE_FIELD_ID_GCM_KEY_LEN 0x41b</div><div class='add'>+/* enum: OPR 4 byte offset for ICV or GHASH output (only in BULK_* mode) or</div><div class='add'>+ * IPSEC descrypt output.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_FIELD_ID_GCM_OPR_4B_OFFSET 0x41c</div><div class='add'>+/* enum: If OP_CODE is BULK_*, indicates Emit GHASH (Fragment mode). Else,</div><div class='add'>+ * indicates IPSEC-ESN mode.</div><div class='add'>+ */</div><div class='add'>+#define          TABLE_FIELD_ID_GCM_EMIT_GHASH_ISESN 0x41d</div><div class='add'>+/* enum: Replay Protection Enable. */</div><div class='add'>+#define          TABLE_FIELD_ID_GCM_REPLAY_PROTECT_EN 0x41e</div><div class='add'>+/* enum: IPSEC Encrypt ESP trailer NEXT_HEADER byte. */</div><div class='add'>+#define          TABLE_FIELD_ID_GCM_NEXT_HDR 0x41f</div><div class='add'>+/* enum: Replay Window Size. */</div><div class='add'>+#define          TABLE_FIELD_ID_GCM_REPLAY_WIN_SIZE 0x420</div><div class='ctx'> </div><div class='ctx'> /* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100</div><div class='ctx'>  * platforms</div><div class='hunk'>@@ -1138,6 +1226,24 @@</div><div class='ctx'> #define        MCDI_EVENT_LINKCHANGE_LINK_FLAGS_OFST 0</div><div class='ctx'> #define        MCDI_EVENT_LINKCHANGE_LINK_FLAGS_LBN 24</div><div class='ctx'> #define        MCDI_EVENT_LINKCHANGE_LINK_FLAGS_WIDTH 8</div><div class='add'>+#define        MCDI_EVENT_PORT_LINKCHANGE_PORT_HANDLE_OFST 0</div><div class='add'>+#define        MCDI_EVENT_PORT_LINKCHANGE_PORT_HANDLE_LBN 0</div><div class='add'>+#define        MCDI_EVENT_PORT_LINKCHANGE_PORT_HANDLE_WIDTH 24</div><div class='add'>+#define        MCDI_EVENT_PORT_LINKCHANGE_SEQ_NUM_OFST 0</div><div class='add'>+#define        MCDI_EVENT_PORT_LINKCHANGE_SEQ_NUM_LBN 24</div><div class='add'>+#define        MCDI_EVENT_PORT_LINKCHANGE_SEQ_NUM_WIDTH 7</div><div class='add'>+#define        MCDI_EVENT_PORT_LINKCHANGE_LINK_UP_OFST 0</div><div class='add'>+#define        MCDI_EVENT_PORT_LINKCHANGE_LINK_UP_LBN 31</div><div class='add'>+#define        MCDI_EVENT_PORT_LINKCHANGE_LINK_UP_WIDTH 1</div><div class='add'>+#define        MCDI_EVENT_PORT_MODULECHANGE_PORT_HANDLE_OFST 0</div><div class='add'>+#define        MCDI_EVENT_PORT_MODULECHANGE_PORT_HANDLE_LBN 0</div><div class='add'>+#define        MCDI_EVENT_PORT_MODULECHANGE_PORT_HANDLE_WIDTH 24</div><div class='add'>+#define        MCDI_EVENT_PORT_MODULECHANGE_SEQ_NUM_OFST 0</div><div class='add'>+#define        MCDI_EVENT_PORT_MODULECHANGE_SEQ_NUM_LBN 24</div><div class='add'>+#define        MCDI_EVENT_PORT_MODULECHANGE_SEQ_NUM_WIDTH 7</div><div class='add'>+#define        MCDI_EVENT_PORT_MODULECHANGE_MDI_CONNECTED_OFST 0</div><div class='add'>+#define        MCDI_EVENT_PORT_MODULECHANGE_MDI_CONNECTED_LBN 31</div><div class='add'>+#define        MCDI_EVENT_PORT_MODULECHANGE_MDI_CONNECTED_WIDTH 1</div><div class='ctx'> #define        MCDI_EVENT_SENSOREVT_MONITOR_OFST 0</div><div class='ctx'> #define        MCDI_EVENT_SENSOREVT_MONITOR_LBN 0</div><div class='ctx'> #define        MCDI_EVENT_SENSOREVT_MONITOR_WIDTH 8</div><div class='hunk'>@@ -1237,7 +1343,7 @@</div><div class='ctx'> #define          MCDI_EVENT_AOE_FPGA_LOAD_FAILED 0xe</div><div class='ctx'> /* enum: Notify that invalid flash type detected */</div><div class='ctx'> #define          MCDI_EVENT_AOE_INVALID_FPGA_FLASH_TYPE 0xf</div><div class='del'>-/* enum: Notify that the attempt to run FPGA Controller firmware timedout */</div><div class='add'>+/* enum: Notify that the attempt to run FPGA Controller firmware timed out */</div><div class='ctx'> #define          MCDI_EVENT_AOE_FC_RUN_TIMEDOUT 0x10</div><div class='ctx'> /* enum: Failure to probe one or more FPGA boot flash chips */</div><div class='ctx'> #define          MCDI_EVENT_AOE_FPGA_BOOT_FLASH_INVALID 0x11</div><div class='hunk'>@@ -1255,7 +1361,7 @@</div><div class='ctx'> #define        MCDI_EVENT_AOE_ERR_FC_ASSERT_INFO_WIDTH 8</div><div class='ctx'> /* enum: FC Assert happened, but the register information is not available */</div><div class='ctx'> #define          MCDI_EVENT_AOE_ERR_FC_ASSERT_SEEN 0x0</div><div class='del'>-/* enum: The register information for FC Assert is ready for readinng by driver</div><div class='add'>+/* enum: The register information for FC Assert is ready for reading by driver</div><div class='ctx'>  */</div><div class='ctx'> #define          MCDI_EVENT_AOE_ERR_FC_ASSERT_DATA_READY 0x1</div><div class='ctx'> #define        MCDI_EVENT_AOE_ERR_CODE_FPGA_HEADER_VERIFY_FAILED_OFST 0</div><div class='hunk'>@@ -1364,6 +1470,12 @@</div><div class='ctx'> #define        MCDI_EVENT_MODULECHANGE_SEQ_OFST 0</div><div class='ctx'> #define        MCDI_EVENT_MODULECHANGE_SEQ_LBN 30</div><div class='ctx'> #define        MCDI_EVENT_MODULECHANGE_SEQ_WIDTH 2</div><div class='add'>+#define        MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_OFST 0</div><div class='add'>+#define        MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_LBN 0</div><div class='add'>+#define        MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_WIDTH 16</div><div class='add'>+#define        MCDI_EVENT_DESC_PROXY_VIRTQ_ID_OFST 0</div><div class='add'>+#define        MCDI_EVENT_DESC_PROXY_VIRTQ_ID_LBN 16</div><div class='add'>+#define        MCDI_EVENT_DESC_PROXY_VIRTQ_ID_WIDTH 16</div><div class='ctx'> #define       MCDI_EVENT_DATA_LBN 0</div><div class='ctx'> #define       MCDI_EVENT_DATA_WIDTH 32</div><div class='ctx'> /* Alias for PTP_DATA. */</div><div class='hunk'>@@ -1500,6 +1612,31 @@</div><div class='ctx'>  * change to the journal.</div><div class='ctx'>  */</div><div class='ctx'> #define          MCDI_EVENT_CODE_MPORT_JOURNAL_CHANGE 0x27</div><div class='add'>+/* enum: Notification that a source queue is enabled and attached to its proxy</div><div class='add'>+ * sink queue. SRC field contains the handle of the affected descriptor proxy</div><div class='add'>+ * function. DATA field contains the relative source queue number and absolute</div><div class='add'>+ * VI ID.</div><div class='add'>+ */</div><div class='add'>+#define          MCDI_EVENT_CODE_DESC_PROXY_FUNC_QUEUE_START 0x28</div><div class='add'>+/* enum: Notification of a change in link state and/or link speed of a network</div><div class='add'>+ * port link. This event applies to a network port identified by a handle,</div><div class='add'>+ * PORT_HANDLE, which is discovered by the driver using the MC_CMD_ENUM_PORTS</div><div class='add'>+ * command.</div><div class='add'>+ */</div><div class='add'>+#define          MCDI_EVENT_CODE_PORT_LINKCHANGE 0x29</div><div class='add'>+/* enum: Notification of a change in the state of an MDI (external connector)</div><div class='add'>+ * of a network port. This typically corresponds to module plug/unplug for</div><div class='add'>+ * modular interfaces (e.g., SFP/QSFP and similar) or cable connect/disconnect.</div><div class='add'>+ * This event applies to a network port identified by a handle, PORT_HANDLE,</div><div class='add'>+ * which is discovered by the driver using the MC_CMD_ENUM_PORTS command.</div><div class='add'>+ */</div><div class='add'>+#define          MCDI_EVENT_CODE_PORT_MODULECHANGE 0x2a</div><div class='add'>+/* enum: Notification that the port enumeration journal has changed since it</div><div class='add'>+ * was last read and updates can be read using the MC_CMD_ENUM_PORTS command.</div><div class='add'>+ * The firmware may moderate the events so that an event is not sent for every</div><div class='add'>+ * change to the journal.</div><div class='add'>+ */</div><div class='add'>+#define          MCDI_EVENT_CODE_ENUM_PORTS_CHANGE 0x2b</div><div class='ctx'> /* enum: Artificial event generated by host and posted via MC for test</div><div class='ctx'>  * purposes.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1512,6 +1649,14 @@</div><div class='ctx'> #define       MCDI_EVENT_LINKCHANGE_DATA_LEN 4</div><div class='ctx'> #define       MCDI_EVENT_LINKCHANGE_DATA_LBN 0</div><div class='ctx'> #define       MCDI_EVENT_LINKCHANGE_DATA_WIDTH 32</div><div class='add'>+#define       MCDI_EVENT_PORT_LINKCHANGE_DATA_OFST 0</div><div class='add'>+#define       MCDI_EVENT_PORT_LINKCHANGE_DATA_LEN 4</div><div class='add'>+#define       MCDI_EVENT_PORT_LINKCHANGE_DATA_LBN 0</div><div class='add'>+#define       MCDI_EVENT_PORT_LINKCHANGE_DATA_WIDTH 32</div><div class='add'>+#define       MCDI_EVENT_PORT_MODULECHANGE_DATA_OFST 0</div><div class='add'>+#define       MCDI_EVENT_PORT_MODULECHANGE_DATA_LEN 4</div><div class='add'>+#define       MCDI_EVENT_PORT_MODULECHANGE_DATA_LBN 0</div><div class='add'>+#define       MCDI_EVENT_PORT_MODULECHANGE_DATA_WIDTH 32</div><div class='ctx'> #define       MCDI_EVENT_SENSOREVT_DATA_OFST 0</div><div class='ctx'> #define       MCDI_EVENT_SENSOREVT_DATA_LEN 4</div><div class='ctx'> #define       MCDI_EVENT_SENSOREVT_DATA_LBN 0</div><div class='hunk'>@@ -1668,247 +1813,6 @@</div><div class='ctx'> #define       MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_LBN 0</div><div class='ctx'> #define       MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_WIDTH 32</div><div class='ctx'> </div><div class='del'>-/* FCDI_EVENT structuredef */</div><div class='del'>-#define    FCDI_EVENT_LEN 8</div><div class='del'>-#define       FCDI_EVENT_CONT_LBN 32</div><div class='del'>-#define       FCDI_EVENT_CONT_WIDTH 1</div><div class='del'>-#define       FCDI_EVENT_LEVEL_LBN 33</div><div class='del'>-#define       FCDI_EVENT_LEVEL_WIDTH 3</div><div class='del'>-/* enum: Info. */</div><div class='del'>-#define          FCDI_EVENT_LEVEL_INFO 0x0</div><div class='del'>-/* enum: Warning. */</div><div class='del'>-#define          FCDI_EVENT_LEVEL_WARN 0x1</div><div class='del'>-/* enum: Error. */</div><div class='del'>-#define          FCDI_EVENT_LEVEL_ERR 0x2</div><div class='del'>-/* enum: Fatal. */</div><div class='del'>-#define          FCDI_EVENT_LEVEL_FATAL 0x3</div><div class='del'>-#define       FCDI_EVENT_DATA_OFST 0</div><div class='del'>-#define       FCDI_EVENT_DATA_LEN 4</div><div class='del'>-#define        FCDI_EVENT_LINK_STATE_STATUS_OFST 0</div><div class='del'>-#define        FCDI_EVENT_LINK_STATE_STATUS_LBN 0</div><div class='del'>-#define        FCDI_EVENT_LINK_STATE_STATUS_WIDTH 1</div><div class='del'>-#define          FCDI_EVENT_LINK_DOWN 0x0 /* enum */</div><div class='del'>-#define          FCDI_EVENT_LINK_UP 0x1 /* enum */</div><div class='del'>-#define       FCDI_EVENT_DATA_LBN 0</div><div class='del'>-#define       FCDI_EVENT_DATA_WIDTH 32</div><div class='del'>-#define       FCDI_EVENT_SRC_LBN 36</div><div class='del'>-#define       FCDI_EVENT_SRC_WIDTH 8</div><div class='del'>-#define       FCDI_EVENT_EV_CODE_LBN 60</div><div class='del'>-#define       FCDI_EVENT_EV_CODE_WIDTH 4</div><div class='del'>-#define       FCDI_EVENT_CODE_LBN 44</div><div class='del'>-#define       FCDI_EVENT_CODE_WIDTH 8</div><div class='del'>-/* enum: The FC was rebooted. */</div><div class='del'>-#define          FCDI_EVENT_CODE_REBOOT 0x1</div><div class='del'>-/* enum: Bad assert. */</div><div class='del'>-#define          FCDI_EVENT_CODE_ASSERT 0x2</div><div class='del'>-/* enum: DDR3 test result. */</div><div class='del'>-#define          FCDI_EVENT_CODE_DDR_TEST_RESULT 0x3</div><div class='del'>-/* enum: Link status. */</div><div class='del'>-#define          FCDI_EVENT_CODE_LINK_STATE 0x4</div><div class='del'>-/* enum: A timed read is ready to be serviced. */</div><div class='del'>-#define          FCDI_EVENT_CODE_TIMED_READ 0x5</div><div class='del'>-/* enum: One or more PPS IN events */</div><div class='del'>-#define          FCDI_EVENT_CODE_PPS_IN 0x6</div><div class='del'>-/* enum: Tick event from PTP clock */</div><div class='del'>-#define          FCDI_EVENT_CODE_PTP_TICK 0x7</div><div class='del'>-/* enum: ECC error counters */</div><div class='del'>-#define          FCDI_EVENT_CODE_DDR_ECC_STATUS 0x8</div><div class='del'>-/* enum: Current status of PTP */</div><div class='del'>-#define          FCDI_EVENT_CODE_PTP_STATUS 0x9</div><div class='del'>-/* enum: Port id config to map MC-FC port idx */</div><div class='del'>-#define          FCDI_EVENT_CODE_PORT_CONFIG 0xa</div><div class='del'>-/* enum: Boot result or error code */</div><div class='del'>-#define          FCDI_EVENT_CODE_BOOT_RESULT 0xb</div><div class='del'>-#define       FCDI_EVENT_REBOOT_SRC_LBN 36</div><div class='del'>-#define       FCDI_EVENT_REBOOT_SRC_WIDTH 8</div><div class='del'>-#define          FCDI_EVENT_REBOOT_FC_FW 0x0 /* enum */</div><div class='del'>-#define          FCDI_EVENT_REBOOT_FC_BOOTLOADER 0x1 /* enum */</div><div class='del'>-#define       FCDI_EVENT_ASSERT_INSTR_ADDRESS_OFST 0</div><div class='del'>-#define       FCDI_EVENT_ASSERT_INSTR_ADDRESS_LEN 4</div><div class='del'>-#define       FCDI_EVENT_ASSERT_INSTR_ADDRESS_LBN 0</div><div class='del'>-#define       FCDI_EVENT_ASSERT_INSTR_ADDRESS_WIDTH 32</div><div class='del'>-#define       FCDI_EVENT_ASSERT_TYPE_LBN 36</div><div class='del'>-#define       FCDI_EVENT_ASSERT_TYPE_WIDTH 8</div><div class='del'>-#define       FCDI_EVENT_DDR_TEST_RESULT_STATUS_CODE_LBN 36</div><div class='del'>-#define       FCDI_EVENT_DDR_TEST_RESULT_STATUS_CODE_WIDTH 8</div><div class='del'>-#define       FCDI_EVENT_DDR_TEST_RESULT_RESULT_OFST 0</div><div class='del'>-#define       FCDI_EVENT_DDR_TEST_RESULT_RESULT_LEN 4</div><div class='del'>-#define       FCDI_EVENT_DDR_TEST_RESULT_RESULT_LBN 0</div><div class='del'>-#define       FCDI_EVENT_DDR_TEST_RESULT_RESULT_WIDTH 32</div><div class='del'>-#define       FCDI_EVENT_LINK_STATE_DATA_OFST 0</div><div class='del'>-#define       FCDI_EVENT_LINK_STATE_DATA_LEN 4</div><div class='del'>-#define       FCDI_EVENT_LINK_STATE_DATA_LBN 0</div><div class='del'>-#define       FCDI_EVENT_LINK_STATE_DATA_WIDTH 32</div><div class='del'>-#define       FCDI_EVENT_PTP_STATE_OFST 0</div><div class='del'>-#define       FCDI_EVENT_PTP_STATE_LEN 4</div><div class='del'>-#define          FCDI_EVENT_PTP_UNDEFINED 0x0 /* enum */</div><div class='del'>-#define          FCDI_EVENT_PTP_SETUP_FAILED 0x1 /* enum */</div><div class='del'>-#define          FCDI_EVENT_PTP_OPERATIONAL 0x2 /* enum */</div><div class='del'>-#define       FCDI_EVENT_PTP_STATE_LBN 0</div><div class='del'>-#define       FCDI_EVENT_PTP_STATE_WIDTH 32</div><div class='del'>-#define       FCDI_EVENT_DDR_ECC_STATUS_BANK_ID_LBN 36</div><div class='del'>-#define       FCDI_EVENT_DDR_ECC_STATUS_BANK_ID_WIDTH 8</div><div class='del'>-#define       FCDI_EVENT_DDR_ECC_STATUS_STATUS_OFST 0</div><div class='del'>-#define       FCDI_EVENT_DDR_ECC_STATUS_STATUS_LEN 4</div><div class='del'>-#define       FCDI_EVENT_DDR_ECC_STATUS_STATUS_LBN 0</div><div class='del'>-#define       FCDI_EVENT_DDR_ECC_STATUS_STATUS_WIDTH 32</div><div class='del'>-/* Index of MC port being referred to */</div><div class='del'>-#define       FCDI_EVENT_PORT_CONFIG_SRC_LBN 36</div><div class='del'>-#define       FCDI_EVENT_PORT_CONFIG_SRC_WIDTH 8</div><div class='del'>-/* FC Port index that matches the MC port index in SRC */</div><div class='del'>-#define       FCDI_EVENT_PORT_CONFIG_DATA_OFST 0</div><div class='del'>-#define       FCDI_EVENT_PORT_CONFIG_DATA_LEN 4</div><div class='del'>-#define       FCDI_EVENT_PORT_CONFIG_DATA_LBN 0</div><div class='del'>-#define       FCDI_EVENT_PORT_CONFIG_DATA_WIDTH 32</div><div class='del'>-#define       FCDI_EVENT_BOOT_RESULT_OFST 0</div><div class='del'>-#define       FCDI_EVENT_BOOT_RESULT_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               MC_CMD_AOE/MC_CMD_AOE_OUT_INFO/FC_BOOT_RESULT */</div><div class='del'>-#define       FCDI_EVENT_BOOT_RESULT_LBN 0</div><div class='del'>-#define       FCDI_EVENT_BOOT_RESULT_WIDTH 32</div><div class='del'>-</div><div class='del'>-/* FCDI_EXTENDED_EVENT_PPS structuredef: Extended FCDI event to send PPS events</div><div class='del'>- * to the MC. Note that this structure | is overlayed over a normal FCDI event</div><div class='del'>- * such that bits 32-63 containing | event code, level, source etc remain the</div><div class='del'>- * same. In this case the data | field of the header is defined to be the</div><div class='del'>- * number of timestamps</div><div class='del'>- */</div><div class='del'>-#define    FCDI_EXTENDED_EVENT_PPS_LENMIN 16</div><div class='del'>-#define    FCDI_EXTENDED_EVENT_PPS_LENMAX 248</div><div class='del'>-#define    FCDI_EXTENDED_EVENT_PPS_LENMAX_MCDI2 1016</div><div class='del'>-#define    FCDI_EXTENDED_EVENT_PPS_LEN(num) (8+8*(num))</div><div class='del'>-#define    FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_NUM(len) (((len)-8)/8)</div><div class='del'>-/* Number of timestamps following */</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_COUNT_OFST 0</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_COUNT_LEN 4</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_COUNT_LBN 0</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_COUNT_WIDTH 32</div><div class='del'>-/* Seconds field of a timestamp record */</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_SECONDS_OFST 8</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_SECONDS_LEN 4</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_SECONDS_LBN 64</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_SECONDS_WIDTH 32</div><div class='del'>-/* Nanoseconds field of a timestamp record */</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_OFST 12</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LEN 4</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LBN 96</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_WIDTH 32</div><div class='del'>-/* Timestamp records comprising the event */</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LEN 4</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LBN 64</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_WIDTH 32</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LEN 4</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LBN 96</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_WIDTH 32</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 126</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LBN 64</div><div class='del'>-#define       FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_WIDTH 64</div><div class='del'>-</div><div class='del'>-/* MUM_EVENT structuredef */</div><div class='del'>-#define    MUM_EVENT_LEN 8</div><div class='del'>-#define       MUM_EVENT_CONT_LBN 32</div><div class='del'>-#define       MUM_EVENT_CONT_WIDTH 1</div><div class='del'>-#define       MUM_EVENT_LEVEL_LBN 33</div><div class='del'>-#define       MUM_EVENT_LEVEL_WIDTH 3</div><div class='del'>-/* enum: Info. */</div><div class='del'>-#define          MUM_EVENT_LEVEL_INFO 0x0</div><div class='del'>-/* enum: Warning. */</div><div class='del'>-#define          MUM_EVENT_LEVEL_WARN 0x1</div><div class='del'>-/* enum: Error. */</div><div class='del'>-#define          MUM_EVENT_LEVEL_ERR 0x2</div><div class='del'>-/* enum: Fatal. */</div><div class='del'>-#define          MUM_EVENT_LEVEL_FATAL 0x3</div><div class='del'>-#define       MUM_EVENT_DATA_OFST 0</div><div class='del'>-#define       MUM_EVENT_DATA_LEN 4</div><div class='del'>-#define        MUM_EVENT_SENSOR_ID_OFST 0</div><div class='del'>-#define        MUM_EVENT_SENSOR_ID_LBN 0</div><div class='del'>-#define        MUM_EVENT_SENSOR_ID_WIDTH 8</div><div class='del'>-/*             Enum values, see field(s): */</div><div class='del'>-/*                MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */</div><div class='del'>-#define        MUM_EVENT_SENSOR_STATE_OFST 0</div><div class='del'>-#define        MUM_EVENT_SENSOR_STATE_LBN 8</div><div class='del'>-#define        MUM_EVENT_SENSOR_STATE_WIDTH 8</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_READY_OFST 0</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_READY_LBN 0</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_READY_WIDTH 1</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_LINK_UP_OFST 0</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_LINK_UP_LBN 1</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_LINK_UP_WIDTH 1</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_TX_LOL_OFST 0</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_TX_LOL_LBN 2</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_TX_LOL_WIDTH 1</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_RX_LOL_OFST 0</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_RX_LOL_LBN 3</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_RX_LOL_WIDTH 1</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_TX_LOS_OFST 0</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_TX_LOS_LBN 4</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_TX_LOS_WIDTH 1</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_RX_LOS_OFST 0</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_RX_LOS_LBN 5</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_RX_LOS_WIDTH 1</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_TX_FAULT_OFST 0</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_TX_FAULT_LBN 6</div><div class='del'>-#define        MUM_EVENT_PORT_PHY_TX_FAULT_WIDTH 1</div><div class='del'>-#define       MUM_EVENT_DATA_LBN 0</div><div class='del'>-#define       MUM_EVENT_DATA_WIDTH 32</div><div class='del'>-#define       MUM_EVENT_SRC_LBN 36</div><div class='del'>-#define       MUM_EVENT_SRC_WIDTH 8</div><div class='del'>-#define       MUM_EVENT_EV_CODE_LBN 60</div><div class='del'>-#define       MUM_EVENT_EV_CODE_WIDTH 4</div><div class='del'>-#define       MUM_EVENT_CODE_LBN 44</div><div class='del'>-#define       MUM_EVENT_CODE_WIDTH 8</div><div class='del'>-/* enum: The MUM was rebooted. */</div><div class='del'>-#define          MUM_EVENT_CODE_REBOOT 0x1</div><div class='del'>-/* enum: Bad assert. */</div><div class='del'>-#define          MUM_EVENT_CODE_ASSERT 0x2</div><div class='del'>-/* enum: Sensor failure. */</div><div class='del'>-#define          MUM_EVENT_CODE_SENSOR 0x3</div><div class='del'>-/* enum: Link fault has been asserted, or has cleared. */</div><div class='del'>-#define          MUM_EVENT_CODE_QSFP_LASI_INTERRUPT 0x4</div><div class='del'>-#define       MUM_EVENT_SENSOR_DATA_OFST 0</div><div class='del'>-#define       MUM_EVENT_SENSOR_DATA_LEN 4</div><div class='del'>-#define       MUM_EVENT_SENSOR_DATA_LBN 0</div><div class='del'>-#define       MUM_EVENT_SENSOR_DATA_WIDTH 32</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_FLAGS_OFST 0</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_FLAGS_LEN 4</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_FLAGS_LBN 0</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_FLAGS_WIDTH 32</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_COPPER_LEN_OFST 0</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_COPPER_LEN_LEN 4</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_COPPER_LEN_LBN 0</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_COPPER_LEN_WIDTH 32</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_CAPS_OFST 0</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_CAPS_LEN 4</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_CAPS_LBN 0</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_CAPS_WIDTH 32</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_TECH_OFST 0</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_TECH_LEN 4</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_UNKNOWN 0x0 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_OPTICAL 0x1 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_PASSIVE 0x2 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_PASSIVE_EQUALIZED 0x3 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_ACTIVE_LIMITING 0x4 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_COPPER_ACTIVE_LINEAR 0x5 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_BASE_T 0x6 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_STATE_QSFP_MODULE_TECH_LOOPBACK_PASSIVE 0x7 /* enum */</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_TECH_LBN 0</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_TECH_WIDTH 32</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_SRC_DATA_ID_LBN 36</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_SRC_DATA_ID_WIDTH 4</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_SRC_DATA_ID_FLAGS 0x0 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_SRC_DATA_ID_COPPER_LEN 0x1 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_SRC_DATA_ID_CAPS 0x2 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_SRC_DATA_ID_TECH 0x3 /* enum */</div><div class='del'>-#define          MUM_EVENT_PORT_PHY_SRC_DATA_ID_MAX 0x4 /* enum */</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_SRC_PORT_NO_LBN 40</div><div class='del'>-#define       MUM_EVENT_PORT_PHY_SRC_PORT_NO_WIDTH 4</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_READ32</div><div class='hunk'>@@ -1969,90 +1873,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_COPYCODE</div><div class='del'>- * Copy MC code between two locations and jump. Note - this command really</div><div class='del'>- * belongs to INSECURE category but is required by shmboot. The command handler</div><div class='del'>- * has additional checks to reject insecure calls.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_COPYCODE 0x3</div><div class='del'>-#undef MC_CMD_0x3_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x3_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_COPYCODE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_COPYCODE_IN_LEN 16</div><div class='del'>-/* Source address</div><div class='del'>- *</div><div class='del'>- * The main image should be entered via a copy of a single word from and to a</div><div class='del'>- * magic address, which controls various aspects of the boot. The magic address</div><div class='del'>- * is a bitfield, with each bit as documented below.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_COPYCODE_IN_SRC_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_COPYCODE_IN_SRC_ADDR_LEN 4</div><div class='del'>-/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT (see below) */</div><div class='del'>-#define          MC_CMD_COPYCODE_HUNT_NO_MAGIC_ADDR 0x10000</div><div class='del'>-/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT and</div><div class='del'>- * BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED (see below)</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_COPYCODE_HUNT_NO_DATAPATH_MAGIC_ADDR 0x1d0d0</div><div class='del'>-/* enum: Deprecated; equivalent to setting BOOT_MAGIC_PRESENT,</div><div class='del'>- * BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED and BOOT_MAGIC_IGNORE_CONFIG (see</div><div class='del'>- * below)</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_COPYCODE_HUNT_IGNORE_CONFIG_MAGIC_ADDR 0x1badc</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_OFST 0</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_LBN 17</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_PRESENT_WIDTH 1</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_OFST 0</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_LBN 2</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_SATELLITE_CPUS_NOT_LOADED_WIDTH 1</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_OFST 0</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_LBN 3</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_IGNORE_CONFIG_WIDTH 1</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_OFST 0</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_LBN 4</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_WIDTH 1</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_OFST 0</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_LBN 5</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_FORCE_STANDALONE_WIDTH 1</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_OFST 0</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_LBN 6</div><div class='del'>-#define        MC_CMD_COPYCODE_IN_BOOT_MAGIC_DISABLE_XIP_WIDTH 1</div><div class='del'>-/* Destination address */</div><div class='del'>-#define       MC_CMD_COPYCODE_IN_DEST_ADDR_OFST 4</div><div class='del'>-#define       MC_CMD_COPYCODE_IN_DEST_ADDR_LEN 4</div><div class='del'>-#define       MC_CMD_COPYCODE_IN_NUMWORDS_OFST 8</div><div class='del'>-#define       MC_CMD_COPYCODE_IN_NUMWORDS_LEN 4</div><div class='del'>-/* Address of where to jump after copy. */</div><div class='del'>-#define       MC_CMD_COPYCODE_IN_JUMP_OFST 12</div><div class='del'>-#define       MC_CMD_COPYCODE_IN_JUMP_LEN 4</div><div class='del'>-/* enum: Control should return to the caller rather than jumping */</div><div class='del'>-#define          MC_CMD_COPYCODE_JUMP_NONE 0x1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_COPYCODE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_COPYCODE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SET_FUNC</div><div class='del'>- * Select function for function-specific commands.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_FUNC 0x4</div><div class='del'>-#undef MC_CMD_0x4_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x4_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_FUNC_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_FUNC_IN_LEN 4</div><div class='del'>-/* Set function */</div><div class='del'>-#define       MC_CMD_SET_FUNC_IN_FUNC_OFST 0</div><div class='del'>-#define       MC_CMD_SET_FUNC_IN_FUNC_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_FUNC_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_FUNC_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_GET_BOOT_STATUS</div><div class='ctx'>  * Get the instruction address from which the MC booted.</div><div class='ctx'>  */</div><div class='hunk'>@@ -2259,6 +2079,7 @@</div><div class='ctx'> /* Log destination */</div><div class='ctx'> #define       MC_CMD_LOG_CTRL_IN_LOG_DEST_OFST 0</div><div class='ctx'> #define       MC_CMD_LOG_CTRL_IN_LOG_DEST_LEN 4</div><div class='add'>+/* enum property: bitmask */</div><div class='ctx'> /* enum: UART. */</div><div class='ctx'> #define          MC_CMD_LOG_CTRL_IN_LOG_DEST_UART 0x1</div><div class='ctx'> /* enum: Event queue. */</div><div class='hunk'>@@ -2304,6 +2125,9 @@</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_GET_VERSION_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_GET_VERSION_OUT_LEN 32</div><div class='add'>+/* This is normally the UTC build time in seconds since epoch or one of the</div><div class='add'>+ * special values listed</div><div class='add'>+ */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='hunk'>@@ -2326,6 +2150,9 @@</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_GET_VERSION_EXT_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_GET_VERSION_EXT_OUT_LEN 48</div><div class='add'>+/* This is normally the UTC build time in seconds since epoch or one of the</div><div class='add'>+ * special values listed</div><div class='add'>+ */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='hunk'>@@ -2356,6 +2183,9 @@</div><div class='ctx'>  * (depending on which components exist on a particular adapter)</div><div class='ctx'>  */</div><div class='ctx'> #define    MC_CMD_GET_VERSION_V2_OUT_LEN 304</div><div class='add'>+/* This is normally the UTC build time in seconds since epoch or one of the</div><div class='add'>+ * special values listed</div><div class='add'>+ */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='hunk'>@@ -2495,6 +2325,9 @@</div><div class='ctx'>  * (depending on which components exist on a particular adapter)</div><div class='ctx'>  */</div><div class='ctx'> #define    MC_CMD_GET_VERSION_V3_OUT_LEN 328</div><div class='add'>+/* This is normally the UTC build time in seconds since epoch or one of the</div><div class='add'>+ * special values listed</div><div class='add'>+ */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='hunk'>@@ -2641,6 +2474,9 @@</div><div class='ctx'>  * version information</div><div class='ctx'>  */</div><div class='ctx'> #define    MC_CMD_GET_VERSION_V4_OUT_LEN 392</div><div class='add'>+/* This is normally the UTC build time in seconds since epoch or one of the</div><div class='add'>+ * special values listed</div><div class='add'>+ */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='hunk'>@@ -2803,6 +2639,9 @@</div><div class='ctx'>  * and board version information</div><div class='ctx'>  */</div><div class='ctx'> #define    MC_CMD_GET_VERSION_V5_OUT_LEN 424</div><div class='add'>+/* This is normally the UTC build time in seconds since epoch or one of the</div><div class='add'>+ * special values listed</div><div class='add'>+ */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */</div><div class='ctx'> /*            MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='hunk'>@@ -3065,8 +2904,18 @@</div><div class='ctx'>  * subscribers.</div><div class='ctx'>  */</div><div class='ctx'> #define          MC_CMD_PTP_OP_SET_SYNC_STATUS 0x1b</div><div class='del'>-/* enum: Above this for future use. */</div><div class='del'>-#define          MC_CMD_PTP_OP_MAX 0x1c</div><div class='add'>+/* enum: X4 and later adapters should use this instead of</div><div class='add'>+ * PTP_OP_TIME_EVENT_SUBSCRIBE. Subscribe to receive periodic time events</div><div class='add'>+ * indicating the current NIC time</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_PTP_OP_TIME_EVENT_SUBSCRIBE_V2 0x1c</div><div class='add'>+/* enum: For X4 and later NICs. Packet timestamps and time sync events have</div><div class='add'>+ * IS_SET and IN_SYNC flags, that indicates whether time is updated and if it</div><div class='add'>+ * is in sync with host. Once set, IN_SYNC flag is cleared by hardware after a</div><div class='add'>+ * software configurable time out. Host driver need to query what is set and</div><div class='add'>+ * what is maximum supported interval, this MCDI can be used to query these.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_PTP_OP_GET_SYNC_TIMEOUT 0x1d</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_PTP_IN_ENABLE msgrequest */</div><div class='ctx'> #define    MC_CMD_PTP_IN_ENABLE_LEN 16</div><div class='hunk'>@@ -3507,6 +3356,22 @@</div><div class='ctx'> #define       MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_OFST 12</div><div class='ctx'> #define       MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_LEN 4</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2 msgrequest */</div><div class='add'>+#define    MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_LEN 16</div><div class='add'>+/*            MC_CMD_PTP_IN_CMD_OFST 0 */</div><div class='add'>+/*            MC_CMD_PTP_IN_CMD_LEN 4 */</div><div class='add'>+/*            MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */</div><div class='add'>+/*            MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */</div><div class='add'>+/* Event queue ID */</div><div class='add'>+#define       MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_QUEUE_ID_OFST 8</div><div class='add'>+#define       MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_QUEUE_ID_LEN 4</div><div class='add'>+/* Space for flags. */</div><div class='add'>+#define       MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_FLAGS_OFST 12</div><div class='add'>+#define       MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_FLAGS_LEN 4</div><div class='add'>+#define        MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_REPORT_SYNC_STATUS_OFST 12</div><div class='add'>+#define        MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_REPORT_SYNC_STATUS_LBN 31</div><div class='add'>+#define        MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_V2_REPORT_SYNC_STATUS_WIDTH 1</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_PTP_IN_MANFTEST_PPS msgrequest */</div><div class='ctx'> #define    MC_CMD_PTP_IN_MANFTEST_PPS_LEN 12</div><div class='ctx'> /*            MC_CMD_PTP_IN_CMD_OFST 0 */</div><div class='hunk'>@@ -3540,6 +3405,13 @@</div><div class='ctx'> #define       MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED1_OFST 20</div><div class='ctx'> #define       MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED1_LEN 4</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_PTP_IN_GET_SYNC_TIMEOUT msgrequest */</div><div class='add'>+#define    MC_CMD_PTP_IN_GET_SYNC_TIMEOUT_LEN 8</div><div class='add'>+/*            MC_CMD_PTP_IN_CMD_OFST 0 */</div><div class='add'>+/*            MC_CMD_PTP_IN_CMD_LEN 4 */</div><div class='add'>+/*            MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */</div><div class='add'>+/*            MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_PTP_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_PTP_OUT_LEN 0</div><div class='ctx'> </div><div class='hunk'>@@ -3939,416 +3811,14 @@</div><div class='ctx'> /* MC_CMD_PTP_OUT_SET_SYNC_STATUS msgresponse */</div><div class='ctx'> #define    MC_CMD_PTP_OUT_SET_SYNC_STATUS_LEN 0</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_CSR_READ32</div><div class='del'>- * Read 32bit words from the indirect memory map.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_CSR_READ32 0xc</div><div class='del'>-#undef MC_CMD_0xc_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CSR_READ32_IN msgrequest */</div><div class='del'>-#define    MC_CMD_CSR_READ32_IN_LEN 12</div><div class='del'>-/* Address */</div><div class='del'>-#define       MC_CMD_CSR_READ32_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_CSR_READ32_IN_ADDR_LEN 4</div><div class='del'>-#define       MC_CMD_CSR_READ32_IN_STEP_OFST 4</div><div class='del'>-#define       MC_CMD_CSR_READ32_IN_STEP_LEN 4</div><div class='del'>-#define       MC_CMD_CSR_READ32_IN_NUMWORDS_OFST 8</div><div class='del'>-#define       MC_CMD_CSR_READ32_IN_NUMWORDS_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CSR_READ32_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_CSR_READ32_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_CSR_READ32_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_CSR_READ32_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_CSR_READ32_OUT_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_CSR_READ32_OUT_BUFFER_NUM(len) (((len)-0)/4)</div><div class='del'>-/* The last dword is the status, not a value read */</div><div class='del'>-#define       MC_CMD_CSR_READ32_OUT_BUFFER_OFST 0</div><div class='del'>-#define       MC_CMD_CSR_READ32_OUT_BUFFER_LEN 4</div><div class='del'>-#define       MC_CMD_CSR_READ32_OUT_BUFFER_MINNUM 1</div><div class='del'>-#define       MC_CMD_CSR_READ32_OUT_BUFFER_MAXNUM 63</div><div class='del'>-#define       MC_CMD_CSR_READ32_OUT_BUFFER_MAXNUM_MCDI2 255</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_CSR_WRITE32</div><div class='del'>- * Write 32bit dwords to the indirect memory map.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_CSR_WRITE32 0xd</div><div class='del'>-#undef MC_CMD_0xd_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xd_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CSR_WRITE32_IN msgrequest */</div><div class='del'>-#define    MC_CMD_CSR_WRITE32_IN_LENMIN 12</div><div class='del'>-#define    MC_CMD_CSR_WRITE32_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_CSR_WRITE32_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_CSR_WRITE32_IN_LEN(num) (8+4*(num))</div><div class='del'>-#define    MC_CMD_CSR_WRITE32_IN_BUFFER_NUM(len) (((len)-8)/4)</div><div class='del'>-/* Address */</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_IN_ADDR_LEN 4</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_IN_STEP_OFST 4</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_IN_STEP_LEN 4</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_IN_BUFFER_OFST 8</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_IN_BUFFER_LEN 4</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_IN_BUFFER_MINNUM 1</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_IN_BUFFER_MAXNUM 61</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_IN_BUFFER_MAXNUM_MCDI2 253</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CSR_WRITE32_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_CSR_WRITE32_OUT_LEN 4</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_OUT_STATUS_OFST 0</div><div class='del'>-#define       MC_CMD_CSR_WRITE32_OUT_STATUS_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_HP</div><div class='del'>- * These commands are used for HP related features. They are grouped under one</div><div class='del'>- * MCDI command to avoid creating too many MCDI commands.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_HP 0x54</div><div class='del'>-#undef MC_CMD_0x54_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x54_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_HP_IN msgrequest */</div><div class='del'>-#define    MC_CMD_HP_IN_LEN 16</div><div class='del'>-/* HP OCSD sub-command. When address is not NULL, request activation of OCSD at</div><div class='del'>- * the specified address with the specified interval.When address is NULL,</div><div class='del'>- * INTERVAL is interpreted as a command: 0: stop OCSD / 1: Report OCSD current</div><div class='del'>- * state / 2: (debug) Show temperature reported by one of the supported</div><div class='del'>- * sensors.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_HP_IN_SUBCMD_OFST 0</div><div class='del'>-#define       MC_CMD_HP_IN_SUBCMD_LEN 4</div><div class='del'>-/* enum: OCSD (Option Card Sensor Data) sub-command. */</div><div class='del'>-#define          MC_CMD_HP_IN_OCSD_SUBCMD 0x0</div><div class='del'>-/* enum: Last known valid HP sub-command. */</div><div class='del'>-#define          MC_CMD_HP_IN_LAST_SUBCMD 0x0</div><div class='del'>-/* The address to the array of sensor fields. (Or NULL to use a sub-command.)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_ADDR_OFST 4</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_ADDR_LEN 8</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_ADDR_LO_LEN 4</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_ADDR_LO_LBN 32</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_ADDR_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_ADDR_HI_OFST 8</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_ADDR_HI_LEN 4</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_ADDR_HI_LBN 64</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_ADDR_HI_WIDTH 32</div><div class='del'>-/* The requested update interval, in seconds. (Or the sub-command if ADDR is</div><div class='del'>- * NULL.)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_INTERVAL_OFST 12</div><div class='del'>-#define       MC_CMD_HP_IN_OCSD_INTERVAL_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_HP_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_HP_OUT_LEN 4</div><div class='del'>-#define       MC_CMD_HP_OUT_OCSD_STATUS_OFST 0</div><div class='del'>-#define       MC_CMD_HP_OUT_OCSD_STATUS_LEN 4</div><div class='del'>-/* enum: OCSD stopped for this card. */</div><div class='del'>-#define          MC_CMD_HP_OUT_OCSD_STOPPED 0x1</div><div class='del'>-/* enum: OCSD was successfully started with the address provided. */</div><div class='del'>-#define          MC_CMD_HP_OUT_OCSD_STARTED 0x2</div><div class='del'>-/* enum: OCSD was already started for this card. */</div><div class='del'>-#define          MC_CMD_HP_OUT_OCSD_ALREADY_STARTED 0x3</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_STACKINFO</div><div class='del'>- * Get stack information.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_STACKINFO 0xf</div><div class='del'>-#undef MC_CMD_0xf_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xf_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_STACKINFO_IN msgrequest */</div><div class='del'>-#define    MC_CMD_STACKINFO_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_STACKINFO_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_STACKINFO_OUT_LENMIN 12</div><div class='del'>-#define    MC_CMD_STACKINFO_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_STACKINFO_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_STACKINFO_OUT_LEN(num) (0+12*(num))</div><div class='del'>-#define    MC_CMD_STACKINFO_OUT_THREAD_INFO_NUM(len) (((len)-0)/12)</div><div class='del'>-/* (thread ptr, stack size, free space) for each thread in system */</div><div class='del'>-#define       MC_CMD_STACKINFO_OUT_THREAD_INFO_OFST 0</div><div class='del'>-#define       MC_CMD_STACKINFO_OUT_THREAD_INFO_LEN 12</div><div class='del'>-#define       MC_CMD_STACKINFO_OUT_THREAD_INFO_MINNUM 1</div><div class='del'>-#define       MC_CMD_STACKINFO_OUT_THREAD_INFO_MAXNUM 21</div><div class='del'>-#define       MC_CMD_STACKINFO_OUT_THREAD_INFO_MAXNUM_MCDI2 85</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_MDIO_READ</div><div class='del'>- * MDIO register read.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_MDIO_READ 0x10</div><div class='del'>-#undef MC_CMD_0x10_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x10_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MDIO_READ_IN msgrequest */</div><div class='del'>-#define    MC_CMD_MDIO_READ_IN_LEN 16</div><div class='del'>-/* Bus number; there are two MDIO buses: one for the internal PHY, and one for</div><div class='del'>- * external devices.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_MDIO_READ_IN_BUS_OFST 0</div><div class='del'>-#define       MC_CMD_MDIO_READ_IN_BUS_LEN 4</div><div class='del'>-/* enum: Internal. */</div><div class='del'>-#define          MC_CMD_MDIO_BUS_INTERNAL 0x0</div><div class='del'>-/* enum: External. */</div><div class='del'>-#define          MC_CMD_MDIO_BUS_EXTERNAL 0x1</div><div class='del'>-/* Port address */</div><div class='del'>-#define       MC_CMD_MDIO_READ_IN_PRTAD_OFST 4</div><div class='del'>-#define       MC_CMD_MDIO_READ_IN_PRTAD_LEN 4</div><div class='del'>-/* Device Address or clause 22. */</div><div class='del'>-#define       MC_CMD_MDIO_READ_IN_DEVAD_OFST 8</div><div class='del'>-#define       MC_CMD_MDIO_READ_IN_DEVAD_LEN 4</div><div class='del'>-/* enum: By default all the MCDI MDIO operations perform clause45 mode. If you</div><div class='del'>- * want to use clause22 then set DEVAD = MC_CMD_MDIO_CLAUSE22.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_MDIO_CLAUSE22 0x20</div><div class='del'>-/* Address */</div><div class='del'>-#define       MC_CMD_MDIO_READ_IN_ADDR_OFST 12</div><div class='del'>-#define       MC_CMD_MDIO_READ_IN_ADDR_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MDIO_READ_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_MDIO_READ_OUT_LEN 8</div><div class='del'>-/* Value */</div><div class='del'>-#define       MC_CMD_MDIO_READ_OUT_VALUE_OFST 0</div><div class='del'>-#define       MC_CMD_MDIO_READ_OUT_VALUE_LEN 4</div><div class='del'>-/* Status the MDIO commands return the raw status bits from the MDIO block. A</div><div class='del'>- * "good" transaction should have the DONE bit set and all other bits clear.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_MDIO_READ_OUT_STATUS_OFST 4</div><div class='del'>-#define       MC_CMD_MDIO_READ_OUT_STATUS_LEN 4</div><div class='del'>-/* enum: Good. */</div><div class='del'>-#define          MC_CMD_MDIO_STATUS_GOOD 0x8</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_MDIO_WRITE</div><div class='del'>- * MDIO register write.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_MDIO_WRITE 0x11</div><div class='del'>-#undef MC_CMD_0x11_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x11_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MDIO_WRITE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_MDIO_WRITE_IN_LEN 20</div><div class='del'>-/* Bus number; there are two MDIO buses: one for the internal PHY, and one for</div><div class='del'>- * external devices.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_IN_BUS_OFST 0</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_IN_BUS_LEN 4</div><div class='del'>-/* enum: Internal. */</div><div class='del'>-/*               MC_CMD_MDIO_BUS_INTERNAL 0x0 */</div><div class='del'>-/* enum: External. */</div><div class='del'>-/*               MC_CMD_MDIO_BUS_EXTERNAL 0x1 */</div><div class='del'>-/* Port address */</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_IN_PRTAD_OFST 4</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_IN_PRTAD_LEN 4</div><div class='del'>-/* Device Address or clause 22. */</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_IN_DEVAD_OFST 8</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_IN_DEVAD_LEN 4</div><div class='del'>-/* enum: By default all the MCDI MDIO operations perform clause45 mode. If you</div><div class='del'>- * want to use clause22 then set DEVAD = MC_CMD_MDIO_CLAUSE22.</div><div class='del'>- */</div><div class='del'>-/*               MC_CMD_MDIO_CLAUSE22 0x20 */</div><div class='del'>-/* Address */</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_IN_ADDR_OFST 12</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_IN_ADDR_LEN 4</div><div class='del'>-/* Value */</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_IN_VALUE_OFST 16</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_IN_VALUE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MDIO_WRITE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_MDIO_WRITE_OUT_LEN 4</div><div class='del'>-/* Status; the MDIO commands return the raw status bits from the MDIO block. A</div><div class='del'>- * "good" transaction should have the DONE bit set and all other bits clear.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_OUT_STATUS_OFST 0</div><div class='del'>-#define       MC_CMD_MDIO_WRITE_OUT_STATUS_LEN 4</div><div class='del'>-/* enum: Good. */</div><div class='del'>-/*               MC_CMD_MDIO_STATUS_GOOD 0x8 */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DBI_WRITE</div><div class='del'>- * Write DBI register(s).</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DBI_WRITE 0x12</div><div class='del'>-#undef MC_CMD_0x12_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x12_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DBI_WRITE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DBI_WRITE_IN_LENMIN 12</div><div class='del'>-#define    MC_CMD_DBI_WRITE_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_DBI_WRITE_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_DBI_WRITE_IN_LEN(num) (0+12*(num))</div><div class='del'>-#define    MC_CMD_DBI_WRITE_IN_DBIWROP_NUM(len) (((len)-0)/12)</div><div class='del'>-/* Each write op consists of an address (offset 0), byte enable/VF/CS2 (offset</div><div class='del'>- * 32) and value (offset 64). See MC_CMD_DBIWROP_TYPEDEF.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DBI_WRITE_IN_DBIWROP_OFST 0</div><div class='del'>-#define       MC_CMD_DBI_WRITE_IN_DBIWROP_LEN 12</div><div class='del'>-#define       MC_CMD_DBI_WRITE_IN_DBIWROP_MINNUM 1</div><div class='del'>-#define       MC_CMD_DBI_WRITE_IN_DBIWROP_MAXNUM 21</div><div class='del'>-#define       MC_CMD_DBI_WRITE_IN_DBIWROP_MAXNUM_MCDI2 85</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DBI_WRITE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DBI_WRITE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DBIWROP_TYPEDEF structuredef */</div><div class='del'>-#define    MC_CMD_DBIWROP_TYPEDEF_LEN 12</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_ADDRESS_OFST 0</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LEN 4</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LBN 0</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_ADDRESS_WIDTH 32</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_PARMS_OFST 4</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_PARMS_LEN 4</div><div class='del'>-#define        MC_CMD_DBIWROP_TYPEDEF_VF_NUM_OFST 4</div><div class='del'>-#define        MC_CMD_DBIWROP_TYPEDEF_VF_NUM_LBN 16</div><div class='del'>-#define        MC_CMD_DBIWROP_TYPEDEF_VF_NUM_WIDTH 16</div><div class='del'>-#define        MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_OFST 4</div><div class='del'>-#define        MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_LBN 15</div><div class='del'>-#define        MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_WIDTH 1</div><div class='del'>-#define        MC_CMD_DBIWROP_TYPEDEF_CS2_OFST 4</div><div class='del'>-#define        MC_CMD_DBIWROP_TYPEDEF_CS2_LBN 14</div><div class='del'>-#define        MC_CMD_DBIWROP_TYPEDEF_CS2_WIDTH 1</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_PARMS_LBN 32</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_PARMS_WIDTH 32</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_VALUE_OFST 8</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_VALUE_LEN 4</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_VALUE_LBN 64</div><div class='del'>-#define       MC_CMD_DBIWROP_TYPEDEF_VALUE_WIDTH 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PORT_READ32</div><div class='del'>- * Read a 32-bit register from the indirect port register map. The port to</div><div class='del'>- * access is implied by the Shared memory channel used.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PORT_READ32 0x14</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PORT_READ32_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PORT_READ32_IN_LEN 4</div><div class='del'>-/* Address */</div><div class='del'>-#define       MC_CMD_PORT_READ32_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_PORT_READ32_IN_ADDR_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PORT_READ32_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PORT_READ32_OUT_LEN 8</div><div class='del'>-/* Value */</div><div class='del'>-#define       MC_CMD_PORT_READ32_OUT_VALUE_OFST 0</div><div class='del'>-#define       MC_CMD_PORT_READ32_OUT_VALUE_LEN 4</div><div class='del'>-/* Status */</div><div class='del'>-#define       MC_CMD_PORT_READ32_OUT_STATUS_OFST 4</div><div class='del'>-#define       MC_CMD_PORT_READ32_OUT_STATUS_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PORT_WRITE32</div><div class='del'>- * Write a 32-bit register to the indirect port register map. The port to</div><div class='del'>- * access is implied by the Shared memory channel used.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PORT_WRITE32 0x15</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PORT_WRITE32_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PORT_WRITE32_IN_LEN 8</div><div class='del'>-/* Address */</div><div class='del'>-#define       MC_CMD_PORT_WRITE32_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_PORT_WRITE32_IN_ADDR_LEN 4</div><div class='del'>-/* Value */</div><div class='del'>-#define       MC_CMD_PORT_WRITE32_IN_VALUE_OFST 4</div><div class='del'>-#define       MC_CMD_PORT_WRITE32_IN_VALUE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PORT_WRITE32_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PORT_WRITE32_OUT_LEN 4</div><div class='del'>-/* Status */</div><div class='del'>-#define       MC_CMD_PORT_WRITE32_OUT_STATUS_OFST 0</div><div class='del'>-#define       MC_CMD_PORT_WRITE32_OUT_STATUS_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PORT_READ128</div><div class='del'>- * Read a 128-bit register from the indirect port register map. The port to</div><div class='del'>- * access is implied by the Shared memory channel used.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PORT_READ128 0x16</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PORT_READ128_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PORT_READ128_IN_LEN 4</div><div class='del'>-/* Address */</div><div class='del'>-#define       MC_CMD_PORT_READ128_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_PORT_READ128_IN_ADDR_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PORT_READ128_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PORT_READ128_OUT_LEN 20</div><div class='del'>-/* Value */</div><div class='del'>-#define       MC_CMD_PORT_READ128_OUT_VALUE_OFST 0</div><div class='del'>-#define       MC_CMD_PORT_READ128_OUT_VALUE_LEN 16</div><div class='del'>-/* Status */</div><div class='del'>-#define       MC_CMD_PORT_READ128_OUT_STATUS_OFST 16</div><div class='del'>-#define       MC_CMD_PORT_READ128_OUT_STATUS_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PORT_WRITE128</div><div class='del'>- * Write a 128-bit register to the indirect port register map. The port to</div><div class='del'>- * access is implied by the Shared memory channel used.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PORT_WRITE128 0x17</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PORT_WRITE128_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PORT_WRITE128_IN_LEN 20</div><div class='del'>-/* Address */</div><div class='del'>-#define       MC_CMD_PORT_WRITE128_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_PORT_WRITE128_IN_ADDR_LEN 4</div><div class='del'>-/* Value */</div><div class='del'>-#define       MC_CMD_PORT_WRITE128_IN_VALUE_OFST 4</div><div class='del'>-#define       MC_CMD_PORT_WRITE128_IN_VALUE_LEN 16</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PORT_WRITE128_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PORT_WRITE128_OUT_LEN 4</div><div class='del'>-/* Status */</div><div class='del'>-#define       MC_CMD_PORT_WRITE128_OUT_STATUS_OFST 0</div><div class='del'>-#define       MC_CMD_PORT_WRITE128_OUT_STATUS_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CAPABILITIES structuredef */</div><div class='del'>-#define    MC_CMD_CAPABILITIES_LEN 4</div><div class='del'>-/* Small buf table. */</div><div class='del'>-#define       MC_CMD_CAPABILITIES_SMALL_BUF_TBL_LBN 0</div><div class='del'>-#define       MC_CMD_CAPABILITIES_SMALL_BUF_TBL_WIDTH 1</div><div class='del'>-/* Turbo mode (for Maranello). */</div><div class='del'>-#define       MC_CMD_CAPABILITIES_TURBO_LBN 1</div><div class='del'>-#define       MC_CMD_CAPABILITIES_TURBO_WIDTH 1</div><div class='del'>-/* Turbo mode active (for Maranello). */</div><div class='del'>-#define       MC_CMD_CAPABILITIES_TURBO_ACTIVE_LBN 2</div><div class='del'>-#define       MC_CMD_CAPABILITIES_TURBO_ACTIVE_WIDTH 1</div><div class='del'>-/* PTP offload. */</div><div class='del'>-#define       MC_CMD_CAPABILITIES_PTP_LBN 3</div><div class='del'>-#define       MC_CMD_CAPABILITIES_PTP_WIDTH 1</div><div class='del'>-/* AOE mode. */</div><div class='del'>-#define       MC_CMD_CAPABILITIES_AOE_LBN 4</div><div class='del'>-#define       MC_CMD_CAPABILITIES_AOE_WIDTH 1</div><div class='del'>-/* AOE mode active. */</div><div class='del'>-#define       MC_CMD_CAPABILITIES_AOE_ACTIVE_LBN 5</div><div class='del'>-#define       MC_CMD_CAPABILITIES_AOE_ACTIVE_WIDTH 1</div><div class='del'>-/* AOE mode active. */</div><div class='del'>-#define       MC_CMD_CAPABILITIES_FC_ACTIVE_LBN 6</div><div class='del'>-#define       MC_CMD_CAPABILITIES_FC_ACTIVE_WIDTH 1</div><div class='del'>-#define       MC_CMD_CAPABILITIES_RESERVED_LBN 7</div><div class='del'>-#define       MC_CMD_CAPABILITIES_RESERVED_WIDTH 25</div><div class='add'>+/* MC_CMD_PTP_OUT_GET_SYNC_TIMEOUT msgresponse */</div><div class='add'>+#define    MC_CMD_PTP_OUT_GET_SYNC_TIMEOUT_LEN 8</div><div class='add'>+/* Current value set in NIC, in seconds */</div><div class='add'>+#define       MC_CMD_PTP_OUT_GET_SYNC_TIMEOUT_CURRENT_OFST 0</div><div class='add'>+#define       MC_CMD_PTP_OUT_GET_SYNC_TIMEOUT_CURRENT_LEN 4</div><div class='add'>+/* Maximum supported by NIC, in seconds */</div><div class='add'>+#define       MC_CMD_PTP_OUT_GET_SYNC_TIMEOUT_MAXIMUM_OFST 4</div><div class='add'>+#define       MC_CMD_PTP_OUT_GET_SYNC_TIMEOUT_MAXIMUM_LEN 4</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='hunk'>@@ -4427,112 +3897,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_DBI_READX</div><div class='del'>- * Read DBI register(s) -- extended functionality</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DBI_READX 0x19</div><div class='del'>-#undef MC_CMD_0x19_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x19_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DBI_READX_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DBI_READX_IN_LENMIN 8</div><div class='del'>-#define    MC_CMD_DBI_READX_IN_LENMAX 248</div><div class='del'>-#define    MC_CMD_DBI_READX_IN_LENMAX_MCDI2 1016</div><div class='del'>-#define    MC_CMD_DBI_READX_IN_LEN(num) (0+8*(num))</div><div class='del'>-#define    MC_CMD_DBI_READX_IN_DBIRDOP_NUM(len) (((len)-0)/8)</div><div class='del'>-/* Each Read op consists of an address (offset 0), VF/CS2) */</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_LEN 8</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST 0</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_LO_LBN 0</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_HI_LBN 32</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM 31</div><div class='del'>-#define       MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 127</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DBI_READX_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DBI_READX_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_DBI_READX_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_DBI_READX_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_DBI_READX_OUT_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_DBI_READX_OUT_VALUE_NUM(len) (((len)-0)/4)</div><div class='del'>-/* Value */</div><div class='del'>-#define       MC_CMD_DBI_READX_OUT_VALUE_OFST 0</div><div class='del'>-#define       MC_CMD_DBI_READX_OUT_VALUE_LEN 4</div><div class='del'>-#define       MC_CMD_DBI_READX_OUT_VALUE_MINNUM 1</div><div class='del'>-#define       MC_CMD_DBI_READX_OUT_VALUE_MAXNUM 63</div><div class='del'>-#define       MC_CMD_DBI_READX_OUT_VALUE_MAXNUM_MCDI2 255</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DBIRDOP_TYPEDEF structuredef */</div><div class='del'>-#define    MC_CMD_DBIRDOP_TYPEDEF_LEN 8</div><div class='del'>-#define       MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_OFST 0</div><div class='del'>-#define       MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LEN 4</div><div class='del'>-#define       MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LBN 0</div><div class='del'>-#define       MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_WIDTH 32</div><div class='del'>-#define       MC_CMD_DBIRDOP_TYPEDEF_PARMS_OFST 4</div><div class='del'>-#define       MC_CMD_DBIRDOP_TYPEDEF_PARMS_LEN 4</div><div class='del'>-#define        MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_OFST 4</div><div class='del'>-#define        MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_LBN 16</div><div class='del'>-#define        MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_WIDTH 16</div><div class='del'>-#define        MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_OFST 4</div><div class='del'>-#define        MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_LBN 15</div><div class='del'>-#define        MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_WIDTH 1</div><div class='del'>-#define        MC_CMD_DBIRDOP_TYPEDEF_CS2_OFST 4</div><div class='del'>-#define        MC_CMD_DBIRDOP_TYPEDEF_CS2_LBN 14</div><div class='del'>-#define        MC_CMD_DBIRDOP_TYPEDEF_CS2_WIDTH 1</div><div class='del'>-#define       MC_CMD_DBIRDOP_TYPEDEF_PARMS_LBN 32</div><div class='del'>-#define       MC_CMD_DBIRDOP_TYPEDEF_PARMS_WIDTH 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SET_RAND_SEED</div><div class='del'>- * Set the 16byte seed for the MC pseudo-random generator.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_RAND_SEED 0x1a</div><div class='del'>-#undef MC_CMD_0x1a_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1a_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_RAND_SEED_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_RAND_SEED_IN_LEN 16</div><div class='del'>-/* Seed value. */</div><div class='del'>-#define       MC_CMD_SET_RAND_SEED_IN_SEED_OFST 0</div><div class='del'>-#define       MC_CMD_SET_RAND_SEED_IN_SEED_LEN 16</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_RAND_SEED_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_RAND_SEED_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_LTSSM_HIST</div><div class='del'>- * Retrieve the history of the LTSSM, if the build supports it.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_LTSSM_HIST 0x1b</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LTSSM_HIST_IN msgrequest */</div><div class='del'>-#define    MC_CMD_LTSSM_HIST_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LTSSM_HIST_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_LTSSM_HIST_OUT_LENMIN 0</div><div class='del'>-#define    MC_CMD_LTSSM_HIST_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_LTSSM_HIST_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_LTSSM_HIST_OUT_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_LTSSM_HIST_OUT_DATA_NUM(len) (((len)-0)/4)</div><div class='del'>-/* variable number of LTSSM values, as bytes. The history is read-to-clear. */</div><div class='del'>-#define       MC_CMD_LTSSM_HIST_OUT_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_LTSSM_HIST_OUT_DATA_LEN 4</div><div class='del'>-#define       MC_CMD_LTSSM_HIST_OUT_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_LTSSM_HIST_OUT_DATA_MAXNUM 63</div><div class='del'>-#define       MC_CMD_LTSSM_HIST_OUT_DATA_MAXNUM_MCDI2 255</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_DRV_ATTACH</div><div class='ctx'>  * Inform MCPU that this port is managed on the host (i.e. driver active). For</div><div class='ctx'>  * Huntington, also request the preferred datapath firmware to use if possible</div><div class='hunk'>@@ -4705,6 +4069,7 @@</div><div class='ctx'> /* Flags associated with this function */</div><div class='ctx'> #define       MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_OFST 4</div><div class='ctx'> #define       MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /* enum: Labels the lowest-numbered function visible to the OS */</div><div class='ctx'> #define          MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY 0x0</div><div class='ctx'> /* enum: The function can control the link state of the physical port it is</div><div class='hunk'>@@ -4732,22 +4097,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_SHMUART</div><div class='del'>- * Route UART output to circular buffer in shared memory instead.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SHMUART 0x1f</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SHMUART_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SHMUART_IN_LEN 4</div><div class='del'>-/* ??? */</div><div class='del'>-#define       MC_CMD_SHMUART_IN_FLAG_OFST 0</div><div class='del'>-#define       MC_CMD_SHMUART_IN_FLAG_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SHMUART_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SHMUART_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_PORT_RESET</div><div class='ctx'>  * Generic per-port reset. There is no equivalent for per-board reset. Locks</div><div class='ctx'>  * required: None; Return code: 0, ETIME. NOTE: This command is deprecated -</div><div class='hunk'>@@ -4790,100 +4139,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_PCIE_CREDITS</div><div class='del'>- * Read instantaneous and minimum flow control thresholds.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PCIE_CREDITS 0x21</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_CREDITS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PCIE_CREDITS_IN_LEN 8</div><div class='del'>-/* poll period. 0 is disabled */</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_LEN 4</div><div class='del'>-/* wipe statistics */</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_IN_WIPE_OFST 4</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_IN_WIPE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_CREDITS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PCIE_CREDITS_OUT_LEN 16</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_HDR_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_HDR_LEN 2</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_DATA_OFST 2</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_CURRENT_P_DATA_LEN 2</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_HDR_LEN 2</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_DATA_OFST 6</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_DATA_LEN 2</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_HDR_OFST 8</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_HDR_LEN 2</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_DATA_OFST 10</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_MINIMUM_P_DATA_LEN 2</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_HDR_OFST 12</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_HDR_LEN 2</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_DATA_OFST 14</div><div class='del'>-#define       MC_CMD_PCIE_CREDITS_OUT_MINIMUM_NP_DATA_LEN 2</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_RXD_MONITOR</div><div class='del'>- * Get histogram of RX queue fill level.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_RXD_MONITOR 0x22</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RXD_MONITOR_IN msgrequest */</div><div class='del'>-#define    MC_CMD_RXD_MONITOR_IN_LEN 12</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_IN_QID_OFST 0</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_IN_QID_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_OFST 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_IN_WIPE_OFST 8</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_IN_WIPE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RXD_MONITOR_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_RXD_MONITOR_OUT_LEN 80</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_QID_OFST 0</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_QID_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_FILL_OFST 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_FILL_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_FILL_OFST 8</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_FILL_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_1_OFST 12</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_1_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_2_OFST 16</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_2_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_4_OFST 20</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_4_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_8_OFST 24</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_8_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_16_OFST 28</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_16_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_32_OFST 32</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_32_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_64_OFST 36</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_64_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_128_OFST 40</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_128_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_256_OFST 44</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_LT_256_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_GE_256_OFST 48</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_RING_GE_256_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_1_OFST 52</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_1_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_2_OFST 56</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_2_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_4_OFST 60</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_4_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_8_OFST 64</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_8_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_16_OFST 68</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_16_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_32_OFST 72</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_LT_32_LEN 4</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_GE_32_OFST 76</div><div class='del'>-#define       MC_CMD_RXD_MONITOR_OUT_CACHE_GE_32_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_PUTS</div><div class='ctx'>  * Copy the given ASCII string out onto UART and/or out of the network port.</div><div class='ctx'>  */</div><div class='hunk'>@@ -4931,6 +4186,54 @@</div><div class='ctx'> /* MC_CMD_GET_PHY_CFG_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_GET_PHY_CFG_IN_LEN 0</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_GET_PHY_CFG_IN_V2 msgrequest */</div><div class='add'>+#define    MC_CMD_GET_PHY_CFG_IN_V2_LEN 8</div><div class='add'>+/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which</div><div class='add'>+ * identifies a real or virtual network port by MAE port and link end. See the</div><div class='add'>+ * structure definition for more details</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LEN 8</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_LBN 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_LBN 32</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_WIDTH 32</div><div class='add'>+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LINK_END_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LINK_END_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LEN 8</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_LBN 0</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_LBN 32</div><div class='add'>+#define       MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_WIDTH 32</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_GET_PHY_CFG_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_GET_PHY_CFG_OUT_LEN 72</div><div class='ctx'> /* flags */</div><div class='hunk'>@@ -5026,6 +4329,9 @@</div><div class='ctx'> #define        MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_OFST 8</div><div class='ctx'> #define        MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN 21</div><div class='ctx'> #define        MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_PHY_CAP_200000FDX_OFST 8</div><div class='add'>+#define        MC_CMD_PHY_CAP_200000FDX_LBN 22</div><div class='add'>+#define        MC_CMD_PHY_CAP_200000FDX_WIDTH 1</div><div class='ctx'> /* ?? */</div><div class='ctx'> #define       MC_CMD_GET_PHY_CFG_OUT_CHANNEL_OFST 12</div><div class='ctx'> #define       MC_CMD_GET_PHY_CFG_OUT_CHANNEL_LEN 4</div><div class='hunk'>@@ -5059,6 +4365,7 @@</div><div class='ctx'> #define          MC_CMD_MEDIA_DSFP 0x8</div><div class='ctx'> #define       MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_OFST 48</div><div class='ctx'> #define       MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /* enum: Native clause 22 */</div><div class='ctx'> #define          MC_CMD_MMD_CLAUSE22 0x0</div><div class='ctx'> #define          MC_CMD_MMD_CLAUSE45_PMAPMD 0x1 /* enum */</div><div class='hunk'>@@ -5084,7 +4391,7 @@</div><div class='ctx'> #define MC_CMD_START_BIST 0x25</div><div class='ctx'> #undef MC_CMD_0x25_PRIVILEGE_CTG</div><div class='ctx'> </div><div class='del'>-#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='add'>+#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_START_BIST_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_START_BIST_IN_LEN 4</div><div class='hunk'>@@ -5124,7 +4431,7 @@</div><div class='ctx'> #define MC_CMD_POLL_BIST 0x26</div><div class='ctx'> #undef MC_CMD_0x26_PRIVILEGE_CTG</div><div class='ctx'> </div><div class='del'>-#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='add'>+#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_POLL_BIST_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_POLL_BIST_IN_LEN 0</div><div class='hunk'>@@ -5282,33 +4589,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_FLUSH_RX_QUEUES</div><div class='del'>- * Flush receive queue(s). If SRIOV is enabled (via MC_CMD_SRIOV), then RXQ</div><div class='del'>- * flushes should be initiated via this MCDI operation, rather than via</div><div class='del'>- * directly writing FLUSH_CMD.</div><div class='del'>- *</div><div class='del'>- * The flush is completed (either done/fail) asynchronously (after this command</div><div class='del'>- * returns). The driver must still wait for flush done/failure events as usual.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_FLUSH_RX_QUEUES 0x27</div><div class='del'>-</div><div class='del'>-/* MC_CMD_FLUSH_RX_QUEUES_IN msgrequest */</div><div class='del'>-#define    MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4</div><div class='del'>-#define    MC_CMD_FLUSH_RX_QUEUES_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_FLUSH_RX_QUEUES_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_FLUSH_RX_QUEUES_IN_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_NUM(len) (((len)-0)/4)</div><div class='del'>-#define       MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_OFST 0</div><div class='del'>-#define       MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_LEN 4</div><div class='del'>-#define       MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MINNUM 1</div><div class='del'>-#define       MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM 63</div><div class='del'>-#define       MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM_MCDI2 255</div><div class='del'>-</div><div class='del'>-/* MC_CMD_FLUSH_RX_QUEUES_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_FLUSH_RX_QUEUES_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_GET_LOOPBACK_MODES</div><div class='ctx'>  * Returns a bitmask of loopback modes available at each speed.</div><div class='ctx'>  */</div><div class='hunk'>@@ -5320,6 +4600,54 @@</div><div class='ctx'> /* MC_CMD_GET_LOOPBACK_MODES_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_GET_LOOPBACK_MODES_IN_LEN 0</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_GET_LOOPBACK_MODES_IN_V2 msgrequest */</div><div class='add'>+#define    MC_CMD_GET_LOOPBACK_MODES_IN_V2_LEN 8</div><div class='add'>+/* Target port to request loopback modes for. Uses MAE_LINK_ENDPOINT_SELECTOR</div><div class='add'>+ * which identifies a real or virtual network port by MAE port and link end.</div><div class='add'>+ * See the structure definition for more details</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_LBN 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_OFST 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_LBN 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_WIDTH 32</div><div class='add'>+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LINK_END_OFST 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LINK_END_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_LBN 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_OFST 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_LBN 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_WIDTH 32</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_GET_LOOPBACK_MODES_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_GET_LOOPBACK_MODES_OUT_LEN 40</div><div class='ctx'> /* Supported loopbacks. */</div><div class='hunk'>@@ -5333,6 +4661,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /* enum: None. */</div><div class='ctx'> #define          MC_CMD_LOOPBACK_NONE 0x0</div><div class='ctx'> /* enum: Data. */</div><div class='hunk'>@@ -5422,6 +4751,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> /* Supported loopbacks. */</div><div class='hunk'>@@ -5435,6 +4765,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> /* Supported loopbacks. */</div><div class='hunk'>@@ -5448,6 +4779,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> /* Supported loopbacks. */</div><div class='hunk'>@@ -5461,6 +4793,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> </div><div class='hunk'>@@ -5479,6 +4812,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /* enum: None. */</div><div class='ctx'> /*               MC_CMD_LOOPBACK_NONE 0x0 */</div><div class='ctx'> /* enum: Data. */</div><div class='hunk'>@@ -5568,6 +4902,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> /* Supported loopbacks. */</div><div class='hunk'>@@ -5581,6 +4916,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> /* Supported loopbacks. */</div><div class='hunk'>@@ -5594,6 +4930,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> /* Supported loopbacks. */</div><div class='hunk'>@@ -5607,6 +4944,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> /* Supported 25G loopbacks. */</div><div class='hunk'>@@ -5620,6 +4958,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> /* Supported 50 loopbacks. */</div><div class='hunk'>@@ -5633,6 +4972,7 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> /* Supported 100G loopbacks. */</div><div class='hunk'>@@ -5646,6 +4986,214 @@</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480</div><div class='ctx'> #define       MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               100M */</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_LOOPBACK_MODES_OUT_V3 msgresponse: Supported loopback modes for</div><div class='add'>+ * newer NICs with 200G support</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_GET_LOOPBACK_MODES_OUT_V3_LEN 72</div><div class='add'>+/* Supported loopbacks. */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_LBN 0</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_OFST 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_LBN 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/* enum: None. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_NONE 0x0 */</div><div class='add'>+/* enum: Data. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_DATA 0x1 */</div><div class='add'>+/* enum: GMAC. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_GMAC 0x2 */</div><div class='add'>+/* enum: XGMII. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XGMII 0x3 */</div><div class='add'>+/* enum: XGXS. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XGXS 0x4 */</div><div class='add'>+/* enum: XAUI. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XAUI 0x5 */</div><div class='add'>+/* enum: GMII. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_GMII 0x6 */</div><div class='add'>+/* enum: SGMII. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_SGMII 0x7 */</div><div class='add'>+/* enum: XGBR. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XGBR 0x8 */</div><div class='add'>+/* enum: XFI. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XFI 0x9 */</div><div class='add'>+/* enum: XAUI Far. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XAUI_FAR 0xa */</div><div class='add'>+/* enum: GMII Far. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_GMII_FAR 0xb */</div><div class='add'>+/* enum: SGMII Far. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_SGMII_FAR 0xc */</div><div class='add'>+/* enum: XFI Far. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XFI_FAR 0xd */</div><div class='add'>+/* enum: GPhy. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_GPHY 0xe */</div><div class='add'>+/* enum: PhyXS. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_PHYXS 0xf */</div><div class='add'>+/* enum: PCS. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_PCS 0x10 */</div><div class='add'>+/* enum: PMA-PMD. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_PMAPMD 0x11 */</div><div class='add'>+/* enum: Cross-Port. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XPORT 0x12 */</div><div class='add'>+/* enum: XGMII-Wireside. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XGMII_WS 0x13 */</div><div class='add'>+/* enum: XAUI Wireside. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XAUI_WS 0x14 */</div><div class='add'>+/* enum: XAUI Wireside Far. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XAUI_WS_FAR 0x15 */</div><div class='add'>+/* enum: XAUI Wireside near. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XAUI_WS_NEAR 0x16 */</div><div class='add'>+/* enum: GMII Wireside. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_GMII_WS 0x17 */</div><div class='add'>+/* enum: XFI Wireside. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XFI_WS 0x18 */</div><div class='add'>+/* enum: XFI Wireside Far. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_XFI_WS_FAR 0x19 */</div><div class='add'>+/* enum: PhyXS Wireside. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_PHYXS_WS 0x1a */</div><div class='add'>+/* enum: PMA lanes MAC-Serdes. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_PMA_INT 0x1b */</div><div class='add'>+/* enum: KR Serdes Parallel (Encoder). */</div><div class='add'>+/*               MC_CMD_LOOPBACK_SD_NEAR 0x1c */</div><div class='add'>+/* enum: KR Serdes Serial. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_SD_FAR 0x1d */</div><div class='add'>+/* enum: PMA lanes MAC-Serdes Wireside. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_PMA_INT_WS 0x1e */</div><div class='add'>+/* enum: KR Serdes Parallel Wireside (Full PCS). */</div><div class='add'>+/*               MC_CMD_LOOPBACK_SD_FEP2_WS 0x1f */</div><div class='add'>+/* enum: KR Serdes Parallel Wireside (Sym Aligner to TX). */</div><div class='add'>+/*               MC_CMD_LOOPBACK_SD_FEP1_5_WS 0x20 */</div><div class='add'>+/* enum: KR Serdes Parallel Wireside (Deserializer to Serializer). */</div><div class='add'>+/*               MC_CMD_LOOPBACK_SD_FEP_WS 0x21 */</div><div class='add'>+/* enum: KR Serdes Serial Wireside. */</div><div class='add'>+/*               MC_CMD_LOOPBACK_SD_FES_WS 0x22 */</div><div class='add'>+/* enum: Near side of AOE Siena side port */</div><div class='add'>+/*               MC_CMD_LOOPBACK_AOE_INT_NEAR 0x23 */</div><div class='add'>+/* enum: Medford Wireside datapath loopback */</div><div class='add'>+/*               MC_CMD_LOOPBACK_DATA_WS 0x24 */</div><div class='add'>+/* enum: Force link up without setting up any physical loopback (snapper use</div><div class='add'>+ * only)</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_LOOPBACK_FORCE_EXT_LINK 0x25 */</div><div class='add'>+/* Supported loopbacks. */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_OFST 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_OFST 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_LBN 64</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_OFST 12</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_LBN 96</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               100M */</div><div class='add'>+/* Supported loopbacks. */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_OFST 16</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_OFST 16</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_LBN 128</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_OFST 20</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_LBN 160</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               100M */</div><div class='add'>+/* Supported loopbacks. */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_OFST 24</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_OFST 24</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_LBN 192</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_OFST 28</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_LBN 224</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               100M */</div><div class='add'>+/* Supported loopbacks. */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_OFST 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_OFST 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_LBN 256</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_OFST 36</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_LBN 288</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               100M */</div><div class='add'>+/* Supported 25G loopbacks. */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_OFST 40</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_OFST 40</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_LBN 320</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_OFST 44</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_LBN 352</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               100M */</div><div class='add'>+/* Supported 50 loopbacks. */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_OFST 48</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_OFST 48</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_LBN 384</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_OFST 52</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_LBN 416</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               100M */</div><div class='add'>+/* Supported 100G loopbacks. */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_OFST 56</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_OFST 56</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_LBN 448</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_OFST 60</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_LBN 480</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               100M */</div><div class='add'>+/* Supported 200G loopbacks. */</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_OFST 64</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_OFST 64</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_LBN 512</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_OFST 68</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_LBN 544</div><div class='add'>+#define       MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               100M */</div><div class='ctx'> </div><div class='hunk'>@@ -5673,13 +5221,835 @@</div><div class='ctx'> #define       FEC_TYPE_TYPE_LEN 4</div><div class='ctx'> /* enum: No FEC */</div><div class='ctx'> #define          MC_CMD_FEC_NONE 0x0</div><div class='del'>-/* enum: Clause 74 BASE-R FEC (a.k.a Firecode) */</div><div class='add'>+/* enum: IEEE 802.3, Clause 74 BASE-R FEC (a.k.a Firecode) */</div><div class='ctx'> #define          MC_CMD_FEC_BASER 0x1</div><div class='del'>-/* enum: Clause 91/Clause 108 Reed-Solomon FEC */</div><div class='add'>+/* enum: IEEE 802.3, Clause 91/Clause 108 Reed-Solomon FEC */</div><div class='ctx'> #define          MC_CMD_FEC_RS 0x2</div><div class='add'>+/* enum: IEEE 802.3, Clause 161, interleaved RS-FEC sublayer for 100GBASE-R</div><div class='add'>+ * PHYs</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_FEC_IEEE_RS_INT 0x3</div><div class='add'>+/* enum: Ethernet Consortium, Low Latency RS-FEC. RS(272, 258). Replaces FEC</div><div class='add'>+ * specified in Clause 119 for 100/200G PHY. Replaces FEC specified in Clause</div><div class='add'>+ * 134 for 50G PHY.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_FEC_ETCS_RS_LL 0x4</div><div class='add'>+/* enum: FEC mode selected automatically */</div><div class='add'>+#define          MC_CMD_FEC_AUTO 0x5</div><div class='ctx'> #define       FEC_TYPE_TYPE_LBN 0</div><div class='ctx'> #define       FEC_TYPE_TYPE_WIDTH 32</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_ETH_TECH structuredef: Ethernet technology as defined by IEEE802.3,</div><div class='add'>+ * Ethernet Technology Consortium, proprietary technologies. The driver must</div><div class='add'>+ * not use technologies labelled NONE and AUTO.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_ETH_TECH_LEN 16</div><div class='add'>+/* The enums in this field can be used either as bitwise indices into a tech</div><div class='add'>+ * mask (e.g. see MC_CMD_ETH_AN_FIELDS/TECH_MASK for example) or as regular</div><div class='add'>+ * enums (e.g. see MC_CMD_LINK_CTRL_IN/ADVERTISED_TECH_ABILITIES_MASK). This</div><div class='add'>+ * structure must be updated to add new technologies when projects that need</div><div class='add'>+ * them arise. An incomplete list of possible expansion in the future include:</div><div class='add'>+ * 100GBASE_KP4, 800GBASE_CR8, 800GBASE_KR8, 800GBASE_DR8, 800GBASE_SR8</div><div class='add'>+ * 800GBASE_VR8</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_ETH_TECH_TECH_OFST 0</div><div class='add'>+#define       MC_CMD_ETH_TECH_TECH_LEN 16</div><div class='add'>+/* enum: 1000BASE-KX - 1000BASE-X PCS/PMA over an electrical backplane PMD. See</div><div class='add'>+ * IEEE 802.3 Clause 70</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_1000BASEKX 0x0</div><div class='add'>+/* enum: 10GBASE-R - PCS/PMA over an electrical backplane PMD. Refer to IEEE</div><div class='add'>+ * 802.3 Clause 72</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_10GBASE_KR 0x1</div><div class='add'>+/* enum: 40GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3</div><div class='add'>+ * Clause 84.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_40GBASE_KR4 0x2</div><div class='add'>+/* enum: 40GBASE-R PCS/PMA over 4 lane shielded copper balanced cable PMD. See</div><div class='add'>+ * IEEE 802.3 Clause 85</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_40GBASE_CR4 0x3</div><div class='add'>+/* enum: 40GBASE-R PCS/PMA over 4 lane multimode fiber PMD as specified in</div><div class='add'>+ * Clause 86</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_40GBASE_SR4 0x4</div><div class='add'>+/* enum: 40GBASE-R PCS/PMA over 4 WDM lane single mode fiber PMD with long</div><div class='add'>+ * reach. See IEEE 802.3 Clause 87</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_40GBASE_LR4 0x5</div><div class='add'>+/* enum: 25GBASE-R PCS/PMA over shielded balanced copper cable PMD. See IEEE</div><div class='add'>+ * 802.3 Clause 110</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_25GBASE_CR 0x6</div><div class='add'>+/* enum: 25GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3</div><div class='add'>+ * Clause 111</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_25GBASE_KR 0x7</div><div class='add'>+/* enum: 25GBASE-R PCS/PMA over multimode fiber PMD. Refer to IEEE 802.3 Clause</div><div class='add'>+ * 112</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_25GBASE_SR 0x8</div><div class='add'>+/* enum: An Ethernet Physical layer operating at 50 Gb/s on twin-axial copper</div><div class='add'>+ * cable. Refer to Ethernet Technology Consortium 25/50G Ethernet Spec.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_50GBASE_CR2 0x9</div><div class='add'>+/* enum: An Ethernet Physical layer operating at 50 Gb/s on copper backplane.</div><div class='add'>+ * Refer to Ethernet Technology Consortium 25/50G Ethernet Spec.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_50GBASE_KR2 0xa</div><div class='add'>+/* enum: 100GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3</div><div class='add'>+ * Clause 93</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_KR4 0xb</div><div class='add'>+/* enum: 100GBASE-R PCS/PMA over 4 lane multimode fiber PMD. See IEEE 802.3</div><div class='add'>+ * Clause 95</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_SR4 0xc</div><div class='add'>+/* enum: 100GBASE-R PCS/PMA over 4 lane shielded copper balanced cable PMD. See</div><div class='add'>+ * IEEE 802.3 Clause 92</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_CR4 0xd</div><div class='add'>+/* enum: 100GBASE-R PCS/PMA over 4 WDM lane single mode fiber PMD, with</div><div class='add'>+ * long/extended reach,. See IEEE 802.3 Clause 88</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_LR4_ER4 0xe</div><div class='add'>+/* enum: An Ethernet Physical layer operating at 50 Gb/s on short reach fiber.</div><div class='add'>+ * Refer to Ethernet Technology Consortium 25/50G Ethernet Spec.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_50GBASE_SR2 0xf</div><div class='add'>+/* enum: 1000BASEX PCS/PMA. See IEEE 802.3 Clause 36 over undefined PMD, duplex</div><div class='add'>+ * mode unknown</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_1000BASEX 0x10</div><div class='add'>+/* enum: Non-standardised. 10G direct attach */</div><div class='add'>+#define          MC_CMD_ETH_TECH_10GBASE_CR 0x11</div><div class='add'>+/* enum: 10GBASE-SR fiber over 850nm optics. See IEEE 802.3 Clause 52 */</div><div class='add'>+#define          MC_CMD_ETH_TECH_10GBASE_SR 0x12</div><div class='add'>+/* enum: 10GBASE-LR fiber over 1310nm optics. See IEEE 802.3 Clause 52 */</div><div class='add'>+#define          MC_CMD_ETH_TECH_10GBASE_LR 0x13</div><div class='add'>+/* enum: 10GBASE-LRM fiber over 1310 nm optics. See IEEE 802.3 Clause 68 */</div><div class='add'>+#define          MC_CMD_ETH_TECH_10GBASE_LRM 0x14</div><div class='add'>+/* enum: 10GBASE-ER fiber over 1550nm optics. See IEEE 802.3 Clause 52 */</div><div class='add'>+#define          MC_CMD_ETH_TECH_10GBASE_ER 0x15</div><div class='add'>+/* enum: 50GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3</div><div class='add'>+ * Clause 137</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_50GBASE_KR 0x16</div><div class='add'>+/* enum: 50GBASE-SR PCS/PMA over multimode fiber PMD as specified in Clause 138</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_50GBASE_SR 0x17</div><div class='add'>+/* enum: 50GBASE-CR PCS/PMA over shielded copper balanced cable PMD. See IEEE</div><div class='add'>+ * 802.3 Clause 136</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_50GBASE_CR 0x18</div><div class='add'>+/* enum: 50GBASE-R PCS/PMA over single mode fiber PMD as specified in Clause</div><div class='add'>+ * 139.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_50GBASE_LR_ER_FR 0x19</div><div class='add'>+/* enum: 100 Gb/s PHY using 100GBASE-R encoding over single-mode fiber with</div><div class='add'>+ * reach up to at least 500 m (see IEEE 802.3 Clause 140)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_50GBASE_DR 0x1a</div><div class='add'>+/* enum: 100GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3</div><div class='add'>+ * Clause 137</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_KR2 0x1b</div><div class='add'>+/* enum: 100GBASE-R PCS/PMA over 2 lane multimode fiber PMD. See IEEE 802.3</div><div class='add'>+ * Clause 138</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_SR2 0x1c</div><div class='add'>+/* enum: 100GBASE-R PCS/PMA over 2 lane shielded copper balanced cable PMD. See</div><div class='add'>+ * IEEE 802.3 Clause 136</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_CR2 0x1d</div><div class='add'>+/* enum: Unknown source */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_LR2_ER2_FR2 0x1e</div><div class='add'>+/* enum: Unknown source */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_DR2 0x1f</div><div class='add'>+/* enum: 200GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3</div><div class='add'>+ * Clause 137</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_200GBASE_KR4 0x20</div><div class='add'>+/* enum: 200GBASE-R PCS/PMA over 4 lane multimode fiber PMD. See IEEE 802.3</div><div class='add'>+ * Clause 138</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_200GBASE_SR4 0x21</div><div class='add'>+/* enum: 200GBASE-R PCS/PMA over 4 WDM lane single-mode fiber PMD as specified</div><div class='add'>+ * in Clause 122</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_200GBASE_LR4_ER4_FR4 0x22</div><div class='add'>+/* enum: 200GBASE-R PCS/PMA over 4-lane single-mode fiber PMD. See IEEE 802.3</div><div class='add'>+ * Clause 121</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_200GBASE_DR4 0x23</div><div class='add'>+/* enum: 200GBASE-R PCS/PMA over 4 lane shielded copper balanced cable PMD as</div><div class='add'>+ * specified in Clause 136</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_200GBASE_CR4 0x24</div><div class='add'>+/* enum: Ethernet Technology Consortium 400G AN Spec. 400GBASE-KR8 PMD uses</div><div class='add'>+ * 802.3 Clause 137, but the number PMD lanes is 8.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_400GBASE_KR8 0x25</div><div class='add'>+/* enum: 400GBASE-R PCS/PMA over 8-lane multimode fiber PMD. See IEEE 802.3</div><div class='add'>+ * Clause 138</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_400GBASE_SR8 0x26</div><div class='add'>+/* enum: 400GBASE-R PCS/PMA over 8 WDM lane single-mode fiber PMD. See IEEE</div><div class='add'>+ * 802.3 Clause 122</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_400GBASE_LR8_ER8_FR8 0x27</div><div class='add'>+/* enum: Unknown source */</div><div class='add'>+#define          MC_CMD_ETH_TECH_400GBASE_DR8 0x28</div><div class='add'>+/* enum: Ethernet Technology Consortium 400G AN Spec. 400GBASE-CR8 PMD uses</div><div class='add'>+ * IEEE 802.3 Clause 136, but the number PMD lanes is 8.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_400GBASE_CR8 0x29</div><div class='add'>+/* enum: 100GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3ck</div><div class='add'>+ * Clause 163.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_KR 0x2a</div><div class='add'>+/* enum: IEEE 802.3ck. 100G PHY with PMD as specified in Clause 167 over short</div><div class='add'>+ * reach fiber</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_SR 0x2b</div><div class='add'>+/* enum: 100G PMD together with single-mode fiber medium. See IEEE 802.3 Clause</div><div class='add'>+ * 140</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_LR_ER_FR 0x2c</div><div class='add'>+/* enum: 100GBASE-R PCS/PMA over shielded balanced copper cable PMD. See IEEE</div><div class='add'>+ * 802.3 in Clause 162 IEEE 802.3ck.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_CR 0x2d</div><div class='add'>+/* enum: 100G PMD together with single-mode fiber medium. See IEEE 802.3 Clause</div><div class='add'>+ * 140</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_DR 0x2e</div><div class='add'>+/* enum: 200GBASE-R PCS/PMA over an electrical backplane PMD as specified in</div><div class='add'>+ * Clause 163 IEEE 802.3ck</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_200GBASE_KR2 0x2f</div><div class='add'>+/* enum: 200G PHY with PMD as specified in Clause 167 over short reach fiber</div><div class='add'>+ * IEEE 802.3ck</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_200GBASE_SR2 0x30</div><div class='add'>+/* enum: Unknown source */</div><div class='add'>+#define          MC_CMD_ETH_TECH_200GBASE_LR2_ER2_FR2 0x31</div><div class='add'>+/* enum: Unknown source */</div><div class='add'>+#define          MC_CMD_ETH_TECH_200GBASE_DR2 0x32</div><div class='add'>+/* enum: 200GBASE-R PCS/PMA over 2 lane shielded balanced copper cable PMD as</div><div class='add'>+ * specified in Clause 162 IEEE 802.3ck.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_200GBASE_CR2 0x33</div><div class='add'>+/* enum: 400GBASE-R PCS/PMA over an electrical backplane PMD. See IEEE 802.3</div><div class='add'>+ * Clause 163 IEEE 802.3ck.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_400GBASE_KR4 0x34</div><div class='add'>+/* enum: 400G PHY with PMD over short reach fiber. See Clause 167 of IEEE</div><div class='add'>+ * 802.3ck.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_400GBASE_SR4 0x35</div><div class='add'>+/* enum: 400GBASE-R PCS/PMA over 4 WDM lane single-mode fiber PMD. See IEEE</div><div class='add'>+ * 802.3 Clause 151</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_400GBASE_LR4_ER4_FR4 0x36</div><div class='add'>+/* enum: 400GBASE-R PCS/PMA over 4-lane single-mode fiber PMD as specified in</div><div class='add'>+ * Clause 124</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_400GBASE_DR4 0x37</div><div class='add'>+/* enum: 400GBASE-R PCS/PMA over 4 lane shielded balanced copper cable PMD as</div><div class='add'>+ * specified in Clause 162 of IEEE 802.3ck.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_400GBASE_CR4 0x38</div><div class='add'>+/* enum: Automatic tech mode. The driver must not use this. */</div><div class='add'>+#define          MC_CMD_ETH_TECH_AUTO 0x39</div><div class='add'>+/* enum: See IEEE 802.3cc-2017 Clause 114 */</div><div class='add'>+#define          MC_CMD_ETH_TECH_25GBASE_LR_ER 0x3a</div><div class='add'>+/* enum: Up to 7 m over twinaxial copper cable assembly (10 lanes, 10 Gbit/s</div><div class='add'>+ * each) See IEEE 802.3ba-2010 Clause 85</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_ETH_TECH_100GBASE_CR10 0x3b</div><div class='add'>+/* enum: Invalid tech mode. The driver must not use this. */</div><div class='add'>+#define          MC_CMD_ETH_TECH_NONE 0x7f</div><div class='add'>+#define       MC_CMD_ETH_TECH_TECH_LBN 0</div><div class='add'>+#define       MC_CMD_ETH_TECH_TECH_WIDTH 128</div><div class='add'>+</div><div class='add'>+/* MC_CMD_LINK_STATUS_FLAGS structuredef */</div><div class='add'>+#define    MC_CMD_LINK_STATUS_FLAGS_LEN 8</div><div class='add'>+/* Flags used to report the current configuration/state of the link. */</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LEN 8</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_LBN 0</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_OFST 4</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_LBN 32</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/* enum: Whether we have overall link up */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_LINK_UP 0x0</div><div class='add'>+/* enum: If set, the PHY has no external RX link synchronisation */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_NO_PHY_LINK 0x1</div><div class='add'>+/* enum: If set, PMD/MDI is not connected (e.g. cable disconnected, module cage</div><div class='add'>+ * empty)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PMD_MDI_DISCONNECTED 0x2</div><div class='add'>+/* enum: Set on error while decoding module data (e.g. module EEPROM does not</div><div class='add'>+ * contain valid values, has checksum errors, etc.)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PMD_BAD 0x3</div><div class='add'>+/* enum: Set when module unsupported (e.g. unsupported link rate or link</div><div class='add'>+ * technology)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PMD_UNSUPPORTED 0x4</div><div class='add'>+/* enum: Set on error while communicating with the module (e.g. I2C errors</div><div class='add'>+ * while reading EEPROM)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PMD_COMMS_FAULT 0x5</div><div class='add'>+/* enum: Set on module overcurrent/overvoltage condition */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PMD_POWER_FAULT 0x6</div><div class='add'>+/* enum: Set on module overtemperature condition */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PMD_THERMAL_FAULT 0x7</div><div class='add'>+/* enum: If set, the module is indicating Loss of Signal */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PMD_LOS 0x8</div><div class='add'>+/* enum: If set, PMA is indicating loss of CDR lock (clock sync) */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PMA_NO_CDR_LOCK 0x9</div><div class='add'>+/* enum: If set, PMA is indicating loss of analog signal */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PMA_LOS 0xa</div><div class='add'>+/* enum: If set, PCS is indicating loss of block lock */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PCS_NO_BLOCK_LOCK 0xb</div><div class='add'>+/* enum: If set, PCS is indicating loss of alignment marker lock on one or more</div><div class='add'>+ * lanes</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PCS_NO_AM_LOCK 0xc</div><div class='add'>+/* enum: If set, PCS is indicating loss of overall alignment lock */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PCS_NO_ALIGN_LOCK 0xd</div><div class='add'>+/* enum: If set, PCS is indicating high bit error rate condition. */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_PCS_HI_BER 0xe</div><div class='add'>+/* enum: If set, FEC is indicating loss of FEC lock */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_FEC_NO_LOCK 0xf</div><div class='add'>+/* enum: If set, indicates that the number of symbol errors in a 8192-codeword</div><div class='add'>+ * window has exceeded the threshold K (417).</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_FEC_HI_SER 0x10</div><div class='add'>+/* enum: If set, the receiver has detected the local FEC has degraded. */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_FEC_LOCAL_DEGRADED 0x11</div><div class='add'>+/* enum: If set, the receiver has detected the remote FEC has degraded. */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_FEC_RM_DEGRADED 0x12</div><div class='add'>+/* enum: If set, the number of symbol errors is over an internal threshold. */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_FEC_DEGRADED_SER 0x13</div><div class='add'>+/* enum: If set, autonegotiation has detected an auto-negotiation capable link</div><div class='add'>+ * partner</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_AN_ABLE 0x14</div><div class='add'>+/* enum: If set, autonegotiation base page exchange has failed */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_AN_BP_FAILED 0x15</div><div class='add'>+/* enum: If set, autonegotiation next page exchange has failed */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_AN_NP_FAILED 0x16</div><div class='add'>+/* enum: If set, autonegotiation has failed to negotiate a common set of</div><div class='add'>+ * capabilities</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_AN_NO_HCD 0x17</div><div class='add'>+/* enum: If set, local end link training has failed to establish link training</div><div class='add'>+ * frame lock on one or more lanes</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_LT_NO_LOCAL_FRAME_LOCK 0x18</div><div class='add'>+/* enum: If set, remote end link training has failed to establish link training</div><div class='add'>+ * frame lock on one or more lanes</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_LT_NO_RM_FRAME_LOCK 0x19</div><div class='add'>+/* enum: If set, remote end has failed to assert Receiver Ready (link training</div><div class='add'>+ * success) within the designated timeout</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_STATUS_FLAGS_LT_NO_RX_READY 0x1a</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_LBN 0</div><div class='add'>+#define       MC_CMD_LINK_STATUS_FLAGS_STATUS_FLAGS_WIDTH 64</div><div class='add'>+</div><div class='add'>+/* MC_CMD_PAUSE_MODE structuredef */</div><div class='add'>+#define    MC_CMD_PAUSE_MODE_LEN 1</div><div class='add'>+#define       MC_CMD_PAUSE_MODE_TYPE_OFST 0</div><div class='add'>+#define       MC_CMD_PAUSE_MODE_TYPE_LEN 1</div><div class='add'>+/* enum: See IEEE 802.3 Clause 73.6.6 */</div><div class='add'>+#define          MC_CMD_PAUSE_MODE_AN_PAUSE 0x0</div><div class='add'>+/* enum: See IEEE 802.3 Clause 73.6.6 */</div><div class='add'>+#define          MC_CMD_PAUSE_MODE_AN_ASYM_DIR 0x1</div><div class='add'>+#define       MC_CMD_PAUSE_MODE_TYPE_LBN 0</div><div class='add'>+#define       MC_CMD_PAUSE_MODE_TYPE_WIDTH 8</div><div class='add'>+</div><div class='add'>+/* MC_CMD_ETH_AN_FIELDS structuredef: Fields used for IEEE 802.3 Clause 73</div><div class='add'>+ * Auto-Negotiation. Warning - This is fixed size and cannot be extended. This</div><div class='add'>+ * structure is used to define autonegotiable abilities (advertised, link</div><div class='add'>+ * partner and supported abilities).</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_ETH_AN_FIELDS_LEN 25</div><div class='add'>+/* Mask of Ethernet technologies. The bit indices in this mask are taken from</div><div class='add'>+ * the TECH field in the MC_CMD_ETH_TECH structure.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_TECH_MASK_OFST 0</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_TECH_MASK_LEN 16</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_ETH_TECH/TECH */</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_TECH_MASK_LBN 0</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_TECH_MASK_WIDTH 128</div><div class='add'>+/* Mask of supported FEC modes */</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_FEC_MASK_OFST 16</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_FEC_MASK_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               FEC_TYPE/TYPE */</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_FEC_MASK_LBN 128</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_FEC_MASK_WIDTH 32</div><div class='add'>+/* Mask of requested FEC modes */</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_FEC_REQ_OFST 20</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_FEC_REQ_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               FEC_TYPE/TYPE */</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_FEC_REQ_LBN 160</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_FEC_REQ_WIDTH 32</div><div class='add'>+/* Bitmask of negotiated pause modes */</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_OFST 24</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_LEN 1</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_PAUSE_MODE/TYPE */</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_LBN 192</div><div class='add'>+#define       MC_CMD_ETH_AN_FIELDS_PAUSE_MASK_WIDTH 8</div><div class='add'>+</div><div class='add'>+/* MC_CMD_LOOPBACK_V2 structuredef: Loopback modes for use with the new</div><div class='add'>+ * MC_CMD_LINK_CTRL and MC_CMD_LINK_STATE. These loopback modes are not</div><div class='add'>+ * supported in other getlink/setlink commands.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_LOOPBACK_V2_LEN 4</div><div class='add'>+#define       MC_CMD_LOOPBACK_V2_MODE_OFST 0</div><div class='add'>+#define       MC_CMD_LOOPBACK_V2_MODE_LEN 4</div><div class='add'>+/* enum: No loopback */</div><div class='add'>+#define          MC_CMD_LOOPBACK_V2_NONE 0x0</div><div class='add'>+/* enum: Let firmware choose a supported loopback mode */</div><div class='add'>+#define          MC_CMD_LOOPBACK_V2_AUTO 0x1</div><div class='add'>+/* enum: Loopback after the MAC */</div><div class='add'>+#define          MC_CMD_LOOPBACK_V2_POST_MAC 0x2</div><div class='add'>+/* enum: Loopback after the PCS */</div><div class='add'>+#define          MC_CMD_LOOPBACK_V2_POST_PCS 0x3</div><div class='add'>+/* enum: Loopback after the PMA */</div><div class='add'>+#define          MC_CMD_LOOPBACK_V2_POST_PMA 0x4</div><div class='add'>+/* enum: Loopback after the MDI Wireside */</div><div class='add'>+#define          MC_CMD_LOOPBACK_V2_POST_MDI_WS 0x5</div><div class='add'>+/* enum: Loopback after the PMA Wireside */</div><div class='add'>+#define          MC_CMD_LOOPBACK_V2_POST_PMA_WS 0x6</div><div class='add'>+/* enum: Loopback after the PCS Wireside */</div><div class='add'>+#define          MC_CMD_LOOPBACK_V2_POST_PCS_WS 0x7</div><div class='add'>+/* enum: Loopback after the MAC Wireside */</div><div class='add'>+#define          MC_CMD_LOOPBACK_V2_POST_MAC_WS 0x8</div><div class='add'>+/* enum: Loopback after the MAC FIFOs (before the MAC) */</div><div class='add'>+#define          MC_CMD_LOOPBACK_V2_PRE_MAC 0x9</div><div class='add'>+#define       MC_CMD_LOOPBACK_V2_MODE_LBN 0</div><div class='add'>+#define       MC_CMD_LOOPBACK_V2_MODE_WIDTH 32</div><div class='add'>+</div><div class='add'>+/* MC_CMD_FCNTL structuredef */</div><div class='add'>+#define    MC_CMD_FCNTL_LEN 4</div><div class='add'>+#define       MC_CMD_FCNTL_MASK_OFST 0</div><div class='add'>+#define       MC_CMD_FCNTL_MASK_LEN 4</div><div class='add'>+/* enum: Flow control is off. */</div><div class='add'>+#define          MC_CMD_FCNTL_OFF 0x0</div><div class='add'>+/* enum: Respond to flow control. */</div><div class='add'>+#define          MC_CMD_FCNTL_RESPOND 0x1</div><div class='add'>+/* enum: Respond to and Issue flow control. */</div><div class='add'>+#define          MC_CMD_FCNTL_BIDIR 0x2</div><div class='add'>+/* enum: Auto negotiate flow control. */</div><div class='add'>+#define          MC_CMD_FCNTL_AUTO 0x3</div><div class='add'>+/* enum: Priority flow control. This is only supported on KSB. */</div><div class='add'>+#define          MC_CMD_FCNTL_QBB 0x4</div><div class='add'>+/* enum: Issue flow control. */</div><div class='add'>+#define          MC_CMD_FCNTL_GENERATE 0x5</div><div class='add'>+#define       MC_CMD_FCNTL_MASK_LBN 0</div><div class='add'>+#define       MC_CMD_FCNTL_MASK_WIDTH 32</div><div class='add'>+</div><div class='add'>+/* MC_CMD_LINK_FLAGS structuredef */</div><div class='add'>+#define    MC_CMD_LINK_FLAGS_LEN 4</div><div class='add'>+/* The enums defined in this field are used as indices into the</div><div class='add'>+ * MC_CMD_LINK_FLAGS bitmask.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_FLAGS_MASK_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_FLAGS_MASK_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/* enum: Enable auto-negotiation. If AN is enabled, link technology and FEC</div><div class='add'>+ * mode are determined by advertised capabilities and requested FEC modes,</div><div class='add'>+ * combined with link partner capabilities. If AN is disabled, link technology</div><div class='add'>+ * is forced to LINK_TECHNOLOGY and FEC mode is forced to FEC_MODE. Not valid</div><div class='add'>+ * if loopback is enabled</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_FLAGS_AUTONEG_EN 0x0</div><div class='add'>+/* enum: Enable parallel detect. In addition to AN, try to sense partner forced</div><div class='add'>+ * speed/FEC mode (when partner AN disabled). Only valid if AN is enabled.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_LINK_FLAGS_PARALLEL_DETECT_EN 0x1</div><div class='add'>+/* enum: Force link down, in electrical idle. */</div><div class='add'>+#define          MC_CMD_LINK_FLAGS_LINK_DISABLE 0x2</div><div class='add'>+/* enum: Ignore the sequence number and always apply. */</div><div class='add'>+#define          MC_CMD_LINK_FLAGS_IGNORE_MODULE_SEQ 0x3</div><div class='add'>+#define       MC_CMD_LINK_FLAGS_MASK_LBN 0</div><div class='add'>+#define       MC_CMD_LINK_FLAGS_MASK_WIDTH 32</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_LINK_CTRL</div><div class='add'>+ * Write the unified MAC/PHY link configuration. Locks required: None. Return</div><div class='add'>+ * code: 0, EINVAL, ETIME, EAGAIN</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_LINK_CTRL 0x6b</div><div class='add'>+#undef MC_CMD_0x6b_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x6b_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_LINK_CTRL_IN msgrequest */</div><div class='add'>+#define    MC_CMD_LINK_CTRL_IN_LEN 40</div><div class='add'>+/* Handle to the port to set link state for. */</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_PORT_HANDLE_LEN 4</div><div class='add'>+/* Control flags */</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_CONTROL_FLAGS_OFST 4</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_CONTROL_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LINK_FLAGS/MASK */</div><div class='add'>+/* Reserved for future expansion, and included to provide padding for alignment</div><div class='add'>+ * purposes.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_RESERVED_OFST 8</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_RESERVED_LEN 8</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_RESERVED_LO_OFST 8</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_RESERVED_LO_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_RESERVED_LO_LBN 64</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_RESERVED_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_RESERVED_HI_OFST 12</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_RESERVED_HI_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_RESERVED_HI_LBN 96</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_RESERVED_HI_WIDTH 32</div><div class='add'>+/* Technology abilities to advertise during auto-negotiation */</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_ADVERTISED_TECH_ABILITIES_MASK_OFST 16</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_ADVERTISED_TECH_ABILITIES_MASK_LEN 16</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_ETH_TECH/TECH */</div><div class='add'>+/* Pause abilities to advertise during auto-negotiation. Valid when auto-</div><div class='add'>+ * negotation is enabled and MC_CMD_SET_MAC_IN/FCTL is set to</div><div class='add'>+ * MC_CMD_FCNTL_AUTO. If auto-negotiation is disabled the driver must</div><div class='add'>+ * explicitly configure pause mode with MC_CMD_SET_MAC.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_ADVERTISED_PAUSE_ABILITIES_MASK_OFST 32</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_ADVERTISED_PAUSE_ABILITIES_MASK_LEN 1</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_PAUSE_MODE/TYPE */</div><div class='add'>+/* When auto-negotiation is enabled, this is the FEC mode to request. Note that</div><div class='add'>+ * a weaker FEC mode may get negotiated, depending on what the link partner</div><div class='add'>+ * supports. The driver should subsequently use MC_CMD_GET_LINK to check the</div><div class='add'>+ * actual negotiated FEC mode. When auto-negotiation is disabled, this is the</div><div class='add'>+ * forced FEC mode.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_FEC_MODE_OFST 33</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_FEC_MODE_LEN 1</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               FEC_TYPE/TYPE */</div><div class='add'>+/* This is only to be used when auto-negotiation is disabled (forced speed or</div><div class='add'>+ * loopback mode). If the specified value does not align with the values</div><div class='add'>+ * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_LINK_TECHNOLOGY_OFST 36</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_LINK_TECHNOLOGY_LEN 2</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_ETH_TECH/TECH */</div><div class='add'>+/* The sequence number of the last MODULECHANGE event. If this doesn't match,</div><div class='add'>+ * fail with EAGAIN.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_MODULE_SEQ_OFST 38</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_MODULE_SEQ_LEN 1</div><div class='add'>+/* Loopback Mode. Only valid when auto-negotiation is disabled. */</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_LOOPBACK_OFST 39</div><div class='add'>+#define       MC_CMD_LINK_CTRL_IN_LOOPBACK_LEN 1</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LOOPBACK_V2/MODE */</div><div class='add'>+</div><div class='add'>+/* MC_CMD_LINK_CTRL_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_LINK_CTRL_OUT_LEN 0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_LINK_STATE</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_LINK_STATE 0x6c</div><div class='add'>+#undef MC_CMD_0x6c_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x6c_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_LINK_STATE_IN msgrequest */</div><div class='add'>+#define    MC_CMD_LINK_STATE_IN_LEN 4</div><div class='add'>+/* Handle to the port to get link state for. */</div><div class='add'>+#define       MC_CMD_LINK_STATE_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_STATE_IN_PORT_HANDLE_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_LINK_STATE_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_LINK_STATE_OUT_LEN 114</div><div class='add'>+/* Flags used to report the current configuration/state of the link. */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LEN 8</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_LBN 0</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_OFST 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_LBN 32</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_STATUS_FLAGS_HI_WIDTH 32</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LINK_STATUS_FLAGS/STATUS_FLAGS */</div><div class='add'>+/* Configured technology. If the specified value does not align with the values</div><div class='add'>+ * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_TECHNOLOGY_OFST 8</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_TECHNOLOGY_LEN 2</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_ETH_TECH/TECH */</div><div class='add'>+/* Configured FEC mode */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_FEC_MODE_OFST 10</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_FEC_MODE_LEN 1</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               FEC_TYPE/TYPE */</div><div class='add'>+/* Bitmask of auto-negotiated pause modes */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_PAUSE_MASK_OFST 11</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_PAUSE_MASK_LEN 1</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_PAUSE_MODE/TYPE */</div><div class='add'>+/* Configured loopback mode */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LOOPBACK_OFST 12</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LOOPBACK_LEN 1</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LOOPBACK_V2/MODE */</div><div class='add'>+/* Abilities requested by the driver to advertise during auto-negotiation */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_OFST 16</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_LEN 32</div><div class='add'>+/* See structuredef: MC_CMD_ETH_AN_FIELDS */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_TECH_MASK_OFST 16</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_TECH_MASK_LEN 16</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_MASK_OFST 32</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_MASK_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_REQ_OFST 36</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_FEC_REQ_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_PAUSE_MASK_OFST 40</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_ADVERTISED_ABILITIES_PAUSE_MASK_LEN 1</div><div class='add'>+/* Abilities advertised by the link partner during auto-negotiation */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_OFST 48</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_LEN 32</div><div class='add'>+/* See structuredef: MC_CMD_ETH_AN_FIELDS */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_TECH_MASK_OFST 48</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_TECH_MASK_LEN 16</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_MASK_OFST 64</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_MASK_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_REQ_OFST 68</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_FEC_REQ_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_PAUSE_MASK_OFST 72</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_LINK_PARTNER_ABILITIES_PAUSE_MASK_LEN 1</div><div class='add'>+/* Abilities supported by the local device (including cable abilities) For</div><div class='add'>+ * fixed local device capbilities see MC_CMD_GET_LOCAL_DEVICE_INFO</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_OFST 80</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_LEN 28</div><div class='add'>+/* See structuredef: MC_CMD_ETH_AN_FIELDS */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_TECH_MASK_OFST 80</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_TECH_MASK_LEN 16</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_MASK_OFST 96</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_MASK_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_REQ_OFST 100</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_FEC_REQ_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_PAUSE_MASK_OFST 104</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_SUPPORTED_ABILITIES_PAUSE_MASK_LEN 1</div><div class='add'>+/* Control flags */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_CONTROL_FLAGS_OFST 108</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_CONTROL_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LINK_FLAGS/MASK */</div><div class='add'>+/* Sequence number to synchronize link change events */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_PORT_LINKCHANGE_SEQ_NUM_OFST 112</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_PORT_LINKCHANGE_SEQ_NUM_LEN 1</div><div class='add'>+/* Sequence number to synchronize module change events */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_PORT_MODULECHANGE_SEQ_NUM_OFST 113</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_PORT_MODULECHANGE_SEQ_NUM_LEN 1</div><div class='add'>+</div><div class='add'>+/* MC_CMD_LINK_STATE_OUT_V2 msgresponse: Updated LINK_STATE_OUT with</div><div class='add'>+ * LOCAL_AN_SUPPORT</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_LINK_STATE_OUT_V2_LEN 120</div><div class='add'>+/* Flags used to report the current configuration/state of the link. */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LEN 8</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_LBN 0</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_OFST 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_LBN 32</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_STATUS_FLAGS_HI_WIDTH 32</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LINK_STATUS_FLAGS/STATUS_FLAGS */</div><div class='add'>+/* Configured technology. If the specified value does not align with the values</div><div class='add'>+ * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_LINK_TECHNOLOGY_OFST 8</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_LINK_TECHNOLOGY_LEN 2</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_ETH_TECH/TECH */</div><div class='add'>+/* Configured FEC mode */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_FEC_MODE_OFST 10</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_FEC_MODE_LEN 1</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               FEC_TYPE/TYPE */</div><div class='add'>+/* Bitmask of auto-negotiated pause modes */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_PAUSE_MASK_OFST 11</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_PAUSE_MASK_LEN 1</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_PAUSE_MODE/TYPE */</div><div class='add'>+/* Configured loopback mode */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_LOOPBACK_OFST 12</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_LOOPBACK_LEN 1</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LOOPBACK_V2/MODE */</div><div class='add'>+/* Abilities requested by the driver to advertise during auto-negotiation */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_ADVERTISED_ABILITIES_OFST 16</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_ADVERTISED_ABILITIES_LEN 32</div><div class='add'>+/* Abilities advertised by the link partner during auto-negotiation */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_LINK_PARTNER_ABILITIES_OFST 48</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_LINK_PARTNER_ABILITIES_LEN 32</div><div class='add'>+/* Abilities supported by the local device (including cable abilities) For</div><div class='add'>+ * fixed local device capbilities see MC_CMD_GET_LOCAL_DEVICE_INFO</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_SUPPORTED_ABILITIES_OFST 80</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_SUPPORTED_ABILITIES_LEN 28</div><div class='add'>+/* Control flags */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_CONTROL_FLAGS_OFST 108</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_CONTROL_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LINK_FLAGS/MASK */</div><div class='add'>+/* Sequence number to synchronize link change events */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_PORT_LINKCHANGE_SEQ_NUM_OFST 112</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_PORT_LINKCHANGE_SEQ_NUM_LEN 1</div><div class='add'>+/* Sequence number to synchronize module change events */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_PORT_MODULECHANGE_SEQ_NUM_OFST 113</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_PORT_MODULECHANGE_SEQ_NUM_LEN 1</div><div class='add'>+/* Reports the auto-negotiation supported by the local device. This depends on</div><div class='add'>+ * the port and module properties.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_LOCAL_AN_SUPPORT_OFST 116</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V2_LOCAL_AN_SUPPORT_LEN 4</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               AN_TYPE/TYPE */</div><div class='add'>+</div><div class='add'>+/* MC_CMD_LINK_STATE_OUT_V3 msgresponse: Updated LINK_STATE_OUT_V2 for explicit</div><div class='add'>+ * reporting of the link speed and duplex mode.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_LINK_STATE_OUT_V3_LEN 128</div><div class='add'>+/* Flags used to report the current configuration/state of the link. */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LEN 8</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_OFST 0</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_LBN 0</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_OFST 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_LBN 32</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_STATUS_FLAGS_HI_WIDTH 32</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LINK_STATUS_FLAGS/STATUS_FLAGS */</div><div class='add'>+/* Configured technology. If the specified value does not align with the values</div><div class='add'>+ * defined in the enum MC_CMD_ETH_TECH/TECH, it is considered invalid.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_LINK_TECHNOLOGY_OFST 8</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_LINK_TECHNOLOGY_LEN 2</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_ETH_TECH/TECH */</div><div class='add'>+/* Configured FEC mode */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_FEC_MODE_OFST 10</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_FEC_MODE_LEN 1</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               FEC_TYPE/TYPE */</div><div class='add'>+/* Bitmask of auto-negotiated pause modes */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_PAUSE_MASK_OFST 11</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_PAUSE_MASK_LEN 1</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_PAUSE_MODE/TYPE */</div><div class='add'>+/* Configured loopback mode */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_LOOPBACK_OFST 12</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_LOOPBACK_LEN 1</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LOOPBACK_V2/MODE */</div><div class='add'>+/* Abilities requested by the driver to advertise during auto-negotiation */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_ADVERTISED_ABILITIES_OFST 16</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_ADVERTISED_ABILITIES_LEN 32</div><div class='add'>+/* Abilities advertised by the link partner during auto-negotiation */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_LINK_PARTNER_ABILITIES_OFST 48</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_LINK_PARTNER_ABILITIES_LEN 32</div><div class='add'>+/* Abilities supported by the local device (including cable abilities) For</div><div class='add'>+ * fixed local device capbilities see MC_CMD_GET_LOCAL_DEVICE_INFO</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_SUPPORTED_ABILITIES_OFST 80</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_SUPPORTED_ABILITIES_LEN 28</div><div class='add'>+/* Control flags */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_CONTROL_FLAGS_OFST 108</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_CONTROL_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LINK_FLAGS/MASK */</div><div class='add'>+/* Sequence number to synchronize link change events */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_PORT_LINKCHANGE_SEQ_NUM_OFST 112</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_PORT_LINKCHANGE_SEQ_NUM_LEN 1</div><div class='add'>+/* Sequence number to synchronize module change events */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_PORT_MODULECHANGE_SEQ_NUM_OFST 113</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_PORT_MODULECHANGE_SEQ_NUM_LEN 1</div><div class='add'>+/* Reports the auto-negotiation supported by the local device. This depends on</div><div class='add'>+ * the port and module properties.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_LOCAL_AN_SUPPORT_OFST 116</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_LOCAL_AN_SUPPORT_LEN 4</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               AN_TYPE/TYPE */</div><div class='add'>+/* Autonegotiated speed in mbit/s. The link may still be down even if this</div><div class='add'>+ * reads non-zero. LINK_SPEED field is intended to be used by drivers without</div><div class='add'>+ * the most up-to-date MCDI definitions, unable to deduce the link speed from</div><div class='add'>+ * the reported LINK_TECHNOLOGY field.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_LINK_SPEED_OFST 120</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_LINK_SPEED_LEN 4</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_FLAGS_OFST 124</div><div class='add'>+#define       MC_CMD_LINK_STATE_OUT_V3_FLAGS_LEN 4</div><div class='add'>+#define        MC_CMD_LINK_STATE_OUT_V3_FULL_DUPLEX_OFST 124</div><div class='add'>+#define        MC_CMD_LINK_STATE_OUT_V3_FULL_DUPLEX_LBN 0</div><div class='add'>+#define        MC_CMD_LINK_STATE_OUT_V3_FULL_DUPLEX_WIDTH 1</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_GET_LINK</div><div class='hunk'>@@ -5694,6 +6064,54 @@</div><div class='ctx'> /* MC_CMD_GET_LINK_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_GET_LINK_IN_LEN 0</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_GET_LINK_IN_V2 msgrequest */</div><div class='add'>+#define    MC_CMD_GET_LINK_IN_V2_LEN 8</div><div class='add'>+/* Target port to request link state for. Uses MAE_LINK_ENDPOINT_SELECTOR which</div><div class='add'>+ * identifies a real or virtual network port by MAE port and link end. See the</div><div class='add'>+ * structure definition for more details.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_LO_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_LO_LBN 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_HI_OFST 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_HI_LBN 32</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_HI_WIDTH 32</div><div class='add'>+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_LINK_END_OFST 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_LINK_END_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LEN 8</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_OFST 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_LBN 0</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_OFST 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_LBN 32</div><div class='add'>+#define       MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_WIDTH 32</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_GET_LINK_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_GET_LINK_OUT_LEN 28</div><div class='ctx'> /* Near-side advertised capabilities. Refer to</div><div class='hunk'>@@ -5745,6 +6163,7 @@</div><div class='ctx'> /* This returns the negotiated flow control value. */</div><div class='ctx'> #define       MC_CMD_GET_LINK_OUT_FCNTL_OFST 20</div><div class='ctx'> #define       MC_CMD_GET_LINK_OUT_FCNTL_LEN 4</div><div class='add'>+/* enum property: value */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */</div><div class='ctx'> #define       MC_CMD_GET_LINK_OUT_MAC_FAULT_OFST 24</div><div class='hunk'>@@ -5813,6 +6232,7 @@</div><div class='ctx'> /* This returns the negotiated flow control value. */</div><div class='ctx'> #define       MC_CMD_GET_LINK_OUT_V2_FCNTL_OFST 20</div><div class='ctx'> #define       MC_CMD_GET_LINK_OUT_V2_FCNTL_LEN 4</div><div class='add'>+/* enum property: value */</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               MC_CMD_SET_MAC/MC_CMD_SET_MAC_IN/FCNTL */</div><div class='ctx'> #define       MC_CMD_GET_LINK_OUT_V2_MAC_FAULT_OFST 24</div><div class='hunk'>@@ -5969,6 +6389,95 @@</div><div class='ctx'> #define        MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_LBN 7</div><div class='ctx'> #define        MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_WIDTH 1</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_SET_LINK_IN_V3 msgrequest */</div><div class='add'>+#define    MC_CMD_SET_LINK_IN_V3_LEN 28</div><div class='add'>+/* Near-side advertised capabilities. Refer to</div><div class='add'>+ * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_CAP_OFST 0</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_CAP_LEN 4</div><div class='add'>+/* Flags */</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_FLAGS_OFST 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_FLAGS_LEN 4</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_LOWPOWER_OFST 4</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_LOWPOWER_LBN 0</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_LOWPOWER_WIDTH 1</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_POWEROFF_OFST 4</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_POWEROFF_LBN 1</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_POWEROFF_WIDTH 1</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_TXDIS_OFST 4</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_TXDIS_LBN 2</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_TXDIS_WIDTH 1</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_LINKDOWN_OFST 4</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_LINKDOWN_LBN 3</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_LINKDOWN_WIDTH 1</div><div class='add'>+/* Loopback mode. */</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_LOOPBACK_MODE_OFST 8</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_LOOPBACK_MODE_LEN 4</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */</div><div class='add'>+/* A loopback speed of "0" is supported, and means (choose any available</div><div class='add'>+ * speed).</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_LOOPBACK_SPEED_OFST 12</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_LOOPBACK_SPEED_LEN 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_OFST 16</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_LEN 1</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_OFST 16</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_LBN 0</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_WIDTH 7</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_OFST 16</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_LBN 7</div><div class='add'>+#define        MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_WIDTH 1</div><div class='add'>+/* Padding */</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_RESERVED_OFST 17</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_RESERVED_LEN 3</div><div class='add'>+/* Target port to set link state for. Uses MAE_LINK_ENDPOINT_SELECTOR which</div><div class='add'>+ * identifies a real or virtual network port by MAE port and link end. See the</div><div class='add'>+ * structure definition for more details</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_OFST 20</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_LEN 8</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_LO_OFST 20</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_LO_LEN 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_LO_LBN 160</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_HI_OFST 24</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_HI_LEN 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_HI_LBN 192</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_HI_WIDTH 32</div><div class='add'>+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_OFST 20</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_LEN 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FLAT_OFST 20</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FLAT_LEN 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_TYPE_OFST 23</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_TYPE_LEN 1</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 20</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 160</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 180</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 176</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 22</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 20</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_LINK_END_OFST 24</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_LINK_END_LEN 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_OFST 20</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LEN 8</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_OFST 20</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_LEN 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_LBN 160</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_OFST 24</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_LEN 4</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_LBN 192</div><div class='add'>+#define       MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_WIDTH 32</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_SET_LINK_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_SET_LINK_OUT_LEN 0</div><div class='ctx'> </div><div class='hunk'>@@ -6034,17 +6543,17 @@</div><div class='ctx'> #define       MC_CMD_SET_MAC_IN_FCNTL_OFST 20</div><div class='ctx'> #define       MC_CMD_SET_MAC_IN_FCNTL_LEN 4</div><div class='ctx'> /* enum: Flow control is off. */</div><div class='del'>-#define          MC_CMD_FCNTL_OFF 0x0</div><div class='add'>+/*               MC_CMD_FCNTL_OFF 0x0 */</div><div class='ctx'> /* enum: Respond to flow control. */</div><div class='del'>-#define          MC_CMD_FCNTL_RESPOND 0x1</div><div class='add'>+/*               MC_CMD_FCNTL_RESPOND 0x1 */</div><div class='ctx'> /* enum: Respond to and Issue flow control. */</div><div class='del'>-#define          MC_CMD_FCNTL_BIDIR 0x2</div><div class='del'>-/* enum: Auto neg flow control. */</div><div class='del'>-#define          MC_CMD_FCNTL_AUTO 0x3</div><div class='del'>-/* enum: Priority flow control (eftest builds only). */</div><div class='del'>-#define          MC_CMD_FCNTL_QBB 0x4</div><div class='add'>+/*               MC_CMD_FCNTL_BIDIR 0x2 */</div><div class='add'>+/* enum: Auto negotiate flow control. */</div><div class='add'>+/*               MC_CMD_FCNTL_AUTO 0x3 */</div><div class='add'>+/* enum: Priority flow control. This is only supported on KSB. */</div><div class='add'>+/*               MC_CMD_FCNTL_QBB 0x4 */</div><div class='ctx'> /* enum: Issue flow control. */</div><div class='del'>-#define          MC_CMD_FCNTL_GENERATE 0x5</div><div class='add'>+/*               MC_CMD_FCNTL_GENERATE 0x5 */</div><div class='ctx'> #define       MC_CMD_SET_MAC_IN_FLAGS_OFST 24</div><div class='ctx'> #define       MC_CMD_SET_MAC_IN_FLAGS_LEN 4</div><div class='ctx'> #define        MC_CMD_SET_MAC_IN_FLAG_INCLUDE_FCS_OFST 24</div><div class='hunk'>@@ -6086,9 +6595,9 @@</div><div class='ctx'> /*               MC_CMD_FCNTL_RESPOND 0x1 */</div><div class='ctx'> /* enum: Respond to and Issue flow control. */</div><div class='ctx'> /*               MC_CMD_FCNTL_BIDIR 0x2 */</div><div class='del'>-/* enum: Auto neg flow control. */</div><div class='add'>+/* enum: Auto negotiate flow control. */</div><div class='ctx'> /*               MC_CMD_FCNTL_AUTO 0x3 */</div><div class='del'>-/* enum: Priority flow control (eftest builds only). */</div><div class='add'>+/* enum: Priority flow control. This is only supported on KSB. */</div><div class='ctx'> /*               MC_CMD_FCNTL_QBB 0x4 */</div><div class='ctx'> /* enum: Issue flow control. */</div><div class='ctx'> /*               MC_CMD_FCNTL_GENERATE 0x5 */</div><div class='hunk'>@@ -6155,9 +6664,9 @@</div><div class='ctx'> /*               MC_CMD_FCNTL_RESPOND 0x1 */</div><div class='ctx'> /* enum: Respond to and Issue flow control. */</div><div class='ctx'> /*               MC_CMD_FCNTL_BIDIR 0x2 */</div><div class='del'>-/* enum: Auto neg flow control. */</div><div class='add'>+/* enum: Auto negotiate flow control. */</div><div class='ctx'> /*               MC_CMD_FCNTL_AUTO 0x3 */</div><div class='del'>-/* enum: Priority flow control (eftest builds only). */</div><div class='add'>+/* enum: Priority flow control. This is only supported on KSB. */</div><div class='ctx'> /*               MC_CMD_FCNTL_QBB 0x4 */</div><div class='ctx'> /* enum: Issue flow control. */</div><div class='ctx'> /*               MC_CMD_FCNTL_GENERATE 0x5 */</div><div class='hunk'>@@ -6188,19 +6697,9 @@</div><div class='ctx'> #define        MC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28</div><div class='ctx'> #define        MC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4</div><div class='ctx'> #define        MC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1</div><div class='del'>-/* Identifies the MAC to update by the specifying the end of a logical MAE</div><div class='del'>- * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the</div><div class='del'>- * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible</div><div class='del'>- * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all</div><div class='del'>- * circumstances. 1. Some will always work (e.g. a VF can always address its</div><div class='del'>- * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not</div><div class='del'>- * meaningful and will always fail with EINVAL (e.g. attempting to address the</div><div class='del'>- * VNIC end of a link to a physical port), 3. Some are meaningful but require</div><div class='del'>- * the MCDI client to have the required permission and fail with EPERM</div><div class='del'>- * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer),</div><div class='del'>- * and 4. Some could be implementation-specific and fail with ENOTSUP if not</div><div class='del'>- * available (no examples exist right now). See SF-123581-TC section 4.3 for</div><div class='del'>- * more details.</div><div class='add'>+/* Target port to set mac state for. Uses MAE_LINK_ENDPOINT_SELECTOR which</div><div class='add'>+ * identifies a real or virtual network port by MAE port and link end. See the</div><div class='add'>+ * structure definition for more details</div><div class='ctx'>  */</div><div class='ctx'> #define       MC_CMD_SET_MAC_V3_IN_TARGET_OFST 32</div><div class='ctx'> #define       MC_CMD_SET_MAC_V3_IN_TARGET_LEN 8</div><div class='hunk'>@@ -6212,6 +6711,7 @@</div><div class='ctx'> #define       MC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4</div><div class='ctx'> #define       MC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288</div><div class='ctx'> #define       MC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32</div><div class='add'>+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */</div><div class='ctx'> #define       MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32</div><div class='ctx'> #define       MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4</div><div class='ctx'> #define       MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32</div><div class='hunk'>@@ -6405,6 +6905,98 @@</div><div class='ctx'> #define       MC_CMD_MAC_STATS_IN_PORT_ID_OFST 16</div><div class='ctx'> #define       MC_CMD_MAC_STATS_IN_PORT_ID_LEN 4</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_MAC_STATS_V2_IN msgrequest */</div><div class='add'>+#define    MC_CMD_MAC_STATS_V2_IN_LEN 28</div><div class='add'>+/* ??? */</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LEN 8</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_LBN 0</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_OFST 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_LBN 32</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_CMD_OFST 8</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_CMD_LEN 4</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_DMA_OFST 8</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_DMA_LBN 0</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_DMA_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_CLEAR_OFST 8</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_CLEAR_LBN 1</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_CLEAR_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_OFST 8</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_LBN 2</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_OFST 8</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_LBN 3</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_OFST 8</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_LBN 4</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_OFST 8</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_LBN 5</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_OFST 8</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_LBN 16</div><div class='add'>+#define        MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_WIDTH 16</div><div class='add'>+/* DMA length. Should be set to MAC_STATS_NUM_STATS * sizeof(uint64_t), as</div><div class='add'>+ * returned by MC_CMD_GET_CAPABILITIES_V4_OUT. For legacy firmware not</div><div class='add'>+ * supporting MC_CMD_GET_CAPABILITIES_V4_OUT, DMA_LEN should be set to</div><div class='add'>+ * MC_CMD_MAC_NSTATS * sizeof(uint64_t)</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_LEN_OFST 12</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_DMA_LEN_LEN 4</div><div class='add'>+/* port id so vadapter stats can be provided */</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_PORT_ID_OFST 16</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_PORT_ID_LEN 4</div><div class='add'>+/* Target port to request statistics for. Uses MAE_LINK_ENDPOINT_SELECTOR which</div><div class='add'>+ * identifies a real or virtual network port by MAE port and link end. See the</div><div class='add'>+ * structure definition for more details</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_LEN 8</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_LO_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_LO_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_LO_LBN 160</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_HI_OFST 24</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_HI_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_HI_LBN 192</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_HI_WIDTH 32</div><div class='add'>+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 23</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 160</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 180</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 176</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 22</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_LINK_END_OFST 24</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_LINK_END_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LEN 8</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_LBN 160</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_OFST 24</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_LBN 192</div><div class='add'>+#define       MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_WIDTH 32</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_MAC_STATS_OUT_DMA msgresponse */</div><div class='ctx'> #define    MC_CMD_MAC_STATS_OUT_DMA_LEN 0</div><div class='ctx'> </div><div class='hunk'>@@ -6421,6 +7013,7 @@</div><div class='ctx'> #define       MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32</div><div class='ctx'> #define       MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32</div><div class='ctx'> #define       MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS</div><div class='add'>+/* enum property: index */</div><div class='ctx'> #define          MC_CMD_MAC_GENERATION_START 0x0 /* enum */</div><div class='ctx'> #define          MC_CMD_MAC_DMABUF_START 0x1 /* enum */</div><div class='ctx'> #define          MC_CMD_MAC_TX_PKTS 0x1 /* enum */</div><div class='hunk'>@@ -6583,6 +7176,7 @@</div><div class='ctx'> #define       MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32</div><div class='ctx'> #define       MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32</div><div class='ctx'> #define       MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2</div><div class='add'>+/* enum property: index */</div><div class='ctx'> /* enum: Start of FEC stats buffer space, Medford2 and up */</div><div class='ctx'> #define          MC_CMD_MAC_FEC_DMABUF_START 0x61</div><div class='ctx'> /* enum: Number of uncorrected FEC codewords on link (RS-FEC only for Medford2)</div><div class='hunk'>@@ -6622,6 +7216,7 @@</div><div class='ctx'> #define       MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32</div><div class='ctx'> #define       MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32</div><div class='ctx'> #define       MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3</div><div class='add'>+/* enum property: index */</div><div class='ctx'> /* enum: Start of CTPIO stats buffer space, Medford2 and up */</div><div class='ctx'> #define          MC_CMD_MAC_CTPIO_DMABUF_START 0x68</div><div class='ctx'> /* enum: Number of CTPIO fallbacks because a DMA packet was in progress on the</div><div class='hunk'>@@ -6702,6 +7297,7 @@</div><div class='ctx'> #define       MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32</div><div class='ctx'> #define       MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32</div><div class='ctx'> #define       MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4</div><div class='add'>+/* enum property: index */</div><div class='ctx'> /* enum: Start of V4 stats buffer space */</div><div class='ctx'> #define          MC_CMD_MAC_V4_DMABUF_START 0x79</div><div class='ctx'> /* enum: RXDP counter: Number of packets truncated because scattering was</div><div class='hunk'>@@ -6723,112 +7319,35 @@</div><div class='ctx'> /*            Other enum values, see field(s): */</div><div class='ctx'> /*               MC_CMD_MAC_STATS_V3_OUT_NO_DMA/STATISTICS */</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SRIOV</div><div class='del'>- * to be documented</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SRIOV 0x30</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SRIOV_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SRIOV_IN_LEN 12</div><div class='del'>-#define       MC_CMD_SRIOV_IN_ENABLE_OFST 0</div><div class='del'>-#define       MC_CMD_SRIOV_IN_ENABLE_LEN 4</div><div class='del'>-#define       MC_CMD_SRIOV_IN_VI_BASE_OFST 4</div><div class='del'>-#define       MC_CMD_SRIOV_IN_VI_BASE_LEN 4</div><div class='del'>-#define       MC_CMD_SRIOV_IN_VF_COUNT_OFST 8</div><div class='del'>-#define       MC_CMD_SRIOV_IN_VF_COUNT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SRIOV_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SRIOV_OUT_LEN 8</div><div class='del'>-#define       MC_CMD_SRIOV_OUT_VI_SCALE_OFST 0</div><div class='del'>-#define       MC_CMD_SRIOV_OUT_VI_SCALE_LEN 4</div><div class='del'>-#define       MC_CMD_SRIOV_OUT_VF_TOTAL_OFST 4</div><div class='del'>-#define       MC_CMD_SRIOV_OUT_VF_TOTAL_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MEMCPY_RECORD_TYPEDEF structuredef */</div><div class='del'>-#define    MC_CMD_MEMCPY_RECORD_TYPEDEF_LEN 32</div><div class='del'>-/* this is only used for the first record */</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_OFST 0</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LEN 4</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LBN 0</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_WIDTH 32</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_OFST 4</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_LEN 4</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_LBN 32</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_WIDTH 32</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_OFST 8</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LEN 8</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_OFST 8</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LEN 4</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LBN 64</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_OFST 12</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LEN 4</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LBN 96</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LBN 64</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_WIDTH 64</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_OFST 16</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_LEN 4</div><div class='del'>-#define          MC_CMD_MEMCPY_RECORD_TYPEDEF_RID_INLINE 0x100 /* enum */</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_LBN 128</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_WIDTH 32</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_OFST 20</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LEN 8</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_OFST 20</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LEN 4</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LBN 160</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_OFST 24</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LEN 4</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LBN 192</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LBN 160</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_WIDTH 64</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_OFST 28</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_LEN 4</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_LBN 224</div><div class='del'>-#define       MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_WIDTH 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_MEMCPY</div><div class='del'>- * DMA write data into (Rid,Addr), either by dma reading (Rid,Addr), or by data</div><div class='del'>- * embedded directly in the command.</div><div class='del'>- *</div><div class='del'>- * A common pattern is for a client to use generation counts to signal a dma</div><div class='del'>- * update of a datastructure. To facilitate this, this MCDI operation can</div><div class='del'>- * contain multiple requests which are executed in strict order. Requests take</div><div class='del'>- * the form of duplicating the entire MCDI request continuously (including the</div><div class='del'>- * requests record, which is ignored in all but the first structure)</div><div class='del'>- *</div><div class='del'>- * The source data can either come from a DMA from the host, or it can be</div><div class='del'>- * embedded within the request directly, thereby eliminating a DMA read. To</div><div class='del'>- * indicate this, the client sets FROM_RID=%RID_INLINE, ADDR_HI=0, and</div><div class='del'>- * ADDR_LO=offset, and inserts the data at %offset from the start of the</div><div class='del'>- * payload. It's the callers responsibility to ensure that the embedded data</div><div class='del'>- * doesn't overlap the records.</div><div class='del'>- *</div><div class='del'>- * Returns: 0, EINVAL (invalid RID)</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_MEMCPY 0x31</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MEMCPY_IN msgrequest */</div><div class='del'>-#define    MC_CMD_MEMCPY_IN_LENMIN 32</div><div class='del'>-#define    MC_CMD_MEMCPY_IN_LENMAX 224</div><div class='del'>-#define    MC_CMD_MEMCPY_IN_LENMAX_MCDI2 992</div><div class='del'>-#define    MC_CMD_MEMCPY_IN_LEN(num) (0+32*(num))</div><div class='del'>-#define    MC_CMD_MEMCPY_IN_RECORD_NUM(len) (((len)-0)/32)</div><div class='del'>-/* see MC_CMD_MEMCPY_RECORD_TYPEDEF */</div><div class='del'>-#define       MC_CMD_MEMCPY_IN_RECORD_OFST 0</div><div class='del'>-#define       MC_CMD_MEMCPY_IN_RECORD_LEN 32</div><div class='del'>-#define       MC_CMD_MEMCPY_IN_RECORD_MINNUM 1</div><div class='del'>-#define       MC_CMD_MEMCPY_IN_RECORD_MAXNUM 7</div><div class='del'>-#define       MC_CMD_MEMCPY_IN_RECORD_MAXNUM_MCDI2 31</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MEMCPY_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_MEMCPY_OUT_LEN 0</div><div class='add'>+/* MC_CMD_MAC_STATS_V5_OUT_DMA msgresponse */</div><div class='add'>+#define    MC_CMD_MAC_STATS_V5_OUT_DMA_LEN 0</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_STATS_V5_OUT_NO_DMA msgresponse */</div><div class='add'>+#define    MC_CMD_MAC_STATS_V5_OUT_NO_DMA_LEN (((MC_CMD_MAC_NSTATS_V5*64))&gt;&gt;3)</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LEN 8</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_LBN 0</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_OFST 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_LBN 32</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_HI_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_STATS_V5_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V5</div><div class='add'>+/* enum property: index */</div><div class='add'>+/* enum: Start of V5 stats buffer space */</div><div class='add'>+#define          MC_CMD_MAC_V5_DMABUF_START 0x7c</div><div class='add'>+/* enum: Link toggle counter: Number of times the link has toggled between</div><div class='add'>+ * up/down and down/up</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_MAC_LINK_TOGGLES 0x7c</div><div class='add'>+/* enum: This includes the space at offset 125 which is the final</div><div class='add'>+ * GENERATION_END in a MAC_STATS_V5 response and otherwise unused.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_MAC_NSTATS_V5 0x7e</div><div class='add'>+/*            Other enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_MAC_STATS_V4_OUT_NO_DMA/STATISTICS */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='hunk'>@@ -6984,6 +7503,7 @@</div><div class='ctx'> #define    MC_CMD_WOL_FILTER_RESET_IN_LEN 4</div><div class='ctx'> #define       MC_CMD_WOL_FILTER_RESET_IN_MASK_OFST 0</div><div class='ctx'> #define       MC_CMD_WOL_FILTER_RESET_IN_MASK_LEN 4</div><div class='add'>+/* enum property: bitmask */</div><div class='ctx'> #define          MC_CMD_WOL_FILTER_RESET_IN_WAKE_FILTERS 0x1 /* enum */</div><div class='ctx'> #define          MC_CMD_WOL_FILTER_RESET_IN_LIGHTSOUT_OFFLOADS 0x2 /* enum */</div><div class='ctx'> </div><div class='hunk'>@@ -6992,23 +7512,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_SET_MCAST_HASH</div><div class='del'>- * Set the MCAST hash value without otherwise reconfiguring the MAC</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_MCAST_HASH 0x35</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_MCAST_HASH_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_MCAST_HASH_IN_LEN 32</div><div class='del'>-#define       MC_CMD_SET_MCAST_HASH_IN_HASH0_OFST 0</div><div class='del'>-#define       MC_CMD_SET_MCAST_HASH_IN_HASH0_LEN 16</div><div class='del'>-#define       MC_CMD_SET_MCAST_HASH_IN_HASH1_OFST 16</div><div class='del'>-#define       MC_CMD_SET_MCAST_HASH_IN_HASH1_LEN 16</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_MCAST_HASH_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_MCAST_HASH_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_NVRAM_TYPES</div><div class='ctx'>  * Return bitfield indicating available types of virtual NVRAM partitions.</div><div class='ctx'>  * Locks required: none. Returns: 0</div><div class='hunk'>@@ -7026,6 +7529,7 @@</div><div class='ctx'> /* Bit mask of supported types. */</div><div class='ctx'> #define       MC_CMD_NVRAM_TYPES_OUT_TYPES_OFST 0</div><div class='ctx'> #define       MC_CMD_NVRAM_TYPES_OUT_TYPES_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='ctx'> /* enum: Disabled callisto. */</div><div class='ctx'> #define          MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO 0x0</div><div class='ctx'> /* enum: MC firmware. */</div><div class='hunk'>@@ -7152,6 +7656,12 @@</div><div class='ctx'> #define        MC_CMD_NVRAM_INFO_V2_OUT_A_B_OFST 12</div><div class='ctx'> #define        MC_CMD_NVRAM_INFO_V2_OUT_A_B_LBN 7</div><div class='ctx'> #define        MC_CMD_NVRAM_INFO_V2_OUT_A_B_WIDTH 1</div><div class='add'>+#define        MC_CMD_NVRAM_INFO_V2_OUT_WRITE_ONLY_OFST 12</div><div class='add'>+#define        MC_CMD_NVRAM_INFO_V2_OUT_WRITE_ONLY_LBN 8</div><div class='add'>+#define        MC_CMD_NVRAM_INFO_V2_OUT_WRITE_ONLY_WIDTH 1</div><div class='add'>+#define        MC_CMD_NVRAM_INFO_V2_OUT_SEQUENTIAL_WRITE_OFST 12</div><div class='add'>+#define        MC_CMD_NVRAM_INFO_V2_OUT_SEQUENTIAL_WRITE_LBN 9</div><div class='add'>+#define        MC_CMD_NVRAM_INFO_V2_OUT_SEQUENTIAL_WRITE_WIDTH 1</div><div class='ctx'> #define       MC_CMD_NVRAM_INFO_V2_OUT_PHYSDEV_OFST 16</div><div class='ctx'> #define       MC_CMD_NVRAM_INFO_V2_OUT_PHYSDEV_LEN 4</div><div class='ctx'> #define       MC_CMD_NVRAM_INFO_V2_OUT_PHYSADDR_OFST 20</div><div class='hunk'>@@ -7499,6 +8009,128 @@</div><div class='ctx'> #define          MC_CMD_NVRAM_VERIFY_RC_BUNDLE_COMPONENT_COPY_FAILED 0x19</div><div class='ctx'> /* enum: The update operation is in-progress. */</div><div class='ctx'> #define          MC_CMD_NVRAM_VERIFY_RC_PENDING 0x1a</div><div class='add'>+/* enum: The update was an invalid user configuration file. */</div><div class='add'>+#define          MC_CMD_NVRAM_VERIFY_RC_BAD_CONFIG 0x1b</div><div class='add'>+/* enum: The write was to the AUTO partition but the data was not recognised as</div><div class='add'>+ * a valid partition.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_NVRAM_VERIFY_RC_UNKNOWN_TYPE 0x1c</div><div class='add'>+</div><div class='add'>+/* MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_LEN 88</div><div class='add'>+/* Result of nvram update completion processing. Result codes that indicate an</div><div class='add'>+ * internal build failure and therefore not expected to be seen by customers in</div><div class='add'>+ * the field are marked with a prefix 'Internal-error'.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_RESULT_CODE_OFST 0</div><div class='add'>+#define       MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_RESULT_CODE_LEN 4</div><div class='add'>+/* enum: Invalid return code; only non-zero values are defined. Defined as</div><div class='add'>+ * unknown for backwards compatibility with NVRAM_UPDATE_FINISH_OUT.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_UNKNOWN 0x0 */</div><div class='add'>+/* enum: Verify succeeded without any errors. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_SUCCESS 0x1 */</div><div class='add'>+/* enum: CMS format verification failed due to an internal error. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED 0x2 */</div><div class='add'>+/* enum: Invalid CMS format in image metadata. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_INVALID_CMS_FORMAT 0x3 */</div><div class='add'>+/* enum: Message digest verification failed due to an internal error. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED 0x4 */</div><div class='add'>+/* enum: Error in message digest calculated over the reflash-header, payload</div><div class='add'>+ * and reflash-trailer.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BAD_MESSAGE_DIGEST 0x5 */</div><div class='add'>+/* enum: Signature verification failed due to an internal error. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED 0x6 */</div><div class='add'>+/* enum: There are no valid signatures in the image. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES 0x7 */</div><div class='add'>+/* enum: Trusted approvers verification failed due to an internal error. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_TRUSTED_APPROVERS_CHECK_FAILED 0x8 */</div><div class='add'>+/* enum: The Trusted approver's list is empty. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS 0x9 */</div><div class='add'>+/* enum: Signature chain verification failed due to an internal error. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHAIN_CHECK_FAILED 0xa */</div><div class='add'>+/* enum: The signers of the signatures in the image are not listed in the</div><div class='add'>+ * Trusted approver's list.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH 0xb */</div><div class='add'>+/* enum: The image contains a test-signed certificate, but the adapter accepts</div><div class='add'>+ * only production signed images.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_REJECT_TEST_SIGNED 0xc */</div><div class='add'>+/* enum: The image has a lower security level than the current firmware. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_SECURITY_LEVEL_DOWNGRADE 0xd */</div><div class='add'>+/* enum: Internal-error. The signed image is missing the 'contents' section,</div><div class='add'>+ * where the 'contents' section holds the actual image payload to be applied.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_CONTENT_NOT_FOUND 0xe */</div><div class='add'>+/* enum: Internal-error. The bundle header is invalid. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_CONTENT_HEADER_INVALID 0xf */</div><div class='add'>+/* enum: Internal-error. The bundle does not have a valid reflash image layout.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_REFLASH_IMAGE_INVALID 0x10 */</div><div class='add'>+/* enum: Internal-error. The bundle has an inconsistent layout of components or</div><div class='add'>+ * incorrect checksum.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_IMAGE_LAYOUT_INVALID 0x11 */</div><div class='add'>+/* enum: Internal-error. The bundle manifest is inconsistent with components in</div><div class='add'>+ * the bundle.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_INVALID 0x12 */</div><div class='add'>+/* enum: Internal-error. The number of components in a bundle do not match the</div><div class='add'>+ * number of components advertised by the bundle manifest.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_NUM_COMPONENTS_MISMATCH 0x13 */</div><div class='add'>+/* enum: Internal-error. The bundle contains too many components for the MC</div><div class='add'>+ * firmware to process</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_TOO_MANY_COMPONENTS 0x14 */</div><div class='add'>+/* enum: Internal-error. The bundle manifest has an invalid/inconsistent</div><div class='add'>+ * component.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_COMPONENT_INVALID 0x15 */</div><div class='add'>+/* enum: Internal-error. The hash of a component does not match the hash stored</div><div class='add'>+ * in the bundle manifest.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_COMPONENT_HASH_MISMATCH 0x16 */</div><div class='add'>+/* enum: Internal-error. Component hash calculation failed. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_MANIFEST_COMPONENT_HASH_FAILED 0x17 */</div><div class='add'>+/* enum: Internal-error. The component does not have a valid reflash image</div><div class='add'>+ * layout.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_COMPONENT_REFLASH_IMAGE_INVALID 0x18 */</div><div class='add'>+/* enum: The bundle processing code failed to copy a component to its target</div><div class='add'>+ * partition.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BUNDLE_COMPONENT_COPY_FAILED 0x19 */</div><div class='add'>+/* enum: The update operation is in-progress. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_PENDING 0x1a */</div><div class='add'>+/* enum: The update was an invalid user configuration file. */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_BAD_CONFIG 0x1b */</div><div class='add'>+/* enum: The write was to the AUTO partition but the data was not recognised as</div><div class='add'>+ * a valid partition.</div><div class='add'>+ */</div><div class='add'>+/*               MC_CMD_NVRAM_VERIFY_RC_UNKNOWN_TYPE 0x1c */</div><div class='add'>+/* If the update was a user configuration, what action(s) the user must take to</div><div class='add'>+ * apply the new configuration.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_ACTIONS_REQUIRED_OFST 4</div><div class='add'>+#define       MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_ACTIONS_REQUIRED_LEN 4</div><div class='add'>+/* enum: No action required. */</div><div class='add'>+#define          MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_NONE 0x0</div><div class='add'>+/* enum: The MC firmware must be rebooted (eg with MC_CMD_REBOOT). */</div><div class='add'>+#define          MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_FIRMWARE_REBOOT 0x1</div><div class='add'>+/* enum: The host must be rebooted. */</div><div class='add'>+#define          MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_HOST_REBOOT 0x2</div><div class='add'>+/* enum: The firmware and host must be rebooted (in either order). */</div><div class='add'>+#define          MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_FIRMWARE_AND_HOST_REBOOT 0x3</div><div class='add'>+/* enum: The host must be fully powered off. */</div><div class='add'>+#define          MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_HOST_POWERCYCLE 0x4</div><div class='add'>+/* If the update failed with MC_CMD_NVRAM_VERIFY_RC_BAD_CONFIG, a null-</div><div class='add'>+ * terminated US-ASCII string suitable for showing to the user.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_ERROR_STRING_OFST 8</div><div class='add'>+#define       MC_CMD_NVRAM_UPDATE_FINISH_V3_OUT_ERROR_STRING_LEN 80</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='hunk'>@@ -7522,7 +8154,7 @@</div><div class='ctx'> #define MC_CMD_REBOOT 0x3d</div><div class='ctx'> #undef MC_CMD_0x3d_PRIVILEGE_CTG</div><div class='ctx'> </div><div class='del'>-#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='add'>+#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_REBOOT_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_REBOOT_IN_LEN 4</div><div class='hunk'>@@ -7535,65 +8167,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_SCHEDINFO</div><div class='del'>- * Request scheduler info. Locks required: NONE. Returns: An array of</div><div class='del'>- * (timeslice,maximum overrun), one for each thread, in ascending order of</div><div class='del'>- * thread address.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SCHEDINFO 0x3e</div><div class='del'>-#undef MC_CMD_0x3e_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x3e_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SCHEDINFO_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SCHEDINFO_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SCHEDINFO_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SCHEDINFO_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_SCHEDINFO_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_SCHEDINFO_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_SCHEDINFO_OUT_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_SCHEDINFO_OUT_DATA_NUM(len) (((len)-0)/4)</div><div class='del'>-#define       MC_CMD_SCHEDINFO_OUT_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_SCHEDINFO_OUT_DATA_LEN 4</div><div class='del'>-#define       MC_CMD_SCHEDINFO_OUT_DATA_MINNUM 1</div><div class='del'>-#define       MC_CMD_SCHEDINFO_OUT_DATA_MAXNUM 63</div><div class='del'>-#define       MC_CMD_SCHEDINFO_OUT_DATA_MAXNUM_MCDI2 255</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_REBOOT_MODE</div><div class='del'>- * Set the mode for the next MC reboot. Locks required: NONE. Sets the reboot</div><div class='del'>- * mode to the specified value. Returns the old mode.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_REBOOT_MODE 0x3f</div><div class='del'>-#undef MC_CMD_0x3f_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_REBOOT_MODE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_REBOOT_MODE_IN_LEN 4</div><div class='del'>-#define       MC_CMD_REBOOT_MODE_IN_VALUE_OFST 0</div><div class='del'>-#define       MC_CMD_REBOOT_MODE_IN_VALUE_LEN 4</div><div class='del'>-/* enum: Normal. */</div><div class='del'>-#define          MC_CMD_REBOOT_MODE_NORMAL 0x0</div><div class='del'>-/* enum: Power-on Reset. */</div><div class='del'>-#define          MC_CMD_REBOOT_MODE_POR 0x2</div><div class='del'>-/* enum: Snapper. */</div><div class='del'>-#define          MC_CMD_REBOOT_MODE_SNAPPER 0x3</div><div class='del'>-/* enum: snapper fake POR */</div><div class='del'>-#define          MC_CMD_REBOOT_MODE_SNAPPER_POR 0x4</div><div class='del'>-#define        MC_CMD_REBOOT_MODE_IN_FAKE_OFST 0</div><div class='del'>-#define        MC_CMD_REBOOT_MODE_IN_FAKE_LBN 7</div><div class='del'>-#define        MC_CMD_REBOOT_MODE_IN_FAKE_WIDTH 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_REBOOT_MODE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_REBOOT_MODE_OUT_LEN 4</div><div class='del'>-#define       MC_CMD_REBOOT_MODE_OUT_VALUE_OFST 0</div><div class='del'>-#define       MC_CMD_REBOOT_MODE_OUT_VALUE_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_SENSOR_INFO</div><div class='ctx'>  * Returns information about every available sensor.</div><div class='ctx'>  *</div><div class='hunk'>@@ -8061,6 +8634,54 @@</div><div class='ctx'> /* MC_CMD_GET_PHY_STATE_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_GET_PHY_STATE_IN_LEN 0</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_GET_PHY_STATE_IN_V2 msgrequest */</div><div class='add'>+#define    MC_CMD_GET_PHY_STATE_IN_V2_LEN 8</div><div class='add'>+/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which</div><div class='add'>+ * identifies a real or virtual network port by MAE port and link end. See the</div><div class='add'>+ * structure definition for more details.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LEN 8</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_LBN 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_LBN 32</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_WIDTH 32</div><div class='add'>+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LINK_END_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LINK_END_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LEN 8</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_LBN 0</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_LBN 32</div><div class='add'>+#define       MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_WIDTH 32</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_GET_PHY_STATE_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_GET_PHY_STATE_OUT_LEN 4</div><div class='ctx'> #define       MC_CMD_GET_PHY_STATE_OUT_STATE_OFST 0</div><div class='hunk'>@@ -8072,22 +8693,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_SETUP_8021QBB</div><div class='del'>- * 802.1Qbb control. 8 Tx queues that map to priorities 0 - 7. Use all 1s to</div><div class='del'>- * disable 802.Qbb for a given priority.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SETUP_8021QBB 0x44</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SETUP_8021QBB_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SETUP_8021QBB_IN_LEN 32</div><div class='del'>-#define       MC_CMD_SETUP_8021QBB_IN_TXQS_OFST 0</div><div class='del'>-#define       MC_CMD_SETUP_8021QBB_IN_TXQS_LEN 32</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SETUP_8021QBB_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SETUP_8021QBB_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_WOL_FILTER_GET</div><div class='ctx'>  * Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS</div><div class='ctx'>  */</div><div class='hunk'>@@ -8106,133 +8711,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD</div><div class='del'>- * Add a protocol offload to NIC for lights-out state. Locks required: None.</div><div class='del'>- * Returns: 0, ENOSYS</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46</div><div class='del'>-#undef MC_CMD_0x46_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x46_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN msgrequest */</div><div class='del'>-#define    MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMIN 8</div><div class='del'>-#define    MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LEN(num) (4+4*(num))</div><div class='del'>-#define    MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_NUM(len) (((len)-4)/4)</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4</div><div class='del'>-#define          MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_ARP 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_LIGHTSOUT_OFFLOAD_PROTOCOL_NS 0x2 /* enum */</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_OFST 4</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_LEN 4</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MINNUM 1</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MAXNUM 62</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_MAXNUM_MCDI2 254</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP msgrequest */</div><div class='del'>-#define    MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_LEN 14</div><div class='del'>-/*            MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 */</div><div class='del'>-/*            MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_MAC_OFST 4</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_MAC_LEN 6</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_IP_OFST 10</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_IP_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS msgrequest */</div><div class='del'>-#define    MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_LEN 42</div><div class='del'>-/*            MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0 */</div><div class='del'>-/*            MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_MAC_OFST 4</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_MAC_LEN 6</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_SNIPV6_OFST 10</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_SNIPV6_LEN 16</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_IPV6_OFST 26</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_IPV6_LEN 16</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_LEN 4</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_OFST 0</div><div class='del'>-#define       MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD</div><div class='del'>- * Remove a protocol offload from NIC for lights-out state. Locks required:</div><div class='del'>- * None. Returns: 0, ENOSYS</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47</div><div class='del'>-#undef MC_CMD_0x47_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x47_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='del'>-</div><div class='del'>-/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN msgrequest */</div><div class='del'>-#define    MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_LEN 8</div><div class='del'>-#define       MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_OFST 0</div><div class='del'>-#define       MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4</div><div class='del'>-#define       MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_OFST 4</div><div class='del'>-#define       MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_MAC_RESET_RESTORE</div><div class='del'>- * Restore MAC after block reset. Locks required: None. Returns: 0.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_MAC_RESET_RESTORE 0x48</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_MAC_RESET_RESTORE_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MAC_RESET_RESTORE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_MAC_RESET_RESTORE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_TESTASSERT</div><div class='del'>- * Deliberately trigger an assert-detonation in the firmware for testing</div><div class='del'>- * purposes (i.e. to allow tests that the driver copes gracefully). Locks</div><div class='del'>- * required: None Returns: 0</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_TESTASSERT 0x49</div><div class='del'>-#undef MC_CMD_0x49_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x49_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TESTASSERT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TESTASSERT_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TESTASSERT_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_TESTASSERT_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TESTASSERT_V2_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TESTASSERT_V2_IN_LEN 4</div><div class='del'>-/* How to provoke the assertion */</div><div class='del'>-#define       MC_CMD_TESTASSERT_V2_IN_TYPE_OFST 0</div><div class='del'>-#define       MC_CMD_TESTASSERT_V2_IN_TYPE_LEN 4</div><div class='del'>-/* enum: Assert using the FAIL_ASSERTION_WITH_USEFUL_VALUES macro. Unless</div><div class='del'>- * you're testing firmware, this is what you want.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_TESTASSERT_V2_IN_FAIL_ASSERTION_WITH_USEFUL_VALUES 0x0</div><div class='del'>-/* enum: Assert using assert(0); */</div><div class='del'>-#define          MC_CMD_TESTASSERT_V2_IN_ASSERT_FALSE 0x1</div><div class='del'>-/* enum: Deliberately trigger a watchdog */</div><div class='del'>-#define          MC_CMD_TESTASSERT_V2_IN_WATCHDOG 0x2</div><div class='del'>-/* enum: Deliberately trigger a trap by loading from an invalid address */</div><div class='del'>-#define          MC_CMD_TESTASSERT_V2_IN_LOAD_TRAP 0x3</div><div class='del'>-/* enum: Deliberately trigger a trap by storing to an invalid address */</div><div class='del'>-#define          MC_CMD_TESTASSERT_V2_IN_STORE_TRAP 0x4</div><div class='del'>-/* enum: Jump to an invalid address */</div><div class='del'>-#define          MC_CMD_TESTASSERT_V2_IN_JUMP_TRAP 0x5</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TESTASSERT_V2_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_TESTASSERT_V2_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_WORKAROUND</div><div class='ctx'>  * Enable/Disable a given workaround. The mcfw will return EINVAL if it doesn't</div><div class='ctx'>  * understand the given workaround number - which should not be treated as a</div><div class='hunk'>@@ -8324,6 +8802,62 @@</div><div class='ctx'> #define        MC_CMD_GET_PHY_MEDIA_INFO_IN_DSFP_BANK_LBN 16</div><div class='ctx'> #define        MC_CMD_GET_PHY_MEDIA_INFO_IN_DSFP_BANK_WIDTH 16</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_GET_PHY_MEDIA_INFO_IN_V2 msgrequest */</div><div class='add'>+#define    MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_LEN 12</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_PAGE_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_PAGE_LEN 4</div><div class='add'>+#define        MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_OFST 0</div><div class='add'>+#define        MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_LBN 0</div><div class='add'>+#define        MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_WIDTH 16</div><div class='add'>+#define        MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_OFST 0</div><div class='add'>+#define        MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_LBN 16</div><div class='add'>+#define        MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_WIDTH 16</div><div class='add'>+/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which</div><div class='add'>+ * identifies a real or virtual network port by MAE port and link end. See the</div><div class='add'>+ * structure definition for more details</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LEN 8</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_LBN 32</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_OFST 8</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_LBN 64</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_WIDTH 32</div><div class='add'>+/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 7</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 32</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 52</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 48</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 6</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LINK_END_OFST 8</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LINK_END_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LEN 8</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_LBN 32</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_OFST 8</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_LBN 64</div><div class='add'>+#define       MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_WIDTH 32</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_GET_PHY_MEDIA_INFO_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMIN 5</div><div class='ctx'> #define    MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX 252</div><div class='hunk'>@@ -8348,7 +8882,7 @@</div><div class='ctx'> #define MC_CMD_NVRAM_TEST 0x4c</div><div class='ctx'> #undef MC_CMD_0x4c_PRIVILEGE_CTG</div><div class='ctx'> </div><div class='del'>-#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='add'>+#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_NVRAM_TEST_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_NVRAM_TEST_IN_LEN 4</div><div class='hunk'>@@ -8370,103 +8904,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_MRSFP_TWEAK</div><div class='del'>- * Read status and/or set parameters for the 'mrsfp' driver in mr_rusty builds.</div><div class='del'>- * I2C I/O expander bits are always read; if equaliser parameters are supplied,</div><div class='del'>- * they are configured first. Locks required: None. Return code: 0, EINVAL.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_MRSFP_TWEAK 0x4d</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */</div><div class='del'>-#define    MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN 16</div><div class='del'>-/* 0-6 low-&gt;high de-emph. */</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_OFST 0</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_LEN 4</div><div class='del'>-/* 0-8 low-&gt;high ref.V */</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_OFST 4</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_LEN 4</div><div class='del'>-/* 0-8 0-8 low-&gt;high boost */</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_OFST 8</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_LEN 4</div><div class='del'>-/* 0-8 low-&gt;high ref.V */</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_OFST 12</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MRSFP_TWEAK_IN_READ_ONLY msgrequest */</div><div class='del'>-#define    MC_CMD_MRSFP_TWEAK_IN_READ_ONLY_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MRSFP_TWEAK_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_MRSFP_TWEAK_OUT_LEN 12</div><div class='del'>-/* input bits */</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_OFST 0</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_LEN 4</div><div class='del'>-/* output bits */</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_OFST 4</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_LEN 4</div><div class='del'>-/* direction */</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OFST 8</div><div class='del'>-#define       MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_LEN 4</div><div class='del'>-/* enum: Out. */</div><div class='del'>-#define          MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_OUT 0x0</div><div class='del'>-/* enum: In. */</div><div class='del'>-#define          MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_IN 0x1</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SENSOR_SET_LIMS</div><div class='del'>- * Adjusts the sensor limits. This is a warranty-voiding operation. Returns:</div><div class='del'>- * ENOENT if the sensor specified does not exist, EINVAL if the limits are out</div><div class='del'>- * of range.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SENSOR_SET_LIMS 0x4e</div><div class='del'>-#undef MC_CMD_0x4e_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x4e_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SENSOR_SET_LIMS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SENSOR_SET_LIMS_IN_LEN 20</div><div class='del'>-#define       MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_OFST 0</div><div class='del'>-#define       MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */</div><div class='del'>-/* interpretation is is sensor-specific. */</div><div class='del'>-#define       MC_CMD_SENSOR_SET_LIMS_IN_LOW0_OFST 4</div><div class='del'>-#define       MC_CMD_SENSOR_SET_LIMS_IN_LOW0_LEN 4</div><div class='del'>-/* interpretation is is sensor-specific. */</div><div class='del'>-#define       MC_CMD_SENSOR_SET_LIMS_IN_HI0_OFST 8</div><div class='del'>-#define       MC_CMD_SENSOR_SET_LIMS_IN_HI0_LEN 4</div><div class='del'>-/* interpretation is is sensor-specific. */</div><div class='del'>-#define       MC_CMD_SENSOR_SET_LIMS_IN_LOW1_OFST 12</div><div class='del'>-#define       MC_CMD_SENSOR_SET_LIMS_IN_LOW1_LEN 4</div><div class='del'>-/* interpretation is is sensor-specific. */</div><div class='del'>-#define       MC_CMD_SENSOR_SET_LIMS_IN_HI1_OFST 16</div><div class='del'>-#define       MC_CMD_SENSOR_SET_LIMS_IN_HI1_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SENSOR_SET_LIMS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SENSOR_SET_LIMS_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_RESOURCE_LIMITS</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_RESOURCE_LIMITS 0x4f</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_RESOURCE_LIMITS_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_RESOURCE_LIMITS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN 16</div><div class='del'>-#define       MC_CMD_GET_RESOURCE_LIMITS_OUT_BUFTBL_OFST 0</div><div class='del'>-#define       MC_CMD_GET_RESOURCE_LIMITS_OUT_BUFTBL_LEN 4</div><div class='del'>-#define       MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_OFST 4</div><div class='del'>-#define       MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_LEN 4</div><div class='del'>-#define       MC_CMD_GET_RESOURCE_LIMITS_OUT_RXQ_OFST 8</div><div class='del'>-#define       MC_CMD_GET_RESOURCE_LIMITS_OUT_RXQ_LEN 4</div><div class='del'>-#define       MC_CMD_GET_RESOURCE_LIMITS_OUT_TXQ_OFST 12</div><div class='del'>-#define       MC_CMD_GET_RESOURCE_LIMITS_OUT_TXQ_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_NVRAM_PARTITIONS</div><div class='ctx'>  * Reads the list of available virtual NVRAM partition types. Locks required:</div><div class='ctx'>  * none. Returns: 0, EINVAL (bad type).</div><div class='hunk'>@@ -8582,806 +9019,6 @@</div><div class='ctx'> #define       MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_OFST 12</div><div class='ctx'> #define       MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_LEN 4</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_CLP</div><div class='del'>- * Perform a CLP related operation, see SF-110495-PS for details of CLP</div><div class='del'>- * processing. This command has been extended to accomodate the requirements of</div><div class='del'>- * different manufacturers which are to be found in SF-119187-TC, SF-119186-TC,</div><div class='del'>- * SF-120509-TC and SF-117282-PS.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_CLP 0x56</div><div class='del'>-#undef MC_CMD_0x56_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x56_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_IN msgrequest */</div><div class='del'>-#define    MC_CMD_CLP_IN_LEN 4</div><div class='del'>-/* Sub operation */</div><div class='del'>-#define       MC_CMD_CLP_IN_OP_OFST 0</div><div class='del'>-#define       MC_CMD_CLP_IN_OP_LEN 4</div><div class='del'>-/* enum: Return to factory default settings */</div><div class='del'>-#define          MC_CMD_CLP_OP_DEFAULT 0x1</div><div class='del'>-/* enum: Set MAC address */</div><div class='del'>-#define          MC_CMD_CLP_OP_SET_MAC 0x2</div><div class='del'>-/* enum: Get MAC address */</div><div class='del'>-#define          MC_CMD_CLP_OP_GET_MAC 0x3</div><div class='del'>-/* enum: Set UEFI/GPXE boot mode */</div><div class='del'>-#define          MC_CMD_CLP_OP_SET_BOOT 0x4</div><div class='del'>-/* enum: Get UEFI/GPXE boot mode */</div><div class='del'>-#define          MC_CMD_CLP_OP_GET_BOOT 0x5</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_CLP_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_IN_DEFAULT msgrequest */</div><div class='del'>-#define    MC_CMD_CLP_IN_DEFAULT_LEN 4</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_OFST 0 */</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_LEN 4 */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_OUT_DEFAULT msgresponse */</div><div class='del'>-#define    MC_CMD_CLP_OUT_DEFAULT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_IN_SET_MAC msgrequest */</div><div class='del'>-#define    MC_CMD_CLP_IN_SET_MAC_LEN 12</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_OFST 0 */</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_LEN 4 */</div><div class='del'>-/* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00</div><div class='del'>- * restores the permanent (factory-programmed) MAC address associated with the</div><div class='del'>- * port. A non-zero MAC address persists until a PCIe reset or a power cycle.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_MAC_ADDR_OFST 4</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_MAC_ADDR_LEN 6</div><div class='del'>-/* Padding */</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_MAC_RESERVED_OFST 10</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_MAC_RESERVED_LEN 2</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_OUT_SET_MAC msgresponse */</div><div class='del'>-#define    MC_CMD_CLP_OUT_SET_MAC_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_IN_SET_MAC_V2 msgrequest */</div><div class='del'>-#define    MC_CMD_CLP_IN_SET_MAC_V2_LEN 16</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_OFST 0 */</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_LEN 4 */</div><div class='del'>-/* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00</div><div class='del'>- * restores the permanent (factory-programmed) MAC address associated with the</div><div class='del'>- * port. A non-zero MAC address persists until a PCIe reset or a power cycle.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_MAC_V2_ADDR_OFST 4</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_MAC_V2_ADDR_LEN 6</div><div class='del'>-/* Padding */</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_MAC_V2_RESERVED_OFST 10</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_MAC_V2_RESERVED_LEN 2</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_OFST 12</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_OFST 12</div><div class='del'>-#define        MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_LBN 0</div><div class='del'>-#define        MC_CMD_CLP_IN_SET_MAC_V2_VIRTUAL_WIDTH 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_IN_GET_MAC msgrequest */</div><div class='del'>-#define    MC_CMD_CLP_IN_GET_MAC_LEN 4</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_OFST 0 */</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_LEN 4 */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_IN_GET_MAC_V2 msgrequest */</div><div class='del'>-#define    MC_CMD_CLP_IN_GET_MAC_V2_LEN 8</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_OFST 0 */</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_LEN 4 */</div><div class='del'>-#define       MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_OFST 4</div><div class='del'>-#define       MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_OFST 4</div><div class='del'>-#define        MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_LBN 0</div><div class='del'>-#define        MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_WIDTH 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_OUT_GET_MAC msgresponse */</div><div class='del'>-#define    MC_CMD_CLP_OUT_GET_MAC_LEN 8</div><div class='del'>-/* MAC address assigned to port */</div><div class='del'>-#define       MC_CMD_CLP_OUT_GET_MAC_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_CLP_OUT_GET_MAC_ADDR_LEN 6</div><div class='del'>-/* Padding */</div><div class='del'>-#define       MC_CMD_CLP_OUT_GET_MAC_RESERVED_OFST 6</div><div class='del'>-#define       MC_CMD_CLP_OUT_GET_MAC_RESERVED_LEN 2</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_IN_SET_BOOT msgrequest */</div><div class='del'>-#define    MC_CMD_CLP_IN_SET_BOOT_LEN 5</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_OFST 0 */</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_LEN 4 */</div><div class='del'>-/* Boot flag */</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_BOOT_FLAG_OFST 4</div><div class='del'>-#define       MC_CMD_CLP_IN_SET_BOOT_FLAG_LEN 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_OUT_SET_BOOT msgresponse */</div><div class='del'>-#define    MC_CMD_CLP_OUT_SET_BOOT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_IN_GET_BOOT msgrequest */</div><div class='del'>-#define    MC_CMD_CLP_IN_GET_BOOT_LEN 4</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_OFST 0 */</div><div class='del'>-/*            MC_CMD_CLP_IN_OP_LEN 4 */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CLP_OUT_GET_BOOT msgresponse */</div><div class='del'>-#define    MC_CMD_CLP_OUT_GET_BOOT_LEN 4</div><div class='del'>-/* Boot flag */</div><div class='del'>-#define       MC_CMD_CLP_OUT_GET_BOOT_FLAG_OFST 0</div><div class='del'>-#define       MC_CMD_CLP_OUT_GET_BOOT_FLAG_LEN 1</div><div class='del'>-/* Padding */</div><div class='del'>-#define       MC_CMD_CLP_OUT_GET_BOOT_RESERVED_OFST 1</div><div class='del'>-#define       MC_CMD_CLP_OUT_GET_BOOT_RESERVED_LEN 3</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_MUM</div><div class='del'>- * Perform a MUM operation</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_MUM 0x57</div><div class='del'>-#undef MC_CMD_0x57_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x57_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_OP_HDR_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_IN_OP_HDR_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_IN_OP_OFST 0</div><div class='del'>-#define        MC_CMD_MUM_IN_OP_LBN 0</div><div class='del'>-#define        MC_CMD_MUM_IN_OP_WIDTH 8</div><div class='del'>-/* enum: NULL MCDI command to MUM */</div><div class='del'>-#define          MC_CMD_MUM_OP_NULL 0x1</div><div class='del'>-/* enum: Get MUM version */</div><div class='del'>-#define          MC_CMD_MUM_OP_GET_VERSION 0x2</div><div class='del'>-/* enum: Issue raw I2C command to MUM */</div><div class='del'>-#define          MC_CMD_MUM_OP_RAW_CMD 0x3</div><div class='del'>-/* enum: Read from registers on devices connected to MUM. */</div><div class='del'>-#define          MC_CMD_MUM_OP_READ 0x4</div><div class='del'>-/* enum: Write to registers on devices connected to MUM. */</div><div class='del'>-#define          MC_CMD_MUM_OP_WRITE 0x5</div><div class='del'>-/* enum: Control UART logging. */</div><div class='del'>-#define          MC_CMD_MUM_OP_LOG 0x6</div><div class='del'>-/* enum: Operations on MUM GPIO lines */</div><div class='del'>-#define          MC_CMD_MUM_OP_GPIO 0x7</div><div class='del'>-/* enum: Get sensor readings from MUM */</div><div class='del'>-#define          MC_CMD_MUM_OP_READ_SENSORS 0x8</div><div class='del'>-/* enum: Initiate clock programming on the MUM */</div><div class='del'>-#define          MC_CMD_MUM_OP_PROGRAM_CLOCKS 0x9</div><div class='del'>-/* enum: Initiate FPGA load from flash on the MUM */</div><div class='del'>-#define          MC_CMD_MUM_OP_FPGA_LOAD 0xa</div><div class='del'>-/* enum: Request sensor reading from MUM ADC resulting from earlier request via</div><div class='del'>- * MUM ATB</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_MUM_OP_READ_ATB_SENSOR 0xb</div><div class='del'>-/* enum: Send commands relating to the QSFP ports via the MUM for PHY</div><div class='del'>- * operations</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_MUM_OP_QSFP 0xc</div><div class='del'>-/* enum: Request discrete and SODIMM DDR info (type, size, speed grade, voltage</div><div class='del'>- * level) from MUM</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_MUM_OP_READ_DDR_INFO 0xd</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_NULL msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_NULL_LEN 4</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-#define       MC_CMD_MUM_IN_CMD_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_IN_CMD_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GET_VERSION msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GET_VERSION_LEN 4</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_READ msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_READ_LEN 16</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-/* ID of (device connected to MUM) to read from registers of */</div><div class='del'>-#define       MC_CMD_MUM_IN_READ_DEVICE_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_READ_DEVICE_LEN 4</div><div class='del'>-/* enum: Hittite HMC1035 clock generator on Sorrento board */</div><div class='del'>-#define          MC_CMD_MUM_DEV_HITTITE 0x1</div><div class='del'>-/* enum: Hittite HMC1035 clock generator for NIC-side on Sorrento board */</div><div class='del'>-#define          MC_CMD_MUM_DEV_HITTITE_NIC 0x2</div><div class='del'>-/* 32-bit address to read from */</div><div class='del'>-#define       MC_CMD_MUM_IN_READ_ADDR_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_READ_ADDR_LEN 4</div><div class='del'>-/* Number of words to read. */</div><div class='del'>-#define       MC_CMD_MUM_IN_READ_NUMWORDS_OFST 12</div><div class='del'>-#define       MC_CMD_MUM_IN_READ_NUMWORDS_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_WRITE msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_WRITE_LENMIN 16</div><div class='del'>-#define    MC_CMD_MUM_IN_WRITE_LENMAX 252</div><div class='del'>-#define    MC_CMD_MUM_IN_WRITE_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_MUM_IN_WRITE_LEN(num) (12+4*(num))</div><div class='del'>-#define    MC_CMD_MUM_IN_WRITE_BUFFER_NUM(len) (((len)-12)/4)</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-/* ID of (device connected to MUM) to write to registers of */</div><div class='del'>-#define       MC_CMD_MUM_IN_WRITE_DEVICE_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_WRITE_DEVICE_LEN 4</div><div class='del'>-/* enum: Hittite HMC1035 clock generator on Sorrento board */</div><div class='del'>-/*               MC_CMD_MUM_DEV_HITTITE 0x1 */</div><div class='del'>-/* 32-bit address to write to */</div><div class='del'>-#define       MC_CMD_MUM_IN_WRITE_ADDR_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_WRITE_ADDR_LEN 4</div><div class='del'>-/* Words to write */</div><div class='del'>-#define       MC_CMD_MUM_IN_WRITE_BUFFER_OFST 12</div><div class='del'>-#define       MC_CMD_MUM_IN_WRITE_BUFFER_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_WRITE_BUFFER_MINNUM 1</div><div class='del'>-#define       MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM 60</div><div class='del'>-#define       MC_CMD_MUM_IN_WRITE_BUFFER_MAXNUM_MCDI2 252</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_RAW_CMD msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_RAW_CMD_LENMIN 17</div><div class='del'>-#define    MC_CMD_MUM_IN_RAW_CMD_LENMAX 252</div><div class='del'>-#define    MC_CMD_MUM_IN_RAW_CMD_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_MUM_IN_RAW_CMD_LEN(num) (16+1*(num))</div><div class='del'>-#define    MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_NUM(len) (((len)-16)/1)</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-/* MUM I2C cmd code */</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_LEN 4</div><div class='del'>-/* Number of bytes to write */</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_LEN 4</div><div class='del'>-/* Number of bytes to read */</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_NUM_READ_OFST 12</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_NUM_READ_LEN 4</div><div class='del'>-/* Bytes to write */</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_OFST 16</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MINNUM 1</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM 236</div><div class='del'>-#define       MC_CMD_MUM_IN_RAW_CMD_WRITE_DATA_MAXNUM_MCDI2 1004</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_LOG msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_LOG_LEN 8</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_LOG_OP_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_LOG_OP_LEN 4</div><div class='del'>-#define          MC_CMD_MUM_IN_LOG_OP_UART 0x1 /* enum */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_LOG_OP_UART msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_LOG_OP_UART_LEN 12</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-/*            MC_CMD_MUM_IN_LOG_OP_OFST 4 */</div><div class='del'>-/*            MC_CMD_MUM_IN_LOG_OP_LEN 4 */</div><div class='del'>-/* Enable/disable debug output to UART */</div><div class='del'>-#define       MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_LEN 8</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_HDR_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OPCODE_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OPCODE_LBN 0</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OPCODE_WIDTH 8</div><div class='del'>-#define          MC_CMD_MUM_IN_GPIO_IN_READ 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_GPIO_OUT_WRITE 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_GPIO_OUT_READ 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE 0x3 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ 0x4 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_GPIO_OP 0x5 /* enum */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO_IN_READ msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_IN_READ_LEN 8</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_IN_READ_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_IN_READ_HDR_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO_OUT_WRITE msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_OUT_WRITE_LEN 16</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_LEN 4</div><div class='del'>-/* The first 32-bit word to be written to the GPIO OUT register. */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_LEN 4</div><div class='del'>-/* The second 32-bit word to be written to the GPIO OUT register. */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_OFST 12</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO_OUT_READ msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_OUT_READ_LEN 8</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_LEN 16</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_LEN 4</div><div class='del'>-/* The first 32-bit word to be written to the GPIO OUT ENABLE register. */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_LEN 4</div><div class='del'>-/* The second 32-bit word to be written to the GPIO OUT ENABLE register. */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_OFST 12</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_LEN 8</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO_OP msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_OP_LEN 8</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OP_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OP_HDR_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_LBN 8</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_WIDTH 8</div><div class='del'>-#define          MC_CMD_MUM_IN_GPIO_OP_OUT_READ 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE 0x3 /* enum */</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_LBN 16</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_WIDTH 8</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO_OP_OUT_READ msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_OP_OUT_READ_LEN 8</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_LEN 8</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_LBN 24</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_WIDTH 8</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_LEN 8</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_LBN 24</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_WIDTH 8</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_LEN 8</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_LBN 24</div><div class='del'>-#define        MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_WIDTH 8</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_READ_SENSORS msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_READ_SENSORS_LEN 8</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_READ_SENSORS_PARAMS_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_READ_SENSORS_PARAMS_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_LBN 0</div><div class='del'>-#define        MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_WIDTH 8</div><div class='del'>-#define        MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_LBN 8</div><div class='del'>-#define        MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_WIDTH 8</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_PROGRAM_CLOCKS msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_PROGRAM_CLOCKS_LEN 12</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-/* Bit-mask of clocks to be programmed */</div><div class='del'>-#define       MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_LEN 4</div><div class='del'>-#define          MC_CMD_MUM_CLOCK_ID_FPGA 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_CLOCK_ID_DDR 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_CLOCK_ID_NIC 0x2 /* enum */</div><div class='del'>-/* Control flags for clock programming */</div><div class='del'>-#define       MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_LBN 0</div><div class='del'>-#define        MC_CMD_MUM_IN_PROGRAM_CLOCKS_OVERCLOCK_110_WIDTH 1</div><div class='del'>-#define        MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_LBN 1</div><div class='del'>-#define        MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_NIC_FROM_FPGA_WIDTH 1</div><div class='del'>-#define        MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_LBN 2</div><div class='del'>-#define        MC_CMD_MUM_IN_PROGRAM_CLOCKS_CLOCK_REF_FROM_XO_WIDTH 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_FPGA_LOAD msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_FPGA_LOAD_LEN 8</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-/* Enable/Disable FPGA config from flash */</div><div class='del'>-#define       MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_READ_ATB_SENSOR msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_READ_ATB_SENSOR_LEN 4</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_QSFP msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_QSFP_LEN 12</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_HDR_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_IN_QSFP_OPCODE_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_IN_QSFP_OPCODE_LBN 0</div><div class='del'>-#define        MC_CMD_MUM_IN_QSFP_OPCODE_WIDTH 4</div><div class='del'>-#define          MC_CMD_MUM_IN_QSFP_INIT 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_QSFP_RECONFIGURE 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO 0x3 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_QSFP_FILL_STATS 0x4 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_IN_QSFP_POLL_BIST 0x5 /* enum */</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_IDX_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_IDX_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_QSFP_INIT msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_QSFP_INIT_LEN 16</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_INIT_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_INIT_HDR_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_INIT_IDX_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_INIT_IDX_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_INIT_CAGE_OFST 12</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_INIT_CAGE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_QSFP_RECONFIGURE msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_QSFP_RECONFIGURE_LEN 24</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_OFST 12</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_OFST 16</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_OFST 20</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_LEN 12</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_LEN 16</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_OFST 12</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_QSFP_FILL_STATS msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_QSFP_FILL_STATS_LEN 12</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_QSFP_POLL_BIST msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_QSFP_POLL_BIST_LEN 12</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_IN_READ_DDR_INFO msgrequest */</div><div class='del'>-#define    MC_CMD_MUM_IN_READ_DDR_INFO_LEN 4</div><div class='del'>-/* MUM cmd header */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_OFST 0 */</div><div class='del'>-/*            MC_CMD_MUM_IN_CMD_LEN 4 */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_NULL msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_NULL_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_GET_VERSION msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_GET_VERSION_LEN 12</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN 8</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LBN 32</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LBN 64</div><div class='del'>-#define       MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_WIDTH 32</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1</div><div class='del'>-#define    MC_CMD_MUM_OUT_RAW_CMD_LENMAX 252</div><div class='del'>-#define    MC_CMD_MUM_OUT_RAW_CMD_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_MUM_OUT_RAW_CMD_LEN(num) (0+1*(num))</div><div class='del'>-#define    MC_CMD_MUM_OUT_RAW_CMD_DATA_NUM(len) (((len)-0)/1)</div><div class='del'>-/* returned data */</div><div class='del'>-#define       MC_CMD_MUM_OUT_RAW_CMD_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_RAW_CMD_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_MUM_OUT_RAW_CMD_DATA_MINNUM 1</div><div class='del'>-#define       MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM 252</div><div class='del'>-#define       MC_CMD_MUM_OUT_RAW_CMD_DATA_MAXNUM_MCDI2 1020</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_READ msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_LENMIN 4</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_LENMAX 252</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_BUFFER_NUM(len) (((len)-0)/4)</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_BUFFER_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_BUFFER_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_BUFFER_MINNUM 1</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM 63</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_BUFFER_MAXNUM_MCDI2 255</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_WRITE msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_WRITE_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_LOG msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_LOG_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_LOG_OP_UART msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_LOG_OP_UART_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_GPIO_IN_READ msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_GPIO_IN_READ_LEN 8</div><div class='del'>-/* The first 32-bit word read from the GPIO IN register. */</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_LEN 4</div><div class='del'>-/* The second 32-bit word read from the GPIO IN register. */</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_GPIO_OUT_WRITE msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_GPIO_OUT_WRITE_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_GPIO_OUT_READ msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_GPIO_OUT_READ_LEN 8</div><div class='del'>-/* The first 32-bit word read from the GPIO OUT register. */</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_LEN 4</div><div class='del'>-/* The second 32-bit word read from the GPIO OUT register. */</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_WRITE msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_WRITE_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_LEN 8</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_GPIO_OP_OUT_READ msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_GPIO_OP_OUT_WRITE msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_GPIO_OP_OUT_WRITE_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_GPIO_OP_OUT_CONFIG msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_GPIO_OP_OUT_CONFIG_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_GPIO_OP_OUT_ENABLE msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_GPIO_OP_OUT_ENABLE_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_READ_SENSORS msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_SENSORS_LENMIN 4</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_SENSORS_LENMAX 252</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_SENSORS_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_SENSORS_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_SENSORS_DATA_NUM(len) (((len)-0)/4)</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_SENSORS_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_SENSORS_DATA_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_SENSORS_DATA_MINNUM 1</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM 63</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_SENSORS_DATA_MAXNUM_MCDI2 255</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_SENSORS_READING_OFST 0</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_SENSORS_READING_LBN 0</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_SENSORS_READING_WIDTH 16</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_SENSORS_STATE_OFST 0</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_SENSORS_STATE_LBN 16</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_SENSORS_STATE_WIDTH 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_SENSORS_TYPE_OFST 0</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_SENSORS_TYPE_LBN 24</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_SENSORS_TYPE_WIDTH 8</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_PROGRAM_CLOCKS msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_PROGRAM_CLOCKS_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_FPGA_LOAD msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_FPGA_LOAD_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_READ_ATB_SENSOR msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_ATB_SENSOR_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_QSFP_INIT msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_QSFP_INIT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_QSFP_RECONFIGURE msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_QSFP_RECONFIGURE_LEN 8</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_LBN 0</div><div class='del'>-#define        MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_WIDTH 1</div><div class='del'>-#define        MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_OFST 4</div><div class='del'>-#define        MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_LBN 1</div><div class='del'>-#define        MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_WIDTH 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMIN 5</div><div class='del'>-#define    MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX 252</div><div class='del'>-#define    MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LEN(num) (4+1*(num))</div><div class='del'>-#define    MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_NUM(len) (((len)-4)/1)</div><div class='del'>-/* in bytes */</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MINNUM 1</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM 248</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_MAXNUM_MCDI2 1016</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_QSFP_FILL_STATS msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_QSFP_FILL_STATS_LEN 8</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_QSFP_POLL_BIST msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_QSFP_POLL_BIST_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MUM_OUT_READ_DDR_INFO msgresponse */</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_DDR_INFO_LENMIN 24</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX 248</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_DDR_INFO_LENMAX_MCDI2 1016</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_DDR_INFO_LEN(num) (8+8*(num))</div><div class='del'>-#define    MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_NUM(len) (((len)-8)/8)</div><div class='del'>-/* Discrete (soldered) DDR resistor strap info */</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_OFST 0</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_LEN 4</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_OFST 0</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_LBN 0</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_VRATIO_WIDTH 16</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_OFST 0</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_LBN 16</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED1_WIDTH 16</div><div class='del'>-/* Number of SODIMM info records */</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_OFST 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_LEN 4</div><div class='del'>-/* Array of SODIMM info records */</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LEN 8</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_OFST 8</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LBN 64</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST 12</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LEN 4</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LBN 96</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM 2</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM 30</div><div class='del'>-#define       MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 126</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_LBN 0</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_BANK_ID_WIDTH 8</div><div class='del'>-/* enum: SODIMM bank 1 (Top SODIMM for Sorrento) */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_BANK1 0x0</div><div class='del'>-/* enum: SODIMM bank 2 (Bottom SODDIMM for Sorrento) */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_BANK2 0x1</div><div class='del'>-/* enum: Total number of SODIMM banks */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_BANKS 0x2</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_LBN 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_TYPE_WIDTH 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_LBN 16</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_WIDTH 4</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_LBN 20</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_WIDTH 4</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_NOT_POWERED 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_1V25 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_1V35 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_1V5 0x3 /* enum */</div><div class='del'>-/* enum: Values 5-15 are reserved for future usage */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_1V8 0x4</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_LBN 24</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_SIZE_WIDTH 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_LBN 32</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_SPEED_WIDTH 16</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_LBN 48</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_WIDTH 4</div><div class='del'>-/* enum: No module present */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_ABSENT 0x0</div><div class='del'>-/* enum: Module present supported and powered on */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_POWERED 0x1</div><div class='del'>-/* enum: Module present but bad type */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_TYPE 0x2</div><div class='del'>-/* enum: Module present but incompatible voltage */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_VOLTAGE 0x3</div><div class='del'>-/* enum: Module present but unknown SPD */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_SPD 0x4</div><div class='del'>-/* enum: Module present but slot cannot support it */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_PRESENT_BAD_SLOT 0x5</div><div class='del'>-/* enum: Modules may or may not be present, but cannot establish contact by I2C</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_MUM_OUT_READ_DDR_INFO_NOT_REACHABLE 0x6</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_OFST 8</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_LBN 52</div><div class='del'>-#define        MC_CMD_MUM_OUT_READ_DDR_INFO_RESERVED2_WIDTH 12</div><div class='del'>-</div><div class='ctx'> /* MC_CMD_DYNAMIC_SENSORS_LIMITS structuredef: Set of sensor limits. This</div><div class='ctx'>  * should match the equivalent structure in the sensor_query SPHINX service.</div><div class='ctx'>  */</div><div class='hunk'>@@ -9500,27 +9137,22 @@</div><div class='ctx'>  * and a generation count for this version of the sensor table. On systems</div><div class='ctx'>  * advertising the DYNAMIC_SENSORS capability bit, this replaces the</div><div class='ctx'>  * MC_CMD_READ_SENSORS command. On multi-MC systems this may include sensors</div><div class='del'>- * added by the NMC.</div><div class='del'>- *</div><div class='del'>- * Sensor handles are persistent for the lifetime of the sensor and are used to</div><div class='del'>- * identify sensors in MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and</div><div class='del'>- * MC_CMD_DYNAMIC_SENSORS_GET_VALUES.</div><div class='del'>- *</div><div class='del'>- * The generation count is maintained by the MC, is persistent across reboots</div><div class='del'>- * and will be incremented each time the sensor table is modified. When the</div><div class='del'>- * table is modified, a CODE_DYNAMIC_SENSORS_CHANGE event will be generated</div><div class='del'>- * containing the new generation count. The driver should compare this against</div><div class='del'>- * the current generation count, and if it is different, call</div><div class='del'>- * MC_CMD_DYNAMIC_SENSORS_LIST again to update it's copy of the sensor table.</div><div class='del'>- *</div><div class='del'>- * The sensor count is provided to allow a future path to supporting more than</div><div class='add'>+ * added by the NMC. Sensor handles are persistent for the lifetime of the</div><div class='add'>+ * sensor and are used to identify sensors in</div><div class='add'>+ * MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and</div><div class='add'>+ * MC_CMD_DYNAMIC_SENSORS_GET_VALUES. The generation count is maintained by the</div><div class='add'>+ * MC, is persistent across reboots and will be incremented each time the</div><div class='add'>+ * sensor table is modified. When the table is modified, a</div><div class='add'>+ * CODE_DYNAMIC_SENSORS_CHANGE event will be generated containing the new</div><div class='add'>+ * generation count. The driver should compare this against the current</div><div class='add'>+ * generation count, and if it is different, call MC_CMD_DYNAMIC_SENSORS_LIST</div><div class='add'>+ * again to update it's copy of the sensor table. The sensor count is provided</div><div class='add'>+ * to allow a future path to supporting more than</div><div class='ctx'>  * MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM_MCDI2 sensors, i.e.</div><div class='ctx'>  * the maximum number that will fit in a single response. As this is a fairly</div><div class='ctx'>  * large number (253) it is not anticipated that this will be needed in the</div><div class='del'>- * near future, so can currently be ignored.</div><div class='del'>- *</div><div class='del'>- * On Riverhead this command is implemented as a wrapper for `list` in the</div><div class='del'>- * sensor_query SPHINX service.</div><div class='add'>+ * near future, so can currently be ignored. On Riverhead this command is</div><div class='add'>+ * implemented as a wrapper for `list` in the sensor_query SPHINX service.</div><div class='ctx'>  */</div><div class='ctx'> #define MC_CMD_DYNAMIC_SENSORS_LIST 0x66</div><div class='ctx'> #undef MC_CMD_0x66_PRIVILEGE_CTG</div><div class='hunk'>@@ -9557,15 +9189,13 @@</div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS</div><div class='ctx'>  * Get descriptions for a set of sensors, specified as an array of sensor</div><div class='del'>- * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST</div><div class='del'>- *</div><div class='del'>- * Any handles which do not correspond to a sensor currently managed by the MC</div><div class='del'>- * will be dropped from from the response. This may happen when a sensor table</div><div class='del'>- * update is in progress, and effectively means the set of usable sensors is</div><div class='del'>- * the intersection between the sets of sensors known to the driver and the MC.</div><div class='del'>- *</div><div class='del'>- * On Riverhead this command is implemented as a wrapper for</div><div class='del'>- * `get_descriptions` in the sensor_query SPHINX service.</div><div class='add'>+ * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. Any handles which do not</div><div class='add'>+ * correspond to a sensor currently managed by the MC will be dropped from</div><div class='add'>+ * the response. This may happen when a sensor table update is in progress, and</div><div class='add'>+ * effectively means the set of usable sensors is the intersection between the</div><div class='add'>+ * sets of sensors known to the driver and the MC. On Riverhead this command is</div><div class='add'>+ * implemented as a wrapper for `get_descriptions` in the sensor_query SPHINX</div><div class='add'>+ * service.</div><div class='ctx'>  */</div><div class='ctx'> #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67</div><div class='ctx'> #undef MC_CMD_0x67_PRIVILEGE_CTG</div><div class='hunk'>@@ -9602,19 +9232,15 @@</div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_DYNAMIC_SENSORS_GET_READINGS</div><div class='ctx'>  * Read the state and value for a set of sensors, specified as an array of</div><div class='del'>- * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST.</div><div class='del'>- *</div><div class='del'>- * In the case of a broken sensor, then the state of the response's</div><div class='del'>- * MC_CMD_DYNAMIC_SENSORS_VALUE entry will be set to BROKEN, and any value</div><div class='del'>- * provided should be treated as erroneous.</div><div class='del'>- *</div><div class='del'>- * Any handles which do not correspond to a sensor currently managed by the MC</div><div class='del'>- * will be dropped from from the response. This may happen when a sensor table</div><div class='del'>- * update is in progress, and effectively means the set of usable sensors is</div><div class='del'>- * the intersection between the sets of sensors known to the driver and the MC.</div><div class='del'>- *</div><div class='del'>- * On Riverhead this command is implemented as a wrapper for `get_readings`</div><div class='del'>- * in the sensor_query SPHINX service.</div><div class='add'>+ * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. In the case of a</div><div class='add'>+ * broken sensor, then the state of the response's MC_CMD_DYNAMIC_SENSORS_VALUE</div><div class='add'>+ * entry will be set to BROKEN, and any value provided should be treated as</div><div class='add'>+ * erroneous. Any handles which do not correspond to a sensor currently managed</div><div class='add'>+ * by the MC will be dropped from the response. This may happen when a</div><div class='add'>+ * sensor table update is in progress, and effectively means the set of usable</div><div class='add'>+ * sensors is the intersection between the sets of sensors known to the driver</div><div class='add'>+ * and the MC. On Riverhead this command is implemented as a wrapper for</div><div class='add'>+ * `get_readings` in the sensor_query SPHINX service.</div><div class='ctx'>  */</div><div class='ctx'> #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68</div><div class='ctx'> #undef MC_CMD_0x68_PRIVILEGE_CTG</div><div class='hunk'>@@ -9647,45 +9273,1286 @@</div><div class='ctx'> #define       MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MAXNUM 21</div><div class='ctx'> #define       MC_CMD_DYNAMIC_SENSORS_GET_READINGS_OUT_VALUES_MAXNUM_MCDI2 85</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_MAC_FLAGS structuredef */</div><div class='add'>+#define    MC_CMD_MAC_FLAGS_LEN 4</div><div class='add'>+/* The enums defined in this field are used as indices into the</div><div class='add'>+ * MC_CMD_MAC_FLAGS bitmask.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_FLAGS_MASK_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_FLAGS_MASK_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/* enum: Include the FCS in the packet data delivered to the host. Ignored if</div><div class='add'>+ * RX_INCLUDE_FCS not set in capabilities.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_MAC_FLAGS_FLAG_INCLUDE_FCS 0x0</div><div class='add'>+#define       MC_CMD_MAC_FLAGS_MASK_LBN 0</div><div class='add'>+#define       MC_CMD_MAC_FLAGS_MASK_WIDTH 32</div><div class='add'>+</div><div class='add'>+/* MC_CMD_TRANSMISSION_MODE structuredef */</div><div class='add'>+#define    MC_CMD_TRANSMISSION_MODE_LEN 4</div><div class='add'>+#define       MC_CMD_TRANSMISSION_MODE_MASK_OFST 0</div><div class='add'>+#define       MC_CMD_TRANSMISSION_MODE_MASK_LEN 4</div><div class='add'>+/* enum property: value */</div><div class='add'>+#define          MC_CMD_TRANSMISSION_MODE_PROMSC_MODE 0x0 /* enum */</div><div class='add'>+#define          MC_CMD_TRANSMISSION_MODE_UNCST_MODE 0x1 /* enum */</div><div class='add'>+#define          MC_CMD_TRANSMISSION_MODE_BRDCST_MODE 0x2 /* enum */</div><div class='add'>+#define       MC_CMD_TRANSMISSION_MODE_MASK_LBN 0</div><div class='add'>+#define       MC_CMD_TRANSMISSION_MODE_MASK_WIDTH 32</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_CONFIG_OPTIONS structuredef */</div><div class='add'>+#define    MC_CMD_MAC_CONFIG_OPTIONS_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_CONFIG_OPTIONS_MASK_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_CONFIG_OPTIONS_MASK_LEN 4</div><div class='add'>+/* enum property: bitmask */</div><div class='add'>+/* enum: Configure the MAC address. */</div><div class='add'>+#define          MC_CMD_MAC_CONFIG_OPTIONS_CFG_ADDR 0x0</div><div class='add'>+/* enum: Configure the maximum frame length. */</div><div class='add'>+#define          MC_CMD_MAC_CONFIG_OPTIONS_CFG_MAX_FRAME_LEN 0x1</div><div class='add'>+/* enum: Configure flow control. */</div><div class='add'>+#define          MC_CMD_MAC_CONFIG_OPTIONS_CFG_FCNTL 0x2</div><div class='add'>+/* enum: Configure the transmission mode. */</div><div class='add'>+#define          MC_CMD_MAC_CONFIG_OPTIONS_CFG_TRANSMISSION_MODE 0x3</div><div class='add'>+/* enum: Configure FCS. */</div><div class='add'>+#define          MC_CMD_MAC_CONFIG_OPTIONS_CFG_INCLUDE_FCS 0x4</div><div class='add'>+#define       MC_CMD_MAC_CONFIG_OPTIONS_MASK_LBN 0</div><div class='add'>+#define       MC_CMD_MAC_CONFIG_OPTIONS_MASK_WIDTH 32</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_MAC_CTRL</div><div class='add'>+ * Set MAC configuration. Return code: 0, EINVAL, ENOTSUP</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_MAC_CTRL 0x1df</div><div class='add'>+#undef MC_CMD_0x1df_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1df_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_CTRL_IN msgrequest */</div><div class='add'>+#define    MC_CMD_MAC_CTRL_IN_LEN 32</div><div class='add'>+/* Handle for selected network port. */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_PORT_HANDLE_LEN 4</div><div class='add'>+/* Select which parameters to configure. A parameter will only be modified if</div><div class='add'>+ * the corresponding control flag is set.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_CONTROL_FLAGS_OFST 4</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_CONTROL_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_MAC_CONFIG_OPTIONS/MASK */</div><div class='add'>+/* MAC address of the device. */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_ADDR_OFST 8</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_ADDR_LEN 8</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_ADDR_LO_OFST 8</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_ADDR_LO_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_ADDR_LO_LBN 64</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_ADDR_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_ADDR_HI_OFST 12</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_ADDR_HI_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_ADDR_HI_LBN 96</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_ADDR_HI_WIDTH 32</div><div class='add'>+/* Includes the ethernet header, optional VLAN tags, payload and FCS. */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_MAX_FRAME_LEN_OFST 16</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_MAX_FRAME_LEN_LEN 4</div><div class='add'>+/* Settings for flow control. */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_FCNTL_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_FCNTL_LEN 4</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_FCNTL/MASK */</div><div class='add'>+/* Configure the MAC to transmit in one of promiscuous, unicast or broadcast</div><div class='add'>+ * mode.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_TRANSMISSION_MODE_OFST 24</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_TRANSMISSION_MODE_LEN 4</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_TRANSMISSION_MODE/MASK */</div><div class='add'>+/* Flags to control and expand the configuration of the MAC. */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_FLAGS_OFST 28</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_MAC_FLAGS/MASK */</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_CTRL_IN_V2 msgrequest: Updated MAC_CTRL with QBB mask */</div><div class='add'>+#define    MC_CMD_MAC_CTRL_IN_V2_LEN 33</div><div class='add'>+/* Handle for selected network port. */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_PORT_HANDLE_LEN 4</div><div class='add'>+/* Select which parameters to configure. A parameter will only be modified if</div><div class='add'>+ * the corresponding control flag is set.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_CONTROL_FLAGS_OFST 4</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_CONTROL_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_MAC_CONFIG_OPTIONS/MASK */</div><div class='add'>+/* MAC address of the device. */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_ADDR_OFST 8</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_ADDR_LEN 8</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_OFST 8</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_LBN 64</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_ADDR_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_OFST 12</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_LBN 96</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_ADDR_HI_WIDTH 32</div><div class='add'>+/* Includes the ethernet header, optional VLAN tags, payload and FCS. */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_MAX_FRAME_LEN_OFST 16</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_MAX_FRAME_LEN_LEN 4</div><div class='add'>+/* Settings for flow control. */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_FCNTL_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_FCNTL_LEN 4</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_FCNTL/MASK */</div><div class='add'>+/* Configure the MAC to transmit in one of promiscuous, unicast or broadcast</div><div class='add'>+ * mode.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_TRANSMISSION_MODE_OFST 24</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_TRANSMISSION_MODE_LEN 4</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_TRANSMISSION_MODE/MASK */</div><div class='add'>+/* Flags to control and expand the configuration of the MAC. */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_FLAGS_OFST 28</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_MAC_FLAGS/MASK */</div><div class='add'>+/* Priority-based flow control mask (QBB). PRIO7 corresponds to the highest</div><div class='add'>+ * priority, and PRIO0 to the lowest. This field is only used when CFG_FCNTL is</div><div class='add'>+ * set and FCNTL is QBB</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_PRIO_FCNTL_MASK_OFST 32</div><div class='add'>+#define       MC_CMD_MAC_CTRL_IN_V2_PRIO_FCNTL_MASK_LEN 1</div><div class='add'>+/* enum property: bitmask */</div><div class='add'>+#define          MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO0 0x0 /* enum */</div><div class='add'>+#define          MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO1 0x1 /* enum */</div><div class='add'>+#define          MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO2 0x2 /* enum */</div><div class='add'>+#define          MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO3 0x3 /* enum */</div><div class='add'>+#define          MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO4 0x4 /* enum */</div><div class='add'>+#define          MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO5 0x5 /* enum */</div><div class='add'>+#define          MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO6 0x6 /* enum */</div><div class='add'>+#define          MC_CMD_MAC_CTRL_IN_V2_QBB_PRIO7 0x7 /* enum */</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_CTRL_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_MAC_CTRL_OUT_LEN 0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_MAC_STATE</div><div class='add'>+ * Read the MAC state. Return code: 0, ETIME.</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_MAC_STATE 0x1e0</div><div class='add'>+#undef MC_CMD_0x1e0_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1e0_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_STATE_IN msgrequest */</div><div class='add'>+#define    MC_CMD_MAC_STATE_IN_LEN 4</div><div class='add'>+/* Handle for selected network port. */</div><div class='add'>+#define       MC_CMD_MAC_STATE_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_STATE_IN_PORT_HANDLE_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_STATE_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_MAC_STATE_OUT_LEN 32</div><div class='add'>+/* The configured maximum frame length of the MAC. */</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_MAX_FRAME_LEN_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_MAX_FRAME_LEN_LEN 4</div><div class='add'>+/* This returns the negotiated flow control value. */</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_FCNTL_OFST 4</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_FCNTL_LEN 4</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_FCNTL/MASK */</div><div class='add'>+/* MAC address of the device. */</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_ADDR_OFST 8</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_ADDR_LEN 8</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_ADDR_LO_OFST 8</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_ADDR_LO_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_ADDR_LO_LBN 64</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_ADDR_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_ADDR_HI_OFST 12</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_ADDR_HI_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_ADDR_HI_LBN 96</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_ADDR_HI_WIDTH 32</div><div class='add'>+/* Flags indicating MAC faults. */</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_MAC_FAULT_FLAGS_OFST 16</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_MAC_FAULT_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/* enum: Indicates a local MAC fault. */</div><div class='add'>+#define          MC_CMD_MAC_STATE_OUT_LOCAL 0x0</div><div class='add'>+/* enum: Indicates a remote MAC fault. */</div><div class='add'>+#define          MC_CMD_MAC_STATE_OUT_REMOTE 0x1</div><div class='add'>+/* enum: Indicates a pending reconfiguration of the MAC. */</div><div class='add'>+#define          MC_CMD_MAC_STATE_OUT_PENDING_RECONFIG 0x2</div><div class='add'>+/* The flags that were used to configure the MAC. This is a copy of the FLAGS</div><div class='add'>+ * field in the MC_CMD_MAC_CTRL_IN command.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_FLAGS_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_MAC_FLAGS/MASK */</div><div class='add'>+/* The transmission mode that was used to configure the MAC. This is a copy of</div><div class='add'>+ * the TRANSMISSION_MODE field in the MC_CMD_MAC_CTRL_IN command.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_TRANSMISSION_MODE_OFST 24</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_TRANSMISSION_MODE_LEN 4</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_TRANSMISSION_MODE/MASK */</div><div class='add'>+/* The control flags that were used to configure the MAC. This is a copy of the</div><div class='add'>+ * CONTROL field in the MC_CMD_MAC_CTRL_IN command.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_CONTROL_FLAGS_OFST 28</div><div class='add'>+#define       MC_CMD_MAC_STATE_OUT_CONTROL_FLAGS_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_MAC_CONFIG_OPTIONS/MASK */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_GET_ASSIGNED_PORT_HANDLE</div><div class='add'>+ * Obtain a handle that can be operated on to configure and query the status of</div><div class='add'>+ * the link. ENOENT is returned when no port is assigned to the client. Return</div><div class='add'>+ * code: 0, ENOENT</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_GET_ASSIGNED_PORT_HANDLE 0x1e2</div><div class='add'>+#undef MC_CMD_0x1e2_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1e2_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_ASSIGNED_PORT_HANDLE_IN msgrequest */</div><div class='add'>+#define    MC_CMD_GET_ASSIGNED_PORT_HANDLE_IN_LEN 0</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT_LEN 4</div><div class='add'>+/* Handle for assigned port. */</div><div class='add'>+#define       MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_GET_ASSIGNED_PORT_HANDLE_OUT_PORT_HANDLE_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_STAT_ID structuredef */</div><div class='add'>+#define    MC_CMD_STAT_ID_LEN 4</div><div class='add'>+#define       MC_CMD_STAT_ID_SOURCE_ID_OFST 0</div><div class='add'>+#define       MC_CMD_STAT_ID_SOURCE_ID_LEN 2</div><div class='add'>+/* enum property: index */</div><div class='add'>+/* enum: Internal markers (generation start and end markers) */</div><div class='add'>+#define          MC_CMD_STAT_ID_MARKER 0x1</div><div class='add'>+/* enum: Network port MAC statistics. */</div><div class='add'>+#define          MC_CMD_STAT_ID_MAC 0x2</div><div class='add'>+/* enum: Network port PHY statistics. */</div><div class='add'>+#define          MC_CMD_STAT_ID_PHY 0x3</div><div class='add'>+#define       MC_CMD_STAT_ID_SOURCE_ID_LBN 0</div><div class='add'>+#define       MC_CMD_STAT_ID_SOURCE_ID_WIDTH 16</div><div class='add'>+#define       MC_CMD_STAT_ID_MARKER_STAT_ID_OFST 2</div><div class='add'>+#define       MC_CMD_STAT_ID_MARKER_STAT_ID_LEN 2</div><div class='add'>+/* enum property: index */</div><div class='add'>+/* enum: This value is used to mark the start of a generation of statistics for</div><div class='add'>+ * DMA synchronization. It is incremented whenever a new set of statistics is</div><div class='add'>+ * transferred. Always the first entry in the DMA buffer.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_STAT_ID_GENERATION_START 0x1</div><div class='add'>+/* enum: This value is used to mark the end of a generation of statistics for</div><div class='add'>+ * DMA synchronizaion. Always the last entry in the DMA buffer and set to the</div><div class='add'>+ * same value as GENERATION_START. The host driver must compare the</div><div class='add'>+ * GENERATION_START and GENERATION_END values to verify that the DMA buffer is</div><div class='add'>+ * consistent upon copying the the DMA buffer. If they do not match, it means</div><div class='add'>+ * that new DMA transfer has started while the host driver was copying the DMA</div><div class='add'>+ * buffer. In this case, the host driver must repeat the copy operation.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_STAT_ID_GENERATION_END 0x2</div><div class='add'>+#define       MC_CMD_STAT_ID_MARKER_STAT_ID_LBN 16</div><div class='add'>+#define       MC_CMD_STAT_ID_MARKER_STAT_ID_WIDTH 16</div><div class='add'>+#define       MC_CMD_STAT_ID_MAC_STAT_ID_OFST 2</div><div class='add'>+#define       MC_CMD_STAT_ID_MAC_STAT_ID_LEN 2</div><div class='add'>+/* enum property: index */</div><div class='add'>+/* enum: Total number of packets transmitted (includes pause frames). */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_PKTS 0x1</div><div class='add'>+/* enum: Pause frames transmitted. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_PAUSE_PKTS 0x2</div><div class='add'>+/* enum: Control frames transmitted. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_CONTROL_PKTS 0x3</div><div class='add'>+/* enum: Unicast packets transmitted (includes pause frames). */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_UNICAST_PKTS 0x4</div><div class='add'>+/* enum: Multicast packets transmitted (includes pause frames). */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_MULTICAST_PKTS 0x5</div><div class='add'>+/* enum: Broadcast packets transmitted (includes pause frames). */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_BROADCAST_PKTS 0x6</div><div class='add'>+/* enum: Bytes transmitted (includes pause frames). */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_BYTES 0x7</div><div class='add'>+/* enum: Bytes transmitted with bad CRC. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_BAD_BYTES 0x8</div><div class='add'>+/* enum: Bytes transmitted with good CRC. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_GOOD_BYTES 0x9</div><div class='add'>+/* enum: Packets transmitted with length less than 64 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_LT64_PKTS 0xa</div><div class='add'>+/* enum: Packets transmitted with length equal to 64 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_64_PKTS 0xb</div><div class='add'>+/* enum: Packets transmitted with length between 65 and 127 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_65_TO_127_PKTS 0xc</div><div class='add'>+/* enum: Packets transmitted with length between 128 and 255 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_128_TO_255_PKTS 0xd</div><div class='add'>+/* enum: Packets transmitted with length between 256 and 511 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_256_TO_511_PKTS 0xe</div><div class='add'>+/* enum: Packets transmitted with length between 512 and 1023 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_512_TO_1023_PKTS 0xf</div><div class='add'>+/* enum: Packets transmitted with length between 1024 and 1518 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_1024_TO_15XX_PKTS 0x10</div><div class='add'>+/* enum: Packets transmitted with length between 1519 and 9216 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_15XX_TO_JUMBO_PKTS 0x11</div><div class='add'>+/* enum: Packets transmitted with length greater than 9216 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_GTJUMBO_PKTS 0x12</div><div class='add'>+/* enum: Packets transmitted with bad FCS. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_BAD_FCS_PKTS 0x13</div><div class='add'>+/* enum: Packets transmitted with good FCS. */</div><div class='add'>+#define          MC_CMD_STAT_ID_TX_GOOD_FCS_PKTS 0x14</div><div class='add'>+/* enum: Packets received. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_PKTS 0x15</div><div class='add'>+/* enum: Pause frames received. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_PAUSE_PKTS 0x16</div><div class='add'>+/* enum: Total number of good packets received. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_GOOD_PKTS 0x17</div><div class='add'>+/* enum: Total number of BAD packets received. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_BAD_PKTS 0x18</div><div class='add'>+/* enum: Total number of control frames received. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_CONTROL_PKTS 0x19</div><div class='add'>+/* enum: Total number of unicast packets received. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_UNICAST_PKTS 0x1a</div><div class='add'>+/* enum: Total number of multicast packets received. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_MULTICAST_PKTS 0x1b</div><div class='add'>+/* enum: Total number of broadcast packets received. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_BROADCAST_PKTS 0x1c</div><div class='add'>+/* enum: Total number of bytes received. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_BYTES 0x1d</div><div class='add'>+/* enum: Total number of bytes received with bad CRC. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_BAD_BYTES 0x1e</div><div class='add'>+/* enum: Total number of bytes received with GOOD CRC. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_GOOD_BYTES 0x1f</div><div class='add'>+/* enum: Packets received with length equal to 64 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_64_PKTS 0x20</div><div class='add'>+/* enum: Packets received with length between 65 and 127 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_65_TO_127_PKTS 0x21</div><div class='add'>+/* enum: Packets received with length between 128 and 255 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_128_TO_255_PKTS 0x22</div><div class='add'>+/* enum: Packets received with length between 256 and 511 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_256_TO_511_PKTS 0x23</div><div class='add'>+/* enum: Packets received with length between 512 and 1023 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_512_TO_1023_PKTS 0x24</div><div class='add'>+/* enum: Packets received with length between 1024 and 1518 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_1024_TO_15XX_PKTS 0x25</div><div class='add'>+/* enum: Packets received with length between 1519 and 9216 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_15XX_TO_JUMBO_PKTS 0x26</div><div class='add'>+/* enum: Packets received with length greater than 9216 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_GTJUMBO_PKTS 0x27</div><div class='add'>+/* enum: Packets received with length less than 64 bytes. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_UNDERSIZE_PKTS 0x28</div><div class='add'>+/* enum: Packets received with bad FCS. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_BAD_FCS_PKTS 0x29</div><div class='add'>+/* enum: Packets received with GOOD FCS. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_GOOD_FCS_PKTS 0x2a</div><div class='add'>+/* enum: Packets received with overflow. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_OVERFLOW_PKTS 0x2b</div><div class='add'>+/* enum: Packets received with symbol error. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_SYMBOL_ERROR_PKTS 0x2c</div><div class='add'>+/* enum: Packets received with alignment error. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_ALIGN_ERROR_PKTS 0x2d</div><div class='add'>+/* enum: Packets received with length error. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_LENGTH_ERROR_PKTS 0x2e</div><div class='add'>+/* enum: Packets received with internal error. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_INTERNAL_ERROR_PKTS 0x2f</div><div class='add'>+/* enum: Packets received with jabber. These packets are larger than the</div><div class='add'>+ * allowed maximum receive unit (MRU). This indicates that a packet either has</div><div class='add'>+ * a bad CRC or has an RX error.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_JABBER_PKTS 0x30</div><div class='add'>+/* enum: Packets dropped due to having no descriptor. This is a datapath stat</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_NODESC_DROPS 0x31</div><div class='add'>+/* enum: Packets received with lanes 0 and 1 character error. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_LANES01_CHAR_ERR 0x32</div><div class='add'>+/* enum: Packets received with lanes 2 and 3 character error. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_LANES23_CHAR_ERR 0x33</div><div class='add'>+/* enum: Packets received with lanes 0 and 1 disparity error. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_LANES01_DISP_ERR 0x34</div><div class='add'>+/* enum: Packets received with lanes 2 and 3 disparity error. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_LANES23_DISP_ERR 0x35</div><div class='add'>+/* enum: Packets received with match fault. */</div><div class='add'>+#define          MC_CMD_STAT_ID_RX_MATCH_FAULT 0x36</div><div class='add'>+#define       MC_CMD_STAT_ID_MAC_STAT_ID_LBN 16</div><div class='add'>+#define       MC_CMD_STAT_ID_MAC_STAT_ID_WIDTH 16</div><div class='add'>+/* Include FEC stats. */</div><div class='add'>+#define       MC_CMD_STAT_ID_PHY_STAT_ID_OFST 2</div><div class='add'>+#define       MC_CMD_STAT_ID_PHY_STAT_ID_LEN 2</div><div class='add'>+/* enum property: index */</div><div class='add'>+/* enum: Number of uncorrected FEC codewords on link (RS-FEC only from Medford2</div><div class='add'>+ * onwards)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_STAT_ID_FEC_UNCORRECTED_ERRORS 0x1</div><div class='add'>+/* enum: Number of corrected FEC codewords on link (RS-FEC only from Medford2</div><div class='add'>+ * onwards)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_STAT_ID_FEC_CORRECTED_ERRORS 0x2</div><div class='add'>+/* enum: Number of corrected 10-bit symbol errors, lane 0 (RS-FEC only) */</div><div class='add'>+#define          MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE0 0x3</div><div class='add'>+/* enum: Number of corrected 10-bit symbol errors, lane 1 (RS-FEC only) */</div><div class='add'>+#define          MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE1 0x4</div><div class='add'>+/* enum: Number of corrected 10-bit symbol errors, lane 2 (RS-FEC only) */</div><div class='add'>+#define          MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE2 0x5</div><div class='add'>+/* enum: Number of corrected 10-bit symbol errors, lane 3 (RS-FEC only) */</div><div class='add'>+#define          MC_CMD_STAT_ID_FEC_CORRECTED_SYMBOLS_LANE3 0x6</div><div class='add'>+#define       MC_CMD_STAT_ID_PHY_STAT_ID_LBN 16</div><div class='add'>+#define       MC_CMD_STAT_ID_PHY_STAT_ID_WIDTH 16</div><div class='add'>+</div><div class='add'>+/* MC_CMD_STAT_DESC structuredef: Structure describing the layout and size of</div><div class='add'>+ * the stats DMA buffer descriptor.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_STAT_DESC_LEN 8</div><div class='add'>+/* Unique identifier of the statistic. Formatted as MC_CMD_STAT_ID */</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_OFST 0</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_LEN 4</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_LBN 0</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_WIDTH 32</div><div class='add'>+/* See structuredef: MC_CMD_STAT_ID */</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_OFST 0</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_LEN 2</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_LBN 0</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_SOURCE_ID_WIDTH 16</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_OFST 2</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_LEN 2</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_LBN 16</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_MARKER_STAT_ID_WIDTH 16</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_OFST 2</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_LEN 2</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_LBN 16</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_MAC_STAT_ID_WIDTH 16</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_OFST 2</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_LEN 2</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_LBN 16</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_ID_PHY_STAT_ID_WIDTH 16</div><div class='add'>+/* Index of the statistic in the DMA buffer. */</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_INDEX_OFST 4</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_INDEX_LEN 2</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_INDEX_LBN 32</div><div class='add'>+#define       MC_CMD_STAT_DESC_STAT_INDEX_WIDTH 16</div><div class='add'>+/* Reserved for future extension (e.g. flags field) - currently always 0. */</div><div class='add'>+#define       MC_CMD_STAT_DESC_RESERVED_OFST 6</div><div class='add'>+#define       MC_CMD_STAT_DESC_RESERVED_LEN 2</div><div class='add'>+#define       MC_CMD_STAT_DESC_RESERVED_LBN 48</div><div class='add'>+#define       MC_CMD_STAT_DESC_RESERVED_WIDTH 16</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_MAC_STATISTICS_DESCRIPTOR</div><div class='add'>+ * Get a list of descriptors that describe the layout and size of the stats</div><div class='add'>+ * buffer required for retrieving statistics for a given port. Each entry in</div><div class='add'>+ * the list is formatted as MC_CMD_STAT_DESC and provides the ID of each stat</div><div class='add'>+ * and its location and size in the buffer. It also gives the overall minimum</div><div class='add'>+ * size of the DMA buffer required when DMA mode is used. Note that the first</div><div class='add'>+ * and last entries in the list are reserved for the generation start</div><div class='add'>+ * (MC_CMD_MARKER_STAT_GENERATION_START) and end</div><div class='add'>+ * (MC_CMD_MARKER_STAT_GENERATION_END) markers respectively, to be used for DMA</div><div class='add'>+ * synchronisation as described in the documentation for the relevant enum</div><div class='add'>+ * entries. The entries are present in the buffer even if DMA mode is not used.</div><div class='add'>+ * Provisions are made (but currently unused) for extending the size of the</div><div class='add'>+ * descriptors, extending the size of the list beyond the maximum MCDI response</div><div class='add'>+ * size, as well as the dynamic runtime updates of the list. Returns: 0 on</div><div class='add'>+ * success, ENOENT on non-existent port handle</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_MAC_STATISTICS_DESCRIPTOR 0x1e3</div><div class='add'>+#undef MC_CMD_0x1e3_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1e3_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN msgrequest */</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_LEN 8</div><div class='add'>+/* Handle of port to get MAC statitstics descriptors for. */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_PORT_HANDLE_LEN 4</div><div class='add'>+/* Offset of the first entry to return, for cases where not all entries fit in</div><div class='add'>+ * the MCDI response. Should be set to 0 on initial request, and on subsequent</div><div class='add'>+ * requests updated by the number of entries already returned, as long as the</div><div class='add'>+ * MORE_ENTRIES flag is set.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_OFFSET_OFST 4</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_IN_OFFSET_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LENMIN 28</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LENMAX 252</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LENMAX_MCDI2 1020</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_LEN(num) (20+8*(num))</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_NUM(len) (((len)-20)/8)</div><div class='add'>+/* Generation number of the stats buffer. This is incremented each time the</div><div class='add'>+ * buffer is updated, and is used to verify the consistency of the buffer</div><div class='add'>+ * contents. Reserved for future extension (dynamic list updates). Currently</div><div class='add'>+ * always set to 0.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_GENERATION_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_GENERATION_LEN 4</div><div class='add'>+/* Minimum size of the DMA buffer required to retrieve all statistics for the</div><div class='add'>+ * port. This is the sum of the sizes of all the statistics, plus the size of</div><div class='add'>+ * the generation markers. Minimum buffer size in bytes required to fit all</div><div class='add'>+ * statistics. Drivers will typically round up this value to the granularity of</div><div class='add'>+ * the host DMA allocation units.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_DMA_BUFFER_SIZE_OFST 4</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_DMA_BUFFER_SIZE_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_FLAGS_OFST 8</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_FLAGS_LEN 4</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_MORE_ENTRIES_OFST 8</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_MORE_ENTRIES_LBN 0</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_MORE_ENTRIES_WIDTH 1</div><div class='add'>+/* Size of the individual descriptor entry in the list. Determines the entry</div><div class='add'>+ * stride in the list. Currently always set to size of MC_CMD_STAT_DESC, larger</div><div class='add'>+ * values can be used in the future for extending the descriptor, by appending</div><div class='add'>+ * new data to the end of the existing structure.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_SIZE_OFST 12</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_SIZE_LEN 4</div><div class='add'>+/* Number of entries returned in the descriptor list. */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_COUNT_OFST 16</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRY_COUNT_LEN 4</div><div class='add'>+/* List of descriptors. Each entry is formatted as MC_CMD_STAT_DESC and</div><div class='add'>+ * provides the ID of each stat and its location and size in the buffer. The</div><div class='add'>+ * first and last entries are reserved for the generation start and end markers</div><div class='add'>+ * respectively.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LEN 8</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_OFST 20</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_LBN 160</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_OFST 24</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_LBN 192</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_HI_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_MINNUM 1</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_MAXNUM 29</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_DESCRIPTOR_OUT_ENTRIES_MAXNUM_MCDI2 125</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_MAC_STATISTICS</div><div class='add'>+ * Get generic MAC statistics. This call retrieves unified statistics managed</div><div class='add'>+ * by the MC. The MC will populate and provide all supported statistics in the</div><div class='add'>+ * format as returned by MC_CMD_MAC_STATISTICS_DESCRIPTOR. Refer to the</div><div class='add'>+ * aforementioned command for the format and contents of the stats DMA buffer.</div><div class='add'>+ * To ensure consistent and accurate results, it is essential for the driver to</div><div class='add'>+ * initialize the DMA buffer with zeros when DMA mode is used. Returns: 0 on</div><div class='add'>+ * success, ETIME if the DMA buffer is not ready, ENOENT on non-existent port</div><div class='add'>+ * handle, and EINVAL on invalid parameters (DMA buffer too small)</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_MAC_STATISTICS 0x1e4</div><div class='add'>+#undef MC_CMD_0x1e4_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1e4_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_STATISTICS_IN msgrequest */</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_IN_LEN 20</div><div class='add'>+/* Handle of port to get MAC statistics for. */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_PORT_HANDLE_LEN 4</div><div class='add'>+/* Contains options for querying the MAC statistics. */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_CMD_OFST 4</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_CMD_LEN 4</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_DMA_OFST 4</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_DMA_LBN 0</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_DMA_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_CLEAR_OFST 4</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_CLEAR_LBN 1</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_CLEAR_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIODIC_CHANGE_OFST 4</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIODIC_CHANGE_LBN 2</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIODIC_CHANGE_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIODIC_ENABLE_OFST 4</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIODIC_ENABLE_LBN 3</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIODIC_ENABLE_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIODIC_NOEVENT_OFST 4</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIODIC_NOEVENT_LBN 4</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIODIC_NOEVENT_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIOD_MS_OFST 4</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIOD_MS_LBN 16</div><div class='add'>+#define        MC_CMD_MAC_STATISTICS_IN_PERIOD_MS_WIDTH 16</div><div class='add'>+/* This is the address of the DMA buffer to use for transfer of the statistics.</div><div class='add'>+ * Only valid if the DMA flag is set to 1.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_OFST 8</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LEN 8</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_OFST 8</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_LBN 64</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_OFST 12</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_LBN 96</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_ADDR_HI_WIDTH 32</div><div class='add'>+/* This is the length of the DMA buffer to use for the transfer of the</div><div class='add'>+ * statistics. The buffer should be at least DMA_BUFFER_SIZE long, as returned</div><div class='add'>+ * by MC_CMD_MAC_STATISTICS_DESCRIPTOR. If the supplied buffer is too small,</div><div class='add'>+ * the command will fail with EINVAL. Only valid if the DMA flag is set to 1.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_LEN_OFST 16</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_IN_DMA_LEN_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_MAC_STATISTICS_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_OUT_LENMIN 5</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_OUT_LENMAX 252</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_OUT_LENMAX_MCDI2 1020</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_OUT_LEN(num) (4+1*(num))</div><div class='add'>+#define    MC_CMD_MAC_STATISTICS_OUT_DATA_NUM(len) (((len)-4)/1)</div><div class='add'>+/* length of the data in bytes */</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_OUT_DATALEN_OFST 0</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_OUT_DATALEN_LEN 4</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_OUT_DATA_OFST 4</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_OUT_DATA_LEN 1</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_OUT_DATA_MINNUM 1</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_OUT_DATA_MAXNUM 248</div><div class='add'>+#define       MC_CMD_MAC_STATISTICS_OUT_DATA_MAXNUM_MCDI2 1016</div><div class='add'>+</div><div class='add'>+/* NET_PORT_HANDLE_DESC structuredef: Network port descriptor containing a port</div><div class='add'>+ * handle and attributes used, for example, in MC_CMD_ENUM_PORTS.</div><div class='add'>+ */</div><div class='add'>+#define    NET_PORT_HANDLE_DESC_LEN 53</div><div class='add'>+/* The handle to identify the port */</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_HANDLE_OFST 0</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_HANDLE_LEN 4</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_HANDLE_LBN 0</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_HANDLE_WIDTH 32</div><div class='add'>+/* Includes the type of port e.g. physical, virtual or MAE MPORT and other</div><div class='add'>+ * properties relevant to the port.</div><div class='add'>+ */</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_OFST 4</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LEN 8</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_OFST 4</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_LEN 4</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_LBN 32</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LO_WIDTH 32</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_OFST 8</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_LEN 4</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_LBN 64</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_HI_WIDTH 32</div><div class='add'>+#define        NET_PORT_HANDLE_DESC_PORT_TYPE_OFST 4</div><div class='add'>+#define        NET_PORT_HANDLE_DESC_PORT_TYPE_LBN 0</div><div class='add'>+#define        NET_PORT_HANDLE_DESC_PORT_TYPE_WIDTH 3</div><div class='add'>+#define          NET_PORT_HANDLE_DESC_PHYSICAL 0x0 /* enum */</div><div class='add'>+#define          NET_PORT_HANDLE_DESC_VIRTUAL 0x1 /* enum */</div><div class='add'>+#define          NET_PORT_HANDLE_DESC_MPORT 0x2 /* enum */</div><div class='add'>+#define        NET_PORT_HANDLE_DESC_IS_ZOMBIE_OFST 4</div><div class='add'>+#define        NET_PORT_HANDLE_DESC_IS_ZOMBIE_LBN 8</div><div class='add'>+#define        NET_PORT_HANDLE_DESC_IS_ZOMBIE_WIDTH 1</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_LBN 32</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_PROPERTIES_WIDTH 64</div><div class='add'>+/* The dynamic change that led to the port enumeration */</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_ENTRY_SRC_OFST 12</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_ENTRY_SRC_LEN 1</div><div class='add'>+/* enum: Indicates that the ENTRY_SRC field has not been initialized. */</div><div class='add'>+#define          NET_PORT_HANDLE_DESC_UNKNOWN 0x0</div><div class='add'>+/* enum: The port was enumerated at start of day. */</div><div class='add'>+#define          NET_PORT_HANDLE_DESC_PRESENT 0x1</div><div class='add'>+/* enum: The port was dynamically added. */</div><div class='add'>+#define          NET_PORT_HANDLE_DESC_ADDED 0x2</div><div class='add'>+/* enum: The port was dynamically deleted. */</div><div class='add'>+#define          NET_PORT_HANDLE_DESC_DELETED 0x3</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_ENTRY_SRC_LBN 96</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_ENTRY_SRC_WIDTH 8</div><div class='add'>+/* This is an opaque 40 byte label exposed to users as a unique identifier of</div><div class='add'>+ * the port. It is represented as a zero-terminated ASCII string and assigned</div><div class='add'>+ * by the port administrator which is typically either the firmware for a</div><div class='add'>+ * physical port or the host software responsible for creating the virtual</div><div class='add'>+ * port. The label is conveyed to the driver after assignment, which, unlike</div><div class='add'>+ * the port administrator, does not need to know how to interpret the label.</div><div class='add'>+ */</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_LABEL_OFST 13</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_LABEL_LEN 40</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_LABEL_LBN 104</div><div class='add'>+#define       NET_PORT_HANDLE_DESC_PORT_LABEL_WIDTH 320</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_ENUM_PORTS</div><div class='add'>+ * This command returns handles for all ports present in the system. The PCIe</div><div class='add'>+ * function type of each port (either physical or virtual) is also reported.</div><div class='add'>+ * After a start-of-day port enumeration, firmware keeps track of all available</div><div class='add'>+ * ports upon creation or deletion and updates the ports if there is a change.</div><div class='add'>+ * This command is cleared after a control interface reset (e.g. FLR,</div><div class='add'>+ * ENTITY_RESET), in which case it must be called again to reenumerate the</div><div class='add'>+ * ports. The command is also clear-on-read and repeated calls will drain the</div><div class='add'>+ * buffer.</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_ENUM_PORTS 0x1e5</div><div class='add'>+#undef MC_CMD_0x1e5_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1e5_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_ENUM_PORTS_IN msgrequest */</div><div class='add'>+#define    MC_CMD_ENUM_PORTS_IN_LEN 0</div><div class='add'>+</div><div class='add'>+/* MC_CMD_ENUM_PORTS_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_ENUM_PORTS_OUT_LENMIN 12</div><div class='add'>+#define    MC_CMD_ENUM_PORTS_OUT_LENMAX 252</div><div class='add'>+#define    MC_CMD_ENUM_PORTS_OUT_LENMAX_MCDI2 1020</div><div class='add'>+#define    MC_CMD_ENUM_PORTS_OUT_LEN(num) (12+1*(num))</div><div class='add'>+#define    MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_NUM(len) (((len)-12)/1)</div><div class='add'>+/* Any unused flags are reserved and must be ignored. */</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_FLAGS_OFST 0</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_FLAGS_LEN 4</div><div class='add'>+#define        MC_CMD_ENUM_PORTS_OUT_MORE_OFST 0</div><div class='add'>+#define        MC_CMD_ENUM_PORTS_OUT_MORE_LBN 0</div><div class='add'>+#define        MC_CMD_ENUM_PORTS_OUT_MORE_WIDTH 1</div><div class='add'>+/* The number of NET_PORT_HANDLE_DESC structures in PORT_HANDLES. */</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_COUNT_OFST 4</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_COUNT_LEN 4</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_SIZEOF_NET_PORT_HANDLE_DESC_OFST 8</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_SIZEOF_NET_PORT_HANDLE_DESC_LEN 4</div><div class='add'>+/* Array of NET_PORT_HANDLE_DESC structures. Callers must use must use the</div><div class='add'>+ * SIZEOF_NET_PORT_HANDLE_DESC field field as the array stride between entries.</div><div class='add'>+ * This may also allow for tail padding for alignment. Fields beyond</div><div class='add'>+ * SIZEOF_NET_PORT_HANDLE_DESC are not present.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_OFST 12</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_LEN 1</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_MINNUM 0</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_MAXNUM 240</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_MAXNUM_MCDI2 1008</div><div class='add'>+/* See structuredef: NET_PORT_HANDLE_DESC */</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_HANDLE_OFST 12</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_HANDLE_LEN 4</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_OFST 16</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LEN 8</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_OFST 16</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_LEN 4</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_LBN 128</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_OFST 20</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_LEN 4</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_LBN 160</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_PROPERTIES_HI_WIDTH 32</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_TYPE_LBN 128</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_TYPE_WIDTH 3</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_IS_ZOMBIE_LBN 136</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_IS_ZOMBIE_WIDTH 1</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_ENTRY_SRC_OFST 24</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_ENTRY_SRC_LEN 1</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_LABEL_OFST 25</div><div class='add'>+#define       MC_CMD_ENUM_PORTS_OUT_PORT_HANDLES_PORT_LABEL_LEN 40</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_GET_TRANSCEIVER_PROPERTIES</div><div class='add'>+ * Read properties of the transceiver associated with the port. Can be either</div><div class='add'>+ * for a fixed onboard transceiver or an inserted module. The returned data is</div><div class='add'>+ * interpreted from the transceiver hardware and may be fixed up by the</div><div class='add'>+ * firmware. Use MC_CMD_GET_MODULE_DATA to get raw undecoded data.</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_GET_TRANSCEIVER_PROPERTIES 0x1e6</div><div class='add'>+#undef MC_CMD_0x1e6_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1e6_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN msgrequest */</div><div class='add'>+#define    MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN_LEN 4</div><div class='add'>+/* Handle to port to get transceiver properties from. */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_IN_PORT_HANDLE_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_LEN 89</div><div class='add'>+/* Supported technology abilities. */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_TECH_ABILITIES_MASK_OFST 0</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_TECH_ABILITIES_MASK_LEN 16</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_ETH_TECH/TECH */</div><div class='add'>+/* Reserved for future expansion to accommodate future Ethernet technology</div><div class='add'>+ * expansion.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_RESERVED_OFST 16</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_RESERVED_LEN 16</div><div class='add'>+/* Preferred FEC modes. This is a function of the cable type and length. */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PREFERRED_FEC_MASK_OFST 32</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PREFERRED_FEC_MASK_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               FEC_TYPE/TYPE */</div><div class='add'>+/* SFF-8042 code reported by the module. */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_CODE_OFST 36</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_CODE_LEN 2</div><div class='add'>+/* Medium. */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIUM_OFST 38</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIUM_LEN 1</div><div class='add'>+/* enum property: value */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_UNKNOWN 0x0 /* enum */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_COPPER 0x1 /* enum */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_OPTICAL 0x2 /* enum */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_BACKPLANE 0x3 /* enum */</div><div class='add'>+/* Identifies the tech */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIA_SUBTYPE_OFST 39</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_MEDIA_SUBTYPE_LEN 1</div><div class='add'>+/* enum property: value */</div><div class='add'>+/*               MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_UNKNOWN 0x0 */</div><div class='add'>+/* enum: Ethernet over twisted-pair copper cables for distances up to 100</div><div class='add'>+ * meters.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_BASET 0x1</div><div class='add'>+/* enum: Ethernet over twin-axial, balanced copper cable. */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_CR 0x2</div><div class='add'>+/* enum: Ethernet over backplane for connections on the same board. */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_KX 0x3</div><div class='add'>+/* enum: Ethernet over a single backplane lane for connections between</div><div class='add'>+ * different boards.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_KR 0x4</div><div class='add'>+/* enum: Ethernet over copper backplane. */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_KP 0x5</div><div class='add'>+/* enum: Ethernet over fiber optic. */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_BASEX 0x6</div><div class='add'>+/* enum: Short range ethernet over multimode fiber optic (See IEEE 802.3 Clause</div><div class='add'>+ * 49 and 52).</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SR 0x7</div><div class='add'>+/* enum: Long range, extended range or far reach ethernet used with single mode</div><div class='add'>+ * fiber optics.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_LR_ER_FR 0x8</div><div class='add'>+/* enum: Long reach multimode ethernet over multimode optical fiber. */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_LRM 0x9</div><div class='add'>+/* enum: Very short reach PAM4 ethernet over multimode optical fiber (see IEEE</div><div class='add'>+ * 802.3db).</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VR 0xa</div><div class='add'>+/* enum: BASE-R encoding and PAM4 over single-mode fiber with reach up to at</div><div class='add'>+ * least 500 meters (803.2 Clause 121 and 124)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_DR 0xb</div><div class='add'>+/* String of the vendor name as intepreted by NMC firmware. NMC firmware</div><div class='add'>+ * applies workarounds for known buggy transceivers. The vendor name is</div><div class='add'>+ * presented as 16 bytes of ASCII characters padded with spaces. It can also be</div><div class='add'>+ * represented as 16 bytes of zeros if the field is unspecified for the</div><div class='add'>+ * connected module. See SFF-8472/CMIS specifications for details.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_NAME_OFST 40</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_NAME_LEN 1</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_NAME_NUM 16</div><div class='add'>+/* The vendor part number as intepreted by NMC firmware. The field is presented</div><div class='add'>+ * as 16 bytes of ASCII chars padded with spaces. It can also be 16 bytes of</div><div class='add'>+ * zeros if the field is unspecified for the connected module.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_PN_OFST 56</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_PN_LEN 1</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_VENDOR_PN_NUM 16</div><div class='add'>+/* Serial number of the module presented as 16 bytes of ASCII characters padded</div><div class='add'>+ * with spaces. It can also be 16 bytes of zeros if the field is unspecified</div><div class='add'>+ * for the connected module. See SFF-8472/CMIS specifications for details.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SERIAL_NUMBER_OFST 72</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SERIAL_NUMBER_LEN 1</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_SERIAL_NUMBER_NUM 16</div><div class='add'>+/* This reports the number of module changes detected by the NMC firmware. */</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PORT_MODULECHANGE_SEQ_NUM_OFST 88</div><div class='add'>+#define       MC_CMD_GET_TRANSCEIVER_PROPERTIES_OUT_PORT_MODULECHANGE_SEQ_NUM_LEN 1</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_GET_FIXED_PORT_PROPERTIES</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_GET_FIXED_PORT_PROPERTIES 0x1e7</div><div class='add'>+#undef MC_CMD_0x1e7_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1e7_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_FIXED_PORT_PROPERTIES_IN msgrequest: In this context, the port</div><div class='add'>+ * consists of the MAC and the PHY, and excludes any modules inserted into the</div><div class='add'>+ * cage. This information is fixed for a given board but not for a given ASIC.</div><div class='add'>+ * This command reports properties for the port as it is currently configured,</div><div class='add'>+ * and not its hardware capabilities, which can be better than the current</div><div class='add'>+ * configuration.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_GET_FIXED_PORT_PROPERTIES_IN_LEN 4</div><div class='add'>+/* Handle to the port to from which to retreive properties */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_IN_PORT_HANDLE_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_LEN 36</div><div class='add'>+/* Supported capabilities of the port in its current configuration. */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_OFST 0</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_LEN 25</div><div class='add'>+/* See structuredef: MC_CMD_ETH_AN_FIELDS */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_TECH_MASK_OFST 0</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_TECH_MASK_LEN 16</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_MASK_OFST 16</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_MASK_LEN 4</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_REQ_OFST 20</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_FEC_REQ_LEN 4</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_PAUSE_MASK_OFST 24</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_ABILITIES_PAUSE_MASK_LEN 1</div><div class='add'>+/* Number of lanes supported by the port in its current configuration. */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_NUM_LANES_OFST 25</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_NUM_LANES_LEN 1</div><div class='add'>+/* Bitmask of supported loopback modes. Where the response to this command</div><div class='add'>+ * includes the LOOPBACK_MODES_MASK_V2 field, that field should be used in</div><div class='add'>+ * preference to ensure that all available loopback modes are seen.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_LOOPBACK_MODES_MASK_OFST 26</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_LOOPBACK_MODES_MASK_LEN 1</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LOOPBACK_V2/MODE */</div><div class='add'>+/* This field serves as a cage index that uniquely identifies the cage to which</div><div class='add'>+ * the module is connected. This is useful when splitter cables that have</div><div class='add'>+ * multiple ports on a single cage are used.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_INDEX_OFST 27</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_INDEX_LEN 1</div><div class='add'>+/* This bitmask is used to specify the lanes within the cage identified by</div><div class='add'>+ * MDI_INDEX that are allocated to the port.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_LANE_MASK_OFST 28</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MDI_LANE_MASK_LEN 1</div><div class='add'>+/* Maximum frame length supported by the port in its current configuration. */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MAX_FRAME_LEN_OFST 32</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_MAX_FRAME_LEN_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2 msgresponse */</div><div class='add'>+#define    MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LEN 48</div><div class='add'>+/* Supported capabilities of the port in its current configuration. */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_ABILITIES_OFST 0</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_ABILITIES_LEN 25</div><div class='add'>+/* Number of lanes supported by the port in its current configuration. */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_NUM_LANES_OFST 25</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_NUM_LANES_LEN 1</div><div class='add'>+/* Bitmask of supported loopback modes. Where the response to this command</div><div class='add'>+ * includes the LOOPBACK_MODES_MASK_V2 field, that field should be used in</div><div class='add'>+ * preference to ensure that all available loopback modes are seen.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_OFST 26</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_LEN 1</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LOOPBACK_V2/MODE */</div><div class='add'>+/* This field serves as a cage index that uniquely identifies the cage to which</div><div class='add'>+ * the module is connected. This is useful when splitter cables that have</div><div class='add'>+ * multiple ports on a single cage are used.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_INDEX_OFST 27</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_INDEX_LEN 1</div><div class='add'>+/* This bitmask is used to specify the lanes within the cage identified by</div><div class='add'>+ * MDI_INDEX that are allocated to the port.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_LANE_MASK_OFST 28</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MDI_LANE_MASK_LEN 1</div><div class='add'>+/* Maximum frame length supported by the port in its current configuration. */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MAX_FRAME_LEN_OFST 32</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_MAX_FRAME_LEN_LEN 4</div><div class='add'>+/* Bitmask of supported loopback modes. This field replaces the</div><div class='add'>+ * LOOPBACK_MODES_MASK field which is defined under version 1 of this command.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_OFST 40</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LEN 8</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_OFST 40</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_LBN 320</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_OFST 44</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_LBN 352</div><div class='add'>+#define       MC_CMD_GET_FIXED_PORT_PROPERTIES_OUT_V2_LOOPBACK_MODES_MASK_V2_HI_WIDTH 32</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_LOOPBACK_V2/MODE */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_GET_MODULE_DATA</div><div class='add'>+ * Read media-specific data from the PHY (e.g. SFP/SFP+ module ID information</div><div class='add'>+ * for SFP+ PHYs). This command returns raw data from the module's EEPROM and</div><div class='add'>+ * it is not interpreted by the MC. Use MC_CMD_GET_TRANSCEIVER_PROPERTIES to</div><div class='add'>+ * get interpreted data. Return code: 0, ENOENT</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_GET_MODULE_DATA 0x1e8</div><div class='add'>+#undef MC_CMD_0x1e8_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1e8_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_MODULE_DATA_IN msgrequest */</div><div class='add'>+#define    MC_CMD_GET_MODULE_DATA_IN_LEN 16</div><div class='add'>+/* Handle to identify the port from which to request module properties. */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_PORT_HANDLE_LEN 4</div><div class='add'>+/* 7 bit I2C address of the device. DEPRECATED: This field is replaced by</div><div class='add'>+ * MODULE_ADDR in V2. Use V2 of this command for proper alignment and easier</div><div class='add'>+ * access.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_DEVADDR_LBN 32</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_DEVADDR_WIDTH 7</div><div class='add'>+/* 0 if the page does not support banked access, non-zero otherwise. Non-zero</div><div class='add'>+ * BANK is valid if OFFSET is in the range 80h - ffh, i.e. in the Upper Memory</div><div class='add'>+ * region.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_BANK_OFST 6</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_BANK_LEN 2</div><div class='add'>+/* 0 if paged access is not supported, non-zero otherwise. Non-zero PAGE is</div><div class='add'>+ * valid if OFFSET is in the range 80h - ffh.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_PAGE_OFST 8</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_PAGE_LEN 2</div><div class='add'>+/* Offset in the range 00h - 7fh to access lower memory. Offset in the range</div><div class='add'>+ * 80h - ffh to access upper memory</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_OFFSET_OFST 10</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_OFFSET_LEN 1</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_LENGTH_OFST 12</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_LENGTH_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_MODULE_DATA_IN_V2 msgrequest: Updated MC_CMD_GET_MODULE_DATA with</div><div class='add'>+ * 8-bit wide ADDRESSING field. This new field provides a correctly aligned</div><div class='add'>+ * container for the 7-bit DEVADDR field from V1, now renamed MODULE_ADDR, to</div><div class='add'>+ * ensure proper alignment.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_GET_MODULE_DATA_IN_V2_LEN 16</div><div class='add'>+/* Handle to identify the port from which to request module properties. */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_PORT_HANDLE_LEN 4</div><div class='add'>+/* 7 bit I2C address of the device. DEPRECATED: This field is replaced by</div><div class='add'>+ * MODULE_ADDR in V2. Use V2 of this command for proper alignment and easier</div><div class='add'>+ * access.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_DEVADDR_LBN 32</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_DEVADDR_WIDTH 7</div><div class='add'>+/* 0 if the page does not support banked access, non-zero otherwise. Non-zero</div><div class='add'>+ * BANK is valid if OFFSET is in the range 80h - ffh, i.e. in the Upper Memory</div><div class='add'>+ * region.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_BANK_OFST 6</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_BANK_LEN 2</div><div class='add'>+/* 0 if paged access is not supported, non-zero otherwise. Non-zero PAGE is</div><div class='add'>+ * valid if OFFSET is in the range 80h - ffh.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_PAGE_OFST 8</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_PAGE_LEN 2</div><div class='add'>+/* Offset in the range 00h - 7fh to access lower memory. Offset in the range</div><div class='add'>+ * 80h - ffh to access upper memory</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_OFFSET_OFST 10</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_OFFSET_LEN 1</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_LENGTH_OFST 12</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_LENGTH_LEN 4</div><div class='add'>+/* Container for 7 bit I2C addresses. */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_ADDRESSING_OFST 4</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_IN_V2_ADDRESSING_LEN 1</div><div class='add'>+#define        MC_CMD_GET_MODULE_DATA_IN_V2_MODULE_ADDR_OFST 4</div><div class='add'>+#define        MC_CMD_GET_MODULE_DATA_IN_V2_MODULE_ADDR_LBN 0</div><div class='add'>+#define        MC_CMD_GET_MODULE_DATA_IN_V2_MODULE_ADDR_WIDTH 7</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_MODULE_DATA_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_GET_MODULE_DATA_OUT_LENMIN 5</div><div class='add'>+#define    MC_CMD_GET_MODULE_DATA_OUT_LENMAX 252</div><div class='add'>+#define    MC_CMD_GET_MODULE_DATA_OUT_LENMAX_MCDI2 1020</div><div class='add'>+#define    MC_CMD_GET_MODULE_DATA_OUT_LEN(num) (4+1*(num))</div><div class='add'>+#define    MC_CMD_GET_MODULE_DATA_OUT_DATA_NUM(len) (((len)-4)/1)</div><div class='add'>+/* length of the data in bytes */</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_OUT_DATALEN_OFST 0</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_OUT_DATALEN_LEN 4</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_OUT_DATA_OFST 4</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_OUT_DATA_LEN 1</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_OUT_DATA_MINNUM 1</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_OUT_DATA_MAXNUM 248</div><div class='add'>+#define       MC_CMD_GET_MODULE_DATA_OUT_DATA_MAXNUM_MCDI2 1016</div><div class='add'>+</div><div class='add'>+/* EVENT_MASK structuredef */</div><div class='add'>+#define    EVENT_MASK_LEN 4</div><div class='add'>+#define       EVENT_MASK_TYPE_OFST 0</div><div class='add'>+#define       EVENT_MASK_TYPE_LEN 4</div><div class='add'>+/* enum: PORT_LINKCHANGE event is enabled */</div><div class='add'>+#define          EVENT_MASK_PORT_LINKCHANGE 0x0</div><div class='add'>+/* enum: PORT_MODULECHANGE event is enabled */</div><div class='add'>+#define          EVENT_MASK_PORT_MODULECHANGE 0x1</div><div class='add'>+#define       EVENT_MASK_TYPE_LBN 0</div><div class='add'>+#define       EVENT_MASK_TYPE_WIDTH 32</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_SET_NETPORT_EVENTS_MASK</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_SET_NETPORT_EVENTS_MASK 0x1e9</div><div class='add'>+#undef MC_CMD_0x1e9_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1e9_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_SET_NETPORT_EVENTS_MASK_IN msgrequest: Enable or disable delivery of</div><div class='add'>+ * specified network port events for a given port identified by PORT_HANDLE. At</div><div class='add'>+ * start of day, or after any control interface reset (FLR, ENTITY_RESET,</div><div class='add'>+ * etc.), all event delivery is disabled for all ports associated with the</div><div class='add'>+ * control interface.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_SET_NETPORT_EVENTS_MASK_IN_LEN 8</div><div class='add'>+/* Handle to port to set event delivery mask. */</div><div class='add'>+#define       MC_CMD_SET_NETPORT_EVENTS_MASK_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_SET_NETPORT_EVENTS_MASK_IN_PORT_HANDLE_LEN 4</div><div class='add'>+/* Bitmask of events to enable. Event delivery is enabled when corresponding</div><div class='add'>+ * bit is 1, disabled when 0.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_SET_NETPORT_EVENTS_MASK_IN_EVENT_MASK_OFST 4</div><div class='add'>+#define       MC_CMD_SET_NETPORT_EVENTS_MASK_IN_EVENT_MASK_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               EVENT_MASK/TYPE */</div><div class='add'>+</div><div class='add'>+/* MC_CMD_SET_NETPORT_EVENTS_MASK_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_SET_NETPORT_EVENTS_MASK_OUT_LEN 0</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_EVENT_CTRL</div><div class='del'>- * Configure which categories of unsolicited events the driver expects to</div><div class='del'>- * receive (Riverhead).</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_EVENT_CTRL 0x69</div><div class='del'>-#undef MC_CMD_0x69_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x69_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_EVENT_CTRL_IN msgrequest */</div><div class='del'>-#define    MC_CMD_EVENT_CTRL_IN_LENMIN 0</div><div class='del'>-#define    MC_CMD_EVENT_CTRL_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_EVENT_CTRL_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_EVENT_CTRL_IN_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_NUM(len) (((len)-0)/4)</div><div class='del'>-/* Array of event categories for which the driver wishes to receive events. */</div><div class='del'>-#define       MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_OFST 0</div><div class='del'>-#define       MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_LEN 4</div><div class='del'>-#define       MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MINNUM 0</div><div class='del'>-#define       MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MAXNUM 63</div><div class='del'>-#define       MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_MAXNUM_MCDI2 255</div><div class='del'>-/* enum: Driver wishes to receive LINKCHANGE events. */</div><div class='del'>-#define          MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_LINKCHANGE 0x0</div><div class='del'>-/* enum: Driver wishes to receive SENSOR_CHANGE and SENSOR_STATE_CHANGE events.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_SENSOREVT 0x1</div><div class='del'>-/* enum: Driver wishes to receive receive errors. */</div><div class='del'>-#define          MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_RX_ERR 0x2</div><div class='del'>-/* enum: Driver wishes to receive transmit errors. */</div><div class='del'>-#define          MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_TX_ERR 0x3</div><div class='del'>-/* enum: Driver wishes to receive firmware alerts. */</div><div class='del'>-#define          MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_FWALERT 0x4</div><div class='del'>-/* enum: Driver wishes to receive reboot events. */</div><div class='del'>-#define          MC_CMD_EVENT_CTRL_IN_MCDI_EVENT_CODE_MC_REBOOT 0x5</div><div class='del'>-</div><div class='del'>-/* MC_CMD_EVENT_CTRL_OUT msgrequest */</div><div class='del'>-#define    MC_CMD_EVENT_CTRL_OUT_LEN 0</div><div class='add'>+/* MC_CMD_GET_NETPORT_EVENTS_MASK</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_GET_NETPORT_EVENTS_MASK 0x1ea</div><div class='add'>+#undef MC_CMD_0x1ea_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1ea_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_NETPORT_EVENTS_MASK_IN msgrequest: Get event delivery mask a</div><div class='add'>+ * given port identified by PORT_HANDLE.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_GET_NETPORT_EVENTS_MASK_IN_LEN 4</div><div class='add'>+/* Handle to port to get event deliver mask for. */</div><div class='add'>+#define       MC_CMD_GET_NETPORT_EVENTS_MASK_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_GET_NETPORT_EVENTS_MASK_IN_PORT_HANDLE_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_NETPORT_EVENTS_MASK_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_GET_NETPORT_EVENTS_MASK_OUT_LEN 4</div><div class='add'>+/* Bitmask of events enabled. Event delivery is enabled when corresponding bit</div><div class='add'>+ * is 1, disabled when 0.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_NETPORT_EVENTS_MASK_OUT_EVENT_MASK_OFST 0</div><div class='add'>+#define       MC_CMD_GET_NETPORT_EVENTS_MASK_OUT_EVENT_MASK_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               EVENT_MASK/TYPE */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_GET_SUPPORTED_NETPORT_EVENTS</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_GET_SUPPORTED_NETPORT_EVENTS 0x1eb</div><div class='add'>+#undef MC_CMD_0x1eb_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1eb_PRIVILEGE_CTG SRIOV_CTG_LINK</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_SUPPORTED_NETPORT_EVENTS_IN msgrequest: Get network port events</div><div class='add'>+ * supported by the platform. Information returned is fixed for a given NIC</div><div class='add'>+ * platform.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_GET_SUPPORTED_NETPORT_EVENTS_IN_LEN 0</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_SUPPORTED_NETPORT_EVENTS_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_GET_SUPPORTED_NETPORT_EVENTS_OUT_LEN 4</div><div class='add'>+/* Bitmask of events enabled. Event delivery is enabled when corresponding bit</div><div class='add'>+ * is 1, disabled when 0.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_SUPPORTED_NETPORT_EVENTS_OUT_EVENT_MASK_OFST 0</div><div class='add'>+#define       MC_CMD_GET_SUPPORTED_NETPORT_EVENTS_OUT_EVENT_MASK_LEN 4</div><div class='add'>+/* enum property: bitshift */</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               EVENT_MASK/TYPE */</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_GET_NETPORT_STATISTICS</div><div class='add'>+ * Get generic MAC statistics. This call retrieves unified statistics managed</div><div class='add'>+ * by the MC. The MC will populate and provide all supported statistics in the</div><div class='add'>+ * format as returned by MC_CMD_MAC_STATISTICS_DESCRIPTOR. Refer to the</div><div class='add'>+ * aforementioned command for the format and contents of the stats DMA buffer.</div><div class='add'>+ * To ensure consistent and accurate results, it is essential for the driver to</div><div class='add'>+ * initialize the DMA buffer with zeros when DMA mode is used. Returns: 0 on</div><div class='add'>+ * success, ETIME if the DMA buffer is not ready, ENOENT on non-existent port</div><div class='add'>+ * handle, and EINVAL on invalid parameters (DMA buffer too small)</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_GET_NETPORT_STATISTICS 0x1fa</div><div class='add'>+#undef MC_CMD_0x1fa_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1fa_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_NETPORT_STATISTICS_IN msgrequest */</div><div class='add'>+#define    MC_CMD_GET_NETPORT_STATISTICS_IN_LEN 20</div><div class='add'>+/* Handle of port to get MAC statistics for. */</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_PORT_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_PORT_HANDLE_LEN 4</div><div class='add'>+/* Contains options for querying the MAC statistics. */</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_CMD_OFST 4</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_CMD_LEN 4</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_OFST 4</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_LBN 0</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_CLEAR_OFST 4</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_CLEAR_LBN 1</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_CLEAR_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_CHANGE_OFST 4</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_CHANGE_LBN 2</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_CHANGE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_ENABLE_OFST 4</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_ENABLE_LBN 3</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_ENABLE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_NOEVENT_OFST 4</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_NOEVENT_LBN 4</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIODIC_NOEVENT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIOD_MS_OFST 4</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIOD_MS_LBN 15</div><div class='add'>+#define        MC_CMD_GET_NETPORT_STATISTICS_IN_PERIOD_MS_WIDTH 17</div><div class='add'>+/* Specifies the physical address of the DMA buffer to use for statistics</div><div class='add'>+ * transfer. This field must contain a valid address under either of these</div><div class='add'>+ * conditions: 1. DMA flag is set (immediate DMA requested) 2. Both</div><div class='add'>+ * PERIODIC_CHANGE and PERIODIC_ENABLE are set (periodic DMA configured)</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_OFST 8</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LEN 8</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_OFST 8</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_LBN 64</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_OFST 12</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_LBN 96</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_ADDR_HI_WIDTH 32</div><div class='add'>+/* Specifies the length of the DMA buffer in bytes for statistics transfer. The</div><div class='add'>+ * buffer size must be at least DMA_BUFFER_SIZE bytes (as returned by</div><div class='add'>+ * MC_CMD_MAC_STATISTICS_DESCRIPTOR). Providing an insufficient buffer size</div><div class='add'>+ * will result in an EINVAL error. This field must contain a valid length under</div><div class='add'>+ * either of these conditions: 1. DMA flag is set (immediate DMA requested) 2.</div><div class='add'>+ * Both PERIODIC_CHANGE and PERIODIC_ENABLE are set (periodic DMA configured)</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_LEN_OFST 16</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_IN_DMA_LEN_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_NETPORT_STATISTICS_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_GET_NETPORT_STATISTICS_OUT_LENMIN 0</div><div class='add'>+#define    MC_CMD_GET_NETPORT_STATISTICS_OUT_LENMAX 248</div><div class='add'>+#define    MC_CMD_GET_NETPORT_STATISTICS_OUT_LENMAX_MCDI2 1016</div><div class='add'>+#define    MC_CMD_GET_NETPORT_STATISTICS_OUT_LEN(num) (0+8*(num))</div><div class='add'>+#define    MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_NUM(len) (((len)-0)/8)</div><div class='add'>+/* Statistics buffer. Zero-length if DMA mode is used. The statistics buffer is</div><div class='add'>+ * an array of 8-byte counter values, containing the generation start marker,</div><div class='add'>+ * stats counters, and generation end marker. The index of each counter in the</div><div class='add'>+ * array is reported by the MAC_STATISTICS_DESCRIPTOR command. The same layout</div><div class='add'>+ * is used for the DMA buffer for DMA mode stats.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_OFST 0</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LEN 8</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_OFST 0</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_LBN 0</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_OFST 4</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_LBN 32</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_HI_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_MINNUM 0</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_MAXNUM 31</div><div class='add'>+#define       MC_CMD_GET_NETPORT_STATISTICS_OUT_STATS_MAXNUM_MCDI2 127</div><div class='ctx'> </div><div class='ctx'> /* EVB_PORT_ID structuredef */</div><div class='ctx'> #define    EVB_PORT_ID_LEN 4</div><div class='hunk'>@@ -9706,44 +10573,6 @@</div><div class='ctx'> #define       EVB_PORT_ID_PORT_ID_LBN 0</div><div class='ctx'> #define       EVB_PORT_ID_PORT_ID_WIDTH 32</div><div class='ctx'> </div><div class='del'>-/* EVB_VLAN_TAG structuredef */</div><div class='del'>-#define    EVB_VLAN_TAG_LEN 2</div><div class='del'>-/* The VLAN tag value */</div><div class='del'>-#define       EVB_VLAN_TAG_VLAN_ID_LBN 0</div><div class='del'>-#define       EVB_VLAN_TAG_VLAN_ID_WIDTH 12</div><div class='del'>-#define       EVB_VLAN_TAG_MODE_LBN 12</div><div class='del'>-#define       EVB_VLAN_TAG_MODE_WIDTH 4</div><div class='del'>-/* enum: Insert the VLAN. */</div><div class='del'>-#define          EVB_VLAN_TAG_INSERT 0x0</div><div class='del'>-/* enum: Replace the VLAN if already present. */</div><div class='del'>-#define          EVB_VLAN_TAG_REPLACE 0x1</div><div class='del'>-</div><div class='del'>-/* BUFTBL_ENTRY structuredef */</div><div class='del'>-#define    BUFTBL_ENTRY_LEN 12</div><div class='del'>-/* the owner ID */</div><div class='del'>-#define       BUFTBL_ENTRY_OID_OFST 0</div><div class='del'>-#define       BUFTBL_ENTRY_OID_LEN 2</div><div class='del'>-#define       BUFTBL_ENTRY_OID_LBN 0</div><div class='del'>-#define       BUFTBL_ENTRY_OID_WIDTH 16</div><div class='del'>-/* the page parameter as one of ESE_DZ_SMC_PAGE_SIZE_ */</div><div class='del'>-#define       BUFTBL_ENTRY_PGSZ_OFST 2</div><div class='del'>-#define       BUFTBL_ENTRY_PGSZ_LEN 2</div><div class='del'>-#define       BUFTBL_ENTRY_PGSZ_LBN 16</div><div class='del'>-#define       BUFTBL_ENTRY_PGSZ_WIDTH 16</div><div class='del'>-/* the raw 64-bit address field from the SMC, not adjusted for page size */</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_OFST 4</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_LEN 8</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_LO_OFST 4</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_LO_LEN 4</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_LO_LBN 32</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_LO_WIDTH 32</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_HI_OFST 8</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_HI_LEN 4</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_HI_LBN 64</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_HI_WIDTH 32</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_LBN 32</div><div class='del'>-#define       BUFTBL_ENTRY_RAWADDR_WIDTH 64</div><div class='del'>-</div><div class='ctx'> /* NVRAM_PARTITION_TYPE structuredef */</div><div class='ctx'> #define    NVRAM_PARTITION_TYPE_LEN 2</div><div class='ctx'> #define       NVRAM_PARTITION_TYPE_ID_OFST 0</div><div class='hunk'>@@ -9787,6 +10616,8 @@</div><div class='ctx'> #define          NVRAM_PARTITION_TYPE_NMC_LOG 0x700</div><div class='ctx'> /* enum: Non-volatile log output of second core on dual-core device */</div><div class='ctx'> #define          NVRAM_PARTITION_TYPE_LOG_SLAVE 0x701</div><div class='add'>+/* enum: RAM (volatile) log output partition */</div><div class='add'>+#define          NVRAM_PARTITION_TYPE_RAM_LOG 0x702</div><div class='ctx'> /* enum: Device state dump output partition */</div><div class='ctx'> #define          NVRAM_PARTITION_TYPE_DUMP 0x800</div><div class='ctx'> /* enum: Crash log partition for NMC firmware */</div><div class='hunk'>@@ -9923,6 +10754,16 @@</div><div class='ctx'> #define          NVRAM_PARTITION_TYPE_SUC_SOC_CONFIG 0x1f07</div><div class='ctx'> /* enum: System-on-Chip update information. */</div><div class='ctx'> #define          NVRAM_PARTITION_TYPE_SOC_UPDATE 0x2003</div><div class='add'>+/* enum: Virtual partition. Write-only. Writes will actually be sent to an</div><div class='add'>+ * appropriate partition (for instance BUNDLE if the data starts with the magic</div><div class='add'>+ * number for a bundle update), or discarded with an error if not recognised as</div><div class='add'>+ * a supported type.</div><div class='add'>+ */</div><div class='add'>+#define          NVRAM_PARTITION_TYPE_AUTO 0x2100</div><div class='add'>+/* enum: MC/NMC (first stage) bootloader firmware. (For X4, see XN-202072-PS</div><div class='add'>+ * and XN-202084-SW section 3.1).</div><div class='add'>+ */</div><div class='add'>+#define          NVRAM_PARTITION_TYPE_BOOTLOADER 0x2200</div><div class='ctx'> /* enum: Start of reserved value range (firmware may use for any purpose) */</div><div class='ctx'> #define          NVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN 0xff00</div><div class='ctx'> /* enum: End of reserved value range (firmware may use for any purpose) */</div><div class='hunk'>@@ -9981,116 +10822,6 @@</div><div class='ctx'> #define       LICENSED_APP_ID_ID_LBN 0</div><div class='ctx'> #define       LICENSED_APP_ID_ID_WIDTH 32</div><div class='ctx'> </div><div class='del'>-/* LICENSED_FEATURES structuredef */</div><div class='del'>-#define    LICENSED_FEATURES_LEN 8</div><div class='del'>-/* Bitmask of licensed firmware features */</div><div class='del'>-#define       LICENSED_FEATURES_MASK_OFST 0</div><div class='del'>-#define       LICENSED_FEATURES_MASK_LEN 8</div><div class='del'>-#define       LICENSED_FEATURES_MASK_LO_OFST 0</div><div class='del'>-#define       LICENSED_FEATURES_MASK_LO_LEN 4</div><div class='del'>-#define       LICENSED_FEATURES_MASK_LO_LBN 0</div><div class='del'>-#define       LICENSED_FEATURES_MASK_LO_WIDTH 32</div><div class='del'>-#define       LICENSED_FEATURES_MASK_HI_OFST 4</div><div class='del'>-#define       LICENSED_FEATURES_MASK_HI_LEN 4</div><div class='del'>-#define       LICENSED_FEATURES_MASK_HI_LBN 32</div><div class='del'>-#define       LICENSED_FEATURES_MASK_HI_WIDTH 32</div><div class='del'>-#define        LICENSED_FEATURES_RX_CUT_THROUGH_OFST 0</div><div class='del'>-#define        LICENSED_FEATURES_RX_CUT_THROUGH_LBN 0</div><div class='del'>-#define        LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH 1</div><div class='del'>-#define        LICENSED_FEATURES_PIO_OFST 0</div><div class='del'>-#define        LICENSED_FEATURES_PIO_LBN 1</div><div class='del'>-#define        LICENSED_FEATURES_PIO_WIDTH 1</div><div class='del'>-#define        LICENSED_FEATURES_EVQ_TIMER_OFST 0</div><div class='del'>-#define        LICENSED_FEATURES_EVQ_TIMER_LBN 2</div><div class='del'>-#define        LICENSED_FEATURES_EVQ_TIMER_WIDTH 1</div><div class='del'>-#define        LICENSED_FEATURES_CLOCK_OFST 0</div><div class='del'>-#define        LICENSED_FEATURES_CLOCK_LBN 3</div><div class='del'>-#define        LICENSED_FEATURES_CLOCK_WIDTH 1</div><div class='del'>-#define        LICENSED_FEATURES_RX_TIMESTAMPS_OFST 0</div><div class='del'>-#define        LICENSED_FEATURES_RX_TIMESTAMPS_LBN 4</div><div class='del'>-#define        LICENSED_FEATURES_RX_TIMESTAMPS_WIDTH 1</div><div class='del'>-#define        LICENSED_FEATURES_TX_TIMESTAMPS_OFST 0</div><div class='del'>-#define        LICENSED_FEATURES_TX_TIMESTAMPS_LBN 5</div><div class='del'>-#define        LICENSED_FEATURES_TX_TIMESTAMPS_WIDTH 1</div><div class='del'>-#define        LICENSED_FEATURES_RX_SNIFF_OFST 0</div><div class='del'>-#define        LICENSED_FEATURES_RX_SNIFF_LBN 6</div><div class='del'>-#define        LICENSED_FEATURES_RX_SNIFF_WIDTH 1</div><div class='del'>-#define        LICENSED_FEATURES_TX_SNIFF_OFST 0</div><div class='del'>-#define        LICENSED_FEATURES_TX_SNIFF_LBN 7</div><div class='del'>-#define        LICENSED_FEATURES_TX_SNIFF_WIDTH 1</div><div class='del'>-#define        LICENSED_FEATURES_PROXY_FILTER_OPS_OFST 0</div><div class='del'>-#define        LICENSED_FEATURES_PROXY_FILTER_OPS_LBN 8</div><div class='del'>-#define        LICENSED_FEATURES_PROXY_FILTER_OPS_WIDTH 1</div><div class='del'>-#define        LICENSED_FEATURES_EVENT_CUT_THROUGH_OFST 0</div><div class='del'>-#define        LICENSED_FEATURES_EVENT_CUT_THROUGH_LBN 9</div><div class='del'>-#define        LICENSED_FEATURES_EVENT_CUT_THROUGH_WIDTH 1</div><div class='del'>-#define       LICENSED_FEATURES_MASK_LBN 0</div><div class='del'>-#define       LICENSED_FEATURES_MASK_WIDTH 64</div><div class='del'>-</div><div class='del'>-/* LICENSED_V3_APPS structuredef */</div><div class='del'>-#define    LICENSED_V3_APPS_LEN 8</div><div class='del'>-/* Bitmask of licensed applications */</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_OFST 0</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_LEN 8</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_LO_OFST 0</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_LO_LEN 4</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_LO_LBN 0</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_LO_WIDTH 32</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_HI_OFST 4</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_HI_LEN 4</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_HI_LBN 32</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_HI_WIDTH 32</div><div class='del'>-#define        LICENSED_V3_APPS_ONLOAD_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_ONLOAD_LBN 0</div><div class='del'>-#define        LICENSED_V3_APPS_ONLOAD_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_PTP_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_PTP_LBN 1</div><div class='del'>-#define        LICENSED_V3_APPS_PTP_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARCAPTURE_PRO_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARCAPTURE_PRO_LBN 2</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARCAPTURE_PRO_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARSECURE_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARSECURE_LBN 3</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARSECURE_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_PERF_MONITOR_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_PERF_MONITOR_LBN 4</div><div class='del'>-#define        LICENSED_V3_APPS_PERF_MONITOR_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARCAPTURE_LIVE_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARCAPTURE_LIVE_LBN 5</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARCAPTURE_LIVE_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_LBN 6</div><div class='del'>-#define        LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_LBN 7</div><div class='del'>-#define        LICENSED_V3_APPS_NETWORK_ACCESS_CONTROL_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_TCP_DIRECT_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_TCP_DIRECT_LBN 8</div><div class='del'>-#define        LICENSED_V3_APPS_TCP_DIRECT_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_LOW_LATENCY_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_LOW_LATENCY_LBN 9</div><div class='del'>-#define        LICENSED_V3_APPS_LOW_LATENCY_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARCAPTURE_TAP_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARCAPTURE_TAP_LBN 10</div><div class='del'>-#define        LICENSED_V3_APPS_SOLARCAPTURE_TAP_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_LBN 11</div><div class='del'>-#define        LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_40G_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_LBN 12</div><div class='del'>-#define        LICENSED_V3_APPS_CAPTURE_SOLARSYSTEM_1G_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_SCALEOUT_ONLOAD_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_SCALEOUT_ONLOAD_LBN 13</div><div class='del'>-#define        LICENSED_V3_APPS_SCALEOUT_ONLOAD_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_DSHBRD_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_DSHBRD_LBN 14</div><div class='del'>-#define        LICENSED_V3_APPS_DSHBRD_WIDTH 1</div><div class='del'>-#define        LICENSED_V3_APPS_SCATRD_OFST 0</div><div class='del'>-#define        LICENSED_V3_APPS_SCATRD_LBN 15</div><div class='del'>-#define        LICENSED_V3_APPS_SCATRD_WIDTH 1</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_LBN 0</div><div class='del'>-#define       LICENSED_V3_APPS_MASK_WIDTH 64</div><div class='del'>-</div><div class='ctx'> /* LICENSED_V3_FEATURES structuredef */</div><div class='ctx'> #define    LICENSED_V3_FEATURES_LEN 8</div><div class='ctx'> /* Bitmask of licensed firmware features */</div><div class='hunk'>@@ -10199,44 +10930,6 @@</div><div class='ctx'> #define       RSS_MODE_HASH_SELECTOR_LBN 0</div><div class='ctx'> #define       RSS_MODE_HASH_SELECTOR_WIDTH 8</div><div class='ctx'> </div><div class='del'>-/* CTPIO_STATS_MAP structuredef */</div><div class='del'>-#define    CTPIO_STATS_MAP_LEN 4</div><div class='del'>-/* The (function relative) VI number */</div><div class='del'>-#define       CTPIO_STATS_MAP_VI_OFST 0</div><div class='del'>-#define       CTPIO_STATS_MAP_VI_LEN 2</div><div class='del'>-#define       CTPIO_STATS_MAP_VI_LBN 0</div><div class='del'>-#define       CTPIO_STATS_MAP_VI_WIDTH 16</div><div class='del'>-/* The target bucket for the VI */</div><div class='del'>-#define       CTPIO_STATS_MAP_BUCKET_OFST 2</div><div class='del'>-#define       CTPIO_STATS_MAP_BUCKET_LEN 2</div><div class='del'>-#define       CTPIO_STATS_MAP_BUCKET_LBN 16</div><div class='del'>-#define       CTPIO_STATS_MAP_BUCKET_WIDTH 16</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_READ_REGS</div><div class='del'>- * Get a dump of the MCPU registers</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_READ_REGS 0x50</div><div class='del'>-#undef MC_CMD_0x50_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x50_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_READ_REGS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_READ_REGS_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_READ_REGS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_READ_REGS_OUT_LEN 308</div><div class='del'>-/* Whether the corresponding register entry contains a valid value */</div><div class='del'>-#define       MC_CMD_READ_REGS_OUT_MASK_OFST 0</div><div class='del'>-#define       MC_CMD_READ_REGS_OUT_MASK_LEN 16</div><div class='del'>-/* Same order as MIPS GDB (r0-r31, sr, lo, hi, bad, cause, 32 x float, fsr,</div><div class='del'>- * fir, fp)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_READ_REGS_OUT_REGS_OFST 16</div><div class='del'>-#define       MC_CMD_READ_REGS_OUT_REGS_LEN 4</div><div class='del'>-#define       MC_CMD_READ_REGS_OUT_REGS_NUM 73</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_INIT_EVQ</div><div class='hunk'>@@ -10640,25 +11333,6 @@</div><div class='ctx'> #define        MC_CMD_INIT_EVQ_V3_OUT_FLAG_RXQ_FORCE_EV_MERGING_LBN 3</div><div class='ctx'> #define        MC_CMD_INIT_EVQ_V3_OUT_FLAG_RXQ_FORCE_EV_MERGING_WIDTH 1</div><div class='ctx'> </div><div class='del'>-/* QUEUE_CRC_MODE structuredef */</div><div class='del'>-#define    QUEUE_CRC_MODE_LEN 1</div><div class='del'>-#define       QUEUE_CRC_MODE_MODE_LBN 0</div><div class='del'>-#define       QUEUE_CRC_MODE_MODE_WIDTH 4</div><div class='del'>-/* enum: No CRC. */</div><div class='del'>-#define          QUEUE_CRC_MODE_NONE 0x0</div><div class='del'>-/* enum: CRC Fiber channel over ethernet. */</div><div class='del'>-#define          QUEUE_CRC_MODE_FCOE 0x1</div><div class='del'>-/* enum: CRC (digest) iSCSI header only. */</div><div class='del'>-#define          QUEUE_CRC_MODE_ISCSI_HDR 0x2</div><div class='del'>-/* enum: CRC (digest) iSCSI header and payload. */</div><div class='del'>-#define          QUEUE_CRC_MODE_ISCSI 0x3</div><div class='del'>-/* enum: CRC Fiber channel over IP over ethernet. */</div><div class='del'>-#define          QUEUE_CRC_MODE_FCOIPOE 0x4</div><div class='del'>-/* enum: CRC MPA. */</div><div class='del'>-#define          QUEUE_CRC_MODE_MPA 0x5</div><div class='del'>-#define       QUEUE_CRC_MODE_SPARE_LBN 4</div><div class='del'>-#define       QUEUE_CRC_MODE_SPARE_WIDTH 4</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_INIT_RXQ</div><div class='hunk'>@@ -10827,6 +11501,9 @@</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_OFST 16</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_LBN 20</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_EXT_IN_FLAG_NO_CONT_EV_WIDTH 1</div><div class='add'>+#define        MC_CMD_INIT_RXQ_EXT_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16</div><div class='add'>+#define        MC_CMD_INIT_RXQ_EXT_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21</div><div class='add'>+#define        MC_CMD_INIT_RXQ_EXT_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1</div><div class='ctx'> /* Owner ID to use if in buffer mode (zero if physical) */</div><div class='ctx'> #define       MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_OFST 20</div><div class='ctx'> #define       MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_LEN 4</div><div class='hunk'>@@ -10933,6 +11610,9 @@</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_OFST 16</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_LBN 20</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_V3_IN_FLAG_NO_CONT_EV_WIDTH 1</div><div class='add'>+#define        MC_CMD_INIT_RXQ_V3_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16</div><div class='add'>+#define        MC_CMD_INIT_RXQ_V3_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21</div><div class='add'>+#define        MC_CMD_INIT_RXQ_V3_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1</div><div class='ctx'> /* Owner ID to use if in buffer mode (zero if physical) */</div><div class='ctx'> #define       MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_OFST 20</div><div class='ctx'> #define       MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_LEN 4</div><div class='hunk'>@@ -11068,6 +11748,9 @@</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_OFST 16</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_LBN 20</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_V4_IN_FLAG_NO_CONT_EV_WIDTH 1</div><div class='add'>+#define        MC_CMD_INIT_RXQ_V4_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16</div><div class='add'>+#define        MC_CMD_INIT_RXQ_V4_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21</div><div class='add'>+#define        MC_CMD_INIT_RXQ_V4_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1</div><div class='ctx'> /* Owner ID to use if in buffer mode (zero if physical) */</div><div class='ctx'> #define       MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_OFST 20</div><div class='ctx'> #define       MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_LEN 4</div><div class='hunk'>@@ -11216,6 +11899,9 @@</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_OFST 16</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_LBN 20</div><div class='ctx'> #define        MC_CMD_INIT_RXQ_V5_IN_FLAG_NO_CONT_EV_WIDTH 1</div><div class='add'>+#define        MC_CMD_INIT_RXQ_V5_IN_FLAG_SUPPRESS_RX_EVENTS_OFST 16</div><div class='add'>+#define        MC_CMD_INIT_RXQ_V5_IN_FLAG_SUPPRESS_RX_EVENTS_LBN 21</div><div class='add'>+#define        MC_CMD_INIT_RXQ_V5_IN_FLAG_SUPPRESS_RX_EVENTS_WIDTH 1</div><div class='ctx'> /* Owner ID to use if in buffer mode (zero if physical) */</div><div class='ctx'> #define       MC_CMD_INIT_RXQ_V5_IN_OWNER_ID_OFST 20</div><div class='ctx'> #define       MC_CMD_INIT_RXQ_V5_IN_OWNER_ID_LEN 4</div><div class='hunk'>@@ -11610,320 +12296,6 @@</div><div class='ctx'> /* MC_CMD_PROXY_CMD_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_PROXY_CMD_OUT_LEN 0</div><div class='ctx'> </div><div class='del'>-/* MC_PROXY_STATUS_BUFFER structuredef: Host memory status buffer used to</div><div class='del'>- * manage proxied requests</div><div class='del'>- */</div><div class='del'>-#define    MC_PROXY_STATUS_BUFFER_LEN 16</div><div class='del'>-/* Handle allocated by the firmware for this proxy transaction */</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_HANDLE_OFST 0</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_HANDLE_LEN 4</div><div class='del'>-/* enum: An invalid handle. */</div><div class='del'>-#define          MC_PROXY_STATUS_BUFFER_HANDLE_INVALID 0x0</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_HANDLE_LBN 0</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_HANDLE_WIDTH 32</div><div class='del'>-/* The requesting physical function number */</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_PF_OFST 4</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_PF_LEN 2</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_PF_LBN 32</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_PF_WIDTH 16</div><div class='del'>-/* The requesting virtual function number. Set to VF_NULL if the target is a</div><div class='del'>- * PF.</div><div class='del'>- */</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_VF_OFST 6</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_VF_LEN 2</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_VF_LBN 48</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_VF_WIDTH 16</div><div class='del'>-/* The target function RID. */</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_RID_OFST 8</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_RID_LEN 2</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_RID_LBN 64</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_RID_WIDTH 16</div><div class='del'>-/* The status of the proxy as described in MC_CMD_PROXY_COMPLETE. */</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_STATUS_OFST 10</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_STATUS_LEN 2</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_STATUS_LBN 80</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_STATUS_WIDTH 16</div><div class='del'>-/* If a request is authorized rather than carried out by the host, this is the</div><div class='del'>- * elevated privilege mask granted to the requesting function.</div><div class='del'>- */</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_OFST 12</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_LEN 4</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_LBN 96</div><div class='del'>-#define       MC_PROXY_STATUS_BUFFER_GRANTED_PRIVILEGES_WIDTH 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PROXY_CONFIGURE</div><div class='del'>- * Enable/disable authorization of MCDI requests from unprivileged functions by</div><div class='del'>- * a designated admin function</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PROXY_CONFIGURE 0x58</div><div class='del'>-#undef MC_CMD_0x58_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x58_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PROXY_CONFIGURE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PROXY_CONFIGURE_IN_LEN 108</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_PROXY_CONFIGURE_IN_ENABLE_OFST 0</div><div class='del'>-#define        MC_CMD_PROXY_CONFIGURE_IN_ENABLE_LBN 0</div><div class='del'>-#define        MC_CMD_PROXY_CONFIGURE_IN_ENABLE_WIDTH 1</div><div class='del'>-/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS</div><div class='del'>- * of blocks, each of the size REQUEST_BLOCK_SIZE.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_OFST 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LEN 8</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_OFST 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LBN 32</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_OFST 8</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LBN 64</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_WIDTH 32</div><div class='del'>-/* Must be a power of 2 */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_OFST 12</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_LEN 4</div><div class='del'>-/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS</div><div class='del'>- * of blocks, each of the size REPLY_BLOCK_SIZE.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_OFST 16</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LEN 8</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_OFST 16</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LBN 128</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_OFST 20</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LBN 160</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32</div><div class='del'>-/* Must be a power of 2 */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_OFST 24</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_LEN 4</div><div class='del'>-/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS</div><div class='del'>- * of blocks, each of the size STATUS_BLOCK_SIZE. This buffer is only needed if</div><div class='del'>- * host intends to complete proxied operations by using MC_CMD_PROXY_CMD.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_OFST 28</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LEN 8</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_OFST 28</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LBN 224</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_OFST 32</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LBN 256</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_WIDTH 32</div><div class='del'>-/* Must be a power of 2, or zero if this buffer is not provided */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_OFST 36</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_LEN 4</div><div class='del'>-/* Applies to all three buffers */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_NUM_BLOCKS_OFST 40</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_NUM_BLOCKS_LEN 4</div><div class='del'>-/* A bit mask defining which MCDI operations may be proxied */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_ALLOWED_MCDI_MASK_OFST 44</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_IN_ALLOWED_MCDI_MASK_LEN 64</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PROXY_CONFIGURE_EXT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PROXY_CONFIGURE_EXT_IN_LEN 112</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_PROXY_CONFIGURE_EXT_IN_ENABLE_OFST 0</div><div class='del'>-#define        MC_CMD_PROXY_CONFIGURE_EXT_IN_ENABLE_LBN 0</div><div class='del'>-#define        MC_CMD_PROXY_CONFIGURE_EXT_IN_ENABLE_WIDTH 1</div><div class='del'>-/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS</div><div class='del'>- * of blocks, each of the size REQUEST_BLOCK_SIZE.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_OFST 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LEN 8</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_OFST 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LBN 32</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_OFST 8</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LBN 64</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_WIDTH 32</div><div class='del'>-/* Must be a power of 2 */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_OFST 12</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_LEN 4</div><div class='del'>-/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS</div><div class='del'>- * of blocks, each of the size REPLY_BLOCK_SIZE.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_OFST 16</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LEN 8</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_OFST 16</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LBN 128</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_OFST 20</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LBN 160</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32</div><div class='del'>-/* Must be a power of 2 */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_OFST 24</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_LEN 4</div><div class='del'>-/* Host provides a contiguous memory buffer that contains at least NUM_BLOCKS</div><div class='del'>- * of blocks, each of the size STATUS_BLOCK_SIZE. This buffer is only needed if</div><div class='del'>- * host intends to complete proxied operations by using MC_CMD_PROXY_CMD.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_OFST 28</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LEN 8</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_OFST 28</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LBN 224</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_OFST 32</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LBN 256</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_WIDTH 32</div><div class='del'>-/* Must be a power of 2, or zero if this buffer is not provided */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_OFST 36</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_LEN 4</div><div class='del'>-/* Applies to all three buffers */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_NUM_BLOCKS_OFST 40</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_NUM_BLOCKS_LEN 4</div><div class='del'>-/* A bit mask defining which MCDI operations may be proxied */</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_ALLOWED_MCDI_MASK_OFST 44</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_ALLOWED_MCDI_MASK_LEN 64</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_RESERVED_OFST 108</div><div class='del'>-#define       MC_CMD_PROXY_CONFIGURE_EXT_IN_RESERVED_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PROXY_CONFIGURE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PROXY_CONFIGURE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PROXY_COMPLETE</div><div class='del'>- * Tells FW that a requested proxy operation has either been completed (by</div><div class='del'>- * using MC_CMD_PROXY_CMD) or authorized/declined. May only be sent by the</div><div class='del'>- * function that enabled proxying/authorization (by using</div><div class='del'>- * MC_CMD_PROXY_CONFIGURE).</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PROXY_COMPLETE 0x5f</div><div class='del'>-#undef MC_CMD_0x5f_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x5f_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PROXY_COMPLETE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PROXY_COMPLETE_IN_LEN 12</div><div class='del'>-#define       MC_CMD_PROXY_COMPLETE_IN_BLOCK_INDEX_OFST 0</div><div class='del'>-#define       MC_CMD_PROXY_COMPLETE_IN_BLOCK_INDEX_LEN 4</div><div class='del'>-#define       MC_CMD_PROXY_COMPLETE_IN_STATUS_OFST 4</div><div class='del'>-#define       MC_CMD_PROXY_COMPLETE_IN_STATUS_LEN 4</div><div class='del'>-/* enum: The operation has been completed by using MC_CMD_PROXY_CMD, the reply</div><div class='del'>- * is stored in the REPLY_BUFF.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_PROXY_COMPLETE_IN_COMPLETE 0x0</div><div class='del'>-/* enum: The operation has been authorized. The originating function may now</div><div class='del'>- * try again.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_PROXY_COMPLETE_IN_AUTHORIZED 0x1</div><div class='del'>-/* enum: The operation has been declined. */</div><div class='del'>-#define          MC_CMD_PROXY_COMPLETE_IN_DECLINED 0x2</div><div class='del'>-/* enum: The authorization failed because the relevant application did not</div><div class='del'>- * respond in time.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_PROXY_COMPLETE_IN_TIMEDOUT 0x3</div><div class='del'>-#define       MC_CMD_PROXY_COMPLETE_IN_HANDLE_OFST 8</div><div class='del'>-#define       MC_CMD_PROXY_COMPLETE_IN_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PROXY_COMPLETE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PROXY_COMPLETE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_ALLOC_BUFTBL_CHUNK</div><div class='del'>- * Allocate a set of buffer table entries using the specified owner ID. This</div><div class='del'>- * operation allocates the required buffer table entries (and fails if it</div><div class='del'>- * cannot do so). The buffer table entries will initially be zeroed.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x87</div><div class='del'>-#undef MC_CMD_0x87_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x87_PRIVILEGE_CTG SRIOV_CTG_ONLOAD</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ALLOC_BUFTBL_CHUNK_IN msgrequest */</div><div class='del'>-#define    MC_CMD_ALLOC_BUFTBL_CHUNK_IN_LEN 8</div><div class='del'>-/* Owner ID to use */</div><div class='del'>-#define       MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_OFST 0</div><div class='del'>-#define       MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_LEN 4</div><div class='del'>-/* Size of buffer table pages to use, in bytes (note that only a few values are</div><div class='del'>- * legal on any specific hardware).</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_OFST 4</div><div class='del'>-#define       MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ALLOC_BUFTBL_CHUNK_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_LEN 12</div><div class='del'>-#define       MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_LEN 4</div><div class='del'>-#define       MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_OFST 4</div><div class='del'>-#define       MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_LEN 4</div><div class='del'>-/* Buffer table IDs for use in DMA descriptors. */</div><div class='del'>-#define       MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_OFST 8</div><div class='del'>-#define       MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PROGRAM_BUFTBL_ENTRIES</div><div class='del'>- * Reprogram a set of buffer table entries in the specified chunk.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x88</div><div class='del'>-#undef MC_CMD_0x88_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x88_PRIVILEGE_CTG SRIOV_CTG_ONLOAD</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMIN 20</div><div class='del'>-#define    MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX 268</div><div class='del'>-#define    MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LENMAX_MCDI2 268</div><div class='del'>-#define    MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_LEN(num) (12+8*(num))</div><div class='del'>-#define    MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_NUM(len) (((len)-12)/8)</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_LEN 4</div><div class='del'>-/* ID */</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_OFST 4</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_LEN 4</div><div class='del'>-/* Num entries */</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_OFST 8</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_LEN 4</div><div class='del'>-/* Buffer table entry address */</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST 12</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN 8</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LEN 4</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LBN 96</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LEN 4</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LBN 128</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32</div><div class='del'>-#define       MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 32</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PROGRAM_BUFTBL_ENTRIES_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_FREE_BUFTBL_CHUNK</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_FREE_BUFTBL_CHUNK 0x89</div><div class='del'>-#undef MC_CMD_0x89_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x89_PRIVILEGE_CTG SRIOV_CTG_ONLOAD</div><div class='del'>-</div><div class='del'>-/* MC_CMD_FREE_BUFTBL_CHUNK_IN msgrequest */</div><div class='del'>-#define    MC_CMD_FREE_BUFTBL_CHUNK_IN_LEN 4</div><div class='del'>-#define       MC_CMD_FREE_BUFTBL_CHUNK_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_FREE_BUFTBL_CHUNK_IN_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_FREE_BUFTBL_CHUNK_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_FREE_BUFTBL_CHUNK_OUT_LEN 0</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_FILTER_OP</div><div class='hunk'>@@ -12822,6 +13194,10 @@</div><div class='ctx'> #define          MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_VNIC_ENCAP_MATCHES 0x5</div><div class='ctx'> /* enum: read the supported encapsulation types for the VNIC */</div><div class='ctx'> #define          MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_VNIC_ENCAP_TYPES 0x6</div><div class='add'>+/* enum: read the supported RX filter matches for low-latency queues (as</div><div class='add'>+ * allocated by MC_CMD_ALLOC_LL_QUEUES)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_PARSER_DISP_INFO_IN_OP_GET_SUPPORTED_LL_RX_MATCHES 0x7</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_GET_PARSER_DISP_INFO_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMIN 8</div><div class='hunk'>@@ -12860,6 +13236,48 @@</div><div class='ctx'> #define        MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_LBN 0</div><div class='ctx'> #define        MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_WIDTH 1</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT msgresponse:</div><div class='add'>+ * GET_PARSER_DISP_INFO response format for OP_GET_SECURITY_RULE_INFO.</div><div class='add'>+ * (Medford-only; for use by SolarSecure apps, not directly by drivers. See</div><div class='add'>+ * SF-114946-SW.) NOTE - this message definition is provisional. It has not yet</div><div class='add'>+ * been used in any released code and may change during development. This note</div><div class='add'>+ * will be removed once it is regarded as stable.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_LEN 36</div><div class='add'>+/* identifies the type of operation requested */</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_OP_OFST 0</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_OP_LEN 4</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MC_CMD_GET_PARSER_DISP_INFO_IN/OP */</div><div class='add'>+/* a version number representing the set of rule lookups that are implemented</div><div class='add'>+ * by the currently running firmware</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_RULES_VERSION_OFST 4</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_RULES_VERSION_LEN 4</div><div class='add'>+/* enum: implements lookup sequences described in SF-114946-SW draft C */</div><div class='add'>+#define          MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_RULES_VERSION_SF_114946_SW_C 0x0</div><div class='add'>+/* the number of nodes in the subnet map */</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_NODES_OFST 8</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_NODES_LEN 4</div><div class='add'>+/* the number of entries in one subnet map node */</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_ENTRIES_PER_NODE_OFST 12</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_MAP_NUM_ENTRIES_PER_NODE_LEN 4</div><div class='add'>+/* minimum valid value for a subnet ID in a subnet map leaf */</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MIN_OFST 16</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MIN_LEN 4</div><div class='add'>+/* maximum valid value for a subnet ID in a subnet map leaf */</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MAX_OFST 20</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_SUBNET_ID_MAX_LEN 4</div><div class='add'>+/* the number of entries in the local and remote port range maps */</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_TREE_NUM_ENTRIES_OFST 24</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_TREE_NUM_ENTRIES_LEN 4</div><div class='add'>+/* minimum valid value for a portrange ID in a port range map leaf */</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MIN_OFST 28</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MIN_LEN 4</div><div class='add'>+/* maximum valid value for a portrange ID in a port range map leaf */</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MAX_OFST 32</div><div class='add'>+#define       MC_CMD_GET_PARSER_DISP_SECURITY_RULE_INFO_OUT_PORTRANGE_ID_MAX_LEN 4</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT msgresponse: This response is</div><div class='ctx'>  * returned if a MC_CMD_GET_PARSER_DISP_INFO_IN request is sent with OP value</div><div class='ctx'>  * OP_GET_SUPPORTED_VNIC_ENCAP_MATCHES. It contains information about the</div><div class='hunk'>@@ -12914,136 +13332,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_PARSER_DISP_RW</div><div class='del'>- * Direct read/write of parser-dispatcher state (DICPUs and LUE) for debugging.</div><div class='del'>- * Please note that this interface is only of use to debug tools which have</div><div class='del'>- * knowledge of firmware and hardware data structures; nothing here is intended</div><div class='del'>- * for use by normal driver code. Note that although this command is in the</div><div class='del'>- * Admin privilege group, in tamperproof adapters, only read operations are</div><div class='del'>- * permitted.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PARSER_DISP_RW 0xe5</div><div class='del'>-#undef MC_CMD_0xe5_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xe5_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PARSER_DISP_RW_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PARSER_DISP_RW_IN_LEN 32</div><div class='del'>-/* identifies the target of the operation */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_TARGET_OFST 0</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_TARGET_LEN 4</div><div class='del'>-/* enum: RX dispatcher CPU */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_RX_DICPU 0x0</div><div class='del'>-/* enum: TX dispatcher CPU */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_TX_DICPU 0x1</div><div class='del'>-/* enum: Lookup engine (with original metadata format). Deprecated; used only</div><div class='del'>- * by cmdclient as a fallback for very old Huntington firmware, and not</div><div class='del'>- * supported in firmware beyond v6.4.0.1005. Use LUE_VERSIONED_METADATA</div><div class='del'>- * instead.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_LUE 0x2</div><div class='del'>-/* enum: Lookup engine (with requested metadata format) */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_LUE_VERSIONED_METADATA 0x3</div><div class='del'>-/* enum: RX0 dispatcher CPU (alias for RX_DICPU; Medford has 2 RX DICPUs) */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_RX0_DICPU 0x0</div><div class='del'>-/* enum: RX1 dispatcher CPU (only valid for Medford) */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_RX1_DICPU 0x4</div><div class='del'>-/* enum: Miscellaneous other state (only valid for Medford) */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_MISC_STATE 0x5</div><div class='del'>-/* identifies the type of operation requested */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_OP_OFST 4</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_OP_LEN 4</div><div class='del'>-/* enum: Read a word of DICPU DMEM or a LUE entry */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_READ 0x0</div><div class='del'>-/* enum: Write a word of DICPU DMEM or a LUE entry. Not permitted on</div><div class='del'>- * tamperproof adapters.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_WRITE 0x1</div><div class='del'>-/* enum: Read-modify-write a word of DICPU DMEM (not valid for LUE). Not</div><div class='del'>- * permitted on tamperproof adapters.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_RMW 0x2</div><div class='del'>-/* data memory address (DICPU targets) or LUE index (LUE targets) */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_ADDRESS_OFST 8</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_ADDRESS_LEN 4</div><div class='del'>-/* selector (for MISC_STATE target) */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_SELECTOR_OFST 8</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_SELECTOR_LEN 4</div><div class='del'>-/* enum: Port to datapath mapping */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_IN_PORT_DP_MAPPING 0x1</div><div class='del'>-/* value to write (for DMEM writes) */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_DMEM_WRITE_VALUE_OFST 12</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_DMEM_WRITE_VALUE_LEN 4</div><div class='del'>-/* XOR value (for DMEM read-modify-writes: new = (old &amp; mask) ^ value) */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_XOR_VALUE_OFST 12</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_XOR_VALUE_LEN 4</div><div class='del'>-/* AND mask (for DMEM read-modify-writes: new = (old &amp; mask) ^ value) */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_AND_MASK_OFST 16</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_DMEM_RMW_AND_MASK_LEN 4</div><div class='del'>-/* metadata format (for LUE reads using LUE_VERSIONED_METADATA) */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_LUE_READ_METADATA_VERSION_OFST 12</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_LUE_READ_METADATA_VERSION_LEN 4</div><div class='del'>-/* value to write (for LUE writes) */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_LUE_WRITE_VALUE_OFST 12</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_IN_LUE_WRITE_VALUE_LEN 20</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PARSER_DISP_RW_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PARSER_DISP_RW_OUT_LEN 52</div><div class='del'>-/* value read (for DMEM reads) */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_OUT_DMEM_READ_VALUE_OFST 0</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_OUT_DMEM_READ_VALUE_LEN 4</div><div class='del'>-/* value read (for LUE reads) */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_OUT_LUE_READ_VALUE_OFST 0</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_OUT_LUE_READ_VALUE_LEN 20</div><div class='del'>-/* up to 8 32-bit words of additional soft state from the LUE manager (the</div><div class='del'>- * exact content is firmware-dependent and intended only for debug use)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_OUT_LUE_MGR_STATE_OFST 20</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_OUT_LUE_MGR_STATE_LEN 32</div><div class='del'>-/* datapath(s) used for each port (for MISC_STATE PORT_DP_MAPPING selector) */</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_OFST 0</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_LEN 4</div><div class='del'>-#define       MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_NUM 4</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_OUT_DP0 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_PARSER_DISP_RW_OUT_DP1 0x2 /* enum */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_PF_COUNT</div><div class='del'>- * Get number of PFs on the device.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_PF_COUNT 0xb6</div><div class='del'>-#undef MC_CMD_0xb6_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xb6_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PF_COUNT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_PF_COUNT_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PF_COUNT_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_PF_COUNT_OUT_LEN 1</div><div class='del'>-/* Identifies the number of PFs on the device. */</div><div class='del'>-#define       MC_CMD_GET_PF_COUNT_OUT_PF_COUNT_OFST 0</div><div class='del'>-#define       MC_CMD_GET_PF_COUNT_OUT_PF_COUNT_LEN 1</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SET_PF_COUNT</div><div class='del'>- * Set number of PFs on the device.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_PF_COUNT 0xb7</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_PF_COUNT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_PF_COUNT_IN_LEN 4</div><div class='del'>-/* New number of PFs on the device. */</div><div class='del'>-#define       MC_CMD_SET_PF_COUNT_IN_PF_COUNT_OFST 0</div><div class='del'>-#define       MC_CMD_SET_PF_COUNT_IN_PF_COUNT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_PF_COUNT_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_PF_COUNT_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_GET_PORT_ASSIGNMENT</div><div class='ctx'>  * Get port assignment for current PCI function.</div><div class='ctx'>  */</div><div class='hunk'>@@ -13069,25 +13357,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_SET_PORT_ASSIGNMENT</div><div class='del'>- * Set port assignment for current PCI function.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_PORT_ASSIGNMENT 0xb9</div><div class='del'>-#undef MC_CMD_0xb9_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xb9_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_PORT_ASSIGNMENT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_PORT_ASSIGNMENT_IN_LEN 4</div><div class='del'>-/* Identifies the port assignment for this function. */</div><div class='del'>-#define       MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_OFST 0</div><div class='del'>-#define       MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_PORT_ASSIGNMENT_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_PORT_ASSIGNMENT_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_ALLOC_VIS</div><div class='ctx'>  * Allocate VIs for current PCI function.</div><div class='ctx'>  */</div><div class='hunk'>@@ -13184,263 +13453,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_SET_SRIOV_CFG</div><div class='del'>- * Set SRIOV config for this PF.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_SRIOV_CFG 0xbb</div><div class='del'>-#undef MC_CMD_0xbb_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xbb_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_SRIOV_CFG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_SRIOV_CFG_IN_LEN 20</div><div class='del'>-/* Number of VFs currently enabled. */</div><div class='del'>-#define       MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_OFST 0</div><div class='del'>-#define       MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_LEN 4</div><div class='del'>-/* Max number of VFs before sriov stride and offset may need to be changed. */</div><div class='del'>-#define       MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_OFST 4</div><div class='del'>-#define       MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_LEN 4</div><div class='del'>-#define       MC_CMD_SET_SRIOV_CFG_IN_FLAGS_OFST 8</div><div class='del'>-#define       MC_CMD_SET_SRIOV_CFG_IN_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_OFST 8</div><div class='del'>-#define        MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_LBN 0</div><div class='del'>-#define        MC_CMD_SET_SRIOV_CFG_IN_VF_ENABLED_WIDTH 1</div><div class='del'>-/* RID offset of first VF from PF, or 0 for no change, or</div><div class='del'>- * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate an offset.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_OFST 12</div><div class='del'>-#define       MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_LEN 4</div><div class='del'>-/* RID offset of each subsequent VF from the previous, 0 for no change, or</div><div class='del'>- * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate a stride.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_OFST 16</div><div class='del'>-#define       MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_SRIOV_CFG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_SRIOV_CFG_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_VI_ALLOC_INFO</div><div class='del'>- * Get information about number of VI's and base VI number allocated to this</div><div class='del'>- * function. This message is not available to dynamic clients created by</div><div class='del'>- * MC_CMD_CLIENT_ALLOC.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_VI_ALLOC_INFO 0x8d</div><div class='del'>-#undef MC_CMD_0x8d_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x8d_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_VI_ALLOC_INFO_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_VI_ALLOC_INFO_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_VI_ALLOC_INFO_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_VI_ALLOC_INFO_OUT_LEN 12</div><div class='del'>-/* The number of VIs allocated on this function */</div><div class='del'>-#define       MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_OFST 0</div><div class='del'>-#define       MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_LEN 4</div><div class='del'>-/* The base absolute VI number allocated to this function. Required to</div><div class='del'>- * correctly interpret wakeup events.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_OFST 4</div><div class='del'>-#define       MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_LEN 4</div><div class='del'>-/* Function's port vi_shift value (always 0 on Huntington) */</div><div class='del'>-#define       MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_OFST 8</div><div class='del'>-#define       MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DUMP_VI_STATE</div><div class='del'>- * For CmdClient use. Dump pertinent information on a specific absolute VI. The</div><div class='del'>- * VI must be owned by the calling client or one of its ancestors; usership of</div><div class='del'>- * the VI (as set by MC_CMD_SET_VI_USER) is not sufficient.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DUMP_VI_STATE 0x8e</div><div class='del'>-#undef MC_CMD_0x8e_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x8e_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DUMP_VI_STATE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DUMP_VI_STATE_IN_LEN 4</div><div class='del'>-/* The VI number to query. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_OFST 0</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DUMP_VI_STATE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DUMP_VI_STATE_OUT_LEN 100</div><div class='del'>-/* The PF part of the function owning this VI. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST 0</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN 2</div><div class='del'>-/* The VF part of the function owning this VI. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_OWNER_VF_OFST 2</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_OWNER_VF_LEN 2</div><div class='del'>-/* Base of VIs allocated to this function. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_OFST 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_LEN 2</div><div class='del'>-/* Count of VIs allocated to the owner function. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_COUNT_OFST 6</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_COUNT_LEN 2</div><div class='del'>-/* Base interrupt vector allocated to this function. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_BASE_OFST 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_BASE_LEN 2</div><div class='del'>-/* Number of interrupt vectors allocated to this function. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_COUNT_OFST 10</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_FUNC_VECTOR_COUNT_LEN 2</div><div class='del'>-/* Raw evq ptr table data. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST 12</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST 12</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LBN 96</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST 16</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LBN 128</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_WIDTH 32</div><div class='del'>-/* Raw evq timer table data. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST 20</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST 20</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LBN 160</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST 24</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LBN 192</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_WIDTH 32</div><div class='del'>-/* Combined metadata field. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST 28</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_OFST 28</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_LBN 0</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_BASE_WIDTH 16</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_OFST 28</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_LBN 16</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_BUFS_NPAGES_WIDTH 8</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_OFST 28</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_LBN 24</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_WKUP_REF_WIDTH 8</div><div class='del'>-/* TXDPCPU raw table data for queue. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LBN 256</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST 36</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LBN 288</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_WIDTH 32</div><div class='del'>-/* TXDPCPU raw table data for queue. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST 40</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST 40</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LBN 320</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST 44</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LBN 352</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_WIDTH 32</div><div class='del'>-/* TXDPCPU raw table data for queue. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST 48</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST 48</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LBN 384</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST 52</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LBN 416</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_WIDTH 32</div><div class='del'>-/* Combined metadata field. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST 56</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST 56</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LBN 448</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST 60</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LBN 480</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_WIDTH 32</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_OFST 56</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN 0</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH 16</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_OFST 56</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_LBN 16</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_NPAGES_WIDTH 8</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_OFST 56</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_LBN 24</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_QSTATE_WIDTH 8</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_OFST 56</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_LBN 32</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_WAITCOUNT_WIDTH 8</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_OFST 56</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_LBN 40</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_PADDING_WIDTH 24</div><div class='del'>-/* RXDPCPU raw table data for queue. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST 64</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST 64</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LBN 512</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST 68</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LBN 544</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_WIDTH 32</div><div class='del'>-/* RXDPCPU raw table data for queue. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST 72</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST 72</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LBN 576</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST 76</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LBN 608</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_WIDTH 32</div><div class='del'>-/* Reserved, currently 0. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST 80</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST 80</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LBN 640</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST 84</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LBN 672</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_WIDTH 32</div><div class='del'>-/* Combined metadata field. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST 88</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN 8</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST 88</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LBN 704</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST 92</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LBN 736</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_WIDTH 32</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_OFST 88</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN 0</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH 16</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_OFST 88</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_LBN 16</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_NPAGES_WIDTH 8</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_OFST 88</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_LBN 24</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_QSTATE_WIDTH 8</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_OFST 88</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN 32</div><div class='del'>-#define        MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH 8</div><div class='del'>-/* Current user, as assigned by MC_CMD_SET_VI_USER. */</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_OFST 96</div><div class='del'>-#define       MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_ALLOC_PIOBUF</div><div class='ctx'>  * Allocate a push I/O buffer for later use with a tx queue.</div><div class='ctx'>  */</div><div class='hunk'>@@ -13491,354 +13503,102 @@</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_GET_VI_TLP_PROCESSING_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_GET_VI_TLP_PROCESSING_IN_LEN 4</div><div class='del'>-/* VI number to get information for. */</div><div class='add'>+/* Queue handle, encodes queue type and VI number to get information for. */</div><div class='ctx'> #define       MC_CMD_GET_VI_TLP_PROCESSING_IN_INSTANCE_OFST 0</div><div class='ctx'> #define       MC_CMD_GET_VI_TLP_PROCESSING_IN_INSTANCE_LEN 4</div><div class='ctx'> </div><div class='del'>-/* MC_CMD_GET_VI_TLP_PROCESSING_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_VI_TLP_PROCESSING_OUT_LEN 4</div><div class='del'>-/* Transaction processing steering hint 1 for use with the Rx Queue. */</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG1_RX_OFST 0</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG1_RX_LEN 1</div><div class='del'>-/* Transaction processing steering hint 2 for use with the Ev Queue. */</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG2_EV_OFST 1</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_TAG2_EV_LEN 1</div><div class='del'>-/* Use Relaxed ordering model for TLPs on this VI. */</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_RELAXED_ORDERING_LBN 16</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_RELAXED_ORDERING_WIDTH 1</div><div class='del'>-/* Use ID based ordering for TLPs on this VI. */</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_ID_BASED_ORDERING_LBN 17</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_ID_BASED_ORDERING_WIDTH 1</div><div class='del'>-/* Set no snoop bit for TLPs on this VI. */</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_NO_SNOOP_LBN 18</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_NO_SNOOP_WIDTH 1</div><div class='del'>-/* Enable TPH for TLPs on this VI. */</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_ON_LBN 19</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_TPH_ON_WIDTH 1</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_GET_VI_TLP_PROCESSING_OUT_DATA_LEN 4</div><div class='add'>+/* MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT msgresponse: This message has the same</div><div class='add'>+ * layout as GET_VI_TLP_PROCESSING_OUT, but with corrected field ordering to</div><div class='add'>+ * simplify use in drivers</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_LEN 4</div><div class='add'>+#define       MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_DATA_OFST 0</div><div class='add'>+#define       MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_DATA_LEN 4</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG1_RX_OFST 0</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG1_RX_LBN 0</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG1_RX_WIDTH 8</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG2_EV_OFST 0</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG2_EV_LBN 8</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_TAG2_EV_WIDTH 8</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_LBN 16</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_PACKET_DATA_OFST 0</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_PACKET_DATA_LBN 16</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_PACKET_DATA_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_ID_BASED_ORDERING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_ID_BASED_ORDERING_LBN 17</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_ID_BASED_ORDERING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_NO_SNOOP_OFST 0</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_NO_SNOOP_LBN 18</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_NO_SNOOP_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_ON_OFST 0</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_ON_LBN 19</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_TPH_ON_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_SYNC_DATA_OFST 0</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_SYNC_DATA_LBN 20</div><div class='add'>+#define        MC_CMD_GET_VI_TLP_PROCESSING_V2_OUT_RELAXED_ORDERING_SYNC_DATA_WIDTH 1</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_SET_VI_TLP_PROCESSING</div><div class='ctx'>  * Set TLP steering and ordering information for a VI. The caller must have the</div><div class='ctx'>  * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or</div><div class='del'>- * an ancestor of the current user (see MC_CMD_SET_VI_USER).</div><div class='add'>+ * an ancestor of the current user (see MC_CMD_SET_VI_USER). Note that LL</div><div class='add'>+ * queues require this to be called after allocation but before initialisation</div><div class='add'>+ * of the queue. TLP options of a queue are fixed after queue is initialised,</div><div class='add'>+ * with the values set to current global value or they can be overriden using</div><div class='add'>+ * this command. At LL queue allocation, all overrides are cleared.</div><div class='ctx'>  */</div><div class='ctx'> #define MC_CMD_SET_VI_TLP_PROCESSING 0xb1</div><div class='ctx'> #undef MC_CMD_0xb1_PRIVILEGE_CTG</div><div class='ctx'> </div><div class='ctx'> #define MC_CMD_0xb1_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='ctx'> </div><div class='del'>-/* MC_CMD_SET_VI_TLP_PROCESSING_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_VI_TLP_PROCESSING_IN_LEN 8</div><div class='del'>-/* VI number to set information for. */</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_INSTANCE_OFST 0</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_INSTANCE_LEN 4</div><div class='del'>-/* Transaction processing steering hint 1 for use with the Rx Queue. */</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG1_RX_OFST 4</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG1_RX_LEN 1</div><div class='del'>-/* Transaction processing steering hint 2 for use with the Ev Queue. */</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG2_EV_OFST 5</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_TAG2_EV_LEN 1</div><div class='del'>-/* Use Relaxed ordering model for TLPs on this VI. */</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_RELAXED_ORDERING_LBN 48</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_RELAXED_ORDERING_WIDTH 1</div><div class='del'>-/* Use ID based ordering for TLPs on this VI. */</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_ID_BASED_ORDERING_LBN 49</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_ID_BASED_ORDERING_WIDTH 1</div><div class='del'>-/* Set the no snoop bit for TLPs on this VI. */</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_NO_SNOOP_LBN 50</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_NO_SNOOP_WIDTH 1</div><div class='del'>-/* Enable TPH for TLPs on this VI. */</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_ON_LBN 51</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_TPH_ON_WIDTH 1</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_DATA_OFST 4</div><div class='del'>-#define       MC_CMD_SET_VI_TLP_PROCESSING_IN_DATA_LEN 4</div><div class='add'>+/* MC_CMD_SET_VI_TLP_PROCESSING_V2_IN msgrequest: This message has the same</div><div class='add'>+ * layout as SET_VI_TLP_PROCESSING_OUT, but with corrected field ordering to</div><div class='add'>+ * simplify use in drivers.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_LEN 8</div><div class='add'>+/* Queue handle, encodes queue type and VI number to set information for. */</div><div class='add'>+#define       MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_INSTANCE_OFST 0</div><div class='add'>+#define       MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_INSTANCE_LEN 4</div><div class='add'>+#define       MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_DATA_OFST 4</div><div class='add'>+#define       MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_DATA_LEN 4</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG1_RX_OFST 4</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG1_RX_LBN 0</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG1_RX_WIDTH 8</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG2_EV_OFST 4</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG2_EV_LBN 8</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_TAG2_EV_WIDTH 8</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_OFST 4</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_LBN 16</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_WIDTH 1</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_PACKET_DATA_OFST 4</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_PACKET_DATA_LBN 16</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_PACKET_DATA_WIDTH 1</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_ID_BASED_ORDERING_OFST 4</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_ID_BASED_ORDERING_LBN 17</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_ID_BASED_ORDERING_WIDTH 1</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_NO_SNOOP_OFST 4</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_NO_SNOOP_LBN 18</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_NO_SNOOP_WIDTH 1</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_ON_OFST 4</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_ON_LBN 19</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_TPH_ON_WIDTH 1</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_SYNC_DATA_OFST 4</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_SYNC_DATA_LBN 20</div><div class='add'>+#define        MC_CMD_SET_VI_TLP_PROCESSING_V2_IN_RELAXED_ORDERING_SYNC_DATA_WIDTH 1</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_SET_VI_TLP_PROCESSING_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_SET_VI_TLP_PROCESSING_OUT_LEN 0</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_GET_TLP_PROCESSING_GLOBALS</div><div class='del'>- * Get global PCIe steering and transaction processing configuration.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_TLP_PROCESSING_GLOBALS 0xbc</div><div class='del'>-#undef MC_CMD_0xbc_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xbc_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_LEN 4</div><div class='del'>-#define       MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_OFST 0</div><div class='del'>-#define       MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_LEN 4</div><div class='del'>-/* enum: MISC. */</div><div class='del'>-#define          MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_MISC 0x0</div><div class='del'>-/* enum: IDO. */</div><div class='del'>-#define          MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_IDO 0x1</div><div class='del'>-/* enum: RO. */</div><div class='del'>-#define          MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_RO 0x2</div><div class='del'>-/* enum: TPH Type. */</div><div class='del'>-#define          MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_TPH_TYPE 0x3</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_LEN 8</div><div class='del'>-#define       MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_GLOBAL_CATEGORY_OFST 0</div><div class='del'>-#define       MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_GLOBAL_CATEGORY_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN/TLP_GLOBAL_CATEGORY */</div><div class='del'>-/* Amalgamated TLP info word. */</div><div class='del'>-#define       MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_WORD_OFST 4</div><div class='del'>-#define       MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_WORD_LEN 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_LBN 0</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_WTAG_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_LBN 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_MISC_SPARE_WIDTH 31</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_LBN 0</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_DL_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_LBN 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_TX_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_LBN 2</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_EV_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_LBN 3</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_RX_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_LBN 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_IDO_SPARE_WIDTH 28</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_LBN 0</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_RXDMA_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_LBN 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_TXDMA_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_LBN 2</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_DL_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_LBN 3</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_RO_SPARE_WIDTH 29</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_LBN 0</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_MSIX_WIDTH 2</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_LBN 2</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_DL_WIDTH 2</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_LBN 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_TX_WIDTH 2</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_LBN 6</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_EV_WIDTH 2</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_LBN 8</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TPH_TYPE_RX_WIDTH 2</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_OFST 4</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_LBN 9</div><div class='del'>-#define        MC_CMD_GET_TLP_PROCESSING_GLOBALS_OUT_TLP_INFO_TLP_TYPE_SPARE_WIDTH 23</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SET_TLP_PROCESSING_GLOBALS</div><div class='del'>- * Set global PCIe steering and transaction processing configuration.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_TLP_PROCESSING_GLOBALS 0xbd</div><div class='del'>-#undef MC_CMD_0xbd_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xbd_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_LEN 8</div><div class='del'>-#define       MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_OFST 0</div><div class='del'>-#define       MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_GLOBAL_CATEGORY_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               MC_CMD_GET_TLP_PROCESSING_GLOBALS/MC_CMD_GET_TLP_PROCESSING_GLOBALS_IN/TLP_GLOBAL_CATEGORY */</div><div class='del'>-/* Amalgamated TLP info word. */</div><div class='del'>-#define       MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_WORD_OFST 4</div><div class='del'>-#define       MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_WORD_LEN 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_LBN 0</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_MISC_WTAG_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_LBN 0</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_DL_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_LBN 1</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_TX_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_LBN 2</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_EV_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_LBN 3</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_IDO_RX_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_LBN 0</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_RXDMA_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_LBN 1</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_TXDMA_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_LBN 2</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_RO_DL_EN_WIDTH 1</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_LBN 0</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_MSIX_WIDTH 2</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_LBN 2</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_DL_WIDTH 2</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_LBN 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_TX_WIDTH 2</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_LBN 6</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_EV_WIDTH 2</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_LBN 8</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_TPH_TYPE_RX_WIDTH 2</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_OFST 4</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_LBN 10</div><div class='del'>-#define        MC_CMD_SET_TLP_PROCESSING_GLOBALS_IN_TLP_INFO_SPARE_WIDTH 22</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_TLP_PROCESSING_GLOBALS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_TLP_PROCESSING_GLOBALS_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SATELLITE_DOWNLOAD</div><div class='del'>- * Download a new set of images to the satellite CPUs from the host.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SATELLITE_DOWNLOAD 0x91</div><div class='del'>-#undef MC_CMD_0x91_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x91_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SATELLITE_DOWNLOAD_IN msgrequest: The reset requirements for the CPUs</div><div class='del'>- * are subtle, and so downloads must proceed in a number of phases.</div><div class='del'>- *</div><div class='del'>- * 1) PHASE_RESET with a target of TARGET_ALL and chunk ID/length of 0.</div><div class='del'>- *</div><div class='del'>- * 2) PHASE_IMEMS for each of the IMEM targets (target IDs 0-11). Each download</div><div class='del'>- * may consist of multiple chunks. The final chunk (with CHUNK_ID_LAST) should</div><div class='del'>- * be a checksum (a simple 32-bit sum) of the transferred data. An individual</div><div class='del'>- * download may be aborted using CHUNK_ID_ABORT.</div><div class='del'>- *</div><div class='del'>- * 3) PHASE_VECTORS for each of the vector table targets (target IDs 12-15),</div><div class='del'>- * similar to PHASE_IMEMS.</div><div class='del'>- *</div><div class='del'>- * 4) PHASE_READY with a target of TARGET_ALL and chunk ID/length of 0.</div><div class='del'>- *</div><div class='del'>- * After any error (a requested abort is not considered to be an error) the</div><div class='del'>- * sequence must be restarted from PHASE_RESET.</div><div class='del'>- */</div><div class='del'>-#define    MC_CMD_SATELLITE_DOWNLOAD_IN_LENMIN 20</div><div class='del'>-#define    MC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_SATELLITE_DOWNLOAD_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_SATELLITE_DOWNLOAD_IN_LEN(num) (16+4*(num))</div><div class='del'>-#define    MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_NUM(len) (((len)-16)/4)</div><div class='del'>-/* Download phase. (Note: the IDLE phase is used internally and is never valid</div><div class='del'>- * in a command from the host.)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_OFST 0</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_LEN 4</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_IDLE 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_RESET 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_IMEMS 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_VECTORS 0x3 /* enum */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_PHASE_READY 0x4 /* enum */</div><div class='del'>-/* Target for download. (These match the blob numbers defined in</div><div class='del'>- * mc_flash_layout.h.)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_OFST 4</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_LEN 4</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_TEXT 0x0</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_TEXT 0x1</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDP_TEXT 0x2</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDP_TEXT 0x3</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_LUT 0x4</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_LUT_CFG 0x5</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_LUT 0x6</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_LUT_CFG 0x7</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_HR_PGM 0x8</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXHRSL_SL_PGM 0x9</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_HR_PGM 0xa</div><div class='del'>-/* enum: Valid in phase 2 (PHASE_IMEMS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXHRSL_SL_PGM 0xb</div><div class='del'>-/* enum: Valid in phase 3 (PHASE_VECTORS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_VTBL0 0xc</div><div class='del'>-/* enum: Valid in phase 3 (PHASE_VECTORS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_VTBL0 0xd</div><div class='del'>-/* enum: Valid in phase 3 (PHASE_VECTORS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_RXDI_VTBL1 0xe</div><div class='del'>-/* enum: Valid in phase 3 (PHASE_VECTORS) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_TXDI_VTBL1 0xf</div><div class='del'>-/* enum: Valid in phases 1 (PHASE_RESET) and 4 (PHASE_READY) only */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_TARGET_ALL 0xffffffff</div><div class='del'>-/* Chunk ID, or CHUNK_ID_LAST or CHUNK_ID_ABORT */</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_OFST 8</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_LEN 4</div><div class='del'>-/* enum: Last chunk, containing checksum rather than data */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_LAST 0xffffffff</div><div class='del'>-/* enum: Abort download of this item */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_ID_ABORT 0xfffffffe</div><div class='del'>-/* Length of this chunk in bytes */</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_LEN_OFST 12</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_LEN_LEN 4</div><div class='del'>-/* Data for this chunk */</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_OFST 16</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_LEN 4</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MINNUM 1</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MAXNUM 59</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_IN_CHUNK_DATA_MAXNUM_MCDI2 251</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SATELLITE_DOWNLOAD_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SATELLITE_DOWNLOAD_OUT_LEN 8</div><div class='del'>-/* Same as MC_CMD_ERR field, but included as 0 in success cases */</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_OUT_RESULT_OFST 0</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_OUT_RESULT_LEN 4</div><div class='del'>-/* Extra status information */</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_OUT_INFO_OFST 4</div><div class='del'>-#define       MC_CMD_SATELLITE_DOWNLOAD_OUT_INFO_LEN 4</div><div class='del'>-/* enum: Code download OK, completed. */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_COMPLETE 0x0</div><div class='del'>-/* enum: Code download aborted as requested. */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_ABORTED 0x1</div><div class='del'>-/* enum: Code download OK so far, send next chunk. */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_OUT_OK_NEXT_CHUNK 0x2</div><div class='del'>-/* enum: Download phases out of sequence */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_PHASE 0x100</div><div class='del'>-/* enum: Bad target for this phase */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_TARGET 0x101</div><div class='del'>-/* enum: Chunk ID out of sequence */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHUNK_ID 0x200</div><div class='del'>-/* enum: Chunk length zero or too large */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHUNK_LEN 0x201</div><div class='del'>-/* enum: Checksum was incorrect */</div><div class='del'>-#define          MC_CMD_SATELLITE_DOWNLOAD_OUT_ERR_BAD_CHECKSUM 0x300</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_GET_CAPABILITIES</div><div class='del'>- * Get device capabilities.</div><div class='del'>- *</div><div class='del'>- * This is supplementary to the MC_CMD_GET_BOARD_CFG command, and intended to</div><div class='del'>- * reference inherent device capabilities as opposed to current NVRAM config.</div><div class='add'>+ * Get device capabilities. This is supplementary to the MC_CMD_GET_BOARD_CFG</div><div class='add'>+ * command, and intended to reference inherent device capabilities as opposed</div><div class='add'>+ * to current NVRAM config.</div><div class='ctx'>  */</div><div class='ctx'> #define MC_CMD_GET_CAPABILITIES 0xbe</div><div class='ctx'> #undef MC_CMD_0xbe_PRIVILEGE_CTG</div><div class='hunk'>@@ -14490,7 +14250,10 @@</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V2_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='ctx'> /* enum: PF does not exist. */</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V2_OUT_PF_NOT_PRESENT 0xfe */</div><div class='del'>-/* Number of VIs available for each external port */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='hunk'>@@ -14900,7 +14663,10 @@</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V3_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='ctx'> /* enum: PF does not exist. */</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V3_OUT_PF_NOT_PRESENT 0xfe */</div><div class='del'>-/* Number of VIs available for each external port */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='hunk'>@@ -15335,7 +15101,10 @@</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V4_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='ctx'> /* enum: PF does not exist. */</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V4_OUT_PF_NOT_PRESENT 0xfe */</div><div class='del'>-/* Number of VIs available for each external port */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='hunk'>@@ -15778,7 +15547,10 @@</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V5_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='ctx'> /* enum: PF does not exist. */</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V5_OUT_PF_NOT_PRESENT 0xfe */</div><div class='del'>-/* Number of VIs available for each external port */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='hunk'>@@ -16226,7 +15998,10 @@</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V6_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='ctx'> /* enum: PF does not exist. */</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V6_OUT_PF_NOT_PRESENT 0xfe */</div><div class='del'>-/* Number of VIs available for each external port */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='hunk'>@@ -16685,7 +16460,10 @@</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V7_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='ctx'> /* enum: PF does not exist. */</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V7_OUT_PF_NOT_PRESENT 0xfe */</div><div class='del'>-/* Number of VIs available for each external port */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='hunk'>@@ -16796,9 +16574,21 @@</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_LBN 15</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_LBN 17</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_WIDTH 1</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160</div><div class='hunk'>@@ -17189,7 +16979,10 @@</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V8_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='ctx'> /* enum: PF does not exist. */</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V8_OUT_PF_NOT_PRESENT 0xfe */</div><div class='del'>-/* Number of VIs available for each external port */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='hunk'>@@ -17300,9 +17093,21 @@</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_LBN 15</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_CXL_CONFIG_ENABLE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_CXL_CONFIG_ENABLE_LBN 17</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V8_OUT_CXL_CONFIG_ENABLE_WIDTH 1</div><div class='ctx'> /* These bits are reserved for communicating test-specific capabilities to</div><div class='ctx'>  * host-side test software. All production drivers should treat this field as</div><div class='ctx'>  * opaque.</div><div class='hunk'>@@ -17707,7 +17512,10 @@</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V9_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='ctx'> /* enum: PF does not exist. */</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V9_OUT_PF_NOT_PRESENT 0xfe */</div><div class='del'>-/* Number of VIs available for each external port */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='hunk'>@@ -17818,9 +17626,21 @@</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_LBN 15</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_CXL_CONFIG_ENABLE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_CXL_CONFIG_ENABLE_LBN 17</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V9_OUT_CXL_CONFIG_ENABLE_WIDTH 1</div><div class='ctx'> /* These bits are reserved for communicating test-specific capabilities to</div><div class='ctx'>  * host-side test software. All production drivers should treat this field as</div><div class='ctx'>  * opaque.</div><div class='hunk'>@@ -18260,7 +18080,10 @@</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V10_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='ctx'> /* enum: PF does not exist. */</div><div class='ctx'> /*               MC_CMD_GET_CAPABILITIES_V10_OUT_PF_NOT_PRESENT 0xfe */</div><div class='del'>-/* Number of VIs available for each external port */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V10_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V10_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V10_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='hunk'>@@ -18371,9 +18194,21 @@</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14</div><div class='ctx'> #define        MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_LBN 15</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_CXL_CONFIG_ENABLE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_CXL_CONFIG_ENABLE_LBN 17</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V10_OUT_CXL_CONFIG_ENABLE_WIDTH 1</div><div class='ctx'> /* These bits are reserved for communicating test-specific capabilities to</div><div class='ctx'>  * host-side test software. All production drivers should treat this field as</div><div class='ctx'>  * opaque.</div><div class='hunk'>@@ -18438,6 +18273,1182 @@</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V10_OUT_GUARANTEED_QUEUE_SIZES_OFST 188</div><div class='ctx'> #define       MC_CMD_GET_CAPABILITIES_V10_OUT_GUARANTEED_QUEUE_SIZES_LEN 4</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_GET_CAPABILITIES_V11_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_GET_CAPABILITIES_V11_OUT_LEN 196</div><div class='add'>+/* First word of flags. */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS1_OFST 0</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS1_LEN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VPORT_RECONFIGURE_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VPORT_RECONFIGURE_LBN 3</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VPORT_RECONFIGURE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_STRIPING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_STRIPING_LBN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_STRIPING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_QUERY_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_QUERY_LBN 5</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_QUERY_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_PORT_VLAN_RESTRICT_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_PORT_VLAN_RESTRICT_LBN 6</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_DRV_ATTACH_PREBOOT_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_DRV_ATTACH_PREBOOT_LBN 7</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_DRV_ATTACH_PREBOOT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_FORCE_EVENT_MERGING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_FORCE_EVENT_MERGING_LBN 8</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_SET_MAC_ENHANCED_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_SET_MAC_ENHANCED_LBN 9</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_SET_MAC_ENHANCED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN 10</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN 11</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_SECURITY_FILTERING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_SECURITY_FILTERING_LBN 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_ADDITIONAL_RSS_MODES_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_ADDITIONAL_RSS_MODES_LBN 13</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_ADDITIONAL_RSS_MODES_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_QBB_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_QBB_LBN 14</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_QBB_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN 15</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_RSS_LIMITED_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_RSS_LIMITED_LBN 16</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_RSS_LIMITED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_LBN 17</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PACKED_STREAM_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_INCLUDE_FCS_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_INCLUDE_FCS_LBN 18</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_INCLUDE_FCS_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VLAN_INSERTION_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VLAN_INSERTION_LBN 19</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VLAN_INSERTION_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_LBN 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_LBN 21</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_0_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_0_LBN 22</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_0_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_14_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_14_LBN 23</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_PREFIX_LEN_14_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_TIMESTAMP_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_TIMESTAMP_LBN 24</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_TIMESTAMP_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_BATCHING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_BATCHING_LBN 25</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_BATCHING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MCAST_FILTER_CHAINING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MCAST_FILTER_CHAINING_LBN 26</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MCAST_FILTER_CHAINING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_PM_AND_RXDP_COUNTERS_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_PM_AND_RXDP_COUNTERS_LBN 27</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DISABLE_SCATTER_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DISABLE_SCATTER_LBN 28</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DISABLE_SCATTER_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MCAST_UDP_LOOPBACK_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MCAST_UDP_LOOPBACK_LBN 29</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_LBN 30</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVB_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VXLAN_NVGRE_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VXLAN_NVGRE_LBN 31</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VXLAN_NVGRE_WIDTH 1</div><div class='add'>+/* RxDPCPU firmware id. */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DPCPU_FW_ID_OFST 4</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DPCPU_FW_ID_LEN 2</div><div class='add'>+/* enum: Standard RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP 0x0</div><div class='add'>+/* enum: Low latency RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_LOW_LATENCY 0x1</div><div class='add'>+/* enum: Packed stream RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_PACKED_STREAM 0x2</div><div class='add'>+/* enum: Rules engine RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_RULES_ENGINE 0x5</div><div class='add'>+/* enum: DPDK RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_DPDK 0x6</div><div class='add'>+/* enum: BIST RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_BIST 0x10a</div><div class='add'>+/* enum: RXDP Test firmware image 1 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH 0x101</div><div class='add'>+/* enum: RXDP Test firmware image 2 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD 0x102</div><div class='add'>+/* enum: RXDP Test firmware image 3 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST 0x103</div><div class='add'>+/* enum: RXDP Test firmware image 4 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE 0x104</div><div class='add'>+/* enum: RXDP Test firmware image 5 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_BACKPRESSURE 0x105</div><div class='add'>+/* enum: RXDP Test firmware image 6 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_PACKET_EDITS 0x106</div><div class='add'>+/* enum: RXDP Test firmware image 7 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_RX_HDR_SPLIT 0x107</div><div class='add'>+/* enum: RXDP Test firmware image 8 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_DISABLE_DL 0x108</div><div class='add'>+/* enum: RXDP Test firmware image 9 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_DOORBELL_DELAY 0x10b</div><div class='add'>+/* enum: RXDP Test firmware image 10 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_TEST_FW_SLOW 0x10c</div><div class='add'>+/* TxDPCPU firmware id. */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DPCPU_FW_ID_OFST 6</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DPCPU_FW_ID_LEN 2</div><div class='add'>+/* enum: Standard TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP 0x0</div><div class='add'>+/* enum: Low latency TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_LOW_LATENCY 0x1</div><div class='add'>+/* enum: High packet rate TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_HIGH_PACKET_RATE 0x3</div><div class='add'>+/* enum: Rules engine TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_RULES_ENGINE 0x5</div><div class='add'>+/* enum: DPDK TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_DPDK 0x6</div><div class='add'>+/* enum: BIST TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_BIST 0x12d</div><div class='add'>+/* enum: TXDP Test firmware image 1 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_TEST_FW_TSO_EDIT 0x101</div><div class='add'>+/* enum: TXDP Test firmware image 2 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_TEST_FW_PACKET_EDITS 0x102</div><div class='add'>+/* enum: TXDP CSR bus test firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXDP_TEST_FW_CSR 0x103</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_OFST 8</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_LEN 2</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_REV_OFST 8</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_REV_LBN 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_REV_WIDTH 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_TYPE_OFST 8</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_TYPE_LBN 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4</div><div class='add'>+/* enum: reserved value - do not use (may indicate alternative interpretation</div><div class='add'>+ * of REV field in future)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_RESERVED 0x0</div><div class='add'>+/* enum: Trivial RX PD firmware for early Huntington development (Huntington</div><div class='add'>+ * development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1</div><div class='add'>+/* enum: RX PD firmware for telemetry prototyping (Medford2 development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1</div><div class='add'>+/* enum: RX PD firmware with approximately Siena-compatible behaviour</div><div class='add'>+ * (Huntington development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_SIENA_COMPAT 0x2</div><div class='add'>+/* enum: Full featured RX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_FULL_FEATURED 0x3</div><div class='add'>+/* enum: (deprecated original name for the FULL_FEATURED variant) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_VSWITCH 0x3</div><div class='add'>+/* enum: siena_compat variant RX PD firmware using PM rather than MAC</div><div class='add'>+ * (Huntington development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM 0x4</div><div class='add'>+/* enum: Low latency RX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_LOW_LATENCY 0x5</div><div class='add'>+/* enum: Packed stream RX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_PACKED_STREAM 0x6</div><div class='add'>+/* enum: RX PD firmware handling layer 2 only for high packet rate performance</div><div class='add'>+ * tests (Medford development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7</div><div class='add'>+/* enum: Rules engine RX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_RULES_ENGINE 0x8</div><div class='add'>+/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_L3XUDP 0x9</div><div class='add'>+/* enum: DPDK RX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_DPDK 0xa</div><div class='add'>+/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe</div><div class='add'>+/* enum: RX PD firmware parsing but not filtering network overlay tunnel</div><div class='add'>+ * encapsulations (Medford development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY 0xf</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_OFST 10</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_LEN 2</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_REV_OFST 10</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_REV_LBN 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_REV_WIDTH 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_TYPE_OFST 10</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_TYPE_LBN 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4</div><div class='add'>+/* enum: reserved value - do not use (may indicate alternative interpretation</div><div class='add'>+ * of REV field in future)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_RESERVED 0x0</div><div class='add'>+/* enum: Trivial TX PD firmware for early Huntington development (Huntington</div><div class='add'>+ * development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1</div><div class='add'>+/* enum: TX PD firmware for telemetry prototyping (Medford2 development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1</div><div class='add'>+/* enum: TX PD firmware with approximately Siena-compatible behaviour</div><div class='add'>+ * (Huntington development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_SIENA_COMPAT 0x2</div><div class='add'>+/* enum: Full featured TX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_FULL_FEATURED 0x3</div><div class='add'>+/* enum: (deprecated original name for the FULL_FEATURED variant) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_VSWITCH 0x3</div><div class='add'>+/* enum: siena_compat variant TX PD firmware using PM rather than MAC</div><div class='add'>+ * (Huntington development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM 0x4</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_LOW_LATENCY 0x5 /* enum */</div><div class='add'>+/* enum: TX PD firmware handling layer 2 only for high packet rate performance</div><div class='add'>+ * tests (Medford development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7</div><div class='add'>+/* enum: Rules engine TX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_RULES_ENGINE 0x8</div><div class='add'>+/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_L3XUDP 0x9</div><div class='add'>+/* enum: DPDK TX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_DPDK 0xa</div><div class='add'>+/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe</div><div class='add'>+/* Hardware capabilities of NIC */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_HW_CAPABILITIES_OFST 12</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_HW_CAPABILITIES_LEN 4</div><div class='add'>+/* Licensed capabilities */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_LICENSE_CAPABILITIES_OFST 16</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_LICENSE_CAPABILITIES_LEN 4</div><div class='add'>+/* Second word of flags. Not present on older firmware (check the length). */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS2_OFST 20</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS2_LEN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_LBN 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_ENCAP_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_ENCAP_LBN 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_ENCAP_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVQ_TIMER_CTRL_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVQ_TIMER_CTRL_LBN 2</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVQ_TIMER_CTRL_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVENT_CUT_THROUGH_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVENT_CUT_THROUGH_LBN 3</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EVENT_CUT_THROUGH_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_CUT_THROUGH_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_CUT_THROUGH_LBN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_CUT_THROUGH_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VFIFO_ULL_MODE_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VFIFO_ULL_MODE_LBN 5</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_VFIFO_ULL_MODE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN 6</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN 7</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_V2_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_V2_LBN 7</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_EVQ_V2_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_TIMESTAMPING_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_TIMESTAMPING_LBN 8</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_MAC_TIMESTAMPING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TIMESTAMP_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TIMESTAMP_LBN 9</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TIMESTAMP_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_SNIFF_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_SNIFF_LBN 10</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_SNIFF_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_SNIFF_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_SNIFF_LBN 11</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_SNIFF_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_BACKGROUND_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_BACKGROUND_LBN 13</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_BACKGROUND_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_DB_RETURN_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_DB_RETURN_LBN 14</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MCDI_DB_RETURN_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_CTPIO_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_CTPIO_LBN 15</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_CTPIO_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_SUPPORT_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_SUPPORT_LBN 16</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_SUPPORT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_BOUND_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_BOUND_LBN 17</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TSA_BOUND_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_SF_ADAPTER_AUTHENTICATION_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_SF_ADAPTER_AUTHENTICATION_LBN 18</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_FLAG_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_FLAG_LBN 19</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_FLAG_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_LBN 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN 21</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN 21</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_L3XUDP_SUPPORT_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_L3XUDP_SUPPORT_LBN 22</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_L3XUDP_SUPPORT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN 23</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VI_SPREADING_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VI_SPREADING_LBN 24</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VI_SPREADING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_HLB_IDLE_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_HLB_IDLE_LBN 25</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RXDP_HLB_IDLE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_NO_CONT_EV_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_NO_CONT_EV_LBN 26</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_BUNDLE_UPDATE_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_BUNDLE_UPDATE_LBN 28</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_BUNDLE_UPDATE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V3_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V3_LBN 29</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V3_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_SENSORS_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_SENSORS_LBN 30</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_SENSORS_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1</div><div class='add'>+/* Number of FATSOv2 contexts per datapath supported by this NIC (when</div><div class='add'>+ * TX_TSO_V2 == 1). Not present on older firmware (check the length).</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2</div><div class='add'>+/* One byte per PF containing the number of the external port assigned to this</div><div class='add'>+ * PF, indexed by PF number. Special values indicate that a PF is either not</div><div class='add'>+ * present or not assigned.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST 26</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM 16</div><div class='add'>+/* enum: The caller is not permitted to access information on this PF. */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_ACCESS_NOT_PERMITTED 0xff</div><div class='add'>+/* enum: PF does not exist. */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_PF_NOT_PRESENT 0xfe</div><div class='add'>+/* enum: PF does exist but is not assigned to any external port. */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_PF_NOT_ASSIGNED 0xfd</div><div class='add'>+/* enum: This value indicates that PF is assigned, but it cannot be expressed</div><div class='add'>+ * in this field. It is intended for a possible future situation where a more</div><div class='add'>+ * complex scheme of PFs to ports mapping is being used. The future driver</div><div class='add'>+ * should look for a new field supporting the new scheme. The current/old</div><div class='add'>+ * driver should treat this value as PF_NOT_ASSIGNED.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_INCOMPATIBLE_ASSIGNMENT 0xfc</div><div class='add'>+/* One byte per PF containing the number of its VFs, indexed by PF number. A</div><div class='add'>+ * special value indicates that a PF is not present.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VFS_PER_PF_OFST 42</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VFS_PER_PF_LEN 1</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VFS_PER_PF_NUM 16</div><div class='add'>+/* enum: The caller is not permitted to access information on this PF. */</div><div class='add'>+/*               MC_CMD_GET_CAPABILITIES_V11_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='add'>+/* enum: PF does not exist. */</div><div class='add'>+/*               MC_CMD_GET_CAPABILITIES_V11_OUT_PF_NOT_PRESENT 0xfe */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='add'>+/* Size of RX descriptor cache expressed as binary logarithm The actual size</div><div class='add'>+ * equals (2 ^ RX_DESC_CACHE_SIZE)</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DESC_CACHE_SIZE_OFST 66</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RX_DESC_CACHE_SIZE_LEN 1</div><div class='add'>+/* Size of TX descriptor cache expressed as binary logarithm The actual size</div><div class='add'>+ * equals (2 ^ TX_DESC_CACHE_SIZE)</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DESC_CACHE_SIZE_OFST 67</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TX_DESC_CACHE_SIZE_LEN 1</div><div class='add'>+/* Total number of available PIO buffers */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_PIO_BUFFS_OFST 68</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_NUM_PIO_BUFFS_LEN 2</div><div class='add'>+/* Size of a single PIO buffer */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_SIZE_PIO_BUFF_OFST 70</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_SIZE_PIO_BUFF_LEN 2</div><div class='add'>+/* On chips later than Medford the amount of address space assigned to each VI</div><div class='add'>+ * is configurable. This is a global setting that the driver must query to</div><div class='add'>+ * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available</div><div class='add'>+ * with 8k VI windows.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_OFST 72</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_LEN 1</div><div class='add'>+/* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.</div><div class='add'>+ * CTPIO is not mapped.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_8K 0x0</div><div class='add'>+/* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_16K 0x1</div><div class='add'>+/* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V11_OUT_VI_WINDOW_MODE_64K 0x2</div><div class='add'>+/* Number of vFIFOs per adapter that can be used for VFIFO Stuffing</div><div class='add'>+ * (SF-115995-SW) in the present configuration of firmware and port mode.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST 73</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1</div><div class='add'>+/* Number of buffers per adapter that can be used for VFIFO Stuffing</div><div class='add'>+ * (SF-115995-SW) in the present configuration of firmware and port mode.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST 74</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN 2</div><div class='add'>+/* Entry count in the MAC stats array, including the final GENERATION_END</div><div class='add'>+ * entry. For MAC stats DMA, drivers should allocate a buffer large enough to</div><div class='add'>+ * hold at least this many 64-bit stats values, if they wish to receive all</div><div class='add'>+ * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the</div><div class='add'>+ * stats array returned will be truncated.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_NUM_STATS_OFST 76</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_MAC_STATS_NUM_STATS_LEN 2</div><div class='add'>+/* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field</div><div class='add'>+ * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_MAX_OFST 80</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_FILTER_ACTION_MARK_MAX_LEN 4</div><div class='add'>+/* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in</div><div class='add'>+ * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when</div><div class='add'>+ * they create an RX queue. Due to hardware limitations, only a small number of</div><div class='add'>+ * different buffer sizes may be available concurrently. Nonzero entries in</div><div class='add'>+ * this array are the sizes of buffers which the system guarantees will be</div><div class='add'>+ * available for use. If the list is empty, there are no limitations on</div><div class='add'>+ * concurrent buffer sizes.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST 84</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM 16</div><div class='add'>+/* Third word of flags. Not present on older firmware (check the length). */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS3_OFST 148</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_FLAGS3_LEN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_WOL_ETHERWAKE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_WOL_ETHERWAKE_LBN 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_WOL_ETHERWAKE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_EVEN_SPREADING_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_EVEN_SPREADING_LBN 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_EVEN_SPREADING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_SELECTABLE_TABLE_SIZE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_SELECTABLE_TABLE_SIZE_LBN 2</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_SUPPORTED_LBN 3</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VDPA_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VDPA_SUPPORTED_LBN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_VDPA_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_LBN 5</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_LBN 6</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_CLIENT_CMD_VF_PROXY_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_CLIENT_CMD_VF_PROXY_LBN 15</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_CXL_CONFIG_ENABLE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_CXL_CONFIG_ENABLE_LBN 17</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V11_OUT_CXL_CONFIG_ENABLE_WIDTH 1</div><div class='add'>+/* These bits are reserved for communicating test-specific capabilities to</div><div class='add'>+ * host-side test software. All production drivers should treat this field as</div><div class='add'>+ * opaque.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_OFST 152</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LEN 8</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_OFST 152</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_LBN 1216</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_OFST 156</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_LBN 1248</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_TEST_RESERVED_HI_WIDTH 32</div><div class='add'>+/* The minimum size (in table entries) of indirection table to be allocated</div><div class='add'>+ * from the pool for an RSS context. Note that the table size used must be a</div><div class='add'>+ * power of 2.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_OFST 160</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_LEN 4</div><div class='add'>+/* The maximum size (in table entries) of indirection table to be allocated</div><div class='add'>+ * from the pool for an RSS context. Note that the table size used must be a</div><div class='add'>+ * power of 2.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_OFST 164</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_LEN 4</div><div class='add'>+/* The maximum number of queues that can be used by an RSS context in exclusive</div><div class='add'>+ * mode. In exclusive mode the context has a configurable indirection table and</div><div class='add'>+ * a configurable RSS key.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_QUEUES_OFST 168</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_INDIRECTION_QUEUES_LEN 4</div><div class='add'>+/* The maximum number of queues that can be used by an RSS context in even-</div><div class='add'>+ * spreading mode. In even-spreading mode the context has no indirection table</div><div class='add'>+ * but it does have a configurable RSS key.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_OFST 172</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_LEN 4</div><div class='add'>+/* The total number of RSS contexts supported. Note that the number of</div><div class='add'>+ * available contexts using indirection tables is also limited by the</div><div class='add'>+ * availability of indirection table space allocated from a common pool.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_NUM_CONTEXTS_OFST 176</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_NUM_CONTEXTS_LEN 4</div><div class='add'>+/* The total amount of indirection table space that can be shared between RSS</div><div class='add'>+ * contexts.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_TABLE_POOL_SIZE_OFST 180</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_RSS_TABLE_POOL_SIZE_LEN 4</div><div class='add'>+/* A bitmap of the queue sizes the device can provide, where bit N being set</div><div class='add'>+ * indicates that 2**N is a valid size. The device may be limited in the number</div><div class='add'>+ * of different queue sizes that can exist simultaneously, so a bit being set</div><div class='add'>+ * here does not guarantee that an attempt to create a queue of that size will</div><div class='add'>+ * succeed.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_SUPPORTED_QUEUE_SIZES_OFST 184</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_SUPPORTED_QUEUE_SIZES_LEN 4</div><div class='add'>+/* A bitmap of queue sizes that are always available, in the same format as</div><div class='add'>+ * SUPPORTED_QUEUE_SIZES. Attempting to create a queue with one of these sizes</div><div class='add'>+ * will never fail due to unavailability of the requested size.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_QUEUE_SIZES_OFST 188</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_GUARANTEED_QUEUE_SIZES_LEN 4</div><div class='add'>+/* Number of available indirect memory maps. */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_INDIRECT_MAP_INDEX_COUNT_OFST 192</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V11_OUT_INDIRECT_MAP_INDEX_COUNT_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_GET_CAPABILITIES_V12_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_GET_CAPABILITIES_V12_OUT_LEN 204</div><div class='add'>+/* First word of flags. */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS1_OFST 0</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS1_LEN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VPORT_RECONFIGURE_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VPORT_RECONFIGURE_LBN 3</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VPORT_RECONFIGURE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_STRIPING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_STRIPING_LBN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_STRIPING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_QUERY_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_QUERY_LBN 5</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_QUERY_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_PORT_VLAN_RESTRICT_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_PORT_VLAN_RESTRICT_LBN 6</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_PORT_VLAN_RESTRICT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_DRV_ATTACH_PREBOOT_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_DRV_ATTACH_PREBOOT_LBN 7</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_DRV_ATTACH_PREBOOT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_FORCE_EVENT_MERGING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_FORCE_EVENT_MERGING_LBN 8</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_FORCE_EVENT_MERGING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_SET_MAC_ENHANCED_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_SET_MAC_ENHANCED_LBN 9</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_SET_MAC_ENHANCED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_LBN 10</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_UNKNOWN_UCAST_DST_FILTER_ALWAYS_MULTI_RECIPIENT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_LBN 11</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VADAPTOR_PERMIT_SET_MAC_WHEN_FILTERS_INSTALLED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_SECURITY_FILTERING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_SECURITY_FILTERING_LBN 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_SECURITY_FILTERING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_ADDITIONAL_RSS_MODES_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_ADDITIONAL_RSS_MODES_LBN 13</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_ADDITIONAL_RSS_MODES_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_QBB_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_QBB_LBN 14</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_QBB_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_VAR_BUFFERS_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_VAR_BUFFERS_LBN 15</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_VAR_BUFFERS_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_RSS_LIMITED_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_RSS_LIMITED_LBN 16</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_RSS_LIMITED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_LBN 17</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PACKED_STREAM_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_INCLUDE_FCS_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_INCLUDE_FCS_LBN 18</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_INCLUDE_FCS_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VLAN_INSERTION_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VLAN_INSERTION_LBN 19</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VLAN_INSERTION_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_LBN 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_LBN 21</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_0_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_0_LBN 22</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_0_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_14_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_14_LBN 23</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_PREFIX_LEN_14_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_TIMESTAMP_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_TIMESTAMP_LBN 24</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_TIMESTAMP_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_BATCHING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_BATCHING_LBN 25</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_BATCHING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MCAST_FILTER_CHAINING_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MCAST_FILTER_CHAINING_LBN 26</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MCAST_FILTER_CHAINING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_PM_AND_RXDP_COUNTERS_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_PM_AND_RXDP_COUNTERS_LBN 27</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_PM_AND_RXDP_COUNTERS_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DISABLE_SCATTER_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DISABLE_SCATTER_LBN 28</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DISABLE_SCATTER_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MCAST_UDP_LOOPBACK_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MCAST_UDP_LOOPBACK_LBN 29</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MCAST_UDP_LOOPBACK_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_LBN 30</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVB_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VXLAN_NVGRE_OFST 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VXLAN_NVGRE_LBN 31</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VXLAN_NVGRE_WIDTH 1</div><div class='add'>+/* RxDPCPU firmware id. */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DPCPU_FW_ID_OFST 4</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DPCPU_FW_ID_LEN 2</div><div class='add'>+/* enum: Standard RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP 0x0</div><div class='add'>+/* enum: Low latency RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_LOW_LATENCY 0x1</div><div class='add'>+/* enum: Packed stream RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_PACKED_STREAM 0x2</div><div class='add'>+/* enum: Rules engine RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_RULES_ENGINE 0x5</div><div class='add'>+/* enum: DPDK RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_DPDK 0x6</div><div class='add'>+/* enum: BIST RXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_BIST 0x10a</div><div class='add'>+/* enum: RXDP Test firmware image 1 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_TO_MC_CUT_THROUGH 0x101</div><div class='add'>+/* enum: RXDP Test firmware image 2 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD 0x102</div><div class='add'>+/* enum: RXDP Test firmware image 3 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_TO_MC_STORE_FORWARD_FIRST 0x103</div><div class='add'>+/* enum: RXDP Test firmware image 4 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_EVERY_EVENT_BATCHABLE 0x104</div><div class='add'>+/* enum: RXDP Test firmware image 5 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_BACKPRESSURE 0x105</div><div class='add'>+/* enum: RXDP Test firmware image 6 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_PACKET_EDITS 0x106</div><div class='add'>+/* enum: RXDP Test firmware image 7 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_RX_HDR_SPLIT 0x107</div><div class='add'>+/* enum: RXDP Test firmware image 8 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_DISABLE_DL 0x108</div><div class='add'>+/* enum: RXDP Test firmware image 9 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_DOORBELL_DELAY 0x10b</div><div class='add'>+/* enum: RXDP Test firmware image 10 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_TEST_FW_SLOW 0x10c</div><div class='add'>+/* TxDPCPU firmware id. */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DPCPU_FW_ID_OFST 6</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DPCPU_FW_ID_LEN 2</div><div class='add'>+/* enum: Standard TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP 0x0</div><div class='add'>+/* enum: Low latency TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_LOW_LATENCY 0x1</div><div class='add'>+/* enum: High packet rate TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_HIGH_PACKET_RATE 0x3</div><div class='add'>+/* enum: Rules engine TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_RULES_ENGINE 0x5</div><div class='add'>+/* enum: DPDK TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_DPDK 0x6</div><div class='add'>+/* enum: BIST TXDP firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_BIST 0x12d</div><div class='add'>+/* enum: TXDP Test firmware image 1 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_TEST_FW_TSO_EDIT 0x101</div><div class='add'>+/* enum: TXDP Test firmware image 2 */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_TEST_FW_PACKET_EDITS 0x102</div><div class='add'>+/* enum: TXDP CSR bus test firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXDP_TEST_FW_CSR 0x103</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_OFST 8</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_LEN 2</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_REV_OFST 8</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_REV_LBN 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_REV_WIDTH 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_TYPE_OFST 8</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_TYPE_LBN 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4</div><div class='add'>+/* enum: reserved value - do not use (may indicate alternative interpretation</div><div class='add'>+ * of REV field in future)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_RESERVED 0x0</div><div class='add'>+/* enum: Trivial RX PD firmware for early Huntington development (Huntington</div><div class='add'>+ * development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_FIRST_PKT 0x1</div><div class='add'>+/* enum: RX PD firmware for telemetry prototyping (Medford2 development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_TESTFW_TELEMETRY 0x1</div><div class='add'>+/* enum: RX PD firmware with approximately Siena-compatible behaviour</div><div class='add'>+ * (Huntington development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_SIENA_COMPAT 0x2</div><div class='add'>+/* enum: Full featured RX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_FULL_FEATURED 0x3</div><div class='add'>+/* enum: (deprecated original name for the FULL_FEATURED variant) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_VSWITCH 0x3</div><div class='add'>+/* enum: siena_compat variant RX PD firmware using PM rather than MAC</div><div class='add'>+ * (Huntington development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_SIENA_COMPAT_PM 0x4</div><div class='add'>+/* enum: Low latency RX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_LOW_LATENCY 0x5</div><div class='add'>+/* enum: Packed stream RX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_PACKED_STREAM 0x6</div><div class='add'>+/* enum: RX PD firmware handling layer 2 only for high packet rate performance</div><div class='add'>+ * tests (Medford development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_LAYER2_PERF 0x7</div><div class='add'>+/* enum: Rules engine RX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_RULES_ENGINE 0x8</div><div class='add'>+/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_L3XUDP 0x9</div><div class='add'>+/* enum: DPDK RX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_DPDK 0xa</div><div class='add'>+/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe</div><div class='add'>+/* enum: RX PD firmware parsing but not filtering network overlay tunnel</div><div class='add'>+ * encapsulations (Medford development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_RXPD_FW_TYPE_TESTFW_ENCAP_PARSING_ONLY 0xf</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_OFST 10</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_LEN 2</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_REV_OFST 10</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_REV_LBN 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_REV_WIDTH 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_TYPE_OFST 10</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_TYPE_LBN 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4</div><div class='add'>+/* enum: reserved value - do not use (may indicate alternative interpretation</div><div class='add'>+ * of REV field in future)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_RESERVED 0x0</div><div class='add'>+/* enum: Trivial TX PD firmware for early Huntington development (Huntington</div><div class='add'>+ * development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_FIRST_PKT 0x1</div><div class='add'>+/* enum: TX PD firmware for telemetry prototyping (Medford2 development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_TESTFW_TELEMETRY 0x1</div><div class='add'>+/* enum: TX PD firmware with approximately Siena-compatible behaviour</div><div class='add'>+ * (Huntington development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_SIENA_COMPAT 0x2</div><div class='add'>+/* enum: Full featured TX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_FULL_FEATURED 0x3</div><div class='add'>+/* enum: (deprecated original name for the FULL_FEATURED variant) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_VSWITCH 0x3</div><div class='add'>+/* enum: siena_compat variant TX PD firmware using PM rather than MAC</div><div class='add'>+ * (Huntington development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_SIENA_COMPAT_PM 0x4</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_LOW_LATENCY 0x5 /* enum */</div><div class='add'>+/* enum: TX PD firmware handling layer 2 only for high packet rate performance</div><div class='add'>+ * tests (Medford development only)</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_LAYER2_PERF 0x7</div><div class='add'>+/* enum: Rules engine TX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_RULES_ENGINE 0x8</div><div class='add'>+/* enum: Custom firmware variant (see SF-119495-PD and bug69716) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_L3XUDP 0x9</div><div class='add'>+/* enum: DPDK TX PD production firmware */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_DPDK 0xa</div><div class='add'>+/* enum: RX PD firmware for GUE parsing prototype (Medford development only) */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_TXPD_FW_TYPE_TESTFW_GUE_PROTOTYPE 0xe</div><div class='add'>+/* Hardware capabilities of NIC */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_HW_CAPABILITIES_OFST 12</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_HW_CAPABILITIES_LEN 4</div><div class='add'>+/* Licensed capabilities */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_LICENSE_CAPABILITIES_OFST 16</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_LICENSE_CAPABILITIES_LEN 4</div><div class='add'>+/* Second word of flags. Not present on older firmware (check the length). */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS2_OFST 20</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS2_LEN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_LBN 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_ENCAP_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_ENCAP_LBN 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_ENCAP_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVQ_TIMER_CTRL_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVQ_TIMER_CTRL_LBN 2</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVQ_TIMER_CTRL_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVENT_CUT_THROUGH_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVENT_CUT_THROUGH_LBN 3</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EVENT_CUT_THROUGH_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_CUT_THROUGH_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_CUT_THROUGH_LBN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_CUT_THROUGH_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VFIFO_ULL_MODE_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VFIFO_ULL_MODE_LBN 5</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_VFIFO_ULL_MODE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_40G_TX_SIZE_BINS_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_40G_TX_SIZE_BINS_LBN 6</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_40G_TX_SIZE_BINS_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_TYPE_SUPPORTED_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_TYPE_SUPPORTED_LBN 7</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_TYPE_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_V2_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_V2_LBN 7</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_EVQ_V2_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_TIMESTAMPING_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_TIMESTAMPING_LBN 8</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_MAC_TIMESTAMPING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TIMESTAMP_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TIMESTAMP_LBN 9</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TIMESTAMP_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_SNIFF_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_SNIFF_LBN 10</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_SNIFF_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_SNIFF_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_SNIFF_LBN 11</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_SNIFF_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_LBN 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_REPORT_VERIFY_RESULT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_BACKGROUND_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_BACKGROUND_LBN 13</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_BACKGROUND_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_DB_RETURN_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_DB_RETURN_LBN 14</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MCDI_DB_RETURN_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_CTPIO_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_CTPIO_LBN 15</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_CTPIO_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_SUPPORT_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_SUPPORT_LBN 16</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_SUPPORT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_BOUND_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_BOUND_LBN 17</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TSA_BOUND_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_SF_ADAPTER_AUTHENTICATION_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_SF_ADAPTER_AUTHENTICATION_LBN 18</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_SF_ADAPTER_AUTHENTICATION_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_FLAG_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_FLAG_LBN 19</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_FLAG_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_LBN 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_SUPER_BUFFER_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_SUPER_BUFFER_LBN 21</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_SUPER_BUFFER_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_PACKED_STREAM_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_PACKED_STREAM_LBN 21</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EQUAL_STRIDE_PACKED_STREAM_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_L3XUDP_SUPPORT_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_L3XUDP_SUPPORT_LBN 22</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_L3XUDP_SUPPORT_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_FW_SUBVARIANT_NO_TX_CSUM_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_FW_SUBVARIANT_NO_TX_CSUM_LBN 23</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_FW_SUBVARIANT_NO_TX_CSUM_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VI_SPREADING_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VI_SPREADING_LBN 24</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VI_SPREADING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_HLB_IDLE_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_HLB_IDLE_LBN 25</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RXDP_HLB_IDLE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_NO_CONT_EV_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_NO_CONT_EV_LBN 26</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_NO_CONT_EV_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_WITH_BUFFER_SIZE_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_WITH_BUFFER_SIZE_LBN 27</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_INIT_RXQ_WITH_BUFFER_SIZE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_BUNDLE_UPDATE_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_BUNDLE_UPDATE_LBN 28</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_BUNDLE_UPDATE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V3_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V3_LBN 29</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V3_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_SENSORS_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_SENSORS_LBN 30</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_SENSORS_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_OFST 20</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_LBN 31</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_POLL_VERIFY_RESULT_WIDTH 1</div><div class='add'>+/* Number of FATSOv2 contexts per datapath supported by this NIC (when</div><div class='add'>+ * TX_TSO_V2 == 1). Not present on older firmware (check the length).</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_N_CONTEXTS_OFST 24</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TX_TSO_V2_N_CONTEXTS_LEN 2</div><div class='add'>+/* One byte per PF containing the number of the external port assigned to this</div><div class='add'>+ * PF, indexed by PF number. Special values indicate that a PF is either not</div><div class='add'>+ * present or not assigned.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_PFS_TO_PORTS_ASSIGNMENT_OFST 26</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_PFS_TO_PORTS_ASSIGNMENT_LEN 1</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_PFS_TO_PORTS_ASSIGNMENT_NUM 16</div><div class='add'>+/* enum: The caller is not permitted to access information on this PF. */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_ACCESS_NOT_PERMITTED 0xff</div><div class='add'>+/* enum: PF does not exist. */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_PF_NOT_PRESENT 0xfe</div><div class='add'>+/* enum: PF does exist but is not assigned to any external port. */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_PF_NOT_ASSIGNED 0xfd</div><div class='add'>+/* enum: This value indicates that PF is assigned, but it cannot be expressed</div><div class='add'>+ * in this field. It is intended for a possible future situation where a more</div><div class='add'>+ * complex scheme of PFs to ports mapping is being used. The future driver</div><div class='add'>+ * should look for a new field supporting the new scheme. The current/old</div><div class='add'>+ * driver should treat this value as PF_NOT_ASSIGNED.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_INCOMPATIBLE_ASSIGNMENT 0xfc</div><div class='add'>+/* One byte per PF containing the number of its VFs, indexed by PF number. A</div><div class='add'>+ * special value indicates that a PF is not present.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VFS_PER_PF_OFST 42</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VFS_PER_PF_LEN 1</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VFS_PER_PF_NUM 16</div><div class='add'>+/* enum: The caller is not permitted to access information on this PF. */</div><div class='add'>+/*               MC_CMD_GET_CAPABILITIES_V12_OUT_ACCESS_NOT_PERMITTED 0xff */</div><div class='add'>+/* enum: PF does not exist. */</div><div class='add'>+/*               MC_CMD_GET_CAPABILITIES_V12_OUT_PF_NOT_PRESENT 0xfe */</div><div class='add'>+/* Number of VIs available for external ports 0-3. For devices with more than</div><div class='add'>+ * four ports, the remainder are in NUM_VIS_PER_PORT2 in</div><div class='add'>+ * GET_CAPABILITIES_V12_OUT.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT_OFST 58</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT_LEN 2</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT_NUM 4</div><div class='add'>+/* Size of RX descriptor cache expressed as binary logarithm The actual size</div><div class='add'>+ * equals (2 ^ RX_DESC_CACHE_SIZE)</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DESC_CACHE_SIZE_OFST 66</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RX_DESC_CACHE_SIZE_LEN 1</div><div class='add'>+/* Size of TX descriptor cache expressed as binary logarithm The actual size</div><div class='add'>+ * equals (2 ^ TX_DESC_CACHE_SIZE)</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DESC_CACHE_SIZE_OFST 67</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TX_DESC_CACHE_SIZE_LEN 1</div><div class='add'>+/* Total number of available PIO buffers */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_PIO_BUFFS_OFST 68</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_PIO_BUFFS_LEN 2</div><div class='add'>+/* Size of a single PIO buffer */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_SIZE_PIO_BUFF_OFST 70</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_SIZE_PIO_BUFF_LEN 2</div><div class='add'>+/* On chips later than Medford the amount of address space assigned to each VI</div><div class='add'>+ * is configurable. This is a global setting that the driver must query to</div><div class='add'>+ * discover the VI to address mapping. Cut-through PIO (CTPIO) is not available</div><div class='add'>+ * with 8k VI windows.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_OFST 72</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_LEN 1</div><div class='add'>+/* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.</div><div class='add'>+ * CTPIO is not mapped.</div><div class='add'>+ */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_8K 0x0</div><div class='add'>+/* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_16K 0x1</div><div class='add'>+/* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */</div><div class='add'>+#define          MC_CMD_GET_CAPABILITIES_V12_OUT_VI_WINDOW_MODE_64K 0x2</div><div class='add'>+/* Number of vFIFOs per adapter that can be used for VFIFO Stuffing</div><div class='add'>+ * (SF-115995-SW) in the present configuration of firmware and port mode.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_VFIFOS_OFST 73</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_VFIFOS_LEN 1</div><div class='add'>+/* Number of buffers per adapter that can be used for VFIFO Stuffing</div><div class='add'>+ * (SF-115995-SW) in the present configuration of firmware and port mode.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_OFST 74</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_VFIFO_STUFFING_NUM_CP_BUFFERS_LEN 2</div><div class='add'>+/* Entry count in the MAC stats array, including the final GENERATION_END</div><div class='add'>+ * entry. For MAC stats DMA, drivers should allocate a buffer large enough to</div><div class='add'>+ * hold at least this many 64-bit stats values, if they wish to receive all</div><div class='add'>+ * available stats. If the buffer is shorter than MAC_STATS_NUM_STATS * 8, the</div><div class='add'>+ * stats array returned will be truncated.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_NUM_STATS_OFST 76</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_MAC_STATS_NUM_STATS_LEN 2</div><div class='add'>+/* Maximum supported value for MC_CMD_FILTER_OP_V3/MATCH_MARK_VALUE. This field</div><div class='add'>+ * will only be non-zero if MC_CMD_GET_CAPABILITIES/FILTER_ACTION_MARK is set.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_MAX_OFST 80</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_FILTER_ACTION_MARK_MAX_LEN 4</div><div class='add'>+/* On devices where the INIT_RXQ_WITH_BUFFER_SIZE flag (in</div><div class='add'>+ * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when</div><div class='add'>+ * they create an RX queue. Due to hardware limitations, only a small number of</div><div class='add'>+ * different buffer sizes may be available concurrently. Nonzero entries in</div><div class='add'>+ * this array are the sizes of buffers which the system guarantees will be</div><div class='add'>+ * available for use. If the list is empty, there are no limitations on</div><div class='add'>+ * concurrent buffer sizes.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_RX_BUFFER_SIZES_OFST 84</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_RX_BUFFER_SIZES_NUM 16</div><div class='add'>+/* Third word of flags. Not present on older firmware (check the length). */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS3_OFST 148</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_FLAGS3_LEN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_WOL_ETHERWAKE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_WOL_ETHERWAKE_LBN 0</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_WOL_ETHERWAKE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_EVEN_SPREADING_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_EVEN_SPREADING_LBN 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_EVEN_SPREADING_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_SELECTABLE_TABLE_SIZE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_SELECTABLE_TABLE_SIZE_LBN 2</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_SELECTABLE_TABLE_SIZE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_SUPPORTED_LBN 3</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VDPA_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VDPA_SUPPORTED_LBN 4</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_VDPA_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_LBN 5</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RX_VLAN_STRIPPING_PER_ENCAP_RULE_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_LBN 6</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EXTENDED_WIDTH_EVQS_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_CLIENT_CMD_VF_PROXY_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_CLIENT_CMD_VF_PROXY_LBN 15</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_LBN 16</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_LL_RX_EVENT_SUPPRESSION_SUPPORTED_WIDTH 1</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_CXL_CONFIG_ENABLE_OFST 148</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_CXL_CONFIG_ENABLE_LBN 17</div><div class='add'>+#define        MC_CMD_GET_CAPABILITIES_V12_OUT_CXL_CONFIG_ENABLE_WIDTH 1</div><div class='add'>+/* These bits are reserved for communicating test-specific capabilities to</div><div class='add'>+ * host-side test software. All production drivers should treat this field as</div><div class='add'>+ * opaque.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_OFST 152</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LEN 8</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_OFST 152</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_LEN 4</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_LBN 1216</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_LO_WIDTH 32</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_OFST 156</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_LEN 4</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_LBN 1248</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_TEST_RESERVED_HI_WIDTH 32</div><div class='add'>+/* The minimum size (in table entries) of indirection table to be allocated</div><div class='add'>+ * from the pool for an RSS context. Note that the table size used must be a</div><div class='add'>+ * power of 2.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_OFST 160</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_LEN 4</div><div class='add'>+/* The maximum size (in table entries) of indirection table to be allocated</div><div class='add'>+ * from the pool for an RSS context. Note that the table size used must be a</div><div class='add'>+ * power of 2.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_OFST 164</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_LEN 4</div><div class='add'>+/* The maximum number of queues that can be used by an RSS context in exclusive</div><div class='add'>+ * mode. In exclusive mode the context has a configurable indirection table and</div><div class='add'>+ * a configurable RSS key.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_QUEUES_OFST 168</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_INDIRECTION_QUEUES_LEN 4</div><div class='add'>+/* The maximum number of queues that can be used by an RSS context in even-</div><div class='add'>+ * spreading mode. In even-spreading mode the context has no indirection table</div><div class='add'>+ * but it does have a configurable RSS key.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_OFST 172</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_LEN 4</div><div class='add'>+/* The total number of RSS contexts supported. Note that the number of</div><div class='add'>+ * available contexts using indirection tables is also limited by the</div><div class='add'>+ * availability of indirection table space allocated from a common pool.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_NUM_CONTEXTS_OFST 176</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_NUM_CONTEXTS_LEN 4</div><div class='add'>+/* The total amount of indirection table space that can be shared between RSS</div><div class='add'>+ * contexts.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_TABLE_POOL_SIZE_OFST 180</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_RSS_TABLE_POOL_SIZE_LEN 4</div><div class='add'>+/* A bitmap of the queue sizes the device can provide, where bit N being set</div><div class='add'>+ * indicates that 2**N is a valid size. The device may be limited in the number</div><div class='add'>+ * of different queue sizes that can exist simultaneously, so a bit being set</div><div class='add'>+ * here does not guarantee that an attempt to create a queue of that size will</div><div class='add'>+ * succeed.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_SUPPORTED_QUEUE_SIZES_OFST 184</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_SUPPORTED_QUEUE_SIZES_LEN 4</div><div class='add'>+/* A bitmap of queue sizes that are always available, in the same format as</div><div class='add'>+ * SUPPORTED_QUEUE_SIZES. Attempting to create a queue with one of these sizes</div><div class='add'>+ * will never fail due to unavailability of the requested size.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_QUEUE_SIZES_OFST 188</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_GUARANTEED_QUEUE_SIZES_LEN 4</div><div class='add'>+/* Number of available indirect memory maps. */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_INDIRECT_MAP_INDEX_COUNT_OFST 192</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_INDIRECT_MAP_INDEX_COUNT_LEN 4</div><div class='add'>+/* Number of VIs available for external ports 4-7. Information for ports 0-3 is</div><div class='add'>+ * in NUM_VIS_PER_PORT in GET_CAPABILITIES_V2_OUT.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT2_OFST 196</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT2_LEN 2</div><div class='add'>+#define       MC_CMD_GET_CAPABILITIES_V12_OUT_NUM_VIS_PER_PORT2_NUM 4</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_V2_EXTN</div><div class='hunk'>@@ -18468,168 +19479,13 @@</div><div class='ctx'>  * are not defined.</div><div class='ctx'>  */</div><div class='ctx'> #define          MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_TSA 0x1</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_TCM_BUCKET_ALLOC</div><div class='del'>- * Allocate a pacer bucket (for qau rp or a snapper test)</div><div class='add'>+/* enum: MCDI command used for platform management. Typically, these commands</div><div class='add'>+ * are used for low-level operations directed at the platform as a whole (e.g.</div><div class='add'>+ * MMIO device enumeration) rather than individual functions and use a</div><div class='add'>+ * dedicated comms channel (e.g. RPmsg/IPI). May be handled by the same or</div><div class='add'>+ * different CPU as MCDI_MESSAGE_TYPE_MC.</div><div class='ctx'>  */</div><div class='del'>-#define MC_CMD_TCM_BUCKET_ALLOC 0xb2</div><div class='del'>-#undef MC_CMD_0xb2_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xb2_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TCM_BUCKET_ALLOC_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TCM_BUCKET_ALLOC_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TCM_BUCKET_ALLOC_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_TCM_BUCKET_ALLOC_OUT_LEN 4</div><div class='del'>-/* the bucket id */</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_ALLOC_OUT_BUCKET_OFST 0</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_ALLOC_OUT_BUCKET_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_TCM_BUCKET_FREE</div><div class='del'>- * Free a pacer bucket</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_TCM_BUCKET_FREE 0xb3</div><div class='del'>-#undef MC_CMD_0xb3_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xb3_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TCM_BUCKET_FREE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TCM_BUCKET_FREE_IN_LEN 4</div><div class='del'>-/* the bucket id */</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_FREE_IN_BUCKET_OFST 0</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_FREE_IN_BUCKET_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TCM_BUCKET_FREE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_TCM_BUCKET_FREE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_TCM_BUCKET_INIT</div><div class='del'>- * Initialise pacer bucket with a given rate</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_TCM_BUCKET_INIT 0xb4</div><div class='del'>-#undef MC_CMD_0xb4_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xb4_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TCM_BUCKET_INIT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TCM_BUCKET_INIT_IN_LEN 8</div><div class='del'>-/* the bucket id */</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_INIT_IN_BUCKET_OFST 0</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_INIT_IN_BUCKET_LEN 4</div><div class='del'>-/* the rate in mbps */</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_INIT_IN_RATE_OFST 4</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_INIT_IN_RATE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TCM_BUCKET_INIT_EXT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TCM_BUCKET_INIT_EXT_IN_LEN 12</div><div class='del'>-/* the bucket id */</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_INIT_EXT_IN_BUCKET_OFST 0</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_INIT_EXT_IN_BUCKET_LEN 4</div><div class='del'>-/* the rate in mbps */</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_INIT_EXT_IN_RATE_OFST 4</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_INIT_EXT_IN_RATE_LEN 4</div><div class='del'>-/* the desired maximum fill level */</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_INIT_EXT_IN_MAX_FILL_OFST 8</div><div class='del'>-#define       MC_CMD_TCM_BUCKET_INIT_EXT_IN_MAX_FILL_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TCM_BUCKET_INIT_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_TCM_BUCKET_INIT_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_TCM_TXQ_INIT</div><div class='del'>- * Initialise txq in pacer with given options or set options</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_TCM_TXQ_INIT 0xb5</div><div class='del'>-#undef MC_CMD_0xb5_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xb5_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TCM_TXQ_INIT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TCM_TXQ_INIT_IN_LEN 28</div><div class='del'>-/* the txq id */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_QID_OFST 0</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_QID_LEN 4</div><div class='del'>-/* the static priority associated with the txq */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_LABEL_OFST 4</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_LABEL_LEN 4</div><div class='del'>-/* bitmask of the priority queues this txq is inserted into when inserted. */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAGS_OFST 8</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_OFST 8</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_LBN 0</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_GUARANTEED_WIDTH 1</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_OFST 8</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_LBN 1</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_NORMAL_WIDTH 1</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_OFST 8</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_LBN 2</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_IN_PQ_FLAG_LOW_WIDTH 1</div><div class='del'>-/* the reaction point (RP) bucket */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_RP_BKT_OFST 12</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_RP_BKT_LEN 4</div><div class='del'>-/* an already reserved bucket (typically set to bucket associated with outer</div><div class='del'>- * vswitch)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT1_OFST 16</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT1_LEN 4</div><div class='del'>-/* an already reserved bucket (typically set to bucket associated with inner</div><div class='del'>- * vswitch)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT2_OFST 20</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_MAX_BKT2_LEN 4</div><div class='del'>-/* the min bucket (typically for ETS/minimum bandwidth) */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_MIN_BKT_OFST 24</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_IN_MIN_BKT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TCM_TXQ_INIT_EXT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TCM_TXQ_INIT_EXT_IN_LEN 32</div><div class='del'>-/* the txq id */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_QID_OFST 0</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_QID_LEN 4</div><div class='del'>-/* the static priority associated with the txq */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_NORMAL_OFST 4</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_NORMAL_LEN 4</div><div class='del'>-/* bitmask of the priority queues this txq is inserted into when inserted. */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAGS_OFST 8</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_OFST 8</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_LBN 0</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_GUARANTEED_WIDTH 1</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_OFST 8</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_LBN 1</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_NORMAL_WIDTH 1</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_OFST 8</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_LBN 2</div><div class='del'>-#define        MC_CMD_TCM_TXQ_INIT_EXT_IN_PQ_FLAG_LOW_WIDTH 1</div><div class='del'>-/* the reaction point (RP) bucket */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_RP_BKT_OFST 12</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_RP_BKT_LEN 4</div><div class='del'>-/* an already reserved bucket (typically set to bucket associated with outer</div><div class='del'>- * vswitch)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT1_OFST 16</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT1_LEN 4</div><div class='del'>-/* an already reserved bucket (typically set to bucket associated with inner</div><div class='del'>- * vswitch)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT2_OFST 20</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_MAX_BKT2_LEN 4</div><div class='del'>-/* the min bucket (typically for ETS/minimum bandwidth) */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_MIN_BKT_OFST 24</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_MIN_BKT_LEN 4</div><div class='del'>-/* the static priority associated with the txq */</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_GUARANTEED_OFST 28</div><div class='del'>-#define       MC_CMD_TCM_TXQ_INIT_EXT_IN_LABEL_GUARANTEED_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TCM_TXQ_INIT_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_TCM_TXQ_INIT_OUT_LEN 0</div><div class='add'>+#define          MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_PLATFORM 0x2</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='hunk'>@@ -18740,27 +19596,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_VSWITCH_QUERY</div><div class='del'>- * read some config of v-switch. For now this command is an empty placeholder.</div><div class='del'>- * It may be used to check if a v-switch is connected to a given EVB port (if</div><div class='del'>- * not, then the command returns ENOENT).</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_VSWITCH_QUERY 0x63</div><div class='del'>-#undef MC_CMD_0x63_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x63_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_VSWITCH_QUERY_IN msgrequest */</div><div class='del'>-#define    MC_CMD_VSWITCH_QUERY_IN_LEN 4</div><div class='del'>-/* The port to which the v-switch is connected. */</div><div class='del'>-#define       MC_CMD_VSWITCH_QUERY_IN_UPSTREAM_PORT_ID_OFST 0</div><div class='del'>-#define       MC_CMD_VSWITCH_QUERY_IN_UPSTREAM_PORT_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_VSWITCH_QUERY_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_VSWITCH_QUERY_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_VPORT_ALLOC</div><div class='ctx'>  * allocate a v-port.</div><div class='ctx'>  */</div><div class='hunk'>@@ -18936,28 +19771,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_VADAPTOR_GET_MAC</div><div class='del'>- * read the MAC address assigned to a v-adaptor.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_VADAPTOR_GET_MAC 0x5e</div><div class='del'>-#undef MC_CMD_0x5e_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x5e_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_VADAPTOR_GET_MAC_IN msgrequest */</div><div class='del'>-#define    MC_CMD_VADAPTOR_GET_MAC_IN_LEN 4</div><div class='del'>-/* The port to which the v-adaptor is connected. */</div><div class='del'>-#define       MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_OFST 0</div><div class='del'>-#define       MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_VADAPTOR_GET_MAC_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_VADAPTOR_GET_MAC_OUT_LEN 6</div><div class='del'>-/* The MAC address assigned to this v-adaptor */</div><div class='del'>-#define       MC_CMD_VADAPTOR_GET_MAC_OUT_MACADDR_OFST 0</div><div class='del'>-#define       MC_CMD_VADAPTOR_GET_MAC_OUT_MACADDR_LEN 6</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_VADAPTOR_QUERY</div><div class='ctx'>  * read some config of v-adaptor.</div><div class='ctx'>  */</div><div class='hunk'>@@ -19014,86 +19827,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_RDWR_A64_REGIONS</div><div class='del'>- * Assign the 64 bit region addresses.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_RDWR_A64_REGIONS 0x9b</div><div class='del'>-#undef MC_CMD_0x9b_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x9b_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RDWR_A64_REGIONS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_RDWR_A64_REGIONS_IN_LEN 17</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_REGION0_OFST 0</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_REGION0_LEN 4</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_REGION1_OFST 4</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_REGION1_LEN 4</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_REGION2_OFST 8</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_REGION2_LEN 4</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_REGION3_OFST 12</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_REGION3_LEN 4</div><div class='del'>-/* Write enable bits 0-3, set to write, clear to read. */</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_LBN 128</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_WIDTH 4</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_OFST 16</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_BYTE_LEN 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RDWR_A64_REGIONS_OUT msgresponse: This data always included</div><div class='del'>- * regardless of state of write bits in the request.</div><div class='del'>- */</div><div class='del'>-#define    MC_CMD_RDWR_A64_REGIONS_OUT_LEN 16</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_OFST 0</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_LEN 4</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_OFST 4</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_LEN 4</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_OFST 8</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_LEN 4</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_OFST 12</div><div class='del'>-#define       MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_ONLOAD_STACK_ALLOC</div><div class='del'>- * Allocate an Onload stack ID.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_ONLOAD_STACK_ALLOC 0x9c</div><div class='del'>-#undef MC_CMD_0x9c_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x9c_PRIVILEGE_CTG SRIOV_CTG_ONLOAD</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ONLOAD_STACK_ALLOC_IN msgrequest */</div><div class='del'>-#define    MC_CMD_ONLOAD_STACK_ALLOC_IN_LEN 4</div><div class='del'>-/* The handle of the owning upstream port */</div><div class='del'>-#define       MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0</div><div class='del'>-#define       MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ONLOAD_STACK_ALLOC_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_ONLOAD_STACK_ALLOC_OUT_LEN 4</div><div class='del'>-/* The handle of the new Onload stack */</div><div class='del'>-#define       MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_OFST 0</div><div class='del'>-#define       MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_ONLOAD_STACK_FREE</div><div class='del'>- * Free an Onload stack ID.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_ONLOAD_STACK_FREE 0x9d</div><div class='del'>-#undef MC_CMD_0x9d_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x9d_PRIVILEGE_CTG SRIOV_CTG_ONLOAD</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ONLOAD_STACK_FREE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_ONLOAD_STACK_FREE_IN_LEN 4</div><div class='del'>-/* The handle of the Onload stack */</div><div class='del'>-#define       MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_OFST 0</div><div class='del'>-#define       MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ONLOAD_STACK_FREE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_ONLOAD_STACK_FREE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_RSS_CONTEXT_ALLOC</div><div class='ctx'>  * Allocate an RSS context.</div><div class='ctx'>  */</div><div class='hunk'>@@ -19305,93 +20038,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_RSS_CONTEXT_WRITE_TABLE</div><div class='del'>- * Write a portion of a selectable-size indirection table for an RSS context.</div><div class='del'>- * This command must be used instead of MC_CMD_RSS_CONTEXT_SET_TABLE if the</div><div class='del'>- * RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_RSS_CONTEXT_WRITE_TABLE 0x13e</div><div class='del'>-#undef MC_CMD_0x13e_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x13e_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMIN 8</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LEN(num) (4+4*(num))</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_NUM(len) (((len)-4)/4)</div><div class='del'>-/* The handle of the RSS context */</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_RSS_CONTEXT_ID_OFST 0</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_RSS_CONTEXT_ID_LEN 4</div><div class='del'>-/* An array of index-value pairs to be written to the table. Structure is</div><div class='del'>- * MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_OFST 4</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_LEN 4</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MINNUM 1</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MAXNUM 62</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_MAXNUM_MCDI2 254</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RSS_CONTEXT_WRITE_TABLE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_WRITE_TABLE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY structuredef */</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_LEN 4</div><div class='del'>-/* The index of the table entry to be written. */</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_OFST 0</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_LEN 2</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_LBN 0</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_INDEX_WIDTH 16</div><div class='del'>-/* The value to write into the table entry. */</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_OFST 2</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_LEN 2</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_LBN 16</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_VALUE_WIDTH 16</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_RSS_CONTEXT_READ_TABLE</div><div class='del'>- * Read a portion of a selectable-size indirection table for an RSS context.</div><div class='del'>- * This command must be used instead of MC_CMD_RSS_CONTEXT_GET_TABLE if the</div><div class='del'>- * RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_RSS_CONTEXT_READ_TABLE 0x13f</div><div class='del'>-#undef MC_CMD_0x13f_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x13f_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RSS_CONTEXT_READ_TABLE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMIN 6</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LEN(num) (4+2*(num))</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_NUM(len) (((len)-4)/2)</div><div class='del'>-/* The handle of the RSS context */</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_IN_RSS_CONTEXT_ID_OFST 0</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_IN_RSS_CONTEXT_ID_LEN 4</div><div class='del'>-/* An array containing the indices of the entries to be read. */</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_OFST 4</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_LEN 2</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MINNUM 1</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MAXNUM 124</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_MAXNUM_MCDI2 508</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RSS_CONTEXT_READ_TABLE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMIN 2</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_LEN(num) (0+2*(num))</div><div class='del'>-#define    MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_NUM(len) (((len)-0)/2)</div><div class='del'>-/* A buffer containing the requested entries read from the table. */</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_LEN 2</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MINNUM 1</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MAXNUM 126</div><div class='del'>-#define       MC_CMD_RSS_CONTEXT_READ_TABLE_OUT_DATA_MAXNUM_MCDI2 510</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_RSS_CONTEXT_SET_FLAGS</div><div class='ctx'>  * Set various control flags for an RSS context.</div><div class='ctx'>  */</div><div class='hunk'>@@ -19525,158 +20171,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_ALLOC</div><div class='del'>- * Allocate a .1p mapping.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DOT1P_MAPPING_ALLOC 0xa4</div><div class='del'>-#undef MC_CMD_0xa4_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xa4_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_ALLOC_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DOT1P_MAPPING_ALLOC_IN_LEN 8</div><div class='del'>-/* The handle of the owning upstream port */</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_ALLOC_IN_UPSTREAM_PORT_ID_OFST 0</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4</div><div class='del'>-/* Number of queues spanned by this mapping, in the range 1-64; valid fixed</div><div class='del'>- * offsets in the mapping table will be in the range 0 to NUM_QUEUES-1, and</div><div class='del'>- * referenced RSS contexts must span no more than this number.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_ALLOC_IN_NUM_QUEUES_OFST 4</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_ALLOC_IN_NUM_QUEUES_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_ALLOC_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DOT1P_MAPPING_ALLOC_OUT_LEN 4</div><div class='del'>-/* The handle of the new .1p mapping. This should be considered opaque to the</div><div class='del'>- * host, although a value of 0xFFFFFFFF is guaranteed never to be a valid</div><div class='del'>- * handle.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_OFST 0</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_LEN 4</div><div class='del'>-/* enum: guaranteed invalid .1p mapping handle value */</div><div class='del'>-#define          MC_CMD_DOT1P_MAPPING_ALLOC_OUT_DOT1P_MAPPING_ID_INVALID 0xffffffff</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_FREE</div><div class='del'>- * Free a .1p mapping.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DOT1P_MAPPING_FREE 0xa5</div><div class='del'>-#undef MC_CMD_0xa5_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xa5_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_FREE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DOT1P_MAPPING_FREE_IN_LEN 4</div><div class='del'>-/* The handle of the .1p mapping */</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_FREE_IN_DOT1P_MAPPING_ID_OFST 0</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_FREE_IN_DOT1P_MAPPING_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_FREE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DOT1P_MAPPING_FREE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_SET_TABLE</div><div class='del'>- * Set the mapping table for a .1p mapping.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DOT1P_MAPPING_SET_TABLE 0xa6</div><div class='del'>-#undef MC_CMD_0xa6_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xa6_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_SET_TABLE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_LEN 36</div><div class='del'>-/* The handle of the .1p mapping */</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_DOT1P_MAPPING_ID_OFST 0</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_DOT1P_MAPPING_ID_LEN 4</div><div class='del'>-/* Per-priority mappings (1 32-bit word per entry - an offset or RSS context</div><div class='del'>- * handle)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_MAPPING_TABLE_OFST 4</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_SET_TABLE_IN_MAPPING_TABLE_LEN 32</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_SET_TABLE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DOT1P_MAPPING_SET_TABLE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_GET_TABLE</div><div class='del'>- * Get the mapping table for a .1p mapping.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DOT1P_MAPPING_GET_TABLE 0xa7</div><div class='del'>-#undef MC_CMD_0xa7_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xa7_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_GET_TABLE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_LEN 4</div><div class='del'>-/* The handle of the .1p mapping */</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_DOT1P_MAPPING_ID_OFST 0</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_GET_TABLE_IN_DOT1P_MAPPING_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_LEN 36</div><div class='del'>-/* Per-priority mappings (1 32-bit word per entry - an offset or RSS context</div><div class='del'>- * handle)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_MAPPING_TABLE_OFST 4</div><div class='del'>-#define       MC_CMD_DOT1P_MAPPING_GET_TABLE_OUT_MAPPING_TABLE_LEN 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_VECTOR_CFG</div><div class='del'>- * Get Interrupt Vector config for this PF.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_VECTOR_CFG 0xbf</div><div class='del'>-#undef MC_CMD_0xbf_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xbf_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_VECTOR_CFG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_VECTOR_CFG_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_VECTOR_CFG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_VECTOR_CFG_OUT_LEN 12</div><div class='del'>-/* Base absolute interrupt vector number. */</div><div class='del'>-#define       MC_CMD_GET_VECTOR_CFG_OUT_VEC_BASE_OFST 0</div><div class='del'>-#define       MC_CMD_GET_VECTOR_CFG_OUT_VEC_BASE_LEN 4</div><div class='del'>-/* Number of interrupt vectors allocate to this PF. */</div><div class='del'>-#define       MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_PF_OFST 4</div><div class='del'>-#define       MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_PF_LEN 4</div><div class='del'>-/* Number of interrupt vectors to allocate per VF. */</div><div class='del'>-#define       MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_VF_OFST 8</div><div class='del'>-#define       MC_CMD_GET_VECTOR_CFG_OUT_VECS_PER_VF_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SET_VECTOR_CFG</div><div class='del'>- * Set Interrupt Vector config for this PF.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_VECTOR_CFG 0xc0</div><div class='del'>-#undef MC_CMD_0xc0_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xc0_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_VECTOR_CFG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_VECTOR_CFG_IN_LEN 12</div><div class='del'>-/* Base absolute interrupt vector number, or MC_CMD_RESOURCE_INSTANCE_ANY to</div><div class='del'>- * let the system find a suitable base.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_SET_VECTOR_CFG_IN_VEC_BASE_OFST 0</div><div class='del'>-#define       MC_CMD_SET_VECTOR_CFG_IN_VEC_BASE_LEN 4</div><div class='del'>-/* Number of interrupt vectors allocate to this PF. */</div><div class='del'>-#define       MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_PF_OFST 4</div><div class='del'>-#define       MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_PF_LEN 4</div><div class='del'>-/* Number of interrupt vectors to allocate per VF. */</div><div class='del'>-#define       MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_VF_OFST 8</div><div class='del'>-#define       MC_CMD_SET_VECTOR_CFG_IN_VECS_PER_VF_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_VECTOR_CFG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_VECTOR_CFG_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_VPORT_ADD_MAC_ADDRESS</div><div class='ctx'>  * Add a MAC address to a v-port</div><div class='ctx'>  */</div><div class='hunk'>@@ -19810,124 +20304,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_EVB_PORT_QUERY</div><div class='del'>- * read some config of v-port.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_EVB_PORT_QUERY 0x62</div><div class='del'>-#undef MC_CMD_0x62_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x62_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_EVB_PORT_QUERY_IN msgrequest */</div><div class='del'>-#define    MC_CMD_EVB_PORT_QUERY_IN_LEN 4</div><div class='del'>-/* The handle of the v-port */</div><div class='del'>-#define       MC_CMD_EVB_PORT_QUERY_IN_PORT_ID_OFST 0</div><div class='del'>-#define       MC_CMD_EVB_PORT_QUERY_IN_PORT_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_EVB_PORT_QUERY_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_EVB_PORT_QUERY_OUT_LEN 8</div><div class='del'>-/* The EVB port flags as defined at MC_CMD_VPORT_ALLOC. */</div><div class='del'>-#define       MC_CMD_EVB_PORT_QUERY_OUT_PORT_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_EVB_PORT_QUERY_OUT_PORT_FLAGS_LEN 4</div><div class='del'>-/* The number of VLAN tags that may be used on a v-adaptor connected to this</div><div class='del'>- * EVB port.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_OFST 4</div><div class='del'>-#define       MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DUMP_BUFTBL_ENTRIES</div><div class='del'>- * Dump buffer table entries, mainly for command client debug use. Dumps</div><div class='del'>- * absolute entries, and does not use chunk handles. All entries must be in</div><div class='del'>- * range, and used for q page mapping, Although the latter restriction may be</div><div class='del'>- * lifted in future.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DUMP_BUFTBL_ENTRIES 0xab</div><div class='del'>-#undef MC_CMD_0xab_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xab_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DUMP_BUFTBL_ENTRIES_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DUMP_BUFTBL_ENTRIES_IN_LEN 8</div><div class='del'>-/* Index of the first buffer table entry. */</div><div class='del'>-#define       MC_CMD_DUMP_BUFTBL_ENTRIES_IN_FIRSTID_OFST 0</div><div class='del'>-#define       MC_CMD_DUMP_BUFTBL_ENTRIES_IN_FIRSTID_LEN 4</div><div class='del'>-/* Number of buffer table entries to dump. */</div><div class='del'>-#define       MC_CMD_DUMP_BUFTBL_ENTRIES_IN_NUMENTRIES_OFST 4</div><div class='del'>-#define       MC_CMD_DUMP_BUFTBL_ENTRIES_IN_NUMENTRIES_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DUMP_BUFTBL_ENTRIES_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMIN 12</div><div class='del'>-#define    MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_LEN(num) (0+12*(num))</div><div class='del'>-#define    MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_NUM(len) (((len)-0)/12)</div><div class='del'>-/* Raw buffer table entries, layed out as BUFTBL_ENTRY. */</div><div class='del'>-#define       MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_OFST 0</div><div class='del'>-#define       MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_LEN 12</div><div class='del'>-#define       MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MINNUM 1</div><div class='del'>-#define       MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MAXNUM 21</div><div class='del'>-#define       MC_CMD_DUMP_BUFTBL_ENTRIES_OUT_ENTRY_MAXNUM_MCDI2 85</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SET_RXDP_CONFIG</div><div class='del'>- * Set global RXDP configuration settings</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_RXDP_CONFIG 0xc1</div><div class='del'>-#undef MC_CMD_0xc1_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xc1_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_RXDP_CONFIG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_RXDP_CONFIG_IN_LEN 4</div><div class='del'>-#define       MC_CMD_SET_RXDP_CONFIG_IN_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_SET_RXDP_CONFIG_IN_DATA_LEN 4</div><div class='del'>-#define        MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_OFST 0</div><div class='del'>-#define        MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_LBN 0</div><div class='del'>-#define        MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_DMA_WIDTH 1</div><div class='del'>-#define        MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_LEN_OFST 0</div><div class='del'>-#define        MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_LEN_LBN 1</div><div class='del'>-#define        MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_LEN_WIDTH 2</div><div class='del'>-/* enum: pad to 64 bytes */</div><div class='del'>-#define          MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_64 0x0</div><div class='del'>-/* enum: pad to 128 bytes (Medford only) */</div><div class='del'>-#define          MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_128 0x1</div><div class='del'>-/* enum: pad to 256 bytes (Medford only) */</div><div class='del'>-#define          MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_256 0x2</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_RXDP_CONFIG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_RXDP_CONFIG_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_RXDP_CONFIG</div><div class='del'>- * Get global RXDP configuration settings</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_RXDP_CONFIG 0xc2</div><div class='del'>-#undef MC_CMD_0xc2_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xc2_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_RXDP_CONFIG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_RXDP_CONFIG_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_RXDP_CONFIG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_RXDP_CONFIG_OUT_LEN 4</div><div class='del'>-#define       MC_CMD_GET_RXDP_CONFIG_OUT_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_GET_RXDP_CONFIG_OUT_DATA_LEN 4</div><div class='del'>-#define        MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_LBN 0</div><div class='del'>-#define        MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_DMA_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_LEN_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_LEN_LBN 1</div><div class='del'>-#define        MC_CMD_GET_RXDP_CONFIG_OUT_PAD_HOST_LEN_WIDTH 2</div><div class='del'>-/*             Enum values, see field(s): */</div><div class='del'>-/*                MC_CMD_SET_RXDP_CONFIG/MC_CMD_SET_RXDP_CONFIG_IN/PAD_HOST_LEN */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_GET_CLOCK</div><div class='ctx'>  * Return the system and PDCPU clock frequencies.</div><div class='ctx'>  */</div><div class='hunk'>@@ -19950,210 +20326,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_SET_CLOCK</div><div class='del'>- * Control the system and DPCPU clock frequencies. Changes are lost reboot.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_CLOCK 0xad</div><div class='del'>-#undef MC_CMD_0xad_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xad_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_CLOCK_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_CLOCK_IN_LEN 28</div><div class='del'>-/* Requested frequency in MHz for system clock domain */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_SYS_FREQ_OFST 0</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_SYS_FREQ_LEN 4</div><div class='del'>-/* enum: Leave the system clock domain frequency unchanged */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_IN_SYS_DOMAIN_DONT_CHANGE 0x0</div><div class='del'>-/* Requested frequency in MHz for inter-core clock domain */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_ICORE_FREQ_OFST 4</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_ICORE_FREQ_LEN 4</div><div class='del'>-/* enum: Leave the inter-core clock domain frequency unchanged */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_IN_ICORE_DOMAIN_DONT_CHANGE 0x0</div><div class='del'>-/* Requested frequency in MHz for DPCPU clock domain */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_DPCPU_FREQ_OFST 8</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_DPCPU_FREQ_LEN 4</div><div class='del'>-/* enum: Leave the DPCPU clock domain frequency unchanged */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_IN_DPCPU_DOMAIN_DONT_CHANGE 0x0</div><div class='del'>-/* Requested frequency in MHz for PCS clock domain */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_PCS_FREQ_OFST 12</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_PCS_FREQ_LEN 4</div><div class='del'>-/* enum: Leave the PCS clock domain frequency unchanged */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_IN_PCS_DOMAIN_DONT_CHANGE 0x0</div><div class='del'>-/* Requested frequency in MHz for MC clock domain */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_MC_FREQ_OFST 16</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_MC_FREQ_LEN 4</div><div class='del'>-/* enum: Leave the MC clock domain frequency unchanged */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_IN_MC_DOMAIN_DONT_CHANGE 0x0</div><div class='del'>-/* Requested frequency in MHz for rmon clock domain */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_RMON_FREQ_OFST 20</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_RMON_FREQ_LEN 4</div><div class='del'>-/* enum: Leave the rmon clock domain frequency unchanged */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_IN_RMON_DOMAIN_DONT_CHANGE 0x0</div><div class='del'>-/* Requested frequency in MHz for vswitch clock domain */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_VSWITCH_FREQ_OFST 24</div><div class='del'>-#define       MC_CMD_SET_CLOCK_IN_VSWITCH_FREQ_LEN 4</div><div class='del'>-/* enum: Leave the vswitch clock domain frequency unchanged */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_IN_VSWITCH_DOMAIN_DONT_CHANGE 0x0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_CLOCK_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_CLOCK_OUT_LEN 28</div><div class='del'>-/* Resulting system frequency in MHz */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_SYS_FREQ_OFST 0</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_SYS_FREQ_LEN 4</div><div class='del'>-/* enum: The system clock domain doesn't exist */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_OUT_SYS_DOMAIN_UNSUPPORTED 0x0</div><div class='del'>-/* Resulting inter-core frequency in MHz */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_ICORE_FREQ_OFST 4</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_ICORE_FREQ_LEN 4</div><div class='del'>-/* enum: The inter-core clock domain doesn't exist / isn't used */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_OUT_ICORE_DOMAIN_UNSUPPORTED 0x0</div><div class='del'>-/* Resulting DPCPU frequency in MHz */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_DPCPU_FREQ_OFST 8</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_DPCPU_FREQ_LEN 4</div><div class='del'>-/* enum: The dpcpu clock domain doesn't exist */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_OUT_DPCPU_DOMAIN_UNSUPPORTED 0x0</div><div class='del'>-/* Resulting PCS frequency in MHz */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_PCS_FREQ_OFST 12</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_PCS_FREQ_LEN 4</div><div class='del'>-/* enum: The PCS clock domain doesn't exist / isn't controlled */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_OUT_PCS_DOMAIN_UNSUPPORTED 0x0</div><div class='del'>-/* Resulting MC frequency in MHz */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_MC_FREQ_OFST 16</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_MC_FREQ_LEN 4</div><div class='del'>-/* enum: The MC clock domain doesn't exist / isn't controlled */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_OUT_MC_DOMAIN_UNSUPPORTED 0x0</div><div class='del'>-/* Resulting rmon frequency in MHz */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_RMON_FREQ_OFST 20</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_RMON_FREQ_LEN 4</div><div class='del'>-/* enum: The rmon clock domain doesn't exist / isn't controlled */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_OUT_RMON_DOMAIN_UNSUPPORTED 0x0</div><div class='del'>-/* Resulting vswitch frequency in MHz */</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_VSWITCH_FREQ_OFST 24</div><div class='del'>-#define       MC_CMD_SET_CLOCK_OUT_VSWITCH_FREQ_LEN 4</div><div class='del'>-/* enum: The vswitch clock domain doesn't exist / isn't controlled */</div><div class='del'>-#define          MC_CMD_SET_CLOCK_OUT_VSWITCH_DOMAIN_UNSUPPORTED 0x0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DPCPU_RPC</div><div class='del'>- * Send an arbitrary DPCPU message.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DPCPU_RPC 0xae</div><div class='del'>-#undef MC_CMD_0xae_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xae_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DPCPU_RPC_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DPCPU_RPC_IN_LEN 36</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_IN_CPU_OFST 0</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_IN_CPU_LEN 4</div><div class='del'>-/* enum: RxDPCPU0 */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_DPCPU_RX0 0x0</div><div class='del'>-/* enum: TxDPCPU0 */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_DPCPU_TX0 0x1</div><div class='del'>-/* enum: TxDPCPU1 */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_DPCPU_TX1 0x2</div><div class='del'>-/* enum: RxDPCPU1 (Medford only) */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_DPCPU_RX1 0x3</div><div class='del'>-/* enum: RxDPCPU (will be for the calling function; for now, just an alias of</div><div class='del'>- * DPCPU_RX0)</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_DPCPU_RX 0x80</div><div class='del'>-/* enum: TxDPCPU (will be for the calling function; for now, just an alias of</div><div class='del'>- * DPCPU_TX0)</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_DPCPU_TX 0x81</div><div class='del'>-/* First 8 bits [39:32] of DATA are consumed by MC-DPCPU protocol and must be</div><div class='del'>- * initialised to zero</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_IN_DATA_OFST 4</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_IN_DATA_LEN 32</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_LBN 8</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_CMDNUM_WIDTH 8</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_READ 0x6 /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_WRITE 0x7 /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_SELF_TEST 0xc /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CMDNUM_TXDPCPU_CSR_ACCESS 0xe /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_READ 0x46 /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_WRITE 0x47 /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_SELF_TEST 0x4a /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_CSR_ACCESS 0x4c /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CMDNUM_RXDPCPU_SET_MC_REPLAY_CNTXT 0x4d /* enum */</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_LBN 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_OBJID_WIDTH 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_LBN 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_ADDR_WIDTH 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_LBN 48</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_HDR_CMD_REQ_COUNT_WIDTH 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_LBN 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_INFO_WIDTH 240</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_LBN 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_WIDTH 16</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_STOP_RETURN_RESULT 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_READ 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_WRITE 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_WRITE_READ 0x3 /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_CMD_START_PIPELINED_READ 0x4 /* enum */</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_LBN 48</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_START_DELAY_WIDTH 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_LBN 64</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_RPT_COUNT_WIDTH 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_LBN 80</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_GAP_DELAY_WIDTH 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_LBN 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_WIDTH 16</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_CUT_THROUGH 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_STORE_FORWARD 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_DPCPU_RPC_IN_MC_REPLAY_MODE_STORE_FORWARD_FIRST 0x3 /* enum */</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_LBN 64</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_IN_MC_REPLAY_CNTXT_WIDTH 16</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_IN_WDATA_OFST 12</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_IN_WDATA_LEN 24</div><div class='del'>-/* Register data to write. Only valid in write/write-read. */</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_DATA_OFST 16</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_DATA_LEN 4</div><div class='del'>-/* Register address. */</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_ADDRESS_OFST 20</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_IN_CSR_ACCESS_ADDRESS_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DPCPU_RPC_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DPCPU_RPC_OUT_LEN 36</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_RC_OFST 0</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_RC_LEN 4</div><div class='del'>-/* DATA */</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_DATA_OFST 4</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_DATA_LEN 32</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_LBN 32</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_OUT_HDR_CMD_RESP_ERRCODE_WIDTH 16</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_OFST 4</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_LBN 48</div><div class='del'>-#define        MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_COUNT_WIDTH 16</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_RDATA_OFST 12</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_RDATA_LEN 24</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_1_OFST 12</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_1_LEN 4</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_2_OFST 16</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_2_LEN 4</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_3_OFST 20</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_3_LEN 4</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_4_OFST 24</div><div class='del'>-#define       MC_CMD_DPCPU_RPC_OUT_CSR_ACCESS_READ_VAL_4_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_TRIGGER_INTERRUPT</div><div class='ctx'>  * Trigger an interrupt by prodding the BIU.</div><div class='ctx'>  */</div><div class='hunk'>@@ -20173,66 +20345,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_SHMBOOT_OP</div><div class='del'>- * Special operations to support (for now) shmboot.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SHMBOOT_OP 0xe6</div><div class='del'>-#undef MC_CMD_0xe6_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xe6_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SHMBOOT_OP_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SHMBOOT_OP_IN_LEN 4</div><div class='del'>-/* Identifies the operation to perform */</div><div class='del'>-#define       MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_OFST 0</div><div class='del'>-#define       MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_LEN 4</div><div class='del'>-/* enum: Copy slave_data section to the slave core. (Greenport only) */</div><div class='del'>-#define          MC_CMD_SHMBOOT_OP_IN_PUSH_SLAVE_DATA 0x0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SHMBOOT_OP_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SHMBOOT_OP_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_CAP_BLK_READ</div><div class='del'>- * Read multiple 64bit words from capture block memory</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_CAP_BLK_READ 0xe7</div><div class='del'>-#undef MC_CMD_0xe7_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xe7_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CAP_BLK_READ_IN msgrequest */</div><div class='del'>-#define    MC_CMD_CAP_BLK_READ_IN_LEN 12</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_IN_CAP_REG_OFST 0</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_IN_CAP_REG_LEN 4</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_IN_ADDR_OFST 4</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_IN_ADDR_LEN 4</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_IN_COUNT_OFST 8</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_IN_COUNT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_CAP_BLK_READ_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_CAP_BLK_READ_OUT_LENMIN 8</div><div class='del'>-#define    MC_CMD_CAP_BLK_READ_OUT_LENMAX 248</div><div class='del'>-#define    MC_CMD_CAP_BLK_READ_OUT_LENMAX_MCDI2 1016</div><div class='del'>-#define    MC_CMD_CAP_BLK_READ_OUT_LEN(num) (0+8*(num))</div><div class='del'>-#define    MC_CMD_CAP_BLK_READ_OUT_BUFFER_NUM(len) (((len)-0)/8)</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LEN 4</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LBN 0</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LEN 4</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LBN 32</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31</div><div class='del'>-#define       MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM_MCDI2 127</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_DUMP_DO</div><div class='ctx'>  * Take a dump of the DUT state</div><div class='ctx'>  */</div><div class='hunk'>@@ -20380,34 +20492,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_SET_PSU</div><div class='del'>- * Adjusts power supply parameters. This is a warranty-voiding operation.</div><div class='del'>- * Returns: ENOENT if the parameter or rail specified does not exist, EINVAL if</div><div class='del'>- * the parameter is out of range.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_PSU 0xea</div><div class='del'>-#undef MC_CMD_0xea_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xea_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_PSU_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_PSU_IN_LEN 12</div><div class='del'>-#define       MC_CMD_SET_PSU_IN_PARAM_OFST 0</div><div class='del'>-#define       MC_CMD_SET_PSU_IN_PARAM_LEN 4</div><div class='del'>-#define          MC_CMD_SET_PSU_IN_PARAM_SUPPLY_VOLTAGE 0x0 /* enum */</div><div class='del'>-#define       MC_CMD_SET_PSU_IN_RAIL_OFST 4</div><div class='del'>-#define       MC_CMD_SET_PSU_IN_RAIL_LEN 4</div><div class='del'>-#define          MC_CMD_SET_PSU_IN_RAIL_0V9 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_SET_PSU_IN_RAIL_1V2 0x1 /* enum */</div><div class='del'>-/* desired value, eg voltage in mV */</div><div class='del'>-#define       MC_CMD_SET_PSU_IN_VALUE_OFST 8</div><div class='del'>-#define       MC_CMD_SET_PSU_IN_VALUE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_PSU_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_PSU_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_GET_FUNCTION_INFO</div><div class='ctx'>  * Get function information. PF and VF number.</div><div class='ctx'>  */</div><div class='hunk'>@@ -20448,7 +20532,7 @@</div><div class='ctx'> #define MC_CMD_ENABLE_OFFLINE_BIST 0xed</div><div class='ctx'> #undef MC_CMD_0xed_PRIVILEGE_CTG</div><div class='ctx'> </div><div class='del'>-#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='add'>+#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_ENABLE_OFFLINE_BIST_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN 0</div><div class='hunk'>@@ -20458,137 +20542,13 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_UART_SEND_DATA</div><div class='del'>- * Send checksummed[sic] block of data over the uart. Response is a placeholder</div><div class='del'>- * should we wish to make this reliable; currently requests are fire-and-</div><div class='del'>- * forget.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_UART_SEND_DATA 0xee</div><div class='del'>-#undef MC_CMD_0xee_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xee_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_UART_SEND_DATA_OUT msgrequest */</div><div class='del'>-#define    MC_CMD_UART_SEND_DATA_OUT_LENMIN 16</div><div class='del'>-#define    MC_CMD_UART_SEND_DATA_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_UART_SEND_DATA_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_UART_SEND_DATA_OUT_LEN(num) (16+1*(num))</div><div class='del'>-#define    MC_CMD_UART_SEND_DATA_OUT_DATA_NUM(len) (((len)-16)/1)</div><div class='del'>-/* CRC32 over OFFSET, LENGTH, RESERVED, DATA */</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_CHECKSUM_OFST 0</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_CHECKSUM_LEN 4</div><div class='del'>-/* Offset at which to write the data */</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_OFFSET_OFST 4</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_OFFSET_LEN 4</div><div class='del'>-/* Length of data */</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_LENGTH_OFST 8</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_LENGTH_LEN 4</div><div class='del'>-/* Reserved for future use */</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_RESERVED_OFST 12</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_RESERVED_LEN 4</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_DATA_OFST 16</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_DATA_MAXNUM 236</div><div class='del'>-#define       MC_CMD_UART_SEND_DATA_OUT_DATA_MAXNUM_MCDI2 1004</div><div class='del'>-</div><div class='del'>-/* MC_CMD_UART_SEND_DATA_IN msgresponse */</div><div class='del'>-#define    MC_CMD_UART_SEND_DATA_IN_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_UART_RECV_DATA</div><div class='del'>- * Request checksummed[sic] block of data over the uart. Only a placeholder,</div><div class='del'>- * subject to change and not currently implemented.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_UART_RECV_DATA 0xef</div><div class='del'>-#undef MC_CMD_0xef_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xef_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_UART_RECV_DATA_OUT msgrequest */</div><div class='del'>-#define    MC_CMD_UART_RECV_DATA_OUT_LEN 16</div><div class='del'>-/* CRC32 over OFFSET, LENGTH, RESERVED */</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_OUT_CHECKSUM_OFST 0</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_OUT_CHECKSUM_LEN 4</div><div class='del'>-/* Offset from which to read the data */</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_OUT_OFFSET_OFST 4</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_OUT_OFFSET_LEN 4</div><div class='del'>-/* Length of data */</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_OUT_LENGTH_OFST 8</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_OUT_LENGTH_LEN 4</div><div class='del'>-/* Reserved for future use */</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_OUT_RESERVED_OFST 12</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_OUT_RESERVED_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_UART_RECV_DATA_IN msgresponse */</div><div class='del'>-#define    MC_CMD_UART_RECV_DATA_IN_LENMIN 16</div><div class='del'>-#define    MC_CMD_UART_RECV_DATA_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_UART_RECV_DATA_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_UART_RECV_DATA_IN_LEN(num) (16+1*(num))</div><div class='del'>-#define    MC_CMD_UART_RECV_DATA_IN_DATA_NUM(len) (((len)-16)/1)</div><div class='del'>-/* CRC32 over RESERVED1, RESERVED2, RESERVED3, DATA */</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_CHECKSUM_OFST 0</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_CHECKSUM_LEN 4</div><div class='del'>-/* Offset at which to write the data */</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_RESERVED1_OFST 4</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_RESERVED1_LEN 4</div><div class='del'>-/* Length of data */</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_RESERVED2_OFST 8</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_RESERVED2_LEN 4</div><div class='del'>-/* Reserved for future use */</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_RESERVED3_OFST 12</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_RESERVED3_LEN 4</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_DATA_OFST 16</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_DATA_MAXNUM 236</div><div class='del'>-#define       MC_CMD_UART_RECV_DATA_IN_DATA_MAXNUM_MCDI2 1004</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_READ_FUSES</div><div class='del'>- * Read data programmed into the device One-Time-Programmable (OTP) Fuses</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_READ_FUSES 0xf0</div><div class='del'>-#undef MC_CMD_0xf0_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xf0_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_READ_FUSES_IN msgrequest */</div><div class='del'>-#define    MC_CMD_READ_FUSES_IN_LEN 8</div><div class='del'>-/* Offset in OTP to read */</div><div class='del'>-#define       MC_CMD_READ_FUSES_IN_OFFSET_OFST 0</div><div class='del'>-#define       MC_CMD_READ_FUSES_IN_OFFSET_LEN 4</div><div class='del'>-/* Length of data to read in bytes */</div><div class='del'>-#define       MC_CMD_READ_FUSES_IN_LENGTH_OFST 4</div><div class='del'>-#define       MC_CMD_READ_FUSES_IN_LENGTH_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_READ_FUSES_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_READ_FUSES_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_READ_FUSES_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_READ_FUSES_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_READ_FUSES_OUT_LEN(num) (4+1*(num))</div><div class='del'>-#define    MC_CMD_READ_FUSES_OUT_DATA_NUM(len) (((len)-4)/1)</div><div class='del'>-/* Length of returned OTP data in bytes */</div><div class='del'>-#define       MC_CMD_READ_FUSES_OUT_LENGTH_OFST 0</div><div class='del'>-#define       MC_CMD_READ_FUSES_OUT_LENGTH_LEN 4</div><div class='del'>-/* Returned data */</div><div class='del'>-#define       MC_CMD_READ_FUSES_OUT_DATA_OFST 4</div><div class='del'>-#define       MC_CMD_READ_FUSES_OUT_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_READ_FUSES_OUT_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_READ_FUSES_OUT_DATA_MAXNUM 248</div><div class='del'>-#define       MC_CMD_READ_FUSES_OUT_DATA_MAXNUM_MCDI2 1016</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_KR_TUNE</div><div class='ctx'>  * Get or set KR Serdes RXEQ and TX Driver settings</div><div class='ctx'>  */</div><div class='ctx'> #define MC_CMD_KR_TUNE 0xf1</div><div class='ctx'> #undef MC_CMD_0xf1_PRIVILEGE_CTG</div><div class='ctx'> </div><div class='del'>-#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='add'>+#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND</div><div class='ctx'> </div><div class='ctx'> /* MC_CMD_KR_TUNE_IN msgrequest */</div><div class='ctx'> #define    MC_CMD_KR_TUNE_IN_LENMIN 4</div><div class='hunk'>@@ -21138,262 +21098,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_PCIE_TUNE</div><div class='del'>- * Get or set PCIE Serdes RXEQ and TX Driver settings</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PCIE_TUNE 0xf2</div><div class='del'>-#undef MC_CMD_0xf2_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xf2_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_IN_LENMIN 4</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_IN_LEN(num) (4+4*(num))</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_NUM(len) (((len)-4)/4)</div><div class='del'>-/* Requested operation */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_OP_LEN 1</div><div class='del'>-/* enum: Get current RXEQ settings */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_IN_RXEQ_GET 0x0</div><div class='del'>-/* enum: Override RXEQ settings */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_IN_RXEQ_SET 0x1</div><div class='del'>-/* enum: Get current TX Driver settings */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_IN_TXEQ_GET 0x2</div><div class='del'>-/* enum: Override TX Driver settings */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_IN_TXEQ_SET 0x3</div><div class='del'>-/* enum: Start PCIe Serdes Eye diagram plot on a given lane. */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_IN_START_EYE_PLOT 0x5</div><div class='del'>-/* enum: Poll PCIe Serdes Eye diagram plot. Returns one row of BER data. The</div><div class='del'>- * caller should call this command repeatedly after starting eye plot, until no</div><div class='del'>- * more data is returned.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_IN_POLL_EYE_PLOT 0x6</div><div class='del'>-/* enum: Enable the SERDES BIST and set it to generate a 200MHz square wave */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_IN_BIST_SQUARE_WAVE 0x7</div><div class='del'>-/* Align the arguments to 32 bits */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_RSVD_OFST 1</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_RSVD_LEN 3</div><div class='del'>-/* Arguments specific to the operation */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_OFST 4</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_LEN 4</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MINNUM 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MAXNUM 62</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_IN_PCIE_TUNE_ARGS_MAXNUM_MCDI2 254</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_RXEQ_GET_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_GET_IN_LEN 4</div><div class='del'>-/* Requested operation */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_OP_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_OP_LEN 1</div><div class='del'>-/* Align the arguments to 32 bits */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_RSVD_OFST 1</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_GET_IN_PCIE_TUNE_RSVD_LEN 3</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_RXEQ_GET_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_NUM(len) (((len)-0)/4)</div><div class='del'>-/* RXEQ Parameter */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LEN 4</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MINNUM 1</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM 63</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_MAXNUM_MCDI2 255</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_OFST 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_LBN 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_ID_WIDTH 8</div><div class='del'>-/* enum: Attenuation (0-15) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_ATT 0x0</div><div class='del'>-/* enum: CTLE Boost (0-15) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_BOOST 0x1</div><div class='del'>-/* enum: DFE Tap1 (0 - max negative, 64 - zero, 127 - max positive) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP1 0x2</div><div class='del'>-/* enum: DFE Tap2 (0 - max negative, 32 - zero, 63 - max positive) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP2 0x3</div><div class='del'>-/* enum: DFE Tap3 (0 - max negative, 32 - zero, 63 - max positive) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP3 0x4</div><div class='del'>-/* enum: DFE Tap4 (0 - max negative, 32 - zero, 63 - max positive) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP4 0x5</div><div class='del'>-/* enum: DFE Tap5 (0 - max negative, 32 - zero, 63 - max positive) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_TAP5 0x6</div><div class='del'>-/* enum: DFE DLev */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_DFE_DLEV 0x7</div><div class='del'>-/* enum: Figure of Merit */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_FOM 0x8</div><div class='del'>-/* enum: CTLE EQ Capacitor (HF Gain) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_CTLE_EQC 0x9</div><div class='del'>-/* enum: CTLE EQ Resistor (DC Gain) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_CTLE_EQRES 0xa</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_OFST 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_LBN 8</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_LANE_WIDTH 5</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_0 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_1 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_2 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_3 0x3 /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_4 0x4 /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_5 0x5 /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_6 0x6 /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_7 0x7 /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_8 0x8 /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_9 0x9 /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_10 0xa /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_11 0xb /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_12 0xc /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_13 0xd /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_14 0xe /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_15 0xf /* enum */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_LANE_ALL 0x10 /* enum */</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_OFST 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_LBN 13</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_AUTOCAL_WIDTH 1</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_OFST 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_LBN 14</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_RESERVED_WIDTH 10</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_OFST 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_LBN 24</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_GET_OUT_PARAM_CURRENT_WIDTH 8</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_RXEQ_SET_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMIN 8</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_SET_IN_LEN(num) (4+4*(num))</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_NUM(len) (((len)-4)/4)</div><div class='del'>-/* Requested operation */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_OP_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_OP_LEN 1</div><div class='del'>-/* Align the arguments to 32 bits */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_RSVD_OFST 1</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PCIE_TUNE_RSVD_LEN 3</div><div class='del'>-/* RXEQ Parameter */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_OFST 4</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LEN 4</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MINNUM 1</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MAXNUM 62</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_MAXNUM_MCDI2 254</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_OFST 4</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_LBN 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_ID_WIDTH 8</div><div class='del'>-/*             Enum values, see field(s): */</div><div class='del'>-/*                MC_CMD_PCIE_TUNE_RXEQ_GET_OUT/PARAM_ID */</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LANE_OFST 4</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LANE_LBN 8</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_LANE_WIDTH 5</div><div class='del'>-/*             Enum values, see field(s): */</div><div class='del'>-/*                MC_CMD_PCIE_TUNE_RXEQ_GET_OUT/PARAM_LANE */</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_OFST 4</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_LBN 13</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_AUTOCAL_WIDTH 1</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED_OFST 4</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED_LBN 14</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED_WIDTH 2</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_INITIAL_OFST 4</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_INITIAL_LBN 16</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_PARAM_INITIAL_WIDTH 8</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED2_OFST 4</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED2_LBN 24</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_RXEQ_SET_IN_RESERVED2_WIDTH 8</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_RXEQ_SET_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_RXEQ_SET_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_TXEQ_GET_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_TXEQ_GET_IN_LEN 4</div><div class='del'>-/* Requested operation */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_OP_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_OP_LEN 1</div><div class='del'>-/* Align the arguments to 32 bits */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_RSVD_OFST 1</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_TXEQ_GET_IN_PCIE_TUNE_RSVD_LEN 3</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_TXEQ_GET_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_NUM(len) (((len)-0)/4)</div><div class='del'>-/* RXEQ Parameter */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LEN 4</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MINNUM 1</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM 63</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_MAXNUM_MCDI2 255</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_OFST 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_LBN 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_ID_WIDTH 8</div><div class='del'>-/* enum: TxMargin (PIPE) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_TXMARGIN 0x0</div><div class='del'>-/* enum: TxSwing (PIPE) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_TXSWING 0x1</div><div class='del'>-/* enum: De-emphasis coefficient C(-1) (PIPE) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_CM1 0x2</div><div class='del'>-/* enum: De-emphasis coefficient C(0) (PIPE) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_C0 0x3</div><div class='del'>-/* enum: De-emphasis coefficient C(+1) (PIPE) */</div><div class='del'>-#define          MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_CP1 0x4</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_OFST 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_LBN 8</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_LANE_WIDTH 4</div><div class='del'>-/*             Enum values, see field(s): */</div><div class='del'>-/*                MC_CMD_PCIE_TUNE_RXEQ_GET_OUT/PARAM_LANE */</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_OFST 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_LBN 12</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_RESERVED_WIDTH 12</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_OFST 0</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_LBN 24</div><div class='del'>-#define        MC_CMD_PCIE_TUNE_TXEQ_GET_OUT_PARAM_CURRENT_WIDTH 8</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LEN 8</div><div class='del'>-/* Requested operation */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_OP_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_OP_LEN 1</div><div class='del'>-/* Align the arguments to 32 bits */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_RSVD_OFST 1</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_PCIE_TUNE_RSVD_LEN 3</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LANE_OFST 4</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_START_EYE_PLOT_IN_LANE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_START_EYE_PLOT_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_START_EYE_PLOT_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_LEN 4</div><div class='del'>-/* Requested operation */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_OP_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_OP_LEN 1</div><div class='del'>-/* Align the arguments to 32 bits */</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_RSVD_OFST 1</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_IN_PCIE_TUNE_RSVD_LEN 3</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMIN 0</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_LEN(num) (0+2*(num))</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_NUM(len) (((len)-0)/2)</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_OFST 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_LEN 2</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MINNUM 0</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM 126</div><div class='del'>-#define       MC_CMD_PCIE_TUNE_POLL_EYE_PLOT_OUT_SAMPLES_MAXNUM_MCDI2 510</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_OUT msgrequest */</div><div class='del'>-#define    MC_CMD_PCIE_TUNE_BIST_SQUARE_WAVE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_LICENSING</div><div class='ctx'>  * Operations on the NVRAM_PARTITION_TYPE_LICENSE application license partition</div><div class='ctx'>  * - not used for V3 licensing</div><div class='hunk'>@@ -21532,56 +21236,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_LICENSING_GET_ID_V3</div><div class='del'>- * Get ID and type from the NVRAM_PARTITION_TYPE_LICENSE application license</div><div class='del'>- * partition - V3 licensing (Medford)</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_LICENSING_GET_ID_V3 0xd1</div><div class='del'>-#undef MC_CMD_0xd1_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xd1_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSING_GET_ID_V3_IN msgrequest */</div><div class='del'>-#define    MC_CMD_LICENSING_GET_ID_V3_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSING_GET_ID_V3_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_LICENSING_GET_ID_V3_OUT_LENMIN 8</div><div class='del'>-#define    MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_LICENSING_GET_ID_V3_OUT_LEN(num) (8+1*(num))</div><div class='del'>-#define    MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_NUM(len) (((len)-8)/1)</div><div class='del'>-/* type of license (eg 3) */</div><div class='del'>-#define       MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_LEN 4</div><div class='del'>-/* length of the license ID (in bytes) */</div><div class='del'>-#define       MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_OFST 4</div><div class='del'>-#define       MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_LEN 4</div><div class='del'>-/* the unique license ID of the adapter */</div><div class='del'>-#define       MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_OFST 8</div><div class='del'>-#define       MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LEN 1</div><div class='del'>-#define       MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MINNUM 0</div><div class='del'>-#define       MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MAXNUM 244</div><div class='del'>-#define       MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_MAXNUM_MCDI2 1012</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_MC2MC_PROXY</div><div class='del'>- * Execute an arbitrary MCDI command on the slave MC of a dual-core device.</div><div class='del'>- * This will fail on a single-core system.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_MC2MC_PROXY 0xf4</div><div class='del'>-#undef MC_CMD_0xf4_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xf4_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MC2MC_PROXY_IN msgrequest */</div><div class='del'>-#define    MC_CMD_MC2MC_PROXY_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MC2MC_PROXY_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_MC2MC_PROXY_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_GET_LICENSED_APP_STATE</div><div class='ctx'>  * Query the state of an individual licensed application. (Note that the actual</div><div class='ctx'>  * state may be invalidated by the MC_CMD_LICENSING OP_UPDATE_LICENSE operation</div><div class='hunk'>@@ -21610,424 +21264,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_GET_LICENSED_V3_APP_STATE</div><div class='del'>- * Query the state of an individual licensed application. (Note that the actual</div><div class='del'>- * state may be invalidated by the MC_CMD_LICENSING_V3 OP_UPDATE_LICENSE</div><div class='del'>- * operation or a reboot of the MC.) Used for V3 licensing (Medford)</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_LICENSED_V3_APP_STATE 0xd2</div><div class='del'>-#undef MC_CMD_0xd2_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xd2_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_LICENSED_V3_APP_STATE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_LICENSED_V3_APP_STATE_IN_LEN 8</div><div class='del'>-/* application ID to query (LICENSED_V3_APPS_xxx) expressed as a single bit</div><div class='del'>- * mask</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_OFST 0</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LEN 8</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_OFST 0</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LEN 4</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LBN 0</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LEN 4</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LBN 32</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_WIDTH 32</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_LICENSED_V3_APP_STATE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4</div><div class='del'>-/* state of this application */</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_STATE_OFST 0</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_STATE_LEN 4</div><div class='del'>-/* enum: no (or invalid) license is present for the application */</div><div class='del'>-#define          MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_NOT_LICENSED 0x0</div><div class='del'>-/* enum: a valid license is present for the application */</div><div class='del'>-#define          MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LICENSED 0x1</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES</div><div class='del'>- * Query the state of an one or more licensed features. (Note that the actual</div><div class='del'>- * state may be invalidated by the MC_CMD_LICENSING_V3 OP_UPDATE_LICENSE</div><div class='del'>- * operation or a reboot of the MC.) Used for V3 licensing (Medford)</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES 0xd3</div><div class='del'>-#undef MC_CMD_0xd3_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xd3_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_LEN 8</div><div class='del'>-/* features to query (LICENSED_V3_FEATURES_xxx) expressed as a mask with one or</div><div class='del'>- * more bits set</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_OFST 0</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LEN 8</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_OFST 0</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LEN 4</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LBN 0</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LEN 4</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LBN 32</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_WIDTH 32</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_LEN 8</div><div class='del'>-/* states of these features - bit set for licensed, clear for not licensed */</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_OFST 0</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LEN 8</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_OFST 0</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LEN 4</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LBN 0</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LEN 4</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LBN 32</div><div class='del'>-#define       MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_WIDTH 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_LICENSED_APP_OP</div><div class='del'>- * Perform an action for an individual licensed application - not used for V3</div><div class='del'>- * licensing.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_LICENSED_APP_OP 0xf6</div><div class='del'>-#undef MC_CMD_0xf6_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xf6_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSED_APP_OP_IN msgrequest */</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_IN_LENMIN 8</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_IN_LEN(num) (8+4*(num))</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_IN_ARGS_NUM(len) (((len)-8)/4)</div><div class='del'>-/* application ID */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_IN_APP_ID_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_IN_APP_ID_LEN 4</div><div class='del'>-/* the type of operation requested */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_IN_OP_OFST 4</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_IN_OP_LEN 4</div><div class='del'>-/* enum: validate application */</div><div class='del'>-#define          MC_CMD_LICENSED_APP_OP_IN_OP_VALIDATE 0x0</div><div class='del'>-/* enum: mask application */</div><div class='del'>-#define          MC_CMD_LICENSED_APP_OP_IN_OP_MASK 0x1</div><div class='del'>-/* arguments specific to this particular operation */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_IN_ARGS_OFST 8</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_IN_ARGS_LEN 4</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_IN_ARGS_MINNUM 0</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM 61</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_IN_ARGS_MAXNUM_MCDI2 253</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSED_APP_OP_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_OUT_LENMIN 0</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_OUT_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_OUT_RESULT_NUM(len) (((len)-0)/4)</div><div class='del'>-/* result specific to this particular operation */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_OUT_RESULT_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_OUT_RESULT_LEN 4</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_OUT_RESULT_MINNUM 0</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM 63</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_OUT_RESULT_MAXNUM_MCDI2 255</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSED_APP_OP_VALIDATE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_VALIDATE_IN_LEN 72</div><div class='del'>-/* application ID */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_LEN 4</div><div class='del'>-/* the type of operation requested */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_OFST 4</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_LEN 4</div><div class='del'>-/* validation challenge */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_OFST 8</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_VALIDATE_IN_CHALLENGE_LEN 64</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSED_APP_OP_VALIDATE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_LEN 68</div><div class='del'>-/* feature expiry (time_t) */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_LEN 4</div><div class='del'>-/* validation response */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_OFST 4</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_LEN 64</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSED_APP_OP_MASK_IN msgrequest */</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_MASK_IN_LEN 12</div><div class='del'>-/* application ID */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_LEN 4</div><div class='del'>-/* the type of operation requested */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_MASK_IN_OP_OFST 4</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_MASK_IN_OP_LEN 4</div><div class='del'>-/* flag */</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_OFST 8</div><div class='del'>-#define       MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSED_APP_OP_MASK_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_LICENSED_APP_OP_MASK_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_LICENSED_V3_VALIDATE_APP</div><div class='del'>- * Perform validation for an individual licensed application - V3 licensing</div><div class='del'>- * (Medford)</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_LICENSED_V3_VALIDATE_APP 0xd4</div><div class='del'>-#undef MC_CMD_0xd4_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xd4_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSED_V3_VALIDATE_APP_IN msgrequest */</div><div class='del'>-#define    MC_CMD_LICENSED_V3_VALIDATE_APP_IN_LEN 56</div><div class='del'>-/* challenge for validation (384 bits) */</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_CHALLENGE_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_CHALLENGE_LEN 48</div><div class='del'>-/* application ID expressed as a single bit mask */</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_OFST 48</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LEN 8</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_OFST 48</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LEN 4</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LBN 384</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_OFST 52</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LEN 4</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LBN 416</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_WIDTH 32</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSED_V3_VALIDATE_APP_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_LEN 116</div><div class='del'>-/* validation response to challenge in the form of ECDSA signature consisting</div><div class='del'>- * of two 384-bit integers, r and s, in big-endian order. The signature signs a</div><div class='del'>- * SHA-384 digest of a message constructed from the concatenation of the input</div><div class='del'>- * message and the remaining fields of this output message, e.g. challenge[48</div><div class='del'>- * bytes] ... expiry_time[4 bytes] ...</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_RESPONSE_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_RESPONSE_LEN 96</div><div class='del'>-/* application expiry time */</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_TIME_OFST 96</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_TIME_LEN 4</div><div class='del'>-/* application expiry units */</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNITS_OFST 100</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNITS_LEN 4</div><div class='del'>-/* enum: expiry units are accounting units */</div><div class='del'>-#define          MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNIT_ACC 0x0</div><div class='del'>-/* enum: expiry units are calendar days */</div><div class='del'>-#define          MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNIT_DAYS 0x1</div><div class='del'>-/* base MAC address of the NIC stored in NVRAM (note that this is a constant</div><div class='del'>- * value for a given NIC regardless which function is calling, effectively this</div><div class='del'>- * is PF0 base MAC address)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_BASE_MACADDR_OFST 104</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_BASE_MACADDR_LEN 6</div><div class='del'>-/* MAC address of v-adaptor associated with the client. If no such v-adapator</div><div class='del'>- * exists, then the field is filled with 0xFF.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_VADAPTOR_MACADDR_OFST 110</div><div class='del'>-#define       MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_VADAPTOR_MACADDR_LEN 6</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_LICENSED_V3_MASK_FEATURES</div><div class='del'>- * Mask features - V3 licensing (Medford)</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_LICENSED_V3_MASK_FEATURES 0xd5</div><div class='del'>-#undef MC_CMD_0xd5_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xd5_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSED_V3_MASK_FEATURES_IN msgrequest */</div><div class='del'>-#define    MC_CMD_LICENSED_V3_MASK_FEATURES_IN_LEN 12</div><div class='del'>-/* mask to be applied to features to be changed */</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LEN 8</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LEN 4</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LBN 0</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LEN 4</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LBN 32</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_WIDTH 32</div><div class='del'>-/* whether to turn on or turn off the masked features */</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_OFST 8</div><div class='del'>-#define       MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4</div><div class='del'>-/* enum: turn the features off */</div><div class='del'>-#define          MC_CMD_LICENSED_V3_MASK_FEATURES_IN_OFF 0x0</div><div class='del'>-/* enum: turn the features back on */</div><div class='del'>-#define          MC_CMD_LICENSED_V3_MASK_FEATURES_IN_ON 0x1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSED_V3_MASK_FEATURES_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_LICENSED_V3_MASK_FEATURES_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_LICENSING_V3_TEMPORARY</div><div class='del'>- * Perform operations to support installation of a single temporary license in</div><div class='del'>- * the adapter, in addition to those found in the licensing partition. See</div><div class='del'>- * SF-116124-SW for an overview of how this could be used. The license is</div><div class='del'>- * stored in MC persistent data and so will survive a MC reboot, but will be</div><div class='del'>- * erased when the adapter is power cycled</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_LICENSING_V3_TEMPORARY 0xd6</div><div class='del'>-#undef MC_CMD_0xd6_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xd6_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSING_V3_TEMPORARY_IN msgrequest */</div><div class='del'>-#define    MC_CMD_LICENSING_V3_TEMPORARY_IN_LEN 4</div><div class='del'>-/* operation code */</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_IN_OP_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_IN_OP_LEN 4</div><div class='del'>-/* enum: install a new license, overwriting any existing temporary license.</div><div class='del'>- * This is an asynchronous operation owing to the time taken to validate an</div><div class='del'>- * ECDSA license</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_LICENSING_V3_TEMPORARY_SET 0x0</div><div class='del'>-/* enum: clear the license immediately rather than waiting for the next power</div><div class='del'>- * cycle</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_LICENSING_V3_TEMPORARY_CLEAR 0x1</div><div class='del'>-/* enum: get the status of the asynchronous MC_CMD_LICENSING_V3_TEMPORARY_SET</div><div class='del'>- * operation</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_LICENSING_V3_TEMPORARY_STATUS 0x2</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSING_V3_TEMPORARY_IN_SET msgrequest */</div><div class='del'>-#define    MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LEN 164</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_OP_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_OP_LEN 4</div><div class='del'>-/* ECDSA license and signature */</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LICENSE_OFST 4</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LICENSE_LEN 160</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR msgrequest */</div><div class='del'>-#define    MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_LEN 4</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_OP_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_OP_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS msgrequest */</div><div class='del'>-#define    MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_LEN 4</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_OP_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_OP_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS msgresponse */</div><div class='del'>-#define    MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LEN 12</div><div class='del'>-/* status code */</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_STATUS_OFST 0</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_STATUS_LEN 4</div><div class='del'>-/* enum: finished validating and installing license */</div><div class='del'>-#define          MC_CMD_LICENSING_V3_TEMPORARY_STATUS_OK 0x0</div><div class='del'>-/* enum: license validation and installation in progress */</div><div class='del'>-#define          MC_CMD_LICENSING_V3_TEMPORARY_STATUS_IN_PROGRESS 0x1</div><div class='del'>-/* enum: licensing error. More specific error messages are not provided to</div><div class='del'>- * avoid exposing details of the licensing system to the client</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_LICENSING_V3_TEMPORARY_STATUS_ERROR 0x2</div><div class='del'>-/* bitmask of licensed features */</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LEN 8</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LEN 4</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LBN 32</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_OFST 8</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LEN 4</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LBN 64</div><div class='del'>-#define       MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_WIDTH 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SET_PORT_SNIFF_CONFIG</div><div class='del'>- * Configure RX port sniffing for the physical port associated with the calling</div><div class='del'>- * function. Only a privileged function may change the port sniffing</div><div class='del'>- * configuration. A copy of all traffic delivered to the host (non-promiscuous</div><div class='del'>- * mode) or all traffic arriving at the port (promiscuous mode) may be</div><div class='del'>- * delivered to a specific queue, or a set of queues with RSS.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7</div><div class='del'>-#undef MC_CMD_0xf7_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xf7_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_PORT_SNIFF_CONFIG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_PORT_SNIFF_CONFIG_IN_LEN 16</div><div class='del'>-/* configuration flags */</div><div class='del'>-#define       MC_CMD_SET_PORT_SNIFF_CONFIG_IN_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_SET_PORT_SNIFF_CONFIG_IN_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_OFST 0</div><div class='del'>-#define        MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_LBN 0</div><div class='del'>-#define        MC_CMD_SET_PORT_SNIFF_CONFIG_IN_ENABLE_WIDTH 1</div><div class='del'>-#define        MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_OFST 0</div><div class='del'>-#define        MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_LBN 1</div><div class='del'>-#define        MC_CMD_SET_PORT_SNIFF_CONFIG_IN_PROMISCUOUS_WIDTH 1</div><div class='del'>-/* receive queue handle (for RSS mode, this is the base queue) */</div><div class='del'>-#define       MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_QUEUE_OFST 4</div><div class='del'>-#define       MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_QUEUE_LEN 4</div><div class='del'>-/* receive mode */</div><div class='del'>-#define       MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_OFST 8</div><div class='del'>-#define       MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_LEN 4</div><div class='del'>-/* enum: receive to just the specified queue */</div><div class='del'>-#define          MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_SIMPLE 0x0</div><div class='del'>-/* enum: receive to multiple queues using RSS context */</div><div class='del'>-#define          MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_MODE_RSS 0x1</div><div class='del'>-/* RSS context (for RX_MODE_RSS) as returned by MC_CMD_RSS_CONTEXT_ALLOC. Note</div><div class='del'>- * that these handles should be considered opaque to the host, although a value</div><div class='del'>- * of 0xFFFFFFFF is guaranteed never to be a valid handle.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_OFST 12</div><div class='del'>-#define       MC_CMD_SET_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_PORT_SNIFF_CONFIG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_PORT_SNIFF_CONFIG_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_PORT_SNIFF_CONFIG</div><div class='del'>- * Obtain the current RX port sniffing configuration for the physical port</div><div class='del'>- * associated with the calling function. Only a privileged function may read</div><div class='del'>- * the configuration.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8</div><div class='del'>-#undef MC_CMD_0xf8_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xf8_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PORT_SNIFF_CONFIG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_PORT_SNIFF_CONFIG_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PORT_SNIFF_CONFIG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_LEN 16</div><div class='del'>-/* configuration flags */</div><div class='del'>-#define       MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_OFST 0</div><div class='del'>-#define        MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_LBN 0</div><div class='del'>-#define        MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_ENABLE_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_OFST 0</div><div class='del'>-#define        MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_LBN 1</div><div class='del'>-#define        MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_PROMISCUOUS_WIDTH 1</div><div class='del'>-/* receiving queue handle (for RSS mode, this is the base queue) */</div><div class='del'>-#define       MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_OFST 4</div><div class='del'>-#define       MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_LEN 4</div><div class='del'>-/* receive mode */</div><div class='del'>-#define       MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_OFST 8</div><div class='del'>-#define       MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_LEN 4</div><div class='del'>-/* enum: receiving to just the specified queue */</div><div class='del'>-#define          MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_SIMPLE 0x0</div><div class='del'>-/* enum: receiving to multiple queues using RSS context */</div><div class='del'>-#define          MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_MODE_RSS 0x1</div><div class='del'>-/* RSS context (for RX_MODE_RSS) */</div><div class='del'>-#define       MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_OFST 12</div><div class='del'>-#define       MC_CMD_GET_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_SET_PARSER_DISP_CONFIG</div><div class='ctx'>  * Change configuration related to the parser-dispatcher subsystem.</div><div class='ctx'>  */</div><div class='hunk'>@@ -22073,305 +21309,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_GET_PARSER_DISP_CONFIG</div><div class='del'>- * Read configuration related to the parser-dispatcher subsystem.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_PARSER_DISP_CONFIG 0xfa</div><div class='del'>-#undef MC_CMD_0xfa_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xfa_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PARSER_DISP_CONFIG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_PARSER_DISP_CONFIG_IN_LEN 8</div><div class='del'>-/* the type of configuration setting to read */</div><div class='del'>-#define       MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_OFST 0</div><div class='del'>-#define       MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               MC_CMD_SET_PARSER_DISP_CONFIG/MC_CMD_SET_PARSER_DISP_CONFIG_IN/TYPE */</div><div class='del'>-/* handle for the entity to query: queue handle, EVB port ID, etc. depending on</div><div class='del'>- * the type of configuration setting being read</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_OFST 4</div><div class='del'>-#define       MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PARSER_DISP_CONFIG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_NUM(len) (((len)-0)/4)</div><div class='del'>-/* current value: the details depend on the type of configuration setting being</div><div class='del'>- * read</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_OFST 0</div><div class='del'>-#define       MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_LEN 4</div><div class='del'>-#define       MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MINNUM 1</div><div class='del'>-#define       MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM 63</div><div class='del'>-#define       MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_MAXNUM_MCDI2 255</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG</div><div class='del'>- * Configure TX port sniffing for the physical port associated with the calling</div><div class='del'>- * function. Only a privileged function may change the port sniffing</div><div class='del'>- * configuration. A copy of all traffic transmitted through the port may be</div><div class='del'>- * delivered to a specific queue, or a set of queues with RSS. Note that these</div><div class='del'>- * packets are delivered with transmit timestamps in the packet prefix, not</div><div class='del'>- * receive timestamps, so it is likely that the queue(s) will need to be</div><div class='del'>- * dedicated as TX sniff receivers.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG 0xfb</div><div class='del'>-#undef MC_CMD_0xfb_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xfb_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_LEN 16</div><div class='del'>-/* configuration flags */</div><div class='del'>-#define       MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_OFST 0</div><div class='del'>-#define        MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_LBN 0</div><div class='del'>-#define        MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_ENABLE_WIDTH 1</div><div class='del'>-/* receive queue handle (for RSS mode, this is the base queue) */</div><div class='del'>-#define       MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_QUEUE_OFST 4</div><div class='del'>-#define       MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_QUEUE_LEN 4</div><div class='del'>-/* receive mode */</div><div class='del'>-#define       MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_OFST 8</div><div class='del'>-#define       MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_LEN 4</div><div class='del'>-/* enum: receive to just the specified queue */</div><div class='del'>-#define          MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_SIMPLE 0x0</div><div class='del'>-/* enum: receive to multiple queues using RSS context */</div><div class='del'>-#define          MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_MODE_RSS 0x1</div><div class='del'>-/* RSS context (for RX_MODE_RSS) as returned by MC_CMD_RSS_CONTEXT_ALLOC. Note</div><div class='del'>- * that these handles should be considered opaque to the host, although a value</div><div class='del'>- * of 0xFFFFFFFF is guaranteed never to be a valid handle.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_OFST 12</div><div class='del'>-#define       MC_CMD_SET_TX_PORT_SNIFF_CONFIG_IN_RX_CONTEXT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SET_TX_PORT_SNIFF_CONFIG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SET_TX_PORT_SNIFF_CONFIG_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG</div><div class='del'>- * Obtain the current TX port sniffing configuration for the physical port</div><div class='del'>- * associated with the calling function. Only a privileged function may read</div><div class='del'>- * the configuration.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG 0xfc</div><div class='del'>-#undef MC_CMD_0xfc_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xfc_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_TX_PORT_SNIFF_CONFIG_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_LEN 16</div><div class='del'>-/* configuration flags */</div><div class='del'>-#define       MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_OFST 0</div><div class='del'>-#define        MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_LBN 0</div><div class='del'>-#define        MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_ENABLE_WIDTH 1</div><div class='del'>-/* receiving queue handle (for RSS mode, this is the base queue) */</div><div class='del'>-#define       MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_OFST 4</div><div class='del'>-#define       MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_QUEUE_LEN 4</div><div class='del'>-/* receive mode */</div><div class='del'>-#define       MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_OFST 8</div><div class='del'>-#define       MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_LEN 4</div><div class='del'>-/* enum: receiving to just the specified queue */</div><div class='del'>-#define          MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_SIMPLE 0x0</div><div class='del'>-/* enum: receiving to multiple queues using RSS context */</div><div class='del'>-#define          MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_MODE_RSS 0x1</div><div class='del'>-/* RSS context (for RX_MODE_RSS) */</div><div class='del'>-#define       MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_OFST 12</div><div class='del'>-#define       MC_CMD_GET_TX_PORT_SNIFF_CONFIG_OUT_RX_CONTEXT_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_RMON_STATS_RX_ERRORS</div><div class='del'>- * Per queue rx error stats.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_RMON_STATS_RX_ERRORS 0xfe</div><div class='del'>-#undef MC_CMD_0xfe_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xfe_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RMON_STATS_RX_ERRORS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_RMON_STATS_RX_ERRORS_IN_LEN 8</div><div class='del'>-/* The rx queue to get stats for. */</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_IN_RX_QUEUE_OFST 0</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_IN_RX_QUEUE_LEN 4</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_IN_FLAGS_OFST 4</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_IN_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_OFST 4</div><div class='del'>-#define        MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_LBN 0</div><div class='del'>-#define        MC_CMD_RMON_STATS_RX_ERRORS_IN_RST_WIDTH 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RMON_STATS_RX_ERRORS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_RMON_STATS_RX_ERRORS_OUT_LEN 16</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_OUT_CRC_ERRORS_OFST 0</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_OUT_CRC_ERRORS_LEN 4</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_OUT_TRUNC_ERRORS_OFST 4</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_OUT_TRUNC_ERRORS_LEN 4</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_NO_DESC_DROPS_OFST 8</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_NO_DESC_DROPS_LEN 4</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_ABORT_OFST 12</div><div class='del'>-#define       MC_CMD_RMON_STATS_RX_ERRORS_OUT_RX_ABORT_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_PCIE_RESOURCE_INFO</div><div class='del'>- * Find out about available PCIE resources</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_PCIE_RESOURCE_INFO 0xfd</div><div class='del'>-#undef MC_CMD_0xfd_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xfd_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PCIE_RESOURCE_INFO_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_PCIE_RESOURCE_INFO_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PCIE_RESOURCE_INFO_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_LEN 28</div><div class='del'>-/* The maximum number of PFs the device can expose */</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PFS_OFST 0</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PFS_LEN 4</div><div class='del'>-/* The maximum number of VFs the device can expose in total */</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VFS_OFST 4</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VFS_LEN 4</div><div class='del'>-/* The maximum number of MSI-X vectors the device can provide in total */</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VECTORS_OFST 8</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VECTORS_LEN 4</div><div class='del'>-/* the number of MSI-X vectors the device will allocate by default to each PF</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_PF_VECTORS_OFST 12</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_PF_VECTORS_LEN 4</div><div class='del'>-/* the number of MSI-X vectors the device will allocate by default to each VF</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_VF_VECTORS_OFST 16</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_DEFAULT_VF_VECTORS_LEN 4</div><div class='del'>-/* the maximum number of MSI-X vectors the device can allocate to any one PF */</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PF_VECTORS_OFST 20</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_PF_VECTORS_LEN 4</div><div class='del'>-/* the maximum number of MSI-X vectors the device can allocate to any one VF */</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VF_VECTORS_OFST 24</div><div class='del'>-#define       MC_CMD_GET_PCIE_RESOURCE_INFO_OUT_MAX_VF_VECTORS_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_PORT_MODES</div><div class='del'>- * Find out about available port modes</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_PORT_MODES 0xff</div><div class='del'>-#undef MC_CMD_0xff_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0xff_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PORT_MODES_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_PORT_MODES_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PORT_MODES_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_PORT_MODES_OUT_LEN 12</div><div class='del'>-/* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*)</div><div class='del'>- * that are supported for customer use in production firmware.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_MODES_OFST 0</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_MODES_LEN 4</div><div class='del'>-/* Default (canonical) board mode */</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_OFST 4</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_LEN 4</div><div class='del'>-/* Current board mode */</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_OFST 8</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_PORT_MODES_OUT_V2 msgresponse */</div><div class='del'>-#define    MC_CMD_GET_PORT_MODES_OUT_V2_LEN 16</div><div class='del'>-/* Bitmask of port modes available on the board (indexed by TLV_PORT_MODE_*)</div><div class='del'>- * that are supported for customer use in production firmware.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_V2_MODES_OFST 0</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_V2_MODES_LEN 4</div><div class='del'>-/* Default (canonical) board mode */</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_OFST 4</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_LEN 4</div><div class='del'>-/* Current board mode */</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_OFST 8</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_LEN 4</div><div class='del'>-/* Bitmask of engineering port modes available on the board (indexed by</div><div class='del'>- * TLV_PORT_MODE_*). A superset of MC_CMD_GET_PORT_MODES_OUT/MODES that</div><div class='del'>- * contains all modes implemented in firmware for a particular board. Modes</div><div class='del'>- * listed in MODES are considered production modes and should be exposed in</div><div class='del'>- * userland tools. Modes listed in ENGINEERING_MODES, but not in MODES</div><div class='del'>- * should be considered hidden (not to be exposed in userland tools) and for</div><div class='del'>- * engineering use only. There are no other semantic differences and any mode</div><div class='del'>- * listed in either MODES or ENGINEERING_MODES can be set on the board.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_OFST 12</div><div class='del'>-#define       MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_OVERRIDE_PORT_MODE</div><div class='del'>- * Override flash config port mode for subsequent MC reboot(s). Override data</div><div class='del'>- * is stored in the presistent data section of DMEM and activated on next MC</div><div class='del'>- * warm reboot. A cold reboot resets the override. It is assumed that a</div><div class='del'>- * sufficient number of PFs are available and that port mapping is valid for</div><div class='del'>- * the new port mode, as the override does not affect PF configuration.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_OVERRIDE_PORT_MODE 0x137</div><div class='del'>-#undef MC_CMD_0x137_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x137_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_OVERRIDE_PORT_MODE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_OVERRIDE_PORT_MODE_IN_LEN 8</div><div class='del'>-#define       MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_OFST 0</div><div class='del'>-#define        MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_LBN 0</div><div class='del'>-#define        MC_CMD_OVERRIDE_PORT_MODE_IN_ENABLE_WIDTH 1</div><div class='del'>-/* New mode (TLV_PORT_MODE_*) to set, if override enabled */</div><div class='del'>-#define       MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_OFST 4</div><div class='del'>-#define       MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_OVERRIDE_PORT_MODE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_OVERRIDE_PORT_MODE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_READ_ATB</div><div class='del'>- * Sample voltages on the ATB</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_READ_ATB 0x100</div><div class='del'>-#undef MC_CMD_0x100_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x100_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_READ_ATB_IN msgrequest */</div><div class='del'>-#define    MC_CMD_READ_ATB_IN_LEN 16</div><div class='del'>-#define       MC_CMD_READ_ATB_IN_SIGNAL_BUS_OFST 0</div><div class='del'>-#define       MC_CMD_READ_ATB_IN_SIGNAL_BUS_LEN 4</div><div class='del'>-#define          MC_CMD_READ_ATB_IN_BUS_CCOM 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_READ_ATB_IN_BUS_CKR 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_READ_ATB_IN_BUS_CPCIE 0x8 /* enum */</div><div class='del'>-#define       MC_CMD_READ_ATB_IN_SIGNAL_EN_BITNO_OFST 4</div><div class='del'>-#define       MC_CMD_READ_ATB_IN_SIGNAL_EN_BITNO_LEN 4</div><div class='del'>-#define       MC_CMD_READ_ATB_IN_SIGNAL_SEL_OFST 8</div><div class='del'>-#define       MC_CMD_READ_ATB_IN_SIGNAL_SEL_LEN 4</div><div class='del'>-#define       MC_CMD_READ_ATB_IN_SETTLING_TIME_US_OFST 12</div><div class='del'>-#define       MC_CMD_READ_ATB_IN_SETTLING_TIME_US_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_READ_ATB_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_READ_ATB_OUT_LEN 4</div><div class='del'>-#define       MC_CMD_READ_ATB_OUT_SAMPLE_MV_OFST 0</div><div class='del'>-#define       MC_CMD_READ_ATB_OUT_SAMPLE_MV_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_GET_WORKAROUNDS</div><div class='ctx'>  * Read the list of all implemented and all currently enabled workarounds. The</div><div class='ctx'>  * enums here must correspond with those in MC_CMD_WORKAROUND.</div><div class='hunk'>@@ -22538,447 +21475,6 @@</div><div class='ctx'> #define       MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_OFST 0</div><div class='ctx'> #define       MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_LEN 4</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_SNAPSHOT_LENGTH</div><div class='del'>- * Obtain the current range of allowable values for the SNAPSHOT_LENGTH</div><div class='del'>- * parameter to MC_CMD_INIT_RXQ.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_SNAPSHOT_LENGTH 0x101</div><div class='del'>-#undef MC_CMD_0x101_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x101_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_SNAPSHOT_LENGTH_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_SNAPSHOT_LENGTH_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_SNAPSHOT_LENGTH_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_SNAPSHOT_LENGTH_OUT_LEN 8</div><div class='del'>-/* Minimum acceptable snapshot length. */</div><div class='del'>-#define       MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MIN_OFST 0</div><div class='del'>-#define       MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MIN_LEN 4</div><div class='del'>-/* Maximum acceptable snapshot length. */</div><div class='del'>-#define       MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MAX_OFST 4</div><div class='del'>-#define       MC_CMD_GET_SNAPSHOT_LENGTH_OUT_RX_SNAPLEN_MAX_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_FUSE_DIAGS</div><div class='del'>- * Additional fuse diagnostics</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_FUSE_DIAGS 0x102</div><div class='del'>-#undef MC_CMD_0x102_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x102_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_FUSE_DIAGS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_FUSE_DIAGS_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_FUSE_DIAGS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_FUSE_DIAGS_OUT_LEN 48</div><div class='del'>-/* Total number of mismatched bits between pairs in area 0 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_OFST 0</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_LEN 4</div><div class='del'>-/* Total number of unexpectedly clear (set in B but not A) bits in area 0 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_OFST 4</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_LEN 4</div><div class='del'>-/* Total number of unexpectedly clear (set in A but not B) bits in area 0 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_OFST 8</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_LEN 4</div><div class='del'>-/* Checksum of data after logical OR of pairs in area 0 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_OFST 12</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_LEN 4</div><div class='del'>-/* Total number of mismatched bits between pairs in area 1 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_OFST 16</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_LEN 4</div><div class='del'>-/* Total number of unexpectedly clear (set in B but not A) bits in area 1 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_OFST 20</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_LEN 4</div><div class='del'>-/* Total number of unexpectedly clear (set in A but not B) bits in area 1 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_OFST 24</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_LEN 4</div><div class='del'>-/* Checksum of data after logical OR of pairs in area 1 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_OFST 28</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_LEN 4</div><div class='del'>-/* Total number of mismatched bits between pairs in area 2 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_OFST 32</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_LEN 4</div><div class='del'>-/* Total number of unexpectedly clear (set in B but not A) bits in area 2 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_OFST 36</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_LEN 4</div><div class='del'>-/* Total number of unexpectedly clear (set in A but not B) bits in area 2 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_OFST 40</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_LEN 4</div><div class='del'>-/* Checksum of data after logical OR of pairs in area 2 */</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_OFST 44</div><div class='del'>-#define       MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PRIVILEGE_MODIFY</div><div class='del'>- * Modify the privileges of a set of PCIe functions. Note that this operation</div><div class='del'>- * only effects non-admin functions unless the admin privilege itself is</div><div class='del'>- * included in one of the masks provided.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PRIVILEGE_MODIFY 0x60</div><div class='del'>-#undef MC_CMD_0x60_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x60_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PRIVILEGE_MODIFY_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PRIVILEGE_MODIFY_IN_LEN 16</div><div class='del'>-/* The groups of functions to have their privilege masks modified. */</div><div class='del'>-#define       MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_OFST 0</div><div class='del'>-#define       MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_LEN 4</div><div class='del'>-#define          MC_CMD_PRIVILEGE_MODIFY_IN_NONE 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_PRIVILEGE_MODIFY_IN_ALL 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_PRIVILEGE_MODIFY_IN_PFS_ONLY 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_PRIVILEGE_MODIFY_IN_VFS_ONLY 0x3 /* enum */</div><div class='del'>-#define          MC_CMD_PRIVILEGE_MODIFY_IN_VFS_OF_PF 0x4 /* enum */</div><div class='del'>-#define          MC_CMD_PRIVILEGE_MODIFY_IN_ONE 0x5 /* enum */</div><div class='del'>-/* For VFS_OF_PF specify the PF, for ONE specify the target function */</div><div class='del'>-#define       MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_OFST 4</div><div class='del'>-#define       MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_LEN 4</div><div class='del'>-#define        MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_OFST 4</div><div class='del'>-#define        MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_LBN 0</div><div class='del'>-#define        MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_WIDTH 16</div><div class='del'>-#define        MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_OFST 4</div><div class='del'>-#define        MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_LBN 16</div><div class='del'>-#define        MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_WIDTH 16</div><div class='del'>-/* Privileges to be added to the target functions. For privilege definitions</div><div class='del'>- * refer to the command MC_CMD_PRIVILEGE_MASK</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_OFST 8</div><div class='del'>-#define       MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_LEN 4</div><div class='del'>-/* Privileges to be removed from the target functions. For privilege</div><div class='del'>- * definitions refer to the command MC_CMD_PRIVILEGE_MASK</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_OFST 12</div><div class='del'>-#define       MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PRIVILEGE_MODIFY_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PRIVILEGE_MODIFY_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_XPM_READ_BYTES</div><div class='del'>- * Read XPM memory</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_XPM_READ_BYTES 0x103</div><div class='del'>-#undef MC_CMD_0x103_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x103_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_READ_BYTES_IN msgrequest */</div><div class='del'>-#define    MC_CMD_XPM_READ_BYTES_IN_LEN 8</div><div class='del'>-/* Start address (byte) */</div><div class='del'>-#define       MC_CMD_XPM_READ_BYTES_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_READ_BYTES_IN_ADDR_LEN 4</div><div class='del'>-/* Count (bytes) */</div><div class='del'>-#define       MC_CMD_XPM_READ_BYTES_IN_COUNT_OFST 4</div><div class='del'>-#define       MC_CMD_XPM_READ_BYTES_IN_COUNT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_READ_BYTES_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_XPM_READ_BYTES_OUT_LENMIN 0</div><div class='del'>-#define    MC_CMD_XPM_READ_BYTES_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_XPM_READ_BYTES_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_XPM_READ_BYTES_OUT_LEN(num) (0+1*(num))</div><div class='del'>-#define    MC_CMD_XPM_READ_BYTES_OUT_DATA_NUM(len) (((len)-0)/1)</div><div class='del'>-/* Data */</div><div class='del'>-#define       MC_CMD_XPM_READ_BYTES_OUT_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_READ_BYTES_OUT_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_XPM_READ_BYTES_OUT_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_XPM_READ_BYTES_OUT_DATA_MAXNUM 252</div><div class='del'>-#define       MC_CMD_XPM_READ_BYTES_OUT_DATA_MAXNUM_MCDI2 1020</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_XPM_WRITE_BYTES</div><div class='del'>- * Write XPM memory</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_XPM_WRITE_BYTES 0x104</div><div class='del'>-#undef MC_CMD_0x104_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x104_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_WRITE_BYTES_IN msgrequest */</div><div class='del'>-#define    MC_CMD_XPM_WRITE_BYTES_IN_LENMIN 8</div><div class='del'>-#define    MC_CMD_XPM_WRITE_BYTES_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_XPM_WRITE_BYTES_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_XPM_WRITE_BYTES_IN_LEN(num) (8+1*(num))</div><div class='del'>-#define    MC_CMD_XPM_WRITE_BYTES_IN_DATA_NUM(len) (((len)-8)/1)</div><div class='del'>-/* Start address (byte) */</div><div class='del'>-#define       MC_CMD_XPM_WRITE_BYTES_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_WRITE_BYTES_IN_ADDR_LEN 4</div><div class='del'>-/* Count (bytes) */</div><div class='del'>-#define       MC_CMD_XPM_WRITE_BYTES_IN_COUNT_OFST 4</div><div class='del'>-#define       MC_CMD_XPM_WRITE_BYTES_IN_COUNT_LEN 4</div><div class='del'>-/* Data */</div><div class='del'>-#define       MC_CMD_XPM_WRITE_BYTES_IN_DATA_OFST 8</div><div class='del'>-#define       MC_CMD_XPM_WRITE_BYTES_IN_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_XPM_WRITE_BYTES_IN_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_XPM_WRITE_BYTES_IN_DATA_MAXNUM 244</div><div class='del'>-#define       MC_CMD_XPM_WRITE_BYTES_IN_DATA_MAXNUM_MCDI2 1012</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_WRITE_BYTES_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_XPM_WRITE_BYTES_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_XPM_READ_SECTOR</div><div class='del'>- * Read XPM sector</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_XPM_READ_SECTOR 0x105</div><div class='del'>-#undef MC_CMD_0x105_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x105_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_READ_SECTOR_IN msgrequest */</div><div class='del'>-#define    MC_CMD_XPM_READ_SECTOR_IN_LEN 8</div><div class='del'>-/* Sector index */</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_IN_INDEX_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_IN_INDEX_LEN 4</div><div class='del'>-/* Sector size */</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_IN_SIZE_OFST 4</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_IN_SIZE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_READ_SECTOR_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_XPM_READ_SECTOR_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_XPM_READ_SECTOR_OUT_LENMAX 36</div><div class='del'>-#define    MC_CMD_XPM_READ_SECTOR_OUT_LENMAX_MCDI2 36</div><div class='del'>-#define    MC_CMD_XPM_READ_SECTOR_OUT_LEN(num) (4+1*(num))</div><div class='del'>-#define    MC_CMD_XPM_READ_SECTOR_OUT_DATA_NUM(len) (((len)-4)/1)</div><div class='del'>-/* Sector type */</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_OUT_TYPE_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_OUT_TYPE_LEN 4</div><div class='del'>-#define          MC_CMD_XPM_READ_SECTOR_OUT_BLANK 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_KEY_128 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_KEY_256 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_XPM_READ_SECTOR_OUT_CRYPTO_DATA 0x3 /* enum */</div><div class='del'>-#define          MC_CMD_XPM_READ_SECTOR_OUT_INVALID 0xff /* enum */</div><div class='del'>-/* Sector data */</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_OUT_DATA_OFST 4</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_OUT_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_OUT_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_OUT_DATA_MAXNUM 32</div><div class='del'>-#define       MC_CMD_XPM_READ_SECTOR_OUT_DATA_MAXNUM_MCDI2 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_XPM_WRITE_SECTOR</div><div class='del'>- * Write XPM sector</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_XPM_WRITE_SECTOR 0x106</div><div class='del'>-#undef MC_CMD_0x106_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x106_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_WRITE_SECTOR_IN msgrequest */</div><div class='del'>-#define    MC_CMD_XPM_WRITE_SECTOR_IN_LENMIN 12</div><div class='del'>-#define    MC_CMD_XPM_WRITE_SECTOR_IN_LENMAX 44</div><div class='del'>-#define    MC_CMD_XPM_WRITE_SECTOR_IN_LENMAX_MCDI2 44</div><div class='del'>-#define    MC_CMD_XPM_WRITE_SECTOR_IN_LEN(num) (12+1*(num))</div><div class='del'>-#define    MC_CMD_XPM_WRITE_SECTOR_IN_DATA_NUM(len) (((len)-12)/1)</div><div class='del'>-/* If writing fails due to an uncorrectable error, try up to RETRIES following</div><div class='del'>- * sectors (or until no more space available). If 0, only one write attempt is</div><div class='del'>- * made. Note that uncorrectable errors are unlikely, thanks to XPM self-repair</div><div class='del'>- * mechanism.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_RETRIES_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_RETRIES_LEN 1</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_RESERVED_OFST 1</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_RESERVED_LEN 3</div><div class='del'>-/* Sector type */</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_TYPE_OFST 4</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_TYPE_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               MC_CMD_XPM_READ_SECTOR/MC_CMD_XPM_READ_SECTOR_OUT/TYPE */</div><div class='del'>-/* Sector size */</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_SIZE_OFST 8</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_SIZE_LEN 4</div><div class='del'>-/* Sector data */</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_DATA_OFST 12</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MAXNUM 32</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_IN_DATA_MAXNUM_MCDI2 32</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_WRITE_SECTOR_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_XPM_WRITE_SECTOR_OUT_LEN 4</div><div class='del'>-/* New sector index */</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_OUT_INDEX_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_WRITE_SECTOR_OUT_INDEX_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_XPM_INVALIDATE_SECTOR</div><div class='del'>- * Invalidate XPM sector</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_XPM_INVALIDATE_SECTOR 0x107</div><div class='del'>-#undef MC_CMD_0x107_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x107_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_INVALIDATE_SECTOR_IN msgrequest */</div><div class='del'>-#define    MC_CMD_XPM_INVALIDATE_SECTOR_IN_LEN 4</div><div class='del'>-/* Sector index */</div><div class='del'>-#define       MC_CMD_XPM_INVALIDATE_SECTOR_IN_INDEX_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_INVALIDATE_SECTOR_IN_INDEX_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_INVALIDATE_SECTOR_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_XPM_INVALIDATE_SECTOR_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_XPM_BLANK_CHECK</div><div class='del'>- * Blank-check XPM memory and report bad locations</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_XPM_BLANK_CHECK 0x108</div><div class='del'>-#undef MC_CMD_0x108_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x108_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_BLANK_CHECK_IN msgrequest */</div><div class='del'>-#define    MC_CMD_XPM_BLANK_CHECK_IN_LEN 8</div><div class='del'>-/* Start address (byte) */</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_IN_ADDR_LEN 4</div><div class='del'>-/* Count (bytes) */</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_IN_COUNT_OFST 4</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_IN_COUNT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_BLANK_CHECK_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_XPM_BLANK_CHECK_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_XPM_BLANK_CHECK_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_XPM_BLANK_CHECK_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_XPM_BLANK_CHECK_OUT_LEN(num) (4+2*(num))</div><div class='del'>-#define    MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_NUM(len) (((len)-4)/2)</div><div class='del'>-/* Total number of bad (non-blank) locations */</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_OUT_BAD_COUNT_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_OUT_BAD_COUNT_LEN 4</div><div class='del'>-/* Addresses of bad locations (may be less than BAD_COUNT, if all cannot fit</div><div class='del'>- * into MCDI response)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_OFST 4</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_LEN 2</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MINNUM 0</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MAXNUM 124</div><div class='del'>-#define       MC_CMD_XPM_BLANK_CHECK_OUT_BAD_ADDR_MAXNUM_MCDI2 508</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_XPM_REPAIR</div><div class='del'>- * Blank-check and repair XPM memory</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_XPM_REPAIR 0x109</div><div class='del'>-#undef MC_CMD_0x109_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x109_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_REPAIR_IN msgrequest */</div><div class='del'>-#define    MC_CMD_XPM_REPAIR_IN_LEN 8</div><div class='del'>-/* Start address (byte) */</div><div class='del'>-#define       MC_CMD_XPM_REPAIR_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_REPAIR_IN_ADDR_LEN 4</div><div class='del'>-/* Count (bytes) */</div><div class='del'>-#define       MC_CMD_XPM_REPAIR_IN_COUNT_OFST 4</div><div class='del'>-#define       MC_CMD_XPM_REPAIR_IN_COUNT_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_REPAIR_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_XPM_REPAIR_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_XPM_DECODER_TEST</div><div class='del'>- * Test XPM memory address decoders for gross manufacturing defects. Can only</div><div class='del'>- * be performed on an unprogrammed part.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_XPM_DECODER_TEST 0x10a</div><div class='del'>-#undef MC_CMD_0x10a_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x10a_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_DECODER_TEST_IN msgrequest */</div><div class='del'>-#define    MC_CMD_XPM_DECODER_TEST_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_DECODER_TEST_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_XPM_DECODER_TEST_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_XPM_WRITE_TEST</div><div class='del'>- * XPM memory write test. Test XPM write logic for gross manufacturing defects</div><div class='del'>- * by writing to a dedicated test row. There are 16 locations in the test row</div><div class='del'>- * and the test can only be performed on locations that have not been</div><div class='del'>- * previously used (i.e. can be run at most 16 times). The test will pick the</div><div class='del'>- * first available location to use, or fail with ENOSPC if none left.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_XPM_WRITE_TEST 0x10b</div><div class='del'>-#undef MC_CMD_0x10b_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x10b_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_WRITE_TEST_IN msgrequest */</div><div class='del'>-#define    MC_CMD_XPM_WRITE_TEST_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_WRITE_TEST_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_XPM_WRITE_TEST_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_EXEC_SIGNED</div><div class='del'>- * Check the CMAC of the contents of IMEM and DMEM against the value supplied</div><div class='del'>- * and if correct begin execution from the start of IMEM. The caller supplies a</div><div class='del'>- * key ID, the length of IMEM and DMEM to validate and the expected CMAC. CMAC</div><div class='del'>- * computation runs from the start of IMEM, and from the start of DMEM + 16k,</div><div class='del'>- * to match flash booting. The command will respond with EINVAL if the CMAC</div><div class='del'>- * does match, otherwise it will respond with success before it jumps to IMEM.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_EXEC_SIGNED 0x10c</div><div class='del'>-#undef MC_CMD_0x10c_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x10c_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_EXEC_SIGNED_IN msgrequest */</div><div class='del'>-#define    MC_CMD_EXEC_SIGNED_IN_LEN 28</div><div class='del'>-/* the length of code to include in the CMAC */</div><div class='del'>-#define       MC_CMD_EXEC_SIGNED_IN_CODELEN_OFST 0</div><div class='del'>-#define       MC_CMD_EXEC_SIGNED_IN_CODELEN_LEN 4</div><div class='del'>-/* the length of date to include in the CMAC */</div><div class='del'>-#define       MC_CMD_EXEC_SIGNED_IN_DATALEN_OFST 4</div><div class='del'>-#define       MC_CMD_EXEC_SIGNED_IN_DATALEN_LEN 4</div><div class='del'>-/* the XPM sector containing the key to use */</div><div class='del'>-#define       MC_CMD_EXEC_SIGNED_IN_KEYSECTOR_OFST 8</div><div class='del'>-#define       MC_CMD_EXEC_SIGNED_IN_KEYSECTOR_LEN 4</div><div class='del'>-/* the expected CMAC value */</div><div class='del'>-#define       MC_CMD_EXEC_SIGNED_IN_CMAC_OFST 12</div><div class='del'>-#define       MC_CMD_EXEC_SIGNED_IN_CMAC_LEN 16</div><div class='del'>-</div><div class='del'>-/* MC_CMD_EXEC_SIGNED_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_EXEC_SIGNED_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PREPARE_SIGNED</div><div class='del'>- * Prepare to upload a signed image. This will scrub the specified length of</div><div class='del'>- * the data region, which must be at least as large as the DATALEN supplied to</div><div class='del'>- * MC_CMD_EXEC_SIGNED.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PREPARE_SIGNED 0x10d</div><div class='del'>-#undef MC_CMD_0x10d_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x10d_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PREPARE_SIGNED_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PREPARE_SIGNED_IN_LEN 4</div><div class='del'>-/* the length of data area to clear */</div><div class='del'>-#define       MC_CMD_PREPARE_SIGNED_IN_DATALEN_OFST 0</div><div class='del'>-#define       MC_CMD_PREPARE_SIGNED_IN_DATALEN_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PREPARE_SIGNED_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PREPARE_SIGNED_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /* TUNNEL_ENCAP_UDP_PORT_ENTRY structuredef */</div><div class='ctx'> #define    TUNNEL_ENCAP_UDP_PORT_ENTRY_LEN 4</div><div class='ctx'> /* UDP port (the standard ports are named below but any port may be used) */</div><div class='hunk'>@@ -23049,110 +21545,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_RX_BALANCING</div><div class='del'>- * Configure a port upconverter to distribute the packets on both RX engines.</div><div class='del'>- * Packets are distributed based on a table with the destination vFIFO. The</div><div class='del'>- * index of the table is a hash of source and destination of IPV4 and VLAN</div><div class='del'>- * priority.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_RX_BALANCING 0x118</div><div class='del'>-#undef MC_CMD_0x118_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x118_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RX_BALANCING_IN msgrequest */</div><div class='del'>-#define    MC_CMD_RX_BALANCING_IN_LEN 16</div><div class='del'>-/* The RX port whose upconverter table will be modified */</div><div class='del'>-#define       MC_CMD_RX_BALANCING_IN_PORT_OFST 0</div><div class='del'>-#define       MC_CMD_RX_BALANCING_IN_PORT_LEN 4</div><div class='del'>-/* The VLAN priority associated to the table index and vFIFO */</div><div class='del'>-#define       MC_CMD_RX_BALANCING_IN_PRIORITY_OFST 4</div><div class='del'>-#define       MC_CMD_RX_BALANCING_IN_PRIORITY_LEN 4</div><div class='del'>-/* The resulting bit of SRC^DST for indexing the table */</div><div class='del'>-#define       MC_CMD_RX_BALANCING_IN_SRC_DST_OFST 8</div><div class='del'>-#define       MC_CMD_RX_BALANCING_IN_SRC_DST_LEN 4</div><div class='del'>-/* The RX engine to which the vFIFO in the table entry will point to */</div><div class='del'>-#define       MC_CMD_RX_BALANCING_IN_ENG_OFST 12</div><div class='del'>-#define       MC_CMD_RX_BALANCING_IN_ENG_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_RX_BALANCING_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_RX_BALANCING_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_NVRAM_PRIVATE_APPEND</div><div class='del'>- * Append a single TLV to the MC_USAGE_TLV partition. Returns MC_CMD_ERR_EEXIST</div><div class='del'>- * if the tag is already present.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_NVRAM_PRIVATE_APPEND 0x11c</div><div class='del'>-#undef MC_CMD_0x11c_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x11c_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_NVRAM_PRIVATE_APPEND_IN msgrequest */</div><div class='del'>-#define    MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMIN 9</div><div class='del'>-#define    MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_NVRAM_PRIVATE_APPEND_IN_LEN(num) (8+1*(num))</div><div class='del'>-#define    MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_NUM(len) (((len)-8)/1)</div><div class='del'>-/* The tag to be appended */</div><div class='del'>-#define       MC_CMD_NVRAM_PRIVATE_APPEND_IN_TAG_OFST 0</div><div class='del'>-#define       MC_CMD_NVRAM_PRIVATE_APPEND_IN_TAG_LEN 4</div><div class='del'>-/* The length of the data */</div><div class='del'>-#define       MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENGTH_OFST 4</div><div class='del'>-#define       MC_CMD_NVRAM_PRIVATE_APPEND_IN_LENGTH_LEN 4</div><div class='del'>-/* The data to be contained in the TLV structure */</div><div class='del'>-#define       MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_OFST 8</div><div class='del'>-#define       MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_LEN 1</div><div class='del'>-#define       MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MINNUM 1</div><div class='del'>-#define       MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MAXNUM 244</div><div class='del'>-#define       MC_CMD_NVRAM_PRIVATE_APPEND_IN_DATA_BUFFER_MAXNUM_MCDI2 1012</div><div class='del'>-</div><div class='del'>-/* MC_CMD_NVRAM_PRIVATE_APPEND_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_NVRAM_PRIVATE_APPEND_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_XPM_VERIFY_CONTENTS</div><div class='del'>- * Verify that the contents of the XPM memory is correct (Medford only). This</div><div class='del'>- * is used during manufacture to check that the XPM memory has been programmed</div><div class='del'>- * correctly at ATE.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_XPM_VERIFY_CONTENTS 0x11b</div><div class='del'>-#undef MC_CMD_0x11b_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x11b_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_VERIFY_CONTENTS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_XPM_VERIFY_CONTENTS_IN_LEN 4</div><div class='del'>-/* Data type to be checked */</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_IN_DATA_TYPE_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_IN_DATA_TYPE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_XPM_VERIFY_CONTENTS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMIN 12</div><div class='del'>-#define    MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_XPM_VERIFY_CONTENTS_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_XPM_VERIFY_CONTENTS_OUT_LEN(num) (12+1*(num))</div><div class='del'>-#define    MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_NUM(len) (((len)-12)/1)</div><div class='del'>-/* Number of sectors found (test builds only) */</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_SECTORS_OFST 0</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_SECTORS_LEN 4</div><div class='del'>-/* Number of bytes found (test builds only) */</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_BYTES_OFST 4</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_NUM_BYTES_LEN 4</div><div class='del'>-/* Length of signature */</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIG_LENGTH_OFST 8</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIG_LENGTH_LEN 4</div><div class='del'>-/* Signature */</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_OFST 12</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_LEN 1</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MINNUM 0</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MAXNUM 240</div><div class='del'>-#define       MC_CMD_XPM_VERIFY_CONTENTS_OUT_SIGNATURE_MAXNUM_MCDI2 1008</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_SET_EVQ_TMR</div><div class='ctx'>  * Update the timer load, timer reload and timer mode values for a given EVQ.</div><div class='ctx'>  * The requested timer values (in TMR_LOAD_REQ_NS and TMR_RELOAD_REQ_NS) will</div><div class='hunk'>@@ -23262,576 +21654,6 @@</div><div class='ctx'> #define       MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_STEP_OFST 32</div><div class='ctx'> #define       MC_CMD_GET_EVQ_TMR_PROPERTIES_OUT_BUG35388_TMR_STEP_LEN 4</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_ALLOCATE_TX_VFIFO_CP</div><div class='del'>- * When we use the TX_vFIFO_ULL mode, we can allocate common pools using the</div><div class='del'>- * non used switch buffers.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_ALLOCATE_TX_VFIFO_CP 0x11d</div><div class='del'>-#undef MC_CMD_0x11d_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x11d_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN msgrequest */</div><div class='del'>-#define    MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_LEN 20</div><div class='del'>-/* Desired instance. Must be set to a specific instance, which is a function</div><div class='del'>- * local queue index. The calling client must be the currently-assigned user of</div><div class='del'>- * this VI (see MC_CMD_SET_VI_USER).</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_OFST 0</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_LEN 4</div><div class='del'>-/* Will the common pool be used as TX_vFIFO_ULL (1) */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_MODE_OFST 4</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_MODE_LEN 4</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_ENABLED 0x1 /* enum */</div><div class='del'>-/* enum: Using this interface without TX_vFIFO_ULL is not supported for now */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_DISABLED 0x0</div><div class='del'>-/* Number of buffers to reserve for the common pool */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_SIZE_OFST 8</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_SIZE_LEN 4</div><div class='del'>-/* TX datapath to which the Common Pool is connected to. */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INGRESS_OFST 12</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INGRESS_LEN 4</div><div class='del'>-/* enum: Extracts information from function */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_USE_FUNCTION_VALUE -0x1</div><div class='del'>-/* Network port or RX Engine to which the common pool connects. */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_EGRESS_OFST 16</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_EGRESS_LEN 4</div><div class='del'>-/* enum: Extracts information from function */</div><div class='del'>-/*               MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_USE_FUNCTION_VALUE -0x1 */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT0 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT1 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT2 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_PORT3 0x3 /* enum */</div><div class='del'>-/* enum: To enable Switch loopback with Rx engine 0 */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_RX_ENGINE0 0x4</div><div class='del'>-/* enum: To enable Switch loopback with Rx engine 1 */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_RX_ENGINE1 0x5</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT_LEN 4</div><div class='del'>-/* ID of the common pool allocated */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT_CP_ID_OFST 0</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_CP_OUT_CP_ID_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_ALLOCATE_TX_VFIFO_VFIFO</div><div class='del'>- * When we use the TX_vFIFO_ULL mode, we can allocate vFIFOs using the</div><div class='del'>- * previously allocated common pools.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO 0x11e</div><div class='del'>-#undef MC_CMD_0x11e_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x11e_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN msgrequest */</div><div class='del'>-#define    MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_LEN 20</div><div class='del'>-/* Common pool previously allocated to which the new vFIFO will be associated</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_CP_OFST 0</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_CP_LEN 4</div><div class='del'>-/* Port or RX engine to associate the vFIFO egress */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_EGRESS_OFST 4</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_EGRESS_LEN 4</div><div class='del'>-/* enum: Extracts information from common pool */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_USE_CP_VALUE -0x1</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT0 0x0 /* enum */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT1 0x1 /* enum */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT2 0x2 /* enum */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PORT3 0x3 /* enum */</div><div class='del'>-/* enum: To enable Switch loopback with Rx engine 0 */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_RX_ENGINE0 0x4</div><div class='del'>-/* enum: To enable Switch loopback with Rx engine 1 */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_RX_ENGINE1 0x5</div><div class='del'>-/* Minimum number of buffers that the pool must have */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_SIZE_OFST 8</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_SIZE_LEN 4</div><div class='del'>-/* enum: Do not check the space available */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_NO_MINIMUM 0x0</div><div class='del'>-/* Will the vFIFO be used as TX_vFIFO_ULL */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_MODE_OFST 12</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_MODE_LEN 4</div><div class='del'>-/* Network priority of the vFIFO,if applicable */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PRIORITY_OFST 16</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_PRIORITY_LEN 4</div><div class='del'>-/* enum: Search for the lowest unused priority */</div><div class='del'>-#define          MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_IN_LOWEST_AVAILABLE -0x1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_LEN 8</div><div class='del'>-/* Short vFIFO ID */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_VID_OFST 0</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_VID_LEN 4</div><div class='del'>-/* Network priority of the vFIFO */</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_PRIORITY_OFST 4</div><div class='del'>-#define       MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_OUT_PRIORITY_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_TEARDOWN_TX_VFIFO_VF</div><div class='del'>- * This interface clears the configuration of the given vFIFO and leaves it</div><div class='del'>- * ready to be re-used.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_TEARDOWN_TX_VFIFO_VF 0x11f</div><div class='del'>-#undef MC_CMD_0x11f_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x11f_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TEARDOWN_TX_VFIFO_VF_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TEARDOWN_TX_VFIFO_VF_IN_LEN 4</div><div class='del'>-/* Short vFIFO ID */</div><div class='del'>-#define       MC_CMD_TEARDOWN_TX_VFIFO_VF_IN_VFIFO_OFST 0</div><div class='del'>-#define       MC_CMD_TEARDOWN_TX_VFIFO_VF_IN_VFIFO_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TEARDOWN_TX_VFIFO_VF_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_TEARDOWN_TX_VFIFO_VF_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DEALLOCATE_TX_VFIFO_CP</div><div class='del'>- * This interface clears the configuration of the given common pool and leaves</div><div class='del'>- * it ready to be re-used.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DEALLOCATE_TX_VFIFO_CP 0x121</div><div class='del'>-#undef MC_CMD_0x121_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x121_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN_LEN 4</div><div class='del'>-/* Common pool ID given when pool allocated */</div><div class='del'>-#define       MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN_POOL_ID_OFST 0</div><div class='del'>-#define       MC_CMD_DEALLOCATE_TX_VFIFO_CP_IN_POOL_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DEALLOCATE_TX_VFIFO_CP_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DEALLOCATE_TX_VFIFO_CP_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS</div><div class='del'>- * This interface allows the host to find out how many common pool buffers are</div><div class='del'>- * not yet assigned.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS 0x124</div><div class='del'>-#undef MC_CMD_0x124_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x124_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_LEN 8</div><div class='del'>-/* Available buffers for the ENG to NET vFIFOs. */</div><div class='del'>-#define       MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_NET_OFST 0</div><div class='del'>-#define       MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_NET_LEN 4</div><div class='del'>-/* Available buffers for the ENG to ENG and NET to ENG vFIFOs. */</div><div class='del'>-#define       MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_ENG_OFST 4</div><div class='del'>-#define       MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_OUT_ENG_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_SUC_VERSION</div><div class='del'>- * Get the version of the SUC</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_SUC_VERSION 0x134</div><div class='del'>-#undef MC_CMD_0x134_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x134_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SUC_VERSION_IN msgrequest */</div><div class='del'>-#define    MC_CMD_SUC_VERSION_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SUC_VERSION_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SUC_VERSION_OUT_LEN 24</div><div class='del'>-/* The SUC firmware version as four numbers - a.b.c.d */</div><div class='del'>-#define       MC_CMD_SUC_VERSION_OUT_VERSION_OFST 0</div><div class='del'>-#define       MC_CMD_SUC_VERSION_OUT_VERSION_LEN 4</div><div class='del'>-#define       MC_CMD_SUC_VERSION_OUT_VERSION_NUM 4</div><div class='del'>-/* The date, in seconds since the Unix epoch, when the firmware image was</div><div class='del'>- * built.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_SUC_VERSION_OUT_BUILD_DATE_OFST 16</div><div class='del'>-#define       MC_CMD_SUC_VERSION_OUT_BUILD_DATE_LEN 4</div><div class='del'>-/* The ID of the SUC chip. This is specific to the platform but typically</div><div class='del'>- * indicates family, memory sizes etc. See SF-116728-SW for further details.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_SUC_VERSION_OUT_CHIP_ID_OFST 20</div><div class='del'>-#define       MC_CMD_SUC_VERSION_OUT_CHIP_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SUC_BOOT_VERSION_IN msgrequest: Get the version of the SUC boot</div><div class='del'>- * loader.</div><div class='del'>- */</div><div class='del'>-#define    MC_CMD_SUC_BOOT_VERSION_IN_LEN 4</div><div class='del'>-#define       MC_CMD_SUC_BOOT_VERSION_IN_MAGIC_OFST 0</div><div class='del'>-#define       MC_CMD_SUC_BOOT_VERSION_IN_MAGIC_LEN 4</div><div class='del'>-/* enum: Requests the SUC boot version. */</div><div class='del'>-#define          MC_CMD_SUC_VERSION_GET_BOOT_VERSION 0xb007700b</div><div class='del'>-</div><div class='del'>-/* MC_CMD_SUC_BOOT_VERSION_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_SUC_BOOT_VERSION_OUT_LEN 4</div><div class='del'>-/* The SUC boot version */</div><div class='del'>-#define       MC_CMD_SUC_BOOT_VERSION_OUT_VERSION_OFST 0</div><div class='del'>-#define       MC_CMD_SUC_BOOT_VERSION_OUT_VERSION_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_RX_PREFIX_ID</div><div class='del'>- * This command is part of the mechanism for configuring the format of the RX</div><div class='del'>- * packet prefix. It takes as input a bitmask of the fields the host would like</div><div class='del'>- * to be in the prefix. If the hardware supports RX prefixes with that</div><div class='del'>- * combination of fields, then this command returns a list of prefix-ids,</div><div class='del'>- * opaque identifiers suitable for use in the RX_PREFIX_ID field of a</div><div class='del'>- * MC_CMD_INIT_RXQ_V5_IN message. If the combination of fields is not</div><div class='del'>- * supported, returns ENOTSUP. If the firmware can't create any new prefix-ids</div><div class='del'>- * due to resource constraints, returns ENOSPC.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_RX_PREFIX_ID 0x13b</div><div class='del'>-#undef MC_CMD_0x13b_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x13b_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_RX_PREFIX_ID_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_RX_PREFIX_ID_IN_LEN 8</div><div class='del'>-/* Field bitmask. */</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_OFST 0</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LEN 8</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_OFST 0</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LEN 4</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LBN 0</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_OFST 4</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LEN 4</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LBN 32</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_WIDTH 32</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_LBN 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_LBN 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_VALID_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_LBN 2</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_USER_FLAG_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_CLASS_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_CLASS_LBN 3</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_CLASS_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_LBN 4</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_PARTIAL_TSTAMP_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_LBN 5</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_RSS_HASH_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_LBN 6</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_USER_MARK_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_MPORT_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_MPORT_LBN 7</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_MPORT_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_LBN 7</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_INGRESS_VPORT_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_LBN 8</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_CSUM_FRAME_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_LBN 9</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIP_TCI_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIPPED_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIPPED_LBN 10</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_VLAN_STRIPPED_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_VSWITCH_STATUS_OFST 0</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_VSWITCH_STATUS_LBN 11</div><div class='del'>-#define        MC_CMD_GET_RX_PREFIX_ID_IN_VSWITCH_STATUS_WIDTH 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_RX_PREFIX_ID_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_RX_PREFIX_ID_OUT_LENMIN 8</div><div class='del'>-#define    MC_CMD_GET_RX_PREFIX_ID_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_GET_RX_PREFIX_ID_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_GET_RX_PREFIX_ID_OUT_LEN(num) (4+4*(num))</div><div class='del'>-#define    MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_NUM(len) (((len)-4)/4)</div><div class='del'>-/* Number of prefix-ids returned */</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_OUT_NUM_RX_PREFIX_IDS_OFST 0</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_OUT_NUM_RX_PREFIX_IDS_LEN 4</div><div class='del'>-/* Opaque prefix identifiers which can be passed into MC_CMD_INIT_RXQ_V5 or</div><div class='del'>- * MC_CMD_QUERY_PREFIX_ID</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_OFST 4</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_LEN 4</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MINNUM 1</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MAXNUM 62</div><div class='del'>-#define       MC_CMD_GET_RX_PREFIX_ID_OUT_RX_PREFIX_ID_MAXNUM_MCDI2 254</div><div class='del'>-</div><div class='del'>-/* RX_PREFIX_FIELD_INFO structuredef: Information about a single RX prefix</div><div class='del'>- * field</div><div class='del'>- */</div><div class='del'>-#define    RX_PREFIX_FIELD_INFO_LEN 4</div><div class='del'>-/* The offset of the field from the start of the prefix, in bits */</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_OFFSET_BITS_OFST 0</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_OFFSET_BITS_LEN 2</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_OFFSET_BITS_LBN 0</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_OFFSET_BITS_WIDTH 16</div><div class='del'>-/* The width of the field, in bits */</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_WIDTH_BITS_OFST 2</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_WIDTH_BITS_LEN 1</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_WIDTH_BITS_LBN 16</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_WIDTH_BITS_WIDTH 8</div><div class='del'>-/* The type of the field. These enum values are in the same order as the fields</div><div class='del'>- * in the MC_CMD_GET_RX_PREFIX_ID_IN bitmask</div><div class='del'>- */</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_TYPE_OFST 3</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_TYPE_LEN 1</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_LENGTH 0x0 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_RSS_HASH_VALID 0x1 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_USER_FLAG 0x2 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_CLASS 0x3 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_PARTIAL_TSTAMP 0x4 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_RSS_HASH 0x5 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_USER_MARK 0x6 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_INGRESS_MPORT 0x7 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_INGRESS_VPORT 0x7 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_CSUM_FRAME 0x8 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_VLAN_STRIP_TCI 0x9 /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_VLAN_STRIPPED 0xa /* enum */</div><div class='del'>-#define          RX_PREFIX_FIELD_INFO_VSWITCH_STATUS 0xb /* enum */</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_TYPE_LBN 24</div><div class='del'>-#define       RX_PREFIX_FIELD_INFO_TYPE_WIDTH 8</div><div class='del'>-</div><div class='del'>-/* RX_PREFIX_FIXED_RESPONSE structuredef: Information about an RX prefix in</div><div class='del'>- * which every field has a fixed offset and width</div><div class='del'>- */</div><div class='del'>-#define    RX_PREFIX_FIXED_RESPONSE_LENMIN 4</div><div class='del'>-#define    RX_PREFIX_FIXED_RESPONSE_LENMAX 252</div><div class='del'>-#define    RX_PREFIX_FIXED_RESPONSE_LENMAX_MCDI2 1020</div><div class='del'>-#define    RX_PREFIX_FIXED_RESPONSE_LEN(num) (4+4*(num))</div><div class='del'>-#define    RX_PREFIX_FIXED_RESPONSE_FIELDS_NUM(len) (((len)-4)/4)</div><div class='del'>-/* Length of the RX prefix in bytes */</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_OFST 0</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_LEN 1</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_LBN 0</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_PREFIX_LENGTH_BYTES_WIDTH 8</div><div class='del'>-/* Number of fields present in the prefix */</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_OFST 1</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_LEN 1</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_LBN 8</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELD_COUNT_WIDTH 8</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_RESERVED_OFST 2</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_RESERVED_LEN 2</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_RESERVED_LBN 16</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_RESERVED_WIDTH 16</div><div class='del'>-/* Array of RX_PREFIX_FIELD_INFO structures, of length FIELD_COUNT */</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELDS_OFST 4</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELDS_LEN 4</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELDS_MINNUM 0</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELDS_MAXNUM 62</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELDS_MAXNUM_MCDI2 254</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELDS_LBN 32</div><div class='del'>-#define       RX_PREFIX_FIXED_RESPONSE_FIELDS_WIDTH 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_QUERY_RX_PREFIX_ID</div><div class='del'>- * This command takes an RX prefix id (obtained from MC_CMD_GET_RX_PREFIX_ID)</div><div class='del'>- * and returns a description of the RX prefix of packets delievered to an RXQ</div><div class='del'>- * created with that prefix id</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_QUERY_RX_PREFIX_ID 0x13c</div><div class='del'>-#undef MC_CMD_0x13c_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x13c_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_QUERY_RX_PREFIX_ID_IN msgrequest */</div><div class='del'>-#define    MC_CMD_QUERY_RX_PREFIX_ID_IN_LEN 4</div><div class='del'>-/* Prefix id to query */</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_IN_RX_PREFIX_ID_OFST 0</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_IN_RX_PREFIX_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_QUERY_RX_PREFIX_ID_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_QUERY_RX_PREFIX_ID_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_QUERY_RX_PREFIX_ID_OUT_LEN(num) (4+1*(num))</div><div class='del'>-#define    MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_NUM(len) (((len)-4)/1)</div><div class='del'>-/* An enum describing the structure of this response. */</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_OFST 0</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_LEN 1</div><div class='del'>-/* enum: The response is of format RX_PREFIX_FIXED_RESPONSE */</div><div class='del'>-#define          MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_TYPE_FIXED 0x0</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESERVED_OFST 1</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESERVED_LEN 3</div><div class='del'>-/* The response. Its format is as defined by the RESPONSE_TYPE value */</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_OFST 4</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_LEN 1</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MINNUM 0</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MAXNUM 248</div><div class='del'>-#define       MC_CMD_QUERY_RX_PREFIX_ID_OUT_RESPONSE_MAXNUM_MCDI2 1016</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_BUNDLE</div><div class='del'>- * A command to perform various bundle-related operations on insecure cards.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_BUNDLE 0x13d</div><div class='del'>-#undef MC_CMD_0x13d_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x13d_PRIVILEGE_CTG SRIOV_CTG_INSECURE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_BUNDLE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_BUNDLE_IN_LEN 4</div><div class='del'>-/* Sub-command code */</div><div class='del'>-#define       MC_CMD_BUNDLE_IN_OP_OFST 0</div><div class='del'>-#define       MC_CMD_BUNDLE_IN_OP_LEN 4</div><div class='del'>-/* enum: Get the current host access mode set on component partitions. */</div><div class='del'>-#define          MC_CMD_BUNDLE_IN_OP_COMPONENT_ACCESS_GET 0x0</div><div class='del'>-/* enum: Set the host access mode set on component partitions. */</div><div class='del'>-#define          MC_CMD_BUNDLE_IN_OP_COMPONENT_ACCESS_SET 0x1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN msgrequest: Retrieve the current</div><div class='del'>- * access mode on component partitions such as MC_FIRMWARE, SUC_FIRMWARE and</div><div class='del'>- * EXPANSION_UEFI. This command only works on engineering (insecure) cards. On</div><div class='del'>- * secure adapters, this command returns MC_CMD_ERR_EPERM.</div><div class='del'>- */</div><div class='del'>-#define    MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_LEN 4</div><div class='del'>-/* Sub-command code. Must be OP_COMPONENT_ACCESS_GET. */</div><div class='del'>-#define       MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_OP_OFST 0</div><div class='del'>-#define       MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_IN_OP_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT msgresponse: Returns the access</div><div class='del'>- * control mode.</div><div class='del'>- */</div><div class='del'>-#define    MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_LEN 4</div><div class='del'>-/* Access mode of component partitions. */</div><div class='del'>-#define       MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_ACCESS_MODE_OFST 0</div><div class='del'>-#define       MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT_ACCESS_MODE_LEN 4</div><div class='del'>-/* enum: Component partitions are read-only from the host. */</div><div class='del'>-#define          MC_CMD_BUNDLE_COMPONENTS_READ_ONLY 0x0</div><div class='del'>-/* enum: Component partitions can read read-from written-to by the host. */</div><div class='del'>-#define          MC_CMD_BUNDLE_COMPONENTS_READ_WRITE 0x1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN msgrequest: The component</div><div class='del'>- * partitions such as MC_FIRMWARE, SUC_FIRMWARE, EXPANSION_UEFI are set as</div><div class='del'>- * read-only on firmware built with bundle support. This command marks these</div><div class='del'>- * partitions as read/writeable. The access status set by this command does not</div><div class='del'>- * persist across MC reboots. This command only works on engineering (insecure)</div><div class='del'>- * cards. On secure adapters, this command returns MC_CMD_ERR_EPERM.</div><div class='del'>- */</div><div class='del'>-#define    MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_LEN 8</div><div class='del'>-/* Sub-command code. Must be OP_COMPONENT_ACCESS_SET. */</div><div class='del'>-#define       MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_OP_OFST 0</div><div class='del'>-#define       MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_OP_LEN 4</div><div class='del'>-/* Access mode of component partitions. */</div><div class='del'>-#define       MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_ACCESS_MODE_OFST 4</div><div class='del'>-#define       MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_IN_ACCESS_MODE_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_GET_OUT/ACCESS_MODE */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_BUNDLE_OP_COMPONENT_ACCESS_SET_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_VPD</div><div class='del'>- * Read all VPD starting from a given address</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_VPD 0x165</div><div class='del'>-#undef MC_CMD_0x165_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x165_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_VPD_IN msgresponse */</div><div class='del'>-#define    MC_CMD_GET_VPD_IN_LEN 4</div><div class='del'>-/* VPD address to start from. In case VPD is longer than MCDI buffer</div><div class='del'>- * (unlikely), user can make multiple calls with different starting addresses.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_VPD_IN_ADDR_OFST 0</div><div class='del'>-#define       MC_CMD_GET_VPD_IN_ADDR_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_VPD_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_VPD_OUT_LENMIN 0</div><div class='del'>-#define    MC_CMD_GET_VPD_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_GET_VPD_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_GET_VPD_OUT_LEN(num) (0+1*(num))</div><div class='del'>-#define    MC_CMD_GET_VPD_OUT_DATA_NUM(len) (((len)-0)/1)</div><div class='del'>-/* VPD data returned. */</div><div class='del'>-#define       MC_CMD_GET_VPD_OUT_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_GET_VPD_OUT_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_GET_VPD_OUT_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_GET_VPD_OUT_DATA_MAXNUM 252</div><div class='del'>-#define       MC_CMD_GET_VPD_OUT_DATA_MAXNUM_MCDI2 1020</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_NCSI_INFO</div><div class='del'>- * Provide information about the NC-SI stack</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_NCSI_INFO 0x167</div><div class='del'>-#undef MC_CMD_0x167_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x167_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_NCSI_INFO_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_NCSI_INFO_IN_LEN 8</div><div class='del'>-/* Operation to be performed */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_IN_OP_OFST 0</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_IN_OP_LEN 4</div><div class='del'>-/* enum: Information on the link settings. */</div><div class='del'>-#define          MC_CMD_GET_NCSI_INFO_IN_OP_LINK 0x0</div><div class='del'>-/* enum: Statistics associated with the channel */</div><div class='del'>-#define          MC_CMD_GET_NCSI_INFO_IN_OP_STATISTICS 0x1</div><div class='del'>-/* The NC-SI channel on which the operation is to be performed */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_IN_CHANNEL_OFST 4</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_IN_CHANNEL_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_NCSI_INFO_LINK_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_NCSI_INFO_LINK_OUT_LEN 12</div><div class='del'>-/* Settings as received from BMC. */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_LINK_OUT_SETTINGS_OFST 0</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_LINK_OUT_SETTINGS_LEN 4</div><div class='del'>-/* Advertised capabilities applied to channel. */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_LINK_OUT_ADV_CAP_OFST 4</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_LINK_OUT_ADV_CAP_LEN 4</div><div class='del'>-/* General status */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_LINK_OUT_STATUS_OFST 8</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_LINK_OUT_STATUS_LEN 4</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_OFST 8</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_LBN 0</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_STATE_WIDTH 2</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_OFST 8</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_LBN 2</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_ENABLE_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_OFST 8</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_LBN 3</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_NETWORK_TX_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_OFST 8</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_LBN 4</div><div class='del'>-#define        MC_CMD_GET_NCSI_INFO_LINK_OUT_ATTACHED_WIDTH 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_NCSI_INFO_STATISTICS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_LEN 28</div><div class='del'>-/* The number of NC-SI commands received. */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMDS_RX_OFST 0</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMDS_RX_LEN 4</div><div class='del'>-/* The number of NC-SI commands dropped. */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_PKTS_DROPPED_OFST 4</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_PKTS_DROPPED_LEN 4</div><div class='del'>-/* The number of invalid NC-SI commands received. */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_TYPE_ERRS_OFST 8</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_TYPE_ERRS_LEN 4</div><div class='del'>-/* The number of checksum errors seen. */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_CSUM_ERRS_OFST 12</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_CMD_CSUM_ERRS_LEN 4</div><div class='del'>-/* The number of NC-SI requests received. */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_RX_PKTS_OFST 16</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_RX_PKTS_LEN 4</div><div class='del'>-/* The number of NC-SI responses sent (includes AENs) */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_TX_PKTS_OFST 20</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_NCSI_TX_PKTS_LEN 4</div><div class='del'>-/* The number of NC-SI AENs sent */</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_AENS_SENT_OFST 24</div><div class='del'>-#define       MC_CMD_GET_NCSI_INFO_STATISTICS_OUT_AENS_SENT_LEN 4</div><div class='del'>-</div><div class='ctx'> /* CLIENT_HANDLE structuredef: A client is an abstract entity that can make</div><div class='ctx'>  * requests of the device and that can own resources managed by the device.</div><div class='ctx'>  * Examples of clients include PCIe functions and dynamic clients. A client</div><div class='hunk'>@@ -23848,59 +21670,10 @@</div><div class='ctx'> #define       CLIENT_HANDLE_OPAQUE_LBN 0</div><div class='ctx'> #define       CLIENT_HANDLE_OPAQUE_WIDTH 32</div><div class='ctx'> </div><div class='del'>-/* CLOCK_INFO structuredef: Information about a single hardware clock */</div><div class='del'>-#define    CLOCK_INFO_LEN 28</div><div class='del'>-/* Enumeration that uniquely identifies the clock */</div><div class='del'>-#define       CLOCK_INFO_CLOCK_ID_OFST 0</div><div class='del'>-#define       CLOCK_INFO_CLOCK_ID_LEN 2</div><div class='del'>-/* enum: The Riverhead CMC (card MC) */</div><div class='del'>-#define          CLOCK_INFO_CLOCK_CMC 0x0</div><div class='del'>-/* enum: The Riverhead NMC (network MC) */</div><div class='del'>-#define          CLOCK_INFO_CLOCK_NMC 0x1</div><div class='del'>-/* enum: The Riverhead SDNET slice main logic */</div><div class='del'>-#define          CLOCK_INFO_CLOCK_SDNET 0x2</div><div class='del'>-/* enum: The Riverhead SDNET LUT */</div><div class='del'>-#define          CLOCK_INFO_CLOCK_SDNET_LUT 0x3</div><div class='del'>-/* enum: The Riverhead SDNET control logic */</div><div class='del'>-#define          CLOCK_INFO_CLOCK_SDNET_CTRL 0x4</div><div class='del'>-/* enum: The Riverhead Streaming SubSystem */</div><div class='del'>-#define          CLOCK_INFO_CLOCK_SSS 0x5</div><div class='del'>-/* enum: The Riverhead network MAC and associated CSR registers */</div><div class='del'>-#define          CLOCK_INFO_CLOCK_MAC 0x6</div><div class='del'>-#define       CLOCK_INFO_CLOCK_ID_LBN 0</div><div class='del'>-#define       CLOCK_INFO_CLOCK_ID_WIDTH 16</div><div class='del'>-/* Assorted flags */</div><div class='del'>-#define       CLOCK_INFO_FLAGS_OFST 2</div><div class='del'>-#define       CLOCK_INFO_FLAGS_LEN 2</div><div class='del'>-#define        CLOCK_INFO_SETTABLE_OFST 2</div><div class='del'>-#define        CLOCK_INFO_SETTABLE_LBN 0</div><div class='del'>-#define        CLOCK_INFO_SETTABLE_WIDTH 1</div><div class='del'>-#define       CLOCK_INFO_FLAGS_LBN 16</div><div class='del'>-#define       CLOCK_INFO_FLAGS_WIDTH 16</div><div class='del'>-/* The frequency in HZ */</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_OFST 4</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_LEN 8</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_LO_OFST 4</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_LO_LEN 4</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_LO_LBN 32</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_LO_WIDTH 32</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_HI_OFST 8</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_HI_LEN 4</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_HI_LBN 64</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_HI_WIDTH 32</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_LBN 32</div><div class='del'>-#define       CLOCK_INFO_FREQUENCY_WIDTH 64</div><div class='del'>-/* Human-readable ASCII name for clock, with NUL termination */</div><div class='del'>-#define       CLOCK_INFO_NAME_OFST 12</div><div class='del'>-#define       CLOCK_INFO_NAME_LEN 1</div><div class='del'>-#define       CLOCK_INFO_NAME_NUM 16</div><div class='del'>-#define       CLOCK_INFO_NAME_LBN 96</div><div class='del'>-#define       CLOCK_INFO_NAME_WIDTH 8</div><div class='del'>-</div><div class='ctx'> /* SCHED_CREDIT_CHECK_RESULT structuredef */</div><div class='ctx'> #define    SCHED_CREDIT_CHECK_RESULT_LEN 16</div><div class='del'>-/* The instance of the scheduler. Refer to XN-200389-AW for the location of</div><div class='del'>- * these schedulers in the hardware.</div><div class='add'>+/* The instance of the scheduler. Refer to XN-200389-AW (snic/hnic) and</div><div class='add'>+ * XN-200425-TC (cdx) for the location of these schedulers in the hardware.</div><div class='ctx'>  */</div><div class='ctx'> #define       SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0</div><div class='ctx'> #define       SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1</div><div class='hunk'>@@ -23914,6 +21687,16 @@</div><div class='ctx'> #define          SCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */</div><div class='ctx'> #define          SCHED_CREDIT_CHECK_RESULT_HUB_NET_B 0x8 /* enum */</div><div class='ctx'> #define          SCHED_CREDIT_CHECK_RESULT_HUB_NET_REPLAY 0x9 /* enum */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_ADAPTER_C2H_C 0xa /* enum */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_A2_H2C_C 0xb /* enum */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_A3_SOFT_ADAPTOR_C 0xc /* enum */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_A4_DPU_WRITE_C 0xd /* enum */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_JRC_RRU 0xe /* enum */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_CDM_SINK 0xf /* enum */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_PCIE_SINK 0x10 /* enum */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_UPORT_SINK 0x11 /* enum */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_PSX_SINK 0x12 /* enum */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_A5_DPU_READ_C 0x13 /* enum */</div><div class='ctx'> #define       SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0</div><div class='ctx'> #define       SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8</div><div class='ctx'> /* The type of node that this result refers to. */</div><div class='hunk'>@@ -23923,6 +21706,10 @@</div><div class='ctx'> #define          SCHED_CREDIT_CHECK_RESULT_DEST 0x0</div><div class='ctx'> /* enum: Source node */</div><div class='ctx'> #define          SCHED_CREDIT_CHECK_RESULT_SOURCE 0x1</div><div class='add'>+/* enum: Destination node credit type 1 (new to the Keystone schedulers, see</div><div class='add'>+ * SF-120268-TC)</div><div class='add'>+ */</div><div class='add'>+#define          SCHED_CREDIT_CHECK_RESULT_DEST_CREDIT1 0x2</div><div class='ctx'> #define       SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8</div><div class='ctx'> #define       SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8</div><div class='ctx'> /* Level of node in scheduler hierarchy (level 0 is the bottom of the</div><div class='hunk'>@@ -23950,592 +21737,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_GET_CLOCKS_INFO</div><div class='del'>- * Get information about the device clocks</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_CLOCKS_INFO 0x166</div><div class='del'>-#undef MC_CMD_0x166_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x166_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_CLOCKS_INFO_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_CLOCKS_INFO_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_CLOCKS_INFO_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_CLOCKS_INFO_OUT_LENMIN 0</div><div class='del'>-#define    MC_CMD_GET_CLOCKS_INFO_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_GET_CLOCKS_INFO_OUT_LENMAX_MCDI2 1008</div><div class='del'>-#define    MC_CMD_GET_CLOCKS_INFO_OUT_LEN(num) (0+28*(num))</div><div class='del'>-#define    MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_NUM(len) (((len)-0)/28)</div><div class='del'>-/* An array of CLOCK_INFO structures. */</div><div class='del'>-#define       MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_OFST 0</div><div class='del'>-#define       MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_LEN 28</div><div class='del'>-#define       MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MINNUM 0</div><div class='del'>-#define       MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MAXNUM 9</div><div class='del'>-#define       MC_CMD_GET_CLOCKS_INFO_OUT_INFOS_MAXNUM_MCDI2 36</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_VNIC_ENCAP_RULE_ADD</div><div class='del'>- * Add a rule for detecting encapsulations in the VNIC stage. Currently this</div><div class='del'>- * only affects checksum validation in VNIC RX - on TX the send descriptor</div><div class='del'>- * explicitly specifies encapsulation. These rules are per-VNIC, i.e. only</div><div class='del'>- * apply to the current driver. If a rule matches, then the packet is</div><div class='del'>- * considered to have the corresponding encapsulation type, and the inner</div><div class='del'>- * packet is parsed. It is up to the driver to ensure that overlapping rules</div><div class='del'>- * are not inserted. (If a packet would match multiple rules, a random one of</div><div class='del'>- * them will be used.) A rule with the exact same match criteria may not be</div><div class='del'>- * inserted twice (EALREADY). Only a limited number MATCH_FLAGS values are</div><div class='del'>- * supported, use MC_CMD_GET_PARSER_DISP_INFO with OP</div><div class='del'>- * OP_GET_SUPPORTED_VNIC_ENCAP_RULE_MATCHES to get a list of supported</div><div class='del'>- * combinations. Each driver may only have a limited set of active rules -</div><div class='del'>- * returns ENOSPC if the caller's table is full.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_VNIC_ENCAP_RULE_ADD 0x16d</div><div class='del'>-#undef MC_CMD_0x16d_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x16d_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_VNIC_ENCAP_RULE_ADD_IN msgrequest */</div><div class='del'>-#define    MC_CMD_VNIC_ENCAP_RULE_ADD_IN_LEN 36</div><div class='del'>-/* Set to MAE_MPORT_SELECTOR_ASSIGNED. In the future this may be relaxed. */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MPORT_SELECTOR_OFST 0</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MPORT_SELECTOR_LEN 4</div><div class='del'>-/* Any non-zero bits other than the ones named below or an unsupported</div><div class='del'>- * combination will cause the NIC to return EOPNOTSUPP. In the future more</div><div class='del'>- * flags may be added.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_OFST 4</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_OFST 4</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_LBN 0</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_WIDTH 1</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_OFST 4</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_LBN 1</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_WIDTH 1</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_OFST 4</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_LBN 2</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_WIDTH 1</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_OFST 4</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_LBN 3</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_WIDTH 1</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_OFST 4</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_LBN 4</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_WIDTH 1</div><div class='del'>-/* Only if MATCH_ETHER_TYPE is set. Ethertype value as bytes in network order.</div><div class='del'>- * Currently only IPv4 (0x0800) and IPv6 (0x86DD) ethertypes may be used.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ETHER_TYPE_OFST 8</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ETHER_TYPE_LEN 2</div><div class='del'>-/* Only if MATCH_OUTER_VLAN is set. VID value as bytes in network order.</div><div class='del'>- * (Deprecated)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_LBN 80</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WIDTH 12</div><div class='del'>-/* Only if MATCH_OUTER_VLAN is set. Aligned wrapper for OUTER_VLAN_VID. */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WORD_OFST 10</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_WORD_LEN 2</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_OFST 10</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_LBN 0</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_OUTER_VLAN_VID_WIDTH 12</div><div class='del'>-/* Only if MATCH_DST_IP is set. IP address as bytes in network order. In the</div><div class='del'>- * case of IPv4, the IP should be in the first 4 bytes and all other bytes</div><div class='del'>- * should be zero.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_IP_OFST 12</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_IP_LEN 16</div><div class='del'>-/* Only if MATCH_IP_PROTO is set. Currently only UDP proto (17) may be used. */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_IP_PROTO_OFST 28</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_IP_PROTO_LEN 1</div><div class='del'>-/* Actions that should be applied to packets match the rule. */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ACTION_FLAGS_OFST 29</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ACTION_FLAGS_LEN 1</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_OFST 29</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_LBN 0</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STRIP_OUTER_VLAN_WIDTH 1</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_RSS_ON_OUTER_OFST 29</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_RSS_ON_OUTER_LBN 1</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_RSS_ON_OUTER_WIDTH 1</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STEER_ON_OUTER_OFST 29</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STEER_ON_OUTER_LBN 2</div><div class='del'>-#define        MC_CMD_VNIC_ENCAP_RULE_ADD_IN_STEER_ON_OUTER_WIDTH 1</div><div class='del'>-/* Only if MATCH_DST_PORT is set. Port number as bytes in network order. */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_PORT_OFST 30</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_DST_PORT_LEN 2</div><div class='del'>-/* Resulting encapsulation type, as per MAE_MCDI_ENCAP_TYPE enumeration. */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ENCAP_TYPE_OFST 32</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ENCAP_TYPE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_VNIC_ENCAP_RULE_ADD_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_LEN 4</div><div class='del'>-/* Handle to inserted rule. Used for removing the rule. */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_VNIC_ENCAP_RULE_REMOVE</div><div class='del'>- * Remove a VNIC encapsulation rule. Packets which would have previously</div><div class='del'>- * matched the rule will then be considered as unencapsulated. Returns EALREADY</div><div class='del'>- * if the input HANDLE doesn't correspond to an existing rule.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_VNIC_ENCAP_RULE_REMOVE 0x16e</div><div class='del'>-#undef MC_CMD_0x16e_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x16e_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_LEN 4</div><div class='del'>-/* Handle which was returned by MC_CMD_VNIC_ENCAP_RULE_ADD. */</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_VNIC_ENCAP_RULE_REMOVE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_VNIC_ENCAP_RULE_REMOVE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* UUID structuredef: An RFC4122 standard UUID. The values here are stored in</div><div class='del'>- * the endianness specified by the RFC; users should ignore the broken-out</div><div class='del'>- * fields and instead do straight memory copies to ensure correct ordering.</div><div class='del'>- */</div><div class='del'>-#define    UUID_LEN 16</div><div class='del'>-#define       UUID_TIME_LOW_OFST 0</div><div class='del'>-#define       UUID_TIME_LOW_LEN 4</div><div class='del'>-#define       UUID_TIME_LOW_LBN 0</div><div class='del'>-#define       UUID_TIME_LOW_WIDTH 32</div><div class='del'>-#define       UUID_TIME_MID_OFST 4</div><div class='del'>-#define       UUID_TIME_MID_LEN 2</div><div class='del'>-#define       UUID_TIME_MID_LBN 32</div><div class='del'>-#define       UUID_TIME_MID_WIDTH 16</div><div class='del'>-#define       UUID_TIME_HI_LBN 52</div><div class='del'>-#define       UUID_TIME_HI_WIDTH 12</div><div class='del'>-#define       UUID_VERSION_LBN 48</div><div class='del'>-#define       UUID_VERSION_WIDTH 4</div><div class='del'>-#define       UUID_RESERVED_LBN 64</div><div class='del'>-#define       UUID_RESERVED_WIDTH 2</div><div class='del'>-#define       UUID_CLK_SEQ_LBN 66</div><div class='del'>-#define       UUID_CLK_SEQ_WIDTH 14</div><div class='del'>-#define       UUID_NODE_OFST 10</div><div class='del'>-#define       UUID_NODE_LEN 6</div><div class='del'>-#define       UUID_NODE_LBN 80</div><div class='del'>-#define       UUID_NODE_WIDTH 48</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PLUGIN_ALLOC</div><div class='del'>- * Create a handle to a datapath plugin's extension. This involves finding a</div><div class='del'>- * currently-loaded plugin offering the given functionality (as identified by</div><div class='del'>- * the UUID) and allocating a handle to track the usage of it. Plugin</div><div class='del'>- * functionality is identified by 'extension' rather than any other identifier</div><div class='del'>- * so that a single plugin bitfile may offer more than one piece of independent</div><div class='del'>- * functionality. If two bitfiles are loaded which both offer the same</div><div class='del'>- * extension, then the metadata is interrogated further to determine which is</div><div class='del'>- * the newest and that is the one opened. See SF-123625-SW for architectural</div><div class='del'>- * detail on datapath plugins.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PLUGIN_ALLOC 0x1ad</div><div class='del'>-#undef MC_CMD_0x1ad_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1ad_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_ALLOC_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PLUGIN_ALLOC_IN_LEN 24</div><div class='del'>-/* The functionality requested of the plugin, as a UUID structure */</div><div class='del'>-#define       MC_CMD_PLUGIN_ALLOC_IN_UUID_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_ALLOC_IN_UUID_LEN 16</div><div class='del'>-/* Additional options for opening the handle */</div><div class='del'>-#define       MC_CMD_PLUGIN_ALLOC_IN_FLAGS_OFST 16</div><div class='del'>-#define       MC_CMD_PLUGIN_ALLOC_IN_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_PLUGIN_ALLOC_IN_FLAG_INFO_ONLY_OFST 16</div><div class='del'>-#define        MC_CMD_PLUGIN_ALLOC_IN_FLAG_INFO_ONLY_LBN 0</div><div class='del'>-#define        MC_CMD_PLUGIN_ALLOC_IN_FLAG_INFO_ONLY_WIDTH 1</div><div class='del'>-#define        MC_CMD_PLUGIN_ALLOC_IN_FLAG_ALLOW_DISABLED_OFST 16</div><div class='del'>-#define        MC_CMD_PLUGIN_ALLOC_IN_FLAG_ALLOW_DISABLED_LBN 1</div><div class='del'>-#define        MC_CMD_PLUGIN_ALLOC_IN_FLAG_ALLOW_DISABLED_WIDTH 1</div><div class='del'>-/* Load the extension only if it is in the specified administrative group.</div><div class='del'>- * Specify ANY to load the extension wherever it is found (if there are</div><div class='del'>- * multiple choices then the extension with the highest MINOR_VER/PATCH_VER</div><div class='del'>- * will be loaded). See MC_CMD_PLUGIN_GET_META_GLOBAL for a description of</div><div class='del'>- * administrative groups.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_ALLOC_IN_ADMIN_GROUP_OFST 20</div><div class='del'>-#define       MC_CMD_PLUGIN_ALLOC_IN_ADMIN_GROUP_LEN 2</div><div class='del'>-/* enum: Load the extension from any ADMIN_GROUP. */</div><div class='del'>-#define          MC_CMD_PLUGIN_ALLOC_IN_ANY 0xffff</div><div class='del'>-/* Reserved */</div><div class='del'>-#define       MC_CMD_PLUGIN_ALLOC_IN_RESERVED_OFST 22</div><div class='del'>-#define       MC_CMD_PLUGIN_ALLOC_IN_RESERVED_LEN 2</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_ALLOC_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PLUGIN_ALLOC_OUT_LEN 4</div><div class='del'>-/* Unique identifier of this usage */</div><div class='del'>-#define       MC_CMD_PLUGIN_ALLOC_OUT_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_ALLOC_OUT_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PLUGIN_FREE</div><div class='del'>- * Delete a handle to a plugin's extension.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PLUGIN_FREE 0x1ae</div><div class='del'>-#undef MC_CMD_0x1ae_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1ae_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_FREE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PLUGIN_FREE_IN_LEN 4</div><div class='del'>-/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */</div><div class='del'>-#define       MC_CMD_PLUGIN_FREE_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_FREE_IN_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_FREE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PLUGIN_FREE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PLUGIN_GET_META_GLOBAL</div><div class='del'>- * Returns the global metadata applying to the whole plugin extension. See the</div><div class='del'>- * other metadata calls for subtypes of data.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PLUGIN_GET_META_GLOBAL 0x1af</div><div class='del'>-#undef MC_CMD_0x1af_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1af_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_GET_META_GLOBAL_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_META_GLOBAL_IN_LEN 4</div><div class='del'>-/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_IN_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_GET_META_GLOBAL_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_LEN 36</div><div class='del'>-/* Unique identifier of this plugin extension. This is identical to the value</div><div class='del'>- * which was requested when the handle was allocated.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_UUID_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_UUID_LEN 16</div><div class='del'>-/* semver sub-version of this plugin extension */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MINOR_VER_OFST 16</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MINOR_VER_LEN 2</div><div class='del'>-/* semver micro-version of this plugin extension */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PATCH_VER_OFST 18</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PATCH_VER_LEN 2</div><div class='del'>-/* Number of different messages which can be sent to this extension */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_NUM_MSGS_OFST 20</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_NUM_MSGS_LEN 4</div><div class='del'>-/* Byte offset within the VI window of the plugin's mapped CSR window. */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_OFFSET_OFST 24</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_OFFSET_LEN 2</div><div class='del'>-/* Number of bytes mapped through to the plugin's CSRs. 0 if that feature was</div><div class='del'>- * not requested by the plugin (in which case MAPPED_CSR_OFFSET and</div><div class='del'>- * MAPPED_CSR_FLAGS are ignored).</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_SIZE_OFST 26</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_SIZE_LEN 2</div><div class='del'>-/* Flags indicating how to perform the CSR window mapping. */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAGS_OFST 28</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_READ_OFST 28</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_READ_LBN 0</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_READ_WIDTH 1</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_WRITE_OFST 28</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_WRITE_LBN 1</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_MAPPED_CSR_FLAG_WRITE_WIDTH 1</div><div class='del'>-/* Identifier of the set of extensions which all change state together.</div><div class='del'>- * Extensions having the same ADMIN_GROUP will always load and unload at the</div><div class='del'>- * same time. ADMIN_GROUP values themselves are arbitrary (but they contain a</div><div class='del'>- * generation number as an implementation detail to ensure that they're not</div><div class='del'>- * reused rapidly).</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_ADMIN_GROUP_OFST 32</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_ADMIN_GROUP_LEN 1</div><div class='del'>-/* Bitshift in MC_CMD_DEVEL_CLIENT_PRIVILEGE_MODIFY's MASK parameters</div><div class='del'>- * corresponding to this extension, i.e. set the bit 1&lt;&lt;PRIVILEGE_BIT to permit</div><div class='del'>- * access to this extension.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PRIVILEGE_BIT_OFST 33</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_PRIVILEGE_BIT_LEN 1</div><div class='del'>-/* Reserved */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_RESERVED_OFST 34</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_GLOBAL_OUT_RESERVED_LEN 2</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PLUGIN_GET_META_PUBLISHER</div><div class='del'>- * Returns metadata supplied by the plugin author which describes this</div><div class='del'>- * extension in a human-readable way. Contrast with</div><div class='del'>- * MC_CMD_PLUGIN_GET_META_GLOBAL, which returns information needed for software</div><div class='del'>- * to operate.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PLUGIN_GET_META_PUBLISHER 0x1b0</div><div class='del'>-#undef MC_CMD_0x1b0_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1b0_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_GET_META_PUBLISHER_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_LEN 12</div><div class='del'>-/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_HANDLE_LEN 4</div><div class='del'>-/* Category of data to return */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_SUBTYPE_OFST 4</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_SUBTYPE_LEN 4</div><div class='del'>-/* enum: Top-level information about the extension. The returned data is an</div><div class='del'>- * array of key/value pairs using the keys in RFC5013 (Dublin Core) to describe</div><div class='del'>- * the extension. The data is a back-to-back list of zero-terminated strings;</div><div class='del'>- * the even-numbered fields (0,2,4,...) are keys and their following odd-</div><div class='del'>- * numbered fields are the corresponding values. Both keys and values are</div><div class='del'>- * nominally UTF-8. Per RFC5013, the same key may be repeated any number of</div><div class='del'>- * times. Note that all information (including the key/value structure itself</div><div class='del'>- * and the UTF-8 encoding) may have been provided by the plugin author, so</div><div class='del'>- * callers must be cautious about parsing it. Callers should parse only the</div><div class='del'>- * top-level structure to separate out the keys and values; the contents of the</div><div class='del'>- * values is not expected to be machine-readable.</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_EXTENSION_KVS 0x0</div><div class='del'>-/* Byte position of the data to be returned within the full data block of the</div><div class='del'>- * given SUBTYPE.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_OFFSET_OFST 8</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_IN_OFFSET_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_LEN(num) (4+1*(num))</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_NUM(len) (((len)-4)/1)</div><div class='del'>-/* Full length of the data block of the requested SUBTYPE, in bytes. */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_TOTAL_SIZE_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_TOTAL_SIZE_LEN 4</div><div class='del'>-/* The information requested by SUBTYPE. */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_OFST 4</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_MAXNUM 248</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_PUBLISHER_OUT_DATA_MAXNUM_MCDI2 1016</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PLUGIN_GET_META_MSG</div><div class='del'>- * Returns the simple metadata for a specific plugin request message. This</div><div class='del'>- * supplies information necessary for the host to know how to build an</div><div class='del'>- * MC_CMD_PLUGIN_REQ request.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PLUGIN_GET_META_MSG 0x1b1</div><div class='del'>-#undef MC_CMD_0x1b1_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1b1_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_GET_META_MSG_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_META_MSG_IN_LEN 8</div><div class='del'>-/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_IN_HANDLE_LEN 4</div><div class='del'>-/* Unique message ID to obtain */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_IN_ID_OFST 4</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_IN_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_GET_META_MSG_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_META_MSG_OUT_LEN 44</div><div class='del'>-/* Unique message ID. This is the same value as the input parameter; it exists</div><div class='del'>- * to allow future MCDI extensions which enumerate all messages.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_OUT_ID_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_OUT_ID_LEN 4</div><div class='del'>-/* Packed index number of this message, assigned by the MC to give each message</div><div class='del'>- * a unique ID in an array to allow for more efficient storage/management.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_OUT_INDEX_OFST 4</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_OUT_INDEX_LEN 4</div><div class='del'>-/* Short human-readable codename for this message. This is conventionally</div><div class='del'>- * formatted as a C identifier in the basic ASCII character set with any spare</div><div class='del'>- * bytes at the end set to 0, however this convention is not enforced by the MC</div><div class='del'>- * so consumers must check for all potential malformations before using it for</div><div class='del'>- * a trusted purpose.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_OUT_NAME_OFST 8</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_OUT_NAME_LEN 32</div><div class='del'>-/* Number of bytes of data which must be passed from the host kernel to the MC</div><div class='del'>- * for this message's payload, and which are passed back again in the response.</div><div class='del'>- * The MC's plugin metadata loader will have validated that the number of bytes</div><div class='del'>- * specified here will fit in to MC_CMD_PLUGIN_REQ_IN_DATA in a single MCDI</div><div class='del'>- * message.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_OUT_DATA_SIZE_OFST 40</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_META_MSG_OUT_DATA_SIZE_LEN 4</div><div class='del'>-</div><div class='del'>-/* PLUGIN_EXTENSION structuredef: Used within MC_CMD_PLUGIN_GET_ALL to describe</div><div class='del'>- * an individual extension.</div><div class='del'>- */</div><div class='del'>-#define    PLUGIN_EXTENSION_LEN 20</div><div class='del'>-#define       PLUGIN_EXTENSION_UUID_OFST 0</div><div class='del'>-#define       PLUGIN_EXTENSION_UUID_LEN 16</div><div class='del'>-#define       PLUGIN_EXTENSION_UUID_LBN 0</div><div class='del'>-#define       PLUGIN_EXTENSION_UUID_WIDTH 128</div><div class='del'>-#define       PLUGIN_EXTENSION_ADMIN_GROUP_OFST 16</div><div class='del'>-#define       PLUGIN_EXTENSION_ADMIN_GROUP_LEN 1</div><div class='del'>-#define       PLUGIN_EXTENSION_ADMIN_GROUP_LBN 128</div><div class='del'>-#define       PLUGIN_EXTENSION_ADMIN_GROUP_WIDTH 8</div><div class='del'>-#define       PLUGIN_EXTENSION_FLAG_ENABLED_LBN 136</div><div class='del'>-#define       PLUGIN_EXTENSION_FLAG_ENABLED_WIDTH 1</div><div class='del'>-#define       PLUGIN_EXTENSION_RESERVED_LBN 137</div><div class='del'>-#define       PLUGIN_EXTENSION_RESERVED_WIDTH 23</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PLUGIN_GET_ALL</div><div class='del'>- * Returns a list of all plugin extensions currently loaded and available. The</div><div class='del'>- * UUIDs returned can be passed to MC_CMD_PLUGIN_ALLOC in order to obtain more</div><div class='del'>- * detailed metadata via the MC_CMD_PLUGIN_GET_META_* family of requests. The</div><div class='del'>- * ADMIN_GROUP field collects how extensions are grouped in to units which are</div><div class='del'>- * loaded/unloaded together; extensions with the same value are in the same</div><div class='del'>- * group.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PLUGIN_GET_ALL 0x1b2</div><div class='del'>-#undef MC_CMD_0x1b2_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1b2_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_GET_ALL_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_ALL_IN_LEN 4</div><div class='del'>-/* Additional options for querying. Note that if neither FLAG_INCLUDE_ENABLED</div><div class='del'>- * nor FLAG_INCLUDE_DISABLED are specified then the result set will be empty.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_ALL_IN_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_ALL_IN_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_ENABLED_OFST 0</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_ENABLED_LBN 0</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_ENABLED_WIDTH 1</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_DISABLED_OFST 0</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_DISABLED_LBN 1</div><div class='del'>-#define        MC_CMD_PLUGIN_GET_ALL_IN_FLAG_INCLUDE_DISABLED_WIDTH 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_GET_ALL_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_ALL_OUT_LENMIN 0</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_ALL_OUT_LENMAX 240</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_ALL_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_ALL_OUT_LEN(num) (0+20*(num))</div><div class='del'>-#define    MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_NUM(len) (((len)-0)/20)</div><div class='del'>-/* The list of available plugin extensions, as an array of PLUGIN_EXTENSION</div><div class='del'>- * structs.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_LEN 20</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_MINNUM 0</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_MAXNUM 12</div><div class='del'>-#define       MC_CMD_PLUGIN_GET_ALL_OUT_EXTENSIONS_MAXNUM_MCDI2 51</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_PLUGIN_REQ</div><div class='del'>- * Send a command to a plugin. A plugin may define an arbitrary number of</div><div class='del'>- * 'messages' which it allows applications on the host system to send, each</div><div class='del'>- * identified by a 32-bit ID.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_PLUGIN_REQ 0x1b3</div><div class='del'>-#undef MC_CMD_0x1b3_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1b3_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_REQ_IN msgrequest */</div><div class='del'>-#define    MC_CMD_PLUGIN_REQ_IN_LENMIN 8</div><div class='del'>-#define    MC_CMD_PLUGIN_REQ_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_PLUGIN_REQ_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_PLUGIN_REQ_IN_LEN(num) (8+1*(num))</div><div class='del'>-#define    MC_CMD_PLUGIN_REQ_IN_DATA_NUM(len) (((len)-8)/1)</div><div class='del'>-/* Handle returned by MC_CMD_PLUGIN_ALLOC_OUT */</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_IN_HANDLE_LEN 4</div><div class='del'>-/* Message ID defined by the plugin author */</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_IN_ID_OFST 4</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_IN_ID_LEN 4</div><div class='del'>-/* Data blob being the parameter to the message. This must be of the length</div><div class='del'>- * specified by MC_CMD_PLUGIN_GET_META_MSG_IN_MCDI_PARAM_SIZE.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_IN_DATA_OFST 8</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_IN_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_IN_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_IN_DATA_MAXNUM 244</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_IN_DATA_MAXNUM_MCDI2 1012</div><div class='del'>-</div><div class='del'>-/* MC_CMD_PLUGIN_REQ_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_PLUGIN_REQ_OUT_LENMIN 0</div><div class='del'>-#define    MC_CMD_PLUGIN_REQ_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_PLUGIN_REQ_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_PLUGIN_REQ_OUT_LEN(num) (0+1*(num))</div><div class='del'>-#define    MC_CMD_PLUGIN_REQ_OUT_DATA_NUM(len) (((len)-0)/1)</div><div class='del'>-/* The input data, as transformed and/or updated by the plugin's eBPF. Will be</div><div class='del'>- * the same size as the input DATA parameter.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_OUT_DATA_OFST 0</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_OUT_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_OUT_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_OUT_DATA_MAXNUM 252</div><div class='del'>-#define       MC_CMD_PLUGIN_REQ_OUT_DATA_MAXNUM_MCDI2 1020</div><div class='del'>-</div><div class='del'>-/* DESC_ADDR_REGION structuredef: Describes a contiguous region of DESC_ADDR</div><div class='del'>- * space that maps to a contiguous region of TRGT_ADDR space. Addresses</div><div class='del'>- * DESC_ADDR in the range [DESC_ADDR_BASE:DESC_ADDR_BASE + 1 &lt;&lt;</div><div class='del'>- * WINDOW_SIZE_LOG2) map to TRGT_ADDR = DESC_ADDR - DESC_ADDR_BASE +</div><div class='del'>- * TRGT_ADDR_BASE.</div><div class='del'>- */</div><div class='del'>-#define    DESC_ADDR_REGION_LEN 32</div><div class='del'>-/* The start of the region in DESC_ADDR space. */</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_OFST 0</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_LEN 8</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_LO_OFST 0</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LEN 4</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LBN 0</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_LO_WIDTH 32</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_HI_OFST 4</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LEN 4</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LBN 32</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_HI_WIDTH 32</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_LBN 0</div><div class='del'>-#define       DESC_ADDR_REGION_DESC_ADDR_BASE_WIDTH 64</div><div class='del'>-/* The start of the region in TRGT_ADDR space. Drivers can set this via</div><div class='del'>- * MC_CMD_SET_DESC_ADDR_REGIONS.</div><div class='del'>- */</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_OFST 8</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_LEN 8</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_OFST 8</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LEN 4</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LBN 64</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_WIDTH 32</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_OFST 12</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LEN 4</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LBN 96</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_WIDTH 32</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_LBN 64</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_BASE_WIDTH 64</div><div class='del'>-/* The size of the region. */</div><div class='del'>-#define       DESC_ADDR_REGION_WINDOW_SIZE_LOG2_OFST 16</div><div class='del'>-#define       DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LEN 4</div><div class='del'>-#define       DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LBN 128</div><div class='del'>-#define       DESC_ADDR_REGION_WINDOW_SIZE_LOG2_WIDTH 32</div><div class='del'>-/* The alignment restriction on TRGT_ADDR. TRGT_ADDR values set by the driver</div><div class='del'>- * must be a multiple of 1 &lt;&lt; TRGT_ADDR_ALIGN_LOG2.</div><div class='del'>- */</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_OFST 20</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LEN 4</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LBN 160</div><div class='del'>-#define       DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_WIDTH 32</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_OFST 24</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_LEN 8</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_LO_OFST 24</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_LO_LEN 4</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_LO_LBN 192</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_LO_WIDTH 32</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_HI_OFST 28</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_HI_LEN 4</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_HI_LBN 224</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_HI_WIDTH 32</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_LBN 192</div><div class='del'>-#define       DESC_ADDR_REGION_RSVD_WIDTH 64</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_GET_DESC_ADDR_INFO</div><div class='ctx'>  * Returns a description of the mapping from DESC_ADDR to TRGT_ADDR for the calling function's address space.</div><div class='ctx'>  */</div><div class='hunk'>@@ -24836,122 +22037,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_GET_BOARD_ATTR</div><div class='del'>- * Retrieve physical build-level board attributes as configured at</div><div class='del'>- * manufacturing stage. Fields originate from EEPROM and per-platform constants</div><div class='del'>- * in firmware. Fields are used in development to identify/ differentiate</div><div class='del'>- * boards based on build levels/parameters, and also in manufacturing to cross</div><div class='del'>- * check "what was programmed in manufacturing" is same as "what firmware</div><div class='del'>- * thinks has been programmed" as there are two layers to translation within</div><div class='del'>- * firmware before the attributes reach this MCDI handler. Some parameters are</div><div class='del'>- * retrieved as part of other commands and therefore not replicated here. See</div><div class='del'>- * GET_VERSION_OUT.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_BOARD_ATTR 0x1c6</div><div class='del'>-#undef MC_CMD_0x1c6_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1c6_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_BOARD_ATTR_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_BOARD_ATTR_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_BOARD_ATTR_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_BOARD_ATTR_OUT_LEN 16</div><div class='del'>-/* Defines board capabilities and validity of attributes returned in this</div><div class='del'>- * response-message.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_OFST 0</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_LBN 0</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_OFST 0</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_LBN 1</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_OFST 0</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_LBN 2</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_WIDTH 1</div><div class='del'>-#define       MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_OFST 4</div><div class='del'>-#define       MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_LEN 4</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_OFST 4</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_LBN 0</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_OFST 4</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_LBN 1</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_OFST 4</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_LBN 16</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_WIDTH 8</div><div class='del'>-/* enum: The FPGA voltage on the adapter can be set to low */</div><div class='del'>-#define          MC_CMD_FPGA_VOLTAGE_LOW 0x0</div><div class='del'>-/* enum: The FPGA voltage on the adapter can be set to regular */</div><div class='del'>-#define          MC_CMD_FPGA_VOLTAGE_REG 0x1</div><div class='del'>-/* enum: The FPGA voltage on the adapter can be set to high */</div><div class='del'>-#define          MC_CMD_FPGA_VOLTAGE_HIGH 0x2</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_OFST 4</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_LBN 24</div><div class='del'>-#define        MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_WIDTH 8</div><div class='del'>-/* An array of cage types on the board */</div><div class='del'>-#define       MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_OFST 8</div><div class='del'>-#define       MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_LEN 1</div><div class='del'>-#define       MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_NUM 8</div><div class='del'>-/* enum: The cages are not known */</div><div class='del'>-#define          MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_UNKNOWN 0x0</div><div class='del'>-/* enum: The cages are SFP/SFP+ */</div><div class='del'>-#define          MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_SFP 0x1</div><div class='del'>-/* enum: The cages are QSFP/QSFP+ */</div><div class='del'>-#define          MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_QSFP 0x2</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_SOC_STATE</div><div class='del'>- * Retrieve current state of the System-on-Chip. This command is valid when</div><div class='del'>- * MC_CMD_GET_BOARD_ATTR:HAS_SOC is set.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_SOC_STATE 0x1c7</div><div class='del'>-#undef MC_CMD_0x1c7_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1c7_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_SOC_STATE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_SOC_STATE_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_SOC_STATE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_SOC_STATE_OUT_LEN 12</div><div class='del'>-/* Status flags for the SoC */</div><div class='del'>-#define       MC_CMD_GET_SOC_STATE_OUT_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_GET_SOC_STATE_OUT_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_OFST 0</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_LBN 0</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_OFST 0</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_LBN 1</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_WIDTH 1</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_OFST 0</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_LBN 2</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_WIDTH 1</div><div class='del'>-/* Status fields for the SoC */</div><div class='del'>-#define       MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_OFST 4</div><div class='del'>-#define       MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_LEN 4</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_OFST 4</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_LBN 0</div><div class='del'>-#define        MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_WIDTH 8</div><div class='del'>-/* enum: Power on (set by SUC on power up) */</div><div class='del'>-#define          MC_CMD_GET_SOC_STATE_OUT_SOC_BOOT 0x0</div><div class='del'>-/* enum: Running bootloader */</div><div class='del'>-#define          MC_CMD_GET_SOC_STATE_OUT_SOC_BOOTLOADER 0x1</div><div class='del'>-/* enum: Bootloader has started OS. OS is booting */</div><div class='del'>-#define          MC_CMD_GET_SOC_STATE_OUT_SOC_OS_START 0x2</div><div class='del'>-/* enum: OS is running */</div><div class='del'>-#define          MC_CMD_GET_SOC_STATE_OUT_SOC_OS_RUNNING 0x3</div><div class='del'>-/* enum: Maintenance OS is running */</div><div class='del'>-#define          MC_CMD_GET_SOC_STATE_OUT_SOC_OS_MAINTENANCE 0x4</div><div class='del'>-/* Number of SoC resets since power on */</div><div class='del'>-#define       MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_OFST 8</div><div class='del'>-#define       MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_CHECK_SCHEDULER_CREDITS</div><div class='ctx'>  * For debugging purposes. For each source and destination node in the hardware</div><div class='ctx'>  * schedulers, check whether the number of credits is as it should be. This</div><div class='hunk'>@@ -25010,76 +22095,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_TXQ_STATS</div><div class='del'>- * Query per-TXQ statistics.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_TXQ_STATS 0x1d5</div><div class='del'>-#undef MC_CMD_0x1d5_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1d5_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TXQ_STATS_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TXQ_STATS_IN_LEN 8</div><div class='del'>-/* Instance of TXQ to retrieve statistics for */</div><div class='del'>-#define       MC_CMD_TXQ_STATS_IN_INSTANCE_OFST 0</div><div class='del'>-#define       MC_CMD_TXQ_STATS_IN_INSTANCE_LEN 4</div><div class='del'>-/* Flags for the request */</div><div class='del'>-#define       MC_CMD_TXQ_STATS_IN_FLAGS_OFST 4</div><div class='del'>-#define       MC_CMD_TXQ_STATS_IN_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_TXQ_STATS_IN_CLEAR_OFST 4</div><div class='del'>-#define        MC_CMD_TXQ_STATS_IN_CLEAR_LBN 0</div><div class='del'>-#define        MC_CMD_TXQ_STATS_IN_CLEAR_WIDTH 1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TXQ_STATS_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_TXQ_STATS_OUT_LENMIN 0</div><div class='del'>-#define    MC_CMD_TXQ_STATS_OUT_LENMAX 248</div><div class='del'>-#define    MC_CMD_TXQ_STATS_OUT_LENMAX_MCDI2 1016</div><div class='del'>-#define    MC_CMD_TXQ_STATS_OUT_LEN(num) (0+8*(num))</div><div class='del'>-#define    MC_CMD_TXQ_STATS_OUT_STATISTICS_NUM(len) (((len)-0)/8)</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_OFST 0</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_LEN 8</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_OFST 0</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_LEN 4</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_LBN 0</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_OFST 4</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_LEN 4</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_LBN 32</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_MINNUM 0</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_MAXNUM 31</div><div class='del'>-#define       MC_CMD_TXQ_STATS_OUT_STATISTICS_MAXNUM_MCDI2 127</div><div class='del'>-#define          MC_CMD_TXQ_STATS_CTPIO_MAX_FILL 0x0 /* enum */</div><div class='del'>-</div><div class='del'>-/* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are</div><div class='del'>- * defined in SF-120734-TC with more information in SF-122717-TC.</div><div class='del'>- */</div><div class='del'>-#define    FUNCTION_PERSONALITY_LEN 4</div><div class='del'>-#define       FUNCTION_PERSONALITY_ID_OFST 0</div><div class='del'>-#define       FUNCTION_PERSONALITY_ID_LEN 4</div><div class='del'>-/* enum: Function has no assigned personality */</div><div class='del'>-#define          FUNCTION_PERSONALITY_NULL 0x0</div><div class='del'>-/* enum: Function has an EF100-style function control window and VI windows</div><div class='del'>- * with both EF100 and vDPA doorbells.</div><div class='del'>- */</div><div class='del'>-#define          FUNCTION_PERSONALITY_EF100 0x1</div><div class='del'>-/* enum: Function has virtio net device configuration registers and doorbells</div><div class='del'>- * for virtio queue pairs.</div><div class='del'>- */</div><div class='del'>-#define          FUNCTION_PERSONALITY_VIRTIO_NET 0x2</div><div class='del'>-/* enum: Function has virtio block device configuration registers and a</div><div class='del'>- * doorbell for a single virtqueue.</div><div class='del'>- */</div><div class='del'>-#define          FUNCTION_PERSONALITY_VIRTIO_BLK 0x3</div><div class='del'>-/* enum: Function is a Xilinx acceleration device - management function */</div><div class='del'>-#define          FUNCTION_PERSONALITY_ACCEL_MGMT 0x4</div><div class='del'>-/* enum: Function is a Xilinx acceleration device - user function */</div><div class='del'>-#define          FUNCTION_PERSONALITY_ACCEL_USR 0x5</div><div class='del'>-#define       FUNCTION_PERSONALITY_ID_LBN 0</div><div class='del'>-#define       FUNCTION_PERSONALITY_ID_WIDTH 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_VIRTIO_GET_FEATURES</div><div class='ctx'>  * Get a list of the virtio features supported by the device.</div><div class='ctx'>  */</div><div class='hunk'>@@ -25162,37 +22177,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_VIRTIO_GET_CAPABILITIES</div><div class='del'>- * Get virtio capabilities supported by the device. Returns general virtio</div><div class='del'>- * capabilities and limitations of the hardware / firmware implementation</div><div class='del'>- * (hardware device as a whole), rather than that of individual configured</div><div class='del'>- * virtio devices. At present, only the absolute maximum number of queues</div><div class='del'>- * allowed on multi-queue devices is returned. Response is expected to be</div><div class='del'>- * extended as necessary in the future.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_VIRTIO_GET_CAPABILITIES 0x1d3</div><div class='del'>-#undef MC_CMD_0x1d3_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1d3_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_VIRTIO_GET_CAPABILITIES_IN msgrequest */</div><div class='del'>-#define    MC_CMD_VIRTIO_GET_CAPABILITIES_IN_LEN 4</div><div class='del'>-/* Type of device to get capabilities for. Matches the device id as defined by</div><div class='del'>- * the virtio spec.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_VIRTIO_GET_CAPABILITIES_IN_DEVICE_ID_OFST 0</div><div class='del'>-#define       MC_CMD_VIRTIO_GET_CAPABILITIES_IN_DEVICE_ID_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               MC_CMD_VIRTIO_GET_FEATURES/MC_CMD_VIRTIO_GET_FEATURES_IN/DEVICE_ID */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_VIRTIO_GET_CAPABILITIES_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_VIRTIO_GET_CAPABILITIES_OUT_LEN 4</div><div class='del'>-/* Maximum number of queues supported for a single device instance */</div><div class='del'>-#define       MC_CMD_VIRTIO_GET_CAPABILITIES_OUT_MAX_QUEUES_OFST 0</div><div class='del'>-#define       MC_CMD_VIRTIO_GET_CAPABILITIES_OUT_MAX_QUEUES_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_VIRTIO_INIT_QUEUE</div><div class='ctx'>  * Create a virtio virtqueue. Fails with EALREADY if the queue already exists.</div><div class='ctx'>  * Fails with ENOSUP if a feature is requested that isn't supported. Fails with</div><div class='hunk'>@@ -25474,866 +22458,6 @@</div><div class='ctx'> #define       PCIE_FUNCTION_INTF_LBN 32</div><div class='ctx'> #define       PCIE_FUNCTION_INTF_WIDTH 32</div><div class='ctx'> </div><div class='del'>-/* QUEUE_ID structuredef: Structure representing an absolute queue identifier</div><div class='del'>- * (absolute VI number + VI relative queue number). On Keystone, a VI can</div><div class='del'>- * contain multiple queues (at present, up to 2), each with separate controls</div><div class='del'>- * for direction. This structure is required to uniquely identify the absolute</div><div class='del'>- * source queue for descriptor proxy functions.</div><div class='del'>- */</div><div class='del'>-#define    QUEUE_ID_LEN 4</div><div class='del'>-/* Absolute VI number */</div><div class='del'>-#define       QUEUE_ID_ABS_VI_OFST 0</div><div class='del'>-#define       QUEUE_ID_ABS_VI_LEN 2</div><div class='del'>-#define       QUEUE_ID_ABS_VI_LBN 0</div><div class='del'>-#define       QUEUE_ID_ABS_VI_WIDTH 16</div><div class='del'>-/* Relative queue number within the VI */</div><div class='del'>-#define       QUEUE_ID_REL_QUEUE_LBN 16</div><div class='del'>-#define       QUEUE_ID_REL_QUEUE_WIDTH 1</div><div class='del'>-#define       QUEUE_ID_RESERVED_LBN 17</div><div class='del'>-#define       QUEUE_ID_RESERVED_WIDTH 15</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_CREATE</div><div class='del'>- * Descriptor proxy functions are abstract devices that forward all request</div><div class='del'>- * submitted to the host PCIe function (descriptors submitted to Virtio or</div><div class='del'>- * EF100 queues) to be handled on another function (most commonly on the</div><div class='del'>- * embedded Application Processor), via EF100 descriptor proxy, memory-to-</div><div class='del'>- * memory and descriptor-to-completion mechanisms. Primary user is Virtio-blk</div><div class='del'>- * subsystem, see SF-122927-TC. This function allocates a new descriptor proxy</div><div class='del'>- * function on the host and assigns a user-defined label. The actual function</div><div class='del'>- * configuration is not persisted until the caller configures it with</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN and commits with</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_COMMIT_IN.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_CREATE 0x172</div><div class='del'>-#undef MC_CMD_0x172_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x172_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_CREATE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_CREATE_IN_LEN 52</div><div class='del'>-/* PCIe Function ID to allocate (as struct PCIE_FUNCTION). Set to</div><div class='del'>- * {PF_ANY,VF_ANY,interface} for "any available function" Set to</div><div class='del'>- * {PF_ANY,VF_NULL,interface} for "any available PF"</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LEN 8</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LBN 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_LEN 2</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_LEN 4</div><div class='del'>-/* The personality to set. The meanings of the personalities are defined in</div><div class='del'>- * SF-120734-TC with more information in SF-122717-TC. At present, we only</div><div class='del'>- * support proxying for VIRTIO_BLK</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_PERSONALITY_OFST 8</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_PERSONALITY_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               FUNCTION_PERSONALITY/ID */</div><div class='del'>-/* User-defined label (zero-terminated ASCII string) to uniquely identify the</div><div class='del'>- * function</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_LABEL_OFST 12</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_IN_LABEL_LEN 40</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_CREATE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_LEN 12</div><div class='del'>-/* Handle to the descriptor proxy function */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_HANDLE_LEN 4</div><div class='del'>-/* Allocated function ID (as struct PCIE_FUNCTION) */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LEN 8</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LBN 32</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_OFST 8</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_LEN 2</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_OFST 8</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_DESTROY</div><div class='del'>- * Remove an existing descriptor proxy function. Underlying function</div><div class='del'>- * personality and configuration reverts back to factory default. Function</div><div class='del'>- * configuration is committed immediately to specified store and any function</div><div class='del'>- * ownership is released.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_DESTROY 0x173</div><div class='del'>-#undef MC_CMD_0x173_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x173_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_DESTROY_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_LEN 44</div><div class='del'>-/* User-defined label (zero-terminated ASCII string) to uniquely identify the</div><div class='del'>- * function</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_LABEL_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_LABEL_LEN 40</div><div class='del'>-/* Store from which to remove function configuration */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_STORE_OFST 40</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_DESTROY_IN_STORE_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               MC_CMD_DESC_PROXY_FUNC_COMMIT/MC_CMD_DESC_PROXY_FUNC_COMMIT_IN/STORE */</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_DESTROY_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_DESTROY_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* VIRTIO_BLK_CONFIG structuredef: Virtio block device configuration. See</div><div class='del'>- * Virtio specification v1.1, Sections 5.2.3 and 6 for definition of feature</div><div class='del'>- * bits. See Virtio specification v1.1, Section 5.2.4 (struct</div><div class='del'>- * virtio_blk_config) for definition of remaining configuration fields</div><div class='del'>- */</div><div class='del'>-#define    VIRTIO_BLK_CONFIG_LEN 68</div><div class='del'>-/* Virtio block device features to advertise, per Virtio 1.1, 5.2.3 and 6 */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_OFST 0</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_LEN 8</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_LO_OFST 0</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_LO_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_LO_LBN 0</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_LO_WIDTH 32</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_HI_OFST 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_HI_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_HI_LBN 32</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_HI_WIDTH 32</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_LBN 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SIZE_MAX_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SIZE_MAX_LBN 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SIZE_MAX_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SEG_MAX_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SEG_MAX_LBN 2</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SEG_MAX_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_GEOMETRY_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_GEOMETRY_LBN 4</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_GEOMETRY_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_RO_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_RO_LBN 5</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_RO_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BLK_SIZE_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BLK_SIZE_LBN 6</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BLK_SIZE_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SCSI_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SCSI_LBN 7</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_SCSI_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_FLUSH_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_FLUSH_LBN 9</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_FLUSH_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_TOPOLOGY_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_TOPOLOGY_LBN 10</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_TOPOLOGY_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_CONFIG_WCE_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_CONFIG_WCE_LBN 11</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_CONFIG_WCE_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_MQ_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_MQ_LBN 12</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_MQ_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_DISCARD_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_DISCARD_LBN 13</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_DISCARD_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_WRITE_ZEROES_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_WRITE_ZEROES_LBN 14</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_WRITE_ZEROES_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_RING_INDIRECT_DESC_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_RING_INDIRECT_DESC_LBN 28</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_RING_INDIRECT_DESC_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_RING_EVENT_IDX_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_RING_EVENT_IDX_LBN 29</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_RING_EVENT_IDX_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_VERSION_1_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_VERSION_1_LBN 32</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_VERSION_1_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_ACCESS_PLATFORM_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_ACCESS_PLATFORM_LBN 33</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_ACCESS_PLATFORM_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_RING_PACKED_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_RING_PACKED_LBN 34</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_RING_PACKED_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_IN_ORDER_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_IN_ORDER_LBN 35</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_IN_ORDER_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_ORDER_PLATFORM_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_ORDER_PLATFORM_LBN 36</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_ORDER_PLATFORM_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_SR_IOV_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_SR_IOV_LBN 37</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_SR_IOV_WIDTH 1</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_NOTIFICATION_DATA_OFST 0</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_NOTIFICATION_DATA_LBN 38</div><div class='del'>-#define        VIRTIO_BLK_CONFIG_VIRTIO_F_NOTIFICATION_DATA_WIDTH 1</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_LBN 0</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_FEATURES_WIDTH 64</div><div class='del'>-/* The capacity of the device (expressed in 512-byte sectors) */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_OFST 8</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_LEN 8</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_LO_OFST 8</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_LO_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_LO_LBN 64</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_LO_WIDTH 32</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_HI_OFST 12</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_HI_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_HI_LBN 96</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_HI_WIDTH 32</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_LBN 64</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CAPACITY_WIDTH 64</div><div class='del'>-/* Maximum size of any single segment. Only valid when VIRTIO_BLK_F_SIZE_MAX is</div><div class='del'>- * set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SIZE_MAX_OFST 16</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SIZE_MAX_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SIZE_MAX_LBN 128</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SIZE_MAX_WIDTH 32</div><div class='del'>-/* Maximum number of segments in a request. Only valid when</div><div class='del'>- * VIRTIO_BLK_F_SEG_MAX is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SEG_MAX_OFST 20</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SEG_MAX_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SEG_MAX_LBN 160</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SEG_MAX_WIDTH 32</div><div class='del'>-/* Disk-style geometry - cylinders. Only valid when VIRTIO_BLK_F_GEOMETRY is</div><div class='del'>- * set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CYLINDERS_OFST 24</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CYLINDERS_LEN 2</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CYLINDERS_LBN 192</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_CYLINDERS_WIDTH 16</div><div class='del'>-/* Disk-style geometry - heads. Only valid when VIRTIO_BLK_F_GEOMETRY is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_HEADS_OFST 26</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_HEADS_LEN 1</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_HEADS_LBN 208</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_HEADS_WIDTH 8</div><div class='del'>-/* Disk-style geometry - sectors. Only valid when VIRTIO_BLK_F_GEOMETRY is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SECTORS_OFST 27</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SECTORS_LEN 1</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SECTORS_LBN 216</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_SECTORS_WIDTH 8</div><div class='del'>-/* Block size of disk. Only valid when VIRTIO_BLK_F_BLK_SIZE is set. */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_BLK_SIZE_OFST 28</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_BLK_SIZE_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_BLK_SIZE_LBN 224</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_BLK_SIZE_WIDTH 32</div><div class='del'>-/* Block topology - number of logical blocks per physical block (log2). Only</div><div class='del'>- * valid when VIRTIO_BLK_F_TOPOLOGY is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_OFST 32</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_LEN 1</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_LBN 256</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_PHYSICAL_BLOCK_EXP_WIDTH 8</div><div class='del'>-/* Block topology - offset of first aligned logical block. Only valid when</div><div class='del'>- * VIRTIO_BLK_F_TOPOLOGY is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_OFST 33</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_LEN 1</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_LBN 264</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_ALIGNMENT_OFFSET_WIDTH 8</div><div class='del'>-/* Block topology - suggested minimum I/O size in blocks. Only valid when</div><div class='del'>- * VIRTIO_BLK_F_TOPOLOGY is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MIN_IO_SIZE_OFST 34</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MIN_IO_SIZE_LEN 2</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MIN_IO_SIZE_LBN 272</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MIN_IO_SIZE_WIDTH 16</div><div class='del'>-/* Block topology - optimal (suggested maximum) I/O size in blocks. Only valid</div><div class='del'>- * when VIRTIO_BLK_F_TOPOLOGY is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_OPT_IO_SIZE_OFST 36</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_OPT_IO_SIZE_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_OPT_IO_SIZE_LBN 288</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_OPT_IO_SIZE_WIDTH 32</div><div class='del'>-/* Unused, set to zero. Note that virtio_blk_config.writeback is volatile and</div><div class='del'>- * not carried in config data.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_UNUSED0_OFST 40</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_UNUSED0_LEN 2</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_UNUSED0_LBN 320</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_UNUSED0_WIDTH 16</div><div class='del'>-/* Number of queues. Only valid if the VIRTIO_BLK_F_MQ feature is negotiated.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_NUM_QUEUES_OFST 42</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_NUM_QUEUES_LEN 2</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_NUM_QUEUES_LBN 336</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_NUM_QUEUES_WIDTH 16</div><div class='del'>-/* Maximum discard sectors size, in 512-byte units. Only valid if</div><div class='del'>- * VIRTIO_BLK_F_DISCARD is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_OFST 44</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_LBN 352</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_DISCARD_SECTORS_WIDTH 32</div><div class='del'>-/* Maximum discard segment number. Only valid if VIRTIO_BLK_F_DISCARD is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_OFST 48</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_LBN 384</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_DISCARD_SEG_WIDTH 32</div><div class='del'>-/* Discard sector alignment, in 512-byte units. Only valid if</div><div class='del'>- * VIRTIO_BLK_F_DISCARD is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_OFST 52</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_LBN 416</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_DISCARD_SECTOR_ALIGNMENT_WIDTH 32</div><div class='del'>-/* Maximum write zeroes sectors size, in 512-byte units. Only valid if</div><div class='del'>- * VIRTIO_BLK_F_WRITE_ZEROES is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_OFST 56</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_LBN 448</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SECTORS_WIDTH 32</div><div class='del'>-/* Maximum write zeroes segment number. Only valid if VIRTIO_BLK_F_WRITE_ZEROES</div><div class='del'>- * is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_OFST 60</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_LEN 4</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_LBN 480</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_MAX_WRITE_ZEROES_SEG_WIDTH 32</div><div class='del'>-/* Write zeroes request can result in deallocating one or more sectors. Only</div><div class='del'>- * valid if VIRTIO_BLK_F_WRITE_ZEROES is set.</div><div class='del'>- */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_OFST 64</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_LEN 1</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_LBN 512</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_WRITE_ZEROES_MAY_UNMAP_WIDTH 8</div><div class='del'>-/* Unused, set to zero. */</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_UNUSED1_OFST 65</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_UNUSED1_LEN 3</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_UNUSED1_LBN 520</div><div class='del'>-#define       VIRTIO_BLK_CONFIG_UNUSED1_WIDTH 24</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_CONFIG_SET</div><div class='del'>- * Set configuration for an existing descriptor proxy function. Configuration</div><div class='del'>- * data must match function personality. The actual function configuration is</div><div class='del'>- * not persisted until the caller commits with MC_CMD_DESC_PROXY_FUNC_COMMIT_IN</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET 0x174</div><div class='del'>-#undef MC_CMD_0x174_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x174_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LENMIN 20</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_LEN(num) (20+1*(num))</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_NUM(len) (((len)-20)/1)</div><div class='del'>-/* Handle to descriptor proxy function (as returned by</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_OPEN)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_HANDLE_LEN 4</div><div class='del'>-/* Reserved for future extension, set to zero. */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_RESERVED_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_RESERVED_LEN 16</div><div class='del'>-/* Configuration data. Format of configuration data is determined implicitly</div><div class='del'>- * from function personality referred to by HANDLE. Currently, only supported</div><div class='del'>- * format is VIRTIO_BLK_CONFIG.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_OFST 20</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_LEN 1</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_MINNUM 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_MAXNUM 232</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_IN_CONFIG_MAXNUM_MCDI2 1000</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_COMMIT</div><div class='del'>- * Commit function configuration to non-volatile or volatile store. Once</div><div class='del'>- * configuration is applied to hardware (which may happen immediately or on</div><div class='del'>- * next function/device reset) a DESC_PROXY_FUNC_CONFIG_SET MCDI event will be</div><div class='del'>- * delivered to callers MCDI event queue.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_COMMIT 0x175</div><div class='del'>-#undef MC_CMD_0x175_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x175_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_COMMIT_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_LEN 8</div><div class='del'>-/* Handle to descriptor proxy function (as returned by</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_OPEN)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_HANDLE_LEN 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_STORE_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_STORE_LEN 4</div><div class='del'>-/* enum: Store into non-volatile (dynamic) config */</div><div class='del'>-#define          MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_NON_VOLATILE 0x0</div><div class='del'>-/* enum: Store into volatile (ephemeral) config */</div><div class='del'>-#define          MC_CMD_DESC_PROXY_FUNC_COMMIT_IN_VOLATILE 0x1</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT_LEN 4</div><div class='del'>-/* Generation count to be delivered in an event once configuration becomes live</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT_CONFIG_GENERATION_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_COMMIT_OUT_CONFIG_GENERATION_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_OPEN</div><div class='del'>- * Retrieve a handle for an existing descriptor proxy function. Returns an</div><div class='del'>- * integer handle, valid until function is deallocated, MC rebooted or power-</div><div class='del'>- * cycle. Returns ENODEV if no function with given label exists.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_OPEN 0x176</div><div class='del'>-#undef MC_CMD_0x176_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x176_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_OPEN_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_OPEN_IN_LEN 40</div><div class='del'>-/* User-defined label (zero-terminated ASCII string) to uniquely identify the</div><div class='del'>- * function</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_IN_LABEL_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_IN_LABEL_LEN 40</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_OPEN_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LENMIN 40</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LEN(num) (40+1*(num))</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_NUM(len) (((len)-40)/1)</div><div class='del'>-/* Handle to the descriptor proxy function */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_HANDLE_LEN 4</div><div class='del'>-/* PCIe Function ID (as struct PCIE_FUNCTION) */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LEN 8</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LEN 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LBN 32</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_OFST 8</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_LEN 2</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_OFST 8</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_LEN 4</div><div class='del'>-/* Function personality */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_OFST 12</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               FUNCTION_PERSONALITY/ID */</div><div class='del'>-/* Function configuration state */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_STATUS_OFST 16</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_STATUS_LEN 4</div><div class='del'>-/* enum: Function configuration is visible to the host (live) */</div><div class='del'>-#define          MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_LIVE 0x0</div><div class='del'>-/* enum: Function configuration is pending reset */</div><div class='del'>-#define          MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PENDING 0x1</div><div class='del'>-/* enum: Function configuration is missing (created, but no configuration</div><div class='del'>- * committed)</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_UNCONFIGURED 0x2</div><div class='del'>-/* Generation count to be delivered in an event once the configuration becomes</div><div class='del'>- * live (if status is "pending")</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_GENERATION_OFST 20</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_GENERATION_LEN 4</div><div class='del'>-/* Reserved for future extension, set to zero. */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_RESERVED_OFST 24</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_RESERVED_LEN 16</div><div class='del'>-/* Configuration data corresponding to function personality. Currently, only</div><div class='del'>- * supported format is VIRTIO_BLK_CONFIG. Not valid if status is UNCONFIGURED.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_OFST 40</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_LEN 1</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_MINNUM 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_MAXNUM 212</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_CONFIG_MAXNUM_MCDI2 980</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_CLOSE</div><div class='del'>- * Releases a handle for an open descriptor proxy function. If proxying was</div><div class='del'>- * enabled on the device, the caller is expected to gracefully stop it using</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_DISABLE prior to calling this function. Closing an</div><div class='del'>- * active device without disabling proxying will result in forced close, which</div><div class='del'>- * will put the device into a failed state and signal the host driver of the</div><div class='del'>- * error (for virtio, DEVICE_NEEDS_RESET flag would be set on the host side)</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_CLOSE 0x1a1</div><div class='del'>-#undef MC_CMD_0x1a1_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1a1_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_CLOSE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_CLOSE_IN_LEN 4</div><div class='del'>-/* Handle to the descriptor proxy function */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CLOSE_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_CLOSE_IN_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_CLOSE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_CLOSE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-/* DESC_PROXY_FUNC_MAP structuredef */</div><div class='del'>-#define    DESC_PROXY_FUNC_MAP_LEN 52</div><div class='del'>-/* PCIe function ID (as struct PCIE_FUNCTION) */</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_OFST 0</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_LEN 8</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_LO_OFST 0</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_LO_LEN 4</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_LO_LBN 0</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_LO_WIDTH 32</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_HI_OFST 4</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_HI_LEN 4</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_HI_LBN 32</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_LBN 0</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_WIDTH 64</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_PF_WIDTH 16</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_VF_OFST 2</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_VF_LEN 2</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_VF_LBN 16</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_VF_WIDTH 16</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_INTF_OFST 4</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_INTF_LEN 4</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_INTF_LBN 32</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_FUNC_INTF_WIDTH 32</div><div class='del'>-/* Function personality */</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_PERSONALITY_OFST 8</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_PERSONALITY_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               FUNCTION_PERSONALITY/ID */</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_PERSONALITY_LBN 64</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_PERSONALITY_WIDTH 32</div><div class='del'>-/* User-defined label (zero-terminated ASCII string) to uniquely identify the</div><div class='del'>- * function</div><div class='del'>- */</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_LABEL_OFST 12</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_LABEL_LEN 40</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_LABEL_LBN 96</div><div class='del'>-#define       DESC_PROXY_FUNC_MAP_LABEL_WIDTH 320</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_ENUM</div><div class='del'>- * Enumerate existing descriptor proxy functions</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_ENUM 0x177</div><div class='del'>-#undef MC_CMD_0x177_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x177_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_ENUM_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_ENUM_IN_LEN 4</div><div class='del'>-/* Starting index, set to 0 on first request. See</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_ENUM_OUT/FLAGS.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENUM_IN_START_IDX_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENUM_IN_START_IDX_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_ENUM_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LENMIN 4</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LENMAX 212</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LENMAX_MCDI2 992</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_LEN(num) (4+52*(num))</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_NUM(len) (((len)-4)/52)</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FLAGS_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FLAGS_LEN 4</div><div class='del'>-#define        MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_MORE_DATA_OFST 0</div><div class='del'>-#define        MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_MORE_DATA_LBN 0</div><div class='del'>-#define        MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_MORE_DATA_WIDTH 1</div><div class='del'>-/* Function map, as array of DESC_PROXY_FUNC_MAP */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_LEN 52</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MINNUM 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MAXNUM 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MAXNUM_MCDI2 19</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_ENABLE</div><div class='del'>- * Enable descriptor proxying for function into target event queue. Returns VI</div><div class='del'>- * allocation info for the proxy source function, so that the caller can map</div><div class='del'>- * absolute VI IDs from descriptor proxy events back to the originating</div><div class='del'>- * function. This is a legacy function that only supports single queue proxy</div><div class='del'>- * devices. It is also limited in that it can only be called after host driver</div><div class='del'>- * attach (once VI allocation is known) and will return MC_CMD_ERR_ENOTCONN</div><div class='del'>- * otherwise. For new code, see MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE which</div><div class='del'>- * supports multi-queue devices and has no dependency on host driver attach.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_ENABLE 0x178</div><div class='del'>-#undef MC_CMD_0x178_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x178_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_ENABLE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_LEN 8</div><div class='del'>-/* Handle to descriptor proxy function (as returned by</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_OPEN)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_HANDLE_LEN 4</div><div class='del'>-/* Descriptor proxy sink queue (caller function relative). Must be extended</div><div class='del'>- * width event queue</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_TARGET_EVQ_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_IN_TARGET_EVQ_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_LEN 8</div><div class='del'>-/* The number of VIs allocated on the function */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_COUNT_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_COUNT_LEN 4</div><div class='del'>-/* The base absolute VI number allocated to the function. */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_BASE_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_OUT_VI_BASE_LEN 4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE</div><div class='del'>- * Enable descriptor proxying for a source queue on a host function into target</div><div class='del'>- * event queue. Source queue number is a relative virtqueue number on the</div><div class='del'>- * source function (0 to max_virtqueues-1). For a multi-queue device, the</div><div class='del'>- * caller must enable all source queues individually. To retrieve absolute VI</div><div class='del'>- * information for the source function (so that VI IDs from descriptor proxy</div><div class='del'>- * events can be mapped back to source function / queue) see</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE 0x1d0</div><div class='del'>-#undef MC_CMD_0x1d0_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1d0_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_LEN 12</div><div class='del'>-/* Handle to descriptor proxy function (as returned by</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_OPEN)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_HANDLE_LEN 4</div><div class='del'>-/* Source relative queue number to enable proxying on */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_SOURCE_QUEUE_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_SOURCE_QUEUE_LEN 4</div><div class='del'>-/* Descriptor proxy sink queue (caller function relative). Must be extended</div><div class='del'>- * width event queue</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_TARGET_EVQ_OFST 8</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_IN_TARGET_EVQ_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_ENABLE_QUEUE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_DISABLE</div><div class='del'>- * Disable descriptor proxying for function. For multi-queue functions,</div><div class='del'>- * disables all queues.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_DISABLE 0x179</div><div class='del'>-#undef MC_CMD_0x179_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x179_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_DISABLE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_DISABLE_IN_LEN 4</div><div class='del'>-/* Handle to descriptor proxy function (as returned by</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_OPEN)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_DISABLE_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_DISABLE_IN_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_DISABLE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_DISABLE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE</div><div class='del'>- * Disable descriptor proxying for a specific source queue on a function.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE 0x1d1</div><div class='del'>-#undef MC_CMD_0x1d1_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1d1_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_LEN 8</div><div class='del'>-/* Handle to descriptor proxy function (as returned by</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_OPEN)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_HANDLE_LEN 4</div><div class='del'>-/* Source relative queue number to disable proxying on */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_SOURCE_QUEUE_OFST 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_IN_SOURCE_QUEUE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_DISABLE_QUEUE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_DESC_PROXY_GET_VI_INFO</div><div class='del'>- * Returns absolute VI allocation information for the descriptor proxy source</div><div class='del'>- * function referenced by HANDLE, so that the caller can map absolute VI IDs</div><div class='del'>- * from descriptor proxy events back to the originating function and queue. The</div><div class='del'>- * call is only valid after the host driver for the source function has</div><div class='del'>- * attached (after receiving a driver attach event for the descriptor proxy</div><div class='del'>- * function) and will fail with ENOTCONN otherwise.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_DESC_PROXY_GET_VI_INFO 0x1d2</div><div class='del'>-#undef MC_CMD_0x1d2_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1d2_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_GET_VI_INFO_IN msgrequest */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_GET_VI_INFO_IN_LEN 4</div><div class='del'>-/* Handle to descriptor proxy function (as returned by</div><div class='del'>- * MC_CMD_DESC_PROXY_FUNC_OPEN)</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_GET_VI_INFO_IN_HANDLE_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_GET_VI_INFO_IN_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LENMIN 0</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_LEN(num) (0+4*(num))</div><div class='del'>-#define    MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_NUM(len) (((len)-0)/4)</div><div class='del'>-/* VI information (VI ID + VI relative queue number) for each of the source</div><div class='del'>- * queues (in order from 0 to max_virtqueues-1), as array of QUEUE_ID</div><div class='del'>- * structures.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_LEN 4</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MINNUM 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MAXNUM 63</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MAXNUM_MCDI2 255</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_ABS_VI_OFST 0</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_ABS_VI_LEN 2</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_REL_QUEUE_LBN 16</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_REL_QUEUE_WIDTH 1</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_RESERVED_LBN 17</div><div class='del'>-#define       MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_RESERVED_WIDTH 15</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_GET_ADDR_SPC_ID</div><div class='del'>- * Get Address space identifier for use in mem2mem descriptors for a given</div><div class='del'>- * target. See SF-120734-TC for details on ADDR_SPC_IDs and mem2mem</div><div class='del'>- * descriptors.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_GET_ADDR_SPC_ID 0x1a0</div><div class='del'>-#undef MC_CMD_0x1a0_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1a0_PRIVILEGE_CTG SRIOV_CTG_ADMIN</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_ADDR_SPC_ID_IN msgrequest */</div><div class='del'>-#define    MC_CMD_GET_ADDR_SPC_ID_IN_LEN 16</div><div class='del'>-/* Resource type to get ADDR_SPC_ID for */</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_TYPE_OFST 0</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_TYPE_LEN 4</div><div class='del'>-/* enum: Address space ID for host/AP memory DMA over the same interface this</div><div class='del'>- * MCDI was called on</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_GET_ADDR_SPC_ID_IN_SELF 0x0</div><div class='del'>-/* enum: Address space ID for host/AP memory DMA via PCI interface and function</div><div class='del'>- * specified by FUNC</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_GET_ADDR_SPC_ID_IN_PCI_FUNC 0x1</div><div class='del'>-/* enum: Address space ID for host/AP memory DMA via PCI interface and function</div><div class='del'>- * specified by FUNC with PASID value specified by PASID</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_GET_ADDR_SPC_ID_IN_PCI_FUNC_PASID 0x2</div><div class='del'>-/* enum: Address space ID for host/AP memory DMA via PCI interface and function</div><div class='del'>- * specified by FUNC with PASID value of relative VI specified by VI</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_GET_ADDR_SPC_ID_IN_REL_VI 0x3</div><div class='del'>-/* enum: Address space ID for host/AP memory DMA via PCI interface, function</div><div class='del'>- * and PASID value of absolute VI specified by VI</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_GET_ADDR_SPC_ID_IN_ABS_VI 0x4</div><div class='del'>-/* enum: Address space ID for host memory DMA via PCI interface and function of</div><div class='del'>- * descriptor proxy function specified by HANDLE</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_GET_ADDR_SPC_ID_IN_DESC_PROXY_HANDLE 0x5</div><div class='del'>-/* enum: Address space ID for DMA to/from MC memory */</div><div class='del'>-#define          MC_CMD_GET_ADDR_SPC_ID_IN_MC_MEM 0x6</div><div class='del'>-/* enum: Address space ID for DMA to/from other SmartNIC memory (on-chip, DDR)</div><div class='del'>- */</div><div class='del'>-#define          MC_CMD_GET_ADDR_SPC_ID_IN_NIC_MEM 0x7</div><div class='del'>-/* PCIe Function ID (as struct PCIE_FUNCTION). Only valid if TYPE is PCI_FUNC,</div><div class='del'>- * PCI_FUNC_PASID or REL_VI.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_OFST 4</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LEN 8</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_OFST 4</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LEN 4</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LBN 32</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_OFST 8</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_LEN 2</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_OFST 8</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_LEN 4</div><div class='del'>-/* PASID value. Only valid if TYPE is PCI_FUNC_PASID. */</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_PASID_OFST 12</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_PASID_LEN 4</div><div class='del'>-/* Relative or absolute VI number. Only valid if TYPE is REL_VI or ABS_VI */</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_VI_OFST 12</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_VI_LEN 4</div><div class='del'>-/* Descriptor proxy function handle. Only valid if TYPE is DESC_PROXY_HANDLE.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_HANDLE_OFST 4</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_IN_HANDLE_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_GET_ADDR_SPC_ID_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_GET_ADDR_SPC_ID_OUT_LEN 8</div><div class='del'>-/* Address Space ID for the requested target. Only the lower 36 bits are valid</div><div class='del'>- * in the current SmartNIC implementation.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_OFST 0</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LEN 8</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_OFST 0</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LEN 4</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LBN 0</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_WIDTH 32</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_OFST 4</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LEN 4</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LBN 32</div><div class='del'>-#define       MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_WIDTH 32</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_GET_CLIENT_HANDLE</div><div class='hunk'>@@ -26359,10 +22483,11 @@</div><div class='ctx'>  * INTF=CALLER, PF=PF_NULL, VF=... to refer to a VF child of the calling PF or</div><div class='ctx'>  * a sibling VF of the calling VF. - INTF=CALLER, PF=..., VF=VF_NULL to refer</div><div class='ctx'>  * to a PF on the calling interface - INTF=CALLER, PF=..., VF=... to refer to a</div><div class='del'>- * VF on the calling interface - INTF=..., PF=..., VF=VF_NULL to refer to a PF</div><div class='add'>+ * VF on the calling interface - INTF=..., PF=PF_NULL, VF=VF_NULL to refer to</div><div class='add'>+ * the named interface itself - INTF=..., PF=..., VF=VF_NULL to refer to a PF</div><div class='ctx'>  * on a named interface - INTF=..., PF=..., VF=... to refer to a VF on a named</div><div class='ctx'>  * interface where ... refers to a small integer for the VF/PF fields, and to</div><div class='del'>- * values from the PCIE_INTERFACE enum for for the INTF field. It's only</div><div class='add'>+ * values from the PCIE_INTERFACE enum for the INTF field. It's only</div><div class='ctx'>  * meaningful to use INTF=CALLER within a structure that's an argument to</div><div class='ctx'>  * MC_CMD_DEVEL_GET_CLIENT_HANDLE.</div><div class='ctx'>  */</div><div class='hunk'>@@ -26380,6 +22505,7 @@</div><div class='ctx'>  * backwards compatibility only, callers should use PCIE_INTERFACE_CALLER.</div><div class='ctx'>  */</div><div class='ctx'> #define          MC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff</div><div class='add'>+/* See structuredef: PCIE_FUNCTION */</div><div class='ctx'> #define       MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4</div><div class='ctx'> #define       MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2</div><div class='ctx'> #define       MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6</div><div class='hunk'>@@ -27350,7 +23476,7 @@</div><div class='ctx'> /* MAE_MPORT_SELECTOR structuredef: MPORTS are identified by an opaque unsigned</div><div class='ctx'>  * integer value (mport_id) that is guaranteed to be representable within</div><div class='ctx'>  * 32-bits or within any NIC interface field that needs store the value</div><div class='del'>- * (whichever is narrowers). This selector structure provides a stable way to</div><div class='add'>+ * (whichever is narrower). This selector structure provides a stable way to</div><div class='ctx'>  * refer to m-ports.</div><div class='ctx'>  */</div><div class='ctx'> #define    MAE_MPORT_SELECTOR_LEN 4</div><div class='hunk'>@@ -27425,10 +23551,22 @@</div><div class='ctx'> #define       MAE_MPORT_SELECTOR_FLAT_WIDTH 32</div><div class='ctx'> </div><div class='ctx'> /* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or</div><div class='del'>- * virtual network port by MAE port and link end</div><div class='add'>+ * virtual network port by MAE port and link end. Intended to be used by</div><div class='add'>+ * network port MCDI commands. Setting FLAT to MAE_LINK_ENDPOINT_COMPAT is</div><div class='add'>+ * equivalent to using the previous version of the command. Not all possible</div><div class='add'>+ * combinations of MPORT_END and MPORT_SELECTOR in MAE_LINK_ENDPOINT_SELECTOR</div><div class='add'>+ * will work in all circumstances. 1. Some will always work (e.g. a VF can</div><div class='add'>+ * always address its logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC),</div><div class='add'>+ * 2. Some are not meaningful and will always fail with EINVAL (e.g. attempting</div><div class='add'>+ * to address the VNIC end of a link to a physical port), 3. Some are</div><div class='add'>+ * meaningful but require the MCDI client to have the required permission and</div><div class='add'>+ * fail with EPERM otherwise (e.g. trying to set the MAC on a VF the caller</div><div class='add'>+ * cannot administer), and 4. Some could be implementation-specific and fail</div><div class='add'>+ * with ENOTSUP if not available (no examples exist right now). See</div><div class='add'>+ * SF-123581-TC section 4.3 for more details.</div><div class='ctx'>  */</div><div class='ctx'> #define    MAE_LINK_ENDPOINT_SELECTOR_LEN 8</div><div class='del'>-/* The MAE MPORT of interest */</div><div class='add'>+/* Identifier for the MAE MPORT of interest */</div><div class='ctx'> #define       MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0</div><div class='ctx'> #define       MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4</div><div class='ctx'> #define       MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0</div><div class='hunk'>@@ -27829,6 +23967,8 @@</div><div class='ctx'> #define       MC_CMD_MAE_COUNTER_ALLOC_OUT_COUNTER_ID_MAXNUM_MCDI2 253</div><div class='ctx'> /* enum: A counter ID that is guaranteed never to represent a real counter */</div><div class='ctx'> #define          MC_CMD_MAE_COUNTER_ALLOC_OUT_COUNTER_ID_NULL 0xffffffff</div><div class='add'>+/*            Other enum values, see field(s): */</div><div class='add'>+/*               MAE_COUNTER_ID */</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='hunk'>@@ -28266,6 +24406,24 @@</div><div class='ctx'> #define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0</div><div class='ctx'> #define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14</div><div class='ctx'> #define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_LBN 15</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_LBN 16</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_LBN 18</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_LBN 19</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_LBN 20</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_WIDTH 1</div><div class='ctx'> /* If VLAN_PUSH &gt;= 1, TCI value to be inserted as outermost VLAN. */</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2</div><div class='hunk'>@@ -28291,19 +24449,23 @@</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_IN_DELIVER_OFST 20</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_IN_DELIVER_LEN 4</div><div class='ctx'> /* Allows an action set to trigger several counter updates. Set to</div><div class='del'>- * COUNTER_LIST_ID_NULL to request no counter action.</div><div class='add'>+ * MAE_COUNTER_ID_NULL to request no counter action.</div><div class='ctx'>  */</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID_OFST 24</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID_LEN 4</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MAE_COUNTER_ID */</div><div class='ctx'> /* If a driver only wished to update one counter within this action set, then</div><div class='ctx'>  * it can supply a COUNTER_ID instead of allocating a single-element counter</div><div class='ctx'>  * list. The ID must have been allocated with COUNTER_TYPE=AR. This field</div><div class='del'>- * should be set to COUNTER_ID_NULL if this behaviour is not required. It is</div><div class='del'>- * not valid to supply a non-NULL value for both COUNTER_LIST_ID and</div><div class='add'>+ * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It</div><div class='add'>+ * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and</div><div class='ctx'>  * COUNTER_ID.</div><div class='ctx'>  */</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_ID_OFST 28</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_ID_LEN 4</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MAE_COUNTER_ID */</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_IN_MARK_VALUE_OFST 32</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_IN_MARK_VALUE_LEN 4</div><div class='ctx'> /* Set to MAC_ID_NULL to request no source MAC replacement. */</div><div class='hunk'>@@ -28347,6 +24509,24 @@</div><div class='ctx'> #define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0</div><div class='ctx'> #define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14</div><div class='ctx'> #define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_LBN 15</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_LBN 16</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_LBN 18</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_LBN 19</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_LBN 20</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_WIDTH 1</div><div class='ctx'> /* If VLAN_PUSH &gt;= 1, TCI value to be inserted as outermost VLAN. */</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2</div><div class='hunk'>@@ -28372,19 +24552,23 @@</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4</div><div class='ctx'> /* Allows an action set to trigger several counter updates. Set to</div><div class='del'>- * COUNTER_LIST_ID_NULL to request no counter action.</div><div class='add'>+ * MAE_COUNTER_ID_NULL to request no counter action.</div><div class='ctx'>  */</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MAE_COUNTER_ID */</div><div class='ctx'> /* If a driver only wished to update one counter within this action set, then</div><div class='ctx'>  * it can supply a COUNTER_ID instead of allocating a single-element counter</div><div class='ctx'>  * list. The ID must have been allocated with COUNTER_TYPE=AR. This field</div><div class='del'>- * should be set to COUNTER_ID_NULL if this behaviour is not required. It is</div><div class='del'>- * not valid to supply a non-NULL value for both COUNTER_LIST_ID and</div><div class='add'>+ * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It</div><div class='add'>+ * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and</div><div class='ctx'>  * COUNTER_ID.</div><div class='ctx'>  */</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MAE_COUNTER_ID */</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32</div><div class='ctx'> #define       MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4</div><div class='ctx'> /* Set to MAC_ID_NULL to request no source MAC replacement. */</div><div class='hunk'>@@ -28437,6 +24621,172 @@</div><div class='ctx'> #define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6</div><div class='ctx'> #define        MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN msgrequest: Only supported if</div><div class='add'>+ * MAE_ACTION_SET_ALLOC_V3_SUPPORTED is advertised in</div><div class='add'>+ * MC_CMD_GET_CAPABILITIES_V10_OUT.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LEN 53</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAGS_OFST 0</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAGS_LEN 4</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_LBN 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_WIDTH 2</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_LBN 4</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_WIDTH 2</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_LBN 8</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_LBN 9</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_LBN 10</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_LBN 11</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_LBN 12</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_LBN 13</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_LBN 14</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_LBN 15</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_LBN 16</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_LBN 18</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_LBN 19</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_OFST 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_LBN 20</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_WIDTH 1</div><div class='add'>+/* If VLAN_PUSH &gt;= 1, TCI value to be inserted as outermost VLAN. */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_TCI_BE_OFST 4</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_TCI_BE_LEN 2</div><div class='add'>+/* If VLAN_PUSH &gt;= 1, TPID value to be inserted as outermost VLAN. */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_PROTO_BE_OFST 6</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_PROTO_BE_LEN 2</div><div class='add'>+/* If VLAN_PUSH == 2, inner TCI value to be inserted. */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_TCI_BE_OFST 8</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_TCI_BE_LEN 2</div><div class='add'>+/* If VLAN_PUSH == 2, inner TPID value to be inserted. */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_PROTO_BE_OFST 10</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_PROTO_BE_LEN 2</div><div class='add'>+/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RSVD_OFST 12</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RSVD_LEN 4</div><div class='add'>+/* Set to ENCAP_HEADER_ID_NULL to request no encap action */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ENCAP_HEADER_ID_OFST 16</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ENCAP_HEADER_ID_LEN 4</div><div class='add'>+/* An m-port selector identifying the m-port that the modified packet should be</div><div class='add'>+ * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the</div><div class='add'>+ * packet.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DELIVER_OFST 20</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DELIVER_LEN 4</div><div class='add'>+/* Allows an action set to trigger several counter updates. Set to</div><div class='add'>+ * MAE_COUNTER_ID_NULL to request no counter action.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_LIST_ID_OFST 24</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_LIST_ID_LEN 4</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MAE_COUNTER_ID */</div><div class='add'>+/* If a driver only wished to update one counter within this action set, then</div><div class='add'>+ * it can supply a COUNTER_ID instead of allocating a single-element counter</div><div class='add'>+ * list. The ID must have been allocated with COUNTER_TYPE=AR. This field</div><div class='add'>+ * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It</div><div class='add'>+ * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and</div><div class='add'>+ * COUNTER_ID.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_ID_OFST 28</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_ID_LEN 4</div><div class='add'>+/*            Enum values, see field(s): */</div><div class='add'>+/*               MAE_COUNTER_ID */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_VALUE_OFST 32</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_VALUE_LEN 4</div><div class='add'>+/* Set to MAC_ID_NULL to request no source MAC replacement. */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SRC_MAC_ID_OFST 36</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SRC_MAC_ID_LEN 4</div><div class='add'>+/* Set to MAC_ID_NULL to request no destination MAC replacement. */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DST_MAC_ID_OFST 40</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DST_MAC_ID_LEN 4</div><div class='add'>+/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_REPORTED_SRC_MPORT_OFST 44</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_REPORTED_SRC_MPORT_LEN 4</div><div class='add'>+/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits</div><div class='add'>+ * within IPv4 and IPv6 headers.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_CONTROL_OFST 48</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_CONTROL_LEN 2</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_OFST 48</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_LBN 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_OFST 48</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_LBN 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_OFST 48</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_LBN 2</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_OFST 48</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_LBN 3</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_WIDTH 6</div><div class='add'>+/* Actions for modifying the Explicit Congestion Notification (ECN) bits within</div><div class='add'>+ * IPv4 and IPv6 headers.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_CONTROL_OFST 50</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_CONTROL_LEN 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_OFST 50</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_LBN 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_OFST 50</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_LBN 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_OFST 50</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_LBN 2</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_OFST 50</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_LBN 3</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_WIDTH 2</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_OFST 50</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_LBN 5</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_OFST 50</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_LBN 6</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_WIDTH 1</div><div class='add'>+/* Actions for overwriting CH_ROUTE subfields. */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OVERWRITE_OFST 51</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OVERWRITE_LEN 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_OFST 51</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_LBN 0</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_OFST 51</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_LBN 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_OFST 51</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_LBN 2</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_WIDTH 1</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_OFST 51</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_LBN 3</div><div class='add'>+#define        MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_WIDTH 1</div><div class='add'>+/* Override outgoing CH_VC to network port for DO_SET_NET_CHAN action. Cannot</div><div class='add'>+ * be used in conjunction with DO_SET_SRC_MPORT action.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_NET_CHAN_OFST 52</div><div class='add'>+#define       MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_NET_CHAN_LEN 1</div><div class='add'>+</div><div class='ctx'> /* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4</div><div class='ctx'> /* The MSB of the AS_ID is guaranteed to be clear if the ID is not</div><div class='hunk'>@@ -28680,58 +25030,6 @@</div><div class='ctx'> #define       MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID_MAXNUM 32</div><div class='ctx'> #define       MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID_MAXNUM_MCDI2 32</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_MAE_OUTER_RULE_UPDATE</div><div class='del'>- * Atomically change the response of an Outer Rule.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_MAE_OUTER_RULE_UPDATE 0x17d</div><div class='del'>-#undef MC_CMD_0x17d_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x17d_PRIVILEGE_CTG SRIOV_CTG_MAE</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MAE_OUTER_RULE_UPDATE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_MAE_OUTER_RULE_UPDATE_IN_LEN 16</div><div class='del'>-/* ID of outer rule to update */</div><div class='del'>-#define       MC_CMD_MAE_OUTER_RULE_UPDATE_IN_OR_ID_OFST 0</div><div class='del'>-#define       MC_CMD_MAE_OUTER_RULE_UPDATE_IN_OR_ID_LEN 4</div><div class='del'>-/* Packets matching the rule will be parsed with this encapsulation. */</div><div class='del'>-#define       MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ENCAP_TYPE_OFST 4</div><div class='del'>-#define       MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ENCAP_TYPE_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               MAE_MCDI_ENCAP_TYPE */</div><div class='del'>-/* This field controls the actions that are performed when a rule is hit. */</div><div class='del'>-#define       MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ACTION_CONTROL_OFST 8</div><div class='del'>-#define       MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ACTION_CONTROL_LEN 4</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_OFST 8</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_LBN 0</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_WIDTH 1</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_OFST 8</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_LBN 1</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_WIDTH 2</div><div class='del'>-/*             Enum values, see field(s): */</div><div class='del'>-/*                MAE_CT_VNI_MODE */</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_OFST 8</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_LBN 3</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_WIDTH 1</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_OFST 8</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_LBN 4</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_WIDTH 1</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_OFST 8</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_LBN 8</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_WIDTH 8</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_OFST 8</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_LBN 16</div><div class='del'>-#define        MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_WIDTH 16</div><div class='del'>-/* ID of counter to increment when the rule is hit. Only used if the DO_COUNT</div><div class='del'>- * flag is set. The ID must have been allocated with COUNTER_TYPE=OR.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_MAE_OUTER_RULE_UPDATE_IN_COUNTER_ID_OFST 12</div><div class='del'>-#define       MC_CMD_MAE_OUTER_RULE_UPDATE_IN_COUNTER_ID_LEN 4</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MAE_OUTER_RULE_UPDATE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_MAE_OUTER_RULE_UPDATE_OUT_LEN 0</div><div class='del'>-</div><div class='ctx'> /* MAE_ACTION_RULE_RESPONSE structuredef */</div><div class='ctx'> #define    MAE_ACTION_RULE_RESPONSE_LEN 16</div><div class='ctx'> #define       MAE_ACTION_RULE_RESPONSE_ASL_ID_OFST 0</div><div class='hunk'>@@ -29122,142 +25420,6 @@</div><div class='ctx'> #define       MAE_MPORT_DESC_VNIC_PLUGIN_TBD_LBN 352</div><div class='ctx'> #define       MAE_MPORT_DESC_VNIC_PLUGIN_TBD_WIDTH 32</div><div class='ctx'> </div><div class='del'>-/* MAE_MPORT_DESC_V2 structuredef */</div><div class='del'>-#define    MAE_MPORT_DESC_V2_LEN 56</div><div class='del'>-#define       MAE_MPORT_DESC_V2_MPORT_ID_OFST 0</div><div class='del'>-#define       MAE_MPORT_DESC_V2_MPORT_ID_LEN 4</div><div class='del'>-#define       MAE_MPORT_DESC_V2_MPORT_ID_LBN 0</div><div class='del'>-#define       MAE_MPORT_DESC_V2_MPORT_ID_WIDTH 32</div><div class='del'>-/* Reserved for future purposes, contains information independent of caller */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_FLAGS_OFST 4</div><div class='del'>-#define       MAE_MPORT_DESC_V2_FLAGS_LEN 4</div><div class='del'>-#define       MAE_MPORT_DESC_V2_FLAGS_LBN 32</div><div class='del'>-#define       MAE_MPORT_DESC_V2_FLAGS_WIDTH 32</div><div class='del'>-#define       MAE_MPORT_DESC_V2_CALLER_FLAGS_OFST 8</div><div class='del'>-#define       MAE_MPORT_DESC_V2_CALLER_FLAGS_LEN 4</div><div class='del'>-#define        MAE_MPORT_DESC_V2_CAN_RECEIVE_ON_OFST 8</div><div class='del'>-#define        MAE_MPORT_DESC_V2_CAN_RECEIVE_ON_LBN 0</div><div class='del'>-#define        MAE_MPORT_DESC_V2_CAN_RECEIVE_ON_WIDTH 1</div><div class='del'>-#define        MAE_MPORT_DESC_V2_CAN_DELIVER_TO_OFST 8</div><div class='del'>-#define        MAE_MPORT_DESC_V2_CAN_DELIVER_TO_LBN 1</div><div class='del'>-#define        MAE_MPORT_DESC_V2_CAN_DELIVER_TO_WIDTH 1</div><div class='del'>-#define        MAE_MPORT_DESC_V2_CAN_DELETE_OFST 8</div><div class='del'>-#define        MAE_MPORT_DESC_V2_CAN_DELETE_LBN 2</div><div class='del'>-#define        MAE_MPORT_DESC_V2_CAN_DELETE_WIDTH 1</div><div class='del'>-#define        MAE_MPORT_DESC_V2_IS_ZOMBIE_OFST 8</div><div class='del'>-#define        MAE_MPORT_DESC_V2_IS_ZOMBIE_LBN 3</div><div class='del'>-#define        MAE_MPORT_DESC_V2_IS_ZOMBIE_WIDTH 1</div><div class='del'>-#define       MAE_MPORT_DESC_V2_CALLER_FLAGS_LBN 64</div><div class='del'>-#define       MAE_MPORT_DESC_V2_CALLER_FLAGS_WIDTH 32</div><div class='del'>-/* Not the ideal name; it's really the type of thing connected to the m-port */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_MPORT_TYPE_OFST 12</div><div class='del'>-#define       MAE_MPORT_DESC_V2_MPORT_TYPE_LEN 4</div><div class='del'>-/* enum: Connected to a MAC... */</div><div class='del'>-#define          MAE_MPORT_DESC_V2_MPORT_TYPE_NET_PORT 0x0</div><div class='del'>-/* enum: Adds metadata and delivers to another m-port */</div><div class='del'>-#define          MAE_MPORT_DESC_V2_MPORT_TYPE_ALIAS 0x1</div><div class='del'>-/* enum: Connected to a VNIC. */</div><div class='del'>-#define          MAE_MPORT_DESC_V2_MPORT_TYPE_VNIC 0x2</div><div class='del'>-#define       MAE_MPORT_DESC_V2_MPORT_TYPE_LBN 96</div><div class='del'>-#define       MAE_MPORT_DESC_V2_MPORT_TYPE_WIDTH 32</div><div class='del'>-/* 128-bit value available to drivers for m-port identification. */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_UUID_OFST 16</div><div class='del'>-#define       MAE_MPORT_DESC_V2_UUID_LEN 16</div><div class='del'>-#define       MAE_MPORT_DESC_V2_UUID_LBN 128</div><div class='del'>-#define       MAE_MPORT_DESC_V2_UUID_WIDTH 128</div><div class='del'>-/* Big wadge of space reserved for other common properties */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_OFST 32</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_LEN 8</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_LO_OFST 32</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_LO_LEN 4</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_LO_LBN 256</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_LO_WIDTH 32</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_HI_OFST 36</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_HI_LEN 4</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_HI_LBN 288</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_HI_WIDTH 32</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_LBN 256</div><div class='del'>-#define       MAE_MPORT_DESC_V2_RESERVED_WIDTH 64</div><div class='del'>-/* Logical port index. Only valid when type NET Port. */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_NET_PORT_IDX_OFST 40</div><div class='del'>-#define       MAE_MPORT_DESC_V2_NET_PORT_IDX_LEN 4</div><div class='del'>-#define       MAE_MPORT_DESC_V2_NET_PORT_IDX_LBN 320</div><div class='del'>-#define       MAE_MPORT_DESC_V2_NET_PORT_IDX_WIDTH 32</div><div class='del'>-/* The m-port delivered to */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_OFST 40</div><div class='del'>-#define       MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_LEN 4</div><div class='del'>-#define       MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_LBN 320</div><div class='del'>-#define       MAE_MPORT_DESC_V2_ALIAS_DELIVER_MPORT_ID_WIDTH 32</div><div class='del'>-/* The type of thing that owns the VNIC */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_OFST 40</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_LEN 4</div><div class='del'>-#define          MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_FUNCTION 0x1 /* enum */</div><div class='del'>-#define          MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_PLUGIN 0x2 /* enum */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_LBN 320</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_CLIENT_TYPE_WIDTH 32</div><div class='del'>-/* The PCIe interface on which the function lives. CJK: We need an enumeration</div><div class='del'>- * of interfaces that we extend as new interface (types) appear. This belongs</div><div class='del'>- * elsewhere and should be referenced from here</div><div class='del'>- */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_OFST 44</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_LEN 4</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_LBN 352</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_INTERFACE_WIDTH 32</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_OFST 48</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_LEN 2</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_LBN 384</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_PF_IDX_WIDTH 16</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_OFST 50</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_LEN 2</div><div class='del'>-/* enum: Indicates that the function is a PF */</div><div class='del'>-#define          MAE_MPORT_DESC_V2_VF_IDX_NULL 0xffff</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_LBN 400</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_FUNCTION_VF_IDX_WIDTH 16</div><div class='del'>-/* Reserved. Should be ignored for now. */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_OFST 44</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_LEN 4</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_LBN 352</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_PLUGIN_TBD_WIDTH 32</div><div class='del'>-/* A client handle for the VNIC's owner. Only valid for type VNIC. */</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_OFST 52</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_LEN 4</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_LBN 416</div><div class='del'>-#define       MAE_MPORT_DESC_V2_VNIC_CLIENT_HANDLE_WIDTH 32</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='del'>-/* MC_CMD_MAE_MPORT_ENUMERATE</div><div class='del'>- * Deprecated in favour of MAE_MPORT_READ_JOURNAL. Support for this command</div><div class='del'>- * will be removed at some future point.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_MAE_MPORT_ENUMERATE 0x17c</div><div class='del'>-#undef MC_CMD_0x17c_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x17c_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MAE_MPORT_ENUMERATE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_MAE_MPORT_ENUMERATE_IN_LEN 0</div><div class='del'>-</div><div class='del'>-/* MC_CMD_MAE_MPORT_ENUMERATE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_MAE_MPORT_ENUMERATE_OUT_LENMIN 8</div><div class='del'>-#define    MC_CMD_MAE_MPORT_ENUMERATE_OUT_LENMAX 252</div><div class='del'>-#define    MC_CMD_MAE_MPORT_ENUMERATE_OUT_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_MAE_MPORT_ENUMERATE_OUT_LEN(num) (8+1*(num))</div><div class='del'>-#define    MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_NUM(len) (((len)-8)/1)</div><div class='del'>-#define       MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_COUNT_OFST 0</div><div class='del'>-#define       MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_COUNT_LEN 4</div><div class='del'>-#define       MC_CMD_MAE_MPORT_ENUMERATE_OUT_SIZEOF_MPORT_DESC_OFST 4</div><div class='del'>-#define       MC_CMD_MAE_MPORT_ENUMERATE_OUT_SIZEOF_MPORT_DESC_LEN 4</div><div class='del'>-/* Any array of MAE_MPORT_DESC structures. The MAE_MPORT_DESC structure may</div><div class='del'>- * grow in future version of this command. Drivers should use a stride of</div><div class='del'>- * SIZEOF_MPORT_DESC. Fields beyond SIZEOF_MPORT_DESC are not present.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_OFST 8</div><div class='del'>-#define       MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_LEN 1</div><div class='del'>-#define       MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MINNUM 0</div><div class='del'>-#define       MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM 244</div><div class='del'>-#define       MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1012</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='ctx'> /* MC_CMD_MAE_MPORT_READ_JOURNAL</div><div class='hunk'>@@ -29570,73 +25732,6 @@</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /***********************************/</div><div class='del'>-/* MC_CMD_TABLE_UPDATE</div><div class='del'>- * Update an existing entry in a table with a new response value. May return</div><div class='del'>- * EINVAL for unknown table ID or other bad request parameters, ENOENT if the</div><div class='del'>- * entry does not already exist, or EPERM if the operation is not permitted. In</div><div class='del'>- * case of an error, the additional MCDI error argument field returns the raw</div><div class='del'>- * error code from the underlying CAM driver.</div><div class='del'>- */</div><div class='del'>-#define MC_CMD_TABLE_UPDATE 0x1ce</div><div class='del'>-#undef MC_CMD_0x1ce_PRIVILEGE_CTG</div><div class='del'>-</div><div class='del'>-#define MC_CMD_0x1ce_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TABLE_UPDATE_IN msgrequest */</div><div class='del'>-#define    MC_CMD_TABLE_UPDATE_IN_LENMIN 16</div><div class='del'>-#define    MC_CMD_TABLE_UPDATE_IN_LENMAX 252</div><div class='del'>-#define    MC_CMD_TABLE_UPDATE_IN_LENMAX_MCDI2 1020</div><div class='del'>-#define    MC_CMD_TABLE_UPDATE_IN_LEN(num) (12+4*(num))</div><div class='del'>-#define    MC_CMD_TABLE_UPDATE_IN_DATA_NUM(len) (((len)-12)/4)</div><div class='del'>-/* Table identifier. */</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_TABLE_ID_OFST 0</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_TABLE_ID_LEN 4</div><div class='del'>-/*            Enum values, see field(s): */</div><div class='del'>-/*               TABLE_ID */</div><div class='del'>-/* Width in bits of supplied key data (must match table properties). */</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_KEY_WIDTH_OFST 4</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_KEY_WIDTH_LEN 2</div><div class='del'>-/* Width in bits of supplied mask data (0 for direct/BCAM tables, or for STCAM</div><div class='del'>- * when allocated MASK_ID is used instead).</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_MASK_WIDTH_OFST 6</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_MASK_WIDTH_LEN 2</div><div class='del'>-/* Width in bits of supplied response data (for INSERT and UPDATE operations</div><div class='del'>- * this must match the table properties; for DELETE operations, no response</div><div class='del'>- * data is required and this must be 0).</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_RESP_WIDTH_OFST 8</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_RESP_WIDTH_LEN 2</div><div class='del'>-/* Mask ID for STCAM table - used instead of mask data if the table descriptor</div><div class='del'>- * reports ALLOC_MASKS==1. Otherwise set to 0.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_MASK_ID_OFST 6</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_MASK_ID_LEN 2</div><div class='del'>-/* Priority for TCAM or STCAM, in range 0..N_PRIORITIES-1, otherwise 0. */</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_PRIORITY_OFST 8</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_PRIORITY_LEN 2</div><div class='del'>-/* (32-bit alignment padding - set to 0) */</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_RESERVED_OFST 10</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_RESERVED_LEN 2</div><div class='del'>-/* Sequence of key, mask (if MASK_WIDTH &gt; 0), and response (if RESP_WIDTH &gt; 0)</div><div class='del'>- * data values. Each of these items is logically treated as a single wide N-bit</div><div class='del'>- * value, in which the individual fields have been placed within that value per</div><div class='del'>- * the LBN and WIDTH information from the table field descriptors. The wide</div><div class='del'>- * N-bit value is padded with 0 bits at the MSB end if necessary to make a</div><div class='del'>- * multiple of 32 bits. The value is then packed into this command as a</div><div class='del'>- * sequence of 32-bit words, bits [31:0] first, then bits [63:32], etc.</div><div class='del'>- */</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_DATA_OFST 12</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_DATA_LEN 4</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_DATA_MINNUM 1</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_DATA_MAXNUM 60</div><div class='del'>-#define       MC_CMD_TABLE_UPDATE_IN_DATA_MAXNUM_MCDI2 252</div><div class='del'>-</div><div class='del'>-/* MC_CMD_TABLE_UPDATE_OUT msgresponse */</div><div class='del'>-#define    MC_CMD_TABLE_UPDATE_OUT_LEN 0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/***********************************/</div><div class='ctx'> /* MC_CMD_TABLE_DELETE</div><div class='ctx'>  * Delete an existing entry in a table. May return EINVAL for unknown table ID</div><div class='ctx'>  * or other bad request parameters, ENOENT if the entry does not exist, or</div><div class='hunk'>@@ -29702,5 +25797,124 @@</div><div class='ctx'> /* MC_CMD_TABLE_DELETE_OUT msgresponse */</div><div class='ctx'> #define    MC_CMD_TABLE_DELETE_OUT_LEN 0</div><div class='ctx'> </div><div class='add'>+/* MC_CMD_QUEUE_HANDLE structuredef: On X4, to distinguish between full-</div><div class='add'>+ * featured (X2-style) VIs and low-latency (X3-style) queues, we use the top</div><div class='add'>+ * bits of the queue handle to specify the queue type in all MCDI calls which</div><div class='add'>+ * refer to VIs/queues. These bits should be masked off when indexing into a</div><div class='add'>+ * queue in the BAR.</div><div class='add'>+ */</div><div class='add'>+#define    MC_CMD_QUEUE_HANDLE_LEN 4</div><div class='add'>+/* Combined queue number and type. This is the ID returned by and passed into</div><div class='add'>+ * MCDI calls that use queues.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_OFST 0</div><div class='add'>+#define       MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_LEN 4</div><div class='add'>+#define        MC_CMD_QUEUE_HANDLE_QUEUE_NUM_OFST 0</div><div class='add'>+#define        MC_CMD_QUEUE_HANDLE_QUEUE_NUM_LBN 0</div><div class='add'>+#define        MC_CMD_QUEUE_HANDLE_QUEUE_NUM_WIDTH 24</div><div class='add'>+#define        MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_OFST 0</div><div class='add'>+#define        MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LBN 24</div><div class='add'>+#define        MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_WIDTH 8</div><div class='add'>+/* enum: Indicates that the queue instance is a full-featured VI */</div><div class='add'>+#define          MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_FF_VI 0x0</div><div class='add'>+/* enum: Indicates that the queue instance is a LL TXQ */</div><div class='add'>+#define          MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LL_TXQ 0x1</div><div class='add'>+/* enum: Indicates that the queue instance is a LL RXQ */</div><div class='add'>+#define          MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LL_RXQ 0x2</div><div class='add'>+/* enum: Indicates that the queue instance is a LL EVQ */</div><div class='add'>+#define          MC_CMD_QUEUE_HANDLE_QUEUE_TYPE_LL_EVQ 0x3</div><div class='add'>+#define       MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_LBN 0</div><div class='add'>+#define       MC_CMD_QUEUE_HANDLE_QUEUE_HANDLE_WIDTH 32</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_ALLOC_LL_QUEUES</div><div class='add'>+ * Allocate low latency (X3-style) queues for current PCI function. Can be</div><div class='add'>+ * called more than once if desired to allocate more queues.</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_ALLOC_LL_QUEUES 0x1dd</div><div class='add'>+#undef MC_CMD_0x1dd_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1dd_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='add'>+</div><div class='add'>+/* MC_CMD_ALLOC_LL_QUEUES_IN msgrequest */</div><div class='add'>+#define    MC_CMD_ALLOC_LL_QUEUES_IN_LEN 24</div><div class='add'>+/* The minimum number of TXQs that is acceptable */</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MIN_TXQ_COUNT_OFST 0</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MIN_TXQ_COUNT_LEN 4</div><div class='add'>+/* The maximum number of TXQs that would be useful */</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MAX_TXQ_COUNT_OFST 4</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MAX_TXQ_COUNT_LEN 4</div><div class='add'>+/* The minimum number of RXQs that is acceptable */</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MIN_RXQ_COUNT_OFST 8</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MIN_RXQ_COUNT_LEN 4</div><div class='add'>+/* The maximum number of RXQs that would be useful */</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MAX_RXQ_COUNT_OFST 12</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MAX_RXQ_COUNT_LEN 4</div><div class='add'>+/* The minimum number of EVQs that is acceptable */</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MIN_EVQ_COUNT_OFST 16</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MIN_EVQ_COUNT_LEN 4</div><div class='add'>+/* The maximum number of EVQs that would be useful */</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MAX_EVQ_COUNT_OFST 20</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_IN_MAX_EVQ_COUNT_LEN 4</div><div class='add'>+</div><div class='add'>+/* MC_CMD_ALLOC_LL_QUEUES_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_ALLOC_LL_QUEUES_OUT_LENMIN 16</div><div class='add'>+#define    MC_CMD_ALLOC_LL_QUEUES_OUT_LENMAX 252</div><div class='add'>+#define    MC_CMD_ALLOC_LL_QUEUES_OUT_LENMAX_MCDI2 1020</div><div class='add'>+#define    MC_CMD_ALLOC_LL_QUEUES_OUT_LEN(num) (12+4*(num))</div><div class='add'>+#define    MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_NUM(len) (((len)-12)/4)</div><div class='add'>+/* The number of TXQs allocated in this request */</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_TXQ_COUNT_OFST 0</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_TXQ_COUNT_LEN 4</div><div class='add'>+/* The number of RXQs allocated in this request */</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_RXQ_COUNT_OFST 4</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_RXQ_COUNT_LEN 4</div><div class='add'>+/* The number of EVQs allocated in this request */</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_EVQ_COUNT_OFST 8</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_EVQ_COUNT_LEN 4</div><div class='add'>+/* A list of allocated queues, returned as MC_CMD_QUEUE_HANDLEs, not</div><div class='add'>+ * necessarily contiguous. TXQs are first in the list, followed by RXQs then</div><div class='add'>+ * EVQs. The type of each queue is indicated by the top bits (see the</div><div class='add'>+ * QUEUE_TYPE enum)</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_OFST 12</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_LEN 4</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_MINNUM 1</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_MAXNUM 60</div><div class='add'>+#define       MC_CMD_ALLOC_LL_QUEUES_OUT_QUEUES_MAXNUM_MCDI2 252</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/***********************************/</div><div class='add'>+/* MC_CMD_FREE_LL_QUEUES</div><div class='add'>+ * Free low latency (X3-style) queues for current PCI function.</div><div class='add'>+ */</div><div class='add'>+#define MC_CMD_FREE_LL_QUEUES 0x1de</div><div class='add'>+#undef MC_CMD_0x1de_PRIVILEGE_CTG</div><div class='add'>+</div><div class='add'>+#define MC_CMD_0x1de_PRIVILEGE_CTG SRIOV_CTG_GENERAL</div><div class='add'>+</div><div class='add'>+/* MC_CMD_FREE_LL_QUEUES_IN msgrequest */</div><div class='add'>+#define    MC_CMD_FREE_LL_QUEUES_IN_LENMIN 8</div><div class='add'>+#define    MC_CMD_FREE_LL_QUEUES_IN_LENMAX 252</div><div class='add'>+#define    MC_CMD_FREE_LL_QUEUES_IN_LENMAX_MCDI2 1020</div><div class='add'>+#define    MC_CMD_FREE_LL_QUEUES_IN_LEN(num) (4+4*(num))</div><div class='add'>+#define    MC_CMD_FREE_LL_QUEUES_IN_QUEUES_NUM(len) (((len)-4)/4)</div><div class='add'>+/* The number of queues to free. */</div><div class='add'>+#define       MC_CMD_FREE_LL_QUEUES_IN_QUEUE_COUNT_OFST 0</div><div class='add'>+#define       MC_CMD_FREE_LL_QUEUES_IN_QUEUE_COUNT_LEN 4</div><div class='add'>+/* A list of queues to free, as a list of MC_CMD_QUEUE_HANDLEs. They must have</div><div class='add'>+ * all been previously allocated by MC_CMD_ALLOC_LL_QUEUES. The type of each</div><div class='add'>+ * queue should be indicated by the top bits.</div><div class='add'>+ */</div><div class='add'>+#define       MC_CMD_FREE_LL_QUEUES_IN_QUEUES_OFST 4</div><div class='add'>+#define       MC_CMD_FREE_LL_QUEUES_IN_QUEUES_LEN 4</div><div class='add'>+#define       MC_CMD_FREE_LL_QUEUES_IN_QUEUES_MINNUM 1</div><div class='add'>+#define       MC_CMD_FREE_LL_QUEUES_IN_QUEUES_MAXNUM 62</div><div class='add'>+#define       MC_CMD_FREE_LL_QUEUES_IN_QUEUES_MAXNUM_MCDI2 254</div><div class='add'>+</div><div class='add'>+/* MC_CMD_FREE_LL_QUEUES_OUT msgresponse */</div><div class='add'>+#define    MC_CMD_FREE_LL_QUEUES_OUT_LEN 0</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> #endif /* MCDI_PCOL_H */</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/mcdi_port.c b/drivers/net/ethernet/sfc/mcdi_port.c<br/>index ad4694fa3dda..7b236d291d8c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mcdi_port.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mcdi_port.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mcdi_port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/mcdi_port.c</a></div><div class='hunk'>@@ -17,58 +17,6 @@</div><div class='ctx'> #include "selftest.h"</div><div class='ctx'> #include "mcdi_port_common.h"</div><div class='ctx'> </div><div class='del'>-static int efx_mcdi_mdio_read(struct net_device *net_dev,</div><div class='del'>-			      int prtad, int devad, u16 addr)</div><div class='del'>-{</div><div class='del'>-	struct efx_nic *efx = efx_netdev_priv(net_dev);</div><div class='del'>-	MCDI_DECLARE_BUF(inbuf, MC_CMD_MDIO_READ_IN_LEN);</div><div class='del'>-	MCDI_DECLARE_BUF(outbuf, MC_CMD_MDIO_READ_OUT_LEN);</div><div class='del'>-	size_t outlen;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	MCDI_SET_DWORD(inbuf, MDIO_READ_IN_BUS, efx-&gt;mdio_bus);</div><div class='del'>-	MCDI_SET_DWORD(inbuf, MDIO_READ_IN_PRTAD, prtad);</div><div class='del'>-	MCDI_SET_DWORD(inbuf, MDIO_READ_IN_DEVAD, devad);</div><div class='del'>-	MCDI_SET_DWORD(inbuf, MDIO_READ_IN_ADDR, addr);</div><div class='del'>-</div><div class='del'>-	rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_READ, inbuf, sizeof(inbuf),</div><div class='del'>-			  outbuf, sizeof(outbuf), &amp;outlen);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-</div><div class='del'>-	if (MCDI_DWORD(outbuf, MDIO_READ_OUT_STATUS) !=</div><div class='del'>-	    MC_CMD_MDIO_STATUS_GOOD)</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	return (u16)MCDI_DWORD(outbuf, MDIO_READ_OUT_VALUE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int efx_mcdi_mdio_write(struct net_device *net_dev,</div><div class='del'>-			       int prtad, int devad, u16 addr, u16 value)</div><div class='del'>-{</div><div class='del'>-	struct efx_nic *efx = efx_netdev_priv(net_dev);</div><div class='del'>-	MCDI_DECLARE_BUF(inbuf, MC_CMD_MDIO_WRITE_IN_LEN);</div><div class='del'>-	MCDI_DECLARE_BUF(outbuf, MC_CMD_MDIO_WRITE_OUT_LEN);</div><div class='del'>-	size_t outlen;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_BUS, efx-&gt;mdio_bus);</div><div class='del'>-	MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_PRTAD, prtad);</div><div class='del'>-	MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_DEVAD, devad);</div><div class='del'>-	MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_ADDR, addr);</div><div class='del'>-	MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_VALUE, value);</div><div class='del'>-</div><div class='del'>-	rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_WRITE, inbuf, sizeof(inbuf),</div><div class='del'>-			  outbuf, sizeof(outbuf), &amp;outlen);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='del'>-</div><div class='del'>-	if (MCDI_DWORD(outbuf, MDIO_WRITE_OUT_STATUS) !=</div><div class='del'>-	    MC_CMD_MDIO_STATUS_GOOD)</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> u32 efx_mcdi_phy_get_caps(struct efx_nic *efx)</div><div class='ctx'> {</div><div class='hunk'>@@ -97,12 +45,7 @@ int efx_mcdi_port_probe(struct efx_nic *efx)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	/* Set up MDIO structure for PHY */</div><div class='del'>-	efx-&gt;mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;</div><div class='del'>-	efx-&gt;mdio.mdio_read = efx_mcdi_mdio_read;</div><div class='del'>-	efx-&gt;mdio.mdio_write = efx_mcdi_mdio_write;</div><div class='del'>-</div><div class='del'>-	/* Fill out MDIO structure, loopback modes, and initial link state */</div><div class='add'>+	/* Fill out loopback modes and initial link state */</div><div class='ctx'> 	rc = efx_mcdi_phy_probe(efx);</div><div class='ctx'> 	if (rc != 0)</div><div class='ctx'> 		return rc;</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/mcdi_port_common.c b/drivers/net/ethernet/sfc/mcdi_port_common.c<br/>index 76ea26722ca4..dae684194ac8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mcdi_port_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/mcdi_port_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/mcdi_port_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/mcdi_port_common.c</a></div><div class='hunk'>@@ -448,15 +448,6 @@ int efx_mcdi_phy_probe(struct efx_nic *efx)</div><div class='ctx'> 	efx-&gt;phy_data = phy_data;</div><div class='ctx'> 	efx-&gt;phy_type = phy_data-&gt;type;</div><div class='ctx'> </div><div class='del'>-	efx-&gt;mdio_bus = phy_data-&gt;channel;</div><div class='del'>-	efx-&gt;mdio.prtad = phy_data-&gt;port;</div><div class='del'>-	efx-&gt;mdio.mmds = phy_data-&gt;mmd_mask &amp; ~(1 &lt;&lt; MC_CMD_MMD_CLAUSE22);</div><div class='del'>-	efx-&gt;mdio.mode_support = 0;</div><div class='del'>-	if (phy_data-&gt;mmd_mask &amp; (1 &lt;&lt; MC_CMD_MMD_CLAUSE22))</div><div class='del'>-		efx-&gt;mdio.mode_support |= MDIO_SUPPORTS_C22;</div><div class='del'>-	if (phy_data-&gt;mmd_mask &amp; ~(1 &lt;&lt; MC_CMD_MMD_CLAUSE22))</div><div class='del'>-		efx-&gt;mdio.mode_support |= MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;</div><div class='del'>-</div><div class='ctx'> 	caps = MCDI_DWORD(outbuf, GET_LINK_OUT_CAP);</div><div class='ctx'> 	if (caps &amp; (1 &lt;&lt; MC_CMD_PHY_CAP_AN_LBN))</div><div class='ctx'> 		mcdi_to_ethtool_linkset(phy_data-&gt;media, caps,</div><div class='hunk'>@@ -546,8 +537,6 @@ void efx_mcdi_phy_get_link_ksettings(struct efx_nic *efx, struct ethtool_link_ks</div><div class='ctx'> 	cmd-&gt;base.port = mcdi_to_ethtool_media(phy_cfg-&gt;media);</div><div class='ctx'> 	cmd-&gt;base.phy_address = phy_cfg-&gt;port;</div><div class='ctx'> 	cmd-&gt;base.autoneg = !!(efx-&gt;link_advertising[0] &amp; ADVERTISED_Autoneg);</div><div class='del'>-	cmd-&gt;base.mdio_support = (efx-&gt;mdio.mode_support &amp;</div><div class='del'>-			      (MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22));</div><div class='ctx'> </div><div class='ctx'> 	mcdi_to_ethtool_linkset(phy_cfg-&gt;media, phy_cfg-&gt;supported_cap,</div><div class='ctx'> 				cmd-&gt;link_modes.supported);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/net_driver.h b/drivers/net/ethernet/sfc/net_driver.h<br/>index b54662d32f55..b98c259f672d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/net_driver.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/net_driver.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/net_driver.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/net_driver.h</a></div><div class='hunk'>@@ -15,7 +15,7 @@</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/mii.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='hunk'>@@ -404,7 +404,6 @@ struct efx_rx_page_state {</div><div class='ctx'>  * @old_rx_packets: Value of @rx_packets as of last efx_init_rx_queue()</div><div class='ctx'>  * @old_rx_bytes: Value of @rx_bytes as of last efx_init_rx_queue()</div><div class='ctx'>  * @xdp_rxq_info: XDP specific RX queue information.</div><div class='del'>- * @xdp_rxq_info_valid: Is xdp_rxq_info valid data?.</div><div class='ctx'>  */</div><div class='ctx'> struct efx_rx_queue {</div><div class='ctx'> 	struct efx_nic *efx;</div><div class='hunk'>@@ -443,7 +442,6 @@ struct efx_rx_queue {</div><div class='ctx'> 	unsigned long old_rx_packets;</div><div class='ctx'> 	unsigned long old_rx_bytes;</div><div class='ctx'> 	struct xdp_rxq_info xdp_rxq_info;</div><div class='del'>-	bool xdp_rxq_info_valid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum efx_sync_events_state {</div><div class='hunk'>@@ -831,6 +829,7 @@ struct efx_arfs_rule {</div><div class='ctx'> /**</div><div class='ctx'>  * struct efx_async_filter_insertion - Request to asynchronously insert a filter</div><div class='ctx'>  * @net_dev: Reference to the netdevice</div><div class='add'>+ * @net_dev_tracker: reference tracker entry for @net_dev</div><div class='ctx'>  * @spec: The filter to insert</div><div class='ctx'>  * @work: Workitem for this request</div><div class='ctx'>  * @rxq_index: Identifies the channel for which this request was made</div><div class='hunk'>@@ -838,6 +837,7 @@ struct efx_arfs_rule {</div><div class='ctx'>  */</div><div class='ctx'> struct efx_async_filter_insertion {</div><div class='ctx'> 	struct net_device *net_dev;</div><div class='add'>+	netdevice_tracker net_dev_tracker;</div><div class='ctx'> 	struct efx_filter_spec spec;</div><div class='ctx'> 	struct work_struct work;</div><div class='ctx'> 	u16 rxq_index;</div><div class='hunk'>@@ -954,8 +954,6 @@ struct efx_mae;</div><div class='ctx'>  * @stats_buffer: DMA buffer for statistics</div><div class='ctx'>  * @phy_type: PHY type</div><div class='ctx'>  * @phy_data: PHY private data (including PHY-specific stats)</div><div class='del'>- * @mdio: PHY MDIO interface</div><div class='del'>- * @mdio_bus: PHY MDIO bus ID (only used by Siena)</div><div class='ctx'>  * @phy_mode: PHY operating mode. Serialised by @mac_lock.</div><div class='ctx'>  * @link_advertising: Autonegotiation advertising flags</div><div class='ctx'>  * @fec_config: Forward Error Correction configuration flags.  For bit positions</div><div class='hunk'>@@ -1004,6 +1002,7 @@ struct efx_mae;</div><div class='ctx'>  * @dl_port: devlink port associated with the PF</div><div class='ctx'>  * @mem_bar: The BAR that is mapped into membase.</div><div class='ctx'>  * @reg_base: Offset from the start of the bar to the function control window.</div><div class='add'>+ * @reflash_mutex: Mutex for serialising firmware reflash operations.</div><div class='ctx'>  * @monitor_work: Hardware monitor workitem</div><div class='ctx'>  * @biu_lock: BIU (bus interface unit) lock</div><div class='ctx'>  * @last_irq_cpu: Last CPU to handle a possible test interrupt.  This</div><div class='hunk'>@@ -1129,8 +1128,6 @@ struct efx_nic {</div><div class='ctx'> </div><div class='ctx'> 	unsigned int phy_type;</div><div class='ctx'> 	void *phy_data;</div><div class='del'>-	struct mdio_if_info mdio;</div><div class='del'>-	unsigned int mdio_bus;</div><div class='ctx'> 	enum efx_phy_mode phy_mode;</div><div class='ctx'> </div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(link_advertising);</div><div class='hunk'>@@ -1189,6 +1186,7 @@ struct efx_nic {</div><div class='ctx'> 	struct devlink_port *dl_port;</div><div class='ctx'> 	unsigned int mem_bar;</div><div class='ctx'> 	u32 reg_base;</div><div class='add'>+	struct mutex reflash_mutex;</div><div class='ctx'> </div><div class='ctx'> 	/* The following fields may be written more often */</div><div class='ctx'> </div><div class='hunk'>@@ -1381,6 +1379,8 @@ struct efx_udp_tunnel {</div><div class='ctx'>  * @can_rx_scatter: NIC is able to scatter packets to multiple buffers</div><div class='ctx'>  * @always_rx_scatter: NIC will always scatter packets to multiple buffers</div><div class='ctx'>  * @option_descriptors: NIC supports TX option descriptors</div><div class='add'>+ * @flash_auto_partition: firmware flash uses AUTO partition, driver does</div><div class='add'>+ *	not need to perform image parsing</div><div class='ctx'>  * @min_interrupt_mode: Lowest capability interrupt mode supported</div><div class='ctx'>  *	from &amp;enum efx_int_mode.</div><div class='ctx'>  * @timer_period_max: Maximum period of interrupt timer (in ticks)</div><div class='hunk'>@@ -1408,7 +1408,7 @@ struct efx_nic_type {</div><div class='ctx'> 	int (*fini_dmaq)(struct efx_nic *efx);</div><div class='ctx'> 	void (*prepare_flr)(struct efx_nic *efx);</div><div class='ctx'> 	void (*finish_flr)(struct efx_nic *efx);</div><div class='del'>-	size_t (*describe_stats)(struct efx_nic *efx, u8 *names);</div><div class='add'>+	size_t (*describe_stats)(struct efx_nic *efx, u8 **names);</div><div class='ctx'> 	size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats,</div><div class='ctx'> 			       struct rtnl_link_stats64 *core_stats);</div><div class='ctx'> 	size_t (*update_stats_atomic)(struct efx_nic *efx, u64 *full_stats,</div><div class='hunk'>@@ -1557,6 +1557,7 @@ struct efx_nic_type {</div><div class='ctx'> 	bool can_rx_scatter;</div><div class='ctx'> 	bool always_rx_scatter;</div><div class='ctx'> 	bool option_descriptors;</div><div class='add'>+	bool flash_auto_partition;</div><div class='ctx'> 	unsigned int min_interrupt_mode;</div><div class='ctx'> 	unsigned int timer_period_max;</div><div class='ctx'> 	netdev_features_t offload_features;</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/nic.c b/drivers/net/ethernet/sfc/nic.c<br/>index a33ed473cc8a..80aa5e9c732a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/nic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/nic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/nic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/nic.c</a></div><div class='hunk'>@@ -299,18 +299,15 @@ void efx_nic_get_regs(struct efx_nic *efx, void *buf)</div><div class='ctx'>  * bits in the first @count bits of @mask for which a name is defined.</div><div class='ctx'>  */</div><div class='ctx'> size_t efx_nic_describe_stats(const struct efx_hw_stat_desc *desc, size_t count,</div><div class='del'>-			      const unsigned long *mask, u8 *names)</div><div class='add'>+			      const unsigned long *mask, u8 **names)</div><div class='ctx'> {</div><div class='ctx'> 	size_t visible = 0;</div><div class='ctx'> 	size_t index;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(index, mask, count) {</div><div class='ctx'> 		if (desc[index].name) {</div><div class='del'>-			if (names) {</div><div class='del'>-				strscpy(names, desc[index].name,</div><div class='del'>-					ETH_GSTRING_LEN);</div><div class='del'>-				names += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='add'>+			if (names)</div><div class='add'>+				ethtool_puts(names, desc[index].name);</div><div class='ctx'> 			++visible;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/nic_common.h b/drivers/net/ethernet/sfc/nic_common.h<br/>index 7ec4ac7b7ff5..821d91efda19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/nic_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/nic_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/nic_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/nic_common.h</a></div><div class='hunk'>@@ -241,7 +241,7 @@ void efx_nic_get_regs(struct efx_nic *efx, void *buf);</div><div class='ctx'> #define EFX_MC_STATS_GENERATION_INVALID ((__force __le64)(-1))</div><div class='ctx'> </div><div class='ctx'> size_t efx_nic_describe_stats(const struct efx_hw_stat_desc *desc, size_t count,</div><div class='del'>-			      const unsigned long *mask, u8 *names);</div><div class='add'>+			      const unsigned long *mask, u8 **names);</div><div class='ctx'> int efx_nic_copy_stats(struct efx_nic *efx, __le64 *dest);</div><div class='ctx'> void efx_nic_update_stats(const struct efx_hw_stat_desc *desc, size_t count,</div><div class='ctx'> 			  const unsigned long *mask, u64 *stats,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ptp.c b/drivers/net/ethernet/sfc/ptp.c<br/>index aaacdcfa54ae..4c7222bf26be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/ptp.c</a></div><div class='hunk'>@@ -399,7 +399,7 @@ static const unsigned long efx_ptp_stat_mask[] = {</div><div class='ctx'> 	[0 ... BITS_TO_LONGS(PTP_STAT_COUNT) - 1] = ~0UL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-size_t efx_ptp_describe_stats(struct efx_nic *efx, u8 *strings)</div><div class='add'>+size_t efx_ptp_describe_stats(struct efx_nic *efx, u8 **strings)</div><div class='ctx'> {</div><div class='ctx'> 	if (!efx-&gt;ptp_data)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1800,11 +1800,6 @@ int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb)</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int efx_ptp_get_mode(struct efx_nic *efx)</div><div class='del'>-{</div><div class='del'>-	return efx-&gt;ptp_data-&gt;mode;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted,</div><div class='ctx'> 			unsigned int new_mode)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/ptp.h b/drivers/net/ethernet/sfc/ptp.h<br/>index 6946203499ef..cb9b077921e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/ptp.h</a></div><div class='hunk'>@@ -26,12 +26,11 @@ int efx_ptp_get_ts_config(struct efx_nic *efx,</div><div class='ctx'> void efx_ptp_get_ts_info(struct efx_nic *efx,</div><div class='ctx'> 			 struct kernel_ethtool_ts_info *ts_info);</div><div class='ctx'> bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);</div><div class='del'>-int efx_ptp_get_mode(struct efx_nic *efx);</div><div class='ctx'> int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted,</div><div class='ctx'> 			unsigned int new_mode);</div><div class='ctx'> int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);</div><div class='ctx'> void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev);</div><div class='del'>-size_t efx_ptp_describe_stats(struct efx_nic *efx, u8 *strings);</div><div class='add'>+size_t efx_ptp_describe_stats(struct efx_nic *efx, u8 **strings);</div><div class='ctx'> size_t efx_ptp_update_stats(struct efx_nic *efx, u64 *stats);</div><div class='ctx'> void efx_time_sync_event(struct efx_channel *channel, efx_qword_t *ev);</div><div class='ctx'> void __efx_rx_skb_attach_timestamp(struct efx_channel *channel,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/rx_common.c b/drivers/net/ethernet/sfc/rx_common.c<br/>index ab358fe13e1d..5306f4c44be4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/rx_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/rx_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/rx_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/rx_common.c</a></div><div class='hunk'>@@ -269,8 +269,6 @@ void efx_init_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='ctx'> 			  "Failure to initialise XDP queue information rc=%d\n",</div><div class='ctx'> 			  rc);</div><div class='ctx'> 		efx-&gt;xdp_rxq_info_failed = true;</div><div class='del'>-	} else {</div><div class='del'>-		rx_queue-&gt;xdp_rxq_info_valid = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set up RX descriptor ring */</div><div class='hunk'>@@ -285,7 +283,7 @@ void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='ctx'> 	netif_dbg(rx_queue-&gt;efx, drv, rx_queue-&gt;efx-&gt;net_dev,</div><div class='ctx'> 		  "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;rx_queue-&gt;slow_fill);</div><div class='add'>+	timer_delete_sync(&amp;rx_queue-&gt;slow_fill);</div><div class='ctx'> 	if (rx_queue-&gt;grant_credits)</div><div class='ctx'> 		flush_work(&amp;rx_queue-&gt;grant_work);</div><div class='ctx'> </div><div class='hunk'>@@ -302,10 +300,8 @@ void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='ctx'> </div><div class='ctx'> 	efx_fini_rx_recycle_ring(rx_queue);</div><div class='ctx'> </div><div class='del'>-	if (rx_queue-&gt;xdp_rxq_info_valid)</div><div class='add'>+	if (xdp_rxq_info_is_reg(&amp;rx_queue-&gt;xdp_rxq_info))</div><div class='ctx'> 		xdp_rxq_info_unreg(&amp;rx_queue-&gt;xdp_rxq_info);</div><div class='del'>-</div><div class='del'>-	rx_queue-&gt;xdp_rxq_info_valid = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='hunk'>@@ -352,7 +348,8 @@ void efx_free_rx_buffers(struct efx_rx_queue *rx_queue,</div><div class='ctx'> </div><div class='ctx'> void efx_rx_slow_fill(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct efx_rx_queue *rx_queue = from_timer(rx_queue, t, slow_fill);</div><div class='add'>+	struct efx_rx_queue *rx_queue = timer_container_of(rx_queue, t,</div><div class='add'>+							   slow_fill);</div><div class='ctx'> </div><div class='ctx'> 	/* Post an event to cause NAPI to run and refill the queue */</div><div class='ctx'> 	efx_nic_generate_fill_event(rx_queue);</div><div class='hunk'>@@ -897,7 +894,7 @@ static void efx_filter_rfs_work(struct work_struct *data)</div><div class='ctx'> </div><div class='ctx'> 	/* Release references */</div><div class='ctx'> 	clear_bit(slot_idx, &amp;efx-&gt;rps_slot_map);</div><div class='del'>-	dev_put(req-&gt;net_dev);</div><div class='add'>+	netdev_put(req-&gt;net_dev, &amp;req-&gt;net_dev_tracker);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,</div><div class='hunk'>@@ -989,7 +986,8 @@ int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Queue the request */</div><div class='del'>-	dev_hold(req-&gt;net_dev = net_dev);</div><div class='add'>+	req-&gt;net_dev = net_dev;</div><div class='add'>+	netdev_hold(req-&gt;net_dev, &amp;req-&gt;net_dev_tracker, GFP_ATOMIC);</div><div class='ctx'> 	INIT_WORK(&amp;req-&gt;work, efx_filter_rfs_work);</div><div class='ctx'> 	req-&gt;rxq_index = rxq_index;</div><div class='ctx'> 	req-&gt;flow_id = flow_id;</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/efx_channels.c b/drivers/net/ethernet/sfc/siena/efx_channels.c<br/>index d120b3c83ac0..fc075ab6b7b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/efx_channels.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/efx_channels.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/efx_channels.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/efx_channels.c</a></div><div class='hunk'>@@ -217,8 +217,8 @@ static int efx_allocate_msix_channels(struct efx_nic *efx,</div><div class='ctx'> </div><div class='ctx'> 	if (efx_siena_separate_tx_channels) {</div><div class='ctx'> 		efx-&gt;n_tx_channels =</div><div class='del'>-			min(max(n_channels / 2, 1U),</div><div class='del'>-			    efx-&gt;max_tx_channels);</div><div class='add'>+			clamp(n_channels / 2, 1U,</div><div class='add'>+			      efx-&gt;max_tx_channels);</div><div class='ctx'> 		efx-&gt;tx_channel_offset =</div><div class='ctx'> 			n_channels - efx-&gt;n_tx_channels;</div><div class='ctx'> 		efx-&gt;n_rx_channels =</div><div class='hunk'>@@ -1300,7 +1300,7 @@ static int efx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		time = jiffies - channel-&gt;rfs_last_expiry;</div><div class='ctx'> 		/* Would our quota be &gt;= 20? */</div><div class='ctx'> 		if (channel-&gt;rfs_filter_count * time &gt;= 600 * HZ)</div><div class='del'>-			mod_delayed_work(system_wq, &amp;channel-&gt;filter_work, 0);</div><div class='add'>+			mod_delayed_work(system_percpu_wq, &amp;channel-&gt;filter_work, 0);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 		/* There is no race here; although napi_disable() will</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/efx_common.c b/drivers/net/ethernet/sfc/siena/efx_common.c<br/>index a0966f879664..35036cc902fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/efx_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/efx_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/efx_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/efx_common.c</a></div><div class='hunk'>@@ -1285,9 +1285,6 @@ out:</div><div class='ctx'> </div><div class='ctx'> /* For simplicity and reliability, we always require a slot reset and try to</div><div class='ctx'>  * reset the hardware when a pci error affecting the device is detected.</div><div class='del'>- * We leave both the link_reset and mmio_enabled callback unimplemented:</div><div class='del'>- * with our request for slot reset the mmio_enabled callback will never be</div><div class='del'>- * called, and the link_reset callback is not used by AER or EEH mechanisms.</div><div class='ctx'>  */</div><div class='ctx'> const struct pci_error_handlers efx_siena_err_handlers = {</div><div class='ctx'> 	.error_detected = efx_io_error_detected,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/ethtool.c b/drivers/net/ethernet/sfc/siena/ethtool.c<br/>index c5ad84db9613..8c3ebd0617fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/ethtool.c</a></div><div class='hunk'>@@ -217,7 +217,8 @@ static int efx_ethtool_set_wol(struct net_device *net_dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void efx_ethtool_get_fec_stats(struct net_device *net_dev,</div><div class='del'>-				      struct ethtool_fec_stats *fec_stats)</div><div class='add'>+				      struct ethtool_fec_stats *fec_stats,</div><div class='add'>+				      struct ethtool_fec_hist *hist)</div><div class='ctx'> {</div><div class='ctx'> 	struct efx_nic *efx = netdev_priv(net_dev);</div><div class='ctx'> </div><div class='hunk'>@@ -264,6 +265,7 @@ const struct ethtool_ops efx_siena_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_key_size	= efx_siena_ethtool_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh		= efx_siena_ethtool_get_rxfh,</div><div class='ctx'> 	.set_rxfh		= efx_siena_ethtool_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= efx_siena_ethtool_get_rxfh_fields,</div><div class='ctx'> 	.get_ts_info		= efx_ethtool_get_ts_info,</div><div class='ctx'> 	.get_module_info	= efx_siena_ethtool_get_module_info,</div><div class='ctx'> 	.get_module_eeprom	= efx_siena_ethtool_get_module_eeprom,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/ethtool_common.c b/drivers/net/ethernet/sfc/siena/ethtool_common.c<br/>index 075fef64de68..47cd16a113cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/ethtool_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/ethtool_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/ethtool_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/ethtool_common.c</a></div><div class='hunk'>@@ -395,7 +395,7 @@ fail:</div><div class='ctx'> 		test-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static size_t efx_describe_per_queue_stats(struct efx_nic *efx, u8 *strings)</div><div class='add'>+static size_t efx_describe_per_queue_stats(struct efx_nic *efx, u8 **strings)</div><div class='ctx'> {</div><div class='ctx'> 	size_t n_stats = 0;</div><div class='ctx'> 	struct efx_channel *channel;</div><div class='hunk'>@@ -403,24 +403,22 @@ static size_t efx_describe_per_queue_stats(struct efx_nic *efx, u8 *strings)</div><div class='ctx'> 	efx_for_each_channel(channel, efx) {</div><div class='ctx'> 		if (efx_channel_has_tx_queues(channel)) {</div><div class='ctx'> 			n_stats++;</div><div class='del'>-			if (strings != NULL) {</div><div class='del'>-				snprintf(strings, ETH_GSTRING_LEN,</div><div class='del'>-					 "tx-%u.tx_packets",</div><div class='del'>-					 channel-&gt;tx_queue[0].queue /</div><div class='del'>-					 EFX_MAX_TXQ_PER_CHANNEL);</div><div class='add'>+			if (!strings)</div><div class='add'>+				continue;</div><div class='ctx'> </div><div class='del'>-				strings += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='add'>+			ethtool_sprintf(strings, "tx-%u.tx_packets",</div><div class='add'>+					channel-&gt;tx_queue[0].queue /</div><div class='add'>+						EFX_MAX_TXQ_PER_CHANNEL);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	efx_for_each_channel(channel, efx) {</div><div class='ctx'> 		if (efx_channel_has_rx_queue(channel)) {</div><div class='ctx'> 			n_stats++;</div><div class='del'>-			if (strings != NULL) {</div><div class='del'>-				snprintf(strings, ETH_GSTRING_LEN,</div><div class='del'>-					 "rx-%d.rx_packets", channel-&gt;channel);</div><div class='del'>-				strings += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='add'>+			if (!strings)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ethtool_sprintf(strings, "rx-%d.rx_packets",</div><div class='add'>+					channel-&gt;channel);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (efx-&gt;xdp_tx_queue_count &amp;&amp; efx-&gt;xdp_tx_queues) {</div><div class='hunk'>@@ -428,11 +426,11 @@ static size_t efx_describe_per_queue_stats(struct efx_nic *efx, u8 *strings)</div><div class='ctx'> </div><div class='ctx'> 		for (xdp = 0; xdp &lt; efx-&gt;xdp_tx_queue_count; xdp++) {</div><div class='ctx'> 			n_stats++;</div><div class='del'>-			if (strings) {</div><div class='del'>-				snprintf(strings, ETH_GSTRING_LEN,</div><div class='del'>-					 "tx-xdp-cpu-%hu.tx_packets", xdp);</div><div class='del'>-				strings += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='add'>+			if (!strings)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ethtool_sprintf(strings, "tx-xdp-cpu-%hu.tx_packets",</div><div class='add'>+					xdp);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -464,15 +462,11 @@ void efx_siena_ethtool_get_strings(struct net_device *net_dev,</div><div class='ctx'> </div><div class='ctx'> 	switch (string_set) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='del'>-		strings += (efx-&gt;type-&gt;describe_stats(efx, strings) *</div><div class='del'>-			    ETH_GSTRING_LEN);</div><div class='add'>+		efx-&gt;type-&gt;describe_stats(efx, &amp;strings);</div><div class='ctx'> 		for (i = 0; i &lt; EFX_ETHTOOL_SW_STAT_COUNT; i++)</div><div class='del'>-			strscpy(strings + i * ETH_GSTRING_LEN,</div><div class='del'>-				efx_sw_stat_desc[i].name, ETH_GSTRING_LEN);</div><div class='del'>-		strings += EFX_ETHTOOL_SW_STAT_COUNT * ETH_GSTRING_LEN;</div><div class='del'>-		strings += (efx_describe_per_queue_stats(efx, strings) *</div><div class='del'>-			    ETH_GSTRING_LEN);</div><div class='del'>-		efx_siena_ptp_describe_stats(efx, strings);</div><div class='add'>+			ethtool_puts(&amp;strings, efx_sw_stat_desc[i].name);</div><div class='add'>+		efx_describe_per_queue_stats(efx, &amp;strings);</div><div class='add'>+		efx_siena_ptp_describe_stats(efx, &amp;strings);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ETH_SS_TEST:</div><div class='ctx'> 		efx_ethtool_fill_self_tests(efx, NULL, strings, NULL);</div><div class='hunk'>@@ -807,6 +801,46 @@ static int efx_ethtool_get_class_rule(struct efx_nic *efx,</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int efx_siena_ethtool_get_rxfh_fields(struct net_device *net_dev,</div><div class='add'>+				      struct ethtool_rxfh_fields *info)</div><div class='add'>+{</div><div class='add'>+	struct efx_nic *efx = netdev_priv(net_dev);</div><div class='add'>+	__u64 data;</div><div class='add'>+</div><div class='add'>+	data = 0;</div><div class='add'>+	if (!efx_rss_active(&amp;efx-&gt;rss_context)) /* No RSS */</div><div class='add'>+		goto out_setdata;</div><div class='add'>+</div><div class='add'>+	switch (info-&gt;flow_type) {</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+		if (efx-&gt;rss_context.rx_hash_udp_4tuple)</div><div class='add'>+			data = (RXH_L4_B_0_1 | RXH_L4_B_2_3 |</div><div class='add'>+				RXH_IP_SRC | RXH_IP_DST);</div><div class='add'>+		else</div><div class='add'>+			data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+		data = (RXH_L4_B_0_1 | RXH_L4_B_2_3 |</div><div class='add'>+			RXH_IP_SRC | RXH_IP_DST);</div><div class='add'>+		break;</div><div class='add'>+	case SCTP_V4_FLOW:</div><div class='add'>+	case SCTP_V6_FLOW:</div><div class='add'>+	case AH_ESP_V4_FLOW:</div><div class='add'>+	case AH_ESP_V6_FLOW:</div><div class='add'>+	case IPV4_FLOW:</div><div class='add'>+	case IPV6_FLOW:</div><div class='add'>+		data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+out_setdata:</div><div class='add'>+	info-&gt;data = data;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int efx_siena_ethtool_get_rxnfc(struct net_device *net_dev,</div><div class='ctx'> 				struct ethtool_rxnfc *info, u32 *rule_locs)</div><div class='ctx'> {</div><div class='hunk'>@@ -819,43 +853,6 @@ int efx_siena_ethtool_get_rxnfc(struct net_device *net_dev,</div><div class='ctx'> 		info-&gt;data = efx-&gt;n_rx_channels;</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	case ETHTOOL_GRXFH: {</div><div class='del'>-		__u64 data;</div><div class='del'>-</div><div class='del'>-		data = 0;</div><div class='del'>-		if (!efx_rss_active(&amp;efx-&gt;rss_context)) /* No RSS */</div><div class='del'>-			goto out_setdata;</div><div class='del'>-</div><div class='del'>-		switch (info-&gt;flow_type) {</div><div class='del'>-		case UDP_V4_FLOW:</div><div class='del'>-		case UDP_V6_FLOW:</div><div class='del'>-			if (efx-&gt;rss_context.rx_hash_udp_4tuple)</div><div class='del'>-				data = (RXH_L4_B_0_1 | RXH_L4_B_2_3 |</div><div class='del'>-					RXH_IP_SRC | RXH_IP_DST);</div><div class='del'>-			else</div><div class='del'>-				data = RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		case TCP_V4_FLOW:</div><div class='del'>-		case TCP_V6_FLOW:</div><div class='del'>-			data = (RXH_L4_B_0_1 | RXH_L4_B_2_3 |</div><div class='del'>-				RXH_IP_SRC | RXH_IP_DST);</div><div class='del'>-			break;</div><div class='del'>-		case SCTP_V4_FLOW:</div><div class='del'>-		case SCTP_V6_FLOW:</div><div class='del'>-		case AH_ESP_V4_FLOW:</div><div class='del'>-		case AH_ESP_V6_FLOW:</div><div class='del'>-		case IPV4_FLOW:</div><div class='del'>-		case IPV6_FLOW:</div><div class='del'>-			data = RXH_IP_SRC | RXH_IP_DST;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-out_setdata:</div><div class='del'>-		info-&gt;data = data;</div><div class='del'>-		return rc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	case ETHTOOL_GRXCLSRLCNT:</div><div class='ctx'> 		info-&gt;data = efx_filter_get_rx_id_limit(efx);</div><div class='ctx'> 		if (info-&gt;data == 0)</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/ethtool_common.h b/drivers/net/ethernet/sfc/siena/ethtool_common.h<br/>index d674bab0f65b..278d69e920d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/ethtool_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/ethtool_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/ethtool_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/ethtool_common.h</a></div><div class='hunk'>@@ -46,6 +46,8 @@ int efx_siena_ethtool_get_rxfh(struct net_device *net_dev,</div><div class='ctx'> int efx_siena_ethtool_set_rxfh(struct net_device *net_dev,</div><div class='ctx'> 			       struct ethtool_rxfh_param *rxfh,</div><div class='ctx'> 			       struct netlink_ext_ack *extack);</div><div class='add'>+int efx_siena_ethtool_get_rxfh_fields(struct net_device *net_dev,</div><div class='add'>+				      struct ethtool_rxfh_fields *info);</div><div class='ctx'> int efx_siena_ethtool_reset(struct net_device *net_dev, u32 *flags);</div><div class='ctx'> int efx_siena_ethtool_get_module_eeprom(struct net_device *net_dev,</div><div class='ctx'> 					struct ethtool_eeprom *ee,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/farch.c b/drivers/net/ethernet/sfc/siena/farch.c<br/>index 89ccd65c978b..562a038e38a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/farch.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/farch.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/farch.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/farch.c</a></div><div class='hunk'>@@ -1708,7 +1708,7 @@ void efx_farch_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw)</div><div class='ctx'> </div><div class='ctx'> 			if (efx-&gt;vf_count &gt; vf_limit) {</div><div class='ctx'> 				netif_err(efx, probe, efx-&gt;net_dev,</div><div class='del'>-					  "Reducing VF count from from %d to %d\n",</div><div class='add'>+					  "Reducing VF count from %d to %d\n",</div><div class='ctx'> 					  efx-&gt;vf_count, vf_limit);</div><div class='ctx'> 				efx-&gt;vf_count = vf_limit;</div><div class='ctx'> 			}</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/mcdi.c b/drivers/net/ethernet/sfc/siena/mcdi.c<br/>index 3f7899daa86a..c8f0fb43e285 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/mcdi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/mcdi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/mcdi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/mcdi.c</a></div><div class='hunk'>@@ -534,7 +534,7 @@ static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)</div><div class='ctx'> 	 * of it aborting the next request.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!timeout)</div><div class='del'>-		del_timer_sync(&amp;mcdi-&gt;async_timer);</div><div class='add'>+		timer_delete_sync(&amp;mcdi-&gt;async_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;mcdi-&gt;async_lock);</div><div class='ctx'> 	async = list_first_entry(&amp;mcdi-&gt;async_list,</div><div class='hunk'>@@ -609,7 +609,7 @@ static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,</div><div class='ctx'> </div><div class='ctx'> static void efx_mcdi_timeout_async(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct efx_mcdi_iface *mcdi = from_timer(mcdi, t, async_timer);</div><div class='add'>+	struct efx_mcdi_iface *mcdi = timer_container_of(mcdi, t, async_timer);</div><div class='ctx'> </div><div class='ctx'> 	efx_mcdi_complete_async(mcdi, true);</div><div class='ctx'> }</div><div class='hunk'>@@ -1145,7 +1145,7 @@ void efx_siena_mcdi_flush_async(struct efx_nic *efx)</div><div class='ctx'> 	/* We must be in poll or fail mode so no more requests can be queued */</div><div class='ctx'> 	BUG_ON(mcdi-&gt;mode == MCDI_MODE_EVENTS);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;mcdi-&gt;async_timer);</div><div class='add'>+	timer_delete_sync(&amp;mcdi-&gt;async_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* If a request is still running, make sure we give the MC</div><div class='ctx'> 	 * time to complete it so that the response won't overwrite our</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/mcdi_pcol.h b/drivers/net/ethernet/sfc/siena/mcdi_pcol.h<br/>index a3cc8b7ec732..b81b0aa460d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/mcdi_pcol.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/mcdi_pcol.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/mcdi_pcol.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/mcdi_pcol.h</a></div><div class='hunk'>@@ -6704,16 +6704,16 @@</div><div class='ctx'> #define       MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_LEN 4</div><div class='ctx'> /*            Enum values, see field(s): */</div><div class='ctx'> /*               MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */</div><div class='del'>-/* interpretation is is sensor-specific. */</div><div class='add'>+/* interpretation is sensor-specific. */</div><div class='ctx'> #define       MC_CMD_SENSOR_SET_LIMS_IN_LOW0_OFST 4</div><div class='ctx'> #define       MC_CMD_SENSOR_SET_LIMS_IN_LOW0_LEN 4</div><div class='del'>-/* interpretation is is sensor-specific. */</div><div class='add'>+/* interpretation is sensor-specific. */</div><div class='ctx'> #define       MC_CMD_SENSOR_SET_LIMS_IN_HI0_OFST 8</div><div class='ctx'> #define       MC_CMD_SENSOR_SET_LIMS_IN_HI0_LEN 4</div><div class='del'>-/* interpretation is is sensor-specific. */</div><div class='add'>+/* interpretation is sensor-specific. */</div><div class='ctx'> #define       MC_CMD_SENSOR_SET_LIMS_IN_LOW1_OFST 12</div><div class='ctx'> #define       MC_CMD_SENSOR_SET_LIMS_IN_LOW1_LEN 4</div><div class='del'>-/* interpretation is is sensor-specific. */</div><div class='add'>+/* interpretation is sensor-specific. */</div><div class='ctx'> #define       MC_CMD_SENSOR_SET_LIMS_IN_HI1_OFST 16</div><div class='ctx'> #define       MC_CMD_SENSOR_SET_LIMS_IN_HI1_LEN 4</div><div class='ctx'> </div><div class='hunk'>@@ -7823,7 +7823,7 @@</div><div class='ctx'>  * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST</div><div class='ctx'>  *</div><div class='ctx'>  * Any handles which do not correspond to a sensor currently managed by the MC</div><div class='del'>- * will be dropped from from the response. This may happen when a sensor table</div><div class='add'>+ * will be dropped from the response. This may happen when a sensor table</div><div class='ctx'>  * update is in progress, and effectively means the set of usable sensors is</div><div class='ctx'>  * the intersection between the sets of sensors known to the driver and the MC.</div><div class='ctx'>  *</div><div class='hunk'>@@ -7872,7 +7872,7 @@</div><div class='ctx'>  * provided should be treated as erroneous.</div><div class='ctx'>  *</div><div class='ctx'>  * Any handles which do not correspond to a sensor currently managed by the MC</div><div class='del'>- * will be dropped from from the response. This may happen when a sensor table</div><div class='add'>+ * will be dropped from the response. This may happen when a sensor table</div><div class='ctx'>  * update is in progress, and effectively means the set of usable sensors is</div><div class='ctx'>  * the intersection between the sets of sensors known to the driver and the MC.</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/net_driver.h b/drivers/net/ethernet/sfc/siena/net_driver.h<br/>index 3fa7c652ae9b..4cf556782133 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/net_driver.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/net_driver.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/net_driver.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/net_driver.h</a></div><div class='hunk'>@@ -384,7 +384,6 @@ struct efx_rx_page_state {</div><div class='ctx'>  * @recycle_count: RX buffer recycle counter.</div><div class='ctx'>  * @slow_fill: Timer used to defer efx_nic_generate_fill_event().</div><div class='ctx'>  * @xdp_rxq_info: XDP specific RX queue information.</div><div class='del'>- * @xdp_rxq_info_valid: Is xdp_rxq_info valid data?.</div><div class='ctx'>  */</div><div class='ctx'> struct efx_rx_queue {</div><div class='ctx'> 	struct efx_nic *efx;</div><div class='hunk'>@@ -417,7 +416,6 @@ struct efx_rx_queue {</div><div class='ctx'> 	/* Statistics to supplement MAC stats */</div><div class='ctx'> 	unsigned long rx_packets;</div><div class='ctx'> 	struct xdp_rxq_info xdp_rxq_info;</div><div class='del'>-	bool xdp_rxq_info_valid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum efx_sync_events_state {</div><div class='hunk'>@@ -753,6 +751,7 @@ struct efx_arfs_rule {</div><div class='ctx'> /**</div><div class='ctx'>  * struct efx_async_filter_insertion - Request to asynchronously insert a filter</div><div class='ctx'>  * @net_dev: Reference to the netdevice</div><div class='add'>+ * @net_dev_tracker: reference tracker entry for @net_dev</div><div class='ctx'>  * @spec: The filter to insert</div><div class='ctx'>  * @work: Workitem for this request</div><div class='ctx'>  * @rxq_index: Identifies the channel for which this request was made</div><div class='hunk'>@@ -760,6 +759,7 @@ struct efx_arfs_rule {</div><div class='ctx'>  */</div><div class='ctx'> struct efx_async_filter_insertion {</div><div class='ctx'> 	struct net_device *net_dev;</div><div class='add'>+	netdevice_tracker net_dev_tracker;</div><div class='ctx'> 	struct efx_filter_spec spec;</div><div class='ctx'> 	struct work_struct work;</div><div class='ctx'> 	u16 rxq_index;</div><div class='hunk'>@@ -1307,7 +1307,7 @@ struct efx_nic_type {</div><div class='ctx'> 	void (*finish_flush)(struct efx_nic *efx);</div><div class='ctx'> 	void (*prepare_flr)(struct efx_nic *efx);</div><div class='ctx'> 	void (*finish_flr)(struct efx_nic *efx);</div><div class='del'>-	size_t (*describe_stats)(struct efx_nic *efx, u8 *names);</div><div class='add'>+	size_t (*describe_stats)(struct efx_nic *efx, u8 **names);</div><div class='ctx'> 	size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats,</div><div class='ctx'> 			       struct rtnl_link_stats64 *core_stats);</div><div class='ctx'> 	size_t (*update_stats_atomic)(struct efx_nic *efx, u64 *full_stats,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/nic.c b/drivers/net/ethernet/sfc/siena/nic.c<br/>index 0ea0433a6230..32fce70085e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/nic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/nic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/nic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/nic.c</a></div><div class='hunk'>@@ -449,20 +449,20 @@ void efx_siena_get_regs(struct efx_nic *efx, void *buf)</div><div class='ctx'>  * Returns the number of visible statistics, i.e. the number of set</div><div class='ctx'>  * bits in the first @count bits of @mask for which a name is defined.</div><div class='ctx'>  */</div><div class='del'>-size_t efx_siena_describe_stats(const struct efx_hw_stat_desc *desc, size_t count,</div><div class='del'>-				const unsigned long *mask, u8 *names)</div><div class='add'>+size_t efx_siena_describe_stats(const struct efx_hw_stat_desc *desc,</div><div class='add'>+				size_t count, const unsigned long *mask,</div><div class='add'>+				u8 **names)</div><div class='ctx'> {</div><div class='ctx'> 	size_t visible = 0;</div><div class='ctx'> 	size_t index;</div><div class='ctx'> </div><div class='ctx'> 	for_each_set_bit(index, mask, count) {</div><div class='ctx'> 		if (desc[index].name) {</div><div class='del'>-			if (names) {</div><div class='del'>-				strscpy(names, desc[index].name,</div><div class='del'>-					ETH_GSTRING_LEN);</div><div class='del'>-				names += ETH_GSTRING_LEN;</div><div class='del'>-			}</div><div class='ctx'> 			++visible;</div><div class='add'>+			if (!names)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ethtool_puts(names, desc[index].name);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/nic_common.h b/drivers/net/ethernet/sfc/siena/nic_common.h<br/>index 3af0405eeaa4..b7fbe198008d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/nic_common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/nic_common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/nic_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/nic_common.h</a></div><div class='hunk'>@@ -239,8 +239,9 @@ void efx_siena_get_regs(struct efx_nic *efx, void *buf);</div><div class='ctx'> </div><div class='ctx'> #define EFX_MC_STATS_GENERATION_INVALID ((__force __le64)(-1))</div><div class='ctx'> </div><div class='del'>-size_t efx_siena_describe_stats(const struct efx_hw_stat_desc *desc, size_t count,</div><div class='del'>-				const unsigned long *mask, u8 *names);</div><div class='add'>+size_t efx_siena_describe_stats(const struct efx_hw_stat_desc *desc,</div><div class='add'>+				size_t count, const unsigned long *mask,</div><div class='add'>+				u8 **names);</div><div class='ctx'> void efx_siena_update_stats(const struct efx_hw_stat_desc *desc, size_t count,</div><div class='ctx'> 			    const unsigned long *mask, u64 *stats,</div><div class='ctx'> 			    const void *dma_buf, bool accumulate);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/ptp.c b/drivers/net/ethernet/sfc/siena/ptp.c<br/>index 85005196b4c5..062c77c92077 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/ptp.c</a></div><div class='hunk'>@@ -393,7 +393,7 @@ static const unsigned long efx_ptp_stat_mask[] = {</div><div class='ctx'> 	[0 ... BITS_TO_LONGS(PTP_STAT_COUNT) - 1] = ~0UL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-size_t efx_siena_ptp_describe_stats(struct efx_nic *efx, u8 *strings)</div><div class='add'>+size_t efx_siena_ptp_describe_stats(struct efx_nic *efx, u8 **strings)</div><div class='ctx'> {</div><div class='ctx'> 	if (!efx-&gt;ptp_data)</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/ptp.h b/drivers/net/ethernet/sfc/siena/ptp.h<br/>index b6133e7c5608..54840036ab67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/ptp.h</a></div><div class='hunk'>@@ -28,7 +28,7 @@ int efx_siena_ptp_change_mode(struct efx_nic *efx, bool enable_wanted,</div><div class='ctx'> 			      unsigned int new_mode);</div><div class='ctx'> int efx_siena_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);</div><div class='ctx'> void efx_siena_ptp_event(struct efx_nic *efx, efx_qword_t *ev);</div><div class='del'>-size_t efx_siena_ptp_describe_stats(struct efx_nic *efx, u8 *strings);</div><div class='add'>+size_t efx_siena_ptp_describe_stats(struct efx_nic *efx, u8 **strings);</div><div class='ctx'> size_t efx_siena_ptp_update_stats(struct efx_nic *efx, u64 *stats);</div><div class='ctx'> void efx_siena_time_sync_event(struct efx_channel *channel, efx_qword_t *ev);</div><div class='ctx'> void __efx_siena_rx_skb_attach_timestamp(struct efx_channel *channel,</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/rx_common.c b/drivers/net/ethernet/sfc/siena/rx_common.c<br/>index 082e35c6caaa..4ae09505e417 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/rx_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/rx_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/rx_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/rx_common.c</a></div><div class='hunk'>@@ -268,8 +268,6 @@ void efx_siena_init_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='ctx'> 			  "Failure to initialise XDP queue information rc=%d\n",</div><div class='ctx'> 			  rc);</div><div class='ctx'> 		efx-&gt;xdp_rxq_info_failed = true;</div><div class='del'>-	} else {</div><div class='del'>-		rx_queue-&gt;xdp_rxq_info_valid = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set up RX descriptor ring */</div><div class='hunk'>@@ -284,7 +282,7 @@ void efx_siena_fini_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='ctx'> 	netif_dbg(rx_queue-&gt;efx, drv, rx_queue-&gt;efx-&gt;net_dev,</div><div class='ctx'> 		  "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;rx_queue-&gt;slow_fill);</div><div class='add'>+	timer_delete_sync(&amp;rx_queue-&gt;slow_fill);</div><div class='ctx'> </div><div class='ctx'> 	/* Release RX buffers from the current read ptr to the write ptr */</div><div class='ctx'> 	if (rx_queue-&gt;buffer) {</div><div class='hunk'>@@ -299,10 +297,8 @@ void efx_siena_fini_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='ctx'> </div><div class='ctx'> 	efx_fini_rx_recycle_ring(rx_queue);</div><div class='ctx'> </div><div class='del'>-	if (rx_queue-&gt;xdp_rxq_info_valid)</div><div class='add'>+	if (xdp_rxq_info_is_reg(&amp;rx_queue-&gt;xdp_rxq_info))</div><div class='ctx'> 		xdp_rxq_info_unreg(&amp;rx_queue-&gt;xdp_rxq_info);</div><div class='del'>-</div><div class='del'>-	rx_queue-&gt;xdp_rxq_info_valid = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void efx_siena_remove_rx_queue(struct efx_rx_queue *rx_queue)</div><div class='hunk'>@@ -349,7 +345,8 @@ void efx_siena_free_rx_buffers(struct efx_rx_queue *rx_queue,</div><div class='ctx'> </div><div class='ctx'> void efx_siena_rx_slow_fill(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct efx_rx_queue *rx_queue = from_timer(rx_queue, t, slow_fill);</div><div class='add'>+	struct efx_rx_queue *rx_queue = timer_container_of(rx_queue, t,</div><div class='add'>+							   slow_fill);</div><div class='ctx'> </div><div class='ctx'> 	/* Post an event to cause NAPI to run and refill the queue */</div><div class='ctx'> 	efx_nic_generate_fill_event(rx_queue);</div><div class='hunk'>@@ -888,7 +885,7 @@ static void efx_filter_rfs_work(struct work_struct *data)</div><div class='ctx'> </div><div class='ctx'> 	/* Release references */</div><div class='ctx'> 	clear_bit(slot_idx, &amp;efx-&gt;rps_slot_map);</div><div class='del'>-	dev_put(req-&gt;net_dev);</div><div class='add'>+	netdev_put(req-&gt;net_dev, &amp;req-&gt;net_dev_tracker);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int efx_siena_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,</div><div class='hunk'>@@ -980,7 +977,8 @@ int efx_siena_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Queue the request */</div><div class='del'>-	dev_hold(req-&gt;net_dev = net_dev);</div><div class='add'>+	req-&gt;net_dev = net_dev;</div><div class='add'>+	netdev_hold(req-&gt;net_dev, &amp;req-&gt;net_dev_tracker, GFP_ATOMIC);</div><div class='ctx'> 	INIT_WORK(&amp;req-&gt;work, efx_filter_rfs_work);</div><div class='ctx'> 	req-&gt;rxq_index = rxq_index;</div><div class='ctx'> 	req-&gt;flow_id = flow_id;</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/siena/siena.c b/drivers/net/ethernet/sfc/siena/siena.c<br/>index ca33dc08e555..49f0c8a1a90a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/siena.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/siena/siena.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/siena/siena.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/siena/siena.c</a></div><div class='hunk'>@@ -545,7 +545,7 @@ static const unsigned long siena_stat_mask[] = {</div><div class='ctx'> 	[0 ... BITS_TO_LONGS(SIENA_STAT_COUNT) - 1] = ~0UL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static size_t siena_describe_nic_stats(struct efx_nic *efx, u8 *names)</div><div class='add'>+static size_t siena_describe_nic_stats(struct efx_nic *efx, u8 **names)</div><div class='ctx'> {</div><div class='ctx'> 	return efx_siena_describe_stats(siena_stat_desc, SIENA_STAT_COUNT,</div><div class='ctx'> 					siena_stat_mask, names);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/tc.c b/drivers/net/ethernet/sfc/tc.c<br/>index 0d93164988fc..fa94aa3cd5fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/tc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/tc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/tc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/tc.c</a></div><div class='hunk'>@@ -1043,7 +1043,7 @@ static int efx_tc_flower_handle_lhs_actions(struct efx_nic *efx,</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='ctx'> 			}</div><div class='ctx'> 			if (fa-&gt;ct.action) {</div><div class='del'>-				NL_SET_ERR_MSG_FMT_MOD(extack, "Unhandled ct.action %u for LHS rule\n",</div><div class='add'>+				NL_SET_ERR_MSG_FMT_MOD(extack, "Unhandled ct.action %u for LHS rule",</div><div class='ctx'> 						       fa-&gt;ct.action);</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1056,7 +1056,7 @@ static int efx_tc_flower_handle_lhs_actions(struct efx_nic *efx,</div><div class='ctx'> 			act-&gt;zone = ct_zone;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			NL_SET_ERR_MSG_FMT_MOD(extack, "Unhandled action %u for LHS rule\n",</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack, "Unhandled action %u for LHS rule",</div><div class='ctx'> 					       fa-&gt;id);</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1581,7 +1581,7 @@ static int efx_tc_flower_replace_foreign_lhs(struct efx_nic *efx,</div><div class='ctx'> </div><div class='ctx'> 	type = efx_tc_indr_netdev_type(net_dev);</div><div class='ctx'> 	if (type == EFX_ENCAP_TYPE_NONE) {</div><div class='del'>-		NL_SET_ERR_MSG_MOD(extack, "Egress encap match on unsupported tunnel device\n");</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Egress encap match on unsupported tunnel device");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sfc/tc_conntrack.c b/drivers/net/ethernet/sfc/tc_conntrack.c<br/>index d90206f27161..c0603f54cec3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/tc_conntrack.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/tc_conntrack.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/tc_conntrack.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/tc_conntrack.c</a></div><div class='hunk'>@@ -16,7 +16,7 @@ static int efx_tc_flow_block(enum tc_setup_type type, void *type_data,</div><div class='ctx'> 			     void *cb_priv);</div><div class='ctx'> </div><div class='ctx'> static const struct rhashtable_params efx_tc_ct_zone_ht_params = {</div><div class='del'>-	.key_len	= offsetof(struct efx_tc_ct_zone, linkage),</div><div class='add'>+	.key_len	= sizeof_field(struct efx_tc_ct_zone, zone),</div><div class='ctx'> 	.key_offset	= 0,</div><div class='ctx'> 	.head_offset	= offsetof(struct efx_tc_ct_zone, linkage),</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/tc_encap_actions.c b/drivers/net/ethernet/sfc/tc_encap_actions.c<br/>index 87443f9dfd22..eef06e48185d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/tc_encap_actions.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/tc_encap_actions.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/tc_encap_actions.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/tc_encap_actions.c</a></div><div class='hunk'>@@ -11,6 +11,8 @@</div><div class='ctx'> #include "tc_encap_actions.h"</div><div class='ctx'> #include "tc.h"</div><div class='ctx'> #include "mae.h"</div><div class='add'>+#include &lt;net/flow.h&gt;</div><div class='add'>+#include &lt;net/inet_dscp.h&gt;</div><div class='ctx'> #include &lt;net/vxlan.h&gt;</div><div class='ctx'> #include &lt;net/geneve.h&gt;</div><div class='ctx'> #include &lt;net/netevent.h&gt;</div><div class='hunk'>@@ -99,7 +101,7 @@ static int efx_bind_neigh(struct efx_nic *efx,</div><div class='ctx'> 	case EFX_ENCAP_TYPE_GENEVE:</div><div class='ctx'> 		flow4.flowi4_proto = IPPROTO_UDP;</div><div class='ctx'> 		flow4.fl4_dport = encap-&gt;key.tp_dst;</div><div class='del'>-		flow4.flowi4_tos = encap-&gt;key.tos;</div><div class='add'>+		flow4.flowi4_dscp = inet_dsfield_to_dscp(encap-&gt;key.tos);</div><div class='ctx'> 		flow4.daddr = encap-&gt;key.u.ipv4.dst;</div><div class='ctx'> 		flow4.saddr = encap-&gt;key.u.ipv4.src;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -442,7 +444,7 @@ static void efx_tc_update_encap(struct efx_nic *efx,</div><div class='ctx'> 			rule = container_of(acts, struct efx_tc_flow_rule, acts);</div><div class='ctx'> 			if (rule-&gt;fallback)</div><div class='ctx'> 				fallback = rule-&gt;fallback;</div><div class='del'>-			else /* fallback fallback: deliver to PF */</div><div class='add'>+			else /* fallback of the fallback: deliver to PF */</div><div class='ctx'> 				fallback = &amp;efx-&gt;tc-&gt;facts.pf;</div><div class='ctx'> 			rc = efx_mae_update_rule(efx, fallback-&gt;fw_id,</div><div class='ctx'> 						 rule-&gt;fw_id);</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/tx.c b/drivers/net/ethernet/sfc/tx.c<br/>index 822ec6564b2d..4dff19b6ef17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/tx.c</a></div><div class='hunk'>@@ -49,14 +49,6 @@ static inline u8 *efx_tx_get_copy_buffer(struct efx_tx_queue *tx_queue,</div><div class='ctx'> 	return (u8 *)page_buf-&gt;addr + offset;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u8 *efx_tx_get_copy_buffer_limited(struct efx_tx_queue *tx_queue,</div><div class='del'>-				   struct efx_tx_buffer *buffer, size_t len)</div><div class='del'>-{</div><div class='del'>-	if (len &gt; EFX_TX_CB_SIZE)</div><div class='del'>-		return NULL;</div><div class='del'>-	return efx_tx_get_copy_buffer(tx_queue, buffer);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void efx_tx_maybe_stop_queue(struct efx_tx_queue *txq1)</div><div class='ctx'> {</div><div class='ctx'> 	/* We need to consider all queues that the net core sees as one */</div><div class='head'>diff --git a/drivers/net/ethernet/sfc/tx.h b/drivers/net/ethernet/sfc/tx.h<br/>index f2c4d2f89919..f882749af8c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/tx.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sfc/tx.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sfc/tx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sfc/tx.h</a></div><div class='hunk'>@@ -15,9 +15,6 @@</div><div class='ctx'> unsigned int efx_tx_limit_len(struct efx_tx_queue *tx_queue,</div><div class='ctx'> 			      dma_addr_t dma_addr, unsigned int len);</div><div class='ctx'> </div><div class='del'>-u8 *efx_tx_get_copy_buffer_limited(struct efx_tx_queue *tx_queue,</div><div class='del'>-				   struct efx_tx_buffer *buffer, size_t len);</div><div class='del'>-</div><div class='ctx'> /* What TXQ type will satisfy the checksum offloads required for this skb? */</div><div class='ctx'> static inline unsigned int efx_tx_csum_type_skb(struct sk_buff *skb)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/sgi/ioc3-eth.c b/drivers/net/ethernet/sgi/ioc3-eth.c<br/>index 4535579018c9..39731069d99e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sgi/ioc3-eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sgi/ioc3-eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sgi/ioc3-eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sgi/ioc3-eth.c</a></div><div class='hunk'>@@ -570,7 +570,7 @@ static inline void ioc3_setup_duplex(struct ioc3_private *ip)</div><div class='ctx'> </div><div class='ctx'> static void ioc3_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ioc3_private *ip = from_timer(ip, t, ioc3_timer);</div><div class='add'>+	struct ioc3_private *ip = timer_container_of(ip, t, ioc3_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Print the link status if it has changed */</div><div class='ctx'> 	mii_check_media(&amp;ip-&gt;mii, 1, 0);</div><div class='hunk'>@@ -718,7 +718,7 @@ static void ioc3_init(struct net_device *dev)</div><div class='ctx'> 	struct ioc3_private *ip = netdev_priv(dev);</div><div class='ctx'> 	struct ioc3_ethregs *regs = ip-&gt;regs;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ip-&gt;ioc3_timer);	/* Kill if running	*/</div><div class='add'>+	timer_delete_sync(&amp;ip-&gt;ioc3_timer);	/* Kill if running	*/</div><div class='ctx'> </div><div class='ctx'> 	writel(EMCR_RST, &amp;regs-&gt;emcr);		/* Reset		*/</div><div class='ctx'> 	readl(&amp;regs-&gt;emcr);			/* Flush WB		*/</div><div class='hunk'>@@ -801,7 +801,7 @@ static int ioc3_close(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ioc3_private *ip = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ip-&gt;ioc3_timer);</div><div class='add'>+	timer_delete_sync(&amp;ip-&gt;ioc3_timer);</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -950,7 +950,7 @@ static int ioc3eth_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> out_stop:</div><div class='del'>-	del_timer_sync(&amp;ip-&gt;ioc3_timer);</div><div class='add'>+	timer_delete_sync(&amp;ip-&gt;ioc3_timer);</div><div class='ctx'> 	if (ip-&gt;rxr)</div><div class='ctx'> 		dma_free_coherent(ip-&gt;dma_dev, RX_RING_SIZE, ip-&gt;rxr,</div><div class='ctx'> 				  ip-&gt;rxr_dma);</div><div class='hunk'>@@ -971,7 +971,7 @@ static void ioc3eth_remove(struct platform_device *pdev)</div><div class='ctx'> 	dma_free_coherent(ip-&gt;dma_dev, TX_RING_SIZE + SZ_16K - 1, ip-&gt;tx_ring, ip-&gt;txr_dma);</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(dev);</div><div class='del'>-	del_timer_sync(&amp;ip-&gt;ioc3_timer);</div><div class='add'>+	timer_delete_sync(&amp;ip-&gt;ioc3_timer);</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sis/sis190.c b/drivers/net/ethernet/sis/sis190.c<br/>index dda4e488c77a..15e46e6ac262 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sis/sis190.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sis/sis190.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sis/sis190.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sis/sis190.c</a></div><div class='hunk'>@@ -758,7 +758,7 @@ static irqreturn_t sis190_irq(int irq, void *__dev)</div><div class='ctx'> </div><div class='ctx'> 	if (status &amp; LinkChange) {</div><div class='ctx'> 		netif_info(tp, intr, dev, "link change\n");</div><div class='del'>-		del_timer(&amp;tp-&gt;timer);</div><div class='add'>+		timer_delete(&amp;tp-&gt;timer);</div><div class='ctx'> 		schedule_work(&amp;tp-&gt;phy_task);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1023,7 +1023,7 @@ out_unlock:</div><div class='ctx'> </div><div class='ctx'> static void sis190_phy_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sis190_private *tp = from_timer(tp, t, timer);</div><div class='add'>+	struct sis190_private *tp = timer_container_of(tp, t, timer);</div><div class='ctx'> 	struct net_device *dev = tp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (likely(netif_running(dev)))</div><div class='hunk'>@@ -1034,7 +1034,7 @@ static inline void sis190_delete_timer(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sis190_private *tp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;tp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;tp-&gt;timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void sis190_request_timer(struct net_device *dev)</div><div class='head'>diff --git a/drivers/net/ethernet/sis/sis900.c b/drivers/net/ethernet/sis/sis900.c<br/>index 85b850372efe..b461918dc5f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sis/sis900.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sis/sis900.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sis/sis900.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sis/sis900.c</a></div><div class='hunk'>@@ -468,7 +468,7 @@ static int sis900_probe(struct pci_dev *pci_dev,</div><div class='ctx'> 	SET_NETDEV_DEV(net_dev, &amp;pci_dev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	/* We do a request_region() to register /proc/ioports info. */</div><div class='del'>-	ret = pci_request_regions(pci_dev, "sis900");</div><div class='add'>+	ret = pcim_request_all_regions(pci_dev, "sis900");</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> </div><div class='hunk'>@@ -1314,7 +1314,8 @@ static void sis630_set_eq(struct net_device *net_dev, u8 revision)</div><div class='ctx'> </div><div class='ctx'> static void sis900_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sis900_private *sis_priv = from_timer(sis_priv, t, timer);</div><div class='add'>+	struct sis900_private *sis_priv = timer_container_of(sis_priv, t,</div><div class='add'>+							     timer);</div><div class='ctx'> 	struct net_device *net_dev = sis_priv-&gt;mii_info.dev;</div><div class='ctx'> 	struct mii_phy *mii_phy = sis_priv-&gt;mii;</div><div class='ctx'> 	static const int next_tick = 5*HZ;</div><div class='hunk'>@@ -1983,7 +1984,7 @@ static int sis900_close(struct net_device *net_dev)</div><div class='ctx'> 	/* Stop the chip's Tx and Rx Status Machine */</div><div class='ctx'> 	sw32(cr, RxDIS | TxDIS | sr32(cr));</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;sis_priv-&gt;timer);</div><div class='add'>+	timer_delete(&amp;sis_priv-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(pdev-&gt;irq, net_dev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/smsc/epic100.c b/drivers/net/ethernet/smsc/epic100.c<br/>index 013e90d69182..45f703fe0e5a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/smsc/epic100.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/smsc/epic100.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/smsc/epic100.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/smsc/epic100.c</a></div><div class='hunk'>@@ -850,7 +850,7 @@ static void check_media(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void epic_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct epic_private *ep = from_timer(ep, t, timer);</div><div class='add'>+	struct epic_private *ep = timer_container_of(ep, t, timer);</div><div class='ctx'> 	struct net_device *dev = ep-&gt;mii.dev;</div><div class='ctx'> 	void __iomem *ioaddr = ep-&gt;ioaddr;</div><div class='ctx'> 	int next_tick = 5*HZ;</div><div class='hunk'>@@ -1292,7 +1292,7 @@ static int epic_close(struct net_device *dev)</div><div class='ctx'> 		netdev_dbg(dev, "Shutting down ethercard, status was %2.2x.\n",</div><div class='ctx'> 			   er32(INTSTAT));</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ep-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;ep-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	epic_disable_int(dev, ep);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/smsc/smc91c92_cs.c b/drivers/net/ethernet/smsc/smc91c92_cs.c<br/>index 86e3ec25df07..cc0c75694351 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/smsc/smc91c92_cs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/smsc/smc91c92_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/smsc/smc91c92_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/smsc/smc91c92_cs.c</a></div><div class='hunk'>@@ -1105,7 +1105,7 @@ static int smc_close(struct net_device *dev)</div><div class='ctx'>     outw(CTL_POWERDOWN, ioaddr + CONTROL );</div><div class='ctx'> </div><div class='ctx'>     link-&gt;open--;</div><div class='del'>-    del_timer_sync(&amp;smc-&gt;media);</div><div class='add'>+    timer_delete_sync(&amp;smc-&gt;media);</div><div class='ctx'> </div><div class='ctx'>     return 0;</div><div class='ctx'> } /* smc_close */</div><div class='hunk'>@@ -1713,7 +1713,7 @@ static void smc_reset(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void media_check(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-    struct smc_private *smc = from_timer(smc, t, media);</div><div class='add'>+    struct smc_private *smc = timer_container_of(smc, t, media);</div><div class='ctx'>     struct net_device *dev = smc-&gt;mii_if.dev;</div><div class='ctx'>     unsigned int ioaddr = dev-&gt;base_addr;</div><div class='ctx'>     u_short i, media, saved_bank;</div><div class='head'>diff --git a/drivers/net/ethernet/smsc/smsc911x.c b/drivers/net/ethernet/smsc/smsc911x.c<br/>index f539813878f5..3ebd0664c697 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/smsc/smsc911x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/smsc/smsc911x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/smsc/smsc911x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/smsc/smsc911x.c</a></div><div class='hunk'>@@ -43,7 +43,6 @@</div><div class='ctx'> #include &lt;linux/smsc911x.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='hunk'>@@ -2163,10 +2162,20 @@ static const struct net_device_ops smsc911x_netdev_ops = {</div><div class='ctx'> static void smsc911x_read_mac_address(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct smsc911x_data *pdata = netdev_priv(dev);</div><div class='del'>-	u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);</div><div class='del'>-	u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);</div><div class='add'>+	u32 mac_high16, mac_low32;</div><div class='ctx'> 	u8 addr[ETH_ALEN];</div><div class='ctx'> </div><div class='add'>+	mac_high16 = smsc911x_mac_read(pdata, ADDRH);</div><div class='add'>+	mac_low32 = smsc911x_mac_read(pdata, ADDRL);</div><div class='add'>+</div><div class='add'>+	/* The first mac_read in some setups can incorrectly read 0. Re-read it</div><div class='add'>+	 * to get the full MAC if this is observed.</div><div class='add'>+	 */</div><div class='add'>+	if (mac_high16 == 0) {</div><div class='add'>+		SMSC_TRACE(pdata, probe, "Re-read MAC ADDRH\n");</div><div class='add'>+		mac_high16 = smsc911x_mac_read(pdata, ADDRH);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	addr[0] = (u8)(mac_low32);</div><div class='ctx'> 	addr[1] = (u8)(mac_low32 &gt;&gt; 8);</div><div class='ctx'> 	addr[2] = (u8)(mac_low32 &gt;&gt; 16);</div><div class='hunk'>@@ -2351,7 +2360,7 @@ static void smsc911x_drv_remove(struct platform_device *pdev)</div><div class='ctx'> 	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* standard register acces */</div><div class='add'>+/* standard register access */</div><div class='ctx'> static const struct smsc911x_ops standard_smsc911x_ops = {</div><div class='ctx'> 	.reg_read = __smsc911x_reg_read,</div><div class='ctx'> 	.reg_write = __smsc911x_reg_write,</div><div class='head'>diff --git a/drivers/net/ethernet/socionext/netsec.c b/drivers/net/ethernet/socionext/netsec.c<br/>index dc99821c6226..ee890de69ffe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/socionext/netsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/socionext/netsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/socionext/netsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/socionext/netsec.c</a></div><div class='hunk'>@@ -970,7 +970,7 @@ static int netsec_process_rx(struct netsec_priv *priv, int budget)</div><div class='ctx'> 		struct netsec_de *de = dring-&gt;vaddr + (DESC_SZ * idx);</div><div class='ctx'> 		struct netsec_desc *desc = &amp;dring-&gt;desc[idx];</div><div class='ctx'> 		struct page *page = virt_to_page(desc-&gt;addr);</div><div class='del'>-		u32 xdp_result = NETSEC_XDP_PASS;</div><div class='add'>+		u32 metasize, xdp_result = NETSEC_XDP_PASS;</div><div class='ctx'> 		struct sk_buff *skb = NULL;</div><div class='ctx'> 		u16 pkt_len, desc_len;</div><div class='ctx'> 		dma_addr_t dma_handle;</div><div class='hunk'>@@ -1019,7 +1019,7 @@ static int netsec_process_rx(struct netsec_priv *priv, int budget)</div><div class='ctx'> 		prefetch(desc-&gt;addr);</div><div class='ctx'> </div><div class='ctx'> 		xdp_prepare_buff(&amp;xdp, desc-&gt;addr, NETSEC_RXBUF_HEADROOM,</div><div class='del'>-				 pkt_len, false);</div><div class='add'>+				 pkt_len, true);</div><div class='ctx'> </div><div class='ctx'> 		if (xdp_prog) {</div><div class='ctx'> 			xdp_result = netsec_run_xdp(priv, xdp_prog, &amp;xdp);</div><div class='hunk'>@@ -1048,6 +1048,9 @@ static int netsec_process_rx(struct netsec_priv *priv, int budget)</div><div class='ctx'> </div><div class='ctx'> 		skb_reserve(skb, xdp.data - xdp.data_hard_start);</div><div class='ctx'> 		skb_put(skb, xdp.data_end - xdp.data);</div><div class='add'>+		metasize = xdp.data - xdp.data_meta;</div><div class='add'>+		if (metasize)</div><div class='add'>+			skb_metadata_set(skb, metasize);</div><div class='ctx'> 		skb-&gt;protocol = eth_type_trans(skb, priv-&gt;ndev);</div><div class='ctx'> </div><div class='ctx'> 		if (priv-&gt;rx_cksum_offload_flag &amp;&amp;</div><div class='head'>diff --git a/drivers/net/ethernet/spacemit/Kconfig b/drivers/net/ethernet/spacemit/Kconfig<br/>new file mode 100644<br/>index 000000000000..85ef61a9b4ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/spacemit/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/spacemit/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+config NET_VENDOR_SPACEMIT</div><div class='add'>+	bool "SpacemiT devices"</div><div class='add'>+	default y</div><div class='add'>+	depends on ARCH_SPACEMIT || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  If you have a network (Ethernet) device belonging to this class,</div><div class='add'>+	  say Y.</div><div class='add'>+</div><div class='add'>+	  Note that the answer to this question does not directly affect</div><div class='add'>+	  the kernel: saying N will just cause the configurator to skip all</div><div class='add'>+	  the questions regarding SpacemiT devices. If you say Y, you will</div><div class='add'>+	  be asked for your specific chipset/driver in the following questions.</div><div class='add'>+</div><div class='add'>+if NET_VENDOR_SPACEMIT</div><div class='add'>+</div><div class='add'>+config SPACEMIT_K1_EMAC</div><div class='add'>+	tristate "SpacemiT K1 Ethernet MAC driver"</div><div class='add'>+	depends on ARCH_SPACEMIT || COMPILE_TEST</div><div class='add'>+	depends on MFD_SYSCON</div><div class='add'>+	depends on OF</div><div class='add'>+	default m if ARCH_SPACEMIT</div><div class='add'>+	select PHYLIB</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the Ethernet MAC in the SpacemiT K1 SoC.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called k1_emac.</div><div class='add'>+</div><div class='add'>+endif # NET_VENDOR_SPACEMIT</div><div class='head'>diff --git a/drivers/net/ethernet/spacemit/Makefile b/drivers/net/ethernet/spacemit/Makefile<br/>new file mode 100644<br/>index 000000000000..d29efd997a4f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/spacemit/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/spacemit/Makefile</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#</div><div class='add'>+# Makefile for the SpacemiT network device drivers.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_SPACEMIT_K1_EMAC) += k1_emac.o</div><div class='head'>diff --git a/drivers/net/ethernet/spacemit/k1_emac.c b/drivers/net/ethernet/spacemit/k1_emac.c<br/>new file mode 100644<br/>index 000000000000..220eb5ce7583<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/spacemit/k1_emac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/spacemit/k1_emac.c</a></div><div class='hunk'>@@ -0,0 +1,2162 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * SpacemiT K1 Ethernet driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023-2025 SpacemiT (Hangzhou) Technology Co. Ltd</div><div class='add'>+ * Copyright (C) 2025 Vivian Wang &lt;wangruikang@iscas.ac.cn&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/pm.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "k1_emac.h"</div><div class='add'>+</div><div class='add'>+#define DRIVER_NAME "k1_emac"</div><div class='add'>+</div><div class='add'>+#define EMAC_DEFAULT_BUFSIZE		1536</div><div class='add'>+#define EMAC_RX_BUF_2K			2048</div><div class='add'>+#define EMAC_RX_BUF_4K			4096</div><div class='add'>+</div><div class='add'>+/* Tuning parameters from SpacemiT */</div><div class='add'>+#define EMAC_TX_FRAMES			64</div><div class='add'>+#define EMAC_TX_COAL_TIMEOUT		40000</div><div class='add'>+#define EMAC_RX_FRAMES			64</div><div class='add'>+#define EMAC_RX_COAL_TIMEOUT		(600 * 312)</div><div class='add'>+</div><div class='add'>+#define DEFAULT_FC_PAUSE_TIME		0xffff</div><div class='add'>+#define DEFAULT_FC_FIFO_HIGH		1600</div><div class='add'>+#define DEFAULT_TX_ALMOST_FULL		0x1f8</div><div class='add'>+#define DEFAULT_TX_THRESHOLD		1518</div><div class='add'>+#define DEFAULT_RX_THRESHOLD		12</div><div class='add'>+#define DEFAULT_TX_RING_NUM		1024</div><div class='add'>+#define DEFAULT_RX_RING_NUM		1024</div><div class='add'>+#define DEFAULT_DMA_BURST		MREGBIT_BURST_16WORD</div><div class='add'>+#define HASH_TABLE_SIZE			64</div><div class='add'>+</div><div class='add'>+struct desc_buf {</div><div class='add'>+	u64 dma_addr;</div><div class='add'>+	void *buff_addr;</div><div class='add'>+	u16 dma_len;</div><div class='add'>+	u8 map_as_page;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct emac_tx_desc_buffer {</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct desc_buf buf[2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct emac_rx_desc_buffer {</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u64 dma_addr;</div><div class='add'>+	void *buff_addr;</div><div class='add'>+	u16 dma_len;</div><div class='add'>+	u8 map_as_page;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct emac_desc_ring - Software-side information for one descriptor ring</div><div class='add'>+ * Same structure used for both RX and TX</div><div class='add'>+ * @desc_addr: Virtual address to the descriptor ring memory</div><div class='add'>+ * @desc_dma_addr: DMA address of the descriptor ring</div><div class='add'>+ * @total_size: Size of ring in bytes</div><div class='add'>+ * @total_cnt: Number of descriptors</div><div class='add'>+ * @head: Next descriptor to associate a buffer with</div><div class='add'>+ * @tail: Next descriptor to check status bit</div><div class='add'>+ * @rx_desc_buf: Array of descriptors for RX</div><div class='add'>+ * @tx_desc_buf: Array of descriptors for TX, with max of two buffers each</div><div class='add'>+ */</div><div class='add'>+struct emac_desc_ring {</div><div class='add'>+	void *desc_addr;</div><div class='add'>+	dma_addr_t desc_dma_addr;</div><div class='add'>+	u32 total_size;</div><div class='add'>+	u32 total_cnt;</div><div class='add'>+	u32 head;</div><div class='add'>+	u32 tail;</div><div class='add'>+	union {</div><div class='add'>+		struct emac_rx_desc_buffer *rx_desc_buf;</div><div class='add'>+		struct emac_tx_desc_buffer *tx_desc_buf;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct emac_priv {</div><div class='add'>+	void __iomem *iobase;</div><div class='add'>+	u32 dma_buf_sz;</div><div class='add'>+	struct emac_desc_ring tx_ring;</div><div class='add'>+	struct emac_desc_ring rx_ring;</div><div class='add'>+</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct clk *bus_clk;</div><div class='add'>+	struct clk *ref_clk;</div><div class='add'>+	struct regmap *regmap_apmu;</div><div class='add'>+	u32 regmap_apmu_offset;</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='add'>+	phy_interface_t phy_interface;</div><div class='add'>+</div><div class='add'>+	union emac_hw_tx_stats tx_stats, tx_stats_off;</div><div class='add'>+	union emac_hw_rx_stats rx_stats, rx_stats_off;</div><div class='add'>+</div><div class='add'>+	u32 tx_count_frames;</div><div class='add'>+	u32 tx_coal_frames;</div><div class='add'>+	u32 tx_coal_timeout;</div><div class='add'>+	struct work_struct tx_timeout_task;</div><div class='add'>+</div><div class='add'>+	struct timer_list txtimer;</div><div class='add'>+	struct timer_list stats_timer;</div><div class='add'>+</div><div class='add'>+	u32 tx_delay;</div><div class='add'>+	u32 rx_delay;</div><div class='add'>+</div><div class='add'>+	bool flow_control_autoneg;</div><div class='add'>+	u8 flow_control;</div><div class='add'>+</div><div class='add'>+	/* Softirq-safe, hold while touching hardware statistics */</div><div class='add'>+	spinlock_t stats_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void emac_wr(struct emac_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	writel(val, priv-&gt;iobase + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 emac_rd(struct emac_priv *priv, u32 reg)</div><div class='add'>+{</div><div class='add'>+	return readl(priv-&gt;iobase + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_phy_interface_config(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0, mask = REF_CLK_SEL | RGMII_TX_CLK_SEL | PHY_INTF_RGMII;</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(priv-&gt;phy_interface))</div><div class='add'>+		val |= PHY_INTF_RGMII;</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(priv-&gt;regmap_apmu,</div><div class='add'>+			   priv-&gt;regmap_apmu_offset + APMU_EMAC_CTRL_REG,</div><div class='add'>+			   mask, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Where the hardware expects a MAC address, it is laid out in this high, med,</div><div class='add'>+ * low order in three consecutive registers and in this format.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void emac_set_mac_addr_reg(struct emac_priv *priv,</div><div class='add'>+				  const unsigned char *addr,</div><div class='add'>+				  u32 reg)</div><div class='add'>+{</div><div class='add'>+	emac_wr(priv, reg + sizeof(u32) * 0, addr[1] &lt;&lt; 8 | addr[0]);</div><div class='add'>+	emac_wr(priv, reg + sizeof(u32) * 1, addr[3] &lt;&lt; 8 | addr[2]);</div><div class='add'>+	emac_wr(priv, reg + sizeof(u32) * 2, addr[5] &lt;&lt; 8 | addr[4]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_set_mac_addr(struct emac_priv *priv, const unsigned char *addr)</div><div class='add'>+{</div><div class='add'>+	/* We use only one address, so set the same for flow control as well */</div><div class='add'>+	emac_set_mac_addr_reg(priv, addr, MAC_ADDRESS1_HIGH);</div><div class='add'>+	emac_set_mac_addr_reg(priv, addr, MAC_FC_SOURCE_ADDRESS_HIGH);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_reset_hw(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* Disable all interrupts */</div><div class='add'>+	emac_wr(priv, MAC_INTERRUPT_ENABLE, 0x0);</div><div class='add'>+	emac_wr(priv, DMA_INTERRUPT_ENABLE, 0x0);</div><div class='add'>+</div><div class='add'>+	/* Disable transmit and receive units */</div><div class='add'>+	emac_wr(priv, MAC_RECEIVE_CONTROL, 0x0);</div><div class='add'>+	emac_wr(priv, MAC_TRANSMIT_CONTROL, 0x0);</div><div class='add'>+</div><div class='add'>+	/* Disable DMA */</div><div class='add'>+	emac_wr(priv, DMA_CONTROL, 0x0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_init_hw(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* Destination address for 802.3x Ethernet flow control */</div><div class='add'>+	u8 fc_dest_addr[ETH_ALEN] = { 0x01, 0x80, 0xc2, 0x00, 0x00, 0x01 };</div><div class='add'>+</div><div class='add'>+	u32 rxirq = 0, dma = 0;</div><div class='add'>+</div><div class='add'>+	regmap_set_bits(priv-&gt;regmap_apmu,</div><div class='add'>+			priv-&gt;regmap_apmu_offset + APMU_EMAC_CTRL_REG,</div><div class='add'>+			AXI_SINGLE_ID);</div><div class='add'>+</div><div class='add'>+	/* Disable transmit and receive units */</div><div class='add'>+	emac_wr(priv, MAC_RECEIVE_CONTROL, 0x0);</div><div class='add'>+	emac_wr(priv, MAC_TRANSMIT_CONTROL, 0x0);</div><div class='add'>+</div><div class='add'>+	/* Enable MAC address 1 filtering */</div><div class='add'>+	emac_wr(priv, MAC_ADDRESS_CONTROL, MREGBIT_MAC_ADDRESS1_ENABLE);</div><div class='add'>+</div><div class='add'>+	/* Zero initialize the multicast hash table */</div><div class='add'>+	emac_wr(priv, MAC_MULTICAST_HASH_TABLE1, 0x0);</div><div class='add'>+	emac_wr(priv, MAC_MULTICAST_HASH_TABLE2, 0x0);</div><div class='add'>+	emac_wr(priv, MAC_MULTICAST_HASH_TABLE3, 0x0);</div><div class='add'>+	emac_wr(priv, MAC_MULTICAST_HASH_TABLE4, 0x0);</div><div class='add'>+</div><div class='add'>+	/* Configure thresholds */</div><div class='add'>+	emac_wr(priv, MAC_TRANSMIT_FIFO_ALMOST_FULL, DEFAULT_TX_ALMOST_FULL);</div><div class='add'>+	emac_wr(priv, MAC_TRANSMIT_PACKET_START_THRESHOLD,</div><div class='add'>+		DEFAULT_TX_THRESHOLD);</div><div class='add'>+	emac_wr(priv, MAC_RECEIVE_PACKET_START_THRESHOLD, DEFAULT_RX_THRESHOLD);</div><div class='add'>+</div><div class='add'>+	/* Configure flow control (enabled in emac_adjust_link() later) */</div><div class='add'>+	emac_set_mac_addr_reg(priv, fc_dest_addr, MAC_FC_SOURCE_ADDRESS_HIGH);</div><div class='add'>+	emac_wr(priv, MAC_FC_PAUSE_HIGH_THRESHOLD, DEFAULT_FC_FIFO_HIGH);</div><div class='add'>+	emac_wr(priv, MAC_FC_HIGH_PAUSE_TIME, DEFAULT_FC_PAUSE_TIME);</div><div class='add'>+	emac_wr(priv, MAC_FC_PAUSE_LOW_THRESHOLD, 0);</div><div class='add'>+</div><div class='add'>+	/* RX IRQ mitigation */</div><div class='add'>+	rxirq = FIELD_PREP(MREGBIT_RECEIVE_IRQ_FRAME_COUNTER_MASK,</div><div class='add'>+			   EMAC_RX_FRAMES);</div><div class='add'>+	rxirq |= FIELD_PREP(MREGBIT_RECEIVE_IRQ_TIMEOUT_COUNTER_MASK,</div><div class='add'>+			    EMAC_RX_COAL_TIMEOUT);</div><div class='add'>+	rxirq |= MREGBIT_RECEIVE_IRQ_MITIGATION_ENABLE;</div><div class='add'>+	emac_wr(priv, DMA_RECEIVE_IRQ_MITIGATION_CTRL, rxirq);</div><div class='add'>+</div><div class='add'>+	/* Disable and set DMA config */</div><div class='add'>+	emac_wr(priv, DMA_CONTROL, 0x0);</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, DMA_CONFIGURATION, MREGBIT_SOFTWARE_RESET);</div><div class='add'>+	usleep_range(9000, 10000);</div><div class='add'>+	emac_wr(priv, DMA_CONFIGURATION, 0x0);</div><div class='add'>+	usleep_range(9000, 10000);</div><div class='add'>+</div><div class='add'>+	dma |= MREGBIT_STRICT_BURST;</div><div class='add'>+	dma |= MREGBIT_DMA_64BIT_MODE;</div><div class='add'>+	dma |= DEFAULT_DMA_BURST;</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, DMA_CONFIGURATION, dma);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_dma_start_transmit(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* The actual value written does not matter */</div><div class='add'>+	emac_wr(priv, DMA_TRANSMIT_POLL_DEMAND, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_enable_interrupt(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = emac_rd(priv, DMA_INTERRUPT_ENABLE);</div><div class='add'>+	val |= MREGBIT_TRANSMIT_TRANSFER_DONE_INTR_ENABLE;</div><div class='add'>+	val |= MREGBIT_RECEIVE_TRANSFER_DONE_INTR_ENABLE;</div><div class='add'>+	emac_wr(priv, DMA_INTERRUPT_ENABLE, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_disable_interrupt(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = emac_rd(priv, DMA_INTERRUPT_ENABLE);</div><div class='add'>+	val &amp;= ~MREGBIT_TRANSMIT_TRANSFER_DONE_INTR_ENABLE;</div><div class='add'>+	val &amp;= ~MREGBIT_RECEIVE_TRANSFER_DONE_INTR_ENABLE;</div><div class='add'>+	emac_wr(priv, DMA_INTERRUPT_ENABLE, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 emac_tx_avail(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct emac_desc_ring *tx_ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	u32 avail;</div><div class='add'>+</div><div class='add'>+	if (tx_ring-&gt;tail &gt; tx_ring-&gt;head)</div><div class='add'>+		avail = tx_ring-&gt;tail - tx_ring-&gt;head - 1;</div><div class='add'>+	else</div><div class='add'>+		avail = tx_ring-&gt;total_cnt - tx_ring-&gt;head + tx_ring-&gt;tail - 1;</div><div class='add'>+</div><div class='add'>+	return avail;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_tx_coal_timer_resched(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	mod_timer(&amp;priv-&gt;txtimer,</div><div class='add'>+		  jiffies + usecs_to_jiffies(priv-&gt;tx_coal_timeout));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_tx_coal_timer(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = timer_container_of(priv, t, txtimer);</div><div class='add'>+</div><div class='add'>+	napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool emac_tx_should_interrupt(struct emac_priv *priv, u32 pkt_num)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;tx_count_frames += pkt_num;</div><div class='add'>+	if (likely(priv-&gt;tx_coal_frames &gt; priv-&gt;tx_count_frames)) {</div><div class='add'>+		emac_tx_coal_timer_resched(priv);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_count_frames = 0;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_free_tx_buf(struct emac_priv *priv, int i)</div><div class='add'>+{</div><div class='add'>+	struct emac_tx_desc_buffer *tx_buf;</div><div class='add'>+	struct emac_desc_ring *tx_ring;</div><div class='add'>+	struct desc_buf *buf;</div><div class='add'>+	int j;</div><div class='add'>+</div><div class='add'>+	tx_ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	tx_buf = &amp;tx_ring-&gt;tx_desc_buf[i];</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; 2; j++) {</div><div class='add'>+		buf = &amp;tx_buf-&gt;buf[j];</div><div class='add'>+		if (!buf-&gt;dma_addr)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (buf-&gt;map_as_page)</div><div class='add'>+			dma_unmap_page(&amp;priv-&gt;pdev-&gt;dev, buf-&gt;dma_addr,</div><div class='add'>+				       buf-&gt;dma_len, DMA_TO_DEVICE);</div><div class='add'>+		else</div><div class='add'>+			dma_unmap_single(&amp;priv-&gt;pdev-&gt;dev,</div><div class='add'>+					 buf-&gt;dma_addr, buf-&gt;dma_len,</div><div class='add'>+					 DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+		buf-&gt;dma_addr = 0;</div><div class='add'>+		buf-&gt;map_as_page = false;</div><div class='add'>+		buf-&gt;buff_addr = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tx_buf-&gt;skb) {</div><div class='add'>+		dev_kfree_skb_any(tx_buf-&gt;skb);</div><div class='add'>+		tx_buf-&gt;skb = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_clean_tx_desc_ring(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct emac_desc_ring *tx_ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; tx_ring-&gt;total_cnt; i++)</div><div class='add'>+		emac_free_tx_buf(priv, i);</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;head = 0;</div><div class='add'>+	tx_ring-&gt;tail = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_clean_rx_desc_ring(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct emac_rx_desc_buffer *rx_buf;</div><div class='add'>+	struct emac_desc_ring *rx_ring;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	rx_ring = &amp;priv-&gt;rx_ring;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; rx_ring-&gt;total_cnt; i++) {</div><div class='add'>+		rx_buf = &amp;rx_ring-&gt;rx_desc_buf[i];</div><div class='add'>+</div><div class='add'>+		if (!rx_buf-&gt;skb)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dma_unmap_single(&amp;priv-&gt;pdev-&gt;dev, rx_buf-&gt;dma_addr,</div><div class='add'>+				 rx_buf-&gt;dma_len, DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		dev_kfree_skb(rx_buf-&gt;skb);</div><div class='add'>+		rx_buf-&gt;skb = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;tail = 0;</div><div class='add'>+	rx_ring-&gt;head = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_alloc_tx_resources(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct emac_desc_ring *tx_ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	struct platform_device *pdev = priv-&gt;pdev;</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;tx_desc_buf = kcalloc(tx_ring-&gt;total_cnt,</div><div class='add'>+				       sizeof(*tx_ring-&gt;tx_desc_buf),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!tx_ring-&gt;tx_desc_buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;total_size = tx_ring-&gt;total_cnt * sizeof(struct emac_desc);</div><div class='add'>+	tx_ring-&gt;total_size = ALIGN(tx_ring-&gt;total_size, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;desc_addr = dma_alloc_coherent(&amp;pdev-&gt;dev, tx_ring-&gt;total_size,</div><div class='add'>+						&amp;tx_ring-&gt;desc_dma_addr,</div><div class='add'>+						GFP_KERNEL);</div><div class='add'>+	if (!tx_ring-&gt;desc_addr) {</div><div class='add'>+		kfree(tx_ring-&gt;tx_desc_buf);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;head = 0;</div><div class='add'>+	tx_ring-&gt;tail = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_alloc_rx_resources(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct emac_desc_ring *rx_ring = &amp;priv-&gt;rx_ring;</div><div class='add'>+	struct platform_device *pdev = priv-&gt;pdev;</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;rx_desc_buf = kcalloc(rx_ring-&gt;total_cnt,</div><div class='add'>+				       sizeof(*rx_ring-&gt;rx_desc_buf),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+	if (!rx_ring-&gt;rx_desc_buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;total_size = rx_ring-&gt;total_cnt * sizeof(struct emac_desc);</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;total_size = ALIGN(rx_ring-&gt;total_size, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;desc_addr = dma_alloc_coherent(&amp;pdev-&gt;dev, rx_ring-&gt;total_size,</div><div class='add'>+						&amp;rx_ring-&gt;desc_dma_addr,</div><div class='add'>+						GFP_KERNEL);</div><div class='add'>+	if (!rx_ring-&gt;desc_addr) {</div><div class='add'>+		kfree(rx_ring-&gt;rx_desc_buf);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;head = 0;</div><div class='add'>+	rx_ring-&gt;tail = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_free_tx_resources(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct emac_desc_ring *tr = &amp;priv-&gt;tx_ring;</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	emac_clean_tx_desc_ring(priv);</div><div class='add'>+</div><div class='add'>+	kfree(tr-&gt;tx_desc_buf);</div><div class='add'>+	tr-&gt;tx_desc_buf = NULL;</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(dev, tr-&gt;total_size, tr-&gt;desc_addr,</div><div class='add'>+			  tr-&gt;desc_dma_addr);</div><div class='add'>+	tr-&gt;desc_addr = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_free_rx_resources(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct emac_desc_ring *rr = &amp;priv-&gt;rx_ring;</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	emac_clean_rx_desc_ring(priv);</div><div class='add'>+</div><div class='add'>+	kfree(rr-&gt;rx_desc_buf);</div><div class='add'>+	rr-&gt;rx_desc_buf = NULL;</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(dev, rr-&gt;total_size, rr-&gt;desc_addr,</div><div class='add'>+			  rr-&gt;desc_dma_addr);</div><div class='add'>+	rr-&gt;desc_addr = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_tx_clean_desc(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct emac_desc_ring *tx_ring;</div><div class='add'>+	struct emac_desc *tx_desc;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	netif_tx_lock(ndev);</div><div class='add'>+</div><div class='add'>+	tx_ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+</div><div class='add'>+	i = tx_ring-&gt;tail;</div><div class='add'>+</div><div class='add'>+	while (i != tx_ring-&gt;head) {</div><div class='add'>+		tx_desc = &amp;((struct emac_desc *)tx_ring-&gt;desc_addr)[i];</div><div class='add'>+</div><div class='add'>+		/* Stop checking if desc still own by DMA */</div><div class='add'>+		if (READ_ONCE(tx_desc-&gt;desc0) &amp; TX_DESC_0_OWN)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		emac_free_tx_buf(priv, i);</div><div class='add'>+		memset(tx_desc, 0, sizeof(struct emac_desc));</div><div class='add'>+</div><div class='add'>+		if (++i == tx_ring-&gt;total_cnt)</div><div class='add'>+			i = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;tail = i;</div><div class='add'>+</div><div class='add'>+	if (unlikely(netif_queue_stopped(ndev) &amp;&amp;</div><div class='add'>+		     emac_tx_avail(priv) &gt; tx_ring-&gt;total_cnt / 4))</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+</div><div class='add'>+	netif_tx_unlock(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool emac_rx_frame_good(struct emac_priv *priv, struct emac_desc *desc)</div><div class='add'>+{</div><div class='add'>+	const char *msg;</div><div class='add'>+	u32 len;</div><div class='add'>+</div><div class='add'>+	len = FIELD_GET(RX_DESC_0_FRAME_PACKET_LENGTH_MASK, desc-&gt;desc0);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(!(desc-&gt;desc0 &amp; RX_DESC_0_LAST_DESCRIPTOR)))</div><div class='add'>+		msg = "Not last descriptor"; /* This would be a bug */</div><div class='add'>+	else if (desc-&gt;desc0 &amp; RX_DESC_0_FRAME_RUNT)</div><div class='add'>+		msg = "Runt frame";</div><div class='add'>+	else if (desc-&gt;desc0 &amp; RX_DESC_0_FRAME_CRC_ERR)</div><div class='add'>+		msg = "Frame CRC error";</div><div class='add'>+	else if (desc-&gt;desc0 &amp; RX_DESC_0_FRAME_MAX_LEN_ERR)</div><div class='add'>+		msg = "Frame exceeds max length";</div><div class='add'>+	else if (desc-&gt;desc0 &amp; RX_DESC_0_FRAME_JABBER_ERR)</div><div class='add'>+		msg = "Frame jabber error";</div><div class='add'>+	else if (desc-&gt;desc0 &amp; RX_DESC_0_FRAME_LENGTH_ERR)</div><div class='add'>+		msg = "Frame length error";</div><div class='add'>+	else if (len &lt;= ETH_FCS_LEN || len &gt; priv-&gt;dma_buf_sz)</div><div class='add'>+		msg = "Frame length unacceptable";</div><div class='add'>+	else</div><div class='add'>+		return true; /* All good */</div><div class='add'>+</div><div class='add'>+	dev_dbg_ratelimited(&amp;priv-&gt;ndev-&gt;dev, "RX error: %s", msg);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_alloc_rx_desc_buffers(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct emac_desc_ring *rx_ring = &amp;priv-&gt;rx_ring;</div><div class='add'>+	struct emac_desc rx_desc, *rx_desc_addr;</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct emac_rx_desc_buffer *rx_buf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	i = rx_ring-&gt;head;</div><div class='add'>+	rx_buf = &amp;rx_ring-&gt;rx_desc_buf[i];</div><div class='add'>+</div><div class='add'>+	while (!rx_buf-&gt;skb) {</div><div class='add'>+		skb = netdev_alloc_skb_ip_align(ndev, priv-&gt;dma_buf_sz);</div><div class='add'>+		if (!skb)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		skb-&gt;dev = ndev;</div><div class='add'>+</div><div class='add'>+		rx_buf-&gt;skb = skb;</div><div class='add'>+		rx_buf-&gt;dma_len = priv-&gt;dma_buf_sz;</div><div class='add'>+		rx_buf-&gt;dma_addr = dma_map_single(&amp;priv-&gt;pdev-&gt;dev, skb-&gt;data,</div><div class='add'>+						  priv-&gt;dma_buf_sz,</div><div class='add'>+						  DMA_FROM_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;priv-&gt;pdev-&gt;dev, rx_buf-&gt;dma_addr)) {</div><div class='add'>+			dev_err_ratelimited(&amp;ndev-&gt;dev, "Mapping skb failed\n");</div><div class='add'>+			goto err_free_skb;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rx_desc_addr = &amp;((struct emac_desc *)rx_ring-&gt;desc_addr)[i];</div><div class='add'>+</div><div class='add'>+		memset(&amp;rx_desc, 0, sizeof(rx_desc));</div><div class='add'>+</div><div class='add'>+		rx_desc.buffer_addr_1 = rx_buf-&gt;dma_addr;</div><div class='add'>+		rx_desc.desc1 = FIELD_PREP(RX_DESC_1_BUFFER_SIZE_1_MASK,</div><div class='add'>+					   rx_buf-&gt;dma_len);</div><div class='add'>+</div><div class='add'>+		if (++i == rx_ring-&gt;total_cnt) {</div><div class='add'>+			rx_desc.desc1 |= RX_DESC_1_END_RING;</div><div class='add'>+			i = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*rx_desc_addr = rx_desc;</div><div class='add'>+		dma_wmb();</div><div class='add'>+		WRITE_ONCE(rx_desc_addr-&gt;desc0, rx_desc.desc0 | RX_DESC_0_OWN);</div><div class='add'>+</div><div class='add'>+		rx_buf = &amp;rx_ring-&gt;rx_desc_buf[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;head = i;</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_free_skb:</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+	rx_buf-&gt;skb = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Returns number of packets received */</div><div class='add'>+static int emac_rx_clean_desc(struct emac_priv *priv, int budget)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct emac_rx_desc_buffer *rx_buf;</div><div class='add'>+	struct emac_desc_ring *rx_ring;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='add'>+	struct emac_desc *rx_desc;</div><div class='add'>+	u32 got = 0, skb_len, i;</div><div class='add'>+</div><div class='add'>+	rx_ring = &amp;priv-&gt;rx_ring;</div><div class='add'>+</div><div class='add'>+	i = rx_ring-&gt;tail;</div><div class='add'>+</div><div class='add'>+	while (budget--) {</div><div class='add'>+		rx_desc = &amp;((struct emac_desc *)rx_ring-&gt;desc_addr)[i];</div><div class='add'>+</div><div class='add'>+		/* Stop checking if rx_desc still owned by DMA */</div><div class='add'>+		if (READ_ONCE(rx_desc-&gt;desc0) &amp; RX_DESC_0_OWN)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		dma_rmb();</div><div class='add'>+</div><div class='add'>+		rx_buf = &amp;rx_ring-&gt;rx_desc_buf[i];</div><div class='add'>+</div><div class='add'>+		if (!rx_buf-&gt;skb)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		got++;</div><div class='add'>+</div><div class='add'>+		dma_unmap_single(&amp;priv-&gt;pdev-&gt;dev, rx_buf-&gt;dma_addr,</div><div class='add'>+				 rx_buf-&gt;dma_len, DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		if (likely(emac_rx_frame_good(priv, rx_desc))) {</div><div class='add'>+			skb = rx_buf-&gt;skb;</div><div class='add'>+</div><div class='add'>+			skb_len = FIELD_GET(RX_DESC_0_FRAME_PACKET_LENGTH_MASK,</div><div class='add'>+					    rx_desc-&gt;desc0);</div><div class='add'>+			skb_len -= ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+			skb_put(skb, skb_len);</div><div class='add'>+			skb-&gt;dev = ndev;</div><div class='add'>+			ndev-&gt;hard_header_len = ETH_HLEN;</div><div class='add'>+</div><div class='add'>+			skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='add'>+</div><div class='add'>+			skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+</div><div class='add'>+			napi_gro_receive(&amp;priv-&gt;napi, skb);</div><div class='add'>+</div><div class='add'>+			memset(rx_desc, 0, sizeof(struct emac_desc));</div><div class='add'>+			rx_buf-&gt;skb = NULL;</div><div class='add'>+		} else {</div><div class='add'>+			dev_kfree_skb_irq(rx_buf-&gt;skb);</div><div class='add'>+			rx_buf-&gt;skb = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (++i == rx_ring-&gt;total_cnt)</div><div class='add'>+			i = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;tail = i;</div><div class='add'>+</div><div class='add'>+	emac_alloc_rx_desc_buffers(priv);</div><div class='add'>+</div><div class='add'>+	return got;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_rx_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = container_of(napi, struct emac_priv, napi);</div><div class='add'>+	int work_done;</div><div class='add'>+</div><div class='add'>+	emac_tx_clean_desc(priv);</div><div class='add'>+</div><div class='add'>+	work_done = emac_rx_clean_desc(priv, budget);</div><div class='add'>+	if (work_done &lt; budget &amp;&amp; napi_complete_done(napi, work_done))</div><div class='add'>+		emac_enable_interrupt(priv);</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * For convenience, skb-&gt;data is fragment 0, frags[0] is fragment 1, etc.</div><div class='add'>+ *</div><div class='add'>+ * Each descriptor can hold up to two fragments, called buffer 1 and 2. For each</div><div class='add'>+ * fragment f, if f % 2 == 0, it uses buffer 1, otherwise it uses buffer 2.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int emac_tx_map_frag(struct device *dev, struct emac_desc *tx_desc,</div><div class='add'>+			    struct emac_tx_desc_buffer *tx_buf,</div><div class='add'>+			    struct sk_buff *skb, u32 frag_idx)</div><div class='add'>+{</div><div class='add'>+	bool map_as_page, buf_idx;</div><div class='add'>+	const skb_frag_t *frag;</div><div class='add'>+	phys_addr_t addr;</div><div class='add'>+	u32 len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	buf_idx = frag_idx % 2;</div><div class='add'>+</div><div class='add'>+	if (frag_idx == 0) {</div><div class='add'>+		/* Non-fragmented part */</div><div class='add'>+		len = skb_headlen(skb);</div><div class='add'>+		addr = dma_map_single(dev, skb-&gt;data, len, DMA_TO_DEVICE);</div><div class='add'>+		map_as_page = false;</div><div class='add'>+	} else {</div><div class='add'>+		/* Fragment */</div><div class='add'>+		frag = &amp;skb_shinfo(skb)-&gt;frags[frag_idx - 1];</div><div class='add'>+		len = skb_frag_size(frag);</div><div class='add'>+		addr = skb_frag_dma_map(dev, frag, 0, len, DMA_TO_DEVICE);</div><div class='add'>+		map_as_page = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = dma_mapping_error(dev, addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tx_buf-&gt;buf[buf_idx].dma_addr = addr;</div><div class='add'>+	tx_buf-&gt;buf[buf_idx].dma_len = len;</div><div class='add'>+	tx_buf-&gt;buf[buf_idx].map_as_page = map_as_page;</div><div class='add'>+</div><div class='add'>+	if (buf_idx == 0) {</div><div class='add'>+		tx_desc-&gt;buffer_addr_1 = addr;</div><div class='add'>+		tx_desc-&gt;desc1 |= FIELD_PREP(TX_DESC_1_BUFFER_SIZE_1_MASK, len);</div><div class='add'>+	} else {</div><div class='add'>+		tx_desc-&gt;buffer_addr_2 = addr;</div><div class='add'>+		tx_desc-&gt;desc1 |= FIELD_PREP(TX_DESC_1_BUFFER_SIZE_2_MASK, len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_tx_mem_map(struct emac_priv *priv, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct emac_desc_ring *tx_ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	struct emac_desc tx_desc, *tx_desc_addr;</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	struct emac_tx_desc_buffer *tx_buf;</div><div class='add'>+	u32 head, old_head, frag_num, f;</div><div class='add'>+	bool buf_idx;</div><div class='add'>+</div><div class='add'>+	frag_num = skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+	head = tx_ring-&gt;head;</div><div class='add'>+	old_head = head;</div><div class='add'>+</div><div class='add'>+	for (f = 0; f &lt; frag_num + 1; f++) {</div><div class='add'>+		buf_idx = f % 2;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * If using buffer 1, initialize a new desc. Otherwise, use</div><div class='add'>+		 * buffer 2 of previous fragment's desc.</div><div class='add'>+		 */</div><div class='add'>+		if (!buf_idx) {</div><div class='add'>+			tx_buf = &amp;tx_ring-&gt;tx_desc_buf[head];</div><div class='add'>+			tx_desc_addr =</div><div class='add'>+				&amp;((struct emac_desc *)tx_ring-&gt;desc_addr)[head];</div><div class='add'>+			memset(&amp;tx_desc, 0, sizeof(tx_desc));</div><div class='add'>+</div><div class='add'>+			/*</div><div class='add'>+			 * Give ownership for all but first desc initially. For</div><div class='add'>+			 * first desc, give at the end so DMA cannot start</div><div class='add'>+			 * reading uninitialized descs.</div><div class='add'>+			 */</div><div class='add'>+			if (head != old_head)</div><div class='add'>+				tx_desc.desc0 |= TX_DESC_0_OWN;</div><div class='add'>+</div><div class='add'>+			if (++head == tx_ring-&gt;total_cnt) {</div><div class='add'>+				/* Just used last desc in ring */</div><div class='add'>+				tx_desc.desc1 |= TX_DESC_1_END_RING;</div><div class='add'>+				head = 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (emac_tx_map_frag(dev, &amp;tx_desc, tx_buf, skb, f)) {</div><div class='add'>+			dev_err_ratelimited(&amp;priv-&gt;ndev-&gt;dev,</div><div class='add'>+					    "Map TX frag %d failed\n", f);</div><div class='add'>+			goto err_free_skb;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (f == 0)</div><div class='add'>+			tx_desc.desc1 |= TX_DESC_1_FIRST_SEGMENT;</div><div class='add'>+</div><div class='add'>+		if (f == frag_num) {</div><div class='add'>+			tx_desc.desc1 |= TX_DESC_1_LAST_SEGMENT;</div><div class='add'>+			tx_buf-&gt;skb = skb;</div><div class='add'>+			if (emac_tx_should_interrupt(priv, frag_num + 1))</div><div class='add'>+				tx_desc.desc1 |=</div><div class='add'>+					TX_DESC_1_INTERRUPT_ON_COMPLETION;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*tx_desc_addr = tx_desc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* All descriptors are ready, give ownership for first desc */</div><div class='add'>+	tx_desc_addr = &amp;((struct emac_desc *)tx_ring-&gt;desc_addr)[old_head];</div><div class='add'>+	dma_wmb();</div><div class='add'>+	WRITE_ONCE(tx_desc_addr-&gt;desc0, tx_desc_addr-&gt;desc0 | TX_DESC_0_OWN);</div><div class='add'>+</div><div class='add'>+	emac_dma_start_transmit(priv);</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;head = head;</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_free_skb:</div><div class='add'>+	dev_dstats_tx_dropped(priv-&gt;ndev);</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t emac_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int nfrags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (unlikely(emac_tx_avail(priv) &lt; nfrags + 1)) {</div><div class='add'>+		if (!netif_queue_stopped(ndev)) {</div><div class='add'>+			netif_stop_queue(ndev);</div><div class='add'>+			dev_err_ratelimited(dev, "TX ring full, stop TX queue\n");</div><div class='add'>+		}</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emac_tx_mem_map(priv, skb);</div><div class='add'>+</div><div class='add'>+	/* Make sure there is space in the ring for the next TX. */</div><div class='add'>+	if (unlikely(emac_tx_avail(priv) &lt;= MAX_SKB_FRAGS + 2))</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_set_mac_address(struct net_device *ndev, void *addr)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int ret = eth_mac_addr(ndev, addr);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* If running, set now; if not running it will be set in emac_up. */</div><div class='add'>+	if (netif_running(ndev))</div><div class='add'>+		emac_set_mac_addr(priv, ndev-&gt;dev_addr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_mac_multicast_filter_clear(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	emac_wr(priv, MAC_MULTICAST_HASH_TABLE1, 0x0);</div><div class='add'>+	emac_wr(priv, MAC_MULTICAST_HASH_TABLE2, 0x0);</div><div class='add'>+	emac_wr(priv, MAC_MULTICAST_HASH_TABLE3, 0x0);</div><div class='add'>+	emac_wr(priv, MAC_MULTICAST_HASH_TABLE4, 0x0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * The upper 6 bits of the Ethernet CRC of the MAC address is used as the hash</div><div class='add'>+ * when matching multicast addresses.</div><div class='add'>+ */</div><div class='add'>+static u32 emac_ether_addr_hash(u8 addr[ETH_ALEN])</div><div class='add'>+{</div><div class='add'>+	u32 crc32 = ether_crc(ETH_ALEN, addr);</div><div class='add'>+</div><div class='add'>+	return crc32 &gt;&gt; 26;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure Multicast and Promiscuous modes */</div><div class='add'>+static void emac_set_rx_mode(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct netdev_hw_addr *ha;</div><div class='add'>+	u32 mc_filter[4] = { 0 };</div><div class='add'>+	u32 hash, reg, bit, val;</div><div class='add'>+</div><div class='add'>+	val = emac_rd(priv, MAC_ADDRESS_CONTROL);</div><div class='add'>+</div><div class='add'>+	val &amp;= ~MREGBIT_PROMISCUOUS_MODE;</div><div class='add'>+</div><div class='add'>+	if (ndev-&gt;flags &amp; IFF_PROMISC) {</div><div class='add'>+		/* Enable promisc mode */</div><div class='add'>+		val |= MREGBIT_PROMISCUOUS_MODE;</div><div class='add'>+	} else if ((ndev-&gt;flags &amp; IFF_ALLMULTI) ||</div><div class='add'>+		   (netdev_mc_count(ndev) &gt; HASH_TABLE_SIZE)) {</div><div class='add'>+		/* Accept all multicast frames by setting every bit */</div><div class='add'>+		emac_wr(priv, MAC_MULTICAST_HASH_TABLE1, 0xffff);</div><div class='add'>+		emac_wr(priv, MAC_MULTICAST_HASH_TABLE2, 0xffff);</div><div class='add'>+		emac_wr(priv, MAC_MULTICAST_HASH_TABLE3, 0xffff);</div><div class='add'>+		emac_wr(priv, MAC_MULTICAST_HASH_TABLE4, 0xffff);</div><div class='add'>+	} else if (!netdev_mc_empty(ndev)) {</div><div class='add'>+		emac_mac_multicast_filter_clear(priv);</div><div class='add'>+		netdev_for_each_mc_addr(ha, ndev) {</div><div class='add'>+			/*</div><div class='add'>+			 * The hash table is an array of 4 16-bit registers. It</div><div class='add'>+			 * is treated like an array of 64 bits (bits[hash]).</div><div class='add'>+			 */</div><div class='add'>+			hash = emac_ether_addr_hash(ha-&gt;addr);</div><div class='add'>+			reg = hash / 16;</div><div class='add'>+			bit = hash % 16;</div><div class='add'>+			mc_filter[reg] |= BIT(bit);</div><div class='add'>+		}</div><div class='add'>+		emac_wr(priv, MAC_MULTICAST_HASH_TABLE1, mc_filter[0]);</div><div class='add'>+		emac_wr(priv, MAC_MULTICAST_HASH_TABLE2, mc_filter[1]);</div><div class='add'>+		emac_wr(priv, MAC_MULTICAST_HASH_TABLE3, mc_filter[2]);</div><div class='add'>+		emac_wr(priv, MAC_MULTICAST_HASH_TABLE4, mc_filter[3]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, MAC_ADDRESS_CONTROL, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_change_mtu(struct net_device *ndev, int mtu)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 frame_len;</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		netdev_err(ndev, "must be stopped to change MTU\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	frame_len = mtu + ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	if (frame_len &lt;= EMAC_DEFAULT_BUFSIZE)</div><div class='add'>+		priv-&gt;dma_buf_sz = EMAC_DEFAULT_BUFSIZE;</div><div class='add'>+	else if (frame_len &lt;= EMAC_RX_BUF_2K)</div><div class='add'>+		priv-&gt;dma_buf_sz = EMAC_RX_BUF_2K;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;dma_buf_sz = EMAC_RX_BUF_4K;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;mtu = mtu;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_tx_timeout(struct net_device *ndev, unsigned int txqueue)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	schedule_work(&amp;priv-&gt;tx_timeout_task);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_mii_read(struct mii_bus *bus, int phy_addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = bus-&gt;priv;</div><div class='add'>+	u32 cmd = 0, val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd |= FIELD_PREP(MREGBIT_PHY_ADDRESS, phy_addr);</div><div class='add'>+	cmd |= FIELD_PREP(MREGBIT_REGISTER_ADDRESS, regnum);</div><div class='add'>+	cmd |= MREGBIT_START_MDIO_TRANS | MREGBIT_MDIO_READ_WRITE;</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, MAC_MDIO_DATA, 0x0);</div><div class='add'>+	emac_wr(priv, MAC_MDIO_CONTROL, cmd);</div><div class='add'>+</div><div class='add'>+	ret = readl_poll_timeout(priv-&gt;iobase + MAC_MDIO_CONTROL, val,</div><div class='add'>+				 !(val &amp; MREGBIT_START_MDIO_TRANS), 100, 10000);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = emac_rd(priv, MAC_MDIO_DATA);</div><div class='add'>+	return FIELD_GET(MREGBIT_MDIO_DATA, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_mii_write(struct mii_bus *bus, int phy_addr, int regnum,</div><div class='add'>+			  u16 value)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = bus-&gt;priv;</div><div class='add'>+	u32 cmd = 0, val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, MAC_MDIO_DATA, value);</div><div class='add'>+</div><div class='add'>+	cmd |= FIELD_PREP(MREGBIT_PHY_ADDRESS, phy_addr);</div><div class='add'>+	cmd |= FIELD_PREP(MREGBIT_REGISTER_ADDRESS, regnum);</div><div class='add'>+	cmd |= MREGBIT_START_MDIO_TRANS;</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, MAC_MDIO_CONTROL, cmd);</div><div class='add'>+</div><div class='add'>+	ret = readl_poll_timeout(priv-&gt;iobase + MAC_MDIO_CONTROL, val,</div><div class='add'>+				 !(val &amp; MREGBIT_START_MDIO_TRANS), 100, 10000);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_mdio_init(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	struct device_node *mii_np;</div><div class='add'>+	struct mii_bus *mii;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mii = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!mii)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mii-&gt;priv = priv;</div><div class='add'>+	mii-&gt;name = "k1_emac_mii";</div><div class='add'>+	mii-&gt;read = emac_mii_read;</div><div class='add'>+	mii-&gt;write = emac_mii_write;</div><div class='add'>+	mii-&gt;parent = dev;</div><div class='add'>+	mii-&gt;phy_mask = ~0;</div><div class='add'>+	snprintf(mii-&gt;id, MII_BUS_ID_SIZE, "%s", priv-&gt;pdev-&gt;name);</div><div class='add'>+</div><div class='add'>+	mii_np = of_get_available_child_by_name(dev-&gt;of_node, "mdio-bus");</div><div class='add'>+</div><div class='add'>+	ret = devm_of_mdiobus_register(dev, mii, mii_np);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err_probe(dev, ret, "Failed to register mdio bus\n");</div><div class='add'>+</div><div class='add'>+	of_node_put(mii_np);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_set_tx_fc(struct emac_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = emac_rd(priv, MAC_FC_CONTROL);</div><div class='add'>+</div><div class='add'>+	FIELD_MODIFY(MREGBIT_FC_GENERATION_ENABLE, &amp;val, enable);</div><div class='add'>+	FIELD_MODIFY(MREGBIT_AUTO_FC_GENERATION_ENABLE, &amp;val, enable);</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, MAC_FC_CONTROL, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_set_rx_fc(struct emac_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 val = emac_rd(priv, MAC_FC_CONTROL);</div><div class='add'>+</div><div class='add'>+	FIELD_MODIFY(MREGBIT_FC_DECODE_ENABLE, &amp;val, enable);</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, MAC_FC_CONTROL, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_set_fc(struct emac_priv *priv, u8 fc)</div><div class='add'>+{</div><div class='add'>+	emac_set_tx_fc(priv, fc &amp; FLOW_CTRL_TX);</div><div class='add'>+	emac_set_rx_fc(priv, fc &amp; FLOW_CTRL_RX);</div><div class='add'>+	priv-&gt;flow_control = fc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_set_fc_autoneg(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = priv-&gt;ndev-&gt;phydev;</div><div class='add'>+	u32 local_adv, remote_adv;</div><div class='add'>+	u8 fc;</div><div class='add'>+</div><div class='add'>+	local_adv = linkmode_adv_to_lcl_adv_t(phydev-&gt;advertising);</div><div class='add'>+</div><div class='add'>+	remote_adv = 0;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;pause)</div><div class='add'>+		remote_adv |= LPA_PAUSE_CAP;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;asym_pause)</div><div class='add'>+		remote_adv |= LPA_PAUSE_ASYM;</div><div class='add'>+</div><div class='add'>+	fc = mii_resolve_flowctrl_fdx(local_adv, remote_adv);</div><div class='add'>+</div><div class='add'>+	priv-&gt;flow_control_autoneg = true;</div><div class='add'>+</div><div class='add'>+	emac_set_fc(priv, fc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Even though this MAC supports gigabit operation, it only provides 32-bit</div><div class='add'>+ * statistics counters. The most overflow-prone counters are the "bytes" ones,</div><div class='add'>+ * which at gigabit overflow about twice a minute.</div><div class='add'>+ *</div><div class='add'>+ * Therefore, we maintain the high 32 bits of counters ourselves, incrementing</div><div class='add'>+ * every time statistics seem to go backwards. Also, update periodically to</div><div class='add'>+ * catch overflows when we are not otherwise checking the statistics often</div><div class='add'>+ * enough.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define EMAC_STATS_TIMER_PERIOD		20</div><div class='add'>+</div><div class='add'>+static int emac_read_stat_cnt(struct emac_priv *priv, u8 cnt, u32 *res,</div><div class='add'>+			      u32 control_reg, u32 high_reg, u32 low_reg)</div><div class='add'>+{</div><div class='add'>+	u32 val, high, low;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* The "read" bit is the same for TX and RX */</div><div class='add'>+</div><div class='add'>+	val = MREGBIT_START_TX_COUNTER_READ | cnt;</div><div class='add'>+	emac_wr(priv, control_reg, val);</div><div class='add'>+	val = emac_rd(priv, control_reg);</div><div class='add'>+</div><div class='add'>+	ret = readl_poll_timeout_atomic(priv-&gt;iobase + control_reg, val,</div><div class='add'>+					!(val &amp; MREGBIT_START_TX_COUNTER_READ),</div><div class='add'>+					100, 10000);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(priv-&gt;ndev, "Read stat timeout\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	high = emac_rd(priv, high_reg);</div><div class='add'>+	low = emac_rd(priv, low_reg);</div><div class='add'>+	*res = high &lt;&lt; 16 | lower_16_bits(low);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_tx_read_stat_cnt(struct emac_priv *priv, u8 cnt, u32 *res)</div><div class='add'>+{</div><div class='add'>+	return emac_read_stat_cnt(priv, cnt, res, MAC_TX_STATCTR_CONTROL,</div><div class='add'>+				  MAC_TX_STATCTR_DATA_HIGH,</div><div class='add'>+				  MAC_TX_STATCTR_DATA_LOW);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_rx_read_stat_cnt(struct emac_priv *priv, u8 cnt, u32 *res)</div><div class='add'>+{</div><div class='add'>+	return emac_read_stat_cnt(priv, cnt, res, MAC_RX_STATCTR_CONTROL,</div><div class='add'>+				  MAC_RX_STATCTR_DATA_HIGH,</div><div class='add'>+				  MAC_RX_STATCTR_DATA_LOW);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_update_counter(u64 *counter, u32 new_low)</div><div class='add'>+{</div><div class='add'>+	u32 old_low = lower_32_bits(*counter);</div><div class='add'>+	u64 high = upper_32_bits(*counter);</div><div class='add'>+</div><div class='add'>+	if (old_low &gt; new_low) {</div><div class='add'>+		/* Overflowed, increment high 32 bits */</div><div class='add'>+		high++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*counter = (high &lt;&lt; 32) | new_low;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_stats_update(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u64 *tx_stats_off = priv-&gt;tx_stats_off.array;</div><div class='add'>+	u64 *rx_stats_off = priv-&gt;rx_stats_off.array;</div><div class='add'>+	u64 *tx_stats = priv-&gt;tx_stats.array;</div><div class='add'>+	u64 *rx_stats = priv-&gt;rx_stats.array;</div><div class='add'>+	u32 i, res, offset;</div><div class='add'>+</div><div class='add'>+	assert_spin_locked(&amp;priv-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	if (!netif_running(priv-&gt;ndev) || !netif_device_present(priv-&gt;ndev)) {</div><div class='add'>+		/* Not up, don't try to update */</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sizeof(priv-&gt;tx_stats) / sizeof(*tx_stats); i++) {</div><div class='add'>+		/*</div><div class='add'>+		 * If reading stats times out, everything is broken and there's</div><div class='add'>+		 * nothing we can do. Reading statistics also can't return an</div><div class='add'>+		 * error, so just return without updating and without</div><div class='add'>+		 * rescheduling.</div><div class='add'>+		 */</div><div class='add'>+		if (emac_tx_read_stat_cnt(priv, i, &amp;res))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Re-initializing while bringing interface up resets counters</div><div class='add'>+		 * to zero, so to provide continuity, we add the values saved</div><div class='add'>+		 * last time we did emac_down() to the new hardware-provided</div><div class='add'>+		 * value.</div><div class='add'>+		 */</div><div class='add'>+		offset = lower_32_bits(tx_stats_off[i]);</div><div class='add'>+		emac_update_counter(&amp;tx_stats[i], res + offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Similar remarks as TX stats */</div><div class='add'>+	for (i = 0; i &lt; sizeof(priv-&gt;rx_stats) / sizeof(*rx_stats); i++) {</div><div class='add'>+		if (emac_rx_read_stat_cnt(priv, i, &amp;res))</div><div class='add'>+			return;</div><div class='add'>+		offset = lower_32_bits(rx_stats_off[i]);</div><div class='add'>+		emac_update_counter(&amp;rx_stats[i], res + offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;priv-&gt;stats_timer, jiffies + EMAC_STATS_TIMER_PERIOD * HZ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_stats_timer(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = timer_container_of(priv, t, stats_timer);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;priv-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	emac_stats_update(priv);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;priv-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range emac_rmon_hist_ranges[] = {</div><div class='add'>+	{   64,   64 },</div><div class='add'>+	{   65,  127 },</div><div class='add'>+	{  128,  255 },</div><div class='add'>+	{  256,  511 },</div><div class='add'>+	{  512, 1023 },</div><div class='add'>+	{ 1024, 1518 },</div><div class='add'>+	{ 1519, 4096 },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Like dev_fetch_dstats(), but we only use tx_drops */</div><div class='add'>+static u64 emac_get_stat_tx_drops(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct pcpu_dstats *stats;</div><div class='add'>+	u64 tx_drops, total = 0;</div><div class='add'>+	unsigned int start;</div><div class='add'>+	int cpu;</div><div class='add'>+</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		stats = per_cpu_ptr(priv-&gt;ndev-&gt;dstats, cpu);</div><div class='add'>+		do {</div><div class='add'>+			start = u64_stats_fetch_begin(&amp;stats-&gt;syncp);</div><div class='add'>+			tx_drops = u64_stats_read(&amp;stats-&gt;tx_drops);</div><div class='add'>+		} while (u64_stats_fetch_retry(&amp;stats-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+		total += tx_drops;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return total;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_get_stats64(struct net_device *dev,</div><div class='add'>+			     struct rtnl_link_stats64 *storage)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(dev);</div><div class='add'>+	union emac_hw_tx_stats *tx_stats;</div><div class='add'>+	union emac_hw_rx_stats *rx_stats;</div><div class='add'>+</div><div class='add'>+	tx_stats = &amp;priv-&gt;tx_stats;</div><div class='add'>+	rx_stats = &amp;priv-&gt;rx_stats;</div><div class='add'>+</div><div class='add'>+	/* This is the only software counter */</div><div class='add'>+	storage-&gt;tx_dropped = emac_get_stat_tx_drops(priv);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	emac_stats_update(priv);</div><div class='add'>+</div><div class='add'>+	storage-&gt;tx_packets = tx_stats-&gt;stats.tx_ok_pkts;</div><div class='add'>+	storage-&gt;tx_bytes = tx_stats-&gt;stats.tx_ok_bytes;</div><div class='add'>+	storage-&gt;tx_errors = tx_stats-&gt;stats.tx_err_pkts;</div><div class='add'>+</div><div class='add'>+	storage-&gt;rx_packets = rx_stats-&gt;stats.rx_ok_pkts;</div><div class='add'>+	storage-&gt;rx_bytes = rx_stats-&gt;stats.rx_ok_bytes;</div><div class='add'>+	storage-&gt;rx_errors = rx_stats-&gt;stats.rx_err_total_pkts;</div><div class='add'>+	storage-&gt;rx_crc_errors = rx_stats-&gt;stats.rx_crc_err_pkts;</div><div class='add'>+	storage-&gt;rx_frame_errors = rx_stats-&gt;stats.rx_align_err_pkts;</div><div class='add'>+	storage-&gt;rx_length_errors = rx_stats-&gt;stats.rx_len_err_pkts;</div><div class='add'>+</div><div class='add'>+	storage-&gt;collisions = tx_stats-&gt;stats.tx_singleclsn_pkts;</div><div class='add'>+	storage-&gt;collisions += tx_stats-&gt;stats.tx_multiclsn_pkts;</div><div class='add'>+	storage-&gt;collisions += tx_stats-&gt;stats.tx_excessclsn_pkts;</div><div class='add'>+</div><div class='add'>+	storage-&gt;rx_missed_errors = rx_stats-&gt;stats.rx_drp_fifo_full_pkts;</div><div class='add'>+	storage-&gt;rx_missed_errors += rx_stats-&gt;stats.rx_truncate_fifo_full_pkts;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_get_rmon_stats(struct net_device *dev,</div><div class='add'>+				struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+				const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(dev);</div><div class='add'>+	union emac_hw_rx_stats *rx_stats;</div><div class='add'>+</div><div class='add'>+	rx_stats = &amp;priv-&gt;rx_stats;</div><div class='add'>+</div><div class='add'>+	*ranges = emac_rmon_hist_ranges;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	emac_stats_update(priv);</div><div class='add'>+</div><div class='add'>+	rmon_stats-&gt;undersize_pkts = rx_stats-&gt;stats.rx_len_undersize_pkts;</div><div class='add'>+	rmon_stats-&gt;oversize_pkts = rx_stats-&gt;stats.rx_len_oversize_pkts;</div><div class='add'>+	rmon_stats-&gt;fragments = rx_stats-&gt;stats.rx_len_fragment_pkts;</div><div class='add'>+	rmon_stats-&gt;jabbers = rx_stats-&gt;stats.rx_len_jabber_pkts;</div><div class='add'>+</div><div class='add'>+	/* Only RX has histogram stats */</div><div class='add'>+</div><div class='add'>+	rmon_stats-&gt;hist[0] = rx_stats-&gt;stats.rx_64_pkts;</div><div class='add'>+	rmon_stats-&gt;hist[1] = rx_stats-&gt;stats.rx_65_127_pkts;</div><div class='add'>+	rmon_stats-&gt;hist[2] = rx_stats-&gt;stats.rx_128_255_pkts;</div><div class='add'>+	rmon_stats-&gt;hist[3] = rx_stats-&gt;stats.rx_256_511_pkts;</div><div class='add'>+	rmon_stats-&gt;hist[4] = rx_stats-&gt;stats.rx_512_1023_pkts;</div><div class='add'>+	rmon_stats-&gt;hist[5] = rx_stats-&gt;stats.rx_1024_1518_pkts;</div><div class='add'>+	rmon_stats-&gt;hist[6] = rx_stats-&gt;stats.rx_1519_plus_pkts;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_get_eth_mac_stats(struct net_device *dev,</div><div class='add'>+				   struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(dev);</div><div class='add'>+	union emac_hw_tx_stats *tx_stats;</div><div class='add'>+	union emac_hw_rx_stats *rx_stats;</div><div class='add'>+</div><div class='add'>+	tx_stats = &amp;priv-&gt;tx_stats;</div><div class='add'>+	rx_stats = &amp;priv-&gt;rx_stats;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	emac_stats_update(priv);</div><div class='add'>+</div><div class='add'>+	mac_stats-&gt;MulticastFramesXmittedOK = tx_stats-&gt;stats.tx_multicast_pkts;</div><div class='add'>+	mac_stats-&gt;BroadcastFramesXmittedOK = tx_stats-&gt;stats.tx_broadcast_pkts;</div><div class='add'>+</div><div class='add'>+	mac_stats-&gt;MulticastFramesReceivedOK =</div><div class='add'>+		rx_stats-&gt;stats.rx_multicast_pkts;</div><div class='add'>+	mac_stats-&gt;BroadcastFramesReceivedOK =</div><div class='add'>+		rx_stats-&gt;stats.rx_broadcast_pkts;</div><div class='add'>+</div><div class='add'>+	mac_stats-&gt;SingleCollisionFrames = tx_stats-&gt;stats.tx_singleclsn_pkts;</div><div class='add'>+	mac_stats-&gt;MultipleCollisionFrames = tx_stats-&gt;stats.tx_multiclsn_pkts;</div><div class='add'>+	mac_stats-&gt;LateCollisions = tx_stats-&gt;stats.tx_lateclsn_pkts;</div><div class='add'>+	mac_stats-&gt;FramesAbortedDueToXSColls =</div><div class='add'>+		tx_stats-&gt;stats.tx_excessclsn_pkts;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_get_pause_stats(struct net_device *dev,</div><div class='add'>+				 struct ethtool_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(dev);</div><div class='add'>+	union emac_hw_tx_stats *tx_stats;</div><div class='add'>+	union emac_hw_rx_stats *rx_stats;</div><div class='add'>+</div><div class='add'>+	tx_stats = &amp;priv-&gt;tx_stats;</div><div class='add'>+	rx_stats = &amp;priv-&gt;rx_stats;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	emac_stats_update(priv);</div><div class='add'>+</div><div class='add'>+	pause_stats-&gt;tx_pause_frames = tx_stats-&gt;stats.tx_pause_pkts;</div><div class='add'>+	pause_stats-&gt;rx_pause_frames = rx_stats-&gt;stats.rx_pause_pkts;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Other statistics that are not derivable from standard statistics */</div><div class='add'>+</div><div class='add'>+#define EMAC_ETHTOOL_STAT(type, name) \</div><div class='add'>+	{ offsetof(type, stats.name) / sizeof(u64), #name }</div><div class='add'>+</div><div class='add'>+static const struct emac_ethtool_stats {</div><div class='add'>+	size_t offset;</div><div class='add'>+	char str[ETH_GSTRING_LEN];</div><div class='add'>+} emac_ethtool_rx_stats[] = {</div><div class='add'>+	EMAC_ETHTOOL_STAT(union emac_hw_rx_stats, rx_drp_fifo_full_pkts),</div><div class='add'>+	EMAC_ETHTOOL_STAT(union emac_hw_rx_stats, rx_truncate_fifo_full_pkts),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int emac_get_sset_count(struct net_device *dev, int sset)</div><div class='add'>+{</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		return ARRAY_SIZE(emac_ethtool_rx_stats);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_get_strings(struct net_device *dev, u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	switch (stringset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(emac_ethtool_rx_stats); i++) {</div><div class='add'>+			memcpy(data, emac_ethtool_rx_stats[i].str,</div><div class='add'>+			       ETH_GSTRING_LEN);</div><div class='add'>+			data += ETH_GSTRING_LEN;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_get_ethtool_stats(struct net_device *dev,</div><div class='add'>+				   struct ethtool_stats *stats, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(dev);</div><div class='add'>+	u64 *rx_stats = (u64 *)&amp;priv-&gt;rx_stats;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	emac_stats_update(priv);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(emac_ethtool_rx_stats); i++)</div><div class='add'>+		data[i] = rx_stats[emac_ethtool_rx_stats[i].offset];</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_ethtool_get_regs_len(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	return (EMAC_DMA_REG_CNT + EMAC_MAC_REG_CNT) * sizeof(u32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_ethtool_get_regs(struct net_device *dev,</div><div class='add'>+				  struct ethtool_regs *regs, void *space)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(dev);</div><div class='add'>+	u32 *reg_space = space;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	regs-&gt;version = 1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; EMAC_DMA_REG_CNT; i++)</div><div class='add'>+		reg_space[i] = emac_rd(priv, DMA_CONFIGURATION + i * 4);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; EMAC_MAC_REG_CNT; i++)</div><div class='add'>+		reg_space[i + EMAC_DMA_REG_CNT] =</div><div class='add'>+			emac_rd(priv, MAC_GLOBAL_CONTROL + i * 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_get_pauseparam(struct net_device *dev,</div><div class='add'>+				struct ethtool_pauseparam *pause)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	pause-&gt;autoneg = priv-&gt;flow_control_autoneg;</div><div class='add'>+	pause-&gt;tx_pause = !!(priv-&gt;flow_control &amp; FLOW_CTRL_TX);</div><div class='add'>+	pause-&gt;rx_pause = !!(priv-&gt;flow_control &amp; FLOW_CTRL_RX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_set_pauseparam(struct net_device *dev,</div><div class='add'>+			       struct ethtool_pauseparam *pause)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(dev);</div><div class='add'>+	u8 fc = 0;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(dev))</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	priv-&gt;flow_control_autoneg = pause-&gt;autoneg;</div><div class='add'>+</div><div class='add'>+	if (pause-&gt;autoneg) {</div><div class='add'>+		emac_set_fc_autoneg(priv);</div><div class='add'>+	} else {</div><div class='add'>+		if (pause-&gt;tx_pause)</div><div class='add'>+			fc |= FLOW_CTRL_TX;</div><div class='add'>+</div><div class='add'>+		if (pause-&gt;rx_pause)</div><div class='add'>+			fc |= FLOW_CTRL_RX;</div><div class='add'>+</div><div class='add'>+		emac_set_fc(priv, fc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_get_drvinfo(struct net_device *dev,</div><div class='add'>+			     struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	strscpy(info-&gt;driver, DRIVER_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	info-&gt;n_stats = ARRAY_SIZE(emac_ethtool_rx_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_tx_timeout_task(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct emac_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = container_of(work, struct emac_priv, tx_timeout_task);</div><div class='add'>+	ndev = priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	/* No need to reset if already down */</div><div class='add'>+	if (!netif_running(ndev)) {</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_err(ndev, "MAC reset due to TX timeout\n");</div><div class='add'>+</div><div class='add'>+	netif_trans_update(ndev); /* prevent tx timeout */</div><div class='add'>+	dev_close(ndev);</div><div class='add'>+	dev_open(ndev, NULL);</div><div class='add'>+</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_sw_init(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;dma_buf_sz = EMAC_DEFAULT_BUFSIZE;</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_ring.total_cnt = DEFAULT_TX_RING_NUM;</div><div class='add'>+	priv-&gt;rx_ring.total_cnt = DEFAULT_RX_RING_NUM;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;tx_timeout_task, emac_tx_timeout_task);</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_coal_frames = EMAC_TX_FRAMES;</div><div class='add'>+	priv-&gt;tx_coal_timeout = EMAC_TX_COAL_TIMEOUT;</div><div class='add'>+</div><div class='add'>+	timer_setup(&amp;priv-&gt;txtimer, emac_tx_coal_timer, 0);</div><div class='add'>+	timer_setup(&amp;priv-&gt;stats_timer, emac_stats_timer, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t emac_interrupt_handler(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = (struct net_device *)dev_id;</div><div class='add'>+	struct emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	bool should_schedule = false;</div><div class='add'>+	u32 clr = 0;</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	status = emac_rd(priv, DMA_STATUS_IRQ);</div><div class='add'>+</div><div class='add'>+	if (status &amp; MREGBIT_TRANSMIT_TRANSFER_DONE_IRQ) {</div><div class='add'>+		clr |= MREGBIT_TRANSMIT_TRANSFER_DONE_IRQ;</div><div class='add'>+		should_schedule = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (status &amp; MREGBIT_TRANSMIT_DES_UNAVAILABLE_IRQ)</div><div class='add'>+		clr |= MREGBIT_TRANSMIT_DES_UNAVAILABLE_IRQ;</div><div class='add'>+</div><div class='add'>+	if (status &amp; MREGBIT_TRANSMIT_DMA_STOPPED_IRQ)</div><div class='add'>+		clr |= MREGBIT_TRANSMIT_DMA_STOPPED_IRQ;</div><div class='add'>+</div><div class='add'>+	if (status &amp; MREGBIT_RECEIVE_TRANSFER_DONE_IRQ) {</div><div class='add'>+		clr |= MREGBIT_RECEIVE_TRANSFER_DONE_IRQ;</div><div class='add'>+		should_schedule = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (status &amp; MREGBIT_RECEIVE_DES_UNAVAILABLE_IRQ)</div><div class='add'>+		clr |= MREGBIT_RECEIVE_DES_UNAVAILABLE_IRQ;</div><div class='add'>+</div><div class='add'>+	if (status &amp; MREGBIT_RECEIVE_DMA_STOPPED_IRQ)</div><div class='add'>+		clr |= MREGBIT_RECEIVE_DMA_STOPPED_IRQ;</div><div class='add'>+</div><div class='add'>+	if (status &amp; MREGBIT_RECEIVE_MISSED_FRAME_IRQ)</div><div class='add'>+		clr |= MREGBIT_RECEIVE_MISSED_FRAME_IRQ;</div><div class='add'>+</div><div class='add'>+	if (should_schedule) {</div><div class='add'>+		if (napi_schedule_prep(&amp;priv-&gt;napi)) {</div><div class='add'>+			emac_disable_interrupt(priv);</div><div class='add'>+			__napi_schedule_irqoff(&amp;priv-&gt;napi);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, DMA_STATUS_IRQ, clr);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_configure_tx(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Set base address */</div><div class='add'>+	val = (u32)priv-&gt;tx_ring.desc_dma_addr;</div><div class='add'>+	emac_wr(priv, DMA_TRANSMIT_BASE_ADDRESS, val);</div><div class='add'>+</div><div class='add'>+	/* Set TX inter-frame gap value, enable transmit */</div><div class='add'>+	val = emac_rd(priv, MAC_TRANSMIT_CONTROL);</div><div class='add'>+	val &amp;= ~MREGBIT_IFG_LEN;</div><div class='add'>+	val |= MREGBIT_TRANSMIT_ENABLE;</div><div class='add'>+	val |= MREGBIT_TRANSMIT_AUTO_RETRY;</div><div class='add'>+	emac_wr(priv, MAC_TRANSMIT_CONTROL, val);</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, DMA_TRANSMIT_AUTO_POLL_COUNTER, 0x0);</div><div class='add'>+</div><div class='add'>+	/* Start TX DMA */</div><div class='add'>+	val = emac_rd(priv, DMA_CONTROL);</div><div class='add'>+	val |= MREGBIT_START_STOP_TRANSMIT_DMA;</div><div class='add'>+	emac_wr(priv, DMA_CONTROL, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_configure_rx(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Set base address */</div><div class='add'>+	val = (u32)priv-&gt;rx_ring.desc_dma_addr;</div><div class='add'>+	emac_wr(priv, DMA_RECEIVE_BASE_ADDRESS, val);</div><div class='add'>+</div><div class='add'>+	/* Enable receive */</div><div class='add'>+	val = emac_rd(priv, MAC_RECEIVE_CONTROL);</div><div class='add'>+	val |= MREGBIT_RECEIVE_ENABLE;</div><div class='add'>+	val |= MREGBIT_STORE_FORWARD;</div><div class='add'>+	emac_wr(priv, MAC_RECEIVE_CONTROL, val);</div><div class='add'>+</div><div class='add'>+	/* Start RX DMA */</div><div class='add'>+	val = emac_rd(priv, DMA_CONTROL);</div><div class='add'>+	val |= MREGBIT_START_STOP_RECEIVE_DMA;</div><div class='add'>+	emac_wr(priv, DMA_CONTROL, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_adjust_link(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct phy_device *phydev = dev-&gt;phydev;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;link) {</div><div class='add'>+		ctrl = emac_rd(priv, MAC_GLOBAL_CONTROL);</div><div class='add'>+</div><div class='add'>+		/* Update duplex and speed from PHY */</div><div class='add'>+</div><div class='add'>+		FIELD_MODIFY(MREGBIT_FULL_DUPLEX_MODE, &amp;ctrl,</div><div class='add'>+			     phydev-&gt;duplex == DUPLEX_FULL);</div><div class='add'>+</div><div class='add'>+		ctrl &amp;= ~MREGBIT_SPEED;</div><div class='add'>+</div><div class='add'>+		switch (phydev-&gt;speed) {</div><div class='add'>+		case SPEED_1000:</div><div class='add'>+			ctrl |= MREGBIT_SPEED_1000M;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			ctrl |= MREGBIT_SPEED_100M;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			ctrl |= MREGBIT_SPEED_10M;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			netdev_err(dev, "Unknown speed: %d\n", phydev-&gt;speed);</div><div class='add'>+			phydev-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		emac_wr(priv, MAC_GLOBAL_CONTROL, ctrl);</div><div class='add'>+</div><div class='add'>+		emac_set_fc_autoneg(priv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phy_print_status(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_update_delay_line(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 mask = 0, val = 0;</div><div class='add'>+</div><div class='add'>+	mask |= EMAC_RX_DLINE_EN;</div><div class='add'>+	mask |= EMAC_RX_DLINE_STEP_MASK | EMAC_RX_DLINE_CODE_MASK;</div><div class='add'>+	mask |= EMAC_TX_DLINE_EN;</div><div class='add'>+	mask |= EMAC_TX_DLINE_STEP_MASK | EMAC_TX_DLINE_CODE_MASK;</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(priv-&gt;phy_interface)) {</div><div class='add'>+		val |= EMAC_RX_DLINE_EN;</div><div class='add'>+		val |= FIELD_PREP(EMAC_RX_DLINE_STEP_MASK,</div><div class='add'>+				  EMAC_DLINE_STEP_15P6);</div><div class='add'>+		val |= FIELD_PREP(EMAC_RX_DLINE_CODE_MASK, priv-&gt;rx_delay);</div><div class='add'>+</div><div class='add'>+		val |= EMAC_TX_DLINE_EN;</div><div class='add'>+		val |= FIELD_PREP(EMAC_TX_DLINE_STEP_MASK,</div><div class='add'>+				  EMAC_DLINE_STEP_15P6);</div><div class='add'>+		val |= FIELD_PREP(EMAC_TX_DLINE_CODE_MASK, priv-&gt;tx_delay);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(priv-&gt;regmap_apmu,</div><div class='add'>+			   priv-&gt;regmap_apmu_offset + APMU_EMAC_DLINE_REG,</div><div class='add'>+			   mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_phy_connect(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = of_get_phy_mode(dev-&gt;of_node, &amp;priv-&gt;phy_interface);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "No phy-mode found");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (priv-&gt;phy_interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_err(ndev, "Unsupported PHY interface %s",</div><div class='add'>+			   phy_modes(priv-&gt;phy_interface));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	np = of_parse_phandle(dev-&gt;of_node, "phy-handle", 0);</div><div class='add'>+	if (!np &amp;&amp; of_phy_is_fixed_link(dev-&gt;of_node))</div><div class='add'>+		np = of_node_get(dev-&gt;of_node);</div><div class='add'>+</div><div class='add'>+	if (!np) {</div><div class='add'>+		netdev_err(ndev, "No PHY specified");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = emac_phy_interface_config(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_node_put;</div><div class='add'>+</div><div class='add'>+	phydev = of_phy_connect(ndev, np, &amp;emac_adjust_link, 0,</div><div class='add'>+				priv-&gt;phy_interface);</div><div class='add'>+	if (!phydev) {</div><div class='add'>+		netdev_err(ndev, "Could not attach to PHY\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err_node_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phy_support_asym_pause(phydev);</div><div class='add'>+</div><div class='add'>+	phydev-&gt;mac_managed_pm = true;</div><div class='add'>+</div><div class='add'>+	emac_update_delay_line(priv);</div><div class='add'>+</div><div class='add'>+err_node_put:</div><div class='add'>+	of_node_put(np);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_up(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = priv-&gt;pdev;</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pm_runtime_get_sync(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	ret = emac_phy_connect(ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "emac_phy_connect failed\n");</div><div class='add'>+		goto err_pm_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emac_init_hw(priv);</div><div class='add'>+</div><div class='add'>+	emac_set_mac_addr(priv, ndev-&gt;dev_addr);</div><div class='add'>+	emac_configure_tx(priv);</div><div class='add'>+	emac_configure_rx(priv);</div><div class='add'>+</div><div class='add'>+	emac_alloc_rx_desc_buffers(priv);</div><div class='add'>+</div><div class='add'>+	phy_start(ndev-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	ret = request_irq(priv-&gt;irq, emac_interrupt_handler, IRQF_SHARED,</div><div class='add'>+			  ndev-&gt;name, ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "request_irq failed\n");</div><div class='add'>+		goto err_reset_disconnect_phy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Don't enable MAC interrupts */</div><div class='add'>+	emac_wr(priv, MAC_INTERRUPT_ENABLE, 0x0);</div><div class='add'>+</div><div class='add'>+	/* Enable DMA interrupts */</div><div class='add'>+	emac_wr(priv, DMA_INTERRUPT_ENABLE,</div><div class='add'>+		MREGBIT_TRANSMIT_TRANSFER_DONE_INTR_ENABLE |</div><div class='add'>+			MREGBIT_TRANSMIT_DMA_STOPPED_INTR_ENABLE |</div><div class='add'>+			MREGBIT_RECEIVE_TRANSFER_DONE_INTR_ENABLE |</div><div class='add'>+			MREGBIT_RECEIVE_DMA_STOPPED_INTR_ENABLE |</div><div class='add'>+			MREGBIT_RECEIVE_MISSED_FRAME_INTR_ENABLE);</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;priv-&gt;stats_timer, jiffies);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_reset_disconnect_phy:</div><div class='add'>+	emac_reset_hw(priv);</div><div class='add'>+	phy_disconnect(ndev-&gt;phydev);</div><div class='add'>+</div><div class='add'>+err_pm_put:</div><div class='add'>+	pm_runtime_put_sync(&amp;pdev-&gt;dev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_down(struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = priv-&gt;pdev;</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	phy_disconnect(ndev-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	emac_wr(priv, MAC_INTERRUPT_ENABLE, 0x0);</div><div class='add'>+	emac_wr(priv, DMA_INTERRUPT_ENABLE, 0x0);</div><div class='add'>+</div><div class='add'>+	free_irq(priv-&gt;irq, ndev);</div><div class='add'>+</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;txtimer);</div><div class='add'>+	cancel_work_sync(&amp;priv-&gt;tx_timeout_task);</div><div class='add'>+</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;stats_timer);</div><div class='add'>+</div><div class='add'>+	emac_reset_hw(priv);</div><div class='add'>+</div><div class='add'>+	/* Update and save current stats, see emac_stats_update() for usage */</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	emac_stats_update(priv);</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_stats_off = priv-&gt;tx_stats;</div><div class='add'>+	priv-&gt;rx_stats_off = priv-&gt;rx_stats;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put_sync(&amp;pdev-&gt;dev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called when net interface is brought up. */</div><div class='add'>+static int emac_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;priv-&gt;pdev-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = emac_alloc_tx_resources(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Cannot allocate TX resources\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = emac_alloc_rx_resources(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Cannot allocate RX resources\n");</div><div class='add'>+		goto err_free_tx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = emac_up(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Error when bringing interface up\n");</div><div class='add'>+		goto err_free_rx;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_rx:</div><div class='add'>+	emac_free_rx_resources(priv);</div><div class='add'>+err_free_tx:</div><div class='add'>+	emac_free_tx_resources(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called when interface is brought down. */</div><div class='add'>+static int emac_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	emac_down(priv);</div><div class='add'>+	emac_free_tx_resources(priv);</div><div class='add'>+	emac_free_rx_resources(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops emac_ethtool_ops = {</div><div class='add'>+	.get_link_ksettings	= phy_ethtool_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings	= phy_ethtool_set_link_ksettings,</div><div class='add'>+	.nway_reset		= phy_ethtool_nway_reset,</div><div class='add'>+	.get_drvinfo		= emac_get_drvinfo,</div><div class='add'>+	.get_link		= ethtool_op_get_link,</div><div class='add'>+</div><div class='add'>+	.get_regs		= emac_ethtool_get_regs,</div><div class='add'>+	.get_regs_len		= emac_ethtool_get_regs_len,</div><div class='add'>+</div><div class='add'>+	.get_rmon_stats		= emac_get_rmon_stats,</div><div class='add'>+	.get_pause_stats	= emac_get_pause_stats,</div><div class='add'>+	.get_eth_mac_stats	= emac_get_eth_mac_stats,</div><div class='add'>+</div><div class='add'>+	.get_sset_count		= emac_get_sset_count,</div><div class='add'>+	.get_strings		= emac_get_strings,</div><div class='add'>+	.get_ethtool_stats	= emac_get_ethtool_stats,</div><div class='add'>+</div><div class='add'>+	.get_pauseparam		= emac_get_pauseparam,</div><div class='add'>+	.set_pauseparam		= emac_set_pauseparam,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops emac_netdev_ops = {</div><div class='add'>+	.ndo_open               = emac_open,</div><div class='add'>+	.ndo_stop               = emac_stop,</div><div class='add'>+	.ndo_start_xmit         = emac_start_xmit,</div><div class='add'>+	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+	.ndo_set_mac_address    = emac_set_mac_address,</div><div class='add'>+	.ndo_eth_ioctl          = phy_do_ioctl_running,</div><div class='add'>+	.ndo_change_mtu         = emac_change_mtu,</div><div class='add'>+	.ndo_tx_timeout         = emac_tx_timeout,</div><div class='add'>+	.ndo_set_rx_mode        = emac_set_rx_mode,</div><div class='add'>+	.ndo_get_stats64	= emac_get_stats64,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Currently we always use 15.6 ps/step for the delay line */</div><div class='add'>+</div><div class='add'>+static u32 delay_ps_to_unit(u32 ps)</div><div class='add'>+{</div><div class='add'>+	return DIV_ROUND_CLOSEST(ps * 10, 156);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 delay_unit_to_ps(u32 unit)</div><div class='add'>+{</div><div class='add'>+	return DIV_ROUND_CLOSEST(unit * 156, 10);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define EMAC_MAX_DELAY_UNIT	FIELD_MAX(EMAC_TX_DLINE_CODE_MASK)</div><div class='add'>+</div><div class='add'>+/* Minus one just to be safe from rounding errors */</div><div class='add'>+#define EMAC_MAX_DELAY_PS	(delay_unit_to_ps(EMAC_MAX_DELAY_UNIT - 1))</div><div class='add'>+</div><div class='add'>+static int emac_config_dt(struct platform_device *pdev, struct emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	u8 mac_addr[ETH_ALEN] = { 0 };</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;iobase = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(priv-&gt;iobase))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(priv-&gt;iobase),</div><div class='add'>+				     "ioremap failed\n");</div><div class='add'>+</div><div class='add'>+	priv-&gt;regmap_apmu =</div><div class='add'>+		syscon_regmap_lookup_by_phandle_args(np, "spacemit,apmu", 1,</div><div class='add'>+						     &amp;priv-&gt;regmap_apmu_offset);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(priv-&gt;regmap_apmu))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(priv-&gt;regmap_apmu),</div><div class='add'>+				     "failed to get syscon\n");</div><div class='add'>+</div><div class='add'>+	priv-&gt;irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (priv-&gt;irq &lt; 0)</div><div class='add'>+		return priv-&gt;irq;</div><div class='add'>+</div><div class='add'>+	ret = of_get_mac_address(np, mac_addr);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret == -EPROBE_DEFER)</div><div class='add'>+			return dev_err_probe(dev, ret,</div><div class='add'>+					     "Can't get MAC address\n");</div><div class='add'>+</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Using random MAC address\n");</div><div class='add'>+		eth_hw_addr_random(priv-&gt;ndev);</div><div class='add'>+	} else {</div><div class='add'>+		eth_hw_addr_set(priv-&gt;ndev, mac_addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_delay = 0;</div><div class='add'>+	priv-&gt;rx_delay = 0;</div><div class='add'>+</div><div class='add'>+	of_property_read_u32(np, "tx-internal-delay-ps", &amp;priv-&gt;tx_delay);</div><div class='add'>+	of_property_read_u32(np, "rx-internal-delay-ps", &amp;priv-&gt;rx_delay);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_delay &gt; EMAC_MAX_DELAY_PS) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"tx-internal-delay-ps too large: max %d, got %d",</div><div class='add'>+			EMAC_MAX_DELAY_PS, priv-&gt;tx_delay);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;rx_delay &gt; EMAC_MAX_DELAY_PS) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"rx-internal-delay-ps too large: max %d, got %d",</div><div class='add'>+			EMAC_MAX_DELAY_PS, priv-&gt;rx_delay);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_delay = delay_ps_to_unit(priv-&gt;tx_delay);</div><div class='add'>+	priv-&gt;rx_delay = delay_ps_to_unit(priv-&gt;rx_delay);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_phy_deregister_fixed_link(void *data)</div><div class='add'>+{</div><div class='add'>+	struct device_node *of_node = data;</div><div class='add'>+</div><div class='add'>+	of_phy_deregister_fixed_link(of_node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct reset_control *reset;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct emac_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ndev = devm_alloc_etherdev(dev, sizeof(struct emac_priv));</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;hw_features = NETIF_F_SG;</div><div class='add'>+	ndev-&gt;features |= ndev-&gt;hw_features;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;max_mtu = EMAC_RX_BUF_4K - (ETH_HLEN + ETH_FCS_LEN);</div><div class='add'>+	ndev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_DSTATS;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+	priv-&gt;pdev = pdev;</div><div class='add'>+	platform_set_drvdata(pdev, priv);</div><div class='add'>+</div><div class='add'>+	ret = emac_config_dt(pdev, priv);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return dev_err_probe(dev, ret, "Configuration failed\n");</div><div class='add'>+</div><div class='add'>+	ndev-&gt;watchdog_timeo = 5 * HZ;</div><div class='add'>+	ndev-&gt;base_addr = (unsigned long)priv-&gt;iobase;</div><div class='add'>+	ndev-&gt;irq = priv-&gt;irq;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;emac_ethtool_ops;</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;emac_netdev_ops;</div><div class='add'>+</div><div class='add'>+	devm_pm_runtime_enable(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;bus_clk = devm_clk_get_enabled(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(priv-&gt;bus_clk))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(priv-&gt;bus_clk),</div><div class='add'>+				     "Failed to get clock\n");</div><div class='add'>+</div><div class='add'>+	reset = devm_reset_control_get_optional_exclusive_deasserted(&amp;pdev-&gt;dev,</div><div class='add'>+								     NULL);</div><div class='add'>+	if (IS_ERR(reset))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(reset),</div><div class='add'>+				     "Failed to get reset\n");</div><div class='add'>+</div><div class='add'>+	if (of_phy_is_fixed_link(dev-&gt;of_node)) {</div><div class='add'>+		ret = of_phy_register_fixed_link(dev-&gt;of_node);</div><div class='add'>+		if (ret)</div><div class='add'>+			return dev_err_probe(dev, ret,</div><div class='add'>+					     "Failed to register fixed-link\n");</div><div class='add'>+</div><div class='add'>+		ret = devm_add_action_or_reset(dev,</div><div class='add'>+					       emac_phy_deregister_fixed_link,</div><div class='add'>+					       dev-&gt;of_node);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "devm_add_action_or_reset failed\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emac_sw_init(priv);</div><div class='add'>+</div><div class='add'>+	ret = emac_mdio_init(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_timer_delete;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	ret = devm_register_netdev(dev, ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "devm_register_netdev failed\n");</div><div class='add'>+		goto err_timer_delete;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_napi_add(ndev, &amp;priv-&gt;napi, emac_rx_poll);</div><div class='add'>+	netif_carrier_off(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_timer_delete:</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;txtimer);</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;stats_timer);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	timer_shutdown_sync(&amp;priv-&gt;txtimer);</div><div class='add'>+	cancel_work_sync(&amp;priv-&gt;tx_timeout_task);</div><div class='add'>+</div><div class='add'>+	timer_shutdown_sync(&amp;priv-&gt;stats_timer);</div><div class='add'>+</div><div class='add'>+	emac_reset_hw(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;bus_clk);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "Failed to enable bus clock: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!netif_running(ndev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = emac_open(ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		clk_disable_unprepare(priv-&gt;bus_clk);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_device_attach(ndev);</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;priv-&gt;stats_timer, jiffies);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct emac_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	if (!ndev || !netif_running(ndev)) {</div><div class='add'>+		clk_disable_unprepare(priv-&gt;bus_clk);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emac_stop(ndev);</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(priv-&gt;bus_clk);</div><div class='add'>+	netif_device_detach(ndev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops emac_pm_ops = {</div><div class='add'>+	SYSTEM_SLEEP_PM_OPS(emac_suspend, emac_resume)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id emac_of_match[] = {</div><div class='add'>+	{ .compatible = "spacemit,k1-emac" },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, emac_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver emac_driver = {</div><div class='add'>+	.probe = emac_probe,</div><div class='add'>+	.remove = emac_remove,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRIVER_NAME,</div><div class='add'>+		.of_match_table = of_match_ptr(emac_of_match),</div><div class='add'>+		.pm = &amp;emac_pm_ops,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(emac_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("SpacemiT K1 Ethernet driver");</div><div class='add'>+MODULE_AUTHOR("Vivian Wang &lt;wangruikang@iscas.ac.cn&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/spacemit/k1_emac.h b/drivers/net/ethernet/spacemit/k1_emac.h<br/>new file mode 100644<br/>index 000000000000..577efe66573e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/spacemit/k1_emac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/spacemit/k1_emac.h</a></div><div class='hunk'>@@ -0,0 +1,416 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * SpacemiT K1 Ethernet hardware definitions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023-2025 SpacemiT (Hangzhou) Technology Co. Ltd</div><div class='add'>+ * Copyright (C) 2025 Vivian Wang &lt;wangruikang@iscas.ac.cn&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _K1_EMAC_H_</div><div class='add'>+#define _K1_EMAC_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/stddef.h&gt;</div><div class='add'>+</div><div class='add'>+/* APMU syscon registers */</div><div class='add'>+</div><div class='add'>+#define APMU_EMAC_CTRL_REG				0x0</div><div class='add'>+</div><div class='add'>+#define PHY_INTF_RGMII					BIT(2)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Only valid for RMII mode</div><div class='add'>+ * 0: Ref clock from External PHY</div><div class='add'>+ * 1: Ref clock from SoC</div><div class='add'>+ */</div><div class='add'>+#define REF_CLK_SEL					BIT(3)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Function clock select</div><div class='add'>+ * 0: 208 MHz</div><div class='add'>+ * 1: 312 MHz</div><div class='add'>+ */</div><div class='add'>+#define FUNC_CLK_SEL					BIT(4)</div><div class='add'>+</div><div class='add'>+/* Only valid for RMII, invert TX clk */</div><div class='add'>+#define RMII_TX_CLK_SEL					BIT(6)</div><div class='add'>+</div><div class='add'>+/* Only valid for RMII, invert RX clk */</div><div class='add'>+#define RMII_RX_CLK_SEL					BIT(7)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Only valid for RGMII</div><div class='add'>+ * 0: TX clk from RX clk</div><div class='add'>+ * 1: TX clk from SoC</div><div class='add'>+ */</div><div class='add'>+#define RGMII_TX_CLK_SEL				BIT(8)</div><div class='add'>+</div><div class='add'>+#define PHY_IRQ_EN					BIT(12)</div><div class='add'>+#define AXI_SINGLE_ID					BIT(13)</div><div class='add'>+</div><div class='add'>+#define APMU_EMAC_DLINE_REG				0x4</div><div class='add'>+</div><div class='add'>+#define EMAC_RX_DLINE_EN				BIT(0)</div><div class='add'>+#define EMAC_RX_DLINE_STEP_MASK				GENMASK(5, 4)</div><div class='add'>+#define EMAC_RX_DLINE_CODE_MASK				GENMASK(15, 8)</div><div class='add'>+</div><div class='add'>+#define EMAC_TX_DLINE_EN				BIT(16)</div><div class='add'>+#define EMAC_TX_DLINE_STEP_MASK				GENMASK(21, 20)</div><div class='add'>+#define EMAC_TX_DLINE_CODE_MASK				GENMASK(31, 24)</div><div class='add'>+</div><div class='add'>+#define EMAC_DLINE_STEP_15P6				0  /* 15.6 ps/step */</div><div class='add'>+#define EMAC_DLINE_STEP_24P4				1  /* 24.4 ps/step */</div><div class='add'>+#define EMAC_DLINE_STEP_29P7				2  /* 29.7 ps/step */</div><div class='add'>+#define EMAC_DLINE_STEP_35P1				3  /* 35.1 ps/step */</div><div class='add'>+</div><div class='add'>+/* DMA register set */</div><div class='add'>+#define DMA_CONFIGURATION				0x0000</div><div class='add'>+#define DMA_CONTROL					0x0004</div><div class='add'>+#define DMA_STATUS_IRQ					0x0008</div><div class='add'>+#define DMA_INTERRUPT_ENABLE				0x000c</div><div class='add'>+</div><div class='add'>+#define DMA_TRANSMIT_AUTO_POLL_COUNTER			0x0010</div><div class='add'>+#define DMA_TRANSMIT_POLL_DEMAND			0x0014</div><div class='add'>+#define DMA_RECEIVE_POLL_DEMAND				0x0018</div><div class='add'>+</div><div class='add'>+#define DMA_TRANSMIT_BASE_ADDRESS			0x001c</div><div class='add'>+#define DMA_RECEIVE_BASE_ADDRESS			0x0020</div><div class='add'>+#define DMA_MISSED_FRAME_COUNTER			0x0024</div><div class='add'>+#define DMA_STOP_FLUSH_COUNTER				0x0028</div><div class='add'>+</div><div class='add'>+#define DMA_RECEIVE_IRQ_MITIGATION_CTRL			0x002c</div><div class='add'>+</div><div class='add'>+#define DMA_CURRENT_TRANSMIT_DESCRIPTOR_POINTER		0x0030</div><div class='add'>+#define DMA_CURRENT_TRANSMIT_BUFFER_POINTER		0x0034</div><div class='add'>+#define DMA_CURRENT_RECEIVE_DESCRIPTOR_POINTER		0x0038</div><div class='add'>+#define DMA_CURRENT_RECEIVE_BUFFER_POINTER		0x003c</div><div class='add'>+</div><div class='add'>+/* MAC Register set */</div><div class='add'>+#define MAC_GLOBAL_CONTROL				0x0100</div><div class='add'>+#define MAC_TRANSMIT_CONTROL				0x0104</div><div class='add'>+#define MAC_RECEIVE_CONTROL				0x0108</div><div class='add'>+#define MAC_MAXIMUM_FRAME_SIZE				0x010c</div><div class='add'>+#define MAC_TRANSMIT_JABBER_SIZE			0x0110</div><div class='add'>+#define MAC_RECEIVE_JABBER_SIZE				0x0114</div><div class='add'>+#define MAC_ADDRESS_CONTROL				0x0118</div><div class='add'>+#define MAC_MDIO_CLK_DIV				0x011c</div><div class='add'>+#define MAC_ADDRESS1_HIGH				0x0120</div><div class='add'>+#define MAC_ADDRESS1_MED				0x0124</div><div class='add'>+#define MAC_ADDRESS1_LOW				0x0128</div><div class='add'>+#define MAC_ADDRESS2_HIGH				0x012c</div><div class='add'>+#define MAC_ADDRESS2_MED				0x0130</div><div class='add'>+#define MAC_ADDRESS2_LOW				0x0134</div><div class='add'>+#define MAC_ADDRESS3_HIGH				0x0138</div><div class='add'>+#define MAC_ADDRESS3_MED				0x013c</div><div class='add'>+#define MAC_ADDRESS3_LOW				0x0140</div><div class='add'>+#define MAC_ADDRESS4_HIGH				0x0144</div><div class='add'>+#define MAC_ADDRESS4_MED				0x0148</div><div class='add'>+#define MAC_ADDRESS4_LOW				0x014c</div><div class='add'>+#define MAC_MULTICAST_HASH_TABLE1			0x0150</div><div class='add'>+#define MAC_MULTICAST_HASH_TABLE2			0x0154</div><div class='add'>+#define MAC_MULTICAST_HASH_TABLE3			0x0158</div><div class='add'>+#define MAC_MULTICAST_HASH_TABLE4			0x015c</div><div class='add'>+#define MAC_FC_CONTROL					0x0160</div><div class='add'>+#define MAC_FC_PAUSE_FRAME_GENERATE			0x0164</div><div class='add'>+#define MAC_FC_SOURCE_ADDRESS_HIGH			0x0168</div><div class='add'>+#define MAC_FC_SOURCE_ADDRESS_MED			0x016c</div><div class='add'>+#define MAC_FC_SOURCE_ADDRESS_LOW			0x0170</div><div class='add'>+#define MAC_FC_DESTINATION_ADDRESS_HIGH			0x0174</div><div class='add'>+#define MAC_FC_DESTINATION_ADDRESS_MED			0x0178</div><div class='add'>+#define MAC_FC_DESTINATION_ADDRESS_LOW			0x017c</div><div class='add'>+#define MAC_FC_PAUSE_TIME_VALUE				0x0180</div><div class='add'>+#define MAC_FC_HIGH_PAUSE_TIME				0x0184</div><div class='add'>+#define MAC_FC_LOW_PAUSE_TIME				0x0188</div><div class='add'>+#define MAC_FC_PAUSE_HIGH_THRESHOLD			0x018c</div><div class='add'>+#define MAC_FC_PAUSE_LOW_THRESHOLD			0x0190</div><div class='add'>+#define MAC_MDIO_CONTROL				0x01a0</div><div class='add'>+#define MAC_MDIO_DATA					0x01a4</div><div class='add'>+#define MAC_RX_STATCTR_CONTROL				0x01a8</div><div class='add'>+#define MAC_RX_STATCTR_DATA_HIGH			0x01ac</div><div class='add'>+#define MAC_RX_STATCTR_DATA_LOW				0x01b0</div><div class='add'>+#define MAC_TX_STATCTR_CONTROL				0x01b4</div><div class='add'>+#define MAC_TX_STATCTR_DATA_HIGH			0x01b8</div><div class='add'>+#define MAC_TX_STATCTR_DATA_LOW				0x01bc</div><div class='add'>+#define MAC_TRANSMIT_FIFO_ALMOST_FULL			0x01c0</div><div class='add'>+#define MAC_TRANSMIT_PACKET_START_THRESHOLD		0x01c4</div><div class='add'>+#define MAC_RECEIVE_PACKET_START_THRESHOLD		0x01c8</div><div class='add'>+#define MAC_STATUS_IRQ					0x01e0</div><div class='add'>+#define MAC_INTERRUPT_ENABLE				0x01e4</div><div class='add'>+</div><div class='add'>+/* Used for register dump */</div><div class='add'>+#define EMAC_DMA_REG_CNT		16</div><div class='add'>+#define EMAC_MAC_REG_CNT		124</div><div class='add'>+</div><div class='add'>+/* DMA_CONFIGURATION (0x0000) */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * 0-DMA controller in normal operation mode,</div><div class='add'>+ * 1-DMA controller reset to default state,</div><div class='add'>+ * clearing all internal state information</div><div class='add'>+ */</div><div class='add'>+#define MREGBIT_SOFTWARE_RESET				BIT(0)</div><div class='add'>+</div><div class='add'>+#define MREGBIT_BURST_1WORD				BIT(1)</div><div class='add'>+#define MREGBIT_BURST_2WORD				BIT(2)</div><div class='add'>+#define MREGBIT_BURST_4WORD				BIT(3)</div><div class='add'>+#define MREGBIT_BURST_8WORD				BIT(4)</div><div class='add'>+#define MREGBIT_BURST_16WORD				BIT(5)</div><div class='add'>+#define MREGBIT_BURST_32WORD				BIT(6)</div><div class='add'>+#define MREGBIT_BURST_64WORD				BIT(7)</div><div class='add'>+#define MREGBIT_BURST_LENGTH				GENMASK(7, 1)</div><div class='add'>+#define MREGBIT_DESCRIPTOR_SKIP_LENGTH			GENMASK(12, 8)</div><div class='add'>+</div><div class='add'>+/* For Receive and Transmit DMA operate in Big-Endian mode for Descriptors. */</div><div class='add'>+#define MREGBIT_DESCRIPTOR_BYTE_ORDERING		BIT(13)</div><div class='add'>+</div><div class='add'>+#define MREGBIT_BIG_LITLE_ENDIAN			BIT(14)</div><div class='add'>+#define MREGBIT_TX_RX_ARBITRATION			BIT(15)</div><div class='add'>+#define MREGBIT_WAIT_FOR_DONE				BIT(16)</div><div class='add'>+#define MREGBIT_STRICT_BURST				BIT(17)</div><div class='add'>+#define MREGBIT_DMA_64BIT_MODE				BIT(18)</div><div class='add'>+</div><div class='add'>+/* DMA_CONTROL (0x0004) */</div><div class='add'>+#define MREGBIT_START_STOP_TRANSMIT_DMA			BIT(0)</div><div class='add'>+#define MREGBIT_START_STOP_RECEIVE_DMA			BIT(1)</div><div class='add'>+</div><div class='add'>+/* DMA_STATUS_IRQ (0x0008) */</div><div class='add'>+#define MREGBIT_TRANSMIT_TRANSFER_DONE_IRQ		BIT(0)</div><div class='add'>+#define MREGBIT_TRANSMIT_DES_UNAVAILABLE_IRQ		BIT(1)</div><div class='add'>+#define MREGBIT_TRANSMIT_DMA_STOPPED_IRQ		BIT(2)</div><div class='add'>+#define MREGBIT_RECEIVE_TRANSFER_DONE_IRQ		BIT(4)</div><div class='add'>+#define MREGBIT_RECEIVE_DES_UNAVAILABLE_IRQ		BIT(5)</div><div class='add'>+#define MREGBIT_RECEIVE_DMA_STOPPED_IRQ			BIT(6)</div><div class='add'>+#define MREGBIT_RECEIVE_MISSED_FRAME_IRQ		BIT(7)</div><div class='add'>+#define MREGBIT_MAC_IRQ					BIT(8)</div><div class='add'>+#define MREGBIT_TRANSMIT_DMA_STATE			GENMASK(18, 16)</div><div class='add'>+#define MREGBIT_RECEIVE_DMA_STATE			GENMASK(23, 20)</div><div class='add'>+</div><div class='add'>+/* DMA_INTERRUPT_ENABLE (0x000c) */</div><div class='add'>+#define MREGBIT_TRANSMIT_TRANSFER_DONE_INTR_ENABLE	BIT(0)</div><div class='add'>+#define MREGBIT_TRANSMIT_DES_UNAVAILABLE_INTR_ENABLE	BIT(1)</div><div class='add'>+#define MREGBIT_TRANSMIT_DMA_STOPPED_INTR_ENABLE	BIT(2)</div><div class='add'>+#define MREGBIT_RECEIVE_TRANSFER_DONE_INTR_ENABLE	BIT(4)</div><div class='add'>+#define MREGBIT_RECEIVE_DES_UNAVAILABLE_INTR_ENABLE	BIT(5)</div><div class='add'>+#define MREGBIT_RECEIVE_DMA_STOPPED_INTR_ENABLE		BIT(6)</div><div class='add'>+#define MREGBIT_RECEIVE_MISSED_FRAME_INTR_ENABLE	BIT(7)</div><div class='add'>+#define MREGBIT_MAC_INTR_ENABLE				BIT(8)</div><div class='add'>+</div><div class='add'>+/* DMA_RECEIVE_IRQ_MITIGATION_CTRL (0x002c) */</div><div class='add'>+#define MREGBIT_RECEIVE_IRQ_FRAME_COUNTER_MASK		GENMASK(7, 0)</div><div class='add'>+#define MREGBIT_RECEIVE_IRQ_TIMEOUT_COUNTER_MASK	GENMASK(27, 8)</div><div class='add'>+#define MREGBIT_RECEIVE_IRQ_FRAME_COUNTER_MODE		BIT(30)</div><div class='add'>+#define MREGBIT_RECEIVE_IRQ_MITIGATION_ENABLE		BIT(31)</div><div class='add'>+</div><div class='add'>+/* MAC_GLOBAL_CONTROL (0x0100) */</div><div class='add'>+#define MREGBIT_SPEED					GENMASK(1, 0)</div><div class='add'>+#define MREGBIT_SPEED_10M				0x0</div><div class='add'>+#define MREGBIT_SPEED_100M				BIT(0)</div><div class='add'>+#define MREGBIT_SPEED_1000M				BIT(1)</div><div class='add'>+#define MREGBIT_FULL_DUPLEX_MODE			BIT(2)</div><div class='add'>+#define MREGBIT_RESET_RX_STAT_COUNTERS			BIT(3)</div><div class='add'>+#define MREGBIT_RESET_TX_STAT_COUNTERS			BIT(4)</div><div class='add'>+#define MREGBIT_UNICAST_WAKEUP_MODE			BIT(8)</div><div class='add'>+#define MREGBIT_MAGIC_PACKET_WAKEUP_MODE		BIT(9)</div><div class='add'>+</div><div class='add'>+/* MAC_TRANSMIT_CONTROL (0x0104) */</div><div class='add'>+#define MREGBIT_TRANSMIT_ENABLE				BIT(0)</div><div class='add'>+#define MREGBIT_INVERT_FCS				BIT(1)</div><div class='add'>+#define MREGBIT_DISABLE_FCS_INSERT			BIT(2)</div><div class='add'>+#define MREGBIT_TRANSMIT_AUTO_RETRY			BIT(3)</div><div class='add'>+#define MREGBIT_IFG_LEN					GENMASK(6, 4)</div><div class='add'>+#define MREGBIT_PREAMBLE_LENGTH				GENMASK(9, 7)</div><div class='add'>+</div><div class='add'>+/* MAC_RECEIVE_CONTROL (0x0108) */</div><div class='add'>+#define MREGBIT_RECEIVE_ENABLE				BIT(0)</div><div class='add'>+#define MREGBIT_DISABLE_FCS_CHECK			BIT(1)</div><div class='add'>+#define MREGBIT_STRIP_FCS				BIT(2)</div><div class='add'>+#define MREGBIT_STORE_FORWARD				BIT(3)</div><div class='add'>+#define MREGBIT_STATUS_FIRST				BIT(4)</div><div class='add'>+#define MREGBIT_PASS_BAD_FRAMES				BIT(5)</div><div class='add'>+#define MREGBIT_ACOOUNT_VLAN				BIT(6)</div><div class='add'>+</div><div class='add'>+/* MAC_MAXIMUM_FRAME_SIZE (0x010c) */</div><div class='add'>+#define MREGBIT_MAX_FRAME_SIZE				GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+/* MAC_TRANSMIT_JABBER_SIZE (0x0110) */</div><div class='add'>+#define MREGBIT_TRANSMIT_JABBER_SIZE			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* MAC_RECEIVE_JABBER_SIZE (0x0114) */</div><div class='add'>+#define MREGBIT_RECEIVE_JABBER_SIZE			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* MAC_ADDRESS_CONTROL (0x0118) */</div><div class='add'>+#define MREGBIT_MAC_ADDRESS1_ENABLE			BIT(0)</div><div class='add'>+#define MREGBIT_MAC_ADDRESS2_ENABLE			BIT(1)</div><div class='add'>+#define MREGBIT_MAC_ADDRESS3_ENABLE			BIT(2)</div><div class='add'>+#define MREGBIT_MAC_ADDRESS4_ENABLE			BIT(3)</div><div class='add'>+#define MREGBIT_INVERSE_MAC_ADDRESS1_ENABLE		BIT(4)</div><div class='add'>+#define MREGBIT_INVERSE_MAC_ADDRESS2_ENABLE		BIT(5)</div><div class='add'>+#define MREGBIT_INVERSE_MAC_ADDRESS3_ENABLE		BIT(6)</div><div class='add'>+#define MREGBIT_INVERSE_MAC_ADDRESS4_ENABLE		BIT(7)</div><div class='add'>+#define MREGBIT_PROMISCUOUS_MODE			BIT(8)</div><div class='add'>+</div><div class='add'>+/* MAC_FC_CONTROL (0x0160) */</div><div class='add'>+#define MREGBIT_FC_DECODE_ENABLE			BIT(0)</div><div class='add'>+#define MREGBIT_FC_GENERATION_ENABLE			BIT(1)</div><div class='add'>+#define MREGBIT_AUTO_FC_GENERATION_ENABLE		BIT(2)</div><div class='add'>+#define MREGBIT_MULTICAST_MODE				BIT(3)</div><div class='add'>+#define MREGBIT_BLOCK_PAUSE_FRAMES			BIT(4)</div><div class='add'>+</div><div class='add'>+/* MAC_FC_PAUSE_FRAME_GENERATE (0x0164) */</div><div class='add'>+#define MREGBIT_GENERATE_PAUSE_FRAME			BIT(0)</div><div class='add'>+</div><div class='add'>+/* MAC_FC_PAUSE_TIME_VALUE (0x0180) */</div><div class='add'>+#define MREGBIT_MAC_FC_PAUSE_TIME			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* MAC_MDIO_CONTROL (0x01a0) */</div><div class='add'>+#define MREGBIT_PHY_ADDRESS				GENMASK(4, 0)</div><div class='add'>+#define MREGBIT_REGISTER_ADDRESS			GENMASK(9, 5)</div><div class='add'>+#define MREGBIT_MDIO_READ_WRITE				BIT(10)</div><div class='add'>+#define MREGBIT_START_MDIO_TRANS			BIT(15)</div><div class='add'>+</div><div class='add'>+/* MAC_MDIO_DATA (0x01a4) */</div><div class='add'>+#define MREGBIT_MDIO_DATA				GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* MAC_RX_STATCTR_CONTROL (0x01a8) */</div><div class='add'>+#define MREGBIT_RX_COUNTER_NUMBER			GENMASK(4, 0)</div><div class='add'>+#define MREGBIT_START_RX_COUNTER_READ			BIT(15)</div><div class='add'>+</div><div class='add'>+/* MAC_RX_STATCTR_DATA_HIGH (0x01ac) */</div><div class='add'>+#define MREGBIT_RX_STATCTR_DATA_HIGH			GENMASK(15, 0)</div><div class='add'>+/* MAC_RX_STATCTR_DATA_LOW (0x01b0) */</div><div class='add'>+#define MREGBIT_RX_STATCTR_DATA_LOW			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* MAC_TX_STATCTR_CONTROL (0x01b4) */</div><div class='add'>+#define MREGBIT_TX_COUNTER_NUMBER			GENMASK(4, 0)</div><div class='add'>+#define MREGBIT_START_TX_COUNTER_READ			BIT(15)</div><div class='add'>+</div><div class='add'>+/* MAC_TX_STATCTR_DATA_HIGH (0x01b8) */</div><div class='add'>+#define MREGBIT_TX_STATCTR_DATA_HIGH			GENMASK(15, 0)</div><div class='add'>+/* MAC_TX_STATCTR_DATA_LOW (0x01bc) */</div><div class='add'>+#define MREGBIT_TX_STATCTR_DATA_LOW			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* MAC_TRANSMIT_FIFO_ALMOST_FULL (0x01c0) */</div><div class='add'>+#define MREGBIT_TX_FIFO_AF				GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+/* MAC_TRANSMIT_PACKET_START_THRESHOLD (0x01c4) */</div><div class='add'>+#define MREGBIT_TX_PACKET_START_THRESHOLD		GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+/* MAC_RECEIVE_PACKET_START_THRESHOLD (0x01c8) */</div><div class='add'>+#define MREGBIT_RX_PACKET_START_THRESHOLD		GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+/* MAC_STATUS_IRQ (0x01e0) */</div><div class='add'>+#define MREGBIT_MAC_UNDERRUN_IRQ			BIT(0)</div><div class='add'>+#define MREGBIT_MAC_JABBER_IRQ				BIT(1)</div><div class='add'>+</div><div class='add'>+/* MAC_INTERRUPT_ENABLE (0x01e4) */</div><div class='add'>+#define MREGBIT_MAC_UNDERRUN_INTERRUPT_ENABLE		BIT(0)</div><div class='add'>+#define MREGBIT_JABBER_INTERRUPT_ENABLE			BIT(1)</div><div class='add'>+</div><div class='add'>+/* RX DMA descriptor */</div><div class='add'>+</div><div class='add'>+#define RX_DESC_0_FRAME_PACKET_LENGTH_MASK		GENMASK(13, 0)</div><div class='add'>+#define RX_DESC_0_FRAME_ALIGN_ERR			BIT(14)</div><div class='add'>+#define RX_DESC_0_FRAME_RUNT				BIT(15)</div><div class='add'>+#define RX_DESC_0_FRAME_ETHERNET_TYPE			BIT(16)</div><div class='add'>+#define RX_DESC_0_FRAME_VLAN				BIT(17)</div><div class='add'>+#define RX_DESC_0_FRAME_MULTICAST			BIT(18)</div><div class='add'>+#define RX_DESC_0_FRAME_BROADCAST			BIT(19)</div><div class='add'>+#define RX_DESC_0_FRAME_CRC_ERR				BIT(20)</div><div class='add'>+#define RX_DESC_0_FRAME_MAX_LEN_ERR			BIT(21)</div><div class='add'>+#define RX_DESC_0_FRAME_JABBER_ERR			BIT(22)</div><div class='add'>+#define RX_DESC_0_FRAME_LENGTH_ERR			BIT(23)</div><div class='add'>+#define RX_DESC_0_FRAME_MAC_ADDR1_MATCH			BIT(24)</div><div class='add'>+#define RX_DESC_0_FRAME_MAC_ADDR2_MATCH			BIT(25)</div><div class='add'>+#define RX_DESC_0_FRAME_MAC_ADDR3_MATCH			BIT(26)</div><div class='add'>+#define RX_DESC_0_FRAME_MAC_ADDR4_MATCH			BIT(27)</div><div class='add'>+#define RX_DESC_0_FRAME_PAUSE_CTRL			BIT(28)</div><div class='add'>+#define RX_DESC_0_LAST_DESCRIPTOR			BIT(29)</div><div class='add'>+#define RX_DESC_0_FIRST_DESCRIPTOR			BIT(30)</div><div class='add'>+#define RX_DESC_0_OWN					BIT(31)</div><div class='add'>+</div><div class='add'>+#define RX_DESC_1_BUFFER_SIZE_1_MASK			GENMASK(11, 0)</div><div class='add'>+#define RX_DESC_1_BUFFER_SIZE_2_MASK			GENMASK(23, 12)</div><div class='add'>+							/* [24] reserved */</div><div class='add'>+#define RX_DESC_1_SECOND_ADDRESS_CHAINED		BIT(25)</div><div class='add'>+#define RX_DESC_1_END_RING				BIT(26)</div><div class='add'>+							/* [29:27] reserved */</div><div class='add'>+#define RX_DESC_1_RX_TIMESTAMP				BIT(30)</div><div class='add'>+#define RX_DESC_1_PTP_PKT				BIT(31)</div><div class='add'>+</div><div class='add'>+/* TX DMA descriptor */</div><div class='add'>+</div><div class='add'>+							/* [29:0] unused */</div><div class='add'>+#define TX_DESC_0_TX_TIMESTAMP				BIT(30)</div><div class='add'>+#define TX_DESC_0_OWN					BIT(31)</div><div class='add'>+</div><div class='add'>+#define TX_DESC_1_BUFFER_SIZE_1_MASK			GENMASK(11, 0)</div><div class='add'>+#define TX_DESC_1_BUFFER_SIZE_2_MASK			GENMASK(23, 12)</div><div class='add'>+#define TX_DESC_1_FORCE_EOP_ERROR			BIT(24)</div><div class='add'>+#define TX_DESC_1_SECOND_ADDRESS_CHAINED		BIT(25)</div><div class='add'>+#define TX_DESC_1_END_RING				BIT(26)</div><div class='add'>+#define TX_DESC_1_DISABLE_PADDING			BIT(27)</div><div class='add'>+#define TX_DESC_1_ADD_CRC_DISABLE			BIT(28)</div><div class='add'>+#define TX_DESC_1_FIRST_SEGMENT				BIT(29)</div><div class='add'>+#define TX_DESC_1_LAST_SEGMENT				BIT(30)</div><div class='add'>+#define TX_DESC_1_INTERRUPT_ON_COMPLETION		BIT(31)</div><div class='add'>+</div><div class='add'>+struct emac_desc {</div><div class='add'>+	u32 desc0;</div><div class='add'>+	u32 desc1;</div><div class='add'>+	u32 buffer_addr_1;</div><div class='add'>+	u32 buffer_addr_2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Keep stats in this order, index used for accessing hardware */</div><div class='add'>+</div><div class='add'>+union emac_hw_tx_stats {</div><div class='add'>+	struct individual_tx_stats {</div><div class='add'>+		u64 tx_ok_pkts;</div><div class='add'>+		u64 tx_total_pkts;</div><div class='add'>+		u64 tx_ok_bytes;</div><div class='add'>+		u64 tx_err_pkts;</div><div class='add'>+		u64 tx_singleclsn_pkts;</div><div class='add'>+		u64 tx_multiclsn_pkts;</div><div class='add'>+		u64 tx_lateclsn_pkts;</div><div class='add'>+		u64 tx_excessclsn_pkts;</div><div class='add'>+		u64 tx_unicast_pkts;</div><div class='add'>+		u64 tx_multicast_pkts;</div><div class='add'>+		u64 tx_broadcast_pkts;</div><div class='add'>+		u64 tx_pause_pkts;</div><div class='add'>+	} stats;</div><div class='add'>+</div><div class='add'>+	u64 array[sizeof(struct individual_tx_stats) / sizeof(u64)];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union emac_hw_rx_stats {</div><div class='add'>+	struct individual_rx_stats {</div><div class='add'>+		u64 rx_ok_pkts;</div><div class='add'>+		u64 rx_total_pkts;</div><div class='add'>+		u64 rx_crc_err_pkts;</div><div class='add'>+		u64 rx_align_err_pkts;</div><div class='add'>+		u64 rx_err_total_pkts;</div><div class='add'>+		u64 rx_ok_bytes;</div><div class='add'>+		u64 rx_total_bytes;</div><div class='add'>+		u64 rx_unicast_pkts;</div><div class='add'>+		u64 rx_multicast_pkts;</div><div class='add'>+		u64 rx_broadcast_pkts;</div><div class='add'>+		u64 rx_pause_pkts;</div><div class='add'>+		u64 rx_len_err_pkts;</div><div class='add'>+		u64 rx_len_undersize_pkts;</div><div class='add'>+		u64 rx_len_oversize_pkts;</div><div class='add'>+		u64 rx_len_fragment_pkts;</div><div class='add'>+		u64 rx_len_jabber_pkts;</div><div class='add'>+		u64 rx_64_pkts;</div><div class='add'>+		u64 rx_65_127_pkts;</div><div class='add'>+		u64 rx_128_255_pkts;</div><div class='add'>+		u64 rx_256_511_pkts;</div><div class='add'>+		u64 rx_512_1023_pkts;</div><div class='add'>+		u64 rx_1024_1518_pkts;</div><div class='add'>+		u64 rx_1519_plus_pkts;</div><div class='add'>+		u64 rx_drp_fifo_full_pkts;</div><div class='add'>+		u64 rx_truncate_fifo_full_pkts;</div><div class='add'>+	} stats;</div><div class='add'>+</div><div class='add'>+	u64 array[sizeof(struct individual_rx_stats) / sizeof(u64)];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _K1_EMAC_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig<br/>index 05cc07b8f48c..907fe2e927f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/Kconfig</a></div><div class='hunk'>@@ -3,12 +3,14 @@ config STMMAC_ETH</div><div class='ctx'> 	tristate "STMicroelectronics Multi-Gigabit Ethernet driver"</div><div class='ctx'> 	depends on HAS_IOMEM &amp;&amp; HAS_DMA</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	depends on ETHTOOL_NETLINK</div><div class='ctx'> 	select MII</div><div class='ctx'> 	select PCS_XPCS</div><div class='ctx'> 	select PAGE_POOL</div><div class='ctx'> 	select PHYLINK</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select RESET_CONTROLLER</div><div class='add'>+	select NET_DEVLINK</div><div class='ctx'> 	help</div><div class='ctx'> 	  This is the driver for the Ethernet IPs built around a</div><div class='ctx'> 	  Synopsys IP Core.</div><div class='hunk'>@@ -66,6 +68,15 @@ config DWMAC_ANARION</div><div class='ctx'> </div><div class='ctx'> 	  This selects the Anarion SoC glue layer support for the stmmac driver.</div><div class='ctx'> </div><div class='add'>+config DWMAC_EIC7700</div><div class='add'>+	tristate "Support for Eswin eic7700 ethernet driver"</div><div class='add'>+	depends on OF &amp;&amp; HAS_DMA &amp;&amp; ARCH_ESWIN || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the Eswin EIC7700 Ethernet controller,</div><div class='add'>+	  which integrates Synopsys DesignWare QoS features. It enables</div><div class='add'>+	  high-speed networking with DMA acceleration and is optimized</div><div class='add'>+	  for embedded systems.</div><div class='add'>+</div><div class='ctx'> config DWMAC_INGENIC</div><div class='ctx'> 	tristate "Ingenic MAC support"</div><div class='ctx'> 	default MACH_INGENIC</div><div class='hunk'>@@ -131,6 +142,19 @@ config DWMAC_QCOM_ETHQOS</div><div class='ctx'> 	  This selects the Qualcomm ETHQOS glue layer support for the</div><div class='ctx'> 	  stmmac device driver.</div><div class='ctx'> </div><div class='add'>+config DWMAC_RENESAS_GBETH</div><div class='add'>+	tristate "Renesas RZ/V2H(P) GBETH and RZ/T2H, RZ/N2H GMAC support"</div><div class='add'>+	default ARCH_RENESAS</div><div class='add'>+	depends on OF &amp;&amp; (ARCH_RENESAS || COMPILE_TEST)</div><div class='add'>+	select PCS_RZN1_MIIC</div><div class='add'>+	help</div><div class='add'>+	  Support for Gigabit Ethernet Interface (GBETH)/ Ethernet MAC (GMAC)</div><div class='add'>+	  on Renesas SoCs.</div><div class='add'>+</div><div class='add'>+	  This selects Renesas SoC glue layer support for the stmmac device</div><div class='add'>+	  driver. This driver is used for the RZ/V2H(P) family, RZ/T2H and</div><div class='add'>+	  RZ/N2H SoCs.</div><div class='add'>+</div><div class='ctx'> config DWMAC_ROCKCHIP</div><div class='ctx'> 	tristate "Rockchip dwmac support"</div><div class='ctx'> 	default ARCH_ROCKCHIP</div><div class='hunk'>@@ -154,6 +178,18 @@ config DWMAC_RZN1</div><div class='ctx'> 	  the stmmac device driver. This support can make use of a custom MII</div><div class='ctx'> 	  converter PCS device.</div><div class='ctx'> </div><div class='add'>+config DWMAC_S32</div><div class='add'>+	tristate "NXP S32G/S32R GMAC support"</div><div class='add'>+	default ARCH_S32</div><div class='add'>+	depends on OF &amp;&amp; (ARCH_S32 || COMPILE_TEST)</div><div class='add'>+	help</div><div class='add'>+	  Support for ethernet controller on NXP S32CC SOCs.</div><div class='add'>+</div><div class='add'>+	  This selects NXP SoC glue layer support for the stmmac</div><div class='add'>+	  device driver. This driver is used for the S32CC series</div><div class='add'>+	  SOCs GMAC ethernet controller, ie. S32G2xx, S32G3xx and</div><div class='add'>+	  S32R45.</div><div class='add'>+</div><div class='ctx'> config DWMAC_SOCFPGA</div><div class='ctx'> 	tristate "SOCFPGA dwmac support"</div><div class='ctx'> 	default ARCH_INTEL_SOCFPGA</div><div class='hunk'>@@ -169,6 +205,17 @@ config DWMAC_SOCFPGA</div><div class='ctx'> 	  for the stmmac device driver. This driver is used for</div><div class='ctx'> 	  arria5 and cyclone5 FPGA SoCs.</div><div class='ctx'> </div><div class='add'>+config DWMAC_SOPHGO</div><div class='add'>+	tristate "Sophgo dwmac support"</div><div class='add'>+	depends on OF &amp;&amp; (ARCH_SOPHGO || COMPILE_TEST)</div><div class='add'>+	default m if ARCH_SOPHGO</div><div class='add'>+	help</div><div class='add'>+	  Support for ethernet controllers on Sophgo RISC-V SoCs</div><div class='add'>+</div><div class='add'>+	  This selects the Sophgo SoC specific glue layer support</div><div class='add'>+	  for the stmmac device driver. This driver is used for the</div><div class='add'>+	  ethernet controllers on various Sophgo SoCs.</div><div class='add'>+</div><div class='ctx'> config DWMAC_STARFIVE</div><div class='ctx'> 	tristate "StarFive dwmac support"</div><div class='ctx'> 	depends on OF &amp;&amp; (ARCH_STARFIVE || COMPILE_TEST)</div><div class='hunk'>@@ -228,6 +275,28 @@ config DWMAC_SUN8I</div><div class='ctx'> 	  stmmac device driver. This driver is used for H3/A83T/A64</div><div class='ctx'> 	  EMAC ethernet controller.</div><div class='ctx'> </div><div class='add'>+config DWMAC_SUN55I</div><div class='add'>+	tristate "Allwinner sun55i GMAC200 support"</div><div class='add'>+	default ARCH_SUNXI</div><div class='add'>+	depends on OF &amp;&amp; (ARCH_SUNXI || COMPILE_TEST)</div><div class='add'>+	select MDIO_BUS_MUX</div><div class='add'>+	help</div><div class='add'>+	  Support for Allwinner A523/T527 GMAC200 ethernet controllers.</div><div class='add'>+</div><div class='add'>+	  This selects Allwinner SoC glue layer support for the</div><div class='add'>+	  stmmac device driver. This driver is used for A523/T527</div><div class='add'>+	  GMAC200 ethernet controller.</div><div class='add'>+</div><div class='add'>+config DWMAC_THEAD</div><div class='add'>+	tristate "T-HEAD dwmac support"</div><div class='add'>+	depends on OF &amp;&amp; (ARCH_THEAD || COMPILE_TEST)</div><div class='add'>+	help</div><div class='add'>+	  Support for ethernet controllers on T-HEAD RISC-V SoCs</div><div class='add'>+</div><div class='add'>+	  This selects the T-HEAD platform specific glue layer support for</div><div class='add'>+	  the stmmac device driver. This driver is used for T-HEAD TH1520</div><div class='add'>+	  ethernet controller.</div><div class='add'>+</div><div class='ctx'> config DWMAC_IMX8</div><div class='ctx'> 	tristate "NXP IMX8 DWMAC support"</div><div class='ctx'> 	default ARCH_MXC</div><div class='hunk'>@@ -280,11 +349,17 @@ config DWMAC_VISCONTI</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+config STMMAC_LIBPCI</div><div class='add'>+	tristate</div><div class='add'>+	help</div><div class='add'>+	  This option enables the PCI bus helpers for the stmmac driver.</div><div class='add'>+</div><div class='ctx'> config DWMAC_INTEL</div><div class='ctx'> 	tristate "Intel GMAC support"</div><div class='ctx'> 	default X86</div><div class='ctx'> 	depends on X86 &amp;&amp; STMMAC_ETH &amp;&amp; PCI</div><div class='ctx'> 	depends on COMMON_CLK</div><div class='add'>+	depends on ACPI</div><div class='ctx'> 	help</div><div class='ctx'> 	  This selects the Intel platform specific bus support for the</div><div class='ctx'> 	  stmmac driver. This driver is used for Intel Quark/EHL/TGL.</div><div class='hunk'>@@ -292,16 +367,18 @@ config DWMAC_INTEL</div><div class='ctx'> config DWMAC_LOONGSON</div><div class='ctx'> 	tristate "Loongson PCI DWMAC support"</div><div class='ctx'> 	default MACH_LOONGSON64</div><div class='del'>-	depends on (MACH_LOONGSON64 || COMPILE_TEST) &amp;&amp; STMMAC_ETH &amp;&amp; PCI</div><div class='add'>+	depends on (MACH_LOONGSON64 || COMPILE_TEST) &amp;&amp; PCI</div><div class='ctx'> 	depends on COMMON_CLK</div><div class='add'>+	select STMMAC_LIBPCI</div><div class='ctx'> 	help</div><div class='ctx'> 	  This selects the LOONGSON PCI bus support for the stmmac driver,</div><div class='ctx'> 	  Support for ethernet controller on Loongson-2K1000 SoC and LS7A1000 bridge.</div><div class='ctx'> </div><div class='ctx'> config STMMAC_PCI</div><div class='ctx'> 	tristate "STMMAC PCI bus support"</div><div class='del'>-	depends on STMMAC_ETH &amp;&amp; PCI</div><div class='add'>+	depends on PCI</div><div class='ctx'> 	depends on COMMON_CLK</div><div class='add'>+	select STMMAC_LIBPCI</div><div class='ctx'> 	help</div><div class='ctx'> 	  This selects the platform specific bus support for the stmmac driver.</div><div class='ctx'> 	  This driver was tested on XLINX XC2V3000 FF1152AMT0221</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile<br/>index 7e46dca90628..7bf528731034 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/Makefile</a></div><div class='hunk'>@@ -6,28 +6,34 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o	\</div><div class='ctx'> 	      mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o	\</div><div class='ctx'> 	      dwmac4_dma.o dwmac4_lib.o dwmac4_core.o dwmac5.o hwif.o \</div><div class='ctx'> 	      stmmac_tc.o dwxgmac2_core.o dwxgmac2_dma.o dwxgmac2_descs.o \</div><div class='del'>-	      stmmac_xdp.o stmmac_est.o stmmac_fpe.o \</div><div class='del'>-	      $(stmmac-y)</div><div class='add'>+	      stmmac_xdp.o stmmac_est.o stmmac_fpe.o stmmac_vlan.o \</div><div class='add'>+	      stmmac_pcs.o $(stmmac-y)</div><div class='ctx'> </div><div class='ctx'> stmmac-$(CONFIG_STMMAC_SELFTESTS) += stmmac_selftests.o</div><div class='ctx'> </div><div class='ctx'> # Ordering matters. Generic driver must be last.</div><div class='ctx'> obj-$(CONFIG_STMMAC_PLATFORM)	+= stmmac-platform.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_ANARION)	+= dwmac-anarion.o</div><div class='add'>+obj-$(CONFIG_DWMAC_EIC7700)	+= dwmac-eic7700.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_INGENIC)	+= dwmac-ingenic.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_IPQ806X)	+= dwmac-ipq806x.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_LPC18XX)	+= dwmac-lpc18xx.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_MEDIATEK)	+= dwmac-mediatek.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_MESON)	+= dwmac-meson.o dwmac-meson8b.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_QCOM_ETHQOS)	+= dwmac-qcom-ethqos.o</div><div class='add'>+obj-$(CONFIG_DWMAC_RENESAS_GBETH) += dwmac-renesas-gbeth.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_ROCKCHIP)	+= dwmac-rk.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_RZN1)	+= dwmac-rzn1.o</div><div class='add'>+obj-$(CONFIG_DWMAC_S32)		+= dwmac-s32.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_SOCFPGA)	+= dwmac-altr-socfpga.o</div><div class='add'>+obj-$(CONFIG_DWMAC_SOPHGO)	+= dwmac-sophgo.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_STARFIVE)	+= dwmac-starfive.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_STI)		+= dwmac-sti.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_STM32)	+= dwmac-stm32.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_SUNXI)	+= dwmac-sunxi.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_SUN8I)	+= dwmac-sun8i.o</div><div class='add'>+obj-$(CONFIG_DWMAC_SUN55I)	+= dwmac-sun55i.o</div><div class='add'>+obj-$(CONFIG_DWMAC_THEAD)	+= dwmac-thead.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_DWC_QOS_ETH)	+= dwmac-dwc-qos-eth.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_INTEL_PLAT)	+= dwmac-intel-plat.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_LOONGSON1)	+= dwmac-loongson1.o</div><div class='hunk'>@@ -38,6 +44,7 @@ obj-$(CONFIG_DWMAC_VISCONTI)	+= dwmac-visconti.o</div><div class='ctx'> stmmac-platform-objs:= stmmac_platform.o</div><div class='ctx'> dwmac-altr-socfpga-objs := dwmac-socfpga.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_STMMAC_LIBPCI)	+= stmmac_libpci.o</div><div class='ctx'> obj-$(CONFIG_STMMAC_PCI)	+= stmmac-pci.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_INTEL)	+= dwmac-intel.o</div><div class='ctx'> obj-$(CONFIG_DWMAC_LOONGSON)	+= dwmac-loongson.o</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/chain_mode.c b/drivers/net/ethernet/stmicro/stmmac/chain_mode.c<br/>index fb55efd52240..120a009c9992 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/chain_mode.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/chain_mode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/chain_mode.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/chain_mode.c</a></div><div class='hunk'>@@ -83,14 +83,13 @@ static int jumbo_frm(struct stmmac_tx_queue *tx_q, struct sk_buff *skb,</div><div class='ctx'> 	return entry;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int is_jumbo_frm(int len, int enh_desc)</div><div class='add'>+static bool is_jumbo_frm(unsigned int len, bool enh_desc)</div><div class='ctx'> {</div><div class='del'>-	unsigned int ret = 0;</div><div class='add'>+	bool ret = false;</div><div class='ctx'> </div><div class='ctx'> 	if ((enh_desc &amp;&amp; (len &gt; BUF_SIZE_8KiB)) ||</div><div class='del'>-	    (!enh_desc &amp;&amp; (len &gt; BUF_SIZE_2KiB))) {</div><div class='del'>-		ret = 1;</div><div class='del'>-	}</div><div class='add'>+	    (!enh_desc &amp;&amp; (len &gt; BUF_SIZE_2KiB)))</div><div class='add'>+		ret = true;</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h<br/>index 684489156dce..49df46be3669 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/common.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/common.h</a></div><div class='hunk'>@@ -26,6 +26,9 @@</div><div class='ctx'> #include "hwif.h"</div><div class='ctx'> #include "mmc.h"</div><div class='ctx'> </div><div class='add'>+#define DWMAC_SNPSVER	GENMASK_U32(7, 0)</div><div class='add'>+#define DWMAC_USERVER	GENMASK_U32(15, 8)</div><div class='add'>+</div><div class='ctx'> /* Synopsys Core versions */</div><div class='ctx'> #define	DWMAC_CORE_3_40		0x34</div><div class='ctx'> #define	DWMAC_CORE_3_50		0x35</div><div class='hunk'>@@ -43,6 +46,11 @@</div><div class='ctx'> #define DWXGMAC_ID		0x76</div><div class='ctx'> #define DWXLGMAC_ID		0x27</div><div class='ctx'> </div><div class='add'>+static inline bool dwmac_is_xmac(enum dwmac_core_type core_type)</div><div class='add'>+{</div><div class='add'>+	return core_type == DWMAC_CORE_GMAC4 || core_type == DWMAC_CORE_XGMAC;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define STMMAC_CHAN0	0	/* Always supported and default for all chips */</div><div class='ctx'> </div><div class='ctx'> /* TX and RX Descriptor Length, these need to be power of two.</div><div class='hunk'>@@ -101,8 +109,8 @@ struct stmmac_rxq_stats {</div><div class='ctx'> /* Updates on each CPU protected by not allowing nested irqs. */</div><div class='ctx'> struct stmmac_pcpu_stats {</div><div class='ctx'> 	struct u64_stats_sync syncp;</div><div class='del'>-	u64_stats_t rx_normal_irq_n[MTL_MAX_TX_QUEUES];</div><div class='del'>-	u64_stats_t tx_normal_irq_n[MTL_MAX_RX_QUEUES];</div><div class='add'>+	u64_stats_t rx_normal_irq_n[MTL_MAX_RX_QUEUES];</div><div class='add'>+	u64_stats_t tx_normal_irq_n[MTL_MAX_TX_QUEUES];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Extra statistic and debug information exposed by ethtool */</div><div class='hunk'>@@ -192,9 +200,6 @@ struct stmmac_extra_stats {</div><div class='ctx'> 	unsigned long irq_pcs_ane_n;</div><div class='ctx'> 	unsigned long irq_pcs_link_n;</div><div class='ctx'> 	unsigned long irq_rgmii_n;</div><div class='del'>-	unsigned long pcs_link;</div><div class='del'>-	unsigned long pcs_duplex;</div><div class='del'>-	unsigned long pcs_speed;</div><div class='ctx'> 	/* debug register */</div><div class='ctx'> 	unsigned long mtl_tx_status_fifo_full;</div><div class='ctx'> 	unsigned long mtl_tx_fifo_not_empty;</div><div class='hunk'>@@ -228,6 +233,7 @@ struct stmmac_extra_stats {</div><div class='ctx'> 	unsigned long mtl_est_btrlm;</div><div class='ctx'> 	unsigned long max_sdu_txq_drop[MTL_MAX_TX_QUEUES];</div><div class='ctx'> 	unsigned long mtl_est_txq_hlbf[MTL_MAX_TX_QUEUES];</div><div class='add'>+	unsigned long mtl_est_txq_hlbs[MTL_MAX_TX_QUEUES];</div><div class='ctx'> 	/* per queue statistics */</div><div class='ctx'> 	struct stmmac_txq_stats txq_stats[MTL_MAX_TX_QUEUES];</div><div class='ctx'> 	struct stmmac_rxq_stats rxq_stats[MTL_MAX_RX_QUEUES];</div><div class='hunk'>@@ -257,6 +263,8 @@ struct stmmac_safety_stats {</div><div class='ctx'> #define CSR_F_150M	150000000</div><div class='ctx'> #define CSR_F_250M	250000000</div><div class='ctx'> #define CSR_F_300M	300000000</div><div class='add'>+#define CSR_F_500M	500000000</div><div class='add'>+#define CSR_F_800M	800000000</div><div class='ctx'> </div><div class='ctx'> #define	MAC_CSR_H_FRQ_MASK	0x20</div><div class='ctx'> </div><div class='hunk'>@@ -270,7 +278,6 @@ struct stmmac_safety_stats {</div><div class='ctx'> #define FLOW_AUTO	(FLOW_TX | FLOW_RX)</div><div class='ctx'> </div><div class='ctx'> /* PCS defines */</div><div class='del'>-#define STMMAC_PCS_RGMII	(1 &lt;&lt; 0)</div><div class='ctx'> #define STMMAC_PCS_SGMII	(1 &lt;&lt; 1)</div><div class='ctx'> </div><div class='ctx'> #define SF_DMA_MODE 1		/* DMA STORE-AND-FORWARD Operation Mode */</div><div class='hunk'>@@ -306,6 +313,16 @@ struct stmmac_safety_stats {</div><div class='ctx'> #define DMA_HW_FEAT_ACTPHYIF	0x70000000	/* Active/selected PHY iface */</div><div class='ctx'> #define DEFAULT_DMA_PBL		8</div><div class='ctx'> </div><div class='add'>+/* phy_intf_sel_i and ACTPHYIF encodings */</div><div class='add'>+#define PHY_INTF_SEL_GMII_MII	0</div><div class='add'>+#define PHY_INTF_SEL_RGMII	1</div><div class='add'>+#define PHY_INTF_SEL_SGMII	2</div><div class='add'>+#define PHY_INTF_SEL_TBI	3</div><div class='add'>+#define PHY_INTF_SEL_RMII	4</div><div class='add'>+#define PHY_INTF_SEL_RTBI	5</div><div class='add'>+#define PHY_INTF_SEL_SMII	6</div><div class='add'>+#define PHY_INTF_SEL_REVMII	7</div><div class='add'>+</div><div class='ctx'> /* MSI defines */</div><div class='ctx'> #define STMMAC_MSI_VEC_MAX	32</div><div class='ctx'> </div><div class='hunk'>@@ -394,17 +411,6 @@ enum request_irq_err {</div><div class='ctx'> </div><div class='ctx'> #define CORE_IRQ_MTL_RX_OVERFLOW	BIT(8)</div><div class='ctx'> </div><div class='del'>-/* Physical Coding Sublayer */</div><div class='del'>-struct rgmii_adv {</div><div class='del'>-	unsigned int pause;</div><div class='del'>-	unsigned int duplex;</div><div class='del'>-	unsigned int lp_pause;</div><div class='del'>-	unsigned int lp_duplex;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define STMMAC_PCS_PAUSE	1</div><div class='del'>-#define STMMAC_PCS_ASYM_PAUSE	2</div><div class='del'>-</div><div class='ctx'> /* DMA HW capabilities */</div><div class='ctx'> struct dma_features {</div><div class='ctx'> 	unsigned int mbps_10_100;</div><div class='hunk'>@@ -528,6 +534,33 @@ struct dma_features {</div><div class='ctx'> #define STMMAC_DEFAULT_TWT_LS	0x1E</div><div class='ctx'> #define STMMAC_ET_MAX		0xFFFFF</div><div class='ctx'> </div><div class='add'>+/* Common LPI register bits */</div><div class='add'>+#define LPI_CTRL_STATUS_LPITCSE	BIT(21)	/* LPI Tx Clock Stop Enable, gmac4, xgmac2 only */</div><div class='add'>+#define LPI_CTRL_STATUS_LPIATE	BIT(20)	/* LPI Timer Enable, gmac4 only */</div><div class='add'>+#define LPI_CTRL_STATUS_LPITXA	BIT(19)	/* Enable LPI TX Automate */</div><div class='add'>+#define LPI_CTRL_STATUS_PLSEN	BIT(18)	/* Enable PHY Link Status */</div><div class='add'>+#define LPI_CTRL_STATUS_PLS	BIT(17)	/* PHY Link Status */</div><div class='add'>+#define LPI_CTRL_STATUS_LPIEN	BIT(16)	/* LPI Enable */</div><div class='add'>+#define LPI_CTRL_STATUS_RLPIST	BIT(9)	/* Receive LPI state, gmac1000 only? */</div><div class='add'>+#define LPI_CTRL_STATUS_TLPIST	BIT(8)	/* Transmit LPI state, gmac1000 only? */</div><div class='add'>+#define LPI_CTRL_STATUS_RLPIEX	BIT(3)	/* Receive LPI Exit */</div><div class='add'>+#define LPI_CTRL_STATUS_RLPIEN	BIT(2)	/* Receive LPI Entry */</div><div class='add'>+#define LPI_CTRL_STATUS_TLPIEX	BIT(1)	/* Transmit LPI Exit */</div><div class='add'>+#define LPI_CTRL_STATUS_TLPIEN	BIT(0)	/* Transmit LPI Entry */</div><div class='add'>+</div><div class='add'>+/* Common definitions for AXI Master Bus Mode */</div><div class='add'>+#define DMA_AXI_AAL		BIT(12)</div><div class='add'>+#define DMA_AXI_BLEN256		BIT(7)</div><div class='add'>+#define DMA_AXI_BLEN128		BIT(6)</div><div class='add'>+#define DMA_AXI_BLEN64		BIT(5)</div><div class='add'>+#define DMA_AXI_BLEN32		BIT(4)</div><div class='add'>+#define DMA_AXI_BLEN16		BIT(3)</div><div class='add'>+#define DMA_AXI_BLEN8		BIT(2)</div><div class='add'>+#define DMA_AXI_BLEN4		BIT(1)</div><div class='add'>+#define DMA_AXI_BLEN_MASK	GENMASK(7, 1)</div><div class='add'>+</div><div class='add'>+void stmmac_axi_blen_to_mask(u32 *regval, const u32 *blen, size_t len);</div><div class='add'>+</div><div class='ctx'> #define STMMAC_CHAIN_MODE	0x1</div><div class='ctx'> #define STMMAC_RING_MODE	0x2</div><div class='ctx'> </div><div class='hunk'>@@ -543,14 +576,8 @@ struct dma_features {</div><div class='ctx'> #define STMMAC_VLAN_INSERT	0x2</div><div class='ctx'> #define STMMAC_VLAN_REPLACE	0x3</div><div class='ctx'> </div><div class='del'>-extern const struct stmmac_desc_ops enh_desc_ops;</div><div class='del'>-extern const struct stmmac_desc_ops ndesc_ops;</div><div class='del'>-</div><div class='ctx'> struct mac_device_info;</div><div class='ctx'> </div><div class='del'>-extern const struct stmmac_hwtimestamp stmmac_ptp;</div><div class='del'>-extern const struct stmmac_mode_ops dwmac4_ring_mode_ops;</div><div class='del'>-</div><div class='ctx'> struct mac_link {</div><div class='ctx'> 	u32 caps;</div><div class='ctx'> 	u32 speed_mask;</div><div class='hunk'>@@ -592,6 +619,7 @@ struct mac_device_info {</div><div class='ctx'> 	const struct stmmac_tc_ops *tc;</div><div class='ctx'> 	const struct stmmac_mmc_ops *mmc;</div><div class='ctx'> 	const struct stmmac_est_ops *est;</div><div class='add'>+	const struct stmmac_vlan_ops *vlan;</div><div class='ctx'> 	struct dw_xpcs *xpcs;</div><div class='ctx'> 	struct phylink_pcs *phylink_pcs;</div><div class='ctx'> 	struct mii_regs mii;	/* MII register Addresses */</div><div class='hunk'>@@ -602,14 +630,18 @@ struct mac_device_info {</div><div class='ctx'> 	unsigned int mcast_bits_log2;</div><div class='ctx'> 	unsigned int rx_csum;</div><div class='ctx'> 	unsigned int pcs;</div><div class='del'>-	unsigned int pmt;</div><div class='del'>-	unsigned int ps;</div><div class='ctx'> 	unsigned int xlgmac;</div><div class='ctx'> 	unsigned int num_vlan;</div><div class='ctx'> 	u32 vlan_filter[32];</div><div class='ctx'> 	bool vlan_fail_q_en;</div><div class='ctx'> 	u8 vlan_fail_q;</div><div class='ctx'> 	bool hw_vlan_en;</div><div class='add'>+	bool reverse_sgmii_enable;</div><div class='add'>+</div><div class='add'>+	/* This spinlock protects read-modify-write of the interrupt</div><div class='add'>+	 * mask/enable registers.</div><div class='add'>+	 */</div><div class='add'>+	spinlock_t irq_ctrl_lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct stmmac_rx_routing {</div><div class='hunk'>@@ -637,8 +669,4 @@ void stmmac_dwmac4_set_mac(void __iomem *ioaddr, bool enable);</div><div class='ctx'> </div><div class='ctx'> void dwmac_dma_flush_tx_fifo(void __iomem *ioaddr);</div><div class='ctx'> </div><div class='del'>-extern const struct stmmac_mode_ops ring_mode_ops;</div><div class='del'>-extern const struct stmmac_mode_ops chain_mode_ops;</div><div class='del'>-extern const struct stmmac_desc_ops dwmac4_desc_ops;</div><div class='del'>-</div><div class='ctx'> #endif /* __COMMON_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c<br/>index ef99ef3f1ab4..5e0fc31762d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c</a></div><div class='hunk'>@@ -34,7 +34,7 @@ static void gmac_write_reg(struct anarion_gmac *gmac, uint8_t reg, uint32_t val)</div><div class='ctx'> 	writel(val, gmac-&gt;ctl_block + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int anarion_gmac_init(struct platform_device *pdev, void *priv)</div><div class='add'>+static int anarion_gmac_init(struct device *dev, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t sw_config;</div><div class='ctx'> 	struct anarion_gmac *gmac = priv;</div><div class='hunk'>@@ -52,25 +52,25 @@ static int anarion_gmac_init(struct platform_device *pdev, void *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void anarion_gmac_exit(struct platform_device *pdev, void *priv)</div><div class='add'>+static void anarion_gmac_exit(struct device *dev, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct anarion_gmac *gmac = priv;</div><div class='ctx'> </div><div class='ctx'> 	gmac_write_reg(gmac, GMAC_RESET_CONTROL_REG, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct anarion_gmac *anarion_config_dt(struct platform_device *pdev)</div><div class='add'>+static struct anarion_gmac *</div><div class='add'>+anarion_config_dt(struct platform_device *pdev,</div><div class='add'>+		  struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> {</div><div class='ctx'> 	struct anarion_gmac *gmac;</div><div class='del'>-	phy_interface_t phy_mode;</div><div class='ctx'> 	void __iomem *ctl_block;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	ctl_block = devm_platform_ioremap_resource(pdev, 1);</div><div class='ctx'> 	if (IS_ERR(ctl_block)) {</div><div class='del'>-		err = PTR_ERR(ctl_block);</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Cannot get reset region (%d)!\n", err);</div><div class='del'>-		return ERR_PTR(err);</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Cannot get reset region (%pe)!\n",</div><div class='add'>+			ctl_block);</div><div class='add'>+		return ERR_CAST(ctl_block);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	gmac = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*gmac), GFP_KERNEL);</div><div class='hunk'>@@ -79,21 +79,11 @@ static struct anarion_gmac *anarion_config_dt(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	gmac-&gt;ctl_block = ctl_block;</div><div class='ctx'> </div><div class='del'>-	err = of_get_phy_mode(pdev-&gt;dev.of_node, &amp;phy_mode);</div><div class='del'>-	if (err)</div><div class='del'>-		return ERR_PTR(err);</div><div class='del'>-</div><div class='del'>-	switch (phy_mode) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-		fallthrough;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+	if (phy_interface_mode_is_rgmii(plat_dat-&gt;phy_interface)) {</div><div class='ctx'> 		gmac-&gt;phy_intf_sel = GMAC_CONFIG_INTF_RGMII;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Unsupported phy-mode (%d)\n",</div><div class='del'>-			phy_mode);</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Unsupported phy-mode (%s)\n",</div><div class='add'>+			phy_modes(plat_dat-&gt;phy_interface));</div><div class='ctx'> 		return ERR_PTR(-ENOTSUPP);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -111,20 +101,19 @@ static int anarion_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	gmac = anarion_config_dt(pdev);</div><div class='del'>-	if (IS_ERR(gmac))</div><div class='del'>-		return PTR_ERR(gmac);</div><div class='del'>-</div><div class='ctx'> 	plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);</div><div class='ctx'> 	if (IS_ERR(plat_dat))</div><div class='ctx'> 		return PTR_ERR(plat_dat);</div><div class='ctx'> </div><div class='add'>+	gmac = anarion_config_dt(pdev, plat_dat);</div><div class='add'>+	if (IS_ERR(gmac))</div><div class='add'>+		return PTR_ERR(gmac);</div><div class='add'>+</div><div class='ctx'> 	plat_dat-&gt;init = anarion_gmac_init;</div><div class='ctx'> 	plat_dat-&gt;exit = anarion_gmac_exit;</div><div class='del'>-	anarion_gmac_init(pdev, gmac);</div><div class='ctx'> 	plat_dat-&gt;bsp_priv = gmac;</div><div class='ctx'> </div><div class='del'>-	return stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='add'>+	return devm_stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id anarion_dwmac_match[] = {</div><div class='hunk'>@@ -135,7 +124,6 @@ MODULE_DEVICE_TABLE(of, anarion_dwmac_match);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver anarion_dwmac_driver = {</div><div class='ctx'> 	.probe  = anarion_dwmac_probe,</div><div class='del'>-	.remove = stmmac_pltfr_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name           = "anarion-dwmac",</div><div class='ctx'> 		.pm		= &amp;stmmac_pltfr_pm_ops,</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c<br/>index 83290e707df5..d043bad4a862 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c</a></div><div class='hunk'>@@ -29,10 +29,6 @@ struct tegra_eqos {</div><div class='ctx'> 	void __iomem *regs;</div><div class='ctx'> </div><div class='ctx'> 	struct reset_control *rst;</div><div class='del'>-	struct clk *clk_master;</div><div class='del'>-	struct clk *clk_slave;</div><div class='del'>-	struct clk *clk_tx;</div><div class='del'>-	struct clk *clk_rx;</div><div class='ctx'> </div><div class='ctx'> 	struct gpio_desc *reset;</div><div class='ctx'> };</div><div class='hunk'>@@ -42,11 +38,11 @@ static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	u32 burst_map = 0;</div><div class='del'>-	u32 bit_index = 0;</div><div class='del'>-	u32 a_index = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!plat_dat-&gt;axi) {</div><div class='del'>-		plat_dat-&gt;axi = kzalloc(sizeof(struct stmmac_axi), GFP_KERNEL);</div><div class='add'>+		plat_dat-&gt;axi = devm_kzalloc(&amp;pdev-&gt;dev,</div><div class='add'>+					     sizeof(struct stmmac_axi),</div><div class='add'>+					     GFP_KERNEL);</div><div class='ctx'> </div><div class='ctx'> 		if (!plat_dat-&gt;axi)</div><div class='ctx'> 			return -ENOMEM;</div><div class='hunk'>@@ -85,33 +81,11 @@ static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	device_property_read_u32(dev, "snps,burst-map", &amp;burst_map);</div><div class='ctx'> </div><div class='del'>-	/* converts burst-map bitmask to burst array */</div><div class='del'>-	for (bit_index = 0; bit_index &lt; 7; bit_index++) {</div><div class='del'>-		if (burst_map &amp; (1 &lt;&lt; bit_index)) {</div><div class='del'>-			switch (bit_index) {</div><div class='del'>-			case 0:</div><div class='del'>-			plat_dat-&gt;axi-&gt;axi_blen[a_index] = 4; break;</div><div class='del'>-			case 1:</div><div class='del'>-			plat_dat-&gt;axi-&gt;axi_blen[a_index] = 8; break;</div><div class='del'>-			case 2:</div><div class='del'>-			plat_dat-&gt;axi-&gt;axi_blen[a_index] = 16; break;</div><div class='del'>-			case 3:</div><div class='del'>-			plat_dat-&gt;axi-&gt;axi_blen[a_index] = 32; break;</div><div class='del'>-			case 4:</div><div class='del'>-			plat_dat-&gt;axi-&gt;axi_blen[a_index] = 64; break;</div><div class='del'>-			case 5:</div><div class='del'>-			plat_dat-&gt;axi-&gt;axi_blen[a_index] = 128; break;</div><div class='del'>-			case 6:</div><div class='del'>-			plat_dat-&gt;axi-&gt;axi_blen[a_index] = 256; break;</div><div class='del'>-			default:</div><div class='del'>-			break;</div><div class='del'>-			}</div><div class='del'>-			a_index++;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	plat_dat-&gt;axi-&gt;axi_blen_regval = FIELD_PREP(DMA_AXI_BLEN_MASK,</div><div class='add'>+						    burst_map);</div><div class='ctx'> </div><div class='ctx'> 	/* dwc-qos needs GMAC4, AAL, TSO and PMT */</div><div class='del'>-	plat_dat-&gt;has_gmac4 = 1;</div><div class='add'>+	plat_dat-&gt;core_type = DWMAC_CORE_GMAC4;</div><div class='ctx'> 	plat_dat-&gt;dma_cfg-&gt;aal = 1;</div><div class='ctx'> 	plat_dat-&gt;flags |= STMMAC_FLAG_TSO_EN;</div><div class='ctx'> 	plat_dat-&gt;pmt = 1;</div><div class='hunk'>@@ -123,49 +97,9 @@ static int dwc_qos_probe(struct platform_device *pdev,</div><div class='ctx'> 			 struct plat_stmmacenet_data *plat_dat,</div><div class='ctx'> 			 struct stmmac_resources *stmmac_res)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	plat_dat-&gt;stmmac_clk = devm_clk_get(&amp;pdev-&gt;dev, "apb_pclk");</div><div class='del'>-	if (IS_ERR(plat_dat-&gt;stmmac_clk)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "apb_pclk clock not found.\n");</div><div class='del'>-		return PTR_ERR(plat_dat-&gt;stmmac_clk);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(plat_dat-&gt;stmmac_clk);</div><div class='del'>-	if (err &lt; 0) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to enable apb_pclk clock: %d\n",</div><div class='del'>-			err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	plat_dat-&gt;pclk = devm_clk_get(&amp;pdev-&gt;dev, "phy_ref_clk");</div><div class='del'>-	if (IS_ERR(plat_dat-&gt;pclk)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "phy_ref_clk clock not found.\n");</div><div class='del'>-		err = PTR_ERR(plat_dat-&gt;pclk);</div><div class='del'>-		goto disable;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(plat_dat-&gt;pclk);</div><div class='del'>-	if (err &lt; 0) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to enable phy_ref clock: %d\n",</div><div class='del'>-			err);</div><div class='del'>-		goto disable;</div><div class='del'>-	}</div><div class='add'>+	plat_dat-&gt;pclk = stmmac_pltfr_find_clk(plat_dat, "phy_ref_clk");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-disable:</div><div class='del'>-	clk_disable_unprepare(plat_dat-&gt;stmmac_clk);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dwc_qos_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	clk_disable_unprepare(priv-&gt;plat-&gt;pclk);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;plat-&gt;stmmac_clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define SDMEMCOMPPADCTRL 0x8800</div><div class='hunk'>@@ -178,35 +112,34 @@ static void dwc_qos_remove(struct platform_device *pdev)</div><div class='ctx'> #define AUTO_CAL_STATUS 0x880c</div><div class='ctx'> #define  AUTO_CAL_STATUS_ACTIVE BIT(31)</div><div class='ctx'> </div><div class='del'>-static void tegra_eqos_fix_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='add'>+static void tegra_eqos_fix_speed(void *bsp_priv, int speed, unsigned int mode)</div><div class='ctx'> {</div><div class='del'>-	struct tegra_eqos *eqos = priv;</div><div class='del'>-	unsigned long rate = 125000000;</div><div class='add'>+	struct tegra_eqos *eqos = bsp_priv;</div><div class='ctx'> 	bool needs_calibration = false;</div><div class='add'>+	struct stmmac_priv *priv;</div><div class='ctx'> 	u32 value;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	switch (speed) {</div><div class='ctx'> 	case SPEED_1000:</div><div class='del'>-		needs_calibration = true;</div><div class='del'>-		rate = 125000000;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	case SPEED_100:</div><div class='ctx'> 		needs_calibration = true;</div><div class='del'>-		rate = 25000000;</div><div class='del'>-		break;</div><div class='add'>+		fallthrough;</div><div class='ctx'> </div><div class='ctx'> 	case SPEED_10:</div><div class='del'>-		rate = 2500000;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		dev_err(eqos-&gt;dev, "invalid speed %u\n", speed);</div><div class='add'>+		dev_err(eqos-&gt;dev, "invalid speed %d\n", speed);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (needs_calibration) {</div><div class='add'>+		priv = netdev_priv(dev_get_drvdata(eqos-&gt;dev));</div><div class='add'>+</div><div class='add'>+		/* Calibration should be done with the MDIO bus idle */</div><div class='add'>+		stmmac_mdio_lock(priv);</div><div class='add'>+</div><div class='ctx'> 		/* calibrate */</div><div class='ctx'> 		value = readl(eqos-&gt;regs + SDMEMCOMPPADCTRL);</div><div class='ctx'> 		value |= SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD;</div><div class='hunk'>@@ -240,33 +173,17 @@ static void tegra_eqos_fix_speed(void *priv, unsigned int speed, unsigned int mo</div><div class='ctx'> 		value = readl(eqos-&gt;regs + SDMEMCOMPPADCTRL);</div><div class='ctx'> 		value &amp;= ~SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD;</div><div class='ctx'> 		writel(value, eqos-&gt;regs + SDMEMCOMPPADCTRL);</div><div class='add'>+</div><div class='add'>+		stmmac_mdio_unlock(priv);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		value = readl(eqos-&gt;regs + AUTO_CAL_CONFIG);</div><div class='ctx'> 		value &amp;= ~AUTO_CAL_CONFIG_ENABLE;</div><div class='ctx'> 		writel(value, eqos-&gt;regs + AUTO_CAL_CONFIG);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	err = clk_set_rate(eqos-&gt;clk_tx, rate);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		dev_err(eqos-&gt;dev, "failed to set TX rate: %d\n", err);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int tegra_eqos_init(struct platform_device *pdev, void *priv)</div><div class='del'>-{</div><div class='del'>-	struct tegra_eqos *eqos = priv;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	rate = clk_get_rate(eqos-&gt;clk_slave);</div><div class='del'>-</div><div class='del'>-	value = (rate / 1000000) - 1;</div><div class='del'>-	writel(value, eqos-&gt;regs + GMAC_1US_TIC_COUNTER);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tegra_eqos_probe(struct platform_device *pdev,</div><div class='del'>-			    struct plat_stmmacenet_data *data,</div><div class='add'>+			    struct plat_stmmacenet_data *plat_dat,</div><div class='ctx'> 			    struct stmmac_resources *res)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -283,59 +200,19 @@ static int tegra_eqos_probe(struct platform_device *pdev,</div><div class='ctx'> 	if (!is_of_node(dev-&gt;fwnode))</div><div class='ctx'> 		goto bypass_clk_reset_gpio;</div><div class='ctx'> </div><div class='del'>-	eqos-&gt;clk_master = devm_clk_get(&amp;pdev-&gt;dev, "master_bus");</div><div class='del'>-	if (IS_ERR(eqos-&gt;clk_master)) {</div><div class='del'>-		err = PTR_ERR(eqos-&gt;clk_master);</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(eqos-&gt;clk_master);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	eqos-&gt;clk_slave = devm_clk_get(&amp;pdev-&gt;dev, "slave_bus");</div><div class='del'>-	if (IS_ERR(eqos-&gt;clk_slave)) {</div><div class='del'>-		err = PTR_ERR(eqos-&gt;clk_slave);</div><div class='del'>-		goto disable_master;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	data-&gt;stmmac_clk = eqos-&gt;clk_slave;</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(eqos-&gt;clk_slave);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		goto disable_master;</div><div class='del'>-</div><div class='del'>-	eqos-&gt;clk_rx = devm_clk_get(&amp;pdev-&gt;dev, "rx");</div><div class='del'>-	if (IS_ERR(eqos-&gt;clk_rx)) {</div><div class='del'>-		err = PTR_ERR(eqos-&gt;clk_rx);</div><div class='del'>-		goto disable_slave;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(eqos-&gt;clk_rx);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		goto disable_slave;</div><div class='del'>-</div><div class='del'>-	eqos-&gt;clk_tx = devm_clk_get(&amp;pdev-&gt;dev, "tx");</div><div class='del'>-	if (IS_ERR(eqos-&gt;clk_tx)) {</div><div class='del'>-		err = PTR_ERR(eqos-&gt;clk_tx);</div><div class='del'>-		goto disable_rx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(eqos-&gt;clk_tx);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		goto disable_rx;</div><div class='add'>+	plat_dat-&gt;clk_tx_i = stmmac_pltfr_find_clk(plat_dat, "tx");</div><div class='ctx'> </div><div class='ctx'> 	eqos-&gt;reset = devm_gpiod_get(&amp;pdev-&gt;dev, "phy-reset", GPIOD_OUT_HIGH);</div><div class='ctx'> 	if (IS_ERR(eqos-&gt;reset)) {</div><div class='ctx'> 		err = PTR_ERR(eqos-&gt;reset);</div><div class='del'>-		goto disable_tx;</div><div class='add'>+		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	usleep_range(2000, 4000);</div><div class='ctx'> 	gpiod_set_value(eqos-&gt;reset, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* MDIO bus was already reset just above */</div><div class='del'>-	data-&gt;mdio_bus_data-&gt;needs_reset = false;</div><div class='add'>+	plat_dat-&gt;mdio_bus_data-&gt;needs_reset = false;</div><div class='ctx'> </div><div class='ctx'> 	eqos-&gt;rst = devm_reset_control_get(&amp;pdev-&gt;dev, "eqos");</div><div class='ctx'> 	if (IS_ERR(eqos-&gt;rst)) {</div><div class='hunk'>@@ -356,29 +233,18 @@ static int tegra_eqos_probe(struct platform_device *pdev,</div><div class='ctx'> 	usleep_range(2000, 4000);</div><div class='ctx'> </div><div class='ctx'> bypass_clk_reset_gpio:</div><div class='del'>-	data-&gt;fix_mac_speed = tegra_eqos_fix_speed;</div><div class='del'>-	data-&gt;init = tegra_eqos_init;</div><div class='del'>-	data-&gt;bsp_priv = eqos;</div><div class='del'>-	data-&gt;flags |= STMMAC_FLAG_SPH_DISABLE;</div><div class='del'>-</div><div class='del'>-	err = tegra_eqos_init(pdev, eqos);</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		goto reset;</div><div class='add'>+	plat_dat-&gt;fix_mac_speed = tegra_eqos_fix_speed;</div><div class='add'>+	plat_dat-&gt;set_clk_tx_rate = stmmac_set_clk_tx_rate;</div><div class='add'>+	plat_dat-&gt;bsp_priv = eqos;</div><div class='add'>+	plat_dat-&gt;flags |= STMMAC_FLAG_SPH_DISABLE |</div><div class='add'>+			   STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP |</div><div class='add'>+			   STMMAC_FLAG_USE_PHY_WOL;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-reset:</div><div class='del'>-	reset_control_assert(eqos-&gt;rst);</div><div class='add'>+</div><div class='ctx'> reset_phy:</div><div class='ctx'> 	gpiod_set_value(eqos-&gt;reset, 1);</div><div class='del'>-disable_tx:</div><div class='del'>-	clk_disable_unprepare(eqos-&gt;clk_tx);</div><div class='del'>-disable_rx:</div><div class='del'>-	clk_disable_unprepare(eqos-&gt;clk_rx);</div><div class='del'>-disable_slave:</div><div class='del'>-	clk_disable_unprepare(eqos-&gt;clk_slave);</div><div class='del'>-disable_master:</div><div class='del'>-	clk_disable_unprepare(eqos-&gt;clk_master);</div><div class='del'>-error:</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -388,27 +254,29 @@ static void tegra_eqos_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	reset_control_assert(eqos-&gt;rst);</div><div class='ctx'> 	gpiod_set_value(eqos-&gt;reset, 1);</div><div class='del'>-	clk_disable_unprepare(eqos-&gt;clk_tx);</div><div class='del'>-	clk_disable_unprepare(eqos-&gt;clk_rx);</div><div class='del'>-	clk_disable_unprepare(eqos-&gt;clk_slave);</div><div class='del'>-	clk_disable_unprepare(eqos-&gt;clk_master);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct dwc_eth_dwmac_data {</div><div class='ctx'> 	int (*probe)(struct platform_device *pdev,</div><div class='del'>-		     struct plat_stmmacenet_data *data,</div><div class='add'>+		     struct plat_stmmacenet_data *plat_dat,</div><div class='ctx'> 		     struct stmmac_resources *res);</div><div class='ctx'> 	void (*remove)(struct platform_device *pdev);</div><div class='add'>+	const char *stmmac_clk_name;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct dwc_eth_dwmac_data dwc_qos_data = {</div><div class='ctx'> 	.probe = dwc_qos_probe,</div><div class='del'>-	.remove = dwc_qos_remove,</div><div class='add'>+	.stmmac_clk_name = "apb_pclk",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct dwc_eth_dwmac_data tegra_eqos_data = {</div><div class='ctx'> 	.probe = tegra_eqos_probe,</div><div class='ctx'> 	.remove = tegra_eqos_remove,</div><div class='add'>+	.stmmac_clk_name = "slave_bus",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dwc_eth_dwmac_data fsd_eqos_data = {</div><div class='add'>+	.stmmac_clk_name = "slave_bus",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int dwc_eth_dwmac_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -439,7 +307,16 @@ static int dwc_eth_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (IS_ERR(plat_dat))</div><div class='ctx'> 		return PTR_ERR(plat_dat);</div><div class='ctx'> </div><div class='del'>-	ret = data-&gt;probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='add'>+	ret = devm_clk_bulk_get_all_enabled(&amp;pdev-&gt;dev, &amp;plat_dat-&gt;clks);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, ret, "Failed to retrieve and enable all required clocks\n");</div><div class='add'>+	plat_dat-&gt;num_clks = ret;</div><div class='add'>+</div><div class='add'>+	plat_dat-&gt;stmmac_clk = stmmac_pltfr_find_clk(plat_dat,</div><div class='add'>+						     data-&gt;stmmac_clk_name);</div><div class='add'>+</div><div class='add'>+	if (data-&gt;probe)</div><div class='add'>+		ret = data-&gt;probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		dev_err_probe(&amp;pdev-&gt;dev, ret, "failed to probe subdriver\n");</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -456,7 +333,8 @@ static int dwc_eth_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> remove:</div><div class='del'>-	data-&gt;remove(pdev);</div><div class='add'>+	if (data-&gt;remove)</div><div class='add'>+		data-&gt;remove(pdev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -467,12 +345,14 @@ static void dwc_eth_dwmac_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	stmmac_dvr_remove(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	data-&gt;remove(pdev);</div><div class='add'>+	if (data-&gt;remove)</div><div class='add'>+		data-&gt;remove(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id dwc_eth_dwmac_match[] = {</div><div class='ctx'> 	{ .compatible = "snps,dwc-qos-ethernet-4.10", .data = &amp;dwc_qos_data },</div><div class='ctx'> 	{ .compatible = "nvidia,tegra186-eqos", .data = &amp;tegra_eqos_data },</div><div class='add'>+	{ .compatible = "tesla,fsd-ethqos", .data = &amp;fsd_eqos_data },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, dwc_eth_dwmac_match);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c<br/>new file mode 100644<br/>index 000000000000..bcb8e000e720<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c</a></div><div class='hunk'>@@ -0,0 +1,235 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Eswin DWC Ethernet linux driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2025, Beijing ESWIN Computing Technology Co., Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Authors:</div><div class='add'>+ *   Zhi Li &lt;lizhi2@eswincomputing.com&gt;</div><div class='add'>+ *   Shuang Liang &lt;liangshuang@eswincomputing.com&gt;</div><div class='add'>+ *   Shangjuan Wei &lt;weishangjuan@eswincomputing.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/stmmac.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stmmac_platform.h"</div><div class='add'>+</div><div class='add'>+/* eth_phy_ctrl_offset eth0:0x100 */</div><div class='add'>+#define EIC7700_ETH_TX_CLK_SEL		BIT(16)</div><div class='add'>+#define EIC7700_ETH_PHY_INTF_SELI	BIT(0)</div><div class='add'>+</div><div class='add'>+/* eth_axi_lp_ctrl_offset eth0:0x108 */</div><div class='add'>+#define EIC7700_ETH_CSYSREQ_VAL		BIT(0)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * TX/RX Clock Delay Bit Masks:</div><div class='add'>+ * - TX Delay: bits [14:8] — TX_CLK delay (unit: 0.1ns per bit)</div><div class='add'>+ * - RX Delay: bits [30:24] — RX_CLK delay (unit: 0.1ns per bit)</div><div class='add'>+ */</div><div class='add'>+#define EIC7700_ETH_TX_ADJ_DELAY	GENMASK(14, 8)</div><div class='add'>+#define EIC7700_ETH_RX_ADJ_DELAY	GENMASK(30, 24)</div><div class='add'>+</div><div class='add'>+#define EIC7700_MAX_DELAY_UNIT 0x7F</div><div class='add'>+</div><div class='add'>+static const char * const eic7700_clk_names[] = {</div><div class='add'>+	"tx", "axi", "cfg",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct eic7700_qos_priv {</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int eic7700_clks_config(void *priv, bool enabled)</div><div class='add'>+{</div><div class='add'>+	struct eic7700_qos_priv *dwc = (struct eic7700_qos_priv *)priv;</div><div class='add'>+	struct plat_stmmacenet_data *plat = dwc-&gt;plat_dat;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (enabled)</div><div class='add'>+		ret = clk_bulk_prepare_enable(plat-&gt;num_clks, plat-&gt;clks);</div><div class='add'>+	else</div><div class='add'>+		clk_bulk_disable_unprepare(plat-&gt;num_clks, plat-&gt;clks);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int eic7700_dwmac_init(struct device *dev, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct eic7700_qos_priv *dwc = priv;</div><div class='add'>+</div><div class='add'>+	return eic7700_clks_config(dwc, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void eic7700_dwmac_exit(struct device *dev, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct eic7700_qos_priv *dwc = priv;</div><div class='add'>+</div><div class='add'>+	eic7700_clks_config(dwc, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int eic7700_dwmac_suspend(struct device *dev, void *priv)</div><div class='add'>+{</div><div class='add'>+	return pm_runtime_force_suspend(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int eic7700_dwmac_resume(struct device *dev, void *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_force_resume(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev, "%s failed: %d\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int eic7700_dwmac_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='add'>+	struct stmmac_resources stmmac_res;</div><div class='add'>+	struct eic7700_qos_priv *dwc_priv;</div><div class='add'>+	struct regmap *eic7700_hsp_regmap;</div><div class='add'>+	u32 eth_axi_lp_ctrl_offset;</div><div class='add'>+	u32 eth_phy_ctrl_offset;</div><div class='add'>+	u32 eth_phy_ctrl_regset;</div><div class='add'>+	u32 eth_rxd_dly_offset;</div><div class='add'>+	u32 eth_dly_param = 0;</div><div class='add'>+	u32 delay_ps;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	ret = stmmac_get_platform_resources(pdev, &amp;stmmac_res);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, ret,</div><div class='add'>+				"failed to get resources\n");</div><div class='add'>+</div><div class='add'>+	plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);</div><div class='add'>+	if (IS_ERR(plat_dat))</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(plat_dat),</div><div class='add'>+				"dt configuration failed\n");</div><div class='add'>+</div><div class='add'>+	dwc_priv = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*dwc_priv), GFP_KERNEL);</div><div class='add'>+	if (!dwc_priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Read rx-internal-delay-ps and update rx_clk delay */</div><div class='add'>+	if (!of_property_read_u32(pdev-&gt;dev.of_node,</div><div class='add'>+				  "rx-internal-delay-ps", &amp;delay_ps)) {</div><div class='add'>+		u32 val = min(delay_ps / 100, EIC7700_MAX_DELAY_UNIT);</div><div class='add'>+</div><div class='add'>+		eth_dly_param &amp;= ~EIC7700_ETH_RX_ADJ_DELAY;</div><div class='add'>+		eth_dly_param |= FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, val);</div><div class='add'>+	} else {</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, -EINVAL,</div><div class='add'>+			"missing required property rx-internal-delay-ps\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read tx-internal-delay-ps and update tx_clk delay */</div><div class='add'>+	if (!of_property_read_u32(pdev-&gt;dev.of_node,</div><div class='add'>+				  "tx-internal-delay-ps", &amp;delay_ps)) {</div><div class='add'>+		u32 val = min(delay_ps / 100, EIC7700_MAX_DELAY_UNIT);</div><div class='add'>+</div><div class='add'>+		eth_dly_param &amp;= ~EIC7700_ETH_TX_ADJ_DELAY;</div><div class='add'>+		eth_dly_param |= FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, val);</div><div class='add'>+	} else {</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, -EINVAL,</div><div class='add'>+			"missing required property tx-internal-delay-ps\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	eic7700_hsp_regmap = syscon_regmap_lookup_by_phandle(pdev-&gt;dev.of_node,</div><div class='add'>+							     "eswin,hsp-sp-csr");</div><div class='add'>+	if (IS_ERR(eic7700_hsp_regmap))</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev,</div><div class='add'>+				PTR_ERR(eic7700_hsp_regmap),</div><div class='add'>+				"Failed to get hsp-sp-csr regmap\n");</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32_index(pdev-&gt;dev.of_node,</div><div class='add'>+					 "eswin,hsp-sp-csr",</div><div class='add'>+					 1, &amp;eth_phy_ctrl_offset);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, ret,</div><div class='add'>+				     "can't get eth_phy_ctrl_offset\n");</div><div class='add'>+</div><div class='add'>+	regmap_read(eic7700_hsp_regmap, eth_phy_ctrl_offset,</div><div class='add'>+		    &amp;eth_phy_ctrl_regset);</div><div class='add'>+	eth_phy_ctrl_regset |=</div><div class='add'>+		(EIC7700_ETH_TX_CLK_SEL | EIC7700_ETH_PHY_INTF_SELI);</div><div class='add'>+	regmap_write(eic7700_hsp_regmap, eth_phy_ctrl_offset,</div><div class='add'>+		     eth_phy_ctrl_regset);</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32_index(pdev-&gt;dev.of_node,</div><div class='add'>+					 "eswin,hsp-sp-csr",</div><div class='add'>+					 2, &amp;eth_axi_lp_ctrl_offset);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, ret,</div><div class='add'>+				     "can't get eth_axi_lp_ctrl_offset\n");</div><div class='add'>+</div><div class='add'>+	regmap_write(eic7700_hsp_regmap, eth_axi_lp_ctrl_offset,</div><div class='add'>+		     EIC7700_ETH_CSYSREQ_VAL);</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32_index(pdev-&gt;dev.of_node,</div><div class='add'>+					 "eswin,hsp-sp-csr",</div><div class='add'>+					 3, &amp;eth_rxd_dly_offset);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, ret,</div><div class='add'>+				     "can't get eth_rxd_dly_offset\n");</div><div class='add'>+</div><div class='add'>+	regmap_write(eic7700_hsp_regmap, eth_rxd_dly_offset,</div><div class='add'>+		     eth_dly_param);</div><div class='add'>+</div><div class='add'>+	plat_dat-&gt;num_clks = ARRAY_SIZE(eic7700_clk_names);</div><div class='add'>+	plat_dat-&gt;clks = devm_kcalloc(&amp;pdev-&gt;dev,</div><div class='add'>+				      plat_dat-&gt;num_clks,</div><div class='add'>+				      sizeof(*plat_dat-&gt;clks),</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+	if (!plat_dat-&gt;clks)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eic7700_clk_names); i++)</div><div class='add'>+		plat_dat-&gt;clks[i].id = eic7700_clk_names[i];</div><div class='add'>+</div><div class='add'>+	ret = devm_clk_bulk_get_optional(&amp;pdev-&gt;dev,</div><div class='add'>+					 plat_dat-&gt;num_clks,</div><div class='add'>+					 plat_dat-&gt;clks);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, ret,</div><div class='add'>+				     "Failed to get clocks\n");</div><div class='add'>+</div><div class='add'>+	plat_dat-&gt;clk_tx_i = stmmac_pltfr_find_clk(plat_dat, "tx");</div><div class='add'>+	plat_dat-&gt;set_clk_tx_rate = stmmac_set_clk_tx_rate;</div><div class='add'>+	plat_dat-&gt;clks_config = eic7700_clks_config;</div><div class='add'>+	plat_dat-&gt;bsp_priv = dwc_priv;</div><div class='add'>+	dwc_priv-&gt;plat_dat = plat_dat;</div><div class='add'>+	plat_dat-&gt;init = eic7700_dwmac_init;</div><div class='add'>+	plat_dat-&gt;exit = eic7700_dwmac_exit;</div><div class='add'>+	plat_dat-&gt;suspend = eic7700_dwmac_suspend;</div><div class='add'>+	plat_dat-&gt;resume = eic7700_dwmac_resume;</div><div class='add'>+</div><div class='add'>+	return devm_stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id eic7700_dwmac_match[] = {</div><div class='add'>+	{ .compatible = "eswin,eic7700-qos-eth" },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, eic7700_dwmac_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver eic7700_dwmac_driver = {</div><div class='add'>+	.probe  = eic7700_dwmac_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name           = "eic7700-eth-dwmac",</div><div class='add'>+		.pm             = &amp;stmmac_pltfr_pm_ops,</div><div class='add'>+		.of_match_table = eic7700_dwmac_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(eic7700_dwmac_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Zhi Li &lt;lizhi2@eswincomputing.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Shuang Liang &lt;liangshuang@eswincomputing.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Shangjuan Wei &lt;weishangjuan@eswincomputing.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Eswin eic7700 qos ethernet driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c<br/>index 598eff926815..b9218c07eb6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c</a></div><div class='hunk'>@@ -56,6 +56,7 @@ static const struct of_device_id dwmac_generic_match[] = {</div><div class='ctx'> 	{ .compatible = "snps,dwmac-3.610"},</div><div class='ctx'> 	{ .compatible = "snps,dwmac-3.70a"},</div><div class='ctx'> 	{ .compatible = "snps,dwmac-3.710"},</div><div class='add'>+	{ .compatible = "snps,dwmac-3.72a"},</div><div class='ctx'> 	{ .compatible = "snps,dwmac-4.00"},</div><div class='ctx'> 	{ .compatible = "snps,dwmac-4.10a"},</div><div class='ctx'> 	{ .compatible = "snps,dwmac"},</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c<br/>index 641f3cd019a3..db288fbd5a4d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c</a></div><div class='hunk'>@@ -23,33 +23,32 @@</div><div class='ctx'> #include "stmmac_platform.h"</div><div class='ctx'> </div><div class='ctx'> #define GPR_ENET_QOS_INTF_MODE_MASK	GENMASK(21, 16)</div><div class='del'>-#define GPR_ENET_QOS_INTF_SEL_MII	(0x0 &lt;&lt; 16)</div><div class='del'>-#define GPR_ENET_QOS_INTF_SEL_RMII	(0x4 &lt;&lt; 16)</div><div class='del'>-#define GPR_ENET_QOS_INTF_SEL_RGMII	(0x1 &lt;&lt; 16)</div><div class='add'>+#define GPR_ENET_QOS_INTF_SEL_MASK	GENMASK(20, 16)</div><div class='ctx'> #define GPR_ENET_QOS_CLK_GEN_EN		(0x1 &lt;&lt; 19)</div><div class='ctx'> #define GPR_ENET_QOS_CLK_TX_CLK_SEL	(0x1 &lt;&lt; 20)</div><div class='ctx'> #define GPR_ENET_QOS_RGMII_EN		(0x1 &lt;&lt; 21)</div><div class='ctx'> </div><div class='ctx'> #define MX93_GPR_ENET_QOS_INTF_MODE_MASK	GENMASK(3, 0)</div><div class='del'>-#define MX93_GPR_ENET_QOS_INTF_MASK		GENMASK(3, 1)</div><div class='del'>-#define MX93_GPR_ENET_QOS_INTF_SEL_MII		(0x0 &lt;&lt; 1)</div><div class='del'>-#define MX93_GPR_ENET_QOS_INTF_SEL_RMII		(0x4 &lt;&lt; 1)</div><div class='del'>-#define MX93_GPR_ENET_QOS_INTF_SEL_RGMII	(0x1 &lt;&lt; 1)</div><div class='add'>+#define MX93_GPR_ENET_QOS_INTF_SEL_MASK		GENMASK(3, 1)</div><div class='ctx'> #define MX93_GPR_ENET_QOS_CLK_GEN_EN		(0x1 &lt;&lt; 0)</div><div class='add'>+#define MX93_GPR_ENET_QOS_CLK_SEL_MASK		BIT_MASK(0)</div><div class='add'>+#define MX93_GPR_CLK_SEL_OFFSET			(4)</div><div class='ctx'> </div><div class='ctx'> #define DMA_BUS_MODE			0x00001000</div><div class='ctx'> #define DMA_BUS_MODE_SFT_RESET		(0x1 &lt;&lt; 0)</div><div class='ctx'> #define RMII_RESET_SPEED		(0x3 &lt;&lt; 14)</div><div class='ctx'> #define CTRL_SPEED_MASK			GENMASK(15, 14)</div><div class='ctx'> </div><div class='add'>+struct imx_priv_data;</div><div class='add'>+</div><div class='ctx'> struct imx_dwmac_ops {</div><div class='ctx'> 	u32 addr_width;</div><div class='ctx'> 	u32 flags;</div><div class='ctx'> 	bool mac_rgmii_txclk_auto_adj;</div><div class='ctx'> </div><div class='del'>-	int (*fix_soc_reset)(void *priv, void __iomem *ioaddr);</div><div class='del'>-	int (*set_intf_mode)(struct plat_stmmacenet_data *plat_dat);</div><div class='del'>-	void (*fix_mac_speed)(void *priv, unsigned int speed, unsigned int mode);</div><div class='add'>+	int (*fix_soc_reset)(struct stmmac_priv *priv, void __iomem *ioaddr);</div><div class='add'>+	int (*set_intf_mode)(struct imx_priv_data *dwmac, u8 phy_intf_sel);</div><div class='add'>+	void (*fix_mac_speed)(void *priv, int speed, unsigned int mode);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct imx_priv_data {</div><div class='hunk'>@@ -65,71 +64,46 @@ struct imx_priv_data {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat_dat;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int imx8mp_set_intf_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='add'>+static int imx8mp_set_intf_mode(struct imx_priv_data *dwmac, u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	struct imx_priv_data *dwmac = plat_dat-&gt;bsp_priv;</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_MII:</div><div class='del'>-		val = GPR_ENET_QOS_INTF_SEL_MII;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		val = GPR_ENET_QOS_INTF_SEL_RMII;</div><div class='del'>-		val |= (dwmac-&gt;rmii_refclk_ext ? 0 : GPR_ENET_QOS_CLK_TX_CLK_SEL);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		val = GPR_ENET_QOS_INTF_SEL_RGMII |</div><div class='del'>-		      GPR_ENET_QOS_RGMII_EN;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		pr_debug("imx dwmac doesn't support %d interface\n",</div><div class='del'>-			 plat_dat-&gt;mac_interface);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(GPR_ENET_QOS_INTF_SEL_MASK, phy_intf_sel) |</div><div class='add'>+	      GPR_ENET_QOS_CLK_GEN_EN;</div><div class='add'>+</div><div class='add'>+	if (phy_intf_sel == PHY_INTF_SEL_RMII &amp;&amp; !dwmac-&gt;rmii_refclk_ext)</div><div class='add'>+		val |= GPR_ENET_QOS_CLK_TX_CLK_SEL;</div><div class='add'>+	else if (phy_intf_sel == PHY_INTF_SEL_RGMII)</div><div class='add'>+		val |= GPR_ENET_QOS_RGMII_EN;</div><div class='ctx'> </div><div class='del'>-	val |= GPR_ENET_QOS_CLK_GEN_EN;</div><div class='ctx'> 	return regmap_update_bits(dwmac-&gt;intf_regmap, dwmac-&gt;intf_reg_off,</div><div class='ctx'> 				  GPR_ENET_QOS_INTF_MODE_MASK, val);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-imx8dxl_set_intf_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='add'>+imx8dxl_set_intf_mode(struct imx_priv_data *dwmac, u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='ctx'> 	/* TBD: depends on imx8dxl scu interfaces to be upstreamed */</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='add'>+static int imx93_set_intf_mode(struct imx_priv_data *dwmac, u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	struct imx_priv_data *dwmac = plat_dat-&gt;bsp_priv;</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_MII:</div><div class='del'>-		val = MX93_GPR_ENET_QOS_INTF_SEL_MII;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		val = MX93_GPR_ENET_QOS_INTF_SEL_RMII;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		val = MX93_GPR_ENET_QOS_INTF_SEL_RGMII;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_dbg(dwmac-&gt;dev, "imx dwmac doesn't support %d interface\n",</div><div class='del'>-			 plat_dat-&gt;mac_interface);</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	unsigned int val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phy_intf_sel == PHY_INTF_SEL_RMII &amp;&amp; dwmac-&gt;rmii_refclk_ext) {</div><div class='add'>+		ret = regmap_clear_bits(dwmac-&gt;intf_regmap,</div><div class='add'>+					dwmac-&gt;intf_reg_off +</div><div class='add'>+					MX93_GPR_CLK_SEL_OFFSET,</div><div class='add'>+					MX93_GPR_ENET_QOS_CLK_SEL_MASK);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	val |= MX93_GPR_ENET_QOS_CLK_GEN_EN;</div><div class='add'>+	val = FIELD_PREP(MX93_GPR_ENET_QOS_INTF_SEL_MASK, phy_intf_sel) |</div><div class='add'>+	      MX93_GPR_ENET_QOS_CLK_GEN_EN;</div><div class='add'>+</div><div class='ctx'> 	return regmap_update_bits(dwmac-&gt;intf_regmap, dwmac-&gt;intf_reg_off,</div><div class='ctx'> 				  MX93_GPR_ENET_QOS_INTF_MODE_MASK, val);</div><div class='ctx'> };</div><div class='hunk'>@@ -160,54 +134,48 @@ static int imx_dwmac_clks_config(void *priv, bool enabled)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int imx_dwmac_init(struct platform_device *pdev, void *priv)</div><div class='add'>+static int imx_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	struct plat_stmmacenet_data *plat_dat;</div><div class='del'>-	struct imx_priv_data *dwmac = priv;</div><div class='del'>-	int ret;</div><div class='add'>+	struct imx_priv_data *dwmac = bsp_priv;</div><div class='ctx'> </div><div class='del'>-	plat_dat = dwmac-&gt;plat_dat;</div><div class='add'>+	if (!dwmac-&gt;ops-&gt;set_intf_mode)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	if (dwmac-&gt;ops-&gt;set_intf_mode) {</div><div class='del'>-		ret = dwmac-&gt;ops-&gt;set_intf_mode(plat_dat);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='add'>+	if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RGMII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RMII)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return dwmac-&gt;ops-&gt;set_intf_mode(dwmac, phy_intf_sel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void imx_dwmac_exit(struct platform_device *pdev, void *priv)</div><div class='add'>+static int imx_dwmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,</div><div class='add'>+				     phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	/* nothing to do now */</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_RMII ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_MII)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return stmmac_set_clk_tx_rate(bsp_priv, clk_tx_i, interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void imx_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='add'>+static void imx_dwmac_fix_speed(void *priv, int speed, unsigned int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat_dat;</div><div class='ctx'> 	struct imx_priv_data *dwmac = priv;</div><div class='del'>-	unsigned long rate;</div><div class='add'>+	long rate;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	plat_dat = dwmac-&gt;plat_dat;</div><div class='ctx'> </div><div class='ctx'> 	if (dwmac-&gt;ops-&gt;mac_rgmii_txclk_auto_adj ||</div><div class='del'>-	    (plat_dat-&gt;mac_interface == PHY_INTERFACE_MODE_RMII) ||</div><div class='del'>-	    (plat_dat-&gt;mac_interface == PHY_INTERFACE_MODE_MII))</div><div class='add'>+	    (plat_dat-&gt;phy_interface == PHY_INTERFACE_MODE_RMII) ||</div><div class='add'>+	    (plat_dat-&gt;phy_interface == PHY_INTERFACE_MODE_MII))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	switch (speed) {</div><div class='del'>-	case SPEED_1000:</div><div class='del'>-		rate = 125000000;</div><div class='del'>-		break;</div><div class='del'>-	case SPEED_100:</div><div class='del'>-		rate = 25000000;</div><div class='del'>-		break;</div><div class='del'>-	case SPEED_10:</div><div class='del'>-		rate = 2500000;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dwmac-&gt;dev, "invalid speed %u\n", speed);</div><div class='add'>+	rate = rgmii_clock(speed);</div><div class='add'>+	if (rate &lt; 0) {</div><div class='add'>+		dev_err(dwmac-&gt;dev, "invalid speed %d\n", speed);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -216,7 +184,7 @@ static void imx_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int mod</div><div class='ctx'> 		dev_err(dwmac-&gt;dev, "failed to set tx rate %lu\n", rate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void imx93_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='add'>+static void imx93_dwmac_fix_speed(void *priv, int speed, unsigned int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct imx_priv_data *dwmac = priv;</div><div class='ctx'> 	unsigned int iface;</div><div class='hunk'>@@ -230,8 +198,8 @@ static void imx93_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int m</div><div class='ctx'> 	if (regmap_read(dwmac-&gt;intf_regmap, dwmac-&gt;intf_reg_off, &amp;iface))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	iface &amp;= MX93_GPR_ENET_QOS_INTF_MASK;</div><div class='del'>-	if (iface != MX93_GPR_ENET_QOS_INTF_SEL_RGMII)</div><div class='add'>+	if (FIELD_GET(MX93_GPR_ENET_QOS_INTF_SEL_MASK, iface) !=</div><div class='add'>+	    PHY_INTF_SEL_RGMII)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	old_ctrl = readl(dwmac-&gt;base_addr + MAC_CTRL_REG);</div><div class='hunk'>@@ -244,6 +212,7 @@ static void imx93_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int m</div><div class='ctx'> 	readl(dwmac-&gt;base_addr + MAC_CTRL_REG);</div><div class='ctx'> </div><div class='ctx'> 	usleep_range(10, 20);</div><div class='add'>+	iface &amp;= MX93_GPR_ENET_QOS_INTF_SEL_MASK;</div><div class='ctx'> 	iface |= MX93_GPR_ENET_QOS_CLK_GEN_EN;</div><div class='ctx'> 	regmap_update_bits(dwmac-&gt;intf_regmap, dwmac-&gt;intf_reg_off,</div><div class='ctx'> 			   MX93_GPR_ENET_QOS_INTF_MODE_MASK, iface);</div><div class='hunk'>@@ -251,16 +220,16 @@ static void imx93_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int m</div><div class='ctx'> 	writel(old_ctrl, dwmac-&gt;base_addr + MAC_CTRL_REG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int imx_dwmac_mx93_reset(void *priv, void __iomem *ioaddr)</div><div class='add'>+static int imx_dwmac_mx93_reset(struct stmmac_priv *priv, void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='del'>-	struct plat_stmmacenet_data *plat_dat = priv;</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat = priv-&gt;plat;</div><div class='ctx'> 	u32 value = readl(ioaddr + DMA_BUS_MODE);</div><div class='ctx'> </div><div class='ctx'> 	/* DMA SW reset */</div><div class='ctx'> 	value |= DMA_BUS_MODE_SFT_RESET;</div><div class='ctx'> 	writel(value, ioaddr + DMA_BUS_MODE);</div><div class='ctx'> </div><div class='del'>-	if (plat_dat-&gt;mac_interface == PHY_INTERFACE_MODE_RMII) {</div><div class='add'>+	if (plat_dat-&gt;phy_interface == PHY_INTERFACE_MODE_RMII) {</div><div class='ctx'> 		usleep_range(100, 200);</div><div class='ctx'> 		writel(RMII_RESET_SPEED, ioaddr + MAC_CTRL_REG);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -287,6 +256,7 @@ imx_dwmac_parse_dt(struct imx_priv_data *dwmac, struct device *dev)</div><div class='ctx'> 	dwmac-&gt;clk_mem = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (of_machine_is_compatible("fsl,imx8dxl") ||</div><div class='add'>+	    of_machine_is_compatible("fsl,imx91") ||</div><div class='ctx'> 	    of_machine_is_compatible("fsl,imx93")) {</div><div class='ctx'> 		dwmac-&gt;clk_mem = devm_clk_get(dev, "mem");</div><div class='ctx'> 		if (IS_ERR(dwmac-&gt;clk_mem)) {</div><div class='hunk'>@@ -296,20 +266,17 @@ imx_dwmac_parse_dt(struct imx_priv_data *dwmac, struct device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (of_machine_is_compatible("fsl,imx8mp") ||</div><div class='add'>+	    of_machine_is_compatible("fsl,imx91") ||</div><div class='ctx'> 	    of_machine_is_compatible("fsl,imx93")) {</div><div class='ctx'> 		/* Binding doc describes the propety:</div><div class='del'>-		 * is required by i.MX8MP, i.MX93.</div><div class='add'>+		 * is required by i.MX8MP, i.MX91, i.MX93.</div><div class='ctx'> 		 * is optinoal for i.MX8DXL.</div><div class='ctx'> 		 */</div><div class='del'>-		dwmac-&gt;intf_regmap = syscon_regmap_lookup_by_phandle(np, "intf_mode");</div><div class='add'>+		dwmac-&gt;intf_regmap =</div><div class='add'>+			syscon_regmap_lookup_by_phandle_args(np, "intf_mode", 1,</div><div class='add'>+							     &amp;dwmac-&gt;intf_reg_off);</div><div class='ctx'> 		if (IS_ERR(dwmac-&gt;intf_regmap))</div><div class='ctx'> 			return PTR_ERR(dwmac-&gt;intf_regmap);</div><div class='del'>-</div><div class='del'>-		err = of_property_read_u32_index(np, "intf_mode", 1, &amp;dwmac-&gt;intf_reg_off);</div><div class='del'>-		if (err) {</div><div class='del'>-			dev_err(dev, "Can't get intf mode reg offset (%d)\n", err);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -358,10 +325,8 @@ static int imx_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 		plat_dat-&gt;tx_queues_cfg[i].tbs_en = 1;</div><div class='ctx'> </div><div class='ctx'> 	plat_dat-&gt;host_dma_width = dwmac-&gt;ops-&gt;addr_width;</div><div class='del'>-	plat_dat-&gt;init = imx_dwmac_init;</div><div class='del'>-	plat_dat-&gt;exit = imx_dwmac_exit;</div><div class='add'>+	plat_dat-&gt;set_phy_intf_sel = imx_set_phy_intf_sel;</div><div class='ctx'> 	plat_dat-&gt;clks_config = imx_dwmac_clks_config;</div><div class='del'>-	plat_dat-&gt;fix_mac_speed = imx_dwmac_fix_speed;</div><div class='ctx'> 	plat_dat-&gt;bsp_priv = dwmac;</div><div class='ctx'> 	dwmac-&gt;plat_dat = plat_dat;</div><div class='ctx'> 	dwmac-&gt;base_addr = stmmac_res.addr;</div><div class='hunk'>@@ -370,24 +335,19 @@ static int imx_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = imx_dwmac_init(pdev, dwmac);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_dwmac_init;</div><div class='del'>-</div><div class='del'>-	if (dwmac-&gt;ops-&gt;fix_mac_speed)</div><div class='add'>+	if (dwmac-&gt;ops-&gt;fix_mac_speed) {</div><div class='ctx'> 		plat_dat-&gt;fix_mac_speed = dwmac-&gt;ops-&gt;fix_mac_speed;</div><div class='add'>+	} else if (!dwmac-&gt;ops-&gt;mac_rgmii_txclk_auto_adj) {</div><div class='add'>+		plat_dat-&gt;clk_tx_i = dwmac-&gt;clk_tx;</div><div class='add'>+		plat_dat-&gt;set_clk_tx_rate = imx_dwmac_set_clk_tx_rate;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	dwmac-&gt;plat_dat-&gt;fix_soc_reset = dwmac-&gt;ops-&gt;fix_soc_reset;</div><div class='ctx'> </div><div class='del'>-	ret = stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='add'>+	ret = stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_drv_probe;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+		imx_dwmac_clks_config(dwmac, false);</div><div class='ctx'> </div><div class='del'>-err_drv_probe:</div><div class='del'>-	imx_dwmac_exit(pdev, plat_dat-&gt;bsp_priv);</div><div class='del'>-err_dwmac_init:</div><div class='del'>-	imx_dwmac_clks_config(dwmac, false);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c<br/>index 066783d66422..8e4a30c11db0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c</a></div><div class='hunk'>@@ -35,10 +35,6 @@</div><div class='ctx'> #define MACPHYC_RX_DELAY_MASK		GENMASK(10, 4)</div><div class='ctx'> #define MACPHYC_SOFT_RST_MASK		GENMASK(3, 3)</div><div class='ctx'> #define MACPHYC_PHY_INFT_MASK		GENMASK(2, 0)</div><div class='del'>-#define MACPHYC_PHY_INFT_RMII		0x4</div><div class='del'>-#define MACPHYC_PHY_INFT_RGMII		0x1</div><div class='del'>-#define MACPHYC_PHY_INFT_GMII		0x0</div><div class='del'>-#define MACPHYC_PHY_INFT_MII		0x0</div><div class='ctx'> </div><div class='ctx'> #define MACPHYC_TX_DELAY_PS_MAX		2496</div><div class='ctx'> #define MACPHYC_TX_DELAY_PS_MIN		20</div><div class='hunk'>@@ -56,6 +52,7 @@ enum ingenic_mac_version {</div><div class='ctx'> </div><div class='ctx'> struct ingenic_mac {</div><div class='ctx'> 	const struct ingenic_soc_info *soc_info;</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct regmap *regmap;</div><div class='ctx'> </div><div class='hunk'>@@ -67,167 +64,93 @@ struct ingenic_soc_info {</div><div class='ctx'> 	enum ingenic_mac_version version;</div><div class='ctx'> 	u32 mask;</div><div class='ctx'> </div><div class='del'>-	int (*set_mode)(struct plat_stmmacenet_data *plat_dat);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int ingenic_mac_init(struct plat_stmmacenet_data *plat_dat)</div><div class='del'>-{</div><div class='del'>-	struct ingenic_mac *mac = plat_dat-&gt;bsp_priv;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (mac-&gt;soc_info-&gt;set_mode) {</div><div class='del'>-		ret = mac-&gt;soc_info-&gt;set_mode(plat_dat);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='add'>+	int (*set_mode)(struct ingenic_mac *mac, u8 phy_intf_sel);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	u8 valid_phy_intf_sel;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static int jz4775_mac_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='add'>+static int jz4775_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	struct ingenic_mac *mac = plat_dat-&gt;bsp_priv;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_MII:</div><div class='del'>-		val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) |</div><div class='del'>-			  FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_MII);</div><div class='del'>-		dev_dbg(mac-&gt;dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_MII\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_GMII:</div><div class='del'>-		val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) |</div><div class='del'>-			  FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_GMII);</div><div class='del'>-		dev_dbg(mac-&gt;dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_GMII\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) |</div><div class='del'>-			  FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII);</div><div class='del'>-		dev_dbg(mac-&gt;dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-		val = FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT) |</div><div class='del'>-			  FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RGMII);</div><div class='del'>-		dev_dbg(mac-&gt;dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		dev_err(mac-&gt;dev, "Unsupported interface %d", plat_dat-&gt;mac_interface);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel) |</div><div class='add'>+	      FIELD_PREP(MACPHYC_TXCLK_SEL_MASK, MACPHYC_TXCLK_SEL_INPUT);</div><div class='ctx'> </div><div class='ctx'> 	/* Update MAC PHY control register */</div><div class='ctx'> 	return regmap_update_bits(mac-&gt;regmap, 0, mac-&gt;soc_info-&gt;mask, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int x1000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='add'>+static int x1000_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	struct ingenic_mac *mac = plat_dat-&gt;bsp_priv;</div><div class='del'>-</div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		dev_dbg(mac-&gt;dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		dev_err(mac-&gt;dev, "Unsupported interface %d", plat_dat-&gt;mac_interface);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Update MAC PHY control register */</div><div class='ctx'> 	return regmap_update_bits(mac-&gt;regmap, 0, mac-&gt;soc_info-&gt;mask, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int x1600_mac_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='add'>+static int x1600_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	struct ingenic_mac *mac = plat_dat-&gt;bsp_priv;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII);</div><div class='del'>-		dev_dbg(mac-&gt;dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		dev_err(mac-&gt;dev, "Unsupported interface %d", plat_dat-&gt;mac_interface);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel);</div><div class='ctx'> </div><div class='ctx'> 	/* Update MAC PHY control register */</div><div class='ctx'> 	return regmap_update_bits(mac-&gt;regmap, 0, mac-&gt;soc_info-&gt;mask, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int x1830_mac_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='add'>+static int x1830_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	struct ingenic_mac *mac = plat_dat-&gt;bsp_priv;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) |</div><div class='del'>-			  FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII);</div><div class='del'>-		dev_dbg(mac-&gt;dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		dev_err(mac-&gt;dev, "Unsupported interface %d", plat_dat-&gt;mac_interface);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	val = FIELD_PREP(MACPHYC_MODE_SEL_MASK, MACPHYC_MODE_SEL_RMII) |</div><div class='add'>+	      FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel);</div><div class='ctx'> </div><div class='ctx'> 	/* Update MAC PHY control register */</div><div class='ctx'> 	return regmap_update_bits(mac-&gt;regmap, 0, mac-&gt;soc_info-&gt;mask, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int x2000_mac_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='add'>+static int x2000_mac_set_mode(struct ingenic_mac *mac, u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	struct ingenic_mac *mac = plat_dat-&gt;bsp_priv;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		val = FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) |</div><div class='del'>-			  FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN) |</div><div class='del'>-			  FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RMII);</div><div class='del'>-		dev_dbg(mac-&gt;dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RMII\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-		val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, MACPHYC_PHY_INFT_RGMII);</div><div class='add'>+	val = FIELD_PREP(MACPHYC_PHY_INFT_MASK, phy_intf_sel);</div><div class='ctx'> </div><div class='add'>+	if (phy_intf_sel == PHY_INTF_SEL_RMII) {</div><div class='add'>+		val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN) |</div><div class='add'>+		       FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN);</div><div class='add'>+	} else if (phy_intf_sel == PHY_INTF_SEL_RGMII) {</div><div class='ctx'> 		if (mac-&gt;tx_delay == 0)</div><div class='ctx'> 			val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_ORIGIN);</div><div class='ctx'> 		else</div><div class='ctx'> 			val |= FIELD_PREP(MACPHYC_TX_SEL_MASK, MACPHYC_TX_SEL_DELAY) |</div><div class='del'>-				   FIELD_PREP(MACPHYC_TX_DELAY_MASK, (mac-&gt;tx_delay + 9750) / 19500 - 1);</div><div class='add'>+			       FIELD_PREP(MACPHYC_TX_DELAY_MASK, (mac-&gt;tx_delay + 9750) / 19500 - 1);</div><div class='ctx'> </div><div class='ctx'> 		if (mac-&gt;rx_delay == 0)</div><div class='ctx'> 			val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_ORIGIN);</div><div class='ctx'> 		else</div><div class='ctx'> 			val |= FIELD_PREP(MACPHYC_RX_SEL_MASK, MACPHYC_RX_SEL_DELAY) |</div><div class='ctx'> 				   FIELD_PREP(MACPHYC_RX_DELAY_MASK, (mac-&gt;rx_delay + 9750) / 19500 - 1);</div><div class='del'>-</div><div class='del'>-		dev_dbg(mac-&gt;dev, "MAC PHY Control Register: PHY_INTERFACE_MODE_RGMII\n");</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		dev_err(mac-&gt;dev, "Unsupported interface %d", plat_dat-&gt;mac_interface);</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Update MAC PHY control register */</div><div class='ctx'> 	return regmap_update_bits(mac-&gt;regmap, 0, mac-&gt;soc_info-&gt;mask, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ingenic_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)</div><div class='add'>+{</div><div class='add'>+	struct ingenic_mac *mac = bsp_priv;</div><div class='add'>+</div><div class='add'>+	if (!mac-&gt;soc_info-&gt;set_mode)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (phy_intf_sel &gt;= BITS_PER_BYTE ||</div><div class='add'>+	    ~mac-&gt;soc_info-&gt;valid_phy_intf_sel &amp; BIT(phy_intf_sel))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev_dbg(mac-&gt;dev, "MAC PHY control register: interface %s\n",</div><div class='add'>+		phy_modes(mac-&gt;plat_dat-&gt;phy_interface));</div><div class='add'>+</div><div class='add'>+	return mac-&gt;soc_info-&gt;set_mode(mac, phy_intf_sel);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ingenic_mac_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat_dat;</div><div class='hunk'>@@ -284,49 +207,22 @@ static int ingenic_mac_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	mac-&gt;soc_info = data;</div><div class='ctx'> 	mac-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	mac-&gt;plat_dat = plat_dat;</div><div class='ctx'> </div><div class='ctx'> 	plat_dat-&gt;bsp_priv = mac;</div><div class='add'>+	plat_dat-&gt;set_phy_intf_sel = ingenic_set_phy_intf_sel;</div><div class='ctx'> </div><div class='del'>-	ret = ingenic_mac_init(plat_dat);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM_SLEEP</div><div class='del'>-static int ingenic_mac_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_suspend(dev);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return devm_stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ingenic_mac_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = ingenic_mac_init(priv-&gt;plat);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_resume(dev);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_PM_SLEEP */</div><div class='del'>-</div><div class='del'>-static SIMPLE_DEV_PM_OPS(ingenic_mac_pm_ops, ingenic_mac_suspend, ingenic_mac_resume);</div><div class='del'>-</div><div class='ctx'> static struct ingenic_soc_info jz4775_soc_info = {</div><div class='ctx'> 	.version = ID_JZ4775,</div><div class='ctx'> 	.mask = MACPHYC_TXCLK_SEL_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK,</div><div class='ctx'> </div><div class='ctx'> 	.set_mode = jz4775_mac_set_mode,</div><div class='add'>+	.valid_phy_intf_sel = BIT(PHY_INTF_SEL_GMII_MII) |</div><div class='add'>+			      BIT(PHY_INTF_SEL_RGMII) |</div><div class='add'>+			      BIT(PHY_INTF_SEL_RMII),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ingenic_soc_info x1000_soc_info = {</div><div class='hunk'>@@ -334,6 +230,7 @@ static struct ingenic_soc_info x1000_soc_info = {</div><div class='ctx'> 	.mask = MACPHYC_SOFT_RST_MASK,</div><div class='ctx'> </div><div class='ctx'> 	.set_mode = x1000_mac_set_mode,</div><div class='add'>+	.valid_phy_intf_sel = BIT(PHY_INTF_SEL_RMII),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ingenic_soc_info x1600_soc_info = {</div><div class='hunk'>@@ -341,6 +238,7 @@ static struct ingenic_soc_info x1600_soc_info = {</div><div class='ctx'> 	.mask = MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK,</div><div class='ctx'> </div><div class='ctx'> 	.set_mode = x1600_mac_set_mode,</div><div class='add'>+	.valid_phy_intf_sel = BIT(PHY_INTF_SEL_RMII),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ingenic_soc_info x1830_soc_info = {</div><div class='hunk'>@@ -348,6 +246,7 @@ static struct ingenic_soc_info x1830_soc_info = {</div><div class='ctx'> 	.mask = MACPHYC_MODE_SEL_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK,</div><div class='ctx'> </div><div class='ctx'> 	.set_mode = x1830_mac_set_mode,</div><div class='add'>+	.valid_phy_intf_sel = BIT(PHY_INTF_SEL_RMII),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ingenic_soc_info x2000_soc_info = {</div><div class='hunk'>@@ -356,6 +255,8 @@ static struct ingenic_soc_info x2000_soc_info = {</div><div class='ctx'> 			MACPHYC_RX_DELAY_MASK | MACPHYC_SOFT_RST_MASK | MACPHYC_PHY_INFT_MASK,</div><div class='ctx'> </div><div class='ctx'> 	.set_mode = x2000_mac_set_mode,</div><div class='add'>+	.valid_phy_intf_sel = BIT(PHY_INTF_SEL_RGMII) |</div><div class='add'>+			      BIT(PHY_INTF_SEL_RMII),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id ingenic_mac_of_matches[] = {</div><div class='hunk'>@@ -370,10 +271,9 @@ MODULE_DEVICE_TABLE(of, ingenic_mac_of_matches);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver ingenic_mac_driver = {</div><div class='ctx'> 	.probe		= ingenic_mac_probe,</div><div class='del'>-	.remove		= stmmac_pltfr_remove,</div><div class='ctx'> 	.driver		= {</div><div class='ctx'> 		.name	= "ingenic-mac",</div><div class='del'>-		.pm		= pm_ptr(&amp;ingenic_mac_pm_ops),</div><div class='add'>+		.pm		= &amp;stmmac_pltfr_pm_ops,</div><div class='ctx'> 		.of_match_table = ingenic_mac_of_matches,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c<br/>index 230e79658c54..4ea7b0a803d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c</a></div><div class='hunk'>@@ -22,45 +22,12 @@ struct intel_dwmac {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct intel_dwmac_data {</div><div class='del'>-	void (*fix_mac_speed)(void *priv, unsigned int speed, unsigned int mode);</div><div class='ctx'> 	unsigned long ptp_ref_clk_rate;</div><div class='ctx'> 	unsigned long tx_clk_rate;</div><div class='ctx'> 	bool tx_clk_en;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void kmb_eth_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='del'>-{</div><div class='del'>-	struct intel_dwmac *dwmac = priv;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	rate = clk_get_rate(dwmac-&gt;tx_clk);</div><div class='del'>-</div><div class='del'>-	switch (speed) {</div><div class='del'>-	case SPEED_1000:</div><div class='del'>-		rate = 125000000;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPEED_100:</div><div class='del'>-		rate = 25000000;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPEED_10:</div><div class='del'>-		rate = 2500000;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dwmac-&gt;dev, "Invalid speed\n");</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = clk_set_rate(dwmac-&gt;tx_clk, rate);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_err(dwmac-&gt;dev, "Failed to configure tx clock rate\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct intel_dwmac_data kmb_data = {</div><div class='del'>-	.fix_mac_speed = kmb_eth_fix_mac_speed,</div><div class='ctx'> 	.ptp_ref_clk_rate = 200000000,</div><div class='ctx'> 	.tx_clk_rate = 125000000,</div><div class='ctx'> 	.tx_clk_en = true,</div><div class='hunk'>@@ -97,30 +64,36 @@ static int intel_eth_plat_probe(struct platform_device *pdev)</div><div class='ctx'> 	dwmac-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	dwmac-&gt;tx_clk = NULL;</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * This cannot return NULL at this point because the driver’s</div><div class='add'>+	 * compatibility with the device has already been validated in</div><div class='add'>+	 * platform_match().</div><div class='add'>+	 */</div><div class='ctx'> 	dwmac-&gt;data = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='del'>-	if (dwmac-&gt;data) {</div><div class='del'>-		if (dwmac-&gt;data-&gt;fix_mac_speed)</div><div class='del'>-			plat_dat-&gt;fix_mac_speed = dwmac-&gt;data-&gt;fix_mac_speed;</div><div class='del'>-</div><div class='del'>-		/* Enable TX clock */</div><div class='del'>-		if (dwmac-&gt;data-&gt;tx_clk_en) {</div><div class='del'>-			dwmac-&gt;tx_clk = devm_clk_get(&amp;pdev-&gt;dev, "tx_clk");</div><div class='del'>-			if (IS_ERR(dwmac-&gt;tx_clk))</div><div class='del'>-				return PTR_ERR(dwmac-&gt;tx_clk);</div><div class='del'>-</div><div class='del'>-			clk_prepare_enable(dwmac-&gt;tx_clk);</div><div class='del'>-</div><div class='del'>-			/* Check and configure TX clock rate */</div><div class='del'>-			rate = clk_get_rate(dwmac-&gt;tx_clk);</div><div class='del'>-			if (dwmac-&gt;data-&gt;tx_clk_rate &amp;&amp;</div><div class='del'>-			    rate != dwmac-&gt;data-&gt;tx_clk_rate) {</div><div class='del'>-				rate = dwmac-&gt;data-&gt;tx_clk_rate;</div><div class='del'>-				ret = clk_set_rate(dwmac-&gt;tx_clk, rate);</div><div class='del'>-				if (ret) {</div><div class='del'>-					dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-						"Failed to set tx_clk\n");</div><div class='del'>-					return ret;</div><div class='del'>-				}</div><div class='add'>+</div><div class='add'>+	/* Enable TX clock */</div><div class='add'>+	if (dwmac-&gt;data-&gt;tx_clk_en) {</div><div class='add'>+		dwmac-&gt;tx_clk = devm_clk_get(&amp;pdev-&gt;dev, "tx_clk");</div><div class='add'>+		if (IS_ERR(dwmac-&gt;tx_clk))</div><div class='add'>+			return PTR_ERR(dwmac-&gt;tx_clk);</div><div class='add'>+</div><div class='add'>+		ret = clk_prepare_enable(dwmac-&gt;tx_clk);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+				"Failed to enable tx_clk\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Check and configure TX clock rate */</div><div class='add'>+		rate = clk_get_rate(dwmac-&gt;tx_clk);</div><div class='add'>+		if (dwmac-&gt;data-&gt;tx_clk_rate &amp;&amp;</div><div class='add'>+		    rate != dwmac-&gt;data-&gt;tx_clk_rate) {</div><div class='add'>+			rate = dwmac-&gt;data-&gt;tx_clk_rate;</div><div class='add'>+			ret = clk_set_rate(dwmac-&gt;tx_clk, rate);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+					"Failed to set tx_clk\n");</div><div class='add'>+				goto err_tx_clk_disable;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -133,28 +106,25 @@ static int intel_eth_plat_probe(struct platform_device *pdev)</div><div class='ctx'> 			if (ret) {</div><div class='ctx'> 				dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 					"Failed to set clk_ptp_ref\n");</div><div class='del'>-				return ret;</div><div class='add'>+				goto err_tx_clk_disable;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	plat_dat-&gt;clk_tx_i = dwmac-&gt;tx_clk;</div><div class='add'>+	plat_dat-&gt;set_clk_tx_rate = stmmac_set_clk_tx_rate;</div><div class='ctx'> 	plat_dat-&gt;bsp_priv = dwmac;</div><div class='del'>-	plat_dat-&gt;eee_usecs_rate = plat_dat-&gt;clk_ptp_rate;</div><div class='del'>-</div><div class='del'>-	if (plat_dat-&gt;eee_usecs_rate &gt; 0) {</div><div class='del'>-		u32 tx_lpi_usec;</div><div class='del'>-</div><div class='del'>-		tx_lpi_usec = (plat_dat-&gt;eee_usecs_rate / 1000000) - 1;</div><div class='del'>-		writel(tx_lpi_usec, stmmac_res.addr + GMAC_1US_TIC_COUNTER);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ret = stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='del'>-	if (ret) {</div><div class='del'>-		clk_disable_unprepare(dwmac-&gt;tx_clk);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_tx_clk_disable;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_tx_clk_disable:</div><div class='add'>+	if (dwmac-&gt;data-&gt;tx_clk_en)</div><div class='add'>+		clk_disable_unprepare(dwmac-&gt;tx_clk);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void intel_eth_plat_remove(struct platform_device *pdev)</div><div class='hunk'>@@ -162,7 +132,8 @@ static void intel_eth_plat_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct intel_dwmac *dwmac = get_stmmac_bsp_priv(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	stmmac_pltfr_remove(pdev);</div><div class='del'>-	clk_disable_unprepare(dwmac-&gt;tx_clk);</div><div class='add'>+	if (dwmac-&gt;data-&gt;tx_clk_en)</div><div class='add'>+		clk_disable_unprepare(dwmac-&gt;tx_clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver intel_eth_plat_driver = {</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c<br/>index 48acba5eb178..aad1be1ec4c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c</a></div><div class='hunk'>@@ -5,15 +5,30 @@</div><div class='ctx'> #include &lt;linux/clk-provider.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/x86/intel_pmc_ipc.h&gt;</div><div class='ctx'> #include "dwmac-intel.h"</div><div class='ctx'> #include "dwmac4.h"</div><div class='ctx'> #include "stmmac.h"</div><div class='ctx'> #include "stmmac_ptp.h"</div><div class='ctx'> </div><div class='add'>+struct pmc_serdes_regs {</div><div class='add'>+	u8 index;</div><div class='add'>+	u32 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pmc_serdes_reg_info {</div><div class='add'>+	const struct pmc_serdes_regs *regs;</div><div class='add'>+	u8 num_regs;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct intel_priv_data {</div><div class='ctx'> 	int mdio_adhoc_addr;	/* mdio address for serdes &amp; etc */</div><div class='ctx'> 	unsigned long crossts_adj;</div><div class='ctx'> 	bool is_pse;</div><div class='add'>+	const int *tsn_lane_regs;</div><div class='add'>+	int max_tsn_lane_regs;</div><div class='add'>+	struct pmc_serdes_reg_info pid_1g;</div><div class='add'>+	struct pmc_serdes_reg_info pid_2p5g;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* This struct is used to associate PCI Function of MAC controller on a board,</div><div class='hunk'>@@ -35,6 +50,45 @@ struct stmmac_pci_info {</div><div class='ctx'> 	int (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct pmc_serdes_regs pid_modphy3_1g_regs[] = {</div><div class='add'>+	{ PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0,	B_MODPHY_PCR_LCPLL_DWORD0_1G },</div><div class='add'>+	{ PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2,	N_MODPHY_PCR_LCPLL_DWORD2_1G },</div><div class='add'>+	{ PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7,	N_MODPHY_PCR_LCPLL_DWORD7_1G },</div><div class='add'>+	{ PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10,	N_MODPHY_PCR_LPPLL_DWORD10_1G },</div><div class='add'>+	{ PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30,	N_MODPHY_PCR_CMN_ANA_DWORD30_1G },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct pmc_serdes_regs pid_modphy3_2p5g_regs[] = {</div><div class='add'>+	{ PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0,	B_MODPHY_PCR_LCPLL_DWORD0_2P5G },</div><div class='add'>+	{ PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2,	N_MODPHY_PCR_LCPLL_DWORD2_2P5G },</div><div class='add'>+	{ PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7,	N_MODPHY_PCR_LCPLL_DWORD7_2P5G },</div><div class='add'>+	{ PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10,	N_MODPHY_PCR_LPPLL_DWORD10_2P5G },</div><div class='add'>+	{ PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30,	N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct pmc_serdes_regs pid_modphy1_1g_regs[] = {</div><div class='add'>+	{ PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0,	B_MODPHY_PCR_LCPLL_DWORD0_1G },</div><div class='add'>+	{ PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2,	N_MODPHY_PCR_LCPLL_DWORD2_1G },</div><div class='add'>+	{ PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7,	N_MODPHY_PCR_LCPLL_DWORD7_1G },</div><div class='add'>+	{ PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10,	N_MODPHY_PCR_LPPLL_DWORD10_1G },</div><div class='add'>+	{ PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30,	N_MODPHY_PCR_CMN_ANA_DWORD30_1G },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = {</div><div class='add'>+	{ PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0,	B_MODPHY_PCR_LCPLL_DWORD0_2P5G },</div><div class='add'>+	{ PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2,	N_MODPHY_PCR_LCPLL_DWORD2_2P5G },</div><div class='add'>+	{ PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7,	N_MODPHY_PCR_LCPLL_DWORD7_2P5G },</div><div class='add'>+	{ PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10,	N_MODPHY_PCR_LPPLL_DWORD10_2P5G },</div><div class='add'>+	{ PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30,	N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const int ehl_tsn_lane_regs[] = {7, 8, 9, 10, 11};</div><div class='add'>+static const int adln_tsn_lane_regs[] = {6};</div><div class='add'>+</div><div class='ctx'> static int stmmac_pci_find_phy_addr(struct pci_dev *pdev,</div><div class='ctx'> 				    const struct dmi_system_id *dmi_list)</div><div class='ctx'> {</div><div class='hunk'>@@ -93,7 +147,7 @@ static int intel_serdes_powerup(struct net_device *ndev, void *priv_data)</div><div class='ctx'> 	data &amp;= ~SERDES_RATE_MASK;</div><div class='ctx'> 	data &amp;= ~SERDES_PCLK_MASK;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;plat-&gt;max_speed == 2500)</div><div class='add'>+	if (priv-&gt;plat-&gt;phy_interface == PHY_INTERFACE_MODE_2500BASEX)</div><div class='ctx'> 		data |= SERDES_RATE_PCIE_GEN2 &lt;&lt; SERDES_RATE_PCIE_SHIFT |</div><div class='ctx'> 			SERDES_PCLK_37p5MHZ &lt;&lt; SERDES_PCLK_SHIFT;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -230,28 +284,28 @@ static void intel_serdes_powerdown(struct net_device *ndev, void *intel_data)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void intel_speed_mode_2500(struct net_device *ndev, void *intel_data)</div><div class='add'>+static void tgl_get_interfaces(struct stmmac_priv *priv, void *bsp_priv,</div><div class='add'>+			       unsigned long *interfaces)</div><div class='ctx'> {</div><div class='del'>-	struct intel_priv_data *intel_priv = intel_data;</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	int serdes_phy_addr = 0;</div><div class='del'>-	u32 data = 0;</div><div class='del'>-</div><div class='del'>-	serdes_phy_addr = intel_priv-&gt;mdio_adhoc_addr;</div><div class='add'>+	struct intel_priv_data *intel_priv = bsp_priv;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	int data;</div><div class='ctx'> </div><div class='ctx'> 	/* Determine the link speed mode: 2.5Gbps/1Gbps */</div><div class='del'>-	data = mdiobus_read(priv-&gt;mii, serdes_phy_addr,</div><div class='del'>-			    SERDES_GCR);</div><div class='add'>+	data = mdiobus_read(priv-&gt;mii, intel_priv-&gt;mdio_adhoc_addr, SERDES_GCR);</div><div class='add'>+	if (data &lt; 0)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	if (((data &amp; SERDES_LINK_MODE_MASK) &gt;&gt; SERDES_LINK_MODE_SHIFT) ==</div><div class='del'>-	    SERDES_LINK_MODE_2G5) {</div><div class='add'>+	if (FIELD_GET(SERDES_LINK_MODE_MASK, data) == SERDES_LINK_MODE_2G5) {</div><div class='ctx'> 		dev_info(priv-&gt;device, "Link Speed Mode: 2.5Gbps\n");</div><div class='del'>-		priv-&gt;plat-&gt;max_speed = 2500;</div><div class='del'>-		priv-&gt;plat-&gt;phy_interface = PHY_INTERFACE_MODE_2500BASEX;</div><div class='ctx'> 		priv-&gt;plat-&gt;mdio_bus_data-&gt;default_an_inband = false;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_2500BASEX;</div><div class='ctx'> 	} else {</div><div class='del'>-		priv-&gt;plat-&gt;max_speed = 1000;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_SGMII;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	__set_bit(interface, interfaces);</div><div class='add'>+	priv-&gt;plat-&gt;phy_interface = interface;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Program PTP Clock Frequency for different variant of</div><div class='hunk'>@@ -317,9 +371,6 @@ static int intel_crosststamp(ktime_t *device,</div><div class='ctx'> 	u32 acr_value;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!boot_cpu_has(X86_FEATURE_ART))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	intel_priv = priv-&gt;plat-&gt;bsp_priv;</div><div class='ctx'> </div><div class='ctx'> 	/* Both internal crosstimestamping and external triggered event</div><div class='hunk'>@@ -379,6 +430,12 @@ static int intel_crosststamp(ktime_t *device,</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	*system = (struct system_counterval_t) {</div><div class='add'>+		.cycles = 0,</div><div class='add'>+		.cs_id = CSID_X86_ART,</div><div class='add'>+		.use_nsecs = false,</div><div class='add'>+	};</div><div class='add'>+</div><div class='ctx'> 	num_snapshot = (readl(ioaddr + GMAC_TIMESTAMP_STATUS) &amp;</div><div class='ctx'> 			GMAC_TIMESTAMP_ATSNS_MASK) &gt;&gt;</div><div class='ctx'> 			GMAC_TIMESTAMP_ATSNS_SHIFT;</div><div class='hunk'>@@ -394,7 +451,7 @@ static int intel_crosststamp(ktime_t *device,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	system-&gt;cycles *= intel_priv-&gt;crossts_adj;</div><div class='del'>-	system-&gt;cs_id = CSID_X86_ART;</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;plat-&gt;flags &amp;= ~STMMAC_FLAG_INT_SNAPSHOT_EN;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -415,33 +472,103 @@ static void intel_mgbe_pse_crossts_adj(struct intel_priv_data *intel_priv,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void common_default_data(struct plat_stmmacenet_data *plat)</div><div class='add'>+static int intel_tsn_lane_is_available(struct net_device *ndev,</div><div class='add'>+				       struct intel_priv_data *intel_priv)</div><div class='ctx'> {</div><div class='del'>-	plat-&gt;clk_csr = 2;	/* clk_csr_i = 20-35MHz &amp; MDC = clk_csr_i/16 */</div><div class='del'>-	plat-&gt;has_gmac = 1;</div><div class='del'>-	plat-&gt;force_sf_dma_mode = 1;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct pmc_ipc_cmd tmp = {};</div><div class='add'>+	struct pmc_ipc_rbuf rbuf = {};</div><div class='add'>+	int ret = 0, i, j;</div><div class='add'>+	const int max_fia_regs = 5;</div><div class='ctx'> </div><div class='del'>-	plat-&gt;mdio_bus_data-&gt;needs_reset = true;</div><div class='add'>+	tmp.cmd = IPC_SOC_REGISTER_ACCESS;</div><div class='add'>+	tmp.sub_cmd = IPC_SOC_SUB_CMD_READ;</div><div class='ctx'> </div><div class='del'>-	/* Set default value for multicast hash bins */</div><div class='del'>-	plat-&gt;multicast_filter_bins = HASH_TABLE_SIZE;</div><div class='add'>+	for (i = 0; i &lt; max_fia_regs; i++) {</div><div class='add'>+		tmp.wbuf[0] = R_PCH_FIA_15_PCR_LOS1_REG_BASE + i;</div><div class='ctx'> </div><div class='del'>-	/* Set default value for unicast filter entries */</div><div class='del'>-	plat-&gt;unicast_filter_entries = 1;</div><div class='add'>+		ret = intel_pmc_ipc(&amp;tmp, &amp;rbuf);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			netdev_info(priv-&gt;dev, "Failed to read from PMC.\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	/* Set the maxmtu to a default of JUMBO_LEN */</div><div class='del'>-	plat-&gt;maxmtu = JUMBO_LEN;</div><div class='add'>+		for (j = 0; j &lt;= intel_priv-&gt;max_tsn_lane_regs; j++)</div><div class='add'>+			if ((rbuf.buf[0] &gt;&gt;</div><div class='add'>+				(4 * (intel_priv-&gt;tsn_lane_regs[j] % 8)) &amp;</div><div class='add'>+					B_PCH_FIA_PCR_L0O) == 0xB)</div><div class='add'>+				return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Set default number of RX and TX queues to use */</div><div class='del'>-	plat-&gt;tx_queues_to_use = 1;</div><div class='del'>-	plat-&gt;rx_queues_to_use = 1;</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Disable Priority config by default */</div><div class='del'>-	plat-&gt;tx_queues_cfg[0].use_prio = false;</div><div class='del'>-	plat-&gt;rx_queues_cfg[0].use_prio = false;</div><div class='add'>+static int intel_set_reg_access(const struct pmc_serdes_regs *regs, int max_regs)</div><div class='add'>+{</div><div class='add'>+	int ret = 0, i;</div><div class='ctx'> </div><div class='del'>-	/* Disable RX queues routing by default */</div><div class='del'>-	plat-&gt;rx_queues_cfg[0].pkt_route = 0x0;</div><div class='add'>+	for (i = 0; i &lt; max_regs; i++) {</div><div class='add'>+		struct pmc_ipc_cmd tmp = {};</div><div class='add'>+		struct pmc_ipc_rbuf rbuf = {};</div><div class='add'>+</div><div class='add'>+		tmp.cmd = IPC_SOC_REGISTER_ACCESS;</div><div class='add'>+		tmp.sub_cmd = IPC_SOC_SUB_CMD_WRITE;</div><div class='add'>+		tmp.wbuf[0] = (u32)regs[i].index;</div><div class='add'>+		tmp.wbuf[1] = regs[i].val;</div><div class='add'>+</div><div class='add'>+		ret = intel_pmc_ipc(&amp;tmp, &amp;rbuf);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_mac_finish(struct net_device *ndev,</div><div class='add'>+			    void *intel_data,</div><div class='add'>+			    unsigned int mode,</div><div class='add'>+			    phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct intel_priv_data *intel_priv = intel_data;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	const struct pmc_serdes_regs *regs;</div><div class='add'>+	int max_regs = 0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = intel_tsn_lane_is_available(ndev, intel_priv);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_info(priv-&gt;dev, "No TSN lane available to set the registers.\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_2500BASEX) {</div><div class='add'>+		regs = intel_priv-&gt;pid_2p5g.regs;</div><div class='add'>+		max_regs = intel_priv-&gt;pid_2p5g.num_regs;</div><div class='add'>+	} else {</div><div class='add'>+		regs = intel_priv-&gt;pid_1g.regs;</div><div class='add'>+		max_regs = intel_priv-&gt;pid_1g.num_regs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = intel_set_reg_access(regs, max_regs);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;plat-&gt;phy_interface = interface;</div><div class='add'>+</div><div class='add'>+	intel_serdes_powerdown(ndev, intel_priv);</div><div class='add'>+	intel_serdes_powerup(ndev, intel_priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void common_default_data(struct plat_stmmacenet_data *plat)</div><div class='add'>+{</div><div class='add'>+	/* clk_csr_i = 20-35MHz &amp; MDC = clk_csr_i/16 */</div><div class='add'>+	plat-&gt;clk_csr = STMMAC_CSR_20_35M;</div><div class='add'>+	plat-&gt;core_type = DWMAC_CORE_GMAC;</div><div class='add'>+	plat-&gt;force_sf_dma_mode = 1;</div><div class='add'>+</div><div class='add'>+	plat-&gt;mdio_bus_data-&gt;needs_reset = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct phylink_pcs *intel_mgbe_select_pcs(struct stmmac_priv *priv,</div><div class='hunk'>@@ -464,9 +591,8 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;pdev = pdev;</div><div class='ctx'> 	plat-&gt;phy_addr = -1;</div><div class='del'>-	plat-&gt;clk_csr = 5;</div><div class='del'>-	plat-&gt;has_gmac = 0;</div><div class='del'>-	plat-&gt;has_gmac4 = 1;</div><div class='add'>+	plat-&gt;clk_csr = STMMAC_CSR_250_300M;</div><div class='add'>+	plat-&gt;core_type = DWMAC_CORE_GMAC4;</div><div class='ctx'> 	plat-&gt;force_sf_dma_mode = 0;</div><div class='ctx'> 	plat-&gt;flags |= (STMMAC_FLAG_TSO_EN | STMMAC_FLAG_SPH_DISABLE);</div><div class='ctx'> </div><div class='hunk'>@@ -483,22 +609,12 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;rx_sched_algorithm = MTL_RX_ALGORITHM_SP;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; plat-&gt;rx_queues_to_use; i++) {</div><div class='add'>+	for (i = 0; i &lt; plat-&gt;rx_queues_to_use; i++)</div><div class='ctx'> 		plat-&gt;rx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;</div><div class='del'>-		plat-&gt;rx_queues_cfg[i].chan = i;</div><div class='del'>-</div><div class='del'>-		/* Disable Priority config by default */</div><div class='del'>-		plat-&gt;rx_queues_cfg[i].use_prio = false;</div><div class='del'>-</div><div class='del'>-		/* Disable RX queues routing by default */</div><div class='del'>-		plat-&gt;rx_queues_cfg[i].pkt_route = 0x0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; plat-&gt;tx_queues_to_use; i++) {</div><div class='ctx'> 		plat-&gt;tx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;</div><div class='ctx'> </div><div class='del'>-		/* Disable Priority config by default */</div><div class='del'>-		plat-&gt;tx_queues_cfg[i].use_prio = false;</div><div class='ctx'> 		/* Default TX Q0 to use TSO and rest TXQ for TBS */</div><div class='ctx'> 		if (i &gt; 0)</div><div class='ctx'> 			plat-&gt;tx_queues_cfg[i].tbs_en = 1;</div><div class='hunk'>@@ -534,12 +650,10 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,</div><div class='ctx'> 	plat-&gt;axi-&gt;axi_xit_frm = 0;</div><div class='ctx'> 	plat-&gt;axi-&gt;axi_wr_osr_lmt = 1;</div><div class='ctx'> 	plat-&gt;axi-&gt;axi_rd_osr_lmt = 1;</div><div class='del'>-	plat-&gt;axi-&gt;axi_blen[0] = 4;</div><div class='del'>-	plat-&gt;axi-&gt;axi_blen[1] = 8;</div><div class='del'>-	plat-&gt;axi-&gt;axi_blen[2] = 16;</div><div class='add'>+	plat-&gt;axi-&gt;axi_blen_regval = DMA_AXI_BLEN4 | DMA_AXI_BLEN8 |</div><div class='add'>+				     DMA_AXI_BLEN16;</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;ptp_max_adj = plat-&gt;clk_ptp_rate;</div><div class='del'>-	plat-&gt;eee_usecs_rate = plat-&gt;clk_ptp_rate;</div><div class='ctx'> </div><div class='ctx'> 	/* Set system clock */</div><div class='ctx'> 	sprintf(clk_name, "%s-%s", "stmmac", pci_name(pdev));</div><div class='hunk'>@@ -561,15 +675,6 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;ptp_clk_freq_config = intel_mgbe_ptp_clk_freq_config;</div><div class='ctx'> </div><div class='del'>-	/* Set default value for multicast hash bins */</div><div class='del'>-	plat-&gt;multicast_filter_bins = HASH_TABLE_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Set default value for unicast filter entries */</div><div class='del'>-	plat-&gt;unicast_filter_entries = 1;</div><div class='del'>-</div><div class='del'>-	/* Set the maxmtu to a default of JUMBO_LEN */</div><div class='del'>-	plat-&gt;maxmtu = JUMBO_LEN;</div><div class='del'>-</div><div class='ctx'> 	plat-&gt;flags |= STMMAC_FLAG_VLAN_FAIL_Q_EN;</div><div class='ctx'> </div><div class='ctx'> 	/* Use the last Rx queue */</div><div class='hunk'>@@ -607,7 +712,9 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;int_snapshot_num = AUX_SNAPSHOT1;</div><div class='ctx'> </div><div class='del'>-	plat-&gt;crosststamp = intel_crosststamp;</div><div class='add'>+	if (boot_cpu_has(X86_FEATURE_ART))</div><div class='add'>+		plat-&gt;crosststamp = intel_crosststamp;</div><div class='add'>+</div><div class='ctx'> 	plat-&gt;flags &amp;= ~STMMAC_FLAG_INT_SNAPSHOT_EN;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup MSI vector offset specific to Intel mGbE controller */</div><div class='hunk'>@@ -624,6 +731,8 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,</div><div class='ctx'> static int ehl_common_data(struct pci_dev *pdev,</div><div class='ctx'> 			   struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='add'>+	struct intel_priv_data *intel_priv = plat-&gt;bsp_priv;</div><div class='add'>+</div><div class='ctx'> 	plat-&gt;rx_queues_to_use = 8;</div><div class='ctx'> 	plat-&gt;tx_queues_to_use = 8;</div><div class='ctx'> 	plat-&gt;flags |= STMMAC_FLAG_USE_PHY_WOL;</div><div class='hunk'>@@ -639,20 +748,29 @@ static int ehl_common_data(struct pci_dev *pdev,</div><div class='ctx'> 	plat-&gt;safety_feat_cfg-&gt;prtyen = 0;</div><div class='ctx'> 	plat-&gt;safety_feat_cfg-&gt;tmouten = 0;</div><div class='ctx'> </div><div class='add'>+	intel_priv-&gt;tsn_lane_regs = ehl_tsn_lane_regs;</div><div class='add'>+	intel_priv-&gt;max_tsn_lane_regs = ARRAY_SIZE(ehl_tsn_lane_regs);</div><div class='add'>+</div><div class='ctx'> 	return intel_mgbe_common_data(pdev, plat);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ehl_sgmii_data(struct pci_dev *pdev,</div><div class='ctx'> 			  struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='add'>+	struct intel_priv_data *intel_priv = plat-&gt;bsp_priv;</div><div class='add'>+</div><div class='ctx'> 	plat-&gt;bus_id = 1;</div><div class='ctx'> 	plat-&gt;phy_interface = PHY_INTERFACE_MODE_SGMII;</div><div class='del'>-	plat-&gt;speed_mode_2500 = intel_speed_mode_2500;</div><div class='ctx'> 	plat-&gt;serdes_powerup = intel_serdes_powerup;</div><div class='ctx'> 	plat-&gt;serdes_powerdown = intel_serdes_powerdown;</div><div class='del'>-</div><div class='add'>+	plat-&gt;mac_finish = intel_mac_finish;</div><div class='ctx'> 	plat-&gt;clk_ptp_rate = 204800000;</div><div class='ctx'> </div><div class='add'>+	intel_priv-&gt;pid_1g.regs = pid_modphy3_1g_regs;</div><div class='add'>+	intel_priv-&gt;pid_1g.num_regs = ARRAY_SIZE(pid_modphy3_1g_regs);</div><div class='add'>+	intel_priv-&gt;pid_2p5g.regs = pid_modphy3_2p5g_regs;</div><div class='add'>+	intel_priv-&gt;pid_2p5g.num_regs = ARRAY_SIZE(pid_modphy3_2p5g_regs);</div><div class='add'>+</div><div class='ctx'> 	return ehl_common_data(pdev, plat);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -705,10 +823,18 @@ static struct stmmac_pci_info ehl_pse0_rgmii1g_info = {</div><div class='ctx'> static int ehl_pse0_sgmii1g_data(struct pci_dev *pdev,</div><div class='ctx'> 				 struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='add'>+	struct intel_priv_data *intel_priv = plat-&gt;bsp_priv;</div><div class='add'>+</div><div class='ctx'> 	plat-&gt;phy_interface = PHY_INTERFACE_MODE_SGMII;</div><div class='del'>-	plat-&gt;speed_mode_2500 = intel_speed_mode_2500;</div><div class='ctx'> 	plat-&gt;serdes_powerup = intel_serdes_powerup;</div><div class='ctx'> 	plat-&gt;serdes_powerdown = intel_serdes_powerdown;</div><div class='add'>+	plat-&gt;mac_finish = intel_mac_finish;</div><div class='add'>+</div><div class='add'>+	intel_priv-&gt;pid_1g.regs = pid_modphy1_1g_regs;</div><div class='add'>+	intel_priv-&gt;pid_1g.num_regs = ARRAY_SIZE(pid_modphy1_1g_regs);</div><div class='add'>+	intel_priv-&gt;pid_2p5g.regs = pid_modphy1_2p5g_regs;</div><div class='add'>+	intel_priv-&gt;pid_2p5g.num_regs = ARRAY_SIZE(pid_modphy1_2p5g_regs);</div><div class='add'>+</div><div class='ctx'> 	return ehl_pse0_common_data(pdev, plat);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -746,10 +872,18 @@ static struct stmmac_pci_info ehl_pse1_rgmii1g_info = {</div><div class='ctx'> static int ehl_pse1_sgmii1g_data(struct pci_dev *pdev,</div><div class='ctx'> 				 struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='add'>+	struct intel_priv_data *intel_priv = plat-&gt;bsp_priv;</div><div class='add'>+</div><div class='ctx'> 	plat-&gt;phy_interface = PHY_INTERFACE_MODE_SGMII;</div><div class='del'>-	plat-&gt;speed_mode_2500 = intel_speed_mode_2500;</div><div class='ctx'> 	plat-&gt;serdes_powerup = intel_serdes_powerup;</div><div class='ctx'> 	plat-&gt;serdes_powerdown = intel_serdes_powerdown;</div><div class='add'>+	plat-&gt;mac_finish = intel_mac_finish;</div><div class='add'>+</div><div class='add'>+	intel_priv-&gt;pid_1g.regs = pid_modphy1_1g_regs;</div><div class='add'>+	intel_priv-&gt;pid_1g.num_regs = ARRAY_SIZE(pid_modphy1_1g_regs);</div><div class='add'>+	intel_priv-&gt;pid_2p5g.regs = pid_modphy1_2p5g_regs;</div><div class='add'>+	intel_priv-&gt;pid_2p5g.num_regs = ARRAY_SIZE(pid_modphy1_2p5g_regs);</div><div class='add'>+</div><div class='ctx'> 	return ehl_pse1_common_data(pdev, plat);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -763,7 +897,7 @@ static int tgl_common_data(struct pci_dev *pdev,</div><div class='ctx'> 	plat-&gt;rx_queues_to_use = 6;</div><div class='ctx'> 	plat-&gt;tx_queues_to_use = 4;</div><div class='ctx'> 	plat-&gt;clk_ptp_rate = 204800000;</div><div class='del'>-	plat-&gt;speed_mode_2500 = intel_speed_mode_2500;</div><div class='add'>+	plat-&gt;get_interfaces = tgl_get_interfaces;</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;safety_feat_cfg-&gt;tsoee = 1;</div><div class='ctx'> 	plat-&gt;safety_feat_cfg-&gt;mrxpee = 0;</div><div class='hunk'>@@ -782,7 +916,6 @@ static int tgl_sgmii_phy0_data(struct pci_dev *pdev,</div><div class='ctx'> 			       struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='ctx'> 	plat-&gt;bus_id = 1;</div><div class='del'>-	plat-&gt;phy_interface = PHY_INTERFACE_MODE_SGMII;</div><div class='ctx'> 	plat-&gt;serdes_powerup = intel_serdes_powerup;</div><div class='ctx'> 	plat-&gt;serdes_powerdown = intel_serdes_powerdown;</div><div class='ctx'> 	return tgl_common_data(pdev, plat);</div><div class='hunk'>@@ -796,7 +929,6 @@ static int tgl_sgmii_phy1_data(struct pci_dev *pdev,</div><div class='ctx'> 			       struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='ctx'> 	plat-&gt;bus_id = 2;</div><div class='del'>-	plat-&gt;phy_interface = PHY_INTERFACE_MODE_SGMII;</div><div class='ctx'> 	plat-&gt;serdes_powerup = intel_serdes_powerup;</div><div class='ctx'> 	plat-&gt;serdes_powerdown = intel_serdes_powerdown;</div><div class='ctx'> 	return tgl_common_data(pdev, plat);</div><div class='hunk'>@@ -810,7 +942,6 @@ static int adls_sgmii_phy0_data(struct pci_dev *pdev,</div><div class='ctx'> 				struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='ctx'> 	plat-&gt;bus_id = 1;</div><div class='del'>-	plat-&gt;phy_interface = PHY_INTERFACE_MODE_SGMII;</div><div class='ctx'> </div><div class='ctx'> 	/* SerDes power up and power down are done in BIOS for ADL */</div><div class='ctx'> </div><div class='hunk'>@@ -825,7 +956,6 @@ static int adls_sgmii_phy1_data(struct pci_dev *pdev,</div><div class='ctx'> 				struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='ctx'> 	plat-&gt;bus_id = 2;</div><div class='del'>-	plat-&gt;phy_interface = PHY_INTERFACE_MODE_SGMII;</div><div class='ctx'> </div><div class='ctx'> 	/* SerDes power up and power down are done in BIOS for ADL */</div><div class='ctx'> </div><div class='hunk'>@@ -835,6 +965,55 @@ static int adls_sgmii_phy1_data(struct pci_dev *pdev,</div><div class='ctx'> static struct stmmac_pci_info adls_sgmii1g_phy1_info = {</div><div class='ctx'> 	.setup = adls_sgmii_phy1_data,</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+static int adln_common_data(struct pci_dev *pdev,</div><div class='add'>+			    struct plat_stmmacenet_data *plat)</div><div class='add'>+{</div><div class='add'>+	struct intel_priv_data *intel_priv = plat-&gt;bsp_priv;</div><div class='add'>+</div><div class='add'>+	plat-&gt;rx_queues_to_use = 6;</div><div class='add'>+	plat-&gt;tx_queues_to_use = 4;</div><div class='add'>+	plat-&gt;clk_ptp_rate = 204800000;</div><div class='add'>+</div><div class='add'>+	plat-&gt;safety_feat_cfg-&gt;tsoee = 1;</div><div class='add'>+	plat-&gt;safety_feat_cfg-&gt;mrxpee = 0;</div><div class='add'>+	plat-&gt;safety_feat_cfg-&gt;mestee = 1;</div><div class='add'>+	plat-&gt;safety_feat_cfg-&gt;mrxee = 1;</div><div class='add'>+	plat-&gt;safety_feat_cfg-&gt;mtxee = 1;</div><div class='add'>+	plat-&gt;safety_feat_cfg-&gt;epsi = 0;</div><div class='add'>+	plat-&gt;safety_feat_cfg-&gt;edpp = 0;</div><div class='add'>+	plat-&gt;safety_feat_cfg-&gt;prtyen = 0;</div><div class='add'>+	plat-&gt;safety_feat_cfg-&gt;tmouten = 0;</div><div class='add'>+</div><div class='add'>+	intel_priv-&gt;tsn_lane_regs = adln_tsn_lane_regs;</div><div class='add'>+	intel_priv-&gt;max_tsn_lane_regs = ARRAY_SIZE(adln_tsn_lane_regs);</div><div class='add'>+</div><div class='add'>+	return intel_mgbe_common_data(pdev, plat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adln_sgmii_phy0_data(struct pci_dev *pdev,</div><div class='add'>+				struct plat_stmmacenet_data *plat)</div><div class='add'>+{</div><div class='add'>+	struct intel_priv_data *intel_priv = plat-&gt;bsp_priv;</div><div class='add'>+</div><div class='add'>+	plat-&gt;bus_id = 1;</div><div class='add'>+	plat-&gt;phy_interface = PHY_INTERFACE_MODE_SGMII;</div><div class='add'>+	plat-&gt;serdes_powerup = intel_serdes_powerup;</div><div class='add'>+	plat-&gt;serdes_powerdown = intel_serdes_powerdown;</div><div class='add'>+	plat-&gt;mac_finish = intel_mac_finish;</div><div class='add'>+</div><div class='add'>+	intel_priv-&gt;pid_1g.regs = pid_modphy1_1g_regs;</div><div class='add'>+	intel_priv-&gt;pid_1g.num_regs = ARRAY_SIZE(pid_modphy1_1g_regs);</div><div class='add'>+	intel_priv-&gt;pid_2p5g.regs = pid_modphy1_2p5g_regs;</div><div class='add'>+	intel_priv-&gt;pid_2p5g.num_regs = ARRAY_SIZE(pid_modphy1_2p5g_regs);</div><div class='add'>+</div><div class='add'>+	return adln_common_data(pdev, plat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct stmmac_pci_info adln_sgmii1g_phy0_info = {</div><div class='add'>+	.setup = adln_sgmii_phy0_data,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct stmmac_pci_func_data galileo_stmmac_func_data[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.func = 6,</div><div class='hunk'>@@ -1011,6 +1190,37 @@ static int stmmac_config_multi_msi(struct pci_dev *pdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int intel_eth_pci_suspend(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pci_save_state(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pci_wake_from_d3(pdev, true);</div><div class='add'>+	pci_set_power_state(pdev, PCI_D3hot);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int intel_eth_pci_resume(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pci_restore_state(pdev);</div><div class='add'>+	pci_set_power_state(pdev, PCI_D0);</div><div class='add'>+</div><div class='add'>+	ret = pcim_enable_device(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * intel_eth_pci_probe</div><div class='ctx'>  *</div><div class='hunk'>@@ -1036,7 +1246,7 @@ static int intel_eth_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (!intel_priv)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	plat = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*plat), GFP_KERNEL);</div><div class='add'>+	plat = stmmac_plat_dat_alloc(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (!plat)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -1072,6 +1282,9 @@ static int intel_eth_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;bsp_priv = intel_priv;</div><div class='add'>+	plat-&gt;suspend = intel_eth_pci_suspend;</div><div class='add'>+	plat-&gt;resume = intel_eth_pci_resume;</div><div class='add'>+</div><div class='ctx'> 	intel_priv-&gt;mdio_adhoc_addr = INTEL_MGBE_ADHOC_ADDR;</div><div class='ctx'> 	intel_priv-&gt;crossts_adj = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -1094,13 +1307,6 @@ static int intel_eth_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	memset(&amp;res, 0, sizeof(res));</div><div class='ctx'> 	res.addr = pcim_iomap_table(pdev)[0];</div><div class='ctx'> </div><div class='del'>-	if (plat-&gt;eee_usecs_rate &gt; 0) {</div><div class='del'>-		u32 tx_lpi_usec;</div><div class='del'>-</div><div class='del'>-		tx_lpi_usec = (plat-&gt;eee_usecs_rate / 1000000) - 1;</div><div class='del'>-		writel(tx_lpi_usec, res.addr + GMAC_1US_TIC_COUNTER);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ret = stmmac_config_multi_msi(pdev, plat, &amp;res);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ret = stmmac_config_single_msi(pdev, plat, &amp;res);</div><div class='hunk'>@@ -1142,44 +1348,6 @@ static void intel_eth_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> 	clk_unregister_fixed_rate(priv-&gt;plat-&gt;stmmac_clk);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused intel_eth_pci_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_suspend(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = pci_save_state(pdev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	pci_wake_from_d3(pdev, true);</div><div class='del'>-	pci_set_power_state(pdev, PCI_D3hot);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __maybe_unused intel_eth_pci_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	pci_restore_state(pdev);</div><div class='del'>-	pci_set_power_state(pdev, PCI_D0);</div><div class='del'>-</div><div class='del'>-	ret = pcim_enable_device(pdev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	pci_set_master(pdev);</div><div class='del'>-</div><div class='del'>-	return stmmac_resume(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static SIMPLE_DEV_PM_OPS(intel_eth_pm_ops, intel_eth_pci_suspend,</div><div class='del'>-			 intel_eth_pci_resume);</div><div class='del'>-</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_QUARK		0x0937</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_EHL_RGMII1G		0x4b30</div><div class='ctx'> #define PCI_DEVICE_ID_INTEL_EHL_SGMII1G		0x4b31</div><div class='hunk'>@@ -1217,8 +1385,8 @@ static const struct pci_device_id intel_eth_pci_id_table[] = {</div><div class='ctx'> 	{ PCI_DEVICE_DATA(INTEL, TGLH_SGMII1G_1, &amp;tgl_sgmii1g_phy1_info) },</div><div class='ctx'> 	{ PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_0, &amp;adls_sgmii1g_phy0_info) },</div><div class='ctx'> 	{ PCI_DEVICE_DATA(INTEL, ADLS_SGMII1G_1, &amp;adls_sgmii1g_phy1_info) },</div><div class='del'>-	{ PCI_DEVICE_DATA(INTEL, ADLN_SGMII1G, &amp;tgl_sgmii1g_phy0_info) },</div><div class='del'>-	{ PCI_DEVICE_DATA(INTEL, RPLP_SGMII1G, &amp;tgl_sgmii1g_phy0_info) },</div><div class='add'>+	{ PCI_DEVICE_DATA(INTEL, ADLN_SGMII1G, &amp;adln_sgmii1g_phy0_info) },</div><div class='add'>+	{ PCI_DEVICE_DATA(INTEL, RPLP_SGMII1G, &amp;adln_sgmii1g_phy0_info) },</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, intel_eth_pci_id_table);</div><div class='hunk'>@@ -1229,7 +1397,7 @@ static struct pci_driver intel_eth_pci_driver = {</div><div class='ctx'> 	.probe = intel_eth_pci_probe,</div><div class='ctx'> 	.remove = intel_eth_pci_remove,</div><div class='ctx'> 	.driver         = {</div><div class='del'>-		.pm     = &amp;intel_eth_pm_ops,</div><div class='add'>+		.pm     = &amp;stmmac_simple_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h<br/>index 0a37987478c1..7511c224b312 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h</a></div><div class='hunk'>@@ -21,7 +21,6 @@</div><div class='ctx'> #define SERDES_RATE_MASK	GENMASK(9, 8)</div><div class='ctx'> #define SERDES_PCLK_MASK	GENMASK(14, 12)	/* PCLK rate to PHY */</div><div class='ctx'> #define SERDES_LINK_MODE_MASK	GENMASK(2, 1)</div><div class='del'>-#define SERDES_LINK_MODE_SHIFT	1</div><div class='ctx'> #define SERDES_PWR_ST_SHIFT	4</div><div class='ctx'> #define SERDES_PWR_ST_P0	0x0</div><div class='ctx'> #define SERDES_PWR_ST_P3	0x3</div><div class='hunk'>@@ -50,4 +49,33 @@</div><div class='ctx'> #define PCH_PTP_CLK_FREQ_19_2MHZ	(GMAC_GPO0)</div><div class='ctx'> #define PCH_PTP_CLK_FREQ_200MHZ		(0)</div><div class='ctx'> </div><div class='add'>+/* Modphy Register index */</div><div class='add'>+#define R_PCH_FIA_15_PCR_LOS1_REG_BASE			8</div><div class='add'>+#define R_PCH_FIA_15_PCR_LOS2_REG_BASE			9</div><div class='add'>+#define R_PCH_FIA_15_PCR_LOS3_REG_BASE			10</div><div class='add'>+#define R_PCH_FIA_15_PCR_LOS4_REG_BASE			11</div><div class='add'>+#define R_PCH_FIA_15_PCR_LOS5_REG_BASE			12</div><div class='add'>+#define B_PCH_FIA_PCR_L0O				GENMASK(3, 0)</div><div class='add'>+#define PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0		13</div><div class='add'>+#define PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2		14</div><div class='add'>+#define PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7		15</div><div class='add'>+#define PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10		16</div><div class='add'>+#define PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30	17</div><div class='add'>+#define PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0		18</div><div class='add'>+#define PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2		19</div><div class='add'>+#define PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7		20</div><div class='add'>+#define PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10		21</div><div class='add'>+#define PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30	22</div><div class='add'>+</div><div class='add'>+#define B_MODPHY_PCR_LCPLL_DWORD0_1G		0x46AAAA41</div><div class='add'>+#define N_MODPHY_PCR_LCPLL_DWORD2_1G		0x00000139</div><div class='add'>+#define N_MODPHY_PCR_LCPLL_DWORD7_1G		0x002A0003</div><div class='add'>+#define N_MODPHY_PCR_LPPLL_DWORD10_1G		0x00170008</div><div class='add'>+#define N_MODPHY_PCR_CMN_ANA_DWORD30_1G		0x0000D4AC</div><div class='add'>+#define B_MODPHY_PCR_LCPLL_DWORD0_2P5G		0x58555551</div><div class='add'>+#define N_MODPHY_PCR_LCPLL_DWORD2_2P5G		0x0000012D</div><div class='add'>+#define N_MODPHY_PCR_LCPLL_DWORD7_2P5G		0x001F0003</div><div class='add'>+#define N_MODPHY_PCR_LPPLL_DWORD10_2P5G		0x00170008</div><div class='add'>+#define N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G	0x8200ACAC</div><div class='add'>+</div><div class='ctx'> #endif /* __DWMAC_INTEL_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c<br/>index 61227dcf56dc..c05f85534f0c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c</a></div><div class='hunk'>@@ -112,7 +112,7 @@ struct ipq806x_gmac {</div><div class='ctx'> 	phy_interface_t phy_mode;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int get_clk_div_sgmii(struct ipq806x_gmac *gmac, unsigned int speed)</div><div class='add'>+static int get_clk_div_sgmii(struct ipq806x_gmac *gmac, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;gmac-&gt;pdev-&gt;dev;</div><div class='ctx'> 	int div;</div><div class='hunk'>@@ -138,7 +138,7 @@ static int get_clk_div_sgmii(struct ipq806x_gmac *gmac, unsigned int speed)</div><div class='ctx'> 	return div;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int get_clk_div_rgmii(struct ipq806x_gmac *gmac, unsigned int speed)</div><div class='add'>+static int get_clk_div_rgmii(struct ipq806x_gmac *gmac, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;gmac-&gt;pdev-&gt;dev;</div><div class='ctx'> 	int div;</div><div class='hunk'>@@ -164,7 +164,7 @@ static int get_clk_div_rgmii(struct ipq806x_gmac *gmac, unsigned int speed)</div><div class='ctx'> 	return div;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ipq806x_gmac_set_speed(struct ipq806x_gmac *gmac, unsigned int speed)</div><div class='add'>+static int ipq806x_gmac_set_speed(struct ipq806x_gmac *gmac, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	uint32_t clk_bits, val;</div><div class='ctx'> 	int div;</div><div class='hunk'>@@ -211,16 +211,12 @@ static int ipq806x_gmac_set_speed(struct ipq806x_gmac *gmac, unsigned int speed)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ipq806x_gmac_of_parse(struct ipq806x_gmac *gmac)</div><div class='add'>+static int ipq806x_gmac_of_parse(struct ipq806x_gmac *gmac,</div><div class='add'>+				 struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;gmac-&gt;pdev-&gt;dev;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = of_get_phy_mode(dev-&gt;of_node, &amp;gmac-&gt;phy_mode);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(dev, "missing phy mode property\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	gmac-&gt;phy_mode = plat_dat-&gt;phy_interface;</div><div class='ctx'> </div><div class='ctx'> 	if (of_property_read_u32(dev-&gt;of_node, "qcom,id", &amp;gmac-&gt;id) &lt; 0) {</div><div class='ctx'> 		dev_err(dev, "missing qcom id property\n");</div><div class='hunk'>@@ -260,11 +256,12 @@ static int ipq806x_gmac_of_parse(struct ipq806x_gmac *gmac)</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(gmac-&gt;qsgmii_csr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ipq806x_gmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='add'>+static int ipq806x_gmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,</div><div class='add'>+					phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct ipq806x_gmac *gmac = priv;</div><div class='add'>+	struct ipq806x_gmac *gmac = bsp_priv;</div><div class='ctx'> </div><div class='del'>-	ipq806x_gmac_set_speed(gmac, speed);</div><div class='add'>+	return ipq806x_gmac_set_speed(gmac, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -397,7 +394,7 @@ static int ipq806x_gmac_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	gmac-&gt;pdev = pdev;</div><div class='ctx'> </div><div class='del'>-	err = ipq806x_gmac_of_parse(gmac);</div><div class='add'>+	err = ipq806x_gmac_of_parse(gmac, plat_dat);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(dev, "device tree parsing error\n");</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -476,9 +473,9 @@ static int ipq806x_gmac_probe(struct platform_device *pdev)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	plat_dat-&gt;has_gmac = true;</div><div class='add'>+	plat_dat-&gt;core_type = DWMAC_CORE_GMAC;</div><div class='ctx'> 	plat_dat-&gt;bsp_priv = gmac;</div><div class='del'>-	plat_dat-&gt;fix_mac_speed = ipq806x_gmac_fix_mac_speed;</div><div class='add'>+	plat_dat-&gt;set_clk_tx_rate = ipq806x_gmac_set_clk_tx_rate;</div><div class='ctx'> 	plat_dat-&gt;multicast_filter_bins = 0;</div><div class='ctx'> 	plat_dat-&gt;tx_fifo_size = 8192;</div><div class='ctx'> 	plat_dat-&gt;rx_fifo_size = 8192;</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c<br/>index bfe6e2d631bd..107a7c84ace8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c</a></div><div class='hunk'>@@ -8,9 +8,12 @@</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include "stmmac.h"</div><div class='add'>+#include "stmmac_libpci.h"</div><div class='ctx'> #include "dwmac_dma.h"</div><div class='ctx'> #include "dwmac1000.h"</div><div class='ctx'> </div><div class='add'>+#define DRIVER_NAME "dwmac-loongson-pci"</div><div class='add'>+</div><div class='ctx'> /* Normal Loongson Tx Summary */</div><div class='ctx'> #define DMA_INTR_ENA_NIE_TX_LOONGSON	0x00040000</div><div class='ctx'> /* Normal Loongson Rx Summary */</div><div class='hunk'>@@ -64,12 +67,14 @@</div><div class='ctx'> 					 DMA_STATUS_TPS | DMA_STATUS_TI  | \</div><div class='ctx'> 					 DMA_STATUS_MSK_COMMON_LOONGSON)</div><div class='ctx'> </div><div class='del'>-#define PCI_DEVICE_ID_LOONGSON_GMAC	0x7a03</div><div class='add'>+#define PCI_DEVICE_ID_LOONGSON_GMAC1	0x7a03</div><div class='add'>+#define PCI_DEVICE_ID_LOONGSON_GMAC2	0x7a23</div><div class='ctx'> #define PCI_DEVICE_ID_LOONGSON_GNET	0x7a13</div><div class='del'>-#define DWMAC_CORE_LS_MULTICHAN	0x10	/* Loongson custom ID */</div><div class='del'>-#define CHANNEL_NUM			8</div><div class='add'>+#define DWMAC_CORE_MULTICHAN_V1	0x10	/* Loongson custom ID 0x10 */</div><div class='add'>+#define DWMAC_CORE_MULTICHAN_V2	0x12	/* Loongson custom ID 0x12 */</div><div class='ctx'> </div><div class='ctx'> struct loongson_data {</div><div class='add'>+	u32 multichan;</div><div class='ctx'> 	u32 loongson_id;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> };</div><div class='hunk'>@@ -81,64 +86,53 @@ struct stmmac_pci_info {</div><div class='ctx'> static void loongson_default_data(struct pci_dev *pdev,</div><div class='ctx'> 				  struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='add'>+	struct loongson_data *ld = plat-&gt;bsp_priv;</div><div class='add'>+</div><div class='ctx'> 	/* Get bus_id, this can be overwritten later */</div><div class='ctx'> 	plat-&gt;bus_id = pci_dev_id(pdev);</div><div class='ctx'> </div><div class='del'>-	plat-&gt;clk_csr = 2;	/* clk_csr_i = 20-35MHz &amp; MDC = clk_csr_i/16 */</div><div class='del'>-	plat-&gt;has_gmac = 1;</div><div class='add'>+	/* clk_csr_i = 20-35MHz &amp; MDC = clk_csr_i/16 */</div><div class='add'>+	plat-&gt;clk_csr = STMMAC_CSR_20_35M;</div><div class='add'>+	plat-&gt;core_type = DWMAC_CORE_GMAC;</div><div class='ctx'> 	plat-&gt;force_sf_dma_mode = 1;</div><div class='ctx'> </div><div class='del'>-	/* Set default value for multicast hash bins */</div><div class='add'>+	/* Increase the default value for multicast hash bins */</div><div class='ctx'> 	plat-&gt;multicast_filter_bins = 256;</div><div class='ctx'> </div><div class='del'>-	plat-&gt;mac_interface = PHY_INTERFACE_MODE_NA;</div><div class='del'>-</div><div class='del'>-	/* Set default value for unicast filter entries */</div><div class='del'>-	plat-&gt;unicast_filter_entries = 1;</div><div class='del'>-</div><div class='del'>-	/* Set the maxmtu to a default of JUMBO_LEN */</div><div class='del'>-	plat-&gt;maxmtu = JUMBO_LEN;</div><div class='del'>-</div><div class='del'>-	/* Disable Priority config by default */</div><div class='del'>-	plat-&gt;tx_queues_cfg[0].use_prio = false;</div><div class='del'>-	plat-&gt;rx_queues_cfg[0].use_prio = false;</div><div class='del'>-</div><div class='del'>-	/* Disable RX queues routing by default */</div><div class='del'>-	plat-&gt;rx_queues_cfg[0].pkt_route = 0x0;</div><div class='del'>-</div><div class='ctx'> 	plat-&gt;clk_ref_rate = 125000000;</div><div class='ctx'> 	plat-&gt;clk_ptp_rate = 125000000;</div><div class='ctx'> </div><div class='del'>-	/* Default to phy auto-detection */</div><div class='del'>-	plat-&gt;phy_addr = -1;</div><div class='del'>-</div><div class='ctx'> 	plat-&gt;dma_cfg-&gt;pbl = 32;</div><div class='ctx'> 	plat-&gt;dma_cfg-&gt;pblx8 = true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int loongson_gmac_data(struct pci_dev *pdev,</div><div class='del'>-			      struct plat_stmmacenet_data *plat)</div><div class='del'>-{</div><div class='del'>-	struct loongson_data *ld;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	ld = plat-&gt;bsp_priv;</div><div class='del'>-</div><div class='del'>-	loongson_default_data(pdev, plat);</div><div class='ctx'> </div><div class='del'>-	if (ld-&gt;loongson_id == DWMAC_CORE_LS_MULTICHAN) {</div><div class='del'>-		plat-&gt;rx_queues_to_use = CHANNEL_NUM;</div><div class='del'>-		plat-&gt;tx_queues_to_use = CHANNEL_NUM;</div><div class='add'>+	switch (ld-&gt;loongson_id) {</div><div class='add'>+	case DWMAC_CORE_MULTICHAN_V1:</div><div class='add'>+		ld-&gt;multichan = 1;</div><div class='add'>+		plat-&gt;rx_queues_to_use = 8;</div><div class='add'>+		plat-&gt;tx_queues_to_use = 8;</div><div class='ctx'> </div><div class='ctx'> 		/* Only channel 0 supports checksum,</div><div class='ctx'> 		 * so turn off checksum to enable multiple channels.</div><div class='ctx'> 		 */</div><div class='del'>-		for (i = 1; i &lt; CHANNEL_NUM; i++)</div><div class='add'>+		for (int i = 1; i &lt; 8; i++)</div><div class='ctx'> 			plat-&gt;tx_queues_cfg[i].coe_unsupported = 1;</div><div class='del'>-	} else {</div><div class='del'>-		plat-&gt;tx_queues_to_use = 1;</div><div class='del'>-		plat-&gt;rx_queues_to_use = 1;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case DWMAC_CORE_MULTICHAN_V2:</div><div class='add'>+		ld-&gt;multichan = 1;</div><div class='add'>+		plat-&gt;rx_queues_to_use = 4;</div><div class='add'>+		plat-&gt;tx_queues_to_use = 4;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ld-&gt;multichan = 0;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int loongson_gmac_data(struct pci_dev *pdev,</div><div class='add'>+			      struct plat_stmmacenet_data *plat)</div><div class='add'>+{</div><div class='add'>+	loongson_default_data(pdev, plat);</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;phy_interface = PHY_INTERFACE_MODE_RGMII_ID;</div><div class='ctx'> </div><div class='hunk'>@@ -149,8 +143,7 @@ static struct stmmac_pci_info loongson_gmac_pci_info = {</div><div class='ctx'> 	.setup = loongson_gmac_data,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void loongson_gnet_fix_speed(void *priv, unsigned int speed,</div><div class='del'>-				    unsigned int mode)</div><div class='add'>+static void loongson_gnet_fix_speed(void *priv, int speed, unsigned int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct loongson_data *ld = (struct loongson_data *)priv;</div><div class='ctx'> 	struct net_device *ndev = dev_get_drvdata(ld-&gt;dev);</div><div class='hunk'>@@ -171,27 +164,8 @@ static void loongson_gnet_fix_speed(void *priv, unsigned int speed,</div><div class='ctx'> static int loongson_gnet_data(struct pci_dev *pdev,</div><div class='ctx'> 			      struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='del'>-	struct loongson_data *ld;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	ld = plat-&gt;bsp_priv;</div><div class='del'>-</div><div class='ctx'> 	loongson_default_data(pdev, plat);</div><div class='ctx'> </div><div class='del'>-	if (ld-&gt;loongson_id == DWMAC_CORE_LS_MULTICHAN) {</div><div class='del'>-		plat-&gt;rx_queues_to_use = CHANNEL_NUM;</div><div class='del'>-		plat-&gt;tx_queues_to_use = CHANNEL_NUM;</div><div class='del'>-</div><div class='del'>-		/* Only channel 0 supports checksum,</div><div class='del'>-		 * so turn off checksum to enable multiple channels.</div><div class='del'>-		 */</div><div class='del'>-		for (i = 1; i &lt; CHANNEL_NUM; i++)</div><div class='del'>-			plat-&gt;tx_queues_cfg[i].coe_unsupported = 1;</div><div class='del'>-	} else {</div><div class='del'>-		plat-&gt;tx_queues_to_use = 1;</div><div class='del'>-		plat-&gt;rx_queues_to_use = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	plat-&gt;phy_interface = PHY_INTERFACE_MODE_GMII;</div><div class='ctx'> 	plat-&gt;mdio_bus_data-&gt;phy_mask = ~(u32)BIT(2);</div><div class='ctx'> 	plat-&gt;fix_mac_speed = loongson_gnet_fix_speed;</div><div class='hunk'>@@ -329,10 +303,9 @@ static int loongson_dwmac_dma_interrupt(struct stmmac_priv *priv,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct mac_device_info *loongson_dwmac_setup(void *apriv)</div><div class='add'>+static int loongson_dwmac_setup(void *apriv, struct mac_device_info *mac)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = apriv;</div><div class='del'>-	struct mac_device_info *mac;</div><div class='ctx'> 	struct stmmac_dma_ops *dma;</div><div class='ctx'> 	struct loongson_data *ld;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='hunk'>@@ -340,23 +313,19 @@ static struct mac_device_info *loongson_dwmac_setup(void *apriv)</div><div class='ctx'> 	ld = priv-&gt;plat-&gt;bsp_priv;</div><div class='ctx'> 	pdev = to_pci_dev(priv-&gt;device);</div><div class='ctx'> </div><div class='del'>-	mac = devm_kzalloc(priv-&gt;device, sizeof(*mac), GFP_KERNEL);</div><div class='del'>-	if (!mac)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='ctx'> 	dma = devm_kzalloc(priv-&gt;device, sizeof(*dma), GFP_KERNEL);</div><div class='ctx'> 	if (!dma)</div><div class='del'>-		return NULL;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* The Loongson GMAC and GNET devices are based on the DW GMAC</div><div class='del'>-	 * v3.50a and v3.73a IP-cores. But the HW designers have changed the</div><div class='del'>-	 * GMAC_VERSION.SNPSVER field to the custom 0x10 value on the</div><div class='del'>-	 * network controllers with the multi-channels feature</div><div class='add'>+	 * v3.50a and v3.73a IP-cores. But the HW designers have changed</div><div class='add'>+	 * the GMAC_VERSION.SNPSVER field to the custom 0x10/0x12 value</div><div class='add'>+	 * on the network controllers with the multi-channels feature</div><div class='ctx'> 	 * available to emphasize the differences: multiple DMA-channels,</div><div class='ctx'> 	 * AV feature and GMAC_INT_STATUS CSR flags layout. Get back the</div><div class='ctx'> 	 * original value so the correct HW-interface would be selected.</div><div class='ctx'> 	 */</div><div class='del'>-	if (ld-&gt;loongson_id == DWMAC_CORE_LS_MULTICHAN) {</div><div class='add'>+	if (ld-&gt;multichan) {</div><div class='ctx'> 		priv-&gt;synopsys_id = DWMAC_CORE_3_70;</div><div class='ctx'> 		*dma = dwmac1000_dma_ops;</div><div class='ctx'> 		dma-&gt;init_chan = loongson_dwmac_dma_init_channel;</div><div class='hunk'>@@ -377,13 +346,13 @@ static struct mac_device_info *loongson_dwmac_setup(void *apriv)</div><div class='ctx'> 	if (mac-&gt;multicast_filter_bins)</div><div class='ctx'> 		mac-&gt;mcast_bits_log2 = ilog2(mac-&gt;multicast_filter_bins);</div><div class='ctx'> </div><div class='del'>-	/* Loongson GMAC doesn't support the flow control. LS2K2000</div><div class='del'>-	 * GNET doesn't support the half-duplex link mode.</div><div class='add'>+	/* Loongson GMAC doesn't support the flow control. Loongson GNET</div><div class='add'>+	 * without multi-channel doesn't support the half-duplex link mode.</div><div class='ctx'> 	 */</div><div class='del'>-	if (pdev-&gt;device == PCI_DEVICE_ID_LOONGSON_GMAC) {</div><div class='add'>+	if (pdev-&gt;device != PCI_DEVICE_ID_LOONGSON_GNET) {</div><div class='ctx'> 		mac-&gt;link.caps = MAC_10 | MAC_100 | MAC_1000;</div><div class='ctx'> 	} else {</div><div class='del'>-		if (ld-&gt;loongson_id == DWMAC_CORE_LS_MULTICHAN)</div><div class='add'>+		if (ld-&gt;multichan)</div><div class='ctx'> 			mac-&gt;link.caps = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='ctx'> 					 MAC_10 | MAC_100 | MAC_1000;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -405,16 +374,18 @@ static struct mac_device_info *loongson_dwmac_setup(void *apriv)</div><div class='ctx'> 	mac-&gt;mii.clk_csr_shift = 2;</div><div class='ctx'> 	mac-&gt;mii.clk_csr_mask = GENMASK(5, 2);</div><div class='ctx'> </div><div class='del'>-	return mac;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int loongson_dwmac_msi_config(struct pci_dev *pdev,</div><div class='ctx'> 				     struct plat_stmmacenet_data *plat,</div><div class='ctx'> 				     struct stmmac_resources *res)</div><div class='ctx'> {</div><div class='del'>-	int i, ret, vecs;</div><div class='add'>+	int i, ch_num, ret, vecs;</div><div class='ctx'> </div><div class='del'>-	vecs = roundup_pow_of_two(CHANNEL_NUM * 2 + 1);</div><div class='add'>+	ch_num = min(plat-&gt;tx_queues_to_use, plat-&gt;rx_queues_to_use);</div><div class='add'>+</div><div class='add'>+	vecs = roundup_pow_of_two(ch_num * 2 + 1);</div><div class='ctx'> 	ret = pci_alloc_irq_vectors(pdev, vecs, vecs, PCI_IRQ_MSI);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		dev_warn(&amp;pdev-&gt;dev, "Failed to allocate MSI IRQs\n");</div><div class='hunk'>@@ -423,14 +394,12 @@ static int loongson_dwmac_msi_config(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	res-&gt;irq = pci_irq_vector(pdev, 0);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; plat-&gt;rx_queues_to_use; i++) {</div><div class='del'>-		res-&gt;rx_irq[CHANNEL_NUM - 1 - i] =</div><div class='del'>-			pci_irq_vector(pdev, 1 + i * 2);</div><div class='add'>+	for (i = 0; i &lt; ch_num; i++) {</div><div class='add'>+		res-&gt;rx_irq[ch_num - 1 - i] = pci_irq_vector(pdev, 1 + i * 2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; plat-&gt;tx_queues_to_use; i++) {</div><div class='del'>-		res-&gt;tx_irq[CHANNEL_NUM - 1 - i] =</div><div class='del'>-			pci_irq_vector(pdev, 2 + i * 2);</div><div class='add'>+	for (i = 0; i &lt; ch_num; i++) {</div><div class='add'>+		res-&gt;tx_irq[ch_num - 1 - i] = pci_irq_vector(pdev, 2 + i * 2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;flags |= STMMAC_FLAG_MULTI_MSI_EN;</div><div class='hunk'>@@ -516,15 +485,33 @@ static int loongson_dwmac_acpi_config(struct pci_dev *pdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Loongson's DWMAC device may take nearly two seconds to complete DMA reset */</div><div class='add'>+static int loongson_dwmac_fix_reset(struct stmmac_priv *priv, void __iomem *ioaddr)</div><div class='add'>+{</div><div class='add'>+	u32 value = readl(ioaddr + DMA_BUS_MODE);</div><div class='add'>+</div><div class='add'>+	if (value &amp; DMA_BUS_MODE_SFT_RESET) {</div><div class='add'>+		netdev_err(priv-&gt;dev, "the PHY clock is missing\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	value |= DMA_BUS_MODE_SFT_RESET;</div><div class='add'>+	writel(value, ioaddr + DMA_BUS_MODE);</div><div class='add'>+</div><div class='add'>+	return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value,</div><div class='add'>+				  !(value &amp; DMA_BUS_MODE_SFT_RESET),</div><div class='add'>+				  10000, 2000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat;</div><div class='add'>+	struct stmmac_resources res = {};</div><div class='ctx'> 	struct stmmac_pci_info *info;</div><div class='del'>-	struct stmmac_resources res;</div><div class='ctx'> 	struct loongson_data *ld;</div><div class='del'>-	int ret, i;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	plat = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*plat), GFP_KERNEL);</div><div class='add'>+	plat = stmmac_plat_dat_alloc(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (!plat)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -552,20 +539,16 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id</div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Get the base address of device */</div><div class='del'>-	for (i = 0; i &lt; PCI_STD_NUM_BARS; i++) {</div><div class='del'>-		if (pci_resource_len(pdev, i) == 0)</div><div class='del'>-			continue;</div><div class='del'>-		ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev));</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_disable_device;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	memset(&amp;res, 0, sizeof(res));</div><div class='del'>-	res.addr = pcim_iomap_table(pdev)[0];</div><div class='add'>+	res.addr = pcim_iomap_region(pdev, 0, DRIVER_NAME);</div><div class='add'>+	ret = PTR_ERR_OR_ZERO(res.addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_disable_device;</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;bsp_priv = ld;</div><div class='del'>-	plat-&gt;setup = loongson_dwmac_setup;</div><div class='add'>+	plat-&gt;mac_setup = loongson_dwmac_setup;</div><div class='add'>+	plat-&gt;fix_soc_reset = loongson_dwmac_fix_reset;</div><div class='add'>+	plat-&gt;suspend = stmmac_pci_plat_suspend;</div><div class='add'>+	plat-&gt;resume = stmmac_pci_plat_resume;</div><div class='ctx'> 	ld-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	ld-&gt;loongson_id = readl(res.addr + GMAC_VERSION) &amp; 0xff;</div><div class='ctx'> </div><div class='hunk'>@@ -574,6 +557,9 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_disable_device;</div><div class='ctx'> </div><div class='add'>+	plat-&gt;tx_fifo_size = SZ_16K * plat-&gt;tx_queues_to_use;</div><div class='add'>+	plat-&gt;rx_fifo_size = SZ_16K * plat-&gt;rx_queues_to_use;</div><div class='add'>+</div><div class='ctx'> 	if (dev_of_node(&amp;pdev-&gt;dev))</div><div class='ctx'> 		ret = loongson_dwmac_dt_config(pdev, plat, &amp;res);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -582,7 +568,7 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id</div><div class='ctx'> 		goto err_disable_device;</div><div class='ctx'> </div><div class='ctx'> 	/* Use the common MAC IRQ if per-channel MSIs allocation failed */</div><div class='del'>-	if (ld-&gt;loongson_id == DWMAC_CORE_LS_MULTICHAN)</div><div class='add'>+	if (ld-&gt;multichan)</div><div class='ctx'> 		loongson_dwmac_msi_config(pdev, plat, &amp;res);</div><div class='ctx'> </div><div class='ctx'> 	ret = stmmac_dvr_probe(&amp;pdev-&gt;dev, plat, &amp;res);</div><div class='hunk'>@@ -594,7 +580,7 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id</div><div class='ctx'> err_plat_clear:</div><div class='ctx'> 	if (dev_of_node(&amp;pdev-&gt;dev))</div><div class='ctx'> 		loongson_dwmac_dt_clear(pdev, plat);</div><div class='del'>-	if (ld-&gt;loongson_id == DWMAC_CORE_LS_MULTICHAN)</div><div class='add'>+	if (ld-&gt;multichan)</div><div class='ctx'> 		loongson_dwmac_msi_clear(pdev);</div><div class='ctx'> err_disable_device:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='hunk'>@@ -606,7 +592,6 @@ static void loongson_dwmac_remove(struct pci_dev *pdev)</div><div class='ctx'> 	struct net_device *ndev = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct loongson_data *ld;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	ld = priv-&gt;plat-&gt;bsp_priv;</div><div class='ctx'> 	stmmac_dvr_remove(&amp;pdev-&gt;dev);</div><div class='hunk'>@@ -614,71 +599,27 @@ static void loongson_dwmac_remove(struct pci_dev *pdev)</div><div class='ctx'> 	if (dev_of_node(&amp;pdev-&gt;dev))</div><div class='ctx'> 		loongson_dwmac_dt_clear(pdev, priv-&gt;plat);</div><div class='ctx'> </div><div class='del'>-	if (ld-&gt;loongson_id == DWMAC_CORE_LS_MULTICHAN)</div><div class='add'>+	if (ld-&gt;multichan)</div><div class='ctx'> 		loongson_dwmac_msi_clear(pdev);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; PCI_STD_NUM_BARS; i++) {</div><div class='del'>-		if (pci_resource_len(pdev, i) == 0)</div><div class='del'>-			continue;</div><div class='del'>-		pcim_iounmap_regions(pdev, BIT(i));</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused loongson_dwmac_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_suspend(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = pci_save_state(pdev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-	pci_wake_from_d3(pdev, true);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __maybe_unused loongson_dwmac_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	pci_restore_state(pdev);</div><div class='del'>-	pci_set_power_state(pdev, PCI_D0);</div><div class='del'>-</div><div class='del'>-	ret = pci_enable_device(pdev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	pci_set_master(pdev);</div><div class='del'>-</div><div class='del'>-	return stmmac_resume(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static SIMPLE_DEV_PM_OPS(loongson_dwmac_pm_ops, loongson_dwmac_suspend,</div><div class='del'>-			 loongson_dwmac_resume);</div><div class='del'>-</div><div class='ctx'> static const struct pci_device_id loongson_dwmac_id_table[] = {</div><div class='del'>-	{ PCI_DEVICE_DATA(LOONGSON, GMAC, &amp;loongson_gmac_pci_info) },</div><div class='add'>+	{ PCI_DEVICE_DATA(LOONGSON, GMAC1, &amp;loongson_gmac_pci_info) },</div><div class='add'>+	{ PCI_DEVICE_DATA(LOONGSON, GMAC2, &amp;loongson_gmac_pci_info) },</div><div class='ctx'> 	{ PCI_DEVICE_DATA(LOONGSON, GNET, &amp;loongson_gnet_pci_info) },</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, loongson_dwmac_id_table);</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver loongson_dwmac_driver = {</div><div class='del'>-	.name = "dwmac-loongson-pci",</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='ctx'> 	.id_table = loongson_dwmac_id_table,</div><div class='ctx'> 	.probe = loongson_dwmac_probe,</div><div class='ctx'> 	.remove = loongson_dwmac_remove,</div><div class='ctx'> 	.driver = {</div><div class='del'>-		.pm = &amp;loongson_dwmac_pm_ops,</div><div class='add'>+		.pm = &amp;stmmac_simple_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c<br/>index 3e86810717d3..de9aba756aac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c</a></div><div class='hunk'>@@ -38,30 +38,54 @@</div><div class='ctx'> #define GMAC_SHUT		BIT(6)</div><div class='ctx'> </div><div class='ctx'> #define PHY_INTF_SELI		GENMASK(30, 28)</div><div class='del'>-#define PHY_INTF_MII		FIELD_PREP(PHY_INTF_SELI, 0)</div><div class='del'>-#define PHY_INTF_RMII		FIELD_PREP(PHY_INTF_SELI, 4)</div><div class='ctx'> </div><div class='ctx'> struct ls1x_dwmac {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat_dat;</div><div class='ctx'> 	struct regmap *regmap;</div><div class='add'>+	unsigned int id;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int ls1b_dwmac_syscon_init(struct platform_device *pdev, void *priv)</div><div class='add'>+struct ls1x_data {</div><div class='add'>+	int (*setup)(struct platform_device *pdev,</div><div class='add'>+		     struct plat_stmmacenet_data *plat_dat);</div><div class='add'>+	int (*init)(struct device *dev, void *bsp_priv);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ls1b_dwmac_setup(struct platform_device *pdev,</div><div class='add'>+			    struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> {</div><div class='del'>-	struct ls1x_dwmac *dwmac = priv;</div><div class='del'>-	struct plat_stmmacenet_data *plat = dwmac-&gt;plat_dat;</div><div class='del'>-	struct regmap *regmap = dwmac-&gt;regmap;</div><div class='add'>+	struct ls1x_dwmac *dwmac = plat_dat-&gt;bsp_priv;</div><div class='ctx'> 	struct resource *res;</div><div class='del'>-	unsigned long reg_base;</div><div class='ctx'> </div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	if (!res) {</div><div class='add'>+		/* This shouldn't fail - stmmac_get_platform_resources()</div><div class='add'>+		 * already mapped this resource.</div><div class='add'>+		 */</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Could not get IO_MEM resources\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	reg_base = (unsigned long)res-&gt;start;</div><div class='ctx'> </div><div class='del'>-	if (reg_base == LS1B_GMAC0_BASE) {</div><div class='add'>+	if (res-&gt;start == LS1B_GMAC0_BASE) {</div><div class='add'>+		dwmac-&gt;id = 0;</div><div class='add'>+	} else if (res-&gt;start == LS1B_GMAC1_BASE) {</div><div class='add'>+		dwmac-&gt;id = 1;</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Invalid Ethernet MAC base address %pR",</div><div class='add'>+			res);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ls1b_dwmac_syscon_init(struct device *dev, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct ls1x_dwmac *dwmac = priv;</div><div class='add'>+	struct plat_stmmacenet_data *plat = dwmac-&gt;plat_dat;</div><div class='add'>+	struct regmap *regmap = dwmac-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	if (dwmac-&gt;id == 0) {</div><div class='ctx'> 		switch (plat-&gt;phy_interface) {</div><div class='ctx'> 		case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='ctx'> 			regmap_update_bits(regmap, LS1X_SYSCON0,</div><div class='hunk'>@@ -74,13 +98,13 @@ static int ls1b_dwmac_syscon_init(struct platform_device *pdev, void *priv)</div><div class='ctx'> 					   GMAC0_USE_TXCLK | GMAC0_USE_PWM01);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "Unsupported PHY mode %u\n",</div><div class='add'>+			dev_err(dev, "Unsupported PHY mode %u\n",</div><div class='ctx'> 				plat-&gt;phy_interface);</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		regmap_update_bits(regmap, LS1X_SYSCON0, GMAC0_SHUT, 0);</div><div class='del'>-	} else if (reg_base == LS1B_GMAC1_BASE) {</div><div class='add'>+	} else if (dwmac-&gt;id == 1) {</div><div class='ctx'> 		regmap_update_bits(regmap, LS1X_SYSCON0,</div><div class='ctx'> 				   GMAC1_USE_UART1 | GMAC1_USE_UART0,</div><div class='ctx'> 				   GMAC1_USE_UART1 | GMAC1_USE_UART0);</div><div class='hunk'>@@ -98,42 +122,34 @@ static int ls1b_dwmac_syscon_init(struct platform_device *pdev, void *priv)</div><div class='ctx'> 					   GMAC1_USE_TXCLK | GMAC1_USE_PWM23);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "Unsupported PHY mode %u\n",</div><div class='add'>+			dev_err(dev, "Unsupported PHY mode %u\n",</div><div class='ctx'> 				plat-&gt;phy_interface);</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		regmap_update_bits(regmap, LS1X_SYSCON1, GMAC1_SHUT, 0);</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Invalid Ethernet MAC base address %lx",</div><div class='del'>-			reg_base);</div><div class='del'>-		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ls1c_dwmac_syscon_init(struct platform_device *pdev, void *priv)</div><div class='add'>+static int ls1c_dwmac_syscon_init(struct device *dev, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct ls1x_dwmac *dwmac = priv;</div><div class='ctx'> 	struct plat_stmmacenet_data *plat = dwmac-&gt;plat_dat;</div><div class='ctx'> 	struct regmap *regmap = dwmac-&gt;regmap;</div><div class='add'>+	int phy_intf_sel;</div><div class='ctx'> </div><div class='del'>-	switch (plat-&gt;phy_interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_MII:</div><div class='del'>-		regmap_update_bits(regmap, LS1X_SYSCON1, PHY_INTF_SELI,</div><div class='del'>-				   PHY_INTF_MII);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		regmap_update_bits(regmap, LS1X_SYSCON1, PHY_INTF_SELI,</div><div class='del'>-				   PHY_INTF_RMII);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Unsupported PHY-mode %u\n",</div><div class='add'>+	phy_intf_sel = stmmac_get_phy_intf_sel(plat-&gt;phy_interface);</div><div class='add'>+	if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RMII) {</div><div class='add'>+		dev_err(dev, "Unsupported PHY-mode %u\n",</div><div class='ctx'> 			plat-&gt;phy_interface);</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	regmap_update_bits(regmap, LS1X_SYSCON1, PHY_INTF_SELI,</div><div class='add'>+			   FIELD_PREP(PHY_INTF_SELI, phy_intf_sel));</div><div class='ctx'> 	regmap_update_bits(regmap, LS1X_SYSCON0, GMAC0_SHUT, 0);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -143,9 +159,9 @@ static int ls1x_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat_dat;</div><div class='ctx'> 	struct stmmac_resources stmmac_res;</div><div class='add'>+	const struct ls1x_data *data;</div><div class='ctx'> 	struct regmap *regmap;</div><div class='ctx'> 	struct ls1x_dwmac *dwmac;</div><div class='del'>-	int (*init)(struct platform_device *pdev, void *priv);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = stmmac_get_platform_resources(pdev, &amp;stmmac_res);</div><div class='hunk'>@@ -159,8 +175,8 @@ static int ls1x_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(regmap),</div><div class='ctx'> 				     "Unable to find syscon\n");</div><div class='ctx'> </div><div class='del'>-	init = of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='del'>-	if (!init) {</div><div class='add'>+	data = of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	if (!data) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "No of match data provided\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -175,21 +191,36 @@ static int ls1x_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 				     "dt configuration failed\n");</div><div class='ctx'> </div><div class='ctx'> 	plat_dat-&gt;bsp_priv = dwmac;</div><div class='del'>-	plat_dat-&gt;init = init;</div><div class='add'>+	plat_dat-&gt;init = data-&gt;init;</div><div class='ctx'> 	dwmac-&gt;plat_dat = plat_dat;</div><div class='ctx'> 	dwmac-&gt;regmap = regmap;</div><div class='ctx'> </div><div class='add'>+	if (data-&gt;setup) {</div><div class='add'>+		ret = data-&gt;setup(pdev, plat_dat);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return devm_stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct ls1x_data ls1b_dwmac_data = {</div><div class='add'>+	.setup = ls1b_dwmac_setup,</div><div class='add'>+	.init = ls1b_dwmac_syscon_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ls1x_data ls1c_dwmac_data = {</div><div class='add'>+	.init = ls1c_dwmac_syscon_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct of_device_id ls1x_dwmac_match[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.compatible = "loongson,ls1b-gmac",</div><div class='del'>-		.data = &amp;ls1b_dwmac_syscon_init,</div><div class='add'>+		.data = &amp;ls1b_dwmac_data,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.compatible = "loongson,ls1c-emac",</div><div class='del'>-		.data = &amp;ls1c_dwmac_syscon_init,</div><div class='add'>+		.data = &amp;ls1c_dwmac_data,</div><div class='ctx'> 	},</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c<br/>index 22653ffd2a04..c68d7de1f8ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c</a></div><div class='hunk'>@@ -21,16 +21,29 @@</div><div class='ctx'> </div><div class='ctx'> /* Register defines for CREG syscon */</div><div class='ctx'> #define LPC18XX_CREG_CREG6			0x12c</div><div class='del'>-# define LPC18XX_CREG_CREG6_ETHMODE_MASK	0x7</div><div class='del'>-# define LPC18XX_CREG_CREG6_ETHMODE_MII		0x0</div><div class='del'>-# define LPC18XX_CREG_CREG6_ETHMODE_RMII	0x4</div><div class='add'>+# define LPC18XX_CREG_CREG6_ETHMODE_MASK	GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+static int lpc18xx_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)</div><div class='add'>+{</div><div class='add'>+	struct regmap *reg = bsp_priv;</div><div class='add'>+</div><div class='add'>+	if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RMII)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(reg, LPC18XX_CREG_CREG6,</div><div class='add'>+			   LPC18XX_CREG_CREG6_ETHMODE_MASK,</div><div class='add'>+			   FIELD_PREP(LPC18XX_CREG_CREG6_ETHMODE_MASK,</div><div class='add'>+				      phy_intf_sel));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int lpc18xx_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat_dat;</div><div class='ctx'> 	struct stmmac_resources stmmac_res;</div><div class='del'>-	struct regmap *reg;</div><div class='del'>-	u8 ethmode;</div><div class='add'>+	struct regmap *regmap;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = stmmac_get_platform_resources(pdev, &amp;stmmac_res);</div><div class='hunk'>@@ -41,25 +54,16 @@ static int lpc18xx_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (IS_ERR(plat_dat))</div><div class='ctx'> 		return PTR_ERR(plat_dat);</div><div class='ctx'> </div><div class='del'>-	plat_dat-&gt;has_gmac = true;</div><div class='add'>+	plat_dat-&gt;core_type = DWMAC_CORE_GMAC;</div><div class='ctx'> </div><div class='del'>-	reg = syscon_regmap_lookup_by_compatible("nxp,lpc1850-creg");</div><div class='del'>-	if (IS_ERR(reg)) {</div><div class='add'>+	regmap = syscon_regmap_lookup_by_compatible("nxp,lpc1850-creg");</div><div class='add'>+	if (IS_ERR(regmap)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "syscon lookup failed\n");</div><div class='del'>-		return PTR_ERR(reg);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (plat_dat-&gt;mac_interface == PHY_INTERFACE_MODE_MII) {</div><div class='del'>-		ethmode = LPC18XX_CREG_CREG6_ETHMODE_MII;</div><div class='del'>-	} else if (plat_dat-&gt;mac_interface == PHY_INTERFACE_MODE_RMII) {</div><div class='del'>-		ethmode = LPC18XX_CREG_CREG6_ETHMODE_RMII;</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Only MII and RMII mode supported\n");</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return PTR_ERR(regmap);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	regmap_update_bits(reg, LPC18XX_CREG_CREG6,</div><div class='del'>-			   LPC18XX_CREG_CREG6_ETHMODE_MASK, ethmode);</div><div class='add'>+	plat_dat-&gt;bsp_priv = regmap;</div><div class='add'>+	plat_dat-&gt;set_phy_intf_sel = lpc18xx_set_phy_intf_sel;</div><div class='ctx'> </div><div class='ctx'> 	return stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c<br/>index f8ca81675407..1f2d7d19ca56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c</a></div><div class='hunk'>@@ -17,9 +17,6 @@</div><div class='ctx'> </div><div class='ctx'> /* Peri Configuration register for mt2712 */</div><div class='ctx'> #define PERI_ETH_PHY_INTF_SEL	0x418</div><div class='del'>-#define PHY_INTF_MII		0</div><div class='del'>-#define PHY_INTF_RGMII		1</div><div class='del'>-#define PHY_INTF_RMII		4</div><div class='ctx'> #define RMII_CLK_SRC_RXC	BIT(4)</div><div class='ctx'> #define RMII_CLK_SRC_INTERNAL	BIT(5)</div><div class='ctx'> </div><div class='hunk'>@@ -88,7 +85,8 @@ struct mediatek_dwmac_plat_data {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mediatek_dwmac_variant {</div><div class='del'>-	int (*dwmac_set_phy_interface)(struct mediatek_dwmac_plat_data *plat);</div><div class='add'>+	int (*dwmac_set_phy_interface)(struct mediatek_dwmac_plat_data *plat,</div><div class='add'>+				       u8 phy_intf_sel);</div><div class='ctx'> 	int (*dwmac_set_delay)(struct mediatek_dwmac_plat_data *plat);</div><div class='ctx'> </div><div class='ctx'> 	/* clock ids to be requested */</div><div class='hunk'>@@ -109,29 +107,16 @@ static const char * const mt8195_dwmac_clk_l[] = {</div><div class='ctx'> 	"axi", "apb", "mac_cg", "mac_main", "ptp_ref"</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int mt2712_set_interface(struct mediatek_dwmac_plat_data *plat)</div><div class='add'>+static int mt2712_set_interface(struct mediatek_dwmac_plat_data *plat,</div><div class='add'>+				u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	int rmii_clk_from_mac = plat-&gt;rmii_clk_from_mac ? RMII_CLK_SRC_INTERNAL : 0;</div><div class='del'>-	int rmii_rxc = plat-&gt;rmii_rxc ? RMII_CLK_SRC_RXC : 0;</div><div class='del'>-	u32 intf_val = 0;</div><div class='add'>+	u32 intf_val = phy_intf_sel;</div><div class='ctx'> </div><div class='del'>-	/* select phy interface in top control domain */</div><div class='del'>-	switch (plat-&gt;phy_mode) {</div><div class='del'>-	case PHY_INTERFACE_MODE_MII:</div><div class='del'>-		intf_val |= PHY_INTF_MII;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		intf_val |= (PHY_INTF_RMII | rmii_rxc | rmii_clk_from_mac);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-		intf_val |= PHY_INTF_RGMII;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(plat-&gt;dev, "phy interface not supported\n");</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (phy_intf_sel == PHY_INTF_SEL_RMII) {</div><div class='add'>+		if (plat-&gt;rmii_clk_from_mac)</div><div class='add'>+			intf_val |= RMII_CLK_SRC_INTERNAL;</div><div class='add'>+		if (plat-&gt;rmii_rxc)</div><div class='add'>+			intf_val |= RMII_CLK_SRC_RXC;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	regmap_write(plat-&gt;peri_regmap, PERI_ETH_PHY_INTF_SEL, intf_val);</div><div class='hunk'>@@ -288,30 +273,16 @@ static const struct mediatek_dwmac_variant mt2712_gmac_variant = {</div><div class='ctx'> 		.tx_delay_max = 17600,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int mt8195_set_interface(struct mediatek_dwmac_plat_data *plat)</div><div class='add'>+static int mt8195_set_interface(struct mediatek_dwmac_plat_data *plat,</div><div class='add'>+				u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	int rmii_clk_from_mac = plat-&gt;rmii_clk_from_mac ? MT8195_RMII_CLK_SRC_INTERNAL : 0;</div><div class='del'>-	int rmii_rxc = plat-&gt;rmii_rxc ? MT8195_RMII_CLK_SRC_RXC : 0;</div><div class='del'>-	u32 intf_val = 0;</div><div class='add'>+	u32 intf_val = FIELD_PREP(MT8195_ETH_INTF_SEL, phy_intf_sel);</div><div class='ctx'> </div><div class='del'>-	/* select phy interface in top control domain */</div><div class='del'>-	switch (plat-&gt;phy_mode) {</div><div class='del'>-	case PHY_INTERFACE_MODE_MII:</div><div class='del'>-		intf_val |= FIELD_PREP(MT8195_ETH_INTF_SEL, PHY_INTF_MII);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		intf_val |= (rmii_rxc | rmii_clk_from_mac);</div><div class='del'>-		intf_val |= FIELD_PREP(MT8195_ETH_INTF_SEL, PHY_INTF_RMII);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-		intf_val |= FIELD_PREP(MT8195_ETH_INTF_SEL, PHY_INTF_RGMII);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(plat-&gt;dev, "phy interface not supported\n");</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (phy_intf_sel == PHY_INTF_SEL_RMII) {</div><div class='add'>+		if (plat-&gt;rmii_clk_from_mac)</div><div class='add'>+			intf_val |= MT8195_RMII_CLK_SRC_INTERNAL;</div><div class='add'>+		if (plat-&gt;rmii_rxc)</div><div class='add'>+			intf_val |= MT8195_RMII_CLK_SRC_RXC;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* MT8195 only support external PHY */</div><div class='hunk'>@@ -456,7 +427,6 @@ static int mediatek_dwmac_config_dt(struct mediatek_dwmac_plat_data *plat)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac_delay_struct *mac_delay = &amp;plat-&gt;mac_delay;</div><div class='ctx'> 	u32 tx_delay_ps, rx_delay_ps;</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;peri_regmap = syscon_regmap_lookup_by_phandle(plat-&gt;np, "mediatek,pericfg");</div><div class='ctx'> 	if (IS_ERR(plat-&gt;peri_regmap)) {</div><div class='hunk'>@@ -464,12 +434,6 @@ static int mediatek_dwmac_config_dt(struct mediatek_dwmac_plat_data *plat)</div><div class='ctx'> 		return PTR_ERR(plat-&gt;peri_regmap);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = of_get_phy_mode(plat-&gt;np, &amp;plat-&gt;phy_mode);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(plat-&gt;dev, "not find phy-mode\n");</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (!of_property_read_u32(plat-&gt;np, "mediatek,tx-delay-ps", &amp;tx_delay_ps)) {</div><div class='ctx'> 		if (tx_delay_ps &lt; plat-&gt;variant-&gt;tx_delay_max) {</div><div class='ctx'> 			mac_delay-&gt;tx_delay = tx_delay_ps;</div><div class='hunk'>@@ -530,16 +494,24 @@ static int mediatek_dwmac_clk_init(struct mediatek_dwmac_plat_data *plat)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mediatek_dwmac_init(struct platform_device *pdev, void *priv)</div><div class='add'>+static int mediatek_dwmac_init(struct device *dev, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct mediatek_dwmac_plat_data *plat = priv;</div><div class='ctx'> 	const struct mediatek_dwmac_variant *variant = plat-&gt;variant;</div><div class='del'>-	int ret;</div><div class='add'>+	int phy_intf_sel, ret;</div><div class='ctx'> </div><div class='ctx'> 	if (variant-&gt;dwmac_set_phy_interface) {</div><div class='del'>-		ret = variant-&gt;dwmac_set_phy_interface(plat);</div><div class='add'>+		phy_intf_sel = stmmac_get_phy_intf_sel(plat-&gt;phy_mode);</div><div class='add'>+		if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &amp;&amp;</div><div class='add'>+		    phy_intf_sel != PHY_INTF_SEL_RGMII &amp;&amp;</div><div class='add'>+		    phy_intf_sel != PHY_INTF_SEL_RMII) {</div><div class='add'>+			dev_err(plat-&gt;dev, "phy interface not supported\n");</div><div class='add'>+			return phy_intf_sel &lt; 0 ? phy_intf_sel : -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = variant-&gt;dwmac_set_phy_interface(plat, phy_intf_sel);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			dev_err(plat-&gt;dev, "failed to set phy interface, err = %d\n", ret);</div><div class='add'>+			dev_err(dev, "failed to set phy interface, err = %d\n", ret);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -547,7 +519,7 @@ static int mediatek_dwmac_init(struct platform_device *pdev, void *priv)</div><div class='ctx'> 	if (variant-&gt;dwmac_set_delay) {</div><div class='ctx'> 		ret = variant-&gt;dwmac_set_delay(plat);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			dev_err(plat-&gt;dev, "failed to set delay value, err = %d\n", ret);</div><div class='add'>+			dev_err(dev, "failed to set delay value, err = %d\n", ret);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -587,16 +559,16 @@ static int mediatek_dwmac_common_data(struct platform_device *pdev,</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	plat-&gt;mac_interface = priv_plat-&gt;phy_mode;</div><div class='add'>+	priv_plat-&gt;phy_mode = plat-&gt;phy_interface;</div><div class='ctx'> 	if (priv_plat-&gt;mac_wol)</div><div class='del'>-		plat-&gt;flags |= STMMAC_FLAG_USE_PHY_WOL;</div><div class='del'>-	else</div><div class='ctx'> 		plat-&gt;flags &amp;= ~STMMAC_FLAG_USE_PHY_WOL;</div><div class='add'>+	else</div><div class='add'>+		plat-&gt;flags |= STMMAC_FLAG_USE_PHY_WOL;</div><div class='ctx'> 	plat-&gt;riwt_off = 1;</div><div class='ctx'> 	plat-&gt;maxmtu = ETH_DATA_LEN;</div><div class='ctx'> 	plat-&gt;host_dma_width = priv_plat-&gt;variant-&gt;dma_bit_mask;</div><div class='ctx'> 	plat-&gt;bsp_priv = priv_plat;</div><div class='del'>-	plat-&gt;init = mediatek_dwmac_init;</div><div class='add'>+	plat-&gt;resume = mediatek_dwmac_init;</div><div class='ctx'> 	plat-&gt;clks_config = mediatek_dwmac_clks_config;</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;safety_feat_cfg = devm_kzalloc(&amp;pdev-&gt;dev,</div><div class='hunk'>@@ -661,7 +633,7 @@ static int mediatek_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 		return PTR_ERR(plat_dat);</div><div class='ctx'> </div><div class='ctx'> 	mediatek_dwmac_common_data(pdev, plat_dat, priv_plat);</div><div class='del'>-	mediatek_dwmac_init(pdev, priv_plat);</div><div class='add'>+	mediatek_dwmac_init(&amp;pdev-&gt;dev, priv_plat);</div><div class='ctx'> </div><div class='ctx'> 	ret = mediatek_dwmac_clks_config(priv_plat, true);</div><div class='ctx'> 	if (ret)</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c<br/>index 5469fa1b429e..07c504d07604 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c</a></div><div class='hunk'>@@ -22,9 +22,10 @@ struct meson_dwmac {</div><div class='ctx'> 	void __iomem	*reg;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void meson6_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='add'>+static int meson6_dwmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,</div><div class='add'>+					phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct meson_dwmac *dwmac = priv;</div><div class='add'>+	struct meson_dwmac *dwmac = bsp_priv;</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='ctx'> 	val = readl(dwmac-&gt;reg);</div><div class='hunk'>@@ -39,6 +40,8 @@ static void meson6_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	writel(val, dwmac-&gt;reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int meson6_dwmac_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -65,7 +68,7 @@ static int meson6_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 		return PTR_ERR(dwmac-&gt;reg);</div><div class='ctx'> </div><div class='ctx'> 	plat_dat-&gt;bsp_priv = dwmac;</div><div class='del'>-	plat_dat-&gt;fix_mac_speed = meson6_dwmac_fix_mac_speed;</div><div class='add'>+	plat_dat-&gt;set_clk_tx_rate = meson6_dwmac_set_clk_tx_rate;</div><div class='ctx'> </div><div class='ctx'> 	return stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c<br/>index 9c2d62d133ad..e4d5c41294f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c</a></div><div class='hunk'>@@ -26,8 +26,6 @@</div><div class='ctx'> #define PRG_ETH0_RGMII_MODE		BIT(0)</div><div class='ctx'> </div><div class='ctx'> #define PRG_ETH0_EXT_PHY_MODE_MASK	GENMASK(2, 0)</div><div class='del'>-#define PRG_ETH0_EXT_RGMII_MODE		1</div><div class='del'>-#define PRG_ETH0_EXT_RMII_MODE		4</div><div class='ctx'> </div><div class='ctx'> /* mux to choose between fclk_div2 (bit unset) and mpll2 (bit set) */</div><div class='ctx'> #define PRG_ETH0_CLK_M250_SEL_MASK	GENMASK(4, 4)</div><div class='hunk'>@@ -238,28 +236,20 @@ static int meson8b_set_phy_mode(struct meson8b_dwmac *dwmac)</div><div class='ctx'> </div><div class='ctx'> static int meson_axg_set_phy_mode(struct meson8b_dwmac *dwmac)</div><div class='ctx'> {</div><div class='del'>-	switch (dwmac-&gt;phy_mode) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		/* enable RGMII mode */</div><div class='del'>-		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,</div><div class='del'>-					PRG_ETH0_EXT_PHY_MODE_MASK,</div><div class='del'>-					PRG_ETH0_EXT_RGMII_MODE);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		/* disable RGMII mode -&gt; enables RMII mode */</div><div class='del'>-		meson8b_dwmac_mask_bits(dwmac, PRG_ETH0,</div><div class='del'>-					PRG_ETH0_EXT_PHY_MODE_MASK,</div><div class='del'>-					PRG_ETH0_EXT_RMII_MODE);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='add'>+	int phy_intf_sel;</div><div class='add'>+</div><div class='add'>+	phy_intf_sel = stmmac_get_phy_intf_sel(dwmac-&gt;phy_mode);</div><div class='add'>+	if (phy_intf_sel != PHY_INTF_SEL_RGMII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RMII) {</div><div class='ctx'> 		dev_err(dwmac-&gt;dev, "fail to set phy-mode %s\n",</div><div class='ctx'> 			phy_modes(dwmac-&gt;phy_mode));</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return phy_intf_sel &lt; 0 ? phy_intf_sel : -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	meson8b_dwmac_mask_bits(dwmac, PRG_ETH0, PRG_ETH0_EXT_PHY_MODE_MASK,</div><div class='add'>+				FIELD_PREP(PRG_ETH0_EXT_PHY_MODE_MASK,</div><div class='add'>+					   phy_intf_sel));</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -417,11 +407,7 @@ static int meson8b_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 		return PTR_ERR(dwmac-&gt;regs);</div><div class='ctx'> </div><div class='ctx'> 	dwmac-&gt;dev = &amp;pdev-&gt;dev;</div><div class='del'>-	ret = of_get_phy_mode(pdev-&gt;dev.of_node, &amp;dwmac-&gt;phy_mode);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "missing phy-mode property\n");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='add'>+	dwmac-&gt;phy_mode = plat_dat-&gt;phy_interface;</div><div class='ctx'> </div><div class='ctx'> 	/* use 2ns as fallback since this value was previously hardcoded */</div><div class='ctx'> 	if (of_property_read_u32(pdev-&gt;dev.of_node, "amlogic,tx-delay-ns",</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c<br/>index 901a3c1959fa..0826a7bd32ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c</a></div><div class='hunk'>@@ -76,10 +76,6 @@</div><div class='ctx'> #define RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL	BIT(6)</div><div class='ctx'> #define RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN	BIT(5)</div><div class='ctx'> </div><div class='del'>-/* MAC_CTRL_REG bits */</div><div class='del'>-#define ETHQOS_MAC_CTRL_SPEED_MODE		BIT(14)</div><div class='del'>-#define ETHQOS_MAC_CTRL_PORT_SEL		BIT(15)</div><div class='del'>-</div><div class='ctx'> /* EMAC_WRAPPER_SGMII_PHY_CNTRL1 bits */</div><div class='ctx'> #define SGMII_PHY_CNTRL1_SGMII_TX_TO_RX_LOOPBACK_EN	BIT(3)</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +92,6 @@ struct ethqos_emac_driver_data {</div><div class='ctx'> 	bool rgmii_config_loopback_en;</div><div class='ctx'> 	bool has_emac_ge_3;</div><div class='ctx'> 	const char *link_clk_name;</div><div class='del'>-	bool has_integrated_pcs;</div><div class='ctx'> 	u32 dma_addr_width;</div><div class='ctx'> 	struct dwmac4_addrs dwmac4_addrs;</div><div class='ctx'> 	bool needs_sgmii_loopback;</div><div class='hunk'>@@ -106,12 +101,11 @@ struct qcom_ethqos {</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	void __iomem *rgmii_base;</div><div class='ctx'> 	void __iomem *mac_base;</div><div class='del'>-	int (*configure_func)(struct qcom_ethqos *ethqos);</div><div class='add'>+	int (*configure_func)(struct qcom_ethqos *ethqos, int speed);</div><div class='ctx'> </div><div class='ctx'> 	unsigned int link_clk_rate;</div><div class='ctx'> 	struct clk *link_clk;</div><div class='ctx'> 	struct phy *serdes_phy;</div><div class='del'>-	unsigned int speed;</div><div class='ctx'> 	int serdes_speed;</div><div class='ctx'> 	phy_interface_t phy_mode;</div><div class='ctx'> </div><div class='hunk'>@@ -122,27 +116,39 @@ struct qcom_ethqos {</div><div class='ctx'> 	bool needs_sgmii_loopback;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int rgmii_readl(struct qcom_ethqos *ethqos, unsigned int offset)</div><div class='add'>+static u32 rgmii_readl(struct qcom_ethqos *ethqos, unsigned int offset)</div><div class='ctx'> {</div><div class='ctx'> 	return readl(ethqos-&gt;rgmii_base + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rgmii_writel(struct qcom_ethqos *ethqos,</div><div class='del'>-			 int value, unsigned int offset)</div><div class='add'>+static void rgmii_writel(struct qcom_ethqos *ethqos, u32 value,</div><div class='add'>+			 unsigned int offset)</div><div class='ctx'> {</div><div class='ctx'> 	writel(value, ethqos-&gt;rgmii_base + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rgmii_updatel(struct qcom_ethqos *ethqos,</div><div class='del'>-			  int mask, int val, unsigned int offset)</div><div class='add'>+static void rgmii_updatel(struct qcom_ethqos *ethqos, u32 mask, u32 val,</div><div class='add'>+			  unsigned int offset)</div><div class='ctx'> {</div><div class='del'>-	unsigned int temp;</div><div class='add'>+	u32 temp;</div><div class='ctx'> </div><div class='ctx'> 	temp = rgmii_readl(ethqos, offset);</div><div class='ctx'> 	temp = (temp &amp; ~(mask)) | val;</div><div class='ctx'> 	rgmii_writel(ethqos, temp, offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void rgmii_setmask(struct qcom_ethqos *ethqos, u32 mask,</div><div class='add'>+			  unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	rgmii_updatel(ethqos, mask, mask, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rgmii_clrmask(struct qcom_ethqos *ethqos, u32 mask,</div><div class='add'>+			  unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	rgmii_updatel(ethqos, mask, 0, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void rgmii_dump(void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct qcom_ethqos *ethqos = priv;</div><div class='hunk'>@@ -169,30 +175,17 @@ static void rgmii_dump(void *priv)</div><div class='ctx'> 		rgmii_readl(ethqos, EMAC_SYSTEM_LOW_POWER_DEBUG));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Clock rates */</div><div class='del'>-#define RGMII_1000_NOM_CLK_FREQ			(250 * 1000 * 1000UL)</div><div class='del'>-#define RGMII_ID_MODE_100_LOW_SVS_CLK_FREQ	 (50 * 1000 * 1000UL)</div><div class='del'>-#define RGMII_ID_MODE_10_LOW_SVS_CLK_FREQ	  (5 * 1000 * 1000UL)</div><div class='del'>-</div><div class='ctx'> static void</div><div class='del'>-ethqos_update_link_clk(struct qcom_ethqos *ethqos, unsigned int speed)</div><div class='add'>+ethqos_update_link_clk(struct qcom_ethqos *ethqos, int speed)</div><div class='ctx'> {</div><div class='add'>+	long rate;</div><div class='add'>+</div><div class='ctx'> 	if (!phy_interface_mode_is_rgmii(ethqos-&gt;phy_mode))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	switch (speed) {</div><div class='del'>-	case SPEED_1000:</div><div class='del'>-		ethqos-&gt;link_clk_rate =  RGMII_1000_NOM_CLK_FREQ;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPEED_100:</div><div class='del'>-		ethqos-&gt;link_clk_rate =  RGMII_ID_MODE_100_LOW_SVS_CLK_FREQ;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPEED_10:</div><div class='del'>-		ethqos-&gt;link_clk_rate =  RGMII_ID_MODE_10_LOW_SVS_CLK_FREQ;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	rate = rgmii_clock(speed);</div><div class='add'>+	if (rate &gt; 0)</div><div class='add'>+		ethqos-&gt;link_clk_rate = rate * 2;</div><div class='ctx'> </div><div class='ctx'> 	clk_set_rate(ethqos-&gt;link_clk, ethqos-&gt;link_clk_rate);</div><div class='ctx'> }</div><div class='hunk'>@@ -213,8 +206,7 @@ qcom_ethqos_set_sgmii_loopback(struct qcom_ethqos *ethqos, bool enable)</div><div class='ctx'> static void ethqos_set_func_clk_en(struct qcom_ethqos *ethqos)</div><div class='ctx'> {</div><div class='ctx'> 	qcom_ethqos_set_sgmii_loopback(ethqos, true);</div><div class='del'>-	rgmii_updatel(ethqos, RGMII_CONFIG_FUNC_CLK_EN,</div><div class='del'>-		      RGMII_CONFIG_FUNC_CLK_EN, RGMII_IO_MACRO_CONFIG);</div><div class='add'>+	rgmii_setmask(ethqos, RGMII_CONFIG_FUNC_CLK_EN, RGMII_IO_MACRO_CONFIG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethqos_emac_por emac_v2_3_0_por[] = {</div><div class='hunk'>@@ -296,7 +288,6 @@ static const struct ethqos_emac_driver_data emac_v4_0_0_data = {</div><div class='ctx'> 	.rgmii_config_loopback_en = false,</div><div class='ctx'> 	.has_emac_ge_3 = true,</div><div class='ctx'> 	.link_clk_name = "phyaux",</div><div class='del'>-	.has_integrated_pcs = true,</div><div class='ctx'> 	.needs_sgmii_loopback = true,</div><div class='ctx'> 	.dma_addr_width = 36,</div><div class='ctx'> 	.dwmac4_addrs = {</div><div class='hunk'>@@ -320,69 +311,55 @@ static const struct ethqos_emac_driver_data emac_v4_0_0_data = {</div><div class='ctx'> static int ethqos_dll_configure(struct qcom_ethqos *ethqos)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;ethqos-&gt;pdev-&gt;dev;</div><div class='del'>-	unsigned int val;</div><div class='del'>-	int retry = 1000;</div><div class='add'>+	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	/* Set CDR_EN */</div><div class='del'>-	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CDR_EN,</div><div class='del'>-		      SDCC_DLL_CONFIG_CDR_EN, SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+	rgmii_setmask(ethqos, SDCC_DLL_CONFIG_CDR_EN, SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* Set CDR_EXT_EN */</div><div class='del'>-	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CDR_EXT_EN,</div><div class='del'>-		      SDCC_DLL_CONFIG_CDR_EXT_EN, SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+	rgmii_setmask(ethqos, SDCC_DLL_CONFIG_CDR_EXT_EN,</div><div class='add'>+		      SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear CK_OUT_EN */</div><div class='del'>-	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,</div><div class='del'>-		      0, SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+	rgmii_clrmask(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,</div><div class='add'>+		      SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* Set DLL_EN */</div><div class='del'>-	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN,</div><div class='del'>-		      SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+	rgmii_setmask(ethqos, SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	if (!ethqos-&gt;has_emac_ge_3) {</div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DLL_MCLK_GATING_EN,</div><div class='del'>-			      0, SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+		rgmii_clrmask(ethqos, SDCC_DLL_MCLK_GATING_EN,</div><div class='add'>+			      SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DLL_CDR_FINE_PHASE,</div><div class='del'>-			      0, SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+		rgmii_clrmask(ethqos, SDCC_DLL_CDR_FINE_PHASE,</div><div class='add'>+			      SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for CK_OUT_EN clear */</div><div class='del'>-	do {</div><div class='del'>-		val = rgmii_readl(ethqos, SDCC_HC_REG_DLL_CONFIG);</div><div class='del'>-		val &amp;= SDCC_DLL_CONFIG_CK_OUT_EN;</div><div class='del'>-		if (!val)</div><div class='del'>-			break;</div><div class='del'>-		mdelay(1);</div><div class='del'>-		retry--;</div><div class='del'>-	} while (retry &gt; 0);</div><div class='del'>-	if (!retry)</div><div class='add'>+	if (read_poll_timeout_atomic(rgmii_readl, val,</div><div class='add'>+				     !(val &amp; SDCC_DLL_CONFIG_CK_OUT_EN),</div><div class='add'>+				     1000, 1000000, false,</div><div class='add'>+				     ethqos, SDCC_HC_REG_DLL_CONFIG))</div><div class='ctx'> 		dev_err(dev, "Clear CK_OUT_EN timedout\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Set CK_OUT_EN */</div><div class='del'>-	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,</div><div class='del'>-		      SDCC_DLL_CONFIG_CK_OUT_EN, SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+	rgmii_setmask(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,</div><div class='add'>+		      SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for CK_OUT_EN set */</div><div class='del'>-	retry = 1000;</div><div class='del'>-	do {</div><div class='del'>-		val = rgmii_readl(ethqos, SDCC_HC_REG_DLL_CONFIG);</div><div class='del'>-		val &amp;= SDCC_DLL_CONFIG_CK_OUT_EN;</div><div class='del'>-		if (val)</div><div class='del'>-			break;</div><div class='del'>-		mdelay(1);</div><div class='del'>-		retry--;</div><div class='del'>-	} while (retry &gt; 0);</div><div class='del'>-	if (!retry)</div><div class='add'>+	if (read_poll_timeout_atomic(rgmii_readl, val,</div><div class='add'>+				     val &amp; SDCC_DLL_CONFIG_CK_OUT_EN,</div><div class='add'>+				     1000, 1000000, false,</div><div class='add'>+				     ethqos, SDCC_HC_REG_DLL_CONFIG))</div><div class='ctx'> 		dev_err(dev, "Set CK_OUT_EN timedout\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Set DDR_CAL_EN */</div><div class='del'>-	rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_CAL_EN,</div><div class='del'>-		      SDCC_DLL_CONFIG2_DDR_CAL_EN, SDCC_HC_REG_DLL_CONFIG2);</div><div class='add'>+	rgmii_setmask(ethqos, SDCC_DLL_CONFIG2_DDR_CAL_EN,</div><div class='add'>+		      SDCC_HC_REG_DLL_CONFIG2);</div><div class='ctx'> </div><div class='ctx'> 	if (!ethqos-&gt;has_emac_ge_3) {</div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DLL_CLOCK_DIS,</div><div class='del'>-			      0, SDCC_HC_REG_DLL_CONFIG2);</div><div class='add'>+		rgmii_clrmask(ethqos, SDCC_DLL_CONFIG2_DLL_CLOCK_DIS,</div><div class='add'>+			      SDCC_HC_REG_DLL_CONFIG2);</div><div class='ctx'> </div><div class='ctx'> 		rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_MCLK_FREQ_CALC,</div><div class='ctx'> 			      0x1A &lt;&lt; 10, SDCC_HC_REG_DLL_CONFIG2);</div><div class='hunk'>@@ -390,15 +367,14 @@ static int ethqos_dll_configure(struct qcom_ethqos *ethqos)</div><div class='ctx'> 		rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SEL,</div><div class='ctx'> 			      BIT(2), SDCC_HC_REG_DLL_CONFIG2);</div><div class='ctx'> </div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SW,</div><div class='del'>-			      SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SW,</div><div class='add'>+		rgmii_setmask(ethqos, SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SW,</div><div class='ctx'> 			      SDCC_HC_REG_DLL_CONFIG2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos)</div><div class='add'>+static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;ethqos-&gt;pdev-&gt;dev;</div><div class='ctx'> 	int phase_shift;</div><div class='hunk'>@@ -412,8 +388,8 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos)</div><div class='ctx'> 		phase_shift = RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable loopback mode */</div><div class='del'>-	rgmii_updatel(ethqos, RGMII_CONFIG2_TX_TO_RX_LOOPBACK_EN,</div><div class='del'>-		      0, RGMII_IO_MACRO_CONFIG2);</div><div class='add'>+	rgmii_clrmask(ethqos, RGMII_CONFIG2_TX_TO_RX_LOOPBACK_EN,</div><div class='add'>+		      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> </div><div class='ctx'> 	/* Determine if this platform wants loopback enabled after programming */</div><div class='ctx'> 	if (ethqos-&gt;rgmii_config_loopback_en)</div><div class='hunk'>@@ -422,29 +398,26 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos)</div><div class='ctx'> 		loopback = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Select RGMII, write 0 to interface select */</div><div class='del'>-	rgmii_updatel(ethqos, RGMII_CONFIG_INTF_SEL,</div><div class='del'>-		      0, RGMII_IO_MACRO_CONFIG);</div><div class='add'>+	rgmii_clrmask(ethqos, RGMII_CONFIG_INTF_SEL, RGMII_IO_MACRO_CONFIG);</div><div class='ctx'> </div><div class='del'>-	switch (ethqos-&gt;speed) {</div><div class='add'>+	switch (speed) {</div><div class='ctx'> 	case SPEED_1000:</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_DDR_MODE,</div><div class='del'>-			      RGMII_CONFIG_DDR_MODE, RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,</div><div class='del'>-			      RGMII_CONFIG_POS_NEG_DATA_SEL,</div><div class='add'>+		rgmii_setmask(ethqos, RGMII_CONFIG_DDR_MODE,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG);</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,</div><div class='ctx'> 			      RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_PROG_SWAP,</div><div class='del'>-			      RGMII_CONFIG_PROG_SWAP, RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG2);</div><div class='add'>+		rgmii_setmask(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG);</div><div class='add'>+		rgmii_setmask(ethqos, RGMII_CONFIG_PROG_SWAP,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG);</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> </div><div class='ctx'> 		rgmii_updatel(ethqos, RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN,</div><div class='ctx'> 			      phase_shift, RGMII_IO_MACRO_CONFIG2);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG2);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='del'>-			      RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG2);</div><div class='add'>+		rgmii_setmask(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='ctx'> 			      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> </div><div class='ctx'> 		/* PRG_RCLK_DLY = TCXO period * TCXO_CYCLES_CNT / 2 * RX delay ns,</div><div class='hunk'>@@ -459,104 +432,95 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos)</div><div class='ctx'> 			rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_RCLK_DLY,</div><div class='ctx'> 				      57, SDCC_HC_REG_DDR_CONFIG);</div><div class='ctx'> 		}</div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_PRG_DLY_EN,</div><div class='del'>-			      SDCC_DDR_CONFIG_PRG_DLY_EN,</div><div class='add'>+		rgmii_setmask(ethqos, SDCC_DDR_CONFIG_PRG_DLY_EN,</div><div class='ctx'> 			      SDCC_HC_REG_DDR_CONFIG);</div><div class='ctx'> 		rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,</div><div class='ctx'> 			      loopback, RGMII_IO_MACRO_CONFIG);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPEED_100:</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_DDR_MODE,</div><div class='del'>-			      RGMII_CONFIG_DDR_MODE, RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,</div><div class='del'>-			      RGMII_CONFIG_BYPASS_TX_ID_EN,</div><div class='add'>+		rgmii_setmask(ethqos, RGMII_CONFIG_DDR_MODE,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG);</div><div class='add'>+		rgmii_setmask(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG);</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG);</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG_PROG_SWAP,</div><div class='ctx'> 			      RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_PROG_SWAP,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG2);</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> 		rgmii_updatel(ethqos, RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN,</div><div class='ctx'> 			      phase_shift, RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> 		rgmii_updatel(ethqos, RGMII_CONFIG_MAX_SPD_PRG_2,</div><div class='ctx'> 			      BIT(6), RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG2);</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> </div><div class='ctx'> 		if (ethqos-&gt;has_emac_ge_3)</div><div class='del'>-			rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='del'>-				      RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='add'>+			rgmii_setmask(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='ctx'> 				      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> 		else</div><div class='del'>-			rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='del'>-				      0, RGMII_IO_MACRO_CONFIG2);</div><div class='add'>+			rgmii_clrmask(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='add'>+				      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> </div><div class='ctx'> 		/* Write 0x5 to PRG_RCLK_DLY_CODE */</div><div class='ctx'> 		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_CODE,</div><div class='ctx'> 			      (BIT(29) | BIT(27)), SDCC_HC_REG_DDR_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY,</div><div class='del'>-			      SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY,</div><div class='add'>+		rgmii_setmask(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY,</div><div class='ctx'> 			      SDCC_HC_REG_DDR_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,</div><div class='del'>-			      SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,</div><div class='add'>+		rgmii_setmask(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,</div><div class='ctx'> 			      SDCC_HC_REG_DDR_CONFIG);</div><div class='ctx'> 		rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,</div><div class='ctx'> 			      loopback, RGMII_IO_MACRO_CONFIG);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SPEED_10:</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_DDR_MODE,</div><div class='del'>-			      RGMII_CONFIG_DDR_MODE, RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,</div><div class='del'>-			      RGMII_CONFIG_BYPASS_TX_ID_EN,</div><div class='add'>+		rgmii_setmask(ethqos, RGMII_CONFIG_DDR_MODE,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG);</div><div class='add'>+		rgmii_setmask(ethqos, RGMII_CONFIG_BYPASS_TX_ID_EN,</div><div class='ctx'> 			      RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG_PROG_SWAP,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG2);</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG_POS_NEG_DATA_SEL,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG);</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG_PROG_SWAP,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG);</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> 		rgmii_updatel(ethqos, RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN,</div><div class='ctx'> 			      phase_shift, RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> 		rgmii_updatel(ethqos, RGMII_CONFIG_MAX_SPD_PRG_9,</div><div class='ctx'> 			      BIT(12) | GENMASK(9, 8),</div><div class='ctx'> 			      RGMII_IO_MACRO_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,</div><div class='del'>-			      0, RGMII_IO_MACRO_CONFIG2);</div><div class='add'>+		rgmii_clrmask(ethqos, RGMII_CONFIG2_RSVD_CONFIG15,</div><div class='add'>+			      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> 		if (ethqos-&gt;has_emac_ge_3)</div><div class='del'>-			rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='del'>-				      RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='add'>+			rgmii_setmask(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='ctx'> 				      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> 		else</div><div class='del'>-			rgmii_updatel(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='del'>-				      0, RGMII_IO_MACRO_CONFIG2);</div><div class='add'>+			rgmii_clrmask(ethqos, RGMII_CONFIG2_RX_PROG_SWAP,</div><div class='add'>+				      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> 		/* Write 0x5 to PRG_RCLK_DLY_CODE */</div><div class='ctx'> 		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_CODE,</div><div class='ctx'> 			      (BIT(29) | BIT(27)), SDCC_HC_REG_DDR_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY,</div><div class='del'>-			      SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY,</div><div class='add'>+		rgmii_setmask(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY,</div><div class='ctx'> 			      SDCC_HC_REG_DDR_CONFIG);</div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,</div><div class='del'>-			      SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,</div><div class='add'>+		rgmii_setmask(ethqos, SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN,</div><div class='ctx'> 			      SDCC_HC_REG_DDR_CONFIG);</div><div class='ctx'> 		rgmii_updatel(ethqos, RGMII_CONFIG_LOOPBACK_EN,</div><div class='ctx'> 			      loopback, RGMII_IO_MACRO_CONFIG);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		dev_err(dev, "Invalid speed %d\n", ethqos-&gt;speed);</div><div class='add'>+		dev_err(dev, "Invalid speed %d\n", speed);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos)</div><div class='add'>+static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;ethqos-&gt;pdev-&gt;dev;</div><div class='del'>-	volatile unsigned int dll_lock;</div><div class='del'>-	unsigned int i, retry = 1000;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	/* Reset to POR values and enable clk */</div><div class='ctx'> 	for (i = 0; i &lt; ethqos-&gt;num_por; i++)</div><div class='hunk'>@@ -567,15 +531,15 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos)</div><div class='ctx'> 	/* Initialize the DLL first */</div><div class='ctx'> </div><div class='ctx'> 	/* Set DLL_RST */</div><div class='del'>-	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_RST,</div><div class='del'>-		      SDCC_DLL_CONFIG_DLL_RST, SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+	rgmii_setmask(ethqos, SDCC_DLL_CONFIG_DLL_RST,</div><div class='add'>+		      SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* Set PDN */</div><div class='del'>-	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_PDN,</div><div class='del'>-		      SDCC_DLL_CONFIG_PDN, SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+	rgmii_setmask(ethqos, SDCC_DLL_CONFIG_PDN,</div><div class='add'>+		      SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	if (ethqos-&gt;has_emac_ge_3) {</div><div class='del'>-		if (ethqos-&gt;speed == SPEED_1000) {</div><div class='add'>+		if (speed == SPEED_1000) {</div><div class='ctx'> 			rgmii_writel(ethqos, 0x1800000, SDCC_TEST_CTL);</div><div class='ctx'> 			rgmii_writel(ethqos, 0x2C010800, SDCC_USR_CTL);</div><div class='ctx'> 			rgmii_writel(ethqos, 0xA001, SDCC_HC_REG_DLL_CONFIG2);</div><div class='hunk'>@@ -586,21 +550,18 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Clear DLL_RST */</div><div class='del'>-	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_RST, 0,</div><div class='del'>-		      SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+	rgmii_clrmask(ethqos, SDCC_DLL_CONFIG_DLL_RST, SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear PDN */</div><div class='del'>-	rgmii_updatel(ethqos, SDCC_DLL_CONFIG_PDN, 0,</div><div class='del'>-		      SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+	rgmii_clrmask(ethqos, SDCC_DLL_CONFIG_PDN, SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='del'>-	if (ethqos-&gt;speed != SPEED_100 &amp;&amp; ethqos-&gt;speed != SPEED_10) {</div><div class='add'>+	if (speed != SPEED_100 &amp;&amp; speed != SPEED_10) {</div><div class='ctx'> 		/* Set DLL_EN */</div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DLL_CONFIG_DLL_EN,</div><div class='del'>-			      SDCC_DLL_CONFIG_DLL_EN, SDCC_HC_REG_DLL_CONFIG);</div><div class='add'>+		rgmii_setmask(ethqos, SDCC_DLL_CONFIG_DLL_EN,</div><div class='add'>+			      SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 		/* Set CK_OUT_EN */</div><div class='del'>-		rgmii_updatel(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,</div><div class='del'>-			      SDCC_DLL_CONFIG_CK_OUT_EN,</div><div class='add'>+		rgmii_setmask(ethqos, SDCC_DLL_CONFIG_CK_OUT_EN,</div><div class='ctx'> 			      SDCC_HC_REG_DLL_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 		/* Set USR_CTL bit 26 with mask of 3 bits */</div><div class='hunk'>@@ -609,21 +570,17 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos)</div><div class='ctx'> 				      SDCC_USR_CTL);</div><div class='ctx'> </div><div class='ctx'> 		/* wait for DLL LOCK */</div><div class='del'>-		do {</div><div class='del'>-			mdelay(1);</div><div class='del'>-			dll_lock = rgmii_readl(ethqos, SDC4_STATUS);</div><div class='del'>-			if (dll_lock &amp; SDC4_STATUS_DLL_LOCK)</div><div class='del'>-				break;</div><div class='del'>-			retry--;</div><div class='del'>-		} while (retry &gt; 0);</div><div class='del'>-		if (!retry)</div><div class='add'>+		if (read_poll_timeout_atomic(rgmii_readl, val,</div><div class='add'>+					     val &amp; SDC4_STATUS_DLL_LOCK,</div><div class='add'>+					     1000, 1000000, true,</div><div class='add'>+					     ethqos, SDC4_STATUS))</div><div class='ctx'> 			dev_err(dev, "Timeout while waiting for DLL lock\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ethqos-&gt;speed == SPEED_1000)</div><div class='add'>+	if (speed == SPEED_1000)</div><div class='ctx'> 		ethqos_dll_configure(ethqos);</div><div class='ctx'> </div><div class='del'>-	ethqos_rgmii_macro_init(ethqos);</div><div class='add'>+	ethqos_rgmii_macro_init(ethqos, speed);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -636,77 +593,61 @@ static void ethqos_set_serdes_speed(struct qcom_ethqos *ethqos, int speed)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ethqos_pcs_set_inband(struct stmmac_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	stmmac_pcs_ctrl_ane(priv, enable, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* On interface toggle MAC registers gets reset.</div><div class='ctx'>  * Configure MAC block for SGMII on ethernet phy link up</div><div class='ctx'>  */</div><div class='del'>-static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos)</div><div class='add'>+static int ethqos_configure_sgmii(struct qcom_ethqos *ethqos, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(ethqos-&gt;pdev);</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='del'>-	int val;</div><div class='ctx'> </div><div class='del'>-	val = readl(ethqos-&gt;mac_base + MAC_CTRL_REG);</div><div class='del'>-</div><div class='del'>-	switch (ethqos-&gt;speed) {</div><div class='add'>+	switch (speed) {</div><div class='ctx'> 	case SPEED_2500:</div><div class='del'>-		val &amp;= ~ETHQOS_MAC_CTRL_PORT_SEL;</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG2_RGMII_CLK_SEL_CFG,</div><div class='del'>-			      RGMII_CONFIG2_RGMII_CLK_SEL_CFG,</div><div class='add'>+		rgmii_setmask(ethqos, RGMII_CONFIG2_RGMII_CLK_SEL_CFG,</div><div class='ctx'> 			      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> 		ethqos_set_serdes_speed(ethqos, SPEED_2500);</div><div class='del'>-		stmmac_pcs_ctrl_ane(priv, priv-&gt;ioaddr, 0, 0, 0);</div><div class='add'>+		ethqos_pcs_set_inband(priv, false);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPEED_1000:</div><div class='del'>-		val &amp;= ~ETHQOS_MAC_CTRL_PORT_SEL;</div><div class='del'>-		rgmii_updatel(ethqos, RGMII_CONFIG2_RGMII_CLK_SEL_CFG,</div><div class='del'>-			      RGMII_CONFIG2_RGMII_CLK_SEL_CFG,</div><div class='add'>+		rgmii_setmask(ethqos, RGMII_CONFIG2_RGMII_CLK_SEL_CFG,</div><div class='ctx'> 			      RGMII_IO_MACRO_CONFIG2);</div><div class='ctx'> 		ethqos_set_serdes_speed(ethqos, SPEED_1000);</div><div class='del'>-		stmmac_pcs_ctrl_ane(priv, priv-&gt;ioaddr, 1, 0, 0);</div><div class='add'>+		ethqos_pcs_set_inband(priv, true);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPEED_100:</div><div class='del'>-		val |= ETHQOS_MAC_CTRL_PORT_SEL | ETHQOS_MAC_CTRL_SPEED_MODE;</div><div class='ctx'> 		ethqos_set_serdes_speed(ethqos, SPEED_1000);</div><div class='del'>-		stmmac_pcs_ctrl_ane(priv, priv-&gt;ioaddr, 1, 0, 0);</div><div class='add'>+		ethqos_pcs_set_inband(priv, true);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPEED_10:</div><div class='del'>-		val |= ETHQOS_MAC_CTRL_PORT_SEL;</div><div class='del'>-		val &amp;= ~ETHQOS_MAC_CTRL_SPEED_MODE;</div><div class='ctx'> 		rgmii_updatel(ethqos, RGMII_CONFIG_SGMII_CLK_DVDR,</div><div class='ctx'> 			      FIELD_PREP(RGMII_CONFIG_SGMII_CLK_DVDR,</div><div class='ctx'> 					 SGMII_10M_RX_CLK_DVDR),</div><div class='ctx'> 			      RGMII_IO_MACRO_CONFIG);</div><div class='ctx'> 		ethqos_set_serdes_speed(ethqos, SPEED_1000);</div><div class='del'>-		stmmac_pcs_ctrl_ane(priv, priv-&gt;ioaddr, 1, 0, 0);</div><div class='add'>+		ethqos_pcs_set_inband(priv, true);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	writel(val, ethqos-&gt;mac_base + MAC_CTRL_REG);</div><div class='del'>-</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void qcom_ethqos_speed_mode_2500(struct net_device *ndev, void *data)</div><div class='del'>-{</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	priv-&gt;plat-&gt;max_speed = 2500;</div><div class='del'>-	priv-&gt;plat-&gt;phy_interface = PHY_INTERFACE_MODE_2500BASEX;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ethqos_configure(struct qcom_ethqos *ethqos)</div><div class='add'>+static int ethqos_configure(struct qcom_ethqos *ethqos, int speed)</div><div class='ctx'> {</div><div class='del'>-	return ethqos-&gt;configure_func(ethqos);</div><div class='add'>+	return ethqos-&gt;configure_func(ethqos, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ethqos_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='add'>+static void ethqos_fix_mac_speed(void *priv, int speed, unsigned int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct qcom_ethqos *ethqos = priv;</div><div class='ctx'> </div><div class='ctx'> 	qcom_ethqos_set_sgmii_loopback(ethqos, false);</div><div class='del'>-	ethqos-&gt;speed = speed;</div><div class='ctx'> 	ethqos_update_link_clk(ethqos, speed);</div><div class='del'>-	ethqos_configure(ethqos);</div><div class='add'>+	ethqos_configure(ethqos, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qcom_ethqos_serdes_powerup(struct net_device *ndev, void *priv)</div><div class='hunk'>@@ -722,7 +663,7 @@ static int qcom_ethqos_serdes_powerup(struct net_device *ndev, void *priv)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return phy_set_speed(ethqos-&gt;serdes_phy, ethqos-&gt;speed);</div><div class='add'>+	return phy_set_speed(ethqos-&gt;serdes_phy, ethqos-&gt;serdes_speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void qcom_ethqos_serdes_powerdown(struct net_device *ndev, void *priv)</div><div class='hunk'>@@ -777,7 +718,7 @@ static void ethqos_ptp_clk_freq_config(struct stmmac_priv *priv)</div><div class='ctx'> 		netdev_err(priv-&gt;dev, "Failed to max out clk_ptp_ref: %d\n", err);</div><div class='ctx'> 	plat_dat-&gt;clk_ptp_rate = clk_get_rate(plat_dat-&gt;clk_ptp_ref);</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(priv-&gt;dev, "PTP rate %d\n", plat_dat-&gt;clk_ptp_rate);</div><div class='add'>+	netdev_dbg(priv-&gt;dev, "PTP rate %lu\n", plat_dat-&gt;clk_ptp_rate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qcom_ethqos_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -807,9 +748,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!ethqos)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ret = of_get_phy_mode(np, &amp;ethqos-&gt;phy_mode);</div><div class='del'>-	if (ret)</div><div class='del'>-		return dev_err_probe(dev, ret, "Failed to get phy mode\n");</div><div class='add'>+	ethqos-&gt;phy_mode = plat_dat-&gt;phy_interface;</div><div class='ctx'> 	switch (ethqos-&gt;phy_mode) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='hunk'>@@ -818,8 +757,6 @@ static int qcom_ethqos_probe(struct platform_device *pdev)</div><div class='ctx'> 		ethqos-&gt;configure_func = ethqos_configure_rgmii;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='del'>-		plat_dat-&gt;speed_mode_2500 = qcom_ethqos_speed_mode_2500;</div><div class='del'>-		fallthrough;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_SGMII:</div><div class='ctx'> 		ethqos-&gt;configure_func = ethqos_configure_sgmii;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -862,7 +799,6 @@ static int qcom_ethqos_probe(struct platform_device *pdev)</div><div class='ctx'> 		return dev_err_probe(dev, PTR_ERR(ethqos-&gt;serdes_phy),</div><div class='ctx'> 				     "Failed to get serdes phy\n");</div><div class='ctx'> </div><div class='del'>-	ethqos-&gt;speed = SPEED_1000;</div><div class='ctx'> 	ethqos-&gt;serdes_speed = SPEED_1000;</div><div class='ctx'> 	ethqos_update_link_clk(ethqos, SPEED_1000);</div><div class='ctx'> 	ethqos_set_func_clk_en(ethqos);</div><div class='hunk'>@@ -871,7 +807,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev)</div><div class='ctx'> 	plat_dat-&gt;fix_mac_speed = ethqos_fix_mac_speed;</div><div class='ctx'> 	plat_dat-&gt;dump_debug_regs = rgmii_dump;</div><div class='ctx'> 	plat_dat-&gt;ptp_clk_freq_config = ethqos_ptp_clk_freq_config;</div><div class='del'>-	plat_dat-&gt;has_gmac4 = 1;</div><div class='add'>+	plat_dat-&gt;core_type = DWMAC_CORE_GMAC4;</div><div class='ctx'> 	if (ethqos-&gt;has_emac_ge_3)</div><div class='ctx'> 		plat_dat-&gt;dwmac4_addrs = &amp;data-&gt;dwmac4_addrs;</div><div class='ctx'> 	plat_dat-&gt;pmt = 1;</div><div class='hunk'>@@ -879,8 +815,6 @@ static int qcom_ethqos_probe(struct platform_device *pdev)</div><div class='ctx'> 		plat_dat-&gt;flags |= STMMAC_FLAG_TSO_EN;</div><div class='ctx'> 	if (of_device_is_compatible(np, "qcom,qcs404-ethqos"))</div><div class='ctx'> 		plat_dat-&gt;flags |= STMMAC_FLAG_RX_CLK_RUNS_IN_LPI;</div><div class='del'>-	if (data-&gt;has_integrated_pcs)</div><div class='del'>-		plat_dat-&gt;flags |= STMMAC_FLAG_HAS_INTEGRATED_PCS;</div><div class='ctx'> 	if (data-&gt;dma_addr_width)</div><div class='ctx'> 		plat_dat-&gt;host_dma_width = data-&gt;dma_addr_width;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c<br/>new file mode 100644<br/>index 000000000000..be7f5eb2cdcf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c</a></div><div class='hunk'>@@ -0,0 +1,235 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * dwmac-renesas-gbeth.c - DWMAC Specific Glue layer for Renesas GBETH</div><div class='add'>+ *</div><div class='add'>+ * The Rx and Tx clocks are supplied as follows for the GBETH IP.</div><div class='add'>+ *</div><div class='add'>+ *                         Rx / Tx</div><div class='add'>+ *   -------+------------- on / off -------</div><div class='add'>+ *          |</div><div class='add'>+ *          |            Rx-180 / Tx-180</div><div class='add'>+ *          +---- not ---- on / off -------</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Renesas Electronics Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/pcs-rzn1-miic.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stmmac_platform.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct renesas_gbeth_of_data - OF data for Renesas GBETH</div><div class='add'>+ *</div><div class='add'>+ * @clks: Array of clock names</div><div class='add'>+ * @num_clks: Number of clocks</div><div class='add'>+ * @stmmac_flags: Flags for the stmmac driver</div><div class='add'>+ * @handle_reset: Flag to indicate if reset control is</div><div class='add'>+ *                handled by the glue driver or core driver.</div><div class='add'>+ * @set_clk_tx_rate: Flag to indicate if Tx clock is fixed or</div><div class='add'>+ *                   set_clk_tx_rate is needed.</div><div class='add'>+ * @has_pcs: Flag to indicate if the MAC has a PCS</div><div class='add'>+ */</div><div class='add'>+struct renesas_gbeth_of_data {</div><div class='add'>+	const char * const *clks;</div><div class='add'>+	u8 num_clks;</div><div class='add'>+	u32 stmmac_flags;</div><div class='add'>+	bool handle_reset;</div><div class='add'>+	bool set_clk_tx_rate;</div><div class='add'>+	bool has_pcs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct renesas_gbeth {</div><div class='add'>+	const struct renesas_gbeth_of_data *of_data;</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='add'>+	struct reset_control *rstc;</div><div class='add'>+	struct device *dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const renesas_gbeth_clks[] = {</div><div class='add'>+	"tx", "tx-180", "rx", "rx-180",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *const renesas_gmac_clks[] = {</div><div class='add'>+	"tx",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int renesas_gmac_pcs_init(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = priv-&gt;device-&gt;of_node;</div><div class='add'>+	struct device_node *pcs_node;</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='add'>+</div><div class='add'>+	pcs_node = of_parse_phandle(np, "pcs-handle", 0);</div><div class='add'>+	if (pcs_node) {</div><div class='add'>+		pcs = miic_create(priv-&gt;device, pcs_node);</div><div class='add'>+		of_node_put(pcs_node);</div><div class='add'>+		if (IS_ERR(pcs))</div><div class='add'>+			return PTR_ERR(pcs);</div><div class='add'>+</div><div class='add'>+		priv-&gt;hw-&gt;phylink_pcs = pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void renesas_gmac_pcs_exit(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;hw-&gt;phylink_pcs)</div><div class='add'>+		miic_destroy(priv-&gt;hw-&gt;phylink_pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *renesas_gmac_select_pcs(struct stmmac_priv *priv,</div><div class='add'>+						   phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;hw-&gt;phylink_pcs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int renesas_gbeth_init(struct device *dev, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='add'>+	struct renesas_gbeth *gbeth = priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	plat_dat = gbeth-&gt;plat_dat;</div><div class='add'>+</div><div class='add'>+	ret = reset_control_deassert(gbeth-&gt;rstc);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(gbeth-&gt;dev, "Reset deassert failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = clk_bulk_prepare_enable(plat_dat-&gt;num_clks,</div><div class='add'>+				      plat_dat-&gt;clks);</div><div class='add'>+	if (ret)</div><div class='add'>+		reset_control_assert(gbeth-&gt;rstc);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void renesas_gbeth_exit(struct device *dev, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='add'>+	struct renesas_gbeth *gbeth = priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	plat_dat = gbeth-&gt;plat_dat;</div><div class='add'>+</div><div class='add'>+	clk_bulk_disable_unprepare(plat_dat-&gt;num_clks, plat_dat-&gt;clks);</div><div class='add'>+</div><div class='add'>+	ret = reset_control_assert(gbeth-&gt;rstc);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(gbeth-&gt;dev, "Reset assert failed\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int renesas_gbeth_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	const struct renesas_gbeth_of_data *of_data;</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='add'>+	struct stmmac_resources stmmac_res;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct renesas_gbeth *gbeth;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = stmmac_get_platform_resources(pdev, &amp;stmmac_res);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(dev, err,</div><div class='add'>+				     "failed to get resources\n");</div><div class='add'>+</div><div class='add'>+	plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);</div><div class='add'>+	if (IS_ERR(plat_dat))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(plat_dat),</div><div class='add'>+				     "dt configuration failed\n");</div><div class='add'>+</div><div class='add'>+	gbeth = devm_kzalloc(dev, sizeof(*gbeth), GFP_KERNEL);</div><div class='add'>+	if (!gbeth)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	of_data = of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	gbeth-&gt;of_data = of_data;</div><div class='add'>+</div><div class='add'>+	plat_dat-&gt;num_clks = of_data-&gt;num_clks;</div><div class='add'>+	plat_dat-&gt;clks = devm_kcalloc(dev, plat_dat-&gt;num_clks,</div><div class='add'>+				      sizeof(*plat_dat-&gt;clks), GFP_KERNEL);</div><div class='add'>+	if (!plat_dat-&gt;clks)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; plat_dat-&gt;num_clks; i++)</div><div class='add'>+		plat_dat-&gt;clks[i].id = of_data-&gt;clks[i];</div><div class='add'>+</div><div class='add'>+	err = devm_clk_bulk_get(dev, plat_dat-&gt;num_clks, plat_dat-&gt;clks);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	plat_dat-&gt;clk_tx_i = stmmac_pltfr_find_clk(plat_dat, "tx");</div><div class='add'>+	if (!plat_dat-&gt;clk_tx_i)</div><div class='add'>+		return dev_err_probe(dev, -EINVAL,</div><div class='add'>+				     "error finding tx clock\n");</div><div class='add'>+</div><div class='add'>+	if (of_data-&gt;handle_reset) {</div><div class='add'>+		gbeth-&gt;rstc = devm_reset_control_get_exclusive(dev, NULL);</div><div class='add'>+		if (IS_ERR(gbeth-&gt;rstc))</div><div class='add'>+			return PTR_ERR(gbeth-&gt;rstc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gbeth-&gt;dev = dev;</div><div class='add'>+	gbeth-&gt;plat_dat = plat_dat;</div><div class='add'>+	plat_dat-&gt;bsp_priv = gbeth;</div><div class='add'>+	if (of_data-&gt;set_clk_tx_rate)</div><div class='add'>+		plat_dat-&gt;set_clk_tx_rate = stmmac_set_clk_tx_rate;</div><div class='add'>+	plat_dat-&gt;init = renesas_gbeth_init;</div><div class='add'>+	plat_dat-&gt;exit = renesas_gbeth_exit;</div><div class='add'>+	plat_dat-&gt;flags |= STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP |</div><div class='add'>+			   gbeth-&gt;of_data-&gt;stmmac_flags;</div><div class='add'>+	if (of_data-&gt;has_pcs) {</div><div class='add'>+		plat_dat-&gt;pcs_init = renesas_gmac_pcs_init;</div><div class='add'>+		plat_dat-&gt;pcs_exit = renesas_gmac_pcs_exit;</div><div class='add'>+		plat_dat-&gt;select_pcs = renesas_gmac_select_pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return devm_stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct renesas_gbeth_of_data renesas_gbeth_of_data = {</div><div class='add'>+	.clks = renesas_gbeth_clks,</div><div class='add'>+	.num_clks = ARRAY_SIZE(renesas_gbeth_clks),</div><div class='add'>+	.handle_reset = true,</div><div class='add'>+	.set_clk_tx_rate = true,</div><div class='add'>+	.stmmac_flags = STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY |</div><div class='add'>+			STMMAC_FLAG_SPH_DISABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct renesas_gbeth_of_data renesas_gmac_of_data = {</div><div class='add'>+	.clks = renesas_gmac_clks,</div><div class='add'>+	.num_clks = ARRAY_SIZE(renesas_gmac_clks),</div><div class='add'>+	.stmmac_flags = STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY,</div><div class='add'>+	.has_pcs = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id renesas_gbeth_match[] = {</div><div class='add'>+	{ .compatible = "renesas,r9a09g077-gbeth", .data = &amp;renesas_gmac_of_data },</div><div class='add'>+	{ .compatible = "renesas,rzv2h-gbeth", .data = &amp;renesas_gbeth_of_data },</div><div class='add'>+	{ /* Sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, renesas_gbeth_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver renesas_gbeth_driver = {</div><div class='add'>+	.probe  = renesas_gbeth_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name		= "renesas-gbeth",</div><div class='add'>+		.pm		= &amp;stmmac_pltfr_pm_ops,</div><div class='add'>+		.of_match_table	= renesas_gbeth_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(renesas_gbeth_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Renesas GBETH DWMAC Specific Glue layer");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c<br/>index 8cb374668b74..0a95f54e725e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c</a></div><div class='hunk'>@@ -8,6 +8,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/stmmac.h&gt;</div><div class='add'>+#include &lt;linux/hw_bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='hunk'>@@ -24,15 +25,26 @@</div><div class='ctx'> #include "stmmac_platform.h"</div><div class='ctx'> </div><div class='ctx'> struct rk_priv_data;</div><div class='add'>+</div><div class='add'>+struct rk_reg_speed_data {</div><div class='add'>+	unsigned int rgmii_10;</div><div class='add'>+	unsigned int rgmii_100;</div><div class='add'>+	unsigned int rgmii_1000;</div><div class='add'>+	unsigned int rmii_10;</div><div class='add'>+	unsigned int rmii_100;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct rk_gmac_ops {</div><div class='ctx'> 	void (*set_to_rgmii)(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 			     int tx_delay, int rx_delay);</div><div class='ctx'> 	void (*set_to_rmii)(struct rk_priv_data *bsp_priv);</div><div class='del'>-	void (*set_rgmii_speed)(struct rk_priv_data *bsp_priv, int speed);</div><div class='del'>-	void (*set_rmii_speed)(struct rk_priv_data *bsp_priv, int speed);</div><div class='add'>+	int (*set_speed)(struct rk_priv_data *bsp_priv,</div><div class='add'>+			 phy_interface_t interface, int speed);</div><div class='ctx'> 	void (*set_clock_selection)(struct rk_priv_data *bsp_priv, bool input,</div><div class='ctx'> 				    bool enable);</div><div class='ctx'> 	void (*integrated_phy_powerup)(struct rk_priv_data *bsp_priv);</div><div class='add'>+	void (*integrated_phy_powerdown)(struct rk_priv_data *bsp_priv);</div><div class='add'>+	bool php_grf_required;</div><div class='ctx'> 	bool regs_valid;</div><div class='ctx'> 	u32 regs[];</div><div class='ctx'> };</div><div class='hunk'>@@ -56,11 +68,10 @@ enum rk_clocks_index {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct rk_priv_data {</div><div class='del'>-	struct platform_device *pdev;</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	phy_interface_t phy_iface;</div><div class='ctx'> 	int id;</div><div class='ctx'> 	struct regulator *regulator;</div><div class='del'>-	bool suspended;</div><div class='ctx'> 	const struct rk_gmac_ops *ops;</div><div class='ctx'> </div><div class='ctx'> 	bool clk_enabled;</div><div class='hunk'>@@ -69,7 +80,6 @@ struct rk_priv_data {</div><div class='ctx'> </div><div class='ctx'> 	struct clk_bulk_data *clks;</div><div class='ctx'> 	int num_clks;</div><div class='del'>-	struct clk *clk_mac;</div><div class='ctx'> 	struct clk *clk_phy;</div><div class='ctx'> </div><div class='ctx'> 	struct reset_control *phy_reset;</div><div class='hunk'>@@ -81,73 +91,191 @@ struct rk_priv_data {</div><div class='ctx'> 	struct regmap *php_grf;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define HIWORD_UPDATE(val, mask, shift) \</div><div class='del'>-		((val) &lt;&lt; (shift) | (mask) &lt;&lt; ((shift) + 16))</div><div class='add'>+static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    const struct rk_reg_speed_data *rsd,</div><div class='add'>+			    unsigned int reg, phy_interface_t interface,</div><div class='add'>+			    int speed)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(interface)) {</div><div class='add'>+		if (speed == SPEED_10) {</div><div class='add'>+			val = rsd-&gt;rgmii_10;</div><div class='add'>+		} else if (speed == SPEED_100) {</div><div class='add'>+			val = rsd-&gt;rgmii_100;</div><div class='add'>+		} else if (speed == SPEED_1000) {</div><div class='add'>+			val = rsd-&gt;rgmii_1000;</div><div class='add'>+		} else {</div><div class='add'>+			/* Phylink will not allow inappropriate speeds for</div><div class='add'>+			 * interface modes, so this should never happen.</div><div class='add'>+			 */</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else if (interface == PHY_INTERFACE_MODE_RMII) {</div><div class='add'>+		if (speed == SPEED_10) {</div><div class='add'>+			val = rsd-&gt;rmii_10;</div><div class='add'>+		} else if (speed == SPEED_100) {</div><div class='add'>+			val = rsd-&gt;rmii_100;</div><div class='add'>+		} else {</div><div class='add'>+			/* Phylink will not allow inappropriate speeds for</div><div class='add'>+			 * interface modes, so this should never happen.</div><div class='add'>+			 */</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* This should never happen, as .get_interfaces() limits</div><div class='add'>+		 * the interface modes that are supported to RGMII and/or</div><div class='add'>+		 * RMII.</div><div class='add'>+		 */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write(bsp_priv-&gt;grf, reg, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rk_set_clk_mac_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+				phy_interface_t interface, int speed)</div><div class='add'>+{</div><div class='add'>+	struct clk *clk_mac_speed = bsp_priv-&gt;clks[RK_CLK_MAC_SPEED].clk;</div><div class='add'>+	long rate;</div><div class='add'>+</div><div class='add'>+	rate = rgmii_clock(speed);</div><div class='add'>+	if (rate &lt; 0)</div><div class='add'>+		return rate;</div><div class='add'>+</div><div class='add'>+	return clk_set_rate(clk_mac_speed, rate);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-#define GRF_BIT(nr)	(BIT(nr) | BIT(nr+16))</div><div class='del'>-#define GRF_CLR_BIT(nr)	(BIT(nr+16))</div><div class='add'>+#define GRF_FIELD(hi, lo, val)		\</div><div class='add'>+	FIELD_PREP_WM16(GENMASK_U16(hi, lo), val)</div><div class='add'>+#define GRF_FIELD_CONST(hi, lo, val)	\</div><div class='add'>+	FIELD_PREP_WM16_CONST(GENMASK_U16(hi, lo), val)</div><div class='add'>+</div><div class='add'>+#define GRF_BIT(nr)			(BIT(nr) | BIT(nr+16))</div><div class='add'>+#define GRF_CLR_BIT(nr)			(BIT(nr+16))</div><div class='ctx'> </div><div class='ctx'> #define DELAY_ENABLE(soc, tx, rx) \</div><div class='ctx'> 	(((tx) ? soc##_GMAC_TXCLK_DLY_ENABLE : soc##_GMAC_TXCLK_DLY_DISABLE) | \</div><div class='ctx'> 	 ((rx) ? soc##_GMAC_RXCLK_DLY_ENABLE : soc##_GMAC_RXCLK_DLY_DISABLE))</div><div class='ctx'> </div><div class='add'>+#define RK_GRF_MACPHY_CON0		0xb00</div><div class='add'>+#define RK_GRF_MACPHY_CON1		0xb04</div><div class='add'>+#define RK_GRF_MACPHY_CON2		0xb08</div><div class='add'>+#define RK_GRF_MACPHY_CON3		0xb0c</div><div class='add'>+</div><div class='add'>+#define RK_MACPHY_ENABLE		GRF_BIT(0)</div><div class='add'>+#define RK_MACPHY_DISABLE		GRF_CLR_BIT(0)</div><div class='add'>+#define RK_MACPHY_CFG_CLK_50M		GRF_BIT(14)</div><div class='add'>+#define RK_GMAC2PHY_RMII_MODE		GRF_FIELD(7, 6, 1)</div><div class='add'>+#define RK_GRF_CON2_MACPHY_ID		GRF_FIELD(15, 0, 0x1234)</div><div class='add'>+#define RK_GRF_CON3_MACPHY_ID		GRF_FIELD(5, 0, 0x35)</div><div class='add'>+</div><div class='add'>+static void rk_gmac_integrated_ephy_powerup(struct rk_priv_data *priv)</div><div class='add'>+{</div><div class='add'>+	regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M);</div><div class='add'>+	regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE);</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID);</div><div class='add'>+	regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;phy_reset) {</div><div class='add'>+		/* PHY needs to be disabled before trying to reset it */</div><div class='add'>+		regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);</div><div class='add'>+		if (priv-&gt;phy_reset)</div><div class='add'>+			reset_control_assert(priv-&gt;phy_reset);</div><div class='add'>+		usleep_range(10, 20);</div><div class='add'>+		if (priv-&gt;phy_reset)</div><div class='add'>+			reset_control_deassert(priv-&gt;phy_reset);</div><div class='add'>+		usleep_range(10, 20);</div><div class='add'>+		regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE);</div><div class='add'>+		msleep(30);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rk_gmac_integrated_ephy_powerdown(struct rk_priv_data *priv)</div><div class='add'>+{</div><div class='add'>+	regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);</div><div class='add'>+	if (priv-&gt;phy_reset)</div><div class='add'>+		reset_control_assert(priv-&gt;phy_reset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define RK_FEPHY_SHUTDOWN		GRF_BIT(1)</div><div class='add'>+#define RK_FEPHY_POWERUP		GRF_CLR_BIT(1)</div><div class='add'>+#define RK_FEPHY_INTERNAL_RMII_SEL	GRF_BIT(6)</div><div class='add'>+#define RK_FEPHY_24M_CLK_SEL		GRF_FIELD(9, 8, 3)</div><div class='add'>+#define RK_FEPHY_PHY_ID			GRF_BIT(11)</div><div class='add'>+</div><div class='add'>+static void rk_gmac_integrated_fephy_powerup(struct rk_priv_data *priv,</div><div class='add'>+					     unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	reset_control_assert(priv-&gt;phy_reset);</div><div class='add'>+	usleep_range(20, 30);</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;grf, reg,</div><div class='add'>+		     RK_FEPHY_POWERUP |</div><div class='add'>+		     RK_FEPHY_INTERNAL_RMII_SEL |</div><div class='add'>+		     RK_FEPHY_24M_CLK_SEL |</div><div class='add'>+		     RK_FEPHY_PHY_ID);</div><div class='add'>+	usleep_range(10000, 12000);</div><div class='add'>+</div><div class='add'>+	reset_control_deassert(priv-&gt;phy_reset);</div><div class='add'>+	usleep_range(50000, 60000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rk_gmac_integrated_fephy_powerdown(struct rk_priv_data *priv,</div><div class='add'>+					       unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	regmap_write(priv-&gt;grf, reg, RK_FEPHY_SHUTDOWN);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define PX30_GRF_GMAC_CON1		0x0904</div><div class='ctx'> </div><div class='ctx'> /* PX30_GRF_GMAC_CON1 */</div><div class='del'>-#define PX30_GMAC_PHY_INTF_SEL_RMII	(GRF_CLR_BIT(4) | GRF_CLR_BIT(5) | \</div><div class='del'>-					 GRF_BIT(6))</div><div class='add'>+#define PX30_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(6, 4, val)</div><div class='ctx'> #define PX30_GMAC_SPEED_10M		GRF_CLR_BIT(2)</div><div class='ctx'> #define PX30_GMAC_SPEED_100M		GRF_BIT(2)</div><div class='ctx'> </div><div class='ctx'> static void px30_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, PX30_GRF_GMAC_CON1,</div><div class='del'>-		     PX30_GMAC_PHY_INTF_SEL_RMII);</div><div class='add'>+		     PX30_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void px30_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='add'>+static int px30_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			  phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct clk *clk_mac_speed = bsp_priv-&gt;clks[RK_CLK_MAC_SPEED].clk;</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-	int ret;</div><div class='add'>+	struct device *dev = bsp_priv-&gt;dev;</div><div class='add'>+	unsigned int con1;</div><div class='add'>+	long rate;</div><div class='ctx'> </div><div class='ctx'> 	if (!clk_mac_speed) {</div><div class='ctx'> 		dev_err(dev, "%s: Missing clk_mac_speed clock\n", __func__);</div><div class='del'>-		return;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (speed == 10) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, PX30_GRF_GMAC_CON1,</div><div class='del'>-			     PX30_GMAC_SPEED_10M);</div><div class='del'>-</div><div class='del'>-		ret = clk_set_rate(clk_mac_speed, 2500000);</div><div class='del'>-		if (ret)</div><div class='del'>-			dev_err(dev, "%s: set clk_mac_speed rate 2500000 failed: %d\n",</div><div class='del'>-				__func__, ret);</div><div class='add'>+		con1 = PX30_GMAC_SPEED_10M;</div><div class='add'>+		rate = 2500000;</div><div class='ctx'> 	} else if (speed == 100) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, PX30_GRF_GMAC_CON1,</div><div class='del'>-			     PX30_GMAC_SPEED_100M);</div><div class='del'>-</div><div class='del'>-		ret = clk_set_rate(clk_mac_speed, 25000000);</div><div class='del'>-		if (ret)</div><div class='del'>-			dev_err(dev, "%s: set clk_mac_speed rate 25000000 failed: %d\n",</div><div class='del'>-				__func__, ret);</div><div class='del'>-</div><div class='add'>+		con1 = PX30_GMAC_SPEED_100M;</div><div class='add'>+		rate = 25000000;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	regmap_write(bsp_priv-&gt;grf, PX30_GRF_GMAC_CON1, con1);</div><div class='add'>+</div><div class='add'>+	return clk_set_rate(clk_mac_speed, rate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops px30_ops = {</div><div class='ctx'> 	.set_to_rmii = px30_set_to_rmii,</div><div class='del'>-	.set_rmii_speed = px30_set_rmii_speed,</div><div class='add'>+	.set_speed = px30_set_speed,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RK3128_GRF_MAC_CON0	0x0168</div><div class='hunk'>@@ -158,38 +286,28 @@ static const struct rk_gmac_ops px30_ops = {</div><div class='ctx'> #define RK3128_GMAC_TXCLK_DLY_DISABLE  GRF_CLR_BIT(14)</div><div class='ctx'> #define RK3128_GMAC_RXCLK_DLY_ENABLE   GRF_BIT(15)</div><div class='ctx'> #define RK3128_GMAC_RXCLK_DLY_DISABLE  GRF_CLR_BIT(15)</div><div class='del'>-#define RK3128_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 7)</div><div class='del'>-#define RK3128_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RK3128_GMAC_CLK_RX_DL_CFG(val) GRF_FIELD(13, 7, val)</div><div class='add'>+#define RK3128_GMAC_CLK_TX_DL_CFG(val) GRF_FIELD(6, 0, val)</div><div class='ctx'> </div><div class='ctx'> /* RK3128_GRF_MAC_CON1 */</div><div class='del'>-#define RK3128_GMAC_PHY_INTF_SEL_RGMII	\</div><div class='del'>-		(GRF_BIT(6) | GRF_CLR_BIT(7) | GRF_CLR_BIT(8))</div><div class='del'>-#define RK3128_GMAC_PHY_INTF_SEL_RMII	\</div><div class='del'>-		(GRF_CLR_BIT(6) | GRF_CLR_BIT(7) | GRF_BIT(8))</div><div class='add'>+#define RK3128_GMAC_PHY_INTF_SEL(val)  GRF_FIELD(8, 6, val)</div><div class='ctx'> #define RK3128_GMAC_FLOW_CTRL          GRF_BIT(9)</div><div class='ctx'> #define RK3128_GMAC_FLOW_CTRL_CLR      GRF_CLR_BIT(9)</div><div class='ctx'> #define RK3128_GMAC_SPEED_10M          GRF_CLR_BIT(10)</div><div class='ctx'> #define RK3128_GMAC_SPEED_100M         GRF_BIT(10)</div><div class='ctx'> #define RK3128_GMAC_RMII_CLK_25M       GRF_BIT(11)</div><div class='ctx'> #define RK3128_GMAC_RMII_CLK_2_5M      GRF_CLR_BIT(11)</div><div class='del'>-#define RK3128_GMAC_CLK_125M           (GRF_CLR_BIT(12) | GRF_CLR_BIT(13))</div><div class='del'>-#define RK3128_GMAC_CLK_25M            (GRF_BIT(12) | GRF_BIT(13))</div><div class='del'>-#define RK3128_GMAC_CLK_2_5M           (GRF_CLR_BIT(12) | GRF_BIT(13))</div><div class='add'>+#define RK3128_GMAC_CLK_125M           GRF_FIELD_CONST(13, 12, 0)</div><div class='add'>+#define RK3128_GMAC_CLK_25M            GRF_FIELD_CONST(13, 12, 3)</div><div class='add'>+#define RK3128_GMAC_CLK_2_5M           GRF_FIELD_CONST(13, 12, 2)</div><div class='ctx'> #define RK3128_GMAC_RMII_MODE          GRF_BIT(14)</div><div class='ctx'> #define RK3128_GMAC_RMII_MODE_CLR      GRF_CLR_BIT(14)</div><div class='ctx'> </div><div class='ctx'> static void rk3128_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3128_GRF_MAC_CON1,</div><div class='del'>-		     RK3128_GMAC_PHY_INTF_SEL_RGMII |</div><div class='add'>+		     RK3128_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RGMII) |</div><div class='ctx'> 		     RK3128_GMAC_RMII_MODE_CLR);</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3128_GRF_MAC_CON0,</div><div class='ctx'> 		     DELAY_ENABLE(RK3128, tx_delay, rx_delay) |</div><div class='hunk'>@@ -199,66 +317,30 @@ static void rk3128_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> </div><div class='ctx'> static void rk3128_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3128_GRF_MAC_CON1,</div><div class='del'>-		     RK3128_GMAC_PHY_INTF_SEL_RMII | RK3128_GMAC_RMII_MODE);</div><div class='add'>+		     RK3128_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII) |</div><div class='add'>+		     RK3128_GMAC_RMII_MODE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3128_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3128_GRF_MAC_CON1,</div><div class='del'>-			     RK3128_GMAC_CLK_2_5M);</div><div class='del'>-	else if (speed == 100)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3128_GRF_MAC_CON1,</div><div class='del'>-			     RK3128_GMAC_CLK_25M);</div><div class='del'>-	else if (speed == 1000)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3128_GRF_MAC_CON1,</div><div class='del'>-			     RK3128_GMAC_CLK_125M);</div><div class='del'>-	else</div><div class='del'>-		dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);</div><div class='del'>-}</div><div class='add'>+static const struct rk_reg_speed_data rk3128_reg_speed_data = {</div><div class='add'>+	.rgmii_10 = RK3128_GMAC_CLK_2_5M,</div><div class='add'>+	.rgmii_100 = RK3128_GMAC_CLK_25M,</div><div class='add'>+	.rgmii_1000 = RK3128_GMAC_CLK_125M,</div><div class='add'>+	.rmii_10 = RK3128_GMAC_RMII_CLK_2_5M | RK3128_GMAC_SPEED_10M,</div><div class='add'>+	.rmii_100 = RK3128_GMAC_RMII_CLK_25M | RK3128_GMAC_SPEED_100M,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void rk3128_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='add'>+static int rk3128_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3128_GRF_MAC_CON1,</div><div class='del'>-			     RK3128_GMAC_RMII_CLK_2_5M |</div><div class='del'>-			     RK3128_GMAC_SPEED_10M);</div><div class='del'>-	} else if (speed == 100) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3128_GRF_MAC_CON1,</div><div class='del'>-			     RK3128_GMAC_RMII_CLK_25M |</div><div class='del'>-			     RK3128_GMAC_SPEED_100M);</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);</div><div class='del'>-	}</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rk3128_reg_speed_data,</div><div class='add'>+				RK3128_GRF_MAC_CON1, interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops rk3128_ops = {</div><div class='ctx'> 	.set_to_rgmii = rk3128_set_to_rgmii,</div><div class='ctx'> 	.set_to_rmii = rk3128_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rk3128_set_rgmii_speed,</div><div class='del'>-	.set_rmii_speed = rk3128_set_rmii_speed,</div><div class='add'>+	.set_speed = rk3128_set_speed,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RK3228_GRF_MAC_CON0	0x0900</div><div class='hunk'>@@ -267,23 +349,20 @@ static const struct rk_gmac_ops rk3128_ops = {</div><div class='ctx'> #define RK3228_GRF_CON_MUX	0x50</div><div class='ctx'> </div><div class='ctx'> /* RK3228_GRF_MAC_CON0 */</div><div class='del'>-#define RK3228_GMAC_CLK_RX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 7)</div><div class='del'>-#define RK3228_GMAC_CLK_TX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RK3228_GMAC_CLK_RX_DL_CFG(val)	GRF_FIELD(13, 7, val)</div><div class='add'>+#define RK3228_GMAC_CLK_TX_DL_CFG(val)	GRF_FIELD(6, 0, val)</div><div class='ctx'> </div><div class='ctx'> /* RK3228_GRF_MAC_CON1 */</div><div class='del'>-#define RK3228_GMAC_PHY_INTF_SEL_RGMII	\</div><div class='del'>-		(GRF_BIT(4) | GRF_CLR_BIT(5) | GRF_CLR_BIT(6))</div><div class='del'>-#define RK3228_GMAC_PHY_INTF_SEL_RMII	\</div><div class='del'>-		(GRF_CLR_BIT(4) | GRF_CLR_BIT(5) | GRF_BIT(6))</div><div class='add'>+#define RK3228_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(6, 4, val)</div><div class='ctx'> #define RK3228_GMAC_FLOW_CTRL		GRF_BIT(3)</div><div class='ctx'> #define RK3228_GMAC_FLOW_CTRL_CLR	GRF_CLR_BIT(3)</div><div class='ctx'> #define RK3228_GMAC_SPEED_10M		GRF_CLR_BIT(2)</div><div class='ctx'> #define RK3228_GMAC_SPEED_100M		GRF_BIT(2)</div><div class='ctx'> #define RK3228_GMAC_RMII_CLK_25M	GRF_BIT(7)</div><div class='ctx'> #define RK3228_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(7)</div><div class='del'>-#define RK3228_GMAC_CLK_125M		(GRF_CLR_BIT(8) | GRF_CLR_BIT(9))</div><div class='del'>-#define RK3228_GMAC_CLK_25M		(GRF_BIT(8) | GRF_BIT(9))</div><div class='del'>-#define RK3228_GMAC_CLK_2_5M		(GRF_CLR_BIT(8) | GRF_BIT(9))</div><div class='add'>+#define RK3228_GMAC_CLK_125M		GRF_FIELD_CONST(9, 8, 0)</div><div class='add'>+#define RK3228_GMAC_CLK_25M		GRF_FIELD_CONST(9, 8, 3)</div><div class='add'>+#define RK3228_GMAC_CLK_2_5M		GRF_FIELD_CONST(9, 8, 2)</div><div class='ctx'> #define RK3228_GMAC_RMII_MODE		GRF_BIT(10)</div><div class='ctx'> #define RK3228_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(10)</div><div class='ctx'> #define RK3228_GMAC_TXCLK_DLY_ENABLE	GRF_BIT(0)</div><div class='hunk'>@@ -297,15 +376,8 @@ static const struct rk_gmac_ops rk3128_ops = {</div><div class='ctx'> static void rk3228_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3228_GRF_MAC_CON1,</div><div class='del'>-		     RK3228_GMAC_PHY_INTF_SEL_RGMII |</div><div class='add'>+		     RK3228_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RGMII) |</div><div class='ctx'> 		     RK3228_GMAC_RMII_MODE_CLR |</div><div class='ctx'> 		     DELAY_ENABLE(RK3228, tx_delay, rx_delay));</div><div class='ctx'> </div><div class='hunk'>@@ -316,95 +388,59 @@ static void rk3228_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> </div><div class='ctx'> static void rk3228_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3228_GRF_MAC_CON1,</div><div class='del'>-		     RK3228_GMAC_PHY_INTF_SEL_RMII |</div><div class='add'>+		     RK3228_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII) |</div><div class='ctx'> 		     RK3228_GMAC_RMII_MODE);</div><div class='ctx'> </div><div class='ctx'> 	/* set MAC to RMII mode */</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3228_GRF_MAC_CON1, GRF_BIT(11));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3228_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3228_GRF_MAC_CON1,</div><div class='del'>-			     RK3228_GMAC_CLK_2_5M);</div><div class='del'>-	else if (speed == 100)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3228_GRF_MAC_CON1,</div><div class='del'>-			     RK3228_GMAC_CLK_25M);</div><div class='del'>-	else if (speed == 1000)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3228_GRF_MAC_CON1,</div><div class='del'>-			     RK3228_GMAC_CLK_125M);</div><div class='del'>-	else</div><div class='del'>-		dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);</div><div class='del'>-}</div><div class='add'>+static const struct rk_reg_speed_data rk3228_reg_speed_data = {</div><div class='add'>+	.rgmii_10 = RK3228_GMAC_CLK_2_5M,</div><div class='add'>+	.rgmii_100 = RK3228_GMAC_CLK_25M,</div><div class='add'>+	.rgmii_1000 = RK3228_GMAC_CLK_125M,</div><div class='add'>+	.rmii_10 = RK3228_GMAC_RMII_CLK_2_5M | RK3228_GMAC_SPEED_10M,</div><div class='add'>+	.rmii_100 = RK3228_GMAC_RMII_CLK_25M | RK3228_GMAC_SPEED_100M,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void rk3228_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='add'>+static int rk3228_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3228_GRF_MAC_CON1,</div><div class='del'>-			     RK3228_GMAC_RMII_CLK_2_5M |</div><div class='del'>-			     RK3228_GMAC_SPEED_10M);</div><div class='del'>-	else if (speed == 100)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3228_GRF_MAC_CON1,</div><div class='del'>-			     RK3228_GMAC_RMII_CLK_25M |</div><div class='del'>-			     RK3228_GMAC_SPEED_100M);</div><div class='del'>-	else</div><div class='del'>-		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rk3228_reg_speed_data,</div><div class='add'>+				RK3228_GRF_MAC_CON1, interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rk3228_integrated_phy_powerup(struct rk_priv_data *priv)</div><div class='ctx'> {</div><div class='ctx'> 	regmap_write(priv-&gt;grf, RK3228_GRF_CON_MUX,</div><div class='ctx'> 		     RK3228_GRF_CON_MUX_GMAC_INTEGRATED_PHY);</div><div class='add'>+</div><div class='add'>+	rk_gmac_integrated_ephy_powerup(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops rk3228_ops = {</div><div class='ctx'> 	.set_to_rgmii = rk3228_set_to_rgmii,</div><div class='ctx'> 	.set_to_rmii = rk3228_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rk3228_set_rgmii_speed,</div><div class='del'>-	.set_rmii_speed = rk3228_set_rmii_speed,</div><div class='del'>-	.integrated_phy_powerup =  rk3228_integrated_phy_powerup,</div><div class='add'>+	.set_speed = rk3228_set_speed,</div><div class='add'>+	.integrated_phy_powerup = rk3228_integrated_phy_powerup,</div><div class='add'>+	.integrated_phy_powerdown = rk_gmac_integrated_ephy_powerdown,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RK3288_GRF_SOC_CON1	0x0248</div><div class='ctx'> #define RK3288_GRF_SOC_CON3	0x0250</div><div class='ctx'> </div><div class='ctx'> /*RK3288_GRF_SOC_CON1*/</div><div class='del'>-#define RK3288_GMAC_PHY_INTF_SEL_RGMII	(GRF_BIT(6) | GRF_CLR_BIT(7) | \</div><div class='del'>-					 GRF_CLR_BIT(8))</div><div class='del'>-#define RK3288_GMAC_PHY_INTF_SEL_RMII	(GRF_CLR_BIT(6) | GRF_CLR_BIT(7) | \</div><div class='del'>-					 GRF_BIT(8))</div><div class='add'>+#define RK3288_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(8, 6, val)</div><div class='ctx'> #define RK3288_GMAC_FLOW_CTRL		GRF_BIT(9)</div><div class='ctx'> #define RK3288_GMAC_FLOW_CTRL_CLR	GRF_CLR_BIT(9)</div><div class='ctx'> #define RK3288_GMAC_SPEED_10M		GRF_CLR_BIT(10)</div><div class='ctx'> #define RK3288_GMAC_SPEED_100M		GRF_BIT(10)</div><div class='ctx'> #define RK3288_GMAC_RMII_CLK_25M	GRF_BIT(11)</div><div class='ctx'> #define RK3288_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(11)</div><div class='del'>-#define RK3288_GMAC_CLK_125M		(GRF_CLR_BIT(12) | GRF_CLR_BIT(13))</div><div class='del'>-#define RK3288_GMAC_CLK_25M		(GRF_BIT(12) | GRF_BIT(13))</div><div class='del'>-#define RK3288_GMAC_CLK_2_5M		(GRF_CLR_BIT(12) | GRF_BIT(13))</div><div class='add'>+#define RK3288_GMAC_CLK_125M		GRF_FIELD_CONST(13, 12, 0)</div><div class='add'>+#define RK3288_GMAC_CLK_25M		GRF_FIELD_CONST(13, 12, 3)</div><div class='add'>+#define RK3288_GMAC_CLK_2_5M		GRF_FIELD_CONST(13, 12, 2)</div><div class='ctx'> #define RK3288_GMAC_RMII_MODE		GRF_BIT(14)</div><div class='ctx'> #define RK3288_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(14)</div><div class='ctx'> </div><div class='hunk'>@@ -413,21 +449,14 @@ static const struct rk_gmac_ops rk3228_ops = {</div><div class='ctx'> #define RK3288_GMAC_TXCLK_DLY_DISABLE	GRF_CLR_BIT(14)</div><div class='ctx'> #define RK3288_GMAC_RXCLK_DLY_ENABLE	GRF_BIT(15)</div><div class='ctx'> #define RK3288_GMAC_RXCLK_DLY_DISABLE	GRF_CLR_BIT(15)</div><div class='del'>-#define RK3288_GMAC_CLK_RX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 7)</div><div class='del'>-#define RK3288_GMAC_CLK_TX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RK3288_GMAC_CLK_RX_DL_CFG(val)	GRF_FIELD(13, 7, val)</div><div class='add'>+#define RK3288_GMAC_CLK_TX_DL_CFG(val)	GRF_FIELD(6, 0, val)</div><div class='ctx'> </div><div class='ctx'> static void rk3288_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3288_GRF_SOC_CON1,</div><div class='del'>-		     RK3288_GMAC_PHY_INTF_SEL_RGMII |</div><div class='add'>+		     RK3288_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RGMII) |</div><div class='ctx'> 		     RK3288_GMAC_RMII_MODE_CLR);</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3288_GRF_SOC_CON3,</div><div class='ctx'> 		     DELAY_ENABLE(RK3288, tx_delay, rx_delay) |</div><div class='hunk'>@@ -437,73 +466,36 @@ static void rk3288_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> </div><div class='ctx'> static void rk3288_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3288_GRF_SOC_CON1,</div><div class='del'>-		     RK3288_GMAC_PHY_INTF_SEL_RMII | RK3288_GMAC_RMII_MODE);</div><div class='add'>+		     RK3288_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII) |</div><div class='add'>+		     RK3288_GMAC_RMII_MODE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3288_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3288_GRF_SOC_CON1,</div><div class='del'>-			     RK3288_GMAC_CLK_2_5M);</div><div class='del'>-	else if (speed == 100)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3288_GRF_SOC_CON1,</div><div class='del'>-			     RK3288_GMAC_CLK_25M);</div><div class='del'>-	else if (speed == 1000)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3288_GRF_SOC_CON1,</div><div class='del'>-			     RK3288_GMAC_CLK_125M);</div><div class='del'>-	else</div><div class='del'>-		dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);</div><div class='del'>-}</div><div class='add'>+static const struct rk_reg_speed_data rk3288_reg_speed_data = {</div><div class='add'>+	.rgmii_10 = RK3288_GMAC_CLK_2_5M,</div><div class='add'>+	.rgmii_100 = RK3288_GMAC_CLK_25M,</div><div class='add'>+	.rgmii_1000 = RK3288_GMAC_CLK_125M,</div><div class='add'>+	.rmii_10 = RK3288_GMAC_RMII_CLK_2_5M | RK3288_GMAC_SPEED_10M,</div><div class='add'>+	.rmii_100 = RK3288_GMAC_RMII_CLK_25M | RK3288_GMAC_SPEED_100M,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void rk3288_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='add'>+static int rk3288_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3288_GRF_SOC_CON1,</div><div class='del'>-			     RK3288_GMAC_RMII_CLK_2_5M |</div><div class='del'>-			     RK3288_GMAC_SPEED_10M);</div><div class='del'>-	} else if (speed == 100) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3288_GRF_SOC_CON1,</div><div class='del'>-			     RK3288_GMAC_RMII_CLK_25M |</div><div class='del'>-			     RK3288_GMAC_SPEED_100M);</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);</div><div class='del'>-	}</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rk3288_reg_speed_data,</div><div class='add'>+				RK3288_GRF_SOC_CON1, interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops rk3288_ops = {</div><div class='ctx'> 	.set_to_rgmii = rk3288_set_to_rgmii,</div><div class='ctx'> 	.set_to_rmii = rk3288_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rk3288_set_rgmii_speed,</div><div class='del'>-	.set_rmii_speed = rk3288_set_rmii_speed,</div><div class='add'>+	.set_speed = rk3288_set_speed,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RK3308_GRF_MAC_CON0		0x04a0</div><div class='ctx'> </div><div class='ctx'> /* RK3308_GRF_MAC_CON0 */</div><div class='del'>-#define RK3308_GMAC_PHY_INTF_SEL_RMII	(GRF_CLR_BIT(2) | GRF_CLR_BIT(3) | \</div><div class='del'>-					GRF_BIT(4))</div><div class='add'>+#define RK3308_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(4, 2, val)</div><div class='ctx'> #define RK3308_GMAC_FLOW_CTRL		GRF_BIT(3)</div><div class='ctx'> #define RK3308_GMAC_FLOW_CTRL_CLR	GRF_CLR_BIT(3)</div><div class='ctx'> #define RK3308_GMAC_SPEED_10M		GRF_CLR_BIT(0)</div><div class='hunk'>@@ -511,40 +503,25 @@ static const struct rk_gmac_ops rk3288_ops = {</div><div class='ctx'> </div><div class='ctx'> static void rk3308_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3308_GRF_MAC_CON0,</div><div class='del'>-		     RK3308_GMAC_PHY_INTF_SEL_RMII);</div><div class='add'>+		     RK3308_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3308_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+static const struct rk_reg_speed_data rk3308_reg_speed_data = {</div><div class='add'>+	.rmii_10 = RK3308_GMAC_SPEED_10M,</div><div class='add'>+	.rmii_100 = RK3308_GMAC_SPEED_100M,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	if (speed == 10) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3308_GRF_MAC_CON0,</div><div class='del'>-			     RK3308_GMAC_SPEED_10M);</div><div class='del'>-	} else if (speed == 100) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3308_GRF_MAC_CON0,</div><div class='del'>-			     RK3308_GMAC_SPEED_100M);</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);</div><div class='del'>-	}</div><div class='add'>+static int rk3308_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='add'>+{</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rk3308_reg_speed_data,</div><div class='add'>+				RK3308_GRF_MAC_CON0, interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops rk3308_ops = {</div><div class='ctx'> 	.set_to_rmii = rk3308_set_to_rmii,</div><div class='del'>-	.set_rmii_speed = rk3308_set_rmii_speed,</div><div class='add'>+	.set_speed = rk3308_set_speed,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RK3328_GRF_MAC_CON0	0x0900</div><div class='hunk'>@@ -553,29 +530,24 @@ static const struct rk_gmac_ops rk3308_ops = {</div><div class='ctx'> #define RK3328_GRF_MACPHY_CON1	0xb04</div><div class='ctx'> </div><div class='ctx'> /* RK3328_GRF_MAC_CON0 */</div><div class='del'>-#define RK3328_GMAC_CLK_RX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 7)</div><div class='del'>-#define RK3328_GMAC_CLK_TX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RK3328_GMAC_CLK_RX_DL_CFG(val)	GRF_FIELD(13, 7, val)</div><div class='add'>+#define RK3328_GMAC_CLK_TX_DL_CFG(val)	GRF_FIELD(6, 0, val)</div><div class='ctx'> </div><div class='ctx'> /* RK3328_GRF_MAC_CON1 */</div><div class='del'>-#define RK3328_GMAC_PHY_INTF_SEL_RGMII	\</div><div class='del'>-		(GRF_BIT(4) | GRF_CLR_BIT(5) | GRF_CLR_BIT(6))</div><div class='del'>-#define RK3328_GMAC_PHY_INTF_SEL_RMII	\</div><div class='del'>-		(GRF_CLR_BIT(4) | GRF_CLR_BIT(5) | GRF_BIT(6))</div><div class='add'>+#define RK3328_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(6, 4, val)</div><div class='ctx'> #define RK3328_GMAC_FLOW_CTRL		GRF_BIT(3)</div><div class='ctx'> #define RK3328_GMAC_FLOW_CTRL_CLR	GRF_CLR_BIT(3)</div><div class='ctx'> #define RK3328_GMAC_SPEED_10M		GRF_CLR_BIT(2)</div><div class='ctx'> #define RK3328_GMAC_SPEED_100M		GRF_BIT(2)</div><div class='ctx'> #define RK3328_GMAC_RMII_CLK_25M	GRF_BIT(7)</div><div class='ctx'> #define RK3328_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(7)</div><div class='del'>-#define RK3328_GMAC_CLK_125M		(GRF_CLR_BIT(11) | GRF_CLR_BIT(12))</div><div class='del'>-#define RK3328_GMAC_CLK_25M		(GRF_BIT(11) | GRF_BIT(12))</div><div class='del'>-#define RK3328_GMAC_CLK_2_5M		(GRF_CLR_BIT(11) | GRF_BIT(12))</div><div class='add'>+#define RK3328_GMAC_CLK_125M		GRF_FIELD_CONST(12, 11, 0)</div><div class='add'>+#define RK3328_GMAC_CLK_25M		GRF_FIELD_CONST(12, 11, 3)</div><div class='add'>+#define RK3328_GMAC_CLK_2_5M		GRF_FIELD_CONST(12, 11, 2)</div><div class='ctx'> #define RK3328_GMAC_RMII_MODE		GRF_BIT(9)</div><div class='ctx'> #define RK3328_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(9)</div><div class='ctx'> #define RK3328_GMAC_TXCLK_DLY_ENABLE	GRF_BIT(0)</div><div class='del'>-#define RK3328_GMAC_TXCLK_DLY_DISABLE	GRF_CLR_BIT(0)</div><div class='ctx'> #define RK3328_GMAC_RXCLK_DLY_ENABLE	GRF_BIT(1)</div><div class='del'>-#define RK3328_GMAC_RXCLK_DLY_DISABLE	GRF_CLR_BIT(0)</div><div class='ctx'> </div><div class='ctx'> /* RK3328_GRF_MACPHY_CON1 */</div><div class='ctx'> #define RK3328_MACPHY_RMII_MODE		GRF_BIT(9)</div><div class='hunk'>@@ -583,15 +555,8 @@ static const struct rk_gmac_ops rk3308_ops = {</div><div class='ctx'> static void rk3328_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3328_GRF_MAC_CON1,</div><div class='del'>-		     RK3328_GMAC_PHY_INTF_SEL_RGMII |</div><div class='add'>+		     RK3328_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RGMII) |</div><div class='ctx'> 		     RK3328_GMAC_RMII_MODE_CLR |</div><div class='ctx'> 		     RK3328_GMAC_RXCLK_DLY_ENABLE |</div><div class='ctx'> 		     RK3328_GMAC_TXCLK_DLY_ENABLE);</div><div class='hunk'>@@ -603,100 +568,68 @@ static void rk3328_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> </div><div class='ctx'> static void rk3328_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> 	unsigned int reg;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	reg = bsp_priv-&gt;integrated_phy ? RK3328_GRF_MAC_CON2 :</div><div class='ctx'> 		  RK3328_GRF_MAC_CON1;</div><div class='ctx'> </div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, reg,</div><div class='del'>-		     RK3328_GMAC_PHY_INTF_SEL_RMII |</div><div class='add'>+		     RK3328_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII) |</div><div class='ctx'> 		     RK3328_GMAC_RMII_MODE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3328_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3328_GRF_MAC_CON1,</div><div class='del'>-			     RK3328_GMAC_CLK_2_5M);</div><div class='del'>-	else if (speed == 100)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3328_GRF_MAC_CON1,</div><div class='del'>-			     RK3328_GMAC_CLK_25M);</div><div class='del'>-	else if (speed == 1000)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3328_GRF_MAC_CON1,</div><div class='del'>-			     RK3328_GMAC_CLK_125M);</div><div class='del'>-	else</div><div class='del'>-		dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);</div><div class='del'>-}</div><div class='add'>+static const struct rk_reg_speed_data rk3328_reg_speed_data = {</div><div class='add'>+	.rgmii_10 = RK3328_GMAC_CLK_2_5M,</div><div class='add'>+	.rgmii_100 = RK3328_GMAC_CLK_25M,</div><div class='add'>+	.rgmii_1000 = RK3328_GMAC_CLK_125M,</div><div class='add'>+	.rmii_10 = RK3328_GMAC_RMII_CLK_2_5M | RK3328_GMAC_SPEED_10M,</div><div class='add'>+	.rmii_100 = RK3328_GMAC_RMII_CLK_25M | RK3328_GMAC_SPEED_100M,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void rk3328_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='add'>+static int rk3328_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> 	unsigned int reg;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	reg = bsp_priv-&gt;integrated_phy ? RK3328_GRF_MAC_CON2 :</div><div class='del'>-		  RK3328_GRF_MAC_CON1;</div><div class='del'>-</div><div class='del'>-	if (speed == 10)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, reg,</div><div class='del'>-			     RK3328_GMAC_RMII_CLK_2_5M |</div><div class='del'>-			     RK3328_GMAC_SPEED_10M);</div><div class='del'>-	else if (speed == 100)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, reg,</div><div class='del'>-			     RK3328_GMAC_RMII_CLK_25M |</div><div class='del'>-			     RK3328_GMAC_SPEED_100M);</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_RMII &amp;&amp; bsp_priv-&gt;integrated_phy)</div><div class='add'>+		reg = RK3328_GRF_MAC_CON2;</div><div class='ctx'> 	else</div><div class='del'>-		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);</div><div class='add'>+		reg = RK3328_GRF_MAC_CON1;</div><div class='add'>+</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rk3328_reg_speed_data, reg,</div><div class='add'>+				interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rk3328_integrated_phy_powerup(struct rk_priv_data *priv)</div><div class='ctx'> {</div><div class='ctx'> 	regmap_write(priv-&gt;grf, RK3328_GRF_MACPHY_CON1,</div><div class='ctx'> 		     RK3328_MACPHY_RMII_MODE);</div><div class='add'>+</div><div class='add'>+	rk_gmac_integrated_ephy_powerup(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops rk3328_ops = {</div><div class='ctx'> 	.set_to_rgmii = rk3328_set_to_rgmii,</div><div class='ctx'> 	.set_to_rmii = rk3328_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rk3328_set_rgmii_speed,</div><div class='del'>-	.set_rmii_speed = rk3328_set_rmii_speed,</div><div class='del'>-	.integrated_phy_powerup =  rk3328_integrated_phy_powerup,</div><div class='add'>+	.set_speed = rk3328_set_speed,</div><div class='add'>+	.integrated_phy_powerup = rk3328_integrated_phy_powerup,</div><div class='add'>+	.integrated_phy_powerdown = rk_gmac_integrated_ephy_powerdown,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RK3366_GRF_SOC_CON6	0x0418</div><div class='ctx'> #define RK3366_GRF_SOC_CON7	0x041c</div><div class='ctx'> </div><div class='ctx'> /* RK3366_GRF_SOC_CON6 */</div><div class='del'>-#define RK3366_GMAC_PHY_INTF_SEL_RGMII	(GRF_BIT(9) | GRF_CLR_BIT(10) | \</div><div class='del'>-					 GRF_CLR_BIT(11))</div><div class='del'>-#define RK3366_GMAC_PHY_INTF_SEL_RMII	(GRF_CLR_BIT(9) | GRF_CLR_BIT(10) | \</div><div class='del'>-					 GRF_BIT(11))</div><div class='add'>+#define RK3366_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(11, 9, val)</div><div class='ctx'> #define RK3366_GMAC_FLOW_CTRL		GRF_BIT(8)</div><div class='ctx'> #define RK3366_GMAC_FLOW_CTRL_CLR	GRF_CLR_BIT(8)</div><div class='ctx'> #define RK3366_GMAC_SPEED_10M		GRF_CLR_BIT(7)</div><div class='ctx'> #define RK3366_GMAC_SPEED_100M		GRF_BIT(7)</div><div class='ctx'> #define RK3366_GMAC_RMII_CLK_25M	GRF_BIT(3)</div><div class='ctx'> #define RK3366_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(3)</div><div class='del'>-#define RK3366_GMAC_CLK_125M		(GRF_CLR_BIT(4) | GRF_CLR_BIT(5))</div><div class='del'>-#define RK3366_GMAC_CLK_25M		(GRF_BIT(4) | GRF_BIT(5))</div><div class='del'>-#define RK3366_GMAC_CLK_2_5M		(GRF_CLR_BIT(4) | GRF_BIT(5))</div><div class='add'>+#define RK3366_GMAC_CLK_125M		GRF_FIELD_CONST(5, 4, 0)</div><div class='add'>+#define RK3366_GMAC_CLK_25M		GRF_FIELD_CONST(5, 4, 3)</div><div class='add'>+#define RK3366_GMAC_CLK_2_5M		GRF_FIELD_CONST(5, 4, 2)</div><div class='ctx'> #define RK3366_GMAC_RMII_MODE		GRF_BIT(6)</div><div class='ctx'> #define RK3366_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(6)</div><div class='ctx'> </div><div class='hunk'>@@ -705,21 +638,14 @@ static const struct rk_gmac_ops rk3328_ops = {</div><div class='ctx'> #define RK3366_GMAC_TXCLK_DLY_DISABLE	GRF_CLR_BIT(7)</div><div class='ctx'> #define RK3366_GMAC_RXCLK_DLY_ENABLE	GRF_BIT(15)</div><div class='ctx'> #define RK3366_GMAC_RXCLK_DLY_DISABLE	GRF_CLR_BIT(15)</div><div class='del'>-#define RK3366_GMAC_CLK_RX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 8)</div><div class='del'>-#define RK3366_GMAC_CLK_TX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RK3366_GMAC_CLK_RX_DL_CFG(val)	GRF_FIELD(14, 8, val)</div><div class='add'>+#define RK3366_GMAC_CLK_TX_DL_CFG(val)	GRF_FIELD(6, 0, val)</div><div class='ctx'> </div><div class='ctx'> static void rk3366_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3366_GRF_SOC_CON6,</div><div class='del'>-		     RK3366_GMAC_PHY_INTF_SEL_RGMII |</div><div class='add'>+		     RK3366_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RGMII) |</div><div class='ctx'> 		     RK3366_GMAC_RMII_MODE_CLR);</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3366_GRF_SOC_CON7,</div><div class='ctx'> 		     DELAY_ENABLE(RK3366, tx_delay, rx_delay) |</div><div class='hunk'>@@ -729,85 +655,46 @@ static void rk3366_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> </div><div class='ctx'> static void rk3366_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3366_GRF_SOC_CON6,</div><div class='del'>-		     RK3366_GMAC_PHY_INTF_SEL_RMII | RK3366_GMAC_RMII_MODE);</div><div class='add'>+		     RK3366_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII) |</div><div class='add'>+		     RK3366_GMAC_RMII_MODE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3366_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3366_GRF_SOC_CON6,</div><div class='del'>-			     RK3366_GMAC_CLK_2_5M);</div><div class='del'>-	else if (speed == 100)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3366_GRF_SOC_CON6,</div><div class='del'>-			     RK3366_GMAC_CLK_25M);</div><div class='del'>-	else if (speed == 1000)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3366_GRF_SOC_CON6,</div><div class='del'>-			     RK3366_GMAC_CLK_125M);</div><div class='del'>-	else</div><div class='del'>-		dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);</div><div class='del'>-}</div><div class='add'>+static const struct rk_reg_speed_data rk3366_reg_speed_data = {</div><div class='add'>+	.rgmii_10 = RK3366_GMAC_CLK_2_5M,</div><div class='add'>+	.rgmii_100 = RK3366_GMAC_CLK_25M,</div><div class='add'>+	.rgmii_1000 = RK3366_GMAC_CLK_125M,</div><div class='add'>+	.rmii_10 = RK3366_GMAC_RMII_CLK_2_5M | RK3366_GMAC_SPEED_10M,</div><div class='add'>+	.rmii_100 = RK3366_GMAC_RMII_CLK_25M | RK3366_GMAC_SPEED_100M,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void rk3366_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='add'>+static int rk3366_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3366_GRF_SOC_CON6,</div><div class='del'>-			     RK3366_GMAC_RMII_CLK_2_5M |</div><div class='del'>-			     RK3366_GMAC_SPEED_10M);</div><div class='del'>-	} else if (speed == 100) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3366_GRF_SOC_CON6,</div><div class='del'>-			     RK3366_GMAC_RMII_CLK_25M |</div><div class='del'>-			     RK3366_GMAC_SPEED_100M);</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);</div><div class='del'>-	}</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rk3366_reg_speed_data,</div><div class='add'>+				RK3366_GRF_SOC_CON6, interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops rk3366_ops = {</div><div class='ctx'> 	.set_to_rgmii = rk3366_set_to_rgmii,</div><div class='ctx'> 	.set_to_rmii = rk3366_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rk3366_set_rgmii_speed,</div><div class='del'>-	.set_rmii_speed = rk3366_set_rmii_speed,</div><div class='add'>+	.set_speed = rk3366_set_speed,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RK3368_GRF_SOC_CON15	0x043c</div><div class='ctx'> #define RK3368_GRF_SOC_CON16	0x0440</div><div class='ctx'> </div><div class='ctx'> /* RK3368_GRF_SOC_CON15 */</div><div class='del'>-#define RK3368_GMAC_PHY_INTF_SEL_RGMII	(GRF_BIT(9) | GRF_CLR_BIT(10) | \</div><div class='del'>-					 GRF_CLR_BIT(11))</div><div class='del'>-#define RK3368_GMAC_PHY_INTF_SEL_RMII	(GRF_CLR_BIT(9) | GRF_CLR_BIT(10) | \</div><div class='del'>-					 GRF_BIT(11))</div><div class='add'>+#define RK3368_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(11, 9, val)</div><div class='ctx'> #define RK3368_GMAC_FLOW_CTRL		GRF_BIT(8)</div><div class='ctx'> #define RK3368_GMAC_FLOW_CTRL_CLR	GRF_CLR_BIT(8)</div><div class='ctx'> #define RK3368_GMAC_SPEED_10M		GRF_CLR_BIT(7)</div><div class='ctx'> #define RK3368_GMAC_SPEED_100M		GRF_BIT(7)</div><div class='ctx'> #define RK3368_GMAC_RMII_CLK_25M	GRF_BIT(3)</div><div class='ctx'> #define RK3368_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(3)</div><div class='del'>-#define RK3368_GMAC_CLK_125M		(GRF_CLR_BIT(4) | GRF_CLR_BIT(5))</div><div class='del'>-#define RK3368_GMAC_CLK_25M		(GRF_BIT(4) | GRF_BIT(5))</div><div class='del'>-#define RK3368_GMAC_CLK_2_5M		(GRF_CLR_BIT(4) | GRF_BIT(5))</div><div class='add'>+#define RK3368_GMAC_CLK_125M		GRF_FIELD_CONST(5, 4, 0)</div><div class='add'>+#define RK3368_GMAC_CLK_25M		GRF_FIELD_CONST(5, 4, 3)</div><div class='add'>+#define RK3368_GMAC_CLK_2_5M		GRF_FIELD_CONST(5, 4, 2)</div><div class='ctx'> #define RK3368_GMAC_RMII_MODE		GRF_BIT(6)</div><div class='ctx'> #define RK3368_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(6)</div><div class='ctx'> </div><div class='hunk'>@@ -816,21 +703,14 @@ static const struct rk_gmac_ops rk3366_ops = {</div><div class='ctx'> #define RK3368_GMAC_TXCLK_DLY_DISABLE	GRF_CLR_BIT(7)</div><div class='ctx'> #define RK3368_GMAC_RXCLK_DLY_ENABLE	GRF_BIT(15)</div><div class='ctx'> #define RK3368_GMAC_RXCLK_DLY_DISABLE	GRF_CLR_BIT(15)</div><div class='del'>-#define RK3368_GMAC_CLK_RX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 8)</div><div class='del'>-#define RK3368_GMAC_CLK_TX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RK3368_GMAC_CLK_RX_DL_CFG(val)	GRF_FIELD(14, 8, val)</div><div class='add'>+#define RK3368_GMAC_CLK_TX_DL_CFG(val)	GRF_FIELD(6, 0, val)</div><div class='ctx'> </div><div class='ctx'> static void rk3368_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3368_GRF_SOC_CON15,</div><div class='del'>-		     RK3368_GMAC_PHY_INTF_SEL_RGMII |</div><div class='add'>+		     RK3368_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RGMII) |</div><div class='ctx'> 		     RK3368_GMAC_RMII_MODE_CLR);</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3368_GRF_SOC_CON16,</div><div class='ctx'> 		     DELAY_ENABLE(RK3368, tx_delay, rx_delay) |</div><div class='hunk'>@@ -840,85 +720,46 @@ static void rk3368_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> </div><div class='ctx'> static void rk3368_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3368_GRF_SOC_CON15,</div><div class='del'>-		     RK3368_GMAC_PHY_INTF_SEL_RMII | RK3368_GMAC_RMII_MODE);</div><div class='add'>+		     RK3368_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII) |</div><div class='add'>+		     RK3368_GMAC_RMII_MODE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3368_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3368_GRF_SOC_CON15,</div><div class='del'>-			     RK3368_GMAC_CLK_2_5M);</div><div class='del'>-	else if (speed == 100)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3368_GRF_SOC_CON15,</div><div class='del'>-			     RK3368_GMAC_CLK_25M);</div><div class='del'>-	else if (speed == 1000)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3368_GRF_SOC_CON15,</div><div class='del'>-			     RK3368_GMAC_CLK_125M);</div><div class='del'>-	else</div><div class='del'>-		dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);</div><div class='del'>-}</div><div class='add'>+static const struct rk_reg_speed_data rk3368_reg_speed_data = {</div><div class='add'>+	.rgmii_10 = RK3368_GMAC_CLK_2_5M,</div><div class='add'>+	.rgmii_100 = RK3368_GMAC_CLK_25M,</div><div class='add'>+	.rgmii_1000 = RK3368_GMAC_CLK_125M,</div><div class='add'>+	.rmii_10 = RK3368_GMAC_RMII_CLK_2_5M | RK3368_GMAC_SPEED_10M,</div><div class='add'>+	.rmii_100 = RK3368_GMAC_RMII_CLK_25M | RK3368_GMAC_SPEED_100M,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static void rk3368_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='add'>+static int rk3368_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (speed == 10) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3368_GRF_SOC_CON15,</div><div class='del'>-			     RK3368_GMAC_RMII_CLK_2_5M |</div><div class='del'>-			     RK3368_GMAC_SPEED_10M);</div><div class='del'>-	} else if (speed == 100) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3368_GRF_SOC_CON15,</div><div class='del'>-			     RK3368_GMAC_RMII_CLK_25M |</div><div class='del'>-			     RK3368_GMAC_SPEED_100M);</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);</div><div class='del'>-	}</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rk3368_reg_speed_data,</div><div class='add'>+				RK3368_GRF_SOC_CON15, interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops rk3368_ops = {</div><div class='ctx'> 	.set_to_rgmii = rk3368_set_to_rgmii,</div><div class='ctx'> 	.set_to_rmii = rk3368_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rk3368_set_rgmii_speed,</div><div class='del'>-	.set_rmii_speed = rk3368_set_rmii_speed,</div><div class='add'>+	.set_speed = rk3368_set_speed,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RK3399_GRF_SOC_CON5	0xc214</div><div class='ctx'> #define RK3399_GRF_SOC_CON6	0xc218</div><div class='ctx'> </div><div class='ctx'> /* RK3399_GRF_SOC_CON5 */</div><div class='del'>-#define RK3399_GMAC_PHY_INTF_SEL_RGMII	(GRF_BIT(9) | GRF_CLR_BIT(10) | \</div><div class='del'>-					 GRF_CLR_BIT(11))</div><div class='del'>-#define RK3399_GMAC_PHY_INTF_SEL_RMII	(GRF_CLR_BIT(9) | GRF_CLR_BIT(10) | \</div><div class='del'>-					 GRF_BIT(11))</div><div class='add'>+#define RK3399_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(11, 9, val)</div><div class='ctx'> #define RK3399_GMAC_FLOW_CTRL		GRF_BIT(8)</div><div class='ctx'> #define RK3399_GMAC_FLOW_CTRL_CLR	GRF_CLR_BIT(8)</div><div class='ctx'> #define RK3399_GMAC_SPEED_10M		GRF_CLR_BIT(7)</div><div class='ctx'> #define RK3399_GMAC_SPEED_100M		GRF_BIT(7)</div><div class='ctx'> #define RK3399_GMAC_RMII_CLK_25M	GRF_BIT(3)</div><div class='ctx'> #define RK3399_GMAC_RMII_CLK_2_5M	GRF_CLR_BIT(3)</div><div class='del'>-#define RK3399_GMAC_CLK_125M		(GRF_CLR_BIT(4) | GRF_CLR_BIT(5))</div><div class='del'>-#define RK3399_GMAC_CLK_25M		(GRF_BIT(4) | GRF_BIT(5))</div><div class='del'>-#define RK3399_GMAC_CLK_2_5M		(GRF_CLR_BIT(4) | GRF_BIT(5))</div><div class='add'>+#define RK3399_GMAC_CLK_125M		GRF_FIELD_CONST(5, 4, 0)</div><div class='add'>+#define RK3399_GMAC_CLK_25M		GRF_FIELD_CONST(5, 4, 3)</div><div class='add'>+#define RK3399_GMAC_CLK_2_5M		GRF_FIELD_CONST(5, 4, 2)</div><div class='ctx'> #define RK3399_GMAC_RMII_MODE		GRF_BIT(6)</div><div class='ctx'> #define RK3399_GMAC_RMII_MODE_CLR	GRF_CLR_BIT(6)</div><div class='ctx'> </div><div class='hunk'>@@ -927,21 +768,14 @@ static const struct rk_gmac_ops rk3368_ops = {</div><div class='ctx'> #define RK3399_GMAC_TXCLK_DLY_DISABLE	GRF_CLR_BIT(7)</div><div class='ctx'> #define RK3399_GMAC_RXCLK_DLY_ENABLE	GRF_BIT(15)</div><div class='ctx'> #define RK3399_GMAC_RXCLK_DLY_DISABLE	GRF_CLR_BIT(15)</div><div class='del'>-#define RK3399_GMAC_CLK_RX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 8)</div><div class='del'>-#define RK3399_GMAC_CLK_TX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RK3399_GMAC_CLK_RX_DL_CFG(val)	GRF_FIELD(14, 8, val)</div><div class='add'>+#define RK3399_GMAC_CLK_TX_DL_CFG(val)	GRF_FIELD(6, 0, val)</div><div class='ctx'> </div><div class='ctx'> static void rk3399_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3399_GRF_SOC_CON5,</div><div class='del'>-		     RK3399_GMAC_PHY_INTF_SEL_RGMII |</div><div class='add'>+		     RK3399_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RGMII) |</div><div class='ctx'> 		     RK3399_GMAC_RMII_MODE_CLR);</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RK3399_GRF_SOC_CON6,</div><div class='ctx'> 		     DELAY_ENABLE(RK3399, tx_delay, rx_delay) |</div><div class='hunk'>@@ -951,66 +785,226 @@ static void rk3399_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> </div><div class='ctx'> static void rk3399_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='add'>+	regmap_write(bsp_priv-&gt;grf, RK3399_GRF_SOC_CON5,</div><div class='add'>+		     RK3399_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII) |</div><div class='add'>+		     RK3399_GMAC_RMII_MODE);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+static const struct rk_reg_speed_data rk3399_reg_speed_data = {</div><div class='add'>+	.rgmii_10 = RK3399_GMAC_CLK_2_5M,</div><div class='add'>+	.rgmii_100 = RK3399_GMAC_CLK_25M,</div><div class='add'>+	.rgmii_1000 = RK3399_GMAC_CLK_125M,</div><div class='add'>+	.rmii_10 = RK3399_GMAC_RMII_CLK_2_5M | RK3399_GMAC_SPEED_10M,</div><div class='add'>+	.rmii_100 = RK3399_GMAC_RMII_CLK_25M | RK3399_GMAC_SPEED_100M,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	regmap_write(bsp_priv-&gt;grf, RK3399_GRF_SOC_CON5,</div><div class='del'>-		     RK3399_GMAC_PHY_INTF_SEL_RMII | RK3399_GMAC_RMII_MODE);</div><div class='add'>+static int rk3399_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='add'>+{</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rk3399_reg_speed_data,</div><div class='add'>+				RK3399_GRF_SOC_CON5, interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3399_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='add'>+static const struct rk_gmac_ops rk3399_ops = {</div><div class='add'>+	.set_to_rgmii = rk3399_set_to_rgmii,</div><div class='add'>+	.set_to_rmii = rk3399_set_to_rmii,</div><div class='add'>+	.set_speed = rk3399_set_speed,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define RK3506_GRF_SOC_CON8		0x0020</div><div class='add'>+#define RK3506_GRF_SOC_CON11		0x002c</div><div class='add'>+</div><div class='add'>+#define RK3506_GMAC_RMII_MODE		GRF_BIT(1)</div><div class='add'>+</div><div class='add'>+#define RK3506_GMAC_CLK_RMII_DIV2	GRF_BIT(3)</div><div class='add'>+#define RK3506_GMAC_CLK_RMII_DIV20	GRF_CLR_BIT(3)</div><div class='add'>+</div><div class='add'>+#define RK3506_GMAC_CLK_SELECT_CRU	GRF_CLR_BIT(5)</div><div class='add'>+#define RK3506_GMAC_CLK_SELECT_IO	GRF_BIT(5)</div><div class='add'>+</div><div class='add'>+#define RK3506_GMAC_CLK_RMII_GATE	GRF_BIT(2)</div><div class='add'>+#define RK3506_GMAC_CLK_RMII_NOGATE	GRF_CLR_BIT(2)</div><div class='add'>+</div><div class='add'>+static void rk3506_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='add'>+	unsigned int id = bsp_priv-&gt;id, offset;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;</div><div class='add'>+	regmap_write(bsp_priv-&gt;grf, offset, RK3506_GMAC_RMII_MODE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct rk_reg_speed_data rk3506_reg_speed_data = {</div><div class='add'>+	.rmii_10 = RK3506_GMAC_CLK_RMII_DIV20,</div><div class='add'>+	.rmii_100 = RK3506_GMAC_CLK_RMII_DIV2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rk3506_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='add'>+{</div><div class='add'>+	unsigned int id = bsp_priv-&gt;id, offset;</div><div class='add'>+</div><div class='add'>+	offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rk3506_reg_speed_data,</div><div class='add'>+				offset, interface, speed);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rk3506_set_clock_selection(struct rk_priv_data *bsp_priv,</div><div class='add'>+				       bool input, bool enable)</div><div class='add'>+{</div><div class='add'>+	unsigned int value, offset, id = bsp_priv-&gt;id;</div><div class='ctx'> </div><div class='del'>-	if (speed == 10)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3399_GRF_SOC_CON5,</div><div class='del'>-			     RK3399_GMAC_CLK_2_5M);</div><div class='del'>-	else if (speed == 100)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3399_GRF_SOC_CON5,</div><div class='del'>-			     RK3399_GMAC_CLK_25M);</div><div class='del'>-	else if (speed == 1000)</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3399_GRF_SOC_CON5,</div><div class='del'>-			     RK3399_GMAC_CLK_125M);</div><div class='add'>+	offset = (id == 1) ? RK3506_GRF_SOC_CON11 : RK3506_GRF_SOC_CON8;</div><div class='add'>+</div><div class='add'>+	value = input ? RK3506_GMAC_CLK_SELECT_IO :</div><div class='add'>+			RK3506_GMAC_CLK_SELECT_CRU;</div><div class='add'>+	value |= enable ? RK3506_GMAC_CLK_RMII_NOGATE :</div><div class='add'>+			  RK3506_GMAC_CLK_RMII_GATE;</div><div class='add'>+	regmap_write(bsp_priv-&gt;grf, offset, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct rk_gmac_ops rk3506_ops = {</div><div class='add'>+	.set_to_rmii = rk3506_set_to_rmii,</div><div class='add'>+	.set_speed = rk3506_set_speed,</div><div class='add'>+	.set_clock_selection = rk3506_set_clock_selection,</div><div class='add'>+	.regs_valid = true,</div><div class='add'>+	.regs = {</div><div class='add'>+		0xff4c8000, /* gmac0 */</div><div class='add'>+		0xff4d0000, /* gmac1 */</div><div class='add'>+		0x0, /* sentinel */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define RK3528_VO_GRF_GMAC_CON		0x0018</div><div class='add'>+#define RK3528_VO_GRF_MACPHY_CON0	0x001c</div><div class='add'>+#define RK3528_VO_GRF_MACPHY_CON1	0x0020</div><div class='add'>+#define RK3528_VPU_GRF_GMAC_CON5	0x0018</div><div class='add'>+#define RK3528_VPU_GRF_GMAC_CON6	0x001c</div><div class='add'>+</div><div class='add'>+#define RK3528_GMAC_RXCLK_DLY_ENABLE	GRF_BIT(15)</div><div class='add'>+#define RK3528_GMAC_RXCLK_DLY_DISABLE	GRF_CLR_BIT(15)</div><div class='add'>+#define RK3528_GMAC_TXCLK_DLY_ENABLE	GRF_BIT(14)</div><div class='add'>+#define RK3528_GMAC_TXCLK_DLY_DISABLE	GRF_CLR_BIT(14)</div><div class='add'>+</div><div class='add'>+#define RK3528_GMAC_CLK_RX_DL_CFG(val)	GRF_FIELD(15, 8, val)</div><div class='add'>+#define RK3528_GMAC_CLK_TX_DL_CFG(val)	GRF_FIELD(7, 0, val)</div><div class='add'>+</div><div class='add'>+#define RK3528_GMAC0_PHY_INTF_SEL_RMII	GRF_BIT(1)</div><div class='add'>+#define RK3528_GMAC1_PHY_INTF_SEL_RGMII	GRF_CLR_BIT(8)</div><div class='add'>+#define RK3528_GMAC1_PHY_INTF_SEL_RMII	GRF_BIT(8)</div><div class='add'>+</div><div class='add'>+#define RK3528_GMAC1_CLK_SELECT_CRU	GRF_CLR_BIT(12)</div><div class='add'>+#define RK3528_GMAC1_CLK_SELECT_IO	GRF_BIT(12)</div><div class='add'>+</div><div class='add'>+#define RK3528_GMAC0_CLK_RMII_DIV2	GRF_BIT(3)</div><div class='add'>+#define RK3528_GMAC0_CLK_RMII_DIV20	GRF_CLR_BIT(3)</div><div class='add'>+#define RK3528_GMAC1_CLK_RMII_DIV2	GRF_BIT(10)</div><div class='add'>+#define RK3528_GMAC1_CLK_RMII_DIV20	GRF_CLR_BIT(10)</div><div class='add'>+</div><div class='add'>+#define RK3528_GMAC1_CLK_RGMII_DIV1	GRF_FIELD_CONST(11, 10, 0)</div><div class='add'>+#define RK3528_GMAC1_CLK_RGMII_DIV5	GRF_FIELD_CONST(11, 10, 3)</div><div class='add'>+#define RK3528_GMAC1_CLK_RGMII_DIV50	GRF_FIELD_CONST(11, 10, 2)</div><div class='add'>+</div><div class='add'>+#define RK3528_GMAC0_CLK_RMII_GATE	GRF_BIT(2)</div><div class='add'>+#define RK3528_GMAC0_CLK_RMII_NOGATE	GRF_CLR_BIT(2)</div><div class='add'>+#define RK3528_GMAC1_CLK_RMII_GATE	GRF_BIT(9)</div><div class='add'>+#define RK3528_GMAC1_CLK_RMII_NOGATE	GRF_CLR_BIT(9)</div><div class='add'>+</div><div class='add'>+static void rk3528_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='add'>+				int tx_delay, int rx_delay)</div><div class='add'>+{</div><div class='add'>+	regmap_write(bsp_priv-&gt;grf, RK3528_VPU_GRF_GMAC_CON5,</div><div class='add'>+		     RK3528_GMAC1_PHY_INTF_SEL_RGMII);</div><div class='add'>+</div><div class='add'>+	regmap_write(bsp_priv-&gt;grf, RK3528_VPU_GRF_GMAC_CON5,</div><div class='add'>+		     DELAY_ENABLE(RK3528, tx_delay, rx_delay));</div><div class='add'>+</div><div class='add'>+	regmap_write(bsp_priv-&gt;grf, RK3528_VPU_GRF_GMAC_CON6,</div><div class='add'>+		     RK3528_GMAC_CLK_RX_DL_CFG(rx_delay) |</div><div class='add'>+		     RK3528_GMAC_CLK_TX_DL_CFG(tx_delay));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rk3528_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	if (bsp_priv-&gt;id == 1)</div><div class='add'>+		regmap_write(bsp_priv-&gt;grf, RK3528_VPU_GRF_GMAC_CON5,</div><div class='add'>+			     RK3528_GMAC1_PHY_INTF_SEL_RMII);</div><div class='ctx'> 	else</div><div class='del'>-		dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);</div><div class='add'>+		regmap_write(bsp_priv-&gt;grf, RK3528_VO_GRF_GMAC_CON,</div><div class='add'>+			     RK3528_GMAC0_PHY_INTF_SEL_RMII |</div><div class='add'>+			     RK3528_GMAC0_CLK_RMII_DIV2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3399_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='add'>+static const struct rk_reg_speed_data rk3528_gmac0_reg_speed_data = {</div><div class='add'>+	.rmii_10 = RK3528_GMAC0_CLK_RMII_DIV20,</div><div class='add'>+	.rmii_100 = RK3528_GMAC0_CLK_RMII_DIV2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rk_reg_speed_data rk3528_gmac1_reg_speed_data = {</div><div class='add'>+	.rgmii_10 = RK3528_GMAC1_CLK_RGMII_DIV50,</div><div class='add'>+	.rgmii_100 = RK3528_GMAC1_CLK_RGMII_DIV5,</div><div class='add'>+	.rgmii_1000 = RK3528_GMAC1_CLK_RGMII_DIV1,</div><div class='add'>+	.rmii_10 = RK3528_GMAC1_CLK_RMII_DIV20,</div><div class='add'>+	.rmii_100 = RK3528_GMAC1_CLK_RMII_DIV2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rk3528_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='add'>+	const struct rk_reg_speed_data *rsd;</div><div class='add'>+	unsigned int reg;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='add'>+	if (bsp_priv-&gt;id == 1) {</div><div class='add'>+		rsd = &amp;rk3528_gmac1_reg_speed_data;</div><div class='add'>+		reg = RK3528_VPU_GRF_GMAC_CON5;</div><div class='add'>+	} else {</div><div class='add'>+		rsd = &amp;rk3528_gmac0_reg_speed_data;</div><div class='add'>+		reg = RK3528_VO_GRF_GMAC_CON;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (speed == 10) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3399_GRF_SOC_CON5,</div><div class='del'>-			     RK3399_GMAC_RMII_CLK_2_5M |</div><div class='del'>-			     RK3399_GMAC_SPEED_10M);</div><div class='del'>-	} else if (speed == 100) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RK3399_GRF_SOC_CON5,</div><div class='del'>-			     RK3399_GMAC_RMII_CLK_25M |</div><div class='del'>-			     RK3399_GMAC_SPEED_100M);</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, rsd, reg, interface, speed);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rk3528_set_clock_selection(struct rk_priv_data *bsp_priv,</div><div class='add'>+				       bool input, bool enable)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	if (bsp_priv-&gt;id == 1) {</div><div class='add'>+		val = input ? RK3528_GMAC1_CLK_SELECT_IO :</div><div class='add'>+			      RK3528_GMAC1_CLK_SELECT_CRU;</div><div class='add'>+		val |= enable ? RK3528_GMAC1_CLK_RMII_NOGATE :</div><div class='add'>+				RK3528_GMAC1_CLK_RMII_GATE;</div><div class='add'>+		regmap_write(bsp_priv-&gt;grf, RK3528_VPU_GRF_GMAC_CON5, val);</div><div class='ctx'> 	} else {</div><div class='del'>-		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);</div><div class='add'>+		val = enable ? RK3528_GMAC0_CLK_RMII_NOGATE :</div><div class='add'>+			       RK3528_GMAC0_CLK_RMII_GATE;</div><div class='add'>+		regmap_write(bsp_priv-&gt;grf, RK3528_VO_GRF_GMAC_CON, val);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct rk_gmac_ops rk3399_ops = {</div><div class='del'>-	.set_to_rgmii = rk3399_set_to_rgmii,</div><div class='del'>-	.set_to_rmii = rk3399_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rk3399_set_rgmii_speed,</div><div class='del'>-	.set_rmii_speed = rk3399_set_rmii_speed,</div><div class='add'>+static void rk3528_integrated_phy_powerup(struct rk_priv_data *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	rk_gmac_integrated_fephy_powerup(bsp_priv, RK3528_VO_GRF_MACPHY_CON0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rk3528_integrated_phy_powerdown(struct rk_priv_data *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	rk_gmac_integrated_fephy_powerdown(bsp_priv, RK3528_VO_GRF_MACPHY_CON0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct rk_gmac_ops rk3528_ops = {</div><div class='add'>+	.set_to_rgmii = rk3528_set_to_rgmii,</div><div class='add'>+	.set_to_rmii = rk3528_set_to_rmii,</div><div class='add'>+	.set_speed = rk3528_set_speed,</div><div class='add'>+	.set_clock_selection = rk3528_set_clock_selection,</div><div class='add'>+	.integrated_phy_powerup = rk3528_integrated_phy_powerup,</div><div class='add'>+	.integrated_phy_powerdown = rk3528_integrated_phy_powerdown,</div><div class='add'>+	.regs_valid = true,</div><div class='add'>+	.regs = {</div><div class='add'>+		0xffbd0000, /* gmac0 */</div><div class='add'>+		0xffbe0000, /* gmac1 */</div><div class='add'>+		0x0, /* sentinel */</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RK3568_GRF_GMAC0_CON0		0x0380</div><div class='hunk'>@@ -1019,10 +1013,7 @@ static const struct rk_gmac_ops rk3399_ops = {</div><div class='ctx'> #define RK3568_GRF_GMAC1_CON1		0x038c</div><div class='ctx'> </div><div class='ctx'> /* RK3568_GRF_GMAC0_CON1 &amp;&amp; RK3568_GRF_GMAC1_CON1 */</div><div class='del'>-#define RK3568_GMAC_PHY_INTF_SEL_RGMII	\</div><div class='del'>-		(GRF_BIT(4) | GRF_CLR_BIT(5) | GRF_CLR_BIT(6))</div><div class='del'>-#define RK3568_GMAC_PHY_INTF_SEL_RMII	\</div><div class='del'>-		(GRF_CLR_BIT(4) | GRF_CLR_BIT(5) | GRF_BIT(6))</div><div class='add'>+#define RK3568_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(6, 4, val)</div><div class='ctx'> #define RK3568_GMAC_FLOW_CTRL			GRF_BIT(3)</div><div class='ctx'> #define RK3568_GMAC_FLOW_CTRL_CLR		GRF_CLR_BIT(3)</div><div class='ctx'> #define RK3568_GMAC_RXCLK_DLY_ENABLE		GRF_BIT(1)</div><div class='hunk'>@@ -1031,20 +1022,14 @@ static const struct rk_gmac_ops rk3399_ops = {</div><div class='ctx'> #define RK3568_GMAC_TXCLK_DLY_DISABLE		GRF_CLR_BIT(0)</div><div class='ctx'> </div><div class='ctx'> /* RK3568_GRF_GMAC0_CON0 &amp;&amp; RK3568_GRF_GMAC1_CON0 */</div><div class='del'>-#define RK3568_GMAC_CLK_RX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 8)</div><div class='del'>-#define RK3568_GMAC_CLK_TX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RK3568_GMAC_CLK_RX_DL_CFG(val)	GRF_FIELD(14, 8, val)</div><div class='add'>+#define RK3568_GMAC_CLK_TX_DL_CFG(val)	GRF_FIELD(6, 0, val)</div><div class='ctx'> </div><div class='ctx'> static void rk3568_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> 	u32 con0, con1;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	con0 = (bsp_priv-&gt;id == 1) ? RK3568_GRF_GMAC1_CON0 :</div><div class='ctx'> 				     RK3568_GRF_GMAC0_CON0;</div><div class='ctx'> 	con1 = (bsp_priv-&gt;id == 1) ? RK3568_GRF_GMAC1_CON1 :</div><div class='hunk'>@@ -1055,59 +1040,25 @@ static void rk3568_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 		     RK3568_GMAC_CLK_TX_DL_CFG(tx_delay));</div><div class='ctx'> </div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, con1,</div><div class='del'>-		     RK3568_GMAC_PHY_INTF_SEL_RGMII |</div><div class='add'>+		     RK3568_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RGMII) |</div><div class='ctx'> 		     RK3568_GMAC_RXCLK_DLY_ENABLE |</div><div class='ctx'> 		     RK3568_GMAC_TXCLK_DLY_ENABLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rk3568_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> 	u32 con1;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	con1 = (bsp_priv-&gt;id == 1) ? RK3568_GRF_GMAC1_CON1 :</div><div class='ctx'> 				     RK3568_GRF_GMAC0_CON1;</div><div class='del'>-	regmap_write(bsp_priv-&gt;grf, con1, RK3568_GMAC_PHY_INTF_SEL_RMII);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rk3568_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk_mac_speed = bsp_priv-&gt;clks[RK_CLK_MAC_SPEED].clk;</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	switch (speed) {</div><div class='del'>-	case 10:</div><div class='del'>-		rate = 2500000;</div><div class='del'>-		break;</div><div class='del'>-	case 100:</div><div class='del'>-		rate = 25000000;</div><div class='del'>-		break;</div><div class='del'>-	case 1000:</div><div class='del'>-		rate = 125000000;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dev, "unknown speed value for GMAC speed=%d", speed);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = clk_set_rate(clk_mac_speed, rate);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_err(dev, "%s: set clk_mac_speed rate %ld failed %d\n",</div><div class='del'>-			__func__, rate, ret);</div><div class='add'>+	regmap_write(bsp_priv-&gt;grf, con1,</div><div class='add'>+		     RK3568_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops rk3568_ops = {</div><div class='ctx'> 	.set_to_rgmii = rk3568_set_to_rgmii,</div><div class='ctx'> 	.set_to_rmii = rk3568_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rk3568_set_gmac_speed,</div><div class='del'>-	.set_rmii_speed = rk3568_set_gmac_speed,</div><div class='add'>+	.set_speed = rk_set_clk_mac_speed,</div><div class='ctx'> 	.regs_valid = true,</div><div class='ctx'> 	.regs = {</div><div class='ctx'> 		0xfe2a0000, /* gmac0 */</div><div class='hunk'>@@ -1127,8 +1078,8 @@ static const struct rk_gmac_ops rk3568_ops = {</div><div class='ctx'> #define RK3576_GMAC_TXCLK_DLY_ENABLE		GRF_BIT(7)</div><div class='ctx'> #define RK3576_GMAC_TXCLK_DLY_DISABLE		GRF_CLR_BIT(7)</div><div class='ctx'> </div><div class='del'>-#define RK3576_GMAC_CLK_RX_DL_CFG(val)		HIWORD_UPDATE(val, 0x7F, 8)</div><div class='del'>-#define RK3576_GMAC_CLK_TX_DL_CFG(val)		HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RK3576_GMAC_CLK_RX_DL_CFG(val)		GRF_FIELD(14, 8, val)</div><div class='add'>+#define RK3576_GMAC_CLK_TX_DL_CFG(val)		GRF_FIELD(6, 0, val)</div><div class='ctx'> </div><div class='ctx'> /* SDGMAC_GRF */</div><div class='ctx'> #define RK3576_GRF_GMAC_CON0			0X0020</div><div class='hunk'>@@ -1143,12 +1094,9 @@ static const struct rk_gmac_ops rk3568_ops = {</div><div class='ctx'> #define RK3576_GMAC_CLK_RMII_DIV2		GRF_BIT(5)</div><div class='ctx'> #define RK3576_GMAC_CLK_RMII_DIV20		GRF_CLR_BIT(5)</div><div class='ctx'> </div><div class='del'>-#define RK3576_GMAC_CLK_RGMII_DIV1		\</div><div class='del'>-			(GRF_CLR_BIT(6) | GRF_CLR_BIT(5))</div><div class='del'>-#define RK3576_GMAC_CLK_RGMII_DIV5		\</div><div class='del'>-			(GRF_BIT(6) | GRF_BIT(5))</div><div class='del'>-#define RK3576_GMAC_CLK_RGMII_DIV50		\</div><div class='del'>-			(GRF_BIT(6) | GRF_CLR_BIT(5))</div><div class='add'>+#define RK3576_GMAC_CLK_RGMII_DIV1		GRF_FIELD_CONST(6, 5, 0)</div><div class='add'>+#define RK3576_GMAC_CLK_RGMII_DIV5		GRF_FIELD_CONST(6, 5, 3)</div><div class='add'>+#define RK3576_GMAC_CLK_RGMII_DIV50		GRF_FIELD_CONST(6, 5, 2)</div><div class='ctx'> </div><div class='ctx'> #define RK3576_GMAC_CLK_RMII_GATE		GRF_BIT(4)</div><div class='ctx'> #define RK3576_GMAC_CLK_RMII_NOGATE		GRF_CLR_BIT(4)</div><div class='hunk'>@@ -1156,14 +1104,8 @@ static const struct rk_gmac_ops rk3568_ops = {</div><div class='ctx'> static void rk3576_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> 	unsigned int offset_con;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf) || IS_ERR(bsp_priv-&gt;php_grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf or rockchip,php-grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	offset_con = bsp_priv-&gt;id == 1 ? RK3576_GRF_GMAC_CON1 :</div><div class='ctx'> 					 RK3576_GRF_GMAC_CON0;</div><div class='ctx'> </div><div class='hunk'>@@ -1189,56 +1131,32 @@ static void rk3576_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> </div><div class='ctx'> static void rk3576_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> 	unsigned int offset_con;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	offset_con = bsp_priv-&gt;id == 1 ? RK3576_GRF_GMAC_CON1 :</div><div class='ctx'> 					 RK3576_GRF_GMAC_CON0;</div><div class='ctx'> </div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, offset_con, RK3576_GMAC_RMII_MODE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3576_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-	unsigned int val = 0, offset_con;</div><div class='add'>+static const struct rk_reg_speed_data rk3578_reg_speed_data = {</div><div class='add'>+	.rgmii_10 = RK3576_GMAC_CLK_RGMII_DIV50,</div><div class='add'>+	.rgmii_100 = RK3576_GMAC_CLK_RGMII_DIV5,</div><div class='add'>+	.rgmii_1000 = RK3576_GMAC_CLK_RGMII_DIV1,</div><div class='add'>+	.rmii_10 = RK3576_GMAC_CLK_RMII_DIV20,</div><div class='add'>+	.rmii_100 = RK3576_GMAC_CLK_RMII_DIV2,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	switch (speed) {</div><div class='del'>-	case 10:</div><div class='del'>-		if (bsp_priv-&gt;phy_iface == PHY_INTERFACE_MODE_RMII)</div><div class='del'>-			val = RK3576_GMAC_CLK_RMII_DIV20;</div><div class='del'>-		else</div><div class='del'>-			val = RK3576_GMAC_CLK_RGMII_DIV50;</div><div class='del'>-		break;</div><div class='del'>-	case 100:</div><div class='del'>-		if (bsp_priv-&gt;phy_iface == PHY_INTERFACE_MODE_RMII)</div><div class='del'>-			val = RK3576_GMAC_CLK_RMII_DIV2;</div><div class='del'>-		else</div><div class='del'>-			val = RK3576_GMAC_CLK_RGMII_DIV5;</div><div class='del'>-		break;</div><div class='del'>-	case 1000:</div><div class='del'>-		if (bsp_priv-&gt;phy_iface != PHY_INTERFACE_MODE_RMII)</div><div class='del'>-			val = RK3576_GMAC_CLK_RGMII_DIV1;</div><div class='del'>-		else</div><div class='del'>-			goto err;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='add'>+static int rk3576_set_gmac_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+				 phy_interface_t interface, int speed)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset_con;</div><div class='ctx'> </div><div class='ctx'> 	offset_con = bsp_priv-&gt;id == 1 ? RK3576_GRF_GMAC_CON1 :</div><div class='ctx'> 					 RK3576_GRF_GMAC_CON0;</div><div class='ctx'> </div><div class='del'>-	regmap_write(bsp_priv-&gt;grf, offset_con, val);</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-err:</div><div class='del'>-	dev_err(dev, "unknown speed value for GMAC speed=%d", speed);</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rk3578_reg_speed_data, offset_con,</div><div class='add'>+				interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rk3576_set_clock_selection(struct rk_priv_data *bsp_priv, bool input,</div><div class='hunk'>@@ -1260,9 +1178,9 @@ static void rk3576_set_clock_selection(struct rk_priv_data *bsp_priv, bool input</div><div class='ctx'> static const struct rk_gmac_ops rk3576_ops = {</div><div class='ctx'> 	.set_to_rgmii = rk3576_set_to_rgmii,</div><div class='ctx'> 	.set_to_rmii = rk3576_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rk3576_set_gmac_speed,</div><div class='del'>-	.set_rmii_speed = rk3576_set_gmac_speed,</div><div class='add'>+	.set_speed = rk3576_set_gmac_speed,</div><div class='ctx'> 	.set_clock_selection = rk3576_set_clock_selection,</div><div class='add'>+	.php_grf_required = true,</div><div class='ctx'> 	.regs_valid = true,</div><div class='ctx'> 	.regs = {</div><div class='ctx'> 		0x2a220000, /* gmac0 */</div><div class='hunk'>@@ -1281,17 +1199,15 @@ static const struct rk_gmac_ops rk3576_ops = {</div><div class='ctx'> #define RK3588_GMAC_TXCLK_DLY_ENABLE(id)	GRF_BIT(2 * (id) + 2)</div><div class='ctx'> #define RK3588_GMAC_TXCLK_DLY_DISABLE(id)	GRF_CLR_BIT(2 * (id) + 2)</div><div class='ctx'> </div><div class='del'>-#define RK3588_GMAC_CLK_RX_DL_CFG(val)		HIWORD_UPDATE(val, 0xFF, 8)</div><div class='del'>-#define RK3588_GMAC_CLK_TX_DL_CFG(val)		HIWORD_UPDATE(val, 0xFF, 0)</div><div class='add'>+#define RK3588_GMAC_CLK_RX_DL_CFG(val)		GRF_FIELD(15, 8, val)</div><div class='add'>+#define RK3588_GMAC_CLK_TX_DL_CFG(val)		GRF_FIELD(7, 0, val)</div><div class='ctx'> </div><div class='ctx'> /* php_grf */</div><div class='ctx'> #define RK3588_GRF_GMAC_CON0			0X0008</div><div class='ctx'> #define RK3588_GRF_CLK_CON1			0X0070</div><div class='ctx'> </div><div class='del'>-#define RK3588_GMAC_PHY_INTF_SEL_RGMII(id)	\</div><div class='del'>-	(GRF_BIT(3 + (id) * 6) | GRF_CLR_BIT(4 + (id) * 6) | GRF_CLR_BIT(5 + (id) * 6))</div><div class='del'>-#define RK3588_GMAC_PHY_INTF_SEL_RMII(id)	\</div><div class='del'>-	(GRF_CLR_BIT(3 + (id) * 6) | GRF_CLR_BIT(4 + (id) * 6) | GRF_BIT(5 + (id) * 6))</div><div class='add'>+#define RK3588_GMAC_PHY_INTF_SEL(id, val)	\</div><div class='add'>+	(GRF_FIELD(5, 3, val) &lt;&lt; ((id) * 6))</div><div class='ctx'> </div><div class='ctx'> #define RK3588_GMAC_CLK_RMII_MODE(id)		GRF_BIT(5 * (id))</div><div class='ctx'> #define RK3588_GMAC_CLK_RGMII_MODE(id)		GRF_CLR_BIT(5 * (id))</div><div class='hunk'>@@ -1303,11 +1219,11 @@ static const struct rk_gmac_ops rk3576_ops = {</div><div class='ctx'> #define RK3588_GMA_CLK_RMII_DIV20(id)		GRF_CLR_BIT(5 * (id) + 2)</div><div class='ctx'> </div><div class='ctx'> #define RK3588_GMAC_CLK_RGMII_DIV1(id)		\</div><div class='del'>-			(GRF_CLR_BIT(5 * (id) + 2) | GRF_CLR_BIT(5 * (id) + 3))</div><div class='add'>+	(GRF_FIELD_CONST(3, 2, 0) &lt;&lt; ((id) * 5))</div><div class='ctx'> #define RK3588_GMAC_CLK_RGMII_DIV5(id)		\</div><div class='del'>-			(GRF_BIT(5 * (id) + 2) | GRF_BIT(5 * (id) + 3))</div><div class='add'>+	(GRF_FIELD_CONST(3, 2, 3) &lt;&lt; ((id) * 5))</div><div class='ctx'> #define RK3588_GMAC_CLK_RGMII_DIV50(id)		\</div><div class='del'>-			(GRF_CLR_BIT(5 * (id) + 2) | GRF_BIT(5 * (id) + 3))</div><div class='add'>+	(GRF_FIELD_CONST(3, 2, 2) &lt;&lt; ((id) * 5))</div><div class='ctx'> </div><div class='ctx'> #define RK3588_GMAC_CLK_RMII_GATE(id)		GRF_BIT(5 * (id) + 1)</div><div class='ctx'> #define RK3588_GMAC_CLK_RMII_NOGATE(id)		GRF_CLR_BIT(5 * (id) + 1)</div><div class='hunk'>@@ -1315,19 +1231,13 @@ static const struct rk_gmac_ops rk3576_ops = {</div><div class='ctx'> static void rk3588_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> 	u32 offset_con, id = bsp_priv-&gt;id;</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf) || IS_ERR(bsp_priv-&gt;php_grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf or rockchip,php_grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	offset_con = bsp_priv-&gt;id == 1 ? RK3588_GRF_GMAC_CON9 :</div><div class='ctx'> 					 RK3588_GRF_GMAC_CON8;</div><div class='ctx'> </div><div class='ctx'> 	regmap_write(bsp_priv-&gt;php_grf, RK3588_GRF_GMAC_CON0,</div><div class='del'>-		     RK3588_GMAC_PHY_INTF_SEL_RGMII(id));</div><div class='add'>+		     RK3588_GMAC_PHY_INTF_SEL(id, PHY_INTF_SEL_RGMII));</div><div class='ctx'> </div><div class='ctx'> 	regmap_write(bsp_priv-&gt;php_grf, RK3588_GRF_CLK_CON1,</div><div class='ctx'> 		     RK3588_GMAC_CLK_RGMII_MODE(id));</div><div class='hunk'>@@ -1343,40 +1253,33 @@ static void rk3588_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> </div><div class='ctx'> static void rk3588_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;php_grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,php_grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;php_grf, RK3588_GRF_GMAC_CON0,</div><div class='del'>-		     RK3588_GMAC_PHY_INTF_SEL_RMII(bsp_priv-&gt;id));</div><div class='add'>+		     RK3588_GMAC_PHY_INTF_SEL(bsp_priv-&gt;id, PHY_INTF_SEL_RMII));</div><div class='ctx'> </div><div class='ctx'> 	regmap_write(bsp_priv-&gt;php_grf, RK3588_GRF_CLK_CON1,</div><div class='ctx'> 		     RK3588_GMAC_CLK_RMII_MODE(bsp_priv-&gt;id));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk3588_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='add'>+static int rk3588_set_gmac_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+				 phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> 	unsigned int val = 0, id = bsp_priv-&gt;id;</div><div class='ctx'> </div><div class='ctx'> 	switch (speed) {</div><div class='ctx'> 	case 10:</div><div class='del'>-		if (bsp_priv-&gt;phy_iface == PHY_INTERFACE_MODE_RMII)</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RMII)</div><div class='ctx'> 			val = RK3588_GMA_CLK_RMII_DIV20(id);</div><div class='ctx'> 		else</div><div class='ctx'> 			val = RK3588_GMAC_CLK_RGMII_DIV50(id);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 100:</div><div class='del'>-		if (bsp_priv-&gt;phy_iface == PHY_INTERFACE_MODE_RMII)</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RMII)</div><div class='ctx'> 			val = RK3588_GMA_CLK_RMII_DIV2(id);</div><div class='ctx'> 		else</div><div class='ctx'> 			val = RK3588_GMAC_CLK_RGMII_DIV5(id);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1000:</div><div class='del'>-		if (bsp_priv-&gt;phy_iface != PHY_INTERFACE_MODE_RMII)</div><div class='add'>+		if (interface != PHY_INTERFACE_MODE_RMII)</div><div class='ctx'> 			val = RK3588_GMAC_CLK_RGMII_DIV1(id);</div><div class='ctx'> 		else</div><div class='ctx'> 			goto err;</div><div class='hunk'>@@ -1387,9 +1290,9 @@ static void rk3588_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='ctx'> </div><div class='ctx'> 	regmap_write(bsp_priv-&gt;php_grf, RK3588_GRF_CLK_CON1, val);</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='add'>+	return 0;</div><div class='ctx'> err:</div><div class='del'>-	dev_err(dev, "unknown speed value for GMAC speed=%d", speed);</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rk3588_set_clock_selection(struct rk_priv_data *bsp_priv, bool input,</div><div class='hunk'>@@ -1407,9 +1310,9 @@ static void rk3588_set_clock_selection(struct rk_priv_data *bsp_priv, bool input</div><div class='ctx'> static const struct rk_gmac_ops rk3588_ops = {</div><div class='ctx'> 	.set_to_rgmii = rk3588_set_to_rgmii,</div><div class='ctx'> 	.set_to_rmii = rk3588_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rk3588_set_gmac_speed,</div><div class='del'>-	.set_rmii_speed = rk3588_set_gmac_speed,</div><div class='add'>+	.set_speed = rk3588_set_gmac_speed,</div><div class='ctx'> 	.set_clock_selection = rk3588_set_clock_selection,</div><div class='add'>+	.php_grf_required = true,</div><div class='ctx'> 	.regs_valid = true,</div><div class='ctx'> 	.regs = {</div><div class='ctx'> 		0xfe1b0000, /* gmac0 */</div><div class='hunk'>@@ -1421,8 +1324,7 @@ static const struct rk_gmac_ops rk3588_ops = {</div><div class='ctx'> #define RV1108_GRF_GMAC_CON0		0X0900</div><div class='ctx'> </div><div class='ctx'> /* RV1108_GRF_GMAC_CON0 */</div><div class='del'>-#define RV1108_GMAC_PHY_INTF_SEL_RMII	(GRF_CLR_BIT(4) | GRF_CLR_BIT(5) | \</div><div class='del'>-					GRF_BIT(6))</div><div class='add'>+#define RV1108_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(6, 4, val)</div><div class='ctx'> #define RV1108_GMAC_FLOW_CTRL		GRF_BIT(3)</div><div class='ctx'> #define RV1108_GMAC_FLOW_CTRL_CLR	GRF_CLR_BIT(3)</div><div class='ctx'> #define RV1108_GMAC_SPEED_10M		GRF_CLR_BIT(2)</div><div class='hunk'>@@ -1432,42 +1334,25 @@ static const struct rk_gmac_ops rk3588_ops = {</div><div class='ctx'> </div><div class='ctx'> static void rv1108_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RV1108_GRF_GMAC_CON0,</div><div class='del'>-		     RV1108_GMAC_PHY_INTF_SEL_RMII);</div><div class='add'>+		     RV1108_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rv1108_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+static const struct rk_reg_speed_data rv1108_reg_speed_data = {</div><div class='add'>+	.rmii_10 = RV1108_GMAC_RMII_CLK_2_5M | RV1108_GMAC_SPEED_10M,</div><div class='add'>+	.rmii_100 = RV1108_GMAC_RMII_CLK_25M | RV1108_GMAC_SPEED_100M,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	if (speed == 10) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RV1108_GRF_GMAC_CON0,</div><div class='del'>-			     RV1108_GMAC_RMII_CLK_2_5M |</div><div class='del'>-			     RV1108_GMAC_SPEED_10M);</div><div class='del'>-	} else if (speed == 100) {</div><div class='del'>-		regmap_write(bsp_priv-&gt;grf, RV1108_GRF_GMAC_CON0,</div><div class='del'>-			     RV1108_GMAC_RMII_CLK_25M |</div><div class='del'>-			     RV1108_GMAC_SPEED_100M);</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(dev, "unknown speed value for RMII! speed=%d", speed);</div><div class='del'>-	}</div><div class='add'>+static int rv1108_set_speed(struct rk_priv_data *bsp_priv,</div><div class='add'>+			    phy_interface_t interface, int speed)</div><div class='add'>+{</div><div class='add'>+	return rk_set_reg_speed(bsp_priv, &amp;rv1108_reg_speed_data,</div><div class='add'>+				RV1108_GRF_GMAC_CON0, interface, speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops rv1108_ops = {</div><div class='ctx'> 	.set_to_rmii = rv1108_set_to_rmii,</div><div class='del'>-	.set_rmii_speed = rv1108_set_rmii_speed,</div><div class='add'>+	.set_speed = rv1108_set_speed,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define RV1126_GRF_GMAC_CON0		0X0070</div><div class='hunk'>@@ -1475,10 +1360,7 @@ static const struct rk_gmac_ops rv1108_ops = {</div><div class='ctx'> #define RV1126_GRF_GMAC_CON2		0X0078</div><div class='ctx'> </div><div class='ctx'> /* RV1126_GRF_GMAC_CON0 */</div><div class='del'>-#define RV1126_GMAC_PHY_INTF_SEL_RGMII	\</div><div class='del'>-		(GRF_BIT(4) | GRF_CLR_BIT(5) | GRF_CLR_BIT(6))</div><div class='del'>-#define RV1126_GMAC_PHY_INTF_SEL_RMII	\</div><div class='del'>-		(GRF_CLR_BIT(4) | GRF_CLR_BIT(5) | GRF_BIT(6))</div><div class='add'>+#define RV1126_GMAC_PHY_INTF_SEL(val)	GRF_FIELD(6, 4, val)</div><div class='ctx'> #define RV1126_GMAC_FLOW_CTRL			GRF_BIT(7)</div><div class='ctx'> #define RV1126_GMAC_FLOW_CTRL_CLR		GRF_CLR_BIT(7)</div><div class='ctx'> #define RV1126_GMAC_M0_RXCLK_DLY_ENABLE		GRF_BIT(1)</div><div class='hunk'>@@ -1491,24 +1373,17 @@ static const struct rk_gmac_ops rv1108_ops = {</div><div class='ctx'> #define RV1126_GMAC_M1_TXCLK_DLY_DISABLE	GRF_CLR_BIT(2)</div><div class='ctx'> </div><div class='ctx'> /* RV1126_GRF_GMAC_CON1 */</div><div class='del'>-#define RV1126_GMAC_M0_CLK_RX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 8)</div><div class='del'>-#define RV1126_GMAC_M0_CLK_TX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RV1126_GMAC_M0_CLK_RX_DL_CFG(val)	GRF_FIELD(14, 8, val)</div><div class='add'>+#define RV1126_GMAC_M0_CLK_TX_DL_CFG(val)	GRF_FIELD(6, 0, val)</div><div class='ctx'> /* RV1126_GRF_GMAC_CON2 */</div><div class='del'>-#define RV1126_GMAC_M1_CLK_RX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 8)</div><div class='del'>-#define RV1126_GMAC_M1_CLK_TX_DL_CFG(val)	HIWORD_UPDATE(val, 0x7F, 0)</div><div class='add'>+#define RV1126_GMAC_M1_CLK_RX_DL_CFG(val)	GRF_FIELD(14, 8, val)</div><div class='add'>+#define RV1126_GMAC_M1_CLK_TX_DL_CFG(val)	GRF_FIELD(6, 0, val)</div><div class='ctx'> </div><div class='ctx'> static void rv1126_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> 				int tx_delay, int rx_delay)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "Missing rockchip,grf property\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RV1126_GRF_GMAC_CON0,</div><div class='del'>-		     RV1126_GMAC_PHY_INTF_SEL_RGMII |</div><div class='add'>+		     RV1126_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RGMII) |</div><div class='ctx'> 		     RV1126_GMAC_M0_RXCLK_DLY_ENABLE |</div><div class='ctx'> 		     RV1126_GMAC_M0_TXCLK_DLY_ENABLE |</div><div class='ctx'> 		     RV1126_GMAC_M1_RXCLK_DLY_ENABLE |</div><div class='hunk'>@@ -1525,126 +1400,21 @@ static void rv1126_set_to_rgmii(struct rk_priv_data *bsp_priv,</div><div class='ctx'> </div><div class='ctx'> static void rv1126_set_to_rmii(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='del'>-		dev_err(dev, "%s: Missing rockchip,grf property\n", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	regmap_write(bsp_priv-&gt;grf, RV1126_GRF_GMAC_CON0,</div><div class='del'>-		     RV1126_GMAC_PHY_INTF_SEL_RMII);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rv1126_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk_mac_speed = bsp_priv-&gt;clks[RK_CLK_MAC_SPEED].clk;</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	switch (speed) {</div><div class='del'>-	case 10:</div><div class='del'>-		rate = 2500000;</div><div class='del'>-		break;</div><div class='del'>-	case 100:</div><div class='del'>-		rate = 25000000;</div><div class='del'>-		break;</div><div class='del'>-	case 1000:</div><div class='del'>-		rate = 125000000;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dev, "unknown speed value for RGMII speed=%d", speed);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = clk_set_rate(clk_mac_speed, rate);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_err(dev, "%s: set clk_mac_speed rate %ld failed %d\n",</div><div class='del'>-			__func__, rate, ret);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rv1126_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)</div><div class='del'>-{</div><div class='del'>-	struct clk *clk_mac_speed = bsp_priv-&gt;clks[RK_CLK_MAC_SPEED].clk;</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	switch (speed) {</div><div class='del'>-	case 10:</div><div class='del'>-		rate = 2500000;</div><div class='del'>-		break;</div><div class='del'>-	case 100:</div><div class='del'>-		rate = 25000000;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dev, "unknown speed value for RGMII speed=%d", speed);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = clk_set_rate(clk_mac_speed, rate);</div><div class='del'>-	if (ret)</div><div class='del'>-		dev_err(dev, "%s: set clk_mac_speed rate %ld failed %d\n",</div><div class='del'>-			__func__, rate, ret);</div><div class='add'>+		     RV1126_GMAC_PHY_INTF_SEL(PHY_INTF_SEL_RMII));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct rk_gmac_ops rv1126_ops = {</div><div class='ctx'> 	.set_to_rgmii = rv1126_set_to_rgmii,</div><div class='ctx'> 	.set_to_rmii = rv1126_set_to_rmii,</div><div class='del'>-	.set_rgmii_speed = rv1126_set_rgmii_speed,</div><div class='del'>-	.set_rmii_speed = rv1126_set_rmii_speed,</div><div class='add'>+	.set_speed = rk_set_clk_mac_speed,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define RK_GRF_MACPHY_CON0		0xb00</div><div class='del'>-#define RK_GRF_MACPHY_CON1		0xb04</div><div class='del'>-#define RK_GRF_MACPHY_CON2		0xb08</div><div class='del'>-#define RK_GRF_MACPHY_CON3		0xb0c</div><div class='del'>-</div><div class='del'>-#define RK_MACPHY_ENABLE		GRF_BIT(0)</div><div class='del'>-#define RK_MACPHY_DISABLE		GRF_CLR_BIT(0)</div><div class='del'>-#define RK_MACPHY_CFG_CLK_50M		GRF_BIT(14)</div><div class='del'>-#define RK_GMAC2PHY_RMII_MODE		(GRF_BIT(6) | GRF_CLR_BIT(7))</div><div class='del'>-#define RK_GRF_CON2_MACPHY_ID		HIWORD_UPDATE(0x1234, 0xffff, 0)</div><div class='del'>-#define RK_GRF_CON3_MACPHY_ID		HIWORD_UPDATE(0x35, 0x3f, 0)</div><div class='del'>-</div><div class='del'>-static void rk_gmac_integrated_phy_powerup(struct rk_priv_data *priv)</div><div class='del'>-{</div><div class='del'>-	if (priv-&gt;ops-&gt;integrated_phy_powerup)</div><div class='del'>-		priv-&gt;ops-&gt;integrated_phy_powerup(priv);</div><div class='del'>-</div><div class='del'>-	regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M);</div><div class='del'>-	regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE);</div><div class='del'>-</div><div class='del'>-	regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID);</div><div class='del'>-	regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;phy_reset) {</div><div class='del'>-		/* PHY needs to be disabled before trying to reset it */</div><div class='del'>-		regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);</div><div class='del'>-		if (priv-&gt;phy_reset)</div><div class='del'>-			reset_control_assert(priv-&gt;phy_reset);</div><div class='del'>-		usleep_range(10, 20);</div><div class='del'>-		if (priv-&gt;phy_reset)</div><div class='del'>-			reset_control_deassert(priv-&gt;phy_reset);</div><div class='del'>-		usleep_range(10, 20);</div><div class='del'>-		regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE);</div><div class='del'>-		msleep(30);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rk_gmac_integrated_phy_powerdown(struct rk_priv_data *priv)</div><div class='del'>-{</div><div class='del'>-	regmap_write(priv-&gt;grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);</div><div class='del'>-	if (priv-&gt;phy_reset)</div><div class='del'>-		reset_control_assert(priv-&gt;phy_reset);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='ctx'> 	struct rk_priv_data *bsp_priv = plat-&gt;bsp_priv;</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> 	int phy_iface = bsp_priv-&gt;phy_iface;</div><div class='add'>+	struct device *dev = bsp_priv-&gt;dev;</div><div class='ctx'> 	int i, j, ret;</div><div class='ctx'> </div><div class='ctx'> 	bsp_priv-&gt;clk_enabled = false;</div><div class='hunk'>@@ -1671,16 +1441,10 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return dev_err_probe(dev, ret, "Failed to get clocks\n");</div><div class='ctx'> </div><div class='del'>-	/* "stmmaceth" will be enabled by the core */</div><div class='del'>-	bsp_priv-&gt;clk_mac = devm_clk_get(dev, "stmmaceth");</div><div class='del'>-	ret = PTR_ERR_OR_ZERO(bsp_priv-&gt;clk_mac);</div><div class='del'>-	if (ret)</div><div class='del'>-		return dev_err_probe(dev, ret, "Cannot get stmmaceth clock\n");</div><div class='del'>-</div><div class='ctx'> 	if (bsp_priv-&gt;clock_input) {</div><div class='ctx'> 		dev_info(dev, "clock input from PHY\n");</div><div class='ctx'> 	} else if (phy_iface == PHY_INTERFACE_MODE_RMII) {</div><div class='del'>-		clk_set_rate(bsp_priv-&gt;clk_mac, 50000000);</div><div class='add'>+		clk_set_rate(plat-&gt;stmmac_clk, 50000000);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (plat-&gt;phy_node &amp;&amp; bsp_priv-&gt;integrated_phy) {</div><div class='hunk'>@@ -1718,14 +1482,15 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (bsp_priv-&gt;clk_enabled) {</div><div class='add'>+			if (bsp_priv-&gt;ops &amp;&amp; bsp_priv-&gt;ops-&gt;set_clock_selection) {</div><div class='add'>+				bsp_priv-&gt;ops-&gt;set_clock_selection(bsp_priv,</div><div class='add'>+					      bsp_priv-&gt;clock_input, false);</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			clk_bulk_disable_unprepare(bsp_priv-&gt;num_clks,</div><div class='ctx'> 						   bsp_priv-&gt;clks);</div><div class='ctx'> 			clk_disable_unprepare(bsp_priv-&gt;clk_phy);</div><div class='ctx'> </div><div class='del'>-			if (bsp_priv-&gt;ops &amp;&amp; bsp_priv-&gt;ops-&gt;set_clock_selection)</div><div class='del'>-				bsp_priv-&gt;ops-&gt;set_clock_selection(bsp_priv,</div><div class='del'>-					      bsp_priv-&gt;clock_input, false);</div><div class='del'>-</div><div class='ctx'> 			bsp_priv-&gt;clk_enabled = false;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1736,8 +1501,8 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)</div><div class='ctx'> static int phy_power_on(struct rk_priv_data *bsp_priv, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	struct regulator *ldo = bsp_priv-&gt;regulator;</div><div class='add'>+	struct device *dev = bsp_priv-&gt;dev;</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		ret = regulator_enable(ldo);</div><div class='hunk'>@@ -1767,7 +1532,7 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,</div><div class='ctx'> 	if (!bsp_priv)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	of_get_phy_mode(dev-&gt;of_node, &amp;bsp_priv-&gt;phy_iface);</div><div class='add'>+	bsp_priv-&gt;phy_iface = plat-&gt;phy_interface;</div><div class='ctx'> 	bsp_priv-&gt;ops = ops;</div><div class='ctx'> </div><div class='ctx'> 	/* Some SoCs have multiple MAC controllers, which need</div><div class='hunk'>@@ -1830,8 +1595,22 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,</div><div class='ctx'> </div><div class='ctx'> 	bsp_priv-&gt;grf = syscon_regmap_lookup_by_phandle(dev-&gt;of_node,</div><div class='ctx'> 							"rockchip,grf");</div><div class='del'>-	bsp_priv-&gt;php_grf = syscon_regmap_lookup_by_phandle(dev-&gt;of_node,</div><div class='del'>-							    "rockchip,php-grf");</div><div class='add'>+	if (IS_ERR(bsp_priv-&gt;grf)) {</div><div class='add'>+		dev_err_probe(dev, PTR_ERR(bsp_priv-&gt;grf),</div><div class='add'>+			      "failed to lookup rockchip,grf\n");</div><div class='add'>+		return ERR_CAST(bsp_priv-&gt;grf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;php_grf_required) {</div><div class='add'>+		bsp_priv-&gt;php_grf =</div><div class='add'>+			syscon_regmap_lookup_by_phandle(dev-&gt;of_node,</div><div class='add'>+							"rockchip,php-grf");</div><div class='add'>+		if (IS_ERR(bsp_priv-&gt;php_grf)) {</div><div class='add'>+			dev_err_probe(dev, PTR_ERR(bsp_priv-&gt;php_grf),</div><div class='add'>+				      "failed to lookup rockchip,php-grf\n");</div><div class='add'>+			return ERR_CAST(bsp_priv-&gt;php_grf);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (plat-&gt;phy_node) {</div><div class='ctx'> 		bsp_priv-&gt;integrated_phy = of_property_read_bool(plat-&gt;phy_node,</div><div class='hunk'>@@ -1847,7 +1626,7 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,</div><div class='ctx'> 	dev_info(dev, "integrated PHY? (%s).\n",</div><div class='ctx'> 		 bsp_priv-&gt;integrated_phy ? "yes" : "no");</div><div class='ctx'> </div><div class='del'>-	bsp_priv-&gt;pdev = pdev;</div><div class='add'>+	bsp_priv-&gt;dev = dev;</div><div class='ctx'> </div><div class='ctx'> 	return bsp_priv;</div><div class='ctx'> }</div><div class='hunk'>@@ -1867,7 +1646,7 @@ static int rk_gmac_check_ops(struct rk_priv_data *bsp_priv)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		dev_err(&amp;bsp_priv-&gt;pdev-&gt;dev,</div><div class='add'>+		dev_err(bsp_priv-&gt;dev,</div><div class='ctx'> 			"unsupported interface %d", bsp_priv-&gt;phy_iface);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1875,8 +1654,8 @@ static int rk_gmac_check_ops(struct rk_priv_data *bsp_priv)</div><div class='ctx'> </div><div class='ctx'> static int rk_gmac_powerup(struct rk_priv_data *bsp_priv)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = bsp_priv-&gt;dev;</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	ret = rk_gmac_check_ops(bsp_priv);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -1921,43 +1700,82 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv)</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_get_sync(dev);</div><div class='ctx'> </div><div class='del'>-	if (bsp_priv-&gt;integrated_phy)</div><div class='del'>-		rk_gmac_integrated_phy_powerup(bsp_priv);</div><div class='add'>+	if (bsp_priv-&gt;integrated_phy &amp;&amp; bsp_priv-&gt;ops-&gt;integrated_phy_powerup)</div><div class='add'>+		bsp_priv-&gt;ops-&gt;integrated_phy_powerup(bsp_priv);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void rk_gmac_powerdown(struct rk_priv_data *gmac)</div><div class='ctx'> {</div><div class='del'>-	if (gmac-&gt;integrated_phy)</div><div class='del'>-		rk_gmac_integrated_phy_powerdown(gmac);</div><div class='add'>+	if (gmac-&gt;integrated_phy &amp;&amp; gmac-&gt;ops-&gt;integrated_phy_powerdown)</div><div class='add'>+		gmac-&gt;ops-&gt;integrated_phy_powerdown(gmac);</div><div class='ctx'> </div><div class='del'>-	pm_runtime_put_sync(&amp;gmac-&gt;pdev-&gt;dev);</div><div class='add'>+	pm_runtime_put_sync(gmac-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	phy_power_on(gmac, false);</div><div class='ctx'> 	gmac_clk_enable(gmac, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void rk_fix_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='add'>+static void rk_get_interfaces(struct stmmac_priv *priv, void *bsp_priv,</div><div class='add'>+			      unsigned long *interfaces)</div><div class='ctx'> {</div><div class='del'>-	struct rk_priv_data *bsp_priv = priv;</div><div class='del'>-	struct device *dev = &amp;bsp_priv-&gt;pdev-&gt;dev;</div><div class='add'>+	struct rk_priv_data *rk = bsp_priv;</div><div class='ctx'> </div><div class='del'>-	switch (bsp_priv-&gt;phy_iface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		if (bsp_priv-&gt;ops-&gt;set_rgmii_speed)</div><div class='del'>-			bsp_priv-&gt;ops-&gt;set_rgmii_speed(bsp_priv, speed);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		if (bsp_priv-&gt;ops-&gt;set_rmii_speed)</div><div class='del'>-			bsp_priv-&gt;ops-&gt;set_rmii_speed(bsp_priv, speed);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dev, "unsupported interface %d", bsp_priv-&gt;phy_iface);</div><div class='del'>-	}</div><div class='add'>+	if (rk-&gt;ops-&gt;set_to_rgmii)</div><div class='add'>+		phy_interface_set_rgmii(interfaces);</div><div class='add'>+</div><div class='add'>+	if (rk-&gt;ops-&gt;set_to_rmii)</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII, interfaces);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rk_set_clk_tx_rate(void *bsp_priv_, struct clk *clk_tx_i,</div><div class='add'>+			      phy_interface_t interface, int speed)</div><div class='add'>+{</div><div class='add'>+	struct rk_priv_data *bsp_priv = bsp_priv_;</div><div class='add'>+</div><div class='add'>+	if (bsp_priv-&gt;ops-&gt;set_speed)</div><div class='add'>+		return bsp_priv-&gt;ops-&gt;set_speed(bsp_priv, interface, speed);</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rk_gmac_suspend(struct device *dev, void *bsp_priv_)</div><div class='add'>+{</div><div class='add'>+	struct rk_priv_data *bsp_priv = bsp_priv_;</div><div class='add'>+</div><div class='add'>+	/* Keep the PHY up if we use Wake-on-Lan. */</div><div class='add'>+	if (!device_may_wakeup(dev))</div><div class='add'>+		rk_gmac_powerdown(bsp_priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rk_gmac_resume(struct device *dev, void *bsp_priv_)</div><div class='add'>+{</div><div class='add'>+	struct rk_priv_data *bsp_priv = bsp_priv_;</div><div class='add'>+</div><div class='add'>+	/* The PHY was up for Wake-on-Lan. */</div><div class='add'>+	if (!device_may_wakeup(dev))</div><div class='add'>+		rk_gmac_powerup(bsp_priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rk_gmac_init(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	return rk_gmac_powerup(bsp_priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rk_gmac_exit(struct device *dev, void *bsp_priv_)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dev));</div><div class='add'>+	struct rk_priv_data *bsp_priv = bsp_priv_;</div><div class='add'>+</div><div class='add'>+	rk_gmac_powerdown(bsp_priv);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;plat-&gt;phy_node &amp;&amp; bsp_priv-&gt;integrated_phy)</div><div class='add'>+		clk_put(bsp_priv-&gt;clk_phy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rk_gmac_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -1984,9 +1802,18 @@ static int rk_gmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* If the stmmac is not already selected as gmac4,</div><div class='ctx'> 	 * then make sure we fallback to gmac.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!plat_dat-&gt;has_gmac4)</div><div class='del'>-		plat_dat-&gt;has_gmac = true;</div><div class='del'>-	plat_dat-&gt;fix_mac_speed = rk_fix_speed;</div><div class='add'>+	if (plat_dat-&gt;core_type != DWMAC_CORE_GMAC4) {</div><div class='add'>+		plat_dat-&gt;core_type = DWMAC_CORE_GMAC;</div><div class='add'>+		plat_dat-&gt;rx_fifo_size = 4096;</div><div class='add'>+		plat_dat-&gt;tx_fifo_size = 2048;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	plat_dat-&gt;get_interfaces = rk_get_interfaces;</div><div class='add'>+	plat_dat-&gt;set_clk_tx_rate = rk_set_clk_tx_rate;</div><div class='add'>+	plat_dat-&gt;init = rk_gmac_init;</div><div class='add'>+	plat_dat-&gt;exit = rk_gmac_exit;</div><div class='add'>+	plat_dat-&gt;suspend = rk_gmac_suspend;</div><div class='add'>+	plat_dat-&gt;resume = rk_gmac_resume;</div><div class='ctx'> </div><div class='ctx'> 	plat_dat-&gt;bsp_priv = rk_gmac_setup(pdev, plat_dat, data);</div><div class='ctx'> 	if (IS_ERR(plat_dat-&gt;bsp_priv))</div><div class='hunk'>@@ -1996,62 +1823,9 @@ static int rk_gmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = rk_gmac_powerup(plat_dat-&gt;bsp_priv);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_gmac_powerdown;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_gmac_powerdown:</div><div class='del'>-	rk_gmac_powerdown(plat_dat-&gt;bsp_priv);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rk_gmac_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct rk_priv_data *bsp_priv = get_stmmac_bsp_priv(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	stmmac_dvr_remove(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	rk_gmac_powerdown(bsp_priv);</div><div class='add'>+	return devm_stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM_SLEEP</div><div class='del'>-static int rk_gmac_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct rk_priv_data *bsp_priv = get_stmmac_bsp_priv(dev);</div><div class='del'>-	int ret = stmmac_suspend(dev);</div><div class='del'>-</div><div class='del'>-	/* Keep the PHY up if we use Wake-on-Lan. */</div><div class='del'>-	if (!device_may_wakeup(dev)) {</div><div class='del'>-		rk_gmac_powerdown(bsp_priv);</div><div class='del'>-		bsp_priv-&gt;suspended = true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rk_gmac_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct rk_priv_data *bsp_priv = get_stmmac_bsp_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* The PHY was up for Wake-on-Lan. */</div><div class='del'>-	if (bsp_priv-&gt;suspended) {</div><div class='del'>-		rk_gmac_powerup(bsp_priv);</div><div class='del'>-		bsp_priv-&gt;suspended = false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return stmmac_resume(dev);</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_PM_SLEEP */</div><div class='del'>-</div><div class='del'>-static SIMPLE_DEV_PM_OPS(rk_gmac_pm_ops, rk_gmac_suspend, rk_gmac_resume);</div><div class='del'>-</div><div class='ctx'> static const struct of_device_id rk_gmac_dwmac_match[] = {</div><div class='ctx'> 	{ .compatible = "rockchip,px30-gmac",	.data = &amp;px30_ops   },</div><div class='ctx'> 	{ .compatible = "rockchip,rk3128-gmac", .data = &amp;rk3128_ops },</div><div class='hunk'>@@ -2062,6 +1836,8 @@ static const struct of_device_id rk_gmac_dwmac_match[] = {</div><div class='ctx'> 	{ .compatible = "rockchip,rk3366-gmac", .data = &amp;rk3366_ops },</div><div class='ctx'> 	{ .compatible = "rockchip,rk3368-gmac", .data = &amp;rk3368_ops },</div><div class='ctx'> 	{ .compatible = "rockchip,rk3399-gmac", .data = &amp;rk3399_ops },</div><div class='add'>+	{ .compatible = "rockchip,rk3506-gmac", .data = &amp;rk3506_ops },</div><div class='add'>+	{ .compatible = "rockchip,rk3528-gmac", .data = &amp;rk3528_ops },</div><div class='ctx'> 	{ .compatible = "rockchip,rk3568-gmac", .data = &amp;rk3568_ops },</div><div class='ctx'> 	{ .compatible = "rockchip,rk3576-gmac", .data = &amp;rk3576_ops },</div><div class='ctx'> 	{ .compatible = "rockchip,rk3588-gmac", .data = &amp;rk3588_ops },</div><div class='hunk'>@@ -2073,10 +1849,9 @@ MODULE_DEVICE_TABLE(of, rk_gmac_dwmac_match);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver rk_gmac_dwmac_driver = {</div><div class='ctx'> 	.probe  = rk_gmac_probe,</div><div class='del'>-	.remove = rk_gmac_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name           = "rk_gmac-dwmac",</div><div class='del'>-		.pm		= &amp;rk_gmac_pm_ops,</div><div class='add'>+		.pm		= &amp;stmmac_simple_pm_ops,</div><div class='ctx'> 		.of_match_table = rk_gmac_dwmac_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c<br/>new file mode 100644<br/>index 000000000000..5a485ee98fa7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c</a></div><div class='hunk'>@@ -0,0 +1,186 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * NXP S32G/R GMAC glue layer</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2019-2024 NXP</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/stmmac.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stmmac_platform.h"</div><div class='add'>+</div><div class='add'>+#define GMAC_INTF_RATE_125M	125000000	/* 125MHz */</div><div class='add'>+</div><div class='add'>+/* SoC PHY interface control register */</div><div class='add'>+#define S32_PHY_INTF_SEL_MII	0x00</div><div class='add'>+#define S32_PHY_INTF_SEL_SGMII	0x01</div><div class='add'>+#define S32_PHY_INTF_SEL_RGMII	0x02</div><div class='add'>+#define S32_PHY_INTF_SEL_RMII	0x08</div><div class='add'>+</div><div class='add'>+struct s32_priv_data {</div><div class='add'>+	void __iomem *ioaddr;</div><div class='add'>+	void __iomem *ctrl_sts;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	phy_interface_t *intf_mode;</div><div class='add'>+	struct clk *tx_clk;</div><div class='add'>+	struct clk *rx_clk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int s32_gmac_write_phy_intf_select(struct s32_priv_data *gmac)</div><div class='add'>+{</div><div class='add'>+	writel(S32_PHY_INTF_SEL_RGMII, gmac-&gt;ctrl_sts);</div><div class='add'>+</div><div class='add'>+	dev_dbg(gmac-&gt;dev, "PHY mode set to %s\n", phy_modes(*gmac-&gt;intf_mode));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int s32_gmac_init(struct device *dev, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct s32_priv_data *gmac = priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Set initial TX interface clock */</div><div class='add'>+	ret = clk_prepare_enable(gmac-&gt;tx_clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Can't enable tx clock\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	ret = clk_set_rate(gmac-&gt;tx_clk, GMAC_INTF_RATE_125M);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Can't set tx clock\n");</div><div class='add'>+		goto err_tx_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set initial RX interface clock */</div><div class='add'>+	ret = clk_prepare_enable(gmac-&gt;rx_clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Can't enable rx clock\n");</div><div class='add'>+		goto err_tx_disable;</div><div class='add'>+	}</div><div class='add'>+	ret = clk_set_rate(gmac-&gt;rx_clk, GMAC_INTF_RATE_125M);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Can't set rx clock\n");</div><div class='add'>+		goto err_txrx_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set interface mode */</div><div class='add'>+	ret = s32_gmac_write_phy_intf_select(gmac);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Can't set PHY interface mode\n");</div><div class='add'>+		goto err_txrx_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_txrx_disable:</div><div class='add'>+	clk_disable_unprepare(gmac-&gt;rx_clk);</div><div class='add'>+err_tx_disable:</div><div class='add'>+	clk_disable_unprepare(gmac-&gt;tx_clk);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void s32_gmac_exit(struct device *dev, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct s32_priv_data *gmac = priv;</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(gmac-&gt;tx_clk);</div><div class='add'>+	clk_disable_unprepare(gmac-&gt;rx_clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int s32_dwmac_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct plat_stmmacenet_data *plat;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct stmmac_resources res;</div><div class='add'>+	struct s32_priv_data *gmac;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	gmac = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*gmac), GFP_KERNEL);</div><div class='add'>+	if (!gmac)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	gmac-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	ret = stmmac_get_platform_resources(pdev, &amp;res);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret,</div><div class='add'>+				     "Failed to get platform resources\n");</div><div class='add'>+</div><div class='add'>+	plat = devm_stmmac_probe_config_dt(pdev, res.mac);</div><div class='add'>+	if (IS_ERR(plat))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(plat),</div><div class='add'>+				     "dt configuration failed\n");</div><div class='add'>+</div><div class='add'>+	/* PHY interface mode control reg */</div><div class='add'>+	gmac-&gt;ctrl_sts = devm_platform_get_and_ioremap_resource(pdev, 1, NULL);</div><div class='add'>+	if (IS_ERR(gmac-&gt;ctrl_sts))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gmac-&gt;ctrl_sts),</div><div class='add'>+				     "S32CC config region is missing\n");</div><div class='add'>+</div><div class='add'>+	/* tx clock */</div><div class='add'>+	gmac-&gt;tx_clk = devm_clk_get(&amp;pdev-&gt;dev, "tx");</div><div class='add'>+	if (IS_ERR(gmac-&gt;tx_clk))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gmac-&gt;tx_clk),</div><div class='add'>+				     "tx clock not found\n");</div><div class='add'>+</div><div class='add'>+	/* rx clock */</div><div class='add'>+	gmac-&gt;rx_clk = devm_clk_get(&amp;pdev-&gt;dev, "rx");</div><div class='add'>+	if (IS_ERR(gmac-&gt;rx_clk))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gmac-&gt;rx_clk),</div><div class='add'>+				     "rx clock not found\n");</div><div class='add'>+</div><div class='add'>+	gmac-&gt;intf_mode = &amp;plat-&gt;phy_interface;</div><div class='add'>+	gmac-&gt;ioaddr = res.addr;</div><div class='add'>+</div><div class='add'>+	/* S32CC core feature set */</div><div class='add'>+	plat-&gt;core_type = DWMAC_CORE_GMAC4;</div><div class='add'>+	plat-&gt;pmt = 1;</div><div class='add'>+	plat-&gt;flags |= STMMAC_FLAG_SPH_DISABLE;</div><div class='add'>+	plat-&gt;rx_fifo_size = 20480;</div><div class='add'>+	plat-&gt;tx_fifo_size = 20480;</div><div class='add'>+</div><div class='add'>+	plat-&gt;init = s32_gmac_init;</div><div class='add'>+	plat-&gt;exit = s32_gmac_exit;</div><div class='add'>+</div><div class='add'>+	plat-&gt;clk_tx_i = gmac-&gt;tx_clk;</div><div class='add'>+	plat-&gt;set_clk_tx_rate = stmmac_set_clk_tx_rate;</div><div class='add'>+</div><div class='add'>+	plat-&gt;bsp_priv = gmac;</div><div class='add'>+</div><div class='add'>+	return stmmac_pltfr_probe(pdev, plat, &amp;res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id s32_dwmac_match[] = {</div><div class='add'>+	{ .compatible = "nxp,s32g2-dwmac" },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, s32_dwmac_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver s32_dwmac_driver = {</div><div class='add'>+	.probe = s32_dwmac_probe,</div><div class='add'>+	.remove = stmmac_pltfr_remove,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "s32-dwmac",</div><div class='add'>+		.pm = &amp;stmmac_pltfr_pm_ops,</div><div class='add'>+		.of_match_table = s32_dwmac_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(s32_dwmac_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Jan Petrous (OSS) &lt;jan.petrous@oss.nxp.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("NXP S32G/R common chassis GMAC driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c<br/>index 0745117d5872..a2b52d2c4eb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mfd/altera-sysmgr.h&gt;</div><div class='add'>+#include &lt;linux/clocksource_ids.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='hunk'>@@ -15,8 +16,10 @@</div><div class='ctx'> #include &lt;linux/reset.h&gt;</div><div class='ctx'> #include &lt;linux/stmmac.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "dwxgmac2.h"</div><div class='ctx'> #include "stmmac.h"</div><div class='ctx'> #include "stmmac_platform.h"</div><div class='add'>+#include "stmmac_ptp.h"</div><div class='ctx'> </div><div class='ctx'> #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0</div><div class='ctx'> #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1</div><div class='hunk'>@@ -41,15 +44,24 @@</div><div class='ctx'> #define SGMII_ADAPTER_ENABLE		0x0000</div><div class='ctx'> #define SGMII_ADAPTER_DISABLE		0x0001</div><div class='ctx'> </div><div class='add'>+#define SMTG_MDIO_ADDR		0x15</div><div class='add'>+#define SMTG_TSC_WORD0		0xC</div><div class='add'>+#define SMTG_TSC_WORD1		0xD</div><div class='add'>+#define SMTG_TSC_WORD2		0xE</div><div class='add'>+#define SMTG_TSC_WORD3		0xF</div><div class='add'>+#define SMTG_TSC_SHIFT		16</div><div class='add'>+</div><div class='ctx'> struct socfpga_dwmac;</div><div class='ctx'> struct socfpga_dwmac_ops {</div><div class='ctx'> 	int (*set_phy_mode)(struct socfpga_dwmac *dwmac_priv);</div><div class='add'>+	void (*setup_plat_dat)(struct socfpga_dwmac *dwmac_priv);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct socfpga_dwmac {</div><div class='ctx'> 	u32	reg_offset;</div><div class='ctx'> 	u32	reg_shift;</div><div class='ctx'> 	struct	device *dev;</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='ctx'> 	struct regmap *sys_mgr_base_addr;</div><div class='ctx'> 	struct reset_control *stmmac_rst;</div><div class='ctx'> 	struct reset_control *stmmac_ocp_rst;</div><div class='hunk'>@@ -58,17 +70,15 @@ struct socfpga_dwmac {</div><div class='ctx'> 	void __iomem *sgmii_adapter_base;</div><div class='ctx'> 	bool f2h_ptp_ref_clk;</div><div class='ctx'> 	const struct socfpga_dwmac_ops *ops;</div><div class='del'>-	struct mdio_device *pcs_mdiodev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='add'>+static void socfpga_dwmac_fix_mac_speed(void *bsp_priv, int speed,</div><div class='add'>+					unsigned int mode)</div><div class='ctx'> {</div><div class='del'>-	struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv;</div><div class='add'>+	struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)bsp_priv;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dwmac-&gt;dev));</div><div class='ctx'> 	void __iomem *splitter_base = dwmac-&gt;splitter_base;</div><div class='ctx'> 	void __iomem *sgmii_adapter_base = dwmac-&gt;sgmii_adapter_base;</div><div class='del'>-	struct device *dev = dwmac-&gt;dev;</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct phy_device *phy_dev = ndev-&gt;phydev;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	if (sgmii_adapter_base)</div><div class='hunk'>@@ -95,7 +105,9 @@ static void socfpga_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned</div><div class='ctx'> 		writel(val, splitter_base + EMAC_SPLITTER_CTRL_REG);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (phy_dev &amp;&amp; sgmii_adapter_base)</div><div class='add'>+	if ((priv-&gt;plat-&gt;phy_interface == PHY_INTERFACE_MODE_SGMII ||</div><div class='add'>+	     priv-&gt;plat-&gt;phy_interface == PHY_INTERFACE_MODE_1000BASEX) &amp;&amp;</div><div class='add'>+	     sgmii_adapter_base)</div><div class='ctx'> 		writew(SGMII_ADAPTER_ENABLE,</div><div class='ctx'> 		       sgmii_adapter_base + SGMII_ADAPTER_CTRL_REG);</div><div class='ctx'> }</div><div class='hunk'>@@ -233,10 +245,7 @@ err_node_put:</div><div class='ctx'> </div><div class='ctx'> static int socfpga_get_plat_phymode(struct socfpga_dwmac *dwmac)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dwmac-&gt;dev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	return priv-&gt;plat-&gt;mac_interface;</div><div class='add'>+	return dwmac-&gt;plat_dat-&gt;phy_interface;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void socfpga_sgmii_config(struct socfpga_dwmac *dwmac, bool enable)</div><div class='hunk'>@@ -258,6 +267,7 @@ static int socfpga_set_phy_mode_common(int phymode, u32 *val)</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_GMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='ctx'> 		*val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RMII:</div><div class='hunk'>@@ -269,6 +279,112 @@ static int socfpga_set_phy_mode_common(int phymode, u32 *val)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void get_smtgtime(struct mii_bus *mii, int smtg_addr, u64 *smtg_time)</div><div class='add'>+{</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	ns = mdiobus_read(mii, smtg_addr, SMTG_TSC_WORD3);</div><div class='add'>+	ns &lt;&lt;= SMTG_TSC_SHIFT;</div><div class='add'>+	ns |= mdiobus_read(mii, smtg_addr, SMTG_TSC_WORD2);</div><div class='add'>+	ns &lt;&lt;= SMTG_TSC_SHIFT;</div><div class='add'>+	ns |= mdiobus_read(mii, smtg_addr, SMTG_TSC_WORD1);</div><div class='add'>+	ns &lt;&lt;= SMTG_TSC_SHIFT;</div><div class='add'>+	ns |= mdiobus_read(mii, smtg_addr, SMTG_TSC_WORD0);</div><div class='add'>+</div><div class='add'>+	*smtg_time = ns;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system,</div><div class='add'>+			    void *ctx)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_priv *priv = (struct stmmac_priv *)ctx;</div><div class='add'>+	u32 num_snapshot, gpio_value, acr_value;</div><div class='add'>+	void __iomem *ptpaddr = priv-&gt;ptpaddr;</div><div class='add'>+	void __iomem *ioaddr = priv-&gt;hw-&gt;pcsr;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u64 smtg_time = 0;</div><div class='add'>+	u64 ptp_time = 0;</div><div class='add'>+	int i, ret;</div><div class='add'>+	u32 v;</div><div class='add'>+</div><div class='add'>+	/* Both internal crosstimestamping and external triggered event</div><div class='add'>+	 * timestamping cannot be run concurrently.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_EXT_SNAPSHOT_EN)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;aux_ts_lock);</div><div class='add'>+	/* Enable Internal snapshot trigger */</div><div class='add'>+	acr_value = readl(ptpaddr + PTP_ACR);</div><div class='add'>+	acr_value &amp;= ~PTP_ACR_MASK;</div><div class='add'>+	switch (priv-&gt;plat-&gt;int_snapshot_num) {</div><div class='add'>+	case AUX_SNAPSHOT0:</div><div class='add'>+		acr_value |= PTP_ACR_ATSEN0;</div><div class='add'>+		break;</div><div class='add'>+	case AUX_SNAPSHOT1:</div><div class='add'>+		acr_value |= PTP_ACR_ATSEN1;</div><div class='add'>+		break;</div><div class='add'>+	case AUX_SNAPSHOT2:</div><div class='add'>+		acr_value |= PTP_ACR_ATSEN2;</div><div class='add'>+		break;</div><div class='add'>+	case AUX_SNAPSHOT3:</div><div class='add'>+		acr_value |= PTP_ACR_ATSEN3;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;aux_ts_lock);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	writel(acr_value, ptpaddr + PTP_ACR);</div><div class='add'>+</div><div class='add'>+	/* Clear FIFO */</div><div class='add'>+	acr_value = readl(ptpaddr + PTP_ACR);</div><div class='add'>+	acr_value |= PTP_ACR_ATSFC;</div><div class='add'>+	writel(acr_value, ptpaddr + PTP_ACR);</div><div class='add'>+	/* Release the mutex */</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;aux_ts_lock);</div><div class='add'>+</div><div class='add'>+	/* Trigger Internal snapshot signal. Create a rising edge by just toggle</div><div class='add'>+	 * the GPO0 to low and back to high.</div><div class='add'>+	 */</div><div class='add'>+	gpio_value = readl(ioaddr + XGMAC_GPIO_STATUS);</div><div class='add'>+	gpio_value &amp;= ~XGMAC_GPIO_GPO0;</div><div class='add'>+	writel(gpio_value, ioaddr + XGMAC_GPIO_STATUS);</div><div class='add'>+	gpio_value |= XGMAC_GPIO_GPO0;</div><div class='add'>+	writel(gpio_value, ioaddr + XGMAC_GPIO_STATUS);</div><div class='add'>+</div><div class='add'>+	/* Poll for time sync operation done */</div><div class='add'>+	ret = readl_poll_timeout(priv-&gt;ioaddr + XGMAC_INT_STATUS, v,</div><div class='add'>+				 (v &amp; XGMAC_INT_TSIS), 100, 10000);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(priv-&gt;dev, "%s: Wait for time sync operation timeout\n",</div><div class='add'>+			   __func__);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*system = (struct system_counterval_t) {</div><div class='add'>+		.cycles = 0,</div><div class='add'>+		.cs_id = CSID_ARM_ARCH_COUNTER,</div><div class='add'>+		.use_nsecs = false,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	num_snapshot = (readl(ioaddr + XGMAC_TIMESTAMP_STATUS) &amp;</div><div class='add'>+			XGMAC_TIMESTAMP_ATSNS_MASK) &gt;&gt;</div><div class='add'>+			XGMAC_TIMESTAMP_ATSNS_SHIFT;</div><div class='add'>+</div><div class='add'>+	/* Repeat until the timestamps are from the FIFO last segment */</div><div class='add'>+	for (i = 0; i &lt; num_snapshot; i++) {</div><div class='add'>+		read_lock_irqsave(&amp;priv-&gt;ptp_lock, flags);</div><div class='add'>+		stmmac_get_ptptime(priv, ptpaddr, &amp;ptp_time);</div><div class='add'>+		*device = ns_to_ktime(ptp_time);</div><div class='add'>+		read_unlock_irqrestore(&amp;priv-&gt;ptp_lock, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	get_smtgtime(priv-&gt;mii, SMTG_MDIO_ADDR, &amp;smtg_time);</div><div class='add'>+	system-&gt;cycles = smtg_time;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int socfpga_gen5_set_phy_mode(struct socfpga_dwmac *dwmac)</div><div class='ctx'> {</div><div class='ctx'> 	struct regmap *sys_mgr_base_addr = dwmac-&gt;sys_mgr_base_addr;</div><div class='hunk'>@@ -435,6 +551,50 @@ static struct phylink_pcs *socfpga_dwmac_select_pcs(struct stmmac_priv *priv,</div><div class='ctx'> 	return priv-&gt;hw-&gt;phylink_pcs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int socfpga_dwmac_init(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct socfpga_dwmac *dwmac = bsp_priv;</div><div class='add'>+</div><div class='add'>+	return dwmac-&gt;ops-&gt;set_phy_mode(dwmac);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void socfpga_gen5_setup_plat_dat(struct socfpga_dwmac *dwmac)</div><div class='add'>+{</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat = dwmac-&gt;plat_dat;</div><div class='add'>+</div><div class='add'>+	plat_dat-&gt;core_type = DWMAC_CORE_GMAC;</div><div class='add'>+</div><div class='add'>+	/* Rx watchdog timer in dwmac is buggy in this hw */</div><div class='add'>+	plat_dat-&gt;riwt_off = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void socfpga_agilex5_setup_plat_dat(struct socfpga_dwmac *dwmac)</div><div class='add'>+{</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat = dwmac-&gt;plat_dat;</div><div class='add'>+</div><div class='add'>+	plat_dat-&gt;core_type = DWMAC_CORE_XGMAC;</div><div class='add'>+</div><div class='add'>+	/* Enable TSO */</div><div class='add'>+	plat_dat-&gt;flags |= STMMAC_FLAG_TSO_EN;</div><div class='add'>+</div><div class='add'>+	/* Enable TBS */</div><div class='add'>+	switch (plat_dat-&gt;tx_queues_to_use) {</div><div class='add'>+	case 8:</div><div class='add'>+		plat_dat-&gt;tx_queues_cfg[7].tbs_en = true;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case 7:</div><div class='add'>+		plat_dat-&gt;tx_queues_cfg[6].tbs_en = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* Tx Queues 0 - 5 doesn't support TBS on Agilex5 */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Hw supported cross-timestamp */</div><div class='add'>+	plat_dat-&gt;int_snapshot_num = AUX_SNAPSHOT0;</div><div class='add'>+	plat_dat-&gt;crosststamp = smtg_crosststamp;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int socfpga_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat_dat;</div><div class='hunk'>@@ -442,8 +602,6 @@ static int socfpga_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct device		*dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	int			ret;</div><div class='ctx'> 	struct socfpga_dwmac	*dwmac;</div><div class='del'>-	struct net_device	*ndev;</div><div class='del'>-	struct stmmac_priv	*stpriv;</div><div class='ctx'> 	const struct socfpga_dwmac_ops *ops;</div><div class='ctx'> </div><div class='ctx'> 	ops = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='hunk'>@@ -479,113 +637,54 @@ static int socfpga_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* The socfpga driver needs to control the stmmac reset to set the phy</div><div class='add'>+	 * mode. Create a copy of the core reset handle so it can be used by</div><div class='add'>+	 * the driver later.</div><div class='add'>+	 */</div><div class='add'>+	dwmac-&gt;stmmac_rst = plat_dat-&gt;stmmac_rst;</div><div class='ctx'> 	dwmac-&gt;ops = ops;</div><div class='add'>+	dwmac-&gt;plat_dat = plat_dat;</div><div class='add'>+</div><div class='ctx'> 	plat_dat-&gt;bsp_priv = dwmac;</div><div class='ctx'> 	plat_dat-&gt;fix_mac_speed = socfpga_dwmac_fix_mac_speed;</div><div class='add'>+	plat_dat-&gt;init = socfpga_dwmac_init;</div><div class='ctx'> 	plat_dat-&gt;pcs_init = socfpga_dwmac_pcs_init;</div><div class='ctx'> 	plat_dat-&gt;pcs_exit = socfpga_dwmac_pcs_exit;</div><div class='ctx'> 	plat_dat-&gt;select_pcs = socfpga_dwmac_select_pcs;</div><div class='ctx'> </div><div class='del'>-	ret = stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ndev = platform_get_drvdata(pdev);</div><div class='del'>-	stpriv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	/* The socfpga driver needs to control the stmmac reset to set the phy</div><div class='del'>-	 * mode. Create a copy of the core reset handle so it can be used by</div><div class='del'>-	 * the driver later.</div><div class='del'>-	 */</div><div class='del'>-	dwmac-&gt;stmmac_rst = stpriv-&gt;plat-&gt;stmmac_rst;</div><div class='del'>-</div><div class='del'>-	ret = ops-&gt;set_phy_mode(dwmac);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_dvr_remove;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_dvr_remove:</div><div class='del'>-	stmmac_dvr_remove(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM_SLEEP</div><div class='del'>-static int socfpga_dwmac_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct socfpga_dwmac *dwmac_priv = get_stmmac_bsp_priv(dev);</div><div class='del'>-</div><div class='del'>-	dwmac_priv-&gt;ops-&gt;set_phy_mode(priv-&gt;plat-&gt;bsp_priv);</div><div class='del'>-</div><div class='del'>-	/* Before the enet controller is suspended, the phy is suspended.</div><div class='del'>-	 * This causes the phy clock to be gated. The enet controller is</div><div class='del'>-	 * resumed before the phy, so the clock is still gated "off" when</div><div class='del'>-	 * the enet controller is resumed. This code makes sure the phy</div><div class='del'>-	 * is "resumed" before reinitializing the enet controller since</div><div class='del'>-	 * the enet controller depends on an active phy clock to complete</div><div class='del'>-	 * a DMA reset. A DMA reset will "time out" if executed</div><div class='del'>-	 * with no phy clock input on the Synopsys enet controller.</div><div class='del'>-	 * Verified through Synopsys Case #8000711656.</div><div class='del'>-	 *</div><div class='del'>-	 * Note that the phy clock is also gated when the phy is isolated.</div><div class='del'>-	 * Phy "suspend" and "isolate" controls are located in phy basic</div><div class='del'>-	 * control register 0, and can be modified by the phy driver</div><div class='del'>-	 * framework.</div><div class='del'>-	 */</div><div class='del'>-	if (ndev-&gt;phydev)</div><div class='del'>-		phy_resume(ndev-&gt;phydev);</div><div class='add'>+	ops-&gt;setup_plat_dat(dwmac);</div><div class='ctx'> </div><div class='del'>-	return stmmac_resume(dev);</div><div class='add'>+	return devm_stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> }</div><div class='del'>-#endif /* CONFIG_PM_SLEEP */</div><div class='del'>-</div><div class='del'>-static int __maybe_unused socfpga_dwmac_runtime_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	stmmac_bus_clks_config(priv, false);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __maybe_unused socfpga_dwmac_runtime_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	return stmmac_bus_clks_config(priv, true);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct dev_pm_ops socfpga_dwmac_pm_ops = {</div><div class='del'>-	SET_SYSTEM_SLEEP_PM_OPS(stmmac_suspend, socfpga_dwmac_resume)</div><div class='del'>-	SET_RUNTIME_PM_OPS(socfpga_dwmac_runtime_suspend, socfpga_dwmac_runtime_resume, NULL)</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> static const struct socfpga_dwmac_ops socfpga_gen5_ops = {</div><div class='ctx'> 	.set_phy_mode = socfpga_gen5_set_phy_mode,</div><div class='add'>+	.setup_plat_dat = socfpga_gen5_setup_plat_dat,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct socfpga_dwmac_ops socfpga_gen10_ops = {</div><div class='ctx'> 	.set_phy_mode = socfpga_gen10_set_phy_mode,</div><div class='add'>+	.setup_plat_dat = socfpga_gen5_setup_plat_dat,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct socfpga_dwmac_ops socfpga_agilex5_ops = {</div><div class='add'>+	.set_phy_mode = socfpga_gen10_set_phy_mode,</div><div class='add'>+	.setup_plat_dat = socfpga_agilex5_setup_plat_dat,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id socfpga_dwmac_match[] = {</div><div class='ctx'> 	{ .compatible = "altr,socfpga-stmmac", .data = &amp;socfpga_gen5_ops },</div><div class='ctx'> 	{ .compatible = "altr,socfpga-stmmac-a10-s10", .data = &amp;socfpga_gen10_ops },</div><div class='add'>+	{ .compatible = "altr,socfpga-stmmac-agilex5", .data = &amp;socfpga_agilex5_ops },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, socfpga_dwmac_match);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver socfpga_dwmac_driver = {</div><div class='ctx'> 	.probe  = socfpga_dwmac_probe,</div><div class='del'>-	.remove = stmmac_pltfr_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name           = "socfpga-dwmac",</div><div class='del'>-		.pm		= &amp;socfpga_dwmac_pm_ops,</div><div class='add'>+		.pm		= &amp;stmmac_pltfr_pm_ops,</div><div class='ctx'> 		.of_match_table = socfpga_dwmac_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c<br/>new file mode 100644<br/>index 000000000000..44d4ceb8415f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * Sophgo DWMAC platform driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024 Inochi Amaoto &lt;inochiama@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stmmac_platform.h"</div><div class='add'>+</div><div class='add'>+struct sophgo_dwmac_data {</div><div class='add'>+	bool has_internal_rx_delay;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int sophgo_sg2044_dwmac_init(struct platform_device *pdev,</div><div class='add'>+				    struct plat_stmmacenet_data *plat_dat,</div><div class='add'>+				    struct stmmac_resources *stmmac_res)</div><div class='add'>+{</div><div class='add'>+	plat_dat-&gt;clk_tx_i = devm_clk_get_enabled(&amp;pdev-&gt;dev, "tx");</div><div class='add'>+	if (IS_ERR(plat_dat-&gt;clk_tx_i))</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(plat_dat-&gt;clk_tx_i),</div><div class='add'>+				     "failed to get tx clock\n");</div><div class='add'>+</div><div class='add'>+	plat_dat-&gt;flags |= STMMAC_FLAG_SPH_DISABLE;</div><div class='add'>+	plat_dat-&gt;set_clk_tx_rate = stmmac_set_clk_tx_rate;</div><div class='add'>+	plat_dat-&gt;multicast_filter_bins = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sophgo_dwmac_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='add'>+	const struct sophgo_dwmac_data *data;</div><div class='add'>+	struct stmmac_resources stmmac_res;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = stmmac_get_platform_resources(pdev, &amp;stmmac_res);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret,</div><div class='add'>+				     "failed to get platform resources\n");</div><div class='add'>+</div><div class='add'>+	plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);</div><div class='add'>+	if (IS_ERR(plat_dat))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(plat_dat),</div><div class='add'>+				     "failed to parse DT parameters\n");</div><div class='add'>+</div><div class='add'>+	ret = sophgo_sg2044_dwmac_init(pdev, plat_dat, &amp;stmmac_res);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	data = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	if (data &amp;&amp; data-&gt;has_internal_rx_delay) {</div><div class='add'>+		plat_dat-&gt;phy_interface = phy_fix_phy_mode_for_mac_delays(plat_dat-&gt;phy_interface,</div><div class='add'>+									  false, true);</div><div class='add'>+		if (plat_dat-&gt;phy_interface == PHY_INTERFACE_MODE_NA)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return stmmac_dvr_probe(dev, plat_dat, &amp;stmmac_res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct sophgo_dwmac_data sg2042_dwmac_data = {</div><div class='add'>+	.has_internal_rx_delay = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id sophgo_dwmac_match[] = {</div><div class='add'>+	{ .compatible = "sophgo,sg2042-dwmac", .data = &amp;sg2042_dwmac_data },</div><div class='add'>+	{ .compatible = "sophgo,sg2044-dwmac" },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, sophgo_dwmac_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver sophgo_dwmac_driver = {</div><div class='add'>+	.probe  = sophgo_dwmac_probe,</div><div class='add'>+	.remove = stmmac_pltfr_remove,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "sophgo-dwmac",</div><div class='add'>+		.pm = &amp;stmmac_pltfr_pm_ops,</div><div class='add'>+		.of_match_table = sophgo_dwmac_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(sophgo_dwmac_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Inochi Amaoto &lt;inochiama@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Sophgo DWMAC platform driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c<br/>index 421666279dd3..16b955a6d77b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c</a></div><div class='hunk'>@@ -15,8 +15,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "stmmac_platform.h"</div><div class='ctx'> </div><div class='del'>-#define STARFIVE_DWMAC_PHY_INFT_RGMII		0x1</div><div class='del'>-#define STARFIVE_DWMAC_PHY_INFT_RMII		0x4</div><div class='ctx'> #define STARFIVE_DWMAC_PHY_INFT_FIELD		0x7U</div><div class='ctx'> </div><div class='ctx'> #define JH7100_SYSMAIN_REGISTER49_DLYCHAIN	0xc8</div><div class='hunk'>@@ -27,62 +25,23 @@ struct starfive_dwmac_data {</div><div class='ctx'> </div><div class='ctx'> struct starfive_dwmac {</div><div class='ctx'> 	struct device *dev;</div><div class='del'>-	struct clk *clk_tx;</div><div class='ctx'> 	const struct starfive_dwmac_data *data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void starfive_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='del'>-{</div><div class='del'>-	struct starfive_dwmac *dwmac = priv;</div><div class='del'>-	unsigned long rate;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	rate = clk_get_rate(dwmac-&gt;clk_tx);</div><div class='del'>-</div><div class='del'>-	switch (speed) {</div><div class='del'>-	case SPEED_1000:</div><div class='del'>-		rate = 125000000;</div><div class='del'>-		break;</div><div class='del'>-	case SPEED_100:</div><div class='del'>-		rate = 25000000;</div><div class='del'>-		break;</div><div class='del'>-	case SPEED_10:</div><div class='del'>-		rate = 2500000;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dwmac-&gt;dev, "invalid speed %u\n", speed);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = clk_set_rate(dwmac-&gt;clk_tx, rate);</div><div class='del'>-	if (err)</div><div class='del'>-		dev_err(dwmac-&gt;dev, "failed to set tx rate %lu\n", rate);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> {</div><div class='ctx'> 	struct starfive_dwmac *dwmac = plat_dat-&gt;bsp_priv;</div><div class='ctx'> 	struct regmap *regmap;</div><div class='ctx'> 	unsigned int args[2];</div><div class='del'>-	unsigned int mode;</div><div class='add'>+	int phy_intf_sel;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		mode = STARFIVE_DWMAC_PHY_INFT_RMII;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		mode = STARFIVE_DWMAC_PHY_INFT_RGMII;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dwmac-&gt;dev, "unsupported interface %d\n",</div><div class='del'>-			plat_dat-&gt;mac_interface);</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	phy_intf_sel = stmmac_get_phy_intf_sel(plat_dat-&gt;phy_interface);</div><div class='add'>+	if (phy_intf_sel != PHY_INTF_SEL_RGMII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RMII) {</div><div class='add'>+		dev_err(dwmac-&gt;dev, "unsupported interface %s\n",</div><div class='add'>+			phy_modes(plat_dat-&gt;phy_interface));</div><div class='add'>+		return phy_intf_sel &lt; 0 ? phy_intf_sel : -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	regmap = syscon_regmap_lookup_by_phandle_args(dwmac-&gt;dev-&gt;of_node,</div><div class='hunk'>@@ -94,7 +53,7 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 	/* args[0]:offset  args[1]: shift */</div><div class='ctx'> 	err = regmap_update_bits(regmap, args[0],</div><div class='ctx'> 				 STARFIVE_DWMAC_PHY_INFT_FIELD &lt;&lt; args[1],</div><div class='del'>-				 mode &lt;&lt; args[1]);</div><div class='add'>+				 phy_intf_sel &lt;&lt; args[1]);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return dev_err_probe(dwmac-&gt;dev, err, "error setting phy mode\n");</div><div class='ctx'> </div><div class='hunk'>@@ -133,9 +92,9 @@ static int starfive_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dwmac-&gt;data = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	dwmac-&gt;clk_tx = devm_clk_get_enabled(&amp;pdev-&gt;dev, "tx");</div><div class='del'>-	if (IS_ERR(dwmac-&gt;clk_tx))</div><div class='del'>-		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(dwmac-&gt;clk_tx),</div><div class='add'>+	plat_dat-&gt;clk_tx_i = devm_clk_get_enabled(&amp;pdev-&gt;dev, "tx");</div><div class='add'>+	if (IS_ERR(plat_dat-&gt;clk_tx_i))</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(plat_dat-&gt;clk_tx_i),</div><div class='ctx'> 				     "error getting tx clock\n");</div><div class='ctx'> </div><div class='ctx'> 	clk_gtx = devm_clk_get_enabled(&amp;pdev-&gt;dev, "gtx");</div><div class='hunk'>@@ -150,9 +109,10 @@ static int starfive_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	 * internally, because rgmii_rxin will be adaptively adjusted.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!device_property_read_bool(&amp;pdev-&gt;dev, "starfive,tx-use-rgmii-clk"))</div><div class='del'>-		plat_dat-&gt;fix_mac_speed = starfive_dwmac_fix_mac_speed;</div><div class='add'>+		plat_dat-&gt;set_clk_tx_rate = stmmac_set_clk_tx_rate;</div><div class='ctx'> </div><div class='ctx'> 	dwmac-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	plat_dat-&gt;flags |= STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP;</div><div class='ctx'> 	plat_dat-&gt;bsp_priv = dwmac;</div><div class='ctx'> 	plat_dat-&gt;dma_cfg-&gt;dche = true;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c<br/>index a6ff02d905a9..f50547b67fbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c</a></div><div class='hunk'>@@ -21,17 +21,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "stmmac_platform.h"</div><div class='ctx'> </div><div class='del'>-#define DWMAC_125MHZ	125000000</div><div class='ctx'> #define DWMAC_50MHZ	50000000</div><div class='del'>-#define DWMAC_25MHZ	25000000</div><div class='del'>-#define DWMAC_2_5MHZ	2500000</div><div class='ctx'> </div><div class='del'>-#define IS_PHY_IF_MODE_RGMII(iface)	(iface == PHY_INTERFACE_MODE_RGMII || \</div><div class='del'>-			iface == PHY_INTERFACE_MODE_RGMII_ID || \</div><div class='del'>-			iface == PHY_INTERFACE_MODE_RGMII_RXID || \</div><div class='del'>-			iface == PHY_INTERFACE_MODE_RGMII_TXID)</div><div class='del'>-</div><div class='del'>-#define IS_PHY_IF_MODE_GBIT(iface)	(IS_PHY_IF_MODE_RGMII(iface) || \</div><div class='add'>+#define IS_PHY_IF_MODE_GBIT(iface)	(phy_interface_mode_is_rgmii(iface) || \</div><div class='ctx'> 					 iface == PHY_INTERFACE_MODE_GMII)</div><div class='ctx'> </div><div class='ctx'> /* STiH4xx register definitions (STiH407/STiH410 families)</div><div class='hunk'>@@ -85,13 +77,9 @@</div><div class='ctx'>  *	001-RGMII</div><div class='ctx'>  *	010-SGMII</div><div class='ctx'>  *	100-RMII</div><div class='add'>+ * These are the DW MAC phy_intf_sel values.</div><div class='ctx'>  */</div><div class='ctx'> #define MII_PHY_SEL_MASK	GENMASK(4, 2)</div><div class='del'>-#define ETH_PHY_SEL_RMII	BIT(4)</div><div class='del'>-#define ETH_PHY_SEL_SGMII	BIT(3)</div><div class='del'>-#define ETH_PHY_SEL_RGMII	BIT(2)</div><div class='del'>-#define ETH_PHY_SEL_GMII	0x0</div><div class='del'>-#define ETH_PHY_SEL_MII		0x0</div><div class='ctx'> </div><div class='ctx'> struct sti_dwmac {</div><div class='ctx'> 	phy_interface_t interface;	/* MII interface */</div><div class='hunk'>@@ -102,21 +90,12 @@ struct sti_dwmac {</div><div class='ctx'> 	int clk_sel_reg;	/* GMAC ext clk selection register */</div><div class='ctx'> 	struct regmap *regmap;</div><div class='ctx'> 	bool gmac_en;</div><div class='del'>-	u32 speed;</div><div class='del'>-	void (*fix_retime_src)(void *priv, unsigned int speed, unsigned int mode);</div><div class='add'>+	int speed;</div><div class='add'>+	void (*fix_retime_src)(void *priv, int speed, unsigned int mode);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct sti_dwmac_of_data {</div><div class='del'>-	void (*fix_retime_src)(void *priv, unsigned int speed, unsigned int mode);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static u32 phy_intf_sels[] = {</div><div class='del'>-	[PHY_INTERFACE_MODE_MII] = ETH_PHY_SEL_MII,</div><div class='del'>-	[PHY_INTERFACE_MODE_GMII] = ETH_PHY_SEL_GMII,</div><div class='del'>-	[PHY_INTERFACE_MODE_RGMII] = ETH_PHY_SEL_RGMII,</div><div class='del'>-	[PHY_INTERFACE_MODE_RGMII_ID] = ETH_PHY_SEL_RGMII,</div><div class='del'>-	[PHY_INTERFACE_MODE_SGMII] = ETH_PHY_SEL_SGMII,</div><div class='del'>-	[PHY_INTERFACE_MODE_RMII] = ETH_PHY_SEL_RMII,</div><div class='add'>+	void (*fix_retime_src)(void *priv, int speed, unsigned int mode);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -135,12 +114,12 @@ static u32 stih4xx_tx_retime_val[] = {</div><div class='ctx'> 				 | STIH4XX_ETH_SEL_INTERNAL_NOTEXT_PHYCLK,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void stih4xx_fix_retime_src(void *priv, u32 spd, unsigned int mode)</div><div class='add'>+static void stih4xx_fix_retime_src(void *priv, int spd, unsigned int mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct sti_dwmac *dwmac = priv;</div><div class='ctx'> 	u32 src = dwmac-&gt;tx_retime_src;</div><div class='ctx'> 	u32 reg = dwmac-&gt;ctrl_reg;</div><div class='del'>-	u32 freq = 0;</div><div class='add'>+	long freq = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (dwmac-&gt;interface == PHY_INTERFACE_MODE_MII) {</div><div class='ctx'> 		src = TX_RETIME_SRC_TXCLK;</div><div class='hunk'>@@ -151,40 +130,44 @@ static void stih4xx_fix_retime_src(void *priv, u32 spd, unsigned int mode)</div><div class='ctx'> 			src = TX_RETIME_SRC_CLKGEN;</div><div class='ctx'> 			freq = DWMAC_50MHZ;</div><div class='ctx'> 		}</div><div class='del'>-	} else if (IS_PHY_IF_MODE_RGMII(dwmac-&gt;interface)) {</div><div class='add'>+	} else if (phy_interface_mode_is_rgmii(dwmac-&gt;interface)) {</div><div class='ctx'> 		/* On GiGa clk source can be either ext or from clkgen */</div><div class='del'>-		if (spd == SPEED_1000) {</div><div class='del'>-			freq = DWMAC_125MHZ;</div><div class='del'>-		} else {</div><div class='add'>+		freq = rgmii_clock(spd);</div><div class='add'>+</div><div class='add'>+		if (spd != SPEED_1000 &amp;&amp; freq &gt; 0)</div><div class='ctx'> 			/* Switch to clkgen for these speeds */</div><div class='ctx'> 			src = TX_RETIME_SRC_CLKGEN;</div><div class='del'>-			if (spd == SPEED_100)</div><div class='del'>-				freq = DWMAC_25MHZ;</div><div class='del'>-			else if (spd == SPEED_10)</div><div class='del'>-				freq = DWMAC_2_5MHZ;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (src == TX_RETIME_SRC_CLKGEN &amp;&amp; freq)</div><div class='add'>+	if (src == TX_RETIME_SRC_CLKGEN &amp;&amp; freq &gt; 0)</div><div class='ctx'> 		clk_set_rate(dwmac-&gt;clk, freq);</div><div class='ctx'> </div><div class='ctx'> 	regmap_update_bits(dwmac-&gt;regmap, reg, STIH4XX_RETIME_SRC_MASK,</div><div class='ctx'> 			   stih4xx_tx_retime_val[src]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sti_dwmac_set_mode(struct sti_dwmac *dwmac)</div><div class='add'>+static int sti_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='del'>-	struct regmap *regmap = dwmac-&gt;regmap;</div><div class='del'>-	int iface = dwmac-&gt;interface;</div><div class='del'>-	u32 reg = dwmac-&gt;ctrl_reg;</div><div class='del'>-	u32 val;</div><div class='add'>+	struct sti_dwmac *dwmac = bsp_priv;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	u32 reg, val;</div><div class='add'>+</div><div class='add'>+	regmap = dwmac-&gt;regmap;</div><div class='add'>+	reg = dwmac-&gt;ctrl_reg;</div><div class='ctx'> </div><div class='ctx'> 	if (dwmac-&gt;gmac_en)</div><div class='ctx'> 		regmap_update_bits(regmap, reg, EN_MASK, EN);</div><div class='ctx'> </div><div class='del'>-	regmap_update_bits(regmap, reg, MII_PHY_SEL_MASK, phy_intf_sels[iface]);</div><div class='add'>+	if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RGMII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_SGMII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RMII)</div><div class='add'>+		phy_intf_sel = PHY_INTF_SEL_GMII_MII;</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(regmap, reg, MII_PHY_SEL_MASK,</div><div class='add'>+			   FIELD_PREP(MII_PHY_SEL_MASK, phy_intf_sel));</div><div class='ctx'> </div><div class='del'>-	val = (iface == PHY_INTERFACE_MODE_REVMII) ? 0 : ENMII;</div><div class='add'>+	val = (dwmac-&gt;interface == PHY_INTERFACE_MODE_REVMII) ? 0 : ENMII;</div><div class='ctx'> 	regmap_update_bits(regmap, reg, ENMII_MASK, val);</div><div class='ctx'> </div><div class='ctx'> 	dwmac-&gt;fix_retime_src(dwmac, dwmac-&gt;speed, 0);</div><div class='hunk'>@@ -193,7 +176,8 @@ static int sti_dwmac_set_mode(struct sti_dwmac *dwmac)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sti_dwmac_parse_data(struct sti_dwmac *dwmac,</div><div class='del'>-				struct platform_device *pdev)</div><div class='add'>+				struct platform_device *pdev,</div><div class='add'>+				struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> {</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='hunk'>@@ -207,22 +191,12 @@ static int sti_dwmac_parse_data(struct sti_dwmac *dwmac,</div><div class='ctx'> 	if (res)</div><div class='ctx'> 		dwmac-&gt;clk_sel_reg = res-&gt;start;</div><div class='ctx'> </div><div class='del'>-	regmap = syscon_regmap_lookup_by_phandle(np, "st,syscon");</div><div class='add'>+	regmap = syscon_regmap_lookup_by_phandle_args(np, "st,syscon",</div><div class='add'>+						      1, &amp;dwmac-&gt;ctrl_reg);</div><div class='ctx'> 	if (IS_ERR(regmap))</div><div class='ctx'> 		return PTR_ERR(regmap);</div><div class='ctx'> </div><div class='del'>-	err = of_property_read_u32_index(np, "st,syscon", 1, &amp;dwmac-&gt;ctrl_reg);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "Can't get sysconfig ctrl offset (%d)\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = of_get_phy_mode(np, &amp;dwmac-&gt;interface);</div><div class='del'>-	if (err &amp;&amp; err != -ENODEV) {</div><div class='del'>-		dev_err(dev, "Can't get phy-mode\n");</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	dwmac-&gt;interface = plat_dat-&gt;phy_interface;</div><div class='ctx'> 	dwmac-&gt;regmap = regmap;</div><div class='ctx'> 	dwmac-&gt;gmac_en = of_property_read_bool(np, "st,gmac_en");</div><div class='ctx'> 	dwmac-&gt;ext_phyclk = of_property_read_bool(np, "st,ext-phyclk");</div><div class='hunk'>@@ -255,6 +229,20 @@ static int sti_dwmac_parse_data(struct sti_dwmac *dwmac,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int sti_dwmac_init(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct sti_dwmac *dwmac = bsp_priv;</div><div class='add'>+</div><div class='add'>+	return clk_prepare_enable(dwmac-&gt;clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sti_dwmac_exit(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct sti_dwmac *dwmac = bsp_priv;</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(dwmac-&gt;clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int sti_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat_dat;</div><div class='hunk'>@@ -281,7 +269,7 @@ static int sti_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!dwmac)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ret = sti_dwmac_parse_data(dwmac, pdev);</div><div class='add'>+	ret = sti_dwmac_parse_data(dwmac, pdev, plat_dat);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unable to parse OF data\n");</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -290,62 +278,14 @@ static int sti_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	dwmac-&gt;fix_retime_src = data-&gt;fix_retime_src;</div><div class='ctx'> </div><div class='ctx'> 	plat_dat-&gt;bsp_priv = dwmac;</div><div class='add'>+	plat_dat-&gt;set_phy_intf_sel = sti_set_phy_intf_sel;</div><div class='ctx'> 	plat_dat-&gt;fix_mac_speed = data-&gt;fix_retime_src;</div><div class='add'>+	plat_dat-&gt;init = sti_dwmac_init;</div><div class='add'>+	plat_dat-&gt;exit = sti_dwmac_exit;</div><div class='ctx'> </div><div class='del'>-	ret = clk_prepare_enable(dwmac-&gt;clk);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = sti_dwmac_set_mode(dwmac);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto disable_clk;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto disable_clk;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-disable_clk:</div><div class='del'>-	clk_disable_unprepare(dwmac-&gt;clk);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sti_dwmac_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct sti_dwmac *dwmac = get_stmmac_bsp_priv(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	stmmac_dvr_remove(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	clk_disable_unprepare(dwmac-&gt;clk);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM_SLEEP</div><div class='del'>-static int sti_dwmac_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct sti_dwmac *dwmac = get_stmmac_bsp_priv(dev);</div><div class='del'>-	int ret = stmmac_suspend(dev);</div><div class='del'>-</div><div class='del'>-	clk_disable_unprepare(dwmac-&gt;clk);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return devm_stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sti_dwmac_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct sti_dwmac *dwmac = get_stmmac_bsp_priv(dev);</div><div class='del'>-</div><div class='del'>-	clk_prepare_enable(dwmac-&gt;clk);</div><div class='del'>-	sti_dwmac_set_mode(dwmac);</div><div class='del'>-</div><div class='del'>-	return stmmac_resume(dev);</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_PM_SLEEP */</div><div class='del'>-</div><div class='del'>-static SIMPLE_DEV_PM_OPS(sti_dwmac_pm_ops, sti_dwmac_suspend,</div><div class='del'>-					   sti_dwmac_resume);</div><div class='del'>-</div><div class='ctx'> static const struct sti_dwmac_of_data stih4xx_dwmac_data = {</div><div class='ctx'> 	.fix_retime_src = stih4xx_fix_retime_src,</div><div class='ctx'> };</div><div class='hunk'>@@ -358,10 +298,9 @@ MODULE_DEVICE_TABLE(of, sti_dwmac_match);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver sti_dwmac_driver = {</div><div class='ctx'> 	.probe  = sti_dwmac_probe,</div><div class='del'>-	.remove = sti_dwmac_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name           = "sti-dwmac",</div><div class='del'>-		.pm		= &amp;sti_dwmac_pm_ops,</div><div class='add'>+		.pm		= &amp;stmmac_pltfr_pm_ops,</div><div class='ctx'> 		.of_match_table = sti_dwmac_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c<br/>index 1e8bac665cc9..e1b260ed4790 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c</a></div><div class='hunk'>@@ -47,23 +47,18 @@</div><div class='ctx'>  *------------------------------------------</div><div class='ctx'>  */</div><div class='ctx'> #define SYSCFG_PMCR_ETH_SEL_MII		BIT(20)</div><div class='del'>-#define SYSCFG_PMCR_ETH_SEL_RGMII	BIT(21)</div><div class='del'>-#define SYSCFG_PMCR_ETH_SEL_RMII	BIT(23)</div><div class='del'>-#define SYSCFG_PMCR_ETH_SEL_GMII	0</div><div class='add'>+#define SYSCFG_PMCR_PHY_INTF_SEL_MASK	GENMASK(23, 21)</div><div class='ctx'> #define SYSCFG_MCU_ETH_SEL_MII		0</div><div class='ctx'> #define SYSCFG_MCU_ETH_SEL_RMII		1</div><div class='ctx'> </div><div class='ctx'> /* STM32MP2 register definitions */</div><div class='ctx'> #define SYSCFG_MP2_ETH_MASK		GENMASK(31, 0)</div><div class='ctx'> </div><div class='add'>+#define SYSCFG_ETHCR_ETH_SEL_MASK	GENMASK(6, 4)</div><div class='ctx'> #define SYSCFG_ETHCR_ETH_PTP_CLK_SEL	BIT(2)</div><div class='ctx'> #define SYSCFG_ETHCR_ETH_CLK_SEL	BIT(1)</div><div class='ctx'> #define SYSCFG_ETHCR_ETH_REF_CLK_SEL	BIT(0)</div><div class='ctx'> </div><div class='del'>-#define SYSCFG_ETHCR_ETH_SEL_MII	0</div><div class='del'>-#define SYSCFG_ETHCR_ETH_SEL_RGMII	BIT(4)</div><div class='del'>-#define SYSCFG_ETHCR_ETH_SEL_RMII	BIT(6)</div><div class='del'>-</div><div class='ctx'> /* STM32MPx register definitions</div><div class='ctx'>  *</div><div class='ctx'>  * Below table summarizes the clock requirement and clock sources for</div><div class='hunk'>@@ -119,7 +114,7 @@ struct stm32_ops {</div><div class='ctx'> 	u32 syscfg_clr_off;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int stm32_dwmac_clk_enable(struct stm32_dwmac *dwmac, bool resume)</div><div class='add'>+static int stm32_dwmac_clk_enable(struct stm32_dwmac *dwmac)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -127,11 +122,9 @@ static int stm32_dwmac_clk_enable(struct stm32_dwmac *dwmac, bool resume)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_clk_tx;</div><div class='ctx'> </div><div class='del'>-	if (!dwmac-&gt;ops-&gt;clk_rx_enable_in_suspend || !resume) {</div><div class='del'>-		ret = clk_prepare_enable(dwmac-&gt;clk_rx);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err_clk_rx;</div><div class='del'>-	}</div><div class='add'>+	ret = clk_prepare_enable(dwmac-&gt;clk_rx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_clk_rx;</div><div class='ctx'> </div><div class='ctx'> 	ret = clk_prepare_enable(dwmac-&gt;syscfg_clk);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -148,15 +141,14 @@ static int stm32_dwmac_clk_enable(struct stm32_dwmac *dwmac, bool resume)</div><div class='ctx'> err_clk_eth_ck:</div><div class='ctx'> 	clk_disable_unprepare(dwmac-&gt;syscfg_clk);</div><div class='ctx'> err_syscfg_clk:</div><div class='del'>-	if (!dwmac-&gt;ops-&gt;clk_rx_enable_in_suspend || !resume)</div><div class='del'>-		clk_disable_unprepare(dwmac-&gt;clk_rx);</div><div class='add'>+	clk_disable_unprepare(dwmac-&gt;clk_rx);</div><div class='ctx'> err_clk_rx:</div><div class='ctx'> 	clk_disable_unprepare(dwmac-&gt;clk_tx);</div><div class='ctx'> err_clk_tx:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat, bool resume)</div><div class='add'>+static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_dwmac *dwmac = plat_dat-&gt;bsp_priv;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -167,14 +159,14 @@ static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat, bool resume)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return stm32_dwmac_clk_enable(dwmac, resume);</div><div class='add'>+	return stm32_dwmac_clk_enable(dwmac);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int stm32mp1_select_ethck_external(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_dwmac *dwmac = plat_dat-&gt;bsp_priv;</div><div class='ctx'> </div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='add'>+	switch (plat_dat-&gt;phy_interface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MII:</div><div class='ctx'> 		dwmac-&gt;enable_eth_ck = dwmac-&gt;ext_phyclk;</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -196,7 +188,7 @@ static int stm32mp1_select_ethck_external(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 	default:</div><div class='ctx'> 		dwmac-&gt;enable_eth_ck = false;</div><div class='ctx'> 		dev_err(dwmac-&gt;dev, "Mode %s not supported",</div><div class='del'>-			phy_modes(plat_dat-&gt;mac_interface));</div><div class='add'>+			phy_modes(plat_dat-&gt;phy_interface));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -209,7 +201,7 @@ static int stm32mp1_validate_ethck_rate(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 	if (!dwmac-&gt;enable_eth_ck)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='add'>+	switch (plat_dat-&gt;phy_interface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_GMII:</div><div class='ctx'> 		if (clk_rate == ETH_CK_F_25M)</div><div class='hunk'>@@ -231,17 +223,20 @@ static int stm32mp1_validate_ethck_rate(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_err(dwmac-&gt;dev, "Mode %s does not match eth-ck frequency %d Hz",</div><div class='del'>-		phy_modes(plat_dat-&gt;mac_interface), clk_rate);</div><div class='add'>+		phy_modes(plat_dat-&gt;phy_interface), clk_rate);</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat)</div><div class='add'>+static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat,</div><div class='add'>+				   u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_dwmac *dwmac = plat_dat-&gt;bsp_priv;</div><div class='ctx'> 	u32 reg = dwmac-&gt;mode_reg;</div><div class='del'>-	int val = 0;</div><div class='add'>+	int val;</div><div class='ctx'> </div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='add'>+	val = FIELD_PREP(SYSCFG_PMCR_PHY_INTF_SEL_MASK, phy_intf_sel);</div><div class='add'>+</div><div class='add'>+	switch (plat_dat-&gt;phy_interface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MII:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * STM32MP15xx supports both MII and GMII, STM32MP13xx MII only.</div><div class='hunk'>@@ -253,12 +248,10 @@ static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 			val |= SYSCFG_PMCR_ETH_SEL_MII;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_GMII:</div><div class='del'>-		val = SYSCFG_PMCR_ETH_SEL_GMII;</div><div class='ctx'> 		if (dwmac-&gt;enable_eth_ck)</div><div class='ctx'> 			val |= SYSCFG_PMCR_ETH_CLK_SEL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		val = SYSCFG_PMCR_ETH_SEL_RMII;</div><div class='ctx'> 		if (dwmac-&gt;enable_eth_ck)</div><div class='ctx'> 			val |= SYSCFG_PMCR_ETH_REF_CLK_SEL;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -266,18 +259,17 @@ static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		val = SYSCFG_PMCR_ETH_SEL_RGMII;</div><div class='ctx'> 		if (dwmac-&gt;enable_eth_ck)</div><div class='ctx'> 			val |= SYSCFG_PMCR_ETH_CLK_SEL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(dwmac-&gt;dev, "Mode %s not supported",</div><div class='del'>-			phy_modes(plat_dat-&gt;mac_interface));</div><div class='add'>+			phy_modes(plat_dat-&gt;phy_interface));</div><div class='ctx'> 		/* Do not manage others interfaces */</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_dbg(dwmac-&gt;dev, "Mode %s", phy_modes(plat_dat-&gt;mac_interface));</div><div class='add'>+	dev_dbg(dwmac-&gt;dev, "Mode %s", phy_modes(plat_dat-&gt;phy_interface));</div><div class='ctx'> </div><div class='ctx'> 	/* Shift value at correct ethernet MAC offset in SYSCFG_PMCSETR */</div><div class='ctx'> 	val &lt;&lt;= ffs(dwmac-&gt;mode_mask) - ffs(SYSCFG_MP1_ETH_MASK);</div><div class='hunk'>@@ -291,18 +283,20 @@ static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 				 dwmac-&gt;mode_mask, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int stm32mp2_configure_syscfg(struct plat_stmmacenet_data *plat_dat)</div><div class='add'>+static int stm32mp2_configure_syscfg(struct plat_stmmacenet_data *plat_dat,</div><div class='add'>+				     u8 phy_intf_sel)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_dwmac *dwmac = plat_dat-&gt;bsp_priv;</div><div class='ctx'> 	u32 reg = dwmac-&gt;mode_reg;</div><div class='del'>-	int val = 0;</div><div class='add'>+	int val;</div><div class='ctx'> </div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='add'>+	val = FIELD_PREP(SYSCFG_ETHCR_ETH_SEL_MASK, phy_intf_sel);</div><div class='add'>+</div><div class='add'>+	switch (plat_dat-&gt;phy_interface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MII:</div><div class='ctx'> 		/* ETH_REF_CLK_SEL bit in SYSCFG register is not applicable in MII mode */</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		val = SYSCFG_ETHCR_ETH_SEL_RMII;</div><div class='ctx'> 		if (dwmac-&gt;enable_eth_ck) {</div><div class='ctx'> 			/* Internal clock ETH_CLK of 50MHz from RCC is used */</div><div class='ctx'> 			val |= SYSCFG_ETHCR_ETH_REF_CLK_SEL;</div><div class='hunk'>@@ -312,8 +306,6 @@ static int stm32mp2_configure_syscfg(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		val = SYSCFG_ETHCR_ETH_SEL_RGMII;</div><div class='del'>-		fallthrough;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_GMII:</div><div class='ctx'> 		if (dwmac-&gt;enable_eth_ck) {</div><div class='ctx'> 			/* Internal clock ETH_CLK of 125MHz from RCC is used */</div><div class='hunk'>@@ -322,12 +314,12 @@ static int stm32mp2_configure_syscfg(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(dwmac-&gt;dev, "Mode %s not supported",</div><div class='del'>-			phy_modes(plat_dat-&gt;mac_interface));</div><div class='add'>+			phy_modes(plat_dat-&gt;phy_interface));</div><div class='ctx'> 		/* Do not manage others interfaces */</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_dbg(dwmac-&gt;dev, "Mode %s", phy_modes(plat_dat-&gt;mac_interface));</div><div class='add'>+	dev_dbg(dwmac-&gt;dev, "Mode %s", phy_modes(plat_dat-&gt;phy_interface));</div><div class='ctx'> </div><div class='ctx'> 	/* Select PTP (IEEE1588) clock selection from RCC (ck_ker_ethxptp) */</div><div class='ctx'> 	val |= SYSCFG_ETHCR_ETH_PTP_CLK_SEL;</div><div class='hunk'>@@ -340,7 +332,7 @@ static int stm32mp2_configure_syscfg(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> {</div><div class='ctx'> 	struct stm32_dwmac *dwmac = plat_dat-&gt;bsp_priv;</div><div class='del'>-	int ret;</div><div class='add'>+	int phy_intf_sel, ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = stm32mp1_select_ethck_external(plat_dat);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -350,10 +342,19 @@ static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	phy_intf_sel = stmmac_get_phy_intf_sel(plat_dat-&gt;phy_interface);</div><div class='add'>+	if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RGMII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RMII) {</div><div class='add'>+		dev_err(dwmac-&gt;dev, "Mode %s not supported\n",</div><div class='add'>+			phy_modes(plat_dat-&gt;phy_interface));</div><div class='add'>+		return phy_intf_sel &lt; 0 ? phy_intf_sel : -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!dwmac-&gt;ops-&gt;is_mp2)</div><div class='del'>-		return stm32mp1_configure_pmcr(plat_dat);</div><div class='add'>+		return stm32mp1_configure_pmcr(plat_dat, phy_intf_sel);</div><div class='ctx'> 	else</div><div class='del'>-		return stm32mp2_configure_syscfg(plat_dat);</div><div class='add'>+		return stm32mp2_configure_syscfg(plat_dat, phy_intf_sel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='hunk'>@@ -362,7 +363,7 @@ static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 	u32 reg = dwmac-&gt;mode_reg;</div><div class='ctx'> 	int val;</div><div class='ctx'> </div><div class='del'>-	switch (plat_dat-&gt;mac_interface) {</div><div class='add'>+	switch (plat_dat-&gt;phy_interface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MII:</div><div class='ctx'> 		val = SYSCFG_MCU_ETH_SEL_MII;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -371,23 +372,21 @@ static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(dwmac-&gt;dev, "Mode %s not supported",</div><div class='del'>-			phy_modes(plat_dat-&gt;mac_interface));</div><div class='add'>+			phy_modes(plat_dat-&gt;phy_interface));</div><div class='ctx'> 		/* Do not manage others interfaces */</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_dbg(dwmac-&gt;dev, "Mode %s", phy_modes(plat_dat-&gt;mac_interface));</div><div class='add'>+	dev_dbg(dwmac-&gt;dev, "Mode %s", phy_modes(plat_dat-&gt;phy_interface));</div><div class='ctx'> </div><div class='ctx'> 	return regmap_update_bits(dwmac-&gt;regmap, reg,</div><div class='ctx'> 				 SYSCFG_MCU_ETH_MASK, val &lt;&lt; 23);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac, bool suspend)</div><div class='add'>+static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac)</div><div class='ctx'> {</div><div class='ctx'> 	clk_disable_unprepare(dwmac-&gt;clk_tx);</div><div class='del'>-	if (!dwmac-&gt;ops-&gt;clk_rx_enable_in_suspend || !suspend)</div><div class='del'>-		clk_disable_unprepare(dwmac-&gt;clk_rx);</div><div class='del'>-</div><div class='add'>+	clk_disable_unprepare(dwmac-&gt;clk_rx);</div><div class='ctx'> 	clk_disable_unprepare(dwmac-&gt;syscfg_clk);</div><div class='ctx'> 	if (dwmac-&gt;enable_eth_ck)</div><div class='ctx'> 		clk_disable_unprepare(dwmac-&gt;clk_eth_ck);</div><div class='hunk'>@@ -419,16 +418,11 @@ static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Get mode register */</div><div class='del'>-	dwmac-&gt;regmap = syscon_regmap_lookup_by_phandle(np, "st,syscon");</div><div class='add'>+	dwmac-&gt;regmap = syscon_regmap_lookup_by_phandle_args(np, "st,syscon",</div><div class='add'>+							     1, &amp;dwmac-&gt;mode_reg);</div><div class='ctx'> 	if (IS_ERR(dwmac-&gt;regmap))</div><div class='ctx'> 		return PTR_ERR(dwmac-&gt;regmap);</div><div class='ctx'> </div><div class='del'>-	err = of_property_read_u32_index(np, "st,syscon", 1, &amp;dwmac-&gt;mode_reg);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(dev, "Can't get sysconfig mode offset (%d)\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (dwmac-&gt;ops-&gt;is_mp2)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -508,6 +502,26 @@ static int stm32mp1_parse_data(struct stm32_dwmac *dwmac,</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int stm32_dwmac_suspend(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct stm32_dwmac *dwmac = bsp_priv;</div><div class='add'>+</div><div class='add'>+	stm32_dwmac_clk_disable(dwmac);</div><div class='add'>+</div><div class='add'>+	return dwmac-&gt;ops-&gt;suspend ? dwmac-&gt;ops-&gt;suspend(dwmac) : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stm32_dwmac_resume(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dev));</div><div class='add'>+	struct stm32_dwmac *dwmac = bsp_priv;</div><div class='add'>+</div><div class='add'>+	if (dwmac-&gt;ops-&gt;resume)</div><div class='add'>+		dwmac-&gt;ops-&gt;resume(dwmac);</div><div class='add'>+</div><div class='add'>+	return stm32_dwmac_init(priv-&gt;plat);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int stm32_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat_dat;</div><div class='hunk'>@@ -543,20 +557,37 @@ static int stm32_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	plat_dat-&gt;flags |= STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP;</div><div class='ctx'> 	plat_dat-&gt;bsp_priv = dwmac;</div><div class='add'>+	plat_dat-&gt;suspend = stm32_dwmac_suspend;</div><div class='add'>+	plat_dat-&gt;resume = stm32_dwmac_resume;</div><div class='ctx'> </div><div class='del'>-	ret = stm32_dwmac_init(plat_dat, false);</div><div class='add'>+	ret = stm32_dwmac_init(plat_dat);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	/* If this platform requires the clock to be running in suspend,</div><div class='add'>+	 * prepare and enable the receive clock an additional time to keep</div><div class='add'>+	 * it running.</div><div class='add'>+	 */</div><div class='add'>+	if (dwmac-&gt;ops-&gt;clk_rx_enable_in_suspend) {</div><div class='add'>+		ret = clk_prepare_enable(dwmac-&gt;clk_rx);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err_clk_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_clk_disable;</div><div class='add'>+		goto err_clk_disable_suspend;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_clk_disable_suspend:</div><div class='add'>+	if (dwmac-&gt;ops-&gt;clk_rx_enable_in_suspend)</div><div class='add'>+		clk_disable_unprepare(dwmac-&gt;clk_rx);</div><div class='add'>+</div><div class='ctx'> err_clk_disable:</div><div class='del'>-	stm32_dwmac_clk_disable(dwmac, false);</div><div class='add'>+	stm32_dwmac_clk_disable(dwmac);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -569,7 +600,15 @@ static void stm32_dwmac_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	stmmac_dvr_remove(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	stm32_dwmac_clk_disable(dwmac, false);</div><div class='add'>+	/* If this platform requires the clock to be running in suspend,</div><div class='add'>+	 * we need to disable and unprepare the receive clock an additional</div><div class='add'>+	 * time to balance the extra clk_prepare_enable() in the probe</div><div class='add'>+	 * function.</div><div class='add'>+	 */</div><div class='add'>+	if (dwmac-&gt;ops-&gt;clk_rx_enable_in_suspend)</div><div class='add'>+		clk_disable_unprepare(dwmac-&gt;clk_rx);</div><div class='add'>+</div><div class='add'>+	stm32_dwmac_clk_disable(dwmac);</div><div class='ctx'> </div><div class='ctx'> 	if (dwmac-&gt;irq_pwr_wakeup &gt;= 0) {</div><div class='ctx'> 		dev_pm_clear_wake_irq(&amp;pdev-&gt;dev);</div><div class='hunk'>@@ -587,50 +626,6 @@ static void stm32mp1_resume(struct stm32_dwmac *dwmac)</div><div class='ctx'> 	clk_disable_unprepare(dwmac-&gt;clk_ethstp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM_SLEEP</div><div class='del'>-static int stm32_dwmac_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct stm32_dwmac *dwmac = priv-&gt;plat-&gt;bsp_priv;</div><div class='del'>-</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_suspend(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	stm32_dwmac_clk_disable(dwmac, true);</div><div class='del'>-</div><div class='del'>-	if (dwmac-&gt;ops-&gt;suspend)</div><div class='del'>-		ret = dwmac-&gt;ops-&gt;suspend(dwmac);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int stm32_dwmac_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct stm32_dwmac *dwmac = priv-&gt;plat-&gt;bsp_priv;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (dwmac-&gt;ops-&gt;resume)</div><div class='del'>-		dwmac-&gt;ops-&gt;resume(dwmac);</div><div class='del'>-</div><div class='del'>-	ret = stm32_dwmac_init(priv-&gt;plat, true);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_resume(dev);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_PM_SLEEP */</div><div class='del'>-</div><div class='del'>-static SIMPLE_DEV_PM_OPS(stm32_dwmac_pm_ops,</div><div class='del'>-	stm32_dwmac_suspend, stm32_dwmac_resume);</div><div class='del'>-</div><div class='ctx'> static struct stm32_ops stm32mcu_dwmac_data = {</div><div class='ctx'> 	.set_mode = stm32mcu_set_mode</div><div class='ctx'> };</div><div class='hunk'>@@ -678,7 +673,7 @@ static struct platform_driver stm32_dwmac_driver = {</div><div class='ctx'> 	.remove = stm32_dwmac_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name           = "stm32-dwmac",</div><div class='del'>-		.pm		= &amp;stm32_dwmac_pm_ops,</div><div class='add'>+		.pm		= &amp;stmmac_simple_pm_ops,</div><div class='ctx'> 		.of_match_table = stm32_dwmac_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c<br/>new file mode 100644<br/>index 000000000000..862df173d963<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * dwmac-sun55i.c - Allwinner sun55i GMAC200 specific glue layer</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * syscon parts taken from dwmac-sun8i.c, which is</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017 Corentin Labbe &lt;clabbe.montjoie@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/stmmac.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stmmac.h"</div><div class='add'>+#include "stmmac_platform.h"</div><div class='add'>+</div><div class='add'>+#define SYSCON_REG		0x34</div><div class='add'>+</div><div class='add'>+/* RMII specific bits */</div><div class='add'>+#define SYSCON_RMII_EN		BIT(13) /* 1: enable RMII (overrides EPIT) */</div><div class='add'>+/* Generic system control EMAC_CLK bits */</div><div class='add'>+#define SYSCON_ETXDC_MASK		GENMASK(12, 10)</div><div class='add'>+#define SYSCON_ERXDC_MASK		GENMASK(9, 5)</div><div class='add'>+/* EMAC PHY Interface Type */</div><div class='add'>+#define SYSCON_EPIT			BIT(2) /* 1: RGMII, 0: MII */</div><div class='add'>+#define SYSCON_ETCS_MASK		GENMASK(1, 0)</div><div class='add'>+#define SYSCON_ETCS_MII		0x0</div><div class='add'>+#define SYSCON_ETCS_EXT_GMII	0x1</div><div class='add'>+#define SYSCON_ETCS_INT_GMII	0x2</div><div class='add'>+</div><div class='add'>+static int sun55i_gmac200_set_syscon(struct device *dev,</div><div class='add'>+				     struct plat_stmmacenet_data *plat)</div><div class='add'>+{</div><div class='add'>+	struct device_node *node = dev-&gt;of_node;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	u32 val, reg = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	regmap = syscon_regmap_lookup_by_phandle(node, "syscon");</div><div class='add'>+	if (IS_ERR(regmap))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(regmap), "Unable to map syscon\n");</div><div class='add'>+</div><div class='add'>+	if (!of_property_read_u32(node, "tx-internal-delay-ps", &amp;val)) {</div><div class='add'>+		if (val % 100)</div><div class='add'>+			return dev_err_probe(dev, -EINVAL,</div><div class='add'>+					     "tx-delay must be a multiple of 100ps\n");</div><div class='add'>+		val /= 100;</div><div class='add'>+		dev_dbg(dev, "set tx-delay to %x\n", val);</div><div class='add'>+		if (!FIELD_FIT(SYSCON_ETXDC_MASK, val))</div><div class='add'>+			return dev_err_probe(dev, -EINVAL,</div><div class='add'>+					     "TX clock delay exceeds maximum (%u00ps &gt; %lu00ps)\n",</div><div class='add'>+					     val, FIELD_MAX(SYSCON_ETXDC_MASK));</div><div class='add'>+</div><div class='add'>+		reg |= FIELD_PREP(SYSCON_ETXDC_MASK, val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!of_property_read_u32(node, "rx-internal-delay-ps", &amp;val)) {</div><div class='add'>+		if (val % 100)</div><div class='add'>+			return dev_err_probe(dev, -EINVAL,</div><div class='add'>+					     "rx-delay must be a multiple of 100ps\n");</div><div class='add'>+		val /= 100;</div><div class='add'>+		dev_dbg(dev, "set rx-delay to %x\n", val);</div><div class='add'>+		if (!FIELD_FIT(SYSCON_ERXDC_MASK, val))</div><div class='add'>+			return dev_err_probe(dev, -EINVAL,</div><div class='add'>+					     "RX clock delay exceeds maximum (%u00ps &gt; %lu00ps)\n",</div><div class='add'>+					     val, FIELD_MAX(SYSCON_ERXDC_MASK));</div><div class='add'>+</div><div class='add'>+		reg |= FIELD_PREP(SYSCON_ERXDC_MASK, val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (plat-&gt;phy_interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+		/* default */</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		reg |= SYSCON_EPIT | SYSCON_ETCS_INT_GMII;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+		reg |= SYSCON_RMII_EN;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return dev_err_probe(dev, -EINVAL, "Unsupported interface mode: %s",</div><div class='add'>+				     phy_modes(plat-&gt;phy_interface));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(regmap, SYSCON_REG, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to write to syscon\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sun55i_gmac200_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='add'>+	struct stmmac_resources stmmac_res;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = stmmac_get_platform_resources(pdev, &amp;stmmac_res);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);</div><div class='add'>+	if (IS_ERR(plat_dat))</div><div class='add'>+		return PTR_ERR(plat_dat);</div><div class='add'>+</div><div class='add'>+	/* BSP disables it */</div><div class='add'>+	plat_dat-&gt;flags |= STMMAC_FLAG_SPH_DISABLE;</div><div class='add'>+	plat_dat-&gt;host_dma_width = 32;</div><div class='add'>+</div><div class='add'>+	ret = sun55i_gmac200_set_syscon(dev, plat_dat);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	clk = devm_clk_get_enabled(dev, "mbus");</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(clk),</div><div class='add'>+				     "Failed to get or enable MBUS clock\n");</div><div class='add'>+</div><div class='add'>+	ret = devm_regulator_get_enable_optional(dev, "phy");</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to get or enable PHY supply\n");</div><div class='add'>+</div><div class='add'>+	return devm_stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id sun55i_gmac200_match[] = {</div><div class='add'>+	{ .compatible = "allwinner,sun55i-a523-gmac200" },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, sun55i_gmac200_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver sun55i_gmac200_driver = {</div><div class='add'>+	.probe  = sun55i_gmac200_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name           = "dwmac-sun55i",</div><div class='add'>+		.pm		= &amp;stmmac_pltfr_pm_ops,</div><div class='add'>+		.of_match_table = sun55i_gmac200_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(sun55i_gmac200_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Chen-Yu Tsai &lt;wens@csie.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Allwinner sun55i GMAC200 specific glue layer");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c<br/>index 4b7b2582a120..8aa496ac85cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c</a></div><div class='hunk'>@@ -31,10 +31,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* struct emac_variant - Describe dwmac-sun8i hardware variant</div><div class='del'>- * @default_syscon_value:	The default value of the EMAC register in syscon</div><div class='del'>- *				This value is used for disabling properly EMAC</div><div class='del'>- *				and used as a good starting value in case of the</div><div class='del'>- *				boot process(uboot) leave some stuff.</div><div class='ctx'>  * @syscon_field		reg_field for the syscon's gmac register</div><div class='ctx'>  * @soc_has_internal_phy:	Does the MAC embed an internal PHY</div><div class='ctx'>  * @support_mii:		Does the MAC handle MII</div><div class='hunk'>@@ -48,7 +44,6 @@</div><div class='ctx'>  *				value of zero indicates this is not supported.</div><div class='ctx'>  */</div><div class='ctx'> struct emac_variant {</div><div class='del'>-	u32 default_syscon_value;</div><div class='ctx'> 	const struct reg_field *syscon_field;</div><div class='ctx'> 	bool soc_has_internal_phy;</div><div class='ctx'> 	bool support_mii;</div><div class='hunk'>@@ -94,7 +89,6 @@ static const struct reg_field sun8i_ccu_reg_field = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct emac_variant emac_variant_h3 = {</div><div class='del'>-	.default_syscon_value = 0x58000,</div><div class='ctx'> 	.syscon_field = &amp;sun8i_syscon_reg_field,</div><div class='ctx'> 	.soc_has_internal_phy = true,</div><div class='ctx'> 	.support_mii = true,</div><div class='hunk'>@@ -105,14 +99,12 @@ static const struct emac_variant emac_variant_h3 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct emac_variant emac_variant_v3s = {</div><div class='del'>-	.default_syscon_value = 0x38000,</div><div class='ctx'> 	.syscon_field = &amp;sun8i_syscon_reg_field,</div><div class='ctx'> 	.soc_has_internal_phy = true,</div><div class='ctx'> 	.support_mii = true</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct emac_variant emac_variant_a83t = {</div><div class='del'>-	.default_syscon_value = 0,</div><div class='ctx'> 	.syscon_field = &amp;sun8i_syscon_reg_field,</div><div class='ctx'> 	.soc_has_internal_phy = false,</div><div class='ctx'> 	.support_mii = true,</div><div class='hunk'>@@ -122,7 +114,6 @@ static const struct emac_variant emac_variant_a83t = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct emac_variant emac_variant_r40 = {</div><div class='del'>-	.default_syscon_value = 0,</div><div class='ctx'> 	.syscon_field = &amp;sun8i_ccu_reg_field,</div><div class='ctx'> 	.support_mii = true,</div><div class='ctx'> 	.support_rgmii = true,</div><div class='hunk'>@@ -130,7 +121,6 @@ static const struct emac_variant emac_variant_r40 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct emac_variant emac_variant_a64 = {</div><div class='del'>-	.default_syscon_value = 0,</div><div class='ctx'> 	.syscon_field = &amp;sun8i_syscon_reg_field,</div><div class='ctx'> 	.soc_has_internal_phy = false,</div><div class='ctx'> 	.support_mii = true,</div><div class='hunk'>@@ -141,7 +131,6 @@ static const struct emac_variant emac_variant_a64 = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct emac_variant emac_variant_h6 = {</div><div class='del'>-	.default_syscon_value = 0x50000,</div><div class='ctx'> 	.syscon_field = &amp;sun8i_syscon_reg_field,</div><div class='ctx'> 	/* The "Internal PHY" of H6 is not on the die. It's on the</div><div class='ctx'> 	 * co-packaged AC200 chip instead.</div><div class='hunk'>@@ -582,16 +571,16 @@ static const struct stmmac_dma_ops sun8i_dwmac_dma_ops = {</div><div class='ctx'> </div><div class='ctx'> static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv);</div><div class='ctx'> </div><div class='del'>-static int sun8i_dwmac_init(struct platform_device *pdev, void *priv)</div><div class='add'>+static int sun8i_dwmac_init(struct device *dev, void *priv)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='ctx'> 	struct sunxi_priv_data *gmac = priv;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (gmac-&gt;regulator) {</div><div class='ctx'> 		ret = regulator_enable(gmac-&gt;regulator);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "Fail to enable regulator\n");</div><div class='add'>+			dev_err(dev, "Fail to enable regulator\n");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -933,25 +922,11 @@ static int sun8i_dwmac_set_syscon(struct device *dev,</div><div class='ctx'> 	struct sunxi_priv_data *gmac = plat-&gt;bsp_priv;</div><div class='ctx'> 	struct device_node *node = dev-&gt;of_node;</div><div class='ctx'> 	int ret;</div><div class='del'>-	u32 reg, val;</div><div class='del'>-</div><div class='del'>-	ret = regmap_field_read(gmac-&gt;regmap_field, &amp;val);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(dev, "Fail to read from regmap field.\n");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	reg = gmac-&gt;variant-&gt;default_syscon_value;</div><div class='del'>-	if (reg != val)</div><div class='del'>-		dev_warn(dev,</div><div class='del'>-			 "Current syscon value is not the default %x (expect %x)\n",</div><div class='del'>-			 val, reg);</div><div class='add'>+	u32 reg = 0, val;</div><div class='ctx'> </div><div class='ctx'> 	if (gmac-&gt;variant-&gt;soc_has_internal_phy) {</div><div class='ctx'> 		if (of_property_read_bool(node, "allwinner,leds-active-low"))</div><div class='ctx'> 			reg |= H3_EPHY_LED_POL;</div><div class='del'>-		else</div><div class='del'>-			reg &amp;= ~H3_EPHY_LED_POL;</div><div class='ctx'> </div><div class='ctx'> 		/* Force EPHY xtal frequency to 24MHz. */</div><div class='ctx'> 		reg |= H3_EPHY_CLK_SEL;</div><div class='hunk'>@@ -964,12 +939,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev,</div><div class='ctx'> 		/* of_mdio_parse_addr returns a valid (0 ~ 31) PHY</div><div class='ctx'> 		 * address. No need to mask it again.</div><div class='ctx'> 		 */</div><div class='del'>-		reg |= 1 &lt;&lt; H3_EPHY_ADDR_SHIFT;</div><div class='del'>-	} else {</div><div class='del'>-		/* For SoCs without internal PHY the PHY selection bit should be</div><div class='del'>-		 * set to 0 (external PHY).</div><div class='del'>-		 */</div><div class='del'>-		reg &amp;= ~H3_EPHY_SELECT;</div><div class='add'>+		reg |= ret &lt;&lt; H3_EPHY_ADDR_SHIFT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &amp;val)) {</div><div class='hunk'>@@ -980,8 +950,6 @@ static int sun8i_dwmac_set_syscon(struct device *dev,</div><div class='ctx'> 		val /= 100;</div><div class='ctx'> 		dev_dbg(dev, "set tx-delay to %x\n", val);</div><div class='ctx'> 		if (val &lt;= gmac-&gt;variant-&gt;tx_delay_max) {</div><div class='del'>-			reg &amp;= ~(gmac-&gt;variant-&gt;tx_delay_max &lt;&lt;</div><div class='del'>-				 SYSCON_ETXDC_SHIFT);</div><div class='ctx'> 			reg |= (val &lt;&lt; SYSCON_ETXDC_SHIFT);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dev_err(dev, "Invalid TX clock delay: %d\n",</div><div class='hunk'>@@ -998,8 +966,6 @@ static int sun8i_dwmac_set_syscon(struct device *dev,</div><div class='ctx'> 		val /= 100;</div><div class='ctx'> 		dev_dbg(dev, "set rx-delay to %x\n", val);</div><div class='ctx'> 		if (val &lt;= gmac-&gt;variant-&gt;rx_delay_max) {</div><div class='del'>-			reg &amp;= ~(gmac-&gt;variant-&gt;rx_delay_max &lt;&lt;</div><div class='del'>-				 SYSCON_ERXDC_SHIFT);</div><div class='ctx'> 			reg |= (val &lt;&lt; SYSCON_ERXDC_SHIFT);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dev_err(dev, "Invalid RX clock delay: %d\n",</div><div class='hunk'>@@ -1008,12 +974,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Clear interface mode bits */</div><div class='del'>-	reg &amp;= ~(SYSCON_ETCS_MASK | SYSCON_EPIT);</div><div class='del'>-	if (gmac-&gt;variant-&gt;support_rmii)</div><div class='del'>-		reg &amp;= ~SYSCON_RMII_EN;</div><div class='del'>-</div><div class='del'>-	switch (plat-&gt;mac_interface) {</div><div class='add'>+	switch (plat-&gt;phy_interface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MII:</div><div class='ctx'> 		/* default */</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1028,7 +989,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		dev_err(dev, "Unsupported interface mode: %s",</div><div class='del'>-			phy_modes(plat-&gt;mac_interface));</div><div class='add'>+			phy_modes(plat-&gt;phy_interface));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1039,12 +1000,12 @@ static int sun8i_dwmac_set_syscon(struct device *dev,</div><div class='ctx'> </div><div class='ctx'> static void sun8i_dwmac_unset_syscon(struct sunxi_priv_data *gmac)</div><div class='ctx'> {</div><div class='del'>-	u32 reg = gmac-&gt;variant-&gt;default_syscon_value;</div><div class='del'>-</div><div class='del'>-	regmap_field_write(gmac-&gt;regmap_field, reg);</div><div class='add'>+	if (gmac-&gt;variant-&gt;soc_has_internal_phy)</div><div class='add'>+		regmap_field_write(gmac-&gt;regmap_field,</div><div class='add'>+				   (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)</div><div class='add'>+static void sun8i_dwmac_exit(struct device *dev, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct sunxi_priv_data *gmac = priv;</div><div class='ctx'> </div><div class='hunk'>@@ -1079,15 +1040,10 @@ static const struct stmmac_ops sun8i_dwmac_ops = {</div><div class='ctx'> 	.set_mac_loopback = sun8i_dwmac_set_mac_loopback,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct mac_device_info *sun8i_dwmac_setup(void *ppriv)</div><div class='add'>+static int sun8i_dwmac_setup(void *ppriv, struct mac_device_info *mac)</div><div class='ctx'> {</div><div class='del'>-	struct mac_device_info *mac;</div><div class='ctx'> 	struct stmmac_priv *priv = ppriv;</div><div class='ctx'> </div><div class='del'>-	mac = devm_kzalloc(priv-&gt;device, sizeof(*mac), GFP_KERNEL);</div><div class='del'>-	if (!mac)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='ctx'> 	mac-&gt;pcsr = priv-&gt;ioaddr;</div><div class='ctx'> 	mac-&gt;mac = &amp;sun8i_dwmac_ops;</div><div class='ctx'> 	mac-&gt;dma = &amp;sun8i_dwmac_dma_ops;</div><div class='hunk'>@@ -1118,7 +1074,7 @@ static struct mac_device_info *sun8i_dwmac_setup(void *ppriv)</div><div class='ctx'> 	/* Synopsys Id is not available */</div><div class='ctx'> 	priv-&gt;synopsys_id = 0;</div><div class='ctx'> </div><div class='del'>-	return mac;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct regmap *sun8i_dwmac_get_syscon_from_dev(struct device_node *node)</div><div class='hunk'>@@ -1155,11 +1111,10 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct stmmac_resources stmmac_res;</div><div class='ctx'> 	struct sunxi_priv_data *gmac;</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='del'>-	phy_interface_t interface;</div><div class='del'>-	int ret;</div><div class='ctx'> 	struct stmmac_priv *priv;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	struct regmap *regmap;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = stmmac_get_platform_resources(pdev, &amp;stmmac_res);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -1219,10 +1174,6 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = of_get_phy_mode(dev-&gt;of_node, &amp;interface);</div><div class='del'>-	if (ret)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);</div><div class='ctx'> 	if (IS_ERR(plat_dat))</div><div class='ctx'> 		return PTR_ERR(plat_dat);</div><div class='hunk'>@@ -1230,14 +1181,13 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* platform data specifying hardware features and callbacks.</div><div class='ctx'> 	 * hardware features were copied from Allwinner drivers.</div><div class='ctx'> 	 */</div><div class='del'>-	plat_dat-&gt;mac_interface = interface;</div><div class='ctx'> 	plat_dat-&gt;rx_coe = STMMAC_RX_COE_TYPE2;</div><div class='ctx'> 	plat_dat-&gt;tx_coe = 1;</div><div class='ctx'> 	plat_dat-&gt;flags |= STMMAC_FLAG_HAS_SUN8I;</div><div class='ctx'> 	plat_dat-&gt;bsp_priv = gmac;</div><div class='ctx'> 	plat_dat-&gt;init = sun8i_dwmac_init;</div><div class='ctx'> 	plat_dat-&gt;exit = sun8i_dwmac_exit;</div><div class='del'>-	plat_dat-&gt;setup = sun8i_dwmac_setup;</div><div class='add'>+	plat_dat-&gt;mac_setup = sun8i_dwmac_setup;</div><div class='ctx'> 	plat_dat-&gt;tx_fifo_size = 4096;</div><div class='ctx'> 	plat_dat-&gt;rx_fifo_size = 16384;</div><div class='ctx'> </div><div class='hunk'>@@ -1245,14 +1195,10 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = sun8i_dwmac_init(pdev, plat_dat-&gt;bsp_priv);</div><div class='add'>+	ret = stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto dwmac_syscon;</div><div class='ctx'> </div><div class='del'>-	ret = stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto dwmac_exit;</div><div class='del'>-</div><div class='ctx'> 	ndev = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='ctx'> 	priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -1289,9 +1235,7 @@ dwmac_mux:</div><div class='ctx'> 	clk_put(gmac-&gt;ephy_clk);</div><div class='ctx'> dwmac_remove:</div><div class='ctx'> 	pm_runtime_put_noidle(&amp;pdev-&gt;dev);</div><div class='del'>-	stmmac_dvr_remove(&amp;pdev-&gt;dev);</div><div class='del'>-dwmac_exit:</div><div class='del'>-	sun8i_dwmac_exit(pdev, gmac);</div><div class='add'>+	stmmac_pltfr_remove(pdev);</div><div class='ctx'> dwmac_syscon:</div><div class='ctx'> 	sun8i_dwmac_unset_syscon(gmac);</div><div class='ctx'> </div><div class='hunk'>@@ -1321,7 +1265,7 @@ static void sun8i_dwmac_shutdown(struct platform_device *pdev)</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct sunxi_priv_data *gmac = priv-&gt;plat-&gt;bsp_priv;</div><div class='ctx'> </div><div class='del'>-	sun8i_dwmac_exit(pdev, gmac);</div><div class='add'>+	sun8i_dwmac_exit(&amp;pdev-&gt;dev, gmac);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id sun8i_dwmac_match[] = {</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c<br/>index 9ae318436c4a..52593ba3a3a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c</a></div><div class='hunk'>@@ -27,7 +27,7 @@ struct sunxi_priv_data {</div><div class='ctx'> #define SUN7I_GMAC_GMII_RGMII_RATE	125000000</div><div class='ctx'> #define SUN7I_GMAC_MII_RATE		25000000</div><div class='ctx'> </div><div class='del'>-static int sun7i_gmac_init(struct platform_device *pdev, void *priv)</div><div class='add'>+static int sun7i_gmac_init(struct device *dev, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct sunxi_priv_data *gmac = priv;</div><div class='ctx'> 	int ret = 0;</div><div class='hunk'>@@ -58,7 +58,7 @@ static int sun7i_gmac_init(struct platform_device *pdev, void *priv)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sun7i_gmac_exit(struct platform_device *pdev, void *priv)</div><div class='add'>+static void sun7i_gmac_exit(struct device *dev, void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct sunxi_priv_data *gmac = priv;</div><div class='ctx'> </div><div class='hunk'>@@ -72,28 +72,28 @@ static void sun7i_gmac_exit(struct platform_device *pdev, void *priv)</div><div class='ctx'> 		regulator_disable(gmac-&gt;regulator);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sun7i_fix_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='add'>+static int sun7i_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,</div><div class='add'>+				 phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct sunxi_priv_data *gmac = priv;</div><div class='del'>-</div><div class='del'>-	/* only GMII mode requires us to reconfigure the clock lines */</div><div class='del'>-	if (gmac-&gt;interface != PHY_INTERFACE_MODE_GMII)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (gmac-&gt;clk_enabled) {</div><div class='del'>-		clk_disable(gmac-&gt;tx_clk);</div><div class='del'>-		gmac-&gt;clk_enabled = 0;</div><div class='del'>-	}</div><div class='del'>-	clk_unprepare(gmac-&gt;tx_clk);</div><div class='del'>-</div><div class='del'>-	if (speed == 1000) {</div><div class='del'>-		clk_set_rate(gmac-&gt;tx_clk, SUN7I_GMAC_GMII_RGMII_RATE);</div><div class='del'>-		clk_prepare_enable(gmac-&gt;tx_clk);</div><div class='del'>-		gmac-&gt;clk_enabled = 1;</div><div class='del'>-	} else {</div><div class='del'>-		clk_set_rate(gmac-&gt;tx_clk, SUN7I_GMAC_MII_RATE);</div><div class='del'>-		clk_prepare(gmac-&gt;tx_clk);</div><div class='add'>+	struct sunxi_priv_data *gmac = bsp_priv;</div><div class='add'>+</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_GMII) {</div><div class='add'>+		if (gmac-&gt;clk_enabled) {</div><div class='add'>+			clk_disable(gmac-&gt;tx_clk);</div><div class='add'>+			gmac-&gt;clk_enabled = 0;</div><div class='add'>+		}</div><div class='add'>+		clk_unprepare(gmac-&gt;tx_clk);</div><div class='add'>+</div><div class='add'>+		if (speed == 1000) {</div><div class='add'>+			clk_set_rate(gmac-&gt;tx_clk, SUN7I_GMAC_GMII_RGMII_RATE);</div><div class='add'>+			clk_prepare_enable(gmac-&gt;tx_clk);</div><div class='add'>+			gmac-&gt;clk_enabled = 1;</div><div class='add'>+		} else {</div><div class='add'>+			clk_set_rate(gmac-&gt;tx_clk, SUN7I_GMAC_MII_RATE);</div><div class='add'>+			clk_prepare(gmac-&gt;tx_clk);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sun7i_gmac_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -116,11 +116,7 @@ static int sun7i_gmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!gmac)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ret = of_get_phy_mode(dev-&gt;of_node, &amp;gmac-&gt;interface);</div><div class='del'>-	if (ret &amp;&amp; ret != -ENODEV) {</div><div class='del'>-		dev_err(dev, "Can't get phy-mode\n");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='add'>+	gmac-&gt;interface = plat_dat-&gt;phy_interface;</div><div class='ctx'> </div><div class='ctx'> 	gmac-&gt;tx_clk = devm_clk_get(dev, "allwinner_gmac_tx");</div><div class='ctx'> 	if (IS_ERR(gmac-&gt;tx_clk)) {</div><div class='hunk'>@@ -140,28 +136,15 @@ static int sun7i_gmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* platform data specifying hardware features and callbacks.</div><div class='ctx'> 	 * hardware features were copied from Allwinner drivers. */</div><div class='ctx'> 	plat_dat-&gt;tx_coe = 1;</div><div class='del'>-	plat_dat-&gt;has_gmac = true;</div><div class='add'>+	plat_dat-&gt;core_type = DWMAC_CORE_GMAC;</div><div class='ctx'> 	plat_dat-&gt;bsp_priv = gmac;</div><div class='ctx'> 	plat_dat-&gt;init = sun7i_gmac_init;</div><div class='ctx'> 	plat_dat-&gt;exit = sun7i_gmac_exit;</div><div class='del'>-	plat_dat-&gt;fix_mac_speed = sun7i_fix_speed;</div><div class='add'>+	plat_dat-&gt;set_clk_tx_rate = sun7i_set_clk_tx_rate;</div><div class='ctx'> 	plat_dat-&gt;tx_fifo_size = 4096;</div><div class='ctx'> 	plat_dat-&gt;rx_fifo_size = 16384;</div><div class='ctx'> </div><div class='del'>-	ret = sun7i_gmac_init(pdev, plat_dat-&gt;bsp_priv);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_dvr_probe(&amp;pdev-&gt;dev, plat_dat, &amp;stmmac_res);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_gmac_exit;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_gmac_exit:</div><div class='del'>-	sun7i_gmac_exit(pdev, plat_dat-&gt;bsp_priv);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return devm_stmmac_pltfr_probe(pdev, plat_dat, &amp;stmmac_res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id sun7i_dwmac_match[] = {</div><div class='hunk'>@@ -172,7 +155,6 @@ MODULE_DEVICE_TABLE(of, sun7i_dwmac_match);</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver sun7i_dwmac_driver = {</div><div class='ctx'> 	.probe  = sun7i_gmac_probe,</div><div class='del'>-	.remove = stmmac_pltfr_remove,</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name           = "sun7i-dwmac",</div><div class='ctx'> 		.pm		= &amp;stmmac_pltfr_pm_ops,</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c<br/>index 3827997d2132..d765acbe3754 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#include &lt;linux/iommu.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -19,6 +20,8 @@ struct tegra_mgbe {</div><div class='ctx'> 	struct reset_control *rst_mac;</div><div class='ctx'> 	struct reset_control *rst_pcs;</div><div class='ctx'> </div><div class='add'>+	u32 iommu_sid;</div><div class='add'>+</div><div class='ctx'> 	void __iomem *hv;</div><div class='ctx'> 	void __iomem *regs;</div><div class='ctx'> 	void __iomem *xpcs;</div><div class='hunk'>@@ -50,7 +53,6 @@ struct tegra_mgbe {</div><div class='ctx'> #define MGBE_WRAP_COMMON_INTR_ENABLE	0x8704</div><div class='ctx'> #define MAC_SBD_INTR			BIT(2)</div><div class='ctx'> #define MGBE_WRAP_AXI_ASID0_CTRL	0x8400</div><div class='del'>-#define MGBE_SID			0x6</div><div class='ctx'> </div><div class='ctx'> static int __maybe_unused tegra_mgbe_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -84,7 +86,7 @@ static int __maybe_unused tegra_mgbe_resume(struct device *dev)</div><div class='ctx'> 	writel(MAC_SBD_INTR, mgbe-&gt;regs + MGBE_WRAP_COMMON_INTR_ENABLE);</div><div class='ctx'> </div><div class='ctx'> 	/* Program SID */</div><div class='del'>-	writel(MGBE_SID, mgbe-&gt;hv + MGBE_WRAP_AXI_ASID0_CTRL);</div><div class='add'>+	writel(mgbe-&gt;iommu_sid, mgbe-&gt;hv + MGBE_WRAP_AXI_ASID0_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	value = readl(mgbe-&gt;xpcs + XPCS_WRAP_UPHY_STATUS);</div><div class='ctx'> 	if ((value &amp; XPCS_WRAP_UPHY_STATUS_TX_P_UP) == 0) {</div><div class='hunk'>@@ -241,6 +243,12 @@ static int tegra_mgbe_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (IS_ERR(mgbe-&gt;xpcs))</div><div class='ctx'> 		return PTR_ERR(mgbe-&gt;xpcs);</div><div class='ctx'> </div><div class='add'>+	/* get controller's stream id from iommu property in device tree */</div><div class='add'>+	if (!tegra_dev_iommu_get_stream_id(mgbe-&gt;dev, &amp;mgbe-&gt;iommu_sid)) {</div><div class='add'>+		dev_err(mgbe-&gt;dev, "failed to get iommu stream id\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	res.addr = mgbe-&gt;regs;</div><div class='ctx'> 	res.irq = irq;</div><div class='ctx'> </div><div class='hunk'>@@ -300,7 +308,7 @@ static int tegra_mgbe_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto disable_clks;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	plat-&gt;has_xgmac = 1;</div><div class='add'>+	plat-&gt;core_type = DWMAC_CORE_XGMAC;</div><div class='ctx'> 	plat-&gt;flags |= STMMAC_FLAG_TSO_EN;</div><div class='ctx'> 	plat-&gt;pmt = 1;</div><div class='ctx'> 	plat-&gt;bsp_priv = mgbe;</div><div class='hunk'>@@ -346,7 +354,7 @@ static int tegra_mgbe_probe(struct platform_device *pdev)</div><div class='ctx'> 	writel(MAC_SBD_INTR, mgbe-&gt;regs + MGBE_WRAP_COMMON_INTR_ENABLE);</div><div class='ctx'> </div><div class='ctx'> 	/* Program SID */</div><div class='del'>-	writel(MGBE_SID, mgbe-&gt;hv + MGBE_WRAP_AXI_ASID0_CTRL);</div><div class='add'>+	writel(mgbe-&gt;iommu_sid, mgbe-&gt;hv + MGBE_WRAP_AXI_ASID0_CTRL);</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;flags |= STMMAC_FLAG_SERDES_UP_AFTER_PHY_LINKUP;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c<br/>new file mode 100644<br/>index 000000000000..e291028ba56e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c</a></div><div class='hunk'>@@ -0,0 +1,286 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * T-HEAD DWMAC platform driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2021 Alibaba Group Holding Limited.</div><div class='add'>+ * Copyright (C) 2023 Jisheng Zhang &lt;jszhang@kernel.org&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stmmac_platform.h"</div><div class='add'>+</div><div class='add'>+#define GMAC_CLK_EN			0x00</div><div class='add'>+#define  GMAC_TX_CLK_EN			BIT(1)</div><div class='add'>+#define  GMAC_TX_CLK_N_EN		BIT(2)</div><div class='add'>+#define  GMAC_TX_CLK_OUT_EN		BIT(3)</div><div class='add'>+#define  GMAC_RX_CLK_EN			BIT(4)</div><div class='add'>+#define  GMAC_RX_CLK_N_EN		BIT(5)</div><div class='add'>+#define  GMAC_EPHY_REF_CLK_EN		BIT(6)</div><div class='add'>+#define GMAC_RXCLK_DELAY_CTRL		0x04</div><div class='add'>+#define  GMAC_RXCLK_BYPASS		BIT(15)</div><div class='add'>+#define  GMAC_RXCLK_INVERT		BIT(14)</div><div class='add'>+#define  GMAC_RXCLK_DELAY		GENMASK(4, 0)</div><div class='add'>+#define GMAC_TXCLK_DELAY_CTRL		0x08</div><div class='add'>+#define  GMAC_TXCLK_BYPASS		BIT(15)</div><div class='add'>+#define  GMAC_TXCLK_INVERT		BIT(14)</div><div class='add'>+#define  GMAC_TXCLK_DELAY		GENMASK(4, 0)</div><div class='add'>+#define GMAC_PLLCLK_DIV			0x0c</div><div class='add'>+#define  GMAC_PLLCLK_DIV_EN		BIT(31)</div><div class='add'>+#define  GMAC_PLLCLK_DIV_NUM		GENMASK(7, 0)</div><div class='add'>+#define GMAC_GTXCLK_SEL			0x18</div><div class='add'>+#define  GMAC_GTXCLK_SEL_PLL		BIT(0)</div><div class='add'>+#define GMAC_INTF_CTRL			0x1c</div><div class='add'>+#define  PHY_INTF_MASK			BIT(0)</div><div class='add'>+#define  PHY_INTF_RGMII			FIELD_PREP(PHY_INTF_MASK, 1)</div><div class='add'>+#define  PHY_INTF_MII_GMII		FIELD_PREP(PHY_INTF_MASK, 0)</div><div class='add'>+#define GMAC_TXCLK_OEN			0x20</div><div class='add'>+#define  TXCLK_DIR_MASK			BIT(0)</div><div class='add'>+#define  TXCLK_DIR_OUTPUT		FIELD_PREP(TXCLK_DIR_MASK, 0)</div><div class='add'>+#define  TXCLK_DIR_INPUT		FIELD_PREP(TXCLK_DIR_MASK, 1)</div><div class='add'>+</div><div class='add'>+struct thead_dwmac {</div><div class='add'>+	struct plat_stmmacenet_data *plat;</div><div class='add'>+	void __iomem *apb_base;</div><div class='add'>+	struct device *dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int thead_dwmac_set_phy_if(struct plat_stmmacenet_data *plat)</div><div class='add'>+{</div><div class='add'>+	struct thead_dwmac *dwmac = plat-&gt;bsp_priv;</div><div class='add'>+	u32 phyif;</div><div class='add'>+</div><div class='add'>+	switch (plat-&gt;phy_interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+		phyif = PHY_INTF_MII_GMII;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		phyif = PHY_INTF_RGMII;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dwmac-&gt;dev, "unsupported phy interface %s\n",</div><div class='add'>+			phy_modes(plat-&gt;phy_interface));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(phyif, dwmac-&gt;apb_base + GMAC_INTF_CTRL);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int thead_dwmac_set_txclk_dir(struct plat_stmmacenet_data *plat)</div><div class='add'>+{</div><div class='add'>+	struct thead_dwmac *dwmac = plat-&gt;bsp_priv;</div><div class='add'>+	u32 txclk_dir;</div><div class='add'>+</div><div class='add'>+	switch (plat-&gt;phy_interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+		txclk_dir = TXCLK_DIR_INPUT;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		txclk_dir = TXCLK_DIR_OUTPUT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dwmac-&gt;dev, "unsupported phy interface %s\n",</div><div class='add'>+			phy_modes(plat-&gt;phy_interface));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(txclk_dir, dwmac-&gt;apb_base + GMAC_TXCLK_OEN);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int thead_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,</div><div class='add'>+				 phy_interface_t interface, int speed)</div><div class='add'>+{</div><div class='add'>+	struct thead_dwmac *dwmac = bsp_priv;</div><div class='add'>+	struct plat_stmmacenet_data *plat;</div><div class='add'>+	unsigned long rate;</div><div class='add'>+	long tx_rate;</div><div class='add'>+	u32 div, reg;</div><div class='add'>+</div><div class='add'>+	plat = dwmac-&gt;plat;</div><div class='add'>+</div><div class='add'>+	switch (plat-&gt;phy_interface) {</div><div class='add'>+	/* For MII, rxc/txc is provided by phy */</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		rate = clk_get_rate(plat-&gt;stmmac_clk);</div><div class='add'>+</div><div class='add'>+		writel(0, dwmac-&gt;apb_base + GMAC_PLLCLK_DIV);</div><div class='add'>+</div><div class='add'>+		tx_rate = rgmii_clock(speed);</div><div class='add'>+		if (tx_rate &lt; 0) {</div><div class='add'>+			dev_err(dwmac-&gt;dev, "invalid speed %d\n", speed);</div><div class='add'>+			return tx_rate;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		div = rate / tx_rate;</div><div class='add'>+		if (rate != tx_rate * div) {</div><div class='add'>+			dev_err(dwmac-&gt;dev, "invalid gmac rate %lu\n", rate);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		reg = FIELD_PREP(GMAC_PLLCLK_DIV_EN, 1) |</div><div class='add'>+		      FIELD_PREP(GMAC_PLLCLK_DIV_NUM, div);</div><div class='add'>+		writel(reg, dwmac-&gt;apb_base + GMAC_PLLCLK_DIV);</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dwmac-&gt;dev, "unsupported phy interface %s\n",</div><div class='add'>+			phy_modes(plat-&gt;phy_interface));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int thead_dwmac_enable_clk(struct plat_stmmacenet_data *plat)</div><div class='add'>+{</div><div class='add'>+	struct thead_dwmac *dwmac = plat-&gt;bsp_priv;</div><div class='add'>+	u32 reg, div;</div><div class='add'>+</div><div class='add'>+	switch (plat-&gt;phy_interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+		reg = GMAC_RX_CLK_EN | GMAC_TX_CLK_EN;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		/* use pll */</div><div class='add'>+		div = clk_get_rate(plat-&gt;stmmac_clk) / rgmii_clock(SPEED_1000);</div><div class='add'>+		reg = FIELD_PREP(GMAC_PLLCLK_DIV_EN, 1) |</div><div class='add'>+		      FIELD_PREP(GMAC_PLLCLK_DIV_NUM, div);</div><div class='add'>+</div><div class='add'>+		writel(0, dwmac-&gt;apb_base + GMAC_PLLCLK_DIV);</div><div class='add'>+		writel(reg, dwmac-&gt;apb_base + GMAC_PLLCLK_DIV);</div><div class='add'>+</div><div class='add'>+		writel(GMAC_GTXCLK_SEL_PLL, dwmac-&gt;apb_base + GMAC_GTXCLK_SEL);</div><div class='add'>+		reg = GMAC_TX_CLK_EN | GMAC_TX_CLK_N_EN | GMAC_TX_CLK_OUT_EN |</div><div class='add'>+		      GMAC_RX_CLK_EN | GMAC_RX_CLK_N_EN;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dwmac-&gt;dev, "unsupported phy interface %s\n",</div><div class='add'>+			phy_modes(plat-&gt;phy_interface));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(reg, dwmac-&gt;apb_base + GMAC_CLK_EN);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int thead_dwmac_init(struct device *dev, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct thead_dwmac *dwmac = priv;</div><div class='add'>+	unsigned int reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = thead_dwmac_set_phy_if(dwmac-&gt;plat);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = thead_dwmac_set_txclk_dir(dwmac-&gt;plat);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = readl(dwmac-&gt;apb_base + GMAC_RXCLK_DELAY_CTRL);</div><div class='add'>+	reg &amp;= ~(GMAC_RXCLK_DELAY);</div><div class='add'>+	reg |= FIELD_PREP(GMAC_RXCLK_DELAY, 0);</div><div class='add'>+	writel(reg, dwmac-&gt;apb_base + GMAC_RXCLK_DELAY_CTRL);</div><div class='add'>+</div><div class='add'>+	reg = readl(dwmac-&gt;apb_base + GMAC_TXCLK_DELAY_CTRL);</div><div class='add'>+	reg &amp;= ~(GMAC_TXCLK_DELAY);</div><div class='add'>+	reg |= FIELD_PREP(GMAC_TXCLK_DELAY, 0);</div><div class='add'>+	writel(reg, dwmac-&gt;apb_base + GMAC_TXCLK_DELAY_CTRL);</div><div class='add'>+</div><div class='add'>+	return thead_dwmac_enable_clk(dwmac-&gt;plat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int thead_dwmac_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_resources stmmac_res;</div><div class='add'>+	struct plat_stmmacenet_data *plat;</div><div class='add'>+	struct thead_dwmac *dwmac;</div><div class='add'>+	struct clk *apb_clk;</div><div class='add'>+	void __iomem *apb;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = stmmac_get_platform_resources(pdev, &amp;stmmac_res);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, ret,</div><div class='add'>+				     "failed to get resources\n");</div><div class='add'>+</div><div class='add'>+	plat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);</div><div class='add'>+	if (IS_ERR(plat))</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(plat),</div><div class='add'>+				     "dt configuration failed\n");</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The APB clock is essential for accessing glue registers. However,</div><div class='add'>+	 * old devicetrees don't describe it correctly. We continue to probe</div><div class='add'>+	 * and emit a warning if it isn't present.</div><div class='add'>+	 */</div><div class='add'>+	apb_clk = devm_clk_get_enabled(&amp;pdev-&gt;dev, "apb");</div><div class='add'>+	if (PTR_ERR(apb_clk) == -ENOENT)</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev,</div><div class='add'>+			 "cannot get apb clock, link may break after speed changes\n");</div><div class='add'>+	else if (IS_ERR(apb_clk))</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(apb_clk),</div><div class='add'>+				     "failed to get apb clock\n");</div><div class='add'>+</div><div class='add'>+	dwmac = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*dwmac), GFP_KERNEL);</div><div class='add'>+	if (!dwmac)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	apb = devm_platform_ioremap_resource(pdev, 1);</div><div class='add'>+	if (IS_ERR(apb))</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(apb),</div><div class='add'>+				     "failed to remap gmac apb registers\n");</div><div class='add'>+</div><div class='add'>+	dwmac-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	dwmac-&gt;plat = plat;</div><div class='add'>+	dwmac-&gt;apb_base = apb;</div><div class='add'>+	plat-&gt;bsp_priv = dwmac;</div><div class='add'>+	plat-&gt;set_clk_tx_rate = thead_set_clk_tx_rate;</div><div class='add'>+	plat-&gt;init = thead_dwmac_init;</div><div class='add'>+</div><div class='add'>+	return devm_stmmac_pltfr_probe(pdev, plat, &amp;stmmac_res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id thead_dwmac_match[] = {</div><div class='add'>+	{ .compatible = "thead,th1520-gmac" },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, thead_dwmac_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver thead_dwmac_driver = {</div><div class='add'>+	.probe = thead_dwmac_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "thead-dwmac",</div><div class='add'>+		.pm = &amp;stmmac_pltfr_pm_ops,</div><div class='add'>+		.of_match_table = thead_dwmac_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(thead_dwmac_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Jisheng Zhang &lt;jszhang@kernel.org&gt;");</div><div class='add'>+MODULE_AUTHOR("Drew Fustini &lt;drew@pdp7.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("T-HEAD DWMAC platform driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c<br/>index eccf7f537467..9497b13a5753 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c</a></div><div class='hunk'>@@ -42,69 +42,45 @@</div><div class='ctx'> </div><div class='ctx'> #define ETHER_CLK_SEL_RX_TX_CLK_EN (ETHER_CLK_SEL_RX_CLK_EN | ETHER_CLK_SEL_TX_CLK_EN)</div><div class='ctx'> </div><div class='del'>-#define ETHER_CONFIG_INTF_MII 0</div><div class='del'>-#define ETHER_CONFIG_INTF_RGMII BIT(0)</div><div class='del'>-#define ETHER_CONFIG_INTF_RMII BIT(2)</div><div class='del'>-</div><div class='ctx'> struct visconti_eth {</div><div class='ctx'> 	void __iomem *reg;</div><div class='del'>-	u32 phy_intf_sel;</div><div class='ctx'> 	struct clk *phy_ref_clk;</div><div class='ctx'> 	struct device *dev;</div><div class='del'>-	spinlock_t lock; /* lock to protect register update */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void visconti_eth_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode)</div><div class='add'>+static int visconti_eth_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,</div><div class='add'>+					phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct visconti_eth *dwmac = priv;</div><div class='del'>-	struct net_device *netdev = dev_get_drvdata(dwmac-&gt;dev);</div><div class='del'>-	unsigned int val, clk_sel_val = 0;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;dwmac-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	/* adjust link */</div><div class='del'>-	val = readl(dwmac-&gt;reg + MAC_CTRL_REG);</div><div class='del'>-	val &amp;= ~(GMAC_CONFIG_PS | GMAC_CONFIG_FES);</div><div class='del'>-</div><div class='del'>-	switch (speed) {</div><div class='del'>-	case SPEED_1000:</div><div class='del'>-		if (dwmac-&gt;phy_intf_sel == ETHER_CONFIG_INTF_RGMII)</div><div class='del'>-			clk_sel_val = ETHER_CLK_SEL_FREQ_SEL_125M;</div><div class='del'>-		break;</div><div class='del'>-	case SPEED_100:</div><div class='del'>-		if (dwmac-&gt;phy_intf_sel == ETHER_CONFIG_INTF_RGMII)</div><div class='del'>-			clk_sel_val = ETHER_CLK_SEL_FREQ_SEL_25M;</div><div class='del'>-		if (dwmac-&gt;phy_intf_sel == ETHER_CONFIG_INTF_RMII)</div><div class='del'>-			clk_sel_val = ETHER_CLK_SEL_DIV_SEL_2;</div><div class='del'>-		val |= GMAC_CONFIG_PS | GMAC_CONFIG_FES;</div><div class='del'>-		break;</div><div class='del'>-	case SPEED_10:</div><div class='del'>-		if (dwmac-&gt;phy_intf_sel == ETHER_CONFIG_INTF_RGMII)</div><div class='del'>-			clk_sel_val = ETHER_CLK_SEL_FREQ_SEL_2P5M;</div><div class='del'>-		if (dwmac-&gt;phy_intf_sel == ETHER_CONFIG_INTF_RMII)</div><div class='del'>-			clk_sel_val = ETHER_CLK_SEL_DIV_SEL_20;</div><div class='del'>-		val |= GMAC_CONFIG_PS;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		/* No bit control */</div><div class='del'>-		netdev_err(netdev, "Unsupported speed request (%d)", speed);</div><div class='del'>-		spin_unlock_irqrestore(&amp;dwmac-&gt;lock, flags);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	writel(val, dwmac-&gt;reg + MAC_CTRL_REG);</div><div class='del'>-</div><div class='del'>-	/* Stop internal clock */</div><div class='del'>-	val = readl(dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='del'>-	val &amp;= ~(ETHER_CLK_SEL_RMII_CLK_EN | ETHER_CLK_SEL_RX_TX_CLK_EN);</div><div class='del'>-	val |= ETHER_CLK_SEL_TX_O_E_N_IN;</div><div class='del'>-	writel(val, dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='add'>+	struct visconti_eth *dwmac = bsp_priv;</div><div class='add'>+	unsigned long clk_sel, val;</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(interface)) {</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case SPEED_1000:</div><div class='add'>+			clk_sel = ETHER_CLK_SEL_FREQ_SEL_125M;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			clk_sel = ETHER_CLK_SEL_FREQ_SEL_25M;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			clk_sel = ETHER_CLK_SEL_FREQ_SEL_2P5M;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Stop internal clock */</div><div class='add'>+		val = readl(dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='add'>+		val &amp;= ~(ETHER_CLK_SEL_RMII_CLK_EN |</div><div class='add'>+			 ETHER_CLK_SEL_RX_TX_CLK_EN);</div><div class='add'>+		val |= ETHER_CLK_SEL_TX_O_E_N_IN;</div><div class='add'>+		writel(val, dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='ctx'> </div><div class='del'>-	/* Set Clock-Mux, Start clock, Set TX_O direction */</div><div class='del'>-	switch (dwmac-&gt;phy_intf_sel) {</div><div class='del'>-	case ETHER_CONFIG_INTF_RGMII:</div><div class='del'>-		val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC;</div><div class='add'>+		/* Set Clock-Mux, Start clock, Set TX_O direction */</div><div class='add'>+		val = clk_sel | ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC;</div><div class='ctx'> 		writel(val, dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='ctx'> </div><div class='ctx'> 		val |= ETHER_CLK_SEL_RX_TX_CLK_EN;</div><div class='hunk'>@@ -112,11 +88,32 @@ static void visconti_eth_fix_mac_speed(void *priv, unsigned int speed, unsigned</div><div class='ctx'> </div><div class='ctx'> 		val &amp;= ~ETHER_CLK_SEL_TX_O_E_N_IN;</div><div class='ctx'> 		writel(val, dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='del'>-		break;</div><div class='del'>-	case ETHER_CONFIG_INTF_RMII:</div><div class='del'>-		val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_DIV |</div><div class='del'>-			ETHER_CLK_SEL_TX_CLK_EXT_SEL_DIV | ETHER_CLK_SEL_TX_O_E_N_IN |</div><div class='del'>-			ETHER_CLK_SEL_RMII_CLK_SEL_RX_C;</div><div class='add'>+	} else if (interface == PHY_INTERFACE_MODE_RMII) {</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			clk_sel = ETHER_CLK_SEL_DIV_SEL_2;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			clk_sel = ETHER_CLK_SEL_DIV_SEL_20;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Stop internal clock */</div><div class='add'>+		val = readl(dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='add'>+		val &amp;= ~(ETHER_CLK_SEL_RMII_CLK_EN |</div><div class='add'>+			 ETHER_CLK_SEL_RX_TX_CLK_EN);</div><div class='add'>+		val |= ETHER_CLK_SEL_TX_O_E_N_IN;</div><div class='add'>+		writel(val, dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='add'>+</div><div class='add'>+		/* Set Clock-Mux, Start clock, Set TX_O direction */</div><div class='add'>+		val = clk_sel | ETHER_CLK_SEL_RX_CLK_EXT_SEL_DIV |</div><div class='add'>+		      ETHER_CLK_SEL_TX_CLK_EXT_SEL_DIV |</div><div class='add'>+		      ETHER_CLK_SEL_TX_O_E_N_IN |</div><div class='add'>+		      ETHER_CLK_SEL_RMII_CLK_SEL_RX_C;</div><div class='ctx'> 		writel(val, dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='ctx'> </div><div class='ctx'> 		val |= ETHER_CLK_SEL_RMII_CLK_RST;</div><div class='hunk'>@@ -124,46 +121,42 @@ static void visconti_eth_fix_mac_speed(void *priv, unsigned int speed, unsigned</div><div class='ctx'> </div><div class='ctx'> 		val |= ETHER_CLK_SEL_RMII_CLK_EN | ETHER_CLK_SEL_RX_TX_CLK_EN;</div><div class='ctx'> 		writel(val, dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='del'>-		break;</div><div class='del'>-	case ETHER_CONFIG_INTF_MII:</div><div class='del'>-	default:</div><div class='del'>-		val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC |</div><div class='del'>-			ETHER_CLK_SEL_TX_CLK_EXT_SEL_TXC | ETHER_CLK_SEL_TX_O_E_N_IN;</div><div class='add'>+	} else {</div><div class='add'>+		/* Stop internal clock */</div><div class='add'>+		val = readl(dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='add'>+		val &amp;= ~(ETHER_CLK_SEL_RMII_CLK_EN |</div><div class='add'>+			 ETHER_CLK_SEL_RX_TX_CLK_EN);</div><div class='add'>+		val |= ETHER_CLK_SEL_TX_O_E_N_IN;</div><div class='add'>+		writel(val, dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='add'>+</div><div class='add'>+		/* Set Clock-Mux, Start clock, Set TX_O direction */</div><div class='add'>+		val = ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC |</div><div class='add'>+		      ETHER_CLK_SEL_TX_CLK_EXT_SEL_TXC |</div><div class='add'>+		      ETHER_CLK_SEL_TX_O_E_N_IN;</div><div class='ctx'> 		writel(val, dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='ctx'> </div><div class='ctx'> 		val |= ETHER_CLK_SEL_RX_TX_CLK_EN;</div><div class='ctx'> 		writel(val, dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='del'>-		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;dwmac-&gt;lock, flags);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int visconti_eth_init_hw(struct platform_device *pdev, struct plat_stmmacenet_data *plat_dat)</div><div class='ctx'> {</div><div class='ctx'> 	struct visconti_eth *dwmac = plat_dat-&gt;bsp_priv;</div><div class='del'>-	unsigned int reg_val, clk_sel_val;</div><div class='del'>-</div><div class='del'>-	switch (plat_dat-&gt;phy_interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		dwmac-&gt;phy_intf_sel = ETHER_CONFIG_INTF_RGMII;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_MII:</div><div class='del'>-		dwmac-&gt;phy_intf_sel = ETHER_CONFIG_INTF_MII;</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-		dwmac-&gt;phy_intf_sel = ETHER_CONFIG_INTF_RMII;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='add'>+	unsigned int clk_sel_val;</div><div class='add'>+	int phy_intf_sel;</div><div class='add'>+</div><div class='add'>+	phy_intf_sel = stmmac_get_phy_intf_sel(plat_dat-&gt;phy_interface);</div><div class='add'>+	if (phy_intf_sel != PHY_INTF_SEL_GMII_MII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RGMII &amp;&amp;</div><div class='add'>+	    phy_intf_sel != PHY_INTF_SEL_RMII) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Unsupported phy-mode (%d)\n", plat_dat-&gt;phy_interface);</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	reg_val = dwmac-&gt;phy_intf_sel;</div><div class='del'>-	writel(reg_val, dwmac-&gt;reg + REG_ETHER_CONTROL);</div><div class='add'>+	writel(phy_intf_sel, dwmac-&gt;reg + REG_ETHER_CONTROL);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable TX/RX clock */</div><div class='ctx'> 	clk_sel_val = ETHER_CLK_SEL_FREQ_SEL_125M;</div><div class='hunk'>@@ -173,8 +166,8 @@ static int visconti_eth_init_hw(struct platform_device *pdev, struct plat_stmmac</div><div class='ctx'> 	       dwmac-&gt;reg + REG_ETHER_CLOCK_SEL);</div><div class='ctx'> </div><div class='ctx'> 	/* release internal-reset */</div><div class='del'>-	reg_val |= ETHER_ETH_CONTROL_RESET;</div><div class='del'>-	writel(reg_val, dwmac-&gt;reg + REG_ETHER_CONTROL);</div><div class='add'>+	phy_intf_sel |= ETHER_ETH_CONTROL_RESET;</div><div class='add'>+	writel(phy_intf_sel, dwmac-&gt;reg + REG_ETHER_CONTROL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -228,11 +221,10 @@ static int visconti_eth_dwmac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!dwmac)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;dwmac-&gt;lock);</div><div class='ctx'> 	dwmac-&gt;reg = stmmac_res.addr;</div><div class='ctx'> 	dwmac-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	plat_dat-&gt;bsp_priv = dwmac;</div><div class='del'>-	plat_dat-&gt;fix_mac_speed = visconti_eth_fix_mac_speed;</div><div class='add'>+	plat_dat-&gt;set_clk_tx_rate = visconti_eth_set_clk_tx_rate;</div><div class='ctx'> </div><div class='ctx'> 	ret = visconti_eth_clock_probe(pdev, plat_dat);</div><div class='ctx'> 	if (ret)</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h<br/>index 4296ddda8aaa..697bba641e05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac1000.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac1000.h</a></div><div class='hunk'>@@ -38,11 +38,10 @@</div><div class='ctx'> #define	GMAC_INT_DISABLE_PCSAN		BIT(2)</div><div class='ctx'> #define	GMAC_INT_DISABLE_PMT		BIT(3)</div><div class='ctx'> #define	GMAC_INT_DISABLE_TIMESTAMP	BIT(9)</div><div class='del'>-#define	GMAC_INT_DISABLE_PCS	(GMAC_INT_DISABLE_RGMII | \</div><div class='add'>+#define	GMAC_INT_DEFAULT_MASK	(GMAC_INT_DISABLE_RGMII | \</div><div class='ctx'> 				 GMAC_INT_DISABLE_PCSLINK | \</div><div class='del'>-				 GMAC_INT_DISABLE_PCSAN)</div><div class='del'>-#define	GMAC_INT_DEFAULT_MASK	(GMAC_INT_DISABLE_TIMESTAMP | \</div><div class='del'>-				 GMAC_INT_DISABLE_PCS)</div><div class='add'>+				 GMAC_INT_DISABLE_PCSAN | \</div><div class='add'>+				 GMAC_INT_DISABLE_TIMESTAMP)</div><div class='ctx'> </div><div class='ctx'> /* PMT Control and Status */</div><div class='ctx'> #define GMAC_PMT		0x0000002c</div><div class='hunk'>@@ -59,22 +58,11 @@ enum power_event {</div><div class='ctx'> /* Energy Efficient Ethernet (EEE)</div><div class='ctx'>  *</div><div class='ctx'>  * LPI status, timer and control register offset</div><div class='add'>+ * For LPI control and status bit definitions, see common.h.</div><div class='ctx'>  */</div><div class='ctx'> #define LPI_CTRL_STATUS	0x0030</div><div class='ctx'> #define LPI_TIMER_CTRL	0x0034</div><div class='ctx'> </div><div class='del'>-/* LPI control and status defines */</div><div class='del'>-#define LPI_CTRL_STATUS_LPITXA	0x00080000	/* Enable LPI TX Automate */</div><div class='del'>-#define LPI_CTRL_STATUS_PLSEN	0x00040000	/* Enable PHY Link Status */</div><div class='del'>-#define LPI_CTRL_STATUS_PLS	0x00020000	/* PHY Link Status */</div><div class='del'>-#define LPI_CTRL_STATUS_LPIEN	0x00010000	/* LPI Enable */</div><div class='del'>-#define LPI_CTRL_STATUS_RLPIST	0x00000200	/* Receive LPI state */</div><div class='del'>-#define LPI_CTRL_STATUS_TLPIST	0x00000100	/* Transmit LPI state */</div><div class='del'>-#define LPI_CTRL_STATUS_RLPIEX	0x00000008	/* Receive LPI Exit */</div><div class='del'>-#define LPI_CTRL_STATUS_RLPIEN	0x00000004	/* Receive LPI Entry */</div><div class='del'>-#define LPI_CTRL_STATUS_TLPIEX	0x00000002	/* Transmit LPI Exit */</div><div class='del'>-#define LPI_CTRL_STATUS_TLPIEN	0x00000001	/* Transmit LPI Entry */</div><div class='del'>-</div><div class='ctx'> /* GMAC HW ADDR regs */</div><div class='ctx'> #define GMAC_ADDR_HIGH(reg)	((reg &gt; 15) ? 0x00000800 + (reg - 16) * 8 : \</div><div class='ctx'> 				 0x00000040 + (reg * 8))</div><div class='hunk'>@@ -329,5 +317,17 @@ enum rtc_control {</div><div class='ctx'> #define GMAC_MMC_RX_CSUM_OFFLOAD   0x208</div><div class='ctx'> #define GMAC_EXTHASH_BASE  0x500</div><div class='ctx'> </div><div class='add'>+/* PTP and timestamping registers */</div><div class='add'>+</div><div class='add'>+#define GMAC3_X_ATSNS       GENMASK(29, 25)</div><div class='add'>+#define GMAC3_X_ATSNS_SHIFT 25</div><div class='add'>+</div><div class='add'>+#define GMAC_PTP_TCR_ATSFC	BIT(24)</div><div class='add'>+#define GMAC_PTP_TCR_ATSEN0	BIT(25)</div><div class='add'>+</div><div class='add'>+#define GMAC3_X_TIMESTAMP_STATUS	0x28</div><div class='add'>+#define GMAC_PTP_ATNR	0x30</div><div class='add'>+#define GMAC_PTP_ATSR	0x34</div><div class='add'>+</div><div class='ctx'> extern const struct stmmac_dma_ops dwmac1000_dma_ops;</div><div class='ctx'> #endif /* __DWMAC1000_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c<br/>index d413d76a8936..a2ae136d2c0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c</a></div><div class='hunk'>@@ -16,51 +16,41 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> #include "stmmac.h"</div><div class='ctx'> #include "stmmac_pcs.h"</div><div class='add'>+#include "stmmac_ptp.h"</div><div class='ctx'> #include "dwmac1000.h"</div><div class='ctx'> </div><div class='add'>+static int dwmac1000_pcs_init(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;dma_cap.pcs)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,</div><div class='add'>+					  GMAC_INT_DISABLE_PCSLINK |</div><div class='add'>+					  GMAC_INT_DISABLE_PCSAN);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void dwmac1000_core_init(struct mac_device_info *hw,</div><div class='ctx'> 				struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value = readl(ioaddr + GMAC_CONTROL);</div><div class='ctx'> 	int mtu = dev-&gt;mtu;</div><div class='add'>+	u32 value;</div><div class='ctx'> </div><div class='ctx'> 	/* Configure GMAC core */</div><div class='del'>-	value |= GMAC_CORE_INIT;</div><div class='add'>+	value = readl(ioaddr + GMAC_CONTROL);</div><div class='ctx'> </div><div class='ctx'> 	if (mtu &gt; 1500)</div><div class='ctx'> 		value |= GMAC_CONTROL_2K;</div><div class='ctx'> 	if (mtu &gt; 2000)</div><div class='ctx'> 		value |= GMAC_CONTROL_JE;</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;ps) {</div><div class='del'>-		value |= GMAC_CONTROL_TE;</div><div class='del'>-</div><div class='del'>-		value &amp;= ~hw-&gt;link.speed_mask;</div><div class='del'>-		switch (hw-&gt;ps) {</div><div class='del'>-		case SPEED_1000:</div><div class='del'>-			value |= hw-&gt;link.speed1000;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED_100:</div><div class='del'>-			value |= hw-&gt;link.speed100;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED_10:</div><div class='del'>-			value |= hw-&gt;link.speed10;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	writel(value, ioaddr + GMAC_CONTROL);</div><div class='add'>+	writel(value | GMAC_CORE_INIT, ioaddr + GMAC_CONTROL);</div><div class='ctx'> </div><div class='ctx'> 	/* Mask GMAC interrupts */</div><div class='del'>-	value = GMAC_INT_DEFAULT_MASK;</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;pcs)</div><div class='del'>-		value &amp;= ~GMAC_INT_DISABLE_PCS;</div><div class='del'>-</div><div class='del'>-	writel(value, ioaddr + GMAC_INT_MASK);</div><div class='add'>+	writel(GMAC_INT_DEFAULT_MASK, ioaddr + GMAC_INT_MASK);</div><div class='ctx'> </div><div class='ctx'> #ifdef STMMAC_VLAN_TAG_USED</div><div class='ctx'> 	/* Tag detection without filtering */</div><div class='hunk'>@@ -68,6 +58,20 @@ static void dwmac1000_core_init(struct mac_device_info *hw,</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dwmac1000_irq_modify(struct mac_device_info *hw, u32 disable,</div><div class='add'>+				 u32 enable)</div><div class='add'>+{</div><div class='add'>+	void __iomem *int_mask = hw-&gt;pcsr + GMAC_INT_MASK;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;hw-&gt;irq_ctrl_lock, flags);</div><div class='add'>+	value = readl(int_mask) | disable;</div><div class='add'>+	value &amp;= ~enable;</div><div class='add'>+	writel(value, int_mask);</div><div class='add'>+	spin_unlock_irqrestore(&amp;hw-&gt;irq_ctrl_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int dwmac1000_rx_ipc_enable(struct mac_device_info *hw)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='hunk'>@@ -261,39 +265,6 @@ static void dwmac1000_pmt(struct mac_device_info *hw, unsigned long mode)</div><div class='ctx'> 	writel(pmt, ioaddr + GMAC_PMT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* RGMII or SMII interface */</div><div class='del'>-static void dwmac1000_rgsmii(void __iomem *ioaddr, struct stmmac_extra_stats *x)</div><div class='del'>-{</div><div class='del'>-	u32 status;</div><div class='del'>-</div><div class='del'>-	status = readl(ioaddr + GMAC_RGSMIIIS);</div><div class='del'>-	x-&gt;irq_rgmii_n++;</div><div class='del'>-</div><div class='del'>-	/* Check the link status */</div><div class='del'>-	if (status &amp; GMAC_RGSMIIIS_LNKSTS) {</div><div class='del'>-		int speed_value;</div><div class='del'>-</div><div class='del'>-		x-&gt;pcs_link = 1;</div><div class='del'>-</div><div class='del'>-		speed_value = ((status &amp; GMAC_RGSMIIIS_SPEED) &gt;&gt;</div><div class='del'>-			       GMAC_RGSMIIIS_SPEED_SHIFT);</div><div class='del'>-		if (speed_value == GMAC_RGSMIIIS_SPEED_125)</div><div class='del'>-			x-&gt;pcs_speed = SPEED_1000;</div><div class='del'>-		else if (speed_value == GMAC_RGSMIIIS_SPEED_25)</div><div class='del'>-			x-&gt;pcs_speed = SPEED_100;</div><div class='del'>-		else</div><div class='del'>-			x-&gt;pcs_speed = SPEED_10;</div><div class='del'>-</div><div class='del'>-		x-&gt;pcs_duplex = (status &amp; GMAC_RGSMIIIS_LNKMOD_MASK);</div><div class='del'>-</div><div class='del'>-		pr_info("Link is Up - %d/%s\n", (int)x-&gt;pcs_speed,</div><div class='del'>-			x-&gt;pcs_duplex ? "Full" : "Half");</div><div class='del'>-	} else {</div><div class='del'>-		x-&gt;pcs_link = 0;</div><div class='del'>-		pr_info("Link is Down\n");</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int dwmac1000_irq_status(struct mac_device_info *hw,</div><div class='ctx'> 				struct stmmac_extra_stats *x)</div><div class='ctx'> {</div><div class='hunk'>@@ -335,37 +306,27 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,</div><div class='ctx'> </div><div class='ctx'> 	dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);</div><div class='ctx'> </div><div class='del'>-	if (intr_status &amp; PCS_RGSMIIIS_IRQ)</div><div class='del'>-		dwmac1000_rgsmii(ioaddr, x);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac1000_set_eee_mode(struct mac_device_info *hw,</div><div class='del'>-				   bool en_tx_lpi_clockgating)</div><div class='add'>+static int dwmac1000_set_lpi_mode(struct mac_device_info *hw,</div><div class='add'>+				  enum stmmac_lpi_mode mode,</div><div class='add'>+				  bool en_tx_lpi_clockgating, u32 et)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='ctx'> 	u32 value;</div><div class='ctx'> </div><div class='del'>-	/*TODO - en_tx_lpi_clockgating treatment */</div><div class='add'>+	if (mode == STMMAC_LPI_TIMER)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	/* Enable the link status receive on RGMII, SGMII ore SMII</div><div class='del'>-	 * receive path and instruct the transmit to enter in LPI</div><div class='del'>-	 * state.</div><div class='del'>-	 */</div><div class='ctx'> 	value = readl(ioaddr + LPI_CTRL_STATUS);</div><div class='del'>-	value |= LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_LPITXA;</div><div class='add'>+	if (mode == STMMAC_LPI_FORCED)</div><div class='add'>+		value |= LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_LPITXA;</div><div class='add'>+	else</div><div class='add'>+		value &amp;= ~(LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_LPITXA);</div><div class='ctx'> 	writel(value, ioaddr + LPI_CTRL_STATUS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dwmac1000_reset_eee_mode(struct mac_device_info *hw)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value;</div><div class='ctx'> </div><div class='del'>-	value = readl(ioaddr + LPI_CTRL_STATUS);</div><div class='del'>-	value &amp;= ~(LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_LPITXA);</div><div class='del'>-	writel(value, ioaddr + LPI_CTRL_STATUS);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dwmac1000_set_eee_pls(struct mac_device_info *hw, int link)</div><div class='hunk'>@@ -398,15 +359,10 @@ static void dwmac1000_set_eee_timer(struct mac_device_info *hw, int ls, int tw)</div><div class='ctx'> 	writel(value, ioaddr + LPI_TIMER_CTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac1000_ctrl_ane(void __iomem *ioaddr, bool ane, bool srgmi_ral,</div><div class='del'>-			       bool loopback)</div><div class='del'>-{</div><div class='del'>-	dwmac_ctrl_ane(ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dwmac1000_get_adv_lp(void __iomem *ioaddr, struct rgmii_adv *adv)</div><div class='add'>+static void dwmac1000_ctrl_ane(struct stmmac_priv *priv, bool ane,</div><div class='add'>+			       bool srgmi_ral)</div><div class='ctx'> {</div><div class='del'>-	dwmac_get_adv_lp(ioaddr, GMAC_PCS_BASE, adv);</div><div class='add'>+	dwmac_ctrl_ane(priv-&gt;ioaddr, GMAC_PCS_BASE, ane, srgmi_ral);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dwmac1000_debug(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='hunk'>@@ -498,7 +454,9 @@ static void dwmac1000_set_mac_loopback(void __iomem *ioaddr, bool enable)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct stmmac_ops dwmac1000_ops = {</div><div class='add'>+	.pcs_init = dwmac1000_pcs_init,</div><div class='ctx'> 	.core_init = dwmac1000_core_init,</div><div class='add'>+	.irq_modify = dwmac1000_irq_modify,</div><div class='ctx'> 	.set_mac = stmmac_set_mac,</div><div class='ctx'> 	.rx_ipc = dwmac1000_rx_ipc_enable,</div><div class='ctx'> 	.dump_regs = dwmac1000_dump_regs,</div><div class='hunk'>@@ -508,13 +466,11 @@ const struct stmmac_ops dwmac1000_ops = {</div><div class='ctx'> 	.pmt = dwmac1000_pmt,</div><div class='ctx'> 	.set_umac_addr = dwmac1000_set_umac_addr,</div><div class='ctx'> 	.get_umac_addr = dwmac1000_get_umac_addr,</div><div class='del'>-	.set_eee_mode = dwmac1000_set_eee_mode,</div><div class='del'>-	.reset_eee_mode = dwmac1000_reset_eee_mode,</div><div class='add'>+	.set_lpi_mode = dwmac1000_set_lpi_mode,</div><div class='ctx'> 	.set_eee_timer = dwmac1000_set_eee_timer,</div><div class='ctx'> 	.set_eee_pls = dwmac1000_set_eee_pls,</div><div class='ctx'> 	.debug = dwmac1000_debug,</div><div class='ctx'> 	.pcs_ctrl_ane = dwmac1000_ctrl_ane,</div><div class='del'>-	.pcs_get_adv_lp = dwmac1000_get_adv_lp,</div><div class='ctx'> 	.set_mac_loopback = dwmac1000_set_mac_loopback,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -551,3 +507,103 @@ int dwmac1000_setup(struct stmmac_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/* DWMAC 1000 HW Timestaming ops */</div><div class='add'>+</div><div class='add'>+void dwmac1000_get_ptptime(void __iomem *ptpaddr, u64 *ptp_time)</div><div class='add'>+{</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	ns = readl(ptpaddr + GMAC_PTP_ATNR);</div><div class='add'>+	ns += (u64)readl(ptpaddr + GMAC_PTP_ATSR) * NSEC_PER_SEC;</div><div class='add'>+</div><div class='add'>+	*ptp_time = ns;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void dwmac1000_timestamp_interrupt(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct ptp_clock_event event;</div><div class='add'>+	u32 ts_status, num_snapshot;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u64 ptp_time;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Clears the timestamp interrupt */</div><div class='add'>+	ts_status = readl(priv-&gt;ptpaddr + GMAC3_X_TIMESTAMP_STATUS);</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_EXT_SNAPSHOT_EN))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	num_snapshot = (ts_status &amp; GMAC3_X_ATSNS) &gt;&gt; GMAC3_X_ATSNS_SHIFT;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_snapshot; i++) {</div><div class='add'>+		read_lock_irqsave(&amp;priv-&gt;ptp_lock, flags);</div><div class='add'>+		stmmac_get_ptptime(priv, priv-&gt;ptpaddr, &amp;ptp_time);</div><div class='add'>+		read_unlock_irqrestore(&amp;priv-&gt;ptp_lock, flags);</div><div class='add'>+</div><div class='add'>+		event.type = PTP_CLOCK_EXTTS;</div><div class='add'>+		event.index = 0;</div><div class='add'>+		event.timestamp = ptp_time;</div><div class='add'>+		ptp_clock_event(priv-&gt;ptp_clock, &amp;event);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* DWMAC 1000 ptp_clock_info ops */</div><div class='add'>+</div><div class='add'>+static void dwmac1000_timestamp_interrupt_cfg(struct stmmac_priv *priv, bool en)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = priv-&gt;ioaddr;</div><div class='add'>+</div><div class='add'>+	u32 intr_mask = readl(ioaddr + GMAC_INT_MASK);</div><div class='add'>+</div><div class='add'>+	if (en)</div><div class='add'>+		intr_mask &amp;= ~GMAC_INT_DISABLE_TIMESTAMP;</div><div class='add'>+	else</div><div class='add'>+		intr_mask |= GMAC_INT_DISABLE_TIMESTAMP;</div><div class='add'>+</div><div class='add'>+	writel(intr_mask, ioaddr + GMAC_INT_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int dwmac1000_ptp_enable(struct ptp_clock_info *ptp,</div><div class='add'>+			 struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_priv *priv =</div><div class='add'>+	    container_of(ptp, struct stmmac_priv, ptp_clock_ops);</div><div class='add'>+	void __iomem *ptpaddr = priv-&gt;ptpaddr;</div><div class='add'>+	int ret = -EOPNOTSUPP;</div><div class='add'>+	u32 tcr_val;</div><div class='add'>+</div><div class='add'>+	switch (rq-&gt;type) {</div><div class='add'>+	case PTP_CLK_REQ_EXTTS:</div><div class='add'>+		mutex_lock(&amp;priv-&gt;aux_ts_lock);</div><div class='add'>+		tcr_val = readl(ptpaddr + PTP_TCR);</div><div class='add'>+</div><div class='add'>+		if (on) {</div><div class='add'>+			tcr_val |= GMAC_PTP_TCR_ATSEN0;</div><div class='add'>+			tcr_val |= GMAC_PTP_TCR_ATSFC;</div><div class='add'>+			priv-&gt;plat-&gt;flags |= STMMAC_FLAG_EXT_SNAPSHOT_EN;</div><div class='add'>+		} else {</div><div class='add'>+			tcr_val &amp;= ~GMAC_PTP_TCR_ATSEN0;</div><div class='add'>+			priv-&gt;plat-&gt;flags &amp;= ~STMMAC_FLAG_EXT_SNAPSHOT_EN;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netdev_dbg(priv-&gt;dev, "Auxiliary Snapshot %s.\n",</div><div class='add'>+			   str_enabled_disabled(on));</div><div class='add'>+		writel(tcr_val, ptpaddr + PTP_TCR);</div><div class='add'>+</div><div class='add'>+		/* wait for auxts fifo clear to finish */</div><div class='add'>+		ret = readl_poll_timeout(ptpaddr + PTP_TCR, tcr_val,</div><div class='add'>+					 !(tcr_val &amp; GMAC_PTP_TCR_ATSFC),</div><div class='add'>+					 10, 10000);</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;aux_ts_lock);</div><div class='add'>+</div><div class='add'>+		dwmac1000_timestamp_interrupt_cfg(priv, on);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c<br/>index 118a22406a2e..5877fec9f6c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c</a></div><div class='hunk'>@@ -19,7 +19,6 @@</div><div class='ctx'> static void dwmac1000_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value = readl(ioaddr + DMA_AXI_BUS_MODE);</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	pr_info("dwmac1000: Master AXI performs %s burst length\n",</div><div class='ctx'> 		!(value &amp; DMA_AXI_UNDEF) ? "fixed" : "any");</div><div class='hunk'>@@ -39,33 +38,10 @@ static void dwmac1000_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)</div><div class='ctx'> </div><div class='ctx'> 	/* Depending on the UNDEF bit the Master AXI will perform any burst</div><div class='ctx'> 	 * length according to the BLEN programmed (by default all BLEN are</div><div class='del'>-	 * set).</div><div class='add'>+	 * set). Note that the UNDEF bit is readonly, and is the inverse of</div><div class='add'>+	 * Bus Mode bit 16.</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; AXI_BLEN; i++) {</div><div class='del'>-		switch (axi-&gt;axi_blen[i]) {</div><div class='del'>-		case 256:</div><div class='del'>-			value |= DMA_AXI_BLEN256;</div><div class='del'>-			break;</div><div class='del'>-		case 128:</div><div class='del'>-			value |= DMA_AXI_BLEN128;</div><div class='del'>-			break;</div><div class='del'>-		case 64:</div><div class='del'>-			value |= DMA_AXI_BLEN64;</div><div class='del'>-			break;</div><div class='del'>-		case 32:</div><div class='del'>-			value |= DMA_AXI_BLEN32;</div><div class='del'>-			break;</div><div class='del'>-		case 16:</div><div class='del'>-			value |= DMA_AXI_BLEN16;</div><div class='del'>-			break;</div><div class='del'>-		case 8:</div><div class='del'>-			value |= DMA_AXI_BLEN8;</div><div class='del'>-			break;</div><div class='del'>-		case 4:</div><div class='del'>-			value |= DMA_AXI_BLEN4;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	value = (value &amp; ~DMA_AXI_BLEN_MASK) | axi-&gt;axi_blen_regval;</div><div class='ctx'> </div><div class='ctx'> 	writel(value, ioaddr + DMA_AXI_BUS_MODE);</div><div class='ctx'> }</div><div class='hunk'>@@ -159,10 +135,10 @@ static void dwmac1000_dma_operation_mode_rx(struct stmmac_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	if (mode == SF_DMA_MODE) {</div><div class='ctx'> 		pr_debug("GMAC: enable RX store and forward mode\n");</div><div class='del'>-		csr6 |= DMA_CONTROL_RSF;</div><div class='add'>+		csr6 |= DMA_CONTROL_RSF | DMA_CONTROL_DFF;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pr_debug("GMAC: disable RX SF mode (threshold %d)\n", mode);</div><div class='del'>-		csr6 &amp;= ~DMA_CONTROL_RSF;</div><div class='add'>+		csr6 &amp;= ~(DMA_CONTROL_RSF | DMA_CONTROL_DFF);</div><div class='ctx'> 		csr6 &amp;= DMA_CONTROL_TC_RX_MASK;</div><div class='ctx'> 		if (mode &lt;= 32)</div><div class='ctx'> 			csr6 |= DMA_CONTROL_RTC_32;</div><div class='hunk'>@@ -286,6 +262,7 @@ const struct stmmac_dma_ops dwmac1000_dma_ops = {</div><div class='ctx'> 	.dma_rx_mode = dwmac1000_dma_operation_mode_rx,</div><div class='ctx'> 	.dma_tx_mode = dwmac1000_dma_operation_mode_tx,</div><div class='ctx'> 	.enable_dma_transmission = dwmac_enable_dma_transmission,</div><div class='add'>+	.enable_dma_reception = dwmac_enable_dma_reception,</div><div class='ctx'> 	.enable_dma_irq = dwmac_enable_dma_irq,</div><div class='ctx'> 	.disable_dma_irq = dwmac_disable_dma_irq,</div><div class='ctx'> 	.start_tx = dwmac_dma_start_tx,</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h<br/>index 0c050324997a..3cb733781e1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac4.h</a></div><div class='hunk'>@@ -17,11 +17,7 @@</div><div class='ctx'> #define GMAC_EXT_CONFIG			0x00000004</div><div class='ctx'> #define GMAC_PACKET_FILTER		0x00000008</div><div class='ctx'> #define GMAC_HASH_TAB(x)		(0x10 + (x) * 4)</div><div class='del'>-#define GMAC_VLAN_TAG			0x00000050</div><div class='del'>-#define GMAC_VLAN_TAG_DATA		0x00000054</div><div class='del'>-#define GMAC_VLAN_HASH_TABLE		0x00000058</div><div class='ctx'> #define GMAC_RX_FLOW_CTRL		0x00000090</div><div class='del'>-#define GMAC_VLAN_INCL			0x00000060</div><div class='ctx'> #define GMAC_QX_TX_FLOW_CTRL(x)		(0x70 + x * 4)</div><div class='ctx'> #define GMAC_TXQ_PRTY_MAP0		0x98</div><div class='ctx'> #define GMAC_TXQ_PRTY_MAP1		0x9C</div><div class='hunk'>@@ -31,7 +27,6 @@</div><div class='ctx'> #define GMAC_RXQ_CTRL3			0x000000ac</div><div class='ctx'> #define GMAC_INT_STATUS			0x000000b0</div><div class='ctx'> #define GMAC_INT_EN			0x000000b4</div><div class='del'>-#define GMAC_1US_TIC_COUNTER		0x000000dc</div><div class='ctx'> #define GMAC_PCS_BASE			0x000000e0</div><div class='ctx'> #define GMAC_PHYIF_CONTROL_STATUS	0x000000f8</div><div class='ctx'> #define GMAC_PMT			0x000000c0</div><div class='hunk'>@@ -82,42 +77,6 @@</div><div class='ctx'> </div><div class='ctx'> #define GMAC_MAX_PERFECT_ADDRESSES	128</div><div class='ctx'> </div><div class='del'>-/* MAC VLAN */</div><div class='del'>-#define GMAC_VLAN_EDVLP			BIT(26)</div><div class='del'>-#define GMAC_VLAN_VTHM			BIT(25)</div><div class='del'>-#define GMAC_VLAN_DOVLTC		BIT(20)</div><div class='del'>-#define GMAC_VLAN_ESVL			BIT(18)</div><div class='del'>-#define GMAC_VLAN_ETV			BIT(16)</div><div class='del'>-#define GMAC_VLAN_VID			GENMASK(15, 0)</div><div class='del'>-#define GMAC_VLAN_VLTI			BIT(20)</div><div class='del'>-#define GMAC_VLAN_CSVL			BIT(19)</div><div class='del'>-#define GMAC_VLAN_VLC			GENMASK(17, 16)</div><div class='del'>-#define GMAC_VLAN_VLC_SHIFT		16</div><div class='del'>-#define GMAC_VLAN_VLHT			GENMASK(15, 0)</div><div class='del'>-</div><div class='del'>-/* MAC VLAN Tag */</div><div class='del'>-#define GMAC_VLAN_TAG_VID		GENMASK(15, 0)</div><div class='del'>-#define GMAC_VLAN_TAG_ETV		BIT(16)</div><div class='del'>-</div><div class='del'>-/* MAC VLAN Tag Control */</div><div class='del'>-#define GMAC_VLAN_TAG_CTRL_OB		BIT(0)</div><div class='del'>-#define GMAC_VLAN_TAG_CTRL_CT		BIT(1)</div><div class='del'>-#define GMAC_VLAN_TAG_CTRL_OFS_MASK	GENMASK(6, 2)</div><div class='del'>-#define GMAC_VLAN_TAG_CTRL_OFS_SHIFT	2</div><div class='del'>-#define GMAC_VLAN_TAG_CTRL_EVLS_MASK	GENMASK(22, 21)</div><div class='del'>-#define GMAC_VLAN_TAG_CTRL_EVLS_SHIFT	21</div><div class='del'>-#define GMAC_VLAN_TAG_CTRL_EVLRXS	BIT(24)</div><div class='del'>-</div><div class='del'>-#define GMAC_VLAN_TAG_STRIP_NONE	(0x0 &lt;&lt; GMAC_VLAN_TAG_CTRL_EVLS_SHIFT)</div><div class='del'>-#define GMAC_VLAN_TAG_STRIP_PASS	(0x1 &lt;&lt; GMAC_VLAN_TAG_CTRL_EVLS_SHIFT)</div><div class='del'>-#define GMAC_VLAN_TAG_STRIP_FAIL	(0x2 &lt;&lt; GMAC_VLAN_TAG_CTRL_EVLS_SHIFT)</div><div class='del'>-#define GMAC_VLAN_TAG_STRIP_ALL		(0x3 &lt;&lt; GMAC_VLAN_TAG_CTRL_EVLS_SHIFT)</div><div class='del'>-</div><div class='del'>-/* MAC VLAN Tag Data/Filter */</div><div class='del'>-#define GMAC_VLAN_TAG_DATA_VID		GENMASK(15, 0)</div><div class='del'>-#define GMAC_VLAN_TAG_DATA_VEN		BIT(16)</div><div class='del'>-#define GMAC_VLAN_TAG_DATA_ETV		BIT(17)</div><div class='del'>-</div><div class='ctx'> /* MAC RX Queue Enable */</div><div class='ctx'> #define GMAC_RX_QUEUE_CLEAR(queue)	~(GENMASK(1, 0) &lt;&lt; ((queue) * 2))</div><div class='ctx'> #define GMAC_RX_AV_QUEUE_ENABLE(queue)	BIT((queue) * 2)</div><div class='hunk'>@@ -147,9 +106,6 @@</div><div class='ctx'> #define GMAC_INT_LPI_EN			BIT(5)</div><div class='ctx'> #define GMAC_INT_TSIE			BIT(12)</div><div class='ctx'> </div><div class='del'>-#define	GMAC_PCS_IRQ_DEFAULT	(GMAC_INT_RGSMIIS | GMAC_INT_PCS_LINK |	\</div><div class='del'>-				 GMAC_INT_PCS_ANE)</div><div class='del'>-</div><div class='ctx'> #define	GMAC_INT_DEFAULT_ENABLE	(GMAC_INT_PMT_EN | GMAC_INT_LPI_EN | \</div><div class='ctx'> 				 GMAC_INT_TSIE)</div><div class='ctx'> </div><div class='hunk'>@@ -177,23 +133,13 @@ enum power_event {</div><div class='ctx'> /* Energy Efficient Ethernet (EEE) for GMAC4</div><div class='ctx'>  *</div><div class='ctx'>  * LPI status, timer and control register offset</div><div class='add'>+ * For LPI control and status bit definitions, see common.h.</div><div class='ctx'>  */</div><div class='ctx'> #define GMAC4_LPI_CTRL_STATUS	0xd0</div><div class='ctx'> #define GMAC4_LPI_TIMER_CTRL	0xd4</div><div class='ctx'> #define GMAC4_LPI_ENTRY_TIMER	0xd8</div><div class='ctx'> #define GMAC4_MAC_ONEUS_TIC_COUNTER	0xdc</div><div class='ctx'> </div><div class='del'>-/* LPI control and status defines */</div><div class='del'>-#define GMAC4_LPI_CTRL_STATUS_LPITCSE	BIT(21)	/* LPI Tx Clock Stop Enable */</div><div class='del'>-#define GMAC4_LPI_CTRL_STATUS_LPIATE	BIT(20) /* LPI Timer Enable */</div><div class='del'>-#define GMAC4_LPI_CTRL_STATUS_LPITXA	BIT(19)	/* Enable LPI TX Automate */</div><div class='del'>-#define GMAC4_LPI_CTRL_STATUS_PLS	BIT(17) /* PHY Link Status */</div><div class='del'>-#define GMAC4_LPI_CTRL_STATUS_LPIEN	BIT(16)	/* LPI Enable */</div><div class='del'>-#define GMAC4_LPI_CTRL_STATUS_RLPIEX	BIT(3) /* Receive LPI Exit */</div><div class='del'>-#define GMAC4_LPI_CTRL_STATUS_RLPIEN	BIT(2) /* Receive LPI Entry */</div><div class='del'>-#define GMAC4_LPI_CTRL_STATUS_TLPIEX	BIT(1) /* Transmit LPI Exit */</div><div class='del'>-#define GMAC4_LPI_CTRL_STATUS_TLPIEN	BIT(0) /* Transmit LPI Entry */</div><div class='del'>-</div><div class='ctx'> /* MAC Debug bitmap */</div><div class='ctx'> #define GMAC_DEBUG_TFCSTS_MASK		GENMASK(18, 17)</div><div class='ctx'> #define GMAC_DEBUG_TFCSTS_SHIFT		17</div><div class='hunk'>@@ -392,9 +338,10 @@ static inline u32 mtl_chanx_base_addr(const struct dwmac4_addrs *addrs,</div><div class='ctx'> #define MTL_OP_MODE_RFA_SHIFT		8</div><div class='ctx'> </div><div class='ctx'> #define MTL_OP_MODE_EHFC		BIT(7)</div><div class='add'>+#define MTL_OP_MODE_DIS_TCP_EF		BIT(6)</div><div class='ctx'> </div><div class='del'>-#define MTL_OP_MODE_RTC_MASK		0x18</div><div class='del'>-#define MTL_OP_MODE_RTC_SHIFT		3</div><div class='add'>+#define MTL_OP_MODE_RTC_MASK		GENMASK(1, 0)</div><div class='add'>+#define MTL_OP_MODE_RTC_SHIFT		0</div><div class='ctx'> </div><div class='ctx'> #define MTL_OP_MODE_RTC_32		(1 &lt;&lt; MTL_OP_MODE_RTC_SHIFT)</div><div class='ctx'> #define MTL_OP_MODE_RTC_64		0</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c<br/>index c25781874aa7..a4282fd7c3c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c</a></div><div class='hunk'>@@ -18,54 +18,55 @@</div><div class='ctx'> #include "stmmac.h"</div><div class='ctx'> #include "stmmac_fpe.h"</div><div class='ctx'> #include "stmmac_pcs.h"</div><div class='add'>+#include "stmmac_vlan.h"</div><div class='ctx'> #include "dwmac4.h"</div><div class='ctx'> #include "dwmac5.h"</div><div class='ctx'> </div><div class='add'>+static int dwmac4_pcs_init(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;dma_cap.pcs)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return stmmac_integrated_pcs_init(priv, GMAC_PCS_BASE,</div><div class='add'>+					  GMAC_INT_PCS_LINK | GMAC_INT_PCS_ANE);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void dwmac4_core_init(struct mac_device_info *hw,</div><div class='ctx'> 			     struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value = readl(ioaddr + GMAC_CONFIG);</div><div class='del'>-	u32 clk_rate;</div><div class='del'>-</div><div class='del'>-	value |= GMAC_CORE_INIT;</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;ps) {</div><div class='del'>-		value |= GMAC_CONFIG_TE;</div><div class='del'>-</div><div class='del'>-		value &amp;= hw-&gt;link.speed_mask;</div><div class='del'>-		switch (hw-&gt;ps) {</div><div class='del'>-		case SPEED_1000:</div><div class='del'>-			value |= hw-&gt;link.speed1000;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED_100:</div><div class='del'>-			value |= hw-&gt;link.speed100;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED_10:</div><div class='del'>-			value |= hw-&gt;link.speed10;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	unsigned long clk_rate;</div><div class='add'>+	u32 value;</div><div class='ctx'> </div><div class='del'>-	writel(value, ioaddr + GMAC_CONFIG);</div><div class='add'>+	value = readl(ioaddr + GMAC_CONFIG);</div><div class='add'>+	writel(value | GMAC_CORE_INIT, ioaddr + GMAC_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* Configure LPI 1us counter to number of CSR clock ticks in 1us - 1 */</div><div class='ctx'> 	clk_rate = clk_get_rate(priv-&gt;plat-&gt;stmmac_clk);</div><div class='ctx'> 	writel((clk_rate / 1000000) - 1, ioaddr + GMAC4_MAC_ONEUS_TIC_COUNTER);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable GMAC interrupts */</div><div class='del'>-	value = GMAC_INT_DEFAULT_ENABLE;</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;pcs)</div><div class='del'>-		value |= GMAC_PCS_IRQ_DEFAULT;</div><div class='del'>-</div><div class='del'>-	writel(value, ioaddr + GMAC_INT_EN);</div><div class='add'>+	writel(GMAC_INT_DEFAULT_ENABLE, ioaddr + GMAC_INT_EN);</div><div class='ctx'> </div><div class='ctx'> 	if (GMAC_INT_DEFAULT_ENABLE &amp; GMAC_INT_TSIE)</div><div class='ctx'> 		init_waitqueue_head(&amp;priv-&gt;tstamp_busy_wait);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void dwmac4_irq_modify(struct mac_device_info *hw, u32 disable,</div><div class='add'>+			      u32 enable)</div><div class='add'>+{</div><div class='add'>+	void __iomem *int_mask = hw-&gt;pcsr + GMAC_INT_EN;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;hw-&gt;irq_ctrl_lock, flags);</div><div class='add'>+	value = readl(int_mask) &amp; ~disable;</div><div class='add'>+	value |= enable;</div><div class='add'>+	writel(value, int_mask);</div><div class='add'>+	spin_unlock_irqrestore(&amp;hw-&gt;irq_ctrl_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void dwmac4_update_caps(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	if (priv-&gt;plat-&gt;tx_queues_to_use &gt; 1)</div><div class='hunk'>@@ -376,33 +377,46 @@ static void dwmac4_get_umac_addr(struct mac_device_info *hw,</div><div class='ctx'> 				   GMAC_ADDR_LOW(reg_n));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac4_set_eee_mode(struct mac_device_info *hw,</div><div class='del'>-				bool en_tx_lpi_clockgating)</div><div class='add'>+static int dwmac4_set_lpi_mode(struct mac_device_info *hw,</div><div class='add'>+			       enum stmmac_lpi_mode mode,</div><div class='add'>+			       bool en_tx_lpi_clockgating, u32 et)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value;</div><div class='add'>+	u32 value, mask;</div><div class='ctx'> </div><div class='del'>-	/* Enable the link status receive on RGMII, SGMII ore SMII</div><div class='del'>-	 * receive path and instruct the transmit to enter in LPI</div><div class='del'>-	 * state.</div><div class='del'>-	 */</div><div class='del'>-	value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);</div><div class='del'>-	value |= GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA;</div><div class='add'>+	if (mode == STMMAC_LPI_DISABLE) {</div><div class='add'>+		value = 0;</div><div class='add'>+	} else {</div><div class='add'>+		value = LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_LPITXA;</div><div class='ctx'> </div><div class='del'>-	if (en_tx_lpi_clockgating)</div><div class='del'>-		value |= GMAC4_LPI_CTRL_STATUS_LPITCSE;</div><div class='add'>+		if (mode == STMMAC_LPI_TIMER) {</div><div class='add'>+			/* Return ERANGE if the timer is larger than the</div><div class='add'>+			 * register field.</div><div class='add'>+			 */</div><div class='add'>+			if (et &gt; STMMAC_ET_MAX)</div><div class='add'>+				return -ERANGE;</div><div class='ctx'> </div><div class='del'>-	writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);</div><div class='del'>-}</div><div class='add'>+			/* Set the hardware LPI entry timer */</div><div class='add'>+			writel(et, ioaddr + GMAC4_LPI_ENTRY_TIMER);</div><div class='ctx'> </div><div class='del'>-static void dwmac4_reset_eee_mode(struct mac_device_info *hw)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value;</div><div class='add'>+			/* Interpret a zero LPI entry timer to mean</div><div class='add'>+			 * immediate entry into LPI mode.</div><div class='add'>+			 */</div><div class='add'>+			if (et)</div><div class='add'>+				value |= LPI_CTRL_STATUS_LPIATE;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);</div><div class='del'>-	value &amp;= ~(GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA);</div><div class='add'>+		if (en_tx_lpi_clockgating)</div><div class='add'>+			value |= LPI_CTRL_STATUS_LPITCSE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mask = LPI_CTRL_STATUS_LPIATE | LPI_CTRL_STATUS_LPIEN |</div><div class='add'>+	       LPI_CTRL_STATUS_LPITXA | LPI_CTRL_STATUS_LPITCSE;</div><div class='add'>+</div><div class='add'>+	value |= readl(ioaddr + GMAC4_LPI_CTRL_STATUS) &amp; ~mask;</div><div class='ctx'> 	writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dwmac4_set_eee_pls(struct mac_device_info *hw, int link)</div><div class='hunk'>@@ -413,34 +427,13 @@ static void dwmac4_set_eee_pls(struct mac_device_info *hw, int link)</div><div class='ctx'> 	value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);</div><div class='ctx'> </div><div class='ctx'> 	if (link)</div><div class='del'>-		value |= GMAC4_LPI_CTRL_STATUS_PLS;</div><div class='add'>+		value |= LPI_CTRL_STATUS_PLS;</div><div class='ctx'> 	else</div><div class='del'>-		value &amp;= ~GMAC4_LPI_CTRL_STATUS_PLS;</div><div class='add'>+		value &amp;= ~LPI_CTRL_STATUS_PLS;</div><div class='ctx'> </div><div class='ctx'> 	writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac4_set_eee_lpi_entry_timer(struct mac_device_info *hw, int et)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	int value = et &amp; STMMAC_ET_MAX;</div><div class='del'>-	int regval;</div><div class='del'>-</div><div class='del'>-	/* Program LPI entry timer value into register */</div><div class='del'>-	writel(value, ioaddr + GMAC4_LPI_ENTRY_TIMER);</div><div class='del'>-</div><div class='del'>-	/* Enable/disable LPI entry timer */</div><div class='del'>-	regval = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);</div><div class='del'>-	regval |= GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA;</div><div class='del'>-</div><div class='del'>-	if (et)</div><div class='del'>-		regval |= GMAC4_LPI_CTRL_STATUS_LPIATE;</div><div class='del'>-	else</div><div class='del'>-		regval &amp;= ~GMAC4_LPI_CTRL_STATUS_LPIATE;</div><div class='del'>-</div><div class='del'>-	writel(regval, ioaddr + GMAC4_LPI_CTRL_STATUS);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void dwmac4_set_eee_timer(struct mac_device_info *hw, int ls, int tw)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='hunk'>@@ -456,165 +449,6 @@ static void dwmac4_set_eee_timer(struct mac_device_info *hw, int ls, int tw)</div><div class='ctx'> 	writel(value, ioaddr + GMAC4_LPI_TIMER_CTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac4_write_single_vlan(struct net_device *dev, u16 vid)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = (void __iomem *)dev-&gt;base_addr;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	val = readl(ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-	val &amp;= ~GMAC_VLAN_TAG_VID;</div><div class='del'>-	val |= GMAC_VLAN_TAG_ETV | vid;</div><div class='del'>-</div><div class='del'>-	writel(val, ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int dwmac4_write_vlan_filter(struct net_device *dev,</div><div class='del'>-				    struct mac_device_info *hw,</div><div class='del'>-				    u8 index, u32 data)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = (void __iomem *)dev-&gt;base_addr;</div><div class='del'>-	int ret;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	if (index &gt;= hw-&gt;num_vlan)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	writel(data, ioaddr + GMAC_VLAN_TAG_DATA);</div><div class='del'>-</div><div class='del'>-	val = readl(ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-	val &amp;= ~(GMAC_VLAN_TAG_CTRL_OFS_MASK |</div><div class='del'>-		GMAC_VLAN_TAG_CTRL_CT |</div><div class='del'>-		GMAC_VLAN_TAG_CTRL_OB);</div><div class='del'>-	val |= (index &lt;&lt; GMAC_VLAN_TAG_CTRL_OFS_SHIFT) | GMAC_VLAN_TAG_CTRL_OB;</div><div class='del'>-</div><div class='del'>-	writel(val, ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-</div><div class='del'>-	ret = readl_poll_timeout(ioaddr + GMAC_VLAN_TAG, val,</div><div class='del'>-				 !(val &amp; GMAC_VLAN_TAG_CTRL_OB),</div><div class='del'>-				 1000, 500000);</div><div class='del'>-	if (ret) {</div><div class='del'>-		netdev_err(dev, "Timeout accessing MAC_VLAN_Tag_Filter\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int dwmac4_add_hw_vlan_rx_fltr(struct net_device *dev,</div><div class='del'>-				      struct mac_device_info *hw,</div><div class='del'>-				      __be16 proto, u16 vid)</div><div class='del'>-{</div><div class='del'>-	int index = -1;</div><div class='del'>-	u32 val = 0;</div><div class='del'>-	int i, ret;</div><div class='del'>-</div><div class='del'>-	if (vid &gt; 4095)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* Single Rx VLAN Filter */</div><div class='del'>-	if (hw-&gt;num_vlan == 1) {</div><div class='del'>-		/* For single VLAN filter, VID 0 means VLAN promiscuous */</div><div class='del'>-		if (vid == 0) {</div><div class='del'>-			netdev_warn(dev, "Adding VLAN ID 0 is not supported\n");</div><div class='del'>-			return -EPERM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (hw-&gt;vlan_filter[0] &amp; GMAC_VLAN_TAG_VID) {</div><div class='del'>-			netdev_err(dev, "Only single VLAN ID supported\n");</div><div class='del'>-			return -EPERM;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		hw-&gt;vlan_filter[0] = vid;</div><div class='del'>-		dwmac4_write_single_vlan(dev, vid);</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Extended Rx VLAN Filter Enable */</div><div class='del'>-	val |= GMAC_VLAN_TAG_DATA_ETV | GMAC_VLAN_TAG_DATA_VEN | vid;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; hw-&gt;num_vlan; i++) {</div><div class='del'>-		if (hw-&gt;vlan_filter[i] == val)</div><div class='del'>-			return 0;</div><div class='del'>-		else if (!(hw-&gt;vlan_filter[i] &amp; GMAC_VLAN_TAG_DATA_VEN))</div><div class='del'>-			index = i;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (index == -1) {</div><div class='del'>-		netdev_err(dev, "MAC_VLAN_Tag_Filter full (size: %0u)\n",</div><div class='del'>-			   hw-&gt;num_vlan);</div><div class='del'>-		return -EPERM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = dwmac4_write_vlan_filter(dev, hw, index, val);</div><div class='del'>-</div><div class='del'>-	if (!ret)</div><div class='del'>-		hw-&gt;vlan_filter[index] = val;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int dwmac4_del_hw_vlan_rx_fltr(struct net_device *dev,</div><div class='del'>-				      struct mac_device_info *hw,</div><div class='del'>-				      __be16 proto, u16 vid)</div><div class='del'>-{</div><div class='del'>-	int i, ret = 0;</div><div class='del'>-</div><div class='del'>-	/* Single Rx VLAN Filter */</div><div class='del'>-	if (hw-&gt;num_vlan == 1) {</div><div class='del'>-		if ((hw-&gt;vlan_filter[0] &amp; GMAC_VLAN_TAG_VID) == vid) {</div><div class='del'>-			hw-&gt;vlan_filter[0] = 0;</div><div class='del'>-			dwmac4_write_single_vlan(dev, 0);</div><div class='del'>-		}</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Extended Rx VLAN Filter Enable */</div><div class='del'>-	for (i = 0; i &lt; hw-&gt;num_vlan; i++) {</div><div class='del'>-		if ((hw-&gt;vlan_filter[i] &amp; GMAC_VLAN_TAG_DATA_VID) == vid) {</div><div class='del'>-			ret = dwmac4_write_vlan_filter(dev, hw, i, 0);</div><div class='del'>-</div><div class='del'>-			if (!ret)</div><div class='del'>-				hw-&gt;vlan_filter[i] = 0;</div><div class='del'>-			else</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dwmac4_restore_hw_vlan_rx_fltr(struct net_device *dev,</div><div class='del'>-					   struct mac_device_info *hw)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value;</div><div class='del'>-	u32 hash;</div><div class='del'>-	u32 val;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Single Rx VLAN Filter */</div><div class='del'>-	if (hw-&gt;num_vlan == 1) {</div><div class='del'>-		dwmac4_write_single_vlan(dev, hw-&gt;vlan_filter[0]);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Extended Rx VLAN Filter Enable */</div><div class='del'>-	for (i = 0; i &lt; hw-&gt;num_vlan; i++) {</div><div class='del'>-		if (hw-&gt;vlan_filter[i] &amp; GMAC_VLAN_TAG_DATA_VEN) {</div><div class='del'>-			val = hw-&gt;vlan_filter[i];</div><div class='del'>-			dwmac4_write_vlan_filter(dev, hw, i, val);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	hash = readl(ioaddr + GMAC_VLAN_HASH_TABLE);</div><div class='del'>-	if (hash &amp; GMAC_VLAN_VLHT) {</div><div class='del'>-		value = readl(ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-		value |= GMAC_VLAN_VTHM;</div><div class='del'>-		writel(value, ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void dwmac4_set_filter(struct mac_device_info *hw,</div><div class='ctx'> 			      struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -749,48 +583,9 @@ static void dwmac4_flow_ctrl(struct mac_device_info *hw, unsigned int duplex,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac4_ctrl_ane(void __iomem *ioaddr, bool ane, bool srgmi_ral,</div><div class='del'>-			    bool loopback)</div><div class='del'>-{</div><div class='del'>-	dwmac_ctrl_ane(ioaddr, GMAC_PCS_BASE, ane, srgmi_ral, loopback);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dwmac4_get_adv_lp(void __iomem *ioaddr, struct rgmii_adv *adv)</div><div class='add'>+static void dwmac4_ctrl_ane(struct stmmac_priv *priv, bool ane, bool srgmi_ral)</div><div class='ctx'> {</div><div class='del'>-	dwmac_get_adv_lp(ioaddr, GMAC_PCS_BASE, adv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* RGMII or SMII interface */</div><div class='del'>-static void dwmac4_phystatus(void __iomem *ioaddr, struct stmmac_extra_stats *x)</div><div class='del'>-{</div><div class='del'>-	u32 status;</div><div class='del'>-</div><div class='del'>-	status = readl(ioaddr + GMAC_PHYIF_CONTROL_STATUS);</div><div class='del'>-	x-&gt;irq_rgmii_n++;</div><div class='del'>-</div><div class='del'>-	/* Check the link status */</div><div class='del'>-	if (status &amp; GMAC_PHYIF_CTRLSTATUS_LNKSTS) {</div><div class='del'>-		int speed_value;</div><div class='del'>-</div><div class='del'>-		x-&gt;pcs_link = 1;</div><div class='del'>-</div><div class='del'>-		speed_value = ((status &amp; GMAC_PHYIF_CTRLSTATUS_SPEED) &gt;&gt;</div><div class='del'>-			       GMAC_PHYIF_CTRLSTATUS_SPEED_SHIFT);</div><div class='del'>-		if (speed_value == GMAC_PHYIF_CTRLSTATUS_SPEED_125)</div><div class='del'>-			x-&gt;pcs_speed = SPEED_1000;</div><div class='del'>-		else if (speed_value == GMAC_PHYIF_CTRLSTATUS_SPEED_25)</div><div class='del'>-			x-&gt;pcs_speed = SPEED_100;</div><div class='del'>-		else</div><div class='del'>-			x-&gt;pcs_speed = SPEED_10;</div><div class='del'>-</div><div class='del'>-		x-&gt;pcs_duplex = (status &amp; GMAC_PHYIF_CTRLSTATUS_LNKMOD);</div><div class='del'>-</div><div class='del'>-		pr_info("Link is Up - %d/%s\n", (int)x-&gt;pcs_speed,</div><div class='del'>-			x-&gt;pcs_duplex ? "Full" : "Half");</div><div class='del'>-	} else {</div><div class='del'>-		x-&gt;pcs_link = 0;</div><div class='del'>-		pr_info("Link is Down\n");</div><div class='del'>-	}</div><div class='add'>+	dwmac_ctrl_ane(priv-&gt;ioaddr, GMAC_PCS_BASE, ane, srgmi_ral);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dwmac4_irq_mtl_status(struct stmmac_priv *priv,</div><div class='hunk'>@@ -849,23 +644,21 @@ static int dwmac4_irq_status(struct mac_device_info *hw,</div><div class='ctx'> 		/* Clear LPI interrupt by reading MAC_LPI_Control_Status */</div><div class='ctx'> 		u32 status = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);</div><div class='ctx'> </div><div class='del'>-		if (status &amp; GMAC4_LPI_CTRL_STATUS_TLPIEN) {</div><div class='add'>+		if (status &amp; LPI_CTRL_STATUS_TLPIEN) {</div><div class='ctx'> 			ret |= CORE_IRQ_TX_PATH_IN_LPI_MODE;</div><div class='ctx'> 			x-&gt;irq_tx_path_in_lpi_mode_n++;</div><div class='ctx'> 		}</div><div class='del'>-		if (status &amp; GMAC4_LPI_CTRL_STATUS_TLPIEX) {</div><div class='add'>+		if (status &amp; LPI_CTRL_STATUS_TLPIEX) {</div><div class='ctx'> 			ret |= CORE_IRQ_TX_PATH_EXIT_LPI_MODE;</div><div class='ctx'> 			x-&gt;irq_tx_path_exit_lpi_mode_n++;</div><div class='ctx'> 		}</div><div class='del'>-		if (status &amp; GMAC4_LPI_CTRL_STATUS_RLPIEN)</div><div class='add'>+		if (status &amp; LPI_CTRL_STATUS_RLPIEN)</div><div class='ctx'> 			x-&gt;irq_rx_path_in_lpi_mode_n++;</div><div class='del'>-		if (status &amp; GMAC4_LPI_CTRL_STATUS_RLPIEX)</div><div class='add'>+		if (status &amp; LPI_CTRL_STATUS_RLPIEX)</div><div class='ctx'> 			x-&gt;irq_rx_path_exit_lpi_mode_n++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x);</div><div class='del'>-	if (intr_status &amp; PCS_RGSMIIIS_IRQ)</div><div class='del'>-		dwmac4_phystatus(ioaddr, x);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -973,45 +766,6 @@ static void dwmac4_set_mac_loopback(void __iomem *ioaddr, bool enable)</div><div class='ctx'> 	writel(value, ioaddr + GMAC_CONFIG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac4_update_vlan_hash(struct mac_device_info *hw, u32 hash,</div><div class='del'>-				    u16 perfect_match, bool is_double)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	writel(hash, ioaddr + GMAC_VLAN_HASH_TABLE);</div><div class='del'>-</div><div class='del'>-	value = readl(ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-</div><div class='del'>-	if (hash) {</div><div class='del'>-		value |= GMAC_VLAN_VTHM | GMAC_VLAN_ETV;</div><div class='del'>-		if (is_double) {</div><div class='del'>-			value |= GMAC_VLAN_EDVLP;</div><div class='del'>-			value |= GMAC_VLAN_ESVL;</div><div class='del'>-			value |= GMAC_VLAN_DOVLTC;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		writel(value, ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-	} else if (perfect_match) {</div><div class='del'>-		u32 value = GMAC_VLAN_ETV;</div><div class='del'>-</div><div class='del'>-		if (is_double) {</div><div class='del'>-			value |= GMAC_VLAN_EDVLP;</div><div class='del'>-			value |= GMAC_VLAN_ESVL;</div><div class='del'>-			value |= GMAC_VLAN_DOVLTC;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		writel(value | perfect_match, ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-	} else {</div><div class='del'>-		value &amp;= ~(GMAC_VLAN_VTHM | GMAC_VLAN_ETV);</div><div class='del'>-		value &amp;= ~(GMAC_VLAN_EDVLP | GMAC_VLAN_ESVL);</div><div class='del'>-		value &amp;= ~GMAC_VLAN_DOVLTC;</div><div class='del'>-		value &amp;= ~GMAC_VLAN_VID;</div><div class='del'>-</div><div class='del'>-		writel(value, ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void dwmac4_sarc_configure(void __iomem *ioaddr, int val)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value = readl(ioaddr + GMAC_CONFIG);</div><div class='hunk'>@@ -1022,19 +776,6 @@ static void dwmac4_sarc_configure(void __iomem *ioaddr, int val)</div><div class='ctx'> 	writel(value, ioaddr + GMAC_CONFIG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac4_enable_vlan(struct mac_device_info *hw, u32 type)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	value = readl(ioaddr + GMAC_VLAN_INCL);</div><div class='del'>-	value |= GMAC_VLAN_VLTI;</div><div class='del'>-	value |= GMAC_VLAN_CSVL; /* Only use SVLAN */</div><div class='del'>-	value &amp;= ~GMAC_VLAN_VLC;</div><div class='del'>-	value |= (type &lt;&lt; GMAC_VLAN_VLC_SHIFT) &amp; GMAC_VLAN_VLC;</div><div class='del'>-	writel(value, ioaddr + GMAC_VLAN_INCL);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void dwmac4_set_arp_offload(struct mac_device_info *hw, bool en,</div><div class='ctx'> 				   u32 addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -1151,37 +892,10 @@ static int dwmac4_config_l4_filter(struct mac_device_info *hw, u32 filter_no,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwmac4_rx_hw_vlan(struct mac_device_info *hw,</div><div class='del'>-			      struct dma_desc *rx_desc, struct sk_buff *skb)</div><div class='del'>-{</div><div class='del'>-	if (hw-&gt;desc-&gt;get_rx_vlan_valid(rx_desc)) {</div><div class='del'>-		u16 vid = hw-&gt;desc-&gt;get_rx_vlan_tci(rx_desc);</div><div class='del'>-</div><div class='del'>-		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dwmac4_set_hw_vlan_mode(struct mac_device_info *hw)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value = readl(ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-</div><div class='del'>-	value &amp;= ~GMAC_VLAN_TAG_CTRL_EVLS_MASK;</div><div class='del'>-</div><div class='del'>-	if (hw-&gt;hw_vlan_en)</div><div class='del'>-		/* Always strip VLAN on Receive */</div><div class='del'>-		value |= GMAC_VLAN_TAG_STRIP_ALL;</div><div class='del'>-	else</div><div class='del'>-		/* Do not strip VLAN on Receive */</div><div class='del'>-		value |= GMAC_VLAN_TAG_STRIP_NONE;</div><div class='del'>-</div><div class='del'>-	/* Enable outer VLAN Tag in Rx DMA descriptor */</div><div class='del'>-	value |= GMAC_VLAN_TAG_CTRL_EVLRXS;</div><div class='del'>-	writel(value, ioaddr + GMAC_VLAN_TAG);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> const struct stmmac_ops dwmac4_ops = {</div><div class='add'>+	.pcs_init = dwmac4_pcs_init,</div><div class='ctx'> 	.core_init = dwmac4_core_init,</div><div class='add'>+	.irq_modify = dwmac4_irq_modify,</div><div class='ctx'> 	.update_caps = dwmac4_update_caps,</div><div class='ctx'> 	.set_mac = stmmac_set_mac,</div><div class='ctx'> 	.rx_ipc = dwmac4_rx_ipc_enable,</div><div class='hunk'>@@ -1201,31 +915,23 @@ const struct stmmac_ops dwmac4_ops = {</div><div class='ctx'> 	.pmt = dwmac4_pmt,</div><div class='ctx'> 	.set_umac_addr = dwmac4_set_umac_addr,</div><div class='ctx'> 	.get_umac_addr = dwmac4_get_umac_addr,</div><div class='del'>-	.set_eee_mode = dwmac4_set_eee_mode,</div><div class='del'>-	.reset_eee_mode = dwmac4_reset_eee_mode,</div><div class='del'>-	.set_eee_lpi_entry_timer = dwmac4_set_eee_lpi_entry_timer,</div><div class='add'>+	.set_lpi_mode = dwmac4_set_lpi_mode,</div><div class='ctx'> 	.set_eee_timer = dwmac4_set_eee_timer,</div><div class='ctx'> 	.set_eee_pls = dwmac4_set_eee_pls,</div><div class='ctx'> 	.pcs_ctrl_ane = dwmac4_ctrl_ane,</div><div class='del'>-	.pcs_get_adv_lp = dwmac4_get_adv_lp,</div><div class='ctx'> 	.debug = dwmac4_debug,</div><div class='ctx'> 	.set_filter = dwmac4_set_filter,</div><div class='ctx'> 	.set_mac_loopback = dwmac4_set_mac_loopback,</div><div class='del'>-	.update_vlan_hash = dwmac4_update_vlan_hash,</div><div class='ctx'> 	.sarc_configure = dwmac4_sarc_configure,</div><div class='del'>-	.enable_vlan = dwmac4_enable_vlan,</div><div class='ctx'> 	.set_arp_offload = dwmac4_set_arp_offload,</div><div class='ctx'> 	.config_l3_filter = dwmac4_config_l3_filter,</div><div class='ctx'> 	.config_l4_filter = dwmac4_config_l4_filter,</div><div class='del'>-	.add_hw_vlan_rx_fltr = dwmac4_add_hw_vlan_rx_fltr,</div><div class='del'>-	.del_hw_vlan_rx_fltr = dwmac4_del_hw_vlan_rx_fltr,</div><div class='del'>-	.restore_hw_vlan_rx_fltr = dwmac4_restore_hw_vlan_rx_fltr,</div><div class='del'>-	.rx_hw_vlan = dwmac4_rx_hw_vlan,</div><div class='del'>-	.set_hw_vlan_mode = dwmac4_set_hw_vlan_mode,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct stmmac_ops dwmac410_ops = {</div><div class='add'>+	.pcs_init = dwmac4_pcs_init,</div><div class='ctx'> 	.core_init = dwmac4_core_init,</div><div class='add'>+	.irq_modify = dwmac4_irq_modify,</div><div class='ctx'> 	.update_caps = dwmac4_update_caps,</div><div class='ctx'> 	.set_mac = stmmac_dwmac4_set_mac,</div><div class='ctx'> 	.rx_ipc = dwmac4_rx_ipc_enable,</div><div class='hunk'>@@ -1245,33 +951,25 @@ const struct stmmac_ops dwmac410_ops = {</div><div class='ctx'> 	.pmt = dwmac4_pmt,</div><div class='ctx'> 	.set_umac_addr = dwmac4_set_umac_addr,</div><div class='ctx'> 	.get_umac_addr = dwmac4_get_umac_addr,</div><div class='del'>-	.set_eee_mode = dwmac4_set_eee_mode,</div><div class='del'>-	.reset_eee_mode = dwmac4_reset_eee_mode,</div><div class='del'>-	.set_eee_lpi_entry_timer = dwmac4_set_eee_lpi_entry_timer,</div><div class='add'>+	.set_lpi_mode = dwmac4_set_lpi_mode,</div><div class='ctx'> 	.set_eee_timer = dwmac4_set_eee_timer,</div><div class='ctx'> 	.set_eee_pls = dwmac4_set_eee_pls,</div><div class='ctx'> 	.pcs_ctrl_ane = dwmac4_ctrl_ane,</div><div class='del'>-	.pcs_get_adv_lp = dwmac4_get_adv_lp,</div><div class='ctx'> 	.debug = dwmac4_debug,</div><div class='ctx'> 	.set_filter = dwmac4_set_filter,</div><div class='ctx'> 	.flex_pps_config = dwmac5_flex_pps_config,</div><div class='ctx'> 	.set_mac_loopback = dwmac4_set_mac_loopback,</div><div class='del'>-	.update_vlan_hash = dwmac4_update_vlan_hash,</div><div class='ctx'> 	.sarc_configure = dwmac4_sarc_configure,</div><div class='del'>-	.enable_vlan = dwmac4_enable_vlan,</div><div class='ctx'> 	.set_arp_offload = dwmac4_set_arp_offload,</div><div class='ctx'> 	.config_l3_filter = dwmac4_config_l3_filter,</div><div class='ctx'> 	.config_l4_filter = dwmac4_config_l4_filter,</div><div class='ctx'> 	.fpe_map_preemption_class = dwmac5_fpe_map_preemption_class,</div><div class='del'>-	.add_hw_vlan_rx_fltr = dwmac4_add_hw_vlan_rx_fltr,</div><div class='del'>-	.del_hw_vlan_rx_fltr = dwmac4_del_hw_vlan_rx_fltr,</div><div class='del'>-	.restore_hw_vlan_rx_fltr = dwmac4_restore_hw_vlan_rx_fltr,</div><div class='del'>-	.rx_hw_vlan = dwmac4_rx_hw_vlan,</div><div class='del'>-	.set_hw_vlan_mode = dwmac4_set_hw_vlan_mode,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> const struct stmmac_ops dwmac510_ops = {</div><div class='add'>+	.pcs_init = dwmac4_pcs_init,</div><div class='ctx'> 	.core_init = dwmac4_core_init,</div><div class='add'>+	.irq_modify = dwmac4_irq_modify,</div><div class='ctx'> 	.update_caps = dwmac4_update_caps,</div><div class='ctx'> 	.set_mac = stmmac_dwmac4_set_mac,</div><div class='ctx'> 	.rx_ipc = dwmac4_rx_ipc_enable,</div><div class='hunk'>@@ -1291,13 +989,10 @@ const struct stmmac_ops dwmac510_ops = {</div><div class='ctx'> 	.pmt = dwmac4_pmt,</div><div class='ctx'> 	.set_umac_addr = dwmac4_set_umac_addr,</div><div class='ctx'> 	.get_umac_addr = dwmac4_get_umac_addr,</div><div class='del'>-	.set_eee_mode = dwmac4_set_eee_mode,</div><div class='del'>-	.reset_eee_mode = dwmac4_reset_eee_mode,</div><div class='del'>-	.set_eee_lpi_entry_timer = dwmac4_set_eee_lpi_entry_timer,</div><div class='add'>+	.set_lpi_mode = dwmac4_set_lpi_mode,</div><div class='ctx'> 	.set_eee_timer = dwmac4_set_eee_timer,</div><div class='ctx'> 	.set_eee_pls = dwmac4_set_eee_pls,</div><div class='ctx'> 	.pcs_ctrl_ane = dwmac4_ctrl_ane,</div><div class='del'>-	.pcs_get_adv_lp = dwmac4_get_adv_lp,</div><div class='ctx'> 	.debug = dwmac4_debug,</div><div class='ctx'> 	.set_filter = dwmac4_set_filter,</div><div class='ctx'> 	.safety_feat_config = dwmac5_safety_feat_config,</div><div class='hunk'>@@ -1306,51 +1001,13 @@ const struct stmmac_ops dwmac510_ops = {</div><div class='ctx'> 	.rxp_config = dwmac5_rxp_config,</div><div class='ctx'> 	.flex_pps_config = dwmac5_flex_pps_config,</div><div class='ctx'> 	.set_mac_loopback = dwmac4_set_mac_loopback,</div><div class='del'>-	.update_vlan_hash = dwmac4_update_vlan_hash,</div><div class='ctx'> 	.sarc_configure = dwmac4_sarc_configure,</div><div class='del'>-	.enable_vlan = dwmac4_enable_vlan,</div><div class='ctx'> 	.set_arp_offload = dwmac4_set_arp_offload,</div><div class='ctx'> 	.config_l3_filter = dwmac4_config_l3_filter,</div><div class='ctx'> 	.config_l4_filter = dwmac4_config_l4_filter,</div><div class='ctx'> 	.fpe_map_preemption_class = dwmac5_fpe_map_preemption_class,</div><div class='del'>-	.add_hw_vlan_rx_fltr = dwmac4_add_hw_vlan_rx_fltr,</div><div class='del'>-	.del_hw_vlan_rx_fltr = dwmac4_del_hw_vlan_rx_fltr,</div><div class='del'>-	.restore_hw_vlan_rx_fltr = dwmac4_restore_hw_vlan_rx_fltr,</div><div class='del'>-	.rx_hw_vlan = dwmac4_rx_hw_vlan,</div><div class='del'>-	.set_hw_vlan_mode = dwmac4_set_hw_vlan_mode,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static u32 dwmac4_get_num_vlan(void __iomem *ioaddr)</div><div class='del'>-{</div><div class='del'>-	u32 val, num_vlan;</div><div class='del'>-</div><div class='del'>-	val = readl(ioaddr + GMAC_HW_FEATURE3);</div><div class='del'>-	switch (val &amp; GMAC_HW_FEAT_NRVF) {</div><div class='del'>-	case 0:</div><div class='del'>-		num_vlan = 1;</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		num_vlan = 4;</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		num_vlan = 8;</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		num_vlan = 16;</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		num_vlan = 24;</div><div class='del'>-		break;</div><div class='del'>-	case 5:</div><div class='del'>-		num_vlan = 32;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		num_vlan = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return num_vlan;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int dwmac4_setup(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct mac_device_info *mac = priv-&gt;hw;</div><div class='hunk'>@@ -1382,7 +1039,7 @@ int dwmac4_setup(struct stmmac_priv *priv)</div><div class='ctx'> 	mac-&gt;mii.reg_mask = GENMASK(20, 16);</div><div class='ctx'> 	mac-&gt;mii.clk_csr_shift = 8;</div><div class='ctx'> 	mac-&gt;mii.clk_csr_mask = GENMASK(11, 8);</div><div class='del'>-	mac-&gt;num_vlan = dwmac4_get_num_vlan(priv-&gt;ioaddr);</div><div class='add'>+	mac-&gt;num_vlan = stmmac_get_num_vlan(priv-&gt;ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c<br/>index a5fb31eb0192..aac68dc28dc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c</a></div><div class='hunk'>@@ -110,16 +110,20 @@ static int dwmac4_wrback_get_rx_status(struct stmmac_extra_stats *x,</div><div class='ctx'> </div><div class='ctx'> 	message_type = (rdes1 &amp; ERDES4_MSG_TYPE_MASK) &gt;&gt; 8;</div><div class='ctx'> </div><div class='del'>-	if (rdes1 &amp; RDES1_IP_HDR_ERROR)</div><div class='add'>+	if (rdes1 &amp; RDES1_IP_HDR_ERROR) {</div><div class='ctx'> 		x-&gt;ip_hdr_err++;</div><div class='add'>+		ret |= csum_none;</div><div class='add'>+	}</div><div class='ctx'> 	if (rdes1 &amp; RDES1_IP_CSUM_BYPASSED)</div><div class='ctx'> 		x-&gt;ip_csum_bypassed++;</div><div class='ctx'> 	if (rdes1 &amp; RDES1_IPV4_HEADER)</div><div class='ctx'> 		x-&gt;ipv4_pkt_rcvd++;</div><div class='ctx'> 	if (rdes1 &amp; RDES1_IPV6_HEADER)</div><div class='ctx'> 		x-&gt;ipv6_pkt_rcvd++;</div><div class='del'>-	if (rdes1 &amp; RDES1_IP_PAYLOAD_ERROR)</div><div class='add'>+	if (rdes1 &amp; RDES1_IP_PAYLOAD_ERROR) {</div><div class='ctx'> 		x-&gt;ip_payload_err++;</div><div class='add'>+		ret |= csum_none;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (message_type == RDES_EXT_NO_PTP)</div><div class='ctx'> 		x-&gt;no_ptp_rx_msg_type_ext++;</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h<br/>index 1ce6f43d545a..806555976496 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h</a></div><div class='hunk'>@@ -144,4 +144,7 @@</div><div class='ctx'> /* TDS3 use for both format (read and write back) */</div><div class='ctx'> #define RDES3_OWN			BIT(31)</div><div class='ctx'> </div><div class='add'>+extern const struct stmmac_mode_ops dwmac4_ring_mode_ops;</div><div class='add'>+extern const struct stmmac_desc_ops dwmac4_desc_ops;</div><div class='add'>+</div><div class='ctx'> #endif /* __DWMAC4_DESCS_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c<br/>index 22a044d93e17..7b513324cfb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c</a></div><div class='hunk'>@@ -18,7 +18,6 @@</div><div class='ctx'> static void dwmac4_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value = readl(ioaddr + DMA_SYS_BUS_MODE);</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	pr_info("dwmac4: Master AXI performs %s burst length\n",</div><div class='ctx'> 		(value &amp; DMA_SYS_BUS_FB) ? "fixed" : "any");</div><div class='hunk'>@@ -38,33 +37,10 @@ static void dwmac4_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)</div><div class='ctx'> </div><div class='ctx'> 	/* Depending on the UNDEF bit the Master AXI will perform any burst</div><div class='ctx'> 	 * length according to the BLEN programmed (by default all BLEN are</div><div class='del'>-	 * set).</div><div class='add'>+	 * set). Note that the UNDEF bit is readonly, and is the inverse of</div><div class='add'>+	 * Bus Mode bit 16.</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; AXI_BLEN; i++) {</div><div class='del'>-		switch (axi-&gt;axi_blen[i]) {</div><div class='del'>-		case 256:</div><div class='del'>-			value |= DMA_AXI_BLEN256;</div><div class='del'>-			break;</div><div class='del'>-		case 128:</div><div class='del'>-			value |= DMA_AXI_BLEN128;</div><div class='del'>-			break;</div><div class='del'>-		case 64:</div><div class='del'>-			value |= DMA_AXI_BLEN64;</div><div class='del'>-			break;</div><div class='del'>-		case 32:</div><div class='del'>-			value |= DMA_AXI_BLEN32;</div><div class='del'>-			break;</div><div class='del'>-		case 16:</div><div class='del'>-			value |= DMA_AXI_BLEN16;</div><div class='del'>-			break;</div><div class='del'>-		case 8:</div><div class='del'>-			value |= DMA_AXI_BLEN8;</div><div class='del'>-			break;</div><div class='del'>-		case 4:</div><div class='del'>-			value |= DMA_AXI_BLEN4;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	value = (value &amp; ~DMA_AXI_BLEN_MASK) | axi-&gt;axi_blen_regval;</div><div class='ctx'> </div><div class='ctx'> 	writel(value, ioaddr + DMA_SYS_BUS_MODE);</div><div class='ctx'> }</div><div class='hunk'>@@ -268,13 +244,15 @@ static void dwmac4_dma_rx_chan_op_mode(struct stmmac_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	mtl_rx_op = readl(ioaddr + MTL_CHAN_RX_OP_MODE(dwmac4_addrs, channel));</div><div class='ctx'> </div><div class='add'>+	mtl_rx_op |= MTL_OP_MODE_DIS_TCP_EF;</div><div class='add'>+</div><div class='ctx'> 	if (mode == SF_DMA_MODE) {</div><div class='ctx'> 		pr_debug("GMAC: enable RX store and forward mode\n");</div><div class='ctx'> 		mtl_rx_op |= MTL_OP_MODE_RSF;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pr_debug("GMAC: disable RX SF mode (threshold %d)\n", mode);</div><div class='ctx'> 		mtl_rx_op &amp;= ~MTL_OP_MODE_RSF;</div><div class='del'>-		mtl_rx_op &amp;= MTL_OP_MODE_RTC_MASK;</div><div class='add'>+		mtl_rx_op &amp;= ~MTL_OP_MODE_RTC_MASK;</div><div class='ctx'> 		if (mode &lt;= 32)</div><div class='ctx'> 			mtl_rx_op |= MTL_OP_MODE_RTC_32;</div><div class='ctx'> 		else if (mode &lt;= 64)</div><div class='hunk'>@@ -343,7 +321,7 @@ static void dwmac4_dma_tx_chan_op_mode(struct stmmac_priv *priv,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pr_debug("GMAC: disabling TX SF (threshold %d)\n", mode);</div><div class='ctx'> 		mtl_tx_op &amp;= ~MTL_OP_MODE_TSF;</div><div class='del'>-		mtl_tx_op &amp;= MTL_OP_MODE_TTC_MASK;</div><div class='add'>+		mtl_tx_op &amp;= ~MTL_OP_MODE_TTC_MASK;</div><div class='ctx'> 		/* Set the transmit threshold */</div><div class='ctx'> 		if (mode &lt;= 32)</div><div class='ctx'> 			mtl_tx_op |= MTL_OP_MODE_TTC_32;</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h<br/>index 4f980dcd3958..f27126f05551 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h</a></div><div class='hunk'>@@ -69,15 +69,8 @@</div><div class='ctx'> </div><div class='ctx'> #define DMA_SYS_BUS_MB			BIT(14)</div><div class='ctx'> #define DMA_AXI_1KBBE			BIT(13)</div><div class='del'>-#define DMA_SYS_BUS_AAL			BIT(12)</div><div class='add'>+#define DMA_SYS_BUS_AAL			DMA_AXI_AAL</div><div class='ctx'> #define DMA_SYS_BUS_EAME		BIT(11)</div><div class='del'>-#define DMA_AXI_BLEN256			BIT(7)</div><div class='del'>-#define DMA_AXI_BLEN128			BIT(6)</div><div class='del'>-#define DMA_AXI_BLEN64			BIT(5)</div><div class='del'>-#define DMA_AXI_BLEN32			BIT(4)</div><div class='del'>-#define DMA_AXI_BLEN16			BIT(3)</div><div class='del'>-#define DMA_AXI_BLEN8			BIT(2)</div><div class='del'>-#define DMA_AXI_BLEN4			BIT(1)</div><div class='ctx'> #define DMA_SYS_BUS_FB			BIT(0)</div><div class='ctx'> </div><div class='ctx'> #define DMA_BURST_LEN_DEFAULT		(DMA_AXI_BLEN256 | DMA_AXI_BLEN128 | \</div><div class='hunk'>@@ -85,8 +78,6 @@</div><div class='ctx'> 					DMA_AXI_BLEN16 | DMA_AXI_BLEN8 | \</div><div class='ctx'> 					DMA_AXI_BLEN4)</div><div class='ctx'> </div><div class='del'>-#define DMA_AXI_BURST_LEN_MASK		0x000000FE</div><div class='del'>-</div><div class='ctx'> /* DMA TBS Control */</div><div class='ctx'> #define DMA_TBS_FTOS			GENMASK(31, 8)</div><div class='ctx'> #define DMA_TBS_FTOV			BIT(0)</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c<br/>index 0d185e54eb7e..57c03d491774 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c</a></div><div class='hunk'>@@ -185,8 +185,6 @@ int dwmac4_dma_interrupt(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='ctx'> 			x-&gt;rx_buf_unav_irq++;</div><div class='ctx'> 		if (unlikely(intr_status &amp; DMA_CHAN_STATUS_RPS))</div><div class='ctx'> 			x-&gt;rx_process_stopped_irq++;</div><div class='del'>-		if (unlikely(intr_status &amp; DMA_CHAN_STATUS_RWT))</div><div class='del'>-			x-&gt;rx_watchdog_irq++;</div><div class='ctx'> 		if (unlikely(intr_status &amp; DMA_CHAN_STATUS_ETI))</div><div class='ctx'> 			x-&gt;tx_early_irq++;</div><div class='ctx'> 		if (unlikely(intr_status &amp; DMA_CHAN_STATUS_TPS)) {</div><div class='hunk'>@@ -198,6 +196,10 @@ int dwmac4_dma_interrupt(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='ctx'> 			ret = tx_hard_error;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(intr_status &amp; DMA_CHAN_STATUS_RWT))</div><div class='add'>+		x-&gt;rx_watchdog_irq++;</div><div class='add'>+</div><div class='ctx'> 	/* TX/RX NORMAL interrupts */</div><div class='ctx'> 	if (likely(intr_status &amp; DMA_CHAN_STATUS_RI)) {</div><div class='ctx'> 		u64_stats_update_begin(&amp;stats-&gt;syncp);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h<br/>index 5d9c18f5bbf5..054ecb20ce3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h</a></div><div class='hunk'>@@ -68,23 +68,14 @@ static inline u32 dma_chan_base_addr(u32 base, u32 chan)</div><div class='ctx'> #define DMA_AXI_OSR_MAX		0xf</div><div class='ctx'> #define DMA_AXI_MAX_OSR_LIMIT ((DMA_AXI_OSR_MAX &lt;&lt; DMA_AXI_WR_OSR_LMT_SHIFT) | \</div><div class='ctx'> 			       (DMA_AXI_OSR_MAX &lt;&lt; DMA_AXI_RD_OSR_LMT_SHIFT))</div><div class='del'>-#define	DMA_AXI_1KBBE		BIT(13)</div><div class='del'>-#define DMA_AXI_AAL		BIT(12)</div><div class='del'>-#define DMA_AXI_BLEN256		BIT(7)</div><div class='del'>-#define DMA_AXI_BLEN128		BIT(6)</div><div class='del'>-#define DMA_AXI_BLEN64		BIT(5)</div><div class='del'>-#define DMA_AXI_BLEN32		BIT(4)</div><div class='del'>-#define DMA_AXI_BLEN16		BIT(3)</div><div class='del'>-#define DMA_AXI_BLEN8		BIT(2)</div><div class='del'>-#define DMA_AXI_BLEN4		BIT(1)</div><div class='ctx'> #define DMA_BURST_LEN_DEFAULT	(DMA_AXI_BLEN256 | DMA_AXI_BLEN128 | \</div><div class='ctx'> 				 DMA_AXI_BLEN64 | DMA_AXI_BLEN32 | \</div><div class='ctx'> 				 DMA_AXI_BLEN16 | DMA_AXI_BLEN8 | \</div><div class='ctx'> 				 DMA_AXI_BLEN4)</div><div class='ctx'> </div><div class='del'>-#define DMA_AXI_UNDEF		BIT(0)</div><div class='add'>+#define	DMA_AXI_1KBBE		BIT(13)</div><div class='ctx'> </div><div class='del'>-#define DMA_AXI_BURST_LEN_MASK	0x000000FE</div><div class='add'>+#define DMA_AXI_UNDEF		BIT(0)</div><div class='ctx'> </div><div class='ctx'> #define DMA_CUR_TX_BUF_ADDR	0x00001050	/* Current Host Tx Buffer */</div><div class='ctx'> #define DMA_CUR_RX_BUF_ADDR	0x00001054	/* Current Host Rx Buffer */</div><div class='hunk'>@@ -178,6 +169,7 @@ static inline u32 dma_chan_base_addr(u32 base, u32 chan)</div><div class='ctx'> #define NUM_DWMAC4_DMA_REGS	27</div><div class='ctx'> </div><div class='ctx'> void dwmac_enable_dma_transmission(void __iomem *ioaddr, u32 chan);</div><div class='add'>+void dwmac_enable_dma_reception(void __iomem *ioaddr, u32 chan);</div><div class='ctx'> void dwmac_enable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='ctx'> 			  u32 chan, bool rx, bool tx);</div><div class='ctx'> void dwmac_disable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c<br/>index 4846bf49c576..97a803d68e3a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c</a></div><div class='hunk'>@@ -33,6 +33,11 @@ void dwmac_enable_dma_transmission(void __iomem *ioaddr, u32 chan)</div><div class='ctx'> 	writel(1, ioaddr + DMA_CHAN_XMT_POLL_DEMAND(chan));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void dwmac_enable_dma_reception(void __iomem *ioaddr, u32 chan)</div><div class='add'>+{</div><div class='add'>+	writel(1, ioaddr + DMA_CHAN_RCV_POLL_DEMAND(chan));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void dwmac_enable_dma_irq(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='ctx'> 			  u32 chan, bool rx, bool tx)</div><div class='ctx'> {</div><div class='hunk'>@@ -251,7 +256,7 @@ void dwmac_dma_flush_tx_fifo(void __iomem *ioaddr)</div><div class='ctx'> void stmmac_set_mac_addr(void __iomem *ioaddr, const u8 addr[6],</div><div class='ctx'> 			 unsigned int high, unsigned int low)</div><div class='ctx'> {</div><div class='del'>-	unsigned long data;</div><div class='add'>+	u32 data;</div><div class='ctx'> </div><div class='ctx'> 	data = (addr[5] &lt;&lt; 8) | addr[4];</div><div class='ctx'> 	/* For MAC Addr registers we have to set the Address Enable (AE)</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h<br/>index a04a79003692..fecda3034d36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h</a></div><div class='hunk'>@@ -57,19 +57,6 @@</div><div class='ctx'> #define XGMAC_FILTER_PR			BIT(0)</div><div class='ctx'> #define XGMAC_HASH_TABLE(x)		(0x00000010 + (x) * 4)</div><div class='ctx'> #define XGMAC_MAX_HASH_TABLE		8</div><div class='del'>-#define XGMAC_VLAN_TAG			0x00000050</div><div class='del'>-#define XGMAC_VLAN_EDVLP		BIT(26)</div><div class='del'>-#define XGMAC_VLAN_VTHM			BIT(25)</div><div class='del'>-#define XGMAC_VLAN_DOVLTC		BIT(20)</div><div class='del'>-#define XGMAC_VLAN_ESVL			BIT(18)</div><div class='del'>-#define XGMAC_VLAN_ETV			BIT(16)</div><div class='del'>-#define XGMAC_VLAN_VID			GENMASK(15, 0)</div><div class='del'>-#define XGMAC_VLAN_HASH_TABLE		0x00000058</div><div class='del'>-#define XGMAC_VLAN_INCL			0x00000060</div><div class='del'>-#define XGMAC_VLAN_VLTI			BIT(20)</div><div class='del'>-#define XGMAC_VLAN_CSVL			BIT(19)</div><div class='del'>-#define XGMAC_VLAN_VLC			GENMASK(17, 16)</div><div class='del'>-#define XGMAC_VLAN_VLC_SHIFT		16</div><div class='ctx'> #define XGMAC_RXQ_CTRL0			0x000000a0</div><div class='ctx'> #define XGMAC_RXQEN(x)			GENMASK((x) * 2 + 1, (x) * 2)</div><div class='ctx'> #define XGMAC_RXQEN_SHIFT(x)		((x) * 2)</div><div class='hunk'>@@ -92,6 +79,7 @@</div><div class='ctx'> #define XGMAC_PSRQ(x)			GENMASK((x) * 8 + 7, (x) * 8)</div><div class='ctx'> #define XGMAC_PSRQ_SHIFT(x)		((x) * 8)</div><div class='ctx'> #define XGMAC_INT_STATUS		0x000000b0</div><div class='add'>+#define XGMAC_INT_TSIS			BIT(12)</div><div class='ctx'> #define XGMAC_LPIIS			BIT(5)</div><div class='ctx'> #define XGMAC_PMTIS			BIT(4)</div><div class='ctx'> #define XGMAC_INT_EN			0x000000b4</div><div class='hunk'>@@ -112,14 +100,7 @@</div><div class='ctx'> #define XGMAC_MGKPKTEN			BIT(1)</div><div class='ctx'> #define XGMAC_PWRDWN			BIT(0)</div><div class='ctx'> #define XGMAC_LPI_CTRL			0x000000d0</div><div class='del'>-#define XGMAC_TXCGE			BIT(21)</div><div class='del'>-#define XGMAC_LPITXA			BIT(19)</div><div class='del'>-#define XGMAC_PLS			BIT(17)</div><div class='del'>-#define XGMAC_LPITXEN			BIT(16)</div><div class='del'>-#define XGMAC_RLPIEX			BIT(3)</div><div class='del'>-#define XGMAC_RLPIEN			BIT(2)</div><div class='del'>-#define XGMAC_TLPIEX			BIT(1)</div><div class='del'>-#define XGMAC_TLPIEN			BIT(0)</div><div class='add'>+/* For definitions, see LPI_CTRL_STATUS_xxx in common.h */</div><div class='ctx'> #define XGMAC_LPI_TIMER_CTRL		0x000000d4</div><div class='ctx'> #define XGMAC_HW_FEATURE0		0x0000011c</div><div class='ctx'> #define XGMAC_HWFEAT_EDMA		BIT(31)</div><div class='hunk'>@@ -193,6 +174,8 @@</div><div class='ctx'> #define XGMAC_MDIO_ADDR			0x00000200</div><div class='ctx'> #define XGMAC_MDIO_DATA			0x00000204</div><div class='ctx'> #define XGMAC_MDIO_C22P			0x00000220</div><div class='add'>+#define XGMAC_GPIO_STATUS		0x0000027c</div><div class='add'>+#define XGMAC_GPIO_GPO0			BIT(16)</div><div class='ctx'> #define XGMAC_ADDRx_HIGH(x)		(0x00000300 + (x) * 0x8)</div><div class='ctx'> #define XGMAC_ADDR_MAX			32</div><div class='ctx'> #define XGMAC_AE			BIT(31)</div><div class='hunk'>@@ -240,6 +223,8 @@</div><div class='ctx'> #define XGMAC_OB			BIT(0)</div><div class='ctx'> #define XGMAC_RSS_DATA			0x00000c8c</div><div class='ctx'> #define XGMAC_TIMESTAMP_STATUS		0x00000d20</div><div class='add'>+#define XGMAC_TIMESTAMP_ATSNS_MASK	GENMASK(29, 25)</div><div class='add'>+#define XGMAC_TIMESTAMP_ATSNS_SHIFT	25</div><div class='ctx'> #define XGMAC_TXTSC			BIT(15)</div><div class='ctx'> #define XGMAC_TXTIMESTAMP_NSEC		0x00000d30</div><div class='ctx'> #define XGMAC_TXTSSTSLO			GENMASK(30, 0)</div><div class='hunk'>@@ -353,16 +338,9 @@</div><div class='ctx'> #define XGMAC_RD_OSR_LMT_SHIFT		16</div><div class='ctx'> #define XGMAC_EN_LPI			BIT(15)</div><div class='ctx'> #define XGMAC_LPI_XIT_PKT		BIT(14)</div><div class='del'>-#define XGMAC_AAL			BIT(12)</div><div class='add'>+#define XGMAC_AAL			DMA_AXI_AAL</div><div class='ctx'> #define XGMAC_EAME			BIT(11)</div><div class='del'>-#define XGMAC_BLEN			GENMASK(7, 1)</div><div class='del'>-#define XGMAC_BLEN256			BIT(7)</div><div class='del'>-#define XGMAC_BLEN128			BIT(6)</div><div class='del'>-#define XGMAC_BLEN64			BIT(5)</div><div class='del'>-#define XGMAC_BLEN32			BIT(4)</div><div class='del'>-#define XGMAC_BLEN16			BIT(3)</div><div class='del'>-#define XGMAC_BLEN8			BIT(2)</div><div class='del'>-#define XGMAC_BLEN4			BIT(1)</div><div class='add'>+/* XGMAC_BLEN* are now defined as DMA_AXI_BLEN* in common.h */</div><div class='ctx'> #define XGMAC_UNDEF			BIT(0)</div><div class='ctx'> #define XGMAC_TX_EDMA_CTRL		0x00003040</div><div class='ctx'> #define XGMAC_TDPS			GENMASK(29, 0)</div><div class='hunk'>@@ -484,6 +462,7 @@</div><div class='ctx'> #define XGMAC_RDES3_RSV			BIT(26)</div><div class='ctx'> #define XGMAC_RDES3_L34T		GENMASK(23, 20)</div><div class='ctx'> #define XGMAC_RDES3_L34T_SHIFT		20</div><div class='add'>+#define XGMAC_RDES3_ET_LT		GENMASK(19, 16)</div><div class='ctx'> #define XGMAC_L34T_IP4TCP		0x1</div><div class='ctx'> #define XGMAC_L34T_IP4UDP		0x2</div><div class='ctx'> #define XGMAC_L34T_IP6TCP		0x9</div><div class='hunk'>@@ -493,4 +472,20 @@</div><div class='ctx'> #define XGMAC_RDES3_TSD			BIT(6)</div><div class='ctx'> #define XGMAC_RDES3_TSA			BIT(4)</div><div class='ctx'> </div><div class='add'>+/* RDES0 (write back format) */</div><div class='add'>+#define XGMAC_RDES0_VLAN_TAG_MASK	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* Error Type or L2 Type(ET/LT) Field Number */</div><div class='add'>+#define XGMAC_ET_LT_VLAN_STAG		8</div><div class='add'>+#define XGMAC_ET_LT_VLAN_CTAG		9</div><div class='add'>+#define XGMAC_ET_LT_DVLAN_CTAG_CTAG	10</div><div class='add'>+#define XGMAC_ET_LT_DVLAN_STAG_STAG	11</div><div class='add'>+#define XGMAC_ET_LT_DVLAN_CTAG_STAG	12</div><div class='add'>+#define XGMAC_ET_LT_DVLAN_STAG_CTAG	13</div><div class='add'>+</div><div class='add'>+extern const struct stmmac_ops dwxgmac210_ops;</div><div class='add'>+extern const struct stmmac_ops dwxlgmac2_ops;</div><div class='add'>+extern const struct stmmac_dma_ops dwxgmac210_dma_ops;</div><div class='add'>+extern const struct stmmac_desc_ops dwxgmac210_desc_ops;</div><div class='add'>+</div><div class='ctx'> #endif /* __STMMAC_DWXGMAC2_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c<br/>index 9a60a6e8f633..b40b3ea50e25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include "stmmac.h"</div><div class='ctx'> #include "stmmac_fpe.h"</div><div class='ctx'> #include "stmmac_ptp.h"</div><div class='add'>+#include "stmmac_vlan.h"</div><div class='ctx'> #include "dwxlgmac2.h"</div><div class='ctx'> #include "dwxgmac2.h"</div><div class='ctx'> </div><div class='hunk'>@@ -22,30 +23,31 @@ static void dwxgmac2_core_init(struct mac_device_info *hw,</div><div class='ctx'> 	tx = readl(ioaddr + XGMAC_TX_CONFIG);</div><div class='ctx'> 	rx = readl(ioaddr + XGMAC_RX_CONFIG);</div><div class='ctx'> </div><div class='del'>-	tx |= XGMAC_CORE_INIT_TX;</div><div class='del'>-	rx |= XGMAC_CORE_INIT_RX;</div><div class='add'>+	writel(tx | XGMAC_CORE_INIT_TX, ioaddr + XGMAC_TX_CONFIG);</div><div class='add'>+	writel(rx | XGMAC_CORE_INIT_RX, ioaddr + XGMAC_RX_CONFIG);</div><div class='add'>+	writel(XGMAC_INT_DEFAULT_EN, ioaddr + XGMAC_INT_EN);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (hw-&gt;ps) {</div><div class='del'>-		tx |= XGMAC_CONFIG_TE;</div><div class='del'>-		tx &amp;= ~hw-&gt;link.speed_mask;</div><div class='add'>+static void dwxgmac2_irq_modify(struct mac_device_info *hw, u32 disable,</div><div class='add'>+				u32 enable)</div><div class='add'>+{</div><div class='add'>+	void __iomem *int_mask = hw-&gt;pcsr + XGMAC_INT_EN;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 value;</div><div class='ctx'> </div><div class='del'>-		switch (hw-&gt;ps) {</div><div class='del'>-		case SPEED_10000:</div><div class='del'>-			tx |= hw-&gt;link.xgmii.speed10000;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED_2500:</div><div class='del'>-			tx |= hw-&gt;link.speed2500;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED_1000:</div><div class='del'>-		default:</div><div class='del'>-			tx |= hw-&gt;link.speed1000;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	spin_lock_irqsave(&amp;hw-&gt;irq_ctrl_lock, flags);</div><div class='add'>+	value = readl(int_mask) &amp; ~disable;</div><div class='add'>+	value |= enable;</div><div class='add'>+	writel(value, int_mask);</div><div class='add'>+	spin_unlock_irqrestore(&amp;hw-&gt;irq_ctrl_lock, flags);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	writel(tx, ioaddr + XGMAC_TX_CONFIG);</div><div class='del'>-	writel(rx, ioaddr + XGMAC_RX_CONFIG);</div><div class='del'>-	writel(XGMAC_INT_DEFAULT_EN, ioaddr + XGMAC_INT_EN);</div><div class='add'>+static void dwxgmac2_update_caps(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;dma_cap.mbps_10_100)</div><div class='add'>+		priv-&gt;hw-&gt;link.caps &amp;= ~(MAC_10 | MAC_100);</div><div class='add'>+	else if (!priv-&gt;dma_cap.half_duplex)</div><div class='add'>+		priv-&gt;hw-&gt;link.caps &amp;= ~(MAC_10HD | MAC_100HD);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dwxgmac2_set_mac(void __iomem *ioaddr, bool enable)</div><div class='hunk'>@@ -316,17 +318,17 @@ static int dwxgmac2_host_irq_status(struct mac_device_info *hw,</div><div class='ctx'> 	if (stat &amp; XGMAC_LPIIS) {</div><div class='ctx'> 		u32 lpi = readl(ioaddr + XGMAC_LPI_CTRL);</div><div class='ctx'> </div><div class='del'>-		if (lpi &amp; XGMAC_TLPIEN) {</div><div class='add'>+		if (lpi &amp; LPI_CTRL_STATUS_TLPIEN) {</div><div class='ctx'> 			ret |= CORE_IRQ_TX_PATH_IN_LPI_MODE;</div><div class='ctx'> 			x-&gt;irq_tx_path_in_lpi_mode_n++;</div><div class='ctx'> 		}</div><div class='del'>-		if (lpi &amp; XGMAC_TLPIEX) {</div><div class='add'>+		if (lpi &amp; LPI_CTRL_STATUS_TLPIEX) {</div><div class='ctx'> 			ret |= CORE_IRQ_TX_PATH_EXIT_LPI_MODE;</div><div class='ctx'> 			x-&gt;irq_tx_path_exit_lpi_mode_n++;</div><div class='ctx'> 		}</div><div class='del'>-		if (lpi &amp; XGMAC_RLPIEN)</div><div class='add'>+		if (lpi &amp; LPI_CTRL_STATUS_RLPIEN)</div><div class='ctx'> 			x-&gt;irq_rx_path_in_lpi_mode_n++;</div><div class='del'>-		if (lpi &amp; XGMAC_RLPIEX)</div><div class='add'>+		if (lpi &amp; LPI_CTRL_STATUS_RLPIEX)</div><div class='ctx'> 			x-&gt;irq_rx_path_exit_lpi_mode_n++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -425,29 +427,28 @@ static void dwxgmac2_get_umac_addr(struct mac_device_info *hw,</div><div class='ctx'> 	addr[5] = (hi_addr &gt;&gt; 8) &amp; 0xff;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwxgmac2_set_eee_mode(struct mac_device_info *hw,</div><div class='del'>-				  bool en_tx_lpi_clockgating)</div><div class='add'>+static int dwxgmac2_set_lpi_mode(struct mac_device_info *hw,</div><div class='add'>+				 enum stmmac_lpi_mode mode,</div><div class='add'>+				 bool en_tx_lpi_clockgating, u32 et)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='ctx'> 	u32 value;</div><div class='ctx'> </div><div class='del'>-	value = readl(ioaddr + XGMAC_LPI_CTRL);</div><div class='del'>-</div><div class='del'>-	value |= XGMAC_LPITXEN | XGMAC_LPITXA;</div><div class='del'>-	if (en_tx_lpi_clockgating)</div><div class='del'>-		value |= XGMAC_TXCGE;</div><div class='del'>-</div><div class='del'>-	writel(value, ioaddr + XGMAC_LPI_CTRL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void dwxgmac2_reset_eee_mode(struct mac_device_info *hw)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value;</div><div class='add'>+	if (mode == STMMAC_LPI_TIMER)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	value = readl(ioaddr + XGMAC_LPI_CTRL);</div><div class='del'>-	value &amp;= ~(XGMAC_LPITXEN | XGMAC_LPITXA | XGMAC_TXCGE);</div><div class='add'>+	if (mode == STMMAC_LPI_FORCED) {</div><div class='add'>+		value |= LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_LPITXA;</div><div class='add'>+		if (en_tx_lpi_clockgating)</div><div class='add'>+			value |= LPI_CTRL_STATUS_LPITCSE;</div><div class='add'>+	} else {</div><div class='add'>+		value &amp;= ~(LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_LPITXA |</div><div class='add'>+			   LPI_CTRL_STATUS_LPITCSE);</div><div class='add'>+	}</div><div class='ctx'> 	writel(value, ioaddr + XGMAC_LPI_CTRL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dwxgmac2_set_eee_pls(struct mac_device_info *hw, int link)</div><div class='hunk'>@@ -457,9 +458,9 @@ static void dwxgmac2_set_eee_pls(struct mac_device_info *hw, int link)</div><div class='ctx'> </div><div class='ctx'> 	value = readl(ioaddr + XGMAC_LPI_CTRL);</div><div class='ctx'> 	if (link)</div><div class='del'>-		value |= XGMAC_PLS;</div><div class='add'>+		value |= LPI_CTRL_STATUS_PLS;</div><div class='ctx'> 	else</div><div class='del'>-		value &amp;= ~XGMAC_PLS;</div><div class='add'>+		value &amp;= ~LPI_CTRL_STATUS_PLS;</div><div class='ctx'> 	writel(value, ioaddr + XGMAC_LPI_CTRL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -615,76 +616,6 @@ static int dwxgmac2_rss_configure(struct mac_device_info *hw,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwxgmac2_update_vlan_hash(struct mac_device_info *hw, u32 hash,</div><div class='del'>-				      u16 perfect_match, bool is_double)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-</div><div class='del'>-	writel(hash, ioaddr + XGMAC_VLAN_HASH_TABLE);</div><div class='del'>-</div><div class='del'>-	if (hash) {</div><div class='del'>-		u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);</div><div class='del'>-</div><div class='del'>-		value |= XGMAC_FILTER_VTFE;</div><div class='del'>-</div><div class='del'>-		writel(value, ioaddr + XGMAC_PACKET_FILTER);</div><div class='del'>-</div><div class='del'>-		value = readl(ioaddr + XGMAC_VLAN_TAG);</div><div class='del'>-</div><div class='del'>-		value |= XGMAC_VLAN_VTHM | XGMAC_VLAN_ETV;</div><div class='del'>-		if (is_double) {</div><div class='del'>-			value |= XGMAC_VLAN_EDVLP;</div><div class='del'>-			value |= XGMAC_VLAN_ESVL;</div><div class='del'>-			value |= XGMAC_VLAN_DOVLTC;</div><div class='del'>-		} else {</div><div class='del'>-			value &amp;= ~XGMAC_VLAN_EDVLP;</div><div class='del'>-			value &amp;= ~XGMAC_VLAN_ESVL;</div><div class='del'>-			value &amp;= ~XGMAC_VLAN_DOVLTC;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		value &amp;= ~XGMAC_VLAN_VID;</div><div class='del'>-		writel(value, ioaddr + XGMAC_VLAN_TAG);</div><div class='del'>-	} else if (perfect_match) {</div><div class='del'>-		u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);</div><div class='del'>-</div><div class='del'>-		value |= XGMAC_FILTER_VTFE;</div><div class='del'>-</div><div class='del'>-		writel(value, ioaddr + XGMAC_PACKET_FILTER);</div><div class='del'>-</div><div class='del'>-		value = readl(ioaddr + XGMAC_VLAN_TAG);</div><div class='del'>-</div><div class='del'>-		value &amp;= ~XGMAC_VLAN_VTHM;</div><div class='del'>-		value |= XGMAC_VLAN_ETV;</div><div class='del'>-		if (is_double) {</div><div class='del'>-			value |= XGMAC_VLAN_EDVLP;</div><div class='del'>-			value |= XGMAC_VLAN_ESVL;</div><div class='del'>-			value |= XGMAC_VLAN_DOVLTC;</div><div class='del'>-		} else {</div><div class='del'>-			value &amp;= ~XGMAC_VLAN_EDVLP;</div><div class='del'>-			value &amp;= ~XGMAC_VLAN_ESVL;</div><div class='del'>-			value &amp;= ~XGMAC_VLAN_DOVLTC;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		value &amp;= ~XGMAC_VLAN_VID;</div><div class='del'>-		writel(value | perfect_match, ioaddr + XGMAC_VLAN_TAG);</div><div class='del'>-	} else {</div><div class='del'>-		u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);</div><div class='del'>-</div><div class='del'>-		value &amp;= ~XGMAC_FILTER_VTFE;</div><div class='del'>-</div><div class='del'>-		writel(value, ioaddr + XGMAC_PACKET_FILTER);</div><div class='del'>-</div><div class='del'>-		value = readl(ioaddr + XGMAC_VLAN_TAG);</div><div class='del'>-</div><div class='del'>-		value &amp;= ~(XGMAC_VLAN_VTHM | XGMAC_VLAN_ETV);</div><div class='del'>-		value &amp;= ~(XGMAC_VLAN_EDVLP | XGMAC_VLAN_ESVL);</div><div class='del'>-		value &amp;= ~XGMAC_VLAN_DOVLTC;</div><div class='del'>-		value &amp;= ~XGMAC_VLAN_VID;</div><div class='del'>-</div><div class='del'>-		writel(value, ioaddr + XGMAC_VLAN_TAG);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct dwxgmac3_error_desc {</div><div class='ctx'> 	bool valid;</div><div class='ctx'> 	const char *desc;</div><div class='hunk'>@@ -1301,19 +1232,6 @@ static void dwxgmac2_sarc_configure(void __iomem *ioaddr, int val)</div><div class='ctx'> 	writel(value, ioaddr + XGMAC_TX_CONFIG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dwxgmac2_enable_vlan(struct mac_device_info *hw, u32 type)</div><div class='del'>-{</div><div class='del'>-	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='del'>-	u32 value;</div><div class='del'>-</div><div class='del'>-	value = readl(ioaddr + XGMAC_VLAN_INCL);</div><div class='del'>-	value |= XGMAC_VLAN_VLTI;</div><div class='del'>-	value |= XGMAC_VLAN_CSVL; /* Only use SVLAN */</div><div class='del'>-	value &amp;= ~XGMAC_VLAN_VLC;</div><div class='del'>-	value |= (type &lt;&lt; XGMAC_VLAN_VLC_SHIFT) &amp; XGMAC_VLAN_VLC;</div><div class='del'>-	writel(value, ioaddr + XGMAC_VLAN_INCL);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int dwxgmac2_filter_wait(struct mac_device_info *hw)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='hunk'>@@ -1507,6 +1425,8 @@ static void dwxgmac2_set_arp_offload(struct mac_device_info *hw, bool en,</div><div class='ctx'> </div><div class='ctx'> const struct stmmac_ops dwxgmac210_ops = {</div><div class='ctx'> 	.core_init = dwxgmac2_core_init,</div><div class='add'>+	.irq_modify = dwxgmac2_irq_modify,</div><div class='add'>+	.update_caps = dwxgmac2_update_caps,</div><div class='ctx'> 	.set_mac = dwxgmac2_set_mac,</div><div class='ctx'> 	.rx_ipc = dwxgmac2_rx_ipc,</div><div class='ctx'> 	.rx_queue_enable = dwxgmac2_rx_queue_enable,</div><div class='hunk'>@@ -1525,8 +1445,7 @@ const struct stmmac_ops dwxgmac210_ops = {</div><div class='ctx'> 	.pmt = dwxgmac2_pmt,</div><div class='ctx'> 	.set_umac_addr = dwxgmac2_set_umac_addr,</div><div class='ctx'> 	.get_umac_addr = dwxgmac2_get_umac_addr,</div><div class='del'>-	.set_eee_mode = dwxgmac2_set_eee_mode,</div><div class='del'>-	.reset_eee_mode = dwxgmac2_reset_eee_mode,</div><div class='add'>+	.set_lpi_mode = dwxgmac2_set_lpi_mode,</div><div class='ctx'> 	.set_eee_timer = dwxgmac2_set_eee_timer,</div><div class='ctx'> 	.set_eee_pls = dwxgmac2_set_eee_pls,</div><div class='ctx'> 	.debug = NULL,</div><div class='hunk'>@@ -1536,12 +1455,10 @@ const struct stmmac_ops dwxgmac210_ops = {</div><div class='ctx'> 	.safety_feat_dump = dwxgmac3_safety_feat_dump,</div><div class='ctx'> 	.set_mac_loopback = dwxgmac2_set_mac_loopback,</div><div class='ctx'> 	.rss_configure = dwxgmac2_rss_configure,</div><div class='del'>-	.update_vlan_hash = dwxgmac2_update_vlan_hash,</div><div class='ctx'> 	.rxp_config = dwxgmac3_rxp_config,</div><div class='ctx'> 	.get_mac_tx_timestamp = dwxgmac2_get_mac_tx_timestamp,</div><div class='ctx'> 	.flex_pps_config = dwxgmac2_flex_pps_config,</div><div class='ctx'> 	.sarc_configure = dwxgmac2_sarc_configure,</div><div class='del'>-	.enable_vlan = dwxgmac2_enable_vlan,</div><div class='ctx'> 	.config_l3_filter = dwxgmac2_config_l3_filter,</div><div class='ctx'> 	.config_l4_filter = dwxgmac2_config_l4_filter,</div><div class='ctx'> 	.set_arp_offload = dwxgmac2_set_arp_offload,</div><div class='hunk'>@@ -1564,6 +1481,7 @@ static void dwxlgmac2_rx_queue_enable(struct mac_device_info *hw, u8 mode,</div><div class='ctx'> </div><div class='ctx'> const struct stmmac_ops dwxlgmac2_ops = {</div><div class='ctx'> 	.core_init = dwxgmac2_core_init,</div><div class='add'>+	.irq_modify = dwxgmac2_irq_modify,</div><div class='ctx'> 	.set_mac = dwxgmac2_set_mac,</div><div class='ctx'> 	.rx_ipc = dwxgmac2_rx_ipc,</div><div class='ctx'> 	.rx_queue_enable = dwxlgmac2_rx_queue_enable,</div><div class='hunk'>@@ -1582,8 +1500,7 @@ const struct stmmac_ops dwxlgmac2_ops = {</div><div class='ctx'> 	.pmt = dwxgmac2_pmt,</div><div class='ctx'> 	.set_umac_addr = dwxgmac2_set_umac_addr,</div><div class='ctx'> 	.get_umac_addr = dwxgmac2_get_umac_addr,</div><div class='del'>-	.set_eee_mode = dwxgmac2_set_eee_mode,</div><div class='del'>-	.reset_eee_mode = dwxgmac2_reset_eee_mode,</div><div class='add'>+	.set_lpi_mode = dwxgmac2_set_lpi_mode,</div><div class='ctx'> 	.set_eee_timer = dwxgmac2_set_eee_timer,</div><div class='ctx'> 	.set_eee_pls = dwxgmac2_set_eee_pls,</div><div class='ctx'> 	.debug = NULL,</div><div class='hunk'>@@ -1593,12 +1510,10 @@ const struct stmmac_ops dwxlgmac2_ops = {</div><div class='ctx'> 	.safety_feat_dump = dwxgmac3_safety_feat_dump,</div><div class='ctx'> 	.set_mac_loopback = dwxgmac2_set_mac_loopback,</div><div class='ctx'> 	.rss_configure = dwxgmac2_rss_configure,</div><div class='del'>-	.update_vlan_hash = dwxgmac2_update_vlan_hash,</div><div class='ctx'> 	.rxp_config = dwxgmac3_rxp_config,</div><div class='ctx'> 	.get_mac_tx_timestamp = dwxgmac2_get_mac_tx_timestamp,</div><div class='ctx'> 	.flex_pps_config = dwxgmac2_flex_pps_config,</div><div class='ctx'> 	.sarc_configure = dwxgmac2_sarc_configure,</div><div class='del'>-	.enable_vlan = dwxgmac2_enable_vlan,</div><div class='ctx'> 	.config_l3_filter = dwxgmac2_config_l3_filter,</div><div class='ctx'> 	.config_l4_filter = dwxgmac2_config_l4_filter,</div><div class='ctx'> 	.set_arp_offload = dwxgmac2_set_arp_offload,</div><div class='hunk'>@@ -1621,8 +1536,8 @@ int dwxgmac2_setup(struct stmmac_priv *priv)</div><div class='ctx'> 		mac-&gt;mcast_bits_log2 = ilog2(mac-&gt;multicast_filter_bins);</div><div class='ctx'> </div><div class='ctx'> 	mac-&gt;link.caps = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='del'>-			 MAC_1000FD | MAC_2500FD | MAC_5000FD |</div><div class='del'>-			 MAC_10000FD;</div><div class='add'>+			 MAC_10 | MAC_100 | MAC_1000FD |</div><div class='add'>+			 MAC_2500FD | MAC_5000FD | MAC_10000FD;</div><div class='ctx'> 	mac-&gt;link.duplex = 0;</div><div class='ctx'> 	mac-&gt;link.speed10 = XGMAC_CONFIG_SS_10_MII;</div><div class='ctx'> 	mac-&gt;link.speed100 = XGMAC_CONFIG_SS_100_MII;</div><div class='hunk'>@@ -1641,6 +1556,7 @@ int dwxgmac2_setup(struct stmmac_priv *priv)</div><div class='ctx'> 	mac-&gt;mii.reg_mask = GENMASK(15, 0);</div><div class='ctx'> 	mac-&gt;mii.clk_csr_shift = 19;</div><div class='ctx'> 	mac-&gt;mii.clk_csr_mask = GENMASK(21, 19);</div><div class='add'>+	mac-&gt;num_vlan = stmmac_get_num_vlan(priv-&gt;ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c<br/>index 389aad7b5c1e..a2980482fcce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * stmmac XGMAC support.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/stmmac.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='ctx'> #include "dwxgmac2.h"</div><div class='hunk'>@@ -69,6 +70,21 @@ static int dwxgmac2_get_tx_ls(struct dma_desc *p)</div><div class='ctx'> 	return (le32_to_cpu(p-&gt;des3) &amp; XGMAC_RDES3_LD) &gt; 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u16 dwxgmac2_wrback_get_rx_vlan_tci(struct dma_desc *p)</div><div class='add'>+{</div><div class='add'>+	return le32_to_cpu(p-&gt;des0) &amp; XGMAC_RDES0_VLAN_TAG_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool dwxgmac2_wrback_get_rx_vlan_valid(struct dma_desc *p)</div><div class='add'>+{</div><div class='add'>+	u32 et_lt;</div><div class='add'>+</div><div class='add'>+	et_lt = FIELD_GET(XGMAC_RDES3_ET_LT, le32_to_cpu(p-&gt;des3));</div><div class='add'>+</div><div class='add'>+	return et_lt &gt;= XGMAC_ET_LT_VLAN_STAG &amp;&amp;</div><div class='add'>+	       et_lt &lt;= XGMAC_ET_LT_DVLAN_STAG_CTAG;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int dwxgmac2_get_rx_frame_len(struct dma_desc *p, int rx_coe)</div><div class='ctx'> {</div><div class='ctx'> 	return (le32_to_cpu(p-&gt;des3) &amp; XGMAC_RDES3_PL);</div><div class='hunk'>@@ -351,6 +367,8 @@ const struct stmmac_desc_ops dwxgmac210_desc_ops = {</div><div class='ctx'> 	.set_tx_owner = dwxgmac2_set_tx_owner,</div><div class='ctx'> 	.set_rx_owner = dwxgmac2_set_rx_owner,</div><div class='ctx'> 	.get_tx_ls = dwxgmac2_get_tx_ls,</div><div class='add'>+	.get_rx_vlan_tci = dwxgmac2_wrback_get_rx_vlan_tci,</div><div class='add'>+	.get_rx_vlan_valid = dwxgmac2_wrback_get_rx_vlan_valid,</div><div class='ctx'> 	.get_rx_frame_len = dwxgmac2_get_rx_frame_len,</div><div class='ctx'> 	.enable_tx_timestamp = dwxgmac2_enable_tx_timestamp,</div><div class='ctx'> 	.get_tx_timestamp_status = dwxgmac2_get_tx_timestamp_status,</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c<br/>index 7840bc403788..cc1bdc0975d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c</a></div><div class='hunk'>@@ -84,7 +84,6 @@ static void dwxgmac2_dma_init_tx_chan(struct stmmac_priv *priv,</div><div class='ctx'> static void dwxgmac2_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE);</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (axi-&gt;axi_lpi_en)</div><div class='ctx'> 		value |= XGMAC_EN_LPI;</div><div class='hunk'>@@ -102,32 +101,12 @@ static void dwxgmac2_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)</div><div class='ctx'> 	if (!axi-&gt;axi_fb)</div><div class='ctx'> 		value |= XGMAC_UNDEF;</div><div class='ctx'> </div><div class='del'>-	value &amp;= ~XGMAC_BLEN;</div><div class='del'>-	for (i = 0; i &lt; AXI_BLEN; i++) {</div><div class='del'>-		switch (axi-&gt;axi_blen[i]) {</div><div class='del'>-		case 256:</div><div class='del'>-			value |= XGMAC_BLEN256;</div><div class='del'>-			break;</div><div class='del'>-		case 128:</div><div class='del'>-			value |= XGMAC_BLEN128;</div><div class='del'>-			break;</div><div class='del'>-		case 64:</div><div class='del'>-			value |= XGMAC_BLEN64;</div><div class='del'>-			break;</div><div class='del'>-		case 32:</div><div class='del'>-			value |= XGMAC_BLEN32;</div><div class='del'>-			break;</div><div class='del'>-		case 16:</div><div class='del'>-			value |= XGMAC_BLEN16;</div><div class='del'>-			break;</div><div class='del'>-		case 8:</div><div class='del'>-			value |= XGMAC_BLEN8;</div><div class='del'>-			break;</div><div class='del'>-		case 4:</div><div class='del'>-			value |= XGMAC_BLEN4;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	/* Depending on the UNDEF bit the Master AXI will perform any burst</div><div class='add'>+	 * length according to the BLEN programmed (by default all BLEN are</div><div class='add'>+	 * set). Note that the UNDEF bit is readonly, and is the inverse of</div><div class='add'>+	 * Bus Mode bit 16.</div><div class='add'>+	 */</div><div class='add'>+	value = (value &amp; ~DMA_AXI_BLEN_MASK) | axi-&gt;axi_blen_regval;</div><div class='ctx'> </div><div class='ctx'> 	writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE);</div><div class='ctx'> 	writel(XGMAC_TDPS, ioaddr + XGMAC_TX_EDMA_CTRL);</div><div class='hunk'>@@ -203,10 +182,6 @@ static void dwxgmac2_dma_rx_mode(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	writel(value, ioaddr + XGMAC_MTL_RXQ_OPMODE(channel));</div><div class='del'>-</div><div class='del'>-	/* Enable MTL RX overflow */</div><div class='del'>-	value = readl(ioaddr + XGMAC_MTL_QINTEN(channel));</div><div class='del'>-	writel(value | XGMAC_RXOIE, ioaddr + XGMAC_MTL_QINTEN(channel));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dwxgmac2_dma_tx_mode(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='hunk'>@@ -364,19 +339,17 @@ static int dwxgmac2_dma_interrupt(struct stmmac_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* TX/RX NORMAL interrupts */</div><div class='del'>-	if (likely(intr_status &amp; XGMAC_NIS)) {</div><div class='del'>-		if (likely(intr_status &amp; XGMAC_RI)) {</div><div class='del'>-			u64_stats_update_begin(&amp;stats-&gt;syncp);</div><div class='del'>-			u64_stats_inc(&amp;stats-&gt;rx_normal_irq_n[chan]);</div><div class='del'>-			u64_stats_update_end(&amp;stats-&gt;syncp);</div><div class='del'>-			ret |= handle_rx;</div><div class='del'>-		}</div><div class='del'>-		if (likely(intr_status &amp; (XGMAC_TI | XGMAC_TBU))) {</div><div class='del'>-			u64_stats_update_begin(&amp;stats-&gt;syncp);</div><div class='del'>-			u64_stats_inc(&amp;stats-&gt;tx_normal_irq_n[chan]);</div><div class='del'>-			u64_stats_update_end(&amp;stats-&gt;syncp);</div><div class='del'>-			ret |= handle_tx;</div><div class='del'>-		}</div><div class='add'>+	if (likely(intr_status &amp; XGMAC_RI)) {</div><div class='add'>+		u64_stats_update_begin(&amp;stats-&gt;syncp);</div><div class='add'>+		u64_stats_inc(&amp;stats-&gt;rx_normal_irq_n[chan]);</div><div class='add'>+		u64_stats_update_end(&amp;stats-&gt;syncp);</div><div class='add'>+		ret |= handle_rx;</div><div class='add'>+	}</div><div class='add'>+	if (likely(intr_status &amp; (XGMAC_TI | XGMAC_TBU))) {</div><div class='add'>+		u64_stats_update_begin(&amp;stats-&gt;syncp);</div><div class='add'>+		u64_stats_inc(&amp;stats-&gt;tx_normal_irq_n[chan]);</div><div class='add'>+		u64_stats_update_end(&amp;stats-&gt;syncp);</div><div class='add'>+		ret |= handle_tx;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Clear interrupts */</div><div class='hunk'>@@ -388,8 +361,11 @@ static int dwxgmac2_dma_interrupt(struct stmmac_priv *priv,</div><div class='ctx'> static int dwxgmac2_get_hw_feature(void __iomem *ioaddr,</div><div class='ctx'> 				   struct dma_features *dma_cap)</div><div class='ctx'> {</div><div class='add'>+	struct stmmac_priv *priv;</div><div class='ctx'> 	u32 hw_cap;</div><div class='ctx'> </div><div class='add'>+	priv = container_of(dma_cap, struct stmmac_priv, dma_cap);</div><div class='add'>+</div><div class='ctx'> 	/* MAC HW feature 0 */</div><div class='ctx'> 	hw_cap = readl(ioaddr + XGMAC_HW_FEATURE0);</div><div class='ctx'> 	dma_cap-&gt;edma = (hw_cap &amp; XGMAC_HWFEAT_EDMA) &gt;&gt; 31;</div><div class='hunk'>@@ -412,6 +388,8 @@ static int dwxgmac2_get_hw_feature(void __iomem *ioaddr,</div><div class='ctx'> 	dma_cap-&gt;vlhash = (hw_cap &amp; XGMAC_HWFEAT_VLHASH) &gt;&gt; 4;</div><div class='ctx'> 	dma_cap-&gt;half_duplex = (hw_cap &amp; XGMAC_HWFEAT_HDSEL) &gt;&gt; 3;</div><div class='ctx'> 	dma_cap-&gt;mbps_1000 = (hw_cap &amp; XGMAC_HWFEAT_GMIISEL) &gt;&gt; 1;</div><div class='add'>+	if (dma_cap-&gt;mbps_1000 &amp;&amp; priv-&gt;synopsys_id &gt;= DWXGMAC_CORE_2_20)</div><div class='add'>+		dma_cap-&gt;mbps_10_100 = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* MAC HW feature 1 */</div><div class='ctx'> 	hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c<br/>index cfc50289aed6..014f7cd79a3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/hwif.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/hwif.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/hwif.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/hwif.c</a></div><div class='hunk'>@@ -9,32 +9,46 @@</div><div class='ctx'> #include "stmmac_fpe.h"</div><div class='ctx'> #include "stmmac_ptp.h"</div><div class='ctx'> #include "stmmac_est.h"</div><div class='add'>+#include "stmmac_vlan.h"</div><div class='add'>+#include "dwmac4_descs.h"</div><div class='add'>+#include "dwxgmac2.h"</div><div class='ctx'> </div><div class='del'>-static u32 stmmac_get_id(struct stmmac_priv *priv, u32 id_reg)</div><div class='add'>+struct stmmac_version {</div><div class='add'>+	u8 snpsver;</div><div class='add'>+	u8 dev_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void stmmac_get_version(struct stmmac_priv *priv,</div><div class='add'>+			       struct stmmac_version *ver)</div><div class='ctx'> {</div><div class='del'>-	u32 reg = readl(priv-&gt;ioaddr + id_reg);</div><div class='add'>+	enum dwmac_core_type core_type = priv-&gt;plat-&gt;core_type;</div><div class='add'>+	unsigned int version_offset;</div><div class='add'>+	u32 version;</div><div class='ctx'> </div><div class='del'>-	if (!reg) {</div><div class='del'>-		dev_info(priv-&gt;device, "Version ID not available\n");</div><div class='del'>-		return 0x0;</div><div class='del'>-	}</div><div class='add'>+	ver-&gt;snpsver = 0;</div><div class='add'>+	ver-&gt;dev_id = 0;</div><div class='ctx'> </div><div class='del'>-	dev_info(priv-&gt;device, "User ID: 0x%x, Synopsys ID: 0x%x\n",</div><div class='del'>-			(unsigned int)(reg &amp; GENMASK(15, 8)) &gt;&gt; 8,</div><div class='del'>-			(unsigned int)(reg &amp; GENMASK(7, 0)));</div><div class='del'>-	return reg &amp; GENMASK(7, 0);</div><div class='del'>-}</div><div class='add'>+	if (core_type == DWMAC_CORE_MAC100)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-static u32 stmmac_get_dev_id(struct stmmac_priv *priv, u32 id_reg)</div><div class='del'>-{</div><div class='del'>-	u32 reg = readl(priv-&gt;ioaddr + id_reg);</div><div class='add'>+	if (core_type == DWMAC_CORE_GMAC)</div><div class='add'>+		version_offset = GMAC_VERSION;</div><div class='add'>+	else</div><div class='add'>+		version_offset = GMAC4_VERSION;</div><div class='ctx'> </div><div class='del'>-	if (!reg) {</div><div class='add'>+	version = readl(priv-&gt;ioaddr + version_offset);</div><div class='add'>+	if (version == 0) {</div><div class='ctx'> 		dev_info(priv-&gt;device, "Version ID not available\n");</div><div class='del'>-		return 0x0;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return (reg &amp; GENMASK(15, 8)) &gt;&gt; 8;</div><div class='add'>+	dev_info(priv-&gt;device, "User ID: 0x%x, Synopsys ID: 0x%x\n",</div><div class='add'>+		 FIELD_GET(DWMAC_USERVER, version),</div><div class='add'>+		 FIELD_GET(DWMAC_SNPSVER, version));</div><div class='add'>+</div><div class='add'>+	ver-&gt;snpsver = FIELD_GET(DWMAC_SNPSVER, version);</div><div class='add'>+	if (core_type == DWMAC_CORE_XGMAC)</div><div class='add'>+		ver-&gt;dev_id = FIELD_GET(DWMAC_USERVER, version);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void stmmac_dwmac_mode_quirk(struct stmmac_priv *priv)</div><div class='hunk'>@@ -89,23 +103,19 @@ static int stmmac_dwxlgmac_quirks(struct stmmac_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int stmmac_reset(struct stmmac_priv *priv, void __iomem *ioaddr)</div><div class='add'>+int stmmac_reset(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct plat_stmmacenet_data *plat = priv ? priv-&gt;plat : NULL;</div><div class='del'>-</div><div class='del'>-	if (!priv)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	struct plat_stmmacenet_data *plat = priv-&gt;plat;</div><div class='add'>+	void __iomem *ioaddr = priv-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	if (plat &amp;&amp; plat-&gt;fix_soc_reset)</div><div class='del'>-		return plat-&gt;fix_soc_reset(plat, ioaddr);</div><div class='add'>+		return plat-&gt;fix_soc_reset(priv, ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	return stmmac_do_callback(priv, dma, reset, ioaddr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct stmmac_hwif_entry {</div><div class='del'>-	bool gmac;</div><div class='del'>-	bool gmac4;</div><div class='del'>-	bool xgmac;</div><div class='add'>+	enum dwmac_core_type core_type;</div><div class='ctx'> 	u32 min_id;</div><div class='ctx'> 	u32 dev_id;</div><div class='ctx'> 	const struct stmmac_regs_off regs;</div><div class='hunk'>@@ -113,18 +123,18 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 	const void *dma;</div><div class='ctx'> 	const void *mac;</div><div class='ctx'> 	const void *hwtimestamp;</div><div class='add'>+	const void *ptp;</div><div class='ctx'> 	const void *mode;</div><div class='ctx'> 	const void *tc;</div><div class='ctx'> 	const void *mmc;</div><div class='ctx'> 	const void *est;</div><div class='add'>+	const void *vlan;</div><div class='ctx'> 	int (*setup)(struct stmmac_priv *priv);</div><div class='ctx'> 	int (*quirks)(struct stmmac_priv *priv);</div><div class='ctx'> } stmmac_hw[] = {</div><div class='ctx'> 	/* NOTE: New HW versions shall go to the end of this table */</div><div class='ctx'> 	{</div><div class='del'>-		.gmac = false,</div><div class='del'>-		.gmac4 = false,</div><div class='del'>-		.xgmac = false,</div><div class='add'>+		.core_type = DWMAC_CORE_MAC100,</div><div class='ctx'> 		.min_id = 0,</div><div class='ctx'> 		.regs = {</div><div class='ctx'> 			.ptp_off = PTP_GMAC3_X_OFFSET,</div><div class='hunk'>@@ -133,16 +143,15 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.desc = NULL,</div><div class='ctx'> 		.dma = &amp;dwmac100_dma_ops,</div><div class='ctx'> 		.mac = &amp;dwmac100_ops,</div><div class='del'>-		.hwtimestamp = &amp;stmmac_ptp,</div><div class='add'>+		.hwtimestamp = &amp;dwmac1000_ptp,</div><div class='add'>+		.ptp = &amp;dwmac1000_ptp_clock_ops,</div><div class='ctx'> 		.mode = NULL,</div><div class='ctx'> 		.tc = NULL,</div><div class='ctx'> 		.mmc = &amp;dwmac_mmc_ops,</div><div class='ctx'> 		.setup = dwmac100_setup,</div><div class='ctx'> 		.quirks = stmmac_dwmac1_quirks,</div><div class='ctx'> 	}, {</div><div class='del'>-		.gmac = true,</div><div class='del'>-		.gmac4 = false,</div><div class='del'>-		.xgmac = false,</div><div class='add'>+		.core_type = DWMAC_CORE_GMAC,</div><div class='ctx'> 		.min_id = 0,</div><div class='ctx'> 		.regs = {</div><div class='ctx'> 			.ptp_off = PTP_GMAC3_X_OFFSET,</div><div class='hunk'>@@ -151,16 +160,15 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.desc = NULL,</div><div class='ctx'> 		.dma = &amp;dwmac1000_dma_ops,</div><div class='ctx'> 		.mac = &amp;dwmac1000_ops,</div><div class='del'>-		.hwtimestamp = &amp;stmmac_ptp,</div><div class='add'>+		.hwtimestamp = &amp;dwmac1000_ptp,</div><div class='add'>+		.ptp = &amp;dwmac1000_ptp_clock_ops,</div><div class='ctx'> 		.mode = NULL,</div><div class='ctx'> 		.tc = NULL,</div><div class='ctx'> 		.mmc = &amp;dwmac_mmc_ops,</div><div class='ctx'> 		.setup = dwmac1000_setup,</div><div class='ctx'> 		.quirks = stmmac_dwmac1_quirks,</div><div class='ctx'> 	}, {</div><div class='del'>-		.gmac = false,</div><div class='del'>-		.gmac4 = true,</div><div class='del'>-		.xgmac = false,</div><div class='add'>+		.core_type = DWMAC_CORE_GMAC4,</div><div class='ctx'> 		.min_id = 0,</div><div class='ctx'> 		.regs = {</div><div class='ctx'> 			.ptp_off = PTP_GMAC4_OFFSET,</div><div class='hunk'>@@ -170,7 +178,9 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.desc = &amp;dwmac4_desc_ops,</div><div class='ctx'> 		.dma = &amp;dwmac4_dma_ops,</div><div class='ctx'> 		.mac = &amp;dwmac4_ops,</div><div class='add'>+		.vlan = &amp;dwmac_vlan_ops,</div><div class='ctx'> 		.hwtimestamp = &amp;stmmac_ptp,</div><div class='add'>+		.ptp = &amp;stmmac_ptp_clock_ops,</div><div class='ctx'> 		.mode = NULL,</div><div class='ctx'> 		.tc = &amp;dwmac4_tc_ops,</div><div class='ctx'> 		.mmc = &amp;dwmac_mmc_ops,</div><div class='hunk'>@@ -178,9 +188,7 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.setup = dwmac4_setup,</div><div class='ctx'> 		.quirks = stmmac_dwmac4_quirks,</div><div class='ctx'> 	}, {</div><div class='del'>-		.gmac = false,</div><div class='del'>-		.gmac4 = true,</div><div class='del'>-		.xgmac = false,</div><div class='add'>+		.core_type = DWMAC_CORE_GMAC4,</div><div class='ctx'> 		.min_id = DWMAC_CORE_4_00,</div><div class='ctx'> 		.regs = {</div><div class='ctx'> 			.ptp_off = PTP_GMAC4_OFFSET,</div><div class='hunk'>@@ -191,7 +199,9 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.desc = &amp;dwmac4_desc_ops,</div><div class='ctx'> 		.dma = &amp;dwmac4_dma_ops,</div><div class='ctx'> 		.mac = &amp;dwmac410_ops,</div><div class='add'>+		.vlan = &amp;dwmac_vlan_ops,</div><div class='ctx'> 		.hwtimestamp = &amp;stmmac_ptp,</div><div class='add'>+		.ptp = &amp;stmmac_ptp_clock_ops,</div><div class='ctx'> 		.mode = &amp;dwmac4_ring_mode_ops,</div><div class='ctx'> 		.tc = &amp;dwmac510_tc_ops,</div><div class='ctx'> 		.mmc = &amp;dwmac_mmc_ops,</div><div class='hunk'>@@ -199,9 +209,7 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.setup = dwmac4_setup,</div><div class='ctx'> 		.quirks = NULL,</div><div class='ctx'> 	}, {</div><div class='del'>-		.gmac = false,</div><div class='del'>-		.gmac4 = true,</div><div class='del'>-		.xgmac = false,</div><div class='add'>+		.core_type = DWMAC_CORE_GMAC4,</div><div class='ctx'> 		.min_id = DWMAC_CORE_4_10,</div><div class='ctx'> 		.regs = {</div><div class='ctx'> 			.ptp_off = PTP_GMAC4_OFFSET,</div><div class='hunk'>@@ -212,7 +220,9 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.desc = &amp;dwmac4_desc_ops,</div><div class='ctx'> 		.dma = &amp;dwmac410_dma_ops,</div><div class='ctx'> 		.mac = &amp;dwmac410_ops,</div><div class='add'>+		.vlan = &amp;dwmac_vlan_ops,</div><div class='ctx'> 		.hwtimestamp = &amp;stmmac_ptp,</div><div class='add'>+		.ptp = &amp;stmmac_ptp_clock_ops,</div><div class='ctx'> 		.mode = &amp;dwmac4_ring_mode_ops,</div><div class='ctx'> 		.tc = &amp;dwmac510_tc_ops,</div><div class='ctx'> 		.mmc = &amp;dwmac_mmc_ops,</div><div class='hunk'>@@ -220,9 +230,7 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.setup = dwmac4_setup,</div><div class='ctx'> 		.quirks = NULL,</div><div class='ctx'> 	}, {</div><div class='del'>-		.gmac = false,</div><div class='del'>-		.gmac4 = true,</div><div class='del'>-		.xgmac = false,</div><div class='add'>+		.core_type = DWMAC_CORE_GMAC4,</div><div class='ctx'> 		.min_id = DWMAC_CORE_5_10,</div><div class='ctx'> 		.regs = {</div><div class='ctx'> 			.ptp_off = PTP_GMAC4_OFFSET,</div><div class='hunk'>@@ -233,7 +241,9 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.desc = &amp;dwmac4_desc_ops,</div><div class='ctx'> 		.dma = &amp;dwmac410_dma_ops,</div><div class='ctx'> 		.mac = &amp;dwmac510_ops,</div><div class='add'>+		.vlan = &amp;dwmac_vlan_ops,</div><div class='ctx'> 		.hwtimestamp = &amp;stmmac_ptp,</div><div class='add'>+		.ptp = &amp;stmmac_ptp_clock_ops,</div><div class='ctx'> 		.mode = &amp;dwmac4_ring_mode_ops,</div><div class='ctx'> 		.tc = &amp;dwmac510_tc_ops,</div><div class='ctx'> 		.mmc = &amp;dwmac_mmc_ops,</div><div class='hunk'>@@ -241,9 +251,7 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.setup = dwmac4_setup,</div><div class='ctx'> 		.quirks = NULL,</div><div class='ctx'> 	}, {</div><div class='del'>-		.gmac = false,</div><div class='del'>-		.gmac4 = false,</div><div class='del'>-		.xgmac = true,</div><div class='add'>+		.core_type = DWMAC_CORE_XGMAC,</div><div class='ctx'> 		.min_id = DWXGMAC_CORE_2_10,</div><div class='ctx'> 		.dev_id = DWXGMAC_ID,</div><div class='ctx'> 		.regs = {</div><div class='hunk'>@@ -255,17 +263,17 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.desc = &amp;dwxgmac210_desc_ops,</div><div class='ctx'> 		.dma = &amp;dwxgmac210_dma_ops,</div><div class='ctx'> 		.mac = &amp;dwxgmac210_ops,</div><div class='add'>+		.vlan = &amp;dwxgmac210_vlan_ops,</div><div class='ctx'> 		.hwtimestamp = &amp;stmmac_ptp,</div><div class='add'>+		.ptp = &amp;stmmac_ptp_clock_ops,</div><div class='ctx'> 		.mode = NULL,</div><div class='del'>-		.tc = &amp;dwxgmac_tc_ops,</div><div class='add'>+		.tc = &amp;dwmac510_tc_ops,</div><div class='ctx'> 		.mmc = &amp;dwxgmac_mmc_ops,</div><div class='ctx'> 		.est = &amp;dwmac510_est_ops,</div><div class='ctx'> 		.setup = dwxgmac2_setup,</div><div class='ctx'> 		.quirks = NULL,</div><div class='ctx'> 	}, {</div><div class='del'>-		.gmac = false,</div><div class='del'>-		.gmac4 = false,</div><div class='del'>-		.xgmac = true,</div><div class='add'>+		.core_type = DWMAC_CORE_XGMAC,</div><div class='ctx'> 		.min_id = DWXLGMAC_CORE_2_00,</div><div class='ctx'> 		.dev_id = DWXLGMAC_ID,</div><div class='ctx'> 		.regs = {</div><div class='hunk'>@@ -277,9 +285,11 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 		.desc = &amp;dwxgmac210_desc_ops,</div><div class='ctx'> 		.dma = &amp;dwxgmac210_dma_ops,</div><div class='ctx'> 		.mac = &amp;dwxlgmac2_ops,</div><div class='add'>+		.vlan = &amp;dwxlgmac2_vlan_ops,</div><div class='ctx'> 		.hwtimestamp = &amp;stmmac_ptp,</div><div class='add'>+		.ptp = &amp;stmmac_ptp_clock_ops,</div><div class='ctx'> 		.mode = NULL,</div><div class='del'>-		.tc = &amp;dwxgmac_tc_ops,</div><div class='add'>+		.tc = &amp;dwmac510_tc_ops,</div><div class='ctx'> 		.mmc = &amp;dwxgmac_mmc_ops,</div><div class='ctx'> 		.est = &amp;dwmac510_est_ops,</div><div class='ctx'> 		.setup = dwxlgmac2_setup,</div><div class='hunk'>@@ -287,97 +297,114 @@ static const struct stmmac_hwif_entry {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct stmmac_hwif_entry *</div><div class='add'>+stmmac_hwif_find(enum dwmac_core_type core_type, u8 snpsver, u8 dev_id)</div><div class='add'>+{</div><div class='add'>+	const struct stmmac_hwif_entry *entry;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = ARRAY_SIZE(stmmac_hw) - 1; i &gt;= 0; i--) {</div><div class='add'>+		entry = &amp;stmmac_hw[i];</div><div class='add'>+</div><div class='add'>+		if (core_type != entry-&gt;core_type)</div><div class='add'>+			continue;</div><div class='add'>+		/* Use synopsys_id var because some setups can override this */</div><div class='add'>+		if (snpsver &lt; entry-&gt;min_id)</div><div class='add'>+			continue;</div><div class='add'>+		if (core_type == DWMAC_CORE_XGMAC &amp;&amp;</div><div class='add'>+		    dev_id != entry-&gt;dev_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		return entry;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int stmmac_hwif_init(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	bool needs_xgmac = priv-&gt;plat-&gt;has_xgmac;</div><div class='del'>-	bool needs_gmac4 = priv-&gt;plat-&gt;has_gmac4;</div><div class='del'>-	bool needs_gmac = priv-&gt;plat-&gt;has_gmac;</div><div class='add'>+	enum dwmac_core_type core_type = priv-&gt;plat-&gt;core_type;</div><div class='ctx'> 	const struct stmmac_hwif_entry *entry;</div><div class='add'>+	struct stmmac_version version;</div><div class='ctx'> 	struct mac_device_info *mac;</div><div class='ctx'> 	bool needs_setup = true;</div><div class='del'>-	u32 id, dev_id = 0;</div><div class='del'>-	int i, ret;</div><div class='del'>-</div><div class='del'>-	if (needs_gmac) {</div><div class='del'>-		id = stmmac_get_id(priv, GMAC_VERSION);</div><div class='del'>-	} else if (needs_gmac4 || needs_xgmac) {</div><div class='del'>-		id = stmmac_get_id(priv, GMAC4_VERSION);</div><div class='del'>-		if (needs_xgmac)</div><div class='del'>-			dev_id = stmmac_get_dev_id(priv, GMAC4_VERSION);</div><div class='del'>-	} else {</div><div class='del'>-		id = 0;</div><div class='del'>-	}</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	stmmac_get_version(priv, &amp;version);</div><div class='ctx'> </div><div class='ctx'> 	/* Save ID for later use */</div><div class='del'>-	priv-&gt;synopsys_id = id;</div><div class='add'>+	priv-&gt;synopsys_id = version.snpsver;</div><div class='ctx'> </div><div class='ctx'> 	/* Lets assume some safe values first */</div><div class='del'>-	priv-&gt;ptpaddr = priv-&gt;ioaddr +</div><div class='del'>-		(needs_gmac4 ? PTP_GMAC4_OFFSET : PTP_GMAC3_X_OFFSET);</div><div class='del'>-	priv-&gt;mmcaddr = priv-&gt;ioaddr +</div><div class='del'>-		(needs_gmac4 ? MMC_GMAC4_OFFSET : MMC_GMAC3_X_OFFSET);</div><div class='del'>-	if (needs_gmac4)</div><div class='add'>+	if (core_type == DWMAC_CORE_GMAC4) {</div><div class='add'>+		priv-&gt;ptpaddr = priv-&gt;ioaddr + PTP_GMAC4_OFFSET;</div><div class='add'>+		priv-&gt;mmcaddr = priv-&gt;ioaddr + MMC_GMAC4_OFFSET;</div><div class='ctx'> 		priv-&gt;estaddr = priv-&gt;ioaddr + EST_GMAC4_OFFSET;</div><div class='del'>-	else if (needs_xgmac)</div><div class='del'>-		priv-&gt;estaddr = priv-&gt;ioaddr + EST_XGMAC_OFFSET;</div><div class='del'>-</div><div class='del'>-	/* Check for HW specific setup first */</div><div class='del'>-	if (priv-&gt;plat-&gt;setup) {</div><div class='del'>-		mac = priv-&gt;plat-&gt;setup(priv);</div><div class='del'>-		needs_setup = false;</div><div class='ctx'> 	} else {</div><div class='del'>-		mac = devm_kzalloc(priv-&gt;device, sizeof(*mac), GFP_KERNEL);</div><div class='add'>+		priv-&gt;ptpaddr = priv-&gt;ioaddr + PTP_GMAC3_X_OFFSET;</div><div class='add'>+		priv-&gt;mmcaddr = priv-&gt;ioaddr + MMC_GMAC3_X_OFFSET;</div><div class='add'>+		if (core_type == DWMAC_CORE_XGMAC)</div><div class='add'>+			priv-&gt;estaddr = priv-&gt;ioaddr + EST_XGMAC_OFFSET;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mac = devm_kzalloc(priv-&gt;device, sizeof(*mac), GFP_KERNEL);</div><div class='ctx'> 	if (!mac)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	/* Check for HW specific setup first */</div><div class='add'>+	if (priv-&gt;plat-&gt;mac_setup) {</div><div class='add'>+		ret = priv-&gt;plat-&gt;mac_setup(priv, mac);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		needs_setup = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;mac-&gt;irq_ctrl_lock);</div><div class='add'>+</div><div class='ctx'> 	/* Fallback to generic HW */</div><div class='del'>-	for (i = ARRAY_SIZE(stmmac_hw) - 1; i &gt;= 0; i--) {</div><div class='del'>-		entry = &amp;stmmac_hw[i];</div><div class='ctx'> </div><div class='del'>-		if (needs_gmac ^ entry-&gt;gmac)</div><div class='del'>-			continue;</div><div class='del'>-		if (needs_gmac4 ^ entry-&gt;gmac4)</div><div class='del'>-			continue;</div><div class='del'>-		if (needs_xgmac ^ entry-&gt;xgmac)</div><div class='del'>-			continue;</div><div class='del'>-		/* Use synopsys_id var because some setups can override this */</div><div class='del'>-		if (priv-&gt;synopsys_id &lt; entry-&gt;min_id)</div><div class='del'>-			continue;</div><div class='del'>-		if (needs_xgmac &amp;&amp; (dev_id ^ entry-&gt;dev_id))</div><div class='del'>-			continue;</div><div class='add'>+	/* Use synopsys_id var because some setups can override this */</div><div class='add'>+	entry = stmmac_hwif_find(core_type, priv-&gt;synopsys_id, version.dev_id);</div><div class='add'>+	if (!entry) {</div><div class='add'>+		dev_err(priv-&gt;device,</div><div class='add'>+			"Failed to find HW IF (id=0x%x, gmac=%d/%d)\n",</div><div class='add'>+			version.snpsver, core_type == DWMAC_CORE_GMAC,</div><div class='add'>+			core_type == DWMAC_CORE_GMAC4);</div><div class='ctx'> </div><div class='del'>-		/* Only use generic HW helpers if needed */</div><div class='del'>-		mac-&gt;desc = mac-&gt;desc ? : entry-&gt;desc;</div><div class='del'>-		mac-&gt;dma = mac-&gt;dma ? : entry-&gt;dma;</div><div class='del'>-		mac-&gt;mac = mac-&gt;mac ? : entry-&gt;mac;</div><div class='del'>-		mac-&gt;ptp = mac-&gt;ptp ? : entry-&gt;hwtimestamp;</div><div class='del'>-		mac-&gt;mode = mac-&gt;mode ? : entry-&gt;mode;</div><div class='del'>-		mac-&gt;tc = mac-&gt;tc ? : entry-&gt;tc;</div><div class='del'>-		mac-&gt;mmc = mac-&gt;mmc ? : entry-&gt;mmc;</div><div class='del'>-		mac-&gt;est = mac-&gt;est ? : entry-&gt;est;</div><div class='del'>-</div><div class='del'>-		priv-&gt;hw = mac;</div><div class='del'>-		priv-&gt;fpe_cfg.reg = entry-&gt;regs.fpe_reg;</div><div class='del'>-		priv-&gt;ptpaddr = priv-&gt;ioaddr + entry-&gt;regs.ptp_off;</div><div class='del'>-		priv-&gt;mmcaddr = priv-&gt;ioaddr + entry-&gt;regs.mmc_off;</div><div class='del'>-		if (entry-&gt;est)</div><div class='del'>-			priv-&gt;estaddr = priv-&gt;ioaddr + entry-&gt;regs.est_off;</div><div class='del'>-</div><div class='del'>-		/* Entry found */</div><div class='del'>-		if (needs_setup) {</div><div class='del'>-			ret = entry-&gt;setup(priv);</div><div class='del'>-			if (ret)</div><div class='del'>-				return ret;</div><div class='del'>-		}</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* Save quirks, if needed for posterior use */</div><div class='del'>-		priv-&gt;hwif_quirks = entry-&gt;quirks;</div><div class='del'>-		return 0;</div><div class='add'>+	/* Only use generic HW helpers if needed */</div><div class='add'>+	mac-&gt;desc = mac-&gt;desc ? : entry-&gt;desc;</div><div class='add'>+	mac-&gt;dma = mac-&gt;dma ? : entry-&gt;dma;</div><div class='add'>+	mac-&gt;mac = mac-&gt;mac ? : entry-&gt;mac;</div><div class='add'>+	mac-&gt;ptp = mac-&gt;ptp ? : entry-&gt;hwtimestamp;</div><div class='add'>+	mac-&gt;mode = mac-&gt;mode ? : entry-&gt;mode;</div><div class='add'>+	mac-&gt;tc = mac-&gt;tc ? : entry-&gt;tc;</div><div class='add'>+	mac-&gt;mmc = mac-&gt;mmc ? : entry-&gt;mmc;</div><div class='add'>+	mac-&gt;est = mac-&gt;est ? : entry-&gt;est;</div><div class='add'>+	mac-&gt;vlan = mac-&gt;vlan ? : entry-&gt;vlan;</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw = mac;</div><div class='add'>+	priv-&gt;fpe_cfg.reg = entry-&gt;regs.fpe_reg;</div><div class='add'>+	priv-&gt;ptpaddr = priv-&gt;ioaddr + entry-&gt;regs.ptp_off;</div><div class='add'>+	priv-&gt;mmcaddr = priv-&gt;ioaddr + entry-&gt;regs.mmc_off;</div><div class='add'>+	memcpy(&amp;priv-&gt;ptp_clock_ops, entry-&gt;ptp,</div><div class='add'>+	       sizeof(struct ptp_clock_info));</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;est)</div><div class='add'>+		priv-&gt;estaddr = priv-&gt;ioaddr + entry-&gt;regs.est_off;</div><div class='add'>+</div><div class='add'>+	/* Entry found */</div><div class='add'>+	if (needs_setup) {</div><div class='add'>+		ret = entry-&gt;setup(priv);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_err(priv-&gt;device, "Failed to find HW IF (id=0x%x, gmac=%d/%d)\n",</div><div class='del'>-			id, needs_gmac, needs_gmac4);</div><div class='del'>-	return -EINVAL;</div><div class='add'>+	/* Save quirks, if needed for posterior use */</div><div class='add'>+	priv-&gt;hwif_quirks = entry-&gt;quirks;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h<br/>index 64f8ed67dcc4..df6e8a567b1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/hwif.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/hwif.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/hwif.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/hwif.h</a></div><div class='hunk'>@@ -201,6 +201,7 @@ struct stmmac_dma_ops {</div><div class='ctx'> 	void (*dma_diagnostic_fr)(struct stmmac_extra_stats *x,</div><div class='ctx'> 				  void __iomem *ioaddr);</div><div class='ctx'> 	void (*enable_dma_transmission)(void __iomem *ioaddr, u32 chan);</div><div class='add'>+	void (*enable_dma_reception)(void __iomem *ioaddr, u32 chan);</div><div class='ctx'> 	void (*enable_dma_irq)(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='ctx'> 			       u32 chan, bool rx, bool tx);</div><div class='ctx'> 	void (*disable_dma_irq)(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='hunk'>@@ -261,6 +262,8 @@ struct stmmac_dma_ops {</div><div class='ctx'> 	stmmac_do_void_callback(__priv, dma, dma_diagnostic_fr, __args)</div><div class='ctx'> #define stmmac_enable_dma_transmission(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_void_callback(__priv, dma, enable_dma_transmission, __args)</div><div class='add'>+#define stmmac_enable_dma_reception(__priv, __args...) \</div><div class='add'>+	stmmac_do_void_callback(__priv, dma, enable_dma_reception, __args)</div><div class='ctx'> #define stmmac_enable_dma_irq(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_void_callback(__priv, dma, enable_dma_irq, __priv, __args)</div><div class='ctx'> #define stmmac_disable_dma_irq(__priv, __args...) \</div><div class='hunk'>@@ -300,18 +303,27 @@ struct stmmac_dma_ops {</div><div class='ctx'> </div><div class='ctx'> struct mac_device_info;</div><div class='ctx'> struct net_device;</div><div class='del'>-struct rgmii_adv;</div><div class='ctx'> struct stmmac_tc_entry;</div><div class='ctx'> struct stmmac_pps_cfg;</div><div class='ctx'> struct stmmac_rss;</div><div class='ctx'> struct stmmac_est;</div><div class='ctx'> </div><div class='add'>+enum stmmac_lpi_mode {</div><div class='add'>+	STMMAC_LPI_DISABLE,</div><div class='add'>+	STMMAC_LPI_FORCED,</div><div class='add'>+	STMMAC_LPI_TIMER,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Helpers to program the MAC core */</div><div class='ctx'> struct stmmac_ops {</div><div class='add'>+	/* Initialise any PCS instances */</div><div class='add'>+	int (*pcs_init)(struct stmmac_priv *priv);</div><div class='ctx'> 	/* MAC core initialization */</div><div class='ctx'> 	void (*core_init)(struct mac_device_info *hw, struct net_device *dev);</div><div class='ctx'> 	/* Update MAC capabilities */</div><div class='ctx'> 	void (*update_caps)(struct stmmac_priv *priv);</div><div class='add'>+	/* Change the interrupt enable setting. Enable takes precedence. */</div><div class='add'>+	void (*irq_modify)(struct mac_device_info *hw, u32 disable, u32 enable);</div><div class='ctx'> 	/* Enable the MAC RX/TX */</div><div class='ctx'> 	void (*set_mac)(void __iomem *ioaddr, bool enable);</div><div class='ctx'> 	/* Enable and verify that the IPC module is supported */</div><div class='hunk'>@@ -360,19 +372,17 @@ struct stmmac_ops {</div><div class='ctx'> 			      unsigned int reg_n);</div><div class='ctx'> 	void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr,</div><div class='ctx'> 			      unsigned int reg_n);</div><div class='del'>-	void (*set_eee_mode)(struct mac_device_info *hw,</div><div class='del'>-			     bool en_tx_lpi_clockgating);</div><div class='del'>-	void (*reset_eee_mode)(struct mac_device_info *hw);</div><div class='del'>-	void (*set_eee_lpi_entry_timer)(struct mac_device_info *hw, int et);</div><div class='add'>+	int (*set_lpi_mode)(struct mac_device_info *hw,</div><div class='add'>+			    enum stmmac_lpi_mode mode,</div><div class='add'>+			    bool en_tx_lpi_clockgating, u32 et);</div><div class='ctx'> 	void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);</div><div class='ctx'> 	void (*set_eee_pls)(struct mac_device_info *hw, int link);</div><div class='ctx'> 	void (*debug)(struct stmmac_priv *priv, void __iomem *ioaddr,</div><div class='ctx'> 		      struct stmmac_extra_stats *x, u32 rx_queues,</div><div class='ctx'> 		      u32 tx_queues);</div><div class='ctx'> 	/* PCS calls */</div><div class='del'>-	void (*pcs_ctrl_ane)(void __iomem *ioaddr, bool ane, bool srgmi_ral,</div><div class='del'>-			     bool loopback);</div><div class='del'>-	void (*pcs_get_adv_lp)(void __iomem *ioaddr, struct rgmii_adv *adv);</div><div class='add'>+	void (*pcs_ctrl_ane)(struct stmmac_priv *priv, bool ane,</div><div class='add'>+			     bool srgmi_ral);</div><div class='ctx'> 	/* Safety Features */</div><div class='ctx'> 	int (*safety_feat_config)(void __iomem *ioaddr, unsigned int asp,</div><div class='ctx'> 				  struct stmmac_safety_feature_cfg *safety_cfg);</div><div class='hunk'>@@ -393,21 +403,6 @@ struct stmmac_ops {</div><div class='ctx'> 	/* RSS */</div><div class='ctx'> 	int (*rss_configure)(struct mac_device_info *hw,</div><div class='ctx'> 			     struct stmmac_rss *cfg, u32 num_rxq);</div><div class='del'>-	/* VLAN */</div><div class='del'>-	void (*update_vlan_hash)(struct mac_device_info *hw, u32 hash,</div><div class='del'>-				 u16 perfect_match, bool is_double);</div><div class='del'>-	void (*enable_vlan)(struct mac_device_info *hw, u32 type);</div><div class='del'>-	void (*rx_hw_vlan)(struct mac_device_info *hw, struct dma_desc *rx_desc,</div><div class='del'>-			   struct sk_buff *skb);</div><div class='del'>-	void (*set_hw_vlan_mode)(struct mac_device_info *hw);</div><div class='del'>-	int (*add_hw_vlan_rx_fltr)(struct net_device *dev,</div><div class='del'>-				   struct mac_device_info *hw,</div><div class='del'>-				   __be16 proto, u16 vid);</div><div class='del'>-	int (*del_hw_vlan_rx_fltr)(struct net_device *dev,</div><div class='del'>-				   struct mac_device_info *hw,</div><div class='del'>-				   __be16 proto, u16 vid);</div><div class='del'>-	void (*restore_hw_vlan_rx_fltr)(struct net_device *dev,</div><div class='del'>-					struct mac_device_info *hw);</div><div class='ctx'> 	/* TX Timestamp */</div><div class='ctx'> 	int (*get_mac_tx_timestamp)(struct mac_device_info *hw, u64 *ts);</div><div class='ctx'> 	/* Source Address Insertion / Replacement */</div><div class='hunk'>@@ -425,10 +420,14 @@ struct stmmac_ops {</div><div class='ctx'> 					u32 pclass);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define stmmac_mac_pcs_init(__priv) \</div><div class='add'>+	stmmac_do_callback(__priv, mac, pcs_init, __priv)</div><div class='ctx'> #define stmmac_core_init(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_void_callback(__priv, mac, core_init, __args)</div><div class='ctx'> #define stmmac_mac_update_caps(__priv) \</div><div class='ctx'> 	stmmac_do_void_callback(__priv, mac, update_caps, __priv)</div><div class='add'>+#define stmmac_mac_irq_modify(__priv, __args...) \</div><div class='add'>+	stmmac_do_void_callback(__priv, mac, irq_modify, (__priv)-&gt;hw, __args)</div><div class='ctx'> #define stmmac_mac_set(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_void_callback(__priv, mac, set_mac, __args)</div><div class='ctx'> #define stmmac_rx_ipc(__priv, __args...) \</div><div class='hunk'>@@ -467,12 +466,8 @@ struct stmmac_ops {</div><div class='ctx'> 	stmmac_do_void_callback(__priv, mac, set_umac_addr, __args)</div><div class='ctx'> #define stmmac_get_umac_addr(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_void_callback(__priv, mac, get_umac_addr, __args)</div><div class='del'>-#define stmmac_set_eee_mode(__priv, __args...) \</div><div class='del'>-	stmmac_do_void_callback(__priv, mac, set_eee_mode, __args)</div><div class='del'>-#define stmmac_reset_eee_mode(__priv, __args...) \</div><div class='del'>-	stmmac_do_void_callback(__priv, mac, reset_eee_mode, __args)</div><div class='del'>-#define stmmac_set_eee_lpi_timer(__priv, __args...) \</div><div class='del'>-	stmmac_do_void_callback(__priv, mac, set_eee_lpi_entry_timer, __args)</div><div class='add'>+#define stmmac_set_lpi_mode(__priv, __args...) \</div><div class='add'>+	stmmac_do_callback(__priv, mac, set_lpi_mode, __args)</div><div class='ctx'> #define stmmac_set_eee_timer(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_void_callback(__priv, mac, set_eee_timer, __args)</div><div class='ctx'> #define stmmac_set_eee_pls(__priv, __args...) \</div><div class='hunk'>@@ -480,9 +475,7 @@ struct stmmac_ops {</div><div class='ctx'> #define stmmac_mac_debug(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_void_callback(__priv, mac, debug, __priv, __args)</div><div class='ctx'> #define stmmac_pcs_ctrl_ane(__priv, __args...) \</div><div class='del'>-	stmmac_do_void_callback(__priv, mac, pcs_ctrl_ane, __args)</div><div class='del'>-#define stmmac_pcs_get_adv_lp(__priv, __args...) \</div><div class='del'>-	stmmac_do_void_callback(__priv, mac, pcs_get_adv_lp, __args)</div><div class='add'>+	stmmac_do_void_callback(__priv, mac, pcs_ctrl_ane, __priv, __args)</div><div class='ctx'> #define stmmac_safety_feat_config(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_callback(__priv, mac, safety_feat_config, __args)</div><div class='ctx'> #define stmmac_safety_feat_irq_status(__priv, __args...) \</div><div class='hunk'>@@ -497,20 +490,6 @@ struct stmmac_ops {</div><div class='ctx'> 	stmmac_do_void_callback(__priv, mac, set_mac_loopback, __args)</div><div class='ctx'> #define stmmac_rss_configure(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_callback(__priv, mac, rss_configure, __args)</div><div class='del'>-#define stmmac_update_vlan_hash(__priv, __args...) \</div><div class='del'>-	stmmac_do_void_callback(__priv, mac, update_vlan_hash, __args)</div><div class='del'>-#define stmmac_enable_vlan(__priv, __args...) \</div><div class='del'>-	stmmac_do_void_callback(__priv, mac, enable_vlan, __args)</div><div class='del'>-#define stmmac_rx_hw_vlan(__priv, __args...) \</div><div class='del'>-	stmmac_do_void_callback(__priv, mac, rx_hw_vlan, __args)</div><div class='del'>-#define stmmac_set_hw_vlan_mode(__priv, __args...) \</div><div class='del'>-	stmmac_do_void_callback(__priv, mac, set_hw_vlan_mode, __args)</div><div class='del'>-#define stmmac_add_hw_vlan_rx_fltr(__priv, __args...) \</div><div class='del'>-	stmmac_do_callback(__priv, mac, add_hw_vlan_rx_fltr, __args)</div><div class='del'>-#define stmmac_del_hw_vlan_rx_fltr(__priv, __args...) \</div><div class='del'>-	stmmac_do_callback(__priv, mac, del_hw_vlan_rx_fltr, __args)</div><div class='del'>-#define stmmac_restore_hw_vlan_rx_fltr(__priv, __args...) \</div><div class='del'>-	stmmac_do_void_callback(__priv, mac, restore_hw_vlan_rx_fltr, __args)</div><div class='ctx'> #define stmmac_get_mac_tx_timestamp(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_callback(__priv, mac, get_mac_tx_timestamp, __args)</div><div class='ctx'> #define stmmac_sarc_configure(__priv, __args...) \</div><div class='hunk'>@@ -565,7 +544,7 @@ struct stmmac_rx_queue;</div><div class='ctx'> struct stmmac_mode_ops {</div><div class='ctx'> 	void (*init) (void *des, dma_addr_t phy_addr, unsigned int size,</div><div class='ctx'> 		      unsigned int extend_desc);</div><div class='del'>-	unsigned int (*is_jumbo_frm) (int len, int ehn_desc);</div><div class='add'>+	bool (*is_jumbo_frm)(unsigned int len, bool enh_desc);</div><div class='ctx'> 	int (*jumbo_frm)(struct stmmac_tx_queue *tx_q, struct sk_buff *skb,</div><div class='ctx'> 			 int csum);</div><div class='ctx'> 	int (*set_16kib_bfsize)(int mtu);</div><div class='hunk'>@@ -658,6 +637,39 @@ struct stmmac_est_ops {</div><div class='ctx'> #define stmmac_est_irq_status(__priv, __args...) \</div><div class='ctx'> 	stmmac_do_void_callback(__priv, est, irq_status, __args)</div><div class='ctx'> </div><div class='add'>+struct stmmac_vlan_ops {</div><div class='add'>+	/* VLAN */</div><div class='add'>+	void (*update_vlan_hash)(struct mac_device_info *hw, u32 hash,</div><div class='add'>+				 u16 perfect_match, bool is_double);</div><div class='add'>+	void (*enable_vlan)(struct mac_device_info *hw, u32 type);</div><div class='add'>+	void (*rx_hw_vlan)(struct mac_device_info *hw, struct dma_desc *rx_desc,</div><div class='add'>+			   struct sk_buff *skb);</div><div class='add'>+	void (*set_hw_vlan_mode)(struct mac_device_info *hw);</div><div class='add'>+	int (*add_hw_vlan_rx_fltr)(struct net_device *dev,</div><div class='add'>+				   struct mac_device_info *hw,</div><div class='add'>+				   __be16 proto, u16 vid);</div><div class='add'>+	int (*del_hw_vlan_rx_fltr)(struct net_device *dev,</div><div class='add'>+				   struct mac_device_info *hw,</div><div class='add'>+				   __be16 proto, u16 vid);</div><div class='add'>+	void (*restore_hw_vlan_rx_fltr)(struct net_device *dev,</div><div class='add'>+					struct mac_device_info *hw);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define stmmac_update_vlan_hash(__priv, __args...) \</div><div class='add'>+	stmmac_do_void_callback(__priv, vlan, update_vlan_hash, __args)</div><div class='add'>+#define stmmac_enable_vlan(__priv, __args...) \</div><div class='add'>+	stmmac_do_void_callback(__priv, vlan, enable_vlan, __args)</div><div class='add'>+#define stmmac_rx_hw_vlan(__priv, __args...) \</div><div class='add'>+	stmmac_do_void_callback(__priv, vlan, rx_hw_vlan, __args)</div><div class='add'>+#define stmmac_set_hw_vlan_mode(__priv, __args...) \</div><div class='add'>+	stmmac_do_void_callback(__priv, vlan, set_hw_vlan_mode, __args)</div><div class='add'>+#define stmmac_add_hw_vlan_rx_fltr(__priv, __args...) \</div><div class='add'>+	stmmac_do_callback(__priv, vlan, add_hw_vlan_rx_fltr, __args)</div><div class='add'>+#define stmmac_del_hw_vlan_rx_fltr(__priv, __args...) \</div><div class='add'>+	stmmac_do_callback(__priv, vlan, del_hw_vlan_rx_fltr, __args)</div><div class='add'>+#define stmmac_restore_hw_vlan_rx_fltr(__priv, __args...) \</div><div class='add'>+	stmmac_do_void_callback(__priv, vlan, restore_hw_vlan_rx_fltr, __args)</div><div class='add'>+</div><div class='ctx'> struct stmmac_regs_off {</div><div class='ctx'> 	const struct stmmac_fpe_reg *fpe_reg;</div><div class='ctx'> 	u32 ptp_off;</div><div class='hunk'>@@ -665,6 +677,15 @@ struct stmmac_regs_off {</div><div class='ctx'> 	u32 est_off;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+extern const struct stmmac_desc_ops enh_desc_ops;</div><div class='add'>+extern const struct stmmac_desc_ops ndesc_ops;</div><div class='add'>+</div><div class='add'>+extern const struct stmmac_hwtimestamp stmmac_ptp;</div><div class='add'>+extern const struct stmmac_hwtimestamp dwmac1000_ptp;</div><div class='add'>+</div><div class='add'>+extern const struct stmmac_mode_ops ring_mode_ops;</div><div class='add'>+extern const struct stmmac_mode_ops chain_mode_ops;</div><div class='add'>+</div><div class='ctx'> extern const struct stmmac_ops dwmac100_ops;</div><div class='ctx'> extern const struct stmmac_dma_ops dwmac100_dma_ops;</div><div class='ctx'> extern const struct stmmac_ops dwmac1000_ops;</div><div class='hunk'>@@ -676,19 +697,11 @@ extern const struct stmmac_dma_ops dwmac410_dma_ops;</div><div class='ctx'> extern const struct stmmac_ops dwmac510_ops;</div><div class='ctx'> extern const struct stmmac_tc_ops dwmac4_tc_ops;</div><div class='ctx'> extern const struct stmmac_tc_ops dwmac510_tc_ops;</div><div class='del'>-extern const struct stmmac_tc_ops dwxgmac_tc_ops;</div><div class='del'>-extern const struct stmmac_ops dwxgmac210_ops;</div><div class='del'>-extern const struct stmmac_ops dwxlgmac2_ops;</div><div class='del'>-extern const struct stmmac_dma_ops dwxgmac210_dma_ops;</div><div class='del'>-extern const struct stmmac_desc_ops dwxgmac210_desc_ops;</div><div class='del'>-extern const struct stmmac_mmc_ops dwmac_mmc_ops;</div><div class='del'>-extern const struct stmmac_mmc_ops dwxgmac_mmc_ops;</div><div class='del'>-extern const struct stmmac_est_ops dwmac510_est_ops;</div><div class='ctx'> </div><div class='ctx'> #define GMAC_VERSION		0x00000020	/* GMAC CORE Version */</div><div class='ctx'> #define GMAC4_VERSION		0x00000110	/* GMAC4+ CORE Version */</div><div class='ctx'> </div><div class='del'>-int stmmac_reset(struct stmmac_priv *priv, void __iomem *ioaddr);</div><div class='add'>+int stmmac_reset(struct stmmac_priv *priv);</div><div class='ctx'> int stmmac_hwif_init(struct stmmac_priv *priv);</div><div class='ctx'> </div><div class='ctx'> #endif /* __STMMAC_HWIF_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc.h b/drivers/net/ethernet/stmicro/stmmac/mmc.h<br/>index 5d1ea3e07459..1cba39fb2c44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/mmc.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/mmc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/mmc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/mmc.h</a></div><div class='hunk'>@@ -139,4 +139,7 @@ struct stmmac_counters {</div><div class='ctx'> 	unsigned int mmc_rx_fpe_fragment_cntr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+extern const struct stmmac_mmc_ops dwmac_mmc_ops;</div><div class='add'>+extern const struct stmmac_mmc_ops dwxgmac_mmc_ops;</div><div class='add'>+</div><div class='ctx'> #endif /* __MMC_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c<br/>index d218412ca832..382d94a3b972 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/ring_mode.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/ring_mode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/ring_mode.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/ring_mode.c</a></div><div class='hunk'>@@ -91,14 +91,9 @@ static int jumbo_frm(struct stmmac_tx_queue *tx_q, struct sk_buff *skb,</div><div class='ctx'> 	return entry;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int is_jumbo_frm(int len, int enh_desc)</div><div class='add'>+static bool is_jumbo_frm(unsigned int len, bool enh_desc)</div><div class='ctx'> {</div><div class='del'>-	unsigned int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (len &gt;= BUF_SIZE_4KiB)</div><div class='del'>-		ret = 1;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return len &gt;= BUF_SIZE_4KiB;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void refill_desc3(struct stmmac_rx_queue *rx_q, struct dma_desc *p)</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h<br/>index 1d86439b8a14..012b0a477255 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac.h</a></div><div class='hunk'>@@ -25,6 +25,8 @@</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='ctx'> #include &lt;uapi/linux/bpf.h&gt;</div><div class='ctx'> </div><div class='add'>+struct stmmac_pcs;</div><div class='add'>+</div><div class='ctx'> struct stmmac_resources {</div><div class='ctx'> 	void __iomem *addr;</div><div class='ctx'> 	u8 mac[ETH_ALEN];</div><div class='hunk'>@@ -106,6 +108,8 @@ struct stmmac_metadata_request {</div><div class='ctx'> 	struct stmmac_priv *priv;</div><div class='ctx'> 	struct dma_desc *tx_desc;</div><div class='ctx'> 	bool *set_ic;</div><div class='add'>+	struct dma_edesc *edesc;</div><div class='add'>+	int tbs;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct stmmac_xsk_tx_complete {</div><div class='hunk'>@@ -126,7 +130,7 @@ struct stmmac_rx_queue {</div><div class='ctx'> 	unsigned int cur_rx;</div><div class='ctx'> 	unsigned int dirty_rx;</div><div class='ctx'> 	unsigned int buf_alloc_num;</div><div class='del'>-	u32 rx_zeroc_thresh;</div><div class='add'>+	unsigned int napi_skb_frag_size;</div><div class='ctx'> 	dma_addr_t dma_rx_phy;</div><div class='ctx'> 	u32 rx_tail_addr;</div><div class='ctx'> 	unsigned int state_saved;</div><div class='hunk'>@@ -147,21 +151,9 @@ struct stmmac_channel {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct stmmac_fpe_cfg {</div><div class='del'>-	/* Serialize access to MAC Merge state between ethtool requests</div><div class='del'>-	 * and link state updates.</div><div class='del'>-	 */</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-</div><div class='add'>+	struct ethtool_mmsv mmsv;</div><div class='ctx'> 	const struct stmmac_fpe_reg *reg;</div><div class='del'>-	u32 fpe_csr;				/* MAC_FPE_CTRL_STS reg cache */</div><div class='del'>-</div><div class='del'>-	enum ethtool_mm_verify_status status;</div><div class='del'>-	struct timer_list verify_timer;</div><div class='del'>-	bool verify_enabled;</div><div class='del'>-	int verify_retries;</div><div class='del'>-	bool pmac_enabled;</div><div class='del'>-	u32 verify_time;</div><div class='del'>-	bool tx_enabled;</div><div class='add'>+	u32 fpe_csr;	/* MAC_FPE_CTRL_STS reg cache */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct stmmac_tc_entry {</div><div class='hunk'>@@ -257,18 +249,17 @@ struct stmmac_priv {</div><div class='ctx'> 	/* Frequently used values are kept adjacent for cache effect */</div><div class='ctx'> 	u32 tx_coal_frames[MTL_MAX_TX_QUEUES];</div><div class='ctx'> 	u32 tx_coal_timer[MTL_MAX_TX_QUEUES];</div><div class='del'>-	u32 rx_coal_frames[MTL_MAX_TX_QUEUES];</div><div class='add'>+	u32 rx_coal_frames[MTL_MAX_RX_QUEUES];</div><div class='ctx'> </div><div class='ctx'> 	int hwts_tx_en;</div><div class='ctx'> 	bool tx_path_in_lpi_mode;</div><div class='ctx'> 	bool tso;</div><div class='del'>-	int sph;</div><div class='del'>-	int sph_cap;</div><div class='add'>+	bool sph_active;</div><div class='add'>+	bool sph_capable;</div><div class='ctx'> 	u32 sarc_type;</div><div class='del'>-</div><div class='del'>-	unsigned int rx_copybreak;</div><div class='del'>-	u32 rx_riwt[MTL_MAX_TX_QUEUES];</div><div class='add'>+	u32 rx_riwt[MTL_MAX_RX_QUEUES];</div><div class='ctx'> 	int hwts_rx_en;</div><div class='add'>+	bool tsfupdt_coarse;</div><div class='ctx'> </div><div class='ctx'> 	void __iomem *ioaddr;</div><div class='ctx'> 	struct net_device *dev;</div><div class='hunk'>@@ -282,11 +273,11 @@ struct stmmac_priv {</div><div class='ctx'> 	/* Generic channel for NAPI */</div><div class='ctx'> 	struct stmmac_channel channel[STMMAC_CH_MAX];</div><div class='ctx'> </div><div class='del'>-	int speed;</div><div class='del'>-	unsigned int flow_ctrl;</div><div class='del'>-	unsigned int pause;</div><div class='add'>+	unsigned int pause_time;</div><div class='ctx'> 	struct mii_bus *mii;</div><div class='ctx'> </div><div class='add'>+	struct stmmac_pcs *integrated_pcs;</div><div class='add'>+</div><div class='ctx'> 	struct phylink_config phylink_config;</div><div class='ctx'> 	struct phylink *phylink;</div><div class='ctx'> </div><div class='hunk'>@@ -301,22 +292,21 @@ struct stmmac_priv {</div><div class='ctx'> 	int hw_cap_support;</div><div class='ctx'> 	int synopsys_id;</div><div class='ctx'> 	u32 msg_enable;</div><div class='add'>+	/* Our MAC Wake-on-Lan options */</div><div class='ctx'> 	int wolopts;</div><div class='ctx'> 	int wol_irq;</div><div class='del'>-	bool wol_irq_disabled;</div><div class='del'>-	int clk_csr;</div><div class='add'>+	u32 gmii_address_bus_config;</div><div class='ctx'> 	struct timer_list eee_ctrl_timer;</div><div class='ctx'> 	int lpi_irq;</div><div class='del'>-	int eee_enabled;</div><div class='del'>-	int eee_active;</div><div class='del'>-	int tx_lpi_timer;</div><div class='del'>-	int tx_lpi_enabled;</div><div class='del'>-	int eee_tw_timer;</div><div class='add'>+	u32 tx_lpi_timer;</div><div class='add'>+	bool tx_lpi_clk_stop;</div><div class='add'>+	bool eee_enabled;</div><div class='add'>+	bool eee_active;</div><div class='ctx'> 	bool eee_sw_timer_en;</div><div class='ctx'> 	unsigned int mode;</div><div class='ctx'> 	unsigned int chain_mode;</div><div class='ctx'> 	int extend_desc;</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> 	struct ptp_clock *ptp_clock;</div><div class='ctx'> 	struct ptp_clock_info ptp_clock_ops;</div><div class='ctx'> 	unsigned int default_addend;</div><div class='hunk'>@@ -346,7 +336,7 @@ struct stmmac_priv {</div><div class='ctx'> 	char int_name_sfty[IFNAMSIZ + 10];</div><div class='ctx'> 	char int_name_sfty_ce[IFNAMSIZ + 10];</div><div class='ctx'> 	char int_name_sfty_ue[IFNAMSIZ + 10];</div><div class='del'>-	char int_name_rx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 14];</div><div class='add'>+	char int_name_rx_irq[MTL_MAX_RX_QUEUES][IFNAMSIZ + 14];</div><div class='ctx'> 	char int_name_tx_irq[MTL_MAX_TX_QUEUES][IFNAMSIZ + 18];</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='hunk'>@@ -380,6 +370,8 @@ struct stmmac_priv {</div><div class='ctx'> 	/* XDP BPF Program */</div><div class='ctx'> 	unsigned long *af_xdp_zc_qps;</div><div class='ctx'> 	struct bpf_prog *xdp_prog;</div><div class='add'>+</div><div class='add'>+	struct devlink *devlink;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum stmmac_state {</div><div class='hunk'>@@ -389,43 +381,40 @@ enum stmmac_state {</div><div class='ctx'> 	STMMAC_SERVICE_SCHED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+extern const struct dev_pm_ops stmmac_simple_pm_ops;</div><div class='add'>+</div><div class='ctx'> int stmmac_mdio_unregister(struct net_device *ndev);</div><div class='ctx'> int stmmac_mdio_register(struct net_device *ndev);</div><div class='ctx'> int stmmac_mdio_reset(struct mii_bus *mii);</div><div class='add'>+void stmmac_mdio_lock(struct stmmac_priv *priv);</div><div class='add'>+void stmmac_mdio_unlock(struct stmmac_priv *priv);</div><div class='ctx'> int stmmac_pcs_setup(struct net_device *ndev);</div><div class='ctx'> void stmmac_pcs_clean(struct net_device *ndev);</div><div class='ctx'> void stmmac_set_ethtool_ops(struct net_device *netdev);</div><div class='ctx'> </div><div class='del'>-int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags);</div><div class='ctx'> void stmmac_ptp_register(struct stmmac_priv *priv);</div><div class='ctx'> void stmmac_ptp_unregister(struct stmmac_priv *priv);</div><div class='ctx'> int stmmac_xdp_open(struct net_device *dev);</div><div class='ctx'> void stmmac_xdp_release(struct net_device *dev);</div><div class='add'>+int stmmac_get_phy_intf_sel(phy_interface_t interface);</div><div class='ctx'> int stmmac_resume(struct device *dev);</div><div class='ctx'> int stmmac_suspend(struct device *dev);</div><div class='ctx'> void stmmac_dvr_remove(struct device *dev);</div><div class='ctx'> int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> 		     struct plat_stmmacenet_data *plat_dat,</div><div class='ctx'> 		     struct stmmac_resources *res);</div><div class='del'>-void stmmac_disable_eee_mode(struct stmmac_priv *priv);</div><div class='del'>-bool stmmac_eee_init(struct stmmac_priv *priv);</div><div class='ctx'> int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt);</div><div class='ctx'> int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size);</div><div class='del'>-int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled);</div><div class='add'>+int stmmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,</div><div class='add'>+			   phy_interface_t interface, int speed);</div><div class='add'>+</div><div class='add'>+struct plat_stmmacenet_data *stmmac_plat_dat_alloc(struct device *dev);</div><div class='ctx'> </div><div class='ctx'> static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	return !!priv-&gt;xdp_prog;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int stmmac_rx_offset(struct stmmac_priv *priv)</div><div class='del'>-{</div><div class='del'>-	if (stmmac_xdp_is_enabled(priv))</div><div class='del'>-		return XDP_PACKET_HEADROOM;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void stmmac_disable_rx_queue(struct stmmac_priv *priv, u32 queue);</div><div class='ctx'> void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue);</div><div class='ctx'> void stmmac_disable_tx_queue(struct stmmac_priv *priv, u32 queue);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_est.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_est.c<br/>index c9693f77e1f6..afc516059b89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_est.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_est.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_est.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_est.c</a></div><div class='hunk'>@@ -32,6 +32,11 @@ static int est_configure(struct stmmac_priv *priv, struct stmmac_est *cfg,</div><div class='ctx'> 	int i, ret = 0;</div><div class='ctx'> 	u32 ctrl;</div><div class='ctx'> </div><div class='add'>+	if (!ptp_rate) {</div><div class='add'>+		netdev_warn(priv-&gt;dev, "Invalid PTP rate");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret |= est_write(est_addr, EST_BTR_LOW, cfg-&gt;btr[0], false);</div><div class='ctx'> 	ret |= est_write(est_addr, EST_BTR_HIGH, cfg-&gt;btr[1], false);</div><div class='ctx'> 	ret |= est_write(est_addr, EST_TER, cfg-&gt;ter, false);</div><div class='hunk'>@@ -48,7 +53,7 @@ static int est_configure(struct stmmac_priv *priv, struct stmmac_est *cfg,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ctrl = readl(est_addr + EST_CONTROL);</div><div class='del'>-	if (priv-&gt;plat-&gt;has_xgmac) {</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC) {</div><div class='ctx'> 		ctrl &amp;= ~EST_XGMAC_PTOV;</div><div class='ctx'> 		ctrl |= ((NSEC_PER_SEC / ptp_rate) * EST_XGMAC_PTOV_MUL) &lt;&lt;</div><div class='ctx'> 			 EST_XGMAC_PTOV_SHIFT;</div><div class='hunk'>@@ -58,7 +63,7 @@ static int est_configure(struct stmmac_priv *priv, struct stmmac_est *cfg,</div><div class='ctx'> 			 EST_GMAC5_PTOV_SHIFT;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (cfg-&gt;enable)</div><div class='del'>-		ctrl |= EST_EEST | EST_SSWL;</div><div class='add'>+		ctrl |= EST_EEST | EST_SSWL | EST_DFBS;</div><div class='ctx'> 	else</div><div class='ctx'> 		ctrl &amp;= ~EST_EEST;</div><div class='ctx'> </div><div class='hunk'>@@ -104,6 +109,10 @@ static void est_irq_status(struct stmmac_priv *priv, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 		x-&gt;mtl_est_hlbs++;</div><div class='ctx'> </div><div class='add'>+		for (i = 0; i &lt; txqcnt; i++)</div><div class='add'>+			if (value &amp; BIT(i))</div><div class='add'>+				x-&gt;mtl_est_txq_hlbs[i]++;</div><div class='add'>+</div><div class='ctx'> 		/* Clear Interrupt */</div><div class='ctx'> 		writel(value, est_addr + EST_SCH_ERR);</div><div class='ctx'> </div><div class='hunk'>@@ -126,10 +135,9 @@ static void est_irq_status(struct stmmac_priv *priv, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 		x-&gt;mtl_est_hlbf++;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; txqcnt; i++) {</div><div class='add'>+		for (i = 0; i &lt; txqcnt; i++)</div><div class='ctx'> 			if (feqn &amp; BIT(i))</div><div class='ctx'> 				x-&gt;mtl_est_txq_hlbf[i]++;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		/* Clear Interrupt */</div><div class='ctx'> 		writel(feqn, est_addr + EST_FRM_SZ_ERR);</div><div class='hunk'>@@ -140,7 +148,7 @@ static void est_irq_status(struct stmmac_priv *priv, struct net_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (status &amp; EST_BTRE) {</div><div class='del'>-		if (priv-&gt;plat-&gt;has_xgmac) {</div><div class='add'>+		if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC) {</div><div class='ctx'> 			btrl = FIELD_GET(EST_XGMAC_BTRL, status);</div><div class='ctx'> 			btrl_max = FIELD_MAX(EST_XGMAC_BTRL);</div><div class='ctx'> 		} else {</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_est.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_est.h<br/>index 7a858c566e7e..f70221c9c84a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_est.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_est.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_est.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_est.h</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #define EST_XGMAC_PTOV_MUL		9</div><div class='ctx'> #define EST_SSWL			BIT(1)</div><div class='ctx'> #define EST_EEST			BIT(0)</div><div class='add'>+#define EST_DFBS			BIT(5)</div><div class='ctx'> </div><div class='ctx'> #define EST_STATUS			0x00000008</div><div class='ctx'> #define EST_GMAC5_BTRL			GENMASK(11, 8)</div><div class='hunk'>@@ -62,3 +63,5 @@</div><div class='ctx'> #define EST_SRWO			BIT(0)</div><div class='ctx'> </div><div class='ctx'> #define EST_GCL_DATA			0x00000034</div><div class='add'>+</div><div class='add'>+extern const struct stmmac_est_ops dwmac510_est_ops;</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c<br/>index 1d77389ce953..b155e71aac51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c</a></div><div class='hunk'>@@ -37,7 +37,7 @@</div><div class='ctx'> #define ETHTOOL_DMA_OFFSET	55</div><div class='ctx'> </div><div class='ctx'> struct stmmac_stats {</div><div class='del'>-	char stat_string[ETH_GSTRING_LEN];</div><div class='add'>+	char stat_string[ETH_GSTRING_LEN] __nonstring;</div><div class='ctx'> 	int sizeof_stat;</div><div class='ctx'> 	int stat_offset;</div><div class='ctx'> };</div><div class='hunk'>@@ -303,9 +303,10 @@ static void stmmac_ethtool_getdrvinfo(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;plat-&gt;has_gmac || priv-&gt;plat-&gt;has_gmac4)</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC ||</div><div class='add'>+	    priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC4)</div><div class='ctx'> 		strscpy(info-&gt;driver, GMAC_ETHTOOL_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	else if (priv-&gt;plat-&gt;has_xgmac)</div><div class='add'>+	else if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC)</div><div class='ctx'> 		strscpy(info-&gt;driver, XGMAC_ETHTOOL_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> 	else</div><div class='ctx'> 		strscpy(info-&gt;driver, MAC100_ETHTOOL_NAME,</div><div class='hunk'>@@ -322,84 +323,6 @@ static int stmmac_ethtool_get_link_ksettings(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (!(priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_HAS_INTEGRATED_PCS) &amp;&amp;</div><div class='del'>-	    (priv-&gt;hw-&gt;pcs &amp; STMMAC_PCS_RGMII ||</div><div class='del'>-	     priv-&gt;hw-&gt;pcs &amp; STMMAC_PCS_SGMII)) {</div><div class='del'>-		struct rgmii_adv adv;</div><div class='del'>-		u32 supported, advertising, lp_advertising;</div><div class='del'>-</div><div class='del'>-		if (!priv-&gt;xstats.pcs_link) {</div><div class='del'>-			cmd-&gt;base.speed = SPEED_UNKNOWN;</div><div class='del'>-			cmd-&gt;base.duplex = DUPLEX_UNKNOWN;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		cmd-&gt;base.duplex = priv-&gt;xstats.pcs_duplex;</div><div class='del'>-</div><div class='del'>-		cmd-&gt;base.speed = priv-&gt;xstats.pcs_speed;</div><div class='del'>-</div><div class='del'>-		/* Get and convert ADV/LP_ADV from the HW AN registers */</div><div class='del'>-		if (stmmac_pcs_get_adv_lp(priv, priv-&gt;ioaddr, &amp;adv))</div><div class='del'>-			return -EOPNOTSUPP;	/* should never happen indeed */</div><div class='del'>-</div><div class='del'>-		/* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */</div><div class='del'>-</div><div class='del'>-		ethtool_convert_link_mode_to_legacy_u32(</div><div class='del'>-			&amp;supported, cmd-&gt;link_modes.supported);</div><div class='del'>-		ethtool_convert_link_mode_to_legacy_u32(</div><div class='del'>-			&amp;advertising, cmd-&gt;link_modes.advertising);</div><div class='del'>-		ethtool_convert_link_mode_to_legacy_u32(</div><div class='del'>-			&amp;lp_advertising, cmd-&gt;link_modes.lp_advertising);</div><div class='del'>-</div><div class='del'>-		if (adv.pause &amp; STMMAC_PCS_PAUSE)</div><div class='del'>-			advertising |= ADVERTISED_Pause;</div><div class='del'>-		if (adv.pause &amp; STMMAC_PCS_ASYM_PAUSE)</div><div class='del'>-			advertising |= ADVERTISED_Asym_Pause;</div><div class='del'>-		if (adv.lp_pause &amp; STMMAC_PCS_PAUSE)</div><div class='del'>-			lp_advertising |= ADVERTISED_Pause;</div><div class='del'>-		if (adv.lp_pause &amp; STMMAC_PCS_ASYM_PAUSE)</div><div class='del'>-			lp_advertising |= ADVERTISED_Asym_Pause;</div><div class='del'>-</div><div class='del'>-		/* Reg49[3] always set because ANE is always supported */</div><div class='del'>-		cmd-&gt;base.autoneg = ADVERTISED_Autoneg;</div><div class='del'>-		supported |= SUPPORTED_Autoneg;</div><div class='del'>-		advertising |= ADVERTISED_Autoneg;</div><div class='del'>-		lp_advertising |= ADVERTISED_Autoneg;</div><div class='del'>-</div><div class='del'>-		if (adv.duplex) {</div><div class='del'>-			supported |= (SUPPORTED_1000baseT_Full |</div><div class='del'>-				      SUPPORTED_100baseT_Full |</div><div class='del'>-				      SUPPORTED_10baseT_Full);</div><div class='del'>-			advertising |= (ADVERTISED_1000baseT_Full |</div><div class='del'>-					ADVERTISED_100baseT_Full |</div><div class='del'>-					ADVERTISED_10baseT_Full);</div><div class='del'>-		} else {</div><div class='del'>-			supported |= (SUPPORTED_1000baseT_Half |</div><div class='del'>-				      SUPPORTED_100baseT_Half |</div><div class='del'>-				      SUPPORTED_10baseT_Half);</div><div class='del'>-			advertising |= (ADVERTISED_1000baseT_Half |</div><div class='del'>-					ADVERTISED_100baseT_Half |</div><div class='del'>-					ADVERTISED_10baseT_Half);</div><div class='del'>-		}</div><div class='del'>-		if (adv.lp_duplex)</div><div class='del'>-			lp_advertising |= (ADVERTISED_1000baseT_Full |</div><div class='del'>-					   ADVERTISED_100baseT_Full |</div><div class='del'>-					   ADVERTISED_10baseT_Full);</div><div class='del'>-		else</div><div class='del'>-			lp_advertising |= (ADVERTISED_1000baseT_Half |</div><div class='del'>-					   ADVERTISED_100baseT_Half |</div><div class='del'>-					   ADVERTISED_10baseT_Half);</div><div class='del'>-		cmd-&gt;base.port = PORT_OTHER;</div><div class='del'>-</div><div class='del'>-		ethtool_convert_legacy_u32_to_link_mode(</div><div class='del'>-			cmd-&gt;link_modes.supported, supported);</div><div class='del'>-		ethtool_convert_legacy_u32_to_link_mode(</div><div class='del'>-			cmd-&gt;link_modes.advertising, advertising);</div><div class='del'>-		ethtool_convert_legacy_u32_to_link_mode(</div><div class='del'>-			cmd-&gt;link_modes.lp_advertising, lp_advertising);</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return phylink_ethtool_ksettings_get(priv-&gt;phylink, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -409,20 +332,6 @@ stmmac_ethtool_set_link_ksettings(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (!(priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_HAS_INTEGRATED_PCS) &amp;&amp;</div><div class='del'>-	    (priv-&gt;hw-&gt;pcs &amp; STMMAC_PCS_RGMII ||</div><div class='del'>-	     priv-&gt;hw-&gt;pcs &amp; STMMAC_PCS_SGMII)) {</div><div class='del'>-		/* Only support ANE */</div><div class='del'>-		if (cmd-&gt;base.autoneg != AUTONEG_ENABLE)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		mutex_lock(&amp;priv-&gt;lock);</div><div class='del'>-		stmmac_pcs_ctrl_ane(priv, priv-&gt;ioaddr, 1, priv-&gt;hw-&gt;ps, 0);</div><div class='del'>-		mutex_unlock(&amp;priv-&gt;lock);</div><div class='del'>-</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return phylink_ethtool_ksettings_set(priv-&gt;phylink, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -443,9 +352,9 @@ static int stmmac_ethtool_get_regs_len(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;plat-&gt;has_xgmac)</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC)</div><div class='ctx'> 		return XGMAC_REGSIZE * 4;</div><div class='del'>-	else if (priv-&gt;plat-&gt;has_gmac4)</div><div class='add'>+	else if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC4)</div><div class='ctx'> 		return GMAC4_REG_SPACE_SIZE;</div><div class='ctx'> 	return REG_SPACE_SIZE;</div><div class='ctx'> }</div><div class='hunk'>@@ -460,12 +369,12 @@ static void stmmac_ethtool_gregs(struct net_device *dev,</div><div class='ctx'> 	stmmac_dump_dma_regs(priv, priv-&gt;ioaddr, reg_space);</div><div class='ctx'> </div><div class='ctx'> 	/* Copy DMA registers to where ethtool expects them */</div><div class='del'>-	if (priv-&gt;plat-&gt;has_gmac4) {</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC4) {</div><div class='ctx'> 		/* GMAC4 dumps its DMA registers at its DMA_CHAN_BASE_ADDR */</div><div class='ctx'> 		memcpy(&amp;reg_space[ETHTOOL_DMA_OFFSET],</div><div class='ctx'> 		       &amp;reg_space[GMAC4_DMA_CHAN_BASE_ADDR / 4],</div><div class='ctx'> 		       NUM_DWMAC4_DMA_REGS * 4);</div><div class='del'>-	} else if (!priv-&gt;plat-&gt;has_xgmac) {</div><div class='add'>+	} else if (priv-&gt;plat-&gt;core_type != DWMAC_CORE_XGMAC) {</div><div class='ctx'> 		memcpy(&amp;reg_space[ETHTOOL_DMA_OFFSET],</div><div class='ctx'> 		       &amp;reg_space[DMA_BUS_MODE / 4],</div><div class='ctx'> 		       NUM_DWMAC1000_DMA_REGS * 4);</div><div class='hunk'>@@ -515,15 +424,8 @@ stmmac_get_pauseparam(struct net_device *netdev,</div><div class='ctx'> 		      struct ethtool_pauseparam *pause)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct rgmii_adv adv_lp;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;hw-&gt;pcs &amp;&amp; !stmmac_pcs_get_adv_lp(priv, priv-&gt;ioaddr, &amp;adv_lp)) {</div><div class='del'>-		pause-&gt;autoneg = 1;</div><div class='del'>-		if (!adv_lp.pause)</div><div class='del'>-			return;</div><div class='del'>-	} else {</div><div class='del'>-		phylink_ethtool_get_pauseparam(priv-&gt;phylink, pause);</div><div class='del'>-	}</div><div class='add'>+	phylink_ethtool_get_pauseparam(priv-&gt;phylink, pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -531,16 +433,8 @@ stmmac_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> 		      struct ethtool_pauseparam *pause)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct rgmii_adv adv_lp;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;hw-&gt;pcs &amp;&amp; !stmmac_pcs_get_adv_lp(priv, priv-&gt;ioaddr, &amp;adv_lp)) {</div><div class='del'>-		pause-&gt;autoneg = 1;</div><div class='del'>-		if (!adv_lp.pause)</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-		return 0;</div><div class='del'>-	} else {</div><div class='del'>-		return phylink_ethtool_set_pauseparam(priv-&gt;phylink, pause);</div><div class='del'>-	}</div><div class='add'>+	return phylink_ethtool_set_pauseparam(priv-&gt;phylink, pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u64 stmmac_get_rx_normal_irq_n(struct stmmac_priv *priv, int q)</div><div class='hunk'>@@ -654,7 +548,7 @@ static void stmmac_get_ethtool_stats(struct net_device *dev,</div><div class='ctx'> 					     (*(u32 *)p);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		if (priv-&gt;eee_enabled) {</div><div class='add'>+		if (priv-&gt;dma_cap.eee) {</div><div class='ctx'> 			int val = phylink_get_eee_err(priv-&gt;phylink);</div><div class='ctx'> 			if (val)</div><div class='ctx'> 				priv-&gt;xstats.phy_eee_wakeup_error_n = val;</div><div class='hunk'>@@ -830,64 +724,14 @@ static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;plat-&gt;pmt)</div><div class='del'>-		return phylink_ethtool_get_wol(priv-&gt;phylink, wol);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;priv-&gt;lock);</div><div class='del'>-	if (device_can_wakeup(priv-&gt;device)) {</div><div class='del'>-		wol-&gt;supported = WAKE_MAGIC | WAKE_UCAST;</div><div class='del'>-		if (priv-&gt;hw_cap_support &amp;&amp; !priv-&gt;dma_cap.pmt_magic_frame)</div><div class='del'>-			wol-&gt;supported &amp;= ~WAKE_MAGIC;</div><div class='del'>-		wol-&gt;wolopts = priv-&gt;wolopts;</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	return phylink_ethtool_get_wol(priv-&gt;phylink, wol);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 support = WAKE_MAGIC | WAKE_UCAST;</div><div class='del'>-</div><div class='del'>-	if (!device_can_wakeup(priv-&gt;device))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;plat-&gt;pmt) {</div><div class='del'>-		int ret = phylink_ethtool_set_wol(priv-&gt;phylink, wol);</div><div class='del'>-</div><div class='del'>-		if (!ret)</div><div class='del'>-			device_set_wakeup_enable(priv-&gt;device, !!wol-&gt;wolopts);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* By default almost all GMAC devices support the WoL via</div><div class='del'>-	 * magic frame but we can disable it if the HW capability</div><div class='del'>-	 * register shows no support for pmt_magic_frame. */</div><div class='del'>-	if ((priv-&gt;hw_cap_support) &amp;&amp; (!priv-&gt;dma_cap.pmt_magic_frame))</div><div class='del'>-		wol-&gt;wolopts &amp;= ~WAKE_MAGIC;</div><div class='del'>-</div><div class='del'>-	if (wol-&gt;wolopts &amp; ~support)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (wol-&gt;wolopts) {</div><div class='del'>-		pr_info("stmmac: wakeup enable\n");</div><div class='del'>-		device_set_wakeup_enable(priv-&gt;device, 1);</div><div class='del'>-		/* Avoid unbalanced enable_irq_wake calls */</div><div class='del'>-		if (priv-&gt;wol_irq_disabled)</div><div class='del'>-			enable_irq_wake(priv-&gt;wol_irq);</div><div class='del'>-		priv-&gt;wol_irq_disabled = false;</div><div class='del'>-	} else {</div><div class='del'>-		device_set_wakeup_enable(priv-&gt;device, 0);</div><div class='del'>-		/* Avoid unbalanced disable_irq_wake calls */</div><div class='del'>-		if (!priv-&gt;wol_irq_disabled)</div><div class='del'>-			disable_irq_wake(priv-&gt;wol_irq);</div><div class='del'>-		priv-&gt;wol_irq_disabled = true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;priv-&gt;lock);</div><div class='del'>-	priv-&gt;wolopts = wol-&gt;wolopts;</div><div class='del'>-	mutex_unlock(&amp;priv-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return phylink_ethtool_set_wol(priv-&gt;phylink, wol);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int stmmac_ethtool_op_get_eee(struct net_device *dev,</div><div class='hunk'>@@ -895,12 +739,6 @@ static int stmmac_ethtool_op_get_eee(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;dma_cap.eee)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	edata-&gt;tx_lpi_timer = priv-&gt;tx_lpi_timer;</div><div class='del'>-	edata-&gt;tx_lpi_enabled = priv-&gt;tx_lpi_enabled;</div><div class='del'>-</div><div class='ctx'> 	return phylink_ethtool_get_eee(priv-&gt;phylink, edata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -908,29 +746,8 @@ static int stmmac_ethtool_op_set_eee(struct net_device *dev,</div><div class='ctx'> 				     struct ethtool_keee *edata)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;dma_cap.eee)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;tx_lpi_enabled != edata-&gt;tx_lpi_enabled)</div><div class='del'>-		netdev_warn(priv-&gt;dev,</div><div class='del'>-			    "Setting EEE tx-lpi is not supported\n");</div><div class='del'>-</div><div class='del'>-	if (!edata-&gt;eee_enabled)</div><div class='del'>-		stmmac_disable_eee_mode(priv);</div><div class='del'>-</div><div class='del'>-	ret = phylink_ethtool_set_eee(priv-&gt;phylink, edata);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (edata-&gt;eee_enabled &amp;&amp;</div><div class='del'>-	    priv-&gt;tx_lpi_timer != edata-&gt;tx_lpi_timer) {</div><div class='del'>-		priv-&gt;tx_lpi_timer = edata-&gt;tx_lpi_timer;</div><div class='del'>-		stmmac_eee_init(priv);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return phylink_ethtool_set_eee(priv-&gt;phylink, edata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)</div><div class='hunk'>@@ -1227,77 +1044,20 @@ static int stmmac_get_ts_info(struct net_device *dev,</div><div class='ctx'> 		return ethtool_op_get_ts_info(dev, info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int stmmac_get_tunable(struct net_device *dev,</div><div class='del'>-			      const struct ethtool_tunable *tuna, void *data)</div><div class='del'>-{</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (tuna-&gt;id) {</div><div class='del'>-	case ETHTOOL_RX_COPYBREAK:</div><div class='del'>-		*(u32 *)data = priv-&gt;rx_copybreak;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int stmmac_set_tunable(struct net_device *dev,</div><div class='del'>-			      const struct ethtool_tunable *tuna,</div><div class='del'>-			      const void *data)</div><div class='del'>-{</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (tuna-&gt;id) {</div><div class='del'>-	case ETHTOOL_RX_COPYBREAK:</div><div class='del'>-		priv-&gt;rx_copybreak = *(u32 *)data;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int stmmac_get_mm(struct net_device *ndev,</div><div class='ctx'> 			 struct ethtool_mm_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	u32 frag_size;</div><div class='ctx'> </div><div class='ctx'> 	if (!stmmac_fpe_supported(priv))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;fpe_cfg.lock, flags);</div><div class='del'>-</div><div class='del'>-	state-&gt;max_verify_time = STMMAC_FPE_MM_MAX_VERIFY_TIME_MS;</div><div class='del'>-	state-&gt;verify_enabled = priv-&gt;fpe_cfg.verify_enabled;</div><div class='del'>-	state-&gt;pmac_enabled = priv-&gt;fpe_cfg.pmac_enabled;</div><div class='del'>-	state-&gt;verify_time = priv-&gt;fpe_cfg.verify_time;</div><div class='del'>-	state-&gt;tx_enabled = priv-&gt;fpe_cfg.tx_enabled;</div><div class='del'>-	state-&gt;verify_status = priv-&gt;fpe_cfg.status;</div><div class='ctx'> 	state-&gt;rx_min_frag_size = ETH_ZLEN;</div><div class='del'>-</div><div class='del'>-	/* FPE active if common tx_enabled and</div><div class='del'>-	 * (verification success or disabled(forced))</div><div class='del'>-	 */</div><div class='del'>-	if (state-&gt;tx_enabled &amp;&amp;</div><div class='del'>-	    (state-&gt;verify_status == ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED ||</div><div class='del'>-	     state-&gt;verify_status == ETHTOOL_MM_VERIFY_STATUS_DISABLED))</div><div class='del'>-		state-&gt;tx_active = true;</div><div class='del'>-	else</div><div class='del'>-		state-&gt;tx_active = false;</div><div class='del'>-</div><div class='ctx'> 	frag_size = stmmac_fpe_get_add_frag_size(priv);</div><div class='ctx'> 	state-&gt;tx_min_frag_size = ethtool_mm_frag_size_add_to_min(frag_size);</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;fpe_cfg.lock, flags);</div><div class='add'>+	ethtool_mmsv_get_mm(&amp;priv-&gt;fpe_cfg.mmsv, state);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1306,8 +1066,6 @@ static int stmmac_set_mm(struct net_device *ndev, struct ethtool_mm_cfg *cfg,</div><div class='ctx'> 			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct stmmac_fpe_cfg *fpe_cfg = &amp;priv-&gt;fpe_cfg;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	u32 frag_size;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -1316,23 +1074,8 @@ static int stmmac_set_mm(struct net_device *ndev, struct ethtool_mm_cfg *cfg,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* Wait for the verification that's currently in progress to finish */</div><div class='del'>-	timer_shutdown_sync(&amp;fpe_cfg-&gt;verify_timer);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;fpe_cfg-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	fpe_cfg-&gt;verify_enabled = cfg-&gt;verify_enabled;</div><div class='del'>-	fpe_cfg-&gt;pmac_enabled = cfg-&gt;pmac_enabled;</div><div class='del'>-	fpe_cfg-&gt;verify_time = cfg-&gt;verify_time;</div><div class='del'>-	fpe_cfg-&gt;tx_enabled = cfg-&gt;tx_enabled;</div><div class='del'>-</div><div class='del'>-	if (!cfg-&gt;verify_enabled)</div><div class='del'>-		fpe_cfg-&gt;status = ETHTOOL_MM_VERIFY_STATUS_DISABLED;</div><div class='del'>-</div><div class='ctx'> 	stmmac_fpe_set_add_frag_size(priv, frag_size);</div><div class='del'>-	stmmac_fpe_apply(priv);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;fpe_cfg-&gt;lock, flags);</div><div class='add'>+	ethtool_mmsv_set_mm(&amp;priv-&gt;fpe_cfg.mmsv, cfg);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1390,8 +1133,6 @@ static const struct ethtool_ops stmmac_ethtool_ops = {</div><div class='ctx'> 	.set_per_queue_coalesce = stmmac_set_per_queue_coalesce,</div><div class='ctx'> 	.get_channels = stmmac_get_channels,</div><div class='ctx'> 	.set_channels = stmmac_set_channels,</div><div class='del'>-	.get_tunable = stmmac_get_tunable,</div><div class='del'>-	.set_tunable = stmmac_set_tunable,</div><div class='ctx'> 	.get_link_ksettings = stmmac_ethtool_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings = stmmac_ethtool_set_link_ksettings,</div><div class='ctx'> 	.get_mm = stmmac_get_mm,</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c<br/>index 3a4bee029c7f..c54c70224351 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c</a></div><div class='hunk'>@@ -27,12 +27,6 @@</div><div class='ctx'> #define STMMAC_MAC_FPE_CTRL_STS_SVER	BIT(1)</div><div class='ctx'> #define STMMAC_MAC_FPE_CTRL_STS_EFPE	BIT(0)</div><div class='ctx'> </div><div class='del'>-/* FPE link-partner hand-shaking mPacket type */</div><div class='del'>-enum stmmac_mpacket_type {</div><div class='del'>-	MPACKET_VERIFY = 0,</div><div class='del'>-	MPACKET_RESPONSE = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct stmmac_fpe_reg {</div><div class='ctx'> 	const u32 mac_fpe_reg;		/* offset of MAC_FPE_CTRL_STS */</div><div class='ctx'> 	const u32 mtl_fpe_reg;		/* offset of MTL_FPE_CTRL_STS */</div><div class='hunk'>@@ -48,10 +42,10 @@ bool stmmac_fpe_supported(struct stmmac_priv *priv)</div><div class='ctx'> 		priv-&gt;hw-&gt;mac-&gt;fpe_map_preemption_class;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void stmmac_fpe_configure(struct stmmac_priv *priv, bool tx_enable,</div><div class='del'>-				 bool pmac_enable)</div><div class='add'>+static void stmmac_fpe_configure_tx(struct ethtool_mmsv *mmsv, bool tx_enable)</div><div class='ctx'> {</div><div class='del'>-	struct stmmac_fpe_cfg *cfg = &amp;priv-&gt;fpe_cfg;</div><div class='add'>+	struct stmmac_fpe_cfg *cfg = container_of(mmsv, struct stmmac_fpe_cfg, mmsv);</div><div class='add'>+	struct stmmac_priv *priv = container_of(cfg, struct stmmac_priv, fpe_cfg);</div><div class='ctx'> 	const struct stmmac_fpe_reg *reg = cfg-&gt;reg;</div><div class='ctx'> 	u32 num_rxq = priv-&gt;plat-&gt;rx_queues_to_use;</div><div class='ctx'> 	void __iomem *ioaddr = priv-&gt;ioaddr;</div><div class='hunk'>@@ -68,7 +62,18 @@ static void stmmac_fpe_configure(struct stmmac_priv *priv, bool tx_enable,</div><div class='ctx'> 		cfg-&gt;fpe_csr = 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	writel(cfg-&gt;fpe_csr, ioaddr + reg-&gt;mac_fpe_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void stmmac_fpe_configure_pmac(struct ethtool_mmsv *mmsv, bool pmac_enable)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_fpe_cfg *cfg = container_of(mmsv, struct stmmac_fpe_cfg, mmsv);</div><div class='add'>+	struct stmmac_priv *priv = container_of(cfg, struct stmmac_priv, fpe_cfg);</div><div class='add'>+	const struct stmmac_fpe_reg *reg = cfg-&gt;reg;</div><div class='add'>+	void __iomem *ioaddr = priv-&gt;ioaddr;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 value;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;hw-&gt;irq_ctrl_lock, flags);</div><div class='ctx'> 	value = readl(ioaddr + reg-&gt;int_en_reg);</div><div class='ctx'> </div><div class='ctx'> 	if (pmac_enable) {</div><div class='hunk'>@@ -83,49 +88,48 @@ static void stmmac_fpe_configure(struct stmmac_priv *priv, bool tx_enable,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	writel(value, ioaddr + reg-&gt;int_en_reg);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;hw-&gt;irq_ctrl_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void stmmac_fpe_send_mpacket(struct stmmac_priv *priv,</div><div class='del'>-				    enum stmmac_mpacket_type type)</div><div class='add'>+static void stmmac_fpe_send_mpacket(struct ethtool_mmsv *mmsv,</div><div class='add'>+				    enum ethtool_mpacket type)</div><div class='ctx'> {</div><div class='del'>-	const struct stmmac_fpe_reg *reg = priv-&gt;fpe_cfg.reg;</div><div class='add'>+	struct stmmac_fpe_cfg *cfg = container_of(mmsv, struct stmmac_fpe_cfg, mmsv);</div><div class='add'>+	struct stmmac_priv *priv = container_of(cfg, struct stmmac_priv, fpe_cfg);</div><div class='add'>+	const struct stmmac_fpe_reg *reg = cfg-&gt;reg;</div><div class='ctx'> 	void __iomem *ioaddr = priv-&gt;ioaddr;</div><div class='del'>-	u32 value = priv-&gt;fpe_cfg.fpe_csr;</div><div class='add'>+	u32 value = cfg-&gt;fpe_csr;</div><div class='ctx'> </div><div class='del'>-	if (type == MPACKET_VERIFY)</div><div class='add'>+	if (type == ETHTOOL_MPACKET_VERIFY)</div><div class='ctx'> 		value |= STMMAC_MAC_FPE_CTRL_STS_SVER;</div><div class='del'>-	else if (type == MPACKET_RESPONSE)</div><div class='add'>+	else if (type == ETHTOOL_MPACKET_RESPONSE)</div><div class='ctx'> 		value |= STMMAC_MAC_FPE_CTRL_STS_SRSP;</div><div class='ctx'> </div><div class='ctx'> 	writel(value, ioaddr + reg-&gt;mac_fpe_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct ethtool_mmsv_ops stmmac_mmsv_ops = {</div><div class='add'>+	.configure_tx = stmmac_fpe_configure_tx,</div><div class='add'>+	.configure_pmac = stmmac_fpe_configure_pmac,</div><div class='add'>+	.send_mpacket = stmmac_fpe_send_mpacket,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void stmmac_fpe_event_status(struct stmmac_priv *priv, int status)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_fpe_cfg *fpe_cfg = &amp;priv-&gt;fpe_cfg;</div><div class='add'>+	struct ethtool_mmsv *mmsv = &amp;fpe_cfg-&gt;mmsv;</div><div class='ctx'> </div><div class='del'>-	/* This is interrupt context, just spin_lock() */</div><div class='del'>-	spin_lock(&amp;fpe_cfg-&gt;lock);</div><div class='del'>-</div><div class='del'>-	if (!fpe_cfg-&gt;pmac_enabled || status == FPE_EVENT_UNKNOWN)</div><div class='del'>-		goto unlock_out;</div><div class='add'>+	if (status == FPE_EVENT_UNKNOWN)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	/* LP has sent verify mPacket */</div><div class='ctx'> 	if ((status &amp; FPE_EVENT_RVER) == FPE_EVENT_RVER)</div><div class='del'>-		stmmac_fpe_send_mpacket(priv, MPACKET_RESPONSE);</div><div class='add'>+		ethtool_mmsv_event_handle(mmsv, ETHTOOL_MMSV_LP_SENT_VERIFY_MPACKET);</div><div class='ctx'> </div><div class='del'>-	/* Local has sent verify mPacket */</div><div class='del'>-	if ((status &amp; FPE_EVENT_TVER) == FPE_EVENT_TVER &amp;&amp;</div><div class='del'>-	    fpe_cfg-&gt;status != ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED)</div><div class='del'>-		fpe_cfg-&gt;status = ETHTOOL_MM_VERIFY_STATUS_VERIFYING;</div><div class='add'>+	if ((status &amp; FPE_EVENT_TVER) == FPE_EVENT_TVER)</div><div class='add'>+		ethtool_mmsv_event_handle(mmsv, ETHTOOL_MMSV_LD_SENT_VERIFY_MPACKET);</div><div class='ctx'> </div><div class='del'>-	/* LP has sent response mPacket */</div><div class='del'>-	if ((status &amp; FPE_EVENT_RRSP) == FPE_EVENT_RRSP &amp;&amp;</div><div class='del'>-	    fpe_cfg-&gt;status == ETHTOOL_MM_VERIFY_STATUS_VERIFYING)</div><div class='del'>-		fpe_cfg-&gt;status = ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED;</div><div class='del'>-</div><div class='del'>-unlock_out:</div><div class='del'>-	spin_unlock(&amp;fpe_cfg-&gt;lock);</div><div class='add'>+	if ((status &amp; FPE_EVENT_RRSP) == FPE_EVENT_RRSP)</div><div class='add'>+		ethtool_mmsv_event_handle(mmsv, ETHTOOL_MMSV_LP_SENT_RESPONSE_MPACKET);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void stmmac_fpe_irq_status(struct stmmac_priv *priv)</div><div class='hunk'>@@ -164,119 +168,16 @@ void stmmac_fpe_irq_status(struct stmmac_priv *priv)</div><div class='ctx'> 	stmmac_fpe_event_status(priv, status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * stmmac_fpe_verify_timer - Timer for MAC Merge verification</div><div class='del'>- * @t:  timer_list struct containing private info</div><div class='del'>- *</div><div class='del'>- * Verify the MAC Merge capability in the local TX direction, by</div><div class='del'>- * transmitting Verify mPackets up to 3 times. Wait until link</div><div class='del'>- * partner responds with a Response mPacket, otherwise fail.</div><div class='del'>- */</div><div class='del'>-static void stmmac_fpe_verify_timer(struct timer_list *t)</div><div class='del'>-{</div><div class='del'>-	struct stmmac_fpe_cfg *fpe_cfg = from_timer(fpe_cfg, t, verify_timer);</div><div class='del'>-	struct stmmac_priv *priv = container_of(fpe_cfg, struct stmmac_priv,</div><div class='del'>-						fpe_cfg);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	bool rearm = false;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;fpe_cfg-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	switch (fpe_cfg-&gt;status) {</div><div class='del'>-	case ETHTOOL_MM_VERIFY_STATUS_INITIAL:</div><div class='del'>-	case ETHTOOL_MM_VERIFY_STATUS_VERIFYING:</div><div class='del'>-		if (fpe_cfg-&gt;verify_retries != 0) {</div><div class='del'>-			stmmac_fpe_send_mpacket(priv, MPACKET_VERIFY);</div><div class='del'>-			rearm = true;</div><div class='del'>-		} else {</div><div class='del'>-			fpe_cfg-&gt;status = ETHTOOL_MM_VERIFY_STATUS_FAILED;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		fpe_cfg-&gt;verify_retries--;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED:</div><div class='del'>-		stmmac_fpe_configure(priv, true, true);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rearm) {</div><div class='del'>-		mod_timer(&amp;fpe_cfg-&gt;verify_timer,</div><div class='del'>-			  jiffies + msecs_to_jiffies(fpe_cfg-&gt;verify_time));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;fpe_cfg-&gt;lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void stmmac_fpe_verify_timer_arm(struct stmmac_fpe_cfg *fpe_cfg)</div><div class='del'>-{</div><div class='del'>-	if (fpe_cfg-&gt;pmac_enabled &amp;&amp; fpe_cfg-&gt;tx_enabled &amp;&amp;</div><div class='del'>-	    fpe_cfg-&gt;verify_enabled &amp;&amp;</div><div class='del'>-	    fpe_cfg-&gt;status != ETHTOOL_MM_VERIFY_STATUS_FAILED &amp;&amp;</div><div class='del'>-	    fpe_cfg-&gt;status != ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED) {</div><div class='del'>-		timer_setup(&amp;fpe_cfg-&gt;verify_timer, stmmac_fpe_verify_timer, 0);</div><div class='del'>-		mod_timer(&amp;fpe_cfg-&gt;verify_timer, jiffies);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void stmmac_fpe_init(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	priv-&gt;fpe_cfg.verify_retries = STMMAC_FPE_MM_MAX_VERIFY_RETRIES;</div><div class='del'>-	priv-&gt;fpe_cfg.verify_time = STMMAC_FPE_MM_MAX_VERIFY_TIME_MS;</div><div class='del'>-	priv-&gt;fpe_cfg.status = ETHTOOL_MM_VERIFY_STATUS_DISABLED;</div><div class='del'>-	timer_setup(&amp;priv-&gt;fpe_cfg.verify_timer, stmmac_fpe_verify_timer, 0);</div><div class='del'>-	spin_lock_init(&amp;priv-&gt;fpe_cfg.lock);</div><div class='add'>+	ethtool_mmsv_init(&amp;priv-&gt;fpe_cfg.mmsv, priv-&gt;dev,</div><div class='add'>+			  &amp;stmmac_mmsv_ops);</div><div class='ctx'> </div><div class='ctx'> 	if ((!priv-&gt;fpe_cfg.reg || !priv-&gt;hw-&gt;mac-&gt;fpe_map_preemption_class) &amp;&amp;</div><div class='ctx'> 	    priv-&gt;dma_cap.fpesel)</div><div class='ctx'> 		dev_info(priv-&gt;device, "FPE is not supported by driver.\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void stmmac_fpe_apply(struct stmmac_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct stmmac_fpe_cfg *fpe_cfg = &amp;priv-&gt;fpe_cfg;</div><div class='del'>-</div><div class='del'>-	/* If verification is disabled, configure FPE right away.</div><div class='del'>-	 * Otherwise let the timer code do it.</div><div class='del'>-	 */</div><div class='del'>-	if (!fpe_cfg-&gt;verify_enabled) {</div><div class='del'>-		stmmac_fpe_configure(priv, fpe_cfg-&gt;tx_enabled,</div><div class='del'>-				     fpe_cfg-&gt;pmac_enabled);</div><div class='del'>-	} else {</div><div class='del'>-		fpe_cfg-&gt;status = ETHTOOL_MM_VERIFY_STATUS_INITIAL;</div><div class='del'>-		fpe_cfg-&gt;verify_retries = STMMAC_FPE_MM_MAX_VERIFY_RETRIES;</div><div class='del'>-</div><div class='del'>-		if (netif_running(priv-&gt;dev))</div><div class='del'>-			stmmac_fpe_verify_timer_arm(fpe_cfg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up)</div><div class='del'>-{</div><div class='del'>-	struct stmmac_fpe_cfg *fpe_cfg = &amp;priv-&gt;fpe_cfg;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	timer_shutdown_sync(&amp;fpe_cfg-&gt;verify_timer);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;fpe_cfg-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	if (is_up &amp;&amp; fpe_cfg-&gt;pmac_enabled) {</div><div class='del'>-		/* VERIFY process requires pmac enabled when NIC comes up */</div><div class='del'>-		stmmac_fpe_configure(priv, false, true);</div><div class='del'>-</div><div class='del'>-		/* New link =&gt; maybe new partner =&gt; new verification process */</div><div class='del'>-		stmmac_fpe_apply(priv);</div><div class='del'>-	} else {</div><div class='del'>-		/* No link =&gt; turn off EFPE */</div><div class='del'>-		stmmac_fpe_configure(priv, false, false);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;fpe_cfg-&gt;lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int stmmac_fpe_get_add_frag_size(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	const struct stmmac_fpe_reg *reg = priv-&gt;fpe_cfg.reg;</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h<br/>index b884eac7142d..3fc46acf7001 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h</a></div><div class='hunk'>@@ -9,15 +9,10 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> </div><div class='del'>-#define STMMAC_FPE_MM_MAX_VERIFY_RETRIES	3</div><div class='del'>-#define STMMAC_FPE_MM_MAX_VERIFY_TIME_MS	128</div><div class='del'>-</div><div class='ctx'> struct stmmac_priv;</div><div class='ctx'> </div><div class='del'>-void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up);</div><div class='ctx'> bool stmmac_fpe_supported(struct stmmac_priv *priv);</div><div class='ctx'> void stmmac_fpe_init(struct stmmac_priv *priv);</div><div class='del'>-void stmmac_fpe_apply(struct stmmac_priv *priv);</div><div class='ctx'> void stmmac_fpe_irq_status(struct stmmac_priv *priv);</div><div class='ctx'> int stmmac_fpe_get_add_frag_size(struct stmmac_priv *priv);</div><div class='ctx'> void stmmac_fpe_set_add_frag_size(struct stmmac_priv *priv, u32 add_frag_size);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c<br/>index 5ef52ef2698f..bb110124f21e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c</a></div><div class='hunk'>@@ -18,9 +18,22 @@</div><div class='ctx'> #include "dwmac4.h"</div><div class='ctx'> #include "stmmac.h"</div><div class='ctx'> </div><div class='add'>+#define STMMAC_HWTS_CFG_MASK	(PTP_TCR_TSENA | PTP_TCR_TSCFUPDT | \</div><div class='add'>+				 PTP_TCR_TSINIT | PTP_TCR_TSUPDT | \</div><div class='add'>+				 PTP_TCR_TSCTRLSSR | PTP_TCR_SNAPTYPSEL_1 | \</div><div class='add'>+				 PTP_TCR_TSIPV4ENA | PTP_TCR_TSIPV6ENA | \</div><div class='add'>+				 PTP_TCR_TSEVNTENA | PTP_TCR_TSMSTRENA | \</div><div class='add'>+				 PTP_TCR_TSVER2ENA | PTP_TCR_TSIPENA | \</div><div class='add'>+				 PTP_TCR_TSTRIG | PTP_TCR_TSENALL)</div><div class='add'>+</div><div class='ctx'> static void config_hw_tstamping(void __iomem *ioaddr, u32 data)</div><div class='ctx'> {</div><div class='del'>-	writel(data, ioaddr + PTP_TCR);</div><div class='add'>+	u32 regval = readl(ioaddr + PTP_TCR);</div><div class='add'>+</div><div class='add'>+	regval &amp;= ~STMMAC_HWTS_CFG_MASK;</div><div class='add'>+	regval |= data;</div><div class='add'>+</div><div class='add'>+	writel(regval, ioaddr + PTP_TCR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void config_sub_second_increment(void __iomem *ioaddr,</div><div class='hunk'>@@ -122,7 +135,6 @@ static int init_systime(void __iomem *ioaddr, u32 sec, u32 nsec)</div><div class='ctx'> static int config_addend(void __iomem *ioaddr, u32 addend)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value;</div><div class='del'>-	int limit;</div><div class='ctx'> </div><div class='ctx'> 	writel(addend, ioaddr + PTP_TAR);</div><div class='ctx'> 	/* issue command to update the addend value */</div><div class='hunk'>@@ -131,23 +143,15 @@ static int config_addend(void __iomem *ioaddr, u32 addend)</div><div class='ctx'> 	writel(value, ioaddr + PTP_TCR);</div><div class='ctx'> </div><div class='ctx'> 	/* wait for present addend update to complete */</div><div class='del'>-	limit = 10;</div><div class='del'>-	while (limit--) {</div><div class='del'>-		if (!(readl(ioaddr + PTP_TCR) &amp; PTP_TCR_TSADDREG))</div><div class='del'>-			break;</div><div class='del'>-		mdelay(10);</div><div class='del'>-	}</div><div class='del'>-	if (limit &lt; 0)</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return readl_poll_timeout_atomic(ioaddr + PTP_TCR, value,</div><div class='add'>+					 !(value &amp; PTP_TCR_TSADDREG),</div><div class='add'>+					 10, 100000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec,</div><div class='ctx'> 		int add_sub, int gmac4)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value;</div><div class='del'>-	int limit;</div><div class='ctx'> </div><div class='ctx'> 	if (add_sub) {</div><div class='ctx'> 		/* If the new sec value needs to be subtracted with</div><div class='hunk'>@@ -174,16 +178,9 @@ static int adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec,</div><div class='ctx'> 	writel(value, ioaddr + PTP_TCR);</div><div class='ctx'> </div><div class='ctx'> 	/* wait for present system time adjust/update to complete */</div><div class='del'>-	limit = 10;</div><div class='del'>-	while (limit--) {</div><div class='del'>-		if (!(readl(ioaddr + PTP_TCR) &amp; PTP_TCR_TSUPDT))</div><div class='del'>-			break;</div><div class='del'>-		mdelay(10);</div><div class='del'>-	}</div><div class='del'>-	if (limit &lt; 0)</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return readl_poll_timeout_atomic(ioaddr + PTP_TCR, value,</div><div class='add'>+					 !(value &amp; PTP_TCR_TSUPDT),</div><div class='add'>+					 10, 100000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void get_systime(void __iomem *ioaddr, u64 *systime)</div><div class='hunk'>@@ -209,7 +206,7 @@ static void get_ptptime(void __iomem *ptpaddr, u64 *ptp_time)</div><div class='ctx'> 	u64 ns;</div><div class='ctx'> </div><div class='ctx'> 	ns = readl(ptpaddr + PTP_ATNR);</div><div class='del'>-	ns += readl(ptpaddr + PTP_ATSR) * NSEC_PER_SEC;</div><div class='add'>+	ns += (u64)readl(ptpaddr + PTP_ATSR) * NSEC_PER_SEC;</div><div class='ctx'> </div><div class='ctx'> 	*ptp_time = ns;</div><div class='ctx'> }</div><div class='hunk'>@@ -269,3 +266,14 @@ const struct stmmac_hwtimestamp stmmac_ptp = {</div><div class='ctx'> 	.timestamp_interrupt = timestamp_interrupt,</div><div class='ctx'> 	.hwtstamp_correct_latency = hwtstamp_correct_latency,</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+const struct stmmac_hwtimestamp dwmac1000_ptp = {</div><div class='add'>+	.config_hw_tstamping = config_hw_tstamping,</div><div class='add'>+	.init_systime = init_systime,</div><div class='add'>+	.config_sub_second_increment = config_sub_second_increment,</div><div class='add'>+	.config_addend = config_addend,</div><div class='add'>+	.adjust_systime = adjust_systime,</div><div class='add'>+	.get_systime = get_systime,</div><div class='add'>+	.get_ptptime = dwmac1000_get_ptptime,</div><div class='add'>+	.timestamp_interrupt = dwmac1000_timestamp_interrupt,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c<br/>new file mode 100644<br/>index 000000000000..5c5dd502f79a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * PCI bus helpers for STMMAC driver</div><div class='add'>+ * Copyright (C) 2025 Yao Zi &lt;ziyao@disroot.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stmmac_libpci.h"</div><div class='add'>+</div><div class='add'>+int stmmac_pci_plat_suspend(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pci_save_state(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	pci_wake_from_d3(pdev, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stmmac_pci_plat_suspend);</div><div class='add'>+</div><div class='add'>+int stmmac_pci_plat_resume(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pci_restore_state(pdev);</div><div class='add'>+	pci_set_power_state(pdev, PCI_D0);</div><div class='add'>+</div><div class='add'>+	ret = pci_enable_device(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stmmac_pci_plat_resume);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("STMMAC PCI helper library");</div><div class='add'>+MODULE_AUTHOR("Yao Zi &lt;ziyao@disroot.org&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h<br/>new file mode 100644<br/>index 000000000000..71553184f982<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025 Yao Zi &lt;ziyao@disroot.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __STMMAC_LIBPCI_H__</div><div class='add'>+#define __STMMAC_LIBPCI_H__</div><div class='add'>+</div><div class='add'>+int stmmac_pci_plat_suspend(struct device *dev, void *bsp_priv);</div><div class='add'>+int stmmac_pci_plat_resume(struct device *dev, void *bsp_priv);</div><div class='add'>+</div><div class='add'>+#endif /* __STMMAC_LIBPCI_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c<br/>index 12f0db0e8830..da206b24aaed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_main.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/pm_wakeirq.h&gt;</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;</div><div class='ctx'> #include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='hunk'>@@ -39,12 +40,14 @@</div><div class='ctx'> #include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/udp.h&gt;</div><div class='ctx'> #include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> #include &lt;net/pkt_cls.h&gt;</div><div class='ctx'> #include &lt;net/xdp_sock_drv.h&gt;</div><div class='ctx'> #include "stmmac_ptp.h"</div><div class='ctx'> #include "stmmac_fpe.h"</div><div class='ctx'> #include "stmmac.h"</div><div class='add'>+#include "stmmac_pcs.h"</div><div class='ctx'> #include "stmmac_xdp.h"</div><div class='ctx'> #include &lt;linux/reset.h&gt;</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='hunk'>@@ -56,8 +59,7 @@</div><div class='ctx'>  * with fine resolution and binary rollover. This avoid non-monotonic behavior</div><div class='ctx'>  * (clock jumps) when changing timestamping settings at runtime.</div><div class='ctx'>  */</div><div class='del'>-#define STMMAC_HWTS_ACTIVE	(PTP_TCR_TSENA | PTP_TCR_TSCFUPDT | \</div><div class='del'>-				 PTP_TCR_TSCTRLSSR)</div><div class='add'>+#define STMMAC_HWTS_ACTIVE	(PTP_TCR_TSENA | PTP_TCR_TSCTRLSSR)</div><div class='ctx'> </div><div class='ctx'> #define	STMMAC_ALIGN(x)		ALIGN(ALIGN(x, SMP_CACHE_BYTES), 16)</div><div class='ctx'> #define	TSO_MAX_BUFF_SIZE	(SZ_16K - 1)</div><div class='hunk'>@@ -77,7 +79,6 @@ module_param(phyaddr, int, 0444);</div><div class='ctx'> MODULE_PARM_DESC(phyaddr, "Physical device address");</div><div class='ctx'> </div><div class='ctx'> #define STMMAC_TX_THRESH(x)	((x)-&gt;dma_conf.dma_tx_size / 4)</div><div class='del'>-#define STMMAC_RX_THRESH(x)	((x)-&gt;dma_conf.dma_rx_size / 4)</div><div class='ctx'> </div><div class='ctx'> /* Limit to make sure XDP TX and slow path can coexist */</div><div class='ctx'> #define STMMAC_XSK_TX_BUDGET_MAX	256</div><div class='hunk'>@@ -89,33 +90,32 @@ MODULE_PARM_DESC(phyaddr, "Physical device address");</div><div class='ctx'> #define STMMAC_XDP_TX		BIT(1)</div><div class='ctx'> #define STMMAC_XDP_REDIRECT	BIT(2)</div><div class='ctx'> </div><div class='del'>-static int flow_ctrl = FLOW_AUTO;</div><div class='add'>+static int flow_ctrl = 0xdead;</div><div class='ctx'> module_param(flow_ctrl, int, 0644);</div><div class='del'>-MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");</div><div class='add'>+MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off] (obsolete)");</div><div class='ctx'> </div><div class='ctx'> static int pause = PAUSE_TIME;</div><div class='ctx'> module_param(pause, int, 0644);</div><div class='del'>-MODULE_PARM_DESC(pause, "Flow Control Pause Time");</div><div class='add'>+MODULE_PARM_DESC(pause, "Flow Control Pause Time (units of 512 bit times)");</div><div class='ctx'> </div><div class='ctx'> #define TC_DEFAULT 64</div><div class='ctx'> static int tc = TC_DEFAULT;</div><div class='ctx'> module_param(tc, int, 0644);</div><div class='ctx'> MODULE_PARM_DESC(tc, "DMA threshold control value");</div><div class='ctx'> </div><div class='add'>+/* This is unused */</div><div class='ctx'> #define	DEFAULT_BUFSIZE	1536</div><div class='ctx'> static int buf_sz = DEFAULT_BUFSIZE;</div><div class='ctx'> module_param(buf_sz, int, 0644);</div><div class='ctx'> MODULE_PARM_DESC(buf_sz, "DMA buffer size");</div><div class='ctx'> </div><div class='del'>-#define	STMMAC_RX_COPYBREAK	256</div><div class='del'>-</div><div class='ctx'> static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |</div><div class='ctx'> 				      NETIF_MSG_LINK | NETIF_MSG_IFUP |</div><div class='ctx'> 				      NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);</div><div class='ctx'> </div><div class='ctx'> #define STMMAC_DEFAULT_LPI_TIMER	1000</div><div class='del'>-static int eee_timer = STMMAC_DEFAULT_LPI_TIMER;</div><div class='del'>-module_param(eee_timer, int, 0644);</div><div class='add'>+static unsigned int eee_timer = STMMAC_DEFAULT_LPI_TIMER;</div><div class='add'>+module_param(eee_timer, uint, 0644);</div><div class='ctx'> MODULE_PARM_DESC(eee_timer, "LPI tx expiration time in msec");</div><div class='ctx'> #define STMMAC_LPI_T(x) (jiffies + usecs_to_jiffies(x))</div><div class='ctx'> </div><div class='hunk'>@@ -148,37 +148,84 @@ static void stmmac_exit_fs(struct net_device *dev);</div><div class='ctx'> </div><div class='ctx'> #define STMMAC_COAL_TIMER(x) (ns_to_ktime((x) * NSEC_PER_USEC))</div><div class='ctx'> </div><div class='del'>-int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled)</div><div class='add'>+struct stmmac_devlink_priv {</div><div class='add'>+	struct stmmac_priv *stmmac_priv;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum stmmac_dl_param_id {</div><div class='add'>+	STMMAC_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,</div><div class='add'>+	STMMAC_DEVLINK_PARAM_ID_TS_COARSE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * stmmac_set_clk_tx_rate() - set the clock rate for the MAC transmit clock</div><div class='add'>+ * @bsp_priv: BSP private data structure (unused)</div><div class='add'>+ * @clk_tx_i: the transmit clock</div><div class='add'>+ * @interface: the selected interface mode</div><div class='add'>+ * @speed: the speed that the MAC will be operating at</div><div class='add'>+ *</div><div class='add'>+ * Set the transmit clock rate for the MAC, normally 2.5MHz for 10Mbps,</div><div class='add'>+ * 25MHz for 100Mbps and 125MHz for 1Gbps. This is suitable for at least</div><div class='add'>+ * MII, GMII, RGMII and RMII interface modes. Platforms can hook this into</div><div class='add'>+ * the plat_data-&gt;set_clk_tx_rate method directly, call it via their own</div><div class='add'>+ * implementation, or implement their own method should they have more</div><div class='add'>+ * complex requirements. It is intended to only be used in this method.</div><div class='add'>+ *</div><div class='add'>+ * plat_data-&gt;clk_tx_i must be filled in.</div><div class='add'>+ */</div><div class='add'>+int stmmac_set_clk_tx_rate(void *bsp_priv, struct clk *clk_tx_i,</div><div class='add'>+			   phy_interface_t interface, int speed)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0;</div><div class='add'>+	long rate = rgmii_clock(speed);</div><div class='ctx'> </div><div class='del'>-	if (enabled) {</div><div class='del'>-		ret = clk_prepare_enable(priv-&gt;plat-&gt;stmmac_clk);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-		ret = clk_prepare_enable(priv-&gt;plat-&gt;pclk);</div><div class='del'>-		if (ret) {</div><div class='del'>-			clk_disable_unprepare(priv-&gt;plat-&gt;stmmac_clk);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-		if (priv-&gt;plat-&gt;clks_config) {</div><div class='del'>-			ret = priv-&gt;plat-&gt;clks_config(priv-&gt;plat-&gt;bsp_priv, enabled);</div><div class='del'>-			if (ret) {</div><div class='del'>-				clk_disable_unprepare(priv-&gt;plat-&gt;stmmac_clk);</div><div class='del'>-				clk_disable_unprepare(priv-&gt;plat-&gt;pclk);</div><div class='del'>-				return ret;</div><div class='del'>-			}</div><div class='add'>+	/* Silently ignore unsupported speeds as rgmii_clock() only</div><div class='add'>+	 * supports 10, 100 and 1000Mbps. We do not want to spit</div><div class='add'>+	 * errors for 2500 and higher speeds here.</div><div class='add'>+	 */</div><div class='add'>+	if (rate &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return clk_set_rate(clk_tx_i, rate);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stmmac_set_clk_tx_rate);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * stmmac_axi_blen_to_mask() - convert a burst length array to reg value</div><div class='add'>+ * @regval: pointer to a u32 for the resulting register value</div><div class='add'>+ * @blen: pointer to an array of u32 containing the burst length values in bytes</div><div class='add'>+ * @len: the number of entries in the @blen array</div><div class='add'>+ */</div><div class='add'>+void stmmac_axi_blen_to_mask(u32 *regval, const u32 *blen, size_t len)</div><div class='add'>+{</div><div class='add'>+	size_t i;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	for (val = i = 0; i &lt; len; i++) {</div><div class='add'>+		u32 burst = blen[i];</div><div class='add'>+</div><div class='add'>+		/* Burst values of zero must be skipped. */</div><div class='add'>+		if (!burst)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* The valid range for the burst length is 4 to 256 inclusive,</div><div class='add'>+		 * and it must be a power of two.</div><div class='add'>+		 */</div><div class='add'>+		if (burst &lt; 4 || burst &gt; 256 || !is_power_of_2(burst)) {</div><div class='add'>+			pr_err("stmmac: invalid burst length %u at index %zu\n",</div><div class='add'>+			       burst, i);</div><div class='add'>+			continue;</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		clk_disable_unprepare(priv-&gt;plat-&gt;stmmac_clk);</div><div class='del'>-		clk_disable_unprepare(priv-&gt;plat-&gt;pclk);</div><div class='del'>-		if (priv-&gt;plat-&gt;clks_config)</div><div class='del'>-			priv-&gt;plat-&gt;clks_config(priv-&gt;plat-&gt;bsp_priv, enabled);</div><div class='add'>+</div><div class='add'>+		/* Since burst is a power of two, and the register field starts</div><div class='add'>+		 * with burst = 4, shift right by two bits so bit 0 of the field</div><div class='add'>+		 * corresponds with the minimum value.</div><div class='add'>+		 */</div><div class='add'>+		val |= burst &gt;&gt; 2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	*regval = FIELD_PREP(DMA_AXI_BLEN_MASK, val);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(stmmac_bus_clks_config);</div><div class='add'>+EXPORT_SYMBOL_GPL(stmmac_axi_blen_to_mask);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * stmmac_verify_args - verify the driver parameters.</div><div class='hunk'>@@ -189,16 +236,11 @@ static void stmmac_verify_args(void)</div><div class='ctx'> {</div><div class='ctx'> 	if (unlikely(watchdog &lt; 0))</div><div class='ctx'> 		watchdog = TX_TIMEO;</div><div class='del'>-	if (unlikely((buf_sz &lt; DEFAULT_BUFSIZE) || (buf_sz &gt; BUF_SIZE_16KiB)))</div><div class='del'>-		buf_sz = DEFAULT_BUFSIZE;</div><div class='del'>-	if (unlikely(flow_ctrl &gt; 1))</div><div class='del'>-		flow_ctrl = FLOW_AUTO;</div><div class='del'>-	else if (likely(flow_ctrl &lt; 0))</div><div class='del'>-		flow_ctrl = FLOW_OFF;</div><div class='ctx'> 	if (unlikely((pause &lt; 0) || (pause &gt; 0xffff)))</div><div class='ctx'> 		pause = PAUSE_TIME;</div><div class='del'>-	if (eee_timer &lt; 0)</div><div class='del'>-		eee_timer = STMMAC_DEFAULT_LPI_TIMER;</div><div class='add'>+</div><div class='add'>+	if (flow_ctrl != 0xdead)</div><div class='add'>+		pr_warn("stmmac: module parameter 'flow_ctrl' is obsolete - please remove from your module configuration\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __stmmac_disable_all_queues(struct stmmac_priv *priv)</div><div class='hunk'>@@ -287,73 +329,6 @@ static void stmmac_global_err(struct stmmac_priv *priv)</div><div class='ctx'> 	stmmac_service_event_schedule(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * stmmac_clk_csr_set - dynamically set the MDC clock</div><div class='del'>- * @priv: driver private structure</div><div class='del'>- * Description: this is to dynamically set the MDC clock according to the csr</div><div class='del'>- * clock input.</div><div class='del'>- * Note:</div><div class='del'>- *	If a specific clk_csr value is passed from the platform</div><div class='del'>- *	this means that the CSR Clock Range selection cannot be</div><div class='del'>- *	changed at run-time and it is fixed (as reported in the driver</div><div class='del'>- *	documentation). Viceversa the driver will try to set the MDC</div><div class='del'>- *	clock dynamically according to the actual clock input.</div><div class='del'>- */</div><div class='del'>-static void stmmac_clk_csr_set(struct stmmac_priv *priv)</div><div class='del'>-{</div><div class='del'>-	u32 clk_rate;</div><div class='del'>-</div><div class='del'>-	clk_rate = clk_get_rate(priv-&gt;plat-&gt;stmmac_clk);</div><div class='del'>-</div><div class='del'>-	/* Platform provided default clk_csr would be assumed valid</div><div class='del'>-	 * for all other cases except for the below mentioned ones.</div><div class='del'>-	 * For values higher than the IEEE 802.3 specified frequency</div><div class='del'>-	 * we can not estimate the proper divider as it is not known</div><div class='del'>-	 * the frequency of clk_csr_i. So we do not change the default</div><div class='del'>-	 * divider.</div><div class='del'>-	 */</div><div class='del'>-	if (!(priv-&gt;clk_csr &amp; MAC_CSR_H_FRQ_MASK)) {</div><div class='del'>-		if (clk_rate &lt; CSR_F_35M)</div><div class='del'>-			priv-&gt;clk_csr = STMMAC_CSR_20_35M;</div><div class='del'>-		else if ((clk_rate &gt;= CSR_F_35M) &amp;&amp; (clk_rate &lt; CSR_F_60M))</div><div class='del'>-			priv-&gt;clk_csr = STMMAC_CSR_35_60M;</div><div class='del'>-		else if ((clk_rate &gt;= CSR_F_60M) &amp;&amp; (clk_rate &lt; CSR_F_100M))</div><div class='del'>-			priv-&gt;clk_csr = STMMAC_CSR_60_100M;</div><div class='del'>-		else if ((clk_rate &gt;= CSR_F_100M) &amp;&amp; (clk_rate &lt; CSR_F_150M))</div><div class='del'>-			priv-&gt;clk_csr = STMMAC_CSR_100_150M;</div><div class='del'>-		else if ((clk_rate &gt;= CSR_F_150M) &amp;&amp; (clk_rate &lt; CSR_F_250M))</div><div class='del'>-			priv-&gt;clk_csr = STMMAC_CSR_150_250M;</div><div class='del'>-		else if ((clk_rate &gt;= CSR_F_250M) &amp;&amp; (clk_rate &lt;= CSR_F_300M))</div><div class='del'>-			priv-&gt;clk_csr = STMMAC_CSR_250_300M;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_HAS_SUN8I) {</div><div class='del'>-		if (clk_rate &gt; 160000000)</div><div class='del'>-			priv-&gt;clk_csr = 0x03;</div><div class='del'>-		else if (clk_rate &gt; 80000000)</div><div class='del'>-			priv-&gt;clk_csr = 0x02;</div><div class='del'>-		else if (clk_rate &gt; 40000000)</div><div class='del'>-			priv-&gt;clk_csr = 0x01;</div><div class='del'>-		else</div><div class='del'>-			priv-&gt;clk_csr = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;plat-&gt;has_xgmac) {</div><div class='del'>-		if (clk_rate &gt; 400000000)</div><div class='del'>-			priv-&gt;clk_csr = 0x5;</div><div class='del'>-		else if (clk_rate &gt; 350000000)</div><div class='del'>-			priv-&gt;clk_csr = 0x4;</div><div class='del'>-		else if (clk_rate &gt; 300000000)</div><div class='del'>-			priv-&gt;clk_csr = 0x3;</div><div class='del'>-		else if (clk_rate &gt; 250000000)</div><div class='del'>-			priv-&gt;clk_csr = 0x2;</div><div class='del'>-		else if (clk_rate &gt; 150000000)</div><div class='del'>-			priv-&gt;clk_csr = 0x1;</div><div class='del'>-		else</div><div class='del'>-			priv-&gt;clk_csr = 0x0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void print_pkt(unsigned char *buf, int len)</div><div class='ctx'> {</div><div class='ctx'> 	pr_debug("len = %d byte, buf addr: 0x%p\n", len, buf);</div><div class='hunk'>@@ -391,23 +366,7 @@ static inline u32 stmmac_rx_dirty(struct stmmac_priv *priv, u32 queue)</div><div class='ctx'> 	return dirty;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void stmmac_lpi_entry_timer_config(struct stmmac_priv *priv, bool en)</div><div class='del'>-{</div><div class='del'>-	int tx_lpi_timer;</div><div class='del'>-</div><div class='del'>-	/* Clear/set the SW EEE timer flag based on LPI ET enablement */</div><div class='del'>-	priv-&gt;eee_sw_timer_en = en ? 0 : 1;</div><div class='del'>-	tx_lpi_timer  = en ? priv-&gt;tx_lpi_timer : 0;</div><div class='del'>-	stmmac_set_eee_lpi_timer(priv, priv-&gt;hw, tx_lpi_timer);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * stmmac_enable_eee_mode - check and enter in LPI mode</div><div class='del'>- * @priv: driver private structure</div><div class='del'>- * Description: this function is to verify and enter in LPI mode in case of</div><div class='del'>- * EEE.</div><div class='del'>- */</div><div class='del'>-static int stmmac_enable_eee_mode(struct stmmac_priv *priv)</div><div class='add'>+static bool stmmac_eee_tx_busy(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tx_cnt = priv-&gt;plat-&gt;tx_queues_to_use;</div><div class='ctx'> 	u32 queue;</div><div class='hunk'>@@ -417,31 +376,45 @@ static int stmmac_enable_eee_mode(struct stmmac_priv *priv)</div><div class='ctx'> 		struct stmmac_tx_queue *tx_q = &amp;priv-&gt;dma_conf.tx_queue[queue];</div><div class='ctx'> </div><div class='ctx'> 		if (tx_q-&gt;dirty_tx != tx_q-&gt;cur_tx)</div><div class='del'>-			return -EBUSY; /* still unfinished work */</div><div class='add'>+			return true; /* still unfinished work */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Check and enter in LPI mode */</div><div class='del'>-	if (!priv-&gt;tx_path_in_lpi_mode)</div><div class='del'>-		stmmac_set_eee_mode(priv, priv-&gt;hw,</div><div class='del'>-			priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_EN_TX_LPI_CLOCKGATING);</div><div class='del'>-	return 0;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void stmmac_restart_sw_lpi_timer(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	mod_timer(&amp;priv-&gt;eee_ctrl_timer, STMMAC_LPI_T(priv-&gt;tx_lpi_timer));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * stmmac_disable_eee_mode - disable and exit from LPI mode</div><div class='add'>+ * stmmac_try_to_start_sw_lpi - check and enter in LPI mode</div><div class='ctx'>  * @priv: driver private structure</div><div class='del'>- * Description: this function is to exit and disable EEE in case of</div><div class='del'>- * LPI state is true. This is called by the xmit.</div><div class='add'>+ * Description: this function is to verify and enter in LPI mode in case of</div><div class='add'>+ * EEE.</div><div class='ctx'>  */</div><div class='del'>-void stmmac_disable_eee_mode(struct stmmac_priv *priv)</div><div class='add'>+static void stmmac_try_to_start_sw_lpi(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	if (!priv-&gt;eee_sw_timer_en) {</div><div class='del'>-		stmmac_lpi_entry_timer_config(priv, 0);</div><div class='add'>+	if (stmmac_eee_tx_busy(priv)) {</div><div class='add'>+		stmmac_restart_sw_lpi_timer(priv);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	stmmac_reset_eee_mode(priv, priv-&gt;hw);</div><div class='del'>-	del_timer_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='add'>+	/* Check and enter in LPI mode */</div><div class='add'>+	if (!priv-&gt;tx_path_in_lpi_mode)</div><div class='add'>+		stmmac_set_lpi_mode(priv, priv-&gt;hw, STMMAC_LPI_FORCED,</div><div class='add'>+				    priv-&gt;tx_lpi_clk_stop, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * stmmac_stop_sw_lpi - stop transmitting LPI</div><div class='add'>+ * @priv: driver private structure</div><div class='add'>+ * Description: When using software-controlled LPI, stop transmitting LPI state.</div><div class='add'>+ */</div><div class='add'>+static void stmmac_stop_sw_lpi(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='add'>+	stmmac_set_lpi_mode(priv, priv-&gt;hw, STMMAC_LPI_DISABLE, false, 0);</div><div class='ctx'> 	priv-&gt;tx_path_in_lpi_mode = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -454,69 +427,9 @@ void stmmac_disable_eee_mode(struct stmmac_priv *priv)</div><div class='ctx'>  */</div><div class='ctx'> static void stmmac_eee_ctrl_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct stmmac_priv *priv = from_timer(priv, t, eee_ctrl_timer);</div><div class='add'>+	struct stmmac_priv *priv = timer_container_of(priv, t, eee_ctrl_timer);</div><div class='ctx'> </div><div class='del'>-	if (stmmac_enable_eee_mode(priv))</div><div class='del'>-		mod_timer(&amp;priv-&gt;eee_ctrl_timer, STMMAC_LPI_T(priv-&gt;tx_lpi_timer));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * stmmac_eee_init - init EEE</div><div class='del'>- * @priv: driver private structure</div><div class='del'>- * Description:</div><div class='del'>- *  if the GMAC supports the EEE (from the HW cap reg) and the phy device</div><div class='del'>- *  can also manage EEE, this function enable the LPI state and start related</div><div class='del'>- *  timer.</div><div class='del'>- */</div><div class='del'>-bool stmmac_eee_init(struct stmmac_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int eee_tw_timer = priv-&gt;eee_tw_timer;</div><div class='del'>-</div><div class='del'>-	/* Check if MAC core supports the EEE feature. */</div><div class='del'>-	if (!priv-&gt;dma_cap.eee)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;priv-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* Check if it needs to be deactivated */</div><div class='del'>-	if (!priv-&gt;eee_active) {</div><div class='del'>-		if (priv-&gt;eee_enabled) {</div><div class='del'>-			netdev_dbg(priv-&gt;dev, "disable EEE\n");</div><div class='del'>-			stmmac_lpi_entry_timer_config(priv, 0);</div><div class='del'>-			del_timer_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='del'>-			stmmac_set_eee_timer(priv, priv-&gt;hw, 0, eee_tw_timer);</div><div class='del'>-			if (priv-&gt;hw-&gt;xpcs)</div><div class='del'>-				xpcs_config_eee(priv-&gt;hw-&gt;xpcs,</div><div class='del'>-						priv-&gt;plat-&gt;mult_fact_100ns,</div><div class='del'>-						false);</div><div class='del'>-		}</div><div class='del'>-		mutex_unlock(&amp;priv-&gt;lock);</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;eee_active &amp;&amp; !priv-&gt;eee_enabled) {</div><div class='del'>-		timer_setup(&amp;priv-&gt;eee_ctrl_timer, stmmac_eee_ctrl_timer, 0);</div><div class='del'>-		stmmac_set_eee_timer(priv, priv-&gt;hw, STMMAC_DEFAULT_LIT_LS,</div><div class='del'>-				     eee_tw_timer);</div><div class='del'>-		if (priv-&gt;hw-&gt;xpcs)</div><div class='del'>-			xpcs_config_eee(priv-&gt;hw-&gt;xpcs,</div><div class='del'>-					priv-&gt;plat-&gt;mult_fact_100ns,</div><div class='del'>-					true);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;plat-&gt;has_gmac4 &amp;&amp; priv-&gt;tx_lpi_timer &lt;= STMMAC_ET_MAX) {</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='del'>-		priv-&gt;tx_path_in_lpi_mode = false;</div><div class='del'>-		stmmac_lpi_entry_timer_config(priv, 1);</div><div class='del'>-	} else {</div><div class='del'>-		stmmac_lpi_entry_timer_config(priv, 0);</div><div class='del'>-		mod_timer(&amp;priv-&gt;eee_ctrl_timer,</div><div class='del'>-			  STMMAC_LPI_T(priv-&gt;tx_lpi_timer));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;priv-&gt;lock);</div><div class='del'>-	netdev_dbg(priv-&gt;dev, "Energy-Efficient Ethernet initialized\n");</div><div class='del'>-	return true;</div><div class='add'>+	stmmac_try_to_start_sw_lpi(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* stmmac_get_tx_hwtstamp - get HW TX timestamps</div><div class='hunk'>@@ -580,7 +493,7 @@ static void stmmac_get_rx_hwtstamp(struct stmmac_priv *priv, struct dma_desc *p,</div><div class='ctx'> 	if (!priv-&gt;hwts_rx_en)</div><div class='ctx'> 		return;</div><div class='ctx'> 	/* For GMAC4, the valid timestamp is from CTX next desc. */</div><div class='del'>-	if (priv-&gt;plat-&gt;has_gmac4 || priv-&gt;plat-&gt;has_xgmac)</div><div class='add'>+	if (dwmac_is_xmac(priv-&gt;plat-&gt;core_type))</div><div class='ctx'> 		desc = np;</div><div class='ctx'> </div><div class='ctx'> 	/* Check if timestamp is available */</div><div class='hunk'>@@ -598,21 +511,49 @@ static void stmmac_get_rx_hwtstamp(struct stmmac_priv *priv, struct dma_desc *p,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void stmmac_update_subsecond_increment(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	bool xmac = dwmac_is_xmac(priv-&gt;plat-&gt;core_type);</div><div class='add'>+	u32 sec_inc = 0;</div><div class='add'>+	u64 temp = 0;</div><div class='add'>+</div><div class='add'>+	stmmac_config_hw_tstamping(priv, priv-&gt;ptpaddr, priv-&gt;systime_flags);</div><div class='add'>+</div><div class='add'>+	/* program Sub Second Increment reg */</div><div class='add'>+	stmmac_config_sub_second_increment(priv, priv-&gt;ptpaddr,</div><div class='add'>+					   priv-&gt;plat-&gt;clk_ptp_rate,</div><div class='add'>+					   xmac, &amp;sec_inc);</div><div class='add'>+	temp = div_u64(1000000000ULL, sec_inc);</div><div class='add'>+</div><div class='add'>+	/* Store sub second increment for later use */</div><div class='add'>+	priv-&gt;sub_second_inc = sec_inc;</div><div class='add'>+</div><div class='add'>+	/* calculate default added value:</div><div class='add'>+	 * formula is :</div><div class='add'>+	 * addend = (2^32)/freq_div_ratio;</div><div class='add'>+	 * where, freq_div_ratio = 1e9ns/sec_inc</div><div class='add'>+	 */</div><div class='add'>+	temp = (u64)(temp &lt;&lt; 32);</div><div class='add'>+	priv-&gt;default_addend = div_u64(temp, priv-&gt;plat-&gt;clk_ptp_rate);</div><div class='add'>+	stmmac_config_addend(priv, priv-&gt;ptpaddr, priv-&gt;default_addend);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *  stmmac_hwtstamp_set - control hardware timestamping.</div><div class='ctx'>  *  @dev: device pointer.</div><div class='del'>- *  @ifr: An IOCTL specific structure, that can contain a pointer to</div><div class='del'>- *  a proprietary structure used to pass information to the driver.</div><div class='add'>+ *  @config: the timestamping configuration.</div><div class='add'>+ *  @extack: netlink extended ack structure for error reporting.</div><div class='ctx'>  *  Description:</div><div class='ctx'>  *  This function configures the MAC to enable/disable both outgoing(TX)</div><div class='ctx'>  *  and incoming(RX) packets time stamping based on user input.</div><div class='ctx'>  *  Return Value:</div><div class='ctx'>  *  0 on success and an appropriate -ve integer on failure.</div><div class='ctx'>  */</div><div class='del'>-static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+static int stmmac_hwtstamp_set(struct net_device *dev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='ctx'> 	u32 ptp_v2 = 0;</div><div class='ctx'> 	u32 tstamp_all = 0;</div><div class='ctx'> 	u32 ptp_over_ipv4_udp = 0;</div><div class='hunk'>@@ -623,34 +564,36 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 	u32 ts_event_en = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!(priv-&gt;dma_cap.time_stamp || priv-&gt;adv_ts)) {</div><div class='del'>-		netdev_alert(priv-&gt;dev, "No support for HW time stamping\n");</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "No support for HW time stamping");</div><div class='ctx'> 		priv-&gt;hwts_tx_en = 0;</div><div class='ctx'> 		priv-&gt;hwts_rx_en = 0;</div><div class='ctx'> </div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data,</div><div class='del'>-			   sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	if (!netif_running(dev)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot change timestamping configuration while down");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(priv-&gt;dev, "%s config flags:0x%x, tx_type:0x%x, rx_filter:0x%x\n",</div><div class='del'>-		   __func__, config.flags, config.tx_type, config.rx_filter);</div><div class='add'>+		   __func__, config-&gt;flags, config-&gt;tx_type, config-&gt;rx_filter);</div><div class='ctx'> </div><div class='del'>-	if (config.tx_type != HWTSTAMP_TX_OFF &amp;&amp;</div><div class='del'>-	    config.tx_type != HWTSTAMP_TX_ON)</div><div class='add'>+	if (config-&gt;tx_type != HWTSTAMP_TX_OFF &amp;&amp;</div><div class='add'>+	    config-&gt;tx_type != HWTSTAMP_TX_ON)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;adv_ts) {</div><div class='del'>-		switch (config.rx_filter) {</div><div class='add'>+		switch (config-&gt;rx_filter) {</div><div class='ctx'> 		case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 			/* time stamp no incoming packet at all */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='ctx'> 			/* PTP v1, UDP, any kind of event packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='ctx'> 			/* 'xmac' hardware can support Sync, Pdelay_Req and</div><div class='ctx'> 			 * Pdelay_resp by setting bit14 and bits17/16 to 01</div><div class='ctx'> 			 * This leaves Delay_Req timestamps out.</div><div class='hunk'>@@ -664,7 +607,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 		case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='ctx'> 			/* PTP v1, UDP, Sync packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_SYNC;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_SYNC;</div><div class='ctx'> 			/* take time stamp for SYNC messages only */</div><div class='ctx'> 			ts_event_en = PTP_TCR_TSEVNTENA;</div><div class='ctx'> </div><div class='hunk'>@@ -674,7 +617,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 		case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='ctx'> 			/* PTP v1, UDP, Delay_req packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ;</div><div class='ctx'> 			/* take time stamp for Delay_Req messages only */</div><div class='ctx'> 			ts_master_en = PTP_TCR_TSMSTRENA;</div><div class='ctx'> 			ts_event_en = PTP_TCR_TSEVNTENA;</div><div class='hunk'>@@ -685,7 +628,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 		case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='ctx'> 			/* PTP v2, UDP, any kind of event packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;</div><div class='ctx'> 			ptp_v2 = PTP_TCR_TSVER2ENA;</div><div class='ctx'> 			/* take time stamp for all event messages */</div><div class='ctx'> 			snap_type_sel = PTP_TCR_SNAPTYPSEL_1;</div><div class='hunk'>@@ -696,7 +639,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 		case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='ctx'> 			/* PTP v2, UDP, Sync packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_SYNC;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_SYNC;</div><div class='ctx'> 			ptp_v2 = PTP_TCR_TSVER2ENA;</div><div class='ctx'> 			/* take time stamp for SYNC messages only */</div><div class='ctx'> 			ts_event_en = PTP_TCR_TSEVNTENA;</div><div class='hunk'>@@ -707,7 +650,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 		case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='ctx'> 			/* PTP v2, UDP, Delay_req packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ;</div><div class='ctx'> 			ptp_v2 = PTP_TCR_TSVER2ENA;</div><div class='ctx'> 			/* take time stamp for Delay_Req messages only */</div><div class='ctx'> 			ts_master_en = PTP_TCR_TSMSTRENA;</div><div class='hunk'>@@ -719,7 +662,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 		case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='ctx'> 			/* PTP v2/802.AS1 any layer, any kind of event packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='ctx'> 			ptp_v2 = PTP_TCR_TSVER2ENA;</div><div class='ctx'> 			snap_type_sel = PTP_TCR_SNAPTYPSEL_1;</div><div class='ctx'> 			if (priv-&gt;synopsys_id &lt; DWMAC_CORE_4_10)</div><div class='hunk'>@@ -731,7 +674,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 		case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 			/* PTP v2/802.AS1, any layer, Sync packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_PTP_V2_SYNC;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_SYNC;</div><div class='ctx'> 			ptp_v2 = PTP_TCR_TSVER2ENA;</div><div class='ctx'> 			/* take time stamp for SYNC messages only */</div><div class='ctx'> 			ts_event_en = PTP_TCR_TSEVNTENA;</div><div class='hunk'>@@ -743,7 +686,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 		case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 			/* PTP v2/802.AS1, any layer, Delay_req packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_PTP_V2_DELAY_REQ;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_DELAY_REQ;</div><div class='ctx'> 			ptp_v2 = PTP_TCR_TSVER2ENA;</div><div class='ctx'> 			/* take time stamp for Delay_Req messages only */</div><div class='ctx'> 			ts_master_en = PTP_TCR_TSMSTRENA;</div><div class='hunk'>@@ -757,7 +700,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 		case HWTSTAMP_FILTER_NTP_ALL:</div><div class='ctx'> 		case HWTSTAMP_FILTER_ALL:</div><div class='ctx'> 			/* time stamp any incoming packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 			tstamp_all = PTP_TCR_TSENALL;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -765,20 +708,22 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 			return -ERANGE;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		switch (config.rx_filter) {</div><div class='add'>+		switch (config-&gt;rx_filter) {</div><div class='ctx'> 		case HWTSTAMP_FILTER_NONE:</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			/* PTP v1, UDP, any kind of event packet */</div><div class='del'>-			config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='add'>+			config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	priv-&gt;hwts_rx_en = ((config.rx_filter == HWTSTAMP_FILTER_NONE) ? 0 : 1);</div><div class='del'>-	priv-&gt;hwts_tx_en = config.tx_type == HWTSTAMP_TX_ON;</div><div class='add'>+	priv-&gt;hwts_rx_en = config-&gt;rx_filter != HWTSTAMP_FILTER_NONE;</div><div class='add'>+	priv-&gt;hwts_tx_en = config-&gt;tx_type == HWTSTAMP_TX_ON;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;systime_flags = STMMAC_HWTS_ACTIVE;</div><div class='add'>+	if (!priv-&gt;tsfupdt_coarse)</div><div class='add'>+		priv-&gt;systime_flags |= PTP_TCR_TSCFUPDT;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;hwts_tx_en || priv-&gt;hwts_rx_en) {</div><div class='ctx'> 		priv-&gt;systime_flags |= tstamp_all | ptp_v2 |</div><div class='hunk'>@@ -789,31 +734,30 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 	stmmac_config_hw_tstamping(priv, priv-&gt;ptpaddr, priv-&gt;systime_flags);</div><div class='ctx'> </div><div class='del'>-	memcpy(&amp;priv-&gt;tstamp_config, &amp;config, sizeof(config));</div><div class='add'>+	priv-&gt;tstamp_config = *config;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config,</div><div class='del'>-			    sizeof(config)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  *  stmmac_hwtstamp_get - read hardware timestamping.</div><div class='ctx'>  *  @dev: device pointer.</div><div class='del'>- *  @ifr: An IOCTL specific structure, that can contain a pointer to</div><div class='del'>- *  a proprietary structure used to pass information to the driver.</div><div class='add'>+ *  @config: the timestamping configuration.</div><div class='ctx'>  *  Description:</div><div class='ctx'>  *  This function obtain the current hardware timestamping settings</div><div class='ctx'>  *  as requested.</div><div class='ctx'>  */</div><div class='del'>-static int stmmac_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+static int stmmac_hwtstamp_get(struct net_device *dev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct hwtstamp_config *config = &amp;priv-&gt;tstamp_config;</div><div class='ctx'> </div><div class='ctx'> 	if (!(priv-&gt;dma_cap.time_stamp || priv-&gt;dma_cap.atime_stamp))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, config,</div><div class='del'>-			    sizeof(*config)) ? -EFAULT : 0;</div><div class='add'>+	*config = priv-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -826,36 +770,20 @@ static int stmmac_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'>  * Will be rerun after resuming from suspend, case in which the timestamping</div><div class='ctx'>  * flags updated by stmmac_hwtstamp_set() also need to be restored.</div><div class='ctx'>  */</div><div class='del'>-int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags)</div><div class='add'>+static int stmmac_init_tstamp_counter(struct stmmac_priv *priv,</div><div class='add'>+				      u32 systime_flags)</div><div class='ctx'> {</div><div class='del'>-	bool xmac = priv-&gt;plat-&gt;has_gmac4 || priv-&gt;plat-&gt;has_xgmac;</div><div class='ctx'> 	struct timespec64 now;</div><div class='del'>-	u32 sec_inc = 0;</div><div class='del'>-	u64 temp = 0;</div><div class='ctx'> </div><div class='del'>-	if (!(priv-&gt;dma_cap.time_stamp || priv-&gt;dma_cap.atime_stamp))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+	if (!priv-&gt;plat-&gt;clk_ptp_rate) {</div><div class='add'>+		netdev_err(priv-&gt;dev, "Invalid PTP clock rate");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	stmmac_config_hw_tstamping(priv, priv-&gt;ptpaddr, systime_flags);</div><div class='ctx'> 	priv-&gt;systime_flags = systime_flags;</div><div class='ctx'> </div><div class='del'>-	/* program Sub Second Increment reg */</div><div class='del'>-	stmmac_config_sub_second_increment(priv, priv-&gt;ptpaddr,</div><div class='del'>-					   priv-&gt;plat-&gt;clk_ptp_rate,</div><div class='del'>-					   xmac, &amp;sec_inc);</div><div class='del'>-	temp = div_u64(1000000000ULL, sec_inc);</div><div class='del'>-</div><div class='del'>-	/* Store sub second increment for later use */</div><div class='del'>-	priv-&gt;sub_second_inc = sec_inc;</div><div class='del'>-</div><div class='del'>-	/* calculate default added value:</div><div class='del'>-	 * formula is :</div><div class='del'>-	 * addend = (2^32)/freq_div_ratio;</div><div class='del'>-	 * where, freq_div_ratio = 1e9ns/sec_inc</div><div class='del'>-	 */</div><div class='del'>-	temp = (u64)(temp &lt;&lt; 32);</div><div class='del'>-	priv-&gt;default_addend = div_u64(temp, priv-&gt;plat-&gt;clk_ptp_rate);</div><div class='del'>-	stmmac_config_addend(priv, priv-&gt;ptpaddr, priv-&gt;default_addend);</div><div class='add'>+	stmmac_update_subsecond_increment(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* initialize system time */</div><div class='ctx'> 	ktime_get_real_ts64(&amp;now);</div><div class='hunk'>@@ -865,26 +793,33 @@ int stmmac_init_tstamp_counter(struct stmmac_priv *priv, u32 systime_flags)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(stmmac_init_tstamp_counter);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * stmmac_init_ptp - init PTP</div><div class='add'>+ * stmmac_init_timestamping - initialise timestamping</div><div class='ctx'>  * @priv: driver private structure</div><div class='ctx'>  * Description: this is to verify if the HW supports the PTPv1 or PTPv2.</div><div class='ctx'>  * This is done by looking at the HW cap. register.</div><div class='ctx'>  * This function also registers the ptp driver.</div><div class='ctx'>  */</div><div class='del'>-static int stmmac_init_ptp(struct stmmac_priv *priv)</div><div class='add'>+static int stmmac_init_timestamping(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	bool xmac = priv-&gt;plat-&gt;has_gmac4 || priv-&gt;plat-&gt;has_xgmac;</div><div class='add'>+	bool xmac = dwmac_is_xmac(priv-&gt;plat-&gt;core_type);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;plat-&gt;ptp_clk_freq_config)</div><div class='ctx'> 		priv-&gt;plat-&gt;ptp_clk_freq_config(priv);</div><div class='ctx'> </div><div class='del'>-	ret = stmmac_init_tstamp_counter(priv, STMMAC_HWTS_ACTIVE);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (!(priv-&gt;dma_cap.time_stamp || priv-&gt;dma_cap.atime_stamp)) {</div><div class='add'>+		netdev_info(priv-&gt;dev, "PTP not supported by HW\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = stmmac_init_tstamp_counter(priv, STMMAC_HWTS_ACTIVE |</div><div class='add'>+					       PTP_TCR_TSCFUPDT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_warn(priv-&gt;dev, "PTP init failed\n");</div><div class='ctx'> 		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;adv_ts = 0;</div><div class='ctx'> 	/* Check if adv_ts can be enabled for dwmac 4.x / xgmac core */</div><div class='hunk'>@@ -910,24 +845,40 @@ static int stmmac_init_ptp(struct stmmac_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void stmmac_setup_ptp(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;plat-&gt;clk_ptp_ref);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netdev_warn(priv-&gt;dev,</div><div class='add'>+			    "failed to enable PTP reference clock: %pe\n",</div><div class='add'>+			    ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	if (stmmac_init_timestamping(priv) == 0)</div><div class='add'>+		stmmac_ptp_register(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void stmmac_release_ptp(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	clk_disable_unprepare(priv-&gt;plat-&gt;clk_ptp_ref);</div><div class='ctx'> 	stmmac_ptp_unregister(priv);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;plat-&gt;clk_ptp_ref);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  *  stmmac_mac_flow_ctrl - Configure flow control in all queues</div><div class='ctx'>  *  @priv: driver private structure</div><div class='ctx'>  *  @duplex: duplex passed to the next function</div><div class='add'>+ *  @flow_ctrl: desired flow control modes</div><div class='ctx'>  *  Description: It is used for configuring the flow control in all queues</div><div class='ctx'>  */</div><div class='del'>-static void stmmac_mac_flow_ctrl(struct stmmac_priv *priv, u32 duplex)</div><div class='add'>+static void stmmac_mac_flow_ctrl(struct stmmac_priv *priv, u32 duplex,</div><div class='add'>+				 unsigned int flow_ctrl)</div><div class='ctx'> {</div><div class='ctx'> 	u32 tx_cnt = priv-&gt;plat-&gt;tx_queues_to_use;</div><div class='ctx'> </div><div class='del'>-	stmmac_flow_ctrl(priv, priv-&gt;hw, duplex, priv-&gt;flow_ctrl,</div><div class='del'>-			priv-&gt;pause, tx_cnt);</div><div class='add'>+	stmmac_flow_ctrl(priv, priv-&gt;hw, duplex, flow_ctrl, priv-&gt;pause_time,</div><div class='add'>+			 tx_cnt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned long stmmac_mac_get_caps(struct phylink_config *config,</div><div class='hunk'>@@ -958,6 +909,13 @@ static struct phylink_pcs *stmmac_mac_select_pcs(struct phylink_config *config,</div><div class='ctx'> 			return pcs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* The PCS control register is only relevant for SGMII, TBI and RTBI</div><div class='add'>+	 * modes. We no longer support TBI or RTBI, so only configure this</div><div class='add'>+	 * register when operating in SGMII mode with the integrated PCS.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;hw-&gt;pcs &amp; STMMAC_PCS_SGMII &amp;&amp; priv-&gt;integrated_pcs)</div><div class='add'>+		return &amp;priv-&gt;integrated_pcs-&gt;pcs;</div><div class='add'>+</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -967,19 +925,29 @@ static void stmmac_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='ctx'> 	/* Nothing to do, xpcs_config() handles everything */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int stmmac_mac_finish(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			     phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;plat-&gt;mac_finish)</div><div class='add'>+		priv-&gt;plat-&gt;mac_finish(ndev, priv-&gt;plat-&gt;bsp_priv, mode, interface);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void stmmac_mac_link_down(struct phylink_config *config,</div><div class='ctx'> 				 unsigned int mode, phy_interface_t interface)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(to_net_dev(config-&gt;dev));</div><div class='ctx'> </div><div class='ctx'> 	stmmac_mac_set(priv, priv-&gt;ioaddr, false);</div><div class='del'>-	priv-&gt;eee_active = false;</div><div class='del'>-	priv-&gt;tx_lpi_enabled = false;</div><div class='del'>-	priv-&gt;eee_enabled = stmmac_eee_init(priv);</div><div class='del'>-	stmmac_set_eee_pls(priv, priv-&gt;hw, false);</div><div class='add'>+	if (priv-&gt;dma_cap.eee)</div><div class='add'>+		stmmac_set_eee_pls(priv, priv-&gt;hw, false);</div><div class='ctx'> </div><div class='ctx'> 	if (stmmac_fpe_supported(priv))</div><div class='del'>-		stmmac_fpe_link_state_handle(priv, false);</div><div class='add'>+		ethtool_mmsv_link_state_handle(&amp;priv-&gt;fpe_cfg.mmsv, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void stmmac_mac_link_up(struct phylink_config *config,</div><div class='hunk'>@@ -989,7 +957,9 @@ static void stmmac_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 			       bool tx_pause, bool rx_pause)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(to_net_dev(config-&gt;dev));</div><div class='add'>+	unsigned int flow_ctrl;</div><div class='ctx'> 	u32 old_ctrl, ctrl;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if ((priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_SERDES_UP_AFTER_PHY_LINKUP) &amp;&amp;</div><div class='ctx'> 	    priv-&gt;plat-&gt;serdes_powerup)</div><div class='hunk'>@@ -1057,8 +1027,6 @@ static void stmmac_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;speed = speed;</div><div class='del'>-</div><div class='ctx'> 	if (priv-&gt;plat-&gt;fix_mac_speed)</div><div class='ctx'> 		priv-&gt;plat-&gt;fix_mac_speed(priv-&gt;plat-&gt;bsp_priv, speed, mode);</div><div class='ctx'> </div><div class='hunk'>@@ -1069,42 +1037,124 @@ static void stmmac_mac_link_up(struct phylink_config *config,</div><div class='ctx'> </div><div class='ctx'> 	/* Flow Control operation */</div><div class='ctx'> 	if (rx_pause &amp;&amp; tx_pause)</div><div class='del'>-		priv-&gt;flow_ctrl = FLOW_AUTO;</div><div class='add'>+		flow_ctrl = FLOW_AUTO;</div><div class='ctx'> 	else if (rx_pause &amp;&amp; !tx_pause)</div><div class='del'>-		priv-&gt;flow_ctrl = FLOW_RX;</div><div class='add'>+		flow_ctrl = FLOW_RX;</div><div class='ctx'> 	else if (!rx_pause &amp;&amp; tx_pause)</div><div class='del'>-		priv-&gt;flow_ctrl = FLOW_TX;</div><div class='add'>+		flow_ctrl = FLOW_TX;</div><div class='ctx'> 	else</div><div class='del'>-		priv-&gt;flow_ctrl = FLOW_OFF;</div><div class='add'>+		flow_ctrl = FLOW_OFF;</div><div class='ctx'> </div><div class='del'>-	stmmac_mac_flow_ctrl(priv, duplex);</div><div class='add'>+	stmmac_mac_flow_ctrl(priv, duplex, flow_ctrl);</div><div class='ctx'> </div><div class='ctx'> 	if (ctrl != old_ctrl)</div><div class='ctx'> 		writel(ctrl, priv-&gt;ioaddr + MAC_CTRL_REG);</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;plat-&gt;set_clk_tx_rate) {</div><div class='add'>+		ret = priv-&gt;plat-&gt;set_clk_tx_rate(priv-&gt;plat-&gt;bsp_priv,</div><div class='add'>+						priv-&gt;plat-&gt;clk_tx_i,</div><div class='add'>+						interface, speed);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			netdev_err(priv-&gt;dev,</div><div class='add'>+				   "failed to configure %s transmit clock for %dMbps: %pe\n",</div><div class='add'>+				   phy_modes(interface), speed, ERR_PTR(ret));</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	stmmac_mac_set(priv, priv-&gt;ioaddr, true);</div><div class='del'>-	if (phy &amp;&amp; priv-&gt;dma_cap.eee) {</div><div class='del'>-		priv-&gt;eee_active =</div><div class='del'>-			phy_init_eee(phy, !(priv-&gt;plat-&gt;flags &amp;</div><div class='del'>-				STMMAC_FLAG_RX_CLK_RUNS_IN_LPI)) &gt;= 0;</div><div class='del'>-		priv-&gt;eee_enabled = stmmac_eee_init(priv);</div><div class='del'>-		priv-&gt;tx_lpi_enabled = priv-&gt;eee_enabled;</div><div class='add'>+	if (priv-&gt;dma_cap.eee)</div><div class='ctx'> 		stmmac_set_eee_pls(priv, priv-&gt;hw, true);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (stmmac_fpe_supported(priv))</div><div class='del'>-		stmmac_fpe_link_state_handle(priv, true);</div><div class='add'>+		ethtool_mmsv_link_state_handle(&amp;priv-&gt;fpe_cfg.mmsv, true);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY)</div><div class='ctx'> 		stmmac_hwtstamp_correct_latency(priv, priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void stmmac_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(to_net_dev(config-&gt;dev));</div><div class='add'>+</div><div class='add'>+	priv-&gt;eee_active = false;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	priv-&gt;eee_enabled = false;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;dev, "disable EEE\n");</div><div class='add'>+	priv-&gt;eee_sw_timer_en = false;</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='add'>+	stmmac_set_lpi_mode(priv, priv-&gt;hw, STMMAC_LPI_DISABLE, false, 0);</div><div class='add'>+	priv-&gt;tx_path_in_lpi_mode = false;</div><div class='add'>+</div><div class='add'>+	stmmac_set_eee_timer(priv, priv-&gt;hw, 0, STMMAC_DEFAULT_TWT_LS);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stmmac_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,</div><div class='add'>+				    bool tx_clk_stop)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(to_net_dev(config-&gt;dev));</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_lpi_timer = timer;</div><div class='add'>+	priv-&gt;eee_active = true;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	priv-&gt;eee_enabled = true;</div><div class='add'>+</div><div class='add'>+	/* Update the transmit clock stop according to PHY capability if</div><div class='add'>+	 * the platform allows</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP)</div><div class='add'>+		priv-&gt;tx_lpi_clk_stop = tx_clk_stop;</div><div class='add'>+</div><div class='add'>+	stmmac_set_eee_timer(priv, priv-&gt;hw, STMMAC_DEFAULT_LIT_LS,</div><div class='add'>+			     STMMAC_DEFAULT_TWT_LS);</div><div class='add'>+</div><div class='add'>+	/* Try to cnfigure the hardware timer. */</div><div class='add'>+	ret = stmmac_set_lpi_mode(priv, priv-&gt;hw, STMMAC_LPI_TIMER,</div><div class='add'>+				  priv-&gt;tx_lpi_clk_stop, priv-&gt;tx_lpi_timer);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* Hardware timer mode not supported, or value out of range.</div><div class='add'>+		 * Fall back to using software LPI mode</div><div class='add'>+		 */</div><div class='add'>+		priv-&gt;eee_sw_timer_en = true;</div><div class='add'>+		stmmac_restart_sw_lpi_timer(priv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	netdev_dbg(priv-&gt;dev, "Energy-Efficient Ethernet initialized\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stmmac_mac_wol_set(struct phylink_config *config, u32 wolopts,</div><div class='add'>+			      const u8 *sopass)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(to_net_dev(config-&gt;dev));</div><div class='add'>+</div><div class='add'>+	device_set_wakeup_enable(priv-&gt;device, !!wolopts);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	priv-&gt;wolopts = wolopts;</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct phylink_mac_ops stmmac_phylink_mac_ops = {</div><div class='ctx'> 	.mac_get_caps = stmmac_mac_get_caps,</div><div class='ctx'> 	.mac_select_pcs = stmmac_mac_select_pcs,</div><div class='ctx'> 	.mac_config = stmmac_mac_config,</div><div class='add'>+	.mac_finish = stmmac_mac_finish,</div><div class='ctx'> 	.mac_link_down = stmmac_mac_link_down,</div><div class='ctx'> 	.mac_link_up = stmmac_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = stmmac_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = stmmac_mac_enable_tx_lpi,</div><div class='add'>+	.mac_wol_set = stmmac_mac_wol_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1116,18 +1166,26 @@ static const struct phylink_mac_ops stmmac_phylink_mac_ops = {</div><div class='ctx'>  */</div><div class='ctx'> static void stmmac_check_pcs_mode(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	int interface = priv-&gt;plat-&gt;mac_interface;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;dma_cap.pcs) {</div><div class='del'>-		if ((interface == PHY_INTERFACE_MODE_RGMII) ||</div><div class='del'>-		    (interface == PHY_INTERFACE_MODE_RGMII_ID) ||</div><div class='del'>-		    (interface == PHY_INTERFACE_MODE_RGMII_RXID) ||</div><div class='del'>-		    (interface == PHY_INTERFACE_MODE_RGMII_TXID)) {</div><div class='del'>-			netdev_dbg(priv-&gt;dev, "PCS RGMII support enabled\n");</div><div class='del'>-			priv-&gt;hw-&gt;pcs = STMMAC_PCS_RGMII;</div><div class='del'>-		} else if (interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='del'>-			netdev_dbg(priv-&gt;dev, "PCS SGMII support enabled\n");</div><div class='del'>-			priv-&gt;hw-&gt;pcs = STMMAC_PCS_SGMII;</div><div class='add'>+	int interface = priv-&gt;plat-&gt;phy_interface;</div><div class='add'>+	int speed = priv-&gt;plat-&gt;mac_port_sel_speed;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;dma_cap.pcs &amp;&amp; interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='add'>+		netdev_dbg(priv-&gt;dev, "PCS SGMII support enabled\n");</div><div class='add'>+		priv-&gt;hw-&gt;pcs = STMMAC_PCS_SGMII;</div><div class='add'>+</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case SPEED_10:</div><div class='add'>+		case SPEED_100:</div><div class='add'>+		case SPEED_1000:</div><div class='add'>+			priv-&gt;hw-&gt;reverse_sgmii_enable = true;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			dev_warn(priv-&gt;device, "invalid port speed\n");</div><div class='add'>+			fallthrough;</div><div class='add'>+		case 0:</div><div class='add'>+			priv-&gt;hw-&gt;reverse_sgmii_enable = false;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1143,13 +1201,19 @@ static void stmmac_check_pcs_mode(struct stmmac_priv *priv)</div><div class='ctx'> static int stmmac_init_phy(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='add'>+	int mode = priv-&gt;plat-&gt;phy_interface;</div><div class='ctx'> 	struct fwnode_handle *phy_fwnode;</div><div class='ctx'> 	struct fwnode_handle *fwnode;</div><div class='add'>+	struct ethtool_keee eee;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!phylink_expects_phy(priv-&gt;phylink))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;hw-&gt;xpcs &amp;&amp;</div><div class='add'>+	    xpcs_get_an_mode(priv-&gt;hw-&gt;xpcs, mode) == DW_AN_C73)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	fwnode = priv-&gt;plat-&gt;port_node;</div><div class='ctx'> 	if (!fwnode)</div><div class='ctx'> 		fwnode = dev_fwnode(priv-&gt;device);</div><div class='hunk'>@@ -1183,52 +1247,110 @@ static int stmmac_init_phy(struct net_device *dev)</div><div class='ctx'> 		ret = phylink_fwnode_phy_connect(priv-&gt;phylink, fwnode, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;plat-&gt;pmt) {</div><div class='del'>-		struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL };</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(priv-&gt;dev, "cannot attach to PHY (error: %pe)\n",</div><div class='add'>+			   ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		phylink_ethtool_get_wol(priv-&gt;phylink, &amp;wol);</div><div class='del'>-		device_set_wakeup_capable(priv-&gt;device, !!wol.supported);</div><div class='del'>-		device_set_wakeup_enable(priv-&gt;device, !!wol.wolopts);</div><div class='add'>+	/* Configure phylib's copy of the LPI timer. Normally,</div><div class='add'>+	 * phylink_config.lpi_timer_default would do this, but there is a</div><div class='add'>+	 * chance that userspace could change the eee_timer setting via sysfs</div><div class='add'>+	 * before the first open. Thus, preserve existing behaviour.</div><div class='add'>+	 */</div><div class='add'>+	if (!phylink_ethtool_get_eee(priv-&gt;phylink, &amp;eee)) {</div><div class='add'>+		eee.tx_lpi_timer = priv-&gt;tx_lpi_timer;</div><div class='add'>+		phylink_ethtool_set_eee(priv-&gt;phylink, &amp;eee);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int stmmac_phy_setup(struct stmmac_priv *priv)</div><div class='add'>+static int stmmac_phylink_setup(struct stmmac_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_mdio_bus_data *mdio_bus_data;</div><div class='del'>-	int mode = priv-&gt;plat-&gt;phy_interface;</div><div class='add'>+	struct phylink_config *config;</div><div class='ctx'> 	struct fwnode_handle *fwnode;</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='ctx'> 	struct phylink *phylink;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;phylink_config.dev = &amp;priv-&gt;dev-&gt;dev;</div><div class='del'>-	priv-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='del'>-	priv-&gt;phylink_config.mac_managed_pm = true;</div><div class='add'>+	config = &amp;priv-&gt;phylink_config;</div><div class='add'>+</div><div class='add'>+	config-&gt;dev = &amp;priv-&gt;dev-&gt;dev;</div><div class='add'>+	config-&gt;type = PHYLINK_NETDEV;</div><div class='add'>+	config-&gt;mac_managed_pm = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Stmmac always requires an RX clock for hardware initialization */</div><div class='del'>-	priv-&gt;phylink_config.mac_requires_rxc = true;</div><div class='add'>+	config-&gt;mac_requires_rxc = true;</div><div class='add'>+</div><div class='add'>+	/* Disable EEE RX clock stop to ensure VLAN register access works</div><div class='add'>+	 * correctly.</div><div class='add'>+	 */</div><div class='add'>+	if (!(priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_RX_CLK_RUNS_IN_LPI) &amp;&amp;</div><div class='add'>+	    !(priv-&gt;dev-&gt;features &amp; NETIF_F_VLAN_FEATURES))</div><div class='add'>+		config-&gt;eee_rx_clk_stop_enable = true;</div><div class='add'>+</div><div class='add'>+	/* Set the default transmit clock stop bit based on the platform glue */</div><div class='add'>+	priv-&gt;tx_lpi_clk_stop = priv-&gt;plat-&gt;flags &amp;</div><div class='add'>+				STMMAC_FLAG_EN_TX_LPI_CLOCKGATING;</div><div class='ctx'> </div><div class='ctx'> 	mdio_bus_data = priv-&gt;plat-&gt;mdio_bus_data;</div><div class='ctx'> 	if (mdio_bus_data)</div><div class='del'>-		priv-&gt;phylink_config.default_an_inband =</div><div class='del'>-			mdio_bus_data-&gt;default_an_inband;</div><div class='add'>+		config-&gt;default_an_inband = mdio_bus_data-&gt;default_an_inband;</div><div class='add'>+</div><div class='add'>+	/* Get the PHY interface modes (at the PHY end of the link) that</div><div class='add'>+	 * are supported by the platform.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;plat-&gt;get_interfaces)</div><div class='add'>+		priv-&gt;plat-&gt;get_interfaces(priv, priv-&gt;plat-&gt;bsp_priv,</div><div class='add'>+					   config-&gt;supported_interfaces);</div><div class='ctx'> </div><div class='del'>-	/* Set the platform/firmware specified interface mode. Note, phylink</div><div class='del'>-	 * deals with the PHY interface mode, not the MAC interface mode.</div><div class='add'>+	/* Set the platform/firmware specified interface mode if the</div><div class='add'>+	 * supported interfaces have not already been provided using</div><div class='add'>+	 * phy_interface as a last resort.</div><div class='ctx'> 	 */</div><div class='del'>-	__set_bit(mode, priv-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	if (phy_interface_empty(config-&gt;supported_interfaces))</div><div class='add'>+		__set_bit(priv-&gt;plat-&gt;phy_interface,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='ctx'> </div><div class='ctx'> 	/* If we have an xpcs, it defines which PHY interfaces are supported. */</div><div class='ctx'> 	if (priv-&gt;hw-&gt;xpcs)</div><div class='del'>-		xpcs_get_interfaces(priv-&gt;hw-&gt;xpcs,</div><div class='del'>-				    priv-&gt;phylink_config.supported_interfaces);</div><div class='add'>+		pcs = xpcs_to_phylink_pcs(priv-&gt;hw-&gt;xpcs);</div><div class='add'>+	else</div><div class='add'>+		pcs = priv-&gt;hw-&gt;phylink_pcs;</div><div class='add'>+</div><div class='add'>+	if (pcs)</div><div class='add'>+		phy_interface_or(config-&gt;supported_interfaces,</div><div class='add'>+				 config-&gt;supported_interfaces,</div><div class='add'>+				 pcs-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;dma_cap.eee) {</div><div class='add'>+		/* Assume all supported interfaces also support LPI */</div><div class='add'>+		memcpy(config-&gt;lpi_interfaces, config-&gt;supported_interfaces,</div><div class='add'>+		       sizeof(config-&gt;lpi_interfaces));</div><div class='add'>+</div><div class='add'>+		/* All full duplex speeds above 100Mbps are supported */</div><div class='add'>+		config-&gt;lpi_capabilities = ~(MAC_1000FD - 1) | MAC_100FD;</div><div class='add'>+		config-&gt;lpi_timer_default = eee_timer * 1000;</div><div class='add'>+		config-&gt;eee_enabled_default = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;wol_phy_speed_ctrl = true;</div><div class='add'>+	if (priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_USE_PHY_WOL) {</div><div class='add'>+		config-&gt;wol_phy_legacy = true;</div><div class='add'>+	} else {</div><div class='add'>+		if (priv-&gt;dma_cap.pmt_remote_wake_up)</div><div class='add'>+			config-&gt;wol_mac_support |= WAKE_UCAST;</div><div class='add'>+		if (priv-&gt;dma_cap.pmt_magic_frame)</div><div class='add'>+			config-&gt;wol_mac_support |= WAKE_MAGIC;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	fwnode = priv-&gt;plat-&gt;port_node;</div><div class='ctx'> 	if (!fwnode)</div><div class='ctx'> 		fwnode = dev_fwnode(priv-&gt;device);</div><div class='ctx'> </div><div class='del'>-	phylink = phylink_create(&amp;priv-&gt;phylink_config, fwnode,</div><div class='del'>-				 mode, &amp;stmmac_phylink_mac_ops);</div><div class='add'>+	phylink = phylink_create(config, fwnode, priv-&gt;plat-&gt;phy_interface,</div><div class='add'>+				 &amp;stmmac_phylink_mac_ops);</div><div class='ctx'> 	if (IS_ERR(phylink))</div><div class='ctx'> 		return PTR_ERR(phylink);</div><div class='ctx'> </div><div class='hunk'>@@ -1304,9 +1426,17 @@ static void stmmac_display_rings(struct stmmac_priv *priv,</div><div class='ctx'> 	stmmac_display_tx_rings(priv, dma_conf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int stmmac_set_bfsize(int mtu, int bufsize)</div><div class='add'>+static unsigned int stmmac_rx_offset(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (stmmac_xdp_is_enabled(priv))</div><div class='add'>+		return XDP_PACKET_HEADROOM;</div><div class='add'>+</div><div class='add'>+	return NET_SKB_PAD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stmmac_set_bfsize(int mtu)</div><div class='ctx'> {</div><div class='del'>-	int ret = bufsize;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (mtu &gt;= BUF_SIZE_8KiB)</div><div class='ctx'> 		ret = BUF_SIZE_16KiB;</div><div class='hunk'>@@ -1435,7 +1565,7 @@ static int stmmac_init_rx_buffers(struct stmmac_priv *priv,</div><div class='ctx'> 		buf-&gt;page_offset = stmmac_rx_offset(priv);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;sph &amp;&amp; !buf-&gt;sec_page) {</div><div class='add'>+	if (priv-&gt;sph_active &amp;&amp; !buf-&gt;sec_page) {</div><div class='ctx'> 		buf-&gt;sec_page = page_pool_alloc_pages(rx_q-&gt;page_pool, gfp);</div><div class='ctx'> 		if (!buf-&gt;sec_page)</div><div class='ctx'> 			return -ENOMEM;</div><div class='hunk'>@@ -2000,22 +2130,31 @@ static int __alloc_dma_rx_desc_resources(struct stmmac_priv *priv,</div><div class='ctx'> 	struct stmmac_channel *ch = &amp;priv-&gt;channel[queue];</div><div class='ctx'> 	bool xdp_prog = stmmac_xdp_is_enabled(priv);</div><div class='ctx'> 	struct page_pool_params pp_params = { 0 };</div><div class='del'>-	unsigned int num_pages;</div><div class='add'>+	unsigned int dma_buf_sz_pad, num_pages;</div><div class='ctx'> 	unsigned int napi_id;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	dma_buf_sz_pad = stmmac_rx_offset(priv) + dma_conf-&gt;dma_buf_sz +</div><div class='add'>+			 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='add'>+	num_pages = DIV_ROUND_UP(dma_buf_sz_pad, PAGE_SIZE);</div><div class='add'>+</div><div class='ctx'> 	rx_q-&gt;queue_index = queue;</div><div class='ctx'> 	rx_q-&gt;priv_data = priv;</div><div class='add'>+	rx_q-&gt;napi_skb_frag_size = num_pages * PAGE_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	pp_params.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;</div><div class='ctx'> 	pp_params.pool_size = dma_conf-&gt;dma_rx_size;</div><div class='del'>-	num_pages = DIV_ROUND_UP(dma_conf-&gt;dma_buf_sz, PAGE_SIZE);</div><div class='del'>-	pp_params.order = ilog2(num_pages);</div><div class='add'>+	pp_params.order = order_base_2(num_pages);</div><div class='ctx'> 	pp_params.nid = dev_to_node(priv-&gt;device);</div><div class='ctx'> 	pp_params.dev = priv-&gt;device;</div><div class='ctx'> 	pp_params.dma_dir = xdp_prog ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE;</div><div class='ctx'> 	pp_params.offset = stmmac_rx_offset(priv);</div><div class='del'>-	pp_params.max_len = STMMAC_MAX_RX_BUF_SIZE(num_pages);</div><div class='add'>+	pp_params.max_len = dma_conf-&gt;dma_buf_sz;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;sph_active) {</div><div class='add'>+		pp_params.offset = 0;</div><div class='add'>+		pp_params.max_len += stmmac_rx_offset(priv);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	rx_q-&gt;page_pool = page_pool_create(&amp;pp_params);</div><div class='ctx'> 	if (IS_ERR(rx_q-&gt;page_pool)) {</div><div class='hunk'>@@ -2353,7 +2492,7 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv)</div><div class='ctx'> 		txfifosz = priv-&gt;dma_cap.tx_fifo_size;</div><div class='ctx'> </div><div class='ctx'> 	/* Split up the shared Tx/Rx FIFO memory on DW QoS Eth and DW XGMAC */</div><div class='del'>-	if (priv-&gt;plat-&gt;has_gmac4 || priv-&gt;plat-&gt;has_xgmac) {</div><div class='add'>+	if (dwmac_is_xmac(priv-&gt;plat-&gt;core_type)) {</div><div class='ctx'> 		rxfifosz /= rx_channels_count;</div><div class='ctx'> 		txfifosz /= tx_channels_count;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2442,9 +2581,20 @@ static u64 stmmac_xsk_fill_timestamp(void *_priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void stmmac_xsk_request_launch_time(u64 launch_time, void *_priv)</div><div class='add'>+{</div><div class='add'>+	struct timespec64 ts = ns_to_timespec64(launch_time);</div><div class='add'>+	struct stmmac_metadata_request *meta_req = _priv;</div><div class='add'>+</div><div class='add'>+	if (meta_req-&gt;tbs &amp; STMMAC_TBS_EN)</div><div class='add'>+		stmmac_set_desc_tbs(meta_req-&gt;priv, meta_req-&gt;edesc, ts.tv_sec,</div><div class='add'>+				    ts.tv_nsec);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct xsk_tx_metadata_ops stmmac_xsk_tx_metadata_ops = {</div><div class='ctx'> 	.tmo_request_timestamp		= stmmac_xsk_request_timestamp,</div><div class='ctx'> 	.tmo_fill_timestamp		= stmmac_xsk_fill_timestamp,</div><div class='add'>+	.tmo_request_launch_time	= stmmac_xsk_request_launch_time,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)</div><div class='hunk'>@@ -2452,6 +2602,7 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)</div><div class='ctx'> 	struct netdev_queue *nq = netdev_get_tx_queue(priv-&gt;dev, queue);</div><div class='ctx'> 	struct stmmac_tx_queue *tx_q = &amp;priv-&gt;dma_conf.tx_queue[queue];</div><div class='ctx'> 	struct stmmac_txq_stats *txq_stats = &amp;priv-&gt;xstats.txq_stats[queue];</div><div class='add'>+	bool csum = !priv-&gt;plat-&gt;tx_queues_cfg[queue].coe_unsupported;</div><div class='ctx'> 	struct xsk_buff_pool *pool = tx_q-&gt;xsk_pool;</div><div class='ctx'> 	unsigned int entry = tx_q-&gt;cur_tx;</div><div class='ctx'> 	struct dma_desc *tx_desc = NULL;</div><div class='hunk'>@@ -2464,7 +2615,7 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)</div><div class='ctx'> </div><div class='ctx'> 	budget = min(budget, stmmac_tx_avail(priv, queue));</div><div class='ctx'> </div><div class='del'>-	while (budget-- &gt; 0) {</div><div class='add'>+	for (; budget &gt; 0; budget--) {</div><div class='ctx'> 		struct stmmac_metadata_request meta_req;</div><div class='ctx'> 		struct xsk_tx_metadata *meta = NULL;</div><div class='ctx'> 		dma_addr_t dma_addr;</div><div class='hunk'>@@ -2528,6 +2679,8 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)</div><div class='ctx'> 		meta_req.priv = priv;</div><div class='ctx'> 		meta_req.tx_desc = tx_desc;</div><div class='ctx'> 		meta_req.set_ic = &amp;set_ic;</div><div class='add'>+		meta_req.tbs = tx_q-&gt;tbs;</div><div class='add'>+		meta_req.edesc = &amp;tx_q-&gt;dma_entx[entry];</div><div class='ctx'> 		xsk_tx_metadata_request(meta, &amp;stmmac_xsk_tx_metadata_ops,</div><div class='ctx'> 					&amp;meta_req);</div><div class='ctx'> 		if (set_ic) {</div><div class='hunk'>@@ -2537,7 +2690,7 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		stmmac_prepare_tx_desc(priv, tx_desc, 1, xdp_desc.len,</div><div class='del'>-				       true, priv-&gt;mode, true, true,</div><div class='add'>+				       csum, priv-&gt;mode, true, true,</div><div class='ctx'> 				       xdp_desc.len);</div><div class='ctx'> </div><div class='ctx'> 		stmmac_enable_dma_transmission(priv, priv-&gt;ioaddr, queue);</div><div class='hunk'>@@ -2754,11 +2907,8 @@ static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue,</div><div class='ctx'> 			xmits = budget;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;eee_enabled &amp;&amp; !priv-&gt;tx_path_in_lpi_mode &amp;&amp;</div><div class='del'>-	    priv-&gt;eee_sw_timer_en) {</div><div class='del'>-		if (stmmac_enable_eee_mode(priv))</div><div class='del'>-			mod_timer(&amp;priv-&gt;eee_ctrl_timer, STMMAC_LPI_T(priv-&gt;tx_lpi_timer));</div><div class='del'>-	}</div><div class='add'>+	if (priv-&gt;eee_sw_timer_en &amp;&amp; !priv-&gt;tx_path_in_lpi_mode)</div><div class='add'>+		stmmac_restart_sw_lpi_timer(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* We still have pending packets, let's call for a new scheduling */</div><div class='ctx'> 	if (tx_q-&gt;dirty_tx != tx_q-&gt;cur_tx)</div><div class='hunk'>@@ -2974,6 +3124,56 @@ static void stmmac_check_ether_addr(struct stmmac_priv *priv)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int stmmac_get_phy_intf_sel(phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	int phy_intf_sel = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_MII ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_GMII)</div><div class='add'>+		phy_intf_sel = PHY_INTF_SEL_GMII_MII;</div><div class='add'>+	else if (phy_interface_mode_is_rgmii(interface))</div><div class='add'>+		phy_intf_sel = PHY_INTF_SEL_RGMII;</div><div class='add'>+	else if (interface == PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		phy_intf_sel = PHY_INTF_SEL_SGMII;</div><div class='add'>+	else if (interface == PHY_INTERFACE_MODE_RMII)</div><div class='add'>+		phy_intf_sel = PHY_INTF_SEL_RMII;</div><div class='add'>+	else if (interface == PHY_INTERFACE_MODE_REVMII)</div><div class='add'>+		phy_intf_sel = PHY_INTF_SEL_REVMII;</div><div class='add'>+</div><div class='add'>+	return phy_intf_sel;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stmmac_get_phy_intf_sel);</div><div class='add'>+</div><div class='add'>+static int stmmac_prereset_configure(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat = priv-&gt;plat;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	int phy_intf_sel, ret;</div><div class='add'>+</div><div class='add'>+	if (!plat_dat-&gt;set_phy_intf_sel)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	interface = plat_dat-&gt;phy_interface;</div><div class='add'>+	phy_intf_sel = stmmac_get_phy_intf_sel(interface);</div><div class='add'>+	if (phy_intf_sel &lt; 0) {</div><div class='add'>+		netdev_err(priv-&gt;dev,</div><div class='add'>+			   "failed to get phy_intf_sel for %s: %pe\n",</div><div class='add'>+			   phy_modes(interface), ERR_PTR(phy_intf_sel));</div><div class='add'>+		return phy_intf_sel;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = plat_dat-&gt;set_phy_intf_sel(plat_dat-&gt;bsp_priv, phy_intf_sel);</div><div class='add'>+	if (ret == -EINVAL)</div><div class='add'>+		netdev_err(priv-&gt;dev, "platform does not support %s\n",</div><div class='add'>+			   phy_modes(interface));</div><div class='add'>+	else if (ret &lt; 0)</div><div class='add'>+		netdev_err(priv-&gt;dev,</div><div class='add'>+			   "platform failed to set interface %s: %pe\n",</div><div class='add'>+			   phy_modes(interface), ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * stmmac_init_dma_engine - DMA init.</div><div class='ctx'>  * @priv: driver private structure</div><div class='hunk'>@@ -2993,16 +3193,20 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;plat-&gt;dma_cfg || !priv-&gt;plat-&gt;dma_cfg-&gt;pbl) {</div><div class='del'>-		dev_err(priv-&gt;device, "Invalid DMA configuration\n");</div><div class='add'>+		netdev_err(priv-&gt;dev, "Invalid DMA configuration\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;extend_desc &amp;&amp; (priv-&gt;mode == STMMAC_RING_MODE))</div><div class='ctx'> 		priv-&gt;plat-&gt;dma_cfg-&gt;atds = 1;</div><div class='ctx'> </div><div class='del'>-	ret = stmmac_reset(priv, priv-&gt;ioaddr);</div><div class='add'>+	ret = stmmac_prereset_configure(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = stmmac_reset(priv);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_err(priv-&gt;device, "Failed to reset the dma\n");</div><div class='add'>+		netdev_err(priv-&gt;dev, "Failed to reset the dma\n");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3120,8 +3324,7 @@ static void stmmac_init_coalesce(struct stmmac_priv *priv)</div><div class='ctx'> 		priv-&gt;tx_coal_frames[chan] = STMMAC_TX_FRAMES;</div><div class='ctx'> 		priv-&gt;tx_coal_timer[chan] = STMMAC_COAL_TX_TIMER;</div><div class='ctx'> </div><div class='del'>-		hrtimer_init(&amp;tx_q-&gt;txtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-		tx_q-&gt;txtimer.function = stmmac_tx_timer;</div><div class='add'>+		hrtimer_setup(&amp;tx_q-&gt;txtimer, stmmac_tx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (chan = 0; chan &lt; rx_channel_count; chan++)</div><div class='hunk'>@@ -3346,7 +3549,6 @@ static void stmmac_safety_feat_configuration(struct stmmac_priv *priv)</div><div class='ctx'> /**</div><div class='ctx'>  * stmmac_hw_setup - setup mac in a usable state.</div><div class='ctx'>  *  @dev : pointer to the device structure.</div><div class='del'>- *  @ptp_register: register PTP if set</div><div class='ctx'>  *  Description:</div><div class='ctx'>  *  this is the main function to setup the HW in a usable state because the</div><div class='ctx'>  *  dma engine is reset, the core registers are configured (e.g. AXI,</div><div class='hunk'>@@ -3356,7 +3558,7 @@ static void stmmac_safety_feat_configuration(struct stmmac_priv *priv)</div><div class='ctx'>  *  0 on success and an appropriate (-)ve integer as defined in errno.h</div><div class='ctx'>  *  file on failure.</div><div class='ctx'>  */</div><div class='del'>-static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)</div><div class='add'>+static int stmmac_hw_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	u32 rx_cnt = priv-&gt;plat-&gt;rx_queues_to_use;</div><div class='hunk'>@@ -3369,9 +3571,18 @@ static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)</div><div class='ctx'> 	if (priv-&gt;hw-&gt;phylink_pcs)</div><div class='ctx'> 		phylink_pcs_pre_init(priv-&gt;phylink, priv-&gt;hw-&gt;phylink_pcs);</div><div class='ctx'> </div><div class='add'>+	/* Note that clk_rx_i must be running for reset to complete. This</div><div class='add'>+	 * clock may also be required when setting the MAC address.</div><div class='add'>+	 *</div><div class='add'>+	 * Block the receive clock stop for LPI mode at the PHY in case</div><div class='add'>+	 * the link is established with EEE mode active.</div><div class='add'>+	 */</div><div class='add'>+	phylink_rx_clk_stop_block(priv-&gt;phylink);</div><div class='add'>+</div><div class='ctx'> 	/* DMA initialization and SW reset */</div><div class='ctx'> 	ret = stmmac_init_dma_engine(priv);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='add'>+		phylink_rx_clk_stop_unblock(priv-&gt;phylink);</div><div class='ctx'> 		netdev_err(priv-&gt;dev, "%s: DMA engine initialization failed\n",</div><div class='ctx'> 			   __func__);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -3379,19 +3590,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)</div><div class='ctx'> </div><div class='ctx'> 	/* Copy the MAC addr into the HW  */</div><div class='ctx'> 	stmmac_set_umac_addr(priv, priv-&gt;hw, dev-&gt;dev_addr, 0);</div><div class='del'>-</div><div class='del'>-	/* PS and related bits will be programmed according to the speed */</div><div class='del'>-	if (priv-&gt;hw-&gt;pcs) {</div><div class='del'>-		int speed = priv-&gt;plat-&gt;mac_port_sel_speed;</div><div class='del'>-</div><div class='del'>-		if ((speed == SPEED_10) || (speed == SPEED_100) ||</div><div class='del'>-		    (speed == SPEED_1000)) {</div><div class='del'>-			priv-&gt;hw-&gt;ps = speed;</div><div class='del'>-		} else {</div><div class='del'>-			dev_warn(priv-&gt;device, "invalid port speed\n");</div><div class='del'>-			priv-&gt;hw-&gt;ps = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	phylink_rx_clk_stop_unblock(priv-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the MAC Core */</div><div class='ctx'> 	stmmac_core_init(priv, priv-&gt;hw, dev);</div><div class='hunk'>@@ -3417,28 +3616,6 @@ static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)</div><div class='ctx'> </div><div class='ctx'> 	stmmac_mmc_setup(priv);</div><div class='ctx'> </div><div class='del'>-	if (ptp_register) {</div><div class='del'>-		ret = clk_prepare_enable(priv-&gt;plat-&gt;clk_ptp_ref);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			netdev_warn(priv-&gt;dev,</div><div class='del'>-				    "failed to enable PTP reference clock: %pe\n",</div><div class='del'>-				    ERR_PTR(ret));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = stmmac_init_ptp(priv);</div><div class='del'>-	if (ret == -EOPNOTSUPP)</div><div class='del'>-		netdev_info(priv-&gt;dev, "PTP not supported by HW\n");</div><div class='del'>-	else if (ret)</div><div class='del'>-		netdev_warn(priv-&gt;dev, "PTP init failed\n");</div><div class='del'>-	else if (ptp_register)</div><div class='del'>-		stmmac_ptp_register(priv);</div><div class='del'>-</div><div class='del'>-	priv-&gt;eee_tw_timer = STMMAC_DEFAULT_TWT_LS;</div><div class='del'>-</div><div class='del'>-	/* Convert the timer from msec to usec */</div><div class='del'>-	if (!priv-&gt;tx_lpi_timer)</div><div class='del'>-		priv-&gt;tx_lpi_timer = eee_timer * 1000;</div><div class='del'>-</div><div class='ctx'> 	if (priv-&gt;use_riwt) {</div><div class='ctx'> 		u32 queue;</div><div class='ctx'> </div><div class='hunk'>@@ -3451,9 +3628,6 @@ static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;hw-&gt;pcs)</div><div class='del'>-		stmmac_pcs_ctrl_ane(priv, priv-&gt;ioaddr, 1, priv-&gt;hw-&gt;ps, 0);</div><div class='del'>-</div><div class='ctx'> 	/* set TX and RX rings length */</div><div class='ctx'> 	stmmac_set_rings_length(priv);</div><div class='ctx'> </div><div class='hunk'>@@ -3471,7 +3645,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable Split Header */</div><div class='del'>-	sph_en = (priv-&gt;hw-&gt;rx_csum &gt; 0) &amp;&amp; priv-&gt;sph;</div><div class='add'>+	sph_en = (priv-&gt;hw-&gt;rx_csum &gt; 0) &amp;&amp; priv-&gt;sph_active;</div><div class='ctx'> 	for (chan = 0; chan &lt; rx_cnt; chan++)</div><div class='ctx'> 		stmmac_enable_sph(priv, priv-&gt;ioaddr, sph_en, chan);</div><div class='ctx'> </div><div class='hunk'>@@ -3495,18 +3669,13 @@ static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)</div><div class='ctx'> 	/* Start the ball rolling... */</div><div class='ctx'> 	stmmac_start_all_dma(priv);</div><div class='ctx'> </div><div class='add'>+	phylink_rx_clk_stop_block(priv-&gt;phylink);</div><div class='ctx'> 	stmmac_set_hw_vlan_mode(priv, priv-&gt;hw);</div><div class='add'>+	phylink_rx_clk_stop_unblock(priv-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void stmmac_hw_teardown(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	clk_disable_unprepare(priv-&gt;plat-&gt;clk_ptp_ref);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void stmmac_free_irq(struct net_device *dev,</div><div class='ctx'> 			    enum request_irq_err irq_err, int irq_idx)</div><div class='ctx'> {</div><div class='hunk'>@@ -3567,7 +3736,6 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	enum request_irq_err irq_err;</div><div class='del'>-	cpumask_t cpu_mask;</div><div class='ctx'> 	int irq_idx = 0;</div><div class='ctx'> 	char *int_name;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -3589,7 +3757,6 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev)</div><div class='ctx'> 	/* Request the Wake IRQ in case of another line</div><div class='ctx'> 	 * is used for WoL</div><div class='ctx'> 	 */</div><div class='del'>-	priv-&gt;wol_irq_disabled = true;</div><div class='ctx'> 	if (priv-&gt;wol_irq &gt; 0 &amp;&amp; priv-&gt;wol_irq != dev-&gt;irq) {</div><div class='ctx'> 		int_name = priv-&gt;int_name_wol;</div><div class='ctx'> 		sprintf(int_name, "%s:%s", dev-&gt;name, "wol");</div><div class='hunk'>@@ -3696,9 +3863,8 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev)</div><div class='ctx'> 			irq_idx = i;</div><div class='ctx'> 			goto irq_error;</div><div class='ctx'> 		}</div><div class='del'>-		cpumask_clear(&amp;cpu_mask);</div><div class='del'>-		cpumask_set_cpu(i % num_online_cpus(), &amp;cpu_mask);</div><div class='del'>-		irq_set_affinity_hint(priv-&gt;rx_irq[i], &amp;cpu_mask);</div><div class='add'>+		irq_set_affinity_hint(priv-&gt;rx_irq[i],</div><div class='add'>+				      cpumask_of(i % num_online_cpus()));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Request Tx MSI irq */</div><div class='hunk'>@@ -3721,9 +3887,8 @@ static int stmmac_request_irq_multi_msi(struct net_device *dev)</div><div class='ctx'> 			irq_idx = i;</div><div class='ctx'> 			goto irq_error;</div><div class='ctx'> 		}</div><div class='del'>-		cpumask_clear(&amp;cpu_mask);</div><div class='del'>-		cpumask_set_cpu(i % num_online_cpus(), &amp;cpu_mask);</div><div class='del'>-		irq_set_affinity_hint(priv-&gt;tx_irq[i], &amp;cpu_mask);</div><div class='add'>+		irq_set_affinity_hint(priv-&gt;tx_irq[i],</div><div class='add'>+				      cpumask_of(i % num_online_cpus()));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3835,12 +4000,13 @@ stmmac_setup_dma_desc(struct stmmac_priv *priv, unsigned int mtu)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Returns 0 or BUF_SIZE_16KiB if mtu &gt; 8KiB and dwmac4 or ring mode */</div><div class='ctx'> 	bfsize = stmmac_set_16kib_bfsize(priv, mtu);</div><div class='ctx'> 	if (bfsize &lt; 0)</div><div class='ctx'> 		bfsize = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (bfsize &lt; BUF_SIZE_16KiB)</div><div class='del'>-		bfsize = stmmac_set_bfsize(mtu, 0);</div><div class='add'>+		bfsize = stmmac_set_bfsize(mtu);</div><div class='ctx'> </div><div class='ctx'> 	dma_conf-&gt;dma_buf_sz = bfsize;</div><div class='ctx'> 	/* Chose the tx/rx size from the already defined one in the</div><div class='hunk'>@@ -3900,28 +4066,9 @@ static int __stmmac_open(struct net_device *dev,</div><div class='ctx'> 			 struct stmmac_dma_conf *dma_conf)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='del'>-	int mode = priv-&gt;plat-&gt;phy_interface;</div><div class='ctx'> 	u32 chan;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = pm_runtime_resume_and_get(priv-&gt;device);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if ((!priv-&gt;hw-&gt;xpcs ||</div><div class='del'>-	     xpcs_get_an_mode(priv-&gt;hw-&gt;xpcs, mode) != DW_AN_C73)) {</div><div class='del'>-		ret = stmmac_init_phy(dev);</div><div class='del'>-		if (ret) {</div><div class='del'>-			netdev_err(priv-&gt;dev,</div><div class='del'>-				   "%s: Cannot attach to PHY (error: %d)\n",</div><div class='del'>-				   __func__, ret);</div><div class='del'>-			goto init_phy_error;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;rx_copybreak = STMMAC_RX_COPYBREAK;</div><div class='del'>-</div><div class='del'>-	buf_sz = dma_conf-&gt;dma_buf_sz;</div><div class='ctx'> 	for (int i = 0; i &lt; MTL_MAX_TX_QUEUES; i++)</div><div class='ctx'> 		if (priv-&gt;dma_conf.tx_queue[i].tbs &amp; STMMAC_TBS_EN)</div><div class='ctx'> 			dma_conf-&gt;tx_queue[i].tbs = priv-&gt;dma_conf.tx_queue[i].tbs;</div><div class='hunk'>@@ -3939,17 +4086,17 @@ static int __stmmac_open(struct net_device *dev,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = stmmac_hw_setup(dev, true);</div><div class='add'>+	ret = stmmac_hw_setup(dev);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		netdev_err(priv-&gt;dev, "%s: Hw setup failed\n", __func__);</div><div class='ctx'> 		goto init_error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	stmmac_setup_ptp(priv);</div><div class='add'>+</div><div class='ctx'> 	stmmac_init_coalesce(priv);</div><div class='ctx'> </div><div class='ctx'> 	phylink_start(priv-&gt;phylink);</div><div class='del'>-	/* We may have called phylink_speed_down before */</div><div class='del'>-	phylink_speed_up(priv-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	ret = stmmac_request_irq(dev);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -3967,11 +4114,8 @@ irq_error:</div><div class='ctx'> 	for (chan = 0; chan &lt; priv-&gt;plat-&gt;tx_queues_to_use; chan++)</div><div class='ctx'> 		hrtimer_cancel(&amp;priv-&gt;dma_conf.tx_queue[chan].txtimer);</div><div class='ctx'> </div><div class='del'>-	stmmac_hw_teardown(dev);</div><div class='add'>+	stmmac_release_ptp(priv);</div><div class='ctx'> init_error:</div><div class='del'>-	phylink_disconnect_phy(priv-&gt;phylink);</div><div class='del'>-init_phy_error:</div><div class='del'>-	pm_runtime_put(priv-&gt;device);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3981,34 +4125,50 @@ static int stmmac_open(struct net_device *dev)</div><div class='ctx'> 	struct stmmac_dma_conf *dma_conf;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	/* Initialise the tx lpi timer, converting from msec to usec */</div><div class='add'>+	if (!priv-&gt;tx_lpi_timer)</div><div class='add'>+		priv-&gt;tx_lpi_timer = eee_timer * 1000;</div><div class='add'>+</div><div class='ctx'> 	dma_conf = stmmac_setup_dma_desc(priv, dev-&gt;mtu);</div><div class='ctx'> 	if (IS_ERR(dma_conf))</div><div class='ctx'> 		return PTR_ERR(dma_conf);</div><div class='ctx'> </div><div class='add'>+	ret = pm_runtime_resume_and_get(priv-&gt;device);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_dma_resources;</div><div class='add'>+</div><div class='add'>+	ret = stmmac_init_phy(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_runtime_pm;</div><div class='add'>+</div><div class='ctx'> 	ret = __stmmac_open(dev, dma_conf);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		free_dma_desc_resources(priv, dma_conf);</div><div class='add'>+		goto err_disconnect_phy;</div><div class='ctx'> </div><div class='ctx'> 	kfree(dma_conf);</div><div class='add'>+</div><div class='add'>+	/* We may have called phylink_speed_down before */</div><div class='add'>+	phylink_speed_up(priv-&gt;phylink);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+err_disconnect_phy:</div><div class='add'>+	phylink_disconnect_phy(priv-&gt;phylink);</div><div class='add'>+err_runtime_pm:</div><div class='add'>+	pm_runtime_put(priv-&gt;device);</div><div class='add'>+err_dma_resources:</div><div class='add'>+	free_dma_desc_resources(priv, dma_conf);</div><div class='add'>+	kfree(dma_conf);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- *  stmmac_release - close entry point of the driver</div><div class='del'>- *  @dev : device pointer.</div><div class='del'>- *  Description:</div><div class='del'>- *  This is the stop entry point of the driver.</div><div class='del'>- */</div><div class='del'>-static int stmmac_release(struct net_device *dev)</div><div class='add'>+static void __stmmac_release(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	u32 chan;</div><div class='ctx'> </div><div class='del'>-	if (device_may_wakeup(priv-&gt;device))</div><div class='del'>-		phylink_speed_down(priv-&gt;phylink, false);</div><div class='ctx'> 	/* Stop and disconnect the PHY */</div><div class='ctx'> 	phylink_stop(priv-&gt;phylink);</div><div class='del'>-	phylink_disconnect_phy(priv-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	stmmac_disable_all_queues(priv);</div><div class='ctx'> </div><div class='hunk'>@@ -4020,20 +4180,12 @@ static int stmmac_release(struct net_device *dev)</div><div class='ctx'> 	/* Free the IRQ lines */</div><div class='ctx'> 	stmmac_free_irq(dev, REQ_IRQ_ERR_ALL, 0);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;eee_enabled) {</div><div class='del'>-		priv-&gt;tx_path_in_lpi_mode = false;</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Stop TX/RX DMA and clear the descriptors */</div><div class='ctx'> 	stmmac_stop_all_dma(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Release and free the Rx/Tx resources */</div><div class='ctx'> 	free_dma_desc_resources(priv, &amp;priv-&gt;dma_conf);</div><div class='ctx'> </div><div class='del'>-	/* Disable the MAC Rx/Tx */</div><div class='del'>-	stmmac_mac_set(priv, priv-&gt;ioaddr, false);</div><div class='del'>-</div><div class='ctx'> 	/* Powerdown Serdes if there is */</div><div class='ctx'> 	if (priv-&gt;plat-&gt;serdes_powerdown)</div><div class='ctx'> 		priv-&gt;plat-&gt;serdes_powerdown(dev, priv-&gt;plat-&gt;bsp_priv);</div><div class='hunk'>@@ -4041,8 +4193,29 @@ static int stmmac_release(struct net_device *dev)</div><div class='ctx'> 	stmmac_release_ptp(priv);</div><div class='ctx'> </div><div class='ctx'> 	if (stmmac_fpe_supported(priv))</div><div class='del'>-		timer_shutdown_sync(&amp;priv-&gt;fpe_cfg.verify_timer);</div><div class='add'>+		ethtool_mmsv_stop(&amp;priv-&gt;fpe_cfg.mmsv);</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ *  stmmac_release - close entry point of the driver</div><div class='add'>+ *  @dev : device pointer.</div><div class='add'>+ *  Description:</div><div class='add'>+ *  This is the stop entry point of the driver.</div><div class='add'>+ */</div><div class='add'>+static int stmmac_release(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* If the PHY or MAC has WoL enabled, then the PHY will not be</div><div class='add'>+	 * suspended when phylink_stop() is called below. Set the PHY</div><div class='add'>+	 * to its slowest speed to save power.</div><div class='add'>+	 */</div><div class='add'>+	if (device_may_wakeup(priv-&gt;device))</div><div class='add'>+		phylink_speed_down(priv-&gt;phylink, false);</div><div class='add'>+</div><div class='add'>+	__stmmac_release(dev);</div><div class='add'>+</div><div class='add'>+	phylink_disconnect_phy(priv-&gt;phylink);</div><div class='ctx'> 	pm_runtime_put(priv-&gt;device);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -4051,18 +4224,11 @@ static int stmmac_release(struct net_device *dev)</div><div class='ctx'> static bool stmmac_vlan_insert(struct stmmac_priv *priv, struct sk_buff *skb,</div><div class='ctx'> 			       struct stmmac_tx_queue *tx_q)</div><div class='ctx'> {</div><div class='del'>-	u16 tag = 0x0, inner_tag = 0x0;</div><div class='del'>-	u32 inner_type = 0x0;</div><div class='ctx'> 	struct dma_desc *p;</div><div class='add'>+	u16 tag = 0x0;</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;dma_cap.vlins)</div><div class='add'>+	if (!priv-&gt;dma_cap.vlins || !skb_vlan_tag_present(skb))</div><div class='ctx'> 		return false;</div><div class='del'>-	if (!skb_vlan_tag_present(skb))</div><div class='del'>-		return false;</div><div class='del'>-	if (skb-&gt;vlan_proto == htons(ETH_P_8021AD)) {</div><div class='del'>-		inner_tag = skb_vlan_tag_get(skb);</div><div class='del'>-		inner_type = STMMAC_VLAN_INSERT;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	tag = skb_vlan_tag_get(skb);</div><div class='ctx'> </div><div class='hunk'>@@ -4071,7 +4237,7 @@ static bool stmmac_vlan_insert(struct stmmac_priv *priv, struct sk_buff *skb,</div><div class='ctx'> 	else</div><div class='ctx'> 		p = &amp;tx_q-&gt;dma_tx[tx_q-&gt;cur_tx];</div><div class='ctx'> </div><div class='del'>-	if (stmmac_set_desc_vlan_tag(priv, p, tag, inner_tag, inner_type))</div><div class='add'>+	if (stmmac_set_desc_vlan_tag(priv, p, tag, 0x0, 0x0))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	stmmac_set_tx_owner(priv, p);</div><div class='hunk'>@@ -4113,11 +4279,7 @@ static void stmmac_tso_allocator(struct stmmac_priv *priv, dma_addr_t des,</div><div class='ctx'> 			desc = &amp;tx_q-&gt;dma_tx[tx_q-&gt;cur_tx];</div><div class='ctx'> </div><div class='ctx'> 		curr_addr = des + (total_len - tmp_len);</div><div class='del'>-		if (priv-&gt;dma_cap.addr64 &lt;= 32)</div><div class='del'>-			desc-&gt;des0 = cpu_to_le32(curr_addr);</div><div class='del'>-		else</div><div class='del'>-			stmmac_set_desc_addr(priv, desc, curr_addr);</div><div class='del'>-</div><div class='add'>+		stmmac_set_desc_addr(priv, desc, curr_addr);</div><div class='ctx'> 		buff_size = tmp_len &gt;= TSO_MAX_BUFF_SIZE ?</div><div class='ctx'> 			    TSO_MAX_BUFF_SIZE : tmp_len;</div><div class='ctx'> </div><div class='hunk'>@@ -4163,17 +4325,27 @@ static void stmmac_flush_tx_descriptors(struct stmmac_priv *priv, int queue)</div><div class='ctx'>  *  First Descriptor</div><div class='ctx'>  *   --------</div><div class='ctx'>  *   | DES0 |---&gt; buffer1 = L2/L3/L4 header</div><div class='del'>- *   | DES1 |---&gt; TCP Payload (can continue on next descr...)</div><div class='del'>- *   | DES2 |---&gt; buffer 1 and 2 len</div><div class='add'>+ *   | DES1 |---&gt; can be used as buffer2 for TCP Payload if the DMA AXI address</div><div class='add'>+ *   |      |     width is 32-bit, but we never use it.</div><div class='add'>+ *   |      |     Also can be used as the most-significant 8-bits or 16-bits of</div><div class='add'>+ *   |      |     buffer1 address pointer if the DMA AXI address width is 40-bit</div><div class='add'>+ *   |      |     or 48-bit, and we always use it.</div><div class='add'>+ *   | DES2 |---&gt; buffer1 len</div><div class='ctx'>  *   | DES3 |---&gt; must set TSE, TCP hdr len-&gt; [22:19]. TCP payload len [17:0]</div><div class='ctx'>  *   --------</div><div class='add'>+ *   --------</div><div class='add'>+ *   | DES0 |---&gt; buffer1 = TCP Payload (can continue on next descr...)</div><div class='add'>+ *   | DES1 |---&gt; same as the First Descriptor</div><div class='add'>+ *   | DES2 |---&gt; buffer1 len</div><div class='add'>+ *   | DES3 |</div><div class='add'>+ *   --------</div><div class='ctx'>  *	|</div><div class='ctx'>  *     ...</div><div class='ctx'>  *	|</div><div class='ctx'>  *   --------</div><div class='del'>- *   | DES0 | --| Split TCP Payload on Buffers 1 and 2</div><div class='del'>- *   | DES1 | --|</div><div class='del'>- *   | DES2 | --&gt; buffer 1 and 2 len</div><div class='add'>+ *   | DES0 |---&gt; buffer1 = Split TCP Payload</div><div class='add'>+ *   | DES1 |---&gt; same as the First Descriptor</div><div class='add'>+ *   | DES2 |---&gt; buffer1 len</div><div class='ctx'>  *   | DES3 |</div><div class='ctx'>  *   --------</div><div class='ctx'>  *</div><div class='hunk'>@@ -4183,15 +4355,14 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dma_desc *desc, *first, *mss_desc = NULL;</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='del'>-	int tmp_pay_len = 0, first_tx, nfrags;</div><div class='ctx'> 	unsigned int first_entry, tx_packets;</div><div class='ctx'> 	struct stmmac_txq_stats *txq_stats;</div><div class='ctx'> 	struct stmmac_tx_queue *tx_q;</div><div class='ctx'> 	u32 pay_len, mss, queue;</div><div class='add'>+	int i, first_tx, nfrags;</div><div class='ctx'> 	u8 proto_hdr_len, hdr;</div><div class='ctx'> 	dma_addr_t des;</div><div class='ctx'> 	bool set_ic;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Always insert VLAN tag to SKB payload for TSO frames.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -4276,23 +4447,9 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	if (dma_mapping_error(priv-&gt;device, des))</div><div class='ctx'> 		goto dma_map_err;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;dma_cap.addr64 &lt;= 32) {</div><div class='del'>-		first-&gt;des0 = cpu_to_le32(des);</div><div class='del'>-</div><div class='del'>-		/* Fill start of payload in buff2 of first descriptor */</div><div class='del'>-		if (pay_len)</div><div class='del'>-			first-&gt;des1 = cpu_to_le32(des + proto_hdr_len);</div><div class='del'>-</div><div class='del'>-		/* If needed take extra descriptors to fill the remaining payload */</div><div class='del'>-		tmp_pay_len = pay_len - TSO_MAX_BUFF_SIZE;</div><div class='del'>-	} else {</div><div class='del'>-		stmmac_set_desc_addr(priv, first, des);</div><div class='del'>-		tmp_pay_len = pay_len;</div><div class='del'>-		des += proto_hdr_len;</div><div class='del'>-		pay_len = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	stmmac_tso_allocator(priv, des, tmp_pay_len, (nfrags == 0), queue);</div><div class='add'>+	stmmac_set_desc_addr(priv, first, des);</div><div class='add'>+	stmmac_tso_allocator(priv, des + proto_hdr_len, pay_len,</div><div class='add'>+			     (nfrags == 0), queue);</div><div class='ctx'> </div><div class='ctx'> 	/* In case two or more DMA transmit descriptors are allocated for this</div><div class='ctx'> 	 * non-paged SKB data, the DMA buffer address should be saved to</div><div class='hunk'>@@ -4386,8 +4543,6 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	if (priv-&gt;sarc_type)</div><div class='ctx'> 		stmmac_set_desc_sarc(priv, first, priv-&gt;sarc_type);</div><div class='ctx'> </div><div class='del'>-	skb_tx_timestamp(skb);</div><div class='del'>-</div><div class='ctx'> 	if (unlikely((skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP) &amp;&amp;</div><div class='ctx'> 		     priv-&gt;hwts_tx_en)) {</div><div class='ctx'> 		/* declare that device is doing timestamping */</div><div class='hunk'>@@ -4396,11 +4551,9 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Complete the first descriptor before granting the DMA */</div><div class='del'>-	stmmac_prepare_tso_tx_desc(priv, first, 1,</div><div class='del'>-			proto_hdr_len,</div><div class='del'>-			pay_len,</div><div class='del'>-			1, tx_q-&gt;tx_skbuff_dma[first_entry].last_segment,</div><div class='del'>-			hdr / 4, (skb-&gt;len - proto_hdr_len));</div><div class='add'>+	stmmac_prepare_tso_tx_desc(priv, first, 1, proto_hdr_len, 0, 1,</div><div class='add'>+				   tx_q-&gt;tx_skbuff_dma[first_entry].last_segment,</div><div class='add'>+				   hdr / 4, (skb-&gt;len - proto_hdr_len));</div><div class='ctx'> </div><div class='ctx'> 	/* If context desc is used to change MSS */</div><div class='ctx'> 	if (mss_desc) {</div><div class='hunk'>@@ -4422,6 +4575,7 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	netdev_tx_sent_queue(netdev_get_tx_queue(dev, queue), skb-&gt;len);</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='ctx'> </div><div class='ctx'> 	stmmac_flush_tx_descriptors(priv, queue);</div><div class='ctx'> 	stmmac_tx_timer_arm(priv, queue);</div><div class='hunk'>@@ -4467,41 +4621,48 @@ static bool stmmac_has_ip_ethertype(struct sk_buff *skb)</div><div class='ctx'>  */</div><div class='ctx'> static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	unsigned int first_entry, tx_packets, enh_desc;</div><div class='add'>+	bool enh_desc, has_vlan, set_ic, is_jumbo = false;</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	unsigned int nopaged_len = skb_headlen(skb);</div><div class='del'>-	int i, csum_insertion = 0, is_jumbo = 0;</div><div class='ctx'> 	u32 queue = skb_get_queue_mapping(skb);</div><div class='ctx'> 	int nfrags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+	unsigned int first_entry, tx_packets;</div><div class='ctx'> 	int gso = skb_shinfo(skb)-&gt;gso_type;</div><div class='ctx'> 	struct stmmac_txq_stats *txq_stats;</div><div class='ctx'> 	struct dma_edesc *tbs_desc = NULL;</div><div class='ctx'> 	struct dma_desc *desc, *first;</div><div class='ctx'> 	struct stmmac_tx_queue *tx_q;</div><div class='del'>-	bool has_vlan, set_ic;</div><div class='add'>+	int i, csum_insertion = 0;</div><div class='ctx'> 	int entry, first_tx;</div><div class='ctx'> 	dma_addr_t des;</div><div class='add'>+	u32 sdu_len;</div><div class='ctx'> </div><div class='ctx'> 	tx_q = &amp;priv-&gt;dma_conf.tx_queue[queue];</div><div class='ctx'> 	txq_stats = &amp;priv-&gt;xstats.txq_stats[queue];</div><div class='ctx'> 	first_tx = tx_q-&gt;cur_tx;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;tx_path_in_lpi_mode &amp;&amp; priv-&gt;eee_sw_timer_en)</div><div class='del'>-		stmmac_disable_eee_mode(priv);</div><div class='add'>+		stmmac_stop_sw_lpi(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Manage oversized TCP frames for GMAC4 device */</div><div class='ctx'> 	if (skb_is_gso(skb) &amp;&amp; priv-&gt;tso) {</div><div class='ctx'> 		if (gso &amp; (SKB_GSO_TCPV4 | SKB_GSO_TCPV6))</div><div class='ctx'> 			return stmmac_tso_xmit(skb, dev);</div><div class='del'>-		if (priv-&gt;plat-&gt;has_gmac4 &amp;&amp; (gso &amp; SKB_GSO_UDP_L4))</div><div class='add'>+		if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC4 &amp;&amp;</div><div class='add'>+		    (gso &amp; SKB_GSO_UDP_L4))</div><div class='ctx'> 			return stmmac_tso_xmit(skb, dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;est &amp;&amp; priv-&gt;est-&gt;enable &amp;&amp;</div><div class='del'>-	    priv-&gt;est-&gt;max_sdu[queue] &amp;&amp;</div><div class='del'>-	    skb-&gt;len &gt; priv-&gt;est-&gt;max_sdu[queue]){</div><div class='del'>-		priv-&gt;xstats.max_sdu_txq_drop[queue]++;</div><div class='del'>-		goto max_sdu_err;</div><div class='add'>+	    priv-&gt;est-&gt;max_sdu[queue]) {</div><div class='add'>+		sdu_len = skb-&gt;len;</div><div class='add'>+		/* Add VLAN tag length if VLAN tag insertion offload is requested */</div><div class='add'>+		if (priv-&gt;dma_cap.vlins &amp;&amp; skb_vlan_tag_present(skb))</div><div class='add'>+			sdu_len += VLAN_HLEN;</div><div class='add'>+		if (sdu_len &gt; priv-&gt;est-&gt;max_sdu[queue]) {</div><div class='add'>+			priv-&gt;xstats.max_sdu_txq_drop[queue]++;</div><div class='add'>+			goto max_sdu_err;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(stmmac_tx_avail(priv, queue) &lt; nfrags + 1)) {</div><div class='hunk'>@@ -4665,8 +4826,6 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	if (priv-&gt;sarc_type)</div><div class='ctx'> 		stmmac_set_desc_sarc(priv, first, priv-&gt;sarc_type);</div><div class='ctx'> </div><div class='del'>-	skb_tx_timestamp(skb);</div><div class='del'>-</div><div class='ctx'> 	/* Ready to fill the first descriptor and set the OWN bit w/o any</div><div class='ctx'> 	 * problems because all the descriptors are actually ready to be</div><div class='ctx'> 	 * passed to the DMA engine.</div><div class='hunk'>@@ -4713,7 +4872,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	netdev_tx_sent_queue(netdev_get_tx_queue(dev, queue), skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	stmmac_enable_dma_transmission(priv, priv-&gt;ioaddr, queue);</div><div class='del'>-</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='ctx'> 	stmmac_flush_tx_descriptors(priv, queue);</div><div class='ctx'> 	stmmac_tx_timer_arm(priv, queue);</div><div class='ctx'> </div><div class='hunk'>@@ -4778,7 +4937,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (priv-&gt;sph &amp;&amp; !buf-&gt;sec_page) {</div><div class='add'>+		if (priv-&gt;sph_active &amp;&amp; !buf-&gt;sec_page) {</div><div class='ctx'> 			buf-&gt;sec_page = page_pool_alloc_pages(rx_q-&gt;page_pool, gfp);</div><div class='ctx'> 			if (!buf-&gt;sec_page)</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -4789,7 +4948,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)</div><div class='ctx'> 		buf-&gt;addr = page_pool_get_dma_addr(buf-&gt;page) + buf-&gt;page_offset;</div><div class='ctx'> </div><div class='ctx'> 		stmmac_set_desc_addr(priv, p, buf-&gt;addr);</div><div class='del'>-		if (priv-&gt;sph)</div><div class='add'>+		if (priv-&gt;sph_active)</div><div class='ctx'> 			stmmac_set_desc_sec_addr(priv, p, buf-&gt;sec_addr, true);</div><div class='ctx'> 		else</div><div class='ctx'> 			stmmac_set_desc_sec_addr(priv, p, buf-&gt;sec_addr, false);</div><div class='hunk'>@@ -4814,6 +4973,8 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)</div><div class='ctx'> 	rx_q-&gt;rx_tail_addr = rx_q-&gt;dma_rx_phy +</div><div class='ctx'> 			    (rx_q-&gt;dirty_rx * sizeof(struct dma_desc));</div><div class='ctx'> 	stmmac_set_rx_tail_ptr(priv, priv-&gt;ioaddr, rx_q-&gt;rx_tail_addr, queue);</div><div class='add'>+	/* Wake up Rx DMA from the suspend state if required */</div><div class='add'>+	stmmac_enable_dma_reception(priv, priv-&gt;ioaddr, queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static unsigned int stmmac_rx_buf1_len(struct stmmac_priv *priv,</div><div class='hunk'>@@ -4824,12 +4985,12 @@ static unsigned int stmmac_rx_buf1_len(struct stmmac_priv *priv,</div><div class='ctx'> 	int coe = priv-&gt;hw-&gt;rx_csum;</div><div class='ctx'> </div><div class='ctx'> 	/* Not first descriptor, buffer is always zero */</div><div class='del'>-	if (priv-&gt;sph &amp;&amp; len)</div><div class='add'>+	if (priv-&gt;sph_active &amp;&amp; len)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* First descriptor, get split header length */</div><div class='ctx'> 	stmmac_get_rx_header_len(priv, p, &amp;hlen);</div><div class='del'>-	if (priv-&gt;sph &amp;&amp; hlen) {</div><div class='add'>+	if (priv-&gt;sph_active &amp;&amp; hlen) {</div><div class='ctx'> 		priv-&gt;xstats.rx_split_hdr_pkt_n++;</div><div class='ctx'> 		return hlen;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -4852,7 +5013,7 @@ static unsigned int stmmac_rx_buf2_len(struct stmmac_priv *priv,</div><div class='ctx'> 	unsigned int plen = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Not split header, buffer is not available */</div><div class='del'>-	if (!priv-&gt;sph)</div><div class='add'>+	if (!priv-&gt;sph_active)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Not last descriptor */</div><div class='hunk'>@@ -4870,6 +5031,7 @@ static int stmmac_xdp_xmit_xdpf(struct stmmac_priv *priv, int queue,</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_txq_stats *txq_stats = &amp;priv-&gt;xstats.txq_stats[queue];</div><div class='ctx'> 	struct stmmac_tx_queue *tx_q = &amp;priv-&gt;dma_conf.tx_queue[queue];</div><div class='add'>+	bool csum = !priv-&gt;plat-&gt;tx_queues_cfg[queue].coe_unsupported;</div><div class='ctx'> 	unsigned int entry = tx_q-&gt;cur_tx;</div><div class='ctx'> 	struct dma_desc *tx_desc;</div><div class='ctx'> 	dma_addr_t dma_addr;</div><div class='hunk'>@@ -4921,7 +5083,7 @@ static int stmmac_xdp_xmit_xdpf(struct stmmac_priv *priv, int queue,</div><div class='ctx'> 	stmmac_set_desc_addr(priv, tx_desc, dma_addr);</div><div class='ctx'> </div><div class='ctx'> 	stmmac_prepare_tx_desc(priv, tx_desc, 1, xdpf-&gt;len,</div><div class='del'>-			       true, priv-&gt;mode, true, true,</div><div class='add'>+			       csum, priv-&gt;mode, true, true,</div><div class='ctx'> 			       xdpf-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	tx_q-&gt;tx_count_frames++;</div><div class='hunk'>@@ -5234,10 +5396,10 @@ static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)</div><div class='ctx'> 			len = 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+read_again:</div><div class='ctx'> 		if (count &gt;= limit)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-read_again:</div><div class='ctx'> 		buf1_len = 0;</div><div class='ctx'> 		entry = next_entry;</div><div class='ctx'> 		buf = &amp;rx_q-&gt;buf_pool[entry];</div><div class='hunk'>@@ -5394,10 +5556,10 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)</div><div class='ctx'> 	struct sk_buff *skb = NULL;</div><div class='ctx'> 	struct stmmac_xdp_buff ctx;</div><div class='ctx'> 	int xdp_status = 0;</div><div class='del'>-	int buf_sz;</div><div class='add'>+	int bufsz;</div><div class='ctx'> </div><div class='ctx'> 	dma_dir = page_pool_get_dma_dir(rx_q-&gt;page_pool);</div><div class='del'>-	buf_sz = DIV_ROUND_UP(priv-&gt;dma_conf.dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;</div><div class='add'>+	bufsz = DIV_ROUND_UP(priv-&gt;dma_conf.dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;</div><div class='ctx'> 	limit = min(priv-&gt;dma_conf.dma_rx_size - 1, (unsigned int)limit);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_msg_rx_status(priv)) {</div><div class='hunk'>@@ -5468,7 +5630,7 @@ read_again:</div><div class='ctx'> 		if (priv-&gt;extend_desc)</div><div class='ctx'> 			stmmac_rx_extended_status(priv, &amp;priv-&gt;xstats, rx_q-&gt;dma_erx + entry);</div><div class='ctx'> 		if (unlikely(status == discard_frame)) {</div><div class='del'>-			page_pool_recycle_direct(rx_q-&gt;page_pool, buf-&gt;page);</div><div class='add'>+			page_pool_put_page(rx_q-&gt;page_pool, buf-&gt;page, 0, true);</div><div class='ctx'> 			buf-&gt;page = NULL;</div><div class='ctx'> 			error = 1;</div><div class='ctx'> 			if (!priv-&gt;hwts_rx_en)</div><div class='hunk'>@@ -5486,10 +5648,6 @@ read_again:</div><div class='ctx'> </div><div class='ctx'> 		/* Buffer is good. Go on. */</div><div class='ctx'> </div><div class='del'>-		prefetch(page_address(buf-&gt;page) + buf-&gt;page_offset);</div><div class='del'>-		if (buf-&gt;sec_page)</div><div class='del'>-			prefetch(page_address(buf-&gt;sec_page));</div><div class='del'>-</div><div class='ctx'> 		buf1_len = stmmac_rx_buf1_len(priv, p, status, len);</div><div class='ctx'> 		len += buf1_len;</div><div class='ctx'> 		buf2_len = stmmac_rx_buf2_len(priv, p, status, len);</div><div class='hunk'>@@ -5511,8 +5669,10 @@ read_again:</div><div class='ctx'> </div><div class='ctx'> 			dma_sync_single_for_cpu(priv-&gt;device, buf-&gt;addr,</div><div class='ctx'> 						buf1_len, dma_dir);</div><div class='add'>+			net_prefetch(page_address(buf-&gt;page) +</div><div class='add'>+				     buf-&gt;page_offset);</div><div class='ctx'> </div><div class='del'>-			xdp_init_buff(&amp;ctx.xdp, buf_sz, &amp;rx_q-&gt;xdp_rxq);</div><div class='add'>+			xdp_init_buff(&amp;ctx.xdp, bufsz, &amp;rx_q-&gt;xdp_rxq);</div><div class='ctx'> 			xdp_prepare_buff(&amp;ctx.xdp, page_address(buf-&gt;page),</div><div class='ctx'> 					 buf-&gt;page_offset, buf1_len, true);</div><div class='ctx'> </div><div class='hunk'>@@ -5564,22 +5724,26 @@ read_again:</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!skb) {</div><div class='add'>+			unsigned int head_pad_len;</div><div class='add'>+</div><div class='ctx'> 			/* XDP program may expand or reduce tail */</div><div class='ctx'> 			buf1_len = ctx.xdp.data_end - ctx.xdp.data;</div><div class='ctx'> </div><div class='del'>-			skb = napi_alloc_skb(&amp;ch-&gt;rx_napi, buf1_len);</div><div class='add'>+			skb = napi_build_skb(page_address(buf-&gt;page),</div><div class='add'>+					     rx_q-&gt;napi_skb_frag_size);</div><div class='ctx'> 			if (!skb) {</div><div class='add'>+				page_pool_recycle_direct(rx_q-&gt;page_pool,</div><div class='add'>+							 buf-&gt;page);</div><div class='ctx'> 				rx_dropped++;</div><div class='ctx'> 				count++;</div><div class='ctx'> 				goto drain_data;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* XDP program may adjust header */</div><div class='del'>-			skb_copy_to_linear_data(skb, ctx.xdp.data, buf1_len);</div><div class='add'>+			head_pad_len = ctx.xdp.data - ctx.xdp.data_hard_start;</div><div class='add'>+			skb_reserve(skb, head_pad_len);</div><div class='ctx'> 			skb_put(skb, buf1_len);</div><div class='del'>-</div><div class='del'>-			/* Data payload copied into SKB, page ready for recycle */</div><div class='del'>-			page_pool_recycle_direct(rx_q-&gt;page_pool, buf-&gt;page);</div><div class='add'>+			skb_mark_for_recycle(skb);</div><div class='ctx'> 			buf-&gt;page = NULL;</div><div class='ctx'> 		} else if (buf1_len) {</div><div class='ctx'> 			dma_sync_single_for_cpu(priv-&gt;device, buf-&gt;addr,</div><div class='hunk'>@@ -5587,9 +5751,6 @@ read_again:</div><div class='ctx'> 			skb_add_rx_frag(skb, skb_shinfo(skb)-&gt;nr_frags,</div><div class='ctx'> 					buf-&gt;page, buf-&gt;page_offset, buf1_len,</div><div class='ctx'> 					priv-&gt;dma_conf.dma_buf_sz);</div><div class='del'>-</div><div class='del'>-			/* Data payload appended into SKB */</div><div class='del'>-			skb_mark_for_recycle(skb);</div><div class='ctx'> 			buf-&gt;page = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -5599,9 +5760,6 @@ read_again:</div><div class='ctx'> 			skb_add_rx_frag(skb, skb_shinfo(skb)-&gt;nr_frags,</div><div class='ctx'> 					buf-&gt;sec_page, 0, buf2_len,</div><div class='ctx'> 					priv-&gt;dma_conf.dma_buf_sz);</div><div class='del'>-</div><div class='del'>-			/* Data payload appended into SKB */</div><div class='del'>-			skb_mark_for_recycle(skb);</div><div class='ctx'> 			buf-&gt;sec_page = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -5624,7 +5782,8 @@ drain_data:</div><div class='ctx'> </div><div class='ctx'> 		skb-&gt;protocol = eth_type_trans(skb, priv-&gt;dev);</div><div class='ctx'> </div><div class='del'>-		if (unlikely(!coe) || !stmmac_has_ip_ethertype(skb))</div><div class='add'>+		if (unlikely(!coe) || !stmmac_has_ip_ethertype(skb) ||</div><div class='add'>+		    (status &amp; csum_none))</div><div class='ctx'> 			skb_checksum_none_assert(skb);</div><div class='ctx'> 		else</div><div class='ctx'> 			skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='hunk'>@@ -5800,6 +5959,9 @@ static void stmmac_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'>  *  whenever multicast addresses must be enabled/disabled.</div><div class='ctx'>  *  Return value:</div><div class='ctx'>  *  void.</div><div class='add'>+ *</div><div class='add'>+ *  FIXME: This may need RXC to be running, but it may be called with BH</div><div class='add'>+ *  disabled, which means we can't call phylink_rx_clk_stop*().</div><div class='ctx'>  */</div><div class='ctx'> static void stmmac_set_rx_mode(struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -5853,7 +6015,7 @@ static int stmmac_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 			return PTR_ERR(dma_conf);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		stmmac_release(dev);</div><div class='add'>+		__stmmac_release(dev);</div><div class='ctx'> </div><div class='ctx'> 		ret = __stmmac_open(dev, dma_conf);</div><div class='ctx'> 		if (ret) {</div><div class='hunk'>@@ -5919,8 +6081,8 @@ static int stmmac_set_features(struct net_device *netdev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	stmmac_rx_ipc(priv, priv-&gt;hw);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;sph_cap) {</div><div class='del'>-		bool sph_en = (priv-&gt;hw-&gt;rx_csum &gt; 0) &amp;&amp; priv-&gt;sph;</div><div class='add'>+	if (priv-&gt;sph_capable) {</div><div class='add'>+		bool sph_en = (priv-&gt;hw-&gt;rx_csum &gt; 0) &amp;&amp; priv-&gt;sph_active;</div><div class='ctx'> 		u32 chan;</div><div class='ctx'> </div><div class='ctx'> 		for (chan = 0; chan &lt; priv-&gt;plat-&gt;rx_queues_to_use; chan++)</div><div class='hunk'>@@ -5932,7 +6094,9 @@ static int stmmac_set_features(struct net_device *netdev,</div><div class='ctx'> 	else</div><div class='ctx'> 		priv-&gt;hw-&gt;hw_vlan_en = false;</div><div class='ctx'> </div><div class='add'>+	phylink_rx_clk_stop_block(priv-&gt;phylink);</div><div class='ctx'> 	stmmac_set_hw_vlan_mode(priv, priv-&gt;hw);</div><div class='add'>+	phylink_rx_clk_stop_unblock(priv-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -5945,7 +6109,7 @@ static void stmmac_common_interrupt(struct stmmac_priv *priv)</div><div class='ctx'> 	u32 queue;</div><div class='ctx'> 	bool xmac;</div><div class='ctx'> </div><div class='del'>-	xmac = priv-&gt;plat-&gt;has_gmac4 || priv-&gt;plat-&gt;has_xgmac;</div><div class='add'>+	xmac = dwmac_is_xmac(priv-&gt;plat-&gt;core_type);</div><div class='ctx'> 	queues_count = (rx_cnt &gt; tx_cnt) ? rx_cnt : tx_cnt;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;irq_wake)</div><div class='hunk'>@@ -5959,7 +6123,7 @@ static void stmmac_common_interrupt(struct stmmac_priv *priv)</div><div class='ctx'> 		stmmac_fpe_irq_status(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* To handle GMAC own interrupts */</div><div class='del'>-	if ((priv-&gt;plat-&gt;has_gmac) || xmac) {</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC || xmac) {</div><div class='ctx'> 		int status = stmmac_host_irq_status(priv, priv-&gt;hw, &amp;priv-&gt;xstats);</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(status)) {</div><div class='hunk'>@@ -5973,15 +6137,6 @@ static void stmmac_common_interrupt(struct stmmac_priv *priv)</div><div class='ctx'> 		for (queue = 0; queue &lt; queues_count; queue++)</div><div class='ctx'> 			stmmac_host_mtl_irq_status(priv, priv-&gt;hw, queue);</div><div class='ctx'> </div><div class='del'>-		/* PCS link status */</div><div class='del'>-		if (priv-&gt;hw-&gt;pcs &amp;&amp;</div><div class='del'>-		    !(priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_HAS_INTEGRATED_PCS)) {</div><div class='del'>-			if (priv-&gt;xstats.pcs_link)</div><div class='del'>-				netif_carrier_on(priv-&gt;dev);</div><div class='del'>-			else</div><div class='del'>-				netif_carrier_off(priv-&gt;dev);</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		stmmac_timestamp_interrupt(priv, priv);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -6118,12 +6273,6 @@ static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> 	case SIOCSMIIREG:</div><div class='ctx'> 		ret = phylink_mii_ioctl(priv-&gt;phylink, rq, cmd);</div><div class='ctx'> 		break;</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		ret = stmmac_hwtstamp_set(dev, rq);</div><div class='del'>-		break;</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		ret = stmmac_hwtstamp_get(dev, rq);</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -6216,7 +6365,9 @@ static int stmmac_set_mac_address(struct net_device *ndev, void *addr)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto set_mac_error;</div><div class='ctx'> </div><div class='add'>+	phylink_rx_clk_stop_block(priv-&gt;phylink);</div><div class='ctx'> 	stmmac_set_umac_addr(priv, priv-&gt;hw, ndev-&gt;dev_addr, 0);</div><div class='add'>+	phylink_rx_clk_stop_unblock(priv-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> set_mac_error:</div><div class='ctx'> 	pm_runtime_put(priv-&gt;device);</div><div class='hunk'>@@ -6333,7 +6484,7 @@ static int stmmac_dma_cap_show(struct seq_file *seq, void *v)</div><div class='ctx'> 		   (priv-&gt;dma_cap.mbps_1000) ? "Y" : "N");</div><div class='ctx'> 	seq_printf(seq, "\tHalf duplex: %s\n",</div><div class='ctx'> 		   (priv-&gt;dma_cap.half_duplex) ? "Y" : "N");</div><div class='del'>-	if (priv-&gt;plat-&gt;has_xgmac) {</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC) {</div><div class='ctx'> 		seq_printf(seq,</div><div class='ctx'> 			   "\tNumber of Additional MAC address registers: %d\n",</div><div class='ctx'> 			   priv-&gt;dma_cap.multi_addr);</div><div class='hunk'>@@ -6357,7 +6508,7 @@ static int stmmac_dma_cap_show(struct seq_file *seq, void *v)</div><div class='ctx'> 		   (priv-&gt;dma_cap.time_stamp) ? "Y" : "N");</div><div class='ctx'> 	seq_printf(seq, "\tIEEE 1588-2008 Advanced Time Stamp: %s\n",</div><div class='ctx'> 		   (priv-&gt;dma_cap.atime_stamp) ? "Y" : "N");</div><div class='del'>-	if (priv-&gt;plat-&gt;has_xgmac)</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC)</div><div class='ctx'> 		seq_printf(seq, "\tTimestamp System Time Source: %s\n",</div><div class='ctx'> 			   dwxgmac_timestamp_source[priv-&gt;dma_cap.tssrc]);</div><div class='ctx'> 	seq_printf(seq, "\t802.3az - Energy-Efficient Ethernet (EEE): %s\n",</div><div class='hunk'>@@ -6366,7 +6517,7 @@ static int stmmac_dma_cap_show(struct seq_file *seq, void *v)</div><div class='ctx'> 	seq_printf(seq, "\tChecksum Offload in TX: %s\n",</div><div class='ctx'> 		   (priv-&gt;dma_cap.tx_coe) ? "Y" : "N");</div><div class='ctx'> 	if (priv-&gt;synopsys_id &gt;= DWMAC_CORE_4_00 ||</div><div class='del'>-	    priv-&gt;plat-&gt;has_xgmac) {</div><div class='add'>+	    priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC) {</div><div class='ctx'> 		seq_printf(seq, "\tIP Checksum Offload in RX: %s\n",</div><div class='ctx'> 			   (priv-&gt;dma_cap.rx_coe) ? "Y" : "N");</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -6484,11 +6635,7 @@ static int stmmac_device_event(struct notifier_block *unused,</div><div class='ctx'> </div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case NETDEV_CHANGENAME:</div><div class='del'>-		if (priv-&gt;dbgfs_dir)</div><div class='del'>-			priv-&gt;dbgfs_dir = debugfs_rename(stmmac_fs_dir,</div><div class='del'>-							 priv-&gt;dbgfs_dir,</div><div class='del'>-							 stmmac_fs_dir,</div><div class='del'>-							 dev-&gt;name);</div><div class='add'>+		debugfs_change_name(priv-&gt;dbgfs_dir, "%s", dev-&gt;name);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> done:</div><div class='hunk'>@@ -6576,6 +6723,9 @@ static int stmmac_vlan_update(struct stmmac_priv *priv, bool is_double)</div><div class='ctx'> 	return stmmac_update_vlan_hash(priv, priv-&gt;hw, hash, pmatch, is_double);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* FIXME: This may need RXC to be running, but it may be called with BH</div><div class='add'>+ * disabled, which means we can't call phylink_rx_clk_stop*().</div><div class='add'>+ */</div><div class='ctx'> static int stmmac_vlan_rx_add_vid(struct net_device *ndev, __be16 proto, u16 vid)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='hunk'>@@ -6607,6 +6757,9 @@ err_pm_put:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* FIXME: This may need RXC to be running, but it may be called with BH</div><div class='add'>+ * disabled, which means we can't call phylink_rx_clk_stop*().</div><div class='add'>+ */</div><div class='ctx'> static int stmmac_vlan_rx_kill_vid(struct net_device *ndev, __be16 proto, u16 vid)</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='hunk'>@@ -6878,7 +7031,7 @@ int stmmac_xdp_open(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Adjust Split header */</div><div class='del'>-	sph_en = (priv-&gt;hw-&gt;rx_csum &gt; 0) &amp;&amp; priv-&gt;sph;</div><div class='add'>+	sph_en = (priv-&gt;hw-&gt;rx_csum &gt; 0) &amp;&amp; priv-&gt;sph_active;</div><div class='ctx'> </div><div class='ctx'> 	/* DMA RX Channel Configuration */</div><div class='ctx'> 	for (chan = 0; chan &lt; rx_cnt; chan++) {</div><div class='hunk'>@@ -6918,8 +7071,7 @@ int stmmac_xdp_open(struct net_device *dev)</div><div class='ctx'> 		stmmac_set_tx_tail_ptr(priv, priv-&gt;ioaddr,</div><div class='ctx'> 				       tx_q-&gt;tx_tail_addr, chan);</div><div class='ctx'> </div><div class='del'>-		hrtimer_init(&amp;tx_q-&gt;txtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-		tx_q-&gt;txtimer.function = stmmac_tx_timer;</div><div class='add'>+		hrtimer_setup(&amp;tx_q-&gt;txtimer, stmmac_tx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the MAC Rx/Tx */</div><div class='hunk'>@@ -6944,7 +7096,6 @@ irq_error:</div><div class='ctx'> 	for (chan = 0; chan &lt; priv-&gt;plat-&gt;tx_queues_to_use; chan++)</div><div class='ctx'> 		hrtimer_cancel(&amp;priv-&gt;dma_conf.tx_queue[chan].txtimer);</div><div class='ctx'> </div><div class='del'>-	stmmac_hw_teardown(dev);</div><div class='ctx'> init_error:</div><div class='ctx'> 	free_dma_desc_resources(priv, &amp;priv-&gt;dma_conf);</div><div class='ctx'> dma_desc_error:</div><div class='hunk'>@@ -7059,6 +7210,8 @@ static const struct net_device_ops stmmac_netdev_ops = {</div><div class='ctx'> 	.ndo_bpf = stmmac_bpf,</div><div class='ctx'> 	.ndo_xdp_xmit = stmmac_xdp_xmit,</div><div class='ctx'> 	.ndo_xsk_wakeup = stmmac_xsk_wakeup,</div><div class='add'>+	.ndo_hwtstamp_get = stmmac_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = stmmac_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void stmmac_reset_subtask(struct stmmac_priv *priv)</div><div class='hunk'>@@ -7127,7 +7280,6 @@ static int stmmac_hw_init(struct stmmac_priv *priv)</div><div class='ctx'> 		priv-&gt;plat-&gt;enh_desc = priv-&gt;dma_cap.enh_desc;</div><div class='ctx'> 		priv-&gt;plat-&gt;pmt = priv-&gt;dma_cap.pmt_remote_wake_up &amp;&amp;</div><div class='ctx'> 				!(priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_USE_PHY_WOL);</div><div class='del'>-		priv-&gt;hw-&gt;pmt = priv-&gt;plat-&gt;pmt;</div><div class='ctx'> 		if (priv-&gt;dma_cap.hash_tb_sz) {</div><div class='ctx'> 			priv-&gt;hw-&gt;multicast_filter_bins =</div><div class='ctx'> 					(BIT(priv-&gt;dma_cap.hash_tb_sz) &lt;&lt; 5);</div><div class='hunk'>@@ -7165,11 +7317,42 @@ static int stmmac_hw_init(struct stmmac_priv *priv)</div><div class='ctx'> 	if (priv-&gt;plat-&gt;pmt) {</div><div class='ctx'> 		dev_info(priv-&gt;device, "Wake-Up On Lan supported\n");</div><div class='ctx'> 		device_set_wakeup_capable(priv-&gt;device, 1);</div><div class='add'>+		devm_pm_set_wake_irq(priv-&gt;device, priv-&gt;wol_irq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;dma_cap.tsoen)</div><div class='ctx'> 		dev_info(priv-&gt;device, "TSO supported\n");</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;dma_cap.number_rx_queues &amp;&amp;</div><div class='add'>+	    priv-&gt;plat-&gt;rx_queues_to_use &gt; priv-&gt;dma_cap.number_rx_queues) {</div><div class='add'>+		dev_warn(priv-&gt;device,</div><div class='add'>+			 "Number of Rx queues (%u) exceeds dma capability\n",</div><div class='add'>+			 priv-&gt;plat-&gt;rx_queues_to_use);</div><div class='add'>+		priv-&gt;plat-&gt;rx_queues_to_use = priv-&gt;dma_cap.number_rx_queues;</div><div class='add'>+	}</div><div class='add'>+	if (priv-&gt;dma_cap.number_tx_queues &amp;&amp;</div><div class='add'>+	    priv-&gt;plat-&gt;tx_queues_to_use &gt; priv-&gt;dma_cap.number_tx_queues) {</div><div class='add'>+		dev_warn(priv-&gt;device,</div><div class='add'>+			 "Number of Tx queues (%u) exceeds dma capability\n",</div><div class='add'>+			 priv-&gt;plat-&gt;tx_queues_to_use);</div><div class='add'>+		priv-&gt;plat-&gt;tx_queues_to_use = priv-&gt;dma_cap.number_tx_queues;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;dma_cap.rx_fifo_size &amp;&amp;</div><div class='add'>+	    priv-&gt;plat-&gt;rx_fifo_size &gt; priv-&gt;dma_cap.rx_fifo_size) {</div><div class='add'>+		dev_warn(priv-&gt;device,</div><div class='add'>+			 "Rx FIFO size (%u) exceeds dma capability\n",</div><div class='add'>+			 priv-&gt;plat-&gt;rx_fifo_size);</div><div class='add'>+		priv-&gt;plat-&gt;rx_fifo_size = priv-&gt;dma_cap.rx_fifo_size;</div><div class='add'>+	}</div><div class='add'>+	if (priv-&gt;dma_cap.tx_fifo_size &amp;&amp;</div><div class='add'>+	    priv-&gt;plat-&gt;tx_fifo_size &gt; priv-&gt;dma_cap.tx_fifo_size) {</div><div class='add'>+		dev_warn(priv-&gt;device,</div><div class='add'>+			 "Tx FIFO size (%u) exceeds dma capability\n",</div><div class='add'>+			 priv-&gt;plat-&gt;tx_fifo_size);</div><div class='add'>+		priv-&gt;plat-&gt;tx_fifo_size = priv-&gt;dma_cap.tx_fifo_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;hw-&gt;vlan_fail_q_en =</div><div class='ctx'> 		(priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_VLAN_FAIL_Q_EN);</div><div class='ctx'> 	priv-&gt;hw-&gt;vlan_fail_q = priv-&gt;plat-&gt;vlan_fail_q;</div><div class='hunk'>@@ -7186,13 +7369,21 @@ static int stmmac_hw_init(struct stmmac_priv *priv)</div><div class='ctx'> 	 * has to be disable and this can be done by passing the</div><div class='ctx'> 	 * riwt_off field from the platform.</div><div class='ctx'> 	 */</div><div class='del'>-	if (((priv-&gt;synopsys_id &gt;= DWMAC_CORE_3_50) ||</div><div class='del'>-	    (priv-&gt;plat-&gt;has_xgmac)) &amp;&amp; (!priv-&gt;plat-&gt;riwt_off)) {</div><div class='add'>+	if ((priv-&gt;synopsys_id &gt;= DWMAC_CORE_3_50 ||</div><div class='add'>+	     priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC) &amp;&amp;</div><div class='add'>+	    !priv-&gt;plat-&gt;riwt_off) {</div><div class='ctx'> 		priv-&gt;use_riwt = 1;</div><div class='ctx'> 		dev_info(priv-&gt;device,</div><div class='ctx'> 			 "Enable RX Mitigation via HW Watchdog Timer\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Unimplemented PCS init (as indicated by stmmac_do_callback()</div><div class='add'>+	 * perversely returning -EINVAL) is non-fatal.</div><div class='add'>+	 */</div><div class='add'>+	ret = stmmac_mac_pcs_init(priv);</div><div class='add'>+	if (ret != -EINVAL)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -7301,7 +7492,7 @@ static int stmmac_xdp_rx_timestamp(const struct xdp_md *_ctx, u64 *timestamp)</div><div class='ctx'> 		return -ENODATA;</div><div class='ctx'> </div><div class='ctx'> 	/* For GMAC4, the valid timestamp is from CTX next desc. */</div><div class='del'>-	if (priv-&gt;plat-&gt;has_gmac4 || priv-&gt;plat-&gt;has_xgmac)</div><div class='add'>+	if (dwmac_is_xmac(priv-&gt;plat-&gt;core_type))</div><div class='ctx'> 		desc_contains_ts = ndesc;</div><div class='ctx'> </div><div class='ctx'> 	/* Check if timestamp is available */</div><div class='hunk'>@@ -7319,19 +7510,133 @@ static const struct xdp_metadata_ops stmmac_xdp_metadata_ops = {</div><div class='ctx'> 	.xmo_rx_timestamp		= stmmac_xdp_rx_timestamp,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * stmmac_dvr_probe</div><div class='del'>- * @device: device pointer</div><div class='del'>- * @plat_dat: platform data pointer</div><div class='del'>- * @res: stmmac resource pointer</div><div class='del'>- * Description: this is the main probe function used to</div><div class='del'>- * call the alloc_etherdev, allocate the priv structure.</div><div class='del'>- * Return:</div><div class='del'>- * returns 0 on success, otherwise errno.</div><div class='del'>- */</div><div class='del'>-int stmmac_dvr_probe(struct device *device,</div><div class='del'>-		     struct plat_stmmacenet_data *plat_dat,</div><div class='del'>-		     struct stmmac_resources *res)</div><div class='add'>+static int stmmac_dl_ts_coarse_set(struct devlink *dl, u32 id,</div><div class='add'>+				   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_devlink_priv *dl_priv = devlink_priv(dl);</div><div class='add'>+	struct stmmac_priv *priv = dl_priv-&gt;stmmac_priv;</div><div class='add'>+</div><div class='add'>+	priv-&gt;tsfupdt_coarse = ctx-&gt;val.vbool;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tsfupdt_coarse)</div><div class='add'>+		priv-&gt;systime_flags &amp;= ~PTP_TCR_TSCFUPDT;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;systime_flags |= PTP_TCR_TSCFUPDT;</div><div class='add'>+</div><div class='add'>+	/* In Coarse mode, we can use a smaller subsecond increment, let's</div><div class='add'>+	 * reconfigure the systime, subsecond increment and addend.</div><div class='add'>+	 */</div><div class='add'>+	stmmac_update_subsecond_increment(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stmmac_dl_ts_coarse_get(struct devlink *dl, u32 id,</div><div class='add'>+				   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_devlink_priv *dl_priv = devlink_priv(dl);</div><div class='add'>+	struct stmmac_priv *priv = dl_priv-&gt;stmmac_priv;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;val.vbool = priv-&gt;tsfupdt_coarse;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_param stmmac_devlink_params[] = {</div><div class='add'>+	DEVLINK_PARAM_DRIVER(STMMAC_DEVLINK_PARAM_ID_TS_COARSE, "phc_coarse_adj",</div><div class='add'>+			     DEVLINK_PARAM_TYPE_BOOL,</div><div class='add'>+			     BIT(DEVLINK_PARAM_CMODE_RUNTIME),</div><div class='add'>+			     stmmac_dl_ts_coarse_get,</div><div class='add'>+			     stmmac_dl_ts_coarse_set, NULL),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* None of the generic devlink parameters are implemented */</div><div class='add'>+static const struct devlink_ops stmmac_devlink_ops = {};</div><div class='add'>+</div><div class='add'>+static int stmmac_register_devlink(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_devlink_priv *dl_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* For now, what is exposed over devlink is only relevant when</div><div class='add'>+	 * timestamping is available and we have a valid ptp clock rate</div><div class='add'>+	 */</div><div class='add'>+	if (!(priv-&gt;dma_cap.time_stamp || priv-&gt;dma_cap.atime_stamp) ||</div><div class='add'>+	    !priv-&gt;plat-&gt;clk_ptp_rate)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	priv-&gt;devlink = devlink_alloc(&amp;stmmac_devlink_ops, sizeof(*dl_priv),</div><div class='add'>+				      priv-&gt;device);</div><div class='add'>+	if (!priv-&gt;devlink)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dl_priv = devlink_priv(priv-&gt;devlink);</div><div class='add'>+	dl_priv-&gt;stmmac_priv = priv;</div><div class='add'>+</div><div class='add'>+	ret = devlink_params_register(priv-&gt;devlink, stmmac_devlink_params,</div><div class='add'>+				      ARRAY_SIZE(stmmac_devlink_params));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto dl_free;</div><div class='add'>+</div><div class='add'>+	devlink_register(priv-&gt;devlink);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+dl_free:</div><div class='add'>+	devlink_free(priv-&gt;devlink);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void stmmac_unregister_devlink(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;devlink)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	devlink_unregister(priv-&gt;devlink);</div><div class='add'>+	devlink_params_unregister(priv-&gt;devlink, stmmac_devlink_params,</div><div class='add'>+				  ARRAY_SIZE(stmmac_devlink_params));</div><div class='add'>+	devlink_free(priv-&gt;devlink);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct plat_stmmacenet_data *stmmac_plat_dat_alloc(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	plat_dat = devm_kzalloc(dev, sizeof(*plat_dat), GFP_KERNEL);</div><div class='add'>+	if (!plat_dat)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* Set the defaults:</div><div class='add'>+	 * - phy autodetection</div><div class='add'>+	 * - determine GMII_Address CR field from CSR clock</div><div class='add'>+	 * - allow MTU up to JUMBO_LEN</div><div class='add'>+	 * - hash table size</div><div class='add'>+	 * - one unicast filter entry</div><div class='add'>+	 */</div><div class='add'>+	plat_dat-&gt;phy_addr = -1;</div><div class='add'>+	plat_dat-&gt;clk_csr = -1;</div><div class='add'>+	plat_dat-&gt;maxmtu = JUMBO_LEN;</div><div class='add'>+	plat_dat-&gt;multicast_filter_bins = HASH_TABLE_SIZE;</div><div class='add'>+	plat_dat-&gt;unicast_filter_entries = 1;</div><div class='add'>+</div><div class='add'>+	/* Set the mtl defaults */</div><div class='add'>+	plat_dat-&gt;tx_queues_to_use = 1;</div><div class='add'>+	plat_dat-&gt;rx_queues_to_use = 1;</div><div class='add'>+</div><div class='add'>+	/* Setup the default RX queue channel map */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(plat_dat-&gt;rx_queues_cfg); i++)</div><div class='add'>+		plat_dat-&gt;rx_queues_cfg[i].chan = i;</div><div class='add'>+</div><div class='add'>+	return plat_dat;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stmmac_plat_dat_alloc);</div><div class='add'>+</div><div class='add'>+static int __stmmac_dvr_probe(struct device *device,</div><div class='add'>+			      struct plat_stmmacenet_data *plat_dat,</div><div class='add'>+			      struct stmmac_resources *res)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = NULL;</div><div class='ctx'> 	struct stmmac_priv *priv;</div><div class='hunk'>@@ -7362,7 +7667,7 @@ int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	stmmac_set_ethtool_ops(ndev);</div><div class='del'>-	priv-&gt;pause = pause;</div><div class='add'>+	priv-&gt;pause_time = pause;</div><div class='ctx'> 	priv-&gt;plat = plat_dat;</div><div class='ctx'> 	priv-&gt;ioaddr = res-&gt;addr;</div><div class='ctx'> 	priv-&gt;dev-&gt;base_addr = (unsigned long)res-&gt;addr;</div><div class='hunk'>@@ -7402,6 +7707,8 @@ int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;priv-&gt;service_task, stmmac_service_task);</div><div class='ctx'> </div><div class='add'>+	timer_setup(&amp;priv-&gt;eee_ctrl_timer, stmmac_eee_ctrl_timer, 0);</div><div class='add'>+</div><div class='ctx'> 	/* Override with kernel parameters if supplied XXX CRS XXX</div><div class='ctx'> 	 * this needs to have multiple instances</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -7455,7 +7762,7 @@ int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> </div><div class='ctx'> 	if ((priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_TSO_EN) &amp;&amp; (priv-&gt;dma_cap.tsoen)) {</div><div class='ctx'> 		ndev-&gt;hw_features |= NETIF_F_TSO | NETIF_F_TSO6;</div><div class='del'>-		if (priv-&gt;plat-&gt;has_gmac4)</div><div class='add'>+		if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC4)</div><div class='ctx'> 			ndev-&gt;hw_features |= NETIF_F_GSO_UDP_L4;</div><div class='ctx'> 		priv-&gt;tso = true;</div><div class='ctx'> 		dev_info(priv-&gt;device, "TSO feature enabled\n");</div><div class='hunk'>@@ -7464,8 +7771,8 @@ int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> 	if (priv-&gt;dma_cap.sphen &amp;&amp;</div><div class='ctx'> 	    !(priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_SPH_DISABLE)) {</div><div class='ctx'> 		ndev-&gt;hw_features |= NETIF_F_GRO;</div><div class='del'>-		priv-&gt;sph_cap = true;</div><div class='del'>-		priv-&gt;sph = priv-&gt;sph_cap;</div><div class='add'>+		priv-&gt;sph_capable = true;</div><div class='add'>+		priv-&gt;sph_active = priv-&gt;sph_capable;</div><div class='ctx'> 		dev_info(priv-&gt;device, "SPH feature enabled\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -7508,7 +7815,7 @@ int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> #ifdef STMMAC_VLAN_TAG_USED</div><div class='ctx'> 	/* Both mac100 and gmac support receive VLAN tag detection */</div><div class='ctx'> 	ndev-&gt;features |= NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_STAG_RX;</div><div class='del'>-	if (priv-&gt;plat-&gt;has_gmac4) {</div><div class='add'>+	if (dwmac_is_xmac(priv-&gt;plat-&gt;core_type)) {</div><div class='ctx'> 		ndev-&gt;hw_features |= NETIF_F_HW_VLAN_CTAG_RX;</div><div class='ctx'> 		priv-&gt;hw-&gt;hw_vlan_en = true;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -7516,11 +7823,8 @@ int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> 		ndev-&gt;features |= NETIF_F_HW_VLAN_CTAG_FILTER;</div><div class='ctx'> 		ndev-&gt;features |= NETIF_F_HW_VLAN_STAG_FILTER;</div><div class='ctx'> 	}</div><div class='del'>-	if (priv-&gt;dma_cap.vlins) {</div><div class='add'>+	if (priv-&gt;dma_cap.vlins)</div><div class='ctx'> 		ndev-&gt;features |= NETIF_F_HW_VLAN_CTAG_TX;</div><div class='del'>-		if (priv-&gt;dma_cap.dvlan)</div><div class='del'>-			ndev-&gt;features |= NETIF_F_HW_VLAN_STAG_TX;</div><div class='del'>-	}</div><div class='ctx'> #endif</div><div class='ctx'> 	priv-&gt;msg_enable = netif_msg_init(debug, default_msg_level);</div><div class='ctx'> </div><div class='hunk'>@@ -7539,25 +7843,23 @@ int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> </div><div class='ctx'> 	/* MTU range: 46 - hw-specific max */</div><div class='ctx'> 	ndev-&gt;min_mtu = ETH_ZLEN - ETH_HLEN;</div><div class='del'>-	if (priv-&gt;plat-&gt;has_xgmac)</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC)</div><div class='ctx'> 		ndev-&gt;max_mtu = XGMAC_JUMBO_LEN;</div><div class='del'>-	else if ((priv-&gt;plat-&gt;enh_desc) || (priv-&gt;synopsys_id &gt;= DWMAC_CORE_4_00))</div><div class='add'>+	else if (priv-&gt;plat-&gt;enh_desc || priv-&gt;synopsys_id &gt;= DWMAC_CORE_4_00)</div><div class='ctx'> 		ndev-&gt;max_mtu = JUMBO_LEN;</div><div class='ctx'> 	else</div><div class='ctx'> 		ndev-&gt;max_mtu = SKB_MAX_HEAD(NET_SKB_PAD + NET_IP_ALIGN);</div><div class='del'>-	/* Will not overwrite ndev-&gt;max_mtu if plat-&gt;maxmtu &gt; ndev-&gt;max_mtu</div><div class='del'>-	 * as well as plat-&gt;maxmtu &lt; ndev-&gt;min_mtu which is a invalid range.</div><div class='add'>+</div><div class='add'>+	/* Warn if the platform's maxmtu is smaller than the minimum MTU,</div><div class='add'>+	 * otherwise clamp the maximum MTU above to the platform's maxmtu.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((priv-&gt;plat-&gt;maxmtu &lt; ndev-&gt;max_mtu) &amp;&amp;</div><div class='del'>-	    (priv-&gt;plat-&gt;maxmtu &gt;= ndev-&gt;min_mtu))</div><div class='del'>-		ndev-&gt;max_mtu = priv-&gt;plat-&gt;maxmtu;</div><div class='del'>-	else if (priv-&gt;plat-&gt;maxmtu &lt; ndev-&gt;min_mtu)</div><div class='add'>+	if (priv-&gt;plat-&gt;maxmtu &lt; ndev-&gt;min_mtu)</div><div class='ctx'> 		dev_warn(priv-&gt;device,</div><div class='ctx'> 			 "%s: warning: maxmtu having invalid value (%d)\n",</div><div class='ctx'> 			 __func__, priv-&gt;plat-&gt;maxmtu);</div><div class='del'>-</div><div class='del'>-	if (flow_ctrl)</div><div class='del'>-		priv-&gt;flow_ctrl = FLOW_AUTO;	/* RX/TX pause on */</div><div class='add'>+	else if (priv-&gt;plat-&gt;maxmtu &lt; ndev-&gt;max_mtu)</div><div class='add'>+		ndev-&gt;max_mtu = priv-&gt;plat-&gt;maxmtu;</div><div class='ctx'> </div><div class='ctx'> 	ndev-&gt;priv_flags |= IFF_LIVE_ADDR_CHANGE;</div><div class='ctx'> </div><div class='hunk'>@@ -7568,17 +7870,6 @@ int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> </div><div class='ctx'> 	stmmac_fpe_init(priv);</div><div class='ctx'> </div><div class='del'>-	/* If a specific clk_csr value is passed from the platform</div><div class='del'>-	 * this means that the CSR Clock Range selection cannot be</div><div class='del'>-	 * changed at run-time and it is fixed. Viceversa the driver'll try to</div><div class='del'>-	 * set the MDC clock dynamically according to the csr actual</div><div class='del'>-	 * clock input.</div><div class='del'>-	 */</div><div class='del'>-	if (priv-&gt;plat-&gt;clk_csr &gt;= 0)</div><div class='del'>-		priv-&gt;clk_csr = priv-&gt;plat-&gt;clk_csr;</div><div class='del'>-	else</div><div class='del'>-		stmmac_clk_csr_set(priv);</div><div class='del'>-</div><div class='ctx'> 	stmmac_check_pcs_mode(priv);</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_get_noresume(device);</div><div class='hunk'>@@ -7594,19 +7885,20 @@ int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> 		goto error_mdio_register;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;plat-&gt;speed_mode_2500)</div><div class='del'>-		priv-&gt;plat-&gt;speed_mode_2500(ndev, priv-&gt;plat-&gt;bsp_priv);</div><div class='del'>-</div><div class='ctx'> 	ret = stmmac_pcs_setup(ndev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto error_pcs_setup;</div><div class='ctx'> </div><div class='del'>-	ret = stmmac_phy_setup(priv);</div><div class='add'>+	ret = stmmac_phylink_setup(priv);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_err(ndev, "failed to setup phy (%d)\n", ret);</div><div class='ctx'> 		goto error_phy_setup;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = stmmac_register_devlink(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error_devlink_setup;</div><div class='add'>+</div><div class='ctx'> 	ret = register_netdev(ndev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(priv-&gt;device, "%s: ERROR %i registering the device\n",</div><div class='hunk'>@@ -7629,6 +7921,8 @@ int stmmac_dvr_probe(struct device *device,</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> error_netdev_register:</div><div class='add'>+	stmmac_unregister_devlink(priv);</div><div class='add'>+error_devlink_setup:</div><div class='ctx'> 	phylink_destroy(priv-&gt;phylink);</div><div class='ctx'> error_phy_setup:</div><div class='ctx'> 	stmmac_pcs_clean(ndev);</div><div class='hunk'>@@ -7643,6 +7937,34 @@ error_wq_init:</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * stmmac_dvr_probe</div><div class='add'>+ * @dev: device pointer</div><div class='add'>+ * @plat_dat: platform data pointer</div><div class='add'>+ * @res: stmmac resource pointer</div><div class='add'>+ * Description: this is the main probe function used to</div><div class='add'>+ * call the alloc_etherdev, allocate the priv structure.</div><div class='add'>+ * Return:</div><div class='add'>+ * returns 0 on success, otherwise errno.</div><div class='add'>+ */</div><div class='add'>+int stmmac_dvr_probe(struct device *dev, struct plat_stmmacenet_data *plat_dat,</div><div class='add'>+		     struct stmmac_resources *res)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (plat_dat-&gt;init) {</div><div class='add'>+		ret = plat_dat-&gt;init(dev, plat_dat-&gt;bsp_priv);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = __stmmac_dvr_probe(dev, plat_dat, res);</div><div class='add'>+	if (ret &amp;&amp; plat_dat-&gt;exit)</div><div class='add'>+		plat_dat-&gt;exit(dev, plat_dat-&gt;bsp_priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL_GPL(stmmac_dvr_probe);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -7660,13 +7982,13 @@ void stmmac_dvr_remove(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_get_sync(dev);</div><div class='ctx'> </div><div class='del'>-	stmmac_stop_all_dma(priv);</div><div class='del'>-	stmmac_mac_set(priv, priv-&gt;ioaddr, false);</div><div class='ctx'> 	unregister_netdev(ndev);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> 	stmmac_exit_fs(ndev);</div><div class='ctx'> #endif</div><div class='add'>+	stmmac_unregister_devlink(priv);</div><div class='add'>+</div><div class='ctx'> 	phylink_destroy(priv-&gt;phylink);</div><div class='ctx'> 	if (priv-&gt;plat-&gt;stmmac_rst)</div><div class='ctx'> 		reset_control_assert(priv-&gt;plat-&gt;stmmac_rst);</div><div class='hunk'>@@ -7681,6 +8003,9 @@ void stmmac_dvr_remove(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	pm_runtime_disable(dev);</div><div class='ctx'> 	pm_runtime_put_noidle(dev);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;plat-&gt;exit)</div><div class='add'>+		priv-&gt;plat-&gt;exit(dev, priv-&gt;plat-&gt;bsp_priv);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(stmmac_dvr_remove);</div><div class='ctx'> </div><div class='hunk'>@@ -7709,9 +8034,9 @@ int stmmac_suspend(struct device *dev)</div><div class='ctx'> 	for (chan = 0; chan &lt; priv-&gt;plat-&gt;tx_queues_to_use; chan++)</div><div class='ctx'> 		hrtimer_cancel(&amp;priv-&gt;dma_conf.tx_queue[chan].txtimer);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;eee_enabled) {</div><div class='add'>+	if (priv-&gt;eee_sw_timer_en) {</div><div class='ctx'> 		priv-&gt;tx_path_in_lpi_mode = false;</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='add'>+		timer_delete_sync(&amp;priv-&gt;eee_ctrl_timer);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Stop TX/RX DMA */</div><div class='hunk'>@@ -7721,7 +8046,7 @@ int stmmac_suspend(struct device *dev)</div><div class='ctx'> 		priv-&gt;plat-&gt;serdes_powerdown(ndev, priv-&gt;plat-&gt;bsp_priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable Power down mode by programming the PMT regs */</div><div class='del'>-	if (device_may_wakeup(priv-&gt;device) &amp;&amp; priv-&gt;plat-&gt;pmt) {</div><div class='add'>+	if (priv-&gt;wolopts) {</div><div class='ctx'> 		stmmac_pmt(priv, priv-&gt;hw, priv-&gt;wolopts);</div><div class='ctx'> 		priv-&gt;irq_wake = 1;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -7732,19 +8057,15 @@ int stmmac_suspend(struct device *dev)</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='del'>-	if (device_may_wakeup(priv-&gt;device) &amp;&amp; priv-&gt;plat-&gt;pmt) {</div><div class='del'>-		phylink_suspend(priv-&gt;phylink, true);</div><div class='del'>-	} else {</div><div class='del'>-		if (device_may_wakeup(priv-&gt;device))</div><div class='del'>-			phylink_speed_down(priv-&gt;phylink, false);</div><div class='del'>-		phylink_suspend(priv-&gt;phylink, false);</div><div class='del'>-	}</div><div class='add'>+	phylink_suspend(priv-&gt;phylink, !!priv-&gt;wolopts);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	if (stmmac_fpe_supported(priv))</div><div class='del'>-		timer_shutdown_sync(&amp;priv-&gt;fpe_cfg.verify_timer);</div><div class='add'>+		ethtool_mmsv_stop(&amp;priv-&gt;fpe_cfg.mmsv);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;plat-&gt;suspend)</div><div class='add'>+		return priv-&gt;plat-&gt;suspend(dev, priv-&gt;plat-&gt;bsp_priv);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;speed = SPEED_UNKNOWN;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(stmmac_suspend);</div><div class='hunk'>@@ -7797,6 +8118,12 @@ int stmmac_resume(struct device *dev)</div><div class='ctx'> 	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;plat-&gt;resume) {</div><div class='add'>+		ret = priv-&gt;plat-&gt;resume(dev, priv-&gt;plat-&gt;bsp_priv);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -7806,7 +8133,7 @@ int stmmac_resume(struct device *dev)</div><div class='ctx'> 	 * this bit because it can generate problems while resuming</div><div class='ctx'> 	 * from another devices (e.g. serial console).</div><div class='ctx'> 	 */</div><div class='del'>-	if (device_may_wakeup(priv-&gt;device) &amp;&amp; priv-&gt;plat-&gt;pmt) {</div><div class='add'>+	if (priv-&gt;wolopts) {</div><div class='ctx'> 		mutex_lock(&amp;priv-&gt;lock);</div><div class='ctx'> 		stmmac_pmt(priv, priv-&gt;hw, 0);</div><div class='ctx'> 		mutex_unlock(&amp;priv-&gt;lock);</div><div class='hunk'>@@ -7828,16 +8155,12 @@ int stmmac_resume(struct device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='del'>-	if (device_may_wakeup(priv-&gt;device) &amp;&amp; priv-&gt;plat-&gt;pmt) {</div><div class='del'>-		phylink_resume(priv-&gt;phylink);</div><div class='del'>-	} else {</div><div class='del'>-		phylink_resume(priv-&gt;phylink);</div><div class='del'>-		if (device_may_wakeup(priv-&gt;device))</div><div class='del'>-			phylink_speed_up(priv-&gt;phylink);</div><div class='del'>-	}</div><div class='del'>-	rtnl_unlock();</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='add'>+	/* Prepare the PHY to resume, ensuring that its clocks which are</div><div class='add'>+	 * necessary for the MAC DMA reset to complete are running</div><div class='add'>+	 */</div><div class='add'>+	phylink_prepare_resume(priv-&gt;phylink);</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	stmmac_reset_queues_param(priv);</div><div class='hunk'>@@ -7845,16 +8168,33 @@ int stmmac_resume(struct device *dev)</div><div class='ctx'> 	stmmac_free_tx_skbufs(priv);</div><div class='ctx'> 	stmmac_clear_descriptors(priv, &amp;priv-&gt;dma_conf);</div><div class='ctx'> </div><div class='del'>-	stmmac_hw_setup(ndev, false);</div><div class='add'>+	ret = stmmac_hw_setup(ndev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(priv-&gt;dev, "%s: Hw setup failed\n", __func__);</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stmmac_init_timestamping(priv);</div><div class='add'>+</div><div class='ctx'> 	stmmac_init_coalesce(priv);</div><div class='add'>+	phylink_rx_clk_stop_block(priv-&gt;phylink);</div><div class='ctx'> 	stmmac_set_rx_mode(ndev);</div><div class='ctx'> </div><div class='ctx'> 	stmmac_restore_hw_vlan_rx_fltr(priv, ndev, priv-&gt;hw);</div><div class='add'>+	phylink_rx_clk_stop_unblock(priv-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	stmmac_enable_all_queues(priv);</div><div class='ctx'> 	stmmac_enable_all_dma_irq(priv);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* phylink_resume() must be called after the hardware has been</div><div class='add'>+	 * initialised because it may bring the link up immediately in a</div><div class='add'>+	 * workqueue thread, which will race with initialisation.</div><div class='add'>+	 */</div><div class='add'>+	phylink_resume(priv-&gt;phylink);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	netif_device_attach(ndev);</div><div class='hunk'>@@ -7863,6 +8203,10 @@ int stmmac_resume(struct device *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(stmmac_resume);</div><div class='ctx'> </div><div class='add'>+/* This is not the same as EXPORT_GPL_SIMPLE_DEV_PM_OPS() when CONFIG_PM=n */</div><div class='add'>+DEFINE_SIMPLE_DEV_PM_OPS(stmmac_simple_pm_ops, stmmac_suspend, stmmac_resume);</div><div class='add'>+EXPORT_SYMBOL_GPL(stmmac_simple_pm_ops);</div><div class='add'>+</div><div class='ctx'> #ifndef MODULE</div><div class='ctx'> static int __init stmmac_cmdline_opt(char *str)</div><div class='ctx'> {</div><div class='hunk'>@@ -7877,9 +8221,6 @@ static int __init stmmac_cmdline_opt(char *str)</div><div class='ctx'> 		} else if (!strncmp(opt, "phyaddr:", 8)) {</div><div class='ctx'> 			if (kstrtoint(opt + 8, 0, &amp;phyaddr))</div><div class='ctx'> 				goto err;</div><div class='del'>-		} else if (!strncmp(opt, "buf_sz:", 7)) {</div><div class='del'>-			if (kstrtoint(opt + 7, 0, &amp;buf_sz))</div><div class='del'>-				goto err;</div><div class='ctx'> 		} else if (!strncmp(opt, "tc:", 3)) {</div><div class='ctx'> 			if (kstrtoint(opt + 3, 0, &amp;tc))</div><div class='ctx'> 				goto err;</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c<br/>index 0c7d81ddd440..1e82850f2a25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c</a></div><div class='hunk'>@@ -23,9 +23,9 @@</div><div class='ctx'> #include "dwxgmac2.h"</div><div class='ctx'> #include "stmmac.h"</div><div class='ctx'> </div><div class='del'>-#define MII_BUSY 0x00000001</div><div class='del'>-#define MII_WRITE 0x00000002</div><div class='del'>-#define MII_DATA_MASK GENMASK(15, 0)</div><div class='add'>+#define MII_ADDR_GBUSY			BIT(0)</div><div class='add'>+#define MII_ADDR_GWRITE			BIT(1)</div><div class='add'>+#define MII_DATA_GD_MASK		GENMASK(15, 0)</div><div class='ctx'> </div><div class='ctx'> /* GMAC4 defines */</div><div class='ctx'> #define MII_GMAC4_GOC_SHIFT		2</div><div class='hunk'>@@ -45,6 +45,16 @@</div><div class='ctx'> #define MII_XGMAC_PA_SHIFT		16</div><div class='ctx'> #define MII_XGMAC_DA_SHIFT		21</div><div class='ctx'> </div><div class='add'>+static int stmmac_mdio_wait(void __iomem *reg, u32 mask)</div><div class='add'>+{</div><div class='add'>+	u32 v;</div><div class='add'>+</div><div class='add'>+	if (readl_poll_timeout(reg, v, !(v &amp; mask), 100, 10000))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void stmmac_xgmac2_c45_format(struct stmmac_priv *priv, int phyaddr,</div><div class='ctx'> 				     int devad, int phyreg, u32 *hw_addr)</div><div class='ctx'> {</div><div class='hunk'>@@ -83,7 +93,6 @@ static int stmmac_xgmac2_mdio_read(struct stmmac_priv *priv, u32 addr,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int mii_address = priv-&gt;hw-&gt;mii.addr;</div><div class='ctx'> 	unsigned int mii_data = priv-&gt;hw-&gt;mii.data;</div><div class='del'>-	u32 tmp;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = pm_runtime_resume_and_get(priv-&gt;device);</div><div class='hunk'>@@ -91,33 +100,25 @@ static int stmmac_xgmac2_mdio_read(struct stmmac_priv *priv, u32 addr,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until any existing MII operation is complete */</div><div class='del'>-	if (readl_poll_timeout(priv-&gt;ioaddr + mii_data, tmp,</div><div class='del'>-			       !(tmp &amp; MII_XGMAC_BUSY), 100, 10000)) {</div><div class='del'>-		ret = -EBUSY;</div><div class='add'>+	ret = stmmac_mdio_wait(priv-&gt;ioaddr + mii_data, MII_XGMAC_BUSY);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto err_disable_clks;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	value |= (priv-&gt;clk_csr &lt;&lt; priv-&gt;hw-&gt;mii.clk_csr_shift)</div><div class='del'>-		&amp; priv-&gt;hw-&gt;mii.clk_csr_mask;</div><div class='del'>-	value |= MII_XGMAC_READ;</div><div class='add'>+	value |= priv-&gt;gmii_address_bus_config | MII_XGMAC_READ;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until any existing MII operation is complete */</div><div class='del'>-	if (readl_poll_timeout(priv-&gt;ioaddr + mii_data, tmp,</div><div class='del'>-			       !(tmp &amp; MII_XGMAC_BUSY), 100, 10000)) {</div><div class='del'>-		ret = -EBUSY;</div><div class='add'>+	ret = stmmac_mdio_wait(priv-&gt;ioaddr + mii_data, MII_XGMAC_BUSY);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto err_disable_clks;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set the MII address register to read */</div><div class='ctx'> 	writel(addr, priv-&gt;ioaddr + mii_address);</div><div class='ctx'> 	writel(value, priv-&gt;ioaddr + mii_data);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until any existing MII operation is complete */</div><div class='del'>-	if (readl_poll_timeout(priv-&gt;ioaddr + mii_data, tmp,</div><div class='del'>-			       !(tmp &amp; MII_XGMAC_BUSY), 100, 10000)) {</div><div class='del'>-		ret = -EBUSY;</div><div class='add'>+	ret = stmmac_mdio_wait(priv-&gt;ioaddr + mii_data, MII_XGMAC_BUSY);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto err_disable_clks;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* Read the data from the MII data register */</div><div class='ctx'> 	ret = (int)readl(priv-&gt;ioaddr + mii_data) &amp; GENMASK(15, 0);</div><div class='hunk'>@@ -131,12 +132,9 @@ err_disable_clks:</div><div class='ctx'> static int stmmac_xgmac2_mdio_read_c22(struct mii_bus *bus, int phyaddr,</div><div class='ctx'> 				       int phyreg)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = bus-&gt;priv;</div><div class='del'>-	struct stmmac_priv *priv;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(bus-&gt;priv);</div><div class='ctx'> 	u32 addr;</div><div class='ctx'> </div><div class='del'>-	priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='ctx'> 	/* Until ver 2.20 XGMAC does not support C22 addr &gt;= 4 */</div><div class='ctx'> 	if (priv-&gt;synopsys_id &lt; DWXGMAC_CORE_2_20 &amp;&amp;</div><div class='ctx'> 	    phyaddr &gt; MII_XGMAC_MAX_C22ADDR)</div><div class='hunk'>@@ -150,12 +148,9 @@ static int stmmac_xgmac2_mdio_read_c22(struct mii_bus *bus, int phyaddr,</div><div class='ctx'> static int stmmac_xgmac2_mdio_read_c45(struct mii_bus *bus, int phyaddr,</div><div class='ctx'> 				       int devad, int phyreg)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = bus-&gt;priv;</div><div class='del'>-	struct stmmac_priv *priv;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(bus-&gt;priv);</div><div class='ctx'> 	u32 addr;</div><div class='ctx'> </div><div class='del'>-	priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='ctx'> 	stmmac_xgmac2_c45_format(priv, phyaddr, devad, phyreg, &amp;addr);</div><div class='ctx'> </div><div class='ctx'> 	return stmmac_xgmac2_mdio_read(priv, addr, MII_XGMAC_BUSY);</div><div class='hunk'>@@ -166,7 +161,6 @@ static int stmmac_xgmac2_mdio_write(struct stmmac_priv *priv, u32 addr,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int mii_address = priv-&gt;hw-&gt;mii.addr;</div><div class='ctx'> 	unsigned int mii_data = priv-&gt;hw-&gt;mii.data;</div><div class='del'>-	u32 tmp;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = pm_runtime_resume_and_get(priv-&gt;device);</div><div class='hunk'>@@ -174,31 +168,23 @@ static int stmmac_xgmac2_mdio_write(struct stmmac_priv *priv, u32 addr,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until any existing MII operation is complete */</div><div class='del'>-	if (readl_poll_timeout(priv-&gt;ioaddr + mii_data, tmp,</div><div class='del'>-			       !(tmp &amp; MII_XGMAC_BUSY), 100, 10000)) {</div><div class='del'>-		ret = -EBUSY;</div><div class='add'>+	ret = stmmac_mdio_wait(priv-&gt;ioaddr + mii_data, MII_XGMAC_BUSY);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto err_disable_clks;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	value |= (priv-&gt;clk_csr &lt;&lt; priv-&gt;hw-&gt;mii.clk_csr_shift)</div><div class='del'>-		&amp; priv-&gt;hw-&gt;mii.clk_csr_mask;</div><div class='del'>-	value |= phydata;</div><div class='del'>-	value |= MII_XGMAC_WRITE;</div><div class='add'>+	value |= priv-&gt;gmii_address_bus_config | phydata | MII_XGMAC_WRITE;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until any existing MII operation is complete */</div><div class='del'>-	if (readl_poll_timeout(priv-&gt;ioaddr + mii_data, tmp,</div><div class='del'>-			       !(tmp &amp; MII_XGMAC_BUSY), 100, 10000)) {</div><div class='del'>-		ret = -EBUSY;</div><div class='add'>+	ret = stmmac_mdio_wait(priv-&gt;ioaddr + mii_data, MII_XGMAC_BUSY);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		goto err_disable_clks;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set the MII address register to write */</div><div class='ctx'> 	writel(addr, priv-&gt;ioaddr + mii_address);</div><div class='ctx'> 	writel(value, priv-&gt;ioaddr + mii_data);</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until any existing MII operation is complete */</div><div class='del'>-	ret = readl_poll_timeout(priv-&gt;ioaddr + mii_data, tmp,</div><div class='del'>-				 !(tmp &amp; MII_XGMAC_BUSY), 100, 10000);</div><div class='add'>+	ret = stmmac_mdio_wait(priv-&gt;ioaddr + mii_data, MII_XGMAC_BUSY);</div><div class='ctx'> </div><div class='ctx'> err_disable_clks:</div><div class='ctx'> 	pm_runtime_put(priv-&gt;device);</div><div class='hunk'>@@ -209,12 +195,9 @@ err_disable_clks:</div><div class='ctx'> static int stmmac_xgmac2_mdio_write_c22(struct mii_bus *bus, int phyaddr,</div><div class='ctx'> 					int phyreg, u16 phydata)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = bus-&gt;priv;</div><div class='del'>-	struct stmmac_priv *priv;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(bus-&gt;priv);</div><div class='ctx'> 	u32 addr;</div><div class='ctx'> </div><div class='del'>-	priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='ctx'> 	/* Until ver 2.20 XGMAC does not support C22 addr &gt;= 4 */</div><div class='ctx'> 	if (priv-&gt;synopsys_id &lt; DWXGMAC_CORE_2_20 &amp;&amp;</div><div class='ctx'> 	    phyaddr &gt; MII_XGMAC_MAX_C22ADDR)</div><div class='hunk'>@@ -229,37 +212,78 @@ static int stmmac_xgmac2_mdio_write_c22(struct mii_bus *bus, int phyaddr,</div><div class='ctx'> static int stmmac_xgmac2_mdio_write_c45(struct mii_bus *bus, int phyaddr,</div><div class='ctx'> 					int devad, int phyreg, u16 phydata)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = bus-&gt;priv;</div><div class='del'>-	struct stmmac_priv *priv;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(bus-&gt;priv);</div><div class='ctx'> 	u32 addr;</div><div class='ctx'> </div><div class='del'>-	priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='ctx'> 	stmmac_xgmac2_c45_format(priv, phyaddr, devad, phyreg, &amp;addr);</div><div class='ctx'> </div><div class='ctx'> 	return stmmac_xgmac2_mdio_write(priv, addr, MII_XGMAC_BUSY,</div><div class='ctx'> 					phydata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int stmmac_mdio_read(struct stmmac_priv *priv, int data, u32 value)</div><div class='add'>+/**</div><div class='add'>+ * stmmac_mdio_format_addr() - format the address register</div><div class='add'>+ * @priv: struct stmmac_priv pointer</div><div class='add'>+ * @pa: 5-bit MDIO package address</div><div class='add'>+ * @gr: 5-bit MDIO register address (C22) or MDIO device address (C45)</div><div class='add'>+ *</div><div class='add'>+ * Return: formatted address register</div><div class='add'>+ */</div><div class='add'>+static u32 stmmac_mdio_format_addr(struct stmmac_priv *priv,</div><div class='add'>+				   unsigned int pa, unsigned int gr)</div><div class='ctx'> {</div><div class='del'>-	unsigned int mii_address = priv-&gt;hw-&gt;mii.addr;</div><div class='del'>-	unsigned int mii_data = priv-&gt;hw-&gt;mii.data;</div><div class='del'>-	u32 v;</div><div class='add'>+	const struct mii_regs *mii_regs = &amp;priv-&gt;hw-&gt;mii;</div><div class='ctx'> </div><div class='del'>-	if (readl_poll_timeout(priv-&gt;ioaddr + mii_address, v, !(v &amp; MII_BUSY),</div><div class='del'>-			       100, 10000))</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	return ((pa &lt;&lt; mii_regs-&gt;addr_shift) &amp; mii_regs-&gt;addr_mask) |</div><div class='add'>+	       ((gr &lt;&lt; mii_regs-&gt;reg_shift) &amp; mii_regs-&gt;reg_mask) |</div><div class='add'>+	       priv-&gt;gmii_address_bus_config |</div><div class='add'>+	       MII_ADDR_GBUSY;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	writel(data, priv-&gt;ioaddr + mii_data);</div><div class='del'>-	writel(value, priv-&gt;ioaddr + mii_address);</div><div class='add'>+static int stmmac_mdio_access(struct stmmac_priv *priv, unsigned int pa,</div><div class='add'>+			      unsigned int gr, u32 cmd, u32 data, bool read)</div><div class='add'>+{</div><div class='add'>+	void __iomem *mii_address = priv-&gt;ioaddr + priv-&gt;hw-&gt;mii.addr;</div><div class='add'>+	void __iomem *mii_data = priv-&gt;ioaddr + priv-&gt;hw-&gt;mii.data;</div><div class='add'>+	u32 addr;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (readl_poll_timeout(priv-&gt;ioaddr + mii_address, v, !(v &amp; MII_BUSY),</div><div class='del'>-			       100, 10000))</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	ret = pm_runtime_resume_and_get(priv-&gt;device);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	/* Read the data from the MII data register */</div><div class='del'>-	return readl(priv-&gt;ioaddr + mii_data) &amp; MII_DATA_MASK;</div><div class='add'>+	ret = stmmac_mdio_wait(mii_address, MII_ADDR_GBUSY);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	addr = stmmac_mdio_format_addr(priv, pa, gr) | cmd;</div><div class='add'>+</div><div class='add'>+	writel(data, mii_data);</div><div class='add'>+	writel(addr, mii_address);</div><div class='add'>+</div><div class='add'>+	ret = stmmac_mdio_wait(mii_address, MII_ADDR_GBUSY);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Read the data from the MII data register if in read mode */</div><div class='add'>+	ret = read ? readl(mii_data) &amp; MII_DATA_GD_MASK : 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	pm_runtime_put(priv-&gt;device);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stmmac_mdio_read(struct stmmac_priv *priv, unsigned int pa,</div><div class='add'>+			    unsigned int gr, u32 cmd, int data)</div><div class='add'>+{</div><div class='add'>+	return stmmac_mdio_access(priv, pa, gr, cmd, data, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stmmac_mdio_write(struct stmmac_priv *priv, unsigned int pa,</div><div class='add'>+			     unsigned int gr, u32 cmd, int data)</div><div class='add'>+{</div><div class='add'>+	return stmmac_mdio_access(priv, pa, gr, cmd, data, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -274,28 +298,15 @@ static int stmmac_mdio_read(struct stmmac_priv *priv, int data, u32 value)</div><div class='ctx'>  */</div><div class='ctx'> static int stmmac_mdio_read_c22(struct mii_bus *bus, int phyaddr, int phyreg)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = bus-&gt;priv;</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u32 value = MII_BUSY;</div><div class='del'>-	int data = 0;</div><div class='del'>-</div><div class='del'>-	data = pm_runtime_resume_and_get(priv-&gt;device);</div><div class='del'>-	if (data &lt; 0)</div><div class='del'>-		return data;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(bus-&gt;priv);</div><div class='add'>+	u32 cmd;</div><div class='ctx'> </div><div class='del'>-	value |= (phyaddr &lt;&lt; priv-&gt;hw-&gt;mii.addr_shift)</div><div class='del'>-		&amp; priv-&gt;hw-&gt;mii.addr_mask;</div><div class='del'>-	value |= (phyreg &lt;&lt; priv-&gt;hw-&gt;mii.reg_shift) &amp; priv-&gt;hw-&gt;mii.reg_mask;</div><div class='del'>-	value |= (priv-&gt;clk_csr &lt;&lt; priv-&gt;hw-&gt;mii.clk_csr_shift)</div><div class='del'>-		&amp; priv-&gt;hw-&gt;mii.clk_csr_mask;</div><div class='del'>-	if (priv-&gt;plat-&gt;has_gmac4)</div><div class='del'>-		value |= MII_GMAC4_READ;</div><div class='del'>-</div><div class='del'>-	data = stmmac_mdio_read(priv, data, value);</div><div class='del'>-</div><div class='del'>-	pm_runtime_put(priv-&gt;device);</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC4)</div><div class='add'>+		cmd = MII_GMAC4_READ;</div><div class='add'>+	else</div><div class='add'>+		cmd = 0;</div><div class='ctx'> </div><div class='del'>-	return data;</div><div class='add'>+	return stmmac_mdio_read(priv, phyaddr, phyreg, cmd, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -312,54 +323,11 @@ static int stmmac_mdio_read_c22(struct mii_bus *bus, int phyaddr, int phyreg)</div><div class='ctx'> static int stmmac_mdio_read_c45(struct mii_bus *bus, int phyaddr, int devad,</div><div class='ctx'> 				int phyreg)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = bus-&gt;priv;</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u32 value = MII_BUSY;</div><div class='del'>-	int data = 0;</div><div class='del'>-</div><div class='del'>-	data = pm_runtime_get_sync(priv-&gt;device);</div><div class='del'>-	if (data &lt; 0) {</div><div class='del'>-		pm_runtime_put_noidle(priv-&gt;device);</div><div class='del'>-		return data;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	value |= (phyaddr &lt;&lt; priv-&gt;hw-&gt;mii.addr_shift)</div><div class='del'>-		&amp; priv-&gt;hw-&gt;mii.addr_mask;</div><div class='del'>-	value |= (phyreg &lt;&lt; priv-&gt;hw-&gt;mii.reg_shift) &amp; priv-&gt;hw-&gt;mii.reg_mask;</div><div class='del'>-	value |= (priv-&gt;clk_csr &lt;&lt; priv-&gt;hw-&gt;mii.clk_csr_shift)</div><div class='del'>-		&amp; priv-&gt;hw-&gt;mii.clk_csr_mask;</div><div class='del'>-	value |= MII_GMAC4_READ;</div><div class='del'>-	value |= MII_GMAC4_C45E;</div><div class='del'>-	value &amp;= ~priv-&gt;hw-&gt;mii.reg_mask;</div><div class='del'>-	value |= (devad &lt;&lt; priv-&gt;hw-&gt;mii.reg_shift) &amp; priv-&gt;hw-&gt;mii.reg_mask;</div><div class='del'>-</div><div class='del'>-	data |= phyreg &lt;&lt; MII_GMAC4_REG_ADDR_SHIFT;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(bus-&gt;priv);</div><div class='add'>+	int data = phyreg &lt;&lt; MII_GMAC4_REG_ADDR_SHIFT;</div><div class='add'>+	u32 cmd = MII_GMAC4_READ | MII_GMAC4_C45E;</div><div class='ctx'> </div><div class='del'>-	data = stmmac_mdio_read(priv, data, value);</div><div class='del'>-</div><div class='del'>-	pm_runtime_put(priv-&gt;device);</div><div class='del'>-</div><div class='del'>-	return data;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int stmmac_mdio_write(struct stmmac_priv *priv, int data, u32 value)</div><div class='del'>-{</div><div class='del'>-	unsigned int mii_address = priv-&gt;hw-&gt;mii.addr;</div><div class='del'>-	unsigned int mii_data = priv-&gt;hw-&gt;mii.data;</div><div class='del'>-	u32 v;</div><div class='del'>-</div><div class='del'>-	/* Wait until any existing MII operation is complete */</div><div class='del'>-	if (readl_poll_timeout(priv-&gt;ioaddr + mii_address, v, !(v &amp; MII_BUSY),</div><div class='del'>-			       100, 10000))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	/* Set the MII address register to write */</div><div class='del'>-	writel(data, priv-&gt;ioaddr + mii_data);</div><div class='del'>-	writel(value, priv-&gt;ioaddr + mii_address);</div><div class='del'>-</div><div class='del'>-	/* Wait until any existing MII operation is complete */</div><div class='del'>-	return readl_poll_timeout(priv-&gt;ioaddr + mii_address, v,</div><div class='del'>-				  !(v &amp; MII_BUSY), 100, 10000);</div><div class='add'>+	return stmmac_mdio_read(priv, phyaddr, devad, cmd, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -373,31 +341,15 @@ static int stmmac_mdio_write(struct stmmac_priv *priv, int data, u32 value)</div><div class='ctx'> static int stmmac_mdio_write_c22(struct mii_bus *bus, int phyaddr, int phyreg,</div><div class='ctx'> 				 u16 phydata)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = bus-&gt;priv;</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	int ret, data = phydata;</div><div class='del'>-	u32 value = MII_BUSY;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(bus-&gt;priv);</div><div class='add'>+	u32 cmd;</div><div class='ctx'> </div><div class='del'>-	ret = pm_runtime_resume_and_get(priv-&gt;device);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	value |= (phyaddr &lt;&lt; priv-&gt;hw-&gt;mii.addr_shift)</div><div class='del'>-		&amp; priv-&gt;hw-&gt;mii.addr_mask;</div><div class='del'>-	value |= (phyreg &lt;&lt; priv-&gt;hw-&gt;mii.reg_shift) &amp; priv-&gt;hw-&gt;mii.reg_mask;</div><div class='del'>-</div><div class='del'>-	value |= (priv-&gt;clk_csr &lt;&lt; priv-&gt;hw-&gt;mii.clk_csr_shift)</div><div class='del'>-		&amp; priv-&gt;hw-&gt;mii.clk_csr_mask;</div><div class='del'>-	if (priv-&gt;plat-&gt;has_gmac4)</div><div class='del'>-		value |= MII_GMAC4_WRITE;</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC4)</div><div class='add'>+		cmd = MII_GMAC4_WRITE;</div><div class='ctx'> 	else</div><div class='del'>-		value |= MII_WRITE;</div><div class='add'>+		cmd = MII_ADDR_GWRITE;</div><div class='ctx'> </div><div class='del'>-	ret = stmmac_mdio_write(priv, data, value);</div><div class='del'>-</div><div class='del'>-	pm_runtime_put(priv-&gt;device);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return stmmac_mdio_write(priv, phyaddr, phyreg, cmd, phydata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -412,36 +364,13 @@ static int stmmac_mdio_write_c22(struct mii_bus *bus, int phyaddr, int phyreg,</div><div class='ctx'> static int stmmac_mdio_write_c45(struct mii_bus *bus, int phyaddr,</div><div class='ctx'> 				 int devad, int phyreg, u16 phydata)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = bus-&gt;priv;</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	int ret, data = phydata;</div><div class='del'>-	u32 value = MII_BUSY;</div><div class='del'>-</div><div class='del'>-	ret = pm_runtime_get_sync(priv-&gt;device);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		pm_runtime_put_noidle(priv-&gt;device);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	value |= (phyaddr &lt;&lt; priv-&gt;hw-&gt;mii.addr_shift)</div><div class='del'>-		&amp; priv-&gt;hw-&gt;mii.addr_mask;</div><div class='del'>-	value |= (phyreg &lt;&lt; priv-&gt;hw-&gt;mii.reg_shift) &amp; priv-&gt;hw-&gt;mii.reg_mask;</div><div class='del'>-</div><div class='del'>-	value |= (priv-&gt;clk_csr &lt;&lt; priv-&gt;hw-&gt;mii.clk_csr_shift)</div><div class='del'>-		&amp; priv-&gt;hw-&gt;mii.clk_csr_mask;</div><div class='del'>-</div><div class='del'>-	value |= MII_GMAC4_WRITE;</div><div class='del'>-	value |= MII_GMAC4_C45E;</div><div class='del'>-	value &amp;= ~priv-&gt;hw-&gt;mii.reg_mask;</div><div class='del'>-	value |= (devad &lt;&lt; priv-&gt;hw-&gt;mii.reg_shift) &amp; priv-&gt;hw-&gt;mii.reg_mask;</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(bus-&gt;priv);</div><div class='add'>+	u32 cmd = MII_GMAC4_WRITE | MII_GMAC4_C45E;</div><div class='add'>+	int data = phydata;</div><div class='ctx'> </div><div class='ctx'> 	data |= phyreg &lt;&lt; MII_GMAC4_REG_ADDR_SHIFT;</div><div class='ctx'> </div><div class='del'>-	ret = stmmac_mdio_write(priv, data, value);</div><div class='del'>-</div><div class='del'>-	pm_runtime_put(priv-&gt;device);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return stmmac_mdio_write(priv, phyaddr, devad, cmd, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -452,8 +381,7 @@ static int stmmac_mdio_write_c45(struct mii_bus *bus, int phyaddr,</div><div class='ctx'> int stmmac_mdio_reset(struct mii_bus *bus)</div><div class='ctx'> {</div><div class='ctx'> #if IS_ENABLED(CONFIG_STMMAC_PLATFORM)</div><div class='del'>-	struct net_device *ndev = bus-&gt;priv;</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(bus-&gt;priv);</div><div class='ctx'> 	unsigned int mii_address = priv-&gt;hw-&gt;mii.addr;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_OF</div><div class='hunk'>@@ -489,7 +417,7 @@ int stmmac_mdio_reset(struct mii_bus *bus)</div><div class='ctx'> 	 * on MDC, so perform a dummy mdio read. To be updated for GMAC4</div><div class='ctx'> 	 * if needed.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!priv-&gt;plat-&gt;has_gmac4)</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type != DWMAC_CORE_GMAC4)</div><div class='ctx'> 		writel(0, priv-&gt;ioaddr + mii_address);</div><div class='ctx'> #endif</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -497,12 +425,11 @@ int stmmac_mdio_reset(struct mii_bus *bus)</div><div class='ctx'> </div><div class='ctx'> int stmmac_pcs_setup(struct net_device *ndev)</div><div class='ctx'> {</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct fwnode_handle *devnode, *pcsnode;</div><div class='ctx'> 	struct dw_xpcs *xpcs = NULL;</div><div class='del'>-	struct stmmac_priv *priv;</div><div class='ctx'> 	int addr, ret;</div><div class='ctx'> </div><div class='del'>-	priv = netdev_priv(ndev);</div><div class='ctx'> 	devnode = priv-&gt;plat-&gt;port_node;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;plat-&gt;pcs_init) {</div><div class='hunk'>@@ -524,6 +451,9 @@ int stmmac_pcs_setup(struct net_device *ndev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return dev_err_probe(priv-&gt;device, ret, "No xPCS found\n");</div><div class='ctx'> </div><div class='add'>+	if (xpcs)</div><div class='add'>+		xpcs_config_eee_mult_fact(xpcs, priv-&gt;plat-&gt;mult_fact_100ns);</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;hw-&gt;xpcs = xpcs;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -544,6 +474,102 @@ void stmmac_pcs_clean(struct net_device *ndev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * stmmac_clk_csr_set - dynamically set the MDC clock</div><div class='add'>+ * @priv: driver private structure</div><div class='add'>+ * Description: this is to dynamically set the MDC clock according to the csr</div><div class='add'>+ * clock input.</div><div class='add'>+ * Return: MII register CR field value</div><div class='add'>+ * Note:</div><div class='add'>+ *	If a specific clk_csr value is passed from the platform</div><div class='add'>+ *	this means that the CSR Clock Range selection cannot be</div><div class='add'>+ *	changed at run-time and it is fixed (as reported in the driver</div><div class='add'>+ *	documentation). Viceversa the driver will try to set the MDC</div><div class='add'>+ *	clock dynamically according to the actual clock input.</div><div class='add'>+ */</div><div class='add'>+static u32 stmmac_clk_csr_set(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	unsigned long clk_rate;</div><div class='add'>+	u32 value = ~0;</div><div class='add'>+</div><div class='add'>+	clk_rate = clk_get_rate(priv-&gt;plat-&gt;stmmac_clk);</div><div class='add'>+</div><div class='add'>+	/* Platform provided default clk_csr would be assumed valid</div><div class='add'>+	 * for all other cases except for the below mentioned ones.</div><div class='add'>+	 * For values higher than the IEEE 802.3 specified frequency</div><div class='add'>+	 * we can not estimate the proper divider as it is not known</div><div class='add'>+	 * the frequency of clk_csr_i. So we do not change the default</div><div class='add'>+	 * divider.</div><div class='add'>+	 */</div><div class='add'>+	if (clk_rate &lt; CSR_F_35M)</div><div class='add'>+		value = STMMAC_CSR_20_35M;</div><div class='add'>+	else if (clk_rate &lt; CSR_F_60M)</div><div class='add'>+		value = STMMAC_CSR_35_60M;</div><div class='add'>+	else if (clk_rate &lt; CSR_F_100M)</div><div class='add'>+		value = STMMAC_CSR_60_100M;</div><div class='add'>+	else if (clk_rate &lt; CSR_F_150M)</div><div class='add'>+		value = STMMAC_CSR_100_150M;</div><div class='add'>+	else if (clk_rate &lt; CSR_F_250M)</div><div class='add'>+		value = STMMAC_CSR_150_250M;</div><div class='add'>+	else if (clk_rate &lt;= CSR_F_300M)</div><div class='add'>+		value = STMMAC_CSR_250_300M;</div><div class='add'>+	else if (clk_rate &lt; CSR_F_500M)</div><div class='add'>+		value = STMMAC_CSR_300_500M;</div><div class='add'>+	else if (clk_rate &lt; CSR_F_800M)</div><div class='add'>+		value = STMMAC_CSR_500_800M;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;plat-&gt;flags &amp; STMMAC_FLAG_HAS_SUN8I) {</div><div class='add'>+		if (clk_rate &gt; 160000000)</div><div class='add'>+			value = 0x03;</div><div class='add'>+		else if (clk_rate &gt; 80000000)</div><div class='add'>+			value = 0x02;</div><div class='add'>+		else if (clk_rate &gt; 40000000)</div><div class='add'>+			value = 0x01;</div><div class='add'>+		else</div><div class='add'>+			value = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC) {</div><div class='add'>+		if (clk_rate &gt; 400000000)</div><div class='add'>+			value = 0x5;</div><div class='add'>+		else if (clk_rate &gt; 350000000)</div><div class='add'>+			value = 0x4;</div><div class='add'>+		else if (clk_rate &gt; 300000000)</div><div class='add'>+			value = 0x3;</div><div class='add'>+		else if (clk_rate &gt; 250000000)</div><div class='add'>+			value = 0x2;</div><div class='add'>+		else if (clk_rate &gt; 150000000)</div><div class='add'>+			value = 0x1;</div><div class='add'>+		else</div><div class='add'>+			value = 0x0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void stmmac_mdio_bus_config(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	/* If a specific clk_csr value is passed from the platform, this means</div><div class='add'>+	 * that the CSR Clock Range value should not be computed from the CSR</div><div class='add'>+	 * clock.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;plat-&gt;clk_csr &gt;= 0)</div><div class='add'>+		value = priv-&gt;plat-&gt;clk_csr;</div><div class='add'>+	else</div><div class='add'>+		value = stmmac_clk_csr_set(priv);</div><div class='add'>+</div><div class='add'>+	value &lt;&lt;= priv-&gt;hw-&gt;mii.clk_csr_shift;</div><div class='add'>+</div><div class='add'>+	if (value &amp; ~priv-&gt;hw-&gt;mii.clk_csr_mask)</div><div class='add'>+		dev_warn(priv-&gt;device,</div><div class='add'>+			 "clk_csr value out of range (0x%08x exceeds mask 0x%08x), truncating\n",</div><div class='add'>+			 value, priv-&gt;hw-&gt;mii.clk_csr_mask);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gmii_address_bus_config = value &amp; priv-&gt;hw-&gt;mii.clk_csr_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * stmmac_mdio_register</div><div class='ctx'>  * @ndev: net device structure</div><div class='ctx'>  * Description: it registers the MII bus</div><div class='hunk'>@@ -557,12 +583,15 @@ int stmmac_mdio_register(struct net_device *ndev)</div><div class='ctx'> 	struct device_node *mdio_node = priv-&gt;plat-&gt;mdio_node;</div><div class='ctx'> 	struct device *dev = ndev-&gt;dev.parent;</div><div class='ctx'> 	struct fwnode_handle *fixed_node;</div><div class='add'>+	int max_addr = PHY_MAX_ADDR - 1;</div><div class='ctx'> 	struct fwnode_handle *fwnode;</div><div class='del'>-	int addr, found, max_addr;</div><div class='add'>+	struct phy_device *phydev;</div><div class='ctx'> </div><div class='ctx'> 	if (!mdio_bus_data)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	stmmac_mdio_bus_config(priv);</div><div class='add'>+</div><div class='ctx'> 	new_bus = mdiobus_alloc();</div><div class='ctx'> 	if (!new_bus)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -572,7 +601,7 @@ int stmmac_mdio_register(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	new_bus-&gt;name = "stmmac";</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;plat-&gt;has_xgmac) {</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC) {</div><div class='ctx'> 		new_bus-&gt;read = &amp;stmmac_xgmac2_mdio_read_c22;</div><div class='ctx'> 		new_bus-&gt;write = &amp;stmmac_xgmac2_mdio_write_c22;</div><div class='ctx'> 		new_bus-&gt;read_c45 = &amp;stmmac_xgmac2_mdio_read_c45;</div><div class='hunk'>@@ -580,25 +609,20 @@ int stmmac_mdio_register(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 		if (priv-&gt;synopsys_id &lt; DWXGMAC_CORE_2_20) {</div><div class='ctx'> 			/* Right now only C22 phys are supported */</div><div class='del'>-			max_addr = MII_XGMAC_MAX_C22ADDR + 1;</div><div class='add'>+			max_addr = MII_XGMAC_MAX_C22ADDR;</div><div class='ctx'> </div><div class='ctx'> 			/* Check if DT specified an unsupported phy addr */</div><div class='ctx'> 			if (priv-&gt;plat-&gt;phy_addr &gt; MII_XGMAC_MAX_C22ADDR)</div><div class='ctx'> 				dev_err(dev, "Unsupported phy_addr (max=%d)\n",</div><div class='ctx'> 					MII_XGMAC_MAX_C22ADDR);</div><div class='del'>-		} else {</div><div class='del'>-			/* XGMAC version 2.20 onwards support 32 phy addr */</div><div class='del'>-			max_addr = PHY_MAX_ADDR;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		new_bus-&gt;read = &amp;stmmac_mdio_read_c22;</div><div class='ctx'> 		new_bus-&gt;write = &amp;stmmac_mdio_write_c22;</div><div class='del'>-		if (priv-&gt;plat-&gt;has_gmac4) {</div><div class='add'>+		if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC4) {</div><div class='ctx'> 			new_bus-&gt;read_c45 = &amp;stmmac_mdio_read_c45;</div><div class='ctx'> 			new_bus-&gt;write_c45 = &amp;stmmac_mdio_write_c45;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		max_addr = PHY_MAX_ADDR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (mdio_bus_data-&gt;needs_reset)</div><div class='hunk'>@@ -621,7 +645,7 @@ int stmmac_mdio_register(struct net_device *ndev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Looks like we need a dummy read for XGMAC only and C45 PHYs */</div><div class='del'>-	if (priv-&gt;plat-&gt;has_xgmac)</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_XGMAC)</div><div class='ctx'> 		stmmac_xgmac2_mdio_read_c45(new_bus, 0, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* If fixed-link is set, skip PHY scanning */</div><div class='hunk'>@@ -640,41 +664,31 @@ int stmmac_mdio_register(struct net_device *ndev)</div><div class='ctx'> 	if (priv-&gt;plat-&gt;phy_node || mdio_node)</div><div class='ctx'> 		goto bus_register_done;</div><div class='ctx'> </div><div class='del'>-	found = 0;</div><div class='del'>-	for (addr = 0; addr &lt; max_addr; addr++) {</div><div class='del'>-		struct phy_device *phydev = mdiobus_get_phy(new_bus, addr);</div><div class='del'>-</div><div class='del'>-		if (!phydev)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If an IRQ was provided to be assigned after</div><div class='del'>-		 * the bus probe, do it here.</div><div class='del'>-		 */</div><div class='del'>-		if (!mdio_bus_data-&gt;irqs &amp;&amp;</div><div class='del'>-		    (mdio_bus_data-&gt;probed_phy_irq &gt; 0)) {</div><div class='del'>-			new_bus-&gt;irq[addr] = mdio_bus_data-&gt;probed_phy_irq;</div><div class='del'>-			phydev-&gt;irq = mdio_bus_data-&gt;probed_phy_irq;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * If we're going to bind the MAC to this PHY bus,</div><div class='del'>-		 * and no PHY number was provided to the MAC,</div><div class='del'>-		 * use the one probed here.</div><div class='del'>-		 */</div><div class='del'>-		if (priv-&gt;plat-&gt;phy_addr == -1)</div><div class='del'>-			priv-&gt;plat-&gt;phy_addr = addr;</div><div class='del'>-</div><div class='del'>-		phy_attached_info(phydev);</div><div class='del'>-		found = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!found &amp;&amp; !mdio_node) {</div><div class='add'>+	phydev = phy_find_first(new_bus);</div><div class='add'>+	if (!phydev || phydev-&gt;mdio.addr &gt; max_addr) {</div><div class='ctx'> 		dev_warn(dev, "No PHY found\n");</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto no_phy_found;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * If an IRQ was provided to be assigned after</div><div class='add'>+	 * the bus probe, do it here.</div><div class='add'>+	 */</div><div class='add'>+	if (!mdio_bus_data-&gt;irqs &amp;&amp; mdio_bus_data-&gt;probed_phy_irq &gt; 0) {</div><div class='add'>+		new_bus-&gt;irq[phydev-&gt;mdio.addr] = mdio_bus_data-&gt;probed_phy_irq;</div><div class='add'>+		phydev-&gt;irq = mdio_bus_data-&gt;probed_phy_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If we're going to bind the MAC to this PHY bus, and no PHY number</div><div class='add'>+	 * was provided to the MAC, use the one probed here.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;plat-&gt;phy_addr == -1)</div><div class='add'>+		priv-&gt;plat-&gt;phy_addr = phydev-&gt;mdio.addr;</div><div class='add'>+</div><div class='add'>+	phy_attached_info(phydev);</div><div class='add'>+</div><div class='ctx'> bus_register_done:</div><div class='ctx'> 	priv-&gt;mii = new_bus;</div><div class='ctx'> </div><div class='hunk'>@@ -706,3 +720,17 @@ int stmmac_mdio_unregister(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void stmmac_mdio_lock(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;mii)</div><div class='add'>+		mutex_lock(&amp;priv-&gt;mii-&gt;mdio_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stmmac_mdio_lock);</div><div class='add'>+</div><div class='add'>+void stmmac_mdio_unlock(struct stmmac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;mii)</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;mii-&gt;mdio_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stmmac_mdio_unlock);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c<br/>index 352b01678c22..270ad066ced3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c</a></div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "stmmac.h"</div><div class='add'>+#include "stmmac_libpci.h"</div><div class='ctx'> </div><div class='ctx'> struct stmmac_pci_info {</div><div class='ctx'> 	int (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat);</div><div class='hunk'>@@ -21,31 +22,12 @@ struct stmmac_pci_info {</div><div class='ctx'> </div><div class='ctx'> static void common_default_data(struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='del'>-	plat-&gt;clk_csr = 2;	/* clk_csr_i = 20-35MHz &amp; MDC = clk_csr_i/16 */</div><div class='del'>-	plat-&gt;has_gmac = 1;</div><div class='add'>+	/* clk_csr_i = 20-35MHz &amp; MDC = clk_csr_i/16 */</div><div class='add'>+	plat-&gt;clk_csr = STMMAC_CSR_20_35M;</div><div class='add'>+	plat-&gt;core_type = DWMAC_CORE_GMAC;</div><div class='ctx'> 	plat-&gt;force_sf_dma_mode = 1;</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;mdio_bus_data-&gt;needs_reset = true;</div><div class='del'>-</div><div class='del'>-	/* Set default value for multicast hash bins */</div><div class='del'>-	plat-&gt;multicast_filter_bins = HASH_TABLE_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Set default value for unicast filter entries */</div><div class='del'>-	plat-&gt;unicast_filter_entries = 1;</div><div class='del'>-</div><div class='del'>-	/* Set the maxmtu to a default of JUMBO_LEN */</div><div class='del'>-	plat-&gt;maxmtu = JUMBO_LEN;</div><div class='del'>-</div><div class='del'>-	/* Set default number of RX and TX queues to use */</div><div class='del'>-	plat-&gt;tx_queues_to_use = 1;</div><div class='del'>-	plat-&gt;rx_queues_to_use = 1;</div><div class='del'>-</div><div class='del'>-	/* Disable Priority config by default */</div><div class='del'>-	plat-&gt;tx_queues_cfg[0].use_prio = false;</div><div class='del'>-	plat-&gt;rx_queues_cfg[0].use_prio = false;</div><div class='del'>-</div><div class='del'>-	/* Disable RX queues routing by default */</div><div class='del'>-	plat-&gt;rx_queues_cfg[0].pkt_route = 0x0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int stmmac_default_data(struct pci_dev *pdev,</div><div class='hunk'>@@ -74,28 +56,18 @@ static int snps_gmac5_default_data(struct pci_dev *pdev,</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	plat-&gt;clk_csr = 5;</div><div class='del'>-	plat-&gt;has_gmac4 = 1;</div><div class='add'>+	plat-&gt;clk_csr = STMMAC_CSR_250_300M;</div><div class='add'>+	plat-&gt;core_type = DWMAC_CORE_GMAC4;</div><div class='ctx'> 	plat-&gt;force_sf_dma_mode = 1;</div><div class='ctx'> 	plat-&gt;flags |= STMMAC_FLAG_TSO_EN;</div><div class='ctx'> 	plat-&gt;pmt = 1;</div><div class='ctx'> </div><div class='del'>-	/* Set default value for multicast hash bins */</div><div class='del'>-	plat-&gt;multicast_filter_bins = HASH_TABLE_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Set default value for unicast filter entries */</div><div class='del'>-	plat-&gt;unicast_filter_entries = 1;</div><div class='del'>-</div><div class='del'>-	/* Set the maxmtu to a default of JUMBO_LEN */</div><div class='del'>-	plat-&gt;maxmtu = JUMBO_LEN;</div><div class='del'>-</div><div class='ctx'> 	/* Set default number of RX and TX queues to use */</div><div class='ctx'> 	plat-&gt;tx_queues_to_use = 4;</div><div class='ctx'> 	plat-&gt;rx_queues_to_use = 4;</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;</div><div class='ctx'> 	for (i = 0; i &lt; plat-&gt;tx_queues_to_use; i++) {</div><div class='del'>-		plat-&gt;tx_queues_cfg[i].use_prio = false;</div><div class='ctx'> 		plat-&gt;tx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;</div><div class='ctx'> 		plat-&gt;tx_queues_cfg[i].weight = 25;</div><div class='ctx'> 		if (i &gt; 0)</div><div class='hunk'>@@ -103,15 +75,10 @@ static int snps_gmac5_default_data(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;rx_sched_algorithm = MTL_RX_ALGORITHM_SP;</div><div class='del'>-	for (i = 0; i &lt; plat-&gt;rx_queues_to_use; i++) {</div><div class='del'>-		plat-&gt;rx_queues_cfg[i].use_prio = false;</div><div class='add'>+	for (i = 0; i &lt; plat-&gt;rx_queues_to_use; i++)</div><div class='ctx'> 		plat-&gt;rx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;</div><div class='del'>-		plat-&gt;rx_queues_cfg[i].pkt_route = 0x0;</div><div class='del'>-		plat-&gt;rx_queues_cfg[i].chan = i;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;bus_id = 1;</div><div class='del'>-	plat-&gt;phy_addr = -1;</div><div class='ctx'> 	plat-&gt;phy_interface = PHY_INTERFACE_MODE_GMII;</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;dma_cfg-&gt;pbl = 32;</div><div class='hunk'>@@ -126,10 +93,8 @@ static int snps_gmac5_default_data(struct pci_dev *pdev,</div><div class='ctx'> 	plat-&gt;axi-&gt;axi_rd_osr_lmt = 31;</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;axi-&gt;axi_fb = false;</div><div class='del'>-	plat-&gt;axi-&gt;axi_blen[0] = 4;</div><div class='del'>-	plat-&gt;axi-&gt;axi_blen[1] = 8;</div><div class='del'>-	plat-&gt;axi-&gt;axi_blen[2] = 16;</div><div class='del'>-	plat-&gt;axi-&gt;axi_blen[3] = 32;</div><div class='add'>+	plat-&gt;axi-&gt;axi_blen_regval = DMA_AXI_BLEN4 | DMA_AXI_BLEN8 |</div><div class='add'>+				     DMA_AXI_BLEN16 | DMA_AXI_BLEN32;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -155,11 +120,11 @@ static int stmmac_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_pci_info *info = (struct stmmac_pci_info *)id-&gt;driver_data;</div><div class='ctx'> 	struct plat_stmmacenet_data *plat;</div><div class='del'>-	struct stmmac_resources res;</div><div class='del'>-	int i;</div><div class='add'>+	struct stmmac_resources res = {};</div><div class='ctx'> 	int ret;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	plat = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*plat), GFP_KERNEL);</div><div class='add'>+	plat = stmmac_plat_dat_alloc(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (!plat)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -192,9 +157,9 @@ static int stmmac_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	for (i = 0; i &lt; PCI_STD_NUM_BARS; i++) {</div><div class='ctx'> 		if (pci_resource_len(pdev, i) == 0)</div><div class='ctx'> 			continue;</div><div class='del'>-		ret = pcim_iomap_regions(pdev, BIT(i), pci_name(pdev));</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+		res.addr = pcim_iomap_region(pdev, i, STMMAC_RESOURCE_NAME);</div><div class='add'>+		if (IS_ERR(res.addr))</div><div class='add'>+			return PTR_ERR(res.addr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -204,8 +169,6 @@ static int stmmac_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	memset(&amp;res, 0, sizeof(res));</div><div class='del'>-	res.addr = pcim_iomap_table(pdev)[i];</div><div class='ctx'> 	res.wol_irq = pdev-&gt;irq;</div><div class='ctx'> 	res.irq = pdev-&gt;irq;</div><div class='ctx'> </div><div class='hunk'>@@ -219,6 +182,9 @@ static int stmmac_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	plat-&gt;safety_feat_cfg-&gt;prtyen = 1;</div><div class='ctx'> 	plat-&gt;safety_feat_cfg-&gt;tmouten = 1;</div><div class='ctx'> </div><div class='add'>+	plat-&gt;suspend = stmmac_pci_plat_suspend;</div><div class='add'>+	plat-&gt;resume = stmmac_pci_plat_resume;</div><div class='add'>+</div><div class='ctx'> 	return stmmac_dvr_probe(&amp;pdev-&gt;dev, plat, &amp;res);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -226,60 +192,13 @@ static int stmmac_pci_probe(struct pci_dev *pdev,</div><div class='ctx'>  * stmmac_pci_remove</div><div class='ctx'>  *</div><div class='ctx'>  * @pdev: platform device pointer</div><div class='del'>- * Description: this function calls the main to free the net resources</div><div class='del'>- * and releases the PCI resources.</div><div class='add'>+ * Description: this function calls the main to free the net resources.</div><div class='ctx'>  */</div><div class='ctx'> static void stmmac_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='ctx'> 	stmmac_dvr_remove(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; PCI_STD_NUM_BARS; i++) {</div><div class='del'>-		if (pci_resource_len(pdev, i) == 0)</div><div class='del'>-			continue;</div><div class='del'>-		pcim_iounmap_regions(pdev, BIT(i));</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __maybe_unused stmmac_pci_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_suspend(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = pci_save_state(pdev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-	pci_wake_from_d3(pdev, true);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __maybe_unused stmmac_pci_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	pci_restore_state(pdev);</div><div class='del'>-	pci_set_power_state(pdev, PCI_D0);</div><div class='del'>-</div><div class='del'>-	ret = pci_enable_device(pdev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	pci_set_master(pdev);</div><div class='del'>-</div><div class='del'>-	return stmmac_resume(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static SIMPLE_DEV_PM_OPS(stmmac_pm_ops, stmmac_pci_suspend, stmmac_pci_resume);</div><div class='del'>-</div><div class='ctx'> /* synthetic ID, no official vendor */</div><div class='ctx'> #define PCI_VENDOR_ID_STMMAC		0x0700</div><div class='ctx'> </div><div class='hunk'>@@ -301,7 +220,7 @@ static struct pci_driver stmmac_pci_driver = {</div><div class='ctx'> 	.probe = stmmac_pci_probe,</div><div class='ctx'> 	.remove = stmmac_pci_remove,</div><div class='ctx'> 	.driver         = {</div><div class='del'>-		.pm     = &amp;stmmac_pm_ops,</div><div class='add'>+		.pm     = &amp;stmmac_simple_pm_ops,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c<br/>new file mode 100644<br/>index 000000000000..e2f531c11986<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#include "stmmac.h"</div><div class='add'>+#include "stmmac_pcs.h"</div><div class='add'>+</div><div class='add'>+static int dwmac_integrated_pcs_enable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	stmmac_mac_irq_modify(spcs-&gt;priv, 0, spcs-&gt;int_mask);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dwmac_integrated_pcs_disable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	stmmac_mac_irq_modify(spcs-&gt;priv, spcs-&gt;int_mask, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dwmac_integrated_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+					   unsigned int neg_mode,</div><div class='add'>+					   struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	state-&gt;link = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dwmac_integrated_pcs_config(struct phylink_pcs *pcs,</div><div class='add'>+				       unsigned int neg_mode,</div><div class='add'>+				       phy_interface_t interface,</div><div class='add'>+				       const unsigned long *advertising,</div><div class='add'>+				       bool permit_pause_to_mac)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_pcs *spcs = phylink_pcs_to_stmmac_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	dwmac_ctrl_ane(spcs-&gt;base, 0, 1, spcs-&gt;priv-&gt;hw-&gt;reverse_sgmii_enable);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops dwmac_integrated_pcs_ops = {</div><div class='add'>+	.pcs_enable = dwmac_integrated_pcs_enable,</div><div class='add'>+	.pcs_disable = dwmac_integrated_pcs_disable,</div><div class='add'>+	.pcs_get_state = dwmac_integrated_pcs_get_state,</div><div class='add'>+	.pcs_config = dwmac_integrated_pcs_config,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,</div><div class='add'>+			       u32 int_mask)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_pcs *spcs;</div><div class='add'>+</div><div class='add'>+	spcs = devm_kzalloc(priv-&gt;device, sizeof(*spcs), GFP_KERNEL);</div><div class='add'>+	if (!spcs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spcs-&gt;priv = priv;</div><div class='add'>+	spcs-&gt;base = priv-&gt;ioaddr + offset;</div><div class='add'>+	spcs-&gt;int_mask = int_mask;</div><div class='add'>+	spcs-&gt;pcs.ops = &amp;dwmac_integrated_pcs_ops;</div><div class='add'>+</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_SGMII, spcs-&gt;pcs.supported_interfaces);</div><div class='add'>+</div><div class='add'>+	priv-&gt;integrated_pcs = spcs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h<br/>index 1bdf87b237c4..cda93894168e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #ifndef __STMMAC_PCS_H__</div><div class='ctx'> #define __STMMAC_PCS_H__</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include "common.h"</div><div class='hunk'>@@ -16,6 +17,8 @@</div><div class='ctx'> /* PCS registers (AN/TBI/SGMII/RGMII) offsets */</div><div class='ctx'> #define GMAC_AN_CTRL(x)		(x)		/* AN control */</div><div class='ctx'> #define GMAC_AN_STATUS(x)	(x + 0x4)	/* AN status */</div><div class='add'>+</div><div class='add'>+/* ADV, LPA and EXP are only available for the TBI and RTBI interfaces */</div><div class='ctx'> #define GMAC_ANE_ADV(x)		(x + 0x8)	/* ANE Advertisement */</div><div class='ctx'> #define GMAC_ANE_LPA(x)		(x + 0xc)	/* ANE link partener ability */</div><div class='ctx'> #define GMAC_ANE_EXP(x)		(x + 0x10)	/* ANE expansion */</div><div class='hunk'>@@ -44,6 +47,24 @@</div><div class='ctx'> #define GMAC_ANE_RFE_SHIFT	12</div><div class='ctx'> #define GMAC_ANE_ACK		BIT(14)</div><div class='ctx'> </div><div class='add'>+struct stmmac_priv;</div><div class='add'>+</div><div class='add'>+struct stmmac_pcs {</div><div class='add'>+	struct stmmac_priv *priv;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	u32 int_mask;</div><div class='add'>+	struct phylink_pcs pcs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct stmmac_pcs *</div><div class='add'>+phylink_pcs_to_stmmac_pcs(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcs, struct stmmac_pcs, pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int stmmac_integrated_pcs_init(struct stmmac_priv *priv, unsigned int offset,</div><div class='add'>+			       u32 int_mask);</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR</div><div class='ctx'>  * @ioaddr: IO registers pointer</div><div class='hunk'>@@ -80,13 +101,12 @@ static inline void dwmac_pcs_isr(void __iomem *ioaddr, u32 reg,</div><div class='ctx'>  * @reg: Base address of the AN Control Register.</div><div class='ctx'>  * @ane: to enable the auto-negotiation</div><div class='ctx'>  * @srgmi_ral: to manage MAC-2-MAC SGMII connections.</div><div class='del'>- * @loopback: to cause the PHY to loopback tx data into rx path.</div><div class='ctx'>  * Description: this is the main function to configure the AN control register</div><div class='ctx'>  * and init the ANE, select loopback (usually for debugging purpose) and</div><div class='ctx'>  * configure SGMII RAL.</div><div class='ctx'>  */</div><div class='ctx'> static inline void dwmac_ctrl_ane(void __iomem *ioaddr, u32 reg, bool ane,</div><div class='del'>-				  bool srgmi_ral, bool loopback)</div><div class='add'>+				  bool srgmi_ral)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value = readl(ioaddr + GMAC_AN_CTRL(reg));</div><div class='ctx'> </div><div class='hunk'>@@ -102,39 +122,6 @@ static inline void dwmac_ctrl_ane(void __iomem *ioaddr, u32 reg, bool ane,</div><div class='ctx'> 	if (srgmi_ral)</div><div class='ctx'> 		value |= GMAC_AN_CTRL_SGMRAL;</div><div class='ctx'> </div><div class='del'>-	if (loopback)</div><div class='del'>-		value |= GMAC_AN_CTRL_ELE;</div><div class='del'>-</div><div class='ctx'> 	writel(value, ioaddr + GMAC_AN_CTRL(reg));</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * dwmac_get_adv_lp - Get ADV and LP cap</div><div class='del'>- * @ioaddr: IO registers pointer</div><div class='del'>- * @reg: Base address of the AN Control Register.</div><div class='del'>- * @adv_lp: structure to store the adv,lp status</div><div class='del'>- * Description: this is to expose the ANE advertisement and Link partner ability</div><div class='del'>- * status to ethtool support.</div><div class='del'>- */</div><div class='del'>-static inline void dwmac_get_adv_lp(void __iomem *ioaddr, u32 reg,</div><div class='del'>-				    struct rgmii_adv *adv_lp)</div><div class='del'>-{</div><div class='del'>-	u32 value = readl(ioaddr + GMAC_ANE_ADV(reg));</div><div class='del'>-</div><div class='del'>-	if (value &amp; GMAC_ANE_FD)</div><div class='del'>-		adv_lp-&gt;duplex = DUPLEX_FULL;</div><div class='del'>-	if (value &amp; GMAC_ANE_HD)</div><div class='del'>-		adv_lp-&gt;duplex |= DUPLEX_HALF;</div><div class='del'>-</div><div class='del'>-	adv_lp-&gt;pause = (value &amp; GMAC_ANE_PSE) &gt;&gt; GMAC_ANE_PSE_SHIFT;</div><div class='del'>-</div><div class='del'>-	value = readl(ioaddr + GMAC_ANE_LPA(reg));</div><div class='del'>-</div><div class='del'>-	if (value &amp; GMAC_ANE_FD)</div><div class='del'>-		adv_lp-&gt;lp_duplex = DUPLEX_FULL;</div><div class='del'>-	if (value &amp; GMAC_ANE_HD)</div><div class='del'>-		adv_lp-&gt;lp_duplex = DUPLEX_HALF;</div><div class='del'>-</div><div class='del'>-	adv_lp-&gt;lp_pause = (value &amp; GMAC_ANE_PSE) &gt;&gt; GMAC_ANE_PSE_SHIFT;</div><div class='del'>-}</div><div class='ctx'> #endif /* __STMMAC_PCS_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c<br/>index ad868e8d195d..8979a50b5507 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c</a></div><div class='hunk'>@@ -60,7 +60,7 @@ static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins)</div><div class='ctx'>  * Description:</div><div class='ctx'>  * This function validates the number of Unicast address entries supported</div><div class='ctx'>  * by a particular Synopsys 10/100/1000 controller. The Synopsys controller</div><div class='del'>- * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter</div><div class='add'>+ * supports 1..32, 64, or 128 Unicast filter entries for its Unicast filter</div><div class='ctx'>  * logic. This function validates a valid, supported configuration is</div><div class='ctx'>  * selected, and defaults to 1 Unicast address if an unsupported</div><div class='ctx'>  * configuration is selected.</div><div class='hunk'>@@ -95,6 +95,7 @@ static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np;</div><div class='ctx'> 	struct stmmac_axi *axi;</div><div class='add'>+	u32 axi_blen[AXI_BLEN];</div><div class='ctx'> </div><div class='ctx'> 	np = of_parse_phandle(pdev-&gt;dev.of_node, "snps,axi-config", 0);</div><div class='ctx'> 	if (!np)</div><div class='hunk'>@@ -117,7 +118,8 @@ static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)</div><div class='ctx'> 		axi-&gt;axi_wr_osr_lmt = 1;</div><div class='ctx'> 	if (of_property_read_u32(np, "snps,rd_osr_lmt", &amp;axi-&gt;axi_rd_osr_lmt))</div><div class='ctx'> 		axi-&gt;axi_rd_osr_lmt = 1;</div><div class='del'>-	of_property_read_u32_array(np, "snps,blen", axi-&gt;axi_blen, AXI_BLEN);</div><div class='add'>+	of_property_read_u32_array(np, "snps,blen", axi_blen, AXI_BLEN);</div><div class='add'>+	stmmac_axi_blen_to_mask(&amp;axi-&gt;axi_blen_regval, axi_blen, AXI_BLEN);</div><div class='ctx'> 	of_node_put(np);</div><div class='ctx'> </div><div class='ctx'> 	return axi;</div><div class='hunk'>@@ -137,13 +139,6 @@ static int stmmac_mtl_setup(struct platform_device *pdev,</div><div class='ctx'> 	u8 queue = 0;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	/* For backwards-compatibility with device trees that don't have any</div><div class='del'>-	 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back</div><div class='del'>-	 * to one RX and TX queues each.</div><div class='del'>-	 */</div><div class='del'>-	plat-&gt;rx_queues_to_use = 1;</div><div class='del'>-	plat-&gt;tx_queues_to_use = 1;</div><div class='del'>-</div><div class='ctx'> 	/* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need</div><div class='ctx'> 	 * to always set this, otherwise Queue will be classified as AVB</div><div class='ctx'> 	 * (because MTL_QUEUE_AVB = 0).</div><div class='hunk'>@@ -162,9 +157,8 @@ static int stmmac_mtl_setup(struct platform_device *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Processing RX queues common config */</div><div class='del'>-	if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",</div><div class='del'>-				 &amp;plat-&gt;rx_queues_to_use))</div><div class='del'>-		plat-&gt;rx_queues_to_use = 1;</div><div class='add'>+	of_property_read_u32(rx_node, "snps,rx-queues-to-use",</div><div class='add'>+			     &amp;plat-&gt;rx_queues_to_use);</div><div class='ctx'> </div><div class='ctx'> 	if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))</div><div class='ctx'> 		plat-&gt;rx_sched_algorithm = MTL_RX_ALGORITHM_SP;</div><div class='hunk'>@@ -185,18 +179,13 @@ static int stmmac_mtl_setup(struct platform_device *pdev,</div><div class='ctx'> 		else</div><div class='ctx'> 			plat-&gt;rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;</div><div class='ctx'> </div><div class='del'>-		if (of_property_read_u32(q_node, "snps,map-to-dma-channel",</div><div class='del'>-					 &amp;plat-&gt;rx_queues_cfg[queue].chan))</div><div class='del'>-			plat-&gt;rx_queues_cfg[queue].chan = queue;</div><div class='add'>+		of_property_read_u32(q_node, "snps,map-to-dma-channel",</div><div class='add'>+				     &amp;plat-&gt;rx_queues_cfg[queue].chan);</div><div class='ctx'> 		/* TODO: Dynamic mapping to be included in the future */</div><div class='ctx'> </div><div class='del'>-		if (of_property_read_u32(q_node, "snps,priority",</div><div class='del'>-					&amp;plat-&gt;rx_queues_cfg[queue].prio)) {</div><div class='del'>-			plat-&gt;rx_queues_cfg[queue].prio = 0;</div><div class='del'>-			plat-&gt;rx_queues_cfg[queue].use_prio = false;</div><div class='del'>-		} else {</div><div class='add'>+		if (!of_property_read_u32(q_node, "snps,priority",</div><div class='add'>+					  &amp;plat-&gt;rx_queues_cfg[queue].prio))</div><div class='ctx'> 			plat-&gt;rx_queues_cfg[queue].use_prio = true;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		/* RX queue specific packet type routing */</div><div class='ctx'> 		if (of_property_read_bool(q_node, "snps,route-avcp"))</div><div class='hunk'>@@ -209,8 +198,6 @@ static int stmmac_mtl_setup(struct platform_device *pdev,</div><div class='ctx'> 			plat-&gt;rx_queues_cfg[queue].pkt_route = PACKET_UPQ;</div><div class='ctx'> 		else if (of_property_read_bool(q_node, "snps,route-multi-broad"))</div><div class='ctx'> 			plat-&gt;rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;</div><div class='del'>-		else</div><div class='del'>-			plat-&gt;rx_queues_cfg[queue].pkt_route = 0x0;</div><div class='ctx'> </div><div class='ctx'> 		queue++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -221,9 +208,8 @@ static int stmmac_mtl_setup(struct platform_device *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Processing TX queues common config */</div><div class='del'>-	if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",</div><div class='del'>-				 &amp;plat-&gt;tx_queues_to_use))</div><div class='del'>-		plat-&gt;tx_queues_to_use = 1;</div><div class='add'>+	of_property_read_u32(tx_node, "snps,tx-queues-to-use",</div><div class='add'>+			     &amp;plat-&gt;tx_queues_to_use);</div><div class='ctx'> </div><div class='ctx'> 	if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))</div><div class='ctx'> 		plat-&gt;tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;</div><div class='hunk'>@@ -268,13 +254,9 @@ static int stmmac_mtl_setup(struct platform_device *pdev,</div><div class='ctx'> 			plat-&gt;tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (of_property_read_u32(q_node, "snps,priority",</div><div class='del'>-					&amp;plat-&gt;tx_queues_cfg[queue].prio)) {</div><div class='del'>-			plat-&gt;tx_queues_cfg[queue].prio = 0;</div><div class='del'>-			plat-&gt;tx_queues_cfg[queue].use_prio = false;</div><div class='del'>-		} else {</div><div class='add'>+		if (!of_property_read_u32(q_node, "snps,priority",</div><div class='add'>+					  &amp;plat-&gt;tx_queues_cfg[queue].prio))</div><div class='ctx'> 			plat-&gt;tx_queues_cfg[queue].use_prio = true;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='ctx'> 		plat-&gt;tx_queues_cfg[queue].coe_unsupported =</div><div class='ctx'> 			of_property_read_bool(q_node, "snps,coe-unsupported");</div><div class='hunk'>@@ -405,21 +387,17 @@ static int stmmac_of_get_mac_mode(struct device_node *np)</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()</div><div class='del'>- * @pdev: platform_device structure</div><div class='del'>- * @plat: driver data platform structure</div><div class='del'>- *</div><div class='del'>- * Release resources claimed by stmmac_probe_config_dt().</div><div class='del'>- */</div><div class='del'>-static void stmmac_remove_config_dt(struct platform_device *pdev,</div><div class='del'>-				    struct plat_stmmacenet_data *plat)</div><div class='del'>-{</div><div class='del'>-	clk_disable_unprepare(plat-&gt;stmmac_clk);</div><div class='del'>-	clk_disable_unprepare(plat-&gt;pclk);</div><div class='del'>-	of_node_put(plat-&gt;phy_node);</div><div class='del'>-	of_node_put(plat-&gt;mdio_node);</div><div class='del'>-}</div><div class='add'>+/* Compatible string array for all gmac4 devices */</div><div class='add'>+static const char * const stmmac_gmac4_compats[] = {</div><div class='add'>+	"snps,dwmac-4.00",</div><div class='add'>+	"snps,dwmac-4.10a",</div><div class='add'>+	"snps,dwmac-4.20a",</div><div class='add'>+	"snps,dwmac-5.00a",</div><div class='add'>+	"snps,dwmac-5.10a",</div><div class='add'>+	"snps,dwmac-5.20",</div><div class='add'>+	"snps,dwmac-5.30a",</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * stmmac_probe_config_dt - parse device-tree driver parameters</div><div class='hunk'>@@ -435,11 +413,12 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> 	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='ctx'> 	struct plat_stmmacenet_data *plat;</div><div class='ctx'> 	struct stmmac_dma_cfg *dma_cfg;</div><div class='add'>+	static int bus_id = -ENODEV;</div><div class='ctx'> 	int phy_mode;</div><div class='ctx'> 	void *ret;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	plat = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*plat), GFP_KERNEL);</div><div class='add'>+	plat = stmmac_plat_dat_alloc(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (!plat)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='hunk'>@@ -456,8 +435,12 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> 		return ERR_PTR(phy_mode);</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;phy_interface = phy_mode;</div><div class='add'>+</div><div class='ctx'> 	rc = stmmac_of_get_mac_mode(np);</div><div class='del'>-	plat-&gt;mac_interface = rc &lt; 0 ? plat-&gt;phy_interface : rc;</div><div class='add'>+	if (rc &gt;= 0 &amp;&amp; rc != phy_mode)</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev,</div><div class='add'>+			 "\"mac-mode\" property used for %s but differs to \"phy-mode\" of %s, and will be ignored. Please report.\n",</div><div class='add'>+			 phy_modes(rc), phy_modes(phy_mode));</div><div class='ctx'> </div><div class='ctx'> 	/* Some wrapper drivers still rely on phy_node. Let's save it while</div><div class='ctx'> 	 * they are not converted to phylink. */</div><div class='hunk'>@@ -470,16 +453,15 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> 	of_property_read_u32(np, "max-speed", &amp;plat-&gt;max_speed);</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;bus_id = of_alias_get_id(np, "ethernet");</div><div class='del'>-	if (plat-&gt;bus_id &lt; 0)</div><div class='del'>-		plat-&gt;bus_id = 0;</div><div class='del'>-</div><div class='del'>-	/* Default to phy auto-detection */</div><div class='del'>-	plat-&gt;phy_addr = -1;</div><div class='add'>+	if (plat-&gt;bus_id &lt; 0) {</div><div class='add'>+		if (bus_id &lt; 0)</div><div class='add'>+			bus_id = of_alias_get_highest_id("ethernet");</div><div class='add'>+		/* No ethernet alias found, init at -1 so first bus_id is 0 */</div><div class='add'>+		if (bus_id &lt; 0)</div><div class='add'>+			bus_id = -1;</div><div class='add'>+		plat-&gt;bus_id = ++bus_id;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Default to get clk_csr from stmmac_clk_csr_set(),</div><div class='del'>-	 * or get clk_csr from device tree.</div><div class='del'>-	 */</div><div class='del'>-	plat-&gt;clk_csr = -1;</div><div class='ctx'> 	if (of_property_read_u32(np, "snps,clk-csr", &amp;plat-&gt;clk_csr))</div><div class='ctx'> 		of_property_read_u32(np, "clk_csr", &amp;plat-&gt;clk_csr);</div><div class='ctx'> </div><div class='hunk'>@@ -490,8 +472,10 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> 		dev_warn(&amp;pdev-&gt;dev, "snps,phy-addr property is deprecated\n");</div><div class='ctx'> </div><div class='ctx'> 	rc = stmmac_mdio_setup(plat, np, &amp;pdev-&gt;dev);</div><div class='del'>-	if (rc)</div><div class='del'>-		return ERR_PTR(rc);</div><div class='add'>+	if (rc) {</div><div class='add'>+		ret = ERR_PTR(rc);</div><div class='add'>+		goto error_put_phy;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	of_property_read_u32(np, "tx-fifo-depth", &amp;plat-&gt;tx_fifo_size);</div><div class='ctx'> </div><div class='hunk'>@@ -500,19 +484,11 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> 	plat-&gt;force_sf_dma_mode =</div><div class='ctx'> 		of_property_read_bool(np, "snps,force_sf_dma_mode");</div><div class='ctx'> </div><div class='del'>-	if (of_property_read_bool(np, "snps,en-tx-lpi-clockgating"))</div><div class='add'>+	if (of_property_read_bool(np, "snps,en-tx-lpi-clockgating")) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev,</div><div class='add'>+			 "OF property snps,en-tx-lpi-clockgating is deprecated, please convert driver to use STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP\n");</div><div class='ctx'> 		plat-&gt;flags |= STMMAC_FLAG_EN_TX_LPI_CLOCKGATING;</div><div class='del'>-</div><div class='del'>-	/* Set the maxmtu to a default of JUMBO_LEN in case the</div><div class='del'>-	 * parameter is not present in the device tree.</div><div class='del'>-	 */</div><div class='del'>-	plat-&gt;maxmtu = JUMBO_LEN;</div><div class='del'>-</div><div class='del'>-	/* Set default value for multicast hash bins */</div><div class='del'>-	plat-&gt;multicast_filter_bins = HASH_TABLE_SIZE;</div><div class='del'>-</div><div class='del'>-	/* Set default value for unicast filter entries */</div><div class='del'>-	plat-&gt;unicast_filter_entries = 1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Currently only the properties needed on SPEAr600</div><div class='hunk'>@@ -522,6 +498,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> 	if (of_device_is_compatible(np, "st,spear600-gmac") ||</div><div class='ctx'> 		of_device_is_compatible(np, "snps,dwmac-3.50a") ||</div><div class='ctx'> 		of_device_is_compatible(np, "snps,dwmac-3.70a") ||</div><div class='add'>+		of_device_is_compatible(np, "snps,dwmac-3.72a") ||</div><div class='ctx'> 		of_device_is_compatible(np, "snps,dwmac")) {</div><div class='ctx'> 		/* Note that the max-frame-size parameter as defined in the</div><div class='ctx'> 		 * ePAPR v1.1 spec is defined as max-frame-size, it's</div><div class='hunk'>@@ -539,25 +516,20 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> 				&amp;pdev-&gt;dev, plat-&gt;unicast_filter_entries);</div><div class='ctx'> 		plat-&gt;multicast_filter_bins = dwmac1000_validate_mcast_bins(</div><div class='ctx'> 				&amp;pdev-&gt;dev, plat-&gt;multicast_filter_bins);</div><div class='del'>-		plat-&gt;has_gmac = 1;</div><div class='add'>+		plat-&gt;core_type = DWMAC_CORE_GMAC;</div><div class='ctx'> 		plat-&gt;pmt = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (of_device_is_compatible(np, "snps,dwmac-3.40a")) {</div><div class='del'>-		plat-&gt;has_gmac = 1;</div><div class='add'>+		plat-&gt;core_type = DWMAC_CORE_GMAC;</div><div class='ctx'> 		plat-&gt;enh_desc = 1;</div><div class='ctx'> 		plat-&gt;tx_coe = 1;</div><div class='ctx'> 		plat-&gt;bugged_jumbo = 1;</div><div class='ctx'> 		plat-&gt;pmt = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (of_device_is_compatible(np, "snps,dwmac-4.00") ||</div><div class='del'>-	    of_device_is_compatible(np, "snps,dwmac-4.10a") ||</div><div class='del'>-	    of_device_is_compatible(np, "snps,dwmac-4.20a") ||</div><div class='del'>-	    of_device_is_compatible(np, "snps,dwmac-5.10a") ||</div><div class='del'>-	    of_device_is_compatible(np, "snps,dwmac-5.20")) {</div><div class='del'>-		plat-&gt;has_gmac4 = 1;</div><div class='del'>-		plat-&gt;has_gmac = 0;</div><div class='add'>+	if (of_device_compatible_match(np, stmmac_gmac4_compats)) {</div><div class='add'>+		plat-&gt;core_type = DWMAC_CORE_GMAC4;</div><div class='ctx'> 		plat-&gt;pmt = 1;</div><div class='ctx'> 		if (of_property_read_bool(np, "snps,tso"))</div><div class='ctx'> 			plat-&gt;flags |= STMMAC_FLAG_TSO_EN;</div><div class='hunk'>@@ -571,17 +543,19 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (of_device_is_compatible(np, "snps,dwxgmac")) {</div><div class='del'>-		plat-&gt;has_xgmac = 1;</div><div class='add'>+		plat-&gt;core_type = DWMAC_CORE_XGMAC;</div><div class='ctx'> 		plat-&gt;pmt = 1;</div><div class='ctx'> 		if (of_property_read_bool(np, "snps,tso"))</div><div class='ctx'> 			plat-&gt;flags |= STMMAC_FLAG_TSO_EN;</div><div class='add'>+		of_property_read_u32(np, "snps,multicast-filter-bins",</div><div class='add'>+				     &amp;plat-&gt;multicast_filter_bins);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dma_cfg = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*dma_cfg),</div><div class='ctx'> 			       GFP_KERNEL);</div><div class='ctx'> 	if (!dma_cfg) {</div><div class='del'>-		stmmac_remove_config_dt(pdev, plat);</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+		ret = ERR_PTR(-ENOMEM);</div><div class='add'>+		goto error_put_mdio;</div><div class='ctx'> 	}</div><div class='ctx'> 	plat-&gt;dma_cfg = dma_cfg;</div><div class='ctx'> </div><div class='hunk'>@@ -609,8 +583,8 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> </div><div class='ctx'> 	rc = stmmac_mtl_setup(pdev, plat);</div><div class='ctx'> 	if (rc) {</div><div class='del'>-		stmmac_remove_config_dt(pdev, plat);</div><div class='del'>-		return ERR_PTR(rc);</div><div class='add'>+		ret = ERR_PTR(rc);</div><div class='add'>+		goto error_put_mdio;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* clock setup */</div><div class='hunk'>@@ -639,7 +613,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> 		dev_info(&amp;pdev-&gt;dev, "PTP uses main clock\n");</div><div class='ctx'> 	} else {</div><div class='ctx'> 		plat-&gt;clk_ptp_rate = clk_get_rate(plat-&gt;clk_ptp_ref);</div><div class='del'>-		dev_dbg(&amp;pdev-&gt;dev, "PTP rate %d\n", plat-&gt;clk_ptp_rate);</div><div class='add'>+		dev_dbg(&amp;pdev-&gt;dev, "PTP rate %lu\n", plat-&gt;clk_ptp_rate);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	plat-&gt;stmmac_rst = devm_reset_control_get_optional(&amp;pdev-&gt;dev,</div><div class='hunk'>@@ -662,6 +636,10 @@ error_hw_init:</div><div class='ctx'> 	clk_disable_unprepare(plat-&gt;pclk);</div><div class='ctx'> error_pclk_get:</div><div class='ctx'> 	clk_disable_unprepare(plat-&gt;stmmac_clk);</div><div class='add'>+error_put_mdio:</div><div class='add'>+	of_node_put(plat-&gt;mdio_node);</div><div class='add'>+error_put_phy:</div><div class='add'>+	of_node_put(plat-&gt;phy_node);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -670,16 +648,17 @@ static void devm_stmmac_remove_config_dt(void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct plat_stmmacenet_data *plat = data;</div><div class='ctx'> </div><div class='del'>-	/* Platform data argument is unused */</div><div class='del'>-	stmmac_remove_config_dt(NULL, plat);</div><div class='add'>+	clk_disable_unprepare(plat-&gt;stmmac_clk);</div><div class='add'>+	clk_disable_unprepare(plat-&gt;pclk);</div><div class='add'>+	of_node_put(plat-&gt;mdio_node);</div><div class='add'>+	of_node_put(plat-&gt;phy_node);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * devm_stmmac_probe_config_dt</div><div class='ctx'>  * @pdev: platform_device structure</div><div class='ctx'>  * @mac: MAC address to use</div><div class='del'>- * Description: Devres variant of stmmac_probe_config_dt(). Does not require</div><div class='del'>- * the user to call stmmac_remove_config_dt() at driver detach.</div><div class='add'>+ * Description: Devres variant of stmmac_probe_config_dt().</div><div class='ctx'>  */</div><div class='ctx'> struct plat_stmmacenet_data *</div><div class='ctx'> devm_stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='hunk'>@@ -707,6 +686,17 @@ devm_stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)</div><div class='ctx'> #endif /* CONFIG_OF */</div><div class='ctx'> EXPORT_SYMBOL_GPL(devm_stmmac_probe_config_dt);</div><div class='ctx'> </div><div class='add'>+struct clk *stmmac_pltfr_find_clk(struct plat_stmmacenet_data *plat_dat,</div><div class='add'>+				  const char *name)</div><div class='add'>+{</div><div class='add'>+	for (int i = 0; i &lt; plat_dat-&gt;num_clks; i++)</div><div class='add'>+		if (strcmp(plat_dat-&gt;clks[i].id, name) == 0)</div><div class='add'>+			return plat_dat-&gt;clks[i].clk;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(stmmac_pltfr_find_clk);</div><div class='add'>+</div><div class='ctx'> int stmmac_get_platform_resources(struct platform_device *pdev,</div><div class='ctx'> 				  struct stmmac_resources *stmmac_res)</div><div class='ctx'> {</div><div class='hunk'>@@ -759,33 +749,49 @@ EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * stmmac_pltfr_init</div><div class='del'>- * @pdev: pointer to the platform device</div><div class='add'>+ * @dev: pointer to the device structure</div><div class='ctx'>  * @plat: driver data platform structure</div><div class='ctx'>  * Description: Call the platform's init callback (if any) and propagate</div><div class='ctx'>  * the return value.</div><div class='ctx'>  */</div><div class='del'>-static int stmmac_pltfr_init(struct platform_device *pdev,</div><div class='add'>+static int stmmac_pltfr_init(struct device *dev,</div><div class='ctx'> 			     struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (plat-&gt;init)</div><div class='del'>-		ret = plat-&gt;init(pdev, plat-&gt;bsp_priv);</div><div class='add'>+		ret = plat-&gt;init(dev, plat-&gt;bsp_priv);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * stmmac_pltfr_exit</div><div class='del'>- * @pdev: pointer to the platform device</div><div class='add'>+ * @dev: pointer to the device structure</div><div class='ctx'>  * @plat: driver data platform structure</div><div class='ctx'>  * Description: Call the platform's exit callback (if any).</div><div class='ctx'>  */</div><div class='del'>-static void stmmac_pltfr_exit(struct platform_device *pdev,</div><div class='add'>+static void stmmac_pltfr_exit(struct device *dev,</div><div class='ctx'> 			      struct plat_stmmacenet_data *plat)</div><div class='ctx'> {</div><div class='ctx'> 	if (plat-&gt;exit)</div><div class='del'>-		plat-&gt;exit(pdev, plat-&gt;bsp_priv);</div><div class='add'>+		plat-&gt;exit(dev, plat-&gt;bsp_priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stmmac_plat_suspend(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dev));</div><div class='add'>+</div><div class='add'>+	stmmac_pltfr_exit(dev, priv-&gt;plat);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int stmmac_plat_resume(struct device *dev, void *bsp_priv)</div><div class='add'>+{</div><div class='add'>+	struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dev));</div><div class='add'>+</div><div class='add'>+	return stmmac_pltfr_init(dev, priv-&gt;plat);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -800,19 +806,12 @@ int stmmac_pltfr_probe(struct platform_device *pdev,</div><div class='ctx'> 		       struct plat_stmmacenet_data *plat,</div><div class='ctx'> 		       struct stmmac_resources *res)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_pltfr_init(pdev, plat);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_dvr_probe(&amp;pdev-&gt;dev, plat, res);</div><div class='del'>-	if (ret) {</div><div class='del'>-		stmmac_pltfr_exit(pdev, plat);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='add'>+	if (!plat-&gt;suspend &amp;&amp; plat-&gt;exit)</div><div class='add'>+		plat-&gt;suspend = stmmac_plat_suspend;</div><div class='add'>+	if (!plat-&gt;resume &amp;&amp; plat-&gt;init)</div><div class='add'>+		plat-&gt;resume = stmmac_plat_resume;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return stmmac_dvr_probe(&amp;pdev-&gt;dev, plat, res);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(stmmac_pltfr_probe);</div><div class='ctx'> </div><div class='hunk'>@@ -854,54 +853,40 @@ EXPORT_SYMBOL_GPL(devm_stmmac_pltfr_probe);</div><div class='ctx'>  */</div><div class='ctx'> void stmmac_pltfr_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct plat_stmmacenet_data *plat = priv-&gt;plat;</div><div class='del'>-</div><div class='ctx'> 	stmmac_dvr_remove(&amp;pdev-&gt;dev);</div><div class='del'>-	stmmac_pltfr_exit(pdev, plat);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * stmmac_pltfr_suspend</div><div class='del'>- * @dev: device pointer</div><div class='del'>- * Description: this function is invoked when suspend the driver and it direcly</div><div class='del'>- * call the main suspend function and then, if required, on some platform, it</div><div class='del'>- * can call an exit helper.</div><div class='del'>- */</div><div class='del'>-static int __maybe_unused stmmac_pltfr_suspend(struct device *dev)</div><div class='add'>+static int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled)</div><div class='ctx'> {</div><div class='add'>+	struct plat_stmmacenet_data *plat_dat = priv-&gt;plat;</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct platform_device *pdev = to_platform_device(dev);</div><div class='del'>-</div><div class='del'>-	ret = stmmac_suspend(dev);</div><div class='del'>-	stmmac_pltfr_exit(pdev, priv-&gt;plat);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * stmmac_pltfr_resume</div><div class='del'>- * @dev: device pointer</div><div class='del'>- * Description: this function is invoked when resume the driver before calling</div><div class='del'>- * the main resume function, on some platforms, it can call own init helper</div><div class='del'>- * if required.</div><div class='del'>- */</div><div class='del'>-static int __maybe_unused stmmac_pltfr_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct stmmac_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct platform_device *pdev = to_platform_device(dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = stmmac_pltfr_init(pdev, priv-&gt;plat);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (enabled) {</div><div class='add'>+		ret = clk_prepare_enable(plat_dat-&gt;stmmac_clk);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		ret = clk_prepare_enable(plat_dat-&gt;pclk);</div><div class='add'>+		if (ret) {</div><div class='add'>+			clk_disable_unprepare(plat_dat-&gt;stmmac_clk);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		if (plat_dat-&gt;clks_config) {</div><div class='add'>+			ret = plat_dat-&gt;clks_config(plat_dat-&gt;bsp_priv, enabled);</div><div class='add'>+			if (ret) {</div><div class='add'>+				clk_disable_unprepare(plat_dat-&gt;stmmac_clk);</div><div class='add'>+				clk_disable_unprepare(plat_dat-&gt;pclk);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		clk_disable_unprepare(plat_dat-&gt;stmmac_clk);</div><div class='add'>+		clk_disable_unprepare(plat_dat-&gt;pclk);</div><div class='add'>+		if (plat_dat-&gt;clks_config)</div><div class='add'>+			plat_dat-&gt;clks_config(plat_dat-&gt;bsp_priv, enabled);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return stmmac_resume(dev);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __maybe_unused stmmac_runtime_suspend(struct device *dev)</div><div class='hunk'>@@ -931,7 +916,7 @@ static int __maybe_unused stmmac_pltfr_noirq_suspend(struct device *dev)</div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (!device_may_wakeup(priv-&gt;device) || !priv-&gt;plat-&gt;pmt) {</div><div class='add'>+	if (!priv-&gt;wolopts) {</div><div class='ctx'> 		/* Disable clock in case of PWM is off */</div><div class='ctx'> 		clk_disable_unprepare(priv-&gt;plat-&gt;clk_ptp_ref);</div><div class='ctx'> </div><div class='hunk'>@@ -952,7 +937,7 @@ static int __maybe_unused stmmac_pltfr_noirq_resume(struct device *dev)</div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (!device_may_wakeup(priv-&gt;device) || !priv-&gt;plat-&gt;pmt) {</div><div class='add'>+	if (!priv-&gt;wolopts) {</div><div class='ctx'> 		/* enable the clk previously disabled */</div><div class='ctx'> 		ret = pm_runtime_force_resume(dev);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -971,7 +956,7 @@ static int __maybe_unused stmmac_pltfr_noirq_resume(struct device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct dev_pm_ops stmmac_pltfr_pm_ops = {</div><div class='del'>-	SET_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_suspend, stmmac_pltfr_resume)</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(stmmac_suspend, stmmac_resume)</div><div class='ctx'> 	SET_RUNTIME_PM_OPS(stmmac_runtime_suspend, stmmac_runtime_resume, NULL)</div><div class='ctx'> 	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_noirq_suspend, stmmac_pltfr_noirq_resume)</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h<br/>index 72dc1a32e46d..6e6561e29d6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h</a></div><div class='hunk'>@@ -14,6 +14,9 @@</div><div class='ctx'> struct plat_stmmacenet_data *</div><div class='ctx'> devm_stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac);</div><div class='ctx'> </div><div class='add'>+struct clk *stmmac_pltfr_find_clk(struct plat_stmmacenet_data *plat_dat,</div><div class='add'>+				  const char *name);</div><div class='add'>+</div><div class='ctx'> int stmmac_get_platform_resources(struct platform_device *pdev,</div><div class='ctx'> 				  struct stmmac_resources *stmmac_res);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c<br/>index a6b1de9a251d..3e30172fa129 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c</a></div><div class='hunk'>@@ -9,7 +9,8 @@</div><div class='ctx'> *******************************************************************************/</div><div class='ctx'> #include "stmmac.h"</div><div class='ctx'> #include "stmmac_ptp.h"</div><div class='del'>-#include "dwmac4.h"</div><div class='add'>+</div><div class='add'>+#define PTP_SAFE_TIME_OFFSET_NS	500000</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * stmmac_adjust_freq</div><div class='hunk'>@@ -56,7 +57,7 @@ static int stmmac_adjust_time(struct ptp_clock_info *ptp, s64 delta)</div><div class='ctx'> 	bool xmac, est_rst = false;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	xmac = priv-&gt;plat-&gt;has_gmac4 || priv-&gt;plat-&gt;has_xgmac;</div><div class='add'>+	xmac = dwmac_is_xmac(priv-&gt;plat-&gt;core_type);</div><div class='ctx'> </div><div class='ctx'> 	if (delta &lt; 0) {</div><div class='ctx'> 		neg_adj = 1;</div><div class='hunk'>@@ -172,7 +173,11 @@ static int stmmac_enable(struct ptp_clock_info *ptp,</div><div class='ctx'> 	u32 acr_value;</div><div class='ctx'> </div><div class='ctx'> 	switch (rq-&gt;type) {</div><div class='del'>-	case PTP_CLK_REQ_PEROUT:</div><div class='add'>+	case PTP_CLK_REQ_PEROUT: {</div><div class='add'>+		struct timespec64 curr_time;</div><div class='add'>+		u64 target_ns = 0;</div><div class='add'>+		u64 ns = 0;</div><div class='add'>+</div><div class='ctx'> 		/* Reject requests with unsupported flags */</div><div class='ctx'> 		if (rq-&gt;perout.flags)</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='hunk'>@@ -181,6 +186,31 @@ static int stmmac_enable(struct ptp_clock_info *ptp,</div><div class='ctx'> </div><div class='ctx'> 		cfg-&gt;start.tv_sec = rq-&gt;perout.start.sec;</div><div class='ctx'> 		cfg-&gt;start.tv_nsec = rq-&gt;perout.start.nsec;</div><div class='add'>+</div><div class='add'>+		/* A time set in the past won't trigger the start of the flexible PPS generation for</div><div class='add'>+		 * the GMAC5. For some reason it does for the GMAC4 but setting a time in the past</div><div class='add'>+		 * should be addressed anyway. Therefore, any value set it the past is considered as</div><div class='add'>+		 * an offset compared to the current MAC system time.</div><div class='add'>+		 * Be aware that an offset too low may not trigger flexible PPS generation</div><div class='add'>+		 * if time spent in this configuration makes the targeted time already outdated.</div><div class='add'>+		 * To address this, add a safe time offset.</div><div class='add'>+		 */</div><div class='add'>+		if (!cfg-&gt;start.tv_sec &amp;&amp; cfg-&gt;start.tv_nsec &lt; PTP_SAFE_TIME_OFFSET_NS)</div><div class='add'>+			cfg-&gt;start.tv_nsec += PTP_SAFE_TIME_OFFSET_NS;</div><div class='add'>+</div><div class='add'>+		target_ns = cfg-&gt;start.tv_nsec + ((u64)cfg-&gt;start.tv_sec * NSEC_PER_SEC);</div><div class='add'>+</div><div class='add'>+		stmmac_get_systime(priv, priv-&gt;ptpaddr, &amp;ns);</div><div class='add'>+		if (ns &gt; TIME64_MAX - PTP_SAFE_TIME_OFFSET_NS)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		curr_time = ns_to_timespec64(ns);</div><div class='add'>+		if (target_ns &lt; ns + PTP_SAFE_TIME_OFFSET_NS) {</div><div class='add'>+			cfg-&gt;start = timespec64_add_safe(cfg-&gt;start, curr_time);</div><div class='add'>+			if (cfg-&gt;start.tv_sec == TIME64_MAX)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		cfg-&gt;period.tv_sec = rq-&gt;perout.period.sec;</div><div class='ctx'> 		cfg-&gt;period.tv_nsec = rq-&gt;perout.period.nsec;</div><div class='ctx'> </div><div class='hunk'>@@ -191,6 +221,7 @@ static int stmmac_enable(struct ptp_clock_info *ptp,</div><div class='ctx'> 					     priv-&gt;systime_flags);</div><div class='ctx'> 		write_unlock_irqrestore(&amp;priv-&gt;ptp_lock, flags);</div><div class='ctx'> 		break;</div><div class='add'>+	}</div><div class='ctx'> 	case PTP_CLK_REQ_EXTTS: {</div><div class='ctx'> 		u8 channel;</div><div class='ctx'> </div><div class='hunk'>@@ -248,10 +279,7 @@ static int stmmac_get_syncdevicetime(ktime_t *device,</div><div class='ctx'> {</div><div class='ctx'> 	struct stmmac_priv *priv = (struct stmmac_priv *)ctx;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;plat-&gt;crosststamp)</div><div class='del'>-		return priv-&gt;plat-&gt;crosststamp(device, system, ctx);</div><div class='del'>-	else</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+	return priv-&gt;plat-&gt;crosststamp(device, system, ctx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int stmmac_getcrosststamp(struct ptp_clock_info *ptp,</div><div class='hunk'>@@ -265,7 +293,7 @@ static int stmmac_getcrosststamp(struct ptp_clock_info *ptp,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* structure describing a PTP hardware clock */</div><div class='del'>-static struct ptp_clock_info stmmac_ptp_clock_ops = {</div><div class='add'>+const struct ptp_clock_info stmmac_ptp_clock_ops = {</div><div class='ctx'> 	.owner = THIS_MODULE,</div><div class='ctx'> 	.name = "stmmac ptp",</div><div class='ctx'> 	.max_adj = 62500000,</div><div class='hunk'>@@ -279,7 +307,23 @@ static struct ptp_clock_info stmmac_ptp_clock_ops = {</div><div class='ctx'> 	.gettime64 = stmmac_get_time,</div><div class='ctx'> 	.settime64 = stmmac_set_time,</div><div class='ctx'> 	.enable = stmmac_enable,</div><div class='del'>-	.getcrosststamp = stmmac_getcrosststamp,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* structure describing a PTP hardware clock */</div><div class='add'>+const struct ptp_clock_info dwmac1000_ptp_clock_ops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.name = "stmmac ptp",</div><div class='add'>+	.max_adj = 62500000,</div><div class='add'>+	.n_alarm = 0,</div><div class='add'>+	.n_ext_ts = 1,</div><div class='add'>+	.n_per_out = 0,</div><div class='add'>+	.n_pins = 0,</div><div class='add'>+	.pps = 0,</div><div class='add'>+	.adjfine = stmmac_adjust_freq,</div><div class='add'>+	.adjtime = stmmac_adjust_time,</div><div class='add'>+	.gettime64 = stmmac_get_time,</div><div class='add'>+	.settime64 = stmmac_set_time,</div><div class='add'>+	.enable = dwmac1000_ptp_enable,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -298,28 +342,40 @@ void stmmac_ptp_register(struct stmmac_priv *priv)</div><div class='ctx'> 		priv-&gt;pps[i].available = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;plat-&gt;ptp_max_adj)</div><div class='del'>-		stmmac_ptp_clock_ops.max_adj = priv-&gt;plat-&gt;ptp_max_adj;</div><div class='del'>-</div><div class='ctx'> 	/* Calculate the clock domain crossing (CDC) error if necessary */</div><div class='ctx'> 	priv-&gt;plat-&gt;cdc_error_adj = 0;</div><div class='del'>-	if (priv-&gt;plat-&gt;has_gmac4 &amp;&amp; priv-&gt;plat-&gt;clk_ptp_rate)</div><div class='add'>+	if (priv-&gt;plat-&gt;core_type == DWMAC_CORE_GMAC4)</div><div class='ctx'> 		priv-&gt;plat-&gt;cdc_error_adj = (2 * NSEC_PER_SEC) / priv-&gt;plat-&gt;clk_ptp_rate;</div><div class='ctx'> </div><div class='del'>-	stmmac_ptp_clock_ops.n_per_out = priv-&gt;dma_cap.pps_out_num;</div><div class='del'>-	stmmac_ptp_clock_ops.n_ext_ts = priv-&gt;dma_cap.aux_snapshot_n;</div><div class='add'>+	/* Update the ptp clock parameters based on feature discovery, when</div><div class='add'>+	 * available</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;dma_cap.pps_out_num)</div><div class='add'>+		priv-&gt;ptp_clock_ops.n_per_out = priv-&gt;dma_cap.pps_out_num;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;dma_cap.aux_snapshot_n)</div><div class='add'>+		priv-&gt;ptp_clock_ops.n_ext_ts = priv-&gt;dma_cap.aux_snapshot_n;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;plat-&gt;ptp_max_adj)</div><div class='add'>+		priv-&gt;ptp_clock_ops.max_adj = priv-&gt;plat-&gt;ptp_max_adj;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;plat-&gt;crosststamp)</div><div class='add'>+		priv-&gt;ptp_clock_ops.getcrosststamp = stmmac_getcrosststamp;</div><div class='ctx'> </div><div class='ctx'> 	rwlock_init(&amp;priv-&gt;ptp_lock);</div><div class='ctx'> 	mutex_init(&amp;priv-&gt;aux_ts_lock);</div><div class='del'>-	priv-&gt;ptp_clock_ops = stmmac_ptp_clock_ops;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;ptp_clock = ptp_clock_register(&amp;priv-&gt;ptp_clock_ops,</div><div class='ctx'> 					     priv-&gt;device);</div><div class='ctx'> 	if (IS_ERR(priv-&gt;ptp_clock)) {</div><div class='ctx'> 		netdev_err(priv-&gt;dev, "ptp_clock_register failed\n");</div><div class='ctx'> 		priv-&gt;ptp_clock = NULL;</div><div class='del'>-	} else if (priv-&gt;ptp_clock)</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ptp_clock)</div><div class='ctx'> 		netdev_info(priv-&gt;dev, "registered PTP clock\n");</div><div class='add'>+	else</div><div class='add'>+		mutex_destroy(&amp;priv-&gt;aux_ts_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -335,7 +391,7 @@ void stmmac_ptp_unregister(struct stmmac_priv *priv)</div><div class='ctx'> 		priv-&gt;ptp_clock = NULL;</div><div class='ctx'> 		pr_debug("Removed PTP HW clock successfully on %s\n",</div><div class='ctx'> 			 priv-&gt;dev-&gt;name);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	mutex_destroy(&amp;priv-&gt;aux_ts_lock);</div><div class='add'>+		mutex_destroy(&amp;priv-&gt;aux_ts_lock);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h<br/>index fce3fba2ffd2..3fe0e3a80e80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h</a></div><div class='hunk'>@@ -94,4 +94,17 @@ enum aux_snapshot {</div><div class='ctx'> 	AUX_SNAPSHOT3 = 0x80,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ptp_clock_info;</div><div class='add'>+struct ptp_clock_request;</div><div class='add'>+struct stmmac_priv;</div><div class='add'>+</div><div class='add'>+int dwmac1000_ptp_enable(struct ptp_clock_info *ptp,</div><div class='add'>+			 struct ptp_clock_request *rq, int on);</div><div class='add'>+</div><div class='add'>+void dwmac1000_get_ptptime(void __iomem *ptpaddr, u64 *ptp_time);</div><div class='add'>+void dwmac1000_timestamp_interrupt(struct stmmac_priv *priv);</div><div class='add'>+</div><div class='add'>+extern const struct ptp_clock_info stmmac_ptp_clock_ops;</div><div class='add'>+extern const struct ptp_clock_info dwmac1000_ptp_clock_ops;</div><div class='add'>+</div><div class='ctx'> #endif	/* __STMMAC_PTP_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c<br/>index 3ca1c2a816ff..e90a2c469b9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c</a></div><div class='hunk'>@@ -382,14 +382,14 @@ static int stmmac_test_phy_loopback(struct stmmac_priv *priv)</div><div class='ctx'> 	if (!priv-&gt;dev-&gt;phydev)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	ret = phy_loopback(priv-&gt;dev-&gt;phydev, true);</div><div class='add'>+	ret = phy_loopback(priv-&gt;dev-&gt;phydev, true, 0);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	attr.dst = priv-&gt;dev-&gt;dev_addr;</div><div class='ctx'> 	ret = __stmmac_test_loopback(priv, &amp;attr);</div><div class='ctx'> </div><div class='del'>-	phy_loopback(priv-&gt;dev-&gt;phydev, false);</div><div class='add'>+	phy_loopback(priv-&gt;dev-&gt;phydev, false, 0);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1721,7 +1721,7 @@ static int stmmac_test_sph(struct stmmac_priv *priv)</div><div class='ctx'> 	struct stmmac_packet_attrs attr = { };</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;sph)</div><div class='add'>+	if (!priv-&gt;sph_active)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	/* Check for UDP first */</div><div class='hunk'>@@ -1985,7 +1985,7 @@ void stmmac_selftest_run(struct net_device *dev,</div><div class='ctx'> 		case STMMAC_LOOPBACK_PHY:</div><div class='ctx'> 			ret = -EOPNOTSUPP;</div><div class='ctx'> 			if (dev-&gt;phydev)</div><div class='del'>-				ret = phy_loopback(dev-&gt;phydev, true);</div><div class='add'>+				ret = phy_loopback(dev-&gt;phydev, true, 0);</div><div class='ctx'> 			if (!ret)</div><div class='ctx'> 				break;</div><div class='ctx'> 			fallthrough;</div><div class='hunk'>@@ -2018,7 +2018,7 @@ void stmmac_selftest_run(struct net_device *dev,</div><div class='ctx'> 		case STMMAC_LOOPBACK_PHY:</div><div class='ctx'> 			ret = -EOPNOTSUPP;</div><div class='ctx'> 			if (dev-&gt;phydev)</div><div class='del'>-				ret = phy_loopback(dev-&gt;phydev, false);</div><div class='add'>+				ret = phy_loopback(dev-&gt;phydev, false, 0);</div><div class='ctx'> 			if (!ret)</div><div class='ctx'> 				break;</div><div class='ctx'> 			fallthrough;</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c<br/>index 75ad2da1a37f..d78652718599 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c</a></div><div class='hunk'>@@ -262,10 +262,10 @@ static int tc_init(struct stmmac_priv *priv)</div><div class='ctx'> 	unsigned int count;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='del'>-	if (dma_cap-&gt;l3l4fnum) {</div><div class='del'>-		priv-&gt;flow_entries_max = dma_cap-&gt;l3l4fnum;</div><div class='add'>+	priv-&gt;flow_entries_max = dma_cap-&gt;l3l4fnum;</div><div class='add'>+	if (priv-&gt;flow_entries_max) {</div><div class='ctx'> 		priv-&gt;flow_entries = devm_kcalloc(priv-&gt;device,</div><div class='del'>-						  dma_cap-&gt;l3l4fnum,</div><div class='add'>+						  priv-&gt;flow_entries_max,</div><div class='ctx'> 						  sizeof(*priv-&gt;flow_entries),</div><div class='ctx'> 						  GFP_KERNEL);</div><div class='ctx'> 		if (!priv-&gt;flow_entries)</div><div class='hunk'>@@ -981,7 +981,7 @@ static int tc_taprio_configure(struct stmmac_priv *priv,</div><div class='ctx'> 	if (qopt-&gt;cmd == TAPRIO_CMD_DESTROY)</div><div class='ctx'> 		goto disable;</div><div class='ctx'> </div><div class='del'>-	if (qopt-&gt;num_entries &gt;= dep)</div><div class='add'>+	if (qopt-&gt;num_entries &gt; dep)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	if (!qopt-&gt;cycle_time)</div><div class='ctx'> 		return -ERANGE;</div><div class='hunk'>@@ -1012,7 +1012,7 @@ static int tc_taprio_configure(struct stmmac_priv *priv,</div><div class='ctx'> 		s64 delta_ns = qopt-&gt;entries[i].interval;</div><div class='ctx'> 		u32 gates = qopt-&gt;entries[i].gate_mask;</div><div class='ctx'> </div><div class='del'>-		if (delta_ns &gt; GENMASK(wid, 0))</div><div class='add'>+		if (delta_ns &gt; GENMASK(wid - 1, 0))</div><div class='ctx'> 			return -ERANGE;</div><div class='ctx'> 		if (gates &gt; GENMASK(31 - wid, 0))</div><div class='ctx'> 			return -ERANGE;</div><div class='hunk'>@@ -1080,6 +1080,7 @@ disable:</div><div class='ctx'> 		for (i = 0; i &lt; priv-&gt;plat-&gt;tx_queues_to_use; i++) {</div><div class='ctx'> 			priv-&gt;xstats.max_sdu_txq_drop[i] = 0;</div><div class='ctx'> 			priv-&gt;xstats.mtl_est_txq_hlbf[i] = 0;</div><div class='add'>+			priv-&gt;xstats.mtl_est_txq_hlbs[i] = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		mutex_unlock(&amp;priv-&gt;est_lock);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1097,7 +1098,8 @@ static void tc_taprio_stats(struct stmmac_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; priv-&gt;plat-&gt;tx_queues_to_use; i++)</div><div class='ctx'> 		window_drops += priv-&gt;xstats.max_sdu_txq_drop[i] +</div><div class='del'>-				priv-&gt;xstats.mtl_est_txq_hlbf[i];</div><div class='add'>+				priv-&gt;xstats.mtl_est_txq_hlbf[i] +</div><div class='add'>+				priv-&gt;xstats.mtl_est_txq_hlbs[i];</div><div class='ctx'> 	qopt-&gt;stats.window_drops = window_drops;</div><div class='ctx'> </div><div class='ctx'> 	/* Transmission overrun doesn't happen for stmmac, hence always 0 */</div><div class='hunk'>@@ -1111,7 +1113,8 @@ static void tc_taprio_queue_stats(struct stmmac_priv *priv,</div><div class='ctx'> 	int queue = qopt-&gt;queue_stats.queue;</div><div class='ctx'> </div><div class='ctx'> 	q_stats-&gt;stats.window_drops = priv-&gt;xstats.max_sdu_txq_drop[queue] +</div><div class='del'>-				      priv-&gt;xstats.mtl_est_txq_hlbf[queue];</div><div class='add'>+				      priv-&gt;xstats.mtl_est_txq_hlbf[queue] +</div><div class='add'>+				      priv-&gt;xstats.mtl_est_txq_hlbs[queue];</div><div class='ctx'> </div><div class='ctx'> 	/* Transmission overrun doesn't happen for stmmac, hence always 0 */</div><div class='ctx'> 	q_stats-&gt;stats.tx_overruns = 0;</div><div class='hunk'>@@ -1284,14 +1287,3 @@ const struct stmmac_tc_ops dwmac510_tc_ops = {</div><div class='ctx'> 	.query_caps = tc_query_caps,</div><div class='ctx'> 	.setup_mqprio = tc_setup_dwmac510_mqprio,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-const struct stmmac_tc_ops dwxgmac_tc_ops = {</div><div class='del'>-	.init = tc_init,</div><div class='del'>-	.setup_cls_u32 = tc_setup_cls_u32,</div><div class='del'>-	.setup_cbs = tc_setup_cbs,</div><div class='del'>-	.setup_cls = tc_setup_cls,</div><div class='del'>-	.setup_taprio = tc_setup_taprio_without_fpe,</div><div class='del'>-	.setup_etf = tc_setup_etf,</div><div class='del'>-	.query_caps = tc_query_caps,</div><div class='del'>-	.setup_mqprio = tc_setup_mqprio_unimplemented,</div><div class='del'>-};</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c<br/>new file mode 100644<br/>index 000000000000..b18404dd5a8b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c</a></div><div class='hunk'>@@ -0,0 +1,375 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025, Altera Corporation</div><div class='add'>+ * stmmac VLAN (802.1Q) handling</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "stmmac.h"</div><div class='add'>+#include "stmmac_vlan.h"</div><div class='add'>+</div><div class='add'>+static void vlan_write_single(struct net_device *dev, u16 vid)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = (void __iomem *)dev-&gt;base_addr;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = readl(ioaddr + VLAN_TAG);</div><div class='add'>+	val &amp;= ~VLAN_TAG_VID;</div><div class='add'>+	val |= VLAN_TAG_ETV | vid;</div><div class='add'>+</div><div class='add'>+	writel(val, ioaddr + VLAN_TAG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vlan_write_filter(struct net_device *dev,</div><div class='add'>+			     struct mac_device_info *hw,</div><div class='add'>+			     u8 index, u32 data)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = (void __iomem *)dev-&gt;base_addr;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= hw-&gt;num_vlan)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	writel(data, ioaddr + VLAN_TAG_DATA);</div><div class='add'>+</div><div class='add'>+	val = readl(ioaddr + VLAN_TAG);</div><div class='add'>+	val &amp;= ~(VLAN_TAG_CTRL_OFS_MASK |</div><div class='add'>+		VLAN_TAG_CTRL_CT |</div><div class='add'>+		VLAN_TAG_CTRL_OB);</div><div class='add'>+	val |= (index &lt;&lt; VLAN_TAG_CTRL_OFS_SHIFT) | VLAN_TAG_CTRL_OB;</div><div class='add'>+</div><div class='add'>+	writel(val, ioaddr + VLAN_TAG);</div><div class='add'>+</div><div class='add'>+	ret = readl_poll_timeout(ioaddr + VLAN_TAG, val,</div><div class='add'>+				 !(val &amp; VLAN_TAG_CTRL_OB),</div><div class='add'>+				 1000, 500000);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(dev, "Timeout accessing MAC_VLAN_Tag_Filter\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vlan_add_hw_rx_fltr(struct net_device *dev,</div><div class='add'>+			       struct mac_device_info *hw,</div><div class='add'>+			       __be16 proto, u16 vid)</div><div class='add'>+{</div><div class='add'>+	int index = -1;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	if (vid &gt; 4095)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Single Rx VLAN Filter */</div><div class='add'>+	if (hw-&gt;num_vlan == 1) {</div><div class='add'>+		/* For single VLAN filter, VID 0 means VLAN promiscuous */</div><div class='add'>+		if (vid == 0) {</div><div class='add'>+			netdev_warn(dev, "Adding VLAN ID 0 is not supported\n");</div><div class='add'>+			return -EPERM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (hw-&gt;vlan_filter[0] &amp; VLAN_TAG_VID) {</div><div class='add'>+			netdev_err(dev, "Only single VLAN ID supported\n");</div><div class='add'>+			return -EPERM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hw-&gt;vlan_filter[0] = vid;</div><div class='add'>+		vlan_write_single(dev, vid);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Extended Rx VLAN Filter Enable */</div><div class='add'>+	val |= VLAN_TAG_DATA_ETV | VLAN_TAG_DATA_VEN | vid;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; hw-&gt;num_vlan; i++) {</div><div class='add'>+		if (hw-&gt;vlan_filter[i] == val)</div><div class='add'>+			return 0;</div><div class='add'>+		else if (!(hw-&gt;vlan_filter[i] &amp; VLAN_TAG_DATA_VEN))</div><div class='add'>+			index = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (index == -1) {</div><div class='add'>+		netdev_err(dev, "MAC_VLAN_Tag_Filter full (size: %0u)\n",</div><div class='add'>+			   hw-&gt;num_vlan);</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = vlan_write_filter(dev, hw, index, val);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		hw-&gt;vlan_filter[index] = val;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vlan_del_hw_rx_fltr(struct net_device *dev,</div><div class='add'>+			       struct mac_device_info *hw,</div><div class='add'>+			       __be16 proto, u16 vid)</div><div class='add'>+{</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Single Rx VLAN Filter */</div><div class='add'>+	if (hw-&gt;num_vlan == 1) {</div><div class='add'>+		if ((hw-&gt;vlan_filter[0] &amp; VLAN_TAG_VID) == vid) {</div><div class='add'>+			hw-&gt;vlan_filter[0] = 0;</div><div class='add'>+			vlan_write_single(dev, 0);</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Extended Rx VLAN Filter Enable */</div><div class='add'>+	for (i = 0; i &lt; hw-&gt;num_vlan; i++) {</div><div class='add'>+		if ((hw-&gt;vlan_filter[i] &amp; VLAN_TAG_DATA_VEN) &amp;&amp;</div><div class='add'>+		    ((hw-&gt;vlan_filter[i] &amp; VLAN_TAG_DATA_VID) == vid)) {</div><div class='add'>+			ret = vlan_write_filter(dev, hw, i, 0);</div><div class='add'>+</div><div class='add'>+			if (!ret)</div><div class='add'>+				hw-&gt;vlan_filter[i] = 0;</div><div class='add'>+			else</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vlan_restore_hw_rx_fltr(struct net_device *dev,</div><div class='add'>+				    struct mac_device_info *hw)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='add'>+	u32 value;</div><div class='add'>+	u32 hash;</div><div class='add'>+	u32 val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Single Rx VLAN Filter */</div><div class='add'>+	if (hw-&gt;num_vlan == 1) {</div><div class='add'>+		vlan_write_single(dev, hw-&gt;vlan_filter[0]);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Extended Rx VLAN Filter Enable */</div><div class='add'>+	for (i = 0; i &lt; hw-&gt;num_vlan; i++) {</div><div class='add'>+		if (hw-&gt;vlan_filter[i] &amp; VLAN_TAG_DATA_VEN) {</div><div class='add'>+			val = hw-&gt;vlan_filter[i];</div><div class='add'>+			vlan_write_filter(dev, hw, i, val);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hash = readl(ioaddr + VLAN_HASH_TABLE);</div><div class='add'>+	if (hash &amp; VLAN_VLHT) {</div><div class='add'>+		value = readl(ioaddr + VLAN_TAG);</div><div class='add'>+		value |= VLAN_VTHM;</div><div class='add'>+		writel(value, ioaddr + VLAN_TAG);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vlan_update_hash(struct mac_device_info *hw, u32 hash,</div><div class='add'>+			     u16 perfect_match, bool is_double)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	writel(hash, ioaddr + VLAN_HASH_TABLE);</div><div class='add'>+</div><div class='add'>+	value = readl(ioaddr + VLAN_TAG);</div><div class='add'>+</div><div class='add'>+	if (hash) {</div><div class='add'>+		value |= VLAN_VTHM | VLAN_ETV;</div><div class='add'>+		if (is_double) {</div><div class='add'>+			value |= VLAN_EDVLP;</div><div class='add'>+			value |= VLAN_ESVL;</div><div class='add'>+			value |= VLAN_DOVLTC;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		writel(value, ioaddr + VLAN_TAG);</div><div class='add'>+	} else if (perfect_match) {</div><div class='add'>+		u32 value = VLAN_ETV;</div><div class='add'>+</div><div class='add'>+		if (is_double) {</div><div class='add'>+			value |= VLAN_EDVLP;</div><div class='add'>+			value |= VLAN_ESVL;</div><div class='add'>+			value |= VLAN_DOVLTC;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		writel(value | perfect_match, ioaddr + VLAN_TAG);</div><div class='add'>+	} else {</div><div class='add'>+		value &amp;= ~(VLAN_VTHM | VLAN_ETV);</div><div class='add'>+		value &amp;= ~(VLAN_EDVLP | VLAN_ESVL);</div><div class='add'>+		value &amp;= ~VLAN_DOVLTC;</div><div class='add'>+		value &amp;= ~VLAN_VID;</div><div class='add'>+</div><div class='add'>+		writel(value, ioaddr + VLAN_TAG);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vlan_enable(struct mac_device_info *hw, u32 type)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	value = readl(ioaddr + VLAN_INCL);</div><div class='add'>+	value |= VLAN_VLTI;</div><div class='add'>+	value &amp;= ~VLAN_CSVL; /* Only use CVLAN */</div><div class='add'>+	value &amp;= ~VLAN_VLC;</div><div class='add'>+	value |= (type &lt;&lt; VLAN_VLC_SHIFT) &amp; VLAN_VLC;</div><div class='add'>+	writel(value, ioaddr + VLAN_INCL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vlan_rx_hw(struct mac_device_info *hw,</div><div class='add'>+		       struct dma_desc *rx_desc, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (hw-&gt;desc-&gt;get_rx_vlan_valid(rx_desc)) {</div><div class='add'>+		u16 vid = hw-&gt;desc-&gt;get_rx_vlan_tci(rx_desc);</div><div class='add'>+</div><div class='add'>+		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vlan_set_hw_mode(struct mac_device_info *hw)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='add'>+	u32 value = readl(ioaddr + VLAN_TAG);</div><div class='add'>+</div><div class='add'>+	value &amp;= ~VLAN_TAG_CTRL_EVLS_MASK;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;hw_vlan_en)</div><div class='add'>+		/* Always strip VLAN on Receive */</div><div class='add'>+		value |= VLAN_TAG_STRIP_ALL;</div><div class='add'>+	else</div><div class='add'>+		/* Do not strip VLAN on Receive */</div><div class='add'>+		value |= VLAN_TAG_STRIP_NONE;</div><div class='add'>+</div><div class='add'>+	/* Enable outer VLAN Tag in Rx DMA descriptor */</div><div class='add'>+	value |= VLAN_TAG_CTRL_EVLRXS;</div><div class='add'>+	writel(value, ioaddr + VLAN_TAG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dwxgmac2_update_vlan_hash(struct mac_device_info *hw, u32 hash,</div><div class='add'>+				      u16 perfect_match, bool is_double)</div><div class='add'>+{</div><div class='add'>+	void __iomem *ioaddr = hw-&gt;pcsr;</div><div class='add'>+</div><div class='add'>+	writel(hash, ioaddr + VLAN_HASH_TABLE);</div><div class='add'>+</div><div class='add'>+	if (hash) {</div><div class='add'>+		u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);</div><div class='add'>+</div><div class='add'>+		value |= XGMAC_FILTER_VTFE;</div><div class='add'>+</div><div class='add'>+		writel(value, ioaddr + XGMAC_PACKET_FILTER);</div><div class='add'>+</div><div class='add'>+		value = readl(ioaddr + VLAN_TAG);</div><div class='add'>+</div><div class='add'>+		value |= VLAN_VTHM | VLAN_ETV;</div><div class='add'>+		if (is_double) {</div><div class='add'>+			value |= VLAN_EDVLP;</div><div class='add'>+			value |= VLAN_ESVL;</div><div class='add'>+			value |= VLAN_DOVLTC;</div><div class='add'>+		} else {</div><div class='add'>+			value &amp;= ~VLAN_EDVLP;</div><div class='add'>+			value &amp;= ~VLAN_ESVL;</div><div class='add'>+			value &amp;= ~VLAN_DOVLTC;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		value &amp;= ~VLAN_VID;</div><div class='add'>+		writel(value, ioaddr + VLAN_TAG);</div><div class='add'>+	} else if (perfect_match) {</div><div class='add'>+		u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);</div><div class='add'>+</div><div class='add'>+		value |= XGMAC_FILTER_VTFE;</div><div class='add'>+</div><div class='add'>+		writel(value, ioaddr + XGMAC_PACKET_FILTER);</div><div class='add'>+</div><div class='add'>+		value = readl(ioaddr + VLAN_TAG);</div><div class='add'>+</div><div class='add'>+		value &amp;= ~VLAN_VTHM;</div><div class='add'>+		value |= VLAN_ETV;</div><div class='add'>+		if (is_double) {</div><div class='add'>+			value |= VLAN_EDVLP;</div><div class='add'>+			value |= VLAN_ESVL;</div><div class='add'>+			value |= VLAN_DOVLTC;</div><div class='add'>+		} else {</div><div class='add'>+			value &amp;= ~VLAN_EDVLP;</div><div class='add'>+			value &amp;= ~VLAN_ESVL;</div><div class='add'>+			value &amp;= ~VLAN_DOVLTC;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		value &amp;= ~VLAN_VID;</div><div class='add'>+		writel(value | perfect_match, ioaddr + VLAN_TAG);</div><div class='add'>+	} else {</div><div class='add'>+		u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);</div><div class='add'>+</div><div class='add'>+		value &amp;= ~XGMAC_FILTER_VTFE;</div><div class='add'>+</div><div class='add'>+		writel(value, ioaddr + XGMAC_PACKET_FILTER);</div><div class='add'>+</div><div class='add'>+		value = readl(ioaddr + VLAN_TAG);</div><div class='add'>+</div><div class='add'>+		value &amp;= ~(VLAN_VTHM | VLAN_ETV);</div><div class='add'>+		value &amp;= ~(VLAN_EDVLP | VLAN_ESVL);</div><div class='add'>+		value &amp;= ~VLAN_DOVLTC;</div><div class='add'>+		value &amp;= ~VLAN_VID;</div><div class='add'>+</div><div class='add'>+		writel(value, ioaddr + VLAN_TAG);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct stmmac_vlan_ops dwmac_vlan_ops = {</div><div class='add'>+	.update_vlan_hash = vlan_update_hash,</div><div class='add'>+	.enable_vlan = vlan_enable,</div><div class='add'>+	.add_hw_vlan_rx_fltr = vlan_add_hw_rx_fltr,</div><div class='add'>+	.del_hw_vlan_rx_fltr = vlan_del_hw_rx_fltr,</div><div class='add'>+	.restore_hw_vlan_rx_fltr = vlan_restore_hw_rx_fltr,</div><div class='add'>+	.rx_hw_vlan = vlan_rx_hw,</div><div class='add'>+	.set_hw_vlan_mode = vlan_set_hw_mode,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct stmmac_vlan_ops dwxlgmac2_vlan_ops = {</div><div class='add'>+	.update_vlan_hash = dwxgmac2_update_vlan_hash,</div><div class='add'>+	.enable_vlan = vlan_enable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct stmmac_vlan_ops dwxgmac210_vlan_ops = {</div><div class='add'>+	.update_vlan_hash = dwxgmac2_update_vlan_hash,</div><div class='add'>+	.enable_vlan = vlan_enable,</div><div class='add'>+	.add_hw_vlan_rx_fltr = vlan_add_hw_rx_fltr,</div><div class='add'>+	.del_hw_vlan_rx_fltr = vlan_del_hw_rx_fltr,</div><div class='add'>+	.restore_hw_vlan_rx_fltr = vlan_restore_hw_rx_fltr,</div><div class='add'>+	.rx_hw_vlan = vlan_rx_hw,</div><div class='add'>+	.set_hw_vlan_mode = vlan_set_hw_mode,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u32 stmmac_get_num_vlan(void __iomem *ioaddr)</div><div class='add'>+{</div><div class='add'>+	u32 val, num_vlan;</div><div class='add'>+</div><div class='add'>+	val = readl(ioaddr + HW_FEATURE3);</div><div class='add'>+	switch (val &amp; VLAN_HW_FEAT_NRVF) {</div><div class='add'>+	case 0:</div><div class='add'>+		num_vlan = 1;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		num_vlan = 4;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		num_vlan = 8;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		num_vlan = 16;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		num_vlan = 24;</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+		num_vlan = 32;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		num_vlan = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return num_vlan;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h<br/>new file mode 100644<br/>index 000000000000..c24f89a9049b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2025, Altera Corporation</div><div class='add'>+ * stmmac VLAN(802.1Q) handling</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __STMMAC_VLAN_H__</div><div class='add'>+#define __STMMAC_VLAN_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include "dwxgmac2.h"</div><div class='add'>+</div><div class='add'>+#define VLAN_TAG			0x00000050</div><div class='add'>+#define VLAN_TAG_DATA			0x00000054</div><div class='add'>+#define VLAN_HASH_TABLE			0x00000058</div><div class='add'>+#define VLAN_INCL			0x00000060</div><div class='add'>+</div><div class='add'>+/* MAC VLAN */</div><div class='add'>+#define VLAN_EDVLP			BIT(26)</div><div class='add'>+#define VLAN_VTHM			BIT(25)</div><div class='add'>+#define VLAN_DOVLTC			BIT(20)</div><div class='add'>+#define VLAN_ESVL			BIT(18)</div><div class='add'>+#define VLAN_ETV			BIT(16)</div><div class='add'>+#define VLAN_VID			GENMASK(15, 0)</div><div class='add'>+#define VLAN_VLTI			BIT(20)</div><div class='add'>+#define VLAN_CSVL			BIT(19)</div><div class='add'>+#define VLAN_VLC			GENMASK(17, 16)</div><div class='add'>+#define VLAN_VLC_SHIFT			16</div><div class='add'>+#define VLAN_VLHT			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* MAC VLAN Tag */</div><div class='add'>+#define VLAN_TAG_VID			GENMASK(15, 0)</div><div class='add'>+#define VLAN_TAG_ETV			BIT(16)</div><div class='add'>+</div><div class='add'>+/* MAC VLAN Tag Control */</div><div class='add'>+#define VLAN_TAG_CTRL_OB		BIT(0)</div><div class='add'>+#define VLAN_TAG_CTRL_CT		BIT(1)</div><div class='add'>+#define VLAN_TAG_CTRL_OFS_MASK		GENMASK(6, 2)</div><div class='add'>+#define VLAN_TAG_CTRL_OFS_SHIFT		2</div><div class='add'>+#define VLAN_TAG_CTRL_EVLS_MASK		GENMASK(22, 21)</div><div class='add'>+#define VLAN_TAG_CTRL_EVLS_SHIFT	21</div><div class='add'>+#define VLAN_TAG_CTRL_EVLRXS		BIT(24)</div><div class='add'>+</div><div class='add'>+#define VLAN_TAG_STRIP_NONE		FIELD_PREP(VLAN_TAG_CTRL_EVLS_MASK, 0x0)</div><div class='add'>+#define VLAN_TAG_STRIP_PASS		FIELD_PREP(VLAN_TAG_CTRL_EVLS_MASK, 0x1)</div><div class='add'>+#define VLAN_TAG_STRIP_FAIL		FIELD_PREP(VLAN_TAG_CTRL_EVLS_MASK, 0x2)</div><div class='add'>+#define VLAN_TAG_STRIP_ALL		FIELD_PREP(VLAN_TAG_CTRL_EVLS_MASK, 0x3)</div><div class='add'>+</div><div class='add'>+/* MAC VLAN Tag Data/Filter */</div><div class='add'>+#define VLAN_TAG_DATA_VID		GENMASK(15, 0)</div><div class='add'>+#define VLAN_TAG_DATA_VEN		BIT(16)</div><div class='add'>+#define VLAN_TAG_DATA_ETV		BIT(17)</div><div class='add'>+</div><div class='add'>+/* MAC VLAN HW FEAT */</div><div class='add'>+#define HW_FEATURE3			0x00000128</div><div class='add'>+#define VLAN_HW_FEAT_NRVF		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+extern const struct stmmac_vlan_ops dwmac_vlan_ops;</div><div class='add'>+extern const struct stmmac_vlan_ops dwxgmac210_vlan_ops;</div><div class='add'>+extern const struct stmmac_vlan_ops dwxlgmac2_vlan_ops;</div><div class='add'>+</div><div class='add'>+u32 stmmac_get_num_vlan(void __iomem *ioaddr);</div><div class='add'>+</div><div class='add'>+#endif /* __STMMAC_VLAN_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.c<br/>index aa6f16d3df64..d7e4db7224b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.c</a></div><div class='hunk'>@@ -129,7 +129,7 @@ int stmmac_xdp_set_prog(struct stmmac_priv *priv, struct bpf_prog *prog,</div><div class='ctx'> 		bpf_prog_put(old_prog);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable RX SPH for XDP operation */</div><div class='del'>-	priv-&gt;sph = priv-&gt;sph_cap &amp;&amp; !stmmac_xdp_is_enabled(priv);</div><div class='add'>+	priv-&gt;sph_active = priv-&gt;sph_capable &amp;&amp; !stmmac_xdp_is_enabled(priv);</div><div class='ctx'> </div><div class='ctx'> 	if (if_running &amp;&amp; need_update)</div><div class='ctx'> 		stmmac_xdp_open(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.h<br/>index 896dc987d4ef..77ce8cfbe976 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.h</a></div><div class='hunk'>@@ -4,7 +4,6 @@</div><div class='ctx'> #ifndef _STMMAC_XDP_H_</div><div class='ctx'> #define _STMMAC_XDP_H_</div><div class='ctx'> </div><div class='del'>-#define STMMAC_MAX_RX_BUF_SIZE(num)	(((num) * PAGE_SIZE) - XDP_PACKET_HEADROOM)</div><div class='ctx'> #define STMMAC_RX_DMA_ATTR	(DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)</div><div class='ctx'> </div><div class='ctx'> int stmmac_xdp_setup_pool(struct stmmac_priv *priv, struct xsk_buff_pool *pool,</div><div class='head'>diff --git a/drivers/net/ethernet/sun/cassini.c b/drivers/net/ethernet/sun/cassini.c<br/>index b8948d5b779a..acfb523214b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/cassini.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/cassini.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/cassini.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sun/cassini.c</a></div><div class='hunk'>@@ -3779,7 +3779,7 @@ static void cas_shutdown(struct cas *cp)</div><div class='ctx'> 	/* Make us not-running to avoid timers respawning */</div><div class='ctx'> 	cp-&gt;hw_running = 0;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;cp-&gt;link_timer);</div><div class='add'>+	timer_delete_sync(&amp;cp-&gt;link_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the reset task */</div><div class='ctx'> #if 0</div><div class='hunk'>@@ -4021,7 +4021,7 @@ done:</div><div class='ctx'> </div><div class='ctx'> static void cas_link_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct cas *cp = from_timer(cp, t, link_timer);</div><div class='add'>+	struct cas *cp = timer_container_of(cp, t, link_timer);</div><div class='ctx'> 	int mask, pending = 0, reset = 0;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sun/ldmvsw.c b/drivers/net/ethernet/sun/ldmvsw.c<br/>index a9a6670b5ff1..6fc37ab27f7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/ldmvsw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/ldmvsw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/ldmvsw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sun/ldmvsw.c</a></div><div class='hunk'>@@ -390,7 +390,7 @@ static int vsw_port_probe(struct vio_dev *vdev, const struct vio_device_id *id)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_out_del_timer:</div><div class='del'>-	del_timer_sync(&amp;port-&gt;clean_timer);</div><div class='add'>+	timer_delete_sync(&amp;port-&gt;clean_timer);</div><div class='ctx'> 	list_del_rcu(&amp;port-&gt;list);</div><div class='ctx'> 	synchronize_rcu();</div><div class='ctx'> 	netif_napi_del(&amp;port-&gt;napi);</div><div class='hunk'>@@ -408,8 +408,8 @@ static void vsw_port_remove(struct vio_dev *vdev)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	if (port) {</div><div class='del'>-		del_timer_sync(&amp;port-&gt;vio.timer);</div><div class='del'>-		del_timer_sync(&amp;port-&gt;clean_timer);</div><div class='add'>+		timer_delete_sync(&amp;port-&gt;vio.timer);</div><div class='add'>+		timer_delete_sync(&amp;port-&gt;clean_timer);</div><div class='ctx'> </div><div class='ctx'> 		napi_disable(&amp;port-&gt;napi);</div><div class='ctx'> 		unregister_netdev(port-&gt;dev);</div><div class='head'>diff --git a/drivers/net/ethernet/sun/niu.c b/drivers/net/ethernet/sun/niu.c<br/>index df6d35d41b97..893216b0e08d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/niu.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/niu.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/niu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sun/niu.c</a></div><div class='hunk'>@@ -2225,7 +2225,7 @@ static int niu_link_status(struct niu *np, int *link_up_p)</div><div class='ctx'> </div><div class='ctx'> static void niu_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct niu *np = from_timer(np, t, timer);</div><div class='add'>+	struct niu *np = timer_container_of(np, t, timer);</div><div class='ctx'> 	unsigned long off;</div><div class='ctx'> 	int err, link_up;</div><div class='ctx'> </div><div class='hunk'>@@ -3303,7 +3303,7 @@ static struct page *niu_find_rxpage(struct rx_ring_info *rp, u64 addr,</div><div class='ctx'> 	addr &amp;= PAGE_MASK;</div><div class='ctx'> 	pp = &amp;rp-&gt;rxhash[h];</div><div class='ctx'> 	for (; (p = *pp) != NULL; pp = &amp;niu_next_page(p)) {</div><div class='del'>-		if (p-&gt;index == addr) {</div><div class='add'>+		if (p-&gt;private == addr) {</div><div class='ctx'> 			*link = pp;</div><div class='ctx'> 			goto found;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3318,7 +3318,7 @@ static void niu_hash_page(struct rx_ring_info *rp, struct page *page, u64 base)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int h = niu_hash_rxaddr(rp, base);</div><div class='ctx'> </div><div class='del'>-	page-&gt;index = base;</div><div class='add'>+	page-&gt;private = base;</div><div class='ctx'> 	niu_next_page(page) = rp-&gt;rxhash[h];</div><div class='ctx'> 	rp-&gt;rxhash[h] = page;</div><div class='ctx'> }</div><div class='hunk'>@@ -3336,7 +3336,7 @@ static int niu_rbr_add_page(struct niu *np, struct rx_ring_info *rp,</div><div class='ctx'> </div><div class='ctx'> 	addr = np-&gt;ops-&gt;map_page(np-&gt;device, page, 0,</div><div class='ctx'> 				 PAGE_SIZE, DMA_FROM_DEVICE);</div><div class='del'>-	if (!addr) {</div><div class='add'>+	if (np-&gt;ops-&gt;mapping_error(np-&gt;device, addr)) {</div><div class='ctx'> 		__free_page(page);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3400,11 +3400,11 @@ static int niu_rx_pkt_ignore(struct niu *np, struct rx_ring_info *rp)</div><div class='ctx'> </div><div class='ctx'> 		rcr_size = rp-&gt;rbr_sizes[(val &amp; RCR_ENTRY_PKTBUFSZ) &gt;&gt;</div><div class='ctx'> 					 RCR_ENTRY_PKTBUFSZ_SHIFT];</div><div class='del'>-		if ((page-&gt;index + PAGE_SIZE) - rcr_size == addr) {</div><div class='add'>+		if ((page-&gt;private + PAGE_SIZE) - rcr_size == addr) {</div><div class='ctx'> 			*link = niu_next_page(page);</div><div class='del'>-			np-&gt;ops-&gt;unmap_page(np-&gt;device, page-&gt;index,</div><div class='add'>+			np-&gt;ops-&gt;unmap_page(np-&gt;device, page-&gt;private,</div><div class='ctx'> 					    PAGE_SIZE, DMA_FROM_DEVICE);</div><div class='del'>-			page-&gt;index = 0;</div><div class='add'>+			page-&gt;private = 0;</div><div class='ctx'> 			niu_next_page(page) = NULL;</div><div class='ctx'> 			__free_page(page);</div><div class='ctx'> 			rp-&gt;rbr_refill_pending++;</div><div class='hunk'>@@ -3469,11 +3469,11 @@ static int niu_process_rx_pkt(struct napi_struct *napi, struct niu *np,</div><div class='ctx'> 			append_size = append_size - skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 		niu_rx_skb_append(skb, page, off, append_size, rcr_size);</div><div class='del'>-		if ((page-&gt;index + rp-&gt;rbr_block_size) - rcr_size == addr) {</div><div class='add'>+		if ((page-&gt;private + rp-&gt;rbr_block_size) - rcr_size == addr) {</div><div class='ctx'> 			*link = niu_next_page(page);</div><div class='del'>-			np-&gt;ops-&gt;unmap_page(np-&gt;device, page-&gt;index,</div><div class='add'>+			np-&gt;ops-&gt;unmap_page(np-&gt;device, page-&gt;private,</div><div class='ctx'> 					    PAGE_SIZE, DMA_FROM_DEVICE);</div><div class='del'>-			page-&gt;index = 0;</div><div class='add'>+			page-&gt;private = 0;</div><div class='ctx'> 			niu_next_page(page) = NULL;</div><div class='ctx'> 			rp-&gt;rbr_refill_pending++;</div><div class='ctx'> 		} else</div><div class='hunk'>@@ -3538,11 +3538,11 @@ static void niu_rbr_free(struct niu *np, struct rx_ring_info *rp)</div><div class='ctx'> 		page = rp-&gt;rxhash[i];</div><div class='ctx'> 		while (page) {</div><div class='ctx'> 			struct page *next = niu_next_page(page);</div><div class='del'>-			u64 base = page-&gt;index;</div><div class='add'>+			u64 base = page-&gt;private;</div><div class='ctx'> </div><div class='ctx'> 			np-&gt;ops-&gt;unmap_page(np-&gt;device, base, PAGE_SIZE,</div><div class='ctx'> 					    DMA_FROM_DEVICE);</div><div class='del'>-			page-&gt;index = 0;</div><div class='add'>+			page-&gt;private = 0;</div><div class='ctx'> 			niu_next_page(page) = NULL;</div><div class='ctx'> </div><div class='ctx'> 			__free_page(page);</div><div class='hunk'>@@ -5825,7 +5825,7 @@ static int niu_init_mac(struct niu *np)</div><div class='ctx'> 	/* This looks hookey but the RX MAC reset we just did will</div><div class='ctx'> 	 * undo some of the state we setup in niu_init_tx_mac() so we</div><div class='ctx'> 	 * have to call it again.  In particular, the RX MAC reset will</div><div class='del'>-	 * set the XMAC_MAX register back to it's default value.</div><div class='add'>+	 * set the XMAC_MAX register back to its default value.</div><div class='ctx'> 	 */</div><div class='ctx'> 	niu_init_tx_mac(np);</div><div class='ctx'> 	niu_enable_tx_mac(np, 1);</div><div class='hunk'>@@ -6086,7 +6086,7 @@ static void niu_enable_napi(struct niu *np)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; np-&gt;num_ldg; i++)</div><div class='del'>-		napi_enable(&amp;np-&gt;ldg[i].napi);</div><div class='add'>+		napi_enable_locked(&amp;np-&gt;ldg[i].napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void niu_disable_napi(struct niu *np)</div><div class='hunk'>@@ -6116,7 +6116,9 @@ static int niu_open(struct net_device *dev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_free_channels;</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	niu_enable_napi(np);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -6163,7 +6165,7 @@ static void niu_full_shutdown(struct niu *np, struct net_device *dev)</div><div class='ctx'> 	niu_disable_napi(np);</div><div class='ctx'> 	netif_tx_stop_all_queues(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;np-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -6460,7 +6462,7 @@ static void niu_reset_buffers(struct niu *np)</div><div class='ctx'> 				page = rp-&gt;rxhash[j];</div><div class='ctx'> 				while (page) {</div><div class='ctx'> 					struct page *next = niu_next_page(page);</div><div class='del'>-					u64 base = page-&gt;index;</div><div class='add'>+					u64 base = page-&gt;private;</div><div class='ctx'> 					base = base &gt;&gt; RBR_DESCR_ADDR_SHIFT;</div><div class='ctx'> 					rp-&gt;rbr[k++] = cpu_to_le32(base);</div><div class='ctx'> 					page = next;</div><div class='hunk'>@@ -6509,7 +6511,7 @@ static void niu_reset_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;np-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;np-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	niu_netif_stop(np);</div><div class='ctx'> </div><div class='hunk'>@@ -6521,6 +6523,7 @@ static void niu_reset_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	niu_reset_buffers(np);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(np-&gt;dev);</div><div class='ctx'> 	spin_lock_irqsave(&amp;np-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	err = niu_init_hw(np);</div><div class='hunk'>@@ -6531,6 +6534,7 @@ static void niu_reset_task(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;np-&gt;lock, flags);</div><div class='add'>+	netdev_unlock(np-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void niu_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='hunk'>@@ -6672,6 +6676,8 @@ static netdev_tx_t niu_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	len = skb_headlen(skb);</div><div class='ctx'> 	mapping = np-&gt;ops-&gt;map_single(np-&gt;device, skb-&gt;data,</div><div class='ctx'> 				      len, DMA_TO_DEVICE);</div><div class='add'>+	if (np-&gt;ops-&gt;mapping_error(np-&gt;device, mapping))</div><div class='add'>+		goto out_drop;</div><div class='ctx'> </div><div class='ctx'> 	prod = rp-&gt;prod;</div><div class='ctx'> </div><div class='hunk'>@@ -6713,6 +6719,8 @@ static netdev_tx_t niu_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		mapping = np-&gt;ops-&gt;map_page(np-&gt;device, skb_frag_page(frag),</div><div class='ctx'> 					    skb_frag_off(frag), len,</div><div class='ctx'> 					    DMA_TO_DEVICE);</div><div class='add'>+		if (np-&gt;ops-&gt;mapping_error(np-&gt;device, mapping))</div><div class='add'>+			goto out_unmap;</div><div class='ctx'> </div><div class='ctx'> 		rp-&gt;tx_buffs[prod].skb = NULL;</div><div class='ctx'> 		rp-&gt;tx_buffs[prod].mapping = mapping;</div><div class='hunk'>@@ -6737,6 +6745,19 @@ static netdev_tx_t niu_start_xmit(struct sk_buff *skb,</div><div class='ctx'> out:</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='add'>+out_unmap:</div><div class='add'>+	while (i--) {</div><div class='add'>+		const skb_frag_t *frag;</div><div class='add'>+</div><div class='add'>+		prod = PREVIOUS_TX(rp, prod);</div><div class='add'>+		frag = &amp;skb_shinfo(skb)-&gt;frags[i];</div><div class='add'>+		np-&gt;ops-&gt;unmap_page(np-&gt;device, rp-&gt;tx_buffs[prod].mapping,</div><div class='add'>+				    skb_frag_size(frag), DMA_TO_DEVICE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	np-&gt;ops-&gt;unmap_single(np-&gt;device, rp-&gt;tx_buffs[rp-&gt;prod].mapping,</div><div class='add'>+			      skb_headlen(skb), DMA_TO_DEVICE);</div><div class='add'>+</div><div class='ctx'> out_drop:</div><div class='ctx'> 	rp-&gt;tx_errors++;</div><div class='ctx'> 	kfree_skb(skb);</div><div class='hunk'>@@ -6761,7 +6782,9 @@ static int niu_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> </div><div class='ctx'> 	niu_free_channels(np);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	niu_enable_napi(np);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	err = niu_alloc_channels(np);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -7071,8 +7094,10 @@ static int niu_ethflow_to_flowkey(u64 ethflow, u64 *flow_key)</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int niu_get_hash_opts(struct niu *np, struct ethtool_rxnfc *nfc)</div><div class='add'>+static int niu_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+			       struct ethtool_rxfh_fields *nfc)</div><div class='ctx'> {</div><div class='add'>+	struct niu *np = netdev_priv(dev);</div><div class='ctx'> 	u64 class;</div><div class='ctx'> </div><div class='ctx'> 	nfc-&gt;data = 0;</div><div class='hunk'>@@ -7284,9 +7309,6 @@ static int niu_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		ret = niu_get_hash_opts(np, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_GRXRINGS:</div><div class='ctx'> 		cmd-&gt;data = np-&gt;num_rx_rings;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -7307,8 +7329,11 @@ static int niu_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int niu_set_hash_opts(struct niu *np, struct ethtool_rxnfc *nfc)</div><div class='add'>+static int niu_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+			       const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct niu *np = netdev_priv(dev);</div><div class='ctx'> 	u64 class;</div><div class='ctx'> 	u64 flow_key = 0;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -7650,9 +7675,6 @@ static int niu_set_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		ret = niu_set_hash_opts(np, cmd);</div><div class='del'>-		break;</div><div class='ctx'> 	case ETHTOOL_SRXCLSRLINS:</div><div class='ctx'> 		ret = niu_add_ethtool_tcam_entry(np, cmd);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -7906,6 +7928,8 @@ static const struct ethtool_ops niu_ethtool_ops = {</div><div class='ctx'> 	.set_phys_id		= niu_set_phys_id,</div><div class='ctx'> 	.get_rxnfc		= niu_get_nfc,</div><div class='ctx'> 	.set_rxnfc		= niu_set_nfc,</div><div class='add'>+	.get_rxfh_fields	= niu_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= niu_set_rxfh_fields,</div><div class='ctx'> 	.get_link_ksettings	= niu_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings	= niu_set_link_ksettings,</div><div class='ctx'> };</div><div class='hunk'>@@ -9058,6 +9082,8 @@ static void niu_try_msix(struct niu *np, u8 *ldg_num_map)</div><div class='ctx'> 		msi_vec[i].entry = i;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	pdev-&gt;dev_flags |= PCI_DEV_FLAGS_MSIX_TOUCH_ENTRY_DATA_FIRST;</div><div class='add'>+</div><div class='ctx'> 	num_irqs = pci_enable_msix_range(pdev, msi_vec, 1, num_irqs);</div><div class='ctx'> 	if (num_irqs &lt; 0) {</div><div class='ctx'> 		np-&gt;flags &amp;= ~NIU_FLAGS_MSIX;</div><div class='hunk'>@@ -9636,6 +9662,11 @@ static void niu_pci_unmap_single(struct device *dev, u64 dma_address,</div><div class='ctx'> 	dma_unmap_single(dev, dma_address, size, direction);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int niu_pci_mapping_error(struct device *dev, u64 addr)</div><div class='add'>+{</div><div class='add'>+	return dma_mapping_error(dev, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct niu_ops niu_pci_ops = {</div><div class='ctx'> 	.alloc_coherent	= niu_pci_alloc_coherent,</div><div class='ctx'> 	.free_coherent	= niu_pci_free_coherent,</div><div class='hunk'>@@ -9643,6 +9674,7 @@ static const struct niu_ops niu_pci_ops = {</div><div class='ctx'> 	.unmap_page	= niu_pci_unmap_page,</div><div class='ctx'> 	.map_single	= niu_pci_map_single,</div><div class='ctx'> 	.unmap_single	= niu_pci_unmap_single,</div><div class='add'>+	.mapping_error	= niu_pci_mapping_error,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void niu_driver_version(void)</div><div class='hunk'>@@ -9908,7 +9940,7 @@ static int __maybe_unused niu_suspend(struct device *dev_d)</div><div class='ctx'> 	flush_work(&amp;np-&gt;reset_task);</div><div class='ctx'> 	niu_netif_stop(np);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;np-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;np-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;np-&gt;lock, flags);</div><div class='ctx'> 	niu_enable_interrupts(np, 0);</div><div class='hunk'>@@ -9937,6 +9969,7 @@ static int __maybe_unused niu_resume(struct device *dev_d)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;np-&gt;lock, flags);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	err = niu_init_hw(np);</div><div class='ctx'> 	if (!err) {</div><div class='ctx'> 		np-&gt;timer.expires = jiffies + HZ;</div><div class='hunk'>@@ -9945,6 +9978,7 @@ static int __maybe_unused niu_resume(struct device *dev_d)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;np-&gt;lock, flags);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -10009,6 +10043,11 @@ static void niu_phys_unmap_single(struct device *dev, u64 dma_address,</div><div class='ctx'> 	/* Nothing to do.  */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int niu_phys_mapping_error(struct device *dev, u64 dma_address)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct niu_ops niu_phys_ops = {</div><div class='ctx'> 	.alloc_coherent	= niu_phys_alloc_coherent,</div><div class='ctx'> 	.free_coherent	= niu_phys_free_coherent,</div><div class='hunk'>@@ -10016,6 +10055,7 @@ static const struct niu_ops niu_phys_ops = {</div><div class='ctx'> 	.unmap_page	= niu_phys_unmap_page,</div><div class='ctx'> 	.map_single	= niu_phys_map_single,</div><div class='ctx'> 	.unmap_single	= niu_phys_unmap_single,</div><div class='add'>+	.mapping_error	= niu_phys_mapping_error,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int niu_of_probe(struct platform_device *op)</div><div class='head'>diff --git a/drivers/net/ethernet/sun/niu.h b/drivers/net/ethernet/sun/niu.h<br/>index 04c215f91fc0..d8368043fc3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/niu.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/niu.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/niu.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sun/niu.h</a></div><div class='hunk'>@@ -2879,6 +2879,9 @@ struct tx_ring_info {</div><div class='ctx'> #define NEXT_TX(tp, index) \</div><div class='ctx'> 	(((index) + 1) &lt; (tp)-&gt;pending ? ((index) + 1) : 0)</div><div class='ctx'> </div><div class='add'>+#define PREVIOUS_TX(tp, index) \</div><div class='add'>+	(((index) - 1) &gt;= 0 ? ((index) - 1) : (((tp)-&gt;pending) - 1))</div><div class='add'>+</div><div class='ctx'> static inline u32 niu_tx_avail(struct tx_ring_info *tp)</div><div class='ctx'> {</div><div class='ctx'> 	return (tp-&gt;pending -</div><div class='hunk'>@@ -3140,6 +3143,7 @@ struct niu_ops {</div><div class='ctx'> 			  enum dma_data_direction direction);</div><div class='ctx'> 	void (*unmap_single)(struct device *dev, u64 dma_address,</div><div class='ctx'> 			     size_t size, enum dma_data_direction direction);</div><div class='add'>+	int (*mapping_error)(struct device *dev, u64 dma_address);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct niu_link_config {</div><div class='hunk'>@@ -3246,8 +3250,8 @@ struct niu {</div><div class='ctx'> 	struct niu_parent		*parent;</div><div class='ctx'> </div><div class='ctx'> 	u32				flags;</div><div class='del'>-#define NIU_FLAGS_HOTPLUG_PHY_PRESENT	0x02000000 /* Removeable PHY detected*/</div><div class='del'>-#define NIU_FLAGS_HOTPLUG_PHY		0x01000000 /* Removeable PHY */</div><div class='add'>+#define NIU_FLAGS_HOTPLUG_PHY_PRESENT	0x02000000 /* Removable PHY detected*/</div><div class='add'>+#define NIU_FLAGS_HOTPLUG_PHY		0x01000000 /* Removable PHY */</div><div class='ctx'> #define NIU_FLAGS_VPD_VALID		0x00800000 /* VPD has valid version */</div><div class='ctx'> #define NIU_FLAGS_MSIX			0x00400000 /* MSI-X in use */</div><div class='ctx'> #define NIU_FLAGS_MCAST			0x00200000 /* multicast filter enabled */</div><div class='head'>diff --git a/drivers/net/ethernet/sun/sunbmac.c b/drivers/net/ethernet/sun/sunbmac.c<br/>index bbb3a6ca19ed..edb2fd3a6551 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sunbmac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sunbmac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sunbmac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sun/sunbmac.c</a></div><div class='hunk'>@@ -526,7 +526,7 @@ static int try_next_permutation(struct bigmac *bp, void __iomem *tregs)</div><div class='ctx'> </div><div class='ctx'> static void bigmac_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct bigmac *bp = from_timer(bp, t, bigmac_timer);</div><div class='add'>+	struct bigmac *bp = timer_container_of(bp, t, bigmac_timer);</div><div class='ctx'> 	void __iomem *tregs = bp-&gt;tregs;</div><div class='ctx'> 	int restart_timer = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -931,7 +931,7 @@ static int bigmac_close(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bigmac *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;bp-&gt;bigmac_timer);</div><div class='add'>+	timer_delete(&amp;bp-&gt;bigmac_timer);</div><div class='ctx'> 	bp-&gt;timer_state = asleep;</div><div class='ctx'> 	bp-&gt;timer_ticks = 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sun/sungem.c b/drivers/net/ethernet/sun/sungem.c<br/>index 3e5f9b17c777..8e69d917d827 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sungem.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sungem.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sungem.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sun/sungem.c</a></div><div class='hunk'>@@ -1481,7 +1481,7 @@ static int gem_mdio_link_not_up(struct gem *gp)</div><div class='ctx'> </div><div class='ctx'> static void gem_link_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct gem *gp = from_timer(gp, t, link_timer);</div><div class='add'>+	struct gem *gp = timer_container_of(gp, t, link_timer);</div><div class='ctx'> 	struct net_device *dev = gp-&gt;dev;</div><div class='ctx'> 	int restart_aneg = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2180,7 +2180,7 @@ static void gem_do_stop(struct net_device *dev, int wol)</div><div class='ctx'> 	gem_disable_ints(gp);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the link timer */</div><div class='del'>-	del_timer_sync(&amp;gp-&gt;link_timer);</div><div class='add'>+	timer_delete_sync(&amp;gp-&gt;link_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* We cannot cancel the reset task while holding the</div><div class='ctx'> 	 * rtnl lock, we'd get an A-&gt;B / B-&gt;A deadlock stituation</div><div class='hunk'>@@ -2230,7 +2230,7 @@ static void gem_reset_task(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the link timer */</div><div class='del'>-	del_timer_sync(&amp;gp-&gt;link_timer);</div><div class='add'>+	timer_delete_sync(&amp;gp-&gt;link_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop NAPI and tx */</div><div class='ctx'> 	gem_netif_stop(gp);</div><div class='hunk'>@@ -2610,7 +2610,7 @@ static int gem_set_link_ksettings(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	/* Apply settings and restart link process. */</div><div class='ctx'> 	if (netif_device_present(gp-&gt;dev)) {</div><div class='del'>-		del_timer_sync(&amp;gp-&gt;link_timer);</div><div class='add'>+		timer_delete_sync(&amp;gp-&gt;link_timer);</div><div class='ctx'> 		gem_begin_auto_negotiation(gp, cmd);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2626,7 +2626,7 @@ static int gem_nway_reset(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Restart link process  */</div><div class='ctx'> 	if (netif_device_present(gp-&gt;dev)) {</div><div class='del'>-		del_timer_sync(&amp;gp-&gt;link_timer);</div><div class='add'>+		timer_delete_sync(&amp;gp-&gt;link_timer);</div><div class='ctx'> 		gem_begin_auto_negotiation(gp, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sun/sunhme.c b/drivers/net/ethernet/sun/sunhme.c<br/>index 50ace461a1af..48f0a96c0e9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sunhme.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sunhme.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sunhme.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sun/sunhme.c</a></div><div class='hunk'>@@ -451,7 +451,7 @@ static void happy_meal_tcvr_write(struct happy_meal *hp,</div><div class='ctx'> /* Auto negotiation.  The scheme is very simple.  We have a timer routine</div><div class='ctx'>  * that keeps watching the auto negotiation process as it progresses.</div><div class='ctx'>  * The DP83840 is first told to start doing it's thing, we set up the time</div><div class='del'>- * and place the timer state machine in it's initial state.</div><div class='add'>+ * and place the timer state machine in its initial state.</div><div class='ctx'>  *</div><div class='ctx'>  * Here the timer peeks at the DP83840 status registers at each click to see</div><div class='ctx'>  * if the auto negotiation has completed, we assume here that the DP83840 PHY</div><div class='hunk'>@@ -721,7 +721,7 @@ force_link:</div><div class='ctx'> </div><div class='ctx'> static void happy_meal_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct happy_meal *hp = from_timer(hp, t, happy_timer);</div><div class='add'>+	struct happy_meal *hp = timer_container_of(hp, t, happy_timer);</div><div class='ctx'> 	void __iomem *tregs = hp-&gt;tcvregs;</div><div class='ctx'> 	int restart_timer = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1265,7 +1265,7 @@ static int happy_meal_init(struct happy_meal *hp)</div><div class='ctx'> 	u32 regtmp, rxcfg;</div><div class='ctx'> </div><div class='ctx'> 	/* If auto-negotiation timer is running, kill it. */</div><div class='del'>-	del_timer(&amp;hp-&gt;happy_timer);</div><div class='add'>+	timer_delete(&amp;hp-&gt;happy_timer);</div><div class='ctx'> </div><div class='ctx'> 	HMD("happy_flags[%08x]\n", hp-&gt;happy_flags);</div><div class='ctx'> 	if (!(hp-&gt;happy_flags &amp; HFLAG_INIT)) {</div><div class='hunk'>@@ -1922,7 +1922,7 @@ static int happy_meal_close(struct net_device *dev)</div><div class='ctx'> 	happy_meal_clean_rings(hp);</div><div class='ctx'> </div><div class='ctx'> 	/* If auto-negotiation timer is running, kill it. */</div><div class='del'>-	del_timer(&amp;hp-&gt;happy_timer);</div><div class='add'>+	timer_delete(&amp;hp-&gt;happy_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;hp-&gt;happy_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -2184,7 +2184,7 @@ static int hme_set_link_ksettings(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	/* Ok, do it to it. */</div><div class='ctx'> 	spin_lock_irq(&amp;hp-&gt;happy_lock);</div><div class='del'>-	del_timer(&amp;hp-&gt;happy_timer);</div><div class='add'>+	timer_delete(&amp;hp-&gt;happy_timer);</div><div class='ctx'> 	happy_meal_begin_auto_negotiation(hp, hp-&gt;tcvregs, cmd);</div><div class='ctx'> 	spin_unlock_irq(&amp;hp-&gt;happy_lock);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sun/sunqe.h b/drivers/net/ethernet/sun/sunqe.h<br/>index 0daed05b7c83..300631e8ac0d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sunqe.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sunqe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sunqe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sun/sunqe.h</a></div><div class='hunk'>@@ -36,7 +36,7 @@</div><div class='ctx'> #define GLOB_PSIZE_6144       0x10       /* 6k packet size           */</div><div class='ctx'> #define GLOB_PSIZE_8192       0x11       /* 8k packet size           */</div><div class='ctx'> </div><div class='del'>-/* In MACE mode, there are four qe channels.  Each channel has it's own</div><div class='add'>+/* In MACE mode, there are four qe channels.  Each channel has its own</div><div class='ctx'>  * status bits in the QEC status register.  This macro picks out the</div><div class='ctx'>  * ones you want.</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/net/ethernet/sun/sunvnet.c b/drivers/net/ethernet/sun/sunvnet.c<br/>index 1e887d951a04..a2a3e94da4b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sunvnet.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sunvnet.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sunvnet.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sun/sunvnet.c</a></div><div class='hunk'>@@ -505,7 +505,7 @@ static void vnet_port_remove(struct vio_dev *vdev)</div><div class='ctx'> 	struct vnet_port *port = dev_get_drvdata(&amp;vdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	if (port) {</div><div class='del'>-		del_timer_sync(&amp;port-&gt;vio.timer);</div><div class='add'>+		timer_delete_sync(&amp;port-&gt;vio.timer);</div><div class='ctx'> </div><div class='ctx'> 		napi_disable(&amp;port-&gt;napi);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/sun/sunvnet_common.c b/drivers/net/ethernet/sun/sunvnet_common.c<br/>index 1cacb2a0ee03..0212853c9430 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sunvnet_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sun/sunvnet_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sun/sunvnet_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sun/sunvnet_common.c</a></div><div class='hunk'>@@ -1044,7 +1044,7 @@ static inline void vnet_free_skbs(struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> void sunvnet_clean_timer_expire_common(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct vnet_port *port = from_timer(port, t, clean_timer);</div><div class='add'>+	struct vnet_port *port = timer_container_of(port, t, clean_timer);</div><div class='ctx'> 	struct sk_buff *freeskbs;</div><div class='ctx'> 	unsigned pending;</div><div class='ctx'> </div><div class='hunk'>@@ -1058,7 +1058,7 @@ void sunvnet_clean_timer_expire_common(struct timer_list *t)</div><div class='ctx'> 		(void)mod_timer(&amp;port-&gt;clean_timer,</div><div class='ctx'> 				jiffies + VNET_CLEAN_TIMEOUT);</div><div class='ctx'> 	 else</div><div class='del'>-		del_timer(&amp;port-&gt;clean_timer);</div><div class='add'>+		timer_delete(&amp;port-&gt;clean_timer);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(sunvnet_clean_timer_expire_common);</div><div class='ctx'> </div><div class='hunk'>@@ -1513,7 +1513,7 @@ out_dropped:</div><div class='ctx'> 		(void)mod_timer(&amp;port-&gt;clean_timer,</div><div class='ctx'> 				jiffies + VNET_CLEAN_TIMEOUT);</div><div class='ctx'> 	else if (port)</div><div class='del'>-		del_timer(&amp;port-&gt;clean_timer);</div><div class='add'>+		timer_delete(&amp;port-&gt;clean_timer);</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='ctx'> 	vnet_free_skbs(freeskbs);</div><div class='hunk'>@@ -1707,7 +1707,7 @@ EXPORT_SYMBOL_GPL(sunvnet_port_free_tx_bufs_common);</div><div class='ctx'> </div><div class='ctx'> void vnet_port_reset(struct vnet_port *port)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;port-&gt;clean_timer);</div><div class='add'>+	timer_delete(&amp;port-&gt;clean_timer);</div><div class='ctx'> 	sunvnet_port_free_tx_bufs_common(port);</div><div class='ctx'> 	port-&gt;rmtu = 0;</div><div class='ctx'> 	port-&gt;tso = (port-&gt;vsw == 0);  /* no tso in vsw, misbehaves in bridge */</div><div class='head'>diff --git a/drivers/net/ethernet/sunplus/spl2sw_driver.c b/drivers/net/ethernet/sunplus/spl2sw_driver.c<br/>index 721d8ed3f302..5e0e4c9ecbb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sunplus/spl2sw_driver.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/sunplus/spl2sw_driver.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/sunplus/spl2sw_driver.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/sunplus/spl2sw_driver.c</a></div><div class='hunk'>@@ -199,7 +199,7 @@ static const struct net_device_ops netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit = spl2sw_ethernet_start_xmit,</div><div class='ctx'> 	.ndo_set_rx_mode = spl2sw_ethernet_set_rx_mode,</div><div class='ctx'> 	.ndo_set_mac_address = spl2sw_ethernet_set_mac_address,</div><div class='del'>-	.ndo_do_ioctl = phy_do_ioctl,</div><div class='add'>+	.ndo_eth_ioctl = phy_do_ioctl,</div><div class='ctx'> 	.ndo_tx_timeout = spl2sw_ethernet_tx_timeout,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/synopsys/dwc-xlgmac-net.c b/drivers/net/ethernet/synopsys/dwc-xlgmac-net.c<br/>index d1793b6154c7..37101dc50d04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/synopsys/dwc-xlgmac-net.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/synopsys/dwc-xlgmac-net.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/synopsys/dwc-xlgmac-net.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/synopsys/dwc-xlgmac-net.c</a></div><div class='hunk'>@@ -360,7 +360,8 @@ static irqreturn_t xlgmac_dma_isr(int irq, void *data)</div><div class='ctx'> </div><div class='ctx'> static void xlgmac_tx_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct xlgmac_channel *channel = from_timer(channel, t, tx_timer);</div><div class='add'>+	struct xlgmac_channel *channel = timer_container_of(channel, t,</div><div class='add'>+							    tx_timer);</div><div class='ctx'> 	struct xlgmac_pdata *pdata = channel-&gt;pdata;</div><div class='ctx'> 	struct napi_struct *napi;</div><div class='ctx'> </div><div class='hunk'>@@ -405,7 +406,7 @@ static void xlgmac_stop_timers(struct xlgmac_pdata *pdata)</div><div class='ctx'> 		if (!channel-&gt;tx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		del_timer_sync(&amp;channel-&gt;tx_timer);</div><div class='add'>+		timer_delete_sync(&amp;channel-&gt;tx_timer);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/tehuti/tehuti.c b/drivers/net/ethernet/tehuti/tehuti.c<br/>index fc77f424f90b..2cee1f05ac47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/tehuti/tehuti.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/tehuti/tehuti.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/tehuti/tehuti.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/tehuti/tehuti.c</a></div><div class='hunk'>@@ -276,7 +276,7 @@ static irqreturn_t bdx_isr_napi(int irq, void *dev)</div><div class='ctx'> 			 * currently intrs are disabled (since we read ISR),</div><div class='ctx'> 			 * and we have failed to register next poll.</div><div class='ctx'> 			 * so we read the regs to trigger chip</div><div class='del'>-			 * and allow further interupts. */</div><div class='add'>+			 * and allow further interrupts. */</div><div class='ctx'> 			READ_REG(priv, regTXF_WPTR_0);</div><div class='ctx'> 			READ_REG(priv, regRXD_WPTR_0);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/net/ethernet/tehuti/tn40.c b/drivers/net/ethernet/tehuti/tn40.c<br/>index 259bdac24cf2..558b791a97ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/tehuti/tn40.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/tehuti/tn40.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/tehuti/tn40.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/tehuti/tn40.c</a></div><div class='hunk'>@@ -1778,7 +1778,7 @@ static int tn40_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	ret = tn40_phy_register(priv);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to set up PHY.\n");</div><div class='del'>-		goto err_free_irq;</div><div class='add'>+		goto err_cleanup_swnodes;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = tn40_priv_init(priv);</div><div class='hunk'>@@ -1795,6 +1795,8 @@ static int tn40_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	return 0;</div><div class='ctx'> err_unregister_phydev:</div><div class='ctx'> 	tn40_phy_unregister(priv);</div><div class='add'>+err_cleanup_swnodes:</div><div class='add'>+	tn40_swnodes_cleanup(priv);</div><div class='ctx'> err_free_irq:</div><div class='ctx'> 	pci_free_irq_vectors(pdev);</div><div class='ctx'> err_unset_drvdata:</div><div class='hunk'>@@ -1816,6 +1818,7 @@ static void tn40_remove(struct pci_dev *pdev)</div><div class='ctx'> 	unregister_netdev(ndev);</div><div class='ctx'> </div><div class='ctx'> 	tn40_phy_unregister(priv);</div><div class='add'>+	tn40_swnodes_cleanup(priv);</div><div class='ctx'> 	pci_free_irq_vectors(priv-&gt;pdev);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	iounmap(priv-&gt;regs);</div><div class='hunk'>@@ -1832,6 +1835,10 @@ static const struct pci_device_id tn40_id_table[] = {</div><div class='ctx'> 			 PCI_VENDOR_ID_ASUSTEK, 0x8709) },</div><div class='ctx'> 	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_TEHUTI, 0x4022,</div><div class='ctx'> 			 PCI_VENDOR_ID_EDIMAX, 0x8103) },</div><div class='add'>+	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_TEHUTI, PCI_DEVICE_ID_TEHUTI_TN9510,</div><div class='add'>+			 PCI_VENDOR_ID_TEHUTI, 0x3015) },</div><div class='add'>+	{ PCI_DEVICE_SUB(PCI_VENDOR_ID_TEHUTI, PCI_DEVICE_ID_TEHUTI_TN9510,</div><div class='add'>+			 PCI_VENDOR_ID_EDIMAX, 0x8102) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/tehuti/tn40.h b/drivers/net/ethernet/tehuti/tn40.h<br/>index 490781fe5120..25da8686d469 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/tehuti/tn40.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/tehuti/tn40.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/tehuti/tn40.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/tehuti/tn40.h</a></div><div class='hunk'>@@ -4,10 +4,13 @@</div><div class='ctx'> #ifndef _TN40_H_</div><div class='ctx'> #define _TN40_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='ctx'> #include "tn40_regs.h"</div><div class='ctx'> </div><div class='ctx'> #define TN40_DRV_NAME "tn40xx"</div><div class='ctx'> </div><div class='add'>+#define PCI_DEVICE_ID_TEHUTI_TN9510	0x4025</div><div class='add'>+</div><div class='ctx'> #define TN40_MDIO_SPEED_1MHZ (1)</div><div class='ctx'> #define TN40_MDIO_SPEED_6MHZ (6)</div><div class='ctx'> </div><div class='hunk'>@@ -102,10 +105,39 @@ struct tn40_txdb {</div><div class='ctx'> 	int size; /* Number of elements in the db */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define NODE_PROP(_NAME, _PROP)	(		\</div><div class='add'>+	(const struct software_node) {		\</div><div class='add'>+		.name = _NAME,			\</div><div class='add'>+		.properties = _PROP,		\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+#define NODE_PAR_PROP(_NAME, _PAR, _PROP)	(	\</div><div class='add'>+	(const struct software_node) {		\</div><div class='add'>+		.name = _NAME,			\</div><div class='add'>+		.parent = _PAR,			\</div><div class='add'>+		.properties = _PROP,		\</div><div class='add'>+	})</div><div class='add'>+</div><div class='add'>+enum tn40_swnodes {</div><div class='add'>+	SWNODE_MDIO,</div><div class='add'>+	SWNODE_PHY,</div><div class='add'>+	SWNODE_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tn40_nodes {</div><div class='add'>+	char phy_name[32];</div><div class='add'>+	char mdio_name[32];</div><div class='add'>+	struct property_entry phy_props[3];</div><div class='add'>+	struct software_node swnodes[SWNODE_MAX];</div><div class='add'>+	const struct software_node *group[SWNODE_MAX + 1];</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct tn40_priv {</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> </div><div class='add'>+	struct tn40_nodes nodes;</div><div class='add'>+</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	/* RX FIFOs: 1 for data (full) descs, and 2 for free descs */</div><div class='ctx'> 	struct tn40_rxd_fifo rxd_fifo0;</div><div class='hunk'>@@ -225,6 +257,7 @@ static inline void tn40_write_reg(struct tn40_priv *priv, u32 reg, u32 val)</div><div class='ctx'> </div><div class='ctx'> int tn40_set_link_speed(struct tn40_priv *priv, u32 speed);</div><div class='ctx'> </div><div class='add'>+void tn40_swnodes_cleanup(struct tn40_priv *priv);</div><div class='ctx'> int tn40_mdiobus_init(struct tn40_priv *priv);</div><div class='ctx'> </div><div class='ctx'> int tn40_phy_register(struct tn40_priv *priv);</div><div class='head'>diff --git a/drivers/net/ethernet/tehuti/tn40_mdio.c b/drivers/net/ethernet/tehuti/tn40_mdio.c<br/>index af18615d64a8..fb1a4a2e4dbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/tehuti/tn40_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/tehuti/tn40_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/tehuti/tn40_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/tehuti/tn40_mdio.c</a></div><div class='hunk'>@@ -14,6 +14,8 @@</div><div class='ctx'> 	 (FIELD_PREP(TN40_MDIO_PRTAD_MASK, (port))))</div><div class='ctx'> #define TN40_MDIO_CMD_READ BIT(15)</div><div class='ctx'> </div><div class='add'>+#define AQR105_FIRMWARE "tehuti/aqr105-tn40xx.cld"</div><div class='add'>+</div><div class='ctx'> static void tn40_mdio_set_speed(struct tn40_priv *priv, u32 speed)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *regs = priv-&gt;regs;</div><div class='hunk'>@@ -111,6 +113,56 @@ static int tn40_mdio_write_c45(struct mii_bus *mii_bus, int addr, int devnum,</div><div class='ctx'> 	return  tn40_mdio_write(mii_bus-&gt;priv, addr, devnum, regnum, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* registers an mdio node and an aqr105 PHY at address 1</div><div class='add'>+ * tn40_mdio-%id {</div><div class='add'>+ *	ethernet-phy@1 {</div><div class='add'>+ *		compatible = "ethernet-phy-id03a1.b4a3";</div><div class='add'>+ *		reg = &lt;1&gt;;</div><div class='add'>+ *		firmware-name = AQR105_FIRMWARE;</div><div class='add'>+ *	};</div><div class='add'>+ * };</div><div class='add'>+ */</div><div class='add'>+static int tn40_swnodes_register(struct tn40_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct tn40_nodes *nodes = &amp;priv-&gt;nodes;</div><div class='add'>+	struct pci_dev *pdev = priv-&gt;pdev;</div><div class='add'>+	struct software_node *swnodes;</div><div class='add'>+	u32 id;</div><div class='add'>+</div><div class='add'>+	id = pci_dev_id(pdev);</div><div class='add'>+</div><div class='add'>+	snprintf(nodes-&gt;phy_name, sizeof(nodes-&gt;phy_name), "ethernet-phy@1");</div><div class='add'>+	snprintf(nodes-&gt;mdio_name, sizeof(nodes-&gt;mdio_name), "tn40_mdio-%x",</div><div class='add'>+		 id);</div><div class='add'>+</div><div class='add'>+	swnodes = nodes-&gt;swnodes;</div><div class='add'>+</div><div class='add'>+	swnodes[SWNODE_MDIO] = NODE_PROP(nodes-&gt;mdio_name, NULL);</div><div class='add'>+</div><div class='add'>+	nodes-&gt;phy_props[0] = PROPERTY_ENTRY_STRING("compatible",</div><div class='add'>+						    "ethernet-phy-id03a1.b4a3");</div><div class='add'>+	nodes-&gt;phy_props[1] = PROPERTY_ENTRY_U32("reg", 1);</div><div class='add'>+	nodes-&gt;phy_props[2] = PROPERTY_ENTRY_STRING("firmware-name",</div><div class='add'>+						    AQR105_FIRMWARE);</div><div class='add'>+	swnodes[SWNODE_PHY] = NODE_PAR_PROP(nodes-&gt;phy_name,</div><div class='add'>+					    &amp;swnodes[SWNODE_MDIO],</div><div class='add'>+					    nodes-&gt;phy_props);</div><div class='add'>+</div><div class='add'>+	nodes-&gt;group[SWNODE_PHY] = &amp;swnodes[SWNODE_PHY];</div><div class='add'>+	nodes-&gt;group[SWNODE_MDIO] = &amp;swnodes[SWNODE_MDIO];</div><div class='add'>+	return software_node_register_node_group(nodes-&gt;group);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void tn40_swnodes_cleanup(struct tn40_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* cleanup of swnodes is only needed for AQR105-based cards */</div><div class='add'>+	if (priv-&gt;pdev-&gt;device == PCI_DEVICE_ID_TEHUTI_TN9510) {</div><div class='add'>+		fwnode_handle_put(dev_fwnode(&amp;priv-&gt;mdio-&gt;dev));</div><div class='add'>+		device_remove_software_node(&amp;priv-&gt;mdio-&gt;dev);</div><div class='add'>+		software_node_unregister_node_group(priv-&gt;nodes.group);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int tn40_mdiobus_init(struct tn40_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = priv-&gt;pdev;</div><div class='hunk'>@@ -129,14 +181,40 @@ int tn40_mdiobus_init(struct tn40_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	bus-&gt;read_c45 = tn40_mdio_read_c45;</div><div class='ctx'> 	bus-&gt;write_c45 = tn40_mdio_write_c45;</div><div class='add'>+	priv-&gt;mdio = bus;</div><div class='ctx'> </div><div class='add'>+	/* provide swnodes for AQR105-based cards only */</div><div class='add'>+	if (pdev-&gt;device == PCI_DEVICE_ID_TEHUTI_TN9510) {</div><div class='add'>+		ret = tn40_swnodes_register(priv);</div><div class='add'>+		if (ret) {</div><div class='add'>+			pr_err("swnodes failed\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = device_add_software_node(&amp;bus-&gt;dev,</div><div class='add'>+					       priv-&gt;nodes.group[SWNODE_MDIO]);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+				"device_add_software_node failed: %d\n", ret);</div><div class='add'>+			goto err_swnodes_unregister;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tn40_mdio_set_speed(priv, TN40_MDIO_SPEED_6MHZ);</div><div class='ctx'> 	ret = devm_mdiobus_register(&amp;pdev-&gt;dev, bus);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to register mdiobus %d %u %u\n",</div><div class='ctx'> 			ret, bus-&gt;state, MDIOBUS_UNREGISTERED);</div><div class='del'>-		return ret;</div><div class='add'>+		goto err_swnodes_cleanup;</div><div class='ctx'> 	}</div><div class='del'>-	tn40_mdio_set_speed(priv, TN40_MDIO_SPEED_6MHZ);</div><div class='del'>-	priv-&gt;mdio = bus;</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_swnodes_unregister:</div><div class='add'>+	software_node_unregister_node_group(priv-&gt;nodes.group);</div><div class='add'>+	return ret;</div><div class='add'>+err_swnodes_cleanup:</div><div class='add'>+	tn40_swnodes_cleanup(priv);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+MODULE_FIRMWARE(AQR105_FIRMWARE);</div><div class='head'>diff --git a/drivers/net/ethernet/ti/Kconfig b/drivers/net/ethernet/ti/Kconfig<br/>index 0d5a862cd78a..a54d71155263 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/Kconfig</a></div><div class='hunk'>@@ -99,6 +99,7 @@ config TI_K3_AM65_CPSW_NUSS</div><div class='ctx'> 	select NET_DEVLINK</div><div class='ctx'> 	select TI_DAVINCI_MDIO</div><div class='ctx'> 	select PHYLINK</div><div class='add'>+	select PAGE_POOL</div><div class='ctx'> 	select TI_K3_CPPI_DESC_POOL</div><div class='ctx'> 	imply PHY_TI_GMII_SEL</div><div class='ctx'> 	depends on TI_K3_AM65_CPTS || !TI_K3_AM65_CPTS</div><div class='hunk'>@@ -204,6 +205,7 @@ config TI_ICSSG_PRUETH_SR1</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	select TI_ICSS_IEP</div><div class='ctx'> 	select TI_K3_CPPI_DESC_POOL</div><div class='add'>+	select PAGE_POOL</div><div class='ctx'> 	depends on PRU_REMOTEPROC</div><div class='ctx'> 	depends on NET_SWITCHDEV</div><div class='ctx'> 	depends on ARCH_K3 &amp;&amp; OF &amp;&amp; TI_K3_UDMA_GLUE_LAYER</div><div class='hunk'>@@ -227,4 +229,16 @@ config TI_ICSS_IEP</div><div class='ctx'> 	  To compile this driver as a module, choose M here. The module</div><div class='ctx'> 	  will be called icss_iep.</div><div class='ctx'> </div><div class='add'>+config TI_PRUETH</div><div class='add'>+	tristate "TI PRU Ethernet EMAC driver"</div><div class='add'>+	depends on PRU_REMOTEPROC</div><div class='add'>+	depends on NET_SWITCHDEV</div><div class='add'>+	select TI_ICSS_IEP</div><div class='add'>+	imply PTP_1588_CLOCK</div><div class='add'>+	help</div><div class='add'>+	  Some TI SoCs has Programmable Realtime Unit (PRU) cores which can</div><div class='add'>+	  support Single or Dual Ethernet ports with the help of firmware code</div><div class='add'>+	  running on PRU cores. This driver supports remoteproc based</div><div class='add'>+	  communication to PRU firmware to expose Ethernet interface to Linux.</div><div class='add'>+</div><div class='ctx'> endif # NET_VENDOR_TI</div><div class='head'>diff --git a/drivers/net/ethernet/ti/Makefile b/drivers/net/ethernet/ti/Makefile<br/>index cbcf44806924..93c0a4d0e33a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/Makefile</a></div><div class='hunk'>@@ -3,6 +3,9 @@</div><div class='ctx'> # Makefile for the TI network device drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_TI_PRUETH) += icssm-prueth.o</div><div class='add'>+icssm-prueth-y := icssm/icssm_prueth.o</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_TI_CPSW) += cpsw-common.o</div><div class='ctx'> obj-$(CONFIG_TI_DAVINCI_EMAC) += cpsw-common.o</div><div class='ctx'> obj-$(CONFIG_TI_CPSW_SWITCHDEV) += cpsw-common.o</div><div class='head'>diff --git a/drivers/net/ethernet/ti/am65-cpsw-ethtool.c b/drivers/net/ethernet/ti/am65-cpsw-ethtool.c<br/>index 9032444435e9..c57497074ae6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/am65-cpsw-ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/am65-cpsw-ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/am65-cpsw-ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/am65-cpsw-ethtool.c</a></div><div class='hunk'>@@ -694,17 +694,20 @@ static int am65_cpsw_get_ethtool_ts_info(struct net_device *ndev,</div><div class='ctx'> 					 struct kernel_ethtool_ts_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_common *common = am65_ndev_to_common(ndev);</div><div class='del'>-	unsigned int ptp_v2_filter;</div><div class='del'>-</div><div class='del'>-	ptp_v2_filter = BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT)	 |</div><div class='del'>-			BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC)	 |</div><div class='del'>-			BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |</div><div class='del'>-			BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT)	 |</div><div class='del'>-			BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC)	 |</div><div class='del'>-			BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |</div><div class='del'>-			BIT(HWTSTAMP_FILTER_PTP_V2_EVENT)	 |</div><div class='del'>-			BIT(HWTSTAMP_FILTER_PTP_V2_SYNC)	 |</div><div class='del'>-			BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ);</div><div class='add'>+	unsigned int ptp_filter;</div><div class='add'>+</div><div class='add'>+	ptp_filter = BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT)	|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC)	|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ)	|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT)	|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC)	|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ)	|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V2_EVENT)		|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V2_SYNC)		|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ)	|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT)	|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC)	|</div><div class='add'>+		     BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ);</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))</div><div class='ctx'> 		return ethtool_op_get_ts_info(ndev, info);</div><div class='hunk'>@@ -716,7 +719,7 @@ static int am65_cpsw_get_ethtool_ts_info(struct net_device *ndev,</div><div class='ctx'> 		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='ctx'> 	info-&gt;phc_index = am65_cpts_phc_index(common-&gt;cpts);</div><div class='ctx'> 	info-&gt;tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);</div><div class='del'>-	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_NONE) | ptp_v2_filter;</div><div class='add'>+	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_NONE) | ptp_filter;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c<br/>index 6201a09fa5f0..5924db6be3fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/am65-cpsw-nuss.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/am65-cpsw-nuss.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/am65-cpsw-nuss.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/am65-cpsw-nuss.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #include &lt;linux/dma/ti-cppi5.h&gt;</div><div class='ctx'> #include &lt;linux/dma/k3-udma-glue.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='ctx'> #include &lt;net/switchdev.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "cpsw_ale.h"</div><div class='hunk'>@@ -71,6 +72,8 @@</div><div class='ctx'> #define AM65_CPSW_PORT_REG_RX_PRI_MAP		0x020</div><div class='ctx'> #define AM65_CPSW_PORT_REG_RX_MAXLEN		0x024</div><div class='ctx'> </div><div class='add'>+#define AM65_CPSW_PORTN_REG_CTL			0x004</div><div class='add'>+#define AM65_CPSW_PORTN_REG_DSCP_MAP		0x120</div><div class='ctx'> #define AM65_CPSW_PORTN_REG_SA_L		0x308</div><div class='ctx'> #define AM65_CPSW_PORTN_REG_SA_H		0x30c</div><div class='ctx'> #define AM65_CPSW_PORTN_REG_TS_CTL              0x310</div><div class='hunk'>@@ -94,6 +97,10 @@</div><div class='ctx'> /* AM65_CPSW_PORT_REG_PRI_CTL */</div><div class='ctx'> #define AM65_CPSW_PORT_REG_PRI_CTL_RX_PTYPE_RROBIN	BIT(8)</div><div class='ctx'> </div><div class='add'>+/* AM65_CPSW_PN_REG_CTL */</div><div class='add'>+#define AM65_CPSW_PN_REG_CTL_DSCP_IPV4_EN	BIT(1)</div><div class='add'>+#define AM65_CPSW_PN_REG_CTL_DSCP_IPV6_EN	BIT(2)</div><div class='add'>+</div><div class='ctx'> /* AM65_CPSW_PN_TS_CTL register fields */</div><div class='ctx'> #define AM65_CPSW_PN_TS_CTL_TX_ANX_F_EN		BIT(4)</div><div class='ctx'> #define AM65_CPSW_PN_TS_CTL_TX_VLAN_LT1_EN	BIT(5)</div><div class='hunk'>@@ -157,6 +164,7 @@</div><div class='ctx'> #define AM65_CPSW_CPPI_TX_PKT_TYPE 0x7</div><div class='ctx'> </div><div class='ctx'> /* XDP */</div><div class='add'>+#define AM65_CPSW_XDP_TX       BIT(2)</div><div class='ctx'> #define AM65_CPSW_XDP_CONSUMED BIT(1)</div><div class='ctx'> #define AM65_CPSW_XDP_REDIRECT BIT(0)</div><div class='ctx'> #define AM65_CPSW_XDP_PASS     0</div><div class='hunk'>@@ -176,6 +184,99 @@ static void am65_cpsw_port_set_sl_mac(struct am65_cpsw_port *slave,</div><div class='ctx'> 	writel(mac_lo, slave-&gt;port_base + AM65_CPSW_PORTN_REG_SA_L);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define AM65_CPSW_DSCP_MAX	GENMASK(5, 0)</div><div class='add'>+#define AM65_CPSW_PRI_MAX	GENMASK(2, 0)</div><div class='add'>+#define AM65_CPSW_DSCP_PRI_PER_REG	8</div><div class='add'>+#define AM65_CPSW_DSCP_PRI_SIZE		4	/* in bits */</div><div class='add'>+static int am65_cpsw_port_set_dscp_map(struct am65_cpsw_port *slave, u8 dscp, u8 pri)</div><div class='add'>+{</div><div class='add'>+	int reg_ofs;</div><div class='add'>+	int bit_ofs;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (dscp &gt; AM65_CPSW_DSCP_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (pri &gt; AM65_CPSW_PRI_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* 32-bit register offset to this dscp */</div><div class='add'>+	reg_ofs = (dscp / AM65_CPSW_DSCP_PRI_PER_REG) * 4;</div><div class='add'>+	/* bit field offset to this dscp */</div><div class='add'>+	bit_ofs = AM65_CPSW_DSCP_PRI_SIZE * (dscp % AM65_CPSW_DSCP_PRI_PER_REG);</div><div class='add'>+</div><div class='add'>+	val = readl(slave-&gt;port_base + AM65_CPSW_PORTN_REG_DSCP_MAP + reg_ofs);</div><div class='add'>+	val &amp;= ~(AM65_CPSW_PRI_MAX &lt;&lt; bit_ofs);	/* clear */</div><div class='add'>+	val |= pri &lt;&lt; bit_ofs;			/* set */</div><div class='add'>+	writel(val, slave-&gt;port_base + AM65_CPSW_PORTN_REG_DSCP_MAP + reg_ofs);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void am65_cpsw_port_enable_dscp_map(struct am65_cpsw_port *slave)</div><div class='add'>+{</div><div class='add'>+	int dscp, pri;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Default DSCP to User Priority mapping as per:</div><div class='add'>+	 * https://datatracker.ietf.org/doc/html/rfc8325#section-4.3</div><div class='add'>+	 * and</div><div class='add'>+	 * https://datatracker.ietf.org/doc/html/rfc8622#section-11</div><div class='add'>+	 */</div><div class='add'>+	for (dscp = 0; dscp &lt;= AM65_CPSW_DSCP_MAX; dscp++) {</div><div class='add'>+		switch (dscp) {</div><div class='add'>+		case 56:	/* CS7 */</div><div class='add'>+		case 48:	/* CS6 */</div><div class='add'>+			pri = 7;</div><div class='add'>+			break;</div><div class='add'>+		case 46:	/* EF */</div><div class='add'>+		case 44:	/* VA */</div><div class='add'>+			pri = 6;</div><div class='add'>+			break;</div><div class='add'>+		case 40:	/* CS5 */</div><div class='add'>+			pri = 5;</div><div class='add'>+			break;</div><div class='add'>+		case 34:	/* AF41 */</div><div class='add'>+		case 36:	/* AF42 */</div><div class='add'>+		case 38:	/* AF43 */</div><div class='add'>+		case 32:	/* CS4 */</div><div class='add'>+		case 26:	/* AF31 */</div><div class='add'>+		case 28:	/* AF32 */</div><div class='add'>+		case 30:	/* AF33 */</div><div class='add'>+		case 24:	/* CS3 */</div><div class='add'>+			pri = 4;</div><div class='add'>+			break;</div><div class='add'>+		case 18:	/* AF21 */</div><div class='add'>+		case 20:	/* AF22 */</div><div class='add'>+		case 22:	/* AF23 */</div><div class='add'>+			pri = 3;</div><div class='add'>+			break;</div><div class='add'>+		case 16:	/* CS2 */</div><div class='add'>+		case 10:	/* AF11 */</div><div class='add'>+		case 12:	/* AF12 */</div><div class='add'>+		case 14:	/* AF13 */</div><div class='add'>+		case 0:		/* DF */</div><div class='add'>+			pri = 0;</div><div class='add'>+			break;</div><div class='add'>+		case 8:		/* CS1 */</div><div class='add'>+		case 1:		/* LE */</div><div class='add'>+			pri = 1;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			pri = 0;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		am65_cpsw_port_set_dscp_map(slave, dscp, pri);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enable port IPV4 and IPV6 DSCP for this port */</div><div class='add'>+	val = readl(slave-&gt;port_base + AM65_CPSW_PORTN_REG_CTL);</div><div class='add'>+	val |= AM65_CPSW_PN_REG_CTL_DSCP_IPV4_EN |</div><div class='add'>+		AM65_CPSW_PN_REG_CTL_DSCP_IPV6_EN;</div><div class='add'>+	writel(val, slave-&gt;port_base + AM65_CPSW_PORTN_REG_CTL);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void am65_cpsw_sl_ctl_reset(struct am65_cpsw_port *port)</div><div class='ctx'> {</div><div class='ctx'> 	cpsw_sl_reset(port-&gt;slave.mac_sl, 100);</div><div class='hunk'>@@ -326,7 +427,7 @@ static void am65_cpsw_nuss_ndo_host_tx_timeout(struct net_device *ndev,</div><div class='ctx'> </div><div class='ctx'> 	if (netif_tx_queue_stopped(netif_txq)) {</div><div class='ctx'> 		/* try recover if stopped by us */</div><div class='del'>-		txq_trans_update(netif_txq);</div><div class='add'>+		txq_trans_update(ndev, netif_txq);</div><div class='ctx'> 		netif_tx_wake_queue(netif_txq);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -337,9 +438,9 @@ static int am65_cpsw_nuss_rx_push(struct am65_cpsw_common *common,</div><div class='ctx'> 	struct am65_cpsw_rx_chn *rx_chn = &amp;common-&gt;rx_chns;</div><div class='ctx'> 	struct cppi5_host_desc_t *desc_rx;</div><div class='ctx'> 	struct device *dev = common-&gt;dev;</div><div class='add'>+	struct am65_cpsw_swdata *swdata;</div><div class='ctx'> 	dma_addr_t desc_dma;</div><div class='ctx'> 	dma_addr_t buf_dma;</div><div class='del'>-	void *swdata;</div><div class='ctx'> </div><div class='ctx'> 	desc_rx = k3_cppi_desc_pool_alloc(rx_chn-&gt;desc_pool);</div><div class='ctx'> 	if (!desc_rx) {</div><div class='hunk'>@@ -363,7 +464,8 @@ static int am65_cpsw_nuss_rx_push(struct am65_cpsw_common *common,</div><div class='ctx'> 	cppi5_hdesc_attach_buf(desc_rx, buf_dma, AM65_CPSW_MAX_PACKET_SIZE,</div><div class='ctx'> 			       buf_dma, AM65_CPSW_MAX_PACKET_SIZE);</div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(desc_rx);</div><div class='del'>-	*((void **)swdata) = page_address(page);</div><div class='add'>+	swdata-&gt;page = page;</div><div class='add'>+	swdata-&gt;flow_id = flow_idx;</div><div class='ctx'> </div><div class='ctx'> 	return k3_udma_glue_push_rx_chn(rx_chn-&gt;rx_chn, flow_idx,</div><div class='ctx'> 					desc_rx, desc_dma);</div><div class='hunk'>@@ -397,35 +499,62 @@ static void am65_cpsw_init_host_port_switch(struct am65_cpsw_common *common);</div><div class='ctx'> static void am65_cpsw_init_host_port_emac(struct am65_cpsw_common *common);</div><div class='ctx'> static void am65_cpsw_init_port_switch_ale(struct am65_cpsw_port *port);</div><div class='ctx'> static void am65_cpsw_init_port_emac_ale(struct am65_cpsw_port *port);</div><div class='add'>+static inline void am65_cpsw_put_page(struct am65_cpsw_rx_flow *flow,</div><div class='add'>+				      struct page *page,</div><div class='add'>+				      bool allow_direct);</div><div class='add'>+static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma);</div><div class='add'>+static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma);</div><div class='ctx'> </div><div class='del'>-static void am65_cpsw_destroy_xdp_rxqs(struct am65_cpsw_common *common)</div><div class='add'>+static void am65_cpsw_destroy_rxq(struct am65_cpsw_common *common, int id)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_rx_chn *rx_chn = &amp;common-&gt;rx_chns;</div><div class='ctx'> 	struct am65_cpsw_rx_flow *flow;</div><div class='ctx'> 	struct xdp_rxq_info *rxq;</div><div class='del'>-	int id, port;</div><div class='add'>+	int port;</div><div class='ctx'> </div><div class='del'>-	for (id = 0; id &lt; common-&gt;rx_ch_num_flows; id++) {</div><div class='del'>-		flow = &amp;rx_chn-&gt;flows[id];</div><div class='add'>+	flow = &amp;rx_chn-&gt;flows[id];</div><div class='add'>+	napi_disable(&amp;flow-&gt;napi_rx);</div><div class='add'>+	hrtimer_cancel(&amp;flow-&gt;rx_hrtimer);</div><div class='add'>+	k3_udma_glue_reset_rx_chn(rx_chn-&gt;rx_chn, id, rx_chn,</div><div class='add'>+				  am65_cpsw_nuss_rx_cleanup);</div><div class='ctx'> </div><div class='del'>-		for (port = 0; port &lt; common-&gt;port_num; port++) {</div><div class='del'>-			if (!common-&gt;ports[port].ndev)</div><div class='del'>-				continue;</div><div class='add'>+	for (port = 0; port &lt; common-&gt;port_num; port++) {</div><div class='add'>+		if (!common-&gt;ports[port].ndev)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-			rxq = &amp;common-&gt;ports[port].xdp_rxq[id];</div><div class='add'>+		rxq = &amp;common-&gt;ports[port].xdp_rxq[id];</div><div class='ctx'> </div><div class='del'>-			if (xdp_rxq_info_is_reg(rxq))</div><div class='del'>-				xdp_rxq_info_unreg(rxq);</div><div class='del'>-		}</div><div class='add'>+		if (xdp_rxq_info_is_reg(rxq))</div><div class='add'>+			xdp_rxq_info_unreg(rxq);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (flow-&gt;page_pool) {</div><div class='del'>-			page_pool_destroy(flow-&gt;page_pool);</div><div class='del'>-			flow-&gt;page_pool = NULL;</div><div class='del'>-		}</div><div class='add'>+	if (flow-&gt;page_pool) {</div><div class='add'>+		page_pool_destroy(flow-&gt;page_pool);</div><div class='add'>+		flow-&gt;page_pool = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int am65_cpsw_create_xdp_rxqs(struct am65_cpsw_common *common)</div><div class='add'>+static void am65_cpsw_destroy_rxqs(struct am65_cpsw_common *common)</div><div class='add'>+{</div><div class='add'>+	struct am65_cpsw_rx_chn *rx_chn = &amp;common-&gt;rx_chns;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;common-&gt;tdown_complete);</div><div class='add'>+	k3_udma_glue_tdown_rx_chn(rx_chn-&gt;rx_chn, true);</div><div class='add'>+</div><div class='add'>+	if (common-&gt;pdata.quirks &amp; AM64_CPSW_QUIRK_DMA_RX_TDOWN_IRQ) {</div><div class='add'>+		id = wait_for_completion_timeout(&amp;common-&gt;tdown_complete, msecs_to_jiffies(1000));</div><div class='add'>+		if (!id)</div><div class='add'>+			dev_err(common-&gt;dev, "rx teardown timeout\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (id = common-&gt;rx_ch_num_flows - 1; id &gt;= 0; id--)</div><div class='add'>+		am65_cpsw_destroy_rxq(common, id);</div><div class='add'>+</div><div class='add'>+	k3_udma_glue_disable_rx_chn(common-&gt;rx_chns.rx_chn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int am65_cpsw_create_rxq(struct am65_cpsw_common *common, int id)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_rx_chn *rx_chn = &amp;common-&gt;rx_chns;</div><div class='ctx'> 	struct page_pool_params pp_params = {</div><div class='hunk'>@@ -440,45 +569,162 @@ static int am65_cpsw_create_xdp_rxqs(struct am65_cpsw_common *common)</div><div class='ctx'> 	struct am65_cpsw_rx_flow *flow;</div><div class='ctx'> 	struct xdp_rxq_info *rxq;</div><div class='ctx'> 	struct page_pool *pool;</div><div class='del'>-	int id, port, ret;</div><div class='add'>+	struct page *page;</div><div class='add'>+	int port, ret, i;</div><div class='add'>+</div><div class='add'>+	flow = &amp;rx_chn-&gt;flows[id];</div><div class='add'>+	pp_params.napi = &amp;flow-&gt;napi_rx;</div><div class='add'>+	pool = page_pool_create(&amp;pp_params);</div><div class='add'>+	if (IS_ERR(pool)) {</div><div class='add'>+		ret = PTR_ERR(pool);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow-&gt;page_pool = pool;</div><div class='add'>+</div><div class='add'>+	/* using same page pool is allowed as no running rx handlers</div><div class='add'>+	 * simultaneously for both ndevs</div><div class='add'>+	 */</div><div class='add'>+	for (port = 0; port &lt; common-&gt;port_num; port++) {</div><div class='add'>+		if (!common-&gt;ports[port].ndev)</div><div class='add'>+		/* FIXME should we BUG here? */</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rxq = &amp;common-&gt;ports[port].xdp_rxq[id];</div><div class='add'>+		ret = xdp_rxq_info_reg(rxq, common-&gt;ports[port].ndev,</div><div class='add'>+				       id, flow-&gt;napi_rx.napi_id);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = xdp_rxq_info_reg_mem_model(rxq,</div><div class='add'>+						 MEM_TYPE_PAGE_POOL,</div><div class='add'>+						 pool);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AM65_CPSW_MAX_RX_DESC; i++) {</div><div class='add'>+		page = page_pool_dev_alloc_pages(flow-&gt;page_pool);</div><div class='add'>+		if (!page) {</div><div class='add'>+			dev_err(common-&gt;dev, "cannot allocate page in flow %d\n",</div><div class='add'>+				id);</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = am65_cpsw_nuss_rx_push(common, page, id);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(common-&gt;dev,</div><div class='add'>+				"cannot submit page to rx channel flow %d, error %d\n",</div><div class='add'>+				id, ret);</div><div class='add'>+			am65_cpsw_put_page(flow, page, false);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;flow-&gt;napi_rx);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	am65_cpsw_destroy_rxq(common, id);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int am65_cpsw_create_rxqs(struct am65_cpsw_common *common)</div><div class='add'>+{</div><div class='add'>+	int id, ret;</div><div class='ctx'> </div><div class='ctx'> 	for (id = 0; id &lt; common-&gt;rx_ch_num_flows; id++) {</div><div class='del'>-		flow = &amp;rx_chn-&gt;flows[id];</div><div class='del'>-		pp_params.napi = &amp;flow-&gt;napi_rx;</div><div class='del'>-		pool = page_pool_create(&amp;pp_params);</div><div class='del'>-		if (IS_ERR(pool)) {</div><div class='del'>-			ret = PTR_ERR(pool);</div><div class='add'>+		ret = am65_cpsw_create_rxq(common, id);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(common-&gt;dev, "couldn't create rxq %d: %d\n",</div><div class='add'>+				id, ret);</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		flow-&gt;page_pool = pool;</div><div class='add'>+	ret = k3_udma_glue_enable_rx_chn(common-&gt;rx_chns.rx_chn);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(common-&gt;dev, "couldn't enable rx chn: %d\n", ret);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		/* using same page pool is allowed as no running rx handlers</div><div class='del'>-		 * simultaneously for both ndevs</div><div class='del'>-		 */</div><div class='del'>-		for (port = 0; port &lt; common-&gt;port_num; port++) {</div><div class='del'>-			if (!common-&gt;ports[port].ndev)</div><div class='del'>-				continue;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	for (--id; id &gt;= 0; id--)</div><div class='add'>+		am65_cpsw_destroy_rxq(common, id);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			rxq = &amp;common-&gt;ports[port].xdp_rxq[id];</div><div class='add'>+static void am65_cpsw_destroy_txq(struct am65_cpsw_common *common, int id)</div><div class='add'>+{</div><div class='add'>+	struct am65_cpsw_tx_chn *tx_chn = &amp;common-&gt;tx_chns[id];</div><div class='ctx'> </div><div class='del'>-			ret = xdp_rxq_info_reg(rxq, common-&gt;ports[port].ndev,</div><div class='del'>-					       id, flow-&gt;napi_rx.napi_id);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto err;</div><div class='add'>+	napi_disable(&amp;tx_chn-&gt;napi_tx);</div><div class='add'>+	hrtimer_cancel(&amp;tx_chn-&gt;tx_hrtimer);</div><div class='add'>+	k3_udma_glue_reset_tx_chn(tx_chn-&gt;tx_chn, tx_chn,</div><div class='add'>+				  am65_cpsw_nuss_tx_cleanup);</div><div class='add'>+	k3_udma_glue_disable_tx_chn(tx_chn-&gt;tx_chn);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-			ret = xdp_rxq_info_reg_mem_model(rxq,</div><div class='del'>-							 MEM_TYPE_PAGE_POOL,</div><div class='del'>-							 pool);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto err;</div><div class='add'>+static void am65_cpsw_destroy_txqs(struct am65_cpsw_common *common)</div><div class='add'>+{</div><div class='add'>+	struct am65_cpsw_tx_chn *tx_chn = common-&gt;tx_chns;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	/* shutdown tx channels */</div><div class='add'>+	atomic_set(&amp;common-&gt;tdown_cnt, common-&gt;tx_ch_num);</div><div class='add'>+	/* ensure new tdown_cnt value is visible */</div><div class='add'>+	smp_mb__after_atomic();</div><div class='add'>+	reinit_completion(&amp;common-&gt;tdown_complete);</div><div class='add'>+</div><div class='add'>+	for (id = 0; id &lt; common-&gt;tx_ch_num; id++)</div><div class='add'>+		k3_udma_glue_tdown_tx_chn(tx_chn[id].tx_chn, false);</div><div class='add'>+</div><div class='add'>+	id = wait_for_completion_timeout(&amp;common-&gt;tdown_complete,</div><div class='add'>+					 msecs_to_jiffies(1000));</div><div class='add'>+	if (!id)</div><div class='add'>+		dev_err(common-&gt;dev, "tx teardown timeout\n");</div><div class='add'>+</div><div class='add'>+	for (id = common-&gt;tx_ch_num - 1; id &gt;= 0; id--)</div><div class='add'>+		am65_cpsw_destroy_txq(common, id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int am65_cpsw_create_txq(struct am65_cpsw_common *common, int id)</div><div class='add'>+{</div><div class='add'>+	struct am65_cpsw_tx_chn *tx_chn = &amp;common-&gt;tx_chns[id];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = k3_udma_glue_enable_tx_chn(tx_chn-&gt;tx_chn);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;tx_chn-&gt;napi_tx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int am65_cpsw_create_txqs(struct am65_cpsw_common *common)</div><div class='add'>+{</div><div class='add'>+	int id, ret;</div><div class='add'>+</div><div class='add'>+	for (id = 0; id &lt; common-&gt;tx_ch_num; id++) {</div><div class='add'>+		ret = am65_cpsw_create_txq(common, id);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(common-&gt;dev, "couldn't create txq %d: %d\n",</div><div class='add'>+				id, ret);</div><div class='add'>+			goto err;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	am65_cpsw_destroy_xdp_rxqs(common);</div><div class='add'>+	for (--id; id &gt;= 0; id--)</div><div class='add'>+		am65_cpsw_destroy_txq(common, id);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -519,36 +765,30 @@ static enum am65_cpsw_tx_buf_type am65_cpsw_nuss_buf_type(struct am65_cpsw_tx_ch</div><div class='ctx'> </div><div class='ctx'> static inline void am65_cpsw_put_page(struct am65_cpsw_rx_flow *flow,</div><div class='ctx'> 				      struct page *page,</div><div class='del'>-				      bool allow_direct,</div><div class='del'>-				      int desc_idx)</div><div class='add'>+				      bool allow_direct)</div><div class='ctx'> {</div><div class='ctx'> 	page_pool_put_full_page(flow-&gt;page_pool, page, allow_direct);</div><div class='del'>-	flow-&gt;pages[desc_idx] = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void am65_cpsw_nuss_rx_cleanup(void *data, dma_addr_t desc_dma)</div><div class='ctx'> {</div><div class='del'>-	struct am65_cpsw_rx_flow *flow = data;</div><div class='add'>+	struct am65_cpsw_rx_chn *rx_chn = data;</div><div class='ctx'> 	struct cppi5_host_desc_t *desc_rx;</div><div class='del'>-	struct am65_cpsw_rx_chn *rx_chn;</div><div class='add'>+	struct am65_cpsw_swdata *swdata;</div><div class='ctx'> 	dma_addr_t buf_dma;</div><div class='add'>+	struct page *page;</div><div class='ctx'> 	u32 buf_dma_len;</div><div class='del'>-	void *page_addr;</div><div class='del'>-	void **swdata;</div><div class='del'>-	int desc_idx;</div><div class='add'>+	u32 flow_id;</div><div class='ctx'> </div><div class='del'>-	rx_chn = &amp;flow-&gt;common-&gt;rx_chns;</div><div class='ctx'> 	desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn-&gt;desc_pool, desc_dma);</div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(desc_rx);</div><div class='del'>-	page_addr = *swdata;</div><div class='add'>+	page = swdata-&gt;page;</div><div class='add'>+	flow_id = swdata-&gt;flow_id;</div><div class='ctx'> 	cppi5_hdesc_get_obuf(desc_rx, &amp;buf_dma, &amp;buf_dma_len);</div><div class='ctx'> 	k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn-&gt;rx_chn, &amp;buf_dma);</div><div class='ctx'> 	dma_unmap_single(rx_chn-&gt;dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);</div><div class='ctx'> 	k3_cppi_desc_pool_free(rx_chn-&gt;desc_pool, desc_rx);</div><div class='del'>-</div><div class='del'>-	desc_idx = am65_cpsw_nuss_desc_idx(rx_chn-&gt;desc_pool, desc_rx,</div><div class='del'>-					   rx_chn-&gt;dsize_log2);</div><div class='del'>-	am65_cpsw_put_page(flow, virt_to_page(page_addr), false, desc_idx);</div><div class='add'>+	am65_cpsw_put_page(&amp;rx_chn-&gt;flows[flow_id], page, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void am65_cpsw_nuss_xmit_free(struct am65_cpsw_tx_chn *tx_chn,</div><div class='hunk'>@@ -589,31 +829,38 @@ static void am65_cpsw_nuss_xmit_free(struct am65_cpsw_tx_chn *tx_chn,</div><div class='ctx'> static void am65_cpsw_nuss_tx_cleanup(void *data, dma_addr_t desc_dma)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_tx_chn *tx_chn = data;</div><div class='add'>+	enum am65_cpsw_tx_buf_type buf_type;</div><div class='add'>+	struct am65_cpsw_tx_swdata *swdata;</div><div class='ctx'> 	struct cppi5_host_desc_t *desc_tx;</div><div class='add'>+	struct xdp_frame *xdpf;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	void **swdata;</div><div class='ctx'> </div><div class='ctx'> 	desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn-&gt;desc_pool, desc_dma);</div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(desc_tx);</div><div class='del'>-	skb = *(swdata);</div><div class='del'>-	am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);</div><div class='add'>+	buf_type = am65_cpsw_nuss_buf_type(tx_chn, desc_dma);</div><div class='add'>+	if (buf_type == AM65_CPSW_TX_BUF_TYPE_SKB) {</div><div class='add'>+		skb = swdata-&gt;skb;</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+	} else {</div><div class='add'>+		xdpf = swdata-&gt;xdpf;</div><div class='add'>+		xdp_return_frame(xdpf);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	dev_kfree_skb_any(skb);</div><div class='add'>+	am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct sk_buff *am65_cpsw_build_skb(void *page_addr,</div><div class='ctx'> 					   struct net_device *ndev,</div><div class='del'>-					   unsigned int len)</div><div class='add'>+					   unsigned int len,</div><div class='add'>+					   unsigned int headroom)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='del'>-	len += AM65_CPSW_HEADROOM;</div><div class='del'>-</div><div class='ctx'> 	skb = build_skb(page_addr, len);</div><div class='ctx'> 	if (unlikely(!skb))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	skb_reserve(skb, AM65_CPSW_HEADROOM);</div><div class='add'>+	skb_reserve(skb, headroom);</div><div class='ctx'> 	skb-&gt;dev = ndev;</div><div class='ctx'> </div><div class='ctx'> 	return skb;</div><div class='hunk'>@@ -622,12 +869,8 @@ static struct sk_buff *am65_cpsw_build_skb(void *page_addr,</div><div class='ctx'> static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_host *host_p = am65_common_get_host(common);</div><div class='del'>-	struct am65_cpsw_rx_chn *rx_chn = &amp;common-&gt;rx_chns;</div><div class='del'>-	struct am65_cpsw_tx_chn *tx_chn = common-&gt;tx_chns;</div><div class='del'>-	int port_idx, i, ret, tx, flow_idx;</div><div class='del'>-	struct am65_cpsw_rx_flow *flow;</div><div class='ctx'> 	u32 val, port_mask;</div><div class='del'>-	struct page *page;</div><div class='add'>+	int port_idx, ret;</div><div class='ctx'> </div><div class='ctx'> 	if (common-&gt;usage_count)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -667,7 +910,7 @@ static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common)</div><div class='ctx'> 			     ALE_DEFAULT_THREAD_ID, 0);</div><div class='ctx'> 	cpsw_ale_control_set(common-&gt;ale, HOST_PORT_NUM,</div><div class='ctx'> 			     ALE_DEFAULT_THREAD_ENABLE, 1);</div><div class='del'>-	/* switch to vlan unaware mode */</div><div class='add'>+	/* switch to vlan aware mode */</div><div class='ctx'> 	cpsw_ale_control_set(common-&gt;ale, HOST_PORT_NUM, ALE_VLAN_AWARE, 1);</div><div class='ctx'> 	cpsw_ale_control_set(common-&gt;ale, HOST_PORT_NUM,</div><div class='ctx'> 			     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);</div><div class='hunk'>@@ -687,152 +930,38 @@ static int am65_cpsw_nuss_common_open(struct am65_cpsw_common *common)</div><div class='ctx'> </div><div class='ctx'> 	am65_cpsw_qos_tx_p0_rate_init(common);</div><div class='ctx'> </div><div class='del'>-	ret = am65_cpsw_create_xdp_rxqs(common);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(common-&gt;dev, "Failed to create XDP rx queues\n");</div><div class='add'>+	ret = am65_cpsw_create_rxqs(common);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (flow_idx = 0; flow_idx &lt; common-&gt;rx_ch_num_flows; flow_idx++) {</div><div class='del'>-		flow = &amp;rx_chn-&gt;flows[flow_idx];</div><div class='del'>-		for (i = 0; i &lt; AM65_CPSW_MAX_RX_DESC; i++) {</div><div class='del'>-			page = page_pool_dev_alloc_pages(flow-&gt;page_pool);</div><div class='del'>-			if (!page) {</div><div class='del'>-				dev_err(common-&gt;dev, "cannot allocate page in flow %d\n",</div><div class='del'>-					flow_idx);</div><div class='del'>-				ret = -ENOMEM;</div><div class='del'>-				goto fail_rx;</div><div class='del'>-			}</div><div class='del'>-			flow-&gt;pages[i] = page;</div><div class='ctx'> </div><div class='del'>-			ret = am65_cpsw_nuss_rx_push(common, page, flow_idx);</div><div class='del'>-			if (ret &lt; 0) {</div><div class='del'>-				dev_err(common-&gt;dev,</div><div class='del'>-					"cannot submit page to rx channel flow %d, error %d\n",</div><div class='del'>-					flow_idx, ret);</div><div class='del'>-				am65_cpsw_put_page(flow, page, false, i);</div><div class='del'>-				goto fail_rx;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = k3_udma_glue_enable_rx_chn(rx_chn-&gt;rx_chn);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(common-&gt;dev, "couldn't enable rx chn: %d\n", ret);</div><div class='del'>-		goto fail_rx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; common-&gt;rx_ch_num_flows ; i++) {</div><div class='del'>-		napi_enable(&amp;rx_chn-&gt;flows[i].napi_rx);</div><div class='del'>-		if (rx_chn-&gt;flows[i].irq_disabled) {</div><div class='del'>-			rx_chn-&gt;flows[i].irq_disabled = false;</div><div class='del'>-			enable_irq(rx_chn-&gt;flows[i].irq);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (tx = 0; tx &lt; common-&gt;tx_ch_num; tx++) {</div><div class='del'>-		ret = k3_udma_glue_enable_tx_chn(tx_chn[tx].tx_chn);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(common-&gt;dev, "couldn't enable tx chn %d: %d\n",</div><div class='del'>-				tx, ret);</div><div class='del'>-			tx--;</div><div class='del'>-			goto fail_tx;</div><div class='del'>-		}</div><div class='del'>-		napi_enable(&amp;tx_chn[tx].napi_tx);</div><div class='del'>-	}</div><div class='add'>+	ret = am65_cpsw_create_txqs(common);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto cleanup_rx;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(common-&gt;dev, "cpsw_nuss started\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-fail_tx:</div><div class='del'>-	while (tx &gt;= 0) {</div><div class='del'>-		napi_disable(&amp;tx_chn[tx].napi_tx);</div><div class='del'>-		k3_udma_glue_disable_tx_chn(tx_chn[tx].tx_chn);</div><div class='del'>-		tx--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (flow_idx = 0; i &lt; common-&gt;rx_ch_num_flows; flow_idx++) {</div><div class='del'>-		flow = &amp;rx_chn-&gt;flows[flow_idx];</div><div class='del'>-		if (!flow-&gt;irq_disabled) {</div><div class='del'>-			disable_irq(flow-&gt;irq);</div><div class='del'>-			flow-&gt;irq_disabled = true;</div><div class='del'>-		}</div><div class='del'>-		napi_disable(&amp;flow-&gt;napi_rx);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	k3_udma_glue_disable_rx_chn(rx_chn-&gt;rx_chn);</div><div class='del'>-</div><div class='del'>-fail_rx:</div><div class='del'>-	for (i = 0; i &lt; common-&gt;rx_ch_num_flows; i++)</div><div class='del'>-		k3_udma_glue_reset_rx_chn(rx_chn-&gt;rx_chn, i, &amp;rx_chn-&gt;flows[i],</div><div class='del'>-					  am65_cpsw_nuss_rx_cleanup, 0);</div><div class='del'>-</div><div class='del'>-	am65_cpsw_destroy_xdp_rxqs(common);</div><div class='add'>+cleanup_rx:</div><div class='add'>+	am65_cpsw_destroy_rxqs(common);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int am65_cpsw_nuss_common_stop(struct am65_cpsw_common *common)</div><div class='ctx'> {</div><div class='del'>-	struct am65_cpsw_rx_chn *rx_chn = &amp;common-&gt;rx_chns;</div><div class='del'>-	struct am65_cpsw_tx_chn *tx_chn = common-&gt;tx_chns;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='ctx'> 	if (common-&gt;usage_count != 1)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	cpsw_ale_control_set(common-&gt;ale, HOST_PORT_NUM,</div><div class='ctx'> 			     ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);</div><div class='ctx'> </div><div class='del'>-	/* shutdown tx channels */</div><div class='del'>-	atomic_set(&amp;common-&gt;tdown_cnt, common-&gt;tx_ch_num);</div><div class='del'>-	/* ensure new tdown_cnt value is visible */</div><div class='del'>-	smp_mb__after_atomic();</div><div class='del'>-	reinit_completion(&amp;common-&gt;tdown_complete);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; common-&gt;tx_ch_num; i++)</div><div class='del'>-		k3_udma_glue_tdown_tx_chn(tx_chn[i].tx_chn, false);</div><div class='del'>-</div><div class='del'>-	i = wait_for_completion_timeout(&amp;common-&gt;tdown_complete,</div><div class='del'>-					msecs_to_jiffies(1000));</div><div class='del'>-	if (!i)</div><div class='del'>-		dev_err(common-&gt;dev, "tx timeout\n");</div><div class='del'>-	for (i = 0; i &lt; common-&gt;tx_ch_num; i++) {</div><div class='del'>-		napi_disable(&amp;tx_chn[i].napi_tx);</div><div class='del'>-		hrtimer_cancel(&amp;tx_chn[i].tx_hrtimer);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; common-&gt;tx_ch_num; i++) {</div><div class='del'>-		k3_udma_glue_reset_tx_chn(tx_chn[i].tx_chn, &amp;tx_chn[i],</div><div class='del'>-					  am65_cpsw_nuss_tx_cleanup);</div><div class='del'>-		k3_udma_glue_disable_tx_chn(tx_chn[i].tx_chn);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	reinit_completion(&amp;common-&gt;tdown_complete);</div><div class='del'>-	k3_udma_glue_tdown_rx_chn(rx_chn-&gt;rx_chn, true);</div><div class='del'>-</div><div class='del'>-	if (common-&gt;pdata.quirks &amp; AM64_CPSW_QUIRK_DMA_RX_TDOWN_IRQ) {</div><div class='del'>-		i = wait_for_completion_timeout(&amp;common-&gt;tdown_complete, msecs_to_jiffies(1000));</div><div class='del'>-		if (!i)</div><div class='del'>-			dev_err(common-&gt;dev, "rx teardown timeout\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; common-&gt;rx_ch_num_flows; i++) {</div><div class='del'>-		napi_disable(&amp;rx_chn-&gt;flows[i].napi_rx);</div><div class='del'>-		hrtimer_cancel(&amp;rx_chn-&gt;flows[i].rx_hrtimer);</div><div class='del'>-		k3_udma_glue_reset_rx_chn(rx_chn-&gt;rx_chn, i, &amp;rx_chn-&gt;flows[i],</div><div class='del'>-					  am65_cpsw_nuss_rx_cleanup, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	k3_udma_glue_disable_rx_chn(rx_chn-&gt;rx_chn);</div><div class='del'>-</div><div class='add'>+	am65_cpsw_destroy_txqs(common);</div><div class='add'>+	am65_cpsw_destroy_rxqs(common);</div><div class='ctx'> 	cpsw_ale_stop(common-&gt;ale);</div><div class='ctx'> </div><div class='ctx'> 	writel(0, common-&gt;cpsw_base + AM65_CPSW_REG_CTL);</div><div class='ctx'> 	writel(0, common-&gt;cpsw_base + AM65_CPSW_REG_STAT_PORT_EN);</div><div class='ctx'> </div><div class='del'>-	am65_cpsw_destroy_xdp_rxqs(common);</div><div class='del'>-</div><div class='ctx'> 	dev_dbg(common-&gt;dev, "cpsw_nuss stopped\n");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -920,7 +1049,17 @@ static int am65_cpsw_nuss_ndo_slave_open(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	common-&gt;usage_count++;</div><div class='ctx'> </div><div class='add'>+	/* VLAN aware CPSW mode is incompatible with some DSA tagging schemes.</div><div class='add'>+	 * Therefore disable VLAN_AWARE mode if any of the ports is a DSA Port.</div><div class='add'>+	 */</div><div class='add'>+	if (netdev_uses_dsa(ndev)) {</div><div class='add'>+		reg = readl(common-&gt;cpsw_base + AM65_CPSW_REG_CTL);</div><div class='add'>+		reg &amp;= ~AM65_CPSW_CTL_VLAN_AWARE;</div><div class='add'>+		writel(reg, common-&gt;cpsw_base + AM65_CPSW_REG_CTL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	am65_cpsw_port_set_sl_mac(port, ndev-&gt;dev_addr);</div><div class='add'>+	am65_cpsw_port_enable_dscp_map(port);</div><div class='ctx'> </div><div class='ctx'> 	if (common-&gt;is_emac_mode)</div><div class='ctx'> 		am65_cpsw_init_port_emac_ale(port);</div><div class='hunk'>@@ -958,10 +1097,10 @@ static int am65_cpsw_xdp_tx_frame(struct net_device *ndev,</div><div class='ctx'> 	struct am65_cpsw_common *common = am65_ndev_to_common(ndev);</div><div class='ctx'> 	struct am65_cpsw_port *port = am65_ndev_to_port(ndev);</div><div class='ctx'> 	struct cppi5_host_desc_t *host_desc;</div><div class='add'>+	struct am65_cpsw_tx_swdata *swdata;</div><div class='ctx'> 	struct netdev_queue *netif_txq;</div><div class='ctx'> 	dma_addr_t dma_desc, dma_buf;</div><div class='ctx'> 	u32 pkt_len = xdpf-&gt;len;</div><div class='del'>-	void **swdata;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	host_desc = k3_cppi_desc_pool_alloc(tx_chn-&gt;desc_pool);</div><div class='hunk'>@@ -991,7 +1130,8 @@ static int am65_cpsw_xdp_tx_frame(struct net_device *ndev,</div><div class='ctx'> 	cppi5_hdesc_attach_buf(host_desc, dma_buf, pkt_len, dma_buf, pkt_len);</div><div class='ctx'> </div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(host_desc);</div><div class='del'>-	*(swdata) = xdpf;</div><div class='add'>+	swdata-&gt;ndev = ndev;</div><div class='add'>+	swdata-&gt;xdpf = xdpf;</div><div class='ctx'> </div><div class='ctx'> 	/* Report BQL before sending the packet */</div><div class='ctx'> 	netif_txq = netdev_get_tx_queue(ndev, tx_chn-&gt;id);</div><div class='hunk'>@@ -1027,20 +1167,21 @@ pool_free:</div><div class='ctx'> </div><div class='ctx'> static int am65_cpsw_run_xdp(struct am65_cpsw_rx_flow *flow,</div><div class='ctx'> 			     struct am65_cpsw_port *port,</div><div class='del'>-			     struct xdp_buff *xdp,</div><div class='del'>-			     int desc_idx, int cpu, int *len)</div><div class='add'>+			     struct xdp_buff *xdp, int *len)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_common *common = flow-&gt;common;</div><div class='ctx'> 	struct net_device *ndev = port-&gt;ndev;</div><div class='ctx'> 	int ret = AM65_CPSW_XDP_CONSUMED;</div><div class='ctx'> 	struct am65_cpsw_tx_chn *tx_chn;</div><div class='ctx'> 	struct netdev_queue *netif_txq;</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='ctx'> 	struct xdp_frame *xdpf;</div><div class='ctx'> 	struct bpf_prog *prog;</div><div class='del'>-	struct page *page;</div><div class='add'>+	int pkt_len;</div><div class='ctx'> 	u32 act;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	pkt_len = *len;</div><div class='ctx'> 	prog = READ_ONCE(port-&gt;xdp_prog);</div><div class='ctx'> 	if (!prog)</div><div class='ctx'> 		return AM65_CPSW_XDP_PASS;</div><div class='hunk'>@@ -1051,15 +1192,16 @@ static int am65_cpsw_run_xdp(struct am65_cpsw_rx_flow *flow,</div><div class='ctx'> </div><div class='ctx'> 	switch (act) {</div><div class='ctx'> 	case XDP_PASS:</div><div class='del'>-		ret = AM65_CPSW_XDP_PASS;</div><div class='del'>-		goto out;</div><div class='add'>+		return AM65_CPSW_XDP_PASS;</div><div class='ctx'> 	case XDP_TX:</div><div class='ctx'> 		tx_chn = &amp;common-&gt;tx_chns[cpu % AM65_CPSW_MAX_QUEUES];</div><div class='ctx'> 		netif_txq = netdev_get_tx_queue(ndev, tx_chn-&gt;id);</div><div class='ctx'> </div><div class='ctx'> 		xdpf = xdp_convert_buff_to_frame(xdp);</div><div class='del'>-		if (unlikely(!xdpf))</div><div class='add'>+		if (unlikely(!xdpf)) {</div><div class='add'>+			ndev-&gt;stats.tx_dropped++;</div><div class='ctx'> 			goto drop;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		__netif_tx_lock(netif_txq, cpu);</div><div class='ctx'> 		err = am65_cpsw_xdp_tx_frame(ndev, tx_chn, xdpf,</div><div class='hunk'>@@ -1068,16 +1210,14 @@ static int am65_cpsw_run_xdp(struct am65_cpsw_rx_flow *flow,</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto drop;</div><div class='ctx'> </div><div class='del'>-		dev_sw_netstats_tx_add(ndev, 1, *len);</div><div class='del'>-		ret = AM65_CPSW_XDP_CONSUMED;</div><div class='del'>-		goto out;</div><div class='add'>+		dev_sw_netstats_rx_add(ndev, pkt_len);</div><div class='add'>+		return AM65_CPSW_XDP_TX;</div><div class='ctx'> 	case XDP_REDIRECT:</div><div class='ctx'> 		if (unlikely(xdp_do_redirect(ndev, xdp, prog)))</div><div class='ctx'> 			goto drop;</div><div class='ctx'> </div><div class='del'>-		dev_sw_netstats_rx_add(ndev, *len);</div><div class='del'>-		ret = AM65_CPSW_XDP_REDIRECT;</div><div class='del'>-		goto out;</div><div class='add'>+		dev_sw_netstats_rx_add(ndev, pkt_len);</div><div class='add'>+		return AM65_CPSW_XDP_REDIRECT;</div><div class='ctx'> 	default:</div><div class='ctx'> 		bpf_warn_invalid_xdp_action(ndev, prog, act);</div><div class='ctx'> 		fallthrough;</div><div class='hunk'>@@ -1089,10 +1229,6 @@ drop:</div><div class='ctx'> 		ndev-&gt;stats.rx_dropped++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	page = virt_to_head_page(xdp-&gt;data);</div><div class='del'>-	am65_cpsw_put_page(flow, page, true, desc_idx);</div><div class='del'>-</div><div class='del'>-out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1130,7 +1266,7 @@ static void am65_cpsw_nuss_rx_csum(struct sk_buff *skb, u32 csum_info)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_rx_flow *flow,</div><div class='del'>-				     int cpu, int *xdp_state)</div><div class='add'>+				     int *xdp_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_rx_chn *rx_chn = &amp;flow-&gt;common-&gt;rx_chns;</div><div class='ctx'> 	u32 buf_dma_len, pkt_len, port_id = 0, csum_info;</div><div class='hunk'>@@ -1138,16 +1274,16 @@ static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_rx_flow *flow,</div><div class='ctx'> 	struct am65_cpsw_ndev_priv *ndev_priv;</div><div class='ctx'> 	struct cppi5_host_desc_t *desc_rx;</div><div class='ctx'> 	struct device *dev = common-&gt;dev;</div><div class='add'>+	struct am65_cpsw_swdata *swdata;</div><div class='ctx'> 	struct page *page, *new_page;</div><div class='ctx'> 	dma_addr_t desc_dma, buf_dma;</div><div class='ctx'> 	struct am65_cpsw_port *port;</div><div class='del'>-	int headroom, desc_idx, ret;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	u32 flow_idx = flow-&gt;id;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct xdp_buff	xdp;</div><div class='add'>+	int headroom, ret;</div><div class='ctx'> 	void *page_addr;</div><div class='del'>-	void **swdata;</div><div class='ctx'> 	u32 *psdata;</div><div class='ctx'> </div><div class='ctx'> 	*xdp_state = AM65_CPSW_XDP_PASS;</div><div class='hunk'>@@ -1170,8 +1306,8 @@ static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_rx_flow *flow,</div><div class='ctx'> 		__func__, flow_idx, &amp;desc_dma);</div><div class='ctx'> </div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(desc_rx);</div><div class='del'>-	page_addr = *swdata;</div><div class='del'>-	page = virt_to_page(page_addr);</div><div class='add'>+	page = swdata-&gt;page;</div><div class='add'>+	page_addr = page_address(page);</div><div class='ctx'> 	cppi5_hdesc_get_obuf(desc_rx, &amp;buf_dma, &amp;buf_dma_len);</div><div class='ctx'> 	k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn-&gt;rx_chn, &amp;buf_dma);</div><div class='ctx'> 	pkt_len = cppi5_hdesc_get_pktlen(desc_rx);</div><div class='hunk'>@@ -1184,31 +1320,32 @@ static int am65_cpsw_nuss_rx_packets(struct am65_cpsw_rx_flow *flow,</div><div class='ctx'> 	dev_dbg(dev, "%s rx csum_info:%#x\n", __func__, csum_info);</div><div class='ctx'> </div><div class='ctx'> 	dma_unmap_single(rx_chn-&gt;dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);</div><div class='del'>-</div><div class='ctx'> 	k3_cppi_desc_pool_free(rx_chn-&gt;desc_pool, desc_rx);</div><div class='ctx'> </div><div class='del'>-	desc_idx = am65_cpsw_nuss_desc_idx(rx_chn-&gt;desc_pool, desc_rx,</div><div class='del'>-					   rx_chn-&gt;dsize_log2);</div><div class='del'>-</div><div class='del'>-	skb = am65_cpsw_build_skb(page_addr, ndev,</div><div class='del'>-				  AM65_CPSW_MAX_PACKET_SIZE);</div><div class='del'>-	if (unlikely(!skb)) {</div><div class='del'>-		new_page = page;</div><div class='del'>-		goto requeue;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (port-&gt;xdp_prog) {</div><div class='ctx'> 		xdp_init_buff(&amp;xdp, PAGE_SIZE, &amp;port-&gt;xdp_rxq[flow-&gt;id]);</div><div class='ctx'> 		xdp_prepare_buff(&amp;xdp, page_addr, AM65_CPSW_HEADROOM,</div><div class='ctx'> 				 pkt_len, false);</div><div class='del'>-		*xdp_state = am65_cpsw_run_xdp(flow, port, &amp;xdp, desc_idx,</div><div class='del'>-					       cpu, &amp;pkt_len);</div><div class='add'>+		*xdp_state = am65_cpsw_run_xdp(flow, port, &amp;xdp, &amp;pkt_len);</div><div class='add'>+		if (*xdp_state == AM65_CPSW_XDP_CONSUMED) {</div><div class='add'>+			page = virt_to_head_page(xdp.data);</div><div class='add'>+			am65_cpsw_put_page(flow, page, true);</div><div class='add'>+			goto allocate;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (*xdp_state != AM65_CPSW_XDP_PASS)</div><div class='ctx'> 			goto allocate;</div><div class='ctx'> </div><div class='del'>-		/* Compute additional headroom to be reserved */</div><div class='del'>-		headroom = (xdp.data - xdp.data_hard_start) - skb_headroom(skb);</div><div class='del'>-		skb_reserve(skb, headroom);</div><div class='add'>+		headroom = xdp.data - xdp.data_hard_start;</div><div class='add'>+	} else {</div><div class='add'>+		headroom = AM65_CPSW_HEADROOM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = am65_cpsw_build_skb(page_addr, ndev,</div><div class='add'>+				  PAGE_SIZE, headroom);</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		new_page = page;</div><div class='add'>+		goto requeue;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ndev_priv = netdev_priv(ndev);</div><div class='hunk'>@@ -1230,10 +1367,8 @@ allocate:</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	flow-&gt;pages[desc_idx] = new_page;</div><div class='del'>-</div><div class='ctx'> 	if (netif_dormant(ndev)) {</div><div class='del'>-		am65_cpsw_put_page(flow, new_page, true, desc_idx);</div><div class='add'>+		am65_cpsw_put_page(flow, new_page, true);</div><div class='ctx'> 		ndev-&gt;stats.rx_dropped++;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1241,7 +1376,7 @@ allocate:</div><div class='ctx'> requeue:</div><div class='ctx'> 	ret = am65_cpsw_nuss_rx_push(common, new_page, flow_idx);</div><div class='ctx'> 	if (WARN_ON(ret &lt; 0)) {</div><div class='del'>-		am65_cpsw_put_page(flow, new_page, true, desc_idx);</div><div class='add'>+		am65_cpsw_put_page(flow, new_page, true);</div><div class='ctx'> 		ndev-&gt;stats.rx_errors++;</div><div class='ctx'> 		ndev-&gt;stats.rx_dropped++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1263,7 +1398,6 @@ static int am65_cpsw_nuss_rx_poll(struct napi_struct *napi_rx, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_rx_flow *flow = am65_cpsw_napi_to_rx_flow(napi_rx);</div><div class='ctx'> 	struct am65_cpsw_common *common = flow-&gt;common;</div><div class='del'>-	int cpu = smp_processor_id();</div><div class='ctx'> 	int xdp_state_or = 0;</div><div class='ctx'> 	int cur_budget, ret;</div><div class='ctx'> 	int xdp_state;</div><div class='hunk'>@@ -1272,7 +1406,7 @@ static int am65_cpsw_nuss_rx_poll(struct napi_struct *napi_rx, int budget)</div><div class='ctx'> 	/* process only this flow */</div><div class='ctx'> 	cur_budget = budget;</div><div class='ctx'> 	while (cur_budget--) {</div><div class='del'>-		ret = am65_cpsw_nuss_rx_packets(flow, cpu, &amp;xdp_state);</div><div class='add'>+		ret = am65_cpsw_nuss_rx_packets(flow, &amp;xdp_state);</div><div class='ctx'> 		xdp_state_or |= xdp_state;</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1300,52 +1434,6 @@ static int am65_cpsw_nuss_rx_poll(struct napi_struct *napi_rx, int budget)</div><div class='ctx'> 	return num_rx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct sk_buff *</div><div class='del'>-am65_cpsw_nuss_tx_compl_packet_skb(struct am65_cpsw_tx_chn *tx_chn,</div><div class='del'>-				   dma_addr_t desc_dma)</div><div class='del'>-{</div><div class='del'>-	struct cppi5_host_desc_t *desc_tx;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	void **swdata;</div><div class='del'>-</div><div class='del'>-	desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn-&gt;desc_pool,</div><div class='del'>-					     desc_dma);</div><div class='del'>-	swdata = cppi5_hdesc_get_swdata(desc_tx);</div><div class='del'>-	skb = *(swdata);</div><div class='del'>-	am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);</div><div class='del'>-</div><div class='del'>-	am65_cpts_tx_timestamp(tx_chn-&gt;common-&gt;cpts, skb);</div><div class='del'>-</div><div class='del'>-	dev_sw_netstats_tx_add(skb-&gt;dev, 1, skb-&gt;len);</div><div class='del'>-</div><div class='del'>-	return skb;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct xdp_frame *</div><div class='del'>-am65_cpsw_nuss_tx_compl_packet_xdp(struct am65_cpsw_common *common,</div><div class='del'>-				   struct am65_cpsw_tx_chn *tx_chn,</div><div class='del'>-				   dma_addr_t desc_dma,</div><div class='del'>-				   struct net_device **ndev)</div><div class='del'>-{</div><div class='del'>-	struct cppi5_host_desc_t *desc_tx;</div><div class='del'>-	struct am65_cpsw_port *port;</div><div class='del'>-	struct xdp_frame *xdpf;</div><div class='del'>-	u32 port_id = 0;</div><div class='del'>-	void **swdata;</div><div class='del'>-</div><div class='del'>-	desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn-&gt;desc_pool, desc_dma);</div><div class='del'>-	cppi5_desc_get_tags_ids(&amp;desc_tx-&gt;hdr, NULL, &amp;port_id);</div><div class='del'>-	swdata = cppi5_hdesc_get_swdata(desc_tx);</div><div class='del'>-	xdpf = *(swdata);</div><div class='del'>-	am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);</div><div class='del'>-</div><div class='del'>-	port = am65_common_get_port(common, port_id);</div><div class='del'>-	dev_sw_netstats_tx_add(port-&gt;ndev, 1, xdpf-&gt;len);</div><div class='del'>-	*ndev = port-&gt;ndev;</div><div class='del'>-</div><div class='del'>-	return xdpf;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void am65_cpsw_nuss_tx_wake(struct am65_cpsw_tx_chn *tx_chn, struct net_device *ndev,</div><div class='ctx'> 				   struct netdev_queue *netif_txq)</div><div class='ctx'> {</div><div class='hunk'>@@ -1366,13 +1454,17 @@ static void am65_cpsw_nuss_tx_wake(struct am65_cpsw_tx_chn *tx_chn, struct net_d</div><div class='ctx'> static int am65_cpsw_nuss_tx_compl_packets(struct am65_cpsw_common *common,</div><div class='ctx'> 					   int chn, unsigned int budget, bool *tdown)</div><div class='ctx'> {</div><div class='add'>+	bool single_port = AM65_CPSW_IS_CPSW2G(common);</div><div class='ctx'> 	enum am65_cpsw_tx_buf_type buf_type;</div><div class='add'>+	struct am65_cpsw_tx_swdata *swdata;</div><div class='add'>+	struct cppi5_host_desc_t *desc_tx;</div><div class='ctx'> 	struct device *dev = common-&gt;dev;</div><div class='ctx'> 	struct am65_cpsw_tx_chn *tx_chn;</div><div class='ctx'> 	struct netdev_queue *netif_txq;</div><div class='ctx'> 	unsigned int total_bytes = 0;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	struct xdp_frame *xdpf;</div><div class='add'>+	unsigned int pkt_len;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	dma_addr_t desc_dma;</div><div class='ctx'> 	int res, num_tx = 0;</div><div class='hunk'>@@ -1380,9 +1472,12 @@ static int am65_cpsw_nuss_tx_compl_packets(struct am65_cpsw_common *common,</div><div class='ctx'> 	tx_chn = &amp;common-&gt;tx_chns[chn];</div><div class='ctx'> </div><div class='ctx'> 	while (true) {</div><div class='del'>-		spin_lock(&amp;tx_chn-&gt;lock);</div><div class='add'>+		if (!single_port)</div><div class='add'>+			spin_lock(&amp;tx_chn-&gt;lock);</div><div class='ctx'> 		res = k3_udma_glue_pop_tx_chn(tx_chn-&gt;tx_chn, &amp;desc_dma);</div><div class='del'>-		spin_unlock(&amp;tx_chn-&gt;lock);</div><div class='add'>+		if (!single_port)</div><div class='add'>+			spin_unlock(&amp;tx_chn-&gt;lock);</div><div class='add'>+</div><div class='ctx'> 		if (res == -ENODATA)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -1393,27 +1488,43 @@ static int am65_cpsw_nuss_tx_compl_packets(struct am65_cpsw_common *common,</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn-&gt;desc_pool,</div><div class='add'>+						     desc_dma);</div><div class='add'>+		swdata = cppi5_hdesc_get_swdata(desc_tx);</div><div class='add'>+		ndev = swdata-&gt;ndev;</div><div class='ctx'> 		buf_type = am65_cpsw_nuss_buf_type(tx_chn, desc_dma);</div><div class='ctx'> 		if (buf_type == AM65_CPSW_TX_BUF_TYPE_SKB) {</div><div class='del'>-			skb = am65_cpsw_nuss_tx_compl_packet_skb(tx_chn, desc_dma);</div><div class='del'>-			ndev = skb-&gt;dev;</div><div class='del'>-			total_bytes = skb-&gt;len;</div><div class='add'>+			skb = swdata-&gt;skb;</div><div class='add'>+			am65_cpts_tx_timestamp(tx_chn-&gt;common-&gt;cpts, skb);</div><div class='add'>+			pkt_len = skb-&gt;len;</div><div class='ctx'> 			napi_consume_skb(skb, budget);</div><div class='ctx'> 		} else {</div><div class='del'>-			xdpf = am65_cpsw_nuss_tx_compl_packet_xdp(common, tx_chn,</div><div class='del'>-								  desc_dma, &amp;ndev);</div><div class='del'>-			total_bytes = xdpf-&gt;len;</div><div class='add'>+			xdpf = swdata-&gt;xdpf;</div><div class='add'>+			pkt_len = xdpf-&gt;len;</div><div class='ctx'> 			if (buf_type == AM65_CPSW_TX_BUF_TYPE_XDP_TX)</div><div class='ctx'> 				xdp_return_frame_rx_napi(xdpf);</div><div class='ctx'> 			else</div><div class='ctx'> 				xdp_return_frame(xdpf);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		total_bytes += pkt_len;</div><div class='ctx'> 		num_tx++;</div><div class='add'>+		am65_cpsw_nuss_xmit_free(tx_chn, desc_tx);</div><div class='add'>+		dev_sw_netstats_tx_add(ndev, 1, pkt_len);</div><div class='add'>+		if (!single_port) {</div><div class='add'>+			/* as packets from multi ports can be interleaved</div><div class='add'>+			 * on the same channel, we have to figure out the</div><div class='add'>+			 * port/queue at every packet and report it/wake queue.</div><div class='add'>+			 */</div><div class='add'>+			netif_txq = netdev_get_tx_queue(ndev, chn);</div><div class='add'>+			netdev_tx_completed_queue(netif_txq, 1, pkt_len);</div><div class='add'>+			am65_cpsw_nuss_tx_wake(tx_chn, ndev, netif_txq);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	if (single_port &amp;&amp; num_tx) {</div><div class='ctx'> 		netif_txq = netdev_get_tx_queue(ndev, chn);</div><div class='del'>-</div><div class='ctx'> 		netdev_tx_completed_queue(netif_txq, num_tx, total_bytes);</div><div class='del'>-</div><div class='ctx'> 		am65_cpsw_nuss_tx_wake(tx_chn, ndev, netif_txq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1422,66 +1533,6 @@ static int am65_cpsw_nuss_tx_compl_packets(struct am65_cpsw_common *common,</div><div class='ctx'> 	return num_tx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int am65_cpsw_nuss_tx_compl_packets_2g(struct am65_cpsw_common *common,</div><div class='del'>-					      int chn, unsigned int budget, bool *tdown)</div><div class='del'>-{</div><div class='del'>-	enum am65_cpsw_tx_buf_type buf_type;</div><div class='del'>-	struct device *dev = common-&gt;dev;</div><div class='del'>-	struct am65_cpsw_tx_chn *tx_chn;</div><div class='del'>-	struct netdev_queue *netif_txq;</div><div class='del'>-	unsigned int total_bytes = 0;</div><div class='del'>-	struct net_device *ndev;</div><div class='del'>-	struct xdp_frame *xdpf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	dma_addr_t desc_dma;</div><div class='del'>-	int res, num_tx = 0;</div><div class='del'>-</div><div class='del'>-	tx_chn = &amp;common-&gt;tx_chns[chn];</div><div class='del'>-</div><div class='del'>-	while (true) {</div><div class='del'>-		res = k3_udma_glue_pop_tx_chn(tx_chn-&gt;tx_chn, &amp;desc_dma);</div><div class='del'>-		if (res == -ENODATA)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if (cppi5_desc_is_tdcm(desc_dma)) {</div><div class='del'>-			if (atomic_dec_and_test(&amp;common-&gt;tdown_cnt))</div><div class='del'>-				complete(&amp;common-&gt;tdown_complete);</div><div class='del'>-			*tdown = true;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		buf_type = am65_cpsw_nuss_buf_type(tx_chn, desc_dma);</div><div class='del'>-		if (buf_type == AM65_CPSW_TX_BUF_TYPE_SKB) {</div><div class='del'>-			skb = am65_cpsw_nuss_tx_compl_packet_skb(tx_chn, desc_dma);</div><div class='del'>-			ndev = skb-&gt;dev;</div><div class='del'>-			total_bytes += skb-&gt;len;</div><div class='del'>-			napi_consume_skb(skb, budget);</div><div class='del'>-		} else {</div><div class='del'>-			xdpf = am65_cpsw_nuss_tx_compl_packet_xdp(common, tx_chn,</div><div class='del'>-								  desc_dma, &amp;ndev);</div><div class='del'>-			total_bytes += xdpf-&gt;len;</div><div class='del'>-			if (buf_type == AM65_CPSW_TX_BUF_TYPE_XDP_TX)</div><div class='del'>-				xdp_return_frame_rx_napi(xdpf);</div><div class='del'>-			else</div><div class='del'>-				xdp_return_frame(xdpf);</div><div class='del'>-		}</div><div class='del'>-		num_tx++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!num_tx)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	netif_txq = netdev_get_tx_queue(ndev, chn);</div><div class='del'>-</div><div class='del'>-	netdev_tx_completed_queue(netif_txq, num_tx, total_bytes);</div><div class='del'>-</div><div class='del'>-	am65_cpsw_nuss_tx_wake(tx_chn, ndev, netif_txq);</div><div class='del'>-</div><div class='del'>-	dev_dbg(dev, "%s:%u pkt:%d\n", __func__, chn, num_tx);</div><div class='del'>-</div><div class='del'>-	return num_tx;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static enum hrtimer_restart am65_cpsw_nuss_tx_timer_callback(struct hrtimer *timer)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_tx_chn *tx_chns =</div><div class='hunk'>@@ -1497,13 +1548,8 @@ static int am65_cpsw_nuss_tx_poll(struct napi_struct *napi_tx, int budget)</div><div class='ctx'> 	bool tdown = false;</div><div class='ctx'> 	int num_tx;</div><div class='ctx'> </div><div class='del'>-	if (AM65_CPSW_IS_CPSW2G(tx_chn-&gt;common))</div><div class='del'>-		num_tx = am65_cpsw_nuss_tx_compl_packets_2g(tx_chn-&gt;common, tx_chn-&gt;id,</div><div class='del'>-							    budget, &amp;tdown);</div><div class='del'>-	else</div><div class='del'>-		num_tx = am65_cpsw_nuss_tx_compl_packets(tx_chn-&gt;common,</div><div class='del'>-							 tx_chn-&gt;id, budget, &amp;tdown);</div><div class='del'>-</div><div class='add'>+	num_tx = am65_cpsw_nuss_tx_compl_packets(tx_chn-&gt;common,</div><div class='add'>+						 tx_chn-&gt;id, budget, &amp;tdown);</div><div class='ctx'> 	if (num_tx &gt;= budget)</div><div class='ctx'> 		return budget;</div><div class='ctx'> </div><div class='hunk'>@@ -1547,12 +1593,12 @@ static netdev_tx_t am65_cpsw_nuss_ndo_slave_xmit(struct sk_buff *skb,</div><div class='ctx'> 	struct am65_cpsw_common *common = am65_ndev_to_common(ndev);</div><div class='ctx'> 	struct cppi5_host_desc_t *first_desc, *next_desc, *cur_desc;</div><div class='ctx'> 	struct am65_cpsw_port *port = am65_ndev_to_port(ndev);</div><div class='add'>+	struct am65_cpsw_tx_swdata *swdata;</div><div class='ctx'> 	struct device *dev = common-&gt;dev;</div><div class='ctx'> 	struct am65_cpsw_tx_chn *tx_chn;</div><div class='ctx'> 	struct netdev_queue *netif_txq;</div><div class='ctx'> 	dma_addr_t desc_dma, buf_dma;</div><div class='ctx'> 	int ret, q_idx, i;</div><div class='del'>-	void **swdata;</div><div class='ctx'> 	u32 *psdata;</div><div class='ctx'> 	u32 pkt_len;</div><div class='ctx'> </div><div class='hunk'>@@ -1598,7 +1644,8 @@ static netdev_tx_t am65_cpsw_nuss_ndo_slave_xmit(struct sk_buff *skb,</div><div class='ctx'> 	k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn-&gt;tx_chn, &amp;buf_dma);</div><div class='ctx'> 	cppi5_hdesc_attach_buf(first_desc, buf_dma, pkt_len, buf_dma, pkt_len);</div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(first_desc);</div><div class='del'>-	*(swdata) = skb;</div><div class='add'>+	swdata-&gt;ndev = ndev;</div><div class='add'>+	swdata-&gt;skb = skb;</div><div class='ctx'> 	psdata = cppi5_hdesc_get_psdata(first_desc);</div><div class='ctx'> </div><div class='ctx'> 	/* HW csum offload if enabled */</div><div class='hunk'>@@ -1741,31 +1788,34 @@ static int am65_cpsw_nuss_ndo_slave_set_mac_address(struct net_device *ndev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int am65_cpsw_nuss_hwtstamp_set(struct net_device *ndev,</div><div class='del'>-				       struct ifreq *ifr)</div><div class='add'>+				       struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_port *port = am65_ndev_to_port(ndev);</div><div class='ctx'> 	u32 ts_ctrl, seq_id, ts_ctrl_ltype2, ts_vlan_ltype;</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='ctx'> </div><div class='del'>-	if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))</div><div class='add'>+	if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS)) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "Time stamping is not supported");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* TX HW timestamp */</div><div class='del'>-	switch (cfg.tx_type) {</div><div class='add'>+	switch (cfg-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='add'>+		NL_SET_ERR_MSG(extack, "TX mode is not supported");</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (cfg.rx_filter) {</div><div class='add'>+	switch (cfg-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		port-&gt;rx_ts_enabled = false;</div><div class='ctx'> 		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='hunk'>@@ -1776,17 +1826,19 @@ static int am65_cpsw_nuss_hwtstamp_set(struct net_device *ndev,</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 		port-&gt;rx_ts_enabled = true;</div><div class='del'>-		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		cfg-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT | HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_ALL:</div><div class='ctx'> 	case HWTSTAMP_FILTER_SOME:</div><div class='ctx'> 	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='add'>+		NL_SET_ERR_MSG(extack, "RX filter is not supported");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	default:</div><div class='add'>+		NL_SET_ERR_MSG(extack, "RX filter is not supported");</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	port-&gt;tx_ts_enabled = (cfg.tx_type == HWTSTAMP_TX_ON);</div><div class='add'>+	port-&gt;tx_ts_enabled = (cfg-&gt;tx_type == HWTSTAMP_TX_ON);</div><div class='ctx'> </div><div class='ctx'> 	/* cfg TX timestamp */</div><div class='ctx'> 	seq_id = (AM65_CPSW_TS_SEQ_ID_OFFSET &lt;&lt;</div><div class='hunk'>@@ -1822,25 +1874,24 @@ static int am65_cpsw_nuss_hwtstamp_set(struct net_device *ndev,</div><div class='ctx'> 	       AM65_CPSW_PORTN_REG_TS_CTL_LTYPE2);</div><div class='ctx'> 	writel(ts_ctrl, port-&gt;port_base + AM65_CPSW_PORTN_REG_TS_CTL);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int am65_cpsw_nuss_hwtstamp_get(struct net_device *ndev,</div><div class='del'>-				       struct ifreq *ifr)</div><div class='add'>+				       struct kernel_hwtstamp_config *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_port *port = am65_ndev_to_port(ndev);</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_TI_K3_AM65_CPTS))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	cfg.flags = 0;</div><div class='del'>-	cfg.tx_type = port-&gt;tx_ts_enabled ?</div><div class='add'>+	cfg-&gt;flags = 0;</div><div class='add'>+	cfg-&gt;tx_type = port-&gt;tx_ts_enabled ?</div><div class='ctx'> 		      HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='del'>-	cfg.rx_filter = port-&gt;rx_ts_enabled ?</div><div class='del'>-			HWTSTAMP_FILTER_PTP_V2_EVENT : HWTSTAMP_FILTER_NONE;</div><div class='add'>+	cfg-&gt;rx_filter = port-&gt;rx_ts_enabled ? HWTSTAMP_FILTER_PTP_V2_EVENT |</div><div class='add'>+			HWTSTAMP_FILTER_PTP_V1_L4_EVENT : HWTSTAMP_FILTER_NONE;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int am65_cpsw_nuss_ndo_slave_ioctl(struct net_device *ndev,</div><div class='hunk'>@@ -1851,13 +1902,6 @@ static int am65_cpsw_nuss_ndo_slave_ioctl(struct net_device *ndev,</div><div class='ctx'> 	if (!netif_running(ndev))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return am65_cpsw_nuss_hwtstamp_set(ndev, req);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return am65_cpsw_nuss_hwtstamp_get(ndev, req);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return phylink_mii_ioctl(port-&gt;slave.phylink, req, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1941,6 +1985,8 @@ static const struct net_device_ops am65_cpsw_nuss_netdev_ops = {</div><div class='ctx'> 	.ndo_set_tx_maxrate	= am65_cpsw_qos_ndo_tx_p0_set_maxrate,</div><div class='ctx'> 	.ndo_bpf		= am65_cpsw_ndo_bpf,</div><div class='ctx'> 	.ndo_xdp_xmit		= am65_cpsw_ndo_xdp_xmit,</div><div class='add'>+	.ndo_hwtstamp_get       = am65_cpsw_nuss_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set       = am65_cpsw_nuss_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void am65_cpsw_disable_phy(struct phy *phy)</div><div class='hunk'>@@ -2152,13 +2198,11 @@ static void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common)</div><div class='ctx'> 	struct device *dev = common-&gt;dev;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	devm_remove_action(dev, am65_cpsw_nuss_free_tx_chns, common);</div><div class='del'>-</div><div class='ctx'> 	common-&gt;tx_ch_rate_msk = 0;</div><div class='ctx'> 	for (i = 0; i &lt; common-&gt;tx_ch_num; i++) {</div><div class='ctx'> 		struct am65_cpsw_tx_chn *tx_chn = &amp;common-&gt;tx_chns[i];</div><div class='ctx'> </div><div class='del'>-		if (tx_chn-&gt;irq)</div><div class='add'>+		if (tx_chn-&gt;irq &gt; 0)</div><div class='ctx'> 			devm_free_irq(dev, tx_chn-&gt;irq, tx_chn);</div><div class='ctx'> </div><div class='ctx'> 		netif_napi_del(&amp;tx_chn-&gt;napi_tx);</div><div class='hunk'>@@ -2170,15 +2214,17 @@ static void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common)</div><div class='ctx'> static int am65_cpsw_nuss_ndev_add_tx_napi(struct am65_cpsw_common *common)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = common-&gt;dev;</div><div class='add'>+	struct am65_cpsw_tx_chn *tx_chn;</div><div class='ctx'> 	int i, ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; common-&gt;tx_ch_num; i++) {</div><div class='del'>-		struct am65_cpsw_tx_chn *tx_chn = &amp;common-&gt;tx_chns[i];</div><div class='add'>+		tx_chn = &amp;common-&gt;tx_chns[i];</div><div class='add'>+</div><div class='add'>+		hrtimer_setup(&amp;tx_chn-&gt;tx_hrtimer, &amp;am65_cpsw_nuss_tx_timer_callback,</div><div class='add'>+			      CLOCK_MONOTONIC, HRTIMER_MODE_REL_PINNED);</div><div class='ctx'> </div><div class='ctx'> 		netif_napi_add_tx(common-&gt;dma_ndev, &amp;tx_chn-&gt;napi_tx,</div><div class='ctx'> 				  am65_cpsw_nuss_tx_poll);</div><div class='del'>-		hrtimer_init(&amp;tx_chn-&gt;tx_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_PINNED);</div><div class='del'>-		tx_chn-&gt;tx_hrtimer.function = &amp;am65_cpsw_nuss_tx_timer_callback;</div><div class='ctx'> </div><div class='ctx'> 		ret = devm_request_irq(dev, tx_chn-&gt;irq,</div><div class='ctx'> 				       am65_cpsw_nuss_tx_irq,</div><div class='hunk'>@@ -2191,7 +2237,16 @@ static int am65_cpsw_nuss_ndev_add_tx_napi(struct am65_cpsw_common *common)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='ctx'> err:</div><div class='add'>+	netif_napi_del(&amp;tx_chn-&gt;napi_tx);</div><div class='add'>+	for (--i; i &gt;= 0; i--) {</div><div class='add'>+		tx_chn = &amp;common-&gt;tx_chns[i];</div><div class='add'>+		devm_free_irq(dev, tx_chn-&gt;irq, tx_chn);</div><div class='add'>+		netif_napi_del(&amp;tx_chn-&gt;napi_tx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2272,12 +2327,10 @@ static int am65_cpsw_nuss_init_tx_chns(struct am65_cpsw_common *common)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='ctx'> err:</div><div class='del'>-	i = devm_add_action(dev, am65_cpsw_nuss_free_tx_chns, common);</div><div class='del'>-	if (i) {</div><div class='del'>-		dev_err(dev, "Failed to add free_tx_chns action %d\n", i);</div><div class='del'>-		return i;</div><div class='del'>-	}</div><div class='add'>+	am65_cpsw_nuss_free_tx_chns(common);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2305,7 +2358,6 @@ static void am65_cpsw_nuss_remove_rx_chns(struct am65_cpsw_common *common)</div><div class='ctx'> </div><div class='ctx'> 	rx_chn = &amp;common-&gt;rx_chns;</div><div class='ctx'> 	flows = rx_chn-&gt;flows;</div><div class='del'>-	devm_remove_action(dev, am65_cpsw_nuss_free_rx_chns, common);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; common-&gt;rx_ch_num_flows; i++) {</div><div class='ctx'> 		if (!(flows[i].irq &lt; 0))</div><div class='hunk'>@@ -2343,10 +2395,6 @@ static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common)</div><div class='ctx'> 	for (i = 0; i &lt; common-&gt;rx_ch_num_flows; i++) {</div><div class='ctx'> 		flow = &amp;rx_chn-&gt;flows[i];</div><div class='ctx'> 		flow-&gt;page_pool = NULL;</div><div class='del'>-		flow-&gt;pages = devm_kcalloc(dev, AM65_CPSW_MAX_RX_DESC,</div><div class='del'>-					   sizeof(*flow-&gt;pages), GFP_KERNEL);</div><div class='del'>-		if (!flow-&gt;pages)</div><div class='del'>-			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rx_chn-&gt;rx_chn = k3_udma_glue_request_rx_chn(dev, "rx", &amp;rx_cfg);</div><div class='hunk'>@@ -2396,17 +2444,19 @@ static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common)</div><div class='ctx'> 		flow = &amp;rx_chn-&gt;flows[i];</div><div class='ctx'> 		flow-&gt;id = i;</div><div class='ctx'> 		flow-&gt;common = common;</div><div class='add'>+		flow-&gt;irq = -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		rx_flow_cfg.ring_rxfdq0_id = fdqring_id;</div><div class='ctx'> 		rx_flow_cfg.rx_cfg.size = max_desc_num;</div><div class='del'>-		rx_flow_cfg.rxfdq_cfg.size = max_desc_num;</div><div class='add'>+		/* share same FDQ for all flows */</div><div class='add'>+		rx_flow_cfg.rxfdq_cfg.size = max_desc_num * rx_cfg.flow_id_num;</div><div class='ctx'> 		rx_flow_cfg.rxfdq_cfg.mode = common-&gt;pdata.fdqring_mode;</div><div class='ctx'> </div><div class='ctx'> 		ret = k3_udma_glue_rx_flow_init(rx_chn-&gt;rx_chn,</div><div class='ctx'> 						i, &amp;rx_flow_cfg);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(dev, "Failed to init rx flow%d %d\n", i, ret);</div><div class='del'>-			goto err;</div><div class='add'>+			goto err_flow;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!i)</div><div class='ctx'> 			fdqring_id =</div><div class='hunk'>@@ -2418,17 +2468,17 @@ static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common)</div><div class='ctx'> 			dev_err(dev, "Failed to get rx dma irq %d\n",</div><div class='ctx'> 				flow-&gt;irq);</div><div class='ctx'> 			ret = flow-&gt;irq;</div><div class='del'>-			goto err;</div><div class='add'>+			goto err_flow;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		snprintf(flow-&gt;name,</div><div class='ctx'> 			 sizeof(flow-&gt;name), "%s-rx%d",</div><div class='ctx'> 			 dev_name(dev), i);</div><div class='add'>+		hrtimer_setup(&amp;flow-&gt;rx_hrtimer, &amp;am65_cpsw_nuss_rx_timer_callback, CLOCK_MONOTONIC,</div><div class='add'>+			      HRTIMER_MODE_REL_PINNED);</div><div class='add'>+</div><div class='ctx'> 		netif_napi_add(common-&gt;dma_ndev, &amp;flow-&gt;napi_rx,</div><div class='ctx'> 			       am65_cpsw_nuss_rx_poll);</div><div class='del'>-		hrtimer_init(&amp;flow-&gt;rx_hrtimer, CLOCK_MONOTONIC,</div><div class='del'>-			     HRTIMER_MODE_REL_PINNED);</div><div class='del'>-		flow-&gt;rx_hrtimer.function = &amp;am65_cpsw_nuss_rx_timer_callback;</div><div class='ctx'> </div><div class='ctx'> 		ret = devm_request_irq(dev, flow-&gt;irq,</div><div class='ctx'> 				       am65_cpsw_nuss_rx_irq,</div><div class='hunk'>@@ -2437,20 +2487,29 @@ static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common)</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(dev, "failure requesting rx %d irq %u, %d\n",</div><div class='ctx'> 				i, flow-&gt;irq, ret);</div><div class='del'>-			goto err;</div><div class='add'>+			flow-&gt;irq = -EINVAL;</div><div class='add'>+			goto err_request_irq;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* setup classifier to route priorities to flows */</div><div class='ctx'> 	cpsw_ale_classifier_setup_default(common-&gt;ale, common-&gt;rx_ch_num_flows);</div><div class='ctx'> </div><div class='del'>-err:</div><div class='del'>-	i = devm_add_action(dev, am65_cpsw_nuss_free_rx_chns, common);</div><div class='del'>-	if (i) {</div><div class='del'>-		dev_err(dev, "Failed to add free_rx_chns action %d\n", i);</div><div class='del'>-		return i;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_request_irq:</div><div class='add'>+	netif_napi_del(&amp;flow-&gt;napi_rx);</div><div class='add'>+</div><div class='add'>+err_flow:</div><div class='add'>+	for (--i; i &gt;= 0; i--) {</div><div class='add'>+		flow = &amp;rx_chn-&gt;flows[i];</div><div class='add'>+		devm_free_irq(dev, flow-&gt;irq, flow);</div><div class='add'>+		netif_napi_del(&amp;flow-&gt;napi_rx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+err:</div><div class='add'>+	am65_cpsw_nuss_free_rx_chns(common);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2470,20 +2529,15 @@ static int am65_cpsw_am654_get_efuse_macid(struct device_node *of_node,</div><div class='ctx'> {</div><div class='ctx'> 	u32 mac_lo, mac_hi, offset;</div><div class='ctx'> 	struct regmap *syscon;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	syscon = syscon_regmap_lookup_by_phandle(of_node, "ti,syscon-efuse");</div><div class='add'>+	syscon = syscon_regmap_lookup_by_phandle_args(of_node, "ti,syscon-efuse",</div><div class='add'>+						      1, &amp;offset);</div><div class='ctx'> 	if (IS_ERR(syscon)) {</div><div class='ctx'> 		if (PTR_ERR(syscon) == -ENODEV)</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		return PTR_ERR(syscon);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = of_property_read_u32_index(of_node, "ti,syscon-efuse", 1,</div><div class='del'>-					 &amp;offset);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	regmap_read(syscon, offset, &amp;mac_lo);</div><div class='ctx'> 	regmap_read(syscon, offset + 4, &amp;mac_hi);</div><div class='ctx'> </div><div class='hunk'>@@ -2545,6 +2599,7 @@ static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='ctx'> 	for_each_child_of_node(node, port_np) {</div><div class='add'>+		phy_interface_t phy_if;</div><div class='ctx'> 		struct am65_cpsw_port *port;</div><div class='ctx'> 		u32 port_id;</div><div class='ctx'> </div><div class='hunk'>@@ -2609,26 +2664,50 @@ static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common)</div><div class='ctx'> 				of_property_read_bool(port_np, "ti,mac-only");</div><div class='ctx'> </div><div class='ctx'> 		/* get phy/link info */</div><div class='del'>-		port-&gt;slave.port_np = port_np;</div><div class='del'>-		ret = of_get_phy_mode(port_np, &amp;port-&gt;slave.phy_if);</div><div class='add'>+		port-&gt;slave.port_np = of_node_get(port_np);</div><div class='add'>+		ret = of_get_phy_mode(port_np, &amp;phy_if);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(dev, "%pOF read phy-mode err %d\n",</div><div class='ctx'> 				port_np, ret);</div><div class='ctx'> 			goto of_node_put;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ret = phy_set_mode_ext(port-&gt;slave.ifphy, PHY_MODE_ETHERNET, port-&gt;slave.phy_if);</div><div class='add'>+		/* CPSW controllers supported by this driver have a fixed</div><div class='add'>+		 * internal TX delay in RGMII mode. Fix up PHY mode to account</div><div class='add'>+		 * for this and warn about Device Trees that claim to have a TX</div><div class='add'>+		 * delay on the PCB.</div><div class='add'>+		 */</div><div class='add'>+		switch (phy_if) {</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+			phy_if = PHY_INTERFACE_MODE_RGMII_RXID;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+			phy_if = PHY_INTERFACE_MODE_RGMII;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+			dev_warn(dev,</div><div class='add'>+				 "RGMII mode without internal TX delay unsupported; please fix your Device Tree\n");</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		port-&gt;slave.phy_if = phy_if;</div><div class='add'>+		ret = phy_set_mode_ext(port-&gt;slave.ifphy, PHY_MODE_ETHERNET, phy_if);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto of_node_put;</div><div class='ctx'> </div><div class='ctx'> 		ret = of_get_mac_address(port_np, port-&gt;slave.mac_addr);</div><div class='del'>-		if (ret) {</div><div class='add'>+		if (ret == -EPROBE_DEFER) {</div><div class='add'>+			goto of_node_put;</div><div class='add'>+		} else if (ret) {</div><div class='ctx'> 			am65_cpsw_am654_get_efuse_macid(port_np,</div><div class='ctx'> 							port-&gt;port_id,</div><div class='ctx'> 							port-&gt;slave.mac_addr);</div><div class='ctx'> 			if (!is_valid_ether_addr(port-&gt;slave.mac_addr)) {</div><div class='ctx'> 				eth_random_addr(port-&gt;slave.mac_addr);</div><div class='del'>-				dev_err(dev, "Use random MAC address\n");</div><div class='add'>+				dev_info(dev, "Use random MAC address\n");</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2663,6 +2742,17 @@ static void am65_cpsw_nuss_phylink_cleanup(struct am65_cpsw_common *common)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void am65_cpsw_remove_dt(struct am65_cpsw_common *common)</div><div class='add'>+{</div><div class='add'>+	struct am65_cpsw_port *port;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; common-&gt;port_num; i++) {</div><div class='add'>+		port = &amp;common-&gt;ports[i];</div><div class='add'>+		of_node_put(port-&gt;slave.port_np);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx)</div><div class='ctx'> {</div><div class='hunk'>@@ -2692,7 +2782,7 @@ am65_cpsw_nuss_init_port_ndev(struct am65_cpsw_common *common, u32 port_idx)</div><div class='ctx'> 	mutex_init(&amp;ndev_priv-&gt;mm_lock);</div><div class='ctx'> 	port-&gt;qos.link_speed = SPEED_UNKNOWN;</div><div class='ctx'> 	SET_NETDEV_DEV(port-&gt;ndev, dev);</div><div class='del'>-	port-&gt;ndev-&gt;dev.of_node = port-&gt;slave.port_np;</div><div class='add'>+	device_set_node(&amp;port-&gt;ndev-&gt;dev, of_fwnode_handle(port-&gt;slave.port_np));</div><div class='ctx'> </div><div class='ctx'> 	eth_hw_addr_set(port-&gt;ndev, port-&gt;slave.mac_addr);</div><div class='ctx'> </div><div class='hunk'>@@ -2978,7 +3068,8 @@ static void am65_cpsw_init_host_port_emac(struct am65_cpsw_common *common)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int am65_cpsw_dl_switch_mode_get(struct devlink *dl, u32 id,</div><div class='del'>-					struct devlink_param_gset_ctx *ctx)</div><div class='add'>+					struct devlink_param_gset_ctx *ctx,</div><div class='add'>+					struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpsw_devlink *dl_priv = devlink_priv(dl);</div><div class='ctx'> 	struct am65_cpsw_common *common = dl_priv-&gt;common;</div><div class='hunk'>@@ -3260,7 +3351,7 @@ static int am65_cpsw_nuss_register_ndevs(struct am65_cpsw_common *common)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	ret = am65_cpsw_nuss_init_rx_chns(common);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto err_remove_tx;</div><div class='ctx'> </div><div class='ctx'> 	/* The DMA Channels are not guaranteed to be in a clean state.</div><div class='ctx'> 	 * Reset and disable them to ensure that they are back to the</div><div class='hunk'>@@ -3274,14 +3365,14 @@ static int am65_cpsw_nuss_register_ndevs(struct am65_cpsw_common *common)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; common-&gt;rx_ch_num_flows; i++)</div><div class='ctx'> 		k3_udma_glue_reset_rx_chn(rx_chan-&gt;rx_chn, i,</div><div class='del'>-					  &amp;rx_chan-&gt;flows[i],</div><div class='del'>-					  am65_cpsw_nuss_rx_cleanup, 0);</div><div class='add'>+					  rx_chan,</div><div class='add'>+					  am65_cpsw_nuss_rx_cleanup);</div><div class='ctx'> </div><div class='ctx'> 	k3_udma_glue_disable_rx_chn(rx_chan-&gt;rx_chn);</div><div class='ctx'> </div><div class='ctx'> 	ret = am65_cpsw_nuss_register_devlink(common);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto err_remove_rx;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; common-&gt;port_num; i++) {</div><div class='ctx'> 		port = &amp;common-&gt;ports[i];</div><div class='hunk'>@@ -3312,6 +3403,10 @@ static int am65_cpsw_nuss_register_ndevs(struct am65_cpsw_common *common)</div><div class='ctx'> err_cleanup_ndev:</div><div class='ctx'> 	am65_cpsw_nuss_cleanup_ndev(common);</div><div class='ctx'> 	am65_cpsw_unregister_devlink(common);</div><div class='add'>+err_remove_rx:</div><div class='add'>+	am65_cpsw_nuss_remove_rx_chns(common);</div><div class='add'>+err_remove_tx:</div><div class='add'>+	am65_cpsw_nuss_remove_tx_chns(common);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -3331,6 +3426,8 @@ int am65_cpsw_nuss_update_tx_rx_chns(struct am65_cpsw_common *common,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = am65_cpsw_nuss_init_rx_chns(common);</div><div class='add'>+	if (ret)</div><div class='add'>+		am65_cpsw_nuss_remove_tx_chns(common);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -3429,6 +3526,10 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev)</div><div class='ctx'> 	__be64 id_temp;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='add'>+	BUILD_BUG_ON_MSG(sizeof(struct am65_cpsw_tx_swdata) &gt; AM65_CPSW_NAV_SW_DATA_SIZE,</div><div class='add'>+			 "TX SW_DATA size exceeds AM65_CPSW_NAV_SW_DATA_SIZE");</div><div class='add'>+	BUILD_BUG_ON_MSG(sizeof(struct am65_cpsw_swdata) &gt; AM65_CPSW_NAV_SW_DATA_SIZE,</div><div class='add'>+			 "SW_DATA size exceeds AM65_CPSW_NAV_SW_DATA_SIZE");</div><div class='ctx'> 	common = devm_kzalloc(dev, sizeof(struct am65_cpsw_common), GFP_KERNEL);</div><div class='ctx'> 	if (!common)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -3462,7 +3563,7 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev)</div><div class='ctx'> 	init_completion(&amp;common-&gt;tdown_complete);</div><div class='ctx'> 	common-&gt;tx_ch_num = AM65_CPSW_DEFAULT_TX_CHNS;</div><div class='ctx'> 	common-&gt;rx_ch_num_flows = AM65_CPSW_DEFAULT_RX_CHN_FLOWS;</div><div class='del'>-	common-&gt;pf_p0_rx_ptype_rrobin = false;</div><div class='add'>+	common-&gt;pf_p0_rx_ptype_rrobin = true;</div><div class='ctx'> 	common-&gt;default_vlan = 1;</div><div class='ctx'> </div><div class='ctx'> 	common-&gt;ports = devm_kcalloc(dev, common-&gt;port_num,</div><div class='hunk'>@@ -3483,6 +3584,16 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	am65_cpsw_nuss_get_ver(common);</div><div class='add'>+</div><div class='add'>+	ret = am65_cpsw_nuss_init_host_p(common);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_pm_clear;</div><div class='add'>+</div><div class='add'>+	ret = am65_cpsw_nuss_init_slave_ports(common);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_pm_clear;</div><div class='add'>+</div><div class='ctx'> 	node = of_get_child_by_name(dev-&gt;of_node, "mdio");</div><div class='ctx'> 	if (!node) {</div><div class='ctx'> 		dev_warn(dev, "MDIO node not found\n");</div><div class='hunk'>@@ -3499,16 +3610,6 @@ static int am65_cpsw_nuss_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> 	of_node_put(node);</div><div class='ctx'> </div><div class='del'>-	am65_cpsw_nuss_get_ver(common);</div><div class='del'>-</div><div class='del'>-	ret = am65_cpsw_nuss_init_host_p(common);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_of_clear;</div><div class='del'>-</div><div class='del'>-	ret = am65_cpsw_nuss_init_slave_ports(common);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_of_clear;</div><div class='del'>-</div><div class='ctx'> 	/* init common data */</div><div class='ctx'> 	ale_params.dev = dev;</div><div class='ctx'> 	ale_params.ale_ageout = AM65_CPSW_ALE_AGEOUT_DEFAULT;</div><div class='hunk'>@@ -3555,6 +3656,7 @@ err_ndevs_clear:</div><div class='ctx'> 	am65_cpsw_nuss_cleanup_ndev(common);</div><div class='ctx'> 	am65_cpsw_nuss_phylink_cleanup(common);</div><div class='ctx'> 	am65_cpts_release(common-&gt;cpts);</div><div class='add'>+	am65_cpsw_remove_dt(common);</div><div class='ctx'> err_of_clear:</div><div class='ctx'> 	if (common-&gt;mdio_dev)</div><div class='ctx'> 		of_platform_device_destroy(common-&gt;mdio_dev, NULL);</div><div class='hunk'>@@ -3589,9 +3691,12 @@ static void am65_cpsw_nuss_remove(struct platform_device *pdev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	am65_cpsw_nuss_cleanup_ndev(common);</div><div class='ctx'> 	am65_cpsw_unregister_devlink(common);</div><div class='add'>+	am65_cpsw_nuss_remove_rx_chns(common);</div><div class='add'>+	am65_cpsw_nuss_remove_tx_chns(common);</div><div class='ctx'> 	am65_cpsw_nuss_phylink_cleanup(common);</div><div class='ctx'> 	am65_cpts_release(common-&gt;cpts);</div><div class='ctx'> 	am65_cpsw_disable_serdes_phy(common);</div><div class='add'>+	am65_cpsw_remove_dt(common);</div><div class='ctx'> </div><div class='ctx'> 	if (common-&gt;mdio_dev)</div><div class='ctx'> 		of_platform_device_destroy(common-&gt;mdio_dev, NULL);</div><div class='hunk'>@@ -3650,8 +3755,10 @@ static int am65_cpsw_nuss_resume(struct device *dev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	ret = am65_cpsw_nuss_init_rx_chns(common);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		am65_cpsw_nuss_remove_tx_chns(common);</div><div class='ctx'> 		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* If RX IRQ was disabled before suspend, keep it disabled */</div><div class='ctx'> 	for (i = 0; i &lt; common-&gt;rx_ch_num_flows; i++) {</div><div class='head'>diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.h b/drivers/net/ethernet/ti/am65-cpsw-nuss.h<br/>index 3f3e353dfe88..917c37e4e89b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/am65-cpsw-nuss.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/am65-cpsw-nuss.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/am65-cpsw-nuss.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/am65-cpsw-nuss.h</a></div><div class='hunk'>@@ -101,10 +101,22 @@ struct am65_cpsw_rx_flow {</div><div class='ctx'> 	struct hrtimer rx_hrtimer;</div><div class='ctx'> 	unsigned long rx_pace_timeout;</div><div class='ctx'> 	struct page_pool *page_pool;</div><div class='del'>-	struct page **pages;</div><div class='ctx'> 	char name[32];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct am65_cpsw_tx_swdata {</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	union {</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+		struct xdp_frame *xdpf;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct am65_cpsw_swdata {</div><div class='add'>+	u32 flow_id;</div><div class='add'>+	struct page *page;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct am65_cpsw_rx_chn {</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct device *dma_dev;</div><div class='head'>diff --git a/drivers/net/ethernet/ti/am65-cpsw-qos.c b/drivers/net/ethernet/ti/am65-cpsw-qos.c<br/>index fa96db7c1a13..66e8b224827b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/am65-cpsw-qos.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/am65-cpsw-qos.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/am65-cpsw-qos.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/am65-cpsw-qos.c</a></div><div class='hunk'>@@ -276,9 +276,31 @@ static int am65_cpsw_iet_set_verify_timeout_count(struct am65_cpsw_port *port)</div><div class='ctx'> 	/* The number of wireside clocks contained in the verify</div><div class='ctx'> 	 * timeout counter. The default is 0x1312d0</div><div class='ctx'> 	 * (10ms at 125Mhz in 1G mode).</div><div class='add'>+	 * The frequency of the clock depends on the link speed</div><div class='add'>+	 * and the PHY interface.</div><div class='ctx'> 	 */</div><div class='del'>-	val = 125 * HZ_PER_MHZ;	/* assuming 125MHz wireside clock */</div><div class='add'>+	switch (port-&gt;slave.phy_if) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		if (port-&gt;qos.link_speed == SPEED_1000)</div><div class='add'>+			val = 125 * HZ_PER_MHZ;	/* 125 MHz at 1000Mbps*/</div><div class='add'>+		else if (port-&gt;qos.link_speed == SPEED_100)</div><div class='add'>+			val = 25 * HZ_PER_MHZ;	/* 25 MHz at 100Mbps*/</div><div class='add'>+		else</div><div class='add'>+			val = (25 * HZ_PER_MHZ) / 10;	/* 2.5 MHz at 10Mbps*/</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_QSGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+		val = 125 * HZ_PER_MHZ;	/* 125 MHz */</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='add'>+	default:</div><div class='add'>+		netdev_err(port-&gt;ndev, "selected mode does not supported IET\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> 	val /= MILLIHZ_PER_HZ;		/* count per ms timeout */</div><div class='ctx'> 	val *= verify_time_ms;		/* count for timeout ms */</div><div class='ctx'> </div><div class='hunk'>@@ -295,20 +317,21 @@ static int am65_cpsw_iet_verify_wait(struct am65_cpsw_port *port)</div><div class='ctx'> 	u32 ctrl, status;</div><div class='ctx'> 	int try;</div><div class='ctx'> </div><div class='del'>-	try = 20;</div><div class='del'>-	do {</div><div class='del'>-		/* Reset the verify state machine by writing 1</div><div class='del'>-		 * to LINKFAIL</div><div class='del'>-		 */</div><div class='del'>-		ctrl = readl(port-&gt;port_base + AM65_CPSW_PN_REG_IET_CTRL);</div><div class='del'>-		ctrl |= AM65_CPSW_PN_IET_MAC_LINKFAIL;</div><div class='del'>-		writel(ctrl, port-&gt;port_base + AM65_CPSW_PN_REG_IET_CTRL);</div><div class='add'>+	try = 3;</div><div class='ctx'> </div><div class='del'>-		/* Clear MAC_LINKFAIL bit to start Verify. */</div><div class='del'>-		ctrl = readl(port-&gt;port_base + AM65_CPSW_PN_REG_IET_CTRL);</div><div class='del'>-		ctrl &amp;= ~AM65_CPSW_PN_IET_MAC_LINKFAIL;</div><div class='del'>-		writel(ctrl, port-&gt;port_base + AM65_CPSW_PN_REG_IET_CTRL);</div><div class='add'>+	/* Reset the verify state machine by writing 1</div><div class='add'>+	 * to LINKFAIL</div><div class='add'>+	 */</div><div class='add'>+	ctrl = readl(port-&gt;port_base + AM65_CPSW_PN_REG_IET_CTRL);</div><div class='add'>+	ctrl |= AM65_CPSW_PN_IET_MAC_LINKFAIL;</div><div class='add'>+	writel(ctrl, port-&gt;port_base + AM65_CPSW_PN_REG_IET_CTRL);</div><div class='ctx'> </div><div class='add'>+	/* Clear MAC_LINKFAIL bit to start Verify. */</div><div class='add'>+	ctrl = readl(port-&gt;port_base + AM65_CPSW_PN_REG_IET_CTRL);</div><div class='add'>+	ctrl &amp;= ~AM65_CPSW_PN_IET_MAC_LINKFAIL;</div><div class='add'>+	writel(ctrl, port-&gt;port_base + AM65_CPSW_PN_REG_IET_CTRL);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='ctx'> 		msleep(port-&gt;qos.iet.verify_time_ms);</div><div class='ctx'> </div><div class='ctx'> 		status = readl(port-&gt;port_base + AM65_CPSW_PN_REG_IET_STATUS);</div><div class='hunk'>@@ -330,7 +353,7 @@ static int am65_cpsw_iet_verify_wait(struct am65_cpsw_port *port)</div><div class='ctx'> 			netdev_dbg(port-&gt;ndev, "MAC Merge verify error\n");</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> 		}</div><div class='del'>-	} while (try-- &gt; 0);</div><div class='add'>+	} while (--try &gt; 0);</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(port-&gt;ndev, "MAC Merge verify timeout\n");</div><div class='ctx'> 	return -ETIMEDOUT;</div><div class='head'>diff --git a/drivers/net/ethernet/ti/am65-cpts.c b/drivers/net/ethernet/ti/am65-cpts.c<br/>index 59d6ab989c55..8ffbfaa3ab18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/am65-cpts.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/am65-cpts.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/am65-cpts.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/am65-cpts.c</a></div><div class='hunk'>@@ -163,7 +163,9 @@ struct am65_cpts {</div><div class='ctx'> 	struct device_node *clk_mux_np;</div><div class='ctx'> 	struct clk *refclk;</div><div class='ctx'> 	u32 refclk_freq;</div><div class='del'>-	struct list_head events;</div><div class='add'>+	/* separate lists to handle TX and RX timestamp independently */</div><div class='add'>+	struct list_head events_tx;</div><div class='add'>+	struct list_head events_rx;</div><div class='ctx'> 	struct list_head pool;</div><div class='ctx'> 	struct am65_cpts_event pool_data[AM65_CPTS_MAX_EVENTS];</div><div class='ctx'> 	spinlock_t lock; /* protects events lists*/</div><div class='hunk'>@@ -227,6 +229,24 @@ static void am65_cpts_disable(struct am65_cpts *cpts)</div><div class='ctx'> 	am65_cpts_write32(cpts, 0, int_enable);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int am65_cpts_purge_event_list(struct am65_cpts *cpts,</div><div class='add'>+				      struct list_head *events)</div><div class='add'>+{</div><div class='add'>+	struct list_head *this, *next;</div><div class='add'>+	struct am65_cpts_event *event;</div><div class='add'>+	int removed = 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_safe(this, next, events) {</div><div class='add'>+		event = list_entry(this, struct am65_cpts_event, list);</div><div class='add'>+		if (time_after(jiffies, event-&gt;tmo)) {</div><div class='add'>+			list_del_init(&amp;event-&gt;list);</div><div class='add'>+			list_add(&amp;event-&gt;list, &amp;cpts-&gt;pool);</div><div class='add'>+			++removed;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return removed;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int am65_cpts_event_get_port(struct am65_cpts_event *event)</div><div class='ctx'> {</div><div class='ctx'> 	return (event-&gt;event1 &amp; AM65_CPTS_EVENT_1_PORT_NUMBER_MASK) &gt;&gt;</div><div class='hunk'>@@ -239,20 +259,12 @@ static int am65_cpts_event_get_type(struct am65_cpts_event *event)</div><div class='ctx'> 		AM65_CPTS_EVENT_1_EVENT_TYPE_SHIFT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int am65_cpts_cpts_purge_events(struct am65_cpts *cpts)</div><div class='add'>+static int am65_cpts_purge_events(struct am65_cpts *cpts)</div><div class='ctx'> {</div><div class='del'>-	struct list_head *this, *next;</div><div class='del'>-	struct am65_cpts_event *event;</div><div class='ctx'> 	int removed = 0;</div><div class='ctx'> </div><div class='del'>-	list_for_each_safe(this, next, &amp;cpts-&gt;events) {</div><div class='del'>-		event = list_entry(this, struct am65_cpts_event, list);</div><div class='del'>-		if (time_after(jiffies, event-&gt;tmo)) {</div><div class='del'>-			list_del_init(&amp;event-&gt;list);</div><div class='del'>-			list_add(&amp;event-&gt;list, &amp;cpts-&gt;pool);</div><div class='del'>-			++removed;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	removed += am65_cpts_purge_event_list(cpts, &amp;cpts-&gt;events_tx);</div><div class='add'>+	removed += am65_cpts_purge_event_list(cpts, &amp;cpts-&gt;events_rx);</div><div class='ctx'> </div><div class='ctx'> 	if (removed)</div><div class='ctx'> 		dev_dbg(cpts-&gt;dev, "event pool cleaned up %d\n", removed);</div><div class='hunk'>@@ -287,7 +299,7 @@ static int __am65_cpts_fifo_read(struct am65_cpts *cpts)</div><div class='ctx'> 						 struct am65_cpts_event, list);</div><div class='ctx'> </div><div class='ctx'> 		if (!event) {</div><div class='del'>-			if (am65_cpts_cpts_purge_events(cpts)) {</div><div class='add'>+			if (am65_cpts_purge_events(cpts)) {</div><div class='ctx'> 				dev_err(cpts-&gt;dev, "cpts: event pool empty\n");</div><div class='ctx'> 				ret = -1;</div><div class='ctx'> 				goto out;</div><div class='hunk'>@@ -306,11 +318,21 @@ static int __am65_cpts_fifo_read(struct am65_cpts *cpts)</div><div class='ctx'> 				cpts-&gt;timestamp);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AM65_CPTS_EV_RX:</div><div class='add'>+			event-&gt;tmo = jiffies +</div><div class='add'>+				msecs_to_jiffies(AM65_CPTS_EVENT_RX_TX_TIMEOUT);</div><div class='add'>+</div><div class='add'>+			list_move_tail(&amp;event-&gt;list, &amp;cpts-&gt;events_rx);</div><div class='add'>+</div><div class='add'>+			dev_dbg(cpts-&gt;dev,</div><div class='add'>+				"AM65_CPTS_EV_RX e1:%08x e2:%08x t:%lld\n",</div><div class='add'>+				event-&gt;event1, event-&gt;event2,</div><div class='add'>+				event-&gt;timestamp);</div><div class='add'>+			break;</div><div class='ctx'> 		case AM65_CPTS_EV_TX:</div><div class='ctx'> 			event-&gt;tmo = jiffies +</div><div class='ctx'> 				msecs_to_jiffies(AM65_CPTS_EVENT_RX_TX_TIMEOUT);</div><div class='ctx'> </div><div class='del'>-			list_move_tail(&amp;event-&gt;list, &amp;cpts-&gt;events);</div><div class='add'>+			list_move_tail(&amp;event-&gt;list, &amp;cpts-&gt;events_tx);</div><div class='ctx'> </div><div class='ctx'> 			dev_dbg(cpts-&gt;dev,</div><div class='ctx'> 				"AM65_CPTS_EV_TX e1:%08x e2:%08x t:%lld\n",</div><div class='hunk'>@@ -828,7 +850,7 @@ static bool am65_cpts_match_tx_ts(struct am65_cpts *cpts,</div><div class='ctx'> 	return found;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void am65_cpts_find_ts(struct am65_cpts *cpts)</div><div class='add'>+static void am65_cpts_find_tx_ts(struct am65_cpts *cpts)</div><div class='ctx'> {</div><div class='ctx'> 	struct am65_cpts_event *event;</div><div class='ctx'> 	struct list_head *this, *next;</div><div class='hunk'>@@ -837,7 +859,7 @@ static void am65_cpts_find_ts(struct am65_cpts *cpts)</div><div class='ctx'> 	LIST_HEAD(events);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cpts-&gt;lock, flags);</div><div class='del'>-	list_splice_init(&amp;cpts-&gt;events, &amp;events);</div><div class='add'>+	list_splice_init(&amp;cpts-&gt;events_tx, &amp;events);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpts-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_safe(this, next, &amp;events) {</div><div class='hunk'>@@ -850,7 +872,7 @@ static void am65_cpts_find_ts(struct am65_cpts *cpts)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cpts-&gt;lock, flags);</div><div class='del'>-	list_splice_tail(&amp;events, &amp;cpts-&gt;events);</div><div class='add'>+	list_splice_tail(&amp;events, &amp;cpts-&gt;events_tx);</div><div class='ctx'> 	list_splice_tail(&amp;events_free, &amp;cpts-&gt;pool);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;cpts-&gt;lock, flags);</div><div class='ctx'> }</div><div class='hunk'>@@ -861,7 +883,7 @@ static long am65_cpts_ts_work(struct ptp_clock_info *ptp)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	long delay = -1;</div><div class='ctx'> </div><div class='del'>-	am65_cpts_find_ts(cpts);</div><div class='add'>+	am65_cpts_find_tx_ts(cpts);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cpts-&gt;txq.lock, flags);</div><div class='ctx'> 	if (!skb_queue_empty(&amp;cpts-&gt;txq))</div><div class='hunk'>@@ -905,7 +927,7 @@ static u64 am65_cpts_find_rx_ts(struct am65_cpts *cpts, u32 skb_mtype_seqid)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;cpts-&gt;lock, flags);</div><div class='ctx'> 	__am65_cpts_fifo_read(cpts);</div><div class='del'>-	list_for_each_safe(this, next, &amp;cpts-&gt;events) {</div><div class='add'>+	list_for_each_safe(this, next, &amp;cpts-&gt;events_rx) {</div><div class='ctx'> 		event = list_entry(this, struct am65_cpts_event, list);</div><div class='ctx'> 		if (time_after(jiffies, event-&gt;tmo)) {</div><div class='ctx'> 			list_move(&amp;event-&gt;list, &amp;cpts-&gt;pool);</div><div class='hunk'>@@ -1155,7 +1177,8 @@ struct am65_cpts *am65_cpts_create(struct device *dev, void __iomem *regs,</div><div class='ctx'> 		return ERR_PTR(ret);</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;cpts-&gt;ptp_clk_lock);</div><div class='del'>-	INIT_LIST_HEAD(&amp;cpts-&gt;events);</div><div class='add'>+	INIT_LIST_HEAD(&amp;cpts-&gt;events_tx);</div><div class='add'>+	INIT_LIST_HEAD(&amp;cpts-&gt;events_rx);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;cpts-&gt;pool);</div><div class='ctx'> 	spin_lock_init(&amp;cpts-&gt;lock);</div><div class='ctx'> 	skb_queue_head_init(&amp;cpts-&gt;txq);</div><div class='head'>diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c<br/>index 4ef8cf6ea135..54c24cd3d3be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/cpsw.c</a></div><div class='hunk'>@@ -351,6 +351,7 @@ static void cpsw_rx_handler(void *token, int len, int status)</div><div class='ctx'> 	int			ret = 0, port, ch = xmeta-&gt;ch;</div><div class='ctx'> 	int			headroom = CPSW_HEADROOM_NA;</div><div class='ctx'> 	struct net_device	*ndev = xmeta-&gt;ndev;</div><div class='add'>+	u32			metasize = 0;</div><div class='ctx'> 	struct cpsw_priv	*priv;</div><div class='ctx'> 	struct page_pool	*pool;</div><div class='ctx'> 	struct sk_buff		*skb;</div><div class='hunk'>@@ -400,7 +401,7 @@ static void cpsw_rx_handler(void *token, int len, int status)</div><div class='ctx'> 			size -= CPSW_RX_VLAN_ENCAP_HDR_SIZE;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		xdp_prepare_buff(&amp;xdp, pa, headroom, size, false);</div><div class='add'>+		xdp_prepare_buff(&amp;xdp, pa, headroom, size, true);</div><div class='ctx'> </div><div class='ctx'> 		port = priv-&gt;emac_port + cpsw-&gt;data.dual_emac;</div><div class='ctx'> 		ret = cpsw_run_xdp(priv, ch, &amp;xdp, page, port, &amp;len);</div><div class='hunk'>@@ -408,6 +409,7 @@ static void cpsw_rx_handler(void *token, int len, int status)</div><div class='ctx'> 			goto requeue;</div><div class='ctx'> </div><div class='ctx'> 		headroom = xdp.data - xdp.data_hard_start;</div><div class='add'>+		metasize = xdp.data - xdp.data_meta;</div><div class='ctx'> </div><div class='ctx'> 		/* XDP prog can modify vlan tag, so can't use encap header */</div><div class='ctx'> 		status &amp;= ~CPDMA_RX_VLAN_ENCAP;</div><div class='hunk'>@@ -423,6 +425,8 @@ static void cpsw_rx_handler(void *token, int len, int status)</div><div class='ctx'> </div><div class='ctx'> 	skb_reserve(skb, headroom);</div><div class='ctx'> 	skb_put(skb, len);</div><div class='add'>+	if (metasize)</div><div class='add'>+		skb_metadata_set(skb, metasize);</div><div class='ctx'> 	skb-&gt;dev = ndev;</div><div class='ctx'> 	if (status &amp; CPDMA_RX_VLAN_ENCAP)</div><div class='ctx'> 		cpsw_rx_vlan_encap(skb);</div><div class='hunk'>@@ -635,6 +639,8 @@ static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	slave-&gt;phy = phy;</div><div class='ctx'> </div><div class='add'>+	phy_disable_eee(slave-&gt;phy);</div><div class='add'>+</div><div class='ctx'> 	phy_attached_info(slave-&gt;phy);</div><div class='ctx'> </div><div class='ctx'> 	phy_start(slave-&gt;phy);</div><div class='hunk'>@@ -684,7 +690,7 @@ static void cpsw_init_host_port(struct cpsw_priv *priv)</div><div class='ctx'> 	soft_reset("cpsw", &amp;cpsw-&gt;regs-&gt;soft_reset);</div><div class='ctx'> 	cpsw_ale_start(cpsw-&gt;ale);</div><div class='ctx'> </div><div class='del'>-	/* switch to vlan unaware mode */</div><div class='add'>+	/* switch to vlan aware mode */</div><div class='ctx'> 	cpsw_ale_control_set(cpsw-&gt;ale, HOST_PORT_NUM, ALE_VLAN_AWARE,</div><div class='ctx'> 			     CPSW_ALE_VLAN_AWARE);</div><div class='ctx'> 	control_reg = readl(&amp;cpsw-&gt;regs-&gt;control);</div><div class='hunk'>@@ -1150,6 +1156,27 @@ static void cpsw_ndo_poll_controller(struct net_device *ndev)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/* We need a custom implementation of phy_do_ioctl_running() because in switch</div><div class='add'>+ * mode, dev-&gt;phydev may be different than the phy of the active_slave. We need</div><div class='add'>+ * to operate on the locally saved phy instead.</div><div class='add'>+ */</div><div class='add'>+static int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd)</div><div class='add'>+{</div><div class='add'>+	struct cpsw_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct cpsw_common *cpsw = priv-&gt;cpsw;</div><div class='add'>+	int slave_no = cpsw_slave_index(cpsw, priv);</div><div class='add'>+	struct phy_device *phy;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(dev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	phy = cpsw-&gt;slaves[slave_no].phy;</div><div class='add'>+	if (phy)</div><div class='add'>+		return phy_mii_ioctl(phy, req, cmd);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops cpsw_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= cpsw_ndo_open,</div><div class='ctx'> 	.ndo_stop		= cpsw_ndo_stop,</div><div class='hunk'>@@ -1168,6 +1195,8 @@ static const struct net_device_ops cpsw_netdev_ops = {</div><div class='ctx'> 	.ndo_setup_tc           = cpsw_ndo_setup_tc,</div><div class='ctx'> 	.ndo_bpf		= cpsw_ndo_bpf,</div><div class='ctx'> 	.ndo_xdp_xmit		= cpsw_ndo_xdp_xmit,</div><div class='add'>+	.ndo_hwtstamp_get	= cpsw_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= cpsw_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void cpsw_get_drvinfo(struct net_device *ndev,</div><div class='hunk'>@@ -1225,7 +1254,6 @@ static const struct ethtool_ops cpsw_ethtool_ops = {</div><div class='ctx'> 	.get_link_ksettings	= cpsw_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings	= cpsw_set_link_ksettings,</div><div class='ctx'> 	.get_eee	= cpsw_get_eee,</div><div class='del'>-	.set_eee	= cpsw_set_eee,</div><div class='ctx'> 	.nway_reset	= cpsw_nway_reset,</div><div class='ctx'> 	.get_ringparam = cpsw_get_ringparam,</div><div class='ctx'> 	.set_ringparam = cpsw_set_ringparam,</div><div class='hunk'>@@ -1641,6 +1669,9 @@ static int cpsw_probe(struct platform_device *pdev)</div><div class='ctx'> 	ndev-&gt;features |= NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX;</div><div class='ctx'> 	ndev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |</div><div class='ctx'> 			     NETDEV_XDP_ACT_NDO_XMIT;</div><div class='add'>+	/* Hijack PHY timestamping requests in order to block them */</div><div class='add'>+	if (!cpsw-&gt;data.dual_emac)</div><div class='add'>+		ndev-&gt;see_all_hwtstamp_requests = true;</div><div class='ctx'> </div><div class='ctx'> 	ndev-&gt;netdev_ops = &amp;cpsw_netdev_ops;</div><div class='ctx'> 	ndev-&gt;ethtool_ops = &amp;cpsw_ethtool_ops;</div><div class='head'>diff --git a/drivers/net/ethernet/ti/cpsw_ale.c b/drivers/net/ethernet/ti/cpsw_ale.c<br/>index d361caa80d05..fbe35af615a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw_ale.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw_ale.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw_ale.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/cpsw_ale.c</a></div><div class='hunk'>@@ -127,15 +127,15 @@ struct cpsw_ale_dev_id {</div><div class='ctx'> </div><div class='ctx'> static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)</div><div class='ctx'> {</div><div class='del'>-	int idx, idx2;</div><div class='add'>+	int idx, idx2, index;</div><div class='ctx'> 	u32 hi_val = 0;</div><div class='ctx'> </div><div class='ctx'> 	idx    = start / 32;</div><div class='ctx'> 	idx2 = (start + bits - 1) / 32;</div><div class='ctx'> 	/* Check if bits to be fetched exceed a word */</div><div class='ctx'> 	if (idx != idx2) {</div><div class='del'>-		idx2 = 2 - idx2; /* flip */</div><div class='del'>-		hi_val = ale_entry[idx2] &lt;&lt; ((idx2 * 32) - start);</div><div class='add'>+		index = 2 - idx2; /* flip */</div><div class='add'>+		hi_val = ale_entry[index] &lt;&lt; ((idx2 * 32) - start);</div><div class='ctx'> 	}</div><div class='ctx'> 	start -= idx * 32;</div><div class='ctx'> 	idx    = 2 - idx; /* flip */</div><div class='hunk'>@@ -145,16 +145,16 @@ static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)</div><div class='ctx'> static inline void cpsw_ale_set_field(u32 *ale_entry, u32 start, u32 bits,</div><div class='ctx'> 				      u32 value)</div><div class='ctx'> {</div><div class='del'>-	int idx, idx2;</div><div class='add'>+	int idx, idx2, index;</div><div class='ctx'> </div><div class='ctx'> 	value &amp;= BITMASK(bits);</div><div class='ctx'> 	idx = start / 32;</div><div class='ctx'> 	idx2 = (start + bits - 1) / 32;</div><div class='ctx'> 	/* Check if bits to be set exceed a word */</div><div class='ctx'> 	if (idx != idx2) {</div><div class='del'>-		idx2 = 2 - idx2; /* flip */</div><div class='del'>-		ale_entry[idx2] &amp;= ~(BITMASK(bits + start - (idx2 * 32)));</div><div class='del'>-		ale_entry[idx2] |= (value &gt;&gt; ((idx2 * 32) - start));</div><div class='add'>+		index = 2 - idx2; /* flip */</div><div class='add'>+		ale_entry[index] &amp;= ~(BITMASK(bits + start - (idx2 * 32)));</div><div class='add'>+		ale_entry[index] |= (value &gt;&gt; ((idx2 * 32) - start));</div><div class='ctx'> 	}</div><div class='ctx'> 	start -= idx * 32;</div><div class='ctx'> 	idx = 2 - idx; /* flip */</div><div class='hunk'>@@ -1231,7 +1231,7 @@ int cpsw_ale_rx_ratelimit_bc(struct cpsw_ale *ale, int port, unsigned int rateli</div><div class='ctx'> </div><div class='ctx'> static void cpsw_ale_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct cpsw_ale *ale = from_timer(ale, t, timer);</div><div class='add'>+	struct cpsw_ale *ale = timer_container_of(ale, t, timer);</div><div class='ctx'> </div><div class='ctx'> 	cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);</div><div class='ctx'> </div><div class='hunk'>@@ -1287,7 +1287,7 @@ static void cpsw_ale_aging_stop(struct cpsw_ale *ale)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ale-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;ale-&gt;timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void cpsw_ale_start(struct cpsw_ale *ale)</div><div class='hunk'>@@ -1704,26 +1704,34 @@ static void cpsw_ale_policer_reset(struct cpsw_ale *ale)</div><div class='ctx'> void cpsw_ale_classifier_setup_default(struct cpsw_ale *ale, int num_rx_ch)</div><div class='ctx'> {</div><div class='ctx'> 	int pri, idx;</div><div class='del'>-	/* IEEE802.1D-2004, Standard for Local and metropolitan area networks</div><div class='del'>-	 *    Table G-2 - Traffic type acronyms</div><div class='del'>-	 *    Table G-3 - Defining traffic types</div><div class='del'>-	 * User priority values 1 and 2 effectively communicate a lower</div><div class='del'>-	 * priority than 0. In the below table 0 is assigned to higher priority</div><div class='del'>-	 * thread than 1 and 2 wherever possible.</div><div class='del'>-	 * The below table maps which thread the user priority needs to be</div><div class='add'>+</div><div class='add'>+	/* Reference:</div><div class='add'>+	 * IEEE802.1Q-2014, Standard for Local and metropolitan area networks</div><div class='add'>+	 *    Table I-2 - Traffic type acronyms</div><div class='add'>+	 *    Table I-3 - Defining traffic types</div><div class='add'>+	 * Section I.4 Traffic types and priority values, states:</div><div class='add'>+	 * "0 is thus used both for default priority and for Best Effort, and</div><div class='add'>+	 *  Background is associated with a priority value of 1. This means</div><div class='add'>+	 * that the value 1 effectively communicates a lower priority than 0."</div><div class='add'>+	 *</div><div class='add'>+	 * In the table below, Priority Code Point (PCP) 0 is assigned</div><div class='add'>+	 * to a higher priority thread than PCP 1 wherever possible.</div><div class='add'>+	 * The table maps which thread the PCP traffic needs to be</div><div class='ctx'> 	 * sent to for a given number of threads (RX channels). Upper threads</div><div class='ctx'> 	 * have higher priority.</div><div class='ctx'> 	 * e.g. if number of threads is 8 then user priority 0 will map to</div><div class='del'>-	 * pri_thread_map[8-1][0] i.e. thread 2</div><div class='add'>+	 * pri_thread_map[8-1][0] i.e. thread 1</div><div class='ctx'> 	 */</div><div class='del'>-	int pri_thread_map[8][8] = {	{ 0, 0, 0, 0, 0, 0, 0, 0, },</div><div class='add'>+</div><div class='add'>+	int pri_thread_map[8][8] = {   /* BK,BE,EE,CA,VI,VO,IC,NC */</div><div class='add'>+					{ 0, 0, 0, 0, 0, 0, 0, 0, },</div><div class='ctx'> 					{ 0, 0, 0, 0, 1, 1, 1, 1, },</div><div class='ctx'> 					{ 0, 0, 0, 0, 1, 1, 2, 2, },</div><div class='del'>-					{ 1, 0, 0, 1, 2, 2, 3, 3, },</div><div class='del'>-					{ 1, 0, 0, 1, 2, 3, 4, 4, },</div><div class='del'>-					{ 1, 0, 0, 2, 3, 4, 5, 5, },</div><div class='del'>-					{ 1, 0, 0, 2, 3, 4, 5, 6, },</div><div class='del'>-					{ 2, 0, 1, 3, 4, 5, 6, 7, } };</div><div class='add'>+					{ 0, 0, 1, 1, 2, 2, 3, 3, },</div><div class='add'>+					{ 0, 0, 1, 1, 2, 2, 3, 4, },</div><div class='add'>+					{ 1, 0, 2, 2, 3, 3, 4, 5, },</div><div class='add'>+					{ 1, 0, 2, 3, 4, 4, 5, 6, },</div><div class='add'>+					{ 1, 0, 2, 3, 4, 5, 6, 7 } };</div><div class='ctx'> </div><div class='ctx'> 	cpsw_ale_policer_reset(ale);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/ti/cpsw_ethtool.c b/drivers/net/ethernet/ti/cpsw_ethtool.c<br/>index 21d55a180ef6..bdc4db0d169c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/cpsw_ethtool.c</a></div><div class='hunk'>@@ -434,18 +434,6 @@ int cpsw_get_eee(struct net_device *ndev, struct ethtool_keee *edata)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int cpsw_set_eee(struct net_device *ndev, struct ethtool_keee *edata)</div><div class='del'>-{</div><div class='del'>-	struct cpsw_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct cpsw_common *cpsw = priv-&gt;cpsw;</div><div class='del'>-	int slave_no = cpsw_slave_index(cpsw, priv);</div><div class='del'>-</div><div class='del'>-	if (cpsw-&gt;slaves[slave_no].phy)</div><div class='del'>-		return phy_ethtool_set_eee(cpsw-&gt;slaves[slave_no].phy, edata);</div><div class='del'>-	else</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int cpsw_nway_reset(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpsw_priv *priv = netdev_priv(ndev);</div><div class='head'>diff --git a/drivers/net/ethernet/ti/cpsw_new.c b/drivers/net/ethernet/ti/cpsw_new.c<br/>index a98bcc5eb566..ab88d4c02cbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw_new.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw_new.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw_new.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/cpsw_new.c</a></div><div class='hunk'>@@ -293,6 +293,7 @@ static void cpsw_rx_handler(void *token, int len, int status)</div><div class='ctx'> 	struct page_pool *pool;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct xdp_buff xdp;</div><div class='add'>+	u32 metasize = 0;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> </div><div class='hunk'>@@ -345,13 +346,14 @@ static void cpsw_rx_handler(void *token, int len, int status)</div><div class='ctx'> 			size -= CPSW_RX_VLAN_ENCAP_HDR_SIZE;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		xdp_prepare_buff(&amp;xdp, pa, headroom, size, false);</div><div class='add'>+		xdp_prepare_buff(&amp;xdp, pa, headroom, size, true);</div><div class='ctx'> </div><div class='ctx'> 		ret = cpsw_run_xdp(priv, ch, &amp;xdp, page, priv-&gt;emac_port, &amp;len);</div><div class='ctx'> 		if (ret != CPSW_XDP_PASS)</div><div class='ctx'> 			goto requeue;</div><div class='ctx'> </div><div class='ctx'> 		headroom = xdp.data - xdp.data_hard_start;</div><div class='add'>+		metasize = xdp.data - xdp.data_meta;</div><div class='ctx'> </div><div class='ctx'> 		/* XDP prog can modify vlan tag, so can't use encap header */</div><div class='ctx'> 		status &amp;= ~CPDMA_RX_VLAN_ENCAP;</div><div class='hunk'>@@ -368,6 +370,8 @@ static void cpsw_rx_handler(void *token, int len, int status)</div><div class='ctx'> 	skb-&gt;offload_fwd_mark = priv-&gt;offload_fwd_mark;</div><div class='ctx'> 	skb_reserve(skb, headroom);</div><div class='ctx'> 	skb_put(skb, len);</div><div class='add'>+	if (metasize)</div><div class='add'>+		skb_metadata_set(skb, metasize);</div><div class='ctx'> 	skb-&gt;dev = ndev;</div><div class='ctx'> 	if (status &amp; CPDMA_RX_VLAN_ENCAP)</div><div class='ctx'> 		cpsw_rx_vlan_encap(skb);</div><div class='hunk'>@@ -554,7 +558,7 @@ static void cpsw_init_host_port(struct cpsw_priv *priv)</div><div class='ctx'> 	soft_reset("cpsw", &amp;cpsw-&gt;regs-&gt;soft_reset);</div><div class='ctx'> 	cpsw_ale_start(cpsw-&gt;ale);</div><div class='ctx'> </div><div class='del'>-	/* switch to vlan unaware mode */</div><div class='add'>+	/* switch to vlan aware mode */</div><div class='ctx'> 	cpsw_ale_control_set(cpsw-&gt;ale, HOST_PORT_NUM, ALE_VLAN_AWARE,</div><div class='ctx'> 			     CPSW_ALE_VLAN_AWARE);</div><div class='ctx'> 	control_reg = readl(&amp;cpsw-&gt;regs-&gt;control);</div><div class='hunk'>@@ -778,6 +782,8 @@ static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	slave-&gt;phy = phy;</div><div class='ctx'> </div><div class='add'>+	phy_disable_eee(slave-&gt;phy);</div><div class='add'>+</div><div class='ctx'> 	phy_attached_info(slave-&gt;phy);</div><div class='ctx'> </div><div class='ctx'> 	phy_start(slave-&gt;phy);</div><div class='hunk'>@@ -1126,7 +1132,7 @@ static const struct net_device_ops cpsw_netdev_ops = {</div><div class='ctx'> 	.ndo_stop		= cpsw_ndo_stop,</div><div class='ctx'> 	.ndo_start_xmit		= cpsw_ndo_start_xmit,</div><div class='ctx'> 	.ndo_set_mac_address	= cpsw_ndo_set_mac_address,</div><div class='del'>-	.ndo_eth_ioctl		= cpsw_ndo_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= phy_do_ioctl_running,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_tx_timeout		= cpsw_ndo_tx_timeout,</div><div class='ctx'> 	.ndo_set_rx_mode	= cpsw_ndo_set_rx_mode,</div><div class='hunk'>@@ -1141,6 +1147,8 @@ static const struct net_device_ops cpsw_netdev_ops = {</div><div class='ctx'> 	.ndo_bpf		= cpsw_ndo_bpf,</div><div class='ctx'> 	.ndo_xdp_xmit		= cpsw_ndo_xdp_xmit,</div><div class='ctx'> 	.ndo_get_port_parent_id	= cpsw_get_port_parent_id,</div><div class='add'>+	.ndo_hwtstamp_get	= cpsw_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= cpsw_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void cpsw_get_drvinfo(struct net_device *ndev,</div><div class='hunk'>@@ -1209,7 +1217,6 @@ static const struct ethtool_ops cpsw_ethtool_ops = {</div><div class='ctx'> 	.get_link_ksettings	= cpsw_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings	= cpsw_set_link_ksettings,</div><div class='ctx'> 	.get_eee		= cpsw_get_eee,</div><div class='del'>-	.set_eee		= cpsw_set_eee,</div><div class='ctx'> 	.nway_reset		= cpsw_nway_reset,</div><div class='ctx'> 	.get_ringparam		= cpsw_get_ringparam,</div><div class='ctx'> 	.set_ringparam		= cpsw_set_ringparam,</div><div class='hunk'>@@ -1408,7 +1415,7 @@ static int cpsw_create_ports(struct cpsw_common *cpsw)</div><div class='ctx'> </div><div class='ctx'> 		ndev-&gt;features |= NETIF_F_HW_VLAN_CTAG_FILTER |</div><div class='ctx'> 				  NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_TC;</div><div class='del'>-		ndev-&gt;netns_local = true;</div><div class='add'>+		ndev-&gt;netns_immutable = true;</div><div class='ctx'> </div><div class='ctx'> 		ndev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC |</div><div class='ctx'> 				     NETDEV_XDP_ACT_REDIRECT |</div><div class='hunk'>@@ -1417,6 +1424,7 @@ static int cpsw_create_ports(struct cpsw_common *cpsw)</div><div class='ctx'> 		ndev-&gt;netdev_ops = &amp;cpsw_netdev_ops;</div><div class='ctx'> 		ndev-&gt;ethtool_ops = &amp;cpsw_ethtool_ops;</div><div class='ctx'> 		SET_NETDEV_DEV(ndev, dev);</div><div class='add'>+		ndev-&gt;dev.of_node = slave_data-&gt;slave_node;</div><div class='ctx'> </div><div class='ctx'> 		if (!napi_ndev) {</div><div class='ctx'> 			/* CPSW Host port CPDMA interface is shared between</div><div class='hunk'>@@ -1610,7 +1618,8 @@ static const struct devlink_ops cpsw_devlink_ops = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int cpsw_dl_switch_mode_get(struct devlink *dl, u32 id,</div><div class='del'>-				   struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				   struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpsw_devlink *dl_priv = devlink_priv(dl);</div><div class='ctx'> 	struct cpsw_common *cpsw = dl_priv-&gt;cpsw;</div><div class='hunk'>@@ -1745,7 +1754,8 @@ exit:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cpsw_dl_ale_ctrl_get(struct devlink *dl, u32 id,</div><div class='del'>-				struct devlink_param_gset_ctx *ctx)</div><div class='add'>+				struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpsw_devlink *dl_priv = devlink_priv(dl);</div><div class='ctx'> 	struct cpsw_common *cpsw = dl_priv-&gt;cpsw;</div><div class='head'>diff --git a/drivers/net/ethernet/ti/cpsw_priv.c b/drivers/net/ethernet/ti/cpsw_priv.c<br/>index 6fe4edabba44..bc4fdf17a99e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw_priv.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw_priv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw_priv.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/cpsw_priv.c</a></div><div class='hunk'>@@ -614,24 +614,29 @@ static void cpsw_hwtstamp_v2(struct cpsw_priv *priv)</div><div class='ctx'> 	writel_relaxed(ETH_P_8021Q, &amp;cpsw-&gt;regs-&gt;vlan_ltype);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+int cpsw_hwtstamp_set(struct net_device *dev,</div><div class='add'>+		      struct kernel_hwtstamp_config *cfg,</div><div class='add'>+		      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpsw_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct cpsw_common *cpsw = priv-&gt;cpsw;</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='add'>+</div><div class='add'>+	/* This will only execute if dev-&gt;see_all_hwtstamp_requests is set */</div><div class='add'>+	if (cfg-&gt;source != HWTSTAMP_SOURCE_NETDEV) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Switch mode only supports MAC timestamping");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (cpsw-&gt;version != CPSW_VERSION_1 &amp;&amp;</div><div class='ctx'> 	    cpsw-&gt;version != CPSW_VERSION_2 &amp;&amp;</div><div class='ctx'> 	    cpsw-&gt;version != CPSW_VERSION_3)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (cfg.tx_type != HWTSTAMP_TX_OFF &amp;&amp; cfg.tx_type != HWTSTAMP_TX_ON)</div><div class='add'>+	if (cfg-&gt;tx_type != HWTSTAMP_TX_OFF &amp;&amp; cfg-&gt;tx_type != HWTSTAMP_TX_ON)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='del'>-	switch (cfg.rx_filter) {</div><div class='add'>+	switch (cfg-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		priv-&gt;rx_ts_enabled = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -651,13 +656,13 @@ static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 		priv-&gt;rx_ts_enabled = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='del'>-		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		cfg-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;tx_ts_enabled = cfg.tx_type == HWTSTAMP_TX_ON;</div><div class='add'>+	priv-&gt;tx_ts_enabled = cfg-&gt;tx_type == HWTSTAMP_TX_ON;</div><div class='ctx'> </div><div class='ctx'> 	switch (cpsw-&gt;version) {</div><div class='ctx'> 	case CPSW_VERSION_1:</div><div class='hunk'>@@ -671,65 +676,40 @@ static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='ctx'> 		WARN_ON(1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+int cpsw_hwtstamp_get(struct net_device *dev,</div><div class='add'>+		      struct kernel_hwtstamp_config *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpsw_common *cpsw = ndev_to_cpsw(dev);</div><div class='ctx'> 	struct cpsw_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='ctx'> </div><div class='ctx'> 	if (cpsw-&gt;version != CPSW_VERSION_1 &amp;&amp;</div><div class='ctx'> 	    cpsw-&gt;version != CPSW_VERSION_2 &amp;&amp;</div><div class='ctx'> 	    cpsw-&gt;version != CPSW_VERSION_3)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	cfg.flags = 0;</div><div class='del'>-	cfg.tx_type = priv-&gt;tx_ts_enabled ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='del'>-	cfg.rx_filter = priv-&gt;rx_ts_enabled;</div><div class='add'>+	cfg-&gt;tx_type = priv-&gt;tx_ts_enabled ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='add'>+	cfg-&gt;rx_filter = priv-&gt;rx_ts_enabled;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+int cpsw_hwtstamp_get(struct net_device *dev,</div><div class='add'>+		      struct kernel_hwtstamp_config *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)</div><div class='add'>+int cpsw_hwtstamp_set(struct net_device *dev,</div><div class='add'>+		      struct kernel_hwtstamp_config *cfg,</div><div class='add'>+		      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> #endif /*CONFIG_TI_CPTS*/</div><div class='ctx'> </div><div class='del'>-int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct cpsw_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct cpsw_common *cpsw = priv-&gt;cpsw;</div><div class='del'>-	int slave_no = cpsw_slave_index(cpsw, priv);</div><div class='del'>-	struct phy_device *phy;</div><div class='del'>-</div><div class='del'>-	if (!netif_running(dev))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	phy = cpsw-&gt;slaves[slave_no].phy;</div><div class='del'>-</div><div class='del'>-	if (!phy_has_hwtstamp(phy)) {</div><div class='del'>-		switch (cmd) {</div><div class='del'>-		case SIOCSHWTSTAMP:</div><div class='del'>-			return cpsw_hwtstamp_set(dev, req);</div><div class='del'>-		case SIOCGHWTSTAMP:</div><div class='del'>-			return cpsw_hwtstamp_get(dev, req);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (phy)</div><div class='del'>-		return phy_mii_ioctl(phy, req, cmd);</div><div class='del'>-</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int cpsw_ndo_set_tx_maxrate(struct net_device *ndev, int queue, u32 rate)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpsw_priv *priv = netdev_priv(ndev);</div><div class='head'>diff --git a/drivers/net/ethernet/ti/cpsw_priv.h b/drivers/net/ethernet/ti/cpsw_priv.h<br/>index 1f448290b9f4..91add8925e23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw_priv.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpsw_priv.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpsw_priv.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/cpsw_priv.h</a></div><div class='hunk'>@@ -461,7 +461,6 @@ void soft_reset(const char *module, void __iomem *reg);</div><div class='ctx'> void cpsw_set_slave_mac(struct cpsw_slave *slave, struct cpsw_priv *priv);</div><div class='ctx'> void cpsw_ndo_tx_timeout(struct net_device *ndev, unsigned int txqueue);</div><div class='ctx'> int cpsw_need_resplit(struct cpsw_common *cpsw);</div><div class='del'>-int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd);</div><div class='ctx'> int cpsw_ndo_set_tx_maxrate(struct net_device *ndev, int queue, u32 rate);</div><div class='ctx'> int cpsw_ndo_setup_tc(struct net_device *ndev, enum tc_setup_type type,</div><div class='ctx'> 		      void *type_data);</div><div class='hunk'>@@ -469,6 +468,11 @@ bool cpsw_shp_is_off(struct cpsw_priv *priv);</div><div class='ctx'> void cpsw_cbs_resume(struct cpsw_slave *slave, struct cpsw_priv *priv);</div><div class='ctx'> void cpsw_mqprio_resume(struct cpsw_slave *slave, struct cpsw_priv *priv);</div><div class='ctx'> void cpsw_qos_clsflower_resume(struct cpsw_priv *priv);</div><div class='add'>+int cpsw_hwtstamp_get(struct net_device *dev,</div><div class='add'>+		      struct kernel_hwtstamp_config *cfg);</div><div class='add'>+int cpsw_hwtstamp_set(struct net_device *dev,</div><div class='add'>+		      struct kernel_hwtstamp_config *cfg,</div><div class='add'>+		      struct netlink_ext_ack *extack);</div><div class='ctx'> </div><div class='ctx'> /* ethtool */</div><div class='ctx'> u32 cpsw_get_msglevel(struct net_device *ndev);</div><div class='hunk'>@@ -497,7 +501,6 @@ int cpsw_get_link_ksettings(struct net_device *ndev,</div><div class='ctx'> int cpsw_set_link_ksettings(struct net_device *ndev,</div><div class='ctx'> 			    const struct ethtool_link_ksettings *ecmd);</div><div class='ctx'> int cpsw_get_eee(struct net_device *ndev, struct ethtool_keee *edata);</div><div class='del'>-int cpsw_set_eee(struct net_device *ndev, struct ethtool_keee *edata);</div><div class='ctx'> int cpsw_nway_reset(struct net_device *ndev);</div><div class='ctx'> void cpsw_get_ringparam(struct net_device *ndev,</div><div class='ctx'> 			struct ethtool_ringparam *ering,</div><div class='head'>diff --git a/drivers/net/ethernet/ti/cpts.c b/drivers/net/ethernet/ti/cpts.c<br/>index dbbea9146040..2ba4c8795d60 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpts.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/cpts.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/cpts.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/cpts.c</a></div><div class='hunk'>@@ -181,7 +181,7 @@ void cpts_misc_interrupt(struct cpts *cpts)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(cpts_misc_interrupt);</div><div class='ctx'> </div><div class='del'>-static u64 cpts_systim_read(const struct cyclecounter *cc)</div><div class='add'>+static u64 cpts_systim_read(struct cyclecounter *cc)</div><div class='ctx'> {</div><div class='ctx'> 	struct cpts *cpts = container_of(cc, struct cpts, cc);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c<br/>index 68507126be8e..48f85a3649b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/davinci_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/davinci_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/davinci_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/davinci_mdio.c</a></div><div class='hunk'>@@ -234,7 +234,6 @@ static int davinci_mdiobb_read_c22(struct mii_bus *bus, int phy, int reg)</div><div class='ctx'> </div><div class='ctx'> 	ret = mdiobb_read_c22(bus, phy, reg);</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(bus-&gt;parent);</div><div class='ctx'> 	pm_runtime_put_autosuspend(bus-&gt;parent);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -251,7 +250,6 @@ static int davinci_mdiobb_write_c22(struct mii_bus *bus, int phy, int reg,</div><div class='ctx'> </div><div class='ctx'> 	ret = mdiobb_write_c22(bus, phy, reg, val);</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(bus-&gt;parent);</div><div class='ctx'> 	pm_runtime_put_autosuspend(bus-&gt;parent);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -268,7 +266,6 @@ static int davinci_mdiobb_read_c45(struct mii_bus *bus, int phy, int devad,</div><div class='ctx'> </div><div class='ctx'> 	ret = mdiobb_read_c45(bus, phy, devad, reg);</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(bus-&gt;parent);</div><div class='ctx'> 	pm_runtime_put_autosuspend(bus-&gt;parent);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -285,7 +282,6 @@ static int davinci_mdiobb_write_c45(struct mii_bus *bus, int phy, int devad,</div><div class='ctx'> </div><div class='ctx'> 	ret = mdiobb_write_c45(bus, phy, devad, reg, val);</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(bus-&gt;parent);</div><div class='ctx'> 	pm_runtime_put_autosuspend(bus-&gt;parent);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -332,7 +328,6 @@ static int davinci_mdio_common_reset(struct davinci_mdio_data *data)</div><div class='ctx'> 	data-&gt;bus-&gt;phy_mask = phy_mask;</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='del'>-	pm_runtime_mark_last_busy(data-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(data-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -441,7 +436,6 @@ static int davinci_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(data-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(data-&gt;dev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -478,7 +472,6 @@ static int davinci_mdio_write(struct mii_bus *bus, int phy_id,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(data-&gt;dev);</div><div class='ctx'> 	pm_runtime_put_autosuspend(data-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -548,8 +541,8 @@ static int davinci_mdio_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct davinci_mdio_data *data;</div><div class='ctx'> 	struct resource *res;</div><div class='ctx'> 	struct phy_device *phy;</div><div class='del'>-	int ret, addr;</div><div class='ctx'> 	int autosuspend_delay_ms = -1;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);</div><div class='ctx'> 	if (!data)</div><div class='hunk'>@@ -652,14 +645,10 @@ static int davinci_mdio_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto bail_out;</div><div class='ctx'> </div><div class='ctx'> 	/* scan and dump the bus */</div><div class='del'>-	for (addr = 0; addr &lt; PHY_MAX_ADDR; addr++) {</div><div class='del'>-		phy = mdiobus_get_phy(data-&gt;bus, addr);</div><div class='del'>-		if (phy) {</div><div class='del'>-			dev_info(dev, "phy[%d]: device %s, driver %s\n",</div><div class='del'>-				 phy-&gt;mdio.addr, phydev_name(phy),</div><div class='del'>-				 phy-&gt;drv ? phy-&gt;drv-&gt;name : "unknown");</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	mdiobus_for_each_phy(data-&gt;bus, phy)</div><div class='add'>+		dev_info(dev, "phy[%d]: device %s, driver %s\n",</div><div class='add'>+			 phy-&gt;mdio.addr, phydev_name(phy),</div><div class='add'>+			 phy-&gt;drv ? phy-&gt;drv-&gt;name : "unknown");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssg/icss_iep.c b/drivers/net/ethernet/ti/icssg/icss_iep.c<br/>index 5d6d1cf78e93..ec085897edf0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icss_iep.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icss_iep.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icss_iep.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssg/icss_iep.c</a></div><div class='hunk'>@@ -215,6 +215,9 @@ static void icss_iep_enable_shadow_mode(struct icss_iep *iep)</div><div class='ctx'> 	for (cmp = IEP_MIN_CMP; cmp &lt; IEP_MAX_CMP; cmp++) {</div><div class='ctx'> 		regmap_update_bits(iep-&gt;map, ICSS_IEP_CMP_STAT_REG,</div><div class='ctx'> 				   IEP_CMP_STATUS(cmp), IEP_CMP_STATUS(cmp));</div><div class='add'>+</div><div class='add'>+		regmap_update_bits(iep-&gt;map, ICSS_IEP_CMP_CFG_REG,</div><div class='add'>+				   IEP_CMP_CFG_CMP_EN(cmp), 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* enable reset counter on CMP0 event */</div><div class='hunk'>@@ -403,66 +406,79 @@ static void icss_iep_update_to_next_boundary(struct icss_iep *iep, u64 start_ns)</div><div class='ctx'> static int icss_iep_perout_enable_hw(struct icss_iep *iep,</div><div class='ctx'> 				     struct ptp_perout_request *req, int on)</div><div class='ctx'> {</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+	u64 ns_start;</div><div class='add'>+	u64 ns_width;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u64 cmp;</div><div class='ctx'> </div><div class='add'>+	if (!on) {</div><div class='add'>+		/* Disable CMP 1 */</div><div class='add'>+		regmap_update_bits(iep-&gt;map, ICSS_IEP_CMP_CFG_REG,</div><div class='add'>+				   IEP_CMP_CFG_CMP_EN(1), 0);</div><div class='add'>+</div><div class='add'>+		/* clear CMP regs */</div><div class='add'>+		regmap_write(iep-&gt;map, ICSS_IEP_CMP1_REG0, 0);</div><div class='add'>+		if (iep-&gt;plat_data-&gt;flags &amp; ICSS_IEP_64BIT_COUNTER_SUPPORT)</div><div class='add'>+			regmap_write(iep-&gt;map, ICSS_IEP_CMP1_REG1, 0);</div><div class='add'>+</div><div class='add'>+		/* Disable sync */</div><div class='add'>+		regmap_write(iep-&gt;map, ICSS_IEP_SYNC_CTRL_REG, 0);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate width of the signal for PPS/PEROUT handling */</div><div class='add'>+	ts.tv_sec = req-&gt;on.sec;</div><div class='add'>+	ts.tv_nsec = req-&gt;on.nsec;</div><div class='add'>+	ns_width = timespec64_to_ns(&amp;ts);</div><div class='add'>+</div><div class='add'>+	if (req-&gt;flags &amp; PTP_PEROUT_PHASE) {</div><div class='add'>+		ts.tv_sec = req-&gt;phase.sec;</div><div class='add'>+		ts.tv_nsec = req-&gt;phase.nsec;</div><div class='add'>+		ns_start = timespec64_to_ns(&amp;ts);</div><div class='add'>+	} else {</div><div class='add'>+		ns_start = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (iep-&gt;ops &amp;&amp; iep-&gt;ops-&gt;perout_enable) {</div><div class='ctx'> 		ret = iep-&gt;ops-&gt;perout_enable(iep-&gt;clockops_data, req, on, &amp;cmp);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		if (on) {</div><div class='del'>-			/* Configure CMP */</div><div class='del'>-			regmap_write(iep-&gt;map, ICSS_IEP_CMP1_REG0, lower_32_bits(cmp));</div><div class='del'>-			if (iep-&gt;plat_data-&gt;flags &amp; ICSS_IEP_64BIT_COUNTER_SUPPORT)</div><div class='del'>-				regmap_write(iep-&gt;map, ICSS_IEP_CMP1_REG1, upper_32_bits(cmp));</div><div class='del'>-			/* Configure SYNC, 1ms pulse width */</div><div class='del'>-			regmap_write(iep-&gt;map, ICSS_IEP_SYNC_PWIDTH_REG, 1000000);</div><div class='del'>-			regmap_write(iep-&gt;map, ICSS_IEP_SYNC0_PERIOD_REG, 0);</div><div class='del'>-			regmap_write(iep-&gt;map, ICSS_IEP_SYNC_START_REG, 0);</div><div class='del'>-			regmap_write(iep-&gt;map, ICSS_IEP_SYNC_CTRL_REG, 0); /* one-shot mode */</div><div class='del'>-			/* Enable CMP 1 */</div><div class='del'>-			regmap_update_bits(iep-&gt;map, ICSS_IEP_CMP_CFG_REG,</div><div class='del'>-					   IEP_CMP_CFG_CMP_EN(1), IEP_CMP_CFG_CMP_EN(1));</div><div class='del'>-		} else {</div><div class='del'>-			/* Disable CMP 1 */</div><div class='del'>-			regmap_update_bits(iep-&gt;map, ICSS_IEP_CMP_CFG_REG,</div><div class='del'>-					   IEP_CMP_CFG_CMP_EN(1), 0);</div><div class='del'>-</div><div class='del'>-			/* clear regs */</div><div class='del'>-			regmap_write(iep-&gt;map, ICSS_IEP_CMP1_REG0, 0);</div><div class='del'>-			if (iep-&gt;plat_data-&gt;flags &amp; ICSS_IEP_64BIT_COUNTER_SUPPORT)</div><div class='del'>-				regmap_write(iep-&gt;map, ICSS_IEP_CMP1_REG1, 0);</div><div class='del'>-		}</div><div class='add'>+		/* Configure CMP */</div><div class='add'>+		regmap_write(iep-&gt;map, ICSS_IEP_CMP1_REG0, lower_32_bits(cmp));</div><div class='add'>+		if (iep-&gt;plat_data-&gt;flags &amp; ICSS_IEP_64BIT_COUNTER_SUPPORT)</div><div class='add'>+			regmap_write(iep-&gt;map, ICSS_IEP_CMP1_REG1, upper_32_bits(cmp));</div><div class='add'>+		/* Configure SYNC, based on req on width */</div><div class='add'>+		regmap_write(iep-&gt;map, ICSS_IEP_SYNC_PWIDTH_REG,</div><div class='add'>+			     div_u64(ns_width, iep-&gt;def_inc));</div><div class='add'>+		regmap_write(iep-&gt;map, ICSS_IEP_SYNC0_PERIOD_REG, 0);</div><div class='add'>+		regmap_write(iep-&gt;map, ICSS_IEP_SYNC_START_REG,</div><div class='add'>+			     div_u64(ns_start, iep-&gt;def_inc));</div><div class='add'>+		regmap_write(iep-&gt;map, ICSS_IEP_SYNC_CTRL_REG, 0); /* one-shot mode */</div><div class='add'>+		/* Enable CMP 1 */</div><div class='add'>+		regmap_update_bits(iep-&gt;map, ICSS_IEP_CMP_CFG_REG,</div><div class='add'>+				   IEP_CMP_CFG_CMP_EN(1), IEP_CMP_CFG_CMP_EN(1));</div><div class='ctx'> 	} else {</div><div class='del'>-		if (on) {</div><div class='del'>-			u64 start_ns;</div><div class='del'>-</div><div class='del'>-			iep-&gt;period = ((u64)req-&gt;period.sec * NSEC_PER_SEC) +</div><div class='del'>-				      req-&gt;period.nsec;</div><div class='del'>-			start_ns = ((u64)req-&gt;period.sec * NSEC_PER_SEC)</div><div class='del'>-				   + req-&gt;period.nsec;</div><div class='del'>-			icss_iep_update_to_next_boundary(iep, start_ns);</div><div class='del'>-</div><div class='del'>-			/* Enable Sync in single shot mode  */</div><div class='del'>-			regmap_write(iep-&gt;map, ICSS_IEP_SYNC_CTRL_REG,</div><div class='del'>-				     IEP_SYNC_CTRL_SYNC_N_EN(0) | IEP_SYNC_CTRL_SYNC_EN);</div><div class='del'>-			/* Enable CMP 1 */</div><div class='del'>-			regmap_update_bits(iep-&gt;map, ICSS_IEP_CMP_CFG_REG,</div><div class='del'>-					   IEP_CMP_CFG_CMP_EN(1), IEP_CMP_CFG_CMP_EN(1));</div><div class='del'>-		} else {</div><div class='del'>-			/* Disable CMP 1 */</div><div class='del'>-			regmap_update_bits(iep-&gt;map, ICSS_IEP_CMP_CFG_REG,</div><div class='del'>-					   IEP_CMP_CFG_CMP_EN(1), 0);</div><div class='del'>-</div><div class='del'>-			/* clear CMP regs */</div><div class='del'>-			regmap_write(iep-&gt;map, ICSS_IEP_CMP1_REG0, 0);</div><div class='del'>-			if (iep-&gt;plat_data-&gt;flags &amp; ICSS_IEP_64BIT_COUNTER_SUPPORT)</div><div class='del'>-				regmap_write(iep-&gt;map, ICSS_IEP_CMP1_REG1, 0);</div><div class='del'>-</div><div class='del'>-			/* Disable sync */</div><div class='del'>-			regmap_write(iep-&gt;map, ICSS_IEP_SYNC_CTRL_REG, 0);</div><div class='del'>-		}</div><div class='add'>+		u64 start_ns;</div><div class='add'>+</div><div class='add'>+		iep-&gt;period = ((u64)req-&gt;period.sec * NSEC_PER_SEC) +</div><div class='add'>+				req-&gt;period.nsec;</div><div class='add'>+		start_ns = ((u64)req-&gt;period.sec * NSEC_PER_SEC)</div><div class='add'>+				+ req-&gt;period.nsec;</div><div class='add'>+		icss_iep_update_to_next_boundary(iep, start_ns);</div><div class='add'>+</div><div class='add'>+		regmap_write(iep-&gt;map, ICSS_IEP_SYNC_PWIDTH_REG,</div><div class='add'>+			     div_u64(ns_width, iep-&gt;def_inc));</div><div class='add'>+		regmap_write(iep-&gt;map, ICSS_IEP_SYNC_START_REG,</div><div class='add'>+			     div_u64(ns_start, iep-&gt;def_inc));</div><div class='add'>+		/* Enable Sync in single shot mode  */</div><div class='add'>+		regmap_write(iep-&gt;map, ICSS_IEP_SYNC_CTRL_REG,</div><div class='add'>+			     IEP_SYNC_CTRL_SYNC_N_EN(0) | IEP_SYNC_CTRL_SYNC_EN);</div><div class='add'>+		/* Enable CMP 1 */</div><div class='add'>+		regmap_update_bits(iep-&gt;map, ICSS_IEP_CMP_CFG_REG,</div><div class='add'>+				   IEP_CMP_CFG_CMP_EN(1), IEP_CMP_CFG_CMP_EN(1));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -473,6 +489,21 @@ static int icss_iep_perout_enable(struct icss_iep *iep,</div><div class='ctx'> {</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='add'>+	if (!on)</div><div class='add'>+		goto disable;</div><div class='add'>+</div><div class='add'>+	/* Reject requests with unsupported flags */</div><div class='add'>+	if (req-&gt;flags &amp; ~(PTP_PEROUT_DUTY_CYCLE |</div><div class='add'>+			  PTP_PEROUT_PHASE))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Set default "on" time (1ms) for the signal if not passed by the app */</div><div class='add'>+	if (!(req-&gt;flags &amp; PTP_PEROUT_DUTY_CYCLE)) {</div><div class='add'>+		req-&gt;on.sec = 0;</div><div class='add'>+		req-&gt;on.nsec = NSEC_PER_MSEC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+disable:</div><div class='ctx'> 	mutex_lock(&amp;iep-&gt;ptp_clk_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (iep-&gt;pps_enabled) {</div><div class='hunk'>@@ -565,10 +596,13 @@ static int icss_iep_pps_enable(struct icss_iep *iep, int on)</div><div class='ctx'> 	if (on) {</div><div class='ctx'> 		ns = icss_iep_gettime(iep, NULL);</div><div class='ctx'> 		ts = ns_to_timespec64(ns);</div><div class='add'>+		rq.perout.flags = 0;</div><div class='ctx'> 		rq.perout.period.sec = 1;</div><div class='ctx'> 		rq.perout.period.nsec = 0;</div><div class='ctx'> 		rq.perout.start.sec = ts.tv_sec + 2;</div><div class='ctx'> 		rq.perout.start.nsec = 0;</div><div class='add'>+		rq.perout.on.sec = 0;</div><div class='add'>+		rq.perout.on.nsec = NSEC_PER_MSEC;</div><div class='ctx'> 		ret = icss_iep_perout_enable_hw(iep, &amp;rq.perout, on);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = icss_iep_perout_enable_hw(iep, &amp;rq.perout, on);</div><div class='hunk'>@@ -587,7 +621,8 @@ exit:</div><div class='ctx'> </div><div class='ctx'> static int icss_iep_extts_enable(struct icss_iep *iep, u32 index, int on)</div><div class='ctx'> {</div><div class='del'>-	u32 val, cap, ret = 0;</div><div class='add'>+	u32 val, cap;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;iep-&gt;ptp_clk_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -651,11 +686,17 @@ struct icss_iep *icss_iep_get_idx(struct device_node *np, int idx)</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	struct device_node *iep_np;</div><div class='ctx'> 	struct icss_iep *iep;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	iep_np = of_parse_phandle(np, "ti,iep", idx);</div><div class='del'>-	if (!iep_np || !of_device_is_available(iep_np))</div><div class='add'>+	if (!iep_np)</div><div class='ctx'> 		return ERR_PTR(-ENODEV);</div><div class='ctx'> </div><div class='add'>+	if (!of_device_is_available(iep_np)) {</div><div class='add'>+		of_node_put(iep_np);</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pdev = of_find_device_by_node(iep_np);</div><div class='ctx'> 	of_node_put(iep_np);</div><div class='ctx'> </div><div class='hunk'>@@ -664,21 +705,28 @@ struct icss_iep *icss_iep_get_idx(struct device_node *np, int idx)</div><div class='ctx'> 		return ERR_PTR(-EPROBE_DEFER);</div><div class='ctx'> </div><div class='ctx'> 	iep = platform_get_drvdata(pdev);</div><div class='del'>-	if (!iep)</div><div class='del'>-		return ERR_PTR(-EPROBE_DEFER);</div><div class='add'>+	if (!iep) {</div><div class='add'>+		ret = -EPROBE_DEFER;</div><div class='add'>+		goto err_put_pdev;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	device_lock(iep-&gt;dev);</div><div class='ctx'> 	if (iep-&gt;client_np) {</div><div class='ctx'> 		device_unlock(iep-&gt;dev);</div><div class='ctx'> 		dev_err(iep-&gt;dev, "IEP is already acquired by %s",</div><div class='ctx'> 			iep-&gt;client_np-&gt;name);</div><div class='del'>-		return ERR_PTR(-EBUSY);</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto err_put_pdev;</div><div class='ctx'> 	}</div><div class='ctx'> 	iep-&gt;client_np = np;</div><div class='ctx'> 	device_unlock(iep-&gt;dev);</div><div class='del'>-	get_device(iep-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return iep;</div><div class='add'>+</div><div class='add'>+err_put_pdev:</div><div class='add'>+	put_device(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(icss_iep_get_idx);</div><div class='ctx'> </div><div class='hunk'>@@ -780,6 +828,11 @@ int icss_iep_exit(struct icss_iep *iep)</div><div class='ctx'> 	}</div><div class='ctx'> 	icss_iep_disable(iep);</div><div class='ctx'> </div><div class='add'>+	if (iep-&gt;pps_enabled)</div><div class='add'>+		icss_iep_pps_enable(iep, false);</div><div class='add'>+	else if (iep-&gt;perout_enabled)</div><div class='add'>+		icss_iep_perout_enable(iep, NULL, false);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(icss_iep_exit);</div><div class='hunk'>@@ -929,11 +982,112 @@ static const struct icss_iep_plat_data am654_icss_iep_plat_data = {</div><div class='ctx'> 	.config = &amp;am654_icss_iep_regmap_config,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct icss_iep_plat_data am57xx_icss_iep_plat_data = {</div><div class='add'>+	.flags = ICSS_IEP_64BIT_COUNTER_SUPPORT |</div><div class='add'>+		 ICSS_IEP_SLOW_COMPEN_REG_SUPPORT,</div><div class='add'>+	.reg_offs = {</div><div class='add'>+		[ICSS_IEP_GLOBAL_CFG_REG] = 0x00,</div><div class='add'>+		[ICSS_IEP_COMPEN_REG] = 0x08,</div><div class='add'>+		[ICSS_IEP_SLOW_COMPEN_REG] = 0x0c,</div><div class='add'>+		[ICSS_IEP_COUNT_REG0] = 0x10,</div><div class='add'>+		[ICSS_IEP_COUNT_REG1] = 0x14,</div><div class='add'>+		[ICSS_IEP_CAPTURE_CFG_REG] = 0x18,</div><div class='add'>+		[ICSS_IEP_CAPTURE_STAT_REG] = 0x1c,</div><div class='add'>+</div><div class='add'>+		[ICSS_IEP_CAP6_RISE_REG0] = 0x50,</div><div class='add'>+		[ICSS_IEP_CAP6_RISE_REG1] = 0x54,</div><div class='add'>+</div><div class='add'>+		[ICSS_IEP_CAP7_RISE_REG0] = 0x60,</div><div class='add'>+		[ICSS_IEP_CAP7_RISE_REG1] = 0x64,</div><div class='add'>+</div><div class='add'>+		[ICSS_IEP_CMP_CFG_REG] = 0x70,</div><div class='add'>+		[ICSS_IEP_CMP_STAT_REG] = 0x74,</div><div class='add'>+		[ICSS_IEP_CMP0_REG0] = 0x78,</div><div class='add'>+		[ICSS_IEP_CMP0_REG1] = 0x7c,</div><div class='add'>+		[ICSS_IEP_CMP1_REG0] = 0x80,</div><div class='add'>+		[ICSS_IEP_CMP1_REG1] = 0x84,</div><div class='add'>+</div><div class='add'>+		[ICSS_IEP_CMP8_REG0] = 0xc0,</div><div class='add'>+		[ICSS_IEP_CMP8_REG1] = 0xc4,</div><div class='add'>+		[ICSS_IEP_SYNC_CTRL_REG] = 0x180,</div><div class='add'>+		[ICSS_IEP_SYNC0_STAT_REG] = 0x188,</div><div class='add'>+		[ICSS_IEP_SYNC1_STAT_REG] = 0x18c,</div><div class='add'>+		[ICSS_IEP_SYNC_PWIDTH_REG] = 0x190,</div><div class='add'>+		[ICSS_IEP_SYNC0_PERIOD_REG] = 0x194,</div><div class='add'>+		[ICSS_IEP_SYNC1_DELAY_REG] = 0x198,</div><div class='add'>+		[ICSS_IEP_SYNC_START_REG] = 0x19c,</div><div class='add'>+	},</div><div class='add'>+	.config = &amp;am654_icss_iep_regmap_config,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool am335x_icss_iep_valid_reg(struct device *dev, unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case ICSS_IEP_GLOBAL_CFG_REG ... ICSS_IEP_CAPTURE_STAT_REG:</div><div class='add'>+	case ICSS_IEP_CAP6_RISE_REG0:</div><div class='add'>+	case ICSS_IEP_CMP_CFG_REG ... ICSS_IEP_CMP0_REG0:</div><div class='add'>+	case ICSS_IEP_CMP8_REG0 ... ICSS_IEP_SYNC_START_REG:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_config am335x_icss_iep_regmap_config = {</div><div class='add'>+	.name = "icss iep",</div><div class='add'>+	.reg_stride = 1,</div><div class='add'>+	.reg_write = icss_iep_regmap_write,</div><div class='add'>+	.reg_read = icss_iep_regmap_read,</div><div class='add'>+	.writeable_reg = am335x_icss_iep_valid_reg,</div><div class='add'>+	.readable_reg = am335x_icss_iep_valid_reg,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct icss_iep_plat_data am335x_icss_iep_plat_data = {</div><div class='add'>+	.flags = 0,</div><div class='add'>+	.reg_offs = {</div><div class='add'>+		[ICSS_IEP_GLOBAL_CFG_REG] = 0x00,</div><div class='add'>+		[ICSS_IEP_COMPEN_REG] = 0x08,</div><div class='add'>+		[ICSS_IEP_COUNT_REG0] = 0x0c,</div><div class='add'>+		[ICSS_IEP_CAPTURE_CFG_REG] = 0x10,</div><div class='add'>+		[ICSS_IEP_CAPTURE_STAT_REG] = 0x14,</div><div class='add'>+</div><div class='add'>+		[ICSS_IEP_CAP6_RISE_REG0] = 0x30,</div><div class='add'>+</div><div class='add'>+		[ICSS_IEP_CAP7_RISE_REG0] = 0x38,</div><div class='add'>+</div><div class='add'>+		[ICSS_IEP_CMP_CFG_REG] = 0x40,</div><div class='add'>+		[ICSS_IEP_CMP_STAT_REG] = 0x44,</div><div class='add'>+		[ICSS_IEP_CMP0_REG0] = 0x48,</div><div class='add'>+</div><div class='add'>+		[ICSS_IEP_CMP8_REG0] = 0x88,</div><div class='add'>+		[ICSS_IEP_SYNC_CTRL_REG] = 0x100,</div><div class='add'>+		[ICSS_IEP_SYNC0_STAT_REG] = 0x108,</div><div class='add'>+		[ICSS_IEP_SYNC1_STAT_REG] = 0x10c,</div><div class='add'>+		[ICSS_IEP_SYNC_PWIDTH_REG] = 0x110,</div><div class='add'>+		[ICSS_IEP_SYNC0_PERIOD_REG] = 0x114,</div><div class='add'>+		[ICSS_IEP_SYNC1_DELAY_REG] = 0x118,</div><div class='add'>+		[ICSS_IEP_SYNC_START_REG] = 0x11c,</div><div class='add'>+	},</div><div class='add'>+	.config = &amp;am335x_icss_iep_regmap_config,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct of_device_id icss_iep_of_match[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.compatible = "ti,am654-icss-iep",</div><div class='ctx'> 		.data = &amp;am654_icss_iep_plat_data,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "ti,am5728-icss-iep",</div><div class='add'>+		.data = &amp;am57xx_icss_iep_plat_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "ti,am4376-icss-iep",</div><div class='add'>+		.data = &amp;am335x_icss_iep_plat_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "ti,am3356-icss-iep",</div><div class='add'>+		.data = &amp;am335x_icss_iep_plat_data,</div><div class='add'>+	},</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, icss_iep_of_match);</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssg/icssg_common.c b/drivers/net/ethernet/ti/icssg/icssg_common.c<br/>index fdebeb2f84e0..090aa74d3ce7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssg/icssg_common.c</a></div><div class='hunk'>@@ -45,6 +45,11 @@ void prueth_cleanup_rx_chns(struct prueth_emac *emac,</div><div class='ctx'> 			    struct prueth_rx_chn *rx_chn,</div><div class='ctx'> 			    int max_rflows)</div><div class='ctx'> {</div><div class='add'>+	if (rx_chn-&gt;pg_pool) {</div><div class='add'>+		page_pool_destroy(rx_chn-&gt;pg_pool);</div><div class='add'>+		rx_chn-&gt;pg_pool = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (rx_chn-&gt;desc_pool)</div><div class='ctx'> 		k3_cppi_desc_pool_destroy(rx_chn-&gt;desc_pool);</div><div class='ctx'> </div><div class='hunk'>@@ -88,15 +93,91 @@ void prueth_ndev_del_tx_napi(struct prueth_emac *emac, int num)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(prueth_ndev_del_tx_napi);</div><div class='ctx'> </div><div class='add'>+static int emac_xsk_xmit_zc(struct prueth_emac *emac,</div><div class='add'>+			    unsigned int q_idx)</div><div class='add'>+{</div><div class='add'>+	struct prueth_tx_chn *tx_chn = &amp;emac-&gt;tx_chns[q_idx];</div><div class='add'>+	struct xsk_buff_pool *pool = tx_chn-&gt;xsk_pool;</div><div class='add'>+	struct net_device *ndev = emac-&gt;ndev;</div><div class='add'>+	struct cppi5_host_desc_t *host_desc;</div><div class='add'>+	dma_addr_t dma_desc, dma_buf;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='add'>+	struct xdp_desc xdp_desc;</div><div class='add'>+	int num_tx = 0, pkt_len;</div><div class='add'>+	int descs_avail, ret;</div><div class='add'>+	u32 *epib;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	descs_avail = k3_cppi_desc_pool_avail(tx_chn-&gt;desc_pool);</div><div class='add'>+	/* ensure that TX ring is not filled up by XDP, always MAX_SKB_FRAGS</div><div class='add'>+	 * will be available for normal TX path and queue is stopped there if</div><div class='add'>+	 * necessary</div><div class='add'>+	 */</div><div class='add'>+	if (descs_avail &lt;= MAX_SKB_FRAGS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	descs_avail -= MAX_SKB_FRAGS;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; descs_avail; i++) {</div><div class='add'>+		if (!xsk_tx_peek_desc(pool, &amp;xdp_desc))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		dma_buf = xsk_buff_raw_get_dma(pool, xdp_desc.addr);</div><div class='add'>+		pkt_len = xdp_desc.len;</div><div class='add'>+		xsk_buff_raw_dma_sync_for_device(pool, dma_buf, pkt_len);</div><div class='add'>+</div><div class='add'>+		host_desc = k3_cppi_desc_pool_alloc(tx_chn-&gt;desc_pool);</div><div class='add'>+		if (unlikely(!host_desc))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		cppi5_hdesc_init(host_desc, CPPI5_INFO0_HDESC_EPIB_PRESENT,</div><div class='add'>+				 PRUETH_NAV_PS_DATA_SIZE);</div><div class='add'>+		cppi5_hdesc_set_pkttype(host_desc, 0);</div><div class='add'>+		epib = host_desc-&gt;epib;</div><div class='add'>+		epib[0] = 0;</div><div class='add'>+		epib[1] = 0;</div><div class='add'>+		cppi5_hdesc_set_pktlen(host_desc, pkt_len);</div><div class='add'>+		cppi5_desc_set_tags_ids(&amp;host_desc-&gt;hdr, 0,</div><div class='add'>+					(emac-&gt;port_id | (q_idx &lt;&lt; 8)));</div><div class='add'>+</div><div class='add'>+		k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn-&gt;tx_chn, &amp;dma_buf);</div><div class='add'>+		cppi5_hdesc_attach_buf(host_desc, dma_buf, pkt_len, dma_buf,</div><div class='add'>+				       pkt_len);</div><div class='add'>+</div><div class='add'>+		swdata = cppi5_hdesc_get_swdata(host_desc);</div><div class='add'>+		swdata-&gt;type = PRUETH_SWDATA_XSK;</div><div class='add'>+</div><div class='add'>+		dma_desc = k3_cppi_desc_pool_virt2dma(tx_chn-&gt;desc_pool,</div><div class='add'>+						      host_desc);</div><div class='add'>+		ret = k3_udma_glue_push_tx_chn(tx_chn-&gt;tx_chn,</div><div class='add'>+					       host_desc, dma_desc);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			ndev-&gt;stats.tx_errors++;</div><div class='add'>+			k3_cppi_desc_pool_free(tx_chn-&gt;desc_pool, host_desc);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		num_tx++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xsk_tx_release(tx_chn-&gt;xsk_pool);</div><div class='add'>+	return num_tx;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void prueth_xmit_free(struct prueth_tx_chn *tx_chn,</div><div class='ctx'> 		      struct cppi5_host_desc_t *desc)</div><div class='ctx'> {</div><div class='ctx'> 	struct cppi5_host_desc_t *first_desc, *next_desc;</div><div class='ctx'> 	dma_addr_t buf_dma, next_desc_dma;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='ctx'> 	u32 buf_dma_len;</div><div class='ctx'> </div><div class='ctx'> 	first_desc = desc;</div><div class='ctx'> 	next_desc = first_desc;</div><div class='add'>+	swdata = cppi5_hdesc_get_swdata(first_desc);</div><div class='add'>+	if (swdata-&gt;type == PRUETH_SWDATA_XSK)</div><div class='add'>+		goto free_pool;</div><div class='ctx'> </div><div class='ctx'> 	cppi5_hdesc_get_obuf(first_desc, &amp;buf_dma, &amp;buf_dma_len);</div><div class='ctx'> 	k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn-&gt;tx_chn, &amp;buf_dma);</div><div class='hunk'>@@ -121,6 +202,7 @@ void prueth_xmit_free(struct prueth_tx_chn *tx_chn,</div><div class='ctx'> 		k3_cppi_desc_pool_free(tx_chn-&gt;desc_pool, next_desc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+free_pool:</div><div class='ctx'> 	k3_cppi_desc_pool_free(tx_chn-&gt;desc_pool, first_desc);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(prueth_xmit_free);</div><div class='hunk'>@@ -131,12 +213,15 @@ int emac_tx_complete_packets(struct prueth_emac *emac, int chn,</div><div class='ctx'> 	struct net_device *ndev = emac-&gt;ndev;</div><div class='ctx'> 	struct cppi5_host_desc_t *desc_tx;</div><div class='ctx'> 	struct netdev_queue *netif_txq;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='ctx'> 	struct prueth_tx_chn *tx_chn;</div><div class='ctx'> 	unsigned int total_bytes = 0;</div><div class='add'>+	int xsk_frames_done = 0;</div><div class='add'>+	struct xdp_frame *xdpf;</div><div class='add'>+	unsigned int pkt_len;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	dma_addr_t desc_dma;</div><div class='ctx'> 	int res, num_tx = 0;</div><div class='del'>-	void **swdata;</div><div class='ctx'> </div><div class='ctx'> 	tx_chn = &amp;emac-&gt;tx_chns[chn];</div><div class='ctx'> </div><div class='hunk'>@@ -157,20 +242,31 @@ int emac_tx_complete_packets(struct prueth_emac *emac, int chn,</div><div class='ctx'> 						     desc_dma);</div><div class='ctx'> 		swdata = cppi5_hdesc_get_swdata(desc_tx);</div><div class='ctx'> </div><div class='del'>-		/* was this command's TX complete? */</div><div class='del'>-		if (emac-&gt;is_sr1 &amp;&amp; *(swdata) == emac-&gt;cmd_data) {</div><div class='add'>+		switch (swdata-&gt;type) {</div><div class='add'>+		case PRUETH_SWDATA_SKB:</div><div class='add'>+			skb = swdata-&gt;data.skb;</div><div class='add'>+			dev_sw_netstats_tx_add(skb-&gt;dev, 1, skb-&gt;len);</div><div class='add'>+			total_bytes += skb-&gt;len;</div><div class='add'>+			napi_consume_skb(skb, budget);</div><div class='add'>+			break;</div><div class='add'>+		case PRUETH_SWDATA_XDPF:</div><div class='add'>+			xdpf = swdata-&gt;data.xdpf;</div><div class='add'>+			dev_sw_netstats_tx_add(ndev, 1, xdpf-&gt;len);</div><div class='add'>+			total_bytes += xdpf-&gt;len;</div><div class='add'>+			xdp_return_frame(xdpf);</div><div class='add'>+			break;</div><div class='add'>+		case PRUETH_SWDATA_XSK:</div><div class='add'>+			pkt_len = cppi5_hdesc_get_pktlen(desc_tx);</div><div class='add'>+			dev_sw_netstats_tx_add(ndev, 1, pkt_len);</div><div class='add'>+			xsk_frames_done++;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='ctx'> 			prueth_xmit_free(tx_chn, desc_tx);</div><div class='add'>+			ndev-&gt;stats.tx_dropped++;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		skb = *(swdata);</div><div class='ctx'> 		prueth_xmit_free(tx_chn, desc_tx);</div><div class='del'>-</div><div class='del'>-		ndev = skb-&gt;dev;</div><div class='del'>-		ndev-&gt;stats.tx_packets++;</div><div class='del'>-		ndev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-		total_bytes += skb-&gt;len;</div><div class='del'>-		napi_consume_skb(skb, budget);</div><div class='ctx'> 		num_tx++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -192,6 +288,18 @@ int emac_tx_complete_packets(struct prueth_emac *emac, int chn,</div><div class='ctx'> 		__netif_tx_unlock(netif_txq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (tx_chn-&gt;xsk_pool) {</div><div class='add'>+		if (xsk_frames_done)</div><div class='add'>+			xsk_tx_completed(tx_chn-&gt;xsk_pool, xsk_frames_done);</div><div class='add'>+</div><div class='add'>+		if (xsk_uses_need_wakeup(tx_chn-&gt;xsk_pool))</div><div class='add'>+			xsk_set_tx_need_wakeup(tx_chn-&gt;xsk_pool);</div><div class='add'>+</div><div class='add'>+		netif_txq = netdev_get_tx_queue(ndev, chn);</div><div class='add'>+		txq_trans_cond_update(netif_txq);</div><div class='add'>+		emac_xsk_xmit_zc(emac, chn);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return num_tx;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -200,7 +308,10 @@ static enum hrtimer_restart emac_tx_timer_callback(struct hrtimer *timer)</div><div class='ctx'> 	struct prueth_tx_chn *tx_chns =</div><div class='ctx'> 			container_of(timer, struct prueth_tx_chn, tx_hrtimer);</div><div class='ctx'> </div><div class='del'>-	enable_irq(tx_chns-&gt;irq);</div><div class='add'>+	if (tx_chns-&gt;irq_disabled) {</div><div class='add'>+		tx_chns-&gt;irq_disabled = false;</div><div class='add'>+		enable_irq(tx_chns-&gt;irq);</div><div class='add'>+	}</div><div class='ctx'> 	return HRTIMER_NORESTART;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -223,7 +334,10 @@ static int emac_napi_tx_poll(struct napi_struct *napi_tx, int budget)</div><div class='ctx'> 				      ns_to_ktime(tx_chn-&gt;tx_pace_timeout_ns),</div><div class='ctx'> 				      HRTIMER_MODE_REL_PINNED);</div><div class='ctx'> 		} else {</div><div class='del'>-			enable_irq(tx_chn-&gt;irq);</div><div class='add'>+			if (tx_chn-&gt;irq_disabled) {</div><div class='add'>+				tx_chn-&gt;irq_disabled = false;</div><div class='add'>+				enable_irq(tx_chn-&gt;irq);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -234,6 +348,7 @@ static irqreturn_t prueth_tx_irq(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_tx_chn *tx_chn = dev_id;</div><div class='ctx'> </div><div class='add'>+	tx_chn-&gt;irq_disabled = true;</div><div class='ctx'> 	disable_irq_nosync(irq);</div><div class='ctx'> 	napi_schedule(&amp;tx_chn-&gt;napi_tx);</div><div class='ctx'> </div><div class='hunk'>@@ -249,9 +364,8 @@ int prueth_ndev_add_tx_napi(struct prueth_emac *emac)</div><div class='ctx'> 		struct prueth_tx_chn *tx_chn = &amp;emac-&gt;tx_chns[i];</div><div class='ctx'> </div><div class='ctx'> 		netif_napi_add_tx(emac-&gt;ndev, &amp;tx_chn-&gt;napi_tx, emac_napi_tx_poll);</div><div class='del'>-		hrtimer_init(&amp;tx_chn-&gt;tx_hrtimer, CLOCK_MONOTONIC,</div><div class='del'>-			     HRTIMER_MODE_REL_PINNED);</div><div class='del'>-		tx_chn-&gt;tx_hrtimer.function = &amp;emac_tx_timer_callback;</div><div class='add'>+		hrtimer_setup(&amp;tx_chn-&gt;tx_hrtimer, &amp;emac_tx_timer_callback, CLOCK_MONOTONIC,</div><div class='add'>+			      HRTIMER_MODE_REL_PINNED);</div><div class='ctx'> 		ret = request_irq(tx_chn-&gt;irq, prueth_tx_irq,</div><div class='ctx'> 				  IRQF_TRIGGER_HIGH, tx_chn-&gt;name,</div><div class='ctx'> 				  tx_chn);</div><div class='hunk'>@@ -351,6 +465,29 @@ fail:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(prueth_init_tx_chns);</div><div class='ctx'> </div><div class='add'>+static struct page_pool *prueth_create_page_pool(struct prueth_emac *emac,</div><div class='add'>+						 struct device *dma_dev,</div><div class='add'>+						 int size)</div><div class='add'>+{</div><div class='add'>+	struct page_pool_params pp_params = { 0 };</div><div class='add'>+	struct page_pool *pool;</div><div class='add'>+</div><div class='add'>+	pp_params.order = 0;</div><div class='add'>+	pp_params.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;</div><div class='add'>+	pp_params.pool_size = size;</div><div class='add'>+	pp_params.nid = dev_to_node(emac-&gt;prueth-&gt;dev);</div><div class='add'>+	pp_params.dma_dir = DMA_BIDIRECTIONAL;</div><div class='add'>+	pp_params.dev = dma_dev;</div><div class='add'>+	pp_params.napi = &amp;emac-&gt;napi_rx;</div><div class='add'>+	pp_params.max_len = PAGE_SIZE;</div><div class='add'>+</div><div class='add'>+	pool = page_pool_create(&amp;pp_params);</div><div class='add'>+	if (IS_ERR(pool))</div><div class='add'>+		netdev_err(emac-&gt;ndev, "cannot create rx page pool\n");</div><div class='add'>+</div><div class='add'>+	return pool;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int prueth_init_rx_chns(struct prueth_emac *emac,</div><div class='ctx'> 			struct prueth_rx_chn *rx_chn,</div><div class='ctx'> 			char *name, u32 max_rflows,</div><div class='hunk'>@@ -360,6 +497,7 @@ int prueth_init_rx_chns(struct prueth_emac *emac,</div><div class='ctx'> 	struct device *dev = emac-&gt;prueth-&gt;dev;</div><div class='ctx'> 	struct net_device *ndev = emac-&gt;ndev;</div><div class='ctx'> 	u32 fdqring_id, hdesc_size;</div><div class='add'>+	struct page_pool *pool;</div><div class='ctx'> 	int i, ret = 0, slice;</div><div class='ctx'> 	int flow_id_base;</div><div class='ctx'> </div><div class='hunk'>@@ -402,6 +540,14 @@ int prueth_init_rx_chns(struct prueth_emac *emac,</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	pool = prueth_create_page_pool(emac, rx_chn-&gt;dma_dev, rx_chn-&gt;descs_num);</div><div class='add'>+	if (IS_ERR(pool)) {</div><div class='add'>+		ret = PTR_ERR(pool);</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_chn-&gt;pg_pool = pool;</div><div class='add'>+</div><div class='ctx'> 	flow_id_base = k3_udma_glue_rx_get_flow_id_base(rx_chn-&gt;rx_chn);</div><div class='ctx'> 	if (emac-&gt;is_sr1 &amp;&amp; !strcmp(name, "rxmgm")) {</div><div class='ctx'> 		emac-&gt;rx_mgm_flow_id_base = flow_id_base;</div><div class='hunk'>@@ -461,17 +607,17 @@ fail:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(prueth_init_rx_chns);</div><div class='ctx'> </div><div class='del'>-int prueth_dma_rx_push(struct prueth_emac *emac,</div><div class='del'>-		       struct sk_buff *skb,</div><div class='del'>-		       struct prueth_rx_chn *rx_chn)</div><div class='add'>+int prueth_dma_rx_push_mapped(struct prueth_emac *emac,</div><div class='add'>+			      struct prueth_rx_chn *rx_chn,</div><div class='add'>+			      struct page *page, u32 buf_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = emac-&gt;ndev;</div><div class='ctx'> 	struct cppi5_host_desc_t *desc_rx;</div><div class='del'>-	u32 pkt_len = skb_tailroom(skb);</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='ctx'> 	dma_addr_t desc_dma;</div><div class='ctx'> 	dma_addr_t buf_dma;</div><div class='del'>-	void **swdata;</div><div class='ctx'> </div><div class='add'>+	buf_dma = page_pool_get_dma_addr(page) + PRUETH_HEADROOM;</div><div class='ctx'> 	desc_rx = k3_cppi_desc_pool_alloc(rx_chn-&gt;desc_pool);</div><div class='ctx'> 	if (!desc_rx) {</div><div class='ctx'> 		netdev_err(ndev, "rx push: failed to allocate descriptor\n");</div><div class='hunk'>@@ -479,25 +625,19 @@ int prueth_dma_rx_push(struct prueth_emac *emac,</div><div class='ctx'> 	}</div><div class='ctx'> 	desc_dma = k3_cppi_desc_pool_virt2dma(rx_chn-&gt;desc_pool, desc_rx);</div><div class='ctx'> </div><div class='del'>-	buf_dma = dma_map_single(rx_chn-&gt;dma_dev, skb-&gt;data, pkt_len, DMA_FROM_DEVICE);</div><div class='del'>-	if (unlikely(dma_mapping_error(rx_chn-&gt;dma_dev, buf_dma))) {</div><div class='del'>-		k3_cppi_desc_pool_free(rx_chn-&gt;desc_pool, desc_rx);</div><div class='del'>-		netdev_err(ndev, "rx push: failed to map rx pkt buffer\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	cppi5_hdesc_init(desc_rx, CPPI5_INFO0_HDESC_EPIB_PRESENT,</div><div class='ctx'> 			 PRUETH_NAV_PS_DATA_SIZE);</div><div class='ctx'> 	k3_udma_glue_rx_dma_to_cppi5_addr(rx_chn-&gt;rx_chn, &amp;buf_dma);</div><div class='del'>-	cppi5_hdesc_attach_buf(desc_rx, buf_dma, skb_tailroom(skb), buf_dma, skb_tailroom(skb));</div><div class='add'>+	cppi5_hdesc_attach_buf(desc_rx, buf_dma, buf_len, buf_dma, buf_len);</div><div class='ctx'> </div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(desc_rx);</div><div class='del'>-	*swdata = skb;</div><div class='add'>+	swdata-&gt;type = PRUETH_SWDATA_PAGE;</div><div class='add'>+	swdata-&gt;data.page = page;</div><div class='ctx'> </div><div class='del'>-	return k3_udma_glue_push_rx_chn(rx_chn-&gt;rx_chn, 0,</div><div class='add'>+	return k3_udma_glue_push_rx_chn(rx_chn-&gt;rx_chn, PRUETH_RX_FLOW_DATA,</div><div class='ctx'> 					desc_rx, desc_dma);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(prueth_dma_rx_push);</div><div class='add'>+EXPORT_SYMBOL_GPL(prueth_dma_rx_push_mapped);</div><div class='ctx'> </div><div class='ctx'> u64 icssg_ts_to_ns(u32 hi_sw, u32 hi, u32 lo, u32 cycle_time_ns)</div><div class='ctx'> {</div><div class='hunk'>@@ -535,18 +675,360 @@ void emac_rx_timestamp(struct prueth_emac *emac,</div><div class='ctx'> 	ssh-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int emac_rx_packet(struct prueth_emac *emac, u32 flow_id)</div><div class='add'>+/**</div><div class='add'>+ * emac_xmit_xdp_frame - transmits an XDP frame</div><div class='add'>+ * @emac: emac device</div><div class='add'>+ * @xdpf: data to transmit</div><div class='add'>+ * @q_idx: queue id</div><div class='add'>+ * @buff_type: Type of buffer to be transmitted</div><div class='add'>+ *</div><div class='add'>+ * Return: XDP state</div><div class='add'>+ */</div><div class='add'>+u32 emac_xmit_xdp_frame(struct prueth_emac *emac,</div><div class='add'>+			struct xdp_frame *xdpf,</div><div class='add'>+			unsigned int q_idx,</div><div class='add'>+			enum prueth_tx_buff_type buff_type)</div><div class='add'>+{</div><div class='add'>+	struct cppi5_host_desc_t *first_desc;</div><div class='add'>+	struct net_device *ndev = emac-&gt;ndev;</div><div class='add'>+	struct netdev_queue *netif_txq;</div><div class='add'>+	struct prueth_tx_chn *tx_chn;</div><div class='add'>+	dma_addr_t desc_dma, buf_dma;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='add'>+	struct page *page;</div><div class='add'>+	u32 *epib;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (q_idx &gt;= PRUETH_MAX_TX_QUEUES) {</div><div class='add'>+		netdev_err(ndev, "xdp tx: invalid q_id %d\n", q_idx);</div><div class='add'>+		return ICSSG_XDP_CONSUMED;	/* drop */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_chn = &amp;emac-&gt;tx_chns[q_idx];</div><div class='add'>+</div><div class='add'>+	first_desc = k3_cppi_desc_pool_alloc(tx_chn-&gt;desc_pool);</div><div class='add'>+	if (!first_desc) {</div><div class='add'>+		netdev_dbg(ndev, "xdp tx: failed to allocate descriptor\n");</div><div class='add'>+		return ICSSG_XDP_CONSUMED;	/* drop */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (buff_type == PRUETH_TX_BUFF_TYPE_XDP_TX) { /* already DMA mapped by page_pool */</div><div class='add'>+		page = virt_to_head_page(xdpf-&gt;data);</div><div class='add'>+		if (unlikely(!page)) {</div><div class='add'>+			netdev_err(ndev, "xdp tx: failed to get page from xdpf\n");</div><div class='add'>+			goto drop_free_descs;</div><div class='add'>+		}</div><div class='add'>+		buf_dma = page_pool_get_dma_addr(page);</div><div class='add'>+		buf_dma += xdpf-&gt;headroom + sizeof(struct xdp_frame);</div><div class='add'>+	} else { /* Map the linear buffer */</div><div class='add'>+		buf_dma = dma_map_single(tx_chn-&gt;dma_dev, xdpf-&gt;data, xdpf-&gt;len, DMA_TO_DEVICE);</div><div class='add'>+		if (dma_mapping_error(tx_chn-&gt;dma_dev, buf_dma)) {</div><div class='add'>+			netdev_err(ndev, "xdp tx: failed to map data buffer\n");</div><div class='add'>+			goto drop_free_descs;	/* drop */</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cppi5_hdesc_init(first_desc, CPPI5_INFO0_HDESC_EPIB_PRESENT,</div><div class='add'>+			 PRUETH_NAV_PS_DATA_SIZE);</div><div class='add'>+	cppi5_hdesc_set_pkttype(first_desc, 0);</div><div class='add'>+	epib = first_desc-&gt;epib;</div><div class='add'>+	epib[0] = 0;</div><div class='add'>+	epib[1] = 0;</div><div class='add'>+</div><div class='add'>+	/* set dst tag to indicate internal qid at the firmware which is at</div><div class='add'>+	 * bit8..bit15. bit0..bit7 indicates port num for directed</div><div class='add'>+	 * packets in case of switch mode operation</div><div class='add'>+	 */</div><div class='add'>+	cppi5_desc_set_tags_ids(&amp;first_desc-&gt;hdr, 0, (emac-&gt;port_id | (q_idx &lt;&lt; 8)));</div><div class='add'>+	k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn-&gt;tx_chn, &amp;buf_dma);</div><div class='add'>+	cppi5_hdesc_attach_buf(first_desc, buf_dma, xdpf-&gt;len, buf_dma, xdpf-&gt;len);</div><div class='add'>+	swdata = cppi5_hdesc_get_swdata(first_desc);</div><div class='add'>+	swdata-&gt;type = PRUETH_SWDATA_XDPF;</div><div class='add'>+	swdata-&gt;data.xdpf = xdpf;</div><div class='add'>+</div><div class='add'>+	/* Report BQL before sending the packet */</div><div class='add'>+	netif_txq = netdev_get_tx_queue(ndev, tx_chn-&gt;id);</div><div class='add'>+	netdev_tx_sent_queue(netif_txq, xdpf-&gt;len);</div><div class='add'>+</div><div class='add'>+	cppi5_hdesc_set_pktlen(first_desc, xdpf-&gt;len);</div><div class='add'>+	desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn-&gt;desc_pool, first_desc);</div><div class='add'>+</div><div class='add'>+	ret = k3_udma_glue_push_tx_chn(tx_chn-&gt;tx_chn, first_desc, desc_dma);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "xdp tx: push failed: %d\n", ret);</div><div class='add'>+		netdev_tx_completed_queue(netif_txq, 1, xdpf-&gt;len);</div><div class='add'>+		goto drop_free_descs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ICSSG_XDP_TX;</div><div class='add'>+</div><div class='add'>+drop_free_descs:</div><div class='add'>+	prueth_xmit_free(tx_chn, first_desc);</div><div class='add'>+	return ICSSG_XDP_CONSUMED;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(emac_xmit_xdp_frame);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * emac_run_xdp - run an XDP program</div><div class='add'>+ * @emac: emac device</div><div class='add'>+ * @xdp: XDP buffer containing the frame</div><div class='add'>+ * @len: Rx descriptor packet length</div><div class='add'>+ *</div><div class='add'>+ * Return: XDP state</div><div class='add'>+ */</div><div class='add'>+static u32 emac_run_xdp(struct prueth_emac *emac, struct xdp_buff *xdp, u32 *len)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = emac-&gt;ndev;</div><div class='add'>+	struct netdev_queue *netif_txq;</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='add'>+	struct xdp_frame *xdpf;</div><div class='add'>+	u32 pkt_len = *len;</div><div class='add'>+	u32 act, result;</div><div class='add'>+	int q_idx, err;</div><div class='add'>+</div><div class='add'>+	xdp_prog = READ_ONCE(emac-&gt;xdp_prog);</div><div class='add'>+	act = bpf_prog_run_xdp(xdp_prog, xdp);</div><div class='add'>+	switch (act) {</div><div class='add'>+	case XDP_PASS:</div><div class='add'>+		return ICSSG_XDP_PASS;</div><div class='add'>+	case XDP_TX:</div><div class='add'>+		/* Send packet to TX ring for immediate transmission */</div><div class='add'>+		xdpf = xdp_convert_buff_to_frame(xdp);</div><div class='add'>+		if (unlikely(!xdpf)) {</div><div class='add'>+			ndev-&gt;stats.tx_dropped++;</div><div class='add'>+			goto drop;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		q_idx = cpu % emac-&gt;tx_ch_num;</div><div class='add'>+		netif_txq = netdev_get_tx_queue(ndev, q_idx);</div><div class='add'>+		__netif_tx_lock(netif_txq, cpu);</div><div class='add'>+		result = emac_xmit_xdp_frame(emac, xdpf, q_idx,</div><div class='add'>+					     PRUETH_TX_BUFF_TYPE_XDP_TX);</div><div class='add'>+		__netif_tx_unlock(netif_txq);</div><div class='add'>+		if (result == ICSSG_XDP_CONSUMED) {</div><div class='add'>+			ndev-&gt;stats.tx_dropped++;</div><div class='add'>+			goto drop;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev_sw_netstats_rx_add(ndev, xdpf-&gt;len);</div><div class='add'>+		return result;</div><div class='add'>+	case XDP_REDIRECT:</div><div class='add'>+		err = xdp_do_redirect(emac-&gt;ndev, xdp, xdp_prog);</div><div class='add'>+		if (err)</div><div class='add'>+			goto drop;</div><div class='add'>+</div><div class='add'>+		dev_sw_netstats_rx_add(ndev, pkt_len);</div><div class='add'>+		return ICSSG_XDP_REDIR;</div><div class='add'>+	default:</div><div class='add'>+		bpf_warn_invalid_xdp_action(emac-&gt;ndev, xdp_prog, act);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case XDP_ABORTED:</div><div class='add'>+drop:</div><div class='add'>+		trace_xdp_exception(emac-&gt;ndev, xdp_prog, act);</div><div class='add'>+		fallthrough; /* handle aborts by dropping packet */</div><div class='add'>+	case XDP_DROP:</div><div class='add'>+		ndev-&gt;stats.rx_dropped++;</div><div class='add'>+		return ICSSG_XDP_CONSUMED;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int prueth_dma_rx_push_mapped_zc(struct prueth_emac *emac,</div><div class='add'>+					struct prueth_rx_chn *rx_chn,</div><div class='add'>+					struct xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = emac-&gt;ndev;</div><div class='add'>+	struct cppi5_host_desc_t *desc_rx;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='add'>+	dma_addr_t desc_dma;</div><div class='add'>+	dma_addr_t buf_dma;</div><div class='add'>+	int buf_len;</div><div class='add'>+</div><div class='add'>+	buf_dma = xsk_buff_xdp_get_dma(xdp);</div><div class='add'>+	desc_rx = k3_cppi_desc_pool_alloc(rx_chn-&gt;desc_pool);</div><div class='add'>+	if (!desc_rx) {</div><div class='add'>+		netdev_err(ndev, "rx push: failed to allocate descriptor\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	desc_dma = k3_cppi_desc_pool_virt2dma(rx_chn-&gt;desc_pool, desc_rx);</div><div class='add'>+</div><div class='add'>+	cppi5_hdesc_init(desc_rx, CPPI5_INFO0_HDESC_EPIB_PRESENT,</div><div class='add'>+			 PRUETH_NAV_PS_DATA_SIZE);</div><div class='add'>+	k3_udma_glue_rx_dma_to_cppi5_addr(rx_chn-&gt;rx_chn, &amp;buf_dma);</div><div class='add'>+	buf_len = xsk_pool_get_rx_frame_size(rx_chn-&gt;xsk_pool);</div><div class='add'>+	cppi5_hdesc_attach_buf(desc_rx, buf_dma, buf_len, buf_dma, buf_len);</div><div class='add'>+	swdata = cppi5_hdesc_get_swdata(desc_rx);</div><div class='add'>+	swdata-&gt;type = PRUETH_SWDATA_XSK;</div><div class='add'>+	swdata-&gt;data.xdp = xdp;</div><div class='add'>+</div><div class='add'>+	return k3_udma_glue_push_rx_chn(rx_chn-&gt;rx_chn, PRUETH_RX_FLOW_DATA,</div><div class='add'>+					desc_rx, desc_dma);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int prueth_rx_alloc_zc(struct prueth_emac *emac, int budget)</div><div class='add'>+{</div><div class='add'>+	struct prueth_rx_chn *rx_chn = &amp;emac-&gt;rx_chns;</div><div class='add'>+	struct xdp_buff *xdp;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; budget; i++) {</div><div class='add'>+		xdp = xsk_buff_alloc(rx_chn-&gt;xsk_pool);</div><div class='add'>+		if (!xdp)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		ret = prueth_dma_rx_push_mapped_zc(emac, rx_chn, xdp);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(emac-&gt;ndev, "rx alloc: failed to map descriptors to xdp buff\n");</div><div class='add'>+			xsk_buff_free(xdp);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void emac_dispatch_skb_zc(struct prueth_emac *emac, struct xdp_buff *xdp, u32 *psdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int headroom = xdp-&gt;data - xdp-&gt;data_hard_start;</div><div class='add'>+	unsigned int pkt_len = xdp-&gt;data_end - xdp-&gt;data;</div><div class='add'>+	struct net_device *ndev = emac-&gt;ndev;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	skb = napi_alloc_skb(&amp;emac-&gt;napi_rx, xdp-&gt;data_end - xdp-&gt;data_hard_start);</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		ndev-&gt;stats.rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_reserve(skb, headroom);</div><div class='add'>+	skb_put(skb, pkt_len);</div><div class='add'>+	skb-&gt;dev = ndev;</div><div class='add'>+</div><div class='add'>+	/* RX HW timestamp */</div><div class='add'>+	if (emac-&gt;rx_ts_enabled)</div><div class='add'>+		emac_rx_timestamp(emac, skb, psdata);</div><div class='add'>+</div><div class='add'>+	if (emac-&gt;prueth-&gt;is_switch_mode)</div><div class='add'>+		skb-&gt;offload_fwd_mark = emac-&gt;offload_fwd_mark;</div><div class='add'>+	skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='add'>+</div><div class='add'>+	skb_mark_for_recycle(skb);</div><div class='add'>+	napi_gro_receive(&amp;emac-&gt;napi_rx, skb);</div><div class='add'>+	ndev-&gt;stats.rx_bytes += pkt_len;</div><div class='add'>+	ndev-&gt;stats.rx_packets++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_rx_packet_zc(struct prueth_emac *emac, u32 flow_id,</div><div class='add'>+			     int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_rx_chn *rx_chn = &amp;emac-&gt;rx_chns;</div><div class='ctx'> 	u32 buf_dma_len, pkt_len, port_id = 0;</div><div class='ctx'> 	struct net_device *ndev = emac-&gt;ndev;</div><div class='ctx'> 	struct cppi5_host_desc_t *desc_rx;</div><div class='del'>-	struct sk_buff *skb, *new_skb;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='ctx'> 	dma_addr_t desc_dma, buf_dma;</div><div class='del'>-	void **swdata;</div><div class='add'>+	struct xdp_buff *xdp;</div><div class='add'>+	int xdp_status = 0;</div><div class='add'>+	int count = 0;</div><div class='ctx'> 	u32 *psdata;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	while (count &lt; budget) {</div><div class='add'>+		ret = k3_udma_glue_pop_rx_chn(rx_chn-&gt;rx_chn, flow_id, &amp;desc_dma);</div><div class='add'>+		if (ret) {</div><div class='add'>+			if (ret != -ENODATA)</div><div class='add'>+				netdev_err(ndev, "rx pop: failed: %d\n", ret);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (cppi5_desc_is_tdcm(desc_dma)) {</div><div class='add'>+			complete(&amp;emac-&gt;tdown_complete);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn-&gt;desc_pool, desc_dma);</div><div class='add'>+		swdata = cppi5_hdesc_get_swdata(desc_rx);</div><div class='add'>+		if (swdata-&gt;type != PRUETH_SWDATA_XSK) {</div><div class='add'>+			netdev_err(ndev, "rx_pkt: invalid swdata-&gt;type %d\n", swdata-&gt;type);</div><div class='add'>+			k3_cppi_desc_pool_free(rx_chn-&gt;desc_pool, desc_rx);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		xdp = swdata-&gt;data.xdp;</div><div class='add'>+		cppi5_hdesc_get_obuf(desc_rx, &amp;buf_dma, &amp;buf_dma_len);</div><div class='add'>+		k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn-&gt;rx_chn, &amp;buf_dma);</div><div class='add'>+		pkt_len = cppi5_hdesc_get_pktlen(desc_rx);</div><div class='add'>+		/* firmware adds 4 CRC bytes, strip them */</div><div class='add'>+		pkt_len -= 4;</div><div class='add'>+		cppi5_desc_get_tags_ids(&amp;desc_rx-&gt;hdr, &amp;port_id, NULL);</div><div class='add'>+		psdata = cppi5_hdesc_get_psdata(desc_rx);</div><div class='add'>+		k3_cppi_desc_pool_free(rx_chn-&gt;desc_pool, desc_rx);</div><div class='add'>+		count++;</div><div class='add'>+		xsk_buff_set_size(xdp, pkt_len);</div><div class='add'>+		xsk_buff_dma_sync_for_cpu(xdp);</div><div class='add'>+</div><div class='add'>+		if (prueth_xdp_is_enabled(emac)) {</div><div class='add'>+			ret = emac_run_xdp(emac, xdp, &amp;pkt_len);</div><div class='add'>+			switch (ret) {</div><div class='add'>+			case ICSSG_XDP_PASS:</div><div class='add'>+				/* prepare skb and send to n/w stack */</div><div class='add'>+				emac_dispatch_skb_zc(emac, xdp, psdata);</div><div class='add'>+				xsk_buff_free(xdp);</div><div class='add'>+				break;</div><div class='add'>+			case ICSSG_XDP_CONSUMED:</div><div class='add'>+				xsk_buff_free(xdp);</div><div class='add'>+				break;</div><div class='add'>+			case ICSSG_XDP_TX:</div><div class='add'>+			case ICSSG_XDP_REDIR:</div><div class='add'>+				xdp_status |= ret;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			/* prepare skb and send to n/w stack */</div><div class='add'>+			emac_dispatch_skb_zc(emac, xdp, psdata);</div><div class='add'>+			xsk_buff_free(xdp);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (xdp_status &amp; ICSSG_XDP_REDIR)</div><div class='add'>+		xdp_do_flush();</div><div class='add'>+</div><div class='add'>+	/* Allocate xsk buffers from the pool for the "count" number of</div><div class='add'>+	 * packets processed in order to be able to receive more packets.</div><div class='add'>+	 */</div><div class='add'>+	ret = prueth_rx_alloc_zc(emac, count);</div><div class='add'>+</div><div class='add'>+	if (xsk_uses_need_wakeup(rx_chn-&gt;xsk_pool)) {</div><div class='add'>+		/* If the user space doesn't provide enough buffers then it must</div><div class='add'>+		 * explicitly wake up the kernel when new buffers are available</div><div class='add'>+		 */</div><div class='add'>+		if (ret &lt; count)</div><div class='add'>+			xsk_set_rx_need_wakeup(rx_chn-&gt;xsk_pool);</div><div class='add'>+		else</div><div class='add'>+			xsk_clear_rx_need_wakeup(rx_chn-&gt;xsk_pool);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_rx_packet(struct prueth_emac *emac, u32 flow_id, u32 *xdp_state)</div><div class='add'>+{</div><div class='add'>+	struct prueth_rx_chn *rx_chn = &amp;emac-&gt;rx_chns;</div><div class='add'>+	u32 buf_dma_len, pkt_len, port_id = 0;</div><div class='add'>+	struct net_device *ndev = emac-&gt;ndev;</div><div class='add'>+	struct cppi5_host_desc_t *desc_rx;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='add'>+	dma_addr_t desc_dma, buf_dma;</div><div class='add'>+	struct page *page, *new_page;</div><div class='add'>+	struct page_pool *pool;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct xdp_buff xdp;</div><div class='add'>+	int headroom, ret;</div><div class='add'>+	u32 *psdata;</div><div class='add'>+	void *pa;</div><div class='add'>+</div><div class='add'>+	*xdp_state = 0;</div><div class='add'>+	pool = rx_chn-&gt;pg_pool;</div><div class='ctx'> 	ret = k3_udma_glue_pop_rx_chn(rx_chn-&gt;rx_chn, flow_id, &amp;desc_dma);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		if (ret != -ENODATA)</div><div class='hunk'>@@ -554,52 +1036,85 @@ static int emac_rx_packet(struct prueth_emac *emac, u32 flow_id)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (cppi5_desc_is_tdcm(desc_dma)) /* Teardown ? */</div><div class='add'>+	if (cppi5_desc_is_tdcm(desc_dma)) {</div><div class='add'>+		complete(&amp;emac-&gt;tdown_complete);</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn-&gt;desc_pool, desc_dma);</div><div class='del'>-</div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(desc_rx);</div><div class='del'>-	skb = *swdata;</div><div class='del'>-</div><div class='del'>-	psdata = cppi5_hdesc_get_psdata(desc_rx);</div><div class='del'>-	/* RX HW timestamp */</div><div class='del'>-	if (emac-&gt;rx_ts_enabled)</div><div class='del'>-		emac_rx_timestamp(emac, skb, psdata);</div><div class='add'>+	if (swdata-&gt;type != PRUETH_SWDATA_PAGE) {</div><div class='add'>+		netdev_err(ndev, "rx_pkt: invalid swdata-&gt;type %d\n", swdata-&gt;type);</div><div class='add'>+		k3_cppi_desc_pool_free(rx_chn-&gt;desc_pool, desc_rx);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	page = swdata-&gt;data.page;</div><div class='add'>+	page_pool_dma_sync_for_cpu(pool, page, 0, PAGE_SIZE);</div><div class='ctx'> 	cppi5_hdesc_get_obuf(desc_rx, &amp;buf_dma, &amp;buf_dma_len);</div><div class='ctx'> 	k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn-&gt;rx_chn, &amp;buf_dma);</div><div class='ctx'> 	pkt_len = cppi5_hdesc_get_pktlen(desc_rx);</div><div class='ctx'> 	/* firmware adds 4 CRC bytes, strip them */</div><div class='ctx'> 	pkt_len -= 4;</div><div class='ctx'> 	cppi5_desc_get_tags_ids(&amp;desc_rx-&gt;hdr, &amp;port_id, NULL);</div><div class='del'>-</div><div class='del'>-	dma_unmap_single(rx_chn-&gt;dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);</div><div class='ctx'> 	k3_cppi_desc_pool_free(rx_chn-&gt;desc_pool, desc_rx);</div><div class='ctx'> </div><div class='del'>-	skb-&gt;dev = ndev;</div><div class='del'>-	new_skb = netdev_alloc_skb_ip_align(ndev, PRUETH_MAX_PKT_SIZE);</div><div class='ctx'> 	/* if allocation fails we drop the packet but push the</div><div class='del'>-	 * descriptor back to the ring with old skb to prevent a stall</div><div class='add'>+	 * descriptor back to the ring with old page to prevent a stall</div><div class='ctx'> 	 */</div><div class='del'>-	if (!new_skb) {</div><div class='add'>+	new_page = page_pool_dev_alloc_pages(pool);</div><div class='add'>+	if (unlikely(!new_page)) {</div><div class='add'>+		new_page = page;</div><div class='ctx'> 		ndev-&gt;stats.rx_dropped++;</div><div class='del'>-		new_skb = skb;</div><div class='add'>+		goto requeue;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pa = page_address(page);</div><div class='add'>+	if (prueth_xdp_is_enabled(emac)) {</div><div class='add'>+		xdp_init_buff(&amp;xdp, PAGE_SIZE, &amp;rx_chn-&gt;xdp_rxq);</div><div class='add'>+		xdp_prepare_buff(&amp;xdp, pa, PRUETH_HEADROOM, pkt_len, false);</div><div class='add'>+</div><div class='add'>+		*xdp_state = emac_run_xdp(emac, &amp;xdp, &amp;pkt_len);</div><div class='add'>+		if (*xdp_state != ICSSG_XDP_PASS)</div><div class='add'>+			goto requeue;</div><div class='add'>+		headroom = xdp.data - xdp.data_hard_start;</div><div class='add'>+		pkt_len = xdp.data_end - xdp.data;</div><div class='ctx'> 	} else {</div><div class='del'>-		/* send the filled skb up the n/w stack */</div><div class='del'>-		skb_put(skb, pkt_len);</div><div class='del'>-		if (emac-&gt;prueth-&gt;is_switch_mode)</div><div class='del'>-			skb-&gt;offload_fwd_mark = emac-&gt;offload_fwd_mark;</div><div class='del'>-		skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='del'>-		napi_gro_receive(&amp;emac-&gt;napi_rx, skb);</div><div class='del'>-		ndev-&gt;stats.rx_bytes += pkt_len;</div><div class='del'>-		ndev-&gt;stats.rx_packets++;</div><div class='add'>+		headroom = PRUETH_HEADROOM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* prepare skb and send to n/w stack */</div><div class='add'>+	skb = napi_build_skb(pa, PAGE_SIZE);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		ndev-&gt;stats.rx_dropped++;</div><div class='add'>+		page_pool_recycle_direct(pool, page);</div><div class='add'>+		goto requeue;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	skb_reserve(skb, headroom);</div><div class='add'>+	skb_put(skb, pkt_len);</div><div class='add'>+	skb-&gt;dev = ndev;</div><div class='add'>+</div><div class='add'>+	psdata = cppi5_hdesc_get_psdata(desc_rx);</div><div class='add'>+	/* RX HW timestamp */</div><div class='add'>+	if (emac-&gt;rx_ts_enabled)</div><div class='add'>+		emac_rx_timestamp(emac, skb, psdata);</div><div class='add'>+</div><div class='add'>+	if (emac-&gt;prueth-&gt;is_switch_mode)</div><div class='add'>+		skb-&gt;offload_fwd_mark = emac-&gt;offload_fwd_mark;</div><div class='add'>+	skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='add'>+</div><div class='add'>+	skb_mark_for_recycle(skb);</div><div class='add'>+	napi_gro_receive(&amp;emac-&gt;napi_rx, skb);</div><div class='add'>+	ndev-&gt;stats.rx_bytes += pkt_len;</div><div class='add'>+	ndev-&gt;stats.rx_packets++;</div><div class='add'>+</div><div class='add'>+requeue:</div><div class='ctx'> 	/* queue another RX DMA */</div><div class='del'>-	ret = prueth_dma_rx_push(emac, new_skb, &amp;emac-&gt;rx_chns);</div><div class='add'>+	ret = prueth_dma_rx_push_mapped(emac, &amp;emac-&gt;rx_chns, new_page,</div><div class='add'>+					PRUETH_MAX_PKT_SIZE);</div><div class='ctx'> 	if (WARN_ON(ret &lt; 0)) {</div><div class='del'>-		dev_kfree_skb_any(new_skb);</div><div class='add'>+		page_pool_recycle_direct(pool, new_page);</div><div class='ctx'> 		ndev-&gt;stats.rx_errors++;</div><div class='ctx'> 		ndev-&gt;stats.rx_dropped++;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -607,27 +1122,29 @@ static int emac_rx_packet(struct prueth_emac *emac, u32 flow_id)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void prueth_rx_cleanup(void *data, dma_addr_t desc_dma)</div><div class='add'>+void prueth_rx_cleanup(void *data, dma_addr_t desc_dma)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_rx_chn *rx_chn = data;</div><div class='ctx'> 	struct cppi5_host_desc_t *desc_rx;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	dma_addr_t buf_dma;</div><div class='del'>-	u32 buf_dma_len;</div><div class='del'>-	void **swdata;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='add'>+	struct page_pool *pool;</div><div class='add'>+	struct xdp_buff *xdp;</div><div class='add'>+	struct page *page;</div><div class='ctx'> </div><div class='add'>+	pool = rx_chn-&gt;pg_pool;</div><div class='ctx'> 	desc_rx = k3_cppi_desc_pool_dma2virt(rx_chn-&gt;desc_pool, desc_dma);</div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(desc_rx);</div><div class='del'>-	skb = *swdata;</div><div class='del'>-	cppi5_hdesc_get_obuf(desc_rx, &amp;buf_dma, &amp;buf_dma_len);</div><div class='del'>-	k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn-&gt;rx_chn, &amp;buf_dma);</div><div class='add'>+	if (rx_chn-&gt;xsk_pool) {</div><div class='add'>+		xdp = swdata-&gt;data.xdp;</div><div class='add'>+		xsk_buff_free(xdp);</div><div class='add'>+	} else {</div><div class='add'>+		page = swdata-&gt;data.page;</div><div class='add'>+		page_pool_recycle_direct(pool, page);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	dma_unmap_single(rx_chn-&gt;dma_dev, buf_dma, buf_dma_len,</div><div class='del'>-			 DMA_FROM_DEVICE);</div><div class='ctx'> 	k3_cppi_desc_pool_free(rx_chn-&gt;desc_pool, desc_rx);</div><div class='del'>-</div><div class='del'>-	dev_kfree_skb_any(skb);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(prueth_rx_cleanup);</div><div class='ctx'> </div><div class='ctx'> static int prueth_tx_ts_cookie_get(struct prueth_emac *emac)</div><div class='ctx'> {</div><div class='hunk'>@@ -662,13 +1179,13 @@ enum netdev_tx icssg_ndo_start_xmit(struct sk_buff *skb, struct net_device *ndev</div><div class='ctx'> 	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='ctx'> 	struct prueth *prueth = emac-&gt;prueth;</div><div class='ctx'> 	struct netdev_queue *netif_txq;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='ctx'> 	struct prueth_tx_chn *tx_chn;</div><div class='ctx'> 	dma_addr_t desc_dma, buf_dma;</div><div class='ctx'> 	u32 pkt_len, dst_tag_id;</div><div class='ctx'> 	int i, ret = 0, q_idx;</div><div class='ctx'> 	bool in_tx_ts = 0;</div><div class='ctx'> 	int tx_ts_cookie;</div><div class='del'>-	void **swdata;</div><div class='ctx'> 	u32 *epib;</div><div class='ctx'> </div><div class='ctx'> 	pkt_len = skb_headlen(skb);</div><div class='hunk'>@@ -730,7 +1247,8 @@ enum netdev_tx icssg_ndo_start_xmit(struct sk_buff *skb, struct net_device *ndev</div><div class='ctx'> 	k3_udma_glue_tx_dma_to_cppi5_addr(tx_chn-&gt;tx_chn, &amp;buf_dma);</div><div class='ctx'> 	cppi5_hdesc_attach_buf(first_desc, buf_dma, pkt_len, buf_dma, pkt_len);</div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(first_desc);</div><div class='del'>-	*swdata = skb;</div><div class='add'>+	swdata-&gt;type = PRUETH_SWDATA_SKB;</div><div class='add'>+	swdata-&gt;data.skb = skb;</div><div class='ctx'> </div><div class='ctx'> 	/* Handle the case where skb is fragmented in pages */</div><div class='ctx'> 	cur_desc = first_desc;</div><div class='hunk'>@@ -780,6 +1298,7 @@ enum netdev_tx icssg_ndo_start_xmit(struct sk_buff *skb, struct net_device *ndev</div><div class='ctx'> 	ret = k3_udma_glue_push_tx_chn(tx_chn-&gt;tx_chn, first_desc, desc_dma);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_err(ndev, "tx: push failed: %d\n", ret);</div><div class='add'>+		netdev_tx_completed_queue(netif_txq, 1, pkt_len);</div><div class='ctx'> 		goto drop_free_descs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -829,25 +1348,44 @@ drop_stop_q_busy:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(icssg_ndo_start_xmit);</div><div class='ctx'> </div><div class='del'>-static void prueth_tx_cleanup(void *data, dma_addr_t desc_dma)</div><div class='add'>+void prueth_tx_cleanup(void *data, dma_addr_t desc_dma)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_tx_chn *tx_chn = data;</div><div class='ctx'> 	struct cppi5_host_desc_t *desc_tx;</div><div class='add'>+	struct xsk_buff_pool *xsk_pool;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='add'>+	struct xdp_frame *xdpf;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	void **swdata;</div><div class='ctx'> </div><div class='ctx'> 	desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn-&gt;desc_pool, desc_dma);</div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(desc_tx);</div><div class='del'>-	skb = *(swdata);</div><div class='del'>-	prueth_xmit_free(tx_chn, desc_tx);</div><div class='ctx'> </div><div class='del'>-	dev_kfree_skb_any(skb);</div><div class='add'>+	switch (swdata-&gt;type) {</div><div class='add'>+	case PRUETH_SWDATA_SKB:</div><div class='add'>+		skb = swdata-&gt;data.skb;</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		break;</div><div class='add'>+	case PRUETH_SWDATA_XDPF:</div><div class='add'>+		xdpf = swdata-&gt;data.xdpf;</div><div class='add'>+		xdp_return_frame(xdpf);</div><div class='add'>+		break;</div><div class='add'>+	case PRUETH_SWDATA_XSK:</div><div class='add'>+		xsk_pool = tx_chn-&gt;xsk_pool;</div><div class='add'>+		xsk_tx_completed(xsk_pool, 1);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prueth_xmit_free(tx_chn, desc_tx);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(prueth_tx_cleanup);</div><div class='ctx'> </div><div class='ctx'> irqreturn_t prueth_rx_irq(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_emac *emac = dev_id;</div><div class='ctx'> </div><div class='add'>+	emac-&gt;rx_chns.irq_disabled = true;</div><div class='ctx'> 	disable_irq_nosync(irq);</div><div class='ctx'> 	napi_schedule(&amp;emac-&gt;napi_rx);</div><div class='ctx'> </div><div class='hunk'>@@ -855,31 +1393,6 @@ irqreturn_t prueth_rx_irq(int irq, void *dev_id)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(prueth_rx_irq);</div><div class='ctx'> </div><div class='del'>-void prueth_emac_stop(struct prueth_emac *emac)</div><div class='del'>-{</div><div class='del'>-	struct prueth *prueth = emac-&gt;prueth;</div><div class='del'>-	int slice;</div><div class='del'>-</div><div class='del'>-	switch (emac-&gt;port_id) {</div><div class='del'>-	case PRUETH_PORT_MII0:</div><div class='del'>-		slice = ICSS_SLICE0;</div><div class='del'>-		break;</div><div class='del'>-	case PRUETH_PORT_MII1:</div><div class='del'>-		slice = ICSS_SLICE1;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		netdev_err(emac-&gt;ndev, "invalid port\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	emac-&gt;fw_running = 0;</div><div class='del'>-	if (!emac-&gt;is_sr1)</div><div class='del'>-		rproc_shutdown(prueth-&gt;txpru[slice]);</div><div class='del'>-	rproc_shutdown(prueth-&gt;rtu[slice]);</div><div class='del'>-	rproc_shutdown(prueth-&gt;pru[slice]);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(prueth_emac_stop);</div><div class='del'>-</div><div class='ctx'> void prueth_cleanup_tx_ts(struct prueth_emac *emac)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -900,31 +1413,46 @@ int icssg_napi_rx_poll(struct napi_struct *napi_rx, int budget)</div><div class='ctx'> 		PRUETH_RX_FLOW_DATA_SR1 : PRUETH_RX_FLOW_DATA;</div><div class='ctx'> 	int flow = emac-&gt;is_sr1 ?</div><div class='ctx'> 		PRUETH_MAX_RX_FLOWS_SR1 : PRUETH_MAX_RX_FLOWS;</div><div class='add'>+	struct prueth_rx_chn *rx_chn = &amp;emac-&gt;rx_chns;</div><div class='add'>+	int xdp_state_or = 0;</div><div class='ctx'> 	int num_rx = 0;</div><div class='ctx'> 	int cur_budget;</div><div class='add'>+	u32 xdp_state;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	while (flow--) {</div><div class='del'>-		cur_budget = budget - num_rx;</div><div class='del'>-</div><div class='del'>-		while (cur_budget--) {</div><div class='del'>-			ret = emac_rx_packet(emac, flow);</div><div class='del'>-			if (ret)</div><div class='del'>-				break;</div><div class='del'>-			num_rx++;</div><div class='add'>+		if (rx_chn-&gt;xsk_pool) {</div><div class='add'>+			num_rx = emac_rx_packet_zc(emac, flow, budget);</div><div class='add'>+		} else {</div><div class='add'>+			cur_budget = budget - num_rx;</div><div class='add'>+</div><div class='add'>+			while (cur_budget--) {</div><div class='add'>+				ret = emac_rx_packet(emac, flow, &amp;xdp_state);</div><div class='add'>+				xdp_state_or |= xdp_state;</div><div class='add'>+				if (ret)</div><div class='add'>+					break;</div><div class='add'>+				num_rx++;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (num_rx &gt;= budget)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (xdp_state_or &amp; ICSSG_XDP_REDIR)</div><div class='add'>+		xdp_do_flush();</div><div class='add'>+</div><div class='ctx'> 	if (num_rx &lt; budget &amp;&amp; napi_complete_done(napi_rx, num_rx)) {</div><div class='ctx'> 		if (unlikely(emac-&gt;rx_pace_timeout_ns)) {</div><div class='ctx'> 			hrtimer_start(&amp;emac-&gt;rx_hrtimer,</div><div class='ctx'> 				      ns_to_ktime(emac-&gt;rx_pace_timeout_ns),</div><div class='ctx'> 				      HRTIMER_MODE_REL_PINNED);</div><div class='ctx'> 		} else {</div><div class='del'>-			enable_irq(emac-&gt;rx_chns.irq[rx_flow]);</div><div class='add'>+			if (emac-&gt;rx_chns.irq_disabled) {</div><div class='add'>+				/* re-enable the RX IRQ */</div><div class='add'>+				emac-&gt;rx_chns.irq_disabled = false;</div><div class='add'>+				enable_irq(emac-&gt;rx_chns.irq[rx_flow]);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -936,25 +1464,53 @@ int prueth_prepare_rx_chan(struct prueth_emac *emac,</div><div class='ctx'> 			   struct prueth_rx_chn *chn,</div><div class='ctx'> 			   int buf_size)</div><div class='ctx'> {</div><div class='del'>-	struct sk_buff *skb;</div><div class='add'>+	struct page *page;</div><div class='add'>+	int desc_avail;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; chn-&gt;descs_num; i++) {</div><div class='del'>-		skb = __netdev_alloc_skb_ip_align(NULL, buf_size, GFP_KERNEL);</div><div class='del'>-		if (!skb)</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+	desc_avail = k3_cppi_desc_pool_avail(chn-&gt;desc_pool);</div><div class='add'>+	if (desc_avail &lt; chn-&gt;descs_num)</div><div class='add'>+		netdev_warn(emac-&gt;ndev,</div><div class='add'>+			    "not enough RX descriptors available %d &lt; %d\n",</div><div class='add'>+			    desc_avail, chn-&gt;descs_num);</div><div class='ctx'> </div><div class='del'>-		ret = prueth_dma_rx_push(emac, skb, chn);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			netdev_err(emac-&gt;ndev,</div><div class='del'>-				   "cannot submit skb for rx chan %s ret %d\n",</div><div class='del'>-				   chn-&gt;name, ret);</div><div class='del'>-			kfree_skb(skb);</div><div class='del'>-			return ret;</div><div class='add'>+	if (chn-&gt;xsk_pool) {</div><div class='add'>+		/* get pages from xsk_pool and push to RX ring</div><div class='add'>+		 * queue as much as possible</div><div class='add'>+		 */</div><div class='add'>+		ret = prueth_rx_alloc_zc(emac, desc_avail);</div><div class='add'>+		if (!ret)</div><div class='add'>+			goto recycle_alloc_pg;</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; desc_avail; i++) {</div><div class='add'>+			/* NOTE: we're not using memory efficiently here.</div><div class='add'>+			 * 1 full page (4KB?) used here instead of</div><div class='add'>+			 * PRUETH_MAX_PKT_SIZE (~1.5KB?)</div><div class='add'>+			 */</div><div class='add'>+			page = page_pool_dev_alloc_pages(chn-&gt;pg_pool);</div><div class='add'>+			if (!page) {</div><div class='add'>+				netdev_err(emac-&gt;ndev, "couldn't allocate rx page\n");</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto recycle_alloc_pg;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			ret = prueth_dma_rx_push_mapped(emac, chn, page, buf_size);</div><div class='add'>+			if (ret &lt; 0) {</div><div class='add'>+				netdev_err(emac-&gt;ndev,</div><div class='add'>+					   "cannot submit page for rx chan %s ret %d\n",</div><div class='add'>+					   chn-&gt;name, ret);</div><div class='add'>+				page_pool_recycle_direct(chn-&gt;pg_pool, page);</div><div class='add'>+				goto recycle_alloc_pg;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+recycle_alloc_pg:</div><div class='add'>+	prueth_reset_rx_chan(&amp;emac-&gt;rx_chns, PRUETH_MAX_RX_FLOWS, false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(prueth_prepare_rx_chan);</div><div class='ctx'> </div><div class='hunk'>@@ -980,7 +1536,7 @@ void prueth_reset_rx_chan(struct prueth_rx_chn *chn,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; num_flows; i++)</div><div class='ctx'> 		k3_udma_glue_reset_rx_chn(chn-&gt;rx_chn, i, chn,</div><div class='del'>-					  prueth_rx_cleanup, !!i);</div><div class='add'>+					  prueth_rx_cleanup);</div><div class='ctx'> 	if (disable)</div><div class='ctx'> 		k3_udma_glue_disable_rx_chn(chn-&gt;rx_chn);</div><div class='ctx'> }</div><div class='hunk'>@@ -992,15 +1548,13 @@ void icssg_ndo_tx_timeout(struct net_device *ndev, unsigned int txqueue)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(icssg_ndo_tx_timeout);</div><div class='ctx'> </div><div class='del'>-static int emac_set_ts_config(struct net_device *ndev, struct ifreq *ifr)</div><div class='add'>+int icssg_ndo_set_ts_config(struct net_device *ndev,</div><div class='add'>+			    struct kernel_hwtstamp_config *config,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='ctx'> </div><div class='del'>-	switch (config.tx_type) {</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 		emac-&gt;tx_ts_enabled = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1011,7 +1565,7 @@ static int emac_set_ts_config(struct net_device *ndev, struct ifreq *ifr)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (config.rx_filter) {</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		emac-&gt;rx_ts_enabled = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1031,43 +1585,28 @@ static int emac_set_ts_config(struct net_device *ndev, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='ctx'> 		emac-&gt;rx_ts_enabled = 1;</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(icssg_ndo_set_ts_config);</div><div class='ctx'> </div><div class='del'>-static int emac_get_ts_config(struct net_device *ndev, struct ifreq *ifr)</div><div class='add'>+int icssg_ndo_get_ts_config(struct net_device *ndev,</div><div class='add'>+			    struct kernel_hwtstamp_config *config)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-</div><div class='del'>-	config.flags = 0;</div><div class='del'>-	config.tx_type = emac-&gt;tx_ts_enabled ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='del'>-	config.rx_filter = emac-&gt;rx_ts_enabled ? HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-			    -EFAULT : 0;</div><div class='del'>-}</div><div class='add'>+	config-&gt;flags = 0;</div><div class='add'>+	config-&gt;tx_type = emac-&gt;tx_ts_enabled ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='add'>+	config-&gt;rx_filter = emac-&gt;rx_ts_enabled ? HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;</div><div class='ctx'> </div><div class='del'>-int icssg_ndo_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return emac_get_ts_config(ndev, ifr);</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return emac_set_ts_config(ndev, ifr);</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return phy_do_ioctl(ndev, ifr, cmd);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(icssg_ndo_ioctl);</div><div class='add'>+EXPORT_SYMBOL_GPL(icssg_ndo_get_ts_config);</div><div class='ctx'> </div><div class='ctx'> void icssg_ndo_get_stats64(struct net_device *ndev,</div><div class='ctx'> 			   struct rtnl_link_stats64 *stats)</div><div class='hunk'>@@ -1084,10 +1623,28 @@ void icssg_ndo_get_stats64(struct net_device *ndev,</div><div class='ctx'> 	stats-&gt;rx_over_errors = emac_get_stat_by_name(emac, "rx_over_errors");</div><div class='ctx'> 	stats-&gt;multicast      = emac_get_stat_by_name(emac, "rx_multicast_frames");</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_errors  = ndev-&gt;stats.rx_errors;</div><div class='del'>-	stats-&gt;rx_dropped = ndev-&gt;stats.rx_dropped;</div><div class='add'>+	stats-&gt;rx_errors  = ndev-&gt;stats.rx_errors +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_RX_ERROR") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_RX_EOF_SHORT_FRMERR") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_RX_B0_DROP_EARLY_EOF") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_RX_EXP_FRAG_Q_DROP") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_RX_FIFO_OVERRUN");</div><div class='add'>+	stats-&gt;rx_dropped = ndev-&gt;stats.rx_dropped +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_DROPPED_PKT") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_INF_PORT_DISABLED") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_INF_SAV") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_INF_SA_DL") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_INF_PORT_BLOCKED") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_INF_DROP_TAGGED") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_INF_DROP_PRIOTAGGED") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_INF_DROP_NOTAG") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_INF_DROP_NOTMEMBER");</div><div class='ctx'> 	stats-&gt;tx_errors  = ndev-&gt;stats.tx_errors;</div><div class='del'>-	stats-&gt;tx_dropped = ndev-&gt;stats.tx_dropped;</div><div class='add'>+	stats-&gt;tx_dropped = ndev-&gt;stats.tx_dropped +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_RTU_PKT_DROP") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_TX_DROPPED_PACKET") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_TX_TS_DROPPED_PACKET") +</div><div class='add'>+			    emac_get_stat_by_name(emac, "FW_TX_JUMBO_FRM_CUTOFF");</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(icssg_ndo_get_stats64);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssg/icssg_config.c b/drivers/net/ethernet/ti/icssg/icssg_config.c<br/>index 5d2491c2943a..3f8237c17d09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_config.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_config.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_config.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssg/icssg_config.c</a></div><div class='hunk'>@@ -66,6 +66,9 @@</div><div class='ctx'> #define FDB_GEN_CFG1		0x60</div><div class='ctx'> #define SMEM_VLAN_OFFSET	8</div><div class='ctx'> #define SMEM_VLAN_OFFSET_MASK	GENMASK(25, 8)</div><div class='add'>+#define FDB_HASH_SIZE_MASK	GENMASK(6, 3)</div><div class='add'>+#define FDB_HASH_SIZE_SHIFT	3</div><div class='add'>+#define FDB_HASH_SIZE		3</div><div class='ctx'> </div><div class='ctx'> #define FDB_GEN_CFG2		0x64</div><div class='ctx'> #define FDB_VLAN_EN		BIT(6)</div><div class='hunk'>@@ -288,8 +291,12 @@ static int prueth_fw_offload_buffer_setup(struct prueth_emac *emac)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	addr = lower_32_bits(prueth-&gt;msmcram.pa);</div><div class='del'>-	if (slice)</div><div class='del'>-		addr += PRUETH_NUM_BUF_POOLS * PRUETH_EMAC_BUF_POOL_SIZE;</div><div class='add'>+	if (slice) {</div><div class='add'>+		if (prueth-&gt;pdata.banked_ms_ram)</div><div class='add'>+			addr += MSMC_RAM_BANK_SIZE;</div><div class='add'>+		else</div><div class='add'>+			addr += PRUETH_SW_TOTAL_BUF_SIZE_PER_SLICE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (addr % SZ_64K) {</div><div class='ctx'> 		dev_warn(prueth-&gt;dev, "buffer pool needs to be 64KB aligned\n");</div><div class='hunk'>@@ -297,43 +304,66 @@ static int prueth_fw_offload_buffer_setup(struct prueth_emac *emac)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bpool_cfg = emac-&gt;dram.va + BUFFER_POOL_0_ADDR_OFFSET;</div><div class='del'>-	/* workaround for f/w bug. bpool 0 needs to be initialized */</div><div class='del'>-	for (i = 0; i &lt;  PRUETH_NUM_BUF_POOLS; i++) {</div><div class='add'>+</div><div class='add'>+	/* Configure buffer pools for forwarding buffers</div><div class='add'>+	 * - used by firmware to store packets to be forwarded to other port</div><div class='add'>+	 * - 8 total pools per slice</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt;  PRUETH_NUM_FWD_BUF_POOLS_PER_SLICE; i++) {</div><div class='ctx'> 		writel(addr, &amp;bpool_cfg[i].addr);</div><div class='del'>-		writel(PRUETH_EMAC_BUF_POOL_SIZE, &amp;bpool_cfg[i].len);</div><div class='del'>-		addr += PRUETH_EMAC_BUF_POOL_SIZE;</div><div class='add'>+		writel(PRUETH_SW_FWD_BUF_POOL_SIZE, &amp;bpool_cfg[i].len);</div><div class='add'>+		addr += PRUETH_SW_FWD_BUF_POOL_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!slice)</div><div class='del'>-		addr += PRUETH_NUM_BUF_POOLS * PRUETH_EMAC_BUF_POOL_SIZE;</div><div class='del'>-	else</div><div class='del'>-		addr += PRUETH_SW_NUM_BUF_POOLS_HOST * PRUETH_SW_BUF_POOL_SIZE_HOST;</div><div class='del'>-</div><div class='del'>-	for (i = PRUETH_NUM_BUF_POOLS;</div><div class='del'>-	     i &lt; 2 * PRUETH_SW_NUM_BUF_POOLS_HOST + PRUETH_NUM_BUF_POOLS;</div><div class='del'>-	     i++) {</div><div class='del'>-		/* The driver only uses first 4 queues per PRU so only initialize them */</div><div class='del'>-		if (i % PRUETH_SW_NUM_BUF_POOLS_HOST &lt; PRUETH_SW_NUM_BUF_POOLS_PER_PRU) {</div><div class='del'>-			writel(addr, &amp;bpool_cfg[i].addr);</div><div class='del'>-			writel(PRUETH_SW_BUF_POOL_SIZE_HOST, &amp;bpool_cfg[i].len);</div><div class='del'>-			addr += PRUETH_SW_BUF_POOL_SIZE_HOST;</div><div class='add'>+	/* Configure buffer pools for Local Injection buffers</div><div class='add'>+	 *  - used by firmware to store packets received from host core</div><div class='add'>+	 *  - 16 total pools per slice</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; PRUETH_NUM_LI_BUF_POOLS_PER_SLICE; i++) {</div><div class='add'>+		int cfg_idx = i + PRUETH_NUM_FWD_BUF_POOLS_PER_SLICE;</div><div class='add'>+</div><div class='add'>+		/* The driver only uses first 4 queues per PRU,</div><div class='add'>+		 * so only initialize buffer for them</div><div class='add'>+		 */</div><div class='add'>+		if ((i % PRUETH_NUM_LI_BUF_POOLS_PER_PORT_PER_SLICE)</div><div class='add'>+			 &lt; PRUETH_SW_USED_LI_BUF_POOLS_PER_PORT_PER_SLICE) {</div><div class='add'>+			writel(addr, &amp;bpool_cfg[cfg_idx].addr);</div><div class='add'>+			writel(PRUETH_SW_LI_BUF_POOL_SIZE,</div><div class='add'>+			       &amp;bpool_cfg[cfg_idx].len);</div><div class='add'>+			addr += PRUETH_SW_LI_BUF_POOL_SIZE;</div><div class='ctx'> 		} else {</div><div class='del'>-			writel(0, &amp;bpool_cfg[i].addr);</div><div class='del'>-			writel(0, &amp;bpool_cfg[i].len);</div><div class='add'>+			writel(0, &amp;bpool_cfg[cfg_idx].addr);</div><div class='add'>+			writel(0, &amp;bpool_cfg[cfg_idx].len);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!slice)</div><div class='del'>-		addr += PRUETH_SW_NUM_BUF_POOLS_HOST * PRUETH_SW_BUF_POOL_SIZE_HOST;</div><div class='del'>-	else</div><div class='del'>-		addr += PRUETH_EMAC_RX_CTX_BUF_SIZE;</div><div class='add'>+	/* Express RX buffer queue</div><div class='add'>+	 *  - used by firmware to store express packets to be transmitted</div><div class='add'>+	 *    to the host core</div><div class='add'>+	 */</div><div class='add'>+	rxq_ctx = emac-&gt;dram.va + HOST_RX_Q_EXP_CONTEXT_OFFSET;</div><div class='add'>+	for (i = 0; i &lt; 3; i++)</div><div class='add'>+		writel(addr, &amp;rxq_ctx-&gt;start[i]);</div><div class='ctx'> </div><div class='add'>+	addr += PRUETH_SW_HOST_EXP_BUF_POOL_SIZE;</div><div class='add'>+	writel(addr, &amp;rxq_ctx-&gt;end);</div><div class='add'>+</div><div class='add'>+	/* Pre-emptible RX buffer queue</div><div class='add'>+	 *  - used by firmware to store preemptible packets to be transmitted</div><div class='add'>+	 *    to the host core</div><div class='add'>+	 */</div><div class='ctx'> 	rxq_ctx = emac-&gt;dram.va + HOST_RX_Q_PRE_CONTEXT_OFFSET;</div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='ctx'> 		writel(addr, &amp;rxq_ctx-&gt;start[i]);</div><div class='ctx'> </div><div class='del'>-	addr += PRUETH_EMAC_RX_CTX_BUF_SIZE;</div><div class='del'>-	writel(addr - SZ_2K, &amp;rxq_ctx-&gt;end);</div><div class='add'>+	addr += PRUETH_SW_HOST_PRE_BUF_POOL_SIZE;</div><div class='add'>+	writel(addr, &amp;rxq_ctx-&gt;end);</div><div class='add'>+</div><div class='add'>+	/* Set pointer for default dropped packet write</div><div class='add'>+	 *  - used by firmware to temporarily store packet to be dropped</div><div class='add'>+	 */</div><div class='add'>+	rxq_ctx = emac-&gt;dram.va + DEFAULT_MSMC_Q_OFFSET;</div><div class='add'>+	writel(addr, &amp;rxq_ctx-&gt;start[0]);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -347,13 +377,13 @@ static int prueth_emac_buffer_setup(struct prueth_emac *emac)</div><div class='ctx'> 	u32 addr;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	/* Layout to have 64KB aligned buffer pool</div><div class='del'>-	 * |BPOOL0|BPOOL1|RX_CTX0|RX_CTX1|</div><div class='del'>-	 */</div><div class='del'>-</div><div class='ctx'> 	addr = lower_32_bits(prueth-&gt;msmcram.pa);</div><div class='del'>-	if (slice)</div><div class='del'>-		addr += PRUETH_NUM_BUF_POOLS * PRUETH_EMAC_BUF_POOL_SIZE;</div><div class='add'>+	if (slice) {</div><div class='add'>+		if (prueth-&gt;pdata.banked_ms_ram)</div><div class='add'>+			addr += MSMC_RAM_BANK_SIZE;</div><div class='add'>+		else</div><div class='add'>+			addr += PRUETH_EMAC_TOTAL_BUF_SIZE_PER_SLICE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (addr % SZ_64K) {</div><div class='ctx'> 		dev_warn(prueth-&gt;dev, "buffer pool needs to be 64KB aligned\n");</div><div class='hunk'>@@ -361,43 +391,70 @@ static int prueth_emac_buffer_setup(struct prueth_emac *emac)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bpool_cfg = emac-&gt;dram.va + BUFFER_POOL_0_ADDR_OFFSET;</div><div class='del'>-	/* workaround for f/w bug. bpool 0 needs to be initilalized */</div><div class='del'>-	writel(addr, &amp;bpool_cfg[0].addr);</div><div class='del'>-	writel(0, &amp;bpool_cfg[0].len);</div><div class='ctx'> </div><div class='del'>-	for (i = PRUETH_EMAC_BUF_POOL_START;</div><div class='del'>-	     i &lt; PRUETH_EMAC_BUF_POOL_START + PRUETH_NUM_BUF_POOLS;</div><div class='del'>-	     i++) {</div><div class='del'>-		writel(addr, &amp;bpool_cfg[i].addr);</div><div class='del'>-		writel(PRUETH_EMAC_BUF_POOL_SIZE, &amp;bpool_cfg[i].len);</div><div class='del'>-		addr += PRUETH_EMAC_BUF_POOL_SIZE;</div><div class='add'>+	/* Configure buffer pools for forwarding buffers</div><div class='add'>+	 *  - in mac mode - no forwarding so initialize all pools to 0</div><div class='add'>+	 *  - 8 total pools per slice</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt;  PRUETH_NUM_FWD_BUF_POOLS_PER_SLICE; i++) {</div><div class='add'>+		writel(0, &amp;bpool_cfg[i].addr);</div><div class='add'>+		writel(0, &amp;bpool_cfg[i].len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!slice)</div><div class='del'>-		addr += PRUETH_NUM_BUF_POOLS * PRUETH_EMAC_BUF_POOL_SIZE;</div><div class='del'>-	else</div><div class='del'>-		addr += PRUETH_EMAC_RX_CTX_BUF_SIZE * 2;</div><div class='add'>+	/* Configure buffer pools for Local Injection buffers</div><div class='add'>+	 *  - used by firmware to store packets received from host core</div><div class='add'>+	 *  - 16 total pools per slice</div><div class='add'>+	 */</div><div class='add'>+	bpool_cfg = emac-&gt;dram.va + BUFFER_POOL_0_ADDR_OFFSET;</div><div class='add'>+	for (i = 0; i &lt; PRUETH_NUM_LI_BUF_POOLS_PER_SLICE; i++) {</div><div class='add'>+		int cfg_idx = i + PRUETH_NUM_FWD_BUF_POOLS_PER_SLICE;</div><div class='add'>+</div><div class='add'>+		/* In EMAC mode, only first 4 buffers are used,</div><div class='add'>+		 * as 1 slice needs to handle only 1 port</div><div class='add'>+		 */</div><div class='add'>+		if (i &lt; PRUETH_EMAC_USED_LI_BUF_POOLS_PER_PORT_PER_SLICE) {</div><div class='add'>+			writel(addr, &amp;bpool_cfg[cfg_idx].addr);</div><div class='add'>+			writel(PRUETH_EMAC_LI_BUF_POOL_SIZE,</div><div class='add'>+			       &amp;bpool_cfg[cfg_idx].len);</div><div class='add'>+			addr += PRUETH_EMAC_LI_BUF_POOL_SIZE;</div><div class='add'>+		} else {</div><div class='add'>+			writel(0, &amp;bpool_cfg[cfg_idx].addr);</div><div class='add'>+			writel(0, &amp;bpool_cfg[cfg_idx].len);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Pre-emptible RX buffer queue */</div><div class='del'>-	rxq_ctx = emac-&gt;dram.va + HOST_RX_Q_PRE_CONTEXT_OFFSET;</div><div class='add'>+	/* Express RX buffer queue</div><div class='add'>+	 *  - used by firmware to store express packets to be transmitted</div><div class='add'>+	 *    to host core</div><div class='add'>+	 */</div><div class='add'>+	rxq_ctx = emac-&gt;dram.va + HOST_RX_Q_EXP_CONTEXT_OFFSET;</div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='ctx'> 		writel(addr, &amp;rxq_ctx-&gt;start[i]);</div><div class='ctx'> </div><div class='del'>-	addr += PRUETH_EMAC_RX_CTX_BUF_SIZE;</div><div class='add'>+	addr += PRUETH_EMAC_HOST_EXP_BUF_POOL_SIZE;</div><div class='ctx'> 	writel(addr, &amp;rxq_ctx-&gt;end);</div><div class='ctx'> </div><div class='del'>-	/* Express RX buffer queue */</div><div class='del'>-	rxq_ctx = emac-&gt;dram.va + HOST_RX_Q_EXP_CONTEXT_OFFSET;</div><div class='add'>+	/* Pre-emptible RX buffer queue</div><div class='add'>+	 *  - used by firmware to store preemptible packets to be transmitted</div><div class='add'>+	 *    to host core</div><div class='add'>+	 */</div><div class='add'>+	rxq_ctx = emac-&gt;dram.va + HOST_RX_Q_PRE_CONTEXT_OFFSET;</div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='ctx'> 		writel(addr, &amp;rxq_ctx-&gt;start[i]);</div><div class='ctx'> </div><div class='del'>-	addr += PRUETH_EMAC_RX_CTX_BUF_SIZE;</div><div class='add'>+	addr += PRUETH_EMAC_HOST_PRE_BUF_POOL_SIZE;</div><div class='ctx'> 	writel(addr, &amp;rxq_ctx-&gt;end);</div><div class='ctx'> </div><div class='add'>+	/* Set pointer for default dropped packet write</div><div class='add'>+	 *  - used by firmware to temporarily store packet to be dropped</div><div class='add'>+	 */</div><div class='add'>+	rxq_ctx = emac-&gt;dram.va + DEFAULT_MSMC_Q_OFFSET;</div><div class='add'>+	writel(addr, &amp;rxq_ctx-&gt;start[0]);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void icssg_init_emac_mode(struct prueth *prueth)</div><div class='add'>+void icssg_init_emac_mode(struct prueth *prueth)</div><div class='ctx'> {</div><div class='ctx'> 	/* When the device is configured as a bridge and it is being brought</div><div class='ctx'> 	 * back to the emac mode, the host mac address has to be set as 0.</div><div class='hunk'>@@ -406,12 +463,11 @@ static void icssg_init_emac_mode(struct prueth *prueth)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u8 mac[ETH_ALEN] = { 0 };</div><div class='ctx'> </div><div class='del'>-	if (prueth-&gt;emacs_initialized)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	/* Set VLAN TABLE address base */</div><div class='ctx'> 	regmap_update_bits(prueth-&gt;miig_rt, FDB_GEN_CFG1, SMEM_VLAN_OFFSET_MASK,</div><div class='ctx'> 			   addr &lt;&lt;  SMEM_VLAN_OFFSET);</div><div class='add'>+	regmap_update_bits(prueth-&gt;miig_rt, FDB_GEN_CFG1, FDB_HASH_SIZE_MASK,</div><div class='add'>+			   FDB_HASH_SIZE &lt;&lt; FDB_HASH_SIZE_SHIFT);</div><div class='ctx'> 	/* Set enable VLAN aware mode, and FDBs for all PRUs */</div><div class='ctx'> 	regmap_write(prueth-&gt;miig_rt, FDB_GEN_CFG2, (FDB_PRU0_EN | FDB_PRU1_EN | FDB_HOST_EN));</div><div class='ctx'> 	prueth-&gt;vlan_tbl = (struct prueth_vlan_tbl __force *)(prueth-&gt;shram.va +</div><div class='hunk'>@@ -423,18 +479,18 @@ static void icssg_init_emac_mode(struct prueth *prueth)</div><div class='ctx'> 	/* Clear host MAC address */</div><div class='ctx'> 	icssg_class_set_host_mac_addr(prueth-&gt;miig_rt, mac);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(icssg_init_emac_mode);</div><div class='ctx'> </div><div class='del'>-static void icssg_init_fw_offload_mode(struct prueth *prueth)</div><div class='add'>+void icssg_init_fw_offload_mode(struct prueth *prueth)</div><div class='ctx'> {</div><div class='ctx'> 	u32 addr = prueth-&gt;shram.pa + EMAC_ICSSG_SWITCH_DEFAULT_VLAN_TABLE_OFFSET;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (prueth-&gt;emacs_initialized)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	/* Set VLAN TABLE address base */</div><div class='ctx'> 	regmap_update_bits(prueth-&gt;miig_rt, FDB_GEN_CFG1, SMEM_VLAN_OFFSET_MASK,</div><div class='ctx'> 			   addr &lt;&lt;  SMEM_VLAN_OFFSET);</div><div class='add'>+	regmap_update_bits(prueth-&gt;miig_rt, FDB_GEN_CFG1, FDB_HASH_SIZE_MASK,</div><div class='add'>+			   FDB_HASH_SIZE &lt;&lt; FDB_HASH_SIZE_SHIFT);</div><div class='ctx'> 	/* Set enable VLAN aware mode, and FDBs for all PRUs */</div><div class='ctx'> 	regmap_write(prueth-&gt;miig_rt, FDB_GEN_CFG2, FDB_EN_ALL);</div><div class='ctx'> 	prueth-&gt;vlan_tbl = (struct prueth_vlan_tbl __force *)(prueth-&gt;shram.va +</div><div class='hunk'>@@ -448,6 +504,7 @@ static void icssg_init_fw_offload_mode(struct prueth *prueth)</div><div class='ctx'> 		icssg_class_set_host_mac_addr(prueth-&gt;miig_rt, prueth-&gt;hw_bridge_dev-&gt;dev_addr);</div><div class='ctx'> 	icssg_set_pvid(prueth, prueth-&gt;default_vlan, PRUETH_PORT_HOST);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(icssg_init_fw_offload_mode);</div><div class='ctx'> </div><div class='ctx'> int icssg_config(struct prueth *prueth, struct prueth_emac *emac, int slice)</div><div class='ctx'> {</div><div class='hunk'>@@ -455,11 +512,6 @@ int icssg_config(struct prueth *prueth, struct prueth_emac *emac, int slice)</div><div class='ctx'> 	struct icssg_flow_cfg __iomem *flow_cfg;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (prueth-&gt;is_switch_mode || prueth-&gt;is_hsr_offload_mode)</div><div class='del'>-		icssg_init_fw_offload_mode(prueth);</div><div class='del'>-	else</div><div class='del'>-		icssg_init_emac_mode(prueth);</div><div class='del'>-</div><div class='ctx'> 	memset_io(config, 0, TAS_GATE_MASK_LIST0);</div><div class='ctx'> 	icssg_miig_queues_init(prueth, slice);</div><div class='ctx'> </div><div class='hunk'>@@ -786,3 +838,27 @@ void icssg_set_pvid(struct prueth *prueth, u8 vid, u8 port)</div><div class='ctx'> 		writel(pvid, prueth-&gt;shram.va + EMAC_ICSSG_SWITCH_PORT0_DEFAULT_VLAN_OFFSET);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(icssg_set_pvid);</div><div class='add'>+</div><div class='add'>+int emac_fdb_flow_id_updated(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	struct mgmt_cmd_rsp fdb_cmd_rsp = { 0 };</div><div class='add'>+	int slice = prueth_emac_slice(emac);</div><div class='add'>+	struct mgmt_cmd fdb_cmd = { 0 };</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	fdb_cmd.header = ICSSG_FW_MGMT_CMD_HEADER;</div><div class='add'>+	fdb_cmd.type   = ICSSG_FW_MGMT_FDB_CMD_TYPE_RX_FLOW;</div><div class='add'>+	fdb_cmd.seqnum = ++(emac-&gt;prueth-&gt;icssg_hwcmdseq);</div><div class='add'>+	fdb_cmd.param  = 0;</div><div class='add'>+</div><div class='add'>+	fdb_cmd.param |= (slice &lt;&lt; 4);</div><div class='add'>+	fdb_cmd.cmd_args[0] = 0;</div><div class='add'>+</div><div class='add'>+	ret = icssg_send_fdb_msg(emac, &amp;fdb_cmd, &amp;fdb_cmd_rsp);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	WARN_ON(fdb_cmd.seqnum != fdb_cmd_rsp.seqnum);</div><div class='add'>+	return fdb_cmd_rsp.status == 1 ? 0 : -EINVAL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(emac_fdb_flow_id_updated);</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssg/icssg_config.h b/drivers/net/ethernet/ti/icssg/icssg_config.h<br/>index 92c2deaa3068..60d69744ffae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_config.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_config.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_config.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssg/icssg_config.h</a></div><div class='hunk'>@@ -26,21 +26,71 @@ struct icssg_flow_cfg {</div><div class='ctx'> #define PRUETH_MAX_RX_FLOWS	1	/* excluding default flow */</div><div class='ctx'> #define PRUETH_RX_FLOW_DATA	0</div><div class='ctx'> </div><div class='del'>-#define PRUETH_EMAC_BUF_POOL_SIZE	SZ_8K</div><div class='del'>-#define PRUETH_EMAC_POOLS_PER_SLICE	24</div><div class='del'>-#define PRUETH_EMAC_BUF_POOL_START	8</div><div class='del'>-#define PRUETH_NUM_BUF_POOLS	8</div><div class='del'>-#define PRUETH_EMAC_RX_CTX_BUF_SIZE	SZ_16K	/* per slice */</div><div class='del'>-#define MSMC_RAM_SIZE	\</div><div class='del'>-	(2 * (PRUETH_EMAC_BUF_POOL_SIZE * PRUETH_NUM_BUF_POOLS + \</div><div class='del'>-	 PRUETH_EMAC_RX_CTX_BUF_SIZE * 2))</div><div class='del'>-</div><div class='del'>-#define PRUETH_SW_BUF_POOL_SIZE_HOST	SZ_4K</div><div class='del'>-#define PRUETH_SW_NUM_BUF_POOLS_HOST	8</div><div class='del'>-#define PRUETH_SW_NUM_BUF_POOLS_PER_PRU 4</div><div class='del'>-#define MSMC_RAM_SIZE_SWITCH_MODE \</div><div class='del'>-	(MSMC_RAM_SIZE + \</div><div class='del'>-	(2 * PRUETH_SW_BUF_POOL_SIZE_HOST * PRUETH_SW_NUM_BUF_POOLS_HOST))</div><div class='add'>+/* Defines for forwarding path buffer pools:</div><div class='add'>+ *   - used by firmware to store packets to be forwarded to other port</div><div class='add'>+ *   - 8 total pools per slice</div><div class='add'>+ *   - only used in switch mode (as no forwarding in mac mode)</div><div class='add'>+ */</div><div class='add'>+#define PRUETH_NUM_FWD_BUF_POOLS_PER_SLICE			8</div><div class='add'>+#define PRUETH_SW_FWD_BUF_POOL_SIZE				(SZ_8K)</div><div class='add'>+</div><div class='add'>+/* Defines for local injection path buffer pools:</div><div class='add'>+ *   - used by firmware to store packets received from host core</div><div class='add'>+ *   - 16 total pools per slice</div><div class='add'>+ *   - 8 pools per port per slice and each slice handles both ports</div><div class='add'>+ *   - only 4 out of 8 pools used per port (as only 4 real QoS levels in ICSSG)</div><div class='add'>+ *   - switch mode: 8 total pools used</div><div class='add'>+ *   - mac mode:    4 total pools used</div><div class='add'>+ */</div><div class='add'>+#define PRUETH_NUM_LI_BUF_POOLS_PER_SLICE			16</div><div class='add'>+#define PRUETH_NUM_LI_BUF_POOLS_PER_PORT_PER_SLICE		8</div><div class='add'>+#define PRUETH_SW_LI_BUF_POOL_SIZE				SZ_4K</div><div class='add'>+#define PRUETH_SW_USED_LI_BUF_POOLS_PER_SLICE			8</div><div class='add'>+#define PRUETH_SW_USED_LI_BUF_POOLS_PER_PORT_PER_SLICE		4</div><div class='add'>+#define PRUETH_EMAC_LI_BUF_POOL_SIZE				SZ_8K</div><div class='add'>+#define PRUETH_EMAC_USED_LI_BUF_POOLS_PER_SLICE			4</div><div class='add'>+#define PRUETH_EMAC_USED_LI_BUF_POOLS_PER_PORT_PER_SLICE	4</div><div class='add'>+</div><div class='add'>+/* Defines for host egress path - express and preemptible buffers</div><div class='add'>+ *   - used by firmware to store express and preemptible packets</div><div class='add'>+ *     to be transmitted to host core</div><div class='add'>+ *   - used by both mac/switch modes</div><div class='add'>+ */</div><div class='add'>+#define PRUETH_SW_HOST_EXP_BUF_POOL_SIZE	SZ_16K</div><div class='add'>+#define PRUETH_SW_HOST_PRE_BUF_POOL_SIZE	(SZ_16K - SZ_2K)</div><div class='add'>+#define PRUETH_EMAC_HOST_EXP_BUF_POOL_SIZE	PRUETH_SW_HOST_EXP_BUF_POOL_SIZE</div><div class='add'>+#define PRUETH_EMAC_HOST_PRE_BUF_POOL_SIZE	PRUETH_SW_HOST_PRE_BUF_POOL_SIZE</div><div class='add'>+</div><div class='add'>+/* Buffer used by firmware to temporarily store packet to be dropped */</div><div class='add'>+#define PRUETH_SW_DROP_PKT_BUF_SIZE		SZ_2K</div><div class='add'>+#define PRUETH_EMAC_DROP_PKT_BUF_SIZE		PRUETH_SW_DROP_PKT_BUF_SIZE</div><div class='add'>+</div><div class='add'>+/* Total switch mode memory usage for buffers per slice */</div><div class='add'>+#define PRUETH_SW_TOTAL_BUF_SIZE_PER_SLICE \</div><div class='add'>+	(PRUETH_SW_FWD_BUF_POOL_SIZE * PRUETH_NUM_FWD_BUF_POOLS_PER_SLICE + \</div><div class='add'>+	 PRUETH_SW_LI_BUF_POOL_SIZE * PRUETH_SW_USED_LI_BUF_POOLS_PER_SLICE + \</div><div class='add'>+	 PRUETH_SW_HOST_EXP_BUF_POOL_SIZE + \</div><div class='add'>+	 PRUETH_SW_HOST_PRE_BUF_POOL_SIZE + \</div><div class='add'>+	 PRUETH_SW_DROP_PKT_BUF_SIZE)</div><div class='add'>+</div><div class='add'>+/* Total switch mode memory usage for all buffers */</div><div class='add'>+#define PRUETH_SW_TOTAL_BUF_SIZE \</div><div class='add'>+	(2 * PRUETH_SW_TOTAL_BUF_SIZE_PER_SLICE)</div><div class='add'>+</div><div class='add'>+/* Total mac mode memory usage for buffers per slice */</div><div class='add'>+#define PRUETH_EMAC_TOTAL_BUF_SIZE_PER_SLICE \</div><div class='add'>+	(PRUETH_EMAC_LI_BUF_POOL_SIZE * \</div><div class='add'>+	 PRUETH_EMAC_USED_LI_BUF_POOLS_PER_SLICE + \</div><div class='add'>+	 PRUETH_EMAC_HOST_EXP_BUF_POOL_SIZE + \</div><div class='add'>+	 PRUETH_EMAC_HOST_PRE_BUF_POOL_SIZE + \</div><div class='add'>+	 PRUETH_EMAC_DROP_PKT_BUF_SIZE)</div><div class='add'>+</div><div class='add'>+/* Total mac mode memory usage for all buffers */</div><div class='add'>+#define PRUETH_EMAC_TOTAL_BUF_SIZE \</div><div class='add'>+	(2 * PRUETH_EMAC_TOTAL_BUF_SIZE_PER_SLICE)</div><div class='add'>+</div><div class='add'>+/* Size of 1 bank of MSMC/OC_SRAM memory */</div><div class='add'>+#define MSMC_RAM_BANK_SIZE			SZ_256K</div><div class='ctx'> </div><div class='ctx'> #define PRUETH_SWITCH_FDB_MASK ((SIZE_OF_FDB / NUMBER_OF_FDB_BUCKET_ENTRIES) - 1)</div><div class='ctx'> </div><div class='hunk'>@@ -55,6 +105,7 @@ struct icssg_rxq_ctx {</div><div class='ctx'> #define ICSSG_FW_MGMT_FDB_CMD_TYPE	0x03</div><div class='ctx'> #define ICSSG_FW_MGMT_CMD_TYPE		0x04</div><div class='ctx'> #define ICSSG_FW_MGMT_PKT		0x80000000</div><div class='add'>+#define ICSSG_FW_MGMT_FDB_CMD_TYPE_RX_FLOW	0x05</div><div class='ctx'> </div><div class='ctx'> struct icssg_r30_cmd {</div><div class='ctx'> 	u32 cmd[4];</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssg/icssg_prueth.c b/drivers/net/ethernet/ti/icssg/icssg_prueth.c<br/>index 0556910938fa..f65041662173 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_prueth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_prueth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_prueth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssg/icssg_prueth.c</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/if_hsr.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io-64-nonatomic-hi-lo.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/syscon.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -46,9 +47,14 @@</div><div class='ctx'> 						 NETIF_F_HW_HSR_TAG_INS | \</div><div class='ctx'> 						 NETIF_F_HW_HSR_TAG_RM)</div><div class='ctx'> </div><div class='add'>+#define PRUETH_RX_DMA_ATTR			(DMA_ATTR_SKIP_CPU_SYNC |\</div><div class='add'>+						 DMA_ATTR_WEAK_ORDERING)</div><div class='add'>+</div><div class='ctx'> /* CTRLMMR_ICSSG_RGMII_CTRL register bits */</div><div class='ctx'> #define ICSSG_CTRL_RGMII_ID_MODE                BIT(24)</div><div class='ctx'> </div><div class='add'>+static void emac_adjust_link(struct net_device *ndev);</div><div class='add'>+</div><div class='ctx'> static int emac_get_tx_ts(struct prueth_emac *emac,</div><div class='ctx'> 			  struct emac_tx_ts_response *rsp)</div><div class='ctx'> {</div><div class='hunk'>@@ -124,101 +130,198 @@ static irqreturn_t prueth_tx_ts_irq(int irq, void *dev_id)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct icssg_firmwares icssg_hsr_firmwares[] = {</div><div class='del'>-	{</div><div class='del'>-		.pru = "ti-pruss/am65x-sr2-pru0-pruhsr-fw.elf",</div><div class='del'>-		.rtu = "ti-pruss/am65x-sr2-rtu0-pruhsr-fw.elf",</div><div class='del'>-		.txpru = "ti-pruss/am65x-sr2-txpru0-pruhsr-fw.elf",</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.pru = "ti-pruss/am65x-sr2-pru1-pruhsr-fw.elf",</div><div class='del'>-		.rtu = "ti-pruss/am65x-sr2-rtu1-pruhsr-fw.elf",</div><div class='del'>-		.txpru = "ti-pruss/am65x-sr2-txpru1-pruhsr-fw.elf",</div><div class='del'>-	}</div><div class='del'>-};</div><div class='add'>+static int prueth_start(struct rproc *rproc, const char *fw_name)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-static struct icssg_firmwares icssg_switch_firmwares[] = {</div><div class='del'>-	{</div><div class='del'>-		.pru = "ti-pruss/am65x-sr2-pru0-prusw-fw.elf",</div><div class='del'>-		.rtu = "ti-pruss/am65x-sr2-rtu0-prusw-fw.elf",</div><div class='del'>-		.txpru = "ti-pruss/am65x-sr2-txpru0-prusw-fw.elf",</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.pru = "ti-pruss/am65x-sr2-pru1-prusw-fw.elf",</div><div class='del'>-		.rtu = "ti-pruss/am65x-sr2-rtu1-prusw-fw.elf",</div><div class='del'>-		.txpru = "ti-pruss/am65x-sr2-txpru1-prusw-fw.elf",</div><div class='del'>-	}</div><div class='del'>-};</div><div class='add'>+	ret = rproc_set_firmware(rproc, fw_name);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	return rproc_boot(rproc);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static struct icssg_firmwares icssg_emac_firmwares[] = {</div><div class='del'>-	{</div><div class='del'>-		.pru = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",</div><div class='del'>-		.rtu = "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",</div><div class='del'>-		.txpru = "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		.pru = "ti-pruss/am65x-sr2-pru1-prueth-fw.elf",</div><div class='del'>-		.rtu = "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",</div><div class='del'>-		.txpru = "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf",</div><div class='del'>-	}</div><div class='del'>-};</div><div class='add'>+static void prueth_shutdown(struct rproc *rproc)</div><div class='add'>+{</div><div class='add'>+	rproc_shutdown(rproc);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static int prueth_emac_start(struct prueth *prueth, struct prueth_emac *emac)</div><div class='add'>+static int prueth_emac_start(struct prueth *prueth)</div><div class='ctx'> {</div><div class='ctx'> 	struct icssg_firmwares *firmwares;</div><div class='ctx'> 	struct device *dev = prueth-&gt;dev;</div><div class='del'>-	int slice, ret;</div><div class='add'>+	int ret, slice;</div><div class='ctx'> </div><div class='ctx'> 	if (prueth-&gt;is_switch_mode)</div><div class='del'>-		firmwares = icssg_switch_firmwares;</div><div class='del'>-	else if (prueth-&gt;is_hsr_offload_mode)</div><div class='del'>-		firmwares = icssg_hsr_firmwares;</div><div class='add'>+		firmwares = prueth-&gt;icssg_switch_firmwares;</div><div class='add'>+	else if (prueth-&gt;is_hsr_offload_mode &amp;&amp; HSR_V1 == prueth-&gt;hsr_prp_version)</div><div class='add'>+		firmwares = prueth-&gt;icssg_hsr_firmwares;</div><div class='add'>+	else if (prueth-&gt;is_hsr_offload_mode &amp;&amp; PRP_V1 == prueth-&gt;hsr_prp_version)</div><div class='add'>+		firmwares = prueth-&gt;icssg_prp_firmwares;</div><div class='ctx'> 	else</div><div class='del'>-		firmwares = icssg_emac_firmwares;</div><div class='add'>+		firmwares = prueth-&gt;icssg_emac_firmwares;</div><div class='ctx'> </div><div class='del'>-	slice = prueth_emac_slice(emac);</div><div class='del'>-	if (slice &lt; 0) {</div><div class='del'>-		netdev_err(emac-&gt;ndev, "invalid port\n");</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	for (slice = 0; slice &lt; PRUETH_NUM_MACS; slice++) {</div><div class='add'>+		ret = prueth_start(prueth-&gt;pru[slice], firmwares[slice].pru);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret);</div><div class='add'>+			goto unwind_slices;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = prueth_start(prueth-&gt;rtu[slice], firmwares[slice].rtu);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret);</div><div class='add'>+			rproc_shutdown(prueth-&gt;pru[slice]);</div><div class='add'>+			goto unwind_slices;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = prueth_start(prueth-&gt;txpru[slice], firmwares[slice].txpru);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "failed to boot TX_PRU%d: %d\n", slice, ret);</div><div class='add'>+			rproc_shutdown(prueth-&gt;rtu[slice]);</div><div class='add'>+			rproc_shutdown(prueth-&gt;pru[slice]);</div><div class='add'>+			goto unwind_slices;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = icssg_config(prueth, emac, slice);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='del'>-	ret = rproc_set_firmware(prueth-&gt;pru[slice], firmwares[slice].pru);</div><div class='del'>-	ret = rproc_boot(prueth-&gt;pru[slice]);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret);</div><div class='del'>-		return -EINVAL;</div><div class='add'>+unwind_slices:</div><div class='add'>+	while (--slice &gt;= 0) {</div><div class='add'>+		prueth_shutdown(prueth-&gt;txpru[slice]);</div><div class='add'>+		prueth_shutdown(prueth-&gt;rtu[slice]);</div><div class='add'>+		prueth_shutdown(prueth-&gt;pru[slice]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = rproc_set_firmware(prueth-&gt;rtu[slice], firmwares[slice].rtu);</div><div class='del'>-	ret = rproc_boot(prueth-&gt;rtu[slice]);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret);</div><div class='del'>-		goto halt_pru;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void prueth_emac_stop(struct prueth *prueth)</div><div class='add'>+{</div><div class='add'>+	int slice;</div><div class='add'>+</div><div class='add'>+	for (slice = 0; slice &lt; PRUETH_NUM_MACS; slice++) {</div><div class='add'>+		prueth_shutdown(prueth-&gt;txpru[slice]);</div><div class='add'>+		prueth_shutdown(prueth-&gt;rtu[slice]);</div><div class='add'>+		prueth_shutdown(prueth-&gt;pru[slice]);</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icssg_enable_fw_offload(struct prueth *prueth)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac;</div><div class='add'>+	int mac;</div><div class='ctx'> </div><div class='del'>-	ret = rproc_set_firmware(prueth-&gt;txpru[slice], firmwares[slice].txpru);</div><div class='del'>-	ret = rproc_boot(prueth-&gt;txpru[slice]);</div><div class='add'>+	for (mac = PRUETH_MAC0; mac &lt; PRUETH_NUM_MACS; mac++) {</div><div class='add'>+		emac = prueth-&gt;emac[mac];</div><div class='add'>+		if (prueth-&gt;is_hsr_offload_mode) {</div><div class='add'>+			if (emac-&gt;ndev-&gt;features &amp; NETIF_F_HW_HSR_TAG_RM)</div><div class='add'>+				icssg_set_port_state(emac, ICSSG_EMAC_HSR_RX_OFFLOAD_ENABLE);</div><div class='add'>+			else</div><div class='add'>+				icssg_set_port_state(emac, ICSSG_EMAC_HSR_RX_OFFLOAD_DISABLE);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (prueth-&gt;is_switch_mode || prueth-&gt;is_hsr_offload_mode) {</div><div class='add'>+			if (netif_running(emac-&gt;ndev)) {</div><div class='add'>+				icssg_fdb_add_del(emac, eth_stp_addr, prueth-&gt;default_vlan,</div><div class='add'>+						  ICSSG_FDB_ENTRY_P0_MEMBERSHIP |</div><div class='add'>+						  ICSSG_FDB_ENTRY_P1_MEMBERSHIP |</div><div class='add'>+						  ICSSG_FDB_ENTRY_P2_MEMBERSHIP |</div><div class='add'>+						  ICSSG_FDB_ENTRY_BLOCK,</div><div class='add'>+						  true);</div><div class='add'>+				icssg_vtbl_modify(emac, emac-&gt;port_vlan | DEFAULT_VID,</div><div class='add'>+						  BIT(emac-&gt;port_id) | DEFAULT_PORT_MASK,</div><div class='add'>+						  BIT(emac-&gt;port_id) | DEFAULT_UNTAG_MASK,</div><div class='add'>+						  true);</div><div class='add'>+				if (prueth-&gt;is_hsr_offload_mode)</div><div class='add'>+					icssg_vtbl_modify(emac, DEFAULT_VID,</div><div class='add'>+							  DEFAULT_PORT_MASK,</div><div class='add'>+							  DEFAULT_UNTAG_MASK, true);</div><div class='add'>+				icssg_set_pvid(prueth, emac-&gt;port_vlan, emac-&gt;port_id);</div><div class='add'>+				if (prueth-&gt;is_switch_mode)</div><div class='add'>+					icssg_set_port_state(emac, ICSSG_EMAC_PORT_VLAN_AWARE_ENABLE);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int prueth_emac_common_start(struct prueth *prueth)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int slice;</div><div class='add'>+</div><div class='add'>+	if (!prueth-&gt;emac[ICSS_SLICE0] &amp;&amp; !prueth-&gt;emac[ICSS_SLICE1])</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* clear SMEM and MSMC settings for all slices */</div><div class='add'>+	memset_io(prueth-&gt;msmcram.va, 0, prueth-&gt;msmcram.size);</div><div class='add'>+	memset_io(prueth-&gt;shram.va, 0, ICSSG_CONFIG_OFFSET_SLICE1 * PRUETH_NUM_MACS);</div><div class='add'>+</div><div class='add'>+	icssg_class_default(prueth-&gt;miig_rt, ICSS_SLICE0, 0, false);</div><div class='add'>+	icssg_class_default(prueth-&gt;miig_rt, ICSS_SLICE1, 0, false);</div><div class='add'>+</div><div class='add'>+	if (prueth-&gt;is_switch_mode || prueth-&gt;is_hsr_offload_mode)</div><div class='add'>+		icssg_init_fw_offload_mode(prueth);</div><div class='add'>+	else</div><div class='add'>+		icssg_init_emac_mode(prueth);</div><div class='add'>+</div><div class='add'>+	for (slice = 0; slice &lt; PRUETH_NUM_MACS; slice++) {</div><div class='add'>+		emac = prueth-&gt;emac[slice];</div><div class='add'>+		if (!emac)</div><div class='add'>+			continue;</div><div class='add'>+		ret = icssg_config(prueth, emac, slice);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto disable_class;</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;emac-&gt;ndev-&gt;phydev-&gt;lock);</div><div class='add'>+		emac_adjust_link(emac-&gt;ndev);</div><div class='add'>+		mutex_unlock(&amp;emac-&gt;ndev-&gt;phydev-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = prueth_emac_start(prueth);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto disable_class;</div><div class='add'>+</div><div class='add'>+	emac = prueth-&gt;emac[ICSS_SLICE0] ? prueth-&gt;emac[ICSS_SLICE0] :</div><div class='add'>+	       prueth-&gt;emac[ICSS_SLICE1];</div><div class='add'>+	ret = icss_iep_init(emac-&gt;iep, &amp;prueth_iep_clockops,</div><div class='add'>+			    emac, IEP_DEFAULT_CYCLE_TIME_NS);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_err(dev, "failed to boot TX_PRU%d: %d\n", slice, ret);</div><div class='del'>-		goto halt_rtu;</div><div class='add'>+		dev_err(prueth-&gt;dev, "Failed to initialize IEP module\n");</div><div class='add'>+		goto stop_pruss;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	emac-&gt;fw_running = 1;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-halt_rtu:</div><div class='del'>-	rproc_shutdown(prueth-&gt;rtu[slice]);</div><div class='add'>+stop_pruss:</div><div class='add'>+	prueth_emac_stop(prueth);</div><div class='ctx'> </div><div class='del'>-halt_pru:</div><div class='del'>-	rproc_shutdown(prueth-&gt;pru[slice]);</div><div class='add'>+disable_class:</div><div class='add'>+	icssg_class_disable(prueth-&gt;miig_rt, ICSS_SLICE0);</div><div class='add'>+	icssg_class_disable(prueth-&gt;miig_rt, ICSS_SLICE1);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int prueth_emac_common_stop(struct prueth *prueth)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac;</div><div class='add'>+</div><div class='add'>+	if (!prueth-&gt;emac[ICSS_SLICE0] &amp;&amp; !prueth-&gt;emac[ICSS_SLICE1])</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	icssg_class_disable(prueth-&gt;miig_rt, ICSS_SLICE0);</div><div class='add'>+	icssg_class_disable(prueth-&gt;miig_rt, ICSS_SLICE1);</div><div class='add'>+</div><div class='add'>+	prueth_emac_stop(prueth);</div><div class='add'>+</div><div class='add'>+	emac = prueth-&gt;emac[ICSS_SLICE0] ? prueth-&gt;emac[ICSS_SLICE0] :</div><div class='add'>+	       prueth-&gt;emac[ICSS_SLICE1];</div><div class='add'>+	icss_iep_exit(emac-&gt;iep);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* called back by PHY layer if there is change in link state of hw port*/</div><div class='ctx'> static void emac_adjust_link(struct net_device *ndev)</div><div class='ctx'> {</div><div class='hunk'>@@ -292,7 +395,11 @@ static enum hrtimer_restart emac_rx_timer_callback(struct hrtimer *timer)</div><div class='ctx'> 			container_of(timer, struct prueth_emac, rx_hrtimer);</div><div class='ctx'> 	int rx_flow = PRUETH_RX_FLOW_DATA;</div><div class='ctx'> </div><div class='del'>-	enable_irq(emac-&gt;rx_chns.irq[rx_flow]);</div><div class='add'>+	if (emac-&gt;rx_chns.irq_disabled) {</div><div class='add'>+		/* re-enable the RX IRQ */</div><div class='add'>+		emac-&gt;rx_chns.irq_disabled = false;</div><div class='add'>+		enable_irq(emac-&gt;rx_chns.irq[rx_flow]);</div><div class='add'>+	}</div><div class='ctx'> 	return HRTIMER_NORESTART;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -373,9 +480,6 @@ static void prueth_iep_settime(void *clockops_data, u64 ns)</div><div class='ctx'> 	u32 cycletime;</div><div class='ctx'> 	int timeout;</div><div class='ctx'> </div><div class='del'>-	if (!emac-&gt;fw_running)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	sc_descp = emac-&gt;prueth-&gt;shram.va + TIMESYNC_FW_WC_SETCLOCK_DESC_OFFSET;</div><div class='ctx'> </div><div class='ctx'> 	cycletime = IEP_DEFAULT_CYCLE_TIME_NS;</div><div class='hunk'>@@ -411,6 +515,8 @@ static int prueth_perout_enable(void *clockops_data,</div><div class='ctx'> 	struct prueth_emac *emac = clockops_data;</div><div class='ctx'> 	u32 reduction_factor = 0, offset = 0;</div><div class='ctx'> 	struct timespec64 ts;</div><div class='add'>+	u64 current_cycle;</div><div class='add'>+	u64 start_offset;</div><div class='ctx'> 	u64 ns_period;</div><div class='ctx'> </div><div class='ctx'> 	if (!on)</div><div class='hunk'>@@ -449,8 +555,14 @@ static int prueth_perout_enable(void *clockops_data,</div><div class='ctx'> 	writel(reduction_factor, emac-&gt;prueth-&gt;shram.va +</div><div class='ctx'> 		TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET);</div><div class='ctx'> </div><div class='del'>-	writel(0, emac-&gt;prueth-&gt;shram.va +</div><div class='del'>-		TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET);</div><div class='add'>+	current_cycle = icssg_read_time(emac-&gt;prueth-&gt;shram.va +</div><div class='add'>+					TIMESYNC_FW_WC_CYCLECOUNT_OFFSET);</div><div class='add'>+</div><div class='add'>+	/* Rounding of current_cycle count to next second */</div><div class='add'>+	start_offset = roundup(current_cycle, MSEC_PER_SEC);</div><div class='add'>+</div><div class='add'>+	hi_lo_writeq(start_offset, emac-&gt;prueth-&gt;shram.va +</div><div class='add'>+		     TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -461,65 +573,305 @@ const struct icss_iep_clockops prueth_iep_clockops = {</div><div class='ctx'> 	.perout_enable = prueth_perout_enable,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void prueth_destroy_xdp_rxqs(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	struct xdp_rxq_info *rxq = &amp;emac-&gt;rx_chns.xdp_rxq;</div><div class='add'>+</div><div class='add'>+	if (xdp_rxq_info_is_reg(rxq))</div><div class='add'>+		xdp_rxq_info_unreg(rxq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int prueth_create_xdp_rxqs(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	struct xdp_rxq_info *rxq = &amp;emac-&gt;rx_chns.xdp_rxq;</div><div class='add'>+	struct page_pool *pool = emac-&gt;rx_chns.pg_pool;</div><div class='add'>+	struct prueth_rx_chn *rx_chn = &amp;emac-&gt;rx_chns;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xdp_rxq_info_reg(rxq, emac-&gt;ndev, 0, emac-&gt;napi_rx.napi_id);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (rx_chn-&gt;xsk_pool) {</div><div class='add'>+		ret = xdp_rxq_info_reg_mem_model(rxq, MEM_TYPE_XSK_BUFF_POOL, NULL);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto xdp_unreg;</div><div class='add'>+		xsk_pool_set_rxq_info(rx_chn-&gt;xsk_pool, rxq);</div><div class='add'>+	} else {</div><div class='add'>+		ret = xdp_rxq_info_reg_mem_model(rxq, MEM_TYPE_PAGE_POOL, pool);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto xdp_unreg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+xdp_unreg:</div><div class='add'>+	prueth_destroy_xdp_rxqs(emac);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int icssg_prueth_add_mcast(struct net_device *ndev, const u8 *addr)</div><div class='ctx'> {</div><div class='del'>-	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='del'>-	int port_mask = BIT(emac-&gt;port_id);</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+	struct prueth_emac *emac;</div><div class='add'>+	int port_mask;</div><div class='add'>+	u8 vlan_id;</div><div class='add'>+</div><div class='add'>+	vlan_id = is_vlan_dev(ndev) ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_MAC;</div><div class='add'>+	real_dev = is_vlan_dev(ndev) ? vlan_dev_real_dev(ndev) : ndev;</div><div class='add'>+	emac = netdev_priv(real_dev);</div><div class='ctx'> </div><div class='del'>-	port_mask |= icssg_fdb_lookup(emac, addr, 0);</div><div class='del'>-	icssg_fdb_add_del(emac, addr, 0, port_mask, true);</div><div class='del'>-	icssg_vtbl_modify(emac, 0, port_mask, port_mask, true);</div><div class='add'>+	port_mask = BIT(emac-&gt;port_id) | icssg_fdb_lookup(emac, addr, vlan_id);</div><div class='add'>+	icssg_fdb_add_del(emac, addr, vlan_id, port_mask, true);</div><div class='add'>+	icssg_vtbl_modify(emac, vlan_id, port_mask, port_mask, true);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int icssg_prueth_del_mcast(struct net_device *ndev, const u8 *addr)</div><div class='ctx'> {</div><div class='del'>-	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='del'>-	int port_mask = BIT(emac-&gt;port_id);</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+	struct prueth_emac *emac;</div><div class='ctx'> 	int other_port_mask;</div><div class='add'>+	int port_mask;</div><div class='add'>+	u8 vlan_id;</div><div class='add'>+</div><div class='add'>+	vlan_id = is_vlan_dev(ndev) ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_MAC;</div><div class='add'>+	real_dev = is_vlan_dev(ndev) ? vlan_dev_real_dev(ndev) : ndev;</div><div class='add'>+	emac = netdev_priv(real_dev);</div><div class='ctx'> </div><div class='del'>-	other_port_mask = port_mask ^ icssg_fdb_lookup(emac, addr, 0);</div><div class='add'>+	port_mask = BIT(emac-&gt;port_id);</div><div class='add'>+	other_port_mask = port_mask ^ icssg_fdb_lookup(emac, addr, vlan_id);</div><div class='ctx'> </div><div class='del'>-	icssg_fdb_add_del(emac, addr, 0, port_mask, false);</div><div class='del'>-	icssg_vtbl_modify(emac, 0, port_mask, port_mask, false);</div><div class='add'>+	icssg_fdb_add_del(emac, addr, vlan_id, port_mask, false);</div><div class='add'>+	icssg_vtbl_modify(emac, vlan_id, port_mask, port_mask, false);</div><div class='ctx'> </div><div class='ctx'> 	if (other_port_mask) {</div><div class='del'>-		icssg_fdb_add_del(emac, addr, 0, other_port_mask, true);</div><div class='del'>-		icssg_vtbl_modify(emac, 0, other_port_mask, other_port_mask, true);</div><div class='add'>+		icssg_fdb_add_del(emac, addr, vlan_id, other_port_mask, true);</div><div class='add'>+		icssg_vtbl_modify(emac, vlan_id, other_port_mask,</div><div class='add'>+				  other_port_mask, true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int icssg_prueth_hsr_add_mcast(struct net_device *ndev, const u8 *addr)</div><div class='add'>+static void icssg_prueth_hsr_fdb_add_del(struct prueth_emac *emac,</div><div class='add'>+					 const u8 *addr, u8 vid, bool add)</div><div class='ctx'> {</div><div class='del'>-	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='del'>-	struct prueth *prueth = emac-&gt;prueth;</div><div class='del'>-</div><div class='del'>-	icssg_fdb_add_del(emac, addr, prueth-&gt;default_vlan,</div><div class='add'>+	icssg_fdb_add_del(emac, addr, vid,</div><div class='ctx'> 			  ICSSG_FDB_ENTRY_P0_MEMBERSHIP |</div><div class='ctx'> 			  ICSSG_FDB_ENTRY_P1_MEMBERSHIP |</div><div class='ctx'> 			  ICSSG_FDB_ENTRY_P2_MEMBERSHIP |</div><div class='del'>-			  ICSSG_FDB_ENTRY_BLOCK, true);</div><div class='add'>+			  ICSSG_FDB_ENTRY_BLOCK, add);</div><div class='add'>+</div><div class='add'>+	if (add)</div><div class='add'>+		icssg_vtbl_modify(emac, vid, BIT(emac-&gt;port_id),</div><div class='add'>+				  BIT(emac-&gt;port_id), add);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int icssg_prueth_hsr_add_mcast(struct net_device *ndev, const u8 *addr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *real_dev, *port_dev;</div><div class='add'>+	struct prueth_emac *emac;</div><div class='add'>+	u8 vlan_id, i;</div><div class='add'>+</div><div class='add'>+	vlan_id = is_vlan_dev(ndev) ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_HSR;</div><div class='add'>+	real_dev = is_vlan_dev(ndev) ? vlan_dev_real_dev(ndev) : ndev;</div><div class='add'>+</div><div class='add'>+	if (is_hsr_master(real_dev)) {</div><div class='add'>+		for (i = HSR_PT_SLAVE_A; i &lt; HSR_PT_INTERLINK; i++) {</div><div class='add'>+			port_dev = hsr_get_port_ndev(real_dev, i);</div><div class='add'>+			emac = netdev_priv(port_dev);</div><div class='add'>+			if (!emac) {</div><div class='add'>+				dev_put(port_dev);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+			icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id,</div><div class='add'>+						     true);</div><div class='add'>+			dev_put(port_dev);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		emac = netdev_priv(real_dev);</div><div class='add'>+		icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id, true);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	icssg_vtbl_modify(emac, emac-&gt;port_vlan, BIT(emac-&gt;port_id),</div><div class='del'>-			  BIT(emac-&gt;port_id), true);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int icssg_prueth_hsr_del_mcast(struct net_device *ndev, const u8 *addr)</div><div class='ctx'> {</div><div class='del'>-	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='del'>-	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	struct net_device *real_dev, *port_dev;</div><div class='add'>+	struct prueth_emac *emac;</div><div class='add'>+	u8 vlan_id, i;</div><div class='add'>+</div><div class='add'>+	vlan_id = is_vlan_dev(ndev) ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_HSR;</div><div class='add'>+	real_dev = is_vlan_dev(ndev) ? vlan_dev_real_dev(ndev) : ndev;</div><div class='add'>+</div><div class='add'>+	if (is_hsr_master(real_dev)) {</div><div class='add'>+		for (i = HSR_PT_SLAVE_A; i &lt; HSR_PT_INTERLINK; i++) {</div><div class='add'>+			port_dev = hsr_get_port_ndev(real_dev, i);</div><div class='add'>+			emac = netdev_priv(port_dev);</div><div class='add'>+			if (!emac) {</div><div class='add'>+				dev_put(port_dev);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+			icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id,</div><div class='add'>+						     false);</div><div class='add'>+			dev_put(port_dev);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		emac = netdev_priv(real_dev);</div><div class='add'>+		icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id, false);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	icssg_fdb_add_del(emac, addr, prueth-&gt;default_vlan,</div><div class='del'>-			  ICSSG_FDB_ENTRY_P0_MEMBERSHIP |</div><div class='del'>-			  ICSSG_FDB_ENTRY_P1_MEMBERSHIP |</div><div class='del'>-			  ICSSG_FDB_ENTRY_P2_MEMBERSHIP |</div><div class='del'>-			  ICSSG_FDB_ENTRY_BLOCK, false);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int icssg_update_vlan_mcast(struct net_device *vdev, int vid,</div><div class='add'>+				   void *args)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = args;</div><div class='add'>+</div><div class='add'>+	if (!vdev || !vid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netif_addr_lock_bh(vdev);</div><div class='add'>+	__hw_addr_sync_multiple(&amp;emac-&gt;vlan_mcast_list[vid], &amp;vdev-&gt;mc,</div><div class='add'>+				vdev-&gt;addr_len);</div><div class='add'>+	netif_addr_unlock_bh(vdev);</div><div class='add'>+</div><div class='add'>+	if (emac-&gt;prueth-&gt;is_hsr_offload_mode)</div><div class='add'>+		__hw_addr_sync_dev(&amp;emac-&gt;vlan_mcast_list[vid], vdev,</div><div class='add'>+				   icssg_prueth_hsr_add_mcast,</div><div class='add'>+				   icssg_prueth_hsr_del_mcast);</div><div class='add'>+	else</div><div class='add'>+		__hw_addr_sync_dev(&amp;emac-&gt;vlan_mcast_list[vid], vdev,</div><div class='add'>+				   icssg_prueth_add_mcast,</div><div class='add'>+				   icssg_prueth_del_mcast);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void prueth_set_xsk_pool(struct prueth_emac *emac, u16 queue_id)</div><div class='add'>+{</div><div class='add'>+	struct prueth_tx_chn *tx_chn = &amp;emac-&gt;tx_chns[queue_id];</div><div class='add'>+	struct prueth_rx_chn *rx_chn = &amp;emac-&gt;rx_chns;</div><div class='add'>+</div><div class='add'>+	if (emac-&gt;xsk_qid != queue_id) {</div><div class='add'>+		rx_chn-&gt;xsk_pool = NULL;</div><div class='add'>+		tx_chn-&gt;xsk_pool = NULL;</div><div class='add'>+	} else {</div><div class='add'>+		rx_chn-&gt;xsk_pool = xsk_get_pool_from_qid(emac-&gt;ndev, queue_id);</div><div class='add'>+		tx_chn-&gt;xsk_pool = xsk_get_pool_from_qid(emac-&gt;ndev, queue_id);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void prueth_destroy_txq(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;emac-&gt;tdown_cnt, emac-&gt;tx_ch_num);</div><div class='add'>+	/* ensure new tdown_cnt value is visible */</div><div class='add'>+	smp_mb__after_atomic();</div><div class='add'>+	/* tear down and disable UDMA channels */</div><div class='add'>+	reinit_completion(&amp;emac-&gt;tdown_complete);</div><div class='add'>+	for (i = 0; i &lt; emac-&gt;tx_ch_num; i++)</div><div class='add'>+		k3_udma_glue_tdown_tx_chn(emac-&gt;tx_chns[i].tx_chn, false);</div><div class='add'>+</div><div class='add'>+	ret = wait_for_completion_timeout(&amp;emac-&gt;tdown_complete,</div><div class='add'>+					  msecs_to_jiffies(1000));</div><div class='add'>+	if (!ret)</div><div class='add'>+		netdev_err(emac-&gt;ndev, "tx teardown timeout\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; emac-&gt;tx_ch_num; i++) {</div><div class='add'>+		napi_disable(&amp;emac-&gt;tx_chns[i].napi_tx);</div><div class='add'>+		hrtimer_cancel(&amp;emac-&gt;tx_chns[i].tx_hrtimer);</div><div class='add'>+		k3_udma_glue_reset_tx_chn(emac-&gt;tx_chns[i].tx_chn,</div><div class='add'>+					  &amp;emac-&gt;tx_chns[i],</div><div class='add'>+					  prueth_tx_cleanup);</div><div class='add'>+		k3_udma_glue_disable_tx_chn(emac-&gt;tx_chns[i].tx_chn);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void prueth_destroy_rxq(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	/* tear down and disable UDMA channels */</div><div class='add'>+	reinit_completion(&amp;emac-&gt;tdown_complete);</div><div class='add'>+	k3_udma_glue_tdown_rx_chn(emac-&gt;rx_chns.rx_chn, true);</div><div class='add'>+</div><div class='add'>+	/* When RX DMA Channel Teardown is initiated, it will result in an</div><div class='add'>+	 * interrupt and a Teardown Completion Marker (TDCM) is queued into</div><div class='add'>+	 * the RX Completion queue. Acknowledging the interrupt involves</div><div class='add'>+	 * popping the TDCM descriptor from the RX Completion queue via the</div><div class='add'>+	 * RX NAPI Handler. To avoid timing out when waiting for the TDCM to</div><div class='add'>+	 * be popped, schedule the RX NAPI handler to run immediately.</div><div class='add'>+	 */</div><div class='add'>+	if (!napi_if_scheduled_mark_missed(&amp;emac-&gt;napi_rx)) {</div><div class='add'>+		if (napi_schedule_prep(&amp;emac-&gt;napi_rx))</div><div class='add'>+			__napi_schedule(&amp;emac-&gt;napi_rx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = wait_for_completion_timeout(&amp;emac-&gt;tdown_complete,</div><div class='add'>+					  msecs_to_jiffies(1000));</div><div class='add'>+	if (!ret)</div><div class='add'>+		netdev_err(emac-&gt;ndev, "rx teardown timeout\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PRUETH_MAX_RX_FLOWS; i++) {</div><div class='add'>+		napi_disable(&amp;emac-&gt;napi_rx);</div><div class='add'>+		hrtimer_cancel(&amp;emac-&gt;rx_hrtimer);</div><div class='add'>+		k3_udma_glue_reset_rx_chn(emac-&gt;rx_chns.rx_chn, i,</div><div class='add'>+					  &amp;emac-&gt;rx_chns,</div><div class='add'>+					  prueth_rx_cleanup);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prueth_destroy_xdp_rxqs(emac);</div><div class='add'>+	k3_udma_glue_disable_rx_chn(emac-&gt;rx_chns.rx_chn);</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static int prueth_create_txq(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; emac-&gt;tx_ch_num; i++) {</div><div class='add'>+		ret = k3_udma_glue_enable_tx_chn(emac-&gt;tx_chns[i].tx_chn);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto reset_tx_chan;</div><div class='add'>+		napi_enable(&amp;emac-&gt;tx_chns[i].napi_tx);</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+reset_tx_chan:</div><div class='add'>+	/* Since interface is not yet up, there is wouldn't be</div><div class='add'>+	 * any SKB for completion. So set false to free_skb</div><div class='add'>+	 */</div><div class='add'>+	prueth_reset_tx_chan(emac, i, false);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int prueth_create_rxq(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = prueth_prepare_rx_chan(emac, &amp;emac-&gt;rx_chns, PRUETH_MAX_PKT_SIZE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = k3_udma_glue_enable_rx_chn(emac-&gt;rx_chns.rx_chn);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto reset_rx_chn;</div><div class='add'>+</div><div class='add'>+	ret = prueth_create_xdp_rxqs(emac);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto reset_rx_chn;</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;emac-&gt;napi_rx);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+reset_rx_chn:</div><div class='add'>+	prueth_reset_rx_chan(&amp;emac-&gt;rx_chns, PRUETH_MAX_RX_FLOWS, false);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -533,24 +885,18 @@ static int icssg_prueth_hsr_del_mcast(struct net_device *ndev, const u8 *addr)</div><div class='ctx'> static int emac_ndo_open(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='del'>-	int ret, i, num_data_chn = emac-&gt;tx_ch_num;</div><div class='add'>+	int ret, num_data_chn = emac-&gt;tx_ch_num;</div><div class='add'>+	struct icssg_flow_cfg __iomem *flow_cfg;</div><div class='ctx'> 	struct prueth *prueth = emac-&gt;prueth;</div><div class='ctx'> 	int slice = prueth_emac_slice(emac);</div><div class='ctx'> 	struct device *dev = prueth-&gt;dev;</div><div class='ctx'> 	int max_rx_flows;</div><div class='ctx'> 	int rx_flow;</div><div class='ctx'> </div><div class='del'>-	/* clear SMEM and MSMC settings for all slices */</div><div class='del'>-	if (!prueth-&gt;emacs_initialized) {</div><div class='del'>-		memset_io(prueth-&gt;msmcram.va, 0, prueth-&gt;msmcram.size);</div><div class='del'>-		memset_io(prueth-&gt;shram.va, 0, ICSSG_CONFIG_OFFSET_SLICE1 * PRUETH_NUM_MACS);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* set h/w MAC as user might have re-configured */</div><div class='ctx'> 	ether_addr_copy(emac-&gt;mac_addr, ndev-&gt;dev_addr);</div><div class='ctx'> </div><div class='ctx'> 	icssg_class_set_mac_addr(prueth-&gt;miig_rt, slice, emac-&gt;mac_addr);</div><div class='del'>-	icssg_class_default(prueth-&gt;miig_rt, slice, 0, false);</div><div class='ctx'> 	icssg_ft1_set_mac_addr(prueth-&gt;miig_rt, slice, emac-&gt;mac_addr);</div><div class='ctx'> </div><div class='ctx'> 	/* Notify the stack of the actual queue counts. */</div><div class='hunk'>@@ -560,6 +906,7 @@ static int emac_ndo_open(struct net_device *ndev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	emac-&gt;xsk_qid = -EINVAL;</div><div class='ctx'> 	init_completion(&amp;emac-&gt;cmd_complete);</div><div class='ctx'> 	ret = prueth_init_tx_chns(emac);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -588,42 +935,37 @@ static int emac_ndo_open(struct net_device *ndev)</div><div class='ctx'> 		goto cleanup_napi;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* reset and start PRU firmware */</div><div class='del'>-	ret = prueth_emac_start(prueth, emac);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto free_rx_irq;</div><div class='add'>+	if (!prueth-&gt;emacs_initialized) {</div><div class='add'>+		ret = prueth_emac_common_start(prueth);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto free_rx_irq;</div><div class='add'>+		icssg_enable_fw_offload(prueth);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	icssg_mii_update_mtu(prueth-&gt;mii_rt, slice, ndev-&gt;max_mtu);</div><div class='add'>+	flow_cfg = emac-&gt;dram.va + ICSSG_CONFIG_OFFSET + PSI_L_REGULAR_FLOW_ID_BASE_OFFSET;</div><div class='add'>+	writew(emac-&gt;rx_flow_id_base, &amp;flow_cfg-&gt;rx_base_flow);</div><div class='add'>+	ret = emac_fdb_flow_id_updated(emac);</div><div class='ctx'> </div><div class='del'>-	if (!prueth-&gt;emacs_initialized) {</div><div class='del'>-		ret = icss_iep_init(emac-&gt;iep, &amp;prueth_iep_clockops,</div><div class='del'>-				    emac, IEP_DEFAULT_CYCLE_TIME_NS);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "Failed to update Rx Flow ID %d", ret);</div><div class='add'>+		goto stop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	icssg_mii_update_mtu(prueth-&gt;mii_rt, slice, ndev-&gt;max_mtu);</div><div class='add'>+</div><div class='ctx'> 	ret = request_threaded_irq(emac-&gt;tx_ts_irq, NULL, prueth_tx_ts_irq,</div><div class='ctx'> 				   IRQF_ONESHOT, dev_name(dev), emac);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto stop;</div><div class='ctx'> </div><div class='ctx'> 	/* Prepare RX */</div><div class='del'>-	ret = prueth_prepare_rx_chan(emac, &amp;emac-&gt;rx_chns, PRUETH_MAX_PKT_SIZE);</div><div class='add'>+	ret = prueth_create_rxq(emac);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto free_tx_ts_irq;</div><div class='ctx'> </div><div class='del'>-	ret = k3_udma_glue_enable_rx_chn(emac-&gt;rx_chns.rx_chn);</div><div class='add'>+	ret = prueth_create_txq(emac);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto reset_rx_chn;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; emac-&gt;tx_ch_num; i++) {</div><div class='del'>-		ret = k3_udma_glue_enable_tx_chn(emac-&gt;tx_chns[i].tx_chn);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto reset_tx_chan;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Enable NAPI in Tx and Rx direction */</div><div class='del'>-	for (i = 0; i &lt; emac-&gt;tx_ch_num; i++)</div><div class='del'>-		napi_enable(&amp;emac-&gt;tx_chns[i].napi_tx);</div><div class='del'>-	napi_enable(&amp;emac-&gt;napi_rx);</div><div class='add'>+		goto destroy_rxq;</div><div class='ctx'> </div><div class='ctx'> 	/* start PHY */</div><div class='ctx'> 	phy_start(ndev-&gt;phydev);</div><div class='hunk'>@@ -634,17 +976,13 @@ static int emac_ndo_open(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-reset_tx_chan:</div><div class='del'>-	/* Since interface is not yet up, there is wouldn't be</div><div class='del'>-	 * any SKB for completion. So set false to free_skb</div><div class='del'>-	 */</div><div class='del'>-	prueth_reset_tx_chan(emac, i, false);</div><div class='del'>-reset_rx_chn:</div><div class='del'>-	prueth_reset_rx_chan(&amp;emac-&gt;rx_chns, max_rx_flows, false);</div><div class='add'>+destroy_rxq:</div><div class='add'>+	prueth_destroy_rxq(emac);</div><div class='ctx'> free_tx_ts_irq:</div><div class='ctx'> 	free_irq(emac-&gt;tx_ts_irq, emac);</div><div class='ctx'> stop:</div><div class='del'>-	prueth_emac_stop(emac);</div><div class='add'>+	if (!prueth-&gt;emacs_initialized)</div><div class='add'>+		prueth_emac_common_stop(prueth);</div><div class='ctx'> free_rx_irq:</div><div class='ctx'> 	free_irq(emac-&gt;rx_chns.irq[rx_flow], emac);</div><div class='ctx'> cleanup_napi:</div><div class='hunk'>@@ -669,9 +1007,6 @@ static int emac_ndo_stop(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='ctx'> 	struct prueth *prueth = emac-&gt;prueth;</div><div class='del'>-	int rx_flow = PRUETH_RX_FLOW_DATA;</div><div class='del'>-	int max_rx_flows;</div><div class='del'>-	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	/* inform the upper layers. */</div><div class='ctx'> 	netif_tx_stop_all_queues(ndev);</div><div class='hunk'>@@ -680,57 +1015,29 @@ static int emac_ndo_stop(struct net_device *ndev)</div><div class='ctx'> 	if (ndev-&gt;phydev)</div><div class='ctx'> 		phy_stop(ndev-&gt;phydev);</div><div class='ctx'> </div><div class='del'>-	icssg_class_disable(prueth-&gt;miig_rt, prueth_emac_slice(emac));</div><div class='del'>-</div><div class='ctx'> 	if (emac-&gt;prueth-&gt;is_hsr_offload_mode)</div><div class='ctx'> 		__dev_mc_unsync(ndev, icssg_prueth_hsr_del_mcast);</div><div class='ctx'> 	else</div><div class='ctx'> 		__dev_mc_unsync(ndev, icssg_prueth_del_mcast);</div><div class='ctx'> </div><div class='del'>-	atomic_set(&amp;emac-&gt;tdown_cnt, emac-&gt;tx_ch_num);</div><div class='del'>-	/* ensure new tdown_cnt value is visible */</div><div class='del'>-	smp_mb__after_atomic();</div><div class='del'>-	/* tear down and disable UDMA channels */</div><div class='del'>-	reinit_completion(&amp;emac-&gt;tdown_complete);</div><div class='del'>-	for (i = 0; i &lt; emac-&gt;tx_ch_num; i++)</div><div class='del'>-		k3_udma_glue_tdown_tx_chn(emac-&gt;tx_chns[i].tx_chn, false);</div><div class='del'>-</div><div class='del'>-	ret = wait_for_completion_timeout(&amp;emac-&gt;tdown_complete,</div><div class='del'>-					  msecs_to_jiffies(1000));</div><div class='del'>-	if (!ret)</div><div class='del'>-		netdev_err(ndev, "tx teardown timeout\n");</div><div class='del'>-</div><div class='del'>-	prueth_reset_tx_chan(emac, emac-&gt;tx_ch_num, true);</div><div class='del'>-	for (i = 0; i &lt; emac-&gt;tx_ch_num; i++) {</div><div class='del'>-		napi_disable(&amp;emac-&gt;tx_chns[i].napi_tx);</div><div class='del'>-		hrtimer_cancel(&amp;emac-&gt;tx_chns[i].tx_hrtimer);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	max_rx_flows = PRUETH_MAX_RX_FLOWS;</div><div class='del'>-	k3_udma_glue_tdown_rx_chn(emac-&gt;rx_chns.rx_chn, true);</div><div class='del'>-</div><div class='del'>-	prueth_reset_rx_chan(&amp;emac-&gt;rx_chns, max_rx_flows, true);</div><div class='del'>-</div><div class='del'>-	napi_disable(&amp;emac-&gt;napi_rx);</div><div class='del'>-	hrtimer_cancel(&amp;emac-&gt;rx_hrtimer);</div><div class='add'>+	prueth_destroy_txq(emac);</div><div class='add'>+	prueth_destroy_rxq(emac);</div><div class='ctx'> </div><div class='ctx'> 	cancel_work_sync(&amp;emac-&gt;rx_mode_work);</div><div class='ctx'> </div><div class='ctx'> 	/* Destroying the queued work in ndo_stop() */</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;emac-&gt;stats_work);</div><div class='ctx'> </div><div class='del'>-	if (prueth-&gt;emacs_initialized == 1)</div><div class='del'>-		icss_iep_exit(emac-&gt;iep);</div><div class='del'>-</div><div class='ctx'> 	/* stop PRUs */</div><div class='del'>-	prueth_emac_stop(emac);</div><div class='add'>+	if (prueth-&gt;emacs_initialized == 1)</div><div class='add'>+		prueth_emac_common_stop(prueth);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(emac-&gt;tx_ts_irq, emac);</div><div class='ctx'> </div><div class='del'>-	free_irq(emac-&gt;rx_chns.irq[rx_flow], emac);</div><div class='add'>+	free_irq(emac-&gt;rx_chns.irq[PRUETH_RX_FLOW_DATA], emac);</div><div class='ctx'> 	prueth_ndev_del_tx_napi(emac, emac-&gt;tx_ch_num);</div><div class='ctx'> </div><div class='del'>-	prueth_cleanup_rx_chns(emac, &amp;emac-&gt;rx_chns, max_rx_flows);</div><div class='add'>+	prueth_cleanup_rx_chns(emac, &amp;emac-&gt;rx_chns, PRUETH_MAX_RX_FLOWS);</div><div class='ctx'> 	prueth_cleanup_tx_chns(emac);</div><div class='ctx'> </div><div class='ctx'> 	prueth-&gt;emacs_initialized--;</div><div class='hunk'>@@ -763,12 +1070,22 @@ static void emac_ndo_set_rx_mode_work(struct work_struct *work)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (emac-&gt;prueth-&gt;is_hsr_offload_mode)</div><div class='add'>+	if (emac-&gt;prueth-&gt;is_hsr_offload_mode) {</div><div class='ctx'> 		__dev_mc_sync(ndev, icssg_prueth_hsr_add_mcast,</div><div class='ctx'> 			      icssg_prueth_hsr_del_mcast);</div><div class='del'>-	else</div><div class='add'>+		if (rtnl_trylock()) {</div><div class='add'>+			vlan_for_each(emac-&gt;prueth-&gt;hsr_dev,</div><div class='add'>+				      icssg_update_vlan_mcast, emac);</div><div class='add'>+			rtnl_unlock();</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='ctx'> 		__dev_mc_sync(ndev, icssg_prueth_add_mcast,</div><div class='ctx'> 			      icssg_prueth_del_mcast);</div><div class='add'>+		if (rtnl_trylock()) {</div><div class='add'>+			vlan_for_each(ndev, icssg_update_vlan_mcast, emac);</div><div class='add'>+			rtnl_unlock();</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -808,6 +1125,283 @@ static netdev_features_t emac_ndo_fix_features(struct net_device *ndev,</div><div class='ctx'> 	return features;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int emac_ndo_vlan_rx_add_vid(struct net_device *ndev,</div><div class='add'>+				    __be16 proto, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='add'>+	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	int port_mask = BIT(emac-&gt;port_id);</div><div class='add'>+	int untag_mask = 0;</div><div class='add'>+</div><div class='add'>+	if (prueth-&gt;is_hsr_offload_mode)</div><div class='add'>+		port_mask |= BIT(PRUETH_PORT_HOST);</div><div class='add'>+</div><div class='add'>+	__hw_addr_init(&amp;emac-&gt;vlan_mcast_list[vid]);</div><div class='add'>+	netdev_dbg(emac-&gt;ndev, "VID add vid:%u port_mask:%X untag_mask %X\n",</div><div class='add'>+		   vid, port_mask, untag_mask);</div><div class='add'>+</div><div class='add'>+	icssg_vtbl_modify(emac, vid, port_mask, untag_mask, true);</div><div class='add'>+	icssg_set_pvid(emac-&gt;prueth, vid, emac-&gt;port_id);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_ndo_vlan_rx_del_vid(struct net_device *ndev,</div><div class='add'>+				    __be16 proto, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='add'>+	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	int port_mask = BIT(emac-&gt;port_id);</div><div class='add'>+	int untag_mask = 0;</div><div class='add'>+</div><div class='add'>+	if (prueth-&gt;is_hsr_offload_mode)</div><div class='add'>+		port_mask = BIT(PRUETH_PORT_HOST);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(emac-&gt;ndev, "VID del vid:%u port_mask:%X untag_mask  %X\n",</div><div class='add'>+		   vid, port_mask, untag_mask);</div><div class='add'>+	icssg_vtbl_modify(emac, vid, port_mask, untag_mask, false);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * emac_xdp_xmit - Implements ndo_xdp_xmit</div><div class='add'>+ * @dev: netdev</div><div class='add'>+ * @n: number of frames</div><div class='add'>+ * @frames: array of XDP buffer pointers</div><div class='add'>+ * @flags: XDP extra info</div><div class='add'>+ *</div><div class='add'>+ * Return: number of frames successfully sent. Failed frames</div><div class='add'>+ * will be free'ed by XDP core.</div><div class='add'>+ *</div><div class='add'>+ * For error cases, a negative errno code is returned and no-frames</div><div class='add'>+ * are transmitted (caller must handle freeing frames).</div><div class='add'>+ **/</div><div class='add'>+static int emac_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,</div><div class='add'>+			 u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(dev);</div><div class='add'>+	struct net_device *ndev = emac-&gt;ndev;</div><div class='add'>+	struct netdev_queue *netif_txq;</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+	struct xdp_frame *xdpf;</div><div class='add'>+	unsigned int q_idx;</div><div class='add'>+	int nxmit = 0;</div><div class='add'>+	u32 err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	q_idx = cpu % emac-&gt;tx_ch_num;</div><div class='add'>+	netif_txq = netdev_get_tx_queue(ndev, q_idx);</div><div class='add'>+</div><div class='add'>+	if (unlikely(flags &amp; ~XDP_XMIT_FLAGS_MASK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	__netif_tx_lock(netif_txq, cpu);</div><div class='add'>+	for (i = 0; i &lt; n; i++) {</div><div class='add'>+		xdpf = frames[i];</div><div class='add'>+		err = emac_xmit_xdp_frame(emac, xdpf, q_idx,</div><div class='add'>+					  PRUETH_TX_BUFF_TYPE_XDP_NDO);</div><div class='add'>+		if (err != ICSSG_XDP_TX) {</div><div class='add'>+			ndev-&gt;stats.tx_dropped++;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		nxmit++;</div><div class='add'>+	}</div><div class='add'>+	__netif_tx_unlock(netif_txq);</div><div class='add'>+</div><div class='add'>+	return nxmit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * emac_xdp_setup - add/remove an XDP program</div><div class='add'>+ * @emac: emac device</div><div class='add'>+ * @bpf: XDP program</div><div class='add'>+ *</div><div class='add'>+ * Return: Always 0 (Success)</div><div class='add'>+ **/</div><div class='add'>+static int emac_xdp_setup(struct prueth_emac *emac, struct netdev_bpf *bpf)</div><div class='add'>+{</div><div class='add'>+	struct bpf_prog *prog = bpf-&gt;prog;</div><div class='add'>+</div><div class='add'>+	if (!emac-&gt;xdpi.prog &amp;&amp; !prog)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(emac-&gt;xdp_prog, prog);</div><div class='add'>+</div><div class='add'>+	xdp_attachment_setup(&amp;emac-&gt;xdpi, bpf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int prueth_xsk_pool_enable(struct prueth_emac *emac,</div><div class='add'>+				  struct xsk_buff_pool *pool, u16 queue_id)</div><div class='add'>+{</div><div class='add'>+	struct prueth_rx_chn *rx_chn = &amp;emac-&gt;rx_chns;</div><div class='add'>+	u32 frame_size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (queue_id &gt;= PRUETH_MAX_RX_FLOWS ||</div><div class='add'>+	    queue_id &gt;= emac-&gt;tx_ch_num) {</div><div class='add'>+		netdev_err(emac-&gt;ndev, "Invalid XSK queue ID %d\n", queue_id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	frame_size = xsk_pool_get_rx_frame_size(pool);</div><div class='add'>+	if (frame_size &lt; PRUETH_MAX_PKT_SIZE)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ret = xsk_pool_dma_map(pool, rx_chn-&gt;dma_dev, PRUETH_RX_DMA_ATTR);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(emac-&gt;ndev, "Failed to map XSK pool: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (netif_running(emac-&gt;ndev)) {</div><div class='add'>+		/* stop packets from wire for graceful teardown */</div><div class='add'>+		ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		prueth_destroy_rxq(emac);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emac-&gt;xsk_qid = queue_id;</div><div class='add'>+	prueth_set_xsk_pool(emac, queue_id);</div><div class='add'>+</div><div class='add'>+	if (netif_running(emac-&gt;ndev)) {</div><div class='add'>+		ret = prueth_create_rxq(emac);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(emac-&gt;ndev, "Failed to create RX queue: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD);</div><div class='add'>+		if (ret) {</div><div class='add'>+			prueth_destroy_rxq(emac);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		ret = prueth_xsk_wakeup(emac-&gt;ndev, queue_id, XDP_WAKEUP_RX);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int prueth_xsk_pool_disable(struct prueth_emac *emac, u16 queue_id)</div><div class='add'>+{</div><div class='add'>+	struct xsk_buff_pool *pool;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (queue_id &gt;= PRUETH_MAX_RX_FLOWS ||</div><div class='add'>+	    queue_id &gt;= emac-&gt;tx_ch_num) {</div><div class='add'>+		netdev_err(emac-&gt;ndev, "Invalid XSK queue ID %d\n", queue_id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (emac-&gt;xsk_qid != queue_id) {</div><div class='add'>+		netdev_err(emac-&gt;ndev, "XSK queue ID %d not registered\n", queue_id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pool = xsk_get_pool_from_qid(emac-&gt;ndev, queue_id);</div><div class='add'>+	if (!pool) {</div><div class='add'>+		netdev_err(emac-&gt;ndev, "No XSK pool registered for queue %d\n", queue_id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (netif_running(emac-&gt;ndev)) {</div><div class='add'>+		/* stop packets from wire for graceful teardown */</div><div class='add'>+		ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		prueth_destroy_rxq(emac);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xsk_pool_dma_unmap(pool, PRUETH_RX_DMA_ATTR);</div><div class='add'>+	emac-&gt;xsk_qid = -EINVAL;</div><div class='add'>+	prueth_set_xsk_pool(emac, queue_id);</div><div class='add'>+</div><div class='add'>+	if (netif_running(emac-&gt;ndev)) {</div><div class='add'>+		ret = prueth_create_rxq(emac);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(emac-&gt;ndev, "Failed to create RX queue: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD);</div><div class='add'>+		if (ret) {</div><div class='add'>+			prueth_destroy_rxq(emac);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * emac_ndo_bpf - implements ndo_bpf for icssg_prueth</div><div class='add'>+ * @ndev: network adapter device</div><div class='add'>+ * @bpf: XDP program</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ **/</div><div class='add'>+static int emac_ndo_bpf(struct net_device *ndev, struct netdev_bpf *bpf)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	switch (bpf-&gt;command) {</div><div class='add'>+	case XDP_SETUP_PROG:</div><div class='add'>+		return emac_xdp_setup(emac, bpf);</div><div class='add'>+	case XDP_SETUP_XSK_POOL:</div><div class='add'>+		return bpf-&gt;xsk.pool ?</div><div class='add'>+			prueth_xsk_pool_enable(emac, bpf-&gt;xsk.pool, bpf-&gt;xsk.queue_id) :</div><div class='add'>+			prueth_xsk_pool_disable(emac, bpf-&gt;xsk.queue_id);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int prueth_xsk_wakeup(struct net_device *ndev, u32 qid, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='add'>+	struct prueth_tx_chn *tx_chn = &amp;emac-&gt;tx_chns[qid];</div><div class='add'>+	struct prueth_rx_chn *rx_chn = &amp;emac-&gt;rx_chns;</div><div class='add'>+</div><div class='add'>+	if (emac-&gt;xsk_qid != qid) {</div><div class='add'>+		netdev_err(ndev, "XSK queue %d not registered\n", qid);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (qid &gt;= PRUETH_MAX_RX_FLOWS || qid &gt;= emac-&gt;tx_ch_num) {</div><div class='add'>+		netdev_err(ndev, "Invalid XSK queue ID %d\n", qid);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!tx_chn-&gt;xsk_pool) {</div><div class='add'>+		netdev_err(ndev, "XSK pool not registered for queue %d\n", qid);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!rx_chn-&gt;xsk_pool) {</div><div class='add'>+		netdev_err(ndev, "XSK pool not registered for RX queue %d\n", qid);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; XDP_WAKEUP_TX) {</div><div class='add'>+		if (!napi_if_scheduled_mark_missed(&amp;tx_chn-&gt;napi_tx)) {</div><div class='add'>+			if (likely(napi_schedule_prep(&amp;tx_chn-&gt;napi_tx)))</div><div class='add'>+				__napi_schedule(&amp;tx_chn-&gt;napi_tx);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; XDP_WAKEUP_RX) {</div><div class='add'>+		if (!napi_if_scheduled_mark_missed(&amp;emac-&gt;napi_rx)) {</div><div class='add'>+			if (likely(napi_schedule_prep(&amp;emac-&gt;napi_rx)))</div><div class='add'>+				__napi_schedule(&amp;emac-&gt;napi_rx);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops emac_netdev_ops = {</div><div class='ctx'> 	.ndo_open = emac_ndo_open,</div><div class='ctx'> 	.ndo_stop = emac_ndo_stop,</div><div class='hunk'>@@ -816,10 +1410,17 @@ static const struct net_device_ops emac_netdev_ops = {</div><div class='ctx'> 	.ndo_validate_addr = eth_validate_addr,</div><div class='ctx'> 	.ndo_tx_timeout = icssg_ndo_tx_timeout,</div><div class='ctx'> 	.ndo_set_rx_mode = emac_ndo_set_rx_mode,</div><div class='del'>-	.ndo_eth_ioctl = icssg_ndo_ioctl,</div><div class='add'>+	.ndo_eth_ioctl = phy_do_ioctl,</div><div class='ctx'> 	.ndo_get_stats64 = icssg_ndo_get_stats64,</div><div class='ctx'> 	.ndo_get_phys_port_name = icssg_ndo_get_phys_port_name,</div><div class='ctx'> 	.ndo_fix_features = emac_ndo_fix_features,</div><div class='add'>+	.ndo_vlan_rx_add_vid = emac_ndo_vlan_rx_add_vid,</div><div class='add'>+	.ndo_vlan_rx_kill_vid = emac_ndo_vlan_rx_del_vid,</div><div class='add'>+	.ndo_bpf = emac_ndo_bpf,</div><div class='add'>+	.ndo_xdp_xmit = emac_xdp_xmit,</div><div class='add'>+	.ndo_hwtstamp_get = icssg_ndo_get_ts_config,</div><div class='add'>+	.ndo_hwtstamp_set = icssg_ndo_set_ts_config,</div><div class='add'>+	.ndo_xsk_wakeup = prueth_xsk_wakeup,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int prueth_netdev_init(struct prueth *prueth,</div><div class='hunk'>@@ -848,6 +1449,8 @@ static int prueth_netdev_init(struct prueth *prueth,</div><div class='ctx'> 	emac-&gt;prueth = prueth;</div><div class='ctx'> 	emac-&gt;ndev = ndev;</div><div class='ctx'> 	emac-&gt;port_id = port;</div><div class='add'>+	emac-&gt;xdp_prog = NULL;</div><div class='add'>+	emac-&gt;ndev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;</div><div class='ctx'> 	emac-&gt;cmd_wq = create_singlethread_workqueue("icssg_cmd_wq");</div><div class='ctx'> 	if (!emac-&gt;cmd_wq) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -890,8 +1493,7 @@ static int prueth_netdev_init(struct prueth *prueth,</div><div class='ctx'> 	} else if (of_phy_is_fixed_link(eth_node)) {</div><div class='ctx'> 		ret = of_phy_register_fixed_link(eth_node);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			ret = dev_err_probe(prueth-&gt;dev, ret,</div><div class='del'>-					    "failed to register fixed-link phy\n");</div><div class='add'>+			dev_err_probe(prueth-&gt;dev, ret, "failed to register fixed-link phy\n");</div><div class='ctx'> 			goto free;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -947,13 +1549,17 @@ static int prueth_netdev_init(struct prueth *prueth,</div><div class='ctx'> 	ndev-&gt;netdev_ops = &amp;emac_netdev_ops;</div><div class='ctx'> 	ndev-&gt;ethtool_ops = &amp;icssg_ethtool_ops;</div><div class='ctx'> 	ndev-&gt;hw_features = NETIF_F_SG;</div><div class='del'>-	ndev-&gt;features = ndev-&gt;hw_features;</div><div class='add'>+	ndev-&gt;features = ndev-&gt;hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;</div><div class='ctx'> 	ndev-&gt;hw_features |= NETIF_PRUETH_HSR_OFFLOAD_FEATURES;</div><div class='add'>+	xdp_set_features_flag(ndev,</div><div class='add'>+			      NETDEV_XDP_ACT_BASIC |</div><div class='add'>+			      NETDEV_XDP_ACT_REDIRECT |</div><div class='add'>+			      NETDEV_XDP_ACT_NDO_XMIT |</div><div class='add'>+			      NETDEV_XDP_ACT_XSK_ZEROCOPY);</div><div class='ctx'> </div><div class='ctx'> 	netif_napi_add(ndev, &amp;emac-&gt;napi_rx, icssg_napi_rx_poll);</div><div class='del'>-	hrtimer_init(&amp;emac-&gt;rx_hrtimer, CLOCK_MONOTONIC,</div><div class='del'>-		     HRTIMER_MODE_REL_PINNED);</div><div class='del'>-	emac-&gt;rx_hrtimer.function = &amp;emac_rx_timer_callback;</div><div class='add'>+	hrtimer_setup(&amp;emac-&gt;rx_hrtimer, &amp;emac_rx_timer_callback, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL_PINNED);</div><div class='ctx'> 	prueth-&gt;emac[mac] = emac;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1001,10 +1607,11 @@ static void prueth_offload_fwd_mark_update(struct prueth *prueth)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void prueth_emac_restart(struct prueth *prueth)</div><div class='add'>+static int prueth_emac_restart(struct prueth *prueth)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_emac *emac0 = prueth-&gt;emac[PRUETH_MAC0];</div><div class='ctx'> 	struct prueth_emac *emac1 = prueth-&gt;emac[PRUETH_MAC1];</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Detach the net_device for both PRUeth ports*/</div><div class='ctx'> 	if (netif_running(emac0-&gt;ndev))</div><div class='hunk'>@@ -1013,66 +1620,47 @@ static void prueth_emac_restart(struct prueth *prueth)</div><div class='ctx'> 		netif_device_detach(emac1-&gt;ndev);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable both PRUeth ports */</div><div class='del'>-	icssg_set_port_state(emac0, ICSSG_EMAC_PORT_DISABLE);</div><div class='del'>-	icssg_set_port_state(emac1, ICSSG_EMAC_PORT_DISABLE);</div><div class='add'>+	ret = icssg_set_port_state(emac0, ICSSG_EMAC_PORT_DISABLE);</div><div class='add'>+	ret |= icssg_set_port_state(emac1, ICSSG_EMAC_PORT_DISABLE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Stop both pru cores for both PRUeth ports*/</div><div class='del'>-	prueth_emac_stop(emac0);</div><div class='del'>-	prueth-&gt;emacs_initialized--;</div><div class='del'>-	prueth_emac_stop(emac1);</div><div class='del'>-	prueth-&gt;emacs_initialized--;</div><div class='add'>+	ret = prueth_emac_common_stop(prueth);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(prueth-&gt;dev, "Failed to stop the firmwares");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Start both pru cores for both PRUeth ports */</div><div class='del'>-	prueth_emac_start(prueth, emac0);</div><div class='del'>-	prueth-&gt;emacs_initialized++;</div><div class='del'>-	prueth_emac_start(prueth, emac1);</div><div class='del'>-	prueth-&gt;emacs_initialized++;</div><div class='add'>+	ret = prueth_emac_common_start(prueth);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(prueth-&gt;dev, "Failed to start the firmwares");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable forwarding for both PRUeth ports */</div><div class='del'>-	icssg_set_port_state(emac0, ICSSG_EMAC_PORT_FORWARD);</div><div class='del'>-	icssg_set_port_state(emac1, ICSSG_EMAC_PORT_FORWARD);</div><div class='add'>+	ret = icssg_set_port_state(emac0, ICSSG_EMAC_PORT_FORWARD);</div><div class='add'>+	ret |= icssg_set_port_state(emac1, ICSSG_EMAC_PORT_FORWARD);</div><div class='ctx'> </div><div class='ctx'> 	/* Attache net_device for both PRUeth ports */</div><div class='ctx'> 	netif_device_attach(emac0-&gt;ndev);</div><div class='ctx'> 	netif_device_attach(emac1-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void icssg_change_mode(struct prueth *prueth)</div><div class='ctx'> {</div><div class='del'>-	struct prueth_emac *emac;</div><div class='del'>-	int mac;</div><div class='del'>-</div><div class='del'>-	prueth_emac_restart(prueth);</div><div class='del'>-</div><div class='del'>-	for (mac = PRUETH_MAC0; mac &lt; PRUETH_NUM_MACS; mac++) {</div><div class='del'>-		emac = prueth-&gt;emac[mac];</div><div class='del'>-		if (prueth-&gt;is_hsr_offload_mode) {</div><div class='del'>-			if (emac-&gt;ndev-&gt;features &amp; NETIF_F_HW_HSR_TAG_RM)</div><div class='del'>-				icssg_set_port_state(emac, ICSSG_EMAC_HSR_RX_OFFLOAD_ENABLE);</div><div class='del'>-			else</div><div class='del'>-				icssg_set_port_state(emac, ICSSG_EMAC_HSR_RX_OFFLOAD_DISABLE);</div><div class='del'>-		}</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-		if (netif_running(emac-&gt;ndev)) {</div><div class='del'>-			icssg_fdb_add_del(emac, eth_stp_addr, prueth-&gt;default_vlan,</div><div class='del'>-					  ICSSG_FDB_ENTRY_P0_MEMBERSHIP |</div><div class='del'>-					  ICSSG_FDB_ENTRY_P1_MEMBERSHIP |</div><div class='del'>-					  ICSSG_FDB_ENTRY_P2_MEMBERSHIP |</div><div class='del'>-					  ICSSG_FDB_ENTRY_BLOCK,</div><div class='del'>-					  true);</div><div class='del'>-			icssg_vtbl_modify(emac, emac-&gt;port_vlan | DEFAULT_VID,</div><div class='del'>-					  BIT(emac-&gt;port_id) | DEFAULT_PORT_MASK,</div><div class='del'>-					  BIT(emac-&gt;port_id) | DEFAULT_UNTAG_MASK,</div><div class='del'>-					  true);</div><div class='del'>-			if (prueth-&gt;is_hsr_offload_mode)</div><div class='del'>-				icssg_vtbl_modify(emac, DEFAULT_VID,</div><div class='del'>-						  DEFAULT_PORT_MASK,</div><div class='del'>-						  DEFAULT_UNTAG_MASK, true);</div><div class='del'>-			icssg_set_pvid(prueth, emac-&gt;port_vlan, emac-&gt;port_id);</div><div class='del'>-			if (prueth-&gt;is_switch_mode)</div><div class='del'>-				icssg_set_port_state(emac, ICSSG_EMAC_PORT_VLAN_AWARE_ENABLE);</div><div class='del'>-		}</div><div class='add'>+	ret = prueth_emac_restart(prueth);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(prueth-&gt;dev, "Failed to restart the firmwares, aborting the process");</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	icssg_enable_fw_offload(prueth);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int prueth_netdevice_port_link(struct net_device *ndev,</div><div class='hunk'>@@ -1106,7 +1694,7 @@ static int prueth_netdevice_port_link(struct net_device *ndev,</div><div class='ctx'> 		if (prueth-&gt;br_members &amp; BIT(PRUETH_PORT_MII0) &amp;&amp;</div><div class='ctx'> 		    prueth-&gt;br_members &amp; BIT(PRUETH_PORT_MII1)) {</div><div class='ctx'> 			prueth-&gt;is_switch_mode = true;</div><div class='del'>-			prueth-&gt;default_vlan = 1;</div><div class='add'>+			prueth-&gt;default_vlan = PRUETH_DFLT_VLAN_SW;</div><div class='ctx'> 			emac-&gt;port_vlan = prueth-&gt;default_vlan;</div><div class='ctx'> 			icssg_change_mode(prueth);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1121,13 +1709,18 @@ static void prueth_netdevice_port_unlink(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='ctx'> 	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	prueth-&gt;br_members &amp;= ~BIT(emac-&gt;port_id);</div><div class='ctx'> </div><div class='ctx'> 	if (prueth-&gt;is_switch_mode) {</div><div class='ctx'> 		prueth-&gt;is_switch_mode = false;</div><div class='ctx'> 		emac-&gt;port_vlan = 0;</div><div class='del'>-		prueth_emac_restart(prueth);</div><div class='add'>+		ret = prueth_emac_restart(prueth);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(prueth-&gt;dev, "Failed to restart the firmwares, aborting the process");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	prueth_offload_fwd_mark_update(prueth);</div><div class='hunk'>@@ -1159,7 +1752,7 @@ static int prueth_hsr_port_link(struct net_device *ndev)</div><div class='ctx'> 			      NETIF_PRUETH_HSR_OFFLOAD_FEATURES))</div><div class='ctx'> 				return -EOPNOTSUPP;</div><div class='ctx'> 			prueth-&gt;is_hsr_offload_mode = true;</div><div class='del'>-			prueth-&gt;default_vlan = 1;</div><div class='add'>+			prueth-&gt;default_vlan = PRUETH_DFLT_VLAN_HSR;</div><div class='ctx'> 			emac0-&gt;port_vlan = prueth-&gt;default_vlan;</div><div class='ctx'> 			emac1-&gt;port_vlan = prueth-&gt;default_vlan;</div><div class='ctx'> 			icssg_change_mode(prueth);</div><div class='hunk'>@@ -1176,6 +1769,7 @@ static void prueth_hsr_port_unlink(struct net_device *ndev)</div><div class='ctx'> 	struct prueth *prueth = emac-&gt;prueth;</div><div class='ctx'> 	struct prueth_emac *emac0;</div><div class='ctx'> 	struct prueth_emac *emac1;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	emac0 = prueth-&gt;emac[PRUETH_MAC0];</div><div class='ctx'> 	emac1 = prueth-&gt;emac[PRUETH_MAC1];</div><div class='hunk'>@@ -1186,7 +1780,11 @@ static void prueth_hsr_port_unlink(struct net_device *ndev)</div><div class='ctx'> 		emac0-&gt;port_vlan = 0;</div><div class='ctx'> 		emac1-&gt;port_vlan = 0;</div><div class='ctx'> 		prueth-&gt;hsr_dev = NULL;</div><div class='del'>-		prueth_emac_restart(prueth);</div><div class='add'>+		ret = prueth_emac_restart(prueth);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(prueth-&gt;dev, "Failed to restart the firmwares, aborting the process");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='ctx'> 		netdev_dbg(ndev, "Disabling HSR Offload mode\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1200,6 +1798,7 @@ static int prueth_netdevice_event(struct notifier_block *unused,</div><div class='ctx'> 	struct netdev_notifier_changeupper_info *info;</div><div class='ctx'> 	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='ctx'> 	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	enum hsr_version hsr_ndev_version;</div><div class='ctx'> 	int ret = NOTIFY_DONE;</div><div class='ctx'> </div><div class='ctx'> 	if (ndev-&gt;netdev_ops != &amp;emac_netdev_ops)</div><div class='hunk'>@@ -1211,6 +1810,11 @@ static int prueth_netdevice_event(struct notifier_block *unused,</div><div class='ctx'> </div><div class='ctx'> 		if ((ndev-&gt;features &amp; NETIF_PRUETH_HSR_OFFLOAD_FEATURES) &amp;&amp;</div><div class='ctx'> 		    is_hsr_master(info-&gt;upper_dev)) {</div><div class='add'>+			hsr_get_version(info-&gt;upper_dev, &amp;hsr_ndev_version);</div><div class='add'>+			if (hsr_ndev_version != HSR_V1 &amp;&amp; hsr_ndev_version != PRP_V1)</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			prueth-&gt;hsr_prp_version = hsr_ndev_version;</div><div class='add'>+</div><div class='ctx'> 			if (info-&gt;linking) {</div><div class='ctx'> 				if (!prueth-&gt;hsr_dev) {</div><div class='ctx'> 					prueth-&gt;hsr_dev = info-&gt;upper_dev;</div><div class='hunk'>@@ -1266,6 +1870,87 @@ static void prueth_unregister_notifiers(struct prueth *prueth)</div><div class='ctx'> 	unregister_netdevice_notifier(&amp;prueth-&gt;prueth_netdevice_nb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void icssg_read_firmware_names(struct device_node *np,</div><div class='add'>+				      struct icssg_firmwares *fw)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PRUETH_NUM_MACS; i++) {</div><div class='add'>+		of_property_read_string_index(np, "firmware-name", i * 3 + 0,</div><div class='add'>+					      &amp;fw[i].pru);</div><div class='add'>+		of_property_read_string_index(np, "firmware-name", i * 3 + 1,</div><div class='add'>+					      &amp;fw[i].rtu);</div><div class='add'>+		of_property_read_string_index(np, "firmware-name", i * 3 + 2,</div><div class='add'>+					      &amp;fw[i].txpru);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* icssg_firmware_name_replace - Replace a substring in firmware name</div><div class='add'>+ * @dev: device pointer for memory allocation</div><div class='add'>+ * @src: source firmware name string</div><div class='add'>+ * @from: substring to replace</div><div class='add'>+ * @to: replacement substring</div><div class='add'>+ *</div><div class='add'>+ * Return: a newly allocated string with the replacement, or the original</div><div class='add'>+ * string if replacement is not possible.</div><div class='add'>+ */</div><div class='add'>+static const char *icssg_firmware_name_replace(struct device *dev,</div><div class='add'>+					       const char *src,</div><div class='add'>+					       const char *from,</div><div class='add'>+					       const char *to)</div><div class='add'>+{</div><div class='add'>+	size_t prefix, from_len, to_len, total;</div><div class='add'>+	const char *p = strstr(src, from);</div><div class='add'>+	char *buf;</div><div class='add'>+</div><div class='add'>+	if (!p)</div><div class='add'>+		return src; /* fallback: no replacement, use original */</div><div class='add'>+</div><div class='add'>+	prefix = p - src;</div><div class='add'>+	from_len = strlen(from);</div><div class='add'>+	to_len = strlen(to);</div><div class='add'>+	total = strlen(src) - from_len + to_len + 1;</div><div class='add'>+</div><div class='add'>+	buf = devm_kzalloc(dev, total, GFP_KERNEL);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return src; /* fallback: allocation failed, use original */</div><div class='add'>+</div><div class='add'>+	strscpy(buf, src, prefix + 1);</div><div class='add'>+	strscpy(buf + prefix, to, to_len + 1);</div><div class='add'>+	strscpy(buf + prefix + to_len, p + from_len, total - prefix - to_len);</div><div class='add'>+</div><div class='add'>+	return buf;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * icssg_mode_firmware_names - Generate firmware names for a specific mode</div><div class='add'>+ * @dev: device pointer for logging and context</div><div class='add'>+ * @src: source array of firmware name structures</div><div class='add'>+ * @dst: destination array to store updated firmware name structures</div><div class='add'>+ * @from: substring in firmware names to be replaced</div><div class='add'>+ * @to: substring to replace @from in firmware names</div><div class='add'>+ *</div><div class='add'>+ * Iterates over all MACs and replaces occurrences of the @from substring</div><div class='add'>+ * with @to in the firmware names (pru, rtu, txpru) for each MAC. The</div><div class='add'>+ * updated firmware names are stored in the @dst array.</div><div class='add'>+ */</div><div class='add'>+static void icssg_mode_firmware_names(struct device *dev,</div><div class='add'>+				      struct icssg_firmwares *src,</div><div class='add'>+				      struct icssg_firmwares *dst,</div><div class='add'>+				      const char *from, const char *to)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PRUETH_NUM_MACS; i++) {</div><div class='add'>+		dst[i].pru = icssg_firmware_name_replace(dev, src[i].pru,</div><div class='add'>+							 from, to);</div><div class='add'>+		dst[i].rtu = icssg_firmware_name_replace(dev, src[i].rtu,</div><div class='add'>+							 from, to);</div><div class='add'>+		dst[i].txpru = icssg_firmware_name_replace(dev, src[i].txpru,</div><div class='add'>+							   from, to);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int prueth_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *eth_node, *eth_ports_node;</div><div class='hunk'>@@ -1283,6 +1968,9 @@ static int prueth_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	np = dev-&gt;of_node;</div><div class='ctx'> </div><div class='add'>+	BUILD_BUG_ON_MSG((sizeof(struct prueth_swdata) &gt; PRUETH_NAV_SW_DATA_SIZE),</div><div class='add'>+			 "insufficient SW_DATA size");</div><div class='add'>+</div><div class='ctx'> 	prueth = devm_kzalloc(dev, sizeof(*prueth), GFP_KERNEL);</div><div class='ctx'> 	if (!prueth)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -1361,13 +2049,10 @@ static int prueth_probe(struct platform_device *pdev)</div><div class='ctx'> 		prueth-&gt;pa_stats = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (eth0_node) {</div><div class='add'>+	if (eth0_node || eth1_node) {</div><div class='ctx'> 		ret = prueth_get_cores(prueth, ICSS_SLICE0, false);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto put_cores;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (eth1_node) {</div><div class='ctx'> 		ret = prueth_get_cores(prueth, ICSS_SLICE1, false);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto put_cores;</div><div class='hunk'>@@ -1398,10 +2083,15 @@ static int prueth_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto put_mem;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	msmc_ram_size = MSMC_RAM_SIZE;</div><div class='ctx'> 	prueth-&gt;is_switchmode_supported = prueth-&gt;pdata.switch_mode;</div><div class='del'>-	if (prueth-&gt;is_switchmode_supported)</div><div class='del'>-		msmc_ram_size = MSMC_RAM_SIZE_SWITCH_MODE;</div><div class='add'>+	if (prueth-&gt;pdata.banked_ms_ram) {</div><div class='add'>+		/* Reserve 2 MSMC RAM banks for buffers to avoid arbitration */</div><div class='add'>+		msmc_ram_size = (2 * MSMC_RAM_BANK_SIZE);</div><div class='add'>+	} else {</div><div class='add'>+		msmc_ram_size = PRUETH_EMAC_TOTAL_BUF_SIZE;</div><div class='add'>+		if (prueth-&gt;is_switchmode_supported)</div><div class='add'>+			msmc_ram_size = PRUETH_SW_TOTAL_BUF_SIZE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* NOTE: FW bug needs buffer base to be 64KB aligned */</div><div class='ctx'> 	prueth-&gt;msmcram.va =</div><div class='hunk'>@@ -1442,7 +2132,19 @@ static int prueth_probe(struct platform_device *pdev)</div><div class='ctx'> 		icss_iep_init_fw(prueth-&gt;iep1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Read EMAC firmware names from device tree */</div><div class='add'>+	icssg_read_firmware_names(np, prueth-&gt;icssg_emac_firmwares);</div><div class='add'>+</div><div class='add'>+	/* Generate other mode firmware names based on EMAC firmware names */</div><div class='add'>+	icssg_mode_firmware_names(dev, prueth-&gt;icssg_emac_firmwares,</div><div class='add'>+				  prueth-&gt;icssg_switch_firmwares, "eth", "sw");</div><div class='add'>+	icssg_mode_firmware_names(dev, prueth-&gt;icssg_emac_firmwares,</div><div class='add'>+				  prueth-&gt;icssg_hsr_firmwares, "eth", "hsr");</div><div class='add'>+	icssg_mode_firmware_names(dev, prueth-&gt;icssg_emac_firmwares,</div><div class='add'>+				  prueth-&gt;icssg_prp_firmwares, "eth", "prp");</div><div class='add'>+</div><div class='ctx'> 	spin_lock_init(&amp;prueth-&gt;vtbl_lock);</div><div class='add'>+	spin_lock_init(&amp;prueth-&gt;stats_lock);</div><div class='ctx'> 	/* setup netdev interfaces */</div><div class='ctx'> 	if (eth0_node) {</div><div class='ctx'> 		ret = prueth_netdev_init(prueth, eth0_node);</div><div class='hunk'>@@ -1557,7 +2259,8 @@ put_iep0:</div><div class='ctx'> </div><div class='ctx'> free_pool:</div><div class='ctx'> 	gen_pool_free(prueth-&gt;sram_pool,</div><div class='del'>-		      (unsigned long)prueth-&gt;msmcram.va, msmc_ram_size);</div><div class='add'>+		      (unsigned long)prueth-&gt;msmcram.va,</div><div class='add'>+		      prueth-&gt;msmcram.size);</div><div class='ctx'> </div><div class='ctx'> put_mem:</div><div class='ctx'> 	pruss_release_mem_region(prueth-&gt;pruss, &amp;prueth-&gt;shram);</div><div class='hunk'>@@ -1566,14 +2269,12 @@ put_pruss:</div><div class='ctx'> 	pruss_put(prueth-&gt;pruss);</div><div class='ctx'> </div><div class='ctx'> put_cores:</div><div class='del'>-	if (eth1_node) {</div><div class='del'>-		prueth_put_cores(prueth, ICSS_SLICE1);</div><div class='del'>-		of_node_put(eth1_node);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (eth0_node) {</div><div class='add'>+	if (eth0_node || eth1_node) {</div><div class='ctx'> 		prueth_put_cores(prueth, ICSS_SLICE0);</div><div class='ctx'> 		of_node_put(eth0_node);</div><div class='add'>+</div><div class='add'>+		prueth_put_cores(prueth, ICSS_SLICE1);</div><div class='add'>+		of_node_put(eth1_node);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1611,8 +2312,8 @@ static void prueth_remove(struct platform_device *pdev)</div><div class='ctx'> 	icss_iep_put(prueth-&gt;iep0);</div><div class='ctx'> </div><div class='ctx'> 	gen_pool_free(prueth-&gt;sram_pool,</div><div class='del'>-		      (unsigned long)prueth-&gt;msmcram.va,</div><div class='del'>-		      MSMC_RAM_SIZE);</div><div class='add'>+		(unsigned long)prueth-&gt;msmcram.va,</div><div class='add'>+		prueth-&gt;msmcram.size);</div><div class='ctx'> </div><div class='ctx'> 	pruss_release_mem_region(prueth-&gt;pruss, &amp;prueth-&gt;shram);</div><div class='ctx'> </div><div class='hunk'>@@ -1629,12 +2330,14 @@ static const struct prueth_pdata am654_icssg_pdata = {</div><div class='ctx'> 	.fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,</div><div class='ctx'> 	.quirk_10m_link_issue = 1,</div><div class='ctx'> 	.switch_mode = 1,</div><div class='add'>+	.banked_ms_ram = 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct prueth_pdata am64x_icssg_pdata = {</div><div class='ctx'> 	.fdqring_mode = K3_RINGACC_RING_MODE_RING,</div><div class='ctx'> 	.quirk_10m_link_issue = 1,</div><div class='ctx'> 	.switch_mode = 1,</div><div class='add'>+	.banked_ms_ram = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id prueth_dt_match[] = {</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssg/icssg_prueth.h b/drivers/net/ethernet/ti/icssg/icssg_prueth.h<br/>index 8722bb4a268a..10eadd356650 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_prueth.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_prueth.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_prueth.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssg/icssg_prueth.h</a></div><div class='hunk'>@@ -8,9 +8,12 @@</div><div class='ctx'> #ifndef __NET_TI_ICSSG_PRUETH_H</div><div class='ctx'> #define __NET_TI_ICSSG_PRUETH_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bpf.h&gt;</div><div class='add'>+#include &lt;linux/bpf_trace.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/genalloc.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/if_hsr.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/syscon.h&gt;</div><div class='hunk'>@@ -33,6 +36,10 @@</div><div class='ctx'> #include &lt;linux/dma/k3-udma-glue.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/devlink.h&gt;</div><div class='add'>+#include &lt;net/xdp.h&gt;</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='add'>+#include &lt;net/xsk_buff_pool.h&gt;</div><div class='add'>+#include &lt;net/xdp_sock_drv.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "icssg_config.h"</div><div class='ctx'> #include "icss_iep.h"</div><div class='hunk'>@@ -50,7 +57,7 @@</div><div class='ctx'> </div><div class='ctx'> #define ICSSG_MAX_RFLOWS	8	/* per slice */</div><div class='ctx'> </div><div class='del'>-#define ICSSG_NUM_PA_STATS	4</div><div class='add'>+#define ICSSG_NUM_PA_STATS	32</div><div class='ctx'> #define ICSSG_NUM_MIIG_STATS	60</div><div class='ctx'> /* Number of ICSSG related stats */</div><div class='ctx'> #define ICSSG_NUM_STATS (ICSSG_NUM_MIIG_STATS + ICSSG_NUM_PA_STATS)</div><div class='hunk'>@@ -83,6 +90,12 @@</div><div class='ctx'> #define ICSS_CMD_ADD_FILTER 0x7</div><div class='ctx'> #define ICSS_CMD_ADD_MAC 0x8</div><div class='ctx'> </div><div class='add'>+/* VLAN Filtering Related MACROs */</div><div class='add'>+#define PRUETH_DFLT_VLAN_HSR	1</div><div class='add'>+#define PRUETH_DFLT_VLAN_SW	1</div><div class='add'>+#define PRUETH_DFLT_VLAN_MAC	0</div><div class='add'>+#define MAX_VLAN_ID		256</div><div class='add'>+</div><div class='ctx'> /* In switch mode there are 3 real ports i.e. 3 mac addrs.</div><div class='ctx'>  * however Linux sees only the host side port. The other 2 ports</div><div class='ctx'>  * are the switch ports.</div><div class='hunk'>@@ -115,6 +128,8 @@ struct prueth_tx_chn {</div><div class='ctx'> 	char name[32];</div><div class='ctx'> 	struct hrtimer tx_hrtimer;</div><div class='ctx'> 	unsigned long tx_pace_timeout_ns;</div><div class='add'>+	struct xsk_buff_pool *xsk_pool;</div><div class='add'>+	bool irq_disabled;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct prueth_rx_chn {</div><div class='hunk'>@@ -125,6 +140,35 @@ struct prueth_rx_chn {</div><div class='ctx'> 	u32 descs_num;</div><div class='ctx'> 	unsigned int irq[ICSSG_MAX_RFLOWS];	/* separate irq per flow */</div><div class='ctx'> 	char name[32];</div><div class='add'>+	struct page_pool *pg_pool;</div><div class='add'>+	struct xdp_rxq_info xdp_rxq;</div><div class='add'>+	struct xsk_buff_pool *xsk_pool;</div><div class='add'>+	bool irq_disabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum prueth_swdata_type {</div><div class='add'>+	PRUETH_SWDATA_INVALID = 0,</div><div class='add'>+	PRUETH_SWDATA_SKB,</div><div class='add'>+	PRUETH_SWDATA_PAGE,</div><div class='add'>+	PRUETH_SWDATA_CMD,</div><div class='add'>+	PRUETH_SWDATA_XDPF,</div><div class='add'>+	PRUETH_SWDATA_XSK,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum prueth_tx_buff_type {</div><div class='add'>+	PRUETH_TX_BUFF_TYPE_XDP_TX,</div><div class='add'>+	PRUETH_TX_BUFF_TYPE_XDP_NDO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct prueth_swdata {</div><div class='add'>+	enum prueth_swdata_type type;</div><div class='add'>+	union prueth_data {</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+		struct page *page;</div><div class='add'>+		u32 cmd;</div><div class='add'>+		struct xdp_frame *xdpf;</div><div class='add'>+		struct xdp_buff *xdp;</div><div class='add'>+	} data;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* There are 4 Tx DMA channels, but the highest priority is CH3 (thread 3)</div><div class='hunk'>@@ -134,13 +178,18 @@ struct prueth_rx_chn {</div><div class='ctx'> </div><div class='ctx'> #define PRUETH_MAX_TX_TS_REQUESTS	50 /* Max simultaneous TX_TS requests */</div><div class='ctx'> </div><div class='add'>+/* XDP BPF state */</div><div class='add'>+#define ICSSG_XDP_PASS           0</div><div class='add'>+#define ICSSG_XDP_CONSUMED       BIT(0)</div><div class='add'>+#define ICSSG_XDP_TX             BIT(1)</div><div class='add'>+#define ICSSG_XDP_REDIR          BIT(2)</div><div class='add'>+</div><div class='ctx'> /* Minimum coalesce time in usecs for both Tx and Rx */</div><div class='ctx'> #define ICSSG_MIN_COALESCE_USECS 20</div><div class='ctx'> </div><div class='ctx'> /* data for each emac port */</div><div class='ctx'> struct prueth_emac {</div><div class='ctx'> 	bool is_sr1;</div><div class='del'>-	bool fw_running;</div><div class='ctx'> 	struct prueth *prueth;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	u8 mac_addr[6];</div><div class='hunk'>@@ -201,24 +250,35 @@ struct prueth_emac {</div><div class='ctx'> 	/* RX IRQ Coalescing Related */</div><div class='ctx'> 	struct hrtimer rx_hrtimer;</div><div class='ctx'> 	unsigned long rx_pace_timeout_ns;</div><div class='add'>+</div><div class='add'>+	struct netdev_hw_addr_list vlan_mcast_list[MAX_VLAN_ID];</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='add'>+	struct xdp_attachment_info xdpi;</div><div class='add'>+	int xsk_qid;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* The buf includes headroom compatible with both skb and xdpf */</div><div class='add'>+#define PRUETH_HEADROOM_NA (max(XDP_PACKET_HEADROOM, NET_SKB_PAD) + NET_IP_ALIGN)</div><div class='add'>+#define PRUETH_HEADROOM  ALIGN(PRUETH_HEADROOM_NA, sizeof(long))</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct prueth_pdata - PRUeth platform data</div><div class='ctx'>  * @fdqring_mode: Free desc queue mode</div><div class='ctx'>  * @quirk_10m_link_issue: 10M link detect errata</div><div class='ctx'>  * @switch_mode: switch firmware support</div><div class='add'>+ * @banked_ms_ram: banked memory support</div><div class='ctx'>  */</div><div class='ctx'> struct prueth_pdata {</div><div class='ctx'> 	enum k3_ring_mode fdqring_mode;</div><div class='ctx'> 	u32	quirk_10m_link_issue:1;</div><div class='ctx'> 	u32	switch_mode:1;</div><div class='add'>+	u32	banked_ms_ram:1;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct icssg_firmwares {</div><div class='del'>-	char *pru;</div><div class='del'>-	char *rtu;</div><div class='del'>-	char *txpru;</div><div class='add'>+	const char *pru;</div><div class='add'>+	const char *rtu;</div><div class='add'>+	const char *txpru;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -247,6 +307,7 @@ struct icssg_firmwares {</div><div class='ctx'>  * @vlan_tbl: VLAN-FID table pointer</div><div class='ctx'>  * @hw_bridge_dev: pointer to HW bridge net device</div><div class='ctx'>  * @hsr_dev: pointer to the HSR net device</div><div class='add'>+ * @hsr_prp_version: enum to store the protocol version of hsr master</div><div class='ctx'>  * @br_members: bitmask of bridge member ports</div><div class='ctx'>  * @hsr_members: bitmask of hsr member ports</div><div class='ctx'>  * @prueth_netdevice_nb: netdevice notifier block</div><div class='hunk'>@@ -257,6 +318,10 @@ struct icssg_firmwares {</div><div class='ctx'>  * @is_switchmode_supported: indicates platform support for switch mode</div><div class='ctx'>  * @switch_id: ID for mapping switch ports to bridge</div><div class='ctx'>  * @default_vlan: Default VLAN for host</div><div class='add'>+ * @icssg_emac_firmwares: Firmware names for EMAC mode, indexed per MAC</div><div class='add'>+ * @icssg_switch_firmwares: Firmware names for SWITCH mode, indexed per MAC</div><div class='add'>+ * @icssg_hsr_firmwares: Firmware names for HSR mode, indexed per MAC</div><div class='add'>+ * @icssg_prp_firmwares: Firmware names for PRP mode, indexed per MAC</div><div class='ctx'>  */</div><div class='ctx'> struct prueth {</div><div class='ctx'> 	struct device *dev;</div><div class='hunk'>@@ -286,6 +351,7 @@ struct prueth {</div><div class='ctx'> </div><div class='ctx'> 	struct net_device *hw_bridge_dev;</div><div class='ctx'> 	struct net_device *hsr_dev;</div><div class='add'>+	enum hsr_version hsr_prp_version;</div><div class='ctx'> 	u8 br_members;</div><div class='ctx'> 	u8 hsr_members;</div><div class='ctx'> 	struct notifier_block prueth_netdevice_nb;</div><div class='hunk'>@@ -298,6 +364,12 @@ struct prueth {</div><div class='ctx'> 	int default_vlan;</div><div class='ctx'> 	/** @vtbl_lock: Lock for vtbl in shared memory */</div><div class='ctx'> 	spinlock_t vtbl_lock;</div><div class='add'>+	/** @stats_lock: Lock for reading icssg stats */</div><div class='add'>+	spinlock_t stats_lock;</div><div class='add'>+	struct icssg_firmwares icssg_emac_firmwares[PRUETH_NUM_MACS];</div><div class='add'>+	struct icssg_firmwares icssg_switch_firmwares[PRUETH_NUM_MACS];</div><div class='add'>+	struct icssg_firmwares icssg_hsr_firmwares[PRUETH_NUM_MACS];</div><div class='add'>+	struct icssg_firmwares icssg_prp_firmwares[PRUETH_NUM_MACS];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct emac_tx_ts_response {</div><div class='hunk'>@@ -330,6 +402,18 @@ static inline int prueth_emac_slice(struct prueth_emac *emac)</div><div class='ctx'> extern const struct ethtool_ops icssg_ethtool_ops;</div><div class='ctx'> extern const struct dev_pm_ops prueth_dev_pm_ops;</div><div class='ctx'> </div><div class='add'>+static inline u64 icssg_read_time(const void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	u32 low, high;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		high = readl(addr + 4);</div><div class='add'>+		low = readl(addr);</div><div class='add'>+	} while (high != readl(addr + 4));</div><div class='add'>+</div><div class='add'>+	return low + ((u64)high &lt;&lt; 32);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Classifier helpers */</div><div class='ctx'> void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac);</div><div class='ctx'> void icssg_class_set_host_mac_addr(struct regmap *miig_rt, const u8 *mac);</div><div class='hunk'>@@ -349,6 +433,8 @@ int icssg_set_port_state(struct prueth_emac *emac,</div><div class='ctx'> 			 enum icssg_port_state_cmd state);</div><div class='ctx'> void icssg_config_set_speed(struct prueth_emac *emac);</div><div class='ctx'> void icssg_config_half_duplex(struct prueth_emac *emac);</div><div class='add'>+void icssg_init_emac_mode(struct prueth *prueth);</div><div class='add'>+void icssg_init_fw_offload_mode(struct prueth *prueth);</div><div class='ctx'> </div><div class='ctx'> /* Buffer queue helpers */</div><div class='ctx'> int icssg_queue_pop(struct prueth *prueth, u8 queue);</div><div class='hunk'>@@ -365,6 +451,7 @@ void icssg_vtbl_modify(struct prueth_emac *emac, u8 vid, u8 port_mask,</div><div class='ctx'> 		       u8 untag_mask, bool add);</div><div class='ctx'> u16 icssg_get_pvid(struct prueth_emac *emac);</div><div class='ctx'> void icssg_set_pvid(struct prueth *prueth, u8 vid, u8 port);</div><div class='add'>+int emac_fdb_flow_id_updated(struct prueth_emac *emac);</div><div class='ctx'> #define prueth_napi_to_tx_chn(pnapi) \</div><div class='ctx'> 	container_of(pnapi, struct prueth_tx_chn, napi_tx)</div><div class='ctx'> </div><div class='hunk'>@@ -388,14 +475,14 @@ int prueth_init_rx_chns(struct prueth_emac *emac,</div><div class='ctx'> 			struct prueth_rx_chn *rx_chn,</div><div class='ctx'> 			char *name, u32 max_rflows,</div><div class='ctx'> 			u32 max_desc_num);</div><div class='del'>-int prueth_dma_rx_push(struct prueth_emac *emac,</div><div class='del'>-		       struct sk_buff *skb,</div><div class='del'>-		       struct prueth_rx_chn *rx_chn);</div><div class='add'>+int prueth_dma_rx_push_mapped(struct prueth_emac *emac,</div><div class='add'>+			      struct prueth_rx_chn *rx_chn,</div><div class='add'>+			      struct page *page, u32 buf_len);</div><div class='add'>+unsigned int prueth_rxbuf_total_len(unsigned int len);</div><div class='ctx'> void emac_rx_timestamp(struct prueth_emac *emac,</div><div class='ctx'> 		       struct sk_buff *skb, u32 *psdata);</div><div class='ctx'> enum netdev_tx icssg_ndo_start_xmit(struct sk_buff *skb, struct net_device *ndev);</div><div class='ctx'> irqreturn_t prueth_rx_irq(int irq, void *dev_id);</div><div class='del'>-void prueth_emac_stop(struct prueth_emac *emac);</div><div class='ctx'> void prueth_cleanup_tx_ts(struct prueth_emac *emac);</div><div class='ctx'> int icssg_napi_rx_poll(struct napi_struct *napi_rx, int budget);</div><div class='ctx'> int prueth_prepare_rx_chan(struct prueth_emac *emac,</div><div class='hunk'>@@ -406,7 +493,11 @@ void prueth_reset_tx_chan(struct prueth_emac *emac, int ch_num,</div><div class='ctx'> void prueth_reset_rx_chan(struct prueth_rx_chn *chn,</div><div class='ctx'> 			  int num_flows, bool disable);</div><div class='ctx'> void icssg_ndo_tx_timeout(struct net_device *ndev, unsigned int txqueue);</div><div class='del'>-int icssg_ndo_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd);</div><div class='add'>+int icssg_ndo_get_ts_config(struct net_device *ndev,</div><div class='add'>+			    struct kernel_hwtstamp_config *config);</div><div class='add'>+int icssg_ndo_set_ts_config(struct net_device *ndev,</div><div class='add'>+			    struct kernel_hwtstamp_config *config,</div><div class='add'>+			    struct netlink_ext_ack *extack);</div><div class='ctx'> void icssg_ndo_get_stats64(struct net_device *ndev,</div><div class='ctx'> 			   struct rtnl_link_stats64 *stats);</div><div class='ctx'> int icssg_ndo_get_phys_port_name(struct net_device *ndev, char *name,</div><div class='hunk'>@@ -420,5 +511,16 @@ void prueth_put_cores(struct prueth *prueth, int slice);</div><div class='ctx'> </div><div class='ctx'> /* Revision specific helper */</div><div class='ctx'> u64 icssg_ts_to_ns(u32 hi_sw, u32 hi, u32 lo, u32 cycle_time_ns);</div><div class='add'>+u32 emac_xmit_xdp_frame(struct prueth_emac *emac,</div><div class='add'>+			struct xdp_frame *xdpf,</div><div class='add'>+			unsigned int q_idx,</div><div class='add'>+			enum prueth_tx_buff_type buff_type);</div><div class='add'>+void prueth_rx_cleanup(void *data, dma_addr_t desc_dma);</div><div class='add'>+void prueth_tx_cleanup(void *data, dma_addr_t desc_dma);</div><div class='add'>+int prueth_xsk_wakeup(struct net_device *ndev, u32 qid, u32 flags);</div><div class='add'>+static inline bool prueth_xdp_is_enabled(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	return !!READ_ONCE(emac-&gt;xdp_prog);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> #endif /* __NET_TI_ICSSG_PRUETH_H */</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c b/drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c<br/>index 5024f0647a0d..7bb4f0d850cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c</a></div><div class='hunk'>@@ -84,7 +84,7 @@ static int emac_send_command_sr1(struct prueth_emac *emac, u32 cmd)</div><div class='ctx'> 	__le32 *data = emac-&gt;cmd_data;</div><div class='ctx'> 	dma_addr_t desc_dma, buf_dma;</div><div class='ctx'> 	struct prueth_tx_chn *tx_chn;</div><div class='del'>-	void **swdata;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	u32 *epib;</div><div class='ctx'> </div><div class='hunk'>@@ -122,7 +122,8 @@ static int emac_send_command_sr1(struct prueth_emac *emac, u32 cmd)</div><div class='ctx'> </div><div class='ctx'> 	cppi5_hdesc_attach_buf(first_desc, buf_dma, pkt_len, buf_dma, pkt_len);</div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(first_desc);</div><div class='del'>-	*swdata = data;</div><div class='add'>+	swdata-&gt;type = PRUETH_SWDATA_CMD;</div><div class='add'>+	swdata-&gt;data.cmd = le32_to_cpu(data[0]);</div><div class='ctx'> </div><div class='ctx'> 	cppi5_hdesc_set_pktlen(first_desc, pkt_len);</div><div class='ctx'> 	desc_dma = k3_cppi_desc_pool_virt2dma(tx_chn-&gt;desc_pool, first_desc);</div><div class='hunk'>@@ -268,16 +269,16 @@ static int emac_phy_connect(struct prueth_emac *emac)</div><div class='ctx'>  * Returns skb pointer if packet found else NULL</div><div class='ctx'>  * Caller must free the returned skb.</div><div class='ctx'>  */</div><div class='del'>-static struct sk_buff *prueth_process_rx_mgm(struct prueth_emac *emac,</div><div class='del'>-					     u32 flow_id)</div><div class='add'>+static struct page *prueth_process_rx_mgm(struct prueth_emac *emac,</div><div class='add'>+					  u32 flow_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_rx_chn *rx_chn = &amp;emac-&gt;rx_mgm_chn;</div><div class='ctx'> 	struct net_device *ndev = emac-&gt;ndev;</div><div class='ctx'> 	struct cppi5_host_desc_t *desc_rx;</div><div class='del'>-	struct sk_buff *skb, *new_skb;</div><div class='add'>+	struct page *page, *new_page;</div><div class='add'>+	struct prueth_swdata *swdata;</div><div class='ctx'> 	dma_addr_t desc_dma, buf_dma;</div><div class='del'>-	u32 buf_dma_len, pkt_len;</div><div class='del'>-	void **swdata;</div><div class='add'>+	u32 buf_dma_len;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = k3_udma_glue_pop_rx_chn(rx_chn-&gt;rx_chn, flow_id, &amp;desc_dma);</div><div class='hunk'>@@ -299,34 +300,31 @@ static struct sk_buff *prueth_process_rx_mgm(struct prueth_emac *emac,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	swdata = cppi5_hdesc_get_swdata(desc_rx);</div><div class='del'>-	skb = *swdata;</div><div class='add'>+	page = swdata-&gt;data.page;</div><div class='ctx'> 	cppi5_hdesc_get_obuf(desc_rx, &amp;buf_dma, &amp;buf_dma_len);</div><div class='del'>-	pkt_len = cppi5_hdesc_get_pktlen(desc_rx);</div><div class='ctx'> </div><div class='ctx'> 	dma_unmap_single(rx_chn-&gt;dma_dev, buf_dma, buf_dma_len, DMA_FROM_DEVICE);</div><div class='ctx'> 	k3_cppi_desc_pool_free(rx_chn-&gt;desc_pool, desc_rx);</div><div class='ctx'> </div><div class='del'>-	new_skb = netdev_alloc_skb_ip_align(ndev, PRUETH_MAX_PKT_SIZE);</div><div class='add'>+	new_page = page_pool_dev_alloc_pages(rx_chn-&gt;pg_pool);</div><div class='ctx'> 	/* if allocation fails we drop the packet but push the</div><div class='ctx'> 	 * descriptor back to the ring with old skb to prevent a stall</div><div class='ctx'> 	 */</div><div class='del'>-	if (!new_skb) {</div><div class='add'>+	if (!new_page) {</div><div class='ctx'> 		netdev_err(ndev,</div><div class='del'>-			   "skb alloc failed, dropped mgm pkt from flow %d\n",</div><div class='add'>+			   "page alloc failed, dropped mgm pkt from flow %d\n",</div><div class='ctx'> 			   flow_id);</div><div class='del'>-		new_skb = skb;</div><div class='del'>-		skb = NULL;	/* return NULL */</div><div class='del'>-	} else {</div><div class='del'>-		/* return the filled skb */</div><div class='del'>-		skb_put(skb, pkt_len);</div><div class='add'>+		new_page = page;</div><div class='add'>+		page = NULL;	/* return NULL */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* queue another DMA */</div><div class='del'>-	ret = prueth_dma_rx_push(emac, new_skb, &amp;emac-&gt;rx_mgm_chn);</div><div class='add'>+	ret = prueth_dma_rx_push_mapped(emac, &amp;emac-&gt;rx_chns, new_page,</div><div class='add'>+					PRUETH_MAX_PKT_SIZE);</div><div class='ctx'> 	if (WARN_ON(ret &lt; 0))</div><div class='del'>-		dev_kfree_skb_any(new_skb);</div><div class='add'>+		page_pool_recycle_direct(rx_chn-&gt;pg_pool, new_page);</div><div class='ctx'> </div><div class='del'>-	return skb;</div><div class='add'>+	return page;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void prueth_tx_ts_sr1(struct prueth_emac *emac,</div><div class='hunk'>@@ -362,14 +360,14 @@ static void prueth_tx_ts_sr1(struct prueth_emac *emac,</div><div class='ctx'> static irqreturn_t prueth_rx_mgm_ts_thread_sr1(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_emac *emac = dev_id;</div><div class='del'>-	struct sk_buff *skb;</div><div class='add'>+	struct page *page;</div><div class='ctx'> </div><div class='del'>-	skb = prueth_process_rx_mgm(emac, PRUETH_RX_MGM_FLOW_TIMESTAMP_SR1);</div><div class='del'>-	if (!skb)</div><div class='add'>+	page = prueth_process_rx_mgm(emac, PRUETH_RX_MGM_FLOW_TIMESTAMP_SR1);</div><div class='add'>+	if (!page)</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='del'>-	prueth_tx_ts_sr1(emac, (void *)skb-&gt;data);</div><div class='del'>-	dev_kfree_skb_any(skb);</div><div class='add'>+	prueth_tx_ts_sr1(emac, (void *)page_address(page));</div><div class='add'>+	page_pool_recycle_direct(pp_page_to_nmdesc(page)-&gt;pp, page);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -377,15 +375,15 @@ static irqreturn_t prueth_rx_mgm_ts_thread_sr1(int irq, void *dev_id)</div><div class='ctx'> static irqreturn_t prueth_rx_mgm_rsp_thread(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct prueth_emac *emac = dev_id;</div><div class='del'>-	struct sk_buff *skb;</div><div class='add'>+	struct page *page;</div><div class='ctx'> 	u32 rsp;</div><div class='ctx'> </div><div class='del'>-	skb = prueth_process_rx_mgm(emac, PRUETH_RX_MGM_FLOW_RESPONSE_SR1);</div><div class='del'>-	if (!skb)</div><div class='add'>+	page = prueth_process_rx_mgm(emac, PRUETH_RX_MGM_FLOW_RESPONSE_SR1);</div><div class='add'>+	if (!page)</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='ctx'> 	/* Process command response */</div><div class='del'>-	rsp = le32_to_cpu(*(__le32 *)skb-&gt;data) &amp; 0xffff0000;</div><div class='add'>+	rsp = le32_to_cpu(*(__le32 *)page_address(page)) &amp; 0xffff0000;</div><div class='ctx'> 	if (rsp == ICSSG_SHUTDOWN_CMD_SR1) {</div><div class='ctx'> 		netdev_dbg(emac-&gt;ndev, "f/w Shutdown cmd resp %x\n", rsp);</div><div class='ctx'> 		complete(&amp;emac-&gt;cmd_complete);</div><div class='hunk'>@@ -394,7 +392,7 @@ static irqreturn_t prueth_rx_mgm_rsp_thread(int irq, void *dev_id)</div><div class='ctx'> 		complete(&amp;emac-&gt;cmd_complete);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_kfree_skb_any(skb);</div><div class='add'>+	page_pool_recycle_direct(pp_page_to_nmdesc(page)-&gt;pp, page);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -440,7 +438,6 @@ static int prueth_emac_start(struct prueth *prueth, struct prueth_emac *emac)</div><div class='ctx'> 		goto halt_pru;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	emac-&gt;fw_running = 1;</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> halt_pru:</div><div class='hunk'>@@ -449,6 +446,29 @@ halt_pru:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void prueth_emac_stop(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	int slice;</div><div class='add'>+</div><div class='add'>+	switch (emac-&gt;port_id) {</div><div class='add'>+	case PRUETH_PORT_MII0:</div><div class='add'>+		slice = ICSS_SLICE0;</div><div class='add'>+		break;</div><div class='add'>+	case PRUETH_PORT_MII1:</div><div class='add'>+		slice = ICSS_SLICE1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_err(emac-&gt;ndev, "invalid port\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!emac-&gt;is_sr1)</div><div class='add'>+		rproc_shutdown(prueth-&gt;txpru[slice]);</div><div class='add'>+	rproc_shutdown(prueth-&gt;rtu[slice]);</div><div class='add'>+	rproc_shutdown(prueth-&gt;pru[slice]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * emac_ndo_open - EMAC device open</div><div class='ctx'>  * @ndev: network adapter device</div><div class='hunk'>@@ -727,9 +747,11 @@ static const struct net_device_ops emac_netdev_ops = {</div><div class='ctx'> 	.ndo_validate_addr = eth_validate_addr,</div><div class='ctx'> 	.ndo_tx_timeout = icssg_ndo_tx_timeout,</div><div class='ctx'> 	.ndo_set_rx_mode = emac_ndo_set_rx_mode_sr1,</div><div class='del'>-	.ndo_eth_ioctl = icssg_ndo_ioctl,</div><div class='add'>+	.ndo_eth_ioctl = phy_do_ioctl,</div><div class='ctx'> 	.ndo_get_stats64 = icssg_ndo_get_stats64,</div><div class='ctx'> 	.ndo_get_phys_port_name = icssg_ndo_get_phys_port_name,</div><div class='add'>+	.ndo_hwtstamp_get = icssg_ndo_get_ts_config,</div><div class='add'>+	.ndo_hwtstamp_set = icssg_ndo_set_ts_config,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int prueth_netdev_init(struct prueth *prueth,</div><div class='hunk'>@@ -796,8 +818,7 @@ static int prueth_netdev_init(struct prueth *prueth,</div><div class='ctx'> 	} else if (of_phy_is_fixed_link(eth_node)) {</div><div class='ctx'> 		ret = of_phy_register_fixed_link(eth_node);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			ret = dev_err_probe(prueth-&gt;dev, ret,</div><div class='del'>-					    "failed to register fixed-link phy\n");</div><div class='add'>+			dev_err_probe(prueth-&gt;dev, ret, "failed to register fixed-link phy\n");</div><div class='ctx'> 			goto free;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -1009,8 +1030,6 @@ static int prueth_probe(struct platform_device *pdev)</div><div class='ctx'> 						   (unsigned long)prueth-&gt;msmcram.va);</div><div class='ctx'> 	prueth-&gt;msmcram.size = msmc_ram_size;</div><div class='ctx'> 	memset_io(prueth-&gt;msmcram.va, 0, msmc_ram_size);</div><div class='del'>-	dev_dbg(dev, "sram: pa %llx va %p size %zx\n", prueth-&gt;msmcram.pa,</div><div class='del'>-		prueth-&gt;msmcram.va, prueth-&gt;msmcram.size);</div><div class='ctx'> </div><div class='ctx'> 	prueth-&gt;iep0 = icss_iep_get_idx(np, 0);</div><div class='ctx'> 	if (IS_ERR(prueth-&gt;iep0)) {</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssg/icssg_stats.c b/drivers/net/ethernet/ti/icssg/icssg_stats.c<br/>index 8800bd3a8d07..7159baa0155c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_stats.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_stats.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_stats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssg/icssg_stats.c</a></div><div class='hunk'>@@ -11,7 +11,6 @@</div><div class='ctx'> </div><div class='ctx'> #define ICSSG_TX_PACKET_OFFSET	0xA0</div><div class='ctx'> #define ICSSG_TX_BYTE_OFFSET	0xEC</div><div class='del'>-#define ICSSG_FW_STATS_BASE	0x0248</div><div class='ctx'> </div><div class='ctx'> static u32 stats_base[] = {	0x54c,	/* Slice 0 stats start */</div><div class='ctx'> 				0xb18,	/* Slice 1 stats start */</div><div class='hunk'>@@ -26,7 +25,17 @@ void emac_update_hardware_stats(struct prueth_emac *emac)</div><div class='ctx'> 	u32 val, reg;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	spin_lock(&amp;prueth-&gt;stats_lock);</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(icssg_all_miig_stats); i++) {</div><div class='add'>+		/* In MII mode TX lines are swapped inside ICSSG, so read Tx stats</div><div class='add'>+		 * from slice1 for port0 and slice0 for port1 to get accurate Tx</div><div class='add'>+		 * stats for a given port</div><div class='add'>+		 */</div><div class='add'>+		if (emac-&gt;phy_if == PHY_INTERFACE_MODE_MII &amp;&amp;</div><div class='add'>+		    icssg_all_miig_stats[i].offset &gt;= ICSSG_TX_PACKET_OFFSET &amp;&amp;</div><div class='add'>+		    icssg_all_miig_stats[i].offset &lt;= ICSSG_TX_BYTE_OFFSET)</div><div class='add'>+			base = stats_base[slice ^ 1];</div><div class='ctx'> 		regmap_read(prueth-&gt;miig_rt,</div><div class='ctx'> 			    base + icssg_all_miig_stats[i].offset,</div><div class='ctx'> 			    &amp;val);</div><div class='hunk'>@@ -44,13 +53,14 @@ void emac_update_hardware_stats(struct prueth_emac *emac)</div><div class='ctx'> </div><div class='ctx'> 	if (prueth-&gt;pa_stats) {</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(icssg_all_pa_stats); i++) {</div><div class='del'>-			reg = ICSSG_FW_STATS_BASE +</div><div class='del'>-			      icssg_all_pa_stats[i].offset *</div><div class='del'>-			      PRUETH_NUM_MACS + slice * sizeof(u32);</div><div class='add'>+			reg = icssg_all_pa_stats[i].offset +</div><div class='add'>+			      slice * sizeof(u32);</div><div class='ctx'> 			regmap_read(prueth-&gt;pa_stats, reg, &amp;val);</div><div class='ctx'> 			emac-&gt;pa_stats[i] += val;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;prueth-&gt;stats_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void icssg_stats_work_handler(struct work_struct *work)</div><div class='hunk'>@@ -76,7 +86,7 @@ int emac_get_stat_by_name(struct prueth_emac *emac, char *stat_name)</div><div class='ctx'> 	if (emac-&gt;prueth-&gt;pa_stats) {</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(icssg_all_pa_stats); i++) {</div><div class='ctx'> 			if (!strcmp(icssg_all_pa_stats[i].name, stat_name))</div><div class='del'>-				return emac-&gt;pa_stats[icssg_all_pa_stats[i].offset / sizeof(u32)];</div><div class='add'>+				return emac-&gt;pa_stats[i];</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssg/icssg_stats.h b/drivers/net/ethernet/ti/icssg/icssg_stats.h<br/>index e88b919f532c..5ec0b38e0c67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_stats.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_stats.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_stats.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssg/icssg_stats.h</a></div><div class='hunk'>@@ -155,24 +155,10 @@ static const struct icssg_miig_stats icssg_all_miig_stats[] = {</div><div class='ctx'> 	ICSSG_MIIG_STATS(tx_bytes, true),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * struct pa_stats_regs - ICSSG Firmware maintained PA Stats register</div><div class='del'>- * @fw_rx_cnt: Number of valid packets sent by Rx PRU to Host on PSI</div><div class='del'>- * @fw_tx_cnt: Number of valid packets copied by RTU0 to Tx queues</div><div class='del'>- * @fw_tx_pre_overflow: Host Egress Q (Pre-emptible) Overflow Counter</div><div class='del'>- * @fw_tx_exp_overflow: Host Egress Q (Express) Overflow Counter</div><div class='del'>- */</div><div class='del'>-struct pa_stats_regs {</div><div class='del'>-	u32 fw_rx_cnt;</div><div class='del'>-	u32 fw_tx_cnt;</div><div class='del'>-	u32 fw_tx_pre_overflow;</div><div class='del'>-	u32 fw_tx_exp_overflow;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ICSSG_PA_STATS(field)			\</div><div class='del'>-{						\</div><div class='del'>-	#field,					\</div><div class='del'>-	offsetof(struct pa_stats_regs, field),	\</div><div class='add'>+#define ICSSG_PA_STATS(field)	\</div><div class='add'>+{				\</div><div class='add'>+	#field,			\</div><div class='add'>+	field,			\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct icssg_pa_stats {</div><div class='hunk'>@@ -181,10 +167,38 @@ struct icssg_pa_stats {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct icssg_pa_stats icssg_all_pa_stats[] = {</div><div class='del'>-	ICSSG_PA_STATS(fw_rx_cnt),</div><div class='del'>-	ICSSG_PA_STATS(fw_tx_cnt),</div><div class='del'>-	ICSSG_PA_STATS(fw_tx_pre_overflow),</div><div class='del'>-	ICSSG_PA_STATS(fw_tx_exp_overflow),</div><div class='add'>+	ICSSG_PA_STATS(FW_RTU_PKT_DROP),</div><div class='add'>+	ICSSG_PA_STATS(FW_Q0_OVERFLOW),</div><div class='add'>+	ICSSG_PA_STATS(FW_Q1_OVERFLOW),</div><div class='add'>+	ICSSG_PA_STATS(FW_Q2_OVERFLOW),</div><div class='add'>+	ICSSG_PA_STATS(FW_Q3_OVERFLOW),</div><div class='add'>+	ICSSG_PA_STATS(FW_Q4_OVERFLOW),</div><div class='add'>+	ICSSG_PA_STATS(FW_Q5_OVERFLOW),</div><div class='add'>+	ICSSG_PA_STATS(FW_Q6_OVERFLOW),</div><div class='add'>+	ICSSG_PA_STATS(FW_Q7_OVERFLOW),</div><div class='add'>+	ICSSG_PA_STATS(FW_DROPPED_PKT),</div><div class='add'>+	ICSSG_PA_STATS(FW_RX_ERROR),</div><div class='add'>+	ICSSG_PA_STATS(FW_RX_DS_INVALID),</div><div class='add'>+	ICSSG_PA_STATS(FW_TX_DROPPED_PACKET),</div><div class='add'>+	ICSSG_PA_STATS(FW_TX_TS_DROPPED_PACKET),</div><div class='add'>+	ICSSG_PA_STATS(FW_INF_PORT_DISABLED),</div><div class='add'>+	ICSSG_PA_STATS(FW_INF_SAV),</div><div class='add'>+	ICSSG_PA_STATS(FW_INF_SA_DL),</div><div class='add'>+	ICSSG_PA_STATS(FW_INF_PORT_BLOCKED),</div><div class='add'>+	ICSSG_PA_STATS(FW_INF_DROP_TAGGED),</div><div class='add'>+	ICSSG_PA_STATS(FW_INF_DROP_PRIOTAGGED),</div><div class='add'>+	ICSSG_PA_STATS(FW_INF_DROP_NOTAG),</div><div class='add'>+	ICSSG_PA_STATS(FW_INF_DROP_NOTMEMBER),</div><div class='add'>+	ICSSG_PA_STATS(FW_RX_EOF_SHORT_FRMERR),</div><div class='add'>+	ICSSG_PA_STATS(FW_RX_B0_DROP_EARLY_EOF),</div><div class='add'>+	ICSSG_PA_STATS(FW_TX_JUMBO_FRM_CUTOFF),</div><div class='add'>+	ICSSG_PA_STATS(FW_RX_EXP_FRAG_Q_DROP),</div><div class='add'>+	ICSSG_PA_STATS(FW_RX_FIFO_OVERRUN),</div><div class='add'>+	ICSSG_PA_STATS(FW_CUT_THR_PKT),</div><div class='add'>+	ICSSG_PA_STATS(FW_HOST_RX_PKT_CNT),</div><div class='add'>+	ICSSG_PA_STATS(FW_HOST_TX_PKT_CNT),</div><div class='add'>+	ICSSG_PA_STATS(FW_HOST_EGRESS_Q_PRE_OVERFLOW),</div><div class='add'>+	ICSSG_PA_STATS(FW_HOST_EGRESS_Q_EXP_OVERFLOW),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif /* __NET_TI_ICSSG_STATS_H */</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssg/icssg_switch_map.h b/drivers/net/ethernet/ti/icssg/icssg_switch_map.h<br/>index 424a7e945ea8..7e053b8af3ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_switch_map.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/icssg/icssg_switch_map.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssg/icssg_switch_map.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssg/icssg_switch_map.h</a></div><div class='hunk'>@@ -180,6 +180,9 @@</div><div class='ctx'> /* Used to notify the FW of the current link speed */</div><div class='ctx'> #define PORT_LINK_SPEED_OFFSET                             0x00A8</div><div class='ctx'> </div><div class='add'>+/* 2k memory pointer reserved for default writes by PRU0*/</div><div class='add'>+#define DEFAULT_MSMC_Q_OFFSET                              0x00AC</div><div class='add'>+</div><div class='ctx'> /* TAS gate mask for windows list0 */</div><div class='ctx'> #define TAS_GATE_MASK_LIST0                                0x0100</div><div class='ctx'> </div><div class='hunk'>@@ -231,4 +234,37 @@</div><div class='ctx'> /* Start of 32 bits PA_STAT counters */</div><div class='ctx'> #define PA_STAT_32b_START_OFFSET                           0x0080</div><div class='ctx'> </div><div class='add'>+#define FW_RTU_PKT_DROP			0x0088</div><div class='add'>+#define FW_Q0_OVERFLOW			0x0090</div><div class='add'>+#define FW_Q1_OVERFLOW			0x0098</div><div class='add'>+#define FW_Q2_OVERFLOW			0x00A0</div><div class='add'>+#define FW_Q3_OVERFLOW			0x00A8</div><div class='add'>+#define FW_Q4_OVERFLOW			0x00B0</div><div class='add'>+#define FW_Q5_OVERFLOW			0x00B8</div><div class='add'>+#define FW_Q6_OVERFLOW			0x00C0</div><div class='add'>+#define FW_Q7_OVERFLOW			0x00C8</div><div class='add'>+#define FW_DROPPED_PKT			0x00F8</div><div class='add'>+#define FW_RX_ERROR			0x0100</div><div class='add'>+#define FW_RX_DS_INVALID		0x0108</div><div class='add'>+#define FW_TX_DROPPED_PACKET		0x0110</div><div class='add'>+#define FW_TX_TS_DROPPED_PACKET		0x0118</div><div class='add'>+#define FW_INF_PORT_DISABLED		0x0120</div><div class='add'>+#define FW_INF_SAV			0x0128</div><div class='add'>+#define FW_INF_SA_DL			0x0130</div><div class='add'>+#define FW_INF_PORT_BLOCKED		0x0138</div><div class='add'>+#define FW_INF_DROP_TAGGED		0x0140</div><div class='add'>+#define FW_INF_DROP_PRIOTAGGED		0x0148</div><div class='add'>+#define FW_INF_DROP_NOTAG		0x0150</div><div class='add'>+#define FW_INF_DROP_NOTMEMBER		0x0158</div><div class='add'>+#define FW_RX_EOF_SHORT_FRMERR		0x0188</div><div class='add'>+#define FW_RX_B0_DROP_EARLY_EOF		0x0190</div><div class='add'>+#define FW_TX_JUMBO_FRM_CUTOFF		0x0198</div><div class='add'>+#define FW_RX_EXP_FRAG_Q_DROP		0x01A0</div><div class='add'>+#define FW_RX_FIFO_OVERRUN		0x01A8</div><div class='add'>+#define FW_CUT_THR_PKT			0x01B0</div><div class='add'>+#define FW_HOST_RX_PKT_CNT		0x0248</div><div class='add'>+#define FW_HOST_TX_PKT_CNT		0x0250</div><div class='add'>+#define FW_HOST_EGRESS_Q_PRE_OVERFLOW	0x0258</div><div class='add'>+#define FW_HOST_EGRESS_Q_EXP_OVERFLOW	0x0260</div><div class='add'>+</div><div class='ctx'> #endif /* __NET_TI_ICSSG_SWITCH_MAP_H  */</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssm/icssm_prueth.c b/drivers/net/ethernet/ti/icssm/icssm_prueth.c<br/>new file mode 100644<br/>index 000000000000..293b7af04263<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssm/icssm_prueth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssm/icssm_prueth.c</a></div><div class='hunk'>@@ -0,0 +1,1746 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+/* Texas Instruments ICSSM Ethernet Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/genalloc.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_hsr.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/remoteproc/pruss.h&gt;</div><div class='add'>+#include &lt;linux/ptp_classify.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/remoteproc.h&gt;</div><div class='add'>+#include &lt;net/pkt_cls.h&gt;</div><div class='add'>+</div><div class='add'>+#include "icssm_prueth.h"</div><div class='add'>+#include "../icssg/icssg_mii_rt.h"</div><div class='add'>+#include "../icssg/icss_iep.h"</div><div class='add'>+</div><div class='add'>+#define OCMC_RAM_SIZE		(SZ_64K)</div><div class='add'>+</div><div class='add'>+#define TX_START_DELAY		0x40</div><div class='add'>+#define TX_CLK_DELAY_100M	0x6</div><div class='add'>+#define HR_TIMER_TX_DELAY_US	100</div><div class='add'>+</div><div class='add'>+static void icssm_prueth_write_reg(struct prueth *prueth,</div><div class='add'>+				   enum prueth_mem region,</div><div class='add'>+				   unsigned int reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	writel_relaxed(val, prueth-&gt;mem[region].va + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Below macro is for 1528 Byte Frame support, to Allow even with</div><div class='add'>+ * Redundancy tag</div><div class='add'>+ */</div><div class='add'>+#define PRUSS_MII_RT_RX_FRMS_MAX_SUPPORT_EMAC  (VLAN_ETH_FRAME_LEN + \</div><div class='add'>+						ETH_FCS_LEN + \</div><div class='add'>+						ICSSM_LRE_TAG_SIZE)</div><div class='add'>+</div><div class='add'>+/* ensure that order of PRUSS mem regions is same as enum prueth_mem */</div><div class='add'>+static enum pruss_mem pruss_mem_ids[] = { PRUSS_MEM_DRAM0, PRUSS_MEM_DRAM1,</div><div class='add'>+					  PRUSS_MEM_SHRD_RAM2 };</div><div class='add'>+</div><div class='add'>+static const struct prueth_queue_info queue_infos[][NUM_QUEUES] = {</div><div class='add'>+	[PRUETH_PORT_QUEUE_HOST] = {</div><div class='add'>+		[PRUETH_QUEUE1] = {</div><div class='add'>+			P0_Q1_BUFFER_OFFSET,</div><div class='add'>+			HOST_QUEUE_DESC_OFFSET,</div><div class='add'>+			P0_Q1_BD_OFFSET,</div><div class='add'>+			P0_Q1_BD_OFFSET + ((HOST_QUEUE_1_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+		[PRUETH_QUEUE2] = {</div><div class='add'>+			P0_Q2_BUFFER_OFFSET,</div><div class='add'>+			HOST_QUEUE_DESC_OFFSET + 8,</div><div class='add'>+			P0_Q2_BD_OFFSET,</div><div class='add'>+			P0_Q2_BD_OFFSET + ((HOST_QUEUE_2_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+		[PRUETH_QUEUE3] = {</div><div class='add'>+			P0_Q3_BUFFER_OFFSET,</div><div class='add'>+			HOST_QUEUE_DESC_OFFSET + 16,</div><div class='add'>+			P0_Q3_BD_OFFSET,</div><div class='add'>+			P0_Q3_BD_OFFSET + ((HOST_QUEUE_3_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+		[PRUETH_QUEUE4] = {</div><div class='add'>+			P0_Q4_BUFFER_OFFSET,</div><div class='add'>+			HOST_QUEUE_DESC_OFFSET + 24,</div><div class='add'>+			P0_Q4_BD_OFFSET,</div><div class='add'>+			P0_Q4_BD_OFFSET + ((HOST_QUEUE_4_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	[PRUETH_PORT_QUEUE_MII0] = {</div><div class='add'>+		[PRUETH_QUEUE1] = {</div><div class='add'>+			P1_Q1_BUFFER_OFFSET,</div><div class='add'>+			P1_Q1_BUFFER_OFFSET + ((QUEUE_1_SIZE - 1) *</div><div class='add'>+					ICSS_BLOCK_SIZE),</div><div class='add'>+			P1_Q1_BD_OFFSET,</div><div class='add'>+			P1_Q1_BD_OFFSET + ((QUEUE_1_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+		[PRUETH_QUEUE2] = {</div><div class='add'>+			P1_Q2_BUFFER_OFFSET,</div><div class='add'>+			P1_Q2_BUFFER_OFFSET + ((QUEUE_2_SIZE - 1) *</div><div class='add'>+					ICSS_BLOCK_SIZE),</div><div class='add'>+			P1_Q2_BD_OFFSET,</div><div class='add'>+			P1_Q2_BD_OFFSET + ((QUEUE_2_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+		[PRUETH_QUEUE3] = {</div><div class='add'>+			P1_Q3_BUFFER_OFFSET,</div><div class='add'>+			P1_Q3_BUFFER_OFFSET + ((QUEUE_3_SIZE - 1) *</div><div class='add'>+					ICSS_BLOCK_SIZE),</div><div class='add'>+			P1_Q3_BD_OFFSET,</div><div class='add'>+			P1_Q3_BD_OFFSET + ((QUEUE_3_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+		[PRUETH_QUEUE4] = {</div><div class='add'>+			P1_Q4_BUFFER_OFFSET,</div><div class='add'>+			P1_Q4_BUFFER_OFFSET + ((QUEUE_4_SIZE - 1) *</div><div class='add'>+					ICSS_BLOCK_SIZE),</div><div class='add'>+			P1_Q4_BD_OFFSET,</div><div class='add'>+			P1_Q4_BD_OFFSET + ((QUEUE_4_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	[PRUETH_PORT_QUEUE_MII1] = {</div><div class='add'>+		[PRUETH_QUEUE1] = {</div><div class='add'>+			P2_Q1_BUFFER_OFFSET,</div><div class='add'>+			P2_Q1_BUFFER_OFFSET + ((QUEUE_1_SIZE - 1) *</div><div class='add'>+					ICSS_BLOCK_SIZE),</div><div class='add'>+			P2_Q1_BD_OFFSET,</div><div class='add'>+			P2_Q1_BD_OFFSET + ((QUEUE_1_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+		[PRUETH_QUEUE2] = {</div><div class='add'>+			P2_Q2_BUFFER_OFFSET,</div><div class='add'>+			P2_Q2_BUFFER_OFFSET + ((QUEUE_2_SIZE - 1) *</div><div class='add'>+					ICSS_BLOCK_SIZE),</div><div class='add'>+			P2_Q2_BD_OFFSET,</div><div class='add'>+			P2_Q2_BD_OFFSET + ((QUEUE_2_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+		[PRUETH_QUEUE3] = {</div><div class='add'>+			P2_Q3_BUFFER_OFFSET,</div><div class='add'>+			P2_Q3_BUFFER_OFFSET + ((QUEUE_3_SIZE - 1) *</div><div class='add'>+					ICSS_BLOCK_SIZE),</div><div class='add'>+			P2_Q3_BD_OFFSET,</div><div class='add'>+			P2_Q3_BD_OFFSET + ((QUEUE_3_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+		[PRUETH_QUEUE4] = {</div><div class='add'>+			P2_Q4_BUFFER_OFFSET,</div><div class='add'>+			P2_Q4_BUFFER_OFFSET + ((QUEUE_4_SIZE - 1) *</div><div class='add'>+					ICSS_BLOCK_SIZE),</div><div class='add'>+			P2_Q4_BD_OFFSET,</div><div class='add'>+			P2_Q4_BD_OFFSET + ((QUEUE_4_SIZE - 1) * BD_SIZE),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct prueth_queue_desc queue_descs[][NUM_QUEUES] = {</div><div class='add'>+	[PRUETH_PORT_QUEUE_HOST] = {</div><div class='add'>+		{ .rd_ptr = P0_Q1_BD_OFFSET, .wr_ptr = P0_Q1_BD_OFFSET, },</div><div class='add'>+		{ .rd_ptr = P0_Q2_BD_OFFSET, .wr_ptr = P0_Q2_BD_OFFSET, },</div><div class='add'>+		{ .rd_ptr = P0_Q3_BD_OFFSET, .wr_ptr = P0_Q3_BD_OFFSET, },</div><div class='add'>+		{ .rd_ptr = P0_Q4_BD_OFFSET, .wr_ptr = P0_Q4_BD_OFFSET, },</div><div class='add'>+	},</div><div class='add'>+	[PRUETH_PORT_QUEUE_MII0] = {</div><div class='add'>+		{ .rd_ptr = P1_Q1_BD_OFFSET, .wr_ptr = P1_Q1_BD_OFFSET, },</div><div class='add'>+		{ .rd_ptr = P1_Q2_BD_OFFSET, .wr_ptr = P1_Q2_BD_OFFSET, },</div><div class='add'>+		{ .rd_ptr = P1_Q3_BD_OFFSET, .wr_ptr = P1_Q3_BD_OFFSET, },</div><div class='add'>+		{ .rd_ptr = P1_Q4_BD_OFFSET, .wr_ptr = P1_Q4_BD_OFFSET, },</div><div class='add'>+	},</div><div class='add'>+	[PRUETH_PORT_QUEUE_MII1] = {</div><div class='add'>+		{ .rd_ptr = P2_Q1_BD_OFFSET, .wr_ptr = P2_Q1_BD_OFFSET, },</div><div class='add'>+		{ .rd_ptr = P2_Q2_BD_OFFSET, .wr_ptr = P2_Q2_BD_OFFSET, },</div><div class='add'>+		{ .rd_ptr = P2_Q3_BD_OFFSET, .wr_ptr = P2_Q3_BD_OFFSET, },</div><div class='add'>+		{ .rd_ptr = P2_Q4_BD_OFFSET, .wr_ptr = P2_Q4_BD_OFFSET, },</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void icssm_prueth_hostconfig(struct prueth *prueth)</div><div class='add'>+{</div><div class='add'>+	void __iomem *sram_base = prueth-&gt;mem[PRUETH_MEM_SHARED_RAM].va;</div><div class='add'>+	void __iomem *sram;</div><div class='add'>+</div><div class='add'>+	/* queue size lookup table */</div><div class='add'>+	sram = sram_base + HOST_QUEUE_SIZE_ADDR;</div><div class='add'>+	writew(HOST_QUEUE_1_SIZE, sram);</div><div class='add'>+	writew(HOST_QUEUE_2_SIZE, sram + 2);</div><div class='add'>+	writew(HOST_QUEUE_3_SIZE, sram + 4);</div><div class='add'>+	writew(HOST_QUEUE_4_SIZE, sram + 6);</div><div class='add'>+</div><div class='add'>+	/* queue information table */</div><div class='add'>+	sram = sram_base + HOST_Q1_RX_CONTEXT_OFFSET;</div><div class='add'>+	memcpy_toio(sram, queue_infos[PRUETH_PORT_QUEUE_HOST],</div><div class='add'>+		    sizeof(queue_infos[PRUETH_PORT_QUEUE_HOST]));</div><div class='add'>+</div><div class='add'>+	/* buffer offset table */</div><div class='add'>+	sram = sram_base + HOST_QUEUE_OFFSET_ADDR;</div><div class='add'>+	writew(P0_Q1_BUFFER_OFFSET, sram);</div><div class='add'>+	writew(P0_Q2_BUFFER_OFFSET, sram + 2);</div><div class='add'>+	writew(P0_Q3_BUFFER_OFFSET, sram + 4);</div><div class='add'>+	writew(P0_Q4_BUFFER_OFFSET, sram + 6);</div><div class='add'>+</div><div class='add'>+	/* buffer descriptor offset table*/</div><div class='add'>+	sram = sram_base + HOST_QUEUE_DESCRIPTOR_OFFSET_ADDR;</div><div class='add'>+	writew(P0_Q1_BD_OFFSET, sram);</div><div class='add'>+	writew(P0_Q2_BD_OFFSET, sram + 2);</div><div class='add'>+	writew(P0_Q3_BD_OFFSET, sram + 4);</div><div class='add'>+	writew(P0_Q4_BD_OFFSET, sram + 6);</div><div class='add'>+</div><div class='add'>+	/* queue table */</div><div class='add'>+	sram = sram_base + HOST_QUEUE_DESC_OFFSET;</div><div class='add'>+	memcpy_toio(sram, queue_descs[PRUETH_PORT_QUEUE_HOST],</div><div class='add'>+		    sizeof(queue_descs[PRUETH_PORT_QUEUE_HOST]));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icssm_prueth_mii_init(struct prueth *prueth)</div><div class='add'>+{</div><div class='add'>+	struct regmap *mii_rt;</div><div class='add'>+	u32 rxcfg_reg, rxcfg;</div><div class='add'>+	u32 txcfg_reg, txcfg;</div><div class='add'>+</div><div class='add'>+	mii_rt = prueth-&gt;mii_rt;</div><div class='add'>+</div><div class='add'>+	rxcfg = PRUSS_MII_RT_RXCFG_RX_ENABLE |</div><div class='add'>+		PRUSS_MII_RT_RXCFG_RX_DATA_RDY_MODE_DIS |</div><div class='add'>+		PRUSS_MII_RT_RXCFG_RX_L2_EN |</div><div class='add'>+		PRUSS_MII_RT_RXCFG_RX_CUT_PREAMBLE |</div><div class='add'>+		PRUSS_MII_RT_RXCFG_RX_L2_EOF_SCLR_DIS;</div><div class='add'>+</div><div class='add'>+	/* Configuration of Port 0 Rx */</div><div class='add'>+	rxcfg_reg = PRUSS_MII_RT_RXCFG0;</div><div class='add'>+</div><div class='add'>+	regmap_write(mii_rt, rxcfg_reg, rxcfg);</div><div class='add'>+</div><div class='add'>+	/* Configuration of Port 1 Rx */</div><div class='add'>+	rxcfg_reg = PRUSS_MII_RT_RXCFG1;</div><div class='add'>+</div><div class='add'>+	rxcfg |= PRUSS_MII_RT_RXCFG_RX_MUX_SEL;</div><div class='add'>+</div><div class='add'>+	regmap_write(mii_rt, rxcfg_reg, rxcfg);</div><div class='add'>+</div><div class='add'>+	txcfg = PRUSS_MII_RT_TXCFG_TX_ENABLE |</div><div class='add'>+		PRUSS_MII_RT_TXCFG_TX_AUTO_PREAMBLE |</div><div class='add'>+		PRUSS_MII_RT_TXCFG_TX_32_MODE_EN |</div><div class='add'>+		(TX_START_DELAY &lt;&lt; PRUSS_MII_RT_TXCFG_TX_START_DELAY_SHIFT) |</div><div class='add'>+		(TX_CLK_DELAY_100M &lt;&lt; PRUSS_MII_RT_TXCFG_TX_CLK_DELAY_SHIFT);</div><div class='add'>+</div><div class='add'>+	/* Configuration of Port 0 Tx */</div><div class='add'>+	txcfg_reg = PRUSS_MII_RT_TXCFG0;</div><div class='add'>+</div><div class='add'>+	regmap_write(mii_rt, txcfg_reg, txcfg);</div><div class='add'>+</div><div class='add'>+	txcfg |= PRUSS_MII_RT_TXCFG_TX_MUX_SEL;</div><div class='add'>+</div><div class='add'>+	/* Configuration of Port 1 Tx */</div><div class='add'>+	txcfg_reg = PRUSS_MII_RT_TXCFG1;</div><div class='add'>+</div><div class='add'>+	regmap_write(mii_rt, txcfg_reg, txcfg);</div><div class='add'>+</div><div class='add'>+	txcfg_reg = PRUSS_MII_RT_RX_FRMS0;</div><div class='add'>+</div><div class='add'>+	/* Min frame length should be set to 64 to allow receive of standard</div><div class='add'>+	 * Ethernet frames such as PTP, LLDP that will not have the tag/rct.</div><div class='add'>+	 * Actual size written to register is size - 1 per TRM. This also</div><div class='add'>+	 * includes CRC/FCS.</div><div class='add'>+	 */</div><div class='add'>+	txcfg = FIELD_PREP(PRUSS_MII_RT_RX_FRMS_MIN_FRM_MASK,</div><div class='add'>+			   (PRUSS_MII_RT_RX_FRMS_MIN_FRM - 1));</div><div class='add'>+</div><div class='add'>+	/* For EMAC, set Max frame size to 1528 i.e size with VLAN.</div><div class='add'>+	 * Actual size written to register is size - 1 as per TRM.</div><div class='add'>+	 * Since driver support run time change of protocol, driver</div><div class='add'>+	 * must overwrite the values based on Ethernet type.</div><div class='add'>+	 */</div><div class='add'>+	txcfg |= FIELD_PREP(PRUSS_MII_RT_RX_FRMS_MAX_FRM_MASK,</div><div class='add'>+			    (PRUSS_MII_RT_RX_FRMS_MAX_SUPPORT_EMAC - 1));</div><div class='add'>+</div><div class='add'>+	regmap_write(mii_rt, txcfg_reg, txcfg);</div><div class='add'>+</div><div class='add'>+	txcfg_reg = PRUSS_MII_RT_RX_FRMS1;</div><div class='add'>+</div><div class='add'>+	regmap_write(mii_rt, txcfg_reg, txcfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icssm_prueth_clearmem(struct prueth *prueth, enum prueth_mem region)</div><div class='add'>+{</div><div class='add'>+	memset_io(prueth-&gt;mem[region].va, 0, prueth-&gt;mem[region].size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icssm_prueth_hostinit(struct prueth *prueth)</div><div class='add'>+{</div><div class='add'>+	/* Clear shared RAM */</div><div class='add'>+	icssm_prueth_clearmem(prueth, PRUETH_MEM_SHARED_RAM);</div><div class='add'>+</div><div class='add'>+	/* Clear OCMC RAM */</div><div class='add'>+	icssm_prueth_clearmem(prueth, PRUETH_MEM_OCMC);</div><div class='add'>+</div><div class='add'>+	/* Clear data RAMs */</div><div class='add'>+	if (prueth-&gt;eth_node[PRUETH_MAC0])</div><div class='add'>+		icssm_prueth_clearmem(prueth, PRUETH_MEM_DRAM0);</div><div class='add'>+	if (prueth-&gt;eth_node[PRUETH_MAC1])</div><div class='add'>+		icssm_prueth_clearmem(prueth, PRUETH_MEM_DRAM1);</div><div class='add'>+</div><div class='add'>+	/* Initialize host queues in shared RAM */</div><div class='add'>+	icssm_prueth_hostconfig(prueth);</div><div class='add'>+</div><div class='add'>+	/* Configure MII_RT */</div><div class='add'>+	icssm_prueth_mii_init(prueth);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function initialize the driver in EMAC mode</div><div class='add'>+ * based on eth_type</div><div class='add'>+ */</div><div class='add'>+static void icssm_prueth_init_ethernet_mode(struct prueth *prueth)</div><div class='add'>+{</div><div class='add'>+	icssm_prueth_hostinit(prueth);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icssm_prueth_port_enable(struct prueth_emac *emac, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	void __iomem *port_ctrl;</div><div class='add'>+	void __iomem *ram;</div><div class='add'>+</div><div class='add'>+	ram = prueth-&gt;mem[emac-&gt;dram].va;</div><div class='add'>+	port_ctrl = ram + PORT_CONTROL_ADDR;</div><div class='add'>+	writeb(!!enable, port_ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int icssm_prueth_emac_config(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	u32 sharedramaddr, ocmcaddr;</div><div class='add'>+	void __iomem *dram_base;</div><div class='add'>+	void __iomem *mac_addr;</div><div class='add'>+	void __iomem *dram;</div><div class='add'>+	void __iomem *sram;</div><div class='add'>+</div><div class='add'>+	/* PRU needs local shared RAM address for C28 */</div><div class='add'>+	sharedramaddr = ICSS_LOCAL_SHARED_RAM;</div><div class='add'>+	/* PRU needs real global OCMC address for C30*/</div><div class='add'>+	ocmcaddr = (u32)prueth-&gt;mem[PRUETH_MEM_OCMC].pa;</div><div class='add'>+	sram = prueth-&gt;mem[PRUETH_MEM_SHARED_RAM].va;</div><div class='add'>+</div><div class='add'>+	/* Clear data RAM */</div><div class='add'>+	icssm_prueth_clearmem(prueth, emac-&gt;dram);</div><div class='add'>+</div><div class='add'>+	dram_base = prueth-&gt;mem[emac-&gt;dram].va;</div><div class='add'>+</div><div class='add'>+	/* setup mac address */</div><div class='add'>+	mac_addr = dram_base + PORT_MAC_ADDR;</div><div class='add'>+	memcpy_toio(mac_addr, emac-&gt;mac_addr, 6);</div><div class='add'>+</div><div class='add'>+	/* queue information table */</div><div class='add'>+	dram = dram_base + TX_CONTEXT_Q1_OFFSET_ADDR;</div><div class='add'>+	memcpy_toio(dram, queue_infos[emac-&gt;port_id],</div><div class='add'>+		    sizeof(queue_infos[emac-&gt;port_id]));</div><div class='add'>+</div><div class='add'>+	/* queue table */</div><div class='add'>+	dram = dram_base + PORT_QUEUE_DESC_OFFSET;</div><div class='add'>+	memcpy_toio(dram, queue_descs[emac-&gt;port_id],</div><div class='add'>+		    sizeof(queue_descs[emac-&gt;port_id]));</div><div class='add'>+</div><div class='add'>+	emac-&gt;rx_queue_descs = sram + HOST_QUEUE_DESC_OFFSET;</div><div class='add'>+	emac-&gt;tx_queue_descs = dram;</div><div class='add'>+</div><div class='add'>+	/* Set in constant table C28 of PRU0 to ICSS Shared memory */</div><div class='add'>+	pru_rproc_set_ctable(emac-&gt;pru, PRU_C28, sharedramaddr);</div><div class='add'>+</div><div class='add'>+	/* Set in constant table C30 of PRU0 to OCMC memory */</div><div class='add'>+	pru_rproc_set_ctable(emac-&gt;pru, PRU_C30, ocmcaddr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* called back by PHY layer if there is change in link state of hw port*/</div><div class='add'>+static void icssm_emac_adjust_link(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='add'>+	struct phy_device *phydev = emac-&gt;phydev;</div><div class='add'>+	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	bool new_state = false;</div><div class='add'>+	enum prueth_mem region;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 port_status = 0;</div><div class='add'>+	u32 txcfg, mask;</div><div class='add'>+	u32 delay;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;emac-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;link) {</div><div class='add'>+		/* check the mode of operation */</div><div class='add'>+		if (phydev-&gt;duplex != emac-&gt;duplex) {</div><div class='add'>+			new_state = true;</div><div class='add'>+			emac-&gt;duplex = phydev-&gt;duplex;</div><div class='add'>+		}</div><div class='add'>+		if (phydev-&gt;speed != emac-&gt;speed) {</div><div class='add'>+			new_state = true;</div><div class='add'>+			emac-&gt;speed = phydev-&gt;speed;</div><div class='add'>+		}</div><div class='add'>+		if (!emac-&gt;link) {</div><div class='add'>+			new_state = true;</div><div class='add'>+			emac-&gt;link = 1;</div><div class='add'>+		}</div><div class='add'>+	} else if (emac-&gt;link) {</div><div class='add'>+		new_state = true;</div><div class='add'>+		emac-&gt;link = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_state) {</div><div class='add'>+		phy_print_status(phydev);</div><div class='add'>+		region = emac-&gt;dram;</div><div class='add'>+</div><div class='add'>+		/* update phy/port status information based on PHY values*/</div><div class='add'>+		if (emac-&gt;link) {</div><div class='add'>+			port_status |= PORT_LINK_MASK;</div><div class='add'>+</div><div class='add'>+			icssm_prueth_write_reg(prueth, region, PHY_SPEED_OFFSET,</div><div class='add'>+					       emac-&gt;speed);</div><div class='add'>+</div><div class='add'>+			delay = TX_CLK_DELAY_100M;</div><div class='add'>+			delay = delay &lt;&lt; PRUSS_MII_RT_TXCFG_TX_CLK_DELAY_SHIFT;</div><div class='add'>+			mask = PRUSS_MII_RT_TXCFG_TX_CLK_DELAY_MASK;</div><div class='add'>+</div><div class='add'>+			if (emac-&gt;port_id)</div><div class='add'>+				txcfg = PRUSS_MII_RT_TXCFG1;</div><div class='add'>+			else</div><div class='add'>+				txcfg = PRUSS_MII_RT_TXCFG0;</div><div class='add'>+</div><div class='add'>+			regmap_update_bits(prueth-&gt;mii_rt, txcfg, mask, delay);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		writeb(port_status, prueth-&gt;mem[region].va +</div><div class='add'>+		       PORT_STATUS_OFFSET);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (emac-&gt;link) {</div><div class='add'>+	       /* reactivate the transmit queue if it is stopped */</div><div class='add'>+		if (netif_running(ndev) &amp;&amp; netif_queue_stopped(ndev))</div><div class='add'>+			netif_wake_queue(ndev);</div><div class='add'>+	} else {</div><div class='add'>+		if (!netif_queue_stopped(ndev))</div><div class='add'>+			netif_stop_queue(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;emac-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int</div><div class='add'>+icssm_get_buff_desc_count(const struct prueth_queue_info *queue)</div><div class='add'>+{</div><div class='add'>+	unsigned int buffer_desc_count;</div><div class='add'>+</div><div class='add'>+	buffer_desc_count = queue-&gt;buffer_desc_end -</div><div class='add'>+			    queue-&gt;buffer_desc_offset;</div><div class='add'>+	buffer_desc_count /= BD_SIZE;</div><div class='add'>+	buffer_desc_count++;</div><div class='add'>+</div><div class='add'>+	return buffer_desc_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icssm_get_block(struct prueth_queue_desc __iomem *queue_desc,</div><div class='add'>+			    const struct prueth_queue_info *queue,</div><div class='add'>+			    int *write_block, int *read_block)</div><div class='add'>+{</div><div class='add'>+	*write_block = (readw(&amp;queue_desc-&gt;wr_ptr) -</div><div class='add'>+			queue-&gt;buffer_desc_offset) / BD_SIZE;</div><div class='add'>+	*read_block = (readw(&amp;queue_desc-&gt;rd_ptr) -</div><div class='add'>+		       queue-&gt;buffer_desc_offset) / BD_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * icssm_emac_rx_irq - EMAC Rx interrupt handler</div><div class='add'>+ * @irq: interrupt number</div><div class='add'>+ * @dev_id: pointer to net_device</div><div class='add'>+ *</div><div class='add'>+ * EMAC Interrupt handler - we only schedule NAPI and not process any packets</div><div class='add'>+ * here.</div><div class='add'>+ *</div><div class='add'>+ * Return: IRQ_HANDLED if the interrupt handled</div><div class='add'>+ */</div><div class='add'>+static irqreturn_t icssm_emac_rx_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = (struct net_device *)dev_id;</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (likely(netif_running(ndev))) {</div><div class='add'>+		/* disable Rx system event */</div><div class='add'>+		disable_irq_nosync(emac-&gt;rx_irq);</div><div class='add'>+		napi_schedule(&amp;emac-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * icssm_prueth_tx_enqueue - queue a packet to firmware for transmission</div><div class='add'>+ *</div><div class='add'>+ * @emac: EMAC data structure</div><div class='add'>+ * @skb: packet data buffer</div><div class='add'>+ * @queue_id: priority queue id</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 (Success)</div><div class='add'>+ */</div><div class='add'>+static int icssm_prueth_tx_enqueue(struct prueth_emac *emac,</div><div class='add'>+				   struct sk_buff *skb,</div><div class='add'>+				   enum prueth_queue_id queue_id)</div><div class='add'>+{</div><div class='add'>+	struct prueth_queue_desc __iomem *queue_desc;</div><div class='add'>+	const struct prueth_queue_info *txqueue;</div><div class='add'>+	struct net_device *ndev = emac-&gt;ndev;</div><div class='add'>+	unsigned int buffer_desc_count;</div><div class='add'>+	int free_blocks, update_block;</div><div class='add'>+	bool buffer_wrapped = false;</div><div class='add'>+	int write_block, read_block;</div><div class='add'>+	void *src_addr, *dst_addr;</div><div class='add'>+	int pkt_block_size;</div><div class='add'>+	void __iomem *dram;</div><div class='add'>+	int txport, pktlen;</div><div class='add'>+	u16 update_wr_ptr;</div><div class='add'>+	u32 wr_buf_desc;</div><div class='add'>+	void *ocmc_ram;</div><div class='add'>+</div><div class='add'>+	dram = emac-&gt;prueth-&gt;mem[emac-&gt;dram].va;</div><div class='add'>+	if (eth_skb_pad(skb)) {</div><div class='add'>+		if (netif_msg_tx_err(emac) &amp;&amp; net_ratelimit())</div><div class='add'>+			netdev_err(ndev, "packet pad failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* which port to tx: MII0 or MII1 */</div><div class='add'>+	txport = emac-&gt;tx_port_queue;</div><div class='add'>+	src_addr = skb-&gt;data;</div><div class='add'>+	pktlen = skb-&gt;len;</div><div class='add'>+	/* Get the tx queue */</div><div class='add'>+	queue_desc = emac-&gt;tx_queue_descs + queue_id;</div><div class='add'>+	txqueue = &amp;queue_infos[txport][queue_id];</div><div class='add'>+</div><div class='add'>+	buffer_desc_count = icssm_get_buff_desc_count(txqueue);</div><div class='add'>+</div><div class='add'>+	/* the PRU firmware deals mostly in pointers already</div><div class='add'>+	 * offset into ram, we would like to deal in indexes</div><div class='add'>+	 * within the queue we are working with for code</div><div class='add'>+	 * simplicity, calculate this here</div><div class='add'>+	 */</div><div class='add'>+	icssm_get_block(queue_desc, txqueue, &amp;write_block, &amp;read_block);</div><div class='add'>+</div><div class='add'>+	if (write_block &gt; read_block) {</div><div class='add'>+		free_blocks = buffer_desc_count - write_block;</div><div class='add'>+		free_blocks += read_block;</div><div class='add'>+	} else if (write_block &lt; read_block) {</div><div class='add'>+		free_blocks = read_block - write_block;</div><div class='add'>+	} else { /* they are all free */</div><div class='add'>+		free_blocks = buffer_desc_count;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pkt_block_size = DIV_ROUND_UP(pktlen, ICSS_BLOCK_SIZE);</div><div class='add'>+	if (pkt_block_size &gt; free_blocks) /* out of queue space */</div><div class='add'>+		return -ENOBUFS;</div><div class='add'>+</div><div class='add'>+	/* calculate end BD address post write */</div><div class='add'>+	update_block = write_block + pkt_block_size;</div><div class='add'>+</div><div class='add'>+	/* Check for wrap around */</div><div class='add'>+	if (update_block &gt;= buffer_desc_count) {</div><div class='add'>+		update_block %= buffer_desc_count;</div><div class='add'>+		buffer_wrapped = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* OCMC RAM is not cached and write order is not important */</div><div class='add'>+	ocmc_ram = (__force void *)emac-&gt;prueth-&gt;mem[PRUETH_MEM_OCMC].va;</div><div class='add'>+	dst_addr = ocmc_ram + txqueue-&gt;buffer_offset +</div><div class='add'>+		   (write_block * ICSS_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	/* Copy the data from socket buffer(DRAM) to PRU buffers(OCMC) */</div><div class='add'>+	if (buffer_wrapped) { /* wrapped around buffer */</div><div class='add'>+		int bytes = (buffer_desc_count - write_block) * ICSS_BLOCK_SIZE;</div><div class='add'>+		int remaining;</div><div class='add'>+</div><div class='add'>+		/* bytes is integral multiple of ICSS_BLOCK_SIZE but</div><div class='add'>+		 * entire packet may have fit within the last BD</div><div class='add'>+		 * if pkt_info.length is not integral multiple of</div><div class='add'>+		 * ICSS_BLOCK_SIZE</div><div class='add'>+		 */</div><div class='add'>+		if (pktlen &lt; bytes)</div><div class='add'>+			bytes = pktlen;</div><div class='add'>+</div><div class='add'>+		/* copy non-wrapped part */</div><div class='add'>+		memcpy(dst_addr, src_addr, bytes);</div><div class='add'>+</div><div class='add'>+		/* copy wrapped part */</div><div class='add'>+		src_addr += bytes;</div><div class='add'>+		remaining = pktlen - bytes;</div><div class='add'>+		dst_addr = ocmc_ram + txqueue-&gt;buffer_offset;</div><div class='add'>+		memcpy(dst_addr, src_addr, remaining);</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(dst_addr, src_addr, pktlen);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+       /* update first buffer descriptor */</div><div class='add'>+	wr_buf_desc = (pktlen &lt;&lt; PRUETH_BD_LENGTH_SHIFT) &amp;</div><div class='add'>+		       PRUETH_BD_LENGTH_MASK;</div><div class='add'>+	writel(wr_buf_desc, dram + readw(&amp;queue_desc-&gt;wr_ptr));</div><div class='add'>+</div><div class='add'>+	/* update the write pointer in this queue descriptor, the firmware</div><div class='add'>+	 * polls for this change so this will signal the start of transmission</div><div class='add'>+	 */</div><div class='add'>+	update_wr_ptr = txqueue-&gt;buffer_desc_offset + (update_block * BD_SIZE);</div><div class='add'>+	writew(update_wr_ptr, &amp;queue_desc-&gt;wr_ptr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void icssm_parse_packet_info(struct prueth *prueth, u32 buffer_descriptor,</div><div class='add'>+			     struct prueth_packet_info *pkt_info)</div><div class='add'>+{</div><div class='add'>+	pkt_info-&gt;shadow = !!(buffer_descriptor &amp; PRUETH_BD_SHADOW_MASK);</div><div class='add'>+	pkt_info-&gt;port = (buffer_descriptor &amp; PRUETH_BD_PORT_MASK) &gt;&gt;</div><div class='add'>+			 PRUETH_BD_PORT_SHIFT;</div><div class='add'>+	pkt_info-&gt;length = (buffer_descriptor &amp; PRUETH_BD_LENGTH_MASK) &gt;&gt;</div><div class='add'>+			   PRUETH_BD_LENGTH_SHIFT;</div><div class='add'>+	pkt_info-&gt;broadcast = !!(buffer_descriptor &amp; PRUETH_BD_BROADCAST_MASK);</div><div class='add'>+	pkt_info-&gt;error = !!(buffer_descriptor &amp; PRUETH_BD_ERROR_MASK);</div><div class='add'>+	pkt_info-&gt;lookup_success = !!(buffer_descriptor &amp;</div><div class='add'>+				      PRUETH_BD_LOOKUP_SUCCESS_MASK);</div><div class='add'>+	pkt_info-&gt;flood = !!(buffer_descriptor &amp; PRUETH_BD_SW_FLOOD_MASK);</div><div class='add'>+	pkt_info-&gt;timestamp = !!(buffer_descriptor &amp; PRUETH_BD_TIMESTAMP_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * icssm_emac_rx_packet - EMAC Receive function</div><div class='add'>+ *</div><div class='add'>+ * @emac: EMAC data structure</div><div class='add'>+ * @bd_rd_ptr: Buffer descriptor read pointer</div><div class='add'>+ * @pkt_info: packet information structure</div><div class='add'>+ * @rxqueue: Receive queue information structure</div><div class='add'>+ *</div><div class='add'>+ * Get a packet from receive queue</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 (Success)</div><div class='add'>+ */</div><div class='add'>+int icssm_emac_rx_packet(struct prueth_emac *emac, u16 *bd_rd_ptr,</div><div class='add'>+			 struct prueth_packet_info *pkt_info,</div><div class='add'>+			 const struct prueth_queue_info *rxqueue)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = emac-&gt;ndev;</div><div class='add'>+	unsigned int buffer_desc_count;</div><div class='add'>+	int read_block, update_block;</div><div class='add'>+	unsigned int actual_pkt_len;</div><div class='add'>+	bool buffer_wrapped = false;</div><div class='add'>+	void *src_addr, *dst_addr;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int pkt_block_size;</div><div class='add'>+	void *ocmc_ram;</div><div class='add'>+</div><div class='add'>+	/* the PRU firmware deals mostly in pointers already</div><div class='add'>+	 * offset into ram, we would like to deal in indexes</div><div class='add'>+	 * within the queue we are working with for code</div><div class='add'>+	 * simplicity, calculate this here</div><div class='add'>+	 */</div><div class='add'>+	buffer_desc_count = icssm_get_buff_desc_count(rxqueue);</div><div class='add'>+	read_block = (*bd_rd_ptr - rxqueue-&gt;buffer_desc_offset) / BD_SIZE;</div><div class='add'>+	pkt_block_size = DIV_ROUND_UP(pkt_info-&gt;length, ICSS_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	/* calculate end BD address post read */</div><div class='add'>+	update_block = read_block + pkt_block_size;</div><div class='add'>+</div><div class='add'>+	/* Check for wrap around */</div><div class='add'>+	if (update_block &gt;= buffer_desc_count) {</div><div class='add'>+		update_block %= buffer_desc_count;</div><div class='add'>+		if (update_block)</div><div class='add'>+			buffer_wrapped = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* calculate new pointer in ram */</div><div class='add'>+	*bd_rd_ptr = rxqueue-&gt;buffer_desc_offset + (update_block * BD_SIZE);</div><div class='add'>+</div><div class='add'>+	actual_pkt_len = pkt_info-&gt;length;</div><div class='add'>+</div><div class='add'>+	/* Allocate a socket buffer for this packet */</div><div class='add'>+	skb = netdev_alloc_skb_ip_align(ndev, actual_pkt_len);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		if (netif_msg_rx_err(emac) &amp;&amp; net_ratelimit())</div><div class='add'>+			netdev_err(ndev, "failed rx buffer alloc\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dst_addr = skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	/* OCMC RAM is not cached and read order is not important */</div><div class='add'>+	ocmc_ram = (__force void *)emac-&gt;prueth-&gt;mem[PRUETH_MEM_OCMC].va;</div><div class='add'>+</div><div class='add'>+	/* Get the start address of the first buffer from</div><div class='add'>+	 * the read buffer description</div><div class='add'>+	 */</div><div class='add'>+	src_addr = ocmc_ram + rxqueue-&gt;buffer_offset +</div><div class='add'>+		   (read_block * ICSS_BLOCK_SIZE);</div><div class='add'>+</div><div class='add'>+	/* Copy the data from PRU buffers(OCMC) to socket buffer(DRAM) */</div><div class='add'>+	if (buffer_wrapped) { /* wrapped around buffer */</div><div class='add'>+		int bytes = (buffer_desc_count - read_block) * ICSS_BLOCK_SIZE;</div><div class='add'>+		int remaining;</div><div class='add'>+		/* bytes is integral multiple of ICSS_BLOCK_SIZE but</div><div class='add'>+		 * entire packet may have fit within the last BD</div><div class='add'>+		 * if pkt_info.length is not integral multiple of</div><div class='add'>+		 * ICSS_BLOCK_SIZE</div><div class='add'>+		 */</div><div class='add'>+		if (pkt_info-&gt;length &lt; bytes)</div><div class='add'>+			bytes = pkt_info-&gt;length;</div><div class='add'>+</div><div class='add'>+		/* copy non-wrapped part */</div><div class='add'>+		memcpy(dst_addr, src_addr, bytes);</div><div class='add'>+</div><div class='add'>+		/* copy wrapped part */</div><div class='add'>+		dst_addr += bytes;</div><div class='add'>+		remaining = actual_pkt_len - bytes;</div><div class='add'>+</div><div class='add'>+		src_addr = ocmc_ram + rxqueue-&gt;buffer_offset;</div><div class='add'>+		memcpy(dst_addr, src_addr, remaining);</div><div class='add'>+		src_addr += remaining;</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(dst_addr, src_addr, actual_pkt_len);</div><div class='add'>+		src_addr += actual_pkt_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_put(skb, actual_pkt_len);</div><div class='add'>+</div><div class='add'>+	/* send packet up the stack */</div><div class='add'>+	skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+</div><div class='add'>+	/* update stats */</div><div class='add'>+	emac-&gt;stats.rx_bytes += actual_pkt_len;</div><div class='add'>+	emac-&gt;stats.rx_packets++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int icssm_emac_rx_packets(struct prueth_emac *emac, int budget)</div><div class='add'>+{</div><div class='add'>+	struct prueth_queue_desc __iomem *queue_desc;</div><div class='add'>+	const struct prueth_queue_info *rxqueue;</div><div class='add'>+	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	struct prueth_packet_info pkt_info;</div><div class='add'>+	int start_queue, end_queue;</div><div class='add'>+	void __iomem *shared_ram;</div><div class='add'>+	u16 bd_rd_ptr, bd_wr_ptr;</div><div class='add'>+	u16 update_rd_ptr;</div><div class='add'>+	u8 overflow_cnt;</div><div class='add'>+	u32 rd_buf_desc;</div><div class='add'>+	int used = 0;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	shared_ram = emac-&gt;prueth-&gt;mem[PRUETH_MEM_SHARED_RAM].va;</div><div class='add'>+</div><div class='add'>+	start_queue = emac-&gt;rx_queue_start;</div><div class='add'>+	end_queue = emac-&gt;rx_queue_end;</div><div class='add'>+</div><div class='add'>+	/* skip Rx if budget is 0 */</div><div class='add'>+	if (!budget)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* search host queues for packets */</div><div class='add'>+	for (i = start_queue; i &lt;= end_queue; i++) {</div><div class='add'>+		queue_desc = emac-&gt;rx_queue_descs + i;</div><div class='add'>+		rxqueue = &amp;queue_infos[PRUETH_PORT_HOST][i];</div><div class='add'>+</div><div class='add'>+		overflow_cnt = readb(&amp;queue_desc-&gt;overflow_cnt);</div><div class='add'>+		if (overflow_cnt &gt; 0) {</div><div class='add'>+			emac-&gt;stats.rx_over_errors += overflow_cnt;</div><div class='add'>+			/* reset to zero */</div><div class='add'>+			writeb(0, &amp;queue_desc-&gt;overflow_cnt);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		bd_rd_ptr = readw(&amp;queue_desc-&gt;rd_ptr);</div><div class='add'>+		bd_wr_ptr = readw(&amp;queue_desc-&gt;wr_ptr);</div><div class='add'>+</div><div class='add'>+		/* while packets are available in this queue */</div><div class='add'>+		while (bd_rd_ptr != bd_wr_ptr) {</div><div class='add'>+			/* get packet info from the read buffer descriptor */</div><div class='add'>+			rd_buf_desc = readl(shared_ram + bd_rd_ptr);</div><div class='add'>+			icssm_parse_packet_info(prueth, rd_buf_desc, &amp;pkt_info);</div><div class='add'>+</div><div class='add'>+			if (pkt_info.length &lt;= 0) {</div><div class='add'>+				/* a packet length of zero will cause us to</div><div class='add'>+				 * never move the read pointer ahead, locking</div><div class='add'>+				 * the driver, so we manually have to move it</div><div class='add'>+				 * to the write pointer, discarding all</div><div class='add'>+				 * remaining packets in this queue. This should</div><div class='add'>+				 * never happen.</div><div class='add'>+				 */</div><div class='add'>+				update_rd_ptr = bd_wr_ptr;</div><div class='add'>+				emac-&gt;stats.rx_length_errors++;</div><div class='add'>+			} else if (pkt_info.length &gt; EMAC_MAX_FRM_SUPPORT) {</div><div class='add'>+				/* if the packet is too large we skip it but we</div><div class='add'>+				 * still need to move the read pointer ahead</div><div class='add'>+				 * and assume something is wrong with the read</div><div class='add'>+				 * pointer as the firmware should be filtering</div><div class='add'>+				 * these packets</div><div class='add'>+				 */</div><div class='add'>+				update_rd_ptr = bd_wr_ptr;</div><div class='add'>+				emac-&gt;stats.rx_length_errors++;</div><div class='add'>+			} else {</div><div class='add'>+				update_rd_ptr = bd_rd_ptr;</div><div class='add'>+				ret = icssm_emac_rx_packet(emac, &amp;update_rd_ptr,</div><div class='add'>+							   &amp;pkt_info, rxqueue);</div><div class='add'>+				if (ret)</div><div class='add'>+					return used;</div><div class='add'>+				used++;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* after reading the buffer descriptor we clear it</div><div class='add'>+			 * to prevent improperly moved read pointer errors</div><div class='add'>+			 * from simply looking like old packets.</div><div class='add'>+			 */</div><div class='add'>+			writel(0, shared_ram + bd_rd_ptr);</div><div class='add'>+</div><div class='add'>+			/* update read pointer in queue descriptor */</div><div class='add'>+			writew(update_rd_ptr, &amp;queue_desc-&gt;rd_ptr);</div><div class='add'>+			bd_rd_ptr = update_rd_ptr;</div><div class='add'>+</div><div class='add'>+			/* all we have room for? */</div><div class='add'>+			if (used &gt;= budget)</div><div class='add'>+				return used;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return used;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int icssm_emac_napi_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = container_of(napi, struct prueth_emac, napi);</div><div class='add'>+	int num_rx;</div><div class='add'>+</div><div class='add'>+	num_rx = icssm_emac_rx_packets(emac, budget);</div><div class='add'>+</div><div class='add'>+	if (num_rx &lt; budget &amp;&amp; napi_complete_done(napi, num_rx))</div><div class='add'>+		enable_irq(emac-&gt;rx_irq);</div><div class='add'>+</div><div class='add'>+	return num_rx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int icssm_emac_set_boot_pru(struct prueth_emac *emac,</div><div class='add'>+				   struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	const struct prueth_firmware *pru_firmwares;</div><div class='add'>+	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	const char *fw_name;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pru_firmwares = &amp;prueth-&gt;fw_data-&gt;fw_pru[emac-&gt;port_id - 1];</div><div class='add'>+	fw_name = pru_firmwares-&gt;fw_name[prueth-&gt;eth_type];</div><div class='add'>+	if (!fw_name) {</div><div class='add'>+		netdev_err(ndev, "eth_type %d not supported\n",</div><div class='add'>+			   prueth-&gt;eth_type);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = rproc_set_firmware(emac-&gt;pru, fw_name);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "failed to set %s firmware: %d\n",</div><div class='add'>+			   fw_name, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = rproc_boot(emac-&gt;pru);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "failed to boot %s firmware: %d\n",</div><div class='add'>+			   fw_name, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int icssm_emac_request_irqs(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = emac-&gt;ndev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = request_irq(emac-&gt;rx_irq, icssm_emac_rx_irq,</div><div class='add'>+			  IRQF_TRIGGER_HIGH,</div><div class='add'>+			  ndev-&gt;name, ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "unable to request RX IRQ\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icssm_ptp_dram_init(struct prueth_emac *emac)</div><div class='add'>+{</div><div class='add'>+	void __iomem *sram = emac-&gt;prueth-&gt;mem[PRUETH_MEM_SHARED_RAM].va;</div><div class='add'>+	u64 temp64;</div><div class='add'>+</div><div class='add'>+	writew(0, sram + MII_RX_CORRECTION_OFFSET);</div><div class='add'>+	writew(0, sram + MII_TX_CORRECTION_OFFSET);</div><div class='add'>+</div><div class='add'>+	/* Initialize RCF to 1 (Linux N/A) */</div><div class='add'>+	writel(1 * 1024, sram + TIMESYNC_TC_RCF_OFFSET);</div><div class='add'>+</div><div class='add'>+	/* This flag will be set and cleared by firmware */</div><div class='add'>+	/* Write Sync0 period for sync signal generation in PTP</div><div class='add'>+	 * memory in shared RAM</div><div class='add'>+	 */</div><div class='add'>+	writel(200000000 / 50, sram + TIMESYNC_SYNC0_WIDTH_OFFSET);</div><div class='add'>+</div><div class='add'>+	/* Write CMP1 period for sync signal generation in PTP</div><div class='add'>+	 * memory in shared RAM</div><div class='add'>+	 */</div><div class='add'>+	temp64 = 1000000;</div><div class='add'>+	memcpy_toio(sram + TIMESYNC_CMP1_CMP_OFFSET, &amp;temp64, sizeof(temp64));</div><div class='add'>+</div><div class='add'>+	/* Write Sync0 period for sync signal generation in PTP</div><div class='add'>+	 * memory in shared RAM</div><div class='add'>+	 */</div><div class='add'>+	writel(1000000, sram + TIMESYNC_CMP1_PERIOD_OFFSET);</div><div class='add'>+</div><div class='add'>+	/* Configures domainNumber list. Firmware supports 2 domains */</div><div class='add'>+	writeb(0, sram + TIMESYNC_DOMAIN_NUMBER_LIST);</div><div class='add'>+	writeb(0, sram + TIMESYNC_DOMAIN_NUMBER_LIST + 1);</div><div class='add'>+</div><div class='add'>+	/* Configure 1-step/2-step */</div><div class='add'>+	writeb(1, sram + DISABLE_SWITCH_SYNC_RELAY_OFFSET);</div><div class='add'>+</div><div class='add'>+	/* Configures the setting to Link local frame without HSR tag */</div><div class='add'>+	writeb(0, sram + LINK_LOCAL_FRAME_HAS_HSR_TAG);</div><div class='add'>+</div><div class='add'>+	/* Enable E2E/UDP PTP message timestamping */</div><div class='add'>+	writeb(1, sram + PTP_IPV4_UDP_E2E_ENABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * icssm_emac_ndo_open - EMAC device open</div><div class='add'>+ * @ndev: network adapter device</div><div class='add'>+ *</div><div class='add'>+ * Called when system wants to start the interface.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 for a successful open, or appropriate error code</div><div class='add'>+ */</div><div class='add'>+static int icssm_emac_ndo_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='add'>+	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* set h/w MAC as user might have re-configured */</div><div class='add'>+	ether_addr_copy(emac-&gt;mac_addr, ndev-&gt;dev_addr);</div><div class='add'>+</div><div class='add'>+	if (!prueth-&gt;emac_configured)</div><div class='add'>+		icssm_prueth_init_ethernet_mode(prueth);</div><div class='add'>+</div><div class='add'>+	icssm_prueth_emac_config(emac);</div><div class='add'>+</div><div class='add'>+	if (!prueth-&gt;emac_configured) {</div><div class='add'>+		icssm_ptp_dram_init(emac);</div><div class='add'>+		ret = icss_iep_init(prueth-&gt;iep, NULL, NULL, 0);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(ndev, "Failed to initialize iep: %d\n", ret);</div><div class='add'>+			goto iep_exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = icssm_emac_set_boot_pru(emac, ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto iep_exit;</div><div class='add'>+</div><div class='add'>+	ret = icssm_emac_request_irqs(emac);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto rproc_shutdown;</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;emac-&gt;napi);</div><div class='add'>+</div><div class='add'>+	/* start PHY */</div><div class='add'>+	phy_start(emac-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	/* enable the port and vlan */</div><div class='add'>+	icssm_prueth_port_enable(emac, true);</div><div class='add'>+</div><div class='add'>+	prueth-&gt;emac_configured |= BIT(emac-&gt;port_id);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_drv(emac))</div><div class='add'>+		dev_notice(&amp;ndev-&gt;dev, "started\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+rproc_shutdown:</div><div class='add'>+	rproc_shutdown(emac-&gt;pru);</div><div class='add'>+</div><div class='add'>+iep_exit:</div><div class='add'>+	if (!prueth-&gt;emac_configured)</div><div class='add'>+		icss_iep_exit(prueth-&gt;iep);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * icssm_emac_ndo_stop - EMAC device stop</div><div class='add'>+ * @ndev: network adapter device</div><div class='add'>+ *</div><div class='add'>+ * Called when system wants to stop or down the interface.</div><div class='add'>+ *</div><div class='add'>+ * Return: Always 0 (Success)</div><div class='add'>+ */</div><div class='add'>+static int icssm_emac_ndo_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='add'>+	struct prueth *prueth = emac-&gt;prueth;</div><div class='add'>+</div><div class='add'>+	prueth-&gt;emac_configured &amp;= ~BIT(emac-&gt;port_id);</div><div class='add'>+</div><div class='add'>+	/* disable the mac port */</div><div class='add'>+	icssm_prueth_port_enable(emac, false);</div><div class='add'>+</div><div class='add'>+	/* stop PHY */</div><div class='add'>+	phy_stop(emac-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	napi_disable(&amp;emac-&gt;napi);</div><div class='add'>+	hrtimer_cancel(&amp;emac-&gt;tx_hrtimer);</div><div class='add'>+</div><div class='add'>+	/* stop the PRU */</div><div class='add'>+	rproc_shutdown(emac-&gt;pru);</div><div class='add'>+</div><div class='add'>+	/* free rx interrupts */</div><div class='add'>+	free_irq(emac-&gt;rx_irq, ndev);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_drv(emac))</div><div class='add'>+		dev_notice(&amp;ndev-&gt;dev, "stopped\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* VLAN-tag PCP to priority queue map for EMAC/Switch/HSR/PRP used by driver</div><div class='add'>+ * Index is PCP val / 2.</div><div class='add'>+ *   low  - pcp 0..3 maps to Q4 for Host</div><div class='add'>+ *   high - pcp 4..7 maps to Q3 for Host</div><div class='add'>+ *   low  - pcp 0..3 maps to Q2 (FWD Queue) for PRU-x</div><div class='add'>+ *   where x = 1 for PRUETH_PORT_MII0</div><div class='add'>+ *             0 for PRUETH_PORT_MII1</div><div class='add'>+ *   high - pcp 4..7 maps to Q1 (FWD Queue) for PRU-x</div><div class='add'>+ */</div><div class='add'>+static const unsigned short emac_pcp_tx_priority_queue_map[] = {</div><div class='add'>+	PRUETH_QUEUE4, PRUETH_QUEUE4,</div><div class='add'>+	PRUETH_QUEUE3, PRUETH_QUEUE3,</div><div class='add'>+	PRUETH_QUEUE2, PRUETH_QUEUE2,</div><div class='add'>+	PRUETH_QUEUE1, PRUETH_QUEUE1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u16 icssm_prueth_get_tx_queue_id(struct prueth *prueth,</div><div class='add'>+					struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	u16 vlan_tci, pcp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = vlan_get_tag(skb, &amp;vlan_tci);</div><div class='add'>+	if (likely(err))</div><div class='add'>+		pcp = 0;</div><div class='add'>+	else</div><div class='add'>+		pcp = (vlan_tci &amp; VLAN_PRIO_MASK) &gt;&gt; VLAN_PRIO_SHIFT;</div><div class='add'>+</div><div class='add'>+	/* Below code (pcp &gt;&gt;= 1) is made common for all</div><div class='add'>+	 * protocols (i.e., EMAC, RSTP, HSR and PRP)*</div><div class='add'>+	 * pcp value 0,1 will be updated to 0 mapped to QUEUE4</div><div class='add'>+	 * pcp value 2,3 will be updated to 1 mapped to QUEUE4</div><div class='add'>+	 * pcp value 4,5 will be updated to 2 mapped to QUEUE3</div><div class='add'>+	 * pcp value 6,7 will be updated to 3 mapped to QUEUE3</div><div class='add'>+	 */</div><div class='add'>+	pcp &gt;&gt;= 1;</div><div class='add'>+</div><div class='add'>+	return emac_pcp_tx_priority_queue_map[pcp];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * icssm_emac_ndo_start_xmit - EMAC Transmit function</div><div class='add'>+ * @skb: SKB pointer</div><div class='add'>+ * @ndev: EMAC network adapter</div><div class='add'>+ *</div><div class='add'>+ * Called by the system to transmit a packet - we queue the packet in</div><div class='add'>+ * EMAC hardware transmit queue</div><div class='add'>+ *</div><div class='add'>+ * Return: enum netdev_tx</div><div class='add'>+ */</div><div class='add'>+static enum netdev_tx icssm_emac_ndo_start_xmit(struct sk_buff *skb,</div><div class='add'>+						struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+	u16 qid;</div><div class='add'>+</div><div class='add'>+	qid = icssm_prueth_get_tx_queue_id(emac-&gt;prueth, skb);</div><div class='add'>+	ret = icssm_prueth_tx_enqueue(emac, skb, qid);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret != -ENOBUFS &amp;&amp; netif_msg_tx_err(emac) &amp;&amp;</div><div class='add'>+		    net_ratelimit())</div><div class='add'>+			netdev_err(ndev, "packet queue failed: %d\n", ret);</div><div class='add'>+		goto fail_tx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emac-&gt;stats.tx_packets++;</div><div class='add'>+	emac-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+fail_tx:</div><div class='add'>+	if (ret == -ENOBUFS) {</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+		hrtimer_start(&amp;emac-&gt;tx_hrtimer,</div><div class='add'>+			      us_to_ktime(HR_TIMER_TX_DELAY_US),</div><div class='add'>+			      HRTIMER_MODE_REL_PINNED);</div><div class='add'>+		ret = NETDEV_TX_BUSY;</div><div class='add'>+	} else {</div><div class='add'>+		/* error */</div><div class='add'>+		emac-&gt;stats.tx_dropped++;</div><div class='add'>+		ret = NET_XMIT_DROP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * icssm_emac_ndo_get_stats64 - EMAC get statistics function</div><div class='add'>+ * @ndev: The EMAC network adapter</div><div class='add'>+ * @stats: rtnl_link_stats structure</div><div class='add'>+ *</div><div class='add'>+ * Called when system wants to get statistics from the device.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static void icssm_emac_ndo_get_stats64(struct net_device *ndev,</div><div class='add'>+				       struct rtnl_link_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_packets = emac-&gt;stats.rx_packets;</div><div class='add'>+	stats-&gt;rx_bytes = emac-&gt;stats.rx_bytes;</div><div class='add'>+	stats-&gt;tx_packets = emac-&gt;stats.tx_packets;</div><div class='add'>+	stats-&gt;tx_bytes = emac-&gt;stats.tx_bytes;</div><div class='add'>+	stats-&gt;tx_dropped = emac-&gt;stats.tx_dropped;</div><div class='add'>+	stats-&gt;rx_over_errors = emac-&gt;stats.rx_over_errors;</div><div class='add'>+	stats-&gt;rx_length_errors = emac-&gt;stats.rx_length_errors;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops emac_netdev_ops = {</div><div class='add'>+	.ndo_open = icssm_emac_ndo_open,</div><div class='add'>+	.ndo_stop = icssm_emac_ndo_stop,</div><div class='add'>+	.ndo_start_xmit = icssm_emac_ndo_start_xmit,</div><div class='add'>+	.ndo_get_stats64 = icssm_emac_ndo_get_stats64,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* get emac_port corresponding to eth_node name */</div><div class='add'>+static int icssm_prueth_node_port(struct device_node *eth_node)</div><div class='add'>+{</div><div class='add'>+	u32 port_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(eth_node, "reg", &amp;port_id);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (port_id == 0)</div><div class='add'>+		return PRUETH_PORT_MII0;</div><div class='add'>+	else if (port_id == 1)</div><div class='add'>+		return PRUETH_PORT_MII1;</div><div class='add'>+	else</div><div class='add'>+		return PRUETH_PORT_INVALID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* get MAC instance corresponding to eth_node name */</div><div class='add'>+static int icssm_prueth_node_mac(struct device_node *eth_node)</div><div class='add'>+{</div><div class='add'>+	u32 port_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(eth_node, "reg", &amp;port_id);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (port_id == 0)</div><div class='add'>+		return PRUETH_MAC0;</div><div class='add'>+	else if (port_id == 1)</div><div class='add'>+		return PRUETH_MAC1;</div><div class='add'>+	else</div><div class='add'>+		return PRUETH_MAC_INVALID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hrtimer_restart icssm_emac_tx_timer_callback(struct hrtimer *timer)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac =</div><div class='add'>+			container_of(timer, struct prueth_emac, tx_hrtimer);</div><div class='add'>+</div><div class='add'>+	if (netif_queue_stopped(emac-&gt;ndev))</div><div class='add'>+		netif_wake_queue(emac-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	return HRTIMER_NORESTART;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int icssm_prueth_netdev_init(struct prueth *prueth,</div><div class='add'>+				    struct device_node *eth_node)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	enum prueth_port port;</div><div class='add'>+	enum prueth_mac mac;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	port = icssm_prueth_node_port(eth_node);</div><div class='add'>+	if (port == PRUETH_PORT_INVALID)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mac = icssm_prueth_node_mac(eth_node);</div><div class='add'>+	if (mac == PRUETH_MAC_INVALID)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ndev = devm_alloc_etherdev(prueth-&gt;dev, sizeof(*emac));</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(ndev, prueth-&gt;dev);</div><div class='add'>+	emac = netdev_priv(ndev);</div><div class='add'>+	prueth-&gt;emac[mac] = emac;</div><div class='add'>+	emac-&gt;prueth = prueth;</div><div class='add'>+	emac-&gt;ndev = ndev;</div><div class='add'>+	emac-&gt;port_id = port;</div><div class='add'>+</div><div class='add'>+	/* by default eth_type is EMAC */</div><div class='add'>+	switch (port) {</div><div class='add'>+	case PRUETH_PORT_MII0:</div><div class='add'>+		emac-&gt;tx_port_queue = PRUETH_PORT_QUEUE_MII0;</div><div class='add'>+</div><div class='add'>+		/* packets from MII0 are on queues 1 through 2 */</div><div class='add'>+		emac-&gt;rx_queue_start = PRUETH_QUEUE1;</div><div class='add'>+		emac-&gt;rx_queue_end = PRUETH_QUEUE2;</div><div class='add'>+</div><div class='add'>+		emac-&gt;dram = PRUETH_MEM_DRAM0;</div><div class='add'>+		emac-&gt;pru = prueth-&gt;pru0;</div><div class='add'>+		break;</div><div class='add'>+	case PRUETH_PORT_MII1:</div><div class='add'>+		emac-&gt;tx_port_queue = PRUETH_PORT_QUEUE_MII1;</div><div class='add'>+</div><div class='add'>+		/* packets from MII1 are on queues 3 through 4 */</div><div class='add'>+		emac-&gt;rx_queue_start = PRUETH_QUEUE3;</div><div class='add'>+		emac-&gt;rx_queue_end = PRUETH_QUEUE4;</div><div class='add'>+</div><div class='add'>+		emac-&gt;dram = PRUETH_MEM_DRAM1;</div><div class='add'>+		emac-&gt;pru = prueth-&gt;pru1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	emac-&gt;rx_irq = of_irq_get_byname(eth_node, "rx");</div><div class='add'>+	if (emac-&gt;rx_irq &lt; 0) {</div><div class='add'>+		ret = emac-&gt;rx_irq;</div><div class='add'>+		if (ret != -EPROBE_DEFER)</div><div class='add'>+			dev_err(prueth-&gt;dev, "could not get rx irq\n");</div><div class='add'>+		goto free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* get mac address from DT and set private and netdev addr */</div><div class='add'>+	ret = of_get_ethdev_address(eth_node, ndev);</div><div class='add'>+	if (!is_valid_ether_addr(ndev-&gt;dev_addr)) {</div><div class='add'>+		eth_hw_addr_random(ndev);</div><div class='add'>+		dev_warn(prueth-&gt;dev, "port %d: using random MAC addr: %pM\n",</div><div class='add'>+			 port, ndev-&gt;dev_addr);</div><div class='add'>+	}</div><div class='add'>+	ether_addr_copy(emac-&gt;mac_addr, ndev-&gt;dev_addr);</div><div class='add'>+</div><div class='add'>+	/* connect PHY */</div><div class='add'>+	emac-&gt;phydev = of_phy_get_and_connect(ndev, eth_node,</div><div class='add'>+					      icssm_emac_adjust_link);</div><div class='add'>+	if (!emac-&gt;phydev) {</div><div class='add'>+		dev_dbg(prueth-&gt;dev, "PHY connection failed\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* remove unsupported modes */</div><div class='add'>+	phy_remove_link_mode(emac-&gt;phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT);</div><div class='add'>+</div><div class='add'>+	phy_remove_link_mode(emac-&gt;phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);</div><div class='add'>+	phy_remove_link_mode(emac-&gt;phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);</div><div class='add'>+</div><div class='add'>+	phy_remove_link_mode(emac-&gt;phydev, ETHTOOL_LINK_MODE_Pause_BIT);</div><div class='add'>+	phy_remove_link_mode(emac-&gt;phydev, ETHTOOL_LINK_MODE_Asym_Pause_BIT);</div><div class='add'>+</div><div class='add'>+	ndev-&gt;dev.of_node = eth_node;</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;emac_netdev_ops;</div><div class='add'>+</div><div class='add'>+	netif_napi_add(ndev, &amp;emac-&gt;napi, icssm_emac_napi_poll);</div><div class='add'>+</div><div class='add'>+	hrtimer_setup(&amp;emac-&gt;tx_hrtimer, &amp;icssm_emac_tx_timer_callback,</div><div class='add'>+		      CLOCK_MONOTONIC, HRTIMER_MODE_REL_PINNED);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+free:</div><div class='add'>+	emac-&gt;ndev = NULL;</div><div class='add'>+	prueth-&gt;emac[mac] = NULL;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icssm_prueth_netdev_exit(struct prueth *prueth,</div><div class='add'>+				     struct device_node *eth_node)</div><div class='add'>+{</div><div class='add'>+	struct prueth_emac *emac;</div><div class='add'>+	enum prueth_mac mac;</div><div class='add'>+</div><div class='add'>+	mac = icssm_prueth_node_mac(eth_node);</div><div class='add'>+	if (mac == PRUETH_MAC_INVALID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	emac = prueth-&gt;emac[mac];</div><div class='add'>+	if (!emac)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	phy_disconnect(emac-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	netif_napi_del(&amp;emac-&gt;napi);</div><div class='add'>+	prueth-&gt;emac[mac] = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int icssm_prueth_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *eth0_node = NULL, *eth1_node = NULL;</div><div class='add'>+	struct device_node *eth_node, *eth_ports_node;</div><div class='add'>+	enum pruss_pru_id pruss_id0, pruss_id1;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct prueth *prueth;</div><div class='add'>+	struct pruss *pruss;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	np = dev-&gt;of_node;</div><div class='add'>+	if (!np)</div><div class='add'>+		return -ENODEV; /* we don't support non DT */</div><div class='add'>+</div><div class='add'>+	prueth = devm_kzalloc(dev, sizeof(*prueth), GFP_KERNEL);</div><div class='add'>+	if (!prueth)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, prueth);</div><div class='add'>+	prueth-&gt;dev = dev;</div><div class='add'>+	prueth-&gt;fw_data = device_get_match_data(dev);</div><div class='add'>+</div><div class='add'>+	eth_ports_node = of_get_child_by_name(np, "ethernet-ports");</div><div class='add'>+	if (!eth_ports_node)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	for_each_child_of_node(eth_ports_node, eth_node) {</div><div class='add'>+		u32 reg;</div><div class='add'>+</div><div class='add'>+		if (strcmp(eth_node-&gt;name, "ethernet-port"))</div><div class='add'>+			continue;</div><div class='add'>+		ret = of_property_read_u32(eth_node, "reg", &amp;reg);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(dev, "%pOF error reading port_id %d\n",</div><div class='add'>+				eth_node, ret);</div><div class='add'>+			of_node_put(eth_node);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		of_node_get(eth_node);</div><div class='add'>+</div><div class='add'>+		if (reg == 0 &amp;&amp; !eth0_node) {</div><div class='add'>+			eth0_node = eth_node;</div><div class='add'>+			if (!of_device_is_available(eth0_node)) {</div><div class='add'>+				of_node_put(eth0_node);</div><div class='add'>+				eth0_node = NULL;</div><div class='add'>+			}</div><div class='add'>+		} else if (reg == 1 &amp;&amp; !eth1_node) {</div><div class='add'>+			eth1_node = eth_node;</div><div class='add'>+			if (!of_device_is_available(eth1_node)) {</div><div class='add'>+				of_node_put(eth1_node);</div><div class='add'>+				eth1_node = NULL;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			if (reg == 0 || reg == 1)</div><div class='add'>+				dev_err(dev, "duplicate port reg value: %d\n",</div><div class='add'>+					reg);</div><div class='add'>+			else</div><div class='add'>+				dev_err(dev, "invalid port reg value: %d\n",</div><div class='add'>+					reg);</div><div class='add'>+</div><div class='add'>+			of_node_put(eth_node);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_node_put(eth_ports_node);</div><div class='add'>+</div><div class='add'>+	/* At least one node must be present and available else we fail */</div><div class='add'>+	if (!eth0_node &amp;&amp; !eth1_node) {</div><div class='add'>+		dev_err(dev, "neither port0 nor port1 node available\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prueth-&gt;eth_node[PRUETH_MAC0] = eth0_node;</div><div class='add'>+	prueth-&gt;eth_node[PRUETH_MAC1] = eth1_node;</div><div class='add'>+</div><div class='add'>+	prueth-&gt;mii_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-rt");</div><div class='add'>+	if (IS_ERR(prueth-&gt;mii_rt)) {</div><div class='add'>+		dev_err(dev, "couldn't get mii-rt syscon regmap\n");</div><div class='add'>+		ret = PTR_ERR(prueth-&gt;mii_rt);</div><div class='add'>+		goto put_eth;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (eth0_node) {</div><div class='add'>+		prueth-&gt;pru0 = pru_rproc_get(np, 0, &amp;pruss_id0);</div><div class='add'>+		if (IS_ERR(prueth-&gt;pru0)) {</div><div class='add'>+			ret = PTR_ERR(prueth-&gt;pru0);</div><div class='add'>+			dev_err_probe(dev, ret, "unable to get PRU0");</div><div class='add'>+			goto put_eth;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (eth1_node) {</div><div class='add'>+		prueth-&gt;pru1 = pru_rproc_get(np, 1, &amp;pruss_id1);</div><div class='add'>+		if (IS_ERR(prueth-&gt;pru1)) {</div><div class='add'>+			ret = PTR_ERR(prueth-&gt;pru1);</div><div class='add'>+			dev_err_probe(dev, ret, "unable to get PRU1");</div><div class='add'>+			goto put_pru0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pruss = pruss_get(prueth-&gt;pru0 ? prueth-&gt;pru0 : prueth-&gt;pru1);</div><div class='add'>+	if (IS_ERR(pruss)) {</div><div class='add'>+		ret = PTR_ERR(pruss);</div><div class='add'>+		dev_err(dev, "unable to get pruss handle\n");</div><div class='add'>+		goto put_pru1;</div><div class='add'>+	}</div><div class='add'>+	prueth-&gt;pruss = pruss;</div><div class='add'>+</div><div class='add'>+	/* Configure PRUSS */</div><div class='add'>+	if (eth0_node)</div><div class='add'>+		pruss_cfg_gpimode(pruss, pruss_id0, PRUSS_GPI_MODE_MII);</div><div class='add'>+	if (eth1_node)</div><div class='add'>+		pruss_cfg_gpimode(pruss, pruss_id1, PRUSS_GPI_MODE_MII);</div><div class='add'>+	pruss_cfg_miirt_enable(pruss, true);</div><div class='add'>+	pruss_cfg_xfr_enable(pruss, PRU_TYPE_PRU, true);</div><div class='add'>+</div><div class='add'>+	/* Get PRUSS mem resources */</div><div class='add'>+	/* OCMC is system resource which we get separately */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(pruss_mem_ids); i++) {</div><div class='add'>+		/* skip appropriate DRAM if not required */</div><div class='add'>+		if (!eth0_node &amp;&amp; i == PRUETH_MEM_DRAM0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!eth1_node &amp;&amp; i == PRUETH_MEM_DRAM1)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = pruss_request_mem_region(pruss, pruss_mem_ids[i],</div><div class='add'>+					       &amp;prueth-&gt;mem[i]);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "unable to get PRUSS resource %d: %d\n",</div><div class='add'>+				i, ret);</div><div class='add'>+			goto put_mem;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prueth-&gt;sram_pool = of_gen_pool_get(np, "sram", 0);</div><div class='add'>+	if (!prueth-&gt;sram_pool) {</div><div class='add'>+		dev_err(dev, "unable to get SRAM pool\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto put_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prueth-&gt;ocmc_ram_size = OCMC_RAM_SIZE;</div><div class='add'>+	/* Decreased by 8KB to address the reserved region for AM33x */</div><div class='add'>+	if (prueth-&gt;fw_data-&gt;driver_data == PRUSS_AM33XX)</div><div class='add'>+		prueth-&gt;ocmc_ram_size = (SZ_64K - SZ_8K);</div><div class='add'>+</div><div class='add'>+	prueth-&gt;mem[PRUETH_MEM_OCMC].va =</div><div class='add'>+			(void __iomem *)gen_pool_alloc(prueth-&gt;sram_pool,</div><div class='add'>+						       prueth-&gt;ocmc_ram_size);</div><div class='add'>+	if (!prueth-&gt;mem[PRUETH_MEM_OCMC].va) {</div><div class='add'>+		dev_err(dev, "unable to allocate OCMC resource\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto put_mem;</div><div class='add'>+	}</div><div class='add'>+	prueth-&gt;mem[PRUETH_MEM_OCMC].pa = gen_pool_virt_to_phys</div><div class='add'>+		(prueth-&gt;sram_pool, (unsigned long)</div><div class='add'>+		 prueth-&gt;mem[PRUETH_MEM_OCMC].va);</div><div class='add'>+	prueth-&gt;mem[PRUETH_MEM_OCMC].size = prueth-&gt;ocmc_ram_size;</div><div class='add'>+	dev_dbg(dev, "ocmc: pa %pa va %p size %#zx\n",</div><div class='add'>+		&amp;prueth-&gt;mem[PRUETH_MEM_OCMC].pa,</div><div class='add'>+		prueth-&gt;mem[PRUETH_MEM_OCMC].va,</div><div class='add'>+		prueth-&gt;mem[PRUETH_MEM_OCMC].size);</div><div class='add'>+</div><div class='add'>+	/* setup netdev interfaces */</div><div class='add'>+	if (eth0_node) {</div><div class='add'>+		ret = icssm_prueth_netdev_init(prueth, eth0_node);</div><div class='add'>+		if (ret) {</div><div class='add'>+			if (ret != -EPROBE_DEFER) {</div><div class='add'>+				dev_err(dev, "netdev init %s failed: %d\n",</div><div class='add'>+					eth0_node-&gt;name, ret);</div><div class='add'>+			}</div><div class='add'>+			goto free_pool;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (eth1_node) {</div><div class='add'>+		ret = icssm_prueth_netdev_init(prueth, eth1_node);</div><div class='add'>+		if (ret) {</div><div class='add'>+			if (ret != -EPROBE_DEFER) {</div><div class='add'>+				dev_err(dev, "netdev init %s failed: %d\n",</div><div class='add'>+					eth1_node-&gt;name, ret);</div><div class='add'>+			}</div><div class='add'>+			goto netdev_exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prueth-&gt;iep = icss_iep_get(np);</div><div class='add'>+	if (IS_ERR(prueth-&gt;iep)) {</div><div class='add'>+		ret = PTR_ERR(prueth-&gt;iep);</div><div class='add'>+		dev_err(dev, "unable to get IEP\n");</div><div class='add'>+		goto netdev_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* register the network devices */</div><div class='add'>+	if (eth0_node) {</div><div class='add'>+		ret = register_netdev(prueth-&gt;emac[PRUETH_MAC0]-&gt;ndev);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "can't register netdev for port MII0");</div><div class='add'>+			goto iep_put;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		prueth-&gt;registered_netdevs[PRUETH_MAC0] =</div><div class='add'>+			prueth-&gt;emac[PRUETH_MAC0]-&gt;ndev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (eth1_node) {</div><div class='add'>+		ret = register_netdev(prueth-&gt;emac[PRUETH_MAC1]-&gt;ndev);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "can't register netdev for port MII1");</div><div class='add'>+			goto netdev_unregister;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		prueth-&gt;registered_netdevs[PRUETH_MAC1] =</div><div class='add'>+			prueth-&gt;emac[PRUETH_MAC1]-&gt;ndev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "TI PRU ethernet driver initialized: %s EMAC mode\n",</div><div class='add'>+		 (!eth0_node || !eth1_node) ? "single" : "dual");</div><div class='add'>+</div><div class='add'>+	if (eth1_node)</div><div class='add'>+		of_node_put(eth1_node);</div><div class='add'>+	if (eth0_node)</div><div class='add'>+		of_node_put(eth0_node);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+netdev_unregister:</div><div class='add'>+	for (i = 0; i &lt; PRUETH_NUM_MACS; i++) {</div><div class='add'>+		if (!prueth-&gt;registered_netdevs[i])</div><div class='add'>+			continue;</div><div class='add'>+		unregister_netdev(prueth-&gt;registered_netdevs[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+iep_put:</div><div class='add'>+	icss_iep_put(prueth-&gt;iep);</div><div class='add'>+	prueth-&gt;iep = NULL;</div><div class='add'>+</div><div class='add'>+netdev_exit:</div><div class='add'>+	for (i = 0; i &lt; PRUETH_NUM_MACS; i++) {</div><div class='add'>+		eth_node = prueth-&gt;eth_node[i];</div><div class='add'>+		if (!eth_node)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		icssm_prueth_netdev_exit(prueth, eth_node);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+free_pool:</div><div class='add'>+	gen_pool_free(prueth-&gt;sram_pool,</div><div class='add'>+		      (unsigned long)prueth-&gt;mem[PRUETH_MEM_OCMC].va,</div><div class='add'>+		      prueth-&gt;ocmc_ram_size);</div><div class='add'>+</div><div class='add'>+put_mem:</div><div class='add'>+	for (i = PRUETH_MEM_DRAM0; i &lt; PRUETH_MEM_OCMC; i++) {</div><div class='add'>+		if (prueth-&gt;mem[i].va)</div><div class='add'>+			pruss_release_mem_region(pruss, &amp;prueth-&gt;mem[i]);</div><div class='add'>+	}</div><div class='add'>+	pruss_put(prueth-&gt;pruss);</div><div class='add'>+</div><div class='add'>+put_pru1:</div><div class='add'>+	if (eth1_node)</div><div class='add'>+		pru_rproc_put(prueth-&gt;pru1);</div><div class='add'>+put_pru0:</div><div class='add'>+	if (eth0_node)</div><div class='add'>+		pru_rproc_put(prueth-&gt;pru0);</div><div class='add'>+put_eth:</div><div class='add'>+	of_node_put(eth1_node);</div><div class='add'>+	of_node_put(eth0_node);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void icssm_prueth_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct prueth *prueth = platform_get_drvdata(pdev);</div><div class='add'>+	struct device_node *eth_node;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PRUETH_NUM_MACS; i++) {</div><div class='add'>+		if (!prueth-&gt;registered_netdevs[i])</div><div class='add'>+			continue;</div><div class='add'>+		unregister_netdev(prueth-&gt;registered_netdevs[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PRUETH_NUM_MACS; i++) {</div><div class='add'>+		eth_node = prueth-&gt;eth_node[i];</div><div class='add'>+		if (!eth_node)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		icssm_prueth_netdev_exit(prueth, eth_node);</div><div class='add'>+		of_node_put(eth_node);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gen_pool_free(prueth-&gt;sram_pool,</div><div class='add'>+		      (unsigned long)prueth-&gt;mem[PRUETH_MEM_OCMC].va,</div><div class='add'>+		      prueth-&gt;ocmc_ram_size);</div><div class='add'>+</div><div class='add'>+	for (i = PRUETH_MEM_DRAM0; i &lt; PRUETH_MEM_OCMC; i++) {</div><div class='add'>+		if (prueth-&gt;mem[i].va)</div><div class='add'>+			pruss_release_mem_region(prueth-&gt;pruss,</div><div class='add'>+						 &amp;prueth-&gt;mem[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	icss_iep_put(prueth-&gt;iep);</div><div class='add'>+	prueth-&gt;iep = NULL;</div><div class='add'>+</div><div class='add'>+	pruss_put(prueth-&gt;pruss);</div><div class='add'>+</div><div class='add'>+	if (prueth-&gt;eth_node[PRUETH_MAC0])</div><div class='add'>+		pru_rproc_put(prueth-&gt;pru0);</div><div class='add'>+	if (prueth-&gt;eth_node[PRUETH_MAC1])</div><div class='add'>+		pru_rproc_put(prueth-&gt;pru1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int icssm_prueth_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct prueth *prueth = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PRUETH_NUM_MACS; i++) {</div><div class='add'>+		ndev = prueth-&gt;registered_netdevs[i];</div><div class='add'>+</div><div class='add'>+		if (!ndev)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (netif_running(ndev)) {</div><div class='add'>+			netif_device_detach(ndev);</div><div class='add'>+			ret = icssm_emac_ndo_stop(ndev);</div><div class='add'>+			if (ret &lt; 0) {</div><div class='add'>+				netdev_err(ndev, "failed to stop: %d", ret);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int icssm_prueth_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct prueth *prueth = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PRUETH_NUM_MACS; i++) {</div><div class='add'>+		ndev = prueth-&gt;registered_netdevs[i];</div><div class='add'>+</div><div class='add'>+		if (!ndev)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (netif_running(ndev)) {</div><div class='add'>+			ret = icssm_emac_ndo_open(ndev);</div><div class='add'>+			if (ret &lt; 0) {</div><div class='add'>+				netdev_err(ndev, "failed to start: %d", ret);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			netif_device_attach(ndev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_PM_SLEEP */</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops prueth_dev_pm_ops = {</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(icssm_prueth_suspend, icssm_prueth_resume)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* AM335x SoC-specific firmware data */</div><div class='add'>+static struct prueth_private_data am335x_prueth_pdata = {</div><div class='add'>+	.driver_data = PRUSS_AM33XX,</div><div class='add'>+	.fw_pru[PRUSS_PRU0] = {</div><div class='add'>+		.fw_name[PRUSS_ETHTYPE_EMAC] =</div><div class='add'>+			"ti-pruss/am335x-pru0-prueth-fw.elf",</div><div class='add'>+	},</div><div class='add'>+	.fw_pru[PRUSS_PRU1] = {</div><div class='add'>+		.fw_name[PRUSS_ETHTYPE_EMAC] =</div><div class='add'>+			"ti-pruss/am335x-pru1-prueth-fw.elf",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* AM437x SoC-specific firmware data */</div><div class='add'>+static struct prueth_private_data am437x_prueth_pdata = {</div><div class='add'>+	.driver_data = PRUSS_AM43XX,</div><div class='add'>+	.fw_pru[PRUSS_PRU0] = {</div><div class='add'>+		.fw_name[PRUSS_ETHTYPE_EMAC] =</div><div class='add'>+			"ti-pruss/am437x-pru0-prueth-fw.elf",</div><div class='add'>+	},</div><div class='add'>+	.fw_pru[PRUSS_PRU1] = {</div><div class='add'>+		.fw_name[PRUSS_ETHTYPE_EMAC] =</div><div class='add'>+			"ti-pruss/am437x-pru1-prueth-fw.elf",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* AM57xx SoC-specific firmware data */</div><div class='add'>+static struct prueth_private_data am57xx_prueth_pdata = {</div><div class='add'>+	.driver_data = PRUSS_AM57XX,</div><div class='add'>+	.fw_pru[PRUSS_PRU0] = {</div><div class='add'>+		.fw_name[PRUSS_ETHTYPE_EMAC] =</div><div class='add'>+			"ti-pruss/am57xx-pru0-prueth-fw.elf",</div><div class='add'>+	},</div><div class='add'>+	.fw_pru[PRUSS_PRU1] = {</div><div class='add'>+		.fw_name[PRUSS_ETHTYPE_EMAC] =</div><div class='add'>+			"ti-pruss/am57xx-pru1-prueth-fw.elf",</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id prueth_dt_match[] = {</div><div class='add'>+	{ .compatible = "ti,am57-prueth", .data = &amp;am57xx_prueth_pdata, },</div><div class='add'>+	{ .compatible = "ti,am4376-prueth", .data = &amp;am437x_prueth_pdata, },</div><div class='add'>+	{ .compatible = "ti,am3359-prueth", .data = &amp;am335x_prueth_pdata, },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, prueth_dt_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver prueth_driver = {</div><div class='add'>+	.probe = icssm_prueth_probe,</div><div class='add'>+	.remove = icssm_prueth_remove,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "prueth",</div><div class='add'>+		.of_match_table = prueth_dt_match,</div><div class='add'>+		.pm = &amp;prueth_dev_pm_ops,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(prueth_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Roger Quadros &lt;rogerq@ti.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Andrew F. Davis &lt;afd@ti.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("PRUSS ICSSM Ethernet Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssm/icssm_prueth.h b/drivers/net/ethernet/ti/icssm/icssm_prueth.h<br/>new file mode 100644<br/>index 000000000000..8e7e0af08144<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssm/icssm_prueth.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssm/icssm_prueth.h</a></div><div class='hunk'>@@ -0,0 +1,262 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Texas Instruments ICSSM Ethernet driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __NET_TI_PRUETH_H</div><div class='add'>+#define __NET_TI_PRUETH_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/pruss_driver.h&gt;</div><div class='add'>+#include &lt;linux/remoteproc/pruss.h&gt;</div><div class='add'>+</div><div class='add'>+#include "icssm_switch.h"</div><div class='add'>+#include "icssm_prueth_ptp.h"</div><div class='add'>+</div><div class='add'>+/* ICSSM size of redundancy tag */</div><div class='add'>+#define ICSSM_LRE_TAG_SIZE	6</div><div class='add'>+</div><div class='add'>+/* PRUSS local memory map */</div><div class='add'>+#define ICSS_LOCAL_SHARED_RAM	0x00010000</div><div class='add'>+#define EMAC_MAX_PKTLEN		(ETH_HLEN + VLAN_HLEN + ETH_DATA_LEN)</div><div class='add'>+/* Below macro is for 1528 Byte Frame support, to Allow even with</div><div class='add'>+ * Redundancy tag</div><div class='add'>+ */</div><div class='add'>+#define EMAC_MAX_FRM_SUPPORT (ETH_HLEN + VLAN_HLEN + ETH_DATA_LEN + \</div><div class='add'>+			      ICSSM_LRE_TAG_SIZE)</div><div class='add'>+</div><div class='add'>+/* PRU Ethernet Type - Ethernet functionality (protocol</div><div class='add'>+ * implemented) provided by the PRU firmware being loaded.</div><div class='add'>+ */</div><div class='add'>+enum pruss_ethtype {</div><div class='add'>+	PRUSS_ETHTYPE_EMAC = 0,</div><div class='add'>+	PRUSS_ETHTYPE_HSR,</div><div class='add'>+	PRUSS_ETHTYPE_PRP,</div><div class='add'>+	PRUSS_ETHTYPE_SWITCH,</div><div class='add'>+	PRUSS_ETHTYPE_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define PRUETH_IS_EMAC(p)	((p)-&gt;eth_type == PRUSS_ETHTYPE_EMAC)</div><div class='add'>+#define PRUETH_IS_SWITCH(p)	((p)-&gt;eth_type == PRUSS_ETHTYPE_SWITCH)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct prueth_queue_desc - Queue descriptor</div><div class='add'>+ * @rd_ptr:	Read pointer, points to a buffer descriptor in Shared PRU RAM.</div><div class='add'>+ * @wr_ptr:	Write pointer, points to a buffer descriptor in Shared PRU RAM.</div><div class='add'>+ * @busy_s:	Slave queue busy flag, set by slave(us) to request access from</div><div class='add'>+ *		master(PRU).</div><div class='add'>+ * @status:	Bit field status register, Bits:</div><div class='add'>+ *			0: Master queue busy flag.</div><div class='add'>+ *			1: Packet has been placed in collision queue.</div><div class='add'>+ *			2: Packet has been discarded due to overflow.</div><div class='add'>+ * @max_fill_level:	Maximum queue usage seen.</div><div class='add'>+ * @overflow_cnt:	Count of queue overflows.</div><div class='add'>+ *</div><div class='add'>+ * Each port has up to 4 queues with variable length. The queue is processed</div><div class='add'>+ * as ring buffer with read and write pointers. Both pointers are address</div><div class='add'>+ * pointers and increment by 4 for each buffer descriptor position. Queue has</div><div class='add'>+ * a length defined in constants and a status.</div><div class='add'>+ */</div><div class='add'>+struct prueth_queue_desc {</div><div class='add'>+	u16 rd_ptr;</div><div class='add'>+	u16 wr_ptr;</div><div class='add'>+	u8 busy_s;</div><div class='add'>+	u8 status;</div><div class='add'>+	u8 max_fill_level;</div><div class='add'>+	u8 overflow_cnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct prueth_queue_info - Information about a queue in memory</div><div class='add'>+ * @buffer_offset: buffer offset in OCMC RAM</div><div class='add'>+ * @queue_desc_offset: queue descriptor offset in Shared RAM</div><div class='add'>+ * @buffer_desc_offset: buffer descriptors offset in Shared RAM</div><div class='add'>+ * @buffer_desc_end: end address of buffer descriptors in Shared RAM</div><div class='add'>+ */</div><div class='add'>+struct prueth_queue_info {</div><div class='add'>+	u16 buffer_offset;</div><div class='add'>+	u16 queue_desc_offset;</div><div class='add'>+	u16 buffer_desc_offset;</div><div class='add'>+	u16 buffer_desc_end;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct prueth_packet_info - Info about a packet in buffer</div><div class='add'>+ * @shadow: this packet is stored in the collision queue</div><div class='add'>+ * @port: port packet is on</div><div class='add'>+ * @length: length of packet</div><div class='add'>+ * @broadcast: this packet is a broadcast packet</div><div class='add'>+ * @error: this packet has an error</div><div class='add'>+ * @lookup_success: src mac found in FDB</div><div class='add'>+ * @flood: packet is to be flooded</div><div class='add'>+ * @timestamp: Specifies if timestamp is appended to the packet</div><div class='add'>+ */</div><div class='add'>+struct prueth_packet_info {</div><div class='add'>+	bool shadow;</div><div class='add'>+	unsigned int port;</div><div class='add'>+	unsigned int length;</div><div class='add'>+	bool broadcast;</div><div class='add'>+	bool error;</div><div class='add'>+	bool lookup_success;</div><div class='add'>+	bool flood;</div><div class='add'>+	bool timestamp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* In switch mode there are 3 real ports i.e. 3 mac addrs.</div><div class='add'>+ * however Linux sees only the host side port. The other 2 ports</div><div class='add'>+ * are the switch ports.</div><div class='add'>+ * In emac mode there are 2 real ports i.e. 2 mac addrs.</div><div class='add'>+ * Linux sees both the ports.</div><div class='add'>+ */</div><div class='add'>+enum prueth_port {</div><div class='add'>+	PRUETH_PORT_HOST = 0,	/* host side port */</div><div class='add'>+	PRUETH_PORT_MII0,	/* physical port MII 0 */</div><div class='add'>+	PRUETH_PORT_MII1,	/* physical port MII 1 */</div><div class='add'>+	PRUETH_PORT_INVALID,	/* Invalid prueth port */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum prueth_mac {</div><div class='add'>+	PRUETH_MAC0 = 0,</div><div class='add'>+	PRUETH_MAC1,</div><div class='add'>+	PRUETH_NUM_MACS,</div><div class='add'>+	PRUETH_MAC_INVALID,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* In both switch &amp; emac modes there are 3 port queues</div><div class='add'>+ * EMAC mode:</div><div class='add'>+ *     RX packets for both MII0 &amp; MII1 ports come on</div><div class='add'>+ *     QUEUE_HOST.</div><div class='add'>+ *     TX packets for MII0 go on QUEUE_MII0, TX packets</div><div class='add'>+ *     for MII1 go on QUEUE_MII1.</div><div class='add'>+ * Switch mode:</div><div class='add'>+ *     Host port RX packets come on QUEUE_HOST</div><div class='add'>+ *     TX packets might have to go on MII0 or MII1 or both.</div><div class='add'>+ *     MII0 TX queue is QUEUE_MII0 and MII1 TX queue is</div><div class='add'>+ *     QUEUE_MII1.</div><div class='add'>+ */</div><div class='add'>+enum prueth_port_queue_id {</div><div class='add'>+	PRUETH_PORT_QUEUE_HOST = 0,</div><div class='add'>+	PRUETH_PORT_QUEUE_MII0,</div><div class='add'>+	PRUETH_PORT_QUEUE_MII1,</div><div class='add'>+	PRUETH_PORT_QUEUE_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Each port queue has 4 queues and 1 collision queue */</div><div class='add'>+enum prueth_queue_id {</div><div class='add'>+	PRUETH_QUEUE1 = 0,</div><div class='add'>+	PRUETH_QUEUE2,</div><div class='add'>+	PRUETH_QUEUE3,</div><div class='add'>+	PRUETH_QUEUE4,</div><div class='add'>+	PRUETH_COLQUEUE,        /* collision queue */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct prueth_firmware - PRU Ethernet FW data</div><div class='add'>+ * @fw_name: firmware names of firmware to run on PRU</div><div class='add'>+ */</div><div class='add'>+struct prueth_firmware {</div><div class='add'>+	const char *fw_name[PRUSS_ETHTYPE_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PRUeth memory range identifiers */</div><div class='add'>+enum prueth_mem {</div><div class='add'>+	PRUETH_MEM_DRAM0 = 0,</div><div class='add'>+	PRUETH_MEM_DRAM1,</div><div class='add'>+	PRUETH_MEM_SHARED_RAM,</div><div class='add'>+	PRUETH_MEM_OCMC,</div><div class='add'>+	PRUETH_MEM_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum pruss_device {</div><div class='add'>+	PRUSS_AM57XX = 0,</div><div class='add'>+	PRUSS_AM43XX,</div><div class='add'>+	PRUSS_AM33XX,</div><div class='add'>+	PRUSS_K2G</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct prueth_private_data - PRU Ethernet private data</div><div class='add'>+ * @driver_data: PRU Ethernet device name</div><div class='add'>+ * @fw_pru: firmware names to be used for PRUSS ethernet usecases</div><div class='add'>+ */</div><div class='add'>+struct prueth_private_data {</div><div class='add'>+	enum pruss_device driver_data;</div><div class='add'>+	const struct prueth_firmware fw_pru[PRUSS_NUM_PRUS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct prueth_emac_stats {</div><div class='add'>+	u64 tx_packets;</div><div class='add'>+	u64 tx_dropped;</div><div class='add'>+	u64 tx_bytes;</div><div class='add'>+	u64 rx_packets;</div><div class='add'>+	u64 rx_bytes;</div><div class='add'>+	u64 rx_length_errors;</div><div class='add'>+	u64 rx_over_errors;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* data for each emac port */</div><div class='add'>+struct prueth_emac {</div><div class='add'>+	struct prueth *prueth;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+</div><div class='add'>+	struct rproc *pru;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	struct prueth_queue_desc __iomem *rx_queue_descs;</div><div class='add'>+	struct prueth_queue_desc __iomem *tx_queue_descs;</div><div class='add'>+</div><div class='add'>+	int link;</div><div class='add'>+	int speed;</div><div class='add'>+	int duplex;</div><div class='add'>+	int rx_irq;</div><div class='add'>+</div><div class='add'>+	enum prueth_port_queue_id tx_port_queue;</div><div class='add'>+	enum prueth_queue_id rx_queue_start;</div><div class='add'>+	enum prueth_queue_id rx_queue_end;</div><div class='add'>+	enum prueth_port port_id;</div><div class='add'>+	enum prueth_mem dram;</div><div class='add'>+	const char *phy_id;</div><div class='add'>+	u32 msg_enable;</div><div class='add'>+	u8 mac_addr[6];</div><div class='add'>+	phy_interface_t phy_if;</div><div class='add'>+</div><div class='add'>+	/* spin lock used to protect</div><div class='add'>+	 * during link configuration</div><div class='add'>+	 */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+</div><div class='add'>+	struct hrtimer tx_hrtimer;</div><div class='add'>+	struct prueth_emac_stats stats;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct prueth {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct pruss *pruss;</div><div class='add'>+	struct rproc *pru0, *pru1;</div><div class='add'>+	struct pruss_mem_region mem[PRUETH_MEM_MAX];</div><div class='add'>+	struct gen_pool *sram_pool;</div><div class='add'>+	struct regmap *mii_rt;</div><div class='add'>+	struct icss_iep *iep;</div><div class='add'>+</div><div class='add'>+	const struct prueth_private_data *fw_data;</div><div class='add'>+	struct prueth_fw_offsets *fw_offsets;</div><div class='add'>+</div><div class='add'>+	struct device_node *eth_node[PRUETH_NUM_MACS];</div><div class='add'>+	struct prueth_emac *emac[PRUETH_NUM_MACS];</div><div class='add'>+	struct net_device *registered_netdevs[PRUETH_NUM_MACS];</div><div class='add'>+</div><div class='add'>+	unsigned int eth_type;</div><div class='add'>+	size_t ocmc_ram_size;</div><div class='add'>+	u8 emac_configured;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void icssm_parse_packet_info(struct prueth *prueth, u32 buffer_descriptor,</div><div class='add'>+			     struct prueth_packet_info *pkt_info);</div><div class='add'>+int icssm_emac_rx_packet(struct prueth_emac *emac, u16 *bd_rd_ptr,</div><div class='add'>+			 struct prueth_packet_info *pkt_info,</div><div class='add'>+			 const struct prueth_queue_info *rxqueue);</div><div class='add'>+</div><div class='add'>+#endif /* __NET_TI_PRUETH_H */</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssm/icssm_prueth_ptp.h b/drivers/net/ethernet/ti/icssm/icssm_prueth_ptp.h<br/>new file mode 100644<br/>index 000000000000..e0bf692beda1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssm/icssm_prueth_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssm/icssm_prueth_ptp.h</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com</div><div class='add'>+ */</div><div class='add'>+#ifndef PRUETH_PTP_H</div><div class='add'>+#define PRUETH_PTP_H</div><div class='add'>+</div><div class='add'>+#define RX_SYNC_TIMESTAMP_OFFSET_P1		0x8    /* 8 bytes */</div><div class='add'>+#define RX_PDELAY_REQ_TIMESTAMP_OFFSET_P1	0x14   /* 12 bytes */</div><div class='add'>+</div><div class='add'>+#define DISABLE_PTP_FRAME_FORWARDING_CTRL_OFFSET 0x14	/* 1 byte */</div><div class='add'>+</div><div class='add'>+#define RX_PDELAY_RESP_TIMESTAMP_OFFSET_P1	0x20   /* 12 bytes */</div><div class='add'>+#define RX_SYNC_TIMESTAMP_OFFSET_P2		0x2c   /* 12 bytes */</div><div class='add'>+#define RX_PDELAY_REQ_TIMESTAMP_OFFSET_P2	0x38   /* 12 bytes */</div><div class='add'>+#define RX_PDELAY_RESP_TIMESTAMP_OFFSET_P2	0x44   /* 12 bytes */</div><div class='add'>+#define TIMESYNC_DOMAIN_NUMBER_LIST		0x50   /* 2 bytes */</div><div class='add'>+#define P1_SMA_LINE_DELAY_OFFSET		0x52   /* 4 bytes */</div><div class='add'>+#define P2_SMA_LINE_DELAY_OFFSET		0x56   /* 4 bytes */</div><div class='add'>+#define TIMESYNC_SECONDS_COUNT_OFFSET		0x5a   /* 6 bytes */</div><div class='add'>+#define TIMESYNC_TC_RCF_OFFSET			0x60   /* 4 bytes */</div><div class='add'>+#define DUT_IS_MASTER_OFFSET			0x64   /* 1 byte */</div><div class='add'>+#define MASTER_PORT_NUM_OFFSET			0x65   /* 1 byte */</div><div class='add'>+#define SYNC_MASTER_MAC_OFFSET			0x66   /* 6 bytes */</div><div class='add'>+#define TX_TS_NOTIFICATION_OFFSET_SYNC_P1	0x6c   /* 1 byte */</div><div class='add'>+#define TX_TS_NOTIFICATION_OFFSET_PDEL_REQ_P1	0x6d   /* 1 byte */</div><div class='add'>+#define TX_TS_NOTIFICATION_OFFSET_PDEL_RES_P1	0x6e   /* 1 byte */</div><div class='add'>+#define TX_TS_NOTIFICATION_OFFSET_SYNC_P2	0x6f   /* 1 byte */</div><div class='add'>+#define TX_TS_NOTIFICATION_OFFSET_PDEL_REQ_P2	0x70   /* 1 byte */</div><div class='add'>+#define TX_TS_NOTIFICATION_OFFSET_PDEL_RES_P2	0x71   /* 1 byte */</div><div class='add'>+#define TX_SYNC_TIMESTAMP_OFFSET_P1		0x72   /* 12 bytes */</div><div class='add'>+#define TX_PDELAY_REQ_TIMESTAMP_OFFSET_P1	0x7e   /* 12 bytes */</div><div class='add'>+#define TX_PDELAY_RESP_TIMESTAMP_OFFSET_P1	0x8a   /* 12 bytes */</div><div class='add'>+#define TX_SYNC_TIMESTAMP_OFFSET_P2		0x96   /* 12 bytes */</div><div class='add'>+#define TX_PDELAY_REQ_TIMESTAMP_OFFSET_P2	0xa2   /* 12 bytes */</div><div class='add'>+#define TX_PDELAY_RESP_TIMESTAMP_OFFSET_P2	0xae   /* 12 bytes */</div><div class='add'>+#define TIMESYNC_CTRL_VAR_OFFSET		0xba   /* 1 byte */</div><div class='add'>+#define DISABLE_SWITCH_SYNC_RELAY_OFFSET	0xbb   /* 1 byte */</div><div class='add'>+#define MII_RX_CORRECTION_OFFSET		0xbc   /* 2 bytes */</div><div class='add'>+#define MII_TX_CORRECTION_OFFSET		0xbe   /* 2 bytes */</div><div class='add'>+#define TIMESYNC_CMP1_CMP_OFFSET		0xc0   /* 8 bytes */</div><div class='add'>+#define TIMESYNC_SYNC0_CMP_OFFSET		0xc8   /* 8 bytes */</div><div class='add'>+#define TIMESYNC_CMP1_PERIOD_OFFSET		0xd0   /* 4 bytes */</div><div class='add'>+#define TIMESYNC_SYNC0_WIDTH_OFFSET		0xd4   /* 4 bytes */</div><div class='add'>+#define SINGLE_STEP_IEP_OFFSET_P1		0xd8   /* 8 bytes */</div><div class='add'>+#define SINGLE_STEP_SECONDS_OFFSET_P1		0xe0   /* 8 bytes */</div><div class='add'>+#define SINGLE_STEP_IEP_OFFSET_P2		0xe8   /* 8 bytes */</div><div class='add'>+#define SINGLE_STEP_SECONDS_OFFSET_P2		0xf0   /* 8 bytes */</div><div class='add'>+#define LINK_LOCAL_FRAME_HAS_HSR_TAG		0xf8   /* 1 bytes */</div><div class='add'>+#define PTP_PREV_TX_TIMESTAMP_P1		0xf9  /* 8 bytes */</div><div class='add'>+#define PTP_PREV_TX_TIMESTAMP_P2		0x101  /* 8 bytes */</div><div class='add'>+#define PTP_CLK_IDENTITY_OFFSET			0x109  /* 8 bytes */</div><div class='add'>+#define PTP_SCRATCH_MEM				0x111  /* 16 byte */</div><div class='add'>+#define PTP_IPV4_UDP_E2E_ENABLE			0x121  /* 1 byte */</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PRUETH_PTP_SYNC,</div><div class='add'>+	PRUETH_PTP_DLY_REQ,</div><div class='add'>+	PRUETH_PTP_DLY_RESP,</div><div class='add'>+	PRUETH_PTP_TS_EVENTS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define PRUETH_PTP_TS_SIZE		12</div><div class='add'>+#define PRUETH_PTP_TS_NOTIFY_SIZE	1</div><div class='add'>+#define PRUETH_PTP_TS_NOTIFY_MASK	0xff</div><div class='add'>+</div><div class='add'>+/* Bit definitions for TIMESYNC_CTRL */</div><div class='add'>+#define TIMESYNC_CTRL_BG_ENABLE    BIT(0)</div><div class='add'>+#define TIMESYNC_CTRL_FORCED_2STEP BIT(1)</div><div class='add'>+</div><div class='add'>+static inline u32 icssm_prueth_tx_ts_offs_get(u8 port, u8 event)</div><div class='add'>+{</div><div class='add'>+	return TX_SYNC_TIMESTAMP_OFFSET_P1 + port *</div><div class='add'>+		PRUETH_PTP_TS_EVENTS * PRUETH_PTP_TS_SIZE +</div><div class='add'>+		event * PRUETH_PTP_TS_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 icssm_prueth_tx_ts_notify_offs_get(u8 port, u8 event)</div><div class='add'>+{</div><div class='add'>+	return TX_TS_NOTIFICATION_OFFSET_SYNC_P1 +</div><div class='add'>+		PRUETH_PTP_TS_EVENTS * PRUETH_PTP_TS_NOTIFY_SIZE * port +</div><div class='add'>+		event * PRUETH_PTP_TS_NOTIFY_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* PRUETH_PTP_H */</div><div class='head'>diff --git a/drivers/net/ethernet/ti/icssm/icssm_switch.h b/drivers/net/ethernet/ti/icssm/icssm_switch.h<br/>new file mode 100644<br/>index 000000000000..8b494ffdcde7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/icssm/icssm_switch.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/icssm/icssm_switch.h</a></div><div class='hunk'>@@ -0,0 +1,257 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+/* Copyright (C) 2015-2021 Texas Instruments Incorporated - https://www.ti.com</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ICSS_SWITCH_H</div><div class='add'>+#define __ICSS_SWITCH_H</div><div class='add'>+</div><div class='add'>+/* Basic Switch Parameters</div><div class='add'>+ * Used to auto compute offset addresses on L3 OCMC RAM. Do not modify these</div><div class='add'>+ * without changing firmware accordingly</div><div class='add'>+ */</div><div class='add'>+#define SWITCH_BUFFER_SIZE	(64 * 1024)	/* L3 buffer */</div><div class='add'>+#define ICSS_BLOCK_SIZE		32		/* data bytes per BD */</div><div class='add'>+#define BD_SIZE			4		/* byte buffer descriptor */</div><div class='add'>+#define NUM_QUEUES		4		/* Queues on Port 0/1/2 */</div><div class='add'>+</div><div class='add'>+#define PORT_LINK_MASK		0x1</div><div class='add'>+#define PORT_IS_HD_MASK		0x2</div><div class='add'>+</div><div class='add'>+/* Physical Port queue size (number of BDs). Same for both ports */</div><div class='add'>+#define QUEUE_1_SIZE		97	/* Network Management high */</div><div class='add'>+#define QUEUE_2_SIZE		97	/* Network Management low */</div><div class='add'>+#define QUEUE_3_SIZE		97	/* Protocol specific */</div><div class='add'>+#define QUEUE_4_SIZE		97	/* NRT (IP,ARP, ICMP) */</div><div class='add'>+</div><div class='add'>+/* Host queue size (number of BDs). Each BD points to data buffer of 32 bytes.</div><div class='add'>+ * HOST PORT QUEUES can buffer up to 4 full sized frames per queue</div><div class='add'>+ */</div><div class='add'>+#define	HOST_QUEUE_1_SIZE	194	/* Protocol and VLAN priority 7 &amp; 6 */</div><div class='add'>+#define HOST_QUEUE_2_SIZE	194	/* Protocol mid */</div><div class='add'>+#define HOST_QUEUE_3_SIZE	194	/* Protocol low */</div><div class='add'>+#define HOST_QUEUE_4_SIZE	194	/* NRT (IP, ARP, ICMP) */</div><div class='add'>+</div><div class='add'>+#define COL_QUEUE_SIZE		0</div><div class='add'>+</div><div class='add'>+/* NRT Buffer descriptor definition</div><div class='add'>+ * Each buffer descriptor points to a max 32 byte block and has 32 bit in size</div><div class='add'>+ * to have atomic operation.</div><div class='add'>+ * PRU can address bytewise into memory.</div><div class='add'>+ * Definition of 32 bit descriptor is as follows</div><div class='add'>+ *</div><div class='add'>+ * Bits		Name			Meaning</div><div class='add'>+ * =============================================================================</div><div class='add'>+ * 0..7		Index		points to index in buffer queue, max 256 x 32</div><div class='add'>+ *				byte blocks can be addressed</div><div class='add'>+ * 6		LookupSuccess	For switch, FDB lookup was successful (source</div><div class='add'>+ *				MAC address found in FDB).</div><div class='add'>+ *				For RED, NodeTable lookup was successful.</div><div class='add'>+ * 7		Flood		Packet should be flooded (destination MAC</div><div class='add'>+ *				address found in FDB). For switch only.</div><div class='add'>+ * 8..12	Block_length	number of valid bytes in this specific block.</div><div class='add'>+ *				Will be &lt;=32 bytes on last block of packet</div><div class='add'>+ * 13		More		"More" bit indicating that there are more blocks</div><div class='add'>+ * 14		Shadow		indicates that "index" is pointing into shadow</div><div class='add'>+ *				buffer</div><div class='add'>+ * 15		TimeStamp	indicates that this packet has time stamp in</div><div class='add'>+ *				separate buffer - only needed if PTP runs on</div><div class='add'>+ *				host</div><div class='add'>+ * 16..17	Port		different meaning for ingress and egress,</div><div class='add'>+ *				Ingress: Port = 0 indicates phy port 1 and</div><div class='add'>+ *				Port = 1 indicates phy port 2.</div><div class='add'>+ *				Egress: 0 sends on phy port 1 and 1 sends on</div><div class='add'>+ *				phy port 2. Port = 2 goes over MAC table</div><div class='add'>+ *				look-up</div><div class='add'>+ * 18..28	Length		11 bit of total packet length which is put into</div><div class='add'>+ *				first BD only so that host access only one BD</div><div class='add'>+ * 29		VlanTag		indicates that packet has Length/Type field of</div><div class='add'>+ *				0x08100 with VLAN tag in following byte</div><div class='add'>+ * 30		Broadcast	indicates that packet goes out on both physical</div><div class='add'>+ *				ports,	there will be two bd but only one buffer</div><div class='add'>+ * 31		Error		indicates there was an error in the packet</div><div class='add'>+ */</div><div class='add'>+#define PRUETH_BD_START_FLAG_MASK	BIT(0)</div><div class='add'>+#define PRUETH_BD_START_FLAG_SHIFT	0</div><div class='add'>+</div><div class='add'>+#define PRUETH_BD_HSR_FRAME_MASK	BIT(4)</div><div class='add'>+#define PRUETH_BD_HSR_FRAME_SHIFT	4</div><div class='add'>+</div><div class='add'>+#define PRUETH_BD_SUP_HSR_FRAME_MASK	BIT(5)</div><div class='add'>+#define PRUETH_BD_SUP_HSR_FRAME_SHIFT	5</div><div class='add'>+</div><div class='add'>+#define PRUETH_BD_LOOKUP_SUCCESS_MASK	BIT(6)</div><div class='add'>+#define PRUETH_BD_LOOKUP_SUCCESS_SHIFT	6</div><div class='add'>+</div><div class='add'>+#define PRUETH_BD_SW_FLOOD_MASK		BIT(7)</div><div class='add'>+#define PRUETH_BD_SW_FLOOD_SHIFT	7</div><div class='add'>+</div><div class='add'>+#define	PRUETH_BD_SHADOW_MASK		BIT(14)</div><div class='add'>+#define	PRUETH_BD_SHADOW_SHIFT		14</div><div class='add'>+</div><div class='add'>+#define PRUETH_BD_TIMESTAMP_MASK	BIT(15)</div><div class='add'>+#define PRUETH_BD_TIMESTAMP_SHIFT	15</div><div class='add'>+</div><div class='add'>+#define PRUETH_BD_PORT_MASK		GENMASK(17, 16)</div><div class='add'>+#define PRUETH_BD_PORT_SHIFT		16</div><div class='add'>+</div><div class='add'>+#define PRUETH_BD_LENGTH_MASK		GENMASK(28, 18)</div><div class='add'>+#define PRUETH_BD_LENGTH_SHIFT		18</div><div class='add'>+</div><div class='add'>+#define PRUETH_BD_BROADCAST_MASK	BIT(30)</div><div class='add'>+#define PRUETH_BD_BROADCAST_SHIFT	30</div><div class='add'>+</div><div class='add'>+#define PRUETH_BD_ERROR_MASK		BIT(31)</div><div class='add'>+#define PRUETH_BD_ERROR_SHIFT		31</div><div class='add'>+</div><div class='add'>+/* The following offsets indicate which sections of the memory are used</div><div class='add'>+ * for EMAC internal tasks</div><div class='add'>+ */</div><div class='add'>+#define DRAM_START_OFFSET		0x1E98</div><div class='add'>+#define SRAM_START_OFFSET		0x400</div><div class='add'>+</div><div class='add'>+/* General Purpose Statistics</div><div class='add'>+ * These are present on both PRU0 and PRU1 DRAM</div><div class='add'>+ */</div><div class='add'>+/* base statistics offset */</div><div class='add'>+#define STATISTICS_OFFSET	0x1F00</div><div class='add'>+#define STAT_SIZE		0x98</div><div class='add'>+</div><div class='add'>+/* Offset for storing</div><div class='add'>+ * 1. Storm Prevention Params</div><div class='add'>+ * 2. PHY Speed Offset</div><div class='add'>+ * 3. Port Status Offset</div><div class='add'>+ * These are present on both PRU0 and PRU1</div><div class='add'>+ */</div><div class='add'>+/* 4 bytes */</div><div class='add'>+#define STORM_PREVENTION_OFFSET_BC	(STATISTICS_OFFSET + STAT_SIZE)</div><div class='add'>+/* 4 bytes */</div><div class='add'>+#define PHY_SPEED_OFFSET		(STATISTICS_OFFSET + STAT_SIZE + 4)</div><div class='add'>+/* 1 byte */</div><div class='add'>+#define PORT_STATUS_OFFSET		(STATISTICS_OFFSET + STAT_SIZE + 8)</div><div class='add'>+/* 1 byte */</div><div class='add'>+#define COLLISION_COUNTER		(STATISTICS_OFFSET + STAT_SIZE + 9)</div><div class='add'>+/* 4 bytes */</div><div class='add'>+#define RX_PKT_SIZE_OFFSET		(STATISTICS_OFFSET + STAT_SIZE + 10)</div><div class='add'>+/* 4 bytes */</div><div class='add'>+#define PORT_CONTROL_ADDR		(STATISTICS_OFFSET + STAT_SIZE + 14)</div><div class='add'>+/* 6 bytes */</div><div class='add'>+#define PORT_MAC_ADDR			(STATISTICS_OFFSET + STAT_SIZE + 18)</div><div class='add'>+/* 1 byte */</div><div class='add'>+#define RX_INT_STATUS_OFFSET		(STATISTICS_OFFSET + STAT_SIZE + 24)</div><div class='add'>+/* 4 bytes */</div><div class='add'>+#define STORM_PREVENTION_OFFSET_MC	(STATISTICS_OFFSET + STAT_SIZE + 25)</div><div class='add'>+/* 4 bytes */</div><div class='add'>+#define STORM_PREVENTION_OFFSET_UC	(STATISTICS_OFFSET + STAT_SIZE + 29)</div><div class='add'>+/* 4 bytes ? */</div><div class='add'>+#define STP_INVALID_STATE_OFFSET	(STATISTICS_OFFSET + STAT_SIZE + 33)</div><div class='add'>+</div><div class='add'>+/* DRAM Offsets for EMAC</div><div class='add'>+ * Present on Both DRAM0 and DRAM1</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* 4 queue descriptors for port tx = 32 bytes */</div><div class='add'>+#define TX_CONTEXT_Q1_OFFSET_ADDR	(PORT_QUEUE_DESC_OFFSET + 32)</div><div class='add'>+#define PORT_QUEUE_DESC_OFFSET	(ICSS_EMAC_TTS_CYC_TX_SOF + 8)</div><div class='add'>+</div><div class='add'>+/* EMAC Time Triggered Send Offsets */</div><div class='add'>+#define ICSS_EMAC_TTS_CYC_TX_SOF	(ICSS_EMAC_TTS_PREV_TX_SOF + 8)</div><div class='add'>+#define ICSS_EMAC_TTS_PREV_TX_SOF	\</div><div class='add'>+	(ICSS_EMAC_TTS_MISSED_CYCLE_CNT_OFFSET	+ 4)</div><div class='add'>+#define ICSS_EMAC_TTS_MISSED_CYCLE_CNT_OFFSET	(ICSS_EMAC_TTS_STATUS_OFFSET \</div><div class='add'>+						 + 4)</div><div class='add'>+#define ICSS_EMAC_TTS_STATUS_OFFSET	(ICSS_EMAC_TTS_CFG_TIME_OFFSET + 4)</div><div class='add'>+#define ICSS_EMAC_TTS_CFG_TIME_OFFSET	(ICSS_EMAC_TTS_CYCLE_PERIOD_OFFSET + 4)</div><div class='add'>+#define ICSS_EMAC_TTS_CYCLE_PERIOD_OFFSET	\</div><div class='add'>+	(ICSS_EMAC_TTS_CYCLE_START_OFFSET + 8)</div><div class='add'>+#define ICSS_EMAC_TTS_CYCLE_START_OFFSET	ICSS_EMAC_TTS_BASE_OFFSET</div><div class='add'>+#define ICSS_EMAC_TTS_BASE_OFFSET	DRAM_START_OFFSET</div><div class='add'>+</div><div class='add'>+/* Shared RAM offsets for EMAC */</div><div class='add'>+</div><div class='add'>+/* Queue Descriptors */</div><div class='add'>+</div><div class='add'>+/* 4 queue descriptors for port 0 (host receive). 32 bytes */</div><div class='add'>+#define HOST_QUEUE_DESC_OFFSET		(HOST_QUEUE_SIZE_ADDR + 16)</div><div class='add'>+</div><div class='add'>+/* table offset for queue size:</div><div class='add'>+ * 3 ports * 4 Queues * 1 byte offset = 12 bytes</div><div class='add'>+ */</div><div class='add'>+#define HOST_QUEUE_SIZE_ADDR		(HOST_QUEUE_OFFSET_ADDR + 8)</div><div class='add'>+/* table offset for queue:</div><div class='add'>+ * 4 Queues * 2 byte offset = 8 bytes</div><div class='add'>+ */</div><div class='add'>+#define HOST_QUEUE_OFFSET_ADDR		(HOST_QUEUE_DESCRIPTOR_OFFSET_ADDR + 8)</div><div class='add'>+/* table offset for Host queue descriptors:</div><div class='add'>+ * 1 ports * 4 Queues * 2 byte offset = 8 bytes</div><div class='add'>+ */</div><div class='add'>+#define HOST_QUEUE_DESCRIPTOR_OFFSET_ADDR	(HOST_Q4_RX_CONTEXT_OFFSET + 8)</div><div class='add'>+</div><div class='add'>+/* Host Port Rx Context */</div><div class='add'>+#define HOST_Q4_RX_CONTEXT_OFFSET	(HOST_Q3_RX_CONTEXT_OFFSET + 8)</div><div class='add'>+#define HOST_Q3_RX_CONTEXT_OFFSET	(HOST_Q2_RX_CONTEXT_OFFSET + 8)</div><div class='add'>+#define HOST_Q2_RX_CONTEXT_OFFSET	(HOST_Q1_RX_CONTEXT_OFFSET + 8)</div><div class='add'>+#define HOST_Q1_RX_CONTEXT_OFFSET	(EMAC_PROMISCUOUS_MODE_OFFSET + 4)</div><div class='add'>+</div><div class='add'>+/* Promiscuous mode control */</div><div class='add'>+#define EMAC_P1_PROMISCUOUS_BIT		BIT(0)</div><div class='add'>+#define EMAC_P2_PROMISCUOUS_BIT		BIT(1)</div><div class='add'>+#define EMAC_PROMISCUOUS_MODE_OFFSET	(EMAC_RESERVED + 4)</div><div class='add'>+#define EMAC_RESERVED			EOF_48K_BUFFER_BD</div><div class='add'>+</div><div class='add'>+/* allow for max 48k buffer which spans the descriptors up to 0x1800 6kB */</div><div class='add'>+#define EOF_48K_BUFFER_BD	(P0_BUFFER_DESC_OFFSET + HOST_BD_SIZE + \</div><div class='add'>+				 PORT_BD_SIZE)</div><div class='add'>+</div><div class='add'>+#define HOST_BD_SIZE		((HOST_QUEUE_1_SIZE +	\</div><div class='add'>+				  HOST_QUEUE_2_SIZE + HOST_QUEUE_3_SIZE + \</div><div class='add'>+				  HOST_QUEUE_4_SIZE) * BD_SIZE)</div><div class='add'>+#define PORT_BD_SIZE		((QUEUE_1_SIZE + QUEUE_2_SIZE +	\</div><div class='add'>+				  QUEUE_3_SIZE + QUEUE_4_SIZE) * 2 * BD_SIZE)</div><div class='add'>+</div><div class='add'>+#define END_OF_BD_POOL		(P2_Q4_BD_OFFSET + QUEUE_4_SIZE * BD_SIZE)</div><div class='add'>+#define P2_Q4_BD_OFFSET		(P2_Q3_BD_OFFSET + QUEUE_3_SIZE * BD_SIZE)</div><div class='add'>+#define P2_Q3_BD_OFFSET		(P2_Q2_BD_OFFSET + QUEUE_2_SIZE * BD_SIZE)</div><div class='add'>+#define P2_Q2_BD_OFFSET		(P2_Q1_BD_OFFSET + QUEUE_1_SIZE * BD_SIZE)</div><div class='add'>+#define P2_Q1_BD_OFFSET		(P1_Q4_BD_OFFSET + QUEUE_4_SIZE * BD_SIZE)</div><div class='add'>+#define P1_Q4_BD_OFFSET		(P1_Q3_BD_OFFSET + QUEUE_3_SIZE * BD_SIZE)</div><div class='add'>+#define P1_Q3_BD_OFFSET		(P1_Q2_BD_OFFSET + QUEUE_2_SIZE * BD_SIZE)</div><div class='add'>+#define P1_Q2_BD_OFFSET		(P1_Q1_BD_OFFSET + QUEUE_1_SIZE * BD_SIZE)</div><div class='add'>+#define P1_Q1_BD_OFFSET		(P0_Q4_BD_OFFSET + HOST_QUEUE_4_SIZE * BD_SIZE)</div><div class='add'>+#define P0_Q4_BD_OFFSET		(P0_Q3_BD_OFFSET + HOST_QUEUE_3_SIZE * BD_SIZE)</div><div class='add'>+#define P0_Q3_BD_OFFSET		(P0_Q2_BD_OFFSET + HOST_QUEUE_2_SIZE * BD_SIZE)</div><div class='add'>+#define P0_Q2_BD_OFFSET		(P0_Q1_BD_OFFSET + HOST_QUEUE_1_SIZE * BD_SIZE)</div><div class='add'>+#define P0_Q1_BD_OFFSET		P0_BUFFER_DESC_OFFSET</div><div class='add'>+#define P0_BUFFER_DESC_OFFSET	SRAM_START_OFFSET</div><div class='add'>+</div><div class='add'>+/* Memory Usage of L3 OCMC RAM */</div><div class='add'>+</div><div class='add'>+/* L3 64KB Memory - mainly buffer Pool */</div><div class='add'>+#define END_OF_BUFFER_POOL	(P2_Q4_BUFFER_OFFSET + QUEUE_4_SIZE *	\</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P2_Q4_BUFFER_OFFSET	(P2_Q3_BUFFER_OFFSET + QUEUE_3_SIZE *	\</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P2_Q3_BUFFER_OFFSET	(P2_Q2_BUFFER_OFFSET + QUEUE_2_SIZE *	\</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P2_Q2_BUFFER_OFFSET	(P2_Q1_BUFFER_OFFSET + QUEUE_1_SIZE *	\</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P2_Q1_BUFFER_OFFSET	(P1_Q4_BUFFER_OFFSET + QUEUE_4_SIZE *	\</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P1_Q4_BUFFER_OFFSET	(P1_Q3_BUFFER_OFFSET + QUEUE_3_SIZE *	\</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P1_Q3_BUFFER_OFFSET	(P1_Q2_BUFFER_OFFSET + QUEUE_2_SIZE *	\</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P1_Q2_BUFFER_OFFSET	(P1_Q1_BUFFER_OFFSET + QUEUE_1_SIZE *	\</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P1_Q1_BUFFER_OFFSET	(P0_Q4_BUFFER_OFFSET + HOST_QUEUE_4_SIZE * \</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P0_Q4_BUFFER_OFFSET	(P0_Q3_BUFFER_OFFSET + HOST_QUEUE_3_SIZE * \</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P0_Q3_BUFFER_OFFSET	(P0_Q2_BUFFER_OFFSET + HOST_QUEUE_2_SIZE * \</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P0_Q2_BUFFER_OFFSET	(P0_Q1_BUFFER_OFFSET + HOST_QUEUE_1_SIZE * \</div><div class='add'>+				 ICSS_BLOCK_SIZE)</div><div class='add'>+#define P0_COL_BUFFER_OFFSET	0xEE00</div><div class='add'>+#define P0_Q1_BUFFER_OFFSET	0x0000</div><div class='add'>+</div><div class='add'>+#endif /* __ICSS_SWITCH_H */</div><div class='head'>diff --git a/drivers/net/ethernet/ti/netcp.h b/drivers/net/ethernet/ti/netcp.h<br/>index 7007eb8bed36..b9cbd3b4a8a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/netcp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/netcp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/netcp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/netcp.h</a></div><div class='hunk'>@@ -207,6 +207,11 @@ struct netcp_module {</div><div class='ctx'> 	int	(*del_vid)(void *intf_priv, int vid);</div><div class='ctx'> 	int	(*ioctl)(void *intf_priv, struct ifreq *req, int cmd);</div><div class='ctx'> 	int	(*set_rx_mode)(void *intf_priv, bool promisc);</div><div class='add'>+	int	(*hwtstamp_get)(void *intf_priv,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg);</div><div class='add'>+	int	(*hwtstamp_set)(void *intf_priv,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				struct netlink_ext_ack *extack);</div><div class='ctx'> </div><div class='ctx'> 	/* used internally */</div><div class='ctx'> 	struct list_head	module_list;</div><div class='head'>diff --git a/drivers/net/ethernet/ti/netcp_core.c b/drivers/net/ethernet/ti/netcp_core.c<br/>index 857820657bac..5ed1c46bbcb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/netcp_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/netcp_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/netcp_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/netcp_core.c</a></div><div class='hunk'>@@ -1338,10 +1338,10 @@ int netcp_txpipe_open(struct netcp_tx_pipe *tx_pipe)</div><div class='ctx'> </div><div class='ctx'> 	tx_pipe-&gt;dma_channel = knav_dma_open_channel(dev,</div><div class='ctx'> 				tx_pipe-&gt;dma_chan_name, &amp;config);</div><div class='del'>-	if (IS_ERR(tx_pipe-&gt;dma_channel)) {</div><div class='add'>+	if (!tx_pipe-&gt;dma_channel) {</div><div class='ctx'> 		dev_err(dev, "failed opening tx chan(%s)\n",</div><div class='ctx'> 			tx_pipe-&gt;dma_chan_name);</div><div class='del'>-		ret = PTR_ERR(tx_pipe-&gt;dma_channel);</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1359,7 +1359,7 @@ int netcp_txpipe_open(struct netcp_tx_pipe *tx_pipe)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	if (!IS_ERR_OR_NULL(tx_pipe-&gt;dma_channel))</div><div class='add'>+	if (tx_pipe-&gt;dma_channel)</div><div class='ctx'> 		knav_dma_close_channel(tx_pipe-&gt;dma_channel);</div><div class='ctx'> 	tx_pipe-&gt;dma_channel = NULL;</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1678,10 +1678,10 @@ static int netcp_setup_navigator_resources(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	netcp-&gt;rx_channel = knav_dma_open_channel(netcp-&gt;netcp_device-&gt;device,</div><div class='ctx'> 					netcp-&gt;dma_chan_name, &amp;config);</div><div class='del'>-	if (IS_ERR(netcp-&gt;rx_channel)) {</div><div class='add'>+	if (!netcp-&gt;rx_channel) {</div><div class='ctx'> 		dev_err(netcp-&gt;ndev_dev, "failed opening rx chan(%s\n",</div><div class='ctx'> 			netcp-&gt;dma_chan_name);</div><div class='del'>-		ret = PTR_ERR(netcp-&gt;rx_channel);</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 		goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1781,6 +1781,62 @@ static int netcp_ndo_stop(struct net_device *ndev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int netcp_ndo_hwtstamp_get(struct net_device *ndev,</div><div class='add'>+				  struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct netcp_intf *netcp = netdev_priv(ndev);</div><div class='add'>+	struct netcp_intf_modpriv *intf_modpriv;</div><div class='add'>+	struct netcp_module *module;</div><div class='add'>+	int err = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(ndev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for_each_module(netcp, intf_modpriv) {</div><div class='add'>+		module = intf_modpriv-&gt;netcp_module;</div><div class='add'>+		if (!module-&gt;hwtstamp_get)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = module-&gt;hwtstamp_get(intf_modpriv-&gt;module_priv, config);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int netcp_ndo_hwtstamp_set(struct net_device *ndev,</div><div class='add'>+				  struct kernel_hwtstamp_config *config,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct netcp_intf *netcp = netdev_priv(ndev);</div><div class='add'>+	struct netcp_intf_modpriv *intf_modpriv;</div><div class='add'>+	struct netcp_module *module;</div><div class='add'>+	int ret = -1, err = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(ndev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for_each_module(netcp, intf_modpriv) {</div><div class='add'>+		module = intf_modpriv-&gt;netcp_module;</div><div class='add'>+		if (!module-&gt;hwtstamp_set)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = module-&gt;hwtstamp_set(intf_modpriv-&gt;module_priv, config,</div><div class='add'>+					   extack);</div><div class='add'>+		if ((err &lt; 0) &amp;&amp; (err != -EOPNOTSUPP)) {</div><div class='add'>+			NL_SET_ERR_MSG_WEAK_MOD(extack,</div><div class='add'>+						"At least one module failed to setup HW timestamps");</div><div class='add'>+			ret = err;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		if (err == 0)</div><div class='add'>+			ret = err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return (ret == 0) ? 0 : err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int netcp_ndo_ioctl(struct net_device *ndev,</div><div class='ctx'> 			   struct ifreq *req, int cmd)</div><div class='ctx'> {</div><div class='hunk'>@@ -1952,6 +2008,8 @@ static const struct net_device_ops netcp_netdev_ops = {</div><div class='ctx'> 	.ndo_tx_timeout		= netcp_ndo_tx_timeout,</div><div class='ctx'> 	.ndo_select_queue	= dev_pick_tx_zero,</div><div class='ctx'> 	.ndo_setup_tc		= netcp_setup_tc,</div><div class='add'>+	.ndo_hwtstamp_get	= netcp_ndo_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= netcp_ndo_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int netcp_create_interface(struct netcp_device *netcp_device,</div><div class='head'>diff --git a/drivers/net/ethernet/ti/netcp_ethss.c b/drivers/net/ethernet/ti/netcp_ethss.c<br/>index 63e686f0b119..8f46e9be76b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/netcp_ethss.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/netcp_ethss.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/netcp_ethss.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/netcp_ethss.c</a></div><div class='hunk'>@@ -2591,20 +2591,26 @@ static int gbe_rxtstamp(struct gbe_intf *gbe_intf, struct netcp_packet *p_info)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gbe_hwtstamp_get(struct gbe_intf *gbe_intf, struct ifreq *ifr)</div><div class='add'>+static int gbe_hwtstamp_get(void *intf_priv, struct kernel_hwtstamp_config *cfg)</div><div class='ctx'> {</div><div class='del'>-	struct gbe_priv *gbe_dev = gbe_intf-&gt;gbe_dev;</div><div class='del'>-	struct cpts *cpts = gbe_dev-&gt;cpts;</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='add'>+	struct gbe_intf *gbe_intf = intf_priv;</div><div class='add'>+	struct gbe_priv *gbe_dev;</div><div class='add'>+	struct phy_device *phy;</div><div class='add'>+</div><div class='add'>+	gbe_dev = gbe_intf-&gt;gbe_dev;</div><div class='ctx'> </div><div class='del'>-	if (!cpts)</div><div class='add'>+	if (!gbe_dev-&gt;cpts)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	phy = gbe_intf-&gt;slave-&gt;phy;</div><div class='add'>+	if (phy_has_hwtstamp(phy))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	cfg.flags = 0;</div><div class='del'>-	cfg.tx_type = gbe_dev-&gt;tx_ts_enabled ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='del'>-	cfg.rx_filter = gbe_dev-&gt;rx_ts_enabled;</div><div class='add'>+	cfg-&gt;flags = 0;</div><div class='add'>+	cfg-&gt;tx_type = gbe_dev-&gt;tx_ts_enabled ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='add'>+	cfg-&gt;rx_filter = gbe_dev-&gt;rx_ts_enabled;</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gbe_hwtstamp(struct gbe_intf *gbe_intf)</div><div class='hunk'>@@ -2637,19 +2643,23 @@ static void gbe_hwtstamp(struct gbe_intf *gbe_intf)</div><div class='ctx'> 	writel(ctl,    GBE_REG_ADDR(slave, port_regs, ts_ctl_ltype2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gbe_hwtstamp_set(struct gbe_intf *gbe_intf, struct ifreq *ifr)</div><div class='add'>+static int gbe_hwtstamp_set(void *intf_priv, struct kernel_hwtstamp_config *cfg,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct gbe_priv *gbe_dev = gbe_intf-&gt;gbe_dev;</div><div class='del'>-	struct cpts *cpts = gbe_dev-&gt;cpts;</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='add'>+	struct gbe_intf *gbe_intf = intf_priv;</div><div class='add'>+	struct gbe_priv *gbe_dev;</div><div class='add'>+	struct phy_device *phy;</div><div class='ctx'> </div><div class='del'>-	if (!cpts)</div><div class='add'>+	gbe_dev = gbe_intf-&gt;gbe_dev;</div><div class='add'>+</div><div class='add'>+	if (!gbe_dev-&gt;cpts)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	phy = gbe_intf-&gt;slave-&gt;phy;</div><div class='add'>+	if (phy_has_hwtstamp(phy))</div><div class='add'>+		return phy-&gt;mii_ts-&gt;hwtstamp_set(phy-&gt;mii_ts, cfg, extack);</div><div class='ctx'> </div><div class='del'>-	switch (cfg.tx_type) {</div><div class='add'>+	switch (cfg-&gt;tx_type) {</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='ctx'> 		gbe_dev-&gt;tx_ts_enabled = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2660,7 +2670,7 @@ static int gbe_hwtstamp_set(struct gbe_intf *gbe_intf, struct ifreq *ifr)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (cfg.rx_filter) {</div><div class='add'>+	switch (cfg-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		gbe_dev-&gt;rx_ts_enabled = HWTSTAMP_FILTER_NONE;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -2668,7 +2678,7 @@ static int gbe_hwtstamp_set(struct gbe_intf *gbe_intf, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='ctx'> 		gbe_dev-&gt;rx_ts_enabled = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='del'>-		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='add'>+		cfg-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='hunk'>@@ -2680,7 +2690,7 @@ static int gbe_hwtstamp_set(struct gbe_intf *gbe_intf, struct ifreq *ifr)</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='ctx'> 		gbe_dev-&gt;rx_ts_enabled = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='del'>-		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		cfg-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='hunk'>@@ -2688,7 +2698,7 @@ static int gbe_hwtstamp_set(struct gbe_intf *gbe_intf, struct ifreq *ifr)</div><div class='ctx'> </div><div class='ctx'> 	gbe_hwtstamp(gbe_intf);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gbe_register_cpts(struct gbe_priv *gbe_dev)</div><div class='hunk'>@@ -2745,12 +2755,15 @@ static inline void gbe_unregister_cpts(struct gbe_priv *gbe_dev)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int gbe_hwtstamp_get(struct gbe_intf *gbe_intf, struct ifreq *req)</div><div class='add'>+static inline int gbe_hwtstamp_get(void *intf_priv,</div><div class='add'>+				   struct kernel_hwtstamp_config *cfg)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int gbe_hwtstamp_set(struct gbe_intf *gbe_intf, struct ifreq *req)</div><div class='add'>+static inline int gbe_hwtstamp_set(void *intf_priv,</div><div class='add'>+				   struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='hunk'>@@ -2816,15 +2829,6 @@ static int gbe_ioctl(void *intf_priv, struct ifreq *req, int cmd)</div><div class='ctx'> 	struct gbe_intf *gbe_intf = intf_priv;</div><div class='ctx'> 	struct phy_device *phy = gbe_intf-&gt;slave-&gt;phy;</div><div class='ctx'> </div><div class='del'>-	if (!phy_has_hwtstamp(phy)) {</div><div class='del'>-		switch (cmd) {</div><div class='del'>-		case SIOCGHWTSTAMP:</div><div class='del'>-			return gbe_hwtstamp_get(gbe_intf, req);</div><div class='del'>-		case SIOCSHWTSTAMP:</div><div class='del'>-			return gbe_hwtstamp_set(gbe_intf, req);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (phy)</div><div class='ctx'> 		return phy_mii_ioctl(phy, req, cmd);</div><div class='ctx'> </div><div class='hunk'>@@ -2833,7 +2837,7 @@ static int gbe_ioctl(void *intf_priv, struct ifreq *req, int cmd)</div><div class='ctx'> </div><div class='ctx'> static void netcp_ethss_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct gbe_priv *gbe_dev = from_timer(gbe_dev, t, timer);</div><div class='add'>+	struct gbe_priv *gbe_dev = timer_container_of(gbe_dev, t, timer);</div><div class='ctx'> 	struct gbe_intf *gbe_intf;</div><div class='ctx'> 	struct gbe_slave *slave;</div><div class='ctx'> </div><div class='hunk'>@@ -3796,7 +3800,7 @@ static int gbe_remove(struct netcp_device *netcp_device, void *inst_priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct gbe_priv *gbe_dev = inst_priv;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;gbe_dev-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;gbe_dev-&gt;timer);</div><div class='ctx'> 	cpts_release(gbe_dev-&gt;cpts);</div><div class='ctx'> 	cpsw_ale_stop(gbe_dev-&gt;ale);</div><div class='ctx'> 	netcp_txpipe_close(&amp;gbe_dev-&gt;tx_pipe);</div><div class='hunk'>@@ -3824,6 +3828,8 @@ static struct netcp_module gbe_module = {</div><div class='ctx'> 	.add_vid	= gbe_add_vid,</div><div class='ctx'> 	.del_vid	= gbe_del_vid,</div><div class='ctx'> 	.ioctl		= gbe_ioctl,</div><div class='add'>+	.hwtstamp_get	= gbe_hwtstamp_get,</div><div class='add'>+	.hwtstamp_set	= gbe_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct netcp_module xgbe_module = {</div><div class='hunk'>@@ -3841,6 +3847,8 @@ static struct netcp_module xgbe_module = {</div><div class='ctx'> 	.add_vid	= gbe_add_vid,</div><div class='ctx'> 	.del_vid	= gbe_del_vid,</div><div class='ctx'> 	.ioctl		= gbe_ioctl,</div><div class='add'>+	.hwtstamp_get	= gbe_hwtstamp_get,</div><div class='add'>+	.hwtstamp_set	= gbe_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init keystone_gbe_init(void)</div><div class='head'>diff --git a/drivers/net/ethernet/ti/tlan.c b/drivers/net/ethernet/ti/tlan.c<br/>index b3da76efa8f5..a55b0f951181 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/tlan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/ti/tlan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/ti/tlan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/ti/tlan.c</a></div><div class='hunk'>@@ -332,13 +332,13 @@ static void tlan_stop(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct tlan_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;priv-&gt;media_timer);</div><div class='add'>+	timer_delete_sync(&amp;priv-&gt;media_timer);</div><div class='ctx'> 	tlan_read_and_clear_stats(dev, TLAN_RECORD);</div><div class='ctx'> 	outl(TLAN_HC_AD_RST, dev-&gt;base_addr + TLAN_HOST_CMD);</div><div class='ctx'> 	/* Reset and power down phy */</div><div class='ctx'> 	tlan_reset_adapter(dev);</div><div class='ctx'> 	if (priv-&gt;timer.function != NULL) {</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;timer);</div><div class='add'>+		timer_delete_sync(&amp;priv-&gt;timer);</div><div class='ctx'> 		priv-&gt;timer.function = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1815,7 +1815,7 @@ ThunderLAN driver timer function</div><div class='ctx'> </div><div class='ctx'> static void tlan_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tlan_priv	*priv = from_timer(priv, t, timer);</div><div class='add'>+	struct tlan_priv	*priv = timer_container_of(priv, t, timer);</div><div class='ctx'> 	struct net_device	*dev = priv-&gt;dev;</div><div class='ctx'> 	u32		elapsed;</div><div class='ctx'> 	unsigned long	flags = 0;</div><div class='hunk'>@@ -2746,7 +2746,7 @@ static void tlan_phy_finish_auto_neg(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void tlan_phy_monitor(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tlan_priv *priv = from_timer(priv, t, media_timer);</div><div class='add'>+	struct tlan_priv *priv = timer_container_of(priv, t, media_timer);</div><div class='ctx'> 	struct net_device *dev = priv-&gt;dev;</div><div class='ctx'> 	u16     phy;</div><div class='ctx'> 	u16     phy_status;</div><div class='head'>diff --git a/drivers/net/ethernet/toshiba/Kconfig b/drivers/net/ethernet/toshiba/Kconfig<br/>index 701e9b7c1c3b..b1e27e3b99eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/toshiba/Kconfig</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> config NET_VENDOR_TOSHIBA</div><div class='ctx'> 	bool "Toshiba devices"</div><div class='ctx'> 	default y</div><div class='del'>-	depends on PCI &amp;&amp; (PPC_IBM_CELL_BLADE || MIPS) || PPC_PS3</div><div class='add'>+	depends on PCI &amp;&amp; MIPS || PPC_PS3</div><div class='ctx'> 	help</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this class, say Y.</div><div class='ctx'> </div><div class='hunk'>@@ -39,15 +39,6 @@ config GELIC_WIRELESS</div><div class='ctx'> 	  the driver automatically distinguishes the models, you can</div><div class='ctx'> 	  safely enable this option even if you have a wireless-less model.</div><div class='ctx'> </div><div class='del'>-config SPIDER_NET</div><div class='del'>-	tristate "Spider Gigabit Ethernet driver"</div><div class='del'>-	depends on PCI &amp;&amp; PPC_IBM_CELL_BLADE</div><div class='del'>-	select FW_LOADER</div><div class='del'>-	select SUNGEM_PHY</div><div class='del'>-	help</div><div class='del'>-	  This driver supports the Gigabit Ethernet chips present on the</div><div class='del'>-	  Cell Processor-Based Blades from IBM.</div><div class='del'>-</div><div class='ctx'> config TC35815</div><div class='ctx'> 	tristate "TOSHIBA TC35815 Ethernet support"</div><div class='ctx'> 	depends on PCI &amp;&amp; MIPS</div><div class='head'>diff --git a/drivers/net/ethernet/toshiba/Makefile b/drivers/net/ethernet/toshiba/Makefile<br/>index f434fd0f429e..27e2164cf7e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/toshiba/Makefile</a></div><div class='hunk'>@@ -6,6 +6,4 @@</div><div class='ctx'> obj-$(CONFIG_GELIC_NET) += ps3_gelic.o</div><div class='ctx'> gelic_wireless-$(CONFIG_GELIC_WIRELESS) += ps3_gelic_wireless.o</div><div class='ctx'> ps3_gelic-objs += ps3_gelic_net.o $(gelic_wireless-y)</div><div class='del'>-spidernet-y += spider_net.o spider_net_ethtool.o</div><div class='del'>-obj-$(CONFIG_SPIDER_NET) += spidernet.o</div><div class='ctx'> obj-$(CONFIG_TC35815) += tc35815.o</div><div class='head'>diff --git a/drivers/net/ethernet/toshiba/ps3_gelic_net.c b/drivers/net/ethernet/toshiba/ps3_gelic_net.c<br/>index 5ee8e8980393..d35d1f3c10a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/ps3_gelic_net.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/ps3_gelic_net.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/ps3_gelic_net.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/toshiba/ps3_gelic_net.c</a></div><div class='hunk'>@@ -260,6 +260,7 @@ void gelic_card_down(struct gelic_card *card)</div><div class='ctx'> 	if (atomic_dec_if_positive(&amp;card-&gt;users) == 0) {</div><div class='ctx'> 		pr_debug("%s: real do\n", __func__);</div><div class='ctx'> 		napi_disable(&amp;card-&gt;napi);</div><div class='add'>+		timer_delete_sync(&amp;card-&gt;rx_oom_timer);</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Disable irq. Wireless interrupts will</div><div class='ctx'> 		 * be disabled later if any</div><div class='hunk'>@@ -363,6 +364,7 @@ static int gelic_card_init_chain(struct gelic_card *card,</div><div class='ctx'>  * gelic_descr_prepare_rx - reinitializes a rx descriptor</div><div class='ctx'>  * @card: card structure</div><div class='ctx'>  * @descr: descriptor to re-init</div><div class='add'>+ * @napi_mode: is it running in napi poll</div><div class='ctx'>  *</div><div class='ctx'>  * return 0 on success, &lt;0 on failure</div><div class='ctx'>  *</div><div class='hunk'>@@ -373,7 +375,8 @@ static int gelic_card_init_chain(struct gelic_card *card,</div><div class='ctx'>  * must be a multiple of GELIC_NET_RXBUF_ALIGN.</div><div class='ctx'>  */</div><div class='ctx'> static int gelic_descr_prepare_rx(struct gelic_card *card,</div><div class='del'>-				  struct gelic_descr *descr)</div><div class='add'>+				  struct gelic_descr *descr,</div><div class='add'>+				  bool napi_mode)</div><div class='ctx'> {</div><div class='ctx'> 	static const unsigned int rx_skb_size =</div><div class='ctx'> 		ALIGN(GELIC_NET_MAX_FRAME, GELIC_NET_RXBUF_ALIGN) +</div><div class='hunk'>@@ -391,7 +394,10 @@ static int gelic_descr_prepare_rx(struct gelic_card *card,</div><div class='ctx'> 	descr-&gt;hw_regs.payload.dev_addr = 0;</div><div class='ctx'> 	descr-&gt;hw_regs.payload.size = 0;</div><div class='ctx'> </div><div class='del'>-	descr-&gt;skb = netdev_alloc_skb(*card-&gt;netdev, rx_skb_size);</div><div class='add'>+	if (napi_mode)</div><div class='add'>+		descr-&gt;skb = napi_alloc_skb(&amp;card-&gt;napi, rx_skb_size);</div><div class='add'>+	else</div><div class='add'>+		descr-&gt;skb = netdev_alloc_skb(*card-&gt;netdev, rx_skb_size);</div><div class='ctx'> 	if (!descr-&gt;skb) {</div><div class='ctx'> 		descr-&gt;hw_regs.payload.dev_addr = 0; /* tell DMAC don't touch memory */</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -463,7 +469,7 @@ static int gelic_card_fill_rx_chain(struct gelic_card *card)</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		if (!descr-&gt;skb) {</div><div class='del'>-			ret = gelic_descr_prepare_rx(card, descr);</div><div class='add'>+			ret = gelic_descr_prepare_rx(card, descr, false);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				goto rewind;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -963,14 +969,15 @@ static void gelic_net_pass_skb_up(struct gelic_descr *descr,</div><div class='ctx'> 	netdev-&gt;stats.rx_bytes += skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	/* pass skb up to stack */</div><div class='del'>-	netif_receive_skb(skb);</div><div class='add'>+	napi_gro_receive(&amp;card-&gt;napi, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * gelic_card_decode_one_descr - processes an rx descriptor</div><div class='ctx'>  * @card: card structure</div><div class='ctx'>  *</div><div class='del'>- * returns 1 if a packet has been sent to the stack, otherwise 0</div><div class='add'>+ * returns 1 if a packet has been sent to the stack, -ENOMEM on skb alloc</div><div class='add'>+ * failure, otherwise 0</div><div class='ctx'>  *</div><div class='ctx'>  * processes an rx descriptor by iommu-unmapping the data buffer and passing</div><div class='ctx'>  * the packet up to the stack</div><div class='hunk'>@@ -981,16 +988,18 @@ static int gelic_card_decode_one_descr(struct gelic_card *card)</div><div class='ctx'> 	struct gelic_descr_chain *chain = &amp;card-&gt;rx_chain;</div><div class='ctx'> 	struct gelic_descr *descr = chain-&gt;head;</div><div class='ctx'> 	struct net_device *netdev = NULL;</div><div class='del'>-	int dmac_chain_ended;</div><div class='add'>+	int dmac_chain_ended = 0;</div><div class='add'>+	int prepare_rx_ret;</div><div class='ctx'> </div><div class='ctx'> 	status = gelic_descr_get_status(descr);</div><div class='ctx'> </div><div class='ctx'> 	if (status == GELIC_DESCR_DMA_CARDOWNED)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (status == GELIC_DESCR_DMA_NOT_IN_USE) {</div><div class='add'>+	if (status == GELIC_DESCR_DMA_NOT_IN_USE || !descr-&gt;skb) {</div><div class='ctx'> 		dev_dbg(ctodev(card), "dormant descr? %p\n", descr);</div><div class='del'>-		return 0;</div><div class='add'>+		dmac_chain_ended = 1;</div><div class='add'>+		goto refill;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* netdevice select */</div><div class='hunk'>@@ -1048,9 +1057,10 @@ static int gelic_card_decode_one_descr(struct gelic_card *card)</div><div class='ctx'> refill:</div><div class='ctx'> </div><div class='ctx'> 	/* is the current descriptor terminated with next_descr == NULL? */</div><div class='del'>-	dmac_chain_ended =</div><div class='del'>-		be32_to_cpu(descr-&gt;hw_regs.dmac_cmd_status) &amp;</div><div class='del'>-		GELIC_DESCR_RX_DMA_CHAIN_END;</div><div class='add'>+	if (!dmac_chain_ended)</div><div class='add'>+		dmac_chain_ended =</div><div class='add'>+			be32_to_cpu(descr-&gt;hw_regs.dmac_cmd_status) &amp;</div><div class='add'>+			GELIC_DESCR_RX_DMA_CHAIN_END;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * So that always DMAC can see the end</div><div class='ctx'> 	 * of the descriptor chain to avoid</div><div class='hunk'>@@ -1062,10 +1072,11 @@ refill:</div><div class='ctx'> 	gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='del'>-	 * this call can fail, but for now, just leave this</div><div class='del'>-	 * descriptor without skb</div><div class='add'>+	 * this call can fail, propagate the error</div><div class='ctx'> 	 */</div><div class='del'>-	gelic_descr_prepare_rx(card, descr);</div><div class='add'>+	prepare_rx_ret = gelic_descr_prepare_rx(card, descr, true);</div><div class='add'>+	if (prepare_rx_ret)</div><div class='add'>+		return prepare_rx_ret;</div><div class='ctx'> </div><div class='ctx'> 	chain-&gt;tail = descr;</div><div class='ctx'> 	chain-&gt;head = descr-&gt;next;</div><div class='hunk'>@@ -1087,6 +1098,13 @@ refill:</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void gelic_rx_oom_timer(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct gelic_card *card = timer_container_of(card, t, rx_oom_timer);</div><div class='add'>+</div><div class='add'>+	napi_schedule(&amp;card-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * gelic_net_poll - NAPI poll function called by the stack to return packets</div><div class='ctx'>  * @napi: napi structure</div><div class='hunk'>@@ -1099,14 +1117,22 @@ static int gelic_net_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct gelic_card *card = container_of(napi, struct gelic_card, napi);</div><div class='ctx'> 	int packets_done = 0;</div><div class='add'>+	int work_result = 0;</div><div class='ctx'> </div><div class='ctx'> 	while (packets_done &lt; budget) {</div><div class='del'>-		if (!gelic_card_decode_one_descr(card))</div><div class='add'>+		work_result = gelic_card_decode_one_descr(card);</div><div class='add'>+		if (work_result != 1)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		packets_done++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (work_result == -ENOMEM) {</div><div class='add'>+		napi_complete_done(napi, packets_done);</div><div class='add'>+		mod_timer(&amp;card-&gt;rx_oom_timer, jiffies + 1);</div><div class='add'>+		return packets_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (packets_done &lt; budget) {</div><div class='ctx'> 		napi_complete_done(napi, packets_done);</div><div class='ctx'> 		gelic_card_rx_irq_on(card);</div><div class='hunk'>@@ -1576,6 +1602,8 @@ static struct gelic_card *gelic_alloc_card_net(struct net_device **netdev)</div><div class='ctx'> 	mutex_init(&amp;card-&gt;updown_lock);</div><div class='ctx'> 	atomic_set(&amp;card-&gt;users, 0);</div><div class='ctx'> </div><div class='add'>+	timer_setup(&amp;card-&gt;rx_oom_timer, gelic_rx_oom_timer, 0);</div><div class='add'>+</div><div class='ctx'> 	return card;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/toshiba/ps3_gelic_net.h b/drivers/net/ethernet/toshiba/ps3_gelic_net.h<br/>index f7d7931e51b7..c10f1984a5a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/ps3_gelic_net.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/ps3_gelic_net.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/ps3_gelic_net.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/toshiba/ps3_gelic_net.h</a></div><div class='hunk'>@@ -268,6 +268,7 @@ struct gelic_vlan_id {</div><div class='ctx'> struct gelic_card {</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	struct net_device *netdev[GELIC_PORT_MAX];</div><div class='add'>+	struct timer_list rx_oom_timer;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * hypervisor requires irq_status should be</div><div class='ctx'> 	 * 8 bytes aligned, but u64 member is</div><div class='head'>diff --git a/drivers/net/ethernet/toshiba/spider_net.c b/drivers/net/ethernet/toshiba/spider_net.c<br/>deleted file mode 100644<br/>index a4937c18d7cb..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/spider_net.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/spider_net.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2556 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Network device driver for Cell Processor-Based Blade and Celleb platform</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Corp. 2005</div><div class='del'>- * (C) Copyright 2006 TOSHIBA CORPORATION</div><div class='del'>- *</div><div class='del'>- * Authors : Utz Bacher &lt;utz.bacher@de.ibm.com&gt;</div><div class='del'>- *           Jens Osterkamp &lt;Jens.Osterkamp@de.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/compiler.h&gt;</div><div class='del'>-#include &lt;linux/crc32.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/ethtool.h&gt;</div><div class='del'>-#include &lt;linux/firmware.h&gt;</div><div class='del'>-#include &lt;linux/if_vlan.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/ip.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/mii.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/tcp.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/vmalloc.h&gt;</div><div class='del'>-#include &lt;linux/wait.h&gt;</div><div class='del'>-#include &lt;linux/workqueue.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;net/checksum.h&gt;</div><div class='del'>-</div><div class='del'>-#include "spider_net.h"</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Utz Bacher &lt;utz.bacher@de.ibm.com&gt; and Jens Osterkamp " \</div><div class='del'>-	      "&lt;Jens.Osterkamp@de.ibm.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Spider Southbridge Gigabit Ethernet driver");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_VERSION(VERSION);</div><div class='del'>-MODULE_FIRMWARE(SPIDER_NET_FIRMWARE_NAME);</div><div class='del'>-</div><div class='del'>-static int rx_descriptors = SPIDER_NET_RX_DESCRIPTORS_DEFAULT;</div><div class='del'>-static int tx_descriptors = SPIDER_NET_TX_DESCRIPTORS_DEFAULT;</div><div class='del'>-</div><div class='del'>-module_param(rx_descriptors, int, 0444);</div><div class='del'>-module_param(tx_descriptors, int, 0444);</div><div class='del'>-</div><div class='del'>-MODULE_PARM_DESC(rx_descriptors, "number of descriptors used " \</div><div class='del'>-		 "in rx chains");</div><div class='del'>-MODULE_PARM_DESC(tx_descriptors, "number of descriptors used " \</div><div class='del'>-		 "in tx chain");</div><div class='del'>-</div><div class='del'>-char spider_net_driver_name[] = "spidernet";</div><div class='del'>-</div><div class='del'>-static const struct pci_device_id spider_net_pci_tbl[] = {</div><div class='del'>-	{ PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_SPIDER_NET,</div><div class='del'>-	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },</div><div class='del'>-	{ 0, }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MODULE_DEVICE_TABLE(pci, spider_net_pci_tbl);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_read_reg - reads an SMMIO register of a card</div><div class='del'>- * @card: device structure</div><div class='del'>- * @reg: register to read from</div><div class='del'>- *</div><div class='del'>- * returns the content of the specified SMMIO register.</div><div class='del'>- */</div><div class='del'>-static inline u32</div><div class='del'>-spider_net_read_reg(struct spider_net_card *card, u32 reg)</div><div class='del'>-{</div><div class='del'>-	/* We use the powerpc specific variants instead of readl_be() because</div><div class='del'>-	 * we know spidernet is not a real PCI device and we can thus avoid the</div><div class='del'>-	 * performance hit caused by the PCI workarounds.</div><div class='del'>-	 */</div><div class='del'>-	return in_be32(card-&gt;regs + reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_write_reg - writes to an SMMIO register of a card</div><div class='del'>- * @card: device structure</div><div class='del'>- * @reg: register to write to</div><div class='del'>- * @value: value to write into the specified SMMIO register</div><div class='del'>- */</div><div class='del'>-static inline void</div><div class='del'>-spider_net_write_reg(struct spider_net_card *card, u32 reg, u32 value)</div><div class='del'>-{</div><div class='del'>-	/* We use the powerpc specific variants instead of writel_be() because</div><div class='del'>-	 * we know spidernet is not a real PCI device and we can thus avoid the</div><div class='del'>-	 * performance hit caused by the PCI workarounds.</div><div class='del'>-	 */</div><div class='del'>-	out_be32(card-&gt;regs + reg, value);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_write_phy - write to phy register</div><div class='del'>- * @netdev: adapter to be written to</div><div class='del'>- * @mii_id: id of MII</div><div class='del'>- * @reg: PHY register</div><div class='del'>- * @val: value to be written to phy register</div><div class='del'>- *</div><div class='del'>- * spider_net_write_phy_register writes to an arbitrary PHY</div><div class='del'>- * register via the spider GPCWOPCMD register. We assume the queue does</div><div class='del'>- * not run full (not more than 15 commands outstanding).</div><div class='del'>- **/</div><div class='del'>-static void</div><div class='del'>-spider_net_write_phy(struct net_device *netdev, int mii_id,</div><div class='del'>-		     int reg, int val)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-	u32 writevalue;</div><div class='del'>-</div><div class='del'>-	writevalue = ((u32)mii_id &lt;&lt; 21) |</div><div class='del'>-		((u32)reg &lt;&lt; 16) | ((u32)val);</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GPCWOPCMD, writevalue);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_read_phy - read from phy register</div><div class='del'>- * @netdev: network device to be read from</div><div class='del'>- * @mii_id: id of MII</div><div class='del'>- * @reg: PHY register</div><div class='del'>- *</div><div class='del'>- * Returns value read from PHY register</div><div class='del'>- *</div><div class='del'>- * spider_net_write_phy reads from an arbitrary PHY</div><div class='del'>- * register via the spider GPCROPCMD register</div><div class='del'>- **/</div><div class='del'>-static int</div><div class='del'>-spider_net_read_phy(struct net_device *netdev, int mii_id, int reg)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-	u32 readvalue;</div><div class='del'>-</div><div class='del'>-	readvalue = ((u32)mii_id &lt;&lt; 21) | ((u32)reg &lt;&lt; 16);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GPCROPCMD, readvalue);</div><div class='del'>-</div><div class='del'>-	/* we don't use semaphores to wait for an SPIDER_NET_GPROPCMPINT</div><div class='del'>-	 * interrupt, as we poll for the completion of the read operation</div><div class='del'>-	 * in spider_net_read_phy. Should take about 50 us</div><div class='del'>-	 */</div><div class='del'>-	do {</div><div class='del'>-		readvalue = spider_net_read_reg(card, SPIDER_NET_GPCROPCMD);</div><div class='del'>-	} while (readvalue &amp; SPIDER_NET_GPREXEC);</div><div class='del'>-</div><div class='del'>-	readvalue &amp;= SPIDER_NET_GPRDAT_MASK;</div><div class='del'>-</div><div class='del'>-	return readvalue;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_setup_aneg - initial auto-negotiation setup</div><div class='del'>- * @card: device structure</div><div class='del'>- **/</div><div class='del'>-static void</div><div class='del'>-spider_net_setup_aneg(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct mii_phy *phy = &amp;card-&gt;phy;</div><div class='del'>-	u32 advertise = 0;</div><div class='del'>-	u16 bmsr, estat;</div><div class='del'>-</div><div class='del'>-	bmsr  = spider_net_read_phy(card-&gt;netdev, phy-&gt;mii_id, MII_BMSR);</div><div class='del'>-	estat = spider_net_read_phy(card-&gt;netdev, phy-&gt;mii_id, MII_ESTATUS);</div><div class='del'>-</div><div class='del'>-	if (bmsr &amp; BMSR_10HALF)</div><div class='del'>-		advertise |= ADVERTISED_10baseT_Half;</div><div class='del'>-	if (bmsr &amp; BMSR_10FULL)</div><div class='del'>-		advertise |= ADVERTISED_10baseT_Full;</div><div class='del'>-	if (bmsr &amp; BMSR_100HALF)</div><div class='del'>-		advertise |= ADVERTISED_100baseT_Half;</div><div class='del'>-	if (bmsr &amp; BMSR_100FULL)</div><div class='del'>-		advertise |= ADVERTISED_100baseT_Full;</div><div class='del'>-</div><div class='del'>-	if ((bmsr &amp; BMSR_ESTATEN) &amp;&amp; (estat &amp; ESTATUS_1000_TFULL))</div><div class='del'>-		advertise |= SUPPORTED_1000baseT_Full;</div><div class='del'>-	if ((bmsr &amp; BMSR_ESTATEN) &amp;&amp; (estat &amp; ESTATUS_1000_THALF))</div><div class='del'>-		advertise |= SUPPORTED_1000baseT_Half;</div><div class='del'>-</div><div class='del'>-	sungem_phy_probe(phy, phy-&gt;mii_id);</div><div class='del'>-	phy-&gt;def-&gt;ops-&gt;setup_aneg(phy, advertise);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_rx_irq_off - switch off rx irq on this spider card</div><div class='del'>- * @card: device structure</div><div class='del'>- *</div><div class='del'>- * switches off rx irq by masking them out in the GHIINTnMSK register</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_rx_irq_off(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	u32 regvalue;</div><div class='del'>-</div><div class='del'>-	regvalue = SPIDER_NET_INT0_MASK_VALUE &amp; (~SPIDER_NET_RXINT);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT0MSK, regvalue);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_rx_irq_on - switch on rx irq on this spider card</div><div class='del'>- * @card: device structure</div><div class='del'>- *</div><div class='del'>- * switches on rx irq by enabling them in the GHIINTnMSK register</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_rx_irq_on(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	u32 regvalue;</div><div class='del'>-</div><div class='del'>-	regvalue = SPIDER_NET_INT0_MASK_VALUE | SPIDER_NET_RXINT;</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT0MSK, regvalue);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_set_promisc - sets the unicast address or the promiscuous mode</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * spider_net_set_promisc sets the unicast destination address filter and</div><div class='del'>- * thus either allows for non-promisc mode or promisc mode</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_set_promisc(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	u32 macu, macl;</div><div class='del'>-	struct net_device *netdev = card-&gt;netdev;</div><div class='del'>-</div><div class='del'>-	if (netdev-&gt;flags &amp; IFF_PROMISC) {</div><div class='del'>-		/* clear destination entry 0 */</div><div class='del'>-		spider_net_write_reg(card, SPIDER_NET_GMRUAFILnR, 0);</div><div class='del'>-		spider_net_write_reg(card, SPIDER_NET_GMRUAFILnR + 0x04, 0);</div><div class='del'>-		spider_net_write_reg(card, SPIDER_NET_GMRUA0FIL15R,</div><div class='del'>-				     SPIDER_NET_PROMISC_VALUE);</div><div class='del'>-	} else {</div><div class='del'>-		macu = netdev-&gt;dev_addr[0];</div><div class='del'>-		macu &lt;&lt;= 8;</div><div class='del'>-		macu |= netdev-&gt;dev_addr[1];</div><div class='del'>-		memcpy(&amp;macl, &amp;netdev-&gt;dev_addr[2], sizeof(macl));</div><div class='del'>-</div><div class='del'>-		macu |= SPIDER_NET_UA_DESCR_VALUE;</div><div class='del'>-		spider_net_write_reg(card, SPIDER_NET_GMRUAFILnR, macu);</div><div class='del'>-		spider_net_write_reg(card, SPIDER_NET_GMRUAFILnR + 0x04, macl);</div><div class='del'>-		spider_net_write_reg(card, SPIDER_NET_GMRUA0FIL15R,</div><div class='del'>-				     SPIDER_NET_NONPROMISC_VALUE);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_get_descr_status -- returns the status of a descriptor</div><div class='del'>- * @hwdescr: descriptor to look at</div><div class='del'>- *</div><div class='del'>- * returns the status as in the dmac_cmd_status field of the descriptor</div><div class='del'>- */</div><div class='del'>-static inline int</div><div class='del'>-spider_net_get_descr_status(struct spider_net_hw_descr *hwdescr)</div><div class='del'>-{</div><div class='del'>-	return hwdescr-&gt;dmac_cmd_status &amp; SPIDER_NET_DESCR_IND_PROC_MASK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_free_chain - free descriptor chain</div><div class='del'>- * @card: card structure</div><div class='del'>- * @chain: address of chain</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_free_chain(struct spider_net_card *card,</div><div class='del'>-		      struct spider_net_descr_chain *chain)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_descr *descr;</div><div class='del'>-</div><div class='del'>-	descr = chain-&gt;ring;</div><div class='del'>-	do {</div><div class='del'>-		descr-&gt;bus_addr = 0;</div><div class='del'>-		descr-&gt;hwdescr-&gt;next_descr_addr = 0;</div><div class='del'>-		descr = descr-&gt;next;</div><div class='del'>-	} while (descr != chain-&gt;ring);</div><div class='del'>-</div><div class='del'>-	dma_free_coherent(&amp;card-&gt;pdev-&gt;dev, chain-&gt;num_desc * sizeof(struct spider_net_hw_descr),</div><div class='del'>-			  chain-&gt;hwring, chain-&gt;dma_addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_init_chain - alloc and link descriptor chain</div><div class='del'>- * @card: card structure</div><div class='del'>- * @chain: address of chain</div><div class='del'>- *</div><div class='del'>- * We manage a circular list that mirrors the hardware structure,</div><div class='del'>- * except that the hardware uses bus addresses.</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, &lt;0 on failure</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-spider_net_init_chain(struct spider_net_card *card,</div><div class='del'>-		       struct spider_net_descr_chain *chain)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct spider_net_descr *descr;</div><div class='del'>-	struct spider_net_hw_descr *hwdescr;</div><div class='del'>-	dma_addr_t buf;</div><div class='del'>-	size_t alloc_size;</div><div class='del'>-</div><div class='del'>-	alloc_size = chain-&gt;num_desc * sizeof(struct spider_net_hw_descr);</div><div class='del'>-</div><div class='del'>-	chain-&gt;hwring = dma_alloc_coherent(&amp;card-&gt;pdev-&gt;dev, alloc_size,</div><div class='del'>-					   &amp;chain-&gt;dma_addr, GFP_KERNEL);</div><div class='del'>-	if (!chain-&gt;hwring)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	/* Set up the hardware pointers in each descriptor */</div><div class='del'>-	descr = chain-&gt;ring;</div><div class='del'>-	hwdescr = chain-&gt;hwring;</div><div class='del'>-	buf = chain-&gt;dma_addr;</div><div class='del'>-	for (i=0; i &lt; chain-&gt;num_desc; i++, descr++, hwdescr++) {</div><div class='del'>-		hwdescr-&gt;dmac_cmd_status = SPIDER_NET_DESCR_NOT_IN_USE;</div><div class='del'>-		hwdescr-&gt;next_descr_addr = 0;</div><div class='del'>-</div><div class='del'>-		descr-&gt;hwdescr = hwdescr;</div><div class='del'>-		descr-&gt;bus_addr = buf;</div><div class='del'>-		descr-&gt;next = descr + 1;</div><div class='del'>-		descr-&gt;prev = descr - 1;</div><div class='del'>-</div><div class='del'>-		buf += sizeof(struct spider_net_hw_descr);</div><div class='del'>-	}</div><div class='del'>-	/* do actual circular list */</div><div class='del'>-	(descr-1)-&gt;next = chain-&gt;ring;</div><div class='del'>-	chain-&gt;ring-&gt;prev = descr-1;</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;chain-&gt;lock);</div><div class='del'>-	chain-&gt;head = chain-&gt;ring;</div><div class='del'>-	chain-&gt;tail = chain-&gt;ring;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_free_rx_chain_contents - frees descr contents in rx chain</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * returns 0 on success, &lt;0 on failure</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_free_rx_chain_contents(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_descr *descr;</div><div class='del'>-</div><div class='del'>-	descr = card-&gt;rx_chain.head;</div><div class='del'>-	do {</div><div class='del'>-		if (descr-&gt;skb) {</div><div class='del'>-			dma_unmap_single(&amp;card-&gt;pdev-&gt;dev,</div><div class='del'>-					 descr-&gt;hwdescr-&gt;buf_addr,</div><div class='del'>-					 SPIDER_NET_MAX_FRAME,</div><div class='del'>-					 DMA_BIDIRECTIONAL);</div><div class='del'>-			dev_kfree_skb(descr-&gt;skb);</div><div class='del'>-			descr-&gt;skb = NULL;</div><div class='del'>-		}</div><div class='del'>-		descr = descr-&gt;next;</div><div class='del'>-	} while (descr != card-&gt;rx_chain.head);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_prepare_rx_descr - Reinitialize RX descriptor</div><div class='del'>- * @card: card structure</div><div class='del'>- * @descr: descriptor to re-init</div><div class='del'>- *</div><div class='del'>- * Return 0 on success, &lt;0 on failure.</div><div class='del'>- *</div><div class='del'>- * Allocates a new rx skb, iommu-maps it and attaches it to the</div><div class='del'>- * descriptor. Mark the descriptor as activated, ready-to-use.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-spider_net_prepare_rx_descr(struct spider_net_card *card,</div><div class='del'>-			    struct spider_net_descr *descr)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_hw_descr *hwdescr = descr-&gt;hwdescr;</div><div class='del'>-	dma_addr_t buf;</div><div class='del'>-	int offset;</div><div class='del'>-	int bufsize;</div><div class='del'>-</div><div class='del'>-	/* we need to round up the buffer size to a multiple of 128 */</div><div class='del'>-	bufsize = (SPIDER_NET_MAX_FRAME + SPIDER_NET_RXBUF_ALIGN - 1) &amp;</div><div class='del'>-		(~(SPIDER_NET_RXBUF_ALIGN - 1));</div><div class='del'>-</div><div class='del'>-	/* and we need to have it 128 byte aligned, therefore we allocate a</div><div class='del'>-	 * bit more</div><div class='del'>-	 */</div><div class='del'>-	/* allocate an skb */</div><div class='del'>-	descr-&gt;skb = netdev_alloc_skb(card-&gt;netdev,</div><div class='del'>-				      bufsize + SPIDER_NET_RXBUF_ALIGN - 1);</div><div class='del'>-	if (!descr-&gt;skb) {</div><div class='del'>-		if (netif_msg_rx_err(card) &amp;&amp; net_ratelimit())</div><div class='del'>-			dev_err(&amp;card-&gt;netdev-&gt;dev,</div><div class='del'>-			        "Not enough memory to allocate rx buffer\n");</div><div class='del'>-		card-&gt;spider_stats.alloc_rx_skb_error++;</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	hwdescr-&gt;buf_size = bufsize;</div><div class='del'>-	hwdescr-&gt;result_size = 0;</div><div class='del'>-	hwdescr-&gt;valid_size = 0;</div><div class='del'>-	hwdescr-&gt;data_status = 0;</div><div class='del'>-	hwdescr-&gt;data_error = 0;</div><div class='del'>-</div><div class='del'>-	offset = ((unsigned long)descr-&gt;skb-&gt;data) &amp;</div><div class='del'>-		(SPIDER_NET_RXBUF_ALIGN - 1);</div><div class='del'>-	if (offset)</div><div class='del'>-		skb_reserve(descr-&gt;skb, SPIDER_NET_RXBUF_ALIGN - offset);</div><div class='del'>-	/* iommu-map the skb */</div><div class='del'>-	buf = dma_map_single(&amp;card-&gt;pdev-&gt;dev, descr-&gt;skb-&gt;data,</div><div class='del'>-			     SPIDER_NET_MAX_FRAME, DMA_FROM_DEVICE);</div><div class='del'>-	if (dma_mapping_error(&amp;card-&gt;pdev-&gt;dev, buf)) {</div><div class='del'>-		dev_kfree_skb_any(descr-&gt;skb);</div><div class='del'>-		descr-&gt;skb = NULL;</div><div class='del'>-		if (netif_msg_rx_err(card) &amp;&amp; net_ratelimit())</div><div class='del'>-			dev_err(&amp;card-&gt;netdev-&gt;dev, "Could not iommu-map rx buffer\n");</div><div class='del'>-		card-&gt;spider_stats.rx_iommu_map_error++;</div><div class='del'>-		hwdescr-&gt;dmac_cmd_status = SPIDER_NET_DESCR_NOT_IN_USE;</div><div class='del'>-	} else {</div><div class='del'>-		hwdescr-&gt;buf_addr = buf;</div><div class='del'>-		wmb();</div><div class='del'>-		hwdescr-&gt;dmac_cmd_status = SPIDER_NET_DESCR_CARDOWNED |</div><div class='del'>-					 SPIDER_NET_DMAC_NOINTR_COMPLETE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_enable_rxchtails - sets RX dmac chain tail addresses</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * spider_net_enable_rxchtails sets the RX DMAC chain tail addresses in the</div><div class='del'>- * chip by writing to the appropriate register. DMA is enabled in</div><div class='del'>- * spider_net_enable_rxdmac.</div><div class='del'>- */</div><div class='del'>-static inline void</div><div class='del'>-spider_net_enable_rxchtails(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	/* assume chain is aligned correctly */</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GDADCHA ,</div><div class='del'>-			     card-&gt;rx_chain.tail-&gt;bus_addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_enable_rxdmac - enables a receive DMA controller</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * spider_net_enable_rxdmac enables the DMA controller by setting RX_DMA_EN</div><div class='del'>- * in the GDADMACCNTR register</div><div class='del'>- */</div><div class='del'>-static inline void</div><div class='del'>-spider_net_enable_rxdmac(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	wmb();</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GDADMACCNTR,</div><div class='del'>-			     SPIDER_NET_DMA_RX_VALUE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_disable_rxdmac - disables the receive DMA controller</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * spider_net_disable_rxdmac terminates processing on the DMA controller</div><div class='del'>- * by turing off the DMA controller, with the force-end flag set.</div><div class='del'>- */</div><div class='del'>-static inline void</div><div class='del'>-spider_net_disable_rxdmac(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GDADMACCNTR,</div><div class='del'>-			     SPIDER_NET_DMA_RX_FEND_VALUE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_refill_rx_chain - refills descriptors/skbs in the rx chains</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * refills descriptors in the rx chain: allocates skbs and iommu-maps them.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_refill_rx_chain(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_descr_chain *chain = &amp;card-&gt;rx_chain;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/* one context doing the refill (and a second context seeing that</div><div class='del'>-	 * and omitting it) is ok. If called by NAPI, we'll be called again</div><div class='del'>-	 * as spider_net_decode_one_descr is called several times. If some</div><div class='del'>-	 * interrupt calls us, the NAPI is about to clean up anyway.</div><div class='del'>-	 */</div><div class='del'>-	if (!spin_trylock_irqsave(&amp;chain-&gt;lock, flags))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	while (spider_net_get_descr_status(chain-&gt;head-&gt;hwdescr) ==</div><div class='del'>-			SPIDER_NET_DESCR_NOT_IN_USE) {</div><div class='del'>-		if (spider_net_prepare_rx_descr(card, chain-&gt;head))</div><div class='del'>-			break;</div><div class='del'>-		chain-&gt;head = chain-&gt;head-&gt;next;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;chain-&gt;lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_alloc_rx_skbs - Allocates rx skbs in rx descriptor chains</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, &lt;0 on failure.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-spider_net_alloc_rx_skbs(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_descr_chain *chain = &amp;card-&gt;rx_chain;</div><div class='del'>-	struct spider_net_descr *start = chain-&gt;tail;</div><div class='del'>-	struct spider_net_descr *descr = start;</div><div class='del'>-</div><div class='del'>-	/* Link up the hardware chain pointers */</div><div class='del'>-	do {</div><div class='del'>-		descr-&gt;prev-&gt;hwdescr-&gt;next_descr_addr = descr-&gt;bus_addr;</div><div class='del'>-		descr = descr-&gt;next;</div><div class='del'>-	} while (descr != start);</div><div class='del'>-</div><div class='del'>-	/* Put at least one buffer into the chain. if this fails,</div><div class='del'>-	 * we've got a problem. If not, spider_net_refill_rx_chain</div><div class='del'>-	 * will do the rest at the end of this function.</div><div class='del'>-	 */</div><div class='del'>-	if (spider_net_prepare_rx_descr(card, chain-&gt;head))</div><div class='del'>-		goto error;</div><div class='del'>-	else</div><div class='del'>-		chain-&gt;head = chain-&gt;head-&gt;next;</div><div class='del'>-</div><div class='del'>-	/* This will allocate the rest of the rx buffers;</div><div class='del'>-	 * if not, it's business as usual later on.</div><div class='del'>-	 */</div><div class='del'>-	spider_net_refill_rx_chain(card);</div><div class='del'>-	spider_net_enable_rxdmac(card);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	spider_net_free_rx_chain_contents(card);</div><div class='del'>-	return -ENOMEM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_get_multicast_hash - generates hash for multicast filter table</div><div class='del'>- * @netdev: interface device structure</div><div class='del'>- * @addr: multicast address</div><div class='del'>- *</div><div class='del'>- * returns the hash value.</div><div class='del'>- *</div><div class='del'>- * spider_net_get_multicast_hash calculates a hash value for a given multicast</div><div class='del'>- * address, that is used to set the multicast filter tables</div><div class='del'>- */</div><div class='del'>-static u8</div><div class='del'>-spider_net_get_multicast_hash(struct net_device *netdev, __u8 *addr)</div><div class='del'>-{</div><div class='del'>-	u32 crc;</div><div class='del'>-	u8 hash;</div><div class='del'>-	char addr_for_crc[ETH_ALEN] = { 0, };</div><div class='del'>-	int i, bit;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ETH_ALEN * 8; i++) {</div><div class='del'>-		bit = (addr[i / 8] &gt;&gt; (i % 8)) &amp; 1;</div><div class='del'>-		addr_for_crc[ETH_ALEN - 1 - i / 8] += bit &lt;&lt; (7 - (i % 8));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	crc = crc32_be(~0, addr_for_crc, netdev-&gt;addr_len);</div><div class='del'>-</div><div class='del'>-	hash = (crc &gt;&gt; 27);</div><div class='del'>-	hash &lt;&lt;= 3;</div><div class='del'>-	hash |= crc &amp; 7;</div><div class='del'>-	hash &amp;= 0xff;</div><div class='del'>-</div><div class='del'>-	return hash;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_set_multi - sets multicast addresses and promisc flags</div><div class='del'>- * @netdev: interface device structure</div><div class='del'>- *</div><div class='del'>- * spider_net_set_multi configures multicast addresses as needed for the</div><div class='del'>- * netdev interface. It also sets up multicast, allmulti and promisc</div><div class='del'>- * flags appropriately</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_set_multi(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct netdev_hw_addr *ha;</div><div class='del'>-	u8 hash;</div><div class='del'>-	int i;</div><div class='del'>-	u32 reg;</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-	DECLARE_BITMAP(bitmask, SPIDER_NET_MULTICAST_HASHES);</div><div class='del'>-</div><div class='del'>-	spider_net_set_promisc(card);</div><div class='del'>-</div><div class='del'>-	if (netdev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='del'>-		bitmap_fill(bitmask, SPIDER_NET_MULTICAST_HASHES);</div><div class='del'>-		goto write_hash;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bitmap_zero(bitmask, SPIDER_NET_MULTICAST_HASHES);</div><div class='del'>-</div><div class='del'>-	/* well, we know, what the broadcast hash value is: it's xfd</div><div class='del'>-	hash = spider_net_get_multicast_hash(netdev, netdev-&gt;broadcast); */</div><div class='del'>-	__set_bit(0xfd, bitmask);</div><div class='del'>-</div><div class='del'>-	netdev_for_each_mc_addr(ha, netdev) {</div><div class='del'>-		hash = spider_net_get_multicast_hash(netdev, ha-&gt;addr);</div><div class='del'>-		__set_bit(hash, bitmask);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-write_hash:</div><div class='del'>-	for (i = 0; i &lt; SPIDER_NET_MULTICAST_HASHES / 4; i++) {</div><div class='del'>-		reg = 0;</div><div class='del'>-		if (test_bit(i * 4, bitmask))</div><div class='del'>-			reg += 0x08;</div><div class='del'>-		reg &lt;&lt;= 8;</div><div class='del'>-		if (test_bit(i * 4 + 1, bitmask))</div><div class='del'>-			reg += 0x08;</div><div class='del'>-		reg &lt;&lt;= 8;</div><div class='del'>-		if (test_bit(i * 4 + 2, bitmask))</div><div class='del'>-			reg += 0x08;</div><div class='del'>-		reg &lt;&lt;= 8;</div><div class='del'>-		if (test_bit(i * 4 + 3, bitmask))</div><div class='del'>-			reg += 0x08;</div><div class='del'>-</div><div class='del'>-		spider_net_write_reg(card, SPIDER_NET_GMRMHFILnR + i * 4, reg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_prepare_tx_descr - fill tx descriptor with skb data</div><div class='del'>- * @card: card structure</div><div class='del'>- * @skb: packet to use</div><div class='del'>- *</div><div class='del'>- * returns 0 on success, &lt;0 on failure.</div><div class='del'>- *</div><div class='del'>- * fills out the descriptor structure with skb data and len. Copies data,</div><div class='del'>- * if needed (32bit DMA!)</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-spider_net_prepare_tx_descr(struct spider_net_card *card,</div><div class='del'>-			    struct sk_buff *skb)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_descr_chain *chain = &amp;card-&gt;tx_chain;</div><div class='del'>-	struct spider_net_descr *descr;</div><div class='del'>-	struct spider_net_hw_descr *hwdescr;</div><div class='del'>-	dma_addr_t buf;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	buf = dma_map_single(&amp;card-&gt;pdev-&gt;dev, skb-&gt;data, skb-&gt;len,</div><div class='del'>-			     DMA_TO_DEVICE);</div><div class='del'>-	if (dma_mapping_error(&amp;card-&gt;pdev-&gt;dev, buf)) {</div><div class='del'>-		if (netif_msg_tx_err(card) &amp;&amp; net_ratelimit())</div><div class='del'>-			dev_err(&amp;card-&gt;netdev-&gt;dev, "could not iommu-map packet (%p, %i). "</div><div class='del'>-				  "Dropping packet\n", skb-&gt;data, skb-&gt;len);</div><div class='del'>-		card-&gt;spider_stats.tx_iommu_map_error++;</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;chain-&gt;lock, flags);</div><div class='del'>-	descr = card-&gt;tx_chain.head;</div><div class='del'>-	if (descr-&gt;next == chain-&gt;tail-&gt;prev) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;chain-&gt;lock, flags);</div><div class='del'>-		dma_unmap_single(&amp;card-&gt;pdev-&gt;dev, buf, skb-&gt;len,</div><div class='del'>-				 DMA_TO_DEVICE);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-	hwdescr = descr-&gt;hwdescr;</div><div class='del'>-	chain-&gt;head = descr-&gt;next;</div><div class='del'>-</div><div class='del'>-	descr-&gt;skb = skb;</div><div class='del'>-	hwdescr-&gt;buf_addr = buf;</div><div class='del'>-	hwdescr-&gt;buf_size = skb-&gt;len;</div><div class='del'>-	hwdescr-&gt;next_descr_addr = 0;</div><div class='del'>-	hwdescr-&gt;data_status = 0;</div><div class='del'>-</div><div class='del'>-	hwdescr-&gt;dmac_cmd_status =</div><div class='del'>-			SPIDER_NET_DESCR_CARDOWNED | SPIDER_NET_DMAC_TXFRMTL;</div><div class='del'>-	spin_unlock_irqrestore(&amp;chain-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	if (skb-&gt;ip_summed == CHECKSUM_PARTIAL)</div><div class='del'>-		switch (ip_hdr(skb)-&gt;protocol) {</div><div class='del'>-		case IPPROTO_TCP:</div><div class='del'>-			hwdescr-&gt;dmac_cmd_status |= SPIDER_NET_DMAC_TCP;</div><div class='del'>-			break;</div><div class='del'>-		case IPPROTO_UDP:</div><div class='del'>-			hwdescr-&gt;dmac_cmd_status |= SPIDER_NET_DMAC_UDP;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	/* Chain the bus address, so that the DMA engine finds this descr. */</div><div class='del'>-	wmb();</div><div class='del'>-	descr-&gt;prev-&gt;hwdescr-&gt;next_descr_addr = descr-&gt;bus_addr;</div><div class='del'>-</div><div class='del'>-	netif_trans_update(card-&gt;netdev); /* set netdev watchdog timer */</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-spider_net_set_low_watermark(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_descr *descr = card-&gt;tx_chain.tail;</div><div class='del'>-	struct spider_net_hw_descr *hwdescr;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int status;</div><div class='del'>-	int cnt=0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Measure the length of the queue. Measurement does not</div><div class='del'>-	 * need to be precise -- does not need a lock.</div><div class='del'>-	 */</div><div class='del'>-	while (descr != card-&gt;tx_chain.head) {</div><div class='del'>-		status = descr-&gt;hwdescr-&gt;dmac_cmd_status &amp; SPIDER_NET_DESCR_NOT_IN_USE;</div><div class='del'>-		if (status == SPIDER_NET_DESCR_NOT_IN_USE)</div><div class='del'>-			break;</div><div class='del'>-		descr = descr-&gt;next;</div><div class='del'>-		cnt++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If TX queue is short, don't even bother with interrupts */</div><div class='del'>-	if (cnt &lt; card-&gt;tx_chain.num_desc/4)</div><div class='del'>-		return cnt;</div><div class='del'>-</div><div class='del'>-	/* Set low-watermark 3/4th's of the way into the queue. */</div><div class='del'>-	descr = card-&gt;tx_chain.tail;</div><div class='del'>-	cnt = (cnt*3)/4;</div><div class='del'>-	for (i=0;i&lt;cnt; i++)</div><div class='del'>-		descr = descr-&gt;next;</div><div class='del'>-</div><div class='del'>-	/* Set the new watermark, clear the old watermark */</div><div class='del'>-	spin_lock_irqsave(&amp;card-&gt;tx_chain.lock, flags);</div><div class='del'>-	descr-&gt;hwdescr-&gt;dmac_cmd_status |= SPIDER_NET_DESCR_TXDESFLG;</div><div class='del'>-	if (card-&gt;low_watermark &amp;&amp; card-&gt;low_watermark != descr) {</div><div class='del'>-		hwdescr = card-&gt;low_watermark-&gt;hwdescr;</div><div class='del'>-		hwdescr-&gt;dmac_cmd_status =</div><div class='del'>-		     hwdescr-&gt;dmac_cmd_status &amp; ~SPIDER_NET_DESCR_TXDESFLG;</div><div class='del'>-	}</div><div class='del'>-	card-&gt;low_watermark = descr;</div><div class='del'>-	spin_unlock_irqrestore(&amp;card-&gt;tx_chain.lock, flags);</div><div class='del'>-	return cnt;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_release_tx_chain - processes sent tx descriptors</div><div class='del'>- * @card: adapter structure</div><div class='del'>- * @brutal: if set, don't care about whether descriptor seems to be in use</div><div class='del'>- *</div><div class='del'>- * returns 0 if the tx ring is empty, otherwise 1.</div><div class='del'>- *</div><div class='del'>- * spider_net_release_tx_chain releases the tx descriptors that spider has</div><div class='del'>- * finished with (if non-brutal) or simply release tx descriptors (if brutal).</div><div class='del'>- * If some other context is calling this function, we return 1 so that we're</div><div class='del'>- * scheduled again (if we were scheduled) and will not lose initiative.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-spider_net_release_tx_chain(struct spider_net_card *card, int brutal)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = card-&gt;netdev;</div><div class='del'>-	struct spider_net_descr_chain *chain = &amp;card-&gt;tx_chain;</div><div class='del'>-	struct spider_net_descr *descr;</div><div class='del'>-	struct spider_net_hw_descr *hwdescr;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	u32 buf_addr;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	while (1) {</div><div class='del'>-		spin_lock_irqsave(&amp;chain-&gt;lock, flags);</div><div class='del'>-		if (chain-&gt;tail == chain-&gt;head) {</div><div class='del'>-			spin_unlock_irqrestore(&amp;chain-&gt;lock, flags);</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		descr = chain-&gt;tail;</div><div class='del'>-		hwdescr = descr-&gt;hwdescr;</div><div class='del'>-</div><div class='del'>-		status = spider_net_get_descr_status(hwdescr);</div><div class='del'>-		switch (status) {</div><div class='del'>-		case SPIDER_NET_DESCR_COMPLETE:</div><div class='del'>-			dev-&gt;stats.tx_packets++;</div><div class='del'>-			dev-&gt;stats.tx_bytes += descr-&gt;skb-&gt;len;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case SPIDER_NET_DESCR_CARDOWNED:</div><div class='del'>-			if (!brutal) {</div><div class='del'>-				spin_unlock_irqrestore(&amp;chain-&gt;lock, flags);</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* fallthrough, if we release the descriptors</div><div class='del'>-			 * brutally (then we don't care about</div><div class='del'>-			 * SPIDER_NET_DESCR_CARDOWNED)</div><div class='del'>-			 */</div><div class='del'>-			fallthrough;</div><div class='del'>-</div><div class='del'>-		case SPIDER_NET_DESCR_RESPONSE_ERROR:</div><div class='del'>-		case SPIDER_NET_DESCR_PROTECTION_ERROR:</div><div class='del'>-		case SPIDER_NET_DESCR_FORCE_END:</div><div class='del'>-			if (netif_msg_tx_err(card))</div><div class='del'>-				dev_err(&amp;card-&gt;netdev-&gt;dev, "forcing end of tx descriptor "</div><div class='del'>-				       "with status x%02x\n", status);</div><div class='del'>-			dev-&gt;stats.tx_errors++;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-			dev-&gt;stats.tx_dropped++;</div><div class='del'>-			if (!brutal) {</div><div class='del'>-				spin_unlock_irqrestore(&amp;chain-&gt;lock, flags);</div><div class='del'>-				return 1;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		chain-&gt;tail = descr-&gt;next;</div><div class='del'>-		hwdescr-&gt;dmac_cmd_status |= SPIDER_NET_DESCR_NOT_IN_USE;</div><div class='del'>-		skb = descr-&gt;skb;</div><div class='del'>-		descr-&gt;skb = NULL;</div><div class='del'>-		buf_addr = hwdescr-&gt;buf_addr;</div><div class='del'>-		spin_unlock_irqrestore(&amp;chain-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-		/* unmap the skb */</div><div class='del'>-		if (skb) {</div><div class='del'>-			dma_unmap_single(&amp;card-&gt;pdev-&gt;dev, buf_addr, skb-&gt;len,</div><div class='del'>-					 DMA_TO_DEVICE);</div><div class='del'>-			dev_consume_skb_any(skb);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_kick_tx_dma - enables TX DMA processing</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * This routine will start the transmit DMA running if</div><div class='del'>- * it is not already running. This routine ned only be</div><div class='del'>- * called when queueing a new packet to an empty tx queue.</div><div class='del'>- * Writes the current tx chain head as start address</div><div class='del'>- * of the tx descriptor chain and enables the transmission</div><div class='del'>- * DMA engine.</div><div class='del'>- */</div><div class='del'>-static inline void</div><div class='del'>-spider_net_kick_tx_dma(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_descr *descr;</div><div class='del'>-</div><div class='del'>-	if (spider_net_read_reg(card, SPIDER_NET_GDTDMACCNTR) &amp;</div><div class='del'>-			SPIDER_NET_TX_DMA_EN)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	descr = card-&gt;tx_chain.tail;</div><div class='del'>-	for (;;) {</div><div class='del'>-		if (spider_net_get_descr_status(descr-&gt;hwdescr) ==</div><div class='del'>-				SPIDER_NET_DESCR_CARDOWNED) {</div><div class='del'>-			spider_net_write_reg(card, SPIDER_NET_GDTDCHA,</div><div class='del'>-					descr-&gt;bus_addr);</div><div class='del'>-			spider_net_write_reg(card, SPIDER_NET_GDTDMACCNTR,</div><div class='del'>-					SPIDER_NET_DMA_TX_VALUE);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (descr == card-&gt;tx_chain.head)</div><div class='del'>-			break;</div><div class='del'>-		descr = descr-&gt;next;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	mod_timer(&amp;card-&gt;tx_timer, jiffies + SPIDER_NET_TX_TIMER);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_xmit - transmits a frame over the device</div><div class='del'>- * @skb: packet to send out</div><div class='del'>- * @netdev: interface device structure</div><div class='del'>- *</div><div class='del'>- * returns NETDEV_TX_OK on success, NETDEV_TX_BUSY on failure</div><div class='del'>- */</div><div class='del'>-static netdev_tx_t</div><div class='del'>-spider_net_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	int cnt;</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	spider_net_release_tx_chain(card, 0);</div><div class='del'>-</div><div class='del'>-	if (spider_net_prepare_tx_descr(card, skb) != 0) {</div><div class='del'>-		netdev-&gt;stats.tx_dropped++;</div><div class='del'>-		netif_stop_queue(netdev);</div><div class='del'>-		return NETDEV_TX_BUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cnt = spider_net_set_low_watermark(card);</div><div class='del'>-	if (cnt &lt; 5)</div><div class='del'>-		spider_net_kick_tx_dma(card);</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_cleanup_tx_ring - cleans up the TX ring</div><div class='del'>- * @t: timer context used to obtain the pointer to net card data structure</div><div class='del'>- *</div><div class='del'>- * spider_net_cleanup_tx_ring is called by either the tx_timer</div><div class='del'>- * or from the NAPI polling routine.</div><div class='del'>- * This routine releases resources associted with transmitted</div><div class='del'>- * packets, including updating the queue tail pointer.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_cleanup_tx_ring(struct timer_list *t)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card = from_timer(card, t, tx_timer);</div><div class='del'>-	if ((spider_net_release_tx_chain(card, 0) != 0) &amp;&amp;</div><div class='del'>-	    (card-&gt;netdev-&gt;flags &amp; IFF_UP)) {</div><div class='del'>-		spider_net_kick_tx_dma(card);</div><div class='del'>-		netif_wake_queue(card-&gt;netdev);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_do_ioctl - called for device ioctls</div><div class='del'>- * @netdev: interface device structure</div><div class='del'>- * @ifr: request parameter structure for ioctl</div><div class='del'>- * @cmd: command code for ioctl</div><div class='del'>- *</div><div class='del'>- * returns 0 on success, &lt;0 on failure. Currently, we have no special ioctls.</div><div class='del'>- * -EOPNOTSUPP is returned, if an unknown ioctl was requested</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-spider_net_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_pass_skb_up - takes an skb from a descriptor and passes it on</div><div class='del'>- * @descr: descriptor to process</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * Fills out skb structure and passes the data to the stack.</div><div class='del'>- * The descriptor state is not changed.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_pass_skb_up(struct spider_net_descr *descr,</div><div class='del'>-		       struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_hw_descr *hwdescr = descr-&gt;hwdescr;</div><div class='del'>-	struct sk_buff *skb = descr-&gt;skb;</div><div class='del'>-	struct net_device *netdev = card-&gt;netdev;</div><div class='del'>-	u32 data_status = hwdescr-&gt;data_status;</div><div class='del'>-	u32 data_error = hwdescr-&gt;data_error;</div><div class='del'>-</div><div class='del'>-	skb_put(skb, hwdescr-&gt;valid_size);</div><div class='del'>-</div><div class='del'>-	/* the card seems to add 2 bytes of junk in front</div><div class='del'>-	 * of the ethernet frame</div><div class='del'>-	 */</div><div class='del'>-#define SPIDER_MISALIGN		2</div><div class='del'>-	skb_pull(skb, SPIDER_MISALIGN);</div><div class='del'>-	skb-&gt;protocol = eth_type_trans(skb, netdev);</div><div class='del'>-</div><div class='del'>-	/* checksum offload */</div><div class='del'>-	skb_checksum_none_assert(skb);</div><div class='del'>-	if (netdev-&gt;features &amp; NETIF_F_RXCSUM) {</div><div class='del'>-		if ( ( (data_status &amp; SPIDER_NET_DATA_STATUS_CKSUM_MASK) ==</div><div class='del'>-		       SPIDER_NET_DATA_STATUS_CKSUM_MASK) &amp;&amp;</div><div class='del'>-		     !(data_error &amp; SPIDER_NET_DATA_ERR_CKSUM_MASK))</div><div class='del'>-			skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data_status &amp; SPIDER_NET_VLAN_PACKET) {</div><div class='del'>-		/* further enhancements: HW-accel VLAN */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* update netdevice statistics */</div><div class='del'>-	netdev-&gt;stats.rx_packets++;</div><div class='del'>-	netdev-&gt;stats.rx_bytes += skb-&gt;len;</div><div class='del'>-</div><div class='del'>-	/* pass skb up to stack */</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void show_rx_chain(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_descr_chain *chain = &amp;card-&gt;rx_chain;</div><div class='del'>-	struct spider_net_descr *start= chain-&gt;tail;</div><div class='del'>-	struct spider_net_descr *descr= start;</div><div class='del'>-	struct spider_net_hw_descr *hwd = start-&gt;hwdescr;</div><div class='del'>-	struct device *dev = &amp;card-&gt;netdev-&gt;dev;</div><div class='del'>-	u32 curr_desc, next_desc;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	int tot = 0;</div><div class='del'>-	int cnt = 0;</div><div class='del'>-	int off = start - chain-&gt;ring;</div><div class='del'>-	int cstat = hwd-&gt;dmac_cmd_status;</div><div class='del'>-</div><div class='del'>-	dev_info(dev, "Total number of descrs=%d\n",</div><div class='del'>-		chain-&gt;num_desc);</div><div class='del'>-	dev_info(dev, "Chain tail located at descr=%d, status=0x%x\n",</div><div class='del'>-		off, cstat);</div><div class='del'>-</div><div class='del'>-	curr_desc = spider_net_read_reg(card, SPIDER_NET_GDACTDPA);</div><div class='del'>-	next_desc = spider_net_read_reg(card, SPIDER_NET_GDACNEXTDA);</div><div class='del'>-</div><div class='del'>-	status = cstat;</div><div class='del'>-	do</div><div class='del'>-	{</div><div class='del'>-		hwd = descr-&gt;hwdescr;</div><div class='del'>-		off = descr - chain-&gt;ring;</div><div class='del'>-		status = hwd-&gt;dmac_cmd_status;</div><div class='del'>-</div><div class='del'>-		if (descr == chain-&gt;head)</div><div class='del'>-			dev_info(dev, "Chain head is at %d, head status=0x%x\n",</div><div class='del'>-			         off, status);</div><div class='del'>-</div><div class='del'>-		if (curr_desc == descr-&gt;bus_addr)</div><div class='del'>-			dev_info(dev, "HW curr desc (GDACTDPA) is at %d, status=0x%x\n",</div><div class='del'>-			         off, status);</div><div class='del'>-</div><div class='del'>-		if (next_desc == descr-&gt;bus_addr)</div><div class='del'>-			dev_info(dev, "HW next desc (GDACNEXTDA) is at %d, status=0x%x\n",</div><div class='del'>-			         off, status);</div><div class='del'>-</div><div class='del'>-		if (hwd-&gt;next_descr_addr == 0)</div><div class='del'>-			dev_info(dev, "chain is cut at %d\n", off);</div><div class='del'>-</div><div class='del'>-		if (cstat != status) {</div><div class='del'>-			int from = (chain-&gt;num_desc + off - cnt) % chain-&gt;num_desc;</div><div class='del'>-			int to = (chain-&gt;num_desc + off - 1) % chain-&gt;num_desc;</div><div class='del'>-			dev_info(dev, "Have %d (from %d to %d) descrs "</div><div class='del'>-			         "with stat=0x%08x\n", cnt, from, to, cstat);</div><div class='del'>-			cstat = status;</div><div class='del'>-			cnt = 0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cnt ++;</div><div class='del'>-		tot ++;</div><div class='del'>-		descr = descr-&gt;next;</div><div class='del'>-	} while (descr != start);</div><div class='del'>-</div><div class='del'>-	dev_info(dev, "Last %d descrs with stat=0x%08x "</div><div class='del'>-	         "for a total of %d descrs\n", cnt, cstat, tot);</div><div class='del'>-</div><div class='del'>-#ifdef DEBUG</div><div class='del'>-	/* Now dump the whole ring */</div><div class='del'>-	descr = start;</div><div class='del'>-	do</div><div class='del'>-	{</div><div class='del'>-		struct spider_net_hw_descr *hwd = descr-&gt;hwdescr;</div><div class='del'>-		status = spider_net_get_descr_status(hwd);</div><div class='del'>-		cnt = descr - chain-&gt;ring;</div><div class='del'>-		dev_info(dev, "Descr %d stat=0x%08x skb=%p\n",</div><div class='del'>-		         cnt, status, descr-&gt;skb);</div><div class='del'>-		dev_info(dev, "bus addr=%08x buf addr=%08x sz=%d\n",</div><div class='del'>-		         descr-&gt;bus_addr, hwd-&gt;buf_addr, hwd-&gt;buf_size);</div><div class='del'>-		dev_info(dev, "next=%08x result sz=%d valid sz=%d\n",</div><div class='del'>-		         hwd-&gt;next_descr_addr, hwd-&gt;result_size,</div><div class='del'>-		         hwd-&gt;valid_size);</div><div class='del'>-		dev_info(dev, "dmac=%08x data stat=%08x data err=%08x\n",</div><div class='del'>-		         hwd-&gt;dmac_cmd_status, hwd-&gt;data_status,</div><div class='del'>-		         hwd-&gt;data_error);</div><div class='del'>-		dev_info(dev, "\n");</div><div class='del'>-</div><div class='del'>-		descr = descr-&gt;next;</div><div class='del'>-	} while (descr != start);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_resync_head_ptr - Advance head ptr past empty descrs</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * If the driver fails to keep up and empty the queue, then the</div><div class='del'>- * hardware wil run out of room to put incoming packets. This</div><div class='del'>- * will cause the hardware to skip descrs that are full (instead</div><div class='del'>- * of halting/retrying). Thus, once the driver runs, it wil need</div><div class='del'>- * to "catch up" to where the hardware chain pointer is at.</div><div class='del'>- */</div><div class='del'>-static void spider_net_resync_head_ptr(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct spider_net_descr_chain *chain = &amp;card-&gt;rx_chain;</div><div class='del'>-	struct spider_net_descr *descr;</div><div class='del'>-	int i, status;</div><div class='del'>-</div><div class='del'>-	/* Advance head pointer past any empty descrs */</div><div class='del'>-	descr = chain-&gt;head;</div><div class='del'>-	status = spider_net_get_descr_status(descr-&gt;hwdescr);</div><div class='del'>-</div><div class='del'>-	if (status == SPIDER_NET_DESCR_NOT_IN_USE)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;chain-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	descr = chain-&gt;head;</div><div class='del'>-	status = spider_net_get_descr_status(descr-&gt;hwdescr);</div><div class='del'>-	for (i=0; i&lt;chain-&gt;num_desc; i++) {</div><div class='del'>-		if (status != SPIDER_NET_DESCR_CARDOWNED) break;</div><div class='del'>-		descr = descr-&gt;next;</div><div class='del'>-		status = spider_net_get_descr_status(descr-&gt;hwdescr);</div><div class='del'>-	}</div><div class='del'>-	chain-&gt;head = descr;</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;chain-&gt;lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int spider_net_resync_tail_ptr(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_descr_chain *chain = &amp;card-&gt;rx_chain;</div><div class='del'>-	struct spider_net_descr *descr;</div><div class='del'>-	int i, status;</div><div class='del'>-</div><div class='del'>-	/* Advance tail pointer past any empty and reaped descrs */</div><div class='del'>-	descr = chain-&gt;tail;</div><div class='del'>-	status = spider_net_get_descr_status(descr-&gt;hwdescr);</div><div class='del'>-</div><div class='del'>-	for (i=0; i&lt;chain-&gt;num_desc; i++) {</div><div class='del'>-		if ((status != SPIDER_NET_DESCR_CARDOWNED) &amp;&amp;</div><div class='del'>-		    (status != SPIDER_NET_DESCR_NOT_IN_USE)) break;</div><div class='del'>-		descr = descr-&gt;next;</div><div class='del'>-		status = spider_net_get_descr_status(descr-&gt;hwdescr);</div><div class='del'>-	}</div><div class='del'>-	chain-&gt;tail = descr;</div><div class='del'>-</div><div class='del'>-	if ((i == chain-&gt;num_desc) || (i == 0))</div><div class='del'>-		return 1;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_decode_one_descr - processes an RX descriptor</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * Returns 1 if a packet has been sent to the stack, otherwise 0.</div><div class='del'>- *</div><div class='del'>- * Processes an RX descriptor by iommu-unmapping the data buffer</div><div class='del'>- * and passing the packet up to the stack. This function is called</div><div class='del'>- * in softirq context, e.g. either bottom half from interrupt or</div><div class='del'>- * NAPI polling context.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-spider_net_decode_one_descr(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = card-&gt;netdev;</div><div class='del'>-	struct spider_net_descr_chain *chain = &amp;card-&gt;rx_chain;</div><div class='del'>-	struct spider_net_descr *descr = chain-&gt;tail;</div><div class='del'>-	struct spider_net_hw_descr *hwdescr = descr-&gt;hwdescr;</div><div class='del'>-	u32 hw_buf_addr;</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	status = spider_net_get_descr_status(hwdescr);</div><div class='del'>-</div><div class='del'>-	/* Nothing in the descriptor, or ring must be empty */</div><div class='del'>-	if ((status == SPIDER_NET_DESCR_CARDOWNED) ||</div><div class='del'>-	    (status == SPIDER_NET_DESCR_NOT_IN_USE))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* descriptor definitively used -- move on tail */</div><div class='del'>-	chain-&gt;tail = descr-&gt;next;</div><div class='del'>-</div><div class='del'>-	/* unmap descriptor */</div><div class='del'>-	hw_buf_addr = hwdescr-&gt;buf_addr;</div><div class='del'>-	hwdescr-&gt;buf_addr = 0xffffffff;</div><div class='del'>-	dma_unmap_single(&amp;card-&gt;pdev-&gt;dev, hw_buf_addr, SPIDER_NET_MAX_FRAME,</div><div class='del'>-			 DMA_FROM_DEVICE);</div><div class='del'>-</div><div class='del'>-	if ( (status == SPIDER_NET_DESCR_RESPONSE_ERROR) ||</div><div class='del'>-	     (status == SPIDER_NET_DESCR_PROTECTION_ERROR) ||</div><div class='del'>-	     (status == SPIDER_NET_DESCR_FORCE_END) ) {</div><div class='del'>-		if (netif_msg_rx_err(card))</div><div class='del'>-			dev_err(&amp;dev-&gt;dev,</div><div class='del'>-			       "dropping RX descriptor with state %d\n", status);</div><div class='del'>-		dev-&gt;stats.rx_dropped++;</div><div class='del'>-		goto bad_desc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ( (status != SPIDER_NET_DESCR_COMPLETE) &amp;&amp;</div><div class='del'>-	     (status != SPIDER_NET_DESCR_FRAME_END) ) {</div><div class='del'>-		if (netif_msg_rx_err(card))</div><div class='del'>-			dev_err(&amp;card-&gt;netdev-&gt;dev,</div><div class='del'>-			       "RX descriptor with unknown state %d\n", status);</div><div class='del'>-		card-&gt;spider_stats.rx_desc_unk_state++;</div><div class='del'>-		goto bad_desc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* The cases we'll throw away the packet immediately */</div><div class='del'>-	if (hwdescr-&gt;data_error &amp; SPIDER_NET_DESTROY_RX_FLAGS) {</div><div class='del'>-		if (netif_msg_rx_err(card))</div><div class='del'>-			dev_err(&amp;card-&gt;netdev-&gt;dev,</div><div class='del'>-			       "error in received descriptor found, "</div><div class='del'>-			       "data_status=x%08x, data_error=x%08x\n",</div><div class='del'>-			       hwdescr-&gt;data_status, hwdescr-&gt;data_error);</div><div class='del'>-		goto bad_desc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (hwdescr-&gt;dmac_cmd_status &amp; SPIDER_NET_DESCR_BAD_STATUS) {</div><div class='del'>-		dev_err(&amp;card-&gt;netdev-&gt;dev, "bad status, cmd_status=x%08x\n",</div><div class='del'>-			       hwdescr-&gt;dmac_cmd_status);</div><div class='del'>-		pr_err("buf_addr=x%08x\n", hw_buf_addr);</div><div class='del'>-		pr_err("buf_size=x%08x\n", hwdescr-&gt;buf_size);</div><div class='del'>-		pr_err("next_descr_addr=x%08x\n", hwdescr-&gt;next_descr_addr);</div><div class='del'>-		pr_err("result_size=x%08x\n", hwdescr-&gt;result_size);</div><div class='del'>-		pr_err("valid_size=x%08x\n", hwdescr-&gt;valid_size);</div><div class='del'>-		pr_err("data_status=x%08x\n", hwdescr-&gt;data_status);</div><div class='del'>-		pr_err("data_error=x%08x\n", hwdescr-&gt;data_error);</div><div class='del'>-		pr_err("which=%ld\n", descr - card-&gt;rx_chain.ring);</div><div class='del'>-</div><div class='del'>-		card-&gt;spider_stats.rx_desc_error++;</div><div class='del'>-		goto bad_desc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Ok, we've got a packet in descr */</div><div class='del'>-	spider_net_pass_skb_up(descr, card);</div><div class='del'>-	descr-&gt;skb = NULL;</div><div class='del'>-	hwdescr-&gt;dmac_cmd_status = SPIDER_NET_DESCR_NOT_IN_USE;</div><div class='del'>-	return 1;</div><div class='del'>-</div><div class='del'>-bad_desc:</div><div class='del'>-	if (netif_msg_rx_err(card))</div><div class='del'>-		show_rx_chain(card);</div><div class='del'>-	dev_kfree_skb_irq(descr-&gt;skb);</div><div class='del'>-	descr-&gt;skb = NULL;</div><div class='del'>-	hwdescr-&gt;dmac_cmd_status = SPIDER_NET_DESCR_NOT_IN_USE;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_poll - NAPI poll function called by the stack to return packets</div><div class='del'>- * @napi: napi device structure</div><div class='del'>- * @budget: number of packets we can pass to the stack at most</div><div class='del'>- *</div><div class='del'>- * returns 0 if no more packets available to the driver/stack. Returns 1,</div><div class='del'>- * if the quota is exceeded, but the driver has still packets.</div><div class='del'>- *</div><div class='del'>- * spider_net_poll returns all packets from the rx descriptors to the stack</div><div class='del'>- * (using netif_receive_skb). If all/enough packets are up, the driver</div><div class='del'>- * reenables interrupts and returns 0. If not, 1 is returned.</div><div class='del'>- */</div><div class='del'>-static int spider_net_poll(struct napi_struct *napi, int budget)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card = container_of(napi, struct spider_net_card, napi);</div><div class='del'>-	int packets_done = 0;</div><div class='del'>-</div><div class='del'>-	while (packets_done &lt; budget) {</div><div class='del'>-		if (!spider_net_decode_one_descr(card))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		packets_done++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((packets_done == 0) &amp;&amp; (card-&gt;num_rx_ints != 0)) {</div><div class='del'>-		if (!spider_net_resync_tail_ptr(card))</div><div class='del'>-			packets_done = budget;</div><div class='del'>-		spider_net_resync_head_ptr(card);</div><div class='del'>-	}</div><div class='del'>-	card-&gt;num_rx_ints = 0;</div><div class='del'>-</div><div class='del'>-	spider_net_refill_rx_chain(card);</div><div class='del'>-	spider_net_enable_rxdmac(card);</div><div class='del'>-</div><div class='del'>-	spider_net_cleanup_tx_ring(&amp;card-&gt;tx_timer);</div><div class='del'>-</div><div class='del'>-	/* if all packets are in the stack, enable interrupts and return 0 */</div><div class='del'>-	/* if not, return 1 */</div><div class='del'>-	if (packets_done &lt; budget) {</div><div class='del'>-		napi_complete_done(napi, packets_done);</div><div class='del'>-		spider_net_rx_irq_on(card);</div><div class='del'>-		card-&gt;ignore_rx_ramfull = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return packets_done;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_set_mac - sets the MAC of an interface</div><div class='del'>- * @netdev: interface device structure</div><div class='del'>- * @p: pointer to new MAC address</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, &lt;0 on failure. Currently, we don't support this</div><div class='del'>- * and will always return EOPNOTSUPP.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-spider_net_set_mac(struct net_device *netdev, void *p)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-	u32 macl, macu, regvalue;</div><div class='del'>-	struct sockaddr *addr = p;</div><div class='del'>-</div><div class='del'>-	if (!is_valid_ether_addr(addr-&gt;sa_data))</div><div class='del'>-		return -EADDRNOTAVAIL;</div><div class='del'>-</div><div class='del'>-	eth_hw_addr_set(netdev, addr-&gt;sa_data);</div><div class='del'>-</div><div class='del'>-	/* switch off GMACTPE and GMACRPE */</div><div class='del'>-	regvalue = spider_net_read_reg(card, SPIDER_NET_GMACOPEMD);</div><div class='del'>-	regvalue &amp;= ~((1 &lt;&lt; 5) | (1 &lt;&lt; 6));</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACOPEMD, regvalue);</div><div class='del'>-</div><div class='del'>-	/* write mac */</div><div class='del'>-	macu = (netdev-&gt;dev_addr[0]&lt;&lt;24) + (netdev-&gt;dev_addr[1]&lt;&lt;16) +</div><div class='del'>-		(netdev-&gt;dev_addr[2]&lt;&lt;8) + (netdev-&gt;dev_addr[3]);</div><div class='del'>-	macl = (netdev-&gt;dev_addr[4]&lt;&lt;8) + (netdev-&gt;dev_addr[5]);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACUNIMACU, macu);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACUNIMACL, macl);</div><div class='del'>-</div><div class='del'>-	/* switch GMACTPE and GMACRPE back on */</div><div class='del'>-	regvalue = spider_net_read_reg(card, SPIDER_NET_GMACOPEMD);</div><div class='del'>-	regvalue |= ((1 &lt;&lt; 5) | (1 &lt;&lt; 6));</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACOPEMD, regvalue);</div><div class='del'>-</div><div class='del'>-	spider_net_set_promisc(card);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_link_reset</div><div class='del'>- * @netdev: net device structure</div><div class='del'>- *</div><div class='del'>- * This is called when the PHY_LINK signal is asserted. For the blade this is</div><div class='del'>- * not connected so we should never get here.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_link_reset(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	del_timer_sync(&amp;card-&gt;aneg_timer);</div><div class='del'>-</div><div class='del'>-	/* clear interrupt, block further interrupts */</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACST,</div><div class='del'>-			     spider_net_read_reg(card, SPIDER_NET_GMACST));</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACINTEN, 0);</div><div class='del'>-</div><div class='del'>-	/* reset phy and setup aneg */</div><div class='del'>-	card-&gt;aneg_count = 0;</div><div class='del'>-	card-&gt;medium = BCM54XX_COPPER;</div><div class='del'>-	spider_net_setup_aneg(card);</div><div class='del'>-	mod_timer(&amp;card-&gt;aneg_timer, jiffies + SPIDER_NET_ANEG_TIMER);</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_handle_error_irq - handles errors raised by an interrupt</div><div class='del'>- * @card: card structure</div><div class='del'>- * @status_reg: interrupt status register 0 (GHIINT0STS)</div><div class='del'>- * @error_reg1: interrupt status register 1 (GHIINT1STS)</div><div class='del'>- * @error_reg2: interrupt status register 2 (GHIINT2STS)</div><div class='del'>- *</div><div class='del'>- * spider_net_handle_error_irq treats or ignores all error conditions</div><div class='del'>- * found when an interrupt is presented</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_handle_error_irq(struct spider_net_card *card, u32 status_reg,</div><div class='del'>-			    u32 error_reg1, u32 error_reg2)</div><div class='del'>-{</div><div class='del'>-	u32 i;</div><div class='del'>-	int show_error = 1;</div><div class='del'>-</div><div class='del'>-	/* check GHIINT0STS ************************************/</div><div class='del'>-	if (status_reg)</div><div class='del'>-		for (i = 0; i &lt; 32; i++)</div><div class='del'>-			if (status_reg &amp; (1&lt;&lt;i))</div><div class='del'>-				switch (i)</div><div class='del'>-	{</div><div class='del'>-	/* let error_reg1 and error_reg2 evaluation decide, what to do</div><div class='del'>-	case SPIDER_NET_PHYINT:</div><div class='del'>-	case SPIDER_NET_GMAC2INT:</div><div class='del'>-	case SPIDER_NET_GMAC1INT:</div><div class='del'>-	case SPIDER_NET_GFIFOINT:</div><div class='del'>-	case SPIDER_NET_DMACINT:</div><div class='del'>-	case SPIDER_NET_GSYSINT:</div><div class='del'>-		break; */</div><div class='del'>-</div><div class='del'>-	case SPIDER_NET_GIPSINT:</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPIDER_NET_GPWOPCMPINT:</div><div class='del'>-		/* PHY write operation completed */</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-	case SPIDER_NET_GPROPCMPINT:</div><div class='del'>-		/* PHY read operation completed */</div><div class='del'>-		/* we don't use semaphores, as we poll for the completion</div><div class='del'>-		 * of the read operation in spider_net_read_phy. Should take</div><div class='del'>-		 * about 50 us</div><div class='del'>-		 */</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-	case SPIDER_NET_GPWFFINT:</div><div class='del'>-		/* PHY command queue full */</div><div class='del'>-		if (netif_msg_intr(card))</div><div class='del'>-			dev_err(&amp;card-&gt;netdev-&gt;dev, "PHY write queue full\n");</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* case SPIDER_NET_GRMDADRINT: not used. print a message */</div><div class='del'>-	/* case SPIDER_NET_GRMARPINT: not used. print a message */</div><div class='del'>-	/* case SPIDER_NET_GRMMPINT: not used. print a message */</div><div class='del'>-</div><div class='del'>-	case SPIDER_NET_GDTDEN0INT:</div><div class='del'>-		/* someone has set TX_DMA_EN to 0 */</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPIDER_NET_GDDDEN0INT:</div><div class='del'>-	case SPIDER_NET_GDCDEN0INT:</div><div class='del'>-	case SPIDER_NET_GDBDEN0INT:</div><div class='del'>-	case SPIDER_NET_GDADEN0INT:</div><div class='del'>-		/* someone has set RX_DMA_EN to 0 */</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* RX interrupts */</div><div class='del'>-	case SPIDER_NET_GDDFDCINT:</div><div class='del'>-	case SPIDER_NET_GDCFDCINT:</div><div class='del'>-	case SPIDER_NET_GDBFDCINT:</div><div class='del'>-	case SPIDER_NET_GDAFDCINT:</div><div class='del'>-	/* case SPIDER_NET_GDNMINT: not used. print a message */</div><div class='del'>-	/* case SPIDER_NET_GCNMINT: not used. print a message */</div><div class='del'>-	/* case SPIDER_NET_GBNMINT: not used. print a message */</div><div class='del'>-	/* case SPIDER_NET_GANMINT: not used. print a message */</div><div class='del'>-	/* case SPIDER_NET_GRFNMINT: not used. print a message */</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* TX interrupts */</div><div class='del'>-	case SPIDER_NET_GDTFDCINT:</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-	case SPIDER_NET_GTTEDINT:</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-	case SPIDER_NET_GDTDCEINT:</div><div class='del'>-		/* chain end. If a descriptor should be sent, kick off</div><div class='del'>-		 * tx dma</div><div class='del'>-		if (card-&gt;tx_chain.tail != card-&gt;tx_chain.head)</div><div class='del'>-			spider_net_kick_tx_dma(card);</div><div class='del'>-		*/</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* case SPIDER_NET_G1TMCNTINT: not used. print a message */</div><div class='del'>-	/* case SPIDER_NET_GFREECNTINT: not used. print a message */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* check GHIINT1STS ************************************/</div><div class='del'>-	if (error_reg1)</div><div class='del'>-		for (i = 0; i &lt; 32; i++)</div><div class='del'>-			if (error_reg1 &amp; (1&lt;&lt;i))</div><div class='del'>-				switch (i)</div><div class='del'>-	{</div><div class='del'>-	case SPIDER_NET_GTMFLLINT:</div><div class='del'>-		/* TX RAM full may happen on a usual case.</div><div class='del'>-		 * Logging is not needed.</div><div class='del'>-		 */</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-	case SPIDER_NET_GRFDFLLINT:</div><div class='del'>-	case SPIDER_NET_GRFCFLLINT:</div><div class='del'>-	case SPIDER_NET_GRFBFLLINT:</div><div class='del'>-	case SPIDER_NET_GRFAFLLINT:</div><div class='del'>-	case SPIDER_NET_GRMFLLINT:</div><div class='del'>-		/* Could happen when rx chain is full */</div><div class='del'>-		if (card-&gt;ignore_rx_ramfull == 0) {</div><div class='del'>-			card-&gt;ignore_rx_ramfull = 1;</div><div class='del'>-			spider_net_resync_head_ptr(card);</div><div class='del'>-			spider_net_refill_rx_chain(card);</div><div class='del'>-			spider_net_enable_rxdmac(card);</div><div class='del'>-			card-&gt;num_rx_ints ++;</div><div class='del'>-			napi_schedule(&amp;card-&gt;napi);</div><div class='del'>-		}</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* case SPIDER_NET_GTMSHTINT: problem, print a message */</div><div class='del'>-	case SPIDER_NET_GDTINVDINT:</div><div class='del'>-		/* allrighty. tx from previous descr ok */</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* chain end */</div><div class='del'>-	case SPIDER_NET_GDDDCEINT:</div><div class='del'>-	case SPIDER_NET_GDCDCEINT:</div><div class='del'>-	case SPIDER_NET_GDBDCEINT:</div><div class='del'>-	case SPIDER_NET_GDADCEINT:</div><div class='del'>-		spider_net_resync_head_ptr(card);</div><div class='del'>-		spider_net_refill_rx_chain(card);</div><div class='del'>-		spider_net_enable_rxdmac(card);</div><div class='del'>-		card-&gt;num_rx_ints ++;</div><div class='del'>-		napi_schedule(&amp;card-&gt;napi);</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* invalid descriptor */</div><div class='del'>-	case SPIDER_NET_GDDINVDINT:</div><div class='del'>-	case SPIDER_NET_GDCINVDINT:</div><div class='del'>-	case SPIDER_NET_GDBINVDINT:</div><div class='del'>-	case SPIDER_NET_GDAINVDINT:</div><div class='del'>-		/* Could happen when rx chain is full */</div><div class='del'>-		spider_net_resync_head_ptr(card);</div><div class='del'>-		spider_net_refill_rx_chain(card);</div><div class='del'>-		spider_net_enable_rxdmac(card);</div><div class='del'>-		card-&gt;num_rx_ints ++;</div><div class='del'>-		napi_schedule(&amp;card-&gt;napi);</div><div class='del'>-		show_error = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* case SPIDER_NET_GDTRSERINT: problem, print a message */</div><div class='del'>-	/* case SPIDER_NET_GDDRSERINT: problem, print a message */</div><div class='del'>-	/* case SPIDER_NET_GDCRSERINT: problem, print a message */</div><div class='del'>-	/* case SPIDER_NET_GDBRSERINT: problem, print a message */</div><div class='del'>-	/* case SPIDER_NET_GDARSERINT: problem, print a message */</div><div class='del'>-	/* case SPIDER_NET_GDSERINT: problem, print a message */</div><div class='del'>-	/* case SPIDER_NET_GDTPTERINT: problem, print a message */</div><div class='del'>-	/* case SPIDER_NET_GDDPTERINT: problem, print a message */</div><div class='del'>-	/* case SPIDER_NET_GDCPTERINT: problem, print a message */</div><div class='del'>-	/* case SPIDER_NET_GDBPTERINT: problem, print a message */</div><div class='del'>-	/* case SPIDER_NET_GDAPTERINT: problem, print a message */</div><div class='del'>-	default:</div><div class='del'>-		show_error = 1;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* check GHIINT2STS ************************************/</div><div class='del'>-	if (error_reg2)</div><div class='del'>-		for (i = 0; i &lt; 32; i++)</div><div class='del'>-			if (error_reg2 &amp; (1&lt;&lt;i))</div><div class='del'>-				switch (i)</div><div class='del'>-	{</div><div class='del'>-	/* there is nothing we can (want  to) do at this time. Log a</div><div class='del'>-	 * message, we can switch on and off the specific values later on</div><div class='del'>-	case SPIDER_NET_GPROPERINT:</div><div class='del'>-	case SPIDER_NET_GMCTCRSNGINT:</div><div class='del'>-	case SPIDER_NET_GMCTLCOLINT:</div><div class='del'>-	case SPIDER_NET_GMCTTMOTINT:</div><div class='del'>-	case SPIDER_NET_GMCRCAERINT:</div><div class='del'>-	case SPIDER_NET_GMCRCALERINT:</div><div class='del'>-	case SPIDER_NET_GMCRALNERINT:</div><div class='del'>-	case SPIDER_NET_GMCROVRINT:</div><div class='del'>-	case SPIDER_NET_GMCRRNTINT:</div><div class='del'>-	case SPIDER_NET_GMCRRXERINT:</div><div class='del'>-	case SPIDER_NET_GTITCSERINT:</div><div class='del'>-	case SPIDER_NET_GTIFMTERINT:</div><div class='del'>-	case SPIDER_NET_GTIPKTRVKINT:</div><div class='del'>-	case SPIDER_NET_GTISPINGINT:</div><div class='del'>-	case SPIDER_NET_GTISADNGINT:</div><div class='del'>-	case SPIDER_NET_GTISPDNGINT:</div><div class='del'>-	case SPIDER_NET_GRIFMTERINT:</div><div class='del'>-	case SPIDER_NET_GRIPKTRVKINT:</div><div class='del'>-	case SPIDER_NET_GRISPINGINT:</div><div class='del'>-	case SPIDER_NET_GRISADNGINT:</div><div class='del'>-	case SPIDER_NET_GRISPDNGINT:</div><div class='del'>-		break;</div><div class='del'>-	*/</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((show_error) &amp;&amp; (netif_msg_intr(card)) &amp;&amp; net_ratelimit())</div><div class='del'>-		dev_err(&amp;card-&gt;netdev-&gt;dev, "Error interrupt, GHIINT0STS = 0x%08x, "</div><div class='del'>-		       "GHIINT1STS = 0x%08x, GHIINT2STS = 0x%08x\n",</div><div class='del'>-		       status_reg, error_reg1, error_reg2);</div><div class='del'>-</div><div class='del'>-	/* clear interrupt sources */</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT1STS, error_reg1);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT2STS, error_reg2);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_interrupt - interrupt handler for spider_net</div><div class='del'>- * @irq: interrupt number</div><div class='del'>- * @ptr: pointer to net_device</div><div class='del'>- *</div><div class='del'>- * returns IRQ_HANDLED, if interrupt was for driver, or IRQ_NONE, if no</div><div class='del'>- * interrupt found raised by card.</div><div class='del'>- *</div><div class='del'>- * This is the interrupt handler, that turns off</div><div class='del'>- * interrupts for this device and makes the stack poll the driver</div><div class='del'>- */</div><div class='del'>-static irqreturn_t</div><div class='del'>-spider_net_interrupt(int irq, void *ptr)</div><div class='del'>-{</div><div class='del'>-	struct net_device *netdev = ptr;</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-	u32 status_reg, error_reg1, error_reg2;</div><div class='del'>-</div><div class='del'>-	status_reg = spider_net_read_reg(card, SPIDER_NET_GHIINT0STS);</div><div class='del'>-	error_reg1 = spider_net_read_reg(card, SPIDER_NET_GHIINT1STS);</div><div class='del'>-	error_reg2 = spider_net_read_reg(card, SPIDER_NET_GHIINT2STS);</div><div class='del'>-</div><div class='del'>-	if (!(status_reg &amp; SPIDER_NET_INT0_MASK_VALUE) &amp;&amp;</div><div class='del'>-	    !(error_reg1 &amp; SPIDER_NET_INT1_MASK_VALUE) &amp;&amp;</div><div class='del'>-	    !(error_reg2 &amp; SPIDER_NET_INT2_MASK_VALUE))</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-</div><div class='del'>-	if (status_reg &amp; SPIDER_NET_RXINT ) {</div><div class='del'>-		spider_net_rx_irq_off(card);</div><div class='del'>-		napi_schedule(&amp;card-&gt;napi);</div><div class='del'>-		card-&gt;num_rx_ints ++;</div><div class='del'>-	}</div><div class='del'>-	if (status_reg &amp; SPIDER_NET_TXINT)</div><div class='del'>-		napi_schedule(&amp;card-&gt;napi);</div><div class='del'>-</div><div class='del'>-	if (status_reg &amp; SPIDER_NET_LINKINT)</div><div class='del'>-		spider_net_link_reset(netdev);</div><div class='del'>-</div><div class='del'>-	if (status_reg &amp; SPIDER_NET_ERRINT )</div><div class='del'>-		spider_net_handle_error_irq(card, status_reg,</div><div class='del'>-					    error_reg1, error_reg2);</div><div class='del'>-</div><div class='del'>-	/* clear interrupt sources */</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT0STS, status_reg);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-/**</div><div class='del'>- * spider_net_poll_controller - artificial interrupt for netconsole etc.</div><div class='del'>- * @netdev: interface device structure</div><div class='del'>- *</div><div class='del'>- * see Documentation/networking/netconsole.rst</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_poll_controller(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	disable_irq(netdev-&gt;irq);</div><div class='del'>-	spider_net_interrupt(netdev-&gt;irq, netdev);</div><div class='del'>-	enable_irq(netdev-&gt;irq);</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_NET_POLL_CONTROLLER */</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_enable_interrupts - enable interrupts</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * spider_net_enable_interrupt enables several interrupts</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_enable_interrupts(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT0MSK,</div><div class='del'>-			     SPIDER_NET_INT0_MASK_VALUE);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT1MSK,</div><div class='del'>-			     SPIDER_NET_INT1_MASK_VALUE);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT2MSK,</div><div class='del'>-			     SPIDER_NET_INT2_MASK_VALUE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_disable_interrupts - disable interrupts</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * spider_net_disable_interrupts disables all the interrupts</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_disable_interrupts(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT0MSK, 0);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT1MSK, 0);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GHIINT2MSK, 0);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACINTEN, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_init_card - initializes the card</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * spider_net_init_card initializes the card so that other registers can</div><div class='del'>- * be used</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_init_card(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_CKRCTRL,</div><div class='del'>-			     SPIDER_NET_CKRCTRL_STOP_VALUE);</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_CKRCTRL,</div><div class='del'>-			     SPIDER_NET_CKRCTRL_RUN_VALUE);</div><div class='del'>-</div><div class='del'>-	/* trigger ETOMOD signal */</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACOPEMD,</div><div class='del'>-		spider_net_read_reg(card, SPIDER_NET_GMACOPEMD) | 0x4);</div><div class='del'>-</div><div class='del'>-	spider_net_disable_interrupts(card);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_enable_card - enables the card by setting all kinds of regs</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * spider_net_enable_card sets a lot of SMMIO registers to enable the device</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_enable_card(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	/* the following array consists of (register),(value) pairs</div><div class='del'>-	 * that are set in this function. A register of 0 ends the list</div><div class='del'>-	 */</div><div class='del'>-	u32 regs[][2] = {</div><div class='del'>-		{ SPIDER_NET_GRESUMINTNUM, 0 },</div><div class='del'>-		{ SPIDER_NET_GREINTNUM, 0 },</div><div class='del'>-</div><div class='del'>-		/* set interrupt frame number registers */</div><div class='del'>-		/* clear the single DMA engine registers first */</div><div class='del'>-		{ SPIDER_NET_GFAFRMNUM, SPIDER_NET_GFXFRAMES_VALUE },</div><div class='del'>-		{ SPIDER_NET_GFBFRMNUM, SPIDER_NET_GFXFRAMES_VALUE },</div><div class='del'>-		{ SPIDER_NET_GFCFRMNUM, SPIDER_NET_GFXFRAMES_VALUE },</div><div class='del'>-		{ SPIDER_NET_GFDFRMNUM, SPIDER_NET_GFXFRAMES_VALUE },</div><div class='del'>-		/* then set, what we really need */</div><div class='del'>-		{ SPIDER_NET_GFFRMNUM, SPIDER_NET_FRAMENUM_VALUE },</div><div class='del'>-</div><div class='del'>-		/* timer counter registers and stuff */</div><div class='del'>-		{ SPIDER_NET_GFREECNNUM, 0 },</div><div class='del'>-		{ SPIDER_NET_GONETIMENUM, 0 },</div><div class='del'>-		{ SPIDER_NET_GTOUTFRMNUM, 0 },</div><div class='del'>-</div><div class='del'>-		/* RX mode setting */</div><div class='del'>-		{ SPIDER_NET_GRXMDSET, SPIDER_NET_RXMODE_VALUE },</div><div class='del'>-		/* TX mode setting */</div><div class='del'>-		{ SPIDER_NET_GTXMDSET, SPIDER_NET_TXMODE_VALUE },</div><div class='del'>-		/* IPSEC mode setting */</div><div class='del'>-		{ SPIDER_NET_GIPSECINIT, SPIDER_NET_IPSECINIT_VALUE },</div><div class='del'>-</div><div class='del'>-		{ SPIDER_NET_GFTRESTRT, SPIDER_NET_RESTART_VALUE },</div><div class='del'>-</div><div class='del'>-		{ SPIDER_NET_GMRWOLCTRL, 0 },</div><div class='del'>-		{ SPIDER_NET_GTESTMD, 0x10000000 },</div><div class='del'>-		{ SPIDER_NET_GTTQMSK, 0x00400040 },</div><div class='del'>-</div><div class='del'>-		{ SPIDER_NET_GMACINTEN, 0 },</div><div class='del'>-</div><div class='del'>-		/* flow control stuff */</div><div class='del'>-		{ SPIDER_NET_GMACAPAUSE, SPIDER_NET_MACAPAUSE_VALUE },</div><div class='del'>-		{ SPIDER_NET_GMACTXPAUSE, SPIDER_NET_TXPAUSE_VALUE },</div><div class='del'>-</div><div class='del'>-		{ SPIDER_NET_GMACBSTLMT, SPIDER_NET_BURSTLMT_VALUE },</div><div class='del'>-		{ 0, 0}</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i = 0;</div><div class='del'>-	while (regs[i][0]) {</div><div class='del'>-		spider_net_write_reg(card, regs[i][0], regs[i][1]);</div><div class='del'>-		i++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* clear unicast filter table entries 1 to 14 */</div><div class='del'>-	for (i = 1; i &lt;= 14; i++) {</div><div class='del'>-		spider_net_write_reg(card,</div><div class='del'>-				     SPIDER_NET_GMRUAFILnR + i * 8,</div><div class='del'>-				     0x00080000);</div><div class='del'>-		spider_net_write_reg(card,</div><div class='del'>-				     SPIDER_NET_GMRUAFILnR + i * 8 + 4,</div><div class='del'>-				     0x00000000);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMRUA0FIL15R, 0x08080000);</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_ECMODE, SPIDER_NET_ECMODE_VALUE);</div><div class='del'>-</div><div class='del'>-	/* set chain tail address for RX chains and</div><div class='del'>-	 * enable DMA</div><div class='del'>-	 */</div><div class='del'>-	spider_net_enable_rxchtails(card);</div><div class='del'>-	spider_net_enable_rxdmac(card);</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GRXDMAEN, SPIDER_NET_WOL_VALUE);</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACLENLMT,</div><div class='del'>-			     SPIDER_NET_LENLMT_VALUE);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACOPEMD,</div><div class='del'>-			     SPIDER_NET_OPMODE_VALUE);</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GDTDMACCNTR,</div><div class='del'>-			     SPIDER_NET_GDTBSTA);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_download_firmware - loads firmware into the adapter</div><div class='del'>- * @card: card structure</div><div class='del'>- * @firmware_ptr: pointer to firmware data</div><div class='del'>- *</div><div class='del'>- * spider_net_download_firmware loads the firmware data into the</div><div class='del'>- * adapter. It assumes the length etc. to be allright.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-spider_net_download_firmware(struct spider_net_card *card,</div><div class='del'>-			     const void *firmware_ptr)</div><div class='del'>-{</div><div class='del'>-	int sequencer, i;</div><div class='del'>-	const u32 *fw_ptr = firmware_ptr;</div><div class='del'>-</div><div class='del'>-	/* stop sequencers */</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GSINIT,</div><div class='del'>-			     SPIDER_NET_STOP_SEQ_VALUE);</div><div class='del'>-</div><div class='del'>-	for (sequencer = 0; sequencer &lt; SPIDER_NET_FIRMWARE_SEQS;</div><div class='del'>-	     sequencer++) {</div><div class='del'>-		spider_net_write_reg(card,</div><div class='del'>-				     SPIDER_NET_GSnPRGADR + sequencer * 8, 0);</div><div class='del'>-		for (i = 0; i &lt; SPIDER_NET_FIRMWARE_SEQWORDS; i++) {</div><div class='del'>-			spider_net_write_reg(card, SPIDER_NET_GSnPRGDAT +</div><div class='del'>-					     sequencer * 8, *fw_ptr);</div><div class='del'>-			fw_ptr++;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (spider_net_read_reg(card, SPIDER_NET_GSINIT))</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GSINIT,</div><div class='del'>-			     SPIDER_NET_RUN_SEQ_VALUE);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_init_firmware - reads in firmware parts</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, &lt;0 on failure</div><div class='del'>- *</div><div class='del'>- * spider_net_init_firmware opens the sequencer firmware and does some basic</div><div class='del'>- * checks. This function opens and releases the firmware structure. A call</div><div class='del'>- * to download the firmware is performed before the release.</div><div class='del'>- *</div><div class='del'>- * Firmware format</div><div class='del'>- * ===============</div><div class='del'>- * spider_fw.bin is expected to be a file containing 6*1024*4 bytes, 4k being</div><div class='del'>- * the program for each sequencer. Use the command</div><div class='del'>- *    tail -q -n +2 Seq_code1_0x088.txt Seq_code2_0x090.txt              \</div><div class='del'>- *         Seq_code3_0x098.txt Seq_code4_0x0A0.txt Seq_code5_0x0A8.txt   \</div><div class='del'>- *         Seq_code6_0x0B0.txt | xxd -r -p -c4 &gt; spider_fw.bin</div><div class='del'>- *</div><div class='del'>- * to generate spider_fw.bin, if you have sequencer programs with something</div><div class='del'>- * like the following contents for each sequencer:</div><div class='del'>- *    &lt;ONE LINE COMMENT&gt;</div><div class='del'>- *    &lt;FIRST 4-BYTES-WORD FOR SEQUENCER&gt;</div><div class='del'>- *    &lt;SECOND 4-BYTES-WORD FOR SEQUENCER&gt;</div><div class='del'>- *     ...</div><div class='del'>- *    &lt;1024th 4-BYTES-WORD FOR SEQUENCER&gt;</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-spider_net_init_firmware(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct firmware *firmware = NULL;</div><div class='del'>-	struct device_node *dn;</div><div class='del'>-	const u8 *fw_prop = NULL;</div><div class='del'>-	int err = -ENOENT;</div><div class='del'>-	int fw_size;</div><div class='del'>-</div><div class='del'>-	if (request_firmware((const struct firmware **)&amp;firmware,</div><div class='del'>-			     SPIDER_NET_FIRMWARE_NAME, &amp;card-&gt;pdev-&gt;dev) == 0) {</div><div class='del'>-		if ( (firmware-&gt;size != SPIDER_NET_FIRMWARE_LEN) &amp;&amp;</div><div class='del'>-		     netif_msg_probe(card) ) {</div><div class='del'>-			dev_err(&amp;card-&gt;netdev-&gt;dev,</div><div class='del'>-			       "Incorrect size of spidernet firmware in " \</div><div class='del'>-			       "filesystem. Looking in host firmware...\n");</div><div class='del'>-			goto try_host_fw;</div><div class='del'>-		}</div><div class='del'>-		err = spider_net_download_firmware(card, firmware-&gt;data);</div><div class='del'>-</div><div class='del'>-		release_firmware(firmware);</div><div class='del'>-		if (err)</div><div class='del'>-			goto try_host_fw;</div><div class='del'>-</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-try_host_fw:</div><div class='del'>-	dn = pci_device_to_OF_node(card-&gt;pdev);</div><div class='del'>-	if (!dn)</div><div class='del'>-		goto out_err;</div><div class='del'>-</div><div class='del'>-	fw_prop = of_get_property(dn, "firmware", &amp;fw_size);</div><div class='del'>-	if (!fw_prop)</div><div class='del'>-		goto out_err;</div><div class='del'>-</div><div class='del'>-	if ( (fw_size != SPIDER_NET_FIRMWARE_LEN) &amp;&amp;</div><div class='del'>-	     netif_msg_probe(card) ) {</div><div class='del'>-		dev_err(&amp;card-&gt;netdev-&gt;dev,</div><div class='del'>-		       "Incorrect size of spidernet firmware in host firmware\n");</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = spider_net_download_firmware(card, fw_prop);</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	return err;</div><div class='del'>-out_err:</div><div class='del'>-	if (netif_msg_probe(card))</div><div class='del'>-		dev_err(&amp;card-&gt;netdev-&gt;dev,</div><div class='del'>-		       "Couldn't find spidernet firmware in filesystem " \</div><div class='del'>-		       "or host firmware\n");</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_open - called upon ifonfig up</div><div class='del'>- * @netdev: interface device structure</div><div class='del'>- *</div><div class='del'>- * returns 0 on success, &lt;0 on failure</div><div class='del'>- *</div><div class='del'>- * spider_net_open allocates all the descriptors and memory needed for</div><div class='del'>- * operation, sets up multicast list and enables interrupts</div><div class='del'>- */</div><div class='del'>-int</div><div class='del'>-spider_net_open(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-	int result;</div><div class='del'>-</div><div class='del'>-	result = spider_net_init_firmware(card);</div><div class='del'>-	if (result)</div><div class='del'>-		goto init_firmware_failed;</div><div class='del'>-</div><div class='del'>-	/* start probing with copper */</div><div class='del'>-	card-&gt;aneg_count = 0;</div><div class='del'>-	card-&gt;medium = BCM54XX_COPPER;</div><div class='del'>-	spider_net_setup_aneg(card);</div><div class='del'>-	if (card-&gt;phy.def-&gt;phy_id)</div><div class='del'>-		mod_timer(&amp;card-&gt;aneg_timer, jiffies + SPIDER_NET_ANEG_TIMER);</div><div class='del'>-</div><div class='del'>-	result = spider_net_init_chain(card, &amp;card-&gt;tx_chain);</div><div class='del'>-	if (result)</div><div class='del'>-		goto alloc_tx_failed;</div><div class='del'>-	card-&gt;low_watermark = NULL;</div><div class='del'>-</div><div class='del'>-	result = spider_net_init_chain(card, &amp;card-&gt;rx_chain);</div><div class='del'>-	if (result)</div><div class='del'>-		goto alloc_rx_failed;</div><div class='del'>-</div><div class='del'>-	/* Allocate rx skbs */</div><div class='del'>-	result = spider_net_alloc_rx_skbs(card);</div><div class='del'>-	if (result)</div><div class='del'>-		goto alloc_skbs_failed;</div><div class='del'>-</div><div class='del'>-	spider_net_set_multi(netdev);</div><div class='del'>-</div><div class='del'>-	/* further enhancement: setup hw vlan, if needed */</div><div class='del'>-</div><div class='del'>-	result = -EBUSY;</div><div class='del'>-	if (request_irq(netdev-&gt;irq, spider_net_interrupt,</div><div class='del'>-			     IRQF_SHARED, netdev-&gt;name, netdev))</div><div class='del'>-		goto register_int_failed;</div><div class='del'>-</div><div class='del'>-	spider_net_enable_card(card);</div><div class='del'>-</div><div class='del'>-	netif_start_queue(netdev);</div><div class='del'>-	netif_carrier_on(netdev);</div><div class='del'>-	napi_enable(&amp;card-&gt;napi);</div><div class='del'>-</div><div class='del'>-	spider_net_enable_interrupts(card);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-register_int_failed:</div><div class='del'>-	spider_net_free_rx_chain_contents(card);</div><div class='del'>-alloc_skbs_failed:</div><div class='del'>-	spider_net_free_chain(card, &amp;card-&gt;rx_chain);</div><div class='del'>-alloc_rx_failed:</div><div class='del'>-	spider_net_free_chain(card, &amp;card-&gt;tx_chain);</div><div class='del'>-alloc_tx_failed:</div><div class='del'>-	del_timer_sync(&amp;card-&gt;aneg_timer);</div><div class='del'>-init_firmware_failed:</div><div class='del'>-	return result;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_link_phy</div><div class='del'>- * @t: timer context used to obtain the pointer to net card data structure</div><div class='del'>- */</div><div class='del'>-static void spider_net_link_phy(struct timer_list *t)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card = from_timer(card, t, aneg_timer);</div><div class='del'>-	struct mii_phy *phy = &amp;card-&gt;phy;</div><div class='del'>-</div><div class='del'>-	/* if link didn't come up after SPIDER_NET_ANEG_TIMEOUT tries, setup phy again */</div><div class='del'>-	if (card-&gt;aneg_count &gt; SPIDER_NET_ANEG_TIMEOUT) {</div><div class='del'>-</div><div class='del'>-		pr_debug("%s: link is down trying to bring it up\n",</div><div class='del'>-			 card-&gt;netdev-&gt;name);</div><div class='del'>-</div><div class='del'>-		switch (card-&gt;medium) {</div><div class='del'>-		case BCM54XX_COPPER:</div><div class='del'>-			/* enable fiber with autonegotiation first */</div><div class='del'>-			if (phy-&gt;def-&gt;ops-&gt;enable_fiber)</div><div class='del'>-				phy-&gt;def-&gt;ops-&gt;enable_fiber(phy, 1);</div><div class='del'>-			card-&gt;medium = BCM54XX_FIBER;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case BCM54XX_FIBER:</div><div class='del'>-			/* fiber didn't come up, try to disable fiber autoneg */</div><div class='del'>-			if (phy-&gt;def-&gt;ops-&gt;enable_fiber)</div><div class='del'>-				phy-&gt;def-&gt;ops-&gt;enable_fiber(phy, 0);</div><div class='del'>-			card-&gt;medium = BCM54XX_UNKNOWN;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case BCM54XX_UNKNOWN:</div><div class='del'>-			/* copper, fiber with and without failed,</div><div class='del'>-			 * retry from beginning</div><div class='del'>-			 */</div><div class='del'>-			spider_net_setup_aneg(card);</div><div class='del'>-			card-&gt;medium = BCM54XX_COPPER;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		card-&gt;aneg_count = 0;</div><div class='del'>-		mod_timer(&amp;card-&gt;aneg_timer, jiffies + SPIDER_NET_ANEG_TIMER);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* link still not up, try again later */</div><div class='del'>-	if (!(phy-&gt;def-&gt;ops-&gt;poll_link(phy))) {</div><div class='del'>-		card-&gt;aneg_count++;</div><div class='del'>-		mod_timer(&amp;card-&gt;aneg_timer, jiffies + SPIDER_NET_ANEG_TIMER);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* link came up, get abilities */</div><div class='del'>-	phy-&gt;def-&gt;ops-&gt;read_link(phy);</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACST,</div><div class='del'>-			     spider_net_read_reg(card, SPIDER_NET_GMACST));</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GMACINTEN, 0x4);</div><div class='del'>-</div><div class='del'>-	if (phy-&gt;speed == 1000)</div><div class='del'>-		spider_net_write_reg(card, SPIDER_NET_GMACMODE, 0x00000001);</div><div class='del'>-	else</div><div class='del'>-		spider_net_write_reg(card, SPIDER_NET_GMACMODE, 0);</div><div class='del'>-</div><div class='del'>-	card-&gt;aneg_count = 0;</div><div class='del'>-</div><div class='del'>-	pr_info("%s: link up, %i Mbps, %s-duplex %sautoneg.\n",</div><div class='del'>-		card-&gt;netdev-&gt;name, phy-&gt;speed,</div><div class='del'>-		phy-&gt;duplex == 1 ? "Full" : "Half",</div><div class='del'>-		phy-&gt;autoneg == 1 ? "" : "no ");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_setup_phy - setup PHY</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * returns 0 on success, &lt;0 on failure</div><div class='del'>- *</div><div class='del'>- * spider_net_setup_phy is used as part of spider_net_probe.</div><div class='del'>- **/</div><div class='del'>-static int</div><div class='del'>-spider_net_setup_phy(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	struct mii_phy *phy = &amp;card-&gt;phy;</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GDTDMASEL,</div><div class='del'>-			     SPIDER_NET_DMASEL_VALUE);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GPCCTRL,</div><div class='del'>-			     SPIDER_NET_PHY_CTRL_VALUE);</div><div class='del'>-</div><div class='del'>-	phy-&gt;dev = card-&gt;netdev;</div><div class='del'>-	phy-&gt;mdio_read = spider_net_read_phy;</div><div class='del'>-	phy-&gt;mdio_write = spider_net_write_phy;</div><div class='del'>-</div><div class='del'>-	for (phy-&gt;mii_id = 1; phy-&gt;mii_id &lt;= 31; phy-&gt;mii_id++) {</div><div class='del'>-		unsigned short id;</div><div class='del'>-		id = spider_net_read_phy(card-&gt;netdev, phy-&gt;mii_id, MII_BMSR);</div><div class='del'>-		if (id != 0x0000 &amp;&amp; id != 0xffff) {</div><div class='del'>-			if (!sungem_phy_probe(phy, phy-&gt;mii_id)) {</div><div class='del'>-				pr_info("Found %s.\n", phy-&gt;def-&gt;name);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_workaround_rxramfull - work around firmware bug</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * no return value</div><div class='del'>- **/</div><div class='del'>-static void</div><div class='del'>-spider_net_workaround_rxramfull(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	int i, sequencer = 0;</div><div class='del'>-</div><div class='del'>-	/* cancel reset */</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_CKRCTRL,</div><div class='del'>-			     SPIDER_NET_CKRCTRL_RUN_VALUE);</div><div class='del'>-</div><div class='del'>-	/* empty sequencer data */</div><div class='del'>-	for (sequencer = 0; sequencer &lt; SPIDER_NET_FIRMWARE_SEQS;</div><div class='del'>-	     sequencer++) {</div><div class='del'>-		spider_net_write_reg(card, SPIDER_NET_GSnPRGADR +</div><div class='del'>-				     sequencer * 8, 0x0);</div><div class='del'>-		for (i = 0; i &lt; SPIDER_NET_FIRMWARE_SEQWORDS; i++) {</div><div class='del'>-			spider_net_write_reg(card, SPIDER_NET_GSnPRGDAT +</div><div class='del'>-					     sequencer * 8, 0x0);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* set sequencer operation */</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GSINIT, 0x000000fe);</div><div class='del'>-</div><div class='del'>-	/* reset */</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_CKRCTRL,</div><div class='del'>-			     SPIDER_NET_CKRCTRL_STOP_VALUE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_stop - called upon ifconfig down</div><div class='del'>- * @netdev: interface device structure</div><div class='del'>- *</div><div class='del'>- * always returns 0</div><div class='del'>- */</div><div class='del'>-int</div><div class='del'>-spider_net_stop(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	napi_disable(&amp;card-&gt;napi);</div><div class='del'>-	netif_carrier_off(netdev);</div><div class='del'>-	netif_stop_queue(netdev);</div><div class='del'>-	del_timer_sync(&amp;card-&gt;tx_timer);</div><div class='del'>-	del_timer_sync(&amp;card-&gt;aneg_timer);</div><div class='del'>-</div><div class='del'>-	spider_net_disable_interrupts(card);</div><div class='del'>-</div><div class='del'>-	free_irq(netdev-&gt;irq, netdev);</div><div class='del'>-</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_GDTDMACCNTR,</div><div class='del'>-			     SPIDER_NET_DMA_TX_FEND_VALUE);</div><div class='del'>-</div><div class='del'>-	/* turn off DMA, force end */</div><div class='del'>-	spider_net_disable_rxdmac(card);</div><div class='del'>-</div><div class='del'>-	/* release chains */</div><div class='del'>-	spider_net_release_tx_chain(card, 1);</div><div class='del'>-	spider_net_free_rx_chain_contents(card);</div><div class='del'>-</div><div class='del'>-	spider_net_free_chain(card, &amp;card-&gt;tx_chain);</div><div class='del'>-	spider_net_free_chain(card, &amp;card-&gt;rx_chain);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_tx_timeout_task - task scheduled by the watchdog timeout</div><div class='del'>- * function (to be called not under interrupt status)</div><div class='del'>- * @work: work context used to obtain the pointer to net card data structure</div><div class='del'>- *</div><div class='del'>- * called as task when tx hangs, resets interface (if interface is up)</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_tx_timeout_task(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card =</div><div class='del'>-		container_of(work, struct spider_net_card, tx_timeout_task);</div><div class='del'>-	struct net_device *netdev = card-&gt;netdev;</div><div class='del'>-</div><div class='del'>-	if (!(netdev-&gt;flags &amp; IFF_UP))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	netif_device_detach(netdev);</div><div class='del'>-	spider_net_stop(netdev);</div><div class='del'>-</div><div class='del'>-	spider_net_workaround_rxramfull(card);</div><div class='del'>-	spider_net_init_card(card);</div><div class='del'>-</div><div class='del'>-	if (spider_net_setup_phy(card))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	spider_net_open(netdev);</div><div class='del'>-	spider_net_kick_tx_dma(card);</div><div class='del'>-	netif_device_attach(netdev);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	atomic_dec(&amp;card-&gt;tx_timeout_task_counter);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_tx_timeout - called when the tx timeout watchdog kicks in.</div><div class='del'>- * @netdev: interface device structure</div><div class='del'>- * @txqueue: unused</div><div class='del'>- *</div><div class='del'>- * called, if tx hangs. Schedules a task that resets the interface</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card;</div><div class='del'>-</div><div class='del'>-	card = netdev_priv(netdev);</div><div class='del'>-	atomic_inc(&amp;card-&gt;tx_timeout_task_counter);</div><div class='del'>-	if (netdev-&gt;flags &amp; IFF_UP)</div><div class='del'>-		schedule_work(&amp;card-&gt;tx_timeout_task);</div><div class='del'>-	else</div><div class='del'>-		atomic_dec(&amp;card-&gt;tx_timeout_task_counter);</div><div class='del'>-	card-&gt;spider_stats.tx_timeouts++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops spider_net_ops = {</div><div class='del'>-	.ndo_open		= spider_net_open,</div><div class='del'>-	.ndo_stop		= spider_net_stop,</div><div class='del'>-	.ndo_start_xmit		= spider_net_xmit,</div><div class='del'>-	.ndo_set_rx_mode	= spider_net_set_multi,</div><div class='del'>-	.ndo_set_mac_address	= spider_net_set_mac,</div><div class='del'>-	.ndo_eth_ioctl		= spider_net_do_ioctl,</div><div class='del'>-	.ndo_tx_timeout		= spider_net_tx_timeout,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	/* HW VLAN */</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-	/* poll controller */</div><div class='del'>-	.ndo_poll_controller	= spider_net_poll_controller,</div><div class='del'>-#endif /* CONFIG_NET_POLL_CONTROLLER */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_setup_netdev_ops - initialization of net_device operations</div><div class='del'>- * @netdev: net_device structure</div><div class='del'>- *</div><div class='del'>- * fills out function pointers in the net_device structure</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_setup_netdev_ops(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	netdev-&gt;netdev_ops = &amp;spider_net_ops;</div><div class='del'>-	netdev-&gt;watchdog_timeo = SPIDER_NET_WATCHDOG_TIMEOUT;</div><div class='del'>-	/* ethtool ops */</div><div class='del'>-	netdev-&gt;ethtool_ops = &amp;spider_net_ethtool_ops;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_setup_netdev - initialization of net_device</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success or &lt;0 on failure</div><div class='del'>- *</div><div class='del'>- * spider_net_setup_netdev initializes the net_device structure</div><div class='del'>- **/</div><div class='del'>-static int</div><div class='del'>-spider_net_setup_netdev(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	int result;</div><div class='del'>-	struct net_device *netdev = card-&gt;netdev;</div><div class='del'>-	struct device_node *dn;</div><div class='del'>-	struct sockaddr addr;</div><div class='del'>-	const u8 *mac;</div><div class='del'>-</div><div class='del'>-	SET_NETDEV_DEV(netdev, &amp;card-&gt;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	pci_set_drvdata(card-&gt;pdev, netdev);</div><div class='del'>-</div><div class='del'>-	timer_setup(&amp;card-&gt;tx_timer, spider_net_cleanup_tx_ring, 0);</div><div class='del'>-	netdev-&gt;irq = card-&gt;pdev-&gt;irq;</div><div class='del'>-</div><div class='del'>-	card-&gt;aneg_count = 0;</div><div class='del'>-	timer_setup(&amp;card-&gt;aneg_timer, spider_net_link_phy, 0);</div><div class='del'>-</div><div class='del'>-	netif_napi_add(netdev, &amp;card-&gt;napi, spider_net_poll);</div><div class='del'>-</div><div class='del'>-	spider_net_setup_netdev_ops(netdev);</div><div class='del'>-</div><div class='del'>-	netdev-&gt;hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM;</div><div class='del'>-	if (SPIDER_NET_RX_CSUM_DEFAULT)</div><div class='del'>-		netdev-&gt;features |= NETIF_F_RXCSUM;</div><div class='del'>-	netdev-&gt;features |= NETIF_F_IP_CSUM;</div><div class='del'>-	/* some time: NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |</div><div class='del'>-	 *		NETIF_F_HW_VLAN_CTAG_FILTER</div><div class='del'>-	 */</div><div class='del'>-	netdev-&gt;lltx = true;</div><div class='del'>-</div><div class='del'>-	/* MTU range: 64 - 2294 */</div><div class='del'>-	netdev-&gt;min_mtu = SPIDER_NET_MIN_MTU;</div><div class='del'>-	netdev-&gt;max_mtu = SPIDER_NET_MAX_MTU;</div><div class='del'>-</div><div class='del'>-	netdev-&gt;irq = card-&gt;pdev-&gt;irq;</div><div class='del'>-	card-&gt;num_rx_ints = 0;</div><div class='del'>-	card-&gt;ignore_rx_ramfull = 0;</div><div class='del'>-</div><div class='del'>-	dn = pci_device_to_OF_node(card-&gt;pdev);</div><div class='del'>-	if (!dn)</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	mac = of_get_property(dn, "local-mac-address", NULL);</div><div class='del'>-	if (!mac)</div><div class='del'>-		return -EIO;</div><div class='del'>-	memcpy(addr.sa_data, mac, ETH_ALEN);</div><div class='del'>-</div><div class='del'>-	result = spider_net_set_mac(netdev, &amp;addr);</div><div class='del'>-	if ((result) &amp;&amp; (netif_msg_probe(card)))</div><div class='del'>-		dev_err(&amp;card-&gt;netdev-&gt;dev,</div><div class='del'>-		        "Failed to set MAC address: %i\n", result);</div><div class='del'>-</div><div class='del'>-	result = register_netdev(netdev);</div><div class='del'>-	if (result) {</div><div class='del'>-		if (netif_msg_probe(card))</div><div class='del'>-			dev_err(&amp;card-&gt;netdev-&gt;dev,</div><div class='del'>-			        "Couldn't register net_device: %i\n", result);</div><div class='del'>-		return result;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (netif_msg_probe(card))</div><div class='del'>-		pr_info("Initialized device %s.\n", netdev-&gt;name);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_alloc_card - allocates net_device and card structure</div><div class='del'>- *</div><div class='del'>- * returns the card structure or NULL in case of errors</div><div class='del'>- *</div><div class='del'>- * the card and net_device structures are linked to each other</div><div class='del'>- */</div><div class='del'>-static struct spider_net_card *</div><div class='del'>-spider_net_alloc_card(void)</div><div class='del'>-{</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	struct spider_net_card *card;</div><div class='del'>-</div><div class='del'>-	netdev = alloc_etherdev(struct_size(card, darray,</div><div class='del'>-					    size_add(tx_descriptors, rx_descriptors)));</div><div class='del'>-	if (!netdev)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	card = netdev_priv(netdev);</div><div class='del'>-	card-&gt;netdev = netdev;</div><div class='del'>-	card-&gt;msg_enable = SPIDER_NET_DEFAULT_MSG;</div><div class='del'>-	INIT_WORK(&amp;card-&gt;tx_timeout_task, spider_net_tx_timeout_task);</div><div class='del'>-	init_waitqueue_head(&amp;card-&gt;waitq);</div><div class='del'>-	atomic_set(&amp;card-&gt;tx_timeout_task_counter, 0);</div><div class='del'>-</div><div class='del'>-	card-&gt;rx_chain.num_desc = rx_descriptors;</div><div class='del'>-	card-&gt;rx_chain.ring = card-&gt;darray;</div><div class='del'>-	card-&gt;tx_chain.num_desc = tx_descriptors;</div><div class='del'>-	card-&gt;tx_chain.ring = card-&gt;darray + rx_descriptors;</div><div class='del'>-</div><div class='del'>-	return card;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_undo_pci_setup - releases PCI ressources</div><div class='del'>- * @card: card structure</div><div class='del'>- *</div><div class='del'>- * spider_net_undo_pci_setup releases the mapped regions</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-spider_net_undo_pci_setup(struct spider_net_card *card)</div><div class='del'>-{</div><div class='del'>-	iounmap(card-&gt;regs);</div><div class='del'>-	pci_release_regions(card-&gt;pdev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_setup_pci_dev - sets up the device in terms of PCI operations</div><div class='del'>- * @pdev: PCI device</div><div class='del'>- *</div><div class='del'>- * Returns the card structure or NULL if any errors occur</div><div class='del'>- *</div><div class='del'>- * spider_net_setup_pci_dev initializes pdev and together with the</div><div class='del'>- * functions called in spider_net_open configures the device so that</div><div class='del'>- * data can be transferred over it</div><div class='del'>- * The net_device structure is attached to the card structure, if the</div><div class='del'>- * function returns without error.</div><div class='del'>- **/</div><div class='del'>-static struct spider_net_card *</div><div class='del'>-spider_net_setup_pci_dev(struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card;</div><div class='del'>-	unsigned long mmio_start, mmio_len;</div><div class='del'>-</div><div class='del'>-	if (pci_enable_device(pdev)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Couldn't enable PCI device\n");</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(pci_resource_flags(pdev, 0) &amp; IORESOURCE_MEM)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-		        "Couldn't find proper PCI device base address.\n");</div><div class='del'>-		goto out_disable_dev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (pci_request_regions(pdev, spider_net_driver_name)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-		        "Couldn't obtain PCI resources, aborting.\n");</div><div class='del'>-		goto out_disable_dev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pci_set_master(pdev);</div><div class='del'>-</div><div class='del'>-	card = spider_net_alloc_card();</div><div class='del'>-	if (!card) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-		        "Couldn't allocate net_device structure, aborting.\n");</div><div class='del'>-		goto out_release_regions;</div><div class='del'>-	}</div><div class='del'>-	card-&gt;pdev = pdev;</div><div class='del'>-</div><div class='del'>-	/* fetch base address and length of first resource */</div><div class='del'>-	mmio_start = pci_resource_start(pdev, 0);</div><div class='del'>-	mmio_len = pci_resource_len(pdev, 0);</div><div class='del'>-</div><div class='del'>-	card-&gt;netdev-&gt;mem_start = mmio_start;</div><div class='del'>-	card-&gt;netdev-&gt;mem_end = mmio_start + mmio_len;</div><div class='del'>-	card-&gt;regs = ioremap(mmio_start, mmio_len);</div><div class='del'>-</div><div class='del'>-	if (!card-&gt;regs) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-		        "Couldn't obtain PCI resources, aborting.\n");</div><div class='del'>-		goto out_release_regions;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return card;</div><div class='del'>-</div><div class='del'>-out_release_regions:</div><div class='del'>-	pci_release_regions(pdev);</div><div class='del'>-out_disable_dev:</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_probe - initialization of a device</div><div class='del'>- * @pdev: PCI device</div><div class='del'>- * @ent: entry in the device id list</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, &lt;0 on failure</div><div class='del'>- *</div><div class='del'>- * spider_net_probe initializes pdev and registers a net_device</div><div class='del'>- * structure for it. After that, the device can be ifconfig'ed up</div><div class='del'>- **/</div><div class='del'>-static int</div><div class='del'>-spider_net_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='del'>-{</div><div class='del'>-	int err = -EIO;</div><div class='del'>-	struct spider_net_card *card;</div><div class='del'>-</div><div class='del'>-	card = spider_net_setup_pci_dev(pdev);</div><div class='del'>-	if (!card)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	spider_net_workaround_rxramfull(card);</div><div class='del'>-	spider_net_init_card(card);</div><div class='del'>-</div><div class='del'>-	err = spider_net_setup_phy(card);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_undo_pci;</div><div class='del'>-</div><div class='del'>-	err = spider_net_setup_netdev(card);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_undo_pci;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_undo_pci:</div><div class='del'>-	spider_net_undo_pci_setup(card);</div><div class='del'>-	free_netdev(card-&gt;netdev);</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_remove - removal of a device</div><div class='del'>- * @pdev: PCI device</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success, &lt;0 on failure</div><div class='del'>- *</div><div class='del'>- * spider_net_remove is called to remove the device and unregisters the</div><div class='del'>- * net_device</div><div class='del'>- **/</div><div class='del'>-static void</div><div class='del'>-spider_net_remove(struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	struct spider_net_card *card;</div><div class='del'>-</div><div class='del'>-	netdev = pci_get_drvdata(pdev);</div><div class='del'>-	card = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	wait_event(card-&gt;waitq,</div><div class='del'>-		   atomic_read(&amp;card-&gt;tx_timeout_task_counter) == 0);</div><div class='del'>-</div><div class='del'>-	unregister_netdev(netdev);</div><div class='del'>-</div><div class='del'>-	/* switch off card */</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_CKRCTRL,</div><div class='del'>-			     SPIDER_NET_CKRCTRL_STOP_VALUE);</div><div class='del'>-	spider_net_write_reg(card, SPIDER_NET_CKRCTRL,</div><div class='del'>-			     SPIDER_NET_CKRCTRL_RUN_VALUE);</div><div class='del'>-</div><div class='del'>-	spider_net_undo_pci_setup(card);</div><div class='del'>-	free_netdev(netdev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_driver spider_net_driver = {</div><div class='del'>-	.name		= spider_net_driver_name,</div><div class='del'>-	.id_table	= spider_net_pci_tbl,</div><div class='del'>-	.probe		= spider_net_probe,</div><div class='del'>-	.remove		= spider_net_remove</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_init - init function when the driver is loaded</div><div class='del'>- *</div><div class='del'>- * spider_net_init registers the device driver</div><div class='del'>- */</div><div class='del'>-static int __init spider_net_init(void)</div><div class='del'>-{</div><div class='del'>-	printk(KERN_INFO "Spidernet version %s.\n", VERSION);</div><div class='del'>-</div><div class='del'>-	if (rx_descriptors &lt; SPIDER_NET_RX_DESCRIPTORS_MIN) {</div><div class='del'>-		rx_descriptors = SPIDER_NET_RX_DESCRIPTORS_MIN;</div><div class='del'>-		pr_info("adjusting rx descriptors to %i.\n", rx_descriptors);</div><div class='del'>-	}</div><div class='del'>-	if (rx_descriptors &gt; SPIDER_NET_RX_DESCRIPTORS_MAX) {</div><div class='del'>-		rx_descriptors = SPIDER_NET_RX_DESCRIPTORS_MAX;</div><div class='del'>-		pr_info("adjusting rx descriptors to %i.\n", rx_descriptors);</div><div class='del'>-	}</div><div class='del'>-	if (tx_descriptors &lt; SPIDER_NET_TX_DESCRIPTORS_MIN) {</div><div class='del'>-		tx_descriptors = SPIDER_NET_TX_DESCRIPTORS_MIN;</div><div class='del'>-		pr_info("adjusting tx descriptors to %i.\n", tx_descriptors);</div><div class='del'>-	}</div><div class='del'>-	if (tx_descriptors &gt; SPIDER_NET_TX_DESCRIPTORS_MAX) {</div><div class='del'>-		tx_descriptors = SPIDER_NET_TX_DESCRIPTORS_MAX;</div><div class='del'>-		pr_info("adjusting tx descriptors to %i.\n", tx_descriptors);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return pci_register_driver(&amp;spider_net_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * spider_net_cleanup - exit function when driver is unloaded</div><div class='del'>- *</div><div class='del'>- * spider_net_cleanup unregisters the device driver</div><div class='del'>- */</div><div class='del'>-static void __exit spider_net_cleanup(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver(&amp;spider_net_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(spider_net_init);</div><div class='del'>-module_exit(spider_net_cleanup);</div><div class='head'>diff --git a/drivers/net/ethernet/toshiba/spider_net.h b/drivers/net/ethernet/toshiba/spider_net.h<br/>deleted file mode 100644<br/>index 51948e2b3a34..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/spider_net.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/spider_net.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,475 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='del'>-/*</div><div class='del'>- * Network device driver for Cell Processor-Based Blade and Celleb platform</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Corp. 2005</div><div class='del'>- * (C) Copyright 2006 TOSHIBA CORPORATION</div><div class='del'>- *</div><div class='del'>- * Authors : Utz Bacher &lt;utz.bacher@de.ibm.com&gt;</div><div class='del'>- *           Jens Osterkamp &lt;Jens.Osterkamp@de.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _SPIDER_NET_H</div><div class='del'>-#define _SPIDER_NET_H</div><div class='del'>-</div><div class='del'>-#define VERSION "2.0 B"</div><div class='del'>-</div><div class='del'>-#include &lt;linux/sungem_phy.h&gt;</div><div class='del'>-</div><div class='del'>-int spider_net_stop(struct net_device *netdev);</div><div class='del'>-int spider_net_open(struct net_device *netdev);</div><div class='del'>-</div><div class='del'>-extern const struct ethtool_ops spider_net_ethtool_ops;</div><div class='del'>-</div><div class='del'>-extern char spider_net_driver_name[];</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_MAX_FRAME			2312</div><div class='del'>-#define SPIDER_NET_MAX_MTU			2294</div><div class='del'>-#define SPIDER_NET_MIN_MTU			64</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_RXBUF_ALIGN			128</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_RX_DESCRIPTORS_DEFAULT	256</div><div class='del'>-#define SPIDER_NET_RX_DESCRIPTORS_MIN		16</div><div class='del'>-#define SPIDER_NET_RX_DESCRIPTORS_MAX		512</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_TX_DESCRIPTORS_DEFAULT	256</div><div class='del'>-#define SPIDER_NET_TX_DESCRIPTORS_MIN		16</div><div class='del'>-#define SPIDER_NET_TX_DESCRIPTORS_MAX		512</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_TX_TIMER			(HZ/5)</div><div class='del'>-#define SPIDER_NET_ANEG_TIMER			(HZ)</div><div class='del'>-#define SPIDER_NET_ANEG_TIMEOUT			5</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_RX_CSUM_DEFAULT		1</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_WATCHDOG_TIMEOUT		50*HZ</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_FIRMWARE_SEQS	6</div><div class='del'>-#define SPIDER_NET_FIRMWARE_SEQWORDS	1024</div><div class='del'>-#define SPIDER_NET_FIRMWARE_LEN		(SPIDER_NET_FIRMWARE_SEQS * \</div><div class='del'>-					 SPIDER_NET_FIRMWARE_SEQWORDS * \</div><div class='del'>-					 sizeof(u32))</div><div class='del'>-#define SPIDER_NET_FIRMWARE_NAME	"spider_fw.bin"</div><div class='del'>-</div><div class='del'>-/** spider_net SMMIO registers */</div><div class='del'>-#define SPIDER_NET_GHIINT0STS		0x00000000</div><div class='del'>-#define SPIDER_NET_GHIINT1STS		0x00000004</div><div class='del'>-#define SPIDER_NET_GHIINT2STS		0x00000008</div><div class='del'>-#define SPIDER_NET_GHIINT0MSK		0x00000010</div><div class='del'>-#define SPIDER_NET_GHIINT1MSK		0x00000014</div><div class='del'>-#define SPIDER_NET_GHIINT2MSK		0x00000018</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GRESUMINTNUM		0x00000020</div><div class='del'>-#define SPIDER_NET_GREINTNUM		0x00000024</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GFFRMNUM		0x00000028</div><div class='del'>-#define SPIDER_NET_GFAFRMNUM		0x0000002c</div><div class='del'>-#define SPIDER_NET_GFBFRMNUM		0x00000030</div><div class='del'>-#define SPIDER_NET_GFCFRMNUM		0x00000034</div><div class='del'>-#define SPIDER_NET_GFDFRMNUM		0x00000038</div><div class='del'>-</div><div class='del'>-/* clear them (don't use it) */</div><div class='del'>-#define SPIDER_NET_GFREECNNUM		0x0000003c</div><div class='del'>-#define SPIDER_NET_GONETIMENUM		0x00000040</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GTOUTFRMNUM		0x00000044</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GTXMDSET		0x00000050</div><div class='del'>-#define SPIDER_NET_GPCCTRL		0x00000054</div><div class='del'>-#define SPIDER_NET_GRXMDSET		0x00000058</div><div class='del'>-#define SPIDER_NET_GIPSECINIT		0x0000005c</div><div class='del'>-#define SPIDER_NET_GFTRESTRT		0x00000060</div><div class='del'>-#define SPIDER_NET_GRXDMAEN		0x00000064</div><div class='del'>-#define SPIDER_NET_GMRWOLCTRL		0x00000068</div><div class='del'>-#define SPIDER_NET_GPCWOPCMD		0x0000006c</div><div class='del'>-#define SPIDER_NET_GPCROPCMD		0x00000070</div><div class='del'>-#define SPIDER_NET_GTTFRMCNT		0x00000078</div><div class='del'>-#define SPIDER_NET_GTESTMD		0x0000007c</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GSINIT		0x00000080</div><div class='del'>-#define SPIDER_NET_GSnPRGADR		0x00000084</div><div class='del'>-#define SPIDER_NET_GSnPRGDAT		0x00000088</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GMACOPEMD		0x00000100</div><div class='del'>-#define SPIDER_NET_GMACLENLMT		0x00000108</div><div class='del'>-#define SPIDER_NET_GMACST		0x00000110</div><div class='del'>-#define SPIDER_NET_GMACINTEN		0x00000118</div><div class='del'>-#define SPIDER_NET_GMACPHYCTRL		0x00000120</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GMACAPAUSE		0x00000154</div><div class='del'>-#define SPIDER_NET_GMACTXPAUSE		0x00000164</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GMACMODE		0x000001b0</div><div class='del'>-#define SPIDER_NET_GMACBSTLMT		0x000001b4</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GMACUNIMACU		0x000001c0</div><div class='del'>-#define SPIDER_NET_GMACUNIMACL		0x000001c8</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GMRMHFILnR		0x00000400</div><div class='del'>-#define SPIDER_NET_MULTICAST_HASHES	256</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GMRUAFILnR		0x00000500</div><div class='del'>-#define SPIDER_NET_GMRUA0FIL15R		0x00000578</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GTTQMSK		0x00000934</div><div class='del'>-</div><div class='del'>-/* RX DMA controller registers, all 0x00000a.. are for DMA controller A,</div><div class='del'>- * 0x00000b.. for DMA controller B, etc. */</div><div class='del'>-#define SPIDER_NET_GDADCHA		0x00000a00</div><div class='del'>-#define SPIDER_NET_GDADMACCNTR		0x00000a04</div><div class='del'>-#define SPIDER_NET_GDACTDPA		0x00000a08</div><div class='del'>-#define SPIDER_NET_GDACTDCNT		0x00000a0c</div><div class='del'>-#define SPIDER_NET_GDACDBADDR		0x00000a20</div><div class='del'>-#define SPIDER_NET_GDACDBSIZE		0x00000a24</div><div class='del'>-#define SPIDER_NET_GDACNEXTDA		0x00000a28</div><div class='del'>-#define SPIDER_NET_GDACCOMST		0x00000a2c</div><div class='del'>-#define SPIDER_NET_GDAWBCOMST		0x00000a30</div><div class='del'>-#define SPIDER_NET_GDAWBRSIZE		0x00000a34</div><div class='del'>-#define SPIDER_NET_GDAWBVSIZE		0x00000a38</div><div class='del'>-#define SPIDER_NET_GDAWBTRST		0x00000a3c</div><div class='del'>-#define SPIDER_NET_GDAWBTRERR		0x00000a40</div><div class='del'>-</div><div class='del'>-/* TX DMA controller registers */</div><div class='del'>-#define SPIDER_NET_GDTDCHA		0x00000e00</div><div class='del'>-#define SPIDER_NET_GDTDMACCNTR		0x00000e04</div><div class='del'>-#define SPIDER_NET_GDTCDPA		0x00000e08</div><div class='del'>-#define SPIDER_NET_GDTDMASEL		0x00000e14</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_ECMODE		0x00000f00</div><div class='del'>-/* clock and reset control register */</div><div class='del'>-#define SPIDER_NET_CKRCTRL		0x00000ff0</div><div class='del'>-</div><div class='del'>-/** SCONFIG registers */</div><div class='del'>-#define SPIDER_NET_SCONFIG_IOACTE	0x00002810</div><div class='del'>-</div><div class='del'>-/** interrupt mask registers */</div><div class='del'>-#define SPIDER_NET_INT0_MASK_VALUE	0x3f7fe2c7</div><div class='del'>-#define SPIDER_NET_INT1_MASK_VALUE	0x0000fff2</div><div class='del'>-#define SPIDER_NET_INT2_MASK_VALUE	0x000003f1</div><div class='del'>-</div><div class='del'>-/* we rely on flagged descriptor interrupts */</div><div class='del'>-#define SPIDER_NET_FRAMENUM_VALUE	0x00000000</div><div class='del'>-/* set this first, then the FRAMENUM_VALUE */</div><div class='del'>-#define SPIDER_NET_GFXFRAMES_VALUE	0x00000000</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_STOP_SEQ_VALUE	0x00000000</div><div class='del'>-#define SPIDER_NET_RUN_SEQ_VALUE	0x0000007e</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_PHY_CTRL_VALUE	0x00040040</div><div class='del'>-/* #define SPIDER_NET_PHY_CTRL_VALUE	0x01070080*/</div><div class='del'>-#define SPIDER_NET_RXMODE_VALUE		0x00000011</div><div class='del'>-/* auto retransmission in case of MAC aborts */</div><div class='del'>-#define SPIDER_NET_TXMODE_VALUE		0x00010000</div><div class='del'>-#define SPIDER_NET_RESTART_VALUE	0x00000000</div><div class='del'>-#define SPIDER_NET_WOL_VALUE		0x00001111</div><div class='del'>-#if 0</div><div class='del'>-#define SPIDER_NET_WOL_VALUE		0x00000000</div><div class='del'>-#endif</div><div class='del'>-#define SPIDER_NET_IPSECINIT_VALUE	0x6f716f71</div><div class='del'>-</div><div class='del'>-/* pause frames: automatic, no upper retransmission count */</div><div class='del'>-/* outside loopback mode: ETOMOD signal dont matter, not connected */</div><div class='del'>-/* ETOMOD signal is brought to PHY reset. bit 2 must be 1 in Celleb */</div><div class='del'>-#define SPIDER_NET_OPMODE_VALUE		0x00000067</div><div class='del'>-/*#define SPIDER_NET_OPMODE_VALUE		0x001b0062*/</div><div class='del'>-#define SPIDER_NET_LENLMT_VALUE		0x00000908</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_MACAPAUSE_VALUE	0x00000800 /* about 1 ms */</div><div class='del'>-#define SPIDER_NET_TXPAUSE_VALUE	0x00000000</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_MACMODE_VALUE	0x00000001</div><div class='del'>-#define SPIDER_NET_BURSTLMT_VALUE	0x00000200 /* about 16 us */</div><div class='del'>-</div><div class='del'>-/* DMAC control register GDMACCNTR</div><div class='del'>- *</div><div class='del'>- * 1(0)				enable r/tx dma</div><div class='del'>- *  0000000				fixed to 0</div><div class='del'>- *</div><div class='del'>- *         000000			fixed to 0</div><div class='del'>- *               0(1)			en/disable descr writeback on force end</div><div class='del'>- *                0(1)			force end</div><div class='del'>- *</div><div class='del'>- *                 000000		fixed to 0</div><div class='del'>- *                       00		burst alignment: 128 bytes</div><div class='del'>- *                       11		burst alignment: 1024 bytes</div><div class='del'>- *</div><div class='del'>- *                         00000	fixed to 0</div><div class='del'>- *                              0	descr writeback size 32 bytes</div><div class='del'>- *                               0(1)	descr chain end interrupt enable</div><div class='del'>- *                                0(1)	descr status writeback enable */</div><div class='del'>-</div><div class='del'>-/* to set RX_DMA_EN */</div><div class='del'>-#define SPIDER_NET_DMA_RX_VALUE		0x80000000</div><div class='del'>-#define SPIDER_NET_DMA_RX_FEND_VALUE	0x00030003</div><div class='del'>-/* to set TX_DMA_EN */</div><div class='del'>-#define SPIDER_NET_TX_DMA_EN           0x80000000</div><div class='del'>-#define SPIDER_NET_GDTBSTA             0x00000300</div><div class='del'>-#define SPIDER_NET_GDTDCEIDIS          0x00000002</div><div class='del'>-#define SPIDER_NET_DMA_TX_VALUE        SPIDER_NET_TX_DMA_EN | \</div><div class='del'>-                                       SPIDER_NET_GDTDCEIDIS | \</div><div class='del'>-                                       SPIDER_NET_GDTBSTA</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_DMA_TX_FEND_VALUE	0x00030003</div><div class='del'>-</div><div class='del'>-/* SPIDER_NET_UA_DESCR_VALUE is OR'ed with the unicast address */</div><div class='del'>-#define SPIDER_NET_UA_DESCR_VALUE	0x00080000</div><div class='del'>-#define SPIDER_NET_PROMISC_VALUE	0x00080000</div><div class='del'>-#define SPIDER_NET_NONPROMISC_VALUE	0x00000000</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_DMASEL_VALUE		0x00000001</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_ECMODE_VALUE		0x00000000</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_CKRCTRL_RUN_VALUE	0x1fff010f</div><div class='del'>-#define SPIDER_NET_CKRCTRL_STOP_VALUE	0x0000010f</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_SBIMSTATE_VALUE	0x00000000</div><div class='del'>-#define SPIDER_NET_SBTMSTATE_VALUE	0x00000000</div><div class='del'>-</div><div class='del'>-/* SPIDER_NET_GHIINT0STS bits, in reverse order so that they can be used</div><div class='del'>- * with 1 &lt;&lt; SPIDER_NET_... */</div><div class='del'>-enum spider_net_int0_status {</div><div class='del'>-	SPIDER_NET_GPHYINT = 0,</div><div class='del'>-	SPIDER_NET_GMAC2INT,</div><div class='del'>-	SPIDER_NET_GMAC1INT,</div><div class='del'>-	SPIDER_NET_GIPSINT,</div><div class='del'>-	SPIDER_NET_GFIFOINT,</div><div class='del'>-	SPIDER_NET_GDMACINT,</div><div class='del'>-	SPIDER_NET_GSYSINT,</div><div class='del'>-	SPIDER_NET_GPWOPCMPINT,</div><div class='del'>-	SPIDER_NET_GPROPCMPINT,</div><div class='del'>-	SPIDER_NET_GPWFFINT,</div><div class='del'>-	SPIDER_NET_GRMDADRINT,</div><div class='del'>-	SPIDER_NET_GRMARPINT,</div><div class='del'>-	SPIDER_NET_GRMMPINT,</div><div class='del'>-	SPIDER_NET_GDTDEN0INT,</div><div class='del'>-	SPIDER_NET_GDDDEN0INT,</div><div class='del'>-	SPIDER_NET_GDCDEN0INT,</div><div class='del'>-	SPIDER_NET_GDBDEN0INT,</div><div class='del'>-	SPIDER_NET_GDADEN0INT,</div><div class='del'>-	SPIDER_NET_GDTFDCINT,</div><div class='del'>-	SPIDER_NET_GDDFDCINT,</div><div class='del'>-	SPIDER_NET_GDCFDCINT,</div><div class='del'>-	SPIDER_NET_GDBFDCINT,</div><div class='del'>-	SPIDER_NET_GDAFDCINT,</div><div class='del'>-	SPIDER_NET_GTTEDINT,</div><div class='del'>-	SPIDER_NET_GDTDCEINT,</div><div class='del'>-	SPIDER_NET_GRFDNMINT,</div><div class='del'>-	SPIDER_NET_GRFCNMINT,</div><div class='del'>-	SPIDER_NET_GRFBNMINT,</div><div class='del'>-	SPIDER_NET_GRFANMINT,</div><div class='del'>-	SPIDER_NET_GRFNMINT,</div><div class='del'>-	SPIDER_NET_G1TMCNTINT,</div><div class='del'>-	SPIDER_NET_GFREECNTINT</div><div class='del'>-};</div><div class='del'>-/* GHIINT1STS bits */</div><div class='del'>-enum spider_net_int1_status {</div><div class='del'>-	SPIDER_NET_GTMFLLINT = 0,</div><div class='del'>-	SPIDER_NET_GRMFLLINT,</div><div class='del'>-	SPIDER_NET_GTMSHTINT,</div><div class='del'>-	SPIDER_NET_GDTINVDINT,</div><div class='del'>-	SPIDER_NET_GRFDFLLINT,</div><div class='del'>-	SPIDER_NET_GDDDCEINT,</div><div class='del'>-	SPIDER_NET_GDDINVDINT,</div><div class='del'>-	SPIDER_NET_GRFCFLLINT,</div><div class='del'>-	SPIDER_NET_GDCDCEINT,</div><div class='del'>-	SPIDER_NET_GDCINVDINT,</div><div class='del'>-	SPIDER_NET_GRFBFLLINT,</div><div class='del'>-	SPIDER_NET_GDBDCEINT,</div><div class='del'>-	SPIDER_NET_GDBINVDINT,</div><div class='del'>-	SPIDER_NET_GRFAFLLINT,</div><div class='del'>-	SPIDER_NET_GDADCEINT,</div><div class='del'>-	SPIDER_NET_GDAINVDINT,</div><div class='del'>-	SPIDER_NET_GDTRSERINT,</div><div class='del'>-	SPIDER_NET_GDDRSERINT,</div><div class='del'>-	SPIDER_NET_GDCRSERINT,</div><div class='del'>-	SPIDER_NET_GDBRSERINT,</div><div class='del'>-	SPIDER_NET_GDARSERINT,</div><div class='del'>-	SPIDER_NET_GDSERINT,</div><div class='del'>-	SPIDER_NET_GDTPTERINT,</div><div class='del'>-	SPIDER_NET_GDDPTERINT,</div><div class='del'>-	SPIDER_NET_GDCPTERINT,</div><div class='del'>-	SPIDER_NET_GDBPTERINT,</div><div class='del'>-	SPIDER_NET_GDAPTERINT</div><div class='del'>-};</div><div class='del'>-/* GHIINT2STS bits */</div><div class='del'>-enum spider_net_int2_status {</div><div class='del'>-	SPIDER_NET_GPROPERINT = 0,</div><div class='del'>-	SPIDER_NET_GMCTCRSNGINT,</div><div class='del'>-	SPIDER_NET_GMCTLCOLINT,</div><div class='del'>-	SPIDER_NET_GMCTTMOTINT,</div><div class='del'>-	SPIDER_NET_GMCRCAERINT,</div><div class='del'>-	SPIDER_NET_GMCRCALERINT,</div><div class='del'>-	SPIDER_NET_GMCRALNERINT,</div><div class='del'>-	SPIDER_NET_GMCROVRINT,</div><div class='del'>-	SPIDER_NET_GMCRRNTINT,</div><div class='del'>-	SPIDER_NET_GMCRRXERINT,</div><div class='del'>-	SPIDER_NET_GTITCSERINT,</div><div class='del'>-	SPIDER_NET_GTIFMTERINT,</div><div class='del'>-	SPIDER_NET_GTIPKTRVKINT,</div><div class='del'>-	SPIDER_NET_GTISPINGINT,</div><div class='del'>-	SPIDER_NET_GTISADNGINT,</div><div class='del'>-	SPIDER_NET_GTISPDNGINT,</div><div class='del'>-	SPIDER_NET_GRIFMTERINT,</div><div class='del'>-	SPIDER_NET_GRIPKTRVKINT,</div><div class='del'>-	SPIDER_NET_GRISPINGINT,</div><div class='del'>-	SPIDER_NET_GRISADNGINT,</div><div class='del'>-	SPIDER_NET_GRISPDNGINT</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_TXINT	(1 &lt;&lt; SPIDER_NET_GDTFDCINT)</div><div class='del'>-</div><div class='del'>-/* We rely on flagged descriptor interrupts */</div><div class='del'>-#define SPIDER_NET_RXINT	( (1 &lt;&lt; SPIDER_NET_GDAFDCINT) )</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_LINKINT	( 1 &lt;&lt; SPIDER_NET_GMAC2INT )</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_ERRINT	( 0xffffffff &amp; \</div><div class='del'>-				  (~SPIDER_NET_TXINT) &amp; \</div><div class='del'>-				  (~SPIDER_NET_RXINT) &amp; \</div><div class='del'>-				  (~SPIDER_NET_LINKINT) )</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_GPREXEC			0x80000000</div><div class='del'>-#define SPIDER_NET_GPRDAT_MASK			0x0000ffff</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_DMAC_NOINTR_COMPLETE		0x00800000</div><div class='del'>-#define SPIDER_NET_DMAC_TXFRMTL		0x00040000</div><div class='del'>-#define SPIDER_NET_DMAC_TCP			0x00020000</div><div class='del'>-#define SPIDER_NET_DMAC_UDP			0x00030000</div><div class='del'>-#define SPIDER_NET_TXDCEST			0x08000000</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_DESCR_RXFDIS        0x00000001</div><div class='del'>-#define SPIDER_NET_DESCR_RXDCEIS       0x00000002</div><div class='del'>-#define SPIDER_NET_DESCR_RXDEN0IS      0x00000004</div><div class='del'>-#define SPIDER_NET_DESCR_RXINVDIS      0x00000008</div><div class='del'>-#define SPIDER_NET_DESCR_RXRERRIS      0x00000010</div><div class='del'>-#define SPIDER_NET_DESCR_RXFDCIMS      0x00000100</div><div class='del'>-#define SPIDER_NET_DESCR_RXDCEIMS      0x00000200</div><div class='del'>-#define SPIDER_NET_DESCR_RXDEN0IMS     0x00000400</div><div class='del'>-#define SPIDER_NET_DESCR_RXINVDIMS     0x00000800</div><div class='del'>-#define SPIDER_NET_DESCR_RXRERRMIS     0x00001000</div><div class='del'>-#define SPIDER_NET_DESCR_UNUSED        0x077fe0e0</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_DESCR_IND_PROC_MASK		0xF0000000</div><div class='del'>-#define SPIDER_NET_DESCR_COMPLETE		0x00000000 /* used in rx and tx */</div><div class='del'>-#define SPIDER_NET_DESCR_RESPONSE_ERROR		0x10000000 /* used in rx and tx */</div><div class='del'>-#define SPIDER_NET_DESCR_PROTECTION_ERROR	0x20000000 /* used in rx and tx */</div><div class='del'>-#define SPIDER_NET_DESCR_FRAME_END		0x40000000 /* used in rx */</div><div class='del'>-#define SPIDER_NET_DESCR_FORCE_END		0x50000000 /* used in rx and tx */</div><div class='del'>-#define SPIDER_NET_DESCR_CARDOWNED		0xA0000000 /* used in rx and tx */</div><div class='del'>-#define SPIDER_NET_DESCR_NOT_IN_USE		0xF0000000</div><div class='del'>-#define SPIDER_NET_DESCR_TXDESFLG		0x00800000</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_DESCR_BAD_STATUS   (SPIDER_NET_DESCR_RXDEN0IS | \</div><div class='del'>-                                       SPIDER_NET_DESCR_RXRERRIS | \</div><div class='del'>-                                       SPIDER_NET_DESCR_RXDEN0IMS | \</div><div class='del'>-                                       SPIDER_NET_DESCR_RXINVDIMS | \</div><div class='del'>-                                       SPIDER_NET_DESCR_RXRERRMIS | \</div><div class='del'>-                                       SPIDER_NET_DESCR_UNUSED)</div><div class='del'>-</div><div class='del'>-/* Descriptor, as defined by the hardware */</div><div class='del'>-struct spider_net_hw_descr {</div><div class='del'>-	u32 buf_addr;</div><div class='del'>-	u32 buf_size;</div><div class='del'>-	u32 next_descr_addr;</div><div class='del'>-	u32 dmac_cmd_status;</div><div class='del'>-	u32 result_size;</div><div class='del'>-	u32 valid_size;	/* all zeroes for tx */</div><div class='del'>-	u32 data_status;</div><div class='del'>-	u32 data_error;	/* all zeroes for tx */</div><div class='del'>-} __attribute__((aligned(32)));</div><div class='del'>-</div><div class='del'>-struct spider_net_descr {</div><div class='del'>-	struct spider_net_hw_descr *hwdescr;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	u32 bus_addr;</div><div class='del'>-	struct spider_net_descr *next;</div><div class='del'>-	struct spider_net_descr *prev;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct spider_net_descr_chain {</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-	struct spider_net_descr *head;</div><div class='del'>-	struct spider_net_descr *tail;</div><div class='del'>-	struct spider_net_descr *ring;</div><div class='del'>-	int num_desc;</div><div class='del'>-	struct spider_net_hw_descr *hwring;</div><div class='del'>-	dma_addr_t dma_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* descriptor data_status bits */</div><div class='del'>-#define SPIDER_NET_RX_IPCHK		29</div><div class='del'>-#define SPIDER_NET_RX_TCPCHK		28</div><div class='del'>-#define SPIDER_NET_VLAN_PACKET		21</div><div class='del'>-#define SPIDER_NET_DATA_STATUS_CKSUM_MASK ( (1 &lt;&lt; SPIDER_NET_RX_IPCHK) | \</div><div class='del'>-					  (1 &lt;&lt; SPIDER_NET_RX_TCPCHK) )</div><div class='del'>-</div><div class='del'>-/* descriptor data_error bits */</div><div class='del'>-#define SPIDER_NET_RX_IPCHKERR		27</div><div class='del'>-#define SPIDER_NET_RX_RXTCPCHKERR	28</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_DATA_ERR_CKSUM_MASK	(1 &lt;&lt; SPIDER_NET_RX_IPCHKERR)</div><div class='del'>-</div><div class='del'>-/* the cases we don't pass the packet to the stack.</div><div class='del'>- * 701b8000 would be correct, but every packets gets that flag */</div><div class='del'>-#define SPIDER_NET_DESTROY_RX_FLAGS	0x700b8000</div><div class='del'>-</div><div class='del'>-#define SPIDER_NET_DEFAULT_MSG		( NETIF_MSG_DRV | \</div><div class='del'>-					  NETIF_MSG_PROBE | \</div><div class='del'>-					  NETIF_MSG_LINK | \</div><div class='del'>-					  NETIF_MSG_TIMER | \</div><div class='del'>-					  NETIF_MSG_IFDOWN | \</div><div class='del'>-					  NETIF_MSG_IFUP | \</div><div class='del'>-					  NETIF_MSG_RX_ERR | \</div><div class='del'>-					  NETIF_MSG_TX_ERR | \</div><div class='del'>-					  NETIF_MSG_TX_QUEUED | \</div><div class='del'>-					  NETIF_MSG_INTR | \</div><div class='del'>-					  NETIF_MSG_TX_DONE | \</div><div class='del'>-					  NETIF_MSG_RX_STATUS | \</div><div class='del'>-					  NETIF_MSG_PKTDATA | \</div><div class='del'>-					  NETIF_MSG_HW | \</div><div class='del'>-					  NETIF_MSG_WOL )</div><div class='del'>-</div><div class='del'>-struct spider_net_extra_stats {</div><div class='del'>-	unsigned long rx_desc_error;</div><div class='del'>-	unsigned long tx_timeouts;</div><div class='del'>-	unsigned long alloc_rx_skb_error;</div><div class='del'>-	unsigned long rx_iommu_map_error;</div><div class='del'>-	unsigned long tx_iommu_map_error;</div><div class='del'>-	unsigned long rx_desc_unk_state;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct spider_net_card {</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	struct pci_dev *pdev;</div><div class='del'>-	struct mii_phy phy;</div><div class='del'>-</div><div class='del'>-	struct napi_struct napi;</div><div class='del'>-</div><div class='del'>-	int medium;</div><div class='del'>-</div><div class='del'>-	void __iomem *regs;</div><div class='del'>-</div><div class='del'>-	struct spider_net_descr_chain tx_chain;</div><div class='del'>-	struct spider_net_descr_chain rx_chain;</div><div class='del'>-	struct spider_net_descr *low_watermark;</div><div class='del'>-</div><div class='del'>-	int aneg_count;</div><div class='del'>-	struct timer_list aneg_timer;</div><div class='del'>-	struct timer_list tx_timer;</div><div class='del'>-	struct work_struct tx_timeout_task;</div><div class='del'>-	atomic_t tx_timeout_task_counter;</div><div class='del'>-	wait_queue_head_t waitq;</div><div class='del'>-	int num_rx_ints;</div><div class='del'>-	int ignore_rx_ramfull;</div><div class='del'>-</div><div class='del'>-	/* for ethtool */</div><div class='del'>-	int msg_enable;</div><div class='del'>-	struct spider_net_extra_stats spider_stats;</div><div class='del'>-</div><div class='del'>-	/* Must be last item in struct */</div><div class='del'>-	struct spider_net_descr darray[];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/ethernet/toshiba/spider_net_ethtool.c b/drivers/net/ethernet/toshiba/spider_net_ethtool.c<br/>deleted file mode 100644<br/>index fef9fd127b5e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/toshiba/spider_net_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/toshiba/spider_net_ethtool.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,174 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/*</div><div class='del'>- * Network device driver for Cell Processor-Based Blade</div><div class='del'>- *</div><div class='del'>- * (C) Copyright IBM Corp. 2005</div><div class='del'>- *</div><div class='del'>- * Authors : Utz Bacher &lt;utz.bacher@de.ibm.com&gt;</div><div class='del'>- *           Jens Osterkamp &lt;Jens.Osterkamp@de.ibm.com&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/ethtool.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-</div><div class='del'>-#include "spider_net.h"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static struct {</div><div class='del'>-	const char str[ETH_GSTRING_LEN];</div><div class='del'>-} ethtool_stats_keys[] = {</div><div class='del'>-	{ "tx_packets" },</div><div class='del'>-	{ "tx_bytes" },</div><div class='del'>-	{ "rx_packets" },</div><div class='del'>-	{ "rx_bytes" },</div><div class='del'>-	{ "tx_errors" },</div><div class='del'>-	{ "tx_dropped" },</div><div class='del'>-	{ "rx_dropped" },</div><div class='del'>-	{ "rx_descriptor_error" },</div><div class='del'>-	{ "tx_timeouts" },</div><div class='del'>-	{ "alloc_rx_skb_error" },</div><div class='del'>-	{ "rx_iommu_map_error" },</div><div class='del'>-	{ "tx_iommu_map_error" },</div><div class='del'>-	{ "rx_desc_unk_state" },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-spider_net_ethtool_get_link_ksettings(struct net_device *netdev,</div><div class='del'>-				      struct ethtool_link_ksettings *cmd)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card;</div><div class='del'>-	card = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	ethtool_link_ksettings_zero_link_mode(cmd, supported);</div><div class='del'>-	ethtool_link_ksettings_add_link_mode(cmd, supported, 1000baseT_Full);</div><div class='del'>-	ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);</div><div class='del'>-</div><div class='del'>-	ethtool_link_ksettings_zero_link_mode(cmd, advertising);</div><div class='del'>-	ethtool_link_ksettings_add_link_mode(cmd, advertising, 1000baseT_Full);</div><div class='del'>-	ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);</div><div class='del'>-</div><div class='del'>-	cmd-&gt;base.port = PORT_FIBRE;</div><div class='del'>-	cmd-&gt;base.speed = card-&gt;phy.speed;</div><div class='del'>-	cmd-&gt;base.duplex = DUPLEX_FULL;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-spider_net_ethtool_get_drvinfo(struct net_device *netdev,</div><div class='del'>-			       struct ethtool_drvinfo *drvinfo)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card;</div><div class='del'>-	card = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	/* clear and fill out info */</div><div class='del'>-	strscpy(drvinfo-&gt;driver, spider_net_driver_name,</div><div class='del'>-		sizeof(drvinfo-&gt;driver));</div><div class='del'>-	strscpy(drvinfo-&gt;version, VERSION, sizeof(drvinfo-&gt;version));</div><div class='del'>-	strscpy(drvinfo-&gt;fw_version, "no information",</div><div class='del'>-		sizeof(drvinfo-&gt;fw_version));</div><div class='del'>-	strscpy(drvinfo-&gt;bus_info, pci_name(card-&gt;pdev),</div><div class='del'>-		sizeof(drvinfo-&gt;bus_info));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-spider_net_ethtool_get_wol(struct net_device *netdev,</div><div class='del'>-			   struct ethtool_wolinfo *wolinfo)</div><div class='del'>-{</div><div class='del'>-	/* no support for wol */</div><div class='del'>-	wolinfo-&gt;supported = 0;</div><div class='del'>-	wolinfo-&gt;wolopts = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32</div><div class='del'>-spider_net_ethtool_get_msglevel(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card;</div><div class='del'>-	card = netdev_priv(netdev);</div><div class='del'>-	return card-&gt;msg_enable;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-spider_net_ethtool_set_msglevel(struct net_device *netdev,</div><div class='del'>-				u32 level)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card;</div><div class='del'>-	card = netdev_priv(netdev);</div><div class='del'>-	card-&gt;msg_enable = level;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-spider_net_ethtool_nway_reset(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	if (netif_running(netdev)) {</div><div class='del'>-		spider_net_stop(netdev);</div><div class='del'>-		spider_net_open(netdev);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-spider_net_ethtool_get_ringparam(struct net_device *netdev,</div><div class='del'>-				 struct ethtool_ringparam *ering,</div><div class='del'>-				 struct kernel_ethtool_ringparam *kernel_ering,</div><div class='del'>-				 struct netlink_ext_ack *extack)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	ering-&gt;tx_max_pending = SPIDER_NET_TX_DESCRIPTORS_MAX;</div><div class='del'>-	ering-&gt;tx_pending = card-&gt;tx_chain.num_desc;</div><div class='del'>-	ering-&gt;rx_max_pending = SPIDER_NET_RX_DESCRIPTORS_MAX;</div><div class='del'>-	ering-&gt;rx_pending = card-&gt;rx_chain.num_desc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int spider_net_get_sset_count(struct net_device *netdev, int sset)</div><div class='del'>-{</div><div class='del'>-	switch (sset) {</div><div class='del'>-	case ETH_SS_STATS:</div><div class='del'>-		return ARRAY_SIZE(ethtool_stats_keys);</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spider_net_get_ethtool_stats(struct net_device *netdev,</div><div class='del'>-		struct ethtool_stats *stats, u64 *data)</div><div class='del'>-{</div><div class='del'>-	struct spider_net_card *card = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	data[0] = netdev-&gt;stats.tx_packets;</div><div class='del'>-	data[1] = netdev-&gt;stats.tx_bytes;</div><div class='del'>-	data[2] = netdev-&gt;stats.rx_packets;</div><div class='del'>-	data[3] = netdev-&gt;stats.rx_bytes;</div><div class='del'>-	data[4] = netdev-&gt;stats.tx_errors;</div><div class='del'>-	data[5] = netdev-&gt;stats.tx_dropped;</div><div class='del'>-	data[6] = netdev-&gt;stats.rx_dropped;</div><div class='del'>-	data[7] = card-&gt;spider_stats.rx_desc_error;</div><div class='del'>-	data[8] = card-&gt;spider_stats.tx_timeouts;</div><div class='del'>-	data[9] = card-&gt;spider_stats.alloc_rx_skb_error;</div><div class='del'>-	data[10] = card-&gt;spider_stats.rx_iommu_map_error;</div><div class='del'>-	data[11] = card-&gt;spider_stats.tx_iommu_map_error;</div><div class='del'>-	data[12] = card-&gt;spider_stats.rx_desc_unk_state;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void spider_net_get_strings(struct net_device *netdev, u32 stringset,</div><div class='del'>-				   u8 *data)</div><div class='del'>-{</div><div class='del'>-	memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-const struct ethtool_ops spider_net_ethtool_ops = {</div><div class='del'>-	.get_drvinfo		= spider_net_ethtool_get_drvinfo,</div><div class='del'>-	.get_wol		= spider_net_ethtool_get_wol,</div><div class='del'>-	.get_msglevel		= spider_net_ethtool_get_msglevel,</div><div class='del'>-	.set_msglevel		= spider_net_ethtool_set_msglevel,</div><div class='del'>-	.get_link		= ethtool_op_get_link,</div><div class='del'>-	.nway_reset		= spider_net_ethtool_nway_reset,</div><div class='del'>-	.get_ringparam          = spider_net_ethtool_get_ringparam,</div><div class='del'>-	.get_strings		= spider_net_get_strings,</div><div class='del'>-	.get_sset_count		= spider_net_get_sset_count,</div><div class='del'>-	.get_ethtool_stats	= spider_net_get_ethtool_stats,</div><div class='del'>-	.get_link_ksettings	= spider_net_ethtool_get_link_ksettings,</div><div class='del'>-};</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/ethernet/tundra/tsi108_eth.c b/drivers/net/ethernet/tundra/tsi108_eth.c<br/>index c6957e3b7f0f..7e0b3d694ac0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/tundra/tsi108_eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/tundra/tsi108_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/tundra/tsi108_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/tundra/tsi108_eth.c</a></div><div class='hunk'>@@ -1379,7 +1379,7 @@ static int tsi108_close(struct net_device *dev)</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	napi_disable(&amp;data-&gt;napi);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;data-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;data-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	tsi108_stop_ethernet(dev);</div><div class='ctx'> 	tsi108_kill_phy(dev);</div><div class='hunk'>@@ -1652,7 +1652,7 @@ regs_fail:</div><div class='ctx'> </div><div class='ctx'> static void tsi108_timed_checker(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tsi108_prv_data *data = from_timer(data, t, timer);</div><div class='add'>+	struct tsi108_prv_data *data = timer_container_of(data, t, timer);</div><div class='ctx'> 	struct net_device *dev = data-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	tsi108_check_phy(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/vertexcom/mse102x.c b/drivers/net/ethernet/vertexcom/mse102x.c<br/>index a04d4073def9..a75bca1243e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/vertexcom/mse102x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/vertexcom/mse102x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/vertexcom/mse102x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/vertexcom/mse102x.c</a></div><div class='hunk'>@@ -6,7 +6,9 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='hunk'>@@ -15,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/cache.h&gt;</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='hunk'>@@ -33,7 +36,7 @@</div><div class='ctx'> #define CMD_CTR		(0x2 &lt;&lt; CMD_SHIFT)</div><div class='ctx'> </div><div class='ctx'> #define CMD_MASK	GENMASK(15, CMD_SHIFT)</div><div class='del'>-#define LEN_MASK	GENMASK(CMD_SHIFT - 1, 0)</div><div class='add'>+#define LEN_MASK	GENMASK(CMD_SHIFT - 2, 0)</div><div class='ctx'> </div><div class='ctx'> #define DET_CMD_LEN	4</div><div class='ctx'> #define DET_SOF_LEN	2</div><div class='hunk'>@@ -44,7 +47,6 @@</div><div class='ctx'> </div><div class='ctx'> struct mse102x_stats {</div><div class='ctx'> 	u64 xfer_err;</div><div class='del'>-	u64 invalid_cmd;</div><div class='ctx'> 	u64 invalid_ctr;</div><div class='ctx'> 	u64 invalid_dft;</div><div class='ctx'> 	u64 invalid_len;</div><div class='hunk'>@@ -55,7 +57,6 @@ struct mse102x_stats {</div><div class='ctx'> </div><div class='ctx'> static const char mse102x_gstrings_stats[][ETH_GSTRING_LEN] = {</div><div class='ctx'> 	"SPI transfer errors",</div><div class='del'>-	"Invalid command",</div><div class='ctx'> 	"Invalid CTR",</div><div class='ctx'> 	"Invalid DFT",</div><div class='ctx'> 	"Invalid frame length",</div><div class='hunk'>@@ -84,6 +85,8 @@ struct mse102x_net_spi {</div><div class='ctx'> 	struct spi_message	spi_msg;</div><div class='ctx'> 	struct spi_transfer	spi_xfer;</div><div class='ctx'> </div><div class='add'>+	bool			valid_cmd_received;</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> 	struct dentry		*device_root;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -97,16 +100,18 @@ static int mse102x_info_show(struct seq_file *s, void *what)</div><div class='ctx'> {</div><div class='ctx'> 	struct mse102x_net_spi *mses = s-&gt;private;</div><div class='ctx'> </div><div class='del'>-	seq_printf(s, "TX ring size        : %u\n",</div><div class='add'>+	seq_printf(s, "TX ring size            : %u\n",</div><div class='ctx'> 		   skb_queue_len(&amp;mses-&gt;mse102x.txq));</div><div class='ctx'> </div><div class='del'>-	seq_printf(s, "IRQ                 : %d\n",</div><div class='add'>+	seq_printf(s, "IRQ                     : %d\n",</div><div class='ctx'> 		   mses-&gt;spidev-&gt;irq);</div><div class='ctx'> </div><div class='del'>-	seq_printf(s, "SPI effective speed : %lu\n",</div><div class='add'>+	seq_printf(s, "SPI effective speed     : %lu\n",</div><div class='ctx'> 		   (unsigned long)mses-&gt;spi_xfer.effective_speed_hz);</div><div class='del'>-	seq_printf(s, "SPI mode            : %x\n",</div><div class='add'>+	seq_printf(s, "SPI mode                : %x\n",</div><div class='ctx'> 		   mses-&gt;spidev-&gt;mode);</div><div class='add'>+	seq_printf(s, "Received valid CMD once : %s\n",</div><div class='add'>+		   str_yes_no(mses-&gt;valid_cmd_received));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -193,10 +198,10 @@ static int mse102x_rx_cmd_spi(struct mse102x_net *mse, u8 *rxb)</div><div class='ctx'> 	} else if (*cmd != cpu_to_be16(DET_CMD)) {</div><div class='ctx'> 		net_dbg_ratelimited("%s: Unexpected response (0x%04x)\n",</div><div class='ctx'> 				    __func__, *cmd);</div><div class='del'>-		mse-&gt;stats.invalid_cmd++;</div><div class='ctx'> 		ret = -EIO;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		memcpy(rxb, trx + 2, 2);</div><div class='add'>+		mses-&gt;valid_cmd_received = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -222,7 +227,7 @@ static int mse102x_tx_frame_spi(struct mse102x_net *mse, struct sk_buff *txp,</div><div class='ctx'> 	struct mse102x_net_spi *mses = to_mse102x_spi(mse);</div><div class='ctx'> 	struct spi_transfer *xfer = &amp;mses-&gt;spi_xfer;</div><div class='ctx'> 	struct spi_message *msg = &amp;mses-&gt;spi_msg;</div><div class='del'>-	struct sk_buff *tskb;</div><div class='add'>+	struct sk_buff *tskb = NULL;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(mse, tx_queued, mse-&gt;ndev, "%s: skb %p, %d@%p\n",</div><div class='hunk'>@@ -235,7 +240,6 @@ static int mse102x_tx_frame_spi(struct mse102x_net *mse, struct sk_buff *txp,</div><div class='ctx'> 		if (!tskb)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		dev_kfree_skb(txp);</div><div class='ctx'> 		txp = tskb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -257,11 +261,13 @@ static int mse102x_tx_frame_spi(struct mse102x_net *mse, struct sk_buff *txp,</div><div class='ctx'> 		mse-&gt;stats.xfer_err++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	dev_kfree_skb(tskb);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mse102x_rx_frame_spi(struct mse102x_net *mse, u8 *buff,</div><div class='del'>-				unsigned int frame_len)</div><div class='add'>+				unsigned int frame_len, bool drop)</div><div class='ctx'> {</div><div class='ctx'> 	struct mse102x_net_spi *mses = to_mse102x_spi(mse);</div><div class='ctx'> 	struct spi_transfer *xfer = &amp;mses-&gt;spi_xfer;</div><div class='hunk'>@@ -279,6 +285,9 @@ static int mse102x_rx_frame_spi(struct mse102x_net *mse, u8 *buff,</div><div class='ctx'> 		netdev_err(mse-&gt;ndev, "%s: spi_sync() failed: %d\n",</div><div class='ctx'> 			   __func__, ret);</div><div class='ctx'> 		mse-&gt;stats.xfer_err++;</div><div class='add'>+	} else if (drop) {</div><div class='add'>+		netdev_dbg(mse-&gt;ndev, "%s: Drop frame\n", __func__);</div><div class='add'>+		ret = -EINVAL;</div><div class='ctx'> 	} else if (*sof != cpu_to_be16(DET_SOF)) {</div><div class='ctx'> 		netdev_dbg(mse-&gt;ndev, "%s: SPI start of frame is invalid (0x%04x)\n",</div><div class='ctx'> 			   __func__, *sof);</div><div class='hunk'>@@ -301,61 +310,60 @@ static void mse102x_dump_packet(const char *msg, int len, const char *data)</div><div class='ctx'> 		       data, len, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mse102x_rx_pkt_spi(struct mse102x_net *mse)</div><div class='add'>+static irqreturn_t mse102x_rx_pkt_spi(struct mse102x_net *mse)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	unsigned int rxalign;</div><div class='ctx'> 	unsigned int rxlen;</div><div class='add'>+	bool drop = false;</div><div class='ctx'> 	__be16 rx = 0;</div><div class='ctx'> 	u16 cmd_resp;</div><div class='ctx'> 	u8 *rxpkt;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mse102x_tx_cmd_spi(mse, CMD_CTR);</div><div class='del'>-	ret = mse102x_rx_cmd_spi(mse, (u8 *)&amp;rx);</div><div class='del'>-	cmd_resp = be16_to_cpu(rx);</div><div class='del'>-</div><div class='del'>-	if (ret || ((cmd_resp &amp; CMD_MASK) != CMD_RTS)) {</div><div class='add'>+	if (mse102x_rx_cmd_spi(mse, (u8 *)&amp;rx)) {</div><div class='ctx'> 		usleep_range(50, 100);</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		mse102x_tx_cmd_spi(mse, CMD_CTR);</div><div class='del'>-		ret = mse102x_rx_cmd_spi(mse, (u8 *)&amp;rx);</div><div class='del'>-		if (ret)</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		cmd_resp = be16_to_cpu(rx);</div><div class='del'>-		if ((cmd_resp &amp; CMD_MASK) != CMD_RTS) {</div><div class='del'>-			net_dbg_ratelimited("%s: Unexpected response (0x%04x)\n",</div><div class='del'>-					    __func__, cmd_resp);</div><div class='del'>-			mse-&gt;stats.invalid_rts++;</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		net_dbg_ratelimited("%s: Unexpected response to first CMD\n",</div><div class='del'>-				    __func__);</div><div class='add'>+	cmd_resp = be16_to_cpu(rx);</div><div class='add'>+	if ((cmd_resp &amp; CMD_MASK) != CMD_RTS) {</div><div class='add'>+		net_dbg_ratelimited("%s: Unexpected response (0x%04x)\n",</div><div class='add'>+				    __func__, cmd_resp);</div><div class='add'>+		mse-&gt;stats.invalid_rts++;</div><div class='add'>+		drop = true;</div><div class='add'>+		goto drop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rxlen = cmd_resp &amp; LEN_MASK;</div><div class='del'>-	if (!rxlen) {</div><div class='del'>-		net_dbg_ratelimited("%s: No frame length defined\n", __func__);</div><div class='add'>+	if (rxlen &lt; ETH_ZLEN || rxlen &gt; VLAN_ETH_FRAME_LEN) {</div><div class='add'>+		net_dbg_ratelimited("%s: Invalid frame length: %d\n", __func__,</div><div class='add'>+				    rxlen);</div><div class='ctx'> 		mse-&gt;stats.invalid_len++;</div><div class='del'>-		return;</div><div class='add'>+		drop = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* In case of a invalid CMD_RTS, the frame must be consumed anyway.</div><div class='add'>+	 * So assume the maximum possible frame length.</div><div class='add'>+	 */</div><div class='add'>+drop:</div><div class='add'>+	if (drop)</div><div class='add'>+		rxlen = VLAN_ETH_FRAME_LEN;</div><div class='add'>+</div><div class='ctx'> 	rxalign = ALIGN(rxlen + DET_SOF_LEN + DET_DFT_LEN, 4);</div><div class='ctx'> 	skb = netdev_alloc_skb_ip_align(mse-&gt;ndev, rxalign);</div><div class='ctx'> 	if (!skb)</div><div class='del'>-		return;</div><div class='add'>+		return IRQ_NONE;</div><div class='ctx'> </div><div class='ctx'> 	/* 2 bytes Start of frame (before ethernet header)</div><div class='ctx'> 	 * 2 bytes Data frame tail (after ethernet frame)</div><div class='ctx'> 	 * They are copied, but ignored.</div><div class='ctx'> 	 */</div><div class='ctx'> 	rxpkt = skb_put(skb, rxlen) - DET_SOF_LEN;</div><div class='del'>-	if (mse102x_rx_frame_spi(mse, rxpkt, rxlen)) {</div><div class='add'>+	if (mse102x_rx_frame_spi(mse, rxpkt, rxlen, drop)) {</div><div class='ctx'> 		mse-&gt;ndev-&gt;stats.rx_errors++;</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='del'>-		return;</div><div class='add'>+		return IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (netif_msg_pktdata(mse))</div><div class='hunk'>@@ -366,6 +374,8 @@ static void mse102x_rx_pkt_spi(struct mse102x_net *mse)</div><div class='ctx'> </div><div class='ctx'> 	mse-&gt;ndev-&gt;stats.rx_packets++;</div><div class='ctx'> 	mse-&gt;ndev-&gt;stats.rx_bytes += rxlen;</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mse102x_tx_pkt_spi(struct mse102x_net *mse, struct sk_buff *txb,</div><div class='hunk'>@@ -436,13 +446,15 @@ static void mse102x_tx_work(struct work_struct *work)</div><div class='ctx'> 	mse = &amp;mses-&gt;mse102x;</div><div class='ctx'> </div><div class='ctx'> 	while ((txb = skb_dequeue(&amp;mse-&gt;txq))) {</div><div class='add'>+		unsigned int len = max_t(unsigned int, txb-&gt;len, ETH_ZLEN);</div><div class='add'>+</div><div class='ctx'> 		mutex_lock(&amp;mses-&gt;lock);</div><div class='ctx'> 		ret = mse102x_tx_pkt_spi(mse, txb, work_timeout);</div><div class='ctx'> 		mutex_unlock(&amp;mses-&gt;lock);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			mse-&gt;ndev-&gt;stats.tx_dropped++;</div><div class='ctx'> 		} else {</div><div class='del'>-			mse-&gt;ndev-&gt;stats.tx_bytes += txb-&gt;len;</div><div class='add'>+			mse-&gt;ndev-&gt;stats.tx_bytes += len;</div><div class='ctx'> 			mse-&gt;ndev-&gt;stats.tx_packets++;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -495,19 +507,36 @@ static irqreturn_t mse102x_irq(int irq, void *_mse)</div><div class='ctx'> {</div><div class='ctx'> 	struct mse102x_net *mse = _mse;</div><div class='ctx'> 	struct mse102x_net_spi *mses = to_mse102x_spi(mse);</div><div class='add'>+	irqreturn_t ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;mses-&gt;lock);</div><div class='del'>-	mse102x_rx_pkt_spi(mse);</div><div class='add'>+	ret = mse102x_rx_pkt_spi(mse);</div><div class='ctx'> 	mutex_unlock(&amp;mses-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	return IRQ_HANDLED;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mse102x_net_open(struct net_device *ndev)</div><div class='ctx'> {</div><div class='add'>+	struct irq_data *irq_data = irq_get_irq_data(ndev-&gt;irq);</div><div class='ctx'> 	struct mse102x_net *mse = netdev_priv(ndev);</div><div class='add'>+	struct mse102x_net_spi *mses = to_mse102x_spi(mse);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!irq_data) {</div><div class='add'>+		netdev_err(ndev, "Invalid IRQ: %d\n", ndev-&gt;irq);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (irqd_get_trigger_type(irq_data)) {</div><div class='add'>+	case IRQ_TYPE_LEVEL_HIGH:</div><div class='add'>+	case IRQ_TYPE_LEVEL_LOW:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_warn_once(ndev, "Only IRQ type level recommended, please update your device tree firmware.\n");</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = request_threaded_irq(ndev-&gt;irq, NULL, mse102x_irq, IRQF_ONESHOT,</div><div class='ctx'> 				   ndev-&gt;name, mse);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='hunk'>@@ -521,6 +550,14 @@ static int mse102x_net_open(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	netif_carrier_on(ndev);</div><div class='ctx'> </div><div class='add'>+	/* The SPI interrupt can stuck in case of pending packet(s).</div><div class='add'>+	 * So poll for possible packet(s) to re-arm the interrupt.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;mses-&gt;lock);</div><div class='add'>+	if (mse102x_rx_pkt_spi(mse) == IRQ_NONE)</div><div class='add'>+		mse102x_rx_pkt_spi(mse);</div><div class='add'>+	mutex_unlock(&amp;mses-&gt;lock);</div><div class='add'>+</div><div class='ctx'> 	netif_dbg(mse, ifup, ndev, "network device up\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ethernet/via/via-rhine.c b/drivers/net/ethernet/via/via-rhine.c<br/>index 894911f3d560..e56ebbdd428d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/via/via-rhine.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/via/via-rhine.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/via/via-rhine.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/via/via-rhine.c</a></div><div class='hunk'>@@ -1568,7 +1568,7 @@ static void init_registers(struct net_device *dev)</div><div class='ctx'> 	if (rp-&gt;quirks &amp; rqMgmt)</div><div class='ctx'> 		rhine_init_cam_filter(dev);</div><div class='ctx'> </div><div class='del'>-	napi_enable(&amp;rp-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;rp-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	iowrite16(RHINE_EVENT &amp; 0xffff, ioaddr + IntrEnable);</div><div class='ctx'> </div><div class='hunk'>@@ -1696,7 +1696,10 @@ static int rhine_open(struct net_device *dev)</div><div class='ctx'> 	rhine_power_init(dev);</div><div class='ctx'> 	rhine_chip_reset(dev);</div><div class='ctx'> 	rhine_task_enable(rp);</div><div class='add'>+</div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	init_registers(dev);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(rp, ifup, dev, "%s() Done - status %04x MII status: %04x\n",</div><div class='ctx'> 		  __func__, ioread16(ioaddr + ChipCmd),</div><div class='hunk'>@@ -1727,6 +1730,8 @@ static void rhine_reset_task(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	napi_disable(&amp;rp-&gt;napi);</div><div class='ctx'> 	netif_tx_disable(dev);</div><div class='add'>+</div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	spin_lock_bh(&amp;rp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* clear all descriptors */</div><div class='hunk'>@@ -1740,6 +1745,7 @@ static void rhine_reset_task(struct work_struct *work)</div><div class='ctx'> 	init_registers(dev);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;rp-&gt;lock);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	dev-&gt;stats.tx_errors++;</div><div class='hunk'>@@ -2541,9 +2547,12 @@ static int rhine_resume(struct device *device)</div><div class='ctx'> 	alloc_tbufs(dev);</div><div class='ctx'> 	rhine_reset_rbufs(rp);</div><div class='ctx'> 	rhine_task_enable(rp);</div><div class='add'>+</div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	spin_lock_bh(&amp;rp-&gt;lock);</div><div class='ctx'> 	init_registers(dev);</div><div class='ctx'> 	spin_unlock_bh(&amp;rp-&gt;lock);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_device_attach(dev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/via/via-velocity.c b/drivers/net/ethernet/via/via-velocity.c<br/>index dd4a07c97eee..5aa93144a4f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/via/via-velocity.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/via/via-velocity.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/via/via-velocity.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/via/via-velocity.c</a></div><div class='hunk'>@@ -2320,7 +2320,8 @@ static int velocity_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto out_free_tmp_vptr_1;</div><div class='ctx'> </div><div class='del'>-		napi_disable(&amp;vptr-&gt;napi);</div><div class='add'>+		netdev_lock(dev);</div><div class='add'>+		napi_disable_locked(&amp;vptr-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irqsave(&amp;vptr-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -2342,12 +2343,13 @@ static int velocity_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> </div><div class='ctx'> 		velocity_give_many_rx_descs(vptr);</div><div class='ctx'> </div><div class='del'>-		napi_enable(&amp;vptr-&gt;napi);</div><div class='add'>+		napi_enable_locked(&amp;vptr-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 		mac_enable_int(vptr-&gt;mac_regs);</div><div class='ctx'> 		netif_start_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 		spin_unlock_irqrestore(&amp;vptr-&gt;lock, flags);</div><div class='add'>+		netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 		velocity_free_rings(tmp_vptr);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/Kconfig b/drivers/net/ethernet/wangxun/Kconfig<br/>index e46ccebcfd22..d138dea7d208 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/Kconfig</a></div><div class='hunk'>@@ -18,13 +18,16 @@ if NET_VENDOR_WANGXUN</div><div class='ctx'> </div><div class='ctx'> config LIBWX</div><div class='ctx'> 	tristate</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select PAGE_POOL</div><div class='add'>+	select DIMLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	Common library for Wangxun(R) Ethernet drivers.</div><div class='ctx'> </div><div class='ctx'> config NGBE</div><div class='ctx'> 	tristate "Wangxun(R) GbE PCI Express adapters support"</div><div class='ctx'> 	depends on PCI</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select LIBWX</div><div class='ctx'> 	select PHYLINK</div><div class='ctx'> 	help</div><div class='hunk'>@@ -38,10 +41,11 @@ config NGBE</div><div class='ctx'> 	  will be called ngbe.</div><div class='ctx'> </div><div class='ctx'> config TXGBE</div><div class='del'>-	tristate "Wangxun(R) 10GbE PCI Express adapters support"</div><div class='add'>+	tristate "Wangxun(R) 10/25/40GbE PCI Express adapters support"</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	depends on COMMON_CLK</div><div class='ctx'> 	depends on I2C_DESIGNWARE_PLATFORM</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select MARVELL_10G_PHY</div><div class='ctx'> 	select REGMAP</div><div class='ctx'> 	select PHYLINK</div><div class='hunk'>@@ -52,7 +56,7 @@ config TXGBE</div><div class='ctx'> 	select PCS_XPCS</div><div class='ctx'> 	select LIBWX</div><div class='ctx'> 	help</div><div class='del'>-	  This driver supports Wangxun(R) 10GbE PCI Express family of</div><div class='add'>+	  This driver supports Wangxun(R) 10/25/40GbE PCI Express family of</div><div class='ctx'> 	  adapters.</div><div class='ctx'> </div><div class='ctx'> 	  More specific information on configuring the driver is in</div><div class='hunk'>@@ -61,4 +65,39 @@ config TXGBE</div><div class='ctx'> 	  To compile this driver as a module, choose M here. The module</div><div class='ctx'> 	  will be called txgbe.</div><div class='ctx'> </div><div class='add'>+config TXGBEVF</div><div class='add'>+	tristate "Wangxun(R) 10/25/40G Virtual Function Ethernet support"</div><div class='add'>+	depends on PCI</div><div class='add'>+	depends on PCI_MSI</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select LIBWX</div><div class='add'>+	select PHYLINK</div><div class='add'>+	help</div><div class='add'>+	  This driver supports virtual functions for SP1000A, WX1820AL,</div><div class='add'>+	  WX5XXX, WX5XXXAL.</div><div class='add'>+</div><div class='add'>+	  This driver was formerly named txgbevf.</div><div class='add'>+</div><div class='add'>+	  More specific information on configuring the driver is in</div><div class='add'>+	  &lt;file:Documentation/networking/device_drivers/ethernet/wangxun/txgbevf.rst&gt;.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here. MSI-X interrupt</div><div class='add'>+	  support is required for this driver to work correctly.</div><div class='add'>+</div><div class='add'>+config NGBEVF</div><div class='add'>+	tristate "Wangxun(R) GbE Virtual Function Ethernet support"</div><div class='add'>+	depends on PCI_MSI</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select LIBWX</div><div class='add'>+	help</div><div class='add'>+	  This driver supports virtual functions for WX1860, WX1860AL.</div><div class='add'>+</div><div class='add'>+	  This driver was formerly named ngbevf.</div><div class='add'>+</div><div class='add'>+	  More specific information on configuring the driver is in</div><div class='add'>+	  &lt;file:Documentation/networking/device_drivers/ethernet/wangxun/ngbevf.rst&gt;.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here. MSI-X interrupt</div><div class='add'>+	  support is required for this driver to work correctly.</div><div class='add'>+</div><div class='ctx'> endif # NET_VENDOR_WANGXUN</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/Makefile b/drivers/net/ethernet/wangxun/Makefile<br/>index ca19311dbe38..0a71a710b717 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/Makefile</a></div><div class='hunk'>@@ -5,4 +5,6 @@</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_LIBWX) += libwx/</div><div class='ctx'> obj-$(CONFIG_TXGBE) += txgbe/</div><div class='add'>+obj-$(CONFIG_TXGBEVF) += txgbevf/</div><div class='ctx'> obj-$(CONFIG_NGBE) += ngbe/</div><div class='add'>+obj-$(CONFIG_NGBEVF) += ngbevf/</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/Makefile b/drivers/net/ethernet/wangxun/libwx/Makefile<br/>index 42ccd6e4052e..a71b0ad77de3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/Makefile</a></div><div class='hunk'>@@ -4,4 +4,5 @@</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_LIBWX) += libwx.o</div><div class='ctx'> </div><div class='del'>-libwx-objs := wx_hw.o wx_lib.o wx_ethtool.o</div><div class='add'>+libwx-objs := wx_hw.o wx_lib.o wx_ethtool.o wx_ptp.o wx_mbx.o wx_sriov.o</div><div class='add'>+libwx-objs += wx_vf.o wx_vf_lib.o wx_vf_common.o</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_ethtool.c b/drivers/net/ethernet/wangxun/libwx/wx_ethtool.c<br/>index abe5921dde02..f362e51c73ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_ethtool.c</a></div><div class='hunk'>@@ -41,6 +41,9 @@ static const struct wx_stats wx_gstrings_stats[] = {</div><div class='ctx'> 	WX_STAT("rx_csum_offload_good_count", hw_csum_rx_good),</div><div class='ctx'> 	WX_STAT("rx_csum_offload_errors", hw_csum_rx_error),</div><div class='ctx'> 	WX_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed),</div><div class='add'>+	WX_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),</div><div class='add'>+	WX_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),</div><div class='add'>+	WX_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct wx_stats wx_gstrings_fdir_stats[] = {</div><div class='hunk'>@@ -48,6 +51,11 @@ static const struct wx_stats wx_gstrings_fdir_stats[] = {</div><div class='ctx'> 	WX_STAT("fdir_miss", stats.fdirmiss),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct wx_stats wx_gstrings_rsc_stats[] = {</div><div class='add'>+	WX_STAT("rsc_aggregated", rsc_count),</div><div class='add'>+	WX_STAT("rsc_flushed", rsc_flush),</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* drivers allocates num_tx_queues and num_rx_queues symmetrically so</div><div class='ctx'>  * we set the num_rx_queues to evaluate to num_tx_queues. This is</div><div class='ctx'>  * used because we do not have a good way to get the max number of</div><div class='hunk'>@@ -61,16 +69,21 @@ static const struct wx_stats wx_gstrings_fdir_stats[] = {</div><div class='ctx'> 		(sizeof(struct wx_queue_stats) / sizeof(u64)))</div><div class='ctx'> #define WX_GLOBAL_STATS_LEN  ARRAY_SIZE(wx_gstrings_stats)</div><div class='ctx'> #define WX_FDIR_STATS_LEN  ARRAY_SIZE(wx_gstrings_fdir_stats)</div><div class='add'>+#define WX_RSC_STATS_LEN  ARRAY_SIZE(wx_gstrings_rsc_stats)</div><div class='ctx'> #define WX_STATS_LEN (WX_GLOBAL_STATS_LEN + WX_QUEUE_STATS_LEN)</div><div class='ctx'> </div><div class='ctx'> int wx_get_sset_count(struct net_device *netdev, int sset)</div><div class='ctx'> {</div><div class='ctx'> 	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+	int len = WX_STATS_LEN;</div><div class='ctx'> </div><div class='ctx'> 	switch (sset) {</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='del'>-		return (wx-&gt;mac.type == wx_mac_sp) ?</div><div class='del'>-			WX_STATS_LEN + WX_FDIR_STATS_LEN : WX_STATS_LEN;</div><div class='add'>+		if (test_bit(WX_FLAG_FDIR_CAPABLE, wx-&gt;flags))</div><div class='add'>+			len += WX_FDIR_STATS_LEN;</div><div class='add'>+		if (test_bit(WX_FLAG_RSC_CAPABLE, wx-&gt;flags))</div><div class='add'>+			len += WX_RSC_STATS_LEN;</div><div class='add'>+		return len;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -87,10 +100,14 @@ void wx_get_strings(struct net_device *netdev, u32 stringset, u8 *data)</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='ctx'> 		for (i = 0; i &lt; WX_GLOBAL_STATS_LEN; i++)</div><div class='ctx'> 			ethtool_puts(&amp;p, wx_gstrings_stats[i].stat_string);</div><div class='del'>-		if (wx-&gt;mac.type == wx_mac_sp) {</div><div class='add'>+		if (test_bit(WX_FLAG_FDIR_CAPABLE, wx-&gt;flags)) {</div><div class='ctx'> 			for (i = 0; i &lt; WX_FDIR_STATS_LEN; i++)</div><div class='ctx'> 				ethtool_puts(&amp;p, wx_gstrings_fdir_stats[i].stat_string);</div><div class='ctx'> 		}</div><div class='add'>+		if (test_bit(WX_FLAG_RSC_CAPABLE, wx-&gt;flags)) {</div><div class='add'>+			for (i = 0; i &lt; WX_RSC_STATS_LEN; i++)</div><div class='add'>+				ethtool_puts(&amp;p, wx_gstrings_rsc_stats[i].stat_string);</div><div class='add'>+		}</div><div class='ctx'> 		for (i = 0; i &lt; netdev-&gt;num_tx_queues; i++) {</div><div class='ctx'> 			ethtool_sprintf(&amp;p, "tx_queue_%u_packets", i);</div><div class='ctx'> 			ethtool_sprintf(&amp;p, "tx_queue_%u_bytes", i);</div><div class='hunk'>@@ -121,13 +138,20 @@ void wx_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 			   sizeof(u64)) ? *(u64 *)p : *(u32 *)p;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp) {</div><div class='add'>+	if (test_bit(WX_FLAG_FDIR_CAPABLE, wx-&gt;flags)) {</div><div class='ctx'> 		for (k = 0; k &lt; WX_FDIR_STATS_LEN; k++) {</div><div class='ctx'> 			p = (char *)wx + wx_gstrings_fdir_stats[k].stat_offset;</div><div class='ctx'> 			data[i++] = *(u64 *)p;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (test_bit(WX_FLAG_RSC_CAPABLE, wx-&gt;flags)) {</div><div class='add'>+		for (k = 0; k &lt; WX_RSC_STATS_LEN; k++) {</div><div class='add'>+			p = (char *)wx + wx_gstrings_rsc_stats[k].stat_offset;</div><div class='add'>+			data[i++] = *(u64 *)p;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (j = 0; j &lt; netdev-&gt;num_tx_queues; j++) {</div><div class='ctx'> 		ring = wx-&gt;tx_ring[j];</div><div class='ctx'> 		if (!ring) {</div><div class='hunk'>@@ -196,7 +220,7 @@ void wx_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info)</div><div class='ctx'> 	unsigned int stats_len = WX_STATS_LEN;</div><div class='ctx'> 	struct wx *wx = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp)</div><div class='add'>+	if (test_bit(WX_FLAG_FDIR_CAPABLE, wx-&gt;flags))</div><div class='ctx'> 		stats_len += WX_FDIR_STATS_LEN;</div><div class='ctx'> </div><div class='ctx'> 	strscpy(info-&gt;driver, wx-&gt;driver_name, sizeof(info-&gt;driver));</div><div class='hunk'>@@ -288,6 +312,11 @@ int wx_get_coalesce(struct net_device *netdev,</div><div class='ctx'> 	else</div><div class='ctx'> 		ec-&gt;rx_coalesce_usecs = wx-&gt;rx_itr_setting &gt;&gt; 2;</div><div class='ctx'> </div><div class='add'>+	if (wx-&gt;adaptive_itr) {</div><div class='add'>+		ec-&gt;use_adaptive_rx_coalesce = 1;</div><div class='add'>+		ec-&gt;use_adaptive_tx_coalesce = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* if in mixed tx/rx queues per vector mode, report only rx settings */</div><div class='ctx'> 	if (wx-&gt;q_vector[0]-&gt;tx.count &amp;&amp; wx-&gt;q_vector[0]-&gt;rx.count)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -302,6 +331,40 @@ int wx_get_coalesce(struct net_device *netdev,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_get_coalesce);</div><div class='ctx'> </div><div class='add'>+static void wx_update_rsc(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = wx-&gt;netdev;</div><div class='add'>+	bool need_reset = false;</div><div class='add'>+</div><div class='add'>+	/* nothing to do if LRO or RSC are not enabled */</div><div class='add'>+	if (!test_bit(WX_FLAG_RSC_CAPABLE, wx-&gt;flags) ||</div><div class='add'>+	    !(netdev-&gt;features &amp; NETIF_F_LRO))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* check the feature flag value and enable RSC if necessary */</div><div class='add'>+	if (wx-&gt;rx_itr_setting == 1 ||</div><div class='add'>+	    wx-&gt;rx_itr_setting &gt; WX_MIN_RSC_ITR) {</div><div class='add'>+		if (!test_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags)) {</div><div class='add'>+			set_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags);</div><div class='add'>+			dev_info(&amp;wx-&gt;pdev-&gt;dev,</div><div class='add'>+				 "rx-usecs value high enough to re-enable RSC\n");</div><div class='add'>+</div><div class='add'>+			need_reset = true;</div><div class='add'>+		}</div><div class='add'>+	/* if interrupt rate is too high then disable RSC */</div><div class='add'>+	} else if (test_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags)) {</div><div class='add'>+		clear_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags);</div><div class='add'>+		dev_info(&amp;wx-&gt;pdev-&gt;dev,</div><div class='add'>+			 "rx-usecs set too low, disabling RSC\n");</div><div class='add'>+</div><div class='add'>+		need_reset = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* reset the device to apply the new RSC setting */</div><div class='add'>+	if (need_reset &amp;&amp; wx-&gt;do_reset)</div><div class='add'>+		wx-&gt;do_reset(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int wx_set_coalesce(struct net_device *netdev,</div><div class='ctx'> 		    struct ethtool_coalesce *ec,</div><div class='ctx'> 		    struct kernel_ethtool_coalesce *kernel_coal,</div><div class='hunk'>@@ -319,42 +382,66 @@ int wx_set_coalesce(struct net_device *netdev,</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ec-&gt;tx_max_coalesced_frames_irq)</div><div class='del'>-		wx-&gt;tx_work_limit = ec-&gt;tx_max_coalesced_frames_irq;</div><div class='add'>+	if (ec-&gt;tx_max_coalesced_frames_irq &gt; U16_MAX  ||</div><div class='add'>+	    !ec-&gt;tx_max_coalesced_frames_irq)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	wx-&gt;tx_work_limit = ec-&gt;tx_max_coalesced_frames_irq;</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp)</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_sp:</div><div class='ctx'> 		max_eitr = WX_SP_MAX_EITR;</div><div class='del'>-	else</div><div class='add'>+		rx_itr_param = WX_20K_ITR;</div><div class='add'>+		tx_itr_param = WX_12K_ITR;</div><div class='add'>+		break;</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+	case wx_mac_aml40:</div><div class='add'>+		max_eitr = WX_AML_MAX_EITR;</div><div class='add'>+		rx_itr_param = WX_20K_ITR;</div><div class='add'>+		tx_itr_param = WX_12K_ITR;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='ctx'> 		max_eitr = WX_EM_MAX_EITR;</div><div class='add'>+		rx_itr_param = WX_7K_ITR;</div><div class='add'>+		tx_itr_param = WX_7K_ITR;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if ((ec-&gt;rx_coalesce_usecs &gt; (max_eitr &gt;&gt; 2)) ||</div><div class='ctx'> 	    (ec-&gt;tx_coalesce_usecs &gt; (max_eitr &gt;&gt; 2)))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	if (ec-&gt;use_adaptive_rx_coalesce) {</div><div class='add'>+		wx-&gt;adaptive_itr = true;</div><div class='add'>+		wx-&gt;rx_itr_setting = 1;</div><div class='add'>+		wx-&gt;tx_itr_setting = 1;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (ec-&gt;rx_coalesce_usecs &gt; 1)</div><div class='ctx'> 		wx-&gt;rx_itr_setting = ec-&gt;rx_coalesce_usecs &lt;&lt; 2;</div><div class='ctx'> 	else</div><div class='ctx'> 		wx-&gt;rx_itr_setting = ec-&gt;rx_coalesce_usecs;</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;rx_itr_setting == 1)</div><div class='del'>-		rx_itr_param = WX_20K_ITR;</div><div class='del'>-	else</div><div class='del'>-		rx_itr_param = wx-&gt;rx_itr_setting;</div><div class='del'>-</div><div class='ctx'> 	if (ec-&gt;tx_coalesce_usecs &gt; 1)</div><div class='ctx'> 		wx-&gt;tx_itr_setting = ec-&gt;tx_coalesce_usecs &lt;&lt; 2;</div><div class='ctx'> 	else</div><div class='ctx'> 		wx-&gt;tx_itr_setting = ec-&gt;tx_coalesce_usecs;</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;tx_itr_setting == 1) {</div><div class='del'>-		if (wx-&gt;mac.type == wx_mac_sp)</div><div class='del'>-			tx_itr_param = WX_12K_ITR;</div><div class='del'>-		else</div><div class='del'>-			tx_itr_param = WX_20K_ITR;</div><div class='del'>-	} else {</div><div class='del'>-		tx_itr_param = wx-&gt;tx_itr_setting;</div><div class='add'>+	if (wx-&gt;adaptive_itr) {</div><div class='add'>+		wx-&gt;adaptive_itr = false;</div><div class='add'>+		wx-&gt;rx_itr_setting = rx_itr_param;</div><div class='add'>+		wx-&gt;tx_itr_setting = tx_itr_param;</div><div class='add'>+	} else if (wx-&gt;rx_itr_setting == 1 || wx-&gt;tx_itr_setting == 1) {</div><div class='add'>+		wx-&gt;adaptive_itr = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (wx-&gt;rx_itr_setting != 1)</div><div class='add'>+		rx_itr_param = wx-&gt;rx_itr_setting;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;tx_itr_setting != 1)</div><div class='add'>+		tx_itr_param = wx-&gt;tx_itr_setting;</div><div class='add'>+</div><div class='ctx'> 	/* mixed Rx/Tx */</div><div class='ctx'> 	if (wx-&gt;q_vector[0]-&gt;tx.count &amp;&amp; wx-&gt;q_vector[0]-&gt;rx.count)</div><div class='ctx'> 		wx-&gt;tx_itr_setting = wx-&gt;rx_itr_setting;</div><div class='hunk'>@@ -370,6 +457,8 @@ int wx_set_coalesce(struct net_device *netdev,</div><div class='ctx'> 		wx_write_eitr(q_vector);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	wx_update_rsc(wx);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_set_coalesce);</div><div class='hunk'>@@ -383,7 +472,7 @@ static unsigned int wx_max_channels(struct wx *wx)</div><div class='ctx'> 		max_combined = 1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* support up to max allowed queues with RSS */</div><div class='del'>-		if (wx-&gt;mac.type == wx_mac_sp)</div><div class='add'>+		if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags))</div><div class='ctx'> 			max_combined = 63;</div><div class='ctx'> 		else</div><div class='ctx'> 			max_combined = 8;</div><div class='hunk'>@@ -437,6 +526,142 @@ int wx_set_channels(struct net_device *dev,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_set_channels);</div><div class='ctx'> </div><div class='add'>+u32 wx_rss_indir_size(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return wx_rss_indir_tbl_entries(wx);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_rss_indir_size);</div><div class='add'>+</div><div class='add'>+u32 wx_get_rxfh_key_size(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return WX_RSS_KEY_SIZE;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_get_rxfh_key_size);</div><div class='add'>+</div><div class='add'>+static void wx_get_reta(struct wx *wx, u32 *indir)</div><div class='add'>+{</div><div class='add'>+	u32 reta_size = wx_rss_indir_tbl_entries(wx);</div><div class='add'>+	u16 rss_m = wx-&gt;ring_feature[RING_F_RSS].mask;</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags))</div><div class='add'>+		rss_m = wx-&gt;ring_feature[RING_F_RSS].indices - 1;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; reta_size; i++)</div><div class='add'>+		indir[i] = wx-&gt;rss_indir_tbl[i] &amp; rss_m;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wx_get_rxfh(struct net_device *netdev,</div><div class='add'>+		struct ethtool_rxfh_param *rxfh)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;indir)</div><div class='add'>+		wx_get_reta(wx, rxfh-&gt;indir);</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;key)</div><div class='add'>+		memcpy(rxfh-&gt;key, wx-&gt;rss_key, WX_RSS_KEY_SIZE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_get_rxfh);</div><div class='add'>+</div><div class='add'>+int wx_set_rxfh(struct net_device *netdev,</div><div class='add'>+		struct ethtool_rxfh_param *rxfh,</div><div class='add'>+		struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+	u32 reta_entries, i;</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;hfunc != ETH_RSS_HASH_NO_CHANGE &amp;&amp;</div><div class='add'>+	    rxfh-&gt;hfunc != ETH_RSS_HASH_TOP)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	reta_entries = wx_rss_indir_tbl_entries(wx);</div><div class='add'>+	/* Fill out the redirection table */</div><div class='add'>+	if (rxfh-&gt;indir) {</div><div class='add'>+		for (i = 0; i &lt; reta_entries; i++)</div><div class='add'>+			wx-&gt;rss_indir_tbl[i] = rxfh-&gt;indir[i];</div><div class='add'>+</div><div class='add'>+		wx_store_reta(wx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Fill out the rss hash key */</div><div class='add'>+	if (rxfh-&gt;key) {</div><div class='add'>+		memcpy(wx-&gt;rss_key, rxfh-&gt;key, WX_RSS_KEY_SIZE);</div><div class='add'>+		wx_store_rsskey(wx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_set_rxfh);</div><div class='add'>+</div><div class='add'>+static const struct wx_rss_flow_map rss_flow_table[] = {</div><div class='add'>+	{ TCP_V4_FLOW, RXH_L4_B_0_1 | RXH_L4_B_2_3, WX_RSS_FIELD_IPV4_TCP },</div><div class='add'>+	{ TCP_V6_FLOW, RXH_L4_B_0_1 | RXH_L4_B_2_3, WX_RSS_FIELD_IPV6_TCP },</div><div class='add'>+	{ UDP_V4_FLOW, RXH_L4_B_0_1 | RXH_L4_B_2_3, WX_RSS_FIELD_IPV4_UDP },</div><div class='add'>+	{ UDP_V6_FLOW, RXH_L4_B_0_1 | RXH_L4_B_2_3, WX_RSS_FIELD_IPV6_UDP },</div><div class='add'>+	{ SCTP_V4_FLOW, RXH_L4_B_0_1 | RXH_L4_B_2_3, WX_RSS_FIELD_IPV4_SCTP },</div><div class='add'>+	{ SCTP_V6_FLOW, RXH_L4_B_0_1 | RXH_L4_B_2_3, WX_RSS_FIELD_IPV6_SCTP },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int wx_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+		       struct ethtool_rxfh_fields *nfc)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	nfc-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; ARRAY_SIZE(rss_flow_table); i++) {</div><div class='add'>+		const struct wx_rss_flow_map *entry = &amp;rss_flow_table[i];</div><div class='add'>+</div><div class='add'>+		if (entry-&gt;flow_type == nfc-&gt;flow_type) {</div><div class='add'>+			if (wx-&gt;rss_flags &amp; entry-&gt;flag)</div><div class='add'>+				nfc-&gt;data |= entry-&gt;data;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_get_rxfh_fields);</div><div class='add'>+</div><div class='add'>+int wx_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+		       const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(dev);</div><div class='add'>+	u8 flags = wx-&gt;rss_flags;</div><div class='add'>+</div><div class='add'>+	if (!(nfc-&gt;data &amp; RXH_IP_SRC) ||</div><div class='add'>+	    !(nfc-&gt;data &amp; RXH_IP_DST))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (u32 i = 0; i &lt; ARRAY_SIZE(rss_flow_table); i++) {</div><div class='add'>+		const struct wx_rss_flow_map *entry = &amp;rss_flow_table[i];</div><div class='add'>+</div><div class='add'>+		if (entry-&gt;flow_type == nfc-&gt;flow_type) {</div><div class='add'>+			if (nfc-&gt;data &amp; entry-&gt;data)</div><div class='add'>+				flags |= entry-&gt;flag;</div><div class='add'>+			else</div><div class='add'>+				flags &amp;= ~entry-&gt;flag;</div><div class='add'>+</div><div class='add'>+			if (flags != wx-&gt;rss_flags) {</div><div class='add'>+				wx-&gt;rss_flags = flags;</div><div class='add'>+				wx_config_rss_field(wx);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_set_rxfh_fields);</div><div class='add'>+</div><div class='ctx'> u32 wx_get_msglevel(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wx *wx = netdev_priv(netdev);</div><div class='hunk'>@@ -452,3 +677,86 @@ void wx_set_msglevel(struct net_device *netdev, u32 data)</div><div class='ctx'> 	wx-&gt;msg_enable = data;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_set_msglevel);</div><div class='add'>+</div><div class='add'>+int wx_get_ts_info(struct net_device *dev,</div><div class='add'>+		   struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_NONE) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);</div><div class='add'>+</div><div class='add'>+	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |</div><div class='add'>+				SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+				SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+				SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;ptp_clock)</div><div class='add'>+		info-&gt;phc_index = ptp_clock_index(wx-&gt;ptp_clock);</div><div class='add'>+	else</div><div class='add'>+		info-&gt;phc_index = -1;</div><div class='add'>+</div><div class='add'>+	info-&gt;tx_types = BIT(HWTSTAMP_TX_OFF) |</div><div class='add'>+			 BIT(HWTSTAMP_TX_ON);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_get_ts_info);</div><div class='add'>+</div><div class='add'>+void wx_get_ptp_stats(struct net_device *dev,</div><div class='add'>+		      struct ethtool_ts_stats *ts_stats)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;ptp_clock) {</div><div class='add'>+		ts_stats-&gt;pkts = wx-&gt;tx_hwtstamp_pkts;</div><div class='add'>+		ts_stats-&gt;lost = wx-&gt;tx_hwtstamp_timeouts +</div><div class='add'>+				 wx-&gt;tx_hwtstamp_skipped +</div><div class='add'>+				 wx-&gt;rx_hwtstamp_cleared;</div><div class='add'>+		ts_stats-&gt;err = wx-&gt;tx_hwtstamp_errors;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_get_ptp_stats);</div><div class='add'>+</div><div class='add'>+static int wx_get_link_ksettings_vf(struct net_device *netdev,</div><div class='add'>+				    struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	ethtool_link_ksettings_zero_link_mode(cmd, supported);</div><div class='add'>+	cmd-&gt;base.autoneg = AUTONEG_DISABLE;</div><div class='add'>+	cmd-&gt;base.port = PORT_NONE;</div><div class='add'>+	cmd-&gt;base.duplex = DUPLEX_FULL;</div><div class='add'>+	cmd-&gt;base.speed = wx-&gt;speed;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops wx_ethtool_ops_vf = {</div><div class='add'>+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='add'>+				     ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ |</div><div class='add'>+				     ETHTOOL_COALESCE_USE_ADAPTIVE,</div><div class='add'>+	.get_drvinfo		= wx_get_drvinfo,</div><div class='add'>+	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_ringparam		= wx_get_ringparam,</div><div class='add'>+	.get_msglevel		= wx_get_msglevel,</div><div class='add'>+	.get_coalesce		= wx_get_coalesce,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='add'>+	.get_link_ksettings	= wx_get_link_ksettings_vf,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void wx_set_ethtool_ops_vf(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;wx_ethtool_ops_vf;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_set_ethtool_ops_vf);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_ethtool.h b/drivers/net/ethernet/wangxun/libwx/wx_ethtool.h<br/>index 600c3b597d1a..727093970462 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_ethtool.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_ethtool.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_ethtool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_ethtool.h</a></div><div class='hunk'>@@ -38,6 +38,23 @@ void wx_get_channels(struct net_device *dev,</div><div class='ctx'> 		     struct ethtool_channels *ch);</div><div class='ctx'> int wx_set_channels(struct net_device *dev,</div><div class='ctx'> 		    struct ethtool_channels *ch);</div><div class='add'>+u32 wx_rss_indir_size(struct net_device *netdev);</div><div class='add'>+u32 wx_get_rxfh_key_size(struct net_device *netdev);</div><div class='add'>+int wx_get_rxfh(struct net_device *netdev,</div><div class='add'>+		struct ethtool_rxfh_param *rxfh);</div><div class='add'>+int wx_set_rxfh(struct net_device *netdev,</div><div class='add'>+		struct ethtool_rxfh_param *rxfh,</div><div class='add'>+		struct netlink_ext_ack *extack);</div><div class='add'>+int wx_get_rxfh_fields(struct net_device *dev,</div><div class='add'>+		       struct ethtool_rxfh_fields *cmd);</div><div class='add'>+int wx_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+		       const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+		       struct netlink_ext_ack *extack);</div><div class='ctx'> u32 wx_get_msglevel(struct net_device *netdev);</div><div class='ctx'> void wx_set_msglevel(struct net_device *netdev, u32 data);</div><div class='add'>+int wx_get_ts_info(struct net_device *dev,</div><div class='add'>+		   struct kernel_ethtool_ts_info *info);</div><div class='add'>+void wx_get_ptp_stats(struct net_device *dev,</div><div class='add'>+		      struct ethtool_ts_stats *ts_stats);</div><div class='add'>+void wx_set_ethtool_ops_vf(struct net_device *netdev);</div><div class='ctx'> #endif /* _WX_ETHTOOL_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_hw.c b/drivers/net/ethernet/wangxun/libwx/wx_hw.c<br/>index 1bf9c38e4125..58b8300e3d2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_hw.c</a></div><div class='hunk'>@@ -10,6 +10,8 @@</div><div class='ctx'> </div><div class='ctx'> #include "wx_type.h"</div><div class='ctx'> #include "wx_lib.h"</div><div class='add'>+#include "wx_sriov.h"</div><div class='add'>+#include "wx_vf.h"</div><div class='ctx'> #include "wx_hw.h"</div><div class='ctx'> </div><div class='ctx'> static int wx_phy_read_reg_mdi(struct mii_bus *bus, int phy_addr, int devnum, int regnum)</div><div class='hunk'>@@ -112,7 +114,7 @@ static void wx_intr_disable(struct wx *wx, u64 qmask)</div><div class='ctx'> 	if (mask)</div><div class='ctx'> 		wr32(wx, WX_PX_IMS(0), mask);</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp) {</div><div class='add'>+	if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='ctx'> 		mask = (qmask &gt;&gt; 32);</div><div class='ctx'> 		if (mask)</div><div class='ctx'> 			wr32(wx, WX_PX_IMS(1), mask);</div><div class='hunk'>@@ -123,10 +125,16 @@ void wx_intr_enable(struct wx *wx, u64 qmask)</div><div class='ctx'> {</div><div class='ctx'> 	u32 mask;</div><div class='ctx'> </div><div class='add'>+	if (wx-&gt;pdev-&gt;is_virtfn) {</div><div class='add'>+		wr32(wx, WX_VXIMC, qmask);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mask = (qmask &amp; U32_MAX);</div><div class='ctx'> 	if (mask)</div><div class='ctx'> 		wr32(wx, WX_PX_IMC(0), mask);</div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp) {</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='ctx'> 		mask = (qmask &gt;&gt; 32);</div><div class='ctx'> 		if (mask)</div><div class='ctx'> 			wr32(wx, WX_PX_IMC(1), mask);</div><div class='hunk'>@@ -278,22 +286,8 @@ static int wx_acquire_sw_sync(struct wx *wx, u32 mask)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- *  wx_host_interface_command - Issue command to manageability block</div><div class='del'>- *  @wx: pointer to the HW structure</div><div class='del'>- *  @buffer: contains the command to write and where the return status will</div><div class='del'>- *   be placed</div><div class='del'>- *  @length: length of buffer, must be multiple of 4 bytes</div><div class='del'>- *  @timeout: time in ms to wait for command completion</div><div class='del'>- *  @return_data: read and return data from the buffer (true) or not (false)</div><div class='del'>- *   Needed because FW structures are big endian and decoding of</div><div class='del'>- *   these fields can be 8 bit or 16 bit based on command. Decoding</div><div class='del'>- *   is not easily understood without making a table of commands.</div><div class='del'>- *   So we will leave this up to the caller to read back the data</div><div class='del'>- *   in these cases.</div><div class='del'>- **/</div><div class='del'>-int wx_host_interface_command(struct wx *wx, u32 *buffer,</div><div class='del'>-			      u32 length, u32 timeout, bool return_data)</div><div class='add'>+static int wx_host_interface_command_s(struct wx *wx, u32 *buffer,</div><div class='add'>+				       u32 length, u32 timeout, bool return_data)</div><div class='ctx'> {</div><div class='ctx'> 	u32 hdr_size = sizeof(struct wx_hic_hdr);</div><div class='ctx'> 	u32 hicr, i, bi, buf[64] = {};</div><div class='hunk'>@@ -301,22 +295,10 @@ int wx_host_interface_command(struct wx *wx, u32 *buffer,</div><div class='ctx'> 	u32 dword_len;</div><div class='ctx'> 	u16 buf_len;</div><div class='ctx'> </div><div class='del'>-	if (length == 0 || length &gt; WX_HI_MAX_BLOCK_BYTE_LENGTH) {</div><div class='del'>-		wx_err(wx, "Buffer length failure buffersize=%d.\n", length);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	status = wx_acquire_sw_sync(wx, WX_MNG_SWFW_SYNC_SW_MB);</div><div class='ctx'> 	if (status != 0)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	/* Calculate length in DWORDs. We must be DWORD aligned */</div><div class='del'>-	if ((length % (sizeof(u32))) != 0) {</div><div class='del'>-		wx_err(wx, "Buffer length failure, not aligned to dword");</div><div class='del'>-		status = -EINVAL;</div><div class='del'>-		goto rel_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	dword_len = length &gt;&gt; 2;</div><div class='ctx'> </div><div class='ctx'> 	/* The device driver writes the relevant command block</div><div class='hunk'>@@ -334,27 +316,25 @@ int wx_host_interface_command(struct wx *wx, u32 *buffer,</div><div class='ctx'> 	status = read_poll_timeout(rd32, hicr, hicr &amp; WX_MNG_MBOX_CTL_FWRDY, 1000,</div><div class='ctx'> 				   timeout * 1000, false, wx, WX_MNG_MBOX_CTL);</div><div class='ctx'> </div><div class='add'>+	buf[0] = rd32(wx, WX_MNG_MBOX);</div><div class='add'>+	if ((buf[0] &amp; 0xff0000) &gt;&gt; 16 == 0x80) {</div><div class='add'>+		wx_err(wx, "Unknown FW command: 0x%x\n", buffer[0] &amp; 0xff);</div><div class='add'>+		status = -EINVAL;</div><div class='add'>+		goto rel_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Check command completion */</div><div class='ctx'> 	if (status) {</div><div class='del'>-		wx_dbg(wx, "Command has failed with no status valid.\n");</div><div class='del'>-</div><div class='del'>-		buf[0] = rd32(wx, WX_MNG_MBOX);</div><div class='del'>-		if ((buffer[0] &amp; 0xff) != (~buf[0] &gt;&gt; 24)) {</div><div class='del'>-			status = -EINVAL;</div><div class='del'>-			goto rel_out;</div><div class='del'>-		}</div><div class='del'>-		if ((buf[0] &amp; 0xff0000) &gt;&gt; 16 == 0x80) {</div><div class='del'>-			wx_dbg(wx, "It's unknown cmd.\n");</div><div class='del'>-			status = -EINVAL;</div><div class='del'>-			goto rel_out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+		wx_err(wx, "Command has failed with no status valid.\n");</div><div class='ctx'> 		wx_dbg(wx, "write value:\n");</div><div class='ctx'> 		for (i = 0; i &lt; dword_len; i++)</div><div class='ctx'> 			wx_dbg(wx, "%x ", buffer[i]);</div><div class='ctx'> 		wx_dbg(wx, "read value:\n");</div><div class='ctx'> 		for (i = 0; i &lt; dword_len; i++)</div><div class='ctx'> 			wx_dbg(wx, "%x ", buf[i]);</div><div class='add'>+		wx_dbg(wx, "\ncheck: %x %x\n", buffer[0] &amp; 0xff, ~buf[0] &gt;&gt; 24);</div><div class='add'>+</div><div class='add'>+		goto rel_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!return_data)</div><div class='hunk'>@@ -393,8 +373,166 @@ rel_out:</div><div class='ctx'> 	wx_release_sw_sync(wx, WX_MNG_SWFW_SYNC_SW_MB);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static bool wx_poll_fw_reply(struct wx *wx, u32 *buffer, u8 send_cmd)</div><div class='add'>+{</div><div class='add'>+	u32 dword_len = sizeof(struct wx_hic_hdr) &gt;&gt; 2;</div><div class='add'>+	struct wx_hic_hdr *recv_hdr;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	/* read hdr */</div><div class='add'>+	for (i = 0; i &lt; dword_len; i++) {</div><div class='add'>+		buffer[i] = rd32a(wx, WX_FW2SW_MBOX, i);</div><div class='add'>+		le32_to_cpus(&amp;buffer[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check hdr */</div><div class='add'>+	recv_hdr = (struct wx_hic_hdr *)buffer;</div><div class='add'>+	if (recv_hdr-&gt;cmd == send_cmd &amp;&amp;</div><div class='add'>+	    recv_hdr-&gt;index == wx-&gt;swfw_index)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_host_interface_command_r(struct wx *wx, u32 *buffer,</div><div class='add'>+				       u32 length, u32 timeout, bool return_data)</div><div class='add'>+{</div><div class='add'>+	struct wx_hic_hdr *hdr = (struct wx_hic_hdr *)buffer;</div><div class='add'>+	u32 hdr_size = sizeof(struct wx_hic_hdr);</div><div class='add'>+	bool busy, reply;</div><div class='add'>+	u32 dword_len;</div><div class='add'>+	u16 buf_len;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u8 send_cmd;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	/* wait to get lock */</div><div class='add'>+	might_sleep();</div><div class='add'>+	err = read_poll_timeout(test_and_set_bit, busy, !busy, 1000, timeout * 1000,</div><div class='add'>+				false, WX_STATE_SWFW_BUSY, wx-&gt;state);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* index to unique seq id for each mbox message */</div><div class='add'>+	hdr-&gt;index = wx-&gt;swfw_index;</div><div class='add'>+	send_cmd = hdr-&gt;cmd;</div><div class='add'>+</div><div class='add'>+	dword_len = length &gt;&gt; 2;</div><div class='add'>+	/* write data to SW-FW mbox array */</div><div class='add'>+	for (i = 0; i &lt; dword_len; i++) {</div><div class='add'>+		wr32a(wx, WX_SW2FW_MBOX, i, (__force u32)cpu_to_le32(buffer[i]));</div><div class='add'>+		/* write flush */</div><div class='add'>+		rd32a(wx, WX_SW2FW_MBOX, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* generate interrupt to notify FW */</div><div class='add'>+	wr32m(wx, WX_SW2FW_MBOX_CMD, WX_SW2FW_MBOX_CMD_VLD, 0);</div><div class='add'>+	wr32m(wx, WX_SW2FW_MBOX_CMD, WX_SW2FW_MBOX_CMD_VLD, WX_SW2FW_MBOX_CMD_VLD);</div><div class='add'>+</div><div class='add'>+	/* polling reply from FW */</div><div class='add'>+	err = read_poll_timeout(wx_poll_fw_reply, reply, reply, 2000,</div><div class='add'>+				timeout * 1000, true, wx, buffer, send_cmd);</div><div class='add'>+	if (err) {</div><div class='add'>+		wx_err(wx, "Polling from FW messages timeout, cmd: 0x%x, index: %d\n",</div><div class='add'>+		       send_cmd, wx-&gt;swfw_index);</div><div class='add'>+		goto rel_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hdr-&gt;cmd_or_resp.ret_status == 0x80) {</div><div class='add'>+		wx_err(wx, "Unknown FW command: 0x%x\n", send_cmd);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto rel_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* expect no reply from FW then return */</div><div class='add'>+	if (!return_data)</div><div class='add'>+		goto rel_out;</div><div class='add'>+</div><div class='add'>+	/* If there is any thing in data position pull it in */</div><div class='add'>+	buf_len = hdr-&gt;buf_len;</div><div class='add'>+	if (buf_len == 0)</div><div class='add'>+		goto rel_out;</div><div class='add'>+</div><div class='add'>+	if (length &lt; buf_len + hdr_size) {</div><div class='add'>+		wx_err(wx, "Buffer not large enough for reply message.\n");</div><div class='add'>+		err = -EFAULT;</div><div class='add'>+		goto rel_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate length in DWORDs, add 3 for odd lengths */</div><div class='add'>+	dword_len = (buf_len + 3) &gt;&gt; 2;</div><div class='add'>+	for (i = hdr_size &gt;&gt; 2; i &lt;= dword_len; i++) {</div><div class='add'>+		buffer[i] = rd32a(wx, WX_FW2SW_MBOX, i);</div><div class='add'>+		le32_to_cpus(&amp;buffer[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+rel_out:</div><div class='add'>+	/* index++, index replace wx_hic_hdr.checksum */</div><div class='add'>+	if (wx-&gt;swfw_index == WX_HIC_HDR_INDEX_MAX)</div><div class='add'>+		wx-&gt;swfw_index = 0;</div><div class='add'>+	else</div><div class='add'>+		wx-&gt;swfw_index++;</div><div class='add'>+</div><div class='add'>+	clear_bit(WX_STATE_SWFW_BUSY, wx-&gt;state);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_host_interface_command - Issue command to manageability block</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @buffer: contains the command to write and where the return status will</div><div class='add'>+ *   be placed</div><div class='add'>+ *  @length: length of buffer, must be multiple of 4 bytes</div><div class='add'>+ *  @timeout: time in ms to wait for command completion</div><div class='add'>+ *  @return_data: read and return data from the buffer (true) or not (false)</div><div class='add'>+ *   Needed because FW structures are big endian and decoding of</div><div class='add'>+ *   these fields can be 8 bit or 16 bit based on command. Decoding</div><div class='add'>+ *   is not easily understood without making a table of commands.</div><div class='add'>+ *   So we will leave this up to the caller to read back the data</div><div class='add'>+ *   in these cases.</div><div class='add'>+ **/</div><div class='add'>+int wx_host_interface_command(struct wx *wx, u32 *buffer,</div><div class='add'>+			      u32 length, u32 timeout, bool return_data)</div><div class='add'>+{</div><div class='add'>+	if (length == 0 || length &gt; WX_HI_MAX_BLOCK_BYTE_LENGTH) {</div><div class='add'>+		wx_err(wx, "Buffer length failure buffersize=%d.\n", length);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate length in DWORDs. We must be DWORD aligned */</div><div class='add'>+	if ((length % (sizeof(u32))) != 0) {</div><div class='add'>+		wx_err(wx, "Buffer length failure, not aligned to dword");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_FLAG_SWFW_RING, wx-&gt;flags))</div><div class='add'>+		return wx_host_interface_command_r(wx, buffer, length,</div><div class='add'>+						   timeout, return_data);</div><div class='add'>+</div><div class='add'>+	return wx_host_interface_command_s(wx, buffer, length, timeout, return_data);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL(wx_host_interface_command);</div><div class='ctx'> </div><div class='add'>+int wx_set_pps(struct wx *wx, bool enable, u64 nsec, u64 cycles)</div><div class='add'>+{</div><div class='add'>+	struct wx_hic_set_pps pps_cmd;</div><div class='add'>+</div><div class='add'>+	pps_cmd.hdr.cmd = FW_PPS_SET_CMD;</div><div class='add'>+	pps_cmd.hdr.buf_len = FW_PPS_SET_LEN;</div><div class='add'>+	pps_cmd.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED;</div><div class='add'>+	pps_cmd.lan_id = wx-&gt;bus.func;</div><div class='add'>+	pps_cmd.enable = (u8)enable;</div><div class='add'>+	pps_cmd.nsec = nsec;</div><div class='add'>+	pps_cmd.cycles = cycles;</div><div class='add'>+	pps_cmd.hdr.checksum = FW_DEFAULT_CHECKSUM;</div><div class='add'>+</div><div class='add'>+	return wx_host_interface_command(wx, (u32 *)&amp;pps_cmd,</div><div class='add'>+					 sizeof(pps_cmd),</div><div class='add'>+					 WX_HI_COMMAND_TIMEOUT,</div><div class='add'>+					 false);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  *  wx_read_ee_hostif_data - Read EEPROM word using a host interface cmd</div><div class='ctx'>  *  assuming that the semaphore is already obtained.</div><div class='hunk'>@@ -425,7 +563,10 @@ static int wx_read_ee_hostif_data(struct wx *wx, u16 offset, u16 *data)</div><div class='ctx'> 	if (status != 0)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	*data = (u16)rd32a(wx, WX_MNG_MBOX, FW_NVM_DATA_OFFSET);</div><div class='add'>+	if (!test_bit(WX_FLAG_SWFW_RING, wx-&gt;flags))</div><div class='add'>+		*data = (u16)rd32a(wx, WX_MNG_MBOX, FW_NVM_DATA_OFFSET);</div><div class='add'>+	else</div><div class='add'>+		*data = (u16)rd32a(wx, WX_FW2SW_MBOX, FW_NVM_DATA_OFFSET);</div><div class='ctx'> </div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -469,6 +610,7 @@ int wx_read_ee_hostif_buffer(struct wx *wx,</div><div class='ctx'> 	u16 words_to_read;</div><div class='ctx'> 	u32 value = 0;</div><div class='ctx'> 	int status;</div><div class='add'>+	u32 mbox;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	/* Take semaphore for the entire operation. */</div><div class='hunk'>@@ -501,8 +643,12 @@ int wx_read_ee_hostif_buffer(struct wx *wx,</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (!test_bit(WX_FLAG_SWFW_RING, wx-&gt;flags))</div><div class='add'>+			mbox = WX_MNG_MBOX;</div><div class='add'>+		else</div><div class='add'>+			mbox = WX_FW2SW_MBOX;</div><div class='ctx'> 		for (i = 0; i &lt; words_to_read; i++) {</div><div class='del'>-			u32 reg = WX_MNG_MBOX + (FW_NVM_DATA_OFFSET &lt;&lt; 2) + 2 * i;</div><div class='add'>+			u32 reg = mbox + (FW_NVM_DATA_OFFSET &lt;&lt; 2) + 2 * i;</div><div class='ctx'> </div><div class='ctx'> 			value = rd32(wx, reg);</div><div class='ctx'> 			data[current_word] = (u16)(value &amp; 0xffff);</div><div class='hunk'>@@ -552,12 +698,18 @@ void wx_init_eeprom_params(struct wx *wx)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp) {</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_sp:</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+	case wx_mac_aml40:</div><div class='ctx'> 		if (wx_read_ee_hostif(wx, WX_SW_REGION_PTR, &amp;data)) {</div><div class='ctx'> 			wx_err(wx, "NVM Read Error\n");</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		data = data &gt;&gt; 1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	eeprom-&gt;sw_region_offset = data;</div><div class='hunk'>@@ -618,7 +770,8 @@ static int wx_set_rar(struct wx *wx, u32 index, u8 *addr, u64 pools,</div><div class='ctx'> </div><div class='ctx'> 	/* setup VMDq pool mapping */</div><div class='ctx'> 	wr32(wx, WX_PSR_MAC_SWC_VM_L, pools &amp; 0xFFFFFFFF);</div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp)</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags))</div><div class='ctx'> 		wr32(wx, WX_PSR_MAC_SWC_VM_H, pools &gt;&gt; 32);</div><div class='ctx'> </div><div class='ctx'> 	/* HW expects these in little endian so we reverse the byte</div><div class='hunk'>@@ -757,7 +910,7 @@ void wx_init_rx_addrs(struct wx *wx)</div><div class='ctx'> </div><div class='ctx'> 		wx_set_rar(wx, 0, wx-&gt;mac.addr, 0, WX_PSR_MAC_SWC_AD_H_AV);</div><div class='ctx'> </div><div class='del'>-		if (wx-&gt;mac.type == wx_mac_sp) {</div><div class='add'>+		if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='ctx'> 			/* clear VMDq pool/queue selection for RAR 0 */</div><div class='ctx'> 			wx_clear_vmdq(wx, 0, WX_CLEAR_VMDQ_ALL);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -804,11 +957,28 @@ static void wx_sync_mac_table(struct wx *wx)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wx_full_sync_mac_table(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;mac.num_rar_entries; i++) {</div><div class='add'>+		if (wx-&gt;mac_table[i].state &amp; WX_MAC_STATE_IN_USE) {</div><div class='add'>+			wx_set_rar(wx, i,</div><div class='add'>+				   wx-&gt;mac_table[i].addr,</div><div class='add'>+				   wx-&gt;mac_table[i].pools,</div><div class='add'>+				   WX_PSR_MAC_SWC_AD_H_AV);</div><div class='add'>+		} else {</div><div class='add'>+			wx_clear_rar(wx, i);</div><div class='add'>+		}</div><div class='add'>+		wx-&gt;mac_table[i].state &amp;= ~(WX_MAC_STATE_MODIFIED);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* this function destroys the first RAR entry */</div><div class='ctx'> void wx_mac_set_default_filter(struct wx *wx, u8 *addr)</div><div class='ctx'> {</div><div class='ctx'> 	memcpy(&amp;wx-&gt;mac_table[0].addr, addr, ETH_ALEN);</div><div class='del'>-	wx-&gt;mac_table[0].pools = 1ULL;</div><div class='add'>+	wx-&gt;mac_table[0].pools = BIT(VMDQ_P(0));</div><div class='ctx'> 	wx-&gt;mac_table[0].state = (WX_MAC_STATE_DEFAULT | WX_MAC_STATE_IN_USE);</div><div class='ctx'> 	wx_set_rar(wx, 0, wx-&gt;mac_table[0].addr,</div><div class='ctx'> 		   wx-&gt;mac_table[0].pools,</div><div class='hunk'>@@ -833,7 +1003,7 @@ void wx_flush_sw_mac_table(struct wx *wx)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_flush_sw_mac_table);</div><div class='ctx'> </div><div class='del'>-static int wx_add_mac_filter(struct wx *wx, u8 *addr, u16 pool)</div><div class='add'>+int wx_add_mac_filter(struct wx *wx, u8 *addr, u16 pool)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='hunk'>@@ -864,7 +1034,7 @@ static int wx_add_mac_filter(struct wx *wx, u8 *addr, u16 pool)</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wx_del_mac_filter(struct wx *wx, u8 *addr, u16 pool)</div><div class='add'>+int wx_del_mac_filter(struct wx *wx, u8 *addr, u16 pool)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='hunk'>@@ -943,7 +1113,7 @@ static int wx_write_uc_addr_list(struct net_device *netdev, int pool)</div><div class='ctx'>  *  by the MO field of the MCSTCTRL. The MO field is set during initialization</div><div class='ctx'>  *  to mc_filter_type.</div><div class='ctx'>  **/</div><div class='del'>-static u32 wx_mta_vector(struct wx *wx, u8 *mc_addr)</div><div class='add'>+u32 wx_mta_vector(struct wx *wx, u8 *mc_addr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 vector = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1046,6 +1216,35 @@ static void wx_update_mc_addr_list(struct wx *wx, struct net_device *netdev)</div><div class='ctx'> 	wx_dbg(wx, "Update mc addr list Complete\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wx_restore_vf_multicasts(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 i, j, vector_bit, vector_reg;</div><div class='add'>+	struct vf_data_storage *vfinfo;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;num_vfs; i++) {</div><div class='add'>+		u32 vmolr = rd32(wx, WX_PSR_VM_L2CTL(i));</div><div class='add'>+</div><div class='add'>+		vfinfo = &amp;wx-&gt;vfinfo[i];</div><div class='add'>+		for (j = 0; j &lt; vfinfo-&gt;num_vf_mc_hashes; j++) {</div><div class='add'>+			wx-&gt;addr_ctrl.mta_in_use++;</div><div class='add'>+			vector_reg = WX_PSR_MC_TBL_REG(vfinfo-&gt;vf_mc_hashes[j]);</div><div class='add'>+			vector_bit = WX_PSR_MC_TBL_BIT(vfinfo-&gt;vf_mc_hashes[j]);</div><div class='add'>+			wr32m(wx, WX_PSR_MC_TBL(vector_reg),</div><div class='add'>+			      BIT(vector_bit), BIT(vector_bit));</div><div class='add'>+			/* errata 5: maintain a copy of the reg table conf */</div><div class='add'>+			wx-&gt;mac.mta_shadow[vector_reg] |= BIT(vector_bit);</div><div class='add'>+		}</div><div class='add'>+		if (vfinfo-&gt;num_vf_mc_hashes)</div><div class='add'>+			vmolr |= WX_PSR_VM_L2CTL_ROMPE;</div><div class='add'>+		else</div><div class='add'>+			vmolr &amp;= ~WX_PSR_VM_L2CTL_ROMPE;</div><div class='add'>+		wr32(wx, WX_PSR_VM_L2CTL(i), vmolr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Restore any VF macvlans */</div><div class='add'>+	wx_full_sync_mac_table(wx);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * wx_write_mc_addr_list - write multicast addresses to MTA</div><div class='ctx'>  * @netdev: network interface device structure</div><div class='hunk'>@@ -1063,6 +1262,9 @@ static int wx_write_mc_addr_list(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	wx_update_mc_addr_list(wx, netdev);</div><div class='ctx'> </div><div class='add'>+	if (test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags))</div><div class='add'>+		wx_restore_vf_multicasts(wx);</div><div class='add'>+</div><div class='ctx'> 	return netdev_mc_count(netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1083,7 +1285,7 @@ int wx_set_mac(struct net_device *netdev, void *p)</div><div class='ctx'> 	if (retval)</div><div class='ctx'> 		return retval;</div><div class='ctx'> </div><div class='del'>-	wx_del_mac_filter(wx, wx-&gt;mac.addr, 0);</div><div class='add'>+	wx_del_mac_filter(wx, wx-&gt;mac.addr, VMDQ_P(0));</div><div class='ctx'> 	eth_hw_addr_set(netdev, addr-&gt;sa_data);</div><div class='ctx'> 	memcpy(wx-&gt;mac.addr, addr-&gt;sa_data, netdev-&gt;addr_len);</div><div class='ctx'> </div><div class='hunk'>@@ -1185,6 +1387,10 @@ static int wx_hpbthresh(struct wx *wx)</div><div class='ctx'> 	/* Calculate delay value for device */</div><div class='ctx'> 	dv_id = WX_DV(link, tc);</div><div class='ctx'> </div><div class='add'>+	/* Loopback switch introduces additional latency */</div><div class='add'>+	if (test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags))</div><div class='add'>+		dv_id += WX_B2BT(tc);</div><div class='add'>+</div><div class='ctx'> 	/* Delay value is calculated in bit times convert to KB */</div><div class='ctx'> 	kb = WX_BT2KB(dv_id);</div><div class='ctx'> 	rx_pba = rd32(wx, WX_RDB_PB_SZ(0)) &gt;&gt; WX_RDB_PB_SZ_SHIFT;</div><div class='hunk'>@@ -1240,12 +1446,107 @@ static void wx_pbthresh_setup(struct wx *wx)</div><div class='ctx'> 		wx-&gt;fc.low_water = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wx_set_ethertype_anti_spoofing(struct wx *wx, bool enable, int vf)</div><div class='add'>+{</div><div class='add'>+	u32 pfvfspoof, reg_offset, vf_shift;</div><div class='add'>+</div><div class='add'>+	vf_shift = WX_VF_IND_SHIFT(vf);</div><div class='add'>+	reg_offset = WX_VF_REG_OFFSET(vf);</div><div class='add'>+</div><div class='add'>+	pfvfspoof = rd32(wx, WX_TDM_ETYPE_AS(reg_offset));</div><div class='add'>+	if (enable)</div><div class='add'>+		pfvfspoof |= BIT(vf_shift);</div><div class='add'>+	else</div><div class='add'>+		pfvfspoof &amp;= ~BIT(vf_shift);</div><div class='add'>+	wr32(wx, WX_TDM_ETYPE_AS(reg_offset), pfvfspoof);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wx_set_vf_spoofchk(struct net_device *netdev, int vf, bool setting)</div><div class='add'>+{</div><div class='add'>+	u32 index = WX_VF_REG_OFFSET(vf), vf_bit = WX_VF_IND_SHIFT(vf);</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+	u32 regval;</div><div class='add'>+</div><div class='add'>+	if (vf &gt;= wx-&gt;num_vfs)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	wx-&gt;vfinfo[vf].spoofchk_enabled = setting;</div><div class='add'>+</div><div class='add'>+	regval = (setting &lt;&lt; vf_bit);</div><div class='add'>+	wr32m(wx, WX_TDM_MAC_AS(index), regval | BIT(vf_bit), regval);</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;vfinfo[vf].vlan_count)</div><div class='add'>+		wr32m(wx, WX_TDM_VLAN_AS(index), regval | BIT(vf_bit), regval);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_configure_virtualization(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u16 pool = wx-&gt;num_rx_pools;</div><div class='add'>+	u32 reg_offset, vf_shift;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	wr32m(wx, WX_PSR_VM_CTL,</div><div class='add'>+	      WX_PSR_VM_CTL_POOL_MASK | WX_PSR_VM_CTL_REPLEN,</div><div class='add'>+	      FIELD_PREP(WX_PSR_VM_CTL_POOL_MASK, VMDQ_P(0)) |</div><div class='add'>+	      WX_PSR_VM_CTL_REPLEN);</div><div class='add'>+	while (pool--)</div><div class='add'>+		wr32m(wx, WX_PSR_VM_L2CTL(pool),</div><div class='add'>+		      WX_PSR_VM_L2CTL_AUPE, WX_PSR_VM_L2CTL_AUPE);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+		vf_shift = BIT(VMDQ_P(0));</div><div class='add'>+		/* Enable only the PF pools for Tx/Rx */</div><div class='add'>+		wr32(wx, WX_RDM_VF_RE(0), vf_shift);</div><div class='add'>+		wr32(wx, WX_TDM_VF_TE(0), vf_shift);</div><div class='add'>+	} else {</div><div class='add'>+		vf_shift = WX_VF_IND_SHIFT(VMDQ_P(0));</div><div class='add'>+		reg_offset = WX_VF_REG_OFFSET(VMDQ_P(0));</div><div class='add'>+</div><div class='add'>+		/* Enable only the PF pools for Tx/Rx */</div><div class='add'>+		wr32(wx, WX_RDM_VF_RE(reg_offset), GENMASK(31, vf_shift));</div><div class='add'>+		wr32(wx, WX_RDM_VF_RE(reg_offset ^ 1), reg_offset - 1);</div><div class='add'>+		wr32(wx, WX_TDM_VF_TE(reg_offset), GENMASK(31, vf_shift));</div><div class='add'>+		wr32(wx, WX_TDM_VF_TE(reg_offset ^ 1), reg_offset - 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* clear VLAN promisc flag so VFTA will be updated if necessary */</div><div class='add'>+	clear_bit(WX_FLAG_VLAN_PROMISC, wx-&gt;flags);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;num_vfs; i++) {</div><div class='add'>+		if (!wx-&gt;vfinfo[i].spoofchk_enabled)</div><div class='add'>+			wx_set_vf_spoofchk(wx-&gt;netdev, i, false);</div><div class='add'>+		/* enable ethertype anti spoofing if hw supports it */</div><div class='add'>+		wx_set_ethertype_anti_spoofing(wx, true, i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void wx_configure_port(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	u32 value, i;</div><div class='ctx'> </div><div class='del'>-	value = WX_CFG_PORT_CTL_D_VLAN | WX_CFG_PORT_CTL_QINQ;</div><div class='add'>+	if (!test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+		value = (wx-&gt;num_vfs == 0) ?</div><div class='add'>+			WX_CFG_PORT_CTL_NUM_VT_NONE :</div><div class='add'>+			WX_CFG_PORT_CTL_NUM_VT_8;</div><div class='add'>+	} else {</div><div class='add'>+		if (test_bit(WX_FLAG_VMDQ_ENABLED, wx-&gt;flags)) {</div><div class='add'>+			if (wx-&gt;ring_feature[RING_F_RSS].indices == 4)</div><div class='add'>+				value = WX_CFG_PORT_CTL_NUM_VT_32;</div><div class='add'>+			else</div><div class='add'>+				value = WX_CFG_PORT_CTL_NUM_VT_64;</div><div class='add'>+		} else {</div><div class='add'>+			value = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	value |= WX_CFG_PORT_CTL_D_VLAN | WX_CFG_PORT_CTL_QINQ;</div><div class='ctx'> 	wr32m(wx, WX_CFG_PORT_CTL,</div><div class='add'>+	      WX_CFG_PORT_CTL_NUM_VT_MASK |</div><div class='ctx'> 	      WX_CFG_PORT_CTL_D_VLAN |</div><div class='ctx'> 	      WX_CFG_PORT_CTL_QINQ,</div><div class='ctx'> 	      value);</div><div class='hunk'>@@ -1306,6 +1607,83 @@ static void wx_vlan_strip_control(struct wx *wx, bool enable)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wx_vlan_promisc_enable(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 vlnctrl, i, vind, bits, reg_idx;</div><div class='add'>+</div><div class='add'>+	vlnctrl = rd32(wx, WX_PSR_VLAN_CTL);</div><div class='add'>+	if (test_bit(WX_FLAG_VMDQ_ENABLED, wx-&gt;flags)) {</div><div class='add'>+		/* we need to keep the VLAN filter on in SRIOV */</div><div class='add'>+		vlnctrl |= WX_PSR_VLAN_CTL_VFE;</div><div class='add'>+		wr32(wx, WX_PSR_VLAN_CTL, vlnctrl);</div><div class='add'>+	} else {</div><div class='add'>+		vlnctrl &amp;= ~WX_PSR_VLAN_CTL_VFE;</div><div class='add'>+		wr32(wx, WX_PSR_VLAN_CTL, vlnctrl);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	/* We are already in VLAN promisc, nothing to do */</div><div class='add'>+	if (test_bit(WX_FLAG_VLAN_PROMISC, wx-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+	/* Set flag so we don't redo unnecessary work */</div><div class='add'>+	set_bit(WX_FLAG_VLAN_PROMISC, wx-&gt;flags);</div><div class='add'>+	/* Add PF to all active pools */</div><div class='add'>+	for (i = WX_PSR_VLAN_SWC_ENTRIES; --i;) {</div><div class='add'>+		wr32(wx, WX_PSR_VLAN_SWC_IDX, i);</div><div class='add'>+		vind = WX_VF_IND_SHIFT(VMDQ_P(0));</div><div class='add'>+		reg_idx = WX_VF_REG_OFFSET(VMDQ_P(0));</div><div class='add'>+		bits = rd32(wx, WX_PSR_VLAN_SWC_VM(reg_idx));</div><div class='add'>+		bits |= BIT(vind);</div><div class='add'>+		wr32(wx, WX_PSR_VLAN_SWC_VM(reg_idx), bits);</div><div class='add'>+	}</div><div class='add'>+	/* Set all bits in the VLAN filter table array */</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;mac.vft_size; i++)</div><div class='add'>+		wr32(wx, WX_PSR_VLAN_TBL(i), U32_MAX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_scrub_vfta(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 i, vid, bits, vfta, vind, vlvf, reg_idx;</div><div class='add'>+</div><div class='add'>+	for (i = WX_PSR_VLAN_SWC_ENTRIES; --i;) {</div><div class='add'>+		wr32(wx, WX_PSR_VLAN_SWC_IDX, i);</div><div class='add'>+		vlvf = rd32(wx, WX_PSR_VLAN_SWC_IDX);</div><div class='add'>+		/* pull VLAN ID from VLVF */</div><div class='add'>+		vid = vlvf &amp; ~WX_PSR_VLAN_SWC_VIEN;</div><div class='add'>+		if (vlvf &amp; WX_PSR_VLAN_SWC_VIEN) {</div><div class='add'>+			/* if PF is part of this then continue */</div><div class='add'>+			if (test_bit(vid, wx-&gt;active_vlans))</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='add'>+		/* remove PF from the pool */</div><div class='add'>+		vind = WX_VF_IND_SHIFT(VMDQ_P(0));</div><div class='add'>+		reg_idx = WX_VF_REG_OFFSET(VMDQ_P(0));</div><div class='add'>+		bits = rd32(wx, WX_PSR_VLAN_SWC_VM(reg_idx));</div><div class='add'>+		bits &amp;= ~BIT(vind);</div><div class='add'>+		wr32(wx, WX_PSR_VLAN_SWC_VM(reg_idx), bits);</div><div class='add'>+	}</div><div class='add'>+	/* extract values from vft_shadow and write back to VFTA */</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;mac.vft_size; i++) {</div><div class='add'>+		vfta = wx-&gt;mac.vft_shadow[i];</div><div class='add'>+		wr32(wx, WX_PSR_VLAN_TBL(i), vfta);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_vlan_promisc_disable(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 vlnctrl;</div><div class='add'>+</div><div class='add'>+	/* configure vlan filtering */</div><div class='add'>+	vlnctrl = rd32(wx, WX_PSR_VLAN_CTL);</div><div class='add'>+	vlnctrl |= WX_PSR_VLAN_CTL_VFE;</div><div class='add'>+	wr32(wx, WX_PSR_VLAN_CTL, vlnctrl);</div><div class='add'>+	/* We are not in VLAN promisc, nothing to do */</div><div class='add'>+	if (!test_bit(WX_FLAG_VLAN_PROMISC, wx-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+	/* Set flag so we don't redo unnecessary work */</div><div class='add'>+	clear_bit(WX_FLAG_VLAN_PROMISC, wx-&gt;flags);</div><div class='add'>+	wx_scrub_vfta(wx);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void wx_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wx *wx = netdev_priv(netdev);</div><div class='hunk'>@@ -1318,7 +1696,7 @@ void wx_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> 	/* Check for Promiscuous and All Multicast modes */</div><div class='ctx'> 	fctrl = rd32(wx, WX_PSR_CTL);</div><div class='ctx'> 	fctrl &amp;= ~(WX_PSR_CTL_UPE | WX_PSR_CTL_MPE);</div><div class='del'>-	vmolr = rd32(wx, WX_PSR_VM_L2CTL(0));</div><div class='add'>+	vmolr = rd32(wx, WX_PSR_VM_L2CTL(VMDQ_P(0)));</div><div class='ctx'> 	vmolr &amp;= ~(WX_PSR_VM_L2CTL_UPE |</div><div class='ctx'> 		   WX_PSR_VM_L2CTL_MPE |</div><div class='ctx'> 		   WX_PSR_VM_L2CTL_ROPE |</div><div class='hunk'>@@ -1339,7 +1717,10 @@ void wx_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> 		fctrl |= WX_PSR_CTL_UPE | WX_PSR_CTL_MPE;</div><div class='ctx'> 		/* pf don't want packets routing to vf, so clear UPE */</div><div class='ctx'> 		vmolr |= WX_PSR_VM_L2CTL_MPE;</div><div class='del'>-		vlnctrl &amp;= ~WX_PSR_VLAN_CTL_VFE;</div><div class='add'>+		if (test_bit(WX_FLAG_VMDQ_ENABLED, wx-&gt;flags) &amp;&amp;</div><div class='add'>+		    test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags))</div><div class='add'>+			vlnctrl |= WX_PSR_VLAN_CTL_VFE;</div><div class='add'>+		features &amp;= ~NETIF_F_HW_VLAN_CTAG_FILTER;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (netdev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='hunk'>@@ -1362,7 +1743,7 @@ void wx_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> 	 * sufficient space to store all the addresses then enable</div><div class='ctx'> 	 * unicast promiscuous mode</div><div class='ctx'> 	 */</div><div class='del'>-	count = wx_write_uc_addr_list(netdev, 0);</div><div class='add'>+	count = wx_write_uc_addr_list(netdev, VMDQ_P(0));</div><div class='ctx'> 	if (count &lt; 0) {</div><div class='ctx'> 		vmolr &amp;= ~WX_PSR_VM_L2CTL_ROPE;</div><div class='ctx'> 		vmolr |= WX_PSR_VM_L2CTL_UPE;</div><div class='hunk'>@@ -1380,7 +1761,7 @@ void wx_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	wr32(wx, WX_PSR_VLAN_CTL, vlnctrl);</div><div class='ctx'> 	wr32(wx, WX_PSR_CTL, fctrl);</div><div class='del'>-	wr32(wx, WX_PSR_VM_L2CTL(0), vmolr);</div><div class='add'>+	wr32(wx, WX_PSR_VM_L2CTL(VMDQ_P(0)), vmolr);</div><div class='ctx'> </div><div class='ctx'> 	if ((features &amp; NETIF_F_HW_VLAN_CTAG_RX) &amp;&amp;</div><div class='ctx'> 	    (features &amp; NETIF_F_HW_VLAN_STAG_RX))</div><div class='hunk'>@@ -1388,13 +1769,19 @@ void wx_set_rx_mode(struct net_device *netdev)</div><div class='ctx'> 	else</div><div class='ctx'> 		wx_vlan_strip_control(wx, false);</div><div class='ctx'> </div><div class='add'>+	if (features &amp; NETIF_F_HW_VLAN_CTAG_FILTER)</div><div class='add'>+		wx_vlan_promisc_disable(wx);</div><div class='add'>+	else</div><div class='add'>+		wx_vlan_promisc_enable(wx);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_set_rx_mode);</div><div class='ctx'> </div><div class='ctx'> static void wx_set_rx_buffer_len(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = wx-&gt;netdev;</div><div class='add'>+	struct wx_ring *rx_ring;</div><div class='ctx'> 	u32 mhadd, max_frame;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	max_frame = netdev-&gt;mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;</div><div class='ctx'> 	/* adjust max frame to be at least the size of a standard frame */</div><div class='hunk'>@@ -1404,6 +1791,19 @@ static void wx_set_rx_buffer_len(struct wx *wx)</div><div class='ctx'> 	mhadd = rd32(wx, WX_PSR_MAX_SZ);</div><div class='ctx'> 	if (max_frame != mhadd)</div><div class='ctx'> 		wr32(wx, WX_PSR_MAX_SZ, max_frame);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Setup the HW Rx Head and Tail Descriptor Pointers and</div><div class='add'>+	 * the Base and Length of the Rx Descriptor Ring</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;num_rx_queues; i++) {</div><div class='add'>+		rx_ring = wx-&gt;rx_ring[i];</div><div class='add'>+		rx_ring-&gt;rx_buf_len = WX_RXBUFFER_2K;</div><div class='add'>+#if (PAGE_SIZE &lt; 8192)</div><div class='add'>+		if (test_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags))</div><div class='add'>+			rx_ring-&gt;rx_buf_len = WX_RXBUFFER_3K;</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1448,7 +1848,7 @@ void wx_disable_rx_queue(struct wx *wx, struct wx_ring *ring)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_disable_rx_queue);</div><div class='ctx'> </div><div class='del'>-static void wx_enable_rx_queue(struct wx *wx, struct wx_ring *ring)</div><div class='add'>+void wx_enable_rx_queue(struct wx *wx, struct wx_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	u8 reg_idx = ring-&gt;reg_idx;</div><div class='ctx'> 	u32 rxdctl;</div><div class='hunk'>@@ -1464,6 +1864,7 @@ static void wx_enable_rx_queue(struct wx *wx, struct wx_ring *ring)</div><div class='ctx'> 		       reg_idx);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(wx_enable_rx_queue);</div><div class='ctx'> </div><div class='ctx'> static void wx_configure_srrctl(struct wx *wx,</div><div class='ctx'> 				struct wx_ring *rx_ring)</div><div class='hunk'>@@ -1479,11 +1880,27 @@ static void wx_configure_srrctl(struct wx *wx,</div><div class='ctx'> 	srrctl |= WX_RXBUFFER_256 &lt;&lt; WX_PX_RR_CFG_BHDRSIZE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	/* configure the packet buffer length */</div><div class='del'>-	srrctl |= WX_RX_BUFSZ &gt;&gt; WX_PX_RR_CFG_BSIZEPKT_SHIFT;</div><div class='add'>+	srrctl |= rx_ring-&gt;rx_buf_len &gt;&gt; WX_PX_RR_CFG_BSIZEPKT_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	wr32(wx, WX_PX_RR_CFG(reg_idx), srrctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wx_configure_rscctl(struct wx *wx,</div><div class='add'>+				struct wx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u8 reg_idx = ring-&gt;reg_idx;</div><div class='add'>+	u32 rscctrl;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rscctrl = rd32(wx, WX_PX_RR_CFG(reg_idx));</div><div class='add'>+	rscctrl |= WX_PX_RR_CFG_RSC;</div><div class='add'>+	rscctrl |= WX_PX_RR_CFG_MAX_RSCBUF_16;</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_PX_RR_CFG(reg_idx), rscctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void wx_configure_tx_ring(struct wx *wx,</div><div class='ctx'> 				 struct wx_ring *ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -1519,6 +1936,15 @@ static void wx_configure_tx_ring(struct wx *wx,</div><div class='ctx'> 	memset(ring-&gt;tx_buffer_info, 0,</div><div class='ctx'> 	       sizeof(struct wx_tx_buffer) * ring-&gt;count);</div><div class='ctx'> </div><div class='add'>+	if (ring-&gt;headwb_mem) {</div><div class='add'>+		wr32(wx, WX_PX_TR_HEAD_ADDRL(reg_idx),</div><div class='add'>+		     ring-&gt;headwb_dma &amp; DMA_BIT_MASK(32));</div><div class='add'>+		wr32(wx, WX_PX_TR_HEAD_ADDRH(reg_idx),</div><div class='add'>+		     upper_32_bits(ring-&gt;headwb_dma));</div><div class='add'>+</div><div class='add'>+		txdctl |= WX_PX_TR_CFG_HEAD_WB;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* enable queue */</div><div class='ctx'> 	wr32(wx, WX_PX_TR_CFG(reg_idx), txdctl);</div><div class='ctx'> </div><div class='hunk'>@@ -1533,7 +1959,6 @@ static void wx_configure_rx_ring(struct wx *wx,</div><div class='ctx'> 				 struct wx_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	u16 reg_idx = ring-&gt;reg_idx;</div><div class='del'>-	union wx_rx_desc *rx_desc;</div><div class='ctx'> 	u64 rdba = ring-&gt;dma;</div><div class='ctx'> 	u32 rxdctl;</div><div class='ctx'> </div><div class='hunk'>@@ -1550,6 +1975,10 @@ static void wx_configure_rx_ring(struct wx *wx,</div><div class='ctx'> 		rxdctl |= (ring-&gt;count / 128) &lt;&lt; WX_PX_RR_CFG_RR_SIZE_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	rxdctl |= 0x1 &lt;&lt; WX_PX_RR_CFG_RR_THER_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_FLAG_RX_MERGE_ENABLED, wx-&gt;flags))</div><div class='add'>+		rxdctl |= WX_PX_RR_CFG_DESC_MERGE;</div><div class='add'>+</div><div class='ctx'> 	wr32(wx, WX_PX_RR_CFG(reg_idx), rxdctl);</div><div class='ctx'> </div><div class='ctx'> 	/* reset head and tail pointers */</div><div class='hunk'>@@ -1558,14 +1987,15 @@ static void wx_configure_rx_ring(struct wx *wx,</div><div class='ctx'> 	ring-&gt;tail = wx-&gt;hw_addr + WX_PX_RR_WP(reg_idx);</div><div class='ctx'> </div><div class='ctx'> 	wx_configure_srrctl(wx, ring);</div><div class='add'>+	wx_configure_rscctl(wx, ring);</div><div class='ctx'> </div><div class='ctx'> 	/* initialize rx_buffer_info */</div><div class='ctx'> 	memset(ring-&gt;rx_buffer_info, 0,</div><div class='ctx'> 	       sizeof(struct wx_rx_buffer) * ring-&gt;count);</div><div class='ctx'> </div><div class='del'>-	/* initialize Rx descriptor 0 */</div><div class='del'>-	rx_desc = WX_RX_DESC(ring, 0);</div><div class='del'>-	rx_desc-&gt;wb.upper.length = 0;</div><div class='add'>+	/* reset ntu and ntc to place SW in sync with hardware */</div><div class='add'>+	ring-&gt;next_to_clean = 0;</div><div class='add'>+	ring-&gt;next_to_use = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* enable receive descriptor ring */</div><div class='ctx'> 	wr32m(wx, WX_PX_RR_CFG(reg_idx),</div><div class='hunk'>@@ -1613,8 +2043,17 @@ static void wx_restore_vlan(struct wx *wx)</div><div class='ctx'> 		wx_vlan_rx_add_vid(wx-&gt;netdev, htons(ETH_P_8021Q), vid);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void wx_store_reta(struct wx *wx)</div><div class='add'>+u32 wx_rss_indir_tbl_entries(struct wx *wx)</div><div class='ctx'> {</div><div class='add'>+	if (test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags))</div><div class='add'>+		return 64;</div><div class='add'>+	else</div><div class='add'>+		return 128;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wx_store_reta(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 reta_entries = wx_rss_indir_tbl_entries(wx);</div><div class='ctx'> 	u8 *indir_tbl = wx-&gt;rss_indir_tbl;</div><div class='ctx'> 	u32 reta = 0;</div><div class='ctx'> 	u32 i;</div><div class='hunk'>@@ -1622,61 +2061,146 @@ static void wx_store_reta(struct wx *wx)</div><div class='ctx'> 	/* Fill out the redirection table as follows:</div><div class='ctx'> 	 *  - 8 bit wide entries containing 4 bit RSS index</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; WX_MAX_RETA_ENTRIES; i++) {</div><div class='add'>+	for (i = 0; i &lt; reta_entries; i++) {</div><div class='ctx'> 		reta |= indir_tbl[i] &lt;&lt; (i &amp; 0x3) * 8;</div><div class='ctx'> 		if ((i &amp; 3) == 3) {</div><div class='del'>-			wr32(wx, WX_RDB_RSSTBL(i &gt;&gt; 2), reta);</div><div class='add'>+			if (test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags) &amp;&amp;</div><div class='add'>+			    test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags))</div><div class='add'>+				wr32(wx, WX_RDB_VMRSSTBL(i &gt;&gt; 2, wx-&gt;num_vfs), reta);</div><div class='add'>+			else</div><div class='add'>+				wr32(wx, WX_RDB_RSSTBL(i &gt;&gt; 2), reta);</div><div class='ctx'> 			reta = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void wx_setup_reta(struct wx *wx)</div><div class='add'>+void wx_store_rsskey(struct wx *wx)</div><div class='ctx'> {</div><div class='del'>-	u16 rss_i = wx-&gt;ring_feature[RING_F_RSS].indices;</div><div class='del'>-	u32 random_key_size = WX_RSS_KEY_SIZE / 4;</div><div class='del'>-	u32 i, j;</div><div class='add'>+	u32 key_size = WX_RSS_KEY_SIZE / 4;</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='add'>+	if (test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags) &amp;&amp;</div><div class='add'>+	    test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+		for (i = 0; i &lt; key_size; i++)</div><div class='add'>+			wr32(wx, WX_RDB_VMRSSRK(i, wx-&gt;num_vfs),</div><div class='add'>+			     wx-&gt;rss_key[i]);</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; key_size; i++)</div><div class='add'>+			wr32(wx, WX_RDB_RSSRK(i), wx-&gt;rss_key[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_setup_reta(struct wx *wx)</div><div class='add'>+{</div><div class='ctx'> 	/* Fill out hash function seeds */</div><div class='del'>-	for (i = 0; i &lt; random_key_size; i++)</div><div class='del'>-		wr32(wx, WX_RDB_RSSRK(i), wx-&gt;rss_key[i]);</div><div class='add'>+	wx_store_rsskey(wx);</div><div class='ctx'> </div><div class='ctx'> 	/* Fill out redirection table */</div><div class='del'>-	memset(wx-&gt;rss_indir_tbl, 0, sizeof(wx-&gt;rss_indir_tbl));</div><div class='add'>+	if (!netif_is_rxfh_configured(wx-&gt;netdev)) {</div><div class='add'>+		u16 rss_i = wx-&gt;ring_feature[RING_F_RSS].indices;</div><div class='add'>+		u32 reta_entries = wx_rss_indir_tbl_entries(wx);</div><div class='add'>+		u32 i, j;</div><div class='add'>+</div><div class='add'>+		memset(wx-&gt;rss_indir_tbl, 0, sizeof(wx-&gt;rss_indir_tbl));</div><div class='add'>+</div><div class='add'>+		if (test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags)) {</div><div class='add'>+			if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags))</div><div class='add'>+				rss_i = rss_i &lt; 2 ? 2 : rss_i;</div><div class='add'>+			else</div><div class='add'>+				rss_i = 1;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	for (i = 0, j = 0; i &lt; WX_MAX_RETA_ENTRIES; i++, j++) {</div><div class='del'>-		if (j == rss_i)</div><div class='del'>-			j = 0;</div><div class='add'>+		for (i = 0, j = 0; i &lt; reta_entries; i++, j++) {</div><div class='add'>+			if (j == rss_i)</div><div class='add'>+				j = 0;</div><div class='ctx'> </div><div class='del'>-		wx-&gt;rss_indir_tbl[i] = j;</div><div class='add'>+			wx-&gt;rss_indir_tbl[i] = j;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	wx_store_reta(wx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void wx_setup_mrqc(struct wx *wx)</div><div class='add'>+void wx_config_rss_field(struct wx *wx)</div><div class='ctx'> {</div><div class='del'>-	u32 rss_field = 0;</div><div class='add'>+	u32 rss_field;</div><div class='ctx'> </div><div class='del'>-	/* Disable indicating checksum in descriptor, enables RSS hash */</div><div class='del'>-	wr32m(wx, WX_PSR_CTL, WX_PSR_CTL_PCSD, WX_PSR_CTL_PCSD);</div><div class='add'>+	if (test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags) &amp;&amp;</div><div class='add'>+	    test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+		rss_field = rd32(wx, WX_RDB_PL_CFG(wx-&gt;num_vfs));</div><div class='add'>+		rss_field &amp;= ~WX_RDB_PL_CFG_RSS_MASK;</div><div class='add'>+		rss_field |= FIELD_PREP(WX_RDB_PL_CFG_RSS_MASK, wx-&gt;rss_flags);</div><div class='add'>+		wr32(wx, WX_RDB_PL_CFG(wx-&gt;num_vfs), rss_field);</div><div class='ctx'> </div><div class='del'>-	/* Perform hash on these packet types */</div><div class='del'>-	rss_field = WX_RDB_RA_CTL_RSS_IPV4 |</div><div class='del'>-		    WX_RDB_RA_CTL_RSS_IPV4_TCP |</div><div class='del'>-		    WX_RDB_RA_CTL_RSS_IPV4_UDP |</div><div class='del'>-		    WX_RDB_RA_CTL_RSS_IPV6 |</div><div class='del'>-		    WX_RDB_RA_CTL_RSS_IPV6_TCP |</div><div class='del'>-		    WX_RDB_RA_CTL_RSS_IPV6_UDP;</div><div class='add'>+		/* Enable global RSS and multiple RSS to make the RSS</div><div class='add'>+		 * field of each pool take effect.</div><div class='add'>+		 */</div><div class='add'>+		wr32m(wx, WX_RDB_RA_CTL,</div><div class='add'>+		      WX_RDB_RA_CTL_MULTI_RSS | WX_RDB_RA_CTL_RSS_EN,</div><div class='add'>+		      WX_RDB_RA_CTL_MULTI_RSS | WX_RDB_RA_CTL_RSS_EN);</div><div class='add'>+	} else {</div><div class='add'>+		rss_field = rd32(wx, WX_RDB_RA_CTL);</div><div class='add'>+		rss_field &amp;= ~WX_RDB_RA_CTL_RSS_MASK;</div><div class='add'>+		rss_field |= FIELD_PREP(WX_RDB_RA_CTL_RSS_MASK, wx-&gt;rss_flags);</div><div class='add'>+		wr32(wx, WX_RDB_RA_CTL, rss_field);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	netdev_rss_key_fill(wx-&gt;rss_key, sizeof(wx-&gt;rss_key));</div><div class='add'>+void wx_enable_rss(struct wx *wx, bool enable)</div><div class='add'>+{</div><div class='add'>+	if (test_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags) &amp;&amp;</div><div class='add'>+	    test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+		if (enable)</div><div class='add'>+			wr32m(wx, WX_RDB_PL_CFG(wx-&gt;num_vfs),</div><div class='add'>+			      WX_RDB_PL_CFG_RSS_EN, WX_RDB_PL_CFG_RSS_EN);</div><div class='add'>+		else</div><div class='add'>+			wr32m(wx, WX_RDB_PL_CFG(wx-&gt;num_vfs),</div><div class='add'>+			      WX_RDB_PL_CFG_RSS_EN, 0);</div><div class='add'>+	} else {</div><div class='add'>+		if (enable)</div><div class='add'>+			wr32m(wx, WX_RDB_RA_CTL, WX_RDB_RA_CTL_RSS_EN,</div><div class='add'>+			      WX_RDB_RA_CTL_RSS_EN);</div><div class='add'>+		else</div><div class='add'>+			wr32m(wx, WX_RDB_RA_CTL, WX_RDB_RA_CTL_RSS_EN, 0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	wx_setup_reta(wx);</div><div class='add'>+#define WX_RDB_RSS_PL_2		FIELD_PREP(GENMASK(31, 29), 1)</div><div class='add'>+#define WX_RDB_RSS_PL_4		FIELD_PREP(GENMASK(31, 29), 2)</div><div class='add'>+static void wx_setup_psrtype(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int rss_i = wx-&gt;ring_feature[RING_F_RSS].indices;</div><div class='add'>+	u32 psrtype;</div><div class='add'>+	int pool;</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;rss_enabled)</div><div class='del'>-		rss_field |= WX_RDB_RA_CTL_RSS_EN;</div><div class='add'>+	psrtype = WX_RDB_PL_CFG_L4HDR |</div><div class='add'>+		  WX_RDB_PL_CFG_L3HDR |</div><div class='add'>+		  WX_RDB_PL_CFG_L2HDR |</div><div class='add'>+		  WX_RDB_PL_CFG_TUN_OUTL2HDR |</div><div class='add'>+		  WX_RDB_PL_CFG_TUN_TUNHDR;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+		for_each_set_bit(pool, &amp;wx-&gt;fwd_bitmask, 8)</div><div class='add'>+			wr32(wx, WX_RDB_PL_CFG(VMDQ_P(pool)), psrtype);</div><div class='add'>+	} else {</div><div class='add'>+		if (rss_i &gt; 3)</div><div class='add'>+			psrtype |= WX_RDB_RSS_PL_4;</div><div class='add'>+		else if (rss_i &gt; 1)</div><div class='add'>+			psrtype |= WX_RDB_RSS_PL_2;</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(pool, &amp;wx-&gt;fwd_bitmask, 32)</div><div class='add'>+			wr32(wx, WX_RDB_PL_CFG(VMDQ_P(pool)), psrtype);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_setup_mrqc(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* Disable indicating checksum in descriptor, enables RSS hash */</div><div class='add'>+	wr32m(wx, WX_PSR_CTL, WX_PSR_CTL_PCSD, WX_PSR_CTL_PCSD);</div><div class='ctx'> </div><div class='del'>-	wr32(wx, WX_RDB_RA_CTL, rss_field);</div><div class='add'>+	wx_config_rss_field(wx);</div><div class='add'>+	wx_enable_rss(wx, wx-&gt;rss_enabled);</div><div class='add'>+	wx_setup_reta(wx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1687,27 +2211,24 @@ static void wx_setup_mrqc(struct wx *wx)</div><div class='ctx'>  **/</div><div class='ctx'> void wx_configure_rx(struct wx *wx)</div><div class='ctx'> {</div><div class='del'>-	u32 psrtype, i;</div><div class='ctx'> 	int ret;</div><div class='add'>+	u32 i;</div><div class='ctx'> </div><div class='ctx'> 	wx_disable_rx(wx);</div><div class='del'>-</div><div class='del'>-	psrtype = WX_RDB_PL_CFG_L4HDR |</div><div class='del'>-		  WX_RDB_PL_CFG_L3HDR |</div><div class='del'>-		  WX_RDB_PL_CFG_L2HDR |</div><div class='del'>-		  WX_RDB_PL_CFG_TUN_TUNHDR;</div><div class='del'>-	wr32(wx, WX_RDB_PL_CFG(0), psrtype);</div><div class='add'>+	wx_setup_psrtype(wx);</div><div class='ctx'> </div><div class='ctx'> 	/* enable hw crc stripping */</div><div class='ctx'> 	wr32m(wx, WX_RSC_CTL, WX_RSC_CTL_CRC_STRIP, WX_RSC_CTL_CRC_STRIP);</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp) {</div><div class='add'>+	if (test_bit(WX_FLAG_RSC_CAPABLE, wx-&gt;flags)) {</div><div class='ctx'> 		u32 psrctl;</div><div class='ctx'> </div><div class='ctx'> 		/* RSC Setup */</div><div class='ctx'> 		psrctl = rd32(wx, WX_PSR_CTL);</div><div class='ctx'> 		psrctl |= WX_PSR_CTL_RSC_ACK; /* Disable RSC for ACK packets */</div><div class='del'>-		psrctl |= WX_PSR_CTL_RSC_DIS;</div><div class='add'>+		psrctl &amp;= ~WX_PSR_CTL_RSC_DIS;</div><div class='add'>+		if (!test_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags))</div><div class='add'>+			psrctl |= WX_PSR_CTL_RSC_DIS;</div><div class='ctx'> 		wr32(wx, WX_PSR_CTL, psrctl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1716,6 +2237,12 @@ void wx_configure_rx(struct wx *wx)</div><div class='ctx'> 	/* set_rx_buffer_len must be called before ring initialization */</div><div class='ctx'> 	wx_set_rx_buffer_len(wx);</div><div class='ctx'> </div><div class='add'>+	if (test_bit(WX_FLAG_RX_MERGE_ENABLED, wx-&gt;flags)) {</div><div class='add'>+		wr32(wx, WX_RDM_DCACHE_CTL, WX_RDM_DCACHE_CTL_EN);</div><div class='add'>+		wr32m(wx, WX_RDM_RSC_CTL,</div><div class='add'>+		      WX_RDM_RSC_CTL_FREE_CTL | WX_RDM_RSC_CTL_FREE_CNT_DIS,</div><div class='add'>+		      WX_RDM_RSC_CTL_FREE_CTL);</div><div class='add'>+	}</div><div class='ctx'> 	/* Setup the HW Rx Head and Tail Descriptor Pointers and</div><div class='ctx'> 	 * the Base and Length of the Rx Descriptor Ring</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1744,6 +2271,7 @@ void wx_configure(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	wx_set_rxpba(wx);</div><div class='ctx'> 	wx_pbthresh_setup(wx);</div><div class='add'>+	wx_configure_virtualization(wx);</div><div class='ctx'> 	wx_configure_port(wx);</div><div class='ctx'> </div><div class='ctx'> 	wx_set_rx_mode(wx-&gt;netdev);</div><div class='hunk'>@@ -1838,10 +2366,8 @@ int wx_stop_adapter(struct wx *wx)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_stop_adapter);</div><div class='ctx'> </div><div class='del'>-void wx_reset_misc(struct wx *wx)</div><div class='add'>+void wx_reset_mac(struct wx *wx)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='ctx'> 	/* receive packets that size &gt; 2048 */</div><div class='ctx'> 	wr32m(wx, WX_MAC_RX_CFG, WX_MAC_RX_CFG_JE, WX_MAC_RX_CFG_JE);</div><div class='ctx'> </div><div class='hunk'>@@ -1853,6 +2379,14 @@ void wx_reset_misc(struct wx *wx)</div><div class='ctx'> 	      WX_MAC_RX_FLOW_CTRL_RFE, WX_MAC_RX_FLOW_CTRL_RFE);</div><div class='ctx'> </div><div class='ctx'> 	wr32(wx, WX_MAC_PKT_FLT, WX_MAC_PKT_FLT_PR);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_reset_mac);</div><div class='add'>+</div><div class='add'>+void wx_reset_misc(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	wx_reset_mac(wx);</div><div class='ctx'> </div><div class='ctx'> 	wr32m(wx, WX_MIS_RST_ST,</div><div class='ctx'> 	      WX_MIS_RST_ST_RST_INIT, 0x1E00);</div><div class='hunk'>@@ -1946,9 +2480,11 @@ int wx_sw_init(struct wx *wx)</div><div class='ctx'> 	wx-&gt;oem_svid = pdev-&gt;subsystem_vendor;</div><div class='ctx'> 	wx-&gt;oem_ssid = pdev-&gt;subsystem_device;</div><div class='ctx'> 	wx-&gt;bus.device = PCI_SLOT(pdev-&gt;devfn);</div><div class='del'>-	wx-&gt;bus.func = PCI_FUNC(pdev-&gt;devfn);</div><div class='add'>+	wx-&gt;bus.func = FIELD_GET(WX_CFG_PORT_ST_LANID,</div><div class='add'>+				 rd32(wx, WX_CFG_PORT_ST));</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;oem_svid == PCI_VENDOR_ID_WANGXUN) {</div><div class='add'>+	if (wx-&gt;oem_svid == PCI_VENDOR_ID_WANGXUN ||</div><div class='add'>+	    pdev-&gt;is_virtfn) {</div><div class='ctx'> 		wx-&gt;subsystem_vendor_id = pdev-&gt;subsystem_vendor;</div><div class='ctx'> 		wx-&gt;subsystem_device_id = pdev-&gt;subsystem_device;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1966,6 +2502,8 @@ int wx_sw_init(struct wx *wx)</div><div class='ctx'> 		wx_err(wx, "rss key allocation failed\n");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='add'>+	wx-&gt;rss_flags = WX_RSS_FIELD_IPV4 | WX_RSS_FIELD_IPV4_TCP |</div><div class='add'>+			WX_RSS_FIELD_IPV6 | WX_RSS_FIELD_IPV6_TCP;</div><div class='ctx'> </div><div class='ctx'> 	wx-&gt;mac_table = kcalloc(wx-&gt;mac.num_rar_entries,</div><div class='ctx'> 				sizeof(struct wx_mac_addr),</div><div class='hunk'>@@ -2102,7 +2640,7 @@ static int wx_set_vlvf(struct wx *wx, u32 vlan, u32 vind, bool vlan_on,</div><div class='ctx'>  *</div><div class='ctx'>  *  Turn on/off specified VLAN in the VLAN filter table.</div><div class='ctx'>  **/</div><div class='del'>-static int wx_set_vfta(struct wx *wx, u32 vlan, u32 vind, bool vlan_on)</div><div class='add'>+int wx_set_vfta(struct wx *wx, u32 vlan, u32 vind, bool vlan_on)</div><div class='ctx'> {</div><div class='ctx'> 	u32 bitindex, vfta, targetbit;</div><div class='ctx'> 	bool vfta_changed = false;</div><div class='hunk'>@@ -2321,6 +2859,18 @@ void wx_update_stats(struct wx *wx)</div><div class='ctx'> 	wx-&gt;hw_csum_rx_error = hw_csum_rx_error;</div><div class='ctx'> 	wx-&gt;hw_csum_rx_good = hw_csum_rx_good;</div><div class='ctx'> </div><div class='add'>+	if (test_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags)) {</div><div class='add'>+		u64 rsc_count = 0;</div><div class='add'>+		u64 rsc_flush = 0;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; wx-&gt;num_rx_queues; i++) {</div><div class='add'>+			rsc_count += wx-&gt;rx_ring[i]-&gt;rx_stats.rsc_count;</div><div class='add'>+			rsc_flush += wx-&gt;rx_ring[i]-&gt;rx_stats.rsc_flush;</div><div class='add'>+		}</div><div class='add'>+		wx-&gt;rsc_count = rsc_count;</div><div class='add'>+		wx-&gt;rsc_flush = rsc_flush;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; wx-&gt;num_tx_queues; i++) {</div><div class='ctx'> 		struct wx_ring *tx_ring = wx-&gt;tx_ring[i];</div><div class='ctx'> </div><div class='hunk'>@@ -2353,12 +2903,15 @@ void wx_update_stats(struct wx *wx)</div><div class='ctx'> 	hwstats-&gt;b2ogprc += rd32(wx, WX_RDM_BMC2OS_CNT);</div><div class='ctx'> 	hwstats-&gt;rdmdrop += rd32(wx, WX_RDM_DRP_PKT);</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp) {</div><div class='add'>+	if (test_bit(WX_FLAG_FDIR_CAPABLE, wx-&gt;flags)) {</div><div class='ctx'> 		hwstats-&gt;fdirmatch += rd32(wx, WX_RDB_FDIR_MATCH);</div><div class='ctx'> 		hwstats-&gt;fdirmiss += rd32(wx, WX_RDB_FDIR_MISS);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; wx-&gt;mac.max_rx_queues; i++)</div><div class='add'>+	/* qmprc is not cleared on read, manual reset it */</div><div class='add'>+	hwstats-&gt;qmprc = 0;</div><div class='add'>+	for (i = wx-&gt;num_vfs * wx-&gt;num_rx_queues_per_pool;</div><div class='add'>+	     i &lt; wx-&gt;mac.max_rx_queues; i++)</div><div class='ctx'> 		hwstats-&gt;qmprc += rd32(wx, WX_PX_MPRC(i));</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_update_stats);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_hw.h b/drivers/net/ethernet/wangxun/libwx/wx_hw.h<br/>index 11fb33349482..13857376bbad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_hw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_hw.h</a></div><div class='hunk'>@@ -18,6 +18,7 @@ void wx_control_hw(struct wx *wx, bool drv);</div><div class='ctx'> int wx_mng_present(struct wx *wx);</div><div class='ctx'> int wx_host_interface_command(struct wx *wx, u32 *buffer,</div><div class='ctx'> 			      u32 length, u32 timeout, bool return_data);</div><div class='add'>+int wx_set_pps(struct wx *wx, bool enable, u64 nsec, u64 cycles);</div><div class='ctx'> int wx_read_ee_hostif(struct wx *wx, u16 offset, u16 *data);</div><div class='ctx'> int wx_read_ee_hostif_buffer(struct wx *wx,</div><div class='ctx'> 			     u16 offset, u16 words, u16 *data);</div><div class='hunk'>@@ -25,22 +26,34 @@ void wx_init_eeprom_params(struct wx *wx);</div><div class='ctx'> void wx_get_mac_addr(struct wx *wx, u8 *mac_addr);</div><div class='ctx'> void wx_init_rx_addrs(struct wx *wx);</div><div class='ctx'> void wx_mac_set_default_filter(struct wx *wx, u8 *addr);</div><div class='add'>+int wx_add_mac_filter(struct wx *wx, u8 *addr, u16 pool);</div><div class='add'>+int wx_del_mac_filter(struct wx *wx, u8 *addr, u16 pool);</div><div class='ctx'> void wx_flush_sw_mac_table(struct wx *wx);</div><div class='add'>+u32 wx_mta_vector(struct wx *wx, u8 *mc_addr);</div><div class='ctx'> int wx_set_mac(struct net_device *netdev, void *p);</div><div class='ctx'> void wx_disable_rx(struct wx *wx);</div><div class='add'>+int wx_set_vf_spoofchk(struct net_device *netdev, int vf, bool setting);</div><div class='ctx'> int wx_disable_sec_rx_path(struct wx *wx);</div><div class='ctx'> void wx_enable_sec_rx_path(struct wx *wx);</div><div class='ctx'> void wx_set_rx_mode(struct net_device *netdev);</div><div class='ctx'> int wx_change_mtu(struct net_device *netdev, int new_mtu);</div><div class='ctx'> void wx_disable_rx_queue(struct wx *wx, struct wx_ring *ring);</div><div class='add'>+void wx_enable_rx_queue(struct wx *wx, struct wx_ring *ring);</div><div class='add'>+u32 wx_rss_indir_tbl_entries(struct wx *wx);</div><div class='add'>+void wx_store_reta(struct wx *wx);</div><div class='add'>+void wx_store_rsskey(struct wx *wx);</div><div class='add'>+void wx_config_rss_field(struct wx *wx);</div><div class='add'>+void wx_enable_rss(struct wx *wx, bool enable);</div><div class='ctx'> void wx_configure_rx(struct wx *wx);</div><div class='ctx'> void wx_configure(struct wx *wx);</div><div class='ctx'> void wx_start_hw(struct wx *wx);</div><div class='ctx'> int wx_disable_pcie_master(struct wx *wx);</div><div class='ctx'> int wx_stop_adapter(struct wx *wx);</div><div class='add'>+void wx_reset_mac(struct wx *wx);</div><div class='ctx'> void wx_reset_misc(struct wx *wx);</div><div class='ctx'> int wx_get_pcie_msix_counts(struct wx *wx, u16 *msix_count, u16 max_msix_count);</div><div class='ctx'> int wx_sw_init(struct wx *wx);</div><div class='add'>+int wx_set_vfta(struct wx *wx, u32 vlan, u32 vind, bool vlan_on);</div><div class='ctx'> int wx_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid);</div><div class='ctx'> int wx_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid);</div><div class='ctx'> int wx_fc_enable(struct wx *wx, bool tx_pause, bool rx_pause);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_lib.c b/drivers/net/ethernet/wangxun/libwx/wx_lib.c<br/>index 2b3d6586f44a..32cadafa4b3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_lib.c</a></div><div class='hunk'>@@ -5,6 +5,7 @@</div><div class='ctx'> #include &lt;net/ip6_checksum.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> #include &lt;net/inet_ecn.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='ctx'> #include &lt;linux/iopoll.h&gt;</div><div class='ctx'> #include &lt;linux/sctp.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='hunk'>@@ -13,7 +14,9 @@</div><div class='ctx'> </div><div class='ctx'> #include "wx_type.h"</div><div class='ctx'> #include "wx_lib.h"</div><div class='add'>+#include "wx_ptp.h"</div><div class='ctx'> #include "wx_hw.h"</div><div class='add'>+#include "wx_vf_lib.h"</div><div class='ctx'> </div><div class='ctx'> /* Lookup table mapping the HW PTYPE to the bit field for decoding */</div><div class='ctx'> static struct wx_dec_ptype wx_ptype_lookup[256] = {</div><div class='hunk'>@@ -172,10 +175,6 @@ static void wx_dma_sync_frag(struct wx_ring *rx_ring,</div><div class='ctx'> 				      skb_frag_off(frag),</div><div class='ctx'> 				      skb_frag_size(frag),</div><div class='ctx'> 				      DMA_FROM_DEVICE);</div><div class='del'>-</div><div class='del'>-	/* If the page was released, just unmap it. */</div><div class='del'>-	if (unlikely(WX_CB(skb)-&gt;page_released))</div><div class='del'>-		page_pool_put_full_page(rx_ring-&gt;page_pool, rx_buffer-&gt;page, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct wx_rx_buffer *wx_get_rx_buffer(struct wx_ring *rx_ring,</div><div class='hunk'>@@ -225,10 +224,6 @@ static void wx_put_rx_buffer(struct wx_ring *rx_ring,</div><div class='ctx'> 			     struct sk_buff *skb,</div><div class='ctx'> 			     int rx_buffer_pgcnt)</div><div class='ctx'> {</div><div class='del'>-	if (!IS_ERR(skb) &amp;&amp; WX_CB(skb)-&gt;dma == rx_buffer-&gt;dma)</div><div class='del'>-		/* the page has been released from the ring */</div><div class='del'>-		WX_CB(skb)-&gt;page_released = true;</div><div class='del'>-</div><div class='ctx'> 	/* clear contents of rx_buffer */</div><div class='ctx'> 	rx_buffer-&gt;page = NULL;</div><div class='ctx'> 	rx_buffer-&gt;skb = NULL;</div><div class='hunk'>@@ -240,7 +235,7 @@ static struct sk_buff *wx_build_skb(struct wx_ring *rx_ring,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int size = le16_to_cpu(rx_desc-&gt;wb.upper.length);</div><div class='ctx'> #if (PAGE_SIZE &lt; 8192)</div><div class='del'>-	unsigned int truesize = WX_RX_BUFSZ;</div><div class='add'>+	unsigned int truesize = wx_rx_pg_size(rx_ring) / 2;</div><div class='ctx'> #else</div><div class='ctx'> 	unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -309,10 +304,11 @@ static bool wx_alloc_mapped_page(struct wx_ring *rx_ring,</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	page = page_pool_dev_alloc_pages(rx_ring-&gt;page_pool);</div><div class='del'>-	WARN_ON(!page);</div><div class='add'>+	if (unlikely(!page))</div><div class='add'>+		return false;</div><div class='ctx'> 	dma = page_pool_get_dma_addr(page);</div><div class='ctx'> </div><div class='del'>-	bi-&gt;page_dma = dma;</div><div class='add'>+	bi-&gt;dma = dma;</div><div class='ctx'> 	bi-&gt;page = page;</div><div class='ctx'> 	bi-&gt;page_offset = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -345,11 +341,11 @@ void wx_alloc_rx_buffers(struct wx_ring *rx_ring, u16 cleaned_count)</div><div class='ctx'> 		/* sync the buffer for use by the device */</div><div class='ctx'> 		dma_sync_single_range_for_device(rx_ring-&gt;dev, bi-&gt;dma,</div><div class='ctx'> 						 bi-&gt;page_offset,</div><div class='del'>-						 WX_RX_BUFSZ,</div><div class='add'>+						 rx_ring-&gt;rx_buf_len,</div><div class='ctx'> 						 DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 		rx_desc-&gt;read.pkt_addr =</div><div class='del'>-			cpu_to_le64(bi-&gt;page_dma + bi-&gt;page_offset);</div><div class='add'>+			cpu_to_le64(bi-&gt;dma + bi-&gt;page_offset);</div><div class='ctx'> </div><div class='ctx'> 		rx_desc++;</div><div class='ctx'> 		bi++;</div><div class='hunk'>@@ -362,6 +358,8 @@ void wx_alloc_rx_buffers(struct wx_ring *rx_ring, u16 cleaned_count)</div><div class='ctx'> </div><div class='ctx'> 		/* clear the status bits for the next_to_use descriptor */</div><div class='ctx'> 		rx_desc-&gt;wb.upper.status_error = 0;</div><div class='add'>+		/* clear the length for the next_to_use descriptor */</div><div class='add'>+		rx_desc-&gt;wb.upper.length = 0;</div><div class='ctx'> </div><div class='ctx'> 		cleaned_count--;</div><div class='ctx'> 	} while (cleaned_count);</div><div class='hunk'>@@ -406,6 +404,7 @@ static bool wx_is_non_eop(struct wx_ring *rx_ring,</div><div class='ctx'> 			  union wx_rx_desc *rx_desc,</div><div class='ctx'> 			  struct sk_buff *skb)</div><div class='ctx'> {</div><div class='add'>+	struct wx *wx = rx_ring-&gt;q_vector-&gt;wx;</div><div class='ctx'> 	u32 ntc = rx_ring-&gt;next_to_clean + 1;</div><div class='ctx'> </div><div class='ctx'> 	/* fetch, update, and store next to clean */</div><div class='hunk'>@@ -414,6 +413,24 @@ static bool wx_is_non_eop(struct wx_ring *rx_ring,</div><div class='ctx'> </div><div class='ctx'> 	prefetch(WX_RX_DESC(rx_ring, ntc));</div><div class='ctx'> </div><div class='add'>+	/* update RSC append count if present */</div><div class='add'>+	if (test_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags)) {</div><div class='add'>+		__le32 rsc_enabled = rx_desc-&gt;wb.lower.lo_dword.data &amp;</div><div class='add'>+				     cpu_to_le32(WX_RXD_RSCCNT_MASK);</div><div class='add'>+</div><div class='add'>+		if (unlikely(rsc_enabled)) {</div><div class='add'>+			u32 rsc_cnt = le32_to_cpu(rsc_enabled);</div><div class='add'>+</div><div class='add'>+			rsc_cnt &gt;&gt;= WX_RXD_RSCCNT_SHIFT;</div><div class='add'>+			WX_CB(skb)-&gt;append_cnt += rsc_cnt - 1;</div><div class='add'>+</div><div class='add'>+			/* update ntc based on RSC value */</div><div class='add'>+			ntc = le32_to_cpu(rx_desc-&gt;wb.upper.status_error);</div><div class='add'>+			ntc &amp;= WX_RXD_NEXTP_MASK;</div><div class='add'>+			ntc &gt;&gt;= WX_RXD_NEXTP_SHIFT;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* if we are the last buffer then there is nothing else to do */</div><div class='ctx'> 	if (likely(wx_test_staterr(rx_desc, WX_RXD_STAT_EOP)))</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -545,7 +562,8 @@ static void wx_rx_checksum(struct wx_ring *ring,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Hardware can't guarantee csum if IPv6 Dest Header found */</div><div class='del'>-	if (dptype.prot != WX_DEC_PTYPE_PROT_SCTP &amp;&amp; WX_RXD_IPV6EX(rx_desc))</div><div class='add'>+	if (dptype.prot != WX_DEC_PTYPE_PROT_SCTP &amp;&amp;</div><div class='add'>+	    wx_test_staterr(rx_desc, WX_RXD_STAT_IPV6EX))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* if L4 checksum error */</div><div class='hunk'>@@ -583,6 +601,33 @@ static void wx_rx_vlan(struct wx_ring *ring, union wx_rx_desc *rx_desc,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wx_set_rsc_gso_size(struct wx_ring *ring,</div><div class='add'>+				struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	u16 hdr_len = skb_headlen(skb);</div><div class='add'>+</div><div class='add'>+	/* set gso_size to avoid messing up TCP MSS */</div><div class='add'>+	skb_shinfo(skb)-&gt;gso_size = DIV_ROUND_UP((skb-&gt;len - hdr_len),</div><div class='add'>+						 WX_CB(skb)-&gt;append_cnt);</div><div class='add'>+	skb_shinfo(skb)-&gt;gso_type = SKB_GSO_TCPV4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_update_rsc_stats(struct wx_ring *rx_ring,</div><div class='add'>+				struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	/* if append_cnt is 0 then frame is not RSC */</div><div class='add'>+	if (!WX_CB(skb)-&gt;append_cnt)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;rx_stats.rsc_count += WX_CB(skb)-&gt;append_cnt;</div><div class='add'>+	rx_ring-&gt;rx_stats.rsc_flush++;</div><div class='add'>+</div><div class='add'>+	wx_set_rsc_gso_size(rx_ring, skb);</div><div class='add'>+</div><div class='add'>+	/* gso_size is computed using append_cnt so always clear it last */</div><div class='add'>+	WX_CB(skb)-&gt;append_cnt = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * wx_process_skb_fields - Populate skb header fields from Rx descriptor</div><div class='ctx'>  * @rx_ring: rx descriptor ring packet is being transacted on</div><div class='hunk'>@@ -597,8 +642,20 @@ static void wx_process_skb_fields(struct wx_ring *rx_ring,</div><div class='ctx'> 				  union wx_rx_desc *rx_desc,</div><div class='ctx'> 				  struct sk_buff *skb)</div><div class='ctx'> {</div><div class='add'>+	struct wx *wx = netdev_priv(rx_ring-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_FLAG_RSC_CAPABLE, wx-&gt;flags))</div><div class='add'>+		wx_update_rsc_stats(rx_ring, skb);</div><div class='add'>+</div><div class='ctx'> 	wx_rx_hash(rx_ring, rx_desc, skb);</div><div class='ctx'> 	wx_rx_checksum(rx_ring, rx_desc, skb);</div><div class='add'>+</div><div class='add'>+	if (unlikely(test_bit(WX_FLAG_RX_HWTSTAMP_ENABLED, wx-&gt;flags)) &amp;&amp;</div><div class='add'>+	    unlikely(wx_test_staterr(rx_desc, WX_RXD_STAT_TS))) {</div><div class='add'>+		wx_ptp_rx_hwtstamp(rx_ring-&gt;q_vector-&gt;wx, skb);</div><div class='add'>+		rx_ring-&gt;last_rx_timestamp = jiffies;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	wx_rx_vlan(rx_ring, rx_desc, skb);</div><div class='ctx'> 	skb_record_rx_queue(skb, rx_ring-&gt;queue_index);</div><div class='ctx'> 	skb-&gt;protocol = eth_type_trans(skb, rx_ring-&gt;netdev);</div><div class='hunk'>@@ -705,6 +762,7 @@ static bool wx_clean_tx_irq(struct wx_q_vector *q_vector,</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int budget = q_vector-&gt;wx-&gt;tx_work_limit;</div><div class='ctx'> 	unsigned int total_bytes = 0, total_packets = 0;</div><div class='add'>+	struct wx *wx = netdev_priv(tx_ring-&gt;netdev);</div><div class='ctx'> 	unsigned int i = tx_ring-&gt;next_to_clean;</div><div class='ctx'> 	struct wx_tx_buffer *tx_buffer;</div><div class='ctx'> 	union wx_tx_desc *tx_desc;</div><div class='hunk'>@@ -726,9 +784,22 @@ static bool wx_clean_tx_irq(struct wx_q_vector *q_vector,</div><div class='ctx'> 		/* prevent any other reads prior to eop_desc */</div><div class='ctx'> 		smp_rmb();</div><div class='ctx'> </div><div class='del'>-		/* if DD is not set pending work has not been completed */</div><div class='del'>-		if (!(eop_desc-&gt;wb.status &amp; cpu_to_le32(WX_TXD_STAT_DD)))</div><div class='add'>+		if (tx_ring-&gt;headwb_mem) {</div><div class='add'>+			u32 head = *tx_ring-&gt;headwb_mem;</div><div class='add'>+</div><div class='add'>+			if (head == tx_ring-&gt;next_to_clean)</div><div class='add'>+				break;</div><div class='add'>+			else if (head &gt; tx_ring-&gt;next_to_clean &amp;&amp;</div><div class='add'>+				 !(tx_buffer-&gt;next_eop &gt;= tx_ring-&gt;next_to_clean &amp;&amp;</div><div class='add'>+				   tx_buffer-&gt;next_eop &lt; head))</div><div class='add'>+				break;</div><div class='add'>+			else if (!(tx_buffer-&gt;next_eop &gt;= tx_ring-&gt;next_to_clean ||</div><div class='add'>+				   tx_buffer-&gt;next_eop &lt; head))</div><div class='add'>+				break;</div><div class='add'>+		} else if (!(eop_desc-&gt;wb.status &amp; cpu_to_le32(WX_TXD_STAT_DD))) {</div><div class='add'>+			/* if DD is not set pending work has not been completed */</div><div class='ctx'> 			break;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* clear next_to_watch to prevent false hangs */</div><div class='ctx'> 		tx_buffer-&gt;next_to_watch = NULL;</div><div class='hunk'>@@ -737,6 +808,11 @@ static bool wx_clean_tx_irq(struct wx_q_vector *q_vector,</div><div class='ctx'> 		total_bytes += tx_buffer-&gt;bytecount;</div><div class='ctx'> 		total_packets += tx_buffer-&gt;gso_segs;</div><div class='ctx'> </div><div class='add'>+		/* schedule check for Tx timestamp */</div><div class='add'>+		if (unlikely(test_bit(WX_STATE_PTP_TX_IN_PROGRESS, wx-&gt;state)) &amp;&amp;</div><div class='add'>+		    skb_shinfo(tx_buffer-&gt;skb)-&gt;tx_flags &amp; SKBTX_IN_PROGRESS)</div><div class='add'>+			ptp_schedule_worker(wx-&gt;ptp_clock, 0);</div><div class='add'>+</div><div class='ctx'> 		/* free the skb */</div><div class='ctx'> 		napi_consume_skb(tx_buffer-&gt;skb, napi_budget);</div><div class='ctx'> </div><div class='hunk'>@@ -819,6 +895,36 @@ static bool wx_clean_tx_irq(struct wx_q_vector *q_vector,</div><div class='ctx'> 	return !!budget;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wx_update_rx_dim_sample(struct wx_q_vector *q_vector)</div><div class='add'>+{</div><div class='add'>+	struct dim_sample sample = {};</div><div class='add'>+</div><div class='add'>+	dim_update_sample(q_vector-&gt;total_events,</div><div class='add'>+			  q_vector-&gt;rx.total_packets,</div><div class='add'>+			  q_vector-&gt;rx.total_bytes,</div><div class='add'>+			  &amp;sample);</div><div class='add'>+</div><div class='add'>+	net_dim(&amp;q_vector-&gt;rx.dim, &amp;sample);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_update_tx_dim_sample(struct wx_q_vector *q_vector)</div><div class='add'>+{</div><div class='add'>+	struct dim_sample sample = {};</div><div class='add'>+</div><div class='add'>+	dim_update_sample(q_vector-&gt;total_events,</div><div class='add'>+			  q_vector-&gt;tx.total_packets,</div><div class='add'>+			  q_vector-&gt;tx.total_bytes,</div><div class='add'>+			  &amp;sample);</div><div class='add'>+</div><div class='add'>+	net_dim(&amp;q_vector-&gt;tx.dim, &amp;sample);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_update_dim_sample(struct wx_q_vector *q_vector)</div><div class='add'>+{</div><div class='add'>+	wx_update_rx_dim_sample(q_vector);</div><div class='add'>+	wx_update_tx_dim_sample(q_vector);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * wx_poll - NAPI polling RX/TX cleanup routine</div><div class='ctx'>  * @napi: napi struct with our devices info in it</div><div class='hunk'>@@ -865,6 +971,8 @@ static int wx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	/* all work done, exit the polling mode */</div><div class='ctx'> 	if (likely(napi_complete_done(napi, work_done))) {</div><div class='add'>+		if (wx-&gt;adaptive_itr)</div><div class='add'>+			wx_update_dim_sample(q_vector);</div><div class='ctx'> 		if (netif_running(wx-&gt;netdev))</div><div class='ctx'> 			wx_intr_enable(wx, WX_INTR_Q(q_vector-&gt;v_idx));</div><div class='ctx'> 	}</div><div class='hunk'>@@ -932,9 +1040,9 @@ static void wx_tx_olinfo_status(union wx_tx_desc *tx_desc,</div><div class='ctx'> 	tx_desc-&gt;read.olinfo_status = cpu_to_le32(olinfo_status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void wx_tx_map(struct wx_ring *tx_ring,</div><div class='del'>-		      struct wx_tx_buffer *first,</div><div class='del'>-		      const u8 hdr_len)</div><div class='add'>+static int wx_tx_map(struct wx_ring *tx_ring,</div><div class='add'>+		     struct wx_tx_buffer *first,</div><div class='add'>+		     const u8 hdr_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb = first-&gt;skb;</div><div class='ctx'> 	struct wx_tx_buffer *tx_buffer;</div><div class='hunk'>@@ -1013,6 +1121,8 @@ static void wx_tx_map(struct wx_ring *tx_ring,</div><div class='ctx'> </div><div class='ctx'> 	netdev_tx_sent_queue(wx_txring_txq(tx_ring), first-&gt;bytecount);</div><div class='ctx'> </div><div class='add'>+	/* set the timestamp */</div><div class='add'>+	first-&gt;time_stamp = jiffies;</div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='ctx'> </div><div class='ctx'> 	/* Force memory writes to complete before letting h/w know there</div><div class='hunk'>@@ -1027,6 +1137,10 @@ static void wx_tx_map(struct wx_ring *tx_ring,</div><div class='ctx'> 	/* set next_to_watch value indicating a packet is present */</div><div class='ctx'> 	first-&gt;next_to_watch = tx_desc;</div><div class='ctx'> </div><div class='add'>+	/* set next_eop for amlite tx head wb */</div><div class='add'>+	if (tx_ring-&gt;headwb_mem)</div><div class='add'>+		first-&gt;next_eop = i;</div><div class='add'>+</div><div class='ctx'> 	i++;</div><div class='ctx'> 	if (i == tx_ring-&gt;count)</div><div class='ctx'> 		i = 0;</div><div class='hunk'>@@ -1038,7 +1152,7 @@ static void wx_tx_map(struct wx_ring *tx_ring,</div><div class='ctx'> 	if (netif_xmit_stopped(wx_txring_txq(tx_ring)) || !netdev_xmit_more())</div><div class='ctx'> 		writel(i, tx_ring-&gt;tail);</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='add'>+	return 0;</div><div class='ctx'> dma_error:</div><div class='ctx'> 	dev_err(tx_ring-&gt;dev, "TX DMA map failed\n");</div><div class='ctx'> </div><div class='hunk'>@@ -1062,6 +1176,8 @@ dma_error:</div><div class='ctx'> 	first-&gt;skb = NULL;</div><div class='ctx'> </div><div class='ctx'> 	tx_ring-&gt;next_to_use = i;</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void wx_tx_ctxtdesc(struct wx_ring *tx_ring, u32 vlan_macip_lens,</div><div class='hunk'>@@ -1082,26 +1198,6 @@ static void wx_tx_ctxtdesc(struct wx_ring *tx_ring, u32 vlan_macip_lens,</div><div class='ctx'> 	context_desc-&gt;mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void wx_get_ipv6_proto(struct sk_buff *skb, int offset, u8 *nexthdr)</div><div class='del'>-{</div><div class='del'>-	struct ipv6hdr *hdr = (struct ipv6hdr *)(skb-&gt;data + offset);</div><div class='del'>-</div><div class='del'>-	*nexthdr = hdr-&gt;nexthdr;</div><div class='del'>-	offset += sizeof(struct ipv6hdr);</div><div class='del'>-	while (ipv6_ext_hdr(*nexthdr)) {</div><div class='del'>-		struct ipv6_opt_hdr _hdr, *hp;</div><div class='del'>-</div><div class='del'>-		if (*nexthdr == NEXTHDR_NONE)</div><div class='del'>-			return;</div><div class='del'>-		hp = skb_header_pointer(skb, offset, sizeof(_hdr), &amp;_hdr);</div><div class='del'>-		if (!hp)</div><div class='del'>-			return;</div><div class='del'>-		if (*nexthdr == NEXTHDR_FRAGMENT)</div><div class='del'>-			break;</div><div class='del'>-		*nexthdr = hp-&gt;nexthdr;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> union network_header {</div><div class='ctx'> 	struct iphdr *ipv4;</div><div class='ctx'> 	struct ipv6hdr *ipv6;</div><div class='hunk'>@@ -1112,6 +1208,8 @@ static u8 wx_encode_tx_desc_ptype(const struct wx_tx_buffer *first)</div><div class='ctx'> {</div><div class='ctx'> 	u8 tun_prot = 0, l4_prot = 0, ptype = 0;</div><div class='ctx'> 	struct sk_buff *skb = first-&gt;skb;</div><div class='add'>+	unsigned char *exthdr, *l4_hdr;</div><div class='add'>+	__be16 frag_off;</div><div class='ctx'> </div><div class='ctx'> 	if (skb-&gt;encapsulation) {</div><div class='ctx'> 		union network_header hdr;</div><div class='hunk'>@@ -1122,14 +1220,18 @@ static u8 wx_encode_tx_desc_ptype(const struct wx_tx_buffer *first)</div><div class='ctx'> 			ptype = WX_PTYPE_TUN_IPV4;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case htons(ETH_P_IPV6):</div><div class='del'>-			wx_get_ipv6_proto(skb, skb_network_offset(skb), &amp;tun_prot);</div><div class='add'>+			l4_hdr = skb_transport_header(skb);</div><div class='add'>+			exthdr = skb_network_header(skb) + sizeof(struct ipv6hdr);</div><div class='add'>+			tun_prot = ipv6_hdr(skb)-&gt;nexthdr;</div><div class='add'>+			if (l4_hdr != exthdr)</div><div class='add'>+				ipv6_skip_exthdr(skb, exthdr - skb-&gt;data, &amp;tun_prot, &amp;frag_off);</div><div class='ctx'> 			ptype = WX_PTYPE_TUN_IPV6;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			return ptype;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (tun_prot == IPPROTO_IPIP) {</div><div class='add'>+		if (tun_prot == IPPROTO_IPIP || tun_prot == IPPROTO_IPV6) {</div><div class='ctx'> 			hdr.raw = (void *)inner_ip_hdr(skb);</div><div class='ctx'> 			ptype |= WX_PTYPE_PKT_IPIP;</div><div class='ctx'> 		} else if (tun_prot == IPPROTO_UDP) {</div><div class='hunk'>@@ -1166,7 +1268,11 @@ static u8 wx_encode_tx_desc_ptype(const struct wx_tx_buffer *first)</div><div class='ctx'> 			l4_prot = hdr.ipv4-&gt;protocol;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 6:</div><div class='del'>-			wx_get_ipv6_proto(skb, skb_inner_network_offset(skb), &amp;l4_prot);</div><div class='add'>+			l4_hdr = skb_inner_transport_header(skb);</div><div class='add'>+			exthdr = skb_inner_network_header(skb) + sizeof(struct ipv6hdr);</div><div class='add'>+			l4_prot = inner_ipv6_hdr(skb)-&gt;nexthdr;</div><div class='add'>+			if (l4_hdr != exthdr)</div><div class='add'>+				ipv6_skip_exthdr(skb, exthdr - skb-&gt;data, &amp;l4_prot, &amp;frag_off);</div><div class='ctx'> 			ptype |= WX_PTYPE_PKT_IPV6;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -1179,7 +1285,11 @@ static u8 wx_encode_tx_desc_ptype(const struct wx_tx_buffer *first)</div><div class='ctx'> 			ptype = WX_PTYPE_PKT_IP;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case htons(ETH_P_IPV6):</div><div class='del'>-			wx_get_ipv6_proto(skb, skb_network_offset(skb), &amp;l4_prot);</div><div class='add'>+			l4_hdr = skb_transport_header(skb);</div><div class='add'>+			exthdr = skb_network_header(skb) + sizeof(struct ipv6hdr);</div><div class='add'>+			l4_prot = ipv6_hdr(skb)-&gt;nexthdr;</div><div class='add'>+			if (l4_hdr != exthdr)</div><div class='add'>+				ipv6_skip_exthdr(skb, exthdr - skb-&gt;data, &amp;l4_prot, &amp;frag_off);</div><div class='ctx'> 			ptype = WX_PTYPE_PKT_IP | WX_PTYPE_PKT_IPV6;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -1269,13 +1379,20 @@ static int wx_tso(struct wx_ring *tx_ring, struct wx_tx_buffer *first,</div><div class='ctx'> </div><div class='ctx'> 	/* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */</div><div class='ctx'> 	if (enc) {</div><div class='add'>+		unsigned char *exthdr, *l4_hdr;</div><div class='add'>+		__be16 frag_off;</div><div class='add'>+</div><div class='ctx'> 		switch (first-&gt;protocol) {</div><div class='ctx'> 		case htons(ETH_P_IP):</div><div class='ctx'> 			tun_prot = ip_hdr(skb)-&gt;protocol;</div><div class='ctx'> 			first-&gt;tx_flags |= WX_TX_FLAGS_OUTER_IPV4;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case htons(ETH_P_IPV6):</div><div class='add'>+			l4_hdr = skb_transport_header(skb);</div><div class='add'>+			exthdr = skb_network_header(skb) + sizeof(struct ipv6hdr);</div><div class='ctx'> 			tun_prot = ipv6_hdr(skb)-&gt;nexthdr;</div><div class='add'>+			if (l4_hdr != exthdr)</div><div class='add'>+				ipv6_skip_exthdr(skb, exthdr - skb-&gt;data, &amp;tun_prot, &amp;frag_off);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1298,6 +1415,7 @@ static int wx_tso(struct wx_ring *tx_ring, struct wx_tx_buffer *first,</div><div class='ctx'> 						WX_TXD_TUNNEL_LEN_SHIFT);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case IPPROTO_IPIP:</div><div class='add'>+		case IPPROTO_IPV6:</div><div class='ctx'> 			tunhdr_eiplen_tunlen = (((char *)inner_ip_hdr(skb) -</div><div class='ctx'> 						(char *)ip_hdr(skb)) &gt;&gt; 2) &lt;&lt;</div><div class='ctx'> 						WX_TXD_OUTER_IPLEN_SHIFT;</div><div class='hunk'>@@ -1335,12 +1453,15 @@ static void wx_tx_csum(struct wx_ring *tx_ring, struct wx_tx_buffer *first,</div><div class='ctx'> 	u8 tun_prot = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (skb-&gt;ip_summed != CHECKSUM_PARTIAL) {</div><div class='add'>+csum_failed:</div><div class='ctx'> 		if (!(first-&gt;tx_flags &amp; WX_TX_FLAGS_HW_VLAN) &amp;&amp;</div><div class='ctx'> 		    !(first-&gt;tx_flags &amp; WX_TX_FLAGS_CC))</div><div class='ctx'> 			return;</div><div class='ctx'> 		vlan_macip_lens = skb_network_offset(skb) &lt;&lt;</div><div class='ctx'> 				  WX_TXD_MACLEN_SHIFT;</div><div class='ctx'> 	} else {</div><div class='add'>+		unsigned char *exthdr, *l4_hdr;</div><div class='add'>+		__be16 frag_off;</div><div class='ctx'> 		u8 l4_prot = 0;</div><div class='ctx'> 		union {</div><div class='ctx'> 			struct iphdr *ipv4;</div><div class='hunk'>@@ -1362,7 +1483,12 @@ static void wx_tx_csum(struct wx_ring *tx_ring, struct wx_tx_buffer *first,</div><div class='ctx'> 				tun_prot = ip_hdr(skb)-&gt;protocol;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case htons(ETH_P_IPV6):</div><div class='add'>+				l4_hdr = skb_transport_header(skb);</div><div class='add'>+				exthdr = skb_network_header(skb) + sizeof(struct ipv6hdr);</div><div class='ctx'> 				tun_prot = ipv6_hdr(skb)-&gt;nexthdr;</div><div class='add'>+				if (l4_hdr != exthdr)</div><div class='add'>+					ipv6_skip_exthdr(skb, exthdr - skb-&gt;data,</div><div class='add'>+							 &amp;tun_prot, &amp;frag_off);</div><div class='ctx'> 				break;</div><div class='ctx'> 			default:</div><div class='ctx'> 				return;</div><div class='hunk'>@@ -1386,6 +1512,7 @@ static void wx_tx_csum(struct wx_ring *tx_ring, struct wx_tx_buffer *first,</div><div class='ctx'> 							  WX_TXD_TUNNEL_LEN_SHIFT);</div><div class='ctx'> 				break;</div><div class='ctx'> 			case IPPROTO_IPIP:</div><div class='add'>+			case IPPROTO_IPV6:</div><div class='ctx'> 				tunhdr_eiplen_tunlen = (((char *)inner_ip_hdr(skb) -</div><div class='ctx'> 							(char *)ip_hdr(skb)) &gt;&gt; 2) &lt;&lt;</div><div class='ctx'> 							WX_TXD_OUTER_IPLEN_SHIFT;</div><div class='hunk'>@@ -1408,7 +1535,10 @@ static void wx_tx_csum(struct wx_ring *tx_ring, struct wx_tx_buffer *first,</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 6:</div><div class='ctx'> 			vlan_macip_lens |= (transport_hdr.raw - network_hdr.raw) &gt;&gt; 1;</div><div class='add'>+			exthdr = network_hdr.raw + sizeof(struct ipv6hdr);</div><div class='ctx'> 			l4_prot = network_hdr.ipv6-&gt;nexthdr;</div><div class='add'>+			if (transport_hdr.raw != exthdr)</div><div class='add'>+				ipv6_skip_exthdr(skb, exthdr - skb-&gt;data, &amp;l4_prot, &amp;frag_off);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1428,7 +1558,8 @@ static void wx_tx_csum(struct wx_ring *tx_ring, struct wx_tx_buffer *first,</div><div class='ctx'> 					WX_TXD_L4LEN_SHIFT;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			break;</div><div class='add'>+			skb_checksum_help(skb);</div><div class='add'>+			goto csum_failed;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* update TX checksum flag */</div><div class='hunk'>@@ -1486,6 +1617,20 @@ static netdev_tx_t wx_xmit_frame_ring(struct sk_buff *skb,</div><div class='ctx'> 		tx_flags |= WX_TX_FLAGS_HW_VLAN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (unlikely(skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP) &amp;&amp;</div><div class='add'>+	    wx-&gt;ptp_clock) {</div><div class='add'>+		if (wx-&gt;tstamp_config.tx_type == HWTSTAMP_TX_ON &amp;&amp;</div><div class='add'>+		    !test_and_set_bit_lock(WX_STATE_PTP_TX_IN_PROGRESS,</div><div class='add'>+					   wx-&gt;state)) {</div><div class='add'>+			skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+			tx_flags |= WX_TX_FLAGS_TSTAMP;</div><div class='add'>+			wx-&gt;ptp_tx_skb = skb_get(skb);</div><div class='add'>+			wx-&gt;ptp_tx_start = jiffies;</div><div class='add'>+		} else {</div><div class='add'>+			wx-&gt;tx_hwtstamp_skipped++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* record initial flags and protocol */</div><div class='ctx'> 	first-&gt;tx_flags = tx_flags;</div><div class='ctx'> 	first-&gt;protocol = vlan_get_protocol(skb);</div><div class='hunk'>@@ -1501,12 +1646,20 @@ static netdev_tx_t wx_xmit_frame_ring(struct sk_buff *skb,</div><div class='ctx'> 	if (test_bit(WX_FLAG_FDIR_CAPABLE, wx-&gt;flags) &amp;&amp; tx_ring-&gt;atr_sample_rate)</div><div class='ctx'> 		wx-&gt;atr(tx_ring, first, ptype);</div><div class='ctx'> </div><div class='del'>-	wx_tx_map(tx_ring, first, hdr_len);</div><div class='add'>+	if (wx_tx_map(tx_ring, first, hdr_len))</div><div class='add'>+		goto cleanup_tx_tstamp;</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> out_drop:</div><div class='ctx'> 	dev_kfree_skb_any(first-&gt;skb);</div><div class='ctx'> 	first-&gt;skb = NULL;</div><div class='add'>+cleanup_tx_tstamp:</div><div class='add'>+	if (unlikely(tx_flags &amp; WX_TX_FLAGS_TSTAMP)) {</div><div class='add'>+		dev_kfree_skb_any(wx-&gt;ptp_tx_skb);</div><div class='add'>+		wx-&gt;ptp_tx_skb = NULL;</div><div class='add'>+		wx-&gt;tx_hwtstamp_errors++;</div><div class='add'>+		clear_bit_unlock(WX_STATE_PTP_TX_IN_PROGRESS, wx-&gt;state);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -1537,6 +1690,65 @@ netdev_tx_t wx_xmit_frame(struct sk_buff *skb,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_xmit_frame);</div><div class='ctx'> </div><div class='add'>+static void wx_set_itr(struct wx_q_vector *q_vector)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = q_vector-&gt;wx;</div><div class='add'>+	u32 new_itr;</div><div class='add'>+</div><div class='add'>+	if (!wx-&gt;adaptive_itr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* use the smallest value of new ITR delay calculations */</div><div class='add'>+	new_itr = min(q_vector-&gt;rx.itr, q_vector-&gt;tx.itr);</div><div class='add'>+	new_itr &lt;&lt;= 2;</div><div class='add'>+</div><div class='add'>+	if (new_itr != q_vector-&gt;itr) {</div><div class='add'>+		/* save the algorithm value here */</div><div class='add'>+		q_vector-&gt;itr = new_itr;</div><div class='add'>+</div><div class='add'>+		if (wx-&gt;pdev-&gt;is_virtfn)</div><div class='add'>+			wx_write_eitr_vf(q_vector);</div><div class='add'>+		else</div><div class='add'>+			wx_write_eitr(q_vector);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_rx_dim_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct dim *dim = container_of(work, struct dim, work);</div><div class='add'>+	struct dim_cq_moder rx_moder;</div><div class='add'>+	struct wx_ring_container *rx;</div><div class='add'>+	struct wx_q_vector *q_vector;</div><div class='add'>+</div><div class='add'>+	rx = container_of(dim, struct wx_ring_container, dim);</div><div class='add'>+</div><div class='add'>+	rx_moder = net_dim_get_rx_moderation(dim-&gt;mode, dim-&gt;profile_ix);</div><div class='add'>+	rx-&gt;itr = rx_moder.usec;</div><div class='add'>+</div><div class='add'>+	q_vector = container_of(rx, struct wx_q_vector, rx);</div><div class='add'>+	wx_set_itr(q_vector);</div><div class='add'>+</div><div class='add'>+	dim-&gt;state = DIM_START_MEASURE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_tx_dim_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct dim *dim = container_of(work, struct dim, work);</div><div class='add'>+	struct dim_cq_moder tx_moder;</div><div class='add'>+	struct wx_ring_container *tx;</div><div class='add'>+	struct wx_q_vector *q_vector;</div><div class='add'>+</div><div class='add'>+	tx = container_of(dim, struct wx_ring_container, dim);</div><div class='add'>+</div><div class='add'>+	tx_moder = net_dim_get_tx_moderation(dim-&gt;mode, dim-&gt;profile_ix);</div><div class='add'>+	tx-&gt;itr = tx_moder.usec;</div><div class='add'>+</div><div class='add'>+	q_vector = container_of(tx, struct wx_q_vector, tx);</div><div class='add'>+	wx_set_itr(q_vector);</div><div class='add'>+</div><div class='add'>+	dim-&gt;state = DIM_START_MEASURE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void wx_napi_enable_all(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	struct wx_q_vector *q_vector;</div><div class='hunk'>@@ -1544,6 +1756,11 @@ void wx_napi_enable_all(struct wx *wx)</div><div class='ctx'> </div><div class='ctx'> 	for (q_idx = 0; q_idx &lt; wx-&gt;num_q_vectors; q_idx++) {</div><div class='ctx'> 		q_vector = wx-&gt;q_vector[q_idx];</div><div class='add'>+</div><div class='add'>+		INIT_WORK(&amp;q_vector-&gt;rx.dim.work, wx_rx_dim_work);</div><div class='add'>+		INIT_WORK(&amp;q_vector-&gt;tx.dim.work, wx_tx_dim_work);</div><div class='add'>+		q_vector-&gt;rx.dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_CQE;</div><div class='add'>+		q_vector-&gt;tx.dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_CQE;</div><div class='ctx'> 		napi_enable(&amp;q_vector-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1557,10 +1774,71 @@ void wx_napi_disable_all(struct wx *wx)</div><div class='ctx'> 	for (q_idx = 0; q_idx &lt; wx-&gt;num_q_vectors; q_idx++) {</div><div class='ctx'> 		q_vector = wx-&gt;q_vector[q_idx];</div><div class='ctx'> 		napi_disable(&amp;q_vector-&gt;napi);</div><div class='add'>+		disable_work_sync(&amp;q_vector-&gt;rx.dim.work);</div><div class='add'>+		disable_work_sync(&amp;q_vector-&gt;tx.dim.work);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_napi_disable_all);</div><div class='ctx'> </div><div class='add'>+static bool wx_set_vmdq_queues(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u16 vmdq_i = wx-&gt;ring_feature[RING_F_VMDQ].limit;</div><div class='add'>+	u16 rss_i = wx-&gt;ring_feature[RING_F_RSS].limit;</div><div class='add'>+	u16 rss_m = WX_RSS_DISABLED_MASK;</div><div class='add'>+	u16 vmdq_m = 0;</div><div class='add'>+</div><div class='add'>+	/* only proceed if VMDq is enabled */</div><div class='add'>+	if (!test_bit(WX_FLAG_VMDQ_ENABLED, wx-&gt;flags))</div><div class='add'>+		return false;</div><div class='add'>+	/* Add starting offset to total pool count */</div><div class='add'>+	vmdq_i += wx-&gt;ring_feature[RING_F_VMDQ].offset;</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+		/* double check we are limited to maximum pools */</div><div class='add'>+		vmdq_i = min_t(u16, 64, vmdq_i);</div><div class='add'>+</div><div class='add'>+		/* 64 pool mode with 2 queues per pool, or</div><div class='add'>+		 * 16/32/64 pool mode with 1 queue per pool</div><div class='add'>+		 */</div><div class='add'>+		if (vmdq_i &gt; 32 || rss_i &lt; 4) {</div><div class='add'>+			vmdq_m = WX_VMDQ_2Q_MASK;</div><div class='add'>+			rss_m = WX_RSS_2Q_MASK;</div><div class='add'>+			rss_i = min_t(u16, rss_i, 2);</div><div class='add'>+		/* 32 pool mode with 4 queues per pool */</div><div class='add'>+		} else {</div><div class='add'>+			vmdq_m = WX_VMDQ_4Q_MASK;</div><div class='add'>+			rss_m = WX_RSS_4Q_MASK;</div><div class='add'>+			rss_i = 4;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* double check we are limited to maximum pools */</div><div class='add'>+		vmdq_i = min_t(u16, 8, vmdq_i);</div><div class='add'>+</div><div class='add'>+		/* when VMDQ on, disable RSS */</div><div class='add'>+		rss_i = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* remove the starting offset from the pool count */</div><div class='add'>+	vmdq_i -= wx-&gt;ring_feature[RING_F_VMDQ].offset;</div><div class='add'>+</div><div class='add'>+	/* save features for later use */</div><div class='add'>+	wx-&gt;ring_feature[RING_F_VMDQ].indices = vmdq_i;</div><div class='add'>+	wx-&gt;ring_feature[RING_F_VMDQ].mask = vmdq_m;</div><div class='add'>+</div><div class='add'>+	/* limit RSS based on user input and save for later use */</div><div class='add'>+	wx-&gt;ring_feature[RING_F_RSS].indices = rss_i;</div><div class='add'>+	wx-&gt;ring_feature[RING_F_RSS].mask = rss_m;</div><div class='add'>+</div><div class='add'>+	wx-&gt;queues_per_pool = rss_i;/*maybe same to num_rx_queues_per_pool*/</div><div class='add'>+	wx-&gt;num_rx_pools = vmdq_i;</div><div class='add'>+	wx-&gt;num_rx_queues_per_pool = rss_i;</div><div class='add'>+</div><div class='add'>+	wx-&gt;num_rx_queues = vmdq_i * rss_i;</div><div class='add'>+	wx-&gt;num_tx_queues = vmdq_i * rss_i;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * wx_set_rss_queues: Allocate queues for RSS</div><div class='ctx'>  * @wx: board private structure to initialize</div><div class='hunk'>@@ -1575,6 +1853,10 @@ static void wx_set_rss_queues(struct wx *wx)</div><div class='ctx'> </div><div class='ctx'> 	/* set mask for 16 queue limit of RSS */</div><div class='ctx'> 	f = &amp;wx-&gt;ring_feature[RING_F_RSS];</div><div class='add'>+	if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags))</div><div class='add'>+		f-&gt;mask = WX_RSS_64Q_MASK;</div><div class='add'>+	else</div><div class='add'>+		f-&gt;mask = WX_RSS_8Q_MASK;</div><div class='ctx'> 	f-&gt;indices = f-&gt;limit;</div><div class='ctx'> </div><div class='ctx'> 	if (!(test_bit(WX_FLAG_FDIR_CAPABLE, wx-&gt;flags)))</div><div class='hunk'>@@ -1582,6 +1864,7 @@ static void wx_set_rss_queues(struct wx *wx)</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(WX_FLAG_FDIR_HASH, wx-&gt;flags);</div><div class='ctx'> </div><div class='add'>+	wx-&gt;ring_feature[RING_F_FDIR].indices = 1;</div><div class='ctx'> 	/* Use Flow Director in addition to RSS to ensure the best</div><div class='ctx'> 	 * distribution of flows across cores, even when an FDIR flow</div><div class='ctx'> 	 * isn't matched.</div><div class='hunk'>@@ -1607,6 +1890,9 @@ static void wx_set_num_queues(struct wx *wx)</div><div class='ctx'> 	wx-&gt;num_tx_queues = 1;</div><div class='ctx'> 	wx-&gt;queues_per_pool = 1;</div><div class='ctx'> </div><div class='add'>+	if (wx_set_vmdq_queues(wx))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	wx_set_rss_queues(wx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1620,7 +1906,7 @@ static void wx_set_num_queues(struct wx *wx)</div><div class='ctx'>  */</div><div class='ctx'> static int wx_acquire_msix_vectors(struct wx *wx)</div><div class='ctx'> {</div><div class='del'>-	struct irq_affinity affd = { .pre_vectors = 1 };</div><div class='add'>+	struct irq_affinity affd = { .post_vectors = 1 };</div><div class='ctx'> 	int nvecs, i;</div><div class='ctx'> </div><div class='ctx'> 	/* We start by asking for one vector per queue pair */</div><div class='hunk'>@@ -1657,16 +1943,24 @@ static int wx_acquire_msix_vectors(struct wx *wx)</div><div class='ctx'> 		return nvecs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wx-&gt;msix_entry-&gt;entry = 0;</div><div class='del'>-	wx-&gt;msix_entry-&gt;vector = pci_irq_vector(wx-&gt;pdev, 0);</div><div class='ctx'> 	nvecs -= 1;</div><div class='ctx'> 	for (i = 0; i &lt; nvecs; i++) {</div><div class='ctx'> 		wx-&gt;msix_q_entries[i].entry = i;</div><div class='del'>-		wx-&gt;msix_q_entries[i].vector = pci_irq_vector(wx-&gt;pdev, i + 1);</div><div class='add'>+		wx-&gt;msix_q_entries[i].vector = pci_irq_vector(wx-&gt;pdev, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	wx-&gt;num_q_vectors = nvecs;</div><div class='ctx'> </div><div class='add'>+	wx-&gt;msix_entry-&gt;entry = nvecs;</div><div class='add'>+	wx-&gt;msix_entry-&gt;vector = pci_irq_vector(wx-&gt;pdev, nvecs);</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_FLAG_IRQ_VECTOR_SHARED, wx-&gt;flags)) {</div><div class='add'>+		wx-&gt;msix_entry-&gt;entry = 0;</div><div class='add'>+		wx-&gt;msix_entry-&gt;vector = pci_irq_vector(wx-&gt;pdev, 0);</div><div class='add'>+		wx-&gt;msix_q_entries[0].entry = 0;</div><div class='add'>+		wx-&gt;msix_q_entries[0].vector = pci_irq_vector(wx-&gt;pdev, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1684,9 +1978,13 @@ static int wx_set_interrupt_capability(struct wx *wx)</div><div class='ctx'> </div><div class='ctx'> 	/* We will try to get MSI-X interrupts first */</div><div class='ctx'> 	ret = wx_acquire_msix_vectors(wx);</div><div class='del'>-	if (ret == 0 || (ret == -ENOMEM))</div><div class='add'>+	if (ret == 0 || (ret == -ENOMEM) || pdev-&gt;is_virtfn)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	/* Disable VMDq support */</div><div class='add'>+	dev_warn(&amp;wx-&gt;pdev-&gt;dev, "Disabling VMQQ support\n");</div><div class='add'>+	clear_bit(WX_FLAG_VMDQ_ENABLED, wx-&gt;flags);</div><div class='add'>+</div><div class='ctx'> 	/* Disable RSS */</div><div class='ctx'> 	dev_warn(&amp;wx-&gt;pdev-&gt;dev, "Disabling RSS support\n");</div><div class='ctx'> 	wx-&gt;ring_feature[RING_F_RSS].limit = 1;</div><div class='hunk'>@@ -1713,6 +2011,49 @@ static int wx_set_interrupt_capability(struct wx *wx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool wx_cache_ring_vmdq(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct wx_ring_feature *vmdq = &amp;wx-&gt;ring_feature[RING_F_VMDQ];</div><div class='add'>+	struct wx_ring_feature *rss = &amp;wx-&gt;ring_feature[RING_F_RSS];</div><div class='add'>+	u16 reg_idx;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* only proceed if VMDq is enabled */</div><div class='add'>+	if (!test_bit(WX_FLAG_VMDQ_ENABLED, wx-&gt;flags))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+		/* start at VMDq register offset for SR-IOV enabled setups */</div><div class='add'>+		reg_idx = vmdq-&gt;offset * __ALIGN_MASK(1, ~vmdq-&gt;mask);</div><div class='add'>+		for (i = 0; i &lt; wx-&gt;num_rx_queues; i++, reg_idx++) {</div><div class='add'>+			/* If we are greater than indices move to next pool */</div><div class='add'>+			if ((reg_idx &amp; ~vmdq-&gt;mask) &gt;= rss-&gt;indices)</div><div class='add'>+				reg_idx = __ALIGN_MASK(reg_idx, ~vmdq-&gt;mask);</div><div class='add'>+			wx-&gt;rx_ring[i]-&gt;reg_idx = reg_idx;</div><div class='add'>+		}</div><div class='add'>+		reg_idx = vmdq-&gt;offset * __ALIGN_MASK(1, ~vmdq-&gt;mask);</div><div class='add'>+		for (i = 0; i &lt; wx-&gt;num_tx_queues; i++, reg_idx++) {</div><div class='add'>+			/* If we are greater than indices move to next pool */</div><div class='add'>+			if ((reg_idx &amp; rss-&gt;mask) &gt;= rss-&gt;indices)</div><div class='add'>+				reg_idx = __ALIGN_MASK(reg_idx, ~vmdq-&gt;mask);</div><div class='add'>+			wx-&gt;tx_ring[i]-&gt;reg_idx = reg_idx;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* start at VMDq register offset for SR-IOV enabled setups */</div><div class='add'>+		reg_idx = vmdq-&gt;offset;</div><div class='add'>+		for (i = 0; i &lt; wx-&gt;num_rx_queues; i++)</div><div class='add'>+			/* If we are greater than indices move to next pool */</div><div class='add'>+			wx-&gt;rx_ring[i]-&gt;reg_idx = reg_idx + i;</div><div class='add'>+</div><div class='add'>+		reg_idx = vmdq-&gt;offset;</div><div class='add'>+		for (i = 0; i &lt; wx-&gt;num_tx_queues; i++)</div><div class='add'>+			/* If we are greater than indices move to next pool */</div><div class='add'>+			wx-&gt;tx_ring[i]-&gt;reg_idx = reg_idx + i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * wx_cache_ring_rss - Descriptor ring to register mapping for RSS</div><div class='ctx'>  * @wx: board private structure to initialize</div><div class='hunk'>@@ -1724,6 +2065,9 @@ static void wx_cache_ring_rss(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	u16 i;</div><div class='ctx'> </div><div class='add'>+	if (wx_cache_ring_vmdq(wx))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; wx-&gt;num_rx_queues; i++)</div><div class='ctx'> 		wx-&gt;rx_ring[i]-&gt;reg_idx = i;</div><div class='ctx'> </div><div class='hunk'>@@ -1781,10 +2125,17 @@ static int wx_alloc_q_vector(struct wx *wx,</div><div class='ctx'> 	/* initialize pointer to rings */</div><div class='ctx'> 	ring = q_vector-&gt;ring;</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp)</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_sp:</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+	case wx_mac_aml40:</div><div class='ctx'> 		default_itr = WX_12K_ITR;</div><div class='del'>-	else</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='ctx'> 		default_itr = WX_7K_ITR;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* initialize ITR */</div><div class='ctx'> 	if (txr_count &amp;&amp; !rxr_count)</div><div class='ctx'> 		/* tx only vector */</div><div class='hunk'>@@ -1978,7 +2329,12 @@ int wx_init_interrupt_scheme(struct wx *wx)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Number of supported queues */</div><div class='del'>-	wx_set_num_queues(wx);</div><div class='add'>+	if (wx-&gt;pdev-&gt;is_virtfn) {</div><div class='add'>+		if (wx-&gt;set_num_queues)</div><div class='add'>+			wx-&gt;set_num_queues(wx);</div><div class='add'>+	} else {</div><div class='add'>+		wx_set_num_queues(wx);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set interrupt mode */</div><div class='ctx'> 	ret = wx_set_interrupt_capability(wx);</div><div class='hunk'>@@ -2006,8 +2362,10 @@ irqreturn_t wx_msix_clean_rings(int __always_unused irq, void *data)</div><div class='ctx'> 	struct wx_q_vector *q_vector = data;</div><div class='ctx'> </div><div class='ctx'> 	/* EIAM disabled interrupts (on this vector) for us */</div><div class='del'>-	if (q_vector-&gt;rx.ring || q_vector-&gt;tx.ring)</div><div class='add'>+	if (q_vector-&gt;rx.ring || q_vector-&gt;tx.ring) {</div><div class='ctx'> 		napi_schedule_irqoff(&amp;q_vector-&gt;napi);</div><div class='add'>+		q_vector-&gt;total_events++;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -2108,6 +2466,8 @@ static void wx_set_ivar(struct wx *wx, s8 direction,</div><div class='ctx'> </div><div class='ctx'> 	if (direction == -1) {</div><div class='ctx'> 		/* other causes */</div><div class='add'>+		if (test_bit(WX_FLAG_IRQ_VECTOR_SHARED, wx-&gt;flags))</div><div class='add'>+			msix_vector = 0;</div><div class='ctx'> 		msix_vector |= WX_PX_IVAR_ALLOC_VAL;</div><div class='ctx'> 		index = 0;</div><div class='ctx'> 		ivar = rd32(wx, WX_PX_MISC_IVAR);</div><div class='hunk'>@@ -2116,7 +2476,6 @@ static void wx_set_ivar(struct wx *wx, s8 direction,</div><div class='ctx'> 		wr32(wx, WX_PX_MISC_IVAR, ivar);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* tx or rx causes */</div><div class='del'>-		msix_vector += 1; /* offset for queue vectors */</div><div class='ctx'> 		msix_vector |= WX_PX_IVAR_ALLOC_VAL;</div><div class='ctx'> 		index = ((16 * (queue &amp; 1)) + (8 * direction));</div><div class='ctx'> 		ivar = rd32(wx, WX_PX_IVAR(queue &gt;&gt; 1));</div><div class='hunk'>@@ -2140,14 +2499,22 @@ void wx_write_eitr(struct wx_q_vector *q_vector)</div><div class='ctx'> 	int v_idx = q_vector-&gt;v_idx;</div><div class='ctx'> 	u32 itr_reg;</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp)</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_sp:</div><div class='ctx'> 		itr_reg = q_vector-&gt;itr &amp; WX_SP_MAX_EITR;</div><div class='del'>-	else</div><div class='add'>+		break;</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+	case wx_mac_aml40:</div><div class='add'>+		itr_reg = (q_vector-&gt;itr &gt;&gt; 3) &amp; WX_AML_MAX_EITR;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='ctx'> 		itr_reg = q_vector-&gt;itr &amp; WX_EM_MAX_EITR;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	itr_reg |= WX_PX_ITR_CNT_WDIS;</div><div class='ctx'> </div><div class='del'>-	wr32(wx, WX_PX_ITR(v_idx + 1), itr_reg);</div><div class='add'>+	wr32(wx, WX_PX_ITR(v_idx), itr_reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2161,10 +2528,17 @@ void wx_configure_vectors(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	struct pci_dev *pdev = wx-&gt;pdev;</div><div class='ctx'> 	u32 eitrsel = 0;</div><div class='del'>-	u16 v_idx;</div><div class='add'>+	u16 v_idx, i;</div><div class='ctx'> </div><div class='ctx'> 	if (pdev-&gt;msix_enabled) {</div><div class='ctx'> 		/* Populate MSIX to EITR Select */</div><div class='add'>+		if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+			if (wx-&gt;num_vfs &gt;= 32)</div><div class='add'>+				eitrsel = BIT(wx-&gt;num_vfs % 32) - 1;</div><div class='add'>+		} else {</div><div class='add'>+			for (i = 0; i &lt; wx-&gt;num_vfs; i++)</div><div class='add'>+				eitrsel |= BIT(i);</div><div class='add'>+		}</div><div class='ctx'> 		wr32(wx, WX_PX_ITRSEL, eitrsel);</div><div class='ctx'> 		/* use EIAM to auto-mask when MSI-X interrupt is asserted</div><div class='ctx'> 		 * this saves a register write for every interrupt</div><div class='hunk'>@@ -2193,9 +2567,9 @@ void wx_configure_vectors(struct wx *wx)</div><div class='ctx'> 		wx_write_eitr(q_vector);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wx_set_ivar(wx, -1, 0, 0);</div><div class='add'>+	wx_set_ivar(wx, -1, 0, v_idx);</div><div class='ctx'> 	if (pdev-&gt;msix_enabled)</div><div class='del'>-		wr32(wx, WX_PX_ITR(0), 1950);</div><div class='add'>+		wr32(wx, WX_PX_ITR(v_idx), 1950);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_configure_vectors);</div><div class='ctx'> </div><div class='hunk'>@@ -2215,9 +2589,6 @@ static void wx_clean_rx_ring(struct wx_ring *rx_ring)</div><div class='ctx'> 		if (rx_buffer-&gt;skb) {</div><div class='ctx'> 			struct sk_buff *skb = rx_buffer-&gt;skb;</div><div class='ctx'> </div><div class='del'>-			if (WX_CB(skb)-&gt;page_released)</div><div class='del'>-				page_pool_put_full_page(rx_ring-&gt;page_pool, rx_buffer-&gt;page, false);</div><div class='del'>-</div><div class='ctx'> 			dev_kfree_skb(skb);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2227,7 +2598,7 @@ static void wx_clean_rx_ring(struct wx_ring *rx_ring)</div><div class='ctx'> 		dma_sync_single_range_for_cpu(rx_ring-&gt;dev,</div><div class='ctx'> 					      rx_buffer-&gt;dma,</div><div class='ctx'> 					      rx_buffer-&gt;page_offset,</div><div class='del'>-					      WX_RX_BUFSZ,</div><div class='add'>+					      rx_ring-&gt;rx_buf_len,</div><div class='ctx'> 					      DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 		/* free resources associated with mapping */</div><div class='hunk'>@@ -2241,6 +2612,9 @@ static void wx_clean_rx_ring(struct wx_ring *rx_ring)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Zero out the descriptor ring */</div><div class='add'>+	memset(rx_ring-&gt;desc, 0, rx_ring-&gt;size);</div><div class='add'>+</div><div class='ctx'> 	rx_ring-&gt;next_to_alloc = 0;</div><div class='ctx'> 	rx_ring-&gt;next_to_clean = 0;</div><div class='ctx'> 	rx_ring-&gt;next_to_use = 0;</div><div class='hunk'>@@ -2375,6 +2749,16 @@ void wx_clean_all_tx_rings(struct wx *wx)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_clean_all_tx_rings);</div><div class='ctx'> </div><div class='add'>+static void wx_free_headwb_resources(struct wx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	if (!tx_ring-&gt;headwb_mem)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(tx_ring-&gt;dev, sizeof(u32),</div><div class='add'>+			  tx_ring-&gt;headwb_mem, tx_ring-&gt;headwb_dma);</div><div class='add'>+	tx_ring-&gt;headwb_mem = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * wx_free_tx_resources - Free Tx Resources per Queue</div><div class='ctx'>  * @tx_ring: Tx descriptor ring for a specific queue</div><div class='hunk'>@@ -2394,6 +2778,8 @@ static void wx_free_tx_resources(struct wx_ring *tx_ring)</div><div class='ctx'> 	dma_free_coherent(tx_ring-&gt;dev, tx_ring-&gt;size,</div><div class='ctx'> 			  tx_ring-&gt;desc, tx_ring-&gt;dma);</div><div class='ctx'> 	tx_ring-&gt;desc = NULL;</div><div class='add'>+</div><div class='add'>+	wx_free_headwb_resources(tx_ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2423,13 +2809,14 @@ static int wx_alloc_page_pool(struct wx_ring *rx_ring)</div><div class='ctx'> </div><div class='ctx'> 	struct page_pool_params pp_params = {</div><div class='ctx'> 		.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV,</div><div class='del'>-		.order = 0,</div><div class='del'>-		.pool_size = rx_ring-&gt;size,</div><div class='add'>+		.order = wx_rx_pg_order(rx_ring),</div><div class='add'>+		.pool_size = rx_ring-&gt;count * rx_ring-&gt;rx_buf_len /</div><div class='add'>+			     wx_rx_pg_size(rx_ring),</div><div class='ctx'> 		.nid = dev_to_node(rx_ring-&gt;dev),</div><div class='ctx'> 		.dev = rx_ring-&gt;dev,</div><div class='ctx'> 		.dma_dir = DMA_FROM_DEVICE,</div><div class='ctx'> 		.offset = 0,</div><div class='del'>-		.max_len = PAGE_SIZE,</div><div class='add'>+		.max_len = wx_rx_pg_size(rx_ring),</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	rx_ring-&gt;page_pool = page_pool_create(&amp;pp_params);</div><div class='hunk'>@@ -2532,6 +2919,24 @@ err_setup_rx:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void wx_setup_headwb_resources(struct wx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(tx_ring-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_TXHEAD_WB_ENABLED, wx-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!tx_ring-&gt;q_vector)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;headwb_mem = dma_alloc_coherent(tx_ring-&gt;dev,</div><div class='add'>+						 sizeof(u32),</div><div class='add'>+						 &amp;tx_ring-&gt;headwb_dma,</div><div class='add'>+						 GFP_KERNEL);</div><div class='add'>+	if (!tx_ring-&gt;headwb_mem)</div><div class='add'>+		dev_info(tx_ring-&gt;dev, "Allocate headwb memory failed, disable it\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * wx_setup_tx_resources - allocate Tx resources (Descriptors)</div><div class='ctx'>  * @tx_ring: tx descriptor ring (for a specific queue) to setup</div><div class='hunk'>@@ -2572,6 +2977,8 @@ static int wx_setup_tx_resources(struct wx_ring *tx_ring)</div><div class='ctx'> 	if (!tx_ring-&gt;desc)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='add'>+	wx_setup_headwb_resources(tx_ring);</div><div class='add'>+</div><div class='ctx'> 	tx_ring-&gt;next_to_use = 0;</div><div class='ctx'> 	tx_ring-&gt;next_to_clean = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2708,24 +3115,35 @@ int wx_set_features(struct net_device *netdev, netdev_features_t features)</div><div class='ctx'> 	struct wx *wx = netdev_priv(netdev);</div><div class='ctx'> 	bool need_reset = false;</div><div class='ctx'> </div><div class='del'>-	if (features &amp; NETIF_F_RXHASH) {</div><div class='del'>-		wr32m(wx, WX_RDB_RA_CTL, WX_RDB_RA_CTL_RSS_EN,</div><div class='del'>-		      WX_RDB_RA_CTL_RSS_EN);</div><div class='del'>-		wx-&gt;rss_enabled = true;</div><div class='del'>-	} else {</div><div class='del'>-		wr32m(wx, WX_RDB_RA_CTL, WX_RDB_RA_CTL_RSS_EN, 0);</div><div class='del'>-		wx-&gt;rss_enabled = false;</div><div class='del'>-	}</div><div class='add'>+	wx-&gt;rss_enabled = !!(features &amp; NETIF_F_RXHASH);</div><div class='add'>+	wx_enable_rss(wx, wx-&gt;rss_enabled);</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;features = features;</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;mac.type == wx_mac_sp &amp;&amp; changed &amp; NETIF_F_HW_VLAN_CTAG_RX)</div><div class='add'>+	if (changed &amp; NETIF_F_HW_VLAN_CTAG_RX &amp;&amp; wx-&gt;do_reset)</div><div class='ctx'> 		wx-&gt;do_reset(netdev);</div><div class='ctx'> 	else if (changed &amp; (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER))</div><div class='ctx'> 		wx_set_rx_mode(netdev);</div><div class='ctx'> </div><div class='add'>+	if (test_bit(WX_FLAG_RSC_CAPABLE, wx-&gt;flags)) {</div><div class='add'>+		if (!(features &amp; NETIF_F_LRO)) {</div><div class='add'>+			if (test_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags))</div><div class='add'>+				need_reset = true;</div><div class='add'>+			clear_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags);</div><div class='add'>+		} else if (!(test_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags))) {</div><div class='add'>+			if (wx-&gt;rx_itr_setting == 1 ||</div><div class='add'>+			    wx-&gt;rx_itr_setting &gt; WX_MIN_RSC_ITR) {</div><div class='add'>+				set_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags);</div><div class='add'>+				need_reset = true;</div><div class='add'>+			} else if (changed &amp; NETIF_F_LRO) {</div><div class='add'>+				dev_info(&amp;wx-&gt;pdev-&gt;dev,</div><div class='add'>+					 "rx-usecs set too low, disable RSC\n");</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!(test_bit(WX_FLAG_FDIR_CAPABLE, wx-&gt;flags)))</div><div class='del'>-		return 0;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* Check if Flow Director n-tuple support was enabled or disabled.  If</div><div class='ctx'> 	 * the state changed, we need to reset.</div><div class='hunk'>@@ -2751,7 +3169,8 @@ int wx_set_features(struct net_device *netdev, netdev_features_t features)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (need_reset)</div><div class='add'>+out:</div><div class='add'>+	if (need_reset &amp;&amp; wx-&gt;do_reset)</div><div class='ctx'> 		wx-&gt;do_reset(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2800,10 +3219,45 @@ netdev_features_t wx_fix_features(struct net_device *netdev,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* If Rx checksum is disabled, then RSC/LRO should also be disabled */</div><div class='add'>+	if (!(features &amp; NETIF_F_RXCSUM))</div><div class='add'>+		features &amp;= ~NETIF_F_LRO;</div><div class='add'>+</div><div class='add'>+	/* Turn off LRO if not RSC capable */</div><div class='add'>+	if (!test_bit(WX_FLAG_RSC_CAPABLE, wx-&gt;flags))</div><div class='add'>+		features &amp;= ~NETIF_F_LRO;</div><div class='add'>+</div><div class='ctx'> 	return features;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_fix_features);</div><div class='ctx'> </div><div class='add'>+#define WX_MAX_TUNNEL_HDR_LEN	80</div><div class='add'>+netdev_features_t wx_features_check(struct sk_buff *skb,</div><div class='add'>+				    struct net_device *netdev,</div><div class='add'>+				    netdev_features_t features)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (!skb-&gt;encapsulation)</div><div class='add'>+		return features;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_em)</div><div class='add'>+		return features &amp; ~NETIF_F_CSUM_MASK;</div><div class='add'>+</div><div class='add'>+	if (unlikely(skb_inner_mac_header(skb) - skb_transport_header(skb) &gt;</div><div class='add'>+		     WX_MAX_TUNNEL_HDR_LEN))</div><div class='add'>+		return features &amp; ~NETIF_F_CSUM_MASK;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;inner_protocol_type == ENCAP_TYPE_ETHER &amp;&amp;</div><div class='add'>+	    skb-&gt;inner_protocol != htons(ETH_P_IP) &amp;&amp;</div><div class='add'>+	    skb-&gt;inner_protocol != htons(ETH_P_IPV6) &amp;&amp;</div><div class='add'>+	    skb-&gt;inner_protocol != htons(ETH_P_TEB))</div><div class='add'>+		return features &amp; ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);</div><div class='add'>+</div><div class='add'>+	return features;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_features_check);</div><div class='add'>+</div><div class='ctx'> void wx_set_ring(struct wx *wx, u32 new_tx_count,</div><div class='ctx'> 		 u32 new_rx_count, struct wx_ring *temp_ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -2870,5 +3324,35 @@ void wx_set_ring(struct wx *wx, u32 new_tx_count,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(wx_set_ring);</div><div class='ctx'> </div><div class='add'>+void wx_service_event_schedule(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	if (!test_and_set_bit(WX_STATE_SERVICE_SCHED, wx-&gt;state))</div><div class='add'>+		queue_work(system_power_efficient_wq, &amp;wx-&gt;service_task);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_service_event_schedule);</div><div class='add'>+</div><div class='add'>+void wx_service_event_complete(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON(!test_bit(WX_STATE_SERVICE_SCHED, wx-&gt;state)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* flush memory to make sure state is correct before next watchdog */</div><div class='add'>+	smp_mb__before_atomic();</div><div class='add'>+	clear_bit(WX_STATE_SERVICE_SCHED, wx-&gt;state);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_service_event_complete);</div><div class='add'>+</div><div class='add'>+void wx_service_timer(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = timer_container_of(wx, t, service_timer);</div><div class='add'>+	unsigned long next_event_offset = HZ * 2;</div><div class='add'>+</div><div class='add'>+	/* Reset the timer */</div><div class='add'>+	mod_timer(&amp;wx-&gt;service_timer, next_event_offset + jiffies);</div><div class='add'>+</div><div class='add'>+	wx_service_event_schedule(wx);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_service_timer);</div><div class='add'>+</div><div class='ctx'> MODULE_DESCRIPTION("Common library for Wangxun(R) Ethernet drivers.");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_lib.h b/drivers/net/ethernet/wangxun/libwx/wx_lib.h<br/>index fdeb0c315b75..aed6ea8cf0d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_lib.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_lib.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_lib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_lib.h</a></div><div class='hunk'>@@ -33,7 +33,13 @@ void wx_get_stats64(struct net_device *netdev,</div><div class='ctx'> int wx_set_features(struct net_device *netdev, netdev_features_t features);</div><div class='ctx'> netdev_features_t wx_fix_features(struct net_device *netdev,</div><div class='ctx'> 				  netdev_features_t features);</div><div class='add'>+netdev_features_t wx_features_check(struct sk_buff *skb,</div><div class='add'>+				    struct net_device *netdev,</div><div class='add'>+				    netdev_features_t features);</div><div class='ctx'> void wx_set_ring(struct wx *wx, u32 new_tx_count,</div><div class='ctx'> 		 u32 new_rx_count, struct wx_ring *temp_ring);</div><div class='add'>+void wx_service_event_schedule(struct wx *wx);</div><div class='add'>+void wx_service_event_complete(struct wx *wx);</div><div class='add'>+void wx_service_timer(struct timer_list *t);</div><div class='ctx'> </div><div class='del'>-#endif /* _NGBE_LIB_H_ */</div><div class='add'>+#endif /* _WX_LIB_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_mbx.c b/drivers/net/ethernet/wangxun/libwx/wx_mbx.c<br/>new file mode 100644<br/>index 000000000000..2aa03eadf064<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_mbx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_mbx.c</a></div><div class='hunk'>@@ -0,0 +1,419 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include "wx_type.h"</div><div class='add'>+#include "wx_mbx.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_obtain_mbx_lock_pf - obtain mailbox lock</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @vf: the VF index</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 on success and -EBUSY on failure</div><div class='add'>+ **/</div><div class='add'>+static int wx_obtain_mbx_lock_pf(struct wx *wx, u16 vf)</div><div class='add'>+{</div><div class='add'>+	int count = 5;</div><div class='add'>+	u32 mailbox;</div><div class='add'>+</div><div class='add'>+	while (count--) {</div><div class='add'>+		/* Take ownership of the buffer */</div><div class='add'>+		wr32(wx, WX_PXMAILBOX(vf), WX_PXMAILBOX_PFU);</div><div class='add'>+</div><div class='add'>+		/* reserve mailbox for vf use */</div><div class='add'>+		mailbox = rd32(wx, WX_PXMAILBOX(vf));</div><div class='add'>+		if (mailbox &amp; WX_PXMAILBOX_PFU)</div><div class='add'>+			return 0;</div><div class='add'>+		else if (count)</div><div class='add'>+			udelay(10);</div><div class='add'>+	}</div><div class='add'>+	wx_err(wx, "Failed to obtain mailbox lock for PF%d", vf);</div><div class='add'>+</div><div class='add'>+	return -EBUSY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_check_for_bit_pf(struct wx *wx, u32 mask, int index)</div><div class='add'>+{</div><div class='add'>+	u32 mbvficr = rd32(wx, WX_MBVFICR(index));</div><div class='add'>+</div><div class='add'>+	if (!(mbvficr &amp; mask))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	wr32(wx, WX_MBVFICR(index), mask);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_check_for_ack_pf - checks to see if the VF has acked</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @vf: the VF index</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 if the VF has set the status bit or else -EBUSY</div><div class='add'>+ **/</div><div class='add'>+int wx_check_for_ack_pf(struct wx *wx, u16 vf)</div><div class='add'>+{</div><div class='add'>+	u32 index = vf / 16, vf_bit = vf % 16;</div><div class='add'>+</div><div class='add'>+	return wx_check_for_bit_pf(wx,</div><div class='add'>+				   FIELD_PREP(WX_MBVFICR_VFACK_MASK,</div><div class='add'>+					      BIT(vf_bit)),</div><div class='add'>+				   index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_check_for_msg_pf - checks to see if the VF has sent mail</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @vf: the VF index</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 if the VF has got req bit or else -EBUSY</div><div class='add'>+ **/</div><div class='add'>+int wx_check_for_msg_pf(struct wx *wx, u16 vf)</div><div class='add'>+{</div><div class='add'>+	u32 index = vf / 16, vf_bit = vf % 16;</div><div class='add'>+</div><div class='add'>+	return wx_check_for_bit_pf(wx,</div><div class='add'>+				   FIELD_PREP(WX_MBVFICR_VFREQ_MASK,</div><div class='add'>+					      BIT(vf_bit)),</div><div class='add'>+				   index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_write_mbx_pf - Places a message in the mailbox</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @msg: The message buffer</div><div class='add'>+ *  @size: Length of buffer</div><div class='add'>+ *  @vf: the VF index</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 on success and -EINVAL/-EBUSY on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_write_mbx_pf(struct wx *wx, u32 *msg, u16 size, u16 vf)</div><div class='add'>+{</div><div class='add'>+	struct wx_mbx_info *mbx = &amp;wx-&gt;mbx;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* mbx-&gt;size is up to 15 */</div><div class='add'>+	if (size &gt; mbx-&gt;size) {</div><div class='add'>+		wx_err(wx, "Invalid mailbox message size %d", size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* lock the mailbox to prevent pf/vf race condition */</div><div class='add'>+	ret = wx_obtain_mbx_lock_pf(wx, vf);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* flush msg and acks as we are overwriting the message buffer */</div><div class='add'>+	wx_check_for_msg_pf(wx, vf);</div><div class='add'>+	wx_check_for_ack_pf(wx, vf);</div><div class='add'>+</div><div class='add'>+	/* copy the caller specified message to the mailbox memory buffer */</div><div class='add'>+	for (i = 0; i &lt; size; i++)</div><div class='add'>+		wr32a(wx, WX_PXMBMEM(vf), i, msg[i]);</div><div class='add'>+</div><div class='add'>+	/* Interrupt VF to tell it a message has been sent and release buffer */</div><div class='add'>+	/* set mirrored mailbox flags */</div><div class='add'>+	wr32a(wx, WX_PXMBMEM(vf), WX_VXMAILBOX_SIZE, WX_PXMAILBOX_STS);</div><div class='add'>+	wr32(wx, WX_PXMAILBOX(vf), WX_PXMAILBOX_STS);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_read_mbx_pf - Read a message from the mailbox</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @msg: The message buffer</div><div class='add'>+ *  @size: Length of buffer</div><div class='add'>+ *  @vf: the VF index</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 on success and -EBUSY on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_read_mbx_pf(struct wx *wx, u32 *msg, u16 size, u16 vf)</div><div class='add'>+{</div><div class='add'>+	struct wx_mbx_info *mbx = &amp;wx-&gt;mbx;</div><div class='add'>+	int ret;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	/* limit read to size of mailbox and mbx-&gt;size is up to 15 */</div><div class='add'>+	if (size &gt; mbx-&gt;size)</div><div class='add'>+		size = mbx-&gt;size;</div><div class='add'>+</div><div class='add'>+	/* lock the mailbox to prevent pf/vf race condition */</div><div class='add'>+	ret = wx_obtain_mbx_lock_pf(wx, vf);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; size; i++)</div><div class='add'>+		msg[i] = rd32a(wx, WX_PXMBMEM(vf), i);</div><div class='add'>+</div><div class='add'>+	/* Acknowledge the message and release buffer */</div><div class='add'>+	/* set mirrored mailbox flags */</div><div class='add'>+	wr32a(wx, WX_PXMBMEM(vf), WX_VXMAILBOX_SIZE, WX_PXMAILBOX_ACK);</div><div class='add'>+	wr32(wx, WX_PXMAILBOX(vf), WX_PXMAILBOX_ACK);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_check_for_rst_pf - checks to see if the VF has reset</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @vf: the VF index</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 on success and -EBUSY on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_check_for_rst_pf(struct wx *wx, u16 vf)</div><div class='add'>+{</div><div class='add'>+	u32 reg_offset = WX_VF_REG_OFFSET(vf);</div><div class='add'>+	u32 vf_shift = WX_VF_IND_SHIFT(vf);</div><div class='add'>+	u32 vflre = 0;</div><div class='add'>+</div><div class='add'>+	vflre = rd32(wx, WX_VFLRE(reg_offset));</div><div class='add'>+	if (!(vflre &amp; BIT(vf_shift)))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	wr32(wx, WX_VFLREC(reg_offset), BIT(vf_shift));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 wx_read_v2p_mailbox(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 mailbox = rd32(wx, WX_VXMAILBOX);</div><div class='add'>+</div><div class='add'>+	mailbox |= wx-&gt;mbx.mailbox;</div><div class='add'>+	wx-&gt;mbx.mailbox |= mailbox &amp; WX_VXMAILBOX_R2C_BITS;</div><div class='add'>+</div><div class='add'>+	return mailbox;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 wx_mailbox_get_lock_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	wr32(wx, WX_VXMAILBOX, WX_VXMAILBOX_VFU);</div><div class='add'>+	return wx_read_v2p_mailbox(wx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_obtain_mbx_lock_vf - obtain mailbox lock</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 on success and -EBUSY on failure</div><div class='add'>+ **/</div><div class='add'>+static int wx_obtain_mbx_lock_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int count = 5, ret;</div><div class='add'>+	u32 mailbox;</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout_atomic(wx_mailbox_get_lock_vf, wx, mailbox,</div><div class='add'>+					(mailbox &amp; WX_VXMAILBOX_VFU),</div><div class='add'>+					1, count);</div><div class='add'>+	if (ret)</div><div class='add'>+		wx_err(wx, "Failed to obtain mailbox lock for VF.\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_check_for_bit_vf(struct wx *wx, u32 mask)</div><div class='add'>+{</div><div class='add'>+	u32 mailbox = wx_read_v2p_mailbox(wx);</div><div class='add'>+</div><div class='add'>+	wx-&gt;mbx.mailbox &amp;= ~mask;</div><div class='add'>+</div><div class='add'>+	return (mailbox &amp; mask ? 0 : -EBUSY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_check_for_ack_vf - checks to see if the PF has ACK'd</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 if the PF has set the status bit or else -EBUSY</div><div class='add'>+ **/</div><div class='add'>+static int wx_check_for_ack_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* read clear the pf ack bit */</div><div class='add'>+	return wx_check_for_bit_vf(wx, WX_VXMAILBOX_PFACK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_check_for_msg_vf - checks to see if the PF has sent mail</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 if the PF has got req bit or else -EBUSY</div><div class='add'>+ **/</div><div class='add'>+int wx_check_for_msg_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* read clear the pf sts bit */</div><div class='add'>+	return wx_check_for_bit_vf(wx, WX_VXMAILBOX_PFSTS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_check_for_rst_vf - checks to see if the PF has reset</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 if the PF has set the reset done and -EBUSY on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_check_for_rst_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* read clear the pf reset done bit */</div><div class='add'>+	return wx_check_for_bit_vf(wx,</div><div class='add'>+				   WX_VXMAILBOX_RSTD |</div><div class='add'>+				   WX_VXMAILBOX_RSTI);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_poll_for_msg - Wait for message notification</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 if the VF has successfully received a message notification</div><div class='add'>+ **/</div><div class='add'>+static int wx_poll_for_msg(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct wx_mbx_info *mbx = &amp;wx-&gt;mbx;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	return readx_poll_timeout_atomic(wx_check_for_msg_vf, wx, val,</div><div class='add'>+					 (val == 0), mbx-&gt;udelay, mbx-&gt;timeout);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_poll_for_ack - Wait for message acknowledgment</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *</div><div class='add'>+ *  Return: return 0 if the VF has successfully received a message ack</div><div class='add'>+ **/</div><div class='add'>+static int wx_poll_for_ack(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct wx_mbx_info *mbx = &amp;wx-&gt;mbx;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	return readx_poll_timeout_atomic(wx_check_for_ack_vf, wx, val,</div><div class='add'>+					 (val == 0), mbx-&gt;udelay, mbx-&gt;timeout);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_read_posted_mbx - Wait for message notification and receive message</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @msg: The message buffer</div><div class='add'>+ *  @size: Length of buffer</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 if it successfully received a message notification and</div><div class='add'>+ *  copied it into the receive buffer.</div><div class='add'>+ **/</div><div class='add'>+int wx_read_posted_mbx(struct wx *wx, u32 *msg, u16 size)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = wx_poll_for_msg(wx);</div><div class='add'>+	/* if ack received read message, otherwise we timed out */</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return wx_read_mbx_vf(wx, msg, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_write_posted_mbx - Write a message to the mailbox, wait for ack</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @msg: The message buffer</div><div class='add'>+ *  @size: Length of buffer</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 if it successfully copied message into the buffer and</div><div class='add'>+ *  received an ack to that message within delay * timeout period</div><div class='add'>+ **/</div><div class='add'>+int wx_write_posted_mbx(struct wx *wx, u32 *msg, u16 size)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* send msg */</div><div class='add'>+	ret = wx_write_mbx_vf(wx, msg, size);</div><div class='add'>+	/* if msg sent wait until we receive an ack */</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return wx_poll_for_ack(wx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_write_mbx_vf - Write a message to the mailbox</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @msg: The message buffer</div><div class='add'>+ *  @size: Length of buffer</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 if it successfully copied message into the buffer</div><div class='add'>+ **/</div><div class='add'>+int wx_write_mbx_vf(struct wx *wx, u32 *msg, u16 size)</div><div class='add'>+{</div><div class='add'>+	struct wx_mbx_info *mbx = &amp;wx-&gt;mbx;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* mbx-&gt;size is up to 15 */</div><div class='add'>+	if (size &gt; mbx-&gt;size) {</div><div class='add'>+		wx_err(wx, "Invalid mailbox message size %d", size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* lock the mailbox to prevent pf/vf race condition */</div><div class='add'>+	ret = wx_obtain_mbx_lock_vf(wx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* flush msg and acks as we are overwriting the message buffer */</div><div class='add'>+	wx_check_for_msg_vf(wx);</div><div class='add'>+	wx_check_for_ack_vf(wx);</div><div class='add'>+</div><div class='add'>+	/* copy the caller specified message to the mailbox memory buffer */</div><div class='add'>+	for (i = 0; i &lt; size; i++)</div><div class='add'>+		wr32a(wx, WX_VXMBMEM, i, msg[i]);</div><div class='add'>+</div><div class='add'>+	/* Drop VFU and interrupt the PF to tell it a message has been sent */</div><div class='add'>+	wr32(wx, WX_VXMAILBOX, WX_VXMAILBOX_REQ);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_read_mbx_vf - Reads a message from the inbox intended for vf</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @msg: The message buffer</div><div class='add'>+ *  @size: Length of buffer</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 if it successfully copied message into the buffer</div><div class='add'>+ **/</div><div class='add'>+int wx_read_mbx_vf(struct wx *wx, u32 *msg, u16 size)</div><div class='add'>+{</div><div class='add'>+	struct wx_mbx_info *mbx = &amp;wx-&gt;mbx;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* limit read to size of mailbox and mbx-&gt;size is up to 15 */</div><div class='add'>+	if (size &gt; mbx-&gt;size)</div><div class='add'>+		size = mbx-&gt;size;</div><div class='add'>+</div><div class='add'>+	/* lock the mailbox to prevent pf/vf race condition */</div><div class='add'>+	ret = wx_obtain_mbx_lock_vf(wx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* copy the message from the mailbox memory buffer */</div><div class='add'>+	for (i = 0; i &lt; size; i++)</div><div class='add'>+		msg[i] = rd32a(wx, WX_VXMBMEM, i);</div><div class='add'>+</div><div class='add'>+	/* Acknowledge receipt and release mailbox, then we're done */</div><div class='add'>+	wr32(wx, WX_VXMAILBOX, WX_VXMAILBOX_ACK);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wx_init_mbx_params_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	wx-&gt;vfinfo = kzalloc(sizeof(struct vf_data_storage),</div><div class='add'>+			     GFP_KERNEL);</div><div class='add'>+	if (!wx-&gt;vfinfo)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Initialize mailbox parameters */</div><div class='add'>+	wx-&gt;mbx.size = WX_VXMAILBOX_SIZE;</div><div class='add'>+	wx-&gt;mbx.mailbox = WX_VXMAILBOX;</div><div class='add'>+	wx-&gt;mbx.udelay = 10;</div><div class='add'>+	wx-&gt;mbx.timeout = 1000;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_init_mbx_params_vf);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_mbx.h b/drivers/net/ethernet/wangxun/libwx/wx_mbx.h<br/>new file mode 100644<br/>index 000000000000..82df9218490a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_mbx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_mbx.h</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+#ifndef _WX_MBX_H_</div><div class='add'>+#define _WX_MBX_H_</div><div class='add'>+</div><div class='add'>+#define WX_VXMAILBOX_SIZE    15</div><div class='add'>+</div><div class='add'>+/* PF Registers */</div><div class='add'>+#define WX_PXMAILBOX(i)      (0x600 + (4 * (i))) /* i=[0,63] */</div><div class='add'>+#define WX_PXMAILBOX_STS     BIT(0) /* Initiate message send to VF */</div><div class='add'>+#define WX_PXMAILBOX_ACK     BIT(1) /* Ack message recv'd from VF */</div><div class='add'>+#define WX_PXMAILBOX_PFU     BIT(3) /* PF owns the mailbox buffer */</div><div class='add'>+</div><div class='add'>+/* VF Registers */</div><div class='add'>+#define WX_VXMAILBOX         0x600</div><div class='add'>+#define WX_VXMAILBOX_REQ     BIT(0) /* Request for PF Ready bit */</div><div class='add'>+#define WX_VXMAILBOX_ACK     BIT(1) /* Ack PF message received */</div><div class='add'>+#define WX_VXMAILBOX_VFU     BIT(2) /* VF owns the mailbox buffer */</div><div class='add'>+#define WX_VXMAILBOX_PFU     BIT(3) /* PF owns the mailbox buffer */</div><div class='add'>+#define WX_VXMAILBOX_PFSTS   BIT(4) /* PF wrote a message in the MB */</div><div class='add'>+#define WX_VXMAILBOX_PFACK   BIT(5) /* PF ack the previous VF msg */</div><div class='add'>+#define WX_VXMAILBOX_RSTI    BIT(6) /* PF has reset indication */</div><div class='add'>+#define WX_VXMAILBOX_RSTD    BIT(7) /* PF has indicated reset done */</div><div class='add'>+#define WX_VXMAILBOX_R2C_BITS (WX_VXMAILBOX_RSTD | \</div><div class='add'>+	    WX_VXMAILBOX_PFSTS | WX_VXMAILBOX_PFACK)</div><div class='add'>+</div><div class='add'>+#define WX_VXMBMEM           0x00C00 /* 16*4B */</div><div class='add'>+#define WX_PXMBMEM(i)        (0x5000 + (64 * (i))) /* i=[0,63] */</div><div class='add'>+</div><div class='add'>+#define WX_VFLRE(i)          (0x4A0 + (4 * (i))) /* i=[0,1] */</div><div class='add'>+#define WX_VFLREC(i)         (0x4A8 + (4 * (i))) /* i=[0,1] */</div><div class='add'>+</div><div class='add'>+/* SR-IOV specific macros */</div><div class='add'>+#define WX_MBVFICR(i)         (0x480 + (4 * (i))) /* i=[0,3] */</div><div class='add'>+#define WX_MBVFICR_VFREQ_MASK GENMASK(15, 0)</div><div class='add'>+#define WX_MBVFICR_VFACK_MASK GENMASK(31, 16)</div><div class='add'>+</div><div class='add'>+#define WX_VT_MSGTYPE_ACK     BIT(31)</div><div class='add'>+#define WX_VT_MSGTYPE_NACK    BIT(30)</div><div class='add'>+#define WX_VT_MSGTYPE_CTS     BIT(29)</div><div class='add'>+#define WX_VT_MSGINFO_SHIFT   16</div><div class='add'>+#define WX_VT_MSGINFO_MASK    GENMASK(23, 16)</div><div class='add'>+</div><div class='add'>+enum wx_pfvf_api_rev {</div><div class='add'>+	wx_mbox_api_null,</div><div class='add'>+	wx_mbox_api_13 = 4,      /* API version 1.3 */</div><div class='add'>+	wx_mbox_api_unknown, /* indicates that API version is not known */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mailbox API */</div><div class='add'>+#define WX_VF_RESET                  0x01 /* VF requests reset */</div><div class='add'>+#define WX_VF_SET_MAC_ADDR           0x02 /* VF requests PF to set MAC addr */</div><div class='add'>+#define WX_VF_SET_MULTICAST          0x03 /* VF requests PF to set MC addr */</div><div class='add'>+#define WX_VF_SET_VLAN               0x04 /* VF requests PF to set VLAN */</div><div class='add'>+#define WX_VF_SET_LPE                0x05 /* VF requests PF to set VMOLR.LPE */</div><div class='add'>+#define WX_VF_SET_MACVLAN            0x06 /* VF requests PF unicast filter */</div><div class='add'>+#define WX_VF_API_NEGOTIATE          0x08 /* negotiate API version */</div><div class='add'>+#define WX_VF_GET_QUEUES             0x09 /* get queue configuration */</div><div class='add'>+#define WX_VF_GET_RETA               0x0a /* VF request for RETA */</div><div class='add'>+#define WX_VF_GET_RSS_KEY            0x0b /* get RSS key */</div><div class='add'>+#define WX_VF_UPDATE_XCAST_MODE      0x0c</div><div class='add'>+#define WX_VF_GET_LINK_STATE         0x10 /* get vf link state */</div><div class='add'>+#define WX_VF_GET_FW_VERSION         0x11 /* get fw version */</div><div class='add'>+</div><div class='add'>+#define WX_VF_BACKUP                 0x8001 /* VF requests backup */</div><div class='add'>+</div><div class='add'>+#define WX_PF_CONTROL_MSG            BIT(8) /* PF control message */</div><div class='add'>+#define WX_PF_NOFITY_VF_LINK_STATUS  0x1</div><div class='add'>+#define WX_PF_NOFITY_VF_NET_NOT_RUNNING BIT(31)</div><div class='add'>+</div><div class='add'>+#define WX_VF_TX_QUEUES              1 /* number of Tx queues supported */</div><div class='add'>+#define WX_VF_RX_QUEUES              2 /* number of Rx queues supported */</div><div class='add'>+#define WX_VF_TRANS_VLAN             3 /* Indication of port vlan */</div><div class='add'>+#define WX_VF_DEF_QUEUE              4 /* Default queue offset */</div><div class='add'>+</div><div class='add'>+#define WX_VF_PERMADDR_MSG_LEN       4</div><div class='add'>+</div><div class='add'>+enum wxvf_xcast_modes {</div><div class='add'>+	WXVF_XCAST_MODE_NONE = 0,</div><div class='add'>+	WXVF_XCAST_MODE_MULTI,</div><div class='add'>+	WXVF_XCAST_MODE_ALLMULTI,</div><div class='add'>+	WXVF_XCAST_MODE_PROMISC,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int wx_write_mbx_pf(struct wx *wx, u32 *msg, u16 size, u16 vf);</div><div class='add'>+int wx_read_mbx_pf(struct wx *wx, u32 *msg, u16 size, u16 vf);</div><div class='add'>+int wx_check_for_rst_pf(struct wx *wx, u16 mbx_id);</div><div class='add'>+int wx_check_for_msg_pf(struct wx *wx, u16 mbx_id);</div><div class='add'>+int wx_check_for_ack_pf(struct wx *wx, u16 mbx_id);</div><div class='add'>+</div><div class='add'>+int wx_read_posted_mbx(struct wx *wx, u32 *msg, u16 size);</div><div class='add'>+int wx_write_posted_mbx(struct wx *wx, u32 *msg, u16 size);</div><div class='add'>+int wx_check_for_rst_vf(struct wx *wx);</div><div class='add'>+int wx_check_for_msg_vf(struct wx *wx);</div><div class='add'>+int wx_read_mbx_vf(struct wx *wx, u32 *msg, u16 size);</div><div class='add'>+int wx_write_mbx_vf(struct wx *wx, u32 *msg, u16 size);</div><div class='add'>+int wx_init_mbx_params_vf(struct wx *wx);</div><div class='add'>+</div><div class='add'>+#endif /* _WX_MBX_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_ptp.c b/drivers/net/ethernet/wangxun/libwx/wx_ptp.c<br/>new file mode 100644<br/>index 000000000000..44f3e6505246<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,905 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+/* Copyright (c) 1999 - 2025 Intel Corporation. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ptp_classify.h&gt;</div><div class='add'>+#include &lt;linux/clocksource.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "wx_type.h"</div><div class='add'>+#include "wx_ptp.h"</div><div class='add'>+#include "wx_hw.h"</div><div class='add'>+</div><div class='add'>+#define WX_INCVAL_10GB        0xCCCCCC</div><div class='add'>+#define WX_INCVAL_1GB         0x800000</div><div class='add'>+#define WX_INCVAL_100         0xA00000</div><div class='add'>+#define WX_INCVAL_10          0xC7F380</div><div class='add'>+#define WX_INCVAL_EM          0x2000000</div><div class='add'>+#define WX_INCVAL_AML         0xA00000</div><div class='add'>+</div><div class='add'>+#define WX_INCVAL_SHIFT_10GB  20</div><div class='add'>+#define WX_INCVAL_SHIFT_1GB   18</div><div class='add'>+#define WX_INCVAL_SHIFT_100   15</div><div class='add'>+#define WX_INCVAL_SHIFT_10    12</div><div class='add'>+#define WX_INCVAL_SHIFT_EM    22</div><div class='add'>+#define WX_INCVAL_SHIFT_AML   21</div><div class='add'>+</div><div class='add'>+#define WX_OVERFLOW_PERIOD    (HZ * 30)</div><div class='add'>+#define WX_PTP_TX_TIMEOUT     (HZ)</div><div class='add'>+</div><div class='add'>+#define WX_1588_PPS_WIDTH_EM  120</div><div class='add'>+</div><div class='add'>+#define WX_NS_PER_SEC         1000000000ULL</div><div class='add'>+</div><div class='add'>+static u64 wx_ptp_timecounter_cyc2time(struct wx *wx, u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	unsigned int seq;</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		seq = read_seqbegin(&amp;wx-&gt;hw_tc_lock);</div><div class='add'>+		ns = timecounter_cyc2time(&amp;wx-&gt;hw_tc, timestamp);</div><div class='add'>+	} while (read_seqretry(&amp;wx-&gt;hw_tc_lock, seq));</div><div class='add'>+</div><div class='add'>+	return ns;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 wx_ptp_readtime(struct wx *wx, struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	u32 timeh1, timeh2, timel;</div><div class='add'>+</div><div class='add'>+	timeh1 = rd32ptp(wx, WX_TSC_1588_SYSTIMH);</div><div class='add'>+	ptp_read_system_prets(sts);</div><div class='add'>+	timel = rd32ptp(wx, WX_TSC_1588_SYSTIML);</div><div class='add'>+	ptp_read_system_postts(sts);</div><div class='add'>+	timeh2 = rd32ptp(wx, WX_TSC_1588_SYSTIMH);</div><div class='add'>+</div><div class='add'>+	if (timeh1 != timeh2) {</div><div class='add'>+		ptp_read_system_prets(sts);</div><div class='add'>+		timel = rd32ptp(wx, WX_TSC_1588_SYSTIML);</div><div class='add'>+		ptp_read_system_prets(sts);</div><div class='add'>+	}</div><div class='add'>+	return (u64)timel | (u64)timeh2 &lt;&lt; 32;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_ptp_adjfine(struct ptp_clock_info *ptp, long ppb)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = container_of(ptp, struct wx, ptp_caps);</div><div class='add'>+	u64 incval, mask;</div><div class='add'>+</div><div class='add'>+	smp_mb(); /* Force any pending update before accessing. */</div><div class='add'>+	incval = READ_ONCE(wx-&gt;base_incval);</div><div class='add'>+	incval = adjust_by_scaled_ppm(incval, ppb);</div><div class='add'>+</div><div class='add'>+	mask = (wx-&gt;mac.type == wx_mac_em) ? 0x7FFFFFF : 0xFFFFFF;</div><div class='add'>+	incval &amp;= mask;</div><div class='add'>+	if (wx-&gt;mac.type != wx_mac_em)</div><div class='add'>+		incval |= 2 &lt;&lt; 24;</div><div class='add'>+</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_INC, incval);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = container_of(ptp, struct wx, ptp_caps);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	write_seqlock_irqsave(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+	timecounter_adjtime(&amp;wx-&gt;hw_tc, delta);</div><div class='add'>+	write_sequnlock_irqrestore(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;ptp_setup_sdp)</div><div class='add'>+		wx-&gt;ptp_setup_sdp(wx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_ptp_gettimex64(struct ptp_clock_info *ptp,</div><div class='add'>+			     struct timespec64 *ts,</div><div class='add'>+			     struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = container_of(ptp, struct wx, ptp_caps);</div><div class='add'>+	u64 ns, stamp;</div><div class='add'>+</div><div class='add'>+	stamp = wx_ptp_readtime(wx, sts);</div><div class='add'>+	ns = wx_ptp_timecounter_cyc2time(wx, stamp);</div><div class='add'>+	*ts = ns_to_timespec64(ns);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_ptp_settime64(struct ptp_clock_info *ptp,</div><div class='add'>+			    const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = container_of(ptp, struct wx, ptp_caps);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	ns = timespec64_to_ns(ts);</div><div class='add'>+	/* reset the timecounter */</div><div class='add'>+	write_seqlock_irqsave(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+	timecounter_init(&amp;wx-&gt;hw_tc, &amp;wx-&gt;hw_cc, ns);</div><div class='add'>+	write_sequnlock_irqrestore(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;ptp_setup_sdp)</div><div class='add'>+		wx-&gt;ptp_setup_sdp(wx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_ptp_clear_tx_timestamp - utility function to clear Tx timestamp state</div><div class='add'>+ * @wx: the private board structure</div><div class='add'>+ *</div><div class='add'>+ * This function should be called whenever the state related to a Tx timestamp</div><div class='add'>+ * needs to be cleared. This helps ensure that all related bits are reset for</div><div class='add'>+ * the next Tx timestamp event.</div><div class='add'>+ */</div><div class='add'>+static void wx_ptp_clear_tx_timestamp(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	rd32ptp(wx, WX_TSC_1588_STMPH);</div><div class='add'>+	if (wx-&gt;ptp_tx_skb) {</div><div class='add'>+		dev_kfree_skb_any(wx-&gt;ptp_tx_skb);</div><div class='add'>+		wx-&gt;ptp_tx_skb = NULL;</div><div class='add'>+	}</div><div class='add'>+	clear_bit_unlock(WX_STATE_PTP_TX_IN_PROGRESS, wx-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_ptp_convert_to_hwtstamp - convert register value to hw timestamp</div><div class='add'>+ * @wx: private board structure</div><div class='add'>+ * @hwtstamp: stack timestamp structure</div><div class='add'>+ * @timestamp: unsigned 64bit system time value</div><div class='add'>+ *</div><div class='add'>+ * We need to convert the adapter's RX/TXSTMP registers into a hwtstamp value</div><div class='add'>+ * which can be used by the stack's ptp functions.</div><div class='add'>+ *</div><div class='add'>+ * The lock is used to protect consistency of the cyclecounter and the SYSTIME</div><div class='add'>+ * registers. However, it does not need to protect against the Rx or Tx</div><div class='add'>+ * timestamp registers, as there can't be a new timestamp until the old one is</div><div class='add'>+ * unlatched by reading.</div><div class='add'>+ *</div><div class='add'>+ * In addition to the timestamp in hardware, some controllers need a software</div><div class='add'>+ * overflow cyclecounter, and this function takes this into account as well.</div><div class='add'>+ **/</div><div class='add'>+static void wx_ptp_convert_to_hwtstamp(struct wx *wx,</div><div class='add'>+				       struct skb_shared_hwtstamps *hwtstamp,</div><div class='add'>+				       u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	ns = wx_ptp_timecounter_cyc2time(wx, timestamp);</div><div class='add'>+	hwtstamp-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_ptp_tx_hwtstamp - utility function which checks for TX time stamp</div><div class='add'>+ * @wx: the private board struct</div><div class='add'>+ *</div><div class='add'>+ * if the timestamp is valid, we convert it into the timecounter ns</div><div class='add'>+ * value, then store that result into the shhwtstamps structure which</div><div class='add'>+ * is passed up the network stack</div><div class='add'>+ */</div><div class='add'>+static void wx_ptp_tx_hwtstamp(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps shhwtstamps;</div><div class='add'>+	struct sk_buff *skb = wx-&gt;ptp_tx_skb;</div><div class='add'>+	u64 regval = 0;</div><div class='add'>+</div><div class='add'>+	regval |= (u64)rd32ptp(wx, WX_TSC_1588_STMPL);</div><div class='add'>+	regval |= (u64)rd32ptp(wx, WX_TSC_1588_STMPH) &lt;&lt; 32;</div><div class='add'>+</div><div class='add'>+	wx_ptp_convert_to_hwtstamp(wx, &amp;shhwtstamps, regval);</div><div class='add'>+</div><div class='add'>+	wx-&gt;ptp_tx_skb = NULL;</div><div class='add'>+	clear_bit_unlock(WX_STATE_PTP_TX_IN_PROGRESS, wx-&gt;state);</div><div class='add'>+	skb_tstamp_tx(skb, &amp;shhwtstamps);</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+	wx-&gt;tx_hwtstamp_pkts++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_ptp_tx_hwtstamp_work(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 tsynctxctl;</div><div class='add'>+</div><div class='add'>+	/* we have to have a valid skb to poll for a timestamp */</div><div class='add'>+	if (!wx-&gt;ptp_tx_skb) {</div><div class='add'>+		wx_ptp_clear_tx_timestamp(wx);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* stop polling once we have a valid timestamp */</div><div class='add'>+	tsynctxctl = rd32ptp(wx, WX_TSC_1588_CTL);</div><div class='add'>+	if (tsynctxctl &amp; WX_TSC_1588_CTL_VALID) {</div><div class='add'>+		wx_ptp_tx_hwtstamp(wx);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_ptp_overflow_check - watchdog task to detect SYSTIME overflow</div><div class='add'>+ * @wx: pointer to wx struct</div><div class='add'>+ *</div><div class='add'>+ * this watchdog task periodically reads the timecounter</div><div class='add'>+ * in order to prevent missing when the system time registers wrap</div><div class='add'>+ * around. This needs to be run approximately twice a minute for the fastest</div><div class='add'>+ * overflowing hardware. We run it for all hardware since it shouldn't have a</div><div class='add'>+ * large impact.</div><div class='add'>+ */</div><div class='add'>+static void wx_ptp_overflow_check(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	bool timeout = time_is_before_jiffies(wx-&gt;last_overflow_check +</div><div class='add'>+					      WX_OVERFLOW_PERIOD);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (timeout) {</div><div class='add'>+		/* Update the timecounter */</div><div class='add'>+		write_seqlock_irqsave(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+		timecounter_read(&amp;wx-&gt;hw_tc);</div><div class='add'>+		write_sequnlock_irqrestore(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+</div><div class='add'>+		wx-&gt;last_overflow_check = jiffies;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_ptp_rx_hang - detect error case when Rx timestamp registers latched</div><div class='add'>+ * @wx: pointer to wx struct</div><div class='add'>+ *</div><div class='add'>+ * this watchdog task is scheduled to detect error case where hardware has</div><div class='add'>+ * dropped an Rx packet that was timestamped when the ring is full. The</div><div class='add'>+ * particular error is rare but leaves the device in a state unable to</div><div class='add'>+ * timestamp any future packets.</div><div class='add'>+ */</div><div class='add'>+static void wx_ptp_rx_hang(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct wx_ring *rx_ring;</div><div class='add'>+	unsigned long rx_event;</div><div class='add'>+	u32 tsyncrxctl;</div><div class='add'>+	int n;</div><div class='add'>+</div><div class='add'>+	tsyncrxctl = rd32(wx, WX_PSR_1588_CTL);</div><div class='add'>+</div><div class='add'>+	/* if we don't have a valid timestamp in the registers, just update the</div><div class='add'>+	 * timeout counter and exit</div><div class='add'>+	 */</div><div class='add'>+	if (!(tsyncrxctl &amp; WX_PSR_1588_CTL_VALID)) {</div><div class='add'>+		wx-&gt;last_rx_ptp_check = jiffies;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* determine the most recent watchdog or rx_timestamp event */</div><div class='add'>+	rx_event = wx-&gt;last_rx_ptp_check;</div><div class='add'>+	for (n = 0; n &lt; wx-&gt;num_rx_queues; n++) {</div><div class='add'>+		rx_ring = wx-&gt;rx_ring[n];</div><div class='add'>+		if (time_after(rx_ring-&gt;last_rx_timestamp, rx_event))</div><div class='add'>+			rx_event = rx_ring-&gt;last_rx_timestamp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* only need to read the high RXSTMP register to clear the lock */</div><div class='add'>+	if (time_is_before_jiffies(rx_event + 5 * HZ)) {</div><div class='add'>+		rd32(wx, WX_PSR_1588_STMPH);</div><div class='add'>+		wx-&gt;last_rx_ptp_check = jiffies;</div><div class='add'>+</div><div class='add'>+		wx-&gt;rx_hwtstamp_cleared++;</div><div class='add'>+		dev_warn(&amp;wx-&gt;pdev-&gt;dev, "clearing RX Timestamp hang");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_ptp_tx_hang - detect error case where Tx timestamp never finishes</div><div class='add'>+ * @wx: private network wx structure</div><div class='add'>+ */</div><div class='add'>+static void wx_ptp_tx_hang(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	bool timeout = time_is_before_jiffies(wx-&gt;ptp_tx_start +</div><div class='add'>+					      WX_PTP_TX_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	if (!wx-&gt;ptp_tx_skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_STATE_PTP_TX_IN_PROGRESS, wx-&gt;state))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* If we haven't received a timestamp within the timeout, it is</div><div class='add'>+	 * reasonable to assume that it will never occur, so we can unlock the</div><div class='add'>+	 * timestamp bit when this occurs.</div><div class='add'>+	 */</div><div class='add'>+	if (timeout) {</div><div class='add'>+		wx_ptp_clear_tx_timestamp(wx);</div><div class='add'>+		wx-&gt;tx_hwtstamp_timeouts++;</div><div class='add'>+		dev_warn(&amp;wx-&gt;pdev-&gt;dev, "clearing Tx timestamp hang\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long wx_ptp_do_aux_work(struct ptp_clock_info *ptp)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = container_of(ptp, struct wx, ptp_caps);</div><div class='add'>+	int ts_done;</div><div class='add'>+</div><div class='add'>+	ts_done = wx_ptp_tx_hwtstamp_work(wx);</div><div class='add'>+</div><div class='add'>+	wx_ptp_overflow_check(wx);</div><div class='add'>+	if (unlikely(test_bit(WX_FLAG_RX_HWTSTAMP_IN_REGISTER,</div><div class='add'>+			      wx-&gt;flags)))</div><div class='add'>+		wx_ptp_rx_hang(wx);</div><div class='add'>+	wx_ptp_tx_hang(wx);</div><div class='add'>+</div><div class='add'>+	return ts_done ? 1 : HZ;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 wx_ptp_trigger_calc(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct cyclecounter *cc = &amp;wx-&gt;hw_cc;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u64 ns = 0;</div><div class='add'>+	u32 rem;</div><div class='add'>+</div><div class='add'>+	/* Read the current clock time, and save the cycle counter value */</div><div class='add'>+	write_seqlock_irqsave(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+	ns = timecounter_read(&amp;wx-&gt;hw_tc);</div><div class='add'>+	wx-&gt;pps_edge_start = wx-&gt;hw_tc.cycle_last;</div><div class='add'>+	write_sequnlock_irqrestore(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+	wx-&gt;pps_edge_end = wx-&gt;pps_edge_start;</div><div class='add'>+</div><div class='add'>+	/* Figure out how far past the next second we are */</div><div class='add'>+	div_u64_rem(ns, WX_NS_PER_SEC, &amp;rem);</div><div class='add'>+</div><div class='add'>+	/* Figure out how many nanoseconds to add to round the clock edge up</div><div class='add'>+	 * to the next full second</div><div class='add'>+	 */</div><div class='add'>+	rem = (WX_NS_PER_SEC - rem);</div><div class='add'>+</div><div class='add'>+	/* Adjust the clock edge to align with the next full second. */</div><div class='add'>+	wx-&gt;pps_edge_start += div_u64(((u64)rem &lt;&lt; cc-&gt;shift), cc-&gt;mult);</div><div class='add'>+	wx-&gt;pps_edge_end += div_u64(((u64)(rem + wx-&gt;pps_width) &lt;&lt;</div><div class='add'>+				     cc-&gt;shift), cc-&gt;mult);</div><div class='add'>+</div><div class='add'>+	return (ns + rem);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_ptp_setup_sdp(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct cyclecounter *cc = &amp;wx-&gt;hw_cc;</div><div class='add'>+	u32 tsauxc;</div><div class='add'>+	u64 nsec;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;pps_width &gt;= WX_NS_PER_SEC) {</div><div class='add'>+		wx_err(wx, "PTP pps width cannot be longer than 1s!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* disable the pin first */</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_AUX_CTL, 0);</div><div class='add'>+	WX_WRITE_FLUSH(wx);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_PTP_PPS_ENABLED, wx-&gt;flags)) {</div><div class='add'>+		if (wx-&gt;pps_enabled) {</div><div class='add'>+			wx-&gt;pps_enabled = false;</div><div class='add'>+			wx_set_pps(wx, false, 0, 0);</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx-&gt;pps_enabled = true;</div><div class='add'>+	nsec = wx_ptp_trigger_calc(wx);</div><div class='add'>+	wx_set_pps(wx, wx-&gt;pps_enabled, nsec, wx-&gt;pps_edge_start);</div><div class='add'>+</div><div class='add'>+	tsauxc = WX_TSC_1588_AUX_CTL_PLSG | WX_TSC_1588_AUX_CTL_EN_TT0 |</div><div class='add'>+		WX_TSC_1588_AUX_CTL_EN_TT1 | WX_TSC_1588_AUX_CTL_EN_TS0;</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_TRGT_L(0), (u32)wx-&gt;pps_edge_start);</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_TRGT_H(0), (u32)(wx-&gt;pps_edge_start &gt;&gt; 32));</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_TRGT_L(1), (u32)wx-&gt;pps_edge_end);</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_TRGT_H(1), (u32)(wx-&gt;pps_edge_end &gt;&gt; 32));</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_SDP(0),</div><div class='add'>+		WX_TSC_1588_SDP_FUN_SEL_TT0 | WX_TSC_1588_SDP_OUT_LEVEL_H);</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_SDP(1), WX_TSC_1588_SDP_FUN_SEL_TS0);</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_AUX_CTL, tsauxc);</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_INT_EN, WX_TSC_1588_INT_EN_TT1);</div><div class='add'>+	WX_WRITE_FLUSH(wx);</div><div class='add'>+</div><div class='add'>+	/* Adjust the clock edge to align with the next full second. */</div><div class='add'>+	wx-&gt;sec_to_cc = div_u64(((u64)WX_NS_PER_SEC &lt;&lt; cc-&gt;shift), cc-&gt;mult);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_ptp_feature_enable(struct ptp_clock_info *ptp,</div><div class='add'>+				 struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = container_of(ptp, struct wx, ptp_caps);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * When PPS is enabled, unmask the interrupt for the ClockOut</div><div class='add'>+	 * feature, so that the interrupt handler can send the PPS</div><div class='add'>+	 * event when the clock SDP triggers. Clear mask when PPS is</div><div class='add'>+	 * disabled</div><div class='add'>+	 */</div><div class='add'>+	if (rq-&gt;type != PTP_CLK_REQ_PEROUT || !wx-&gt;ptp_setup_sdp)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Reject requests with unsupported flags */</div><div class='add'>+	if (rq-&gt;perout.flags &amp; ~(PTP_PEROUT_DUTY_CYCLE |</div><div class='add'>+				 PTP_PEROUT_PHASE))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (rq-&gt;perout.phase.sec || rq-&gt;perout.phase.nsec) {</div><div class='add'>+		wx_err(wx, "Absolute start time not supported.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rq-&gt;perout.period.sec != 1 || rq-&gt;perout.period.nsec) {</div><div class='add'>+		wx_err(wx, "Only 1pps is supported.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rq-&gt;perout.flags &amp; PTP_PEROUT_DUTY_CYCLE) {</div><div class='add'>+		struct timespec64 ts_on;</div><div class='add'>+</div><div class='add'>+		ts_on.tv_sec = rq-&gt;perout.on.sec;</div><div class='add'>+		ts_on.tv_nsec = rq-&gt;perout.on.nsec;</div><div class='add'>+		wx-&gt;pps_width = timespec64_to_ns(&amp;ts_on);</div><div class='add'>+	} else {</div><div class='add'>+		wx-&gt;pps_width = 120000000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (on)</div><div class='add'>+		set_bit(WX_FLAG_PTP_PPS_ENABLED, wx-&gt;flags);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(WX_FLAG_PTP_PPS_ENABLED, wx-&gt;flags);</div><div class='add'>+</div><div class='add'>+	return wx-&gt;ptp_setup_sdp(wx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wx_ptp_check_pps_event(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 tsauxc, int_status;</div><div class='add'>+</div><div class='add'>+	/* this check is necessary in case the interrupt was enabled via some</div><div class='add'>+	 * alternative means (ex. debug_fs). Better to check here than</div><div class='add'>+	 * everywhere that calls this function.</div><div class='add'>+	 */</div><div class='add'>+	if (!wx-&gt;ptp_clock)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	int_status = rd32ptp(wx, WX_TSC_1588_INT_ST);</div><div class='add'>+	if (int_status &amp; WX_TSC_1588_INT_ST_TT1) {</div><div class='add'>+		/* disable the pin first */</div><div class='add'>+		wr32ptp(wx, WX_TSC_1588_AUX_CTL, 0);</div><div class='add'>+		WX_WRITE_FLUSH(wx);</div><div class='add'>+</div><div class='add'>+		wx_ptp_trigger_calc(wx);</div><div class='add'>+</div><div class='add'>+		tsauxc = WX_TSC_1588_AUX_CTL_PLSG | WX_TSC_1588_AUX_CTL_EN_TT0 |</div><div class='add'>+			 WX_TSC_1588_AUX_CTL_EN_TT1 | WX_TSC_1588_AUX_CTL_EN_TS0;</div><div class='add'>+		wr32ptp(wx, WX_TSC_1588_TRGT_L(0), (u32)wx-&gt;pps_edge_start);</div><div class='add'>+		wr32ptp(wx, WX_TSC_1588_TRGT_H(0), (u32)(wx-&gt;pps_edge_start &gt;&gt; 32));</div><div class='add'>+		wr32ptp(wx, WX_TSC_1588_TRGT_L(1), (u32)wx-&gt;pps_edge_end);</div><div class='add'>+		wr32ptp(wx, WX_TSC_1588_TRGT_H(1), (u32)(wx-&gt;pps_edge_end &gt;&gt; 32));</div><div class='add'>+		wr32ptp(wx, WX_TSC_1588_AUX_CTL, tsauxc);</div><div class='add'>+		WX_WRITE_FLUSH(wx);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_ptp_check_pps_event);</div><div class='add'>+</div><div class='add'>+static long wx_ptp_create_clock(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = wx-&gt;netdev;</div><div class='add'>+	long err;</div><div class='add'>+</div><div class='add'>+	/* do nothing if we already have a clock device */</div><div class='add'>+	if (!IS_ERR_OR_NULL(wx-&gt;ptp_clock))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	snprintf(wx-&gt;ptp_caps.name, sizeof(wx-&gt;ptp_caps.name),</div><div class='add'>+		 "%s", netdev-&gt;name);</div><div class='add'>+	wx-&gt;ptp_caps.owner = THIS_MODULE;</div><div class='add'>+	wx-&gt;ptp_caps.n_alarm = 0;</div><div class='add'>+	wx-&gt;ptp_caps.n_ext_ts = 0;</div><div class='add'>+	wx-&gt;ptp_caps.pps = 0;</div><div class='add'>+	wx-&gt;ptp_caps.adjfine = wx_ptp_adjfine;</div><div class='add'>+	wx-&gt;ptp_caps.adjtime = wx_ptp_adjtime;</div><div class='add'>+	wx-&gt;ptp_caps.gettimex64 = wx_ptp_gettimex64;</div><div class='add'>+	wx-&gt;ptp_caps.settime64 = wx_ptp_settime64;</div><div class='add'>+	wx-&gt;ptp_caps.do_aux_work = wx_ptp_do_aux_work;</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+	case wx_mac_aml40:</div><div class='add'>+		wx-&gt;ptp_caps.max_adj = 250000000;</div><div class='add'>+		wx-&gt;ptp_caps.n_per_out = 1;</div><div class='add'>+		wx-&gt;ptp_setup_sdp = wx_ptp_setup_sdp;</div><div class='add'>+		wx-&gt;ptp_caps.enable = wx_ptp_feature_enable;</div><div class='add'>+		break;</div><div class='add'>+	case wx_mac_sp:</div><div class='add'>+		wx-&gt;ptp_caps.max_adj = 250000000;</div><div class='add'>+		wx-&gt;ptp_caps.n_per_out = 0;</div><div class='add'>+		wx-&gt;ptp_setup_sdp = NULL;</div><div class='add'>+		break;</div><div class='add'>+	case wx_mac_em:</div><div class='add'>+		wx-&gt;ptp_caps.max_adj = 500000000;</div><div class='add'>+		wx-&gt;ptp_caps.n_per_out = 1;</div><div class='add'>+		wx-&gt;ptp_setup_sdp = wx_ptp_setup_sdp;</div><div class='add'>+		wx-&gt;ptp_caps.enable = wx_ptp_feature_enable;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx-&gt;ptp_clock = ptp_clock_register(&amp;wx-&gt;ptp_caps, &amp;wx-&gt;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(wx-&gt;ptp_clock)) {</div><div class='add'>+		err = PTR_ERR(wx-&gt;ptp_clock);</div><div class='add'>+		wx-&gt;ptp_clock = NULL;</div><div class='add'>+		wx_err(wx, "ptp clock register failed\n");</div><div class='add'>+		return err;</div><div class='add'>+	} else if (wx-&gt;ptp_clock) {</div><div class='add'>+		dev_info(&amp;wx-&gt;pdev-&gt;dev, "registered PHC device on %s\n",</div><div class='add'>+			 netdev-&gt;name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the default timestamp mode to disabled here. We do this in</div><div class='add'>+	 * create_clock instead of initialization, because we don't want to</div><div class='add'>+	 * override the previous settings during a suspend/resume cycle.</div><div class='add'>+	 */</div><div class='add'>+	wx-&gt;tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+	wx-&gt;tstamp_config.tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_ptp_set_timestamp_mode(struct wx *wx,</div><div class='add'>+				     struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	u32 tsync_tx_ctl = WX_TSC_1588_CTL_ENABLED;</div><div class='add'>+	u32 tsync_rx_ctl = WX_PSR_1588_CTL_ENABLED;</div><div class='add'>+	DECLARE_BITMAP(flags, WX_PF_FLAGS_NBITS);</div><div class='add'>+	u32 tsync_rx_mtrl = PTP_EV_PORT &lt;&lt; 16;</div><div class='add'>+	bool is_l2 = false;</div><div class='add'>+	u32 regval;</div><div class='add'>+</div><div class='add'>+	memcpy(flags, wx-&gt;flags, sizeof(wx-&gt;flags));</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		tsync_tx_ctl = 0;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		tsync_rx_ctl = 0;</div><div class='add'>+		tsync_rx_mtrl = 0;</div><div class='add'>+		clear_bit(WX_FLAG_RX_HWTSTAMP_ENABLED, flags);</div><div class='add'>+		clear_bit(WX_FLAG_RX_HWTSTAMP_IN_REGISTER, flags);</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='add'>+		tsync_rx_ctl |= WX_PSR_1588_CTL_TYPE_L4_V1;</div><div class='add'>+		tsync_rx_mtrl |= WX_PSR_1588_MSG_V1_SYNC;</div><div class='add'>+		set_bit(WX_FLAG_RX_HWTSTAMP_ENABLED, flags);</div><div class='add'>+		set_bit(WX_FLAG_RX_HWTSTAMP_IN_REGISTER, flags);</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='add'>+		tsync_rx_ctl |= WX_PSR_1588_CTL_TYPE_L4_V1;</div><div class='add'>+		tsync_rx_mtrl |= WX_PSR_1588_MSG_V1_DELAY_REQ;</div><div class='add'>+		set_bit(WX_FLAG_RX_HWTSTAMP_ENABLED, flags);</div><div class='add'>+		set_bit(WX_FLAG_RX_HWTSTAMP_IN_REGISTER, flags);</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='add'>+		tsync_rx_ctl |= WX_PSR_1588_CTL_TYPE_EVENT_V2;</div><div class='add'>+		is_l2 = true;</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		set_bit(WX_FLAG_RX_HWTSTAMP_ENABLED, flags);</div><div class='add'>+		set_bit(WX_FLAG_RX_HWTSTAMP_IN_REGISTER, flags);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* register PSR_1588_MSG must be set in order to do V1 packets,</div><div class='add'>+		 * therefore it is not possible to time stamp both V1 Sync and</div><div class='add'>+		 * Delay_Req messages unless hardware supports timestamping all</div><div class='add'>+		 * packets =&gt; return error</div><div class='add'>+		 */</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* define ethertype filter for timestamping L2 packets */</div><div class='add'>+	if (is_l2)</div><div class='add'>+		wr32(wx, WX_PSR_ETYPE_SWC(WX_PSR_ETYPE_SWC_FILTER_1588),</div><div class='add'>+		     (WX_PSR_ETYPE_SWC_FILTER_EN | /* enable filter */</div><div class='add'>+		      WX_PSR_ETYPE_SWC_1588 | /* enable timestamping */</div><div class='add'>+		      ETH_P_1588)); /* 1588 eth protocol type */</div><div class='add'>+	else</div><div class='add'>+		wr32(wx, WX_PSR_ETYPE_SWC(WX_PSR_ETYPE_SWC_FILTER_1588), 0);</div><div class='add'>+</div><div class='add'>+	/* enable/disable TX */</div><div class='add'>+	regval = rd32ptp(wx, WX_TSC_1588_CTL);</div><div class='add'>+	regval &amp;= ~WX_TSC_1588_CTL_ENABLED;</div><div class='add'>+	regval |= tsync_tx_ctl;</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_CTL, regval);</div><div class='add'>+</div><div class='add'>+	/* enable/disable RX */</div><div class='add'>+	regval = rd32(wx, WX_PSR_1588_CTL);</div><div class='add'>+	regval &amp;= ~(WX_PSR_1588_CTL_ENABLED | WX_PSR_1588_CTL_TYPE_MASK);</div><div class='add'>+	regval |= tsync_rx_ctl;</div><div class='add'>+	wr32(wx, WX_PSR_1588_CTL, regval);</div><div class='add'>+</div><div class='add'>+	/* define which PTP packets are time stamped */</div><div class='add'>+	wr32(wx, WX_PSR_1588_MSG, tsync_rx_mtrl);</div><div class='add'>+</div><div class='add'>+	WX_WRITE_FLUSH(wx);</div><div class='add'>+</div><div class='add'>+	/* configure adapter flags only when HW is actually configured */</div><div class='add'>+	memcpy(wx-&gt;flags, flags, sizeof(wx-&gt;flags));</div><div class='add'>+</div><div class='add'>+	/* clear TX/RX timestamp state, just to be sure */</div><div class='add'>+	wx_ptp_clear_tx_timestamp(wx);</div><div class='add'>+	rd32(wx, WX_PSR_1588_STMPH);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 wx_ptp_read(struct cyclecounter *hw_cc)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = container_of(hw_cc, struct wx, hw_cc);</div><div class='add'>+</div><div class='add'>+	return wx_ptp_readtime(wx, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_ptp_link_speed_adjust(struct wx *wx, u32 *shift, u32 *incval)</div><div class='add'>+{</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+	case wx_mac_aml40:</div><div class='add'>+		*shift = WX_INCVAL_SHIFT_AML;</div><div class='add'>+		*incval = WX_INCVAL_AML;</div><div class='add'>+		return;</div><div class='add'>+	case wx_mac_em:</div><div class='add'>+		*shift = WX_INCVAL_SHIFT_EM;</div><div class='add'>+		*incval = WX_INCVAL_EM;</div><div class='add'>+		return;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (wx-&gt;speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		*shift = WX_INCVAL_SHIFT_10;</div><div class='add'>+		*incval = WX_INCVAL_10;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		*shift = WX_INCVAL_SHIFT_100;</div><div class='add'>+		*incval = WX_INCVAL_100;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		*shift = WX_INCVAL_SHIFT_1GB;</div><div class='add'>+		*incval = WX_INCVAL_1GB;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+	default:</div><div class='add'>+		*shift = WX_INCVAL_SHIFT_10GB;</div><div class='add'>+		*incval = WX_INCVAL_10GB;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_ptp_reset_cyclecounter - create the cycle counter from hw</div><div class='add'>+ * @wx: pointer to the wx structure</div><div class='add'>+ *</div><div class='add'>+ * This function should be called to set the proper values for the TSC_1588_INC</div><div class='add'>+ * register and tell the cyclecounter structure what the tick rate of SYSTIME</div><div class='add'>+ * is. It does not directly modify SYSTIME registers or the timecounter</div><div class='add'>+ * structure. It should be called whenever a new TSC_1588_INC value is</div><div class='add'>+ * necessary, such as during initialization or when the link speed changes.</div><div class='add'>+ */</div><div class='add'>+void wx_ptp_reset_cyclecounter(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 incval = 0, mask = 0;</div><div class='add'>+	struct cyclecounter cc;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* For some of the boards below this mask is technically incorrect.</div><div class='add'>+	 * The timestamp mask overflows at approximately 61bits. However the</div><div class='add'>+	 * particular hardware does not overflow on an even bitmask value.</div><div class='add'>+	 * Instead, it overflows due to conversion of upper 32bits billions of</div><div class='add'>+	 * cycles. Timecounters are not really intended for this purpose so</div><div class='add'>+	 * they do not properly function if the overflow point isn't 2^N-1.</div><div class='add'>+	 * However, the actual SYSTIME values in question take ~138 years to</div><div class='add'>+	 * overflow. In practice this means they won't actually overflow. A</div><div class='add'>+	 * proper fix to this problem would require modification of the</div><div class='add'>+	 * timecounter delta calculations.</div><div class='add'>+	 */</div><div class='add'>+	cc.mask = CLOCKSOURCE_MASK(64);</div><div class='add'>+	cc.mult = 1;</div><div class='add'>+	cc.shift = 0;</div><div class='add'>+</div><div class='add'>+	cc.read = wx_ptp_read;</div><div class='add'>+	wx_ptp_link_speed_adjust(wx, &amp;cc.shift, &amp;incval);</div><div class='add'>+</div><div class='add'>+	/* update the base incval used to calculate frequency adjustment */</div><div class='add'>+	WRITE_ONCE(wx-&gt;base_incval, incval);</div><div class='add'>+</div><div class='add'>+	mask = (wx-&gt;mac.type == wx_mac_em) ? 0x7FFFFFF : 0xFFFFFF;</div><div class='add'>+	incval &amp;= mask;</div><div class='add'>+	if (wx-&gt;mac.type != wx_mac_em)</div><div class='add'>+		incval |= 2 &lt;&lt; 24;</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_INC, incval);</div><div class='add'>+</div><div class='add'>+	smp_mb(); /* Force the above update. */</div><div class='add'>+</div><div class='add'>+	/* need lock to prevent incorrect read while modifying cyclecounter */</div><div class='add'>+	write_seqlock_irqsave(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+	memcpy(&amp;wx-&gt;hw_cc, &amp;cc, sizeof(wx-&gt;hw_cc));</div><div class='add'>+	write_sequnlock_irqrestore(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_ptp_reset_cyclecounter);</div><div class='add'>+</div><div class='add'>+void wx_ptp_reset(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* reset the hardware timestamping mode */</div><div class='add'>+	wx_ptp_set_timestamp_mode(wx, &amp;wx-&gt;tstamp_config);</div><div class='add'>+	wx_ptp_reset_cyclecounter(wx);</div><div class='add'>+</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_SYSTIML, 0);</div><div class='add'>+	wr32ptp(wx, WX_TSC_1588_SYSTIMH, 0);</div><div class='add'>+	WX_WRITE_FLUSH(wx);</div><div class='add'>+</div><div class='add'>+	write_seqlock_irqsave(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+	timecounter_init(&amp;wx-&gt;hw_tc, &amp;wx-&gt;hw_cc,</div><div class='add'>+			 ktime_to_ns(ktime_get_real()));</div><div class='add'>+	write_sequnlock_irqrestore(&amp;wx-&gt;hw_tc_lock, flags);</div><div class='add'>+</div><div class='add'>+	wx-&gt;last_overflow_check = jiffies;</div><div class='add'>+	ptp_schedule_worker(wx-&gt;ptp_clock, HZ);</div><div class='add'>+</div><div class='add'>+	/* Now that the shift has been calculated and the systime</div><div class='add'>+	 * registers reset, (re-)enable the Clock out feature</div><div class='add'>+	 */</div><div class='add'>+	if (wx-&gt;ptp_setup_sdp)</div><div class='add'>+		wx-&gt;ptp_setup_sdp(wx);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_ptp_reset);</div><div class='add'>+</div><div class='add'>+void wx_ptp_init(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* Initialize the seqlock_t first, since the user might call the clock</div><div class='add'>+	 * functions any time after we've initialized the ptp clock device.</div><div class='add'>+	 */</div><div class='add'>+	seqlock_init(&amp;wx-&gt;hw_tc_lock);</div><div class='add'>+</div><div class='add'>+	/* obtain a ptp clock device, or re-use an existing device */</div><div class='add'>+	if (wx_ptp_create_clock(wx))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	wx-&gt;tx_hwtstamp_pkts = 0;</div><div class='add'>+	wx-&gt;tx_hwtstamp_timeouts = 0;</div><div class='add'>+	wx-&gt;tx_hwtstamp_skipped = 0;</div><div class='add'>+	wx-&gt;tx_hwtstamp_errors = 0;</div><div class='add'>+	wx-&gt;rx_hwtstamp_cleared = 0;</div><div class='add'>+	/* reset the ptp related hardware bits */</div><div class='add'>+	wx_ptp_reset(wx);</div><div class='add'>+</div><div class='add'>+	/* enter the WX_STATE_PTP_RUNNING state */</div><div class='add'>+	set_bit(WX_STATE_PTP_RUNNING, wx-&gt;state);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_ptp_init);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_ptp_suspend - stop ptp work items</div><div class='add'>+ * @wx: pointer to wx struct</div><div class='add'>+ *</div><div class='add'>+ * This function suspends ptp activity, and prevents more work from being</div><div class='add'>+ * generated, but does not destroy the clock device.</div><div class='add'>+ */</div><div class='add'>+void wx_ptp_suspend(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* leave the WX_STATE_PTP_RUNNING STATE */</div><div class='add'>+	if (!test_and_clear_bit(WX_STATE_PTP_RUNNING, wx-&gt;state))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	clear_bit(WX_FLAG_PTP_PPS_ENABLED, wx-&gt;flags);</div><div class='add'>+	if (wx-&gt;ptp_setup_sdp)</div><div class='add'>+		wx-&gt;ptp_setup_sdp(wx);</div><div class='add'>+</div><div class='add'>+	wx_ptp_clear_tx_timestamp(wx);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_ptp_suspend);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_ptp_stop - destroy the ptp_clock device</div><div class='add'>+ * @wx: pointer to wx struct</div><div class='add'>+ *</div><div class='add'>+ * Completely destroy the ptp_clock device, and disable all PTP related</div><div class='add'>+ * features. Intended to be run when the device is being closed.</div><div class='add'>+ */</div><div class='add'>+void wx_ptp_stop(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* first, suspend ptp activity */</div><div class='add'>+	wx_ptp_suspend(wx);</div><div class='add'>+</div><div class='add'>+	/* now destroy the ptp clock device */</div><div class='add'>+	if (wx-&gt;ptp_clock) {</div><div class='add'>+		ptp_clock_unregister(wx-&gt;ptp_clock);</div><div class='add'>+		wx-&gt;ptp_clock = NULL;</div><div class='add'>+		dev_info(&amp;wx-&gt;pdev-&gt;dev, "removed PHC on %s\n", wx-&gt;netdev-&gt;name);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_ptp_stop);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_ptp_rx_hwtstamp - utility function which checks for RX time stamp</div><div class='add'>+ * @wx: pointer to wx struct</div><div class='add'>+ * @skb: particular skb to send timestamp with</div><div class='add'>+ *</div><div class='add'>+ * if the timestamp is valid, we convert it into the timecounter ns</div><div class='add'>+ * value, then store that result into the shhwtstamps structure which</div><div class='add'>+ * is passed up the network stack</div><div class='add'>+ */</div><div class='add'>+void wx_ptp_rx_hwtstamp(struct wx *wx, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	u64 regval = 0;</div><div class='add'>+	u32 tsyncrxctl;</div><div class='add'>+</div><div class='add'>+	/* Read the tsyncrxctl register afterwards in order to prevent taking an</div><div class='add'>+	 * I/O hit on every packet.</div><div class='add'>+	 */</div><div class='add'>+	tsyncrxctl = rd32(wx, WX_PSR_1588_CTL);</div><div class='add'>+	if (!(tsyncrxctl &amp; WX_PSR_1588_CTL_VALID))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	regval |= (u64)rd32(wx, WX_PSR_1588_STMPL);</div><div class='add'>+	regval |= (u64)rd32(wx, WX_PSR_1588_STMPH) &lt;&lt; 32;</div><div class='add'>+</div><div class='add'>+	wx_ptp_convert_to_hwtstamp(wx, skb_hwtstamps(skb), regval);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wx_hwtstamp_get(struct net_device *dev,</div><div class='add'>+		    struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!netif_running(dev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*cfg = wx-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_hwtstamp_get);</div><div class='add'>+</div><div class='add'>+int wx_hwtstamp_set(struct net_device *dev,</div><div class='add'>+		    struct kernel_hwtstamp_config *cfg,</div><div class='add'>+		    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(dev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = wx_ptp_set_timestamp_mode(wx, cfg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* save these settings for future reference */</div><div class='add'>+	memcpy(&amp;wx-&gt;tstamp_config, cfg, sizeof(wx-&gt;tstamp_config));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_hwtstamp_set);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_ptp.h b/drivers/net/ethernet/wangxun/libwx/wx_ptp.h<br/>new file mode 100644<br/>index 000000000000..50db90a6e3ee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_ptp.h</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2019 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#ifndef _WX_PTP_H_</div><div class='add'>+#define _WX_PTP_H_</div><div class='add'>+</div><div class='add'>+void wx_ptp_check_pps_event(struct wx *wx);</div><div class='add'>+void wx_ptp_reset_cyclecounter(struct wx *wx);</div><div class='add'>+void wx_ptp_reset(struct wx *wx);</div><div class='add'>+void wx_ptp_init(struct wx *wx);</div><div class='add'>+void wx_ptp_suspend(struct wx *wx);</div><div class='add'>+void wx_ptp_stop(struct wx *wx);</div><div class='add'>+void wx_ptp_rx_hwtstamp(struct wx *wx, struct sk_buff *skb);</div><div class='add'>+int wx_hwtstamp_get(struct net_device *dev,</div><div class='add'>+		    struct kernel_hwtstamp_config *cfg);</div><div class='add'>+int wx_hwtstamp_set(struct net_device *dev,</div><div class='add'>+		    struct kernel_hwtstamp_config *cfg,</div><div class='add'>+		    struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='add'>+#endif /* _WX_PTP_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_sriov.c b/drivers/net/ethernet/wangxun/libwx/wx_sriov.c<br/>new file mode 100644<br/>index 000000000000..493da5fffdb6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_sriov.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_sriov.c</a></div><div class='hunk'>@@ -0,0 +1,929 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "wx_type.h"</div><div class='add'>+#include "wx_hw.h"</div><div class='add'>+#include "wx_mbx.h"</div><div class='add'>+#include "wx_sriov.h"</div><div class='add'>+</div><div class='add'>+static void wx_vf_configuration(struct pci_dev *pdev, int event_mask)</div><div class='add'>+{</div><div class='add'>+	bool enable = !!WX_VF_ENABLE_CHECK(event_mask);</div><div class='add'>+	struct wx *wx = pci_get_drvdata(pdev);</div><div class='add'>+	u32 vfn = WX_VF_NUM_GET(event_mask);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		eth_zero_addr(wx-&gt;vfinfo[vfn].vf_mac_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_alloc_vf_macvlans(struct wx *wx, u8 num_vfs)</div><div class='add'>+{</div><div class='add'>+	struct vf_macvlans *mv_list;</div><div class='add'>+	int num_vf_macvlans, i;</div><div class='add'>+</div><div class='add'>+	/* Initialize list of VF macvlans */</div><div class='add'>+	INIT_LIST_HEAD(&amp;wx-&gt;vf_mvs.mvlist);</div><div class='add'>+</div><div class='add'>+	num_vf_macvlans = wx-&gt;mac.num_rar_entries -</div><div class='add'>+			  (WX_MAX_PF_MACVLANS + 1 + num_vfs);</div><div class='add'>+	if (!num_vf_macvlans)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mv_list = kcalloc(num_vf_macvlans, sizeof(struct vf_macvlans),</div><div class='add'>+			  GFP_KERNEL);</div><div class='add'>+	if (!mv_list)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_vf_macvlans; i++) {</div><div class='add'>+		mv_list[i].vf = -1;</div><div class='add'>+		mv_list[i].free = true;</div><div class='add'>+		list_add(&amp;mv_list[i].mvlist, &amp;wx-&gt;vf_mvs.mvlist);</div><div class='add'>+	}</div><div class='add'>+	wx-&gt;mv_list = mv_list;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_sriov_clear_data(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* set num VFs to 0 to prevent access to vfinfo */</div><div class='add'>+	wx-&gt;num_vfs = 0;</div><div class='add'>+</div><div class='add'>+	/* free VF control structures */</div><div class='add'>+	kfree(wx-&gt;vfinfo);</div><div class='add'>+	wx-&gt;vfinfo = NULL;</div><div class='add'>+</div><div class='add'>+	/* free macvlan list */</div><div class='add'>+	kfree(wx-&gt;mv_list);</div><div class='add'>+	wx-&gt;mv_list = NULL;</div><div class='add'>+</div><div class='add'>+	/* set default pool back to 0 */</div><div class='add'>+	wr32m(wx, WX_PSR_VM_CTL, WX_PSR_VM_CTL_POOL_MASK, 0);</div><div class='add'>+	wx-&gt;ring_feature[RING_F_VMDQ].offset = 0;</div><div class='add'>+</div><div class='add'>+	clear_bit(WX_FLAG_IRQ_VECTOR_SHARED, wx-&gt;flags);</div><div class='add'>+	clear_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags);</div><div class='add'>+	/* Disable VMDq flag so device will be set in NM mode */</div><div class='add'>+	if (wx-&gt;ring_feature[RING_F_VMDQ].limit == 1)</div><div class='add'>+		clear_bit(WX_FLAG_VMDQ_ENABLED, wx-&gt;flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __wx_enable_sriov(struct wx *wx, u8 num_vfs)</div><div class='add'>+{</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+	u32 value = 0;</div><div class='add'>+</div><div class='add'>+	set_bit(WX_FLAG_SRIOV_ENABLED, wx-&gt;flags);</div><div class='add'>+	dev_info(&amp;wx-&gt;pdev-&gt;dev, "SR-IOV enabled with %d VFs\n", num_vfs);</div><div class='add'>+</div><div class='add'>+	if (num_vfs == 7 &amp;&amp; wx-&gt;mac.type == wx_mac_em)</div><div class='add'>+		set_bit(WX_FLAG_IRQ_VECTOR_SHARED, wx-&gt;flags);</div><div class='add'>+</div><div class='add'>+	/* Enable VMDq flag so device will be set in VM mode */</div><div class='add'>+	set_bit(WX_FLAG_VMDQ_ENABLED, wx-&gt;flags);</div><div class='add'>+	if (!wx-&gt;ring_feature[RING_F_VMDQ].limit)</div><div class='add'>+		wx-&gt;ring_feature[RING_F_VMDQ].limit = 1;</div><div class='add'>+	wx-&gt;ring_feature[RING_F_VMDQ].offset = num_vfs;</div><div class='add'>+</div><div class='add'>+	wx-&gt;vfinfo = kcalloc(num_vfs, sizeof(struct vf_data_storage),</div><div class='add'>+			     GFP_KERNEL);</div><div class='add'>+	if (!wx-&gt;vfinfo)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = wx_alloc_vf_macvlans(wx, num_vfs);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Initialize default switching mode VEB */</div><div class='add'>+	wr32m(wx, WX_PSR_CTL, WX_PSR_CTL_SW_EN, WX_PSR_CTL_SW_EN);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_vfs; i++) {</div><div class='add'>+		/* enable spoof checking for all VFs */</div><div class='add'>+		wx-&gt;vfinfo[i].spoofchk_enabled = true;</div><div class='add'>+		wx-&gt;vfinfo[i].link_enable = true;</div><div class='add'>+		/* untrust all VFs */</div><div class='add'>+		wx-&gt;vfinfo[i].trusted = false;</div><div class='add'>+		/* set the default xcast mode */</div><div class='add'>+		wx-&gt;vfinfo[i].xcast_mode = WXVF_XCAST_MODE_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+		value = WX_CFG_PORT_CTL_NUM_VT_8;</div><div class='add'>+	} else {</div><div class='add'>+		if (num_vfs &lt; 32)</div><div class='add'>+			value = WX_CFG_PORT_CTL_NUM_VT_32;</div><div class='add'>+		else</div><div class='add'>+			value = WX_CFG_PORT_CTL_NUM_VT_64;</div><div class='add'>+	}</div><div class='add'>+	wr32m(wx, WX_CFG_PORT_CTL,</div><div class='add'>+	      WX_CFG_PORT_CTL_NUM_VT_MASK,</div><div class='add'>+	      value);</div><div class='add'>+</div><div class='add'>+	/* Disable RSC when in SR-IOV mode */</div><div class='add'>+	clear_bit(WX_FLAG_RSC_CAPABLE, wx-&gt;flags);</div><div class='add'>+	clear_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_sriov_reinit(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	wx-&gt;setup_tc(wx-&gt;netdev, netdev_get_num_tc(wx-&gt;netdev));</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wx_disable_sriov(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	if (!pci_vfs_assigned(wx-&gt;pdev))</div><div class='add'>+		pci_disable_sriov(wx-&gt;pdev);</div><div class='add'>+	else</div><div class='add'>+		wx_err(wx, "Unloading driver while VFs are assigned.\n");</div><div class='add'>+</div><div class='add'>+	/* clear flags and free allloced data */</div><div class='add'>+	wx_sriov_clear_data(wx);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_disable_sriov);</div><div class='add'>+</div><div class='add'>+static int wx_pci_sriov_enable(struct pci_dev *dev,</div><div class='add'>+			       int num_vfs)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = pci_get_drvdata(dev);</div><div class='add'>+	int err = 0, i;</div><div class='add'>+</div><div class='add'>+	if (netif_is_rxfh_configured(wx-&gt;netdev)) {</div><div class='add'>+		wx_err(wx, "Cannot enable SR-IOV while RXFH is configured\n");</div><div class='add'>+		wx_err(wx, "Run 'ethtool -X &lt;if&gt; default' to reset RSS table\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = __wx_enable_sriov(wx, num_vfs);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	wx-&gt;num_vfs = num_vfs;</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;num_vfs; i++)</div><div class='add'>+		wx_vf_configuration(dev, (i | WX_VF_ENABLE));</div><div class='add'>+</div><div class='add'>+	/* reset before enabling SRIOV to avoid mailbox issues */</div><div class='add'>+	wx_sriov_reinit(wx);</div><div class='add'>+</div><div class='add'>+	err = pci_enable_sriov(dev, num_vfs);</div><div class='add'>+	if (err) {</div><div class='add'>+		wx_err(wx, "Failed to enable PCI sriov: %d\n", err);</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return num_vfs;</div><div class='add'>+err_out:</div><div class='add'>+	wx_sriov_clear_data(wx);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_pci_sriov_disable(struct pci_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = pci_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	if (netif_is_rxfh_configured(wx-&gt;netdev)) {</div><div class='add'>+		wx_err(wx, "Cannot disable SR-IOV while RXFH is configured\n");</div><div class='add'>+		wx_err(wx, "Run 'ethtool -X &lt;if&gt; default' to reset RSS table\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx_disable_sriov(wx);</div><div class='add'>+	wx_sriov_reinit(wx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wx_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = pci_get_drvdata(pdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!num_vfs) {</div><div class='add'>+		if (!pci_vfs_assigned(pdev))</div><div class='add'>+			return wx_pci_sriov_disable(pdev);</div><div class='add'>+</div><div class='add'>+		wx_err(wx, "can't free VFs because some are assigned to VMs.\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = wx_pci_sriov_enable(pdev, num_vfs);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return num_vfs;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_pci_sriov_configure);</div><div class='add'>+</div><div class='add'>+static int wx_set_vf_mac(struct wx *wx, u16 vf, const u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	u8 hw_addr[ETH_ALEN];</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(hw_addr, mac_addr);</div><div class='add'>+	wx_del_mac_filter(wx, wx-&gt;vfinfo[vf].vf_mac_addr, vf);</div><div class='add'>+	ret = wx_add_mac_filter(wx, hw_addr, vf);</div><div class='add'>+	if (ret &gt;= 0)</div><div class='add'>+		ether_addr_copy(wx-&gt;vfinfo[vf].vf_mac_addr, mac_addr);</div><div class='add'>+	else</div><div class='add'>+		eth_zero_addr(wx-&gt;vfinfo[vf].vf_mac_addr);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_set_vmolr(struct wx *wx, u16 vf, bool aupe)</div><div class='add'>+{</div><div class='add'>+	u32 vmolr = rd32(wx, WX_PSR_VM_L2CTL(vf));</div><div class='add'>+</div><div class='add'>+	vmolr |=  WX_PSR_VM_L2CTL_BAM;</div><div class='add'>+	if (aupe)</div><div class='add'>+		vmolr |= WX_PSR_VM_L2CTL_AUPE;</div><div class='add'>+	else</div><div class='add'>+		vmolr &amp;= ~WX_PSR_VM_L2CTL_AUPE;</div><div class='add'>+	wr32(wx, WX_PSR_VM_L2CTL(vf), vmolr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_set_vmvir(struct wx *wx, u16 vid, u16 qos, u16 vf)</div><div class='add'>+{</div><div class='add'>+	u32 vmvir = vid | (qos &lt;&lt; VLAN_PRIO_SHIFT) |</div><div class='add'>+		    WX_TDM_VLAN_INS_VLANA_DEFAULT;</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_TDM_VLAN_INS(vf), vmvir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_set_vf_vlan(struct wx *wx, int add, int vid, u16 vf)</div><div class='add'>+{</div><div class='add'>+	if (!vid &amp;&amp; !add)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return wx_set_vfta(wx, vid, vf, (bool)add);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_set_vlan_anti_spoofing(struct wx *wx, bool enable, int vf)</div><div class='add'>+{</div><div class='add'>+	u32 index = WX_VF_REG_OFFSET(vf), vf_bit = WX_VF_IND_SHIFT(vf);</div><div class='add'>+	u32 pfvfspoof;</div><div class='add'>+</div><div class='add'>+	pfvfspoof = rd32(wx, WX_TDM_VLAN_AS(index));</div><div class='add'>+	if (enable)</div><div class='add'>+		pfvfspoof |= BIT(vf_bit);</div><div class='add'>+	else</div><div class='add'>+		pfvfspoof &amp;= ~BIT(vf_bit);</div><div class='add'>+	wr32(wx, WX_TDM_VLAN_AS(index), pfvfspoof);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_write_qde(struct wx *wx, u32 vf, u32 qde)</div><div class='add'>+{</div><div class='add'>+	struct wx_ring_feature *vmdq = &amp;wx-&gt;ring_feature[RING_F_VMDQ];</div><div class='add'>+	u32 q_per_pool = __ALIGN_MASK(1, ~vmdq-&gt;mask);</div><div class='add'>+	u32 reg = 0, n = vf * q_per_pool / 32;</div><div class='add'>+	u32 i = vf * q_per_pool;</div><div class='add'>+</div><div class='add'>+	reg = rd32(wx, WX_RDM_PF_QDE(n));</div><div class='add'>+	for (i = (vf * q_per_pool - n * 32);</div><div class='add'>+	     i &lt; ((vf + 1) * q_per_pool - n * 32);</div><div class='add'>+	     i++) {</div><div class='add'>+		if (qde == 1)</div><div class='add'>+			reg |= qde &lt;&lt; i;</div><div class='add'>+		else</div><div class='add'>+			reg &amp;= qde &lt;&lt; i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_RDM_PF_QDE(n), reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_clear_vmvir(struct wx *wx, u32 vf)</div><div class='add'>+{</div><div class='add'>+	wr32(wx, WX_TDM_VLAN_INS(vf), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_ping_vf(struct wx *wx, int vf)</div><div class='add'>+{</div><div class='add'>+	u32 ping = WX_PF_CONTROL_MSG;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;vfinfo[vf].clear_to_send)</div><div class='add'>+		ping |= WX_VT_MSGTYPE_CTS;</div><div class='add'>+	wx_write_mbx_pf(wx, &amp;ping, 1, vf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_set_vf_rx_tx(struct wx *wx, int vf)</div><div class='add'>+{</div><div class='add'>+	u32 index = WX_VF_REG_OFFSET(vf), vf_bit = WX_VF_IND_SHIFT(vf);</div><div class='add'>+	u32 reg_cur_tx, reg_cur_rx, reg_req_tx, reg_req_rx;</div><div class='add'>+</div><div class='add'>+	reg_cur_tx = rd32(wx, WX_TDM_VF_TE(index));</div><div class='add'>+	reg_cur_rx = rd32(wx, WX_RDM_VF_RE(index));</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;vfinfo[vf].link_enable) {</div><div class='add'>+		reg_req_tx = reg_cur_tx | BIT(vf_bit);</div><div class='add'>+		reg_req_rx = reg_cur_rx | BIT(vf_bit);</div><div class='add'>+		/* Enable particular VF */</div><div class='add'>+		if (reg_cur_tx != reg_req_tx)</div><div class='add'>+			wr32(wx, WX_TDM_VF_TE(index), reg_req_tx);</div><div class='add'>+		if (reg_cur_rx != reg_req_rx)</div><div class='add'>+			wr32(wx, WX_RDM_VF_RE(index), reg_req_rx);</div><div class='add'>+	} else {</div><div class='add'>+		reg_req_tx = BIT(vf_bit);</div><div class='add'>+		reg_req_rx = BIT(vf_bit);</div><div class='add'>+		/* Disable particular VF */</div><div class='add'>+		if (reg_cur_tx &amp; reg_req_tx)</div><div class='add'>+			wr32(wx, WX_TDM_VFTE_CLR(index), reg_req_tx);</div><div class='add'>+		if (reg_cur_rx &amp; reg_req_rx)</div><div class='add'>+			wr32(wx, WX_RDM_VFRE_CLR(index), reg_req_rx);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_get_vf_queues(struct wx *wx, u32 *msgbuf, u32 vf)</div><div class='add'>+{</div><div class='add'>+	struct wx_ring_feature *vmdq = &amp;wx-&gt;ring_feature[RING_F_VMDQ];</div><div class='add'>+	unsigned int default_tc = 0;</div><div class='add'>+</div><div class='add'>+	msgbuf[WX_VF_TX_QUEUES] = __ALIGN_MASK(1, ~vmdq-&gt;mask);</div><div class='add'>+	msgbuf[WX_VF_RX_QUEUES] = __ALIGN_MASK(1, ~vmdq-&gt;mask);</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;vfinfo[vf].pf_vlan || wx-&gt;vfinfo[vf].pf_qos)</div><div class='add'>+		msgbuf[WX_VF_TRANS_VLAN] = 1;</div><div class='add'>+	else</div><div class='add'>+		msgbuf[WX_VF_TRANS_VLAN] = 0;</div><div class='add'>+</div><div class='add'>+	/* notify VF of default queue */</div><div class='add'>+	msgbuf[WX_VF_DEF_QUEUE] = default_tc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_vf_reset_event(struct wx *wx, u16 vf)</div><div class='add'>+{</div><div class='add'>+	struct vf_data_storage *vfinfo = &amp;wx-&gt;vfinfo[vf];</div><div class='add'>+	u8 num_tcs = netdev_get_num_tc(wx-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	/* add PF assigned VLAN */</div><div class='add'>+	wx_set_vf_vlan(wx, true, vfinfo-&gt;pf_vlan, vf);</div><div class='add'>+</div><div class='add'>+	/* reset offloads to defaults */</div><div class='add'>+	wx_set_vmolr(wx, vf, !vfinfo-&gt;pf_vlan);</div><div class='add'>+</div><div class='add'>+	/* set outgoing tags for VFs */</div><div class='add'>+	if (!vfinfo-&gt;pf_vlan &amp;&amp; !vfinfo-&gt;pf_qos &amp;&amp; !num_tcs) {</div><div class='add'>+		wx_clear_vmvir(wx, vf);</div><div class='add'>+	} else {</div><div class='add'>+		if (vfinfo-&gt;pf_qos || !num_tcs)</div><div class='add'>+			wx_set_vmvir(wx, vfinfo-&gt;pf_vlan,</div><div class='add'>+				     vfinfo-&gt;pf_qos, vf);</div><div class='add'>+		else</div><div class='add'>+			wx_set_vmvir(wx, vfinfo-&gt;pf_vlan,</div><div class='add'>+				     wx-&gt;default_up, vf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* reset multicast table array for vf */</div><div class='add'>+	wx-&gt;vfinfo[vf].num_vf_mc_hashes = 0;</div><div class='add'>+</div><div class='add'>+	/* Flush and reset the mta with the new values */</div><div class='add'>+	wx_set_rx_mode(wx-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	wx_del_mac_filter(wx, wx-&gt;vfinfo[vf].vf_mac_addr, vf);</div><div class='add'>+	/* reset VF api back to unknown */</div><div class='add'>+	wx-&gt;vfinfo[vf].vf_api = wx_mbox_api_null;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_vf_reset_msg(struct wx *wx, u16 vf)</div><div class='add'>+{</div><div class='add'>+	const u8 *vf_mac = wx-&gt;vfinfo[vf].vf_mac_addr;</div><div class='add'>+	struct net_device *dev = wx-&gt;netdev;</div><div class='add'>+	u32 msgbuf[5] = {0, 0, 0, 0, 0};</div><div class='add'>+	u8 *addr = (u8 *)(&amp;msgbuf[1]);</div><div class='add'>+	u32 reg = 0, index, vf_bit;</div><div class='add'>+	int pf_max_frame;</div><div class='add'>+</div><div class='add'>+	/* reset the filters for the device */</div><div class='add'>+	wx_vf_reset_event(wx, vf);</div><div class='add'>+</div><div class='add'>+	/* set vf mac address */</div><div class='add'>+	if (!is_zero_ether_addr(vf_mac))</div><div class='add'>+		wx_set_vf_mac(wx, vf, vf_mac);</div><div class='add'>+</div><div class='add'>+	index = WX_VF_REG_OFFSET(vf);</div><div class='add'>+	vf_bit = WX_VF_IND_SHIFT(vf);</div><div class='add'>+</div><div class='add'>+	/* force drop enable for all VF Rx queues */</div><div class='add'>+	wx_write_qde(wx, vf, 1);</div><div class='add'>+</div><div class='add'>+	/* set transmit and receive for vf */</div><div class='add'>+	wx_set_vf_rx_tx(wx, vf);</div><div class='add'>+</div><div class='add'>+	pf_max_frame = dev-&gt;mtu + ETH_HLEN;</div><div class='add'>+</div><div class='add'>+	if (pf_max_frame &gt; ETH_FRAME_LEN)</div><div class='add'>+		reg = BIT(vf_bit);</div><div class='add'>+	wr32(wx, WX_RDM_VFRE_CLR(index), reg);</div><div class='add'>+</div><div class='add'>+	/* enable VF mailbox for further messages */</div><div class='add'>+	wx-&gt;vfinfo[vf].clear_to_send = true;</div><div class='add'>+</div><div class='add'>+	/* reply to reset with ack and vf mac address */</div><div class='add'>+	msgbuf[0] = WX_VF_RESET;</div><div class='add'>+	if (!is_zero_ether_addr(vf_mac)) {</div><div class='add'>+		msgbuf[0] |= WX_VT_MSGTYPE_ACK;</div><div class='add'>+		memcpy(addr, vf_mac, ETH_ALEN);</div><div class='add'>+	} else {</div><div class='add'>+		msgbuf[0] |= WX_VT_MSGTYPE_NACK;</div><div class='add'>+		wx_err(wx, "VF %d has no MAC address assigned", vf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msgbuf[3] = wx-&gt;mac.mc_filter_type;</div><div class='add'>+	wx_write_mbx_pf(wx, msgbuf, WX_VF_PERMADDR_MSG_LEN, vf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_set_vf_mac_addr(struct wx *wx, u32 *msgbuf, u16 vf)</div><div class='add'>+{</div><div class='add'>+	const u8 *new_mac = ((u8 *)(&amp;msgbuf[1]));</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(new_mac)) {</div><div class='add'>+		wx_err(wx, "VF %d attempted to set invalid mac\n", vf);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;vfinfo[vf].pf_set_mac &amp;&amp;</div><div class='add'>+	    memcmp(wx-&gt;vfinfo[vf].vf_mac_addr, new_mac, ETH_ALEN)) {</div><div class='add'>+		wx_err(wx,</div><div class='add'>+		       "VF %d attempt to set a MAC but it already had a MAC.",</div><div class='add'>+		       vf);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = wx_set_vf_mac(wx, vf, new_mac);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_set_vf_multicasts(struct wx *wx, u32 *msgbuf, u32 vf)</div><div class='add'>+{</div><div class='add'>+	struct vf_data_storage *vfinfo = &amp;wx-&gt;vfinfo[vf];</div><div class='add'>+	u16 entries = (msgbuf[0] &amp; WX_VT_MSGINFO_MASK)</div><div class='add'>+		      &gt;&gt; WX_VT_MSGINFO_SHIFT;</div><div class='add'>+	u32 vmolr = rd32(wx, WX_PSR_VM_L2CTL(vf));</div><div class='add'>+	u32 vector_bit, vector_reg, mta_reg, i;</div><div class='add'>+	u16 *hash_list = (u16 *)&amp;msgbuf[1];</div><div class='add'>+</div><div class='add'>+	/* only so many hash values supported */</div><div class='add'>+	entries = min_t(u16, entries, WX_MAX_VF_MC_ENTRIES);</div><div class='add'>+	vfinfo-&gt;num_vf_mc_hashes = entries;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; entries; i++)</div><div class='add'>+		vfinfo-&gt;vf_mc_hashes[i] = hash_list[i];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; vfinfo-&gt;num_vf_mc_hashes; i++) {</div><div class='add'>+		vector_reg = WX_PSR_MC_TBL_REG(vfinfo-&gt;vf_mc_hashes[i]);</div><div class='add'>+		vector_bit = WX_PSR_MC_TBL_BIT(vfinfo-&gt;vf_mc_hashes[i]);</div><div class='add'>+		mta_reg = wx-&gt;mac.mta_shadow[vector_reg];</div><div class='add'>+		mta_reg |= BIT(vector_bit);</div><div class='add'>+		wx-&gt;mac.mta_shadow[vector_reg] = mta_reg;</div><div class='add'>+		wr32(wx, WX_PSR_MC_TBL(vector_reg), mta_reg);</div><div class='add'>+	}</div><div class='add'>+	vmolr |= WX_PSR_VM_L2CTL_ROMPE;</div><div class='add'>+	wr32(wx, WX_PSR_VM_L2CTL(vf), vmolr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_set_vf_lpe(struct wx *wx, u32 max_frame, u32 vf)</div><div class='add'>+{</div><div class='add'>+	u32 index, vf_bit, vfre;</div><div class='add'>+	u32 max_frs, reg_val;</div><div class='add'>+</div><div class='add'>+	/* determine VF receive enable location */</div><div class='add'>+	index = WX_VF_REG_OFFSET(vf);</div><div class='add'>+	vf_bit = WX_VF_IND_SHIFT(vf);</div><div class='add'>+</div><div class='add'>+	vfre = rd32(wx, WX_RDM_VF_RE(index));</div><div class='add'>+	vfre |= BIT(vf_bit);</div><div class='add'>+	wr32(wx, WX_RDM_VF_RE(index), vfre);</div><div class='add'>+</div><div class='add'>+	/* pull current max frame size from hardware */</div><div class='add'>+	max_frs = DIV_ROUND_UP(max_frame, 1024);</div><div class='add'>+	reg_val = rd32(wx, WX_MAC_WDG_TIMEOUT) &amp; WX_MAC_WDG_TIMEOUT_WTO_MASK;</div><div class='add'>+	if (max_frs &gt; (reg_val + WX_MAC_WDG_TIMEOUT_WTO_DELTA))</div><div class='add'>+		wr32(wx, WX_MAC_WDG_TIMEOUT,</div><div class='add'>+		     max_frs - WX_MAC_WDG_TIMEOUT_WTO_DELTA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_find_vlvf_entry(struct wx *wx, u32 vlan)</div><div class='add'>+{</div><div class='add'>+	int regindex;</div><div class='add'>+	u32 vlvf;</div><div class='add'>+</div><div class='add'>+	/* short cut the special case */</div><div class='add'>+	if (vlan == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Search for the vlan id in the VLVF entries */</div><div class='add'>+	for (regindex = 1; regindex &lt; WX_PSR_VLAN_SWC_ENTRIES; regindex++) {</div><div class='add'>+		wr32(wx, WX_PSR_VLAN_SWC_IDX, regindex);</div><div class='add'>+		vlvf = rd32(wx, WX_PSR_VLAN_SWC);</div><div class='add'>+		if ((vlvf &amp; VLAN_VID_MASK) == vlan)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Return a negative value if not found */</div><div class='add'>+	if (regindex &gt;= WX_PSR_VLAN_SWC_ENTRIES)</div><div class='add'>+		regindex = -EINVAL;</div><div class='add'>+</div><div class='add'>+	return regindex;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_set_vf_macvlan(struct wx *wx,</div><div class='add'>+			     u16 vf, int index, unsigned char *mac_addr)</div><div class='add'>+{</div><div class='add'>+	struct vf_macvlans *entry;</div><div class='add'>+	struct list_head *pos;</div><div class='add'>+	int retval = 0;</div><div class='add'>+</div><div class='add'>+	if (index &lt;= 1) {</div><div class='add'>+		list_for_each(pos, &amp;wx-&gt;vf_mvs.mvlist) {</div><div class='add'>+			entry = list_entry(pos, struct vf_macvlans, mvlist);</div><div class='add'>+			if (entry-&gt;vf == vf) {</div><div class='add'>+				entry-&gt;vf = -1;</div><div class='add'>+				entry-&gt;free = true;</div><div class='add'>+				entry-&gt;is_macvlan = false;</div><div class='add'>+				wx_del_mac_filter(wx, entry-&gt;vf_macvlan, vf);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!index)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	entry = NULL;</div><div class='add'>+	list_for_each(pos, &amp;wx-&gt;vf_mvs.mvlist) {</div><div class='add'>+		entry = list_entry(pos, struct vf_macvlans, mvlist);</div><div class='add'>+		if (entry-&gt;free)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!entry || !entry-&gt;free)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	retval = wx_add_mac_filter(wx, mac_addr, vf);</div><div class='add'>+	if (retval &gt;= 0) {</div><div class='add'>+		entry-&gt;free = false;</div><div class='add'>+		entry-&gt;is_macvlan = true;</div><div class='add'>+		entry-&gt;vf = vf;</div><div class='add'>+		memcpy(entry-&gt;vf_macvlan, mac_addr, ETH_ALEN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return retval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_set_vf_vlan_msg(struct wx *wx, u32 *msgbuf, u16 vf)</div><div class='add'>+{</div><div class='add'>+	int add = (msgbuf[0] &amp; WX_VT_MSGINFO_MASK) &gt;&gt; WX_VT_MSGINFO_SHIFT;</div><div class='add'>+	int vid = (msgbuf[1] &amp; WX_PSR_VLAN_SWC_VLANID_MASK);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (add)</div><div class='add'>+		wx-&gt;vfinfo[vf].vlan_count++;</div><div class='add'>+	else if (wx-&gt;vfinfo[vf].vlan_count)</div><div class='add'>+		wx-&gt;vfinfo[vf].vlan_count--;</div><div class='add'>+</div><div class='add'>+	/* in case of promiscuous mode any VLAN filter set for a VF must</div><div class='add'>+	 * also have the PF pool added to it.</div><div class='add'>+	 */</div><div class='add'>+	if (add &amp;&amp; wx-&gt;netdev-&gt;flags &amp; IFF_PROMISC)</div><div class='add'>+		wx_set_vf_vlan(wx, add, vid, VMDQ_P(0));</div><div class='add'>+</div><div class='add'>+	ret = wx_set_vf_vlan(wx, add, vid, vf);</div><div class='add'>+	if (!ret &amp;&amp; wx-&gt;vfinfo[vf].spoofchk_enabled)</div><div class='add'>+		wx_set_vlan_anti_spoofing(wx, true, vf);</div><div class='add'>+</div><div class='add'>+	/* Go through all the checks to see if the VLAN filter should</div><div class='add'>+	 * be wiped completely.</div><div class='add'>+	 */</div><div class='add'>+	if (!add &amp;&amp; wx-&gt;netdev-&gt;flags &amp; IFF_PROMISC) {</div><div class='add'>+		u32 bits = 0, vlvf;</div><div class='add'>+		int reg_ndx;</div><div class='add'>+</div><div class='add'>+		reg_ndx = wx_find_vlvf_entry(wx, vid);</div><div class='add'>+		if (reg_ndx &lt; 0)</div><div class='add'>+			return -ENOSPC;</div><div class='add'>+		wr32(wx, WX_PSR_VLAN_SWC_IDX, reg_ndx);</div><div class='add'>+		vlvf = rd32(wx, WX_PSR_VLAN_SWC);</div><div class='add'>+		/* See if any other pools are set for this VLAN filter</div><div class='add'>+		 * entry other than the PF.</div><div class='add'>+		 */</div><div class='add'>+		if (VMDQ_P(0) &lt; 32) {</div><div class='add'>+			bits = rd32(wx, WX_PSR_VLAN_SWC_VM_L);</div><div class='add'>+			bits &amp;= ~BIT(VMDQ_P(0));</div><div class='add'>+			if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags))</div><div class='add'>+				bits |= rd32(wx, WX_PSR_VLAN_SWC_VM_H);</div><div class='add'>+		} else {</div><div class='add'>+			if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags))</div><div class='add'>+				bits = rd32(wx, WX_PSR_VLAN_SWC_VM_H);</div><div class='add'>+			bits &amp;= ~BIT(VMDQ_P(0) % 32);</div><div class='add'>+			bits |= rd32(wx, WX_PSR_VLAN_SWC_VM_L);</div><div class='add'>+		}</div><div class='add'>+		/* If the filter was removed then ensure PF pool bit</div><div class='add'>+		 * is cleared if the PF only added itself to the pool</div><div class='add'>+		 * because the PF is in promiscuous mode.</div><div class='add'>+		 */</div><div class='add'>+		if ((vlvf &amp; VLAN_VID_MASK) == vid &amp;&amp; !bits)</div><div class='add'>+			wx_set_vf_vlan(wx, add, vid, VMDQ_P(0));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_set_vf_macvlan_msg(struct wx *wx, u32 *msgbuf, u16 vf)</div><div class='add'>+{</div><div class='add'>+	int index = (msgbuf[0] &amp; WX_VT_MSGINFO_MASK) &gt;&gt;</div><div class='add'>+		    WX_VT_MSGINFO_SHIFT;</div><div class='add'>+	u8 *new_mac = ((u8 *)(&amp;msgbuf[1]));</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;vfinfo[vf].pf_set_mac &amp;&amp; index &gt; 0) {</div><div class='add'>+		wx_err(wx, "VF %d request MACVLAN filter but is denied\n", vf);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* An non-zero index indicates the VF is setting a filter */</div><div class='add'>+	if (index) {</div><div class='add'>+		if (!is_valid_ether_addr(new_mac)) {</div><div class='add'>+			wx_err(wx, "VF %d attempted to set invalid mac\n", vf);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		/* If the VF is allowed to set MAC filters then turn off</div><div class='add'>+		 * anti-spoofing to avoid false positives.</div><div class='add'>+		 */</div><div class='add'>+		if (wx-&gt;vfinfo[vf].spoofchk_enabled)</div><div class='add'>+			wx_set_vf_spoofchk(wx-&gt;netdev, vf, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = wx_set_vf_macvlan(wx, vf, index, new_mac);</div><div class='add'>+	if (err == -ENOSPC)</div><div class='add'>+		wx_err(wx,</div><div class='add'>+		       "VF %d request MACVLAN filter but there is no space\n",</div><div class='add'>+		       vf);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_negotiate_vf_api(struct wx *wx, u32 *msgbuf, u32 vf)</div><div class='add'>+{</div><div class='add'>+	int api = msgbuf[1];</div><div class='add'>+</div><div class='add'>+	switch (api) {</div><div class='add'>+	case wx_mbox_api_13:</div><div class='add'>+		wx-&gt;vfinfo[vf].vf_api = api;</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		wx_err(wx, "VF %d requested invalid api version %u\n", vf, api);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_get_vf_link_state(struct wx *wx, u32 *msgbuf, u32 vf)</div><div class='add'>+{</div><div class='add'>+	msgbuf[1] = wx-&gt;vfinfo[vf].link_enable;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_get_fw_version(struct wx *wx, u32 *msgbuf, u32 vf)</div><div class='add'>+{</div><div class='add'>+	unsigned long fw_version = 0ULL;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = kstrtoul(wx-&gt;eeprom_id, 16, &amp;fw_version);</div><div class='add'>+	if (ret)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	msgbuf[1] = fw_version;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_update_vf_xcast_mode(struct wx *wx, u32 *msgbuf, u32 vf)</div><div class='add'>+{</div><div class='add'>+	int xcast_mode = msgbuf[1];</div><div class='add'>+	u32 vmolr, disable, enable;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;vfinfo[vf].xcast_mode == xcast_mode)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (xcast_mode) {</div><div class='add'>+	case WXVF_XCAST_MODE_NONE:</div><div class='add'>+		disable = WX_PSR_VM_L2CTL_BAM | WX_PSR_VM_L2CTL_ROMPE |</div><div class='add'>+			  WX_PSR_VM_L2CTL_MPE | WX_PSR_VM_L2CTL_UPE |</div><div class='add'>+			  WX_PSR_VM_L2CTL_VPE;</div><div class='add'>+		enable = 0;</div><div class='add'>+		break;</div><div class='add'>+	case WXVF_XCAST_MODE_MULTI:</div><div class='add'>+		disable = WX_PSR_VM_L2CTL_MPE | WX_PSR_VM_L2CTL_UPE |</div><div class='add'>+			  WX_PSR_VM_L2CTL_VPE;</div><div class='add'>+		enable = WX_PSR_VM_L2CTL_BAM | WX_PSR_VM_L2CTL_ROMPE;</div><div class='add'>+		break;</div><div class='add'>+	case WXVF_XCAST_MODE_ALLMULTI:</div><div class='add'>+		disable = WX_PSR_VM_L2CTL_UPE | WX_PSR_VM_L2CTL_VPE;</div><div class='add'>+		enable = WX_PSR_VM_L2CTL_BAM | WX_PSR_VM_L2CTL_ROMPE |</div><div class='add'>+			 WX_PSR_VM_L2CTL_MPE;</div><div class='add'>+		break;</div><div class='add'>+	case WXVF_XCAST_MODE_PROMISC:</div><div class='add'>+		disable = 0;</div><div class='add'>+		enable = WX_PSR_VM_L2CTL_BAM | WX_PSR_VM_L2CTL_ROMPE |</div><div class='add'>+			 WX_PSR_VM_L2CTL_MPE | WX_PSR_VM_L2CTL_UPE |</div><div class='add'>+			 WX_PSR_VM_L2CTL_VPE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vmolr = rd32(wx, WX_PSR_VM_L2CTL(vf));</div><div class='add'>+	vmolr &amp;= ~disable;</div><div class='add'>+	vmolr |= enable;</div><div class='add'>+	wr32(wx, WX_PSR_VM_L2CTL(vf), vmolr);</div><div class='add'>+</div><div class='add'>+	wx-&gt;vfinfo[vf].xcast_mode = xcast_mode;</div><div class='add'>+	msgbuf[1] = xcast_mode;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_rcv_msg_from_vf(struct wx *wx, u16 vf)</div><div class='add'>+{</div><div class='add'>+	u16 mbx_size = WX_VXMAILBOX_SIZE;</div><div class='add'>+	u32 msgbuf[WX_VXMAILBOX_SIZE];</div><div class='add'>+	int retval;</div><div class='add'>+</div><div class='add'>+	retval = wx_read_mbx_pf(wx, msgbuf, mbx_size, vf);</div><div class='add'>+	if (retval) {</div><div class='add'>+		wx_err(wx, "Error receiving message from VF\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* this is a message we already processed, do nothing */</div><div class='add'>+	if (msgbuf[0] &amp; (WX_VT_MSGTYPE_ACK | WX_VT_MSGTYPE_NACK))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (msgbuf[0] == WX_VF_RESET) {</div><div class='add'>+		wx_vf_reset_msg(wx, vf);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* until the vf completes a virtual function reset it should not be</div><div class='add'>+	 * allowed to start any configuration.</div><div class='add'>+	 */</div><div class='add'>+	if (!wx-&gt;vfinfo[vf].clear_to_send) {</div><div class='add'>+		msgbuf[0] |= WX_VT_MSGTYPE_NACK;</div><div class='add'>+		wx_write_mbx_pf(wx, msgbuf, 1, vf);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((msgbuf[0] &amp; U16_MAX)) {</div><div class='add'>+	case WX_VF_SET_MAC_ADDR:</div><div class='add'>+		retval = wx_set_vf_mac_addr(wx, msgbuf, vf);</div><div class='add'>+		break;</div><div class='add'>+	case WX_VF_SET_MULTICAST:</div><div class='add'>+		wx_set_vf_multicasts(wx, msgbuf, vf);</div><div class='add'>+		retval = 0;</div><div class='add'>+		break;</div><div class='add'>+	case WX_VF_SET_VLAN:</div><div class='add'>+		retval = wx_set_vf_vlan_msg(wx, msgbuf, vf);</div><div class='add'>+		break;</div><div class='add'>+	case WX_VF_SET_LPE:</div><div class='add'>+		wx_set_vf_lpe(wx, msgbuf[1], vf);</div><div class='add'>+		retval = 0;</div><div class='add'>+		break;</div><div class='add'>+	case WX_VF_SET_MACVLAN:</div><div class='add'>+		retval = wx_set_vf_macvlan_msg(wx, msgbuf, vf);</div><div class='add'>+		break;</div><div class='add'>+	case WX_VF_API_NEGOTIATE:</div><div class='add'>+		retval = wx_negotiate_vf_api(wx, msgbuf, vf);</div><div class='add'>+		break;</div><div class='add'>+	case WX_VF_GET_QUEUES:</div><div class='add'>+		retval = wx_get_vf_queues(wx, msgbuf, vf);</div><div class='add'>+		break;</div><div class='add'>+	case WX_VF_GET_LINK_STATE:</div><div class='add'>+		retval = wx_get_vf_link_state(wx, msgbuf, vf);</div><div class='add'>+		break;</div><div class='add'>+	case WX_VF_GET_FW_VERSION:</div><div class='add'>+		retval = wx_get_fw_version(wx, msgbuf, vf);</div><div class='add'>+		break;</div><div class='add'>+	case WX_VF_UPDATE_XCAST_MODE:</div><div class='add'>+		retval = wx_update_vf_xcast_mode(wx, msgbuf, vf);</div><div class='add'>+		break;</div><div class='add'>+	case WX_VF_BACKUP:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		wx_err(wx, "Unhandled Msg %8.8x\n", msgbuf[0]);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* notify the VF of the results of what it sent us */</div><div class='add'>+	if (retval)</div><div class='add'>+		msgbuf[0] |= WX_VT_MSGTYPE_NACK;</div><div class='add'>+	else</div><div class='add'>+		msgbuf[0] |= WX_VT_MSGTYPE_ACK;</div><div class='add'>+</div><div class='add'>+	msgbuf[0] |= WX_VT_MSGTYPE_CTS;</div><div class='add'>+</div><div class='add'>+	wx_write_mbx_pf(wx, msgbuf, mbx_size, vf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_rcv_ack_from_vf(struct wx *wx, u16 vf)</div><div class='add'>+{</div><div class='add'>+	u32 msg = WX_VT_MSGTYPE_NACK;</div><div class='add'>+</div><div class='add'>+	/* if device isn't clear to send it shouldn't be reading either */</div><div class='add'>+	if (!wx-&gt;vfinfo[vf].clear_to_send)</div><div class='add'>+		wx_write_mbx_pf(wx, &amp;msg, 1, vf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wx_msg_task(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u16 vf;</div><div class='add'>+</div><div class='add'>+	for (vf = 0; vf &lt; wx-&gt;num_vfs; vf++) {</div><div class='add'>+		/* process any reset requests */</div><div class='add'>+		if (!wx_check_for_rst_pf(wx, vf))</div><div class='add'>+			wx_vf_reset_event(wx, vf);</div><div class='add'>+</div><div class='add'>+		/* process any messages pending */</div><div class='add'>+		if (!wx_check_for_msg_pf(wx, vf))</div><div class='add'>+			wx_rcv_msg_from_vf(wx, vf);</div><div class='add'>+</div><div class='add'>+		/* process any acks */</div><div class='add'>+		if (!wx_check_for_ack_pf(wx, vf))</div><div class='add'>+			wx_rcv_ack_from_vf(wx, vf);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_msg_task);</div><div class='add'>+</div><div class='add'>+void wx_disable_vf_rx_tx(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	wr32(wx, WX_TDM_VFTE_CLR(0), U32_MAX);</div><div class='add'>+	wr32(wx, WX_RDM_VFRE_CLR(0), U32_MAX);</div><div class='add'>+	if (test_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags)) {</div><div class='add'>+		wr32(wx, WX_TDM_VFTE_CLR(1), U32_MAX);</div><div class='add'>+		wr32(wx, WX_RDM_VFRE_CLR(1), U32_MAX);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_disable_vf_rx_tx);</div><div class='add'>+</div><div class='add'>+void wx_ping_all_vfs_with_link_status(struct wx *wx, bool link_up)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[2] = {0, 0};</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	if (!wx-&gt;num_vfs)</div><div class='add'>+		return;</div><div class='add'>+	msgbuf[0] = WX_PF_NOFITY_VF_LINK_STATUS | WX_PF_CONTROL_MSG;</div><div class='add'>+	if (link_up)</div><div class='add'>+		msgbuf[1] = FIELD_PREP(GENMASK(31, 1), wx-&gt;speed) | link_up;</div><div class='add'>+	if (wx-&gt;notify_down)</div><div class='add'>+		msgbuf[1] |= WX_PF_NOFITY_VF_NET_NOT_RUNNING;</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;num_vfs; i++) {</div><div class='add'>+		if (wx-&gt;vfinfo[i].clear_to_send)</div><div class='add'>+			msgbuf[0] |= WX_VT_MSGTYPE_CTS;</div><div class='add'>+		wx_write_mbx_pf(wx, msgbuf, 2, i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_ping_all_vfs_with_link_status);</div><div class='add'>+</div><div class='add'>+static void wx_set_vf_link_state(struct wx *wx, int vf, int state)</div><div class='add'>+{</div><div class='add'>+	wx-&gt;vfinfo[vf].link_state = state;</div><div class='add'>+	switch (state) {</div><div class='add'>+	case IFLA_VF_LINK_STATE_AUTO:</div><div class='add'>+		if (netif_running(wx-&gt;netdev))</div><div class='add'>+			wx-&gt;vfinfo[vf].link_enable = true;</div><div class='add'>+		else</div><div class='add'>+			wx-&gt;vfinfo[vf].link_enable = false;</div><div class='add'>+		break;</div><div class='add'>+	case IFLA_VF_LINK_STATE_ENABLE:</div><div class='add'>+		wx-&gt;vfinfo[vf].link_enable = true;</div><div class='add'>+		break;</div><div class='add'>+	case IFLA_VF_LINK_STATE_DISABLE:</div><div class='add'>+		wx-&gt;vfinfo[vf].link_enable = false;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	/* restart the VF */</div><div class='add'>+	wx-&gt;vfinfo[vf].clear_to_send = false;</div><div class='add'>+	wx_ping_vf(wx, vf);</div><div class='add'>+</div><div class='add'>+	wx_set_vf_rx_tx(wx, vf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wx_set_all_vfs(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;num_vfs; i++)</div><div class='add'>+		wx_set_vf_link_state(wx, i, wx-&gt;vfinfo[i].link_state);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_set_all_vfs);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_sriov.h b/drivers/net/ethernet/wangxun/libwx/wx_sriov.h<br/>new file mode 100644<br/>index 000000000000..8a3a47bb5815<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_sriov.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_sriov.h</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#ifndef _WX_SRIOV_H_</div><div class='add'>+#define _WX_SRIOV_H_</div><div class='add'>+</div><div class='add'>+#define WX_VF_ENABLE_CHECK(_m)          FIELD_GET(BIT(31), (_m))</div><div class='add'>+#define WX_VF_NUM_GET(_m)               FIELD_GET(GENMASK(5, 0), (_m))</div><div class='add'>+#define WX_VF_ENABLE                    BIT(31)</div><div class='add'>+</div><div class='add'>+void wx_disable_sriov(struct wx *wx);</div><div class='add'>+int wx_pci_sriov_configure(struct pci_dev *pdev, int num_vfs);</div><div class='add'>+void wx_msg_task(struct wx *wx);</div><div class='add'>+void wx_disable_vf_rx_tx(struct wx *wx);</div><div class='add'>+void wx_ping_all_vfs_with_link_status(struct wx *wx, bool link_up);</div><div class='add'>+void wx_set_all_vfs(struct wx *wx);</div><div class='add'>+</div><div class='add'>+#endif /* _WX_SRIOV_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_type.h b/drivers/net/ethernet/wangxun/libwx/wx_type.h<br/>index b54bffda027b..29e5c5470c94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_type.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/libwx/wx_type.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_type.h</a></div><div class='hunk'>@@ -4,10 +4,13 @@</div><div class='ctx'> #ifndef _WX_TYPE_H_</div><div class='ctx'> #define _WX_TYPE_H_</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+#include &lt;linux/timecounter.h&gt;</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/dim.h&gt;</div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define WX_NCSI_SUP                             0x8000</div><div class='hunk'>@@ -18,8 +21,13 @@</div><div class='ctx'> /* MSI-X capability fields masks */</div><div class='ctx'> #define WX_PCIE_MSIX_TBL_SZ_MASK                0x7FF</div><div class='ctx'> #define WX_PCI_LINK_STATUS                      0xB2</div><div class='add'>+#define WX_MAX_PF_MACVLANS                      15</div><div class='add'>+#define WX_MAX_VF_MC_ENTRIES                    30</div><div class='ctx'> </div><div class='ctx'> /**************** Global Registers ****************************/</div><div class='add'>+#define WX_VF_REG_OFFSET(_v)         FIELD_GET(GENMASK(15, 5), (_v))</div><div class='add'>+#define WX_VF_IND_SHIFT(_v)          FIELD_GET(GENMASK(4, 0), (_v))</div><div class='add'>+</div><div class='ctx'> /* chip control Registers */</div><div class='ctx'> #define WX_MIS_PWR                   0x10000</div><div class='ctx'> #define WX_MIS_RST                   0x1000C</div><div class='hunk'>@@ -74,6 +82,14 @@</div><div class='ctx'> #define WX_MAC_LXONOFFRXC            0x11E0C</div><div class='ctx'> </div><div class='ctx'> /*********************** Receive DMA registers **************************/</div><div class='add'>+#define WX_RDM_VF_RE(_i)             (0x12004 + ((_i) * 4))</div><div class='add'>+#define WX_RDM_RSC_CTL               0x1200C</div><div class='add'>+#define WX_RDM_RSC_CTL_FREE_CNT_DIS  BIT(8)</div><div class='add'>+#define WX_RDM_RSC_CTL_FREE_CTL      BIT(7)</div><div class='add'>+#define WX_RDM_PF_QDE(_i)            (0x12080 + ((_i) * 4))</div><div class='add'>+#define WX_RDM_VFRE_CLR(_i)          (0x120A0 + ((_i) * 4))</div><div class='add'>+#define WX_RDM_DCACHE_CTL            0x120A8</div><div class='add'>+#define WX_RDM_DCACHE_CTL_EN         BIT(0)</div><div class='ctx'> #define WX_RDM_DRP_PKT               0x12500</div><div class='ctx'> #define WX_RDM_PKT_CNT               0x12504</div><div class='ctx'> #define WX_RDM_BYTE_CNT_LSB          0x12508</div><div class='hunk'>@@ -82,12 +98,19 @@</div><div class='ctx'> /************************* Port Registers ************************************/</div><div class='ctx'> /* port cfg Registers */</div><div class='ctx'> #define WX_CFG_PORT_CTL              0x14400</div><div class='add'>+#define WX_CFG_PORT_CTL_PFRSTD       BIT(14)</div><div class='ctx'> #define WX_CFG_PORT_CTL_DRV_LOAD     BIT(3)</div><div class='ctx'> #define WX_CFG_PORT_CTL_QINQ         BIT(2)</div><div class='ctx'> #define WX_CFG_PORT_CTL_D_VLAN       BIT(0) /* double vlan*/</div><div class='add'>+#define WX_CFG_PORT_ST               0x14404</div><div class='add'>+#define WX_CFG_PORT_ST_LANID         GENMASK(9, 8)</div><div class='ctx'> #define WX_CFG_TAG_TPID(_i)          (0x14430 + ((_i) * 4))</div><div class='ctx'> #define WX_CFG_PORT_CTL_NUM_VT_MASK  GENMASK(13, 12) /* number of TVs */</div><div class='ctx'> </div><div class='add'>+#define WX_CFG_PORT_CTL_NUM_VT_NONE  0</div><div class='add'>+#define WX_CFG_PORT_CTL_NUM_VT_8     FIELD_PREP(GENMASK(13, 12), 1)</div><div class='add'>+#define WX_CFG_PORT_CTL_NUM_VT_32    FIELD_PREP(GENMASK(13, 12), 2)</div><div class='add'>+#define WX_CFG_PORT_CTL_NUM_VT_64    FIELD_PREP(GENMASK(13, 12), 3)</div><div class='ctx'> </div><div class='ctx'> /* GPIO Registers */</div><div class='ctx'> #define WX_GPIO_DR                   0x14800</div><div class='hunk'>@@ -110,6 +133,11 @@</div><div class='ctx'> /*********************** Transmit DMA registers **************************/</div><div class='ctx'> /* transmit global control */</div><div class='ctx'> #define WX_TDM_CTL                   0x18000</div><div class='add'>+#define WX_TDM_VF_TE(_i)             (0x18004 + ((_i) * 4))</div><div class='add'>+#define WX_TDM_MAC_AS(_i)            (0x18060 + ((_i) * 4))</div><div class='add'>+#define WX_TDM_VLAN_AS(_i)           (0x18070 + ((_i) * 4))</div><div class='add'>+#define WX_TDM_VFTE_CLR(_i)          (0x180A0 + ((_i) * 4))</div><div class='add'>+</div><div class='ctx'> /* TDM CTL BIT */</div><div class='ctx'> #define WX_TDM_CTL_TE                BIT(0) /* Transmit Enable */</div><div class='ctx'> #define WX_TDM_PB_THRE(_i)           (0x18020 + ((_i) * 4))</div><div class='hunk'>@@ -147,9 +175,12 @@</div><div class='ctx'> #define WX_RDB_PL_CFG_L2HDR          BIT(3)</div><div class='ctx'> #define WX_RDB_PL_CFG_TUN_TUNHDR     BIT(4)</div><div class='ctx'> #define WX_RDB_PL_CFG_TUN_OUTL2HDR   BIT(5)</div><div class='add'>+#define WX_RDB_PL_CFG_RSS_EN         BIT(24)</div><div class='add'>+#define WX_RDB_PL_CFG_RSS_MASK       GENMASK(23, 16)</div><div class='ctx'> #define WX_RDB_RSSTBL(_i)            (0x19400 + ((_i) * 4))</div><div class='ctx'> #define WX_RDB_RSSRK(_i)             (0x19480 + ((_i) * 4))</div><div class='ctx'> #define WX_RDB_RA_CTL                0x194F4</div><div class='add'>+#define WX_RDB_RA_CTL_MULTI_RSS      BIT(0)</div><div class='ctx'> #define WX_RDB_RA_CTL_RSS_EN         BIT(2) /* RSS Enable */</div><div class='ctx'> #define WX_RDB_RA_CTL_RSS_IPV4_TCP   BIT(16)</div><div class='ctx'> #define WX_RDB_RA_CTL_RSS_IPV4       BIT(17)</div><div class='hunk'>@@ -157,12 +188,17 @@</div><div class='ctx'> #define WX_RDB_RA_CTL_RSS_IPV6_TCP   BIT(21)</div><div class='ctx'> #define WX_RDB_RA_CTL_RSS_IPV4_UDP   BIT(22)</div><div class='ctx'> #define WX_RDB_RA_CTL_RSS_IPV6_UDP   BIT(23)</div><div class='add'>+#define WX_RDB_RA_CTL_RSS_MASK       GENMASK(23, 16)</div><div class='ctx'> #define WX_RDB_FDIR_MATCH            0x19558</div><div class='ctx'> #define WX_RDB_FDIR_MISS             0x1955C</div><div class='add'>+/* VM RSS */</div><div class='add'>+#define WX_RDB_VMRSSRK(_i, _p)       (0x1A000 + ((_i) * 4) + ((_p) * 0x40))</div><div class='add'>+#define WX_RDB_VMRSSTBL(_i, _p)      (0x1B000 + ((_i) * 4) + ((_p) * 0x40))</div><div class='ctx'> </div><div class='ctx'> /******************************* PSR Registers *******************************/</div><div class='ctx'> /* psr control */</div><div class='ctx'> #define WX_PSR_CTL                   0x15000</div><div class='add'>+#define WX_PSR_VM_CTL                0x151B0</div><div class='ctx'> /* Header split receive */</div><div class='ctx'> #define WX_PSR_CTL_SW_EN             BIT(18)</div><div class='ctx'> #define WX_PSR_CTL_RSC_ACK           BIT(17)</div><div class='hunk'>@@ -180,14 +216,36 @@</div><div class='ctx'> #define WX_PSR_VLAN_CTL              0x15088</div><div class='ctx'> #define WX_PSR_VLAN_CTL_CFIEN        BIT(29)  /* bit 29 */</div><div class='ctx'> #define WX_PSR_VLAN_CTL_VFE          BIT(30)  /* bit 30 */</div><div class='add'>+/* EType Queue Filter */</div><div class='add'>+#define WX_PSR_ETYPE_SWC(_i)         (0x15128 + ((_i) * 4))</div><div class='add'>+#define WX_PSR_ETYPE_SWC_FILTER_1588 3</div><div class='add'>+#define WX_PSR_ETYPE_SWC_FILTER_EN   BIT(31)</div><div class='add'>+#define WX_PSR_ETYPE_SWC_1588        BIT(30)</div><div class='add'>+/* 1588 */</div><div class='add'>+#define WX_PSR_1588_MSG                 0x15120</div><div class='add'>+#define WX_PSR_1588_MSG_V1_SYNC         FIELD_PREP(GENMASK(7, 0), 0)</div><div class='add'>+#define WX_PSR_1588_MSG_V1_DELAY_REQ    FIELD_PREP(GENMASK(7, 0), 1)</div><div class='add'>+#define WX_PSR_1588_STMPL               0x151E8</div><div class='add'>+#define WX_PSR_1588_STMPH               0x151A4</div><div class='add'>+#define WX_PSR_1588_CTL                 0x15188</div><div class='add'>+#define WX_PSR_1588_CTL_ENABLED         BIT(4)</div><div class='add'>+#define WX_PSR_1588_CTL_TYPE_MASK       GENMASK(3, 1)</div><div class='add'>+#define WX_PSR_1588_CTL_TYPE_L4_V1      FIELD_PREP(GENMASK(3, 1), 1)</div><div class='add'>+#define WX_PSR_1588_CTL_TYPE_EVENT_V2   FIELD_PREP(GENMASK(3, 1), 5)</div><div class='add'>+#define WX_PSR_1588_CTL_VALID           BIT(0)</div><div class='ctx'> /* mcasst/ucast overflow tbl */</div><div class='ctx'> #define WX_PSR_MC_TBL(_i)            (0x15200  + ((_i) * 4))</div><div class='add'>+#define WX_PSR_MC_TBL_REG(_i)        FIELD_GET(GENMASK(11, 5), (_i))</div><div class='add'>+#define WX_PSR_MC_TBL_BIT(_i)        FIELD_GET(GENMASK(4, 0), (_i))</div><div class='ctx'> #define WX_PSR_UC_TBL(_i)            (0x15400 + ((_i) * 4))</div><div class='add'>+#define WX_PSR_VM_CTL_REPLEN         BIT(30) /* replication enabled */</div><div class='add'>+#define WX_PSR_VM_CTL_POOL_MASK      GENMASK(12, 7)</div><div class='ctx'> </div><div class='ctx'> /* VM L2 contorl */</div><div class='ctx'> #define WX_PSR_VM_L2CTL(_i)          (0x15600 + ((_i) * 4))</div><div class='ctx'> #define WX_PSR_VM_L2CTL_UPE          BIT(4) /* unicast promiscuous */</div><div class='ctx'> #define WX_PSR_VM_L2CTL_VACC         BIT(6) /* accept nomatched vlan */</div><div class='add'>+#define WX_PSR_VM_L2CTL_VPE          BIT(7) /* vlan promiscuous mode */</div><div class='ctx'> #define WX_PSR_VM_L2CTL_AUPE         BIT(8) /* accept untagged packets */</div><div class='ctx'> #define WX_PSR_VM_L2CTL_ROMPE        BIT(9) /* accept packets in MTA tbl */</div><div class='ctx'> #define WX_PSR_VM_L2CTL_ROPE         BIT(10) /* accept packets in UC tbl */</div><div class='hunk'>@@ -226,10 +284,12 @@</div><div class='ctx'> #define WX_PSR_VLAN_SWC              0x16220</div><div class='ctx'> #define WX_PSR_VLAN_SWC_VM_L         0x16224</div><div class='ctx'> #define WX_PSR_VLAN_SWC_VM_H         0x16228</div><div class='add'>+#define WX_PSR_VLAN_SWC_VM(_i)       (0x16224 + ((_i) * 4))</div><div class='ctx'> #define WX_PSR_VLAN_SWC_IDX          0x16230         /* 64 vlan entries */</div><div class='ctx'> /* VLAN pool filtering masks */</div><div class='ctx'> #define WX_PSR_VLAN_SWC_VIEN         BIT(31)  /* filter is valid */</div><div class='ctx'> #define WX_PSR_VLAN_SWC_ENTRIES      64</div><div class='add'>+#define WX_PSR_VLAN_SWC_VLANID_MASK  GENMASK(11, 0)</div><div class='ctx'> </div><div class='ctx'> /********************************* RSEC **************************************/</div><div class='ctx'> /* general rsec */</div><div class='hunk'>@@ -240,6 +300,13 @@</div><div class='ctx'> #define WX_RSC_ST                    0x17004</div><div class='ctx'> #define WX_RSC_ST_RSEC_RDY           BIT(0)</div><div class='ctx'> </div><div class='add'>+/*********************** Transmit DMA registers **************************/</div><div class='add'>+/* transmit global control */</div><div class='add'>+#define WX_TDM_ETYPE_AS(_i)          (0x18058 + ((_i) * 4))</div><div class='add'>+#define WX_TDM_VLAN_INS(_i)          (0x18100 + ((_i) * 4))</div><div class='add'>+/* Per VF Port VLAN insertion rules */</div><div class='add'>+#define WX_TDM_VLAN_INS_VLANA_DEFAULT BIT(30) /* Always use default VLAN*/</div><div class='add'>+</div><div class='ctx'> /****************************** TDB ******************************************/</div><div class='ctx'> #define WX_TDB_PB_SZ(_i)             (0x1CC00 + ((_i) * 4))</div><div class='ctx'> #define WX_TXPKT_SIZE_MAX            0xA /* Max Tx Packet size */</div><div class='hunk'>@@ -253,6 +320,32 @@</div><div class='ctx'> #define WX_TSC_ST_SECTX_RDY          BIT(0)</div><div class='ctx'> #define WX_TSC_BUF_AE                0x1D00C</div><div class='ctx'> #define WX_TSC_BUF_AE_THR            GENMASK(9, 0)</div><div class='add'>+/* 1588 */</div><div class='add'>+#define WX_TSC_1588_CTL              0x11F00</div><div class='add'>+#define WX_TSC_1588_CTL_ENABLED      BIT(4)</div><div class='add'>+#define WX_TSC_1588_CTL_VALID        BIT(0)</div><div class='add'>+#define WX_TSC_1588_STMPL            0x11F04</div><div class='add'>+#define WX_TSC_1588_STMPH            0x11F08</div><div class='add'>+#define WX_TSC_1588_SYSTIML          0x11F0C</div><div class='add'>+#define WX_TSC_1588_SYSTIMH          0x11F10</div><div class='add'>+#define WX_TSC_1588_INC              0x11F14</div><div class='add'>+#define WX_TSC_1588_INT_ST           0x11F20</div><div class='add'>+#define WX_TSC_1588_INT_ST_TT1       BIT(5)</div><div class='add'>+#define WX_TSC_1588_INT_EN           0x11F24</div><div class='add'>+#define WX_TSC_1588_INT_EN_TT1       BIT(5)</div><div class='add'>+#define WX_TSC_1588_AUX_CTL          0x11F28</div><div class='add'>+#define WX_TSC_1588_AUX_CTL_EN_TS0   BIT(8)</div><div class='add'>+#define WX_TSC_1588_AUX_CTL_EN_TT1   BIT(2)</div><div class='add'>+#define WX_TSC_1588_AUX_CTL_PLSG     BIT(1)</div><div class='add'>+#define WX_TSC_1588_AUX_CTL_EN_TT0   BIT(0)</div><div class='add'>+#define WX_TSC_1588_TRGT_L(i)        (0x11F2C + ((i) * 8)) /* [0,1] */</div><div class='add'>+#define WX_TSC_1588_TRGT_H(i)        (0x11F30 + ((i) * 8)) /* [0,1] */</div><div class='add'>+#define WX_TSC_1588_SDP(i)           (0x11F5C + ((i) * 4)) /* [0,3] */</div><div class='add'>+#define WX_TSC_1588_SDP_OUT_LEVEL_H  FIELD_PREP(BIT(4), 0)</div><div class='add'>+#define WX_TSC_1588_SDP_OUT_LEVEL_L  FIELD_PREP(BIT(4), 1)</div><div class='add'>+#define WX_TSC_1588_SDP_FUN_SEL_MASK GENMASK(2, 0)</div><div class='add'>+#define WX_TSC_1588_SDP_FUN_SEL_TT0  FIELD_PREP(WX_TSC_1588_SDP_FUN_SEL_MASK, 1)</div><div class='add'>+#define WX_TSC_1588_SDP_FUN_SEL_TS0  FIELD_PREP(WX_TSC_1588_SDP_FUN_SEL_MASK, 5)</div><div class='ctx'> </div><div class='ctx'> /************************************** MNG ********************************/</div><div class='ctx'> #define WX_MNG_SWFW_SYNC             0x1E008</div><div class='hunk'>@@ -264,6 +357,10 @@</div><div class='ctx'> #define WX_MNG_MBOX_CTL_FWRDY        BIT(2)</div><div class='ctx'> #define WX_MNG_BMC2OS_CNT            0x1E090</div><div class='ctx'> #define WX_MNG_OS2BMC_CNT            0x1E094</div><div class='add'>+#define WX_SW2FW_MBOX_CMD            0x1E0A0</div><div class='add'>+#define WX_SW2FW_MBOX_CMD_VLD        BIT(31)</div><div class='add'>+#define WX_SW2FW_MBOX                0x1E200</div><div class='add'>+#define WX_FW2SW_MBOX                0x1E300</div><div class='ctx'> </div><div class='ctx'> /************************************* ETH MAC *****************************/</div><div class='ctx'> #define WX_MAC_TX_CFG                0x11000</div><div class='hunk'>@@ -279,6 +376,9 @@</div><div class='ctx'> #define WX_MAC_WDG_TIMEOUT           0x1100C</div><div class='ctx'> #define WX_MAC_RX_FLOW_CTRL          0x11090</div><div class='ctx'> #define WX_MAC_RX_FLOW_CTRL_RFE      BIT(0) /* receive fc enable */</div><div class='add'>+</div><div class='add'>+#define WX_MAC_WDG_TIMEOUT_WTO_MASK  GENMASK(3, 0)</div><div class='add'>+#define WX_MAC_WDG_TIMEOUT_WTO_DELTA 2</div><div class='ctx'> /* MDIO Registers */</div><div class='ctx'> #define WX_MSCA                      0x11200</div><div class='ctx'> #define WX_MSCA_RA(v)                FIELD_PREP(U16_MAX, v)</div><div class='hunk'>@@ -326,7 +426,9 @@ enum WX_MSCA_CMD_value {</div><div class='ctx'> #define WX_7K_ITR                    595</div><div class='ctx'> #define WX_12K_ITR                   336</div><div class='ctx'> #define WX_20K_ITR                   200</div><div class='add'>+#define WX_MIN_RSC_ITR               24</div><div class='ctx'> #define WX_SP_MAX_EITR               0x00000FF8U</div><div class='add'>+#define WX_AML_MAX_EITR              0x00000FFFU</div><div class='ctx'> #define WX_EM_MAX_EITR               0x00007FFCU</div><div class='ctx'> </div><div class='ctx'> /* transmit DMA Registers */</div><div class='hunk'>@@ -335,12 +437,15 @@ enum WX_MSCA_CMD_value {</div><div class='ctx'> #define WX_PX_TR_WP(_i)              (0x03008 + ((_i) * 0x40))</div><div class='ctx'> #define WX_PX_TR_RP(_i)              (0x0300C + ((_i) * 0x40))</div><div class='ctx'> #define WX_PX_TR_CFG(_i)             (0x03010 + ((_i) * 0x40))</div><div class='add'>+#define WX_PX_TR_HEAD_ADDRL(_i)      (0x03028 + ((_i) * 0x40))</div><div class='add'>+#define WX_PX_TR_HEAD_ADDRH(_i)      (0x0302C + ((_i) * 0x40))</div><div class='ctx'> /* Transmit Config masks */</div><div class='ctx'> #define WX_PX_TR_CFG_ENABLE          BIT(0) /* Ena specific Tx Queue */</div><div class='ctx'> #define WX_PX_TR_CFG_TR_SIZE_SHIFT   1 /* tx desc number per ring */</div><div class='ctx'> #define WX_PX_TR_CFG_SWFLSH          BIT(26) /* Tx Desc. wr-bk flushing */</div><div class='ctx'> #define WX_PX_TR_CFG_WTHRESH_SHIFT   16 /* shift to WTHRESH bits */</div><div class='ctx'> #define WX_PX_TR_CFG_THRE_SHIFT      8</div><div class='add'>+#define WX_PX_TR_CFG_HEAD_WB         BIT(27)</div><div class='ctx'> </div><div class='ctx'> /* Receive DMA Registers */</div><div class='ctx'> #define WX_PX_RR_BAL(_i)             (0x01000 + ((_i) * 0x40))</div><div class='hunk'>@@ -352,7 +457,10 @@ enum WX_MSCA_CMD_value {</div><div class='ctx'> /* PX_RR_CFG bit definitions */</div><div class='ctx'> #define WX_PX_RR_CFG_VLAN            BIT(31)</div><div class='ctx'> #define WX_PX_RR_CFG_DROP_EN         BIT(30)</div><div class='add'>+#define WX_PX_RR_CFG_RSC             BIT(29)</div><div class='ctx'> #define WX_PX_RR_CFG_SPLIT_MODE      BIT(26)</div><div class='add'>+#define WX_PX_RR_CFG_MAX_RSCBUF_16   FIELD_PREP(GENMASK(24, 23), 3)</div><div class='add'>+#define WX_PX_RR_CFG_DESC_MERGE      BIT(19)</div><div class='ctx'> #define WX_PX_RR_CFG_RR_THER_SHIFT   16</div><div class='ctx'> #define WX_PX_RR_CFG_RR_HDR_SZ       GENMASK(15, 12)</div><div class='ctx'> #define WX_PX_RR_CFG_RR_BUF_SZ       GENMASK(11, 8)</div><div class='hunk'>@@ -367,9 +475,19 @@ enum WX_MSCA_CMD_value {</div><div class='ctx'> /* Number of 80 microseconds we wait for PCI Express master disable */</div><div class='ctx'> #define WX_PCI_MASTER_DISABLE_TIMEOUT        80000</div><div class='ctx'> </div><div class='add'>+#define WX_RSS_64Q_MASK              0x3F</div><div class='add'>+#define WX_RSS_8Q_MASK               0x7</div><div class='add'>+#define WX_RSS_4Q_MASK               0x3</div><div class='add'>+#define WX_RSS_2Q_MASK               0x1</div><div class='add'>+#define WX_RSS_DISABLED_MASK         0x0</div><div class='add'>+</div><div class='add'>+#define WX_VMDQ_4Q_MASK              0x7C</div><div class='add'>+#define WX_VMDQ_2Q_MASK              0x7E</div><div class='add'>+</div><div class='ctx'> /****************** Manageablility Host Interface defines ********************/</div><div class='ctx'> #define WX_HI_MAX_BLOCK_BYTE_LENGTH  256 /* Num of bytes in range */</div><div class='ctx'> #define WX_HI_COMMAND_TIMEOUT        1000 /* Process HI command limit */</div><div class='add'>+#define WX_HIC_HDR_INDEX_MAX         255</div><div class='ctx'> </div><div class='ctx'> #define FW_READ_SHADOW_RAM_CMD       0x31</div><div class='ctx'> #define FW_READ_SHADOW_RAM_LEN       0x6</div><div class='hunk'>@@ -382,6 +500,8 @@ enum WX_MSCA_CMD_value {</div><div class='ctx'> #define FW_CEM_CMD_RESERVED          0X0</div><div class='ctx'> #define FW_CEM_MAX_RETRIES           3</div><div class='ctx'> #define FW_CEM_RESP_STATUS_SUCCESS   0x1</div><div class='add'>+#define FW_PPS_SET_CMD               0xF6</div><div class='add'>+#define FW_PPS_SET_LEN               0x14</div><div class='ctx'> </div><div class='ctx'> #define WX_SW_REGION_PTR             0x1C</div><div class='ctx'> </div><div class='hunk'>@@ -431,19 +551,14 @@ enum WX_MSCA_CMD_value {</div><div class='ctx'> #define WX_REQ_TX_DESCRIPTOR_MULTIPLE   128</div><div class='ctx'> </div><div class='ctx'> #define WX_MAX_JUMBO_FRAME_SIZE      9432 /* max payload 9414 */</div><div class='del'>-#define VMDQ_P(p)                    p</div><div class='add'>+#define VMDQ_P(p)       ((p) + wx-&gt;ring_feature[RING_F_VMDQ].offset)</div><div class='ctx'> </div><div class='ctx'> /* Supported Rx Buffer Sizes */</div><div class='ctx'> #define WX_RXBUFFER_256      256    /* Used for skb receive header */</div><div class='ctx'> #define WX_RXBUFFER_2K       2048</div><div class='add'>+#define WX_RXBUFFER_3K       3072</div><div class='ctx'> #define WX_MAX_RXBUFFER      16384  /* largest size for single descriptor */</div><div class='ctx'> </div><div class='del'>-#if MAX_SKB_FRAGS &lt; 8</div><div class='del'>-#define WX_RX_BUFSZ      ALIGN(WX_MAX_RXBUFFER / MAX_SKB_FRAGS, 1024)</div><div class='del'>-#else</div><div class='del'>-#define WX_RX_BUFSZ      WX_RXBUFFER_2K</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #define WX_RX_BUFFER_WRITE   16      /* Must be power of 2 */</div><div class='ctx'> </div><div class='ctx'> #define WX_MAX_DATA_PER_TXD  BIT(14)</div><div class='hunk'>@@ -451,8 +566,6 @@ enum WX_MSCA_CMD_value {</div><div class='ctx'> #define TXD_USE_COUNT(S)     DIV_ROUND_UP((S), WX_MAX_DATA_PER_TXD)</div><div class='ctx'> #define DESC_NEEDED          (MAX_SKB_FRAGS + 4)</div><div class='ctx'> </div><div class='del'>-#define WX_CFG_PORT_ST               0x14404</div><div class='del'>-</div><div class='ctx'> /******************* Receive Descriptor bit definitions **********************/</div><div class='ctx'> #define WX_RXD_STAT_DD               BIT(0) /* Done */</div><div class='ctx'> #define WX_RXD_STAT_EOP              BIT(1) /* End of Packet */</div><div class='hunk'>@@ -460,6 +573,8 @@ enum WX_MSCA_CMD_value {</div><div class='ctx'> #define WX_RXD_STAT_L4CS             BIT(7) /* L4 xsum calculated */</div><div class='ctx'> #define WX_RXD_STAT_IPCS             BIT(8) /* IP xsum calculated */</div><div class='ctx'> #define WX_RXD_STAT_OUTERIPCS        BIT(10) /* Cloud IP xsum calculated*/</div><div class='add'>+#define WX_RXD_STAT_IPV6EX           BIT(12) /* IPv6 Dest Header */</div><div class='add'>+#define WX_RXD_STAT_TS               BIT(14) /* IEEE1588 Time Stamp */</div><div class='ctx'> </div><div class='ctx'> #define WX_RXD_ERR_OUTERIPER         BIT(26) /* CRC IP Header error */</div><div class='ctx'> #define WX_RXD_ERR_RXE               BIT(29) /* Any MAC Error */</div><div class='hunk'>@@ -535,8 +650,12 @@ enum wx_l2_ptypes {</div><div class='ctx'> </div><div class='ctx'> #define WX_RXD_PKTTYPE(_rxd) \</div><div class='ctx'> 	((le32_to_cpu((_rxd)-&gt;wb.lower.lo_dword.data) &gt;&gt; 9) &amp; 0xFF)</div><div class='del'>-#define WX_RXD_IPV6EX(_rxd) \</div><div class='del'>-	((le32_to_cpu((_rxd)-&gt;wb.lower.lo_dword.data) &gt;&gt; 6) &amp; 0x1)</div><div class='add'>+</div><div class='add'>+#define WX_RXD_RSCCNT_MASK           GENMASK(20, 17)</div><div class='add'>+#define WX_RXD_RSCCNT_SHIFT          17</div><div class='add'>+#define WX_RXD_NEXTP_MASK            GENMASK(19, 4)</div><div class='add'>+#define WX_RXD_NEXTP_SHIFT           4</div><div class='add'>+</div><div class='ctx'> /*********************** Transmit Descriptor Config Masks ****************/</div><div class='ctx'> #define WX_TXD_STAT_DD               BIT(0)  /* Descriptor Done */</div><div class='ctx'> #define WX_TXD_DTYP_DATA             0       /* Adv Data Descriptor */</div><div class='hunk'>@@ -663,21 +782,30 @@ struct wx_hic_hdr {</div><div class='ctx'> 		u8 cmd_resv;</div><div class='ctx'> 		u8 ret_status;</div><div class='ctx'> 	} cmd_or_resp;</div><div class='del'>-	u8 checksum;</div><div class='add'>+	union {</div><div class='add'>+		u8 checksum;</div><div class='add'>+		u8 index;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct wx_hic_hdr2_req {</div><div class='ctx'> 	u8 cmd;</div><div class='ctx'> 	u8 buf_lenh;</div><div class='ctx'> 	u8 buf_lenl;</div><div class='del'>-	u8 checksum;</div><div class='add'>+	union {</div><div class='add'>+		u8 checksum;</div><div class='add'>+		u8 index;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct wx_hic_hdr2_rsp {</div><div class='ctx'> 	u8 cmd;</div><div class='ctx'> 	u8 buf_lenl;</div><div class='ctx'> 	u8 buf_lenh_status;     /* 7-5: high bits of buf_len, 4-0: status */</div><div class='del'>-	u8 checksum;</div><div class='add'>+	union {</div><div class='add'>+		u8 checksum;</div><div class='add'>+		u8 index;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> union wx_hic_hdr2 {</div><div class='hunk'>@@ -701,12 +829,30 @@ struct wx_hic_reset {</div><div class='ctx'> 	u16 reset_type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct wx_hic_set_pps {</div><div class='add'>+	struct wx_hic_hdr hdr;</div><div class='add'>+	u8 lan_id;</div><div class='add'>+	u8 enable;</div><div class='add'>+	u16 pad2;</div><div class='add'>+	u64 nsec;</div><div class='add'>+	u64 cycles;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Bus parameters */</div><div class='ctx'> struct wx_bus_info {</div><div class='ctx'> 	u8 func;</div><div class='ctx'> 	u16 device;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct wx_mbx_info {</div><div class='add'>+	u16 size;</div><div class='add'>+	u32 mailbox;</div><div class='add'>+	u32 udelay;</div><div class='add'>+	u32 timeout;</div><div class='add'>+	/* lock mbx access */</div><div class='add'>+	spinlock_t mbx_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct wx_thermal_sensor_data {</div><div class='ctx'> 	s16 temp;</div><div class='ctx'> 	s16 alarm_thresh;</div><div class='hunk'>@@ -716,14 +862,16 @@ struct wx_thermal_sensor_data {</div><div class='ctx'> enum wx_mac_type {</div><div class='ctx'> 	wx_mac_unknown = 0,</div><div class='ctx'> 	wx_mac_sp,</div><div class='del'>-	wx_mac_em</div><div class='add'>+	wx_mac_em,</div><div class='add'>+	wx_mac_aml,</div><div class='add'>+	wx_mac_aml40,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum sp_media_type {</div><div class='del'>-	sp_media_unknown = 0,</div><div class='del'>-	sp_media_fiber,</div><div class='del'>-	sp_media_copper,</div><div class='del'>-	sp_media_backplane</div><div class='add'>+enum wx_media_type {</div><div class='add'>+	wx_media_unknown = 0,</div><div class='add'>+	wx_media_fiber,</div><div class='add'>+	wx_media_copper,</div><div class='add'>+	wx_media_backplane</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum em_mac_type {</div><div class='hunk'>@@ -787,7 +935,6 @@ enum wx_reset_type {</div><div class='ctx'> struct wx_cb {</div><div class='ctx'> 	dma_addr_t dma;</div><div class='ctx'> 	u16     append_cnt;      /* number of skb's appended */</div><div class='del'>-	bool    page_released;</div><div class='ctx'> 	bool    dma_released;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -863,6 +1010,7 @@ struct wx_tx_context_desc {</div><div class='ctx'>  */</div><div class='ctx'> struct wx_tx_buffer {</div><div class='ctx'> 	union wx_tx_desc *next_to_watch;</div><div class='add'>+	unsigned long time_stamp;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	unsigned int bytecount;</div><div class='ctx'> 	unsigned short gso_segs;</div><div class='hunk'>@@ -870,12 +1018,12 @@ struct wx_tx_buffer {</div><div class='ctx'> 	DEFINE_DMA_UNMAP_LEN(len);</div><div class='ctx'> 	__be16 protocol;</div><div class='ctx'> 	u32 tx_flags;</div><div class='add'>+	u32 next_eop;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct wx_rx_buffer {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	dma_addr_t dma;</div><div class='del'>-	dma_addr_t page_dma;</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> 	unsigned int page_offset;</div><div class='ctx'> };</div><div class='hunk'>@@ -895,6 +1043,8 @@ struct wx_rx_queue_stats {</div><div class='ctx'> 	u64 csum_good_cnt;</div><div class='ctx'> 	u64 csum_err;</div><div class='ctx'> 	u64 alloc_rx_buff_failed;</div><div class='add'>+	u64 rsc_count;</div><div class='add'>+	u64 rsc_flush;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* iterator for handling rings in ring container */</div><div class='hunk'>@@ -907,6 +1057,7 @@ struct wx_ring_container {</div><div class='ctx'> 	unsigned int total_packets;     /* total packets processed this int */</div><div class='ctx'> 	u8 count;                       /* total number of rings in vector */</div><div class='ctx'> 	u8 itr;                         /* current ITR setting for ring */</div><div class='add'>+	struct dim dim;                 /* data for net_dim algorithm */</div><div class='ctx'> };</div><div class='ctx'> struct wx_ring {</div><div class='ctx'> 	struct wx_ring *next;           /* pointer to next ring in q_vector */</div><div class='hunk'>@@ -921,9 +1072,12 @@ struct wx_ring {</div><div class='ctx'> 	};</div><div class='ctx'> 	u8 __iomem *tail;</div><div class='ctx'> 	dma_addr_t dma;                 /* phys. address of descriptor ring */</div><div class='add'>+	dma_addr_t headwb_dma;</div><div class='add'>+	u32 *headwb_mem;</div><div class='ctx'> 	unsigned int size;              /* length in bytes */</div><div class='ctx'> </div><div class='ctx'> 	u16 count;                      /* amount of descriptors */</div><div class='add'>+	unsigned long last_rx_timestamp;</div><div class='ctx'> </div><div class='ctx'> 	u8 queue_index; /* needed for multiqueue queue management */</div><div class='ctx'> 	u8 reg_idx;                     /* holds the special value that gets</div><div class='hunk'>@@ -933,6 +1087,7 @@ struct wx_ring {</div><div class='ctx'> 					 */</div><div class='ctx'> 	u16 next_to_use;</div><div class='ctx'> 	u16 next_to_clean;</div><div class='add'>+	u16 rx_buf_len;</div><div class='ctx'> 	union {</div><div class='ctx'> 		u16 next_to_alloc;</div><div class='ctx'> 		struct {</div><div class='hunk'>@@ -962,6 +1117,8 @@ struct wx_q_vector {</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	struct rcu_head rcu;    /* to avoid race with update stats on free */</div><div class='ctx'> </div><div class='add'>+	u16 total_events;       /* number of interrupts processed */</div><div class='add'>+</div><div class='ctx'> 	char name[IFNAMSIZ + 17];</div><div class='ctx'> </div><div class='ctx'> 	/* for dynamic allocation of rings associated with this q_vector */</div><div class='hunk'>@@ -977,6 +1134,7 @@ struct wx_ring_feature {</div><div class='ctx'> </div><div class='ctx'> enum wx_ring_f_enum {</div><div class='ctx'> 	RING_F_NONE = 0,</div><div class='add'>+	RING_F_VMDQ,</div><div class='ctx'> 	RING_F_RSS,</div><div class='ctx'> 	RING_F_FDIR,</div><div class='ctx'> 	RING_F_ARRAY_SIZE  /* must be last in enum set */</div><div class='hunk'>@@ -1026,13 +1184,76 @@ struct wx_hw_stats {</div><div class='ctx'> </div><div class='ctx'> enum wx_state {</div><div class='ctx'> 	WX_STATE_RESETTING,</div><div class='del'>-	WX_STATE_NBITS,		/* must be last */</div><div class='add'>+	WX_STATE_SWFW_BUSY,</div><div class='add'>+	WX_STATE_PTP_RUNNING,</div><div class='add'>+	WX_STATE_PTP_TX_IN_PROGRESS,</div><div class='add'>+	WX_STATE_SERVICE_SCHED,</div><div class='add'>+	WX_STATE_NBITS		/* must be last */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vf_data_storage {</div><div class='add'>+	struct pci_dev *vfdev;</div><div class='add'>+	unsigned char vf_mac_addr[ETH_ALEN];</div><div class='add'>+	bool spoofchk_enabled;</div><div class='add'>+	bool link_enable;</div><div class='add'>+	bool trusted;</div><div class='add'>+	int xcast_mode;</div><div class='add'>+	unsigned int vf_api;</div><div class='add'>+	bool clear_to_send;</div><div class='add'>+	u16 pf_vlan; /* When set, guest VLAN config not allowed. */</div><div class='add'>+	u16 pf_qos;</div><div class='add'>+	bool pf_set_mac;</div><div class='add'>+</div><div class='add'>+	u16 vf_mc_hashes[WX_MAX_VF_MC_ENTRIES];</div><div class='add'>+	u16 num_vf_mc_hashes;</div><div class='add'>+	u16 vlan_count;</div><div class='add'>+	int link_state;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vf_macvlans {</div><div class='add'>+	struct list_head mvlist;</div><div class='add'>+	int vf;</div><div class='add'>+	bool free;</div><div class='add'>+	bool is_macvlan;</div><div class='add'>+	u8 vf_macvlan[ETH_ALEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define WX_RSS_FIELD_IPV4_TCP      BIT(0)</div><div class='add'>+#define WX_RSS_FIELD_IPV4          BIT(1)</div><div class='add'>+#define WX_RSS_FIELD_IPV4_SCTP     BIT(2)</div><div class='add'>+#define WX_RSS_FIELD_IPV6_SCTP     BIT(3)</div><div class='add'>+#define WX_RSS_FIELD_IPV6_TCP      BIT(4)</div><div class='add'>+#define WX_RSS_FIELD_IPV6          BIT(5)</div><div class='add'>+#define WX_RSS_FIELD_IPV4_UDP      BIT(6)</div><div class='add'>+#define WX_RSS_FIELD_IPV6_UDP      BIT(7)</div><div class='add'>+</div><div class='add'>+struct wx_rss_flow_map {</div><div class='add'>+	u8 flow_type;</div><div class='add'>+	u32 data;</div><div class='add'>+	u8 flag;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum wx_pf_flags {</div><div class='add'>+	WX_FLAG_MULTI_64_FUNC,</div><div class='add'>+	WX_FLAG_SWFW_RING,</div><div class='add'>+	WX_FLAG_VMDQ_ENABLED,</div><div class='add'>+	WX_FLAG_VLAN_PROMISC,</div><div class='add'>+	WX_FLAG_SRIOV_ENABLED,</div><div class='add'>+	WX_FLAG_IRQ_VECTOR_SHARED,</div><div class='ctx'> 	WX_FLAG_FDIR_CAPABLE,</div><div class='ctx'> 	WX_FLAG_FDIR_HASH,</div><div class='ctx'> 	WX_FLAG_FDIR_PERFECT,</div><div class='add'>+	WX_FLAG_RSC_CAPABLE,</div><div class='add'>+	WX_FLAG_RSC_ENABLED,</div><div class='add'>+	WX_FLAG_RX_HWTSTAMP_ENABLED,</div><div class='add'>+	WX_FLAG_RX_HWTSTAMP_IN_REGISTER,</div><div class='add'>+	WX_FLAG_PTP_PPS_ENABLED,</div><div class='add'>+	WX_FLAG_NEED_LINK_CONFIG,</div><div class='add'>+	WX_FLAG_NEED_MODULE_RESET,</div><div class='add'>+	WX_FLAG_NEED_UPDATE_LINK,</div><div class='add'>+	WX_FLAG_NEED_DO_RESET,</div><div class='add'>+	WX_FLAG_RX_MERGE_ENABLED,</div><div class='add'>+	WX_FLAG_TXHEAD_WB_ENABLED,</div><div class='ctx'> 	WX_PF_FLAGS_NBITS               /* must be last */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1043,12 +1264,14 @@ struct wx {</div><div class='ctx'> </div><div class='ctx'> 	void *priv;</div><div class='ctx'> 	u8 __iomem *hw_addr;</div><div class='add'>+	u8 __iomem *b4_addr; /* vf only */</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct wx_bus_info bus;</div><div class='add'>+	struct wx_mbx_info mbx;</div><div class='ctx'> 	struct wx_mac_info mac;</div><div class='ctx'> 	enum em_mac_type mac_type;</div><div class='del'>-	enum sp_media_type media_type;</div><div class='add'>+	enum wx_media_type media_type;</div><div class='ctx'> 	struct wx_eeprom_info eeprom;</div><div class='ctx'> 	struct wx_addr_filter_info addr_ctrl;</div><div class='ctx'> 	struct wx_fc_info fc;</div><div class='hunk'>@@ -1066,8 +1289,10 @@ struct wx {</div><div class='ctx'> 	char eeprom_id[32];</div><div class='ctx'> 	char *driver_name;</div><div class='ctx'> 	enum wx_reset_type reset_type;</div><div class='add'>+	u8 swfw_index;</div><div class='ctx'> </div><div class='ctx'> 	/* PHY stuff */</div><div class='add'>+	bool notify_down;</div><div class='ctx'> 	unsigned int link;</div><div class='ctx'> 	int speed;</div><div class='ctx'> 	int duplex;</div><div class='hunk'>@@ -1089,6 +1314,7 @@ struct wx {</div><div class='ctx'> 	int num_rx_queues;</div><div class='ctx'> 	u16 rx_itr_setting;</div><div class='ctx'> 	u16 rx_work_limit;</div><div class='add'>+	bool adaptive_itr;</div><div class='ctx'> </div><div class='ctx'> 	int num_q_vectors;      /* current number of q_vectors for device */</div><div class='ctx'> 	int max_q_vectors;      /* upper limit of q_vectors for device */</div><div class='hunk'>@@ -1099,6 +1325,8 @@ struct wx {</div><div class='ctx'> 	struct wx_ring *tx_ring[64] ____cacheline_aligned_in_smp;</div><div class='ctx'> 	struct wx_ring *rx_ring[64];</div><div class='ctx'> 	struct wx_q_vector *q_vector[64];</div><div class='add'>+	int num_rx_pools;</div><div class='add'>+	int num_rx_queues_per_pool;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int queues_per_pool;</div><div class='ctx'> 	struct msix_entry *msix_q_entries;</div><div class='hunk'>@@ -1110,16 +1338,20 @@ struct wx {</div><div class='ctx'> 	u32 *isb_mem;</div><div class='ctx'> 	u32 isb_tag[WX_ISB_MAX];</div><div class='ctx'> 	bool misc_irq_domain;</div><div class='add'>+	u32 eims_other;</div><div class='add'>+	u32 eims_enable_mask;</div><div class='ctx'> </div><div class='ctx'> #define WX_MAX_RETA_ENTRIES 128</div><div class='ctx'> #define WX_RSS_INDIR_TBL_MAX 64</div><div class='ctx'> 	u8 rss_indir_tbl[WX_MAX_RETA_ENTRIES];</div><div class='add'>+	u8 rss_flags;</div><div class='ctx'> 	bool rss_enabled;</div><div class='ctx'> #define WX_RSS_KEY_SIZE     40  /* size of RSS Hash Key in bytes */</div><div class='ctx'> 	u32 *rss_key;</div><div class='ctx'> 	u32 wol;</div><div class='ctx'> </div><div class='ctx'> 	u16 bd_number;</div><div class='add'>+	bool default_up;</div><div class='ctx'> </div><div class='ctx'> 	struct wx_hw_stats stats;</div><div class='ctx'> 	u64 tx_busy;</div><div class='hunk'>@@ -1128,15 +1360,50 @@ struct wx {</div><div class='ctx'> 	u64 hw_csum_rx_good;</div><div class='ctx'> 	u64 hw_csum_rx_error;</div><div class='ctx'> 	u64 alloc_rx_buff_failed;</div><div class='add'>+	u64 rsc_count;</div><div class='add'>+	u64 rsc_flush;</div><div class='add'>+	unsigned int num_vfs;</div><div class='add'>+	struct vf_data_storage *vfinfo;</div><div class='add'>+	struct vf_macvlans vf_mvs;</div><div class='add'>+	struct vf_macvlans *mv_list;</div><div class='add'>+	unsigned long fwd_bitmask;</div><div class='ctx'> </div><div class='ctx'> 	u32 atr_sample_rate;</div><div class='ctx'> 	void (*atr)(struct wx_ring *ring, struct wx_tx_buffer *first, u8 ptype);</div><div class='ctx'> 	void (*configure_fdir)(struct wx *wx);</div><div class='add'>+	int (*setup_tc)(struct net_device *netdev, u8 tc);</div><div class='ctx'> 	void (*do_reset)(struct net_device *netdev);</div><div class='add'>+	int (*ptp_setup_sdp)(struct wx *wx);</div><div class='add'>+	void (*set_num_queues)(struct wx *wx);</div><div class='add'>+</div><div class='add'>+	bool pps_enabled;</div><div class='add'>+	u64 pps_width;</div><div class='add'>+	u64 pps_edge_start;</div><div class='add'>+	u64 pps_edge_end;</div><div class='add'>+	u64 sec_to_cc;</div><div class='add'>+	u32 base_incval;</div><div class='add'>+	u32 tx_hwtstamp_pkts;</div><div class='add'>+	u32 tx_hwtstamp_timeouts;</div><div class='add'>+	u32 tx_hwtstamp_skipped;</div><div class='add'>+	u32 tx_hwtstamp_errors;</div><div class='add'>+	u32 rx_hwtstamp_cleared;</div><div class='add'>+	unsigned long last_overflow_check;</div><div class='add'>+	unsigned long last_rx_ptp_check;</div><div class='add'>+	unsigned long ptp_tx_start;</div><div class='add'>+	seqlock_t hw_tc_lock; /* seqlock for ptp */</div><div class='add'>+	struct cyclecounter hw_cc;</div><div class='add'>+	struct timecounter hw_tc;</div><div class='add'>+	struct ptp_clock *ptp_clock;</div><div class='add'>+	struct ptp_clock_info ptp_caps;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='add'>+	struct sk_buff *ptp_tx_skb;</div><div class='add'>+</div><div class='add'>+	struct timer_list service_timer;</div><div class='add'>+	struct work_struct service_task;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define WX_INTR_ALL (~0ULL)</div><div class='del'>-#define WX_INTR_Q(i) BIT((i) + 1)</div><div class='add'>+#define WX_INTR_Q(i) BIT((i))</div><div class='ctx'> </div><div class='ctx'> /* register operations */</div><div class='ctx'> #define wr32(a, reg, value)	writel((value), ((a)-&gt;hw_addr + (reg)))</div><div class='hunk'>@@ -1177,6 +1444,24 @@ rd64(struct wx *wx, u32 reg)</div><div class='ctx'> 	return (lsb | msb &lt;&lt; 32);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline u32</div><div class='add'>+rd32ptp(struct wx *wx, u32 reg)</div><div class='add'>+{</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_em)</div><div class='add'>+		return rd32(wx, reg);</div><div class='add'>+</div><div class='add'>+	return rd32(wx, reg + 0xB500);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+wr32ptp(struct wx *wx, u32 reg, u32 value)</div><div class='add'>+{</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_em)</div><div class='add'>+		return wr32(wx, reg, value);</div><div class='add'>+</div><div class='add'>+	return wr32(wx, reg + 0xB500, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* On some domestic CPU platforms, sometimes IO is not synchronized with</div><div class='ctx'>  * flushing memory, here use readl() to flush PCI read and write.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1208,4 +1493,15 @@ static inline int wx_set_state_reset(struct wx *wx)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline unsigned int wx_rx_pg_order(struct wx_ring *ring)</div><div class='add'>+{</div><div class='add'>+#if (PAGE_SIZE &lt; 8192)</div><div class='add'>+	if (ring-&gt;rx_buf_len == WX_RXBUFFER_3K)</div><div class='add'>+		return 1;</div><div class='add'>+#endif</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define wx_rx_pg_size(_ring) (PAGE_SIZE &lt;&lt; wx_rx_pg_order(_ring))</div><div class='add'>+</div><div class='ctx'> #endif /* _WX_TYPE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_vf.c b/drivers/net/ethernet/wangxun/libwx/wx_vf.c<br/>new file mode 100644<br/>index 000000000000..7567216a005f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_vf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_vf.c</a></div><div class='hunk'>@@ -0,0 +1,599 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "wx_type.h"</div><div class='add'>+#include "wx_hw.h"</div><div class='add'>+#include "wx_mbx.h"</div><div class='add'>+#include "wx_vf.h"</div><div class='add'>+</div><div class='add'>+static void wx_virt_clr_reg(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 vfsrrctl, i;</div><div class='add'>+</div><div class='add'>+	/* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */</div><div class='add'>+	vfsrrctl = WX_VXRXDCTL_HDRSZ(wx_hdr_sz(WX_RX_HDR_SIZE));</div><div class='add'>+	vfsrrctl |= WX_VXRXDCTL_BUFSZ(wx_buf_sz(WX_RX_BUF_SIZE));</div><div class='add'>+</div><div class='add'>+	/* clear all rxd ctl */</div><div class='add'>+	for (i = 0; i &lt; WX_VF_MAX_RING_NUMS; i++)</div><div class='add'>+		wr32m(wx, WX_VXRXDCTL(i),</div><div class='add'>+		      WX_VXRXDCTL_HDRSZ_MASK | WX_VXRXDCTL_BUFSZ_MASK,</div><div class='add'>+		      vfsrrctl);</div><div class='add'>+</div><div class='add'>+	rd32(wx, WX_VXSTATUS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_init_hw_vf - virtual function hardware initialization</div><div class='add'>+ *  @wx: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ *  Initialize the mac address</div><div class='add'>+ **/</div><div class='add'>+void wx_init_hw_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	wx_get_mac_addr_vf(wx, wx-&gt;mac.addr);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_init_hw_vf);</div><div class='add'>+</div><div class='add'>+static int wx_mbx_write_and_read_reply(struct wx *wx, u32 *req_buf,</div><div class='add'>+				       u32 *resp_buf, u16 size)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = wx_write_posted_mbx(wx, req_buf, size);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return wx_read_posted_mbx(wx, resp_buf, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_reset_hw_vf - Performs hardware reset</div><div class='add'>+ *  @wx: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ *  Resets the hardware by resetting the transmit and receive units, masks and</div><div class='add'>+ *  clears all interrupts.</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 on success, negative error code on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_reset_hw_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct wx_mbx_info *mbx = &amp;wx-&gt;mbx;</div><div class='add'>+	u32 msgbuf[4] = {WX_VF_RESET};</div><div class='add'>+	u8 *addr = (u8 *)(&amp;msgbuf[1]);</div><div class='add'>+	u32 b4_buf[16] = {0};</div><div class='add'>+	u32 timeout = 200;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	/* Call wx stop to disable tx/rx and clear interrupts */</div><div class='add'>+	wx_stop_adapter_vf(wx);</div><div class='add'>+</div><div class='add'>+	/* reset the api version */</div><div class='add'>+	wx-&gt;vfinfo-&gt;vf_api = wx_mbox_api_null;</div><div class='add'>+</div><div class='add'>+	/* backup msix vectors */</div><div class='add'>+	if (wx-&gt;b4_addr) {</div><div class='add'>+		for (i = 0; i &lt; 16; i++)</div><div class='add'>+			b4_buf[i] = readl(wx-&gt;b4_addr + i * 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wr32m(wx, WX_VXCTRL, WX_VXCTRL_RST, WX_VXCTRL_RST);</div><div class='add'>+	rd32(wx, WX_VXSTATUS);</div><div class='add'>+</div><div class='add'>+	/* we cannot reset while the RSTI / RSTD bits are asserted */</div><div class='add'>+	while (!wx_check_for_rst_vf(wx) &amp;&amp; timeout) {</div><div class='add'>+		timeout--;</div><div class='add'>+		udelay(5);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* restore msix vectors */</div><div class='add'>+	if (wx-&gt;b4_addr) {</div><div class='add'>+		for (i = 0; i &lt; 16; i++)</div><div class='add'>+			writel(b4_buf[i], wx-&gt;b4_addr + i * 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* amlite: bme */</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_aml || wx-&gt;mac.type == wx_mac_aml40)</div><div class='add'>+		wr32(wx, WX_VX_PF_BME, WX_VF_BME_ENABLE);</div><div class='add'>+</div><div class='add'>+	if (!timeout)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	/* Reset VF registers to initial values */</div><div class='add'>+	wx_virt_clr_reg(wx);</div><div class='add'>+</div><div class='add'>+	/* mailbox timeout can now become active */</div><div class='add'>+	mbx-&gt;timeout = 2000;</div><div class='add'>+</div><div class='add'>+	ret = wx_mbx_write_and_read_reply(wx, msgbuf, msgbuf,</div><div class='add'>+					  ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (msgbuf[0] != (WX_VF_RESET | WX_VT_MSGTYPE_ACK) &amp;&amp;</div><div class='add'>+	    msgbuf[0] != (WX_VF_RESET | WX_VT_MSGTYPE_NACK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (msgbuf[0] == (WX_VF_RESET | WX_VT_MSGTYPE_ACK))</div><div class='add'>+		ether_addr_copy(wx-&gt;mac.perm_addr, addr);</div><div class='add'>+</div><div class='add'>+	wx-&gt;mac.mc_filter_type = msgbuf[3];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_reset_hw_vf);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_stop_adapter_vf - Generic stop Tx/Rx units</div><div class='add'>+ *  @wx: pointer to hardware structure</div><div class='add'>+ *</div><div class='add'>+ *  Clears interrupts, disables transmit and receive units.</div><div class='add'>+ **/</div><div class='add'>+void wx_stop_adapter_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 reg_val;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	/* Clear interrupt mask to stop from interrupts being generated */</div><div class='add'>+	wr32(wx, WX_VXIMS, WX_VF_IRQ_CLEAR_MASK);</div><div class='add'>+</div><div class='add'>+	/* Clear any pending interrupts, flush previous writes */</div><div class='add'>+	wr32(wx, WX_VXICR, U32_MAX);</div><div class='add'>+</div><div class='add'>+	/* Disable the transmit unit.  Each queue must be disabled. */</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;mac.max_tx_queues; i++)</div><div class='add'>+		wr32(wx, WX_VXTXDCTL(i), WX_VXTXDCTL_FLUSH);</div><div class='add'>+</div><div class='add'>+	/* Disable the receive unit by stopping each queue */</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;mac.max_rx_queues; i++) {</div><div class='add'>+		reg_val = rd32(wx, WX_VXRXDCTL(i));</div><div class='add'>+		reg_val &amp;= ~WX_VXRXDCTL_ENABLE;</div><div class='add'>+		wr32(wx, WX_VXRXDCTL(i), reg_val);</div><div class='add'>+	}</div><div class='add'>+	/* Clear packet split and pool config */</div><div class='add'>+	wr32(wx, WX_VXMRQC, 0);</div><div class='add'>+</div><div class='add'>+	/* flush all queues disables */</div><div class='add'>+	rd32(wx, WX_VXSTATUS);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_stop_adapter_vf);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_set_rar_vf - set device MAC address</div><div class='add'>+ *  @wx: pointer to hardware structure</div><div class='add'>+ *  @index: Receive address register to write</div><div class='add'>+ *  @addr: Address to put into receive address register</div><div class='add'>+ *  @enable_addr: set flag that address is active</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 on success, negative error code on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_set_rar_vf(struct wx *wx, u32 index, u8 *addr, u32 enable_addr)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[3] = {WX_VF_SET_MAC_ADDR};</div><div class='add'>+	u8 *msg_addr = (u8 *)(&amp;msgbuf[1]);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memcpy(msg_addr, addr, ETH_ALEN);</div><div class='add'>+</div><div class='add'>+	ret = wx_mbx_write_and_read_reply(wx, msgbuf, msgbuf,</div><div class='add'>+					  ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	msgbuf[0] &amp;= ~WX_VT_MSGTYPE_CTS;</div><div class='add'>+</div><div class='add'>+	/* if nacked the address was rejected, use "perm_addr" */</div><div class='add'>+	if (msgbuf[0] == (WX_VF_SET_MAC_ADDR | WX_VT_MSGTYPE_NACK)) {</div><div class='add'>+		wx_get_mac_addr_vf(wx, wx-&gt;mac.addr);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_set_rar_vf);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_update_mc_addr_list_vf - Update Multicast addresses</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @netdev: pointer to the net device structure</div><div class='add'>+ *</div><div class='add'>+ *  Updates the Multicast Table Array.</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 on success, negative error code on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_update_mc_addr_list_vf(struct wx *wx, struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[WX_VXMAILBOX_SIZE] = {WX_VF_SET_MULTICAST};</div><div class='add'>+	u16 *vector_l = (u16 *)&amp;msgbuf[1];</div><div class='add'>+	struct netdev_hw_addr *ha;</div><div class='add'>+	u32 cnt, i;</div><div class='add'>+</div><div class='add'>+	cnt = netdev_mc_count(netdev);</div><div class='add'>+	if (cnt &gt; 28)</div><div class='add'>+		cnt = 28;</div><div class='add'>+	msgbuf[0] |= cnt &lt;&lt; WX_VT_MSGINFO_SHIFT;</div><div class='add'>+</div><div class='add'>+	i = 0;</div><div class='add'>+	netdev_for_each_mc_addr(ha, netdev) {</div><div class='add'>+		if (i == cnt)</div><div class='add'>+			break;</div><div class='add'>+		if (is_link_local_ether_addr(ha-&gt;addr))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		vector_l[i++] = wx_mta_vector(wx, ha-&gt;addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return wx_write_posted_mbx(wx, msgbuf, ARRAY_SIZE(msgbuf));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_update_mc_addr_list_vf);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_update_xcast_mode_vf - Update Multicast mode</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @xcast_mode: new multicast mode</div><div class='add'>+ *</div><div class='add'>+ *  Updates the Multicast Mode of VF.</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 on success, negative error code on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_update_xcast_mode_vf(struct wx *wx, int xcast_mode)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[2] = {WX_VF_UPDATE_XCAST_MODE, xcast_mode};</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;vfinfo-&gt;vf_api &lt; wx_mbox_api_13)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = wx_mbx_write_and_read_reply(wx, msgbuf, msgbuf,</div><div class='add'>+					  ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	msgbuf[0] &amp;= ~WX_VT_MSGTYPE_CTS;</div><div class='add'>+	if (msgbuf[0] == (WX_VF_UPDATE_XCAST_MODE | WX_VT_MSGTYPE_NACK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_update_xcast_mode_vf);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_get_link_state_vf - Get VF link state from PF</div><div class='add'>+ * @wx: pointer to the HW structure</div><div class='add'>+ * @link_state: link state storage</div><div class='add'>+ *</div><div class='add'>+ * Return: return state of the operation error or success.</div><div class='add'>+ **/</div><div class='add'>+int wx_get_link_state_vf(struct wx *wx, u16 *link_state)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[2] = {WX_VF_GET_LINK_STATE};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = wx_mbx_write_and_read_reply(wx, msgbuf, msgbuf,</div><div class='add'>+					  ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (msgbuf[0] &amp; WX_VT_MSGTYPE_NACK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*link_state = msgbuf[1];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_get_link_state_vf);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_set_vfta_vf - Set/Unset vlan filter table address</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @vlan: 12 bit VLAN ID</div><div class='add'>+ *  @vind: unused by VF drivers</div><div class='add'>+ *  @vlan_on: if true then set bit, else clear bit</div><div class='add'>+ *  @vlvf_bypass: boolean flag indicating updating default pool is okay</div><div class='add'>+ *</div><div class='add'>+ *  Turn on/off specified VLAN in the VLAN filter table.</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 on success, negative error code on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_set_vfta_vf(struct wx *wx, u32 vlan, u32 vind, bool vlan_on,</div><div class='add'>+		   bool vlvf_bypass)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[2] = {WX_VF_SET_VLAN, vlan};</div><div class='add'>+	bool vlan_offload = false;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Setting the 8 bit field MSG INFO to TRUE indicates "add" */</div><div class='add'>+	msgbuf[0] |= vlan_on &lt;&lt; WX_VT_MSGINFO_SHIFT;</div><div class='add'>+	/* if vf vlan offload is disabled, allow to create vlan under pf port vlan */</div><div class='add'>+	msgbuf[0] |= BIT(vlan_offload);</div><div class='add'>+</div><div class='add'>+	ret = wx_mbx_write_and_read_reply(wx, msgbuf, msgbuf,</div><div class='add'>+					  ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (msgbuf[0] &amp; WX_VT_MSGTYPE_ACK)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return msgbuf[0] &amp; WX_VT_MSGTYPE_NACK;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_set_vfta_vf);</div><div class='add'>+</div><div class='add'>+void wx_get_mac_addr_vf(struct wx *wx, u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	ether_addr_copy(mac_addr, wx-&gt;mac.perm_addr);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_get_mac_addr_vf);</div><div class='add'>+</div><div class='add'>+int wx_get_fw_version_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[2] = {WX_VF_GET_FW_VERSION};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = wx_mbx_write_and_read_reply(wx, msgbuf, msgbuf,</div><div class='add'>+					  ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (msgbuf[0] &amp; WX_VT_MSGTYPE_NACK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	snprintf(wx-&gt;eeprom_id, 32, "0x%08x", msgbuf[1]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_get_fw_version_vf);</div><div class='add'>+</div><div class='add'>+int wx_set_uc_addr_vf(struct wx *wx, u32 index, u8 *addr)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[3] = {WX_VF_SET_MACVLAN};</div><div class='add'>+	u8 *msg_addr = (u8 *)(&amp;msgbuf[1]);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* If index is one then this is the start of a new list and needs</div><div class='add'>+	 * indication to the PF so it can do it's own list management.</div><div class='add'>+	 * If it is zero then that tells the PF to just clear all of</div><div class='add'>+	 * this VF's macvlans and there is no new list.</div><div class='add'>+	 */</div><div class='add'>+	msgbuf[0] |= index &lt;&lt; WX_VT_MSGINFO_SHIFT;</div><div class='add'>+	if (addr)</div><div class='add'>+		memcpy(msg_addr, addr, 6);</div><div class='add'>+	ret = wx_mbx_write_and_read_reply(wx, msgbuf, msgbuf,</div><div class='add'>+					  ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	msgbuf[0] &amp;= ~WX_VT_MSGTYPE_CTS;</div><div class='add'>+</div><div class='add'>+	if (msgbuf[0] == (WX_VF_SET_MACVLAN | WX_VT_MSGTYPE_NACK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_set_uc_addr_vf);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_rlpml_set_vf - Set the maximum receive packet length</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @max_size: value to assign to max frame size</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 on success, negative error code on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_rlpml_set_vf(struct wx *wx, u16 max_size)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[2] = {WX_VF_SET_LPE, max_size};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = wx_mbx_write_and_read_reply(wx, msgbuf, msgbuf,</div><div class='add'>+					  ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	if ((msgbuf[0] &amp; WX_VF_SET_LPE) &amp;&amp;</div><div class='add'>+	    (msgbuf[0] &amp; WX_VT_MSGTYPE_NACK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_rlpml_set_vf);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *  wx_negotiate_api_version - Negotiate supported API version</div><div class='add'>+ *  @wx: pointer to the HW structure</div><div class='add'>+ *  @api: integer containing requested API version</div><div class='add'>+ *</div><div class='add'>+ *  Return: returns 0 on success, negative error code on failure</div><div class='add'>+ **/</div><div class='add'>+int wx_negotiate_api_version(struct wx *wx, int api)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[2] = {WX_VF_API_NEGOTIATE, api};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = wx_mbx_write_and_read_reply(wx, msgbuf, msgbuf,</div><div class='add'>+					  ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	msgbuf[0] &amp;= ~WX_VT_MSGTYPE_CTS;</div><div class='add'>+</div><div class='add'>+	/* Store value and return 0 on success */</div><div class='add'>+	if (msgbuf[0] == (WX_VF_API_NEGOTIATE | WX_VT_MSGTYPE_NACK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	wx-&gt;vfinfo-&gt;vf_api = api;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_negotiate_api_version);</div><div class='add'>+</div><div class='add'>+int wx_get_queues_vf(struct wx *wx, u32 *num_tcs, u32 *default_tc)</div><div class='add'>+{</div><div class='add'>+	u32 msgbuf[5] = {WX_VF_GET_QUEUES};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* do nothing if API doesn't support wx_get_queues */</div><div class='add'>+	if (wx-&gt;vfinfo-&gt;vf_api &lt; wx_mbox_api_13)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Fetch queue configuration from the PF */</div><div class='add'>+	ret = wx_mbx_write_and_read_reply(wx, msgbuf, msgbuf,</div><div class='add'>+					  ARRAY_SIZE(msgbuf));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	msgbuf[0] &amp;= ~WX_VT_MSGTYPE_CTS;</div><div class='add'>+</div><div class='add'>+	/* if we didn't get an ACK there must have been</div><div class='add'>+	 * some sort of mailbox error so we should treat it</div><div class='add'>+	 * as such</div><div class='add'>+	 */</div><div class='add'>+	if (msgbuf[0] != (WX_VF_GET_QUEUES | WX_VT_MSGTYPE_ACK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	/* record and validate values from message */</div><div class='add'>+	wx-&gt;mac.max_tx_queues = msgbuf[WX_VF_TX_QUEUES];</div><div class='add'>+	if (wx-&gt;mac.max_tx_queues == 0 ||</div><div class='add'>+	    wx-&gt;mac.max_tx_queues &gt; WX_VF_MAX_TX_QUEUES)</div><div class='add'>+		wx-&gt;mac.max_tx_queues = WX_VF_MAX_TX_QUEUES;</div><div class='add'>+</div><div class='add'>+	wx-&gt;mac.max_rx_queues = msgbuf[WX_VF_RX_QUEUES];</div><div class='add'>+	if (wx-&gt;mac.max_rx_queues == 0 ||</div><div class='add'>+	    wx-&gt;mac.max_rx_queues &gt; WX_VF_MAX_RX_QUEUES)</div><div class='add'>+		wx-&gt;mac.max_rx_queues = WX_VF_MAX_RX_QUEUES;</div><div class='add'>+</div><div class='add'>+	*num_tcs = msgbuf[WX_VF_TRANS_VLAN];</div><div class='add'>+	/* in case of unknown state assume we cannot tag frames */</div><div class='add'>+	if (*num_tcs &gt; wx-&gt;mac.max_rx_queues)</div><div class='add'>+		*num_tcs = 1;</div><div class='add'>+	*default_tc = msgbuf[WX_VF_DEF_QUEUE];</div><div class='add'>+	/* default to queue 0 on out-of-bounds queue number */</div><div class='add'>+	if (*default_tc &gt;= wx-&gt;mac.max_tx_queues)</div><div class='add'>+		*default_tc = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_get_queues_vf);</div><div class='add'>+</div><div class='add'>+static int wx_get_link_status_from_pf(struct wx *wx, u32 *msgbuf)</div><div class='add'>+{</div><div class='add'>+	u32 links_reg = msgbuf[1];</div><div class='add'>+</div><div class='add'>+	if (msgbuf[1] &amp; WX_PF_NOFITY_VF_NET_NOT_RUNNING)</div><div class='add'>+		wx-&gt;notify_down = true;</div><div class='add'>+	else</div><div class='add'>+		wx-&gt;notify_down = false;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;notify_down) {</div><div class='add'>+		wx-&gt;link = false;</div><div class='add'>+		wx-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx-&gt;link = WX_PFLINK_STATUS(links_reg);</div><div class='add'>+	wx-&gt;speed = WX_PFLINK_SPEED(links_reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wx_pf_ping_vf(struct wx *wx, u32 *msgbuf)</div><div class='add'>+{</div><div class='add'>+	if (!(msgbuf[0] &amp; WX_VT_MSGTYPE_CTS))</div><div class='add'>+		/* msg is not CTS, we need to do reset */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct wx_link_reg_fields wx_speed_lookup_vf[] = {</div><div class='add'>+	{wx_mac_unknown},</div><div class='add'>+	{wx_mac_sp, SPEED_10000, SPEED_1000, SPEED_100, SPEED_UNKNOWN, SPEED_UNKNOWN},</div><div class='add'>+	{wx_mac_em, SPEED_1000,  SPEED_100, SPEED_10, SPEED_UNKNOWN, SPEED_UNKNOWN},</div><div class='add'>+	{wx_mac_aml, SPEED_40000, SPEED_25000, SPEED_10000, SPEED_1000, SPEED_UNKNOWN},</div><div class='add'>+	{wx_mac_aml40, SPEED_40000, SPEED_25000, SPEED_10000, SPEED_1000, SPEED_UNKNOWN},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void wx_check_physical_link(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 val, link_val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* get link status from hw status reg</div><div class='add'>+	 * for SFP+ modules and DA cables, it can take up to 500usecs</div><div class='add'>+	 * before the link status is correct</div><div class='add'>+	 */</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_em)</div><div class='add'>+		ret = read_poll_timeout_atomic(rd32, val, val &amp; GENMASK(4, 1),</div><div class='add'>+					       100, 500, false, wx, WX_VXSTATUS);</div><div class='add'>+	else</div><div class='add'>+		ret = read_poll_timeout_atomic(rd32, val, val &amp; BIT(0), 100,</div><div class='add'>+					       500, false, wx, WX_VXSTATUS);</div><div class='add'>+	if (ret) {</div><div class='add'>+		wx-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+		wx-&gt;link = false;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx-&gt;link = true;</div><div class='add'>+	link_val = WX_VXSTATUS_SPEED(val);</div><div class='add'>+</div><div class='add'>+	if (link_val &amp; BIT(0))</div><div class='add'>+		wx-&gt;speed = wx_speed_lookup_vf[wx-&gt;mac.type].bit0_f;</div><div class='add'>+	else if (link_val &amp; BIT(1))</div><div class='add'>+		wx-&gt;speed = wx_speed_lookup_vf[wx-&gt;mac.type].bit1_f;</div><div class='add'>+	else if (link_val &amp; BIT(2))</div><div class='add'>+		wx-&gt;speed = wx_speed_lookup_vf[wx-&gt;mac.type].bit2_f;</div><div class='add'>+	else if (link_val &amp; BIT(3))</div><div class='add'>+		wx-&gt;speed = wx_speed_lookup_vf[wx-&gt;mac.type].bit3_f;</div><div class='add'>+	else</div><div class='add'>+		wx-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wx_check_mac_link_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct wx_mbx_info *mbx = &amp;wx-&gt;mbx;</div><div class='add'>+	u32 msgbuf[2] = {0};</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!mbx-&gt;timeout)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	wx_check_for_rst_vf(wx);</div><div class='add'>+	if (!wx_check_for_msg_vf(wx))</div><div class='add'>+		ret = wx_read_mbx_vf(wx, msgbuf, 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	switch (msgbuf[0] &amp; GENMASK(8, 0)) {</div><div class='add'>+	case WX_PF_NOFITY_VF_LINK_STATUS | WX_PF_CONTROL_MSG:</div><div class='add'>+		ret = wx_get_link_status_from_pf(wx, msgbuf);</div><div class='add'>+		goto out;</div><div class='add'>+	case WX_PF_CONTROL_MSG:</div><div class='add'>+		ret = wx_pf_ping_vf(wx, msgbuf);</div><div class='add'>+		goto out;</div><div class='add'>+	case 0:</div><div class='add'>+		if (msgbuf[0] &amp; WX_VT_MSGTYPE_NACK) {</div><div class='add'>+			/* msg is NACK, we must have lost CTS status */</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		/* no message, check link status */</div><div class='add'>+		wx_check_physical_link(wx);</div><div class='add'>+		goto out;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(msgbuf[0] &amp; WX_VT_MSGTYPE_CTS)) {</div><div class='add'>+		/* msg is not CTS and is NACK we must have lost CTS status */</div><div class='add'>+		if (msgbuf[0] &amp; WX_VT_MSGTYPE_NACK)</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* the pf is talking, if we timed out in the past we reinit */</div><div class='add'>+	if (!mbx-&gt;timeout) {</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_vf.h b/drivers/net/ethernet/wangxun/libwx/wx_vf.h<br/>new file mode 100644<br/>index 000000000000..eb6ca3fe4e97<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_vf.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_vf.h</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#ifndef _WX_VF_H_</div><div class='add'>+#define _WX_VF_H_</div><div class='add'>+</div><div class='add'>+/* Control registers */</div><div class='add'>+#define WX_VF_MAX_RING_NUMS      8</div><div class='add'>+#define WX_VX_PF_BME             0x4B8</div><div class='add'>+#define WX_VF_BME_ENABLE         BIT(0)</div><div class='add'>+#define WX_VXSTATUS              0x4</div><div class='add'>+#define WX_VXCTRL                0x8</div><div class='add'>+#define WX_VXCTRL_RST            BIT(0)</div><div class='add'>+</div><div class='add'>+#define WX_VXMRQC                0x78</div><div class='add'>+#define WX_VXMRQC_PSR_L4HDR      BIT(0)</div><div class='add'>+#define WX_VXMRQC_PSR_L3HDR      BIT(1)</div><div class='add'>+#define WX_VXMRQC_PSR_L2HDR      BIT(2)</div><div class='add'>+#define WX_VXMRQC_PSR_TUNHDR     BIT(3)</div><div class='add'>+#define WX_VXMRQC_PSR_TUNMAC     BIT(4)</div><div class='add'>+#define WX_VXMRQC_PSR_MASK       GENMASK(5, 1)</div><div class='add'>+#define WX_VXMRQC_PSR(f)         FIELD_PREP(GENMASK(5, 1), f)</div><div class='add'>+#define WX_VXMRQC_RSS_HASH(f)    FIELD_PREP(GENMASK(15, 13), f)</div><div class='add'>+#define WX_VXMRQC_RSS_MASK       GENMASK(31, 16)</div><div class='add'>+#define WX_VXMRQC_RSS(f)         FIELD_PREP(GENMASK(31, 16), f)</div><div class='add'>+#define WX_VXMRQC_RSS_ALG_IPV4_TCP   BIT(0)</div><div class='add'>+#define WX_VXMRQC_RSS_ALG_IPV4       BIT(1)</div><div class='add'>+#define WX_VXMRQC_RSS_ALG_IPV6       BIT(4)</div><div class='add'>+#define WX_VXMRQC_RSS_ALG_IPV6_TCP   BIT(5)</div><div class='add'>+#define WX_VXMRQC_RSS_EN             BIT(8)</div><div class='add'>+</div><div class='add'>+#define WX_VXRSSRK(i)            (0x80 + ((i) * 4)) /* i=[0,9] */</div><div class='add'>+#define WX_VXRETA(i)             (0xC0 + ((i) * 4)) /* i=[0,15] */</div><div class='add'>+</div><div class='add'>+/* Interrupt registers */</div><div class='add'>+#define WX_VXICR                 0x100</div><div class='add'>+#define WX_VXIMS                 0x108</div><div class='add'>+#define WX_VXIMC                 0x10C</div><div class='add'>+#define WX_VF_IRQ_CLEAR_MASK     7</div><div class='add'>+#define WX_VF_MAX_TX_QUEUES      4</div><div class='add'>+#define WX_VF_MAX_RX_QUEUES      4</div><div class='add'>+</div><div class='add'>+#define WX_VXITR(i)              (0x200 + (4 * (i))) /* i=[0,1] */</div><div class='add'>+#define WX_VXITR_MASK            GENMASK(8, 0)</div><div class='add'>+#define WX_VXITR_CNT_WDIS        BIT(31)</div><div class='add'>+#define WX_VXIVAR_MISC           0x260</div><div class='add'>+#define WX_VXIVAR(i)             (0x240 + (4 * (i))) /* i=[0,3] */</div><div class='add'>+</div><div class='add'>+#define wx_conf_size(v, mwidth, uwidth) ({ \</div><div class='add'>+	typeof(v) _v = (v); \</div><div class='add'>+	(_v == 2 &lt;&lt; (mwidth) ? 0 : _v &gt;&gt; (uwidth)); \</div><div class='add'>+})</div><div class='add'>+#define wx_buf_len(v)            wx_conf_size(v, 13, 7)</div><div class='add'>+#define wx_hdr_sz(v)             wx_conf_size(v, 10, 6)</div><div class='add'>+#define wx_buf_sz(v)             wx_conf_size(v, 14, 10)</div><div class='add'>+#define wx_pkt_thresh(v)         wx_conf_size(v, 4, 0)</div><div class='add'>+</div><div class='add'>+#define WX_RX_HDR_SIZE           256</div><div class='add'>+#define WX_RX_BUF_SIZE           2048</div><div class='add'>+</div><div class='add'>+#define WX_RXBUFFER_2048         (2048)</div><div class='add'>+#define WX_RXBUFFER_3072         3072</div><div class='add'>+</div><div class='add'>+/* Receive Path */</div><div class='add'>+#define WX_VXRDBAL(r)            (0x1000 + (0x40 * (r)))</div><div class='add'>+#define WX_VXRDBAH(r)            (0x1004 + (0x40 * (r)))</div><div class='add'>+#define WX_VXRDT(r)              (0x1008 + (0x40 * (r)))</div><div class='add'>+#define WX_VXRDH(r)              (0x100C + (0x40 * (r)))</div><div class='add'>+#define WX_VXRXDCTL(r)           (0x1010 + (0x40 * (r)))</div><div class='add'>+#define WX_VXRXDCTL_ENABLE       BIT(0)</div><div class='add'>+#define WX_VXRXDCTL_BUFLEN_MASK  GENMASK(6, 1)</div><div class='add'>+#define WX_VXRXDCTL_BUFLEN(f)    FIELD_PREP(GENMASK(6, 1), f)</div><div class='add'>+#define WX_VXRXDCTL_BUFSZ_MASK   GENMASK(11, 8)</div><div class='add'>+#define WX_VXRXDCTL_BUFSZ(f)     FIELD_PREP(GENMASK(11, 8), f)</div><div class='add'>+#define WX_VXRXDCTL_HDRSZ_MASK   GENMASK(15, 12)</div><div class='add'>+#define WX_VXRXDCTL_HDRSZ(f)     FIELD_PREP(GENMASK(15, 12), f)</div><div class='add'>+#define WX_VXRXDCTL_DESC_MERGE   BIT(19)</div><div class='add'>+#define WX_VXRXDCTL_RSCMAX_MASK  GENMASK(24, 23)</div><div class='add'>+#define WX_VXRXDCTL_RSCMAX(f)    FIELD_PREP(GENMASK(24, 23), f)</div><div class='add'>+#define WX_VXRXDCTL_RSCEN        BIT(29)</div><div class='add'>+#define WX_VXRXDCTL_DROP         BIT(30)</div><div class='add'>+#define WX_VXRXDCTL_VLAN         BIT(31)</div><div class='add'>+</div><div class='add'>+/* Transimit Path */</div><div class='add'>+#define WX_VXTDBAL(r)            (0x3000 + (0x40 * (r)))</div><div class='add'>+#define WX_VXTDBAH(r)            (0x3004 + (0x40 * (r)))</div><div class='add'>+#define WX_VXTDT(r)              (0x3008 + (0x40 * (r)))</div><div class='add'>+#define WX_VXTDH(r)              (0x300C + (0x40 * (r)))</div><div class='add'>+#define WX_VXTXDCTL(r)           (0x3010 + (0x40 * (r)))</div><div class='add'>+#define WX_VXTXDCTL_ENABLE       BIT(0)</div><div class='add'>+#define WX_VXTXDCTL_BUFLEN(f)    FIELD_PREP(GENMASK(6, 1), f)</div><div class='add'>+#define WX_VXTXDCTL_PTHRESH(f)   FIELD_PREP(GENMASK(11, 8), f)</div><div class='add'>+#define WX_VXTXDCTL_WTHRESH(f)   FIELD_PREP(GENMASK(22, 16), f)</div><div class='add'>+#define WX_VXTXDCTL_FLUSH        BIT(26)</div><div class='add'>+#define WX_VXTXDCTL_HEAD_WB      BIT(27)</div><div class='add'>+#define WX_VXTXD_HEAD_ADDRL(r)   (0x3028 + (0x40 * (r)))</div><div class='add'>+#define WX_VXTXD_HEAD_ADDRH(r)   (0x302C + (0x40 * (r)))</div><div class='add'>+</div><div class='add'>+#define WX_PFLINK_STATUS(g)      FIELD_GET(BIT(0), g)</div><div class='add'>+#define WX_PFLINK_SPEED(g)       FIELD_GET(GENMASK(31, 1), g)</div><div class='add'>+#define WX_VXSTATUS_SPEED(g)     FIELD_GET(GENMASK(4, 1), g)</div><div class='add'>+</div><div class='add'>+struct wx_link_reg_fields {</div><div class='add'>+	u32 mac_type;</div><div class='add'>+	u32 bit0_f;</div><div class='add'>+	u32 bit1_f;</div><div class='add'>+	u32 bit2_f;</div><div class='add'>+	u32 bit3_f;</div><div class='add'>+	u32 bit4_f;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void wx_init_hw_vf(struct wx *wx);</div><div class='add'>+int wx_reset_hw_vf(struct wx *wx);</div><div class='add'>+void wx_get_mac_addr_vf(struct wx *wx, u8 *mac_addr);</div><div class='add'>+void wx_stop_adapter_vf(struct wx *wx);</div><div class='add'>+int wx_get_fw_version_vf(struct wx *wx);</div><div class='add'>+int wx_set_rar_vf(struct wx *wx, u32 index, u8 *addr, u32 enable_addr);</div><div class='add'>+int wx_update_mc_addr_list_vf(struct wx *wx, struct net_device *netdev);</div><div class='add'>+int wx_set_uc_addr_vf(struct wx *wx, u32 index, u8 *addr);</div><div class='add'>+int wx_rlpml_set_vf(struct wx *wx, u16 max_size);</div><div class='add'>+int wx_negotiate_api_version(struct wx *wx, int api);</div><div class='add'>+int wx_get_queues_vf(struct wx *wx, u32 *num_tcs, u32 *default_tc);</div><div class='add'>+int wx_update_xcast_mode_vf(struct wx *wx, int xcast_mode);</div><div class='add'>+int wx_get_link_state_vf(struct wx *wx, u16 *link_state);</div><div class='add'>+int wx_set_vfta_vf(struct wx *wx, u32 vlan, u32 vind, bool vlan_on,</div><div class='add'>+		   bool vlvf_bypass);</div><div class='add'>+int wx_check_mac_link_vf(struct wx *wx);</div><div class='add'>+</div><div class='add'>+#endif /* _WX_VF_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_vf_common.c b/drivers/net/ethernet/wangxun/libwx/wx_vf_common.c<br/>new file mode 100644<br/>index 000000000000..ade2bfe563aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_vf_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_vf_common.c</a></div><div class='hunk'>@@ -0,0 +1,414 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "wx_type.h"</div><div class='add'>+#include "wx_mbx.h"</div><div class='add'>+#include "wx_lib.h"</div><div class='add'>+#include "wx_vf.h"</div><div class='add'>+#include "wx_vf_lib.h"</div><div class='add'>+#include "wx_vf_common.h"</div><div class='add'>+</div><div class='add'>+int wxvf_suspend(struct device *dev_d)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev_d);</div><div class='add'>+	struct wx *wx = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	netif_device_detach(wx-&gt;netdev);</div><div class='add'>+	wx_clear_interrupt_scheme(wx);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wxvf_suspend);</div><div class='add'>+</div><div class='add'>+void wxvf_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	wxvf_suspend(&amp;pdev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wxvf_shutdown);</div><div class='add'>+</div><div class='add'>+int wxvf_resume(struct device *dev_d)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev_d);</div><div class='add'>+	struct wx *wx = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+	wx_init_interrupt_scheme(wx);</div><div class='add'>+	netif_device_attach(wx-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wxvf_resume);</div><div class='add'>+</div><div class='add'>+void wxvf_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = pci_get_drvdata(pdev);</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+</div><div class='add'>+	cancel_work_sync(&amp;wx-&gt;service_task);</div><div class='add'>+	netdev = wx-&gt;netdev;</div><div class='add'>+	unregister_netdev(netdev);</div><div class='add'>+	kfree(wx-&gt;vfinfo);</div><div class='add'>+	kfree(wx-&gt;rss_key);</div><div class='add'>+	kfree(wx-&gt;mac_table);</div><div class='add'>+	wx_clear_interrupt_scheme(wx);</div><div class='add'>+	pci_release_selected_regions(pdev,</div><div class='add'>+				     pci_select_bars(pdev, IORESOURCE_MEM));</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wxvf_remove);</div><div class='add'>+</div><div class='add'>+static irqreturn_t wx_msix_misc_vf(int __always_unused irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = data;</div><div class='add'>+</div><div class='add'>+	set_bit(WX_FLAG_NEED_UPDATE_LINK, wx-&gt;flags);</div><div class='add'>+	/* Clear the interrupt */</div><div class='add'>+	if (netif_running(wx-&gt;netdev))</div><div class='add'>+		wr32(wx, WX_VXIMC, wx-&gt;eims_other);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wx_request_msix_irqs_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = wx-&gt;netdev;</div><div class='add'>+	int vector, err;</div><div class='add'>+</div><div class='add'>+	for (vector = 0; vector &lt; wx-&gt;num_q_vectors; vector++) {</div><div class='add'>+		struct wx_q_vector *q_vector = wx-&gt;q_vector[vector];</div><div class='add'>+		struct msix_entry *entry = &amp;wx-&gt;msix_q_entries[vector];</div><div class='add'>+</div><div class='add'>+		if (q_vector-&gt;tx.ring &amp;&amp; q_vector-&gt;rx.ring)</div><div class='add'>+			snprintf(q_vector-&gt;name, sizeof(q_vector-&gt;name) - 1,</div><div class='add'>+				 "%s-TxRx-%d", netdev-&gt;name, entry-&gt;entry);</div><div class='add'>+		else</div><div class='add'>+			/* skip this unused q_vector */</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = request_irq(entry-&gt;vector, wx_msix_clean_rings, 0,</div><div class='add'>+				  q_vector-&gt;name, q_vector);</div><div class='add'>+		if (err) {</div><div class='add'>+			wx_err(wx, "request_irq failed for MSIX interrupt %s Error: %d\n",</div><div class='add'>+			       q_vector-&gt;name, err);</div><div class='add'>+			goto free_queue_irqs;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = request_threaded_irq(wx-&gt;msix_entry-&gt;vector, wx_msix_misc_vf,</div><div class='add'>+				   NULL, IRQF_ONESHOT, netdev-&gt;name, wx);</div><div class='add'>+	if (err) {</div><div class='add'>+		wx_err(wx, "request_irq for msix_other failed: %d\n", err);</div><div class='add'>+		goto free_queue_irqs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_queue_irqs:</div><div class='add'>+	while (vector) {</div><div class='add'>+		vector--;</div><div class='add'>+		free_irq(wx-&gt;msix_q_entries[vector].vector,</div><div class='add'>+			 wx-&gt;q_vector[vector]);</div><div class='add'>+	}</div><div class='add'>+	wx_reset_interrupt_capability(wx);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_request_msix_irqs_vf);</div><div class='add'>+</div><div class='add'>+void wx_negotiate_api_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int api[] = {</div><div class='add'>+		     wx_mbox_api_13,</div><div class='add'>+		     wx_mbox_api_null};</div><div class='add'>+	int err = 0, idx = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+	while (api[idx] != wx_mbox_api_null) {</div><div class='add'>+		err = wx_negotiate_api_version(wx, api[idx]);</div><div class='add'>+		if (!err)</div><div class='add'>+			break;</div><div class='add'>+		idx++;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_negotiate_api_vf);</div><div class='add'>+</div><div class='add'>+void wx_reset_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = wx-&gt;netdev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = wx_reset_hw_vf(wx);</div><div class='add'>+	if (!ret)</div><div class='add'>+		wx_init_hw_vf(wx);</div><div class='add'>+	wx_negotiate_api_vf(wx);</div><div class='add'>+	if (is_valid_ether_addr(wx-&gt;mac.addr)) {</div><div class='add'>+		eth_hw_addr_set(netdev, wx-&gt;mac.addr);</div><div class='add'>+		ether_addr_copy(netdev-&gt;perm_addr, wx-&gt;mac.addr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_reset_vf);</div><div class='add'>+</div><div class='add'>+void wx_set_rx_mode_vf(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+	unsigned int flags = netdev-&gt;flags;</div><div class='add'>+	int xcast_mode;</div><div class='add'>+</div><div class='add'>+	xcast_mode = (flags &amp; IFF_ALLMULTI) ? WXVF_XCAST_MODE_ALLMULTI :</div><div class='add'>+		     (flags &amp; (IFF_BROADCAST | IFF_MULTICAST)) ?</div><div class='add'>+		     WXVF_XCAST_MODE_MULTI : WXVF_XCAST_MODE_NONE;</div><div class='add'>+	/* request the most inclusive mode we need */</div><div class='add'>+	if (flags &amp; IFF_PROMISC)</div><div class='add'>+		xcast_mode = WXVF_XCAST_MODE_PROMISC;</div><div class='add'>+	else if (flags &amp; IFF_ALLMULTI)</div><div class='add'>+		xcast_mode = WXVF_XCAST_MODE_ALLMULTI;</div><div class='add'>+	else if (flags &amp; (IFF_BROADCAST | IFF_MULTICAST))</div><div class='add'>+		xcast_mode = WXVF_XCAST_MODE_MULTI;</div><div class='add'>+	else</div><div class='add'>+		xcast_mode = WXVF_XCAST_MODE_NONE;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+	wx_update_xcast_mode_vf(wx, xcast_mode);</div><div class='add'>+	wx_update_mc_addr_list_vf(wx, netdev);</div><div class='add'>+	wx_write_uc_addr_list_vf(netdev);</div><div class='add'>+	spin_unlock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_set_rx_mode_vf);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_configure_rx_vf - Configure Receive Unit after Reset</div><div class='add'>+ * @wx: board private structure</div><div class='add'>+ *</div><div class='add'>+ * Configure the Rx unit of the MAC after a reset.</div><div class='add'>+ **/</div><div class='add'>+static void wx_configure_rx_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = wx-&gt;netdev;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	wx_setup_psrtype_vf(wx);</div><div class='add'>+	wx_setup_vfmrqc_vf(wx);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+	ret = wx_rlpml_set_vf(wx,</div><div class='add'>+			      netdev-&gt;mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);</div><div class='add'>+	spin_unlock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		wx_dbg(wx, "Failed to set MTU at %d\n", netdev-&gt;mtu);</div><div class='add'>+</div><div class='add'>+	/* Setup the HW Rx Head and Tail Descriptor Pointers and</div><div class='add'>+	 * the Base and Length of the Rx Descriptor Ring</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;num_rx_queues; i++) {</div><div class='add'>+		struct wx_ring *rx_ring = wx-&gt;rx_ring[i];</div><div class='add'>+#ifdef HAVE_SWIOTLB_SKIP_CPU_SYNC</div><div class='add'>+		wx_set_rx_buffer_len_vf(wx, rx_ring);</div><div class='add'>+#endif</div><div class='add'>+		wx_configure_rx_ring_vf(wx, rx_ring);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wx_configure_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	wx_set_rx_mode_vf(wx-&gt;netdev);</div><div class='add'>+	wx_configure_tx_vf(wx);</div><div class='add'>+	wx_configure_rx_vf(wx);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_configure_vf);</div><div class='add'>+</div><div class='add'>+int wx_set_mac_vf(struct net_device *netdev, void *p)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+	struct sockaddr *addr = p;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = eth_prepare_mac_addr_change(netdev, addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+	ret = wx_set_rar_vf(wx, 1, (u8 *)addr-&gt;sa_data, 1);</div><div class='add'>+	spin_unlock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	memcpy(wx-&gt;mac.addr, addr-&gt;sa_data, netdev-&gt;addr_len);</div><div class='add'>+	memcpy(wx-&gt;mac.perm_addr, addr-&gt;sa_data, netdev-&gt;addr_len);</div><div class='add'>+	eth_hw_addr_set(netdev, addr-&gt;sa_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wx_set_mac_vf);</div><div class='add'>+</div><div class='add'>+void wxvf_watchdog_update_link(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_NEED_UPDATE_LINK, wx-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+	err = wx_check_mac_link_vf(wx);</div><div class='add'>+	spin_unlock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+	if (err) {</div><div class='add'>+		wx-&gt;link = false;</div><div class='add'>+		set_bit(WX_FLAG_NEED_DO_RESET, wx-&gt;flags);</div><div class='add'>+	}</div><div class='add'>+	clear_bit(WX_FLAG_NEED_UPDATE_LINK, wx-&gt;flags);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wxvf_watchdog_update_link);</div><div class='add'>+</div><div class='add'>+static void wxvf_irq_enable(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	wr32(wx, WX_VXIMC, wx-&gt;eims_enable_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wxvf_up_complete(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* Always set the carrier off */</div><div class='add'>+	netif_carrier_off(wx-&gt;netdev);</div><div class='add'>+	mod_timer(&amp;wx-&gt;service_timer, jiffies + HZ);</div><div class='add'>+	set_bit(WX_FLAG_NEED_UPDATE_LINK, wx-&gt;flags);</div><div class='add'>+</div><div class='add'>+	wx_configure_msix_vf(wx);</div><div class='add'>+	smp_mb__before_atomic();</div><div class='add'>+	wx_napi_enable_all(wx);</div><div class='add'>+</div><div class='add'>+	/* clear any pending interrupts, may auto mask */</div><div class='add'>+	wr32(wx, WX_VXICR, U32_MAX);</div><div class='add'>+	wxvf_irq_enable(wx);</div><div class='add'>+	/* enable transmits */</div><div class='add'>+	netif_tx_start_all_queues(wx-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wxvf_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = wx_setup_resources(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_reset;</div><div class='add'>+	wx_configure_vf(wx);</div><div class='add'>+</div><div class='add'>+	err = wx_request_msix_irqs_vf(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_resources;</div><div class='add'>+</div><div class='add'>+	/* Notify the stack of the actual queue counts. */</div><div class='add'>+	err = netif_set_real_num_tx_queues(netdev, wx-&gt;num_tx_queues);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_irq;</div><div class='add'>+</div><div class='add'>+	err = netif_set_real_num_rx_queues(netdev, wx-&gt;num_rx_queues);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_irq;</div><div class='add'>+</div><div class='add'>+	wxvf_up_complete(wx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_free_irq:</div><div class='add'>+	wx_free_irq(wx);</div><div class='add'>+err_free_resources:</div><div class='add'>+	wx_free_resources(wx);</div><div class='add'>+err_reset:</div><div class='add'>+	wx_reset_vf(wx);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wxvf_open);</div><div class='add'>+</div><div class='add'>+static void wxvf_down(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = wx-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	timer_delete_sync(&amp;wx-&gt;service_timer);</div><div class='add'>+	netif_tx_stop_all_queues(netdev);</div><div class='add'>+	netif_tx_disable(netdev);</div><div class='add'>+	netif_carrier_off(netdev);</div><div class='add'>+	wx_napi_disable_all(wx);</div><div class='add'>+	wx_reset_vf(wx);</div><div class='add'>+</div><div class='add'>+	wx_clean_all_tx_rings(wx);</div><div class='add'>+	wx_clean_all_rx_rings(wx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wxvf_reinit_locked(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	while (test_and_set_bit(WX_STATE_RESETTING, wx-&gt;state))</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+	wxvf_down(wx);</div><div class='add'>+	wx_free_irq(wx);</div><div class='add'>+	wx_configure_vf(wx);</div><div class='add'>+	wx_request_msix_irqs_vf(wx);</div><div class='add'>+	wxvf_up_complete(wx);</div><div class='add'>+	clear_bit(WX_STATE_RESETTING, wx-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wxvf_reset_subtask(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	if (!test_bit(WX_FLAG_NEED_DO_RESET, wx-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+	clear_bit(WX_FLAG_NEED_DO_RESET, wx-&gt;flags);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	if (test_bit(WX_STATE_RESETTING, wx-&gt;state) ||</div><div class='add'>+	    !(netif_running(wx-&gt;netdev))) {</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	wxvf_reinit_locked(wx);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wxvf_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	wxvf_down(wx);</div><div class='add'>+	wx_free_irq(wx);</div><div class='add'>+	wx_free_resources(wx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wxvf_close);</div><div class='add'>+</div><div class='add'>+static void wxvf_link_config_subtask(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = wx-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	wxvf_watchdog_update_link(wx);</div><div class='add'>+	if (wx-&gt;link) {</div><div class='add'>+		if (netif_carrier_ok(netdev))</div><div class='add'>+			return;</div><div class='add'>+		netif_carrier_on(netdev);</div><div class='add'>+		netdev_info(netdev, "Link is Up - %s\n",</div><div class='add'>+			    phy_speed_to_str(wx-&gt;speed));</div><div class='add'>+	} else {</div><div class='add'>+		if (!netif_carrier_ok(netdev))</div><div class='add'>+			return;</div><div class='add'>+		netif_carrier_off(netdev);</div><div class='add'>+		netdev_info(netdev, "Link is Down\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wxvf_service_task(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = container_of(work, struct wx, service_task);</div><div class='add'>+</div><div class='add'>+	wxvf_link_config_subtask(wx);</div><div class='add'>+	wxvf_reset_subtask(wx);</div><div class='add'>+	wx_service_event_complete(wx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wxvf_init_service(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	timer_setup(&amp;wx-&gt;service_timer, wx_service_timer, 0);</div><div class='add'>+	INIT_WORK(&amp;wx-&gt;service_task, wxvf_service_task);</div><div class='add'>+	clear_bit(WX_STATE_SERVICE_SCHED, wx-&gt;state);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(wxvf_init_service);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_vf_common.h b/drivers/net/ethernet/wangxun/libwx/wx_vf_common.h<br/>new file mode 100644<br/>index 000000000000..cbbb1b178cb2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_vf_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_vf_common.h</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#ifndef _WX_VF_COMMON_H_</div><div class='add'>+#define _WX_VF_COMMON_H_</div><div class='add'>+</div><div class='add'>+int wxvf_suspend(struct device *dev_d);</div><div class='add'>+void wxvf_shutdown(struct pci_dev *pdev);</div><div class='add'>+int wxvf_resume(struct device *dev_d);</div><div class='add'>+void wxvf_remove(struct pci_dev *pdev);</div><div class='add'>+int wx_request_msix_irqs_vf(struct wx *wx);</div><div class='add'>+void wx_negotiate_api_vf(struct wx *wx);</div><div class='add'>+void wx_reset_vf(struct wx *wx);</div><div class='add'>+void wx_set_rx_mode_vf(struct net_device *netdev);</div><div class='add'>+void wx_configure_vf(struct wx *wx);</div><div class='add'>+int wx_set_mac_vf(struct net_device *netdev, void *p);</div><div class='add'>+void wxvf_watchdog_update_link(struct wx *wx);</div><div class='add'>+int wxvf_open(struct net_device *netdev);</div><div class='add'>+int wxvf_close(struct net_device *netdev);</div><div class='add'>+void wxvf_init_service(struct wx *wx);</div><div class='add'>+</div><div class='add'>+#endif /* _WX_VF_COMMON_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c b/drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c<br/>new file mode 100644<br/>index 000000000000..aa8be036956c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c</a></div><div class='hunk'>@@ -0,0 +1,292 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "wx_type.h"</div><div class='add'>+#include "wx_hw.h"</div><div class='add'>+#include "wx_lib.h"</div><div class='add'>+#include "wx_vf.h"</div><div class='add'>+#include "wx_vf_lib.h"</div><div class='add'>+</div><div class='add'>+void wx_write_eitr_vf(struct wx_q_vector *q_vector)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = q_vector-&gt;wx;</div><div class='add'>+	int v_idx = q_vector-&gt;v_idx;</div><div class='add'>+	u32 itr_reg;</div><div class='add'>+</div><div class='add'>+	itr_reg = q_vector-&gt;itr &amp; WX_VXITR_MASK;</div><div class='add'>+</div><div class='add'>+	/* set the WDIS bit to not clear the timer bits and cause an</div><div class='add'>+	 * immediate assertion of the interrupt</div><div class='add'>+	 */</div><div class='add'>+	itr_reg |= WX_VXITR_CNT_WDIS;</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_VXITR(v_idx), itr_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_set_ivar_vf(struct wx *wx, s8 direction, u8 queue,</div><div class='add'>+			   u8 msix_vector)</div><div class='add'>+{</div><div class='add'>+	u32 ivar, index;</div><div class='add'>+</div><div class='add'>+	if (direction == -1) {</div><div class='add'>+		/* other causes */</div><div class='add'>+		msix_vector |= WX_PX_IVAR_ALLOC_VAL;</div><div class='add'>+		ivar = rd32(wx, WX_VXIVAR_MISC);</div><div class='add'>+		ivar &amp;= ~0xFF;</div><div class='add'>+		ivar |= msix_vector;</div><div class='add'>+		wr32(wx, WX_VXIVAR_MISC, ivar);</div><div class='add'>+	} else {</div><div class='add'>+		/* tx or rx causes */</div><div class='add'>+		msix_vector |= WX_PX_IVAR_ALLOC_VAL;</div><div class='add'>+		index = ((16 * (queue &amp; 1)) + (8 * direction));</div><div class='add'>+		ivar = rd32(wx, WX_VXIVAR(queue &gt;&gt; 1));</div><div class='add'>+		ivar &amp;= ~(0xFF &lt;&lt; index);</div><div class='add'>+		ivar |= (msix_vector &lt;&lt; index);</div><div class='add'>+		wr32(wx, WX_VXIVAR(queue &gt;&gt; 1), ivar);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wx_configure_msix_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int v_idx;</div><div class='add'>+</div><div class='add'>+	wx-&gt;eims_enable_mask = 0;</div><div class='add'>+	for (v_idx = 0; v_idx &lt; wx-&gt;num_q_vectors; v_idx++) {</div><div class='add'>+		struct wx_q_vector *q_vector = wx-&gt;q_vector[v_idx];</div><div class='add'>+		struct wx_ring *ring;</div><div class='add'>+</div><div class='add'>+		wx_for_each_ring(ring, q_vector-&gt;rx)</div><div class='add'>+			wx_set_ivar_vf(wx, 0, ring-&gt;reg_idx, v_idx);</div><div class='add'>+</div><div class='add'>+		wx_for_each_ring(ring, q_vector-&gt;tx)</div><div class='add'>+			wx_set_ivar_vf(wx, 1, ring-&gt;reg_idx, v_idx);</div><div class='add'>+</div><div class='add'>+		/* add q_vector eims value to global eims_enable_mask */</div><div class='add'>+		wx-&gt;eims_enable_mask |= BIT(v_idx);</div><div class='add'>+		wx_write_eitr_vf(q_vector);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx_set_ivar_vf(wx, -1, 1, v_idx);</div><div class='add'>+</div><div class='add'>+	/* setup eims_other and add value to global eims_enable_mask */</div><div class='add'>+	wx-&gt;eims_other = BIT(v_idx);</div><div class='add'>+	wx-&gt;eims_enable_mask |= wx-&gt;eims_other;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wx_write_uc_addr_list_vf(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+	int count = 0;</div><div class='add'>+</div><div class='add'>+	if (!netdev_uc_empty(netdev)) {</div><div class='add'>+		struct netdev_hw_addr *ha;</div><div class='add'>+</div><div class='add'>+		netdev_for_each_uc_addr(ha, netdev)</div><div class='add'>+			wx_set_uc_addr_vf(wx, ++count, ha-&gt;addr);</div><div class='add'>+	} else {</div><div class='add'>+		/*</div><div class='add'>+		 * If the list is empty then send message to PF driver to</div><div class='add'>+		 * clear all macvlans on this VF.</div><div class='add'>+		 */</div><div class='add'>+		wx_set_uc_addr_vf(wx, 0, NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_configure_tx_ring_vf - Configure Tx ring after Reset</div><div class='add'>+ * @wx: board private structure</div><div class='add'>+ * @ring: structure containing ring specific data</div><div class='add'>+ *</div><div class='add'>+ * Configure the Tx descriptor ring after a reset.</div><div class='add'>+ **/</div><div class='add'>+static void wx_configure_tx_ring_vf(struct wx *wx, struct wx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u8 reg_idx = ring-&gt;reg_idx;</div><div class='add'>+	u64 tdba = ring-&gt;dma;</div><div class='add'>+	u32 txdctl = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* disable queue to avoid issues while updating state */</div><div class='add'>+	wr32(wx, WX_VXTXDCTL(reg_idx), WX_VXTXDCTL_FLUSH);</div><div class='add'>+	wr32(wx, WX_VXTDBAL(reg_idx), tdba &amp; DMA_BIT_MASK(32));</div><div class='add'>+	wr32(wx, WX_VXTDBAH(reg_idx), tdba &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+	/* enable relaxed ordering */</div><div class='add'>+	pcie_capability_clear_and_set_word(wx-&gt;pdev, PCI_EXP_DEVCTL,</div><div class='add'>+					   0, PCI_EXP_DEVCTL_RELAX_EN);</div><div class='add'>+</div><div class='add'>+	/* reset head and tail pointers */</div><div class='add'>+	wr32(wx, WX_VXTDH(reg_idx), 0);</div><div class='add'>+	wr32(wx, WX_VXTDT(reg_idx), 0);</div><div class='add'>+	ring-&gt;tail = wx-&gt;hw_addr + WX_VXTDT(reg_idx);</div><div class='add'>+</div><div class='add'>+	/* reset ntu and ntc to place SW in sync with hardwdare */</div><div class='add'>+	ring-&gt;next_to_clean = 0;</div><div class='add'>+	ring-&gt;next_to_use = 0;</div><div class='add'>+</div><div class='add'>+	txdctl |= WX_VXTXDCTL_BUFLEN(wx_buf_len(ring-&gt;count));</div><div class='add'>+	txdctl |= WX_VXTXDCTL_ENABLE;</div><div class='add'>+</div><div class='add'>+	if (ring-&gt;headwb_mem) {</div><div class='add'>+		wr32(wx, WX_VXTXD_HEAD_ADDRL(reg_idx),</div><div class='add'>+		     ring-&gt;headwb_dma &amp; DMA_BIT_MASK(32));</div><div class='add'>+		wr32(wx, WX_VXTXD_HEAD_ADDRH(reg_idx),</div><div class='add'>+		     upper_32_bits(ring-&gt;headwb_dma));</div><div class='add'>+</div><div class='add'>+		txdctl |= WX_VXTXDCTL_HEAD_WB;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* reinitialize tx_buffer_info */</div><div class='add'>+	memset(ring-&gt;tx_buffer_info, 0,</div><div class='add'>+	       sizeof(struct wx_tx_buffer) * ring-&gt;count);</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_VXTXDCTL(reg_idx), txdctl);</div><div class='add'>+	/* poll to verify queue is enabled */</div><div class='add'>+	ret = read_poll_timeout(rd32, txdctl, txdctl &amp; WX_VXTXDCTL_ENABLE,</div><div class='add'>+				1000, 10000, true, wx, WX_VXTXDCTL(reg_idx));</div><div class='add'>+	if (ret == -ETIMEDOUT)</div><div class='add'>+		wx_err(wx, "Could not enable Tx Queue %d\n", reg_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * wx_configure_tx_vf - Configure Transmit Unit after Reset</div><div class='add'>+ * @wx: board private structure</div><div class='add'>+ *</div><div class='add'>+ * Configure the Tx unit of the MAC after a reset.</div><div class='add'>+ **/</div><div class='add'>+void wx_configure_tx_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	/* Setup the HW Tx Head and Tail descriptor pointers */</div><div class='add'>+	for (i = 0; i &lt; wx-&gt;num_tx_queues; i++)</div><div class='add'>+		wx_configure_tx_ring_vf(wx, wx-&gt;tx_ring[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void wx_configure_srrctl_vf(struct wx *wx, struct wx_ring *ring,</div><div class='add'>+				   int index)</div><div class='add'>+{</div><div class='add'>+	u32 srrctl;</div><div class='add'>+</div><div class='add'>+	srrctl = rd32m(wx, WX_VXRXDCTL(index),</div><div class='add'>+		       (u32)~(WX_VXRXDCTL_HDRSZ_MASK | WX_VXRXDCTL_BUFSZ_MASK));</div><div class='add'>+	srrctl |= WX_VXRXDCTL_DROP;</div><div class='add'>+	srrctl |= WX_VXRXDCTL_HDRSZ(wx_hdr_sz(WX_RX_HDR_SIZE));</div><div class='add'>+	srrctl |= WX_VXRXDCTL_BUFSZ(wx_buf_sz(WX_RX_BUF_SIZE));</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_VXRXDCTL(index), srrctl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wx_setup_psrtype_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* PSRTYPE must be initialized */</div><div class='add'>+	u32 psrtype = WX_VXMRQC_PSR_L2HDR |</div><div class='add'>+		      WX_VXMRQC_PSR_L3HDR |</div><div class='add'>+		      WX_VXMRQC_PSR_L4HDR |</div><div class='add'>+		      WX_VXMRQC_PSR_TUNHDR |</div><div class='add'>+		      WX_VXMRQC_PSR_TUNMAC;</div><div class='add'>+</div><div class='add'>+	wr32m(wx, WX_VXMRQC, WX_VXMRQC_PSR_MASK, WX_VXMRQC_PSR(psrtype));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wx_setup_vfmrqc_vf(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u16 rss_i = wx-&gt;num_rx_queues;</div><div class='add'>+	u32 vfmrqc = 0, vfreta = 0;</div><div class='add'>+	u8 i, j;</div><div class='add'>+</div><div class='add'>+	/* Fill out hash function seeds */</div><div class='add'>+	netdev_rss_key_fill(wx-&gt;rss_key, WX_RSS_KEY_SIZE);</div><div class='add'>+	for (i = 0; i &lt; WX_RSS_KEY_SIZE / 4; i++)</div><div class='add'>+		wr32(wx, WX_VXRSSRK(i), wx-&gt;rss_key[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0, j = 0; i &lt; WX_MAX_RETA_ENTRIES; i++, j++) {</div><div class='add'>+		if (j == rss_i)</div><div class='add'>+			j = 0;</div><div class='add'>+</div><div class='add'>+		wx-&gt;rss_indir_tbl[i] = j;</div><div class='add'>+</div><div class='add'>+		vfreta |= j &lt;&lt; (i &amp; 0x3) * 8;</div><div class='add'>+		if ((i &amp; 3) == 3) {</div><div class='add'>+			wr32(wx, WX_VXRETA(i &gt;&gt; 2), vfreta);</div><div class='add'>+			vfreta = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Perform hash on these packet types */</div><div class='add'>+	vfmrqc |= WX_VXMRQC_RSS_ALG_IPV4 |</div><div class='add'>+		  WX_VXMRQC_RSS_ALG_IPV4_TCP |</div><div class='add'>+		  WX_VXMRQC_RSS_ALG_IPV6 |</div><div class='add'>+		  WX_VXMRQC_RSS_ALG_IPV6_TCP;</div><div class='add'>+</div><div class='add'>+	vfmrqc |= WX_VXMRQC_RSS_EN;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;num_rx_queues &gt; 3)</div><div class='add'>+		vfmrqc |= WX_VXMRQC_RSS_HASH(2);</div><div class='add'>+	else if (wx-&gt;num_rx_queues &gt; 1)</div><div class='add'>+		vfmrqc |= WX_VXMRQC_RSS_HASH(1);</div><div class='add'>+	wr32m(wx, WX_VXMRQC, WX_VXMRQC_RSS_MASK, WX_VXMRQC_RSS(vfmrqc));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void wx_configure_rx_ring_vf(struct wx *wx, struct wx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u8 reg_idx = ring-&gt;reg_idx;</div><div class='add'>+	union wx_rx_desc *rx_desc;</div><div class='add'>+	u64 rdba = ring-&gt;dma;</div><div class='add'>+	u32 rxdctl;</div><div class='add'>+</div><div class='add'>+	/* disable queue to avoid issues while updating state */</div><div class='add'>+	rxdctl = rd32(wx, WX_VXRXDCTL(reg_idx));</div><div class='add'>+	wx_disable_rx_queue(wx, ring);</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_VXRDBAL(reg_idx), rdba &amp; DMA_BIT_MASK(32));</div><div class='add'>+	wr32(wx, WX_VXRDBAH(reg_idx), rdba &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+	/* enable relaxed ordering */</div><div class='add'>+	pcie_capability_clear_and_set_word(wx-&gt;pdev, PCI_EXP_DEVCTL,</div><div class='add'>+					   0, PCI_EXP_DEVCTL_RELAX_EN);</div><div class='add'>+</div><div class='add'>+	/* reset head and tail pointers */</div><div class='add'>+	wr32(wx, WX_VXRDH(reg_idx), 0);</div><div class='add'>+	wr32(wx, WX_VXRDT(reg_idx), 0);</div><div class='add'>+	ring-&gt;tail = wx-&gt;hw_addr + WX_VXRDT(reg_idx);</div><div class='add'>+</div><div class='add'>+	/* initialize rx_buffer_info */</div><div class='add'>+	memset(ring-&gt;rx_buffer_info, 0,</div><div class='add'>+	       sizeof(struct wx_rx_buffer) * ring-&gt;count);</div><div class='add'>+</div><div class='add'>+	/* initialize Rx descriptor 0 */</div><div class='add'>+	rx_desc = WX_RX_DESC(ring, 0);</div><div class='add'>+	rx_desc-&gt;wb.upper.length = 0;</div><div class='add'>+</div><div class='add'>+	/* reset ntu and ntc to place SW in sync with hardwdare */</div><div class='add'>+	ring-&gt;next_to_clean = 0;</div><div class='add'>+	ring-&gt;next_to_use = 0;</div><div class='add'>+	ring-&gt;next_to_alloc = 0;</div><div class='add'>+</div><div class='add'>+	wx_configure_srrctl_vf(wx, ring, reg_idx);</div><div class='add'>+</div><div class='add'>+	/* allow any size packet since we can handle overflow */</div><div class='add'>+	rxdctl &amp;= ~WX_VXRXDCTL_BUFLEN_MASK;</div><div class='add'>+	rxdctl |= WX_VXRXDCTL_BUFLEN(wx_buf_len(ring-&gt;count));</div><div class='add'>+	rxdctl |= WX_VXRXDCTL_ENABLE | WX_VXRXDCTL_VLAN;</div><div class='add'>+</div><div class='add'>+	/* enable RSC */</div><div class='add'>+	rxdctl &amp;= ~WX_VXRXDCTL_RSCMAX_MASK;</div><div class='add'>+	rxdctl |= WX_VXRXDCTL_RSCMAX(0);</div><div class='add'>+	rxdctl |= WX_VXRXDCTL_RSCEN;</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_FLAG_RX_MERGE_ENABLED, wx-&gt;flags))</div><div class='add'>+		rxdctl |= WX_VXRXDCTL_DESC_MERGE;</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_VXRXDCTL(reg_idx), rxdctl);</div><div class='add'>+</div><div class='add'>+	/* pf/vf reuse */</div><div class='add'>+	wx_enable_rx_queue(wx, ring);</div><div class='add'>+	wx_alloc_rx_buffers(ring, wx_desc_unused(ring));</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/libwx/wx_vf_lib.h b/drivers/net/ethernet/wangxun/libwx/wx_vf_lib.h<br/>new file mode 100644<br/>index 000000000000..a4bd23c92800<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/libwx/wx_vf_lib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/libwx/wx_vf_lib.h</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#ifndef _WX_VF_LIB_H_</div><div class='add'>+#define _WX_VF_LIB_H_</div><div class='add'>+</div><div class='add'>+void wx_write_eitr_vf(struct wx_q_vector *q_vector);</div><div class='add'>+void wx_configure_msix_vf(struct wx *wx);</div><div class='add'>+int wx_write_uc_addr_list_vf(struct net_device *netdev);</div><div class='add'>+void wx_setup_psrtype_vf(struct wx *wx);</div><div class='add'>+void wx_setup_vfmrqc_vf(struct wx *wx);</div><div class='add'>+void wx_configure_tx_vf(struct wx *wx);</div><div class='add'>+void wx_configure_rx_ring_vf(struct wx *wx, struct wx_ring *ring);</div><div class='add'>+</div><div class='add'>+#endif /* _WX_VF_LIB_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.c b/drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.c<br/>index e868f7ef4920..662f28bdde8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.c</a></div><div class='hunk'>@@ -115,7 +115,8 @@ static int ngbe_set_channels(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ngbe_ethtool_ops = {</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='del'>-				     ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ,</div><div class='add'>+				     ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ |</div><div class='add'>+				     ETHTOOL_COALESCE_USE_ADAPTIVE,</div><div class='ctx'> 	.get_drvinfo		= wx_get_drvinfo,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='ctx'> 	.get_link_ksettings	= wx_get_link_ksettings,</div><div class='hunk'>@@ -136,8 +137,16 @@ static const struct ethtool_ops ngbe_ethtool_ops = {</div><div class='ctx'> 	.set_coalesce		= wx_set_coalesce,</div><div class='ctx'> 	.get_channels		= wx_get_channels,</div><div class='ctx'> 	.set_channels		= ngbe_set_channels,</div><div class='add'>+	.get_rxfh_fields	= wx_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= wx_set_rxfh_fields,</div><div class='add'>+	.get_rxfh_indir_size	= wx_rss_indir_size,</div><div class='add'>+	.get_rxfh_key_size	= wx_get_rxfh_key_size,</div><div class='add'>+	.get_rxfh		= wx_get_rxfh,</div><div class='add'>+	.set_rxfh		= wx_set_rxfh,</div><div class='ctx'> 	.get_msglevel		= wx_get_msglevel,</div><div class='ctx'> 	.set_msglevel		= wx_set_msglevel,</div><div class='add'>+	.get_ts_info		= wx_get_ts_info,</div><div class='add'>+	.get_ts_stats		= wx_get_ptp_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void ngbe_set_ethtool_ops(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/ngbe/ngbe_main.c b/drivers/net/ethernet/wangxun/ngbe/ngbe_main.c<br/>index 53aeae2f884b..58488e138beb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbe/ngbe_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbe/ngbe_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbe/ngbe_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/ngbe/ngbe_main.c</a></div><div class='hunk'>@@ -14,6 +14,9 @@</div><div class='ctx'> #include "../libwx/wx_type.h"</div><div class='ctx'> #include "../libwx/wx_hw.h"</div><div class='ctx'> #include "../libwx/wx_lib.h"</div><div class='add'>+#include "../libwx/wx_ptp.h"</div><div class='add'>+#include "../libwx/wx_mbx.h"</div><div class='add'>+#include "../libwx/wx_sriov.h"</div><div class='ctx'> #include "ngbe_type.h"</div><div class='ctx'> #include "ngbe_mdio.h"</div><div class='ctx'> #include "ngbe_hw.h"</div><div class='hunk'>@@ -116,9 +119,9 @@ static int ngbe_sw_init(struct wx *wx)</div><div class='ctx'> 						   num_online_cpus());</div><div class='ctx'> 	wx-&gt;rss_enabled = true;</div><div class='ctx'> </div><div class='del'>-	/* enable itr by default in dynamic mode */</div><div class='del'>-	wx-&gt;rx_itr_setting = 1;</div><div class='del'>-	wx-&gt;tx_itr_setting = 1;</div><div class='add'>+	wx-&gt;adaptive_itr = false;</div><div class='add'>+	wx-&gt;rx_itr_setting = WX_7K_ITR;</div><div class='add'>+	wx-&gt;tx_itr_setting = WX_7K_ITR;</div><div class='ctx'> </div><div class='ctx'> 	/* set default ring sizes */</div><div class='ctx'> 	wx-&gt;tx_ring_count = NGBE_DEFAULT_TXD;</div><div class='hunk'>@@ -128,6 +131,10 @@ static int ngbe_sw_init(struct wx *wx)</div><div class='ctx'> 	wx-&gt;tx_work_limit = NGBE_DEFAULT_TX_WORK;</div><div class='ctx'> 	wx-&gt;rx_work_limit = NGBE_DEFAULT_RX_WORK;</div><div class='ctx'> </div><div class='add'>+	wx-&gt;mbx.size = WX_VXMAILBOX_SIZE;</div><div class='add'>+	wx-&gt;setup_tc = ngbe_setup_tc;</div><div class='add'>+	set_bit(0, &amp;wx-&gt;fwd_bitmask);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -154,7 +161,7 @@ static void ngbe_irq_enable(struct wx *wx, bool queues)</div><div class='ctx'> 	if (queues)</div><div class='ctx'> 		wx_intr_enable(wx, NGBE_INTR_ALL);</div><div class='ctx'> 	else</div><div class='del'>-		wx_intr_enable(wx, NGBE_INTR_MISC);</div><div class='add'>+		wx_intr_enable(wx, NGBE_INTR_MISC(wx));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -167,7 +174,7 @@ static irqreturn_t ngbe_intr(int __always_unused irq, void *data)</div><div class='ctx'> 	struct wx_q_vector *q_vector;</div><div class='ctx'> 	struct wx *wx  = data;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='del'>-	u32 eicr;</div><div class='add'>+	u32 eicr, eicr_misc;</div><div class='ctx'> </div><div class='ctx'> 	q_vector = wx-&gt;q_vector[0];</div><div class='ctx'> 	pdev = wx-&gt;pdev;</div><div class='hunk'>@@ -185,6 +192,10 @@ static irqreturn_t ngbe_intr(int __always_unused irq, void *data)</div><div class='ctx'> 	if (!(pdev-&gt;msi_enabled))</div><div class='ctx'> 		wr32(wx, WX_PX_INTA, 1);</div><div class='ctx'> </div><div class='add'>+	eicr_misc = wx_misc_isb(wx, WX_ISB_MISC);</div><div class='add'>+	if (unlikely(eicr_misc &amp; NGBE_PX_MISC_IC_TIMESYNC))</div><div class='add'>+		wx_ptp_check_pps_event(wx);</div><div class='add'>+</div><div class='ctx'> 	wx-&gt;isb_mem[WX_ISB_MISC] = 0;</div><div class='ctx'> 	/* would disable interrupts here but it is auto disabled */</div><div class='ctx'> 	napi_schedule_irqoff(&amp;q_vector-&gt;napi);</div><div class='hunk'>@@ -195,9 +206,13 @@ static irqreturn_t ngbe_intr(int __always_unused irq, void *data)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t ngbe_msix_other(int __always_unused irq, void *data)</div><div class='add'>+static irqreturn_t __ngbe_msix_misc(struct wx *wx, u32 eicr)</div><div class='ctx'> {</div><div class='del'>-	struct wx *wx = data;</div><div class='add'>+	if (eicr &amp; NGBE_PX_MISC_IC_VF_MBOX)</div><div class='add'>+		wx_msg_task(wx);</div><div class='add'>+</div><div class='add'>+	if (unlikely(eicr &amp; NGBE_PX_MISC_IC_TIMESYNC))</div><div class='add'>+		wx_ptp_check_pps_event(wx);</div><div class='ctx'> </div><div class='ctx'> 	/* re-enable the original interrupt state, no lsc, no queues */</div><div class='ctx'> 	if (netif_running(wx-&gt;netdev))</div><div class='hunk'>@@ -206,6 +221,35 @@ static irqreturn_t ngbe_msix_other(int __always_unused irq, void *data)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static irqreturn_t ngbe_msix_misc(int __always_unused irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = data;</div><div class='add'>+	u32 eicr;</div><div class='add'>+</div><div class='add'>+	eicr = wx_misc_isb(wx, WX_ISB_MISC);</div><div class='add'>+</div><div class='add'>+	return __ngbe_msix_misc(wx, eicr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ngbe_misc_and_queue(int __always_unused irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct wx_q_vector *q_vector;</div><div class='add'>+	struct wx *wx = data;</div><div class='add'>+	u32 eicr;</div><div class='add'>+</div><div class='add'>+	eicr = wx_misc_isb(wx, WX_ISB_MISC);</div><div class='add'>+	if (!eicr) {</div><div class='add'>+		/* queue */</div><div class='add'>+		q_vector = wx-&gt;q_vector[0];</div><div class='add'>+		napi_schedule_irqoff(&amp;q_vector-&gt;napi);</div><div class='add'>+		if (netif_running(wx-&gt;netdev))</div><div class='add'>+			ngbe_irq_enable(wx, true);</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return __ngbe_msix_misc(wx, eicr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ngbe_request_msix_irqs - Initialize MSI-X interrupts</div><div class='ctx'>  * @wx: board private structure</div><div class='hunk'>@@ -238,8 +282,16 @@ static int ngbe_request_msix_irqs(struct wx *wx)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = request_irq(wx-&gt;msix_entry-&gt;vector,</div><div class='del'>-			  ngbe_msix_other, 0, netdev-&gt;name, wx);</div><div class='add'>+	/* Due to hardware design, when num_vfs &lt; 7, pf can use 0 for misc and 1</div><div class='add'>+	 * for queue. But when num_vfs == 7, vector[1] is assigned to vf6.</div><div class='add'>+	 * Misc and queue should reuse interrupt vector[0].</div><div class='add'>+	 */</div><div class='add'>+	if (test_bit(WX_FLAG_IRQ_VECTOR_SHARED, wx-&gt;flags))</div><div class='add'>+		err = request_irq(wx-&gt;msix_entry-&gt;vector,</div><div class='add'>+				  ngbe_misc_and_queue, 0, netdev-&gt;name, wx);</div><div class='add'>+	else</div><div class='add'>+		err = request_irq(wx-&gt;msix_entry-&gt;vector,</div><div class='add'>+				  ngbe_msix_misc, 0, netdev-&gt;name, wx);</div><div class='ctx'> </div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		wx_err(wx, "request_irq for msix_other failed: %d\n", err);</div><div class='hunk'>@@ -291,6 +343,22 @@ static void ngbe_disable_device(struct wx *wx)</div><div class='ctx'> 	struct net_device *netdev = wx-&gt;netdev;</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='add'>+	if (wx-&gt;num_vfs) {</div><div class='add'>+		/* Clear EITR Select mapping */</div><div class='add'>+		wr32(wx, WX_PX_ITRSEL, 0);</div><div class='add'>+</div><div class='add'>+		/* Mark all the VFs as inactive */</div><div class='add'>+		for (i = 0; i &lt; wx-&gt;num_vfs; i++)</div><div class='add'>+			wx-&gt;vfinfo[i].clear_to_send = 0;</div><div class='add'>+		wx-&gt;notify_down = true;</div><div class='add'>+		/* ping all the active vfs to let them know we are going down */</div><div class='add'>+		wx_ping_all_vfs_with_link_status(wx, false);</div><div class='add'>+		wx-&gt;notify_down = false;</div><div class='add'>+</div><div class='add'>+		/* Disable all VFTE/VFRE TX/RX */</div><div class='add'>+		wx_disable_vf_rx_tx(wx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* disable all enabled rx queues */</div><div class='ctx'> 	for (i = 0; i &lt; wx-&gt;num_rx_queues; i++)</div><div class='ctx'> 		/* this call also flushes the previous write */</div><div class='hunk'>@@ -313,10 +381,19 @@ static void ngbe_disable_device(struct wx *wx)</div><div class='ctx'> 	wx_update_stats(wx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ngbe_reset(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	wx_flush_sw_mac_table(wx);</div><div class='add'>+	wx_mac_set_default_filter(wx, wx-&gt;mac.addr);</div><div class='add'>+	if (test_bit(WX_STATE_PTP_RUNNING, wx-&gt;state))</div><div class='add'>+		wx_ptp_reset(wx);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void ngbe_down(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	phylink_stop(wx-&gt;phylink);</div><div class='ctx'> 	ngbe_disable_device(wx);</div><div class='add'>+	ngbe_reset(wx);</div><div class='ctx'> 	wx_clean_all_tx_rings(wx);</div><div class='ctx'> 	wx_clean_all_rx_rings(wx);</div><div class='ctx'> }</div><div class='hunk'>@@ -339,6 +416,11 @@ void ngbe_up(struct wx *wx)</div><div class='ctx'> 		ngbe_sfp_modules_txrx_powerctl(wx, true);</div><div class='ctx'> </div><div class='ctx'> 	phylink_start(wx-&gt;phylink);</div><div class='add'>+	/* Set PF Reset Done bit so PF/VF Mail Ops can work */</div><div class='add'>+	wr32m(wx, WX_CFG_PORT_CTL,</div><div class='add'>+	      WX_CFG_PORT_CTL_PFRSTD, WX_CFG_PORT_CTL_PFRSTD);</div><div class='add'>+	if (wx-&gt;num_vfs)</div><div class='add'>+		wx_ping_all_vfs_with_link_status(wx, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -379,6 +461,8 @@ static int ngbe_open(struct net_device *netdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_dis_phy;</div><div class='ctx'> </div><div class='add'>+	wx_ptp_init(wx);</div><div class='add'>+</div><div class='ctx'> 	ngbe_up(wx);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -407,6 +491,7 @@ static int ngbe_close(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wx *wx = netdev_priv(netdev);</div><div class='ctx'> </div><div class='add'>+	wx_ptp_stop(wx);</div><div class='ctx'> 	ngbe_down(wx);</div><div class='ctx'> 	wx_free_irq(wx);</div><div class='ctx'> 	wx_free_isb_resources(wx);</div><div class='hunk'>@@ -502,11 +587,14 @@ static const struct net_device_ops ngbe_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode        = wx_set_rx_mode,</div><div class='ctx'> 	.ndo_set_features       = wx_set_features,</div><div class='ctx'> 	.ndo_fix_features       = wx_fix_features,</div><div class='add'>+	.ndo_features_check     = wx_features_check,</div><div class='ctx'> 	.ndo_validate_addr      = eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address    = wx_set_mac,</div><div class='ctx'> 	.ndo_get_stats64        = wx_get_stats64,</div><div class='ctx'> 	.ndo_vlan_rx_add_vid    = wx_vlan_rx_add_vid,</div><div class='ctx'> 	.ndo_vlan_rx_kill_vid   = wx_vlan_rx_kill_vid,</div><div class='add'>+	.ndo_hwtstamp_set       = wx_hwtstamp_set,</div><div class='add'>+	.ndo_hwtstamp_get       = wx_hwtstamp_get,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -578,6 +666,10 @@ static int ngbe_probe(struct pci_dev *pdev,</div><div class='ctx'> 		goto err_pci_release_regions;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* The emerald supports up to 8 VFs per pf, but physical</div><div class='add'>+	 * function also need one pool for basic networking.</div><div class='add'>+	 */</div><div class='add'>+	pci_sriov_set_totalvfs(pdev, NGBE_MAX_VFS_DRV_LIMIT);</div><div class='ctx'> 	wx-&gt;driver_name = ngbe_driver_name;</div><div class='ctx'> 	ngbe_set_ethtool_ops(netdev);</div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;ngbe_netdev_ops;</div><div class='hunk'>@@ -607,7 +699,7 @@ static int ngbe_probe(struct pci_dev *pdev,</div><div class='ctx'> 	/* setup the private structure */</div><div class='ctx'> 	err = ngbe_sw_init(wx);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_free_mac_table;</div><div class='add'>+		goto err_pci_release_regions;</div><div class='ctx'> </div><div class='ctx'> 	/* check if flash load is done after hw power up */</div><div class='ctx'> 	err = wx_check_flash_load(wx, NGBE_SPI_ILDR_STATUS_PERST);</div><div class='hunk'>@@ -701,6 +793,7 @@ err_register:</div><div class='ctx'> err_clear_interrupt_scheme:</div><div class='ctx'> 	wx_clear_interrupt_scheme(wx);</div><div class='ctx'> err_free_mac_table:</div><div class='add'>+	kfree(wx-&gt;rss_key);</div><div class='ctx'> 	kfree(wx-&gt;mac_table);</div><div class='ctx'> err_pci_release_regions:</div><div class='ctx'> 	pci_release_selected_regions(pdev,</div><div class='hunk'>@@ -725,6 +818,7 @@ static void ngbe_remove(struct pci_dev *pdev)</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> </div><div class='ctx'> 	netdev = wx-&gt;netdev;</div><div class='add'>+	wx_disable_sriov(wx);</div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='ctx'> 	phylink_destroy(wx-&gt;phylink);</div><div class='ctx'> 	pci_release_selected_regions(pdev,</div><div class='hunk'>@@ -784,6 +878,7 @@ static struct pci_driver ngbe_driver = {</div><div class='ctx'> 	.suspend  = ngbe_suspend,</div><div class='ctx'> 	.resume   = ngbe_resume,</div><div class='ctx'> 	.shutdown = ngbe_shutdown,</div><div class='add'>+	.sriov_configure = wx_pci_sriov_configure,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_pci_driver(ngbe_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c b/drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c<br/>index a5e9b779c44d..c63bb6e6f405 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c</a></div><div class='hunk'>@@ -7,7 +7,9 @@</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../libwx/wx_type.h"</div><div class='add'>+#include "../libwx/wx_ptp.h"</div><div class='ctx'> #include "../libwx/wx_hw.h"</div><div class='add'>+#include "../libwx/wx_sriov.h"</div><div class='ctx'> #include "ngbe_type.h"</div><div class='ctx'> #include "ngbe_mdio.h"</div><div class='ctx'> </div><div class='hunk'>@@ -64,6 +66,13 @@ static void ngbe_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='ctx'> static void ngbe_mac_link_down(struct phylink_config *config,</div><div class='ctx'> 			       unsigned int mode, phy_interface_t interface)</div><div class='ctx'> {</div><div class='add'>+	struct wx *wx = phylink_to_wx(config);</div><div class='add'>+</div><div class='add'>+	wx-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+	if (test_bit(WX_STATE_PTP_RUNNING, wx-&gt;state))</div><div class='add'>+		wx_ptp_reset_cyclecounter(wx);</div><div class='add'>+	/* ping all the active vfs to let them know we are going down */</div><div class='add'>+	wx_ping_all_vfs_with_link_status(wx, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ngbe_mac_link_up(struct phylink_config *config,</div><div class='hunk'>@@ -103,6 +112,13 @@ static void ngbe_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 	wr32(wx, WX_MAC_PKT_FLT, WX_MAC_PKT_FLT_PR);</div><div class='ctx'> 	reg = rd32(wx, WX_MAC_WDG_TIMEOUT);</div><div class='ctx'> 	wr32(wx, WX_MAC_WDG_TIMEOUT, reg);</div><div class='add'>+</div><div class='add'>+	wx-&gt;speed = speed;</div><div class='add'>+	wx-&gt;last_rx_ptp_check = jiffies;</div><div class='add'>+	if (test_bit(WX_STATE_PTP_RUNNING, wx-&gt;state))</div><div class='add'>+		wx_ptp_reset_cyclecounter(wx);</div><div class='add'>+	/* ping all the active vfs to let them know we are going up */</div><div class='add'>+	wx_ping_all_vfs_with_link_status(wx, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_mac_ops ngbe_mac_ops = {</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/ngbe/ngbe_type.h b/drivers/net/ethernet/wangxun/ngbe/ngbe_type.h<br/>index f48ed7fc1805..3b2ca7f47e33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbe/ngbe_type.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/ngbe/ngbe_type.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbe/ngbe_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/ngbe/ngbe_type.h</a></div><div class='hunk'>@@ -70,17 +70,24 @@</div><div class='ctx'> </div><div class='ctx'> /* Extended Interrupt Enable Set */</div><div class='ctx'> #define NGBE_PX_MISC_IEN_DEV_RST		BIT(10)</div><div class='add'>+#define NGBE_PX_MISC_IEN_TIMESYNC		BIT(11)</div><div class='ctx'> #define NGBE_PX_MISC_IEN_ETH_LK			BIT(18)</div><div class='ctx'> #define NGBE_PX_MISC_IEN_INT_ERR		BIT(20)</div><div class='add'>+#define NGBE_PX_MISC_IC_VF_MBOX			BIT(23)</div><div class='ctx'> #define NGBE_PX_MISC_IEN_GPIO			BIT(26)</div><div class='ctx'> #define NGBE_PX_MISC_IEN_MASK ( \</div><div class='ctx'> 				NGBE_PX_MISC_IEN_DEV_RST | \</div><div class='add'>+				NGBE_PX_MISC_IEN_TIMESYNC | \</div><div class='ctx'> 				NGBE_PX_MISC_IEN_ETH_LK | \</div><div class='ctx'> 				NGBE_PX_MISC_IEN_INT_ERR | \</div><div class='add'>+				NGBE_PX_MISC_IC_VF_MBOX | \</div><div class='ctx'> 				NGBE_PX_MISC_IEN_GPIO)</div><div class='ctx'> </div><div class='add'>+/* Extended Interrupt Cause Read */</div><div class='add'>+#define NGBE_PX_MISC_IC_TIMESYNC		BIT(11) /* time sync */</div><div class='add'>+</div><div class='ctx'> #define NGBE_INTR_ALL				0x1FF</div><div class='del'>-#define NGBE_INTR_MISC				BIT(0)</div><div class='add'>+#define NGBE_INTR_MISC(A)			BIT((A)-&gt;msix_entry-&gt;entry)</div><div class='ctx'> </div><div class='ctx'> #define NGBE_PHY_CONFIG(reg_offset)		(0x14000 + ((reg_offset) * 4))</div><div class='ctx'> #define NGBE_CFG_LAN_SPEED			0x14440</div><div class='hunk'>@@ -129,6 +136,7 @@</div><div class='ctx'> #define NGBE_MAX_RXD				8192</div><div class='ctx'> #define NGBE_MIN_RXD				128</div><div class='ctx'> </div><div class='add'>+#define NGBE_MAX_VFS_DRV_LIMIT			7</div><div class='ctx'> extern char ngbe_driver_name[];</div><div class='ctx'> </div><div class='ctx'> void ngbe_down(struct wx *wx);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/ngbevf/Makefile b/drivers/net/ethernet/wangxun/ngbevf/Makefile<br/>new file mode 100644<br/>index 000000000000..11a4f15e2ce3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbevf/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/ngbevf/Makefile</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd.</div><div class='add'>+#</div><div class='add'>+# Makefile for the Wangxun(R) 1GbE virtual functions driver</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_NGBE) += ngbevf.o</div><div class='add'>+</div><div class='add'>+ngbevf-objs := ngbevf_main.o</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/ngbevf/ngbevf_main.c b/drivers/net/ethernet/wangxun/ngbevf/ngbevf_main.c<br/>new file mode 100644<br/>index 000000000000..6ef43adcc425<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbevf/ngbevf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/ngbevf/ngbevf_main.c</a></div><div class='hunk'>@@ -0,0 +1,266 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../libwx/wx_type.h"</div><div class='add'>+#include "../libwx/wx_hw.h"</div><div class='add'>+#include "../libwx/wx_lib.h"</div><div class='add'>+#include "../libwx/wx_mbx.h"</div><div class='add'>+#include "../libwx/wx_vf.h"</div><div class='add'>+#include "../libwx/wx_vf_common.h"</div><div class='add'>+#include "../libwx/wx_ethtool.h"</div><div class='add'>+#include "ngbevf_type.h"</div><div class='add'>+</div><div class='add'>+/* ngbevf_pci_tbl - PCI Device ID Table</div><div class='add'>+ *</div><div class='add'>+ * Wildcard entries (PCI_ANY_ID) should come last</div><div class='add'>+ * Last entry must be all 0s</div><div class='add'>+ *</div><div class='add'>+ * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,</div><div class='add'>+ *   Class, Class Mask, private data (not used) }</div><div class='add'>+ */</div><div class='add'>+static const struct pci_device_id ngbevf_pci_tbl[] = {</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860AL_W), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860A2), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860A2S), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860A4), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860A4S), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860AL2), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860AL2S), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860AL4), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860AL4S), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860NCSI), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860A1), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, NGBEVF_DEV_ID_EM_WX1860AL1), 0},</div><div class='add'>+	/* required last entry */</div><div class='add'>+	{ .device = 0 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops ngbevf_netdev_ops = {</div><div class='add'>+	.ndo_open               = wxvf_open,</div><div class='add'>+	.ndo_stop               = wxvf_close,</div><div class='add'>+	.ndo_start_xmit         = wx_xmit_frame,</div><div class='add'>+	.ndo_validate_addr      = eth_validate_addr,</div><div class='add'>+	.ndo_set_mac_address    = wx_set_mac_vf,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ngbevf_set_num_queues(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	/* Start with base case */</div><div class='add'>+	wx-&gt;num_rx_queues = 1;</div><div class='add'>+	wx-&gt;num_tx_queues = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ngbevf_sw_init(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = wx-&gt;netdev;</div><div class='add'>+	struct pci_dev *pdev = wx-&gt;pdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Initialize pcie info and common capability flags */</div><div class='add'>+	err = wx_sw_init(wx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_wx_sw_init;</div><div class='add'>+</div><div class='add'>+	/* Initialize the mailbox */</div><div class='add'>+	err = wx_init_mbx_params_vf(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_init_mbx_params;</div><div class='add'>+</div><div class='add'>+	/* Initialize the device type */</div><div class='add'>+	wx-&gt;mac.type = wx_mac_em;</div><div class='add'>+	wx-&gt;mac.max_msix_vectors = NGBEVF_MAX_MSIX_VECTORS;</div><div class='add'>+	/* lock to protect mailbox accesses */</div><div class='add'>+	spin_lock_init(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+</div><div class='add'>+	err = wx_reset_hw_vf(wx);</div><div class='add'>+	if (err) {</div><div class='add'>+		wx_err(wx, "PF still in reset state. Is the PF interface up?\n");</div><div class='add'>+		goto err_reset_hw;</div><div class='add'>+	}</div><div class='add'>+	wx_init_hw_vf(wx);</div><div class='add'>+	wx_negotiate_api_vf(wx);</div><div class='add'>+	if (is_zero_ether_addr(wx-&gt;mac.addr))</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev,</div><div class='add'>+			 "MAC address not assigned by administrator.\n");</div><div class='add'>+	eth_hw_addr_set(netdev, wx-&gt;mac.addr);</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(netdev-&gt;dev_addr)) {</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Assigning random MAC address\n");</div><div class='add'>+		eth_hw_addr_random(netdev);</div><div class='add'>+		ether_addr_copy(wx-&gt;mac.addr, netdev-&gt;dev_addr);</div><div class='add'>+		ether_addr_copy(wx-&gt;mac.perm_addr, netdev-&gt;dev_addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx-&gt;mac.max_tx_queues = NGBEVF_MAX_TX_QUEUES;</div><div class='add'>+	wx-&gt;mac.max_rx_queues = NGBEVF_MAX_RX_QUEUES;</div><div class='add'>+	/* Enable dynamic interrupt throttling rates */</div><div class='add'>+	wx-&gt;adaptive_itr = true;</div><div class='add'>+	wx-&gt;rx_itr_setting = 1;</div><div class='add'>+	wx-&gt;tx_itr_setting = 1;</div><div class='add'>+	/* set default ring sizes */</div><div class='add'>+	wx-&gt;tx_ring_count = NGBEVF_DEFAULT_TXD;</div><div class='add'>+	wx-&gt;rx_ring_count = NGBEVF_DEFAULT_RXD;</div><div class='add'>+	/* set default work limits */</div><div class='add'>+	wx-&gt;tx_work_limit = NGBEVF_DEFAULT_TX_WORK;</div><div class='add'>+	wx-&gt;rx_work_limit = NGBEVF_DEFAULT_RX_WORK;</div><div class='add'>+	wx-&gt;set_num_queues = ngbevf_set_num_queues;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_reset_hw:</div><div class='add'>+	kfree(wx-&gt;vfinfo);</div><div class='add'>+err_init_mbx_params:</div><div class='add'>+	kfree(wx-&gt;rss_key);</div><div class='add'>+	kfree(wx-&gt;mac_table);</div><div class='add'>+err_wx_sw_init:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ngbevf_probe - Device Initialization Routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ * @ent: entry in ngbevf_pci_tbl</div><div class='add'>+ *</div><div class='add'>+ * Return: return 0 on success, negative on failure</div><div class='add'>+ *</div><div class='add'>+ * ngbevf_probe initializes an adapter identified by a pci_dev structure.</div><div class='add'>+ * The OS initialization, configuring of the adapter private structure,</div><div class='add'>+ * and a hardware reset occur.</div><div class='add'>+ **/</div><div class='add'>+static int ngbevf_probe(struct pci_dev *pdev,</div><div class='add'>+			const struct pci_device_id __always_unused *ent)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct wx *wx = NULL;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device_mem(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"No usable DMA configuration, aborting\n");</div><div class='add'>+		goto err_pci_disable_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pci_request_selected_regions(pdev,</div><div class='add'>+					   pci_select_bars(pdev, IORESOURCE_MEM),</div><div class='add'>+					   dev_driver_string(&amp;pdev-&gt;dev));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"pci_request_selected_regions failed 0x%x\n", err);</div><div class='add'>+		goto err_pci_disable_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	netdev = devm_alloc_etherdev_mqs(&amp;pdev-&gt;dev,</div><div class='add'>+					 sizeof(struct wx),</div><div class='add'>+					 NGBEVF_MAX_TX_QUEUES,</div><div class='add'>+					 NGBEVF_MAX_RX_QUEUES);</div><div class='add'>+	if (!netdev) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_pci_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	wx = netdev_priv(netdev);</div><div class='add'>+	wx-&gt;netdev = netdev;</div><div class='add'>+	wx-&gt;pdev = pdev;</div><div class='add'>+</div><div class='add'>+	wx-&gt;msg_enable = netif_msg_init(-1, NETIF_MSG_DRV |</div><div class='add'>+					NETIF_MSG_PROBE | NETIF_MSG_LINK);</div><div class='add'>+	wx-&gt;hw_addr = devm_ioremap(&amp;pdev-&gt;dev,</div><div class='add'>+				   pci_resource_start(pdev, 0),</div><div class='add'>+				   pci_resource_len(pdev, 0));</div><div class='add'>+	if (!wx-&gt;hw_addr) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto err_pci_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx-&gt;driver_name = KBUILD_MODNAME;</div><div class='add'>+	wx_set_ethtool_ops_vf(netdev);</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;ngbevf_netdev_ops;</div><div class='add'>+</div><div class='add'>+	/* setup the private structure */</div><div class='add'>+	err = ngbevf_sw_init(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_pci_release_regions;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;features |= NETIF_F_HIGHDMA;</div><div class='add'>+</div><div class='add'>+	eth_hw_addr_set(netdev, wx-&gt;mac.perm_addr);</div><div class='add'>+	ether_addr_copy(netdev-&gt;perm_addr, wx-&gt;mac.addr);</div><div class='add'>+</div><div class='add'>+	wxvf_init_service(wx);</div><div class='add'>+	err = wx_init_interrupt_scheme(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_sw_init;</div><div class='add'>+</div><div class='add'>+	wx_get_fw_version_vf(wx);</div><div class='add'>+	err = register_netdev(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_register;</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, wx);</div><div class='add'>+	netif_tx_stop_all_queues(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_register:</div><div class='add'>+	wx_clear_interrupt_scheme(wx);</div><div class='add'>+err_free_sw_init:</div><div class='add'>+	timer_delete_sync(&amp;wx-&gt;service_timer);</div><div class='add'>+	cancel_work_sync(&amp;wx-&gt;service_task);</div><div class='add'>+	kfree(wx-&gt;vfinfo);</div><div class='add'>+	kfree(wx-&gt;rss_key);</div><div class='add'>+	kfree(wx-&gt;mac_table);</div><div class='add'>+err_pci_release_regions:</div><div class='add'>+	pci_release_selected_regions(pdev,</div><div class='add'>+				     pci_select_bars(pdev, IORESOURCE_MEM));</div><div class='add'>+err_pci_disable_dev:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ngbevf_remove - Device Removal Routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ *</div><div class='add'>+ * ngbevf_remove is called by the PCI subsystem to alert the driver</div><div class='add'>+ * that it should release a PCI device.  The could be caused by a</div><div class='add'>+ * Hot-Plug event, or because the driver is going to be removed from</div><div class='add'>+ * memory.</div><div class='add'>+ **/</div><div class='add'>+static void ngbevf_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	wxvf_remove(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(ngbevf_pm_ops, wxvf_suspend, wxvf_resume);</div><div class='add'>+</div><div class='add'>+static struct pci_driver ngbevf_driver = {</div><div class='add'>+	.name     = KBUILD_MODNAME,</div><div class='add'>+	.id_table = ngbevf_pci_tbl,</div><div class='add'>+	.probe    = ngbevf_probe,</div><div class='add'>+	.remove   = ngbevf_remove,</div><div class='add'>+	.shutdown = wxvf_shutdown,</div><div class='add'>+	/* Power Management Hooks */</div><div class='add'>+	.driver.pm	= pm_sleep_ptr(&amp;ngbevf_pm_ops)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_pci_driver(ngbevf_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, ngbevf_pci_tbl);</div><div class='add'>+MODULE_AUTHOR("Beijing WangXun Technology Co., Ltd, &lt;software@trustnetic.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("WangXun(R) Gigabit PCI Express Network Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/ngbevf/ngbevf_type.h b/drivers/net/ethernet/wangxun/ngbevf/ngbevf_type.h<br/>new file mode 100644<br/>index 000000000000..67e761089e99<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/ngbevf/ngbevf_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/ngbevf/ngbevf_type.h</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#ifndef _NGBEVF_TYPE_H_</div><div class='add'>+#define _NGBEVF_TYPE_H_</div><div class='add'>+</div><div class='add'>+/* Device IDs */</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860AL_W             0x0110</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860A2               0x0111</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860A2S              0x0112</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860A4               0x0113</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860A4S              0x0114</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860AL2              0x0115</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860AL2S             0x0116</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860AL4              0x0117</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860AL4S             0x0118</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860NCSI             0x0119</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860A1               0x011a</div><div class='add'>+#define NGBEVF_DEV_ID_EM_WX1860AL1              0x011b</div><div class='add'>+</div><div class='add'>+#define NGBEVF_MAX_MSIX_VECTORS               1</div><div class='add'>+#define NGBEVF_MAX_RX_QUEUES                  1</div><div class='add'>+#define NGBEVF_MAX_TX_QUEUES                  1</div><div class='add'>+#define NGBEVF_DEFAULT_TXD                    128</div><div class='add'>+#define NGBEVF_DEFAULT_RXD                    128</div><div class='add'>+#define NGBEVF_DEFAULT_TX_WORK                256</div><div class='add'>+#define NGBEVF_DEFAULT_RX_WORK                256</div><div class='add'>+</div><div class='add'>+#endif /* _NGBEVF_TYPE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/Makefile b/drivers/net/ethernet/wangxun/txgbe/Makefile<br/>index f74576fe7062..c757fa95e58e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/Makefile</a></div><div class='hunk'>@@ -11,4 +11,5 @@ txgbe-objs := txgbe_main.o \</div><div class='ctx'>               txgbe_phy.o \</div><div class='ctx'>               txgbe_irq.o \</div><div class='ctx'>               txgbe_fdir.o \</div><div class='del'>-              txgbe_ethtool.o</div><div class='add'>+              txgbe_ethtool.o \</div><div class='add'>+              txgbe_aml.o</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c b/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c<br/>new file mode 100644<br/>index 000000000000..62d7f47d4f8d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c</a></div><div class='hunk'>@@ -0,0 +1,530 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../libwx/wx_type.h"</div><div class='add'>+#include "../libwx/wx_lib.h"</div><div class='add'>+#include "../libwx/wx_ptp.h"</div><div class='add'>+#include "../libwx/wx_hw.h"</div><div class='add'>+#include "../libwx/wx_sriov.h"</div><div class='add'>+#include "txgbe_type.h"</div><div class='add'>+#include "txgbe_aml.h"</div><div class='add'>+#include "txgbe_hw.h"</div><div class='add'>+</div><div class='add'>+void txgbe_gpio_init_aml(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 status, mod_rst;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_aml40)</div><div class='add'>+		mod_rst = TXGBE_GPIOBIT_4;</div><div class='add'>+	else</div><div class='add'>+		mod_rst = TXGBE_GPIOBIT_2;</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_GPIO_INTTYPE_LEVEL, mod_rst);</div><div class='add'>+	wr32(wx, WX_GPIO_INTEN, mod_rst);</div><div class='add'>+</div><div class='add'>+	status = rd32(wx, WX_GPIO_INTSTATUS);</div><div class='add'>+	for (int i = 0; i &lt; 6; i++) {</div><div class='add'>+		if (status &amp; BIT(i))</div><div class='add'>+			wr32(wx, WX_GPIO_EOI, BIT(i));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+irqreturn_t txgbe_gpio_irq_handler_aml(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct txgbe *txgbe = data;</div><div class='add'>+	struct wx *wx = txgbe-&gt;wx;</div><div class='add'>+	u32 status, mod_rst;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_aml40)</div><div class='add'>+		mod_rst = TXGBE_GPIOBIT_4;</div><div class='add'>+	else</div><div class='add'>+		mod_rst = TXGBE_GPIOBIT_2;</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_GPIO_INTMASK, 0xFF);</div><div class='add'>+	status = rd32(wx, WX_GPIO_INTSTATUS);</div><div class='add'>+	if (status &amp; mod_rst) {</div><div class='add'>+		set_bit(WX_FLAG_NEED_MODULE_RESET, wx-&gt;flags);</div><div class='add'>+		wr32(wx, WX_GPIO_EOI, mod_rst);</div><div class='add'>+		wx_service_event_schedule(wx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_GPIO_INTMASK, 0);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int txgbe_test_hostif(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct txgbe_hic_ephy_getlink buffer;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_sp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	buffer.hdr.cmd = FW_PHY_GET_LINK_CMD;</div><div class='add'>+	buffer.hdr.buf_len = sizeof(struct txgbe_hic_ephy_getlink) -</div><div class='add'>+			     sizeof(struct wx_hic_hdr);</div><div class='add'>+	buffer.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED;</div><div class='add'>+</div><div class='add'>+	return wx_host_interface_command(wx, (u32 *)&amp;buffer, sizeof(buffer),</div><div class='add'>+					WX_HI_COMMAND_TIMEOUT, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int txgbe_read_eeprom_hostif(struct wx *wx,</div><div class='add'>+			     struct txgbe_hic_i2c_read *buffer,</div><div class='add'>+			     u32 length, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u32 dword_len, offset, value, i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	buffer-&gt;hdr.cmd = FW_READ_EEPROM_CMD;</div><div class='add'>+	buffer-&gt;hdr.buf_len = sizeof(struct txgbe_hic_i2c_read) -</div><div class='add'>+			      sizeof(struct wx_hic_hdr);</div><div class='add'>+	buffer-&gt;hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED;</div><div class='add'>+</div><div class='add'>+	err = wx_host_interface_command(wx, (u32 *)buffer,</div><div class='add'>+					sizeof(struct txgbe_hic_i2c_read),</div><div class='add'>+					WX_HI_COMMAND_TIMEOUT, false);</div><div class='add'>+	if (err != 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* buffer length offset to read return data */</div><div class='add'>+	offset = sizeof(struct txgbe_hic_i2c_read) &gt;&gt; 2;</div><div class='add'>+	dword_len = round_up(length, 4) &gt;&gt; 2;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dword_len; i++) {</div><div class='add'>+		value = rd32a(wx, WX_FW2SW_MBOX, i + offset);</div><div class='add'>+		le32_to_cpus(&amp;value);</div><div class='add'>+</div><div class='add'>+		memcpy(data, &amp;value, 4);</div><div class='add'>+		data += 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int txgbe_identify_module_hostif(struct wx *wx,</div><div class='add'>+					struct txgbe_hic_get_module_info *buffer)</div><div class='add'>+{</div><div class='add'>+	buffer-&gt;hdr.cmd = FW_GET_MODULE_INFO_CMD;</div><div class='add'>+	buffer-&gt;hdr.buf_len = sizeof(struct txgbe_hic_get_module_info) -</div><div class='add'>+			      sizeof(struct wx_hic_hdr);</div><div class='add'>+	buffer-&gt;hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED;</div><div class='add'>+</div><div class='add'>+	return wx_host_interface_command(wx, (u32 *)buffer,</div><div class='add'>+					 sizeof(struct txgbe_hic_get_module_info),</div><div class='add'>+					 WX_HI_COMMAND_TIMEOUT, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int txgbe_set_phy_link_hostif(struct wx *wx, int speed, int autoneg, int duplex)</div><div class='add'>+{</div><div class='add'>+	struct txgbe_hic_ephy_setlink buffer;</div><div class='add'>+</div><div class='add'>+	buffer.hdr.cmd = FW_PHY_SET_LINK_CMD;</div><div class='add'>+	buffer.hdr.buf_len = sizeof(struct txgbe_hic_ephy_setlink) -</div><div class='add'>+			     sizeof(struct wx_hic_hdr);</div><div class='add'>+	buffer.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_40000:</div><div class='add'>+		buffer.speed = TXGBE_LINK_SPEED_40GB_FULL;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_25000:</div><div class='add'>+		buffer.speed = TXGBE_LINK_SPEED_25GB_FULL;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		buffer.speed = TXGBE_LINK_SPEED_10GB_FULL;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		buffer.speed = TXGBE_LINK_SPEED_UNKNOWN;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buffer.fec_mode = TXGBE_PHY_FEC_AUTO;</div><div class='add'>+	buffer.autoneg = autoneg;</div><div class='add'>+	buffer.duplex = duplex;</div><div class='add'>+</div><div class='add'>+	return wx_host_interface_command(wx, (u32 *)&amp;buffer, sizeof(buffer),</div><div class='add'>+					 WX_HI_COMMAND_TIMEOUT, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void txgbe_get_link_capabilities(struct wx *wx, int *speed,</div><div class='add'>+					int *autoneg, int *duplex)</div><div class='add'>+{</div><div class='add'>+	struct txgbe *txgbe = wx-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (test_bit(PHY_INTERFACE_MODE_XLGMII, txgbe-&gt;link_interfaces))</div><div class='add'>+		*speed = SPEED_40000;</div><div class='add'>+	else if (test_bit(PHY_INTERFACE_MODE_25GBASER, txgbe-&gt;link_interfaces))</div><div class='add'>+		*speed = SPEED_25000;</div><div class='add'>+	else if (test_bit(PHY_INTERFACE_MODE_10GBASER, txgbe-&gt;link_interfaces))</div><div class='add'>+		*speed = SPEED_10000;</div><div class='add'>+	else</div><div class='add'>+		*speed = SPEED_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	*autoneg = phylink_test(txgbe-&gt;advertising, Autoneg);</div><div class='add'>+	*duplex = *speed == SPEED_UNKNOWN ? DUPLEX_HALF : DUPLEX_FULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void txgbe_get_mac_link(struct wx *wx, int *speed)</div><div class='add'>+{</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	status = rd32(wx, TXGBE_CFG_PORT_ST);</div><div class='add'>+	if (!(status &amp; TXGBE_CFG_PORT_ST_LINK_UP))</div><div class='add'>+		*speed = SPEED_UNKNOWN;</div><div class='add'>+	else if (status &amp; TXGBE_CFG_PORT_ST_LINK_AML_40G)</div><div class='add'>+		*speed = SPEED_40000;</div><div class='add'>+	else if (status &amp; TXGBE_CFG_PORT_ST_LINK_AML_25G)</div><div class='add'>+		*speed = SPEED_25000;</div><div class='add'>+	else if (status &amp; TXGBE_CFG_PORT_ST_LINK_AML_10G)</div><div class='add'>+		*speed = SPEED_10000;</div><div class='add'>+	else</div><div class='add'>+		*speed = SPEED_UNKNOWN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int txgbe_set_phy_link(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int speed, autoneg, duplex, err;</div><div class='add'>+</div><div class='add'>+	txgbe_get_link_capabilities(wx, &amp;speed, &amp;autoneg, &amp;duplex);</div><div class='add'>+</div><div class='add'>+	err = txgbe_set_phy_link_hostif(wx, speed, autoneg, duplex);</div><div class='add'>+	if (err) {</div><div class='add'>+		wx_err(wx, "Failed to setup link\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int txgbe_sfp_to_linkmodes(struct wx *wx, struct txgbe_sff_id *id)</div><div class='add'>+{</div><div class='add'>+	__ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = { 0, };</div><div class='add'>+	DECLARE_PHY_INTERFACE_MASK(interfaces);</div><div class='add'>+	struct txgbe *txgbe = wx-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (id-&gt;cable_tech &amp; TXGBE_SFF_DA_PASSIVE_CABLE) {</div><div class='add'>+		txgbe-&gt;link_port = PORT_DA;</div><div class='add'>+		phylink_set(modes, Autoneg);</div><div class='add'>+		if (id-&gt;com_25g_code == TXGBE_SFF_25GBASECR_91FEC ||</div><div class='add'>+		    id-&gt;com_25g_code == TXGBE_SFF_25GBASECR_74FEC ||</div><div class='add'>+		    id-&gt;com_25g_code == TXGBE_SFF_25GBASECR_NOFEC) {</div><div class='add'>+			phylink_set(modes, 25000baseCR_Full);</div><div class='add'>+			phylink_set(modes, 10000baseCR_Full);</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_25GBASER, interfaces);</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);</div><div class='add'>+		} else {</div><div class='add'>+			phylink_set(modes, 10000baseCR_Full);</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);</div><div class='add'>+		}</div><div class='add'>+	} else if (id-&gt;cable_tech &amp; TXGBE_SFF_DA_ACTIVE_CABLE) {</div><div class='add'>+		txgbe-&gt;link_port = PORT_DA;</div><div class='add'>+		phylink_set(modes, Autoneg);</div><div class='add'>+		phylink_set(modes, 25000baseCR_Full);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_25GBASER, interfaces);</div><div class='add'>+	} else {</div><div class='add'>+		if (id-&gt;com_25g_code == TXGBE_SFF_25GBASESR_CAPABLE ||</div><div class='add'>+		    id-&gt;com_25g_code == TXGBE_SFF_25GBASEER_CAPABLE ||</div><div class='add'>+		    id-&gt;com_25g_code == TXGBE_SFF_25GBASELR_CAPABLE) {</div><div class='add'>+			txgbe-&gt;link_port = PORT_FIBRE;</div><div class='add'>+			phylink_set(modes, 25000baseSR_Full);</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_25GBASER, interfaces);</div><div class='add'>+		}</div><div class='add'>+		if (id-&gt;com_10g_code &amp; TXGBE_SFF_10GBASESR_CAPABLE) {</div><div class='add'>+			txgbe-&gt;link_port = PORT_FIBRE;</div><div class='add'>+			phylink_set(modes, 10000baseSR_Full);</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);</div><div class='add'>+		}</div><div class='add'>+		if (id-&gt;com_10g_code &amp; TXGBE_SFF_10GBASELR_CAPABLE) {</div><div class='add'>+			txgbe-&gt;link_port = PORT_FIBRE;</div><div class='add'>+			phylink_set(modes, 10000baseLR_Full);</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_interface_empty(interfaces)) {</div><div class='add'>+		wx_err(wx, "unsupported SFP module\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phylink_set(modes, Pause);</div><div class='add'>+	phylink_set(modes, Asym_Pause);</div><div class='add'>+	phylink_set(modes, FIBRE);</div><div class='add'>+</div><div class='add'>+	if (!linkmode_equal(txgbe-&gt;link_support, modes)) {</div><div class='add'>+		linkmode_copy(txgbe-&gt;link_support, modes);</div><div class='add'>+		phy_interface_and(txgbe-&gt;link_interfaces,</div><div class='add'>+				  wx-&gt;phylink_config.supported_interfaces,</div><div class='add'>+				  interfaces);</div><div class='add'>+		linkmode_copy(txgbe-&gt;advertising, modes);</div><div class='add'>+</div><div class='add'>+		set_bit(WX_FLAG_NEED_LINK_CONFIG, wx-&gt;flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int txgbe_qsfp_to_linkmodes(struct wx *wx, struct txgbe_sff_id *id)</div><div class='add'>+{</div><div class='add'>+	__ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = { 0, };</div><div class='add'>+	DECLARE_PHY_INTERFACE_MASK(interfaces);</div><div class='add'>+	struct txgbe *txgbe = wx-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (id-&gt;transceiver_type &amp; TXGBE_SFF_ETHERNET_40G_CR4) {</div><div class='add'>+		txgbe-&gt;link_port = PORT_DA;</div><div class='add'>+		phylink_set(modes, Autoneg);</div><div class='add'>+		phylink_set(modes, 40000baseCR4_Full);</div><div class='add'>+		phylink_set(modes, 10000baseCR_Full);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_XLGMII, interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);</div><div class='add'>+	}</div><div class='add'>+	if (id-&gt;transceiver_type &amp; TXGBE_SFF_ETHERNET_40G_SR4) {</div><div class='add'>+		txgbe-&gt;link_port = PORT_FIBRE;</div><div class='add'>+		phylink_set(modes, 40000baseSR4_Full);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_XLGMII, interfaces);</div><div class='add'>+	}</div><div class='add'>+	if (id-&gt;transceiver_type &amp; TXGBE_SFF_ETHERNET_40G_LR4) {</div><div class='add'>+		txgbe-&gt;link_port = PORT_FIBRE;</div><div class='add'>+		phylink_set(modes, 40000baseLR4_Full);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_XLGMII, interfaces);</div><div class='add'>+	}</div><div class='add'>+	if (id-&gt;transceiver_type &amp; TXGBE_SFF_ETHERNET_40G_ACTIVE) {</div><div class='add'>+		txgbe-&gt;link_port = PORT_DA;</div><div class='add'>+		phylink_set(modes, Autoneg);</div><div class='add'>+		phylink_set(modes, 40000baseCR4_Full);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_XLGMII, interfaces);</div><div class='add'>+	}</div><div class='add'>+	if (id-&gt;transceiver_type &amp; TXGBE_SFF_ETHERNET_RSRVD) {</div><div class='add'>+		if (id-&gt;sff_opt1 &amp; TXGBE_SFF_ETHERNET_100G_CR4) {</div><div class='add'>+			txgbe-&gt;link_port = PORT_DA;</div><div class='add'>+			phylink_set(modes, Autoneg);</div><div class='add'>+			phylink_set(modes, 40000baseCR4_Full);</div><div class='add'>+			phylink_set(modes, 25000baseCR_Full);</div><div class='add'>+			phylink_set(modes, 10000baseCR_Full);</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_XLGMII, interfaces);</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_25GBASER, interfaces);</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_interface_empty(interfaces)) {</div><div class='add'>+		wx_err(wx, "unsupported QSFP module\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phylink_set(modes, Pause);</div><div class='add'>+	phylink_set(modes, Asym_Pause);</div><div class='add'>+	phylink_set(modes, FIBRE);</div><div class='add'>+</div><div class='add'>+	if (!linkmode_equal(txgbe-&gt;link_support, modes)) {</div><div class='add'>+		linkmode_copy(txgbe-&gt;link_support, modes);</div><div class='add'>+		phy_interface_and(txgbe-&gt;link_interfaces,</div><div class='add'>+				  wx-&gt;phylink_config.supported_interfaces,</div><div class='add'>+				  interfaces);</div><div class='add'>+		linkmode_copy(txgbe-&gt;advertising, modes);</div><div class='add'>+</div><div class='add'>+		set_bit(WX_FLAG_NEED_LINK_CONFIG, wx-&gt;flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int txgbe_identify_module(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct txgbe_hic_get_module_info buffer;</div><div class='add'>+	struct txgbe_sff_id *id;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 mod_abs;</div><div class='add'>+	u32 gpio;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_aml40)</div><div class='add'>+		mod_abs = TXGBE_GPIOBIT_4;</div><div class='add'>+	else</div><div class='add'>+		mod_abs = TXGBE_GPIOBIT_2;</div><div class='add'>+</div><div class='add'>+	gpio = rd32(wx, WX_GPIO_EXT);</div><div class='add'>+	if (gpio &amp; mod_abs)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	err = txgbe_identify_module_hostif(wx, &amp;buffer);</div><div class='add'>+	if (err) {</div><div class='add'>+		wx_err(wx, "Failed to identify module\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	id = &amp;buffer.id;</div><div class='add'>+	if (id-&gt;identifier != TXGBE_SFF_IDENTIFIER_SFP &amp;&amp;</div><div class='add'>+	    id-&gt;identifier != TXGBE_SFF_IDENTIFIER_QSFP &amp;&amp;</div><div class='add'>+	    id-&gt;identifier != TXGBE_SFF_IDENTIFIER_QSFP_PLUS &amp;&amp;</div><div class='add'>+	    id-&gt;identifier != TXGBE_SFF_IDENTIFIER_QSFP28) {</div><div class='add'>+		wx_err(wx, "Invalid module\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (id-&gt;transceiver_type == 0xFF)</div><div class='add'>+		return txgbe_sfp_to_linkmodes(wx, id);</div><div class='add'>+</div><div class='add'>+	return txgbe_qsfp_to_linkmodes(wx, id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void txgbe_setup_link(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct txgbe *txgbe = wx-&gt;priv;</div><div class='add'>+</div><div class='add'>+	phy_interface_zero(txgbe-&gt;link_interfaces);</div><div class='add'>+	linkmode_zero(txgbe-&gt;link_support);</div><div class='add'>+</div><div class='add'>+	set_bit(WX_FLAG_NEED_MODULE_RESET, wx-&gt;flags);</div><div class='add'>+	wx_service_event_schedule(wx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void txgbe_get_link_state(struct phylink_config *config,</div><div class='add'>+				 struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = phylink_to_wx(config);</div><div class='add'>+	int speed;</div><div class='add'>+</div><div class='add'>+	txgbe_get_mac_link(wx, &amp;speed);</div><div class='add'>+	state-&gt;link = speed != SPEED_UNKNOWN;</div><div class='add'>+	state-&gt;speed = speed;</div><div class='add'>+	state-&gt;duplex = state-&gt;link ? DUPLEX_FULL : DUPLEX_UNKNOWN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void txgbe_reconfig_mac(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 wdg, fc;</div><div class='add'>+</div><div class='add'>+	wdg = rd32(wx, WX_MAC_WDG_TIMEOUT);</div><div class='add'>+	fc = rd32(wx, WX_MAC_RX_FLOW_CTRL);</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_MIS_RST, TXGBE_MIS_RST_MAC_RST(wx-&gt;bus.func));</div><div class='add'>+	/* wait for MAC reset complete */</div><div class='add'>+	usleep_range(1000, 1500);</div><div class='add'>+</div><div class='add'>+	wr32m(wx, TXGBE_MAC_MISC_CTL, TXGBE_MAC_MISC_CTL_LINK_STS_MOD,</div><div class='add'>+	      TXGBE_MAC_MISC_CTL_LINK_BOTH);</div><div class='add'>+	wx_reset_mac(wx);</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_MAC_WDG_TIMEOUT, wdg);</div><div class='add'>+	wr32(wx, WX_MAC_RX_FLOW_CTRL, fc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void txgbe_mac_link_up_aml(struct phylink_config *config,</div><div class='add'>+				  struct phy_device *phy,</div><div class='add'>+				  unsigned int mode,</div><div class='add'>+				  phy_interface_t interface,</div><div class='add'>+				  int speed, int duplex,</div><div class='add'>+				  bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = phylink_to_wx(config);</div><div class='add'>+	u32 txcfg;</div><div class='add'>+</div><div class='add'>+	wx_fc_enable(wx, tx_pause, rx_pause);</div><div class='add'>+</div><div class='add'>+	txgbe_reconfig_mac(wx);</div><div class='add'>+	txgbe_enable_sec_tx_path(wx);</div><div class='add'>+</div><div class='add'>+	txcfg = rd32(wx, TXGBE_AML_MAC_TX_CFG);</div><div class='add'>+	txcfg &amp;= ~TXGBE_AML_MAC_TX_CFG_SPEED_MASK;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_40000:</div><div class='add'>+		txcfg |= TXGBE_AML_MAC_TX_CFG_SPEED_40G;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_25000:</div><div class='add'>+		txcfg |= TXGBE_AML_MAC_TX_CFG_SPEED_25G;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		txcfg |= TXGBE_AML_MAC_TX_CFG_SPEED_10G;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wr32m(wx, WX_MAC_RX_CFG, WX_MAC_RX_CFG_RE, WX_MAC_RX_CFG_RE);</div><div class='add'>+	wr32(wx, TXGBE_AML_MAC_TX_CFG, txcfg | TXGBE_AML_MAC_TX_CFG_TE);</div><div class='add'>+</div><div class='add'>+	wx-&gt;speed = speed;</div><div class='add'>+	wx-&gt;last_rx_ptp_check = jiffies;</div><div class='add'>+	if (test_bit(WX_STATE_PTP_RUNNING, wx-&gt;state))</div><div class='add'>+		wx_ptp_reset_cyclecounter(wx);</div><div class='add'>+	/* ping all the active vfs to let them know we are going up */</div><div class='add'>+	wx_ping_all_vfs_with_link_status(wx, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void txgbe_mac_link_down_aml(struct phylink_config *config,</div><div class='add'>+				    unsigned int mode,</div><div class='add'>+				    phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = phylink_to_wx(config);</div><div class='add'>+</div><div class='add'>+	wr32m(wx, TXGBE_AML_MAC_TX_CFG, TXGBE_AML_MAC_TX_CFG_TE, 0);</div><div class='add'>+	wr32m(wx, WX_MAC_RX_CFG, WX_MAC_RX_CFG_RE, 0);</div><div class='add'>+</div><div class='add'>+	wx-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+	if (test_bit(WX_STATE_PTP_RUNNING, wx-&gt;state))</div><div class='add'>+		wx_ptp_reset_cyclecounter(wx);</div><div class='add'>+	/* ping all the active vfs to let them know we are going down */</div><div class='add'>+	wx_ping_all_vfs_with_link_status(wx, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void txgbe_mac_config_aml(struct phylink_config *config, unsigned int mode,</div><div class='add'>+				 const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops txgbe_mac_ops_aml = {</div><div class='add'>+	.mac_config = txgbe_mac_config_aml,</div><div class='add'>+	.mac_link_down = txgbe_mac_link_down_aml,</div><div class='add'>+	.mac_link_up = txgbe_mac_link_up_aml,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int txgbe_phylink_init_aml(struct txgbe *txgbe)</div><div class='add'>+{</div><div class='add'>+	struct phylink_link_state state;</div><div class='add'>+	struct phylink_config *config;</div><div class='add'>+	struct wx *wx = txgbe-&gt;wx;</div><div class='add'>+	phy_interface_t phy_mode;</div><div class='add'>+	struct phylink *phylink;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	config = &amp;wx-&gt;phylink_config;</div><div class='add'>+	config-&gt;dev = &amp;wx-&gt;netdev-&gt;dev;</div><div class='add'>+	config-&gt;type = PHYLINK_NETDEV;</div><div class='add'>+	config-&gt;mac_capabilities = MAC_25000FD | MAC_10000FD |</div><div class='add'>+				   MAC_SYM_PAUSE | MAC_ASYM_PAUSE;</div><div class='add'>+	config-&gt;get_fixed_state = txgbe_get_link_state;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_aml40) {</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_40000FD;</div><div class='add'>+		phy_mode = PHY_INTERFACE_MODE_XLGMII;</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_XLGMII, config-&gt;supported_interfaces);</div><div class='add'>+		state.speed = SPEED_40000;</div><div class='add'>+		state.duplex = DUPLEX_FULL;</div><div class='add'>+	} else {</div><div class='add'>+		phy_mode = PHY_INTERFACE_MODE_25GBASER;</div><div class='add'>+		state.speed = SPEED_25000;</div><div class='add'>+		state.duplex = DUPLEX_FULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_25GBASER, config-&gt;supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_10GBASER, config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	phylink = phylink_create(config, NULL, phy_mode, &amp;txgbe_mac_ops_aml);</div><div class='add'>+	if (IS_ERR(phylink))</div><div class='add'>+		return PTR_ERR(phylink);</div><div class='add'>+</div><div class='add'>+	err = phylink_set_fixed_link(phylink, &amp;state);</div><div class='add'>+	if (err) {</div><div class='add'>+		wx_err(wx, "Failed to set fixed link\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx-&gt;phylink = phylink;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.h b/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.h<br/>new file mode 100644<br/>index 000000000000..4f6df0ee860b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_aml.h</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#ifndef _TXGBE_AML_H_</div><div class='add'>+#define _TXGBE_AML_H_</div><div class='add'>+</div><div class='add'>+void txgbe_gpio_init_aml(struct wx *wx);</div><div class='add'>+irqreturn_t txgbe_gpio_irq_handler_aml(int irq, void *data);</div><div class='add'>+int txgbe_test_hostif(struct wx *wx);</div><div class='add'>+int txgbe_read_eeprom_hostif(struct wx *wx,</div><div class='add'>+			     struct txgbe_hic_i2c_read *buffer,</div><div class='add'>+			     u32 length, u8 *data);</div><div class='add'>+int txgbe_set_phy_link(struct wx *wx);</div><div class='add'>+int txgbe_identify_module(struct wx *wx);</div><div class='add'>+void txgbe_setup_link(struct wx *wx);</div><div class='add'>+int txgbe_phylink_init_aml(struct txgbe *txgbe);</div><div class='add'>+</div><div class='add'>+#endif /* _TXGBE_AML_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c b/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c<br/>index d98314b26c19..f3cb00109529 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c</a></div><div class='hunk'>@@ -10,8 +10,32 @@</div><div class='ctx'> #include "../libwx/wx_lib.h"</div><div class='ctx'> #include "txgbe_type.h"</div><div class='ctx'> #include "txgbe_fdir.h"</div><div class='add'>+#include "txgbe_aml.h"</div><div class='ctx'> #include "txgbe_ethtool.h"</div><div class='ctx'> </div><div class='add'>+int txgbe_get_link_ksettings(struct net_device *netdev,</div><div class='add'>+			     struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+	struct txgbe *txgbe = wx-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = wx_get_link_ksettings(netdev, cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_sp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;base.port = txgbe-&gt;link_port;</div><div class='add'>+	cmd-&gt;base.autoneg = phylink_test(txgbe-&gt;advertising, Autoneg) ?</div><div class='add'>+			    AUTONEG_ENABLE : AUTONEG_DISABLE;</div><div class='add'>+	linkmode_copy(cmd-&gt;link_modes.supported, txgbe-&gt;link_support);</div><div class='add'>+	linkmode_copy(cmd-&gt;link_modes.advertising, txgbe-&gt;advertising);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int txgbe_set_ringparam(struct net_device *netdev,</div><div class='ctx'> 			       struct ethtool_ringparam *ring,</div><div class='ctx'> 			       struct kernel_ethtool_ringparam *kernel_ring,</div><div class='hunk'>@@ -342,12 +366,19 @@ static int txgbe_add_ethtool_fdir_entry(struct txgbe *txgbe,</div><div class='ctx'> 		queue = TXGBE_RDB_FDIR_DROP_QUEUE;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		u32 ring = ethtool_get_flow_spec_ring(fsp-&gt;ring_cookie);</div><div class='add'>+		u8 vf = ethtool_get_flow_spec_ring_vf(fsp-&gt;ring_cookie);</div><div class='ctx'> </div><div class='del'>-		if (ring &gt;= wx-&gt;num_rx_queues)</div><div class='add'>+		if (!vf &amp;&amp; ring &gt;= wx-&gt;num_rx_queues)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		else if (vf &amp;&amp; (vf &gt; wx-&gt;num_vfs ||</div><div class='add'>+				ring &gt;= wx-&gt;num_rx_queues_per_pool))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		/* Map the ring onto the absolute queue index */</div><div class='del'>-		queue = wx-&gt;rx_ring[ring]-&gt;reg_idx;</div><div class='add'>+		if (!vf)</div><div class='add'>+			queue = wx-&gt;rx_ring[ring]-&gt;reg_idx;</div><div class='add'>+		else</div><div class='add'>+			queue = ((vf - 1) * wx-&gt;num_rx_queues_per_pool) + ring;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Don't allow indexes to exist outside of available space */</div><div class='hunk'>@@ -504,13 +535,42 @@ static int txgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+txgbe_get_module_eeprom_by_page(struct net_device *netdev,</div><div class='add'>+				const struct ethtool_module_eeprom *page_data,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(netdev);</div><div class='add'>+	struct txgbe_hic_i2c_read buffer;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_SWFW_RING, wx-&gt;flags))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	buffer.length = cpu_to_be32(page_data-&gt;length);</div><div class='add'>+	buffer.offset = cpu_to_be32(page_data-&gt;offset);</div><div class='add'>+	buffer.page = page_data-&gt;page;</div><div class='add'>+	buffer.bank = page_data-&gt;bank;</div><div class='add'>+	buffer.i2c_address = page_data-&gt;i2c_address;</div><div class='add'>+</div><div class='add'>+	err = txgbe_read_eeprom_hostif(wx, &amp;buffer, page_data-&gt;length,</div><div class='add'>+				       page_data-&gt;data);</div><div class='add'>+	if (err) {</div><div class='add'>+		wx_err(wx, "Failed to read module EEPROM\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return page_data-&gt;length;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops txgbe_ethtool_ops = {</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='del'>-				     ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ,</div><div class='add'>+				     ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ |</div><div class='add'>+				     ETHTOOL_COALESCE_USE_ADAPTIVE,</div><div class='ctx'> 	.get_drvinfo		= wx_get_drvinfo,</div><div class='ctx'> 	.nway_reset		= wx_nway_reset,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='del'>-	.get_link_ksettings	= wx_get_link_ksettings,</div><div class='add'>+	.get_link_ksettings	= txgbe_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings	= wx_set_link_ksettings,</div><div class='ctx'> 	.get_sset_count		= wx_get_sset_count,</div><div class='ctx'> 	.get_strings		= wx_get_strings,</div><div class='hunk'>@@ -527,8 +587,17 @@ static const struct ethtool_ops txgbe_ethtool_ops = {</div><div class='ctx'> 	.set_channels		= txgbe_set_channels,</div><div class='ctx'> 	.get_rxnfc		= txgbe_get_rxnfc,</div><div class='ctx'> 	.set_rxnfc		= txgbe_set_rxnfc,</div><div class='add'>+	.get_rxfh_fields	= wx_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= wx_set_rxfh_fields,</div><div class='add'>+	.get_rxfh_indir_size	= wx_rss_indir_size,</div><div class='add'>+	.get_rxfh_key_size	= wx_get_rxfh_key_size,</div><div class='add'>+	.get_rxfh		= wx_get_rxfh,</div><div class='add'>+	.set_rxfh		= wx_set_rxfh,</div><div class='ctx'> 	.get_msglevel		= wx_get_msglevel,</div><div class='ctx'> 	.set_msglevel		= wx_set_msglevel,</div><div class='add'>+	.get_ts_info		= wx_get_ts_info,</div><div class='add'>+	.get_ts_stats		= wx_get_ptp_stats,</div><div class='add'>+	.get_module_eeprom_by_page	= txgbe_get_module_eeprom_by_page,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void txgbe_set_ethtool_ops(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h b/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h<br/>index ace1b3571012..66dbc8ec1bb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h</a></div><div class='hunk'>@@ -4,6 +4,8 @@</div><div class='ctx'> #ifndef _TXGBE_ETHTOOL_H_</div><div class='ctx'> #define _TXGBE_ETHTOOL_H_</div><div class='ctx'> </div><div class='add'>+int txgbe_get_link_ksettings(struct net_device *netdev,</div><div class='add'>+			     struct ethtool_link_ksettings *cmd);</div><div class='ctx'> void txgbe_set_ethtool_ops(struct net_device *netdev);</div><div class='ctx'> </div><div class='ctx'> #endif /* _TXGBE_ETHTOOL_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c b/drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c<br/>index ef50efbaec0f..a84010828551 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c</a></div><div class='hunk'>@@ -307,6 +307,7 @@ void txgbe_atr(struct wx_ring *ring, struct wx_tx_buffer *first, u8 ptype)</div><div class='ctx'> int txgbe_fdir_set_input_mask(struct wx *wx, union txgbe_atr_input *input_mask)</div><div class='ctx'> {</div><div class='ctx'> 	u32 fdirm = 0, fdirtcpm = 0, flex = 0;</div><div class='add'>+	int index, offset;</div><div class='ctx'> </div><div class='ctx'> 	/* Program the relevant mask registers. If src/dst_port or src/dst_addr</div><div class='ctx'> 	 * are zero, then assume a full mask for that field.  Also assume that</div><div class='hunk'>@@ -352,15 +353,17 @@ int txgbe_fdir_set_input_mask(struct wx *wx, union txgbe_atr_input *input_mask)</div><div class='ctx'> 	/* Now mask VM pool and destination IPv6 - bits 5 and 2 */</div><div class='ctx'> 	wr32(wx, TXGBE_RDB_FDIR_OTHER_MSK, fdirm);</div><div class='ctx'> </div><div class='del'>-	flex = rd32(wx, TXGBE_RDB_FDIR_FLEX_CFG(0));</div><div class='del'>-	flex &amp;= ~TXGBE_RDB_FDIR_FLEX_CFG_FIELD0;</div><div class='add'>+	index = VMDQ_P(0) / 4;</div><div class='add'>+	offset = VMDQ_P(0) % 4;</div><div class='add'>+	flex = rd32(wx, TXGBE_RDB_FDIR_FLEX_CFG(index));</div><div class='add'>+	flex &amp;= ~(TXGBE_RDB_FDIR_FLEX_CFG_FIELD0 &lt;&lt; (offset * 8));</div><div class='ctx'> 	flex |= (TXGBE_RDB_FDIR_FLEX_CFG_BASE_MAC |</div><div class='del'>-		 TXGBE_RDB_FDIR_FLEX_CFG_OFST(0x6));</div><div class='add'>+		 TXGBE_RDB_FDIR_FLEX_CFG_OFST(0x6)) &lt;&lt; (offset * 8);</div><div class='ctx'> </div><div class='ctx'> 	switch ((__force u16)input_mask-&gt;formatted.flex_bytes &amp; 0xFFFF) {</div><div class='ctx'> 	case 0x0000:</div><div class='ctx'> 		/* Mask Flex Bytes */</div><div class='del'>-		flex |= TXGBE_RDB_FDIR_FLEX_CFG_MSK;</div><div class='add'>+		flex |= TXGBE_RDB_FDIR_FLEX_CFG_MSK &lt;&lt; (offset * 8);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 0xFFFF:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -368,7 +371,7 @@ int txgbe_fdir_set_input_mask(struct wx *wx, union txgbe_atr_input *input_mask)</div><div class='ctx'> 		wx_err(wx, "Error on flexible byte mask\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	wr32(wx, TXGBE_RDB_FDIR_FLEX_CFG(0), flex);</div><div class='add'>+	wr32(wx, TXGBE_RDB_FDIR_FLEX_CFG(index), flex);</div><div class='ctx'> </div><div class='ctx'> 	/* store the TCP/UDP port masks, bit reversed from port layout */</div><div class='ctx'> 	fdirtcpm = ntohs(input_mask-&gt;formatted.dst_port);</div><div class='hunk'>@@ -516,14 +519,16 @@ static void txgbe_fdir_enable(struct wx *wx, u32 fdirctrl)</div><div class='ctx'> static void txgbe_init_fdir_signature(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	u32 fdirctrl = TXGBE_FDIR_PBALLOC_64K;</div><div class='add'>+	int index = VMDQ_P(0) / 4;</div><div class='add'>+	int offset = VMDQ_P(0) % 4;</div><div class='ctx'> 	u32 flex = 0;</div><div class='ctx'> </div><div class='del'>-	flex = rd32(wx, TXGBE_RDB_FDIR_FLEX_CFG(0));</div><div class='del'>-	flex &amp;= ~TXGBE_RDB_FDIR_FLEX_CFG_FIELD0;</div><div class='add'>+	flex = rd32(wx, TXGBE_RDB_FDIR_FLEX_CFG(index));</div><div class='add'>+	flex &amp;= ~(TXGBE_RDB_FDIR_FLEX_CFG_FIELD0 &lt;&lt; (offset * 8));</div><div class='ctx'> </div><div class='ctx'> 	flex |= (TXGBE_RDB_FDIR_FLEX_CFG_BASE_MAC |</div><div class='del'>-		 TXGBE_RDB_FDIR_FLEX_CFG_OFST(0x6));</div><div class='del'>-	wr32(wx, TXGBE_RDB_FDIR_FLEX_CFG(0), flex);</div><div class='add'>+		 TXGBE_RDB_FDIR_FLEX_CFG_OFST(0x6)) &lt;&lt; (offset * 8);</div><div class='add'>+	wr32(wx, TXGBE_RDB_FDIR_FLEX_CFG(index), flex);</div><div class='ctx'> </div><div class='ctx'> 	/* Continue setup of fdirctrl register bits:</div><div class='ctx'> 	 *  Move the flexible bytes to use the ethertype - shift 6 words</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c b/drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c<br/>index cd1372da92a9..e551ae0e2069 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c</a></div><div class='hunk'>@@ -99,9 +99,15 @@ static int txgbe_calc_eeprom_checksum(struct wx *wx, u16 *checksum)</div><div class='ctx'> 	}</div><div class='ctx'> 	local_buffer = eeprom_ptrs;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; TXGBE_EEPROM_LAST_WORD; i++)</div><div class='add'>+	for (i = 0; i &lt; TXGBE_EEPROM_LAST_WORD; i++) {</div><div class='add'>+		if (wx-&gt;mac.type == wx_mac_aml) {</div><div class='add'>+			if (i &gt;= TXGBE_EEPROM_I2C_SRART_PTR &amp;&amp;</div><div class='add'>+			    i &lt; TXGBE_EEPROM_I2C_END_PTR)</div><div class='add'>+				local_buffer[i] = 0xffff;</div><div class='add'>+		}</div><div class='ctx'> 		if (i != wx-&gt;eeprom.sw_region_offset + TXGBE_EEPROM_CHECKSUM)</div><div class='ctx'> 			*checksum += local_buffer[i];</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	kvfree(eeprom_ptrs);</div><div class='ctx'> </div><div class='hunk'>@@ -182,7 +188,7 @@ int txgbe_reset_hw(struct wx *wx)</div><div class='ctx'> 	if (status != 0)</div><div class='ctx'> 		return status;</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;media_type != sp_media_copper) {</div><div class='add'>+	if (wx-&gt;media_type != wx_media_copper) {</div><div class='ctx'> 		u32 val;</div><div class='ctx'> </div><div class='ctx'> 		val = WX_MIS_RST_LAN_RST(wx-&gt;bus.func);</div><div class='hunk'>@@ -197,6 +203,12 @@ int txgbe_reset_hw(struct wx *wx)</div><div class='ctx'> </div><div class='ctx'> 	txgbe_reset_misc(wx);</div><div class='ctx'> </div><div class='add'>+	if (wx-&gt;mac.type != wx_mac_sp) {</div><div class='add'>+		wr32(wx, TXGBE_PX_PF_BME, 0x1);</div><div class='add'>+		wr32m(wx, TXGBE_RDM_RSC_CTL, TXGBE_RDM_RSC_CTL_FREE_CTL,</div><div class='add'>+		      TXGBE_RDM_RSC_CTL_FREE_CTL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	wx_clear_hw_cntrs(wx);</div><div class='ctx'> </div><div class='ctx'> 	/* Store the permanent mac address */</div><div class='hunk'>@@ -206,7 +218,7 @@ int txgbe_reset_hw(struct wx *wx)</div><div class='ctx'> 	 * clear the multicast table.  Also reset num_rar_entries to 128,</div><div class='ctx'> 	 * since we modify this value when programming the SAN MAC address.</div><div class='ctx'> 	 */</div><div class='del'>-	wx-&gt;mac.num_rar_entries = TXGBE_SP_RAR_ENTRIES;</div><div class='add'>+	wx-&gt;mac.num_rar_entries = TXGBE_RAR_ENTRIES;</div><div class='ctx'> 	wx_init_rx_addrs(wx);</div><div class='ctx'> </div><div class='ctx'> 	pci_set_master(wx-&gt;pdev);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c b/drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c<br/>index a4cf682dca65..aa14958d439a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c</a></div><div class='hunk'>@@ -6,10 +6,13 @@</div><div class='ctx'> </div><div class='ctx'> #include "../libwx/wx_type.h"</div><div class='ctx'> #include "../libwx/wx_lib.h"</div><div class='add'>+#include "../libwx/wx_ptp.h"</div><div class='ctx'> #include "../libwx/wx_hw.h"</div><div class='add'>+#include "../libwx/wx_sriov.h"</div><div class='ctx'> #include "txgbe_type.h"</div><div class='ctx'> #include "txgbe_phy.h"</div><div class='ctx'> #include "txgbe_irq.h"</div><div class='add'>+#include "txgbe_aml.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * txgbe_irq_enable - Enable default interrupt generation settings</div><div class='hunk'>@@ -18,10 +21,17 @@</div><div class='ctx'>  **/</div><div class='ctx'> void txgbe_irq_enable(struct wx *wx, bool queues)</div><div class='ctx'> {</div><div class='del'>-	wr32(wx, WX_PX_MISC_IEN, TXGBE_PX_MISC_IEN_MASK);</div><div class='add'>+	u32 misc_ien = TXGBE_PX_MISC_IEN_MASK;</div><div class='add'>+</div><div class='add'>+	if (wx-&gt;mac.type != wx_mac_sp) {</div><div class='add'>+		misc_ien |= TXGBE_PX_MISC_GPIO;</div><div class='add'>+		txgbe_gpio_init_aml(wx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wr32(wx, WX_PX_MISC_IEN, misc_ien);</div><div class='ctx'> </div><div class='ctx'> 	/* unmask interrupt */</div><div class='del'>-	wx_intr_enable(wx, TXGBE_INTR_MISC);</div><div class='add'>+	wx_intr_enable(wx, TXGBE_INTR_MISC(wx));</div><div class='ctx'> 	if (queues)</div><div class='ctx'> 		wx_intr_enable(wx, TXGBE_INTR_QALL(wx));</div><div class='ctx'> }</div><div class='hunk'>@@ -68,18 +78,9 @@ free_queue_irqs:</div><div class='ctx'> 		free_irq(wx-&gt;msix_q_entries[vector].vector,</div><div class='ctx'> 			 wx-&gt;q_vector[vector]);</div><div class='ctx'> 	}</div><div class='del'>-	wx_reset_interrupt_capability(wx);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int txgbe_request_gpio_irq(struct txgbe *txgbe)</div><div class='del'>-{</div><div class='del'>-	txgbe-&gt;gpio_irq = irq_find_mapping(txgbe-&gt;misc.domain, TXGBE_IRQ_GPIO);</div><div class='del'>-	return request_threaded_irq(txgbe-&gt;gpio_irq, NULL,</div><div class='del'>-				    txgbe_gpio_irq_handler,</div><div class='del'>-				    IRQF_ONESHOT, "txgbe-gpio-irq", txgbe);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int txgbe_request_link_irq(struct txgbe *txgbe)</div><div class='ctx'> {</div><div class='ctx'> 	txgbe-&gt;link_irq = irq_find_mapping(txgbe-&gt;misc.domain, TXGBE_IRQ_LINK);</div><div class='hunk'>@@ -88,6 +89,14 @@ static int txgbe_request_link_irq(struct txgbe *txgbe)</div><div class='ctx'> 				    IRQF_ONESHOT, "txgbe-link-irq", txgbe);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int txgbe_request_gpio_irq(struct txgbe *txgbe)</div><div class='add'>+{</div><div class='add'>+	txgbe-&gt;gpio_irq = irq_find_mapping(txgbe-&gt;misc.domain, TXGBE_IRQ_GPIO);</div><div class='add'>+	return request_threaded_irq(txgbe-&gt;gpio_irq, NULL,</div><div class='add'>+				    txgbe_gpio_irq_handler_aml,</div><div class='add'>+				    IRQF_ONESHOT, "txgbe-gpio-irq", txgbe);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct irq_chip txgbe_irq_chip = {</div><div class='ctx'> 	.name = "txgbe-misc-irq",</div><div class='ctx'> };</div><div class='hunk'>@@ -117,8 +126,15 @@ static irqreturn_t txgbe_misc_irq_handle(int irq, void *data)</div><div class='ctx'> 	struct wx *wx = txgbe-&gt;wx;</div><div class='ctx'> 	u32 eicr;</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;pdev-&gt;msix_enabled)</div><div class='add'>+	if (wx-&gt;pdev-&gt;msix_enabled) {</div><div class='add'>+		eicr = wx_misc_isb(wx, WX_ISB_MISC);</div><div class='add'>+		txgbe-&gt;eicr = eicr;</div><div class='add'>+		if (eicr &amp; TXGBE_PX_MISC_IC_VF_MBOX) {</div><div class='add'>+			wx_msg_task(txgbe-&gt;wx);</div><div class='add'>+			wx_intr_enable(wx, TXGBE_INTR_MISC(wx));</div><div class='add'>+		}</div><div class='ctx'> 		return IRQ_WAKE_THREAD;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	eicr = wx_misc_isb(wx, WX_ISB_VEC0);</div><div class='ctx'> 	if (!eicr) {</div><div class='hunk'>@@ -137,6 +153,8 @@ static irqreturn_t txgbe_misc_irq_handle(int irq, void *data)</div><div class='ctx'> 	q_vector = wx-&gt;q_vector[0];</div><div class='ctx'> 	napi_schedule_irqoff(&amp;q_vector-&gt;napi);</div><div class='ctx'> </div><div class='add'>+	txgbe-&gt;eicr = wx_misc_isb(wx, WX_ISB_MISC);</div><div class='add'>+</div><div class='ctx'> 	return IRQ_WAKE_THREAD;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -148,20 +166,24 @@ static irqreturn_t txgbe_misc_irq_thread_fn(int irq, void *data)</div><div class='ctx'> 	unsigned int sub_irq;</div><div class='ctx'> 	u32 eicr;</div><div class='ctx'> </div><div class='del'>-	eicr = wx_misc_isb(wx, WX_ISB_MISC);</div><div class='add'>+	eicr = txgbe-&gt;eicr;</div><div class='add'>+	if (eicr &amp; (TXGBE_PX_MISC_ETH_LK | TXGBE_PX_MISC_ETH_LKDN |</div><div class='add'>+		    TXGBE_PX_MISC_ETH_AN)) {</div><div class='add'>+		sub_irq = irq_find_mapping(txgbe-&gt;misc.domain, TXGBE_IRQ_LINK);</div><div class='add'>+		handle_nested_irq(sub_irq);</div><div class='add'>+		nhandled++;</div><div class='add'>+	}</div><div class='ctx'> 	if (eicr &amp; TXGBE_PX_MISC_GPIO) {</div><div class='ctx'> 		sub_irq = irq_find_mapping(txgbe-&gt;misc.domain, TXGBE_IRQ_GPIO);</div><div class='ctx'> 		handle_nested_irq(sub_irq);</div><div class='ctx'> 		nhandled++;</div><div class='ctx'> 	}</div><div class='del'>-	if (eicr &amp; (TXGBE_PX_MISC_ETH_LK | TXGBE_PX_MISC_ETH_LKDN |</div><div class='del'>-		    TXGBE_PX_MISC_ETH_AN)) {</div><div class='del'>-		sub_irq = irq_find_mapping(txgbe-&gt;misc.domain, TXGBE_IRQ_LINK);</div><div class='del'>-		handle_nested_irq(sub_irq);</div><div class='add'>+	if (unlikely(eicr &amp; TXGBE_PX_MISC_IC_TIMESYNC)) {</div><div class='add'>+		wx_ptp_check_pps_event(wx);</div><div class='ctx'> 		nhandled++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	wx_intr_enable(wx, TXGBE_INTR_MISC);</div><div class='add'>+	wx_intr_enable(wx, TXGBE_INTR_MISC(wx));</div><div class='ctx'> 	return (nhandled &gt; 0 ? IRQ_HANDLED : IRQ_NONE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -179,10 +201,13 @@ static void txgbe_del_irq_domain(struct txgbe *txgbe)</div><div class='ctx'> </div><div class='ctx'> void txgbe_free_misc_irq(struct txgbe *txgbe)</div><div class='ctx'> {</div><div class='del'>-	free_irq(txgbe-&gt;gpio_irq, txgbe);</div><div class='add'>+	if (txgbe-&gt;wx-&gt;mac.type != wx_mac_sp)</div><div class='add'>+		free_irq(txgbe-&gt;gpio_irq, txgbe);</div><div class='add'>+</div><div class='ctx'> 	free_irq(txgbe-&gt;link_irq, txgbe);</div><div class='ctx'> 	free_irq(txgbe-&gt;misc.irq, txgbe);</div><div class='ctx'> 	txgbe_del_irq_domain(txgbe);</div><div class='add'>+	txgbe-&gt;wx-&gt;misc_irq_domain = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int txgbe_setup_misc_irq(struct txgbe *txgbe)</div><div class='hunk'>@@ -191,9 +216,9 @@ int txgbe_setup_misc_irq(struct txgbe *txgbe)</div><div class='ctx'> 	struct wx *wx = txgbe-&gt;wx;</div><div class='ctx'> 	int hwirq, err;</div><div class='ctx'> </div><div class='del'>-	txgbe-&gt;misc.nirqs = 2;</div><div class='del'>-	txgbe-&gt;misc.domain = irq_domain_add_simple(NULL, txgbe-&gt;misc.nirqs, 0,</div><div class='del'>-						   &amp;txgbe_misc_irq_domain_ops, txgbe);</div><div class='add'>+	txgbe-&gt;misc.nirqs = TXGBE_IRQ_MAX;</div><div class='add'>+	txgbe-&gt;misc.domain = irq_domain_create_simple(NULL, txgbe-&gt;misc.nirqs, 0,</div><div class='add'>+						      &amp;txgbe_misc_irq_domain_ops, txgbe);</div><div class='ctx'> 	if (!txgbe-&gt;misc.domain)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -216,20 +241,24 @@ int txgbe_setup_misc_irq(struct txgbe *txgbe)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto del_misc_irq;</div><div class='ctx'> </div><div class='del'>-	err = txgbe_request_gpio_irq(txgbe);</div><div class='add'>+	err = txgbe_request_link_irq(txgbe);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto free_msic_irq;</div><div class='ctx'> </div><div class='del'>-	err = txgbe_request_link_irq(txgbe);</div><div class='add'>+	if (wx-&gt;mac.type == wx_mac_sp)</div><div class='add'>+		goto skip_sp_irq;</div><div class='add'>+</div><div class='add'>+	err = txgbe_request_gpio_irq(txgbe);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto free_gpio_irq;</div><div class='add'>+		goto free_link_irq;</div><div class='ctx'> </div><div class='add'>+skip_sp_irq:</div><div class='ctx'> 	wx-&gt;misc_irq_domain = true;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-free_gpio_irq:</div><div class='del'>-	free_irq(txgbe-&gt;gpio_irq, txgbe);</div><div class='add'>+free_link_irq:</div><div class='add'>+	free_irq(txgbe-&gt;link_irq, txgbe);</div><div class='ctx'> free_msic_irq:</div><div class='ctx'> 	free_irq(txgbe-&gt;misc.irq, txgbe);</div><div class='ctx'> del_misc_irq:</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_main.c b/drivers/net/ethernet/wangxun/txgbe/txgbe_main.c<br/>index 93180225a6f1..0de051450a82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_main.c</a></div><div class='hunk'>@@ -8,15 +8,20 @@</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;net/udp_tunnel.h&gt;</div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "../libwx/wx_type.h"</div><div class='ctx'> #include "../libwx/wx_lib.h"</div><div class='add'>+#include "../libwx/wx_ptp.h"</div><div class='ctx'> #include "../libwx/wx_hw.h"</div><div class='add'>+#include "../libwx/wx_mbx.h"</div><div class='add'>+#include "../libwx/wx_sriov.h"</div><div class='ctx'> #include "txgbe_type.h"</div><div class='ctx'> #include "txgbe_hw.h"</div><div class='ctx'> #include "txgbe_phy.h"</div><div class='add'>+#include "txgbe_aml.h"</div><div class='ctx'> #include "txgbe_irq.h"</div><div class='ctx'> #include "txgbe_fdir.h"</div><div class='ctx'> #include "txgbe_ethtool.h"</div><div class='hunk'>@@ -34,6 +39,12 @@ char txgbe_driver_name[] = "txgbe";</div><div class='ctx'> static const struct pci_device_id txgbe_pci_tbl[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_SP1000), 0},</div><div class='ctx'> 	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_WX1820), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5010), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5110), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5025), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5125), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5040), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5140), 0},</div><div class='ctx'> 	/* required last entry */</div><div class='ctx'> 	{ .device = 0 }</div><div class='ctx'> };</div><div class='hunk'>@@ -78,11 +89,62 @@ static int txgbe_enumerate_functions(struct wx *wx)</div><div class='ctx'> 	return physfns;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void txgbe_module_detection_subtask(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_NEED_MODULE_RESET, wx-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* wait for SFF module ready */</div><div class='add'>+	msleep(200);</div><div class='add'>+</div><div class='add'>+	err = txgbe_identify_module(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	clear_bit(WX_FLAG_NEED_MODULE_RESET, wx-&gt;flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void txgbe_link_config_subtask(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WX_FLAG_NEED_LINK_CONFIG, wx-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	err = txgbe_set_phy_link(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	clear_bit(WX_FLAG_NEED_LINK_CONFIG, wx-&gt;flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * txgbe_service_task - manages and runs subtasks</div><div class='add'>+ * @work: pointer to work_struct containing our data</div><div class='add'>+ **/</div><div class='add'>+static void txgbe_service_task(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = container_of(work, struct wx, service_task);</div><div class='add'>+</div><div class='add'>+	txgbe_module_detection_subtask(wx);</div><div class='add'>+	txgbe_link_config_subtask(wx);</div><div class='add'>+</div><div class='add'>+	wx_service_event_complete(wx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void txgbe_init_service(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	timer_setup(&amp;wx-&gt;service_timer, wx_service_timer, 0);</div><div class='add'>+	INIT_WORK(&amp;wx-&gt;service_task, txgbe_service_task);</div><div class='add'>+	clear_bit(WX_STATE_SERVICE_SCHED, wx-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void txgbe_up_complete(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev = wx-&gt;netdev;</div><div class='ctx'> </div><div class='del'>-	txgbe_reinit_gpio_intr(wx);</div><div class='ctx'> 	wx_control_hw(wx, true);</div><div class='ctx'> 	wx_configure_vectors(wx);</div><div class='ctx'> </div><div class='hunk'>@@ -90,7 +152,23 @@ static void txgbe_up_complete(struct wx *wx)</div><div class='ctx'> 	smp_mb__before_atomic();</div><div class='ctx'> 	wx_napi_enable_all(wx);</div><div class='ctx'> </div><div class='del'>-	phylink_start(wx-&gt;phylink);</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_aml40:</div><div class='add'>+		txgbe_setup_link(wx);</div><div class='add'>+		phylink_start(wx-&gt;phylink);</div><div class='add'>+		break;</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+		/* Enable TX laser */</div><div class='add'>+		wr32m(wx, WX_GPIO_DR, TXGBE_GPIOBIT_1, 0);</div><div class='add'>+		txgbe_setup_link(wx);</div><div class='add'>+		phylink_start(wx-&gt;phylink);</div><div class='add'>+		break;</div><div class='add'>+	case wx_mac_sp:</div><div class='add'>+		phylink_start(wx-&gt;phylink);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* clear any pending interrupts, may auto mask */</div><div class='ctx'> 	rd32(wx, WX_PX_IC(0));</div><div class='hunk'>@@ -100,6 +178,13 @@ static void txgbe_up_complete(struct wx *wx)</div><div class='ctx'> </div><div class='ctx'> 	/* enable transmits */</div><div class='ctx'> 	netif_tx_start_all_queues(netdev);</div><div class='add'>+	mod_timer(&amp;wx-&gt;service_timer, jiffies);</div><div class='add'>+</div><div class='add'>+	/* Set PF Reset Done bit so PF/VF Mail Ops can work */</div><div class='add'>+	wr32m(wx, WX_CFG_PORT_CTL, WX_CFG_PORT_CTL_PFRSTD,</div><div class='add'>+	      WX_CFG_PORT_CTL_PFRSTD);</div><div class='add'>+	/* update setting rx tx for all active vfs */</div><div class='add'>+	wx_set_all_vfs(wx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void txgbe_reset(struct wx *wx)</div><div class='hunk'>@@ -117,6 +202,9 @@ static void txgbe_reset(struct wx *wx)</div><div class='ctx'> 	memcpy(old_addr, &amp;wx-&gt;mac_table[0].addr, netdev-&gt;addr_len);</div><div class='ctx'> 	wx_flush_sw_mac_table(wx);</div><div class='ctx'> 	wx_mac_set_default_filter(wx, old_addr);</div><div class='add'>+</div><div class='add'>+	if (test_bit(WX_STATE_PTP_RUNNING, wx-&gt;state))</div><div class='add'>+		wx_ptp_reset(wx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void txgbe_disable_device(struct wx *wx)</div><div class='hunk'>@@ -139,12 +227,24 @@ static void txgbe_disable_device(struct wx *wx)</div><div class='ctx'> 	wx_irq_disable(wx);</div><div class='ctx'> 	wx_napi_disable_all(wx);</div><div class='ctx'> </div><div class='add'>+	timer_delete_sync(&amp;wx-&gt;service_timer);</div><div class='add'>+</div><div class='ctx'> 	if (wx-&gt;bus.func &lt; 2)</div><div class='ctx'> 		wr32m(wx, TXGBE_MIS_PRB_CTL, TXGBE_MIS_PRB_CTL_LAN_UP(wx-&gt;bus.func), 0);</div><div class='ctx'> 	else</div><div class='ctx'> 		wx_err(wx, "%s: invalid bus lan id %d\n",</div><div class='ctx'> 		       __func__, wx-&gt;bus.func);</div><div class='ctx'> </div><div class='add'>+	if (wx-&gt;num_vfs) {</div><div class='add'>+		/* Clear EITR Select mapping */</div><div class='add'>+		wr32(wx, WX_PX_ITRSEL, 0);</div><div class='add'>+		/* Mark all the VFs as inactive */</div><div class='add'>+		for (i = 0; i &lt; wx-&gt;num_vfs; i++)</div><div class='add'>+			wx-&gt;vfinfo[i].clear_to_send = 0;</div><div class='add'>+		/* update setting rx tx for all active vfs */</div><div class='add'>+		wx_set_all_vfs(wx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!(((wx-&gt;subsystem_device_id &amp; WX_NCSI_MASK) == WX_NCSI_SUP) ||</div><div class='ctx'> 	      ((wx-&gt;subsystem_device_id &amp; WX_WOL_MASK) == WX_WOL_SUP))) {</div><div class='ctx'> 		/* disable mac transmiter */</div><div class='hunk'>@@ -168,7 +268,22 @@ void txgbe_down(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	txgbe_disable_device(wx);</div><div class='ctx'> 	txgbe_reset(wx);</div><div class='del'>-	phylink_stop(wx-&gt;phylink);</div><div class='add'>+</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_aml40:</div><div class='add'>+		phylink_stop(wx-&gt;phylink);</div><div class='add'>+		break;</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+		phylink_stop(wx-&gt;phylink);</div><div class='add'>+		/* Disable TX laser */</div><div class='add'>+		wr32m(wx, WX_GPIO_DR, TXGBE_GPIOBIT_1, TXGBE_GPIOBIT_1);</div><div class='add'>+		break;</div><div class='add'>+	case wx_mac_sp:</div><div class='add'>+		phylink_stop(wx-&gt;phylink);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	wx_clean_all_tx_rings(wx);</div><div class='ctx'> 	wx_clean_all_rx_rings(wx);</div><div class='hunk'>@@ -177,6 +292,7 @@ void txgbe_down(struct wx *wx)</div><div class='ctx'> void txgbe_up(struct wx *wx)</div><div class='ctx'> {</div><div class='ctx'> 	wx_configure(wx);</div><div class='add'>+	wx_ptp_init(wx);</div><div class='ctx'> 	txgbe_up_complete(wx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -193,6 +309,16 @@ static void txgbe_init_type_code(struct wx *wx)</div><div class='ctx'> 	case TXGBE_DEV_ID_WX1820:</div><div class='ctx'> 		wx-&gt;mac.type = wx_mac_sp;</div><div class='ctx'> 		break;</div><div class='add'>+	case TXGBE_DEV_ID_AML5010:</div><div class='add'>+	case TXGBE_DEV_ID_AML5110:</div><div class='add'>+	case TXGBE_DEV_ID_AML5025:</div><div class='add'>+	case TXGBE_DEV_ID_AML5125:</div><div class='add'>+		wx-&gt;mac.type = wx_mac_aml;</div><div class='add'>+		break;</div><div class='add'>+	case TXGBE_DEV_ID_AML5040:</div><div class='add'>+	case TXGBE_DEV_ID_AML5140:</div><div class='add'>+		wx-&gt;mac.type = wx_mac_aml40;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		wx-&gt;mac.type = wx_mac_unknown;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -200,25 +326,25 @@ static void txgbe_init_type_code(struct wx *wx)</div><div class='ctx'> </div><div class='ctx'> 	switch (device_type) {</div><div class='ctx'> 	case TXGBE_ID_SFP:</div><div class='del'>-		wx-&gt;media_type = sp_media_fiber;</div><div class='add'>+		wx-&gt;media_type = wx_media_fiber;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TXGBE_ID_XAUI:</div><div class='ctx'> 	case TXGBE_ID_SGMII:</div><div class='del'>-		wx-&gt;media_type = sp_media_copper;</div><div class='add'>+		wx-&gt;media_type = wx_media_copper;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TXGBE_ID_KR_KX_KX4:</div><div class='ctx'> 	case TXGBE_ID_MAC_XAUI:</div><div class='ctx'> 	case TXGBE_ID_MAC_SGMII:</div><div class='del'>-		wx-&gt;media_type = sp_media_backplane;</div><div class='add'>+		wx-&gt;media_type = wx_media_backplane;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TXGBE_ID_SFI_XAUI:</div><div class='ctx'> 		if (wx-&gt;bus.func == 0)</div><div class='del'>-			wx-&gt;media_type = sp_media_fiber;</div><div class='add'>+			wx-&gt;media_type = wx_media_fiber;</div><div class='ctx'> 		else</div><div class='del'>-			wx-&gt;media_type = sp_media_copper;</div><div class='add'>+			wx-&gt;media_type = wx_media_copper;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		wx-&gt;media_type = sp_media_unknown;</div><div class='add'>+		wx-&gt;media_type = wx_media_unknown;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -232,13 +358,13 @@ static int txgbe_sw_init(struct wx *wx)</div><div class='ctx'> 	u16 msix_count = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	wx-&gt;mac.num_rar_entries = TXGBE_SP_RAR_ENTRIES;</div><div class='del'>-	wx-&gt;mac.max_tx_queues = TXGBE_SP_MAX_TX_QUEUES;</div><div class='del'>-	wx-&gt;mac.max_rx_queues = TXGBE_SP_MAX_RX_QUEUES;</div><div class='del'>-	wx-&gt;mac.mcft_size = TXGBE_SP_MC_TBL_SIZE;</div><div class='del'>-	wx-&gt;mac.vft_size = TXGBE_SP_VFT_TBL_SIZE;</div><div class='del'>-	wx-&gt;mac.rx_pb_size = TXGBE_SP_RX_PB_SIZE;</div><div class='del'>-	wx-&gt;mac.tx_pb_size = TXGBE_SP_TDB_PB_SZ;</div><div class='add'>+	wx-&gt;mac.num_rar_entries = TXGBE_RAR_ENTRIES;</div><div class='add'>+	wx-&gt;mac.max_tx_queues = TXGBE_MAX_TXQ;</div><div class='add'>+	wx-&gt;mac.max_rx_queues = TXGBE_MAX_RXQ;</div><div class='add'>+	wx-&gt;mac.mcft_size = TXGBE_MC_TBL_SIZE;</div><div class='add'>+	wx-&gt;mac.vft_size = TXGBE_VFT_TBL_SIZE;</div><div class='add'>+	wx-&gt;mac.rx_pb_size = TXGBE_RX_PB_SIZE;</div><div class='add'>+	wx-&gt;mac.tx_pb_size = TXGBE_TDB_PB_SZ;</div><div class='ctx'> </div><div class='ctx'> 	/* PCI config space info */</div><div class='ctx'> 	err = wx_sw_init(wx);</div><div class='hunk'>@@ -266,19 +392,41 @@ static int txgbe_sw_init(struct wx *wx)</div><div class='ctx'> 	wx-&gt;atr = txgbe_atr;</div><div class='ctx'> 	wx-&gt;configure_fdir = txgbe_configure_fdir;</div><div class='ctx'> </div><div class='add'>+	set_bit(WX_FLAG_RSC_CAPABLE, wx-&gt;flags);</div><div class='add'>+	set_bit(WX_FLAG_RSC_ENABLED, wx-&gt;flags);</div><div class='add'>+	set_bit(WX_FLAG_MULTI_64_FUNC, wx-&gt;flags);</div><div class='add'>+</div><div class='ctx'> 	/* enable itr by default in dynamic mode */</div><div class='add'>+	wx-&gt;adaptive_itr = true;</div><div class='ctx'> 	wx-&gt;rx_itr_setting = 1;</div><div class='ctx'> 	wx-&gt;tx_itr_setting = 1;</div><div class='ctx'> </div><div class='ctx'> 	/* set default ring sizes */</div><div class='ctx'> 	wx-&gt;tx_ring_count = TXGBE_DEFAULT_TXD;</div><div class='ctx'> 	wx-&gt;rx_ring_count = TXGBE_DEFAULT_RXD;</div><div class='add'>+	wx-&gt;mbx.size = WX_VXMAILBOX_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/* set default work limits */</div><div class='ctx'> 	wx-&gt;tx_work_limit = TXGBE_DEFAULT_TX_WORK;</div><div class='ctx'> 	wx-&gt;rx_work_limit = TXGBE_DEFAULT_RX_WORK;</div><div class='ctx'> </div><div class='add'>+	wx-&gt;setup_tc = txgbe_setup_tc;</div><div class='ctx'> 	wx-&gt;do_reset = txgbe_do_reset;</div><div class='add'>+	set_bit(0, &amp;wx-&gt;fwd_bitmask);</div><div class='add'>+</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_sp:</div><div class='add'>+		break;</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+	case wx_mac_aml40:</div><div class='add'>+		set_bit(WX_FLAG_RX_MERGE_ENABLED, wx-&gt;flags);</div><div class='add'>+		set_bit(WX_FLAG_TXHEAD_WB_ENABLED, wx-&gt;flags);</div><div class='add'>+		set_bit(WX_FLAG_SWFW_RING, wx-&gt;flags);</div><div class='add'>+		wx-&gt;swfw_index = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -309,10 +457,14 @@ static int txgbe_open(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	wx_configure(wx);</div><div class='ctx'> </div><div class='del'>-	err = txgbe_request_queue_irqs(wx);</div><div class='add'>+	err = txgbe_setup_misc_irq(wx-&gt;priv);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_resources;</div><div class='ctx'> </div><div class='add'>+	err = txgbe_request_queue_irqs(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_misc_irq;</div><div class='add'>+</div><div class='ctx'> 	/* Notify the stack of the actual queue counts. */</div><div class='ctx'> 	err = netif_set_real_num_tx_queues(netdev, wx-&gt;num_tx_queues);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -322,12 +474,17 @@ static int txgbe_open(struct net_device *netdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_free_irq;</div><div class='ctx'> </div><div class='add'>+	wx_ptp_init(wx);</div><div class='add'>+</div><div class='ctx'> 	txgbe_up_complete(wx);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_free_irq:</div><div class='ctx'> 	wx_free_irq(wx);</div><div class='add'>+err_free_misc_irq:</div><div class='add'>+	txgbe_free_misc_irq(wx-&gt;priv);</div><div class='add'>+	wx_reset_interrupt_capability(wx);</div><div class='ctx'> err_free_resources:</div><div class='ctx'> 	wx_free_resources(wx);</div><div class='ctx'> err_reset:</div><div class='hunk'>@@ -345,6 +502,7 @@ err_reset:</div><div class='ctx'>  */</div><div class='ctx'> static void txgbe_close_suspend(struct wx *wx)</div><div class='ctx'> {</div><div class='add'>+	wx_ptp_suspend(wx);</div><div class='ctx'> 	txgbe_disable_device(wx);</div><div class='ctx'> 	wx_free_resources(wx);</div><div class='ctx'> }</div><div class='hunk'>@@ -364,8 +522,10 @@ static int txgbe_close(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct wx *wx = netdev_priv(netdev);</div><div class='ctx'> </div><div class='add'>+	wx_ptp_stop(wx);</div><div class='ctx'> 	txgbe_down(wx);</div><div class='ctx'> 	wx_free_irq(wx);</div><div class='add'>+	txgbe_free_misc_irq(wx-&gt;priv);</div><div class='ctx'> 	wx_free_resources(wx);</div><div class='ctx'> 	txgbe_fdir_filter_exit(wx);</div><div class='ctx'> 	wx_control_hw(wx, false);</div><div class='hunk'>@@ -411,7 +571,6 @@ static void txgbe_shutdown(struct pci_dev *pdev)</div><div class='ctx'> int txgbe_setup_tc(struct net_device *dev, u8 tc)</div><div class='ctx'> {</div><div class='ctx'> 	struct wx *wx = netdev_priv(dev);</div><div class='del'>-	struct txgbe *txgbe = wx-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	/* Hardware has to reinitialize queues and interrupts to</div><div class='ctx'> 	 * match packet buffer alignment. Unfortunately, the</div><div class='hunk'>@@ -422,7 +581,6 @@ int txgbe_setup_tc(struct net_device *dev, u8 tc)</div><div class='ctx'> 	else</div><div class='ctx'> 		txgbe_reset(wx);</div><div class='ctx'> </div><div class='del'>-	txgbe_free_misc_irq(txgbe);</div><div class='ctx'> 	wx_clear_interrupt_scheme(wx);</div><div class='ctx'> </div><div class='ctx'> 	if (tc)</div><div class='hunk'>@@ -431,7 +589,6 @@ int txgbe_setup_tc(struct net_device *dev, u8 tc)</div><div class='ctx'> 		netdev_reset_tc(dev);</div><div class='ctx'> </div><div class='ctx'> 	wx_init_interrupt_scheme(wx);</div><div class='del'>-	txgbe_setup_misc_irq(txgbe);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev))</div><div class='ctx'> 		txgbe_open(dev);</div><div class='hunk'>@@ -467,6 +624,39 @@ void txgbe_do_reset(struct net_device *netdev)</div><div class='ctx'> 		txgbe_reset(wx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int txgbe_udp_tunnel_sync(struct net_device *dev, unsigned int table)</div><div class='add'>+{</div><div class='add'>+	struct wx *wx = netdev_priv(dev);</div><div class='add'>+	struct udp_tunnel_info ti;</div><div class='add'>+</div><div class='add'>+	udp_tunnel_nic_get_port(dev, table, 0, &amp;ti);</div><div class='add'>+	switch (ti.type) {</div><div class='add'>+	case UDP_TUNNEL_TYPE_VXLAN:</div><div class='add'>+		wr32(wx, TXGBE_CFG_VXLAN, ntohs(ti.port));</div><div class='add'>+		break;</div><div class='add'>+	case UDP_TUNNEL_TYPE_VXLAN_GPE:</div><div class='add'>+		wr32(wx, TXGBE_CFG_VXLAN_GPE, ntohs(ti.port));</div><div class='add'>+		break;</div><div class='add'>+	case UDP_TUNNEL_TYPE_GENEVE:</div><div class='add'>+		wr32(wx, TXGBE_CFG_GENEVE, ntohs(ti.port));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct udp_tunnel_nic_info txgbe_udp_tunnels = {</div><div class='add'>+	.sync_table	= txgbe_udp_tunnel_sync,</div><div class='add'>+	.flags		= UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='add'>+	.tables		= {</div><div class='add'>+		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },</div><div class='add'>+		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN_GPE, },</div><div class='add'>+		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops txgbe_netdev_ops = {</div><div class='ctx'> 	.ndo_open               = txgbe_open,</div><div class='ctx'> 	.ndo_stop               = txgbe_close,</div><div class='hunk'>@@ -475,11 +665,14 @@ static const struct net_device_ops txgbe_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode        = wx_set_rx_mode,</div><div class='ctx'> 	.ndo_set_features       = wx_set_features,</div><div class='ctx'> 	.ndo_fix_features       = wx_fix_features,</div><div class='add'>+	.ndo_features_check     = wx_features_check,</div><div class='ctx'> 	.ndo_validate_addr      = eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address    = wx_set_mac,</div><div class='ctx'> 	.ndo_get_stats64        = wx_get_stats64,</div><div class='ctx'> 	.ndo_vlan_rx_add_vid    = wx_vlan_rx_add_vid,</div><div class='ctx'> 	.ndo_vlan_rx_kill_vid   = wx_vlan_rx_kill_vid,</div><div class='add'>+	.ndo_hwtstamp_set       = wx_hwtstamp_set,</div><div class='add'>+	.ndo_hwtstamp_get       = wx_hwtstamp_get,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -553,14 +746,19 @@ static int txgbe_probe(struct pci_dev *pdev,</div><div class='ctx'> 		goto err_pci_release_regions;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* The sapphire supports up to 63 VFs per pf, but physical</div><div class='add'>+	 * function also need one pool for basic networking.</div><div class='add'>+	 */</div><div class='add'>+	pci_sriov_set_totalvfs(pdev, TXGBE_MAX_VFS_DRV_LIMIT);</div><div class='ctx'> 	wx-&gt;driver_name = txgbe_driver_name;</div><div class='ctx'> 	txgbe_set_ethtool_ops(netdev);</div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;txgbe_netdev_ops;</div><div class='add'>+	netdev-&gt;udp_tunnel_nic_info = &amp;txgbe_udp_tunnels;</div><div class='ctx'> </div><div class='ctx'> 	/* setup the private structure */</div><div class='ctx'> 	err = txgbe_sw_init(wx);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_free_mac_table;</div><div class='add'>+		goto err_pci_release_regions;</div><div class='ctx'> </div><div class='ctx'> 	/* check if flash load is done after hw power up */</div><div class='ctx'> 	err = wx_check_flash_load(wx, TXGBE_SPI_ILDR_STATUS_PERST);</div><div class='hunk'>@@ -601,6 +799,9 @@ static int txgbe_probe(struct pci_dev *pdev,</div><div class='ctx'> 	netdev-&gt;features |= NETIF_F_HIGHDMA;</div><div class='ctx'> 	netdev-&gt;hw_features |= NETIF_F_GRO;</div><div class='ctx'> 	netdev-&gt;features |= NETIF_F_GRO;</div><div class='add'>+	netdev-&gt;hw_features |= NETIF_F_LRO;</div><div class='add'>+	netdev-&gt;features |= NETIF_F_LRO;</div><div class='add'>+	netdev-&gt;features |= NETIF_F_RX_UDP_TUNNEL_PORT;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='ctx'> 	netdev-&gt;priv_flags |= IFF_SUPP_NOFCS;</div><div class='hunk'>@@ -622,9 +823,11 @@ static int txgbe_probe(struct pci_dev *pdev,</div><div class='ctx'> 	eth_hw_addr_set(netdev, wx-&gt;mac.perm_addr);</div><div class='ctx'> 	wx_mac_set_default_filter(wx, wx-&gt;mac.perm_addr);</div><div class='ctx'> </div><div class='add'>+	txgbe_init_service(wx);</div><div class='add'>+</div><div class='ctx'> 	err = wx_init_interrupt_scheme(wx);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_free_mac_table;</div><div class='add'>+		goto err_cancel_service;</div><div class='ctx'> </div><div class='ctx'> 	/* Save off EEPROM version number and Option Rom version which</div><div class='ctx'> 	 * together make a unique identify for the eeprom</div><div class='hunk'>@@ -667,6 +870,13 @@ static int txgbe_probe(struct pci_dev *pdev,</div><div class='ctx'> 	if (etrack_id &lt; 0x20010)</div><div class='ctx'> 		dev_warn(&amp;pdev-&gt;dev, "Please upgrade the firmware to 0x20010 or above.\n");</div><div class='ctx'> </div><div class='add'>+	err = txgbe_test_hostif(wx);</div><div class='add'>+	if (err != 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Mismatched Firmware version\n");</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto err_release_hw;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	txgbe = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*txgbe), GFP_KERNEL);</div><div class='ctx'> 	if (!txgbe) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -678,13 +888,9 @@ static int txgbe_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	txgbe_init_fdir(txgbe);</div><div class='ctx'> </div><div class='del'>-	err = txgbe_setup_misc_irq(txgbe);</div><div class='del'>-	if (err)</div><div class='del'>-		goto err_release_hw;</div><div class='del'>-</div><div class='ctx'> 	err = txgbe_init_phy(txgbe);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto err_free_misc_irq;</div><div class='add'>+		goto err_release_hw;</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdev(netdev);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -712,12 +918,14 @@ static int txgbe_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> err_remove_phy:</div><div class='ctx'> 	txgbe_remove_phy(txgbe);</div><div class='del'>-err_free_misc_irq:</div><div class='del'>-	txgbe_free_misc_irq(txgbe);</div><div class='ctx'> err_release_hw:</div><div class='ctx'> 	wx_clear_interrupt_scheme(wx);</div><div class='ctx'> 	wx_control_hw(wx, false);</div><div class='add'>+err_cancel_service:</div><div class='add'>+	timer_delete_sync(&amp;wx-&gt;service_timer);</div><div class='add'>+	cancel_work_sync(&amp;wx-&gt;service_task);</div><div class='ctx'> err_free_mac_table:</div><div class='add'>+	kfree(wx-&gt;rss_key);</div><div class='ctx'> 	kfree(wx-&gt;mac_table);</div><div class='ctx'> err_pci_release_regions:</div><div class='ctx'> 	pci_release_selected_regions(pdev,</div><div class='hunk'>@@ -742,11 +950,13 @@ static void txgbe_remove(struct pci_dev *pdev)</div><div class='ctx'> 	struct txgbe *txgbe = wx-&gt;priv;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> </div><div class='add'>+	cancel_work_sync(&amp;wx-&gt;service_task);</div><div class='add'>+</div><div class='ctx'> 	netdev = wx-&gt;netdev;</div><div class='add'>+	wx_disable_sriov(wx);</div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	txgbe_remove_phy(txgbe);</div><div class='del'>-	txgbe_free_misc_irq(txgbe);</div><div class='ctx'> 	wx_free_isb_resources(wx);</div><div class='ctx'> </div><div class='ctx'> 	pci_release_selected_regions(pdev,</div><div class='hunk'>@@ -765,11 +975,12 @@ static struct pci_driver txgbe_driver = {</div><div class='ctx'> 	.probe    = txgbe_probe,</div><div class='ctx'> 	.remove   = txgbe_remove,</div><div class='ctx'> 	.shutdown = txgbe_shutdown,</div><div class='add'>+	.sriov_configure = wx_pci_sriov_configure,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_pci_driver(txgbe_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DEVICE_TABLE(pci, txgbe_pci_tbl);</div><div class='ctx'> MODULE_AUTHOR("Beijing WangXun Technology Co., Ltd, &lt;software@trustnetic.com&gt;");</div><div class='del'>-MODULE_DESCRIPTION("WangXun(R) 10 Gigabit PCI Express Network Driver");</div><div class='add'>+MODULE_DESCRIPTION("WangXun(R) 10/25/40 Gigabit PCI Express Network Driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c b/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c<br/>index a0e4920b4761..8ea7aa07ae4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c</a></div><div class='hunk'>@@ -15,8 +15,12 @@</div><div class='ctx'> </div><div class='ctx'> #include "../libwx/wx_type.h"</div><div class='ctx'> #include "../libwx/wx_lib.h"</div><div class='add'>+#include "../libwx/wx_ptp.h"</div><div class='add'>+#include "../libwx/wx_sriov.h"</div><div class='add'>+#include "../libwx/wx_mbx.h"</div><div class='ctx'> #include "../libwx/wx_hw.h"</div><div class='ctx'> #include "txgbe_type.h"</div><div class='add'>+#include "txgbe_aml.h"</div><div class='ctx'> #include "txgbe_phy.h"</div><div class='ctx'> #include "txgbe_hw.h"</div><div class='ctx'> </div><div class='hunk'>@@ -162,7 +166,7 @@ static struct phylink_pcs *txgbe_phylink_mac_select(struct phylink_config *confi</div><div class='ctx'> 	struct wx *wx = phylink_to_wx(config);</div><div class='ctx'> 	struct txgbe *txgbe = wx-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	if (interface == PHY_INTERFACE_MODE_10GBASER)</div><div class='add'>+	if (wx-&gt;media_type != wx_media_copper)</div><div class='ctx'> 		return txgbe-&gt;pcs;</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='hunk'>@@ -179,6 +183,12 @@ static void txgbe_mac_link_down(struct phylink_config *config,</div><div class='ctx'> 	struct wx *wx = phylink_to_wx(config);</div><div class='ctx'> </div><div class='ctx'> 	wr32m(wx, WX_MAC_TX_CFG, WX_MAC_TX_CFG_TE, 0);</div><div class='add'>+</div><div class='add'>+	wx-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+	if (test_bit(WX_STATE_PTP_RUNNING, wx-&gt;state))</div><div class='add'>+		wx_ptp_reset_cyclecounter(wx);</div><div class='add'>+	/* ping all the active vfs to let them know we are going down */</div><div class='add'>+	wx_ping_all_vfs_with_link_status(wx, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void txgbe_mac_link_up(struct phylink_config *config,</div><div class='hunk'>@@ -215,6 +225,13 @@ static void txgbe_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 	wr32(wx, WX_MAC_PKT_FLT, WX_MAC_PKT_FLT_PR);</div><div class='ctx'> 	wdg = rd32(wx, WX_MAC_WDG_TIMEOUT);</div><div class='ctx'> 	wr32(wx, WX_MAC_WDG_TIMEOUT, wdg);</div><div class='add'>+</div><div class='add'>+	wx-&gt;speed = speed;</div><div class='add'>+	wx-&gt;last_rx_ptp_check = jiffies;</div><div class='add'>+	if (test_bit(WX_STATE_PTP_RUNNING, wx-&gt;state))</div><div class='add'>+		wx_ptp_reset_cyclecounter(wx);</div><div class='add'>+	/* ping all the active vfs to let them know we are going up */</div><div class='add'>+	wx_ping_all_vfs_with_link_status(wx, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int txgbe_mac_prepare(struct phylink_config *config, unsigned int mode,</div><div class='hunk'>@@ -262,7 +279,7 @@ static int txgbe_phylink_init(struct txgbe *txgbe)</div><div class='ctx'> 	config-&gt;mac_capabilities = MAC_10000FD | MAC_1000FD | MAC_100FD |</div><div class='ctx'> 				   MAC_SYM_PAUSE | MAC_ASYM_PAUSE;</div><div class='ctx'> </div><div class='del'>-	if (wx-&gt;media_type == sp_media_copper) {</div><div class='add'>+	if (wx-&gt;media_type == wx_media_copper) {</div><div class='ctx'> 		phy_mode = PHY_INTERFACE_MODE_XAUI;</div><div class='ctx'> 		__set_bit(PHY_INTERFACE_MODE_XAUI, config-&gt;supported_interfaces);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -302,7 +319,10 @@ irqreturn_t txgbe_link_irq_handler(int irq, void *data)</div><div class='ctx'> 	status = rd32(wx, TXGBE_CFG_PORT_ST);</div><div class='ctx'> 	up = !!(status &amp; TXGBE_CFG_PORT_ST_LINK_UP);</div><div class='ctx'> </div><div class='del'>-	phylink_pcs_change(txgbe-&gt;pcs, up);</div><div class='add'>+	if (txgbe-&gt;pcs)</div><div class='add'>+		phylink_pcs_change(txgbe-&gt;pcs, up);</div><div class='add'>+	else</div><div class='add'>+		phylink_mac_change(wx-&gt;phylink, up);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -358,169 +378,8 @@ static int txgbe_gpio_direction_out(struct gpio_chip *chip, unsigned int offset,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void txgbe_gpio_irq_ack(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='del'>-	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='del'>-	struct wx *wx = gpiochip_get_data(gc);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	raw_spin_lock_irqsave(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-	wr32(wx, WX_GPIO_EOI, BIT(hwirq));</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void txgbe_gpio_irq_mask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='del'>-	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='del'>-	struct wx *wx = gpiochip_get_data(gc);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	gpiochip_disable_irq(gc, hwirq);</div><div class='del'>-</div><div class='del'>-	raw_spin_lock_irqsave(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-	wr32m(wx, WX_GPIO_INTMASK, BIT(hwirq), BIT(hwirq));</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void txgbe_gpio_irq_unmask(struct irq_data *d)</div><div class='del'>-{</div><div class='del'>-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='del'>-	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='del'>-	struct wx *wx = gpiochip_get_data(gc);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	gpiochip_enable_irq(gc, hwirq);</div><div class='del'>-</div><div class='del'>-	raw_spin_lock_irqsave(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-	wr32m(wx, WX_GPIO_INTMASK, BIT(hwirq), 0);</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void txgbe_toggle_trigger(struct gpio_chip *gc, unsigned int offset)</div><div class='del'>-{</div><div class='del'>-	struct wx *wx = gpiochip_get_data(gc);</div><div class='del'>-	u32 pol, val;</div><div class='del'>-</div><div class='del'>-	pol = rd32(wx, WX_GPIO_POLARITY);</div><div class='del'>-	val = rd32(wx, WX_GPIO_EXT);</div><div class='del'>-</div><div class='del'>-	if (val &amp; BIT(offset))</div><div class='del'>-		pol &amp;= ~BIT(offset);</div><div class='del'>-	else</div><div class='del'>-		pol |= BIT(offset);</div><div class='del'>-</div><div class='del'>-	wr32(wx, WX_GPIO_POLARITY, pol);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int txgbe_gpio_set_type(struct irq_data *d, unsigned int type)</div><div class='del'>-{</div><div class='del'>-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='del'>-	irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='del'>-	struct wx *wx = gpiochip_get_data(gc);</div><div class='del'>-	u32 level, polarity, mask;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	mask = BIT(hwirq);</div><div class='del'>-</div><div class='del'>-	if (type &amp; IRQ_TYPE_LEVEL_MASK) {</div><div class='del'>-		level = 0;</div><div class='del'>-		irq_set_handler_locked(d, handle_level_irq);</div><div class='del'>-	} else {</div><div class='del'>-		level = mask;</div><div class='del'>-		irq_set_handler_locked(d, handle_edge_irq);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH)</div><div class='del'>-		polarity = mask;</div><div class='del'>-	else</div><div class='del'>-		polarity = 0;</div><div class='del'>-</div><div class='del'>-	raw_spin_lock_irqsave(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-</div><div class='del'>-	wr32m(wx, WX_GPIO_INTEN, mask, mask);</div><div class='del'>-	wr32m(wx, WX_GPIO_INTTYPE_LEVEL, mask, level);</div><div class='del'>-	if (type == IRQ_TYPE_EDGE_BOTH)</div><div class='del'>-		txgbe_toggle_trigger(gc, hwirq);</div><div class='del'>-	else</div><div class='del'>-		wr32m(wx, WX_GPIO_POLARITY, mask, polarity);</div><div class='del'>-</div><div class='del'>-	raw_spin_unlock_irqrestore(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct irq_chip txgbe_gpio_irq_chip = {</div><div class='del'>-	.name = "txgbe-gpio-irq",</div><div class='del'>-	.irq_ack = txgbe_gpio_irq_ack,</div><div class='del'>-	.irq_mask = txgbe_gpio_irq_mask,</div><div class='del'>-	.irq_unmask = txgbe_gpio_irq_unmask,</div><div class='del'>-	.irq_set_type = txgbe_gpio_set_type,</div><div class='del'>-	.flags = IRQCHIP_IMMUTABLE,</div><div class='del'>-	GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-irqreturn_t txgbe_gpio_irq_handler(int irq, void *data)</div><div class='del'>-{</div><div class='del'>-	struct txgbe *txgbe = data;</div><div class='del'>-	struct wx *wx = txgbe-&gt;wx;</div><div class='del'>-	irq_hw_number_t hwirq;</div><div class='del'>-	unsigned long gpioirq;</div><div class='del'>-	struct gpio_chip *gc;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	gpioirq = rd32(wx, WX_GPIO_INTSTATUS);</div><div class='del'>-</div><div class='del'>-	gc = txgbe-&gt;gpio;</div><div class='del'>-	for_each_set_bit(hwirq, &amp;gpioirq, gc-&gt;ngpio) {</div><div class='del'>-		int gpio = irq_find_mapping(gc-&gt;irq.domain, hwirq);</div><div class='del'>-		struct irq_data *d = irq_get_irq_data(gpio);</div><div class='del'>-		u32 irq_type = irq_get_trigger_type(gpio);</div><div class='del'>-</div><div class='del'>-		txgbe_gpio_irq_ack(d);</div><div class='del'>-		handle_nested_irq(gpio);</div><div class='del'>-</div><div class='del'>-		if ((irq_type &amp; IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {</div><div class='del'>-			raw_spin_lock_irqsave(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-			txgbe_toggle_trigger(gc, hwirq);</div><div class='del'>-			raw_spin_unlock_irqrestore(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void txgbe_reinit_gpio_intr(struct wx *wx)</div><div class='del'>-{</div><div class='del'>-	struct txgbe *txgbe = wx-&gt;priv;</div><div class='del'>-	irq_hw_number_t hwirq;</div><div class='del'>-	unsigned long gpioirq;</div><div class='del'>-	struct gpio_chip *gc;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/* for gpio interrupt pending before irq enable */</div><div class='del'>-	gpioirq = rd32(wx, WX_GPIO_INTSTATUS);</div><div class='del'>-</div><div class='del'>-	gc = txgbe-&gt;gpio;</div><div class='del'>-	for_each_set_bit(hwirq, &amp;gpioirq, gc-&gt;ngpio) {</div><div class='del'>-		int gpio = irq_find_mapping(gc-&gt;irq.domain, hwirq);</div><div class='del'>-		struct irq_data *d = irq_get_irq_data(gpio);</div><div class='del'>-		u32 irq_type = irq_get_trigger_type(gpio);</div><div class='del'>-</div><div class='del'>-		txgbe_gpio_irq_ack(d);</div><div class='del'>-</div><div class='del'>-		if ((irq_type &amp; IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {</div><div class='del'>-			raw_spin_lock_irqsave(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-			txgbe_toggle_trigger(gc, hwirq);</div><div class='del'>-			raw_spin_unlock_irqrestore(&amp;wx-&gt;gpio_lock, flags);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int txgbe_gpio_init(struct txgbe *txgbe)</div><div class='ctx'> {</div><div class='del'>-	struct gpio_irq_chip *girq;</div><div class='ctx'> 	struct gpio_chip *gc;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct wx *wx;</div><div class='hunk'>@@ -550,11 +409,6 @@ static int txgbe_gpio_init(struct txgbe *txgbe)</div><div class='ctx'> 	gc-&gt;direction_input = txgbe_gpio_direction_in;</div><div class='ctx'> 	gc-&gt;direction_output = txgbe_gpio_direction_out;</div><div class='ctx'> </div><div class='del'>-	girq = &amp;gc-&gt;irq;</div><div class='del'>-	gpio_irq_chip_set_chip(girq, &amp;txgbe_gpio_irq_chip);</div><div class='del'>-	girq-&gt;default_type = IRQ_TYPE_NONE;</div><div class='del'>-	girq-&gt;handler = handle_bad_irq;</div><div class='del'>-</div><div class='ctx'> 	ret = devm_gpiochip_add_data(dev, gc, wx);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -723,8 +577,17 @@ int txgbe_init_phy(struct txgbe *txgbe)</div><div class='ctx'> 	struct wx *wx = txgbe-&gt;wx;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (txgbe-&gt;wx-&gt;media_type == sp_media_copper)</div><div class='del'>-		return txgbe_ext_phy_init(txgbe);</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_aml40:</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+		return txgbe_phylink_init_aml(txgbe);</div><div class='add'>+	case wx_mac_sp:</div><div class='add'>+		if (wx-&gt;media_type == wx_media_copper)</div><div class='add'>+			return txgbe_ext_phy_init(txgbe);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = txgbe_swnodes_register(txgbe);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -787,10 +650,20 @@ err_unregister_swnode:</div><div class='ctx'> </div><div class='ctx'> void txgbe_remove_phy(struct txgbe *txgbe)</div><div class='ctx'> {</div><div class='del'>-	if (txgbe-&gt;wx-&gt;media_type == sp_media_copper) {</div><div class='del'>-		phylink_disconnect_phy(txgbe-&gt;wx-&gt;phylink);</div><div class='add'>+	switch (txgbe-&gt;wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_aml40:</div><div class='add'>+	case wx_mac_aml:</div><div class='ctx'> 		phylink_destroy(txgbe-&gt;wx-&gt;phylink);</div><div class='ctx'> 		return;</div><div class='add'>+	case wx_mac_sp:</div><div class='add'>+		if (txgbe-&gt;wx-&gt;media_type == wx_media_copper) {</div><div class='add'>+			phylink_disconnect_phy(txgbe-&gt;wx-&gt;phylink);</div><div class='add'>+			phylink_destroy(txgbe-&gt;wx-&gt;phylink);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	platform_device_unregister(txgbe-&gt;sfp_dev);</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h b/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h<br/>index 8a026d804fe2..a32b19d71ea2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h</a></div><div class='hunk'>@@ -4,10 +4,8 @@</div><div class='ctx'> #ifndef _TXGBE_PHY_H_</div><div class='ctx'> #define _TXGBE_PHY_H_</div><div class='ctx'> </div><div class='del'>-irqreturn_t txgbe_gpio_irq_handler(int irq, void *data);</div><div class='del'>-void txgbe_reinit_gpio_intr(struct wx *wx);</div><div class='ctx'> irqreturn_t txgbe_link_irq_handler(int irq, void *data);</div><div class='ctx'> int txgbe_init_phy(struct txgbe *txgbe);</div><div class='ctx'> void txgbe_remove_phy(struct txgbe *txgbe);</div><div class='ctx'> </div><div class='del'>-#endif /* _TXGBE_NODE_H_ */</div><div class='add'>+#endif /* _TXGBE_PHY_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h b/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h<br/>index cc3a7b62fe9e..82433e9cb0e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wangxun/txgbe/txgbe_type.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbe/txgbe_type.h</a></div><div class='hunk'>@@ -6,10 +6,18 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/property.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include "../libwx/wx_type.h"</div><div class='ctx'> </div><div class='ctx'> /* Device IDs */</div><div class='ctx'> #define TXGBE_DEV_ID_SP1000                     0x1001</div><div class='ctx'> #define TXGBE_DEV_ID_WX1820                     0x2001</div><div class='add'>+#define TXGBE_DEV_ID_AML5010                    0x5010</div><div class='add'>+#define TXGBE_DEV_ID_AML5110                    0x5110</div><div class='add'>+#define TXGBE_DEV_ID_AML5025                    0x5025</div><div class='add'>+#define TXGBE_DEV_ID_AML5125                    0x5125</div><div class='add'>+#define TXGBE_DEV_ID_AML5040                    0x5040</div><div class='add'>+#define TXGBE_DEV_ID_AML5140                    0x5140</div><div class='ctx'> </div><div class='ctx'> /* Subsystem IDs */</div><div class='ctx'> /* SFP */</div><div class='hunk'>@@ -44,6 +52,8 @@</div><div class='ctx'> </div><div class='ctx'> /**************** SP Registers ****************************/</div><div class='ctx'> /* chip control Registers */</div><div class='add'>+#define TXGBE_MIS_RST                           0x1000C</div><div class='add'>+#define TXGBE_MIS_RST_MAC_RST(_i)               BIT(20 - (_i) * 3)</div><div class='ctx'> #define TXGBE_MIS_PRB_CTL                       0x10010</div><div class='ctx'> #define TXGBE_MIS_PRB_CTL_LAN_UP(_i)            BIT(1 - (_i))</div><div class='ctx'> /* FMGR Registers */</div><div class='hunk'>@@ -56,6 +66,11 @@</div><div class='ctx'> #define TXGBE_TS_CTL                            0x10300</div><div class='ctx'> #define TXGBE_TS_CTL_EVAL_MD                    BIT(31)</div><div class='ctx'> </div><div class='add'>+/* MAC Misc Registers */</div><div class='add'>+#define TXGBE_MAC_MISC_CTL                      0x11F00</div><div class='add'>+#define TXGBE_MAC_MISC_CTL_LINK_STS_MOD         BIT(0)</div><div class='add'>+#define TXGBE_MAC_MISC_CTL_LINK_PCS             FIELD_PREP(BIT(0), 0)</div><div class='add'>+#define TXGBE_MAC_MISC_CTL_LINK_BOTH            FIELD_PREP(BIT(0), 1)</div><div class='ctx'> /* GPIO register bit */</div><div class='ctx'> #define TXGBE_GPIOBIT_0                         BIT(0) /* I:tx fault */</div><div class='ctx'> #define TXGBE_GPIOBIT_1                         BIT(1) /* O:tx disabled */</div><div class='hunk'>@@ -67,20 +82,28 @@</div><div class='ctx'> /* Extended Interrupt Enable Set */</div><div class='ctx'> #define TXGBE_PX_MISC_ETH_LKDN                  BIT(8)</div><div class='ctx'> #define TXGBE_PX_MISC_DEV_RST                   BIT(10)</div><div class='add'>+#define TXGBE_PX_MISC_IC_TIMESYNC               BIT(11)</div><div class='ctx'> #define TXGBE_PX_MISC_ETH_EVENT                 BIT(17)</div><div class='ctx'> #define TXGBE_PX_MISC_ETH_LK                    BIT(18)</div><div class='ctx'> #define TXGBE_PX_MISC_ETH_AN                    BIT(19)</div><div class='ctx'> #define TXGBE_PX_MISC_INT_ERR                   BIT(20)</div><div class='add'>+#define TXGBE_PX_MISC_IC_VF_MBOX                BIT(23)</div><div class='ctx'> #define TXGBE_PX_MISC_GPIO                      BIT(26)</div><div class='ctx'> #define TXGBE_PX_MISC_IEN_MASK                            \</div><div class='ctx'> 	(TXGBE_PX_MISC_ETH_LKDN | TXGBE_PX_MISC_DEV_RST | \</div><div class='ctx'> 	 TXGBE_PX_MISC_ETH_EVENT | TXGBE_PX_MISC_ETH_LK | \</div><div class='del'>-	 TXGBE_PX_MISC_ETH_AN | TXGBE_PX_MISC_INT_ERR |   \</div><div class='del'>-	 TXGBE_PX_MISC_GPIO)</div><div class='add'>+	 TXGBE_PX_MISC_ETH_AN | TXGBE_PX_MISC_INT_ERR | \</div><div class='add'>+	 TXGBE_PX_MISC_IC_VF_MBOX | TXGBE_PX_MISC_IC_TIMESYNC)</div><div class='ctx'> </div><div class='ctx'> /* Port cfg registers */</div><div class='ctx'> #define TXGBE_CFG_PORT_ST                       0x14404</div><div class='ctx'> #define TXGBE_CFG_PORT_ST_LINK_UP               BIT(0)</div><div class='add'>+#define TXGBE_CFG_PORT_ST_LINK_AML_40G          BIT(2)</div><div class='add'>+#define TXGBE_CFG_PORT_ST_LINK_AML_25G          BIT(3)</div><div class='add'>+#define TXGBE_CFG_PORT_ST_LINK_AML_10G          BIT(4)</div><div class='add'>+#define TXGBE_CFG_VXLAN                         0x14410</div><div class='add'>+#define TXGBE_CFG_VXLAN_GPE                     0x14414</div><div class='add'>+#define TXGBE_CFG_GENEVE                        0x14418</div><div class='ctx'> </div><div class='ctx'> /* I2C registers */</div><div class='ctx'> #define TXGBE_I2C_BASE                          0x14900</div><div class='hunk'>@@ -138,6 +161,17 @@</div><div class='ctx'> #define TXGBE_RDB_FDIR_FLEX_CFG_MSK             BIT(2)</div><div class='ctx'> #define TXGBE_RDB_FDIR_FLEX_CFG_OFST(v)         FIELD_PREP(GENMASK(7, 3), v)</div><div class='ctx'> </div><div class='add'>+/*************************** Amber Lite Registers ****************************/</div><div class='add'>+#define TXGBE_PX_PF_BME                         0x4B8</div><div class='add'>+#define TXGBE_AML_MAC_TX_CFG                    0x11000</div><div class='add'>+#define TXGBE_AML_MAC_TX_CFG_TE                 BIT(0)</div><div class='add'>+#define TXGBE_AML_MAC_TX_CFG_SPEED_MASK         GENMASK(30, 27)</div><div class='add'>+#define TXGBE_AML_MAC_TX_CFG_SPEED_40G          FIELD_PREP(GENMASK(30, 27), 0)</div><div class='add'>+#define TXGBE_AML_MAC_TX_CFG_SPEED_25G          FIELD_PREP(GENMASK(30, 27), 2)</div><div class='add'>+#define TXGBE_AML_MAC_TX_CFG_SPEED_10G          FIELD_PREP(GENMASK(30, 27), 8)</div><div class='add'>+#define TXGBE_RDM_RSC_CTL                       0x1200C</div><div class='add'>+#define TXGBE_RDM_RSC_CTL_FREE_CTL              BIT(7)</div><div class='add'>+</div><div class='ctx'> /* Checksum and EEPROM pointers */</div><div class='ctx'> #define TXGBE_EEPROM_LAST_WORD                  0x800</div><div class='ctx'> #define TXGBE_EEPROM_CHECKSUM                   0x2F</div><div class='hunk'>@@ -145,6 +179,8 @@</div><div class='ctx'> #define TXGBE_EEPROM_VERSION_L                  0x1D</div><div class='ctx'> #define TXGBE_EEPROM_VERSION_H                  0x1E</div><div class='ctx'> #define TXGBE_ISCSI_BOOT_CONFIG                 0x07</div><div class='add'>+#define TXGBE_EEPROM_I2C_SRART_PTR              0x580</div><div class='add'>+#define TXGBE_EEPROM_I2C_END_PTR                0x800</div><div class='ctx'> </div><div class='ctx'> #define TXGBE_MAX_MSIX_VECTORS          64</div><div class='ctx'> #define TXGBE_MAX_FDIR_INDICES          63</div><div class='hunk'>@@ -153,13 +189,15 @@</div><div class='ctx'> #define TXGBE_MAX_RX_QUEUES   (TXGBE_MAX_FDIR_INDICES + 1)</div><div class='ctx'> #define TXGBE_MAX_TX_QUEUES   (TXGBE_MAX_FDIR_INDICES + 1)</div><div class='ctx'> </div><div class='del'>-#define TXGBE_SP_MAX_TX_QUEUES  128</div><div class='del'>-#define TXGBE_SP_MAX_RX_QUEUES  128</div><div class='del'>-#define TXGBE_SP_RAR_ENTRIES    128</div><div class='del'>-#define TXGBE_SP_MC_TBL_SIZE    128</div><div class='del'>-#define TXGBE_SP_VFT_TBL_SIZE   128</div><div class='del'>-#define TXGBE_SP_RX_PB_SIZE     512</div><div class='del'>-#define TXGBE_SP_TDB_PB_SZ      (160 * 1024) /* 160KB Packet Buffer */</div><div class='add'>+#define TXGBE_MAX_TXQ        128</div><div class='add'>+#define TXGBE_MAX_RXQ        128</div><div class='add'>+#define TXGBE_RAR_ENTRIES    128</div><div class='add'>+#define TXGBE_MC_TBL_SIZE    128</div><div class='add'>+#define TXGBE_VFT_TBL_SIZE   128</div><div class='add'>+#define TXGBE_RX_PB_SIZE     512</div><div class='add'>+#define TXGBE_TDB_PB_SZ      (160 * 1024) /* 160KB Packet Buffer */</div><div class='add'>+</div><div class='add'>+#define TXGBE_MAX_VFS_DRV_LIMIT                 63</div><div class='ctx'> </div><div class='ctx'> #define TXGBE_DEFAULT_ATR_SAMPLE_RATE           20</div><div class='ctx'> </div><div class='hunk'>@@ -250,7 +288,7 @@ struct txgbe_fdir_filter {</div><div class='ctx'> 	struct hlist_node fdir_node;</div><div class='ctx'> 	union txgbe_atr_input filter;</div><div class='ctx'> 	u16 sw_idx;</div><div class='del'>-	u16 action;</div><div class='add'>+	u64 action;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* TX/RX descriptor defines */</div><div class='hunk'>@@ -265,8 +303,8 @@ struct txgbe_fdir_filter {</div><div class='ctx'> #define TXGBE_DEFAULT_RX_WORK           128</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define TXGBE_INTR_MISC       BIT(0)</div><div class='del'>-#define TXGBE_INTR_QALL(A)    GENMASK((A)-&gt;num_q_vectors, 1)</div><div class='add'>+#define TXGBE_INTR_MISC(A)    BIT((A)-&gt;num_q_vectors)</div><div class='add'>+#define TXGBE_INTR_QALL(A)    (TXGBE_INTR_MISC(A) - 1)</div><div class='ctx'> </div><div class='ctx'> #define TXGBE_MAX_EITR        GENMASK(11, 3)</div><div class='ctx'> </div><div class='hunk'>@@ -277,6 +315,96 @@ void txgbe_up(struct wx *wx);</div><div class='ctx'> int txgbe_setup_tc(struct net_device *dev, u8 tc);</div><div class='ctx'> void txgbe_do_reset(struct net_device *netdev);</div><div class='ctx'> </div><div class='add'>+#define TXGBE_LINK_SPEED_UNKNOWN        0</div><div class='add'>+#define TXGBE_LINK_SPEED_10GB_FULL      4</div><div class='add'>+#define TXGBE_LINK_SPEED_25GB_FULL      0x10</div><div class='add'>+#define TXGBE_LINK_SPEED_40GB_FULL      0x20</div><div class='add'>+</div><div class='add'>+#define TXGBE_SFF_IDENTIFIER_SFP        0x3</div><div class='add'>+#define TXGBE_SFF_IDENTIFIER_QSFP       0xC</div><div class='add'>+#define TXGBE_SFF_IDENTIFIER_QSFP_PLUS  0xD</div><div class='add'>+#define TXGBE_SFF_IDENTIFIER_QSFP28     0x11</div><div class='add'>+#define TXGBE_SFF_DA_PASSIVE_CABLE      0x4</div><div class='add'>+#define TXGBE_SFF_DA_ACTIVE_CABLE       0x8</div><div class='add'>+#define TXGBE_SFF_DA_SPEC_ACTIVE_LIMIT  0x4</div><div class='add'>+#define TXGBE_SFF_FCPI4_LIMITING        0x3</div><div class='add'>+#define TXGBE_SFF_10GBASESR_CAPABLE     0x10</div><div class='add'>+#define TXGBE_SFF_10GBASELR_CAPABLE     0x20</div><div class='add'>+#define TXGBE_SFF_25GBASESR_CAPABLE     0x2</div><div class='add'>+#define TXGBE_SFF_25GBASELR_CAPABLE     0x3</div><div class='add'>+#define TXGBE_SFF_25GBASEER_CAPABLE     0x4</div><div class='add'>+#define TXGBE_SFF_25GBASECR_91FEC       0xB</div><div class='add'>+#define TXGBE_SFF_25GBASECR_74FEC       0xC</div><div class='add'>+#define TXGBE_SFF_25GBASECR_NOFEC       0xD</div><div class='add'>+#define TXGBE_SFF_ETHERNET_RSRVD        BIT(7)</div><div class='add'>+#define TXGBE_SFF_ETHERNET_40G_CR4      BIT(3)</div><div class='add'>+#define TXGBE_SFF_ETHERNET_40G_SR4      BIT(2)</div><div class='add'>+#define TXGBE_SFF_ETHERNET_40G_LR4      BIT(1)</div><div class='add'>+#define TXGBE_SFF_ETHERNET_40G_ACTIVE   BIT(0)</div><div class='add'>+#define TXGBE_SFF_ETHERNET_100G_CR4     0xB</div><div class='add'>+</div><div class='add'>+#define TXGBE_PHY_FEC_RS                BIT(0)</div><div class='add'>+#define TXGBE_PHY_FEC_BASER             BIT(1)</div><div class='add'>+#define TXGBE_PHY_FEC_OFF               BIT(2)</div><div class='add'>+#define TXGBE_PHY_FEC_AUTO              (TXGBE_PHY_FEC_OFF | \</div><div class='add'>+					 TXGBE_PHY_FEC_BASER |\</div><div class='add'>+					 TXGBE_PHY_FEC_RS)</div><div class='add'>+</div><div class='add'>+#define FW_PHY_GET_LINK_CMD             0xC0</div><div class='add'>+#define FW_PHY_SET_LINK_CMD             0xC1</div><div class='add'>+#define FW_GET_MODULE_INFO_CMD          0xC5</div><div class='add'>+#define FW_READ_EEPROM_CMD              0xC6</div><div class='add'>+</div><div class='add'>+struct txgbe_sff_id {</div><div class='add'>+	u8 identifier;		/* A0H 0x00 */</div><div class='add'>+	u8 com_1g_code;		/* A0H 0x06 */</div><div class='add'>+	u8 com_10g_code;	/* A0H 0x03 */</div><div class='add'>+	u8 com_25g_code;	/* A0H 0x24 */</div><div class='add'>+	u8 cable_spec;		/* A0H 0x3C */</div><div class='add'>+	u8 cable_tech;		/* A0H 0x08 */</div><div class='add'>+	u8 vendor_oui0;		/* A0H 0x25 */</div><div class='add'>+	u8 vendor_oui1;		/* A0H 0x26 */</div><div class='add'>+	u8 vendor_oui2;		/* A0H 0x27 */</div><div class='add'>+	u8 transceiver_type;	/* A0H 0x83 */</div><div class='add'>+	u8 sff_opt1;		/* A0H 0xC0 */</div><div class='add'>+	u8 reserved[5];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct txgbe_hic_get_module_info {</div><div class='add'>+	struct wx_hic_hdr hdr;</div><div class='add'>+	struct txgbe_sff_id id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct txgbe_hic_ephy_setlink {</div><div class='add'>+	struct wx_hic_hdr hdr;</div><div class='add'>+	u8 speed;</div><div class='add'>+	u8 duplex;</div><div class='add'>+	u8 autoneg;</div><div class='add'>+	u8 fec_mode;</div><div class='add'>+	u8 resv[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct txgbe_hic_ephy_getlink {</div><div class='add'>+	struct wx_hic_hdr hdr;</div><div class='add'>+	u8 speed;</div><div class='add'>+	u8 duplex;</div><div class='add'>+	u8 autoneg;</div><div class='add'>+	u8 flow_ctl;</div><div class='add'>+	u8 power;</div><div class='add'>+	u8 fec_mode;</div><div class='add'>+	u8 resv[6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct txgbe_hic_i2c_read {</div><div class='add'>+	struct wx_hic_hdr hdr;</div><div class='add'>+	__be32 offset;</div><div class='add'>+	__be32 length;</div><div class='add'>+	u8 page;</div><div class='add'>+	u8 bank;</div><div class='add'>+	u8 i2c_address;</div><div class='add'>+	u8 resv;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define NODE_PROP(_NAME, _PROP)			\</div><div class='ctx'> 	(const struct software_node) {		\</div><div class='ctx'> 		.name = _NAME,			\</div><div class='hunk'>@@ -313,8 +441,8 @@ struct txgbe_nodes {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum txgbe_misc_irqs {</div><div class='del'>-	TXGBE_IRQ_GPIO = 0,</div><div class='del'>-	TXGBE_IRQ_LINK,</div><div class='add'>+	TXGBE_IRQ_LINK = 0,</div><div class='add'>+	TXGBE_IRQ_GPIO,</div><div class='ctx'> 	TXGBE_IRQ_MAX</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -335,14 +463,20 @@ struct txgbe {</div><div class='ctx'> 	struct clk_lookup *clock;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	struct gpio_chip *gpio;</div><div class='del'>-	unsigned int gpio_irq;</div><div class='ctx'> 	unsigned int link_irq;</div><div class='add'>+	unsigned int gpio_irq;</div><div class='add'>+	u32 eicr;</div><div class='ctx'> </div><div class='ctx'> 	/* flow director */</div><div class='ctx'> 	struct hlist_head fdir_filter_list;</div><div class='ctx'> 	union txgbe_atr_input fdir_mask;</div><div class='ctx'> 	int fdir_filter_count;</div><div class='ctx'> 	spinlock_t fdir_perfect_lock; /* spinlock for FDIR */</div><div class='add'>+</div><div class='add'>+	DECLARE_PHY_INTERFACE_MASK(link_interfaces);</div><div class='add'>+	__ETHTOOL_DECLARE_LINK_MODE_MASK(link_support);</div><div class='add'>+	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);</div><div class='add'>+	u8 link_port;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #endif /* _TXGBE_TYPE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbevf/Makefile b/drivers/net/ethernet/wangxun/txgbevf/Makefile<br/>new file mode 100644<br/>index 000000000000..4c7e6de04424<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbevf/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbevf/Makefile</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd.</div><div class='add'>+#</div><div class='add'>+# Makefile for the Wangxun(R) 10/25/40GbE virtual functions driver</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_TXGBE) += txgbevf.o</div><div class='add'>+</div><div class='add'>+txgbevf-objs := txgbevf_main.o</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbevf/txgbevf_main.c b/drivers/net/ethernet/wangxun/txgbevf/txgbevf_main.c<br/>new file mode 100644<br/>index 000000000000..37e4ec487afd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbevf/txgbevf_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbevf/txgbevf_main.c</a></div><div class='hunk'>@@ -0,0 +1,331 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../libwx/wx_type.h"</div><div class='add'>+#include "../libwx/wx_hw.h"</div><div class='add'>+#include "../libwx/wx_lib.h"</div><div class='add'>+#include "../libwx/wx_mbx.h"</div><div class='add'>+#include "../libwx/wx_vf.h"</div><div class='add'>+#include "../libwx/wx_vf_common.h"</div><div class='add'>+#include "../libwx/wx_ethtool.h"</div><div class='add'>+#include "txgbevf_type.h"</div><div class='add'>+</div><div class='add'>+/* txgbevf_pci_tbl - PCI Device ID Table</div><div class='add'>+ *</div><div class='add'>+ * Wildcard entries (PCI_ANY_ID) should come last</div><div class='add'>+ * Last entry must be all 0s</div><div class='add'>+ *</div><div class='add'>+ * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,</div><div class='add'>+ *   Class, Class Mask, private data (not used) }</div><div class='add'>+ */</div><div class='add'>+static const struct pci_device_id txgbevf_pci_tbl[] = {</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBEVF_DEV_ID_SP1000), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBEVF_DEV_ID_WX1820), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBEVF_DEV_ID_AML500F), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBEVF_DEV_ID_AML510F), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBEVF_DEV_ID_AML5024), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBEVF_DEV_ID_AML5124), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBEVF_DEV_ID_AML503F), 0},</div><div class='add'>+	{ PCI_VDEVICE(WANGXUN, TXGBEVF_DEV_ID_AML513F), 0},</div><div class='add'>+	/* required last entry */</div><div class='add'>+	{ .device = 0 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops txgbevf_netdev_ops = {</div><div class='add'>+	.ndo_open               = wxvf_open,</div><div class='add'>+	.ndo_stop               = wxvf_close,</div><div class='add'>+	.ndo_start_xmit         = wx_xmit_frame,</div><div class='add'>+	.ndo_validate_addr      = eth_validate_addr,</div><div class='add'>+	.ndo_set_mac_address    = wx_set_mac_vf,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void txgbevf_set_num_queues(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	u32 def_q = 0, num_tcs = 0;</div><div class='add'>+	u16 rss, queue;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Start with base case */</div><div class='add'>+	wx-&gt;num_rx_queues = 1;</div><div class='add'>+	wx-&gt;num_tx_queues = 1;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+	/* fetch queue configuration from the PF */</div><div class='add'>+	ret = wx_get_queues_vf(wx, &amp;num_tcs, &amp;def_q);</div><div class='add'>+	spin_unlock_bh(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* we need as many queues as traffic classes */</div><div class='add'>+	if (num_tcs &gt; 1) {</div><div class='add'>+		wx-&gt;num_rx_queues = num_tcs;</div><div class='add'>+	} else {</div><div class='add'>+		rss = min_t(u16, num_online_cpus(), TXGBEVF_MAX_RSS_NUM);</div><div class='add'>+		queue = min_t(u16, wx-&gt;mac.max_rx_queues, wx-&gt;mac.max_tx_queues);</div><div class='add'>+		rss = min_t(u16, queue, rss);</div><div class='add'>+</div><div class='add'>+		if (wx-&gt;vfinfo-&gt;vf_api &gt;= wx_mbox_api_13) {</div><div class='add'>+			wx-&gt;num_rx_queues = rss;</div><div class='add'>+			wx-&gt;num_tx_queues = rss;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void txgbevf_init_type_code(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	switch (wx-&gt;device_id) {</div><div class='add'>+	case TXGBEVF_DEV_ID_SP1000:</div><div class='add'>+	case TXGBEVF_DEV_ID_WX1820:</div><div class='add'>+		wx-&gt;mac.type = wx_mac_sp;</div><div class='add'>+		break;</div><div class='add'>+	case TXGBEVF_DEV_ID_AML500F:</div><div class='add'>+	case TXGBEVF_DEV_ID_AML510F:</div><div class='add'>+	case TXGBEVF_DEV_ID_AML5024:</div><div class='add'>+	case TXGBEVF_DEV_ID_AML5124:</div><div class='add'>+	case TXGBEVF_DEV_ID_AML503F:</div><div class='add'>+	case TXGBEVF_DEV_ID_AML513F:</div><div class='add'>+		wx-&gt;mac.type = wx_mac_aml;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		wx-&gt;mac.type = wx_mac_unknown;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int txgbevf_sw_init(struct wx *wx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = wx-&gt;netdev;</div><div class='add'>+	struct pci_dev *pdev = wx-&gt;pdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Initialize pcie info and common capability flags */</div><div class='add'>+	err = wx_sw_init(wx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_wx_sw_init;</div><div class='add'>+</div><div class='add'>+	/* Initialize the mailbox */</div><div class='add'>+	err = wx_init_mbx_params_vf(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_init_mbx_params;</div><div class='add'>+</div><div class='add'>+	/* max q_vectors */</div><div class='add'>+	wx-&gt;mac.max_msix_vectors = TXGBEVF_MAX_MSIX_VECTORS;</div><div class='add'>+	/* Initialize the device type */</div><div class='add'>+	txgbevf_init_type_code(wx);</div><div class='add'>+	/* lock to protect mailbox accesses */</div><div class='add'>+	spin_lock_init(&amp;wx-&gt;mbx.mbx_lock);</div><div class='add'>+</div><div class='add'>+	err = wx_reset_hw_vf(wx);</div><div class='add'>+	if (err) {</div><div class='add'>+		wx_err(wx, "PF still in reset state. Is the PF interface up?\n");</div><div class='add'>+		goto err_reset_hw;</div><div class='add'>+	}</div><div class='add'>+	wx_init_hw_vf(wx);</div><div class='add'>+	wx_negotiate_api_vf(wx);</div><div class='add'>+	if (is_zero_ether_addr(wx-&gt;mac.addr))</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev,</div><div class='add'>+			 "MAC address not assigned by administrator.\n");</div><div class='add'>+	eth_hw_addr_set(netdev, wx-&gt;mac.addr);</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(netdev-&gt;dev_addr)) {</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Assigning random MAC address\n");</div><div class='add'>+		eth_hw_addr_random(netdev);</div><div class='add'>+		ether_addr_copy(wx-&gt;mac.addr, netdev-&gt;dev_addr);</div><div class='add'>+		ether_addr_copy(wx-&gt;mac.perm_addr, netdev-&gt;dev_addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx-&gt;mac.max_tx_queues = TXGBEVF_MAX_TX_QUEUES;</div><div class='add'>+	wx-&gt;mac.max_rx_queues = TXGBEVF_MAX_RX_QUEUES;</div><div class='add'>+	/* Enable dynamic interrupt throttling rates */</div><div class='add'>+	wx-&gt;adaptive_itr = true;</div><div class='add'>+	wx-&gt;rx_itr_setting = 1;</div><div class='add'>+	wx-&gt;tx_itr_setting = 1;</div><div class='add'>+	/* set default ring sizes */</div><div class='add'>+	wx-&gt;tx_ring_count = TXGBEVF_DEFAULT_TXD;</div><div class='add'>+	wx-&gt;rx_ring_count = TXGBEVF_DEFAULT_RXD;</div><div class='add'>+	/* set default work limits */</div><div class='add'>+	wx-&gt;tx_work_limit = TXGBEVF_DEFAULT_TX_WORK;</div><div class='add'>+	wx-&gt;rx_work_limit = TXGBEVF_DEFAULT_RX_WORK;</div><div class='add'>+</div><div class='add'>+	wx-&gt;set_num_queues = txgbevf_set_num_queues;</div><div class='add'>+</div><div class='add'>+	switch (wx-&gt;mac.type) {</div><div class='add'>+	case wx_mac_sp:</div><div class='add'>+		break;</div><div class='add'>+	case wx_mac_aml:</div><div class='add'>+	case wx_mac_aml40:</div><div class='add'>+		set_bit(WX_FLAG_RX_MERGE_ENABLED, wx-&gt;flags);</div><div class='add'>+		set_bit(WX_FLAG_TXHEAD_WB_ENABLED, wx-&gt;flags);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_reset_hw:</div><div class='add'>+	kfree(wx-&gt;vfinfo);</div><div class='add'>+err_init_mbx_params:</div><div class='add'>+	kfree(wx-&gt;rss_key);</div><div class='add'>+	kfree(wx-&gt;mac_table);</div><div class='add'>+err_wx_sw_init:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * txgbevf_probe - Device Initialization Routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ * @ent: entry in txgbevf_pci_tbl</div><div class='add'>+ *</div><div class='add'>+ * Return: return 0 on success, negative on failure</div><div class='add'>+ *</div><div class='add'>+ * txgbevf_probe initializes an adapter identified by a pci_dev structure.</div><div class='add'>+ * The OS initialization, configuring of the adapter private structure,</div><div class='add'>+ * and a hardware reset occur.</div><div class='add'>+ **/</div><div class='add'>+static int txgbevf_probe(struct pci_dev *pdev,</div><div class='add'>+			 const struct pci_device_id __always_unused *ent)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct wx *wx = NULL;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device_mem(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"No usable DMA configuration, aborting\n");</div><div class='add'>+		goto err_pci_disable_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pci_request_selected_regions(pdev,</div><div class='add'>+					   pci_select_bars(pdev, IORESOURCE_MEM),</div><div class='add'>+					   dev_driver_string(&amp;pdev-&gt;dev));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"pci_request_selected_regions failed 0x%x\n", err);</div><div class='add'>+		goto err_pci_disable_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	netdev = devm_alloc_etherdev_mqs(&amp;pdev-&gt;dev,</div><div class='add'>+					 sizeof(struct wx),</div><div class='add'>+					 TXGBEVF_MAX_TX_QUEUES,</div><div class='add'>+					 TXGBEVF_MAX_RX_QUEUES);</div><div class='add'>+	if (!netdev) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_pci_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	wx = netdev_priv(netdev);</div><div class='add'>+	wx-&gt;netdev = netdev;</div><div class='add'>+	wx-&gt;pdev = pdev;</div><div class='add'>+</div><div class='add'>+	wx-&gt;msg_enable = netif_msg_init(-1, NETIF_MSG_DRV |</div><div class='add'>+					NETIF_MSG_PROBE | NETIF_MSG_LINK);</div><div class='add'>+	wx-&gt;hw_addr = devm_ioremap(&amp;pdev-&gt;dev,</div><div class='add'>+				   pci_resource_start(pdev, 0),</div><div class='add'>+				   pci_resource_len(pdev, 0));</div><div class='add'>+	if (!wx-&gt;hw_addr) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto err_pci_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx-&gt;b4_addr = devm_ioremap(&amp;pdev-&gt;dev,</div><div class='add'>+				   pci_resource_start(pdev, 4),</div><div class='add'>+				   pci_resource_len(pdev, 4));</div><div class='add'>+	if (!wx-&gt;b4_addr) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto err_pci_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wx-&gt;driver_name = KBUILD_MODNAME;</div><div class='add'>+	wx_set_ethtool_ops_vf(netdev);</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;txgbevf_netdev_ops;</div><div class='add'>+</div><div class='add'>+	/* setup the private structure */</div><div class='add'>+	err = txgbevf_sw_init(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_pci_release_regions;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;features |= NETIF_F_HIGHDMA;</div><div class='add'>+</div><div class='add'>+	eth_hw_addr_set(netdev, wx-&gt;mac.perm_addr);</div><div class='add'>+	ether_addr_copy(netdev-&gt;perm_addr, wx-&gt;mac.addr);</div><div class='add'>+</div><div class='add'>+	wxvf_init_service(wx);</div><div class='add'>+	err = wx_init_interrupt_scheme(wx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_sw_init;</div><div class='add'>+</div><div class='add'>+	wx_get_fw_version_vf(wx);</div><div class='add'>+	err = register_netdev(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_register;</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, wx);</div><div class='add'>+	netif_tx_stop_all_queues(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_register:</div><div class='add'>+	wx_clear_interrupt_scheme(wx);</div><div class='add'>+err_free_sw_init:</div><div class='add'>+	timer_delete_sync(&amp;wx-&gt;service_timer);</div><div class='add'>+	cancel_work_sync(&amp;wx-&gt;service_task);</div><div class='add'>+	kfree(wx-&gt;vfinfo);</div><div class='add'>+	kfree(wx-&gt;rss_key);</div><div class='add'>+	kfree(wx-&gt;mac_table);</div><div class='add'>+err_pci_release_regions:</div><div class='add'>+	pci_release_selected_regions(pdev,</div><div class='add'>+				     pci_select_bars(pdev, IORESOURCE_MEM));</div><div class='add'>+err_pci_disable_dev:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * txgbevf_remove - Device Removal Routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ *</div><div class='add'>+ * txgbevf_remove is called by the PCI subsystem to alert the driver</div><div class='add'>+ * that it should release a PCI device.  The could be caused by a</div><div class='add'>+ * Hot-Plug event, or because the driver is going to be removed from</div><div class='add'>+ * memory.</div><div class='add'>+ **/</div><div class='add'>+static void txgbevf_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	wxvf_remove(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(txgbevf_pm_ops, wxvf_suspend, wxvf_resume);</div><div class='add'>+</div><div class='add'>+static struct pci_driver txgbevf_driver = {</div><div class='add'>+	.name     = KBUILD_MODNAME,</div><div class='add'>+	.id_table = txgbevf_pci_tbl,</div><div class='add'>+	.probe    = txgbevf_probe,</div><div class='add'>+	.remove   = txgbevf_remove,</div><div class='add'>+	.shutdown = wxvf_shutdown,</div><div class='add'>+	/* Power Management Hooks */</div><div class='add'>+	.driver.pm	= pm_sleep_ptr(&amp;txgbevf_pm_ops)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_pci_driver(txgbevf_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, txgbevf_pci_tbl);</div><div class='add'>+MODULE_AUTHOR("Beijing WangXun Technology Co., Ltd, &lt;software@trustnetic.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("WangXun(R) 10/25/40 Gigabit Virtual Function Network Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/wangxun/txgbevf/txgbevf_type.h b/drivers/net/ethernet/wangxun/txgbevf/txgbevf_type.h<br/>new file mode 100644<br/>index 000000000000..1364d2b58bb0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wangxun/txgbevf/txgbevf_type.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wangxun/txgbevf/txgbevf_type.h</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */</div><div class='add'>+</div><div class='add'>+#ifndef _TXGBEVF_TYPE_H_</div><div class='add'>+#define _TXGBEVF_TYPE_H_</div><div class='add'>+</div><div class='add'>+/* Device IDs */</div><div class='add'>+#define TXGBEVF_DEV_ID_SP1000                  0x1000</div><div class='add'>+#define TXGBEVF_DEV_ID_WX1820                  0x2000</div><div class='add'>+#define TXGBEVF_DEV_ID_AML500F                 0x500F</div><div class='add'>+#define TXGBEVF_DEV_ID_AML510F                 0x510F</div><div class='add'>+#define TXGBEVF_DEV_ID_AML5024                 0x5024</div><div class='add'>+#define TXGBEVF_DEV_ID_AML5124                 0x5124</div><div class='add'>+#define TXGBEVF_DEV_ID_AML503F                 0x503f</div><div class='add'>+#define TXGBEVF_DEV_ID_AML513F                 0x513f</div><div class='add'>+</div><div class='add'>+#define TXGBEVF_MAX_MSIX_VECTORS               2</div><div class='add'>+#define TXGBEVF_MAX_RSS_NUM                    4</div><div class='add'>+#define TXGBEVF_MAX_RX_QUEUES                  4</div><div class='add'>+#define TXGBEVF_MAX_TX_QUEUES                  4</div><div class='add'>+#define TXGBEVF_DEFAULT_TXD                    128</div><div class='add'>+#define TXGBEVF_DEFAULT_RXD                    128</div><div class='add'>+#define TXGBEVF_DEFAULT_TX_WORK                256</div><div class='add'>+#define TXGBEVF_DEFAULT_RX_WORK                256</div><div class='add'>+</div><div class='add'>+#endif /* _TXGBEVF_TYPE_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c<br/>index b77f096eaf99..c5424d882135 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wiznet/w5100.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/wiznet/w5100.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/wiznet/w5100.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/wiznet/w5100.c</a></div><div class='hunk'>@@ -1142,7 +1142,7 @@ int w5100_probe(struct device *dev, const struct w5100_ops *ops,</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto err_register;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;xfer_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0,</div><div class='add'>+	priv-&gt;xfer_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM | WQ_PERCPU, 0,</div><div class='ctx'> 					netdev_name(ndev));</div><div class='ctx'> 	if (!priv-&gt;xfer_wq) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='head'>diff --git a/drivers/net/ethernet/xilinx/Kconfig b/drivers/net/ethernet/xilinx/Kconfig<br/>index 35d96c633a33..7502214cc7d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xilinx/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xilinx/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xilinx/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/xilinx/Kconfig</a></div><div class='hunk'>@@ -28,6 +28,7 @@ config XILINX_AXI_EMAC</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='ctx'> 	depends on XILINX_DMA</div><div class='ctx'> 	select PHYLINK</div><div class='add'>+	select DIMLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the 10/100/1000 Ethernet from Xilinx for the</div><div class='ctx'> 	  AXI bus interface used in Xilinx Virtex FPGAs and Soc's.</div><div class='head'>diff --git a/drivers/net/ethernet/xilinx/ll_temac_main.c b/drivers/net/ethernet/xilinx/ll_temac_main.c<br/>index edb36ff07a0c..711ed9c2631b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xilinx/ll_temac_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xilinx/ll_temac_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xilinx/ll_temac_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/xilinx/ll_temac_main.c</a></div><div class='hunk'>@@ -1309,7 +1309,7 @@ ll_temac_ethtools_set_ringparam(struct net_device *ndev,</div><div class='ctx'> 	if (ering-&gt;rx_pending &gt; RX_BD_NUM_MAX ||</div><div class='ctx'> 	    ering-&gt;rx_mini_pending ||</div><div class='ctx'> 	    ering-&gt;rx_jumbo_pending ||</div><div class='del'>-	    ering-&gt;rx_pending &gt; TX_BD_NUM_MAX)</div><div class='add'>+	    ering-&gt;tx_pending &gt; TX_BD_NUM_MAX)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(ndev))</div><div class='hunk'>@@ -1595,7 +1595,7 @@ static int temac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (temac_np) {</div><div class='ctx'> 		lp-&gt;phy_node = of_parse_phandle(temac_np, "phy-handle", 0);</div><div class='ctx'> 		if (lp-&gt;phy_node)</div><div class='del'>-			dev_dbg(lp-&gt;dev, "using PHY node %pOF\n", temac_np);</div><div class='add'>+			dev_dbg(lp-&gt;dev, "using PHY node %pOF\n", lp-&gt;phy_node);</div><div class='ctx'> 	} else if (pdata) {</div><div class='ctx'> 		snprintf(lp-&gt;phy_name, sizeof(lp-&gt;phy_name),</div><div class='ctx'> 			 PHY_ID_FMT, lp-&gt;mii_bus-&gt;id, pdata-&gt;phy_addr);</div><div class='head'>diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h<br/>index d64b8abcf018..5ff742103beb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xilinx/xilinx_axienet.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xilinx/xilinx_axienet.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xilinx/xilinx_axienet.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/xilinx/xilinx_axienet.h</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #ifndef XILINX_AXIENET_H</div><div class='ctx'> #define XILINX_AXIENET_H</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/dim.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='hunk'>@@ -112,19 +113,18 @@</div><div class='ctx'> #define XAXIDMA_DELAY_MASK		0xFF000000 /* Delay timeout counter */</div><div class='ctx'> #define XAXIDMA_COALESCE_MASK		0x00FF0000 /* Coalesce counter */</div><div class='ctx'> </div><div class='del'>-#define XAXIDMA_DELAY_SHIFT		24</div><div class='del'>-#define XAXIDMA_COALESCE_SHIFT		16</div><div class='del'>-</div><div class='ctx'> #define XAXIDMA_IRQ_IOC_MASK		0x00001000 /* Completion intr */</div><div class='ctx'> #define XAXIDMA_IRQ_DELAY_MASK		0x00002000 /* Delay interrupt */</div><div class='ctx'> #define XAXIDMA_IRQ_ERROR_MASK		0x00004000 /* Error interrupt */</div><div class='ctx'> #define XAXIDMA_IRQ_ALL_MASK		0x00007000 /* All interrupts */</div><div class='ctx'> </div><div class='add'>+/* Constant to convert delay counts to microseconds */</div><div class='add'>+#define XAXIDMA_DELAY_SCALE		(125ULL * USEC_PER_SEC)</div><div class='add'>+</div><div class='ctx'> /* Default TX/RX Threshold and delay timer values for SGDMA mode */</div><div class='ctx'> #define XAXIDMA_DFT_TX_THRESHOLD	24</div><div class='ctx'> #define XAXIDMA_DFT_TX_USEC		50</div><div class='del'>-#define XAXIDMA_DFT_RX_THRESHOLD	1</div><div class='del'>-#define XAXIDMA_DFT_RX_USEC		50</div><div class='add'>+#define XAXIDMA_DFT_RX_USEC		16</div><div class='ctx'> </div><div class='ctx'> #define XAXIDMA_BD_CTRL_TXSOF_MASK	0x08000000 /* First tx packet */</div><div class='ctx'> #define XAXIDMA_BD_CTRL_TXEOF_MASK	0x04000000 /* Last tx packet */</div><div class='hunk'>@@ -484,7 +484,12 @@ struct skbuf_dma_descriptor {</div><div class='ctx'>  * @regs:	Base address for the axienet_local device address space</div><div class='ctx'>  * @dma_regs:	Base address for the axidma device address space</div><div class='ctx'>  * @napi_rx:	NAPI RX control structure</div><div class='add'>+ * @rx_dim:     DIM state for the receive queue</div><div class='add'>+ * @rx_dim_enabled: Whether DIM is enabled or not</div><div class='add'>+ * @rx_irqs:    Number of interrupts</div><div class='add'>+ * @rx_cr_lock: Lock protecting @rx_dma_cr, its register, and @rx_dma_started</div><div class='ctx'>  * @rx_dma_cr:  Nominal content of RX DMA control register</div><div class='add'>+ * @rx_dma_started: Set when RX DMA is started</div><div class='ctx'>  * @rx_bd_v:	Virtual address of the RX buffer descriptor ring</div><div class='ctx'>  * @rx_bd_p:	Physical address(start address) of the RX buffer descr. ring</div><div class='ctx'>  * @rx_bd_num:	Size of RX buffer descriptor ring</div><div class='hunk'>@@ -494,7 +499,9 @@ struct skbuf_dma_descriptor {</div><div class='ctx'>  * @rx_bytes:	RX byte count for statistics</div><div class='ctx'>  * @rx_stat_sync: Synchronization object for RX stats</div><div class='ctx'>  * @napi_tx:	NAPI TX control structure</div><div class='add'>+ * @tx_cr_lock: Lock protecting @tx_dma_cr, its register, and @tx_dma_started</div><div class='ctx'>  * @tx_dma_cr:  Nominal content of TX DMA control register</div><div class='add'>+ * @tx_dma_started: Set when TX DMA is started</div><div class='ctx'>  * @tx_bd_v:	Virtual address of the TX buffer descriptor ring</div><div class='ctx'>  * @tx_bd_p:	Physical address(start address) of the TX buffer descr. ring</div><div class='ctx'>  * @tx_bd_num:	Size of TX buffer descriptor ring</div><div class='hunk'>@@ -529,10 +536,6 @@ struct skbuf_dma_descriptor {</div><div class='ctx'>  *		  supported, the maximum frame size would be 9k. Else it is</div><div class='ctx'>  *		  1522 bytes (assuming support for basic VLAN)</div><div class='ctx'>  * @rxmem:	Stores rx memory size for jumbo frame handling.</div><div class='del'>- * @coalesce_count_rx:	Store the irq coalesce on RX side.</div><div class='del'>- * @coalesce_usec_rx:	IRQ coalesce delay for RX</div><div class='del'>- * @coalesce_count_tx:	Store the irq coalesce on TX side.</div><div class='del'>- * @coalesce_usec_tx:	IRQ coalesce delay for TX</div><div class='ctx'>  * @use_dmaengine: flag to check dmaengine framework usage.</div><div class='ctx'>  * @tx_chan:	TX DMA channel.</div><div class='ctx'>  * @rx_chan:	RX DMA channel.</div><div class='hunk'>@@ -566,7 +569,12 @@ struct axienet_local {</div><div class='ctx'> 	void __iomem *dma_regs;</div><div class='ctx'> </div><div class='ctx'> 	struct napi_struct napi_rx;</div><div class='add'>+	struct dim rx_dim;</div><div class='add'>+	bool rx_dim_enabled;</div><div class='add'>+	u16 rx_irqs;</div><div class='add'>+	spinlock_t rx_cr_lock;</div><div class='ctx'> 	u32 rx_dma_cr;</div><div class='add'>+	bool rx_dma_started;</div><div class='ctx'> 	struct axidma_bd *rx_bd_v;</div><div class='ctx'> 	dma_addr_t rx_bd_p;</div><div class='ctx'> 	u32 rx_bd_num;</div><div class='hunk'>@@ -576,7 +584,9 @@ struct axienet_local {</div><div class='ctx'> 	struct u64_stats_sync rx_stat_sync;</div><div class='ctx'> </div><div class='ctx'> 	struct napi_struct napi_tx;</div><div class='add'>+	spinlock_t tx_cr_lock;</div><div class='ctx'> 	u32 tx_dma_cr;</div><div class='add'>+	bool tx_dma_started;</div><div class='ctx'> 	struct axidma_bd *tx_bd_v;</div><div class='ctx'> 	dma_addr_t tx_bd_p;</div><div class='ctx'> 	u32 tx_bd_num;</div><div class='hunk'>@@ -607,10 +617,6 @@ struct axienet_local {</div><div class='ctx'> 	u32 max_frm_size;</div><div class='ctx'> 	u32 rxmem;</div><div class='ctx'> </div><div class='del'>-	u32 coalesce_count_rx;</div><div class='del'>-	u32 coalesce_usec_rx;</div><div class='del'>-	u32 coalesce_count_tx;</div><div class='del'>-	u32 coalesce_usec_tx;</div><div class='ctx'> 	u8  use_dmaengine;</div><div class='ctx'> 	struct dma_chan *tx_chan;</div><div class='ctx'> 	struct dma_chan *rx_chan;</div><div class='head'>diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c<br/>index 273ec5f70005..284031fb2e2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xilinx/xilinx_axienet_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xilinx/xilinx_axienet_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xilinx/xilinx_axienet_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/xilinx/xilinx_axienet_main.c</a></div><div class='hunk'>@@ -223,26 +223,64 @@ static void axienet_dma_bd_release(struct net_device *ndev)</div><div class='ctx'> 			  lp-&gt;rx_bd_p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u64 axienet_dma_rate(struct axienet_local *lp)</div><div class='add'>+{</div><div class='add'>+	if (lp-&gt;axi_clk)</div><div class='add'>+		return clk_get_rate(lp-&gt;axi_clk);</div><div class='add'>+	return 125000000; /* arbitrary guess if no clock rate set */</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='del'>- * axienet_usec_to_timer - Calculate IRQ delay timer value</div><div class='del'>- * @lp:		Pointer to the axienet_local structure</div><div class='del'>- * @coalesce_usec: Microseconds to convert into timer value</div><div class='add'>+ * axienet_calc_cr() - Calculate control register value</div><div class='add'>+ * @lp: Device private data</div><div class='add'>+ * @count: Number of completions before an interrupt</div><div class='add'>+ * @usec: Microseconds after the last completion before an interrupt</div><div class='add'>+ *</div><div class='add'>+ * Calculate a control register value based on the coalescing settings. The</div><div class='add'>+ * run/stop bit is not set.</div><div class='add'>+ *</div><div class='add'>+ * Return: Control register value with coalescing settings configured.</div><div class='ctx'>  */</div><div class='del'>-static u32 axienet_usec_to_timer(struct axienet_local *lp, u32 coalesce_usec)</div><div class='add'>+static u32 axienet_calc_cr(struct axienet_local *lp, u32 count, u32 usec)</div><div class='ctx'> {</div><div class='del'>-	u32 result;</div><div class='del'>-	u64 clk_rate = 125000000; /* arbitrary guess if no clock rate set */</div><div class='add'>+	u32 cr;</div><div class='ctx'> </div><div class='del'>-	if (lp-&gt;axi_clk)</div><div class='del'>-		clk_rate = clk_get_rate(lp-&gt;axi_clk);</div><div class='add'>+	cr = FIELD_PREP(XAXIDMA_COALESCE_MASK, count) | XAXIDMA_IRQ_IOC_MASK |</div><div class='add'>+	     XAXIDMA_IRQ_ERROR_MASK;</div><div class='add'>+	/* Only set interrupt delay timer if not generating an interrupt on</div><div class='add'>+	 * the first packet. Otherwise leave at 0 to disable delay interrupt.</div><div class='add'>+	 */</div><div class='add'>+	if (count &gt; 1) {</div><div class='add'>+		u64 clk_rate = axienet_dma_rate(lp);</div><div class='add'>+		u32 timer;</div><div class='add'>+</div><div class='add'>+		/* 1 Timeout Interval = 125 * (clock period of SG clock) */</div><div class='add'>+		timer = DIV64_U64_ROUND_CLOSEST((u64)usec * clk_rate,</div><div class='add'>+						XAXIDMA_DELAY_SCALE);</div><div class='add'>+</div><div class='add'>+		timer = min(timer, FIELD_MAX(XAXIDMA_DELAY_MASK));</div><div class='add'>+		cr |= FIELD_PREP(XAXIDMA_DELAY_MASK, timer) |</div><div class='add'>+		      XAXIDMA_IRQ_DELAY_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return cr;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* 1 Timeout Interval = 125 * (clock period of SG clock) */</div><div class='del'>-	result = DIV64_U64_ROUND_CLOSEST((u64)coalesce_usec * clk_rate,</div><div class='del'>-					 (u64)125000000);</div><div class='del'>-	if (result &gt; 255)</div><div class='del'>-		result = 255;</div><div class='add'>+/**</div><div class='add'>+ * axienet_coalesce_params() - Extract coalesce parameters from the CR</div><div class='add'>+ * @lp: Device private data</div><div class='add'>+ * @cr: The control register to parse</div><div class='add'>+ * @count: Number of packets before an interrupt</div><div class='add'>+ * @usec: Idle time (in usec) before an interrupt</div><div class='add'>+ */</div><div class='add'>+static void axienet_coalesce_params(struct axienet_local *lp, u32 cr,</div><div class='add'>+				    u32 *count, u32 *usec)</div><div class='add'>+{</div><div class='add'>+	u64 clk_rate = axienet_dma_rate(lp);</div><div class='add'>+	u64 timer = FIELD_GET(XAXIDMA_DELAY_MASK, cr);</div><div class='ctx'> </div><div class='del'>-	return result;</div><div class='add'>+	*count = FIELD_GET(XAXIDMA_COALESCE_MASK, cr);</div><div class='add'>+	*usec = DIV64_U64_ROUND_CLOSEST(timer * XAXIDMA_DELAY_SCALE, clk_rate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -251,30 +289,12 @@ static u32 axienet_usec_to_timer(struct axienet_local *lp, u32 coalesce_usec)</div><div class='ctx'>  */</div><div class='ctx'> static void axienet_dma_start(struct axienet_local *lp)</div><div class='ctx'> {</div><div class='add'>+	spin_lock_irq(&amp;lp-&gt;rx_cr_lock);</div><div class='add'>+</div><div class='ctx'> 	/* Start updating the Rx channel control register */</div><div class='del'>-	lp-&gt;rx_dma_cr = (lp-&gt;coalesce_count_rx &lt;&lt; XAXIDMA_COALESCE_SHIFT) |</div><div class='del'>-			XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_ERROR_MASK;</div><div class='del'>-	/* Only set interrupt delay timer if not generating an interrupt on</div><div class='del'>-	 * the first RX packet. Otherwise leave at 0 to disable delay interrupt.</div><div class='del'>-	 */</div><div class='del'>-	if (lp-&gt;coalesce_count_rx &gt; 1)</div><div class='del'>-		lp-&gt;rx_dma_cr |= (axienet_usec_to_timer(lp, lp-&gt;coalesce_usec_rx)</div><div class='del'>-					&lt;&lt; XAXIDMA_DELAY_SHIFT) |</div><div class='del'>-				 XAXIDMA_IRQ_DELAY_MASK;</div><div class='add'>+	lp-&gt;rx_dma_cr &amp;= ~XAXIDMA_CR_RUNSTOP_MASK;</div><div class='ctx'> 	axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp-&gt;rx_dma_cr);</div><div class='ctx'> </div><div class='del'>-	/* Start updating the Tx channel control register */</div><div class='del'>-	lp-&gt;tx_dma_cr = (lp-&gt;coalesce_count_tx &lt;&lt; XAXIDMA_COALESCE_SHIFT) |</div><div class='del'>-			XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_ERROR_MASK;</div><div class='del'>-	/* Only set interrupt delay timer if not generating an interrupt on</div><div class='del'>-	 * the first TX packet. Otherwise leave at 0 to disable delay interrupt.</div><div class='del'>-	 */</div><div class='del'>-	if (lp-&gt;coalesce_count_tx &gt; 1)</div><div class='del'>-		lp-&gt;tx_dma_cr |= (axienet_usec_to_timer(lp, lp-&gt;coalesce_usec_tx)</div><div class='del'>-					&lt;&lt; XAXIDMA_DELAY_SHIFT) |</div><div class='del'>-				 XAXIDMA_IRQ_DELAY_MASK;</div><div class='del'>-	axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp-&gt;tx_dma_cr);</div><div class='del'>-</div><div class='ctx'> 	/* Populate the tail pointer and bring the Rx Axi DMA engine out of</div><div class='ctx'> 	 * halted state. This will make the Rx side ready for reception.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -283,6 +303,14 @@ static void axienet_dma_start(struct axienet_local *lp)</div><div class='ctx'> 	axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp-&gt;rx_dma_cr);</div><div class='ctx'> 	axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, lp-&gt;rx_bd_p +</div><div class='ctx'> 			     (sizeof(*lp-&gt;rx_bd_v) * (lp-&gt;rx_bd_num - 1)));</div><div class='add'>+	lp-&gt;rx_dma_started = true;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;lp-&gt;rx_cr_lock);</div><div class='add'>+	spin_lock_irq(&amp;lp-&gt;tx_cr_lock);</div><div class='add'>+</div><div class='add'>+	/* Start updating the Tx channel control register */</div><div class='add'>+	lp-&gt;tx_dma_cr &amp;= ~XAXIDMA_CR_RUNSTOP_MASK;</div><div class='add'>+	axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp-&gt;tx_dma_cr);</div><div class='ctx'> </div><div class='ctx'> 	/* Write to the RS (Run-stop) bit in the Tx channel control register.</div><div class='ctx'> 	 * Tx channel is now ready to run. But only after we write to the</div><div class='hunk'>@@ -291,6 +319,9 @@ static void axienet_dma_start(struct axienet_local *lp)</div><div class='ctx'> 	axienet_dma_out_addr(lp, XAXIDMA_TX_CDESC_OFFSET, lp-&gt;tx_bd_p);</div><div class='ctx'> 	lp-&gt;tx_dma_cr |= XAXIDMA_CR_RUNSTOP_MASK;</div><div class='ctx'> 	axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp-&gt;tx_dma_cr);</div><div class='add'>+	lp-&gt;tx_dma_started = true;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;lp-&gt;tx_cr_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -626,14 +657,22 @@ static void axienet_dma_stop(struct axienet_local *lp)</div><div class='ctx'> 	int count;</div><div class='ctx'> 	u32 cr, sr;</div><div class='ctx'> </div><div class='del'>-	cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);</div><div class='del'>-	cr &amp;= ~(XAXIDMA_CR_RUNSTOP_MASK | XAXIDMA_IRQ_ALL_MASK);</div><div class='add'>+	spin_lock_irq(&amp;lp-&gt;rx_cr_lock);</div><div class='add'>+</div><div class='add'>+	cr = lp-&gt;rx_dma_cr &amp; ~(XAXIDMA_CR_RUNSTOP_MASK | XAXIDMA_IRQ_ALL_MASK);</div><div class='ctx'> 	axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr);</div><div class='add'>+	lp-&gt;rx_dma_started = false;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;lp-&gt;rx_cr_lock);</div><div class='ctx'> 	synchronize_irq(lp-&gt;rx_irq);</div><div class='ctx'> </div><div class='del'>-	cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);</div><div class='del'>-	cr &amp;= ~(XAXIDMA_CR_RUNSTOP_MASK | XAXIDMA_IRQ_ALL_MASK);</div><div class='add'>+	spin_lock_irq(&amp;lp-&gt;tx_cr_lock);</div><div class='add'>+</div><div class='add'>+	cr = lp-&gt;tx_dma_cr &amp; ~(XAXIDMA_CR_RUNSTOP_MASK | XAXIDMA_IRQ_ALL_MASK);</div><div class='ctx'> 	axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr);</div><div class='add'>+	lp-&gt;tx_dma_started = false;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;lp-&gt;tx_cr_lock);</div><div class='ctx'> 	synchronize_irq(lp-&gt;tx_irq);</div><div class='ctx'> </div><div class='ctx'> 	/* Give DMAs a chance to halt gracefully */</div><div class='hunk'>@@ -665,7 +704,8 @@ static void axienet_dma_stop(struct axienet_local *lp)</div><div class='ctx'>  * are connected to Axi Ethernet reset lines, this in turn resets the Axi</div><div class='ctx'>  * Ethernet core. No separate hardware reset is done for the Axi Ethernet</div><div class='ctx'>  * core.</div><div class='del'>- * Returns 0 on success or a negative error number otherwise.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error number otherwise.</div><div class='ctx'>  */</div><div class='ctx'> static int axienet_device_reset(struct net_device *ndev)</div><div class='ctx'> {</div><div class='hunk'>@@ -736,7 +776,8 @@ static int axienet_device_reset(struct net_device *ndev)</div><div class='ctx'>  *</div><div class='ctx'>  * Would either be called after a successful transmit operation, or after</div><div class='ctx'>  * there was an error when setting up the chain.</div><div class='del'>- * Returns the number of packets handled.</div><div class='add'>+ *</div><div class='add'>+ * Return: The number of packets handled.</div><div class='ctx'>  */</div><div class='ctx'> static int axienet_free_tx_chain(struct axienet_local *lp, u32 first_bd,</div><div class='ctx'> 				 int nr_bds, bool force, u32 *sizep, int budget)</div><div class='hunk'>@@ -843,7 +884,7 @@ static void axienet_dma_tx_cb(void *data, const struct dmaengine_result *result)</div><div class='ctx'> 	dev_consume_skb_any(skbuf_dma-&gt;skb);</div><div class='ctx'> 	netif_txq_completed_wake(txq, 1, len,</div><div class='ctx'> 				 CIRC_SPACE(lp-&gt;tx_ring_head, lp-&gt;tx_ring_tail, TX_BD_NUM_MAX),</div><div class='del'>-				 2 * MAX_SKB_FRAGS);</div><div class='add'>+				 2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -877,7 +918,7 @@ axienet_start_xmit_dmaengine(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	dma_dev = lp-&gt;tx_chan-&gt;device;</div><div class='ctx'> 	sg_len = skb_shinfo(skb)-&gt;nr_frags + 1;</div><div class='del'>-	if (CIRC_SPACE(lp-&gt;tx_ring_head, lp-&gt;tx_ring_tail, TX_BD_NUM_MAX) &lt;= sg_len) {</div><div class='add'>+	if (CIRC_SPACE(lp-&gt;tx_ring_head, lp-&gt;tx_ring_tail, TX_BD_NUM_MAX) &lt;= 1) {</div><div class='ctx'> 		netif_stop_queue(ndev);</div><div class='ctx'> 		if (net_ratelimit())</div><div class='ctx'> 			netdev_warn(ndev, "TX ring unexpectedly full\n");</div><div class='hunk'>@@ -924,13 +965,13 @@ axienet_start_xmit_dmaengine(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 	skbuf_dma-&gt;sg_len = sg_len;</div><div class='ctx'> 	dma_tx_desc-&gt;callback_param = lp;</div><div class='ctx'> 	dma_tx_desc-&gt;callback_result = axienet_dma_tx_cb;</div><div class='del'>-	dmaengine_submit(dma_tx_desc);</div><div class='del'>-	dma_async_issue_pending(lp-&gt;tx_chan);</div><div class='ctx'> 	txq = skb_get_tx_queue(lp-&gt;ndev, skb);</div><div class='ctx'> 	netdev_tx_sent_queue(txq, skb-&gt;len);</div><div class='ctx'> 	netif_txq_maybe_stop(txq, CIRC_SPACE(lp-&gt;tx_ring_head, lp-&gt;tx_ring_tail, TX_BD_NUM_MAX),</div><div class='del'>-			     MAX_SKB_FRAGS + 1, 2 * MAX_SKB_FRAGS);</div><div class='add'>+			     1, 2);</div><div class='ctx'> </div><div class='add'>+	dmaengine_submit(dma_tx_desc);</div><div class='add'>+	dma_async_issue_pending(lp-&gt;tx_chan);</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> xmit_error_unmap_sg:</div><div class='hunk'>@@ -965,6 +1006,7 @@ static int axienet_tx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 					&amp;size, budget);</div><div class='ctx'> </div><div class='ctx'> 	if (packets) {</div><div class='add'>+		netdev_completed_queue(ndev, packets, size);</div><div class='ctx'> 		u64_stats_update_begin(&amp;lp-&gt;tx_stat_sync);</div><div class='ctx'> 		u64_stats_add(&amp;lp-&gt;tx_packets, packets);</div><div class='ctx'> 		u64_stats_add(&amp;lp-&gt;tx_bytes, size);</div><div class='hunk'>@@ -982,7 +1024,9 @@ static int axienet_tx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		 * cause an immediate interrupt if any TX packets are</div><div class='ctx'> 		 * already pending.</div><div class='ctx'> 		 */</div><div class='add'>+		spin_lock_irq(&amp;lp-&gt;tx_cr_lock);</div><div class='ctx'> 		axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, lp-&gt;tx_dma_cr);</div><div class='add'>+		spin_unlock_irq(&amp;lp-&gt;tx_cr_lock);</div><div class='ctx'> 	}</div><div class='ctx'> 	return packets;</div><div class='ctx'> }</div><div class='hunk'>@@ -1086,6 +1130,7 @@ axienet_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 	if (++new_tail_ptr &gt;= lp-&gt;tx_bd_num)</div><div class='ctx'> 		new_tail_ptr = 0;</div><div class='ctx'> 	WRITE_ONCE(lp-&gt;tx_bd_tail, new_tail_ptr);</div><div class='add'>+	netdev_sent_queue(ndev, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	/* Start the transfer */</div><div class='ctx'> 	axienet_dma_out_addr(lp, XAXIDMA_TX_TDESC_OFFSET, tail_p);</div><div class='hunk'>@@ -1119,6 +1164,7 @@ static void axienet_dma_rx_cb(void *data, const struct dmaengine_result *result)</div><div class='ctx'> 	struct axienet_local *lp = data;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	u32 *app_metadata;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	skbuf_dma = axienet_get_rx_desc(lp, lp-&gt;rx_ring_tail++);</div><div class='ctx'> 	skb = skbuf_dma-&gt;skb;</div><div class='hunk'>@@ -1126,6 +1172,15 @@ static void axienet_dma_rx_cb(void *data, const struct dmaengine_result *result)</div><div class='ctx'> 						       &amp;meta_max_len);</div><div class='ctx'> 	dma_unmap_single(lp-&gt;dev, skbuf_dma-&gt;dma_address, lp-&gt;max_frm_size,</div><div class='ctx'> 			 DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(app_metadata)) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(lp-&gt;ndev, "Failed to get RX metadata pointer\n");</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		lp-&gt;ndev-&gt;stats.rx_dropped++;</div><div class='add'>+		goto rx_submit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* TODO: Derive app word index programmatically */</div><div class='ctx'> 	rx_len = (app_metadata[LEN_APP] &amp; 0xFFFF);</div><div class='ctx'> 	skb_put(skb, rx_len);</div><div class='hunk'>@@ -1137,7 +1192,11 @@ static void axienet_dma_rx_cb(void *data, const struct dmaengine_result *result)</div><div class='ctx'> 	u64_stats_add(&amp;lp-&gt;rx_packets, 1);</div><div class='ctx'> 	u64_stats_add(&amp;lp-&gt;rx_bytes, rx_len);</div><div class='ctx'> 	u64_stats_update_end(&amp;lp-&gt;rx_stat_sync);</div><div class='del'>-	axienet_rx_submit_desc(lp-&gt;ndev);</div><div class='add'>+</div><div class='add'>+rx_submit:</div><div class='add'>+	for (i = 0; i &lt; CIRC_SPACE(lp-&gt;rx_ring_head, lp-&gt;rx_ring_tail,</div><div class='add'>+				   RX_BUF_NUM_DEFAULT); i++)</div><div class='add'>+		axienet_rx_submit_desc(lp-&gt;ndev);</div><div class='ctx'> 	dma_async_issue_pending(lp-&gt;rx_chan);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1244,11 +1303,25 @@ static int axienet_rx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		axienet_dma_out_addr(lp, XAXIDMA_RX_TDESC_OFFSET, tail_p);</div><div class='ctx'> </div><div class='ctx'> 	if (packets &lt; budget &amp;&amp; napi_complete_done(napi, packets)) {</div><div class='add'>+		if (READ_ONCE(lp-&gt;rx_dim_enabled)) {</div><div class='add'>+			struct dim_sample sample = {</div><div class='add'>+				.time = ktime_get(),</div><div class='add'>+				/* Safe because we are the only writer */</div><div class='add'>+				.pkt_ctr = u64_stats_read(&amp;lp-&gt;rx_packets),</div><div class='add'>+				.byte_ctr = u64_stats_read(&amp;lp-&gt;rx_bytes),</div><div class='add'>+				.event_ctr = READ_ONCE(lp-&gt;rx_irqs),</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			net_dim(&amp;lp-&gt;rx_dim, &amp;sample);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* Re-enable RX completion interrupts. This should</div><div class='ctx'> 		 * cause an immediate interrupt if any RX packets are</div><div class='ctx'> 		 * already pending.</div><div class='ctx'> 		 */</div><div class='add'>+		spin_lock_irq(&amp;lp-&gt;rx_cr_lock);</div><div class='ctx'> 		axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, lp-&gt;rx_dma_cr);</div><div class='add'>+		spin_unlock_irq(&amp;lp-&gt;rx_cr_lock);</div><div class='ctx'> 	}</div><div class='ctx'> 	return packets;</div><div class='ctx'> }</div><div class='hunk'>@@ -1286,11 +1359,14 @@ static irqreturn_t axienet_tx_irq(int irq, void *_ndev)</div><div class='ctx'> 		/* Disable further TX completion interrupts and schedule</div><div class='ctx'> 		 * NAPI to handle the completions.</div><div class='ctx'> 		 */</div><div class='del'>-		u32 cr = lp-&gt;tx_dma_cr;</div><div class='del'>-</div><div class='del'>-		cr &amp;= ~(XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK);</div><div class='ctx'> 		if (napi_schedule_prep(&amp;lp-&gt;napi_tx)) {</div><div class='add'>+			u32 cr;</div><div class='add'>+</div><div class='add'>+			spin_lock(&amp;lp-&gt;tx_cr_lock);</div><div class='add'>+			cr = lp-&gt;tx_dma_cr;</div><div class='add'>+			cr &amp;= ~(XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK);</div><div class='ctx'> 			axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr);</div><div class='add'>+			spin_unlock(&amp;lp-&gt;tx_cr_lock);</div><div class='ctx'> 			__napi_schedule(&amp;lp-&gt;napi_tx);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1331,11 +1407,16 @@ static irqreturn_t axienet_rx_irq(int irq, void *_ndev)</div><div class='ctx'> 		/* Disable further RX completion interrupts and schedule</div><div class='ctx'> 		 * NAPI receive.</div><div class='ctx'> 		 */</div><div class='del'>-		u32 cr = lp-&gt;rx_dma_cr;</div><div class='del'>-</div><div class='del'>-		cr &amp;= ~(XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK);</div><div class='add'>+		WRITE_ONCE(lp-&gt;rx_irqs, READ_ONCE(lp-&gt;rx_irqs) + 1);</div><div class='ctx'> 		if (napi_schedule_prep(&amp;lp-&gt;napi_rx)) {</div><div class='add'>+			u32 cr;</div><div class='add'>+</div><div class='add'>+			spin_lock(&amp;lp-&gt;rx_cr_lock);</div><div class='add'>+			cr = lp-&gt;rx_dma_cr;</div><div class='add'>+			cr &amp;= ~(XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK);</div><div class='ctx'> 			axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr);</div><div class='add'>+			spin_unlock(&amp;lp-&gt;rx_cr_lock);</div><div class='add'>+</div><div class='ctx'> 			__napi_schedule(&amp;lp-&gt;napi_rx);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1394,7 +1475,6 @@ static void axienet_rx_submit_desc(struct net_device *ndev)</div><div class='ctx'> 	if (!skbuf_dma)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	lp-&gt;rx_ring_head++;</div><div class='ctx'> 	skb = netdev_alloc_skb(ndev, lp-&gt;max_frm_size);</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1419,6 +1499,7 @@ static void axienet_rx_submit_desc(struct net_device *ndev)</div><div class='ctx'> 	skbuf_dma-&gt;desc = dma_rx_desc;</div><div class='ctx'> 	dma_rx_desc-&gt;callback_param = lp;</div><div class='ctx'> 	dma_rx_desc-&gt;callback_result = axienet_dma_rx_cb;</div><div class='add'>+	lp-&gt;rx_ring_head++;</div><div class='ctx'> 	dmaengine_submit(dma_rx_desc);</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='hunk'>@@ -1628,6 +1709,7 @@ err_free_eth_irq:</div><div class='ctx'> 	if (lp-&gt;eth_irq &gt; 0)</div><div class='ctx'> 		free_irq(lp-&gt;eth_irq, ndev);</div><div class='ctx'> err_phy:</div><div class='add'>+	cancel_work_sync(&amp;lp-&gt;rx_dim.work);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;lp-&gt;stats_work);</div><div class='ctx'> 	phylink_stop(lp-&gt;phylink);</div><div class='ctx'> 	phylink_disconnect_phy(lp-&gt;phylink);</div><div class='hunk'>@@ -1657,6 +1739,7 @@ static int axienet_stop(struct net_device *ndev)</div><div class='ctx'> 		napi_disable(&amp;lp-&gt;napi_rx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	cancel_work_sync(&amp;lp-&gt;rx_dim.work);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;lp-&gt;stats_work);</div><div class='ctx'> </div><div class='ctx'> 	phylink_stop(lp-&gt;phylink);</div><div class='hunk'>@@ -1688,6 +1771,7 @@ static int axienet_stop(struct net_device *ndev)</div><div class='ctx'> 		dma_release_channel(lp-&gt;tx_chan);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_reset_queue(ndev);</div><div class='ctx'> 	axienet_iow(lp, XAE_IE_OFFSET, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;eth_irq &gt; 0)</div><div class='hunk'>@@ -2002,6 +2086,89 @@ axienet_ethtools_set_pauseparam(struct net_device *ndev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * axienet_update_coalesce_rx() - Set RX CR</div><div class='add'>+ * @lp: Device private data</div><div class='add'>+ * @cr: Value to write to the RX CR</div><div class='add'>+ * @mask: Bits to set from @cr</div><div class='add'>+ */</div><div class='add'>+static void axienet_update_coalesce_rx(struct axienet_local *lp, u32 cr,</div><div class='add'>+				       u32 mask)</div><div class='add'>+{</div><div class='add'>+	spin_lock_irq(&amp;lp-&gt;rx_cr_lock);</div><div class='add'>+	lp-&gt;rx_dma_cr &amp;= ~mask;</div><div class='add'>+	lp-&gt;rx_dma_cr |= cr;</div><div class='add'>+	/* If DMA isn't started, then the settings will be applied the next</div><div class='add'>+	 * time dma_start() is called.</div><div class='add'>+	 */</div><div class='add'>+	if (lp-&gt;rx_dma_started) {</div><div class='add'>+		u32 reg = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);</div><div class='add'>+</div><div class='add'>+		/* Don't enable IRQs if they are disabled by NAPI */</div><div class='add'>+		if (reg &amp; XAXIDMA_IRQ_ALL_MASK)</div><div class='add'>+			cr = lp-&gt;rx_dma_cr;</div><div class='add'>+		else</div><div class='add'>+			cr = lp-&gt;rx_dma_cr &amp; ~XAXIDMA_IRQ_ALL_MASK;</div><div class='add'>+		axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;lp-&gt;rx_cr_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * axienet_dim_coalesce_count_rx() - RX coalesce count for DIM</div><div class='add'>+ * @lp: Device private data</div><div class='add'>+ *</div><div class='add'>+ * Return: RX coalescing frame count value for DIM.</div><div class='add'>+ */</div><div class='add'>+static u32 axienet_dim_coalesce_count_rx(struct axienet_local *lp)</div><div class='add'>+{</div><div class='add'>+	return min(1 &lt;&lt; (lp-&gt;rx_dim.profile_ix &lt;&lt; 1), 255);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * axienet_rx_dim_work() - Adjust RX DIM settings</div><div class='add'>+ * @work: The work struct</div><div class='add'>+ */</div><div class='add'>+static void axienet_rx_dim_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct axienet_local *lp =</div><div class='add'>+		container_of(work, struct axienet_local, rx_dim.work);</div><div class='add'>+	u32 cr = axienet_calc_cr(lp, axienet_dim_coalesce_count_rx(lp), 0);</div><div class='add'>+	u32 mask = XAXIDMA_COALESCE_MASK | XAXIDMA_IRQ_IOC_MASK |</div><div class='add'>+		   XAXIDMA_IRQ_ERROR_MASK;</div><div class='add'>+</div><div class='add'>+	axienet_update_coalesce_rx(lp, cr, mask);</div><div class='add'>+	lp-&gt;rx_dim.state = DIM_START_MEASURE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * axienet_update_coalesce_tx() - Set TX CR</div><div class='add'>+ * @lp: Device private data</div><div class='add'>+ * @cr: Value to write to the TX CR</div><div class='add'>+ * @mask: Bits to set from @cr</div><div class='add'>+ */</div><div class='add'>+static void axienet_update_coalesce_tx(struct axienet_local *lp, u32 cr,</div><div class='add'>+				       u32 mask)</div><div class='add'>+{</div><div class='add'>+	spin_lock_irq(&amp;lp-&gt;tx_cr_lock);</div><div class='add'>+	lp-&gt;tx_dma_cr &amp;= ~mask;</div><div class='add'>+	lp-&gt;tx_dma_cr |= cr;</div><div class='add'>+	/* If DMA isn't started, then the settings will be applied the next</div><div class='add'>+	 * time dma_start() is called.</div><div class='add'>+	 */</div><div class='add'>+	if (lp-&gt;tx_dma_started) {</div><div class='add'>+		u32 reg = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);</div><div class='add'>+</div><div class='add'>+		/* Don't enable IRQs if they are disabled by NAPI */</div><div class='add'>+		if (reg &amp; XAXIDMA_IRQ_ALL_MASK)</div><div class='add'>+			cr = lp-&gt;tx_dma_cr;</div><div class='add'>+		else</div><div class='add'>+			cr = lp-&gt;tx_dma_cr &amp; ~XAXIDMA_IRQ_ALL_MASK;</div><div class='add'>+		axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irq(&amp;lp-&gt;tx_cr_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * axienet_ethtools_get_coalesce - Get DMA interrupt coalescing count.</div><div class='ctx'>  * @ndev:	Pointer to net_device structure</div><div class='ctx'>  * @ecoalesce:	Pointer to ethtool_coalesce structure</div><div class='hunk'>@@ -2021,11 +2188,23 @@ axienet_ethtools_get_coalesce(struct net_device *ndev,</div><div class='ctx'> 			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct axienet_local *lp = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	ecoalesce-&gt;rx_max_coalesced_frames = lp-&gt;coalesce_count_rx;</div><div class='del'>-	ecoalesce-&gt;rx_coalesce_usecs = lp-&gt;coalesce_usec_rx;</div><div class='del'>-	ecoalesce-&gt;tx_max_coalesced_frames = lp-&gt;coalesce_count_tx;</div><div class='del'>-	ecoalesce-&gt;tx_coalesce_usecs = lp-&gt;coalesce_usec_tx;</div><div class='add'>+	u32 cr;</div><div class='add'>+</div><div class='add'>+	ecoalesce-&gt;use_adaptive_rx_coalesce = lp-&gt;rx_dim_enabled;</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;lp-&gt;rx_cr_lock);</div><div class='add'>+	cr = lp-&gt;rx_dma_cr;</div><div class='add'>+	spin_unlock_irq(&amp;lp-&gt;rx_cr_lock);</div><div class='add'>+	axienet_coalesce_params(lp, cr,</div><div class='add'>+				&amp;ecoalesce-&gt;rx_max_coalesced_frames,</div><div class='add'>+				&amp;ecoalesce-&gt;rx_coalesce_usecs);</div><div class='add'>+</div><div class='add'>+	spin_lock_irq(&amp;lp-&gt;tx_cr_lock);</div><div class='add'>+	cr = lp-&gt;tx_dma_cr;</div><div class='add'>+	spin_unlock_irq(&amp;lp-&gt;tx_cr_lock);</div><div class='add'>+	axienet_coalesce_params(lp, cr,</div><div class='add'>+				&amp;ecoalesce-&gt;tx_max_coalesced_frames,</div><div class='add'>+				&amp;ecoalesce-&gt;tx_coalesce_usecs);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2049,22 +2228,56 @@ axienet_ethtools_set_coalesce(struct net_device *ndev,</div><div class='ctx'> 			      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct axienet_local *lp = netdev_priv(ndev);</div><div class='add'>+	bool new_dim = ecoalesce-&gt;use_adaptive_rx_coalesce;</div><div class='add'>+	bool old_dim = lp-&gt;rx_dim_enabled;</div><div class='add'>+	u32 cr, mask = ~XAXIDMA_CR_RUNSTOP_MASK;</div><div class='ctx'> </div><div class='del'>-	if (netif_running(ndev)) {</div><div class='add'>+	if (ecoalesce-&gt;rx_max_coalesced_frames &gt; 255 ||</div><div class='add'>+	    ecoalesce-&gt;tx_max_coalesced_frames &gt; 255) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "frames must be less than 256");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ecoalesce-&gt;rx_max_coalesced_frames ||</div><div class='add'>+	    !ecoalesce-&gt;tx_max_coalesced_frames) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "frames must be non-zero");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (((ecoalesce-&gt;rx_max_coalesced_frames &gt; 1 || new_dim) &amp;&amp;</div><div class='add'>+	     !ecoalesce-&gt;rx_coalesce_usecs) ||</div><div class='add'>+	    (ecoalesce-&gt;tx_max_coalesced_frames &gt; 1 &amp;&amp;</div><div class='add'>+	     !ecoalesce-&gt;tx_coalesce_usecs)) {</div><div class='ctx'> 		NL_SET_ERR_MSG(extack,</div><div class='del'>-			       "Please stop netif before applying configuration");</div><div class='del'>-		return -EBUSY;</div><div class='add'>+			       "usecs must be non-zero when frames is greater than one");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_dim &amp;&amp; !old_dim) {</div><div class='add'>+		cr = axienet_calc_cr(lp, axienet_dim_coalesce_count_rx(lp),</div><div class='add'>+				     ecoalesce-&gt;rx_coalesce_usecs);</div><div class='add'>+	} else if (!new_dim) {</div><div class='add'>+		if (old_dim) {</div><div class='add'>+			WRITE_ONCE(lp-&gt;rx_dim_enabled, false);</div><div class='add'>+			napi_synchronize(&amp;lp-&gt;napi_rx);</div><div class='add'>+			flush_work(&amp;lp-&gt;rx_dim.work);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cr = axienet_calc_cr(lp, ecoalesce-&gt;rx_max_coalesced_frames,</div><div class='add'>+				     ecoalesce-&gt;rx_coalesce_usecs);</div><div class='add'>+	} else {</div><div class='add'>+		/* Dummy value for count just to calculate timer */</div><div class='add'>+		cr = axienet_calc_cr(lp, 2, ecoalesce-&gt;rx_coalesce_usecs);</div><div class='add'>+		mask = XAXIDMA_DELAY_MASK | XAXIDMA_IRQ_DELAY_MASK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ecoalesce-&gt;rx_max_coalesced_frames)</div><div class='del'>-		lp-&gt;coalesce_count_rx = ecoalesce-&gt;rx_max_coalesced_frames;</div><div class='del'>-	if (ecoalesce-&gt;rx_coalesce_usecs)</div><div class='del'>-		lp-&gt;coalesce_usec_rx = ecoalesce-&gt;rx_coalesce_usecs;</div><div class='del'>-	if (ecoalesce-&gt;tx_max_coalesced_frames)</div><div class='del'>-		lp-&gt;coalesce_count_tx = ecoalesce-&gt;tx_max_coalesced_frames;</div><div class='del'>-	if (ecoalesce-&gt;tx_coalesce_usecs)</div><div class='del'>-		lp-&gt;coalesce_usec_tx = ecoalesce-&gt;tx_coalesce_usecs;</div><div class='add'>+	axienet_update_coalesce_rx(lp, cr, mask);</div><div class='add'>+	if (new_dim &amp;&amp; !old_dim)</div><div class='add'>+		WRITE_ONCE(lp-&gt;rx_dim_enabled, true);</div><div class='ctx'> </div><div class='add'>+	cr = axienet_calc_cr(lp, ecoalesce-&gt;tx_max_coalesced_frames,</div><div class='add'>+			     ecoalesce-&gt;tx_coalesce_usecs);</div><div class='add'>+	axienet_update_coalesce_tx(lp, cr, ~XAXIDMA_CR_RUNSTOP_MASK);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2302,7 +2515,8 @@ axienet_ethtool_get_rmon_stats(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops axienet_ethtool_ops = {</div><div class='ctx'> 	.supported_coalesce_params = ETHTOOL_COALESCE_MAX_FRAMES |</div><div class='del'>-				     ETHTOOL_COALESCE_USECS,</div><div class='add'>+				     ETHTOOL_COALESCE_USECS |</div><div class='add'>+				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX,</div><div class='ctx'> 	.get_drvinfo    = axienet_ethtools_get_drvinfo,</div><div class='ctx'> 	.get_regs_len   = axienet_ethtools_get_regs_len,</div><div class='ctx'> 	.get_regs       = axienet_ethtools_get_regs,</div><div class='hunk'>@@ -2331,11 +2545,12 @@ static struct axienet_local *pcs_to_axienet_local(struct phylink_pcs *pcs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void axienet_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				  unsigned int neg_mode,</div><div class='ctx'> 				  struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct mdio_device *pcs_phy = pcs_to_axienet_local(pcs)-&gt;pcs_phy;</div><div class='ctx'> </div><div class='del'>-	phylink_mii_c22_pcs_get_state(pcs_phy, state);</div><div class='add'>+	phylink_mii_c22_pcs_get_state(pcs_phy, neg_mode, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void axienet_pcs_an_restart(struct phylink_pcs *pcs)</div><div class='hunk'>@@ -2484,6 +2699,7 @@ static void axienet_dma_err_handler(struct work_struct *work)</div><div class='ctx'> 			   ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN));</div><div class='ctx'> </div><div class='ctx'> 	axienet_dma_stop(lp);</div><div class='add'>+	netdev_reset_queue(ndev);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; lp-&gt;tx_bd_num; i++) {</div><div class='ctx'> 		cur_p = &amp;lp-&gt;tx_bd_v[i];</div><div class='hunk'>@@ -2784,7 +3000,7 @@ static int axienet_probe(struct platform_device *pdev)</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!IS_ENABLED(CONFIG_64BIT) &amp;&amp; lp-&gt;features &amp; XAE_FEATURE_DMA_64BIT) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "64-bit addressable DMA is not compatible with 32-bit archecture\n");</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "64-bit addressable DMA is not compatible with 32-bit architecture\n");</div><div class='ctx'> 			ret = -EINVAL;</div><div class='ctx'> 			goto cleanup_clk;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2843,10 +3059,15 @@ static int axienet_probe(struct platform_device *pdev)</div><div class='ctx'> 		axienet_set_mac_address(ndev, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lp-&gt;coalesce_count_rx = XAXIDMA_DFT_RX_THRESHOLD;</div><div class='del'>-	lp-&gt;coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;</div><div class='del'>-	lp-&gt;coalesce_usec_rx = XAXIDMA_DFT_RX_USEC;</div><div class='del'>-	lp-&gt;coalesce_usec_tx = XAXIDMA_DFT_TX_USEC;</div><div class='add'>+	spin_lock_init(&amp;lp-&gt;rx_cr_lock);</div><div class='add'>+	spin_lock_init(&amp;lp-&gt;tx_cr_lock);</div><div class='add'>+	INIT_WORK(&amp;lp-&gt;rx_dim.work, axienet_rx_dim_work);</div><div class='add'>+	lp-&gt;rx_dim_enabled = true;</div><div class='add'>+	lp-&gt;rx_dim.profile_ix = 1;</div><div class='add'>+	lp-&gt;rx_dma_cr = axienet_calc_cr(lp, axienet_dim_coalesce_count_rx(lp),</div><div class='add'>+					XAXIDMA_DFT_RX_USEC);</div><div class='add'>+	lp-&gt;tx_dma_cr = axienet_calc_cr(lp, XAXIDMA_DFT_TX_THRESHOLD,</div><div class='add'>+					XAXIDMA_DFT_TX_USEC);</div><div class='ctx'> </div><div class='ctx'> 	ret = axienet_mdio_setup(lp);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -2876,12 +3097,12 @@ static int axienet_probe(struct platform_device *pdev)</div><div class='ctx'> 		}</div><div class='ctx'> 		of_node_put(np);</div><div class='ctx'> 		lp-&gt;pcs.ops = &amp;axienet_pcs_ops;</div><div class='del'>-		lp-&gt;pcs.neg_mode = true;</div><div class='ctx'> 		lp-&gt;pcs.poll = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;phylink_config.dev = &amp;ndev-&gt;dev;</div><div class='ctx'> 	lp-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='add'>+	lp-&gt;phylink_config.mac_managed_pm = true;</div><div class='ctx'> 	lp-&gt;phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE |</div><div class='ctx'> 		MAC_10FD | MAC_100FD | MAC_1000FD;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c<br/>index ecf47107146d..4719d40a63ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xilinx/xilinx_emaclite.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xilinx/xilinx_emaclite.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xilinx/xilinx_emaclite.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/xilinx/xilinx_emaclite.c</a></div><div class='hunk'>@@ -286,7 +286,7 @@ static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,</div><div class='ctx'> </div><div class='ctx'> 		/* Read the remaining data */</div><div class='ctx'> 		for (; length &gt; 0; length--)</div><div class='del'>-			*to_u8_ptr = *from_u8_ptr;</div><div class='add'>+			*to_u8_ptr++ = *from_u8_ptr++;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/xircom/xirc2ps_cs.c b/drivers/net/ethernet/xircom/xirc2ps_cs.c<br/>index a31d5d5e6593..97e88886253f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xircom/xirc2ps_cs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xircom/xirc2ps_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xircom/xirc2ps_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/xircom/xirc2ps_cs.c</a></div><div class='hunk'>@@ -1576,7 +1576,7 @@ do_reset(struct net_device *dev, int full)</div><div class='ctx'> 	    msleep(40);			/* wait 40 msec to let it complete */</div><div class='ctx'> 	}</div><div class='ctx'> 	if (full_duplex)</div><div class='del'>-	    PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR | FullDuplex));</div><div class='add'>+	    PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR) | FullDuplex);</div><div class='ctx'>     } else {  /* No MII */</div><div class='ctx'> 	SelectPage(0);</div><div class='ctx'> 	value = GetByte(XIRCREG_ESR);	 /* read the ESR */</div><div class='head'>diff --git a/drivers/net/ethernet/xscale/ixp4xx_eth.c b/drivers/net/ethernet/xscale/ixp4xx_eth.c<br/>index a2ab1c150822..e1e7f65553e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xscale/ixp4xx_eth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ethernet/xscale/ixp4xx_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/xscale/ixp4xx_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/xscale/ixp4xx_eth.c</a></div><div class='hunk'>@@ -394,16 +394,20 @@ static void ixp_tx_timestamp(struct port *port, struct sk_buff *skb)</div><div class='ctx'> 	__raw_writel(TX_SNAPSHOT_LOCKED, &amp;regs-&gt;channel[ch].ch_event);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+static int ixp4xx_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *cfg,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='ctx'> 	struct ixp46x_ts_regs *regs;</div><div class='ctx'> 	struct port *port = netdev_priv(netdev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int ch;</div><div class='ctx'> </div><div class='del'>-	if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	if (!cpu_is_ixp46x())</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev))</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	ret = ixp46x_ptp_find(&amp;port-&gt;timesync_regs, &amp;port-&gt;phc_index);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -412,10 +416,10 @@ static int hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 	ch = PORT2CHANNEL(port);</div><div class='ctx'> 	regs = port-&gt;timesync_regs;</div><div class='ctx'> </div><div class='del'>-	if (cfg.tx_type != HWTSTAMP_TX_OFF &amp;&amp; cfg.tx_type != HWTSTAMP_TX_ON)</div><div class='add'>+	if (cfg-&gt;tx_type != HWTSTAMP_TX_OFF &amp;&amp; cfg-&gt;tx_type != HWTSTAMP_TX_ON)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='del'>-	switch (cfg.rx_filter) {</div><div class='add'>+	switch (cfg-&gt;rx_filter) {</div><div class='ctx'> 	case HWTSTAMP_FILTER_NONE:</div><div class='ctx'> 		port-&gt;hwts_rx_en = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -431,39 +435,45 @@ static int hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	port-&gt;hwts_tx_en = cfg.tx_type == HWTSTAMP_TX_ON;</div><div class='add'>+	port-&gt;hwts_tx_en = cfg-&gt;tx_type == HWTSTAMP_TX_ON;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear out any old time stamps. */</div><div class='ctx'> 	__raw_writel(TX_SNAPSHOT_LOCKED | RX_SNAPSHOT_LOCKED,</div><div class='ctx'> 		     &amp;regs-&gt;channel[ch].ch_event);</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)</div><div class='add'>+static int ixp4xx_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *cfg)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config cfg;</div><div class='ctx'> 	struct port *port = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	cfg.flags = 0;</div><div class='del'>-	cfg.tx_type = port-&gt;hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='add'>+	if (!cpu_is_ixp46x())</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;flags = 0;</div><div class='add'>+	cfg-&gt;tx_type = port-&gt;hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;</div><div class='ctx'> </div><div class='ctx'> 	switch (port-&gt;hwts_rx_en) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		cfg.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+		cfg-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PTP_SLAVE_MODE:</div><div class='del'>-		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_SYNC;</div><div class='add'>+		cfg-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_SYNC;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PTP_MASTER_MODE:</div><div class='del'>-		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ;</div><div class='add'>+		cfg-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		WARN_ON_ONCE(1);</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)) ? -EFAULT : 0;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ixp4xx_mdio_cmd(struct mii_bus *bus, int phy_id, int location,</div><div class='hunk'>@@ -985,21 +995,6 @@ static void eth_set_mcast_list(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int eth_ioctl(struct net_device *dev, struct ifreq *req, int cmd)</div><div class='del'>-{</div><div class='del'>-	if (!netif_running(dev))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (cpu_is_ixp46x()) {</div><div class='del'>-		if (cmd == SIOCSHWTSTAMP)</div><div class='del'>-			return hwtstamp_set(dev, req);</div><div class='del'>-		if (cmd == SIOCGHWTSTAMP)</div><div class='del'>-			return hwtstamp_get(dev, req);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return phy_mii_ioctl(dev-&gt;phydev, req, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* ethtool support */</div><div class='ctx'> </div><div class='ctx'> static void ixp4xx_get_drvinfo(struct net_device *dev,</div><div class='hunk'>@@ -1433,9 +1428,11 @@ static const struct net_device_ops ixp4xx_netdev_ops = {</div><div class='ctx'> 	.ndo_change_mtu = ixp4xx_eth_change_mtu,</div><div class='ctx'> 	.ndo_start_xmit = eth_xmit,</div><div class='ctx'> 	.ndo_set_rx_mode = eth_set_mcast_list,</div><div class='del'>-	.ndo_eth_ioctl = eth_ioctl,</div><div class='add'>+	.ndo_eth_ioctl = phy_do_ioctl_running,</div><div class='ctx'> 	.ndo_set_mac_address = eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr = eth_validate_addr,</div><div class='add'>+	.ndo_hwtstamp_get = ixp4xx_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = ixp4xx_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct eth_plat_info *ixp4xx_of_get_platdata(struct device *dev)</div><div class='head'>diff --git a/drivers/net/fddi/defza.c b/drivers/net/fddi/defza.c<br/>index f5c25acaa577..2098c3068d34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/fddi/defza.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/fddi/defza.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/fddi/defza.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/fddi/defza.c</a></div><div class='hunk'>@@ -983,7 +983,7 @@ static irqreturn_t fza_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 		case FZA_STATE_UNINITIALIZED:</div><div class='ctx'> 			netif_carrier_off(dev);</div><div class='del'>-			del_timer_sync(&amp;fp-&gt;reset_timer);</div><div class='add'>+			timer_delete_sync(&amp;fp-&gt;reset_timer);</div><div class='ctx'> 			fp-&gt;ring_cmd_index = 0;</div><div class='ctx'> 			fp-&gt;ring_uns_index = 0;</div><div class='ctx'> 			fp-&gt;ring_rmc_tx_index = 0;</div><div class='hunk'>@@ -1017,7 +1017,7 @@ static irqreturn_t fza_interrupt(int irq, void *dev_id)</div><div class='ctx'> 			fp-&gt;queue_active = 0;</div><div class='ctx'> 			netif_stop_queue(dev);</div><div class='ctx'> 			pr_debug("%s: queue stopped\n", fp-&gt;name);</div><div class='del'>-			del_timer_sync(&amp;fp-&gt;reset_timer);</div><div class='add'>+			timer_delete_sync(&amp;fp-&gt;reset_timer);</div><div class='ctx'> 			pr_warn("%s: halted, reason: %x\n", fp-&gt;name,</div><div class='ctx'> 				FZA_STATUS_GET_HALT(status));</div><div class='ctx'> 			fza_regs_dump(fp);</div><div class='hunk'>@@ -1044,7 +1044,7 @@ static irqreturn_t fza_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> static void fza_reset_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct fza_private *fp = from_timer(fp, t, reset_timer);</div><div class='add'>+	struct fza_private *fp = timer_container_of(fp, t, reset_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (!fp-&gt;timer_state) {</div><div class='ctx'> 		pr_err("%s: RESET timed out!\n", fp-&gt;name);</div><div class='hunk'>@@ -1227,7 +1227,7 @@ static int fza_close(struct net_device *dev)</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	pr_debug("%s: queue stopped\n", fp-&gt;name);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;fp-&gt;reset_timer);</div><div class='add'>+	timer_delete_sync(&amp;fp-&gt;reset_timer);</div><div class='ctx'> 	spin_lock_irqsave(&amp;fp-&gt;lock, flags);</div><div class='ctx'> 	fp-&gt;state = FZA_STATE_UNINITIALIZED;</div><div class='ctx'> 	fp-&gt;state_chg_flag = 0;</div><div class='hunk'>@@ -1493,7 +1493,7 @@ static int fza_probe(struct device *bdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_out_irq:</div><div class='del'>-	del_timer_sync(&amp;fp-&gt;reset_timer);</div><div class='add'>+	timer_delete_sync(&amp;fp-&gt;reset_timer);</div><div class='ctx'> 	fza_do_shutdown(fp);</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1520,7 +1520,7 @@ static int fza_remove(struct device *bdev)</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;fp-&gt;reset_timer);</div><div class='add'>+	timer_delete_sync(&amp;fp-&gt;reset_timer);</div><div class='ctx'> 	fza_do_shutdown(fp);</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/fjes/fjes_main.c b/drivers/net/fjes/fjes_main.c<br/>index 4a4ed2ccf72f..b63965d9a1ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/fjes/fjes_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/fjes/fjes_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/fjes/fjes_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/fjes/fjes_main.c</a></div><div class='hunk'>@@ -1364,14 +1364,15 @@ static int fjes_probe(struct platform_device *plat_dev)</div><div class='ctx'> 	adapter-&gt;force_reset = false;</div><div class='ctx'> 	adapter-&gt;open_guard = false;</div><div class='ctx'> </div><div class='del'>-	adapter-&gt;txrx_wq = alloc_workqueue(DRV_NAME "/txrx", WQ_MEM_RECLAIM, 0);</div><div class='add'>+	adapter-&gt;txrx_wq = alloc_workqueue(DRV_NAME "/txrx",</div><div class='add'>+					   WQ_MEM_RECLAIM | WQ_PERCPU, 0);</div><div class='ctx'> 	if (unlikely(!adapter-&gt;txrx_wq)) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_free_netdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;control_wq = alloc_workqueue(DRV_NAME "/control",</div><div class='del'>-					      WQ_MEM_RECLAIM, 0);</div><div class='add'>+					      WQ_MEM_RECLAIM | WQ_PERCPU, 0);</div><div class='ctx'> 	if (unlikely(!adapter-&gt;control_wq)) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_free_txrx_wq;</div><div class='head'>diff --git a/drivers/net/geneve.c b/drivers/net/geneve.c<br/>index 2f29b1386b1c..77b0c3d52041 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/geneve.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/geneve.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/geneve.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/geneve.c</a></div><div class='hunk'>@@ -18,6 +18,7 @@</div><div class='ctx'> #include &lt;net/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;net/geneve.h&gt;</div><div class='ctx'> #include &lt;net/gro.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/protocol.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define GENEVE_NETDEV_VER	"0.6"</div><div class='hunk'>@@ -40,6 +41,7 @@ MODULE_PARM_DESC(log_ecn_error, "Log packets received with corrupted ECN");</div><div class='ctx'> /* per-network namespace private data for this module */</div><div class='ctx'> struct geneve_net {</div><div class='ctx'> 	struct list_head	geneve_list;</div><div class='add'>+	/* sock_list is protected by rtnl lock */</div><div class='ctx'> 	struct list_head	sock_list;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -51,12 +53,16 @@ struct geneve_dev_node {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct geneve_config {</div><div class='del'>-	struct ip_tunnel_info	info;</div><div class='ctx'> 	bool			collect_md;</div><div class='ctx'> 	bool			use_udp6_rx_checksums;</div><div class='ctx'> 	bool			ttl_inherit;</div><div class='ctx'> 	enum ifla_geneve_df	df;</div><div class='ctx'> 	bool			inner_proto_inherit;</div><div class='add'>+	u16			port_min;</div><div class='add'>+	u16			port_max;</div><div class='add'>+</div><div class='add'>+	/* Must be last --ends in a flexible-array member. */</div><div class='add'>+	struct ip_tunnel_info	info;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Pseudo network device */</div><div class='hunk'>@@ -235,7 +241,7 @@ static void geneve_rx(struct geneve_dev *geneve, struct geneve_sock *gs,</div><div class='ctx'> 					 vni_to_tunnel_id(gnvh-&gt;vni),</div><div class='ctx'> 					 gnvh-&gt;opt_len * 4);</div><div class='ctx'> 		if (!tun_dst) {</div><div class='del'>-			DEV_STATS_INC(geneve-&gt;dev, rx_dropped);</div><div class='add'>+			dev_dstats_rx_dropped(geneve-&gt;dev);</div><div class='ctx'> 			goto drop;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Update tunnel dst according to Geneve options. */</div><div class='hunk'>@@ -322,7 +328,7 @@ static void geneve_rx(struct geneve_dev *geneve, struct geneve_sock *gs,</div><div class='ctx'> 	len = skb-&gt;len;</div><div class='ctx'> 	err = gro_cells_receive(&amp;geneve-&gt;gro_cells, skb);</div><div class='ctx'> 	if (likely(err == NET_RX_SUCCESS))</div><div class='del'>-		dev_sw_netstats_rx_add(geneve-&gt;dev, len);</div><div class='add'>+		dev_dstats_rx_add(geneve-&gt;dev, len);</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> drop:</div><div class='hunk'>@@ -387,14 +393,14 @@ static int geneve_udp_encap_recv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely((!geneve-&gt;cfg.inner_proto_inherit &amp;&amp;</div><div class='ctx'> 		      inner_proto != htons(ETH_P_TEB)))) {</div><div class='del'>-		DEV_STATS_INC(geneve-&gt;dev, rx_dropped);</div><div class='add'>+		dev_dstats_rx_dropped(geneve-&gt;dev);</div><div class='ctx'> 		goto drop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	opts_len = geneveh-&gt;opt_len * 4;</div><div class='ctx'> 	if (iptunnel_pull_header(skb, GENEVE_BASE_HLEN + opts_len, inner_proto,</div><div class='ctx'> 				 !net_eq(geneve-&gt;net, dev_net(geneve-&gt;dev)))) {</div><div class='del'>-		DEV_STATS_INC(geneve-&gt;dev, rx_dropped);</div><div class='add'>+		dev_dstats_rx_dropped(geneve-&gt;dev);</div><div class='ctx'> 		goto drop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -835,7 +841,9 @@ static int geneve_xmit_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	use_cache = ip_tunnel_dst_cache_usable(skb, info);</div><div class='ctx'> 	tos = geneve_get_dsfield(skb, dev, info, &amp;use_cache);</div><div class='del'>-	sport = udp_flow_src_port(geneve-&gt;net, skb, 1, USHRT_MAX, true);</div><div class='add'>+	sport = udp_flow_src_port(geneve-&gt;net, skb,</div><div class='add'>+				  geneve-&gt;cfg.port_min,</div><div class='add'>+				  geneve-&gt;cfg.port_max, true);</div><div class='ctx'> </div><div class='ctx'> 	rt = udp_tunnel_dst_lookup(skb, dev, geneve-&gt;net, 0, &amp;saddr,</div><div class='ctx'> 				   &amp;info-&gt;key,</div><div class='hunk'>@@ -895,7 +903,7 @@ static int geneve_xmit_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 		if (geneve-&gt;cfg.df == GENEVE_DF_SET) {</div><div class='ctx'> 			df = htons(IP_DF);</div><div class='ctx'> 		} else if (geneve-&gt;cfg.df == GENEVE_DF_INHERIT) {</div><div class='del'>-			struct ethhdr *eth = eth_hdr(skb);</div><div class='add'>+			struct ethhdr *eth = skb_eth_hdr(skb);</div><div class='ctx'> </div><div class='ctx'> 			if (ntohs(eth-&gt;h_proto) == ETH_P_IPV6) {</div><div class='ctx'> 				df = htons(IP_DF);</div><div class='hunk'>@@ -916,8 +924,8 @@ static int geneve_xmit_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	udp_tunnel_xmit_skb(rt, gs4-&gt;sock-&gt;sk, skb, saddr, info-&gt;key.u.ipv4.dst,</div><div class='ctx'> 			    tos, ttl, df, sport, geneve-&gt;cfg.info.key.tp_dst,</div><div class='ctx'> 			    !net_eq(geneve-&gt;net, dev_net(geneve-&gt;dev)),</div><div class='del'>-			    !test_bit(IP_TUNNEL_CSUM_BIT,</div><div class='del'>-				      info-&gt;key.tun_flags));</div><div class='add'>+			    !test_bit(IP_TUNNEL_CSUM_BIT, info-&gt;key.tun_flags),</div><div class='add'>+			    0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -945,7 +953,9 @@ static int geneve6_xmit_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	use_cache = ip_tunnel_dst_cache_usable(skb, info);</div><div class='ctx'> 	prio = geneve_get_dsfield(skb, dev, info, &amp;use_cache);</div><div class='del'>-	sport = udp_flow_src_port(geneve-&gt;net, skb, 1, USHRT_MAX, true);</div><div class='add'>+	sport = udp_flow_src_port(geneve-&gt;net, skb,</div><div class='add'>+				  geneve-&gt;cfg.port_min,</div><div class='add'>+				  geneve-&gt;cfg.port_max, true);</div><div class='ctx'> </div><div class='ctx'> 	dst = udp_tunnel6_dst_lookup(skb, dev, geneve-&gt;net, gs6-&gt;sock, 0,</div><div class='ctx'> 				     &amp;saddr, key, sport,</div><div class='hunk'>@@ -1007,7 +1017,8 @@ static int geneve6_xmit_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			     &amp;saddr, &amp;key-&gt;u.ipv6.dst, prio, ttl,</div><div class='ctx'> 			     info-&gt;key.label, sport, geneve-&gt;cfg.info.key.tp_dst,</div><div class='ctx'> 			     !test_bit(IP_TUNNEL_CSUM_BIT,</div><div class='del'>-				       info-&gt;key.tun_flags));</div><div class='add'>+				       info-&gt;key.tun_flags),</div><div class='add'>+			     0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1023,7 +1034,7 @@ static netdev_tx_t geneve_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		if (unlikely(!info || !(info-&gt;mode &amp; IP_TUNNEL_INFO_TX))) {</div><div class='ctx'> 			netdev_dbg(dev, "no tunnel metadata\n");</div><div class='ctx'> 			dev_kfree_skb(skb);</div><div class='del'>-			DEV_STATS_INC(dev, tx_dropped);</div><div class='add'>+			dev_dstats_tx_dropped(dev);</div><div class='ctx'> 			return NETDEV_TX_OK;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1084,7 +1095,8 @@ static int geneve_fill_metadata_dst(struct net_device *dev, struct sk_buff *skb)</div><div class='ctx'> 		use_cache = ip_tunnel_dst_cache_usable(skb, info);</div><div class='ctx'> 		tos = geneve_get_dsfield(skb, dev, info, &amp;use_cache);</div><div class='ctx'> 		sport = udp_flow_src_port(geneve-&gt;net, skb,</div><div class='del'>-					  1, USHRT_MAX, true);</div><div class='add'>+					  geneve-&gt;cfg.port_min,</div><div class='add'>+					  geneve-&gt;cfg.port_max, true);</div><div class='ctx'> </div><div class='ctx'> 		rt = udp_tunnel_dst_lookup(skb, dev, geneve-&gt;net, 0, &amp;saddr,</div><div class='ctx'> 					   &amp;info-&gt;key,</div><div class='hunk'>@@ -1110,7 +1122,8 @@ static int geneve_fill_metadata_dst(struct net_device *dev, struct sk_buff *skb)</div><div class='ctx'> 		use_cache = ip_tunnel_dst_cache_usable(skb, info);</div><div class='ctx'> 		prio = geneve_get_dsfield(skb, dev, info, &amp;use_cache);</div><div class='ctx'> 		sport = udp_flow_src_port(geneve-&gt;net, skb,</div><div class='del'>-					  1, USHRT_MAX, true);</div><div class='add'>+					  geneve-&gt;cfg.port_min,</div><div class='add'>+					  geneve-&gt;cfg.port_max, true);</div><div class='ctx'> </div><div class='ctx'> 		dst = udp_tunnel6_dst_lookup(skb, dev, geneve-&gt;net, gs6-&gt;sock, 0,</div><div class='ctx'> 					     &amp;saddr, &amp;info-&gt;key, sport,</div><div class='hunk'>@@ -1170,8 +1183,9 @@ static void geneve_offload_rx_ports(struct net_device *dev, bool push)</div><div class='ctx'> 	struct geneve_net *gn = net_generic(net, geneve_net_id);</div><div class='ctx'> 	struct geneve_sock *gs;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	list_for_each_entry_rcu(gs, &amp;gn-&gt;sock_list, list) {</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(gs, &amp;gn-&gt;sock_list, list) {</div><div class='ctx'> 		if (push) {</div><div class='ctx'> 			udp_tunnel_push_rx_port(dev, gs-&gt;sock,</div><div class='ctx'> 						UDP_TUNNEL_TYPE_GENEVE);</div><div class='hunk'>@@ -1180,7 +1194,6 @@ static void geneve_offload_rx_ports(struct net_device *dev, bool push)</div><div class='ctx'> 						UDP_TUNNEL_TYPE_GENEVE);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	rcu_read_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initialize the device structure. */</div><div class='hunk'>@@ -1202,7 +1215,7 @@ static void geneve_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;hw_features |= NETIF_F_RXCSUM;</div><div class='ctx'> 	dev-&gt;hw_features |= NETIF_F_GSO_SOFTWARE;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;</div><div class='add'>+	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_DSTATS;</div><div class='ctx'> 	/* MTU range: 68 - (something less than 65535) */</div><div class='ctx'> 	dev-&gt;min_mtu = ETH_MIN_MTU;</div><div class='ctx'> 	/* The max_mtu calculation does not take account of GENEVE</div><div class='hunk'>@@ -1234,6 +1247,7 @@ static const struct nla_policy geneve_policy[IFLA_GENEVE_MAX + 1] = {</div><div class='ctx'> 	[IFLA_GENEVE_TTL_INHERIT]	= { .type = NLA_U8 },</div><div class='ctx'> 	[IFLA_GENEVE_DF]		= { .type = NLA_U8 },</div><div class='ctx'> 	[IFLA_GENEVE_INNER_PROTO_INHERIT]	= { .type = NLA_FLAG },</div><div class='add'>+	[IFLA_GENEVE_PORT_RANGE]	= NLA_POLICY_EXACT_LEN(sizeof(struct ifla_geneve_port_range)),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int geneve_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='hunk'>@@ -1279,6 +1293,17 @@ static int geneve_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (data[IFLA_GENEVE_PORT_RANGE]) {</div><div class='add'>+		const struct ifla_geneve_port_range *p;</div><div class='add'>+</div><div class='add'>+		p = nla_data(data[IFLA_GENEVE_PORT_RANGE]);</div><div class='add'>+		if (ntohs(p-&gt;high) &lt; ntohs(p-&gt;low)) {</div><div class='add'>+			NL_SET_ERR_MSG_ATTR(extack, data[IFLA_GENEVE_PORT_RANGE],</div><div class='add'>+					    "Invalid source port range");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1506,6 +1531,18 @@ static int geneve_nl2info(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 		info-&gt;key.tp_dst = nla_get_be16(data[IFLA_GENEVE_PORT]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (data[IFLA_GENEVE_PORT_RANGE]) {</div><div class='add'>+		const struct ifla_geneve_port_range *p;</div><div class='add'>+</div><div class='add'>+		if (changelink) {</div><div class='add'>+			attrtype = IFLA_GENEVE_PORT_RANGE;</div><div class='add'>+			goto change_notsup;</div><div class='add'>+		}</div><div class='add'>+		p = nla_data(data[IFLA_GENEVE_PORT_RANGE]);</div><div class='add'>+		cfg-&gt;port_min = ntohs(p-&gt;low);</div><div class='add'>+		cfg-&gt;port_max = ntohs(p-&gt;high);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (data[IFLA_GENEVE_COLLECT_METADATA]) {</div><div class='ctx'> 		if (changelink) {</div><div class='ctx'> 			attrtype = IFLA_GENEVE_COLLECT_METADATA;</div><div class='hunk'>@@ -1614,15 +1651,20 @@ static void geneve_link_config(struct net_device *dev,</div><div class='ctx'> 	geneve_change_mtu(dev, ldev_mtu - info-&gt;options_len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int geneve_newlink(struct net *net, struct net_device *dev,</div><div class='del'>-			  struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int geneve_newlink(struct net_device *dev,</div><div class='add'>+			  struct rtnl_newlink_params *params,</div><div class='ctx'> 			  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	struct geneve_config cfg = {</div><div class='ctx'> 		.df = GENEVE_DF_UNSET,</div><div class='ctx'> 		.use_udp6_rx_checksums = false,</div><div class='ctx'> 		.ttl_inherit = false,</div><div class='ctx'> 		.collect_md = false,</div><div class='add'>+		.port_min = 1,</div><div class='add'>+		.port_max = USHRT_MAX,</div><div class='ctx'> 	};</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -1631,7 +1673,7 @@ static int geneve_newlink(struct net *net, struct net_device *dev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = geneve_configure(net, dev, extack, &amp;cfg);</div><div class='add'>+	err = geneve_configure(link_net, dev, extack, &amp;cfg);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='hunk'>@@ -1741,6 +1783,7 @@ static size_t geneve_get_size(const struct net_device *dev)</div><div class='ctx'> 		nla_total_size(sizeof(__u8)) + /* IFLA_GENEVE_UDP_ZERO_CSUM6_RX */</div><div class='ctx'> 		nla_total_size(sizeof(__u8)) + /* IFLA_GENEVE_TTL_INHERIT */</div><div class='ctx'> 		nla_total_size(0) +	 /* IFLA_GENEVE_INNER_PROTO_INHERIT */</div><div class='add'>+		nla_total_size(sizeof(struct ifla_geneve_port_range)) + /* IFLA_GENEVE_PORT_RANGE */</div><div class='ctx'> 		0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1750,6 +1793,10 @@ static int geneve_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='ctx'> 	struct ip_tunnel_info *info = &amp;geneve-&gt;cfg.info;</div><div class='ctx'> 	bool ttl_inherit = geneve-&gt;cfg.ttl_inherit;</div><div class='ctx'> 	bool metadata = geneve-&gt;cfg.collect_md;</div><div class='add'>+	struct ifla_geneve_port_range ports = {</div><div class='add'>+		.low	= htons(geneve-&gt;cfg.port_min),</div><div class='add'>+		.high	= htons(geneve-&gt;cfg.port_max),</div><div class='add'>+	};</div><div class='ctx'> 	__u8 tmp_vni[3];</div><div class='ctx'> 	__u32 vni;</div><div class='ctx'> </div><div class='hunk'>@@ -1806,6 +1853,9 @@ static int geneve_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='ctx'> 	    nla_put_flag(skb, IFLA_GENEVE_INNER_PROTO_INHERIT))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='add'>+	if (nla_put(skb, IFLA_GENEVE_PORT_RANGE, sizeof(ports), &amp;ports))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='hunk'>@@ -1838,6 +1888,8 @@ struct net_device *geneve_dev_create_fb(struct net *net, const char *name,</div><div class='ctx'> 		.use_udp6_rx_checksums = true,</div><div class='ctx'> 		.ttl_inherit = false,</div><div class='ctx'> 		.collect_md = true,</div><div class='add'>+		.port_min = 1,</div><div class='add'>+		.port_max = USHRT_MAX,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	memset(tb, 0, sizeof(tb));</div><div class='hunk'>@@ -1898,34 +1950,14 @@ static __net_init int geneve_init_net(struct net *net)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void geneve_destroy_tunnels(struct net *net, struct list_head *head)</div><div class='add'>+static void __net_exit geneve_exit_rtnl_net(struct net *net,</div><div class='add'>+					    struct list_head *dev_to_kill)</div><div class='ctx'> {</div><div class='ctx'> 	struct geneve_net *gn = net_generic(net, geneve_net_id);</div><div class='ctx'> 	struct geneve_dev *geneve, *next;</div><div class='del'>-	struct net_device *dev, *aux;</div><div class='del'>-</div><div class='del'>-	/* gather any geneve devices that were moved into this ns */</div><div class='del'>-	for_each_netdev_safe(net, dev, aux)</div><div class='del'>-		if (dev-&gt;rtnl_link_ops == &amp;geneve_link_ops)</div><div class='del'>-			unregister_netdevice_queue(dev, head);</div><div class='del'>-</div><div class='del'>-	/* now gather any other geneve devices that were created in this ns */</div><div class='del'>-	list_for_each_entry_safe(geneve, next, &amp;gn-&gt;geneve_list, next) {</div><div class='del'>-		/* If geneve-&gt;dev is in the same netns, it was already added</div><div class='del'>-		 * to the list by the previous loop.</div><div class='del'>-		 */</div><div class='del'>-		if (!net_eq(dev_net(geneve-&gt;dev), net))</div><div class='del'>-			unregister_netdevice_queue(geneve-&gt;dev, head);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __net_exit geneve_exit_batch_rtnl(struct list_head *net_list,</div><div class='del'>-					      struct list_head *dev_to_kill)</div><div class='del'>-{</div><div class='del'>-	struct net *net;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(net, net_list, exit_list)</div><div class='del'>-		geneve_destroy_tunnels(net, dev_to_kill);</div><div class='add'>+	list_for_each_entry_safe(geneve, next, &amp;gn-&gt;geneve_list, next)</div><div class='add'>+		geneve_dellink(geneve-&gt;dev, dev_to_kill);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __net_exit geneve_exit_net(struct net *net)</div><div class='hunk'>@@ -1937,7 +1969,7 @@ static void __net_exit geneve_exit_net(struct net *net)</div><div class='ctx'> </div><div class='ctx'> static struct pernet_operations geneve_net_ops = {</div><div class='ctx'> 	.init = geneve_init_net,</div><div class='del'>-	.exit_batch_rtnl = geneve_exit_batch_rtnl,</div><div class='add'>+	.exit_rtnl = geneve_exit_rtnl_net,</div><div class='ctx'> 	.exit = geneve_exit_net,</div><div class='ctx'> 	.id   = &amp;geneve_net_id,</div><div class='ctx'> 	.size = sizeof(struct geneve_net),</div><div class='head'>diff --git a/drivers/net/gtp.c b/drivers/net/gtp.c<br/>index 70f981887518..4213c3b2d532 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/gtp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/gtp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/gtp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/gtp.c</a></div><div class='hunk'>@@ -21,8 +21,11 @@</div><div class='ctx'> #include &lt;linux/file.h&gt;</div><div class='ctx'> #include &lt;linux/gtp.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;net/flow.h&gt;</div><div class='add'>+#include &lt;net/inet_dscp.h&gt;</div><div class='ctx'> #include &lt;net/net_namespace.h&gt;</div><div class='ctx'> #include &lt;net/protocol.h&gt;</div><div class='add'>+#include &lt;net/inet_sock.h&gt;</div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='ctx'> #include &lt;net/ipv6.h&gt;</div><div class='ctx'> #include &lt;net/udp.h&gt;</div><div class='hunk'>@@ -350,7 +353,7 @@ static struct rtable *ip4_route_output_gtp(struct flowi4 *fl4,</div><div class='ctx'> 	fl4-&gt;flowi4_oif		= sk-&gt;sk_bound_dev_if;</div><div class='ctx'> 	fl4-&gt;daddr		= daddr;</div><div class='ctx'> 	fl4-&gt;saddr		= saddr;</div><div class='del'>-	fl4-&gt;flowi4_tos		= ip_sock_rt_tos(sk);</div><div class='add'>+	fl4-&gt;flowi4_dscp	= inet_sk_dscp(inet_sk(sk));</div><div class='ctx'> 	fl4-&gt;flowi4_scope	= ip_sock_rt_scope(sk);</div><div class='ctx'> 	fl4-&gt;flowi4_proto	= sk-&gt;sk_protocol;</div><div class='ctx'> </div><div class='hunk'>@@ -444,7 +447,8 @@ static int gtp0_send_echo_resp_ip(struct gtp_dev *gtp, struct sk_buff *skb)</div><div class='ctx'> 			    htons(GTP0_PORT), htons(GTP0_PORT),</div><div class='ctx'> 			    !net_eq(sock_net(gtp-&gt;sk1u),</div><div class='ctx'> 				    dev_net(gtp-&gt;dev)),</div><div class='del'>-			    false);</div><div class='add'>+			    false,</div><div class='add'>+			    0);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -629,7 +633,7 @@ static void gtp1u_build_echo_msg(struct gtp1_header_long *hdr, __u8 msg_type)</div><div class='ctx'> 	hdr-&gt;tid = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* seq, npdu and next should be counted to the length of the GTP packet</div><div class='del'>-	 * that's why szie of gtp1_header should be subtracted,</div><div class='add'>+	 * that's why size of gtp1_header should be subtracted,</div><div class='ctx'> 	 * not size of gtp1_header_long.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='hunk'>@@ -702,7 +706,8 @@ static int gtp1u_send_echo_resp(struct gtp_dev *gtp, struct sk_buff *skb)</div><div class='ctx'> 			    htons(GTP1U_PORT), htons(GTP1U_PORT),</div><div class='ctx'> 			    !net_eq(sock_net(gtp-&gt;sk1u),</div><div class='ctx'> 				    dev_net(gtp-&gt;dev)),</div><div class='del'>-			    false);</div><div class='add'>+			    false,</div><div class='add'>+			    0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1302,7 +1307,7 @@ static netdev_tx_t gtp_dev_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 				    pktinfo.gtph_port, pktinfo.gtph_port,</div><div class='ctx'> 				    !net_eq(sock_net(pktinfo.pctx-&gt;sk),</div><div class='ctx'> 					    dev_net(dev)),</div><div class='del'>-				    false);</div><div class='add'>+				    false, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case AF_INET6:</div><div class='ctx'> #if IS_ENABLED(CONFIG_IPV6)</div><div class='hunk'>@@ -1312,7 +1317,7 @@ static netdev_tx_t gtp_dev_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 				     ip6_dst_hoplimit(&amp;pktinfo.rt-&gt;dst),</div><div class='ctx'> 				     0,</div><div class='ctx'> 				     pktinfo.gtph_port, pktinfo.gtph_port,</div><div class='del'>-				     false);</div><div class='add'>+				     false, 0);</div><div class='ctx'> #else</div><div class='ctx'> 		goto tx_err;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1460,10 +1465,12 @@ static int gtp_create_sockets(struct gtp_dev *gtp, const struct nlattr *nla,</div><div class='ctx'> #define GTP_TH_MAXLEN	(sizeof(struct udphdr) + sizeof(struct gtp0_header))</div><div class='ctx'> #define GTP_IPV6_MAXLEN	(sizeof(struct ipv6hdr) + GTP_TH_MAXLEN)</div><div class='ctx'> </div><div class='del'>-static int gtp_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-		       struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int gtp_newlink(struct net_device *dev,</div><div class='add'>+		       struct rtnl_newlink_params *params,</div><div class='ctx'> 		       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='ctx'> 	unsigned int role = GTP_ROLE_GGSN;</div><div class='ctx'> 	struct gtp_dev *gtp;</div><div class='ctx'> 	struct gtp_net *gn;</div><div class='hunk'>@@ -1491,12 +1498,10 @@ static int gtp_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> 	gtp-&gt;role = role;</div><div class='ctx'> </div><div class='del'>-	if (!data[IFLA_GTP_RESTART_COUNT])</div><div class='del'>-		gtp-&gt;restart_count = 0;</div><div class='del'>-	else</div><div class='del'>-		gtp-&gt;restart_count = nla_get_u8(data[IFLA_GTP_RESTART_COUNT]);</div><div class='add'>+	gtp-&gt;restart_count = nla_get_u8_default(data[IFLA_GTP_RESTART_COUNT],</div><div class='add'>+						0);</div><div class='ctx'> </div><div class='del'>-	gtp-&gt;net = src_net;</div><div class='add'>+	gtp-&gt;net = link_net;</div><div class='ctx'> </div><div class='ctx'> 	err = gtp_hashtable_new(gtp, hashsize);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='hunk'>@@ -1526,8 +1531,8 @@ static int gtp_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 		goto out_encap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	gn = net_generic(dev_net(dev), gtp_net_id);</div><div class='del'>-	list_add_rcu(&amp;gtp-&gt;list, &amp;gn-&gt;gtp_dev_list);</div><div class='add'>+	gn = net_generic(link_net, gtp_net_id);</div><div class='add'>+	list_add(&amp;gtp-&gt;list, &amp;gn-&gt;gtp_dev_list);</div><div class='ctx'> 	dev-&gt;priv_destructor = gtp_destructor;</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(dev, "registered new GTP interface\n");</div><div class='hunk'>@@ -1553,7 +1558,7 @@ static void gtp_dellink(struct net_device *dev, struct list_head *head)</div><div class='ctx'> 		hlist_for_each_entry_safe(pctx, next, &amp;gtp-&gt;tid_hash[i], hlist_tid)</div><div class='ctx'> 			pdp_context_delete(pctx);</div><div class='ctx'> </div><div class='del'>-	list_del_rcu(&amp;gtp-&gt;list);</div><div class='add'>+	list_del(&amp;gtp-&gt;list);</div><div class='ctx'> 	unregister_netdevice_queue(dev, head);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1829,10 +1834,7 @@ static struct pdp_ctx *gtp_pdp_add(struct gtp_dev *gtp, struct sock *sk,</div><div class='ctx'> </div><div class='ctx'> 	version = nla_get_u32(info-&gt;attrs[GTPA_VERSION]);</div><div class='ctx'> </div><div class='del'>-	if (info-&gt;attrs[GTPA_FAMILY])</div><div class='del'>-		family = nla_get_u8(info-&gt;attrs[GTPA_FAMILY]);</div><div class='del'>-	else</div><div class='del'>-		family = AF_INET;</div><div class='add'>+	family = nla_get_u8_default(info-&gt;attrs[GTPA_FAMILY], AF_INET);</div><div class='ctx'> </div><div class='ctx'> #if !IS_ENABLED(CONFIG_IPV6)</div><div class='ctx'> 	if (family == AF_INET6)</div><div class='hunk'>@@ -2069,10 +2071,7 @@ static struct pdp_ctx *gtp_find_pdp_by_link(struct net *net,</div><div class='ctx'> 	struct gtp_dev *gtp;</div><div class='ctx'> 	int family;</div><div class='ctx'> </div><div class='del'>-	if (nla[GTPA_FAMILY])</div><div class='del'>-		family = nla_get_u8(nla[GTPA_FAMILY]);</div><div class='del'>-	else</div><div class='del'>-		family = AF_INET;</div><div class='add'>+	family = nla_get_u8_default(nla[GTPA_FAMILY], AF_INET);</div><div class='ctx'> </div><div class='ctx'> 	gtp = gtp_find_dev(net, nla);</div><div class='ctx'> 	if (!gtp)</div><div class='hunk'>@@ -2279,16 +2278,19 @@ static int gtp_genl_dump_pdp(struct sk_buff *skb,</div><div class='ctx'> 	struct gtp_dev *last_gtp = (struct gtp_dev *)cb-&gt;args[2], *gtp;</div><div class='ctx'> 	int i, j, bucket = cb-&gt;args[0], skip = cb-&gt;args[1];</div><div class='ctx'> 	struct net *net = sock_net(skb-&gt;sk);</div><div class='add'>+	struct net_device *dev;</div><div class='ctx'> 	struct pdp_ctx *pctx;</div><div class='del'>-	struct gtp_net *gn;</div><div class='del'>-</div><div class='del'>-	gn = net_generic(net, gtp_net_id);</div><div class='ctx'> </div><div class='ctx'> 	if (cb-&gt;args[4])</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='del'>-	list_for_each_entry_rcu(gtp, &amp;gn-&gt;gtp_dev_list, list) {</div><div class='add'>+	for_each_netdev_rcu(net, dev) {</div><div class='add'>+		if (dev-&gt;rtnl_link_ops != &amp;gtp_link_ops)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		gtp = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 		if (last_gtp &amp;&amp; last_gtp != gtp)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		else</div><div class='hunk'>@@ -2400,13 +2402,13 @@ static int gtp_genl_send_echo_req(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> </div><div class='ctx'> 	udp_tunnel_xmit_skb(rt, sk, skb_to_send,</div><div class='ctx'> 			    fl4.saddr, fl4.daddr,</div><div class='del'>-			    fl4.flowi4_tos,</div><div class='add'>+			    inet_dscp_to_dsfield(fl4.flowi4_dscp),</div><div class='ctx'> 			    ip4_dst_hoplimit(&amp;rt-&gt;dst),</div><div class='ctx'> 			    0,</div><div class='ctx'> 			    port, port,</div><div class='ctx'> 			    !net_eq(sock_net(sk),</div><div class='ctx'> 				    dev_net(gtp-&gt;dev)),</div><div class='del'>-			    false);</div><div class='add'>+			    false, 0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2476,23 +2478,19 @@ static int __net_init gtp_net_init(struct net *net)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __net_exit gtp_net_exit_batch_rtnl(struct list_head *net_list,</div><div class='del'>-					       struct list_head *dev_to_kill)</div><div class='add'>+static void __net_exit gtp_net_exit_rtnl(struct net *net,</div><div class='add'>+					 struct list_head *dev_to_kill)</div><div class='ctx'> {</div><div class='del'>-	struct net *net;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry(net, net_list, exit_list) {</div><div class='del'>-		struct gtp_net *gn = net_generic(net, gtp_net_id);</div><div class='del'>-		struct gtp_dev *gtp;</div><div class='add'>+	struct gtp_net *gn = net_generic(net, gtp_net_id);</div><div class='add'>+	struct gtp_dev *gtp, *gtp_next;</div><div class='ctx'> </div><div class='del'>-		list_for_each_entry(gtp, &amp;gn-&gt;gtp_dev_list, list)</div><div class='del'>-			gtp_dellink(gtp-&gt;dev, dev_to_kill);</div><div class='del'>-	}</div><div class='add'>+	list_for_each_entry_safe(gtp, gtp_next, &amp;gn-&gt;gtp_dev_list, list)</div><div class='add'>+		gtp_dellink(gtp-&gt;dev, dev_to_kill);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pernet_operations gtp_net_ops = {</div><div class='ctx'> 	.init	= gtp_net_init,</div><div class='del'>-	.exit_batch_rtnl = gtp_net_exit_batch_rtnl,</div><div class='add'>+	.exit_rtnl = gtp_net_exit_rtnl,</div><div class='ctx'> 	.id	= &amp;gtp_net_id,</div><div class='ctx'> 	.size	= sizeof(struct gtp_net),</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/hamradio/6pack.c b/drivers/net/hamradio/6pack.c<br/>index 3bf6785f9057..885992951e8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/6pack.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/6pack.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/6pack.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hamradio/6pack.c</a></div><div class='hunk'>@@ -115,8 +115,6 @@ struct sixpack {</div><div class='ctx'> </div><div class='ctx'> 	struct timer_list	tx_t;</div><div class='ctx'> 	struct timer_list	resync_t;</div><div class='del'>-	refcount_t		refcnt;</div><div class='del'>-	struct completion	dead;</div><div class='ctx'> 	spinlock_t		lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -133,7 +131,7 @@ static int encode_sixpack(unsigned char *, unsigned char *, int, unsigned char);</div><div class='ctx'> </div><div class='ctx'> static void sp_xmit_on_air(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sixpack *sp = from_timer(sp, t, tx_t);</div><div class='add'>+	struct sixpack *sp = timer_container_of(sp, t, tx_t);</div><div class='ctx'> 	int actual, when = sp-&gt;slottime;</div><div class='ctx'> 	static unsigned char random;</div><div class='ctx'> </div><div class='hunk'>@@ -354,41 +352,12 @@ out_mem:</div><div class='ctx'> /* ----------------------------------------------------------------------- */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * We have a potential race on dereferencing tty-&gt;disc_data, because the tty</div><div class='del'>- * layer provides no locking at all - thus one cpu could be running</div><div class='del'>- * sixpack_receive_buf while another calls sixpack_close, which zeroes</div><div class='del'>- * tty-&gt;disc_data and frees the memory that sixpack_receive_buf is using.  The</div><div class='del'>- * best way to fix this is to use a rwlock in the tty struct, but for now we</div><div class='del'>- * use a single global rwlock for all ttys in ppp line discipline.</div><div class='del'>- */</div><div class='del'>-static DEFINE_RWLOCK(disc_data_lock);</div><div class='del'>-                                                                                </div><div class='del'>-static struct sixpack *sp_get(struct tty_struct *tty)</div><div class='del'>-{</div><div class='del'>-	struct sixpack *sp;</div><div class='del'>-</div><div class='del'>-	read_lock(&amp;disc_data_lock);</div><div class='del'>-	sp = tty-&gt;disc_data;</div><div class='del'>-	if (sp)</div><div class='del'>-		refcount_inc(&amp;sp-&gt;refcnt);</div><div class='del'>-	read_unlock(&amp;disc_data_lock);</div><div class='del'>-</div><div class='del'>-	return sp;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void sp_put(struct sixpack *sp)</div><div class='del'>-{</div><div class='del'>-	if (refcount_dec_and_test(&amp;sp-&gt;refcnt))</div><div class='del'>-		complete(&amp;sp-&gt;dead);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Called by the TTY driver when there's room for more data.  If we have</div><div class='ctx'>  * more packets to send, we send them here.</div><div class='ctx'>  */</div><div class='ctx'> static void sixpack_write_wakeup(struct tty_struct *tty)</div><div class='ctx'> {</div><div class='del'>-	struct sixpack *sp = sp_get(tty);</div><div class='add'>+	struct sixpack *sp = tty-&gt;disc_data;</div><div class='ctx'> 	int actual;</div><div class='ctx'> </div><div class='ctx'> 	if (!sp)</div><div class='hunk'>@@ -400,7 +369,7 @@ static void sixpack_write_wakeup(struct tty_struct *tty)</div><div class='ctx'> 		clear_bit(TTY_DO_WRITE_WAKEUP, &amp;tty-&gt;flags);</div><div class='ctx'> 		sp-&gt;tx_enable = 0;</div><div class='ctx'> 		netif_wake_queue(sp-&gt;dev);</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (sp-&gt;tx_enable) {</div><div class='hunk'>@@ -408,9 +377,6 @@ static void sixpack_write_wakeup(struct tty_struct *tty)</div><div class='ctx'> 		sp-&gt;xleft -= actual;</div><div class='ctx'> 		sp-&gt;xhead += actual;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	sp_put(sp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ----------------------------------------------------------------------- */</div><div class='hunk'>@@ -430,7 +396,7 @@ static void sixpack_receive_buf(struct tty_struct *tty, const u8 *cp,</div><div class='ctx'> 	if (!count)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	sp = sp_get(tty);</div><div class='add'>+	sp = tty-&gt;disc_data;</div><div class='ctx'> 	if (!sp)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -446,7 +412,6 @@ static void sixpack_receive_buf(struct tty_struct *tty, const u8 *cp,</div><div class='ctx'> 	}</div><div class='ctx'> 	sixpack_decode(sp, cp, count1);</div><div class='ctx'> </div><div class='del'>-	sp_put(sp);</div><div class='ctx'> 	tty_unthrottle(tty);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -491,7 +456,7 @@ static inline void tnc_set_sync_state(struct sixpack *sp, int new_tnc_state)</div><div class='ctx'> </div><div class='ctx'> static void resync_tnc(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sixpack *sp = from_timer(sp, t, resync_t);</div><div class='add'>+	struct sixpack *sp = timer_container_of(sp, t, resync_t);</div><div class='ctx'> 	static char resync_cmd = 0xe8;</div><div class='ctx'> </div><div class='ctx'> 	/* clear any data that might have been received */</div><div class='hunk'>@@ -561,8 +526,6 @@ static int sixpack_open(struct tty_struct *tty)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;sp-&gt;lock);</div><div class='ctx'> 	spin_lock_init(&amp;sp-&gt;rxlock);</div><div class='del'>-	refcount_set(&amp;sp-&gt;refcnt, 1);</div><div class='del'>-	init_completion(&amp;sp-&gt;dead);</div><div class='ctx'> </div><div class='ctx'> 	/* !!! length of the buffers. MTU is IP MTU, not PACLEN!  */</div><div class='ctx'> </div><div class='hunk'>@@ -638,19 +601,11 @@ static void sixpack_close(struct tty_struct *tty)</div><div class='ctx'> {</div><div class='ctx'> 	struct sixpack *sp;</div><div class='ctx'> </div><div class='del'>-	write_lock_irq(&amp;disc_data_lock);</div><div class='ctx'> 	sp = tty-&gt;disc_data;</div><div class='del'>-	tty-&gt;disc_data = NULL;</div><div class='del'>-	write_unlock_irq(&amp;disc_data_lock);</div><div class='ctx'> 	if (!sp)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * We have now ensured that nobody can start using ap from now on, but</div><div class='del'>-	 * we have to wait for all existing users to finish.</div><div class='del'>-	 */</div><div class='del'>-	if (!refcount_dec_and_test(&amp;sp-&gt;refcnt))</div><div class='del'>-		wait_for_completion(&amp;sp-&gt;dead);</div><div class='add'>+	tty-&gt;disc_data = NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* We must stop the queue to avoid potentially scribbling</div><div class='ctx'> 	 * on the free buffers. The sp-&gt;dead completion is not sufficient</div><div class='hunk'>@@ -660,8 +615,8 @@ static void sixpack_close(struct tty_struct *tty)</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(sp-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;sp-&gt;tx_t);</div><div class='del'>-	del_timer_sync(&amp;sp-&gt;resync_t);</div><div class='add'>+	timer_delete_sync(&amp;sp-&gt;tx_t);</div><div class='add'>+	timer_delete_sync(&amp;sp-&gt;resync_t);</div><div class='ctx'> </div><div class='ctx'> 	/* Free all 6pack frame buffers after unreg. */</div><div class='ctx'> 	kfree(sp-&gt;xbuff);</div><div class='hunk'>@@ -673,7 +628,7 @@ static void sixpack_close(struct tty_struct *tty)</div><div class='ctx'> static int sixpack_ioctl(struct tty_struct *tty, unsigned int cmd,</div><div class='ctx'> 		unsigned long arg)</div><div class='ctx'> {</div><div class='del'>-	struct sixpack *sp = sp_get(tty);</div><div class='add'>+	struct sixpack *sp = tty-&gt;disc_data;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	unsigned int tmp, err;</div><div class='ctx'> </div><div class='hunk'>@@ -725,8 +680,6 @@ static int sixpack_ioctl(struct tty_struct *tty, unsigned int cmd,</div><div class='ctx'> 		err = tty_mode_ioctl(tty, cmd, arg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	sp_put(sp);</div><div class='del'>-</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -937,7 +890,7 @@ sixpack_decode(struct sixpack *sp, const u8 *pre_rbuff, size_t count)</div><div class='ctx'> 		inbyte = pre_rbuff[count1];</div><div class='ctx'> 		if (inbyte == SIXP_FOUND_TNC) {</div><div class='ctx'> 			tnc_set_sync_state(sp, TNC_IN_SYNC);</div><div class='del'>-			del_timer(&amp;sp-&gt;resync_t);</div><div class='add'>+			timer_delete(&amp;sp-&gt;resync_t);</div><div class='ctx'> 		}</div><div class='ctx'> 		if ((inbyte &amp; SIXP_PRIO_CMD_MASK) != 0)</div><div class='ctx'> 			decode_prio_command(sp, inbyte);</div><div class='head'>diff --git a/drivers/net/hamradio/baycom_epp.c b/drivers/net/hamradio/baycom_epp.c<br/>index 9e366f275406..5fda7a0fcce0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/baycom_epp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/baycom_epp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/baycom_epp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hamradio/baycom_epp.c</a></div><div class='hunk'>@@ -1074,7 +1074,7 @@ static int baycom_siocdevprivate(struct net_device *dev, struct ifreq *ifr,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	case HDLCDRVCTL_DRIVERNAME:</div><div class='del'>-		strscpy_pad(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));</div><div class='add'>+		strscpy_pad(hi.data.drivername, "baycom_epp");</div><div class='ctx'> 		break;</div><div class='ctx'> 		</div><div class='ctx'> 	case HDLCDRVCTL_GETMODE:</div><div class='hunk'>@@ -1091,8 +1091,7 @@ static int baycom_siocdevprivate(struct net_device *dev, struct ifreq *ifr,</div><div class='ctx'> 		return baycom_setmode(bc, hi.data.modename);</div><div class='ctx'> </div><div class='ctx'> 	case HDLCDRVCTL_MODELIST:</div><div class='del'>-		strscpy_pad(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",</div><div class='del'>-			sizeof(hi.data.modename));</div><div class='add'>+		strscpy_pad(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x");</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case HDLCDRVCTL_MODEMPARMASK:</div><div class='head'>diff --git a/drivers/net/hamradio/baycom_par.c b/drivers/net/hamradio/baycom_par.c<br/>index 00ebc25d0b22..f03797103c6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/baycom_par.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/baycom_par.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/baycom_par.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hamradio/baycom_par.c</a></div><div class='hunk'>@@ -427,7 +427,7 @@ static int baycom_ioctl(struct net_device *dev, void __user *data,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case HDLCDRVCTL_GETMODE:</div><div class='del'>-		strcpy(hi-&gt;data.modename, bc-&gt;options ? "par96" : "picpar");</div><div class='add'>+		strscpy(hi-&gt;data.modename, bc-&gt;options ? "par96" : "picpar");</div><div class='ctx'> 		if (copy_to_user(data, hi, sizeof(struct hdlcdrv_ioctl)))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -439,7 +439,7 @@ static int baycom_ioctl(struct net_device *dev, void __user *data,</div><div class='ctx'> 		return baycom_setmode(bc, hi-&gt;data.modename);</div><div class='ctx'> </div><div class='ctx'> 	case HDLCDRVCTL_MODELIST:</div><div class='del'>-		strcpy(hi-&gt;data.modename, "par96,picpar");</div><div class='add'>+		strscpy(hi-&gt;data.modename, "par96,picpar");</div><div class='ctx'> 		if (copy_to_user(data, hi, sizeof(struct hdlcdrv_ioctl)))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/net/hamradio/baycom_ser_fdx.c b/drivers/net/hamradio/baycom_ser_fdx.c<br/>index 646f605e358f..ee5bd3c12040 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/baycom_ser_fdx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/baycom_ser_fdx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/baycom_ser_fdx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hamradio/baycom_ser_fdx.c</a></div><div class='hunk'>@@ -373,6 +373,7 @@ static enum uart ser12_check_uart(unsigned int iobase)</div><div class='ctx'> </div><div class='ctx'> static int ser12_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	const unsigned int nr_irqs = irq_get_nr_irqs();</div><div class='ctx'> 	struct baycom_state *bc = netdev_priv(dev);</div><div class='ctx'> 	enum uart u;</div><div class='ctx'> </div><div class='hunk'>@@ -530,7 +531,7 @@ static int baycom_ioctl(struct net_device *dev, void __user *data,</div><div class='ctx'> 		return baycom_setmode(bc, hi-&gt;data.modename);</div><div class='ctx'> </div><div class='ctx'> 	case HDLCDRVCTL_MODELIST:</div><div class='del'>-		strcpy(hi-&gt;data.modename, "ser12,ser3,ser24");</div><div class='add'>+		strscpy(hi-&gt;data.modename, "ser12,ser3,ser24");</div><div class='ctx'> 		if (copy_to_user(data, hi, sizeof(struct hdlcdrv_ioctl)))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/net/hamradio/baycom_ser_hdx.c b/drivers/net/hamradio/baycom_ser_hdx.c<br/>index 5d1ab4840753..05bdad214799 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/baycom_ser_hdx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/baycom_ser_hdx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/baycom_ser_hdx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hamradio/baycom_ser_hdx.c</a></div><div class='hunk'>@@ -570,7 +570,7 @@ static int baycom_ioctl(struct net_device *dev, void __user *data,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case HDLCDRVCTL_GETMODE:</div><div class='del'>-		strcpy(hi-&gt;data.modename, "ser12");</div><div class='add'>+		strscpy(hi-&gt;data.modename, "ser12");</div><div class='ctx'> 		if (bc-&gt;opt_dcd &lt;= 0)</div><div class='ctx'> 			strcat(hi-&gt;data.modename, (!bc-&gt;opt_dcd) ? "*" : (bc-&gt;opt_dcd == -2) ? "@" : "+");</div><div class='ctx'> 		if (copy_to_user(data, hi, sizeof(struct hdlcdrv_ioctl)))</div><div class='hunk'>@@ -584,7 +584,7 @@ static int baycom_ioctl(struct net_device *dev, void __user *data,</div><div class='ctx'> 		return baycom_setmode(bc, hi-&gt;data.modename);</div><div class='ctx'> </div><div class='ctx'> 	case HDLCDRVCTL_MODELIST:</div><div class='del'>-		strcpy(hi-&gt;data.modename, "ser12");</div><div class='add'>+		strscpy(hi-&gt;data.modename, "ser12");</div><div class='ctx'> 		if (copy_to_user(data, hi, sizeof(struct hdlcdrv_ioctl)))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/net/hamradio/bpqether.c b/drivers/net/hamradio/bpqether.c<br/>index bac1bb69d63a..045c5177262e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/bpqether.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/bpqether.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/bpqether.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hamradio/bpqether.c</a></div><div class='hunk'>@@ -77,6 +77,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='ctx'> #include &lt;net/arp.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/net_namespace.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/bpqether.h&gt;</div><div class='hunk'>@@ -107,27 +108,6 @@ struct bpqdev {</div><div class='ctx'> </div><div class='ctx'> static LIST_HEAD(bpq_devices);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * bpqether network devices are paired with ethernet devices below them, so</div><div class='del'>- * form a special "super class" of normal ethernet devices; split their locks</div><div class='del'>- * off into a separate class since they always nest.</div><div class='del'>- */</div><div class='del'>-static struct lock_class_key bpq_netdev_xmit_lock_key;</div><div class='del'>-static struct lock_class_key bpq_netdev_addr_lock_key;</div><div class='del'>-</div><div class='del'>-static void bpq_set_lockdep_class_one(struct net_device *dev,</div><div class='del'>-				      struct netdev_queue *txq,</div><div class='del'>-				      void *_unused)</div><div class='del'>-{</div><div class='del'>-	lockdep_set_class(&amp;txq-&gt;_xmit_lock, &amp;bpq_netdev_xmit_lock_key);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bpq_set_lockdep_class(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	lockdep_set_class(&amp;dev-&gt;addr_list_lock, &amp;bpq_netdev_addr_lock_key);</div><div class='del'>-	netdev_for_each_tx_queue(dev, bpq_set_lockdep_class_one, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* ------------------------------------------------------------------------ */</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -158,7 +138,7 @@ static inline struct net_device *bpq_get_ax25_dev(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static inline int dev_is_ethdev(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	return dev-&gt;type == ARPHRD_ETHER &amp;&amp; strncmp(dev-&gt;name, "dummy", 5);</div><div class='add'>+	return dev-&gt;type == ARPHRD_ETHER &amp;&amp; !netdev_need_ops_lock(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ------------------------------------------------------------------------ */</div><div class='hunk'>@@ -454,6 +434,8 @@ static const struct net_device_ops bpq_netdev_ops = {</div><div class='ctx'> </div><div class='ctx'> static void bpq_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	netdev_lockdep_set_classes(dev);</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;netdev_ops	     = &amp;bpq_netdev_ops;</div><div class='ctx'> 	dev-&gt;needs_free_netdev = true;</div><div class='ctx'> </div><div class='hunk'>@@ -499,7 +481,6 @@ static int bpq_new_device(struct net_device *edev)</div><div class='ctx'> 	err = register_netdevice(ndev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto error;</div><div class='del'>-	bpq_set_lockdep_class(ndev);</div><div class='ctx'> </div><div class='ctx'> 	/* List protected by RTNL */</div><div class='ctx'> 	list_add_rcu(&amp;bpq-&gt;bpq_list, &amp;bpq_devices);</div><div class='head'>diff --git a/drivers/net/hamradio/scc.c b/drivers/net/hamradio/scc.c<br/>index a9184a78650b..ae5048efde68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/scc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/scc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/scc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hamradio/scc.c</a></div><div class='hunk'>@@ -794,8 +794,8 @@ static inline void init_brg(struct scc_channel *scc)</div><div class='ctx'>  </div><div class='ctx'> static void init_channel(struct scc_channel *scc)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;scc-&gt;tx_t);</div><div class='del'>-	del_timer(&amp;scc-&gt;tx_wdog);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_t);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_wdog);</div><div class='ctx'> </div><div class='ctx'> 	disable_irq(scc-&gt;irq);</div><div class='ctx'> </div><div class='hunk'>@@ -999,7 +999,7 @@ static void __scc_start_tx_timer(struct scc_channel *scc,</div><div class='ctx'> 				 void (*handler)(struct timer_list *t),</div><div class='ctx'> 				 unsigned long when)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;scc-&gt;tx_t);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_t);</div><div class='ctx'> </div><div class='ctx'> 	if (when == 0)</div><div class='ctx'> 	{</div><div class='hunk'>@@ -1029,7 +1029,7 @@ static void scc_start_defer(struct scc_channel *scc)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	</div><div class='ctx'> 	spin_lock_irqsave(&amp;scc-&gt;lock, flags);</div><div class='del'>-	del_timer(&amp;scc-&gt;tx_wdog);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_wdog);</div><div class='ctx'> 	</div><div class='ctx'> 	if (scc-&gt;kiss.maxdefer != 0 &amp;&amp; scc-&gt;kiss.maxdefer != TIMER_OFF)</div><div class='ctx'> 	{</div><div class='hunk'>@@ -1045,7 +1045,7 @@ static void scc_start_maxkeyup(struct scc_channel *scc)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	</div><div class='ctx'> 	spin_lock_irqsave(&amp;scc-&gt;lock, flags);</div><div class='del'>-	del_timer(&amp;scc-&gt;tx_wdog);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_wdog);</div><div class='ctx'> 	</div><div class='ctx'> 	if (scc-&gt;kiss.maxkeyup != 0 &amp;&amp; scc-&gt;kiss.maxkeyup != TIMER_OFF)</div><div class='ctx'> 	{</div><div class='hunk'>@@ -1127,7 +1127,7 @@ static inline int is_grouped(struct scc_channel *scc)</div><div class='ctx'> </div><div class='ctx'> static void t_dwait(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct scc_channel *scc = from_timer(scc, t, tx_t);</div><div class='add'>+	struct scc_channel *scc = timer_container_of(scc, t, tx_t);</div><div class='ctx'> 	</div><div class='ctx'> 	if (scc-&gt;stat.tx_state == TXS_WAIT)	/* maxkeyup or idle timeout */</div><div class='ctx'> 	{</div><div class='hunk'>@@ -1169,7 +1169,7 @@ static void t_dwait(struct timer_list *t)</div><div class='ctx'> </div><div class='ctx'> static void t_txdelay(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct scc_channel *scc = from_timer(scc, t, tx_t);</div><div class='add'>+	struct scc_channel *scc = timer_container_of(scc, t, tx_t);</div><div class='ctx'> </div><div class='ctx'> 	scc_start_maxkeyup(scc);</div><div class='ctx'> </div><div class='hunk'>@@ -1190,11 +1190,11 @@ static void t_txdelay(struct timer_list *t)</div><div class='ctx'> </div><div class='ctx'> static void t_tail(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct scc_channel *scc = from_timer(scc, t, tx_t);</div><div class='add'>+	struct scc_channel *scc = timer_container_of(scc, t, tx_t);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	</div><div class='ctx'> 	spin_lock_irqsave(&amp;scc-&gt;lock, flags); </div><div class='del'>-	del_timer(&amp;scc-&gt;tx_wdog);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_wdog);</div><div class='ctx'> 	scc_key_trx(scc, TX_OFF);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;scc-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1217,9 +1217,9 @@ static void t_tail(struct timer_list *t)</div><div class='ctx'> </div><div class='ctx'> static void t_busy(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct scc_channel *scc = from_timer(scc, t, tx_wdog);</div><div class='add'>+	struct scc_channel *scc = timer_container_of(scc, t, tx_wdog);</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;scc-&gt;tx_t);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_t);</div><div class='ctx'> 	netif_stop_queue(scc-&gt;dev);	/* don't pile on the wabbit! */</div><div class='ctx'> </div><div class='ctx'> 	scc_discard_buffers(scc);</div><div class='hunk'>@@ -1236,7 +1236,7 @@ static void t_busy(struct timer_list *t)</div><div class='ctx'> </div><div class='ctx'> static void t_maxkeyup(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct scc_channel *scc = from_timer(scc, t, tx_wdog);</div><div class='add'>+	struct scc_channel *scc = timer_container_of(scc, t, tx_wdog);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;scc-&gt;lock, flags);</div><div class='hunk'>@@ -1248,7 +1248,7 @@ static void t_maxkeyup(struct timer_list *t)</div><div class='ctx'> 	netif_stop_queue(scc-&gt;dev);</div><div class='ctx'> 	scc_discard_buffers(scc);</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;scc-&gt;tx_t);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_t);</div><div class='ctx'> </div><div class='ctx'> 	cl(scc, R1, TxINT_ENAB);	/* force an ABORT, but don't */</div><div class='ctx'> 	cl(scc, R15, TxUIE);		/* count it. */</div><div class='hunk'>@@ -1270,9 +1270,9 @@ static void t_maxkeyup(struct timer_list *t)</div><div class='ctx'> </div><div class='ctx'> static void t_idle(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct scc_channel *scc = from_timer(scc, t, tx_t);</div><div class='add'>+	struct scc_channel *scc = timer_container_of(scc, t, tx_t);</div><div class='ctx'> 	</div><div class='del'>-	del_timer(&amp;scc-&gt;tx_wdog);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_wdog);</div><div class='ctx'> </div><div class='ctx'> 	scc_key_trx(scc, TX_OFF);</div><div class='ctx'> 	if(scc-&gt;kiss.mintime)</div><div class='hunk'>@@ -1403,11 +1403,11 @@ static unsigned long scc_get_param(struct scc_channel *scc, unsigned int cmd)</div><div class='ctx'> </div><div class='ctx'> static void scc_stop_calibrate(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct scc_channel *scc = from_timer(scc, t, tx_wdog);</div><div class='add'>+	struct scc_channel *scc = timer_container_of(scc, t, tx_wdog);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	</div><div class='ctx'> 	spin_lock_irqsave(&amp;scc-&gt;lock, flags);</div><div class='del'>-	del_timer(&amp;scc-&gt;tx_wdog);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_wdog);</div><div class='ctx'> 	scc_key_trx(scc, TX_OFF);</div><div class='ctx'> 	wr(scc, R6, 0);</div><div class='ctx'> 	wr(scc, R7, FLAG);</div><div class='hunk'>@@ -1428,7 +1428,7 @@ scc_start_calibrate(struct scc_channel *scc, int duration, unsigned char pattern</div><div class='ctx'> 	netif_stop_queue(scc-&gt;dev);</div><div class='ctx'> 	scc_discard_buffers(scc);</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;scc-&gt;tx_wdog);</div><div class='add'>+	timer_delete(&amp;scc-&gt;tx_wdog);</div><div class='ctx'> </div><div class='ctx'> 	scc-&gt;tx_wdog.function = scc_stop_calibrate;</div><div class='ctx'> 	scc-&gt;tx_wdog.expires = jiffies + HZ*duration;</div><div class='hunk'>@@ -1460,6 +1460,7 @@ scc_start_calibrate(struct scc_channel *scc, int duration, unsigned char pattern</div><div class='ctx'> </div><div class='ctx'> static void z8530_init(void)</div><div class='ctx'> {</div><div class='add'>+	const unsigned int nr_irqs = irq_get_nr_irqs();</div><div class='ctx'> 	struct scc_channel *scc;</div><div class='ctx'> 	int chip, k;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -1608,8 +1609,8 @@ static int scc_net_close(struct net_device *dev)</div><div class='ctx'> 	wr(scc,R3,0);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;scc-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;scc-&gt;tx_t);</div><div class='del'>-	del_timer_sync(&amp;scc-&gt;tx_wdog);</div><div class='add'>+	timer_delete_sync(&amp;scc-&gt;tx_t);</div><div class='add'>+	timer_delete_sync(&amp;scc-&gt;tx_wdog);</div><div class='ctx'> 	</div><div class='ctx'> 	scc_discard_buffers(scc);</div><div class='ctx'> </div><div class='hunk'>@@ -1735,7 +1736,7 @@ static int scc_net_siocdevprivate(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 			if (hwcfg.irq == 2) hwcfg.irq = 9;</div><div class='ctx'> </div><div class='del'>-			if (hwcfg.irq &lt; 0 || hwcfg.irq &gt;= nr_irqs)</div><div class='add'>+			if (hwcfg.irq &lt; 0 || hwcfg.irq &gt;= irq_get_nr_irqs())</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 				</div><div class='ctx'> 			if (!Ivec[hwcfg.irq].used &amp;&amp; hwcfg.irq)</div><div class='hunk'>@@ -2117,6 +2118,7 @@ static int __init scc_init_driver (void)</div><div class='ctx'> </div><div class='ctx'> static void __exit scc_cleanup_driver(void)</div><div class='ctx'> {</div><div class='add'>+	const unsigned int nr_irqs = irq_get_nr_irqs();</div><div class='ctx'> 	io_port ctrl;</div><div class='ctx'> 	int k;</div><div class='ctx'> 	struct scc_channel *scc;</div><div class='head'>diff --git a/drivers/net/hamradio/yam.c b/drivers/net/hamradio/yam.c<br/>index 2ed2f836f09a..f29997b20fd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/yam.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hamradio/yam.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hamradio/yam.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hamradio/yam.c</a></div><div class='hunk'>@@ -1158,7 +1158,7 @@ static void __exit yam_cleanup_driver(void)</div><div class='ctx'> 	struct yam_mcs *p;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;yam_timer);</div><div class='add'>+	timer_delete_sync(&amp;yam_timer);</div><div class='ctx'> 	for (i = 0; i &lt; NR_PORTS; i++) {</div><div class='ctx'> 		struct net_device *dev = yam_devs[i];</div><div class='ctx'> 		if (dev) {</div><div class='head'>diff --git a/drivers/net/hippi/rrunner.c b/drivers/net/hippi/rrunner.c<br/>index aa8f828a0ae7..7b7e7a47a75e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hippi/rrunner.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hippi/rrunner.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hippi/rrunner.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hippi/rrunner.c</a></div><div class='hunk'>@@ -1154,7 +1154,7 @@ static inline void rr_raz_rx(struct rr_private *rrpriv,</div><div class='ctx'> </div><div class='ctx'> static void rr_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct rr_private *rrpriv = from_timer(rrpriv, t, timer);</div><div class='add'>+	struct rr_private *rrpriv = timer_container_of(rrpriv, t, timer);</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(rrpriv-&gt;pci_dev);</div><div class='ctx'> 	struct rr_regs __iomem *regs = rrpriv-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -1357,7 +1357,7 @@ static int rr_close(struct net_device *dev)</div><div class='ctx'> 	rrpriv-&gt;fw_running = 0;</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;rrpriv-&gt;lock, flags);</div><div class='del'>-	del_timer_sync(&amp;rrpriv-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;rrpriv-&gt;timer);</div><div class='ctx'> 	spin_lock_irqsave(&amp;rrpriv-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	writel(0, &amp;regs-&gt;TxPi);</div><div class='head'>diff --git a/drivers/net/hyperv/Kconfig b/drivers/net/hyperv/Kconfig<br/>index c8cbd85adcf9..982964c1a9fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hyperv/Kconfig</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> config HYPERV_NET</div><div class='ctx'> 	tristate "Microsoft Hyper-V virtual network driver"</div><div class='del'>-	depends on HYPERV</div><div class='add'>+	depends on HYPERV_VMBUS</div><div class='ctx'> 	select UCS2_STRING</div><div class='ctx'> 	select NLS</div><div class='ctx'> 	help</div><div class='head'>diff --git a/drivers/net/hyperv/hyperv_net.h b/drivers/net/hyperv/hyperv_net.h<br/>index e690b95b1bbb..7397c693f984 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/hyperv_net.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/hyperv_net.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/hyperv_net.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hyperv/hyperv_net.h</a></div><div class='hunk'>@@ -158,7 +158,6 @@ struct hv_netvsc_packet {</div><div class='ctx'> 	u8 cp_partial; /* partial copy into send buffer */</div><div class='ctx'> </div><div class='ctx'> 	u8 rmsg_size; /* RNDIS header and PPI size */</div><div class='del'>-	u8 rmsg_pgcnt; /* page count of RNDIS header and PPI */</div><div class='ctx'> 	u8 page_buf_cnt;</div><div class='ctx'> </div><div class='ctx'> 	u16 q_idx;</div><div class='hunk'>@@ -464,7 +463,7 @@ struct nvsp_1_message_send_receive_buffer_complete {</div><div class='ctx'> 	 *  LargeOffset                            SmallOffset</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	struct nvsp_1_receive_buffer_section sections[1];</div><div class='add'>+	struct nvsp_1_receive_buffer_section sections[];</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -893,6 +892,18 @@ struct nvsp_message {</div><div class='ctx'> 				 sizeof(struct nvsp_message))</div><div class='ctx'> #define NETVSC_MIN_IN_MSG_SIZE sizeof(struct vmpacket_descriptor)</div><div class='ctx'> </div><div class='add'>+/* Maximum # of contiguous data ranges that can make up a trasmitted packet.</div><div class='add'>+ * Typically it's the max SKB fragments plus 2 for the rndis packet and the</div><div class='add'>+ * linear portion of the SKB. But if MAX_SKB_FRAGS is large, the value may</div><div class='add'>+ * need to be limited to MAX_PAGE_BUFFER_COUNT, which is the max # of entries</div><div class='add'>+ * in a GPA direct packet sent to netvsp over VMBus.</div><div class='add'>+ */</div><div class='add'>+#if MAX_SKB_FRAGS + 2 &lt; MAX_PAGE_BUFFER_COUNT</div><div class='add'>+#define MAX_DATA_RANGES (MAX_SKB_FRAGS + 2)</div><div class='add'>+#else</div><div class='add'>+#define MAX_DATA_RANGES MAX_PAGE_BUFFER_COUNT</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> /* Estimated requestor size:</div><div class='ctx'>  * out_ring_size/min_out_msg_size + in_ring_size/min_in_msg_size</div><div class='ctx'>  */</div><div class='hunk'>@@ -1050,6 +1061,7 @@ struct net_device_context {</div><div class='ctx'> 	struct net_device __rcu *vf_netdev;</div><div class='ctx'> 	struct netvsc_vf_pcpu_stats __percpu *vf_stats;</div><div class='ctx'> 	struct delayed_work vf_takeover;</div><div class='add'>+	struct delayed_work vfns_work;</div><div class='ctx'> </div><div class='ctx'> 	/* 1: allocated, serial number is valid. 0: not allocated */</div><div class='ctx'> 	u32 vf_alloc;</div><div class='hunk'>@@ -1064,6 +1076,8 @@ struct net_device_context {</div><div class='ctx'> 	struct netvsc_device_info *saved_netvsc_dev_info;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+void netvsc_vfns_work(struct work_struct *w);</div><div class='add'>+</div><div class='ctx'> /* Azure hosts don't support non-TCP port numbers in hashing for fragmented</div><div class='ctx'>  * packets. We can use ethtool to change UDP hash level when necessary.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1166,6 +1180,8 @@ struct netvsc_device {</div><div class='ctx'> 	u32 max_chn;</div><div class='ctx'> 	u32 num_chn;</div><div class='ctx'> </div><div class='add'>+	u32 netvsc_gso_max_size;</div><div class='add'>+</div><div class='ctx'> 	atomic_t open_chn;</div><div class='ctx'> 	struct work_struct subchan_work;</div><div class='ctx'> 	wait_queue_head_t subchan_open;</div><div class='head'>diff --git a/drivers/net/hyperv/netvsc.c b/drivers/net/hyperv/netvsc.c<br/>index 9afb08dbc350..60a4629fe6ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/netvsc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/netvsc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/netvsc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hyperv/netvsc.c</a></div><div class='hunk'>@@ -866,7 +866,8 @@ static void netvsc_send_completion(struct net_device *ndev,</div><div class='ctx'> </div><div class='ctx'> 	case NVSP_MSG1_TYPE_SEND_RECV_BUF_COMPLETE:</div><div class='ctx'> 		if (msglen &lt; sizeof(struct nvsp_message_header) +</div><div class='del'>-				sizeof(struct nvsp_1_message_send_receive_buffer_complete)) {</div><div class='add'>+				struct_size_t(struct nvsp_1_message_send_receive_buffer_complete,</div><div class='add'>+					      sections, 1)) {</div><div class='ctx'> 			netdev_err(ndev, "nvsp_msg1 length too small: %u\n",</div><div class='ctx'> 				   msglen);</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -952,8 +953,7 @@ static void netvsc_copy_to_send_buf(struct netvsc_device *net_device,</div><div class='ctx'> 		     + pend_size;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u32 padding = 0;</div><div class='del'>-	u32 page_count = packet-&gt;cp_partial ? packet-&gt;rmsg_pgcnt :</div><div class='del'>-		packet-&gt;page_buf_cnt;</div><div class='add'>+	u32 page_count = packet-&gt;cp_partial ? 1 : packet-&gt;page_buf_cnt;</div><div class='ctx'> 	u32 remain;</div><div class='ctx'> </div><div class='ctx'> 	/* Add padding */</div><div class='hunk'>@@ -1054,6 +1054,42 @@ static int netvsc_dma_map(struct hv_device *hv_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Build an "array" of mpb entries describing the data to be transferred</div><div class='add'>+ * over VMBus. After the desc header fields, each "array" entry is variable</div><div class='add'>+ * size, and each entry starts after the end of the previous entry. The</div><div class='add'>+ * "offset" and "len" fields for each entry imply the size of the entry.</div><div class='add'>+ *</div><div class='add'>+ * The pfns are in HV_HYP_PAGE_SIZE, because all communication with Hyper-V</div><div class='add'>+ * uses that granularity, even if the system page size of the guest is larger.</div><div class='add'>+ * Each entry in the input "pb" array must describe a contiguous range of</div><div class='add'>+ * guest physical memory so that the pfns are sequential if the range crosses</div><div class='add'>+ * a page boundary. The offset field must be &lt; HV_HYP_PAGE_SIZE.</div><div class='add'>+ */</div><div class='add'>+static inline void netvsc_build_mpb_array(struct hv_page_buffer *pb,</div><div class='add'>+				u32 page_buffer_count,</div><div class='add'>+				struct vmbus_packet_mpb_array *desc,</div><div class='add'>+				u32 *desc_size)</div><div class='add'>+{</div><div class='add'>+	struct hv_mpb_array *mpb_entry = &amp;desc-&gt;range;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; page_buffer_count; i++) {</div><div class='add'>+		u32 offset = pb[i].offset;</div><div class='add'>+		u32 len = pb[i].len;</div><div class='add'>+</div><div class='add'>+		mpb_entry-&gt;offset = offset;</div><div class='add'>+		mpb_entry-&gt;len = len;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; HVPFN_UP(offset + len); j++)</div><div class='add'>+			mpb_entry-&gt;pfn_array[j] = pb[i].pfn + j;</div><div class='add'>+</div><div class='add'>+		mpb_entry = (struct hv_mpb_array *)&amp;mpb_entry-&gt;pfn_array[j];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	desc-&gt;rangecount = page_buffer_count;</div><div class='add'>+	*desc_size = (char *)mpb_entry - (char *)desc;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline int netvsc_send_pkt(</div><div class='ctx'> 	struct hv_device *device,</div><div class='ctx'> 	struct hv_netvsc_packet *packet,</div><div class='hunk'>@@ -1096,8 +1132,11 @@ static inline int netvsc_send_pkt(</div><div class='ctx'> </div><div class='ctx'> 	packet-&gt;dma_range = NULL;</div><div class='ctx'> 	if (packet-&gt;page_buf_cnt) {</div><div class='add'>+		struct vmbus_channel_packet_page_buffer desc;</div><div class='add'>+		u32 desc_size;</div><div class='add'>+</div><div class='ctx'> 		if (packet-&gt;cp_partial)</div><div class='del'>-			pb += packet-&gt;rmsg_pgcnt;</div><div class='add'>+			pb++;</div><div class='ctx'> </div><div class='ctx'> 		ret = netvsc_dma_map(ndev_ctx-&gt;device_ctx, packet, pb);</div><div class='ctx'> 		if (ret) {</div><div class='hunk'>@@ -1105,11 +1144,12 @@ static inline int netvsc_send_pkt(</div><div class='ctx'> 			goto exit;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ret = vmbus_sendpacket_pagebuffer(out_channel,</div><div class='del'>-						  pb, packet-&gt;page_buf_cnt,</div><div class='del'>-						  &amp;nvmsg, sizeof(nvmsg),</div><div class='del'>-						  req_id);</div><div class='del'>-</div><div class='add'>+		netvsc_build_mpb_array(pb, packet-&gt;page_buf_cnt,</div><div class='add'>+				(struct vmbus_packet_mpb_array *)&amp;desc,</div><div class='add'>+				 &amp;desc_size);</div><div class='add'>+		ret = vmbus_sendpacket_mpb_desc(out_channel,</div><div class='add'>+				(struct vmbus_packet_mpb_array *)&amp;desc,</div><div class='add'>+				desc_size, &amp;nvmsg, sizeof(nvmsg), req_id);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			netvsc_dma_unmap(ndev_ctx-&gt;device_ctx, packet);</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1258,7 +1298,7 @@ int netvsc_send(struct net_device *ndev,</div><div class='ctx'> 		packet-&gt;send_buf_index = section_index;</div><div class='ctx'> </div><div class='ctx'> 		if (packet-&gt;cp_partial) {</div><div class='del'>-			packet-&gt;page_buf_cnt -= packet-&gt;rmsg_pgcnt;</div><div class='add'>+			packet-&gt;page_buf_cnt--;</div><div class='ctx'> 			packet-&gt;total_data_buflen = msd_len + packet-&gt;rmsg_size;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			packet-&gt;page_buf_cnt = 0;</div><div class='hunk'>@@ -1772,6 +1812,11 @@ struct netvsc_device *netvsc_device_add(struct hv_device *device,</div><div class='ctx'> </div><div class='ctx'> 	/* Enable NAPI handler before init callbacks */</div><div class='ctx'> 	netif_napi_add(ndev, &amp;net_device-&gt;chan_table[0].napi, netvsc_poll);</div><div class='add'>+	napi_enable(&amp;net_device-&gt;chan_table[0].napi);</div><div class='add'>+	netif_queue_set_napi(ndev, 0, NETDEV_QUEUE_TYPE_RX,</div><div class='add'>+			     &amp;net_device-&gt;chan_table[0].napi);</div><div class='add'>+	netif_queue_set_napi(ndev, 0, NETDEV_QUEUE_TYPE_TX,</div><div class='add'>+			     &amp;net_device-&gt;chan_table[0].napi);</div><div class='ctx'> </div><div class='ctx'> 	/* Open the channel */</div><div class='ctx'> 	device-&gt;channel-&gt;next_request_id_callback = vmbus_next_request_id;</div><div class='hunk'>@@ -1791,12 +1836,6 @@ struct netvsc_device *netvsc_device_add(struct hv_device *device,</div><div class='ctx'> 	/* Channel is opened */</div><div class='ctx'> 	netdev_dbg(ndev, "hv_netvsc channel opened successfully\n");</div><div class='ctx'> </div><div class='del'>-	napi_enable(&amp;net_device-&gt;chan_table[0].napi);</div><div class='del'>-	netif_queue_set_napi(ndev, 0, NETDEV_QUEUE_TYPE_RX,</div><div class='del'>-			     &amp;net_device-&gt;chan_table[0].napi);</div><div class='del'>-	netif_queue_set_napi(ndev, 0, NETDEV_QUEUE_TYPE_TX,</div><div class='del'>-			     &amp;net_device-&gt;chan_table[0].napi);</div><div class='del'>-</div><div class='ctx'> 	/* Connect with the NetVsp */</div><div class='ctx'> 	ret = netvsc_connect_vsp(device, net_device, device_info);</div><div class='ctx'> 	if (ret != 0) {</div><div class='hunk'>@@ -1814,14 +1853,14 @@ struct netvsc_device *netvsc_device_add(struct hv_device *device,</div><div class='ctx'> </div><div class='ctx'> close:</div><div class='ctx'> 	RCU_INIT_POINTER(net_device_ctx-&gt;nvdev, NULL);</div><div class='del'>-	netif_queue_set_napi(ndev, 0, NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='del'>-	netif_queue_set_napi(ndev, 0, NETDEV_QUEUE_TYPE_RX, NULL);</div><div class='del'>-	napi_disable(&amp;net_device-&gt;chan_table[0].napi);</div><div class='ctx'> </div><div class='ctx'> 	/* Now, we can close the channel safely */</div><div class='ctx'> 	vmbus_close(device-&gt;channel);</div><div class='ctx'> </div><div class='ctx'> cleanup:</div><div class='add'>+	netif_queue_set_napi(ndev, 0, NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='add'>+	netif_queue_set_napi(ndev, 0, NETDEV_QUEUE_TYPE_RX, NULL);</div><div class='add'>+	napi_disable(&amp;net_device-&gt;chan_table[0].napi);</div><div class='ctx'> 	netif_napi_del(&amp;net_device-&gt;chan_table[0].napi);</div><div class='ctx'> </div><div class='ctx'> cleanup2:</div><div class='head'>diff --git a/drivers/net/hyperv/netvsc_bpf.c b/drivers/net/hyperv/netvsc_bpf.c<br/>index e01c5997a551..1dd3755d9e6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/netvsc_bpf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/netvsc_bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/netvsc_bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hyperv/netvsc_bpf.c</a></div><div class='hunk'>@@ -183,7 +183,7 @@ int netvsc_vf_setxdp(struct net_device *vf_netdev, struct bpf_prog *prog)</div><div class='ctx'> 	xdp.command = XDP_SETUP_PROG;</div><div class='ctx'> 	xdp.prog = prog;</div><div class='ctx'> </div><div class='del'>-	ret = dev_xdp_propagate(vf_netdev, &amp;xdp);</div><div class='add'>+	ret = netif_xdp_propagate(vf_netdev, &amp;xdp);</div><div class='ctx'> </div><div class='ctx'> 	if (ret &amp;&amp; prog)</div><div class='ctx'> 		bpf_prog_put(prog);</div><div class='head'>diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c<br/>index d6c4abfc3a28..3d47d749ef9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/netvsc_drv.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/netvsc_drv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/netvsc_drv.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hyperv/netvsc_drv.c</a></div><div class='hunk'>@@ -29,6 +29,7 @@</div><div class='ctx'> #include &lt;linux/bpf.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/arp.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/route.h&gt;</div><div class='ctx'> #include &lt;net/sock.h&gt;</div><div class='ctx'> #include &lt;net/pkt_sched.h&gt;</div><div class='hunk'>@@ -325,43 +326,10 @@ static u16 netvsc_select_queue(struct net_device *ndev, struct sk_buff *skb,</div><div class='ctx'> 	return txq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 fill_pg_buf(unsigned long hvpfn, u32 offset, u32 len,</div><div class='del'>-		       struct hv_page_buffer *pb)</div><div class='del'>-{</div><div class='del'>-	int j = 0;</div><div class='del'>-</div><div class='del'>-	hvpfn += offset &gt;&gt; HV_HYP_PAGE_SHIFT;</div><div class='del'>-	offset = offset &amp; ~HV_HYP_PAGE_MASK;</div><div class='del'>-</div><div class='del'>-	while (len &gt; 0) {</div><div class='del'>-		unsigned long bytes;</div><div class='del'>-</div><div class='del'>-		bytes = HV_HYP_PAGE_SIZE - offset;</div><div class='del'>-		if (bytes &gt; len)</div><div class='del'>-			bytes = len;</div><div class='del'>-		pb[j].pfn = hvpfn;</div><div class='del'>-		pb[j].offset = offset;</div><div class='del'>-		pb[j].len = bytes;</div><div class='del'>-</div><div class='del'>-		offset += bytes;</div><div class='del'>-		len -= bytes;</div><div class='del'>-</div><div class='del'>-		if (offset == HV_HYP_PAGE_SIZE &amp;&amp; len) {</div><div class='del'>-			hvpfn++;</div><div class='del'>-			offset = 0;</div><div class='del'>-			j++;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return j + 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u32 init_page_array(void *hdr, u32 len, struct sk_buff *skb,</div><div class='ctx'> 			   struct hv_netvsc_packet *packet,</div><div class='ctx'> 			   struct hv_page_buffer *pb)</div><div class='ctx'> {</div><div class='del'>-	u32 slots_used = 0;</div><div class='del'>-	char *data = skb-&gt;data;</div><div class='ctx'> 	int frags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -370,28 +338,27 @@ static u32 init_page_array(void *hdr, u32 len, struct sk_buff *skb,</div><div class='ctx'> 	 * 2. skb linear data</div><div class='ctx'> 	 * 3. skb fragment data</div><div class='ctx'> 	 */</div><div class='del'>-	slots_used += fill_pg_buf(virt_to_hvpfn(hdr),</div><div class='del'>-				  offset_in_hvpage(hdr),</div><div class='del'>-				  len,</div><div class='del'>-				  &amp;pb[slots_used]);</div><div class='ctx'> </div><div class='add'>+	pb[0].offset = offset_in_hvpage(hdr);</div><div class='add'>+	pb[0].len = len;</div><div class='add'>+	pb[0].pfn = virt_to_hvpfn(hdr);</div><div class='ctx'> 	packet-&gt;rmsg_size = len;</div><div class='del'>-	packet-&gt;rmsg_pgcnt = slots_used;</div><div class='ctx'> </div><div class='del'>-	slots_used += fill_pg_buf(virt_to_hvpfn(data),</div><div class='del'>-				  offset_in_hvpage(data),</div><div class='del'>-				  skb_headlen(skb),</div><div class='del'>-				  &amp;pb[slots_used]);</div><div class='add'>+	pb[1].offset = offset_in_hvpage(skb-&gt;data);</div><div class='add'>+	pb[1].len = skb_headlen(skb);</div><div class='add'>+	pb[1].pfn = virt_to_hvpfn(skb-&gt;data);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; frags; i++) {</div><div class='ctx'> 		skb_frag_t *frag = skb_shinfo(skb)-&gt;frags + i;</div><div class='add'>+		struct hv_page_buffer *cur_pb = &amp;pb[i + 2];</div><div class='add'>+		u64 pfn = page_to_hvpfn(skb_frag_page(frag));</div><div class='add'>+		u32 offset = skb_frag_off(frag);</div><div class='ctx'> </div><div class='del'>-		slots_used += fill_pg_buf(page_to_hvpfn(skb_frag_page(frag)),</div><div class='del'>-					  skb_frag_off(frag),</div><div class='del'>-					  skb_frag_size(frag),</div><div class='del'>-					  &amp;pb[slots_used]);</div><div class='add'>+		cur_pb-&gt;offset = offset_in_hvpage(offset);</div><div class='add'>+		cur_pb-&gt;len = skb_frag_size(frag);</div><div class='add'>+		cur_pb-&gt;pfn = pfn + (offset &gt;&gt; HV_HYP_PAGE_SHIFT);</div><div class='ctx'> 	}</div><div class='del'>-	return slots_used;</div><div class='add'>+	return frags + 2;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int count_skb_frag_slots(struct sk_buff *skb)</div><div class='hunk'>@@ -482,7 +449,7 @@ static int netvsc_xmit(struct sk_buff *skb, struct net_device *net, bool xdp_tx)</div><div class='ctx'> 	struct net_device *vf_netdev;</div><div class='ctx'> 	u32 rndis_msg_size;</div><div class='ctx'> 	u32 hash;</div><div class='del'>-	struct hv_page_buffer pb[MAX_PAGE_BUFFER_COUNT];</div><div class='add'>+	struct hv_page_buffer pb[MAX_DATA_RANGES];</div><div class='ctx'> </div><div class='ctx'> 	/* If VF is present and up then redirect packets to it.</div><div class='ctx'> 	 * Skip the VF if it is marked down or has no carrier.</div><div class='hunk'>@@ -1404,7 +1371,7 @@ static int netvsc_set_mac_addr(struct net_device *ndev, void *p)</div><div class='ctx'> 	struct net_device_context *ndc = netdev_priv(ndev);</div><div class='ctx'> 	struct net_device *vf_netdev = rtnl_dereference(ndc-&gt;vf_netdev);</div><div class='ctx'> 	struct netvsc_device *nvdev = rtnl_dereference(ndc-&gt;nvdev);</div><div class='del'>-	struct sockaddr *addr = p;</div><div class='add'>+	struct sockaddr_storage *addr = p;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = eth_prepare_mac_addr_change(ndev, p);</div><div class='hunk'>@@ -1420,12 +1387,12 @@ static int netvsc_set_mac_addr(struct net_device *ndev, void *p)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = rndis_filter_set_device_mac(nvdev, addr-&gt;sa_data);</div><div class='add'>+	err = rndis_filter_set_device_mac(nvdev, addr-&gt;__data);</div><div class='ctx'> 	if (!err) {</div><div class='ctx'> 		eth_commit_mac_addr_change(ndev, p);</div><div class='ctx'> 	} else if (vf_netdev) {</div><div class='ctx'> 		/* rollback change on VF */</div><div class='del'>-		memcpy(addr-&gt;sa_data, ndev-&gt;dev_addr, ETH_ALEN);</div><div class='add'>+		memcpy(addr-&gt;__data, ndev-&gt;dev_addr, ETH_ALEN);</div><div class='ctx'> 		dev_set_mac_address(vf_netdev, addr, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1613,9 +1580,10 @@ static void netvsc_get_strings(struct net_device *dev, u32 stringset, u8 *data)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-netvsc_get_rss_hash_opts(struct net_device_context *ndc,</div><div class='del'>-			 struct ethtool_rxnfc *info)</div><div class='add'>+netvsc_get_rxfh_fields(struct net_device *ndev,</div><div class='add'>+		       struct ethtool_rxfh_fields *info)</div><div class='ctx'> {</div><div class='add'>+	struct net_device_context *ndc = netdev_priv(ndev);</div><div class='ctx'> 	const u32 l4_flag = RXH_L4_B_0_1 | RXH_L4_B_2_3;</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;data = RXH_IP_SRC | RXH_IP_DST;</div><div class='hunk'>@@ -1656,30 +1624,24 @@ netvsc_get_rss_hash_opts(struct net_device_context *ndc,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-netvsc_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,</div><div class='del'>-		 u32 *rules)</div><div class='add'>+static u32 netvsc_get_rx_ring_count(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device_context *ndc = netdev_priv(dev);</div><div class='ctx'> 	struct netvsc_device *nvdev = rtnl_dereference(ndc-&gt;nvdev);</div><div class='ctx'> </div><div class='ctx'> 	if (!nvdev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		info-&gt;data = nvdev-&gt;num_chn;</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		return netvsc_get_rss_hash_opts(ndc, info);</div><div class='del'>-	}</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='add'>+	return nvdev-&gt;num_chn;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int netvsc_set_rss_hash_opts(struct net_device_context *ndc,</div><div class='del'>-				    struct ethtool_rxnfc *info)</div><div class='add'>+static int</div><div class='add'>+netvsc_set_rxfh_fields(struct net_device *dev,</div><div class='add'>+		       const struct ethtool_rxfh_fields *info,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net_device_context *ndc = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	if (info-&gt;data == (RXH_IP_SRC | RXH_IP_DST |</div><div class='ctx'> 			   RXH_L4_B_0_1 | RXH_L4_B_2_3)) {</div><div class='ctx'> 		switch (info-&gt;flow_type) {</div><div class='hunk'>@@ -1734,17 +1696,6 @@ static int netvsc_set_rss_hash_opts(struct net_device_context *ndc,</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-netvsc_set_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *info)</div><div class='del'>-{</div><div class='del'>-	struct net_device_context *ndc = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	if (info-&gt;cmd == ETHTOOL_SRXFH)</div><div class='del'>-		return netvsc_set_rss_hash_opts(ndc, info);</div><div class='del'>-</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u32 netvsc_get_rxfh_key_size(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return NETVSC_HASH_KEYLEN;</div><div class='hunk'>@@ -2011,12 +1962,13 @@ static const struct ethtool_ops ethtool_ops = {</div><div class='ctx'> 	.get_channels   = netvsc_get_channels,</div><div class='ctx'> 	.set_channels   = netvsc_set_channels,</div><div class='ctx'> 	.get_ts_info	= ethtool_op_get_ts_info,</div><div class='del'>-	.get_rxnfc	= netvsc_get_rxnfc,</div><div class='del'>-	.set_rxnfc	= netvsc_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count = netvsc_get_rx_ring_count,</div><div class='ctx'> 	.get_rxfh_key_size = netvsc_get_rxfh_key_size,</div><div class='ctx'> 	.get_rxfh_indir_size = netvsc_rss_indir_size,</div><div class='ctx'> 	.get_rxfh	= netvsc_get_rxfh,</div><div class='ctx'> 	.set_rxfh	= netvsc_set_rxfh,</div><div class='add'>+	.get_rxfh_fields = netvsc_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields = netvsc_set_rxfh_fields,</div><div class='ctx'> 	.get_link_ksettings = netvsc_get_link_ksettings,</div><div class='ctx'> 	.set_link_ksettings = netvsc_set_link_ksettings,</div><div class='ctx'> 	.get_ringparam	= netvsc_get_ringparam,</div><div class='hunk'>@@ -2350,8 +2302,11 @@ static int netvsc_prepare_bonding(struct net_device *vf_netdev)</div><div class='ctx'> 	if (!ndev)</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='ctx'> </div><div class='del'>-	/* set slave flag before open to prevent IPv6 addrconf */</div><div class='add'>+	/* Set slave flag and no addrconf flag before open</div><div class='add'>+	 * to prevent IPv6 addrconf.</div><div class='add'>+	 */</div><div class='ctx'> 	vf_netdev-&gt;flags |= IFF_SLAVE;</div><div class='add'>+	vf_netdev-&gt;priv_flags |= IFF_NO_ADDRCONF;</div><div class='ctx'> 	return NOTIFY_DONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2461,6 +2416,21 @@ static int netvsc_vf_changed(struct net_device *vf_netdev, unsigned long event)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		netdev_info(ndev, "Data path switched %s VF: %s\n",</div><div class='ctx'> 			    vf_is_up ? "to" : "from", vf_netdev-&gt;name);</div><div class='add'>+</div><div class='add'>+		/* In Azure, when accelerated networking in enabled, other NICs</div><div class='add'>+		 * like MANA, MLX, are configured as a bonded nic with</div><div class='add'>+		 * Netvsc(failover) NIC. For bonded NICs, the min of the max</div><div class='add'>+		 * pkt aggregate size of the members is propagated in the stack.</div><div class='add'>+		 * In order to allow these NICs (MANA/MLX) to use up to</div><div class='add'>+		 * GSO_MAX_SIZE gso packet size, we need to allow Netvsc NIC to</div><div class='add'>+		 * also support this in the guest.</div><div class='add'>+		 * This value is only increased for netvsc NIC when datapath is</div><div class='add'>+		 * switched over to the VF</div><div class='add'>+		 */</div><div class='add'>+		if (vf_is_up)</div><div class='add'>+			netif_set_tso_max_size(ndev, vf_netdev-&gt;tso_max_size);</div><div class='add'>+		else</div><div class='add'>+			netif_set_tso_max_size(ndev, netvsc_dev-&gt;netvsc_gso_max_size);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return NOTIFY_OK;</div><div class='hunk'>@@ -2480,8 +2450,6 @@ static int netvsc_unregister_vf(struct net_device *vf_netdev)</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(ndev, "VF unregistering: %s\n", vf_netdev-&gt;name);</div><div class='ctx'> </div><div class='del'>-	netvsc_vf_setxdp(vf_netdev, NULL);</div><div class='del'>-</div><div class='ctx'> 	reinit_completion(&amp;net_device_ctx-&gt;vf_add);</div><div class='ctx'> 	netdev_rx_handler_unregister(vf_netdev);</div><div class='ctx'> 	netdev_upper_dev_unlink(vf_netdev, ndev);</div><div class='hunk'>@@ -2547,6 +2515,7 @@ static int netvsc_probe(struct hv_device *dev,</div><div class='ctx'> 	spin_lock_init(&amp;net_device_ctx-&gt;lock);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;net_device_ctx-&gt;reconfig_events);</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;net_device_ctx-&gt;vf_takeover, netvsc_vf_setup);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;net_device_ctx-&gt;vfns_work, netvsc_vfns_work);</div><div class='ctx'> </div><div class='ctx'> 	net_device_ctx-&gt;vf_stats</div><div class='ctx'> 		= netdev_alloc_pcpu_stats(struct netvsc_vf_pcpu_stats);</div><div class='hunk'>@@ -2649,7 +2618,9 @@ static int netvsc_probe(struct hv_device *dev,</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		netvsc_prepare_bonding(vf_netdev);</div><div class='add'>+		netdev_lock_ops(vf_netdev);</div><div class='ctx'> 		netvsc_register_vf(vf_netdev, VF_REG_IN_PROBE);</div><div class='add'>+		netdev_unlock_ops(vf_netdev);</div><div class='ctx'> 		__netvsc_vf_setup(net, vf_netdev);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2689,6 +2660,8 @@ static void netvsc_remove(struct hv_device *dev)</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;ndev_ctx-&gt;dwork);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	cancel_delayed_work_sync(&amp;ndev_ctx-&gt;vfns_work);</div><div class='add'>+</div><div class='ctx'> 	nvdev = rtnl_dereference(ndev_ctx-&gt;nvdev);</div><div class='ctx'> 	if (nvdev) {</div><div class='ctx'> 		cancel_work_sync(&amp;nvdev-&gt;subchan_work);</div><div class='hunk'>@@ -2730,6 +2703,7 @@ static int netvsc_suspend(struct hv_device *dev)</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;ndev_ctx-&gt;dwork);</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='add'>+	cancel_delayed_work_sync(&amp;ndev_ctx-&gt;vfns_work);</div><div class='ctx'> </div><div class='ctx'> 	nvdev = rtnl_dereference(ndev_ctx-&gt;nvdev);</div><div class='ctx'> 	if (nvdev == NULL) {</div><div class='hunk'>@@ -2823,6 +2797,27 @@ static void netvsc_event_set_vf_ns(struct net_device *ndev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void netvsc_vfns_work(struct work_struct *w)</div><div class='add'>+{</div><div class='add'>+	struct net_device_context *ndev_ctx =</div><div class='add'>+		container_of(w, struct net_device_context, vfns_work.work);</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+</div><div class='add'>+	if (!rtnl_trylock()) {</div><div class='add'>+		schedule_delayed_work(&amp;ndev_ctx-&gt;vfns_work, 1);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ndev = hv_get_drvdata(ndev_ctx-&gt;device_ctx);</div><div class='add'>+	if (!ndev)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	netvsc_event_set_vf_ns(ndev);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * On Hyper-V, every VF interface is matched with a corresponding</div><div class='ctx'>  * synthetic interface. The synthetic interface is presented first</div><div class='hunk'>@@ -2833,10 +2828,12 @@ static int netvsc_netdev_event(struct notifier_block *this,</div><div class='ctx'> 			       unsigned long event, void *ptr)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *event_dev = netdev_notifier_info_to_dev(ptr);</div><div class='add'>+	struct net_device_context *ndev_ctx;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (event_dev-&gt;netdev_ops == &amp;device_ops &amp;&amp; event == NETDEV_REGISTER) {</div><div class='del'>-		netvsc_event_set_vf_ns(event_dev);</div><div class='add'>+		ndev_ctx = netdev_priv(event_dev);</div><div class='add'>+		schedule_delayed_work(&amp;ndev_ctx-&gt;vfns_work, 0);</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/hyperv/rndis_filter.c b/drivers/net/hyperv/rndis_filter.c<br/>index c0ceeef4fcd8..c35f9685b6bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/rndis_filter.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/hyperv/rndis_filter.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/hyperv/rndis_filter.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/hyperv/rndis_filter.c</a></div><div class='hunk'>@@ -225,8 +225,7 @@ static int rndis_filter_send_request(struct rndis_device *dev,</div><div class='ctx'> 				  struct rndis_request *req)</div><div class='ctx'> {</div><div class='ctx'> 	struct hv_netvsc_packet *packet;</div><div class='del'>-	struct hv_page_buffer page_buf[2];</div><div class='del'>-	struct hv_page_buffer *pb = page_buf;</div><div class='add'>+	struct hv_page_buffer pb;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Setup the packet to send it */</div><div class='hunk'>@@ -235,27 +234,14 @@ static int rndis_filter_send_request(struct rndis_device *dev,</div><div class='ctx'> 	packet-&gt;total_data_buflen = req-&gt;request_msg.msg_len;</div><div class='ctx'> 	packet-&gt;page_buf_cnt = 1;</div><div class='ctx'> </div><div class='del'>-	pb[0].pfn = virt_to_phys(&amp;req-&gt;request_msg) &gt;&gt;</div><div class='del'>-					HV_HYP_PAGE_SHIFT;</div><div class='del'>-	pb[0].len = req-&gt;request_msg.msg_len;</div><div class='del'>-	pb[0].offset = offset_in_hvpage(&amp;req-&gt;request_msg);</div><div class='del'>-</div><div class='del'>-	/* Add one page_buf when request_msg crossing page boundary */</div><div class='del'>-	if (pb[0].offset + pb[0].len &gt; HV_HYP_PAGE_SIZE) {</div><div class='del'>-		packet-&gt;page_buf_cnt++;</div><div class='del'>-		pb[0].len = HV_HYP_PAGE_SIZE -</div><div class='del'>-			pb[0].offset;</div><div class='del'>-		pb[1].pfn = virt_to_phys((void *)&amp;req-&gt;request_msg</div><div class='del'>-			+ pb[0].len) &gt;&gt; HV_HYP_PAGE_SHIFT;</div><div class='del'>-		pb[1].offset = 0;</div><div class='del'>-		pb[1].len = req-&gt;request_msg.msg_len -</div><div class='del'>-			pb[0].len;</div><div class='del'>-	}</div><div class='add'>+	pb.pfn = virt_to_phys(&amp;req-&gt;request_msg) &gt;&gt; HV_HYP_PAGE_SHIFT;</div><div class='add'>+	pb.len = req-&gt;request_msg.msg_len;</div><div class='add'>+	pb.offset = offset_in_hvpage(&amp;req-&gt;request_msg);</div><div class='ctx'> </div><div class='ctx'> 	trace_rndis_send(dev-&gt;ndev, 0, &amp;req-&gt;request_msg);</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock_bh();</div><div class='del'>-	ret = netvsc_send(dev-&gt;ndev, packet, NULL, pb, NULL, false);</div><div class='add'>+	ret = netvsc_send(dev-&gt;ndev, packet, NULL, &amp;pb, NULL, false);</div><div class='ctx'> 	rcu_read_unlock_bh();</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1266,17 +1252,26 @@ static void netvsc_sc_open(struct vmbus_channel *new_sc)</div><div class='ctx'> 	new_sc-&gt;rqstor_size = netvsc_rqstor_size(netvsc_ring_bytes);</div><div class='ctx'> 	new_sc-&gt;max_pkt_size = NETVSC_MAX_PKT_SIZE;</div><div class='ctx'> </div><div class='add'>+	/* Enable napi before opening the vmbus channel to avoid races</div><div class='add'>+	 * as the host placing data on the host-&gt;guest ring may be left</div><div class='add'>+	 * out if napi was not enabled.</div><div class='add'>+	 */</div><div class='add'>+	napi_enable(&amp;nvchan-&gt;napi);</div><div class='add'>+	netif_queue_set_napi(ndev, chn_index, NETDEV_QUEUE_TYPE_RX,</div><div class='add'>+			     &amp;nvchan-&gt;napi);</div><div class='add'>+	netif_queue_set_napi(ndev, chn_index, NETDEV_QUEUE_TYPE_TX,</div><div class='add'>+			     &amp;nvchan-&gt;napi);</div><div class='add'>+</div><div class='ctx'> 	ret = vmbus_open(new_sc, netvsc_ring_bytes,</div><div class='ctx'> 			 netvsc_ring_bytes, NULL, 0,</div><div class='ctx'> 			 netvsc_channel_cb, nvchan);</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		napi_enable(&amp;nvchan-&gt;napi);</div><div class='del'>-		netif_queue_set_napi(ndev, chn_index, NETDEV_QUEUE_TYPE_RX,</div><div class='del'>-				     &amp;nvchan-&gt;napi);</div><div class='del'>-		netif_queue_set_napi(ndev, chn_index, NETDEV_QUEUE_TYPE_TX,</div><div class='del'>-				     &amp;nvchan-&gt;napi);</div><div class='del'>-	} else {</div><div class='add'>+	if (ret != 0) {</div><div class='ctx'> 		netdev_notice(ndev, "sub channel open failed: %d\n", ret);</div><div class='add'>+		netif_queue_set_napi(ndev, chn_index, NETDEV_QUEUE_TYPE_TX,</div><div class='add'>+				     NULL);</div><div class='add'>+		netif_queue_set_napi(ndev, chn_index, NETDEV_QUEUE_TYPE_RX,</div><div class='add'>+				     NULL);</div><div class='add'>+		napi_disable(&amp;nvchan-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (atomic_inc_return(&amp;nvscdev-&gt;open_chn) == nvscdev-&gt;num_chn)</div><div class='hunk'>@@ -1356,9 +1351,10 @@ static int rndis_netdev_set_hwcaps(struct rndis_device *rndis_device,</div><div class='ctx'> 	struct net_device_context *net_device_ctx = netdev_priv(net);</div><div class='ctx'> 	struct ndis_offload hwcaps;</div><div class='ctx'> 	struct ndis_offload_params offloads;</div><div class='del'>-	unsigned int gso_max_size = GSO_LEGACY_MAX_SIZE;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	nvdev-&gt;netvsc_gso_max_size = GSO_LEGACY_MAX_SIZE;</div><div class='add'>+</div><div class='ctx'> 	/* Find HW offload capabilities */</div><div class='ctx'> 	ret = rndis_query_hwcaps(rndis_device, nvdev, &amp;hwcaps);</div><div class='ctx'> 	if (ret != 0)</div><div class='hunk'>@@ -1390,8 +1386,8 @@ static int rndis_netdev_set_hwcaps(struct rndis_device *rndis_device,</div><div class='ctx'> 			offloads.lso_v2_ipv4 = NDIS_OFFLOAD_PARAMETERS_LSOV2_ENABLED;</div><div class='ctx'> 			net-&gt;hw_features |= NETIF_F_TSO;</div><div class='ctx'> </div><div class='del'>-			if (hwcaps.lsov2.ip4_maxsz &lt; gso_max_size)</div><div class='del'>-				gso_max_size = hwcaps.lsov2.ip4_maxsz;</div><div class='add'>+			if (hwcaps.lsov2.ip4_maxsz &lt; nvdev-&gt;netvsc_gso_max_size)</div><div class='add'>+				nvdev-&gt;netvsc_gso_max_size = hwcaps.lsov2.ip4_maxsz;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (hwcaps.csum.ip4_txcsum &amp; NDIS_TXCSUM_CAP_UDP4) {</div><div class='hunk'>@@ -1411,8 +1407,8 @@ static int rndis_netdev_set_hwcaps(struct rndis_device *rndis_device,</div><div class='ctx'> 			offloads.lso_v2_ipv6 = NDIS_OFFLOAD_PARAMETERS_LSOV2_ENABLED;</div><div class='ctx'> 			net-&gt;hw_features |= NETIF_F_TSO6;</div><div class='ctx'> </div><div class='del'>-			if (hwcaps.lsov2.ip6_maxsz &lt; gso_max_size)</div><div class='del'>-				gso_max_size = hwcaps.lsov2.ip6_maxsz;</div><div class='add'>+			if (hwcaps.lsov2.ip6_maxsz &lt; nvdev-&gt;netvsc_gso_max_size)</div><div class='add'>+				nvdev-&gt;netvsc_gso_max_size = hwcaps.lsov2.ip6_maxsz;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (hwcaps.csum.ip6_txcsum &amp; NDIS_TXCSUM_CAP_UDP6) {</div><div class='hunk'>@@ -1438,7 +1434,7 @@ static int rndis_netdev_set_hwcaps(struct rndis_device *rndis_device,</div><div class='ctx'> 	 */</div><div class='ctx'> 	net-&gt;features &amp;= ~NETVSC_SUPPORTED_HW_FEATURES | net-&gt;hw_features;</div><div class='ctx'> </div><div class='del'>-	netif_set_tso_max_size(net, gso_max_size);</div><div class='add'>+	netif_set_tso_max_size(net, nvdev-&gt;netvsc_gso_max_size);</div><div class='ctx'> </div><div class='ctx'> 	ret = rndis_filter_set_offload_params(net, nvdev, &amp;offloads);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ieee802154/at86rf230.c b/drivers/net/ieee802154/at86rf230.c<br/>index f632b0cfd5ae..fd91f8a45bce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ieee802154/at86rf230.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ieee802154/at86rf230.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ieee802154/at86rf230.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ieee802154/at86rf230.c</a></div><div class='hunk'>@@ -776,8 +776,8 @@ at86rf230_setup_spi_messages(struct at86rf230_local *lp,</div><div class='ctx'> 	state-&gt;trx.tx_buf = state-&gt;buf;</div><div class='ctx'> 	state-&gt;trx.rx_buf = state-&gt;buf;</div><div class='ctx'> 	spi_message_add_tail(&amp;state-&gt;trx, &amp;state-&gt;msg);</div><div class='del'>-	hrtimer_init(&amp;state-&gt;timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-	state-&gt;timer.function = at86rf230_async_state_timer;</div><div class='add'>+	hrtimer_setup(&amp;state-&gt;timer, at86rf230_async_state_timer, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t at86rf230_isr(int irq, void *data)</div><div class='head'>diff --git a/drivers/net/ieee802154/ca8210.c b/drivers/net/ieee802154/ca8210.c<br/>index e685a7f946f0..ebc4f1b18e7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ieee802154/ca8210.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ieee802154/ca8210.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ieee802154/ca8210.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ieee802154/ca8210.c</a></div><div class='hunk'>@@ -52,12 +52,10 @@</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/consumer.h&gt;</div><div class='del'>-#include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include &lt;linux/ieee802154.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/kfifo.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_gpio.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/poll.h&gt;</div><div class='hunk'>@@ -350,8 +348,8 @@ struct work_priv_container {</div><div class='ctx'>  * @extclockenable: true if the external clock is to be enabled</div><div class='ctx'>  * @extclockfreq:   frequency of the external clock</div><div class='ctx'>  * @extclockgpio:   ca8210 output gpio of the external clock</div><div class='del'>- * @gpio_reset:     gpio number of ca8210 reset line</div><div class='del'>- * @gpio_irq:       gpio number of ca8210 interrupt line</div><div class='add'>+ * @reset_gpio:     ca8210 reset GPIO descriptor</div><div class='add'>+ * @irq_gpio:       ca8210 interrupt GPIO descriptor</div><div class='ctx'>  * @irq_id:         identifier for the ca8210 irq</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='hunk'>@@ -359,8 +357,8 @@ struct ca8210_platform_data {</div><div class='ctx'> 	bool extclockenable;</div><div class='ctx'> 	unsigned int extclockfreq;</div><div class='ctx'> 	unsigned int extclockgpio;</div><div class='del'>-	int gpio_reset;</div><div class='del'>-	int gpio_irq;</div><div class='add'>+	struct gpio_desc *reset_gpio;</div><div class='add'>+	struct gpio_desc *irq_gpio;</div><div class='ctx'> 	int irq_id;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -627,14 +625,15 @@ static int ca8210_spi_transfer(</div><div class='ctx'>  */</div><div class='ctx'> static void ca8210_reset_send(struct spi_device *spi, unsigned int ms)</div><div class='ctx'> {</div><div class='del'>-	struct ca8210_platform_data *pdata = spi-&gt;dev.platform_data;</div><div class='add'>+	struct device *dev = &amp;spi-&gt;dev;</div><div class='add'>+	struct ca8210_platform_data *pdata = dev_get_platdata(dev);</div><div class='ctx'> 	struct ca8210_priv *priv = spi_get_drvdata(spi);</div><div class='ctx'> 	long status;</div><div class='ctx'> </div><div class='del'>-	gpio_set_value(pdata-&gt;gpio_reset, 0);</div><div class='add'>+	gpiod_set_value(pdata-&gt;reset_gpio, 1);</div><div class='ctx'> 	reinit_completion(&amp;priv-&gt;ca8210_is_awake);</div><div class='ctx'> 	msleep(ms);</div><div class='del'>-	gpio_set_value(pdata-&gt;gpio_reset, 1);</div><div class='add'>+	gpiod_set_value(pdata-&gt;reset_gpio, 0);</div><div class='ctx'> 	priv-&gt;promiscuous = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait until wakeup indication seen */</div><div class='hunk'>@@ -1446,8 +1445,7 @@ static u8 mcps_data_request(</div><div class='ctx'> 	command.pdata.data_req.src_addr_mode = src_addr_mode;</div><div class='ctx'> 	command.pdata.data_req.dst.mode = dst_address_mode;</div><div class='ctx'> 	if (dst_address_mode != MAC_MODE_NO_ADDR) {</div><div class='del'>-		command.pdata.data_req.dst.pan_id[0] = LS_BYTE(dst_pan_id);</div><div class='del'>-		command.pdata.data_req.dst.pan_id[1] = MS_BYTE(dst_pan_id);</div><div class='add'>+		put_unaligned_le16(dst_pan_id, command.pdata.data_req.dst.pan_id);</div><div class='ctx'> 		if (dst_address_mode == MAC_MODE_SHORT_ADDR) {</div><div class='ctx'> 			command.pdata.data_req.dst.address[0] = LS_BYTE(</div><div class='ctx'> 				dst_addr-&gt;short_address</div><div class='hunk'>@@ -1795,12 +1793,12 @@ static int ca8210_skb_rx(</div><div class='ctx'> 	}</div><div class='ctx'> 	hdr.source.mode = data_ind[0];</div><div class='ctx'> 	dev_dbg(&amp;priv-&gt;spi-&gt;dev, "srcAddrMode: %#03x\n", hdr.source.mode);</div><div class='del'>-	hdr.source.pan_id = *(u16 *)&amp;data_ind[1];</div><div class='add'>+	hdr.source.pan_id = cpu_to_le16(get_unaligned_le16(&amp;data_ind[1]));</div><div class='ctx'> 	dev_dbg(&amp;priv-&gt;spi-&gt;dev, "srcPanId: %#06x\n", hdr.source.pan_id);</div><div class='ctx'> 	memcpy(&amp;hdr.source.extended_addr, &amp;data_ind[3], 8);</div><div class='ctx'> 	hdr.dest.mode = data_ind[11];</div><div class='ctx'> 	dev_dbg(&amp;priv-&gt;spi-&gt;dev, "dstAddrMode: %#03x\n", hdr.dest.mode);</div><div class='del'>-	hdr.dest.pan_id = *(u16 *)&amp;data_ind[12];</div><div class='add'>+	hdr.dest.pan_id = cpu_to_le16(get_unaligned_le16(&amp;data_ind[12]));</div><div class='ctx'> 	dev_dbg(&amp;priv-&gt;spi-&gt;dev, "dstPanId: %#06x\n", hdr.dest.pan_id);</div><div class='ctx'> 	memcpy(&amp;hdr.dest.extended_addr, &amp;data_ind[14], 8);</div><div class='ctx'> </div><div class='hunk'>@@ -1927,7 +1925,7 @@ static int ca8210_skb_tx(</div><div class='ctx'> 	status =  mcps_data_request(</div><div class='ctx'> 		header.source.mode,</div><div class='ctx'> 		header.dest.mode,</div><div class='del'>-		header.dest.pan_id,</div><div class='add'>+		le16_to_cpu(header.dest.pan_id),</div><div class='ctx'> 		(union macaddr *)&amp;header.dest.extended_addr,</div><div class='ctx'> 		skb-&gt;len - mac_len,</div><div class='ctx'> 		&amp;skb-&gt;data[mac_len],</div><div class='hunk'>@@ -2737,9 +2735,10 @@ static int ca8210_config_extern_clk(</div><div class='ctx'>  */</div><div class='ctx'> static int ca8210_register_ext_clock(struct spi_device *spi)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = &amp;spi-&gt;dev;</div><div class='add'>+	struct ca8210_platform_data *pdata = dev_get_platdata(dev);</div><div class='ctx'> 	struct device_node *np = spi-&gt;dev.of_node;</div><div class='ctx'> 	struct ca8210_priv *priv = spi_get_drvdata(spi);</div><div class='del'>-	struct ca8210_platform_data *pdata = spi-&gt;dev.platform_data;</div><div class='ctx'> </div><div class='ctx'> 	if (!np)</div><div class='ctx'> 		return -EFAULT;</div><div class='hunk'>@@ -2785,25 +2784,16 @@ static void ca8210_unregister_ext_clock(struct spi_device *spi)</div><div class='ctx'>  */</div><div class='ctx'> static int ca8210_reset_init(struct spi_device *spi)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	struct ca8210_platform_data *pdata = spi-&gt;dev.platform_data;</div><div class='del'>-</div><div class='del'>-	pdata-&gt;gpio_reset = of_get_named_gpio(</div><div class='del'>-		spi-&gt;dev.of_node,</div><div class='del'>-		"reset-gpio",</div><div class='del'>-		0</div><div class='del'>-	);</div><div class='add'>+	struct device *dev = &amp;spi-&gt;dev;</div><div class='add'>+	struct ca8210_platform_data *pdata = dev_get_platdata(dev);</div><div class='ctx'> </div><div class='del'>-	ret = gpio_direction_output(pdata-&gt;gpio_reset, 1);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_crit(</div><div class='del'>-			&amp;spi-&gt;dev,</div><div class='del'>-			"Reset GPIO %d did not set to output mode\n",</div><div class='del'>-			pdata-&gt;gpio_reset</div><div class='del'>-		);</div><div class='add'>+	pdata-&gt;reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(pdata-&gt;reset_gpio)) {</div><div class='add'>+		dev_crit(dev, "Reset GPIO did not set to output mode\n");</div><div class='add'>+		return PTR_ERR(pdata-&gt;reset_gpio);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -2814,23 +2804,19 @@ static int ca8210_reset_init(struct spi_device *spi)</div><div class='ctx'>  */</div><div class='ctx'> static int ca8210_interrupt_init(struct spi_device *spi)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = &amp;spi-&gt;dev;</div><div class='add'>+	struct ca8210_platform_data *pdata = dev_get_platdata(dev);</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct ca8210_platform_data *pdata = spi-&gt;dev.platform_data;</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;gpio_irq = of_get_named_gpio(</div><div class='del'>-		spi-&gt;dev.of_node,</div><div class='del'>-		"irq-gpio",</div><div class='del'>-		0</div><div class='del'>-	);</div><div class='add'>+	pdata-&gt;irq_gpio = devm_gpiod_get(dev, "irq", GPIOD_IN);</div><div class='add'>+	if (IS_ERR(pdata-&gt;irq_gpio)) {</div><div class='add'>+		dev_crit(dev, "Could not retrieve IRQ GPIO\n");</div><div class='add'>+		return PTR_ERR(pdata-&gt;irq_gpio);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;irq_id = gpio_to_irq(pdata-&gt;gpio_irq);</div><div class='add'>+	pdata-&gt;irq_id = gpiod_to_irq(pdata-&gt;irq_gpio);</div><div class='ctx'> 	if (pdata-&gt;irq_id &lt; 0) {</div><div class='del'>-		dev_crit(</div><div class='del'>-			&amp;spi-&gt;dev,</div><div class='del'>-			"Could not get irq for gpio pin %d\n",</div><div class='del'>-			pdata-&gt;gpio_irq</div><div class='del'>-		);</div><div class='del'>-		gpio_free(pdata-&gt;gpio_irq);</div><div class='add'>+		dev_crit(dev, "Could not get irq for IRQ GPIO\n");</div><div class='ctx'> 		return pdata-&gt;irq_id;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2841,10 +2827,8 @@ static int ca8210_interrupt_init(struct spi_device *spi)</div><div class='ctx'> 		"ca8210-irq",</div><div class='ctx'> 		spi_get_drvdata(spi)</div><div class='ctx'> 	);</div><div class='del'>-	if (ret) {</div><div class='add'>+	if (ret)</div><div class='ctx'> 		dev_crit(&amp;spi-&gt;dev, "request_irq %d failed\n", pdata-&gt;irq_id);</div><div class='del'>-		gpio_free(pdata-&gt;gpio_irq);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -3072,7 +3056,11 @@ static int ca8210_probe(struct spi_device *spi_device)</div><div class='ctx'> 	spi_set_drvdata(priv-&gt;spi, priv);</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS)) {</div><div class='ctx'> 		cascoda_api_upstream = ca8210_test_int_driver_write;</div><div class='del'>-		ca8210_test_interface_init(priv);</div><div class='add'>+		ret = ca8210_test_interface_init(priv);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_crit(&amp;spi_device-&gt;dev, "ca8210_test_interface_init failed\n");</div><div class='add'>+			goto error;</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		cascoda_api_upstream = NULL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/ifb.c b/drivers/net/ifb.c<br/>index 2c1b5def4a0b..d3dc0914450a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ifb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ifb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ifb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ifb.c</a></div><div class='hunk'>@@ -333,6 +333,7 @@ static void ifb_setup(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;min_mtu = 0;</div><div class='ctx'> 	dev-&gt;max_mtu = 0;</div><div class='add'>+	netif_set_tso_max_size(dev, GSO_MAX_SIZE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t ifb_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='hunk'>@@ -426,22 +427,21 @@ static int __init ifb_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i, err;</div><div class='ctx'> </div><div class='del'>-	down_write(&amp;pernet_ops_rwsem);</div><div class='del'>-	rtnl_lock();</div><div class='del'>-	err = __rtnl_link_register(&amp;ifb_link_ops);</div><div class='add'>+	err = rtnl_link_register(&amp;ifb_link_ops);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='del'>-		goto out;</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	rtnl_net_lock(&amp;init_net);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; numifbs &amp;&amp; !err; i++) {</div><div class='ctx'> 		err = ifb_init_one(i);</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> 	}</div><div class='del'>-	if (err)</div><div class='del'>-		__rtnl_link_unregister(&amp;ifb_link_ops);</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	rtnl_unlock();</div><div class='del'>-	up_write(&amp;pernet_ops_rwsem);</div><div class='add'>+	rtnl_net_unlock(&amp;init_net);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		rtnl_link_unregister(&amp;ifb_link_ops);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ipa/Kconfig b/drivers/net/ipa/Kconfig<br/>index 6782c2cbf542..01d219d3760c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/Kconfig</a></div><div class='hunk'>@@ -5,7 +5,7 @@ config QCOM_IPA</div><div class='ctx'> 	depends on INTERCONNECT</div><div class='ctx'> 	depends on QCOM_RPROC_COMMON || (QCOM_RPROC_COMMON=n &amp;&amp; COMPILE_TEST)</div><div class='ctx'> 	depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n</div><div class='del'>-	select QCOM_MDT_LOADER if ARCH_QCOM</div><div class='add'>+	select QCOM_MDT_LOADER</div><div class='ctx'> 	select QCOM_SCM</div><div class='ctx'> 	select QCOM_QMI_HELPERS</div><div class='ctx'> 	help</div><div class='head'>diff --git a/drivers/net/ipa/data/ipa_data-v3.1.c b/drivers/net/ipa/data/ipa_data-v3.1.c<br/>index e902d731776d..65dba4729155 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v3.1.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v3.1.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v3.1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/data/ipa_data-v3.1.c</a></div><div class='hunk'>@@ -493,7 +493,6 @@ static const struct ipa_mem_data ipa_mem_data = {</div><div class='ctx'> 	.local		= ipa_mem_local_data,</div><div class='ctx'> 	.imem_addr	= 0x146bd000,</div><div class='ctx'> 	.imem_size	= 0x00002000,</div><div class='del'>-	.smem_id	= 497,</div><div class='ctx'> 	.smem_size	= 0x00002000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/data/ipa_data-v3.5.1.c b/drivers/net/ipa/data/ipa_data-v3.5.1.c<br/>index f632aab56f4c..315e617a8eeb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v3.5.1.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v3.5.1.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v3.5.1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/data/ipa_data-v3.5.1.c</a></div><div class='hunk'>@@ -374,7 +374,6 @@ static const struct ipa_mem_data ipa_mem_data = {</div><div class='ctx'> 	.local		= ipa_mem_local_data,</div><div class='ctx'> 	.imem_addr	= 0x146bd000,</div><div class='ctx'> 	.imem_size	= 0x00002000,</div><div class='del'>-	.smem_id	= 497,</div><div class='ctx'> 	.smem_size	= 0x00002000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/data/ipa_data-v4.11.c b/drivers/net/ipa/data/ipa_data-v4.11.c<br/>index c1428483ca34..f5d66779c2fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v4.11.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v4.11.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v4.11.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/data/ipa_data-v4.11.c</a></div><div class='hunk'>@@ -367,7 +367,6 @@ static const struct ipa_mem_data ipa_mem_data = {</div><div class='ctx'> 	.local		= ipa_mem_local_data,</div><div class='ctx'> 	.imem_addr	= 0x146a8000,</div><div class='ctx'> 	.imem_size	= 0x00002000,</div><div class='del'>-	.smem_id	= 497,</div><div class='ctx'> 	.smem_size	= 0x00009000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/data/ipa_data-v4.2.c b/drivers/net/ipa/data/ipa_data-v4.2.c<br/>index 2c7e8cb429b9..f5ed5d745aeb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v4.2.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v4.2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v4.2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/data/ipa_data-v4.2.c</a></div><div class='hunk'>@@ -340,7 +340,6 @@ static const struct ipa_mem_data ipa_mem_data = {</div><div class='ctx'> 	.local		= ipa_mem_local_data,</div><div class='ctx'> 	.imem_addr	= 0x146a8000,</div><div class='ctx'> 	.imem_size	= 0x00002000,</div><div class='del'>-	.smem_id	= 497,</div><div class='ctx'> 	.smem_size	= 0x00002000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/data/ipa_data-v4.5.c b/drivers/net/ipa/data/ipa_data-v4.5.c<br/>index 57dc78c526b0..730d8c43a45c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v4.5.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v4.5.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v4.5.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/data/ipa_data-v4.5.c</a></div><div class='hunk'>@@ -418,7 +418,6 @@ static const struct ipa_mem_data ipa_mem_data = {</div><div class='ctx'> 	.local		= ipa_mem_local_data,</div><div class='ctx'> 	.imem_addr	= 0x14688000,</div><div class='ctx'> 	.imem_size	= 0x00003000,</div><div class='del'>-	.smem_id	= 497,</div><div class='ctx'> 	.smem_size	= 0x00009000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/data/ipa_data-v4.7.c b/drivers/net/ipa/data/ipa_data-v4.7.c<br/>index c8c23d9be961..5e1d9049c62b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v4.7.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v4.7.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v4.7.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/data/ipa_data-v4.7.c</a></div><div class='hunk'>@@ -28,20 +28,18 @@ enum ipa_resource_type {</div><div class='ctx'> enum ipa_rsrc_group_id {</div><div class='ctx'> 	/* Source resource group identifiers */</div><div class='ctx'> 	IPA_RSRC_GROUP_SRC_UL_DL			= 0,</div><div class='del'>-	IPA_RSRC_GROUP_SRC_UC_RX_Q,</div><div class='ctx'> 	IPA_RSRC_GROUP_SRC_COUNT,	/* Last in set; not a source group */</div><div class='ctx'> </div><div class='ctx'> 	/* Destination resource group identifiers */</div><div class='del'>-	IPA_RSRC_GROUP_DST_UL_DL_DPL			= 0,</div><div class='del'>-	IPA_RSRC_GROUP_DST_UNUSED_1,</div><div class='add'>+	IPA_RSRC_GROUP_DST_UL_DL			= 0,</div><div class='ctx'> 	IPA_RSRC_GROUP_DST_COUNT,	/* Last; not a destination group */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* QSB configuration data for an SoC having IPA v4.7 */</div><div class='ctx'> static const struct ipa_qsb_data ipa_qsb_data[] = {</div><div class='ctx'> 	[IPA_QSB_MASTER_DDR] = {</div><div class='del'>-		.max_writes		= 8,</div><div class='del'>-		.max_reads		= 0,	/* no limit (hardware max) */</div><div class='add'>+		.max_writes		= 12,</div><div class='add'>+		.max_reads		= 13,</div><div class='ctx'> 		.max_reads_beats	= 120,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='hunk'>@@ -81,7 +79,7 @@ static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {</div><div class='ctx'> 		},</div><div class='ctx'> 		.endpoint = {</div><div class='ctx'> 			.config = {</div><div class='del'>-				.resource_group	= IPA_RSRC_GROUP_DST_UL_DL_DPL,</div><div class='add'>+				.resource_group	= IPA_RSRC_GROUP_DST_UL_DL,</div><div class='ctx'> 				.aggregation	= true,</div><div class='ctx'> 				.status_enable	= true,</div><div class='ctx'> 				.rx = {</div><div class='hunk'>@@ -106,6 +104,7 @@ static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {</div><div class='ctx'> 			.filter_support	= true,</div><div class='ctx'> 			.config = {</div><div class='ctx'> 				.resource_group	= IPA_RSRC_GROUP_SRC_UL_DL,</div><div class='add'>+				.checksum       = true,</div><div class='ctx'> 				.qmap		= true,</div><div class='ctx'> 				.status_enable	= true,</div><div class='ctx'> 				.tx = {</div><div class='hunk'>@@ -128,7 +127,8 @@ static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {</div><div class='ctx'> 		},</div><div class='ctx'> 		.endpoint = {</div><div class='ctx'> 			.config = {</div><div class='del'>-				.resource_group	= IPA_RSRC_GROUP_DST_UL_DL_DPL,</div><div class='add'>+				.resource_group	= IPA_RSRC_GROUP_DST_UL_DL,</div><div class='add'>+				.checksum       = true,</div><div class='ctx'> 				.qmap		= true,</div><div class='ctx'> 				.aggregation	= true,</div><div class='ctx'> 				.rx = {</div><div class='hunk'>@@ -197,12 +197,12 @@ static const struct ipa_resource ipa_resource_src[] = {</div><div class='ctx'> /* Destination resource configuration data for an SoC having IPA v4.7 */</div><div class='ctx'> static const struct ipa_resource ipa_resource_dst[] = {</div><div class='ctx'> 	[IPA_RESOURCE_TYPE_DST_DATA_SECTORS] = {</div><div class='del'>-		.limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {</div><div class='add'>+		.limits[IPA_RSRC_GROUP_DST_UL_DL] = {</div><div class='ctx'> 			.min = 7,	.max = 7,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='ctx'> 	[IPA_RESOURCE_TYPE_DST_DPS_DMARS] = {</div><div class='del'>-		.limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = {</div><div class='add'>+		.limits[IPA_RSRC_GROUP_DST_UL_DL] = {</div><div class='ctx'> 			.min = 2,	.max = 2,</div><div class='ctx'> 		},</div><div class='ctx'> 	},</div><div class='hunk'>@@ -360,7 +360,6 @@ static const struct ipa_mem_data ipa_mem_data = {</div><div class='ctx'> 	.local		= ipa_mem_local_data,</div><div class='ctx'> 	.imem_addr	= 0x146a8000,</div><div class='ctx'> 	.imem_size	= 0x00002000,</div><div class='del'>-	.smem_id	= 497,</div><div class='ctx'> 	.smem_size	= 0x00009000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/data/ipa_data-v4.9.c b/drivers/net/ipa/data/ipa_data-v4.9.c<br/>index 4eb9c909d5b3..da472a2a2e29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v4.9.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v4.9.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v4.9.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/data/ipa_data-v4.9.c</a></div><div class='hunk'>@@ -416,7 +416,6 @@ static const struct ipa_mem_data ipa_mem_data = {</div><div class='ctx'> 	.local		= ipa_mem_local_data,</div><div class='ctx'> 	.imem_addr	= 0x146bd000,</div><div class='ctx'> 	.imem_size	= 0x00002000,</div><div class='del'>-	.smem_id	= 497,</div><div class='ctx'> 	.smem_size	= 0x00009000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/data/ipa_data-v5.0.c b/drivers/net/ipa/data/ipa_data-v5.0.c<br/>index 050580c99b65..bc5722e4b053 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v5.0.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v5.0.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v5.0.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/data/ipa_data-v5.0.c</a></div><div class='hunk'>@@ -442,7 +442,6 @@ static const struct ipa_mem_data ipa_mem_data = {</div><div class='ctx'> 	.local		= ipa_mem_local_data,</div><div class='ctx'> 	.imem_addr	= 0x14688000,</div><div class='ctx'> 	.imem_size	= 0x00003000,</div><div class='del'>-	.smem_id	= 497,</div><div class='ctx'> 	.smem_size	= 0x00009000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/data/ipa_data-v5.5.c b/drivers/net/ipa/data/ipa_data-v5.5.c<br/>index 0e6663e22533..741ae21d9d78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v5.5.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/data/ipa_data-v5.5.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/data/ipa_data-v5.5.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/data/ipa_data-v5.5.c</a></div><div class='hunk'>@@ -448,7 +448,6 @@ static const struct ipa_mem_data ipa_mem_data = {</div><div class='ctx'> 	.local		= ipa_mem_local_data,</div><div class='ctx'> 	.imem_addr	= 0x14688000,</div><div class='ctx'> 	.imem_size	= 0x00002000,</div><div class='del'>-	.smem_id	= 497,</div><div class='ctx'> 	.smem_size	= 0x0000b000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/ipa_data.h b/drivers/net/ipa/ipa_data.h<br/>index d88cbbbf18b7..2fd03f0799b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_data.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_data.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_data.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/ipa_data.h</a></div><div class='hunk'>@@ -180,7 +180,6 @@ struct ipa_resource_data {</div><div class='ctx'>  * @local:		array of IPA-local memory region descriptors</div><div class='ctx'>  * @imem_addr:		physical address of IPA region within IMEM</div><div class='ctx'>  * @imem_size:		size in bytes of IPA IMEM region</div><div class='del'>- * @smem_id:		item identifier for IPA region within SMEM memory</div><div class='ctx'>  * @smem_size:		size in bytes of the IPA SMEM region</div><div class='ctx'>  */</div><div class='ctx'> struct ipa_mem_data {</div><div class='hunk'>@@ -188,7 +187,6 @@ struct ipa_mem_data {</div><div class='ctx'> 	const struct ipa_mem *local;</div><div class='ctx'> 	u32 imem_addr;</div><div class='ctx'> 	u32 imem_size;</div><div class='del'>-	u32 smem_id;</div><div class='ctx'> 	u32 smem_size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/ipa_interrupt.c b/drivers/net/ipa/ipa_interrupt.c<br/>index 245a06997055..8336596b1247 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_interrupt.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_interrupt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_interrupt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/ipa_interrupt.c</a></div><div class='hunk'>@@ -149,7 +149,6 @@ static irqreturn_t ipa_isr_thread(int irq, void *dev_id)</div><div class='ctx'> 		iowrite32(pending, ipa-&gt;reg_virt + reg_offset(reg));</div><div class='ctx'> 	}</div><div class='ctx'> out_power_put:</div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	(void)pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='head'>diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c<br/>index f25f6e2cf58c..95a61bae3124 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/ipa_main.c</a></div><div class='hunk'>@@ -9,7 +9,7 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_reserved_mem.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='hunk'>@@ -586,7 +586,6 @@ static void ipa_deconfig(struct ipa *ipa)</div><div class='ctx'> static int ipa_firmware_load(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct firmware *fw;</div><div class='del'>-	struct device_node *node;</div><div class='ctx'> 	struct resource res;</div><div class='ctx'> 	phys_addr_t phys;</div><div class='ctx'> 	const char *path;</div><div class='hunk'>@@ -594,14 +593,7 @@ static int ipa_firmware_load(struct device *dev)</div><div class='ctx'> 	void *virt;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	node = of_parse_phandle(dev-&gt;of_node, "memory-region", 0);</div><div class='del'>-	if (!node) {</div><div class='del'>-		dev_err(dev, "DT error getting \"memory-region\" property\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = of_address_to_resource(node, 0, &amp;res);</div><div class='del'>-	of_node_put(node);</div><div class='add'>+	ret = of_reserved_mem_region_to_resource(dev-&gt;of_node, 0, &amp;res);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "error %d getting \"memory-region\" resource\n",</div><div class='ctx'> 			ret);</div><div class='hunk'>@@ -911,7 +903,6 @@ static int ipa_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_deconfig;</div><div class='ctx'> done:</div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	(void)pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/ipa/ipa_mem.c b/drivers/net/ipa/ipa_mem.c<br/>index dee985eb08cb..835a3c9c1fd4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_mem.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_mem.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_mem.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/ipa_mem.c</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'> /* SMEM host id representing the modem. */</div><div class='ctx'> #define QCOM_SMEM_HOST_MODEM	1</div><div class='ctx'> </div><div class='add'>+#define SMEM_IPA_FILTER_TABLE	497</div><div class='add'>+</div><div class='ctx'> const struct ipa_mem *ipa_mem_find(struct ipa *ipa, enum ipa_mem_id mem_id)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='hunk'>@@ -509,7 +511,6 @@ static void ipa_imem_exit(struct ipa *ipa)</div><div class='ctx'> /**</div><div class='ctx'>  * ipa_smem_init() - Initialize SMEM memory used by the IPA</div><div class='ctx'>  * @ipa:	IPA pointer</div><div class='del'>- * @item:	Item ID of SMEM memory</div><div class='ctx'>  * @size:	Size (bytes) of SMEM memory region</div><div class='ctx'>  *</div><div class='ctx'>  * SMEM is a managed block of shared DRAM, from which numbered "items"</div><div class='hunk'>@@ -523,7 +524,7 @@ static void ipa_imem_exit(struct ipa *ipa)</div><div class='ctx'>  *</div><div class='ctx'>  * Note: @size and the item address are is not guaranteed to be page-aligned.</div><div class='ctx'>  */</div><div class='del'>-static int ipa_smem_init(struct ipa *ipa, u32 item, size_t size)</div><div class='add'>+static int ipa_smem_init(struct ipa *ipa, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = ipa-&gt;dev;</div><div class='ctx'> 	struct iommu_domain *domain;</div><div class='hunk'>@@ -545,25 +546,25 @@ static int ipa_smem_init(struct ipa *ipa, u32 item, size_t size)</div><div class='ctx'> 	 * The item might have already been allocated, in which case we</div><div class='ctx'> 	 * use it unless the size isn't what we expect.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = qcom_smem_alloc(QCOM_SMEM_HOST_MODEM, item, size);</div><div class='add'>+	ret = qcom_smem_alloc(QCOM_SMEM_HOST_MODEM, SMEM_IPA_FILTER_TABLE, size);</div><div class='ctx'> 	if (ret &amp;&amp; ret != -EEXIST) {</div><div class='del'>-		dev_err(dev, "error %d allocating size %zu SMEM item %u\n",</div><div class='del'>-			ret, size, item);</div><div class='add'>+		dev_err(dev, "error %d allocating size %zu SMEM item\n",</div><div class='add'>+			ret, size);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Now get the address of the SMEM memory region */</div><div class='del'>-	virt = qcom_smem_get(QCOM_SMEM_HOST_MODEM, item, &amp;actual);</div><div class='add'>+	virt = qcom_smem_get(QCOM_SMEM_HOST_MODEM, SMEM_IPA_FILTER_TABLE, &amp;actual);</div><div class='ctx'> 	if (IS_ERR(virt)) {</div><div class='ctx'> 		ret = PTR_ERR(virt);</div><div class='del'>-		dev_err(dev, "error %d getting SMEM item %u\n", ret, item);</div><div class='add'>+		dev_err(dev, "error %d getting SMEM item\n", ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* In case the region was already allocated, verify the size */</div><div class='ctx'> 	if (ret &amp;&amp; actual != size) {</div><div class='del'>-		dev_err(dev, "SMEM item %u has size %zu, expected %zu\n",</div><div class='del'>-			item, actual, size);</div><div class='add'>+		dev_err(dev, "SMEM item has size %zu, expected %zu\n",</div><div class='add'>+			actual, size);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -659,7 +660,7 @@ int ipa_mem_init(struct ipa *ipa, struct platform_device *pdev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_unmap;</div><div class='ctx'> </div><div class='del'>-	ret = ipa_smem_init(ipa, mem_data-&gt;smem_id, mem_data-&gt;smem_size);</div><div class='add'>+	ret = ipa_smem_init(ipa, mem_data-&gt;smem_size);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_imem_exit;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/ipa_modem.c b/drivers/net/ipa/ipa_modem.c<br/>index 8fe0d0e1a00f..9b136f6b8b4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_modem.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_modem.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_modem.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/ipa_modem.c</a></div><div class='hunk'>@@ -71,7 +71,6 @@ static int ipa_open(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	netif_start_queue(netdev);</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	(void)pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -102,7 +101,6 @@ static int ipa_stop(struct net_device *netdev)</div><div class='ctx'> 	ipa_endpoint_disable_one(priv-&gt;rx);</div><div class='ctx'> 	ipa_endpoint_disable_one(priv-&gt;tx);</div><div class='ctx'> out_power_put:</div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	(void)pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -175,7 +173,6 @@ ipa_start_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	ret = ipa_endpoint_skb_tx(endpoint, skb);</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	(void)pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -432,7 +429,6 @@ static void ipa_modem_crashed(struct ipa *ipa)</div><div class='ctx'> 		dev_err(dev, "error %d zeroing modem memory regions\n", ret);</div><div class='ctx'> </div><div class='ctx'> out_power_put:</div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	(void)pm_runtime_put_autosuspend(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/ipa_smp2p.c b/drivers/net/ipa/ipa_smp2p.c<br/>index fcaadd111a8a..420098796eec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_smp2p.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_smp2p.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_smp2p.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/ipa_smp2p.c</a></div><div class='hunk'>@@ -171,7 +171,6 @@ static irqreturn_t ipa_smp2p_modem_setup_ready_isr(int irq, void *dev_id)</div><div class='ctx'> 	WARN(ret != 0, "error %d from ipa_setup()\n", ret);</div><div class='ctx'> </div><div class='ctx'> out_power_put:</div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	(void)pm_runtime_put_autosuspend(dev);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='hunk'>@@ -213,7 +212,6 @@ static void ipa_smp2p_power_release(struct ipa *ipa)</div><div class='ctx'> 	if (!ipa-&gt;smp2p-&gt;power_on)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	(void)pm_runtime_put_autosuspend(dev);</div><div class='ctx'> 	ipa-&gt;smp2p-&gt;power_on = false;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ipa/ipa_sysfs.c b/drivers/net/ipa/ipa_sysfs.c<br/>index a59bd215494c..a53e9e6f6cdf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_sysfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_sysfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_sysfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/ipa_sysfs.c</a></div><div class='hunk'>@@ -37,8 +37,12 @@ static const char *ipa_version_string(struct ipa *ipa)</div><div class='ctx'> 		return "4.11";</div><div class='ctx'> 	case IPA_VERSION_5_0:</div><div class='ctx'> 		return "5.0";</div><div class='add'>+	case IPA_VERSION_5_1:</div><div class='add'>+		return "5.1";</div><div class='add'>+	case IPA_VERSION_5_5:</div><div class='add'>+		return "5.5";</div><div class='ctx'> 	default:</div><div class='del'>-		return "0.0";	/* Won't happen (checked at probe time) */</div><div class='add'>+		return "0.0";	/* Should not happen */</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipa/ipa_uc.c b/drivers/net/ipa/ipa_uc.c<br/>index 2963db83ab6b..dc7e92f2a4fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_uc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipa/ipa_uc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipa/ipa_uc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipa/ipa_uc.c</a></div><div class='hunk'>@@ -158,7 +158,6 @@ static void ipa_uc_response_hdlr(struct ipa *ipa)</div><div class='ctx'> 		if (ipa-&gt;uc_powered) {</div><div class='ctx'> 			ipa-&gt;uc_loaded = true;</div><div class='ctx'> 			ipa_power_retention(ipa, true);</div><div class='del'>-			pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 			(void)pm_runtime_put_autosuspend(dev);</div><div class='ctx'> 			ipa-&gt;uc_powered = false;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -203,7 +202,6 @@ void ipa_uc_deconfig(struct ipa *ipa)</div><div class='ctx'> 	if (!ipa-&gt;uc_powered)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	pm_runtime_mark_last_busy(dev);</div><div class='ctx'> 	(void)pm_runtime_put_autosuspend(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ipvlan/ipvlan.h b/drivers/net/ipvlan/ipvlan.h<br/>index 025e0c19ec25..50de3ee204db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipvlan/ipvlan.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipvlan/ipvlan.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipvlan/ipvlan.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipvlan/ipvlan.h</a></div><div class='hunk'>@@ -166,8 +166,7 @@ struct ipvl_addr *ipvlan_addr_lookup(struct ipvl_port *port, void *lyr3h,</div><div class='ctx'> void *ipvlan_get_L3_hdr(struct ipvl_port *port, struct sk_buff *skb, int *type);</div><div class='ctx'> void ipvlan_count_rx(const struct ipvl_dev *ipvlan,</div><div class='ctx'> 		     unsigned int len, bool success, bool mcast);</div><div class='del'>-int ipvlan_link_new(struct net *src_net, struct net_device *dev,</div><div class='del'>-		    struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+int ipvlan_link_new(struct net_device *dev, struct rtnl_newlink_params *params,</div><div class='ctx'> 		    struct netlink_ext_ack *extack);</div><div class='ctx'> void ipvlan_link_delete(struct net_device *dev, struct list_head *head);</div><div class='ctx'> void ipvlan_link_setup(struct net_device *dev);</div><div class='head'>diff --git a/drivers/net/ipvlan/ipvlan_core.c b/drivers/net/ipvlan/ipvlan_core.c<br/>index fd591ddb3884..dea411e132db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipvlan/ipvlan_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipvlan/ipvlan_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipvlan/ipvlan_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipvlan/ipvlan_core.c</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> /* Copyright (c) 2014 Mahesh Bandewar &lt;maheshb@google.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;net/inet_dscp.h&gt;</div><div class='add'>+#include &lt;net/flow.h&gt;</div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ipvlan.h"</div><div class='hunk'>@@ -52,8 +52,8 @@ static u8 ipvlan_get_v4_hash(const void *iaddr)</div><div class='ctx'> {</div><div class='ctx'> 	const struct in_addr *ip4_addr = iaddr;</div><div class='ctx'> </div><div class='del'>-	return jhash_1word(ip4_addr-&gt;s_addr, ipvlan_jhash_secret) &amp;</div><div class='del'>-	       IPVLAN_HASH_MASK;</div><div class='add'>+	return jhash_1word((__force u32)ip4_addr-&gt;s_addr, ipvlan_jhash_secret) &amp;</div><div class='add'>+			   IPVLAN_HASH_MASK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool addr_equal(bool is_v6, struct ipvl_addr *addr, const void *iaddr)</div><div class='hunk'>@@ -219,7 +219,7 @@ void *ipvlan_get_L3_hdr(struct ipvl_port *port, struct sk_buff *skb, int *type)</div><div class='ctx'> </div><div class='ctx'> unsigned int ipvlan_mac_hash(const unsigned char *addr)</div><div class='ctx'> {</div><div class='del'>-	u32 hash = jhash_1word(__get_unaligned_cpu32(addr+2),</div><div class='add'>+	u32 hash = jhash_1word(get_unaligned((u32 *)(addr + 2)),</div><div class='ctx'> 			       ipvlan_jhash_secret);</div><div class='ctx'> </div><div class='ctx'> 	return hash &amp; IPVLAN_MAC_FILTER_MASK;</div><div class='hunk'>@@ -416,20 +416,25 @@ struct ipvl_addr *ipvlan_addr_lookup(struct ipvl_port *port, void *lyr3h,</div><div class='ctx'> </div><div class='ctx'> static noinline_for_stack int ipvlan_process_v4_outbound(struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	const struct iphdr *ip4h = ip_hdr(skb);</div><div class='ctx'> 	struct net_device *dev = skb-&gt;dev;</div><div class='ctx'> 	struct net *net = dev_net(dev);</div><div class='del'>-	struct rtable *rt;</div><div class='ctx'> 	int err, ret = NET_XMIT_DROP;</div><div class='add'>+	const struct iphdr *ip4h;</div><div class='add'>+	struct rtable *rt;</div><div class='ctx'> 	struct flowi4 fl4 = {</div><div class='ctx'> 		.flowi4_oif = dev-&gt;ifindex,</div><div class='del'>-		.flowi4_tos = inet_dscp_to_dsfield(ip4h_dscp(ip4h)),</div><div class='ctx'> 		.flowi4_flags = FLOWI_FLAG_ANYSRC,</div><div class='ctx'> 		.flowi4_mark = skb-&gt;mark,</div><div class='del'>-		.daddr = ip4h-&gt;daddr,</div><div class='del'>-		.saddr = ip4h-&gt;saddr,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	if (!pskb_network_may_pull(skb, sizeof(struct iphdr)))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ip4h = ip_hdr(skb);</div><div class='add'>+	fl4.daddr = ip4h-&gt;daddr;</div><div class='add'>+	fl4.saddr = ip4h-&gt;saddr;</div><div class='add'>+	fl4.flowi4_dscp = ip4h_dscp(ip4h);</div><div class='add'>+</div><div class='ctx'> 	rt = ip_route_output_flow(net, &amp;fl4, NULL);</div><div class='ctx'> 	if (IS_ERR(rt))</div><div class='ctx'> 		goto err;</div><div class='hunk'>@@ -488,6 +493,12 @@ static int ipvlan_process_v6_outbound(struct sk_buff *skb)</div><div class='ctx'> 	struct net_device *dev = skb-&gt;dev;</div><div class='ctx'> 	int err, ret = NET_XMIT_DROP;</div><div class='ctx'> </div><div class='add'>+	if (!pskb_network_may_pull(skb, sizeof(struct ipv6hdr))) {</div><div class='add'>+		DEV_STATS_INC(dev, tx_errors);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = ipvlan_route_v6_outbound(dev, skb);</div><div class='ctx'> 	if (unlikely(err)) {</div><div class='ctx'> 		DEV_STATS_INC(dev, tx_errors);</div><div class='head'>diff --git a/drivers/net/ipvlan/ipvlan_l3s.c b/drivers/net/ipvlan/ipvlan_l3s.c<br/>index b4ef386bdb1b..7c017fe35522 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipvlan/ipvlan_l3s.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipvlan/ipvlan_l3s.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipvlan/ipvlan_l3s.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipvlan/ipvlan_l3s.c</a></div><div class='hunk'>@@ -226,5 +226,4 @@ void ipvlan_l3s_unregister(struct ipvl_port *port)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;priv_flags &amp;= ~IFF_L3MDEV_RX_HANDLER;</div><div class='ctx'> 	ipvlan_unregister_nf_hook(read_pnet(&amp;port-&gt;pnet));</div><div class='del'>-	dev-&gt;l3mdev_ops = NULL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ipvlan/ipvlan_main.c b/drivers/net/ipvlan/ipvlan_main.c<br/>index ee2c3cf4df36..660f3db11766 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipvlan/ipvlan_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipvlan/ipvlan_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipvlan/ipvlan_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipvlan/ipvlan_main.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ipvlan.h"</div><div class='ctx'> </div><div class='hunk'>@@ -532,11 +533,13 @@ err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ipvlan_link_new(struct net *src_net, struct net_device *dev,</div><div class='del'>-		    struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+int ipvlan_link_new(struct net_device *dev, struct rtnl_newlink_params *params,</div><div class='ctx'> 		    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='ctx'> 	struct ipvl_dev *ipvlan = netdev_priv(dev);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	struct ipvl_port *port;</div><div class='ctx'> 	struct net_device *phy_dev;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -545,7 +548,7 @@ int ipvlan_link_new(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	if (!tb[IFLA_LINK])</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	phy_dev = __dev_get_by_index(src_net, nla_get_u32(tb[IFLA_LINK]));</div><div class='add'>+	phy_dev = __dev_get_by_index(link_net, nla_get_u32(tb[IFLA_LINK]));</div><div class='ctx'> 	if (!phy_dev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -781,9 +784,9 @@ static int ipvlan_device_event(struct notifier_block *unused,</div><div class='ctx'> 	case NETDEV_PRE_CHANGEADDR:</div><div class='ctx'> 		prechaddr_info = ptr;</div><div class='ctx'> 		list_for_each_entry(ipvlan, &amp;port-&gt;ipvlans, pnode) {</div><div class='del'>-			err = dev_pre_changeaddr_notify(ipvlan-&gt;dev,</div><div class='del'>-						    prechaddr_info-&gt;dev_addr,</div><div class='del'>-						    extack);</div><div class='add'>+			err = netif_pre_changeaddr_notify(ipvlan-&gt;dev,</div><div class='add'>+							  prechaddr_info-&gt;dev_addr,</div><div class='add'>+							  extack);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				return notifier_from_errno(err);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -799,6 +802,12 @@ static int ipvlan_device_event(struct notifier_block *unused,</div><div class='ctx'> 	case NETDEV_PRE_TYPE_CHANGE:</div><div class='ctx'> 		/* Forbid underlying device to change its type. */</div><div class='ctx'> 		return NOTIFY_BAD;</div><div class='add'>+</div><div class='add'>+	case NETDEV_NOTIFY_PEERS:</div><div class='add'>+	case NETDEV_BONDING_FAILOVER:</div><div class='add'>+	case NETDEV_RESEND_IGMP:</div><div class='add'>+		list_for_each_entry(ipvlan, &amp;port-&gt;ipvlans, pnode)</div><div class='add'>+			call_netdevice_notifiers(event, ipvlan-&gt;dev);</div><div class='ctx'> 	}</div><div class='ctx'> 	return NOTIFY_DONE;</div><div class='ctx'> }</div><div class='hunk'>@@ -1085,3 +1094,4 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_AUTHOR("Mahesh Bandewar &lt;maheshb@google.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Driver for L3 (IPv6/IPv4) based VLANs");</div><div class='ctx'> MODULE_ALIAS_RTNL_LINK("ipvlan");</div><div class='add'>+MODULE_IMPORT_NS("NETDEV_INTERNAL");</div><div class='head'>diff --git a/drivers/net/ipvlan/ipvtap.c b/drivers/net/ipvlan/ipvtap.c<br/>index 1afc4c47be73..edd13916831a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ipvlan/ipvtap.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ipvlan/ipvtap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ipvlan/ipvtap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ipvlan/ipvtap.c</a></div><div class='hunk'>@@ -73,8 +73,8 @@ static void ipvtap_update_features(struct tap_dev *tap,</div><div class='ctx'> 	netdev_update_features(vlan-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ipvtap_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-			  struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int ipvtap_newlink(struct net_device *dev,</div><div class='add'>+			  struct rtnl_newlink_params *params,</div><div class='ctx'> 			  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct ipvtap_dev *vlantap = netdev_priv(dev);</div><div class='hunk'>@@ -97,7 +97,7 @@ static int ipvtap_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	/* Don't put anything that may fail after macvlan_common_newlink</div><div class='ctx'> 	 * because we can't undo what it does.</div><div class='ctx'> 	 */</div><div class='del'>-	err =  ipvlan_link_new(src_net, dev, tb, data, extack);</div><div class='add'>+	err = ipvlan_link_new(dev, params, extack);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netdev_rx_handler_unregister(dev);</div><div class='ctx'> 		return err;</div><div class='head'>diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c<br/>index 1993b90b1a5f..1fb6ce6843ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/loopback.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/loopback.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/loopback.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/loopback.c</a></div><div class='hunk'>@@ -54,6 +54,7 @@</div><div class='ctx'> #include &lt;linux/percpu.h&gt;</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;net/net_namespace.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;linux/u64_stats_sync.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* blackhole_netdev - a device used for dsts that are marked expired!</div><div class='hunk'>@@ -172,7 +173,7 @@ static void gen_lo_setup(struct net_device *dev,</div><div class='ctx'> 	dev-&gt;flags		= IFF_LOOPBACK;</div><div class='ctx'> 	dev-&gt;priv_flags		|= IFF_LIVE_ADDR_CHANGE | IFF_NO_QUEUE;</div><div class='ctx'> 	dev-&gt;lltx		= true;</div><div class='del'>-	dev-&gt;netns_local	= true;</div><div class='add'>+	dev-&gt;netns_immutable	= true;</div><div class='ctx'> 	netif_keep_dst(dev);</div><div class='ctx'> 	dev-&gt;hw_features	= NETIF_F_GSO_SOFTWARE;</div><div class='ctx'> 	dev-&gt;features		= NETIF_F_SG | NETIF_F_FRAGLIST</div><div class='hunk'>@@ -244,8 +245,22 @@ static netdev_tx_t blackhole_netdev_xmit(struct sk_buff *skb,</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int blackhole_neigh_output(struct neighbour *n, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int blackhole_neigh_construct(struct net_device *dev,</div><div class='add'>+				     struct neighbour *n)</div><div class='add'>+{</div><div class='add'>+	n-&gt;output = blackhole_neigh_output;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops blackhole_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit = blackhole_netdev_xmit,</div><div class='add'>+	.ndo_neigh_construct = blackhole_neigh_construct,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* This is a dst-dummy device used specifically for invalidated</div><div class='hunk'>@@ -264,13 +279,12 @@ static int __init blackhole_netdev_init(void)</div><div class='ctx'> 	if (!blackhole_netdev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='add'>+	rtnl_net_lock(&amp;init_net);</div><div class='ctx'> 	dev_init_scheduler(blackhole_netdev);</div><div class='ctx'> 	dev_activate(blackhole_netdev);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	rtnl_net_unlock(&amp;init_net);</div><div class='ctx'> </div><div class='ctx'> 	blackhole_netdev-&gt;flags |= IFF_UP | IFF_RUNNING;</div><div class='del'>-	dev_net_set(blackhole_netdev, &amp;init_net);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/macsec.c b/drivers/net/macsec.c<br/>index ee2159282573..5200fd5a10e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/macsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/macsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/macsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/macsec.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;net/gro_cells.h&gt;</div><div class='ctx'> #include &lt;net/macsec.h&gt;</div><div class='ctx'> #include &lt;net/dst_metadata.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/byteorder/generic.h&gt;</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='hunk'>@@ -246,15 +247,39 @@ static sci_t make_sci(const u8 *addr, __be16 port)</div><div class='ctx'> 	return sci;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static sci_t macsec_frame_sci(struct macsec_eth_header *hdr, bool sci_present)</div><div class='add'>+static sci_t macsec_active_sci(struct macsec_secy *secy)</div><div class='ctx'> {</div><div class='del'>-	sci_t sci;</div><div class='add'>+	struct macsec_rx_sc *rx_sc = rcu_dereference_bh(secy-&gt;rx_sc);</div><div class='add'>+</div><div class='add'>+	/* Case single RX SC */</div><div class='add'>+	if (rx_sc &amp;&amp; !rcu_dereference_bh(rx_sc-&gt;next))</div><div class='add'>+		return (rx_sc-&gt;active) ? rx_sc-&gt;sci : 0;</div><div class='add'>+	/* Case no RX SC or multiple */</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static sci_t macsec_frame_sci(struct macsec_eth_header *hdr, bool sci_present,</div><div class='add'>+			      struct macsec_rxh_data *rxd)</div><div class='add'>+{</div><div class='add'>+	struct macsec_dev *macsec;</div><div class='add'>+	sci_t sci = 0;</div><div class='ctx'> </div><div class='del'>-	if (sci_present)</div><div class='add'>+	/* SC = 1 */</div><div class='add'>+	if (sci_present) {</div><div class='ctx'> 		memcpy(&amp;sci, hdr-&gt;secure_channel_id,</div><div class='ctx'> 		       sizeof(hdr-&gt;secure_channel_id));</div><div class='del'>-	else</div><div class='add'>+	/* SC = 0; ES = 0 */</div><div class='add'>+	} else if ((!(hdr-&gt;tci_an &amp; (MACSEC_TCI_ES | MACSEC_TCI_SC))) &amp;&amp;</div><div class='add'>+		   (list_is_singular(&amp;rxd-&gt;secys))) {</div><div class='add'>+		/* Only one SECY should exist on this scenario */</div><div class='add'>+		macsec = list_first_or_null_rcu(&amp;rxd-&gt;secys, struct macsec_dev,</div><div class='add'>+						secys);</div><div class='add'>+		if (macsec)</div><div class='add'>+			return macsec_active_sci(&amp;macsec-&gt;secy);</div><div class='add'>+	} else {</div><div class='ctx'> 		sci = make_sci(hdr-&gt;eth.h_source, MACSEC_PORT_ES);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return sci;</div><div class='ctx'> }</div><div class='hunk'>@@ -1108,7 +1133,7 @@ static rx_handler_result_t macsec_handle_frame(struct sk_buff **pskb)</div><div class='ctx'> 	struct macsec_rxh_data *rxd;</div><div class='ctx'> 	struct macsec_dev *macsec;</div><div class='ctx'> 	unsigned int len;</div><div class='del'>-	sci_t sci;</div><div class='add'>+	sci_t sci = 0;</div><div class='ctx'> 	u32 hdr_pn;</div><div class='ctx'> 	bool cbit;</div><div class='ctx'> 	struct pcpu_rx_sc_stats *rxsc_stats;</div><div class='hunk'>@@ -1155,11 +1180,14 @@ static rx_handler_result_t macsec_handle_frame(struct sk_buff **pskb)</div><div class='ctx'> </div><div class='ctx'> 	macsec_skb_cb(skb)-&gt;has_sci = !!(hdr-&gt;tci_an &amp; MACSEC_TCI_SC);</div><div class='ctx'> 	macsec_skb_cb(skb)-&gt;assoc_num = hdr-&gt;tci_an &amp; MACSEC_AN_MASK;</div><div class='del'>-	sci = macsec_frame_sci(hdr, macsec_skb_cb(skb)-&gt;has_sci);</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	rxd = macsec_data_rcu(skb-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	sci = macsec_frame_sci(hdr, macsec_skb_cb(skb)-&gt;has_sci, rxd);</div><div class='add'>+	if (!sci)</div><div class='add'>+		goto drop_nosc;</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry_rcu(macsec, &amp;rxd-&gt;secys, secys) {</div><div class='ctx'> 		struct macsec_rx_sc *sc = find_rx_sc(&amp;macsec-&gt;secy, sci);</div><div class='ctx'> </div><div class='hunk'>@@ -1282,6 +1310,7 @@ drop:</div><div class='ctx'> 	macsec_rxsa_put(rx_sa);</div><div class='ctx'> drop_nosa:</div><div class='ctx'> 	macsec_rxsc_put(rx_sc);</div><div class='add'>+drop_nosc:</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> drop_direct:</div><div class='ctx'> 	kfree_skb(skb);</div><div class='hunk'>@@ -1554,9 +1583,6 @@ static struct macsec_tx_sa *get_txsa_from_nl(struct net *net,</div><div class='ctx'> 	if (IS_ERR(dev))</div><div class='ctx'> 		return ERR_CAST(dev);</div><div class='ctx'> </div><div class='del'>-	if (*assoc_num &gt;= MACSEC_NUM_AN)</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='del'>-</div><div class='ctx'> 	secy = &amp;macsec_priv(dev)-&gt;secy;</div><div class='ctx'> 	tx_sc = &amp;secy-&gt;tx_sc;</div><div class='ctx'> </div><div class='hunk'>@@ -1617,8 +1643,6 @@ static struct macsec_rx_sa *get_rxsa_from_nl(struct net *net,</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='ctx'> 	*assoc_num = nla_get_u8(tb_sa[MACSEC_SA_ATTR_AN]);</div><div class='del'>-	if (*assoc_num &gt;= MACSEC_NUM_AN)</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='ctx'> 	rx_sc = get_rxsc_from_nl(net, attrs, tb_rxsc, devp, secyp);</div><div class='ctx'> 	if (IS_ERR(rx_sc))</div><div class='hunk'>@@ -1641,24 +1665,21 @@ static const struct nla_policy macsec_genl_policy[NUM_MACSEC_ATTR] = {</div><div class='ctx'> </div><div class='ctx'> static const struct nla_policy macsec_genl_rxsc_policy[NUM_MACSEC_RXSC_ATTR] = {</div><div class='ctx'> 	[MACSEC_RXSC_ATTR_SCI] = { .type = NLA_U64 },</div><div class='del'>-	[MACSEC_RXSC_ATTR_ACTIVE] = { .type = NLA_U8 },</div><div class='add'>+	[MACSEC_RXSC_ATTR_ACTIVE] = NLA_POLICY_MAX(NLA_U8, 1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct nla_policy macsec_genl_sa_policy[NUM_MACSEC_SA_ATTR] = {</div><div class='del'>-	[MACSEC_SA_ATTR_AN] = { .type = NLA_U8 },</div><div class='del'>-	[MACSEC_SA_ATTR_ACTIVE] = { .type = NLA_U8 },</div><div class='del'>-	[MACSEC_SA_ATTR_PN] = NLA_POLICY_MIN_LEN(4),</div><div class='del'>-	[MACSEC_SA_ATTR_KEYID] = { .type = NLA_BINARY,</div><div class='del'>-				   .len = MACSEC_KEYID_LEN, },</div><div class='del'>-	[MACSEC_SA_ATTR_KEY] = { .type = NLA_BINARY,</div><div class='del'>-				 .len = MACSEC_MAX_KEY_LEN, },</div><div class='add'>+	[MACSEC_SA_ATTR_AN] = NLA_POLICY_MAX(NLA_U8, MACSEC_NUM_AN - 1),</div><div class='add'>+	[MACSEC_SA_ATTR_ACTIVE] = NLA_POLICY_MAX(NLA_U8, 1),</div><div class='add'>+	[MACSEC_SA_ATTR_PN] = NLA_POLICY_MIN(NLA_UINT, 1),</div><div class='add'>+	[MACSEC_SA_ATTR_KEYID] = NLA_POLICY_EXACT_LEN(MACSEC_KEYID_LEN),</div><div class='add'>+	[MACSEC_SA_ATTR_KEY] = NLA_POLICY_MAX_LEN(MACSEC_MAX_KEY_LEN),</div><div class='ctx'> 	[MACSEC_SA_ATTR_SSCI] = { .type = NLA_U32 },</div><div class='del'>-	[MACSEC_SA_ATTR_SALT] = { .type = NLA_BINARY,</div><div class='del'>-				  .len = MACSEC_SALT_LEN, },</div><div class='add'>+	[MACSEC_SA_ATTR_SALT] = NLA_POLICY_EXACT_LEN(MACSEC_SALT_LEN),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct nla_policy macsec_genl_offload_policy[NUM_MACSEC_OFFLOAD_ATTR] = {</div><div class='del'>-	[MACSEC_OFFLOAD_ATTR_TYPE] = { .type = NLA_U8 },</div><div class='add'>+	[MACSEC_OFFLOAD_ATTR_TYPE] = NLA_POLICY_MAX(NLA_U8, MACSEC_OFFLOAD_MAX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Offloads an operation to a device driver */</div><div class='hunk'>@@ -1710,21 +1731,6 @@ static bool validate_add_rxsa(struct nlattr **attrs)</div><div class='ctx'> 	    !attrs[MACSEC_SA_ATTR_KEYID])</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (nla_get_u8(attrs[MACSEC_SA_ATTR_AN]) &gt;= MACSEC_NUM_AN)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (attrs[MACSEC_SA_ATTR_PN] &amp;&amp;</div><div class='del'>-	    nla_get_u64(attrs[MACSEC_SA_ATTR_PN]) == 0)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (attrs[MACSEC_SA_ATTR_ACTIVE]) {</div><div class='del'>-		if (nla_get_u8(attrs[MACSEC_SA_ATTR_ACTIVE]) &gt; 1)</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (nla_len(attrs[MACSEC_SA_ATTR_KEYID]) != MACSEC_KEYID_LEN)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1783,14 +1789,6 @@ static int macsec_add_rxsa(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> 			rtnl_unlock();</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		if (nla_len(tb_sa[MACSEC_SA_ATTR_SALT]) != MACSEC_SALT_LEN) {</div><div class='del'>-			pr_notice("macsec: nl: add_rxsa: bad salt length: %d != %d\n",</div><div class='del'>-				  nla_len(tb_sa[MACSEC_SA_ATTR_SALT]),</div><div class='del'>-				  MACSEC_SALT_LEN);</div><div class='del'>-			rtnl_unlock();</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rx_sa = rtnl_dereference(rx_sc-&gt;sa[assoc_num]);</div><div class='hunk'>@@ -1815,7 +1813,7 @@ static int macsec_add_rxsa(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> </div><div class='ctx'> 	if (tb_sa[MACSEC_SA_ATTR_PN]) {</div><div class='ctx'> 		spin_lock_bh(&amp;rx_sa-&gt;lock);</div><div class='del'>-		rx_sa-&gt;next_pn = nla_get_u64(tb_sa[MACSEC_SA_ATTR_PN]);</div><div class='add'>+		rx_sa-&gt;next_pn = nla_get_uint(tb_sa[MACSEC_SA_ATTR_PN]);</div><div class='ctx'> 		spin_unlock_bh(&amp;rx_sa-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1866,19 +1864,6 @@ cleanup:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool validate_add_rxsc(struct nlattr **attrs)</div><div class='del'>-{</div><div class='del'>-	if (!attrs[MACSEC_RXSC_ATTR_SCI])</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (attrs[MACSEC_RXSC_ATTR_ACTIVE]) {</div><div class='del'>-		if (nla_get_u8(attrs[MACSEC_RXSC_ATTR_ACTIVE]) &gt; 1)</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int macsec_add_rxsc(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='hunk'>@@ -1896,7 +1881,7 @@ static int macsec_add_rxsc(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> 	if (parse_rxsc_config(attrs, tb_rxsc))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!validate_add_rxsc(tb_rxsc))</div><div class='add'>+	if (!tb_rxsc[MACSEC_RXSC_ATTR_SCI])</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='hunk'>@@ -1955,20 +1940,6 @@ static bool validate_add_txsa(struct nlattr **attrs)</div><div class='ctx'> 	    !attrs[MACSEC_SA_ATTR_KEYID])</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (nla_get_u8(attrs[MACSEC_SA_ATTR_AN]) &gt;= MACSEC_NUM_AN)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (nla_get_u64(attrs[MACSEC_SA_ATTR_PN]) == 0)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (attrs[MACSEC_SA_ATTR_ACTIVE]) {</div><div class='del'>-		if (nla_get_u8(attrs[MACSEC_SA_ATTR_ACTIVE]) &gt; 1)</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (nla_len(attrs[MACSEC_SA_ATTR_KEYID]) != MACSEC_KEYID_LEN)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2026,14 +1997,6 @@ static int macsec_add_txsa(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> 			rtnl_unlock();</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		if (nla_len(tb_sa[MACSEC_SA_ATTR_SALT]) != MACSEC_SALT_LEN) {</div><div class='del'>-			pr_notice("macsec: nl: add_txsa: bad salt length: %d != %d\n",</div><div class='del'>-				  nla_len(tb_sa[MACSEC_SA_ATTR_SALT]),</div><div class='del'>-				  MACSEC_SALT_LEN);</div><div class='del'>-			rtnl_unlock();</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	tx_sa = rtnl_dereference(tx_sc-&gt;sa[assoc_num]);</div><div class='hunk'>@@ -2057,7 +2020,7 @@ static int macsec_add_txsa(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;tx_sa-&gt;lock);</div><div class='del'>-	tx_sa-&gt;next_pn = nla_get_u64(tb_sa[MACSEC_SA_ATTR_PN]);</div><div class='add'>+	tx_sa-&gt;next_pn = nla_get_uint(tb_sa[MACSEC_SA_ATTR_PN]);</div><div class='ctx'> 	spin_unlock_bh(&amp;tx_sa-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (tb_sa[MACSEC_SA_ATTR_ACTIVE])</div><div class='hunk'>@@ -2310,17 +2273,6 @@ static bool validate_upd_sa(struct nlattr **attrs)</div><div class='ctx'> 	    attrs[MACSEC_SA_ATTR_SALT])</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (nla_get_u8(attrs[MACSEC_SA_ATTR_AN]) &gt;= MACSEC_NUM_AN)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (attrs[MACSEC_SA_ATTR_PN] &amp;&amp; nla_get_u64(attrs[MACSEC_SA_ATTR_PN]) == 0)</div><div class='del'>-		return false;</div><div class='del'>-</div><div class='del'>-	if (attrs[MACSEC_SA_ATTR_ACTIVE]) {</div><div class='del'>-		if (nla_get_u8(attrs[MACSEC_SA_ATTR_ACTIVE]) &gt; 1)</div><div class='del'>-			return false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2369,7 +2321,7 @@ static int macsec_upd_txsa(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_bh(&amp;tx_sa-&gt;lock);</div><div class='ctx'> 		prev_pn = tx_sa-&gt;next_pn_halves;</div><div class='del'>-		tx_sa-&gt;next_pn = nla_get_u64(tb_sa[MACSEC_SA_ATTR_PN]);</div><div class='add'>+		tx_sa-&gt;next_pn = nla_get_uint(tb_sa[MACSEC_SA_ATTR_PN]);</div><div class='ctx'> 		spin_unlock_bh(&amp;tx_sa-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2467,7 +2419,7 @@ static int macsec_upd_rxsa(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_bh(&amp;rx_sa-&gt;lock);</div><div class='ctx'> 		prev_pn = rx_sa-&gt;next_pn_halves;</div><div class='del'>-		rx_sa-&gt;next_pn = nla_get_u64(tb_sa[MACSEC_SA_ATTR_PN]);</div><div class='add'>+		rx_sa-&gt;next_pn = nla_get_uint(tb_sa[MACSEC_SA_ATTR_PN]);</div><div class='ctx'> 		spin_unlock_bh(&amp;rx_sa-&gt;lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2527,7 +2479,7 @@ static int macsec_upd_rxsc(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> 	if (parse_rxsc_config(attrs, tb_rxsc))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (!validate_add_rxsc(tb_rxsc))</div><div class='add'>+	if (!tb_rxsc[MACSEC_RXSC_ATTR_SCI])</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='hunk'>@@ -2621,6 +2573,17 @@ static void macsec_set_head_tail_room(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;needed_tailroom = real_dev-&gt;needed_tailroom + needed_tailroom;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void macsec_inherit_tso_max(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct macsec_dev *macsec = macsec_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* if macsec is offloaded, we need to follow the lower</div><div class='add'>+	 * device's capabilities. otherwise, we can ignore them.</div><div class='add'>+	 */</div><div class='add'>+	if (macsec_is_offloaded(macsec))</div><div class='add'>+		netif_inherit_tso_max(dev, macsec-&gt;real_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int macsec_update_offload(struct net_device *dev, enum macsec_offload offload)</div><div class='ctx'> {</div><div class='ctx'> 	enum macsec_offload prev_offload;</div><div class='hunk'>@@ -2666,6 +2629,10 @@ static int macsec_update_offload(struct net_device *dev, enum macsec_offload off</div><div class='ctx'> 	macsec_set_head_tail_room(dev);</div><div class='ctx'> 	macsec-&gt;insert_tx_tag = macsec_needs_tx_tag(macsec, ops);</div><div class='ctx'> </div><div class='add'>+	macsec_inherit_tso_max(dev);</div><div class='add'>+</div><div class='add'>+	netdev_update_features(dev);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3521,6 +3488,10 @@ static netdev_tx_t macsec_start_xmit(struct sk_buff *skb,</div><div class='ctx'> #define MACSEC_FEATURES \</div><div class='ctx'> 	(NETIF_F_SG | NETIF_F_HIGHDMA | NETIF_F_FRAGLIST)</div><div class='ctx'> </div><div class='add'>+#define MACSEC_OFFLOAD_FEATURES \</div><div class='add'>+	(MACSEC_FEATURES | NETIF_F_GSO_SOFTWARE | NETIF_F_SOFT_FEATURES | \</div><div class='add'>+	 NETIF_F_LRO | NETIF_F_RXHASH | NETIF_F_CSUM_MASK | NETIF_F_RXCSUM)</div><div class='add'>+</div><div class='ctx'> static int macsec_dev_init(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct macsec_dev *macsec = macsec_priv(dev);</div><div class='hunk'>@@ -3531,7 +3502,12 @@ static int macsec_dev_init(struct net_device *dev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;features = real_dev-&gt;features &amp; MACSEC_FEATURES;</div><div class='add'>+	macsec_inherit_tso_max(dev);</div><div class='add'>+</div><div class='add'>+	dev-&gt;hw_features = real_dev-&gt;hw_features &amp; MACSEC_OFFLOAD_FEATURES;</div><div class='add'>+	dev-&gt;hw_features |= NETIF_F_GSO_SOFTWARE;</div><div class='add'>+</div><div class='add'>+	dev-&gt;features = real_dev-&gt;features &amp; MACSEC_OFFLOAD_FEATURES;</div><div class='ctx'> 	dev-&gt;features |= NETIF_F_GSO_SOFTWARE;</div><div class='ctx'> 	dev-&gt;lltx = true;</div><div class='ctx'> 	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;</div><div class='hunk'>@@ -3561,8 +3537,12 @@ static netdev_features_t macsec_fix_features(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct macsec_dev *macsec = macsec_priv(dev);</div><div class='ctx'> 	struct net_device *real_dev = macsec-&gt;real_dev;</div><div class='add'>+	netdev_features_t mask;</div><div class='add'>+</div><div class='add'>+	mask = macsec_is_offloaded(macsec) ? MACSEC_OFFLOAD_FEATURES</div><div class='add'>+					   : MACSEC_FEATURES;</div><div class='ctx'> </div><div class='del'>-	features &amp;= (real_dev-&gt;features &amp; MACSEC_FEATURES) |</div><div class='add'>+	features &amp;= (real_dev-&gt;features &amp; mask) |</div><div class='ctx'> 		    NETIF_F_GSO_SOFTWARE | NETIF_F_SOFT_FEATURES;</div><div class='ctx'> </div><div class='ctx'> 	return features;</div><div class='hunk'>@@ -3777,21 +3757,23 @@ static const struct device_type macsec_type = {</div><div class='ctx'> 	.name = "macsec",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int validate_cipher_suite(const struct nlattr *attr,</div><div class='add'>+				 struct netlink_ext_ack *extack);</div><div class='ctx'> static const struct nla_policy macsec_rtnl_policy[IFLA_MACSEC_MAX + 1] = {</div><div class='ctx'> 	[IFLA_MACSEC_SCI] = { .type = NLA_U64 },</div><div class='ctx'> 	[IFLA_MACSEC_PORT] = { .type = NLA_U16 },</div><div class='del'>-	[IFLA_MACSEC_ICV_LEN] = { .type = NLA_U8 },</div><div class='del'>-	[IFLA_MACSEC_CIPHER_SUITE] = { .type = NLA_U64 },</div><div class='add'>+	[IFLA_MACSEC_ICV_LEN] = NLA_POLICY_RANGE(NLA_U8, MACSEC_MIN_ICV_LEN, MACSEC_STD_ICV_LEN),</div><div class='add'>+	[IFLA_MACSEC_CIPHER_SUITE] = NLA_POLICY_VALIDATE_FN(NLA_U64, validate_cipher_suite),</div><div class='ctx'> 	[IFLA_MACSEC_WINDOW] = { .type = NLA_U32 },</div><div class='del'>-	[IFLA_MACSEC_ENCODING_SA] = { .type = NLA_U8 },</div><div class='del'>-	[IFLA_MACSEC_ENCRYPT] = { .type = NLA_U8 },</div><div class='del'>-	[IFLA_MACSEC_PROTECT] = { .type = NLA_U8 },</div><div class='del'>-	[IFLA_MACSEC_INC_SCI] = { .type = NLA_U8 },</div><div class='del'>-	[IFLA_MACSEC_ES] = { .type = NLA_U8 },</div><div class='del'>-	[IFLA_MACSEC_SCB] = { .type = NLA_U8 },</div><div class='del'>-	[IFLA_MACSEC_REPLAY_PROTECT] = { .type = NLA_U8 },</div><div class='del'>-	[IFLA_MACSEC_VALIDATION] = { .type = NLA_U8 },</div><div class='del'>-	[IFLA_MACSEC_OFFLOAD] = { .type = NLA_U8 },</div><div class='add'>+	[IFLA_MACSEC_ENCODING_SA] = NLA_POLICY_MAX(NLA_U8, MACSEC_NUM_AN - 1),</div><div class='add'>+	[IFLA_MACSEC_ENCRYPT] = NLA_POLICY_MAX(NLA_U8, 1),</div><div class='add'>+	[IFLA_MACSEC_PROTECT] = NLA_POLICY_MAX(NLA_U8, 1),</div><div class='add'>+	[IFLA_MACSEC_INC_SCI] = NLA_POLICY_MAX(NLA_U8, 1),</div><div class='add'>+	[IFLA_MACSEC_ES] = NLA_POLICY_MAX(NLA_U8, 1),</div><div class='add'>+	[IFLA_MACSEC_SCB] = NLA_POLICY_MAX(NLA_U8, 1),</div><div class='add'>+	[IFLA_MACSEC_REPLAY_PROTECT] = NLA_POLICY_MAX(NLA_U8, 1),</div><div class='add'>+	[IFLA_MACSEC_VALIDATION] = NLA_POLICY_MAX(NLA_U8, MACSEC_VALIDATE_MAX),</div><div class='add'>+	[IFLA_MACSEC_OFFLOAD] = NLA_POLICY_MAX(NLA_U8, MACSEC_OFFLOAD_MAX),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void macsec_free_netdev(struct net_device *dev)</div><div class='hunk'>@@ -3811,7 +3793,7 @@ static void macsec_setup(struct net_device *dev)</div><div class='ctx'> 	ether_setup(dev);</div><div class='ctx'> 	dev-&gt;min_mtu = 0;</div><div class='ctx'> 	dev-&gt;max_mtu = ETH_MAX_MTU;</div><div class='del'>-	dev-&gt;priv_flags |= IFF_NO_QUEUE;</div><div class='add'>+	dev-&gt;priv_flags |= IFF_NO_QUEUE | IFF_UNICAST_FLT;</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;macsec_netdev_ops;</div><div class='ctx'> 	dev-&gt;needs_free_netdev = true;</div><div class='ctx'> 	dev-&gt;priv_destructor = macsec_free_netdev;</div><div class='hunk'>@@ -4113,11 +4095,14 @@ static int macsec_add_dev(struct net_device *dev, sci_t sci, u8 icv_len)</div><div class='ctx'> </div><div class='ctx'> static struct lock_class_key macsec_netdev_addr_lock_key;</div><div class='ctx'> </div><div class='del'>-static int macsec_newlink(struct net *net, struct net_device *dev,</div><div class='del'>-			  struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int macsec_newlink(struct net_device *dev,</div><div class='add'>+			  struct rtnl_newlink_params *params,</div><div class='ctx'> 			  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='ctx'> 	struct macsec_dev *macsec = macsec_priv(dev);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	rx_handler_func_t *rx_handler;</div><div class='ctx'> 	u8 icv_len = MACSEC_DEFAULT_ICV_LEN;</div><div class='ctx'> 	struct net_device *real_dev;</div><div class='hunk'>@@ -4126,7 +4111,7 @@ static int macsec_newlink(struct net *net, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	if (!tb[IFLA_LINK])</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	real_dev = __dev_get_by_index(net, nla_get_u32(tb[IFLA_LINK]));</div><div class='add'>+	real_dev = __dev_get_by_index(link_net, nla_get_u32(tb[IFLA_LINK]));</div><div class='ctx'> 	if (!real_dev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	if (real_dev-&gt;type != ARPHRD_ETHER)</div><div class='hunk'>@@ -4226,6 +4211,7 @@ static int macsec_newlink(struct net *net, struct net_device *dev,</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto del_dev;</div><div class='ctx'> </div><div class='add'>+	netdev_update_features(dev);</div><div class='ctx'> 	netif_stacked_transfer_operstate(real_dev, dev);</div><div class='ctx'> 	linkwatch_fire_event(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -4242,20 +4228,30 @@ unregister:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int validate_cipher_suite(const struct nlattr *attr,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	switch (nla_get_u64(attr)) {</div><div class='add'>+	case MACSEC_CIPHER_ID_GCM_AES_128:</div><div class='add'>+	case MACSEC_CIPHER_ID_GCM_AES_256:</div><div class='add'>+	case MACSEC_CIPHER_ID_GCM_AES_XPN_128:</div><div class='add'>+	case MACSEC_CIPHER_ID_GCM_AES_XPN_256:</div><div class='add'>+	case MACSEC_DEFAULT_CIPHER_ID:</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int macsec_validate_attr(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	u64 csid = MACSEC_DEFAULT_CIPHER_ID;</div><div class='ctx'> 	u8 icv_len = MACSEC_DEFAULT_ICV_LEN;</div><div class='del'>-	int flag;</div><div class='ctx'> 	bool es, scb, sci;</div><div class='ctx'> </div><div class='ctx'> 	if (!data)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (data[IFLA_MACSEC_CIPHER_SUITE])</div><div class='del'>-		csid = nla_get_u64(data[IFLA_MACSEC_CIPHER_SUITE]);</div><div class='del'>-</div><div class='ctx'> 	if (data[IFLA_MACSEC_ICV_LEN]) {</div><div class='ctx'> 		icv_len = nla_get_u8(data[IFLA_MACSEC_ICV_LEN]);</div><div class='ctx'> 		if (icv_len != MACSEC_DEFAULT_ICV_LEN) {</div><div class='hunk'>@@ -4271,45 +4267,13 @@ static int macsec_validate_attr(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (csid) {</div><div class='del'>-	case MACSEC_CIPHER_ID_GCM_AES_128:</div><div class='del'>-	case MACSEC_CIPHER_ID_GCM_AES_256:</div><div class='del'>-	case MACSEC_CIPHER_ID_GCM_AES_XPN_128:</div><div class='del'>-	case MACSEC_CIPHER_ID_GCM_AES_XPN_256:</div><div class='del'>-	case MACSEC_DEFAULT_CIPHER_ID:</div><div class='del'>-		if (icv_len &lt; MACSEC_MIN_ICV_LEN ||</div><div class='del'>-		    icv_len &gt; MACSEC_STD_ICV_LEN)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data[IFLA_MACSEC_ENCODING_SA]) {</div><div class='del'>-		if (nla_get_u8(data[IFLA_MACSEC_ENCODING_SA]) &gt;= MACSEC_NUM_AN)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (flag = IFLA_MACSEC_ENCODING_SA + 1;</div><div class='del'>-	     flag &lt; IFLA_MACSEC_VALIDATION;</div><div class='del'>-	     flag++) {</div><div class='del'>-		if (data[flag]) {</div><div class='del'>-			if (nla_get_u8(data[flag]) &gt; 1)</div><div class='del'>-				return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	es  = data[IFLA_MACSEC_ES] ? nla_get_u8(data[IFLA_MACSEC_ES]) : false;</div><div class='del'>-	sci = data[IFLA_MACSEC_INC_SCI] ? nla_get_u8(data[IFLA_MACSEC_INC_SCI]) : false;</div><div class='del'>-	scb = data[IFLA_MACSEC_SCB] ? nla_get_u8(data[IFLA_MACSEC_SCB]) : false;</div><div class='add'>+	es  = nla_get_u8_default(data[IFLA_MACSEC_ES], false);</div><div class='add'>+	sci = nla_get_u8_default(data[IFLA_MACSEC_INC_SCI], false);</div><div class='add'>+	scb = nla_get_u8_default(data[IFLA_MACSEC_SCB], false);</div><div class='ctx'> </div><div class='ctx'> 	if ((sci &amp;&amp; (scb || es)) || (scb &amp;&amp; es))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (data[IFLA_MACSEC_VALIDATION] &amp;&amp;</div><div class='del'>-	    nla_get_u8(data[IFLA_MACSEC_VALIDATION]) &gt; MACSEC_VALIDATE_MAX)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if ((data[IFLA_MACSEC_REPLAY_PROTECT] &amp;&amp;</div><div class='ctx'> 	     nla_get_u8(data[IFLA_MACSEC_REPLAY_PROTECT])) &amp;&amp;</div><div class='ctx'> 	    !data[IFLA_MACSEC_WINDOW])</div><div class='hunk'>@@ -4428,31 +4392,26 @@ static int macsec_notify(struct notifier_block *this, unsigned long event,</div><div class='ctx'> 			 void *ptr)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *real_dev = netdev_notifier_info_to_dev(ptr);</div><div class='add'>+	struct macsec_rxh_data *rxd;</div><div class='add'>+	struct macsec_dev *m, *n;</div><div class='ctx'> 	LIST_HEAD(head);</div><div class='ctx'> </div><div class='ctx'> 	if (!is_macsec_master(real_dev))</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='ctx'> </div><div class='add'>+	rxd = macsec_data_rtnl(real_dev);</div><div class='add'>+</div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case NETDEV_DOWN:</div><div class='ctx'> 	case NETDEV_UP:</div><div class='del'>-	case NETDEV_CHANGE: {</div><div class='del'>-		struct macsec_dev *m, *n;</div><div class='del'>-		struct macsec_rxh_data *rxd;</div><div class='del'>-</div><div class='del'>-		rxd = macsec_data_rtnl(real_dev);</div><div class='add'>+	case NETDEV_CHANGE:</div><div class='ctx'> 		list_for_each_entry_safe(m, n, &amp;rxd-&gt;secys, secys) {</div><div class='ctx'> 			struct net_device *dev = m-&gt;secy.netdev;</div><div class='ctx'> </div><div class='ctx'> 			netif_stacked_transfer_operstate(real_dev, dev);</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='del'>-	case NETDEV_UNREGISTER: {</div><div class='del'>-		struct macsec_dev *m, *n;</div><div class='del'>-		struct macsec_rxh_data *rxd;</div><div class='del'>-</div><div class='del'>-		rxd = macsec_data_rtnl(real_dev);</div><div class='add'>+	case NETDEV_UNREGISTER:</div><div class='ctx'> 		list_for_each_entry_safe(m, n, &amp;rxd-&gt;secys, secys) {</div><div class='ctx'> 			macsec_common_dellink(m-&gt;secy.netdev, &amp;head);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -4462,12 +4421,7 @@ static int macsec_notify(struct notifier_block *this, unsigned long event,</div><div class='ctx'> </div><div class='ctx'> 		unregister_netdevice_many(&amp;head);</div><div class='ctx'> 		break;</div><div class='del'>-	}</div><div class='del'>-	case NETDEV_CHANGEMTU: {</div><div class='del'>-		struct macsec_dev *m;</div><div class='del'>-		struct macsec_rxh_data *rxd;</div><div class='del'>-</div><div class='del'>-		rxd = macsec_data_rtnl(real_dev);</div><div class='add'>+	case NETDEV_CHANGEMTU:</div><div class='ctx'> 		list_for_each_entry(m, &amp;rxd-&gt;secys, secys) {</div><div class='ctx'> 			struct net_device *dev = m-&gt;secy.netdev;</div><div class='ctx'> 			unsigned int mtu = real_dev-&gt;mtu - (m-&gt;secy.icv_len +</div><div class='hunk'>@@ -4476,7 +4430,13 @@ static int macsec_notify(struct notifier_block *this, unsigned long event,</div><div class='ctx'> 			if (dev-&gt;mtu &gt; mtu)</div><div class='ctx'> 				dev_set_mtu(dev, mtu);</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='add'>+		break;</div><div class='add'>+	case NETDEV_FEAT_CHANGE:</div><div class='add'>+		list_for_each_entry(m, &amp;rxd-&gt;secys, secys) {</div><div class='add'>+			macsec_inherit_tso_max(m-&gt;secy.netdev);</div><div class='add'>+			netdev_update_features(m-&gt;secy.netdev);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return NOTIFY_OK;</div><div class='head'>diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c<br/>index edbd5afcec41..7966545512cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/macvlan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/macvlan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/macvlan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/macvlan.c</a></div><div class='hunk'>@@ -28,6 +28,7 @@</div><div class='ctx'> #include &lt;linux/if_macvlan.h&gt;</div><div class='ctx'> #include &lt;linux/hash.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;net/xfrm.h&gt;</div><div class='ctx'> #include &lt;linux/netpoll.h&gt;</div><div class='hunk'>@@ -253,7 +254,7 @@ static u32 macvlan_hash_mix(const struct macvlan_dev *vlan)</div><div class='ctx'> static unsigned int mc_hash(const struct macvlan_dev *vlan,</div><div class='ctx'> 			    const unsigned char *addr)</div><div class='ctx'> {</div><div class='del'>-	u32 val = __get_unaligned_cpu32(addr + 2);</div><div class='add'>+	u32 val = get_unaligned((u32 *)(addr + 2));</div><div class='ctx'> </div><div class='ctx'> 	val ^= macvlan_hash_mix(vlan);</div><div class='ctx'> 	return hash_32(val, MACVLAN_MC_FILTER_BITS);</div><div class='hunk'>@@ -368,7 +369,7 @@ static void macvlan_broadcast_enqueue(struct macvlan_port *port,</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock(&amp;port-&gt;bc_queue.lock);</div><div class='ctx'> </div><div class='del'>-	queue_work(system_unbound_wq, &amp;port-&gt;bc_work);</div><div class='add'>+	queue_work(system_dfl_wq, &amp;port-&gt;bc_work);</div><div class='ctx'> </div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto free_nskb;</div><div class='hunk'>@@ -753,13 +754,13 @@ static int macvlan_sync_address(struct net_device *dev,</div><div class='ctx'> static int macvlan_set_mac_address(struct net_device *dev, void *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct macvlan_dev *vlan = netdev_priv(dev);</div><div class='del'>-	struct sockaddr *addr = p;</div><div class='add'>+	struct sockaddr_storage *addr = p;</div><div class='ctx'> </div><div class='del'>-	if (!is_valid_ether_addr(addr-&gt;sa_data))</div><div class='add'>+	if (!is_valid_ether_addr(addr-&gt;__data))</div><div class='ctx'> 		return -EADDRNOTAVAIL;</div><div class='ctx'> </div><div class='ctx'> 	/* If the addresses are the same, this is a no-op */</div><div class='del'>-	if (ether_addr_equal(dev-&gt;dev_addr, addr-&gt;sa_data))</div><div class='add'>+	if (ether_addr_equal(dev-&gt;dev_addr, addr-&gt;__data))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	if (vlan-&gt;mode == MACVLAN_MODE_PASSTHRU) {</div><div class='hunk'>@@ -767,10 +768,10 @@ static int macvlan_set_mac_address(struct net_device *dev, void *p)</div><div class='ctx'> 		return dev_set_mac_address(vlan-&gt;lowerdev, addr, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (macvlan_addr_busy(vlan-&gt;port, addr-&gt;sa_data))</div><div class='add'>+	if (macvlan_addr_busy(vlan-&gt;port, addr-&gt;__data))</div><div class='ctx'> 		return -EADDRINUSE;</div><div class='ctx'> </div><div class='del'>-	return macvlan_sync_address(dev, addr-&gt;sa_data);</div><div class='add'>+	return macvlan_sync_address(dev, addr-&gt;__data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void macvlan_change_rx_flags(struct net_device *dev, int change)</div><div class='hunk'>@@ -1024,7 +1025,7 @@ static int macvlan_vlan_rx_kill_vid(struct net_device *dev,</div><div class='ctx'> static int macvlan_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			   struct net_device *dev,</div><div class='ctx'> 			   const unsigned char *addr, u16 vid,</div><div class='del'>-			   u16 flags,</div><div class='add'>+			   u16 flags, bool *notified,</div><div class='ctx'> 			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct macvlan_dev *vlan = netdev_priv(dev);</div><div class='hunk'>@@ -1049,7 +1050,7 @@ static int macvlan_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> </div><div class='ctx'> static int macvlan_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			   struct net_device *dev,</div><div class='del'>-			   const unsigned char *addr, u16 vid,</div><div class='add'>+			   const unsigned char *addr, u16 vid, bool *notified,</div><div class='ctx'> 			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct macvlan_dev *vlan = netdev_priv(dev);</div><div class='hunk'>@@ -1294,11 +1295,11 @@ static void macvlan_port_destroy(struct net_device *dev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (macvlan_passthru(port) &amp;&amp;</div><div class='ctx'> 	    !ether_addr_equal(port-&gt;dev-&gt;dev_addr, port-&gt;perm_addr)) {</div><div class='del'>-		struct sockaddr sa;</div><div class='add'>+		struct sockaddr_storage ss;</div><div class='ctx'> </div><div class='del'>-		sa.sa_family = port-&gt;dev-&gt;type;</div><div class='del'>-		memcpy(&amp;sa.sa_data, port-&gt;perm_addr, port-&gt;dev-&gt;addr_len);</div><div class='del'>-		dev_set_mac_address(port-&gt;dev, &amp;sa, NULL);</div><div class='add'>+		ss.ss_family = port-&gt;dev-&gt;type;</div><div class='add'>+		memcpy(&amp;ss.__data, port-&gt;perm_addr, port-&gt;dev-&gt;addr_len);</div><div class='add'>+		dev_set_mac_address(port-&gt;dev, &amp;ss, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(port);</div><div class='hunk'>@@ -1440,21 +1441,24 @@ static int macvlan_changelink_sources(struct macvlan_dev *vlan, u32 mode,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int macvlan_common_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-			   struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+int macvlan_common_newlink(struct net_device *dev,</div><div class='add'>+			   struct rtnl_newlink_params *params,</div><div class='ctx'> 			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='ctx'> 	struct macvlan_dev *vlan = netdev_priv(dev);</div><div class='del'>-	struct macvlan_port *port;</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	struct net_device *lowerdev;</div><div class='del'>-	int err;</div><div class='del'>-	int macmode;</div><div class='add'>+	struct macvlan_port *port;</div><div class='ctx'> 	bool create = false;</div><div class='add'>+	int macmode;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!tb[IFLA_LINK])</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	lowerdev = __dev_get_by_index(src_net, nla_get_u32(tb[IFLA_LINK]));</div><div class='add'>+	lowerdev = __dev_get_by_index(link_net, nla_get_u32(tb[IFLA_LINK]));</div><div class='ctx'> 	if (lowerdev == NULL)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='hunk'>@@ -1565,11 +1569,11 @@ destroy_macvlan_port:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(macvlan_common_newlink);</div><div class='ctx'> </div><div class='del'>-static int macvlan_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-			   struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int macvlan_newlink(struct net_device *dev,</div><div class='add'>+			   struct rtnl_newlink_params *params,</div><div class='ctx'> 			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	return macvlan_common_newlink(src_net, dev, tb, data, extack);</div><div class='add'>+	return macvlan_common_newlink(dev, params, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void macvlan_dellink(struct net_device *dev, struct list_head *head)</div><div class='head'>diff --git a/drivers/net/macvtap.c b/drivers/net/macvtap.c<br/>index 29a5929d48e5..b391a0f740a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/macvtap.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/macvtap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/macvtap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/macvtap.c</a></div><div class='hunk'>@@ -77,8 +77,8 @@ static void macvtap_update_features(struct tap_dev *tap,</div><div class='ctx'> 	netdev_update_features(vlan-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int macvtap_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-			   struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int macvtap_newlink(struct net_device *dev,</div><div class='add'>+			   struct rtnl_newlink_params *params,</div><div class='ctx'> 			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct macvtap_dev *vlantap = netdev_priv(dev);</div><div class='hunk'>@@ -105,7 +105,7 @@ static int macvtap_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	/* Don't put anything that may fail after macvlan_common_newlink</div><div class='ctx'> 	 * because we can't undo what it does.</div><div class='ctx'> 	 */</div><div class='del'>-	err = macvlan_common_newlink(src_net, dev, tb, data, extack);</div><div class='add'>+	err = macvlan_common_newlink(dev, params, extack);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netdev_rx_handler_unregister(dev);</div><div class='ctx'> 		return err;</div><div class='head'>diff --git a/drivers/net/mctp/Kconfig b/drivers/net/mctp/Kconfig<br/>index 15860d6ac39f..cf325ab0b1ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mctp/Kconfig</a></div><div class='hunk'>@@ -47,6 +47,16 @@ config MCTP_TRANSPORT_I3C</div><div class='ctx'> 	  A MCTP protocol network device is created for each I3C bus</div><div class='ctx'> 	  having a "mctp-controller" devicetree property.</div><div class='ctx'> </div><div class='add'>+config MCTP_TRANSPORT_USB</div><div class='add'>+	tristate "MCTP USB transport"</div><div class='add'>+	depends on USB</div><div class='add'>+	help</div><div class='add'>+	  Provides a driver to access MCTP devices over USB transport,</div><div class='add'>+	  defined by DMTF specification DSP0283.</div><div class='add'>+</div><div class='add'>+	  MCTP-over-USB interfaces are peer-to-peer, so each interface</div><div class='add'>+	  represents a physical connection to one remote MCTP endpoint.</div><div class='add'>+</div><div class='ctx'> endmenu</div><div class='ctx'> </div><div class='ctx'> endif</div><div class='head'>diff --git a/drivers/net/mctp/Makefile b/drivers/net/mctp/Makefile<br/>index e1cb99ced54a..c36006849a1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mctp/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='ctx'> obj-$(CONFIG_MCTP_SERIAL) += mctp-serial.o</div><div class='ctx'> obj-$(CONFIG_MCTP_TRANSPORT_I2C) += mctp-i2c.o</div><div class='ctx'> obj-$(CONFIG_MCTP_TRANSPORT_I3C) += mctp-i3c.o</div><div class='add'>+obj-$(CONFIG_MCTP_TRANSPORT_USB) += mctp-usb.o</div><div class='head'>diff --git a/drivers/net/mctp/mctp-i2c.c b/drivers/net/mctp/mctp-i2c.c<br/>index e70fb6687994..f782d93f826e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/mctp-i2c.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/mctp-i2c.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/mctp-i2c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mctp/mctp-i2c.c</a></div><div class='hunk'>@@ -177,8 +177,7 @@ static struct mctp_i2c_client *mctp_i2c_new_client(struct i2c_client *client)</div><div class='ctx'> 	return mcli;</div><div class='ctx'> err:</div><div class='ctx'> 	if (mcli) {</div><div class='del'>-		if (mcli-&gt;client)</div><div class='del'>-			i2c_unregister_device(mcli-&gt;client);</div><div class='add'>+		i2c_unregister_device(mcli-&gt;client);</div><div class='ctx'> 		kfree(mcli);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ERR_PTR(rc);</div><div class='hunk'>@@ -538,7 +537,7 @@ static void mctp_i2c_xmit(struct mctp_i2c_dev *midev, struct sk_buff *skb)</div><div class='ctx'> 		rc = __i2c_transfer(midev-&gt;adapter, &amp;msg, 1);</div><div class='ctx'> </div><div class='ctx'> 		/* on tx errors, the flow can no longer be considered valid */</div><div class='del'>-		if (rc)</div><div class='add'>+		if (rc &lt; 0)</div><div class='ctx'> 			mctp_i2c_invalidate_tx_flow(midev, skb);</div><div class='ctx'> </div><div class='ctx'> 		break;</div><div class='hunk'>@@ -584,6 +583,7 @@ static int mctp_i2c_header_create(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	struct mctp_i2c_hdr *hdr;</div><div class='ctx'> 	struct mctp_hdr *mhdr;</div><div class='ctx'> 	u8 lldst, llsrc;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='ctx'> 	if (len &gt; MCTP_I2C_MAXMTU)</div><div class='ctx'> 		return -EMSGSIZE;</div><div class='hunk'>@@ -594,6 +594,10 @@ static int mctp_i2c_header_create(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	lldst = *((u8 *)daddr);</div><div class='ctx'> 	llsrc = *((u8 *)saddr);</div><div class='ctx'> </div><div class='add'>+	rc = skb_cow_head(skb, sizeof(struct mctp_i2c_hdr));</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='ctx'> 	skb_push(skb, sizeof(struct mctp_i2c_hdr));</div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='ctx'> 	hdr = (void *)skb_mac_header(skb);</div><div class='hunk'>@@ -880,7 +884,8 @@ static int mctp_i2c_add_netdev(struct mctp_i2c_client *mcli,</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rc = mctp_register_netdev(ndev, &amp;mctp_i2c_mctp_ops);</div><div class='add'>+	rc = mctp_register_netdev(ndev, &amp;mctp_i2c_mctp_ops,</div><div class='add'>+				  MCTP_PHYS_BINDING_SMBUS);</div><div class='ctx'> 	if (rc &lt; 0) {</div><div class='ctx'> 		dev_err(&amp;mcli-&gt;client-&gt;dev,</div><div class='ctx'> 			"register netdev \"%s\" failed %d\n",</div><div class='head'>diff --git a/drivers/net/mctp/mctp-i3c.c b/drivers/net/mctp/mctp-i3c.c<br/>index 1bc87a062686..36c2405677c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/mctp-i3c.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/mctp-i3c.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/mctp-i3c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mctp/mctp-i3c.c</a></div><div class='hunk'>@@ -99,7 +99,7 @@ struct mctp_i3c_internal_hdr {</div><div class='ctx'> </div><div class='ctx'> static int mctp_i3c_read(struct mctp_i3c_device *mi)</div><div class='ctx'> {</div><div class='del'>-	struct i3c_priv_xfer xfer = { .rnw = 1, .len = mi-&gt;mrl };</div><div class='add'>+	struct i3c_xfer xfer = { .rnw = 1, .len = mi-&gt;mrl };</div><div class='ctx'> 	struct net_device_stats *stats = &amp;mi-&gt;mbus-&gt;ndev-&gt;stats;</div><div class='ctx'> 	struct mctp_i3c_internal_hdr *ihdr = NULL;</div><div class='ctx'> 	struct sk_buff *skb = NULL;</div><div class='hunk'>@@ -125,7 +125,9 @@ static int mctp_i3c_read(struct mctp_i3c_device *mi)</div><div class='ctx'> </div><div class='ctx'> 	xfer.data.in = skb_put(skb, mi-&gt;mrl);</div><div class='ctx'> </div><div class='del'>-	rc = i3c_device_do_priv_xfers(mi-&gt;i3c, &amp;xfer, 1);</div><div class='add'>+	/* Make sure netif_rx() is read in the same order as i3c. */</div><div class='add'>+	mutex_lock(&amp;mi-&gt;lock);</div><div class='add'>+	rc = i3c_device_do_xfers(mi-&gt;i3c, &amp;xfer, 1, I3C_SDR);</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='hunk'>@@ -166,8 +168,10 @@ static int mctp_i3c_read(struct mctp_i3c_device *mi)</div><div class='ctx'> 		stats-&gt;rx_dropped++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mutex_unlock(&amp;mi-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> err:</div><div class='add'>+	mutex_unlock(&amp;mi-&gt;lock);</div><div class='ctx'> 	kfree_skb(skb);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -356,7 +360,7 @@ mctp_i3c_lookup(struct mctp_i3c_bus *mbus, u64 pid)</div><div class='ctx'> static void mctp_i3c_xmit(struct mctp_i3c_bus *mbus, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device_stats *stats = &amp;mbus-&gt;ndev-&gt;stats;</div><div class='del'>-	struct i3c_priv_xfer xfer = { .rnw = false };</div><div class='add'>+	struct i3c_xfer xfer = { .rnw = false };</div><div class='ctx'> 	struct mctp_i3c_internal_hdr *ihdr = NULL;</div><div class='ctx'> 	struct mctp_i3c_device *mi = NULL;</div><div class='ctx'> 	unsigned int data_len;</div><div class='hunk'>@@ -405,7 +409,7 @@ static void mctp_i3c_xmit(struct mctp_i3c_bus *mbus, struct sk_buff *skb)</div><div class='ctx'> 	data[data_len] = pec;</div><div class='ctx'> </div><div class='ctx'> 	xfer.data.out = data;</div><div class='del'>-	rc = i3c_device_do_priv_xfers(mi-&gt;i3c, &amp;xfer, 1);</div><div class='add'>+	rc = i3c_device_do_xfers(mi-&gt;i3c, &amp;xfer, 1, I3C_SDR);</div><div class='ctx'> 	if (rc == 0) {</div><div class='ctx'> 		stats-&gt;tx_bytes += data_len;</div><div class='ctx'> 		stats-&gt;tx_packets++;</div><div class='hunk'>@@ -502,6 +506,14 @@ static int mctp_i3c_header_create(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	   const void *saddr, unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct mctp_i3c_internal_hdr *ihdr;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!daddr || !saddr)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rc = skb_cow_head(skb, sizeof(struct mctp_i3c_internal_hdr));</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='ctx'> 	skb_push(skb, sizeof(struct mctp_i3c_internal_hdr));</div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='hunk'>@@ -607,7 +619,7 @@ __must_hold(&amp;busdevs_lock)</div><div class='ctx'> 		goto err_free_uninit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rc = mctp_register_netdev(ndev, NULL);</div><div class='add'>+	rc = mctp_register_netdev(ndev, NULL, MCTP_PHYS_BINDING_I3C);</div><div class='ctx'> 	if (rc &lt; 0) {</div><div class='ctx'> 		dev_warn(&amp;ndev-&gt;dev, "netdev register failed: %d\n", rc);</div><div class='ctx'> 		goto err_free_netdev;</div><div class='head'>diff --git a/drivers/net/mctp/mctp-serial.c b/drivers/net/mctp/mctp-serial.c<br/>index e63720ec3238..26c9a33fd636 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/mctp-serial.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mctp/mctp-serial.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/mctp-serial.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mctp/mctp-serial.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/mctp.h&gt;</div><div class='ctx'> #include &lt;net/mctp.h&gt;</div><div class='add'>+#include &lt;net/mctpdevice.h&gt;</div><div class='ctx'> #include &lt;net/pkt_sched.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define MCTP_SERIAL_MTU		68 /* base mtu (64) + mctp header */</div><div class='hunk'>@@ -470,7 +471,7 @@ static int mctp_serial_open(struct tty_struct *tty)</div><div class='ctx'> 	spin_lock_init(&amp;dev-&gt;lock);</div><div class='ctx'> 	INIT_WORK(&amp;dev-&gt;tx_work, mctp_serial_tx_work);</div><div class='ctx'> </div><div class='del'>-	rc = register_netdev(ndev);</div><div class='add'>+	rc = mctp_register_netdev(ndev, NULL, MCTP_PHYS_BINDING_SERIAL);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto free_netdev;</div><div class='ctx'> </div><div class='hunk'>@@ -492,7 +493,7 @@ static void mctp_serial_close(struct tty_struct *tty)</div><div class='ctx'> 	struct mctp_serial *dev = tty-&gt;disc_data;</div><div class='ctx'> 	int idx = dev-&gt;idx;</div><div class='ctx'> </div><div class='del'>-	unregister_netdev(dev-&gt;netdev);</div><div class='add'>+	mctp_unregister_netdev(dev-&gt;netdev);</div><div class='ctx'> 	ida_free(&amp;mctp_serial_ida, idx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/mctp/mctp-usb.c b/drivers/net/mctp/mctp-usb.c<br/>new file mode 100644<br/>index 000000000000..ef860cfc629f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mctp/mctp-usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mctp/mctp-usb.c</a></div><div class='hunk'>@@ -0,0 +1,390 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * mctp-usb.c - MCTP-over-USB (DMTF DSP0283) transport binding driver.</div><div class='add'>+ *</div><div class='add'>+ * DSP0283 is available at:</div><div class='add'>+ * https://www.dmtf.org/sites/default/files/standards/documents/DSP0283_1.0.1.pdf</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2024-2025 Code Construct Pty Ltd</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;linux/usb/mctp-usb.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/mctp.h&gt;</div><div class='add'>+#include &lt;net/mctpdevice.h&gt;</div><div class='add'>+#include &lt;net/pkt_sched.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;uapi/linux/if_arp.h&gt;</div><div class='add'>+</div><div class='add'>+struct mctp_usb {</div><div class='add'>+	struct usb_device *usbdev;</div><div class='add'>+	struct usb_interface *intf;</div><div class='add'>+	bool stopped;</div><div class='add'>+</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+</div><div class='add'>+	u8 ep_in;</div><div class='add'>+	u8 ep_out;</div><div class='add'>+</div><div class='add'>+	struct urb *tx_urb;</div><div class='add'>+	struct urb *rx_urb;</div><div class='add'>+</div><div class='add'>+	struct delayed_work rx_retry_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mctp_usb_out_complete(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb = urb-&gt;context;</div><div class='add'>+	struct net_device *netdev = skb-&gt;dev;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	status = urb-&gt;status;</div><div class='add'>+</div><div class='add'>+	switch (status) {</div><div class='add'>+	case -ENOENT:</div><div class='add'>+	case -ECONNRESET:</div><div class='add'>+	case -ESHUTDOWN:</div><div class='add'>+	case -EPROTO:</div><div class='add'>+		dev_dstats_tx_dropped(netdev);</div><div class='add'>+		break;</div><div class='add'>+	case 0:</div><div class='add'>+		dev_dstats_tx_add(netdev, skb-&gt;len);</div><div class='add'>+		netif_wake_queue(netdev);</div><div class='add'>+		consume_skb(skb);</div><div class='add'>+		return;</div><div class='add'>+	default:</div><div class='add'>+		netdev_dbg(netdev, "unexpected tx urb status: %d\n", status);</div><div class='add'>+		dev_dstats_tx_dropped(netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t mctp_usb_start_xmit(struct sk_buff *skb,</div><div class='add'>+				       struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mctp_usb *mctp_usb = netdev_priv(dev);</div><div class='add'>+	struct mctp_usb_hdr *hdr;</div><div class='add'>+	unsigned int plen;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	plen = skb-&gt;len;</div><div class='add'>+</div><div class='add'>+	if (plen + sizeof(*hdr) &gt; MCTP_USB_XFER_SIZE)</div><div class='add'>+		goto err_drop;</div><div class='add'>+</div><div class='add'>+	rc = skb_cow_head(skb, sizeof(*hdr));</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_drop;</div><div class='add'>+</div><div class='add'>+	hdr = skb_push(skb, sizeof(*hdr));</div><div class='add'>+	if (!hdr)</div><div class='add'>+		goto err_drop;</div><div class='add'>+</div><div class='add'>+	hdr-&gt;id = cpu_to_be16(MCTP_USB_DMTF_ID);</div><div class='add'>+	hdr-&gt;rsvd = 0;</div><div class='add'>+	hdr-&gt;len = plen + sizeof(*hdr);</div><div class='add'>+</div><div class='add'>+	urb = mctp_usb-&gt;tx_urb;</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(urb, mctp_usb-&gt;usbdev,</div><div class='add'>+			  usb_sndbulkpipe(mctp_usb-&gt;usbdev, mctp_usb-&gt;ep_out),</div><div class='add'>+			  skb-&gt;data, skb-&gt;len,</div><div class='add'>+			  mctp_usb_out_complete, skb);</div><div class='add'>+</div><div class='add'>+	/* Stops TX queue first to prevent race condition with URB complete */</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+	rc = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_wake_queue(dev);</div><div class='add'>+		goto err_drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+err_drop:</div><div class='add'>+	dev_dstats_tx_dropped(dev);</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mctp_usb_in_complete(struct urb *urb);</div><div class='add'>+</div><div class='add'>+/* If we fail to queue an in urb atomically (either due to skb allocation or</div><div class='add'>+ * urb submission), we will schedule a rx queue in nonatomic context</div><div class='add'>+ * after a delay, specified in jiffies</div><div class='add'>+ */</div><div class='add'>+static const unsigned long RX_RETRY_DELAY = HZ / 4;</div><div class='add'>+</div><div class='add'>+static int mctp_usb_rx_queue(struct mctp_usb *mctp_usb, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	skb = __netdev_alloc_skb(mctp_usb-&gt;netdev, MCTP_USB_XFER_SIZE, gfp);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_retry;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(mctp_usb-&gt;rx_urb, mctp_usb-&gt;usbdev,</div><div class='add'>+			  usb_rcvbulkpipe(mctp_usb-&gt;usbdev, mctp_usb-&gt;ep_in),</div><div class='add'>+			  skb-&gt;data, MCTP_USB_XFER_SIZE,</div><div class='add'>+			  mctp_usb_in_complete, skb);</div><div class='add'>+</div><div class='add'>+	rc = usb_submit_urb(mctp_usb-&gt;rx_urb, gfp);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_dbg(mctp_usb-&gt;netdev, "rx urb submit failure: %d\n", rc);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		if (rc == -ENOMEM)</div><div class='add'>+			goto err_retry;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+</div><div class='add'>+err_retry:</div><div class='add'>+	schedule_delayed_work(&amp;mctp_usb-&gt;rx_retry_work, RX_RETRY_DELAY);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mctp_usb_in_complete(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb = urb-&gt;context;</div><div class='add'>+	struct net_device *netdev = skb-&gt;dev;</div><div class='add'>+	struct mctp_usb *mctp_usb = netdev_priv(netdev);</div><div class='add'>+	struct mctp_skb_cb *cb;</div><div class='add'>+	unsigned int len;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	status = urb-&gt;status;</div><div class='add'>+</div><div class='add'>+	switch (status) {</div><div class='add'>+	case -ENOENT:</div><div class='add'>+	case -ECONNRESET:</div><div class='add'>+	case -ESHUTDOWN:</div><div class='add'>+	case -EPROTO:</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return;</div><div class='add'>+	case 0:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_dbg(netdev, "unexpected rx urb status: %d\n", status);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len = urb-&gt;actual_length;</div><div class='add'>+	__skb_put(skb, len);</div><div class='add'>+</div><div class='add'>+	while (skb) {</div><div class='add'>+		struct sk_buff *skb2 = NULL;</div><div class='add'>+		struct mctp_usb_hdr *hdr;</div><div class='add'>+		u8 pkt_len; /* length of MCTP packet, no USB header */</div><div class='add'>+</div><div class='add'>+		skb_reset_mac_header(skb);</div><div class='add'>+		hdr = skb_pull_data(skb, sizeof(*hdr));</div><div class='add'>+		if (!hdr)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (be16_to_cpu(hdr-&gt;id) != MCTP_USB_DMTF_ID) {</div><div class='add'>+			netdev_dbg(netdev, "rx: invalid id %04x\n",</div><div class='add'>+				   be16_to_cpu(hdr-&gt;id));</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (hdr-&gt;len &lt;</div><div class='add'>+		    sizeof(struct mctp_hdr) + sizeof(struct mctp_usb_hdr)) {</div><div class='add'>+			netdev_dbg(netdev, "rx: short packet (hdr) %d\n",</div><div class='add'>+				   hdr-&gt;len);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* we know we have at least sizeof(struct mctp_usb_hdr) here */</div><div class='add'>+		pkt_len = hdr-&gt;len - sizeof(struct mctp_usb_hdr);</div><div class='add'>+		if (pkt_len &gt; skb-&gt;len) {</div><div class='add'>+			netdev_dbg(netdev,</div><div class='add'>+				   "rx: short packet (xfer) %d, actual %d\n",</div><div class='add'>+				   hdr-&gt;len, skb-&gt;len);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pkt_len &lt; skb-&gt;len) {</div><div class='add'>+			/* more packets may follow - clone to a new</div><div class='add'>+			 * skb to use on the next iteration</div><div class='add'>+			 */</div><div class='add'>+			skb2 = skb_clone(skb, GFP_ATOMIC);</div><div class='add'>+			if (skb2) {</div><div class='add'>+				if (!skb_pull(skb2, pkt_len)) {</div><div class='add'>+					kfree_skb(skb2);</div><div class='add'>+					skb2 = NULL;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			skb_trim(skb, pkt_len);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev_dstats_rx_add(netdev, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+		skb-&gt;protocol = htons(ETH_P_MCTP);</div><div class='add'>+		skb_reset_network_header(skb);</div><div class='add'>+		cb = __mctp_cb(skb);</div><div class='add'>+		cb-&gt;halen = 0;</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+</div><div class='add'>+		skb = skb2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	mctp_usb_rx_queue(mctp_usb, GFP_ATOMIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mctp_usb_rx_retry_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct mctp_usb *mctp_usb = container_of(work, struct mctp_usb,</div><div class='add'>+						 rx_retry_work.work);</div><div class='add'>+</div><div class='add'>+	if (READ_ONCE(mctp_usb-&gt;stopped))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mctp_usb_rx_queue(mctp_usb, GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mctp_usb_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mctp_usb *mctp_usb = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(mctp_usb-&gt;stopped, false);</div><div class='add'>+</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+</div><div class='add'>+	return mctp_usb_rx_queue(mctp_usb, GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mctp_usb_stop(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mctp_usb *mctp_usb = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	/* prevent RX submission retry */</div><div class='add'>+	WRITE_ONCE(mctp_usb-&gt;stopped, true);</div><div class='add'>+</div><div class='add'>+	usb_kill_urb(mctp_usb-&gt;rx_urb);</div><div class='add'>+	usb_kill_urb(mctp_usb-&gt;tx_urb);</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;mctp_usb-&gt;rx_retry_work);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops mctp_usb_netdev_ops = {</div><div class='add'>+	.ndo_start_xmit = mctp_usb_start_xmit,</div><div class='add'>+	.ndo_open = mctp_usb_open,</div><div class='add'>+	.ndo_stop = mctp_usb_stop,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mctp_usb_netdev_setup(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;type = ARPHRD_MCTP;</div><div class='add'>+</div><div class='add'>+	dev-&gt;mtu = MCTP_USB_MTU_MIN;</div><div class='add'>+	dev-&gt;min_mtu = MCTP_USB_MTU_MIN;</div><div class='add'>+	dev-&gt;max_mtu = MCTP_USB_MTU_MAX;</div><div class='add'>+</div><div class='add'>+	dev-&gt;hard_header_len = sizeof(struct mctp_usb_hdr);</div><div class='add'>+	dev-&gt;tx_queue_len = DEFAULT_TX_QUEUE_LEN;</div><div class='add'>+	dev-&gt;flags = IFF_NOARP;</div><div class='add'>+	dev-&gt;netdev_ops = &amp;mctp_usb_netdev_ops;</div><div class='add'>+	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_DSTATS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mctp_usb_probe(struct usb_interface *intf,</div><div class='add'>+			  const struct usb_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct usb_endpoint_descriptor *ep_in, *ep_out;</div><div class='add'>+	struct usb_host_interface *iface_desc;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct mctp_usb *dev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* only one alternate */</div><div class='add'>+	iface_desc = intf-&gt;cur_altsetting;</div><div class='add'>+</div><div class='add'>+	rc = usb_find_common_endpoints(iface_desc, &amp;ep_in, &amp;ep_out, NULL, NULL);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "invalid endpoints on device?\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev = alloc_netdev(sizeof(*dev), "mctpusb%d", NET_NAME_ENUM,</div><div class='add'>+			      mctp_usb_netdev_setup);</div><div class='add'>+	if (!netdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='add'>+	dev = netdev_priv(netdev);</div><div class='add'>+	dev-&gt;netdev = netdev;</div><div class='add'>+	dev-&gt;usbdev = usb_get_dev(interface_to_usbdev(intf));</div><div class='add'>+	dev-&gt;intf = intf;</div><div class='add'>+	usb_set_intfdata(intf, dev);</div><div class='add'>+</div><div class='add'>+	dev-&gt;ep_in = ep_in-&gt;bEndpointAddress;</div><div class='add'>+	dev-&gt;ep_out = ep_out-&gt;bEndpointAddress;</div><div class='add'>+</div><div class='add'>+	dev-&gt;tx_urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+	dev-&gt;rx_urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+	if (!dev-&gt;tx_urb || !dev-&gt;rx_urb) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_free_urbs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;dev-&gt;rx_retry_work, mctp_usb_rx_retry_work);</div><div class='add'>+</div><div class='add'>+	rc = mctp_register_netdev(netdev, NULL, MCTP_PHYS_BINDING_USB);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_free_urbs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_urbs:</div><div class='add'>+	usb_free_urb(dev-&gt;tx_urb);</div><div class='add'>+	usb_free_urb(dev-&gt;rx_urb);</div><div class='add'>+	free_netdev(netdev);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mctp_usb_disconnect(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct mctp_usb *dev = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='add'>+	mctp_unregister_netdev(dev-&gt;netdev);</div><div class='add'>+	usb_free_urb(dev-&gt;tx_urb);</div><div class='add'>+	usb_free_urb(dev-&gt;rx_urb);</div><div class='add'>+	usb_put_dev(dev-&gt;usbdev);</div><div class='add'>+	free_netdev(dev-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct usb_device_id mctp_usb_devices[] = {</div><div class='add'>+	{ USB_INTERFACE_INFO(USB_CLASS_MCTP, 0x0, 0x1) },</div><div class='add'>+	{ 0 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(usb, mctp_usb_devices);</div><div class='add'>+</div><div class='add'>+static struct usb_driver mctp_usb_driver = {</div><div class='add'>+	.name		= "mctp-usb",</div><div class='add'>+	.id_table	= mctp_usb_devices,</div><div class='add'>+	.probe		= mctp_usb_probe,</div><div class='add'>+	.disconnect	= mctp_usb_disconnect,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_usb_driver(mctp_usb_driver)</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Jeremy Kerr &lt;jk@codeconstruct.com.au&gt;");</div><div class='add'>+MODULE_DESCRIPTION("MCTP USB transport");</div><div class='head'>diff --git a/drivers/net/mdio.c b/drivers/net/mdio.c<br/>index e08c90ac0c6e..f67a4d4005e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio.c</a></div><div class='hunk'>@@ -167,178 +167,6 @@ static u32 mdio45_get_an(const struct mdio_if_info *mdio, u16 addr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * mdio45_ethtool_gset_npage - get settings for ETHTOOL_GSET</div><div class='del'>- * @mdio: MDIO interface</div><div class='del'>- * @ecmd: Ethtool request structure</div><div class='del'>- * @npage_adv: Modes currently advertised on next pages</div><div class='del'>- * @npage_lpa: Modes advertised by link partner on next pages</div><div class='del'>- *</div><div class='del'>- * The @ecmd parameter is expected to have been cleared before calling</div><div class='del'>- * mdio45_ethtool_gset_npage().</div><div class='del'>- *</div><div class='del'>- * Since the CSRs for auto-negotiation using next pages are not fully</div><div class='del'>- * standardised, this function does not attempt to decode them.  The</div><div class='del'>- * caller must pass them in.</div><div class='del'>- */</div><div class='del'>-void mdio45_ethtool_gset_npage(const struct mdio_if_info *mdio,</div><div class='del'>-			       struct ethtool_cmd *ecmd,</div><div class='del'>-			       u32 npage_adv, u32 npage_lpa)</div><div class='del'>-{</div><div class='del'>-	int reg;</div><div class='del'>-	u32 speed;</div><div class='del'>-</div><div class='del'>-	BUILD_BUG_ON(MDIO_SUPPORTS_C22 != ETH_MDIO_SUPPORTS_C22);</div><div class='del'>-	BUILD_BUG_ON(MDIO_SUPPORTS_C45 != ETH_MDIO_SUPPORTS_C45);</div><div class='del'>-</div><div class='del'>-	ecmd-&gt;transceiver = XCVR_INTERNAL;</div><div class='del'>-	ecmd-&gt;phy_address = mdio-&gt;prtad;</div><div class='del'>-	ecmd-&gt;mdio_support =</div><div class='del'>-		mdio-&gt;mode_support &amp; (MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22);</div><div class='del'>-</div><div class='del'>-	reg = mdio-&gt;mdio_read(mdio-&gt;dev, mdio-&gt;prtad, MDIO_MMD_PMAPMD,</div><div class='del'>-			      MDIO_CTRL2);</div><div class='del'>-	switch (reg &amp; MDIO_PMA_CTRL2_TYPE) {</div><div class='del'>-	case MDIO_PMA_CTRL2_10GBT:</div><div class='del'>-	case MDIO_PMA_CTRL2_1000BT:</div><div class='del'>-	case MDIO_PMA_CTRL2_100BTX:</div><div class='del'>-	case MDIO_PMA_CTRL2_10BT:</div><div class='del'>-		ecmd-&gt;port = PORT_TP;</div><div class='del'>-		ecmd-&gt;supported = SUPPORTED_TP;</div><div class='del'>-		reg = mdio-&gt;mdio_read(mdio-&gt;dev, mdio-&gt;prtad, MDIO_MMD_PMAPMD,</div><div class='del'>-				      MDIO_SPEED);</div><div class='del'>-		if (reg &amp; MDIO_SPEED_10G)</div><div class='del'>-			ecmd-&gt;supported |= SUPPORTED_10000baseT_Full;</div><div class='del'>-		if (reg &amp; MDIO_PMA_SPEED_1000)</div><div class='del'>-			ecmd-&gt;supported |= (SUPPORTED_1000baseT_Full |</div><div class='del'>-					    SUPPORTED_1000baseT_Half);</div><div class='del'>-		if (reg &amp; MDIO_PMA_SPEED_100)</div><div class='del'>-			ecmd-&gt;supported |= (SUPPORTED_100baseT_Full |</div><div class='del'>-					    SUPPORTED_100baseT_Half);</div><div class='del'>-		if (reg &amp; MDIO_PMA_SPEED_10)</div><div class='del'>-			ecmd-&gt;supported |= (SUPPORTED_10baseT_Full |</div><div class='del'>-					    SUPPORTED_10baseT_Half);</div><div class='del'>-		ecmd-&gt;advertising = ADVERTISED_TP;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case MDIO_PMA_CTRL2_10GBCX4:</div><div class='del'>-		ecmd-&gt;port = PORT_OTHER;</div><div class='del'>-		ecmd-&gt;supported = 0;</div><div class='del'>-		ecmd-&gt;advertising = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case MDIO_PMA_CTRL2_10GBKX4:</div><div class='del'>-	case MDIO_PMA_CTRL2_10GBKR:</div><div class='del'>-	case MDIO_PMA_CTRL2_1000BKX:</div><div class='del'>-		ecmd-&gt;port = PORT_OTHER;</div><div class='del'>-		ecmd-&gt;supported = SUPPORTED_Backplane;</div><div class='del'>-		reg = mdio-&gt;mdio_read(mdio-&gt;dev, mdio-&gt;prtad, MDIO_MMD_PMAPMD,</div><div class='del'>-				      MDIO_PMA_EXTABLE);</div><div class='del'>-		if (reg &amp; MDIO_PMA_EXTABLE_10GBKX4)</div><div class='del'>-			ecmd-&gt;supported |= SUPPORTED_10000baseKX4_Full;</div><div class='del'>-		if (reg &amp; MDIO_PMA_EXTABLE_10GBKR)</div><div class='del'>-			ecmd-&gt;supported |= SUPPORTED_10000baseKR_Full;</div><div class='del'>-		if (reg &amp; MDIO_PMA_EXTABLE_1000BKX)</div><div class='del'>-			ecmd-&gt;supported |= SUPPORTED_1000baseKX_Full;</div><div class='del'>-		reg = mdio-&gt;mdio_read(mdio-&gt;dev, mdio-&gt;prtad, MDIO_MMD_PMAPMD,</div><div class='del'>-				      MDIO_PMA_10GBR_FECABLE);</div><div class='del'>-		if (reg &amp; MDIO_PMA_10GBR_FECABLE_ABLE)</div><div class='del'>-			ecmd-&gt;supported |= SUPPORTED_10000baseR_FEC;</div><div class='del'>-		ecmd-&gt;advertising = ADVERTISED_Backplane;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* All the other defined modes are flavours of optical */</div><div class='del'>-	default:</div><div class='del'>-		ecmd-&gt;port = PORT_FIBRE;</div><div class='del'>-		ecmd-&gt;supported = SUPPORTED_FIBRE;</div><div class='del'>-		ecmd-&gt;advertising = ADVERTISED_FIBRE;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (mdio-&gt;mmds &amp; MDIO_DEVS_AN) {</div><div class='del'>-		ecmd-&gt;supported |= SUPPORTED_Autoneg;</div><div class='del'>-		reg = mdio-&gt;mdio_read(mdio-&gt;dev, mdio-&gt;prtad, MDIO_MMD_AN,</div><div class='del'>-				      MDIO_CTRL1);</div><div class='del'>-		if (reg &amp; MDIO_AN_CTRL1_ENABLE) {</div><div class='del'>-			ecmd-&gt;autoneg = AUTONEG_ENABLE;</div><div class='del'>-			ecmd-&gt;advertising |=</div><div class='del'>-				ADVERTISED_Autoneg |</div><div class='del'>-				mdio45_get_an(mdio, MDIO_AN_ADVERTISE) |</div><div class='del'>-				npage_adv;</div><div class='del'>-		} else {</div><div class='del'>-			ecmd-&gt;autoneg = AUTONEG_DISABLE;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		ecmd-&gt;autoneg = AUTONEG_DISABLE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ecmd-&gt;autoneg) {</div><div class='del'>-		u32 modes = 0;</div><div class='del'>-		int an_stat = mdio-&gt;mdio_read(mdio-&gt;dev, mdio-&gt;prtad,</div><div class='del'>-					      MDIO_MMD_AN, MDIO_STAT1);</div><div class='del'>-</div><div class='del'>-		/* If AN is complete and successful, report best common</div><div class='del'>-		 * mode, otherwise report best advertised mode. */</div><div class='del'>-		if (an_stat &amp; MDIO_AN_STAT1_COMPLETE) {</div><div class='del'>-			ecmd-&gt;lp_advertising =</div><div class='del'>-				mdio45_get_an(mdio, MDIO_AN_LPA) | npage_lpa;</div><div class='del'>-			if (an_stat &amp; MDIO_AN_STAT1_LPABLE)</div><div class='del'>-				ecmd-&gt;lp_advertising |= ADVERTISED_Autoneg;</div><div class='del'>-			modes = ecmd-&gt;advertising &amp; ecmd-&gt;lp_advertising;</div><div class='del'>-		}</div><div class='del'>-		if ((modes &amp; ~ADVERTISED_Autoneg) == 0)</div><div class='del'>-			modes = ecmd-&gt;advertising;</div><div class='del'>-</div><div class='del'>-		if (modes &amp; (ADVERTISED_10000baseT_Full |</div><div class='del'>-			     ADVERTISED_10000baseKX4_Full |</div><div class='del'>-			     ADVERTISED_10000baseKR_Full)) {</div><div class='del'>-			speed = SPEED_10000;</div><div class='del'>-			ecmd-&gt;duplex = DUPLEX_FULL;</div><div class='del'>-		} else if (modes &amp; (ADVERTISED_1000baseT_Full |</div><div class='del'>-				    ADVERTISED_1000baseT_Half |</div><div class='del'>-				    ADVERTISED_1000baseKX_Full)) {</div><div class='del'>-			speed = SPEED_1000;</div><div class='del'>-			ecmd-&gt;duplex = !(modes &amp; ADVERTISED_1000baseT_Half);</div><div class='del'>-		} else if (modes &amp; (ADVERTISED_100baseT_Full |</div><div class='del'>-				    ADVERTISED_100baseT_Half)) {</div><div class='del'>-			speed = SPEED_100;</div><div class='del'>-			ecmd-&gt;duplex = !!(modes &amp; ADVERTISED_100baseT_Full);</div><div class='del'>-		} else {</div><div class='del'>-			speed = SPEED_10;</div><div class='del'>-			ecmd-&gt;duplex = !!(modes &amp; ADVERTISED_10baseT_Full);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		/* Report forced settings */</div><div class='del'>-		reg = mdio-&gt;mdio_read(mdio-&gt;dev, mdio-&gt;prtad, MDIO_MMD_PMAPMD,</div><div class='del'>-				      MDIO_CTRL1);</div><div class='del'>-		speed = (((reg &amp; MDIO_PMA_CTRL1_SPEED1000) ? 100 : 1)</div><div class='del'>-			 * ((reg &amp; MDIO_PMA_CTRL1_SPEED100) ? 100 : 10));</div><div class='del'>-		ecmd-&gt;duplex = (reg &amp; MDIO_CTRL1_FULLDPLX ||</div><div class='del'>-				speed == SPEED_10000);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ethtool_cmd_speed_set(ecmd, speed);</div><div class='del'>-</div><div class='del'>-	/* 10GBASE-T MDI/MDI-X */</div><div class='del'>-	if (ecmd-&gt;port == PORT_TP</div><div class='del'>-	    &amp;&amp; (ethtool_cmd_speed(ecmd) == SPEED_10000)) {</div><div class='del'>-		switch (mdio-&gt;mdio_read(mdio-&gt;dev, mdio-&gt;prtad, MDIO_MMD_PMAPMD,</div><div class='del'>-					MDIO_PMA_10GBT_SWAPPOL)) {</div><div class='del'>-		case MDIO_PMA_10GBT_SWAPPOL_ABNX | MDIO_PMA_10GBT_SWAPPOL_CDNX:</div><div class='del'>-			ecmd-&gt;eth_tp_mdix = ETH_TP_MDI;</div><div class='del'>-			break;</div><div class='del'>-		case 0:</div><div class='del'>-			ecmd-&gt;eth_tp_mdix = ETH_TP_MDI_X;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			/* It's complicated... */</div><div class='del'>-			ecmd-&gt;eth_tp_mdix = ETH_TP_MDI_INVALID;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mdio45_ethtool_gset_npage);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * mdio45_ethtool_ksettings_get_npage - get settings for ETHTOOL_GLINKSETTINGS</div><div class='ctx'>  * @mdio: MDIO interface</div><div class='ctx'>  * @cmd: Ethtool request structure</div><div class='head'>diff --git a/drivers/net/mdio/Kconfig b/drivers/net/mdio/Kconfig<br/>index 4a7a303be2f7..44380378911b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/Kconfig</a></div><div class='hunk'>@@ -3,48 +3,31 @@</div><div class='ctx'> # MDIO Layer Configuration</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-menuconfig MDIO_DEVICE</div><div class='del'>-	tristate "MDIO bus device drivers"</div><div class='del'>-	help</div><div class='del'>-	  MDIO devices and driver infrastructure code.</div><div class='del'>-</div><div class='del'>-if MDIO_DEVICE</div><div class='del'>-</div><div class='del'>-config MDIO_BUS</div><div class='del'>-	tristate</div><div class='del'>-	default m if PHYLIB=m</div><div class='del'>-	default MDIO_DEVICE</div><div class='del'>-	help</div><div class='del'>-	  This internal symbol is used for link time dependencies and it</div><div class='del'>-	  reflects whether the mdio_bus/mdio_device code is built as a</div><div class='del'>-	  loadable module or built-in.</div><div class='add'>+if PHYLIB</div><div class='ctx'> </div><div class='ctx'> config FWNODE_MDIO</div><div class='del'>-	def_tristate PHYLIB</div><div class='del'>-	depends on (ACPI || OF) || COMPILE_TEST</div><div class='add'>+	def_tristate (ACPI || OF) || COMPILE_TEST</div><div class='ctx'> 	select FIXED_PHY</div><div class='ctx'> 	help</div><div class='ctx'> 	  FWNODE MDIO bus (Ethernet PHY) accessors</div><div class='ctx'> </div><div class='ctx'> config OF_MDIO</div><div class='del'>-	def_tristate PHYLIB</div><div class='del'>-	depends on OF</div><div class='del'>-	depends on PHYLIB</div><div class='add'>+	def_tristate OF</div><div class='ctx'> 	select FIXED_PHY</div><div class='ctx'> 	help</div><div class='ctx'> 	  OpenFirmware MDIO bus (Ethernet PHY) accessors</div><div class='ctx'> </div><div class='ctx'> config ACPI_MDIO</div><div class='del'>-	def_tristate PHYLIB</div><div class='del'>-	depends on ACPI</div><div class='del'>-	depends on PHYLIB</div><div class='add'>+	def_tristate ACPI</div><div class='ctx'> 	help</div><div class='ctx'> 	  ACPI MDIO bus (Ethernet PHY) accessors</div><div class='ctx'> </div><div class='del'>-if MDIO_BUS</div><div class='del'>-</div><div class='del'>-config MDIO_DEVRES</div><div class='del'>-	tristate</div><div class='add'>+config MDIO_AIROHA</div><div class='add'>+	tristate "Airoha AN7583 MDIO bus controller"</div><div class='add'>+	depends on ARCH_AIROHA || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  This module provides a driver for the MDIO busses found in the</div><div class='add'>+	  Airoha AN7583 SoC's.</div><div class='ctx'> </div><div class='ctx'> config MDIO_SUN4I</div><div class='ctx'> 	tristate "Allwinner sun4i MDIO interface support"</div><div class='hunk'>@@ -65,7 +48,6 @@ config MDIO_ASPEED</div><div class='ctx'> 	tristate "ASPEED MDIO bus controller"</div><div class='ctx'> 	depends on ARCH_ASPEED || COMPILE_TEST</div><div class='ctx'> 	depends on OF_MDIO &amp;&amp; HAS_IOMEM</div><div class='del'>-	depends on MDIO_DEVRES</div><div class='ctx'> 	help</div><div class='ctx'> 	  This module provides a driver for the independent MDIO bus</div><div class='ctx'> 	  controllers found in the ASPEED AST2600 SoC. This is a driver for the</div><div class='hunk'>@@ -135,7 +117,6 @@ config MDIO_I2C</div><div class='ctx'> config MDIO_MVUSB</div><div class='ctx'> 	tristate "Marvell USB to MDIO Adapter"</div><div class='ctx'> 	depends on USB</div><div class='del'>-	select MDIO_DEVRES</div><div class='ctx'> 	help</div><div class='ctx'> 	  A USB to MDIO converter present on development boards for</div><div class='ctx'> 	  Marvell's Link Street family of Ethernet switches.</div><div class='hunk'>@@ -143,7 +124,6 @@ config MDIO_MVUSB</div><div class='ctx'> config MDIO_MSCC_MIIM</div><div class='ctx'> 	tristate "Microsemi MIIM interface support"</div><div class='ctx'> 	depends on HAS_IOMEM &amp;&amp; REGMAP_MMIO</div><div class='del'>-	select MDIO_DEVRES</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the MIIM (MDIO) interface found in the network</div><div class='ctx'> 	  switches of the Microsemi SoCs; it is recommended to switch on</div><div class='hunk'>@@ -161,7 +141,6 @@ config MDIO_OCTEON</div><div class='ctx'> 	depends on (64BIT &amp;&amp; OF_MDIO) || COMPILE_TEST</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='ctx'> 	select MDIO_CAVIUM</div><div class='del'>-	select MDIO_DEVRES</div><div class='ctx'> 	help</div><div class='ctx'> 	  This module provides a driver for the Octeon and ThunderX MDIO</div><div class='ctx'> 	  buses. It is required by the Octeon and ThunderX ethernet device</div><div class='hunk'>@@ -171,7 +150,6 @@ config MDIO_IPQ4019</div><div class='ctx'> 	tristate "Qualcomm IPQ4019 MDIO interface support"</div><div class='ctx'> 	depends on HAS_IOMEM &amp;&amp; OF_MDIO</div><div class='ctx'> 	depends on COMMON_CLK</div><div class='del'>-	depends on MDIO_DEVRES</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the MDIO interface found in Qualcomm</div><div class='ctx'> 	  IPQ40xx, IPQ60xx, IPQ807x and IPQ50xx series Soc-s.</div><div class='hunk'>@@ -180,11 +158,17 @@ config MDIO_IPQ8064</div><div class='ctx'> 	tristate "Qualcomm IPQ8064 MDIO interface support"</div><div class='ctx'> 	depends on HAS_IOMEM &amp;&amp; OF_MDIO</div><div class='ctx'> 	depends on MFD_SYSCON</div><div class='del'>-	depends on MDIO_DEVRES</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the MDIO interface found in the network</div><div class='ctx'> 	  interface units of the IPQ8064 SoC</div><div class='ctx'> </div><div class='add'>+config MDIO_REALTEK_RTL9300</div><div class='add'>+	tristate "Realtek RTL9300 MDIO interface support"</div><div class='add'>+	depends on MACH_REALTEK_RTL || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the MDIO interface found in the Realtek</div><div class='add'>+	  RTL9300 family of Ethernet switches with integrated SoC.</div><div class='add'>+</div><div class='ctx'> config MDIO_REGMAP</div><div class='ctx'> 	tristate</div><div class='ctx'> 	help</div><div class='hunk'>@@ -201,7 +185,6 @@ config MDIO_THUNDER</div><div class='ctx'> 	depends on 64BIT</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	select MDIO_CAVIUM</div><div class='del'>-	select MDIO_DEVRES</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports the MDIO interfaces found on Cavium</div><div class='ctx'> 	  ThunderX SoCs when the MDIO bus device appears as a PCI</div><div class='hunk'>@@ -299,4 +282,3 @@ config MDIO_BUS_MUX_MMIOREG</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> endif</div><div class='del'>-endif</div><div class='head'>diff --git a/drivers/net/mdio/Makefile b/drivers/net/mdio/Makefile<br/>index 1015f0db4531..fbec636700e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/Makefile</a></div><div class='hunk'>@@ -5,6 +5,7 @@ obj-$(CONFIG_ACPI_MDIO)		+= acpi_mdio.o</div><div class='ctx'> obj-$(CONFIG_FWNODE_MDIO)	+= fwnode_mdio.o</div><div class='ctx'> obj-$(CONFIG_OF_MDIO)		+= of_mdio.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_MDIO_AIROHA)		+= mdio-airoha.o</div><div class='ctx'> obj-$(CONFIG_MDIO_ASPEED)		+= mdio-aspeed.o</div><div class='ctx'> obj-$(CONFIG_MDIO_BCM_IPROC)		+= mdio-bcm-iproc.o</div><div class='ctx'> obj-$(CONFIG_MDIO_BCM_UNIMAC)		+= mdio-bcm-unimac.o</div><div class='hunk'>@@ -19,6 +20,7 @@ obj-$(CONFIG_MDIO_MOXART)		+= mdio-moxart.o</div><div class='ctx'> obj-$(CONFIG_MDIO_MSCC_MIIM)		+= mdio-mscc-miim.o</div><div class='ctx'> obj-$(CONFIG_MDIO_MVUSB)		+= mdio-mvusb.o</div><div class='ctx'> obj-$(CONFIG_MDIO_OCTEON)		+= mdio-octeon.o</div><div class='add'>+obj-$(CONFIG_MDIO_REALTEK_RTL9300)	+= mdio-realtek-rtl9300.o</div><div class='ctx'> obj-$(CONFIG_MDIO_REGMAP)		+= mdio-regmap.o</div><div class='ctx'> obj-$(CONFIG_MDIO_SUN4I)		+= mdio-sun4i.o</div><div class='ctx'> obj-$(CONFIG_MDIO_THUNDER)		+= mdio-thunder.o</div><div class='head'>diff --git a/drivers/net/mdio/fwnode_mdio.c b/drivers/net/mdio/fwnode_mdio.c<br/>index b156493d7084..ba7091518265 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/fwnode_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/fwnode_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/fwnode_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/fwnode_mdio.c</a></div><div class='hunk'>@@ -18,7 +18,8 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("FWNODE MDIO bus (Ethernet PHY) accessors");</div><div class='ctx'> </div><div class='ctx'> static struct pse_control *</div><div class='del'>-fwnode_find_pse_control(struct fwnode_handle *fwnode)</div><div class='add'>+fwnode_find_pse_control(struct fwnode_handle *fwnode,</div><div class='add'>+			struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pse_control *psec;</div><div class='ctx'> 	struct device_node *np;</div><div class='hunk'>@@ -30,7 +31,7 @@ fwnode_find_pse_control(struct fwnode_handle *fwnode)</div><div class='ctx'> 	if (!np)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	psec = of_pse_control_get(np);</div><div class='add'>+	psec = of_pse_control_get(np, phydev);</div><div class='ctx'> 	if (PTR_ERR(psec) == -ENOENT)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -40,6 +41,7 @@ fwnode_find_pse_control(struct fwnode_handle *fwnode)</div><div class='ctx'> static struct mii_timestamper *</div><div class='ctx'> fwnode_find_mii_timestamper(struct fwnode_handle *fwnode)</div><div class='ctx'> {</div><div class='add'>+	struct mii_timestamper *mii_ts;</div><div class='ctx'> 	struct of_phandle_args arg;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -53,10 +55,16 @@ fwnode_find_mii_timestamper(struct fwnode_handle *fwnode)</div><div class='ctx'> 	else if (err)</div><div class='ctx'> 		return ERR_PTR(err);</div><div class='ctx'> </div><div class='del'>-	if (arg.args_count != 1)</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='add'>+	if (arg.args_count != 1) {</div><div class='add'>+		mii_ts = ERR_PTR(-EINVAL);</div><div class='add'>+		goto put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mii_ts = register_mii_timestamper(arg.np, arg.args[0]);</div><div class='ctx'> </div><div class='del'>-	return register_mii_timestamper(arg.np, arg.args[0]);</div><div class='add'>+put_node:</div><div class='add'>+	of_node_put(arg.np);</div><div class='add'>+	return mii_ts;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int fwnode_mdiobus_phy_device_register(struct mii_bus *mdio,</div><div class='hunk'>@@ -84,11 +92,6 @@ int fwnode_mdiobus_phy_device_register(struct mii_bus *mdio,</div><div class='ctx'> 	if (fwnode_property_read_bool(child, "broken-turn-around"))</div><div class='ctx'> 		mdio-&gt;phy_ignore_ta_mask |= 1 &lt;&lt; addr;</div><div class='ctx'> </div><div class='del'>-	fwnode_property_read_u32(child, "reset-assert-us",</div><div class='del'>-				 &amp;phy-&gt;mdio.reset_assert_delay);</div><div class='del'>-	fwnode_property_read_u32(child, "reset-deassert-us",</div><div class='del'>-				 &amp;phy-&gt;mdio.reset_deassert_delay);</div><div class='del'>-</div><div class='ctx'> 	/* Associate the fwnode with the device structure so it</div><div class='ctx'> 	 * can be looked up later</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -121,15 +124,9 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus,</div><div class='ctx'> 	u32 phy_id;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	psec = fwnode_find_pse_control(child);</div><div class='del'>-	if (IS_ERR(psec))</div><div class='del'>-		return PTR_ERR(psec);</div><div class='del'>-</div><div class='ctx'> 	mii_ts = fwnode_find_mii_timestamper(child);</div><div class='del'>-	if (IS_ERR(mii_ts)) {</div><div class='del'>-		rc = PTR_ERR(mii_ts);</div><div class='del'>-		goto clean_pse;</div><div class='del'>-	}</div><div class='add'>+	if (IS_ERR(mii_ts))</div><div class='add'>+		return PTR_ERR(mii_ts);</div><div class='ctx'> </div><div class='ctx'> 	is_c45 = fwnode_device_is_compatible(child, "ethernet-phy-ieee802.3-c45");</div><div class='ctx'> 	if (is_c45 || fwnode_get_phy_id(child, &amp;phy_id))</div><div class='hunk'>@@ -162,6 +159,12 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus,</div><div class='ctx'> 			goto clean_phy;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	psec = fwnode_find_pse_control(child, phy);</div><div class='add'>+	if (IS_ERR(psec)) {</div><div class='add'>+		rc = PTR_ERR(psec);</div><div class='add'>+		goto unregister_phy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	phy-&gt;psec = psec;</div><div class='ctx'> </div><div class='ctx'> 	/* phy-&gt;mii_ts may already be defined by the PHY driver. A</div><div class='hunk'>@@ -173,12 +176,13 @@ int fwnode_mdiobus_register_phy(struct mii_bus *bus,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+unregister_phy:</div><div class='add'>+	if (is_acpi_node(child) || is_of_node(child))</div><div class='add'>+		phy_device_remove(phy);</div><div class='ctx'> clean_phy:</div><div class='ctx'> 	phy_device_free(phy);</div><div class='ctx'> clean_mii_ts:</div><div class='ctx'> 	unregister_mii_timestamper(mii_ts);</div><div class='del'>-clean_pse:</div><div class='del'>-	pse_control_put(psec);</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/mdio/mdio-airoha.c b/drivers/net/mdio/mdio-airoha.c<br/>new file mode 100644<br/>index 000000000000..52e7475121ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-airoha.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/mdio-airoha.c</a></div><div class='hunk'>@@ -0,0 +1,278 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Airoha AN7583 MDIO interface driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Christian Marangi &lt;ansuelsmth@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+</div><div class='add'>+/* MII address register definitions */</div><div class='add'>+#define   AN7583_MII_BUSY			BIT(31)</div><div class='add'>+#define   AN7583_MII_RDY			BIT(30) /* RO signal BUS is ready */</div><div class='add'>+#define   AN7583_MII_CL22_REG_ADDR		GENMASK(29, 25)</div><div class='add'>+#define   AN7583_MII_CL45_DEV_ADDR		AN7583_MII_CL22_REG_ADDR</div><div class='add'>+#define   AN7583_MII_PHY_ADDR			GENMASK(24, 20)</div><div class='add'>+#define   AN7583_MII_CMD			GENMASK(19, 18)</div><div class='add'>+#define   AN7583_MII_CMD_CL22_WRITE		FIELD_PREP_CONST(AN7583_MII_CMD, 0x1)</div><div class='add'>+#define   AN7583_MII_CMD_CL22_READ		FIELD_PREP_CONST(AN7583_MII_CMD, 0x2)</div><div class='add'>+#define   AN7583_MII_CMD_CL45_ADDR		FIELD_PREP_CONST(AN7583_MII_CMD, 0x0)</div><div class='add'>+#define   AN7583_MII_CMD_CL45_WRITE		FIELD_PREP_CONST(AN7583_MII_CMD, 0x1)</div><div class='add'>+#define   AN7583_MII_CMD_CL45_POSTREAD_INCADDR	FIELD_PREP_CONST(AN7583_MII_CMD, 0x2)</div><div class='add'>+#define   AN7583_MII_CMD_CL45_READ		FIELD_PREP_CONST(AN7583_MII_CMD, 0x3)</div><div class='add'>+#define   AN7583_MII_ST				GENMASK(17, 16)</div><div class='add'>+#define   AN7583_MII_ST_CL45			FIELD_PREP_CONST(AN7583_MII_ST, 0x0)</div><div class='add'>+#define   AN7583_MII_ST_CL22			FIELD_PREP_CONST(AN7583_MII_ST, 0x1)</div><div class='add'>+#define   AN7583_MII_RWDATA			GENMASK(15, 0)</div><div class='add'>+#define   AN7583_MII_CL45_REG_ADDR		AN7583_MII_RWDATA</div><div class='add'>+</div><div class='add'>+#define AN7583_MII_MDIO_DELAY_USEC		100</div><div class='add'>+#define AN7583_MII_MDIO_RETRY_MSEC		100</div><div class='add'>+</div><div class='add'>+struct airoha_mdio_data {</div><div class='add'>+	u32 base_addr;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct reset_control *reset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_mdio_wait_busy(struct airoha_mdio_data *priv)</div><div class='add'>+{</div><div class='add'>+	u32 busy;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(priv-&gt;regmap, priv-&gt;base_addr, busy,</div><div class='add'>+					!(busy &amp; AN7583_MII_BUSY),</div><div class='add'>+					AN7583_MII_MDIO_DELAY_USEC,</div><div class='add'>+					AN7583_MII_MDIO_RETRY_MSEC * USEC_PER_MSEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_mdio_reset(struct airoha_mdio_data *priv)</div><div class='add'>+{</div><div class='add'>+	/* There seems to be Hardware bug where AN7583_MII_RWDATA</div><div class='add'>+	 * is not wiped in the context of unconnected PHY and the</div><div class='add'>+	 * previous read value is returned.</div><div class='add'>+	 *</div><div class='add'>+	 * Example: (only one PHY on the BUS at 0x1f)</div><div class='add'>+	 *  - read at 0x1f report at 0x2 0x7500</div><div class='add'>+	 *  - read at 0x0 report 0x7500 on every address</div><div class='add'>+	 *</div><div class='add'>+	 * To workaround this, we reset the Mdio BUS at every read</div><div class='add'>+	 * to have consistent values on read operation.</div><div class='add'>+	 */</div><div class='add'>+	reset_control_assert(priv-&gt;reset);</div><div class='add'>+	reset_control_deassert(priv-&gt;reset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_mdio_read(struct mii_bus *bus, int addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct airoha_mdio_data *priv = bus-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	airoha_mdio_reset(priv);</div><div class='add'>+</div><div class='add'>+	val = AN7583_MII_BUSY | AN7583_MII_ST_CL22 |</div><div class='add'>+	      AN7583_MII_CMD_CL22_READ;</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_CL22_REG_ADDR, regnum);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, priv-&gt;base_addr, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = airoha_mdio_wait_busy(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;regmap, priv-&gt;base_addr, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(AN7583_MII_RWDATA, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_mdio_write(struct mii_bus *bus, int addr, int regnum,</div><div class='add'>+			     u16 value)</div><div class='add'>+{</div><div class='add'>+	struct airoha_mdio_data *priv = bus-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	val = AN7583_MII_BUSY | AN7583_MII_ST_CL22 |</div><div class='add'>+	      AN7583_MII_CMD_CL22_WRITE;</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_CL22_REG_ADDR, regnum);</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_RWDATA, value);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, priv-&gt;base_addr, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = airoha_mdio_wait_busy(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_mdio_cl45_read(struct mii_bus *bus, int addr, int devnum,</div><div class='add'>+				 int regnum)</div><div class='add'>+{</div><div class='add'>+	struct airoha_mdio_data *priv = bus-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	airoha_mdio_reset(priv);</div><div class='add'>+</div><div class='add'>+	val = AN7583_MII_BUSY | AN7583_MII_ST_CL45 |</div><div class='add'>+	      AN7583_MII_CMD_CL45_ADDR;</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_CL45_DEV_ADDR, devnum);</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_CL45_REG_ADDR, regnum);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, priv-&gt;base_addr, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = airoha_mdio_wait_busy(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = AN7583_MII_BUSY | AN7583_MII_ST_CL45 |</div><div class='add'>+	      AN7583_MII_CMD_CL45_READ;</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_CL45_DEV_ADDR, devnum);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, priv-&gt;base_addr, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = airoha_mdio_wait_busy(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;regmap, priv-&gt;base_addr, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(AN7583_MII_RWDATA, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_mdio_cl45_write(struct mii_bus *bus, int addr, int devnum,</div><div class='add'>+				  int regnum, u16 value)</div><div class='add'>+{</div><div class='add'>+	struct airoha_mdio_data *priv = bus-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	val = AN7583_MII_BUSY | AN7583_MII_ST_CL45 |</div><div class='add'>+	      AN7583_MII_CMD_CL45_ADDR;</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_CL45_DEV_ADDR, devnum);</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_CL45_REG_ADDR, regnum);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, priv-&gt;base_addr, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = airoha_mdio_wait_busy(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = AN7583_MII_BUSY | AN7583_MII_ST_CL45 |</div><div class='add'>+	      AN7583_MII_CMD_CL45_WRITE;</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_PHY_ADDR, addr);</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_CL45_DEV_ADDR, devnum);</div><div class='add'>+	val |= FIELD_PREP(AN7583_MII_RWDATA, value);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, priv-&gt;base_addr, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = airoha_mdio_wait_busy(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_mdio_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct airoha_mdio_data *priv;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	u32 addr, freq;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(dev-&gt;of_node, "reg", &amp;addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc_size(dev, sizeof(*priv));</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv = bus-&gt;priv;</div><div class='add'>+	priv-&gt;base_addr = addr;</div><div class='add'>+	priv-&gt;regmap = device_node_to_regmap(dev-&gt;parent-&gt;of_node);</div><div class='add'>+	if (IS_ERR(priv-&gt;regmap))</div><div class='add'>+		return PTR_ERR(priv-&gt;regmap);</div><div class='add'>+</div><div class='add'>+	priv-&gt;clk = devm_clk_get_enabled(dev, NULL);</div><div class='add'>+	if (IS_ERR(priv-&gt;clk))</div><div class='add'>+		return PTR_ERR(priv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	priv-&gt;reset = devm_reset_control_get_exclusive(dev, NULL);</div><div class='add'>+	if (IS_ERR(priv-&gt;reset))</div><div class='add'>+		return PTR_ERR(priv-&gt;reset);</div><div class='add'>+</div><div class='add'>+	reset_control_deassert(priv-&gt;reset);</div><div class='add'>+</div><div class='add'>+	bus-&gt;name = "airoha_mdio_bus";</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-mii", dev_name(dev));</div><div class='add'>+	bus-&gt;parent = dev;</div><div class='add'>+	bus-&gt;read = airoha_mdio_read;</div><div class='add'>+	bus-&gt;write = airoha_mdio_write;</div><div class='add'>+	bus-&gt;read_c45 = airoha_mdio_cl45_read;</div><div class='add'>+	bus-&gt;write_c45 = airoha_mdio_cl45_write;</div><div class='add'>+</div><div class='add'>+	/* Check if a custom frequency is defined in DT or default to 2.5 MHz */</div><div class='add'>+	if (of_property_read_u32(dev-&gt;of_node, "clock-frequency", &amp;freq))</div><div class='add'>+		freq = 2500000;</div><div class='add'>+</div><div class='add'>+	ret = clk_set_rate(priv-&gt;clk, freq);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = devm_of_mdiobus_register(dev, bus, dev-&gt;of_node);</div><div class='add'>+	if (ret) {</div><div class='add'>+		reset_control_assert(priv-&gt;reset);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id airoha_mdio_dt_ids[] = {</div><div class='add'>+	{ .compatible = "airoha,an7583-mdio" },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, airoha_mdio_dt_ids);</div><div class='add'>+</div><div class='add'>+static struct platform_driver airoha_mdio_driver = {</div><div class='add'>+	.probe = airoha_mdio_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "airoha-mdio",</div><div class='add'>+		.of_match_table = airoha_mdio_dt_ids,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(airoha_mdio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Airoha AN7583 MDIO interface driver");</div><div class='add'>+MODULE_AUTHOR("Christian Marangi &lt;ansuelsmth@gmail.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/mdio/mdio-bcm-unimac.c b/drivers/net/mdio/mdio-bcm-unimac.c<br/>index 074d96328f41..37e35f282d9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-bcm-unimac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-bcm-unimac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-bcm-unimac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/mdio-bcm-unimac.c</a></div><div class='hunk'>@@ -209,14 +209,15 @@ static int unimac_mdio_clk_set(struct unimac_mdio_priv *priv)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (!priv-&gt;clk)</div><div class='add'>+	rate = clk_get_rate(priv-&gt;clk);</div><div class='add'>+	if (!rate)</div><div class='ctx'> 		rate = 250000000;</div><div class='del'>-	else</div><div class='del'>-		rate = clk_get_rate(priv-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	div = (rate / (2 * priv-&gt;clk_freq)) - 1;</div><div class='ctx'> 	if (div &amp; ~MDIO_CLK_DIV_MASK) {</div><div class='del'>-		pr_warn("Incorrect MDIO clock frequency, ignoring\n");</div><div class='add'>+		dev_warn(priv-&gt;mii_bus-&gt;parent,</div><div class='add'>+			 "Ignoring MDIO clock frequency request: %d vs. rate: %ld\n",</div><div class='add'>+			 priv-&gt;clk_freq, rate);</div><div class='ctx'> 		ret = 0;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -334,9 +335,9 @@ static SIMPLE_DEV_PM_OPS(unimac_mdio_pm_ops,</div><div class='ctx'> 			 NULL, unimac_mdio_resume);</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id unimac_mdio_ids[] = {</div><div class='add'>+	{ .compatible = "brcm,asp-v3.0-mdio", },</div><div class='ctx'> 	{ .compatible = "brcm,asp-v2.2-mdio", },</div><div class='ctx'> 	{ .compatible = "brcm,asp-v2.1-mdio", },</div><div class='del'>-	{ .compatible = "brcm,asp-v2.0-mdio", },</div><div class='ctx'> 	{ .compatible = "brcm,bcm6846-mdio", },</div><div class='ctx'> 	{ .compatible = "brcm,genet-mdio-v5", },</div><div class='ctx'> 	{ .compatible = "brcm,genet-mdio-v4", },</div><div class='head'>diff --git a/drivers/net/mdio/mdio-i2c.c b/drivers/net/mdio/mdio-i2c.c<br/>index da2001ea1f99..ed20352a589a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-i2c.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-i2c.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-i2c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/mdio-i2c.c</a></div><div class='hunk'>@@ -106,6 +106,73 @@ static int i2c_mii_write_default_c22(struct mii_bus *bus, int phy_id, int reg,</div><div class='ctx'> 	return i2c_mii_write_default_c45(bus, phy_id, -1, reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int smbus_byte_mii_read_default_c22(struct mii_bus *bus, int phy_id,</div><div class='add'>+					   int reg)</div><div class='add'>+{</div><div class='add'>+	struct i2c_adapter *i2c = bus-&gt;priv;</div><div class='add'>+	union i2c_smbus_data smbus_data;</div><div class='add'>+	int val = 0, ret;</div><div class='add'>+</div><div class='add'>+	if (!i2c_mii_valid_phy_id(phy_id))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	i2c_lock_bus(i2c, I2C_LOCK_SEGMENT);</div><div class='add'>+</div><div class='add'>+	ret = __i2c_smbus_xfer(i2c, i2c_mii_phy_addr(phy_id), 0,</div><div class='add'>+			       I2C_SMBUS_READ, reg,</div><div class='add'>+			       I2C_SMBUS_BYTE_DATA, &amp;smbus_data);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	val = (smbus_data.byte &amp; 0xff) &lt;&lt; 8;</div><div class='add'>+</div><div class='add'>+	ret = __i2c_smbus_xfer(i2c, i2c_mii_phy_addr(phy_id), 0,</div><div class='add'>+			       I2C_SMBUS_READ, reg,</div><div class='add'>+			       I2C_SMBUS_BYTE_DATA, &amp;smbus_data);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	i2c_unlock_bus(i2c, I2C_LOCK_SEGMENT);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val |= smbus_data.byte &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smbus_byte_mii_write_default_c22(struct mii_bus *bus, int phy_id,</div><div class='add'>+					    int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct i2c_adapter *i2c = bus-&gt;priv;</div><div class='add'>+	union i2c_smbus_data smbus_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!i2c_mii_valid_phy_id(phy_id))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	smbus_data.byte = (val &amp; 0xff00) &gt;&gt; 8;</div><div class='add'>+</div><div class='add'>+	i2c_lock_bus(i2c, I2C_LOCK_SEGMENT);</div><div class='add'>+</div><div class='add'>+	ret = __i2c_smbus_xfer(i2c, i2c_mii_phy_addr(phy_id), 0,</div><div class='add'>+			       I2C_SMBUS_WRITE, reg,</div><div class='add'>+			       I2C_SMBUS_BYTE_DATA, &amp;smbus_data);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	smbus_data.byte = val &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	ret = __i2c_smbus_xfer(i2c, i2c_mii_phy_addr(phy_id), 0,</div><div class='add'>+			       I2C_SMBUS_WRITE, reg,</div><div class='add'>+			       I2C_SMBUS_BYTE_DATA, &amp;smbus_data);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	i2c_unlock_bus(i2c, I2C_LOCK_SEGMENT);</div><div class='add'>+</div><div class='add'>+	return ret &lt; 0 ? ret : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* RollBall SFPs do not access internal PHY via I2C address 0x56, but</div><div class='ctx'>  * instead via address 0x51, when SFP page is set to 0x03 and password to</div><div class='ctx'>  * 0xffffffff.</div><div class='hunk'>@@ -378,13 +445,26 @@ static int i2c_mii_init_rollball(struct i2c_adapter *i2c)</div><div class='ctx'> 		return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool mdio_i2c_check_functionality(struct i2c_adapter *i2c,</div><div class='add'>+					 enum mdio_i2c_proto protocol)</div><div class='add'>+{</div><div class='add'>+	if (i2c_check_functionality(i2c, I2C_FUNC_I2C))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (i2c_check_functionality(i2c, I2C_FUNC_SMBUS_BYTE_DATA) &amp;&amp;</div><div class='add'>+	    protocol == MDIO_I2C_MARVELL_C22)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c,</div><div class='ctx'> 			       enum mdio_i2c_proto protocol)</div><div class='ctx'> {</div><div class='ctx'> 	struct mii_bus *mii;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!i2c_check_functionality(i2c, I2C_FUNC_I2C))</div><div class='add'>+	if (!mdio_i2c_check_functionality(i2c, protocol))</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='ctx'> 	mii = mdiobus_alloc();</div><div class='hunk'>@@ -395,6 +475,14 @@ struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c,</div><div class='ctx'> 	mii-&gt;parent = parent;</div><div class='ctx'> 	mii-&gt;priv = i2c;</div><div class='ctx'> </div><div class='add'>+	/* Only use SMBus if we have no other choice */</div><div class='add'>+	if (i2c_check_functionality(i2c, I2C_FUNC_SMBUS_BYTE_DATA) &amp;&amp;</div><div class='add'>+	    !i2c_check_functionality(i2c, I2C_FUNC_I2C)) {</div><div class='add'>+		mii-&gt;read = smbus_byte_mii_read_default_c22;</div><div class='add'>+		mii-&gt;write = smbus_byte_mii_write_default_c22;</div><div class='add'>+		return mii;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	switch (protocol) {</div><div class='ctx'> 	case MDIO_I2C_ROLLBALL:</div><div class='ctx'> 		ret = i2c_mii_init_rollball(i2c);</div><div class='head'>diff --git a/drivers/net/mdio/mdio-ipq4019.c b/drivers/net/mdio/mdio-ipq4019.c<br/>index dd3ed2d6430b..d9a94df482d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-ipq4019.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-ipq4019.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-ipq4019.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/mdio-ipq4019.c</a></div><div class='hunk'>@@ -352,8 +352,11 @@ static int ipq4019_mdio_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* The platform resource is provided on the chipset IPQ5018 */</div><div class='ctx'> 	/* This resource is optional */</div><div class='ctx'> 	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);</div><div class='del'>-	if (res)</div><div class='add'>+	if (res) {</div><div class='ctx'> 		priv-&gt;eth_ldo_rdy = devm_ioremap_resource(&amp;pdev-&gt;dev, res);</div><div class='add'>+		if (IS_ERR(priv-&gt;eth_ldo_rdy))</div><div class='add'>+			return PTR_ERR(priv-&gt;eth_ldo_rdy);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	bus-&gt;name = "ipq4019_mdio";</div><div class='ctx'> 	bus-&gt;read = ipq4019_mdio_read_c22;</div><div class='head'>diff --git a/drivers/net/mdio/mdio-mux-gpio.c b/drivers/net/mdio/mdio-mux-gpio.c<br/>index ef77bd1abae9..fefa40ea5227 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-mux-gpio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-mux-gpio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-mux-gpio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/mdio-mux-gpio.c</a></div><div class='hunk'>@@ -30,8 +30,7 @@ static int mdio_mux_gpio_switch_fn(int current_child, int desired_child,</div><div class='ctx'> </div><div class='ctx'> 	values[0] = desired_child;</div><div class='ctx'> </div><div class='del'>-	gpiod_set_array_value_cansleep(s-&gt;gpios-&gt;ndescs, s-&gt;gpios-&gt;desc,</div><div class='del'>-				       s-&gt;gpios-&gt;info, values);</div><div class='add'>+	gpiod_multi_set_value_cansleep(s-&gt;gpios, values);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/mdio/mdio-mux-meson-gxl.c b/drivers/net/mdio/mdio-mux-meson-gxl.c<br/>index 00c66240136b..3dd12a8c8b03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-mux-meson-gxl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-mux-meson-gxl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-mux-meson-gxl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/mdio-mux-meson-gxl.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #define  REG2_LEDACT		GENMASK(23, 22)</div><div class='ctx'> #define  REG2_LEDLINK		GENMASK(25, 24)</div><div class='ctx'> #define  REG2_DIV4SEL		BIT(27)</div><div class='add'>+#define  REG2_REVERSED		BIT(28)</div><div class='ctx'> #define  REG2_ADCBYPASS		BIT(30)</div><div class='ctx'> #define  REG2_CLKINSEL		BIT(31)</div><div class='ctx'> #define ETH_REG3		0x4</div><div class='hunk'>@@ -65,7 +66,7 @@ static void gxl_enable_internal_mdio(struct gxl_mdio_mux *priv)</div><div class='ctx'> 	 * The only constraint is that it must match the one in</div><div class='ctx'> 	 * drivers/net/phy/meson-gxl.c to properly match the PHY.</div><div class='ctx'> 	 */</div><div class='del'>-	writel(FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),</div><div class='add'>+	writel(REG2_REVERSED | FIELD_PREP(REG2_PHYID, EPHY_GXL_ID),</div><div class='ctx'> 	       priv-&gt;regs + ETH_REG2);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the internal phy */</div><div class='head'>diff --git a/drivers/net/mdio/mdio-octeon.c b/drivers/net/mdio/mdio-octeon.c<br/>index 2beb83154d39..cb53dccbde1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-octeon.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-octeon.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-octeon.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/mdio-octeon.c</a></div><div class='hunk'>@@ -17,37 +17,20 @@ static int octeon_mdiobus_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct cavium_mdiobus *bus;</div><div class='ctx'> 	struct mii_bus *mii_bus;</div><div class='del'>-	struct resource *res_mem;</div><div class='del'>-	resource_size_t mdio_phys;</div><div class='del'>-	resource_size_t regsize;</div><div class='ctx'> 	union cvmx_smix_en smi_en;</div><div class='del'>-	int err = -ENOENT;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	mii_bus = devm_mdiobus_alloc_size(&amp;pdev-&gt;dev, sizeof(*bus));</div><div class='ctx'> 	if (!mii_bus)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (res_mem == NULL) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "found no memory resource\n");</div><div class='del'>-		return -ENXIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	bus = mii_bus-&gt;priv;</div><div class='ctx'> 	bus-&gt;mii_bus = mii_bus;</div><div class='del'>-	mdio_phys = res_mem-&gt;start;</div><div class='del'>-	regsize = resource_size(res_mem);</div><div class='ctx'> </div><div class='del'>-	if (!devm_request_mem_region(&amp;pdev-&gt;dev, mdio_phys, regsize,</div><div class='del'>-				     res_mem-&gt;name)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "request_mem_region failed\n");</div><div class='del'>-		return -ENXIO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bus-&gt;register_base = devm_ioremap(&amp;pdev-&gt;dev, mdio_phys, regsize);</div><div class='del'>-	if (!bus-&gt;register_base) {</div><div class='add'>+	bus-&gt;register_base = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(bus-&gt;register_base)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "dev_ioremap failed\n");</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		return PTR_ERR(bus-&gt;register_base);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	smi_en.u64 = 0;</div><div class='head'>diff --git a/drivers/net/mdio/mdio-realtek-rtl9300.c b/drivers/net/mdio/mdio-realtek-rtl9300.c<br/>new file mode 100644<br/>index 000000000000..33694c3ff9a7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-realtek-rtl9300.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/mdio-realtek-rtl9300.c</a></div><div class='hunk'>@@ -0,0 +1,522 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * MDIO controller for RTL9300 switches with integrated SoC.</div><div class='add'>+ *</div><div class='add'>+ * The MDIO communication is abstracted by the switch. At the software level</div><div class='add'>+ * communication uses the switch port to address the PHY. We work out the</div><div class='add'>+ * mapping based on the MDIO bus described in device tree and phandles on the</div><div class='add'>+ * ethernet-ports property.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/find.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+</div><div class='add'>+#define SMI_GLB_CTRL			0xca00</div><div class='add'>+#define   GLB_CTRL_INTF_SEL(intf)	BIT(16 + (intf))</div><div class='add'>+#define SMI_PORT0_15_POLLING_SEL	0xca08</div><div class='add'>+#define SMI_ACCESS_PHY_CTRL_0		0xcb70</div><div class='add'>+#define SMI_ACCESS_PHY_CTRL_1		0xcb74</div><div class='add'>+#define   PHY_CTRL_REG_ADDR		GENMASK(24, 20)</div><div class='add'>+#define   PHY_CTRL_PARK_PAGE		GENMASK(19, 15)</div><div class='add'>+#define   PHY_CTRL_MAIN_PAGE		GENMASK(14, 3)</div><div class='add'>+#define   PHY_CTRL_WRITE		BIT(2)</div><div class='add'>+#define   PHY_CTRL_READ			0</div><div class='add'>+#define   PHY_CTRL_TYPE_C45		BIT(1)</div><div class='add'>+#define   PHY_CTRL_TYPE_C22		0</div><div class='add'>+#define   PHY_CTRL_CMD			BIT(0)</div><div class='add'>+#define   PHY_CTRL_FAIL			BIT(25)</div><div class='add'>+#define SMI_ACCESS_PHY_CTRL_2		0xcb78</div><div class='add'>+#define   PHY_CTRL_INDATA		GENMASK(31, 16)</div><div class='add'>+#define   PHY_CTRL_DATA			GENMASK(15, 0)</div><div class='add'>+#define SMI_ACCESS_PHY_CTRL_3		0xcb7c</div><div class='add'>+#define   PHY_CTRL_MMD_DEVAD		GENMASK(20, 16)</div><div class='add'>+#define   PHY_CTRL_MMD_REG		GENMASK(15, 0)</div><div class='add'>+#define SMI_PORT0_5_ADDR_CTRL		0xcb80</div><div class='add'>+</div><div class='add'>+#define MAX_PORTS       28</div><div class='add'>+#define MAX_SMI_BUSSES  4</div><div class='add'>+#define MAX_SMI_ADDR	0x1f</div><div class='add'>+</div><div class='add'>+struct rtl9300_mdio_priv {</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	struct mutex lock; /* protect HW access */</div><div class='add'>+	DECLARE_BITMAP(valid_ports, MAX_PORTS);</div><div class='add'>+	u8 smi_bus[MAX_PORTS];</div><div class='add'>+	u8 smi_addr[MAX_PORTS];</div><div class='add'>+	bool smi_bus_is_c45[MAX_SMI_BUSSES];</div><div class='add'>+	struct mii_bus *bus[MAX_SMI_BUSSES];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rtl9300_mdio_chan {</div><div class='add'>+	struct rtl9300_mdio_priv *priv;</div><div class='add'>+	u8 mdio_bus;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rtl9300_mdio_phy_to_port(struct mii_bus *bus, int phy_id)</div><div class='add'>+{</div><div class='add'>+	struct rtl9300_mdio_chan *chan = bus-&gt;priv;</div><div class='add'>+	struct rtl9300_mdio_priv *priv;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	priv = chan-&gt;priv;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(i, priv-&gt;valid_ports, MAX_PORTS)</div><div class='add'>+		if (priv-&gt;smi_bus[i] == chan-&gt;mdio_bus &amp;&amp;</div><div class='add'>+		    priv-&gt;smi_addr[i] == phy_id)</div><div class='add'>+			return i;</div><div class='add'>+</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl9300_mdio_wait_ready(struct rtl9300_mdio_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(regmap, SMI_ACCESS_PHY_CTRL_1,</div><div class='add'>+					val, !(val &amp; PHY_CTRL_CMD), 10, 1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl9300_mdio_read_c22(struct mii_bus *bus, int phy_id, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct rtl9300_mdio_chan *chan = bus-&gt;priv;</div><div class='add'>+	struct rtl9300_mdio_priv *priv;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	int port;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	priv = chan-&gt;priv;</div><div class='add'>+	regmap = priv-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	port = rtl9300_mdio_phy_to_port(bus, phy_id);</div><div class='add'>+	if (port &lt; 0)</div><div class='add'>+		return port;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	err = rtl9300_mdio_wait_ready(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, FIELD_PREP(PHY_CTRL_INDATA, port));</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PHY_CTRL_REG_ADDR, regnum) |</div><div class='add'>+	      FIELD_PREP(PHY_CTRL_PARK_PAGE, 0x1f) |</div><div class='add'>+	      FIELD_PREP(PHY_CTRL_MAIN_PAGE, 0xfff) |</div><div class='add'>+	      PHY_CTRL_READ | PHY_CTRL_TYPE_C22 | PHY_CTRL_CMD;</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_1, val);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = rtl9300_mdio_wait_ready(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(regmap, SMI_ACCESS_PHY_CTRL_2, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	return FIELD_GET(PHY_CTRL_DATA, val);</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl9300_mdio_write_c22(struct mii_bus *bus, int phy_id, int regnum, u16 value)</div><div class='add'>+{</div><div class='add'>+	struct rtl9300_mdio_chan *chan = bus-&gt;priv;</div><div class='add'>+	struct rtl9300_mdio_priv *priv;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	int port;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	priv = chan-&gt;priv;</div><div class='add'>+	regmap = priv-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	port = rtl9300_mdio_phy_to_port(bus, phy_id);</div><div class='add'>+	if (port &lt; 0)</div><div class='add'>+		return port;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	err = rtl9300_mdio_wait_ready(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_0, BIT(port));</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, FIELD_PREP(PHY_CTRL_INDATA, value));</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PHY_CTRL_REG_ADDR, regnum) |</div><div class='add'>+	      FIELD_PREP(PHY_CTRL_PARK_PAGE, 0x1f) |</div><div class='add'>+	      FIELD_PREP(PHY_CTRL_MAIN_PAGE, 0xfff) |</div><div class='add'>+	      PHY_CTRL_WRITE | PHY_CTRL_TYPE_C22 | PHY_CTRL_CMD;</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_1, val);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read_poll_timeout(regmap, SMI_ACCESS_PHY_CTRL_1,</div><div class='add'>+				       val, !(val &amp; PHY_CTRL_CMD), 10, 100);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	if (val &amp; PHY_CTRL_FAIL) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl9300_mdio_read_c45(struct mii_bus *bus, int phy_id, int dev_addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct rtl9300_mdio_chan *chan = bus-&gt;priv;</div><div class='add'>+	struct rtl9300_mdio_priv *priv;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	int port;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	priv = chan-&gt;priv;</div><div class='add'>+	regmap = priv-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	port = rtl9300_mdio_phy_to_port(bus, phy_id);</div><div class='add'>+	if (port &lt; 0)</div><div class='add'>+		return port;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	err = rtl9300_mdio_wait_ready(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PHY_CTRL_INDATA, port);</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, val);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PHY_CTRL_MMD_DEVAD, dev_addr) |</div><div class='add'>+	      FIELD_PREP(PHY_CTRL_MMD_REG, regnum);</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_3, val);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_1,</div><div class='add'>+			   PHY_CTRL_READ | PHY_CTRL_TYPE_C45 | PHY_CTRL_CMD);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = rtl9300_mdio_wait_ready(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(regmap, SMI_ACCESS_PHY_CTRL_2, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	return FIELD_GET(PHY_CTRL_DATA, val);</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl9300_mdio_write_c45(struct mii_bus *bus, int phy_id, int dev_addr,</div><div class='add'>+				  int regnum, u16 value)</div><div class='add'>+{</div><div class='add'>+	struct rtl9300_mdio_chan *chan = bus-&gt;priv;</div><div class='add'>+	struct rtl9300_mdio_priv *priv;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	int port;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	priv = chan-&gt;priv;</div><div class='add'>+	regmap = priv-&gt;regmap;</div><div class='add'>+</div><div class='add'>+	port = rtl9300_mdio_phy_to_port(bus, phy_id);</div><div class='add'>+	if (port &lt; 0)</div><div class='add'>+		return port;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	err = rtl9300_mdio_wait_ready(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_0, BIT(port));</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PHY_CTRL_INDATA, value);</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_2, val);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(PHY_CTRL_MMD_DEVAD, dev_addr) |</div><div class='add'>+	      FIELD_PREP(PHY_CTRL_MMD_REG, regnum);</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_3, val);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = regmap_write(regmap, SMI_ACCESS_PHY_CTRL_1,</div><div class='add'>+			   PHY_CTRL_TYPE_C45 | PHY_CTRL_WRITE | PHY_CTRL_CMD);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read_poll_timeout(regmap, SMI_ACCESS_PHY_CTRL_1,</div><div class='add'>+				       val, !(val &amp; PHY_CTRL_CMD), 10, 100);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_err;</div><div class='add'>+</div><div class='add'>+	if (val &amp; PHY_CTRL_FAIL) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_err:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl9300_mdiobus_init(struct rtl9300_mdio_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 glb_ctrl_mask = 0, glb_ctrl_val = 0;</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	u32 port_addr[5] = { 0 };</div><div class='add'>+	u32 poll_sel[2] = { 0 };</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	/* Associate the port with the SMI interface and PHY */</div><div class='add'>+	for_each_set_bit(i, priv-&gt;valid_ports, MAX_PORTS) {</div><div class='add'>+		int pos;</div><div class='add'>+</div><div class='add'>+		pos = (i % 6) * 5;</div><div class='add'>+		port_addr[i / 6] |= (priv-&gt;smi_addr[i] &amp; 0x1f) &lt;&lt; pos;</div><div class='add'>+</div><div class='add'>+		pos = (i % 16) * 2;</div><div class='add'>+		poll_sel[i / 16] |= (priv-&gt;smi_bus[i] &amp; 0x3) &lt;&lt; pos;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Put the interfaces into C45 mode if required */</div><div class='add'>+	glb_ctrl_mask = GENMASK(19, 16);</div><div class='add'>+	for (i = 0; i &lt; MAX_SMI_BUSSES; i++)</div><div class='add'>+		if (priv-&gt;smi_bus_is_c45[i])</div><div class='add'>+			glb_ctrl_val |= GLB_CTRL_INTF_SEL(i);</div><div class='add'>+</div><div class='add'>+	err = regmap_bulk_write(regmap, SMI_PORT0_5_ADDR_CTRL,</div><div class='add'>+				port_addr, 5);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = regmap_bulk_write(regmap, SMI_PORT0_15_POLLING_SEL,</div><div class='add'>+				poll_sel, 2);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = regmap_update_bits(regmap, SMI_GLB_CTRL,</div><div class='add'>+				 glb_ctrl_mask, glb_ctrl_val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl9300_mdiobus_probe_one(struct device *dev, struct rtl9300_mdio_priv *priv,</div><div class='add'>+				     struct fwnode_handle *node)</div><div class='add'>+{</div><div class='add'>+	struct rtl9300_mdio_chan *chan;</div><div class='add'>+	struct fwnode_handle *child;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	u32 mdio_bus;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = fwnode_property_read_u32(node, "reg", &amp;mdio_bus);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* The MDIO accesses from the kernel work with the PHY polling unit in</div><div class='add'>+	 * the switch. We need to tell the PPU to operate either in GPHY (i.e.</div><div class='add'>+	 * clause 22) or 10GPHY mode (i.e. clause 45).</div><div class='add'>+	 *</div><div class='add'>+	 * We select 10GPHY mode if there is at least one PHY that declares</div><div class='add'>+	 * compatible = "ethernet-phy-ieee802.3-c45". This does mean we can't</div><div class='add'>+	 * support both c45 and c22 on the same MDIO bus.</div><div class='add'>+	 */</div><div class='add'>+	fwnode_for_each_child_node(node, child)</div><div class='add'>+		if (fwnode_device_is_compatible(child, "ethernet-phy-ieee802.3-c45"))</div><div class='add'>+			priv-&gt;smi_bus_is_c45[mdio_bus] = true;</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc_size(dev, sizeof(*chan));</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bus-&gt;name = "Realtek Switch MDIO Bus";</div><div class='add'>+	if (priv-&gt;smi_bus_is_c45[mdio_bus]) {</div><div class='add'>+		bus-&gt;read_c45 = rtl9300_mdio_read_c45;</div><div class='add'>+		bus-&gt;write_c45 =  rtl9300_mdio_write_c45;</div><div class='add'>+	} else {</div><div class='add'>+		bus-&gt;read = rtl9300_mdio_read_c22;</div><div class='add'>+		bus-&gt;write = rtl9300_mdio_write_c22;</div><div class='add'>+	}</div><div class='add'>+	bus-&gt;parent = dev;</div><div class='add'>+	chan = bus-&gt;priv;</div><div class='add'>+	chan-&gt;mdio_bus = mdio_bus;</div><div class='add'>+	chan-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-%d", dev_name(dev), mdio_bus);</div><div class='add'>+</div><div class='add'>+	err = devm_of_mdiobus_register(dev, bus, to_of_node(node));</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(dev, err, "cannot register MDIO bus\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The mdio-controller is part of a switch block so we parse the sibling</div><div class='add'>+ * ethernet-ports node and build a mapping of the switch port to MDIO bus/addr</div><div class='add'>+ * based on the phy-handle.</div><div class='add'>+ */</div><div class='add'>+static int rtl9300_mdiobus_map_ports(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct rtl9300_mdio_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+	struct device *parent = dev-&gt;parent;</div><div class='add'>+	struct fwnode_handle *port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	struct fwnode_handle *ports __free(fwnode_handle) =</div><div class='add'>+		device_get_named_child_node(parent, "ethernet-ports");</div><div class='add'>+	if (!ports)</div><div class='add'>+		return dev_err_probe(dev, -EINVAL, "%pfwP missing ethernet-ports\n",</div><div class='add'>+				     dev_fwnode(parent));</div><div class='add'>+</div><div class='add'>+	fwnode_for_each_child_node(ports, port) {</div><div class='add'>+		struct device_node *mdio_dn;</div><div class='add'>+		u32 addr;</div><div class='add'>+		u32 bus;</div><div class='add'>+		u32 pn;</div><div class='add'>+</div><div class='add'>+		struct device_node *phy_dn __free(device_node) =</div><div class='add'>+			of_parse_phandle(to_of_node(port), "phy-handle", 0);</div><div class='add'>+		/* skip ports without phys */</div><div class='add'>+		if (!phy_dn)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mdio_dn = phy_dn-&gt;parent;</div><div class='add'>+		/* only map ports that are connected to this mdio-controller */</div><div class='add'>+		if (mdio_dn-&gt;parent != dev-&gt;of_node)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = fwnode_property_read_u32(port, "reg", &amp;pn);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (pn &gt;= MAX_PORTS)</div><div class='add'>+			return dev_err_probe(dev, -EINVAL, "illegal port number %d\n", pn);</div><div class='add'>+</div><div class='add'>+		if (test_bit(pn, priv-&gt;valid_ports))</div><div class='add'>+			return dev_err_probe(dev, -EINVAL, "duplicated port number %d\n", pn);</div><div class='add'>+</div><div class='add'>+		err = of_property_read_u32(mdio_dn, "reg", &amp;bus);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (bus &gt;= MAX_SMI_BUSSES)</div><div class='add'>+			return dev_err_probe(dev, -EINVAL, "illegal smi bus number %d\n", bus);</div><div class='add'>+</div><div class='add'>+		err = of_property_read_u32(phy_dn, "reg", &amp;addr);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		__set_bit(pn, priv-&gt;valid_ports);</div><div class='add'>+		priv-&gt;smi_bus[pn] = bus;</div><div class='add'>+		priv-&gt;smi_addr[pn] = addr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl9300_mdiobus_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct rtl9300_mdio_priv *priv;</div><div class='add'>+	struct fwnode_handle *child;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = devm_mutex_init(dev, &amp;priv-&gt;lock);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;regmap = syscon_node_to_regmap(dev-&gt;parent-&gt;of_node);</div><div class='add'>+	if (IS_ERR(priv-&gt;regmap))</div><div class='add'>+		return PTR_ERR(priv-&gt;regmap);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, priv);</div><div class='add'>+</div><div class='add'>+	err = rtl9300_mdiobus_map_ports(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	device_for_each_child_node(dev, child) {</div><div class='add'>+		err = rtl9300_mdiobus_probe_one(dev, priv, child);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = rtl9300_mdiobus_init(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(dev, err, "failed to initialise MDIO bus controller\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id rtl9300_mdio_ids[] = {</div><div class='add'>+	{ .compatible = "realtek,rtl9301-mdio" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, rtl9300_mdio_ids);</div><div class='add'>+</div><div class='add'>+static struct platform_driver rtl9300_mdio_driver = {</div><div class='add'>+	.probe = rtl9300_mdiobus_probe,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "mdio-rtl9300",</div><div class='add'>+		.of_match_table = rtl9300_mdio_ids,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(rtl9300_mdio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("RTL9300 MDIO driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/mdio/mdio-thunder.c b/drivers/net/mdio/mdio-thunder.c<br/>index 1e1aa72b1eff..a3047f7258a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-thunder.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/mdio-thunder.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/mdio-thunder.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/mdio-thunder.c</a></div><div class='hunk'>@@ -40,16 +40,16 @@ static int thunder_mdiobus_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = pci_request_regions(pdev, KBUILD_MODNAME);</div><div class='add'>+	err = pcim_request_all_regions(pdev, KBUILD_MODNAME);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "pci_request_regions failed\n");</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "pcim_request_all_regions failed\n");</div><div class='ctx'> 		goto err_disable_device;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	nexus-&gt;bar0 = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));</div><div class='ctx'> 	if (!nexus-&gt;bar0) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='del'>-		goto err_release_regions;</div><div class='add'>+		goto err_disable_device;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	i = 0;</div><div class='hunk'>@@ -107,9 +107,6 @@ static int thunder_mdiobus_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_release_regions:</div><div class='del'>-	pci_release_regions(pdev);</div><div class='del'>-</div><div class='ctx'> err_disable_device:</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -129,7 +126,6 @@ static void thunder_mdiobus_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> 		mdiobus_unregister(bus-&gt;mii_bus);</div><div class='ctx'> 		oct_mdio_writeq(0, bus-&gt;register_base + SMI_EN);</div><div class='ctx'> 	}</div><div class='del'>-	pci_release_regions(pdev);</div><div class='ctx'> 	pci_set_drvdata(pdev, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/mdio/of_mdio.c b/drivers/net/mdio/of_mdio.c<br/>index 2f4fc664d2e1..b8d298c04d3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/of_mdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mdio/of_mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mdio/of_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mdio/of_mdio.c</a></div><div class='hunk'>@@ -63,14 +63,11 @@ static int of_mdiobus_register_device(struct mii_bus *mdio,</div><div class='ctx'> 	/* Associate the OF node with the device structure so it</div><div class='ctx'> 	 * can be looked up later.</div><div class='ctx'> 	 */</div><div class='del'>-	fwnode_handle_get(fwnode);</div><div class='del'>-	device_set_node(&amp;mdiodev-&gt;dev, fwnode);</div><div class='add'>+	device_set_node(&amp;mdiodev-&gt;dev, fwnode_handle_get(fwnode));</div><div class='ctx'> </div><div class='ctx'> 	/* All data is now stored in the mdiodev struct; register it. */</div><div class='ctx'> 	rc = mdio_device_register(mdiodev);</div><div class='ctx'> 	if (rc) {</div><div class='del'>-		device_set_node(&amp;mdiodev-&gt;dev, NULL);</div><div class='del'>-		fwnode_handle_put(fwnode);</div><div class='ctx'> 		mdio_device_free(mdiodev);</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -447,6 +444,8 @@ int of_phy_register_fixed_link(struct device_node *np)</div><div class='ctx'> 	/* Old binding */</div><div class='ctx'> 	if (of_property_read_u32_array(np, "fixed-link", fixed_link_prop,</div><div class='ctx'> 				       ARRAY_SIZE(fixed_link_prop)) == 0) {</div><div class='add'>+		pr_warn_once("%pOF uses deprecated array-style fixed-link binding!\n",</div><div class='add'>+			     np);</div><div class='ctx'> 		status.link = 1;</div><div class='ctx'> 		status.duplex = fixed_link_prop[1];</div><div class='ctx'> 		status.speed  = fixed_link_prop[2];</div><div class='hunk'>@@ -458,7 +457,7 @@ int of_phy_register_fixed_link(struct device_node *np)</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> register_phy:</div><div class='del'>-	return PTR_ERR_OR_ZERO(fixed_phy_register(PHY_POLL, &amp;status, np));</div><div class='add'>+	return PTR_ERR_OR_ZERO(fixed_phy_register(&amp;status, np));</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(of_phy_register_fixed_link);</div><div class='ctx'> </div><div class='hunk'>@@ -473,6 +472,5 @@ void of_phy_deregister_fixed_link(struct device_node *np)</div><div class='ctx'> 	fixed_phy_unregister(phydev);</div><div class='ctx'> </div><div class='ctx'> 	put_device(&amp;phydev-&gt;mdio.dev);	/* of_phy_find_device() */</div><div class='del'>-	phy_device_free(phydev);	/* fixed_phy_register() */</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(of_phy_deregister_fixed_link);</div><div class='head'>diff --git a/drivers/net/mii.c b/drivers/net/mii.c<br/>index 22680f47385d..37bc3131d31a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/mii.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/mii.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/mii.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/mii.c</a></div><div class='hunk'>@@ -213,6 +213,9 @@ void mii_ethtool_get_link_ksettings(struct mii_if_info *mii,</div><div class='ctx'> 		lp_advertising = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!(bmsr &amp; BMSR_LSTATUS))</div><div class='add'>+		cmd-&gt;base.speed = SPEED_UNKNOWN;</div><div class='add'>+</div><div class='ctx'> 	mii-&gt;full_duplex = cmd-&gt;base.duplex;</div><div class='ctx'> </div><div class='ctx'> 	ethtool_convert_legacy_u32_to_link_mode(cmd-&gt;link_modes.supported,</div><div class='head'>diff --git a/drivers/net/net_failover.c b/drivers/net/net_failover.c<br/>index 54c8b9d5b5fc..5b50d9186f12 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/net_failover.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/net_failover.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/net_failover.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/net_failover.c</a></div><div class='hunk'>@@ -734,7 +734,7 @@ struct failover *net_failover_create(struct net_device *standby_dev)</div><div class='ctx'> 	failover_dev-&gt;lltx = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Don't allow failover devices to change network namespaces. */</div><div class='del'>-	failover_dev-&gt;netns_local = true;</div><div class='add'>+	failover_dev-&gt;netns_immutable = true;</div><div class='ctx'> </div><div class='ctx'> 	failover_dev-&gt;hw_features = FAILOVER_VLAN_FEATURES |</div><div class='ctx'> 				    NETIF_F_HW_VLAN_CTAG_TX |</div><div class='head'>diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c<br/>index 4ea44a2f48f7..9cb4dfc242f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netconsole.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netconsole.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netconsole.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netconsole.c</a></div><div class='hunk'>@@ -36,6 +36,7 @@</div><div class='ctx'> #include &lt;linux/inet.h&gt;</div><div class='ctx'> #include &lt;linux/configfs.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/u64_stats_sync.h&gt;</div><div class='ctx'> #include &lt;linux/utsname.h&gt;</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -44,12 +45,12 @@ MODULE_DESCRIPTION("Console driver for network interfaces");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> #define MAX_PARAM_LENGTH		256</div><div class='del'>-#define MAX_USERDATA_ENTRY_LENGTH	256</div><div class='del'>-#define MAX_USERDATA_VALUE_LENGTH	200</div><div class='add'>+#define MAX_EXTRADATA_ENTRY_LEN		256</div><div class='add'>+#define MAX_EXTRADATA_VALUE_LEN	200</div><div class='ctx'> /* The number 3 comes from userdata entry format characters (' ', '=', '\n') */</div><div class='del'>-#define MAX_USERDATA_NAME_LENGTH	(MAX_USERDATA_ENTRY_LENGTH - \</div><div class='del'>-					MAX_USERDATA_VALUE_LENGTH - 3)</div><div class='del'>-#define MAX_USERDATA_ITEMS		16</div><div class='add'>+#define MAX_EXTRADATA_NAME_LEN		(MAX_EXTRADATA_ENTRY_LEN - \</div><div class='add'>+					MAX_EXTRADATA_VALUE_LEN - 3)</div><div class='add'>+#define MAX_USERDATA_ITEMS		256</div><div class='ctx'> #define MAX_PRINT_CHUNK			1000</div><div class='ctx'> </div><div class='ctx'> static char config[MAX_PARAM_LENGTH];</div><div class='hunk'>@@ -85,18 +86,50 @@ static DEFINE_SPINLOCK(target_list_lock);</div><div class='ctx'> static DEFINE_MUTEX(target_cleanup_list_lock);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Console driver for extended netconsoles.  Registered on the first use to</div><div class='del'>- * avoid unnecessarily enabling ext message formatting.</div><div class='add'>+ * Console driver for netconsoles.  Register only consoles that have</div><div class='add'>+ * an associated target of the same type.</div><div class='ctx'>  */</div><div class='del'>-static struct console netconsole_ext;</div><div class='add'>+static struct console netconsole_ext, netconsole;</div><div class='add'>+</div><div class='add'>+struct netconsole_target_stats  {</div><div class='add'>+	u64_stats_t xmit_drop_count;</div><div class='add'>+	u64_stats_t enomem_count;</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum console_type {</div><div class='add'>+	CONS_BASIC = BIT(0),</div><div class='add'>+	CONS_EXTENDED = BIT(1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Features enabled in sysdata. Contrary to userdata, this data is populated by</div><div class='add'>+ * the kernel. The fields are designed as bitwise flags, allowing multiple</div><div class='add'>+ * features to be set in sysdata_fields.</div><div class='add'>+ */</div><div class='add'>+enum sysdata_feature {</div><div class='add'>+	/* Populate the CPU that sends the message */</div><div class='add'>+	SYSDATA_CPU_NR = BIT(0),</div><div class='add'>+	/* Populate the task name (as in current-&gt;comm) in sysdata */</div><div class='add'>+	SYSDATA_TASKNAME = BIT(1),</div><div class='add'>+	/* Kernel release/version as part of sysdata */</div><div class='add'>+	SYSDATA_RELEASE = BIT(2),</div><div class='add'>+	/* Include a per-target message ID as part of sysdata */</div><div class='add'>+	SYSDATA_MSGID = BIT(3),</div><div class='add'>+	/* Sentinel: highest bit position */</div><div class='add'>+	MAX_SYSDATA_ITEMS = 4,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct netconsole_target - Represents a configured netconsole target.</div><div class='ctx'>  * @list:	Links this target into the target_list.</div><div class='ctx'>  * @group:	Links us into the configfs subsystem hierarchy.</div><div class='ctx'>  * @userdata_group:	Links to the userdata configfs hierarchy</div><div class='del'>- * @userdata_complete:	Cached, formatted string of append</div><div class='del'>- * @userdata_length:	String length of userdata_complete</div><div class='add'>+ * @userdata:		Cached, formatted string of append</div><div class='add'>+ * @userdata_length:	String length of userdata.</div><div class='add'>+ * @sysdata:		Cached, formatted string of append</div><div class='add'>+ * @sysdata_fields:	Sysdata features enabled.</div><div class='add'>+ * @msgcounter:	Message sent counter.</div><div class='add'>+ * @stats:	Packet send stats for the target. Used for debugging.</div><div class='ctx'>  * @enabled:	On / off knob to enable / disable target.</div><div class='ctx'>  *		Visible from userspace (read-write).</div><div class='ctx'>  *		We maintain a strict 1:1 correspondence between this and</div><div class='hunk'>@@ -115,19 +148,29 @@ static struct console netconsole_ext;</div><div class='ctx'>  *		remote_ip	(read-write)</div><div class='ctx'>  *		local_mac	(read-only)</div><div class='ctx'>  *		remote_mac	(read-write)</div><div class='add'>+ * @buf:	The buffer used to send the full msg to the network stack</div><div class='ctx'>  */</div><div class='ctx'> struct netconsole_target {</div><div class='ctx'> 	struct list_head	list;</div><div class='ctx'> #ifdef	CONFIG_NETCONSOLE_DYNAMIC</div><div class='ctx'> 	struct config_group	group;</div><div class='ctx'> 	struct config_group	userdata_group;</div><div class='del'>-	char userdata_complete[MAX_USERDATA_ENTRY_LENGTH * MAX_USERDATA_ITEMS];</div><div class='add'>+	char			*userdata;</div><div class='ctx'> 	size_t			userdata_length;</div><div class='add'>+	char			sysdata[MAX_EXTRADATA_ENTRY_LEN * MAX_SYSDATA_ITEMS];</div><div class='add'>+</div><div class='add'>+	/* bit-wise with sysdata_feature bits */</div><div class='add'>+	u32			sysdata_fields;</div><div class='add'>+	/* protected by target_list_lock */</div><div class='add'>+	u32			msgcounter;</div><div class='ctx'> #endif</div><div class='add'>+	struct netconsole_target_stats stats;</div><div class='ctx'> 	bool			enabled;</div><div class='ctx'> 	bool			extended;</div><div class='ctx'> 	bool			release;</div><div class='ctx'> 	struct netpoll		np;</div><div class='add'>+	/* protected by target_list_lock */</div><div class='add'>+	char			buf[MAX_PRINT_CHUNK];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef	CONFIG_NETCONSOLE_DYNAMIC</div><div class='hunk'>@@ -245,6 +288,50 @@ static void netconsole_process_cleanups_core(void)</div><div class='ctx'> 	mutex_unlock(&amp;target_cleanup_list_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void netconsole_print_banner(struct netpoll *np)</div><div class='add'>+{</div><div class='add'>+	np_info(np, "local port %d\n", np-&gt;local_port);</div><div class='add'>+	if (np-&gt;ipv6)</div><div class='add'>+		np_info(np, "local IPv6 address %pI6c\n", &amp;np-&gt;local_ip.in6);</div><div class='add'>+	else</div><div class='add'>+		np_info(np, "local IPv4 address %pI4\n", &amp;np-&gt;local_ip.ip);</div><div class='add'>+	np_info(np, "interface name '%s'\n", np-&gt;dev_name);</div><div class='add'>+	np_info(np, "local ethernet address '%pM'\n", np-&gt;dev_mac);</div><div class='add'>+	np_info(np, "remote port %d\n", np-&gt;remote_port);</div><div class='add'>+	if (np-&gt;ipv6)</div><div class='add'>+		np_info(np, "remote IPv6 address %pI6c\n", &amp;np-&gt;remote_ip.in6);</div><div class='add'>+	else</div><div class='add'>+		np_info(np, "remote IPv4 address %pI4\n", &amp;np-&gt;remote_ip.ip);</div><div class='add'>+	np_info(np, "remote ethernet address %pM\n", np-&gt;remote_mac);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Parse the string and populate the `inet_addr` union. Return 0 if IPv4 is</div><div class='add'>+ * populated, 1 if IPv6 is populated, and -1 upon failure.</div><div class='add'>+ */</div><div class='add'>+static int netpoll_parse_ip_addr(const char *str, union inet_addr *addr)</div><div class='add'>+{</div><div class='add'>+	const char *end = NULL;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	len = strlen(str);</div><div class='add'>+	if (!len)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (str[len - 1] == '\n')</div><div class='add'>+		len -= 1;</div><div class='add'>+</div><div class='add'>+	if (in4_pton(str, len, (void *)addr, -1, &amp;end) &gt; 0 &amp;&amp;</div><div class='add'>+	    (!end || *end == 0 || *end == '\n'))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_IPV6) &amp;&amp;</div><div class='add'>+	    in6_pton(str, len, (void *)addr, -1, &amp;end) &gt; 0 &amp;&amp;</div><div class='add'>+	    (!end || *end == 0 || *end == '\n'))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #ifdef	CONFIG_NETCONSOLE_DYNAMIC</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -262,6 +349,7 @@ static void netconsole_process_cleanups_core(void)</div><div class='ctx'>  *				|	remote_ip</div><div class='ctx'>  *				|	local_mac</div><div class='ctx'>  *				|	remote_mac</div><div class='add'>+ *				|	transmit_errors</div><div class='ctx'>  *				|	userdata/</div><div class='ctx'>  *				|		&lt;key&gt;/</div><div class='ctx'>  *				|			value</div><div class='hunk'>@@ -371,6 +459,101 @@ static ssize_t remote_mac_show(struct config_item *item, char *buf)</div><div class='ctx'> 	return sysfs_emit(buf, "%pM\n", to_target(item)-&gt;np.remote_mac);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static ssize_t transmit_errors_show(struct config_item *item, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct netconsole_target *nt = to_target(item);</div><div class='add'>+	u64 xmit_drop_count, enomem_count;</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;nt-&gt;stats.syncp);</div><div class='add'>+		xmit_drop_count = u64_stats_read(&amp;nt-&gt;stats.xmit_drop_count);</div><div class='add'>+		enomem_count = u64_stats_read(&amp;nt-&gt;stats.enomem_count);</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;nt-&gt;stats.syncp, start));</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%llu\n", xmit_drop_count + enomem_count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* configfs helper to display if cpu_nr sysdata feature is enabled */</div><div class='add'>+static ssize_t sysdata_cpu_nr_enabled_show(struct config_item *item, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct netconsole_target *nt = to_target(item-&gt;ci_parent);</div><div class='add'>+	bool cpu_nr_enabled;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	cpu_nr_enabled = !!(nt-&gt;sysdata_fields &amp; SYSDATA_CPU_NR);</div><div class='add'>+	mutex_unlock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%d\n", cpu_nr_enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* configfs helper to display if taskname sysdata feature is enabled */</div><div class='add'>+static ssize_t sysdata_taskname_enabled_show(struct config_item *item,</div><div class='add'>+					     char *buf)</div><div class='add'>+{</div><div class='add'>+	struct netconsole_target *nt = to_target(item-&gt;ci_parent);</div><div class='add'>+	bool taskname_enabled;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	taskname_enabled = !!(nt-&gt;sysdata_fields &amp; SYSDATA_TASKNAME);</div><div class='add'>+	mutex_unlock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%d\n", taskname_enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sysdata_release_enabled_show(struct config_item *item,</div><div class='add'>+					    char *buf)</div><div class='add'>+{</div><div class='add'>+	struct netconsole_target *nt = to_target(item-&gt;ci_parent);</div><div class='add'>+	bool release_enabled;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	release_enabled = !!(nt-&gt;sysdata_fields &amp; SYSDATA_TASKNAME);</div><div class='add'>+	mutex_unlock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%d\n", release_enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Iterate in the list of target, and make sure we don't have any console</div><div class='add'>+ * register without targets of the same type</div><div class='add'>+ */</div><div class='add'>+static void unregister_netcons_consoles(void)</div><div class='add'>+{</div><div class='add'>+	struct netconsole_target *nt;</div><div class='add'>+	u32 console_type_needed = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;target_list_lock, flags);</div><div class='add'>+	list_for_each_entry(nt, &amp;target_list, list) {</div><div class='add'>+		if (nt-&gt;extended)</div><div class='add'>+			console_type_needed |= CONS_EXTENDED;</div><div class='add'>+		else</div><div class='add'>+			console_type_needed |= CONS_BASIC;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;target_list_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (!(console_type_needed &amp; CONS_EXTENDED) &amp;&amp;</div><div class='add'>+	    console_is_registered(&amp;netconsole_ext))</div><div class='add'>+		unregister_console(&amp;netconsole_ext);</div><div class='add'>+</div><div class='add'>+	if (!(console_type_needed &amp; CONS_BASIC) &amp;&amp;</div><div class='add'>+	    console_is_registered(&amp;netconsole))</div><div class='add'>+		unregister_console(&amp;netconsole);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sysdata_msgid_enabled_show(struct config_item *item,</div><div class='add'>+					  char *buf)</div><div class='add'>+{</div><div class='add'>+	struct netconsole_target *nt = to_target(item-&gt;ci_parent);</div><div class='add'>+	bool msgid_enabled;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	msgid_enabled = !!(nt-&gt;sysdata_fields &amp; SYSDATA_MSGID);</div><div class='add'>+	mutex_unlock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%d\n", msgid_enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * This one is special -- targets created through the configfs interface</div><div class='ctx'>  * are not enabled (and the corresponding netpoll activated) by default.</div><div class='hunk'>@@ -404,14 +587,24 @@ static ssize_t enabled_store(struct config_item *item,</div><div class='ctx'> 			goto out_unlock;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (nt-&gt;extended &amp;&amp; !console_is_registered(&amp;netconsole_ext))</div><div class='add'>+		if (nt-&gt;extended &amp;&amp; !console_is_registered(&amp;netconsole_ext)) {</div><div class='add'>+			netconsole_ext.flags |= CON_ENABLED;</div><div class='ctx'> 			register_console(&amp;netconsole_ext);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* User might be enabling the basic format target for the very</div><div class='add'>+		 * first time, make sure the console is registered.</div><div class='add'>+		 */</div><div class='add'>+		if (!nt-&gt;extended &amp;&amp; !console_is_registered(&amp;netconsole)) {</div><div class='add'>+			netconsole.flags |= CON_ENABLED;</div><div class='add'>+			register_console(&amp;netconsole);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * Skip netpoll_parse_options() -- all the attributes are</div><div class='add'>+		 * Skip netconsole_parser_cmdline() -- all the attributes are</div><div class='ctx'> 		 * already configured via configfs. Just print them out.</div><div class='ctx'> 		 */</div><div class='del'>-		netpoll_print_options(&amp;nt-&gt;np);</div><div class='add'>+		netconsole_print_banner(&amp;nt-&gt;np);</div><div class='ctx'> </div><div class='ctx'> 		ret = netpoll_setup(&amp;nt-&gt;np);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -433,6 +626,10 @@ static ssize_t enabled_store(struct config_item *item,</div><div class='ctx'> 		list_move(&amp;nt-&gt;list, &amp;target_cleanup_list);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;target_list_lock, flags);</div><div class='ctx'> 		mutex_unlock(&amp;target_cleanup_list_lock);</div><div class='add'>+		/* Unregister consoles, whose the last target of that type got</div><div class='add'>+		 * disabled.</div><div class='add'>+		 */</div><div class='add'>+		unregister_netcons_consoles();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = strnlen(buf, count);</div><div class='hunk'>@@ -565,6 +762,7 @@ static ssize_t local_ip_store(struct config_item *item, const char *buf,</div><div class='ctx'> {</div><div class='ctx'> 	struct netconsole_target *nt = to_target(item);</div><div class='ctx'> 	ssize_t ret = -EINVAL;</div><div class='add'>+	int ipv6;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='ctx'> 	if (nt-&gt;enabled) {</div><div class='hunk'>@@ -573,23 +771,10 @@ static ssize_t local_ip_store(struct config_item *item, const char *buf,</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (strnchr(buf, count, ':')) {</div><div class='del'>-		const char *end;</div><div class='del'>-</div><div class='del'>-		if (in6_pton(buf, count, nt-&gt;np.local_ip.in6.s6_addr, -1, &amp;end) &gt; 0) {</div><div class='del'>-			if (*end &amp;&amp; *end != '\n') {</div><div class='del'>-				pr_err("invalid IPv6 address at: &lt;%c&gt;\n", *end);</div><div class='del'>-				goto out_unlock;</div><div class='del'>-			}</div><div class='del'>-			nt-&gt;np.ipv6 = true;</div><div class='del'>-		} else</div><div class='del'>-			goto out_unlock;</div><div class='del'>-	} else {</div><div class='del'>-		if (!nt-&gt;np.ipv6)</div><div class='del'>-			nt-&gt;np.local_ip.ip = in_aton(buf);</div><div class='del'>-		else</div><div class='del'>-			goto out_unlock;</div><div class='del'>-	}</div><div class='add'>+	ipv6 = netpoll_parse_ip_addr(buf, &amp;nt-&gt;np.local_ip);</div><div class='add'>+	if (ipv6 == -1)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	nt-&gt;np.ipv6 = !!ipv6;</div><div class='ctx'> </div><div class='ctx'> 	ret = strnlen(buf, count);</div><div class='ctx'> out_unlock:</div><div class='hunk'>@@ -602,6 +787,7 @@ static ssize_t remote_ip_store(struct config_item *item, const char *buf,</div><div class='ctx'> {</div><div class='ctx'> 	struct netconsole_target *nt = to_target(item);</div><div class='ctx'> 	ssize_t ret = -EINVAL;</div><div class='add'>+	int ipv6;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='ctx'> 	if (nt-&gt;enabled) {</div><div class='hunk'>@@ -610,23 +796,10 @@ static ssize_t remote_ip_store(struct config_item *item, const char *buf,</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (strnchr(buf, count, ':')) {</div><div class='del'>-		const char *end;</div><div class='del'>-</div><div class='del'>-		if (in6_pton(buf, count, nt-&gt;np.remote_ip.in6.s6_addr, -1, &amp;end) &gt; 0) {</div><div class='del'>-			if (*end &amp;&amp; *end != '\n') {</div><div class='del'>-				pr_err("invalid IPv6 address at: &lt;%c&gt;\n", *end);</div><div class='del'>-				goto out_unlock;</div><div class='del'>-			}</div><div class='del'>-			nt-&gt;np.ipv6 = true;</div><div class='del'>-		} else</div><div class='del'>-			goto out_unlock;</div><div class='del'>-	} else {</div><div class='del'>-		if (!nt-&gt;np.ipv6)</div><div class='del'>-			nt-&gt;np.remote_ip.ip = in_aton(buf);</div><div class='del'>-		else</div><div class='del'>-			goto out_unlock;</div><div class='del'>-	}</div><div class='add'>+	ipv6 = netpoll_parse_ip_addr(buf, &amp;nt-&gt;np.remote_ip);</div><div class='add'>+	if (ipv6 == -1)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	nt-&gt;np.ipv6 = !!ipv6;</div><div class='ctx'> </div><div class='ctx'> 	ret = strnlen(buf, count);</div><div class='ctx'> out_unlock:</div><div class='hunk'>@@ -634,6 +807,16 @@ out_unlock:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Count number of entries we have in userdata.</div><div class='add'>+ * This is important because userdata only supports MAX_USERDATA_ITEMS</div><div class='add'>+ * entries. Before enabling any new userdata feature, number of entries needs</div><div class='add'>+ * to checked for available space.</div><div class='add'>+ */</div><div class='add'>+static size_t count_userdata_entries(struct netconsole_target *nt)</div><div class='add'>+{</div><div class='add'>+	return list_count_nodes(&amp;nt-&gt;userdata_group.cg_children);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static ssize_t remote_mac_store(struct config_item *item, const char *buf,</div><div class='ctx'> 		size_t count)</div><div class='ctx'> {</div><div class='hunk'>@@ -650,7 +833,7 @@ static ssize_t remote_mac_store(struct config_item *item, const char *buf,</div><div class='ctx'> </div><div class='ctx'> 	if (!mac_pton(buf, remote_mac))</div><div class='ctx'> 		goto out_unlock;</div><div class='del'>-	if (buf[3 * ETH_ALEN - 1] &amp;&amp; buf[3 * ETH_ALEN - 1] != '\n')</div><div class='add'>+	if (buf[MAC_ADDR_STR_LEN] &amp;&amp; buf[MAC_ADDR_STR_LEN] != '\n')</div><div class='ctx'> 		goto out_unlock;</div><div class='ctx'> 	memcpy(nt-&gt;np.remote_mac, remote_mac, ETH_ALEN);</div><div class='ctx'> </div><div class='hunk'>@@ -662,7 +845,7 @@ out_unlock:</div><div class='ctx'> </div><div class='ctx'> struct userdatum {</div><div class='ctx'> 	struct config_item item;</div><div class='del'>-	char value[MAX_USERDATA_VALUE_LENGTH];</div><div class='add'>+	char value[MAX_EXTRADATA_VALUE_LEN];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct userdatum *to_userdatum(struct config_item *item)</div><div class='hunk'>@@ -692,40 +875,77 @@ static ssize_t userdatum_value_show(struct config_item *item, char *buf)</div><div class='ctx'> 	return sysfs_emit(buf, "%s\n", &amp;(to_userdatum(item)-&gt;value[0]));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void update_userdata(struct netconsole_target *nt)</div><div class='add'>+/* Navigate configfs and calculate the lentgh of the formatted string</div><div class='add'>+ * representing userdata.</div><div class='add'>+ * Must be called holding netconsole_subsys.su_mutex</div><div class='add'>+ */</div><div class='add'>+static int calc_userdata_len(struct netconsole_target *nt)</div><div class='ctx'> {</div><div class='del'>-	int complete_idx = 0, child_count = 0;</div><div class='add'>+	struct userdatum *udm_item;</div><div class='add'>+	struct config_item *item;</div><div class='ctx'> 	struct list_head *entry;</div><div class='del'>-</div><div class='del'>-	/* Clear the current string in case the last userdatum was deleted */</div><div class='del'>-	nt-&gt;userdata_length = 0;</div><div class='del'>-	nt-&gt;userdata_complete[0] = 0;</div><div class='add'>+	int len = 0;</div><div class='ctx'> </div><div class='ctx'> 	list_for_each(entry, &amp;nt-&gt;userdata_group.cg_children) {</div><div class='del'>-		struct userdatum *udm_item;</div><div class='del'>-		struct config_item *item;</div><div class='add'>+		item = container_of(entry, struct config_item, ci_entry);</div><div class='add'>+		udm_item = to_userdatum(item);</div><div class='add'>+		/* Skip userdata with no value set */</div><div class='add'>+		if (udm_item-&gt;value[0]) {</div><div class='add'>+			len += snprintf(NULL, 0, " %s=%s\n", item-&gt;ci_name,</div><div class='add'>+					udm_item-&gt;value);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (child_count &gt;= MAX_USERDATA_ITEMS)</div><div class='del'>-			break;</div><div class='del'>-		child_count++;</div><div class='add'>+static int update_userdata(struct netconsole_target *nt)</div><div class='add'>+{</div><div class='add'>+	struct userdatum *udm_item;</div><div class='add'>+	struct config_item *item;</div><div class='add'>+	struct list_head *entry;</div><div class='add'>+	char *old_buf = NULL;</div><div class='add'>+	char *new_buf = NULL;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int offset = 0;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	/* Calculate required buffer size */</div><div class='add'>+	len = calc_userdata_len(nt);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(len &gt; MAX_EXTRADATA_ENTRY_LEN * MAX_USERDATA_ITEMS))</div><div class='add'>+		return -ENOSPC;</div><div class='ctx'> </div><div class='add'>+	/* Allocate new buffer */</div><div class='add'>+	if (len) {</div><div class='add'>+		new_buf = kmalloc(len + 1, GFP_KERNEL);</div><div class='add'>+		if (!new_buf)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write userdata to new buffer */</div><div class='add'>+	list_for_each(entry, &amp;nt-&gt;userdata_group.cg_children) {</div><div class='ctx'> 		item = container_of(entry, struct config_item, ci_entry);</div><div class='ctx'> 		udm_item = to_userdatum(item);</div><div class='del'>-</div><div class='ctx'> 		/* Skip userdata with no value set */</div><div class='del'>-		if (strnlen(udm_item-&gt;value, MAX_USERDATA_VALUE_LENGTH) == 0)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* This doesn't overflow userdata_complete since it will write</div><div class='del'>-		 * one entry length (1/MAX_USERDATA_ITEMS long), entry count is</div><div class='del'>-		 * checked to not exceed MAX items with child_count above</div><div class='del'>-		 */</div><div class='del'>-		complete_idx += scnprintf(&amp;nt-&gt;userdata_complete[complete_idx],</div><div class='del'>-					  MAX_USERDATA_ENTRY_LENGTH, " %s=%s\n",</div><div class='del'>-					  item-&gt;ci_name, udm_item-&gt;value);</div><div class='add'>+		if (udm_item-&gt;value[0]) {</div><div class='add'>+			offset += scnprintf(&amp;new_buf[offset], len + 1 - offset,</div><div class='add'>+					    " %s=%s\n", item-&gt;ci_name,</div><div class='add'>+					    udm_item-&gt;value);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	nt-&gt;userdata_length = strnlen(nt-&gt;userdata_complete,</div><div class='del'>-				      sizeof(nt-&gt;userdata_complete));</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(offset != len);</div><div class='add'>+</div><div class='add'>+	/* Switch to new buffer and free old buffer */</div><div class='add'>+	spin_lock_irqsave(&amp;target_list_lock, flags);</div><div class='add'>+	old_buf = nt-&gt;userdata;</div><div class='add'>+	nt-&gt;userdata = new_buf;</div><div class='add'>+	nt-&gt;userdata_length = offset;</div><div class='add'>+	spin_unlock_irqrestore(&amp;target_list_lock, flags);</div><div class='add'>+</div><div class='add'>+	kfree(old_buf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t userdatum_value_store(struct config_item *item, const char *buf,</div><div class='hunk'>@@ -736,9 +956,10 @@ static ssize_t userdatum_value_store(struct config_item *item, const char *buf,</div><div class='ctx'> 	struct userdata *ud;</div><div class='ctx'> 	ssize_t ret;</div><div class='ctx'> </div><div class='del'>-	if (count &gt; MAX_USERDATA_VALUE_LENGTH)</div><div class='add'>+	if (count &gt; MAX_EXTRADATA_VALUE_LEN)</div><div class='ctx'> 		return -EMSGSIZE;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;netconsole_subsys.su_mutex);</div><div class='ctx'> 	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='ctx'> </div><div class='ctx'> 	ret = strscpy(udm-&gt;value, buf, sizeof(udm-&gt;value));</div><div class='hunk'>@@ -748,14 +969,153 @@ static ssize_t userdatum_value_store(struct config_item *item, const char *buf,</div><div class='ctx'> </div><div class='ctx'> 	ud = to_userdata(item-&gt;ci_parent);</div><div class='ctx'> 	nt = userdata_to_target(ud);</div><div class='del'>-	update_userdata(nt);</div><div class='add'>+	ret = update_userdata(nt);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='ctx'> 	ret = count;</div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	mutex_unlock(&amp;netconsole_subsys.su_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* disable_sysdata_feature - Disable sysdata feature and clean sysdata</div><div class='add'>+ * @nt: target that is disabling the feature</div><div class='add'>+ * @feature: feature being disabled</div><div class='add'>+ */</div><div class='add'>+static void disable_sysdata_feature(struct netconsole_target *nt,</div><div class='add'>+				    enum sysdata_feature feature)</div><div class='add'>+{</div><div class='add'>+	nt-&gt;sysdata_fields &amp;= ~feature;</div><div class='add'>+	nt-&gt;sysdata[0] = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sysdata_msgid_enabled_store(struct config_item *item,</div><div class='add'>+					   const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct netconsole_target *nt = to_target(item-&gt;ci_parent);</div><div class='add'>+	bool msgid_enabled, curr;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtobool(buf, &amp;msgid_enabled);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;netconsole_subsys.su_mutex);</div><div class='add'>+	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	curr = !!(nt-&gt;sysdata_fields &amp; SYSDATA_MSGID);</div><div class='add'>+	if (msgid_enabled == curr)</div><div class='add'>+		goto unlock_ok;</div><div class='add'>+</div><div class='add'>+	if (msgid_enabled)</div><div class='add'>+		nt-&gt;sysdata_fields |= SYSDATA_MSGID;</div><div class='add'>+	else</div><div class='add'>+		disable_sysdata_feature(nt, SYSDATA_MSGID);</div><div class='add'>+</div><div class='add'>+unlock_ok:</div><div class='add'>+	ret = strnlen(buf, count);</div><div class='add'>+	mutex_unlock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	mutex_unlock(&amp;netconsole_subsys.su_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sysdata_release_enabled_store(struct config_item *item,</div><div class='add'>+					     const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct netconsole_target *nt = to_target(item-&gt;ci_parent);</div><div class='add'>+	bool release_enabled, curr;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtobool(buf, &amp;release_enabled);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;netconsole_subsys.su_mutex);</div><div class='add'>+	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	curr = !!(nt-&gt;sysdata_fields &amp; SYSDATA_RELEASE);</div><div class='add'>+	if (release_enabled == curr)</div><div class='add'>+		goto unlock_ok;</div><div class='add'>+</div><div class='add'>+	if (release_enabled)</div><div class='add'>+		nt-&gt;sysdata_fields |= SYSDATA_RELEASE;</div><div class='add'>+	else</div><div class='add'>+		disable_sysdata_feature(nt, SYSDATA_RELEASE);</div><div class='add'>+</div><div class='add'>+unlock_ok:</div><div class='add'>+	ret = strnlen(buf, count);</div><div class='add'>+	mutex_unlock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	mutex_unlock(&amp;netconsole_subsys.su_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t sysdata_taskname_enabled_store(struct config_item *item,</div><div class='add'>+					      const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct netconsole_target *nt = to_target(item-&gt;ci_parent);</div><div class='add'>+	bool taskname_enabled, curr;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtobool(buf, &amp;taskname_enabled);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;netconsole_subsys.su_mutex);</div><div class='add'>+	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	curr = !!(nt-&gt;sysdata_fields &amp; SYSDATA_TASKNAME);</div><div class='add'>+	if (taskname_enabled == curr)</div><div class='add'>+		goto unlock_ok;</div><div class='add'>+</div><div class='add'>+	if (taskname_enabled)</div><div class='add'>+		nt-&gt;sysdata_fields |= SYSDATA_TASKNAME;</div><div class='add'>+	else</div><div class='add'>+		disable_sysdata_feature(nt, SYSDATA_TASKNAME);</div><div class='add'>+</div><div class='add'>+unlock_ok:</div><div class='add'>+	ret = strnlen(buf, count);</div><div class='add'>+	mutex_unlock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	mutex_unlock(&amp;netconsole_subsys.su_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* configfs helper to sysdata cpu_nr feature */</div><div class='add'>+static ssize_t sysdata_cpu_nr_enabled_store(struct config_item *item,</div><div class='add'>+					    const char *buf, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct netconsole_target *nt = to_target(item-&gt;ci_parent);</div><div class='add'>+	bool cpu_nr_enabled, curr;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtobool(buf, &amp;cpu_nr_enabled);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;netconsole_subsys.su_mutex);</div><div class='add'>+	mutex_lock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	curr = !!(nt-&gt;sysdata_fields &amp; SYSDATA_CPU_NR);</div><div class='add'>+	if (cpu_nr_enabled == curr)</div><div class='add'>+		/* no change requested */</div><div class='add'>+		goto unlock_ok;</div><div class='add'>+</div><div class='add'>+	if (cpu_nr_enabled)</div><div class='add'>+		nt-&gt;sysdata_fields |= SYSDATA_CPU_NR;</div><div class='add'>+	else</div><div class='add'>+		/* This is special because sysdata might have remaining data</div><div class='add'>+		 * from previous sysdata, and it needs to be cleaned.</div><div class='add'>+		 */</div><div class='add'>+		disable_sysdata_feature(nt, SYSDATA_CPU_NR);</div><div class='add'>+</div><div class='add'>+unlock_ok:</div><div class='add'>+	ret = strnlen(buf, count);</div><div class='add'>+	mutex_unlock(&amp;dynamic_netconsole_mutex);</div><div class='add'>+	mutex_unlock(&amp;netconsole_subsys.su_mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> CONFIGFS_ATTR(userdatum_, value);</div><div class='add'>+CONFIGFS_ATTR(sysdata_, cpu_nr_enabled);</div><div class='add'>+CONFIGFS_ATTR(sysdata_, taskname_enabled);</div><div class='add'>+CONFIGFS_ATTR(sysdata_, release_enabled);</div><div class='add'>+CONFIGFS_ATTR(sysdata_, msgid_enabled);</div><div class='ctx'> </div><div class='ctx'> static struct configfs_attribute *userdatum_attrs[] = {</div><div class='ctx'> 	&amp;userdatum_attr_value,</div><div class='hunk'>@@ -783,15 +1143,13 @@ static struct config_item *userdatum_make_item(struct config_group *group,</div><div class='ctx'> 	struct netconsole_target *nt;</div><div class='ctx'> 	struct userdatum *udm;</div><div class='ctx'> 	struct userdata *ud;</div><div class='del'>-	size_t child_count;</div><div class='ctx'> </div><div class='del'>-	if (strlen(name) &gt; MAX_USERDATA_NAME_LENGTH)</div><div class='add'>+	if (strlen(name) &gt; MAX_EXTRADATA_NAME_LEN)</div><div class='ctx'> 		return ERR_PTR(-ENAMETOOLONG);</div><div class='ctx'> </div><div class='ctx'> 	ud = to_userdata(&amp;group-&gt;cg_item);</div><div class='ctx'> 	nt = userdata_to_target(ud);</div><div class='del'>-	child_count = list_count_nodes(&amp;nt-&gt;userdata_group.cg_children);</div><div class='del'>-	if (child_count &gt;= MAX_USERDATA_ITEMS)</div><div class='add'>+	if (count_userdata_entries(nt) &gt;= MAX_USERDATA_ITEMS)</div><div class='ctx'> 		return ERR_PTR(-ENOSPC);</div><div class='ctx'> </div><div class='ctx'> 	udm = kzalloc(sizeof(*udm), GFP_KERNEL);</div><div class='hunk'>@@ -817,6 +1175,10 @@ static void userdatum_drop(struct config_group *group, struct config_item *item)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct configfs_attribute *userdata_attrs[] = {</div><div class='add'>+	&amp;sysdata_attr_cpu_nr_enabled,</div><div class='add'>+	&amp;sysdata_attr_taskname_enabled,</div><div class='add'>+	&amp;sysdata_attr_release_enabled,</div><div class='add'>+	&amp;sysdata_attr_msgid_enabled,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -842,6 +1204,7 @@ CONFIGFS_ATTR(, remote_ip);</div><div class='ctx'> CONFIGFS_ATTR_RO(, local_mac);</div><div class='ctx'> CONFIGFS_ATTR(, remote_mac);</div><div class='ctx'> CONFIGFS_ATTR(, release);</div><div class='add'>+CONFIGFS_ATTR_RO(, transmit_errors);</div><div class='ctx'> </div><div class='ctx'> static struct configfs_attribute *netconsole_target_attrs[] = {</div><div class='ctx'> 	&amp;attr_enabled,</div><div class='hunk'>@@ -854,6 +1217,7 @@ static struct configfs_attribute *netconsole_target_attrs[] = {</div><div class='ctx'> 	&amp;attr_remote_ip,</div><div class='ctx'> 	&amp;attr_local_mac,</div><div class='ctx'> 	&amp;attr_remote_mac,</div><div class='add'>+	&amp;attr_transmit_errors,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -863,7 +1227,10 @@ static struct configfs_attribute *netconsole_target_attrs[] = {</div><div class='ctx'> </div><div class='ctx'> static void netconsole_target_release(struct config_item *item)</div><div class='ctx'> {</div><div class='del'>-	kfree(to_target(item));</div><div class='add'>+	struct netconsole_target *nt = to_target(item);</div><div class='add'>+</div><div class='add'>+	kfree(nt-&gt;userdata);</div><div class='add'>+	kfree(nt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct configfs_item_operations netconsole_target_item_ops = {</div><div class='hunk'>@@ -990,6 +1357,61 @@ static void populate_configfs_item(struct netconsole_target *nt,</div><div class='ctx'> 	init_target_config_group(nt, target_name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int sysdata_append_cpu_nr(struct netconsole_target *nt, int offset)</div><div class='add'>+{</div><div class='add'>+	return scnprintf(&amp;nt-&gt;sysdata[offset],</div><div class='add'>+			 MAX_EXTRADATA_ENTRY_LEN, " cpu=%u\n",</div><div class='add'>+			 raw_smp_processor_id());</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sysdata_append_taskname(struct netconsole_target *nt, int offset)</div><div class='add'>+{</div><div class='add'>+	return scnprintf(&amp;nt-&gt;sysdata[offset],</div><div class='add'>+			 MAX_EXTRADATA_ENTRY_LEN, " taskname=%s\n",</div><div class='add'>+			 current-&gt;comm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sysdata_append_release(struct netconsole_target *nt, int offset)</div><div class='add'>+{</div><div class='add'>+	return scnprintf(&amp;nt-&gt;sysdata[offset],</div><div class='add'>+			 MAX_EXTRADATA_ENTRY_LEN, " release=%s\n",</div><div class='add'>+			 init_utsname()-&gt;release);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sysdata_append_msgid(struct netconsole_target *nt, int offset)</div><div class='add'>+{</div><div class='add'>+	wrapping_assign_add(nt-&gt;msgcounter, 1);</div><div class='add'>+	return scnprintf(&amp;nt-&gt;sysdata[offset],</div><div class='add'>+			 MAX_EXTRADATA_ENTRY_LEN, " msgid=%u\n",</div><div class='add'>+			 nt-&gt;msgcounter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * prepare_sysdata - append sysdata in runtime</div><div class='add'>+ * @nt: target to send message to</div><div class='add'>+ */</div><div class='add'>+static int prepare_sysdata(struct netconsole_target *nt)</div><div class='add'>+{</div><div class='add'>+	int sysdata_len = 0;</div><div class='add'>+</div><div class='add'>+	if (!nt-&gt;sysdata_fields)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (nt-&gt;sysdata_fields &amp; SYSDATA_CPU_NR)</div><div class='add'>+		sysdata_len += sysdata_append_cpu_nr(nt, sysdata_len);</div><div class='add'>+	if (nt-&gt;sysdata_fields &amp; SYSDATA_TASKNAME)</div><div class='add'>+		sysdata_len += sysdata_append_taskname(nt, sysdata_len);</div><div class='add'>+	if (nt-&gt;sysdata_fields &amp; SYSDATA_RELEASE)</div><div class='add'>+		sysdata_len += sysdata_append_release(nt, sysdata_len);</div><div class='add'>+	if (nt-&gt;sysdata_fields &amp; SYSDATA_MSGID)</div><div class='add'>+		sysdata_len += sysdata_append_msgid(nt, sysdata_len);</div><div class='add'>+</div><div class='add'>+	WARN_ON_ONCE(sysdata_len &gt;</div><div class='add'>+		     MAX_EXTRADATA_ENTRY_LEN * MAX_SYSDATA_ITEMS);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return sysdata_len;</div><div class='add'>+}</div><div class='ctx'> #endif	/* CONFIG_NETCONSOLE_DYNAMIC */</div><div class='ctx'> </div><div class='ctx'> /* Handle network interface device notifications */</div><div class='hunk'>@@ -1058,34 +1480,67 @@ static struct notifier_block netconsole_netdev_notifier = {</div><div class='ctx'> 	.notifier_call  = netconsole_netdev_event,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * send_udp - Wrapper for netpoll_send_udp that counts errors</div><div class='add'>+ * @nt: target to send message to</div><div class='add'>+ * @msg: message to send</div><div class='add'>+ * @len: length of message</div><div class='add'>+ *</div><div class='add'>+ * Calls netpoll_send_udp and classifies the return value. If an error</div><div class='add'>+ * occurred it increments statistics in nt-&gt;stats accordingly.</div><div class='add'>+ * Only calls netpoll_send_udp if CONFIG_NETCONSOLE_DYNAMIC is disabled.</div><div class='add'>+ */</div><div class='add'>+static void send_udp(struct netconsole_target *nt, const char *msg, int len)</div><div class='add'>+{</div><div class='add'>+	int result = netpoll_send_udp(&amp;nt-&gt;np, msg, len);</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_NETCONSOLE_DYNAMIC)) {</div><div class='add'>+		if (result == NET_XMIT_DROP) {</div><div class='add'>+			u64_stats_update_begin(&amp;nt-&gt;stats.syncp);</div><div class='add'>+			u64_stats_inc(&amp;nt-&gt;stats.xmit_drop_count);</div><div class='add'>+			u64_stats_update_end(&amp;nt-&gt;stats.syncp);</div><div class='add'>+		} else if (result == -ENOMEM) {</div><div class='add'>+			u64_stats_update_begin(&amp;nt-&gt;stats.syncp);</div><div class='add'>+			u64_stats_inc(&amp;nt-&gt;stats.enomem_count);</div><div class='add'>+			u64_stats_update_end(&amp;nt-&gt;stats.syncp);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void send_msg_no_fragmentation(struct netconsole_target *nt,</div><div class='ctx'> 				      const char *msg,</div><div class='ctx'> 				      int msg_len,</div><div class='ctx'> 				      int release_len)</div><div class='ctx'> {</div><div class='del'>-	static char buf[MAX_PRINT_CHUNK]; /* protected by target_list_lock */</div><div class='ctx'> 	const char *userdata = NULL;</div><div class='add'>+	const char *sysdata = NULL;</div><div class='ctx'> 	const char *release;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NETCONSOLE_DYNAMIC</div><div class='del'>-	userdata = nt-&gt;userdata_complete;</div><div class='add'>+	userdata = nt-&gt;userdata;</div><div class='add'>+	sysdata = nt-&gt;sysdata;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	if (release_len) {</div><div class='ctx'> 		release = init_utsname()-&gt;release;</div><div class='ctx'> </div><div class='del'>-		scnprintf(buf, MAX_PRINT_CHUNK, "%s,%s", release, msg);</div><div class='add'>+		scnprintf(nt-&gt;buf, MAX_PRINT_CHUNK, "%s,%s", release, msg);</div><div class='ctx'> 		msg_len += release_len;</div><div class='ctx'> 	} else {</div><div class='del'>-		memcpy(buf, msg, msg_len);</div><div class='add'>+		memcpy(nt-&gt;buf, msg, msg_len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (userdata)</div><div class='del'>-		msg_len += scnprintf(&amp;buf[msg_len],</div><div class='del'>-				     MAX_PRINT_CHUNK - msg_len,</div><div class='del'>-				     "%s", userdata);</div><div class='add'>+		msg_len += scnprintf(&amp;nt-&gt;buf[msg_len],</div><div class='add'>+				     MAX_PRINT_CHUNK - msg_len, "%s",</div><div class='add'>+				     userdata);</div><div class='add'>+</div><div class='add'>+	if (sysdata)</div><div class='add'>+		msg_len += scnprintf(&amp;nt-&gt;buf[msg_len],</div><div class='add'>+				     MAX_PRINT_CHUNK - msg_len, "%s",</div><div class='add'>+				     sysdata);</div><div class='ctx'> </div><div class='del'>-	netpoll_send_udp(&amp;nt-&gt;np, buf, msg_len);</div><div class='add'>+	send_udp(nt, nt-&gt;buf, msg_len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void append_release(char *buf)</div><div class='hunk'>@@ -1096,99 +1551,103 @@ static void append_release(char *buf)</div><div class='ctx'> 	scnprintf(buf, MAX_PRINT_CHUNK, "%s,", release);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void send_fragmented_body(struct netconsole_target *nt, char *buf,</div><div class='del'>-				 const char *msgbody, int header_len,</div><div class='del'>-				 int msgbody_len)</div><div class='add'>+static void send_fragmented_body(struct netconsole_target *nt,</div><div class='add'>+				 const char *msgbody_ptr, int header_len,</div><div class='add'>+				 int msgbody_len, int sysdata_len)</div><div class='ctx'> {</div><div class='del'>-	const char *userdata = NULL;</div><div class='del'>-	int body_len, offset = 0;</div><div class='add'>+	const char *userdata_ptr = NULL;</div><div class='add'>+	const char *sysdata_ptr = NULL;</div><div class='add'>+	int data_len, data_sent = 0;</div><div class='add'>+	int userdata_offset = 0;</div><div class='add'>+	int sysdata_offset = 0;</div><div class='add'>+	int msgbody_offset = 0;</div><div class='ctx'> 	int userdata_len = 0;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NETCONSOLE_DYNAMIC</div><div class='del'>-	userdata = nt-&gt;userdata_complete;</div><div class='add'>+	userdata_ptr = nt-&gt;userdata;</div><div class='add'>+	sysdata_ptr = nt-&gt;sysdata;</div><div class='ctx'> 	userdata_len = nt-&gt;userdata_length;</div><div class='ctx'> #endif</div><div class='add'>+	if (WARN_ON_ONCE(!userdata_ptr &amp;&amp; userdata_len != 0))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(!sysdata_ptr &amp;&amp; sysdata_len != 0))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	/* body_len represents the number of bytes that will be sent. This is</div><div class='add'>+	/* data_len represents the number of bytes that will be sent. This is</div><div class='ctx'> 	 * bigger than MAX_PRINT_CHUNK, thus, it will be split in multiple</div><div class='ctx'> 	 * packets</div><div class='ctx'> 	 */</div><div class='del'>-	body_len = msgbody_len + userdata_len;</div><div class='add'>+	data_len = msgbody_len + userdata_len + sysdata_len;</div><div class='ctx'> </div><div class='ctx'> 	/* In each iteration of the while loop below, we send a packet</div><div class='del'>-	 * containing the header and a portion of the body. The body is</div><div class='del'>-	 * composed of two parts: msgbody and userdata. We keep track of how</div><div class='del'>-	 * many bytes have been sent so far using the offset variable, which</div><div class='del'>-	 * ranges from 0 to the total length of the body.</div><div class='add'>+	 * containing the header and a portion of the data. The data is</div><div class='add'>+	 * composed of three parts: msgbody, userdata, and sysdata.</div><div class='add'>+	 * We keep track of how many bytes have been sent from each part using</div><div class='add'>+	 * the *_offset variables.</div><div class='add'>+	 * We keep track of how many bytes have been sent overall using the</div><div class='add'>+	 * data_sent variable, which ranges from 0 to the total bytes to be</div><div class='add'>+	 * sent.</div><div class='ctx'> 	 */</div><div class='del'>-	while (offset &lt; body_len) {</div><div class='del'>-		int this_header = header_len;</div><div class='del'>-		bool msgbody_written = false;</div><div class='del'>-		int this_offset = 0;</div><div class='add'>+	while (data_sent &lt; data_len) {</div><div class='add'>+		int userdata_left = userdata_len - userdata_offset;</div><div class='add'>+		int sysdata_left = sysdata_len - sysdata_offset;</div><div class='add'>+		int msgbody_left = msgbody_len - msgbody_offset;</div><div class='add'>+		int buf_offset = 0;</div><div class='ctx'> 		int this_chunk = 0;</div><div class='ctx'> </div><div class='del'>-		this_header += scnprintf(buf + this_header,</div><div class='del'>-					 MAX_PRINT_CHUNK - this_header,</div><div class='del'>-					 ",ncfrag=%d/%d;", offset,</div><div class='del'>-					 body_len);</div><div class='del'>-</div><div class='del'>-		/* Not all msgbody data has been written yet */</div><div class='del'>-		if (offset &lt; msgbody_len) {</div><div class='del'>-			this_chunk = min(msgbody_len - offset,</div><div class='del'>-					 MAX_PRINT_CHUNK - this_header);</div><div class='del'>-			if (WARN_ON_ONCE(this_chunk &lt;= 0))</div><div class='del'>-				return;</div><div class='del'>-			memcpy(buf + this_header, msgbody + offset, this_chunk);</div><div class='del'>-			this_offset += this_chunk;</div><div class='add'>+		/* header is already populated in nt-&gt;buf, just append to it */</div><div class='add'>+		buf_offset = header_len;</div><div class='add'>+</div><div class='add'>+		buf_offset += scnprintf(nt-&gt;buf + buf_offset,</div><div class='add'>+					 MAX_PRINT_CHUNK - buf_offset,</div><div class='add'>+					 ",ncfrag=%d/%d;", data_sent,</div><div class='add'>+					 data_len);</div><div class='add'>+</div><div class='add'>+		/* append msgbody first */</div><div class='add'>+		this_chunk = min(msgbody_left, MAX_PRINT_CHUNK - buf_offset);</div><div class='add'>+		memcpy(nt-&gt;buf + buf_offset, msgbody_ptr + msgbody_offset,</div><div class='add'>+		       this_chunk);</div><div class='add'>+		msgbody_offset += this_chunk;</div><div class='add'>+		buf_offset += this_chunk;</div><div class='add'>+		data_sent += this_chunk;</div><div class='add'>+</div><div class='add'>+		/* after msgbody, append userdata */</div><div class='add'>+		if (userdata_ptr &amp;&amp; userdata_left) {</div><div class='add'>+			this_chunk = min(userdata_left,</div><div class='add'>+					 MAX_PRINT_CHUNK - buf_offset);</div><div class='add'>+			memcpy(nt-&gt;buf + buf_offset,</div><div class='add'>+			       userdata_ptr + userdata_offset, this_chunk);</div><div class='add'>+			userdata_offset += this_chunk;</div><div class='add'>+			buf_offset += this_chunk;</div><div class='add'>+			data_sent += this_chunk;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* msgbody was finally written, either in the previous</div><div class='del'>-		 * messages and/or in the current buf. Time to write</div><div class='del'>-		 * the userdata.</div><div class='del'>-		 */</div><div class='del'>-		msgbody_written |= offset + this_offset &gt;= msgbody_len;</div><div class='del'>-</div><div class='del'>-		/* Msg body is fully written and there is pending userdata to</div><div class='del'>-		 * write, append userdata in this chunk</div><div class='del'>-		 */</div><div class='del'>-		if (msgbody_written &amp;&amp; offset + this_offset &lt; body_len) {</div><div class='del'>-			/* Track how much user data was already sent. First</div><div class='del'>-			 * time here, sent_userdata is zero</div><div class='del'>-			 */</div><div class='del'>-			int sent_userdata = (offset + this_offset) - msgbody_len;</div><div class='del'>-			/* offset of bytes used in current buf */</div><div class='del'>-			int preceding_bytes = this_chunk + this_header;</div><div class='del'>-</div><div class='del'>-			if (WARN_ON_ONCE(sent_userdata &lt; 0))</div><div class='del'>-				return;</div><div class='del'>-</div><div class='del'>-			this_chunk = min(userdata_len - sent_userdata,</div><div class='del'>-					 MAX_PRINT_CHUNK - preceding_bytes);</div><div class='del'>-			if (WARN_ON_ONCE(this_chunk &lt; 0))</div><div class='del'>-				/* this_chunk could be zero if all the previous</div><div class='del'>-				 * message used all the buffer. This is not a</div><div class='del'>-				 * problem, userdata will be sent in the next</div><div class='del'>-				 * iteration</div><div class='del'>-				 */</div><div class='del'>-				return;</div><div class='del'>-</div><div class='del'>-			memcpy(buf + this_header + this_offset,</div><div class='del'>-			       userdata + sent_userdata,</div><div class='del'>-			       this_chunk);</div><div class='del'>-			this_offset += this_chunk;</div><div class='add'>+		/* after userdata, append sysdata */</div><div class='add'>+		if (sysdata_ptr &amp;&amp; sysdata_left) {</div><div class='add'>+			this_chunk = min(sysdata_left,</div><div class='add'>+					 MAX_PRINT_CHUNK - buf_offset);</div><div class='add'>+			memcpy(nt-&gt;buf + buf_offset,</div><div class='add'>+			       sysdata_ptr + sysdata_offset, this_chunk);</div><div class='add'>+			sysdata_offset += this_chunk;</div><div class='add'>+			buf_offset += this_chunk;</div><div class='add'>+			data_sent += this_chunk;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		netpoll_send_udp(&amp;nt-&gt;np, buf, this_header + this_offset);</div><div class='del'>-		offset += this_offset;</div><div class='add'>+		/* if all is good, send the packet out */</div><div class='add'>+		if (WARN_ON_ONCE(data_sent &gt; data_len))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		send_udp(nt, nt-&gt;buf, buf_offset);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void send_msg_fragmented(struct netconsole_target *nt,</div><div class='ctx'> 				const char *msg,</div><div class='ctx'> 				int msg_len,</div><div class='del'>-				int release_len)</div><div class='add'>+				int release_len,</div><div class='add'>+				int sysdata_len)</div><div class='ctx'> {</div><div class='del'>-	static char buf[MAX_PRINT_CHUNK]; /* protected by target_list_lock */</div><div class='ctx'> 	int header_len, msgbody_len;</div><div class='ctx'> 	const char *msgbody;</div><div class='ctx'> </div><div class='hunk'>@@ -1206,16 +1665,17 @@ static void send_msg_fragmented(struct netconsole_target *nt,</div><div class='ctx'> 	 * "ncfrag=&lt;byte-offset&gt;/&lt;total-bytes&gt;"</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (release_len)</div><div class='del'>-		append_release(buf);</div><div class='add'>+		append_release(nt-&gt;buf);</div><div class='ctx'> </div><div class='ctx'> 	/* Copy the header into the buffer */</div><div class='del'>-	memcpy(buf + release_len, msg, header_len);</div><div class='add'>+	memcpy(nt-&gt;buf + release_len, msg, header_len);</div><div class='ctx'> 	header_len += release_len;</div><div class='ctx'> </div><div class='ctx'> 	/* for now on, the header will be persisted, and the msgbody</div><div class='ctx'> 	 * will be replaced</div><div class='ctx'> 	 */</div><div class='del'>-	send_fragmented_body(nt, buf, msgbody, header_len, msgbody_len);</div><div class='add'>+	send_fragmented_body(nt, msgbody, header_len, msgbody_len,</div><div class='add'>+			     sysdata_len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1233,18 +1693,20 @@ static void send_ext_msg_udp(struct netconsole_target *nt, const char *msg,</div><div class='ctx'> {</div><div class='ctx'> 	int userdata_len = 0;</div><div class='ctx'> 	int release_len = 0;</div><div class='add'>+	int sysdata_len = 0;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NETCONSOLE_DYNAMIC</div><div class='add'>+	sysdata_len = prepare_sysdata(nt);</div><div class='ctx'> 	userdata_len = nt-&gt;userdata_length;</div><div class='ctx'> #endif</div><div class='del'>-</div><div class='ctx'> 	if (nt-&gt;release)</div><div class='ctx'> 		release_len = strlen(init_utsname()-&gt;release) + 1;</div><div class='ctx'> </div><div class='del'>-	if (msg_len + release_len + userdata_len &lt;= MAX_PRINT_CHUNK)</div><div class='add'>+	if (msg_len + release_len + sysdata_len + userdata_len &lt;= MAX_PRINT_CHUNK)</div><div class='ctx'> 		return send_msg_no_fragmentation(nt, msg, msg_len, release_len);</div><div class='ctx'> </div><div class='del'>-	return send_msg_fragmented(nt, msg, msg_len, release_len);</div><div class='add'>+	return send_msg_fragmented(nt, msg, msg_len, release_len,</div><div class='add'>+				   sysdata_len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void write_ext_msg(struct console *con, const char *msg,</div><div class='hunk'>@@ -1288,7 +1750,7 @@ static void write_msg(struct console *con, const char *msg, unsigned int len)</div><div class='ctx'> 			tmp = msg;</div><div class='ctx'> 			for (left = len; left;) {</div><div class='ctx'> 				frag = min(left, MAX_PRINT_CHUNK);</div><div class='del'>-				netpoll_send_udp(&amp;nt-&gt;np, tmp, frag);</div><div class='add'>+				send_udp(nt, tmp, frag);</div><div class='ctx'> 				tmp += frag;</div><div class='ctx'> 				left -= frag;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1297,6 +1759,100 @@ static void write_msg(struct console *con, const char *msg, unsigned int len)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;target_list_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int netconsole_parser_cmdline(struct netpoll *np, char *opt)</div><div class='add'>+{</div><div class='add'>+	bool ipversion_set = false;</div><div class='add'>+	char *cur = opt;</div><div class='add'>+	char *delim;</div><div class='add'>+	int ipv6;</div><div class='add'>+</div><div class='add'>+	if (*cur != '@') {</div><div class='add'>+		delim = strchr(cur, '@');</div><div class='add'>+		if (!delim)</div><div class='add'>+			goto parse_failed;</div><div class='add'>+		*delim = 0;</div><div class='add'>+		if (kstrtou16(cur, 10, &amp;np-&gt;local_port))</div><div class='add'>+			goto parse_failed;</div><div class='add'>+		cur = delim;</div><div class='add'>+	}</div><div class='add'>+	cur++;</div><div class='add'>+</div><div class='add'>+	if (*cur != '/') {</div><div class='add'>+		ipversion_set = true;</div><div class='add'>+		delim = strchr(cur, '/');</div><div class='add'>+		if (!delim)</div><div class='add'>+			goto parse_failed;</div><div class='add'>+		*delim = 0;</div><div class='add'>+		ipv6 = netpoll_parse_ip_addr(cur, &amp;np-&gt;local_ip);</div><div class='add'>+		if (ipv6 &lt; 0)</div><div class='add'>+			goto parse_failed;</div><div class='add'>+		else</div><div class='add'>+			np-&gt;ipv6 = (bool)ipv6;</div><div class='add'>+		cur = delim;</div><div class='add'>+	}</div><div class='add'>+	cur++;</div><div class='add'>+</div><div class='add'>+	if (*cur != ',') {</div><div class='add'>+		/* parse out dev_name or dev_mac */</div><div class='add'>+		delim = strchr(cur, ',');</div><div class='add'>+		if (!delim)</div><div class='add'>+			goto parse_failed;</div><div class='add'>+		*delim = 0;</div><div class='add'>+</div><div class='add'>+		np-&gt;dev_name[0] = '\0';</div><div class='add'>+		eth_broadcast_addr(np-&gt;dev_mac);</div><div class='add'>+		if (!strchr(cur, ':'))</div><div class='add'>+			strscpy(np-&gt;dev_name, cur, sizeof(np-&gt;dev_name));</div><div class='add'>+		else if (!mac_pton(cur, np-&gt;dev_mac))</div><div class='add'>+			goto parse_failed;</div><div class='add'>+</div><div class='add'>+		cur = delim;</div><div class='add'>+	}</div><div class='add'>+	cur++;</div><div class='add'>+</div><div class='add'>+	if (*cur != '@') {</div><div class='add'>+		/* dst port */</div><div class='add'>+		delim = strchr(cur, '@');</div><div class='add'>+		if (!delim)</div><div class='add'>+			goto parse_failed;</div><div class='add'>+		*delim = 0;</div><div class='add'>+		if (*cur == ' ' || *cur == '\t')</div><div class='add'>+			np_info(np, "warning: whitespace is not allowed\n");</div><div class='add'>+		if (kstrtou16(cur, 10, &amp;np-&gt;remote_port))</div><div class='add'>+			goto parse_failed;</div><div class='add'>+		cur = delim;</div><div class='add'>+	}</div><div class='add'>+	cur++;</div><div class='add'>+</div><div class='add'>+	/* dst ip */</div><div class='add'>+	delim = strchr(cur, '/');</div><div class='add'>+	if (!delim)</div><div class='add'>+		goto parse_failed;</div><div class='add'>+	*delim = 0;</div><div class='add'>+	ipv6 = netpoll_parse_ip_addr(cur, &amp;np-&gt;remote_ip);</div><div class='add'>+	if (ipv6 &lt; 0)</div><div class='add'>+		goto parse_failed;</div><div class='add'>+	else if (ipversion_set &amp;&amp; np-&gt;ipv6 != (bool)ipv6)</div><div class='add'>+		goto parse_failed;</div><div class='add'>+	else</div><div class='add'>+		np-&gt;ipv6 = (bool)ipv6;</div><div class='add'>+	cur = delim + 1;</div><div class='add'>+</div><div class='add'>+	if (*cur != 0) {</div><div class='add'>+		/* MAC address */</div><div class='add'>+		if (!mac_pton(cur, np-&gt;remote_mac))</div><div class='add'>+			goto parse_failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netconsole_print_banner(np);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ parse_failed:</div><div class='add'>+	np_info(np, "couldn't parse config at '%s'!\n", cur);</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Allocate new target (from boot/module param) and setup netpoll for it */</div><div class='ctx'> static struct netconsole_target *alloc_param_target(char *target_config,</div><div class='ctx'> 						    int cmdline_count)</div><div class='hunk'>@@ -1326,7 +1882,7 @@ static struct netconsole_target *alloc_param_target(char *target_config,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Parse parameters and setup netpoll */</div><div class='del'>-	err = netpoll_parse_options(&amp;nt-&gt;np, target_config);</div><div class='add'>+	err = netconsole_parser_cmdline(&amp;nt-&gt;np, target_config);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='hunk'>@@ -1355,6 +1911,9 @@ fail:</div><div class='ctx'> static void free_param_target(struct netconsole_target *nt)</div><div class='ctx'> {</div><div class='ctx'> 	netpoll_cleanup(&amp;nt-&gt;np);</div><div class='add'>+#ifdef	CONFIG_NETCONSOLE_DYNAMIC</div><div class='add'>+	kfree(nt-&gt;userdata);</div><div class='add'>+#endif</div><div class='ctx'> 	kfree(nt);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1374,8 +1933,8 @@ static int __init init_netconsole(void)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct netconsole_target *nt, *tmp;</div><div class='add'>+	u32 console_type_needed = 0;</div><div class='ctx'> 	unsigned int count = 0;</div><div class='del'>-	bool extended = false;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	char *target_config;</div><div class='ctx'> 	char *input = config;</div><div class='hunk'>@@ -1391,9 +1950,10 @@ static int __init init_netconsole(void)</div><div class='ctx'> 			}</div><div class='ctx'> 			/* Dump existing printks when we register */</div><div class='ctx'> 			if (nt-&gt;extended) {</div><div class='del'>-				extended = true;</div><div class='add'>+				console_type_needed |= CONS_EXTENDED;</div><div class='ctx'> 				netconsole_ext.flags |= CON_PRINTBUFFER;</div><div class='ctx'> 			} else {</div><div class='add'>+				console_type_needed |= CONS_BASIC;</div><div class='ctx'> 				netconsole.flags |= CON_PRINTBUFFER;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -1412,9 +1972,10 @@ static int __init init_netconsole(void)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto undonotifier;</div><div class='ctx'> </div><div class='del'>-	if (extended)</div><div class='add'>+	if (console_type_needed &amp; CONS_EXTENDED)</div><div class='ctx'> 		register_console(&amp;netconsole_ext);</div><div class='del'>-	register_console(&amp;netconsole);</div><div class='add'>+	if (console_type_needed &amp; CONS_BASIC)</div><div class='add'>+		register_console(&amp;netconsole);</div><div class='ctx'> 	pr_info("network logging started\n");</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1444,7 +2005,8 @@ static void __exit cleanup_netconsole(void)</div><div class='ctx'> </div><div class='ctx'> 	if (console_is_registered(&amp;netconsole_ext))</div><div class='ctx'> 		unregister_console(&amp;netconsole_ext);</div><div class='del'>-	unregister_console(&amp;netconsole);</div><div class='add'>+	if (console_is_registered(&amp;netconsole))</div><div class='add'>+		unregister_console(&amp;netconsole);</div><div class='ctx'> 	dynamic_netconsole_exit();</div><div class='ctx'> 	unregister_netdevice_notifier(&amp;netconsole_netdev_notifier);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/netdevsim/Makefile b/drivers/net/netdevsim/Makefile<br/>index f8de93bc5f5b..14a553e000ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/Makefile</a></div><div class='hunk'>@@ -18,6 +18,10 @@ ifneq ($(CONFIG_PSAMPLE),)</div><div class='ctx'> netdevsim-objs += psample.o</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='add'>+ifneq ($(CONFIG_INET_PSP),)</div><div class='add'>+netdevsim-objs += psp.o</div><div class='add'>+endif</div><div class='add'>+</div><div class='ctx'> ifneq ($(CONFIG_MACSEC),)</div><div class='ctx'> netdevsim-objs += macsec.o</div><div class='ctx'> endif</div><div class='head'>diff --git a/drivers/net/netdevsim/bpf.c b/drivers/net/netdevsim/bpf.c<br/>index 608953d4f98d..49537d3c4120 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/bpf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/bpf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/bpf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/bpf.c</a></div><div class='hunk'>@@ -296,7 +296,8 @@ static int nsim_setup_prog_checks(struct netdevsim *ns, struct netdev_bpf *bpf)</div><div class='ctx'> 		NSIM_EA(bpf-&gt;extack, "attempt to load offloaded prog to drv");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='del'>-	if (ns-&gt;netdev-&gt;mtu &gt; NSIM_XDP_MAX_MTU) {</div><div class='add'>+	if (bpf-&gt;prog &amp;&amp; !bpf-&gt;prog-&gt;aux-&gt;xdp_has_frags &amp;&amp;</div><div class='add'>+	    ns-&gt;netdev-&gt;mtu &gt; NSIM_XDP_MAX_MTU) {</div><div class='ctx'> 		NSIM_EA(bpf-&gt;extack, "MTU too large w/ XDP enabled");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/netdevsim/bus.c b/drivers/net/netdevsim/bus.c<br/>index 64c0cdd31bf8..70e8c38ddad6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/bus.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/bus.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/bus.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/bus.c</a></div><div class='hunk'>@@ -66,17 +66,35 @@ new_port_store(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 	       const char *buf, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	struct nsim_bus_dev *nsim_bus_dev = to_nsim_bus_dev(dev);</div><div class='add'>+	u8 eth_addr[ETH_ALEN] = {};</div><div class='ctx'> 	unsigned int port_index;</div><div class='add'>+	bool addr_set = false;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Prevent to use nsim_bus_dev before initialization. */</div><div class='ctx'> 	if (!smp_load_acquire(&amp;nsim_bus_dev-&gt;init))</div><div class='ctx'> 		return -EBUSY;</div><div class='del'>-	ret = kstrtouint(buf, 0, &amp;port_index);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = nsim_drv_port_add(nsim_bus_dev, NSIM_DEV_PORT_TYPE_PF, port_index);</div><div class='add'>+	ret = sscanf(buf, "%u %hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &amp;port_index,</div><div class='add'>+		     &amp;eth_addr[0], &amp;eth_addr[1], &amp;eth_addr[2], &amp;eth_addr[3],</div><div class='add'>+		     &amp;eth_addr[4], &amp;eth_addr[5]);</div><div class='add'>+	switch (ret) {</div><div class='add'>+	case 7:</div><div class='add'>+		if (!is_valid_ether_addr(eth_addr)) {</div><div class='add'>+			pr_err("The supplied perm_addr is not a valid MAC address\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		addr_set = true;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case 1:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pr_err("Format for adding new port is \"id [perm_addr]\" (uint MAC).\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = nsim_drv_port_add(nsim_bus_dev, NSIM_DEV_PORT_TYPE_PF, port_index,</div><div class='add'>+				addr_set ? eth_addr : NULL);</div><div class='ctx'> 	return ret ? ret : count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -366,6 +384,9 @@ static ssize_t unlink_device_store(const struct bus_type *bus, const char *buf,</div><div class='ctx'> 	err = 0;</div><div class='ctx'> 	RCU_INIT_POINTER(nsim-&gt;peer, NULL);</div><div class='ctx'> 	RCU_INIT_POINTER(peer-&gt;peer, NULL);</div><div class='add'>+	synchronize_net();</div><div class='add'>+	netif_tx_wake_all_queues(dev);</div><div class='add'>+	netif_tx_wake_all_queues(peer-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> out_put_netns:</div><div class='ctx'> 	put_net(ns);</div><div class='head'>diff --git a/drivers/net/netdevsim/dev.c b/drivers/net/netdevsim/dev.c<br/>index 3e0b61202f0c..2683a989873e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/dev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/dev.c</a></div><div class='hunk'>@@ -314,10 +314,14 @@ static int nsim_dev_debugfs_init(struct nsim_dev *nsim_dev)</div><div class='ctx'> 			    &amp;nsim_dev-&gt;fw_update_status);</div><div class='ctx'> 	debugfs_create_u32("fw_update_overwrite_mask", 0600, nsim_dev-&gt;ddir,</div><div class='ctx'> 			    &amp;nsim_dev-&gt;fw_update_overwrite_mask);</div><div class='add'>+	debugfs_create_u32("fw_update_flash_chunk_time_ms", 0600, nsim_dev-&gt;ddir,</div><div class='add'>+			   &amp;nsim_dev-&gt;fw_update_flash_chunk_time_ms);</div><div class='ctx'> 	debugfs_create_u32("max_macs", 0600, nsim_dev-&gt;ddir,</div><div class='ctx'> 			   &amp;nsim_dev-&gt;max_macs);</div><div class='ctx'> 	debugfs_create_bool("test1", 0600, nsim_dev-&gt;ddir,</div><div class='ctx'> 			    &amp;nsim_dev-&gt;test1);</div><div class='add'>+	debugfs_create_u32("test2", 0600, nsim_dev-&gt;ddir,</div><div class='add'>+			   &amp;nsim_dev-&gt;test2);</div><div class='ctx'> 	nsim_dev-&gt;take_snapshot = debugfs_create_file("take_snapshot",</div><div class='ctx'> 						      0200,</div><div class='ctx'> 						      nsim_dev-&gt;ddir,</div><div class='hunk'>@@ -388,6 +392,17 @@ static const struct file_operations nsim_dev_rate_parent_fops = {</div><div class='ctx'> 	.owner = THIS_MODULE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void nsim_dev_tc_bw_debugfs_init(struct dentry *ddir, u32 *tc_bw)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DEVLINK_RATE_TCS_MAX; i++) {</div><div class='add'>+		char name[16];</div><div class='add'>+</div><div class='add'>+		snprintf(name, sizeof(name), "tc%d_bw", i);</div><div class='add'>+		debugfs_create_u32(name, 0400, ddir, &amp;tc_bw[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> static int nsim_dev_port_debugfs_init(struct nsim_dev *nsim_dev,</div><div class='ctx'> 				      struct nsim_dev_port *nsim_dev_port)</div><div class='ctx'> {</div><div class='hunk'>@@ -415,6 +430,8 @@ static int nsim_dev_port_debugfs_init(struct nsim_dev *nsim_dev,</div><div class='ctx'> 								 nsim_dev_port-&gt;ddir,</div><div class='ctx'> 								 &amp;nsim_dev_port-&gt;parent_name,</div><div class='ctx'> 								 &amp;nsim_dev_rate_parent_fops);</div><div class='add'>+		nsim_dev_tc_bw_debugfs_init(nsim_dev_port-&gt;ddir,</div><div class='add'>+					    nsim_dev_port-&gt;tc_bw);</div><div class='ctx'> 	}</div><div class='ctx'> 	debugfs_create_symlink("dev", nsim_dev_port-&gt;ddir, dev_link_name);</div><div class='ctx'> </div><div class='hunk'>@@ -506,8 +523,53 @@ err_out:</div><div class='ctx'> enum nsim_devlink_param_id {</div><div class='ctx'> 	NSIM_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,</div><div class='ctx'> 	NSIM_DEVLINK_PARAM_ID_TEST1,</div><div class='add'>+	NSIM_DEVLINK_PARAM_ID_TEST2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int</div><div class='add'>+nsim_devlink_param_test2_get(struct devlink *devlink, u32 id,</div><div class='add'>+			     struct devlink_param_gset_ctx *ctx,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct nsim_dev *nsim_dev = devlink_priv(devlink);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;val.vu32 = nsim_dev-&gt;test2;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nsim_devlink_param_test2_set(struct devlink *devlink, u32 id,</div><div class='add'>+			     struct devlink_param_gset_ctx *ctx,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct nsim_dev *nsim_dev = devlink_priv(devlink);</div><div class='add'>+</div><div class='add'>+	nsim_dev-&gt;test2 = ctx-&gt;val.vu32;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define NSIM_DEV_TEST2_DEFAULT 1234</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nsim_devlink_param_test2_get_default(struct devlink *devlink, u32 id,</div><div class='add'>+				     struct devlink_param_gset_ctx *ctx,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	ctx-&gt;val.vu32 = NSIM_DEV_TEST2_DEFAULT;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nsim_devlink_param_test2_reset_default(struct devlink *devlink, u32 id,</div><div class='add'>+				       enum devlink_param_cmode cmode,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct nsim_dev *nsim_dev = devlink_priv(devlink);</div><div class='add'>+</div><div class='add'>+	nsim_dev-&gt;test2 = NSIM_DEV_TEST2_DEFAULT;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct devlink_param nsim_devlink_params[] = {</div><div class='ctx'> 	DEVLINK_PARAM_GENERIC(MAX_MACS,</div><div class='ctx'> 			      BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),</div><div class='hunk'>@@ -516,6 +578,14 @@ static const struct devlink_param nsim_devlink_params[] = {</div><div class='ctx'> 			     "test1", DEVLINK_PARAM_TYPE_BOOL,</div><div class='ctx'> 			     BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),</div><div class='ctx'> 			     NULL, NULL, NULL),</div><div class='add'>+	DEVLINK_PARAM_DRIVER_WITH_DEFAULTS(NSIM_DEVLINK_PARAM_ID_TEST2,</div><div class='add'>+					   "test2", DEVLINK_PARAM_TYPE_U32,</div><div class='add'>+					   BIT(DEVLINK_PARAM_CMODE_RUNTIME),</div><div class='add'>+					   nsim_devlink_param_test2_get,</div><div class='add'>+					   nsim_devlink_param_test2_set,</div><div class='add'>+					   NULL,</div><div class='add'>+					   nsim_devlink_param_test2_get_default,</div><div class='add'>+					   nsim_devlink_param_test2_reset_default),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void nsim_devlink_set_params_init_values(struct nsim_dev *nsim_dev,</div><div class='hunk'>@@ -576,7 +646,7 @@ static void nsim_dev_dummy_region_exit(struct nsim_dev *nsim_dev)</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> __nsim_dev_port_add(struct nsim_dev *nsim_dev, enum nsim_dev_port_type type,</div><div class='del'>-		    unsigned int port_index);</div><div class='add'>+		    unsigned int port_index, u8 perm_addr[ETH_ALEN]);</div><div class='ctx'> static void __nsim_dev_port_del(struct nsim_dev_port *nsim_dev_port);</div><div class='ctx'> </div><div class='ctx'> static int nsim_esw_legacy_enable(struct nsim_dev *nsim_dev,</div><div class='hunk'>@@ -600,7 +670,7 @@ static int nsim_esw_switchdev_enable(struct nsim_dev *nsim_dev,</div><div class='ctx'> 	int i, err;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nsim_dev_get_vfs(nsim_dev); i++) {</div><div class='del'>-		err = __nsim_dev_port_add(nsim_dev, NSIM_DEV_PORT_TYPE_VF, i);</div><div class='add'>+		err = __nsim_dev_port_add(nsim_dev, NSIM_DEV_PORT_TYPE_VF, i, NULL);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			NL_SET_ERR_MSG_MOD(extack, "Failed to initialize VFs' netdevsim ports");</div><div class='ctx'> 			pr_err("Failed to initialize VF id=%d. %d.\n", i, err);</div><div class='hunk'>@@ -836,7 +906,7 @@ static void nsim_dev_trap_report_work(struct work_struct *work)</div><div class='ctx'> 	nsim_dev = nsim_trap_data-&gt;nsim_dev;</div><div class='ctx'> </div><div class='ctx'> 	if (!devl_trylock(priv_to_devlink(nsim_dev))) {</div><div class='del'>-		queue_delayed_work(system_unbound_wq,</div><div class='add'>+		queue_delayed_work(system_dfl_wq,</div><div class='ctx'> 				   &amp;nsim_dev-&gt;trap_data-&gt;trap_report_dw, 1);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -852,7 +922,7 @@ static void nsim_dev_trap_report_work(struct work_struct *work)</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> 	}</div><div class='ctx'> 	devl_unlock(priv_to_devlink(nsim_dev));</div><div class='del'>-	queue_delayed_work(system_unbound_wq,</div><div class='add'>+	queue_delayed_work(system_dfl_wq,</div><div class='ctx'> 			   &amp;nsim_dev-&gt;trap_data-&gt;trap_report_dw,</div><div class='ctx'> 			   msecs_to_jiffies(NSIM_TRAP_REPORT_INTERVAL_MS));</div><div class='ctx'> }</div><div class='hunk'>@@ -909,7 +979,7 @@ static int nsim_dev_traps_init(struct devlink *devlink)</div><div class='ctx'> </div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;nsim_dev-&gt;trap_data-&gt;trap_report_dw,</div><div class='ctx'> 			  nsim_dev_trap_report_work);</div><div class='del'>-	queue_delayed_work(system_unbound_wq,</div><div class='add'>+	queue_delayed_work(system_dfl_wq,</div><div class='ctx'> 			   &amp;nsim_dev-&gt;trap_data-&gt;trap_report_dw,</div><div class='ctx'> 			   msecs_to_jiffies(NSIM_TRAP_REPORT_INTERVAL_MS));</div><div class='ctx'> </div><div class='hunk'>@@ -1002,9 +1072,9 @@ static int nsim_dev_info_get(struct devlink *devlink,</div><div class='ctx'> 						    DEVLINK_INFO_VERSION_TYPE_COMPONENT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define NSIM_DEV_FLASH_SIZE 500000</div><div class='add'>+#define NSIM_DEV_FLASH_SIZE 50000</div><div class='ctx'> #define NSIM_DEV_FLASH_CHUNK_SIZE 1000</div><div class='del'>-#define NSIM_DEV_FLASH_CHUNK_TIME_MS 10</div><div class='add'>+#define NSIM_DEV_FLASH_CHUNK_TIME_MS_DEFAULT 100</div><div class='ctx'> </div><div class='ctx'> static int nsim_dev_flash_update(struct devlink *devlink,</div><div class='ctx'> 				 struct devlink_flash_update_params *params,</div><div class='hunk'>@@ -1028,7 +1098,7 @@ static int nsim_dev_flash_update(struct devlink *devlink,</div><div class='ctx'> 							   params-&gt;component,</div><div class='ctx'> 							   i * NSIM_DEV_FLASH_CHUNK_SIZE,</div><div class='ctx'> 							   NSIM_DEV_FLASH_SIZE);</div><div class='del'>-		msleep(NSIM_DEV_FLASH_CHUNK_TIME_MS);</div><div class='add'>+		msleep(nsim_dev-&gt;fw_update_flash_chunk_time_ms ?: 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (nsim_dev-&gt;fw_update_status) {</div><div class='hunk'>@@ -1172,6 +1242,19 @@ static int nsim_rate_bytes_to_units(char *name, u64 *rate, struct netlink_ext_ac</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int nsim_leaf_tc_bw_set(struct devlink_rate *devlink_rate,</div><div class='add'>+			       void *priv, u32 *tc_bw,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct nsim_dev_port *nsim_dev_port = priv;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DEVLINK_RATE_TCS_MAX; i++)</div><div class='add'>+		nsim_dev_port-&gt;tc_bw[i] = tc_bw[i];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int nsim_leaf_tx_share_set(struct devlink_rate *devlink_rate, void *priv,</div><div class='ctx'> 				  u64 tx_share, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='hunk'>@@ -1210,8 +1293,21 @@ struct nsim_rate_node {</div><div class='ctx'> 	char *parent_name;</div><div class='ctx'> 	u16 tx_share;</div><div class='ctx'> 	u16 tx_max;</div><div class='add'>+	u32 tc_bw[DEVLINK_RATE_TCS_MAX];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int nsim_node_tc_bw_set(struct devlink_rate *devlink_rate, void *priv,</div><div class='add'>+			       u32 *tc_bw, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct nsim_rate_node *nsim_node = priv;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DEVLINK_RATE_TCS_MAX; i++)</div><div class='add'>+		nsim_node-&gt;tc_bw[i] = tc_bw[i];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int nsim_node_tx_share_set(struct devlink_rate *devlink_rate, void *priv,</div><div class='ctx'> 				  u64 tx_share, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='hunk'>@@ -1264,6 +1360,8 @@ static int nsim_rate_node_new(struct devlink_rate *node, void **priv,</div><div class='ctx'> 						     &amp;nsim_node-&gt;parent_name,</div><div class='ctx'> 						     &amp;nsim_dev_rate_parent_fops);</div><div class='ctx'> </div><div class='add'>+	nsim_dev_tc_bw_debugfs_init(nsim_node-&gt;ddir, nsim_node-&gt;tc_bw);</div><div class='add'>+</div><div class='ctx'> 	*priv = nsim_node;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1340,8 +1438,10 @@ static const struct devlink_ops nsim_dev_devlink_ops = {</div><div class='ctx'> 	.trap_policer_counter_get = nsim_dev_devlink_trap_policer_counter_get,</div><div class='ctx'> 	.rate_leaf_tx_share_set = nsim_leaf_tx_share_set,</div><div class='ctx'> 	.rate_leaf_tx_max_set = nsim_leaf_tx_max_set,</div><div class='add'>+	.rate_leaf_tc_bw_set = nsim_leaf_tc_bw_set,</div><div class='ctx'> 	.rate_node_tx_share_set = nsim_node_tx_share_set,</div><div class='ctx'> 	.rate_node_tx_max_set = nsim_node_tx_max_set,</div><div class='add'>+	.rate_node_tc_bw_set = nsim_node_tc_bw_set,</div><div class='ctx'> 	.rate_node_new = nsim_rate_node_new,</div><div class='ctx'> 	.rate_node_del = nsim_rate_node_del,</div><div class='ctx'> 	.rate_leaf_parent_set = nsim_rate_leaf_parent_set,</div><div class='hunk'>@@ -1353,7 +1453,7 @@ static const struct devlink_ops nsim_dev_devlink_ops = {</div><div class='ctx'> #define NSIM_DEV_TEST1_DEFAULT true</div><div class='ctx'> </div><div class='ctx'> static int __nsim_dev_port_add(struct nsim_dev *nsim_dev, enum nsim_dev_port_type type,</div><div class='del'>-			       unsigned int port_index)</div><div class='add'>+			       unsigned int port_index, u8 perm_addr[ETH_ALEN])</div><div class='ctx'> {</div><div class='ctx'> 	struct devlink_port_attrs attrs = {};</div><div class='ctx'> 	struct nsim_dev_port *nsim_dev_port;</div><div class='hunk'>@@ -1390,7 +1490,7 @@ static int __nsim_dev_port_add(struct nsim_dev *nsim_dev, enum nsim_dev_port_typ</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_dl_port_unregister;</div><div class='ctx'> </div><div class='del'>-	nsim_dev_port-&gt;ns = nsim_create(nsim_dev, nsim_dev_port);</div><div class='add'>+	nsim_dev_port-&gt;ns = nsim_create(nsim_dev, nsim_dev_port, perm_addr);</div><div class='ctx'> 	if (IS_ERR(nsim_dev_port-&gt;ns)) {</div><div class='ctx'> 		err = PTR_ERR(nsim_dev_port-&gt;ns);</div><div class='ctx'> 		goto err_port_debugfs_exit;</div><div class='hunk'>@@ -1446,7 +1546,7 @@ static int nsim_dev_port_add_all(struct nsim_dev *nsim_dev,</div><div class='ctx'> 	int i, err;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; port_count; i++) {</div><div class='del'>-		err = __nsim_dev_port_add(nsim_dev, NSIM_DEV_PORT_TYPE_PF, i);</div><div class='add'>+		err = __nsim_dev_port_add(nsim_dev, NSIM_DEV_PORT_TYPE_PF, i, NULL);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_port_del_all;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1542,8 +1642,10 @@ int nsim_drv_probe(struct nsim_bus_dev *nsim_bus_dev)</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;nsim_dev-&gt;port_list);</div><div class='ctx'> 	nsim_dev-&gt;fw_update_status = true;</div><div class='ctx'> 	nsim_dev-&gt;fw_update_overwrite_mask = 0;</div><div class='add'>+	nsim_dev-&gt;fw_update_flash_chunk_time_ms = NSIM_DEV_FLASH_CHUNK_TIME_MS_DEFAULT;</div><div class='ctx'> 	nsim_dev-&gt;max_macs = NSIM_DEV_MAX_MACS_DEFAULT;</div><div class='ctx'> 	nsim_dev-&gt;test1 = NSIM_DEV_TEST1_DEFAULT;</div><div class='add'>+	nsim_dev-&gt;test2 = NSIM_DEV_TEST2_DEFAULT;</div><div class='ctx'> 	spin_lock_init(&amp;nsim_dev-&gt;fa_cookie_lock);</div><div class='ctx'> </div><div class='ctx'> 	dev_set_drvdata(&amp;nsim_bus_dev-&gt;dev, nsim_dev);</div><div class='hunk'>@@ -1702,7 +1804,7 @@ __nsim_dev_port_lookup(struct nsim_dev *nsim_dev, enum nsim_dev_port_type type,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int nsim_drv_port_add(struct nsim_bus_dev *nsim_bus_dev, enum nsim_dev_port_type type,</div><div class='del'>-		      unsigned int port_index)</div><div class='add'>+		      unsigned int port_index, u8 perm_addr[ETH_ALEN])</div><div class='ctx'> {</div><div class='ctx'> 	struct nsim_dev *nsim_dev = dev_get_drvdata(&amp;nsim_bus_dev-&gt;dev);</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1711,7 +1813,7 @@ int nsim_drv_port_add(struct nsim_bus_dev *nsim_bus_dev, enum nsim_dev_port_type</div><div class='ctx'> 	if (__nsim_dev_port_lookup(nsim_dev, type, port_index))</div><div class='ctx'> 		err = -EEXIST;</div><div class='ctx'> 	else</div><div class='del'>-		err = __nsim_dev_port_add(nsim_dev, type, port_index);</div><div class='add'>+		err = __nsim_dev_port_add(nsim_dev, type, port_index, perm_addr);</div><div class='ctx'> 	devl_unlock(priv_to_devlink(nsim_dev));</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/netdevsim/ethtool.c b/drivers/net/netdevsim/ethtool.c<br/>index 5fe1eaef99b5..36a201533aae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/ethtool.c</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> // Copyright (c) 2020 Facebook</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/random.h&gt;</div><div class='add'>+#include &lt;net/netdev_queues.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "netdevsim.h"</div><div class='ctx'> </div><div class='hunk'>@@ -72,6 +72,10 @@ static void nsim_get_ringparam(struct net_device *dev,</div><div class='ctx'> 	struct netdevsim *ns = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(ring, &amp;ns-&gt;ethtool.ring, sizeof(ns-&gt;ethtool.ring));</div><div class='add'>+	kernel_ring-&gt;hds_thresh_max = NSIM_HDS_THRESHOLD_MAX;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;cfg-&gt;hds_config == ETHTOOL_TCP_DATA_SPLIT_UNKNOWN)</div><div class='add'>+		kernel_ring-&gt;tcp_data_split = ETHTOOL_TCP_DATA_SPLIT_ENABLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int nsim_set_ringparam(struct net_device *dev,</div><div class='hunk'>@@ -97,20 +101,39 @@ nsim_get_channels(struct net_device *dev, struct ethtool_channels *ch)</div><div class='ctx'> 	ch-&gt;combined_count = ns-&gt;ethtool.channels;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+nsim_wake_queues(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdevsim *ns = netdev_priv(dev);</div><div class='add'>+	struct netdevsim *peer;</div><div class='add'>+</div><div class='add'>+	synchronize_net();</div><div class='add'>+	netif_tx_wake_all_queues(dev);</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	peer = rcu_dereference(ns-&gt;peer);</div><div class='add'>+	if (peer)</div><div class='add'>+		netif_tx_wake_all_queues(peer-&gt;netdev);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> nsim_set_channels(struct net_device *dev, struct ethtool_channels *ch)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdevsim *ns = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;dev-&gt;lock);</div><div class='ctx'> 	err = netif_set_real_num_queues(dev, ch-&gt;combined_count,</div><div class='ctx'> 					ch-&gt;combined_count);</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;lock);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	ns-&gt;ethtool.channels = ch-&gt;combined_count;</div><div class='add'>+</div><div class='add'>+	/* Only wake up queues if devices are linked */</div><div class='add'>+	if (rcu_access_pointer(ns-&gt;peer))</div><div class='add'>+		nsim_wake_queues(dev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -142,11 +165,34 @@ nsim_set_fecparam(struct net_device *dev, struct ethtool_fecparam *fecparam)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct ethtool_fec_hist_range netdevsim_fec_ranges[] = {</div><div class='add'>+	{ 0, 0},</div><div class='add'>+	{ 1, 3},</div><div class='add'>+	{ 4, 7},</div><div class='add'>+	{ 0, 0}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void</div><div class='del'>-nsim_get_fec_stats(struct net_device *dev, struct ethtool_fec_stats *fec_stats)</div><div class='add'>+nsim_get_fec_stats(struct net_device *dev, struct ethtool_fec_stats *fec_stats,</div><div class='add'>+		   struct ethtool_fec_hist *hist)</div><div class='ctx'> {</div><div class='add'>+	struct ethtool_fec_hist_value *values = hist-&gt;values;</div><div class='add'>+</div><div class='add'>+	hist-&gt;ranges = netdevsim_fec_ranges;</div><div class='add'>+</div><div class='ctx'> 	fec_stats-&gt;corrected_blocks.total = 123;</div><div class='ctx'> 	fec_stats-&gt;uncorrectable_blocks.total = 4;</div><div class='add'>+</div><div class='add'>+	values[0].per_lane[0] = 125;</div><div class='add'>+	values[0].per_lane[1] = 120;</div><div class='add'>+	values[0].per_lane[2] = 100;</div><div class='add'>+	values[0].per_lane[3] = 100;</div><div class='add'>+	values[1].sum = 12;</div><div class='add'>+	values[2].sum = 2;</div><div class='add'>+	values[2].per_lane[0] = 2;</div><div class='add'>+	values[2].per_lane[1] = 0;</div><div class='add'>+	values[2].per_lane[2] = 0;</div><div class='add'>+	values[2].per_lane[3] = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int nsim_get_ts_info(struct net_device *dev,</div><div class='hunk'>@@ -161,6 +207,8 @@ static int nsim_get_ts_info(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops nsim_ethtool_ops = {</div><div class='ctx'> 	.supported_coalesce_params	= ETHTOOL_COALESCE_ALL_PARAMS,</div><div class='add'>+	.supported_ring_params		= ETHTOOL_RING_USE_TCP_DATA_SPLIT |</div><div class='add'>+					  ETHTOOL_RING_USE_HDS_THRS,</div><div class='ctx'> 	.get_pause_stats	        = nsim_get_pause_stats,</div><div class='ctx'> 	.get_pauseparam		        = nsim_get_pauseparam,</div><div class='ctx'> 	.set_pauseparam		        = nsim_set_pauseparam,</div><div class='hunk'>@@ -178,9 +226,11 @@ static const struct ethtool_ops nsim_ethtool_ops = {</div><div class='ctx'> </div><div class='ctx'> static void nsim_ethtool_ring_init(struct netdevsim *ns)</div><div class='ctx'> {</div><div class='add'>+	ns-&gt;ethtool.ring.rx_pending = 512;</div><div class='ctx'> 	ns-&gt;ethtool.ring.rx_max_pending = 4096;</div><div class='ctx'> 	ns-&gt;ethtool.ring.rx_jumbo_max_pending = 4096;</div><div class='ctx'> 	ns-&gt;ethtool.ring.rx_mini_max_pending = 4096;</div><div class='add'>+	ns-&gt;ethtool.ring.tx_pending = 512;</div><div class='ctx'> 	ns-&gt;ethtool.ring.tx_max_pending = 4096;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/netdevsim/health.c b/drivers/net/netdevsim/health.c<br/>index 70e8bdf34be9..3bd0e7a489c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/health.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/health.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/health.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/health.c</a></div><div class='hunk'>@@ -149,6 +149,8 @@ static ssize_t nsim_dev_health_break_write(struct file *file,</div><div class='ctx'> 	char *break_msg;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	if (count == 0 || count &gt; PAGE_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	break_msg = memdup_user_nul(data, count);</div><div class='ctx'> 	if (IS_ERR(break_msg))</div><div class='ctx'> 		return PTR_ERR(break_msg);</div><div class='hunk'>@@ -181,14 +183,14 @@ int nsim_dev_health_init(struct nsim_dev *nsim_dev, struct devlink *devlink)</div><div class='ctx'> 	health-&gt;empty_reporter =</div><div class='ctx'> 		devl_health_reporter_create(devlink,</div><div class='ctx'> 					    &amp;nsim_dev_empty_reporter_ops,</div><div class='del'>-					    0, health);</div><div class='add'>+					    health);</div><div class='ctx'> 	if (IS_ERR(health-&gt;empty_reporter))</div><div class='ctx'> 		return PTR_ERR(health-&gt;empty_reporter);</div><div class='ctx'> </div><div class='ctx'> 	health-&gt;dummy_reporter =</div><div class='ctx'> 		devl_health_reporter_create(devlink,</div><div class='ctx'> 					    &amp;nsim_dev_dummy_reporter_ops,</div><div class='del'>-					    0, health);</div><div class='add'>+					    health);</div><div class='ctx'> 	if (IS_ERR(health-&gt;dummy_reporter)) {</div><div class='ctx'> 		err = PTR_ERR(health-&gt;dummy_reporter);</div><div class='ctx'> 		goto err_empty_reporter_destroy;</div><div class='head'>diff --git a/drivers/net/netdevsim/hwstats.c b/drivers/net/netdevsim/hwstats.c<br/>index 0e58aa7f0374..1abe48e35ca3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/hwstats.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/hwstats.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/hwstats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/hwstats.c</a></div><div class='hunk'>@@ -220,7 +220,6 @@ nsim_dev_hwstats_enable_ifindex(struct nsim_dev_hwstats *hwstats,</div><div class='ctx'> 	struct nsim_dev_hwstats_netdev *hwsdev;</div><div class='ctx'> 	struct nsim_dev *nsim_dev;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='del'>-	bool notify = false;</div><div class='ctx'> 	struct net *net;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -251,11 +250,9 @@ nsim_dev_hwstats_enable_ifindex(struct nsim_dev_hwstats *hwstats,</div><div class='ctx'> </div><div class='ctx'> 	if (netdev_offload_xstats_enabled(netdev, type)) {</div><div class='ctx'> 		nsim_dev_hwsdev_enable(hwsdev, NULL);</div><div class='del'>-		notify = true;</div><div class='add'>+		rtnl_offload_xstats_notify(netdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (notify)</div><div class='del'>-		rtnl_offload_xstats_notify(netdev);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> 	return err;</div><div class='ctx'> </div><div class='hunk'>@@ -331,7 +328,6 @@ enum nsim_dev_hwstats_do {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct nsim_dev_hwstats_fops {</div><div class='del'>-	const struct file_operations fops;</div><div class='ctx'> 	enum nsim_dev_hwstats_do action;</div><div class='ctx'> 	enum netdev_offload_xstats_type type;</div><div class='ctx'> };</div><div class='hunk'>@@ -342,13 +338,12 @@ nsim_dev_hwstats_do_write(struct file *file,</div><div class='ctx'> 			  size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct nsim_dev_hwstats *hwstats = file-&gt;private_data;</div><div class='del'>-	struct nsim_dev_hwstats_fops *hwsfops;</div><div class='add'>+	const struct nsim_dev_hwstats_fops *hwsfops;</div><div class='ctx'> 	struct list_head *hwsdev_list;</div><div class='ctx'> 	int ifindex;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	hwsfops = container_of(debugfs_real_fops(file),</div><div class='del'>-			       struct nsim_dev_hwstats_fops, fops);</div><div class='add'>+	hwsfops = debugfs_get_aux(file);</div><div class='ctx'> </div><div class='ctx'> 	err = kstrtoint_from_user(data, count, 0, &amp;ifindex);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -381,14 +376,13 @@ nsim_dev_hwstats_do_write(struct file *file,</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct debugfs_short_fops debugfs_ops = {</div><div class='add'>+	.write = nsim_dev_hwstats_do_write,</div><div class='add'>+	.llseek = generic_file_llseek,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define NSIM_DEV_HWSTATS_FOPS(ACTION, TYPE)			\</div><div class='ctx'> 	{							\</div><div class='del'>-		.fops = {					\</div><div class='del'>-			.open = simple_open,			\</div><div class='del'>-			.write = nsim_dev_hwstats_do_write,	\</div><div class='del'>-			.llseek = generic_file_llseek,		\</div><div class='del'>-			.owner = THIS_MODULE,			\</div><div class='del'>-		},						\</div><div class='ctx'> 		.action = ACTION,				\</div><div class='ctx'> 		.type = TYPE,					\</div><div class='ctx'> 	}</div><div class='hunk'>@@ -433,12 +427,12 @@ int nsim_dev_hwstats_init(struct nsim_dev *nsim_dev)</div><div class='ctx'> 		goto err_remove_hwstats_recursive;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	debugfs_create_file("enable_ifindex", 0200, hwstats-&gt;l3_ddir, hwstats,</div><div class='del'>-			    &amp;nsim_dev_hwstats_l3_enable_fops.fops);</div><div class='del'>-	debugfs_create_file("disable_ifindex", 0200, hwstats-&gt;l3_ddir, hwstats,</div><div class='del'>-			    &amp;nsim_dev_hwstats_l3_disable_fops.fops);</div><div class='del'>-	debugfs_create_file("fail_next_enable", 0200, hwstats-&gt;l3_ddir, hwstats,</div><div class='del'>-			    &amp;nsim_dev_hwstats_l3_fail_fops.fops);</div><div class='add'>+	debugfs_create_file_aux("enable_ifindex", 0200, hwstats-&gt;l3_ddir, hwstats,</div><div class='add'>+			    &amp;nsim_dev_hwstats_l3_enable_fops, &amp;debugfs_ops);</div><div class='add'>+	debugfs_create_file_aux("disable_ifindex", 0200, hwstats-&gt;l3_ddir, hwstats,</div><div class='add'>+			    &amp;nsim_dev_hwstats_l3_disable_fops, &amp;debugfs_ops);</div><div class='add'>+	debugfs_create_file_aux("fail_next_enable", 0200, hwstats-&gt;l3_ddir, hwstats,</div><div class='add'>+			    &amp;nsim_dev_hwstats_l3_fail_fops, &amp;debugfs_ops);</div><div class='ctx'> </div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;hwstats-&gt;traffic_dw,</div><div class='ctx'> 			  &amp;nsim_dev_hwstats_traffic_work);</div><div class='head'>diff --git a/drivers/net/netdevsim/ipsec.c b/drivers/net/netdevsim/ipsec.c<br/>index 88187dd4eb2d..36a1be4923d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/ipsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/ipsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/ipsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/ipsec.c</a></div><div class='hunk'>@@ -85,11 +85,11 @@ static int nsim_ipsec_find_empty_idx(struct nsim_ipsec *ipsec)</div><div class='ctx'> 	return -ENOSPC;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nsim_ipsec_parse_proto_keys(struct xfrm_state *xs,</div><div class='add'>+static int nsim_ipsec_parse_proto_keys(struct net_device *dev,</div><div class='add'>+				       struct xfrm_state *xs,</div><div class='ctx'> 				       u32 *mykey, u32 *mysalt)</div><div class='ctx'> {</div><div class='ctx'> 	const char aes_gcm_name[] = "rfc4106(gcm(aes))";</div><div class='del'>-	struct net_device *dev = xs-&gt;xso.real_dev;</div><div class='ctx'> 	unsigned char *key_data;</div><div class='ctx'> 	char *alg_name = NULL;</div><div class='ctx'> 	int key_len;</div><div class='hunk'>@@ -129,17 +129,16 @@ static int nsim_ipsec_parse_proto_keys(struct xfrm_state *xs,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nsim_ipsec_add_sa(struct xfrm_state *xs,</div><div class='add'>+static int nsim_ipsec_add_sa(struct net_device *dev,</div><div class='add'>+			     struct xfrm_state *xs,</div><div class='ctx'> 			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct nsim_ipsec *ipsec;</div><div class='del'>-	struct net_device *dev;</div><div class='ctx'> 	struct netdevsim *ns;</div><div class='ctx'> 	struct nsim_sa sa;</div><div class='ctx'> 	u16 sa_idx;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	dev = xs-&gt;xso.real_dev;</div><div class='ctx'> 	ns = netdev_priv(dev);</div><div class='ctx'> 	ipsec = &amp;ns-&gt;ipsec;</div><div class='ctx'> </div><div class='hunk'>@@ -174,7 +173,7 @@ static int nsim_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> 		sa.crypt = xs-&gt;ealg || xs-&gt;aead;</div><div class='ctx'> </div><div class='ctx'> 	/* get the key and salt */</div><div class='del'>-	ret = nsim_ipsec_parse_proto_keys(xs, sa.key, &amp;sa.salt);</div><div class='add'>+	ret = nsim_ipsec_parse_proto_keys(dev, xs, sa.key, &amp;sa.salt);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		NL_SET_ERR_MSG_MOD(extack, "Failed to get key data for SA table");</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -200,9 +199,9 @@ static int nsim_ipsec_add_sa(struct xfrm_state *xs,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void nsim_ipsec_del_sa(struct xfrm_state *xs)</div><div class='add'>+static void nsim_ipsec_del_sa(struct net_device *dev, struct xfrm_state *xs)</div><div class='ctx'> {</div><div class='del'>-	struct netdevsim *ns = netdev_priv(xs-&gt;xso.real_dev);</div><div class='add'>+	struct netdevsim *ns = netdev_priv(dev);</div><div class='ctx'> 	struct nsim_ipsec *ipsec = &amp;ns-&gt;ipsec;</div><div class='ctx'> 	u16 sa_idx;</div><div class='ctx'> </div><div class='hunk'>@@ -217,20 +216,9 @@ static void nsim_ipsec_del_sa(struct xfrm_state *xs)</div><div class='ctx'> 	ipsec-&gt;count--;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool nsim_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *xs)</div><div class='del'>-{</div><div class='del'>-	struct netdevsim *ns = netdev_priv(xs-&gt;xso.real_dev);</div><div class='del'>-	struct nsim_ipsec *ipsec = &amp;ns-&gt;ipsec;</div><div class='del'>-</div><div class='del'>-	ipsec-&gt;ok++;</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct xfrmdev_ops nsim_xfrmdev_ops = {</div><div class='ctx'> 	.xdo_dev_state_add	= nsim_ipsec_add_sa,</div><div class='ctx'> 	.xdo_dev_state_delete	= nsim_ipsec_del_sa,</div><div class='del'>-	.xdo_dev_offload_ok	= nsim_ipsec_offload_ok,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> bool nsim_ipsec_tx(struct netdevsim *ns, struct sk_buff *skb)</div><div class='hunk'>@@ -289,6 +277,7 @@ void nsim_ipsec_init(struct netdevsim *ns)</div><div class='ctx'> 				 NETIF_F_GSO_ESP)</div><div class='ctx'> </div><div class='ctx'> 	ns-&gt;netdev-&gt;features |= NSIM_ESP_FEATURES;</div><div class='add'>+	ns-&gt;netdev-&gt;hw_features |= NSIM_ESP_FEATURES;</div><div class='ctx'> 	ns-&gt;netdev-&gt;hw_enc_features |= NSIM_ESP_FEATURES;</div><div class='ctx'> </div><div class='ctx'> 	ns-&gt;ipsec.pfile = debugfs_create_file("ipsec", 0400,</div><div class='head'>diff --git a/drivers/net/netdevsim/netdev.c b/drivers/net/netdevsim/netdev.c<br/>index cad85bb0cf54..6927c1962277 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/netdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/netdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/netdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/netdev.c</a></div><div class='hunk'>@@ -15,23 +15,75 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/ethtool_netlink.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;net/netdev_queues.h&gt;</div><div class='add'>+#include &lt;net/netdev_rx_queue.h&gt;</div><div class='ctx'> #include &lt;net/page_pool/helpers.h&gt;</div><div class='ctx'> #include &lt;net/netlink.h&gt;</div><div class='ctx'> #include &lt;net/net_shaper.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/pkt_cls.h&gt;</div><div class='ctx'> #include &lt;net/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;net/udp_tunnel.h&gt;</div><div class='add'>+#include &lt;net/busy_poll.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "netdevsim.h"</div><div class='ctx'> </div><div class='add'>+MODULE_IMPORT_NS("NETDEV_INTERNAL");</div><div class='add'>+</div><div class='ctx'> #define NSIM_RING_SIZE		256</div><div class='ctx'> </div><div class='del'>-static int nsim_napi_rx(struct nsim_rq *rq, struct sk_buff *skb)</div><div class='add'>+static void nsim_start_peer_tx_queue(struct net_device *dev, struct nsim_rq *rq)</div><div class='add'>+{</div><div class='add'>+	struct netdevsim *ns = netdev_priv(dev);</div><div class='add'>+	struct net_device *peer_dev;</div><div class='add'>+	struct netdevsim *peer_ns;</div><div class='add'>+	struct netdev_queue *txq;</div><div class='add'>+	u16 idx;</div><div class='add'>+</div><div class='add'>+	idx = rq-&gt;napi.index;</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	peer_ns = rcu_dereference(ns-&gt;peer);</div><div class='add'>+	if (!peer_ns)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* TX device */</div><div class='add'>+	peer_dev = peer_ns-&gt;netdev;</div><div class='add'>+	if (dev-&gt;real_num_tx_queues != peer_dev-&gt;num_rx_queues)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	txq = netdev_get_tx_queue(peer_dev, idx);</div><div class='add'>+	if (!netif_tx_queue_stopped(txq))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	netif_tx_wake_queue(txq);</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nsim_stop_tx_queue(struct net_device *tx_dev,</div><div class='add'>+			       struct net_device *rx_dev,</div><div class='add'>+			       struct nsim_rq *rq,</div><div class='add'>+			       u16 idx)</div><div class='add'>+{</div><div class='add'>+	/* If different queues size, do not stop, since it is not</div><div class='add'>+	 * easy to find which TX queue is mapped here</div><div class='add'>+	 */</div><div class='add'>+	if (rx_dev-&gt;real_num_tx_queues != tx_dev-&gt;num_rx_queues)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* rq is the queue on the receive side */</div><div class='add'>+	netif_subqueue_try_stop(tx_dev, idx,</div><div class='add'>+				NSIM_RING_SIZE - skb_queue_len(&amp;rq-&gt;skb_queue),</div><div class='add'>+				NSIM_RING_SIZE / 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nsim_napi_rx(struct net_device *tx_dev, struct net_device *rx_dev,</div><div class='add'>+			struct nsim_rq *rq, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	if (skb_queue_len(&amp;rq-&gt;skb_queue) &gt; NSIM_RING_SIZE) {</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='hunk'>@@ -39,58 +91,94 @@ static int nsim_napi_rx(struct nsim_rq *rq, struct sk_buff *skb)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	skb_queue_tail(&amp;rq-&gt;skb_queue, skb);</div><div class='add'>+</div><div class='add'>+	/* Stop the peer TX queue avoiding dropping packets later */</div><div class='add'>+	if (skb_queue_len(&amp;rq-&gt;skb_queue) &gt;= NSIM_RING_SIZE)</div><div class='add'>+		nsim_stop_tx_queue(tx_dev, rx_dev, rq,</div><div class='add'>+				   skb_get_queue_mapping(skb));</div><div class='add'>+</div><div class='ctx'> 	return NET_RX_SUCCESS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nsim_forward_skb(struct net_device *dev, struct sk_buff *skb,</div><div class='del'>-			    struct nsim_rq *rq)</div><div class='add'>+static int nsim_forward_skb(struct net_device *tx_dev,</div><div class='add'>+			    struct net_device *rx_dev,</div><div class='add'>+			    struct sk_buff *skb,</div><div class='add'>+			    struct nsim_rq *rq,</div><div class='add'>+			    struct skb_ext *psp_ext)</div><div class='ctx'> {</div><div class='del'>-	return __dev_forward_skb(dev, skb) ?: nsim_napi_rx(rq, skb);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = __dev_forward_skb(rx_dev, skb);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	nsim_psp_handle_ext(skb, psp_ext);</div><div class='add'>+</div><div class='add'>+	return nsim_napi_rx(tx_dev, rx_dev, rq, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t nsim_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdevsim *ns = netdev_priv(dev);</div><div class='add'>+	struct skb_ext *psp_ext = NULL;</div><div class='ctx'> 	struct net_device *peer_dev;</div><div class='ctx'> 	unsigned int len = skb-&gt;len;</div><div class='ctx'> 	struct netdevsim *peer_ns;</div><div class='add'>+	struct netdev_config *cfg;</div><div class='ctx'> 	struct nsim_rq *rq;</div><div class='ctx'> 	int rxq;</div><div class='add'>+	int dr;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	if (!nsim_ipsec_tx(ns, skb))</div><div class='del'>-		goto out_drop_free;</div><div class='add'>+		goto out_drop_any;</div><div class='ctx'> </div><div class='del'>-	peer_ns = rcu_dereference(ns-&gt;peer);</div><div class='del'>-	if (!peer_ns)</div><div class='add'>+	/* Check if loopback mode is enabled */</div><div class='add'>+	if (dev-&gt;features &amp; NETIF_F_LOOPBACK) {</div><div class='add'>+		peer_ns = ns;</div><div class='add'>+		peer_dev = dev;</div><div class='add'>+	} else {</div><div class='add'>+		peer_ns = rcu_dereference(ns-&gt;peer);</div><div class='add'>+		if (!peer_ns)</div><div class='add'>+			goto out_drop_any;</div><div class='add'>+		peer_dev = peer_ns-&gt;netdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dr = nsim_do_psp(skb, ns, peer_ns, &amp;psp_ext);</div><div class='add'>+	if (dr)</div><div class='ctx'> 		goto out_drop_free;</div><div class='ctx'> </div><div class='del'>-	peer_dev = peer_ns-&gt;netdev;</div><div class='ctx'> 	rxq = skb_get_queue_mapping(skb);</div><div class='ctx'> 	if (rxq &gt;= peer_dev-&gt;num_rx_queues)</div><div class='ctx'> 		rxq = rxq % peer_dev-&gt;num_rx_queues;</div><div class='del'>-	rq = &amp;peer_ns-&gt;rq[rxq];</div><div class='add'>+	rq = peer_ns-&gt;rq[rxq];</div><div class='add'>+</div><div class='add'>+	cfg = peer_dev-&gt;cfg;</div><div class='add'>+	if (skb_is_nonlinear(skb) &amp;&amp;</div><div class='add'>+	    (cfg-&gt;hds_config != ETHTOOL_TCP_DATA_SPLIT_ENABLED ||</div><div class='add'>+	     (cfg-&gt;hds_config == ETHTOOL_TCP_DATA_SPLIT_ENABLED &amp;&amp;</div><div class='add'>+	      cfg-&gt;hds_thresh &gt; len)))</div><div class='add'>+		skb_linearize(skb);</div><div class='ctx'> </div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='del'>-	if (unlikely(nsim_forward_skb(peer_dev, skb, rq) == NET_RX_DROP))</div><div class='add'>+	if (unlikely(nsim_forward_skb(dev, peer_dev,</div><div class='add'>+				      skb, rq, psp_ext) == NET_RX_DROP))</div><div class='ctx'> 		goto out_drop_cnt;</div><div class='ctx'> </div><div class='del'>-	napi_schedule(&amp;rq-&gt;napi);</div><div class='add'>+	if (!hrtimer_active(&amp;rq-&gt;napi_timer))</div><div class='add'>+		hrtimer_start(&amp;rq-&gt;napi_timer, us_to_ktime(5), HRTIMER_MODE_REL);</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_unlock();</div><div class='del'>-	u64_stats_update_begin(&amp;ns-&gt;syncp);</div><div class='del'>-	ns-&gt;tx_packets++;</div><div class='del'>-	ns-&gt;tx_bytes += len;</div><div class='del'>-	u64_stats_update_end(&amp;ns-&gt;syncp);</div><div class='add'>+	dev_dstats_tx_add(dev, len);</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='add'>+out_drop_any:</div><div class='add'>+	dr = SKB_DROP_REASON_NOT_SPECIFIED;</div><div class='ctx'> out_drop_free:</div><div class='del'>-	dev_kfree_skb(skb);</div><div class='add'>+	kfree_skb_reason(skb, dr);</div><div class='ctx'> out_drop_cnt:</div><div class='ctx'> 	rcu_read_unlock();</div><div class='del'>-	u64_stats_update_begin(&amp;ns-&gt;syncp);</div><div class='del'>-	ns-&gt;tx_dropped++;</div><div class='del'>-	u64_stats_update_end(&amp;ns-&gt;syncp);</div><div class='add'>+	dev_dstats_tx_dropped(dev);</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -102,7 +190,8 @@ static int nsim_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdevsim *ns = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (ns-&gt;xdp.prog &amp;&amp; new_mtu &gt; NSIM_XDP_MAX_MTU)</div><div class='add'>+	if (ns-&gt;xdp.prog &amp;&amp; !ns-&gt;xdp.prog-&gt;aux-&gt;xdp_has_frags &amp;&amp;</div><div class='add'>+	    new_mtu &gt; NSIM_XDP_MAX_MTU)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='hunk'>@@ -110,20 +199,6 @@ static int nsim_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-nsim_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)</div><div class='del'>-{</div><div class='del'>-	struct netdevsim *ns = netdev_priv(dev);</div><div class='del'>-	unsigned int start;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		start = u64_stats_fetch_begin(&amp;ns-&gt;syncp);</div><div class='del'>-		stats-&gt;tx_bytes = ns-&gt;tx_bytes;</div><div class='del'>-		stats-&gt;tx_packets = ns-&gt;tx_packets;</div><div class='del'>-		stats-&gt;tx_dropped = ns-&gt;tx_dropped;</div><div class='del'>-	} while (u64_stats_fetch_retry(&amp;ns-&gt;syncp, start));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int</div><div class='ctx'> nsim_setup_tc_block_cb(enum tc_setup_type type, void *type_data, void *cb_priv)</div><div class='ctx'> {</div><div class='hunk'>@@ -334,17 +409,41 @@ static int nsim_get_iflink(const struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static int nsim_rcv(struct nsim_rq *rq, int budget)</div><div class='ctx'> {</div><div class='add'>+	struct net_device *dev = rq-&gt;napi.dev;</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='add'>+	struct netdevsim *ns;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	int i;</div><div class='add'>+	unsigned int skblen;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	ns = netdev_priv(dev);</div><div class='add'>+	xdp_prog = READ_ONCE(ns-&gt;xdp.prog);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; budget; i++) {</div><div class='ctx'> 		if (skb_queue_empty(&amp;rq-&gt;skb_queue))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		skb = skb_dequeue(&amp;rq-&gt;skb_queue);</div><div class='del'>-		netif_receive_skb(skb);</div><div class='add'>+</div><div class='add'>+		if (xdp_prog) {</div><div class='add'>+			/* skb might be freed directly by XDP, save the len */</div><div class='add'>+			skblen = skb-&gt;len;</div><div class='add'>+</div><div class='add'>+			if (skb-&gt;ip_summed == CHECKSUM_PARTIAL)</div><div class='add'>+				skb_checksum_help(skb);</div><div class='add'>+			ret = do_xdp_generic(xdp_prog, &amp;skb);</div><div class='add'>+			if (ret != XDP_PASS) {</div><div class='add'>+				dev_dstats_rx_add(dev, skblen);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* skb might be discard at netif_receive_skb, save the len */</div><div class='add'>+		dev_dstats_rx_add(dev, skb-&gt;len);</div><div class='add'>+		napi_gro_receive(&amp;rq-&gt;napi, skb);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	nsim_start_peer_tx_queue(dev, rq);</div><div class='ctx'> 	return i;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -354,30 +453,30 @@ static int nsim_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	int done;</div><div class='ctx'> </div><div class='ctx'> 	done = nsim_rcv(rq, budget);</div><div class='del'>-	napi_complete(napi);</div><div class='add'>+	if (done &lt; budget)</div><div class='add'>+		napi_complete_done(napi, done);</div><div class='ctx'> </div><div class='ctx'> 	return done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nsim_create_page_pool(struct nsim_rq *rq)</div><div class='add'>+static int nsim_create_page_pool(struct page_pool **p, struct napi_struct *napi)</div><div class='ctx'> {</div><div class='del'>-	struct page_pool_params p = {</div><div class='add'>+	struct page_pool_params params = {</div><div class='ctx'> 		.order = 0,</div><div class='ctx'> 		.pool_size = NSIM_RING_SIZE,</div><div class='ctx'> 		.nid = NUMA_NO_NODE,</div><div class='del'>-		.dev = &amp;rq-&gt;napi.dev-&gt;dev,</div><div class='del'>-		.napi = &amp;rq-&gt;napi,</div><div class='add'>+		.dev = &amp;napi-&gt;dev-&gt;dev,</div><div class='add'>+		.napi = napi,</div><div class='ctx'> 		.dma_dir = DMA_BIDIRECTIONAL,</div><div class='del'>-		.netdev = rq-&gt;napi.dev,</div><div class='add'>+		.netdev = napi-&gt;dev,</div><div class='ctx'> 	};</div><div class='add'>+	struct page_pool *pool;</div><div class='ctx'> </div><div class='del'>-	rq-&gt;page_pool = page_pool_create(&amp;p);</div><div class='del'>-	if (IS_ERR(rq-&gt;page_pool)) {</div><div class='del'>-		int err = PTR_ERR(rq-&gt;page_pool);</div><div class='add'>+	pool = page_pool_create(&amp;params);</div><div class='add'>+	if (IS_ERR(pool))</div><div class='add'>+		return PTR_ERR(pool);</div><div class='ctx'> </div><div class='del'>-		rq-&gt;page_pool = NULL;</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='add'>+	*p = pool;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -388,15 +487,15 @@ static int nsim_init_napi(struct netdevsim *ns)</div><div class='ctx'> 	int err, i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;num_rx_queues; i++) {</div><div class='del'>-		rq = &amp;ns-&gt;rq[i];</div><div class='add'>+		rq = ns-&gt;rq[i];</div><div class='ctx'> </div><div class='del'>-		netif_napi_add(dev, &amp;rq-&gt;napi, nsim_poll);</div><div class='add'>+		netif_napi_add_config_locked(dev, &amp;rq-&gt;napi, nsim_poll, i);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;num_rx_queues; i++) {</div><div class='del'>-		rq = &amp;ns-&gt;rq[i];</div><div class='add'>+		rq = ns-&gt;rq[i];</div><div class='ctx'> </div><div class='del'>-		err = nsim_create_page_pool(rq);</div><div class='add'>+		err = nsim_create_page_pool(&amp;rq-&gt;page_pool, &amp;rq-&gt;napi);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_pp_destroy;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -405,40 +504,65 @@ static int nsim_init_napi(struct netdevsim *ns)</div><div class='ctx'> </div><div class='ctx'> err_pp_destroy:</div><div class='ctx'> 	while (i--) {</div><div class='del'>-		page_pool_destroy(ns-&gt;rq[i].page_pool);</div><div class='del'>-		ns-&gt;rq[i].page_pool = NULL;</div><div class='add'>+		page_pool_destroy(ns-&gt;rq[i]-&gt;page_pool);</div><div class='add'>+		ns-&gt;rq[i]-&gt;page_pool = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;num_rx_queues; i++)</div><div class='del'>-		__netif_napi_del(&amp;ns-&gt;rq[i].napi);</div><div class='add'>+		__netif_napi_del_locked(&amp;ns-&gt;rq[i]-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static enum hrtimer_restart nsim_napi_schedule(struct hrtimer *timer)</div><div class='add'>+{</div><div class='add'>+	struct nsim_rq *rq;</div><div class='add'>+</div><div class='add'>+	rq = container_of(timer, struct nsim_rq, napi_timer);</div><div class='add'>+	napi_schedule(&amp;rq-&gt;napi);</div><div class='add'>+</div><div class='add'>+	return HRTIMER_NORESTART;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nsim_rq_timer_init(struct nsim_rq *rq)</div><div class='add'>+{</div><div class='add'>+	hrtimer_setup(&amp;rq-&gt;napi_timer, nsim_napi_schedule, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void nsim_enable_napi(struct netdevsim *ns)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = ns-&gt;netdev;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;num_rx_queues; i++) {</div><div class='del'>-		struct nsim_rq *rq = &amp;ns-&gt;rq[i];</div><div class='add'>+		struct nsim_rq *rq = ns-&gt;rq[i];</div><div class='ctx'> </div><div class='ctx'> 		netif_queue_set_napi(dev, i, NETDEV_QUEUE_TYPE_RX, &amp;rq-&gt;napi);</div><div class='del'>-		napi_enable(&amp;rq-&gt;napi);</div><div class='add'>+		napi_enable_locked(&amp;rq-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int nsim_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdevsim *ns = netdev_priv(dev);</div><div class='add'>+	struct netdevsim *peer;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(dev);</div><div class='add'>+</div><div class='ctx'> 	err = nsim_init_napi(ns);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	nsim_enable_napi(ns);</div><div class='ctx'> </div><div class='add'>+	peer = rtnl_dereference(ns-&gt;peer);</div><div class='add'>+	if (peer &amp;&amp; netif_running(peer-&gt;netdev)) {</div><div class='add'>+		netif_carrier_on(dev);</div><div class='add'>+		netif_carrier_on(peer-&gt;netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -448,16 +572,16 @@ static void nsim_del_napi(struct netdevsim *ns)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;num_rx_queues; i++) {</div><div class='del'>-		struct nsim_rq *rq = &amp;ns-&gt;rq[i];</div><div class='add'>+		struct nsim_rq *rq = ns-&gt;rq[i];</div><div class='ctx'> </div><div class='del'>-		napi_disable(&amp;rq-&gt;napi);</div><div class='del'>-		__netif_napi_del(&amp;rq-&gt;napi);</div><div class='add'>+		napi_disable_locked(&amp;rq-&gt;napi);</div><div class='add'>+		__netif_napi_del_locked(&amp;rq-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> 	synchronize_net();</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;num_rx_queues; i++) {</div><div class='del'>-		page_pool_destroy(ns-&gt;rq[i].page_pool);</div><div class='del'>-		ns-&gt;rq[i].page_pool = NULL;</div><div class='add'>+		page_pool_destroy(ns-&gt;rq[i]-&gt;page_pool);</div><div class='add'>+		ns-&gt;rq[i]-&gt;page_pool = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -466,6 +590,8 @@ static int nsim_stop(struct net_device *dev)</div><div class='ctx'> 	struct netdevsim *ns = netdev_priv(dev);</div><div class='ctx'> 	struct netdevsim *peer;</div><div class='ctx'> </div><div class='add'>+	netdev_assert_locked(dev);</div><div class='add'>+</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> 	peer = rtnl_dereference(ns-&gt;peer);</div><div class='ctx'> 	if (peer)</div><div class='hunk'>@@ -519,7 +645,6 @@ static const struct net_device_ops nsim_netdev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_change_mtu		= nsim_change_mtu,</div><div class='del'>-	.ndo_get_stats64	= nsim_get_stats64,</div><div class='ctx'> 	.ndo_set_vf_mac		= nsim_set_vf_mac,</div><div class='ctx'> 	.ndo_set_vf_vlan	= nsim_set_vf_vlan,</div><div class='ctx'> 	.ndo_set_vf_rate	= nsim_set_vf_rate,</div><div class='hunk'>@@ -543,7 +668,6 @@ static const struct net_device_ops nsim_vf_netdev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_change_mtu		= nsim_change_mtu,</div><div class='del'>-	.ndo_get_stats64	= nsim_get_stats64,</div><div class='ctx'> 	.ndo_setup_tc		= nsim_setup_tc,</div><div class='ctx'> 	.ndo_set_features	= nsim_set_features,</div><div class='ctx'> };</div><div class='hunk'>@@ -557,7 +681,7 @@ static void nsim_get_queue_stats_rx(struct net_device *dev, int idx,</div><div class='ctx'> 	struct rtnl_link_stats64 rtstats = {};</div><div class='ctx'> </div><div class='ctx'> 	if (!idx)</div><div class='del'>-		nsim_get_stats64(dev, &amp;rtstats);</div><div class='add'>+		dev_get_stats(dev, &amp;rtstats);</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;packets = rtstats.rx_packets - !!rtstats.rx_packets;</div><div class='ctx'> 	stats-&gt;bytes = rtstats.rx_bytes;</div><div class='hunk'>@@ -569,7 +693,7 @@ static void nsim_get_queue_stats_tx(struct net_device *dev, int idx,</div><div class='ctx'> 	struct rtnl_link_stats64 rtstats = {};</div><div class='ctx'> </div><div class='ctx'> 	if (!idx)</div><div class='del'>-		nsim_get_stats64(dev, &amp;rtstats);</div><div class='add'>+		dev_get_stats(dev, &amp;rtstats);</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;packets = rtstats.tx_packets - !!rtstats.tx_packets;</div><div class='ctx'> 	stats-&gt;bytes = rtstats.tx_bytes;</div><div class='hunk'>@@ -581,7 +705,7 @@ static void nsim_get_base_stats(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct rtnl_link_stats64 rtstats = {};</div><div class='ctx'> </div><div class='del'>-	nsim_get_stats64(dev, &amp;rtstats);</div><div class='add'>+	dev_get_stats(dev, &amp;rtstats);</div><div class='ctx'> </div><div class='ctx'> 	rx-&gt;packets = !!rtstats.rx_packets;</div><div class='ctx'> 	rx-&gt;bytes = 0;</div><div class='hunk'>@@ -595,6 +719,196 @@ static const struct netdev_stat_ops nsim_stat_ops = {</div><div class='ctx'> 	.get_base_stats		= nsim_get_base_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct nsim_rq *nsim_queue_alloc(void)</div><div class='add'>+{</div><div class='add'>+	struct nsim_rq *rq;</div><div class='add'>+</div><div class='add'>+	rq = kzalloc(sizeof(*rq), GFP_KERNEL_ACCOUNT);</div><div class='add'>+	if (!rq)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	skb_queue_head_init(&amp;rq-&gt;skb_queue);</div><div class='add'>+	nsim_rq_timer_init(rq);</div><div class='add'>+	return rq;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nsim_queue_free(struct net_device *dev, struct nsim_rq *rq)</div><div class='add'>+{</div><div class='add'>+	hrtimer_cancel(&amp;rq-&gt;napi_timer);</div><div class='add'>+</div><div class='add'>+	if (rq-&gt;skb_queue.qlen) {</div><div class='add'>+		local_bh_disable();</div><div class='add'>+		dev_dstats_rx_dropped_add(dev, rq-&gt;skb_queue.qlen);</div><div class='add'>+		local_bh_enable();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_queue_purge_reason(&amp;rq-&gt;skb_queue, SKB_DROP_REASON_QUEUE_PURGE);</div><div class='add'>+	kfree(rq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Queue reset mode is controlled by ns-&gt;rq_reset_mode.</div><div class='add'>+ * - normal - new NAPI new pool (old NAPI enabled when new added)</div><div class='add'>+ * - mode 1 - allocate new pool (NAPI is only disabled / enabled)</div><div class='add'>+ * - mode 2 - new NAPI new pool (old NAPI removed before new added)</div><div class='add'>+ * - mode 3 - new NAPI new pool (old NAPI disabled when new added)</div><div class='add'>+ */</div><div class='add'>+struct nsim_queue_mem {</div><div class='add'>+	struct nsim_rq *rq;</div><div class='add'>+	struct page_pool *pp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nsim_queue_mem_alloc(struct net_device *dev, void *per_queue_mem, int idx)</div><div class='add'>+{</div><div class='add'>+	struct nsim_queue_mem *qmem = per_queue_mem;</div><div class='add'>+	struct netdevsim *ns = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (ns-&gt;rq_reset_mode &gt; 3)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (ns-&gt;rq_reset_mode == 1) {</div><div class='add'>+		if (!netif_running(ns-&gt;netdev))</div><div class='add'>+			return -ENETDOWN;</div><div class='add'>+		return nsim_create_page_pool(&amp;qmem-&gt;pp, &amp;ns-&gt;rq[idx]-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qmem-&gt;rq = nsim_queue_alloc();</div><div class='add'>+	if (!qmem-&gt;rq)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = nsim_create_page_pool(&amp;qmem-&gt;rq-&gt;page_pool, &amp;qmem-&gt;rq-&gt;napi);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free;</div><div class='add'>+</div><div class='add'>+	if (!ns-&gt;rq_reset_mode)</div><div class='add'>+		netif_napi_add_config_locked(dev, &amp;qmem-&gt;rq-&gt;napi, nsim_poll,</div><div class='add'>+					     idx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free:</div><div class='add'>+	nsim_queue_free(dev, qmem-&gt;rq);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nsim_queue_mem_free(struct net_device *dev, void *per_queue_mem)</div><div class='add'>+{</div><div class='add'>+	struct nsim_queue_mem *qmem = per_queue_mem;</div><div class='add'>+	struct netdevsim *ns = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	page_pool_destroy(qmem-&gt;pp);</div><div class='add'>+	if (qmem-&gt;rq) {</div><div class='add'>+		if (!ns-&gt;rq_reset_mode)</div><div class='add'>+			netif_napi_del_locked(&amp;qmem-&gt;rq-&gt;napi);</div><div class='add'>+		page_pool_destroy(qmem-&gt;rq-&gt;page_pool);</div><div class='add'>+		nsim_queue_free(dev, qmem-&gt;rq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nsim_queue_start(struct net_device *dev, void *per_queue_mem, int idx)</div><div class='add'>+{</div><div class='add'>+	struct nsim_queue_mem *qmem = per_queue_mem;</div><div class='add'>+	struct netdevsim *ns = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	netdev_assert_locked(dev);</div><div class='add'>+</div><div class='add'>+	if (ns-&gt;rq_reset_mode == 1) {</div><div class='add'>+		ns-&gt;rq[idx]-&gt;page_pool = qmem-&gt;pp;</div><div class='add'>+		napi_enable_locked(&amp;ns-&gt;rq[idx]-&gt;napi);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* netif_napi_add()/_del() should normally be called from alloc/free,</div><div class='add'>+	 * here we want to test various call orders.</div><div class='add'>+	 */</div><div class='add'>+	if (ns-&gt;rq_reset_mode == 2) {</div><div class='add'>+		netif_napi_del_locked(&amp;ns-&gt;rq[idx]-&gt;napi);</div><div class='add'>+		netif_napi_add_config_locked(dev, &amp;qmem-&gt;rq-&gt;napi, nsim_poll,</div><div class='add'>+					     idx);</div><div class='add'>+	} else if (ns-&gt;rq_reset_mode == 3) {</div><div class='add'>+		netif_napi_add_config_locked(dev, &amp;qmem-&gt;rq-&gt;napi, nsim_poll,</div><div class='add'>+					     idx);</div><div class='add'>+		netif_napi_del_locked(&amp;ns-&gt;rq[idx]-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ns-&gt;rq[idx] = qmem-&gt;rq;</div><div class='add'>+	napi_enable_locked(&amp;ns-&gt;rq[idx]-&gt;napi);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nsim_queue_stop(struct net_device *dev, void *per_queue_mem, int idx)</div><div class='add'>+{</div><div class='add'>+	struct nsim_queue_mem *qmem = per_queue_mem;</div><div class='add'>+	struct netdevsim *ns = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	netdev_assert_locked(dev);</div><div class='add'>+</div><div class='add'>+	napi_disable_locked(&amp;ns-&gt;rq[idx]-&gt;napi);</div><div class='add'>+</div><div class='add'>+	if (ns-&gt;rq_reset_mode == 1) {</div><div class='add'>+		qmem-&gt;pp = ns-&gt;rq[idx]-&gt;page_pool;</div><div class='add'>+		page_pool_disable_direct_recycling(qmem-&gt;pp);</div><div class='add'>+	} else {</div><div class='add'>+		qmem-&gt;rq = ns-&gt;rq[idx];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct netdev_queue_mgmt_ops nsim_queue_mgmt_ops = {</div><div class='add'>+	.ndo_queue_mem_size	= sizeof(struct nsim_queue_mem),</div><div class='add'>+	.ndo_queue_mem_alloc	= nsim_queue_mem_alloc,</div><div class='add'>+	.ndo_queue_mem_free	= nsim_queue_mem_free,</div><div class='add'>+	.ndo_queue_start	= nsim_queue_start,</div><div class='add'>+	.ndo_queue_stop		= nsim_queue_stop,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+nsim_qreset_write(struct file *file, const char __user *data,</div><div class='add'>+		  size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct netdevsim *ns = file-&gt;private_data;</div><div class='add'>+	unsigned int queue, mode;</div><div class='add'>+	char buf[32];</div><div class='add'>+	ssize_t ret;</div><div class='add'>+</div><div class='add'>+	if (count &gt;= sizeof(buf))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (copy_from_user(buf, data, count))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	buf[count] = '\0';</div><div class='add'>+</div><div class='add'>+	ret = sscanf(buf, "%u %u", &amp;queue, &amp;mode);</div><div class='add'>+	if (ret != 2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	netdev_lock(ns-&gt;netdev);</div><div class='add'>+	if (queue &gt;= ns-&gt;netdev-&gt;real_num_rx_queues) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto exit_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ns-&gt;rq_reset_mode = mode;</div><div class='add'>+	ret = netdev_rx_queue_restart(ns-&gt;netdev, queue);</div><div class='add'>+	ns-&gt;rq_reset_mode = 0;</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit_unlock;</div><div class='add'>+</div><div class='add'>+	ret = count;</div><div class='add'>+exit_unlock:</div><div class='add'>+	netdev_unlock(ns-&gt;netdev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations nsim_qreset_fops = {</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.write = nsim_qreset_write,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static ssize_t</div><div class='ctx'> nsim_pp_hold_read(struct file *file, char __user *data,</div><div class='ctx'> 		  size_t count, loff_t *ppos)</div><div class='hunk'>@@ -628,17 +942,18 @@ nsim_pp_hold_write(struct file *file, const char __user *data,</div><div class='ctx'> 	if (!netif_running(ns-&gt;netdev) &amp;&amp; val) {</div><div class='ctx'> 		ret = -ENETDOWN;</div><div class='ctx'> 	} else if (val) {</div><div class='del'>-		ns-&gt;page = page_pool_dev_alloc_pages(ns-&gt;rq[0].page_pool);</div><div class='add'>+		ns-&gt;page = page_pool_dev_alloc_pages(ns-&gt;rq[0]-&gt;page_pool);</div><div class='ctx'> 		if (!ns-&gt;page)</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='ctx'> 	} else {</div><div class='del'>-		page_pool_put_full_page(ns-&gt;page-&gt;pp, ns-&gt;page, false);</div><div class='add'>+		page_pool_put_full_page(pp_page_to_nmdesc(ns-&gt;page)-&gt;pp,</div><div class='add'>+					ns-&gt;page, false);</div><div class='ctx'> 		ns-&gt;page = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='del'>-	return count;</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct file_operations nsim_pp_hold_fops = {</div><div class='hunk'>@@ -654,18 +969,24 @@ static void nsim_setup(struct net_device *dev)</div><div class='ctx'> 	ether_setup(dev);</div><div class='ctx'> 	eth_hw_addr_random(dev);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;tx_queue_len = 0;</div><div class='ctx'> 	dev-&gt;flags &amp;= ~IFF_MULTICAST;</div><div class='del'>-	dev-&gt;priv_flags |= IFF_LIVE_ADDR_CHANGE |</div><div class='del'>-			   IFF_NO_QUEUE;</div><div class='add'>+	dev-&gt;priv_flags |= IFF_LIVE_ADDR_CHANGE;</div><div class='ctx'> 	dev-&gt;features |= NETIF_F_HIGHDMA |</div><div class='ctx'> 			 NETIF_F_SG |</div><div class='ctx'> 			 NETIF_F_FRAGLIST |</div><div class='ctx'> 			 NETIF_F_HW_CSUM |</div><div class='add'>+			 NETIF_F_LRO |</div><div class='ctx'> 			 NETIF_F_TSO;</div><div class='del'>-	dev-&gt;hw_features |= NETIF_F_HW_TC;</div><div class='add'>+	dev-&gt;hw_features |= NETIF_F_HW_TC |</div><div class='add'>+			    NETIF_F_SG |</div><div class='add'>+			    NETIF_F_FRAGLIST |</div><div class='add'>+			    NETIF_F_HW_CSUM |</div><div class='add'>+			    NETIF_F_LRO |</div><div class='add'>+			    NETIF_F_TSO |</div><div class='add'>+			    NETIF_F_LOOPBACK;</div><div class='add'>+	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_DSTATS;</div><div class='ctx'> 	dev-&gt;max_mtu = ETH_MAX_MTU;</div><div class='del'>-	dev-&gt;xdp_features = NETDEV_XDP_ACT_HW_OFFLOAD;</div><div class='add'>+	dev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_HW_OFFLOAD;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int nsim_queue_init(struct netdevsim *ns)</div><div class='hunk'>@@ -673,32 +994,41 @@ static int nsim_queue_init(struct netdevsim *ns)</div><div class='ctx'> 	struct net_device *dev = ns-&gt;netdev;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	ns-&gt;rq = kvcalloc(dev-&gt;num_rx_queues, sizeof(*ns-&gt;rq),</div><div class='del'>-			  GFP_KERNEL_ACCOUNT | __GFP_RETRY_MAYFAIL);</div><div class='add'>+	ns-&gt;rq = kcalloc(dev-&gt;num_rx_queues, sizeof(*ns-&gt;rq),</div><div class='add'>+			 GFP_KERNEL_ACCOUNT);</div><div class='ctx'> 	if (!ns-&gt;rq)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; dev-&gt;num_rx_queues; i++)</div><div class='del'>-		skb_queue_head_init(&amp;ns-&gt;rq[i].skb_queue);</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;num_rx_queues; i++) {</div><div class='add'>+		ns-&gt;rq[i] = nsim_queue_alloc();</div><div class='add'>+		if (!ns-&gt;rq[i])</div><div class='add'>+			goto err_free_prev;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_free_prev:</div><div class='add'>+	while (i--)</div><div class='add'>+		kfree(ns-&gt;rq[i]);</div><div class='add'>+	kfree(ns-&gt;rq);</div><div class='add'>+	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void nsim_queue_free(struct netdevsim *ns)</div><div class='add'>+static void nsim_queue_uninit(struct netdevsim *ns)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = ns-&gt;netdev;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; dev-&gt;num_rx_queues; i++)</div><div class='del'>-		skb_queue_purge_reason(&amp;ns-&gt;rq[i].skb_queue,</div><div class='del'>-				       SKB_DROP_REASON_QUEUE_PURGE);</div><div class='add'>+		nsim_queue_free(dev, ns-&gt;rq[i]);</div><div class='ctx'> </div><div class='del'>-	kvfree(ns-&gt;rq);</div><div class='add'>+	kfree(ns-&gt;rq);</div><div class='ctx'> 	ns-&gt;rq = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int nsim_init_netdevsim(struct netdevsim *ns)</div><div class='ctx'> {</div><div class='add'>+	struct netdevsim *peer;</div><div class='ctx'> 	struct mock_phc *phc;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -709,6 +1039,8 @@ static int nsim_init_netdevsim(struct netdevsim *ns)</div><div class='ctx'> 	ns-&gt;phc = phc;</div><div class='ctx'> 	ns-&gt;netdev-&gt;netdev_ops = &amp;nsim_netdev_ops;</div><div class='ctx'> 	ns-&gt;netdev-&gt;stat_ops = &amp;nsim_stat_ops;</div><div class='add'>+	ns-&gt;netdev-&gt;queue_mgmt_ops = &amp;nsim_queue_mgmt_ops;</div><div class='add'>+	netdev_lockdep_set_classes(ns-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 	err = nsim_udp_tunnels_info_create(ns-&gt;nsim_dev, ns-&gt;netdev);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -730,14 +1062,33 @@ static int nsim_init_netdevsim(struct netdevsim *ns)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_ipsec_teardown;</div><div class='ctx'> 	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	err = nsim_psp_init(ns);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_unregister_netdev;</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_DEBUG_NET)) {</div><div class='add'>+		ns-&gt;nb.notifier_call = netdev_debug_event;</div><div class='add'>+		if (register_netdevice_notifier_dev_net(ns-&gt;netdev, &amp;ns-&gt;nb,</div><div class='add'>+							&amp;ns-&gt;nn))</div><div class='add'>+			ns-&gt;nb.notifier_call = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_unregister_netdev:</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	peer = rtnl_dereference(ns-&gt;peer);</div><div class='add'>+	if (peer)</div><div class='add'>+		RCU_INIT_POINTER(peer-&gt;peer, NULL);</div><div class='add'>+	RCU_INIT_POINTER(ns-&gt;peer, NULL);</div><div class='add'>+	unregister_netdevice(ns-&gt;netdev);</div><div class='ctx'> err_ipsec_teardown:</div><div class='ctx'> 	nsim_ipsec_teardown(ns);</div><div class='ctx'> 	nsim_macsec_teardown(ns);</div><div class='ctx'> 	nsim_bpf_uninit(ns);</div><div class='ctx'> err_rq_destroy:</div><div class='del'>-	nsim_queue_free(ns);</div><div class='add'>+	nsim_queue_uninit(ns);</div><div class='ctx'> err_utn_destroy:</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> 	nsim_udp_tunnels_info_destroy(ns-&gt;netdev);</div><div class='hunk'>@@ -763,8 +1114,9 @@ static void nsim_exit_netdevsim(struct netdevsim *ns)</div><div class='ctx'> 	mock_phc_destroy(ns-&gt;phc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct netdevsim *</div><div class='del'>-nsim_create(struct nsim_dev *nsim_dev, struct nsim_dev_port *nsim_dev_port)</div><div class='add'>+struct netdevsim *nsim_create(struct nsim_dev *nsim_dev,</div><div class='add'>+			      struct nsim_dev_port *nsim_dev_port,</div><div class='add'>+			      u8 perm_addr[ETH_ALEN])</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct netdevsim *ns;</div><div class='hunk'>@@ -775,10 +1127,12 @@ nsim_create(struct nsim_dev *nsim_dev, struct nsim_dev_port *nsim_dev_port)</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='add'>+	if (perm_addr)</div><div class='add'>+		memcpy(dev-&gt;perm_addr, perm_addr, ETH_ALEN);</div><div class='add'>+</div><div class='ctx'> 	dev_net_set(dev, nsim_dev_net(nsim_dev));</div><div class='ctx'> 	ns = netdev_priv(dev);</div><div class='ctx'> 	ns-&gt;netdev = dev;</div><div class='del'>-	u64_stats_init(&amp;ns-&gt;syncp);</div><div class='ctx'> 	ns-&gt;nsim_dev = nsim_dev;</div><div class='ctx'> 	ns-&gt;nsim_dev_port = nsim_dev_port;</div><div class='ctx'> 	ns-&gt;nsim_bus_dev = nsim_dev-&gt;nsim_bus_dev;</div><div class='hunk'>@@ -794,7 +1148,9 @@ nsim_create(struct nsim_dev *nsim_dev, struct nsim_dev_port *nsim_dev_port)</div><div class='ctx'> </div><div class='ctx'> 	ns-&gt;pp_dfs = debugfs_create_file("pp_hold", 0600, nsim_dev_port-&gt;ddir,</div><div class='ctx'> 					 ns, &amp;nsim_pp_hold_fops);</div><div class='del'>-</div><div class='add'>+	ns-&gt;qr_dfs = debugfs_create_file("queue_reset", 0200,</div><div class='add'>+					 nsim_dev_port-&gt;ddir, ns,</div><div class='add'>+					 &amp;nsim_qreset_fops);</div><div class='ctx'> 	return ns;</div><div class='ctx'> </div><div class='ctx'> err_free_netdev:</div><div class='hunk'>@@ -807,8 +1163,15 @@ void nsim_destroy(struct netdevsim *ns)</div><div class='ctx'> 	struct net_device *dev = ns-&gt;netdev;</div><div class='ctx'> 	struct netdevsim *peer;</div><div class='ctx'> </div><div class='add'>+	debugfs_remove(ns-&gt;qr_dfs);</div><div class='ctx'> 	debugfs_remove(ns-&gt;pp_dfs);</div><div class='ctx'> </div><div class='add'>+	if (ns-&gt;nb.notifier_call)</div><div class='add'>+		unregister_netdevice_notifier_dev_net(ns-&gt;netdev, &amp;ns-&gt;nb,</div><div class='add'>+						      &amp;ns-&gt;nn);</div><div class='add'>+</div><div class='add'>+	nsim_psp_uninit(ns);</div><div class='add'>+</div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	peer = rtnl_dereference(ns-&gt;peer);</div><div class='ctx'> 	if (peer)</div><div class='hunk'>@@ -819,7 +1182,7 @@ void nsim_destroy(struct netdevsim *ns)</div><div class='ctx'> 		nsim_macsec_teardown(ns);</div><div class='ctx'> 		nsim_ipsec_teardown(ns);</div><div class='ctx'> 		nsim_bpf_uninit(ns);</div><div class='del'>-		nsim_queue_free(ns);</div><div class='add'>+		nsim_queue_uninit(ns);</div><div class='ctx'> 	}</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> 	if (nsim_dev_port_is_pf(ns-&gt;nsim_dev_port))</div><div class='hunk'>@@ -827,7 +1190,8 @@ void nsim_destroy(struct netdevsim *ns)</div><div class='ctx'> </div><div class='ctx'> 	/* Put this intentionally late to exercise the orphaning path */</div><div class='ctx'> 	if (ns-&gt;page) {</div><div class='del'>-		page_pool_put_full_page(ns-&gt;page-&gt;pp, ns-&gt;page, false);</div><div class='add'>+		page_pool_put_full_page(pp_page_to_nmdesc(ns-&gt;page)-&gt;pp,</div><div class='add'>+					ns-&gt;page, false);</div><div class='ctx'> 		ns-&gt;page = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/netdevsim/netdevsim.h b/drivers/net/netdevsim/netdevsim.h<br/>index bf02efa10956..d1a941e2b18f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/netdevsim.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/netdevsim.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/netdevsim.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/netdevsim.h</a></div><div class='hunk'>@@ -16,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/ethtool_netlink.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='hunk'>@@ -36,6 +37,8 @@</div><div class='ctx'> #define NSIM_IPSEC_VALID		BIT(31)</div><div class='ctx'> #define NSIM_UDP_TUNNEL_N_PORTS		4</div><div class='ctx'> </div><div class='add'>+#define NSIM_HDS_THRESHOLD_MAX		1024</div><div class='add'>+</div><div class='ctx'> struct nsim_sa {</div><div class='ctx'> 	struct xfrm_state *xs;</div><div class='ctx'> 	__be32 ipaddr[4];</div><div class='hunk'>@@ -51,7 +54,6 @@ struct nsim_ipsec {</div><div class='ctx'> 	struct dentry *pfile;</div><div class='ctx'> 	u32 count;</div><div class='ctx'> 	u32 tx;</div><div class='del'>-	u32 ok;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define NSIM_MACSEC_MAX_SECY_COUNT 3</div><div class='hunk'>@@ -94,6 +96,7 @@ struct nsim_rq {</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	struct sk_buff_head skb_queue;</div><div class='ctx'> 	struct page_pool *page_pool;</div><div class='add'>+	struct hrtimer napi_timer;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct netdevsim {</div><div class='hunk'>@@ -101,12 +104,20 @@ struct netdevsim {</div><div class='ctx'> 	struct nsim_dev *nsim_dev;</div><div class='ctx'> 	struct nsim_dev_port *nsim_dev_port;</div><div class='ctx'> 	struct mock_phc *phc;</div><div class='del'>-	struct nsim_rq *rq;</div><div class='add'>+	struct nsim_rq **rq;</div><div class='add'>+</div><div class='add'>+	int rq_reset_mode;</div><div class='ctx'> </div><div class='del'>-	u64 tx_packets;</div><div class='del'>-	u64 tx_bytes;</div><div class='del'>-	u64 tx_dropped;</div><div class='del'>-	struct u64_stats_sync syncp;</div><div class='add'>+	struct {</div><div class='add'>+		u64 rx_packets;</div><div class='add'>+		u64 rx_bytes;</div><div class='add'>+		u64 tx_packets;</div><div class='add'>+		u64 tx_bytes;</div><div class='add'>+		struct u64_stats_sync syncp;</div><div class='add'>+		struct psp_dev *dev;</div><div class='add'>+		u32 spi;</div><div class='add'>+		u32 assoc_cnt;</div><div class='add'>+	} psp;</div><div class='ctx'> </div><div class='ctx'> 	struct nsim_bus_dev *nsim_bus_dev;</div><div class='ctx'> </div><div class='hunk'>@@ -126,21 +137,26 @@ struct netdevsim {</div><div class='ctx'> 	struct nsim_macsec macsec;</div><div class='ctx'> 	struct {</div><div class='ctx'> 		u32 inject_error;</div><div class='del'>-		u32 sleep;</div><div class='ctx'> 		u32 __ports[2][NSIM_UDP_TUNNEL_N_PORTS];</div><div class='ctx'> 		u32 (*ports)[NSIM_UDP_TUNNEL_N_PORTS];</div><div class='add'>+		struct dentry *ddir;</div><div class='ctx'> 		struct debugfs_u32_array dfs_ports[2];</div><div class='ctx'> 	} udp_ports;</div><div class='ctx'> </div><div class='ctx'> 	struct page *page;</div><div class='ctx'> 	struct dentry *pp_dfs;</div><div class='add'>+	struct dentry *qr_dfs;</div><div class='ctx'> </div><div class='ctx'> 	struct nsim_ethtool ethtool;</div><div class='ctx'> 	struct netdevsim __rcu *peer;</div><div class='add'>+</div><div class='add'>+	struct notifier_block nb;</div><div class='add'>+	struct netdev_net_notifier nn;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct netdevsim *</div><div class='del'>-nsim_create(struct nsim_dev *nsim_dev, struct nsim_dev_port *nsim_dev_port);</div><div class='add'>+struct netdevsim *nsim_create(struct nsim_dev *nsim_dev,</div><div class='add'>+			      struct nsim_dev_port *nsim_dev_port,</div><div class='add'>+			      u8 perm_addr[ETH_ALEN]);</div><div class='ctx'> void nsim_destroy(struct netdevsim *ns);</div><div class='ctx'> bool netdev_is_nsim(struct net_device *dev);</div><div class='ctx'> </div><div class='hunk'>@@ -272,6 +288,7 @@ struct nsim_dev_port {</div><div class='ctx'> 	struct dentry *ddir;</div><div class='ctx'> 	struct dentry *rate_parent;</div><div class='ctx'> 	char *parent_name;</div><div class='add'>+	u32 tc_bw[DEVLINK_RATE_TCS_MAX];</div><div class='ctx'> 	struct netdevsim *ns;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -311,8 +328,10 @@ struct nsim_dev {</div><div class='ctx'> 	struct list_head port_list;</div><div class='ctx'> 	bool fw_update_status;</div><div class='ctx'> 	u32 fw_update_overwrite_mask;</div><div class='add'>+	u32 fw_update_flash_chunk_time_ms;</div><div class='ctx'> 	u32 max_macs;</div><div class='ctx'> 	bool test1;</div><div class='add'>+	u32 test2;</div><div class='ctx'> 	bool dont_allow_reload;</div><div class='ctx'> 	bool fail_reload;</div><div class='ctx'> 	struct devlink_region *dummy_region;</div><div class='hunk'>@@ -332,7 +351,6 @@ struct nsim_dev {</div><div class='ctx'> 		bool ipv4_only;</div><div class='ctx'> 		bool shared;</div><div class='ctx'> 		bool static_iana_vxlan;</div><div class='del'>-		u32 sleep;</div><div class='ctx'> 	} udp_ports;</div><div class='ctx'> 	struct nsim_dev_psample *psample;</div><div class='ctx'> 	u16 esw_mode;</div><div class='hunk'>@@ -358,8 +376,8 @@ void nsim_dev_exit(void);</div><div class='ctx'> int nsim_drv_probe(struct nsim_bus_dev *nsim_bus_dev);</div><div class='ctx'> void nsim_drv_remove(struct nsim_bus_dev *nsim_bus_dev);</div><div class='ctx'> int nsim_drv_port_add(struct nsim_bus_dev *nsim_bus_dev,</div><div class='del'>-		      enum nsim_dev_port_type type,</div><div class='del'>-		      unsigned int port_index);</div><div class='add'>+		      enum nsim_dev_port_type type, unsigned int port_index,</div><div class='add'>+		      u8 perm_addr[ETH_ALEN]);</div><div class='ctx'> int nsim_drv_port_del(struct nsim_bus_dev *nsim_bus_dev,</div><div class='ctx'> 		      enum nsim_dev_port_type type,</div><div class='ctx'> 		      unsigned int port_index);</div><div class='hunk'>@@ -415,6 +433,27 @@ static inline void nsim_macsec_teardown(struct netdevsim *ns)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_INET_PSP)</div><div class='add'>+int nsim_psp_init(struct netdevsim *ns);</div><div class='add'>+void nsim_psp_uninit(struct netdevsim *ns);</div><div class='add'>+void nsim_psp_handle_ext(struct sk_buff *skb, struct skb_ext *psp_ext);</div><div class='add'>+enum skb_drop_reason</div><div class='add'>+nsim_do_psp(struct sk_buff *skb, struct netdevsim *ns,</div><div class='add'>+	    struct netdevsim *peer_ns, struct skb_ext **psp_ext);</div><div class='add'>+#else</div><div class='add'>+static inline int nsim_psp_init(struct netdevsim *ns) { return 0; }</div><div class='add'>+static inline void nsim_psp_uninit(struct netdevsim *ns) {}</div><div class='add'>+static inline enum skb_drop_reason</div><div class='add'>+nsim_do_psp(struct sk_buff *skb, struct netdevsim *ns,</div><div class='add'>+	    struct netdevsim *peer_ns, struct skb_ext **psp_ext)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+nsim_psp_handle_ext(struct sk_buff *skb, struct skb_ext *psp_ext) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> struct nsim_bus_dev {</div><div class='ctx'> 	struct device dev;</div><div class='ctx'> 	struct list_head list;</div><div class='head'>diff --git a/drivers/net/netdevsim/psp.c b/drivers/net/netdevsim/psp.c<br/>new file mode 100644<br/>index 000000000000..727da06101ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/psp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/psp.c</a></div><div class='hunk'>@@ -0,0 +1,252 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;net/ip6_checksum.h&gt;</div><div class='add'>+#include &lt;net/psp.h&gt;</div><div class='add'>+#include &lt;net/sock.h&gt;</div><div class='add'>+</div><div class='add'>+#include "netdevsim.h"</div><div class='add'>+</div><div class='add'>+void nsim_psp_handle_ext(struct sk_buff *skb, struct skb_ext *psp_ext)</div><div class='add'>+{</div><div class='add'>+	if (psp_ext)</div><div class='add'>+		__skb_ext_set(skb, SKB_EXT_PSP, psp_ext);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum skb_drop_reason</div><div class='add'>+nsim_do_psp(struct sk_buff *skb, struct netdevsim *ns,</div><div class='add'>+	    struct netdevsim *peer_ns, struct skb_ext **psp_ext)</div><div class='add'>+{</div><div class='add'>+	enum skb_drop_reason rc = 0;</div><div class='add'>+	struct psp_assoc *pas;</div><div class='add'>+	struct net *net;</div><div class='add'>+	void **ptr;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	pas = psp_skb_get_assoc_rcu(skb);</div><div class='add'>+	if (!pas) {</div><div class='add'>+		rc = SKB_NOT_DROPPED_YET;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!skb_transport_header_was_set(skb)) {</div><div class='add'>+		rc = SKB_DROP_REASON_PSP_OUTPUT;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ptr = psp_assoc_drv_data(pas);</div><div class='add'>+	if (*ptr != ns) {</div><div class='add'>+		rc = SKB_DROP_REASON_PSP_OUTPUT;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	net = sock_net(skb-&gt;sk);</div><div class='add'>+	if (!psp_dev_encapsulate(net, skb, pas-&gt;tx.spi, pas-&gt;version, 0)) {</div><div class='add'>+		rc = SKB_DROP_REASON_PSP_OUTPUT;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Now pretend we just received this frame */</div><div class='add'>+	if (peer_ns-&gt;psp.dev-&gt;config.versions &amp; (1 &lt;&lt; pas-&gt;version)) {</div><div class='add'>+		bool strip_icv = false;</div><div class='add'>+		u8 generation;</div><div class='add'>+</div><div class='add'>+		/* We cheat a bit and put the generation in the key.</div><div class='add'>+		 * In real life if generation was too old, then decryption would</div><div class='add'>+		 * fail. Here, we just make it so a bad key causes a bad</div><div class='add'>+		 * generation too, and psp_sk_rx_policy_check() will fail.</div><div class='add'>+		 */</div><div class='add'>+		generation = pas-&gt;tx.key[0];</div><div class='add'>+</div><div class='add'>+		skb_ext_reset(skb);</div><div class='add'>+		skb-&gt;mac_len = ETH_HLEN;</div><div class='add'>+		if (psp_dev_rcv(skb, peer_ns-&gt;psp.dev-&gt;id, generation,</div><div class='add'>+				strip_icv)) {</div><div class='add'>+			rc = SKB_DROP_REASON_PSP_OUTPUT;</div><div class='add'>+			goto out_unlock;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*psp_ext = skb-&gt;extensions;</div><div class='add'>+		refcount_inc(&amp;(*psp_ext)-&gt;refcnt);</div><div class='add'>+		skb-&gt;decrypted = 1;</div><div class='add'>+</div><div class='add'>+		u64_stats_update_begin(&amp;ns-&gt;psp.syncp);</div><div class='add'>+		ns-&gt;psp.tx_packets++;</div><div class='add'>+		ns-&gt;psp.rx_packets++;</div><div class='add'>+		ns-&gt;psp.tx_bytes += skb-&gt;len - skb_inner_transport_offset(skb);</div><div class='add'>+		ns-&gt;psp.rx_bytes += skb-&gt;len - skb_inner_transport_offset(skb);</div><div class='add'>+		u64_stats_update_end(&amp;ns-&gt;psp.syncp);</div><div class='add'>+	} else {</div><div class='add'>+		struct ipv6hdr *ip6h __maybe_unused;</div><div class='add'>+		struct iphdr *iph;</div><div class='add'>+		struct udphdr *uh;</div><div class='add'>+		__wsum csum;</div><div class='add'>+</div><div class='add'>+		/* Do not decapsulate. Receive the skb with the udp and psp</div><div class='add'>+		 * headers still there as if this is a normal udp packet.</div><div class='add'>+		 * psp_dev_encapsulate() sets udp checksum to 0, so we need to</div><div class='add'>+		 * provide a valid checksum here, so the skb isn't dropped.</div><div class='add'>+		 */</div><div class='add'>+		uh = udp_hdr(skb);</div><div class='add'>+		csum = skb_checksum(skb, skb_transport_offset(skb),</div><div class='add'>+				    ntohs(uh-&gt;len), 0);</div><div class='add'>+</div><div class='add'>+		switch (skb-&gt;protocol) {</div><div class='add'>+		case htons(ETH_P_IP):</div><div class='add'>+			iph = ip_hdr(skb);</div><div class='add'>+			uh-&gt;check = udp_v4_check(ntohs(uh-&gt;len), iph-&gt;saddr,</div><div class='add'>+						 iph-&gt;daddr, csum);</div><div class='add'>+			break;</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+		case htons(ETH_P_IPV6):</div><div class='add'>+			ip6h = ipv6_hdr(skb);</div><div class='add'>+			uh-&gt;check = udp_v6_check(ntohs(uh-&gt;len), &amp;ip6h-&gt;saddr,</div><div class='add'>+						 &amp;ip6h-&gt;daddr, csum);</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		uh-&gt;check	= uh-&gt;check ?: CSUM_MANGLED_0;</div><div class='add'>+		skb-&gt;ip_summed	= CHECKSUM_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nsim_psp_set_config(struct psp_dev *psd, struct psp_dev_config *conf,</div><div class='add'>+		    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+nsim_rx_spi_alloc(struct psp_dev *psd, u32 version,</div><div class='add'>+		  struct psp_key_parsed *assoc,</div><div class='add'>+		  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct netdevsim *ns = psd-&gt;drv_priv;</div><div class='add'>+	unsigned int new;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	new = ++ns-&gt;psp.spi &amp; PSP_SPI_KEY_ID;</div><div class='add'>+	if (psd-&gt;generation &amp; 1)</div><div class='add'>+		new |= PSP_SPI_KEY_PHASE;</div><div class='add'>+</div><div class='add'>+	assoc-&gt;spi = cpu_to_be32(new);</div><div class='add'>+	assoc-&gt;key[0] = psd-&gt;generation;</div><div class='add'>+	for (i = 1; i &lt; PSP_MAX_KEY; i++)</div><div class='add'>+		assoc-&gt;key[i] = ns-&gt;psp.spi + i;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nsim_assoc_add(struct psp_dev *psd, struct psp_assoc *pas,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct netdevsim *ns = psd-&gt;drv_priv;</div><div class='add'>+	void **ptr = psp_assoc_drv_data(pas);</div><div class='add'>+</div><div class='add'>+	/* Copy drv_priv from psd to assoc */</div><div class='add'>+	*ptr = psd-&gt;drv_priv;</div><div class='add'>+	ns-&gt;psp.assoc_cnt++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nsim_key_rotate(struct psp_dev *psd, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nsim_assoc_del(struct psp_dev *psd, struct psp_assoc *pas)</div><div class='add'>+{</div><div class='add'>+	struct netdevsim *ns = psd-&gt;drv_priv;</div><div class='add'>+	void **ptr = psp_assoc_drv_data(pas);</div><div class='add'>+</div><div class='add'>+	*ptr = NULL;</div><div class='add'>+	ns-&gt;psp.assoc_cnt--;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nsim_get_stats(struct psp_dev *psd, struct psp_dev_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct netdevsim *ns = psd-&gt;drv_priv;</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	/* WARNING: do *not* blindly zero stats in real drivers!</div><div class='add'>+	 * All required stats must be reported by the device!</div><div class='add'>+	 */</div><div class='add'>+	memset(stats, 0, sizeof(struct psp_dev_stats));</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;ns-&gt;psp.syncp);</div><div class='add'>+		stats-&gt;rx_bytes = ns-&gt;psp.rx_bytes;</div><div class='add'>+		stats-&gt;rx_packets = ns-&gt;psp.rx_packets;</div><div class='add'>+		stats-&gt;tx_bytes = ns-&gt;psp.tx_bytes;</div><div class='add'>+		stats-&gt;tx_packets = ns-&gt;psp.tx_packets;</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;ns-&gt;psp.syncp, start));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct psp_dev_ops nsim_psp_ops = {</div><div class='add'>+	.set_config	= nsim_psp_set_config,</div><div class='add'>+	.rx_spi_alloc	= nsim_rx_spi_alloc,</div><div class='add'>+	.tx_key_add	= nsim_assoc_add,</div><div class='add'>+	.tx_key_del	= nsim_assoc_del,</div><div class='add'>+	.key_rotate	= nsim_key_rotate,</div><div class='add'>+	.get_stats	= nsim_get_stats,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct psp_dev_caps nsim_psp_caps = {</div><div class='add'>+	.versions = 1 &lt;&lt; PSP_VERSION_HDR0_AES_GCM_128 |</div><div class='add'>+		    1 &lt;&lt; PSP_VERSION_HDR0_AES_GMAC_128 |</div><div class='add'>+		    1 &lt;&lt; PSP_VERSION_HDR0_AES_GCM_256 |</div><div class='add'>+		    1 &lt;&lt; PSP_VERSION_HDR0_AES_GMAC_256,</div><div class='add'>+	.assoc_drv_spc = sizeof(void *),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void nsim_psp_uninit(struct netdevsim *ns)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ERR(ns-&gt;psp.dev))</div><div class='add'>+		psp_dev_unregister(ns-&gt;psp.dev);</div><div class='add'>+	WARN_ON(ns-&gt;psp.assoc_cnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+nsim_psp_rereg_write(struct file *file, const char __user *data, size_t count,</div><div class='add'>+		     loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct netdevsim *ns = file-&gt;private_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	nsim_psp_uninit(ns);</div><div class='add'>+</div><div class='add'>+	ns-&gt;psp.dev = psp_dev_create(ns-&gt;netdev, &amp;nsim_psp_ops,</div><div class='add'>+				     &amp;nsim_psp_caps, ns);</div><div class='add'>+	err = PTR_ERR_OR_ZERO(ns-&gt;psp.dev);</div><div class='add'>+	return err ?: count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations nsim_psp_rereg_fops = {</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.write = nsim_psp_rereg_write,</div><div class='add'>+	.llseek = generic_file_llseek,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int nsim_psp_init(struct netdevsim *ns)</div><div class='add'>+{</div><div class='add'>+	struct dentry *ddir = ns-&gt;nsim_dev_port-&gt;ddir;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ns-&gt;psp.dev = psp_dev_create(ns-&gt;netdev, &amp;nsim_psp_ops,</div><div class='add'>+				     &amp;nsim_psp_caps, ns);</div><div class='add'>+	err = PTR_ERR_OR_ZERO(ns-&gt;psp.dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("psp_rereg", 0200, ddir, ns, &amp;nsim_psp_rereg_fops);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/netdevsim/udp_tunnels.c b/drivers/net/netdevsim/udp_tunnels.c<br/>index 02dc3123eb6c..89fff76e51cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/udp_tunnels.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netdevsim/udp_tunnels.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netdevsim/udp_tunnels.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netdevsim/udp_tunnels.c</a></div><div class='hunk'>@@ -18,9 +18,6 @@ nsim_udp_tunnel_set_port(struct net_device *dev, unsigned int table,</div><div class='ctx'> 	ret = -ns-&gt;udp_ports.inject_error;</div><div class='ctx'> 	ns-&gt;udp_ports.inject_error = 0;</div><div class='ctx'> </div><div class='del'>-	if (ns-&gt;udp_ports.sleep)</div><div class='del'>-		msleep(ns-&gt;udp_ports.sleep);</div><div class='del'>-</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		if (ns-&gt;udp_ports.ports[table][entry]) {</div><div class='ctx'> 			WARN(1, "entry already in use\n");</div><div class='hunk'>@@ -47,8 +44,6 @@ nsim_udp_tunnel_unset_port(struct net_device *dev, unsigned int table,</div><div class='ctx'> 	ret = -ns-&gt;udp_ports.inject_error;</div><div class='ctx'> 	ns-&gt;udp_ports.inject_error = 0;</div><div class='ctx'> </div><div class='del'>-	if (ns-&gt;udp_ports.sleep)</div><div class='del'>-		msleep(ns-&gt;udp_ports.sleep);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		u32 val = be16_to_cpu(ti-&gt;port) &lt;&lt; 16 | ti-&gt;type;</div><div class='ctx'> </div><div class='hunk'>@@ -112,10 +107,10 @@ nsim_udp_tunnels_info_reset_write(struct file *file, const char __user *data,</div><div class='ctx'> 	struct net_device *dev = file-&gt;private_data;</div><div class='ctx'> 	struct netdevsim *ns = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	memset(ns-&gt;udp_ports.ports, 0, sizeof(ns-&gt;udp_ports.__ports));</div><div class='del'>-	rtnl_lock();</div><div class='del'>-	udp_tunnel_nic_reset_ntf(dev);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	if (dev-&gt;reg_state == NETREG_REGISTERED) {</div><div class='add'>+		memset(ns-&gt;udp_ports.ports, 0, sizeof(ns-&gt;udp_ports.__ports));</div><div class='add'>+		udp_tunnel_nic_reset_ntf(dev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='hunk'>@@ -144,23 +139,23 @@ int nsim_udp_tunnels_info_create(struct nsim_dev *nsim_dev,</div><div class='ctx'> 	else</div><div class='ctx'> 		ns-&gt;udp_ports.ports = nsim_dev-&gt;udp_ports.__ports;</div><div class='ctx'> </div><div class='del'>-	debugfs_create_u32("udp_ports_inject_error", 0600,</div><div class='del'>-			   ns-&gt;nsim_dev_port-&gt;ddir,</div><div class='add'>+	ns-&gt;udp_ports.ddir = debugfs_create_dir("udp_ports",</div><div class='add'>+						ns-&gt;nsim_dev_port-&gt;ddir);</div><div class='add'>+</div><div class='add'>+	debugfs_create_u32("inject_error", 0600, ns-&gt;udp_ports.ddir,</div><div class='ctx'> 			   &amp;ns-&gt;udp_ports.inject_error);</div><div class='ctx'> </div><div class='ctx'> 	ns-&gt;udp_ports.dfs_ports[0].array = ns-&gt;udp_ports.ports[0];</div><div class='ctx'> 	ns-&gt;udp_ports.dfs_ports[0].n_elements = NSIM_UDP_TUNNEL_N_PORTS;</div><div class='del'>-	debugfs_create_u32_array("udp_ports_table0", 0400,</div><div class='del'>-				 ns-&gt;nsim_dev_port-&gt;ddir,</div><div class='add'>+	debugfs_create_u32_array("table0", 0400, ns-&gt;udp_ports.ddir,</div><div class='ctx'> 				 &amp;ns-&gt;udp_ports.dfs_ports[0]);</div><div class='ctx'> </div><div class='ctx'> 	ns-&gt;udp_ports.dfs_ports[1].array = ns-&gt;udp_ports.ports[1];</div><div class='ctx'> 	ns-&gt;udp_ports.dfs_ports[1].n_elements = NSIM_UDP_TUNNEL_N_PORTS;</div><div class='del'>-	debugfs_create_u32_array("udp_ports_table1", 0400,</div><div class='del'>-				 ns-&gt;nsim_dev_port-&gt;ddir,</div><div class='add'>+	debugfs_create_u32_array("table1", 0400, ns-&gt;udp_ports.ddir,</div><div class='ctx'> 				 &amp;ns-&gt;udp_ports.dfs_ports[1]);</div><div class='ctx'> </div><div class='del'>-	debugfs_create_file("udp_ports_reset", 0200, ns-&gt;nsim_dev_port-&gt;ddir,</div><div class='add'>+	debugfs_create_file("reset", 0200, ns-&gt;udp_ports.ddir,</div><div class='ctx'> 			    dev, &amp;nsim_udp_tunnels_info_reset_fops);</div><div class='ctx'> </div><div class='ctx'> 	/* Note: it's not normal to allocate the info struct like this!</div><div class='hunk'>@@ -170,7 +165,6 @@ int nsim_udp_tunnels_info_create(struct nsim_dev *nsim_dev,</div><div class='ctx'> 		       GFP_KERNEL);</div><div class='ctx'> 	if (!info)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	ns-&gt;udp_ports.sleep = nsim_dev-&gt;udp_ports.sleep;</div><div class='ctx'> </div><div class='ctx'> 	if (nsim_dev-&gt;udp_ports.sync_all) {</div><div class='ctx'> 		info-&gt;set_port = NULL;</div><div class='hunk'>@@ -179,8 +173,6 @@ int nsim_udp_tunnels_info_create(struct nsim_dev *nsim_dev,</div><div class='ctx'> 		info-&gt;sync_table = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ns-&gt;udp_ports.sleep)</div><div class='del'>-		info-&gt;flags |= UDP_TUNNEL_NIC_INFO_MAY_SLEEP;</div><div class='ctx'> 	if (nsim_dev-&gt;udp_ports.open_only)</div><div class='ctx'> 		info-&gt;flags |= UDP_TUNNEL_NIC_INFO_OPEN_ONLY;</div><div class='ctx'> 	if (nsim_dev-&gt;udp_ports.ipv4_only)</div><div class='hunk'>@@ -196,6 +188,9 @@ int nsim_udp_tunnels_info_create(struct nsim_dev *nsim_dev,</div><div class='ctx'> </div><div class='ctx'> void nsim_udp_tunnels_info_destroy(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct netdevsim *ns = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	debugfs_remove_recursive(ns-&gt;udp_ports.ddir);</div><div class='ctx'> 	kfree(dev-&gt;udp_tunnel_nic_info);</div><div class='ctx'> 	dev-&gt;udp_tunnel_nic_info = NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -212,6 +207,4 @@ void nsim_udp_tunnels_debugfs_create(struct nsim_dev *nsim_dev)</div><div class='ctx'> 			    &amp;nsim_dev-&gt;udp_ports.shared);</div><div class='ctx'> 	debugfs_create_bool("udp_ports_static_iana_vxlan", 0600, nsim_dev-&gt;ddir,</div><div class='ctx'> 			    &amp;nsim_dev-&gt;udp_ports.static_iana_vxlan);</div><div class='del'>-	debugfs_create_u32("udp_ports_sleep", 0600, nsim_dev-&gt;ddir,</div><div class='del'>-			   &amp;nsim_dev-&gt;udp_ports.sleep);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/netkit.c b/drivers/net/netkit.c<br/>index cd8360b9bbde..0a2fef7caccb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/netkit.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/netkit.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/netkit.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/netkit.c</a></div><div class='hunk'>@@ -16,23 +16,24 @@</div><div class='ctx'> #define DRV_NAME "netkit"</div><div class='ctx'> </div><div class='ctx'> struct netkit {</div><div class='del'>-	/* Needed in fast-path */</div><div class='add'>+	__cacheline_group_begin(netkit_fastpath);</div><div class='ctx'> 	struct net_device __rcu *peer;</div><div class='ctx'> 	struct bpf_mprog_entry __rcu *active;</div><div class='ctx'> 	enum netkit_action policy;</div><div class='ctx'> 	enum netkit_scrub scrub;</div><div class='ctx'> 	struct bpf_mprog_bundle	bundle;</div><div class='add'>+	__cacheline_group_end(netkit_fastpath);</div><div class='ctx'> </div><div class='del'>-	/* Needed in slow-path */</div><div class='add'>+	__cacheline_group_begin(netkit_slowpath);</div><div class='ctx'> 	enum netkit_mode mode;</div><div class='ctx'> 	bool primary;</div><div class='ctx'> 	u32 headroom;</div><div class='add'>+	__cacheline_group_end(netkit_slowpath);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct netkit_link {</div><div class='ctx'> 	struct bpf_link link;</div><div class='ctx'> 	struct net_device *dev;</div><div class='del'>-	u32 location;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __always_inline int</div><div class='hunk'>@@ -65,7 +66,6 @@ static void netkit_prep_forward(struct sk_buff *skb,</div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='ctx'> 	if (!xnet)</div><div class='ctx'> 		return;</div><div class='del'>-	ipvs_reset(skb);</div><div class='ctx'> 	skb_clear_tstamp(skb);</div><div class='ctx'> 	if (xnet_scrub)</div><div class='ctx'> 		netkit_xnet(skb);</div><div class='hunk'>@@ -327,36 +327,35 @@ static int netkit_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> </div><div class='ctx'> static struct rtnl_link_ops netkit_link_ops;</div><div class='ctx'> </div><div class='del'>-static int netkit_new_link(struct net *src_net, struct net_device *dev,</div><div class='del'>-			   struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int netkit_new_link(struct net_device *dev,</div><div class='add'>+			   struct rtnl_newlink_params *params,</div><div class='ctx'> 			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	struct nlattr *peer_tb[IFLA_MAX + 1], **tbp = tb, *attr;</div><div class='del'>-	enum netkit_action policy_prim = NETKIT_PASS;</div><div class='del'>-	enum netkit_action policy_peer = NETKIT_PASS;</div><div class='add'>+	struct net *peer_net = rtnl_newlink_peer_net(params);</div><div class='ctx'> 	enum netkit_scrub scrub_prim = NETKIT_SCRUB_DEFAULT;</div><div class='ctx'> 	enum netkit_scrub scrub_peer = NETKIT_SCRUB_DEFAULT;</div><div class='add'>+	struct nlattr *peer_tb[IFLA_MAX + 1], **tbp, *attr;</div><div class='add'>+	enum netkit_action policy_prim = NETKIT_PASS;</div><div class='add'>+	enum netkit_action policy_peer = NETKIT_PASS;</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='ctx'> 	enum netkit_mode mode = NETKIT_L3;</div><div class='ctx'> 	unsigned char ifname_assign_type;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='add'>+	u16 headroom = 0, tailroom = 0;</div><div class='ctx'> 	struct ifinfomsg *ifmp = NULL;</div><div class='ctx'> 	struct net_device *peer;</div><div class='ctx'> 	char ifname[IFNAMSIZ];</div><div class='ctx'> 	struct netkit *nk;</div><div class='del'>-	struct net *net;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	tbp = tb;</div><div class='ctx'> 	if (data) {</div><div class='ctx'> 		if (data[IFLA_NETKIT_MODE])</div><div class='ctx'> 			mode = nla_get_u32(data[IFLA_NETKIT_MODE]);</div><div class='ctx'> 		if (data[IFLA_NETKIT_PEER_INFO]) {</div><div class='ctx'> 			attr = data[IFLA_NETKIT_PEER_INFO];</div><div class='ctx'> 			ifmp = nla_data(attr);</div><div class='del'>-			err = rtnl_nla_parse_ifinfomsg(peer_tb, attr, extack);</div><div class='del'>-			if (err &lt; 0)</div><div class='del'>-				return err;</div><div class='del'>-			err = netkit_validate(peer_tb, NULL, extack);</div><div class='del'>-			if (err &lt; 0)</div><div class='del'>-				return err;</div><div class='add'>+			rtnl_nla_parse_ifinfomsg(peer_tb, attr, extack);</div><div class='ctx'> 			tbp = peer_tb;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (data[IFLA_NETKIT_SCRUB])</div><div class='hunk'>@@ -377,6 +376,10 @@ static int netkit_new_link(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 			if (err &lt; 0)</div><div class='ctx'> 				return err;</div><div class='ctx'> 		}</div><div class='add'>+		if (data[IFLA_NETKIT_HEADROOM])</div><div class='add'>+			headroom = nla_get_u16(data[IFLA_NETKIT_HEADROOM]);</div><div class='add'>+		if (data[IFLA_NETKIT_TAILROOM])</div><div class='add'>+			tailroom = nla_get_u16(data[IFLA_NETKIT_TAILROOM]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ifmp &amp;&amp; tbp[IFLA_IFNAME]) {</div><div class='hunk'>@@ -390,18 +393,20 @@ static int netkit_new_link(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	    (tb[IFLA_ADDRESS] || tbp[IFLA_ADDRESS]))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	net = rtnl_link_get_net(src_net, tbp);</div><div class='del'>-	if (IS_ERR(net))</div><div class='del'>-		return PTR_ERR(net);</div><div class='del'>-</div><div class='del'>-	peer = rtnl_create_link(net, ifname, ifname_assign_type,</div><div class='add'>+	peer = rtnl_create_link(peer_net, ifname, ifname_assign_type,</div><div class='ctx'> 				&amp;netkit_link_ops, tbp, extack);</div><div class='del'>-	if (IS_ERR(peer)) {</div><div class='del'>-		put_net(net);</div><div class='add'>+	if (IS_ERR(peer))</div><div class='ctx'> 		return PTR_ERR(peer);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	netif_inherit_tso_max(peer, dev);</div><div class='add'>+	if (headroom) {</div><div class='add'>+		peer-&gt;needed_headroom = headroom;</div><div class='add'>+		dev-&gt;needed_headroom = headroom;</div><div class='add'>+	}</div><div class='add'>+	if (tailroom) {</div><div class='add'>+		peer-&gt;needed_tailroom = tailroom;</div><div class='add'>+		dev-&gt;needed_tailroom = tailroom;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (mode == NETKIT_L2 &amp;&amp; !(ifmp &amp;&amp; tbp[IFLA_ADDRESS]))</div><div class='ctx'> 		eth_hw_addr_random(peer);</div><div class='hunk'>@@ -413,10 +418,10 @@ static int netkit_new_link(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	nk-&gt;policy = policy_peer;</div><div class='ctx'> 	nk-&gt;scrub = scrub_peer;</div><div class='ctx'> 	nk-&gt;mode = mode;</div><div class='add'>+	nk-&gt;headroom = headroom;</div><div class='ctx'> 	bpf_mprog_bundle_init(&amp;nk-&gt;bundle);</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdevice(peer);</div><div class='del'>-	put_net(net);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto err_register_peer;</div><div class='ctx'> 	netif_carrier_off(peer);</div><div class='hunk'>@@ -439,6 +444,7 @@ static int netkit_new_link(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	nk-&gt;policy = policy_prim;</div><div class='ctx'> 	nk-&gt;scrub = scrub_prim;</div><div class='ctx'> 	nk-&gt;mode = mode;</div><div class='add'>+	nk-&gt;headroom = headroom;</div><div class='ctx'> 	bpf_mprog_bundle_init(&amp;nk-&gt;bundle);</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdevice(dev);</div><div class='hunk'>@@ -728,8 +734,8 @@ static void netkit_link_fdinfo(const struct bpf_link *link, struct seq_file *seq</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(seq, "ifindex:\t%u\n", ifindex);</div><div class='ctx'> 	seq_printf(seq, "attach_type:\t%u (%s)\n",</div><div class='del'>-		   nkl-&gt;location,</div><div class='del'>-		   nkl-&gt;location == BPF_NETKIT_PRIMARY ? "primary" : "peer");</div><div class='add'>+		   link-&gt;attach_type,</div><div class='add'>+		   link-&gt;attach_type == BPF_NETKIT_PRIMARY ? "primary" : "peer");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int netkit_link_fill_info(const struct bpf_link *link,</div><div class='hunk'>@@ -744,7 +750,7 @@ static int netkit_link_fill_info(const struct bpf_link *link,</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;netkit.ifindex = ifindex;</div><div class='del'>-	info-&gt;netkit.attach_type = nkl-&gt;location;</div><div class='add'>+	info-&gt;netkit.attach_type = link-&gt;attach_type;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -770,8 +776,7 @@ static int netkit_link_init(struct netkit_link *nkl,</div><div class='ctx'> 			    struct bpf_prog *prog)</div><div class='ctx'> {</div><div class='ctx'> 	bpf_link_init(&amp;nkl-&gt;link, BPF_LINK_TYPE_NETKIT,</div><div class='del'>-		      &amp;netkit_link_lops, prog);</div><div class='del'>-	nkl-&gt;location = attr-&gt;link_create.attach_type;</div><div class='add'>+		      &amp;netkit_link_lops, prog, attr-&gt;link_create.attach_type);</div><div class='ctx'> 	nkl-&gt;dev = dev;</div><div class='ctx'> 	return bpf_link_prime(&amp;nkl-&gt;link, link_primer);</div><div class='ctx'> }</div><div class='hunk'>@@ -863,7 +868,18 @@ static int netkit_change_link(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 	struct net_device *peer = rtnl_dereference(nk-&gt;peer);</div><div class='ctx'> 	enum netkit_action policy;</div><div class='ctx'> 	struct nlattr *attr;</div><div class='del'>-	int err;</div><div class='add'>+	int err, i;</div><div class='add'>+	static const struct {</div><div class='add'>+		u32 attr;</div><div class='add'>+		char *name;</div><div class='add'>+	} fixed_params[] = {</div><div class='add'>+		{ IFLA_NETKIT_MODE,       "operating mode" },</div><div class='add'>+		{ IFLA_NETKIT_SCRUB,      "scrubbing" },</div><div class='add'>+		{ IFLA_NETKIT_PEER_SCRUB, "peer scrubbing" },</div><div class='add'>+		{ IFLA_NETKIT_PEER_INFO,  "peer info" },</div><div class='add'>+		{ IFLA_NETKIT_HEADROOM,   "headroom" },</div><div class='add'>+		{ IFLA_NETKIT_TAILROOM,   "tailroom" },</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	if (!nk-&gt;primary) {</div><div class='ctx'> 		NL_SET_ERR_MSG(extack,</div><div class='hunk'>@@ -871,28 +887,14 @@ static int netkit_change_link(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 		return -EACCES;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (data[IFLA_NETKIT_MODE]) {</div><div class='del'>-		NL_SET_ERR_MSG_ATTR(extack, data[IFLA_NETKIT_MODE],</div><div class='del'>-				    "netkit link operating mode cannot be changed after device creation");</div><div class='del'>-		return -EACCES;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data[IFLA_NETKIT_SCRUB]) {</div><div class='del'>-		NL_SET_ERR_MSG_ATTR(extack, data[IFLA_NETKIT_SCRUB],</div><div class='del'>-				    "netkit scrubbing cannot be changed after device creation");</div><div class='del'>-		return -EACCES;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data[IFLA_NETKIT_PEER_SCRUB]) {</div><div class='del'>-		NL_SET_ERR_MSG_ATTR(extack, data[IFLA_NETKIT_PEER_SCRUB],</div><div class='del'>-				    "netkit scrubbing cannot be changed after device creation");</div><div class='del'>-		return -EACCES;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data[IFLA_NETKIT_PEER_INFO]) {</div><div class='del'>-		NL_SET_ERR_MSG_ATTR(extack, data[IFLA_NETKIT_PEER_INFO],</div><div class='del'>-				    "netkit peer info cannot be changed after device creation");</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(fixed_params); i++) {</div><div class='add'>+		attr = data[fixed_params[i].attr];</div><div class='add'>+		if (attr) {</div><div class='add'>+			NL_SET_ERR_MSG_ATTR_FMT(extack, attr,</div><div class='add'>+						"netkit link %s cannot be changed after device creation",</div><div class='add'>+						fixed_params[i].name);</div><div class='add'>+			return -EACCES;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (data[IFLA_NETKIT_POLICY]) {</div><div class='hunk'>@@ -927,6 +929,8 @@ static size_t netkit_get_size(const struct net_device *dev)</div><div class='ctx'> 	       nla_total_size(sizeof(u32)) + /* IFLA_NETKIT_PEER_SCRUB */</div><div class='ctx'> 	       nla_total_size(sizeof(u32)) + /* IFLA_NETKIT_MODE */</div><div class='ctx'> 	       nla_total_size(sizeof(u8))  + /* IFLA_NETKIT_PRIMARY */</div><div class='add'>+	       nla_total_size(sizeof(u16)) + /* IFLA_NETKIT_HEADROOM */</div><div class='add'>+	       nla_total_size(sizeof(u16)) + /* IFLA_NETKIT_TAILROOM */</div><div class='ctx'> 	       0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -943,6 +947,10 @@ static int netkit_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='ctx'> 		return -EMSGSIZE;</div><div class='ctx'> 	if (nla_put_u32(skb, IFLA_NETKIT_SCRUB, nk-&gt;scrub))</div><div class='ctx'> 		return -EMSGSIZE;</div><div class='add'>+	if (nla_put_u16(skb, IFLA_NETKIT_HEADROOM, dev-&gt;needed_headroom))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	if (nla_put_u16(skb, IFLA_NETKIT_TAILROOM, dev-&gt;needed_tailroom))</div><div class='add'>+		return -EMSGSIZE;</div><div class='ctx'> </div><div class='ctx'> 	if (peer) {</div><div class='ctx'> 		nk = netkit_priv(peer);</div><div class='hunk'>@@ -960,6 +968,8 @@ static const struct nla_policy netkit_policy[IFLA_NETKIT_MAX + 1] = {</div><div class='ctx'> 	[IFLA_NETKIT_MODE]		= NLA_POLICY_MAX(NLA_U32, NETKIT_L3),</div><div class='ctx'> 	[IFLA_NETKIT_POLICY]		= { .type = NLA_U32 },</div><div class='ctx'> 	[IFLA_NETKIT_PEER_POLICY]	= { .type = NLA_U32 },</div><div class='add'>+	[IFLA_NETKIT_HEADROOM]		= { .type = NLA_U16 },</div><div class='add'>+	[IFLA_NETKIT_TAILROOM]		= { .type = NLA_U16 },</div><div class='ctx'> 	[IFLA_NETKIT_SCRUB]		= NLA_POLICY_MAX(NLA_U32, NETKIT_SCRUB_DEFAULT),</div><div class='ctx'> 	[IFLA_NETKIT_PEER_SCRUB]	= NLA_POLICY_MAX(NLA_U32, NETKIT_SCRUB_DEFAULT),</div><div class='ctx'> 	[IFLA_NETKIT_PRIMARY]		= { .type = NLA_REJECT,</div><div class='hunk'>@@ -978,6 +988,7 @@ static struct rtnl_link_ops netkit_link_ops = {</div><div class='ctx'> 	.fill_info	= netkit_fill_info,</div><div class='ctx'> 	.policy		= netkit_policy,</div><div class='ctx'> 	.validate	= netkit_validate,</div><div class='add'>+	.peer_type	= IFLA_NETKIT_PEER_INFO,</div><div class='ctx'> 	.maxtype	= IFLA_NETKIT_MAX,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ntb_netdev.c b/drivers/net/ntb_netdev.c<br/>index ef6df0e37bea..fbeae05817e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ntb_netdev.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ntb_netdev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ntb_netdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ntb_netdev.c</a></div><div class='hunk'>@@ -229,7 +229,7 @@ err:</div><div class='ctx'> </div><div class='ctx'> static void ntb_netdev_tx_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ntb_netdev *dev = from_timer(dev, t, tx_timer);</div><div class='add'>+	struct ntb_netdev *dev = timer_container_of(dev, t, tx_timer);</div><div class='ctx'> 	struct net_device *ndev = dev-&gt;ndev;</div><div class='ctx'> </div><div class='ctx'> 	if (ntb_transport_tx_free_entry(dev-&gt;qp) &lt; tx_stop) {</div><div class='hunk'>@@ -291,7 +291,7 @@ static int ntb_netdev_close(struct net_device *ndev)</div><div class='ctx'> 	while ((skb = ntb_transport_rx_remove(dev-&gt;qp, &amp;len)))</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;dev-&gt;tx_timer);</div><div class='add'>+	timer_delete_sync(&amp;dev-&gt;tx_timer);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ovpn/Makefile b/drivers/net/ovpn/Makefile<br/>new file mode 100644<br/>index 000000000000..229be66167e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/Makefile</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#</div><div class='add'>+# ovpn -- OpenVPN data channel offload in kernel space</div><div class='add'>+#</div><div class='add'>+# Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+#</div><div class='add'>+# Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_OVPN) := ovpn.o</div><div class='add'>+ovpn-y += bind.o</div><div class='add'>+ovpn-y += crypto.o</div><div class='add'>+ovpn-y += crypto_aead.o</div><div class='add'>+ovpn-y += main.o</div><div class='add'>+ovpn-y += io.o</div><div class='add'>+ovpn-y += netlink.o</div><div class='add'>+ovpn-y += netlink-gen.o</div><div class='add'>+ovpn-y += peer.o</div><div class='add'>+ovpn-y += pktid.o</div><div class='add'>+ovpn-y += socket.o</div><div class='add'>+ovpn-y += stats.o</div><div class='add'>+ovpn-y += tcp.o</div><div class='add'>+ovpn-y += udp.o</div><div class='head'>diff --git a/drivers/net/ovpn/bind.c b/drivers/net/ovpn/bind.c<br/>new file mode 100644<br/>index 000000000000..24d2788a277e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/bind.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/bind.c</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/socket.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "bind.h"</div><div class='add'>+#include "peer.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_bind_from_sockaddr - retrieve binding matching sockaddr</div><div class='add'>+ * @ss: the sockaddr to match</div><div class='add'>+ *</div><div class='add'>+ * Return: the bind matching the passed sockaddr if found, NULL otherwise</div><div class='add'>+ */</div><div class='add'>+struct ovpn_bind *ovpn_bind_from_sockaddr(const struct sockaddr_storage *ss)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_bind *bind;</div><div class='add'>+	size_t sa_len;</div><div class='add'>+</div><div class='add'>+	if (ss-&gt;ss_family == AF_INET)</div><div class='add'>+		sa_len = sizeof(struct sockaddr_in);</div><div class='add'>+	else if (ss-&gt;ss_family == AF_INET6)</div><div class='add'>+		sa_len = sizeof(struct sockaddr_in6);</div><div class='add'>+	else</div><div class='add'>+		return ERR_PTR(-EAFNOSUPPORT);</div><div class='add'>+</div><div class='add'>+	bind = kzalloc(sizeof(*bind), GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!bind))</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;bind-&gt;remote, ss, sa_len);</div><div class='add'>+</div><div class='add'>+	return bind;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_bind_reset - assign new binding to peer</div><div class='add'>+ * @peer: the peer whose binding has to be replaced</div><div class='add'>+ * @new: the new bind to assign</div><div class='add'>+ */</div><div class='add'>+void ovpn_bind_reset(struct ovpn_peer *peer, struct ovpn_bind *new)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;peer-&gt;lock);</div><div class='add'>+</div><div class='add'>+	kfree_rcu(rcu_replace_pointer(peer-&gt;bind, new,</div><div class='add'>+				      lockdep_is_held(&amp;peer-&gt;lock)), rcu);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/bind.h b/drivers/net/ovpn/bind.h<br/>new file mode 100644<br/>index 000000000000..4e0b8398bfd9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/bind.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/bind.h</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2012-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_OVPNBIND_H_</div><div class='add'>+#define _NET_OVPN_OVPNBIND_H_</div><div class='add'>+</div><div class='add'>+#include &lt;net/ip.h&gt;</div><div class='add'>+#include &lt;linux/in.h&gt;</div><div class='add'>+#include &lt;linux/in6.h&gt;</div><div class='add'>+#include &lt;linux/rcupdate.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+</div><div class='add'>+struct ovpn_peer;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * union ovpn_sockaddr - basic transport layer address</div><div class='add'>+ * @in4: IPv4 address</div><div class='add'>+ * @in6: IPv6 address</div><div class='add'>+ */</div><div class='add'>+union ovpn_sockaddr {</div><div class='add'>+	struct sockaddr_in in4;</div><div class='add'>+	struct sockaddr_in6 in6;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ovpn_bind - remote peer binding</div><div class='add'>+ * @remote: the remote peer sockaddress</div><div class='add'>+ * @local: local endpoint used to talk to the peer</div><div class='add'>+ * @local.ipv4: local IPv4 used to talk to the peer</div><div class='add'>+ * @local.ipv6: local IPv6 used to talk to the peer</div><div class='add'>+ * @rcu: used to schedule RCU cleanup job</div><div class='add'>+ */</div><div class='add'>+struct ovpn_bind {</div><div class='add'>+	union ovpn_sockaddr remote;  /* remote sockaddr */</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct in_addr ipv4;</div><div class='add'>+		struct in6_addr ipv6;</div><div class='add'>+	} local;</div><div class='add'>+</div><div class='add'>+	struct rcu_head rcu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_bind_skb_src_match - match packet source with binding</div><div class='add'>+ * @bind: the binding to match</div><div class='add'>+ * @skb: the packet to match</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the packet source matches the remote peer sockaddr</div><div class='add'>+ * in the binding</div><div class='add'>+ */</div><div class='add'>+static inline bool ovpn_bind_skb_src_match(const struct ovpn_bind *bind,</div><div class='add'>+					   const struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	const union ovpn_sockaddr *remote;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!bind))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	remote = &amp;bind-&gt;remote;</div><div class='add'>+</div><div class='add'>+	switch (skb-&gt;protocol) {</div><div class='add'>+	case htons(ETH_P_IP):</div><div class='add'>+		if (unlikely(remote-&gt;in4.sin_family != AF_INET))</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		if (unlikely(remote-&gt;in4.sin_addr.s_addr != ip_hdr(skb)-&gt;saddr))</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		if (unlikely(remote-&gt;in4.sin_port != udp_hdr(skb)-&gt;source))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case htons(ETH_P_IPV6):</div><div class='add'>+		if (unlikely(remote-&gt;in6.sin6_family != AF_INET6))</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		if (unlikely(!ipv6_addr_equal(&amp;remote-&gt;in6.sin6_addr,</div><div class='add'>+					      &amp;ipv6_hdr(skb)-&gt;saddr)))</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+		if (unlikely(remote-&gt;in6.sin6_port != udp_hdr(skb)-&gt;source))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ovpn_bind *ovpn_bind_from_sockaddr(const struct sockaddr_storage *sa);</div><div class='add'>+void ovpn_bind_reset(struct ovpn_peer *peer, struct ovpn_bind *bind);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_OVPNBIND_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/crypto.c b/drivers/net/ovpn/crypto.c<br/>new file mode 100644<br/>index 000000000000..90580e32052f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/crypto.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/crypto.c</a></div><div class='hunk'>@@ -0,0 +1,210 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/net.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;uapi/linux/ovpn.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "main.h"</div><div class='add'>+#include "pktid.h"</div><div class='add'>+#include "crypto_aead.h"</div><div class='add'>+#include "crypto.h"</div><div class='add'>+</div><div class='add'>+static void ovpn_ks_destroy_rcu(struct rcu_head *head)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+</div><div class='add'>+	ks = container_of(head, struct ovpn_crypto_key_slot, rcu);</div><div class='add'>+	ovpn_aead_crypto_key_slot_destroy(ks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_crypto_key_slot_release(struct kref *kref)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+</div><div class='add'>+	ks = container_of(kref, struct ovpn_crypto_key_slot, refcount);</div><div class='add'>+	call_rcu(&amp;ks-&gt;rcu, ovpn_ks_destroy_rcu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* can only be invoked when all peer references have been dropped (i.e. RCU</div><div class='add'>+ * release routine)</div><div class='add'>+ */</div><div class='add'>+void ovpn_crypto_state_release(struct ovpn_crypto_state *cs)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+</div><div class='add'>+	ks = rcu_access_pointer(cs-&gt;slots[0]);</div><div class='add'>+	if (ks) {</div><div class='add'>+		RCU_INIT_POINTER(cs-&gt;slots[0], NULL);</div><div class='add'>+		ovpn_crypto_key_slot_put(ks);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ks = rcu_access_pointer(cs-&gt;slots[1]);</div><div class='add'>+	if (ks) {</div><div class='add'>+		RCU_INIT_POINTER(cs-&gt;slots[1], NULL);</div><div class='add'>+		ovpn_crypto_key_slot_put(ks);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* removes the key matching the specified id from the crypto context */</div><div class='add'>+bool ovpn_crypto_kill_key(struct ovpn_crypto_state *cs, u8 key_id)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks = NULL;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;cs-&gt;lock);</div><div class='add'>+	if (rcu_access_pointer(cs-&gt;slots[0])-&gt;key_id == key_id) {</div><div class='add'>+		ks = rcu_replace_pointer(cs-&gt;slots[0], NULL,</div><div class='add'>+					 lockdep_is_held(&amp;cs-&gt;lock));</div><div class='add'>+	} else if (rcu_access_pointer(cs-&gt;slots[1])-&gt;key_id == key_id) {</div><div class='add'>+		ks = rcu_replace_pointer(cs-&gt;slots[1], NULL,</div><div class='add'>+					 lockdep_is_held(&amp;cs-&gt;lock));</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;cs-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (ks)</div><div class='add'>+		ovpn_crypto_key_slot_put(ks);</div><div class='add'>+</div><div class='add'>+	/* let the caller know if a key was actually killed */</div><div class='add'>+	return ks;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Reset the ovpn_crypto_state object in a way that is atomic</div><div class='add'>+ * to RCU readers.</div><div class='add'>+ */</div><div class='add'>+int ovpn_crypto_state_reset(struct ovpn_crypto_state *cs,</div><div class='add'>+			    const struct ovpn_peer_key_reset *pkr)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *old = NULL, *new;</div><div class='add'>+	u8 idx;</div><div class='add'>+</div><div class='add'>+	if (pkr-&gt;slot != OVPN_KEY_SLOT_PRIMARY &amp;&amp;</div><div class='add'>+	    pkr-&gt;slot != OVPN_KEY_SLOT_SECONDARY)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	new = ovpn_aead_crypto_key_slot_new(&amp;pkr-&gt;key);</div><div class='add'>+	if (IS_ERR(new))</div><div class='add'>+		return PTR_ERR(new);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;cs-&gt;lock);</div><div class='add'>+	idx = cs-&gt;primary_idx;</div><div class='add'>+	switch (pkr-&gt;slot) {</div><div class='add'>+	case OVPN_KEY_SLOT_PRIMARY:</div><div class='add'>+		old = rcu_replace_pointer(cs-&gt;slots[idx], new,</div><div class='add'>+					  lockdep_is_held(&amp;cs-&gt;lock));</div><div class='add'>+		break;</div><div class='add'>+	case OVPN_KEY_SLOT_SECONDARY:</div><div class='add'>+		old = rcu_replace_pointer(cs-&gt;slots[!idx], new,</div><div class='add'>+					  lockdep_is_held(&amp;cs-&gt;lock));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;cs-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (old)</div><div class='add'>+		ovpn_crypto_key_slot_put(old);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_crypto_key_slot_delete(struct ovpn_crypto_state *cs,</div><div class='add'>+				 enum ovpn_key_slot slot)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks = NULL;</div><div class='add'>+	u8 idx;</div><div class='add'>+</div><div class='add'>+	if (slot != OVPN_KEY_SLOT_PRIMARY &amp;&amp;</div><div class='add'>+	    slot != OVPN_KEY_SLOT_SECONDARY) {</div><div class='add'>+		pr_warn("Invalid slot to release: %u\n", slot);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;cs-&gt;lock);</div><div class='add'>+	idx = cs-&gt;primary_idx;</div><div class='add'>+	switch (slot) {</div><div class='add'>+	case OVPN_KEY_SLOT_PRIMARY:</div><div class='add'>+		ks = rcu_replace_pointer(cs-&gt;slots[idx], NULL,</div><div class='add'>+					 lockdep_is_held(&amp;cs-&gt;lock));</div><div class='add'>+		break;</div><div class='add'>+	case OVPN_KEY_SLOT_SECONDARY:</div><div class='add'>+		ks = rcu_replace_pointer(cs-&gt;slots[!idx], NULL,</div><div class='add'>+					 lockdep_is_held(&amp;cs-&gt;lock));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;cs-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (!ks) {</div><div class='add'>+		pr_debug("Key slot already released: %u\n", slot);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_debug("deleting key slot %u, key_id=%u\n", slot, ks-&gt;key_id);</div><div class='add'>+	ovpn_crypto_key_slot_put(ks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_crypto_key_slots_swap(struct ovpn_crypto_state *cs)</div><div class='add'>+{</div><div class='add'>+	const struct ovpn_crypto_key_slot *old_primary, *old_secondary;</div><div class='add'>+	u8 idx;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;cs-&gt;lock);</div><div class='add'>+	idx = cs-&gt;primary_idx;</div><div class='add'>+	old_primary = rcu_dereference_protected(cs-&gt;slots[idx],</div><div class='add'>+						lockdep_is_held(&amp;cs-&gt;lock));</div><div class='add'>+	old_secondary = rcu_dereference_protected(cs-&gt;slots[!idx],</div><div class='add'>+						  lockdep_is_held(&amp;cs-&gt;lock));</div><div class='add'>+	/* perform real swap by switching the index of the primary key */</div><div class='add'>+	WRITE_ONCE(cs-&gt;primary_idx, !cs-&gt;primary_idx);</div><div class='add'>+</div><div class='add'>+	pr_debug("key swapped: (old primary) %d &lt;-&gt; (new primary) %d\n",</div><div class='add'>+		 old_primary ? old_primary-&gt;key_id : -1,</div><div class='add'>+		 old_secondary ? old_secondary-&gt;key_id : -1);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;cs-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_crypto_config_get - populate keyconf object with non-sensible key data</div><div class='add'>+ * @cs: the crypto state to extract the key data from</div><div class='add'>+ * @slot: the specific slot to inspect</div><div class='add'>+ * @keyconf: the output object to populate</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+int ovpn_crypto_config_get(struct ovpn_crypto_state *cs,</div><div class='add'>+			   enum ovpn_key_slot slot,</div><div class='add'>+			   struct ovpn_key_config *keyconf)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	switch (slot) {</div><div class='add'>+	case OVPN_KEY_SLOT_PRIMARY:</div><div class='add'>+		idx = cs-&gt;primary_idx;</div><div class='add'>+		break;</div><div class='add'>+	case OVPN_KEY_SLOT_SECONDARY:</div><div class='add'>+		idx = !cs-&gt;primary_idx;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	ks = rcu_dereference(cs-&gt;slots[idx]);</div><div class='add'>+	if (!ks) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	keyconf-&gt;cipher_alg = ovpn_aead_crypto_alg(ks);</div><div class='add'>+	keyconf-&gt;key_id = ks-&gt;key_id;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/crypto.h b/drivers/net/ovpn/crypto.h<br/>new file mode 100644<br/>index 000000000000..0e284fec3a75<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/crypto.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/crypto.h</a></div><div class='hunk'>@@ -0,0 +1,145 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_OVPNCRYPTO_H_</div><div class='add'>+#define _NET_OVPN_OVPNCRYPTO_H_</div><div class='add'>+</div><div class='add'>+#include "pktid.h"</div><div class='add'>+#include "proto.h"</div><div class='add'>+</div><div class='add'>+/* info needed for both encrypt and decrypt directions */</div><div class='add'>+struct ovpn_key_direction {</div><div class='add'>+	const u8 *cipher_key;</div><div class='add'>+	size_t cipher_key_size;</div><div class='add'>+	const u8 *nonce_tail; /* only needed for GCM modes */</div><div class='add'>+	size_t nonce_tail_size; /* only needed for GCM modes */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* all info for a particular symmetric key (primary or secondary) */</div><div class='add'>+struct ovpn_key_config {</div><div class='add'>+	enum ovpn_cipher_alg cipher_alg;</div><div class='add'>+	u8 key_id;</div><div class='add'>+	struct ovpn_key_direction encrypt;</div><div class='add'>+	struct ovpn_key_direction decrypt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* used to pass settings from netlink to the crypto engine */</div><div class='add'>+struct ovpn_peer_key_reset {</div><div class='add'>+	enum ovpn_key_slot slot;</div><div class='add'>+	struct ovpn_key_config key;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ovpn_crypto_key_slot {</div><div class='add'>+	u8 key_id;</div><div class='add'>+</div><div class='add'>+	struct crypto_aead *encrypt;</div><div class='add'>+	struct crypto_aead *decrypt;</div><div class='add'>+	u8 nonce_tail_xmit[OVPN_NONCE_TAIL_SIZE];</div><div class='add'>+	u8 nonce_tail_recv[OVPN_NONCE_TAIL_SIZE];</div><div class='add'>+</div><div class='add'>+	struct ovpn_pktid_recv pid_recv ____cacheline_aligned_in_smp;</div><div class='add'>+	struct ovpn_pktid_xmit pid_xmit ____cacheline_aligned_in_smp;</div><div class='add'>+	struct kref refcount;</div><div class='add'>+	struct rcu_head rcu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ovpn_crypto_state {</div><div class='add'>+	struct ovpn_crypto_key_slot __rcu *slots[2];</div><div class='add'>+	u8 primary_idx;</div><div class='add'>+</div><div class='add'>+	/* protects primary and secondary slots */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool ovpn_crypto_key_slot_hold(struct ovpn_crypto_key_slot *ks)</div><div class='add'>+{</div><div class='add'>+	return kref_get_unless_zero(&amp;ks-&gt;refcount);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ovpn_crypto_state_init(struct ovpn_crypto_state *cs)</div><div class='add'>+{</div><div class='add'>+	RCU_INIT_POINTER(cs-&gt;slots[0], NULL);</div><div class='add'>+	RCU_INIT_POINTER(cs-&gt;slots[1], NULL);</div><div class='add'>+	cs-&gt;primary_idx = 0;</div><div class='add'>+	spin_lock_init(&amp;cs-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ovpn_crypto_key_slot *</div><div class='add'>+ovpn_crypto_key_id_to_slot(const struct ovpn_crypto_state *cs, u8 key_id)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+	u8 idx;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!cs))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	idx = READ_ONCE(cs-&gt;primary_idx);</div><div class='add'>+	ks = rcu_dereference(cs-&gt;slots[idx]);</div><div class='add'>+	if (ks &amp;&amp; ks-&gt;key_id == key_id) {</div><div class='add'>+		if (unlikely(!ovpn_crypto_key_slot_hold(ks)))</div><div class='add'>+			ks = NULL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ks = rcu_dereference(cs-&gt;slots[!idx]);</div><div class='add'>+	if (ks &amp;&amp; ks-&gt;key_id == key_id) {</div><div class='add'>+		if (unlikely(!ovpn_crypto_key_slot_hold(ks)))</div><div class='add'>+			ks = NULL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* when both key slots are occupied but no matching key ID is found, ks</div><div class='add'>+	 * has to be reset to NULL to avoid carrying a stale pointer</div><div class='add'>+	 */</div><div class='add'>+	ks = NULL;</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return ks;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ovpn_crypto_key_slot *</div><div class='add'>+ovpn_crypto_key_slot_primary(const struct ovpn_crypto_state *cs)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	ks = rcu_dereference(cs-&gt;slots[cs-&gt;primary_idx]);</div><div class='add'>+	if (unlikely(ks &amp;&amp; !ovpn_crypto_key_slot_hold(ks)))</div><div class='add'>+		ks = NULL;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return ks;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_crypto_key_slot_release(struct kref *kref);</div><div class='add'>+</div><div class='add'>+static inline void ovpn_crypto_key_slot_put(struct ovpn_crypto_key_slot *ks)</div><div class='add'>+{</div><div class='add'>+	kref_put(&amp;ks-&gt;refcount, ovpn_crypto_key_slot_release);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_crypto_state_reset(struct ovpn_crypto_state *cs,</div><div class='add'>+			    const struct ovpn_peer_key_reset *pkr);</div><div class='add'>+</div><div class='add'>+void ovpn_crypto_key_slot_delete(struct ovpn_crypto_state *cs,</div><div class='add'>+				 enum ovpn_key_slot slot);</div><div class='add'>+</div><div class='add'>+void ovpn_crypto_state_release(struct ovpn_crypto_state *cs);</div><div class='add'>+</div><div class='add'>+void ovpn_crypto_key_slots_swap(struct ovpn_crypto_state *cs);</div><div class='add'>+</div><div class='add'>+int ovpn_crypto_config_get(struct ovpn_crypto_state *cs,</div><div class='add'>+			   enum ovpn_key_slot slot,</div><div class='add'>+			   struct ovpn_key_config *keyconf);</div><div class='add'>+</div><div class='add'>+bool ovpn_crypto_kill_key(struct ovpn_crypto_state *cs, u8 key_id);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_OVPNCRYPTO_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/crypto_aead.c b/drivers/net/ovpn/crypto_aead.c<br/>new file mode 100644<br/>index 000000000000..2cca759feffa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/crypto_aead.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/crypto_aead.c</a></div><div class='hunk'>@@ -0,0 +1,389 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/aead.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;net/ip.h&gt;</div><div class='add'>+#include &lt;net/ipv6.h&gt;</div><div class='add'>+#include &lt;net/udp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "main.h"</div><div class='add'>+#include "io.h"</div><div class='add'>+#include "pktid.h"</div><div class='add'>+#include "crypto_aead.h"</div><div class='add'>+#include "crypto.h"</div><div class='add'>+#include "peer.h"</div><div class='add'>+#include "proto.h"</div><div class='add'>+#include "skb.h"</div><div class='add'>+</div><div class='add'>+#define OVPN_AUTH_TAG_SIZE	16</div><div class='add'>+#define OVPN_AAD_SIZE		(OVPN_OPCODE_SIZE + OVPN_NONCE_WIRE_SIZE)</div><div class='add'>+</div><div class='add'>+#define ALG_NAME_AES		"gcm(aes)"</div><div class='add'>+#define ALG_NAME_CHACHAPOLY	"rfc7539(chacha20,poly1305)"</div><div class='add'>+</div><div class='add'>+static int ovpn_aead_encap_overhead(const struct ovpn_crypto_key_slot *ks)</div><div class='add'>+{</div><div class='add'>+	return  OVPN_OPCODE_SIZE +			/* OP header size */</div><div class='add'>+		sizeof(u32) +				/* Packet ID */</div><div class='add'>+		crypto_aead_authsize(ks-&gt;encrypt);	/* Auth Tag */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_aead_encrypt(struct ovpn_peer *peer, struct ovpn_crypto_key_slot *ks,</div><div class='add'>+		      struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	const unsigned int tag_size = crypto_aead_authsize(ks-&gt;encrypt);</div><div class='add'>+	struct aead_request *req;</div><div class='add'>+	struct sk_buff *trailer;</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+	int nfrags, ret;</div><div class='add'>+	u32 pktid, op;</div><div class='add'>+	u8 *iv;</div><div class='add'>+</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;peer = peer;</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;ks = ks;</div><div class='add'>+</div><div class='add'>+	/* Sample AEAD header format:</div><div class='add'>+	 * 48000001 00000005 7e7046bd 444a7e28 cc6387b1 64a4d6c1 380275a...</div><div class='add'>+	 * [ OP32 ] [seq # ] [             auth tag            ] [ payload ... ]</div><div class='add'>+	 *          [4-byte</div><div class='add'>+	 *          IV head]</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* check that there's enough headroom in the skb for packet</div><div class='add'>+	 * encapsulation</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(skb_cow_head(skb, OVPN_HEAD_ROOM)))</div><div class='add'>+		return -ENOBUFS;</div><div class='add'>+</div><div class='add'>+	/* get number of skb frags and ensure that packet data is writable */</div><div class='add'>+	nfrags = skb_cow_data(skb, 0, &amp;trailer);</div><div class='add'>+	if (unlikely(nfrags &lt; 0))</div><div class='add'>+		return nfrags;</div><div class='add'>+</div><div class='add'>+	if (unlikely(nfrags + 2 &gt; (MAX_SKB_FRAGS + 2)))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	/* sg may be required by async crypto */</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;sg = kmalloc(sizeof(*ovpn_skb_cb(skb)-&gt;sg) *</div><div class='add'>+				       (nfrags + 2), GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!ovpn_skb_cb(skb)-&gt;sg))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	sg = ovpn_skb_cb(skb)-&gt;sg;</div><div class='add'>+</div><div class='add'>+	/* sg table:</div><div class='add'>+	 * 0: op, wire nonce (AD, len=OVPN_OP_SIZE_V2+OVPN_NONCE_WIRE_SIZE),</div><div class='add'>+	 * 1, 2, 3, ..., n: payload,</div><div class='add'>+	 * n+1: auth_tag (len=tag_size)</div><div class='add'>+	 */</div><div class='add'>+	sg_init_table(sg, nfrags + 2);</div><div class='add'>+</div><div class='add'>+	/* build scatterlist to encrypt packet payload */</div><div class='add'>+	ret = skb_to_sgvec_nomark(skb, sg + 1, 0, skb-&gt;len);</div><div class='add'>+	if (unlikely(ret &lt; 0)) {</div><div class='add'>+		netdev_err(peer-&gt;ovpn-&gt;dev,</div><div class='add'>+			   "encrypt: cannot map skb to sg: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* append auth_tag onto scatterlist */</div><div class='add'>+	__skb_push(skb, tag_size);</div><div class='add'>+	sg_set_buf(sg + ret + 1, skb-&gt;data, tag_size);</div><div class='add'>+</div><div class='add'>+	/* obtain packet ID, which is used both as a first</div><div class='add'>+	 * 4 bytes of nonce and last 4 bytes of associated data.</div><div class='add'>+	 */</div><div class='add'>+	ret = ovpn_pktid_xmit_next(&amp;ks-&gt;pid_xmit, &amp;pktid);</div><div class='add'>+	if (unlikely(ret &lt; 0))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* iv may be required by async crypto */</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;iv = kmalloc(OVPN_NONCE_SIZE, GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!ovpn_skb_cb(skb)-&gt;iv))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	iv = ovpn_skb_cb(skb)-&gt;iv;</div><div class='add'>+</div><div class='add'>+	/* concat 4 bytes packet id and 8 bytes nonce tail into 12 bytes</div><div class='add'>+	 * nonce</div><div class='add'>+	 */</div><div class='add'>+	ovpn_pktid_aead_write(pktid, ks-&gt;nonce_tail_xmit, iv);</div><div class='add'>+</div><div class='add'>+	/* make space for packet id and push it to the front */</div><div class='add'>+	__skb_push(skb, OVPN_NONCE_WIRE_SIZE);</div><div class='add'>+	memcpy(skb-&gt;data, iv, OVPN_NONCE_WIRE_SIZE);</div><div class='add'>+</div><div class='add'>+	/* add packet op as head of additional data */</div><div class='add'>+	op = ovpn_opcode_compose(OVPN_DATA_V2, ks-&gt;key_id, peer-&gt;id);</div><div class='add'>+	__skb_push(skb, OVPN_OPCODE_SIZE);</div><div class='add'>+	BUILD_BUG_ON(sizeof(op) != OVPN_OPCODE_SIZE);</div><div class='add'>+	*((__force __be32 *)skb-&gt;data) = htonl(op);</div><div class='add'>+</div><div class='add'>+	/* AEAD Additional data */</div><div class='add'>+	sg_set_buf(sg, skb-&gt;data, OVPN_AAD_SIZE);</div><div class='add'>+</div><div class='add'>+	req = aead_request_alloc(ks-&gt;encrypt, GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!req))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;req = req;</div><div class='add'>+</div><div class='add'>+	/* setup async crypto operation */</div><div class='add'>+	aead_request_set_tfm(req, ks-&gt;encrypt);</div><div class='add'>+	aead_request_set_callback(req, 0, ovpn_encrypt_post, skb);</div><div class='add'>+	aead_request_set_crypt(req, sg, sg,</div><div class='add'>+			       skb-&gt;len - ovpn_aead_encap_overhead(ks), iv);</div><div class='add'>+	aead_request_set_ad(req, OVPN_AAD_SIZE);</div><div class='add'>+</div><div class='add'>+	/* encrypt it */</div><div class='add'>+	return crypto_aead_encrypt(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_aead_decrypt(struct ovpn_peer *peer, struct ovpn_crypto_key_slot *ks,</div><div class='add'>+		      struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	const unsigned int tag_size = crypto_aead_authsize(ks-&gt;decrypt);</div><div class='add'>+	int ret, payload_len, nfrags;</div><div class='add'>+	unsigned int payload_offset;</div><div class='add'>+	struct aead_request *req;</div><div class='add'>+	struct sk_buff *trailer;</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+	u8 *iv;</div><div class='add'>+</div><div class='add'>+	payload_offset = OVPN_AAD_SIZE + tag_size;</div><div class='add'>+	payload_len = skb-&gt;len - payload_offset;</div><div class='add'>+</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;payload_offset = payload_offset;</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;peer = peer;</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;ks = ks;</div><div class='add'>+</div><div class='add'>+	/* sanity check on packet size, payload size must be &gt;= 0 */</div><div class='add'>+	if (unlikely(payload_len &lt; 0))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Prepare the skb data buffer to be accessed up until the auth tag.</div><div class='add'>+	 * This is required because this area is directly mapped into the sg</div><div class='add'>+	 * list.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!pskb_may_pull(skb, payload_offset)))</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	/* get number of skb frags and ensure that packet data is writable */</div><div class='add'>+	nfrags = skb_cow_data(skb, 0, &amp;trailer);</div><div class='add'>+	if (unlikely(nfrags &lt; 0))</div><div class='add'>+		return nfrags;</div><div class='add'>+</div><div class='add'>+	if (unlikely(nfrags + 2 &gt; (MAX_SKB_FRAGS + 2)))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	/* sg may be required by async crypto */</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;sg = kmalloc(sizeof(*ovpn_skb_cb(skb)-&gt;sg) *</div><div class='add'>+				       (nfrags + 2), GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!ovpn_skb_cb(skb)-&gt;sg))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	sg = ovpn_skb_cb(skb)-&gt;sg;</div><div class='add'>+</div><div class='add'>+	/* sg table:</div><div class='add'>+	 * 0: op, wire nonce (AD, len=OVPN_OPCODE_SIZE+OVPN_NONCE_WIRE_SIZE),</div><div class='add'>+	 * 1, 2, 3, ..., n: payload,</div><div class='add'>+	 * n+1: auth_tag (len=tag_size)</div><div class='add'>+	 */</div><div class='add'>+	sg_init_table(sg, nfrags + 2);</div><div class='add'>+</div><div class='add'>+	/* packet op is head of additional data */</div><div class='add'>+	sg_set_buf(sg, skb-&gt;data, OVPN_AAD_SIZE);</div><div class='add'>+</div><div class='add'>+	/* build scatterlist to decrypt packet payload */</div><div class='add'>+	ret = skb_to_sgvec_nomark(skb, sg + 1, payload_offset, payload_len);</div><div class='add'>+	if (unlikely(ret &lt; 0)) {</div><div class='add'>+		netdev_err(peer-&gt;ovpn-&gt;dev,</div><div class='add'>+			   "decrypt: cannot map skb to sg: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* append auth_tag onto scatterlist */</div><div class='add'>+	sg_set_buf(sg + ret + 1, skb-&gt;data + OVPN_AAD_SIZE, tag_size);</div><div class='add'>+</div><div class='add'>+	/* iv may be required by async crypto */</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;iv = kmalloc(OVPN_NONCE_SIZE, GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!ovpn_skb_cb(skb)-&gt;iv))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	iv = ovpn_skb_cb(skb)-&gt;iv;</div><div class='add'>+</div><div class='add'>+	/* copy nonce into IV buffer */</div><div class='add'>+	memcpy(iv, skb-&gt;data + OVPN_OPCODE_SIZE, OVPN_NONCE_WIRE_SIZE);</div><div class='add'>+	memcpy(iv + OVPN_NONCE_WIRE_SIZE, ks-&gt;nonce_tail_recv,</div><div class='add'>+	       OVPN_NONCE_TAIL_SIZE);</div><div class='add'>+</div><div class='add'>+	req = aead_request_alloc(ks-&gt;decrypt, GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!req))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;req = req;</div><div class='add'>+</div><div class='add'>+	/* setup async crypto operation */</div><div class='add'>+	aead_request_set_tfm(req, ks-&gt;decrypt);</div><div class='add'>+	aead_request_set_callback(req, 0, ovpn_decrypt_post, skb);</div><div class='add'>+	aead_request_set_crypt(req, sg, sg, payload_len + tag_size, iv);</div><div class='add'>+</div><div class='add'>+	aead_request_set_ad(req, OVPN_AAD_SIZE);</div><div class='add'>+</div><div class='add'>+	/* decrypt it */</div><div class='add'>+	return crypto_aead_decrypt(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Initialize a struct crypto_aead object */</div><div class='add'>+static struct crypto_aead *ovpn_aead_init(const char *title,</div><div class='add'>+					  const char *alg_name,</div><div class='add'>+					  const unsigned char *key,</div><div class='add'>+					  unsigned int keylen)</div><div class='add'>+{</div><div class='add'>+	struct crypto_aead *aead;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	aead = crypto_alloc_aead(alg_name, 0, 0);</div><div class='add'>+	if (IS_ERR(aead)) {</div><div class='add'>+		ret = PTR_ERR(aead);</div><div class='add'>+		pr_err("%s crypto_alloc_aead failed, err=%d\n", title, ret);</div><div class='add'>+		aead = NULL;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = crypto_aead_setkey(aead, key, keylen);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("%s crypto_aead_setkey size=%u failed, err=%d\n", title,</div><div class='add'>+		       keylen, ret);</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = crypto_aead_setauthsize(aead, OVPN_AUTH_TAG_SIZE);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("%s crypto_aead_setauthsize failed, err=%d\n", title,</div><div class='add'>+		       ret);</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* basic AEAD assumption */</div><div class='add'>+	if (crypto_aead_ivsize(aead) != OVPN_NONCE_SIZE) {</div><div class='add'>+		pr_err("%s IV size must be %d\n", title, OVPN_NONCE_SIZE);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr_debug("********* Cipher %s (%s)\n", alg_name, title);</div><div class='add'>+	pr_debug("*** IV size=%u\n", crypto_aead_ivsize(aead));</div><div class='add'>+	pr_debug("*** req size=%u\n", crypto_aead_reqsize(aead));</div><div class='add'>+	pr_debug("*** block size=%u\n", crypto_aead_blocksize(aead));</div><div class='add'>+	pr_debug("*** auth size=%u\n", crypto_aead_authsize(aead));</div><div class='add'>+	pr_debug("*** alignmask=0x%x\n", crypto_aead_alignmask(aead));</div><div class='add'>+</div><div class='add'>+	return aead;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	crypto_free_aead(aead);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_aead_crypto_key_slot_destroy(struct ovpn_crypto_key_slot *ks)</div><div class='add'>+{</div><div class='add'>+	if (!ks)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	crypto_free_aead(ks-&gt;encrypt);</div><div class='add'>+	crypto_free_aead(ks-&gt;decrypt);</div><div class='add'>+	kfree(ks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ovpn_crypto_key_slot *</div><div class='add'>+ovpn_aead_crypto_key_slot_new(const struct ovpn_key_config *kc)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks = NULL;</div><div class='add'>+	const char *alg_name;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* validate crypto alg */</div><div class='add'>+	switch (kc-&gt;cipher_alg) {</div><div class='add'>+	case OVPN_CIPHER_ALG_AES_GCM:</div><div class='add'>+		alg_name = ALG_NAME_AES;</div><div class='add'>+		break;</div><div class='add'>+	case OVPN_CIPHER_ALG_CHACHA20_POLY1305:</div><div class='add'>+		alg_name = ALG_NAME_CHACHAPOLY;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return ERR_PTR(-EOPNOTSUPP);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (kc-&gt;encrypt.nonce_tail_size != OVPN_NONCE_TAIL_SIZE ||</div><div class='add'>+	    kc-&gt;decrypt.nonce_tail_size != OVPN_NONCE_TAIL_SIZE)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	/* build the key slot */</div><div class='add'>+	ks = kmalloc(sizeof(*ks), GFP_KERNEL);</div><div class='add'>+	if (!ks)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	ks-&gt;encrypt = NULL;</div><div class='add'>+	ks-&gt;decrypt = NULL;</div><div class='add'>+	kref_init(&amp;ks-&gt;refcount);</div><div class='add'>+	ks-&gt;key_id = kc-&gt;key_id;</div><div class='add'>+</div><div class='add'>+	ks-&gt;encrypt = ovpn_aead_init("encrypt", alg_name,</div><div class='add'>+				     kc-&gt;encrypt.cipher_key,</div><div class='add'>+				     kc-&gt;encrypt.cipher_key_size);</div><div class='add'>+	if (IS_ERR(ks-&gt;encrypt)) {</div><div class='add'>+		ret = PTR_ERR(ks-&gt;encrypt);</div><div class='add'>+		ks-&gt;encrypt = NULL;</div><div class='add'>+		goto destroy_ks;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ks-&gt;decrypt = ovpn_aead_init("decrypt", alg_name,</div><div class='add'>+				     kc-&gt;decrypt.cipher_key,</div><div class='add'>+				     kc-&gt;decrypt.cipher_key_size);</div><div class='add'>+	if (IS_ERR(ks-&gt;decrypt)) {</div><div class='add'>+		ret = PTR_ERR(ks-&gt;decrypt);</div><div class='add'>+		ks-&gt;decrypt = NULL;</div><div class='add'>+		goto destroy_ks;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(ks-&gt;nonce_tail_xmit, kc-&gt;encrypt.nonce_tail,</div><div class='add'>+	       OVPN_NONCE_TAIL_SIZE);</div><div class='add'>+	memcpy(ks-&gt;nonce_tail_recv, kc-&gt;decrypt.nonce_tail,</div><div class='add'>+	       OVPN_NONCE_TAIL_SIZE);</div><div class='add'>+</div><div class='add'>+	/* init packet ID generation/validation */</div><div class='add'>+	ovpn_pktid_xmit_init(&amp;ks-&gt;pid_xmit);</div><div class='add'>+	ovpn_pktid_recv_init(&amp;ks-&gt;pid_recv);</div><div class='add'>+</div><div class='add'>+	return ks;</div><div class='add'>+</div><div class='add'>+destroy_ks:</div><div class='add'>+	ovpn_aead_crypto_key_slot_destroy(ks);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum ovpn_cipher_alg ovpn_aead_crypto_alg(struct ovpn_crypto_key_slot *ks)</div><div class='add'>+{</div><div class='add'>+	const char *alg_name;</div><div class='add'>+</div><div class='add'>+	if (!ks-&gt;encrypt)</div><div class='add'>+		return OVPN_CIPHER_ALG_NONE;</div><div class='add'>+</div><div class='add'>+	alg_name = crypto_tfm_alg_name(crypto_aead_tfm(ks-&gt;encrypt));</div><div class='add'>+</div><div class='add'>+	if (!strcmp(alg_name, ALG_NAME_AES))</div><div class='add'>+		return OVPN_CIPHER_ALG_AES_GCM;</div><div class='add'>+	else if (!strcmp(alg_name, ALG_NAME_CHACHAPOLY))</div><div class='add'>+		return OVPN_CIPHER_ALG_CHACHA20_POLY1305;</div><div class='add'>+	else</div><div class='add'>+		return OVPN_CIPHER_ALG_NONE;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/crypto_aead.h b/drivers/net/ovpn/crypto_aead.h<br/>new file mode 100644<br/>index 000000000000..65a2ff307898<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/crypto_aead.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/crypto_aead.h</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_OVPNAEAD_H_</div><div class='add'>+#define _NET_OVPN_OVPNAEAD_H_</div><div class='add'>+</div><div class='add'>+#include "crypto.h"</div><div class='add'>+</div><div class='add'>+#include &lt;asm/types.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+</div><div class='add'>+int ovpn_aead_encrypt(struct ovpn_peer *peer, struct ovpn_crypto_key_slot *ks,</div><div class='add'>+		      struct sk_buff *skb);</div><div class='add'>+int ovpn_aead_decrypt(struct ovpn_peer *peer, struct ovpn_crypto_key_slot *ks,</div><div class='add'>+		      struct sk_buff *skb);</div><div class='add'>+</div><div class='add'>+struct ovpn_crypto_key_slot *</div><div class='add'>+ovpn_aead_crypto_key_slot_new(const struct ovpn_key_config *kc);</div><div class='add'>+void ovpn_aead_crypto_key_slot_destroy(struct ovpn_crypto_key_slot *ks);</div><div class='add'>+</div><div class='add'>+enum ovpn_cipher_alg ovpn_aead_crypto_alg(struct ovpn_crypto_key_slot *ks);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_OVPNAEAD_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/io.c b/drivers/net/ovpn/io.c<br/>new file mode 100644<br/>index 000000000000..3e9e7f8444b3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/io.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/io.c</a></div><div class='hunk'>@@ -0,0 +1,465 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2019-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;crypto/aead.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;net/gro_cells.h&gt;</div><div class='add'>+#include &lt;net/gso.h&gt;</div><div class='add'>+#include &lt;net/ip.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "peer.h"</div><div class='add'>+#include "io.h"</div><div class='add'>+#include "bind.h"</div><div class='add'>+#include "crypto.h"</div><div class='add'>+#include "crypto_aead.h"</div><div class='add'>+#include "netlink.h"</div><div class='add'>+#include "proto.h"</div><div class='add'>+#include "tcp.h"</div><div class='add'>+#include "udp.h"</div><div class='add'>+#include "skb.h"</div><div class='add'>+#include "socket.h"</div><div class='add'>+</div><div class='add'>+const unsigned char ovpn_keepalive_message[OVPN_KEEPALIVE_SIZE] = {</div><div class='add'>+	0x2a, 0x18, 0x7b, 0xf3, 0x64, 0x1e, 0xb4, 0xcb,</div><div class='add'>+	0x07, 0xed, 0x2d, 0x0a, 0x98, 0x1f, 0xc7, 0x48</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_is_keepalive - check if skb contains a keepalive message</div><div class='add'>+ * @skb: packet to check</div><div class='add'>+ *</div><div class='add'>+ * Assumes that the first byte of skb-&gt;data is defined.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if skb contains a keepalive or false otherwise</div><div class='add'>+ */</div><div class='add'>+static bool ovpn_is_keepalive(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (*skb-&gt;data != ovpn_keepalive_message[0])</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;len != OVPN_KEEPALIVE_SIZE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!pskb_may_pull(skb, OVPN_KEEPALIVE_SIZE))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !memcmp(skb-&gt;data, ovpn_keepalive_message, OVPN_KEEPALIVE_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called after decrypt to write the IP packet to the device.</div><div class='add'>+ * This method is expected to manage/free the skb.</div><div class='add'>+ */</div><div class='add'>+static void ovpn_netdev_write(struct ovpn_peer *peer, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	unsigned int pkt_len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * GSO state from the transport layer is not valid for the tunnel/data</div><div class='add'>+	 * path. Reset all GSO fields to prevent any further GSO processing</div><div class='add'>+	 * from entering an inconsistent state.</div><div class='add'>+	 */</div><div class='add'>+	skb_gso_reset(skb);</div><div class='add'>+</div><div class='add'>+	/* we can't guarantee the packet wasn't corrupted before entering the</div><div class='add'>+	 * VPN, therefore we give other layers a chance to check that</div><div class='add'>+	 */</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+</div><div class='add'>+	/* skb hash for transport packet no longer valid after decapsulation */</div><div class='add'>+	skb_clear_hash(skb);</div><div class='add'>+</div><div class='add'>+	/* post-decrypt scrub -- prepare to inject encapsulated packet onto the</div><div class='add'>+	 * interface, based on __skb_tunnel_rx() in dst.h</div><div class='add'>+	 */</div><div class='add'>+	skb-&gt;dev = peer-&gt;ovpn-&gt;dev;</div><div class='add'>+	skb_set_queue_mapping(skb, 0);</div><div class='add'>+	skb_scrub_packet(skb, true);</div><div class='add'>+</div><div class='add'>+	/* network header reset in ovpn_decrypt_post() */</div><div class='add'>+	skb_reset_transport_header(skb);</div><div class='add'>+	skb_reset_inner_headers(skb);</div><div class='add'>+</div><div class='add'>+	/* cause packet to be "received" by the interface */</div><div class='add'>+	pkt_len = skb-&gt;len;</div><div class='add'>+	ret = gro_cells_receive(&amp;peer-&gt;ovpn-&gt;gro_cells, skb);</div><div class='add'>+	if (likely(ret == NET_RX_SUCCESS)) {</div><div class='add'>+		/* update RX stats with the size of decrypted packet */</div><div class='add'>+		ovpn_peer_stats_increment_rx(&amp;peer-&gt;vpn_stats, pkt_len);</div><div class='add'>+		dev_dstats_rx_add(peer-&gt;ovpn-&gt;dev, pkt_len);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_decrypt_post(void *data, int ret)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+	unsigned int payload_offset = 0;</div><div class='add'>+	struct sk_buff *skb = data;</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	__be16 proto;</div><div class='add'>+	__be32 *pid;</div><div class='add'>+</div><div class='add'>+	/* crypto is happening asynchronously. this function will be called</div><div class='add'>+	 * again later by the crypto callback with a proper return code</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(ret == -EINPROGRESS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	payload_offset = ovpn_skb_cb(skb)-&gt;payload_offset;</div><div class='add'>+	ks = ovpn_skb_cb(skb)-&gt;ks;</div><div class='add'>+	peer = ovpn_skb_cb(skb)-&gt;peer;</div><div class='add'>+</div><div class='add'>+	/* crypto is done, cleanup skb CB and its members */</div><div class='add'>+	kfree(ovpn_skb_cb(skb)-&gt;iv);</div><div class='add'>+	kfree(ovpn_skb_cb(skb)-&gt;sg);</div><div class='add'>+	aead_request_free(ovpn_skb_cb(skb)-&gt;req);</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret &lt; 0))</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	/* PID sits after the op */</div><div class='add'>+	pid = (__force __be32 *)(skb-&gt;data + OVPN_OPCODE_SIZE);</div><div class='add'>+	ret = ovpn_pktid_recv(&amp;ks-&gt;pid_recv, ntohl(*pid), 0);</div><div class='add'>+	if (unlikely(ret &lt; 0)) {</div><div class='add'>+		net_err_ratelimited("%s: PKT ID RX error for peer %u: %d\n",</div><div class='add'>+				    netdev_name(peer-&gt;ovpn-&gt;dev), peer-&gt;id,</div><div class='add'>+				    ret);</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* keep track of last received authenticated packet for keepalive */</div><div class='add'>+	WRITE_ONCE(peer-&gt;last_recv, ktime_get_real_seconds());</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference(peer-&gt;sock);</div><div class='add'>+	if (sock &amp;&amp; sock-&gt;sk-&gt;sk_protocol == IPPROTO_UDP)</div><div class='add'>+		/* check if this peer changed local or remote endpoint */</div><div class='add'>+		ovpn_peer_endpoints_update(peer, skb);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	/* point to encapsulated IP packet */</div><div class='add'>+	__skb_pull(skb, payload_offset);</div><div class='add'>+</div><div class='add'>+	/* check if this is a valid datapacket that has to be delivered to the</div><div class='add'>+	 * ovpn interface</div><div class='add'>+	 */</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+	proto = ovpn_ip_check_protocol(skb);</div><div class='add'>+	if (unlikely(!proto)) {</div><div class='add'>+		/* check if null packet */</div><div class='add'>+		if (unlikely(!pskb_may_pull(skb, 1))) {</div><div class='add'>+			net_info_ratelimited("%s: NULL packet received from peer %u\n",</div><div class='add'>+					     netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+					     peer-&gt;id);</div><div class='add'>+			goto drop;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ovpn_is_keepalive(skb)) {</div><div class='add'>+			net_dbg_ratelimited("%s: ping received from peer %u\n",</div><div class='add'>+					    netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+					    peer-&gt;id);</div><div class='add'>+			/* we drop the packet, but this is not a failure */</div><div class='add'>+			consume_skb(skb);</div><div class='add'>+			goto drop_nocount;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		net_info_ratelimited("%s: unsupported protocol received from peer %u\n",</div><div class='add'>+				     netdev_name(peer-&gt;ovpn-&gt;dev), peer-&gt;id);</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+	skb-&gt;protocol = proto;</div><div class='add'>+</div><div class='add'>+	/* perform Reverse Path Filtering (RPF) */</div><div class='add'>+	if (unlikely(!ovpn_peer_check_by_src(peer-&gt;ovpn, skb, peer))) {</div><div class='add'>+		if (skb-&gt;protocol == htons(ETH_P_IPV6))</div><div class='add'>+			net_dbg_ratelimited("%s: RPF dropped packet from peer %u, src: %pI6c\n",</div><div class='add'>+					    netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+					    peer-&gt;id, &amp;ipv6_hdr(skb)-&gt;saddr);</div><div class='add'>+		else</div><div class='add'>+			net_dbg_ratelimited("%s: RPF dropped packet from peer %u, src: %pI4\n",</div><div class='add'>+					    netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+					    peer-&gt;id, &amp;ip_hdr(skb)-&gt;saddr);</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn_netdev_write(peer, skb);</div><div class='add'>+	/* skb is passed to upper layer - don't free it */</div><div class='add'>+	skb = NULL;</div><div class='add'>+drop:</div><div class='add'>+	if (unlikely(skb))</div><div class='add'>+		dev_dstats_rx_dropped(peer-&gt;ovpn-&gt;dev);</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+drop_nocount:</div><div class='add'>+	if (likely(peer))</div><div class='add'>+		ovpn_peer_put(peer);</div><div class='add'>+	if (likely(ks))</div><div class='add'>+		ovpn_crypto_key_slot_put(ks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* RX path entry point: decrypt packet and forward it to the device */</div><div class='add'>+void ovpn_recv(struct ovpn_peer *peer, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+	u8 key_id;</div><div class='add'>+</div><div class='add'>+	ovpn_peer_stats_increment_rx(&amp;peer-&gt;link_stats, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* get the key slot matching the key ID in the received packet */</div><div class='add'>+	key_id = ovpn_key_id_from_skb(skb);</div><div class='add'>+	ks = ovpn_crypto_key_id_to_slot(&amp;peer-&gt;crypto, key_id);</div><div class='add'>+	if (unlikely(!ks)) {</div><div class='add'>+		net_info_ratelimited("%s: no available key for peer %u, key-id: %u\n",</div><div class='add'>+				     netdev_name(peer-&gt;ovpn-&gt;dev), peer-&gt;id,</div><div class='add'>+				     key_id);</div><div class='add'>+		dev_dstats_rx_dropped(peer-&gt;ovpn-&gt;dev);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		ovpn_peer_put(peer);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(ovpn_skb_cb(skb), 0, sizeof(struct ovpn_cb));</div><div class='add'>+	ovpn_decrypt_post(skb, ovpn_aead_decrypt(peer, ks, skb));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_encrypt_post(void *data, int ret)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+	struct sk_buff *skb = data;</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	unsigned int orig_len;</div><div class='add'>+</div><div class='add'>+	/* encryption is happening asynchronously. This function will be</div><div class='add'>+	 * called later by the crypto callback with a proper return value</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(ret == -EINPROGRESS))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ks = ovpn_skb_cb(skb)-&gt;ks;</div><div class='add'>+	peer = ovpn_skb_cb(skb)-&gt;peer;</div><div class='add'>+</div><div class='add'>+	/* crypto is done, cleanup skb CB and its members */</div><div class='add'>+	kfree(ovpn_skb_cb(skb)-&gt;iv);</div><div class='add'>+	kfree(ovpn_skb_cb(skb)-&gt;sg);</div><div class='add'>+	aead_request_free(ovpn_skb_cb(skb)-&gt;req);</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret == -ERANGE)) {</div><div class='add'>+		/* we ran out of IVs and we must kill the key as it can't be</div><div class='add'>+		 * use anymore</div><div class='add'>+		 */</div><div class='add'>+		netdev_warn(peer-&gt;ovpn-&gt;dev,</div><div class='add'>+			    "killing key %u for peer %u\n", ks-&gt;key_id,</div><div class='add'>+			    peer-&gt;id);</div><div class='add'>+		if (ovpn_crypto_kill_key(&amp;peer-&gt;crypto, ks-&gt;key_id))</div><div class='add'>+			/* let userspace know so that a new key must be negotiated */</div><div class='add'>+			ovpn_nl_key_swap_notify(peer, ks-&gt;key_id);</div><div class='add'>+</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret &lt; 0))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	skb_mark_not_on_list(skb);</div><div class='add'>+	orig_len = skb-&gt;len;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference(peer-&gt;sock);</div><div class='add'>+	if (unlikely(!sock))</div><div class='add'>+		goto err_unlock;</div><div class='add'>+</div><div class='add'>+	switch (sock-&gt;sk-&gt;sk_protocol) {</div><div class='add'>+	case IPPROTO_UDP:</div><div class='add'>+		ovpn_udp_send_skb(peer, sock-&gt;sk, skb);</div><div class='add'>+		break;</div><div class='add'>+	case IPPROTO_TCP:</div><div class='add'>+		ovpn_tcp_send_skb(peer, sock-&gt;sk, skb);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* no transport configured yet */</div><div class='add'>+		goto err_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn_peer_stats_increment_tx(&amp;peer-&gt;link_stats, orig_len);</div><div class='add'>+	/* keep track of last sent packet for keepalive */</div><div class='add'>+	WRITE_ONCE(peer-&gt;last_sent, ktime_get_real_seconds());</div><div class='add'>+	/* skb passed down the stack - don't free it */</div><div class='add'>+	skb = NULL;</div><div class='add'>+err_unlock:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+err:</div><div class='add'>+	if (unlikely(skb))</div><div class='add'>+		dev_dstats_tx_dropped(peer-&gt;ovpn-&gt;dev);</div><div class='add'>+	if (likely(peer))</div><div class='add'>+		ovpn_peer_put(peer);</div><div class='add'>+	if (likely(ks))</div><div class='add'>+		ovpn_crypto_key_slot_put(ks);</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ovpn_encrypt_one(struct ovpn_peer *peer, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+</div><div class='add'>+	/* get primary key to be used for encrypting data */</div><div class='add'>+	ks = ovpn_crypto_key_slot_primary(&amp;peer-&gt;crypto);</div><div class='add'>+	if (unlikely(!ks))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* take a reference to the peer because the crypto code may run async.</div><div class='add'>+	 * ovpn_encrypt_post() will release it upon completion</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!ovpn_peer_hold(peer))) {</div><div class='add'>+		DEBUG_NET_WARN_ON_ONCE(1);</div><div class='add'>+		ovpn_crypto_key_slot_put(ks);</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(ovpn_skb_cb(skb), 0, sizeof(struct ovpn_cb));</div><div class='add'>+	ovpn_encrypt_post(skb, ovpn_aead_encrypt(peer, ks, skb));</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* send skb to connected peer, if any */</div><div class='add'>+static void ovpn_send(struct ovpn_priv *ovpn, struct sk_buff *skb,</div><div class='add'>+		      struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *curr, *next;</div><div class='add'>+</div><div class='add'>+	/* this might be a GSO-segmented skb list: process each skb</div><div class='add'>+	 * independently</div><div class='add'>+	 */</div><div class='add'>+	skb_list_walk_safe(skb, curr, next) {</div><div class='add'>+		if (unlikely(!ovpn_encrypt_one(peer, curr))) {</div><div class='add'>+			dev_dstats_tx_dropped(ovpn-&gt;dev);</div><div class='add'>+			kfree_skb(curr);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Send user data to the network</div><div class='add'>+ */</div><div class='add'>+netdev_tx_t ovpn_net_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn = netdev_priv(dev);</div><div class='add'>+	struct sk_buff *segments, *curr, *next;</div><div class='add'>+	struct sk_buff_head skb_list;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	__be16 proto;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* reset netfilter state */</div><div class='add'>+	nf_reset_ct(skb);</div><div class='add'>+</div><div class='add'>+	/* verify IP header size in network packet */</div><div class='add'>+	proto = ovpn_ip_check_protocol(skb);</div><div class='add'>+	if (unlikely(!proto || skb-&gt;protocol != proto))</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	if (skb_is_gso(skb)) {</div><div class='add'>+		segments = skb_gso_segment(skb, 0);</div><div class='add'>+		if (IS_ERR(segments)) {</div><div class='add'>+			ret = PTR_ERR(segments);</div><div class='add'>+			net_err_ratelimited("%s: cannot segment payload packet: %d\n",</div><div class='add'>+					    netdev_name(dev), ret);</div><div class='add'>+			goto drop;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		consume_skb(skb);</div><div class='add'>+		skb = segments;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* from this moment on, "skb" might be a list */</div><div class='add'>+</div><div class='add'>+	__skb_queue_head_init(&amp;skb_list);</div><div class='add'>+	skb_list_walk_safe(skb, curr, next) {</div><div class='add'>+		skb_mark_not_on_list(curr);</div><div class='add'>+</div><div class='add'>+		curr = skb_share_check(curr, GFP_ATOMIC);</div><div class='add'>+		if (unlikely(!curr)) {</div><div class='add'>+			net_err_ratelimited("%s: skb_share_check failed for payload packet\n",</div><div class='add'>+					    netdev_name(dev));</div><div class='add'>+			dev_dstats_tx_dropped(ovpn-&gt;dev);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		__skb_queue_tail(&amp;skb_list, curr);</div><div class='add'>+	}</div><div class='add'>+	skb_list.prev-&gt;next = NULL;</div><div class='add'>+</div><div class='add'>+	/* retrieve peer serving the destination IP of this packet */</div><div class='add'>+	peer = ovpn_peer_get_by_dst(ovpn, skb);</div><div class='add'>+	if (unlikely(!peer)) {</div><div class='add'>+		switch (skb-&gt;protocol) {</div><div class='add'>+		case htons(ETH_P_IP):</div><div class='add'>+			net_dbg_ratelimited("%s: no peer to send data to dst=%pI4\n",</div><div class='add'>+					    netdev_name(ovpn-&gt;dev),</div><div class='add'>+					    &amp;ip_hdr(skb)-&gt;daddr);</div><div class='add'>+			break;</div><div class='add'>+		case htons(ETH_P_IPV6):</div><div class='add'>+			net_dbg_ratelimited("%s: no peer to send data to dst=%pI6c\n",</div><div class='add'>+					    netdev_name(ovpn-&gt;dev),</div><div class='add'>+					    &amp;ipv6_hdr(skb)-&gt;daddr);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+	/* dst was needed for peer selection - it can now be dropped */</div><div class='add'>+	skb_dst_drop(skb);</div><div class='add'>+</div><div class='add'>+	ovpn_peer_stats_increment_tx(&amp;peer-&gt;vpn_stats, skb-&gt;len);</div><div class='add'>+	ovpn_send(ovpn, skb_list.next, peer);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+drop:</div><div class='add'>+	dev_dstats_tx_dropped(ovpn-&gt;dev);</div><div class='add'>+	skb_tx_error(skb);</div><div class='add'>+	kfree_skb_list(skb);</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_xmit_special - encrypt and transmit an out-of-band message to peer</div><div class='add'>+ * @peer: peer to send the message to</div><div class='add'>+ * @data: message content</div><div class='add'>+ * @len: message length</div><div class='add'>+ *</div><div class='add'>+ * Assumes that caller holds a reference to peer, which will be</div><div class='add'>+ * passed to ovpn_send()</div><div class='add'>+ */</div><div class='add'>+void ovpn_xmit_special(struct ovpn_peer *peer, const void *data,</div><div class='add'>+		       const unsigned int len)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	ovpn = peer-&gt;ovpn;</div><div class='add'>+	if (unlikely(!ovpn)) {</div><div class='add'>+		ovpn_peer_put(peer);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = alloc_skb(256 + len, GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		ovpn_peer_put(peer);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_reserve(skb, 128);</div><div class='add'>+	skb-&gt;priority = TC_PRIO_BESTEFFORT;</div><div class='add'>+	__skb_put_data(skb, data, len);</div><div class='add'>+</div><div class='add'>+	ovpn_send(ovpn, skb, peer);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/io.h b/drivers/net/ovpn/io.h<br/>new file mode 100644<br/>index 000000000000..db9e10f9077c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/io.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/io.h</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2019-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_OVPN_H_</div><div class='add'>+#define _NET_OVPN_OVPN_H_</div><div class='add'>+</div><div class='add'>+/* DATA_V2 header size with AEAD encryption */</div><div class='add'>+#define OVPN_HEAD_ROOM (OVPN_OPCODE_SIZE + OVPN_NONCE_WIRE_SIZE +	   \</div><div class='add'>+			16 /* AEAD TAG length */ +			   \</div><div class='add'>+			max(sizeof(struct udphdr), sizeof(struct tcphdr)) +\</div><div class='add'>+			max(sizeof(struct ipv6hdr), sizeof(struct iphdr)))</div><div class='add'>+</div><div class='add'>+/* max padding required by encryption */</div><div class='add'>+#define OVPN_MAX_PADDING 16</div><div class='add'>+</div><div class='add'>+#define OVPN_KEEPALIVE_SIZE 16</div><div class='add'>+extern const unsigned char ovpn_keepalive_message[OVPN_KEEPALIVE_SIZE];</div><div class='add'>+</div><div class='add'>+netdev_tx_t ovpn_net_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='add'>+</div><div class='add'>+void ovpn_recv(struct ovpn_peer *peer, struct sk_buff *skb);</div><div class='add'>+void ovpn_xmit_special(struct ovpn_peer *peer, const void *data,</div><div class='add'>+		       const unsigned int len);</div><div class='add'>+</div><div class='add'>+void ovpn_encrypt_post(void *data, int ret);</div><div class='add'>+void ovpn_decrypt_post(void *data, int ret);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_OVPN_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/main.c b/drivers/net/ovpn/main.c<br/>new file mode 100644<br/>index 000000000000..1bb1afe766a4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/main.c</a></div><div class='hunk'>@@ -0,0 +1,279 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ *		James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/genetlink.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/inetdevice.h&gt;</div><div class='add'>+#include &lt;net/gro_cells.h&gt;</div><div class='add'>+#include &lt;net/ip.h&gt;</div><div class='add'>+#include &lt;net/rtnetlink.h&gt;</div><div class='add'>+#include &lt;uapi/linux/if_arp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "main.h"</div><div class='add'>+#include "netlink.h"</div><div class='add'>+#include "io.h"</div><div class='add'>+#include "peer.h"</div><div class='add'>+#include "proto.h"</div><div class='add'>+#include "tcp.h"</div><div class='add'>+#include "udp.h"</div><div class='add'>+</div><div class='add'>+static void ovpn_priv_free(struct net_device *net)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn = netdev_priv(net);</div><div class='add'>+</div><div class='add'>+	kfree(ovpn-&gt;peers);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_mp_alloc(struct ovpn_priv *ovpn)</div><div class='add'>+{</div><div class='add'>+	struct in_device *dev_v4;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (ovpn-&gt;mode != OVPN_MODE_MP)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev_v4 = __in_dev_get_rtnl(ovpn-&gt;dev);</div><div class='add'>+	if (dev_v4) {</div><div class='add'>+		/* disable redirects as Linux gets confused by ovpn</div><div class='add'>+		 * handling same-LAN routing.</div><div class='add'>+		 * This happens because a multipeer interface is used as</div><div class='add'>+		 * relay point between hosts in the same subnet, while</div><div class='add'>+		 * in a classic LAN this would not be needed because the</div><div class='add'>+		 * two hosts would be able to talk directly.</div><div class='add'>+		 */</div><div class='add'>+		IN_DEV_CONF_SET(dev_v4, SEND_REDIRECTS, false);</div><div class='add'>+		IPV4_DEVCONF_ALL(dev_net(ovpn-&gt;dev), SEND_REDIRECTS) = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* the peer container is fairly large, therefore we allocate it only in</div><div class='add'>+	 * MP mode</div><div class='add'>+	 */</div><div class='add'>+	ovpn-&gt;peers = kzalloc(sizeof(*ovpn-&gt;peers), GFP_KERNEL);</div><div class='add'>+	if (!ovpn-&gt;peers)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ovpn-&gt;peers-&gt;by_id); i++) {</div><div class='add'>+		INIT_HLIST_HEAD(&amp;ovpn-&gt;peers-&gt;by_id[i]);</div><div class='add'>+		INIT_HLIST_NULLS_HEAD(&amp;ovpn-&gt;peers-&gt;by_vpn_addr4[i], i);</div><div class='add'>+		INIT_HLIST_NULLS_HEAD(&amp;ovpn-&gt;peers-&gt;by_vpn_addr6[i], i);</div><div class='add'>+		INIT_HLIST_NULLS_HEAD(&amp;ovpn-&gt;peers-&gt;by_transp_addr[i], i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_net_init(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn = netdev_priv(dev);</div><div class='add'>+	int err = gro_cells_init(&amp;ovpn-&gt;gro_cells, dev);</div><div class='add'>+</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ovpn_mp_alloc(ovpn);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		gro_cells_destroy(&amp;ovpn-&gt;gro_cells);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_net_uninit(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	gro_cells_destroy(&amp;ovpn-&gt;gro_cells);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops ovpn_netdev_ops = {</div><div class='add'>+	.ndo_init		= ovpn_net_init,</div><div class='add'>+	.ndo_uninit		= ovpn_net_uninit,</div><div class='add'>+	.ndo_start_xmit		= ovpn_net_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct device_type ovpn_type = {</div><div class='add'>+	.name = OVPN_FAMILY_NAME,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct nla_policy ovpn_policy[IFLA_OVPN_MAX + 1] = {</div><div class='add'>+	[IFLA_OVPN_MODE] = NLA_POLICY_RANGE(NLA_U8, OVPN_MODE_P2P,</div><div class='add'>+					    OVPN_MODE_MP),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_dev_is_valid - check if the netdevice is of type 'ovpn'</div><div class='add'>+ * @dev: the interface to check</div><div class='add'>+ *</div><div class='add'>+ * Return: whether the netdevice is of type 'ovpn'</div><div class='add'>+ */</div><div class='add'>+bool ovpn_dev_is_valid(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;netdev_ops == &amp;ovpn_netdev_ops;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_get_drvinfo(struct net_device *dev,</div><div class='add'>+			     struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	strscpy(info-&gt;driver, "ovpn", sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;bus_info, "ovpn", sizeof(info-&gt;bus_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops ovpn_ethtool_ops = {</div><div class='add'>+	.get_drvinfo		= ovpn_get_drvinfo,</div><div class='add'>+	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ovpn_setup(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	netdev_features_t feat = NETIF_F_SG | NETIF_F_GSO |</div><div class='add'>+				 NETIF_F_GSO_SOFTWARE | NETIF_F_HIGHDMA;</div><div class='add'>+</div><div class='add'>+	dev-&gt;needs_free_netdev = true;</div><div class='add'>+</div><div class='add'>+	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_DSTATS;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;ovpn_ethtool_ops;</div><div class='add'>+	dev-&gt;netdev_ops = &amp;ovpn_netdev_ops;</div><div class='add'>+</div><div class='add'>+	dev-&gt;priv_destructor = ovpn_priv_free;</div><div class='add'>+</div><div class='add'>+	dev-&gt;hard_header_len = 0;</div><div class='add'>+	dev-&gt;addr_len = 0;</div><div class='add'>+	dev-&gt;mtu = ETH_DATA_LEN - OVPN_HEAD_ROOM;</div><div class='add'>+	dev-&gt;min_mtu = IPV4_MIN_MTU;</div><div class='add'>+	dev-&gt;max_mtu = IP_MAX_MTU - OVPN_HEAD_ROOM;</div><div class='add'>+</div><div class='add'>+	dev-&gt;type = ARPHRD_NONE;</div><div class='add'>+	dev-&gt;flags = IFF_POINTOPOINT | IFF_NOARP;</div><div class='add'>+	dev-&gt;priv_flags |= IFF_NO_QUEUE;</div><div class='add'>+	/* when routing packets to a LAN behind a client, we rely on the</div><div class='add'>+	 * route entry that originally brought the packet into ovpn, so</div><div class='add'>+	 * don't release it</div><div class='add'>+	 */</div><div class='add'>+	netif_keep_dst(dev);</div><div class='add'>+</div><div class='add'>+	dev-&gt;lltx = true;</div><div class='add'>+	dev-&gt;features |= feat;</div><div class='add'>+	dev-&gt;hw_features |= feat;</div><div class='add'>+	dev-&gt;hw_enc_features |= feat;</div><div class='add'>+</div><div class='add'>+	dev-&gt;needed_headroom = ALIGN(OVPN_HEAD_ROOM, 4);</div><div class='add'>+	dev-&gt;needed_tailroom = OVPN_MAX_PADDING;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEVTYPE(dev, &amp;ovpn_type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_newlink(struct net_device *dev,</div><div class='add'>+			struct rtnl_newlink_params *params,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn = netdev_priv(dev);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	enum ovpn_mode mode = OVPN_MODE_P2P;</div><div class='add'>+</div><div class='add'>+	if (data &amp;&amp; data[IFLA_OVPN_MODE]) {</div><div class='add'>+		mode = nla_get_u8(data[IFLA_OVPN_MODE]);</div><div class='add'>+		netdev_dbg(dev, "setting device mode: %u\n", mode);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn-&gt;dev = dev;</div><div class='add'>+	ovpn-&gt;mode = mode;</div><div class='add'>+	spin_lock_init(&amp;ovpn-&gt;lock);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;ovpn-&gt;keepalive_work, ovpn_peer_keepalive_work);</div><div class='add'>+</div><div class='add'>+	/* Set carrier explicitly after registration, this way state is</div><div class='add'>+	 * clearly defined.</div><div class='add'>+	 *</div><div class='add'>+	 * In case of MP interfaces we keep the carrier always on.</div><div class='add'>+	 *</div><div class='add'>+	 * Carrier for P2P interfaces is initially off and it is then</div><div class='add'>+	 * switched on and off when the remote peer is added or deleted.</div><div class='add'>+	 */</div><div class='add'>+	if (ovpn-&gt;mode == OVPN_MODE_MP)</div><div class='add'>+		netif_carrier_on(dev);</div><div class='add'>+	else</div><div class='add'>+		netif_carrier_off(dev);</div><div class='add'>+</div><div class='add'>+	return register_netdevice(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_dellink(struct net_device *dev, struct list_head *head)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;ovpn-&gt;keepalive_work);</div><div class='add'>+	ovpn_peers_free(ovpn, NULL, OVPN_DEL_PEER_REASON_TEARDOWN);</div><div class='add'>+	unregister_netdevice_queue(dev, head);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (nla_put_u8(skb, IFLA_OVPN_MODE, ovpn-&gt;mode))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct rtnl_link_ops ovpn_link_ops = {</div><div class='add'>+	.kind = "ovpn",</div><div class='add'>+	.netns_refund = false,</div><div class='add'>+	.priv_size = sizeof(struct ovpn_priv),</div><div class='add'>+	.setup = ovpn_setup,</div><div class='add'>+	.policy = ovpn_policy,</div><div class='add'>+	.maxtype = IFLA_OVPN_MAX,</div><div class='add'>+	.newlink = ovpn_newlink,</div><div class='add'>+	.dellink = ovpn_dellink,</div><div class='add'>+	.fill_info = ovpn_fill_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init ovpn_init(void)</div><div class='add'>+{</div><div class='add'>+	int err = rtnl_link_register(&amp;ovpn_link_ops);</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_err("ovpn: can't register rtnl link ops: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ovpn_nl_register();</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_err("ovpn: can't register netlink family: %d\n", err);</div><div class='add'>+		goto unreg_rtnl;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn_tcp_init();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unreg_rtnl:</div><div class='add'>+	rtnl_link_unregister(&amp;ovpn_link_ops);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __exit void ovpn_cleanup(void)</div><div class='add'>+{</div><div class='add'>+	ovpn_nl_unregister();</div><div class='add'>+	rtnl_link_unregister(&amp;ovpn_link_ops);</div><div class='add'>+</div><div class='add'>+	rcu_barrier();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(ovpn_init);</div><div class='add'>+module_exit(ovpn_cleanup);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("OpenVPN data channel offload (ovpn)");</div><div class='add'>+MODULE_AUTHOR("Antonio Quartulli &lt;antonio@openvpn.net&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ovpn/main.h b/drivers/net/ovpn/main.h<br/>new file mode 100644<br/>index 000000000000..017cd0100765<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/main.h</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_MAIN_H_</div><div class='add'>+#define _NET_OVPN_MAIN_H_</div><div class='add'>+</div><div class='add'>+bool ovpn_dev_is_valid(const struct net_device *dev);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_MAIN_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/netlink-gen.c b/drivers/net/ovpn/netlink-gen.c<br/>new file mode 100644<br/>index 000000000000..ecbe9dcf4f7d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/netlink-gen.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/netlink-gen.c</a></div><div class='hunk'>@@ -0,0 +1,263 @@</div><div class='add'>+// SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+/* Do not edit directly, auto-generated from: */</div><div class='add'>+/*	Documentation/netlink/specs/ovpn.yaml */</div><div class='add'>+/* YNL-GEN kernel source */</div><div class='add'>+/* To regenerate run: tools/net/ynl/ynl-regen.sh */</div><div class='add'>+</div><div class='add'>+#include &lt;net/netlink.h&gt;</div><div class='add'>+#include &lt;net/genetlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "netlink-gen.h"</div><div class='add'>+</div><div class='add'>+#include &lt;uapi/linux/ovpn.h&gt;</div><div class='add'>+</div><div class='add'>+/* Integer value ranges */</div><div class='add'>+static const struct netlink_range_validation ovpn_a_peer_id_range = {</div><div class='add'>+	.max	= 16777215ULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct netlink_range_validation ovpn_a_keyconf_peer_id_range = {</div><div class='add'>+	.max	= 16777215ULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Common nested types */</div><div class='add'>+const struct nla_policy ovpn_keyconf_nl_policy[OVPN_A_KEYCONF_DECRYPT_DIR + 1] = {</div><div class='add'>+	[OVPN_A_KEYCONF_PEER_ID] = NLA_POLICY_FULL_RANGE(NLA_U32, &amp;ovpn_a_keyconf_peer_id_range),</div><div class='add'>+	[OVPN_A_KEYCONF_SLOT] = NLA_POLICY_MAX(NLA_U32, 1),</div><div class='add'>+	[OVPN_A_KEYCONF_KEY_ID] = NLA_POLICY_MAX(NLA_U32, 7),</div><div class='add'>+	[OVPN_A_KEYCONF_CIPHER_ALG] = NLA_POLICY_MAX(NLA_U32, 2),</div><div class='add'>+	[OVPN_A_KEYCONF_ENCRYPT_DIR] = NLA_POLICY_NESTED(ovpn_keydir_nl_policy),</div><div class='add'>+	[OVPN_A_KEYCONF_DECRYPT_DIR] = NLA_POLICY_NESTED(ovpn_keydir_nl_policy),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct nla_policy ovpn_keyconf_del_input_nl_policy[OVPN_A_KEYCONF_SLOT + 1] = {</div><div class='add'>+	[OVPN_A_KEYCONF_PEER_ID] = NLA_POLICY_FULL_RANGE(NLA_U32, &amp;ovpn_a_keyconf_peer_id_range),</div><div class='add'>+	[OVPN_A_KEYCONF_SLOT] = NLA_POLICY_MAX(NLA_U32, 1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct nla_policy ovpn_keyconf_get_nl_policy[OVPN_A_KEYCONF_CIPHER_ALG + 1] = {</div><div class='add'>+	[OVPN_A_KEYCONF_PEER_ID] = NLA_POLICY_FULL_RANGE(NLA_U32, &amp;ovpn_a_keyconf_peer_id_range),</div><div class='add'>+	[OVPN_A_KEYCONF_SLOT] = NLA_POLICY_MAX(NLA_U32, 1),</div><div class='add'>+	[OVPN_A_KEYCONF_KEY_ID] = NLA_POLICY_MAX(NLA_U32, 7),</div><div class='add'>+	[OVPN_A_KEYCONF_CIPHER_ALG] = NLA_POLICY_MAX(NLA_U32, 2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct nla_policy ovpn_keyconf_swap_input_nl_policy[OVPN_A_KEYCONF_PEER_ID + 1] = {</div><div class='add'>+	[OVPN_A_KEYCONF_PEER_ID] = NLA_POLICY_FULL_RANGE(NLA_U32, &amp;ovpn_a_keyconf_peer_id_range),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct nla_policy ovpn_keydir_nl_policy[OVPN_A_KEYDIR_NONCE_TAIL + 1] = {</div><div class='add'>+	[OVPN_A_KEYDIR_CIPHER_KEY] = NLA_POLICY_MAX_LEN(256),</div><div class='add'>+	[OVPN_A_KEYDIR_NONCE_TAIL] = NLA_POLICY_EXACT_LEN(OVPN_NONCE_TAIL_SIZE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct nla_policy ovpn_peer_nl_policy[OVPN_A_PEER_LINK_TX_PACKETS + 1] = {</div><div class='add'>+	[OVPN_A_PEER_ID] = NLA_POLICY_FULL_RANGE(NLA_U32, &amp;ovpn_a_peer_id_range),</div><div class='add'>+	[OVPN_A_PEER_REMOTE_IPV4] = { .type = NLA_BE32, },</div><div class='add'>+	[OVPN_A_PEER_REMOTE_IPV6] = NLA_POLICY_EXACT_LEN(16),</div><div class='add'>+	[OVPN_A_PEER_REMOTE_IPV6_SCOPE_ID] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER_REMOTE_PORT] = NLA_POLICY_MIN(NLA_BE16, 1),</div><div class='add'>+	[OVPN_A_PEER_SOCKET] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER_SOCKET_NETNSID] = { .type = NLA_S32, },</div><div class='add'>+	[OVPN_A_PEER_VPN_IPV4] = { .type = NLA_BE32, },</div><div class='add'>+	[OVPN_A_PEER_VPN_IPV6] = NLA_POLICY_EXACT_LEN(16),</div><div class='add'>+	[OVPN_A_PEER_LOCAL_IPV4] = { .type = NLA_BE32, },</div><div class='add'>+	[OVPN_A_PEER_LOCAL_IPV6] = NLA_POLICY_EXACT_LEN(16),</div><div class='add'>+	[OVPN_A_PEER_LOCAL_PORT] = NLA_POLICY_MIN(NLA_BE16, 1),</div><div class='add'>+	[OVPN_A_PEER_KEEPALIVE_INTERVAL] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER_KEEPALIVE_TIMEOUT] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER_DEL_REASON] = NLA_POLICY_MAX(NLA_U32, 4),</div><div class='add'>+	[OVPN_A_PEER_VPN_RX_BYTES] = { .type = NLA_UINT, },</div><div class='add'>+	[OVPN_A_PEER_VPN_TX_BYTES] = { .type = NLA_UINT, },</div><div class='add'>+	[OVPN_A_PEER_VPN_RX_PACKETS] = { .type = NLA_UINT, },</div><div class='add'>+	[OVPN_A_PEER_VPN_TX_PACKETS] = { .type = NLA_UINT, },</div><div class='add'>+	[OVPN_A_PEER_LINK_RX_BYTES] = { .type = NLA_UINT, },</div><div class='add'>+	[OVPN_A_PEER_LINK_TX_BYTES] = { .type = NLA_UINT, },</div><div class='add'>+	[OVPN_A_PEER_LINK_RX_PACKETS] = { .type = NLA_UINT, },</div><div class='add'>+	[OVPN_A_PEER_LINK_TX_PACKETS] = { .type = NLA_UINT, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct nla_policy ovpn_peer_del_input_nl_policy[OVPN_A_PEER_ID + 1] = {</div><div class='add'>+	[OVPN_A_PEER_ID] = NLA_POLICY_FULL_RANGE(NLA_U32, &amp;ovpn_a_peer_id_range),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct nla_policy ovpn_peer_new_input_nl_policy[OVPN_A_PEER_KEEPALIVE_TIMEOUT + 1] = {</div><div class='add'>+	[OVPN_A_PEER_ID] = NLA_POLICY_FULL_RANGE(NLA_U32, &amp;ovpn_a_peer_id_range),</div><div class='add'>+	[OVPN_A_PEER_REMOTE_IPV4] = { .type = NLA_BE32, },</div><div class='add'>+	[OVPN_A_PEER_REMOTE_IPV6] = NLA_POLICY_EXACT_LEN(16),</div><div class='add'>+	[OVPN_A_PEER_REMOTE_IPV6_SCOPE_ID] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER_REMOTE_PORT] = NLA_POLICY_MIN(NLA_BE16, 1),</div><div class='add'>+	[OVPN_A_PEER_SOCKET] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER_VPN_IPV4] = { .type = NLA_BE32, },</div><div class='add'>+	[OVPN_A_PEER_VPN_IPV6] = NLA_POLICY_EXACT_LEN(16),</div><div class='add'>+	[OVPN_A_PEER_LOCAL_IPV4] = { .type = NLA_BE32, },</div><div class='add'>+	[OVPN_A_PEER_LOCAL_IPV6] = NLA_POLICY_EXACT_LEN(16),</div><div class='add'>+	[OVPN_A_PEER_KEEPALIVE_INTERVAL] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER_KEEPALIVE_TIMEOUT] = { .type = NLA_U32, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct nla_policy ovpn_peer_set_input_nl_policy[OVPN_A_PEER_KEEPALIVE_TIMEOUT + 1] = {</div><div class='add'>+	[OVPN_A_PEER_ID] = NLA_POLICY_FULL_RANGE(NLA_U32, &amp;ovpn_a_peer_id_range),</div><div class='add'>+	[OVPN_A_PEER_REMOTE_IPV4] = { .type = NLA_BE32, },</div><div class='add'>+	[OVPN_A_PEER_REMOTE_IPV6] = NLA_POLICY_EXACT_LEN(16),</div><div class='add'>+	[OVPN_A_PEER_REMOTE_IPV6_SCOPE_ID] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER_REMOTE_PORT] = NLA_POLICY_MIN(NLA_BE16, 1),</div><div class='add'>+	[OVPN_A_PEER_VPN_IPV4] = { .type = NLA_BE32, },</div><div class='add'>+	[OVPN_A_PEER_VPN_IPV6] = NLA_POLICY_EXACT_LEN(16),</div><div class='add'>+	[OVPN_A_PEER_LOCAL_IPV4] = { .type = NLA_BE32, },</div><div class='add'>+	[OVPN_A_PEER_LOCAL_IPV6] = NLA_POLICY_EXACT_LEN(16),</div><div class='add'>+	[OVPN_A_PEER_KEEPALIVE_INTERVAL] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER_KEEPALIVE_TIMEOUT] = { .type = NLA_U32, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* OVPN_CMD_PEER_NEW - do */</div><div class='add'>+static const struct nla_policy ovpn_peer_new_nl_policy[OVPN_A_PEER + 1] = {</div><div class='add'>+	[OVPN_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER] = NLA_POLICY_NESTED(ovpn_peer_new_input_nl_policy),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* OVPN_CMD_PEER_SET - do */</div><div class='add'>+static const struct nla_policy ovpn_peer_set_nl_policy[OVPN_A_PEER + 1] = {</div><div class='add'>+	[OVPN_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER] = NLA_POLICY_NESTED(ovpn_peer_set_input_nl_policy),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* OVPN_CMD_PEER_GET - do */</div><div class='add'>+static const struct nla_policy ovpn_peer_get_do_nl_policy[OVPN_A_PEER + 1] = {</div><div class='add'>+	[OVPN_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER] = NLA_POLICY_NESTED(ovpn_peer_nl_policy),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* OVPN_CMD_PEER_GET - dump */</div><div class='add'>+static const struct nla_policy ovpn_peer_get_dump_nl_policy[OVPN_A_IFINDEX + 1] = {</div><div class='add'>+	[OVPN_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* OVPN_CMD_PEER_DEL - do */</div><div class='add'>+static const struct nla_policy ovpn_peer_del_nl_policy[OVPN_A_PEER + 1] = {</div><div class='add'>+	[OVPN_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_PEER] = NLA_POLICY_NESTED(ovpn_peer_del_input_nl_policy),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* OVPN_CMD_KEY_NEW - do */</div><div class='add'>+static const struct nla_policy ovpn_key_new_nl_policy[OVPN_A_KEYCONF + 1] = {</div><div class='add'>+	[OVPN_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_KEYCONF] = NLA_POLICY_NESTED(ovpn_keyconf_nl_policy),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* OVPN_CMD_KEY_GET - do */</div><div class='add'>+static const struct nla_policy ovpn_key_get_nl_policy[OVPN_A_KEYCONF + 1] = {</div><div class='add'>+	[OVPN_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_KEYCONF] = NLA_POLICY_NESTED(ovpn_keyconf_get_nl_policy),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* OVPN_CMD_KEY_SWAP - do */</div><div class='add'>+static const struct nla_policy ovpn_key_swap_nl_policy[OVPN_A_KEYCONF + 1] = {</div><div class='add'>+	[OVPN_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_KEYCONF] = NLA_POLICY_NESTED(ovpn_keyconf_swap_input_nl_policy),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* OVPN_CMD_KEY_DEL - do */</div><div class='add'>+static const struct nla_policy ovpn_key_del_nl_policy[OVPN_A_KEYCONF + 1] = {</div><div class='add'>+	[OVPN_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+	[OVPN_A_KEYCONF] = NLA_POLICY_NESTED(ovpn_keyconf_del_input_nl_policy),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Ops table for ovpn */</div><div class='add'>+static const struct genl_split_ops ovpn_nl_ops[] = {</div><div class='add'>+	{</div><div class='add'>+		.cmd		= OVPN_CMD_PEER_NEW,</div><div class='add'>+		.pre_doit	= ovpn_nl_pre_doit,</div><div class='add'>+		.doit		= ovpn_nl_peer_new_doit,</div><div class='add'>+		.post_doit	= ovpn_nl_post_doit,</div><div class='add'>+		.policy		= ovpn_peer_new_nl_policy,</div><div class='add'>+		.maxattr	= OVPN_A_PEER,</div><div class='add'>+		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cmd		= OVPN_CMD_PEER_SET,</div><div class='add'>+		.pre_doit	= ovpn_nl_pre_doit,</div><div class='add'>+		.doit		= ovpn_nl_peer_set_doit,</div><div class='add'>+		.post_doit	= ovpn_nl_post_doit,</div><div class='add'>+		.policy		= ovpn_peer_set_nl_policy,</div><div class='add'>+		.maxattr	= OVPN_A_PEER,</div><div class='add'>+		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cmd		= OVPN_CMD_PEER_GET,</div><div class='add'>+		.pre_doit	= ovpn_nl_pre_doit,</div><div class='add'>+		.doit		= ovpn_nl_peer_get_doit,</div><div class='add'>+		.post_doit	= ovpn_nl_post_doit,</div><div class='add'>+		.policy		= ovpn_peer_get_do_nl_policy,</div><div class='add'>+		.maxattr	= OVPN_A_PEER,</div><div class='add'>+		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cmd		= OVPN_CMD_PEER_GET,</div><div class='add'>+		.dumpit		= ovpn_nl_peer_get_dumpit,</div><div class='add'>+		.policy		= ovpn_peer_get_dump_nl_policy,</div><div class='add'>+		.maxattr	= OVPN_A_IFINDEX,</div><div class='add'>+		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DUMP,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cmd		= OVPN_CMD_PEER_DEL,</div><div class='add'>+		.pre_doit	= ovpn_nl_pre_doit,</div><div class='add'>+		.doit		= ovpn_nl_peer_del_doit,</div><div class='add'>+		.post_doit	= ovpn_nl_post_doit,</div><div class='add'>+		.policy		= ovpn_peer_del_nl_policy,</div><div class='add'>+		.maxattr	= OVPN_A_PEER,</div><div class='add'>+		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cmd		= OVPN_CMD_KEY_NEW,</div><div class='add'>+		.pre_doit	= ovpn_nl_pre_doit,</div><div class='add'>+		.doit		= ovpn_nl_key_new_doit,</div><div class='add'>+		.post_doit	= ovpn_nl_post_doit,</div><div class='add'>+		.policy		= ovpn_key_new_nl_policy,</div><div class='add'>+		.maxattr	= OVPN_A_KEYCONF,</div><div class='add'>+		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cmd		= OVPN_CMD_KEY_GET,</div><div class='add'>+		.pre_doit	= ovpn_nl_pre_doit,</div><div class='add'>+		.doit		= ovpn_nl_key_get_doit,</div><div class='add'>+		.post_doit	= ovpn_nl_post_doit,</div><div class='add'>+		.policy		= ovpn_key_get_nl_policy,</div><div class='add'>+		.maxattr	= OVPN_A_KEYCONF,</div><div class='add'>+		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cmd		= OVPN_CMD_KEY_SWAP,</div><div class='add'>+		.pre_doit	= ovpn_nl_pre_doit,</div><div class='add'>+		.doit		= ovpn_nl_key_swap_doit,</div><div class='add'>+		.post_doit	= ovpn_nl_post_doit,</div><div class='add'>+		.policy		= ovpn_key_swap_nl_policy,</div><div class='add'>+		.maxattr	= OVPN_A_KEYCONF,</div><div class='add'>+		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cmd		= OVPN_CMD_KEY_DEL,</div><div class='add'>+		.pre_doit	= ovpn_nl_pre_doit,</div><div class='add'>+		.doit		= ovpn_nl_key_del_doit,</div><div class='add'>+		.post_doit	= ovpn_nl_post_doit,</div><div class='add'>+		.policy		= ovpn_key_del_nl_policy,</div><div class='add'>+		.maxattr	= OVPN_A_KEYCONF,</div><div class='add'>+		.flags		= GENL_ADMIN_PERM | GENL_CMD_CAP_DO,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct genl_multicast_group ovpn_nl_mcgrps[] = {</div><div class='add'>+	[OVPN_NLGRP_PEERS] = { "peers", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct genl_family ovpn_nl_family __ro_after_init = {</div><div class='add'>+	.name		= OVPN_FAMILY_NAME,</div><div class='add'>+	.version	= OVPN_FAMILY_VERSION,</div><div class='add'>+	.netnsok	= true,</div><div class='add'>+	.parallel_ops	= true,</div><div class='add'>+	.module		= THIS_MODULE,</div><div class='add'>+	.split_ops	= ovpn_nl_ops,</div><div class='add'>+	.n_split_ops	= ARRAY_SIZE(ovpn_nl_ops),</div><div class='add'>+	.mcgrps		= ovpn_nl_mcgrps,</div><div class='add'>+	.n_mcgrps	= ARRAY_SIZE(ovpn_nl_mcgrps),</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ovpn/netlink-gen.h b/drivers/net/ovpn/netlink-gen.h<br/>new file mode 100644<br/>index 000000000000..b2301580770f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/netlink-gen.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/netlink-gen.h</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */</div><div class='add'>+/* Do not edit directly, auto-generated from: */</div><div class='add'>+/*	Documentation/netlink/specs/ovpn.yaml */</div><div class='add'>+/* YNL-GEN kernel header */</div><div class='add'>+/* To regenerate run: tools/net/ynl/ynl-regen.sh */</div><div class='add'>+</div><div class='add'>+#ifndef _LINUX_OVPN_GEN_H</div><div class='add'>+#define _LINUX_OVPN_GEN_H</div><div class='add'>+</div><div class='add'>+#include &lt;net/netlink.h&gt;</div><div class='add'>+#include &lt;net/genetlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;uapi/linux/ovpn.h&gt;</div><div class='add'>+</div><div class='add'>+/* Common nested types */</div><div class='add'>+extern const struct nla_policy ovpn_keyconf_nl_policy[OVPN_A_KEYCONF_DECRYPT_DIR + 1];</div><div class='add'>+extern const struct nla_policy ovpn_keyconf_del_input_nl_policy[OVPN_A_KEYCONF_SLOT + 1];</div><div class='add'>+extern const struct nla_policy ovpn_keyconf_get_nl_policy[OVPN_A_KEYCONF_CIPHER_ALG + 1];</div><div class='add'>+extern const struct nla_policy ovpn_keyconf_swap_input_nl_policy[OVPN_A_KEYCONF_PEER_ID + 1];</div><div class='add'>+extern const struct nla_policy ovpn_keydir_nl_policy[OVPN_A_KEYDIR_NONCE_TAIL + 1];</div><div class='add'>+extern const struct nla_policy ovpn_peer_nl_policy[OVPN_A_PEER_LINK_TX_PACKETS + 1];</div><div class='add'>+extern const struct nla_policy ovpn_peer_del_input_nl_policy[OVPN_A_PEER_ID + 1];</div><div class='add'>+extern const struct nla_policy ovpn_peer_new_input_nl_policy[OVPN_A_PEER_KEEPALIVE_TIMEOUT + 1];</div><div class='add'>+extern const struct nla_policy ovpn_peer_set_input_nl_policy[OVPN_A_PEER_KEEPALIVE_TIMEOUT + 1];</div><div class='add'>+</div><div class='add'>+int ovpn_nl_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb,</div><div class='add'>+		     struct genl_info *info);</div><div class='add'>+void</div><div class='add'>+ovpn_nl_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb,</div><div class='add'>+		  struct genl_info *info);</div><div class='add'>+</div><div class='add'>+int ovpn_nl_peer_new_doit(struct sk_buff *skb, struct genl_info *info);</div><div class='add'>+int ovpn_nl_peer_set_doit(struct sk_buff *skb, struct genl_info *info);</div><div class='add'>+int ovpn_nl_peer_get_doit(struct sk_buff *skb, struct genl_info *info);</div><div class='add'>+int ovpn_nl_peer_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb);</div><div class='add'>+int ovpn_nl_peer_del_doit(struct sk_buff *skb, struct genl_info *info);</div><div class='add'>+int ovpn_nl_key_new_doit(struct sk_buff *skb, struct genl_info *info);</div><div class='add'>+int ovpn_nl_key_get_doit(struct sk_buff *skb, struct genl_info *info);</div><div class='add'>+int ovpn_nl_key_swap_doit(struct sk_buff *skb, struct genl_info *info);</div><div class='add'>+int ovpn_nl_key_del_doit(struct sk_buff *skb, struct genl_info *info);</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OVPN_NLGRP_PEERS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct genl_family ovpn_nl_family;</div><div class='add'>+</div><div class='add'>+#endif /* _LINUX_OVPN_GEN_H */</div><div class='head'>diff --git a/drivers/net/ovpn/netlink.c b/drivers/net/ovpn/netlink.c<br/>new file mode 100644<br/>index 000000000000..c7f382437630<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/netlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/netlink.c</a></div><div class='hunk'>@@ -0,0 +1,1293 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;net/genetlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;uapi/linux/ovpn.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "main.h"</div><div class='add'>+#include "netlink.h"</div><div class='add'>+#include "netlink-gen.h"</div><div class='add'>+#include "bind.h"</div><div class='add'>+#include "crypto.h"</div><div class='add'>+#include "peer.h"</div><div class='add'>+#include "socket.h"</div><div class='add'>+</div><div class='add'>+MODULE_ALIAS_GENL_FAMILY(OVPN_FAMILY_NAME);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_get_dev_from_attrs - retrieve the ovpn private data from the netdevice</div><div class='add'>+ *			     a netlink message is targeting</div><div class='add'>+ * @net: network namespace where to look for the interface</div><div class='add'>+ * @info: generic netlink info from the user request</div><div class='add'>+ * @tracker: tracker object to be used for the netdev reference acquisition</div><div class='add'>+ *</div><div class='add'>+ * Return: the ovpn private data, if found, or an error otherwise</div><div class='add'>+ */</div><div class='add'>+static struct ovpn_priv *</div><div class='add'>+ovpn_get_dev_from_attrs(struct net *net, const struct genl_info *info,</div><div class='add'>+			netdevice_tracker *tracker)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	int ifindex;</div><div class='add'>+</div><div class='add'>+	if (GENL_REQ_ATTR_CHECK(info, OVPN_A_IFINDEX))</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	ifindex = nla_get_u32(info-&gt;attrs[OVPN_A_IFINDEX]);</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	dev = dev_get_by_index_rcu(net, ifindex);</div><div class='add'>+	if (!dev) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		NL_SET_ERR_MSG_MOD(info-&gt;extack,</div><div class='add'>+				   "ifindex does not match any interface");</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ovpn_dev_is_valid(dev)) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		NL_SET_ERR_MSG_MOD(info-&gt;extack,</div><div class='add'>+				   "specified interface is not ovpn");</div><div class='add'>+		NL_SET_BAD_ATTR(info-&gt;extack, info-&gt;attrs[OVPN_A_IFINDEX]);</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn = netdev_priv(dev);</div><div class='add'>+	netdev_hold(dev, tracker, GFP_ATOMIC);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return ovpn;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_nl_pre_doit(const struct genl_split_ops *ops, struct sk_buff *skb,</div><div class='add'>+		     struct genl_info *info)</div><div class='add'>+{</div><div class='add'>+	netdevice_tracker *tracker = (netdevice_tracker *)&amp;info-&gt;user_ptr[1];</div><div class='add'>+	struct ovpn_priv *ovpn = ovpn_get_dev_from_attrs(genl_info_net(info),</div><div class='add'>+							 info, tracker);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(ovpn))</div><div class='add'>+		return PTR_ERR(ovpn);</div><div class='add'>+</div><div class='add'>+	info-&gt;user_ptr[0] = ovpn;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_nl_post_doit(const struct genl_split_ops *ops, struct sk_buff *skb,</div><div class='add'>+		       struct genl_info *info)</div><div class='add'>+{</div><div class='add'>+	netdevice_tracker *tracker = (netdevice_tracker *)&amp;info-&gt;user_ptr[1];</div><div class='add'>+	struct ovpn_priv *ovpn = info-&gt;user_ptr[0];</div><div class='add'>+</div><div class='add'>+	if (ovpn)</div><div class='add'>+		netdev_put(ovpn-&gt;dev, tracker);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ovpn_nl_attr_sockaddr_remote(struct nlattr **attrs,</div><div class='add'>+					 struct sockaddr_storage *ss)</div><div class='add'>+{</div><div class='add'>+	struct sockaddr_in6 *sin6;</div><div class='add'>+	struct sockaddr_in *sin;</div><div class='add'>+	struct in6_addr *in6;</div><div class='add'>+	__be16 port = 0;</div><div class='add'>+	__be32 *in;</div><div class='add'>+</div><div class='add'>+	ss-&gt;ss_family = AF_UNSPEC;</div><div class='add'>+</div><div class='add'>+	if (attrs[OVPN_A_PEER_REMOTE_PORT])</div><div class='add'>+		port = nla_get_be16(attrs[OVPN_A_PEER_REMOTE_PORT]);</div><div class='add'>+</div><div class='add'>+	if (attrs[OVPN_A_PEER_REMOTE_IPV4]) {</div><div class='add'>+		ss-&gt;ss_family = AF_INET;</div><div class='add'>+		in = nla_data(attrs[OVPN_A_PEER_REMOTE_IPV4]);</div><div class='add'>+	} else if (attrs[OVPN_A_PEER_REMOTE_IPV6]) {</div><div class='add'>+		ss-&gt;ss_family = AF_INET6;</div><div class='add'>+		in6 = nla_data(attrs[OVPN_A_PEER_REMOTE_IPV6]);</div><div class='add'>+	} else {</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (ss-&gt;ss_family) {</div><div class='add'>+	case AF_INET6:</div><div class='add'>+		/* If this is a regular IPv6 just break and move on,</div><div class='add'>+		 * otherwise switch to AF_INET and extract the IPv4 accordingly</div><div class='add'>+		 */</div><div class='add'>+		if (!ipv6_addr_v4mapped(in6)) {</div><div class='add'>+			sin6 = (struct sockaddr_in6 *)ss;</div><div class='add'>+			sin6-&gt;sin6_port = port;</div><div class='add'>+			memcpy(&amp;sin6-&gt;sin6_addr, in6, sizeof(*in6));</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* v4-mapped-v6 address */</div><div class='add'>+		ss-&gt;ss_family = AF_INET;</div><div class='add'>+		in = &amp;in6-&gt;s6_addr32[3];</div><div class='add'>+		fallthrough;</div><div class='add'>+	case AF_INET:</div><div class='add'>+		sin = (struct sockaddr_in *)ss;</div><div class='add'>+		sin-&gt;sin_port = port;</div><div class='add'>+		sin-&gt;sin_addr.s_addr = *in;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 *ovpn_nl_attr_local_ip(struct nlattr **attrs)</div><div class='add'>+{</div><div class='add'>+	u8 *addr6;</div><div class='add'>+</div><div class='add'>+	if (!attrs[OVPN_A_PEER_LOCAL_IPV4] &amp;&amp; !attrs[OVPN_A_PEER_LOCAL_IPV6])</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (attrs[OVPN_A_PEER_LOCAL_IPV4])</div><div class='add'>+		return nla_data(attrs[OVPN_A_PEER_LOCAL_IPV4]);</div><div class='add'>+</div><div class='add'>+	addr6 = nla_data(attrs[OVPN_A_PEER_LOCAL_IPV6]);</div><div class='add'>+	/* this is an IPv4-mapped IPv6 address, therefore extract the actual</div><div class='add'>+	 * v4 address from the last 4 bytes</div><div class='add'>+	 */</div><div class='add'>+	if (ipv6_addr_v4mapped((struct in6_addr *)addr6))</div><div class='add'>+		return addr6 + 12;</div><div class='add'>+</div><div class='add'>+	return addr6;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static sa_family_t ovpn_nl_family_get(struct nlattr *addr4,</div><div class='add'>+				      struct nlattr *addr6)</div><div class='add'>+{</div><div class='add'>+	if (addr4)</div><div class='add'>+		return AF_INET;</div><div class='add'>+</div><div class='add'>+	if (addr6) {</div><div class='add'>+		if (ipv6_addr_v4mapped((struct in6_addr *)nla_data(addr6)))</div><div class='add'>+			return AF_INET;</div><div class='add'>+		return AF_INET6;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return AF_UNSPEC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_nl_peer_precheck(struct ovpn_priv *ovpn,</div><div class='add'>+				 struct genl_info *info,</div><div class='add'>+				 struct nlattr **attrs)</div><div class='add'>+{</div><div class='add'>+	sa_family_t local_fam, remote_fam;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_PEER], attrs,</div><div class='add'>+			      OVPN_A_PEER_ID))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (attrs[OVPN_A_PEER_REMOTE_IPV4] &amp;&amp; attrs[OVPN_A_PEER_REMOTE_IPV6]) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(info-&gt;extack,</div><div class='add'>+				   "cannot specify both remote IPv4 or IPv6 address");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!attrs[OVPN_A_PEER_REMOTE_IPV4] &amp;&amp;</div><div class='add'>+	    !attrs[OVPN_A_PEER_REMOTE_IPV6] &amp;&amp; attrs[OVPN_A_PEER_REMOTE_PORT]) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(info-&gt;extack,</div><div class='add'>+				   "cannot specify remote port without IP address");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((attrs[OVPN_A_PEER_REMOTE_IPV4] ||</div><div class='add'>+	     attrs[OVPN_A_PEER_REMOTE_IPV6]) &amp;&amp;</div><div class='add'>+	    !attrs[OVPN_A_PEER_REMOTE_PORT]) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(info-&gt;extack,</div><div class='add'>+				   "cannot specify remote IP address without port");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!attrs[OVPN_A_PEER_REMOTE_IPV4] &amp;&amp;</div><div class='add'>+	    attrs[OVPN_A_PEER_LOCAL_IPV4]) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(info-&gt;extack,</div><div class='add'>+				   "cannot specify local IPv4 address without remote");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!attrs[OVPN_A_PEER_REMOTE_IPV6] &amp;&amp;</div><div class='add'>+	    attrs[OVPN_A_PEER_LOCAL_IPV6]) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(info-&gt;extack,</div><div class='add'>+				   "cannot specify local IPV6 address without remote");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check that local and remote address families are the same even</div><div class='add'>+	 * after parsing v4mapped IPv6 addresses.</div><div class='add'>+	 * (if addresses are not provided, family will be AF_UNSPEC and</div><div class='add'>+	 * the check is skipped)</div><div class='add'>+	 */</div><div class='add'>+	local_fam = ovpn_nl_family_get(attrs[OVPN_A_PEER_LOCAL_IPV4],</div><div class='add'>+				       attrs[OVPN_A_PEER_LOCAL_IPV6]);</div><div class='add'>+	remote_fam = ovpn_nl_family_get(attrs[OVPN_A_PEER_REMOTE_IPV4],</div><div class='add'>+					attrs[OVPN_A_PEER_REMOTE_IPV6]);</div><div class='add'>+	if (local_fam != AF_UNSPEC &amp;&amp; remote_fam != AF_UNSPEC &amp;&amp;</div><div class='add'>+	    local_fam != remote_fam) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(info-&gt;extack,</div><div class='add'>+				   "mismatching local and remote address families");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (remote_fam != AF_INET6 &amp;&amp; attrs[OVPN_A_PEER_REMOTE_IPV6_SCOPE_ID]) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(info-&gt;extack,</div><div class='add'>+				   "cannot specify scope id without remote IPv6 address");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* VPN IPs are needed only in MP mode for selecting the right peer */</div><div class='add'>+	if (ovpn-&gt;mode == OVPN_MODE_P2P &amp;&amp; (attrs[OVPN_A_PEER_VPN_IPV4] ||</div><div class='add'>+					    attrs[OVPN_A_PEER_VPN_IPV6])) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "unexpected VPN IP in P2P mode");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((attrs[OVPN_A_PEER_KEEPALIVE_INTERVAL] &amp;&amp;</div><div class='add'>+	     !attrs[OVPN_A_PEER_KEEPALIVE_TIMEOUT]) ||</div><div class='add'>+	    (!attrs[OVPN_A_PEER_KEEPALIVE_INTERVAL] &amp;&amp;</div><div class='add'>+	     attrs[OVPN_A_PEER_KEEPALIVE_TIMEOUT])) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "keepalive interval and timeout are required together");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_nl_peer_modify - modify the peer attributes according to the incoming msg</div><div class='add'>+ * @peer: the peer to modify</div><div class='add'>+ * @info: generic netlink info from the user request</div><div class='add'>+ * @attrs: the attributes from the user request</div><div class='add'>+ *</div><div class='add'>+ * Return: a negative error code in case of failure, 0 on success or 1 on</div><div class='add'>+ *	   success and the VPN IPs have been modified (requires rehashing in MP</div><div class='add'>+ *	   mode)</div><div class='add'>+ */</div><div class='add'>+static int ovpn_nl_peer_modify(struct ovpn_peer *peer, struct genl_info *info,</div><div class='add'>+			       struct nlattr **attrs)</div><div class='add'>+{</div><div class='add'>+	struct sockaddr_storage ss = {};</div><div class='add'>+	void *local_ip = NULL;</div><div class='add'>+	u32 interv, timeout;</div><div class='add'>+	bool rehash = false;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;peer-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (ovpn_nl_attr_sockaddr_remote(attrs, &amp;ss)) {</div><div class='add'>+		/* we carry the local IP in a generic container.</div><div class='add'>+		 * ovpn_peer_reset_sockaddr() will properly interpret it</div><div class='add'>+		 * based on ss.ss_family</div><div class='add'>+		 */</div><div class='add'>+		local_ip = ovpn_nl_attr_local_ip(attrs);</div><div class='add'>+</div><div class='add'>+		/* set peer sockaddr */</div><div class='add'>+		ret = ovpn_peer_reset_sockaddr(peer, &amp;ss, local_ip);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+					       "cannot set peer sockaddr: %d",</div><div class='add'>+					       ret);</div><div class='add'>+			goto err_unlock;</div><div class='add'>+		}</div><div class='add'>+		dst_cache_reset(&amp;peer-&gt;dst_cache);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (attrs[OVPN_A_PEER_VPN_IPV4]) {</div><div class='add'>+		rehash = true;</div><div class='add'>+		peer-&gt;vpn_addrs.ipv4.s_addr =</div><div class='add'>+			nla_get_in_addr(attrs[OVPN_A_PEER_VPN_IPV4]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (attrs[OVPN_A_PEER_VPN_IPV6]) {</div><div class='add'>+		rehash = true;</div><div class='add'>+		peer-&gt;vpn_addrs.ipv6 =</div><div class='add'>+			nla_get_in6_addr(attrs[OVPN_A_PEER_VPN_IPV6]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* when setting the keepalive, both parameters have to be configured */</div><div class='add'>+	if (attrs[OVPN_A_PEER_KEEPALIVE_INTERVAL] &amp;&amp;</div><div class='add'>+	    attrs[OVPN_A_PEER_KEEPALIVE_TIMEOUT]) {</div><div class='add'>+		interv = nla_get_u32(attrs[OVPN_A_PEER_KEEPALIVE_INTERVAL]);</div><div class='add'>+		timeout = nla_get_u32(attrs[OVPN_A_PEER_KEEPALIVE_TIMEOUT]);</div><div class='add'>+		ovpn_peer_keepalive_set(peer, interv, timeout);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(peer-&gt;ovpn-&gt;dev,</div><div class='add'>+		   "modify peer id=%u endpoint=%pIScp VPN-IPv4=%pI4 VPN-IPv6=%pI6c\n",</div><div class='add'>+		   peer-&gt;id, &amp;ss,</div><div class='add'>+		   &amp;peer-&gt;vpn_addrs.ipv4.s_addr, &amp;peer-&gt;vpn_addrs.ipv6);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return rehash ? 1 : 0;</div><div class='add'>+err_unlock:</div><div class='add'>+	spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_nl_peer_new_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *attrs[OVPN_A_PEER_MAX + 1];</div><div class='add'>+	struct ovpn_priv *ovpn = info-&gt;user_ptr[0];</div><div class='add'>+	struct ovpn_socket *ovpn_sock;</div><div class='add'>+	struct socket *sock = NULL;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	u32 sockfd, peer_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (GENL_REQ_ATTR_CHECK(info, OVPN_A_PEER))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = nla_parse_nested(attrs, OVPN_A_PEER_MAX, info-&gt;attrs[OVPN_A_PEER],</div><div class='add'>+			       ovpn_peer_new_input_nl_policy, info-&gt;extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ovpn_nl_peer_precheck(ovpn, info, attrs);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_PEER], attrs,</div><div class='add'>+			      OVPN_A_PEER_SOCKET))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* in MP mode VPN IPs are required for selecting the right peer */</div><div class='add'>+	if (ovpn-&gt;mode == OVPN_MODE_MP &amp;&amp; !attrs[OVPN_A_PEER_VPN_IPV4] &amp;&amp;</div><div class='add'>+	    !attrs[OVPN_A_PEER_VPN_IPV6]) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "VPN IP must be provided in MP mode");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	peer_id = nla_get_u32(attrs[OVPN_A_PEER_ID]);</div><div class='add'>+	peer = ovpn_peer_new(ovpn, peer_id);</div><div class='add'>+	if (IS_ERR(peer)) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "cannot create new peer object for peer %u: %ld",</div><div class='add'>+				       peer_id, PTR_ERR(peer));</div><div class='add'>+		return PTR_ERR(peer);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* lookup the fd in the kernel table and extract the socket object */</div><div class='add'>+	sockfd = nla_get_u32(attrs[OVPN_A_PEER_SOCKET]);</div><div class='add'>+	/* sockfd_lookup() increases sock's refcounter */</div><div class='add'>+	sock = sockfd_lookup(sockfd, &amp;ret);</div><div class='add'>+	if (!sock) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "cannot lookup peer socket (fd=%u): %d",</div><div class='add'>+				       sockfd, ret);</div><div class='add'>+		ret = -ENOTSOCK;</div><div class='add'>+		goto peer_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Only when using UDP as transport protocol the remote endpoint</div><div class='add'>+	 * can be configured so that ovpn knows where to send packets to.</div><div class='add'>+	 */</div><div class='add'>+	if (sock-&gt;sk-&gt;sk_protocol == IPPROTO_UDP &amp;&amp;</div><div class='add'>+	    !attrs[OVPN_A_PEER_REMOTE_IPV4] &amp;&amp;</div><div class='add'>+	    !attrs[OVPN_A_PEER_REMOTE_IPV6]) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "missing remote IP address for UDP socket");</div><div class='add'>+		sockfd_put(sock);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto peer_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* In case of TCP, the socket is connected to the peer and ovpn</div><div class='add'>+	 * will just send bytes over it, without the need to specify a</div><div class='add'>+	 * destination.</div><div class='add'>+	 */</div><div class='add'>+	if (sock-&gt;sk-&gt;sk_protocol == IPPROTO_TCP &amp;&amp;</div><div class='add'>+	    (attrs[OVPN_A_PEER_REMOTE_IPV4] ||</div><div class='add'>+	     attrs[OVPN_A_PEER_REMOTE_IPV6])) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "unexpected remote IP address with TCP socket");</div><div class='add'>+		sockfd_put(sock);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto peer_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn_sock = ovpn_socket_new(sock, peer);</div><div class='add'>+	/* at this point we unconditionally drop the reference to the socket:</div><div class='add'>+	 * - in case of error, the socket has to be dropped</div><div class='add'>+	 * - if case of success, the socket is configured and let</div><div class='add'>+	 *   userspace own the reference, so that the latter can</div><div class='add'>+	 *   trigger the final close()</div><div class='add'>+	 */</div><div class='add'>+	sockfd_put(sock);</div><div class='add'>+	if (IS_ERR(ovpn_sock)) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "cannot encapsulate socket: %ld",</div><div class='add'>+				       PTR_ERR(ovpn_sock));</div><div class='add'>+		ret = -ENOTSOCK;</div><div class='add'>+		goto peer_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_assign_pointer(peer-&gt;sock, ovpn_sock);</div><div class='add'>+</div><div class='add'>+	ret = ovpn_nl_peer_modify(peer, info, attrs);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto sock_release;</div><div class='add'>+</div><div class='add'>+	ret = ovpn_peer_add(ovpn, peer);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "cannot add new peer (id=%u) to hashtable: %d",</div><div class='add'>+				       peer-&gt;id, ret);</div><div class='add'>+		goto sock_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+sock_release:</div><div class='add'>+	ovpn_socket_release(peer);</div><div class='add'>+peer_release:</div><div class='add'>+	/* release right away because peer was not yet hashed, thus it is not</div><div class='add'>+	 * used in any context</div><div class='add'>+	 */</div><div class='add'>+	ovpn_peer_release(peer);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_nl_peer_set_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *attrs[OVPN_A_PEER_MAX + 1];</div><div class='add'>+	struct ovpn_priv *ovpn = info-&gt;user_ptr[0];</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	u32 peer_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (GENL_REQ_ATTR_CHECK(info, OVPN_A_PEER))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = nla_parse_nested(attrs, OVPN_A_PEER_MAX, info-&gt;attrs[OVPN_A_PEER],</div><div class='add'>+			       ovpn_peer_set_input_nl_policy, info-&gt;extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ovpn_nl_peer_precheck(ovpn, info, attrs);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (attrs[OVPN_A_PEER_SOCKET]) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "socket cannot be modified");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	peer_id = nla_get_u32(attrs[OVPN_A_PEER_ID]);</div><div class='add'>+	peer = ovpn_peer_get_by_id(ovpn, peer_id);</div><div class='add'>+	if (!peer) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "cannot find peer with id %u", peer_id);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* when using a TCP socket the remote IP is not expected */</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference(peer-&gt;sock);</div><div class='add'>+	if (sock &amp;&amp; sock-&gt;sk-&gt;sk_protocol == IPPROTO_TCP &amp;&amp;</div><div class='add'>+	    (attrs[OVPN_A_PEER_REMOTE_IPV4] ||</div><div class='add'>+	     attrs[OVPN_A_PEER_REMOTE_IPV6])) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "unexpected remote IP address with TCP socket");</div><div class='add'>+		ovpn_peer_put(peer);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+	ret = ovpn_nl_peer_modify(peer, info, attrs);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		spin_unlock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+		ovpn_peer_put(peer);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* ret == 1 means that VPN IPv4/6 has been modified and rehashing</div><div class='add'>+	 * is required</div><div class='add'>+	 */</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		ovpn_peer_hash_vpn_ip(peer);</div><div class='add'>+	spin_unlock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_nl_send_peer(struct sk_buff *skb, const struct genl_info *info,</div><div class='add'>+			     const struct ovpn_peer *peer, u32 portid, u32 seq,</div><div class='add'>+			     int flags)</div><div class='add'>+{</div><div class='add'>+	const struct ovpn_bind *bind;</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	int ret = -EMSGSIZE;</div><div class='add'>+	struct nlattr *attr;</div><div class='add'>+	__be16 local_port;</div><div class='add'>+	void *hdr;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	hdr = genlmsg_put(skb, portid, seq, &amp;ovpn_nl_family, flags,</div><div class='add'>+			  OVPN_CMD_PEER_GET);</div><div class='add'>+	if (!hdr)</div><div class='add'>+		return -ENOBUFS;</div><div class='add'>+</div><div class='add'>+	attr = nla_nest_start(skb, OVPN_A_PEER);</div><div class='add'>+	if (!attr)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference(peer-&gt;sock);</div><div class='add'>+	if (!sock) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!net_eq(genl_info_net(info), sock_net(sock-&gt;sk))) {</div><div class='add'>+		id = peernet2id_alloc(genl_info_net(info),</div><div class='add'>+				      sock_net(sock-&gt;sk),</div><div class='add'>+				      GFP_ATOMIC);</div><div class='add'>+		if (nla_put_s32(skb, OVPN_A_PEER_SOCKET_NETNSID, id))</div><div class='add'>+			goto err_unlock;</div><div class='add'>+	}</div><div class='add'>+	local_port = inet_sk(sock-&gt;sk)-&gt;inet_sport;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(skb, OVPN_A_PEER_ID, peer-&gt;id))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (peer-&gt;vpn_addrs.ipv4.s_addr != htonl(INADDR_ANY))</div><div class='add'>+		if (nla_put_in_addr(skb, OVPN_A_PEER_VPN_IPV4,</div><div class='add'>+				    peer-&gt;vpn_addrs.ipv4.s_addr))</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+	if (!ipv6_addr_equal(&amp;peer-&gt;vpn_addrs.ipv6, &amp;in6addr_any))</div><div class='add'>+		if (nla_put_in6_addr(skb, OVPN_A_PEER_VPN_IPV6,</div><div class='add'>+				     &amp;peer-&gt;vpn_addrs.ipv6))</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(skb, OVPN_A_PEER_KEEPALIVE_INTERVAL,</div><div class='add'>+			peer-&gt;keepalive_interval) ||</div><div class='add'>+	    nla_put_u32(skb, OVPN_A_PEER_KEEPALIVE_TIMEOUT,</div><div class='add'>+			peer-&gt;keepalive_timeout))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	bind = rcu_dereference(peer-&gt;bind);</div><div class='add'>+	if (bind) {</div><div class='add'>+		if (bind-&gt;remote.in4.sin_family == AF_INET) {</div><div class='add'>+			if (nla_put_in_addr(skb, OVPN_A_PEER_REMOTE_IPV4,</div><div class='add'>+					    bind-&gt;remote.in4.sin_addr.s_addr) ||</div><div class='add'>+			    nla_put_net16(skb, OVPN_A_PEER_REMOTE_PORT,</div><div class='add'>+					  bind-&gt;remote.in4.sin_port) ||</div><div class='add'>+			    nla_put_in_addr(skb, OVPN_A_PEER_LOCAL_IPV4,</div><div class='add'>+					    bind-&gt;local.ipv4.s_addr))</div><div class='add'>+				goto err_unlock;</div><div class='add'>+		} else if (bind-&gt;remote.in4.sin_family == AF_INET6) {</div><div class='add'>+			if (nla_put_in6_addr(skb, OVPN_A_PEER_REMOTE_IPV6,</div><div class='add'>+					     &amp;bind-&gt;remote.in6.sin6_addr) ||</div><div class='add'>+			    nla_put_u32(skb, OVPN_A_PEER_REMOTE_IPV6_SCOPE_ID,</div><div class='add'>+					bind-&gt;remote.in6.sin6_scope_id) ||</div><div class='add'>+			    nla_put_net16(skb, OVPN_A_PEER_REMOTE_PORT,</div><div class='add'>+					  bind-&gt;remote.in6.sin6_port) ||</div><div class='add'>+			    nla_put_in6_addr(skb, OVPN_A_PEER_LOCAL_IPV6,</div><div class='add'>+					     &amp;bind-&gt;local.ipv6))</div><div class='add'>+				goto err_unlock;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	if (nla_put_net16(skb, OVPN_A_PEER_LOCAL_PORT, local_port) ||</div><div class='add'>+	    /* VPN RX stats */</div><div class='add'>+	    nla_put_uint(skb, OVPN_A_PEER_VPN_RX_BYTES,</div><div class='add'>+			 atomic64_read(&amp;peer-&gt;vpn_stats.rx.bytes)) ||</div><div class='add'>+	    nla_put_uint(skb, OVPN_A_PEER_VPN_RX_PACKETS,</div><div class='add'>+			 atomic64_read(&amp;peer-&gt;vpn_stats.rx.packets)) ||</div><div class='add'>+	    /* VPN TX stats */</div><div class='add'>+	    nla_put_uint(skb, OVPN_A_PEER_VPN_TX_BYTES,</div><div class='add'>+			 atomic64_read(&amp;peer-&gt;vpn_stats.tx.bytes)) ||</div><div class='add'>+	    nla_put_uint(skb, OVPN_A_PEER_VPN_TX_PACKETS,</div><div class='add'>+			 atomic64_read(&amp;peer-&gt;vpn_stats.tx.packets)) ||</div><div class='add'>+	    /* link RX stats */</div><div class='add'>+	    nla_put_uint(skb, OVPN_A_PEER_LINK_RX_BYTES,</div><div class='add'>+			 atomic64_read(&amp;peer-&gt;link_stats.rx.bytes)) ||</div><div class='add'>+	    nla_put_uint(skb, OVPN_A_PEER_LINK_RX_PACKETS,</div><div class='add'>+			 atomic64_read(&amp;peer-&gt;link_stats.rx.packets)) ||</div><div class='add'>+	    /* link TX stats */</div><div class='add'>+	    nla_put_uint(skb, OVPN_A_PEER_LINK_TX_BYTES,</div><div class='add'>+			 atomic64_read(&amp;peer-&gt;link_stats.tx.bytes)) ||</div><div class='add'>+	    nla_put_uint(skb, OVPN_A_PEER_LINK_TX_PACKETS,</div><div class='add'>+			 atomic64_read(&amp;peer-&gt;link_stats.tx.packets)))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	nla_nest_end(skb, attr);</div><div class='add'>+	genlmsg_end(skb, hdr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_unlock:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+err:</div><div class='add'>+	genlmsg_cancel(skb, hdr);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_nl_peer_get_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *attrs[OVPN_A_PEER_MAX + 1];</div><div class='add'>+	struct ovpn_priv *ovpn = info-&gt;user_ptr[0];</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	struct sk_buff *msg;</div><div class='add'>+	u32 peer_id;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	if (GENL_REQ_ATTR_CHECK(info, OVPN_A_PEER))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = nla_parse_nested(attrs, OVPN_A_PEER_MAX, info-&gt;attrs[OVPN_A_PEER],</div><div class='add'>+			       ovpn_peer_nl_policy, info-&gt;extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_PEER], attrs,</div><div class='add'>+			      OVPN_A_PEER_ID))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* OVPN_CMD_PEER_GET expects only the PEER_ID, therefore</div><div class='add'>+	 * ensure that the user hasn't specified any other attribute.</div><div class='add'>+	 *</div><div class='add'>+	 * Unfortunately this check cannot be performed via netlink</div><div class='add'>+	 * spec/policy and must be open-coded.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; OVPN_A_PEER_MAX + 1; i++) {</div><div class='add'>+		if (i == OVPN_A_PEER_ID)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (attrs[i]) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+					       "unexpected attribute %u", i);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	peer_id = nla_get_u32(attrs[OVPN_A_PEER_ID]);</div><div class='add'>+	peer = ovpn_peer_get_by_id(ovpn, peer_id);</div><div class='add'>+	if (!peer) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "cannot find peer with id %u", peer_id);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!msg) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ovpn_nl_send_peer(msg, info, peer, info-&gt;snd_portid,</div><div class='add'>+				info-&gt;snd_seq, 0);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		nlmsg_free(msg);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = genlmsg_reply(msg, info);</div><div class='add'>+err:</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_nl_peer_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb)</div><div class='add'>+{</div><div class='add'>+	const struct genl_info *info = genl_info_dump(cb);</div><div class='add'>+	int bkt, last_idx = cb-&gt;args[1], dumped = 0;</div><div class='add'>+	netdevice_tracker tracker;</div><div class='add'>+	struct ovpn_priv *ovpn;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+</div><div class='add'>+	ovpn = ovpn_get_dev_from_attrs(sock_net(cb-&gt;skb-&gt;sk), info, &amp;tracker);</div><div class='add'>+	if (IS_ERR(ovpn))</div><div class='add'>+		return PTR_ERR(ovpn);</div><div class='add'>+</div><div class='add'>+	if (ovpn-&gt;mode == OVPN_MODE_P2P) {</div><div class='add'>+		/* if we already dumped a peer it means we are done */</div><div class='add'>+		if (last_idx)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		peer = rcu_dereference(ovpn-&gt;peer);</div><div class='add'>+		if (peer) {</div><div class='add'>+			if (ovpn_nl_send_peer(skb, info, peer,</div><div class='add'>+					      NETLINK_CB(cb-&gt;skb).portid,</div><div class='add'>+					      cb-&gt;nlh-&gt;nlmsg_seq,</div><div class='add'>+					      NLM_F_MULTI) == 0)</div><div class='add'>+				dumped++;</div><div class='add'>+		}</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+	} else {</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		hash_for_each_rcu(ovpn-&gt;peers-&gt;by_id, bkt, peer,</div><div class='add'>+				  hash_entry_id) {</div><div class='add'>+			/* skip already dumped peers that were dumped by</div><div class='add'>+			 * previous invocations</div><div class='add'>+			 */</div><div class='add'>+			if (last_idx &gt; 0) {</div><div class='add'>+				last_idx--;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ovpn_nl_send_peer(skb, info, peer,</div><div class='add'>+					      NETLINK_CB(cb-&gt;skb).portid,</div><div class='add'>+					      cb-&gt;nlh-&gt;nlmsg_seq,</div><div class='add'>+					      NLM_F_MULTI) &lt; 0)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			/* count peers being dumped during this invocation */</div><div class='add'>+			dumped++;</div><div class='add'>+		}</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	netdev_put(ovpn-&gt;dev, &amp;tracker);</div><div class='add'>+</div><div class='add'>+	/* sum up peers dumped in this message, so that at the next invocation</div><div class='add'>+	 * we can continue from where we left</div><div class='add'>+	 */</div><div class='add'>+	cb-&gt;args[1] += dumped;</div><div class='add'>+	return skb-&gt;len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_nl_peer_del_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *attrs[OVPN_A_PEER_MAX + 1];</div><div class='add'>+	struct ovpn_priv *ovpn = info-&gt;user_ptr[0];</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	u32 peer_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (GENL_REQ_ATTR_CHECK(info, OVPN_A_PEER))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = nla_parse_nested(attrs, OVPN_A_PEER_MAX, info-&gt;attrs[OVPN_A_PEER],</div><div class='add'>+			       ovpn_peer_del_input_nl_policy, info-&gt;extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_PEER], attrs,</div><div class='add'>+			      OVPN_A_PEER_ID))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	peer_id = nla_get_u32(attrs[OVPN_A_PEER_ID]);</div><div class='add'>+	peer = ovpn_peer_get_by_id(ovpn, peer_id);</div><div class='add'>+	if (!peer) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "cannot find peer with id %u", peer_id);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ovpn-&gt;dev, "del peer %u\n", peer-&gt;id);</div><div class='add'>+	ret = ovpn_peer_del(peer, OVPN_DEL_PEER_REASON_USERSPACE);</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_nl_get_key_dir(struct genl_info *info, struct nlattr *key,</div><div class='add'>+			       enum ovpn_cipher_alg cipher,</div><div class='add'>+			       struct ovpn_key_direction *dir)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *attrs[OVPN_A_KEYDIR_MAX + 1];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = nla_parse_nested(attrs, OVPN_A_KEYDIR_MAX, key,</div><div class='add'>+			       ovpn_keydir_nl_policy, info-&gt;extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch (cipher) {</div><div class='add'>+	case OVPN_CIPHER_ALG_AES_GCM:</div><div class='add'>+	case OVPN_CIPHER_ALG_CHACHA20_POLY1305:</div><div class='add'>+		if (NL_REQ_ATTR_CHECK(info-&gt;extack, key, attrs,</div><div class='add'>+				      OVPN_A_KEYDIR_CIPHER_KEY) ||</div><div class='add'>+		    NL_REQ_ATTR_CHECK(info-&gt;extack, key, attrs,</div><div class='add'>+				      OVPN_A_KEYDIR_NONCE_TAIL))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		dir-&gt;cipher_key = nla_data(attrs[OVPN_A_KEYDIR_CIPHER_KEY]);</div><div class='add'>+		dir-&gt;cipher_key_size = nla_len(attrs[OVPN_A_KEYDIR_CIPHER_KEY]);</div><div class='add'>+</div><div class='add'>+		/* These algorithms require a 96bit nonce,</div><div class='add'>+		 * Construct it by combining 4-bytes packet id and</div><div class='add'>+		 * 8-bytes nonce-tail from userspace</div><div class='add'>+		 */</div><div class='add'>+		dir-&gt;nonce_tail = nla_data(attrs[OVPN_A_KEYDIR_NONCE_TAIL]);</div><div class='add'>+		dir-&gt;nonce_tail_size = nla_len(attrs[OVPN_A_KEYDIR_NONCE_TAIL]);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(info-&gt;extack, "unsupported cipher");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_nl_key_new_doit - configure a new key for the specified peer</div><div class='add'>+ * @skb: incoming netlink message</div><div class='add'>+ * @info: genetlink metadata</div><div class='add'>+ *</div><div class='add'>+ * This function allows the user to install a new key in the peer crypto</div><div class='add'>+ * state.</div><div class='add'>+ * Each peer has two 'slots', namely 'primary' and 'secondary', where</div><div class='add'>+ * keys can be installed. The key in the 'primary' slot is used for</div><div class='add'>+ * encryption, while both keys can be used for decryption by matching the</div><div class='add'>+ * key ID carried in the incoming packet.</div><div class='add'>+ *</div><div class='add'>+ * The user is responsible for rotating keys when necessary. The user</div><div class='add'>+ * may fetch peer traffic statistics via netlink in order to better</div><div class='add'>+ * identify the right time to rotate keys.</div><div class='add'>+ * The renegotiation follows these steps:</div><div class='add'>+ * 1. a new key is computed by the user and is installed in the 'secondary'</div><div class='add'>+ *    slot</div><div class='add'>+ * 2. at user discretion (usually after a predetermined time) 'primary' and</div><div class='add'>+ *    'secondary' contents are swapped and the new key starts being used for</div><div class='add'>+ *    encryption, while the old key is kept around for decryption of late</div><div class='add'>+ *    packets.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise.</div><div class='add'>+ */</div><div class='add'>+int ovpn_nl_key_new_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *attrs[OVPN_A_KEYCONF_MAX + 1];</div><div class='add'>+	struct ovpn_priv *ovpn = info-&gt;user_ptr[0];</div><div class='add'>+	struct ovpn_peer_key_reset pkr;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	u32 peer_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (GENL_REQ_ATTR_CHECK(info, OVPN_A_KEYCONF))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = nla_parse_nested(attrs, OVPN_A_KEYCONF_MAX,</div><div class='add'>+			       info-&gt;attrs[OVPN_A_KEYCONF],</div><div class='add'>+			       ovpn_keyconf_nl_policy, info-&gt;extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_PEER_ID))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_SLOT) ||</div><div class='add'>+	    NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_KEY_ID) ||</div><div class='add'>+	    NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_CIPHER_ALG) ||</div><div class='add'>+	    NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_ENCRYPT_DIR) ||</div><div class='add'>+	    NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_DECRYPT_DIR))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pkr.slot = nla_get_u32(attrs[OVPN_A_KEYCONF_SLOT]);</div><div class='add'>+	pkr.key.key_id = nla_get_u32(attrs[OVPN_A_KEYCONF_KEY_ID]);</div><div class='add'>+	pkr.key.cipher_alg = nla_get_u32(attrs[OVPN_A_KEYCONF_CIPHER_ALG]);</div><div class='add'>+</div><div class='add'>+	ret = ovpn_nl_get_key_dir(info, attrs[OVPN_A_KEYCONF_ENCRYPT_DIR],</div><div class='add'>+				  pkr.key.cipher_alg, &amp;pkr.key.encrypt);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ovpn_nl_get_key_dir(info, attrs[OVPN_A_KEYCONF_DECRYPT_DIR],</div><div class='add'>+				  pkr.key.cipher_alg, &amp;pkr.key.decrypt);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	peer_id = nla_get_u32(attrs[OVPN_A_KEYCONF_PEER_ID]);</div><div class='add'>+	peer = ovpn_peer_get_by_id(ovpn, peer_id);</div><div class='add'>+	if (!peer) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "no peer with id %u to set key for",</div><div class='add'>+				       peer_id);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ovpn_crypto_state_reset(&amp;peer-&gt;crypto, &amp;pkr);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "cannot install new key for peer %u",</div><div class='add'>+				       peer_id);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ovpn-&gt;dev, "new key installed (id=%u) for peer %u\n",</div><div class='add'>+		   pkr.key.key_id, peer_id);</div><div class='add'>+out:</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_nl_send_key(struct sk_buff *skb, const struct genl_info *info,</div><div class='add'>+			    u32 peer_id, enum ovpn_key_slot slot,</div><div class='add'>+			    const struct ovpn_key_config *keyconf)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *attr;</div><div class='add'>+	void *hdr;</div><div class='add'>+</div><div class='add'>+	hdr = genlmsg_put(skb, info-&gt;snd_portid, info-&gt;snd_seq, &amp;ovpn_nl_family,</div><div class='add'>+			  0, OVPN_CMD_KEY_GET);</div><div class='add'>+	if (!hdr)</div><div class='add'>+		return -ENOBUFS;</div><div class='add'>+</div><div class='add'>+	attr = nla_nest_start(skb, OVPN_A_KEYCONF);</div><div class='add'>+	if (!attr)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(skb, OVPN_A_KEYCONF_PEER_ID, peer_id))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(skb, OVPN_A_KEYCONF_SLOT, slot) ||</div><div class='add'>+	    nla_put_u32(skb, OVPN_A_KEYCONF_KEY_ID, keyconf-&gt;key_id) ||</div><div class='add'>+	    nla_put_u32(skb, OVPN_A_KEYCONF_CIPHER_ALG, keyconf-&gt;cipher_alg))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	nla_nest_end(skb, attr);</div><div class='add'>+	genlmsg_end(skb, hdr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	genlmsg_cancel(skb, hdr);</div><div class='add'>+	return -EMSGSIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_nl_key_get_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *attrs[OVPN_A_KEYCONF_MAX + 1];</div><div class='add'>+	struct ovpn_priv *ovpn = info-&gt;user_ptr[0];</div><div class='add'>+	struct ovpn_key_config keyconf = { 0 };</div><div class='add'>+	enum ovpn_key_slot slot;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	struct sk_buff *msg;</div><div class='add'>+	u32 peer_id;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	if (GENL_REQ_ATTR_CHECK(info, OVPN_A_KEYCONF))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = nla_parse_nested(attrs, OVPN_A_KEYCONF_MAX,</div><div class='add'>+			       info-&gt;attrs[OVPN_A_KEYCONF],</div><div class='add'>+			       ovpn_keyconf_get_nl_policy, info-&gt;extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_PEER_ID))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_SLOT))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* OVPN_CMD_KEY_GET expects only the PEER_ID and the SLOT, therefore</div><div class='add'>+	 * ensure that the user hasn't specified any other attribute.</div><div class='add'>+	 *</div><div class='add'>+	 * Unfortunately this check cannot be performed via netlink</div><div class='add'>+	 * spec/policy and must be open-coded.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; OVPN_A_KEYCONF_MAX + 1; i++) {</div><div class='add'>+		if (i == OVPN_A_KEYCONF_PEER_ID ||</div><div class='add'>+		    i == OVPN_A_KEYCONF_SLOT)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (attrs[i]) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+					       "unexpected attribute %u", i);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	peer_id = nla_get_u32(attrs[OVPN_A_KEYCONF_PEER_ID]);</div><div class='add'>+	peer = ovpn_peer_get_by_id(ovpn, peer_id);</div><div class='add'>+	if (!peer) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "cannot find peer with id %u", peer_id);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	slot = nla_get_u32(attrs[OVPN_A_KEYCONF_SLOT]);</div><div class='add'>+</div><div class='add'>+	ret = ovpn_crypto_config_get(&amp;peer-&gt;crypto, slot, &amp;keyconf);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "cannot extract key from slot %u for peer %u",</div><div class='add'>+				       slot, peer_id);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!msg) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ovpn_nl_send_key(msg, info, peer-&gt;id, slot, &amp;keyconf);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		nlmsg_free(msg);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = genlmsg_reply(msg, info);</div><div class='add'>+err:</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_nl_key_swap_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn = info-&gt;user_ptr[0];</div><div class='add'>+	struct nlattr *attrs[OVPN_A_PEER_MAX + 1];</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	u32 peer_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (GENL_REQ_ATTR_CHECK(info, OVPN_A_KEYCONF))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = nla_parse_nested(attrs, OVPN_A_KEYCONF_MAX,</div><div class='add'>+			       info-&gt;attrs[OVPN_A_KEYCONF],</div><div class='add'>+			       ovpn_keyconf_swap_input_nl_policy, info-&gt;extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_PEER_ID))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	peer_id = nla_get_u32(attrs[OVPN_A_KEYCONF_PEER_ID]);</div><div class='add'>+	peer = ovpn_peer_get_by_id(ovpn, peer_id);</div><div class='add'>+	if (!peer) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "no peer with id %u to swap keys for",</div><div class='add'>+				       peer_id);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn_crypto_key_slots_swap(&amp;peer-&gt;crypto);</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ovpn_nl_key_del_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *attrs[OVPN_A_KEYCONF_MAX + 1];</div><div class='add'>+	struct ovpn_priv *ovpn = info-&gt;user_ptr[0];</div><div class='add'>+	enum ovpn_key_slot slot;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	u32 peer_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (GENL_REQ_ATTR_CHECK(info, OVPN_A_KEYCONF))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = nla_parse_nested(attrs, OVPN_A_KEYCONF_MAX,</div><div class='add'>+			       info-&gt;attrs[OVPN_A_KEYCONF],</div><div class='add'>+			       ovpn_keyconf_del_input_nl_policy, info-&gt;extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_PEER_ID))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (NL_REQ_ATTR_CHECK(info-&gt;extack, info-&gt;attrs[OVPN_A_KEYCONF], attrs,</div><div class='add'>+			      OVPN_A_KEYCONF_SLOT))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	peer_id = nla_get_u32(attrs[OVPN_A_KEYCONF_PEER_ID]);</div><div class='add'>+	slot = nla_get_u32(attrs[OVPN_A_KEYCONF_SLOT]);</div><div class='add'>+</div><div class='add'>+	peer = ovpn_peer_get_by_id(ovpn, peer_id);</div><div class='add'>+	if (!peer) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(info-&gt;extack,</div><div class='add'>+				       "no peer with id %u to delete key for",</div><div class='add'>+				       peer_id);</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn_crypto_key_slot_delete(&amp;peer-&gt;crypto, slot);</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_nl_peer_del_notify - notify userspace about peer being deleted</div><div class='add'>+ * @peer: the peer being deleted</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+int ovpn_nl_peer_del_notify(struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	struct sk_buff *msg;</div><div class='add'>+	struct nlattr *attr;</div><div class='add'>+	int ret = -EMSGSIZE;</div><div class='add'>+	void *hdr;</div><div class='add'>+</div><div class='add'>+	netdev_info(peer-&gt;ovpn-&gt;dev, "deleting peer with id %u, reason %d\n",</div><div class='add'>+		    peer-&gt;id, peer-&gt;delete_reason);</div><div class='add'>+</div><div class='add'>+	msg = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_ATOMIC);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hdr = genlmsg_put(msg, 0, 0, &amp;ovpn_nl_family, 0, OVPN_CMD_PEER_DEL_NTF);</div><div class='add'>+	if (!hdr) {</div><div class='add'>+		ret = -ENOBUFS;</div><div class='add'>+		goto err_free_msg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(msg, OVPN_A_IFINDEX, peer-&gt;ovpn-&gt;dev-&gt;ifindex))</div><div class='add'>+		goto err_cancel_msg;</div><div class='add'>+</div><div class='add'>+	attr = nla_nest_start(msg, OVPN_A_PEER);</div><div class='add'>+	if (!attr)</div><div class='add'>+		goto err_cancel_msg;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(msg, OVPN_A_PEER_DEL_REASON, peer-&gt;delete_reason))</div><div class='add'>+		goto err_cancel_msg;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(msg, OVPN_A_PEER_ID, peer-&gt;id))</div><div class='add'>+		goto err_cancel_msg;</div><div class='add'>+</div><div class='add'>+	nla_nest_end(msg, attr);</div><div class='add'>+</div><div class='add'>+	genlmsg_end(msg, hdr);</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference(peer-&gt;sock);</div><div class='add'>+	if (!sock) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_unlock;</div><div class='add'>+	}</div><div class='add'>+	genlmsg_multicast_netns(&amp;ovpn_nl_family, sock_net(sock-&gt;sk), msg, 0,</div><div class='add'>+				OVPN_NLGRP_PEERS, GFP_ATOMIC);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unlock:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+err_cancel_msg:</div><div class='add'>+	genlmsg_cancel(msg, hdr);</div><div class='add'>+err_free_msg:</div><div class='add'>+	nlmsg_free(msg);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_nl_key_swap_notify - notify userspace peer's key must be renewed</div><div class='add'>+ * @peer: the peer whose key needs to be renewed</div><div class='add'>+ * @key_id: the ID of the key that needs to be renewed</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+int ovpn_nl_key_swap_notify(struct ovpn_peer *peer, u8 key_id)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	struct nlattr *k_attr;</div><div class='add'>+	struct sk_buff *msg;</div><div class='add'>+	int ret = -EMSGSIZE;</div><div class='add'>+	void *hdr;</div><div class='add'>+</div><div class='add'>+	netdev_info(peer-&gt;ovpn-&gt;dev, "peer with id %u must rekey - primary key unusable.\n",</div><div class='add'>+		    peer-&gt;id);</div><div class='add'>+</div><div class='add'>+	msg = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_ATOMIC);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hdr = genlmsg_put(msg, 0, 0, &amp;ovpn_nl_family, 0, OVPN_CMD_KEY_SWAP_NTF);</div><div class='add'>+	if (!hdr) {</div><div class='add'>+		ret = -ENOBUFS;</div><div class='add'>+		goto err_free_msg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(msg, OVPN_A_IFINDEX, peer-&gt;ovpn-&gt;dev-&gt;ifindex))</div><div class='add'>+		goto err_cancel_msg;</div><div class='add'>+</div><div class='add'>+	k_attr = nla_nest_start(msg, OVPN_A_KEYCONF);</div><div class='add'>+	if (!k_attr)</div><div class='add'>+		goto err_cancel_msg;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(msg, OVPN_A_KEYCONF_PEER_ID, peer-&gt;id))</div><div class='add'>+		goto err_cancel_msg;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u16(msg, OVPN_A_KEYCONF_KEY_ID, key_id))</div><div class='add'>+		goto err_cancel_msg;</div><div class='add'>+</div><div class='add'>+	nla_nest_end(msg, k_attr);</div><div class='add'>+	genlmsg_end(msg, hdr);</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference(peer-&gt;sock);</div><div class='add'>+	if (!sock) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_unlock;</div><div class='add'>+	}</div><div class='add'>+	genlmsg_multicast_netns(&amp;ovpn_nl_family, sock_net(sock-&gt;sk), msg, 0,</div><div class='add'>+				OVPN_NLGRP_PEERS, GFP_ATOMIC);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_unlock:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+err_cancel_msg:</div><div class='add'>+	genlmsg_cancel(msg, hdr);</div><div class='add'>+err_free_msg:</div><div class='add'>+	nlmsg_free(msg);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_nl_register - perform any needed registration in the NL subsustem</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+int __init ovpn_nl_register(void)</div><div class='add'>+{</div><div class='add'>+	int ret = genl_register_family(&amp;ovpn_nl_family);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("ovpn: genl_register_family failed: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_nl_unregister - undo any module wide netlink registration</div><div class='add'>+ */</div><div class='add'>+void ovpn_nl_unregister(void)</div><div class='add'>+{</div><div class='add'>+	genl_unregister_family(&amp;ovpn_nl_family);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/netlink.h b/drivers/net/ovpn/netlink.h<br/>new file mode 100644<br/>index 000000000000..8615dfc3c472<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/netlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/netlink.h</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_NETLINK_H_</div><div class='add'>+#define _NET_OVPN_NETLINK_H_</div><div class='add'>+</div><div class='add'>+int ovpn_nl_register(void);</div><div class='add'>+void ovpn_nl_unregister(void);</div><div class='add'>+</div><div class='add'>+int ovpn_nl_peer_del_notify(struct ovpn_peer *peer);</div><div class='add'>+int ovpn_nl_key_swap_notify(struct ovpn_peer *peer, u8 key_id);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_NETLINK_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/ovpnpriv.h b/drivers/net/ovpn/ovpnpriv.h<br/>new file mode 100644<br/>index 000000000000..5898f6adada7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/ovpnpriv.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/ovpnpriv.h</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2019-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_OVPNSTRUCT_H_</div><div class='add'>+#define _NET_OVPN_OVPNSTRUCT_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;net/gro_cells.h&gt;</div><div class='add'>+#include &lt;uapi/linux/if_link.h&gt;</div><div class='add'>+#include &lt;uapi/linux/ovpn.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ovpn_peer_collection - container of peers for MultiPeer mode</div><div class='add'>+ * @by_id: table of peers index by ID</div><div class='add'>+ * @by_vpn_addr4: table of peers indexed by VPN IPv4 address (items can be</div><div class='add'>+ *		  rehashed on the fly due to peer IP change)</div><div class='add'>+ * @by_vpn_addr6: table of peers indexed by VPN IPv6 address (items can be</div><div class='add'>+ *		  rehashed on the fly due to peer IP change)</div><div class='add'>+ * @by_transp_addr: table of peers indexed by transport address (items can be</div><div class='add'>+ *		    rehashed on the fly due to peer IP change)</div><div class='add'>+ */</div><div class='add'>+struct ovpn_peer_collection {</div><div class='add'>+	DECLARE_HASHTABLE(by_id, 12);</div><div class='add'>+	struct hlist_nulls_head by_vpn_addr4[1 &lt;&lt; 12];</div><div class='add'>+	struct hlist_nulls_head by_vpn_addr6[1 &lt;&lt; 12];</div><div class='add'>+	struct hlist_nulls_head by_transp_addr[1 &lt;&lt; 12];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ovpn_priv - per ovpn interface state</div><div class='add'>+ * @dev: the actual netdev representing the tunnel</div><div class='add'>+ * @mode: device operation mode (i.e. p2p, mp, ..)</div><div class='add'>+ * @lock: protect this object</div><div class='add'>+ * @peers: data structures holding multi-peer references</div><div class='add'>+ * @peer: in P2P mode, this is the only remote peer</div><div class='add'>+ * @gro_cells: pointer to the Generic Receive Offload cell</div><div class='add'>+ * @keepalive_work: struct used to schedule keepalive periodic job</div><div class='add'>+ */</div><div class='add'>+struct ovpn_priv {</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	enum ovpn_mode mode;</div><div class='add'>+	spinlock_t lock; /* protect writing to the ovpn_priv object */</div><div class='add'>+	struct ovpn_peer_collection *peers;</div><div class='add'>+	struct ovpn_peer __rcu *peer;</div><div class='add'>+	struct gro_cells gro_cells;</div><div class='add'>+	struct delayed_work keepalive_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_OVPNSTRUCT_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/peer.c b/drivers/net/ovpn/peer.c<br/>new file mode 100644<br/>index 000000000000..4bfcab0c8652<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/peer.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/peer.c</a></div><div class='hunk'>@@ -0,0 +1,1364 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/hashtable.h&gt;</div><div class='add'>+#include &lt;net/ip6_route.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "bind.h"</div><div class='add'>+#include "pktid.h"</div><div class='add'>+#include "crypto.h"</div><div class='add'>+#include "io.h"</div><div class='add'>+#include "main.h"</div><div class='add'>+#include "netlink.h"</div><div class='add'>+#include "peer.h"</div><div class='add'>+#include "socket.h"</div><div class='add'>+</div><div class='add'>+static void unlock_ovpn(struct ovpn_priv *ovpn,</div><div class='add'>+			 struct llist_head *release_list)</div><div class='add'>+	__releases(&amp;ovpn-&gt;lock)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+</div><div class='add'>+	llist_for_each_entry(peer, release_list-&gt;first, release_entry) {</div><div class='add'>+		ovpn_socket_release(peer);</div><div class='add'>+		ovpn_peer_put(peer);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_keepalive_set - configure keepalive values for peer</div><div class='add'>+ * @peer: the peer to configure</div><div class='add'>+ * @interval: outgoing keepalive interval</div><div class='add'>+ * @timeout: incoming keepalive timeout</div><div class='add'>+ */</div><div class='add'>+void ovpn_peer_keepalive_set(struct ovpn_peer *peer, u32 interval, u32 timeout)</div><div class='add'>+{</div><div class='add'>+	time64_t now = ktime_get_real_seconds();</div><div class='add'>+</div><div class='add'>+	netdev_dbg(peer-&gt;ovpn-&gt;dev,</div><div class='add'>+		   "scheduling keepalive for peer %u: interval=%u timeout=%u\n",</div><div class='add'>+		   peer-&gt;id, interval, timeout);</div><div class='add'>+</div><div class='add'>+	peer-&gt;keepalive_interval = interval;</div><div class='add'>+	WRITE_ONCE(peer-&gt;last_sent, now);</div><div class='add'>+	peer-&gt;keepalive_xmit_exp = now + interval;</div><div class='add'>+</div><div class='add'>+	peer-&gt;keepalive_timeout = timeout;</div><div class='add'>+	WRITE_ONCE(peer-&gt;last_recv, now);</div><div class='add'>+	peer-&gt;keepalive_recv_exp = now + timeout;</div><div class='add'>+</div><div class='add'>+	/* now that interval and timeout have been changed, kick</div><div class='add'>+	 * off the worker so that the next delay can be recomputed</div><div class='add'>+	 */</div><div class='add'>+	mod_delayed_work(system_wq, &amp;peer-&gt;ovpn-&gt;keepalive_work, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_keepalive_send - periodic worker sending keepalive packets</div><div class='add'>+ * @work: pointer to the work member of the related peer object</div><div class='add'>+ *</div><div class='add'>+ * NOTE: the reference to peer is not dropped because it gets inherited</div><div class='add'>+ * by ovpn_xmit_special()</div><div class='add'>+ */</div><div class='add'>+static void ovpn_peer_keepalive_send(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer = container_of(work, struct ovpn_peer,</div><div class='add'>+					      keepalive_work);</div><div class='add'>+</div><div class='add'>+	local_bh_disable();</div><div class='add'>+	ovpn_xmit_special(peer, ovpn_keepalive_message,</div><div class='add'>+			  sizeof(ovpn_keepalive_message));</div><div class='add'>+	local_bh_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_new - allocate and initialize a new peer object</div><div class='add'>+ * @ovpn: the openvpn instance inside which the peer should be created</div><div class='add'>+ * @id: the ID assigned to this peer</div><div class='add'>+ *</div><div class='add'>+ * Return: a pointer to the new peer on success or an error code otherwise</div><div class='add'>+ */</div><div class='add'>+struct ovpn_peer *ovpn_peer_new(struct ovpn_priv *ovpn, u32 id)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* alloc and init peer object */</div><div class='add'>+	peer = kzalloc(sizeof(*peer), GFP_KERNEL);</div><div class='add'>+	if (!peer)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	peer-&gt;id = id;</div><div class='add'>+	peer-&gt;ovpn = ovpn;</div><div class='add'>+</div><div class='add'>+	peer-&gt;vpn_addrs.ipv4.s_addr = htonl(INADDR_ANY);</div><div class='add'>+	peer-&gt;vpn_addrs.ipv6 = in6addr_any;</div><div class='add'>+</div><div class='add'>+	RCU_INIT_POINTER(peer-&gt;bind, NULL);</div><div class='add'>+	ovpn_crypto_state_init(&amp;peer-&gt;crypto);</div><div class='add'>+	spin_lock_init(&amp;peer-&gt;lock);</div><div class='add'>+	kref_init(&amp;peer-&gt;refcount);</div><div class='add'>+	ovpn_peer_stats_init(&amp;peer-&gt;vpn_stats);</div><div class='add'>+	ovpn_peer_stats_init(&amp;peer-&gt;link_stats);</div><div class='add'>+	INIT_WORK(&amp;peer-&gt;keepalive_work, ovpn_peer_keepalive_send);</div><div class='add'>+</div><div class='add'>+	ret = dst_cache_init(&amp;peer-&gt;dst_cache, GFP_KERNEL);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ovpn-&gt;dev,</div><div class='add'>+			   "cannot initialize dst cache for peer %u\n",</div><div class='add'>+			   peer-&gt;id);</div><div class='add'>+		kfree(peer);</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_hold(ovpn-&gt;dev, &amp;peer-&gt;dev_tracker, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	return peer;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_reset_sockaddr - recreate binding for peer</div><div class='add'>+ * @peer: peer to recreate the binding for</div><div class='add'>+ * @ss: sockaddr to use as remote endpoint for the binding</div><div class='add'>+ * @local_ip: local IP for the binding</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+int ovpn_peer_reset_sockaddr(struct ovpn_peer *peer,</div><div class='add'>+			     const struct sockaddr_storage *ss,</div><div class='add'>+			     const void *local_ip)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_bind *bind;</div><div class='add'>+	size_t ip_len;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;peer-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* create new ovpn_bind object */</div><div class='add'>+	bind = ovpn_bind_from_sockaddr(ss);</div><div class='add'>+	if (IS_ERR(bind))</div><div class='add'>+		return PTR_ERR(bind);</div><div class='add'>+</div><div class='add'>+	if (local_ip) {</div><div class='add'>+		if (ss-&gt;ss_family == AF_INET) {</div><div class='add'>+			ip_len = sizeof(struct in_addr);</div><div class='add'>+		} else if (ss-&gt;ss_family == AF_INET6) {</div><div class='add'>+			ip_len = sizeof(struct in6_addr);</div><div class='add'>+		} else {</div><div class='add'>+			net_dbg_ratelimited("%s: invalid family %u for remote endpoint for peer %u\n",</div><div class='add'>+					    netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+					    ss-&gt;ss_family, peer-&gt;id);</div><div class='add'>+			kfree(bind);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;bind-&gt;local, local_ip, ip_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set binding */</div><div class='add'>+	ovpn_bind_reset(peer, bind);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* variable name __tbl2 needs to be different from __tbl1</div><div class='add'>+ * in the macro below to avoid confusing clang</div><div class='add'>+ */</div><div class='add'>+#define ovpn_get_hash_slot(_tbl, _key, _key_len) ({	\</div><div class='add'>+	typeof(_tbl) *__tbl2 = &amp;(_tbl);			\</div><div class='add'>+	jhash(_key, _key_len, 0) % HASH_SIZE(*__tbl2);	\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+#define ovpn_get_hash_head(_tbl, _key, _key_len) ({		\</div><div class='add'>+	typeof(_tbl) *__tbl1 = &amp;(_tbl);				\</div><div class='add'>+	&amp;(*__tbl1)[ovpn_get_hash_slot(*__tbl1, _key, _key_len)];\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_endpoints_update - update remote or local endpoint for peer</div><div class='add'>+ * @peer: peer to update the remote endpoint for</div><div class='add'>+ * @skb: incoming packet to retrieve the source/destination address from</div><div class='add'>+ */</div><div class='add'>+void ovpn_peer_endpoints_update(struct ovpn_peer *peer, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct hlist_nulls_head *nhead;</div><div class='add'>+	struct sockaddr_storage ss;</div><div class='add'>+	struct sockaddr_in6 *sa6;</div><div class='add'>+	bool reset_cache = false;</div><div class='add'>+	struct sockaddr_in *sa;</div><div class='add'>+	struct ovpn_bind *bind;</div><div class='add'>+	const void *local_ip;</div><div class='add'>+	size_t salen = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;peer-&gt;lock);</div><div class='add'>+	bind = rcu_dereference_protected(peer-&gt;bind,</div><div class='add'>+					 lockdep_is_held(&amp;peer-&gt;lock));</div><div class='add'>+	if (unlikely(!bind))</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	switch (skb-&gt;protocol) {</div><div class='add'>+	case htons(ETH_P_IP):</div><div class='add'>+		/* float check */</div><div class='add'>+		if (unlikely(!ovpn_bind_skb_src_match(bind, skb))) {</div><div class='add'>+			/* unconditionally save local endpoint in case</div><div class='add'>+			 * of float, as it may have changed as well</div><div class='add'>+			 */</div><div class='add'>+			local_ip = &amp;ip_hdr(skb)-&gt;daddr;</div><div class='add'>+			sa = (struct sockaddr_in *)&amp;ss;</div><div class='add'>+			sa-&gt;sin_family = AF_INET;</div><div class='add'>+			sa-&gt;sin_addr.s_addr = ip_hdr(skb)-&gt;saddr;</div><div class='add'>+			sa-&gt;sin_port = udp_hdr(skb)-&gt;source;</div><div class='add'>+			salen = sizeof(*sa);</div><div class='add'>+			reset_cache = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* if no float happened, let's double check if the local endpoint</div><div class='add'>+		 * has changed</div><div class='add'>+		 */</div><div class='add'>+		if (unlikely(bind-&gt;local.ipv4.s_addr != ip_hdr(skb)-&gt;daddr)) {</div><div class='add'>+			net_dbg_ratelimited("%s: learning local IPv4 for peer %d (%pI4 -&gt; %pI4)\n",</div><div class='add'>+					    netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+					    peer-&gt;id, &amp;bind-&gt;local.ipv4.s_addr,</div><div class='add'>+					    &amp;ip_hdr(skb)-&gt;daddr);</div><div class='add'>+			bind-&gt;local.ipv4.s_addr = ip_hdr(skb)-&gt;daddr;</div><div class='add'>+			reset_cache = true;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case htons(ETH_P_IPV6):</div><div class='add'>+		/* float check */</div><div class='add'>+		if (unlikely(!ovpn_bind_skb_src_match(bind, skb))) {</div><div class='add'>+			/* unconditionally save local endpoint in case</div><div class='add'>+			 * of float, as it may have changed as well</div><div class='add'>+			 */</div><div class='add'>+			local_ip = &amp;ipv6_hdr(skb)-&gt;daddr;</div><div class='add'>+			sa6 = (struct sockaddr_in6 *)&amp;ss;</div><div class='add'>+			sa6-&gt;sin6_family = AF_INET6;</div><div class='add'>+			sa6-&gt;sin6_addr = ipv6_hdr(skb)-&gt;saddr;</div><div class='add'>+			sa6-&gt;sin6_port = udp_hdr(skb)-&gt;source;</div><div class='add'>+			sa6-&gt;sin6_scope_id = ipv6_iface_scope_id(&amp;ipv6_hdr(skb)-&gt;saddr,</div><div class='add'>+								 skb-&gt;skb_iif);</div><div class='add'>+			salen = sizeof(*sa6);</div><div class='add'>+			reset_cache = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* if no float happened, let's double check if the local endpoint</div><div class='add'>+		 * has changed</div><div class='add'>+		 */</div><div class='add'>+		if (unlikely(!ipv6_addr_equal(&amp;bind-&gt;local.ipv6,</div><div class='add'>+					      &amp;ipv6_hdr(skb)-&gt;daddr))) {</div><div class='add'>+			net_dbg_ratelimited("%s: learning local IPv6 for peer %d (%pI6c -&gt; %pI6c)\n",</div><div class='add'>+					    netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+					    peer-&gt;id, &amp;bind-&gt;local.ipv6,</div><div class='add'>+					    &amp;ipv6_hdr(skb)-&gt;daddr);</div><div class='add'>+			bind-&gt;local.ipv6 = ipv6_hdr(skb)-&gt;daddr;</div><div class='add'>+			reset_cache = true;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(reset_cache))</div><div class='add'>+		dst_cache_reset(&amp;peer-&gt;dst_cache);</div><div class='add'>+</div><div class='add'>+	/* if the peer did not float, we can bail out now */</div><div class='add'>+	if (likely(!salen))</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (unlikely(ovpn_peer_reset_sockaddr(peer,</div><div class='add'>+					      (struct sockaddr_storage *)&amp;ss,</div><div class='add'>+					      local_ip) &lt; 0))</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	net_dbg_ratelimited("%s: peer %d floated to %pIScp",</div><div class='add'>+			    netdev_name(peer-&gt;ovpn-&gt;dev), peer-&gt;id, &amp;ss);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* rehashing is required only in MP mode as P2P has one peer</div><div class='add'>+	 * only and thus there is no hashtable</div><div class='add'>+	 */</div><div class='add'>+	if (peer-&gt;ovpn-&gt;mode == OVPN_MODE_MP) {</div><div class='add'>+		spin_lock_bh(&amp;peer-&gt;ovpn-&gt;lock);</div><div class='add'>+		spin_lock_bh(&amp;peer-&gt;lock);</div><div class='add'>+		bind = rcu_dereference_protected(peer-&gt;bind,</div><div class='add'>+						 lockdep_is_held(&amp;peer-&gt;lock));</div><div class='add'>+		if (unlikely(!bind)) {</div><div class='add'>+			spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+			spin_unlock_bh(&amp;peer-&gt;ovpn-&gt;lock);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* This function may be invoked concurrently, therefore another</div><div class='add'>+		 * float may have happened in parallel: perform rehashing</div><div class='add'>+		 * using the peer-&gt;bind-&gt;remote directly as key</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		switch (bind-&gt;remote.in4.sin_family) {</div><div class='add'>+		case AF_INET:</div><div class='add'>+			salen = sizeof(*sa);</div><div class='add'>+			break;</div><div class='add'>+		case AF_INET6:</div><div class='add'>+			salen = sizeof(*sa6);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* remove old hashing */</div><div class='add'>+		hlist_nulls_del_init_rcu(&amp;peer-&gt;hash_entry_transp_addr);</div><div class='add'>+		/* re-add with new transport address */</div><div class='add'>+		nhead = ovpn_get_hash_head(peer-&gt;ovpn-&gt;peers-&gt;by_transp_addr,</div><div class='add'>+					   &amp;bind-&gt;remote, salen);</div><div class='add'>+		hlist_nulls_add_head_rcu(&amp;peer-&gt;hash_entry_transp_addr, nhead);</div><div class='add'>+		spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+		spin_unlock_bh(&amp;peer-&gt;ovpn-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+	return;</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_release_rcu - RCU callback performing last peer release steps</div><div class='add'>+ * @head: RCU member of the ovpn_peer</div><div class='add'>+ */</div><div class='add'>+static void ovpn_peer_release_rcu(struct rcu_head *head)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer = container_of(head, struct ovpn_peer, rcu);</div><div class='add'>+</div><div class='add'>+	/* this call will immediately free the dst_cache, therefore we</div><div class='add'>+	 * perform it in the RCU callback, when all contexts are done</div><div class='add'>+	 */</div><div class='add'>+	dst_cache_destroy(&amp;peer-&gt;dst_cache);</div><div class='add'>+	kfree(peer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_release - release peer private members</div><div class='add'>+ * @peer: the peer to release</div><div class='add'>+ */</div><div class='add'>+void ovpn_peer_release(struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	ovpn_crypto_state_release(&amp;peer-&gt;crypto);</div><div class='add'>+	spin_lock_bh(&amp;peer-&gt;lock);</div><div class='add'>+	ovpn_bind_reset(peer, NULL);</div><div class='add'>+	spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+	call_rcu(&amp;peer-&gt;rcu, ovpn_peer_release_rcu);</div><div class='add'>+	netdev_put(peer-&gt;ovpn-&gt;dev, &amp;peer-&gt;dev_tracker);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_release_kref - callback for kref_put</div><div class='add'>+ * @kref: the kref object belonging to the peer</div><div class='add'>+ */</div><div class='add'>+void ovpn_peer_release_kref(struct kref *kref)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer = container_of(kref, struct ovpn_peer, refcount);</div><div class='add'>+</div><div class='add'>+	ovpn_peer_release(peer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_skb_to_sockaddr - fill sockaddr with skb source address</div><div class='add'>+ * @skb: the packet to extract data from</div><div class='add'>+ * @ss: the sockaddr to fill</div><div class='add'>+ *</div><div class='add'>+ * Return: sockaddr length on success or -1 otherwise</div><div class='add'>+ */</div><div class='add'>+static int ovpn_peer_skb_to_sockaddr(struct sk_buff *skb,</div><div class='add'>+				     struct sockaddr_storage *ss)</div><div class='add'>+{</div><div class='add'>+	struct sockaddr_in6 *sa6;</div><div class='add'>+	struct sockaddr_in *sa4;</div><div class='add'>+</div><div class='add'>+	switch (skb-&gt;protocol) {</div><div class='add'>+	case htons(ETH_P_IP):</div><div class='add'>+		sa4 = (struct sockaddr_in *)ss;</div><div class='add'>+		sa4-&gt;sin_family = AF_INET;</div><div class='add'>+		sa4-&gt;sin_addr.s_addr = ip_hdr(skb)-&gt;saddr;</div><div class='add'>+		sa4-&gt;sin_port = udp_hdr(skb)-&gt;source;</div><div class='add'>+		return sizeof(*sa4);</div><div class='add'>+	case htons(ETH_P_IPV6):</div><div class='add'>+		sa6 = (struct sockaddr_in6 *)ss;</div><div class='add'>+		sa6-&gt;sin6_family = AF_INET6;</div><div class='add'>+		sa6-&gt;sin6_addr = ipv6_hdr(skb)-&gt;saddr;</div><div class='add'>+		sa6-&gt;sin6_port = udp_hdr(skb)-&gt;source;</div><div class='add'>+		return sizeof(*sa6);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_nexthop_from_skb4 - retrieve IPv4 nexthop for outgoing skb</div><div class='add'>+ * @skb: the outgoing packet</div><div class='add'>+ *</div><div class='add'>+ * Return: the IPv4 of the nexthop</div><div class='add'>+ */</div><div class='add'>+static __be32 ovpn_nexthop_from_skb4(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	const struct rtable *rt = skb_rtable(skb);</div><div class='add'>+</div><div class='add'>+	if (rt &amp;&amp; rt-&gt;rt_uses_gateway)</div><div class='add'>+		return rt-&gt;rt_gw4;</div><div class='add'>+</div><div class='add'>+	return ip_hdr(skb)-&gt;daddr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_nexthop_from_skb6 - retrieve IPv6 nexthop for outgoing skb</div><div class='add'>+ * @skb: the outgoing packet</div><div class='add'>+ *</div><div class='add'>+ * Return: the IPv6 of the nexthop</div><div class='add'>+ */</div><div class='add'>+static struct in6_addr ovpn_nexthop_from_skb6(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	const struct rt6_info *rt = skb_rt6_info(skb);</div><div class='add'>+</div><div class='add'>+	if (!rt || !(rt-&gt;rt6i_flags &amp; RTF_GATEWAY))</div><div class='add'>+		return ipv6_hdr(skb)-&gt;daddr;</div><div class='add'>+</div><div class='add'>+	return rt-&gt;rt6i_gateway;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_get_by_vpn_addr4 - retrieve peer by its VPN IPv4 address</div><div class='add'>+ * @ovpn: the openvpn instance to search</div><div class='add'>+ * @addr: VPN IPv4 to use as search key</div><div class='add'>+ *</div><div class='add'>+ * Refcounter is not increased for the returned peer.</div><div class='add'>+ *</div><div class='add'>+ * Return: the peer if found or NULL otherwise</div><div class='add'>+ */</div><div class='add'>+static struct ovpn_peer *ovpn_peer_get_by_vpn_addr4(struct ovpn_priv *ovpn,</div><div class='add'>+						    __be32 addr)</div><div class='add'>+{</div><div class='add'>+	struct hlist_nulls_head *nhead;</div><div class='add'>+	struct hlist_nulls_node *ntmp;</div><div class='add'>+	struct ovpn_peer *tmp;</div><div class='add'>+	unsigned int slot;</div><div class='add'>+</div><div class='add'>+begin:</div><div class='add'>+	slot = ovpn_get_hash_slot(ovpn-&gt;peers-&gt;by_vpn_addr4, &amp;addr,</div><div class='add'>+				  sizeof(addr));</div><div class='add'>+	nhead = &amp;ovpn-&gt;peers-&gt;by_vpn_addr4[slot];</div><div class='add'>+</div><div class='add'>+	hlist_nulls_for_each_entry_rcu(tmp, ntmp, nhead, hash_entry_addr4)</div><div class='add'>+		if (addr == tmp-&gt;vpn_addrs.ipv4.s_addr)</div><div class='add'>+			return tmp;</div><div class='add'>+</div><div class='add'>+	/* item may have moved during lookup - check nulls and restart</div><div class='add'>+	 * if that's the case</div><div class='add'>+	 */</div><div class='add'>+	if (get_nulls_value(ntmp) != slot)</div><div class='add'>+		goto begin;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_get_by_vpn_addr6 - retrieve peer by its VPN IPv6 address</div><div class='add'>+ * @ovpn: the openvpn instance to search</div><div class='add'>+ * @addr: VPN IPv6 to use as search key</div><div class='add'>+ *</div><div class='add'>+ * Refcounter is not increased for the returned peer.</div><div class='add'>+ *</div><div class='add'>+ * Return: the peer if found or NULL otherwise</div><div class='add'>+ */</div><div class='add'>+static struct ovpn_peer *ovpn_peer_get_by_vpn_addr6(struct ovpn_priv *ovpn,</div><div class='add'>+						    struct in6_addr *addr)</div><div class='add'>+{</div><div class='add'>+	struct hlist_nulls_head *nhead;</div><div class='add'>+	struct hlist_nulls_node *ntmp;</div><div class='add'>+	struct ovpn_peer *tmp;</div><div class='add'>+	unsigned int slot;</div><div class='add'>+</div><div class='add'>+begin:</div><div class='add'>+	slot = ovpn_get_hash_slot(ovpn-&gt;peers-&gt;by_vpn_addr6, addr,</div><div class='add'>+				  sizeof(*addr));</div><div class='add'>+	nhead = &amp;ovpn-&gt;peers-&gt;by_vpn_addr6[slot];</div><div class='add'>+</div><div class='add'>+	hlist_nulls_for_each_entry_rcu(tmp, ntmp, nhead, hash_entry_addr6)</div><div class='add'>+		if (ipv6_addr_equal(addr, &amp;tmp-&gt;vpn_addrs.ipv6))</div><div class='add'>+			return tmp;</div><div class='add'>+</div><div class='add'>+	/* item may have moved during lookup - check nulls and restart</div><div class='add'>+	 * if that's the case</div><div class='add'>+	 */</div><div class='add'>+	if (get_nulls_value(ntmp) != slot)</div><div class='add'>+		goto begin;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_transp_match - check if sockaddr and peer binding match</div><div class='add'>+ * @peer: the peer to get the binding from</div><div class='add'>+ * @ss: the sockaddr to match</div><div class='add'>+ *</div><div class='add'>+ * Return: true if sockaddr and binding match or false otherwise</div><div class='add'>+ */</div><div class='add'>+static bool ovpn_peer_transp_match(const struct ovpn_peer *peer,</div><div class='add'>+				   const struct sockaddr_storage *ss)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_bind *bind = rcu_dereference(peer-&gt;bind);</div><div class='add'>+	struct sockaddr_in6 *sa6;</div><div class='add'>+	struct sockaddr_in *sa4;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!bind))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (ss-&gt;ss_family != bind-&gt;remote.in4.sin_family)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	switch (ss-&gt;ss_family) {</div><div class='add'>+	case AF_INET:</div><div class='add'>+		sa4 = (struct sockaddr_in *)ss;</div><div class='add'>+		if (sa4-&gt;sin_addr.s_addr != bind-&gt;remote.in4.sin_addr.s_addr)</div><div class='add'>+			return false;</div><div class='add'>+		if (sa4-&gt;sin_port != bind-&gt;remote.in4.sin_port)</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case AF_INET6:</div><div class='add'>+		sa6 = (struct sockaddr_in6 *)ss;</div><div class='add'>+		if (!ipv6_addr_equal(&amp;sa6-&gt;sin6_addr,</div><div class='add'>+				     &amp;bind-&gt;remote.in6.sin6_addr))</div><div class='add'>+			return false;</div><div class='add'>+		if (sa6-&gt;sin6_port != bind-&gt;remote.in6.sin6_port)</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_get_by_transp_addr_p2p - get peer by transport address in a P2P</div><div class='add'>+ *                                    instance</div><div class='add'>+ * @ovpn: the openvpn instance to search</div><div class='add'>+ * @ss: the transport socket address</div><div class='add'>+ *</div><div class='add'>+ * Return: the peer if found or NULL otherwise</div><div class='add'>+ */</div><div class='add'>+static struct ovpn_peer *</div><div class='add'>+ovpn_peer_get_by_transp_addr_p2p(struct ovpn_priv *ovpn,</div><div class='add'>+				 struct sockaddr_storage *ss)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *tmp, *peer = NULL;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	tmp = rcu_dereference(ovpn-&gt;peer);</div><div class='add'>+	if (likely(tmp &amp;&amp; ovpn_peer_transp_match(tmp, ss) &amp;&amp;</div><div class='add'>+		   ovpn_peer_hold(tmp)))</div><div class='add'>+		peer = tmp;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return peer;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_get_by_transp_addr - retrieve peer by transport address</div><div class='add'>+ * @ovpn: the openvpn instance to search</div><div class='add'>+ * @skb: the skb to retrieve the source transport address from</div><div class='add'>+ *</div><div class='add'>+ * Return: a pointer to the peer if found or NULL otherwise</div><div class='add'>+ */</div><div class='add'>+struct ovpn_peer *ovpn_peer_get_by_transp_addr(struct ovpn_priv *ovpn,</div><div class='add'>+					       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *tmp, *peer = NULL;</div><div class='add'>+	struct sockaddr_storage ss = { 0 };</div><div class='add'>+	struct hlist_nulls_head *nhead;</div><div class='add'>+	struct hlist_nulls_node *ntmp;</div><div class='add'>+	unsigned int slot;</div><div class='add'>+	ssize_t sa_len;</div><div class='add'>+</div><div class='add'>+	sa_len = ovpn_peer_skb_to_sockaddr(skb, &amp;ss);</div><div class='add'>+	if (unlikely(sa_len &lt; 0))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (ovpn-&gt;mode == OVPN_MODE_P2P)</div><div class='add'>+		return ovpn_peer_get_by_transp_addr_p2p(ovpn, &amp;ss);</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+begin:</div><div class='add'>+	slot = ovpn_get_hash_slot(ovpn-&gt;peers-&gt;by_transp_addr, &amp;ss, sa_len);</div><div class='add'>+	nhead = &amp;ovpn-&gt;peers-&gt;by_transp_addr[slot];</div><div class='add'>+</div><div class='add'>+	hlist_nulls_for_each_entry_rcu(tmp, ntmp, nhead,</div><div class='add'>+				       hash_entry_transp_addr) {</div><div class='add'>+		if (!ovpn_peer_transp_match(tmp, &amp;ss))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!ovpn_peer_hold(tmp))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		peer = tmp;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* item may have moved during lookup - check nulls and restart</div><div class='add'>+	 * if that's the case</div><div class='add'>+	 */</div><div class='add'>+	if (!peer &amp;&amp; get_nulls_value(ntmp) != slot)</div><div class='add'>+		goto begin;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return peer;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_get_by_id_p2p - get peer by ID in a P2P instance</div><div class='add'>+ * @ovpn: the openvpn instance to search</div><div class='add'>+ * @peer_id: the ID of the peer to find</div><div class='add'>+ *</div><div class='add'>+ * Return: the peer if found or NULL otherwise</div><div class='add'>+ */</div><div class='add'>+static struct ovpn_peer *ovpn_peer_get_by_id_p2p(struct ovpn_priv *ovpn,</div><div class='add'>+						 u32 peer_id)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *tmp, *peer = NULL;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	tmp = rcu_dereference(ovpn-&gt;peer);</div><div class='add'>+	if (likely(tmp &amp;&amp; tmp-&gt;id == peer_id &amp;&amp; ovpn_peer_hold(tmp)))</div><div class='add'>+		peer = tmp;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return peer;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_get_by_id - retrieve peer by ID</div><div class='add'>+ * @ovpn: the openvpn instance to search</div><div class='add'>+ * @peer_id: the unique peer identifier to match</div><div class='add'>+ *</div><div class='add'>+ * Return: a pointer to the peer if found or NULL otherwise</div><div class='add'>+ */</div><div class='add'>+struct ovpn_peer *ovpn_peer_get_by_id(struct ovpn_priv *ovpn, u32 peer_id)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *tmp, *peer = NULL;</div><div class='add'>+	struct hlist_head *head;</div><div class='add'>+</div><div class='add'>+	if (ovpn-&gt;mode == OVPN_MODE_P2P)</div><div class='add'>+		return ovpn_peer_get_by_id_p2p(ovpn, peer_id);</div><div class='add'>+</div><div class='add'>+	head = ovpn_get_hash_head(ovpn-&gt;peers-&gt;by_id, &amp;peer_id,</div><div class='add'>+				  sizeof(peer_id));</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	hlist_for_each_entry_rcu(tmp, head, hash_entry_id) {</div><div class='add'>+		if (tmp-&gt;id != peer_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!ovpn_peer_hold(tmp))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		peer = tmp;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return peer;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_peer_remove(struct ovpn_peer *peer,</div><div class='add'>+			     enum ovpn_del_peer_reason reason,</div><div class='add'>+			     struct llist_head *release_list)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;peer-&gt;ovpn-&gt;lock);</div><div class='add'>+</div><div class='add'>+	switch (peer-&gt;ovpn-&gt;mode) {</div><div class='add'>+	case OVPN_MODE_MP:</div><div class='add'>+		/* prevent double remove */</div><div class='add'>+		if (hlist_unhashed(&amp;peer-&gt;hash_entry_id))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		hlist_del_init_rcu(&amp;peer-&gt;hash_entry_id);</div><div class='add'>+		hlist_nulls_del_init_rcu(&amp;peer-&gt;hash_entry_addr4);</div><div class='add'>+		hlist_nulls_del_init_rcu(&amp;peer-&gt;hash_entry_addr6);</div><div class='add'>+		hlist_nulls_del_init_rcu(&amp;peer-&gt;hash_entry_transp_addr);</div><div class='add'>+		break;</div><div class='add'>+	case OVPN_MODE_P2P:</div><div class='add'>+		/* prevent double remove */</div><div class='add'>+		if (peer != rcu_access_pointer(peer-&gt;ovpn-&gt;peer))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		RCU_INIT_POINTER(peer-&gt;ovpn-&gt;peer, NULL);</div><div class='add'>+		/* in P2P mode the carrier is switched off when the peer is</div><div class='add'>+		 * deleted so that third party protocols can react accordingly</div><div class='add'>+		 */</div><div class='add'>+		netif_carrier_off(peer-&gt;ovpn-&gt;dev);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	peer-&gt;delete_reason = reason;</div><div class='add'>+	ovpn_nl_peer_del_notify(peer);</div><div class='add'>+</div><div class='add'>+	/* append to provided list for later socket release and ref drop */</div><div class='add'>+	llist_add(&amp;peer-&gt;release_entry, release_list);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_get_by_dst - Lookup peer to send skb to</div><div class='add'>+ * @ovpn: the private data representing the current VPN session</div><div class='add'>+ * @skb: the skb to extract the destination address from</div><div class='add'>+ *</div><div class='add'>+ * This function takes a tunnel packet and looks up the peer to send it to</div><div class='add'>+ * after encapsulation. The skb is expected to be the in-tunnel packet, without</div><div class='add'>+ * any OpenVPN related header.</div><div class='add'>+ *</div><div class='add'>+ * Assume that the IP header is accessible in the skb data.</div><div class='add'>+ *</div><div class='add'>+ * Return: the peer if found or NULL otherwise.</div><div class='add'>+ */</div><div class='add'>+struct ovpn_peer *ovpn_peer_get_by_dst(struct ovpn_priv *ovpn,</div><div class='add'>+				       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer = NULL;</div><div class='add'>+	struct in6_addr addr6;</div><div class='add'>+	__be32 addr4;</div><div class='add'>+</div><div class='add'>+	/* in P2P mode, no matter the destination, packets are always sent to</div><div class='add'>+	 * the single peer listening on the other side</div><div class='add'>+	 */</div><div class='add'>+	if (ovpn-&gt;mode == OVPN_MODE_P2P) {</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		peer = rcu_dereference(ovpn-&gt;peer);</div><div class='add'>+		if (unlikely(peer &amp;&amp; !ovpn_peer_hold(peer)))</div><div class='add'>+			peer = NULL;</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		return peer;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	switch (skb-&gt;protocol) {</div><div class='add'>+	case htons(ETH_P_IP):</div><div class='add'>+		addr4 = ovpn_nexthop_from_skb4(skb);</div><div class='add'>+		peer = ovpn_peer_get_by_vpn_addr4(ovpn, addr4);</div><div class='add'>+		break;</div><div class='add'>+	case htons(ETH_P_IPV6):</div><div class='add'>+		addr6 = ovpn_nexthop_from_skb6(skb);</div><div class='add'>+		peer = ovpn_peer_get_by_vpn_addr6(ovpn, &amp;addr6);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(peer &amp;&amp; !ovpn_peer_hold(peer)))</div><div class='add'>+		peer = NULL;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return peer;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_nexthop_from_rt4 - look up the IPv4 nexthop for the given destination</div><div class='add'>+ * @ovpn: the private data representing the current VPN session</div><div class='add'>+ * @dest: the destination to be looked up</div><div class='add'>+ *</div><div class='add'>+ * Looks up in the IPv4 system routing table the IP of the nexthop to be used</div><div class='add'>+ * to reach the destination passed as argument. If no nexthop can be found, the</div><div class='add'>+ * destination itself is returned as it probably has to be used as nexthop.</div><div class='add'>+ *</div><div class='add'>+ * Return: the IP of the next hop if found or dest itself otherwise</div><div class='add'>+ */</div><div class='add'>+static __be32 ovpn_nexthop_from_rt4(struct ovpn_priv *ovpn, __be32 dest)</div><div class='add'>+{</div><div class='add'>+	struct rtable *rt;</div><div class='add'>+	struct flowi4 fl = {</div><div class='add'>+		.daddr = dest</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	rt = ip_route_output_flow(dev_net(ovpn-&gt;dev), &amp;fl, NULL);</div><div class='add'>+	if (IS_ERR(rt)) {</div><div class='add'>+		net_dbg_ratelimited("%s: no route to host %pI4\n",</div><div class='add'>+				    netdev_name(ovpn-&gt;dev), &amp;dest);</div><div class='add'>+		/* if we end up here this packet is probably going to be</div><div class='add'>+		 * thrown away later</div><div class='add'>+		 */</div><div class='add'>+		return dest;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!rt-&gt;rt_uses_gateway)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dest = rt-&gt;rt_gw4;</div><div class='add'>+out:</div><div class='add'>+	ip_rt_put(rt);</div><div class='add'>+	return dest;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_nexthop_from_rt6 - look up the IPv6 nexthop for the given destination</div><div class='add'>+ * @ovpn: the private data representing the current VPN session</div><div class='add'>+ * @dest: the destination to be looked up</div><div class='add'>+ *</div><div class='add'>+ * Looks up in the IPv6 system routing table the IP of the nexthop to be used</div><div class='add'>+ * to reach the destination passed as argument. If no nexthop can be found, the</div><div class='add'>+ * destination itself is returned as it probably has to be used as nexthop.</div><div class='add'>+ *</div><div class='add'>+ * Return: the IP of the next hop if found or dest itself otherwise</div><div class='add'>+ */</div><div class='add'>+static struct in6_addr ovpn_nexthop_from_rt6(struct ovpn_priv *ovpn,</div><div class='add'>+					     struct in6_addr dest)</div><div class='add'>+{</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	struct dst_entry *entry;</div><div class='add'>+	struct rt6_info *rt;</div><div class='add'>+	struct flowi6 fl = {</div><div class='add'>+		.daddr = dest,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	entry = ipv6_stub-&gt;ipv6_dst_lookup_flow(dev_net(ovpn-&gt;dev), NULL, &amp;fl,</div><div class='add'>+						NULL);</div><div class='add'>+	if (IS_ERR(entry)) {</div><div class='add'>+		net_dbg_ratelimited("%s: no route to host %pI6c\n",</div><div class='add'>+				    netdev_name(ovpn-&gt;dev), &amp;dest);</div><div class='add'>+		/* if we end up here this packet is probably going to be</div><div class='add'>+		 * thrown away later</div><div class='add'>+		 */</div><div class='add'>+		return dest;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rt = dst_rt6_info(entry);</div><div class='add'>+</div><div class='add'>+	if (!(rt-&gt;rt6i_flags &amp; RTF_GATEWAY))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dest = rt-&gt;rt6i_gateway;</div><div class='add'>+out:</div><div class='add'>+	dst_release((struct dst_entry *)rt);</div><div class='add'>+#endif</div><div class='add'>+	return dest;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_check_by_src - check that skb source is routed via peer</div><div class='add'>+ * @ovpn: the openvpn instance to search</div><div class='add'>+ * @skb: the packet to extract source address from</div><div class='add'>+ * @peer: the peer to check against the source address</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the peer is matching or false otherwise</div><div class='add'>+ */</div><div class='add'>+bool ovpn_peer_check_by_src(struct ovpn_priv *ovpn, struct sk_buff *skb,</div><div class='add'>+			    struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	bool match = false;</div><div class='add'>+	struct in6_addr addr6;</div><div class='add'>+	__be32 addr4;</div><div class='add'>+</div><div class='add'>+	if (ovpn-&gt;mode == OVPN_MODE_P2P) {</div><div class='add'>+		/* in P2P mode, no matter the destination, packets are always</div><div class='add'>+		 * sent to the single peer listening on the other side</div><div class='add'>+		 */</div><div class='add'>+		return peer == rcu_access_pointer(ovpn-&gt;peer);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This function performs a reverse path check, therefore we now</div><div class='add'>+	 * lookup the nexthop we would use if we wanted to route a packet</div><div class='add'>+	 * to the source IP. If the nexthop matches the sender we know the</div><div class='add'>+	 * latter is valid and we allow the packet to come in</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	switch (skb-&gt;protocol) {</div><div class='add'>+	case htons(ETH_P_IP):</div><div class='add'>+		addr4 = ovpn_nexthop_from_rt4(ovpn, ip_hdr(skb)-&gt;saddr);</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		match = (peer == ovpn_peer_get_by_vpn_addr4(ovpn, addr4));</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		break;</div><div class='add'>+	case htons(ETH_P_IPV6):</div><div class='add'>+		addr6 = ovpn_nexthop_from_rt6(ovpn, ipv6_hdr(skb)-&gt;saddr);</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		match = (peer == ovpn_peer_get_by_vpn_addr6(ovpn, &amp;addr6));</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return match;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_peer_hash_vpn_ip(struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	struct hlist_nulls_head *nhead;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;peer-&gt;ovpn-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* rehashing makes sense only in multipeer mode */</div><div class='add'>+	if (peer-&gt;ovpn-&gt;mode != OVPN_MODE_MP)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (peer-&gt;vpn_addrs.ipv4.s_addr != htonl(INADDR_ANY)) {</div><div class='add'>+		/* remove potential old hashing */</div><div class='add'>+		hlist_nulls_del_init_rcu(&amp;peer-&gt;hash_entry_addr4);</div><div class='add'>+</div><div class='add'>+		nhead = ovpn_get_hash_head(peer-&gt;ovpn-&gt;peers-&gt;by_vpn_addr4,</div><div class='add'>+					   &amp;peer-&gt;vpn_addrs.ipv4,</div><div class='add'>+					   sizeof(peer-&gt;vpn_addrs.ipv4));</div><div class='add'>+		hlist_nulls_add_head_rcu(&amp;peer-&gt;hash_entry_addr4, nhead);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ipv6_addr_any(&amp;peer-&gt;vpn_addrs.ipv6)) {</div><div class='add'>+		/* remove potential old hashing */</div><div class='add'>+		hlist_nulls_del_init_rcu(&amp;peer-&gt;hash_entry_addr6);</div><div class='add'>+</div><div class='add'>+		nhead = ovpn_get_hash_head(peer-&gt;ovpn-&gt;peers-&gt;by_vpn_addr6,</div><div class='add'>+					   &amp;peer-&gt;vpn_addrs.ipv6,</div><div class='add'>+					   sizeof(peer-&gt;vpn_addrs.ipv6));</div><div class='add'>+		hlist_nulls_add_head_rcu(&amp;peer-&gt;hash_entry_addr6, nhead);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_add_mp - add peer to related tables in a MP instance</div><div class='add'>+ * @ovpn: the instance to add the peer to</div><div class='add'>+ * @peer: the peer to add</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+static int ovpn_peer_add_mp(struct ovpn_priv *ovpn, struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	struct sockaddr_storage sa = { 0 };</div><div class='add'>+	struct hlist_nulls_head *nhead;</div><div class='add'>+	struct sockaddr_in6 *sa6;</div><div class='add'>+	struct sockaddr_in *sa4;</div><div class='add'>+	struct ovpn_bind *bind;</div><div class='add'>+	struct ovpn_peer *tmp;</div><div class='add'>+	size_t salen;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+	/* do not add duplicates */</div><div class='add'>+	tmp = ovpn_peer_get_by_id(ovpn, peer-&gt;id);</div><div class='add'>+	if (tmp) {</div><div class='add'>+		ovpn_peer_put(tmp);</div><div class='add'>+		ret = -EEXIST;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bind = rcu_dereference_protected(peer-&gt;bind, true);</div><div class='add'>+	/* peers connected via TCP have bind == NULL */</div><div class='add'>+	if (bind) {</div><div class='add'>+		switch (bind-&gt;remote.in4.sin_family) {</div><div class='add'>+		case AF_INET:</div><div class='add'>+			sa4 = (struct sockaddr_in *)&amp;sa;</div><div class='add'>+</div><div class='add'>+			sa4-&gt;sin_family = AF_INET;</div><div class='add'>+			sa4-&gt;sin_addr.s_addr = bind-&gt;remote.in4.sin_addr.s_addr;</div><div class='add'>+			sa4-&gt;sin_port = bind-&gt;remote.in4.sin_port;</div><div class='add'>+			salen = sizeof(*sa4);</div><div class='add'>+			break;</div><div class='add'>+		case AF_INET6:</div><div class='add'>+			sa6 = (struct sockaddr_in6 *)&amp;sa;</div><div class='add'>+</div><div class='add'>+			sa6-&gt;sin6_family = AF_INET6;</div><div class='add'>+			sa6-&gt;sin6_addr = bind-&gt;remote.in6.sin6_addr;</div><div class='add'>+			sa6-&gt;sin6_port = bind-&gt;remote.in6.sin6_port;</div><div class='add'>+			salen = sizeof(*sa6);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			ret = -EPROTONOSUPPORT;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nhead = ovpn_get_hash_head(ovpn-&gt;peers-&gt;by_transp_addr, &amp;sa,</div><div class='add'>+					   salen);</div><div class='add'>+		hlist_nulls_add_head_rcu(&amp;peer-&gt;hash_entry_transp_addr, nhead);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hlist_add_head_rcu(&amp;peer-&gt;hash_entry_id,</div><div class='add'>+			   ovpn_get_hash_head(ovpn-&gt;peers-&gt;by_id, &amp;peer-&gt;id,</div><div class='add'>+					      sizeof(peer-&gt;id)));</div><div class='add'>+</div><div class='add'>+	ovpn_peer_hash_vpn_ip(peer);</div><div class='add'>+out:</div><div class='add'>+	spin_unlock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_add_p2p - add peer to related tables in a P2P instance</div><div class='add'>+ * @ovpn: the instance to add the peer to</div><div class='add'>+ * @peer: the peer to add</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+static int ovpn_peer_add_p2p(struct ovpn_priv *ovpn, struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	LLIST_HEAD(release_list);</div><div class='add'>+	struct ovpn_peer *tmp;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+	/* in p2p mode it is possible to have a single peer only, therefore the</div><div class='add'>+	 * old one is released and substituted by the new one</div><div class='add'>+	 */</div><div class='add'>+	tmp = rcu_dereference_protected(ovpn-&gt;peer,</div><div class='add'>+					lockdep_is_held(&amp;ovpn-&gt;lock));</div><div class='add'>+	if (tmp)</div><div class='add'>+		ovpn_peer_remove(tmp, OVPN_DEL_PEER_REASON_TEARDOWN,</div><div class='add'>+				 &amp;release_list);</div><div class='add'>+</div><div class='add'>+	rcu_assign_pointer(ovpn-&gt;peer, peer);</div><div class='add'>+	/* in P2P mode the carrier is switched on when the peer is added */</div><div class='add'>+	netif_carrier_on(ovpn-&gt;dev);</div><div class='add'>+	unlock_ovpn(ovpn, &amp;release_list);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_add - add peer to the related tables</div><div class='add'>+ * @ovpn: the openvpn instance the peer belongs to</div><div class='add'>+ * @peer: the peer object to add</div><div class='add'>+ *</div><div class='add'>+ * Assume refcounter was increased by caller</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+int ovpn_peer_add(struct ovpn_priv *ovpn, struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	switch (ovpn-&gt;mode) {</div><div class='add'>+	case OVPN_MODE_MP:</div><div class='add'>+		return ovpn_peer_add_mp(ovpn, peer);</div><div class='add'>+	case OVPN_MODE_P2P:</div><div class='add'>+		return ovpn_peer_add_p2p(ovpn, peer);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_del_mp - delete peer from related tables in a MP instance</div><div class='add'>+ * @peer: the peer to delete</div><div class='add'>+ * @reason: reason why the peer was deleted (sent to userspace)</div><div class='add'>+ * @release_list: list where delete peer should be appended</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+static int ovpn_peer_del_mp(struct ovpn_peer *peer,</div><div class='add'>+			    enum ovpn_del_peer_reason reason,</div><div class='add'>+			    struct llist_head *release_list)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *tmp;</div><div class='add'>+	int ret = -ENOENT;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;peer-&gt;ovpn-&gt;lock);</div><div class='add'>+</div><div class='add'>+	tmp = ovpn_peer_get_by_id(peer-&gt;ovpn, peer-&gt;id);</div><div class='add'>+	if (tmp == peer) {</div><div class='add'>+		ovpn_peer_remove(peer, reason, release_list);</div><div class='add'>+		ret = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tmp)</div><div class='add'>+		ovpn_peer_put(tmp);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_del_p2p - delete peer from related tables in a P2P instance</div><div class='add'>+ * @peer: the peer to delete</div><div class='add'>+ * @reason: reason why the peer was deleted (sent to userspace)</div><div class='add'>+ * @release_list: list where delete peer should be appended</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+static int ovpn_peer_del_p2p(struct ovpn_peer *peer,</div><div class='add'>+			     enum ovpn_del_peer_reason reason,</div><div class='add'>+			     struct llist_head *release_list)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *tmp;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;peer-&gt;ovpn-&gt;lock);</div><div class='add'>+</div><div class='add'>+	tmp = rcu_dereference_protected(peer-&gt;ovpn-&gt;peer,</div><div class='add'>+					lockdep_is_held(&amp;peer-&gt;ovpn-&gt;lock));</div><div class='add'>+	if (tmp != peer)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	ovpn_peer_remove(peer, reason, release_list);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_del - delete peer from related tables</div><div class='add'>+ * @peer: the peer object to delete</div><div class='add'>+ * @reason: reason for deleting peer (will be sent to userspace)</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+int ovpn_peer_del(struct ovpn_peer *peer, enum ovpn_del_peer_reason reason)</div><div class='add'>+{</div><div class='add'>+	LLIST_HEAD(release_list);</div><div class='add'>+	int ret = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;peer-&gt;ovpn-&gt;lock);</div><div class='add'>+	switch (peer-&gt;ovpn-&gt;mode) {</div><div class='add'>+	case OVPN_MODE_MP:</div><div class='add'>+		ret = ovpn_peer_del_mp(peer, reason, &amp;release_list);</div><div class='add'>+		break;</div><div class='add'>+	case OVPN_MODE_P2P:</div><div class='add'>+		ret = ovpn_peer_del_p2p(peer, reason, &amp;release_list);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	unlock_ovpn(peer-&gt;ovpn, &amp;release_list);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_release_p2p - release peer upon P2P device teardown</div><div class='add'>+ * @ovpn: the instance being torn down</div><div class='add'>+ * @sk: if not NULL, release peer only if it's using this specific socket</div><div class='add'>+ * @reason: the reason for releasing the peer</div><div class='add'>+ */</div><div class='add'>+static void ovpn_peer_release_p2p(struct ovpn_priv *ovpn, struct sock *sk,</div><div class='add'>+				  enum ovpn_del_peer_reason reason)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *ovpn_sock;</div><div class='add'>+	LLIST_HEAD(release_list);</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+	peer = rcu_dereference_protected(ovpn-&gt;peer,</div><div class='add'>+					 lockdep_is_held(&amp;ovpn-&gt;lock));</div><div class='add'>+	if (!peer) {</div><div class='add'>+		spin_unlock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sk) {</div><div class='add'>+		ovpn_sock = rcu_access_pointer(peer-&gt;sock);</div><div class='add'>+		if (!ovpn_sock || ovpn_sock-&gt;sk != sk) {</div><div class='add'>+			spin_unlock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+			ovpn_peer_put(peer);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn_peer_remove(peer, reason, &amp;release_list);</div><div class='add'>+	unlock_ovpn(ovpn, &amp;release_list);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_peers_release_mp(struct ovpn_priv *ovpn, struct sock *sk,</div><div class='add'>+				  enum ovpn_del_peer_reason reason)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *ovpn_sock;</div><div class='add'>+	LLIST_HEAD(release_list);</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	struct hlist_node *tmp;</div><div class='add'>+	int bkt;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+	hash_for_each_safe(ovpn-&gt;peers-&gt;by_id, bkt, tmp, peer, hash_entry_id) {</div><div class='add'>+		bool remove = true;</div><div class='add'>+</div><div class='add'>+		/* if a socket was passed as argument, skip all peers except</div><div class='add'>+		 * those using it</div><div class='add'>+		 */</div><div class='add'>+		if (sk) {</div><div class='add'>+			rcu_read_lock();</div><div class='add'>+			ovpn_sock = rcu_dereference(peer-&gt;sock);</div><div class='add'>+			remove = ovpn_sock &amp;&amp; ovpn_sock-&gt;sk == sk;</div><div class='add'>+			rcu_read_unlock();</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (remove)</div><div class='add'>+			ovpn_peer_remove(peer, reason, &amp;release_list);</div><div class='add'>+	}</div><div class='add'>+	unlock_ovpn(ovpn, &amp;release_list);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peers_free - free all peers in the instance</div><div class='add'>+ * @ovpn: the instance whose peers should be released</div><div class='add'>+ * @sk: if not NULL, only peers using this socket are removed and the socket</div><div class='add'>+ *      is released immediately</div><div class='add'>+ * @reason: the reason for releasing all peers</div><div class='add'>+ */</div><div class='add'>+void ovpn_peers_free(struct ovpn_priv *ovpn, struct sock *sk,</div><div class='add'>+		     enum ovpn_del_peer_reason reason)</div><div class='add'>+{</div><div class='add'>+	switch (ovpn-&gt;mode) {</div><div class='add'>+	case OVPN_MODE_P2P:</div><div class='add'>+		ovpn_peer_release_p2p(ovpn, sk, reason);</div><div class='add'>+		break;</div><div class='add'>+	case OVPN_MODE_MP:</div><div class='add'>+		ovpn_peers_release_mp(ovpn, sk, reason);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static time64_t ovpn_peer_keepalive_work_single(struct ovpn_peer *peer,</div><div class='add'>+						time64_t now,</div><div class='add'>+						struct llist_head *release_list)</div><div class='add'>+{</div><div class='add'>+	time64_t last_recv, last_sent, next_run1, next_run2;</div><div class='add'>+	unsigned long timeout, interval;</div><div class='add'>+	bool expired;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;peer-&gt;lock);</div><div class='add'>+	/* we expect both timers to be configured at the same time,</div><div class='add'>+	 * therefore bail out if either is not set</div><div class='add'>+	 */</div><div class='add'>+	if (!peer-&gt;keepalive_timeout || !peer-&gt;keepalive_interval) {</div><div class='add'>+		spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check for peer timeout */</div><div class='add'>+	expired = false;</div><div class='add'>+	timeout = peer-&gt;keepalive_timeout;</div><div class='add'>+	last_recv = READ_ONCE(peer-&gt;last_recv);</div><div class='add'>+	if (now &lt; last_recv + timeout) {</div><div class='add'>+		peer-&gt;keepalive_recv_exp = last_recv + timeout;</div><div class='add'>+		next_run1 = peer-&gt;keepalive_recv_exp;</div><div class='add'>+	} else if (peer-&gt;keepalive_recv_exp &gt; now) {</div><div class='add'>+		next_run1 = peer-&gt;keepalive_recv_exp;</div><div class='add'>+	} else {</div><div class='add'>+		expired = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (expired) {</div><div class='add'>+		/* peer is dead -&gt; kill it and move on */</div><div class='add'>+		spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+		netdev_dbg(peer-&gt;ovpn-&gt;dev, "peer %u expired\n",</div><div class='add'>+			   peer-&gt;id);</div><div class='add'>+		ovpn_peer_remove(peer, OVPN_DEL_PEER_REASON_EXPIRED,</div><div class='add'>+				 release_list);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check for peer keepalive */</div><div class='add'>+	expired = false;</div><div class='add'>+	interval = peer-&gt;keepalive_interval;</div><div class='add'>+	last_sent = READ_ONCE(peer-&gt;last_sent);</div><div class='add'>+	if (now &lt; last_sent + interval) {</div><div class='add'>+		peer-&gt;keepalive_xmit_exp = last_sent + interval;</div><div class='add'>+		next_run2 = peer-&gt;keepalive_xmit_exp;</div><div class='add'>+	} else if (peer-&gt;keepalive_xmit_exp &gt; now) {</div><div class='add'>+		next_run2 = peer-&gt;keepalive_xmit_exp;</div><div class='add'>+	} else {</div><div class='add'>+		expired = true;</div><div class='add'>+		next_run2 = now + interval;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (expired) {</div><div class='add'>+		/* a keepalive packet is required */</div><div class='add'>+		netdev_dbg(peer-&gt;ovpn-&gt;dev,</div><div class='add'>+			   "sending keepalive to peer %u\n",</div><div class='add'>+			   peer-&gt;id);</div><div class='add'>+		if (schedule_work(&amp;peer-&gt;keepalive_work))</div><div class='add'>+			ovpn_peer_hold(peer);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (next_run1 &lt; next_run2)</div><div class='add'>+		return next_run1;</div><div class='add'>+</div><div class='add'>+	return next_run2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static time64_t ovpn_peer_keepalive_work_mp(struct ovpn_priv *ovpn,</div><div class='add'>+					    time64_t now,</div><div class='add'>+					    struct llist_head *release_list)</div><div class='add'>+{</div><div class='add'>+	time64_t tmp_next_run, next_run = 0;</div><div class='add'>+	struct hlist_node *tmp;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	int bkt;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ovpn-&gt;lock);</div><div class='add'>+</div><div class='add'>+	hash_for_each_safe(ovpn-&gt;peers-&gt;by_id, bkt, tmp, peer, hash_entry_id) {</div><div class='add'>+		tmp_next_run = ovpn_peer_keepalive_work_single(peer, now,</div><div class='add'>+							       release_list);</div><div class='add'>+		if (!tmp_next_run)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* the next worker run will be scheduled based on the shortest</div><div class='add'>+		 * required interval across all peers</div><div class='add'>+		 */</div><div class='add'>+		if (!next_run || tmp_next_run &lt; next_run)</div><div class='add'>+			next_run = tmp_next_run;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return next_run;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static time64_t ovpn_peer_keepalive_work_p2p(struct ovpn_priv *ovpn,</div><div class='add'>+					     time64_t now,</div><div class='add'>+					     struct llist_head *release_list)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	time64_t next_run = 0;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ovpn-&gt;lock);</div><div class='add'>+</div><div class='add'>+	peer = rcu_dereference_protected(ovpn-&gt;peer,</div><div class='add'>+					 lockdep_is_held(&amp;ovpn-&gt;lock));</div><div class='add'>+	if (peer)</div><div class='add'>+		next_run = ovpn_peer_keepalive_work_single(peer, now,</div><div class='add'>+							   release_list);</div><div class='add'>+</div><div class='add'>+	return next_run;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_keepalive_work - run keepalive logic on each known peer</div><div class='add'>+ * @work: pointer to the work member of the related ovpn object</div><div class='add'>+ *</div><div class='add'>+ * Each peer has two timers (if configured):</div><div class='add'>+ * 1. peer timeout: when no data is received for a certain interval,</div><div class='add'>+ *    the peer is considered dead and it gets killed.</div><div class='add'>+ * 2. peer keepalive: when no data is sent to a certain peer for a</div><div class='add'>+ *    certain interval, a special 'keepalive' packet is explicitly sent.</div><div class='add'>+ *</div><div class='add'>+ * This function iterates across the whole peer collection while</div><div class='add'>+ * checking the timers described above.</div><div class='add'>+ */</div><div class='add'>+void ovpn_peer_keepalive_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_priv *ovpn = container_of(work, struct ovpn_priv,</div><div class='add'>+					      keepalive_work.work);</div><div class='add'>+	time64_t next_run = 0, now = ktime_get_real_seconds();</div><div class='add'>+	LLIST_HEAD(release_list);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ovpn-&gt;lock);</div><div class='add'>+	switch (ovpn-&gt;mode) {</div><div class='add'>+	case OVPN_MODE_MP:</div><div class='add'>+		next_run = ovpn_peer_keepalive_work_mp(ovpn, now,</div><div class='add'>+						       &amp;release_list);</div><div class='add'>+		break;</div><div class='add'>+	case OVPN_MODE_P2P:</div><div class='add'>+		next_run = ovpn_peer_keepalive_work_p2p(ovpn, now,</div><div class='add'>+							&amp;release_list);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* prevent rearming if the interface is being destroyed */</div><div class='add'>+	if (next_run &gt; 0) {</div><div class='add'>+		netdev_dbg(ovpn-&gt;dev,</div><div class='add'>+			   "scheduling keepalive work: now=%llu next_run=%llu delta=%llu\n",</div><div class='add'>+			   next_run, now, next_run - now);</div><div class='add'>+		schedule_delayed_work(&amp;ovpn-&gt;keepalive_work,</div><div class='add'>+				      (next_run - now) * HZ);</div><div class='add'>+	}</div><div class='add'>+	unlock_ovpn(ovpn, &amp;release_list);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/peer.h b/drivers/net/ovpn/peer.h<br/>new file mode 100644<br/>index 000000000000..a1423f2b09e0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/peer.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/peer.h</a></div><div class='hunk'>@@ -0,0 +1,163 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_OVPNPEER_H_</div><div class='add'>+#define _NET_OVPN_OVPNPEER_H_</div><div class='add'>+</div><div class='add'>+#include &lt;net/dst_cache.h&gt;</div><div class='add'>+#include &lt;net/strparser.h&gt;</div><div class='add'>+</div><div class='add'>+#include "crypto.h"</div><div class='add'>+#include "socket.h"</div><div class='add'>+#include "stats.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ovpn_peer - the main remote peer object</div><div class='add'>+ * @ovpn: main openvpn instance this peer belongs to</div><div class='add'>+ * @dev_tracker: reference tracker for associated dev</div><div class='add'>+ * @id: unique identifier</div><div class='add'>+ * @vpn_addrs: IP addresses assigned over the tunnel</div><div class='add'>+ * @vpn_addrs.ipv4: IPv4 assigned to peer on the tunnel</div><div class='add'>+ * @vpn_addrs.ipv6: IPv6 assigned to peer on the tunnel</div><div class='add'>+ * @hash_entry_id: entry in the peer ID hashtable</div><div class='add'>+ * @hash_entry_addr4: entry in the peer IPv4 hashtable</div><div class='add'>+ * @hash_entry_addr6: entry in the peer IPv6 hashtable</div><div class='add'>+ * @hash_entry_transp_addr: entry in the peer transport address hashtable</div><div class='add'>+ * @sock: the socket being used to talk to this peer</div><div class='add'>+ * @tcp: keeps track of TCP specific state</div><div class='add'>+ * @tcp.strp: stream parser context (TCP only)</div><div class='add'>+ * @tcp.user_queue: received packets that have to go to userspace (TCP only)</div><div class='add'>+ * @tcp.out_queue: packets on hold while socket is taken by user (TCP only)</div><div class='add'>+ * @tcp.tx_in_progress: true if TX is already ongoing (TCP only)</div><div class='add'>+ * @tcp.out_msg.skb: packet scheduled for sending (TCP only)</div><div class='add'>+ * @tcp.out_msg.offset: offset where next send should start (TCP only)</div><div class='add'>+ * @tcp.out_msg.len: remaining data to send within packet (TCP only)</div><div class='add'>+ * @tcp.sk_cb.sk_data_ready: pointer to original cb (TCP only)</div><div class='add'>+ * @tcp.sk_cb.sk_write_space: pointer to original cb (TCP only)</div><div class='add'>+ * @tcp.sk_cb.prot: pointer to original prot object (TCP only)</div><div class='add'>+ * @tcp.sk_cb.ops: pointer to the original prot_ops object (TCP only)</div><div class='add'>+ * @crypto: the crypto configuration (ciphers, keys, etc..)</div><div class='add'>+ * @dst_cache: cache for dst_entry used to send to peer</div><div class='add'>+ * @bind: remote peer binding</div><div class='add'>+ * @keepalive_interval: seconds after which a new keepalive should be sent</div><div class='add'>+ * @keepalive_xmit_exp: future timestamp when next keepalive should be sent</div><div class='add'>+ * @last_sent: timestamp of the last successfully sent packet</div><div class='add'>+ * @keepalive_timeout: seconds after which an inactive peer is considered dead</div><div class='add'>+ * @keepalive_recv_exp: future timestamp when the peer should expire</div><div class='add'>+ * @last_recv: timestamp of the last authenticated received packet</div><div class='add'>+ * @vpn_stats: per-peer in-VPN TX/RX stats</div><div class='add'>+ * @link_stats: per-peer link/transport TX/RX stats</div><div class='add'>+ * @delete_reason: why peer was deleted (i.e. timeout, transport error, ..)</div><div class='add'>+ * @lock: protects binding to peer (bind) and keepalive* fields</div><div class='add'>+ * @refcount: reference counter</div><div class='add'>+ * @rcu: used to free peer in an RCU safe way</div><div class='add'>+ * @release_entry: entry for the socket release list</div><div class='add'>+ * @keepalive_work: used to schedule keepalive sending</div><div class='add'>+ */</div><div class='add'>+struct ovpn_peer {</div><div class='add'>+	struct ovpn_priv *ovpn;</div><div class='add'>+	netdevice_tracker dev_tracker;</div><div class='add'>+	u32 id;</div><div class='add'>+	struct {</div><div class='add'>+		struct in_addr ipv4;</div><div class='add'>+		struct in6_addr ipv6;</div><div class='add'>+	} vpn_addrs;</div><div class='add'>+	struct hlist_node hash_entry_id;</div><div class='add'>+	struct hlist_nulls_node hash_entry_addr4;</div><div class='add'>+	struct hlist_nulls_node hash_entry_addr6;</div><div class='add'>+	struct hlist_nulls_node hash_entry_transp_addr;</div><div class='add'>+	struct ovpn_socket __rcu *sock;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		struct strparser strp;</div><div class='add'>+		struct sk_buff_head user_queue;</div><div class='add'>+		struct sk_buff_head out_queue;</div><div class='add'>+		bool tx_in_progress;</div><div class='add'>+</div><div class='add'>+		struct {</div><div class='add'>+			struct sk_buff *skb;</div><div class='add'>+			int offset;</div><div class='add'>+			int len;</div><div class='add'>+		} out_msg;</div><div class='add'>+</div><div class='add'>+		struct {</div><div class='add'>+			void (*sk_data_ready)(struct sock *sk);</div><div class='add'>+			void (*sk_write_space)(struct sock *sk);</div><div class='add'>+			struct proto *prot;</div><div class='add'>+			const struct proto_ops *ops;</div><div class='add'>+		} sk_cb;</div><div class='add'>+</div><div class='add'>+		struct work_struct defer_del_work;</div><div class='add'>+	} tcp;</div><div class='add'>+	struct ovpn_crypto_state crypto;</div><div class='add'>+	struct dst_cache dst_cache;</div><div class='add'>+	struct ovpn_bind __rcu *bind;</div><div class='add'>+	unsigned long keepalive_interval;</div><div class='add'>+	unsigned long keepalive_xmit_exp;</div><div class='add'>+	time64_t last_sent;</div><div class='add'>+	unsigned long keepalive_timeout;</div><div class='add'>+	unsigned long keepalive_recv_exp;</div><div class='add'>+	time64_t last_recv;</div><div class='add'>+	struct ovpn_peer_stats vpn_stats;</div><div class='add'>+	struct ovpn_peer_stats link_stats;</div><div class='add'>+	enum ovpn_del_peer_reason delete_reason;</div><div class='add'>+	spinlock_t lock; /* protects bind  and keepalive* */</div><div class='add'>+	struct kref refcount;</div><div class='add'>+	struct rcu_head rcu;</div><div class='add'>+	struct llist_node release_entry;</div><div class='add'>+	struct work_struct keepalive_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_hold - increase reference counter</div><div class='add'>+ * @peer: the peer whose counter should be increased</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the counter was increased or false if it was zero already</div><div class='add'>+ */</div><div class='add'>+static inline bool ovpn_peer_hold(struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	return kref_get_unless_zero(&amp;peer-&gt;refcount);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_peer_release(struct ovpn_peer *peer);</div><div class='add'>+void ovpn_peer_release_kref(struct kref *kref);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_put - decrease reference counter</div><div class='add'>+ * @peer: the peer whose counter should be decreased</div><div class='add'>+ */</div><div class='add'>+static inline void ovpn_peer_put(struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	kref_put(&amp;peer-&gt;refcount, ovpn_peer_release_kref);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ovpn_peer *ovpn_peer_new(struct ovpn_priv *ovpn, u32 id);</div><div class='add'>+int ovpn_peer_add(struct ovpn_priv *ovpn, struct ovpn_peer *peer);</div><div class='add'>+int ovpn_peer_del(struct ovpn_peer *peer, enum ovpn_del_peer_reason reason);</div><div class='add'>+void ovpn_peers_free(struct ovpn_priv *ovpn, struct sock *sock,</div><div class='add'>+		     enum ovpn_del_peer_reason reason);</div><div class='add'>+</div><div class='add'>+struct ovpn_peer *ovpn_peer_get_by_transp_addr(struct ovpn_priv *ovpn,</div><div class='add'>+					       struct sk_buff *skb);</div><div class='add'>+struct ovpn_peer *ovpn_peer_get_by_id(struct ovpn_priv *ovpn, u32 peer_id);</div><div class='add'>+struct ovpn_peer *ovpn_peer_get_by_dst(struct ovpn_priv *ovpn,</div><div class='add'>+				       struct sk_buff *skb);</div><div class='add'>+void ovpn_peer_hash_vpn_ip(struct ovpn_peer *peer);</div><div class='add'>+bool ovpn_peer_check_by_src(struct ovpn_priv *ovpn, struct sk_buff *skb,</div><div class='add'>+			    struct ovpn_peer *peer);</div><div class='add'>+</div><div class='add'>+void ovpn_peer_keepalive_set(struct ovpn_peer *peer, u32 interval, u32 timeout);</div><div class='add'>+void ovpn_peer_keepalive_work(struct work_struct *work);</div><div class='add'>+</div><div class='add'>+void ovpn_peer_endpoints_update(struct ovpn_peer *peer, struct sk_buff *skb);</div><div class='add'>+int ovpn_peer_reset_sockaddr(struct ovpn_peer *peer,</div><div class='add'>+			     const struct sockaddr_storage *ss,</div><div class='add'>+			     const void *local_ip);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_OVPNPEER_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/pktid.c b/drivers/net/ovpn/pktid.c<br/>new file mode 100644<br/>index 000000000000..2f29049897e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/pktid.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/pktid.c</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ *		James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/atomic.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/net.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "main.h"</div><div class='add'>+#include "pktid.h"</div><div class='add'>+</div><div class='add'>+void ovpn_pktid_xmit_init(struct ovpn_pktid_xmit *pid)</div><div class='add'>+{</div><div class='add'>+	atomic_set(&amp;pid-&gt;seq_num, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_pktid_recv_init(struct ovpn_pktid_recv *pr)</div><div class='add'>+{</div><div class='add'>+	memset(pr, 0, sizeof(*pr));</div><div class='add'>+	spin_lock_init(&amp;pr-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Packet replay detection.</div><div class='add'>+ * Allows ID backtrack of up to REPLAY_WINDOW_SIZE - 1.</div><div class='add'>+ */</div><div class='add'>+int ovpn_pktid_recv(struct ovpn_pktid_recv *pr, u32 pkt_id, u32 pkt_time)</div><div class='add'>+{</div><div class='add'>+	const unsigned long now = jiffies;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* ID must not be zero */</div><div class='add'>+	if (unlikely(pkt_id == 0))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;pr-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* expire backtracks at or below pr-&gt;id after PKTID_RECV_EXPIRE time */</div><div class='add'>+	if (unlikely(time_after_eq(now, pr-&gt;expire)))</div><div class='add'>+		pr-&gt;id_floor = pr-&gt;id;</div><div class='add'>+</div><div class='add'>+	/* time changed? */</div><div class='add'>+	if (unlikely(pkt_time != pr-&gt;time)) {</div><div class='add'>+		if (pkt_time &gt; pr-&gt;time) {</div><div class='add'>+			/* time moved forward, accept */</div><div class='add'>+			pr-&gt;base = 0;</div><div class='add'>+			pr-&gt;extent = 0;</div><div class='add'>+			pr-&gt;id = 0;</div><div class='add'>+			pr-&gt;time = pkt_time;</div><div class='add'>+			pr-&gt;id_floor = 0;</div><div class='add'>+		} else {</div><div class='add'>+			/* time moved backward, reject */</div><div class='add'>+			ret = -ETIME;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (likely(pkt_id == pr-&gt;id + 1)) {</div><div class='add'>+		/* well-formed ID sequence (incremented by 1) */</div><div class='add'>+		pr-&gt;base = REPLAY_INDEX(pr-&gt;base, -1);</div><div class='add'>+		pr-&gt;history[pr-&gt;base / 8] |= (1 &lt;&lt; (pr-&gt;base % 8));</div><div class='add'>+		if (pr-&gt;extent &lt; REPLAY_WINDOW_SIZE)</div><div class='add'>+			++pr-&gt;extent;</div><div class='add'>+		pr-&gt;id = pkt_id;</div><div class='add'>+	} else if (pkt_id &gt; pr-&gt;id) {</div><div class='add'>+		/* ID jumped forward by more than one */</div><div class='add'>+		const unsigned int delta = pkt_id - pr-&gt;id;</div><div class='add'>+</div><div class='add'>+		if (delta &lt; REPLAY_WINDOW_SIZE) {</div><div class='add'>+			unsigned int i;</div><div class='add'>+</div><div class='add'>+			pr-&gt;base = REPLAY_INDEX(pr-&gt;base, -delta);</div><div class='add'>+			pr-&gt;history[pr-&gt;base / 8] |= (1 &lt;&lt; (pr-&gt;base % 8));</div><div class='add'>+			pr-&gt;extent += delta;</div><div class='add'>+			if (pr-&gt;extent &gt; REPLAY_WINDOW_SIZE)</div><div class='add'>+				pr-&gt;extent = REPLAY_WINDOW_SIZE;</div><div class='add'>+			for (i = 1; i &lt; delta; ++i) {</div><div class='add'>+				unsigned int newb = REPLAY_INDEX(pr-&gt;base, i);</div><div class='add'>+</div><div class='add'>+				pr-&gt;history[newb / 8] &amp;= ~BIT(newb % 8);</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			pr-&gt;base = 0;</div><div class='add'>+			pr-&gt;extent = REPLAY_WINDOW_SIZE;</div><div class='add'>+			memset(pr-&gt;history, 0, sizeof(pr-&gt;history));</div><div class='add'>+			pr-&gt;history[0] = 1;</div><div class='add'>+		}</div><div class='add'>+		pr-&gt;id = pkt_id;</div><div class='add'>+	} else {</div><div class='add'>+		/* ID backtrack */</div><div class='add'>+		const unsigned int delta = pr-&gt;id - pkt_id;</div><div class='add'>+</div><div class='add'>+		if (delta &gt; pr-&gt;max_backtrack)</div><div class='add'>+			pr-&gt;max_backtrack = delta;</div><div class='add'>+		if (delta &lt; pr-&gt;extent) {</div><div class='add'>+			if (pkt_id &gt; pr-&gt;id_floor) {</div><div class='add'>+				const unsigned int ri = REPLAY_INDEX(pr-&gt;base,</div><div class='add'>+								     delta);</div><div class='add'>+				u8 *p = &amp;pr-&gt;history[ri / 8];</div><div class='add'>+				const u8 mask = (1 &lt;&lt; (ri % 8));</div><div class='add'>+</div><div class='add'>+				if (*p &amp; mask) {</div><div class='add'>+					ret = -EINVAL;</div><div class='add'>+					goto out;</div><div class='add'>+				}</div><div class='add'>+				*p |= mask;</div><div class='add'>+			} else {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pr-&gt;expire = now + PKTID_RECV_EXPIRE;</div><div class='add'>+	ret = 0;</div><div class='add'>+out:</div><div class='add'>+	spin_unlock_bh(&amp;pr-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/pktid.h b/drivers/net/ovpn/pktid.h<br/>new file mode 100644<br/>index 000000000000..0262d026d15e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/pktid.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/pktid.h</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ *		James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_OVPNPKTID_H_</div><div class='add'>+#define _NET_OVPN_OVPNPKTID_H_</div><div class='add'>+</div><div class='add'>+#include "proto.h"</div><div class='add'>+</div><div class='add'>+/* If no packets received for this length of time, set a backtrack floor</div><div class='add'>+ * at highest received packet ID thus far.</div><div class='add'>+ */</div><div class='add'>+#define PKTID_RECV_EXPIRE (30 * HZ)</div><div class='add'>+</div><div class='add'>+/* Packet-ID state for transmitter */</div><div class='add'>+struct ovpn_pktid_xmit {</div><div class='add'>+	atomic_t seq_num;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* replay window sizing in bytes = 2^REPLAY_WINDOW_ORDER */</div><div class='add'>+#define REPLAY_WINDOW_ORDER 8</div><div class='add'>+</div><div class='add'>+#define REPLAY_WINDOW_BYTES BIT(REPLAY_WINDOW_ORDER)</div><div class='add'>+#define REPLAY_WINDOW_SIZE  (REPLAY_WINDOW_BYTES * 8)</div><div class='add'>+#define REPLAY_INDEX(base, i) (((base) + (i)) &amp; (REPLAY_WINDOW_SIZE - 1))</div><div class='add'>+</div><div class='add'>+/* Packet-ID state for receiver.</div><div class='add'>+ * Other than lock member, can be zeroed to initialize.</div><div class='add'>+ */</div><div class='add'>+struct ovpn_pktid_recv {</div><div class='add'>+	/* "sliding window" bitmask of recent packet IDs received */</div><div class='add'>+	u8 history[REPLAY_WINDOW_BYTES];</div><div class='add'>+	/* bit position of deque base in history */</div><div class='add'>+	unsigned int base;</div><div class='add'>+	/* extent (in bits) of deque in history */</div><div class='add'>+	unsigned int extent;</div><div class='add'>+	/* expiration of history in jiffies */</div><div class='add'>+	unsigned long expire;</div><div class='add'>+	/* highest sequence number received */</div><div class='add'>+	u32 id;</div><div class='add'>+	/* highest time stamp received */</div><div class='add'>+	u32 time;</div><div class='add'>+	/* we will only accept backtrack IDs &gt; id_floor */</div><div class='add'>+	u32 id_floor;</div><div class='add'>+	unsigned int max_backtrack;</div><div class='add'>+	/* protects entire pktd ID state */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Get the next packet ID for xmit */</div><div class='add'>+static inline int ovpn_pktid_xmit_next(struct ovpn_pktid_xmit *pid, u32 *pktid)</div><div class='add'>+{</div><div class='add'>+	const u32 seq_num = atomic_fetch_add_unless(&amp;pid-&gt;seq_num, 1, 0);</div><div class='add'>+	/* when the 32bit space is over, we return an error because the packet</div><div class='add'>+	 * ID is used to create the cipher IV and we do not want to reuse the</div><div class='add'>+	 * same value more than once</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!seq_num))</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	*pktid = seq_num;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Write 12-byte AEAD IV to dest */</div><div class='add'>+static inline void ovpn_pktid_aead_write(const u32 pktid,</div><div class='add'>+					 const u8 nt[],</div><div class='add'>+					 unsigned char *dest)</div><div class='add'>+{</div><div class='add'>+	*(__force __be32 *)(dest) = htonl(pktid);</div><div class='add'>+	BUILD_BUG_ON(4 + OVPN_NONCE_TAIL_SIZE != OVPN_NONCE_SIZE);</div><div class='add'>+	memcpy(dest + 4, nt, OVPN_NONCE_TAIL_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_pktid_xmit_init(struct ovpn_pktid_xmit *pid);</div><div class='add'>+void ovpn_pktid_recv_init(struct ovpn_pktid_recv *pr);</div><div class='add'>+</div><div class='add'>+int ovpn_pktid_recv(struct ovpn_pktid_recv *pr, u32 pkt_id, u32 pkt_time);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_OVPNPKTID_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/proto.h b/drivers/net/ovpn/proto.h<br/>new file mode 100644<br/>index 000000000000..b7d285b4d9c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/proto.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/proto.h</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ *		James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_PROTO_H_</div><div class='add'>+#define _NET_OVPN_PROTO_H_</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+</div><div class='add'>+/* When the OpenVPN protocol is ran in AEAD mode, use</div><div class='add'>+ * the OpenVPN packet ID as the AEAD nonce:</div><div class='add'>+ *</div><div class='add'>+ *    00000005 521c3b01 4308c041</div><div class='add'>+ *    [seq # ] [  nonce_tail   ]</div><div class='add'>+ *    [     12-byte full IV    ] -&gt; OVPN_NONCE_SIZE</div><div class='add'>+ *    [4-bytes                   -&gt; OVPN_NONCE_WIRE_SIZE</div><div class='add'>+ *    on wire]</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* nonce size (96bits) as required by AEAD ciphers */</div><div class='add'>+#define OVPN_NONCE_SIZE			12</div><div class='add'>+/* last 8 bytes of AEAD nonce: provided by userspace and usually derived</div><div class='add'>+ * from key material generated during TLS handshake</div><div class='add'>+ */</div><div class='add'>+#define OVPN_NONCE_TAIL_SIZE		8</div><div class='add'>+</div><div class='add'>+/* OpenVPN nonce size reduced by 8-byte nonce tail -- this is the</div><div class='add'>+ * size of the AEAD Associated Data (AD) sent over the wire</div><div class='add'>+ * and is normally the head of the IV</div><div class='add'>+ */</div><div class='add'>+#define OVPN_NONCE_WIRE_SIZE (OVPN_NONCE_SIZE - OVPN_NONCE_TAIL_SIZE)</div><div class='add'>+</div><div class='add'>+#define OVPN_OPCODE_SIZE		4 /* DATA_V2 opcode size */</div><div class='add'>+#define OVPN_OPCODE_KEYID_MASK		0x07000000</div><div class='add'>+#define OVPN_OPCODE_PKTTYPE_MASK	0xF8000000</div><div class='add'>+#define OVPN_OPCODE_PEERID_MASK		0x00FFFFFF</div><div class='add'>+</div><div class='add'>+/* packet opcodes of interest to us */</div><div class='add'>+#define OVPN_DATA_V1			6 /* data channel v1 packet */</div><div class='add'>+#define OVPN_DATA_V2			9 /* data channel v2 packet */</div><div class='add'>+</div><div class='add'>+#define OVPN_PEER_ID_UNDEF		0x00FFFFFF</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_opcode_from_skb - extract OP code from skb at specified offset</div><div class='add'>+ * @skb: the packet to extract the OP code from</div><div class='add'>+ * @offset: the offset in the data buffer where the OP code is located</div><div class='add'>+ *</div><div class='add'>+ * Note: this function assumes that the skb head was pulled enough</div><div class='add'>+ * to access the first 4 bytes.</div><div class='add'>+ *</div><div class='add'>+ * Return: the OP code</div><div class='add'>+ */</div><div class='add'>+static inline u8 ovpn_opcode_from_skb(const struct sk_buff *skb, u16 offset)</div><div class='add'>+{</div><div class='add'>+	u32 opcode = be32_to_cpu(*(__be32 *)(skb-&gt;data + offset));</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(OVPN_OPCODE_PKTTYPE_MASK, opcode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_peer_id_from_skb - extract peer ID from skb at specified offset</div><div class='add'>+ * @skb: the packet to extract the OP code from</div><div class='add'>+ * @offset: the offset in the data buffer where the OP code is located</div><div class='add'>+ *</div><div class='add'>+ * Note: this function assumes that the skb head was pulled enough</div><div class='add'>+ * to access the first 4 bytes.</div><div class='add'>+ *</div><div class='add'>+ * Return: the peer ID</div><div class='add'>+ */</div><div class='add'>+static inline u32 ovpn_peer_id_from_skb(const struct sk_buff *skb, u16 offset)</div><div class='add'>+{</div><div class='add'>+	u32 opcode = be32_to_cpu(*(__be32 *)(skb-&gt;data + offset));</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(OVPN_OPCODE_PEERID_MASK, opcode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_key_id_from_skb - extract key ID from the skb head</div><div class='add'>+ * @skb: the packet to extract the key ID code from</div><div class='add'>+ *</div><div class='add'>+ * Note: this function assumes that the skb head was pulled enough</div><div class='add'>+ * to access the first 4 bytes.</div><div class='add'>+ *</div><div class='add'>+ * Return: the key ID</div><div class='add'>+ */</div><div class='add'>+static inline u8 ovpn_key_id_from_skb(const struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	u32 opcode = be32_to_cpu(*(__be32 *)skb-&gt;data);</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(OVPN_OPCODE_KEYID_MASK, opcode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_opcode_compose - combine OP code, key ID and peer ID to wire format</div><div class='add'>+ * @opcode: the OP code</div><div class='add'>+ * @key_id: the key ID</div><div class='add'>+ * @peer_id: the peer ID</div><div class='add'>+ *</div><div class='add'>+ * Return: a 4 bytes integer obtained combining all input values following the</div><div class='add'>+ * OpenVPN wire format. This integer can then be written to the packet header.</div><div class='add'>+ */</div><div class='add'>+static inline u32 ovpn_opcode_compose(u8 opcode, u8 key_id, u32 peer_id)</div><div class='add'>+{</div><div class='add'>+	return FIELD_PREP(OVPN_OPCODE_PKTTYPE_MASK, opcode) |</div><div class='add'>+	       FIELD_PREP(OVPN_OPCODE_KEYID_MASK, key_id) |</div><div class='add'>+	       FIELD_PREP(OVPN_OPCODE_PEERID_MASK, peer_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_OVPNPROTO_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/skb.h b/drivers/net/ovpn/skb.h<br/>new file mode 100644<br/>index 000000000000..64430880f1da<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/skb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/skb.h</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ *		James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_SKB_H_</div><div class='add'>+#define _NET_OVPN_SKB_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/in.h&gt;</div><div class='add'>+#include &lt;linux/in6.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/ipv6.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/socket.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct ovpn_cb {</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	struct ovpn_crypto_key_slot *ks;</div><div class='add'>+	struct aead_request *req;</div><div class='add'>+	struct scatterlist *sg;</div><div class='add'>+	u8 *iv;</div><div class='add'>+	unsigned int payload_offset;</div><div class='add'>+	bool nosignal;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct ovpn_cb *ovpn_skb_cb(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	BUILD_BUG_ON(sizeof(struct ovpn_cb) &gt; sizeof(skb-&gt;cb));</div><div class='add'>+	return (struct ovpn_cb *)skb-&gt;cb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Return IP protocol version from skb header.</div><div class='add'>+ * Return 0 if protocol is not IPv4/IPv6 or cannot be read.</div><div class='add'>+ */</div><div class='add'>+static inline __be16 ovpn_ip_check_protocol(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	__be16 proto = 0;</div><div class='add'>+</div><div class='add'>+	/* skb could be non-linear,</div><div class='add'>+	 * make sure IP header is in non-fragmented part</div><div class='add'>+	 */</div><div class='add'>+	if (!pskb_network_may_pull(skb, sizeof(struct iphdr)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (ip_hdr(skb)-&gt;version == 4) {</div><div class='add'>+		proto = htons(ETH_P_IP);</div><div class='add'>+	} else if (ip_hdr(skb)-&gt;version == 6) {</div><div class='add'>+		if (!pskb_network_may_pull(skb, sizeof(struct ipv6hdr)))</div><div class='add'>+			return 0;</div><div class='add'>+		proto = htons(ETH_P_IPV6);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return proto;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_SKB_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/socket.c b/drivers/net/ovpn/socket.c<br/>new file mode 100644<br/>index 000000000000..9750871ab65c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/socket.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/socket.c</a></div><div class='hunk'>@@ -0,0 +1,241 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/net.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/udp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "main.h"</div><div class='add'>+#include "io.h"</div><div class='add'>+#include "peer.h"</div><div class='add'>+#include "socket.h"</div><div class='add'>+#include "tcp.h"</div><div class='add'>+#include "udp.h"</div><div class='add'>+</div><div class='add'>+static void ovpn_socket_release_kref(struct kref *kref)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *sock = container_of(kref, struct ovpn_socket,</div><div class='add'>+						refcount);</div><div class='add'>+</div><div class='add'>+	if (sock-&gt;sk-&gt;sk_protocol == IPPROTO_UDP)</div><div class='add'>+		ovpn_udp_socket_detach(sock);</div><div class='add'>+	else if (sock-&gt;sk-&gt;sk_protocol == IPPROTO_TCP)</div><div class='add'>+		ovpn_tcp_socket_detach(sock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_socket_put - decrease reference counter</div><div class='add'>+ * @peer: peer whose socket reference counter should be decreased</div><div class='add'>+ * @sock: the RCU protected peer socket</div><div class='add'>+ *</div><div class='add'>+ * This function is only used internally. Users willing to release</div><div class='add'>+ * references to the ovpn_socket should use ovpn_socket_release()</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the socket was released, false otherwise</div><div class='add'>+ */</div><div class='add'>+static bool ovpn_socket_put(struct ovpn_peer *peer, struct ovpn_socket *sock)</div><div class='add'>+{</div><div class='add'>+	return kref_put(&amp;sock-&gt;refcount, ovpn_socket_release_kref);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_socket_release - release resources owned by socket user</div><div class='add'>+ * @peer: peer whose socket should be released</div><div class='add'>+ *</div><div class='add'>+ * This function should be invoked when the peer is being removed</div><div class='add'>+ * and wants to drop its link to the socket.</div><div class='add'>+ *</div><div class='add'>+ * In case of UDP, the detach routine will drop a reference to the</div><div class='add'>+ * ovpn netdev, pointed by the ovpn_socket.</div><div class='add'>+ *</div><div class='add'>+ * In case of TCP, releasing the socket will cause dropping</div><div class='add'>+ * the refcounter for the peer it is linked to, thus allowing the peer</div><div class='add'>+ * disappear as well.</div><div class='add'>+ *</div><div class='add'>+ * This function is expected to be invoked exactly once per peer</div><div class='add'>+ *</div><div class='add'>+ * NOTE: this function may sleep</div><div class='add'>+ */</div><div class='add'>+void ovpn_socket_release(struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	bool released;</div><div class='add'>+</div><div class='add'>+	might_sleep();</div><div class='add'>+</div><div class='add'>+	sock = rcu_replace_pointer(peer-&gt;sock, NULL, true);</div><div class='add'>+	/* release may be invoked after socket was detached */</div><div class='add'>+	if (!sock)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Drop the reference while holding the sock lock to avoid</div><div class='add'>+	 * concurrent ovpn_socket_new call to mess up with a partially</div><div class='add'>+	 * detached socket.</div><div class='add'>+	 *</div><div class='add'>+	 * Holding the lock ensures that a socket with refcnt 0 is fully</div><div class='add'>+	 * detached before it can be picked by a concurrent reader.</div><div class='add'>+	 */</div><div class='add'>+	lock_sock(sock-&gt;sk);</div><div class='add'>+	released = ovpn_socket_put(peer, sock);</div><div class='add'>+	release_sock(sock-&gt;sk);</div><div class='add'>+</div><div class='add'>+	/* align all readers with sk_user_data being NULL */</div><div class='add'>+	synchronize_rcu();</div><div class='add'>+</div><div class='add'>+	/* following cleanup should happen with lock released */</div><div class='add'>+	if (released) {</div><div class='add'>+		if (sock-&gt;sk-&gt;sk_protocol == IPPROTO_UDP) {</div><div class='add'>+			netdev_put(sock-&gt;ovpn-&gt;dev, &amp;sock-&gt;dev_tracker);</div><div class='add'>+		} else if (sock-&gt;sk-&gt;sk_protocol == IPPROTO_TCP) {</div><div class='add'>+			/* wait for TCP jobs to terminate */</div><div class='add'>+			ovpn_tcp_socket_wait_finish(sock);</div><div class='add'>+			ovpn_peer_put(sock-&gt;peer);</div><div class='add'>+		}</div><div class='add'>+		/* drop reference acquired in ovpn_socket_new() */</div><div class='add'>+		sock_put(sock-&gt;sk);</div><div class='add'>+		/* we can call plain kfree() because we already waited one RCU</div><div class='add'>+		 * period due to synchronize_rcu()</div><div class='add'>+		 */</div><div class='add'>+		kfree(sock);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ovpn_socket_hold(struct ovpn_socket *sock)</div><div class='add'>+{</div><div class='add'>+	return kref_get_unless_zero(&amp;sock-&gt;refcount);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_socket_attach(struct ovpn_socket *ovpn_sock,</div><div class='add'>+			      struct socket *sock,</div><div class='add'>+			      struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	if (sock-&gt;sk-&gt;sk_protocol == IPPROTO_UDP)</div><div class='add'>+		return ovpn_udp_socket_attach(ovpn_sock, sock, peer-&gt;ovpn);</div><div class='add'>+	else if (sock-&gt;sk-&gt;sk_protocol == IPPROTO_TCP)</div><div class='add'>+		return ovpn_tcp_socket_attach(ovpn_sock, peer);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_socket_new - create a new socket and initialize it</div><div class='add'>+ * @sock: the kernel socket to embed</div><div class='add'>+ * @peer: the peer reachable via this socket</div><div class='add'>+ *</div><div class='add'>+ * Return: an openvpn socket on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+struct ovpn_socket *ovpn_socket_new(struct socket *sock, struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *ovpn_sock;</div><div class='add'>+	struct sock *sk = sock-&gt;sk;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lock_sock(sk);</div><div class='add'>+</div><div class='add'>+	/* a TCP socket can only be owned by a single peer, therefore there</div><div class='add'>+	 * can't be any other user</div><div class='add'>+	 */</div><div class='add'>+	if (sk-&gt;sk_protocol == IPPROTO_TCP &amp;&amp; sk-&gt;sk_user_data) {</div><div class='add'>+		ovpn_sock = ERR_PTR(-EBUSY);</div><div class='add'>+		goto sock_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* a UDP socket can be shared across multiple peers, but we must make</div><div class='add'>+	 * sure it is not owned by something else</div><div class='add'>+	 */</div><div class='add'>+	if (sk-&gt;sk_protocol == IPPROTO_UDP) {</div><div class='add'>+		u8 type = READ_ONCE(udp_sk(sk)-&gt;encap_type);</div><div class='add'>+</div><div class='add'>+		/* socket owned by other encapsulation module */</div><div class='add'>+		if (type &amp;&amp; type != UDP_ENCAP_OVPNINUDP) {</div><div class='add'>+			ovpn_sock = ERR_PTR(-EBUSY);</div><div class='add'>+			goto sock_release;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		ovpn_sock = rcu_dereference_sk_user_data(sk);</div><div class='add'>+		if (ovpn_sock) {</div><div class='add'>+			/* socket owned by another ovpn instance, we can't use it */</div><div class='add'>+			if (ovpn_sock-&gt;ovpn != peer-&gt;ovpn) {</div><div class='add'>+				ovpn_sock = ERR_PTR(-EBUSY);</div><div class='add'>+				rcu_read_unlock();</div><div class='add'>+				goto sock_release;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* this socket is already owned by this instance,</div><div class='add'>+			 * therefore we can increase the refcounter and</div><div class='add'>+			 * use it as expected</div><div class='add'>+			 */</div><div class='add'>+			if (WARN_ON(!ovpn_socket_hold(ovpn_sock))) {</div><div class='add'>+				/* this should never happen because setting</div><div class='add'>+				 * the refcnt to 0 and detaching the socket</div><div class='add'>+				 * is expected to be atomic</div><div class='add'>+				 */</div><div class='add'>+				ovpn_sock = ERR_PTR(-EAGAIN);</div><div class='add'>+				rcu_read_unlock();</div><div class='add'>+				goto sock_release;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			rcu_read_unlock();</div><div class='add'>+			goto sock_release;</div><div class='add'>+		}</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* socket is not owned: attach to this ovpn instance */</div><div class='add'>+</div><div class='add'>+	ovpn_sock = kzalloc(sizeof(*ovpn_sock), GFP_KERNEL);</div><div class='add'>+	if (!ovpn_sock) {</div><div class='add'>+		ovpn_sock = ERR_PTR(-ENOMEM);</div><div class='add'>+		goto sock_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn_sock-&gt;sk = sk;</div><div class='add'>+	kref_init(&amp;ovpn_sock-&gt;refcount);</div><div class='add'>+</div><div class='add'>+	/* the newly created ovpn_socket is holding reference to sk,</div><div class='add'>+	 * therefore we increase its refcounter.</div><div class='add'>+	 *</div><div class='add'>+	 * This ovpn_socket instance is referenced by all peers</div><div class='add'>+	 * using the same socket.</div><div class='add'>+	 *</div><div class='add'>+	 * ovpn_socket_release() will take care of dropping the reference.</div><div class='add'>+	 */</div><div class='add'>+	sock_hold(sk);</div><div class='add'>+</div><div class='add'>+	ret = ovpn_socket_attach(ovpn_sock, sock, peer);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		sock_put(sk);</div><div class='add'>+		kfree(ovpn_sock);</div><div class='add'>+		ovpn_sock = ERR_PTR(ret);</div><div class='add'>+		goto sock_release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TCP sockets are per-peer, therefore they are linked to their unique</div><div class='add'>+	 * peer</div><div class='add'>+	 */</div><div class='add'>+	if (sk-&gt;sk_protocol == IPPROTO_TCP) {</div><div class='add'>+		INIT_WORK(&amp;ovpn_sock-&gt;tcp_tx_work, ovpn_tcp_tx_work);</div><div class='add'>+		ovpn_sock-&gt;peer = peer;</div><div class='add'>+		ovpn_peer_hold(peer);</div><div class='add'>+	} else if (sk-&gt;sk_protocol == IPPROTO_UDP) {</div><div class='add'>+		/* in UDP we only link the ovpn instance since the socket is</div><div class='add'>+		 * shared among multiple peers</div><div class='add'>+		 */</div><div class='add'>+		ovpn_sock-&gt;ovpn = peer-&gt;ovpn;</div><div class='add'>+		netdev_hold(peer-&gt;ovpn-&gt;dev, &amp;ovpn_sock-&gt;dev_tracker,</div><div class='add'>+			    GFP_KERNEL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_assign_sk_user_data(sk, ovpn_sock);</div><div class='add'>+sock_release:</div><div class='add'>+	release_sock(sk);</div><div class='add'>+	return ovpn_sock;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/socket.h b/drivers/net/ovpn/socket.h<br/>new file mode 100644<br/>index 000000000000..4afcec71040d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/socket.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/socket.h</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_SOCK_H_</div><div class='add'>+#define _NET_OVPN_SOCK_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/net.h&gt;</div><div class='add'>+#include &lt;linux/kref.h&gt;</div><div class='add'>+#include &lt;net/sock.h&gt;</div><div class='add'>+</div><div class='add'>+struct ovpn_priv;</div><div class='add'>+struct ovpn_peer;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ovpn_socket - a kernel socket referenced in the ovpn code</div><div class='add'>+ * @ovpn: ovpn instance owning this socket (UDP only)</div><div class='add'>+ * @dev_tracker: reference tracker for associated dev (UDP only)</div><div class='add'>+ * @peer: unique peer transmitting over this socket (TCP only)</div><div class='add'>+ * @sk: the low level sock object</div><div class='add'>+ * @refcount: amount of contexts currently referencing this object</div><div class='add'>+ * @work: member used to schedule release routine (it may block)</div><div class='add'>+ * @tcp_tx_work: work for deferring outgoing packet processing (TCP only)</div><div class='add'>+ */</div><div class='add'>+struct ovpn_socket {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			struct ovpn_priv *ovpn;</div><div class='add'>+			netdevice_tracker dev_tracker;</div><div class='add'>+		};</div><div class='add'>+		struct ovpn_peer *peer;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct sock *sk;</div><div class='add'>+	struct kref refcount;</div><div class='add'>+	struct work_struct work;</div><div class='add'>+	struct work_struct tcp_tx_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ovpn_socket *ovpn_socket_new(struct socket *sock,</div><div class='add'>+				    struct ovpn_peer *peer);</div><div class='add'>+void ovpn_socket_release(struct ovpn_peer *peer);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_SOCK_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/stats.c b/drivers/net/ovpn/stats.c<br/>new file mode 100644<br/>index 000000000000..d637143473bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/stats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/stats.c</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/atomic.h&gt;</div><div class='add'>+</div><div class='add'>+#include "stats.h"</div><div class='add'>+</div><div class='add'>+void ovpn_peer_stats_init(struct ovpn_peer_stats *ps)</div><div class='add'>+{</div><div class='add'>+	atomic64_set(&amp;ps-&gt;rx.bytes, 0);</div><div class='add'>+	atomic64_set(&amp;ps-&gt;rx.packets, 0);</div><div class='add'>+</div><div class='add'>+	atomic64_set(&amp;ps-&gt;tx.bytes, 0);</div><div class='add'>+	atomic64_set(&amp;ps-&gt;tx.packets, 0);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/stats.h b/drivers/net/ovpn/stats.h<br/>new file mode 100644<br/>index 000000000000..53433d8b6c33<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/stats.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/stats.h</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2020-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	James Yonan &lt;james@openvpn.net&gt;</div><div class='add'>+ *		Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ *		Lev Stipakov &lt;lev@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_OVPNSTATS_H_</div><div class='add'>+#define _NET_OVPN_OVPNSTATS_H_</div><div class='add'>+</div><div class='add'>+/* one stat */</div><div class='add'>+struct ovpn_peer_stat {</div><div class='add'>+	atomic64_t bytes;</div><div class='add'>+	atomic64_t packets;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* rx and tx stats combined */</div><div class='add'>+struct ovpn_peer_stats {</div><div class='add'>+	struct ovpn_peer_stat rx;</div><div class='add'>+	struct ovpn_peer_stat tx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ovpn_peer_stats_init(struct ovpn_peer_stats *ps);</div><div class='add'>+</div><div class='add'>+static inline void ovpn_peer_stats_increment(struct ovpn_peer_stat *stat,</div><div class='add'>+					     const unsigned int n)</div><div class='add'>+{</div><div class='add'>+	atomic64_add(n, &amp;stat-&gt;bytes);</div><div class='add'>+	atomic64_inc(&amp;stat-&gt;packets);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ovpn_peer_stats_increment_rx(struct ovpn_peer_stats *stats,</div><div class='add'>+						const unsigned int n)</div><div class='add'>+{</div><div class='add'>+	ovpn_peer_stats_increment(&amp;stats-&gt;rx, n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ovpn_peer_stats_increment_tx(struct ovpn_peer_stats *stats,</div><div class='add'>+						const unsigned int n)</div><div class='add'>+{</div><div class='add'>+	ovpn_peer_stats_increment(&amp;stats-&gt;tx, n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_OVPNSTATS_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/tcp.c b/drivers/net/ovpn/tcp.c<br/>new file mode 100644<br/>index 000000000000..0d7f30360d87<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/tcp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/tcp.c</a></div><div class='hunk'>@@ -0,0 +1,619 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2019-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;net/hotdata.h&gt;</div><div class='add'>+#include &lt;net/inet_common.h&gt;</div><div class='add'>+#include &lt;net/ipv6.h&gt;</div><div class='add'>+#include &lt;net/tcp.h&gt;</div><div class='add'>+#include &lt;net/transp_v6.h&gt;</div><div class='add'>+#include &lt;net/route.h&gt;</div><div class='add'>+#include &lt;trace/events/sock.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "main.h"</div><div class='add'>+#include "io.h"</div><div class='add'>+#include "peer.h"</div><div class='add'>+#include "proto.h"</div><div class='add'>+#include "skb.h"</div><div class='add'>+#include "tcp.h"</div><div class='add'>+</div><div class='add'>+#define OVPN_TCP_DEPTH_NESTING	2</div><div class='add'>+#if OVPN_TCP_DEPTH_NESTING == SINGLE_DEPTH_NESTING</div><div class='add'>+#error "OVPN TCP requires its own lockdep subclass"</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct proto ovpn_tcp_prot __ro_after_init;</div><div class='add'>+static struct proto_ops ovpn_tcp_ops __ro_after_init;</div><div class='add'>+static struct proto ovpn_tcp6_prot __ro_after_init;</div><div class='add'>+static struct proto_ops ovpn_tcp6_ops __ro_after_init;</div><div class='add'>+</div><div class='add'>+static int ovpn_tcp_parse(struct strparser *strp, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct strp_msg *rxm = strp_msg(skb);</div><div class='add'>+	__be16 blen;</div><div class='add'>+	u16 len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* when packets are written to the TCP stream, they are prepended with</div><div class='add'>+	 * two bytes indicating the actual packet size.</div><div class='add'>+	 * Parse accordingly and return the actual size (including the size</div><div class='add'>+	 * header)</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;len &lt; rxm-&gt;offset + 2)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = skb_copy_bits(skb, rxm-&gt;offset, &amp;blen, sizeof(blen));</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	len = be16_to_cpu(blen);</div><div class='add'>+	if (len &lt; 2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return len + 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* queue skb for sending to userspace via recvmsg on the socket */</div><div class='add'>+static void ovpn_tcp_to_userspace(struct ovpn_peer *peer, struct sock *sk,</div><div class='add'>+				  struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	skb_set_owner_r(skb, sk);</div><div class='add'>+	memset(skb-&gt;cb, 0, sizeof(skb-&gt;cb));</div><div class='add'>+	skb_queue_tail(&amp;peer-&gt;tcp.user_queue, skb);</div><div class='add'>+	peer-&gt;tcp.sk_cb.sk_data_ready(sk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_tcp_rcv(struct strparser *strp, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer = container_of(strp, struct ovpn_peer, tcp.strp);</div><div class='add'>+	struct strp_msg *msg = strp_msg(skb);</div><div class='add'>+	size_t pkt_len = msg-&gt;full_len - 2;</div><div class='add'>+	size_t off = msg-&gt;offset + 2;</div><div class='add'>+	u8 opcode;</div><div class='add'>+</div><div class='add'>+	/* ensure skb-&gt;data points to the beginning of the openvpn packet */</div><div class='add'>+	if (!pskb_pull(skb, off)) {</div><div class='add'>+		net_warn_ratelimited("%s: packet too small for peer %u\n",</div><div class='add'>+				     netdev_name(peer-&gt;ovpn-&gt;dev), peer-&gt;id);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* strparser does not trim the skb for us, therefore we do it now */</div><div class='add'>+	if (pskb_trim(skb, pkt_len) != 0) {</div><div class='add'>+		net_warn_ratelimited("%s: trimming skb failed for peer %u\n",</div><div class='add'>+				     netdev_name(peer-&gt;ovpn-&gt;dev), peer-&gt;id);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* we need the first 4 bytes of data to be accessible</div><div class='add'>+	 * to extract the opcode and the key ID later on</div><div class='add'>+	 */</div><div class='add'>+	if (!pskb_may_pull(skb, OVPN_OPCODE_SIZE)) {</div><div class='add'>+		net_warn_ratelimited("%s: packet too small to fetch opcode for peer %u\n",</div><div class='add'>+				     netdev_name(peer-&gt;ovpn-&gt;dev), peer-&gt;id);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* DATA_V2 packets are handled in kernel, the rest goes to user space */</div><div class='add'>+	opcode = ovpn_opcode_from_skb(skb, 0);</div><div class='add'>+	if (unlikely(opcode != OVPN_DATA_V2)) {</div><div class='add'>+		if (opcode == OVPN_DATA_V1) {</div><div class='add'>+			net_warn_ratelimited("%s: DATA_V1 detected on the TCP stream\n",</div><div class='add'>+					     netdev_name(peer-&gt;ovpn-&gt;dev));</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* The packet size header must be there when sending the packet</div><div class='add'>+		 * to userspace, therefore we put it back</div><div class='add'>+		 */</div><div class='add'>+		skb_push(skb, 2);</div><div class='add'>+		ovpn_tcp_to_userspace(peer, strp-&gt;sk, skb);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* hold reference to peer as required by ovpn_recv().</div><div class='add'>+	 *</div><div class='add'>+	 * NOTE: in this context we should already be holding a reference to</div><div class='add'>+	 * this peer, therefore ovpn_peer_hold() is not expected to fail</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON(!ovpn_peer_hold(peer)))</div><div class='add'>+		goto err_nopeer;</div><div class='add'>+</div><div class='add'>+	ovpn_recv(peer, skb);</div><div class='add'>+	return;</div><div class='add'>+err:</div><div class='add'>+	/* take reference for deferred peer deletion. should never fail */</div><div class='add'>+	if (WARN_ON(!ovpn_peer_hold(peer)))</div><div class='add'>+		goto err_nopeer;</div><div class='add'>+	schedule_work(&amp;peer-&gt;tcp.defer_del_work);</div><div class='add'>+	dev_dstats_rx_dropped(peer-&gt;ovpn-&gt;dev);</div><div class='add'>+err_nopeer:</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_tcp_recvmsg(struct sock *sk, struct msghdr *msg, size_t len,</div><div class='add'>+			    int flags, int *addr_len)</div><div class='add'>+{</div><div class='add'>+	int err = 0, off, copied = 0, ret;</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (unlikely(!sock || !sock-&gt;peer || !ovpn_peer_hold(sock-&gt;peer))) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		return -EBADF;</div><div class='add'>+	}</div><div class='add'>+	peer = sock-&gt;peer;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	skb = __skb_recv_datagram(sk, &amp;peer-&gt;tcp.user_queue, flags, &amp;off, &amp;err);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		if (err == -EAGAIN &amp;&amp; sk-&gt;sk_shutdown &amp; RCV_SHUTDOWN) {</div><div class='add'>+			ret = 0;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		ret = err;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	copied = len;</div><div class='add'>+	if (copied &gt; skb-&gt;len)</div><div class='add'>+		copied = skb-&gt;len;</div><div class='add'>+	else if (copied &lt; skb-&gt;len)</div><div class='add'>+		msg-&gt;msg_flags |= MSG_TRUNC;</div><div class='add'>+</div><div class='add'>+	err = skb_copy_datagram_msg(skb, 0, msg, copied);</div><div class='add'>+	if (unlikely(err)) {</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		ret = err;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; MSG_TRUNC)</div><div class='add'>+		copied = skb-&gt;len;</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+	ret = copied;</div><div class='add'>+out:</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_tcp_socket_detach(struct ovpn_socket *ovpn_sock)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer = ovpn_sock-&gt;peer;</div><div class='add'>+	struct sock *sk = ovpn_sock-&gt;sk;</div><div class='add'>+</div><div class='add'>+	strp_stop(&amp;peer-&gt;tcp.strp);</div><div class='add'>+	skb_queue_purge(&amp;peer-&gt;tcp.user_queue);</div><div class='add'>+</div><div class='add'>+	/* restore CBs that were saved in ovpn_sock_set_tcp_cb() */</div><div class='add'>+	sk-&gt;sk_data_ready = peer-&gt;tcp.sk_cb.sk_data_ready;</div><div class='add'>+	sk-&gt;sk_write_space = peer-&gt;tcp.sk_cb.sk_write_space;</div><div class='add'>+	sk-&gt;sk_prot = peer-&gt;tcp.sk_cb.prot;</div><div class='add'>+	sk-&gt;sk_socket-&gt;ops = peer-&gt;tcp.sk_cb.ops;</div><div class='add'>+</div><div class='add'>+	rcu_assign_sk_user_data(sk, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_tcp_socket_wait_finish(struct ovpn_socket *sock)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer = sock-&gt;peer;</div><div class='add'>+</div><div class='add'>+	/* NOTE: we don't wait for peer-&gt;tcp.defer_del_work to finish:</div><div class='add'>+	 * either the worker is not running or this function</div><div class='add'>+	 * was invoked by that worker.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	cancel_work_sync(&amp;sock-&gt;tcp_tx_work);</div><div class='add'>+	strp_done(&amp;peer-&gt;tcp.strp);</div><div class='add'>+</div><div class='add'>+	skb_queue_purge(&amp;peer-&gt;tcp.out_queue);</div><div class='add'>+	kfree_skb(peer-&gt;tcp.out_msg.skb);</div><div class='add'>+	peer-&gt;tcp.out_msg.skb = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_tcp_send_sock(struct ovpn_peer *peer, struct sock *sk)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb = peer-&gt;tcp.out_msg.skb;</div><div class='add'>+	int ret, flags;</div><div class='add'>+</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (peer-&gt;tcp.tx_in_progress)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	peer-&gt;tcp.tx_in_progress = true;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		flags = ovpn_skb_cb(skb)-&gt;nosignal ? MSG_NOSIGNAL : 0;</div><div class='add'>+		ret = skb_send_sock_locked_with_flags(sk, skb,</div><div class='add'>+						      peer-&gt;tcp.out_msg.offset,</div><div class='add'>+						      peer-&gt;tcp.out_msg.len,</div><div class='add'>+						      flags);</div><div class='add'>+		if (unlikely(ret &lt; 0)) {</div><div class='add'>+			if (ret == -EAGAIN)</div><div class='add'>+				goto out;</div><div class='add'>+</div><div class='add'>+			net_warn_ratelimited("%s: TCP error to peer %u: %d\n",</div><div class='add'>+					     netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+					     peer-&gt;id, ret);</div><div class='add'>+</div><div class='add'>+			/* in case of TCP error we can't recover the VPN</div><div class='add'>+			 * stream therefore we abort the connection</div><div class='add'>+			 */</div><div class='add'>+			ovpn_peer_hold(peer);</div><div class='add'>+			schedule_work(&amp;peer-&gt;tcp.defer_del_work);</div><div class='add'>+</div><div class='add'>+			/* we bail out immediately and keep tx_in_progress set</div><div class='add'>+			 * to true. This way we prevent more TX attempts</div><div class='add'>+			 * which would lead to more invocations of</div><div class='add'>+			 * schedule_work()</div><div class='add'>+			 */</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		peer-&gt;tcp.out_msg.len -= ret;</div><div class='add'>+		peer-&gt;tcp.out_msg.offset += ret;</div><div class='add'>+	} while (peer-&gt;tcp.out_msg.len &gt; 0);</div><div class='add'>+</div><div class='add'>+	if (!peer-&gt;tcp.out_msg.len) {</div><div class='add'>+		preempt_disable();</div><div class='add'>+		dev_dstats_tx_add(peer-&gt;ovpn-&gt;dev, skb-&gt;len);</div><div class='add'>+		preempt_enable();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree_skb(peer-&gt;tcp.out_msg.skb);</div><div class='add'>+	peer-&gt;tcp.out_msg.skb = NULL;</div><div class='add'>+	peer-&gt;tcp.out_msg.len = 0;</div><div class='add'>+	peer-&gt;tcp.out_msg.offset = 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	peer-&gt;tcp.tx_in_progress = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_tcp_tx_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+</div><div class='add'>+	sock = container_of(work, struct ovpn_socket, tcp_tx_work);</div><div class='add'>+</div><div class='add'>+	lock_sock(sock-&gt;sk);</div><div class='add'>+	if (sock-&gt;peer)</div><div class='add'>+		ovpn_tcp_send_sock(sock-&gt;peer, sock-&gt;sk);</div><div class='add'>+	release_sock(sock-&gt;sk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_tcp_send_sock_skb(struct ovpn_peer *peer, struct sock *sk,</div><div class='add'>+				   struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (peer-&gt;tcp.out_msg.skb)</div><div class='add'>+		ovpn_tcp_send_sock(peer, sk);</div><div class='add'>+</div><div class='add'>+	if (peer-&gt;tcp.out_msg.skb) {</div><div class='add'>+		dev_dstats_tx_dropped(peer-&gt;ovpn-&gt;dev);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	peer-&gt;tcp.out_msg.skb = skb;</div><div class='add'>+	peer-&gt;tcp.out_msg.len = skb-&gt;len;</div><div class='add'>+	peer-&gt;tcp.out_msg.offset = 0;</div><div class='add'>+	ovpn_tcp_send_sock(peer, sk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ovpn_tcp_send_skb(struct ovpn_peer *peer, struct sock *sk,</div><div class='add'>+		       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	u16 len = skb-&gt;len;</div><div class='add'>+</div><div class='add'>+	*(__be16 *)__skb_push(skb, sizeof(u16)) = htons(len);</div><div class='add'>+</div><div class='add'>+	spin_lock_nested(&amp;sk-&gt;sk_lock.slock, OVPN_TCP_DEPTH_NESTING);</div><div class='add'>+	if (sock_owned_by_user(sk)) {</div><div class='add'>+		if (skb_queue_len(&amp;peer-&gt;tcp.out_queue) &gt;=</div><div class='add'>+		    READ_ONCE(net_hotdata.max_backlog)) {</div><div class='add'>+			dev_dstats_tx_dropped(peer-&gt;ovpn-&gt;dev);</div><div class='add'>+			kfree_skb(skb);</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+		__skb_queue_tail(&amp;peer-&gt;tcp.out_queue, skb);</div><div class='add'>+	} else {</div><div class='add'>+		ovpn_tcp_send_sock_skb(peer, sk, skb);</div><div class='add'>+	}</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock(&amp;sk-&gt;sk_lock.slock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_tcp_release(struct sock *sk)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff_head queue;</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (!sock) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	peer = sock-&gt;peer;</div><div class='add'>+</div><div class='add'>+	/* during initialization this function is called before</div><div class='add'>+	 * assigning sock-&gt;peer</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!peer || !ovpn_peer_hold(peer))) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	__skb_queue_head_init(&amp;queue);</div><div class='add'>+	skb_queue_splice_init(&amp;peer-&gt;tcp.out_queue, &amp;queue);</div><div class='add'>+</div><div class='add'>+	while ((skb = __skb_dequeue(&amp;queue)))</div><div class='add'>+		ovpn_tcp_send_sock_skb(peer, sk, skb);</div><div class='add'>+</div><div class='add'>+	peer-&gt;tcp.sk_cb.prot-&gt;release_cb(sk);</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_tcp_sendmsg(struct sock *sk, struct msghdr *msg, size_t size)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	int ret, linear = PAGE_SIZE;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	lock_sock(sk);</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (unlikely(!sock || !sock-&gt;peer || !ovpn_peer_hold(sock-&gt;peer))) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		release_sock(sk);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	peer = sock-&gt;peer;</div><div class='add'>+</div><div class='add'>+	if (msg-&gt;msg_flags &amp; ~(MSG_DONTWAIT | MSG_NOSIGNAL)) {</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		goto peer_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (peer-&gt;tcp.out_msg.skb) {</div><div class='add'>+		ret = -EAGAIN;</div><div class='add'>+		goto peer_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (size &lt; linear)</div><div class='add'>+		linear = size;</div><div class='add'>+</div><div class='add'>+	skb = sock_alloc_send_pskb(sk, linear, size - linear,</div><div class='add'>+				   msg-&gt;msg_flags &amp; MSG_DONTWAIT, &amp;ret, 0);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		net_err_ratelimited("%s: skb alloc failed: %d\n",</div><div class='add'>+				    netdev_name(peer-&gt;ovpn-&gt;dev), ret);</div><div class='add'>+		goto peer_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_put(skb, linear);</div><div class='add'>+	skb-&gt;len = size;</div><div class='add'>+	skb-&gt;data_len = size - linear;</div><div class='add'>+</div><div class='add'>+	ret = skb_copy_datagram_from_iter(skb, 0, &amp;msg-&gt;msg_iter, size);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		net_err_ratelimited("%s: skb copy from iter failed: %d\n",</div><div class='add'>+				    netdev_name(peer-&gt;ovpn-&gt;dev), ret);</div><div class='add'>+		goto peer_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn_skb_cb(skb)-&gt;nosignal = msg-&gt;msg_flags &amp; MSG_NOSIGNAL;</div><div class='add'>+	ovpn_tcp_send_sock_skb(peer, sk, skb);</div><div class='add'>+	ret = size;</div><div class='add'>+peer_free:</div><div class='add'>+	release_sock(sk);</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ovpn_tcp_disconnect(struct sock *sk, int flags)</div><div class='add'>+{</div><div class='add'>+	return -EBUSY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_tcp_data_ready(struct sock *sk)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+</div><div class='add'>+	trace_sk_data_ready(sk);</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (likely(sock &amp;&amp; sock-&gt;peer))</div><div class='add'>+		strp_data_ready(&amp;sock-&gt;peer-&gt;tcp.strp);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_tcp_write_space(struct sock *sk)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (likely(sock &amp;&amp; sock-&gt;peer)) {</div><div class='add'>+		schedule_work(&amp;sock-&gt;tcp_tx_work);</div><div class='add'>+		sock-&gt;peer-&gt;tcp.sk_cb.sk_write_space(sk);</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_tcp_build_protos(struct proto *new_prot,</div><div class='add'>+				  struct proto_ops *new_ops,</div><div class='add'>+				  const struct proto *orig_prot,</div><div class='add'>+				  const struct proto_ops *orig_ops);</div><div class='add'>+</div><div class='add'>+static void ovpn_tcp_peer_del_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_peer *peer = container_of(work, struct ovpn_peer,</div><div class='add'>+					      tcp.defer_del_work);</div><div class='add'>+</div><div class='add'>+	ovpn_peer_del(peer, OVPN_DEL_PEER_REASON_TRANSPORT_ERROR);</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set TCP encapsulation callbacks */</div><div class='add'>+int ovpn_tcp_socket_attach(struct ovpn_socket *ovpn_sock,</div><div class='add'>+			   struct ovpn_peer *peer)</div><div class='add'>+{</div><div class='add'>+	struct strp_callbacks cb = {</div><div class='add'>+		.rcv_msg = ovpn_tcp_rcv,</div><div class='add'>+		.parse_msg = ovpn_tcp_parse,</div><div class='add'>+	};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* make sure no pre-existing encapsulation handler exists */</div><div class='add'>+	if (ovpn_sock-&gt;sk-&gt;sk_user_data)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	/* only a fully connected socket is expected. Connection should be</div><div class='add'>+	 * handled in userspace</div><div class='add'>+	 */</div><div class='add'>+	if (ovpn_sock-&gt;sk-&gt;sk_state != TCP_ESTABLISHED) {</div><div class='add'>+		net_err_ratelimited("%s: provided TCP socket is not in ESTABLISHED state: %d\n",</div><div class='add'>+				    netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+				    ovpn_sock-&gt;sk-&gt;sk_state);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = strp_init(&amp;peer-&gt;tcp.strp, ovpn_sock-&gt;sk, &amp;cb);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		DEBUG_NET_WARN_ON_ONCE(1);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;peer-&gt;tcp.defer_del_work, ovpn_tcp_peer_del_work);</div><div class='add'>+</div><div class='add'>+	__sk_dst_reset(ovpn_sock-&gt;sk);</div><div class='add'>+	skb_queue_head_init(&amp;peer-&gt;tcp.user_queue);</div><div class='add'>+	skb_queue_head_init(&amp;peer-&gt;tcp.out_queue);</div><div class='add'>+</div><div class='add'>+	/* save current CBs so that they can be restored upon socket release */</div><div class='add'>+	peer-&gt;tcp.sk_cb.sk_data_ready = ovpn_sock-&gt;sk-&gt;sk_data_ready;</div><div class='add'>+	peer-&gt;tcp.sk_cb.sk_write_space = ovpn_sock-&gt;sk-&gt;sk_write_space;</div><div class='add'>+	peer-&gt;tcp.sk_cb.prot = ovpn_sock-&gt;sk-&gt;sk_prot;</div><div class='add'>+	peer-&gt;tcp.sk_cb.ops = ovpn_sock-&gt;sk-&gt;sk_socket-&gt;ops;</div><div class='add'>+</div><div class='add'>+	/* assign our static CBs and prot/ops */</div><div class='add'>+	ovpn_sock-&gt;sk-&gt;sk_data_ready = ovpn_tcp_data_ready;</div><div class='add'>+	ovpn_sock-&gt;sk-&gt;sk_write_space = ovpn_tcp_write_space;</div><div class='add'>+</div><div class='add'>+	if (ovpn_sock-&gt;sk-&gt;sk_family == AF_INET) {</div><div class='add'>+		ovpn_sock-&gt;sk-&gt;sk_prot = &amp;ovpn_tcp_prot;</div><div class='add'>+		ovpn_sock-&gt;sk-&gt;sk_socket-&gt;ops = &amp;ovpn_tcp_ops;</div><div class='add'>+	} else {</div><div class='add'>+		ovpn_sock-&gt;sk-&gt;sk_prot = &amp;ovpn_tcp6_prot;</div><div class='add'>+		ovpn_sock-&gt;sk-&gt;sk_socket-&gt;ops = &amp;ovpn_tcp6_ops;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* avoid using task_frag */</div><div class='add'>+	ovpn_sock-&gt;sk-&gt;sk_allocation = GFP_ATOMIC;</div><div class='add'>+	ovpn_sock-&gt;sk-&gt;sk_use_task_frag = false;</div><div class='add'>+</div><div class='add'>+	/* enqueue the RX worker */</div><div class='add'>+	strp_check_rcv(&amp;peer-&gt;tcp.strp);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_tcp_close(struct sock *sk, long timeout)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (!sock || !sock-&gt;peer || !ovpn_peer_hold(sock-&gt;peer)) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	peer = sock-&gt;peer;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	ovpn_peer_del(sock-&gt;peer, OVPN_DEL_PEER_REASON_TRANSPORT_DISCONNECT);</div><div class='add'>+	peer-&gt;tcp.sk_cb.prot-&gt;close(sk, timeout);</div><div class='add'>+	ovpn_peer_put(peer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __poll_t ovpn_tcp_poll(struct file *file, struct socket *sock,</div><div class='add'>+			      poll_table *wait)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff_head *queue = &amp;sock-&gt;sk-&gt;sk_receive_queue;</div><div class='add'>+	struct ovpn_socket *ovpn_sock;</div><div class='add'>+	struct ovpn_peer *peer = NULL;</div><div class='add'>+	__poll_t mask;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	ovpn_sock = rcu_dereference_sk_user_data(sock-&gt;sk);</div><div class='add'>+	/* if we landed in this callback, we expect to have a</div><div class='add'>+	 * meaningful state. The ovpn_socket lifecycle would</div><div class='add'>+	 * prevent it otherwise.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN(!ovpn_sock || !ovpn_sock-&gt;peer,</div><div class='add'>+		 "ovpn: null state in ovpn_tcp_poll!")) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ovpn_peer_hold(ovpn_sock-&gt;peer)) {</div><div class='add'>+		peer = ovpn_sock-&gt;peer;</div><div class='add'>+		queue = &amp;peer-&gt;tcp.user_queue;</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	mask = datagram_poll_queue(file, sock, wait, queue);</div><div class='add'>+</div><div class='add'>+	if (peer)</div><div class='add'>+		ovpn_peer_put(peer);</div><div class='add'>+</div><div class='add'>+	return mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_tcp_build_protos(struct proto *new_prot,</div><div class='add'>+				  struct proto_ops *new_ops,</div><div class='add'>+				  const struct proto *orig_prot,</div><div class='add'>+				  const struct proto_ops *orig_ops)</div><div class='add'>+{</div><div class='add'>+	memcpy(new_prot, orig_prot, sizeof(*new_prot));</div><div class='add'>+	memcpy(new_ops, orig_ops, sizeof(*new_ops));</div><div class='add'>+	new_prot-&gt;recvmsg = ovpn_tcp_recvmsg;</div><div class='add'>+	new_prot-&gt;sendmsg = ovpn_tcp_sendmsg;</div><div class='add'>+	new_prot-&gt;disconnect = ovpn_tcp_disconnect;</div><div class='add'>+	new_prot-&gt;close = ovpn_tcp_close;</div><div class='add'>+	new_prot-&gt;release_cb = ovpn_tcp_release;</div><div class='add'>+	new_ops-&gt;poll = ovpn_tcp_poll;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Initialize TCP static objects */</div><div class='add'>+void __init ovpn_tcp_init(void)</div><div class='add'>+{</div><div class='add'>+	ovpn_tcp_build_protos(&amp;ovpn_tcp_prot, &amp;ovpn_tcp_ops, &amp;tcp_prot,</div><div class='add'>+			      &amp;inet_stream_ops);</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	ovpn_tcp_build_protos(&amp;ovpn_tcp6_prot, &amp;ovpn_tcp6_ops, &amp;tcpv6_prot,</div><div class='add'>+			      &amp;inet6_stream_ops);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/tcp.h b/drivers/net/ovpn/tcp.h<br/>new file mode 100644<br/>index 000000000000..a3aa3570ae5e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/tcp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/tcp.h</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2019-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_TCP_H_</div><div class='add'>+#define _NET_OVPN_TCP_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/net.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#include "peer.h"</div><div class='add'>+#include "skb.h"</div><div class='add'>+#include "socket.h"</div><div class='add'>+</div><div class='add'>+void __init ovpn_tcp_init(void);</div><div class='add'>+</div><div class='add'>+int ovpn_tcp_socket_attach(struct ovpn_socket *ovpn_sock,</div><div class='add'>+			   struct ovpn_peer *peer);</div><div class='add'>+void ovpn_tcp_socket_detach(struct ovpn_socket *ovpn_sock);</div><div class='add'>+void ovpn_tcp_socket_wait_finish(struct ovpn_socket *sock);</div><div class='add'>+</div><div class='add'>+/* Prepare skb and enqueue it for sending to peer.</div><div class='add'>+ *</div><div class='add'>+ * Preparation consist in prepending the skb payload with its size.</div><div class='add'>+ * Required by the OpenVPN protocol in order to extract packets from</div><div class='add'>+ * the TCP stream on the receiver side.</div><div class='add'>+ */</div><div class='add'>+void ovpn_tcp_send_skb(struct ovpn_peer *peer, struct sock *sk,</div><div class='add'>+		       struct sk_buff *skb);</div><div class='add'>+void ovpn_tcp_tx_work(struct work_struct *work);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_TCP_H_ */</div><div class='head'>diff --git a/drivers/net/ovpn/udp.c b/drivers/net/ovpn/udp.c<br/>new file mode 100644<br/>index 000000000000..d6a0f7a0b75d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/udp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/udp.c</a></div><div class='hunk'>@@ -0,0 +1,448 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2019-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/inetdevice.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/socket.h&gt;</div><div class='add'>+#include &lt;linux/udp.h&gt;</div><div class='add'>+#include &lt;net/addrconf.h&gt;</div><div class='add'>+#include &lt;net/dst_cache.h&gt;</div><div class='add'>+#include &lt;net/route.h&gt;</div><div class='add'>+#include &lt;net/ipv6_stubs.h&gt;</div><div class='add'>+#include &lt;net/transp_v6.h&gt;</div><div class='add'>+#include &lt;net/udp.h&gt;</div><div class='add'>+#include &lt;net/udp_tunnel.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ovpnpriv.h"</div><div class='add'>+#include "main.h"</div><div class='add'>+#include "bind.h"</div><div class='add'>+#include "io.h"</div><div class='add'>+#include "peer.h"</div><div class='add'>+#include "proto.h"</div><div class='add'>+#include "socket.h"</div><div class='add'>+#include "udp.h"</div><div class='add'>+</div><div class='add'>+/* Retrieve the corresponding ovpn object from a UDP socket</div><div class='add'>+ * rcu_read_lock must be held on entry</div><div class='add'>+ */</div><div class='add'>+static struct ovpn_socket *ovpn_socket_from_udp_sock(struct sock *sk)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *ovpn_sock;</div><div class='add'>+</div><div class='add'>+	if (unlikely(READ_ONCE(udp_sk(sk)-&gt;encap_type) != UDP_ENCAP_OVPNINUDP))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ovpn_sock = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (unlikely(!ovpn_sock))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* make sure that sk matches our stored transport socket */</div><div class='add'>+	if (unlikely(!ovpn_sock-&gt;sk || sk != ovpn_sock-&gt;sk))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return ovpn_sock;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_udp_encap_recv - Start processing a received UDP packet.</div><div class='add'>+ * @sk: socket over which the packet was received</div><div class='add'>+ * @skb: the received packet</div><div class='add'>+ *</div><div class='add'>+ * If the first byte of the payload is:</div><div class='add'>+ * - DATA_V2 the packet is accepted for further processing,</div><div class='add'>+ * - DATA_V1 the packet is dropped as not supported,</div><div class='add'>+ * - anything else the packet is forwarded to the UDP stack for</div><div class='add'>+ *   delivery to user space.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ *  0 if skb was consumed or dropped</div><div class='add'>+ * &gt;0 if skb should be passed up to userspace as UDP (packet not consumed)</div><div class='add'>+ * &lt;0 if skb should be resubmitted as proto -N (packet not consumed)</div><div class='add'>+ */</div><div class='add'>+static int ovpn_udp_encap_recv(struct sock *sk, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *ovpn_sock;</div><div class='add'>+	struct ovpn_priv *ovpn;</div><div class='add'>+	struct ovpn_peer *peer;</div><div class='add'>+	u32 peer_id;</div><div class='add'>+	u8 opcode;</div><div class='add'>+</div><div class='add'>+	ovpn_sock = ovpn_socket_from_udp_sock(sk);</div><div class='add'>+	if (unlikely(!ovpn_sock)) {</div><div class='add'>+		net_err_ratelimited("ovpn: %s invoked on non ovpn socket\n",</div><div class='add'>+				    __func__);</div><div class='add'>+		goto drop_noovpn;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ovpn = ovpn_sock-&gt;ovpn;</div><div class='add'>+	if (unlikely(!ovpn)) {</div><div class='add'>+		net_err_ratelimited("ovpn: cannot obtain ovpn object from UDP socket\n");</div><div class='add'>+		goto drop_noovpn;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Make sure the first 4 bytes of the skb data buffer after the UDP</div><div class='add'>+	 * header are accessible.</div><div class='add'>+	 * They are required to fetch the OP code, the key ID and the peer ID.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!pskb_may_pull(skb, sizeof(struct udphdr) +</div><div class='add'>+				    OVPN_OPCODE_SIZE))) {</div><div class='add'>+		net_dbg_ratelimited("%s: packet too small from UDP socket\n",</div><div class='add'>+				    netdev_name(ovpn-&gt;dev));</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	opcode = ovpn_opcode_from_skb(skb, sizeof(struct udphdr));</div><div class='add'>+	if (unlikely(opcode != OVPN_DATA_V2)) {</div><div class='add'>+		/* DATA_V1 is not supported */</div><div class='add'>+		if (opcode == OVPN_DATA_V1)</div><div class='add'>+			goto drop;</div><div class='add'>+</div><div class='add'>+		/* unknown or control packet: let it bubble up to userspace */</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	peer_id = ovpn_peer_id_from_skb(skb, sizeof(struct udphdr));</div><div class='add'>+	/* some OpenVPN server implementations send data packets with the</div><div class='add'>+	 * peer-id set to UNDEF. In this case we skip the peer lookup by peer-id</div><div class='add'>+	 * and we try with the transport address</div><div class='add'>+	 */</div><div class='add'>+	if (peer_id == OVPN_PEER_ID_UNDEF)</div><div class='add'>+		peer = ovpn_peer_get_by_transp_addr(ovpn, skb);</div><div class='add'>+	else</div><div class='add'>+		peer = ovpn_peer_get_by_id(ovpn, peer_id);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!peer))</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	/* pop off outer UDP header */</div><div class='add'>+	__skb_pull(skb, sizeof(struct udphdr));</div><div class='add'>+	ovpn_recv(peer, skb);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+drop:</div><div class='add'>+	dev_dstats_rx_dropped(ovpn-&gt;dev);</div><div class='add'>+drop_noovpn:</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_udp4_output - send IPv4 packet over udp socket</div><div class='add'>+ * @peer: the destination peer</div><div class='add'>+ * @bind: the binding related to the destination peer</div><div class='add'>+ * @cache: dst cache</div><div class='add'>+ * @sk: the socket to send the packet over</div><div class='add'>+ * @skb: the packet to send</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+static int ovpn_udp4_output(struct ovpn_peer *peer, struct ovpn_bind *bind,</div><div class='add'>+			    struct dst_cache *cache, struct sock *sk,</div><div class='add'>+			    struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct rtable *rt;</div><div class='add'>+	struct flowi4 fl = {</div><div class='add'>+		.saddr = bind-&gt;local.ipv4.s_addr,</div><div class='add'>+		.daddr = bind-&gt;remote.in4.sin_addr.s_addr,</div><div class='add'>+		.fl4_sport = inet_sk(sk)-&gt;inet_sport,</div><div class='add'>+		.fl4_dport = bind-&gt;remote.in4.sin_port,</div><div class='add'>+		.flowi4_proto = sk-&gt;sk_protocol,</div><div class='add'>+		.flowi4_mark = sk-&gt;sk_mark,</div><div class='add'>+	};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	local_bh_disable();</div><div class='add'>+	rt = dst_cache_get_ip4(cache, &amp;fl.saddr);</div><div class='add'>+	if (rt)</div><div class='add'>+		goto transmit;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!inet_confirm_addr(sock_net(sk), NULL, 0, fl.saddr,</div><div class='add'>+					RT_SCOPE_HOST))) {</div><div class='add'>+		/* we may end up here when the cached address is not usable</div><div class='add'>+		 * anymore. In this case we reset address/cache and perform a</div><div class='add'>+		 * new look up</div><div class='add'>+		 */</div><div class='add'>+		fl.saddr = 0;</div><div class='add'>+		spin_lock_bh(&amp;peer-&gt;lock);</div><div class='add'>+		bind-&gt;local.ipv4.s_addr = 0;</div><div class='add'>+		spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+		dst_cache_reset(cache);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rt = ip_route_output_flow(sock_net(sk), &amp;fl, sk);</div><div class='add'>+	if (IS_ERR(rt) &amp;&amp; PTR_ERR(rt) == -EINVAL) {</div><div class='add'>+		fl.saddr = 0;</div><div class='add'>+		spin_lock_bh(&amp;peer-&gt;lock);</div><div class='add'>+		bind-&gt;local.ipv4.s_addr = 0;</div><div class='add'>+		spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+		dst_cache_reset(cache);</div><div class='add'>+</div><div class='add'>+		rt = ip_route_output_flow(sock_net(sk), &amp;fl, sk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(rt)) {</div><div class='add'>+		ret = PTR_ERR(rt);</div><div class='add'>+		net_dbg_ratelimited("%s: no route to host %pISpc: %d\n",</div><div class='add'>+				    netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+				    &amp;bind-&gt;remote.in4,</div><div class='add'>+				    ret);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	dst_cache_set_ip4(cache, &amp;rt-&gt;dst, fl.saddr);</div><div class='add'>+</div><div class='add'>+transmit:</div><div class='add'>+	udp_tunnel_xmit_skb(rt, sk, skb, fl.saddr, fl.daddr, 0,</div><div class='add'>+			    ip4_dst_hoplimit(&amp;rt-&gt;dst), 0, fl.fl4_sport,</div><div class='add'>+			    fl.fl4_dport, false, sk-&gt;sk_no_check_tx, 0);</div><div class='add'>+	ret = 0;</div><div class='add'>+err:</div><div class='add'>+	local_bh_enable();</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+/**</div><div class='add'>+ * ovpn_udp6_output - send IPv6 packet over udp socket</div><div class='add'>+ * @peer: the destination peer</div><div class='add'>+ * @bind: the binding related to the destination peer</div><div class='add'>+ * @cache: dst cache</div><div class='add'>+ * @sk: the socket to send the packet over</div><div class='add'>+ * @skb: the packet to send</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+static int ovpn_udp6_output(struct ovpn_peer *peer, struct ovpn_bind *bind,</div><div class='add'>+			    struct dst_cache *cache, struct sock *sk,</div><div class='add'>+			    struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct dst_entry *dst;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	struct flowi6 fl = {</div><div class='add'>+		.saddr = bind-&gt;local.ipv6,</div><div class='add'>+		.daddr = bind-&gt;remote.in6.sin6_addr,</div><div class='add'>+		.fl6_sport = inet_sk(sk)-&gt;inet_sport,</div><div class='add'>+		.fl6_dport = bind-&gt;remote.in6.sin6_port,</div><div class='add'>+		.flowi6_proto = sk-&gt;sk_protocol,</div><div class='add'>+		.flowi6_mark = sk-&gt;sk_mark,</div><div class='add'>+		.flowi6_oif = bind-&gt;remote.in6.sin6_scope_id,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	local_bh_disable();</div><div class='add'>+	dst = dst_cache_get_ip6(cache, &amp;fl.saddr);</div><div class='add'>+	if (dst)</div><div class='add'>+		goto transmit;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!ipv6_chk_addr(sock_net(sk), &amp;fl.saddr, NULL, 0))) {</div><div class='add'>+		/* we may end up here when the cached address is not usable</div><div class='add'>+		 * anymore. In this case we reset address/cache and perform a</div><div class='add'>+		 * new look up</div><div class='add'>+		 */</div><div class='add'>+		fl.saddr = in6addr_any;</div><div class='add'>+		spin_lock_bh(&amp;peer-&gt;lock);</div><div class='add'>+		bind-&gt;local.ipv6 = in6addr_any;</div><div class='add'>+		spin_unlock_bh(&amp;peer-&gt;lock);</div><div class='add'>+		dst_cache_reset(cache);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dst = ipv6_stub-&gt;ipv6_dst_lookup_flow(sock_net(sk), sk, &amp;fl, NULL);</div><div class='add'>+	if (IS_ERR(dst)) {</div><div class='add'>+		ret = PTR_ERR(dst);</div><div class='add'>+		net_dbg_ratelimited("%s: no route to host %pISpc: %d\n",</div><div class='add'>+				    netdev_name(peer-&gt;ovpn-&gt;dev),</div><div class='add'>+				    &amp;bind-&gt;remote.in6, ret);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	dst_cache_set_ip6(cache, dst, &amp;fl.saddr);</div><div class='add'>+</div><div class='add'>+transmit:</div><div class='add'>+	/* user IPv6 packets may be larger than the transport interface</div><div class='add'>+	 * MTU (after encapsulation), however, since they are locally</div><div class='add'>+	 * generated we should ensure they get fragmented.</div><div class='add'>+	 * Setting the ignore_df flag to 1 will instruct ip6_fragment() to</div><div class='add'>+	 * fragment packets if needed.</div><div class='add'>+	 *</div><div class='add'>+	 * NOTE: this is not needed for IPv4 because we pass df=0 to</div><div class='add'>+	 * udp_tunnel_xmit_skb()</div><div class='add'>+	 */</div><div class='add'>+	skb-&gt;ignore_df = 1;</div><div class='add'>+	udp_tunnel6_xmit_skb(dst, sk, skb, skb-&gt;dev, &amp;fl.saddr, &amp;fl.daddr, 0,</div><div class='add'>+			     ip6_dst_hoplimit(dst), 0, fl.fl6_sport,</div><div class='add'>+			     fl.fl6_dport, udp_get_no_check6_tx(sk), 0);</div><div class='add'>+	ret = 0;</div><div class='add'>+err:</div><div class='add'>+	local_bh_enable();</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_udp_output - transmit skb using udp-tunnel</div><div class='add'>+ * @peer: the destination peer</div><div class='add'>+ * @cache: dst cache</div><div class='add'>+ * @sk: the socket to send the packet over</div><div class='add'>+ * @skb: the packet to send</div><div class='add'>+ *</div><div class='add'>+ * rcu_read_lock should be held on entry.</div><div class='add'>+ * On return, the skb is consumed.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+static int ovpn_udp_output(struct ovpn_peer *peer, struct dst_cache *cache,</div><div class='add'>+			   struct sock *sk, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_bind *bind;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* set sk to null if skb is already orphaned */</div><div class='add'>+	if (!skb-&gt;destructor)</div><div class='add'>+		skb-&gt;sk = NULL;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	bind = rcu_dereference(peer-&gt;bind);</div><div class='add'>+	if (unlikely(!bind)) {</div><div class='add'>+		net_warn_ratelimited("%s: no bind for remote peer %u\n",</div><div class='add'>+				     netdev_name(peer-&gt;ovpn-&gt;dev), peer-&gt;id);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (bind-&gt;remote.in4.sin_family) {</div><div class='add'>+	case AF_INET:</div><div class='add'>+		ret = ovpn_udp4_output(peer, bind, cache, sk, skb);</div><div class='add'>+		break;</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	case AF_INET6:</div><div class='add'>+		ret = ovpn_udp6_output(peer, bind, cache, sk, skb);</div><div class='add'>+		break;</div><div class='add'>+#endif</div><div class='add'>+	default:</div><div class='add'>+		ret = -EAFNOSUPPORT;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_udp_send_skb - prepare skb and send it over via UDP</div><div class='add'>+ * @peer: the destination peer</div><div class='add'>+ * @sk: peer socket</div><div class='add'>+ * @skb: the packet to send</div><div class='add'>+ */</div><div class='add'>+void ovpn_udp_send_skb(struct ovpn_peer *peer, struct sock *sk,</div><div class='add'>+		       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	skb-&gt;dev = peer-&gt;ovpn-&gt;dev;</div><div class='add'>+	skb-&gt;mark = READ_ONCE(sk-&gt;sk_mark);</div><div class='add'>+	/* no checksum performed at this layer */</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+</div><div class='add'>+	/* crypto layer -&gt; transport (UDP) */</div><div class='add'>+	ret = ovpn_udp_output(peer, &amp;peer-&gt;dst_cache, sk, skb);</div><div class='add'>+	if (unlikely(ret &lt; 0))</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ovpn_udp_encap_destroy(struct sock *sk)</div><div class='add'>+{</div><div class='add'>+	struct ovpn_socket *sock;</div><div class='add'>+	struct ovpn_priv *ovpn;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (!sock || !sock-&gt;ovpn) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	ovpn = sock-&gt;ovpn;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	ovpn_peers_free(ovpn, sk, OVPN_DEL_PEER_REASON_TRANSPORT_DISCONNECT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_udp_socket_attach - set udp-tunnel CBs on socket and link it to ovpn</div><div class='add'>+ * @ovpn_sock: socket to configure</div><div class='add'>+ * @sock: the socket container to be passed to setup_udp_tunnel_sock()</div><div class='add'>+ * @ovpn: the openvp instance to link</div><div class='add'>+ *</div><div class='add'>+ * After invoking this function, the sock will be controlled by ovpn so that</div><div class='add'>+ * any incoming packet may be processed by ovpn first.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code otherwise</div><div class='add'>+ */</div><div class='add'>+int ovpn_udp_socket_attach(struct ovpn_socket *ovpn_sock, struct socket *sock,</div><div class='add'>+			   struct ovpn_priv *ovpn)</div><div class='add'>+{</div><div class='add'>+	struct udp_tunnel_sock_cfg cfg = {</div><div class='add'>+		.encap_type = UDP_ENCAP_OVPNINUDP,</div><div class='add'>+		.encap_rcv = ovpn_udp_encap_recv,</div><div class='add'>+		.encap_destroy = ovpn_udp_encap_destroy,</div><div class='add'>+	};</div><div class='add'>+	struct ovpn_socket *old_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* make sure no pre-existing encapsulation handler exists */</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	old_data = rcu_dereference_sk_user_data(ovpn_sock-&gt;sk);</div><div class='add'>+	if (!old_data) {</div><div class='add'>+		/* socket is currently unused - we can take it */</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		setup_udp_tunnel_sock(sock_net(ovpn_sock-&gt;sk), sock, &amp;cfg);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* socket is in use. We need to understand if it's owned by this ovpn</div><div class='add'>+	 * instance or by something else.</div><div class='add'>+	 * In the former case, we can increase the refcounter and happily</div><div class='add'>+	 * use it, because the same UDP socket is expected to be shared among</div><div class='add'>+	 * different peers.</div><div class='add'>+	 *</div><div class='add'>+	 * Unlikely TCP, a single UDP socket can be used to talk to many remote</div><div class='add'>+	 * hosts and therefore openvpn instantiates one only for all its peers</div><div class='add'>+	 */</div><div class='add'>+	if ((READ_ONCE(udp_sk(ovpn_sock-&gt;sk)-&gt;encap_type) == UDP_ENCAP_OVPNINUDP) &amp;&amp;</div><div class='add'>+	    old_data-&gt;ovpn == ovpn) {</div><div class='add'>+		netdev_dbg(ovpn-&gt;dev,</div><div class='add'>+			   "provided socket already owned by this interface\n");</div><div class='add'>+		ret = -EALREADY;</div><div class='add'>+	} else {</div><div class='add'>+		netdev_dbg(ovpn-&gt;dev,</div><div class='add'>+			   "provided socket already taken by other user\n");</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ovpn_udp_socket_detach - clean udp-tunnel status for this socket</div><div class='add'>+ * @ovpn_sock: the socket to clean</div><div class='add'>+ */</div><div class='add'>+void ovpn_udp_socket_detach(struct ovpn_socket *ovpn_sock)</div><div class='add'>+{</div><div class='add'>+	struct sock *sk = ovpn_sock-&gt;sk;</div><div class='add'>+</div><div class='add'>+	/* Re-enable multicast loopback */</div><div class='add'>+	inet_set_bit(MC_LOOP, sk);</div><div class='add'>+	/* Disable CHECKSUM_UNNECESSARY to CHECKSUM_COMPLETE conversion */</div><div class='add'>+	inet_dec_convert_csum(sk);</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(udp_sk(sk)-&gt;encap_type, 0);</div><div class='add'>+	WRITE_ONCE(udp_sk(sk)-&gt;encap_rcv, NULL);</div><div class='add'>+	WRITE_ONCE(udp_sk(sk)-&gt;encap_destroy, NULL);</div><div class='add'>+</div><div class='add'>+	rcu_assign_sk_user_data(sk, NULL);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ovpn/udp.h b/drivers/net/ovpn/udp.h<br/>new file mode 100644<br/>index 000000000000..fe26fbe25c5a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ovpn/udp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ovpn/udp.h</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*  OpenVPN data channel offload</div><div class='add'>+ *</div><div class='add'>+ *  Copyright (C) 2019-2025 OpenVPN, Inc.</div><div class='add'>+ *</div><div class='add'>+ *  Author:	Antonio Quartulli &lt;antonio@openvpn.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_OVPN_UDP_H_</div><div class='add'>+#define _NET_OVPN_UDP_H_</div><div class='add'>+</div><div class='add'>+#include &lt;net/sock.h&gt;</div><div class='add'>+</div><div class='add'>+struct ovpn_peer;</div><div class='add'>+struct ovpn_priv;</div><div class='add'>+struct socket;</div><div class='add'>+</div><div class='add'>+int ovpn_udp_socket_attach(struct ovpn_socket *ovpn_sock, struct socket *sock,</div><div class='add'>+			   struct ovpn_priv *ovpn);</div><div class='add'>+void ovpn_udp_socket_detach(struct ovpn_socket *ovpn_sock);</div><div class='add'>+</div><div class='add'>+void ovpn_udp_send_skb(struct ovpn_peer *peer, struct sock *sk,</div><div class='add'>+		       struct sk_buff *skb);</div><div class='add'>+</div><div class='add'>+#endif /* _NET_OVPN_UDP_H_ */</div><div class='head'>diff --git a/drivers/net/pcs/Kconfig b/drivers/net/pcs/Kconfig<br/>index f6aa437473de..ecbc3530e780 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pcs/Kconfig</a></div><div class='hunk'>@@ -26,11 +26,12 @@ config PCS_MTK_LYNXI</div><div class='ctx'> 	  which is part of MediaTek's SoC and Ethernet switch ICs.</div><div class='ctx'> </div><div class='ctx'> config PCS_RZN1_MIIC</div><div class='del'>-	tristate "Renesas RZ/N1 MII converter"</div><div class='del'>-	depends on OF &amp;&amp; (ARCH_RZN1 || COMPILE_TEST)</div><div class='add'>+	tristate "Renesas RZ/N1, RZ/N2H, RZ/T2H MII converter"</div><div class='add'>+	depends on OF</div><div class='add'>+	depends on ARCH_RENESAS || COMPILE_TEST</div><div class='ctx'> 	help</div><div class='del'>-	  This module provides a driver for the MII converter that is available</div><div class='del'>-	  on RZ/N1 SoCs. This PCS converts MII to RMII/RGMII or can be set in</div><div class='del'>-	  pass-through mode for MII.</div><div class='add'>+	  This module provides a driver for the MII converter available on</div><div class='add'>+	  Renesas RZ/N1, RZ/N2H, and RZ/T2H SoCs. This PCS converts MII to</div><div class='add'>+	  RMII/RGMII, or can be set in pass-through mode for MII.</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/net/pcs/pcs-lynx.c b/drivers/net/pcs/pcs-lynx.c<br/>index b79aedad855b..73e1364ad1ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-lynx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-lynx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-lynx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pcs/pcs-lynx.c</a></div><div class='hunk'>@@ -35,6 +35,28 @@ enum sgmii_speed {</div><div class='ctx'> #define phylink_pcs_to_lynx(pl_pcs) container_of((pl_pcs), struct lynx_pcs, pcs)</div><div class='ctx'> #define lynx_to_phylink_pcs(lynx) (&amp;(lynx)-&gt;pcs)</div><div class='ctx'> </div><div class='add'>+static unsigned int lynx_pcs_inband_caps(struct phylink_pcs *pcs,</div><div class='add'>+					 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_QSGMII:</div><div class='add'>+		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_10GBASER:</div><div class='add'>+		return LINK_INBAND_DISABLE;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_10G_QXGMII:</div><div class='add'>+		return LINK_INBAND_ENABLE;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void lynx_pcs_get_state_usxgmii(struct mdio_device *pcs,</div><div class='ctx'> 				       struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='hunk'>@@ -58,42 +80,20 @@ static void lynx_pcs_get_state_usxgmii(struct mdio_device *pcs,</div><div class='ctx'> 	phylink_decode_usxgmii_word(state, lpa);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lynx_pcs_get_state_2500basex(struct mdio_device *pcs,</div><div class='del'>-					 struct phylink_link_state *state)</div><div class='del'>-{</div><div class='del'>-	int bmsr;</div><div class='del'>-</div><div class='del'>-	bmsr = mdiodev_read(pcs, MII_BMSR);</div><div class='del'>-	if (bmsr &lt; 0) {</div><div class='del'>-		state-&gt;link = false;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	state-&gt;link = !!(bmsr &amp; BMSR_LSTATUS);</div><div class='del'>-	state-&gt;an_complete = !!(bmsr &amp; BMSR_ANEGCOMPLETE);</div><div class='del'>-	if (!state-&gt;link)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	state-&gt;speed = SPEED_2500;</div><div class='del'>-	state-&gt;pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;</div><div class='del'>-	state-&gt;duplex = DUPLEX_FULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void lynx_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+static void lynx_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 			       struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);</div><div class='ctx'> </div><div class='ctx'> 	switch (state-&gt;interface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_SGMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_QSGMII:</div><div class='del'>-		phylink_mii_c22_pcs_get_state(lynx-&gt;mdio, state);</div><div class='del'>-		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='del'>-		lynx_pcs_get_state_2500basex(lynx-&gt;mdio, state);</div><div class='add'>+		phylink_mii_c22_pcs_get_state(lynx-&gt;mdio, neg_mode, state);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_10G_QXGMII:</div><div class='ctx'> 		lynx_pcs_get_state_usxgmii(lynx-&gt;mdio, state);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_10GBASER:</div><div class='hunk'>@@ -129,7 +129,8 @@ static int lynx_pcs_config_giga(struct mdio_device *pcs,</div><div class='ctx'> 		mdiodev_write(pcs, LINK_TIMER_HI, link_timer &gt;&gt; 16);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (interface == PHY_INTERFACE_MODE_1000BASEX) {</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_1000BASEX ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_2500BASEX) {</div><div class='ctx'> 		if_mode = 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* SGMII and QSGMII */</div><div class='hunk'>@@ -149,6 +150,7 @@ static int lynx_pcs_config_giga(struct mdio_device *pcs,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lynx_pcs_config_usxgmii(struct mdio_device *pcs,</div><div class='add'>+				   phy_interface_t interface,</div><div class='ctx'> 				   const unsigned long *advertising,</div><div class='ctx'> 				   unsigned int neg_mode)</div><div class='ctx'> {</div><div class='hunk'>@@ -156,7 +158,8 @@ static int lynx_pcs_config_usxgmii(struct mdio_device *pcs,</div><div class='ctx'> 	int addr = pcs-&gt;addr;</div><div class='ctx'> </div><div class='ctx'> 	if (neg_mode != PHYLINK_PCS_NEG_INBAND_ENABLED) {</div><div class='del'>-		dev_err(&amp;pcs-&gt;dev, "USXGMII only supports in-band AN for now\n");</div><div class='add'>+		dev_err(&amp;pcs-&gt;dev, "%s only supports in-band AN for now\n",</div><div class='add'>+			phy_modes(interface));</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -177,17 +180,12 @@ static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_SGMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_QSGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='ctx'> 		return lynx_pcs_config_giga(lynx-&gt;mdio, ifmode, advertising,</div><div class='ctx'> 					    neg_mode);</div><div class='del'>-	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='del'>-		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {</div><div class='del'>-			dev_err(&amp;lynx-&gt;mdio-&gt;dev,</div><div class='del'>-				"AN not supported on 3.125GHz SerDes lane\n");</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_USXGMII:</div><div class='del'>-		return lynx_pcs_config_usxgmii(lynx-&gt;mdio, advertising,</div><div class='add'>+	case PHY_INTERFACE_MODE_10G_QXGMII:</div><div class='add'>+		return lynx_pcs_config_usxgmii(lynx-&gt;mdio, ifmode, advertising,</div><div class='ctx'> 					       neg_mode);</div><div class='ctx'> 	case PHY_INTERFACE_MODE_10GBASER:</div><div class='ctx'> 		/* Nothing to do here for 10GBASER */</div><div class='hunk'>@@ -245,42 +243,6 @@ static void lynx_pcs_link_up_sgmii(struct mdio_device *pcs,</div><div class='ctx'> 		       if_mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* 2500Base-X is SerDes protocol 7 on Felix and 6 on ENETC. It is a SerDes lane</div><div class='del'>- * clocked at 3.125 GHz which encodes symbols with 8b/10b and does not have</div><div class='del'>- * auto-negotiation of any link parameters. Electrically it is compatible with</div><div class='del'>- * a single lane of XAUI.</div><div class='del'>- * The hardware reference manual wants to call this mode SGMII, but it isn't</div><div class='del'>- * really, since the fundamental features of SGMII:</div><div class='del'>- * - Downgrading the link speed by duplicating symbols</div><div class='del'>- * - Auto-negotiation</div><div class='del'>- * are not there.</div><div class='del'>- * The speed is configured at 1000 in the IF_MODE because the clock frequency</div><div class='del'>- * is actually given by a PLL configured in the Reset Configuration Word (RCW).</div><div class='del'>- * Since there is no difference between fixed speed SGMII w/o AN and 802.3z w/o</div><div class='del'>- * AN, we call this PHY interface type 2500Base-X. In case a PHY negotiates a</div><div class='del'>- * lower link speed on line side, the system-side interface remains fixed at</div><div class='del'>- * 2500 Mbps and we do rate adaptation through pause frames.</div><div class='del'>- */</div><div class='del'>-static void lynx_pcs_link_up_2500basex(struct mdio_device *pcs,</div><div class='del'>-				       unsigned int neg_mode,</div><div class='del'>-				       int speed, int duplex)</div><div class='del'>-{</div><div class='del'>-	u16 if_mode = 0;</div><div class='del'>-</div><div class='del'>-	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {</div><div class='del'>-		dev_err(&amp;pcs-&gt;dev, "AN not supported for 2500BaseX\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (duplex == DUPLEX_HALF)</div><div class='del'>-		if_mode |= IF_MODE_HALF_DUPLEX;</div><div class='del'>-	if_mode |= IF_MODE_SPEED(SGMII_SPEED_2500);</div><div class='del'>-</div><div class='del'>-	mdiodev_modify(pcs, IF_MODE,</div><div class='del'>-		       IF_MODE_HALF_DUPLEX | IF_MODE_SPEED_MSK,</div><div class='del'>-		       if_mode);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void lynx_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 			     phy_interface_t interface,</div><div class='ctx'> 			     int speed, int duplex)</div><div class='hunk'>@@ -292,10 +254,8 @@ static void lynx_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 	case PHY_INTERFACE_MODE_QSGMII:</div><div class='ctx'> 		lynx_pcs_link_up_sgmii(lynx-&gt;mdio, neg_mode, speed, duplex);</div><div class='ctx'> 		break;</div><div class='del'>-	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='del'>-		lynx_pcs_link_up_2500basex(lynx-&gt;mdio, neg_mode, speed, duplex);</div><div class='del'>-		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_10G_QXGMII:</div><div class='ctx'> 		/* At the moment, only in-band AN is supported for USXGMII</div><div class='ctx'> 		 * so nothing to do in link_up</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -306,15 +266,27 @@ static void lynx_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_pcs_ops lynx_pcs_phylink_ops = {</div><div class='add'>+	.pcs_inband_caps = lynx_pcs_inband_caps,</div><div class='ctx'> 	.pcs_get_state = lynx_pcs_get_state,</div><div class='ctx'> 	.pcs_config = lynx_pcs_config,</div><div class='ctx'> 	.pcs_an_restart = lynx_pcs_an_restart,</div><div class='ctx'> 	.pcs_link_up = lynx_pcs_link_up,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const phy_interface_t lynx_interfaces[] = {</div><div class='add'>+	PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+	PHY_INTERFACE_MODE_QSGMII,</div><div class='add'>+	PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+	PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+	PHY_INTERFACE_MODE_10GBASER,</div><div class='add'>+	PHY_INTERFACE_MODE_USXGMII,</div><div class='add'>+	PHY_INTERFACE_MODE_10G_QXGMII,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct phylink_pcs *lynx_pcs_create(struct mdio_device *mdio)</div><div class='ctx'> {</div><div class='ctx'> 	struct lynx_pcs *lynx;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	lynx = kzalloc(sizeof(*lynx), GFP_KERNEL);</div><div class='ctx'> 	if (!lynx)</div><div class='hunk'>@@ -323,9 +295,11 @@ static struct phylink_pcs *lynx_pcs_create(struct mdio_device *mdio)</div><div class='ctx'> 	mdio_device_get(mdio);</div><div class='ctx'> 	lynx-&gt;mdio = mdio;</div><div class='ctx'> 	lynx-&gt;pcs.ops = &amp;lynx_pcs_phylink_ops;</div><div class='del'>-	lynx-&gt;pcs.neg_mode = true;</div><div class='ctx'> 	lynx-&gt;pcs.poll = true;</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(lynx_interfaces); i++)</div><div class='add'>+		__set_bit(lynx_interfaces[i], lynx-&gt;pcs.supported_interfaces);</div><div class='add'>+</div><div class='ctx'> 	return lynx_to_phylink_pcs(lynx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/pcs/pcs-mtk-lynxi.c b/drivers/net/pcs/pcs-mtk-lynxi.c<br/>index 4f63abe638c4..149ddf51d785 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-mtk-lynxi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-mtk-lynxi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-mtk-lynxi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pcs/pcs-mtk-lynxi.c</a></div><div class='hunk'>@@ -88,7 +88,24 @@ static struct mtk_pcs_lynxi *pcs_to_mtk_pcs_lynxi(struct phylink_pcs *pcs)</div><div class='ctx'> 	return container_of(pcs, struct mtk_pcs_lynxi, pcs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int mtk_pcs_lynxi_inband_caps(struct phylink_pcs *pcs,</div><div class='add'>+					      phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		return LINK_INBAND_DISABLE;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void mtk_pcs_lynxi_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				    unsigned int neg_mode,</div><div class='ctx'> 				    struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_pcs_lynxi *mpcs = pcs_to_mtk_pcs_lynxi(pcs);</div><div class='hunk'>@@ -98,7 +115,8 @@ static void mtk_pcs_lynxi_get_state(struct phylink_pcs *pcs,</div><div class='ctx'> 	regmap_read(mpcs-&gt;regmap, SGMSYS_PCS_CONTROL_1, &amp;bm);</div><div class='ctx'> 	regmap_read(mpcs-&gt;regmap, SGMSYS_PCS_ADVERTISE, &amp;adv);</div><div class='ctx'> </div><div class='del'>-	phylink_mii_c22_pcs_decode_state(state, FIELD_GET(SGMII_BMSR, bm),</div><div class='add'>+	phylink_mii_c22_pcs_decode_state(state, neg_mode,</div><div class='add'>+					 FIELD_GET(SGMII_BMSR, bm),</div><div class='ctx'> 					 FIELD_GET(SGMII_LPA, adv));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -241,6 +259,7 @@ static void mtk_pcs_lynxi_disable(struct phylink_pcs *pcs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_pcs_ops mtk_pcs_lynxi_ops = {</div><div class='add'>+	.pcs_inband_caps = mtk_pcs_lynxi_inband_caps,</div><div class='ctx'> 	.pcs_get_state = mtk_pcs_lynxi_get_state,</div><div class='ctx'> 	.pcs_config = mtk_pcs_lynxi_config,</div><div class='ctx'> 	.pcs_an_restart = mtk_pcs_lynxi_restart_an,</div><div class='hunk'>@@ -286,10 +305,13 @@ struct phylink_pcs *mtk_pcs_lynxi_create(struct device *dev,</div><div class='ctx'> 	mpcs-&gt;regmap = regmap;</div><div class='ctx'> 	mpcs-&gt;flags = flags;</div><div class='ctx'> 	mpcs-&gt;pcs.ops = &amp;mtk_pcs_lynxi_ops;</div><div class='del'>-	mpcs-&gt;pcs.neg_mode = true;</div><div class='ctx'> 	mpcs-&gt;pcs.poll = true;</div><div class='ctx'> 	mpcs-&gt;interface = PHY_INTERFACE_MODE_NA;</div><div class='ctx'> </div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_SGMII, mpcs-&gt;pcs.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_1000BASEX, mpcs-&gt;pcs.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_2500BASEX, mpcs-&gt;pcs.supported_interfaces);</div><div class='add'>+</div><div class='ctx'> 	return &amp;mpcs-&gt;pcs;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mtk_pcs_lynxi_create);</div><div class='head'>diff --git a/drivers/net/pcs/pcs-rzn1-miic.c b/drivers/net/pcs/pcs-rzn1-miic.c<br/>index 61944574d087..885f17c32643 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-rzn1-miic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-rzn1-miic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-rzn1-miic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pcs/pcs-rzn1-miic.c</a></div><div class='hunk'>@@ -5,8 +5,12 @@</div><div class='ctx'>  * Clément Léger &lt;clement.leger@bootlin.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/array_size.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/device/devres.h&gt;</div><div class='ctx'> #include &lt;linux/mdio.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='hunk'>@@ -14,13 +18,15 @@</div><div class='ctx'> #include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/net/pcs-rzn1-miic.h&gt;</div><div class='add'>+#include &lt;dt-bindings/net/renesas,r9a09g077-pcs-miic.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define MIIC_PRCMD			0x0</div><div class='ctx'> #define MIIC_ESID_CODE			0x4</div><div class='ctx'> </div><div class='del'>-#define MIIC_MODCTRL			0x20</div><div class='del'>-#define MIIC_MODCTRL_SW_MODE		GENMASK(4, 0)</div><div class='add'>+#define MIIC_MODCTRL			0x8</div><div class='ctx'> </div><div class='ctx'> #define MIIC_CONVCTRL(port)		(0x100 + (port) * 4)</div><div class='ctx'> </div><div class='hunk'>@@ -46,21 +52,23 @@</div><div class='ctx'> #define MIIC_SWCTRL			0x304</div><div class='ctx'> #define MIIC_SWDUPC			0x308</div><div class='ctx'> </div><div class='del'>-#define MIIC_MAX_NR_PORTS		5</div><div class='del'>-</div><div class='del'>-#define MIIC_MODCTRL_CONF_CONV_NUM	6</div><div class='add'>+#define MIIC_MODCTRL_CONF_CONV_MAX	6</div><div class='ctx'> #define MIIC_MODCTRL_CONF_NONE		-1</div><div class='ctx'> </div><div class='add'>+#define MIIC_MAX_NUM_RSTS		2</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct modctrl_match - Matching table entry for  convctrl configuration</div><div class='ctx'>  *			  See section 8.2.1 of manual.</div><div class='ctx'>  * @mode_cfg: Configuration value for convctrl</div><div class='ctx'>  * @conv: Configuration of ethernet port muxes. First index is SWITCH_PORTIN,</div><div class='del'>- *	  then index 1 - 5 are CONV1 - CONV5.</div><div class='add'>+ *	  then index 1 - 5 are CONV1 - CONV5 for RZ/N1 SoCs. In case</div><div class='add'>+ *	  of RZ/T2H and RZ/N2H SoCs, the first index is SWITCH_PORTIN then</div><div class='add'>+ *	  index 0 - 3 are CONV0 - CONV3.</div><div class='ctx'>  */</div><div class='ctx'> struct modctrl_match {</div><div class='ctx'> 	u32 mode_cfg;</div><div class='del'>-	u8 conv[MIIC_MODCTRL_CONF_CONV_NUM];</div><div class='add'>+	u8 conv[MIIC_MODCTRL_CONF_CONV_MAX];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct modctrl_match modctrl_match_table[] = {</div><div class='hunk'>@@ -109,7 +117,7 @@ static const char * const conf_to_string[] = {</div><div class='ctx'> 	[MIIC_HSR_PORTB]	= "HSR_PORTB",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char *index_to_string[MIIC_MODCTRL_CONF_CONV_NUM] = {</div><div class='add'>+static const char * const index_to_string[] = {</div><div class='ctx'> 	"SWITCH_PORTIN",</div><div class='ctx'> 	"CONV1",</div><div class='ctx'> 	"CONV2",</div><div class='hunk'>@@ -118,16 +126,106 @@ static const char *index_to_string[MIIC_MODCTRL_CONF_CONV_NUM] = {</div><div class='ctx'> 	"CONV5",</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct modctrl_match rzt2h_modctrl_match_table[] = {</div><div class='add'>+	{0x0, {ETHSS_GMAC0_PORT, ETHSS_ETHSW_PORT0, ETHSS_ETHSW_PORT1,</div><div class='add'>+	       ETHSS_ETHSW_PORT2, ETHSS_GMAC1_PORT}},</div><div class='add'>+</div><div class='add'>+	{0x1, {MIIC_MODCTRL_CONF_NONE, ETHSS_ESC_PORT0, ETHSS_ESC_PORT1,</div><div class='add'>+	       ETHSS_GMAC2_PORT, ETHSS_GMAC1_PORT}},</div><div class='add'>+</div><div class='add'>+	{0x2, {ETHSS_GMAC0_PORT, ETHSS_ESC_PORT0, ETHSS_ESC_PORT1,</div><div class='add'>+		ETHSS_ETHSW_PORT2, ETHSS_GMAC1_PORT}},</div><div class='add'>+</div><div class='add'>+	{0x3, {MIIC_MODCTRL_CONF_NONE, ETHSS_ESC_PORT0, ETHSS_ESC_PORT1,</div><div class='add'>+	       ETHSS_ESC_PORT2, ETHSS_GMAC1_PORT}},</div><div class='add'>+</div><div class='add'>+	{0x4, {ETHSS_GMAC0_PORT, ETHSS_ETHSW_PORT0, ETHSS_ESC_PORT1,</div><div class='add'>+	       ETHSS_ESC_PORT2, ETHSS_GMAC1_PORT}},</div><div class='add'>+</div><div class='add'>+	{0x5, {ETHSS_GMAC0_PORT, ETHSS_ETHSW_PORT0, ETHSS_ESC_PORT1,</div><div class='add'>+	       ETHSS_ETHSW_PORT2, ETHSS_GMAC1_PORT}},</div><div class='add'>+</div><div class='add'>+	{0x6, {ETHSS_GMAC0_PORT, ETHSS_ETHSW_PORT0, ETHSS_ETHSW_PORT1,</div><div class='add'>+	       ETHSS_GMAC2_PORT, ETHSS_GMAC1_PORT}},</div><div class='add'>+</div><div class='add'>+	{0x7, {MIIC_MODCTRL_CONF_NONE, ETHSS_GMAC0_PORT, ETHSS_GMAC1_PORT,</div><div class='add'>+		ETHSS_GMAC2_PORT, MIIC_MODCTRL_CONF_NONE}}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const rzt2h_conf_to_string[] = {</div><div class='add'>+	[ETHSS_GMAC0_PORT]	= "GMAC0_PORT",</div><div class='add'>+	[ETHSS_GMAC1_PORT]	= "GMAC1_PORT",</div><div class='add'>+	[ETHSS_GMAC2_PORT]	= "GMAC2_PORT",</div><div class='add'>+	[ETHSS_ESC_PORT0]	= "ETHERCAT_PORT0",</div><div class='add'>+	[ETHSS_ESC_PORT1]	= "ETHERCAT_PORT1",</div><div class='add'>+	[ETHSS_ESC_PORT2]	= "ETHERCAT_PORT2",</div><div class='add'>+	[ETHSS_ETHSW_PORT0]	= "SWITCH_PORT0",</div><div class='add'>+	[ETHSS_ETHSW_PORT1]	= "SWITCH_PORT1",</div><div class='add'>+	[ETHSS_ETHSW_PORT2]	= "SWITCH_PORT2",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const rzt2h_index_to_string[] = {</div><div class='add'>+	"SWITCH_PORTIN",</div><div class='add'>+	"CONV0",</div><div class='add'>+	"CONV1",</div><div class='add'>+	"CONV2",</div><div class='add'>+	"CONV3",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const rzt2h_reset_ids[] = {</div><div class='add'>+	"rst",</div><div class='add'>+	"crst",</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct miic - MII converter structure</div><div class='ctx'>  * @base: base address of the MII converter</div><div class='ctx'>  * @dev: Device associated to the MII converter</div><div class='ctx'>  * @lock: Lock used for read-modify-write access</div><div class='add'>+ * @rsts: Reset controls for the MII converter</div><div class='add'>+ * @of_data: Pointer to OF data</div><div class='ctx'>  */</div><div class='ctx'> struct miic {</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	spinlock_t lock;</div><div class='add'>+	struct reset_control_bulk_data rsts[MIIC_MAX_NUM_RSTS];</div><div class='add'>+	const struct miic_of_data *of_data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct miic_of_data - OF data for MII converter</div><div class='add'>+ * @match_table: Matching table for convctrl configuration</div><div class='add'>+ * @match_table_count: Number of entries in the matching table</div><div class='add'>+ * @conf_conv_count: Number of entries in the conf_conv array</div><div class='add'>+ * @conf_to_string: String representations of the configuration values</div><div class='add'>+ * @conf_to_string_count: Number of entries in the conf_to_string array</div><div class='add'>+ * @index_to_string: String representations of the index values</div><div class='add'>+ * @index_to_string_count: Number of entries in the index_to_string array</div><div class='add'>+ * @miic_port_start: MIIC port start number</div><div class='add'>+ * @miic_port_max: Maximum MIIC supported</div><div class='add'>+ * @sw_mode_mask: Switch mode mask</div><div class='add'>+ * @reset_ids: Reset names array</div><div class='add'>+ * @reset_count: Number of entries in the reset_ids array</div><div class='add'>+ * @init_unlock_lock_regs: Flag to indicate if registers need to be unlocked</div><div class='add'>+ *  before access.</div><div class='add'>+ * @miic_write: Function pointer to write a value to a MIIC register</div><div class='add'>+ */</div><div class='add'>+struct miic_of_data {</div><div class='add'>+	struct modctrl_match *match_table;</div><div class='add'>+	u8 match_table_count;</div><div class='add'>+	u8 conf_conv_count;</div><div class='add'>+	const char * const *conf_to_string;</div><div class='add'>+	u8 conf_to_string_count;</div><div class='add'>+	const char * const *index_to_string;</div><div class='add'>+	u8 index_to_string_count;</div><div class='add'>+	u8 miic_port_start;</div><div class='add'>+	u8 miic_port_max;</div><div class='add'>+	u8 sw_mode_mask;</div><div class='add'>+	const char * const *reset_ids;</div><div class='add'>+	u8 reset_count;</div><div class='add'>+	bool init_unlock_lock_regs;</div><div class='add'>+	void (*miic_write)(struct miic *miic, int offset, u32 value);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -149,9 +247,36 @@ static struct miic_port *phylink_pcs_to_miic_port(struct phylink_pcs *pcs)</div><div class='ctx'> 	return container_of(pcs, struct miic_port, pcs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void miic_reg_writel(struct miic *miic, int offset, u32 value)</div><div class='add'>+static void miic_unlock_regs(struct miic *miic)</div><div class='add'>+{</div><div class='add'>+	/* Unprotect register writes */</div><div class='add'>+	writel(0x00A5, miic-&gt;base + MIIC_PRCMD);</div><div class='add'>+	writel(0x0001, miic-&gt;base + MIIC_PRCMD);</div><div class='add'>+	writel(0xFFFE, miic-&gt;base + MIIC_PRCMD);</div><div class='add'>+	writel(0x0001, miic-&gt;base + MIIC_PRCMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void miic_lock_regs(struct miic *miic)</div><div class='add'>+{</div><div class='add'>+	/* Protect register writes */</div><div class='add'>+	writel(0x0000, miic-&gt;base + MIIC_PRCMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void miic_reg_writel_unlocked(struct miic *miic, int offset, u32 value)</div><div class='add'>+{</div><div class='add'>+	writel(value, miic-&gt;base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void miic_reg_writel_locked(struct miic *miic, int offset, u32 value)</div><div class='ctx'> {</div><div class='add'>+	miic_unlock_regs(miic);</div><div class='ctx'> 	writel(value, miic-&gt;base + offset);</div><div class='add'>+	miic_lock_regs(miic);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void miic_reg_writel(struct miic *miic, int offset, u32 value)</div><div class='add'>+{</div><div class='add'>+	miic-&gt;of_data-&gt;miic_write(miic, offset, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 miic_reg_readl(struct miic *miic, int offset)</div><div class='hunk'>@@ -268,17 +393,6 @@ static void miic_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 		     (MIIC_CONVCTRL_CONV_SPEED | MIIC_CONVCTRL_FULLD), val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int miic_validate(struct phylink_pcs *pcs, unsigned long *supported,</div><div class='del'>-			 const struct phylink_link_state *state)</div><div class='del'>-{</div><div class='del'>-	if (phy_interface_mode_is_rgmii(state-&gt;interface) ||</div><div class='del'>-	    state-&gt;interface == PHY_INTERFACE_MODE_RMII ||</div><div class='del'>-	    state-&gt;interface == PHY_INTERFACE_MODE_MII)</div><div class='del'>-		return 1;</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int miic_pre_init(struct phylink_pcs *pcs)</div><div class='ctx'> {</div><div class='ctx'> 	struct miic_port *miic_port = phylink_pcs_to_miic_port(pcs);</div><div class='hunk'>@@ -307,7 +421,6 @@ static int miic_pre_init(struct phylink_pcs *pcs)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_pcs_ops miic_phylink_ops = {</div><div class='del'>-	.pcs_validate = miic_validate,</div><div class='ctx'> 	.pcs_config = miic_config,</div><div class='ctx'> 	.pcs_link_up = miic_link_up,</div><div class='ctx'> 	.pcs_pre_init = miic_pre_init,</div><div class='hunk'>@@ -315,6 +428,7 @@ static const struct phylink_pcs_ops miic_phylink_ops = {</div><div class='ctx'> </div><div class='ctx'> struct phylink_pcs *miic_create(struct device *dev, struct device_node *np)</div><div class='ctx'> {</div><div class='add'>+	const struct miic_of_data *of_data;</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	struct miic_port *miic_port;</div><div class='ctx'> 	struct device_node *pcs_np;</div><div class='hunk'>@@ -327,9 +441,6 @@ struct phylink_pcs *miic_create(struct device *dev, struct device_node *np)</div><div class='ctx'> 	if (of_property_read_u32(np, "reg", &amp;port))</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> </div><div class='del'>-	if (port &gt; MIIC_MAX_NR_PORTS || port &lt; 1)</div><div class='del'>-		return ERR_PTR(-EINVAL);</div><div class='del'>-</div><div class='ctx'> 	/* The PCS pdev is attached to the parent node */</div><div class='ctx'> 	pcs_np = of_get_parent(np);</div><div class='ctx'> 	if (!pcs_np)</div><div class='hunk'>@@ -348,20 +459,29 @@ struct phylink_pcs *miic_create(struct device *dev, struct device_node *np)</div><div class='ctx'> 		return ERR_PTR(-EPROBE_DEFER);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	miic = platform_get_drvdata(pdev);</div><div class='add'>+	of_data = miic-&gt;of_data;</div><div class='add'>+	if (port &gt; of_data-&gt;miic_port_max || port &lt; of_data-&gt;miic_port_start) {</div><div class='add'>+		put_device(&amp;pdev-&gt;dev);</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	miic_port = kzalloc(sizeof(*miic_port), GFP_KERNEL);</div><div class='ctx'> 	if (!miic_port) {</div><div class='ctx'> 		put_device(&amp;pdev-&gt;dev);</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	miic = platform_get_drvdata(pdev);</div><div class='ctx'> 	device_link_add(dev, miic-&gt;dev, DL_FLAG_AUTOREMOVE_CONSUMER);</div><div class='ctx'> 	put_device(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	miic_port-&gt;miic = miic;</div><div class='del'>-	miic_port-&gt;port = port - 1;</div><div class='add'>+	miic_port-&gt;port = port - of_data-&gt;miic_port_start;</div><div class='ctx'> 	miic_port-&gt;pcs.ops = &amp;miic_phylink_ops;</div><div class='del'>-	miic_port-&gt;pcs.neg_mode = true;</div><div class='add'>+</div><div class='add'>+	phy_interface_set_rgmii(miic_port-&gt;pcs.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_RMII, miic_port-&gt;pcs.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_MII, miic_port-&gt;pcs.supported_interfaces);</div><div class='ctx'> </div><div class='ctx'> 	return &amp;miic_port-&gt;pcs;</div><div class='ctx'> }</div><div class='hunk'>@@ -378,21 +498,23 @@ EXPORT_SYMBOL(miic_destroy);</div><div class='ctx'> </div><div class='ctx'> static int miic_init_hw(struct miic *miic, u32 cfg_mode)</div><div class='ctx'> {</div><div class='add'>+	u8 sw_mode_mask = miic-&gt;of_data-&gt;sw_mode_mask;</div><div class='ctx'> 	int port;</div><div class='ctx'> </div><div class='ctx'> 	/* Unlock write access to accessory registers (cf datasheet). If this</div><div class='ctx'> 	 * is going to be used in conjunction with the Cortex-M3, this sequence</div><div class='ctx'> 	 * will have to be moved in register write</div><div class='ctx'> 	 */</div><div class='del'>-	miic_reg_writel(miic, MIIC_PRCMD, 0x00A5);</div><div class='del'>-	miic_reg_writel(miic, MIIC_PRCMD, 0x0001);</div><div class='del'>-	miic_reg_writel(miic, MIIC_PRCMD, 0xFFFE);</div><div class='del'>-	miic_reg_writel(miic, MIIC_PRCMD, 0x0001);</div><div class='add'>+	if (miic-&gt;of_data-&gt;init_unlock_lock_regs)</div><div class='add'>+		miic_unlock_regs(miic);</div><div class='ctx'> </div><div class='add'>+	/* TODO: Replace with FIELD_PREP() when compile-time constant</div><div class='add'>+	 * restriction is lifted. Currently __ffs() returns 0 for sw_mode_mask.</div><div class='add'>+	 */</div><div class='ctx'> 	miic_reg_writel(miic, MIIC_MODCTRL,</div><div class='del'>-			FIELD_PREP(MIIC_MODCTRL_SW_MODE, cfg_mode));</div><div class='add'>+			((cfg_mode &lt;&lt; __ffs(sw_mode_mask)) &amp; sw_mode_mask));</div><div class='ctx'> </div><div class='del'>-	for (port = 0; port &lt; MIIC_MAX_NR_PORTS; port++) {</div><div class='add'>+	for (port = 0; port &lt; miic-&gt;of_data-&gt;miic_port_max; port++) {</div><div class='ctx'> 		miic_converter_enable(miic, port, 0);</div><div class='ctx'> 		/* Disable speed/duplex control from these registers, datasheet</div><div class='ctx'> 		 * says switch registers should be used to setup switch port</div><div class='hunk'>@@ -405,12 +527,11 @@ static int miic_init_hw(struct miic *miic, u32 cfg_mode)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool miic_modctrl_match(s8 table_val[MIIC_MODCTRL_CONF_CONV_NUM],</div><div class='del'>-			       s8 dt_val[MIIC_MODCTRL_CONF_CONV_NUM])</div><div class='add'>+static bool miic_modctrl_match(s8 *table_val, s8 *dt_val, u8 count)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MIIC_MODCTRL_CONF_CONV_NUM; i++) {</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='ctx'> 		if (dt_val[i] == MIIC_MODCTRL_CONF_NONE)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -421,69 +542,119 @@ static bool miic_modctrl_match(s8 table_val[MIIC_MODCTRL_CONF_CONV_NUM],</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void miic_dump_conf(struct device *dev,</div><div class='del'>-			   s8 conf[MIIC_MODCTRL_CONF_CONV_NUM])</div><div class='add'>+static void miic_dump_conf(struct miic *miic, s8 *conf)</div><div class='ctx'> {</div><div class='add'>+	const struct miic_of_data *of_data = miic-&gt;of_data;</div><div class='ctx'> 	const char *conf_name;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; MIIC_MODCTRL_CONF_CONV_NUM; i++) {</div><div class='add'>+	for (i = 0; i &lt; of_data-&gt;conf_conv_count; i++) {</div><div class='ctx'> 		if (conf[i] != MIIC_MODCTRL_CONF_NONE)</div><div class='del'>-			conf_name = conf_to_string[conf[i]];</div><div class='add'>+			conf_name = of_data-&gt;conf_to_string[conf[i]];</div><div class='ctx'> 		else</div><div class='ctx'> 			conf_name = "NONE";</div><div class='ctx'> </div><div class='del'>-		dev_err(dev, "%s: %s\n", index_to_string[i], conf_name);</div><div class='add'>+		dev_err(miic-&gt;dev, "%s: %s\n",</div><div class='add'>+			of_data-&gt;index_to_string[i], conf_name);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int miic_match_dt_conf(struct device *dev,</div><div class='del'>-			      s8 dt_val[MIIC_MODCTRL_CONF_CONV_NUM],</div><div class='del'>-			      u32 *mode_cfg)</div><div class='add'>+static int miic_match_dt_conf(struct miic *miic, s8 *dt_val, u32 *mode_cfg)</div><div class='ctx'> {</div><div class='add'>+	const struct miic_of_data *of_data = miic-&gt;of_data;</div><div class='ctx'> 	struct modctrl_match *table_entry;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(modctrl_match_table); i++) {</div><div class='del'>-		table_entry = &amp;modctrl_match_table[i];</div><div class='add'>+	for (i = 0; i &lt; of_data-&gt;match_table_count; i++) {</div><div class='add'>+		table_entry = &amp;of_data-&gt;match_table[i];</div><div class='ctx'> </div><div class='del'>-		if (miic_modctrl_match(table_entry-&gt;conv, dt_val)) {</div><div class='add'>+		if (miic_modctrl_match(table_entry-&gt;conv, dt_val,</div><div class='add'>+				       miic-&gt;of_data-&gt;conf_conv_count)) {</div><div class='ctx'> 			*mode_cfg = table_entry-&gt;mode_cfg;</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_err(dev, "Failed to apply requested configuration\n");</div><div class='del'>-	miic_dump_conf(dev, dt_val);</div><div class='add'>+	dev_err(miic-&gt;dev, "Failed to apply requested configuration\n");</div><div class='add'>+	miic_dump_conf(miic, dt_val);</div><div class='ctx'> </div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int miic_parse_dt(struct device *dev, u32 *mode_cfg)</div><div class='add'>+static int miic_parse_dt(struct miic *miic, u32 *mode_cfg)</div><div class='ctx'> {</div><div class='del'>-	s8 dt_val[MIIC_MODCTRL_CONF_CONV_NUM];</div><div class='del'>-	struct device_node *np = dev-&gt;of_node;</div><div class='add'>+	struct device_node *np = miic-&gt;dev-&gt;of_node;</div><div class='ctx'> 	struct device_node *conv;</div><div class='add'>+	int port, ret;</div><div class='add'>+	s8 *dt_val;</div><div class='ctx'> 	u32 conf;</div><div class='del'>-	int port;</div><div class='ctx'> </div><div class='del'>-	memset(dt_val, MIIC_MODCTRL_CONF_NONE, sizeof(dt_val));</div><div class='add'>+	dt_val = kmalloc_array(miic-&gt;of_data-&gt;conf_conv_count,</div><div class='add'>+			       sizeof(*dt_val), GFP_KERNEL);</div><div class='add'>+	if (!dt_val)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	memset(dt_val, MIIC_MODCTRL_CONF_NONE, sizeof(*dt_val));</div><div class='ctx'> </div><div class='ctx'> 	if (of_property_read_u32(np, "renesas,miic-switch-portin", &amp;conf) == 0)</div><div class='ctx'> 		dt_val[0] = conf;</div><div class='ctx'> </div><div class='del'>-	for_each_child_of_node(np, conv) {</div><div class='add'>+	for_each_available_child_of_node(np, conv) {</div><div class='ctx'> 		if (of_property_read_u32(conv, "reg", &amp;port))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (!of_device_is_available(conv))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='add'>+		/* Adjust for 0 based index */</div><div class='add'>+		port += !miic-&gt;of_data-&gt;miic_port_start;</div><div class='ctx'> 		if (of_property_read_u32(conv, "renesas,miic-input", &amp;conf) == 0)</div><div class='ctx'> 			dt_val[port] = conf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return miic_match_dt_conf(dev, dt_val, mode_cfg);</div><div class='add'>+	ret = miic_match_dt_conf(miic, dt_val, mode_cfg);</div><div class='add'>+	kfree(dt_val);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void miic_reset_control_bulk_assert(void *data)</div><div class='add'>+{</div><div class='add'>+	struct miic *miic = data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = reset_control_bulk_assert(miic-&gt;of_data-&gt;reset_count, miic-&gt;rsts);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(miic-&gt;dev, "failed to assert reset lines\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int miic_reset_control_init(struct miic *miic)</div><div class='add'>+{</div><div class='add'>+	const struct miic_of_data *of_data = miic-&gt;of_data;</div><div class='add'>+	struct device *dev = miic-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (!of_data-&gt;reset_count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; of_data-&gt;reset_count; i++)</div><div class='add'>+		miic-&gt;rsts[i].id = of_data-&gt;reset_ids[i];</div><div class='add'>+</div><div class='add'>+	ret = devm_reset_control_bulk_get_exclusive(dev, of_data-&gt;reset_count,</div><div class='add'>+						    miic-&gt;rsts);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret,</div><div class='add'>+				     "failed to get bulk reset lines\n");</div><div class='add'>+</div><div class='add'>+	ret = reset_control_bulk_deassert(of_data-&gt;reset_count, miic-&gt;rsts);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret,</div><div class='add'>+				     "failed to deassert reset lines\n");</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, miic_reset_control_bulk_assert,</div><div class='add'>+				       miic);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "failed to add reset action\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int miic_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -493,20 +664,26 @@ static int miic_probe(struct platform_device *pdev)</div><div class='ctx'> 	u32 mode_cfg;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = miic_parse_dt(dev, &amp;mode_cfg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	miic = devm_kzalloc(dev, sizeof(*miic), GFP_KERNEL);</div><div class='ctx'> 	if (!miic)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;miic-&gt;lock);</div><div class='add'>+	miic-&gt;of_data = of_device_get_match_data(dev);</div><div class='ctx'> 	miic-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	ret = miic_parse_dt(miic, &amp;mode_cfg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;miic-&gt;lock);</div><div class='ctx'> 	miic-&gt;base = devm_platform_ioremap_resource(pdev, 0);</div><div class='ctx'> 	if (IS_ERR(miic-&gt;base))</div><div class='ctx'> 		return PTR_ERR(miic-&gt;base);</div><div class='ctx'> </div><div class='add'>+	ret = miic_reset_control_init(miic);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	ret = devm_pm_runtime_enable(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -539,9 +716,41 @@ static void miic_remove(struct platform_device *pdev)</div><div class='ctx'> 	pm_runtime_put(&amp;pdev-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct miic_of_data rzn1_miic_of_data = {</div><div class='add'>+	.match_table = modctrl_match_table,</div><div class='add'>+	.match_table_count = ARRAY_SIZE(modctrl_match_table),</div><div class='add'>+	.conf_conv_count = MIIC_MODCTRL_CONF_CONV_MAX,</div><div class='add'>+	.conf_to_string = conf_to_string,</div><div class='add'>+	.conf_to_string_count = ARRAY_SIZE(conf_to_string),</div><div class='add'>+	.index_to_string = index_to_string,</div><div class='add'>+	.index_to_string_count = ARRAY_SIZE(index_to_string),</div><div class='add'>+	.miic_port_start = 1,</div><div class='add'>+	.miic_port_max = 5,</div><div class='add'>+	.sw_mode_mask = GENMASK(4, 0),</div><div class='add'>+	.init_unlock_lock_regs = true,</div><div class='add'>+	.miic_write = miic_reg_writel_unlocked,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct miic_of_data rzt2h_miic_of_data = {</div><div class='add'>+	.match_table = rzt2h_modctrl_match_table,</div><div class='add'>+	.match_table_count = ARRAY_SIZE(rzt2h_modctrl_match_table),</div><div class='add'>+	.conf_conv_count = 5,</div><div class='add'>+	.conf_to_string = rzt2h_conf_to_string,</div><div class='add'>+	.conf_to_string_count = ARRAY_SIZE(rzt2h_conf_to_string),</div><div class='add'>+	.index_to_string = rzt2h_index_to_string,</div><div class='add'>+	.index_to_string_count = ARRAY_SIZE(rzt2h_index_to_string),</div><div class='add'>+	.miic_port_start = 0,</div><div class='add'>+	.miic_port_max = 4,</div><div class='add'>+	.sw_mode_mask = GENMASK(2, 0),</div><div class='add'>+	.reset_ids = rzt2h_reset_ids,</div><div class='add'>+	.reset_count = ARRAY_SIZE(rzt2h_reset_ids),</div><div class='add'>+	.miic_write = miic_reg_writel_locked,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct of_device_id miic_of_mtable[] = {</div><div class='del'>-	{ .compatible = "renesas,rzn1-miic" },</div><div class='del'>-	{ /* sentinel */ },</div><div class='add'>+	{ .compatible = "renesas,r9a09g077-miic", .data = &amp;rzt2h_miic_of_data },</div><div class='add'>+	{ .compatible = "renesas,rzn1-miic", .data = &amp;rzn1_miic_of_data },</div><div class='add'>+	{ /* sentinel */ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, miic_of_mtable);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/pcs/pcs-xpcs-plat.c b/drivers/net/pcs/pcs-xpcs-plat.c<br/>index 629315f1e57c..b8c48f9effbf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-xpcs-plat.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-xpcs-plat.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-xpcs-plat.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pcs/pcs-xpcs-plat.c</a></div><div class='hunk'>@@ -66,7 +66,7 @@ static int xpcs_mmio_read_reg_indirect(struct dw_xpcs_plat *pxpcs,</div><div class='ctx'> 	switch (pxpcs-&gt;reg_width) {</div><div class='ctx'> 	case 4:</div><div class='ctx'> 		writel(page, pxpcs-&gt;reg_base + (DW_VR_CSR_VIEWPORT &lt;&lt; 2));</div><div class='del'>-		ret = readl(pxpcs-&gt;reg_base + (ofs &lt;&lt; 2));</div><div class='add'>+		ret = readl(pxpcs-&gt;reg_base + (ofs &lt;&lt; 2)) &amp; 0xffff;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		writew(page, pxpcs-&gt;reg_base + (DW_VR_CSR_VIEWPORT &lt;&lt; 1));</div><div class='hunk'>@@ -124,7 +124,7 @@ static int xpcs_mmio_read_reg_direct(struct dw_xpcs_plat *pxpcs,</div><div class='ctx'> </div><div class='ctx'> 	switch (pxpcs-&gt;reg_width) {</div><div class='ctx'> 	case 4:</div><div class='del'>-		ret = readl(pxpcs-&gt;reg_base + (csr &lt;&lt; 2));</div><div class='add'>+		ret = readl(pxpcs-&gt;reg_base + (csr &lt;&lt; 2)) &amp; 0xffff;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = readw(pxpcs-&gt;reg_base + (csr &lt;&lt; 1));</div><div class='hunk'>@@ -280,7 +280,7 @@ static int xpcs_plat_init_clk(struct dw_xpcs_plat *pxpcs)</div><div class='ctx'> 	struct device *dev = &amp;pxpcs-&gt;pdev-&gt;dev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	pxpcs-&gt;cclk = devm_clk_get(dev, "csr");</div><div class='add'>+	pxpcs-&gt;cclk = devm_clk_get_optional(dev, "csr");</div><div class='ctx'> 	if (IS_ERR(pxpcs-&gt;cclk))</div><div class='ctx'> 		return dev_err_probe(dev, PTR_ERR(pxpcs-&gt;cclk),</div><div class='ctx'> 				     "Failed to get CSR clock\n");</div><div class='hunk'>@@ -365,9 +365,6 @@ static int xpcs_plat_init_dev(struct dw_xpcs_plat *pxpcs)</div><div class='ctx'> err_clean_data:</div><div class='ctx'> 	mdiodev-&gt;dev.platform_data = NULL;</div><div class='ctx'> </div><div class='del'>-	fwnode_handle_put(dev_fwnode(&amp;mdiodev-&gt;dev));</div><div class='del'>-	device_set_node(&amp;mdiodev-&gt;dev, NULL);</div><div class='del'>-</div><div class='ctx'> 	mdio_device_free(mdiodev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -456,5 +453,5 @@ static struct platform_driver xpcs_plat_driver = {</div><div class='ctx'> module_platform_driver(xpcs_plat_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Synopsys DesignWare XPCS platform device driver");</div><div class='del'>-MODULE_AUTHOR("Signed-off-by: Serge Semin &lt;fancer.lancer@gmail.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Serge Semin &lt;fancer.lancer@gmail.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c<br/>index 7246a910728d..9679f2b35a44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-xpcs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-xpcs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-xpcs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pcs/pcs-xpcs.c</a></div><div class='hunk'>@@ -37,6 +37,16 @@ static const int xpcs_10gkr_features[] = {</div><div class='ctx'> 	__ETHTOOL_LINK_MODE_MASK_NBITS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const int xpcs_25gbaser_features[] = {</div><div class='add'>+	ETHTOOL_LINK_MODE_MII_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_Pause_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_Asym_Pause_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,</div><div class='add'>+	__ETHTOOL_LINK_MODE_MASK_NBITS,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const int xpcs_xlgmii_features[] = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_Pause_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_Asym_Pause_BIT,</div><div class='hunk'>@@ -67,6 +77,40 @@ static const int xpcs_xlgmii_features[] = {</div><div class='ctx'> 	__ETHTOOL_LINK_MODE_MASK_NBITS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const int xpcs_50gbaser_features[] = {</div><div class='add'>+	ETHTOOL_LINK_MODE_MII_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_Pause_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_Asym_Pause_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_50000baseDR_Full_BIT,</div><div class='add'>+	__ETHTOOL_LINK_MODE_MASK_NBITS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const int xpcs_50gbaser2_features[] = {</div><div class='add'>+	ETHTOOL_LINK_MODE_MII_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_Pause_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_Asym_Pause_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,</div><div class='add'>+	__ETHTOOL_LINK_MODE_MASK_NBITS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const int xpcs_100gbasep_features[] = {</div><div class='add'>+	ETHTOOL_LINK_MODE_MII_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_Pause_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_Asym_Pause_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,</div><div class='add'>+	ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT,</div><div class='add'>+	__ETHTOOL_LINK_MODE_MASK_NBITS,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const int xpcs_10gbaser_features[] = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_Pause_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_Asym_Pause_BIT,</div><div class='hunk'>@@ -523,9 +567,57 @@ static int xpcs_get_max_xlgmii_speed(struct dw_xpcs *xpcs,</div><div class='ctx'> 	return speed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xpcs_resolve_pma(struct dw_xpcs *xpcs,</div><div class='del'>-			     struct phylink_link_state *state)</div><div class='add'>+static int xpcs_c45_read_pcs_speed(struct dw_xpcs *xpcs,</div><div class='add'>+				   struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='add'>+	int pcs_ctrl1;</div><div class='add'>+</div><div class='add'>+	pcs_ctrl1 = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='add'>+	if (pcs_ctrl1 &lt; 0)</div><div class='add'>+		return pcs_ctrl1;</div><div class='add'>+</div><div class='add'>+	switch (pcs_ctrl1 &amp; MDIO_CTRL1_SPEEDSEL) {</div><div class='add'>+	case MDIO_PCS_CTRL1_SPEED25G:</div><div class='add'>+		state-&gt;speed = SPEED_25000;</div><div class='add'>+		break;</div><div class='add'>+	case MDIO_PCS_CTRL1_SPEED50G:</div><div class='add'>+		state-&gt;speed =  SPEED_50000;</div><div class='add'>+		break;</div><div class='add'>+	case MDIO_PCS_CTRL1_SPEED100G:</div><div class='add'>+		state-&gt;speed = SPEED_100000;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		state-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xpcs_resolve_pma(struct dw_xpcs *xpcs,</div><div class='add'>+			    struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	int pmd_rxdet, err = 0;</div><div class='add'>+</div><div class='add'>+	/* The Meta Platforms FBNIC PMD will go into a training state for</div><div class='add'>+	 * about 4 seconds when the link first comes up. During this time the</div><div class='add'>+	 * PCS link will bounce. To avoid reporting link up too soon we include</div><div class='add'>+	 * the PMD state provided by the driver.</div><div class='add'>+	 */</div><div class='add'>+	if (xpcs-&gt;info.pma == MP_FBNIC_XPCS_PMA_100G_ID) {</div><div class='add'>+		pmd_rxdet = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_PMA_RXDET);</div><div class='add'>+		if (pmd_rxdet &lt; 0) {</div><div class='add'>+			state-&gt;link = false;</div><div class='add'>+			return pmd_rxdet;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Verify Rx lanes are trained before reporting link up */</div><div class='add'>+		if (!(pmd_rxdet &amp; MDIO_PMD_RXDET_GLOBAL)) {</div><div class='add'>+			state-&gt;link = false;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	state-&gt;pause = MLO_PAUSE_TX | MLO_PAUSE_RX;</div><div class='ctx'> 	state-&gt;duplex = DUPLEX_FULL;</div><div class='ctx'> </div><div class='hunk'>@@ -536,10 +628,18 @@ static void xpcs_resolve_pma(struct dw_xpcs *xpcs,</div><div class='ctx'> 	case PHY_INTERFACE_MODE_XLGMII:</div><div class='ctx'> 		state-&gt;speed = xpcs_get_max_xlgmii_speed(xpcs, state);</div><div class='ctx'> 		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_100GBASEP:</div><div class='add'>+	case PHY_INTERFACE_MODE_LAUI:</div><div class='add'>+	case PHY_INTERFACE_MODE_50GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_25GBASER:</div><div class='add'>+		err = xpcs_c45_read_pcs_speed(xpcs, state);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		state-&gt;speed = SPEED_UNKNOWN;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xpcs_validate(struct phylink_pcs *pcs, unsigned long *supported,</div><div class='hunk'>@@ -567,44 +667,56 @@ static int xpcs_validate(struct phylink_pcs *pcs, unsigned long *supported,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces)</div><div class='add'>+static unsigned int xpcs_inband_caps(struct phylink_pcs *pcs,</div><div class='add'>+				     phy_interface_t interface)</div><div class='ctx'> {</div><div class='add'>+	struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);</div><div class='ctx'> 	const struct dw_xpcs_compat *compat;</div><div class='ctx'> </div><div class='del'>-	for (compat = xpcs-&gt;desc-&gt;compat; compat-&gt;supported; compat++)</div><div class='del'>-		__set_bit(compat-&gt;interface, interfaces);</div><div class='add'>+	compat = xpcs_find_compat(xpcs, interface);</div><div class='add'>+	if (!compat)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (compat-&gt;an_mode) {</div><div class='add'>+	case DW_AN_C73:</div><div class='add'>+		return LINK_INBAND_ENABLE;</div><div class='add'>+</div><div class='add'>+	case DW_AN_C37_SGMII:</div><div class='add'>+	case DW_AN_C37_1000BASEX:</div><div class='add'>+		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;</div><div class='add'>+</div><div class='add'>+	case DW_10GBASER:</div><div class='add'>+	case DW_2500BASEX:</div><div class='add'>+		return LINK_INBAND_DISABLE;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(xpcs_get_interfaces);</div><div class='ctx'> </div><div class='del'>-int xpcs_config_eee(struct dw_xpcs *xpcs, int mult_fact_100ns, int enable)</div><div class='add'>+static void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces)</div><div class='ctx'> {</div><div class='del'>-	u16 mask, val;</div><div class='del'>-	int ret;</div><div class='add'>+	const struct dw_xpcs_compat *compat;</div><div class='ctx'> </div><div class='del'>-	mask = DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN |</div><div class='del'>-	       DW_VR_MII_EEE_TX_QUIET_EN | DW_VR_MII_EEE_RX_QUIET_EN |</div><div class='del'>-	       DW_VR_MII_EEE_TX_EN_CTRL | DW_VR_MII_EEE_RX_EN_CTRL |</div><div class='del'>-	       DW_VR_MII_EEE_MULT_FACT_100NS;</div><div class='add'>+	for (compat = xpcs-&gt;desc-&gt;compat; compat-&gt;supported; compat++)</div><div class='add'>+		__set_bit(compat-&gt;interface, interfaces);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (enable)</div><div class='del'>-		val = DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN |</div><div class='del'>-		      DW_VR_MII_EEE_TX_QUIET_EN | DW_VR_MII_EEE_RX_QUIET_EN |</div><div class='del'>-		      DW_VR_MII_EEE_TX_EN_CTRL | DW_VR_MII_EEE_RX_EN_CTRL |</div><div class='del'>-		      FIELD_PREP(DW_VR_MII_EEE_MULT_FACT_100NS,</div><div class='del'>-				 mult_fact_100ns);</div><div class='del'>-	else</div><div class='del'>-		val = 0;</div><div class='add'>+static int xpcs_switch_interface_mode(struct dw_xpcs *xpcs,</div><div class='add'>+				      phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0, mask,</div><div class='del'>-			  val);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+	if (xpcs-&gt;info.pma == WX_TXGBE_XPCS_PMA_10G_ID) {</div><div class='add'>+		ret = txgbe_xpcs_switch_mode(xpcs, interface);</div><div class='add'>+	} else if (xpcs-&gt;interface != interface) {</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+			xpcs-&gt;need_reset = true;</div><div class='add'>+		xpcs-&gt;interface = interface;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1,</div><div class='del'>-			   DW_VR_MII_EEE_TRN_LPI,</div><div class='del'>-			   enable ? DW_VR_MII_EEE_TRN_LPI : 0);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(xpcs_config_eee);</div><div class='ctx'> </div><div class='ctx'> static void xpcs_pre_config(struct phylink_pcs *pcs, phy_interface_t interface)</div><div class='ctx'> {</div><div class='hunk'>@@ -612,6 +724,11 @@ static void xpcs_pre_config(struct phylink_pcs *pcs, phy_interface_t interface)</div><div class='ctx'> 	const struct dw_xpcs_compat *compat;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	ret = xpcs_switch_interface_mode(xpcs, interface);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;xpcs-&gt;mdiodev-&gt;dev, "switch interface failed: %pe\n",</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='ctx'> 	if (!xpcs-&gt;need_reset)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -684,7 +801,9 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs,</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	mask = DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW;</div><div class='add'>+	val = 0;</div><div class='add'>+	mask = DW_VR_MII_DIG_CTRL1_2G5_EN | DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW;</div><div class='add'>+</div><div class='ctx'> 	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)</div><div class='ctx'> 		val = DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW;</div><div class='ctx'> </div><div class='hunk'>@@ -801,10 +920,6 @@ static int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface,</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	if (xpcs-&gt;info.pma == WX_TXGBE_XPCS_PMA_10G_ID) {</div><div class='del'>-		ret = txgbe_xpcs_switch_mode(xpcs, interface);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='ctx'> 		/* Wangxun devices need backplane CL37 AN enabled for</div><div class='ctx'> 		 * SGMII and 1000base-X</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -930,10 +1045,10 @@ static int xpcs_get_state_c73(struct dw_xpcs *xpcs,</div><div class='ctx'> </div><div class='ctx'> 		phylink_resolve_c73(state);</div><div class='ctx'> 	} else {</div><div class='del'>-		xpcs_resolve_pma(xpcs, state);</div><div class='add'>+		ret = xpcs_resolve_pma(xpcs, state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xpcs_get_state_c37_sgmii(struct dw_xpcs *xpcs,</div><div class='hunk'>@@ -1004,6 +1119,7 @@ static int xpcs_get_state_c37_sgmii(struct dw_xpcs *xpcs,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xpcs_get_state_c37_1000basex(struct dw_xpcs *xpcs,</div><div class='add'>+					unsigned int neg_mode,</div><div class='ctx'> 					struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	int lpa, bmsr;</div><div class='hunk'>@@ -1032,7 +1148,7 @@ static int xpcs_get_state_c37_1000basex(struct dw_xpcs *xpcs,</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);</div><div class='add'>+		phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1060,7 +1176,7 @@ static int xpcs_get_state_2500basex(struct dw_xpcs *xpcs,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xpcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+static void xpcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 			   struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);</div><div class='hunk'>@@ -1088,7 +1204,7 @@ static void xpcs_get_state(struct phylink_pcs *pcs,</div><div class='ctx'> 				"xpcs_get_state_c37_sgmii", ERR_PTR(ret));</div><div class='ctx'> 		break;</div><div class='ctx'> 	case DW_AN_C37_1000BASEX:</div><div class='del'>-		ret = xpcs_get_state_c37_1000basex(xpcs, state);</div><div class='add'>+		ret = xpcs_get_state_c37_1000basex(xpcs, neg_mode, state);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			dev_err(&amp;xpcs-&gt;mdiodev-&gt;dev, "%s returned %pe\n",</div><div class='ctx'> 				"xpcs_get_state_c37_1000basex", ERR_PTR(ret));</div><div class='hunk'>@@ -1164,6 +1280,63 @@ static void xpcs_an_restart(struct phylink_pcs *pcs)</div><div class='ctx'> 		    BMCR_ANRESTART);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int xpcs_config_eee(struct dw_xpcs *xpcs, bool enable)</div><div class='add'>+{</div><div class='add'>+	u16 mask, val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mask = DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN |</div><div class='add'>+	       DW_VR_MII_EEE_TX_QUIET_EN | DW_VR_MII_EEE_RX_QUIET_EN |</div><div class='add'>+	       DW_VR_MII_EEE_TX_EN_CTRL | DW_VR_MII_EEE_RX_EN_CTRL |</div><div class='add'>+	       DW_VR_MII_EEE_MULT_FACT_100NS;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		val = DW_VR_MII_EEE_LTX_EN | DW_VR_MII_EEE_LRX_EN |</div><div class='add'>+		      DW_VR_MII_EEE_TX_QUIET_EN | DW_VR_MII_EEE_RX_QUIET_EN |</div><div class='add'>+		      DW_VR_MII_EEE_TX_EN_CTRL | DW_VR_MII_EEE_RX_EN_CTRL |</div><div class='add'>+		      FIELD_PREP(DW_VR_MII_EEE_MULT_FACT_100NS,</div><div class='add'>+				 xpcs-&gt;eee_mult_fact);</div><div class='add'>+	else</div><div class='add'>+		val = 0;</div><div class='add'>+</div><div class='add'>+	ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0, mask,</div><div class='add'>+			  val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1,</div><div class='add'>+			   DW_VR_MII_EEE_TRN_LPI,</div><div class='add'>+			   enable ? DW_VR_MII_EEE_TRN_LPI : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xpcs_disable_eee(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);</div><div class='add'>+</div><div class='add'>+	xpcs_config_eee(xpcs, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xpcs_enable_eee(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);</div><div class='add'>+</div><div class='add'>+	xpcs_config_eee(xpcs, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xpcs_config_eee_mult_fact() - set the EEE clock multiplying factor</div><div class='add'>+ * @xpcs: pointer to a &amp;struct dw_xpcs instance</div><div class='add'>+ * @mult_fact: the multiplying factor</div><div class='add'>+ *</div><div class='add'>+ * Configure the EEE clock multiplying factor. This value should be such that</div><div class='add'>+ * clk_eee_time_period * (mult_fact + 1) is within the range 80 to 120ns.</div><div class='add'>+ */</div><div class='add'>+void xpcs_config_eee_mult_fact(struct dw_xpcs *xpcs, u8 mult_fact)</div><div class='add'>+{</div><div class='add'>+	xpcs-&gt;eee_mult_fact = mult_fact;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(xpcs_config_eee_mult_fact);</div><div class='add'>+</div><div class='ctx'> static int xpcs_read_ids(struct dw_xpcs *xpcs)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1211,17 +1384,16 @@ static int xpcs_read_ids(struct dw_xpcs *xpcs)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	id = ret;</div><div class='add'>+	id = ret &lt;&lt; 16;</div><div class='ctx'> </div><div class='ctx'> 	ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID2);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	/* Note the inverted dword order and masked out Model/Revision numbers</div><div class='del'>-	 * with respect to what is done with the PCS ID...</div><div class='add'>+	/* For now we only record the OUI for the PMAPMD, we may want to</div><div class='add'>+	 * add the model number at some point in the future.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = (ret &gt;&gt; 10) &amp; 0x3F;</div><div class='del'>-	id |= ret &lt;&lt; 16;</div><div class='add'>+	id |= ret &amp; MDIO_DEVID2_OUI;</div><div class='ctx'> </div><div class='ctx'> 	/* Set the PMA ID if it hasn't been pre-initialized */</div><div class='ctx'> 	if (xpcs-&gt;info.pma == DW_XPCS_PMA_ID_NATIVE)</div><div class='hunk'>@@ -1240,10 +1412,26 @@ static const struct dw_xpcs_compat synopsys_xpcs_compat[] = {</div><div class='ctx'> 		.supported = xpcs_10gkr_features,</div><div class='ctx'> 		.an_mode = DW_AN_C73,</div><div class='ctx'> 	}, {</div><div class='add'>+		.interface = PHY_INTERFACE_MODE_25GBASER,</div><div class='add'>+		.supported = xpcs_25gbaser_features,</div><div class='add'>+		.an_mode = DW_AN_C73,</div><div class='add'>+	}, {</div><div class='ctx'> 		.interface = PHY_INTERFACE_MODE_XLGMII,</div><div class='ctx'> 		.supported = xpcs_xlgmii_features,</div><div class='ctx'> 		.an_mode = DW_AN_C73,</div><div class='ctx'> 	}, {</div><div class='add'>+		.interface = PHY_INTERFACE_MODE_50GBASER,</div><div class='add'>+		.supported = xpcs_50gbaser_features,</div><div class='add'>+		.an_mode = DW_AN_C73,</div><div class='add'>+	}, {</div><div class='add'>+		.interface = PHY_INTERFACE_MODE_LAUI,</div><div class='add'>+		.supported = xpcs_50gbaser2_features,</div><div class='add'>+		.an_mode = DW_AN_C73,</div><div class='add'>+	}, {</div><div class='add'>+		.interface = PHY_INTERFACE_MODE_100GBASEP,</div><div class='add'>+		.supported = xpcs_100gbasep_features,</div><div class='add'>+		.an_mode = DW_AN_C73,</div><div class='add'>+	}, {</div><div class='ctx'> 		.interface = PHY_INTERFACE_MODE_10GBASER,</div><div class='ctx'> 		.supported = xpcs_10gbaser_features,</div><div class='ctx'> 		.an_mode = DW_10GBASER,</div><div class='hunk'>@@ -1306,11 +1494,14 @@ static const struct dw_xpcs_desc xpcs_desc_list[] = {</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_pcs_ops xpcs_phylink_ops = {</div><div class='ctx'> 	.pcs_validate = xpcs_validate,</div><div class='add'>+	.pcs_inband_caps = xpcs_inband_caps,</div><div class='ctx'> 	.pcs_pre_config = xpcs_pre_config,</div><div class='ctx'> 	.pcs_config = xpcs_config,</div><div class='ctx'> 	.pcs_get_state = xpcs_get_state,</div><div class='ctx'> 	.pcs_an_restart = xpcs_an_restart,</div><div class='ctx'> 	.pcs_link_up = xpcs_link_up,</div><div class='add'>+	.pcs_disable_eee = xpcs_disable_eee,</div><div class='add'>+	.pcs_enable_eee = xpcs_enable_eee,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int xpcs_identify(struct dw_xpcs *xpcs)</div><div class='hunk'>@@ -1344,7 +1535,6 @@ static struct dw_xpcs *xpcs_create_data(struct mdio_device *mdiodev)</div><div class='ctx'> 	mdio_device_get(mdiodev);</div><div class='ctx'> 	xpcs-&gt;mdiodev = mdiodev;</div><div class='ctx'> 	xpcs-&gt;pcs.ops = &amp;xpcs_phylink_ops;</div><div class='del'>-	xpcs-&gt;pcs.neg_mode = true;</div><div class='ctx'> 	xpcs-&gt;pcs.poll = true;</div><div class='ctx'> </div><div class='ctx'> 	return xpcs;</div><div class='hunk'>@@ -1418,7 +1608,10 @@ static struct dw_xpcs *xpcs_create(struct mdio_device *mdiodev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out_clear_clks;</div><div class='ctx'> </div><div class='del'>-	if (xpcs-&gt;info.pma == WX_TXGBE_XPCS_PMA_10G_ID)</div><div class='add'>+	xpcs_get_interfaces(xpcs, xpcs-&gt;pcs.supported_interfaces);</div><div class='add'>+</div><div class='add'>+	if (xpcs-&gt;info.pma == WX_TXGBE_XPCS_PMA_10G_ID ||</div><div class='add'>+	    xpcs-&gt;info.pma == MP_FBNIC_XPCS_PMA_100G_ID)</div><div class='ctx'> 		xpcs-&gt;pcs.poll = false;</div><div class='ctx'> 	else</div><div class='ctx'> 		xpcs-&gt;need_reset = true;</div><div class='head'>diff --git a/drivers/net/pcs/pcs-xpcs.h b/drivers/net/pcs/pcs-xpcs.h<br/>index adc5a0b3c883..929fa238445e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-xpcs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pcs/pcs-xpcs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pcs/pcs-xpcs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pcs/pcs-xpcs.h</a></div><div class='hunk'>@@ -55,23 +55,11 @@</div><div class='ctx'> /* Clause 37 Defines */</div><div class='ctx'> /* VR MII MMD registers offsets */</div><div class='ctx'> #define DW_VR_MII_DIG_CTRL1		0x8000</div><div class='del'>-#define DW_VR_MII_AN_CTRL		0x8001</div><div class='del'>-#define DW_VR_MII_AN_INTR_STS		0x8002</div><div class='del'>-/* EEE Mode Control Register */</div><div class='del'>-#define DW_VR_MII_EEE_MCTRL0		0x8006</div><div class='del'>-#define DW_VR_MII_EEE_MCTRL1		0x800b</div><div class='del'>-#define DW_VR_MII_DIG_CTRL2		0x80e1</div><div class='del'>-</div><div class='del'>-/* VR_MII_DIG_CTRL1 */</div><div class='ctx'> #define DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW		BIT(9)</div><div class='ctx'> #define DW_VR_MII_DIG_CTRL1_2G5_EN		BIT(2)</div><div class='ctx'> #define DW_VR_MII_DIG_CTRL1_PHY_MODE_CTRL	BIT(0)</div><div class='ctx'> </div><div class='del'>-/* VR_MII_DIG_CTRL2 */</div><div class='del'>-#define DW_VR_MII_DIG_CTRL2_TX_POL_INV		BIT(4)</div><div class='del'>-#define DW_VR_MII_DIG_CTRL2_RX_POL_INV		BIT(0)</div><div class='del'>-</div><div class='del'>-/* VR_MII_AN_CTRL */</div><div class='add'>+#define DW_VR_MII_AN_CTRL		0x8001</div><div class='ctx'> #define DW_VR_MII_AN_CTRL_8BIT			BIT(8)</div><div class='ctx'> #define DW_VR_MII_TX_CONFIG_MASK		BIT(3)</div><div class='ctx'> #define DW_VR_MII_TX_CONFIG_PHY_SIDE_SGMII	0x1</div><div class='hunk'>@@ -81,7 +69,7 @@</div><div class='ctx'> #define DW_VR_MII_PCS_MODE_C37_SGMII		0x2</div><div class='ctx'> #define DW_VR_MII_AN_INTR_EN			BIT(0)</div><div class='ctx'> </div><div class='del'>-/* VR_MII_AN_INTR_STS */</div><div class='add'>+#define DW_VR_MII_AN_INTR_STS		0x8002</div><div class='ctx'> #define DW_VR_MII_AN_STS_C37_ANCMPLT_INTR	BIT(0)</div><div class='ctx'> #define DW_VR_MII_AN_STS_C37_ANSGM_FD		BIT(1)</div><div class='ctx'> #define DW_VR_MII_AN_STS_C37_ANSGM_SP		GENMASK(3, 2)</div><div class='hunk'>@@ -90,19 +78,22 @@</div><div class='ctx'> #define DW_VR_MII_C37_ANSGM_SP_1000		0x2</div><div class='ctx'> #define DW_VR_MII_C37_ANSGM_SP_LNKSTS		BIT(4)</div><div class='ctx'> </div><div class='del'>-/* VR MII EEE Control 0 defines */</div><div class='add'>+#define DW_VR_MII_EEE_MCTRL0		0x8006</div><div class='ctx'> #define DW_VR_MII_EEE_LTX_EN			BIT(0)  /* LPI Tx Enable */</div><div class='ctx'> #define DW_VR_MII_EEE_LRX_EN			BIT(1)  /* LPI Rx Enable */</div><div class='ctx'> #define DW_VR_MII_EEE_TX_QUIET_EN		BIT(2)  /* Tx Quiet Enable */</div><div class='ctx'> #define DW_VR_MII_EEE_RX_QUIET_EN		BIT(3)  /* Rx Quiet Enable */</div><div class='ctx'> #define DW_VR_MII_EEE_TX_EN_CTRL		BIT(4)  /* Tx Control Enable */</div><div class='ctx'> #define DW_VR_MII_EEE_RX_EN_CTRL		BIT(7)  /* Rx Control Enable */</div><div class='del'>-</div><div class='ctx'> #define DW_VR_MII_EEE_MULT_FACT_100NS		GENMASK(11, 8)</div><div class='ctx'> </div><div class='del'>-/* VR MII EEE Control 1 defines */</div><div class='add'>+#define DW_VR_MII_EEE_MCTRL1		0x800b</div><div class='ctx'> #define DW_VR_MII_EEE_TRN_LPI		BIT(0)	/* Transparent Mode Enable */</div><div class='ctx'> </div><div class='add'>+#define DW_VR_MII_DIG_CTRL2		0x80e1</div><div class='add'>+#define DW_VR_MII_DIG_CTRL2_TX_POL_INV		BIT(4)</div><div class='add'>+#define DW_VR_MII_DIG_CTRL2_RX_POL_INV		BIT(0)</div><div class='add'>+</div><div class='ctx'> #define DW_XPCS_INFO_DECLARE(_name, _pcs, _pma)				\</div><div class='ctx'> 	static const struct dw_xpcs_info _name = { .pcs = _pcs, .pma = _pma }</div><div class='ctx'> </div><div class='hunk'>@@ -122,6 +113,7 @@ struct dw_xpcs {</div><div class='ctx'> 	struct phylink_pcs pcs;</div><div class='ctx'> 	phy_interface_t interface;</div><div class='ctx'> 	bool need_reset;</div><div class='add'>+	u8 eee_mult_fact;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int xpcs_read(struct dw_xpcs *xpcs, int dev, u32 reg);</div><div class='head'>diff --git a/drivers/net/pfcp.c b/drivers/net/pfcp.c<br/>index 69434fd13f96..28e6bc4a1f14 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pfcp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pfcp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pfcp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pfcp.c</a></div><div class='hunk'>@@ -184,15 +184,16 @@ static int pfcp_add_sock(struct pfcp_dev *pfcp)</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(pfcp-&gt;sock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pfcp_newlink(struct net *net, struct net_device *dev,</div><div class='del'>-			struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int pfcp_newlink(struct net_device *dev,</div><div class='add'>+			struct rtnl_newlink_params *params,</div><div class='ctx'> 			struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='ctx'> 	struct pfcp_dev *pfcp = netdev_priv(dev);</div><div class='ctx'> 	struct pfcp_net *pn;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	pfcp-&gt;net = net;</div><div class='add'>+	pfcp-&gt;net = link_net;</div><div class='ctx'> </div><div class='ctx'> 	err = pfcp_add_sock(pfcp);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -206,8 +207,8 @@ static int pfcp_newlink(struct net *net, struct net_device *dev,</div><div class='ctx'> 		goto exit_del_pfcp_sock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pn = net_generic(dev_net(dev), pfcp_net_id);</div><div class='del'>-	list_add_rcu(&amp;pfcp-&gt;list, &amp;pn-&gt;pfcp_dev_list);</div><div class='add'>+	pn = net_generic(link_net, pfcp_net_id);</div><div class='add'>+	list_add(&amp;pfcp-&gt;list, &amp;pn-&gt;pfcp_dev_list);</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(dev, "registered new PFCP interface\n");</div><div class='ctx'> </div><div class='hunk'>@@ -224,7 +225,7 @@ static void pfcp_dellink(struct net_device *dev, struct list_head *head)</div><div class='ctx'> {</div><div class='ctx'> 	struct pfcp_dev *pfcp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	list_del_rcu(&amp;pfcp-&gt;list);</div><div class='add'>+	list_del(&amp;pfcp-&gt;list);</div><div class='ctx'> 	unregister_netdevice_queue(dev, head);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -244,25 +245,21 @@ static int __net_init pfcp_net_init(struct net *net)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __net_exit pfcp_net_exit(struct net *net)</div><div class='add'>+static void __net_exit pfcp_net_exit_rtnl(struct net *net,</div><div class='add'>+					  struct list_head *dev_to_kill)</div><div class='ctx'> {</div><div class='ctx'> 	struct pfcp_net *pn = net_generic(net, pfcp_net_id);</div><div class='del'>-	struct pfcp_dev *pfcp;</div><div class='del'>-	LIST_HEAD(list);</div><div class='del'>-</div><div class='del'>-	rtnl_lock();</div><div class='del'>-	list_for_each_entry(pfcp, &amp;pn-&gt;pfcp_dev_list, list)</div><div class='del'>-		pfcp_dellink(pfcp-&gt;dev, &amp;list);</div><div class='add'>+	struct pfcp_dev *pfcp, *pfcp_next;</div><div class='ctx'> </div><div class='del'>-	unregister_netdevice_many(&amp;list);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	list_for_each_entry_safe(pfcp, pfcp_next, &amp;pn-&gt;pfcp_dev_list, list)</div><div class='add'>+		pfcp_dellink(pfcp-&gt;dev, dev_to_kill);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pernet_operations pfcp_net_ops = {</div><div class='del'>-	.init	= pfcp_net_init,</div><div class='del'>-	.exit	= pfcp_net_exit,</div><div class='del'>-	.id	= &amp;pfcp_net_id,</div><div class='del'>-	.size	= sizeof(struct pfcp_net),</div><div class='add'>+	.init = pfcp_net_init,</div><div class='add'>+	.exit_rtnl = pfcp_net_exit_rtnl,</div><div class='add'>+	.id = &amp;pfcp_net_id,</div><div class='add'>+	.size = sizeof(struct pfcp_net),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init pfcp_init(void)</div><div class='head'>diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig<br/>index ee3ea0b56d48..a7ade7b95a2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/Kconfig</a></div><div class='hunk'>@@ -3,9 +3,13 @@</div><div class='ctx'> # PHY Layer Configuration</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+config MDIO_BUS</div><div class='add'>+	tristate "MDIO bus consumer layer"</div><div class='add'>+	help</div><div class='add'>+	  MDIO bus consumer layer</div><div class='add'>+</div><div class='ctx'> config PHYLINK</div><div class='ctx'> 	tristate</div><div class='del'>-	depends on NETDEVICES</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	select SWPHY</div><div class='ctx'> 	help</div><div class='hunk'>@@ -15,9 +19,7 @@ config PHYLINK</div><div class='ctx'> </div><div class='ctx'> menuconfig PHYLIB</div><div class='ctx'> 	tristate "PHY Device support and infrastructure"</div><div class='del'>-	depends on NETDEVICES</div><div class='del'>-	select MDIO_DEVICE</div><div class='del'>-	select MDIO_DEVRES</div><div class='add'>+	select MDIO_BUS</div><div class='ctx'> 	help</div><div class='ctx'> 	  Ethernet controllers are usually attached to PHY</div><div class='ctx'> 	  devices.  This option provides infrastructure for</div><div class='hunk'>@@ -28,6 +30,9 @@ if PHYLIB</div><div class='ctx'> config SWPHY</div><div class='ctx'> 	bool</div><div class='ctx'> </div><div class='add'>+config PHY_PACKAGE</div><div class='add'>+	 tristate</div><div class='add'>+</div><div class='ctx'> config LED_TRIGGER_PHY</div><div class='ctx'> 	bool "Support LED triggers for tracking link state"</div><div class='ctx'> 	depends on LEDS_TRIGGERS</div><div class='hunk'>@@ -79,6 +84,18 @@ config SFP</div><div class='ctx'> </div><div class='ctx'> comment "MII PHY device drivers"</div><div class='ctx'> </div><div class='add'>+config AS21XXX_PHY</div><div class='add'>+	tristate "Aeonsemi AS21xxx PHYs"</div><div class='add'>+	help</div><div class='add'>+	  Currently supports the Aeonsemi AS21xxx PHY.</div><div class='add'>+</div><div class='add'>+	  These are C45 PHYs 10G that require all a generic firmware.</div><div class='add'>+</div><div class='add'>+	  Supported PHYs AS21011JB1, AS21011PB1, AS21010JB1, AS21010PB1,</div><div class='add'>+	  AS21511JB1, AS21511PB1, AS21510JB1, AS21510PB1, AS21210JB1,</div><div class='add'>+	  AS21210PB1 that all register with the PHY ID 0x7500 0x7500</div><div class='add'>+	  before the firmware is loaded.</div><div class='add'>+</div><div class='ctx'> config AIR_EN8811H_PHY</div><div class='ctx'> 	tristate "Airoha EN8811H 2.5 Gigabit PHY"</div><div class='ctx'> 	help</div><div class='hunk'>@@ -148,6 +165,7 @@ config BCM54140_PHY</div><div class='ctx'> 	tristate "Broadcom BCM54140 PHY"</div><div class='ctx'> 	depends on HWMON || HWMON=n</div><div class='ctx'> 	select BCM_NET_PHYLIB</div><div class='add'>+	select PHY_PACKAGE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support the Broadcom BCM54140 Quad SGMII/QSGMII PHY.</div><div class='ctx'> </div><div class='hunk'>@@ -266,33 +284,31 @@ config MAXLINEAR_GPHY</div><div class='ctx'> 	  Support for the Maxlinear GPY115, GPY211, GPY212, GPY215,</div><div class='ctx'> 	  GPY241, GPY245 PHYs.</div><div class='ctx'> </div><div class='del'>-config MEDIATEK_GE_PHY</div><div class='del'>-	tristate "MediaTek Gigabit Ethernet PHYs"</div><div class='add'>+config MAXLINEAR_86110_PHY</div><div class='add'>+	tristate "MaxLinear MXL86110 PHY support"</div><div class='ctx'> 	help</div><div class='del'>-	  Supports the MediaTek Gigabit Ethernet PHYs.</div><div class='add'>+	 Support for the MaxLinear MXL86110 Gigabit Ethernet</div><div class='add'>+	 Physical Layer transceiver.</div><div class='add'>+	 The MXL86110 is commonly used in networking equipment such as</div><div class='add'>+	 routers, switches, and embedded systems, providing the</div><div class='add'>+	 physical interface for 10/100/1000 Mbps Ethernet connections</div><div class='add'>+	 over copper media.</div><div class='add'>+	 If you are using a board with the MXL86110 PHY connected to your</div><div class='add'>+	 Ethernet MAC, you should enable this option.</div><div class='ctx'> </div><div class='del'>-config MEDIATEK_GE_SOC_PHY</div><div class='del'>-	tristate "MediaTek SoC Ethernet PHYs"</div><div class='del'>-	depends on (ARM64 &amp;&amp; ARCH_MEDIATEK) || COMPILE_TEST</div><div class='del'>-	depends on NVMEM_MTK_EFUSE</div><div class='del'>-	help</div><div class='del'>-	  Supports MediaTek SoC built-in Gigabit Ethernet PHYs.</div><div class='del'>-</div><div class='del'>-	  Include support for built-in Ethernet PHYs which are present in</div><div class='del'>-	  the MT7981 and MT7988 SoCs. These PHYs need calibration data</div><div class='del'>-	  present in the SoCs efuse and will dynamically calibrate VCM</div><div class='del'>-	  (common-mode voltage) during startup.</div><div class='add'>+source "drivers/net/phy/mediatek/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config MICREL_PHY</div><div class='ctx'> 	tristate "Micrel PHYs"</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select PHY_PACKAGE</div><div class='ctx'> 	help</div><div class='del'>-	  Supports the KSZ9021, VSC8201, KS8001 PHYs.</div><div class='add'>+	  Supports the KSZ8xxx, KSZ9xxx, and LAN88xx families of Micrel/Microchip PHYs.</div><div class='ctx'> </div><div class='ctx'> config MICROCHIP_T1S_PHY</div><div class='ctx'> 	tristate "Microchip 10BASE-T1S Ethernet PHYs"</div><div class='ctx'> 	help</div><div class='del'>-	  Currently supports the LAN8670/1/2 Rev.B1/C1/C2 and</div><div class='add'>+	  Currently supports the LAN8670/1/2 Rev.B1/C1/C2/D0 and</div><div class='ctx'> 	  LAN8650/1 Rev.B0/B1 Internal PHYs.</div><div class='ctx'> </div><div class='ctx'> config MICROCHIP_PHY</div><div class='hunk'>@@ -302,14 +318,22 @@ config MICROCHIP_PHY</div><div class='ctx'> </div><div class='ctx'> config MICROCHIP_T1_PHY</div><div class='ctx'> 	tristate "Microchip T1 PHYs"</div><div class='add'>+	select MICROCHIP_PHY_RDS_PTP if NETWORK_PHY_TIMESTAMPING</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	help</div><div class='del'>-	  Supports the LAN87XX PHYs.</div><div class='add'>+	  Supports the LAN8XXX PHYs.</div><div class='add'>+</div><div class='add'>+config MICROCHIP_PHY_RDS_PTP</div><div class='add'>+	tristate</div><div class='add'>+	help</div><div class='add'>+	  Currently supports LAN887X T1 PHY</div><div class='ctx'> </div><div class='ctx'> config MICROSEMI_PHY</div><div class='ctx'> 	tristate "Microsemi PHYs"</div><div class='ctx'> 	depends on MACSEC || MACSEC=n</div><div class='ctx'> 	depends on PTP_1588_CLOCK_OPTIONAL || !NETWORK_PHY_TIMESTAMPING</div><div class='ctx'> 	select CRYPTO_LIB_AES if MACSEC</div><div class='add'>+	select PHY_PACKAGE</div><div class='ctx'> 	help</div><div class='ctx'> 	  Currently supports VSC8514, VSC8530, VSC8531, VSC8540 and VSC8541 PHYs</div><div class='ctx'> </div><div class='hunk'>@@ -336,13 +360,13 @@ config NXP_C45_TJA11XX_PHY</div><div class='ctx'> 	depends on MACSEC || !MACSEC</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable support for NXP C45 TJA11XX PHYs.</div><div class='del'>-	  Currently supports the TJA1103, TJA1104 and TJA1120 PHYs.</div><div class='add'>+	  Currently supports the TJA1103, TJA1104, TJA1120 and TJA1121 PHYs.</div><div class='ctx'> </div><div class='ctx'> config NXP_TJA11XX_PHY</div><div class='ctx'> 	tristate "NXP TJA11xx PHYs support"</div><div class='ctx'> 	depends on HWMON</div><div class='ctx'> 	help</div><div class='del'>-	  Currently supports the NXP TJA1100 and TJA1101 PHY.</div><div class='add'>+	  Currently supports the NXP TJA1100, TJA1101 and TJA1102 PHYs.</div><div class='ctx'> </div><div class='ctx'> config NCN26000_PHY</div><div class='ctx'> 	tristate "Onsemi 10BASE-T1S Ethernet PHY"</div><div class='hunk'>@@ -358,10 +382,7 @@ config QSEMI_PHY</div><div class='ctx'> 	help</div><div class='ctx'> 	  Currently supports the qs6612</div><div class='ctx'> </div><div class='del'>-config REALTEK_PHY</div><div class='del'>-	tristate "Realtek PHYs"</div><div class='del'>-	help</div><div class='del'>-	  Supports the Realtek 821x PHY.</div><div class='add'>+source "drivers/net/phy/realtek/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config RENESAS_PHY</div><div class='ctx'> 	tristate "Renesas PHYs"</div><div class='hunk'>@@ -449,7 +470,3 @@ config XILINX_GMII2RGMII</div><div class='ctx'> 	  Ethernet physical media devices and the Gigabit Ethernet controller.</div><div class='ctx'> </div><div class='ctx'> endif # PHYLIB</div><div class='del'>-</div><div class='del'>-config MICREL_KS8995MA</div><div class='del'>-	tristate "Micrel KS8995MA 5-ports 10/100 managed Ethernet switch"</div><div class='del'>-	depends on SPI</div><div class='head'>diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile<br/>index 90f886844381..76e0db40f879 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/Makefile</a></div><div class='hunk'>@@ -2,30 +2,24 @@</div><div class='ctx'> # Makefile for Linux PHY drivers</div><div class='ctx'> </div><div class='ctx'> libphy-y			:= phy.o phy-c45.o phy-core.o phy_device.o \</div><div class='del'>-				   linkmode.o phy_link_topology.o</div><div class='add'>+				   linkmode.o phy_link_topology.o \</div><div class='add'>+				   phy_caps.o mdio_bus_provider.o</div><div class='ctx'> mdio-bus-y			+= mdio_bus.o mdio_device.o</div><div class='ctx'> </div><div class='del'>-ifdef CONFIG_MDIO_DEVICE</div><div class='del'>-obj-y				+= mdio-boardinfo.o</div><div class='del'>-endif</div><div class='del'>-</div><div class='del'>-# PHYLIB implies MDIO_DEVICE, in that case, we have a bunch of circular</div><div class='del'>-# dependencies that does not make it possible to split mdio-bus objects into a</div><div class='del'>-# dedicated loadable module, so we bundle them all together into libphy.ko</div><div class='ctx'> ifdef CONFIG_PHYLIB</div><div class='del'>-libphy-y			+= $(mdio-bus-y)</div><div class='del'>-# the stubs are built-in whenever PHYLIB is built-in or module</div><div class='add'>+# built-in whenever PHYLIB is built-in or module</div><div class='ctx'> obj-y				+= stubs.o</div><div class='del'>-else</div><div class='del'>-obj-$(CONFIG_MDIO_DEVICE)	+= mdio-bus.o</div><div class='ctx'> endif</div><div class='del'>-obj-$(CONFIG_MDIO_DEVRES)	+= mdio_devres.o</div><div class='add'>+</div><div class='ctx'> libphy-$(CONFIG_SWPHY)		+= swphy.o</div><div class='ctx'> libphy-$(CONFIG_LED_TRIGGER_PHY)	+= phy_led_triggers.o</div><div class='ctx'> libphy-$(CONFIG_OPEN_ALLIANCE_HELPERS) += open_alliance_helpers.o</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_MDIO_BUS)		+= mdio-bus.o</div><div class='ctx'> obj-$(CONFIG_PHYLINK)		+= phylink.o</div><div class='ctx'> obj-$(CONFIG_PHYLIB)		+= libphy.o</div><div class='add'>+obj-$(CONFIG_PHYLIB)		+= mdio_devres.o</div><div class='add'>+obj-$(CONFIG_PHY_PACKAGE)	+= phy_package.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_NETWORK_PHY_TIMESTAMPING) += mii_timestamper.o</div><div class='ctx'> </div><div class='hunk'>@@ -39,6 +33,7 @@ obj-$(CONFIG_AIR_EN8811H_PHY)   += air_en8811h.o</div><div class='ctx'> obj-$(CONFIG_AMD_PHY)		+= amd.o</div><div class='ctx'> obj-$(CONFIG_AMCC_QT2025_PHY)	+= qt2025.o</div><div class='ctx'> obj-$(CONFIG_AQUANTIA_PHY)	+= aquantia/</div><div class='add'>+obj-$(CONFIG_AS21XXX_PHY)	+= as21xxx.o</div><div class='ctx'> ifdef CONFIG_AX88796B_RUST_PHY</div><div class='ctx'>   obj-$(CONFIG_AX88796B_PHY)	+= ax88796b_rust.o</div><div class='ctx'> else</div><div class='hunk'>@@ -74,12 +69,12 @@ obj-$(CONFIG_MARVELL_PHY)	+= marvell.o</div><div class='ctx'> obj-$(CONFIG_MARVELL_88Q2XXX_PHY)	+= marvell-88q2xxx.o</div><div class='ctx'> obj-$(CONFIG_MARVELL_88X2222_PHY)	+= marvell-88x2222.o</div><div class='ctx'> obj-$(CONFIG_MAXLINEAR_GPHY)	+= mxl-gpy.o</div><div class='del'>-obj-$(CONFIG_MEDIATEK_GE_PHY)	+= mediatek-ge.o</div><div class='del'>-obj-$(CONFIG_MEDIATEK_GE_SOC_PHY)	+= mediatek-ge-soc.o</div><div class='add'>+obj-$(CONFIG_MAXLINEAR_86110_PHY)	+= mxl-86110.o</div><div class='add'>+obj-y				+= mediatek/</div><div class='ctx'> obj-$(CONFIG_MESON_GXL_PHY)	+= meson-gxl.o</div><div class='del'>-obj-$(CONFIG_MICREL_KS8995MA)	+= spi_ks8995.o</div><div class='ctx'> obj-$(CONFIG_MICREL_PHY)	+= micrel.o</div><div class='ctx'> obj-$(CONFIG_MICROCHIP_PHY)	+= microchip.o</div><div class='add'>+obj-$(CONFIG_MICROCHIP_PHY_RDS_PTP)	+= microchip_rds_ptp.o</div><div class='ctx'> obj-$(CONFIG_MICROCHIP_T1_PHY)	+= microchip_t1.o</div><div class='ctx'> obj-$(CONFIG_MICROCHIP_T1S_PHY) += microchip_t1s.o</div><div class='ctx'> obj-$(CONFIG_MICROSEMI_PHY)	+= mscc/</div><div class='hunk'>@@ -95,7 +90,7 @@ obj-$(CONFIG_NXP_CBTX_PHY)	+= nxp-cbtx.o</div><div class='ctx'> obj-$(CONFIG_NXP_TJA11XX_PHY)	+= nxp-tja11xx.o</div><div class='ctx'> obj-y				+= qcom/</div><div class='ctx'> obj-$(CONFIG_QSEMI_PHY)		+= qsemi.o</div><div class='del'>-obj-$(CONFIG_REALTEK_PHY)	+= realtek.o</div><div class='add'>+obj-$(CONFIG_REALTEK_PHY)	+= realtek/</div><div class='ctx'> obj-$(CONFIG_RENESAS_PHY)	+= uPD60620.o</div><div class='ctx'> obj-$(CONFIG_ROCKCHIP_PHY)	+= rockchip.o</div><div class='ctx'> obj-$(CONFIG_SMSC_PHY)		+= smsc.o</div><div class='head'>diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c<br/>index a2a862bae2ed..7fa713ca8d45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/adin.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/adin.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/adin.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/adin.c</a></div><div class='hunk'>@@ -1038,7 +1038,7 @@ static struct phy_driver adin_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(adin_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused adin_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused adin_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_ADIN1200) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_ADIN1300) },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/adin1100.c b/drivers/net/phy/adin1100.c<br/>index 85f910e2d4fb..8f9753d4318c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/adin1100.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/adin1100.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/adin1100.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/adin1100.c</a></div><div class='hunk'>@@ -192,16 +192,15 @@ static irqreturn_t adin_phy_handle_interrupt(struct phy_device *phydev)</div><div class='ctx'> static int adin_set_powerdown_mode(struct phy_device *phydev, bool en)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	int val;</div><div class='ctx'> </div><div class='del'>-	val = en ? ADIN_CRSM_SFT_PD_CNTRL_EN : 0;</div><div class='ctx'> 	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1,</div><div class='del'>-			    ADIN_CRSM_SFT_PD_CNTRL, val);</div><div class='add'>+			    ADIN_CRSM_SFT_PD_CNTRL,</div><div class='add'>+			    en ? ADIN_CRSM_SFT_PD_CNTRL_EN : 0);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, ADIN_CRSM_STAT, ret,</div><div class='del'>-					 (ret &amp; ADIN_CRSM_SFT_PD_RDY) == val,</div><div class='add'>+					 !!(ret &amp; ADIN_CRSM_SFT_PD_RDY) == en,</div><div class='ctx'> 					 1000, 30000, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -215,8 +214,11 @@ static int adin_resume(struct phy_device *phydev)</div><div class='ctx'> 	return adin_set_powerdown_mode(phydev, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int adin_set_loopback(struct phy_device *phydev, bool enable)</div><div class='add'>+static int adin_set_loopback(struct phy_device *phydev, bool enable, int speed)</div><div class='ctx'> {</div><div class='add'>+	if (enable &amp;&amp; speed)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	if (enable)</div><div class='ctx'> 		return phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_10T1L_CTRL,</div><div class='ctx'> 					BMCR_LOOPBACK);</div><div class='hunk'>@@ -340,7 +342,7 @@ static struct phy_driver adin_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(adin_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused adin_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused adin_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_ADIN1100) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_ADIN1110) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_ADIN2111) },</div><div class='head'>diff --git a/drivers/net/phy/air_en8811h.c b/drivers/net/phy/air_en8811h.c<br/>index 8d076b9609fd..badd65f0ccee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/air_en8811h.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/air_en8811h.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/air_en8811h.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/air_en8811h.c</a></div><div class='hunk'>@@ -11,6 +11,8 @@</div><div class='ctx'>  * Copyright (C) 2023 Airoha Technology Corp.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/clk-provider.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='ctx'> #include &lt;linux/property.h&gt;</div><div class='hunk'>@@ -115,6 +117,11 @@</div><div class='ctx'> #define EN8811H_GPIO_OUTPUT		0xcf8b8</div><div class='ctx'> #define   EN8811H_GPIO_OUTPUT_345		(BIT(3) | BIT(4) | BIT(5))</div><div class='ctx'> </div><div class='add'>+#define EN8811H_HWTRAP1			0xcf914</div><div class='add'>+#define   EN8811H_HWTRAP1_CKO			BIT(12)</div><div class='add'>+#define EN8811H_CLK_CGM			0xcf958</div><div class='add'>+#define   EN8811H_CLK_CGM_CKO			BIT(26)</div><div class='add'>+</div><div class='ctx'> #define EN8811H_FW_CTRL_1		0x0f0018</div><div class='ctx'> #define   EN8811H_FW_CTRL_1_START		0x0</div><div class='ctx'> #define   EN8811H_FW_CTRL_1_FINISH		0x1</div><div class='hunk'>@@ -142,10 +149,16 @@ struct led {</div><div class='ctx'> 	unsigned long state;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define clk_hw_to_en8811h_priv(_hw)			\</div><div class='add'>+	container_of(_hw, struct en8811h_priv, hw)</div><div class='add'>+</div><div class='ctx'> struct en8811h_priv {</div><div class='del'>-	u32		firmware_version;</div><div class='del'>-	bool		mcu_needs_restart;</div><div class='del'>-	struct led	led[EN8811H_LED_COUNT];</div><div class='add'>+	u32			firmware_version;</div><div class='add'>+	bool			mcu_needs_restart;</div><div class='add'>+	struct led		led[EN8811H_LED_COUNT];</div><div class='add'>+	struct clk_hw		hw;</div><div class='add'>+	struct phy_device	*phydev;</div><div class='add'>+	unsigned int		cko_is_enabled;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='hunk'>@@ -806,6 +819,105 @@ static int en8811h_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='ctx'> 	return 0;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static unsigned long en8811h_clk_recalc_rate(struct clk_hw *hw,</div><div class='add'>+					     unsigned long parent)</div><div class='add'>+{</div><div class='add'>+	struct en8811h_priv *priv = clk_hw_to_en8811h_priv(hw);</div><div class='add'>+	struct phy_device *phydev = priv-&gt;phydev;</div><div class='add'>+	u32 pbus_value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = air_buckpbus_reg_read(phydev, EN8811H_HWTRAP1, &amp;pbus_value);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return (pbus_value &amp; EN8811H_HWTRAP1_CKO) ? 50000000 : 25000000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int en8811h_clk_enable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct en8811h_priv *priv = clk_hw_to_en8811h_priv(hw);</div><div class='add'>+	struct phy_device *phydev = priv-&gt;phydev;</div><div class='add'>+</div><div class='add'>+	return air_buckpbus_reg_modify(phydev, EN8811H_CLK_CGM,</div><div class='add'>+				       EN8811H_CLK_CGM_CKO,</div><div class='add'>+				       EN8811H_CLK_CGM_CKO);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void en8811h_clk_disable(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct en8811h_priv *priv = clk_hw_to_en8811h_priv(hw);</div><div class='add'>+	struct phy_device *phydev = priv-&gt;phydev;</div><div class='add'>+</div><div class='add'>+	air_buckpbus_reg_modify(phydev, EN8811H_CLK_CGM,</div><div class='add'>+				EN8811H_CLK_CGM_CKO, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int en8811h_clk_is_enabled(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct en8811h_priv *priv = clk_hw_to_en8811h_priv(hw);</div><div class='add'>+	struct phy_device *phydev = priv-&gt;phydev;</div><div class='add'>+	u32 pbus_value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = air_buckpbus_reg_read(phydev, EN8811H_CLK_CGM, &amp;pbus_value);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return (pbus_value &amp; EN8811H_CLK_CGM_CKO);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int en8811h_clk_save_context(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct en8811h_priv *priv = clk_hw_to_en8811h_priv(hw);</div><div class='add'>+</div><div class='add'>+	priv-&gt;cko_is_enabled = en8811h_clk_is_enabled(hw);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void en8811h_clk_restore_context(struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct en8811h_priv *priv = clk_hw_to_en8811h_priv(hw);</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;cko_is_enabled)</div><div class='add'>+		en8811h_clk_disable(hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct clk_ops en8811h_clk_ops = {</div><div class='add'>+	.recalc_rate		= en8811h_clk_recalc_rate,</div><div class='add'>+	.enable			= en8811h_clk_enable,</div><div class='add'>+	.disable		= en8811h_clk_disable,</div><div class='add'>+	.is_enabled		= en8811h_clk_is_enabled,</div><div class='add'>+	.save_context		= en8811h_clk_save_context,</div><div class='add'>+	.restore_context	= en8811h_clk_restore_context,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int en8811h_clk_provider_setup(struct device *dev, struct clk_hw *hw)</div><div class='add'>+{</div><div class='add'>+	struct clk_init_data init;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_COMMON_CLK))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	init.name = devm_kasprintf(dev, GFP_KERNEL, "%s-cko",</div><div class='add'>+				   fwnode_get_name(dev_fwnode(dev)));</div><div class='add'>+	if (!init.name)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	init.ops = &amp;en8811h_clk_ops;</div><div class='add'>+	init.flags = 0;</div><div class='add'>+	init.num_parents = 0;</div><div class='add'>+	hw-&gt;init = &amp;init;</div><div class='add'>+</div><div class='add'>+	ret = devm_clk_hw_register(dev, hw);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int en8811h_probe(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct en8811h_priv *priv;</div><div class='hunk'>@@ -838,6 +950,12 @@ static int en8811h_probe(struct phy_device *phydev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	priv-&gt;phydev = phydev;</div><div class='add'>+	/* Co-Clock Output */</div><div class='add'>+	ret = en8811h_clk_provider_setup(&amp;phydev-&gt;mdio.dev, &amp;priv-&gt;hw);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	/* Configure led gpio pins as output */</div><div class='ctx'> 	ret = air_buckpbus_reg_modify(phydev, EN8811H_GPIO_OUTPUT,</div><div class='ctx'> 				      EN8811H_GPIO_OUTPUT_345,</div><div class='hunk'>@@ -1052,6 +1170,20 @@ static irqreturn_t en8811h_handle_interrupt(struct phy_device *phydev)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int en8811h_resume(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	clk_restore_context();</div><div class='add'>+</div><div class='add'>+	return genphy_resume(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int en8811h_suspend(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	clk_save_context();</div><div class='add'>+</div><div class='add'>+	return genphy_suspend(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver en8811h_driver[] = {</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(EN8811H_PHY_ID),</div><div class='hunk'>@@ -1062,6 +1194,8 @@ static struct phy_driver en8811h_driver[] = {</div><div class='ctx'> 	.get_rate_matching	= en8811h_get_rate_matching,</div><div class='ctx'> 	.config_aneg		= en8811h_config_aneg,</div><div class='ctx'> 	.read_status		= en8811h_read_status,</div><div class='add'>+	.resume			= en8811h_resume,</div><div class='add'>+	.suspend		= en8811h_suspend,</div><div class='ctx'> 	.config_intr		= en8811h_clear_intr,</div><div class='ctx'> 	.handle_interrupt	= en8811h_handle_interrupt,</div><div class='ctx'> 	.led_hw_is_supported	= en8811h_led_hw_is_supported,</div><div class='hunk'>@@ -1075,7 +1209,7 @@ static struct phy_driver en8811h_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(en8811h_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused en8811h_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused en8811h_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(EN8811H_PHY_ID) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/amd.c b/drivers/net/phy/amd.c<br/>index 930b15fa6ce9..75b5fe65500a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/amd.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/amd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/amd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/amd.c</a></div><div class='hunk'>@@ -111,7 +111,7 @@ static struct phy_driver am79c_drivers[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(am79c_drivers);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused amd_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused amd_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_AC101L, 0xfffffff0 },</div><div class='ctx'> 	{ PHY_ID_AM79C874, 0xfffffff0 },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/aquantia/aquantia.h b/drivers/net/phy/aquantia/aquantia.h<br/>index 0c78bfabace5..31427ee343e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/aquantia/aquantia.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/aquantia/aquantia.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/aquantia/aquantia.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/aquantia/aquantia.h</a></div><div class='hunk'>@@ -55,6 +55,7 @@</div><div class='ctx'> #define VEND1_GLOBAL_CFG_SERDES_MODE_SGMII	3</div><div class='ctx'> #define VEND1_GLOBAL_CFG_SERDES_MODE_OCSGMII	4</div><div class='ctx'> #define VEND1_GLOBAL_CFG_SERDES_MODE_XFI5G	6</div><div class='add'>+#define VEND1_GLOBAL_CFG_AUTONEG_ENA		BIT(3)</div><div class='ctx'> #define VEND1_GLOBAL_CFG_RATE_ADAPT		GENMASK(8, 7)</div><div class='ctx'> #define VEND1_GLOBAL_CFG_RATE_ADAPT_NONE	0</div><div class='ctx'> #define VEND1_GLOBAL_CFG_RATE_ADAPT_USX		1</div><div class='hunk'>@@ -152,6 +153,28 @@</div><div class='ctx'> </div><div class='ctx'> #define AQR_MAX_LEDS				3</div><div class='ctx'> </div><div class='add'>+/* Custom driver definitions for constructing a single variable out of</div><div class='add'>+ * aggregate firmware build information. These do not represent hardware</div><div class='add'>+ * fields.</div><div class='add'>+ */</div><div class='add'>+#define AQR_FW_FINGERPRINT_MAJOR		GENMASK_ULL(63, 56)</div><div class='add'>+#define AQR_FW_FINGERPRINT_MINOR		GENMASK_ULL(55, 48)</div><div class='add'>+#define AQR_FW_FINGERPRINT_BUILD_ID		GENMASK_ULL(47, 40)</div><div class='add'>+#define AQR_FW_FINGERPRINT_PROV_ID		GENMASK_ULL(39, 32)</div><div class='add'>+#define AQR_FW_FINGERPRINT_MISC_ID		GENMASK_ULL(31, 16)</div><div class='add'>+#define AQR_FW_FINGERPRINT_MISC_VER		GENMASK_ULL(15, 0)</div><div class='add'>+#define AQR_FW_FINGERPRINT(major, minor, build_id, prov_id, misc_id, misc_ver) \</div><div class='add'>+	(FIELD_PREP(AQR_FW_FINGERPRINT_MAJOR, major) | \</div><div class='add'>+	 FIELD_PREP(AQR_FW_FINGERPRINT_MINOR, minor) | \</div><div class='add'>+	 FIELD_PREP(AQR_FW_FINGERPRINT_BUILD_ID, build_id) | \</div><div class='add'>+	 FIELD_PREP(AQR_FW_FINGERPRINT_PROV_ID, prov_id) | \</div><div class='add'>+	 FIELD_PREP(AQR_FW_FINGERPRINT_MISC_ID, misc_id) | \</div><div class='add'>+	 FIELD_PREP(AQR_FW_FINGERPRINT_MISC_VER, misc_ver))</div><div class='add'>+</div><div class='add'>+/* 10G-QXGMII firmware for NXP SPF-30841 riser board (AQR412C) */</div><div class='add'>+#define AQR_G3_V4_3_C_AQR_NXP_SPF_30841_MUSX_ID40019_VER1198 \</div><div class='add'>+	AQR_FW_FINGERPRINT(4, 3, 0xc, 1, 40019, 1198)</div><div class='add'>+</div><div class='ctx'> struct aqr107_hw_stat {</div><div class='ctx'> 	const char *name;</div><div class='ctx'> 	int reg;</div><div class='hunk'>@@ -174,10 +197,39 @@ static const struct aqr107_hw_stat aqr107_hw_stats[] = {</div><div class='ctx'> </div><div class='ctx'> #define AQR107_SGMII_STAT_SZ ARRAY_SIZE(aqr107_hw_stats)</div><div class='ctx'> </div><div class='add'>+static const struct {</div><div class='add'>+	int speed;</div><div class='add'>+	u16 reg;</div><div class='add'>+} aqr_global_cfg_regs[] = {</div><div class='add'>+	{ SPEED_10,	VEND1_GLOBAL_CFG_10M, },</div><div class='add'>+	{ SPEED_100,	VEND1_GLOBAL_CFG_100M, },</div><div class='add'>+	{ SPEED_1000,	VEND1_GLOBAL_CFG_1G, },</div><div class='add'>+	{ SPEED_2500,	VEND1_GLOBAL_CFG_2_5G, },</div><div class='add'>+	{ SPEED_5000,	VEND1_GLOBAL_CFG_5G, },</div><div class='add'>+	{ SPEED_10000,	VEND1_GLOBAL_CFG_10G, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AQR_NUM_GLOBAL_CFG ARRAY_SIZE(aqr_global_cfg_regs)</div><div class='add'>+</div><div class='add'>+enum aqr_rate_adaptation {</div><div class='add'>+	AQR_RATE_ADAPT_NONE,</div><div class='add'>+	AQR_RATE_ADAPT_USX,</div><div class='add'>+	AQR_RATE_ADAPT_PAUSE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aqr_global_syscfg {</div><div class='add'>+	int speed;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	enum aqr_rate_adaptation rate_adapt;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct aqr107_priv {</div><div class='ctx'> 	u64 sgmii_stats[AQR107_SGMII_STAT_SZ];</div><div class='add'>+	u64 fingerprint;</div><div class='ctx'> 	unsigned long leds_active_low;</div><div class='ctx'> 	unsigned long leds_active_high;</div><div class='add'>+	bool wait_on_global_cfg;</div><div class='add'>+	struct aqr_global_syscfg global_cfg[AQR_NUM_GLOBAL_CFG];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #if IS_REACHABLE(CONFIG_HWMON)</div><div class='head'>diff --git a/drivers/net/phy/aquantia/aquantia_firmware.c b/drivers/net/phy/aquantia/aquantia_firmware.c<br/>index dab3af80593f..569256152689 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/aquantia/aquantia_firmware.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/aquantia/aquantia_firmware.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/aquantia/aquantia_firmware.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/aquantia/aquantia_firmware.c</a></div><div class='hunk'>@@ -328,10 +328,11 @@ static int aqr_firmware_load_fs(struct phy_device *phydev)</div><div class='ctx'> 	const char *fw_name;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = of_property_read_string(dev-&gt;of_node, "firmware-name",</div><div class='del'>-				      &amp;fw_name);</div><div class='del'>-	if (ret)</div><div class='add'>+	ret = device_property_read_string(dev, "firmware-name", &amp;fw_name);</div><div class='add'>+	if (ret) {</div><div class='add'>+		phydev_err(phydev, "failed to read firmware-name: %d\n", ret);</div><div class='ctx'> 		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = request_firmware(&amp;fw, fw_name, dev);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -368,7 +369,7 @@ int aqr_firmware_load(struct phy_device *phydev)</div><div class='ctx'> 		 * assume that, and load a new image.</div><div class='ctx'> 		 */</div><div class='ctx'> 		ret = aqr_firmware_load_nvmem(phydev);</div><div class='del'>-		if (!ret)</div><div class='add'>+		if (ret == -EPROBE_DEFER || !ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='ctx'> 		ret = aqr_firmware_load_fs(phydev);</div><div class='head'>diff --git a/drivers/net/phy/aquantia/aquantia_hwmon.c b/drivers/net/phy/aquantia/aquantia_hwmon.c<br/>index 7b3c49c3bf49..1a714b56b765 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/aquantia/aquantia_hwmon.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/aquantia/aquantia_hwmon.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/aquantia/aquantia_hwmon.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/aquantia/aquantia_hwmon.c</a></div><div class='hunk'>@@ -172,33 +172,13 @@ static const struct hwmon_ops aqr_hwmon_ops = {</div><div class='ctx'> 	.write = aqr_hwmon_write,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static u32 aqr_hwmon_chip_config[] = {</div><div class='del'>-	HWMON_C_REGISTER_TZ,</div><div class='del'>-	0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info aqr_hwmon_chip = {</div><div class='del'>-	.type = hwmon_chip,</div><div class='del'>-	.config = aqr_hwmon_chip_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static u32 aqr_hwmon_temp_config[] = {</div><div class='del'>-	HWMON_T_INPUT |</div><div class='del'>-	HWMON_T_MAX | HWMON_T_MIN |</div><div class='del'>-	HWMON_T_MAX_ALARM | HWMON_T_MIN_ALARM |</div><div class='del'>-	HWMON_T_CRIT | HWMON_T_LCRIT |</div><div class='del'>-	HWMON_T_CRIT_ALARM | HWMON_T_LCRIT_ALARM,</div><div class='del'>-	0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info aqr_hwmon_temp = {</div><div class='del'>-	.type = hwmon_temp,</div><div class='del'>-	.config = aqr_hwmon_temp_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct hwmon_channel_info * const aqr_hwmon_info[] = {</div><div class='del'>-	&amp;aqr_hwmon_chip,</div><div class='del'>-	&amp;aqr_hwmon_temp,</div><div class='add'>+	HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),</div><div class='add'>+	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT |</div><div class='add'>+			   HWMON_T_MAX | HWMON_T_MIN |</div><div class='add'>+			   HWMON_T_MAX_ALARM | HWMON_T_MIN_ALARM |</div><div class='add'>+			   HWMON_T_CRIT | HWMON_T_LCRIT |</div><div class='add'>+			   HWMON_T_CRIT_ALARM | HWMON_T_LCRIT_ALARM),</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/aquantia/aquantia_leds.c b/drivers/net/phy/aquantia/aquantia_leds.c<br/>index 00ad2313fed3..951f46104eff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/aquantia/aquantia_leds.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/aquantia/aquantia_leds.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/aquantia/aquantia_leds.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/aquantia/aquantia_leds.c</a></div><div class='hunk'>@@ -156,5 +156,5 @@ int aqr_phy_led_polarity_set(struct phy_device *phydev, int index, unsigned long</div><div class='ctx'> 	if (force_active_high || force_active_low)</div><div class='ctx'> 		return aqr_phy_led_active_low_set(phydev, index, force_active_low);</div><div class='ctx'> </div><div class='del'>-	unreachable();</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c<br/>index 38d0dd5c80a4..41f3676c7f1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/aquantia/aquantia_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/aquantia/aquantia_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/aquantia/aquantia_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/aquantia/aquantia_main.c</a></div><div class='hunk'>@@ -26,13 +26,18 @@</div><div class='ctx'> #define PHY_ID_AQR111	0x03a1b610</div><div class='ctx'> #define PHY_ID_AQR111B0	0x03a1b612</div><div class='ctx'> #define PHY_ID_AQR112	0x03a1b662</div><div class='del'>-#define PHY_ID_AQR412	0x03a1b712</div><div class='add'>+#define PHY_ID_AQR412	0x03a1b6f2</div><div class='add'>+#define PHY_ID_AQR412C	0x03a1b712</div><div class='ctx'> #define PHY_ID_AQR113	0x31c31c40</div><div class='ctx'> #define PHY_ID_AQR113C	0x31c31c12</div><div class='ctx'> #define PHY_ID_AQR114C	0x31c31c22</div><div class='add'>+#define PHY_ID_AQR115	0x31c31c63</div><div class='ctx'> #define PHY_ID_AQR115C	0x31c31c33</div><div class='ctx'> #define PHY_ID_AQR813	0x31c31cb2</div><div class='ctx'> </div><div class='add'>+#define MDIO_PHYXS_VEND_PROV2			0xc441</div><div class='add'>+#define MDIO_PHYXS_VEND_PROV2_USX_AN		BIT(3)</div><div class='add'>+</div><div class='ctx'> #define MDIO_PHYXS_VEND_IF_STATUS		0xe812</div><div class='ctx'> #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK	GENMASK(7, 3)</div><div class='ctx'> #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR	0</div><div class='hunk'>@@ -50,10 +55,17 @@</div><div class='ctx'> #define MDIO_AN_VEND_PROV_1000BASET_HALF	BIT(14)</div><div class='ctx'> #define MDIO_AN_VEND_PROV_5000BASET_FULL	BIT(11)</div><div class='ctx'> #define MDIO_AN_VEND_PROV_2500BASET_FULL	BIT(10)</div><div class='add'>+#define MDIO_AN_VEND_PROV_EXC_PHYID_INFO	BIT(6)</div><div class='ctx'> #define MDIO_AN_VEND_PROV_DOWNSHIFT_EN		BIT(4)</div><div class='ctx'> #define MDIO_AN_VEND_PROV_DOWNSHIFT_MASK	GENMASK(3, 0)</div><div class='ctx'> #define MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT	4</div><div class='ctx'> </div><div class='add'>+#define MDIO_AN_RESVD_VEND_PROV			0xc410</div><div class='add'>+#define MDIO_AN_RESVD_VEND_PROV_MDIX_AUTO	0</div><div class='add'>+#define MDIO_AN_RESVD_VEND_PROV_MDIX_MDI	1</div><div class='add'>+#define MDIO_AN_RESVD_VEND_PROV_MDIX_MDIX	2</div><div class='add'>+#define MDIO_AN_RESVD_VEND_PROV_MDIX_MASK	GENMASK(1, 0)</div><div class='add'>+</div><div class='ctx'> #define MDIO_AN_TX_VEND_STATUS1			0xc800</div><div class='ctx'> #define MDIO_AN_TX_VEND_STATUS1_RATE_MASK	GENMASK(3, 1)</div><div class='ctx'> #define MDIO_AN_TX_VEND_STATUS1_10BASET		0</div><div class='hunk'>@@ -64,6 +76,9 @@</div><div class='ctx'> #define MDIO_AN_TX_VEND_STATUS1_5000BASET	5</div><div class='ctx'> #define MDIO_AN_TX_VEND_STATUS1_FULL_DUPLEX	BIT(0)</div><div class='ctx'> </div><div class='add'>+#define MDIO_AN_RESVD_VEND_STATUS1		0xc810</div><div class='add'>+#define MDIO_AN_RESVD_VEND_STATUS1_MDIX		BIT(8)</div><div class='add'>+</div><div class='ctx'> #define MDIO_AN_TX_VEND_INT_STATUS1		0xcc00</div><div class='ctx'> #define MDIO_AN_TX_VEND_INT_STATUS1_DOWNSHIFT	BIT(1)</div><div class='ctx'> </div><div class='hunk'>@@ -73,6 +88,9 @@</div><div class='ctx'> #define MDIO_AN_TX_VEND_INT_MASK2		0xd401</div><div class='ctx'> #define MDIO_AN_TX_VEND_INT_MASK2_LINK		BIT(0)</div><div class='ctx'> </div><div class='add'>+#define PMAPMD_FW_MISC_ID			0xc41d</div><div class='add'>+#define PMAPMD_FW_MISC_VER			0xc41e</div><div class='add'>+</div><div class='ctx'> #define PMAPMD_RSVD_VEND_PROV			0xe400</div><div class='ctx'> #define PMAPMD_RSVD_VEND_PROV_MDI_CONF		GENMASK(1, 0)</div><div class='ctx'> #define PMAPMD_RSVD_VEND_PROV_MDI_REVERSE	BIT(0)</div><div class='hunk'>@@ -155,12 +173,40 @@ static void aqr107_get_stats(struct phy_device *phydev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int aqr_set_mdix(struct phy_device *phydev, int mdix)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0;</div><div class='add'>+</div><div class='add'>+	switch (mdix) {</div><div class='add'>+	case ETH_TP_MDI:</div><div class='add'>+		val = MDIO_AN_RESVD_VEND_PROV_MDIX_MDI;</div><div class='add'>+		break;</div><div class='add'>+	case ETH_TP_MDI_X:</div><div class='add'>+		val = MDIO_AN_RESVD_VEND_PROV_MDIX_MDIX;</div><div class='add'>+		break;</div><div class='add'>+	case ETH_TP_MDI_AUTO:</div><div class='add'>+	case ETH_TP_MDI_INVALID:</div><div class='add'>+	default:</div><div class='add'>+		val = MDIO_AN_RESVD_VEND_PROV_MDIX_AUTO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_RESVD_VEND_PROV,</div><div class='add'>+				      MDIO_AN_RESVD_VEND_PROV_MDIX_MASK, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int aqr_config_aneg(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	bool changed = false;</div><div class='ctx'> 	u16 reg;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	ret = aqr_set_mdix(phydev, phydev-&gt;mdix_ctrl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		changed = true;</div><div class='add'>+</div><div class='ctx'> 	if (phydev-&gt;autoneg == AUTONEG_DISABLE)</div><div class='ctx'> 		return genphy_c45_pma_setup_forced(phydev);</div><div class='ctx'> </div><div class='hunk'>@@ -278,12 +324,157 @@ static int aqr_read_status(struct phy_device *phydev)</div><div class='ctx'> 				 val &amp; MDIO_AN_RX_LP_STAT1_1000BASET_HALF);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	val = genphy_c45_aneg_done(phydev);</div><div class='add'>+	if (val &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+	if (val) {</div><div class='add'>+		val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RESVD_VEND_STATUS1);</div><div class='add'>+		if (val &lt; 0)</div><div class='add'>+			return val;</div><div class='add'>+		if (val &amp; MDIO_AN_RESVD_VEND_STATUS1_MDIX)</div><div class='add'>+			phydev-&gt;mdix = ETH_TP_MDI_X;</div><div class='add'>+		else</div><div class='add'>+			phydev-&gt;mdix = ETH_TP_MDI;</div><div class='add'>+	} else {</div><div class='add'>+		phydev-&gt;mdix = ETH_TP_MDI_INVALID;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return genphy_c45_read_status(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aqr107_read_rate(struct phy_device *phydev)</div><div class='add'>+static int aqr105_get_features(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Normal feature discovery */</div><div class='add'>+	ret = genphy_c45_pma_read_abilities(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* The AQR105 PHY misses to indicate the 2.5G and 5G modes, so add them</div><div class='add'>+	 * here</div><div class='add'>+	 */</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,</div><div class='add'>+			 phydev-&gt;supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,</div><div class='add'>+			 phydev-&gt;supported);</div><div class='add'>+</div><div class='add'>+	/* The AQR105 PHY suppports both RJ45 and SFP+ interfaces */</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT, phydev-&gt;supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev-&gt;supported);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aqr105_setup_forced(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int vend = MDIO_AN_VEND_PROV_EXC_PHYID_INFO;</div><div class='add'>+	int ctrl10 = 0;</div><div class='add'>+	int adv = ADVERTISE_CSMA;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (phydev-&gt;speed) {</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		adv |= ADVERTISE_100FULL;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		adv |= ADVERTISE_NPAGE;</div><div class='add'>+		if (phydev-&gt;duplex == DUPLEX_FULL)</div><div class='add'>+			vend |= MDIO_AN_VEND_PROV_1000BASET_FULL;</div><div class='add'>+		else</div><div class='add'>+			vend |= MDIO_AN_VEND_PROV_1000BASET_HALF;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		adv |= (ADVERTISE_NPAGE | ADVERTISE_RESV);</div><div class='add'>+		vend |= MDIO_AN_VEND_PROV_2500BASET_FULL;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_5000:</div><div class='add'>+		adv |= (ADVERTISE_NPAGE | ADVERTISE_RESV);</div><div class='add'>+		vend |= MDIO_AN_VEND_PROV_5000BASET_FULL;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		adv |= (ADVERTISE_NPAGE | ADVERTISE_RESV);</div><div class='add'>+		ctrl10 |= MDIO_AN_10GBT_CTRL_ADV10G;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE, adv);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV, vend);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL, ctrl10);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* set by vendor driver, but should be on by default */</div><div class='add'>+	ret = phy_set_bits_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1,</div><div class='add'>+			       MDIO_AN_CTRL1_XNP);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return genphy_c45_an_disable_aneg(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aqr105_config_aneg(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	bool changed = false;</div><div class='add'>+	u16 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = aqr_set_mdix(phydev, phydev-&gt;mdix_ctrl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		changed = true;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;autoneg == AUTONEG_DISABLE)</div><div class='add'>+		return aqr105_setup_forced(phydev);</div><div class='add'>+</div><div class='add'>+	ret = genphy_c45_an_config_aneg(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		changed = true;</div><div class='add'>+</div><div class='add'>+	/* Clause 45 has no standardized support for 1000BaseT, therefore</div><div class='add'>+	 * use vendor registers for this mode.</div><div class='add'>+	 */</div><div class='add'>+	reg = 0;</div><div class='add'>+	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,</div><div class='add'>+			      phydev-&gt;advertising))</div><div class='add'>+		reg |= MDIO_AN_VEND_PROV_1000BASET_FULL;</div><div class='add'>+</div><div class='add'>+	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,</div><div class='add'>+			      phydev-&gt;advertising))</div><div class='add'>+		reg |= MDIO_AN_VEND_PROV_1000BASET_HALF;</div><div class='add'>+</div><div class='add'>+	/* Handle the case when the 2.5G and 5G speeds are not advertised */</div><div class='add'>+	if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,</div><div class='add'>+			      phydev-&gt;advertising))</div><div class='add'>+		reg |= MDIO_AN_VEND_PROV_2500BASET_FULL;</div><div class='add'>+</div><div class='add'>+	if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,</div><div class='add'>+			      phydev-&gt;advertising))</div><div class='add'>+		reg |= MDIO_AN_VEND_PROV_5000BASET_FULL;</div><div class='add'>+</div><div class='add'>+	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV,</div><div class='add'>+				     MDIO_AN_VEND_PROV_1000BASET_HALF |</div><div class='add'>+				     MDIO_AN_VEND_PROV_1000BASET_FULL |</div><div class='add'>+				     MDIO_AN_VEND_PROV_2500BASET_FULL |</div><div class='add'>+				     MDIO_AN_VEND_PROV_5000BASET_FULL, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		changed = true;</div><div class='add'>+</div><div class='add'>+	return genphy_c45_check_and_restart_aneg(phydev, changed);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aqr_gen1_read_rate(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	u32 config_reg;</div><div class='ctx'> 	int val;</div><div class='ctx'> </div><div class='ctx'> 	val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1);</div><div class='hunk'>@@ -298,49 +489,56 @@ static int aqr107_read_rate(struct phy_device *phydev)</div><div class='ctx'> 	switch (FIELD_GET(MDIO_AN_TX_VEND_STATUS1_RATE_MASK, val)) {</div><div class='ctx'> 	case MDIO_AN_TX_VEND_STATUS1_10BASET:</div><div class='ctx'> 		phydev-&gt;speed = SPEED_10;</div><div class='del'>-		config_reg = VEND1_GLOBAL_CFG_10M;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_AN_TX_VEND_STATUS1_100BASETX:</div><div class='ctx'> 		phydev-&gt;speed = SPEED_100;</div><div class='del'>-		config_reg = VEND1_GLOBAL_CFG_100M;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_AN_TX_VEND_STATUS1_1000BASET:</div><div class='ctx'> 		phydev-&gt;speed = SPEED_1000;</div><div class='del'>-		config_reg = VEND1_GLOBAL_CFG_1G;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_AN_TX_VEND_STATUS1_2500BASET:</div><div class='ctx'> 		phydev-&gt;speed = SPEED_2500;</div><div class='del'>-		config_reg = VEND1_GLOBAL_CFG_2_5G;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_AN_TX_VEND_STATUS1_5000BASET:</div><div class='ctx'> 		phydev-&gt;speed = SPEED_5000;</div><div class='del'>-		config_reg = VEND1_GLOBAL_CFG_5G;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_AN_TX_VEND_STATUS1_10GBASET:</div><div class='ctx'> 		phydev-&gt;speed = SPEED_10000;</div><div class='del'>-		config_reg = VEND1_GLOBAL_CFG_10G;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		phydev-&gt;speed = SPEED_UNKNOWN;</div><div class='del'>-		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg);</div><div class='del'>-	if (val &lt; 0)</div><div class='del'>-		return val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (FIELD_GET(VEND1_GLOBAL_CFG_RATE_ADAPT, val) ==</div><div class='del'>-	    VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE)</div><div class='del'>-		phydev-&gt;rate_matching = RATE_MATCH_PAUSE;</div><div class='del'>-	else</div><div class='del'>-		phydev-&gt;rate_matching = RATE_MATCH_NONE;</div><div class='add'>+/* Quad port PHYs like AQR412(C) have 4 system interfaces, but they can also be</div><div class='add'>+ * used with a single system interface over which all 4 ports are multiplexed</div><div class='add'>+ * (10G-QXGMII). To the MDIO registers, this mode is indistinguishable from</div><div class='add'>+ * USXGMII (which implies a single 10G port).</div><div class='add'>+ *</div><div class='add'>+ * To not rely solely on the device tree, we allow the regular system interface</div><div class='add'>+ * detection to work as usual, but we replace USXGMII with 10G-QXGMII based on</div><div class='add'>+ * the specific fingerprint of firmware images that are known to be for MUSX.</div><div class='add'>+ */</div><div class='add'>+static phy_interface_t aqr_translate_interface(struct phy_device *phydev,</div><div class='add'>+					       phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct aqr107_priv *priv = phydev-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (phy_id_compare(phydev-&gt;drv-&gt;phy_id, PHY_ID_AQR412C, phydev-&gt;drv-&gt;phy_id_mask) &amp;&amp;</div><div class='add'>+	    priv-&gt;fingerprint == AQR_G3_V4_3_C_AQR_NXP_SPF_30841_MUSX_ID40019_VER1198 &amp;&amp;</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_USXGMII)</div><div class='add'>+		return PHY_INTERFACE_MODE_10G_QXGMII;</div><div class='add'>+</div><div class='add'>+	return interface;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aqr107_read_status(struct phy_device *phydev)</div><div class='add'>+static int aqr_gen1_read_status(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	int val, ret;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	int ret;</div><div class='add'>+	int val;</div><div class='ctx'> </div><div class='ctx'> 	ret = aqr_read_status(phydev);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -349,8 +547,7 @@ static int aqr107_read_status(struct phy_device *phydev)</div><div class='ctx'> 	if (!phydev-&gt;link || phydev-&gt;autoneg == AUTONEG_DISABLE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	/**</div><div class='del'>-	 * The status register is not immediately correct on line side link up.</div><div class='add'>+	/* The status register is not immediately correct on line side link up.</div><div class='ctx'> 	 * Poll periodically until it reflects the correct ON state.</div><div class='ctx'> 	 * Only return fail for read error, timeout defaults to OFF state.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -365,38 +562,65 @@ static int aqr107_read_status(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	switch (FIELD_GET(MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK, val)) {</div><div class='ctx'> 	case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR:</div><div class='del'>-		phydev-&gt;interface = PHY_INTERFACE_MODE_10GKR;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_10GKR;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_PHYXS_VEND_IF_STATUS_TYPE_KX:</div><div class='del'>-		phydev-&gt;interface = PHY_INTERFACE_MODE_1000BASEKX;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_1000BASEKX;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XFI:</div><div class='del'>-		phydev-&gt;interface = PHY_INTERFACE_MODE_10GBASER;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_10GBASER;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_PHYXS_VEND_IF_STATUS_TYPE_USXGMII:</div><div class='del'>-		phydev-&gt;interface = PHY_INTERFACE_MODE_USXGMII;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_USXGMII;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_PHYXS_VEND_IF_STATUS_TYPE_XAUI:</div><div class='del'>-		phydev-&gt;interface = PHY_INTERFACE_MODE_XAUI;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_XAUI;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_PHYXS_VEND_IF_STATUS_TYPE_SGMII:</div><div class='del'>-		phydev-&gt;interface = PHY_INTERFACE_MODE_SGMII;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_SGMII;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_PHYXS_VEND_IF_STATUS_TYPE_RXAUI:</div><div class='del'>-		phydev-&gt;interface = PHY_INTERFACE_MODE_RXAUI;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_RXAUI;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_PHYXS_VEND_IF_STATUS_TYPE_OCSGMII:</div><div class='del'>-		phydev-&gt;interface = PHY_INTERFACE_MODE_2500BASEX;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_2500BASEX;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_PHYXS_VEND_IF_STATUS_TYPE_OFF:</div><div class='ctx'> 	default:</div><div class='ctx'> 		phydev-&gt;link = false;</div><div class='del'>-		phydev-&gt;interface = PHY_INTERFACE_MODE_NA;</div><div class='add'>+		interface = PHY_INTERFACE_MODE_NA;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Read possibly downshifted rate from vendor register */</div><div class='del'>-	return aqr107_read_rate(phydev);</div><div class='add'>+	phydev-&gt;interface = aqr_translate_interface(phydev, interface);</div><div class='add'>+</div><div class='add'>+	/* Read rate from vendor register */</div><div class='add'>+	return aqr_gen1_read_rate(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aqr_gen2_read_status(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct aqr107_priv *priv = phydev-&gt;priv;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	ret = aqr_gen1_read_status(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQR_NUM_GLOBAL_CFG; i++) {</div><div class='add'>+		struct aqr_global_syscfg *syscfg = &amp;priv-&gt;global_cfg[i];</div><div class='add'>+</div><div class='add'>+		if (syscfg-&gt;speed != phydev-&gt;speed)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (syscfg-&gt;rate_adapt == AQR_RATE_ADAPT_PAUSE)</div><div class='add'>+			phydev-&gt;rate_matching = RATE_MATCH_PAUSE;</div><div class='add'>+		else</div><div class='add'>+			phydev-&gt;rate_matching = RATE_MATCH_NONE;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aqr107_get_downshift(struct phy_device *phydev, u8 *data)</div><div class='hunk'>@@ -481,27 +705,46 @@ int aqr_wait_reset_complete(struct phy_device *phydev)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void aqr107_chip_info(struct phy_device *phydev)</div><div class='add'>+static int aqr_build_fingerprint(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	u8 fw_major, fw_minor, build_id, prov_id;</div><div class='add'>+	struct aqr107_priv *priv = phydev-&gt;priv;</div><div class='add'>+	u16 misc_id, misc_ver;</div><div class='ctx'> 	int val;</div><div class='ctx'> </div><div class='ctx'> 	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID);</div><div class='ctx'> 	if (val &lt; 0)</div><div class='del'>-		return;</div><div class='add'>+		return val;</div><div class='ctx'> </div><div class='ctx'> 	fw_major = FIELD_GET(VEND1_GLOBAL_FW_ID_MAJOR, val);</div><div class='ctx'> 	fw_minor = FIELD_GET(VEND1_GLOBAL_FW_ID_MINOR, val);</div><div class='ctx'> </div><div class='ctx'> 	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT1);</div><div class='ctx'> 	if (val &lt; 0)</div><div class='del'>-		return;</div><div class='add'>+		return val;</div><div class='ctx'> </div><div class='ctx'> 	build_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_FW_BUILD_ID, val);</div><div class='ctx'> 	prov_id = FIELD_GET(VEND1_GLOBAL_RSVD_STAT1_PROV_ID, val);</div><div class='ctx'> </div><div class='del'>-	phydev_dbg(phydev, "FW %u.%u, Build %u, Provisioning %u\n",</div><div class='del'>-		   fw_major, fw_minor, build_id, prov_id);</div><div class='add'>+	val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PMAPMD_FW_MISC_ID);</div><div class='add'>+	if (val &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+</div><div class='add'>+	misc_id = val;</div><div class='add'>+</div><div class='add'>+	val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PMAPMD_FW_MISC_VER);</div><div class='add'>+	if (val &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+</div><div class='add'>+	misc_ver = val;</div><div class='add'>+</div><div class='add'>+	priv-&gt;fingerprint = AQR_FW_FINGERPRINT(fw_major, fw_minor, build_id,</div><div class='add'>+					       prov_id, misc_id, misc_ver);</div><div class='add'>+</div><div class='add'>+	phydev_dbg(phydev, "FW %u.%u, Build %u, Provisioning %u, Misc ID %u, Version %u\n",</div><div class='add'>+		   fw_major, fw_minor, build_id, prov_id, misc_id, misc_ver);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aqr107_config_mdi(struct phy_device *phydev)</div><div class='hunk'>@@ -527,7 +770,7 @@ static int aqr107_config_mdi(struct phy_device *phydev)</div><div class='ctx'> 			      mdi_conf | PMAPMD_RSVD_VEND_PROV_MDI_FORCE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aqr107_config_init(struct phy_device *phydev)</div><div class='add'>+static int aqr_gen1_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct aqr107_priv *priv = phydev-&gt;priv;</div><div class='ctx'> 	u32 led_idx;</div><div class='hunk'>@@ -539,6 +782,7 @@ static int aqr107_config_init(struct phy_device *phydev)</div><div class='ctx'> 	    phydev-&gt;interface != PHY_INTERFACE_MODE_2500BASEX &amp;&amp;</div><div class='ctx'> 	    phydev-&gt;interface != PHY_INTERFACE_MODE_XGMII &amp;&amp;</div><div class='ctx'> 	    phydev-&gt;interface != PHY_INTERFACE_MODE_USXGMII &amp;&amp;</div><div class='add'>+	    phydev-&gt;interface != PHY_INTERFACE_MODE_10G_QXGMII &amp;&amp;</div><div class='ctx'> 	    phydev-&gt;interface != PHY_INTERFACE_MODE_10GKR &amp;&amp;</div><div class='ctx'> 	    phydev-&gt;interface != PHY_INTERFACE_MODE_10GBASER &amp;&amp;</div><div class='ctx'> 	    phydev-&gt;interface != PHY_INTERFACE_MODE_XAUI &amp;&amp;</div><div class='hunk'>@@ -549,8 +793,14 @@ static int aqr107_config_init(struct phy_device *phydev)</div><div class='ctx'> 	     "Your devicetree is out of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n");</div><div class='ctx'> </div><div class='ctx'> 	ret = aqr_wait_reset_complete(phydev);</div><div class='del'>-	if (!ret)</div><div class='del'>-		aqr107_chip_info(phydev);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		/* The PHY might work without a firmware image, so only build a</div><div class='add'>+		 * fingerprint if the firmware was initialized.</div><div class='add'>+		 */</div><div class='add'>+		ret = aqr_build_fingerprint(phydev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -576,20 +826,145 @@ static int aqr107_config_init(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aqcs109_config_init(struct phy_device *phydev)</div><div class='add'>+/* Walk the media-speed configuration registers to determine which</div><div class='add'>+ * host-side serdes modes may be used by the PHY depending on the</div><div class='add'>+ * negotiated media speed.</div><div class='add'>+ */</div><div class='add'>+static int aqr_gen2_read_global_syscfg(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct aqr107_priv *priv = phydev-&gt;priv;</div><div class='add'>+	unsigned int serdes_mode, rate_adapt;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	int i, val;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQR_NUM_GLOBAL_CFG; i++) {</div><div class='add'>+		struct aqr_global_syscfg *syscfg = &amp;priv-&gt;global_cfg[i];</div><div class='add'>+</div><div class='add'>+		syscfg-&gt;speed = aqr_global_cfg_regs[i].speed;</div><div class='add'>+</div><div class='add'>+		val = phy_read_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+				   aqr_global_cfg_regs[i].reg);</div><div class='add'>+		if (val &lt; 0)</div><div class='add'>+			return val;</div><div class='add'>+</div><div class='add'>+		serdes_mode = FIELD_GET(VEND1_GLOBAL_CFG_SERDES_MODE, val);</div><div class='add'>+		rate_adapt = FIELD_GET(VEND1_GLOBAL_CFG_RATE_ADAPT, val);</div><div class='add'>+</div><div class='add'>+		switch (serdes_mode) {</div><div class='add'>+		case VEND1_GLOBAL_CFG_SERDES_MODE_XFI:</div><div class='add'>+			if (rate_adapt == VEND1_GLOBAL_CFG_RATE_ADAPT_USX)</div><div class='add'>+				interface = PHY_INTERFACE_MODE_USXGMII;</div><div class='add'>+			else</div><div class='add'>+				interface = PHY_INTERFACE_MODE_10GBASER;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case VEND1_GLOBAL_CFG_SERDES_MODE_XFI5G:</div><div class='add'>+			interface = PHY_INTERFACE_MODE_5GBASER;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case VEND1_GLOBAL_CFG_SERDES_MODE_OCSGMII:</div><div class='add'>+			interface = PHY_INTERFACE_MODE_2500BASEX;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case VEND1_GLOBAL_CFG_SERDES_MODE_SGMII:</div><div class='add'>+			interface = PHY_INTERFACE_MODE_SGMII;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			phydev_warn(phydev, "unrecognised serdes mode %u\n",</div><div class='add'>+				    serdes_mode);</div><div class='add'>+			interface = PHY_INTERFACE_MODE_NA;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		syscfg-&gt;interface = aqr_translate_interface(phydev, interface);</div><div class='add'>+</div><div class='add'>+		switch (rate_adapt) {</div><div class='add'>+		case VEND1_GLOBAL_CFG_RATE_ADAPT_NONE:</div><div class='add'>+			syscfg-&gt;rate_adapt = AQR_RATE_ADAPT_NONE;</div><div class='add'>+			break;</div><div class='add'>+		case VEND1_GLOBAL_CFG_RATE_ADAPT_USX:</div><div class='add'>+			syscfg-&gt;rate_adapt = AQR_RATE_ADAPT_USX;</div><div class='add'>+			break;</div><div class='add'>+		case VEND1_GLOBAL_CFG_RATE_ADAPT_PAUSE:</div><div class='add'>+			syscfg-&gt;rate_adapt = AQR_RATE_ADAPT_PAUSE;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			phydev_warn(phydev, "unrecognized rate adapt mode %u\n",</div><div class='add'>+				    rate_adapt);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phydev_dbg(phydev,</div><div class='add'>+			   "Media speed %d uses host interface %s with %s\n",</div><div class='add'>+			   syscfg-&gt;speed, phy_modes(syscfg-&gt;interface),</div><div class='add'>+			   syscfg-&gt;rate_adapt == AQR_RATE_ADAPT_NONE ? "no rate adaptation" :</div><div class='add'>+			   syscfg-&gt;rate_adapt == AQR_RATE_ADAPT_PAUSE ? "rate adaptation through flow control" :</div><div class='add'>+			   syscfg-&gt;rate_adapt == AQR_RATE_ADAPT_USX ? "rate adaptation through symbol replication" :</div><div class='add'>+			   "unrecognized rate adaptation type");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aqr_gen2_fill_interface_modes(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	unsigned long *possible = phydev-&gt;possible_interfaces;</div><div class='add'>+	struct aqr107_priv *priv = phydev-&gt;priv;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	int i, val, ret;</div><div class='add'>+</div><div class='add'>+	/* It's been observed on some models that - when coming out of suspend</div><div class='add'>+	 * - the FW signals that the PHY is ready but the GLOBAL_CFG registers</div><div class='add'>+	 * continue on returning zeroes for some time. Let's poll the 100M</div><div class='add'>+	 * register until it returns a real value as both 113c and 115c support</div><div class='add'>+	 * this mode.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;wait_on_global_cfg) {</div><div class='add'>+		ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,</div><div class='add'>+						VEND1_GLOBAL_CFG_100M, val,</div><div class='add'>+						val != 0, 1000, 100000, false);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = aqr_gen2_read_global_syscfg(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQR_NUM_GLOBAL_CFG; i++) {</div><div class='add'>+		interface = priv-&gt;global_cfg[i].interface;</div><div class='add'>+		if (interface != PHY_INTERFACE_MODE_NA)</div><div class='add'>+			__set_bit(interface, possible);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aqr_gen2_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	ret = aqr_gen1_config_init(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return aqr_gen2_fill_interface_modes(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aqr_gen3_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return aqr_gen2_config_init(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aqcs109_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='ctx'> 	/* Check that the PHY interface type is compatible */</div><div class='ctx'> 	if (phydev-&gt;interface != PHY_INTERFACE_MODE_SGMII &amp;&amp;</div><div class='ctx'> 	    phydev-&gt;interface != PHY_INTERFACE_MODE_2500BASEX)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	ret = aqr_wait_reset_complete(phydev);</div><div class='del'>-	if (!ret)</div><div class='del'>-		aqr107_chip_info(phydev);</div><div class='del'>-</div><div class='del'>-	return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);</div><div class='add'>+	return aqr_gen2_config_init(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void aqr107_link_change_notify(struct phy_device *phydev)</div><div class='hunk'>@@ -637,7 +1012,7 @@ static void aqr107_link_change_notify(struct phy_device *phydev)</div><div class='ctx'> 		phydev_info(phydev, "Aquantia 1000Base-T2 mode active\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aqr107_wait_processor_intensive_op(struct phy_device *phydev)</div><div class='add'>+static int aqr_gen1_wait_processor_intensive_op(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int val, err;</div><div class='ctx'> </div><div class='hunk'>@@ -661,17 +1036,16 @@ static int aqr107_wait_processor_intensive_op(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aqr107_get_rate_matching(struct phy_device *phydev,</div><div class='del'>-				    phy_interface_t iface)</div><div class='add'>+static int aqr_gen2_get_rate_matching(struct phy_device *phydev,</div><div class='add'>+				      phy_interface_t iface)</div><div class='ctx'> {</div><div class='ctx'> 	if (iface == PHY_INTERFACE_MODE_10GBASER ||</div><div class='del'>-	    iface == PHY_INTERFACE_MODE_2500BASEX ||</div><div class='del'>-	    iface == PHY_INTERFACE_MODE_NA)</div><div class='add'>+	    iface == PHY_INTERFACE_MODE_2500BASEX)</div><div class='ctx'> 		return RATE_MATCH_PAUSE;</div><div class='ctx'> 	return RATE_MATCH_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aqr107_suspend(struct phy_device *phydev)</div><div class='add'>+static int aqr_gen1_suspend(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -680,10 +1054,10 @@ static int aqr107_suspend(struct phy_device *phydev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return aqr107_wait_processor_intensive_op(phydev);</div><div class='add'>+	return aqr_gen1_wait_processor_intensive_op(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aqr107_resume(struct phy_device *phydev)</div><div class='add'>+static int aqr_gen1_resume(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -692,89 +1066,7 @@ static int aqr107_resume(struct phy_device *phydev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return aqr107_wait_processor_intensive_op(phydev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const u16 aqr_global_cfg_regs[] = {</div><div class='del'>-	VEND1_GLOBAL_CFG_10M,</div><div class='del'>-	VEND1_GLOBAL_CFG_100M,</div><div class='del'>-	VEND1_GLOBAL_CFG_1G,</div><div class='del'>-	VEND1_GLOBAL_CFG_2_5G,</div><div class='del'>-	VEND1_GLOBAL_CFG_5G,</div><div class='del'>-	VEND1_GLOBAL_CFG_10G</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int aqr107_fill_interface_modes(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	unsigned long *possible = phydev-&gt;possible_interfaces;</div><div class='del'>-	unsigned int serdes_mode, rate_adapt;</div><div class='del'>-	phy_interface_t interface;</div><div class='del'>-	int i, val;</div><div class='del'>-</div><div class='del'>-	/* Walk the media-speed configuration registers to determine which</div><div class='del'>-	 * host-side serdes modes may be used by the PHY depending on the</div><div class='del'>-	 * negotiated media speed.</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(aqr_global_cfg_regs); i++) {</div><div class='del'>-		val = phy_read_mmd(phydev, MDIO_MMD_VEND1,</div><div class='del'>-				   aqr_global_cfg_regs[i]);</div><div class='del'>-		if (val &lt; 0)</div><div class='del'>-			return val;</div><div class='del'>-</div><div class='del'>-		serdes_mode = FIELD_GET(VEND1_GLOBAL_CFG_SERDES_MODE, val);</div><div class='del'>-		rate_adapt = FIELD_GET(VEND1_GLOBAL_CFG_RATE_ADAPT, val);</div><div class='del'>-</div><div class='del'>-		switch (serdes_mode) {</div><div class='del'>-		case VEND1_GLOBAL_CFG_SERDES_MODE_XFI:</div><div class='del'>-			if (rate_adapt == VEND1_GLOBAL_CFG_RATE_ADAPT_USX)</div><div class='del'>-				interface = PHY_INTERFACE_MODE_USXGMII;</div><div class='del'>-			else</div><div class='del'>-				interface = PHY_INTERFACE_MODE_10GBASER;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case VEND1_GLOBAL_CFG_SERDES_MODE_XFI5G:</div><div class='del'>-			interface = PHY_INTERFACE_MODE_5GBASER;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case VEND1_GLOBAL_CFG_SERDES_MODE_OCSGMII:</div><div class='del'>-			interface = PHY_INTERFACE_MODE_2500BASEX;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case VEND1_GLOBAL_CFG_SERDES_MODE_SGMII:</div><div class='del'>-			interface = PHY_INTERFACE_MODE_SGMII;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-			phydev_warn(phydev, "unrecognised serdes mode %u\n",</div><div class='del'>-				    serdes_mode);</div><div class='del'>-			interface = PHY_INTERFACE_MODE_NA;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (interface != PHY_INTERFACE_MODE_NA)</div><div class='del'>-			__set_bit(interface, possible);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int aqr113c_fill_interface_modes(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	int val, ret;</div><div class='del'>-</div><div class='del'>-	/* It's been observed on some models that - when coming out of suspend</div><div class='del'>-	 * - the FW signals that the PHY is ready but the GLOBAL_CFG registers</div><div class='del'>-	 * continue on returning zeroes for some time. Let's poll the 100M</div><div class='del'>-	 * register until it returns a real value as both 113c and 115c support</div><div class='del'>-	 * this mode.</div><div class='del'>-	 */</div><div class='del'>-	ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,</div><div class='del'>-					VEND1_GLOBAL_CFG_100M, val, val != 0,</div><div class='del'>-					1000, 100000, false);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return aqr107_fill_interface_modes(phydev);</div><div class='add'>+	return aqr_gen1_wait_processor_intensive_op(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aqr115c_get_features(struct phy_device *phydev)</div><div class='hunk'>@@ -802,11 +1094,14 @@ static int aqr111_get_features(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int aqr113c_config_init(struct phy_device *phydev)</div><div class='add'>+static int aqr_gen4_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='add'>+	struct aqr107_priv *priv = phydev-&gt;priv;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = aqr107_config_init(phydev);</div><div class='add'>+	priv-&gt;wait_on_global_cfg = true;</div><div class='add'>+</div><div class='add'>+	ret = aqr_gen3_config_init(phydev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -815,11 +1110,55 @@ static int aqr113c_config_init(struct phy_device *phydev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = aqr107_wait_processor_intensive_op(phydev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	return aqr_gen1_wait_processor_intensive_op(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int aqr_gen2_inband_caps(struct phy_device *phydev,</div><div class='add'>+					 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_USXGMII ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_10G_QXGMII)</div><div class='add'>+		return LINK_INBAND_ENABLE | LINK_INBAND_DISABLE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aqr_gen2_config_inband(struct phy_device *phydev, unsigned int modes)</div><div class='add'>+{</div><div class='add'>+	struct aqr107_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;interface == PHY_INTERFACE_MODE_USXGMII ||</div><div class='add'>+	    phydev-&gt;interface == PHY_INTERFACE_MODE_10G_QXGMII) {</div><div class='add'>+		u16 set = 0;</div><div class='add'>+</div><div class='add'>+		if (modes == LINK_INBAND_ENABLE)</div><div class='add'>+			set = MDIO_PHYXS_VEND_PROV2_USX_AN;</div><div class='add'>+</div><div class='add'>+		return phy_modify_mmd(phydev, MDIO_MMD_PHYXS,</div><div class='add'>+				      MDIO_PHYXS_VEND_PROV2,</div><div class='add'>+				      MDIO_PHYXS_VEND_PROV2_USX_AN, set);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; AQR_NUM_GLOBAL_CFG; i++) {</div><div class='add'>+		struct aqr_global_syscfg *syscfg = &amp;priv-&gt;global_cfg[i];</div><div class='add'>+		u16 set = 0;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		if (syscfg-&gt;interface != phydev-&gt;interface)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (modes == LINK_INBAND_ENABLE)</div><div class='add'>+			set = VEND1_GLOBAL_CFG_AUTONEG_ENA;</div><div class='ctx'> </div><div class='del'>-	return aqr113c_fill_interface_modes(phydev);</div><div class='add'>+		err = phy_modify_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+				     aqr_global_cfg_regs[i].reg,</div><div class='add'>+				     VEND1_GLOBAL_CFG_AUTONEG_ENA, set);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int aqr107_probe(struct phy_device *phydev)</div><div class='hunk'>@@ -859,12 +1198,15 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR105),</div><div class='ctx'> 	.name		= "Aquantia AQR105",</div><div class='del'>-	.config_aneg    = aqr_config_aneg,</div><div class='add'>+	.get_features	= aqr105_get_features,</div><div class='add'>+	.probe		= aqr107_probe,</div><div class='add'>+	.config_init	= aqr_gen1_config_init,</div><div class='add'>+	.config_aneg    = aqr105_config_aneg,</div><div class='ctx'> 	.config_intr	= aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='del'>-	.read_status	= aqr_read_status,</div><div class='del'>-	.suspend	= aqr107_suspend,</div><div class='del'>-	.resume		= aqr107_resume,</div><div class='add'>+	.read_status	= aqr_gen1_read_status,</div><div class='add'>+	.suspend	= aqr_gen1_suspend,</div><div class='add'>+	.resume		= aqr_gen1_resume,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR106),</div><div class='hunk'>@@ -878,16 +1220,16 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR107),</div><div class='ctx'> 	.name		= "Aquantia AQR107",</div><div class='ctx'> 	.probe		= aqr107_probe,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='del'>-	.config_init	= aqr107_config_init,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='add'>+	.config_init	= aqr_gen2_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr	= aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='del'>-	.read_status	= aqr107_read_status,</div><div class='add'>+	.read_status	= aqr_gen2_read_status,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend	= aqr107_suspend,</div><div class='del'>-	.resume		= aqr107_resume,</div><div class='add'>+	.suspend	= aqr_gen1_suspend,</div><div class='add'>+	.resume		= aqr_gen1_resume,</div><div class='ctx'> 	.get_sset_count	= aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings	= aqr107_get_strings,</div><div class='ctx'> 	.get_stats	= aqr107_get_stats,</div><div class='hunk'>@@ -897,21 +1239,23 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQCS109),</div><div class='ctx'> 	.name		= "Aquantia AQCS109",</div><div class='ctx'> 	.probe		= aqr107_probe,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='ctx'> 	.config_init	= aqcs109_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr	= aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='del'>-	.read_status	= aqr107_read_status,</div><div class='add'>+	.read_status	= aqr_gen2_read_status,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend	= aqr107_suspend,</div><div class='del'>-	.resume		= aqr107_resume,</div><div class='add'>+	.suspend	= aqr_gen1_suspend,</div><div class='add'>+	.resume		= aqr_gen1_resume,</div><div class='ctx'> 	.get_sset_count	= aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings	= aqr107_get_strings,</div><div class='ctx'> 	.get_stats	= aqr107_get_stats,</div><div class='hunk'>@@ -922,21 +1266,23 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR111),</div><div class='ctx'> 	.name		= "Aquantia AQR111",</div><div class='ctx'> 	.probe		= aqr107_probe,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='del'>-	.config_init	= aqr107_config_init,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='add'>+	.config_init	= aqr_gen3_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr	= aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='del'>-	.read_status	= aqr107_read_status,</div><div class='add'>+	.read_status	= aqr_gen2_read_status,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend	= aqr107_suspend,</div><div class='del'>-	.resume		= aqr107_resume,</div><div class='add'>+	.suspend	= aqr_gen1_suspend,</div><div class='add'>+	.resume		= aqr_gen1_resume,</div><div class='ctx'> 	.get_sset_count	= aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings	= aqr107_get_strings,</div><div class='ctx'> 	.get_stats	= aqr107_get_stats,</div><div class='hunk'>@@ -947,21 +1293,23 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0),</div><div class='ctx'> 	.name		= "Aquantia AQR111B0",</div><div class='ctx'> 	.probe		= aqr107_probe,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='del'>-	.config_init	= aqr107_config_init,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='add'>+	.config_init	= aqr_gen3_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr	= aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='del'>-	.read_status	= aqr107_read_status,</div><div class='add'>+	.read_status	= aqr_gen2_read_status,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend	= aqr107_suspend,</div><div class='del'>-	.resume		= aqr107_resume,</div><div class='add'>+	.suspend	= aqr_gen1_suspend,</div><div class='add'>+	.resume		= aqr_gen1_resume,</div><div class='ctx'> 	.get_sset_count	= aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings	= aqr107_get_strings,</div><div class='ctx'> 	.get_stats	= aqr107_get_stats,</div><div class='hunk'>@@ -972,6 +1320,8 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR405),</div><div class='hunk'>@@ -980,20 +1330,23 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.config_intr	= aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='ctx'> 	.read_status	= aqr_read_status,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR112),</div><div class='ctx'> 	.name		= "Aquantia AQR112",</div><div class='ctx'> 	.probe		= aqr107_probe,</div><div class='add'>+	.config_init	= aqr_gen3_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr	= aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend	= aqr107_suspend,</div><div class='del'>-	.resume		= aqr107_resume,</div><div class='del'>-	.read_status	= aqr107_read_status,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='add'>+	.suspend	= aqr_gen1_suspend,</div><div class='add'>+	.resume		= aqr_gen1_resume,</div><div class='add'>+	.read_status	= aqr_gen2_read_status,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='ctx'> 	.get_sset_count = aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings	= aqr107_get_strings,</div><div class='ctx'> 	.get_stats	= aqr107_get_stats,</div><div class='hunk'>@@ -1003,39 +1356,65 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR412),</div><div class='ctx'> 	.name		= "Aquantia AQR412",</div><div class='ctx'> 	.probe		= aqr107_probe,</div><div class='add'>+	.config_init	= aqr_gen3_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr	= aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend	= aqr107_suspend,</div><div class='del'>-	.resume		= aqr107_resume,</div><div class='del'>-	.read_status	= aqr107_read_status,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='add'>+	.suspend	= aqr_gen1_suspend,</div><div class='add'>+	.resume		= aqr_gen1_resume,</div><div class='add'>+	.read_status	= aqr_gen2_read_status,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='ctx'> 	.get_sset_count = aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings	= aqr107_get_strings,</div><div class='ctx'> 	.get_stats	= aqr107_get_stats,</div><div class='ctx'> 	.link_change_notify = aqr107_link_change_notify,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='add'>+},</div><div class='add'>+{</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_AQR412C),</div><div class='add'>+	.name		= "Aquantia AQR412C",</div><div class='add'>+	.probe		= aqr107_probe,</div><div class='add'>+	.config_init	= aqr_gen3_config_init,</div><div class='add'>+	.config_aneg    = aqr_config_aneg,</div><div class='add'>+	.config_intr	= aqr_config_intr,</div><div class='add'>+	.handle_interrupt = aqr_handle_interrupt,</div><div class='add'>+	.get_tunable    = aqr107_get_tunable,</div><div class='add'>+	.set_tunable    = aqr107_set_tunable,</div><div class='add'>+	.suspend	= aqr_gen1_suspend,</div><div class='add'>+	.resume		= aqr_gen1_resume,</div><div class='add'>+	.read_status	= aqr_gen2_read_status,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='add'>+	.get_sset_count = aqr107_get_sset_count,</div><div class='add'>+	.get_strings	= aqr107_get_strings,</div><div class='add'>+	.get_stats	= aqr107_get_stats,</div><div class='add'>+	.link_change_notify = aqr107_link_change_notify,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR113),</div><div class='ctx'> 	.name		= "Aquantia AQR113",</div><div class='ctx'> 	.probe          = aqr107_probe,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='del'>-	.config_init    = aqr113c_config_init,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='add'>+	.config_init    = aqr_gen4_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr    = aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt       = aqr_handle_interrupt,</div><div class='del'>-	.read_status    = aqr107_read_status,</div><div class='add'>+	.read_status    = aqr_gen2_read_status,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend        = aqr107_suspend,</div><div class='del'>-	.resume         = aqr107_resume,</div><div class='add'>+	.suspend        = aqr_gen1_suspend,</div><div class='add'>+	.resume         = aqr_gen1_resume,</div><div class='ctx'> 	.get_sset_count = aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings    = aqr107_get_strings,</div><div class='ctx'> 	.get_stats      = aqr107_get_stats,</div><div class='hunk'>@@ -1045,21 +1424,23 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR113C),</div><div class='ctx'> 	.name           = "Aquantia AQR113C",</div><div class='ctx'> 	.probe          = aqr107_probe,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='del'>-	.config_init    = aqr113c_config_init,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='add'>+	.config_init    = aqr_gen4_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr    = aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt       = aqr_handle_interrupt,</div><div class='del'>-	.read_status    = aqr107_read_status,</div><div class='add'>+	.read_status    = aqr_gen2_read_status,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend        = aqr107_suspend,</div><div class='del'>-	.resume         = aqr107_resume,</div><div class='add'>+	.suspend        = aqr_gen1_suspend,</div><div class='add'>+	.resume         = aqr_gen1_resume,</div><div class='ctx'> 	.get_sset_count = aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings    = aqr107_get_strings,</div><div class='ctx'> 	.get_stats      = aqr107_get_stats,</div><div class='hunk'>@@ -1069,21 +1450,23 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps    = aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband  = aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR114C),</div><div class='ctx'> 	.name           = "Aquantia AQR114C",</div><div class='ctx'> 	.probe          = aqr107_probe,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='del'>-	.config_init    = aqr107_config_init,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='add'>+	.config_init    = aqr_gen4_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr    = aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='del'>-	.read_status    = aqr107_read_status,</div><div class='add'>+	.read_status    = aqr_gen2_read_status,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend        = aqr107_suspend,</div><div class='del'>-	.resume         = aqr107_resume,</div><div class='add'>+	.suspend        = aqr_gen1_suspend,</div><div class='add'>+	.resume         = aqr_gen1_resume,</div><div class='ctx'> 	.get_sset_count = aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings    = aqr107_get_strings,</div><div class='ctx'> 	.get_stats      = aqr107_get_stats,</div><div class='hunk'>@@ -1094,21 +1477,50 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps    = aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband  = aqr_gen2_config_inband,</div><div class='add'>+},</div><div class='add'>+{</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_AQR115),</div><div class='add'>+	.name		= "Aquantia AQR115",</div><div class='add'>+	.probe		= aqr107_probe,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='add'>+	.config_init	= aqr_gen4_config_init,</div><div class='add'>+	.config_aneg	= aqr_config_aneg,</div><div class='add'>+	.config_intr	= aqr_config_intr,</div><div class='add'>+	.handle_interrupt = aqr_handle_interrupt,</div><div class='add'>+	.read_status	= aqr_gen2_read_status,</div><div class='add'>+	.get_tunable    = aqr107_get_tunable,</div><div class='add'>+	.set_tunable    = aqr107_set_tunable,</div><div class='add'>+	.suspend	= aqr_gen1_suspend,</div><div class='add'>+	.resume		= aqr_gen1_resume,</div><div class='add'>+	.get_sset_count	= aqr107_get_sset_count,</div><div class='add'>+	.get_strings	= aqr107_get_strings,</div><div class='add'>+	.get_stats	= aqr107_get_stats,</div><div class='add'>+	.get_features	= aqr115c_get_features,</div><div class='add'>+	.link_change_notify = aqr107_link_change_notify,</div><div class='add'>+	.led_brightness_set = aqr_phy_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = aqr_phy_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='add'>+	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='add'>+	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR115C),</div><div class='ctx'> 	.name           = "Aquantia AQR115C",</div><div class='ctx'> 	.probe          = aqr107_probe,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='del'>-	.config_init    = aqr113c_config_init,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='add'>+	.config_init    = aqr_gen4_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr    = aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='del'>-	.read_status    = aqr107_read_status,</div><div class='add'>+	.read_status    = aqr_gen2_read_status,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend        = aqr107_suspend,</div><div class='del'>-	.resume         = aqr107_resume,</div><div class='add'>+	.suspend        = aqr_gen1_suspend,</div><div class='add'>+	.resume         = aqr_gen1_resume,</div><div class='ctx'> 	.get_sset_count = aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings    = aqr107_get_strings,</div><div class='ctx'> 	.get_stats      = aqr107_get_stats,</div><div class='hunk'>@@ -1119,21 +1531,23 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(PHY_ID_AQR813),</div><div class='ctx'> 	.name		= "Aquantia AQR813",</div><div class='ctx'> 	.probe		= aqr107_probe,</div><div class='del'>-	.get_rate_matching = aqr107_get_rate_matching,</div><div class='del'>-	.config_init	= aqr107_config_init,</div><div class='add'>+	.get_rate_matching = aqr_gen2_get_rate_matching,</div><div class='add'>+	.config_init	= aqr_gen4_config_init,</div><div class='ctx'> 	.config_aneg    = aqr_config_aneg,</div><div class='ctx'> 	.config_intr	= aqr_config_intr,</div><div class='ctx'> 	.handle_interrupt = aqr_handle_interrupt,</div><div class='del'>-	.read_status	= aqr107_read_status,</div><div class='add'>+	.read_status	= aqr_gen2_read_status,</div><div class='ctx'> 	.get_tunable    = aqr107_get_tunable,</div><div class='ctx'> 	.set_tunable    = aqr107_set_tunable,</div><div class='del'>-	.suspend	= aqr107_suspend,</div><div class='del'>-	.resume		= aqr107_resume,</div><div class='add'>+	.suspend	= aqr_gen1_suspend,</div><div class='add'>+	.resume		= aqr_gen1_resume,</div><div class='ctx'> 	.get_sset_count	= aqr107_get_sset_count,</div><div class='ctx'> 	.get_strings	= aqr107_get_strings,</div><div class='ctx'> 	.get_stats	= aqr107_get_stats,</div><div class='hunk'>@@ -1143,12 +1557,14 @@ static struct phy_driver aqr_driver[] = {</div><div class='ctx'> 	.led_hw_control_set = aqr_phy_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get = aqr_phy_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set = aqr_phy_led_polarity_set,</div><div class='add'>+	.inband_caps	= aqr_gen2_inband_caps,</div><div class='add'>+	.config_inband	= aqr_gen2_config_inband,</div><div class='ctx'> },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(aqr_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused aqr_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused aqr_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQ1202) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQ2104) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR105) },</div><div class='hunk'>@@ -1160,9 +1576,11 @@ static struct mdio_device_id __maybe_unused aqr_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR412C) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR114C) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR115) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR115C) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/as21xxx.c b/drivers/net/phy/as21xxx.c<br/>new file mode 100644<br/>index 000000000000..005277360656<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/as21xxx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/as21xxx.c</a></div><div class='hunk'>@@ -0,0 +1,1088 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Aeonsemi AS21XXxX PHY Driver</div><div class='add'>+ *</div><div class='add'>+ * Author: Christian Marangi &lt;ansuelsmth@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#define VEND1_GLB_REG_CPU_RESET_ADDR_LO_BASEADDR 0x3</div><div class='add'>+#define VEND1_GLB_REG_CPU_RESET_ADDR_HI_BASEADDR 0x4</div><div class='add'>+</div><div class='add'>+#define VEND1_GLB_REG_CPU_CTRL		0xe</div><div class='add'>+#define   VEND1_GLB_CPU_CTRL_MASK	GENMASK(4, 0)</div><div class='add'>+#define   VEND1_GLB_CPU_CTRL_LED_POLARITY_MASK GENMASK(12, 8)</div><div class='add'>+#define   VEND1_GLB_CPU_CTRL_LED_POLARITY(_n) FIELD_PREP(VEND1_GLB_CPU_CTRL_LED_POLARITY_MASK, \</div><div class='add'>+							 BIT(_n))</div><div class='add'>+</div><div class='add'>+#define VEND1_FW_START_ADDR		0x100</div><div class='add'>+</div><div class='add'>+#define VEND1_GLB_REG_MDIO_INDIRECT_ADDRCMD 0x101</div><div class='add'>+#define VEND1_GLB_REG_MDIO_INDIRECT_LOAD 0x102</div><div class='add'>+</div><div class='add'>+#define VEND1_GLB_REG_MDIO_INDIRECT_STATUS 0x103</div><div class='add'>+</div><div class='add'>+#define VEND1_PTP_CLK			0x142</div><div class='add'>+#define   VEND1_PTP_CLK_EN		BIT(6)</div><div class='add'>+</div><div class='add'>+/* 5 LED at step of 0x20</div><div class='add'>+ * FE: Fast-Ethernet (10/100)</div><div class='add'>+ * GE: Gigabit-Ethernet (1000)</div><div class='add'>+ * NG: New-Generation (2500/5000/10000)</div><div class='add'>+ */</div><div class='add'>+#define VEND1_LED_REG(_n)		(0x1800 + ((_n) * 0x10))</div><div class='add'>+#define   VEND1_LED_REG_A_EVENT		GENMASK(15, 11)</div><div class='add'>+#define VEND1_LED_CONF			0x1881</div><div class='add'>+#define   VEND1_LED_CONFG_BLINK		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define VEND1_SPEED_STATUS		0x4002</div><div class='add'>+#define   VEND1_SPEED_MASK		GENMASK(7, 0)</div><div class='add'>+#define   VEND1_SPEED_10000		FIELD_PREP_CONST(VEND1_SPEED_MASK, 0x3)</div><div class='add'>+#define   VEND1_SPEED_5000		FIELD_PREP_CONST(VEND1_SPEED_MASK, 0x5)</div><div class='add'>+#define   VEND1_SPEED_2500		FIELD_PREP_CONST(VEND1_SPEED_MASK, 0x9)</div><div class='add'>+#define   VEND1_SPEED_1000		FIELD_PREP_CONST(VEND1_SPEED_MASK, 0x10)</div><div class='add'>+#define   VEND1_SPEED_100		FIELD_PREP_CONST(VEND1_SPEED_MASK, 0x20)</div><div class='add'>+#define   VEND1_SPEED_10		FIELD_PREP_CONST(VEND1_SPEED_MASK, 0x0)</div><div class='add'>+</div><div class='add'>+#define VEND1_IPC_CMD			0x5801</div><div class='add'>+#define   AEON_IPC_CMD_PARITY		BIT(15)</div><div class='add'>+#define   AEON_IPC_CMD_SIZE		GENMASK(10, 6)</div><div class='add'>+#define   AEON_IPC_CMD_OPCODE		GENMASK(5, 0)</div><div class='add'>+</div><div class='add'>+#define IPC_CMD_NOOP			0x0  /* Do nothing */</div><div class='add'>+#define IPC_CMD_INFO			0x1  /* Get Firmware Version */</div><div class='add'>+#define IPC_CMD_SYS_CPU			0x2  /* SYS_CPU */</div><div class='add'>+#define IPC_CMD_BULK_DATA		0xa  /* Pass bulk data in ipc registers. */</div><div class='add'>+#define IPC_CMD_BULK_WRITE		0xc  /* Write bulk data to memory */</div><div class='add'>+#define IPC_CMD_CFG_PARAM		0x1a /* Write config parameters to memory */</div><div class='add'>+#define IPC_CMD_NG_TESTMODE		0x1b /* Set NG test mode and tone */</div><div class='add'>+#define IPC_CMD_TEMP_MON		0x15 /* Temperature monitoring function */</div><div class='add'>+#define IPC_CMD_SET_LED			0x23 /* Set led */</div><div class='add'>+</div><div class='add'>+#define VEND1_IPC_STS			0x5802</div><div class='add'>+#define   AEON_IPC_STS_PARITY		BIT(15)</div><div class='add'>+#define   AEON_IPC_STS_SIZE		GENMASK(14, 10)</div><div class='add'>+#define   AEON_IPC_STS_OPCODE		GENMASK(9, 4)</div><div class='add'>+#define   AEON_IPC_STS_STATUS		GENMASK(3, 0)</div><div class='add'>+#define   AEON_IPC_STS_STATUS_RCVD	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x1)</div><div class='add'>+#define   AEON_IPC_STS_STATUS_PROCESS	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x2)</div><div class='add'>+#define   AEON_IPC_STS_STATUS_SUCCESS	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x4)</div><div class='add'>+#define   AEON_IPC_STS_STATUS_ERROR	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0x8)</div><div class='add'>+#define   AEON_IPC_STS_STATUS_BUSY	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0xe)</div><div class='add'>+#define   AEON_IPC_STS_STATUS_READY	FIELD_PREP_CONST(AEON_IPC_STS_STATUS, 0xf)</div><div class='add'>+</div><div class='add'>+#define VEND1_IPC_DATA0			0x5808</div><div class='add'>+#define VEND1_IPC_DATA1			0x5809</div><div class='add'>+#define VEND1_IPC_DATA2			0x580a</div><div class='add'>+#define VEND1_IPC_DATA3			0x580b</div><div class='add'>+#define VEND1_IPC_DATA4			0x580c</div><div class='add'>+#define VEND1_IPC_DATA5			0x580d</div><div class='add'>+#define VEND1_IPC_DATA6			0x580e</div><div class='add'>+#define VEND1_IPC_DATA7			0x580f</div><div class='add'>+#define VEND1_IPC_DATA(_n)		(VEND1_IPC_DATA0 + (_n))</div><div class='add'>+</div><div class='add'>+/* Sub command of CMD_INFO */</div><div class='add'>+#define IPC_INFO_VERSION		0x1</div><div class='add'>+</div><div class='add'>+/* Sub command of CMD_SYS_CPU */</div><div class='add'>+#define IPC_SYS_CPU_REBOOT		0x3</div><div class='add'>+#define IPC_SYS_CPU_IMAGE_OFST		0x4</div><div class='add'>+#define IPC_SYS_CPU_IMAGE_CHECK		0x5</div><div class='add'>+#define IPC_SYS_CPU_PHY_ENABLE		0x6</div><div class='add'>+</div><div class='add'>+/* Sub command of CMD_CFG_PARAM */</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT		0x4</div><div class='add'>+</div><div class='add'>+/* CFG DIRECT sub command */</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_NG_PHYCTRL	0x1</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_CU_AN	0x2</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_SDS_PCS	0x3</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_AUTO_EEE	0x4</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_SDS_PMA	0x5</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_DPC_RA	0x6</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_DPC_PKT_CHK 0x7</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_DPC_SDS_WAIT_ETH 0x8</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_WDT	0x9</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_SDS_RESTART_AN 0x10</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_TEMP_MON	0x11</div><div class='add'>+#define IPC_CFG_PARAM_DIRECT_WOL	0x12</div><div class='add'>+</div><div class='add'>+/* Sub command of CMD_TEMP_MON */</div><div class='add'>+#define IPC_CMD_TEMP_MON_GET		0x4</div><div class='add'>+</div><div class='add'>+#define AS21XXX_MDIO_AN_C22		0xffe0</div><div class='add'>+</div><div class='add'>+#define PHY_ID_AS21XXX			0x75009410</div><div class='add'>+/* AS21xxx ID Legend</div><div class='add'>+ * AS21x1xxB1</div><div class='add'>+ *     ^ ^^</div><div class='add'>+ *     | |J: Supports SyncE/PTP</div><div class='add'>+ *     | |P: No SyncE/PTP support</div><div class='add'>+ *     | 1: Supports 2nd Serdes</div><div class='add'>+ *     | 2: Not 2nd Serdes support</div><div class='add'>+ *     0: 10G, 5G, 2.5G</div><div class='add'>+ *     5: 5G, 2.5G</div><div class='add'>+ *     2: 2.5G</div><div class='add'>+ */</div><div class='add'>+#define PHY_ID_AS21011JB1		0x75009402</div><div class='add'>+#define PHY_ID_AS21011PB1		0x75009412</div><div class='add'>+#define PHY_ID_AS21010JB1		0x75009422</div><div class='add'>+#define PHY_ID_AS21010PB1		0x75009432</div><div class='add'>+#define PHY_ID_AS21511JB1		0x75009442</div><div class='add'>+#define PHY_ID_AS21511PB1		0x75009452</div><div class='add'>+#define PHY_ID_AS21510JB1		0x75009462</div><div class='add'>+#define PHY_ID_AS21510PB1		0x75009472</div><div class='add'>+#define PHY_ID_AS21210JB1		0x75009482</div><div class='add'>+#define PHY_ID_AS21210PB1		0x75009492</div><div class='add'>+#define PHY_VENDOR_AEONSEMI		0x75009400</div><div class='add'>+</div><div class='add'>+#define AEON_MAX_LEDS			5</div><div class='add'>+#define AEON_IPC_DELAY			10000</div><div class='add'>+#define AEON_IPC_TIMEOUT		(AEON_IPC_DELAY * 100)</div><div class='add'>+#define AEON_IPC_DATA_NUM_REGISTERS	8</div><div class='add'>+#define AEON_IPC_DATA_MAX		(AEON_IPC_DATA_NUM_REGISTERS * sizeof(u16))</div><div class='add'>+</div><div class='add'>+#define AEON_BOOT_ADDR			0x1000</div><div class='add'>+#define AEON_CPU_BOOT_ADDR		0x2000</div><div class='add'>+#define AEON_CPU_CTRL_FW_LOAD		(BIT(4) | BIT(2) | BIT(1) | BIT(0))</div><div class='add'>+#define AEON_CPU_CTRL_FW_START		BIT(0)</div><div class='add'>+</div><div class='add'>+enum as21xxx_led_event {</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_10 = 0x0,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_100,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_1000,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_2500,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_5000,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_10000,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_FE_GE,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_NG,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_FULL_DUPLEX,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_COLLISION,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_BLINK_TX,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_BLINK_RX,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_BLINK_ACT,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_LINK,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_LINK_BLINK_ACT,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_LINK_BLINK_RX,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_FE_GE_BLINK_ACT,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_NG_BLINK_ACT,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_NG_BLINK_FE_GE,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON_FD_BLINK_COLLISION,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_ON,</div><div class='add'>+	VEND1_LED_REG_A_EVENT_OFF,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct as21xxx_led_pattern_info {</div><div class='add'>+	unsigned int pattern;</div><div class='add'>+	u16 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct as21xxx_priv {</div><div class='add'>+	bool parity_status;</div><div class='add'>+	/* Protect concurrent IPC access */</div><div class='add'>+	struct mutex ipc_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct as21xxx_led_pattern_info as21xxx_led_supported_pattern[] = {</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_10),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_10</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_100),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_100</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_1000</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_2500),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_2500</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_5000),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_5000</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_10000),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_10000</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_LINK</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_FE_GE</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_2500) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_5000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_10000),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_NG</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_FULL_DUPLEX),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_FULL_DUPLEX</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_TX),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_BLINK_TX</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_RX),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_BLINK_RX</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_TX) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_RX),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_BLINK_ACT</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_1000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_2500) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_5000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_10000),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_LINK</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_1000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_2500) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_5000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_10000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_TX) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_RX),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_LINK_BLINK_ACT</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_1000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_2500) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_5000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_10000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_RX),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_LINK_BLINK_RX</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_1000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_TX) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_RX),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_FE_GE_BLINK_ACT</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.pattern = BIT(TRIGGER_NETDEV_LINK_2500) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_5000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_LINK_10000) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_TX) |</div><div class='add'>+			   BIT(TRIGGER_NETDEV_RX),</div><div class='add'>+		.val = VEND1_LED_REG_A_EVENT_ON_NG_BLINK_ACT</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int aeon_firmware_boot(struct phy_device *phydev, const u8 *data,</div><div class='add'>+			      size_t size)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_CPU_CTRL,</div><div class='add'>+			     VEND1_GLB_CPU_CTRL_MASK, AEON_CPU_CTRL_FW_LOAD);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_FW_START_ADDR,</div><div class='add'>+			    AEON_BOOT_ADDR);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+			     VEND1_GLB_REG_MDIO_INDIRECT_ADDRCMD,</div><div class='add'>+			     0x3ffc, 0xc000);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = phy_read_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+			   VEND1_GLB_REG_MDIO_INDIRECT_STATUS);</div><div class='add'>+	if (val &gt; 1) {</div><div class='add'>+		phydev_err(phydev, "wrong origin mdio_indirect_status: %x\n", val);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Firmware is always aligned to u16 */</div><div class='add'>+	for (i = 0; i &lt; size; i += 2) {</div><div class='add'>+		val = data[i + 1] &lt;&lt; 8 | data[i];</div><div class='add'>+</div><div class='add'>+		ret = phy_write_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+				    VEND1_GLB_REG_MDIO_INDIRECT_LOAD, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+			    VEND1_GLB_REG_CPU_RESET_ADDR_LO_BASEADDR,</div><div class='add'>+			    lower_16_bits(AEON_CPU_BOOT_ADDR));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+			    VEND1_GLB_REG_CPU_RESET_ADDR_HI_BASEADDR,</div><div class='add'>+			    upper_16_bits(AEON_CPU_BOOT_ADDR));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLB_REG_CPU_CTRL,</div><div class='add'>+			      VEND1_GLB_CPU_CTRL_MASK, AEON_CPU_CTRL_FW_START);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aeon_firmware_load(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='add'>+	const struct firmware *fw;</div><div class='add'>+	const char *fw_name;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_string(dev-&gt;of_node, "firmware-name",</div><div class='add'>+				      &amp;fw_name);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = request_firmware(&amp;fw, fw_name, dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		phydev_err(phydev, "failed to find FW file %s (%d)\n",</div><div class='add'>+			   fw_name, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = aeon_firmware_boot(phydev, fw-&gt;data, fw-&gt;size);</div><div class='add'>+</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool aeon_ipc_ready(u16 val, bool parity_status)</div><div class='add'>+{</div><div class='add'>+	u16 status;</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(AEON_IPC_STS_PARITY, val) != parity_status)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	status = val &amp; AEON_IPC_STS_STATUS;</div><div class='add'>+</div><div class='add'>+	return status != AEON_IPC_STS_STATUS_RCVD &amp;&amp;</div><div class='add'>+	       status != AEON_IPC_STS_STATUS_PROCESS &amp;&amp;</div><div class='add'>+	       status != AEON_IPC_STS_STATUS_BUSY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aeon_ipc_wait_cmd(struct phy_device *phydev, bool parity_status)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	/* Exit condition logic:</div><div class='add'>+	 * - Wait for parity bit equal</div><div class='add'>+	 * - Wait for status success, error OR ready</div><div class='add'>+	 */</div><div class='add'>+	return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, VEND1_IPC_STS, val,</div><div class='add'>+					 aeon_ipc_ready(val, parity_status),</div><div class='add'>+					 AEON_IPC_DELAY, AEON_IPC_TIMEOUT, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aeon_ipc_send_cmd(struct phy_device *phydev,</div><div class='add'>+			     struct as21xxx_priv *priv,</div><div class='add'>+			     u16 cmd, u16 *ret_sts)</div><div class='add'>+{</div><div class='add'>+	bool curr_parity;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* The IPC sync by using a single parity bit.</div><div class='add'>+	 * Each CMD have alternately this bit set or clear</div><div class='add'>+	 * to understand correct flow and packet order.</div><div class='add'>+	 */</div><div class='add'>+	curr_parity = priv-&gt;parity_status;</div><div class='add'>+	if (priv-&gt;parity_status)</div><div class='add'>+		cmd |= AEON_IPC_CMD_PARITY;</div><div class='add'>+</div><div class='add'>+	/* Always update parity for next packet */</div><div class='add'>+	priv-&gt;parity_status = !priv-&gt;parity_status;</div><div class='add'>+</div><div class='add'>+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_IPC_CMD, cmd);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Wait for packet to be processed */</div><div class='add'>+	usleep_range(AEON_IPC_DELAY, AEON_IPC_DELAY + 5000);</div><div class='add'>+</div><div class='add'>+	/* With no ret_sts, ignore waiting for packet completion</div><div class='add'>+	 * (ipc parity bit sync)</div><div class='add'>+	 */</div><div class='add'>+	if (!ret_sts)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = aeon_ipc_wait_cmd(phydev, curr_parity);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_IPC_STS);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*ret_sts = ret;</div><div class='add'>+	if ((*ret_sts &amp; AEON_IPC_STS_STATUS) != AEON_IPC_STS_STATUS_SUCCESS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* If data is NULL, return 0 or negative error.</div><div class='add'>+ * If data not NULL, return number of Bytes received from IPC or</div><div class='add'>+ * a negative error.</div><div class='add'>+ */</div><div class='add'>+static int aeon_ipc_send_msg(struct phy_device *phydev,</div><div class='add'>+			     u16 opcode, u16 *data, unsigned int data_len,</div><div class='add'>+			     u16 *ret_data)</div><div class='add'>+{</div><div class='add'>+	struct as21xxx_priv *priv = phydev-&gt;priv;</div><div class='add'>+	unsigned int ret_size;</div><div class='add'>+	u16 cmd, ret_sts;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* IPC have a max of 8 register to transfer data,</div><div class='add'>+	 * make sure we never exceed this.</div><div class='add'>+	 */</div><div class='add'>+	if (data_len &gt; AEON_IPC_DATA_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; data_len / sizeof(u16); i++)</div><div class='add'>+		phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_IPC_DATA(i),</div><div class='add'>+			      data[i]);</div><div class='add'>+</div><div class='add'>+	cmd = FIELD_PREP(AEON_IPC_CMD_SIZE, data_len) |</div><div class='add'>+	      FIELD_PREP(AEON_IPC_CMD_OPCODE, opcode);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;ipc_lock);</div><div class='add'>+</div><div class='add'>+	ret = aeon_ipc_send_cmd(phydev, priv, cmd, &amp;ret_sts);</div><div class='add'>+	if (ret) {</div><div class='add'>+		phydev_err(phydev, "failed to send ipc msg for %x: %d\n",</div><div class='add'>+			   opcode, ret);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!data)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if ((ret_sts &amp; AEON_IPC_STS_STATUS) == AEON_IPC_STS_STATUS_ERROR) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Prevent IPC from stack smashing the kernel.</div><div class='add'>+	 * We can't trust IPC to return a good value and we always</div><div class='add'>+	 * preallocate space for 16 Bytes.</div><div class='add'>+	 */</div><div class='add'>+	ret_size = FIELD_GET(AEON_IPC_STS_SIZE, ret_sts);</div><div class='add'>+	if (ret_size &gt; AEON_IPC_DATA_MAX) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read data from IPC data register for ret_size value from IPC */</div><div class='add'>+	for (i = 0; i &lt; DIV_ROUND_UP(ret_size, sizeof(u16)); i++) {</div><div class='add'>+		ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_IPC_DATA(i));</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		ret_data[i] = ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ret_size;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;ipc_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aeon_ipc_noop(struct phy_device *phydev,</div><div class='add'>+			 struct as21xxx_priv *priv, u16 *ret_sts)</div><div class='add'>+{</div><div class='add'>+	u16 cmd;</div><div class='add'>+</div><div class='add'>+	cmd = FIELD_PREP(AEON_IPC_CMD_SIZE, 0) |</div><div class='add'>+	      FIELD_PREP(AEON_IPC_CMD_OPCODE, IPC_CMD_NOOP);</div><div class='add'>+</div><div class='add'>+	return aeon_ipc_send_cmd(phydev, priv, cmd, ret_sts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Logic to sync parity bit with IPC.</div><div class='add'>+ * We send 2 NOP cmd with same partity and we wait for IPC</div><div class='add'>+ * to handle the packet only for the second one. This way</div><div class='add'>+ * we make sure we are sync for every next cmd.</div><div class='add'>+ */</div><div class='add'>+static int aeon_ipc_sync_parity(struct phy_device *phydev,</div><div class='add'>+				struct as21xxx_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u16 ret_sts;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;ipc_lock);</div><div class='add'>+</div><div class='add'>+	/* Send NOP with no parity */</div><div class='add'>+	aeon_ipc_noop(phydev, priv, NULL);</div><div class='add'>+</div><div class='add'>+	/* Reset packet parity */</div><div class='add'>+	priv-&gt;parity_status = false;</div><div class='add'>+</div><div class='add'>+	/* Send second NOP with no parity */</div><div class='add'>+	ret = aeon_ipc_noop(phydev, priv, &amp;ret_sts);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;ipc_lock);</div><div class='add'>+</div><div class='add'>+	/* We expect to return -EINVAL */</div><div class='add'>+	if (ret != -EINVAL)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if ((ret_sts &amp; AEON_IPC_STS_STATUS) != AEON_IPC_STS_STATUS_READY) {</div><div class='add'>+		phydev_err(phydev, "Invalid IPC status on sync parity: %x\n",</div><div class='add'>+			   ret_sts);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aeon_ipc_get_fw_version(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	u16 ret_data[AEON_IPC_DATA_NUM_REGISTERS], data[1];</div><div class='add'>+	char fw_version[AEON_IPC_DATA_MAX + 1];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	data[0] = IPC_INFO_VERSION;</div><div class='add'>+</div><div class='add'>+	ret = aeon_ipc_send_msg(phydev, IPC_CMD_INFO, data,</div><div class='add'>+				sizeof(data), ret_data);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Make sure FW version is NULL terminated */</div><div class='add'>+	memcpy(fw_version, ret_data, ret);</div><div class='add'>+	fw_version[ret] = '\0';</div><div class='add'>+</div><div class='add'>+	phydev_info(phydev, "Firmware Version: %s\n", fw_version);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aeon_dpc_ra_enable(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	u16 data[2];</div><div class='add'>+</div><div class='add'>+	data[0] = IPC_CFG_PARAM_DIRECT;</div><div class='add'>+	data[1] = IPC_CFG_PARAM_DIRECT_DPC_RA;</div><div class='add'>+</div><div class='add'>+	return aeon_ipc_send_msg(phydev, IPC_CMD_CFG_PARAM, data,</div><div class='add'>+				 sizeof(data), NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int as21xxx_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct as21xxx_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;phydev-&gt;mdio.dev,</div><div class='add'>+			    sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	phydev-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	ret = devm_mutex_init(&amp;phydev-&gt;mdio.dev,</div><div class='add'>+			      &amp;priv-&gt;ipc_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = aeon_ipc_sync_parity(phydev, priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = aeon_ipc_get_fw_version(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Enable PTP clk if not already Enabled */</div><div class='add'>+	ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PTP_CLK,</div><div class='add'>+			       VEND1_PTP_CLK_EN);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return aeon_dpc_ra_enable(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int as21xxx_read_link(struct phy_device *phydev, int *bmcr)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	/* Normal C22 BMCR report inconsistent data, use</div><div class='add'>+	 * the mapped C22 in C45 to have more consistent link info.</div><div class='add'>+	 */</div><div class='add'>+	*bmcr = phy_read_mmd(phydev, MDIO_MMD_AN,</div><div class='add'>+			     AS21XXX_MDIO_AN_C22 + MII_BMCR);</div><div class='add'>+	if (*bmcr &lt; 0)</div><div class='add'>+		return *bmcr;</div><div class='add'>+</div><div class='add'>+	/* Autoneg is being started, therefore disregard current</div><div class='add'>+	 * link status and report link as down.</div><div class='add'>+	 */</div><div class='add'>+	if (*bmcr &amp; BMCR_ANRESTART) {</div><div class='add'>+		phydev-&gt;link = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);</div><div class='add'>+	if (status &lt; 0)</div><div class='add'>+		return status;</div><div class='add'>+</div><div class='add'>+	phydev-&gt;link = !!(status &amp; MDIO_STAT1_LSTATUS);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int as21xxx_read_c22_lpa(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int lpagb;</div><div class='add'>+</div><div class='add'>+	/* MII_STAT1000 are only filled in the mapped C22</div><div class='add'>+	 * in C45, use that to fill lpagb values and check.</div><div class='add'>+	 */</div><div class='add'>+	lpagb = phy_read_mmd(phydev, MDIO_MMD_AN,</div><div class='add'>+			     AS21XXX_MDIO_AN_C22 + MII_STAT1000);</div><div class='add'>+	if (lpagb &lt; 0)</div><div class='add'>+		return lpagb;</div><div class='add'>+</div><div class='add'>+	if (lpagb &amp; LPA_1000MSFAIL) {</div><div class='add'>+		int adv = phy_read_mmd(phydev, MDIO_MMD_AN,</div><div class='add'>+				       AS21XXX_MDIO_AN_C22 + MII_CTRL1000);</div><div class='add'>+</div><div class='add'>+		if (adv &lt; 0)</div><div class='add'>+			return adv;</div><div class='add'>+</div><div class='add'>+		if (adv &amp; CTL1000_ENABLE_MASTER)</div><div class='add'>+			phydev_err(phydev, "Master/Slave resolution failed, maybe conflicting manual settings?\n");</div><div class='add'>+		else</div><div class='add'>+			phydev_err(phydev, "Master/Slave resolution failed\n");</div><div class='add'>+		return -ENOLINK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mii_stat1000_mod_linkmode_lpa_t(phydev-&gt;lp_advertising,</div><div class='add'>+					lpagb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int as21xxx_read_status(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int bmcr, old_link = phydev-&gt;link;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = as21xxx_read_link(phydev, &amp;bmcr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* why bother the PHY if nothing can have changed */</div><div class='add'>+	if (phydev-&gt;autoneg == AUTONEG_ENABLE &amp;&amp; old_link &amp;&amp; phydev-&gt;link)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	phydev-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+	phydev-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='add'>+	phydev-&gt;pause = 0;</div><div class='add'>+	phydev-&gt;asym_pause = 0;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;autoneg == AUTONEG_ENABLE) {</div><div class='add'>+		ret = genphy_c45_read_lpa(phydev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = as21xxx_read_c22_lpa(phydev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		phy_resolve_aneg_linkmode(phydev);</div><div class='add'>+	} else {</div><div class='add'>+		int speed;</div><div class='add'>+</div><div class='add'>+		linkmode_zero(phydev-&gt;lp_advertising);</div><div class='add'>+</div><div class='add'>+		speed = phy_read_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+				     VEND1_SPEED_STATUS);</div><div class='add'>+		if (speed &lt; 0)</div><div class='add'>+			return speed;</div><div class='add'>+</div><div class='add'>+		switch (speed &amp; VEND1_SPEED_STATUS) {</div><div class='add'>+		case VEND1_SPEED_10000:</div><div class='add'>+			phydev-&gt;speed = SPEED_10000;</div><div class='add'>+			phydev-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+			break;</div><div class='add'>+		case VEND1_SPEED_5000:</div><div class='add'>+			phydev-&gt;speed = SPEED_5000;</div><div class='add'>+			phydev-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+			break;</div><div class='add'>+		case VEND1_SPEED_2500:</div><div class='add'>+			phydev-&gt;speed = SPEED_2500;</div><div class='add'>+			phydev-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+			break;</div><div class='add'>+		case VEND1_SPEED_1000:</div><div class='add'>+			phydev-&gt;speed = SPEED_1000;</div><div class='add'>+			if (bmcr &amp; BMCR_FULLDPLX)</div><div class='add'>+				phydev-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+			else</div><div class='add'>+				phydev-&gt;duplex = DUPLEX_HALF;</div><div class='add'>+			break;</div><div class='add'>+		case VEND1_SPEED_100:</div><div class='add'>+			phydev-&gt;speed = SPEED_100;</div><div class='add'>+			phydev-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+			break;</div><div class='add'>+		case VEND1_SPEED_10:</div><div class='add'>+			phydev-&gt;speed = SPEED_10;</div><div class='add'>+			phydev-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int as21xxx_led_brightness_set(struct phy_device *phydev,</div><div class='add'>+				      u8 index, enum led_brightness value)</div><div class='add'>+{</div><div class='add'>+	u16 val = VEND1_LED_REG_A_EVENT_OFF;</div><div class='add'>+</div><div class='add'>+	if (index &gt; AEON_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		val = VEND1_LED_REG_A_EVENT_ON;</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+			      VEND1_LED_REG(index),</div><div class='add'>+			      VEND1_LED_REG_A_EVENT,</div><div class='add'>+			      FIELD_PREP(VEND1_LED_REG_A_EVENT, val));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int as21xxx_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='add'>+				       unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (index &gt; AEON_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(as21xxx_led_supported_pattern); i++)</div><div class='add'>+		if (rules == as21xxx_led_supported_pattern[i].pattern)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int as21xxx_led_hw_control_get(struct phy_device *phydev, u8 index,</div><div class='add'>+				      unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	int i, val;</div><div class='add'>+</div><div class='add'>+	if (index &gt; AEON_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_LED_REG(index));</div><div class='add'>+	if (val &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+</div><div class='add'>+	val = FIELD_GET(VEND1_LED_REG_A_EVENT, val);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(as21xxx_led_supported_pattern); i++)</div><div class='add'>+		if (val == as21xxx_led_supported_pattern[i].val) {</div><div class='add'>+			*rules = as21xxx_led_supported_pattern[i].pattern;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	/* Should be impossible */</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int as21xxx_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='add'>+				      unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (index &gt; AEON_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(as21xxx_led_supported_pattern); i++)</div><div class='add'>+		if (rules == as21xxx_led_supported_pattern[i].pattern) {</div><div class='add'>+			val = as21xxx_led_supported_pattern[i].val;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+			      VEND1_LED_REG(index),</div><div class='add'>+			      VEND1_LED_REG_A_EVENT,</div><div class='add'>+			      FIELD_PREP(VEND1_LED_REG_A_EVENT, val));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int as21xxx_led_polarity_set(struct phy_device *phydev, int index,</div><div class='add'>+				    unsigned long modes)</div><div class='add'>+{</div><div class='add'>+	bool led_active_low = false;</div><div class='add'>+	u16 mask, val = 0;</div><div class='add'>+	u32 mode;</div><div class='add'>+</div><div class='add'>+	if (index &gt; AEON_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(mode, &amp;modes, __PHY_LED_MODES_NUM) {</div><div class='add'>+		switch (mode) {</div><div class='add'>+		case PHY_LED_ACTIVE_LOW:</div><div class='add'>+			led_active_low = true;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_LED_ACTIVE_HIGH: /* default mode */</div><div class='add'>+			led_active_low = false;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mask = VEND1_GLB_CPU_CTRL_LED_POLARITY(index);</div><div class='add'>+	if (led_active_low)</div><div class='add'>+		val = VEND1_GLB_CPU_CTRL_LED_POLARITY(index);</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+			      VEND1_GLB_REG_CPU_CTRL,</div><div class='add'>+			      mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int as21xxx_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				    const struct phy_driver *phydrv)</div><div class='add'>+{</div><div class='add'>+	struct as21xxx_priv *priv;</div><div class='add'>+	u16 ret_sts;</div><div class='add'>+	u32 phy_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Skip PHY that are not AS21xxx */</div><div class='add'>+	if (!phy_id_compare_vendor(phydev-&gt;c45_ids.device_ids[MDIO_MMD_PCS],</div><div class='add'>+				   PHY_VENDOR_AEONSEMI))</div><div class='add'>+		return genphy_match_phy_device(phydev, phydrv);</div><div class='add'>+</div><div class='add'>+	/* Read PHY ID to handle firmware loaded or HW reset */</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MII_PHYSID1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	phy_id = ret &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MII_PHYSID2);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	phy_id |= ret;</div><div class='add'>+</div><div class='add'>+	/* With PHY ID not the generic AS21xxx one assume</div><div class='add'>+	 * the firmware just loaded</div><div class='add'>+	 */</div><div class='add'>+	if (phy_id != PHY_ID_AS21XXX)</div><div class='add'>+		return phy_id == phydrv-&gt;phy_id;</div><div class='add'>+</div><div class='add'>+	/* Allocate temp priv and load the firmware */</div><div class='add'>+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;ipc_lock);</div><div class='add'>+</div><div class='add'>+	ret = aeon_firmware_load(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Sync parity... */</div><div class='add'>+	ret = aeon_ipc_sync_parity(phydev, priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* ...and send a third NOOP cmd to wait for firmware finish loading */</div><div class='add'>+	ret = aeon_ipc_noop(phydev, priv, &amp;ret_sts);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_destroy(&amp;priv-&gt;ipc_lock);</div><div class='add'>+	kfree(priv);</div><div class='add'>+</div><div class='add'>+	/* Return can either be 0 or a negative error code.</div><div class='add'>+	 * Returning 0 here means THIS is NOT a suitable PHY.</div><div class='add'>+	 *</div><div class='add'>+	 * For the specific case of the generic Aeonsemi PHY ID that</div><div class='add'>+	 * needs the firmware the be loaded first to have a correct PHY ID,</div><div class='add'>+	 * this is OK as a matching PHY ID will be found right after.</div><div class='add'>+	 * This relies on the driver probe order where the first PHY driver</div><div class='add'>+	 * probed is the generic one.</div><div class='add'>+	 */</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phy_driver as21xxx_drivers[] = {</div><div class='add'>+	{</div><div class='add'>+		/* PHY expose in C45 as 0x7500 0x9410</div><div class='add'>+		 * before firmware is loaded.</div><div class='add'>+		 * This driver entry must be attempted first to load</div><div class='add'>+		 * the firmware and thus update the ID registers.</div><div class='add'>+		 */</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21XXX),</div><div class='add'>+		.name		= "Aeonsemi AS21xxx",</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21011JB1),</div><div class='add'>+		.name		= "Aeonsemi AS21011JB1",</div><div class='add'>+		.probe		= as21xxx_probe,</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+		.read_status	= as21xxx_read_status,</div><div class='add'>+		.led_brightness_set = as21xxx_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = as21xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = as21xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = as21xxx_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = as21xxx_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21011PB1),</div><div class='add'>+		.name		= "Aeonsemi AS21011PB1",</div><div class='add'>+		.probe		= as21xxx_probe,</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+		.read_status	= as21xxx_read_status,</div><div class='add'>+		.led_brightness_set = as21xxx_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = as21xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = as21xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = as21xxx_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = as21xxx_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21010PB1),</div><div class='add'>+		.name		= "Aeonsemi AS21010PB1",</div><div class='add'>+		.probe		= as21xxx_probe,</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+		.read_status	= as21xxx_read_status,</div><div class='add'>+		.led_brightness_set = as21xxx_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = as21xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = as21xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = as21xxx_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = as21xxx_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21010JB1),</div><div class='add'>+		.name		= "Aeonsemi AS21010JB1",</div><div class='add'>+		.probe		= as21xxx_probe,</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+		.read_status	= as21xxx_read_status,</div><div class='add'>+		.led_brightness_set = as21xxx_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = as21xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = as21xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = as21xxx_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = as21xxx_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21210PB1),</div><div class='add'>+		.name		= "Aeonsemi AS21210PB1",</div><div class='add'>+		.probe		= as21xxx_probe,</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+		.read_status	= as21xxx_read_status,</div><div class='add'>+		.led_brightness_set = as21xxx_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = as21xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = as21xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = as21xxx_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = as21xxx_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21510JB1),</div><div class='add'>+		.name		= "Aeonsemi AS21510JB1",</div><div class='add'>+		.probe		= as21xxx_probe,</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+		.read_status	= as21xxx_read_status,</div><div class='add'>+		.led_brightness_set = as21xxx_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = as21xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = as21xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = as21xxx_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = as21xxx_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21510PB1),</div><div class='add'>+		.name		= "Aeonsemi AS21510PB1",</div><div class='add'>+		.probe		= as21xxx_probe,</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+		.read_status	= as21xxx_read_status,</div><div class='add'>+		.led_brightness_set = as21xxx_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = as21xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = as21xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = as21xxx_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = as21xxx_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21511JB1),</div><div class='add'>+		.name		= "Aeonsemi AS21511JB1",</div><div class='add'>+		.probe		= as21xxx_probe,</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+		.read_status	= as21xxx_read_status,</div><div class='add'>+		.led_brightness_set = as21xxx_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = as21xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = as21xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = as21xxx_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = as21xxx_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21210JB1),</div><div class='add'>+		.name		= "Aeonsemi AS21210JB1",</div><div class='add'>+		.probe		= as21xxx_probe,</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+		.read_status	= as21xxx_read_status,</div><div class='add'>+		.led_brightness_set = as21xxx_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = as21xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = as21xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = as21xxx_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = as21xxx_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_AS21511PB1),</div><div class='add'>+		.name		= "Aeonsemi AS21511PB1",</div><div class='add'>+		.probe		= as21xxx_probe,</div><div class='add'>+		.match_phy_device = as21xxx_match_phy_device,</div><div class='add'>+		.read_status	= as21xxx_read_status,</div><div class='add'>+		.led_brightness_set = as21xxx_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = as21xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = as21xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = as21xxx_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = as21xxx_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_phy_driver(as21xxx_drivers);</div><div class='add'>+</div><div class='add'>+static struct mdio_device_id __maybe_unused as21xxx_tbl[] = {</div><div class='add'>+	{ PHY_ID_MATCH_VENDOR(PHY_VENDOR_AEONSEMI) },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(mdio, as21xxx_tbl);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Aeonsemi AS21xxx PHY driver");</div><div class='add'>+MODULE_AUTHOR("Christian Marangi &lt;ansuelsmth@gmail.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/phy/ax88796b.c b/drivers/net/phy/ax88796b.c<br/>index eb74a8cf8df1..f20ddf649149 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/ax88796b.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/ax88796b.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/ax88796b.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/ax88796b.c</a></div><div class='hunk'>@@ -112,19 +112,18 @@ static struct phy_driver asix_driver[] = {</div><div class='ctx'> 	.resume		= genphy_resume,</div><div class='ctx'> 	.soft_reset	= asix_soft_reset,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_ASIX_AX88796B,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_ASIX_AX88796B),</div><div class='ctx'> 	.name		= "Asix Electronics AX88796B",</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> 	.soft_reset	= asix_soft_reset,</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(asix_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused asix_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused asix_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(PHY_ID_ASIX_AX88772A) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(PHY_ID_ASIX_AX88772C) },</div><div class='del'>-	{ PHY_ID_ASIX_AX88796B, 0xfffffff0 },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_ASIX_AX88796B) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/ax88796b_rust.rs b/drivers/net/phy/ax88796b_rust.rs<br/>index 8c7eb009d9fc..bc73ebccc2aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/ax88796b_rust.rs?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/ax88796b_rust.rs</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/ax88796b_rust.rs?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/ax88796b_rust.rs</a></div><div class='hunk'>@@ -19,7 +19,7 @@ kernel::module_phy_driver! {</div><div class='ctx'>         DeviceId::new_with_driver::&lt;PhyAX88796B&gt;()</div><div class='ctx'>     ],</div><div class='ctx'>     name: "rust_asix_phy",</div><div class='del'>-    author: "FUJITA Tomonori &lt;fujita.tomonori@gmail.com&gt;",</div><div class='add'>+    authors: ["FUJITA Tomonori &lt;fujita.tomonori@gmail.com&gt;"],</div><div class='ctx'>     description: "Rust Asix PHYs driver",</div><div class='ctx'>     license: "GPL",</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/phy/bcm-cygnus.c b/drivers/net/phy/bcm-cygnus.c<br/>index da8f7cb41b44..15cbef8202bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm-cygnus.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm-cygnus.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm-cygnus.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/bcm-cygnus.c</a></div><div class='hunk'>@@ -278,7 +278,7 @@ static struct phy_driver bcm_cygnus_phy_driver[] = {</div><div class='ctx'> }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused bcm_cygnus_phy_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused bcm_cygnus_phy_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_BCM_CYGNUS, 0xfffffff0, },</div><div class='ctx'> 	{ PHY_ID_BCM_OMEGA, 0xfffffff0, },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/bcm-phy-lib.c b/drivers/net/phy/bcm-phy-lib.c<br/>index 6c52f7dda514..5198d66dbbc0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm-phy-lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm-phy-lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm-phy-lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/bcm-phy-lib.c</a></div><div class='hunk'>@@ -523,8 +523,7 @@ void bcm_phy_get_strings(struct phy_device *phydev, u8 *data)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(bcm_phy_hw_stats); i++)</div><div class='del'>-		strscpy(data + i * ETH_GSTRING_LEN,</div><div class='del'>-			bcm_phy_hw_stats[i].string, ETH_GSTRING_LEN);</div><div class='add'>+		ethtool_puts(&amp;data, bcm_phy_hw_stats[i].string);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(bcm_phy_get_strings);</div><div class='ctx'> </div><div class='hunk'>@@ -1137,7 +1136,7 @@ int bcm_config_lre_aneg(struct phy_device *phydev, bool changed)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (genphy_config_eee_advert(phydev))</div><div class='add'>+	if (genphy_c45_an_config_eee_aneg(phydev) &gt; 0)</div><div class='ctx'> 		changed = true;</div><div class='ctx'> </div><div class='ctx'> 	err = bcm_setup_lre_master_slave(phydev);</div><div class='head'>diff --git a/drivers/net/phy/bcm-phy-ptp.c b/drivers/net/phy/bcm-phy-ptp.c<br/>index 208e8f561e06..65d609ed69fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm-phy-ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm-phy-ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm-phy-ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/bcm-phy-ptp.c</a></div><div class='hunk'>@@ -597,9 +597,6 @@ static int bcm_ptp_perout_locked(struct bcm_ptp_private *priv,</div><div class='ctx'> </div><div class='ctx'> 	period = BCM_MAX_PERIOD_8NS;	/* write nonzero value */</div><div class='ctx'> </div><div class='del'>-	if (req-&gt;flags &amp; PTP_PEROUT_PHASE)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	if (req-&gt;flags &amp; PTP_PEROUT_DUTY_CYCLE)</div><div class='ctx'> 		pulse = ktime_to_ns(ktime_set(req-&gt;on.sec, req-&gt;on.nsec));</div><div class='ctx'> 	else</div><div class='hunk'>@@ -740,6 +737,8 @@ static const struct ptp_clock_info bcm_ptp_clock_info = {</div><div class='ctx'> 	.n_pins		= 1,</div><div class='ctx'> 	.n_per_out	= 1,</div><div class='ctx'> 	.n_ext_ts	= 1,</div><div class='add'>+	.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE,</div><div class='add'>+	.supported_extts_flags = PTP_STRICT_FLAGS | PTP_RISING_EDGE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void bcm_ptp_txtstamp(struct mii_timestamper *mii_ts,</div><div class='hunk'>@@ -781,9 +780,21 @@ out:</div><div class='ctx'> 	kfree_skb(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcm_ptp_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='del'>-			    struct kernel_hwtstamp_config *cfg,</div><div class='del'>-			    struct netlink_ext_ack *extack)</div><div class='add'>+static int bcm_ptp_hwtstamp_get(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='add'>+	struct bcm_ptp_private *priv = mii2priv(mii_ts);</div><div class='add'>+</div><div class='add'>+	cfg-&gt;rx_filter = priv-&gt;hwts_rx ? HWTSTAMP_FILTER_PTP_V2_EVENT</div><div class='add'>+				       : HWTSTAMP_FILTER_NONE;</div><div class='add'>+	cfg-&gt;tx_type = priv-&gt;tx_type;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_ptp_hwtstamp_set(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcm_ptp_private *priv = mii2priv(mii_ts);</div><div class='ctx'> 	u16 mode, ctrl;</div><div class='hunk'>@@ -899,7 +910,8 @@ static void bcm_ptp_init(struct bcm_ptp_private *priv)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;mii_ts.rxtstamp = bcm_ptp_rxtstamp;</div><div class='ctx'> 	priv-&gt;mii_ts.txtstamp = bcm_ptp_txtstamp;</div><div class='del'>-	priv-&gt;mii_ts.hwtstamp = bcm_ptp_hwtstamp;</div><div class='add'>+	priv-&gt;mii_ts.hwtstamp_set = bcm_ptp_hwtstamp_set;</div><div class='add'>+	priv-&gt;mii_ts.hwtstamp_get = bcm_ptp_hwtstamp_get;</div><div class='ctx'> 	priv-&gt;mii_ts.ts_info = bcm_ptp_ts_info;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;phydev-&gt;mii_ts = &amp;priv-&gt;mii_ts;</div><div class='head'>diff --git a/drivers/net/phy/bcm54140.c b/drivers/net/phy/bcm54140.c<br/>index 2eea3d09b1e6..a8edf45fd733 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm54140.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm54140.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm54140.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/bcm54140.c</a></div><div class='hunk'>@@ -10,6 +10,7 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "phylib.h"</div><div class='ctx'> #include "bcm-phy-lib.h"</div><div class='ctx'> </div><div class='ctx'> /* RDB per-port registers</div><div class='hunk'>@@ -883,7 +884,7 @@ static struct phy_driver bcm54140_drivers[] = {</div><div class='ctx'> };</div><div class='ctx'> module_phy_driver(bcm54140_drivers);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused bcm54140_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused bcm54140_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_BCM54140, BCM54140_PHY_ID_MASK },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/bcm63xx.c b/drivers/net/phy/bcm63xx.c<br/>index 0eb33be824f1..b46a736a3130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm63xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm63xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm63xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/bcm63xx.c</a></div><div class='hunk'>@@ -93,7 +93,7 @@ static struct phy_driver bcm63xx_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(bcm63xx_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused bcm63xx_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused bcm63xx_tbl[] = {</div><div class='ctx'> 	{ 0x00406000, 0xfffffc00 },</div><div class='ctx'> 	{ 0x002bdc00, 0xfffffc00 },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c<br/>index 97638ba7ae85..00e8fa14aa77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm7xxx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm7xxx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm7xxx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/bcm7xxx.c</a></div><div class='hunk'>@@ -929,7 +929,7 @@ static struct phy_driver bcm7xxx_driver[] = {</div><div class='ctx'> 	BCM7XXX_16NM_EPHY(PHY_ID_BCM7712, "Broadcom BCM7712"),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused bcm7xxx_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused bcm7xxx_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_BCM72113, 0xfffffff0 },</div><div class='ctx'> 	{ PHY_ID_BCM72116, 0xfffffff0, },</div><div class='ctx'> 	{ PHY_ID_BCM72165, 0xfffffff0, },</div><div class='head'>diff --git a/drivers/net/phy/bcm84881.c b/drivers/net/phy/bcm84881.c<br/>index 97da3aee4942..d7f7cc44c532 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm84881.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm84881.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm84881.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/bcm84881.c</a></div><div class='hunk'>@@ -235,11 +235,21 @@ static int bcm84881_read_status(struct phy_device *phydev)</div><div class='ctx'> 	return genphy_c45_read_mdix(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII</div><div class='add'>+ * or 802.3z control word, so inband will not work.</div><div class='add'>+ */</div><div class='add'>+static unsigned int bcm84881_inband_caps(struct phy_device *phydev,</div><div class='add'>+					 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	return LINK_INBAND_DISABLE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver bcm84881_drivers[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.phy_id		= 0xae025150,</div><div class='ctx'> 		.phy_id_mask	= 0xfffffff0,</div><div class='ctx'> 		.name		= "Broadcom BCM84881",</div><div class='add'>+		.inband_caps	= bcm84881_inband_caps,</div><div class='ctx'> 		.config_init	= bcm84881_config_init,</div><div class='ctx'> 		.probe		= bcm84881_probe,</div><div class='ctx'> 		.get_features	= bcm84881_get_features,</div><div class='hunk'>@@ -252,7 +262,7 @@ static struct phy_driver bcm84881_drivers[] = {</div><div class='ctx'> module_phy_driver(bcm84881_drivers);</div><div class='ctx'> </div><div class='ctx'> /* FIXME: module auto-loading for Clause 45 PHYs seems non-functional */</div><div class='del'>-static struct mdio_device_id __maybe_unused bcm84881_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused bcm84881_tbl[] = {</div><div class='ctx'> 	{ 0xae025150, 0xfffffff0 },</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/bcm87xx.c b/drivers/net/phy/bcm87xx.c<br/>index e81404bf8994..299f9a8f30f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm87xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/bcm87xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/bcm87xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/bcm87xx.c</a></div><div class='hunk'>@@ -185,14 +185,10 @@ static irqreturn_t bcm87xx_handle_interrupt(struct phy_device *phydev)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcm8706_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int bcm87xx_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				    const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='del'>-	return phydev-&gt;c45_ids.device_ids[4] == PHY_ID_BCM8706;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bcm8727_match_phy_device(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	return phydev-&gt;c45_ids.device_ids[4] == PHY_ID_BCM8727;</div><div class='add'>+	return phydev-&gt;c45_ids.device_ids[4] == phydrv-&gt;phy_id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct phy_driver bcm87xx_driver[] = {</div><div class='hunk'>@@ -206,7 +202,7 @@ static struct phy_driver bcm87xx_driver[] = {</div><div class='ctx'> 	.read_status	= bcm87xx_read_status,</div><div class='ctx'> 	.config_intr	= bcm87xx_config_intr,</div><div class='ctx'> 	.handle_interrupt = bcm87xx_handle_interrupt,</div><div class='del'>-	.match_phy_device = bcm8706_match_phy_device,</div><div class='add'>+	.match_phy_device = bcm87xx_match_phy_device,</div><div class='ctx'> }, {</div><div class='ctx'> 	.phy_id		= PHY_ID_BCM8727,</div><div class='ctx'> 	.phy_id_mask	= 0xffffffff,</div><div class='hunk'>@@ -217,7 +213,7 @@ static struct phy_driver bcm87xx_driver[] = {</div><div class='ctx'> 	.read_status	= bcm87xx_read_status,</div><div class='ctx'> 	.config_intr	= bcm87xx_config_intr,</div><div class='ctx'> 	.handle_interrupt = bcm87xx_handle_interrupt,</div><div class='del'>-	.match_phy_device = bcm8727_match_phy_device,</div><div class='add'>+	.match_phy_device = bcm87xx_match_phy_device,</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(bcm87xx_driver);</div><div class='head'>diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c<br/>index ddded162c44c..cb306f9e80cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/broadcom.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/broadcom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/broadcom.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/broadcom.c</a></div><div class='hunk'>@@ -16,16 +16,13 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;linux/pm_wakeup.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/brcmphy.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/consumer.h&gt;</div><div class='ctx'> </div><div class='del'>-#define BRCM_PHY_MODEL(phydev) \</div><div class='del'>-	((phydev)-&gt;drv-&gt;phy_id &amp; (phydev)-&gt;drv-&gt;phy_id_mask)</div><div class='del'>-</div><div class='ctx'> #define BRCM_PHY_REV(phydev) \</div><div class='ctx'> 	((phydev)-&gt;drv-&gt;phy_id &amp; ~((phydev)-&gt;drv-&gt;phy_id_mask))</div><div class='ctx'> </div><div class='hunk'>@@ -249,8 +246,8 @@ static int bcm54xx_phydsp_config(struct phy_device *phydev)</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||</div><div class='del'>-	    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) {</div><div class='add'>+	if (phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM50610) ||</div><div class='add'>+	    phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM50610M)) {</div><div class='ctx'> 		/* Clear bit 9 to fix a phy interop issue. */</div><div class='ctx'> 		err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP08,</div><div class='ctx'> 					MII_BCM54XX_EXP_EXP08_RJCT_2MHZ);</div><div class='hunk'>@@ -264,7 +261,7 @@ static int bcm54xx_phydsp_config(struct phy_device *phydev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM57780) {</div><div class='add'>+	if (phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM57780)) {</div><div class='ctx'> 		int val;</div><div class='ctx'> </div><div class='ctx'> 		val = bcm_phy_read_exp(phydev, MII_BCM54XX_EXP_EXP75);</div><div class='hunk'>@@ -292,12 +289,12 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)</div><div class='ctx'> 	bool clk125en = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Abort if we are using an untested phy. */</div><div class='del'>-	if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 &amp;&amp;</div><div class='del'>-	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 &amp;&amp;</div><div class='del'>-	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M &amp;&amp;</div><div class='del'>-	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54210E &amp;&amp;</div><div class='del'>-	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54810 &amp;&amp;</div><div class='del'>-	    BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811)</div><div class='add'>+	if (!(phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM57780) ||</div><div class='add'>+	      phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM50610) ||</div><div class='add'>+	      phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM50610M) ||</div><div class='add'>+	      phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM54210E) ||</div><div class='add'>+	      phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM54810) ||</div><div class='add'>+	      phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM54811)))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3);</div><div class='hunk'>@@ -306,8 +303,8 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	orig = val;</div><div class='ctx'> </div><div class='del'>-	if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||</div><div class='del'>-	     BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &amp;&amp;</div><div class='add'>+	if ((phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM50610) ||</div><div class='add'>+	     phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM50610M)) &amp;&amp;</div><div class='ctx'> 	    BRCM_PHY_REV(phydev) &gt;= 0x3) {</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * Here, bit 0 _disables_ CLK125 when set.</div><div class='hunk'>@@ -316,7 +313,8 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)</div><div class='ctx'> 		clk125en = false;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (phydev-&gt;dev_flags &amp; PHY_BRCM_RX_REFCLK_UNUSED) {</div><div class='del'>-			if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811) {</div><div class='add'>+			if (!phy_id_compare_model(phydev-&gt;drv-&gt;phy_id,</div><div class='add'>+						  PHY_ID_BCM54811)) {</div><div class='ctx'> 				/* Here, bit 0 _enables_ CLK125 when set */</div><div class='ctx'> 				val &amp;= ~BCM54XX_SHD_SCR3_DEF_CLK125;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -330,9 +328,9 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)</div><div class='ctx'> 		val |= BCM54XX_SHD_SCR3_DLLAPD_DIS;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;dev_flags &amp; PHY_BRCM_DIS_TXCRXC_NOENRGY) {</div><div class='del'>-		if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54210E ||</div><div class='del'>-		    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810 ||</div><div class='del'>-		    BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54811)</div><div class='add'>+		if (phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM54210E) ||</div><div class='add'>+		    phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM54810) ||</div><div class='add'>+		    phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM54811))</div><div class='ctx'> 			val |= BCM54XX_SHD_SCR3_RXCTXC_DIS;</div><div class='ctx'> 		else</div><div class='ctx'> 			val |= BCM54XX_SHD_SCR3_TRDDAPD;</div><div class='hunk'>@@ -407,7 +405,7 @@ static int bcm5481x_set_brrmode(struct phy_device *phydev, bool on)</div><div class='ctx'> static int bcm54811_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bcm54xx_phy_priv *priv = phydev-&gt;priv;</div><div class='del'>-	int err, reg;</div><div class='add'>+	int err, reg, exp_sync_ethernet, aux_rgmii_en;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable CLK125 MUX on LED4 if ref clock is enabled. */</div><div class='ctx'> 	if (!(phydev-&gt;dev_flags &amp; PHY_BRCM_RX_REFCLK_UNUSED)) {</div><div class='hunk'>@@ -424,6 +422,36 @@ static int bcm54811_config_init(struct phy_device *phydev)</div><div class='ctx'> 	if (priv-&gt;brr_mode)</div><div class='ctx'> 		phydev-&gt;autoneg = 0;</div><div class='ctx'> </div><div class='add'>+	/* Enable MII Lite (No TXER, RXER, CRS, COL) if configured */</div><div class='add'>+	if (phydev-&gt;interface == PHY_INTERFACE_MODE_MIILITE)</div><div class='add'>+		exp_sync_ethernet = BCM_EXP_SYNC_ETHERNET_MII_LITE;</div><div class='add'>+	else</div><div class='add'>+		exp_sync_ethernet = 0;</div><div class='add'>+</div><div class='add'>+	err = bcm_phy_modify_exp(phydev, BCM_EXP_SYNC_ETHERNET,</div><div class='add'>+				 BCM_EXP_SYNC_ETHERNET_MII_LITE,</div><div class='add'>+				 exp_sync_ethernet);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Enable RGMII if configured */</div><div class='add'>+	if (phy_interface_is_rgmii(phydev))</div><div class='add'>+		aux_rgmii_en = MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_EN |</div><div class='add'>+			       MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN;</div><div class='add'>+	else</div><div class='add'>+		aux_rgmii_en = 0;</div><div class='add'>+</div><div class='add'>+	/* Also writing Reserved bits 6:5 because the documentation requires</div><div class='add'>+	 * them to be written to 0b11</div><div class='add'>+	 */</div><div class='add'>+	err = bcm54xx_auxctl_write(phydev,</div><div class='add'>+				   MII_BCM54XX_AUXCTL_SHDWSEL_MISC,</div><div class='add'>+				   MII_BCM54XX_AUXCTL_MISC_WREN |</div><div class='add'>+				   aux_rgmii_en |</div><div class='add'>+				   MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RSVD);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	return bcm5481x_set_brrmode(phydev, priv-&gt;brr_mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -449,14 +477,14 @@ static int bcm54xx_config_init(struct phy_device *phydev)</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||</div><div class='del'>-	     BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &amp;&amp;</div><div class='add'>+	if ((phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM50610) ||</div><div class='add'>+	     phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM50610M)) &amp;&amp;</div><div class='ctx'> 	    (phydev-&gt;dev_flags &amp; PHY_BRCM_CLEAR_RGMII_MODE))</div><div class='ctx'> 		bcm_phy_write_shadow(phydev, BCM54XX_SHD_RGMII_MODE, 0);</div><div class='ctx'> </div><div class='ctx'> 	bcm54xx_adjust_rxrefclk(phydev);</div><div class='ctx'> </div><div class='del'>-	switch (BRCM_PHY_MODEL(phydev)) {</div><div class='add'>+	switch (phydev-&gt;drv-&gt;phy_id &amp; PHY_ID_MATCH_MODEL_MASK) {</div><div class='ctx'> 	case PHY_ID_BCM50610:</div><div class='ctx'> 	case PHY_ID_BCM50610M:</div><div class='ctx'> 		err = bcm54xx_config_clock_delay(phydev);</div><div class='hunk'>@@ -655,7 +683,7 @@ static int bcm5481x_read_abilities(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np = phydev-&gt;mdio.dev.of_node;</div><div class='ctx'> 	struct bcm54xx_phy_priv *priv = phydev-&gt;priv;</div><div class='del'>-	int i, val, err;</div><div class='add'>+	int i, val, err, aneg;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(bcm54811_linkmodes); i++)</div><div class='ctx'> 		linkmode_clear_bit(bcm54811_linkmodes[i], phydev-&gt;supported);</div><div class='hunk'>@@ -676,9 +704,19 @@ static int bcm5481x_read_abilities(struct phy_device *phydev)</div><div class='ctx'> 		if (val &lt; 0)</div><div class='ctx'> 			return val;</div><div class='ctx'> </div><div class='add'>+		/* BCM54811 is not capable of LDS but the corresponding bit</div><div class='add'>+		 * in LRESR is set to 1 and marked "Ignore" in the datasheet.</div><div class='add'>+		 * So we must read the bcm54811 as unable to auto-negotiate</div><div class='add'>+		 * in BroadR-Reach mode.</div><div class='add'>+		 */</div><div class='add'>+		if (phy_id_compare_model(phydev-&gt;drv-&gt;phy_id, PHY_ID_BCM54811))</div><div class='add'>+			aneg = 0;</div><div class='add'>+		else</div><div class='add'>+			aneg = val &amp; LRESR_LDSABILITY;</div><div class='add'>+</div><div class='ctx'> 		linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,</div><div class='ctx'> 				 phydev-&gt;supported,</div><div class='del'>-				 val &amp; LRESR_LDSABILITY);</div><div class='add'>+				 aneg);</div><div class='ctx'> 		linkmode_mod_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT,</div><div class='ctx'> 				 phydev-&gt;supported,</div><div class='ctx'> 				 val &amp; LRESR_100_1PAIR);</div><div class='hunk'>@@ -735,8 +773,15 @@ static int bcm54811_config_aneg(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	/* Aneg firstly. */</div><div class='ctx'> 	if (priv-&gt;brr_mode) {</div><div class='del'>-		/* BCM54811 is only capable of autonegotiation in IEEE mode */</div><div class='del'>-		phydev-&gt;autoneg = 0;</div><div class='add'>+		/* BCM54811 is only capable of autonegotiation in IEEE mode.</div><div class='add'>+		 * In BroadR-Reach mode, disable the Long Distance Signaling,</div><div class='add'>+		 * the BRR mode autoneg as supported in other Broadcom PHYs.</div><div class='add'>+		 * This bit is marked as "Reserved" and "Default 1, must be</div><div class='add'>+		 *  written to 0 after every device reset" in the datasheet.</div><div class='add'>+		 */</div><div class='add'>+		ret = phy_modify(phydev, MII_BCM54XX_LRECR, LRECR_LDSEN, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 		ret = bcm_config_lre_aneg(phydev, false);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = genphy_config_aneg(phydev);</div><div class='hunk'>@@ -859,7 +904,7 @@ static int brcm_fet_config_init(struct phy_device *phydev)</div><div class='ctx'> 		return reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Unmask events we are interested in and mask interrupts globally. */</div><div class='del'>-	if (phydev-&gt;phy_id == PHY_ID_BCM5221)</div><div class='add'>+	if (phydev-&gt;drv-&gt;phy_id == PHY_ID_BCM5221)</div><div class='ctx'> 		reg = MII_BRCM_FET_IR_ENABLE |</div><div class='ctx'> 		      MII_BRCM_FET_IR_MASK;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -888,7 +933,7 @@ static int brcm_fet_config_init(struct phy_device *phydev)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (phydev-&gt;phy_id != PHY_ID_BCM5221) {</div><div class='add'>+	if (phydev-&gt;drv-&gt;phy_id != PHY_ID_BCM5221) {</div><div class='ctx'> 		/* Set the LED mode */</div><div class='ctx'> 		reg = __phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4);</div><div class='ctx'> 		if (reg &lt; 0) {</div><div class='hunk'>@@ -1009,7 +1054,7 @@ static int brcm_fet_suspend(struct phy_device *phydev)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (phydev-&gt;phy_id == PHY_ID_BCM5221)</div><div class='add'>+	if (phydev-&gt;drv-&gt;phy_id == PHY_ID_BCM5221)</div><div class='ctx'> 		/* Force Low Power Mode with clock enabled */</div><div class='ctx'> 		reg = BCM5221_SHDW_AM4_EN_CLK_LPM | BCM5221_SHDW_AM4_FORCE_LPM;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1409,8 +1454,7 @@ static int bcm54811_read_status(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> {</div><div class='del'>-	.phy_id		= PHY_ID_BCM5411,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM5411),</div><div class='ctx'> 	.name		= "Broadcom BCM5411",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1422,8 +1466,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.handle_interrupt = bcm_phy_handle_interrupt,</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM5421,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM5421),</div><div class='ctx'> 	.name		= "Broadcom BCM5421",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1435,8 +1478,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.handle_interrupt = bcm_phy_handle_interrupt,</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM54210E,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM54210E),</div><div class='ctx'> 	.name		= "Broadcom BCM54210E",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.flags		= PHY_ALWAYS_CALL_SUSPEND,</div><div class='hunk'>@@ -1454,8 +1496,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.set_wol	= bcm54xx_phy_set_wol,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM5461,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM5461),</div><div class='ctx'> 	.name		= "Broadcom BCM5461",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1468,8 +1509,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM54612E,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM54612E),</div><div class='ctx'> 	.name		= "Broadcom BCM54612E",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1484,8 +1524,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.suspend	= bcm54xx_suspend,</div><div class='ctx'> 	.resume		= bcm54xx_resume,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM54616S,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM54616S),</div><div class='ctx'> 	.name		= "Broadcom BCM54616S",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.soft_reset     = genphy_soft_reset,</div><div class='hunk'>@@ -1498,8 +1537,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM5464,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM5464),</div><div class='ctx'> 	.name		= "Broadcom BCM5464",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1514,8 +1552,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM5481,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM5481),</div><div class='ctx'> 	.name		= "Broadcom BCM5481",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1529,8 +1566,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id         = PHY_ID_BCM54810,</div><div class='del'>-	.phy_id_mask    = 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM54810),</div><div class='ctx'> 	.name           = "Broadcom BCM54810",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1548,8 +1584,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id         = PHY_ID_BCM54811,</div><div class='del'>-	.phy_id_mask    = 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM54811),</div><div class='ctx'> 	.name           = "Broadcom BCM54811",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1567,8 +1602,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM5482,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM5482),</div><div class='ctx'> 	.name		= "Broadcom BCM5482",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1581,8 +1615,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM50610,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM50610),</div><div class='ctx'> 	.name		= "Broadcom BCM50610",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1597,8 +1630,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.resume		= bcm54xx_resume,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM50610M,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM50610M),</div><div class='ctx'> 	.name		= "Broadcom BCM50610M",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1613,8 +1645,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.resume		= bcm54xx_resume,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM57780,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM57780),</div><div class='ctx'> 	.name		= "Broadcom BCM57780",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1627,8 +1658,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCMAC131,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCMAC131),</div><div class='ctx'> 	.name		= "Broadcom BCMAC131",</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> 	.config_init	= brcm_fet_config_init,</div><div class='hunk'>@@ -1637,8 +1667,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.suspend	= brcm_fet_suspend,</div><div class='ctx'> 	.resume		= brcm_fet_config_init,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM5241,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM5241),</div><div class='ctx'> 	.name		= "Broadcom BCM5241",</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> 	.config_init	= brcm_fet_config_init,</div><div class='hunk'>@@ -1647,8 +1676,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.suspend	= brcm_fet_suspend,</div><div class='ctx'> 	.resume		= brcm_fet_config_init,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM5221,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM5221),</div><div class='ctx'> 	.name		= "Broadcom BCM5221",</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> 	.config_init	= brcm_fet_config_init,</div><div class='hunk'>@@ -1659,8 +1687,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.config_aneg	= bcm5221_config_aneg,</div><div class='ctx'> 	.read_status	= bcm5221_read_status,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM5395,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM5395),</div><div class='ctx'> 	.name		= "Broadcom BCM5395",</div><div class='ctx'> 	.flags		= PHY_IS_INTERNAL,</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='hunk'>@@ -1671,8 +1698,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM53125,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM53125),</div><div class='ctx'> 	.name		= "Broadcom BCM53125",</div><div class='ctx'> 	.flags		= PHY_IS_INTERNAL,</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='hunk'>@@ -1686,8 +1712,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_BCM53128,</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM53128),</div><div class='ctx'> 	.name		= "Broadcom BCM53128",</div><div class='ctx'> 	.flags		= PHY_IS_INTERNAL,</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='hunk'>@@ -1701,8 +1726,7 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> 	.link_change_notify	= bcm54xx_link_change_notify,</div><div class='ctx'> 	.led_brightness_set	= bcm_phy_led_brightness_set,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id         = PHY_ID_BCM89610,</div><div class='del'>-	.phy_id_mask    = 0xfffffff0,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_BCM89610),</div><div class='ctx'> 	.name           = "Broadcom BCM89610",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.get_sset_count	= bcm_phy_get_sset_count,</div><div class='hunk'>@@ -1717,28 +1741,28 @@ static struct phy_driver broadcom_drivers[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(broadcom_drivers);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused broadcom_tbl[] = {</div><div class='del'>-	{ PHY_ID_BCM5411, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM5421, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM54210E, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM5461, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM54612E, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM54616S, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM5464, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM5481, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM54810, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM54811, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM5482, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM50610, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM50610M, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM57780, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCMAC131, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM5221, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM5241, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM5395, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM53125, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM53128, 0xfffffff0 },</div><div class='del'>-	{ PHY_ID_BCM89610, 0xfffffff0 },</div><div class='add'>+static const struct mdio_device_id __maybe_unused broadcom_tbl[] = {</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM5411) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM5421) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM54210E) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM5461) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM54612E) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM54616S) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM5464) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM5481) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM54810) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM54811) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM5482) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM50610) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM50610M) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM57780) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCMAC131) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM5221) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM5241) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM5395) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM53125) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM53128) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_BCM89610) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/cicada.c b/drivers/net/phy/cicada.c<br/>index ef5f412e101f..d87cf8b94cf8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/cicada.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/cicada.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/cicada.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/cicada.c</a></div><div class='hunk'>@@ -145,7 +145,7 @@ static struct phy_driver cis820x_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(cis820x_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused cicada_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused cicada_tbl[] = {</div><div class='ctx'> 	{ 0x000fc410, 0x000ffff0 },</div><div class='ctx'> 	{ 0x000fc440, 0x000fffc0 },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c<br/>index 40514a94e6ff..3b65f37f1c57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/cortina.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/cortina.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/cortina.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/cortina.c</a></div><div class='hunk'>@@ -87,7 +87,7 @@ static struct phy_driver cortina_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(cortina_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused cortina_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused cortina_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_CS4340, 0xffffffff},</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c<br/>index 4ac4bce1bf32..fa3692508f16 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/davicom.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/davicom.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/davicom.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/davicom.c</a></div><div class='hunk'>@@ -209,7 +209,7 @@ static struct phy_driver dm91xx_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(dm91xx_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused davicom_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused davicom_tbl[] = {</div><div class='ctx'> 	{ 0x0181b880, 0x0ffffff0 },</div><div class='ctx'> 	{ 0x0181b8b0, 0x0ffffff0 },</div><div class='ctx'> 	{ 0x0181b8a0, 0x0ffffff0 },</div><div class='head'>diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c<br/>index 075d2beea716..b950acc9c49b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83640.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83640.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83640.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/dp83640.c</a></div><div class='hunk'>@@ -478,13 +478,6 @@ static int ptp_dp83640_enable(struct ptp_clock_info *ptp,</div><div class='ctx'> </div><div class='ctx'> 	switch (rq-&gt;type) {</div><div class='ctx'> 	case PTP_CLK_REQ_EXTTS:</div><div class='del'>-		/* Reject requests with unsupported flags */</div><div class='del'>-		if (rq-&gt;extts.flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-					PTP_RISING_EDGE |</div><div class='del'>-					PTP_FALLING_EDGE |</div><div class='del'>-					PTP_STRICT_FLAGS))</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 		/* Reject requests to enable time stamping on both edges. */</div><div class='ctx'> 		if ((rq-&gt;extts.flags &amp; PTP_STRICT_FLAGS) &amp;&amp;</div><div class='ctx'> 		    (rq-&gt;extts.flags &amp; PTP_ENABLE_FEATURE) &amp;&amp;</div><div class='hunk'>@@ -513,9 +506,6 @@ static int ptp_dp83640_enable(struct ptp_clock_info *ptp,</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	case PTP_CLK_REQ_PEROUT:</div><div class='del'>-		/* Reject requests with unsupported flags */</div><div class='del'>-		if (rq-&gt;perout.flags)</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='ctx'> 		if (rq-&gt;perout.index &gt;= N_PER_OUT)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		return periodic_output(clock, rq, on, rq-&gt;perout.index);</div><div class='hunk'>@@ -963,30 +953,6 @@ static void decode_status_frame(struct dp83640_private *dp83640,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dp83640_free_clocks(void)</div><div class='del'>-{</div><div class='del'>-	struct dp83640_clock *clock;</div><div class='del'>-	struct list_head *this, *next;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;phyter_clocks_lock);</div><div class='del'>-</div><div class='del'>-	list_for_each_safe(this, next, &amp;phyter_clocks) {</div><div class='del'>-		clock = list_entry(this, struct dp83640_clock, list);</div><div class='del'>-		if (!list_empty(&amp;clock-&gt;phylist)) {</div><div class='del'>-			pr_warn("phy list non-empty while unloading\n");</div><div class='del'>-			BUG();</div><div class='del'>-		}</div><div class='del'>-		list_del(&amp;clock-&gt;list);</div><div class='del'>-		mutex_destroy(&amp;clock-&gt;extreg_lock);</div><div class='del'>-		mutex_destroy(&amp;clock-&gt;clock_lock);</div><div class='del'>-		put_device(&amp;clock-&gt;bus-&gt;dev);</div><div class='del'>-		kfree(clock-&gt;caps.pin_config);</div><div class='del'>-		kfree(clock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;phyter_clocks_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void dp83640_clock_init(struct dp83640_clock *clock, struct mii_bus *bus)</div><div class='ctx'> {</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;clock-&gt;list);</div><div class='hunk'>@@ -1002,6 +968,9 @@ static void dp83640_clock_init(struct dp83640_clock *clock, struct mii_bus *bus)</div><div class='ctx'> 	clock-&gt;caps.n_per_out	= N_PER_OUT;</div><div class='ctx'> 	clock-&gt;caps.n_pins	= DP83640_N_PINS;</div><div class='ctx'> 	clock-&gt;caps.pps		= 0;</div><div class='add'>+	clock-&gt;caps.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+					    PTP_FALLING_EDGE |</div><div class='add'>+					    PTP_STRICT_FLAGS;</div><div class='ctx'> 	clock-&gt;caps.adjfine	= ptp_dp83640_adjfine;</div><div class='ctx'> 	clock-&gt;caps.adjtime	= ptp_dp83640_adjtime;</div><div class='ctx'> 	clock-&gt;caps.gettime64	= ptp_dp83640_gettime;</div><div class='hunk'>@@ -1207,9 +1176,21 @@ static irqreturn_t dp83640_handle_interrupt(struct phy_device *phydev)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dp83640_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='del'>-			    struct kernel_hwtstamp_config *cfg,</div><div class='del'>-			    struct netlink_ext_ack *extack)</div><div class='add'>+static int dp83640_hwtstamp_get(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='add'>+	struct dp83640_private *dp83640 =</div><div class='add'>+		container_of(mii_ts, struct dp83640_private, mii_ts);</div><div class='add'>+</div><div class='add'>+	cfg-&gt;rx_filter = dp83640-&gt;hwts_rx_en;</div><div class='add'>+	cfg-&gt;tx_type = dp83640-&gt;hwts_tx_en;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83640_hwtstamp_set(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct dp83640_private *dp83640 =</div><div class='ctx'> 		container_of(mii_ts, struct dp83640_private, mii_ts);</div><div class='hunk'>@@ -1229,7 +1210,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='del'>-		dp83640-&gt;hwts_rx_en = 1;</div><div class='add'>+		dp83640-&gt;hwts_rx_en = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='ctx'> 		dp83640-&gt;layer = PTP_CLASS_L4;</div><div class='ctx'> 		dp83640-&gt;version = PTP_CLASS_V1;</div><div class='ctx'> 		cfg-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='hunk'>@@ -1237,7 +1218,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='del'>-		dp83640-&gt;hwts_rx_en = 1;</div><div class='add'>+		dp83640-&gt;hwts_rx_en = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;</div><div class='ctx'> 		dp83640-&gt;layer = PTP_CLASS_L4;</div><div class='ctx'> 		dp83640-&gt;version = PTP_CLASS_V2;</div><div class='ctx'> 		cfg-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;</div><div class='hunk'>@@ -1245,7 +1226,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='del'>-		dp83640-&gt;hwts_rx_en = 1;</div><div class='add'>+		dp83640-&gt;hwts_rx_en = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='ctx'> 		dp83640-&gt;layer = PTP_CLASS_L2;</div><div class='ctx'> 		dp83640-&gt;version = PTP_CLASS_V2;</div><div class='ctx'> 		cfg-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='hunk'>@@ -1253,7 +1234,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='ctx'> 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='del'>-		dp83640-&gt;hwts_rx_en = 1;</div><div class='add'>+		dp83640-&gt;hwts_rx_en = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='ctx'> 		dp83640-&gt;layer = PTP_CLASS_L4 | PTP_CLASS_L2;</div><div class='ctx'> 		dp83640-&gt;version = PTP_CLASS_V2;</div><div class='ctx'> 		cfg-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='hunk'>@@ -1438,7 +1419,8 @@ static int dp83640_probe(struct phy_device *phydev)</div><div class='ctx'> 	dp83640-&gt;phydev = phydev;</div><div class='ctx'> 	dp83640-&gt;mii_ts.rxtstamp = dp83640_rxtstamp;</div><div class='ctx'> 	dp83640-&gt;mii_ts.txtstamp = dp83640_txtstamp;</div><div class='del'>-	dp83640-&gt;mii_ts.hwtstamp = dp83640_hwtstamp;</div><div class='add'>+	dp83640-&gt;mii_ts.hwtstamp_set = dp83640_hwtstamp_set;</div><div class='add'>+	dp83640-&gt;mii_ts.hwtstamp_get = dp83640_hwtstamp_get;</div><div class='ctx'> 	dp83640-&gt;mii_ts.ts_info  = dp83640_ts_info;</div><div class='ctx'> </div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;dp83640-&gt;ts_work, rx_timestamp_work);</div><div class='hunk'>@@ -1486,6 +1468,7 @@ static void dp83640_remove(struct phy_device *phydev)</div><div class='ctx'> 	struct dp83640_clock *clock;</div><div class='ctx'> 	struct list_head *this, *next;</div><div class='ctx'> 	struct dp83640_private *tmp, *dp83640 = phydev-&gt;priv;</div><div class='add'>+	bool remove_clock = false;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;mdio.addr == BROADCAST_ADDR)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1513,11 +1496,27 @@ static void dp83640_remove(struct phy_device *phydev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!clock-&gt;chosen &amp;&amp; list_empty(&amp;clock-&gt;phylist))</div><div class='add'>+		remove_clock = true;</div><div class='add'>+</div><div class='ctx'> 	dp83640_clock_put(clock);</div><div class='ctx'> 	kfree(dp83640);</div><div class='add'>+</div><div class='add'>+	if (remove_clock) {</div><div class='add'>+		mutex_lock(&amp;phyter_clocks_lock);</div><div class='add'>+		list_del(&amp;clock-&gt;list);</div><div class='add'>+		mutex_unlock(&amp;phyter_clocks_lock);</div><div class='add'>+</div><div class='add'>+		mutex_destroy(&amp;clock-&gt;extreg_lock);</div><div class='add'>+		mutex_destroy(&amp;clock-&gt;clock_lock);</div><div class='add'>+		put_device(&amp;clock-&gt;bus-&gt;dev);</div><div class='add'>+		kfree(clock-&gt;caps.pin_config);</div><div class='add'>+		kfree(clock);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct phy_driver dp83640_driver = {</div><div class='add'>+static struct phy_driver dp83640_driver[] = {</div><div class='add'>+{</div><div class='ctx'> 	.phy_id		= DP83640_PHY_ID,</div><div class='ctx'> 	.phy_id_mask	= 0xfffffff0,</div><div class='ctx'> 	.name		= "NatSemi DP83640",</div><div class='hunk'>@@ -1528,27 +1527,16 @@ static struct phy_driver dp83640_driver = {</div><div class='ctx'> 	.config_init	= dp83640_config_init,</div><div class='ctx'> 	.config_intr    = dp83640_config_intr,</div><div class='ctx'> 	.handle_interrupt = dp83640_handle_interrupt,</div><div class='add'>+},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init dp83640_init(void)</div><div class='del'>-{</div><div class='del'>-	return phy_driver_register(&amp;dp83640_driver, THIS_MODULE);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit dp83640_exit(void)</div><div class='del'>-{</div><div class='del'>-	dp83640_free_clocks();</div><div class='del'>-	phy_driver_unregister(&amp;dp83640_driver);</div><div class='del'>-}</div><div class='add'>+module_phy_driver(dp83640_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("National Semiconductor DP83640 PHY driver");</div><div class='ctx'> MODULE_AUTHOR("Richard Cochran &lt;richardcochran@gmail.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-module_init(dp83640_init);</div><div class='del'>-module_exit(dp83640_exit);</div><div class='del'>-</div><div class='del'>-static struct mdio_device_id __maybe_unused dp83640_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused dp83640_tbl[] = {</div><div class='ctx'> 	{ DP83640_PHY_ID, 0xfffffff0 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c<br/>index cf8b6d0bfaa9..33db21251f2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83822.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83822.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83822.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/dp83822.c</a></div><div class='hunk'>@@ -22,8 +22,6 @@</div><div class='ctx'> #define DP83826C_PHY_ID		0x2000a130</div><div class='ctx'> #define DP83826NC_PHY_ID	0x2000a110</div><div class='ctx'> </div><div class='del'>-#define DP83822_DEVADDR		0x1f</div><div class='del'>-</div><div class='ctx'> #define MII_DP83822_CTRL_2	0x0a</div><div class='ctx'> #define MII_DP83822_PHYSTS	0x10</div><div class='ctx'> #define MII_DP83822_PHYSCR	0x11</div><div class='hunk'>@@ -32,6 +30,12 @@</div><div class='ctx'> #define MII_DP83822_FCSCR	0x14</div><div class='ctx'> #define MII_DP83822_RCSR	0x17</div><div class='ctx'> #define MII_DP83822_RESET_CTRL	0x1f</div><div class='add'>+#define MII_DP83822_MLEDCR	0x25</div><div class='add'>+#define MII_DP83822_LDCTRL	0x403</div><div class='add'>+#define MII_DP83822_LEDCFG1	0x460</div><div class='add'>+#define MII_DP83822_IOCTRL	0x461</div><div class='add'>+#define MII_DP83822_IOCTRL1	0x462</div><div class='add'>+#define MII_DP83822_IOCTRL2	0x463</div><div class='ctx'> #define MII_DP83822_GENCFG	0x465</div><div class='ctx'> #define MII_DP83822_SOR1	0x467</div><div class='ctx'> </div><div class='hunk'>@@ -106,6 +110,56 @@</div><div class='ctx'> #define DP83822_RX_CLK_SHIFT	BIT(12)</div><div class='ctx'> #define DP83822_TX_CLK_SHIFT	BIT(11)</div><div class='ctx'> </div><div class='add'>+/* MLEDCR bits */</div><div class='add'>+#define DP83822_MLEDCR_CFG		GENMASK(6, 3)</div><div class='add'>+#define DP83822_MLEDCR_ROUTE		GENMASK(1, 0)</div><div class='add'>+#define DP83822_MLEDCR_ROUTE_LED_0	DP83822_MLEDCR_ROUTE</div><div class='add'>+</div><div class='add'>+/* LEDCFG1 bits */</div><div class='add'>+#define DP83822_LEDCFG1_LED1_CTRL	GENMASK(11, 8)</div><div class='add'>+#define DP83822_LEDCFG1_LED3_CTRL	GENMASK(7, 4)</div><div class='add'>+</div><div class='add'>+/* IOCTRL bits */</div><div class='add'>+#define DP83822_IOCTRL_MAC_IMPEDANCE_CTRL	GENMASK(4, 1)</div><div class='add'>+</div><div class='add'>+/* IOCTRL1 bits */</div><div class='add'>+#define DP83822_IOCTRL1_GPIO3_CTRL		GENMASK(10, 8)</div><div class='add'>+#define DP83822_IOCTRL1_GPIO3_CTRL_LED3		BIT(0)</div><div class='add'>+#define DP83822_IOCTRL1_GPIO1_CTRL		GENMASK(2, 0)</div><div class='add'>+#define DP83822_IOCTRL1_GPIO1_CTRL_LED_1	BIT(0)</div><div class='add'>+</div><div class='add'>+/* LDCTRL bits */</div><div class='add'>+#define DP83822_100BASE_TX_LINE_DRIVER_SWING	GENMASK(7, 4)</div><div class='add'>+</div><div class='add'>+/* IOCTRL2 bits */</div><div class='add'>+#define DP83822_IOCTRL2_GPIO2_CLK_SRC		GENMASK(6, 4)</div><div class='add'>+#define DP83822_IOCTRL2_GPIO2_CTRL		GENMASK(2, 0)</div><div class='add'>+#define DP83822_IOCTRL2_GPIO2_CTRL_CLK_REF	GENMASK(1, 0)</div><div class='add'>+#define DP83822_IOCTRL2_GPIO2_CTRL_MLED		BIT(0)</div><div class='add'>+</div><div class='add'>+#define DP83822_CLK_SRC_MAC_IF			0x0</div><div class='add'>+#define DP83822_CLK_SRC_XI			0x1</div><div class='add'>+#define DP83822_CLK_SRC_INT_REF			0x2</div><div class='add'>+#define DP83822_CLK_SRC_RMII_MASTER_MODE_REF	0x4</div><div class='add'>+#define DP83822_CLK_SRC_FREE_RUNNING		0x6</div><div class='add'>+#define DP83822_CLK_SRC_RECOVERED		0x7</div><div class='add'>+</div><div class='add'>+#define DP83822_LED_FN_LINK		0x0 /* Link established */</div><div class='add'>+#define DP83822_LED_FN_RX_TX		0x1 /* Receive or Transmit activity */</div><div class='add'>+#define DP83822_LED_FN_TX		0x2 /* Transmit activity */</div><div class='add'>+#define DP83822_LED_FN_RX		0x3 /* Receive activity */</div><div class='add'>+#define DP83822_LED_FN_COLLISION	0x4 /* Collision detected */</div><div class='add'>+#define DP83822_LED_FN_LINK_100_BTX	0x5 /* 100 BTX link established */</div><div class='add'>+#define DP83822_LED_FN_LINK_10_BT	0x6 /* 10BT link established */</div><div class='add'>+#define DP83822_LED_FN_FULL_DUPLEX	0x7 /* Full duplex */</div><div class='add'>+#define DP83822_LED_FN_LINK_RX_TX	0x8 /* Link established, blink for rx or tx activity */</div><div class='add'>+#define DP83822_LED_FN_ACTIVE_STRETCH	0x9 /* Active Stretch Signal */</div><div class='add'>+#define DP83822_LED_FN_MII_LINK		0xa /* MII LINK (100BT+FD) */</div><div class='add'>+#define DP83822_LED_FN_LPI_MODE		0xb /* LPI Mode (EEE) */</div><div class='add'>+#define DP83822_LED_FN_RX_TX_ERR	0xc /* TX/RX MII Error */</div><div class='add'>+#define DP83822_LED_FN_LINK_LOST	0xd /* Link Lost */</div><div class='add'>+#define DP83822_LED_FN_PRBS_ERR		0xe /* Blink for PRBS error */</div><div class='add'>+</div><div class='ctx'> /* SOR1 mode */</div><div class='ctx'> #define DP83822_STRAP_MODE1	0</div><div class='ctx'> #define DP83822_STRAP_MODE2	BIT(0)</div><div class='hunk'>@@ -134,6 +188,13 @@</div><div class='ctx'> 					ADVERTISED_FIBRE | \</div><div class='ctx'> 					ADVERTISED_Pause | ADVERTISED_Asym_Pause)</div><div class='ctx'> </div><div class='add'>+#define DP83822_MAX_LED_PINS		4</div><div class='add'>+</div><div class='add'>+#define DP83822_LED_INDEX_LED_0		0</div><div class='add'>+#define DP83822_LED_INDEX_LED_1_GPIO1	1</div><div class='add'>+#define DP83822_LED_INDEX_COL_GPIO2	2</div><div class='add'>+#define DP83822_LED_INDEX_RX_D3_GPIO3	3</div><div class='add'>+</div><div class='ctx'> struct dp83822_private {</div><div class='ctx'> 	bool fx_signal_det_low;</div><div class='ctx'> 	int fx_enabled;</div><div class='hunk'>@@ -141,6 +202,11 @@ struct dp83822_private {</div><div class='ctx'> 	u8 cfg_dac_minus;</div><div class='ctx'> 	u8 cfg_dac_plus;</div><div class='ctx'> 	struct ethtool_wolinfo wol;</div><div class='add'>+	bool set_gpio2_clk_out;</div><div class='add'>+	u32 gpio2_clk_out;</div><div class='add'>+	bool led_pin_enable[DP83822_MAX_LED_PINS];</div><div class='add'>+	int tx_amplitude_100base_tx_index;</div><div class='add'>+	int mac_termination_index;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int dp83822_config_wol(struct phy_device *phydev,</div><div class='hunk'>@@ -159,14 +225,14 @@ static int dp83822_config_wol(struct phy_device *phydev,</div><div class='ctx'> 		/* MAC addresses start with byte 5, but stored in mac[0].</div><div class='ctx'> 		 * 822 PHYs store bytes 4|5, 2|3, 0|1</div><div class='ctx'> 		 */</div><div class='del'>-		phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA1,</div><div class='add'>+		phy_write_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_WOL_DA1,</div><div class='ctx'> 			      (mac[1] &lt;&lt; 8) | mac[0]);</div><div class='del'>-		phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA2,</div><div class='add'>+		phy_write_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_WOL_DA2,</div><div class='ctx'> 			      (mac[3] &lt;&lt; 8) | mac[2]);</div><div class='del'>-		phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA3,</div><div class='add'>+		phy_write_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_WOL_DA3,</div><div class='ctx'> 			      (mac[5] &lt;&lt; 8) | mac[4]);</div><div class='ctx'> </div><div class='del'>-		value = phy_read_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+		value = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 				     MII_DP83822_WOL_CFG);</div><div class='ctx'> 		if (wol-&gt;wolopts &amp; WAKE_MAGIC)</div><div class='ctx'> 			value |= DP83822_WOL_MAGIC_EN;</div><div class='hunk'>@@ -174,13 +240,13 @@ static int dp83822_config_wol(struct phy_device *phydev,</div><div class='ctx'> 			value &amp;= ~DP83822_WOL_MAGIC_EN;</div><div class='ctx'> </div><div class='ctx'> 		if (wol-&gt;wolopts &amp; WAKE_MAGICSECURE) {</div><div class='del'>-			phy_write_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+			phy_write_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 				      MII_DP83822_RXSOP1,</div><div class='ctx'> 				      (wol-&gt;sopass[1] &lt;&lt; 8) | wol-&gt;sopass[0]);</div><div class='del'>-			phy_write_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+			phy_write_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 				      MII_DP83822_RXSOP2,</div><div class='ctx'> 				      (wol-&gt;sopass[3] &lt;&lt; 8) | wol-&gt;sopass[2]);</div><div class='del'>-			phy_write_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+			phy_write_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 				      MII_DP83822_RXSOP3,</div><div class='ctx'> 				      (wol-&gt;sopass[5] &lt;&lt; 8) | wol-&gt;sopass[4]);</div><div class='ctx'> 			value |= DP83822_WOL_SECURE_ON;</div><div class='hunk'>@@ -194,10 +260,10 @@ static int dp83822_config_wol(struct phy_device *phydev,</div><div class='ctx'> 		value |= DP83822_WOL_EN | DP83822_WOL_INDICATION_SEL |</div><div class='ctx'> 			 DP83822_WOL_CLR_INDICATION;</div><div class='ctx'> </div><div class='del'>-		return phy_write_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+		return phy_write_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 				     MII_DP83822_WOL_CFG, value);</div><div class='ctx'> 	} else {</div><div class='del'>-		return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+		return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 					  MII_DP83822_WOL_CFG,</div><div class='ctx'> 					  DP83822_WOL_EN |</div><div class='ctx'> 					  DP83822_WOL_MAGIC_EN |</div><div class='hunk'>@@ -226,23 +292,23 @@ static void dp83822_get_wol(struct phy_device *phydev,</div><div class='ctx'> 	wol-&gt;supported = (WAKE_MAGIC | WAKE_MAGICSECURE);</div><div class='ctx'> 	wol-&gt;wolopts = 0;</div><div class='ctx'> </div><div class='del'>-	value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);</div><div class='add'>+	value = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_WOL_CFG);</div><div class='ctx'> </div><div class='ctx'> 	if (value &amp; DP83822_WOL_MAGIC_EN)</div><div class='ctx'> 		wol-&gt;wolopts |= WAKE_MAGIC;</div><div class='ctx'> </div><div class='ctx'> 	if (value &amp; DP83822_WOL_SECURE_ON) {</div><div class='del'>-		sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+		sopass_val = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 					  MII_DP83822_RXSOP1);</div><div class='ctx'> 		wol-&gt;sopass[0] = (sopass_val &amp; 0xff);</div><div class='ctx'> 		wol-&gt;sopass[1] = (sopass_val &gt;&gt; 8);</div><div class='ctx'> </div><div class='del'>-		sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+		sopass_val = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 					  MII_DP83822_RXSOP2);</div><div class='ctx'> 		wol-&gt;sopass[2] = (sopass_val &amp; 0xff);</div><div class='ctx'> 		wol-&gt;sopass[3] = (sopass_val &gt;&gt; 8);</div><div class='ctx'> </div><div class='del'>-		sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+		sopass_val = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 					  MII_DP83822_RXSOP3);</div><div class='ctx'> 		wol-&gt;sopass[4] = (sopass_val &amp; 0xff);</div><div class='ctx'> 		wol-&gt;sopass[5] = (sopass_val &gt;&gt; 8);</div><div class='hunk'>@@ -405,43 +471,107 @@ static int dp83822_read_status(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int dp83822_config_init_leds(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct dp83822_private *dp83822 = phydev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (dp83822-&gt;led_pin_enable[DP83822_LED_INDEX_LED_0]) {</div><div class='add'>+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_MLEDCR,</div><div class='add'>+				     DP83822_MLEDCR_ROUTE,</div><div class='add'>+				     FIELD_PREP(DP83822_MLEDCR_ROUTE,</div><div class='add'>+						DP83822_MLEDCR_ROUTE_LED_0));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	} else if (dp83822-&gt;led_pin_enable[DP83822_LED_INDEX_COL_GPIO2]) {</div><div class='add'>+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_IOCTRL2,</div><div class='add'>+				     DP83822_IOCTRL2_GPIO2_CTRL,</div><div class='add'>+				     FIELD_PREP(DP83822_IOCTRL2_GPIO2_CTRL,</div><div class='add'>+						DP83822_IOCTRL2_GPIO2_CTRL_MLED));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dp83822-&gt;led_pin_enable[DP83822_LED_INDEX_LED_1_GPIO1]) {</div><div class='add'>+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_IOCTRL1,</div><div class='add'>+				     DP83822_IOCTRL1_GPIO1_CTRL,</div><div class='add'>+				     FIELD_PREP(DP83822_IOCTRL1_GPIO1_CTRL,</div><div class='add'>+						DP83822_IOCTRL1_GPIO1_CTRL_LED_1));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dp83822-&gt;led_pin_enable[DP83822_LED_INDEX_RX_D3_GPIO3]) {</div><div class='add'>+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_IOCTRL1,</div><div class='add'>+				     DP83822_IOCTRL1_GPIO3_CTRL,</div><div class='add'>+				     FIELD_PREP(DP83822_IOCTRL1_GPIO3_CTRL,</div><div class='add'>+						DP83822_IOCTRL1_GPIO3_CTRL_LED3));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int dp83822_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dp83822_private *dp83822 = phydev-&gt;priv;</div><div class='del'>-	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='ctx'> 	int rgmii_delay = 0;</div><div class='ctx'> 	s32 rx_int_delay;</div><div class='ctx'> 	s32 tx_int_delay;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	int bmcr;</div><div class='ctx'> </div><div class='add'>+	if (dp83822-&gt;set_gpio2_clk_out)</div><div class='add'>+		phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_IOCTRL2,</div><div class='add'>+			       DP83822_IOCTRL2_GPIO2_CTRL |</div><div class='add'>+			       DP83822_IOCTRL2_GPIO2_CLK_SRC,</div><div class='add'>+			       FIELD_PREP(DP83822_IOCTRL2_GPIO2_CTRL,</div><div class='add'>+					  DP83822_IOCTRL2_GPIO2_CTRL_CLK_REF) |</div><div class='add'>+			       FIELD_PREP(DP83822_IOCTRL2_GPIO2_CLK_SRC,</div><div class='add'>+					  dp83822-&gt;gpio2_clk_out));</div><div class='add'>+</div><div class='add'>+	if (dp83822-&gt;tx_amplitude_100base_tx_index &gt;= 0)</div><div class='add'>+		phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_LDCTRL,</div><div class='add'>+			       DP83822_100BASE_TX_LINE_DRIVER_SWING,</div><div class='add'>+			       FIELD_PREP(DP83822_100BASE_TX_LINE_DRIVER_SWING,</div><div class='add'>+					  dp83822-&gt;tx_amplitude_100base_tx_index));</div><div class='add'>+</div><div class='add'>+	if (dp83822-&gt;mac_termination_index &gt;= 0)</div><div class='add'>+		phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_IOCTRL,</div><div class='add'>+			       DP83822_IOCTRL_MAC_IMPEDANCE_CTRL,</div><div class='add'>+			       FIELD_PREP(DP83822_IOCTRL_MAC_IMPEDANCE_CTRL,</div><div class='add'>+					  dp83822-&gt;mac_termination_index));</div><div class='add'>+</div><div class='add'>+	err = dp83822_config_init_leds(phydev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	if (phy_interface_is_rgmii(phydev)) {</div><div class='del'>-		rx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0,</div><div class='del'>-						      true);</div><div class='add'>+		rx_int_delay = phy_get_internal_delay(phydev, NULL, 0, true);</div><div class='ctx'> </div><div class='ctx'> 		/* Set DP83822_RX_CLK_SHIFT to enable rx clk internal delay */</div><div class='ctx'> 		if (rx_int_delay &gt; 0)</div><div class='ctx'> 			rgmii_delay |= DP83822_RX_CLK_SHIFT;</div><div class='ctx'> </div><div class='del'>-		tx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0,</div><div class='del'>-						      false);</div><div class='add'>+		tx_int_delay = phy_get_internal_delay(phydev, NULL, 0, false);</div><div class='ctx'> </div><div class='ctx'> 		/* Set DP83822_TX_CLK_SHIFT to disable tx clk internal delay */</div><div class='ctx'> 		if (tx_int_delay &lt;= 0)</div><div class='ctx'> 			rgmii_delay |= DP83822_TX_CLK_SHIFT;</div><div class='ctx'> </div><div class='del'>-		err = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,</div><div class='add'>+		err = phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_RCSR,</div><div class='ctx'> 				     DP83822_RX_CLK_SHIFT | DP83822_TX_CLK_SHIFT, rgmii_delay);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='del'>-		err = phy_set_bits_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+		err = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 				       MII_DP83822_RCSR, DP83822_RGMII_MODE_EN);</div><div class='ctx'> </div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	} else {</div><div class='del'>-		err = phy_clear_bits_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+		err = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 					 MII_DP83822_RCSR, DP83822_RGMII_MODE_EN);</div><div class='ctx'> </div><div class='ctx'> 		if (err)</div><div class='hunk'>@@ -496,7 +626,7 @@ static int dp83822_config_init(struct phy_device *phydev)</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='ctx'> 		if (dp83822-&gt;fx_signal_det_low) {</div><div class='del'>-			err = phy_set_bits_mmd(phydev, DP83822_DEVADDR,</div><div class='add'>+			err = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2,</div><div class='ctx'> 					       MII_DP83822_GENCFG,</div><div class='ctx'> 					       DP83822_SIG_DET_LOW);</div><div class='ctx'> 			if (err)</div><div class='hunk'>@@ -514,10 +644,10 @@ static int dp8382x_config_rmii_mode(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	if (!device_property_read_string(dev, "ti,rmii-mode", &amp;of_val)) {</div><div class='ctx'> 		if (strcmp(of_val, "master") == 0) {</div><div class='del'>-			ret = phy_clear_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,</div><div class='add'>+			ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_RCSR,</div><div class='ctx'> 						 DP83822_RMII_MODE_SEL);</div><div class='ctx'> 		} else if (strcmp(of_val, "slave") == 0) {</div><div class='del'>-			ret = phy_set_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,</div><div class='add'>+			ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_RCSR,</div><div class='ctx'> 					       DP83822_RMII_MODE_SEL);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			phydev_err(phydev, "Invalid value for ti,rmii-mode property (%s)\n",</div><div class='hunk'>@@ -539,7 +669,7 @@ static int dp83826_config_init(struct phy_device *phydev)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;interface == PHY_INTERFACE_MODE_RMII) {</div><div class='del'>-		ret = phy_set_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,</div><div class='add'>+		ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_RCSR,</div><div class='ctx'> 				       DP83822_RMII_MODE_EN);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -548,7 +678,7 @@ static int dp83826_config_init(struct phy_device *phydev)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	} else {</div><div class='del'>-		ret = phy_clear_bits_mmd(phydev, DP83822_DEVADDR, MII_DP83822_RCSR,</div><div class='add'>+		ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_RCSR,</div><div class='ctx'> 					 DP83822_RMII_MODE_EN);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -560,7 +690,7 @@ static int dp83826_config_init(struct phy_device *phydev)</div><div class='ctx'> 				 FIELD_GET(DP83826_CFG_DAC_MINUS_MDIX_5_TO_4,</div><div class='ctx'> 					   dp83822-&gt;cfg_dac_minus));</div><div class='ctx'> 		mask = DP83826_VOD_CFG1_MINUS_MDIX_MASK | DP83826_VOD_CFG1_MINUS_MDI_MASK;</div><div class='del'>-		ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83826_VOD_CFG1, mask, val);</div><div class='add'>+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83826_VOD_CFG1, mask, val);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -568,7 +698,7 @@ static int dp83826_config_init(struct phy_device *phydev)</div><div class='ctx'> 				 FIELD_GET(DP83826_CFG_DAC_MINUS_MDIX_3_TO_0,</div><div class='ctx'> 					   dp83822-&gt;cfg_dac_minus));</div><div class='ctx'> 		mask = DP83826_VOD_CFG2_MINUS_MDIX_MASK;</div><div class='del'>-		ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83826_VOD_CFG2, mask, val);</div><div class='add'>+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83826_VOD_CFG2, mask, val);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -577,7 +707,7 @@ static int dp83826_config_init(struct phy_device *phydev)</div><div class='ctx'> 		val = FIELD_PREP(DP83826_VOD_CFG2_PLUS_MDIX_MASK, dp83822-&gt;cfg_dac_plus) |</div><div class='ctx'> 		      FIELD_PREP(DP83826_VOD_CFG2_PLUS_MDI_MASK, dp83822-&gt;cfg_dac_plus);</div><div class='ctx'> 		mask = DP83826_VOD_CFG2_PLUS_MDIX_MASK | DP83826_VOD_CFG2_PLUS_MDI_MASK;</div><div class='del'>-		ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83826_VOD_CFG2, mask, val);</div><div class='add'>+		ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, MII_DP83826_VOD_CFG2, mask, val);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -608,11 +738,78 @@ static int dp83822_phy_reset(struct phy_device *phydev)</div><div class='ctx'> 	return phydev-&gt;drv-&gt;config_init(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_OF_MDIO</div><div class='add'>+#if IS_ENABLED(CONFIG_OF_MDIO)</div><div class='add'>+static const u32 tx_amplitude_100base_tx_gain[] = {</div><div class='add'>+	80, 82, 83, 85, 87, 88, 90, 92,</div><div class='add'>+	93, 95, 97, 98, 100, 102, 103, 105,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 mac_termination[] = {</div><div class='add'>+	99, 91, 84, 78, 73, 69, 65, 61, 58, 55, 53, 50, 48, 46, 44, 43,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int dp83822_of_init_leds(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *node = phydev-&gt;mdio.dev.of_node;</div><div class='add'>+	struct dp83822_private *dp83822 = phydev-&gt;priv;</div><div class='add'>+	struct device_node *leds;</div><div class='add'>+	u32 index;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!node)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	leds = of_get_child_by_name(node, "leds");</div><div class='add'>+	if (!leds)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node_scoped(leds, led) {</div><div class='add'>+		err = of_property_read_u32(led, "reg", &amp;index);</div><div class='add'>+		if (err) {</div><div class='add'>+			of_node_put(leds);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (index &lt;= DP83822_LED_INDEX_RX_D3_GPIO3) {</div><div class='add'>+			dp83822-&gt;led_pin_enable[index] = true;</div><div class='add'>+		} else {</div><div class='add'>+			of_node_put(leds);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_node_put(leds);</div><div class='add'>+	/* LED_0 and COL(GPIO2) use the MLED function. MLED can be routed to</div><div class='add'>+	 * only one of these two pins at a time.</div><div class='add'>+	 */</div><div class='add'>+	if (dp83822-&gt;led_pin_enable[DP83822_LED_INDEX_LED_0] &amp;&amp;</div><div class='add'>+	    dp83822-&gt;led_pin_enable[DP83822_LED_INDEX_COL_GPIO2]) {</div><div class='add'>+		phydev_err(phydev, "LED_0 and COL(GPIO2) cannot be used as LED output at the same time\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dp83822-&gt;led_pin_enable[DP83822_LED_INDEX_COL_GPIO2] &amp;&amp;</div><div class='add'>+	    dp83822-&gt;set_gpio2_clk_out) {</div><div class='add'>+		phydev_err(phydev, "COL(GPIO2) cannot be used as LED output, already used as clock output\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dp83822-&gt;led_pin_enable[DP83822_LED_INDEX_RX_D3_GPIO3] &amp;&amp;</div><div class='add'>+	    phydev-&gt;interface != PHY_INTERFACE_MODE_RMII) {</div><div class='add'>+		phydev_err(phydev, "RX_D3 can only be used as LED output when in RMII mode\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int dp83822_of_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dp83822_private *dp83822 = phydev-&gt;priv;</div><div class='ctx'> 	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='add'>+	const char *of_val;</div><div class='add'>+	int i, ret;</div><div class='add'>+	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	/* Signal detection for the PHY is only enabled if the FX_EN and the</div><div class='ctx'> 	 * SD_EN pins are strapped. Signal detection can only enabled if FX_EN</div><div class='hunk'>@@ -625,7 +822,66 @@ static int dp83822_of_init(struct phy_device *phydev)</div><div class='ctx'> 		dp83822-&gt;fx_enabled = device_property_present(dev,</div><div class='ctx'> 							      "ti,fiber-mode");</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (!device_property_read_string(dev, "ti,gpio2-clk-out", &amp;of_val)) {</div><div class='add'>+		if (strcmp(of_val, "mac-if") == 0) {</div><div class='add'>+			dp83822-&gt;gpio2_clk_out = DP83822_CLK_SRC_MAC_IF;</div><div class='add'>+		} else if (strcmp(of_val, "xi") == 0) {</div><div class='add'>+			dp83822-&gt;gpio2_clk_out = DP83822_CLK_SRC_XI;</div><div class='add'>+		} else if (strcmp(of_val, "int-ref") == 0) {</div><div class='add'>+			dp83822-&gt;gpio2_clk_out = DP83822_CLK_SRC_INT_REF;</div><div class='add'>+		} else if (strcmp(of_val, "rmii-master-mode-ref") == 0) {</div><div class='add'>+			dp83822-&gt;gpio2_clk_out = DP83822_CLK_SRC_RMII_MASTER_MODE_REF;</div><div class='add'>+		} else if (strcmp(of_val, "free-running") == 0) {</div><div class='add'>+			dp83822-&gt;gpio2_clk_out = DP83822_CLK_SRC_FREE_RUNNING;</div><div class='add'>+		} else if (strcmp(of_val, "recovered") == 0) {</div><div class='add'>+			dp83822-&gt;gpio2_clk_out = DP83822_CLK_SRC_RECOVERED;</div><div class='add'>+		} else {</div><div class='add'>+			phydev_err(phydev,</div><div class='add'>+				   "Invalid value for ti,gpio2-clk-out property (%s)\n",</div><div class='add'>+				   of_val);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dp83822-&gt;set_gpio2_clk_out = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = phy_get_tx_amplitude_gain(phydev, dev,</div><div class='add'>+					ETHTOOL_LINK_MODE_100baseT_Full_BIT,</div><div class='add'>+					&amp;val);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(tx_amplitude_100base_tx_gain); i++) {</div><div class='add'>+			if (tx_amplitude_100base_tx_gain[i] == val) {</div><div class='add'>+				dp83822-&gt;tx_amplitude_100base_tx_index = i;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (dp83822-&gt;tx_amplitude_100base_tx_index &lt; 0) {</div><div class='add'>+			phydev_err(phydev,</div><div class='add'>+				   "Invalid value for tx-amplitude-100base-tx-percent property (%u)\n",</div><div class='add'>+				   val);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = phy_get_mac_termination(phydev, dev, &amp;val);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(mac_termination); i++) {</div><div class='add'>+			if (mac_termination[i] == val) {</div><div class='add'>+				dp83822-&gt;mac_termination_index = i;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (dp83822-&gt;mac_termination_index &lt; 0) {</div><div class='add'>+			phydev_err(phydev,</div><div class='add'>+				   "Invalid value for mac-termination-ohms property (%u)\n",</div><div class='add'>+				   val);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dp83822_of_init_leds(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dp83826_to_dac_minus_one_regval(int percent)</div><div class='hunk'>@@ -673,7 +929,7 @@ static int dp83822_read_straps(struct phy_device *phydev)</div><div class='ctx'> 	int fx_enabled, fx_sd_enable;</div><div class='ctx'> 	int val;</div><div class='ctx'> </div><div class='del'>-	val = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_SOR1);</div><div class='add'>+	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_SOR1);</div><div class='ctx'> 	if (val &lt; 0)</div><div class='ctx'> 		return val;</div><div class='ctx'> </div><div class='hunk'>@@ -703,6 +959,8 @@ static int dp8382x_probe(struct phy_device *phydev)</div><div class='ctx'> 	if (!dp83822)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	dp83822-&gt;tx_amplitude_100base_tx_index = -1;</div><div class='add'>+	dp83822-&gt;mac_termination_index = -1;</div><div class='ctx'> 	phydev-&gt;priv = dp83822;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -723,7 +981,9 @@ static int dp83822_probe(struct phy_device *phydev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	dp83822_of_init(phydev);</div><div class='add'>+	ret = dp83822_of_init(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (dp83822-&gt;fx_enabled)</div><div class='ctx'> 		phydev-&gt;port = PORT_FIBRE;</div><div class='hunk'>@@ -748,7 +1008,7 @@ static int dp83822_suspend(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int value;</div><div class='ctx'> </div><div class='del'>-	value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);</div><div class='add'>+	value = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_WOL_CFG);</div><div class='ctx'> </div><div class='ctx'> 	if (!(value &amp; DP83822_WOL_EN))</div><div class='ctx'> 		genphy_suspend(phydev);</div><div class='hunk'>@@ -762,14 +1022,138 @@ static int dp83822_resume(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	genphy_resume(phydev);</div><div class='ctx'> </div><div class='del'>-	value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG);</div><div class='add'>+	value = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_WOL_CFG);</div><div class='ctx'> </div><div class='del'>-	phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, value |</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_WOL_CFG, value |</div><div class='ctx'> 		      DP83822_WOL_CLR_INDICATION);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int dp83822_led_mode(u8 index, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	switch (rules) {</div><div class='add'>+	case BIT(TRIGGER_NETDEV_LINK):</div><div class='add'>+		return DP83822_LED_FN_LINK;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_LINK_10):</div><div class='add'>+		return DP83822_LED_FN_LINK_10_BT;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_LINK_100):</div><div class='add'>+		return DP83822_LED_FN_LINK_100_BTX;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_FULL_DUPLEX):</div><div class='add'>+		return DP83822_LED_FN_FULL_DUPLEX;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_TX):</div><div class='add'>+		return DP83822_LED_FN_TX;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_RX):</div><div class='add'>+		return DP83822_LED_FN_RX;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_TX) | BIT(TRIGGER_NETDEV_RX):</div><div class='add'>+		return DP83822_LED_FN_RX_TX;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_TX_ERR) | BIT(TRIGGER_NETDEV_RX_ERR):</div><div class='add'>+		return DP83822_LED_FN_RX_TX_ERR;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_LINK) | BIT(TRIGGER_NETDEV_TX) | BIT(TRIGGER_NETDEV_RX):</div><div class='add'>+		return DP83822_LED_FN_LINK_RX_TX;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83822_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='add'>+				       unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	int mode;</div><div class='add'>+</div><div class='add'>+	mode = dp83822_led_mode(index, rules);</div><div class='add'>+	if (mode &lt; 0)</div><div class='add'>+		return mode;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83822_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='add'>+				      unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	int mode;</div><div class='add'>+</div><div class='add'>+	mode = dp83822_led_mode(index, rules);</div><div class='add'>+	if (mode &lt; 0)</div><div class='add'>+		return mode;</div><div class='add'>+</div><div class='add'>+	if (index == DP83822_LED_INDEX_LED_0 || index == DP83822_LED_INDEX_COL_GPIO2)</div><div class='add'>+		return phy_modify_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+				      MII_DP83822_MLEDCR, DP83822_MLEDCR_CFG,</div><div class='add'>+				      FIELD_PREP(DP83822_MLEDCR_CFG, mode));</div><div class='add'>+	else if (index == DP83822_LED_INDEX_LED_1_GPIO1)</div><div class='add'>+		return phy_modify_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+				      MII_DP83822_LEDCFG1,</div><div class='add'>+				      DP83822_LEDCFG1_LED1_CTRL,</div><div class='add'>+				      FIELD_PREP(DP83822_LEDCFG1_LED1_CTRL,</div><div class='add'>+						 mode));</div><div class='add'>+	else</div><div class='add'>+		return phy_modify_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+				      MII_DP83822_LEDCFG1,</div><div class='add'>+				      DP83822_LEDCFG1_LED3_CTRL,</div><div class='add'>+				      FIELD_PREP(DP83822_LEDCFG1_LED3_CTRL,</div><div class='add'>+						 mode));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83822_led_hw_control_get(struct phy_device *phydev, u8 index,</div><div class='add'>+				      unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	if (index == DP83822_LED_INDEX_LED_0 || index == DP83822_LED_INDEX_COL_GPIO2) {</div><div class='add'>+		val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_MLEDCR);</div><div class='add'>+		if (val &lt; 0)</div><div class='add'>+			return val;</div><div class='add'>+</div><div class='add'>+		val = FIELD_GET(DP83822_MLEDCR_CFG, val);</div><div class='add'>+	} else {</div><div class='add'>+		val = phy_read_mmd(phydev, MDIO_MMD_VEND2, MII_DP83822_LEDCFG1);</div><div class='add'>+		if (val &lt; 0)</div><div class='add'>+			return val;</div><div class='add'>+</div><div class='add'>+		if (index == DP83822_LED_INDEX_LED_1_GPIO1)</div><div class='add'>+			val = FIELD_GET(DP83822_LEDCFG1_LED1_CTRL, val);</div><div class='add'>+		else</div><div class='add'>+			val = FIELD_GET(DP83822_LEDCFG1_LED3_CTRL, val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (val) {</div><div class='add'>+	case DP83822_LED_FN_LINK:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+		break;</div><div class='add'>+	case DP83822_LED_FN_LINK_10_BT:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK_10);</div><div class='add'>+		break;</div><div class='add'>+	case DP83822_LED_FN_LINK_100_BTX:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK_100);</div><div class='add'>+		break;</div><div class='add'>+	case DP83822_LED_FN_FULL_DUPLEX:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_FULL_DUPLEX);</div><div class='add'>+		break;</div><div class='add'>+	case DP83822_LED_FN_TX:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_TX);</div><div class='add'>+		break;</div><div class='add'>+	case DP83822_LED_FN_RX:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_RX);</div><div class='add'>+		break;</div><div class='add'>+	case DP83822_LED_FN_RX_TX:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_TX) | BIT(TRIGGER_NETDEV_RX);</div><div class='add'>+		break;</div><div class='add'>+	case DP83822_LED_FN_RX_TX_ERR:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_TX_ERR) | BIT(TRIGGER_NETDEV_RX_ERR);</div><div class='add'>+		break;</div><div class='add'>+	case DP83822_LED_FN_LINK_RX_TX:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK) | BIT(TRIGGER_NETDEV_TX) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_RX);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*rules = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define DP83822_PHY_DRIVER(_id, _name)				\</div><div class='ctx'> 	{							\</div><div class='ctx'> 		PHY_ID_MATCH_MODEL(_id),			\</div><div class='hunk'>@@ -785,6 +1169,9 @@ static int dp83822_resume(struct phy_device *phydev)</div><div class='ctx'> 		.handle_interrupt = dp83822_handle_interrupt,	\</div><div class='ctx'> 		.suspend = dp83822_suspend,			\</div><div class='ctx'> 		.resume = dp83822_resume,			\</div><div class='add'>+		.led_hw_is_supported = dp83822_led_hw_is_supported,	\</div><div class='add'>+		.led_hw_control_set = dp83822_led_hw_control_set,	\</div><div class='add'>+		.led_hw_control_get = dp83822_led_hw_control_get,	\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #define DP83825_PHY_DRIVER(_id, _name)				\</div><div class='hunk'>@@ -830,7 +1217,7 @@ static struct phy_driver dp83822_driver[] = {</div><div class='ctx'> };</div><div class='ctx'> module_phy_driver(dp83822_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused dp83822_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused dp83822_tbl[] = {</div><div class='ctx'> 	{ DP83822_PHY_ID, 0xfffffff0 },</div><div class='ctx'> 	{ DP83825I_PHY_ID, 0xfffffff0 },</div><div class='ctx'> 	{ DP83826C_PHY_ID, 0xfffffff0 },</div><div class='head'>diff --git a/drivers/net/phy/dp83848.c b/drivers/net/phy/dp83848.c<br/>index 937061acfc61..d88b1999d596 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83848.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83848.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83848.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/dp83848.c</a></div><div class='hunk'>@@ -123,7 +123,7 @@ static int dp83848_config_init(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused dp83848_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused dp83848_tbl[] = {</div><div class='ctx'> 	{ TI_DP83848C_PHY_ID, 0xfffffff0 },</div><div class='ctx'> 	{ NS_DP83848C_PHY_ID, 0xfffffff0 },</div><div class='ctx'> 	{ TI_DP83620_PHY_ID, 0xfffffff0 },</div><div class='hunk'>@@ -147,6 +147,8 @@ MODULE_DEVICE_TABLE(mdio, dp83848_tbl);</div><div class='ctx'> 		/* IRQ related */				\</div><div class='ctx'> 		.config_intr	= dp83848_config_intr,		\</div><div class='ctx'> 		.handle_interrupt = dp83848_handle_interrupt,	\</div><div class='add'>+								\</div><div class='add'>+		.flags		= PHY_RST_AFTER_CLK_EN,		\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> static struct phy_driver dp83848_driver[] = {</div><div class='head'>diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c<br/>index 4120385c5a79..5f5de01c41e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83867.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83867.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83867.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/dp83867.c</a></div><div class='hunk'>@@ -92,11 +92,6 @@</div><div class='ctx'> #define DP83867_STRAP_STS1_RESERVED		BIT(11)</div><div class='ctx'> </div><div class='ctx'> /* STRAP_STS2 bits */</div><div class='del'>-#define DP83867_STRAP_STS2_CLK_SKEW_TX_MASK	GENMASK(6, 4)</div><div class='del'>-#define DP83867_STRAP_STS2_CLK_SKEW_TX_SHIFT	4</div><div class='del'>-#define DP83867_STRAP_STS2_CLK_SKEW_RX_MASK	GENMASK(2, 0)</div><div class='del'>-#define DP83867_STRAP_STS2_CLK_SKEW_RX_SHIFT	0</div><div class='del'>-#define DP83867_STRAP_STS2_CLK_SKEW_NONE	BIT(2)</div><div class='ctx'> #define DP83867_STRAP_STS2_STRAP_FLD		BIT(10)</div><div class='ctx'> </div><div class='ctx'> /* PHY CTRL bits */</div><div class='hunk'>@@ -111,10 +106,8 @@</div><div class='ctx'> /* RGMIIDCTL bits */</div><div class='ctx'> #define DP83867_RGMII_TX_CLK_DELAY_MAX		0xf</div><div class='ctx'> #define DP83867_RGMII_TX_CLK_DELAY_SHIFT	4</div><div class='del'>-#define DP83867_RGMII_TX_CLK_DELAY_INV	(DP83867_RGMII_TX_CLK_DELAY_MAX + 1)</div><div class='ctx'> #define DP83867_RGMII_RX_CLK_DELAY_MAX		0xf</div><div class='ctx'> #define DP83867_RGMII_RX_CLK_DELAY_SHIFT	0</div><div class='del'>-#define DP83867_RGMII_RX_CLK_DELAY_INV	(DP83867_RGMII_RX_CLK_DELAY_MAX + 1)</div><div class='ctx'> </div><div class='ctx'> /* IO_MUX_CFG bits */</div><div class='ctx'> #define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MASK	0x1f</div><div class='hunk'>@@ -506,48 +499,6 @@ static int dp83867_config_port_mirroring(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dp83867_verify_rgmii_cfg(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	struct dp83867_private *dp83867 = phydev-&gt;priv;</div><div class='del'>-</div><div class='del'>-	/* Existing behavior was to use default pin strapping delay in rgmii</div><div class='del'>-	 * mode, but rgmii should have meant no delay.  Warn existing users.</div><div class='del'>-	 */</div><div class='del'>-	if (phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII) {</div><div class='del'>-		const u16 val = phy_read_mmd(phydev, DP83867_DEVADDR,</div><div class='del'>-					     DP83867_STRAP_STS2);</div><div class='del'>-		const u16 txskew = (val &amp; DP83867_STRAP_STS2_CLK_SKEW_TX_MASK) &gt;&gt;</div><div class='del'>-				   DP83867_STRAP_STS2_CLK_SKEW_TX_SHIFT;</div><div class='del'>-		const u16 rxskew = (val &amp; DP83867_STRAP_STS2_CLK_SKEW_RX_MASK) &gt;&gt;</div><div class='del'>-				   DP83867_STRAP_STS2_CLK_SKEW_RX_SHIFT;</div><div class='del'>-</div><div class='del'>-		if (txskew != DP83867_STRAP_STS2_CLK_SKEW_NONE ||</div><div class='del'>-		    rxskew != DP83867_STRAP_STS2_CLK_SKEW_NONE)</div><div class='del'>-			phydev_warn(phydev,</div><div class='del'>-				    "PHY has delays via pin strapping, but phy-mode = 'rgmii'\n"</div><div class='del'>-				    "Should be 'rgmii-id' to use internal delays txskew:%x rxskew:%x\n",</div><div class='del'>-				    txskew, rxskew);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* RX delay *must* be specified if internal delay of RX is used. */</div><div class='del'>-	if ((phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_ID ||</div><div class='del'>-	     phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_RXID) &amp;&amp;</div><div class='del'>-	     dp83867-&gt;rx_id_delay == DP83867_RGMII_RX_CLK_DELAY_INV) {</div><div class='del'>-		phydev_err(phydev, "ti,rx-internal-delay must be specified\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* TX delay *must* be specified if internal delay of TX is used. */</div><div class='del'>-	if ((phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_ID ||</div><div class='del'>-	     phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_TXID) &amp;&amp;</div><div class='del'>-	     dp83867-&gt;tx_id_delay == DP83867_RGMII_TX_CLK_DELAY_INV) {</div><div class='del'>-		phydev_err(phydev, "ti,tx-internal-delay must be specified\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #if IS_ENABLED(CONFIG_OF_MDIO)</div><div class='ctx'> static int dp83867_of_init_io_impedance(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='hunk'>@@ -631,7 +582,7 @@ static int dp83867_of_init(struct phy_device *phydev)</div><div class='ctx'> 	dp83867-&gt;sgmii_ref_clk_en = of_property_read_bool(of_node,</div><div class='ctx'> 							  "ti,sgmii-ref-clock-output-enable");</div><div class='ctx'> </div><div class='del'>-	dp83867-&gt;rx_id_delay = DP83867_RGMII_RX_CLK_DELAY_INV;</div><div class='add'>+	dp83867-&gt;rx_id_delay = DP83867_RGMIIDCTL_2_00_NS;</div><div class='ctx'> 	ret = of_property_read_u32(of_node, "ti,rx-internal-delay",</div><div class='ctx'> 				   &amp;dp83867-&gt;rx_id_delay);</div><div class='ctx'> 	if (!ret &amp;&amp; dp83867-&gt;rx_id_delay &gt; DP83867_RGMII_RX_CLK_DELAY_MAX) {</div><div class='hunk'>@@ -641,7 +592,7 @@ static int dp83867_of_init(struct phy_device *phydev)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dp83867-&gt;tx_id_delay = DP83867_RGMII_TX_CLK_DELAY_INV;</div><div class='add'>+	dp83867-&gt;tx_id_delay = DP83867_RGMIIDCTL_2_00_NS;</div><div class='ctx'> 	ret = of_property_read_u32(of_node, "ti,tx-internal-delay",</div><div class='ctx'> 				   &amp;dp83867-&gt;tx_id_delay);</div><div class='ctx'> 	if (!ret &amp;&amp; dp83867-&gt;tx_id_delay &gt; DP83867_RGMII_TX_CLK_DELAY_MAX) {</div><div class='hunk'>@@ -761,7 +712,6 @@ static int dp83867_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dp83867_private *dp83867 = phydev-&gt;priv;</div><div class='ctx'> 	int ret, val, bs;</div><div class='del'>-	u16 delay;</div><div class='ctx'> </div><div class='ctx'> 	/* Force speed optimization for the PHY even if it strapped */</div><div class='ctx'> 	ret = phy_modify(phydev, DP83867_CFG2, DP83867_DOWNSHIFT_EN,</div><div class='hunk'>@@ -769,10 +719,6 @@ static int dp83867_config_init(struct phy_device *phydev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = dp83867_verify_rgmii_cfg(phydev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	/* RX_DV/RX_CTRL strapped in mode 1 or mode 2 workaround */</div><div class='ctx'> 	if (dp83867-&gt;rxctrl_strap_quirk)</div><div class='ctx'> 		phy_clear_bits_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4,</div><div class='hunk'>@@ -792,6 +738,12 @@ static int dp83867_config_init(struct phy_device *phydev)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Although the DP83867 reports EEE capability through the</div><div class='add'>+	 * MDIO_PCS_EEE_ABLE and MDIO_AN_EEE_ADV registers, the feature</div><div class='add'>+	 * is not actually implemented in hardware.</div><div class='add'>+	 */</div><div class='add'>+	phy_disable_eee(phydev);</div><div class='add'>+</div><div class='ctx'> 	if (phy_interface_is_rgmii(phydev) ||</div><div class='ctx'> 	    phydev-&gt;interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='ctx'> 		val = phy_read(phydev, MII_DP83867_PHYCTRL);</div><div class='hunk'>@@ -836,13 +788,7 @@ static int dp83867_config_init(struct phy_device *phydev)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		/* If rgmii mode with no internal delay is selected, we do NOT use</div><div class='del'>-		 * aligned mode as one might expect.  Instead we use the PHY's default</div><div class='del'>-		 * based on pin strapping.  And the "mode 0" default is to *use*</div><div class='del'>-		 * internal delay with a value of 7 (2.00 ns).</div><div class='del'>-		 *</div><div class='del'>-		 * Set up RGMII delays</div><div class='del'>-		 */</div><div class='add'>+		/* Set up RGMII delays */</div><div class='ctx'> 		val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL);</div><div class='ctx'> </div><div class='ctx'> 		val &amp;= ~(DP83867_RGMII_TX_CLK_DELAY_EN | DP83867_RGMII_RX_CLK_DELAY_EN);</div><div class='hunk'>@@ -857,15 +803,9 @@ static int dp83867_config_init(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 		phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, val);</div><div class='ctx'> </div><div class='del'>-		delay = 0;</div><div class='del'>-		if (dp83867-&gt;rx_id_delay != DP83867_RGMII_RX_CLK_DELAY_INV)</div><div class='del'>-			delay |= dp83867-&gt;rx_id_delay;</div><div class='del'>-		if (dp83867-&gt;tx_id_delay != DP83867_RGMII_TX_CLK_DELAY_INV)</div><div class='del'>-			delay |= dp83867-&gt;tx_id_delay &lt;&lt;</div><div class='del'>-				 DP83867_RGMII_TX_CLK_DELAY_SHIFT;</div><div class='del'>-</div><div class='ctx'> 		phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL,</div><div class='del'>-			      delay);</div><div class='add'>+			      dp83867-&gt;rx_id_delay |</div><div class='add'>+			      (dp83867-&gt;tx_id_delay &lt;&lt; DP83867_RGMII_TX_CLK_DELAY_SHIFT));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* If specified, set io impedance */</div><div class='hunk'>@@ -997,20 +937,23 @@ static void dp83867_link_change_notify(struct phy_device *phydev)</div><div class='ctx'> 	 * whenever there is a link change.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (phydev-&gt;interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='del'>-		int val = 0;</div><div class='add'>+		int val;</div><div class='ctx'> </div><div class='del'>-		val = phy_clear_bits(phydev, DP83867_CFG2,</div><div class='del'>-				     DP83867_SGMII_AUTONEG_EN);</div><div class='del'>-		if (val &lt; 0)</div><div class='del'>-			return;</div><div class='add'>+		val = phy_modify_changed(phydev, DP83867_CFG2,</div><div class='add'>+					 DP83867_SGMII_AUTONEG_EN, 0);</div><div class='ctx'> </div><div class='del'>-		phy_set_bits(phydev, DP83867_CFG2,</div><div class='del'>-			     DP83867_SGMII_AUTONEG_EN);</div><div class='add'>+		/* Keep the in-band setting made by dp83867_config_inband() */</div><div class='add'>+		if (val != 0)</div><div class='add'>+			phy_set_bits(phydev, DP83867_CFG2,</div><div class='add'>+				     DP83867_SGMII_AUTONEG_EN);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dp83867_loopback(struct phy_device *phydev, bool enable)</div><div class='add'>+static int dp83867_loopback(struct phy_device *phydev, bool enable, int speed)</div><div class='ctx'> {</div><div class='add'>+	if (enable &amp;&amp; speed)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	return phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,</div><div class='ctx'> 			  enable ? BMCR_LOOPBACK : 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -1173,6 +1116,25 @@ static int dp83867_led_polarity_set(struct phy_device *phydev, int index,</div><div class='ctx'> 			  DP83867_LED_POLARITY(index), polarity);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int dp83867_inband_caps(struct phy_device *phydev,</div><div class='add'>+					phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		return LINK_INBAND_ENABLE | LINK_INBAND_DISABLE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83867_config_inband(struct phy_device *phydev, unsigned int modes)</div><div class='add'>+{</div><div class='add'>+	int val = 0;</div><div class='add'>+</div><div class='add'>+	if (modes == LINK_INBAND_ENABLE)</div><div class='add'>+		val = DP83867_SGMII_AUTONEG_EN;</div><div class='add'>+</div><div class='add'>+	return phy_modify(phydev, DP83867_CFG2, DP83867_SGMII_AUTONEG_EN, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver dp83867_driver[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.phy_id		= DP83867_PHY_ID,</div><div class='hunk'>@@ -1206,11 +1168,14 @@ static struct phy_driver dp83867_driver[] = {</div><div class='ctx'> 		.led_hw_control_set = dp83867_led_hw_control_set,</div><div class='ctx'> 		.led_hw_control_get = dp83867_led_hw_control_get,</div><div class='ctx'> 		.led_polarity_set = dp83867_led_polarity_set,</div><div class='add'>+</div><div class='add'>+		.inband_caps	= dp83867_inband_caps,</div><div class='add'>+		.config_inband	= dp83867_config_inband,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> module_phy_driver(dp83867_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused dp83867_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused dp83867_tbl[] = {</div><div class='ctx'> 	{ DP83867_PHY_ID, 0xfffffff0 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c<br/>index 5f056d7db83e..1f381d7b13ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83869.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83869.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83869.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/dp83869.c</a></div><div class='hunk'>@@ -84,7 +84,7 @@</div><div class='ctx'> #define DP83869_CLK_DELAY_DEF			7</div><div class='ctx'> </div><div class='ctx'> /* STRAP_STS1 bits */</div><div class='del'>-#define DP83869_STRAP_OP_MODE_MASK		GENMASK(2, 0)</div><div class='add'>+#define DP83869_STRAP_OP_MODE_MASK		GENMASK(11, 9)</div><div class='ctx'> #define DP83869_STRAP_STS1_RESERVED		BIT(11)</div><div class='ctx'> #define DP83869_STRAP_MIRROR_ENABLED           BIT(12)</div><div class='ctx'> </div><div class='hunk'>@@ -153,19 +153,32 @@ struct dp83869_private {</div><div class='ctx'> 	int mode;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int dp83869_config_aneg(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct dp83869_private *dp83869 = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (dp83869-&gt;mode != DP83869_RGMII_1000_BASE)</div><div class='add'>+		return genphy_config_aneg(phydev);</div><div class='add'>+</div><div class='add'>+	return genphy_c37_config_aneg(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int dp83869_read_status(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct dp83869_private *dp83869 = phydev-&gt;priv;</div><div class='add'>+	bool changed;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (dp83869-&gt;mode == DP83869_RGMII_1000_BASE)</div><div class='add'>+		return genphy_c37_read_status(phydev, &amp;changed);</div><div class='add'>+</div><div class='ctx'> 	ret = genphy_read_status(phydev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev-&gt;supported)) {</div><div class='add'>+	if (dp83869-&gt;mode == DP83869_RGMII_100_BASE) {</div><div class='ctx'> 		if (phydev-&gt;link) {</div><div class='del'>-			if (dp83869-&gt;mode == DP83869_RGMII_100_BASE)</div><div class='del'>-				phydev-&gt;speed = SPEED_100;</div><div class='add'>+			phydev-&gt;speed = SPEED_100;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			phydev-&gt;speed = SPEED_UNKNOWN;</div><div class='ctx'> 			phydev-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='hunk'>@@ -515,7 +528,7 @@ static int dp83869_set_strapped_mode(struct phy_device *phydev)</div><div class='ctx'> 	if (val &lt; 0)</div><div class='ctx'> 		return val;</div><div class='ctx'> </div><div class='del'>-	dp83869-&gt;mode = val &amp; DP83869_STRAP_OP_MODE_MASK;</div><div class='add'>+	dp83869-&gt;mode = FIELD_GET(DP83869_STRAP_OP_MODE_MASK, val);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -527,9 +540,8 @@ static const int dp83869_internal_delay[] = {250, 500, 750, 1000, 1250, 1500,</div><div class='ctx'> </div><div class='ctx'> static int dp83869_of_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='add'>+	struct device_node *of_node = phydev-&gt;mdio.dev.of_node;</div><div class='ctx'> 	struct dp83869_private *dp83869 = phydev-&gt;priv;</div><div class='del'>-	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='del'>-	struct device_node *of_node = dev-&gt;of_node;</div><div class='ctx'> 	int delay_size = ARRAY_SIZE(dp83869_internal_delay);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -584,13 +596,13 @@ static int dp83869_of_init(struct phy_device *phydev)</div><div class='ctx'> 				 &amp;dp83869-&gt;tx_fifo_depth))</div><div class='ctx'> 		dp83869-&gt;tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;</div><div class='ctx'> </div><div class='del'>-	dp83869-&gt;rx_int_delay = phy_get_internal_delay(phydev, dev,</div><div class='add'>+	dp83869-&gt;rx_int_delay = phy_get_internal_delay(phydev,</div><div class='ctx'> 						       &amp;dp83869_internal_delay[0],</div><div class='ctx'> 						       delay_size, true);</div><div class='ctx'> 	if (dp83869-&gt;rx_int_delay &lt; 0)</div><div class='ctx'> 		dp83869-&gt;rx_int_delay = DP83869_CLK_DELAY_DEF;</div><div class='ctx'> </div><div class='del'>-	dp83869-&gt;tx_int_delay = phy_get_internal_delay(phydev, dev,</div><div class='add'>+	dp83869-&gt;tx_int_delay = phy_get_internal_delay(phydev,</div><div class='ctx'> 						       &amp;dp83869_internal_delay[0],</div><div class='ctx'> 						       delay_size, false);</div><div class='ctx'> 	if (dp83869-&gt;tx_int_delay &lt; 0)</div><div class='hunk'>@@ -898,6 +910,7 @@ static int dp83869_phy_reset(struct phy_device *phydev)</div><div class='ctx'> 	.soft_reset	= dp83869_phy_reset,			\</div><div class='ctx'> 	.config_intr	= dp83869_config_intr,			\</div><div class='ctx'> 	.handle_interrupt = dp83869_handle_interrupt,		\</div><div class='add'>+	.config_aneg    = dp83869_config_aneg,                  \</div><div class='ctx'> 	.read_status	= dp83869_read_status,			\</div><div class='ctx'> 	.get_tunable	= dp83869_get_tunable,			\</div><div class='ctx'> 	.set_tunable	= dp83869_set_tunable,			\</div><div class='hunk'>@@ -914,7 +927,7 @@ static struct phy_driver dp83869_driver[] = {</div><div class='ctx'> };</div><div class='ctx'> module_phy_driver(dp83869_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused dp83869_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused dp83869_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(DP83869_PHY_ID) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(DP83561_PHY_ID) },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/dp83tc811.c b/drivers/net/phy/dp83tc811.c<br/>index 7ea32fb77190..e480c2a07450 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83tc811.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83tc811.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83tc811.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/dp83tc811.c</a></div><div class='hunk'>@@ -403,7 +403,7 @@ static struct phy_driver dp83811_driver[] = {</div><div class='ctx'> };</div><div class='ctx'> module_phy_driver(dp83811_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused dp83811_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused dp83811_tbl[] = {</div><div class='ctx'> 	{ DP83TC811_PHY_ID, 0xfffffff0 },</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/dp83td510.c b/drivers/net/phy/dp83td510.c<br/>index 92aa3a2b9744..d75dae6071ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83td510.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83td510.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83td510.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/dp83td510.c</a></div><div class='hunk'>@@ -34,10 +34,34 @@</div><div class='ctx'> #define DP83TD510E_CTRL_HW_RESET		BIT(15)</div><div class='ctx'> #define DP83TD510E_CTRL_SW_RESET		BIT(14)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * DP83TD510E_PKT_STAT_x registers correspond to similarly named registers</div><div class='add'>+ * in the datasheet (PKT_STAT_1 through PKT_STAT_6). These registers store</div><div class='add'>+ * 32-bit or 16-bit counters for TX and RX statistics and must be read in</div><div class='add'>+ * sequence to ensure the counters are cleared correctly.</div><div class='add'>+ *</div><div class='add'>+ * - DP83TD510E_PKT_STAT_1: Contains TX packet count bits [15:0].</div><div class='add'>+ * - DP83TD510E_PKT_STAT_2: Contains TX packet count bits [31:16].</div><div class='add'>+ * - DP83TD510E_PKT_STAT_3: Contains TX error packet count.</div><div class='add'>+ * - DP83TD510E_PKT_STAT_4: Contains RX packet count bits [15:0].</div><div class='add'>+ * - DP83TD510E_PKT_STAT_5: Contains RX packet count bits [31:16].</div><div class='add'>+ * - DP83TD510E_PKT_STAT_6: Contains RX error packet count.</div><div class='add'>+ *</div><div class='add'>+ * Keeping the register names as defined in the datasheet helps maintain</div><div class='add'>+ * clarity and alignment with the documentation.</div><div class='add'>+ */</div><div class='add'>+#define DP83TD510E_PKT_STAT_1			0x12b</div><div class='add'>+#define DP83TD510E_PKT_STAT_2			0x12c</div><div class='add'>+#define DP83TD510E_PKT_STAT_3			0x12d</div><div class='add'>+#define DP83TD510E_PKT_STAT_4			0x12e</div><div class='add'>+#define DP83TD510E_PKT_STAT_5			0x12f</div><div class='add'>+#define DP83TD510E_PKT_STAT_6			0x130</div><div class='add'>+</div><div class='ctx'> #define DP83TD510E_AN_STAT_1			0x60c</div><div class='ctx'> #define DP83TD510E_MASTER_SLAVE_RESOL_FAIL	BIT(15)</div><div class='ctx'> </div><div class='ctx'> #define DP83TD510E_MSE_DETECT			0xa85</div><div class='add'>+#define DP83TD510E_MSE_MAX			U16_MAX</div><div class='ctx'> </div><div class='ctx'> #define DP83TD510_SQI_MAX	7</div><div class='ctx'> </div><div class='hunk'>@@ -58,8 +82,16 @@ static const u16 dp83td510_mse_sqi_map[] = {</div><div class='ctx'> 	0x0000  /* 24dB =&lt; SNR */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct dp83td510_stats {</div><div class='add'>+	u64 tx_pkt_cnt;</div><div class='add'>+	u64 tx_err_pkt_cnt;</div><div class='add'>+	u64 rx_pkt_cnt;</div><div class='add'>+	u64 rx_err_pkt_cnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct dp83td510_priv {</div><div class='ctx'> 	bool alcd_test_active;</div><div class='add'>+	struct dp83td510_stats stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Time Domain Reflectometry (TDR) Functionality of DP83TD510 PHY</div><div class='hunk'>@@ -173,10 +205,328 @@ struct dp83td510_priv {</div><div class='ctx'> #define DP83TD510E_UNKN_030E				0x30e</div><div class='ctx'> #define DP83TD510E_030E_VAL				0x2520</div><div class='ctx'> </div><div class='add'>+#define DP83TD510E_LEDS_CFG_1				0x460</div><div class='add'>+#define DP83TD510E_LED_FN(idx, val)		(((val) &amp; 0xf) &lt;&lt; ((idx) * 4))</div><div class='add'>+#define DP83TD510E_LED_FN_MASK(idx)			(0xf &lt;&lt; ((idx) * 4))</div><div class='add'>+/* link OK */</div><div class='add'>+#define DP83TD510E_LED_MODE_LINK_OK			0x0</div><div class='add'>+/* TX/RX activity */</div><div class='add'>+#define DP83TD510E_LED_MODE_TX_RX_ACTIVITY		0x1</div><div class='add'>+/* TX activity */</div><div class='add'>+#define DP83TD510E_LED_MODE_TX_ACTIVITY			0x2</div><div class='add'>+/* RX activity */</div><div class='add'>+#define DP83TD510E_LED_MODE_RX_ACTIVITY			0x3</div><div class='add'>+/* LR */</div><div class='add'>+#define DP83TD510E_LED_MODE_LR				0x4</div><div class='add'>+/* SR */</div><div class='add'>+#define DP83TD510E_LED_MODE_SR				0x5</div><div class='add'>+/* LED SPEED: High for 10Base-T */</div><div class='add'>+#define DP83TD510E_LED_MODE_LED_SPEED			0x6</div><div class='add'>+/* Duplex mode */</div><div class='add'>+#define DP83TD510E_LED_MODE_DUPLEX			0x7</div><div class='add'>+/* link + blink on activity with stretch option */</div><div class='add'>+#define DP83TD510E_LED_MODE_LINK_BLINK			0x8</div><div class='add'>+/* blink on activity with stretch option */</div><div class='add'>+#define DP83TD510E_LED_MODE_BLINK_ACTIVITY		0x9</div><div class='add'>+/* blink on tx activity with stretch option */</div><div class='add'>+#define DP83TD510E_LED_MODE_BLINK_TX			0xa</div><div class='add'>+/* blink on rx activity with stretch option */</div><div class='add'>+#define DP83TD510E_LED_MODE_BLINK_RX			0xb</div><div class='add'>+/* link_lost */</div><div class='add'>+#define DP83TD510E_LED_MODE_LINK_LOST			0xc</div><div class='add'>+/* PRBS error: toggles on error */</div><div class='add'>+#define DP83TD510E_LED_MODE_PRBS_ERROR			0xd</div><div class='add'>+/* XMII TX/RX Error with stretch option */</div><div class='add'>+#define DP83TD510E_LED_MODE_XMII_ERR			0xe</div><div class='add'>+</div><div class='add'>+#define DP83TD510E_LED_COUNT				4</div><div class='add'>+</div><div class='add'>+#define DP83TD510E_LEDS_CFG_2				0x469</div><div class='add'>+#define DP83TD510E_LED_POLARITY(idx)			BIT((idx) * 4 + 2)</div><div class='add'>+#define DP83TD510E_LED_DRV_VAL(idx)			BIT((idx) * 4 + 1)</div><div class='add'>+#define DP83TD510E_LED_DRV_EN(idx)			BIT((idx) * 4)</div><div class='add'>+</div><div class='ctx'> #define DP83TD510E_ALCD_STAT				0xa9f</div><div class='ctx'> #define DP83TD510E_ALCD_COMPLETE			BIT(15)</div><div class='ctx'> #define DP83TD510E_ALCD_CABLE_LENGTH			GENMASK(10, 0)</div><div class='ctx'> </div><div class='add'>+static int dp83td510_get_mse_capability(struct phy_device *phydev,</div><div class='add'>+					struct phy_mse_capability *cap)</div><div class='add'>+{</div><div class='add'>+	/* DP83TD510E documents only a single (average) MSE register</div><div class='add'>+	 * (used to derive SQI); no peak or worst-peak counters are</div><div class='add'>+	 * described. Advertise only PHY_MSE_CAP_AVG.</div><div class='add'>+	 */</div><div class='add'>+	cap-&gt;supported_caps = PHY_MSE_CAP_AVG;</div><div class='add'>+	/* 10BASE-T1L is a single-pair medium, so there are no B/C/D channels.</div><div class='add'>+	 * We still advertise PHY_MSE_CAP_CHANNEL_A to indicate that the PHY</div><div class='add'>+	 * can attribute the measurement to a specific pair (the only one),</div><div class='add'>+	 * rather than exposing it only as a link-aggregate.</div><div class='add'>+	 *</div><div class='add'>+	 * Rationale:</div><div class='add'>+	 *  - Keeps the ethtool MSE_GET selection logic consistent: per-channel</div><div class='add'>+	 *    (A/B/C/D) is preferred over WORST/LINK, so userspace receives a</div><div class='add'>+	 *    CHANNEL_A nest instead of LINK.</div><div class='add'>+	 *  - Signals to tools that "per-pair" data is available (even if there's</div><div class='add'>+	 *    just one pair), avoiding the impression that only aggregate values</div><div class='add'>+	 *    are supported.</div><div class='add'>+	 *  - Remains compatible with multi-pair PHYs and uniform UI handling.</div><div class='add'>+	 *</div><div class='add'>+	 * Note: WORST and other channels are not advertised on 10BASE-T1L.</div><div class='add'>+	 */</div><div class='add'>+	cap-&gt;supported_caps |= PHY_MSE_CHANNEL_A | PHY_MSE_CAP_LINK;</div><div class='add'>+	cap-&gt;max_average_mse = DP83TD510E_MSE_MAX;</div><div class='add'>+</div><div class='add'>+	/* The datasheet does not specify the refresh rate or symbol count,</div><div class='add'>+	 * but based on similar PHYs and standards, we can assume a common</div><div class='add'>+	 * value. For 10BASE-T1L, the symbol rate is 7.5 MBd. A common</div><div class='add'>+	 * diagnostic interval is around 1ms.</div><div class='add'>+	 * 7.5e6 symbols/sec * 0.001 sec = 7500 symbols.</div><div class='add'>+	 */</div><div class='add'>+	cap-&gt;refresh_rate_ps = 1000000000; /* 1 ms */</div><div class='add'>+	cap-&gt;num_symbols = 7500;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83td510_get_mse_snapshot(struct phy_device *phydev,</div><div class='add'>+				      enum phy_mse_channel channel,</div><div class='add'>+				      struct phy_mse_snapshot *snapshot)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (channel != PHY_MSE_CHANNEL_LINK &amp;&amp;</div><div class='add'>+	    channel != PHY_MSE_CHANNEL_A)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_MSE_DETECT);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	snapshot-&gt;average_mse = ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83td510_led_brightness_set(struct phy_device *phydev, u8 index,</div><div class='add'>+					enum led_brightness brightness)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= DP83TD510E_LED_COUNT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = DP83TD510E_LED_DRV_EN(index);</div><div class='add'>+</div><div class='add'>+	if (brightness)</div><div class='add'>+		val |= DP83TD510E_LED_DRV_VAL(index);</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_LEDS_CFG_2,</div><div class='add'>+			      DP83TD510E_LED_DRV_VAL(index) |</div><div class='add'>+			      DP83TD510E_LED_DRV_EN(index), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83td510_led_mode(u8 index, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	if (index &gt;= DP83TD510E_LED_COUNT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (rules) {</div><div class='add'>+	case BIT(TRIGGER_NETDEV_LINK):</div><div class='add'>+		return DP83TD510E_LED_MODE_LINK_OK;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_LINK_10):</div><div class='add'>+		return DP83TD510E_LED_MODE_LED_SPEED;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_FULL_DUPLEX):</div><div class='add'>+		return DP83TD510E_LED_MODE_DUPLEX;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_TX):</div><div class='add'>+		return DP83TD510E_LED_MODE_TX_ACTIVITY;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_RX):</div><div class='add'>+		return DP83TD510E_LED_MODE_RX_ACTIVITY;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_TX) | BIT(TRIGGER_NETDEV_RX):</div><div class='add'>+		return DP83TD510E_LED_MODE_TX_RX_ACTIVITY;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_LINK) | BIT(TRIGGER_NETDEV_TX) |</div><div class='add'>+			BIT(TRIGGER_NETDEV_RX):</div><div class='add'>+		return DP83TD510E_LED_MODE_LINK_BLINK;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83td510_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='add'>+					 unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = dp83td510_led_mode(index, rules);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83td510_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='add'>+					unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	int mode, ret;</div><div class='add'>+</div><div class='add'>+	mode = dp83td510_led_mode(index, rules);</div><div class='add'>+	if (mode &lt; 0)</div><div class='add'>+		return mode;</div><div class='add'>+</div><div class='add'>+	ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_LEDS_CFG_1,</div><div class='add'>+			     DP83TD510E_LED_FN_MASK(index),</div><div class='add'>+			     DP83TD510E_LED_FN(index, mode));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_LEDS_CFG_2,</div><div class='add'>+				DP83TD510E_LED_DRV_EN(index), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83td510_led_hw_control_get(struct phy_device *phydev,</div><div class='add'>+					u8 index, unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_LEDS_CFG_1);</div><div class='add'>+	if (val &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+</div><div class='add'>+	val &amp;= DP83TD510E_LED_FN_MASK(index);</div><div class='add'>+	val &gt;&gt;= index * 4;</div><div class='add'>+</div><div class='add'>+	switch (val) {</div><div class='add'>+	case DP83TD510E_LED_MODE_LINK_OK:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+		break;</div><div class='add'>+	/* LED mode: LED SPEED (10BaseT1L indicator) */</div><div class='add'>+	case DP83TD510E_LED_MODE_LED_SPEED:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK_10);</div><div class='add'>+		break;</div><div class='add'>+	case DP83TD510E_LED_MODE_DUPLEX:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_FULL_DUPLEX);</div><div class='add'>+		break;</div><div class='add'>+	case DP83TD510E_LED_MODE_TX_ACTIVITY:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_TX);</div><div class='add'>+		break;</div><div class='add'>+	case DP83TD510E_LED_MODE_RX_ACTIVITY:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_RX);</div><div class='add'>+		break;</div><div class='add'>+	case DP83TD510E_LED_MODE_TX_RX_ACTIVITY:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_TX) | BIT(TRIGGER_NETDEV_RX);</div><div class='add'>+		break;</div><div class='add'>+	case DP83TD510E_LED_MODE_LINK_BLINK:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_TX) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_RX);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*rules = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83td510_led_polarity_set(struct phy_device *phydev, int index,</div><div class='add'>+				      unsigned long modes)</div><div class='add'>+{</div><div class='add'>+	u16 polarity = DP83TD510E_LED_POLARITY(index);</div><div class='add'>+	u32 mode;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(mode, &amp;modes, __PHY_LED_MODES_NUM) {</div><div class='add'>+		switch (mode) {</div><div class='add'>+		case PHY_LED_ACTIVE_LOW:</div><div class='add'>+			polarity = 0;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_LEDS_CFG_2,</div><div class='add'>+			      DP83TD510E_LED_POLARITY(index), polarity);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dp83td510_update_stats - Update the PHY statistics for the DP83TD510 PHY.</div><div class='add'>+ * @phydev: Pointer to the phy_device structure.</div><div class='add'>+ *</div><div class='add'>+ * The function reads the PHY statistics registers and updates the statistics</div><div class='add'>+ * structure.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int dp83td510_update_stats(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct dp83td510_priv *priv = phydev-&gt;priv;</div><div class='add'>+	u32 count;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* The DP83TD510E_PKT_STAT registers are divided into two groups:</div><div class='add'>+	 * - Group 1 (TX stats): DP83TD510E_PKT_STAT_1 to DP83TD510E_PKT_STAT_3</div><div class='add'>+	 * - Group 2 (RX stats): DP83TD510E_PKT_STAT_4 to DP83TD510E_PKT_STAT_6</div><div class='add'>+	 *</div><div class='add'>+	 * Registers in each group are cleared only after reading them in a</div><div class='add'>+	 * plain sequence (e.g., 1, 2, 3 for Group 1 or 4, 5, 6 for Group 2).</div><div class='add'>+	 * Any deviation from the sequence, such as reading 1, 2, 1, 2, 3, will</div><div class='add'>+	 * prevent the group from being cleared. Additionally, the counters</div><div class='add'>+	 * for a group are frozen as soon as the first register in that group</div><div class='add'>+	 * is accessed.</div><div class='add'>+	 */</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* tx_pkt_cnt_15_0 */</div><div class='add'>+	count = ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_2);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* tx_pkt_cnt_31_16 */</div><div class='add'>+	count |= ret &lt;&lt; 16;</div><div class='add'>+	priv-&gt;stats.tx_pkt_cnt += count;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_3);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* tx_err_pkt_cnt */</div><div class='add'>+	priv-&gt;stats.tx_err_pkt_cnt += ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_4);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* rx_pkt_cnt_15_0 */</div><div class='add'>+	count = ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_5);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* rx_pkt_cnt_31_16 */</div><div class='add'>+	count |= ret &lt;&lt; 16;</div><div class='add'>+	priv-&gt;stats.rx_pkt_cnt += count;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_6);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* rx_err_pkt_cnt */</div><div class='add'>+	priv-&gt;stats.rx_err_pkt_cnt += ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dp83td510_get_phy_stats(struct phy_device *phydev,</div><div class='add'>+				    struct ethtool_eth_phy_stats *eth_stats,</div><div class='add'>+				    struct ethtool_phy_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct dp83td510_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_packets = priv-&gt;stats.tx_pkt_cnt;</div><div class='add'>+	stats-&gt;tx_errors = priv-&gt;stats.tx_err_pkt_cnt;</div><div class='add'>+	stats-&gt;rx_packets = priv-&gt;stats.rx_pkt_cnt;</div><div class='add'>+	stats-&gt;rx_errors = priv-&gt;stats.rx_err_pkt_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int dp83td510_config_intr(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -599,13 +949,24 @@ static struct phy_driver dp83td510_driver[] = {</div><div class='ctx'> 	.get_sqi_max	= dp83td510_get_sqi_max,</div><div class='ctx'> 	.cable_test_start = dp83td510_cable_test_start,</div><div class='ctx'> 	.cable_test_get_status = dp83td510_cable_test_get_status,</div><div class='add'>+	.get_phy_stats	= dp83td510_get_phy_stats,</div><div class='add'>+	.update_stats	= dp83td510_update_stats,</div><div class='add'>+</div><div class='add'>+	.get_mse_capability = dp83td510_get_mse_capability,</div><div class='add'>+	.get_mse_snapshot = dp83td510_get_mse_snapshot,</div><div class='add'>+</div><div class='add'>+	.led_brightness_set = dp83td510_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = dp83td510_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_set = dp83td510_led_hw_control_set,</div><div class='add'>+	.led_hw_control_get = dp83td510_led_hw_control_get,</div><div class='add'>+	.led_polarity_set = dp83td510_led_polarity_set,</div><div class='ctx'> </div><div class='ctx'> 	.suspend	= genphy_suspend,</div><div class='ctx'> 	.resume		= genphy_resume,</div><div class='ctx'> } };</div><div class='ctx'> module_phy_driver(dp83td510_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused dp83td510_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused dp83td510_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(DP83TD510E_PHY_ID) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/dp83tg720.c b/drivers/net/phy/dp83tg720.c<br/>index 0ef4d7dba065..391c1d868808 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83tg720.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/dp83tg720.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/dp83tg720.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/dp83tg720.c</a></div><div class='hunk'>@@ -4,12 +4,102 @@</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool_netlink.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "open_alliance_helpers.h"</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * DP83TG720 PHY Limitations and Workarounds</div><div class='add'>+ *</div><div class='add'>+ * The DP83TG720 1000BASE-T1 PHY has several limitations that require</div><div class='add'>+ * software-side mitigations. These workarounds are implemented throughout</div><div class='add'>+ * this driver. This section documents the known issues and their corresponding</div><div class='add'>+ * mitigation strategies.</div><div class='add'>+ *</div><div class='add'>+ * 1. Unreliable Link Detection and Synchronized Reset Deadlock</div><div class='add'>+ * ------------------------------------------------------------</div><div class='add'>+ * After a link loss or during link establishment, the DP83TG720 PHY may fail</div><div class='add'>+ * to detect or report link status correctly. As of June 2025, no public</div><div class='add'>+ * errata sheet for the DP83TG720 PHY documents this behavior.</div><div class='add'>+ * The "DP83TC81x, DP83TG72x Software Implementation Guide" application note</div><div class='add'>+ * (SNLA404, available at https://www.ti.com/lit/an/snla404/snla404.pdf)</div><div class='add'>+ * recommends performing a soft restart if polling for a link fails to establish</div><div class='add'>+ * a connection after 100ms. This procedure is adopted as the workaround for the</div><div class='add'>+ * observed link detection issue.</div><div class='add'>+ *</div><div class='add'>+ * However, in point-to-point setups where both link partners use the same</div><div class='add'>+ * driver (e.g. Linux on both sides), a synchronized reset pattern may emerge.</div><div class='add'>+ * This leads to a deadlock, where both PHYs reset at the same time and</div><div class='add'>+ * continuously miss each other during auto-negotiation.</div><div class='add'>+ *</div><div class='add'>+ * To address this, the reset procedure includes two components:</div><div class='add'>+ *</div><div class='add'>+ * - A **fixed minimum delay of 1ms** after a hardware reset. The datasheet</div><div class='add'>+ *   "DP83TG720S-Q1 1000BASE-T1 Automotive Ethernet PHY with SGMII and RGMII"</div><div class='add'>+ *   specifies this as the "Post reset stabilization-time prior to MDC preamble</div><div class='add'>+ *   for register access" (T6.2), ensuring the PHY is ready for MDIO</div><div class='add'>+ *   operations.</div><div class='add'>+ *</div><div class='add'>+ * - An **additional asymmetric delay**, empirically chosen based on</div><div class='add'>+ *   master/slave role. This reduces the risk of synchronized resets on both</div><div class='add'>+ *   link partners. Values are selected to avoid periodic overlap and ensure</div><div class='add'>+ *   the link is re-established within a few cycles.</div><div class='add'>+ *</div><div class='add'>+ * The functions that implement this logic are:</div><div class='add'>+ * - dp83tg720_soft_reset()</div><div class='add'>+ * - dp83tg720_get_next_update_time()</div><div class='add'>+ *</div><div class='add'>+ * 2. Polling-Based Link Detection and IRQ Support</div><div class='add'>+ * -----------------------------------------------</div><div class='add'>+ * Due to the PHY-specific limitation described in section 1, link-up events</div><div class='add'>+ * cannot be reliably detected via interrupts on the DP83TG720. Therefore,</div><div class='add'>+ * polling is required to detect transitions from link-down to link-up.</div><div class='add'>+ *</div><div class='add'>+ * While link-down events *can* be detected via IRQs on this PHY, this driver</div><div class='add'>+ * currently does **not** implement interrupt support. As a result, all link</div><div class='add'>+ * state changes must be detected using polling.</div><div class='add'>+ *</div><div class='add'>+ * Polling behavior:</div><div class='add'>+ * - When the link is up: slow polling (e.g. 1s).</div><div class='add'>+ * - When the link just went down: fast polling for a short time.</div><div class='add'>+ * - When the link stays down: fallback to slow polling.</div><div class='add'>+ *</div><div class='add'>+ * This design balances responsiveness and CPU usage. It sacrifices fast link-up</div><div class='add'>+ * times in cases where the link is expected to remain down for extended periods,</div><div class='add'>+ * assuming that such systems do not require immediate reactivity.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * DP83TG720S_POLL_ACTIVE_LINK - Polling interval in milliseconds when the link</div><div class='add'>+ *				 is active.</div><div class='add'>+ * DP83TG720S_POLL_NO_LINK     - Polling interval in milliseconds when the</div><div class='add'>+ *				 link is down.</div><div class='add'>+ * DP83TG720S_FAST_POLL_DURATION_MS - Timeout in milliseconds for no-link</div><div class='add'>+ *				 polling after which polling interval is</div><div class='add'>+ *				 increased.</div><div class='add'>+ * DP83TG720S_POLL_SLOW	       - Slow polling interval when there is no</div><div class='add'>+ *				 link for a prolongued period.</div><div class='add'>+ * DP83TG720S_RESET_DELAY_MS_MASTER - Delay after a reset before attempting</div><div class='add'>+ *				 to establish a link again for master phy.</div><div class='add'>+ * DP83TG720S_RESET_DELAY_MS_SLAVE  - Delay after a reset before attempting</div><div class='add'>+ *				 to establish a link again for slave phy.</div><div class='add'>+ *</div><div class='add'>+ * These values are not documented or officially recommended by the vendor but</div><div class='add'>+ * were determined through empirical testing. They achieve a good balance in</div><div class='add'>+ * minimizing the number of reset retries while ensuring reliable link recovery</div><div class='add'>+ * within a reasonable timeframe.</div><div class='add'>+ */</div><div class='add'>+#define DP83TG720S_POLL_ACTIVE_LINK		421</div><div class='add'>+#define DP83TG720S_POLL_NO_LINK			149</div><div class='add'>+#define DP83TG720S_FAST_POLL_DURATION_MS	6000</div><div class='add'>+#define DP83TG720S_POLL_SLOW			1117</div><div class='add'>+#define DP83TG720S_RESET_DELAY_MS_MASTER	97</div><div class='add'>+#define DP83TG720S_RESET_DELAY_MS_SLAVE		149</div><div class='add'>+</div><div class='ctx'> #define DP83TG720S_PHY_ID			0x2000a284</div><div class='ctx'> </div><div class='ctx'> /* MDIO_MMD_VEND2 registers */</div><div class='hunk'>@@ -51,6 +141,9 @@</div><div class='ctx'> /* Register 0x0405: Unknown Register */</div><div class='ctx'> #define DP83TG720S_UNKNOWN_0405			0x405</div><div class='ctx'> </div><div class='add'>+#define DP83TG720S_LINK_QUAL_3			0x547</div><div class='add'>+#define DP83TG720S_LINK_LOSS_CNT_MASK		GENMASK(15, 10)</div><div class='add'>+</div><div class='ctx'> /* Register 0x0576: TDR Master Link Down Control */</div><div class='ctx'> #define DP83TG720S_TDR_MASTER_LINK_DOWN		0x576</div><div class='ctx'> </div><div class='hunk'>@@ -60,6 +153,29 @@</div><div class='ctx'> /* In RGMII mode, Enable or disable the internal delay for TXD */</div><div class='ctx'> #define DP83TG720S_RGMII_TX_CLK_SEL		BIT(0)</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * DP83TG720S_PKT_STAT_x registers correspond to similarly named registers</div><div class='add'>+ * in the datasheet (PKT_STAT_1 through PKT_STAT_6). These registers store</div><div class='add'>+ * 32-bit or 16-bit counters for TX and RX statistics and must be read in</div><div class='add'>+ * sequence to ensure the counters are cleared correctly.</div><div class='add'>+ *</div><div class='add'>+ * - DP83TG720S_PKT_STAT_1: Contains TX packet count bits [15:0].</div><div class='add'>+ * - DP83TG720S_PKT_STAT_2: Contains TX packet count bits [31:16].</div><div class='add'>+ * - DP83TG720S_PKT_STAT_3: Contains TX error packet count.</div><div class='add'>+ * - DP83TG720S_PKT_STAT_4: Contains RX packet count bits [15:0].</div><div class='add'>+ * - DP83TG720S_PKT_STAT_5: Contains RX packet count bits [31:16].</div><div class='add'>+ * - DP83TG720S_PKT_STAT_6: Contains RX error packet count.</div><div class='add'>+ *</div><div class='add'>+ * Keeping the register names as defined in the datasheet helps maintain</div><div class='add'>+ * clarity and alignment with the documentation.</div><div class='add'>+ */</div><div class='add'>+#define DP83TG720S_PKT_STAT_1			0x639</div><div class='add'>+#define DP83TG720S_PKT_STAT_2			0x63a</div><div class='add'>+#define DP83TG720S_PKT_STAT_3			0x63b</div><div class='add'>+#define DP83TG720S_PKT_STAT_4			0x63c</div><div class='add'>+#define DP83TG720S_PKT_STAT_5			0x63d</div><div class='add'>+#define DP83TG720S_PKT_STAT_6			0x63e</div><div class='add'>+</div><div class='ctx'> /* Register 0x083F: Unknown Register */</div><div class='ctx'> #define DP83TG720S_UNKNOWN_083F			0x83f</div><div class='ctx'> </div><div class='hunk'>@@ -69,6 +185,134 @@</div><div class='ctx'> </div><div class='ctx'> #define DP83TG720_SQI_MAX			7</div><div class='ctx'> </div><div class='add'>+struct dp83tg720_stats {</div><div class='add'>+	u64 link_loss_cnt;</div><div class='add'>+	u64 tx_pkt_cnt;</div><div class='add'>+	u64 tx_err_pkt_cnt;</div><div class='add'>+	u64 rx_pkt_cnt;</div><div class='add'>+	u64 rx_err_pkt_cnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct dp83tg720_priv {</div><div class='add'>+	struct dp83tg720_stats stats;</div><div class='add'>+	unsigned long last_link_down_jiffies;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dp83tg720_update_stats - Update the PHY statistics for the DP83TD510 PHY.</div><div class='add'>+ * @phydev: Pointer to the phy_device structure.</div><div class='add'>+ *</div><div class='add'>+ * The function reads the PHY statistics registers and updates the statistics</div><div class='add'>+ * structure.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int dp83tg720_update_stats(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct dp83tg720_priv *priv = phydev-&gt;priv;</div><div class='add'>+	u32 count;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Read the link loss count */</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_LINK_QUAL_3);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* link_loss_cnt */</div><div class='add'>+	count = FIELD_GET(DP83TG720S_LINK_LOSS_CNT_MASK, ret);</div><div class='add'>+	priv-&gt;stats.link_loss_cnt += count;</div><div class='add'>+</div><div class='add'>+	/* The DP83TG720S_PKT_STAT registers are divided into two groups:</div><div class='add'>+	 * - Group 1 (TX stats): DP83TG720S_PKT_STAT_1 to DP83TG720S_PKT_STAT_3</div><div class='add'>+	 * - Group 2 (RX stats): DP83TG720S_PKT_STAT_4 to DP83TG720S_PKT_STAT_6</div><div class='add'>+	 *</div><div class='add'>+	 * Registers in each group are cleared only after reading them in a</div><div class='add'>+	 * plain sequence (e.g., 1, 2, 3 for Group 1 or 4, 5, 6 for Group 2).</div><div class='add'>+	 * Any deviation from the sequence, such as reading 1, 2, 1, 2, 3, will</div><div class='add'>+	 * prevent the group from being cleared. Additionally, the counters</div><div class='add'>+	 * for a group are frozen as soon as the first register in that group</div><div class='add'>+	 * is accessed.</div><div class='add'>+	 */</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* tx_pkt_cnt_15_0 */</div><div class='add'>+	count = ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_2);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* tx_pkt_cnt_31_16 */</div><div class='add'>+	count |= ret &lt;&lt; 16;</div><div class='add'>+	priv-&gt;stats.tx_pkt_cnt += count;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_3);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* tx_err_pkt_cnt */</div><div class='add'>+	priv-&gt;stats.tx_err_pkt_cnt += ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_4);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* rx_pkt_cnt_15_0 */</div><div class='add'>+	count = ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_5);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* rx_pkt_cnt_31_16 */</div><div class='add'>+	count |= ret &lt;&lt; 16;</div><div class='add'>+	priv-&gt;stats.rx_pkt_cnt += count;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_PKT_STAT_6);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	/* rx_err_pkt_cnt */</div><div class='add'>+	priv-&gt;stats.rx_err_pkt_cnt += ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dp83tg720_soft_reset(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_write(phydev, DP83TG720S_PHY_RESET, DP83TG720S_HW_RESET);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Include mandatory MDC-access delay (1ms) + extra asymmetric delay to</div><div class='add'>+	 * avoid synchronized reset deadlock. See section 1 in the top-of-file</div><div class='add'>+	 * comment block.</div><div class='add'>+	 */</div><div class='add'>+	if (phydev-&gt;master_slave_state == MASTER_SLAVE_STATE_SLAVE)</div><div class='add'>+		msleep(DP83TG720S_RESET_DELAY_MS_SLAVE);</div><div class='add'>+	else</div><div class='add'>+		msleep(DP83TG720S_RESET_DELAY_MS_MASTER);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dp83tg720_get_link_stats(struct phy_device *phydev,</div><div class='add'>+				     struct ethtool_link_ext_stats *link_stats)</div><div class='add'>+{</div><div class='add'>+	struct dp83tg720_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	link_stats-&gt;link_down_events = priv-&gt;stats.link_loss_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dp83tg720_get_phy_stats(struct phy_device *phydev,</div><div class='add'>+				    struct ethtool_eth_phy_stats *eth_stats,</div><div class='add'>+				    struct ethtool_phy_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct dp83tg720_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_packets = priv-&gt;stats.tx_pkt_cnt;</div><div class='add'>+	stats-&gt;tx_errors = priv-&gt;stats.tx_err_pkt_cnt;</div><div class='add'>+	stats-&gt;rx_packets = priv-&gt;stats.rx_pkt_cnt;</div><div class='add'>+	stats-&gt;rx_errors = priv-&gt;stats.rx_err_pkt_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * dp83tg720_cable_test_start - Start the cable test for the DP83TG720 PHY.</div><div class='ctx'>  * @phydev: Pointer to the phy_device structure.</div><div class='hunk'>@@ -182,6 +426,11 @@ static int dp83tg720_cable_test_get_status(struct phy_device *phydev,</div><div class='ctx'> </div><div class='ctx'> 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A, stat);</div><div class='ctx'> </div><div class='add'>+	/* save the current stats before resetting the PHY */</div><div class='add'>+	ret = dp83tg720_update_stats(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	return phy_init_hw(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -217,12 +466,14 @@ static int dp83tg720_read_status(struct phy_device *phydev)</div><div class='ctx'> 	phy_sts = phy_read(phydev, DP83TG720S_MII_REG_10);</div><div class='ctx'> 	phydev-&gt;link = !!(phy_sts &amp; DP83TG720S_LINK_STATUS);</div><div class='ctx'> 	if (!phydev-&gt;link) {</div><div class='add'>+		/* save the current stats before resetting the PHY */</div><div class='add'>+		ret = dp83tg720_update_stats(phydev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='ctx'> 		/* According to the "DP83TC81x, DP83TG72x Software</div><div class='ctx'> 		 * Implementation Guide", the PHY needs to be reset after a</div><div class='ctx'> 		 * link loss or if no link is created after at least 100ms.</div><div class='del'>-		 *</div><div class='del'>-		 * Currently we are polling with the PHY_STATE_TIME (1000ms)</div><div class='del'>-		 * interval, which is still enough for not automotive use cases.</div><div class='ctx'> 		 */</div><div class='ctx'> 		ret = phy_init_hw(phydev);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -308,19 +559,11 @@ static int dp83tg720_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* Software Restart is not enough to recover from a link failure.</div><div class='del'>-	 * Using Hardware Reset instead.</div><div class='del'>-	 */</div><div class='del'>-	ret = phy_write(phydev, DP83TG720S_PHY_RESET, DP83TG720S_HW_RESET);</div><div class='add'>+	/* Reset the PHY to recover from a link failure */</div><div class='add'>+	ret = dp83tg720_soft_reset(phydev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	/* Wait until MDC can be used again.</div><div class='del'>-	 * The wait value of one 1ms is documented in "DP83TG720S-Q1 1000BASE-T1</div><div class='del'>-	 * Automotive Ethernet PHY with SGMII and RGMII" datasheet.</div><div class='del'>-	 */</div><div class='del'>-	usleep_range(1000, 2000);</div><div class='del'>-</div><div class='ctx'> 	if (phy_interface_is_rgmii(phydev)) {</div><div class='ctx'> 		ret = dp83tg720_config_rgmii_delay(phydev);</div><div class='ctx'> 		if (ret)</div><div class='hunk'>@@ -341,12 +584,71 @@ static int dp83tg720_config_init(struct phy_device *phydev)</div><div class='ctx'> 	return genphy_c45_pma_baset1_read_master_slave(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int dp83tg720_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='add'>+	struct dp83tg720_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	phydev-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * dp83tg720_get_next_update_time - Return next polling interval for PHY state</div><div class='add'>+ * @phydev: Pointer to the phy_device structure</div><div class='add'>+ *</div><div class='add'>+ * Implements adaptive polling interval logic depending on link state and</div><div class='add'>+ * downtime duration. See the "2. Polling-Based Link Detection and IRQ Support"</div><div class='add'>+ * section at the top of this file for details.</div><div class='add'>+ *</div><div class='add'>+ * Return: Time (in jiffies) until the next poll</div><div class='add'>+ */</div><div class='add'>+static unsigned int dp83tg720_get_next_update_time(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct dp83tg720_priv *priv = phydev-&gt;priv;</div><div class='add'>+	unsigned int next_time_jiffies;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;link) {</div><div class='add'>+		priv-&gt;last_link_down_jiffies = 0;</div><div class='add'>+</div><div class='add'>+		/* When the link is up, use a slower interval (in jiffies) */</div><div class='add'>+		next_time_jiffies =</div><div class='add'>+			msecs_to_jiffies(DP83TG720S_POLL_ACTIVE_LINK);</div><div class='add'>+	} else {</div><div class='add'>+		unsigned long now = jiffies;</div><div class='add'>+</div><div class='add'>+		if (!priv-&gt;last_link_down_jiffies)</div><div class='add'>+			priv-&gt;last_link_down_jiffies = now;</div><div class='add'>+</div><div class='add'>+		if (time_before(now, priv-&gt;last_link_down_jiffies +</div><div class='add'>+			  msecs_to_jiffies(DP83TG720S_FAST_POLL_DURATION_MS))) {</div><div class='add'>+			/* Link recently went down: fast polling */</div><div class='add'>+			next_time_jiffies =</div><div class='add'>+				msecs_to_jiffies(DP83TG720S_POLL_NO_LINK);</div><div class='add'>+		} else {</div><div class='add'>+			/* Link has been down for a while: slow polling */</div><div class='add'>+			next_time_jiffies =</div><div class='add'>+				msecs_to_jiffies(DP83TG720S_POLL_SLOW);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Ensure the polling time is at least one jiffy */</div><div class='add'>+	return max(next_time_jiffies, 1U);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver dp83tg720_driver[] = {</div><div class='ctx'> {</div><div class='ctx'> 	PHY_ID_MATCH_MODEL(DP83TG720S_PHY_ID),</div><div class='ctx'> 	.name		= "TI DP83TG720S",</div><div class='ctx'> </div><div class='ctx'> 	.flags          = PHY_POLL_CABLE_TEST,</div><div class='add'>+	.probe		= dp83tg720_probe,</div><div class='add'>+	.soft_reset	= dp83tg720_soft_reset,</div><div class='ctx'> 	.config_aneg	= dp83tg720_config_aneg,</div><div class='ctx'> 	.read_status	= dp83tg720_read_status,</div><div class='ctx'> 	.get_features	= genphy_c45_pma_read_ext_abilities,</div><div class='hunk'>@@ -355,13 +657,17 @@ static struct phy_driver dp83tg720_driver[] = {</div><div class='ctx'> 	.get_sqi_max	= dp83tg720_get_sqi_max,</div><div class='ctx'> 	.cable_test_start = dp83tg720_cable_test_start,</div><div class='ctx'> 	.cable_test_get_status = dp83tg720_cable_test_get_status,</div><div class='add'>+	.get_link_stats	= dp83tg720_get_link_stats,</div><div class='add'>+	.get_phy_stats	= dp83tg720_get_phy_stats,</div><div class='add'>+	.update_stats	= dp83tg720_update_stats,</div><div class='add'>+	.get_next_update_time = dp83tg720_get_next_update_time,</div><div class='ctx'> </div><div class='ctx'> 	.suspend	= genphy_suspend,</div><div class='ctx'> 	.resume		= genphy_resume,</div><div class='ctx'> } };</div><div class='ctx'> module_phy_driver(dp83tg720_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused dp83tg720_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused dp83tg720_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(DP83TG720S_PHY_ID) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/et1011c.c b/drivers/net/phy/et1011c.c<br/>index be1b71d7cab7..6cd8d77586fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/et1011c.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/et1011c.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/et1011c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/et1011c.c</a></div><div class='hunk'>@@ -94,7 +94,7 @@ static struct phy_driver et1011c_driver[] = { {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(et1011c_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused et1011c_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused et1011c_tbl[] = {</div><div class='ctx'> 	{ 0x0282f014, 0xfffffff0 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/fixed_phy.c b/drivers/net/phy/fixed_phy.c<br/>index aef739c20ac4..50684271f81a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/fixed_phy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/fixed_phy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/fixed_phy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/fixed_phy.c</a></div><div class='hunk'>@@ -10,7 +10,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/mii.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='hunk'>@@ -18,83 +17,64 @@</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/gpio/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/idr.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/linkmode.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "swphy.h"</div><div class='ctx'> </div><div class='del'>-struct fixed_mdio_bus {</div><div class='del'>-	struct mii_bus *mii_bus;</div><div class='del'>-	struct list_head phys;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct fixed_phy {</div><div class='ctx'> 	int addr;</div><div class='ctx'> 	struct phy_device *phydev;</div><div class='ctx'> 	struct fixed_phy_status status;</div><div class='del'>-	bool no_carrier;</div><div class='ctx'> 	int (*link_update)(struct net_device *, struct fixed_phy_status *);</div><div class='ctx'> 	struct list_head node;</div><div class='del'>-	struct gpio_desc *link_gpiod;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct platform_device *pdev;</div><div class='del'>-static struct fixed_mdio_bus platform_fmb = {</div><div class='del'>-	.phys = LIST_HEAD_INIT(platform_fmb.phys),</div><div class='del'>-};</div><div class='add'>+static struct mii_bus *fmb_mii_bus;</div><div class='add'>+static LIST_HEAD(fmb_phys);</div><div class='add'>+</div><div class='add'>+static struct fixed_phy *fixed_phy_find(int addr)</div><div class='add'>+{</div><div class='add'>+	struct fixed_phy *fp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(fp, &amp;fmb_phys, node) {</div><div class='add'>+		if (fp-&gt;addr == addr)</div><div class='add'>+			return fp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> int fixed_phy_change_carrier(struct net_device *dev, bool new_carrier)</div><div class='ctx'> {</div><div class='del'>-	struct fixed_mdio_bus *fmb = &amp;platform_fmb;</div><div class='ctx'> 	struct phy_device *phydev = dev-&gt;phydev;</div><div class='ctx'> 	struct fixed_phy *fp;</div><div class='ctx'> </div><div class='ctx'> 	if (!phydev || !phydev-&gt;mdio.bus)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(fp, &amp;fmb-&gt;phys, node) {</div><div class='del'>-		if (fp-&gt;addr == phydev-&gt;mdio.addr) {</div><div class='del'>-			fp-&gt;no_carrier = !new_carrier;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(fixed_phy_change_carrier);</div><div class='add'>+	fp = fixed_phy_find(phydev-&gt;mdio.addr);</div><div class='add'>+	if (!fp)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-static void fixed_phy_update(struct fixed_phy *fp)</div><div class='del'>-{</div><div class='del'>-	if (!fp-&gt;no_carrier &amp;&amp; fp-&gt;link_gpiod)</div><div class='del'>-		fp-&gt;status.link = !!gpiod_get_value_cansleep(fp-&gt;link_gpiod);</div><div class='add'>+	fp-&gt;status.link = new_carrier;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(fixed_phy_change_carrier);</div><div class='ctx'> </div><div class='ctx'> static int fixed_mdio_read(struct mii_bus *bus, int phy_addr, int reg_num)</div><div class='ctx'> {</div><div class='del'>-	struct fixed_mdio_bus *fmb = bus-&gt;priv;</div><div class='ctx'> 	struct fixed_phy *fp;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(fp, &amp;fmb-&gt;phys, node) {</div><div class='del'>-		if (fp-&gt;addr == phy_addr) {</div><div class='del'>-			struct fixed_phy_status state;</div><div class='del'>-</div><div class='del'>-			fp-&gt;status.link = !fp-&gt;no_carrier;</div><div class='del'>-</div><div class='del'>-			/* Issue callback if user registered it. */</div><div class='del'>-			if (fp-&gt;link_update)</div><div class='del'>-				fp-&gt;link_update(fp-&gt;phydev-&gt;attached_dev,</div><div class='del'>-						&amp;fp-&gt;status);</div><div class='del'>-</div><div class='del'>-			/* Check the GPIO for change in status */</div><div class='del'>-			fixed_phy_update(fp);</div><div class='del'>-			state = fp-&gt;status;</div><div class='add'>+	fp = fixed_phy_find(phy_addr);</div><div class='add'>+	if (!fp)</div><div class='add'>+		return 0xffff;</div><div class='ctx'> </div><div class='del'>-			return swphy_read_reg(reg_num, &amp;state);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (fp-&gt;link_update)</div><div class='add'>+		fp-&gt;link_update(fp-&gt;phydev-&gt;attached_dev, &amp;fp-&gt;status);</div><div class='ctx'> </div><div class='del'>-	return 0xFFFF;</div><div class='add'>+	return swphy_read_reg(reg_num, &amp;fp-&gt;status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int fixed_mdio_write(struct mii_bus *bus, int phy_addr, int reg_num,</div><div class='hunk'>@@ -112,31 +92,27 @@ int fixed_phy_set_link_update(struct phy_device *phydev,</div><div class='ctx'> 			      int (*link_update)(struct net_device *,</div><div class='ctx'> 						 struct fixed_phy_status *))</div><div class='ctx'> {</div><div class='del'>-	struct fixed_mdio_bus *fmb = &amp;platform_fmb;</div><div class='ctx'> 	struct fixed_phy *fp;</div><div class='ctx'> </div><div class='ctx'> 	if (!phydev || !phydev-&gt;mdio.bus)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(fp, &amp;fmb-&gt;phys, node) {</div><div class='del'>-		if (fp-&gt;addr == phydev-&gt;mdio.addr) {</div><div class='del'>-			fp-&gt;link_update = link_update;</div><div class='del'>-			fp-&gt;phydev = phydev;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	fp = fixed_phy_find(phydev-&gt;mdio.addr);</div><div class='add'>+	if (!fp)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	fp-&gt;link_update = link_update;</div><div class='add'>+	fp-&gt;phydev = phydev;</div><div class='ctx'> </div><div class='del'>-	return -ENOENT;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(fixed_phy_set_link_update);</div><div class='ctx'> </div><div class='del'>-static int fixed_phy_add_gpiod(unsigned int irq, int phy_addr,</div><div class='del'>-			       struct fixed_phy_status *status,</div><div class='del'>-			       struct gpio_desc *gpiod)</div><div class='add'>+static int __fixed_phy_add(int phy_addr,</div><div class='add'>+			   const struct fixed_phy_status *status)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	struct fixed_mdio_bus *fmb = &amp;platform_fmb;</div><div class='ctx'> 	struct fixed_phy *fp;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = swphy_validate_state(status);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -146,156 +122,61 @@ static int fixed_phy_add_gpiod(unsigned int irq, int phy_addr,</div><div class='ctx'> 	if (!fp)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (irq != PHY_POLL)</div><div class='del'>-		fmb-&gt;mii_bus-&gt;irq[phy_addr] = irq;</div><div class='del'>-</div><div class='ctx'> 	fp-&gt;addr = phy_addr;</div><div class='ctx'> 	fp-&gt;status = *status;</div><div class='del'>-	fp-&gt;link_gpiod = gpiod;</div><div class='add'>+	fp-&gt;status.link = true;</div><div class='ctx'> </div><div class='del'>-	fixed_phy_update(fp);</div><div class='del'>-</div><div class='del'>-	list_add_tail(&amp;fp-&gt;node, &amp;fmb-&gt;phys);</div><div class='add'>+	list_add_tail(&amp;fp-&gt;node, &amp;fmb_phys);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int fixed_phy_add(unsigned int irq, int phy_addr,</div><div class='del'>-		  struct fixed_phy_status *status)</div><div class='del'>-{</div><div class='del'>-	return fixed_phy_add_gpiod(irq, phy_addr, status, NULL);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(fixed_phy_add);</div><div class='del'>-</div><div class='ctx'> static DEFINE_IDA(phy_fixed_ida);</div><div class='ctx'> </div><div class='ctx'> static void fixed_phy_del(int phy_addr)</div><div class='ctx'> {</div><div class='del'>-	struct fixed_mdio_bus *fmb = &amp;platform_fmb;</div><div class='del'>-	struct fixed_phy *fp, *tmp;</div><div class='del'>-</div><div class='del'>-	list_for_each_entry_safe(fp, tmp, &amp;fmb-&gt;phys, node) {</div><div class='del'>-		if (fp-&gt;addr == phy_addr) {</div><div class='del'>-			list_del(&amp;fp-&gt;node);</div><div class='del'>-			if (fp-&gt;link_gpiod)</div><div class='del'>-				gpiod_put(fp-&gt;link_gpiod);</div><div class='del'>-			kfree(fp);</div><div class='del'>-			ida_free(&amp;phy_fixed_ida, phy_addr);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+	struct fixed_phy *fp;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_OF_GPIO</div><div class='del'>-static struct gpio_desc *fixed_phy_get_gpiod(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	struct device_node *fixed_link_node;</div><div class='del'>-	struct gpio_desc *gpiod;</div><div class='del'>-</div><div class='del'>-	if (!np)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	fixed_link_node = of_get_child_by_name(np, "fixed-link");</div><div class='del'>-	if (!fixed_link_node)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * As the fixed link is just a device tree node without any</div><div class='del'>-	 * Linux device associated with it, we simply have obtain</div><div class='del'>-	 * the GPIO descriptor from the device tree like this.</div><div class='del'>-	 */</div><div class='del'>-	gpiod = fwnode_gpiod_get_index(of_fwnode_handle(fixed_link_node),</div><div class='del'>-				       "link", 0, GPIOD_IN, "mdio");</div><div class='del'>-	if (IS_ERR(gpiod) &amp;&amp; PTR_ERR(gpiod) != -EPROBE_DEFER) {</div><div class='del'>-		if (PTR_ERR(gpiod) != -ENOENT)</div><div class='del'>-			pr_err("error getting GPIO for fixed link %pOF, proceed without\n",</div><div class='del'>-			       fixed_link_node);</div><div class='del'>-		gpiod = NULL;</div><div class='del'>-	}</div><div class='del'>-	of_node_put(fixed_link_node);</div><div class='add'>+	fp = fixed_phy_find(phy_addr);</div><div class='add'>+	if (!fp)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return gpiod;</div><div class='add'>+	list_del(&amp;fp-&gt;node);</div><div class='add'>+	kfree(fp);</div><div class='add'>+	ida_free(&amp;phy_fixed_ida, phy_addr);</div><div class='ctx'> }</div><div class='del'>-#else</div><div class='del'>-static struct gpio_desc *fixed_phy_get_gpiod(struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='del'>-static struct phy_device *__fixed_phy_register(unsigned int irq,</div><div class='del'>-					       struct fixed_phy_status *status,</div><div class='del'>-					       struct device_node *np,</div><div class='del'>-					       struct gpio_desc *gpiod)</div><div class='add'>+struct phy_device *fixed_phy_register(const struct fixed_phy_status *status,</div><div class='add'>+				      struct device_node *np)</div><div class='ctx'> {</div><div class='del'>-	struct fixed_mdio_bus *fmb = &amp;platform_fmb;</div><div class='ctx'> 	struct phy_device *phy;</div><div class='ctx'> 	int phy_addr;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!fmb-&gt;mii_bus || fmb-&gt;mii_bus-&gt;state != MDIOBUS_REGISTERED)</div><div class='add'>+	if (!fmb_mii_bus || fmb_mii_bus-&gt;state != MDIOBUS_REGISTERED)</div><div class='ctx'> 		return ERR_PTR(-EPROBE_DEFER);</div><div class='ctx'> </div><div class='del'>-	/* Check if we have a GPIO associated with this fixed phy */</div><div class='del'>-	if (!gpiod) {</div><div class='del'>-		gpiod = fixed_phy_get_gpiod(np);</div><div class='del'>-		if (IS_ERR(gpiod))</div><div class='del'>-			return ERR_CAST(gpiod);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Get the next available PHY address, up to PHY_MAX_ADDR */</div><div class='ctx'> 	phy_addr = ida_alloc_max(&amp;phy_fixed_ida, PHY_MAX_ADDR - 1, GFP_KERNEL);</div><div class='ctx'> 	if (phy_addr &lt; 0)</div><div class='ctx'> 		return ERR_PTR(phy_addr);</div><div class='ctx'> </div><div class='del'>-	ret = fixed_phy_add_gpiod(irq, phy_addr, status, gpiod);</div><div class='add'>+	ret = __fixed_phy_add(phy_addr, status);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		ida_free(&amp;phy_fixed_ida, phy_addr);</div><div class='ctx'> 		return ERR_PTR(ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phy = get_phy_device(fmb-&gt;mii_bus, phy_addr, false);</div><div class='add'>+	phy = get_phy_device(fmb_mii_bus, phy_addr, false);</div><div class='ctx'> 	if (IS_ERR(phy)) {</div><div class='ctx'> 		fixed_phy_del(phy_addr);</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* propagate the fixed link values to struct phy_device */</div><div class='del'>-	phy-&gt;link = status-&gt;link;</div><div class='del'>-	if (status-&gt;link) {</div><div class='del'>-		phy-&gt;speed = status-&gt;speed;</div><div class='del'>-		phy-&gt;duplex = status-&gt;duplex;</div><div class='del'>-		phy-&gt;pause = status-&gt;pause;</div><div class='del'>-		phy-&gt;asym_pause = status-&gt;asym_pause;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	of_node_get(np);</div><div class='ctx'> 	phy-&gt;mdio.dev.of_node = np;</div><div class='ctx'> 	phy-&gt;is_pseudo_fixed_link = true;</div><div class='ctx'> </div><div class='del'>-	switch (status-&gt;speed) {</div><div class='del'>-	case SPEED_1000:</div><div class='del'>-		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,</div><div class='del'>-				 phy-&gt;supported);</div><div class='del'>-		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,</div><div class='del'>-				 phy-&gt;supported);</div><div class='del'>-		fallthrough;</div><div class='del'>-	case SPEED_100:</div><div class='del'>-		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT,</div><div class='del'>-				 phy-&gt;supported);</div><div class='del'>-		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT,</div><div class='del'>-				 phy-&gt;supported);</div><div class='del'>-		fallthrough;</div><div class='del'>-	case SPEED_10:</div><div class='del'>-	default:</div><div class='del'>-		linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT,</div><div class='del'>-				 phy-&gt;supported);</div><div class='del'>-		linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,</div><div class='del'>-				 phy-&gt;supported);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	phy_advertise_supported(phy);</div><div class='del'>-</div><div class='ctx'> 	ret = phy_device_register(phy);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		phy_device_free(phy);</div><div class='hunk'>@@ -306,79 +187,62 @@ static struct phy_device *__fixed_phy_register(unsigned int irq,</div><div class='ctx'> </div><div class='ctx'> 	return phy;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-struct phy_device *fixed_phy_register(unsigned int irq,</div><div class='del'>-				      struct fixed_phy_status *status,</div><div class='del'>-				      struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	return __fixed_phy_register(irq, status, np, NULL);</div><div class='del'>-}</div><div class='ctx'> EXPORT_SYMBOL_GPL(fixed_phy_register);</div><div class='ctx'> </div><div class='del'>-struct phy_device *</div><div class='del'>-fixed_phy_register_with_gpiod(unsigned int irq,</div><div class='del'>-			      struct fixed_phy_status *status,</div><div class='del'>-			      struct gpio_desc *gpiod)</div><div class='add'>+struct phy_device *fixed_phy_register_100fd(void)</div><div class='ctx'> {</div><div class='del'>-	return __fixed_phy_register(irq, status, NULL, gpiod);</div><div class='add'>+	static const struct fixed_phy_status status = {</div><div class='add'>+		.speed	= SPEED_100,</div><div class='add'>+		.duplex	= DUPLEX_FULL,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return fixed_phy_register(&amp;status, NULL);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(fixed_phy_register_with_gpiod);</div><div class='add'>+EXPORT_SYMBOL_GPL(fixed_phy_register_100fd);</div><div class='ctx'> </div><div class='ctx'> void fixed_phy_unregister(struct phy_device *phy)</div><div class='ctx'> {</div><div class='ctx'> 	phy_device_remove(phy);</div><div class='ctx'> 	of_node_put(phy-&gt;mdio.dev.of_node);</div><div class='ctx'> 	fixed_phy_del(phy-&gt;mdio.addr);</div><div class='add'>+	phy_device_free(phy);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(fixed_phy_unregister);</div><div class='ctx'> </div><div class='ctx'> static int __init fixed_mdio_bus_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct fixed_mdio_bus *fmb = &amp;platform_fmb;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	pdev = platform_device_register_simple("Fixed MDIO bus", 0, NULL, 0);</div><div class='del'>-	if (IS_ERR(pdev))</div><div class='del'>-		return PTR_ERR(pdev);</div><div class='del'>-</div><div class='del'>-	fmb-&gt;mii_bus = mdiobus_alloc();</div><div class='del'>-	if (fmb-&gt;mii_bus == NULL) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err_mdiobus_reg;</div><div class='del'>-	}</div><div class='add'>+	fmb_mii_bus = mdiobus_alloc();</div><div class='add'>+	if (!fmb_mii_bus)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	snprintf(fmb-&gt;mii_bus-&gt;id, MII_BUS_ID_SIZE, "fixed-0");</div><div class='del'>-	fmb-&gt;mii_bus-&gt;name = "Fixed MDIO Bus";</div><div class='del'>-	fmb-&gt;mii_bus-&gt;priv = fmb;</div><div class='del'>-	fmb-&gt;mii_bus-&gt;parent = &amp;pdev-&gt;dev;</div><div class='del'>-	fmb-&gt;mii_bus-&gt;read = &amp;fixed_mdio_read;</div><div class='del'>-	fmb-&gt;mii_bus-&gt;write = &amp;fixed_mdio_write;</div><div class='del'>-	fmb-&gt;mii_bus-&gt;phy_mask = ~0;</div><div class='add'>+	snprintf(fmb_mii_bus-&gt;id, MII_BUS_ID_SIZE, "fixed-0");</div><div class='add'>+	fmb_mii_bus-&gt;name = "Fixed MDIO Bus";</div><div class='add'>+	fmb_mii_bus-&gt;read = &amp;fixed_mdio_read;</div><div class='add'>+	fmb_mii_bus-&gt;write = &amp;fixed_mdio_write;</div><div class='add'>+	fmb_mii_bus-&gt;phy_mask = ~0;</div><div class='ctx'> </div><div class='del'>-	ret = mdiobus_register(fmb-&gt;mii_bus);</div><div class='add'>+	ret = mdiobus_register(fmb_mii_bus);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_mdiobus_alloc;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_mdiobus_alloc:</div><div class='del'>-	mdiobus_free(fmb-&gt;mii_bus);</div><div class='del'>-err_mdiobus_reg:</div><div class='del'>-	platform_device_unregister(pdev);</div><div class='add'>+	mdiobus_free(fmb_mii_bus);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> module_init(fixed_mdio_bus_init);</div><div class='ctx'> </div><div class='ctx'> static void __exit fixed_mdio_bus_exit(void)</div><div class='ctx'> {</div><div class='del'>-	struct fixed_mdio_bus *fmb = &amp;platform_fmb;</div><div class='ctx'> 	struct fixed_phy *fp, *tmp;</div><div class='ctx'> </div><div class='del'>-	mdiobus_unregister(fmb-&gt;mii_bus);</div><div class='del'>-	mdiobus_free(fmb-&gt;mii_bus);</div><div class='del'>-	platform_device_unregister(pdev);</div><div class='add'>+	mdiobus_unregister(fmb_mii_bus);</div><div class='add'>+	mdiobus_free(fmb_mii_bus);</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry_safe(fp, tmp, &amp;fmb-&gt;phys, node) {</div><div class='add'>+	list_for_each_entry_safe(fp, tmp, &amp;fmb_phys, node) {</div><div class='ctx'> 		list_del(&amp;fp-&gt;node);</div><div class='ctx'> 		kfree(fp);</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c<br/>index ee438b71a0b4..c0c4f19cfb6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/icplus.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/icplus.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/icplus.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/icplus.c</a></div><div class='hunk'>@@ -520,12 +520,14 @@ static int ip101a_g_match_phy_device(struct phy_device *phydev, bool ip101a)</div><div class='ctx'> 	return ip101a == !ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ip101a_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int ip101a_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				   const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return ip101a_g_match_phy_device(phydev, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ip101g_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int ip101g_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				   const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return ip101a_g_match_phy_device(phydev, false);</div><div class='ctx'> }</div><div class='hunk'>@@ -623,7 +625,7 @@ static struct phy_driver icplus_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(icplus_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused icplus_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused icplus_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(IP175C_PHY_ID) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(IP1001_PHY_ID) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(IP101A_PHY_ID) },</div><div class='head'>diff --git a/drivers/net/phy/intel-xway.c b/drivers/net/phy/intel-xway.c<br/>index b672c55a7a4e..9766dd99afaa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/intel-xway.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/intel-xway.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/intel-xway.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/intel-xway.c</a></div><div class='hunk'>@@ -174,7 +174,6 @@ static const int xway_internal_delay[] = {0, 500, 1000, 1500, 2000, 2500,</div><div class='ctx'> </div><div class='ctx'> static int xway_gphy_rgmii_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='ctx'> 	unsigned int delay_size = ARRAY_SIZE(xway_internal_delay);</div><div class='ctx'> 	s32 int_delay;</div><div class='ctx'> 	int val = 0;</div><div class='hunk'>@@ -207,8 +206,7 @@ static int xway_gphy_rgmii_init(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_ID ||</div><div class='ctx'> 	    phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_RXID) {</div><div class='del'>-		int_delay = phy_get_internal_delay(phydev, dev,</div><div class='del'>-						   xway_internal_delay,</div><div class='add'>+		int_delay = phy_get_internal_delay(phydev, xway_internal_delay,</div><div class='ctx'> 						   delay_size, true);</div><div class='ctx'> </div><div class='ctx'> 		/* if rx-internal-delay-ps is missing, use default of 2.0 ns */</div><div class='hunk'>@@ -220,8 +218,7 @@ static int xway_gphy_rgmii_init(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_ID ||</div><div class='ctx'> 	    phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_TXID) {</div><div class='del'>-		int_delay = phy_get_internal_delay(phydev, dev,</div><div class='del'>-						   xway_internal_delay,</div><div class='add'>+		int_delay = phy_get_internal_delay(phydev, xway_internal_delay,</div><div class='ctx'> 						   delay_size, false);</div><div class='ctx'> </div><div class='ctx'> 		/* if tx-internal-delay-ps is missing, use default of 2.0 ns */</div><div class='hunk'>@@ -529,7 +526,7 @@ static int xway_gphy_led_polarity_set(struct phy_device *phydev, int index,</div><div class='ctx'> 	if (force_active_high)</div><div class='ctx'> 		return phy_clear_bits(phydev, XWAY_MDIO_LED, XWAY_GPHY_LED_INV(index));</div><div class='ctx'> </div><div class='del'>-	unreachable();</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct phy_driver xway_gphy[] = {</div><div class='hunk'>@@ -691,7 +688,7 @@ static struct phy_driver xway_gphy[] = {</div><div class='ctx'> };</div><div class='ctx'> module_phy_driver(xway_gphy);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused xway_gphy_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused xway_gphy_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_PHY11G_1_3, 0xffffffff },</div><div class='ctx'> 	{ PHY_ID_PHY22F_1_3, 0xffffffff },</div><div class='ctx'> 	{ PHY_ID_PHY11G_1_4, 0xffffffff },</div><div class='head'>diff --git a/drivers/net/phy/lxt.c b/drivers/net/phy/lxt.c<br/>index e3bf827b7959..5251a61c8b0f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/lxt.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/lxt.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/lxt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/lxt.c</a></div><div class='hunk'>@@ -348,7 +348,7 @@ static struct phy_driver lxt97x_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(lxt97x_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused lxt_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused lxt_tbl[] = {</div><div class='ctx'> 	{ 0x78100000, 0xfffffff0 },</div><div class='ctx'> 	{ 0x001378e0, 0xfffffff0 },</div><div class='ctx'> 	{ 0x00137a10, 0xfffffff0 },</div><div class='head'>diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c<br/>index 5107f58338af..f3d83b04c953 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/marvell-88q2xxx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/marvell-88q2xxx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/marvell-88q2xxx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/marvell-88q2xxx.c</a></div><div class='hunk'>@@ -7,30 +7,34 @@</div><div class='ctx'>  * Copyright (C) 2024 Liebherr-Electronics and Drives GmbH</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/ethtool_netlink.h&gt;</div><div class='add'>+#include &lt;linux/hwmon.h&gt;</div><div class='ctx'> #include &lt;linux/marvell_phy.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;linux/hwmon.h&gt;</div><div class='ctx'> </div><div class='del'>-#define PHY_ID_88Q2220_REVB0	(MARVELL_PHY_ID_88Q2220 | 0x1)</div><div class='del'>-#define PHY_ID_88Q2220_REVB1	(MARVELL_PHY_ID_88Q2220 | 0x2)</div><div class='del'>-#define PHY_ID_88Q2220_REVB2	(MARVELL_PHY_ID_88Q2220 | 0x3)</div><div class='add'>+#define PHY_ID_88Q2220_REVB0				(MARVELL_PHY_ID_88Q2220 | 0x1)</div><div class='add'>+#define PHY_ID_88Q2220_REVB1				(MARVELL_PHY_ID_88Q2220 | 0x2)</div><div class='add'>+#define PHY_ID_88Q2220_REVB2				(MARVELL_PHY_ID_88Q2220 | 0x3)</div><div class='ctx'> </div><div class='del'>-#define MDIO_MMD_AN_MV_STAT			32769</div><div class='del'>-#define MDIO_MMD_AN_MV_STAT_ANEG		0x0100</div><div class='del'>-#define MDIO_MMD_AN_MV_STAT_LOCAL_RX		0x1000</div><div class='del'>-#define MDIO_MMD_AN_MV_STAT_REMOTE_RX		0x2000</div><div class='del'>-#define MDIO_MMD_AN_MV_STAT_LOCAL_MASTER	0x4000</div><div class='del'>-#define MDIO_MMD_AN_MV_STAT_MS_CONF_FAULT	0x8000</div><div class='add'>+#define MDIO_MMD_AN_MV_STAT				32769</div><div class='add'>+#define MDIO_MMD_AN_MV_STAT_ANEG			0x0100</div><div class='add'>+#define MDIO_MMD_AN_MV_STAT_LOCAL_RX			0x1000</div><div class='add'>+#define MDIO_MMD_AN_MV_STAT_REMOTE_RX			0x2000</div><div class='add'>+#define MDIO_MMD_AN_MV_STAT_LOCAL_MASTER		0x4000</div><div class='add'>+#define MDIO_MMD_AN_MV_STAT_MS_CONF_FAULT		0x8000</div><div class='ctx'> </div><div class='del'>-#define MDIO_MMD_AN_MV_STAT2			32794</div><div class='del'>-#define MDIO_MMD_AN_MV_STAT2_AN_RESOLVED	0x0800</div><div class='del'>-#define MDIO_MMD_AN_MV_STAT2_100BT1		0x2000</div><div class='del'>-#define MDIO_MMD_AN_MV_STAT2_1000BT1		0x4000</div><div class='add'>+#define MDIO_MMD_AN_MV_STAT2				32794</div><div class='add'>+#define MDIO_MMD_AN_MV_STAT2_AN_RESOLVED		0x0800</div><div class='add'>+#define MDIO_MMD_AN_MV_STAT2_100BT1			0x2000</div><div class='add'>+#define MDIO_MMD_AN_MV_STAT2_1000BT1			0x4000</div><div class='ctx'> </div><div class='del'>-#define MDIO_MMD_PCS_MV_INT_EN			32784</div><div class='del'>-#define MDIO_MMD_PCS_MV_INT_EN_LINK_UP		0x0040</div><div class='del'>-#define MDIO_MMD_PCS_MV_INT_EN_LINK_DOWN	0x0080</div><div class='del'>-#define MDIO_MMD_PCS_MV_INT_EN_100BT1		0x1000</div><div class='add'>+#define MDIO_MMD_PCS_MV_RESET_CTRL			32768</div><div class='add'>+#define MDIO_MMD_PCS_MV_RESET_CTRL_TX_DISABLE		0x8</div><div class='add'>+</div><div class='add'>+#define MDIO_MMD_PCS_MV_INT_EN				32784</div><div class='add'>+#define MDIO_MMD_PCS_MV_INT_EN_LINK_UP			0x0040</div><div class='add'>+#define MDIO_MMD_PCS_MV_INT_EN_LINK_DOWN		0x0080</div><div class='add'>+#define MDIO_MMD_PCS_MV_INT_EN_100BT1			0x1000</div><div class='ctx'> </div><div class='ctx'> #define MDIO_MMD_PCS_MV_GPIO_INT_STAT			32785</div><div class='ctx'> #define MDIO_MMD_PCS_MV_GPIO_INT_STAT_LINK_UP		0x0040</div><div class='hunk'>@@ -40,6 +44,22 @@</div><div class='ctx'> #define MDIO_MMD_PCS_MV_GPIO_INT_CTRL			32787</div><div class='ctx'> #define MDIO_MMD_PCS_MV_GPIO_INT_CTRL_TRI_DIS		0x0800</div><div class='ctx'> </div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL			32790</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LED_1_MASK	GENMASK(7, 4)</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LED_0_MASK	GENMASK(3, 0)</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK		0x0 /* Link established */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK_RX_TX	0x1 /* Link established, blink for rx or tx activity */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK_1000BT1	0x2 /* Blink 3x for 1000BT1 link established */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_RX_TX_ON		0x3 /* Receive or transmit activity */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_RX_TX		0x4 /* Blink on receive or transmit activity */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_TX		0x5 /* Transmit activity */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK_COPPER	0x6 /* Copper Link established */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK_1000BT1_ON	0x7 /* 1000BT1 link established */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_FORCE_OFF		0x8 /* Force off */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_FORCE_ON		0x9 /* Force on */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_FORCE_HIGHZ	0xa /* Force Hi-Z */</div><div class='add'>+#define MDIO_MMD_PCS_MV_LED_FUNC_CTRL_FORCE_BLINK	0xb /* Force blink */</div><div class='add'>+</div><div class='ctx'> #define MDIO_MMD_PCS_MV_TEMP_SENSOR1			32833</div><div class='ctx'> #define MDIO_MMD_PCS_MV_TEMP_SENSOR1_RAW_INT		0x0001</div><div class='ctx'> #define MDIO_MMD_PCS_MV_TEMP_SENSOR1_INT		0x0040</div><div class='hunk'>@@ -60,11 +80,11 @@</div><div class='ctx'> #define MDIO_MMD_PCS_MV_100BT1_STAT1_REMOTE_RX		0x2000</div><div class='ctx'> #define MDIO_MMD_PCS_MV_100BT1_STAT1_LOCAL_MASTER	0x4000</div><div class='ctx'> </div><div class='del'>-#define MDIO_MMD_PCS_MV_100BT1_STAT2		33033</div><div class='del'>-#define MDIO_MMD_PCS_MV_100BT1_STAT2_JABBER	0x0001</div><div class='del'>-#define MDIO_MMD_PCS_MV_100BT1_STAT2_POL	0x0002</div><div class='del'>-#define MDIO_MMD_PCS_MV_100BT1_STAT2_LINK	0x0004</div><div class='del'>-#define MDIO_MMD_PCS_MV_100BT1_STAT2_ANGE	0x0008</div><div class='add'>+#define MDIO_MMD_PCS_MV_100BT1_STAT2			33033</div><div class='add'>+#define MDIO_MMD_PCS_MV_100BT1_STAT2_JABBER		0x0001</div><div class='add'>+#define MDIO_MMD_PCS_MV_100BT1_STAT2_POL		0x0002</div><div class='add'>+#define MDIO_MMD_PCS_MV_100BT1_STAT2_LINK		0x0004</div><div class='add'>+#define MDIO_MMD_PCS_MV_100BT1_STAT2_ANGE		0x0008</div><div class='ctx'> </div><div class='ctx'> #define MDIO_MMD_PCS_MV_100BT1_INT_EN			33042</div><div class='ctx'> #define MDIO_MMD_PCS_MV_100BT1_INT_EN_LINKEVENT		0x0400</div><div class='hunk'>@@ -72,7 +92,7 @@</div><div class='ctx'> #define MDIO_MMD_PCS_MV_COPPER_INT_STAT			33043</div><div class='ctx'> #define MDIO_MMD_PCS_MV_COPPER_INT_STAT_LINKEVENT	0x0400</div><div class='ctx'> </div><div class='del'>-#define MDIO_MMD_PCS_MV_RX_STAT			33328</div><div class='add'>+#define MDIO_MMD_PCS_MV_RX_STAT				33328</div><div class='ctx'> </div><div class='ctx'> #define MDIO_MMD_PCS_MV_TDR_RESET			65226</div><div class='ctx'> #define MDIO_MMD_PCS_MV_TDR_RESET_TDR_RST		0x1000</div><div class='hunk'>@@ -95,6 +115,13 @@</div><div class='ctx'> </div><div class='ctx'> #define MDIO_MMD_PCS_MV_TDR_OFF_CUTOFF			65246</div><div class='ctx'> </div><div class='add'>+#define MV88Q2XXX_LED_INDEX_TX_ENABLE			0</div><div class='add'>+#define MV88Q2XXX_LED_INDEX_GPIO			1</div><div class='add'>+</div><div class='add'>+struct mv88q2xxx_priv {</div><div class='add'>+	bool enable_led0;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct mmd_val {</div><div class='ctx'> 	int devad;</div><div class='ctx'> 	u32 regnum;</div><div class='hunk'>@@ -454,25 +481,6 @@ static int mv88q2xxx_config_aneg(struct phy_device *phydev)</div><div class='ctx'> 	return phydev-&gt;drv-&gt;soft_reset(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv88q2xxx_config_init(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	/* The 88Q2XXX PHYs do have the extended ability register available, but</div><div class='del'>-	 * register MDIO_PMA_EXTABLE where they should signalize it does not</div><div class='del'>-	 * work according to specification. Therefore, we force it here.</div><div class='del'>-	 */</div><div class='del'>-	phydev-&gt;pma_extable = MDIO_PMA_EXTABLE_BT1;</div><div class='del'>-</div><div class='del'>-	/* Configure interrupt with default settings, output is driven low for</div><div class='del'>-	 * active interrupt and high for inactive.</div><div class='del'>-	 */</div><div class='del'>-	if (phy_interrupt_is_valid(phydev))</div><div class='del'>-		return phy_set_bits_mmd(phydev, MDIO_MMD_PCS,</div><div class='del'>-					MDIO_MMD_PCS_MV_GPIO_INT_CTRL,</div><div class='del'>-					MDIO_MMD_PCS_MV_GPIO_INT_CTRL_TRI_DIS);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mv88q2xxx_get_sqi(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -615,6 +623,12 @@ static int mv88q2xxx_resume(struct phy_device *phydev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_HWMON)</div><div class='add'>+static int mv88q2xxx_enable_temp_sense(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_TEMP_SENSOR2,</div><div class='add'>+			      MDIO_MMD_PCS_MV_TEMP_SENSOR2_DIS_MASK, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct hwmon_channel_info * const mv88q2xxx_hwmon_info[] = {</div><div class='ctx'> 	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_ALARM),</div><div class='ctx'> 	NULL</div><div class='hunk'>@@ -712,22 +726,13 @@ static int mv88q2xxx_hwmon_probe(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='ctx'> 	struct device *hwmon;</div><div class='del'>-	char *hwmon_name;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* Enable temperature sense */</div><div class='del'>-	ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_TEMP_SENSOR2,</div><div class='del'>-			     MDIO_MMD_PCS_MV_TEMP_SENSOR2_DIS_MASK, 0);</div><div class='add'>+	ret = mv88q2xxx_enable_temp_sense(phydev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	hwmon_name = devm_hwmon_sanitize_name(dev, dev_name(dev));</div><div class='del'>-	if (IS_ERR(hwmon_name))</div><div class='del'>-		return PTR_ERR(hwmon_name);</div><div class='del'>-</div><div class='del'>-	hwmon = devm_hwmon_device_register_with_info(dev,</div><div class='del'>-						     hwmon_name,</div><div class='del'>-						     phydev,</div><div class='add'>+	hwmon = devm_hwmon_device_register_with_info(dev, NULL, phydev,</div><div class='ctx'> 						     &amp;mv88q2xxx_hwmon_chip_info,</div><div class='ctx'> 						     NULL);</div><div class='ctx'> </div><div class='hunk'>@@ -735,17 +740,120 @@ static int mv88q2xxx_hwmon_probe(struct phy_device *phydev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='add'>+static int mv88q2xxx_enable_temp_sense(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mv88q2xxx_hwmon_probe(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_OF_MDIO)</div><div class='add'>+static int mv88q2xxx_leds_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *node = phydev-&gt;mdio.dev.of_node;</div><div class='add'>+	struct mv88q2xxx_priv *priv = phydev-&gt;priv;</div><div class='add'>+	struct device_node *leds;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 index;</div><div class='add'>+</div><div class='add'>+	if (!node)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	leds = of_get_child_by_name(node, "leds");</div><div class='add'>+	if (!leds)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node_scoped(leds, led) {</div><div class='add'>+		ret = of_property_read_u32(led, "reg", &amp;index);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+</div><div class='add'>+		if (index &gt; MV88Q2XXX_LED_INDEX_GPIO) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (index == MV88Q2XXX_LED_INDEX_TX_ENABLE)</div><div class='add'>+			priv-&gt;enable_led0 = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	of_node_put(leds);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+static int mv88q2xxx_leds_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int mv88q2xxx_probe(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='add'>+	struct mv88q2xxx_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;phydev-&gt;mdio.dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	phydev-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	ret = mv88q2xxx_leds_probe(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	return mv88q2xxx_hwmon_probe(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mv88q2xxx_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct mv88q2xxx_priv *priv = phydev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* The 88Q2XXX PHYs do have the extended ability register available, but</div><div class='add'>+	 * register MDIO_PMA_EXTABLE where they should signalize it does not</div><div class='add'>+	 * work according to specification. Therefore, we force it here.</div><div class='add'>+	 */</div><div class='add'>+	phydev-&gt;pma_extable = MDIO_PMA_EXTABLE_BT1;</div><div class='add'>+</div><div class='add'>+	/* Configure interrupt with default settings, output is driven low for</div><div class='add'>+	 * active interrupt and high for inactive.</div><div class='add'>+	 */</div><div class='add'>+	if (phy_interrupt_is_valid(phydev)) {</div><div class='add'>+		ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS,</div><div class='add'>+				       MDIO_MMD_PCS_MV_GPIO_INT_CTRL,</div><div class='add'>+				       MDIO_MMD_PCS_MV_GPIO_INT_CTRL_TRI_DIS);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable LED function and disable TX disable feature on LED/TX_ENABLE */</div><div class='add'>+	if (priv-&gt;enable_led0) {</div><div class='add'>+		ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PCS,</div><div class='add'>+					 MDIO_MMD_PCS_MV_RESET_CTRL,</div><div class='add'>+					 MDIO_MMD_PCS_MV_RESET_CTRL_TX_DISABLE);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable temperature sense again. There might have been a hard reset</div><div class='add'>+	 * of the PHY and in this case the register content is restored to</div><div class='add'>+	 * defaults and we need to enable it again.</div><div class='add'>+	 */</div><div class='add'>+	ret = mv88q2xxx_enable_temp_sense(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int mv88q2110_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -899,11 +1007,104 @@ static int mv88q222x_cable_test_get_status(struct phy_device *phydev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mv88q2xxx_led_mode(u8 index, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	switch (rules) {</div><div class='add'>+	case BIT(TRIGGER_NETDEV_LINK):</div><div class='add'>+		return MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_LINK_1000):</div><div class='add'>+		return MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK_1000BT1_ON;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_TX):</div><div class='add'>+		return MDIO_MMD_PCS_MV_LED_FUNC_CTRL_TX;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_TX) | BIT(TRIGGER_NETDEV_RX):</div><div class='add'>+		return MDIO_MMD_PCS_MV_LED_FUNC_CTRL_RX_TX;</div><div class='add'>+	case BIT(TRIGGER_NETDEV_LINK) | BIT(TRIGGER_NETDEV_TX) | BIT(TRIGGER_NETDEV_RX):</div><div class='add'>+		return MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK_RX_TX;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88q2xxx_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='add'>+					 unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	int mode;</div><div class='add'>+</div><div class='add'>+	mode = mv88q2xxx_led_mode(index, rules);</div><div class='add'>+	if (mode &lt; 0)</div><div class='add'>+		return mode;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88q2xxx_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='add'>+					unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	int mode;</div><div class='add'>+</div><div class='add'>+	mode = mv88q2xxx_led_mode(index, rules);</div><div class='add'>+	if (mode &lt; 0)</div><div class='add'>+		return mode;</div><div class='add'>+</div><div class='add'>+	if (index == MV88Q2XXX_LED_INDEX_TX_ENABLE)</div><div class='add'>+		return phy_modify_mmd(phydev, MDIO_MMD_PCS,</div><div class='add'>+				      MDIO_MMD_PCS_MV_LED_FUNC_CTRL,</div><div class='add'>+				      MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LED_0_MASK,</div><div class='add'>+				      FIELD_PREP(MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LED_0_MASK,</div><div class='add'>+						 mode));</div><div class='add'>+	else</div><div class='add'>+		return phy_modify_mmd(phydev, MDIO_MMD_PCS,</div><div class='add'>+				      MDIO_MMD_PCS_MV_LED_FUNC_CTRL,</div><div class='add'>+				      MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LED_1_MASK,</div><div class='add'>+				      FIELD_PREP(MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LED_1_MASK,</div><div class='add'>+						 mode));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88q2xxx_led_hw_control_get(struct phy_device *phydev, u8 index,</div><div class='add'>+					unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_LED_FUNC_CTRL);</div><div class='add'>+	if (val &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+</div><div class='add'>+	if (index == MV88Q2XXX_LED_INDEX_TX_ENABLE)</div><div class='add'>+		val = FIELD_GET(MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LED_0_MASK, val);</div><div class='add'>+	else</div><div class='add'>+		val = FIELD_GET(MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LED_1_MASK, val);</div><div class='add'>+</div><div class='add'>+	switch (val) {</div><div class='add'>+	case MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+		break;</div><div class='add'>+	case MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK_1000BT1_ON:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK_1000);</div><div class='add'>+		break;</div><div class='add'>+	case MDIO_MMD_PCS_MV_LED_FUNC_CTRL_TX:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_TX);</div><div class='add'>+		break;</div><div class='add'>+	case MDIO_MMD_PCS_MV_LED_FUNC_CTRL_RX_TX:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_TX) | BIT(TRIGGER_NETDEV_RX);</div><div class='add'>+		break;</div><div class='add'>+	case MDIO_MMD_PCS_MV_LED_FUNC_CTRL_LINK_RX_TX:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK) | BIT(TRIGGER_NETDEV_TX) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_RX);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*rules = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver mv88q2xxx_driver[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.phy_id			= MARVELL_PHY_ID_88Q2110,</div><div class='ctx'> 		.phy_id_mask		= MARVELL_PHY_ID_MASK,</div><div class='ctx'> 		.name			= "mv88q2110",</div><div class='add'>+		.probe			= mv88q2xxx_probe,</div><div class='ctx'> 		.get_features		= mv88q2xxx_get_features,</div><div class='ctx'> 		.config_aneg		= mv88q2xxx_config_aneg,</div><div class='ctx'> 		.config_init		= mv88q2110_config_init,</div><div class='hunk'>@@ -934,12 +1135,15 @@ static struct phy_driver mv88q2xxx_driver[] = {</div><div class='ctx'> 		.get_sqi_max		= mv88q2xxx_get_sqi_max,</div><div class='ctx'> 		.suspend		= mv88q2xxx_suspend,</div><div class='ctx'> 		.resume			= mv88q2xxx_resume,</div><div class='add'>+		.led_hw_is_supported	= mv88q2xxx_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set	= mv88q2xxx_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get	= mv88q2xxx_led_hw_control_get,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(mv88q2xxx_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused mv88q2xxx_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused mv88q2xxx_tbl[] = {</div><div class='ctx'> 	{ MARVELL_PHY_ID_88Q2110, MARVELL_PHY_ID_MASK },</div><div class='ctx'> 	{ MARVELL_PHY_ID_88Q2220, MARVELL_PHY_ID_MASK },</div><div class='ctx'> 	{ /*sentinel*/ }</div><div class='head'>diff --git a/drivers/net/phy/marvell-88x2222.c b/drivers/net/phy/marvell-88x2222.c<br/>index 0b777cdd7078..894bcee61e65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/marvell-88x2222.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/marvell-88x2222.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/marvell-88x2222.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/marvell-88x2222.c</a></div><div class='hunk'>@@ -475,21 +475,20 @@ static int mv2222_config_init(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static int mv2222_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)</div><div class='ctx'> {</div><div class='del'>-	DECLARE_PHY_INTERFACE_MASK(interfaces);</div><div class='ctx'> 	struct phy_device *phydev = upstream;</div><div class='add'>+	const struct sfp_module_caps *caps;</div><div class='ctx'> 	phy_interface_t sfp_interface;</div><div class='ctx'> 	struct mv2222_data *priv;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_supported) = { 0, };</div><div class='del'>-</div><div class='ctx'> 	priv = phydev-&gt;priv;</div><div class='ctx'> 	dev = &amp;phydev-&gt;mdio.dev;</div><div class='ctx'> </div><div class='del'>-	sfp_parse_support(phydev-&gt;sfp_bus, id, sfp_supported, interfaces);</div><div class='del'>-	phydev-&gt;port = sfp_parse_port(phydev-&gt;sfp_bus, id, sfp_supported);</div><div class='del'>-	sfp_interface = sfp_select_interface(phydev-&gt;sfp_bus, sfp_supported);</div><div class='add'>+	caps = sfp_get_module_caps(phydev-&gt;sfp_bus);</div><div class='add'>+</div><div class='add'>+	phydev-&gt;port = caps-&gt;port;</div><div class='add'>+	sfp_interface = sfp_select_interface(phydev-&gt;sfp_bus, caps-&gt;link_modes);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(dev, "%s SFP module inserted\n", phy_modes(sfp_interface));</div><div class='ctx'> </div><div class='hunk'>@@ -502,7 +501,7 @@ static int mv2222_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;line_interface = sfp_interface;</div><div class='del'>-	linkmode_and(priv-&gt;supported, phydev-&gt;supported, sfp_supported);</div><div class='add'>+	linkmode_and(priv-&gt;supported, phydev-&gt;supported, caps-&gt;link_modes);</div><div class='ctx'> </div><div class='ctx'> 	ret = mv2222_config_line(phydev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -613,7 +612,7 @@ static struct phy_driver mv2222_drivers[] = {</div><div class='ctx'> };</div><div class='ctx'> module_phy_driver(mv2222_drivers);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused mv2222_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused mv2222_tbl[] = {</div><div class='ctx'> 	{ MARVELL_PHY_ID_88X2222, MARVELL_PHY_ID_MASK },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c<br/>index cd50cd6a7f75..c248c90510ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/marvell.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/marvell.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/marvell.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/marvell.c</a></div><div class='hunk'>@@ -717,6 +717,48 @@ static int marvell_config_aneg_fiber(struct phy_device *phydev)</div><div class='ctx'> 	return genphy_check_and_restart_aneg(phydev, changed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int m88e1111_inband_caps(struct phy_device *phydev,</div><div class='add'>+					 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	/* In 1000base-X and SGMII modes, the inband mode can be changed</div><div class='add'>+	 * through the Fibre page BMCR ANENABLE bit.</div><div class='add'>+	 */</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_1000BASEX ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE |</div><div class='add'>+		       LINK_INBAND_BYPASS;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m88e1111_config_inband(struct phy_device *phydev, unsigned int modes)</div><div class='add'>+{</div><div class='add'>+	u16 extsr, bmcr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;interface != PHY_INTERFACE_MODE_1000BASEX &amp;&amp;</div><div class='add'>+	    phydev-&gt;interface != PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (modes == LINK_INBAND_BYPASS)</div><div class='add'>+		extsr = MII_M1111_HWCFG_SERIAL_AN_BYPASS;</div><div class='add'>+	else</div><div class='add'>+		extsr = 0;</div><div class='add'>+</div><div class='add'>+	if (modes == LINK_INBAND_DISABLE)</div><div class='add'>+		bmcr = 0;</div><div class='add'>+	else</div><div class='add'>+		bmcr = BMCR_ANENABLE;</div><div class='add'>+</div><div class='add'>+	err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,</div><div class='add'>+			 MII_M1111_HWCFG_SERIAL_AN_BYPASS, extsr);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return extsr;</div><div class='add'>+</div><div class='add'>+	return phy_modify_paged(phydev, MII_MARVELL_FIBER_PAGE, MII_BMCR,</div><div class='add'>+				BMCR_ANENABLE, bmcr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int m88e1111_config_aneg(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);</div><div class='hunk'>@@ -1508,7 +1550,6 @@ static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)</div><div class='ctx'> </div><div class='ctx'> static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)</div><div class='ctx'> {</div><div class='del'>-	struct ethtool_keee eee;</div><div class='ctx'> 	int val, ret;</div><div class='ctx'> </div><div class='ctx'> 	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)</div><div class='hunk'>@@ -1518,8 +1559,7 @@ static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)</div><div class='ctx'> 	/* According to the Marvell data sheet EEE must be disabled for</div><div class='ctx'> 	 * Fast Link Down detection to work properly</div><div class='ctx'> 	 */</div><div class='del'>-	ret = genphy_c45_ethtool_get_eee(phydev, &amp;eee);</div><div class='del'>-	if (!ret &amp;&amp; eee.eee_enabled) {</div><div class='add'>+	if (phydev-&gt;eee_cfg.eee_enabled) {</div><div class='ctx'> 		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1862,6 +1902,43 @@ error:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* m88e1510_resume</div><div class='add'>+ *</div><div class='add'>+ * The 88e1510 PHY has an erratum where the phy downshift counter is not cleared</div><div class='add'>+ * after phy being suspended(BMCR_PDOWN set) and then later resumed(BMCR_PDOWN</div><div class='add'>+ * cleared). This can cause the link to intermittently downshift to a lower speed.</div><div class='add'>+ *</div><div class='add'>+ * Disabling and re-enabling the downshift feature clears the counter, allowing</div><div class='add'>+ * the PHY to retry gigabit link negotiation up to the programmed retry count</div><div class='add'>+ * before downshifting. This behavior has been observed on copper links.</div><div class='add'>+ */</div><div class='add'>+static int m88e1510_resume(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u8 cnt = 0;</div><div class='add'>+</div><div class='add'>+	err = marvell_resume(phydev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* read downshift counter value */</div><div class='add'>+	err = m88e1011_get_downshift(phydev, &amp;cnt);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (cnt) {</div><div class='add'>+		/* downshift disabled */</div><div class='add'>+		err = m88e1011_set_downshift(phydev, 0);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		/* downshift enabled, with previous counter value */</div><div class='add'>+		err = m88e1011_set_downshift(phydev, cnt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int marvell_aneg_done(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);</div><div class='hunk'>@@ -2091,52 +2168,52 @@ static void marvell_get_stats_simple(struct phy_device *phydev,</div><div class='ctx'> 		data[i] = marvell_get_stat_simple(phydev, i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int m88e1510_loopback(struct phy_device *phydev, bool enable)</div><div class='add'>+static int m88e1510_loopback(struct phy_device *phydev, bool enable, int speed)</div><div class='ctx'> {</div><div class='add'>+	u16 bmcr_ctl, mscr2_ctl = 0;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (enable) {</div><div class='del'>-		u16 bmcr_ctl, mscr2_ctl = 0;</div><div class='del'>-</div><div class='del'>-		bmcr_ctl = mii_bmcr_encode_fixed(phydev-&gt;speed, phydev-&gt;duplex);</div><div class='add'>+	if (!enable)</div><div class='add'>+		return genphy_loopback(phydev, enable, 0);</div><div class='ctx'> </div><div class='del'>-		err = phy_write(phydev, MII_BMCR, bmcr_ctl);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			return err;</div><div class='add'>+	if (speed == SPEED_10 || speed == SPEED_100 || speed == SPEED_1000)</div><div class='add'>+		phydev-&gt;speed = speed;</div><div class='add'>+	else if (speed)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		if (phydev-&gt;speed == SPEED_1000)</div><div class='del'>-			mscr2_ctl = BMCR_SPEED1000;</div><div class='del'>-		else if (phydev-&gt;speed == SPEED_100)</div><div class='del'>-			mscr2_ctl = BMCR_SPEED100;</div><div class='add'>+	bmcr_ctl = mii_bmcr_encode_fixed(phydev-&gt;speed, phydev-&gt;duplex);</div><div class='ctx'> </div><div class='del'>-		err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,</div><div class='del'>-				       MII_88E1510_MSCR_2, BMCR_SPEED1000 |</div><div class='del'>-				       BMCR_SPEED100, mscr2_ctl);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			return err;</div><div class='add'>+	err = phy_write(phydev, MII_BMCR, bmcr_ctl);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-		/* Need soft reset to have speed configuration takes effect */</div><div class='del'>-		err = genphy_soft_reset(phydev);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			return err;</div><div class='add'>+	if (phydev-&gt;speed == SPEED_1000)</div><div class='add'>+		mscr2_ctl = BMCR_SPEED1000;</div><div class='add'>+	else if (phydev-&gt;speed == SPEED_100)</div><div class='add'>+		mscr2_ctl = BMCR_SPEED100;</div><div class='ctx'> </div><div class='del'>-		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,</div><div class='del'>-				 BMCR_LOOPBACK);</div><div class='add'>+	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,</div><div class='add'>+			       MII_88E1510_MSCR_2, BMCR_SPEED1000 |</div><div class='add'>+			       BMCR_SPEED100, mscr2_ctl);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-		if (!err) {</div><div class='del'>-			/* It takes some time for PHY device to switch</div><div class='del'>-			 * into/out-of loopback mode.</div><div class='del'>-			 */</div><div class='del'>-			msleep(1000);</div><div class='del'>-		}</div><div class='add'>+	/* Need soft reset to have speed configuration takes effect */</div><div class='add'>+	err = genphy_soft_reset(phydev);</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='del'>-	} else {</div><div class='del'>-		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			return err;</div><div class='ctx'> </div><div class='del'>-		return phy_config_aneg(phydev);</div><div class='add'>+	err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,</div><div class='add'>+			 BMCR_LOOPBACK);</div><div class='add'>+</div><div class='add'>+	if (!err) {</div><div class='add'>+		/*</div><div class='add'>+		 * It takes some time for PHY device to switch into loopback</div><div class='add'>+		 * mode.</div><div class='add'>+		 */</div><div class='add'>+		msleep(1000);</div><div class='ctx'> 	}</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int marvell_vct5_wait_complete(struct phy_device *phydev)</div><div class='hunk'>@@ -3084,33 +3161,13 @@ static umode_t marvell_hwmon_is_visible(const void *data,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 marvell_hwmon_chip_config[] = {</div><div class='del'>-	HWMON_C_REGISTER_TZ,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info marvell_hwmon_chip = {</div><div class='del'>-	.type = hwmon_chip,</div><div class='del'>-	.config = marvell_hwmon_chip_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not</div><div class='ctx'>  * defined for all PHYs, because the hwmon code checks whether the attributes</div><div class='ctx'>  * exists via the .is_visible method</div><div class='ctx'>  */</div><div class='del'>-static u32 marvell_hwmon_temp_config[] = {</div><div class='del'>-	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info marvell_hwmon_temp = {</div><div class='del'>-	.type = hwmon_temp,</div><div class='del'>-	.config = marvell_hwmon_temp_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct hwmon_channel_info * const marvell_hwmon_info[] = {</div><div class='del'>-	&amp;marvell_hwmon_chip,</div><div class='del'>-	&amp;marvell_hwmon_temp,</div><div class='add'>+	HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),</div><div class='add'>+	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM),</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -3543,20 +3600,18 @@ static int marvell_probe(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)</div><div class='ctx'> {</div><div class='del'>-	DECLARE_PHY_INTERFACE_MASK(interfaces);</div><div class='ctx'> 	struct phy_device *phydev = upstream;</div><div class='add'>+	const struct sfp_module_caps *caps;</div><div class='ctx'> 	phy_interface_t interface;</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	int oldpage;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	u16 mode;</div><div class='ctx'> </div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };</div><div class='del'>-</div><div class='ctx'> 	dev = &amp;phydev-&gt;mdio.dev;</div><div class='ctx'> </div><div class='del'>-	sfp_parse_support(phydev-&gt;sfp_bus, id, supported, interfaces);</div><div class='del'>-	interface = sfp_select_interface(phydev-&gt;sfp_bus, supported);</div><div class='add'>+	caps = sfp_get_module_caps(phydev-&gt;sfp_bus);</div><div class='add'>+	interface = sfp_select_interface(phydev-&gt;sfp_bus, caps-&gt;link_modes);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));</div><div class='ctx'> </div><div class='hunk'>@@ -3677,6 +3732,8 @@ static struct phy_driver marvell_drivers[] = {</div><div class='ctx'> 		.name = "Marvell 88E1112",</div><div class='ctx'> 		/* PHY_GBIT_FEATURES */</div><div class='ctx'> 		.probe = marvell_probe,</div><div class='add'>+		.inband_caps = m88e1111_inband_caps,</div><div class='add'>+		.config_inband = m88e1111_config_inband,</div><div class='ctx'> 		.config_init = m88e1112_config_init,</div><div class='ctx'> 		.config_aneg = marvell_config_aneg,</div><div class='ctx'> 		.config_intr = marvell_config_intr,</div><div class='hunk'>@@ -3698,6 +3755,8 @@ static struct phy_driver marvell_drivers[] = {</div><div class='ctx'> 		/* PHY_GBIT_FEATURES */</div><div class='ctx'> 		.flags = PHY_POLL_CABLE_TEST,</div><div class='ctx'> 		.probe = marvell_probe,</div><div class='add'>+		.inband_caps = m88e1111_inband_caps,</div><div class='add'>+		.config_inband = m88e1111_config_inband,</div><div class='ctx'> 		.config_init = m88e1111gbe_config_init,</div><div class='ctx'> 		.config_aneg = m88e1111_config_aneg,</div><div class='ctx'> 		.read_status = marvell_read_status,</div><div class='hunk'>@@ -3721,6 +3780,8 @@ static struct phy_driver marvell_drivers[] = {</div><div class='ctx'> 		.name = "Marvell 88E1111 (Finisar)",</div><div class='ctx'> 		/* PHY_GBIT_FEATURES */</div><div class='ctx'> 		.probe = marvell_probe,</div><div class='add'>+		.inband_caps = m88e1111_inband_caps,</div><div class='add'>+		.config_inband = m88e1111_config_inband,</div><div class='ctx'> 		.config_init = m88e1111gbe_config_init,</div><div class='ctx'> 		.config_aneg = m88e1111_config_aneg,</div><div class='ctx'> 		.read_status = marvell_read_status,</div><div class='hunk'>@@ -3897,7 +3958,7 @@ static struct phy_driver marvell_drivers[] = {</div><div class='ctx'> 		.handle_interrupt = marvell_handle_interrupt,</div><div class='ctx'> 		.get_wol = m88e1318_get_wol,</div><div class='ctx'> 		.set_wol = m88e1318_set_wol,</div><div class='del'>-		.resume = marvell_resume,</div><div class='add'>+		.resume = m88e1510_resume,</div><div class='ctx'> 		.suspend = marvell_suspend,</div><div class='ctx'> 		.read_page = marvell_read_page,</div><div class='ctx'> 		.write_page = marvell_write_page,</div><div class='hunk'>@@ -4143,7 +4204,7 @@ static struct phy_driver marvell_drivers[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(marvell_drivers);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused marvell_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused marvell_tbl[] = {</div><div class='ctx'> 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },</div><div class='ctx'> 	{ MARVELL_PHY_ID_88E3082, MARVELL_PHY_ID_MASK },</div><div class='ctx'> 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },</div><div class='head'>diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c<br/>index 6642eb642d4b..8fd42131cdbf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/marvell10g.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/marvell10g.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/marvell10g.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/marvell10g.c</a></div><div class='hunk'>@@ -230,29 +230,9 @@ static const struct hwmon_ops mv3310_hwmon_ops = {</div><div class='ctx'> 	.read = mv3310_hwmon_read,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static u32 mv3310_hwmon_chip_config[] = {</div><div class='del'>-	HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL,</div><div class='del'>-	0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info mv3310_hwmon_chip = {</div><div class='del'>-	.type = hwmon_chip,</div><div class='del'>-	.config = mv3310_hwmon_chip_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static u32 mv3310_hwmon_temp_config[] = {</div><div class='del'>-	HWMON_T_INPUT,</div><div class='del'>-	0,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct hwmon_channel_info mv3310_hwmon_temp = {</div><div class='del'>-	.type = hwmon_temp,</div><div class='del'>-	.config = mv3310_hwmon_temp_config,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static const struct hwmon_channel_info * const mv3310_hwmon_info[] = {</div><div class='del'>-	&amp;mv3310_hwmon_chip,</div><div class='del'>-	&amp;mv3310_hwmon_temp,</div><div class='add'>+	HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),</div><div class='add'>+	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -486,12 +466,11 @@ static int mv3310_set_edpd(struct phy_device *phydev, u16 edpd)</div><div class='ctx'> static int mv3310_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct phy_device *phydev = upstream;</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };</div><div class='del'>-	DECLARE_PHY_INTERFACE_MASK(interfaces);</div><div class='add'>+	const struct sfp_module_caps *caps;</div><div class='ctx'> 	phy_interface_t iface;</div><div class='ctx'> </div><div class='del'>-	sfp_parse_support(phydev-&gt;sfp_bus, id, support, interfaces);</div><div class='del'>-	iface = sfp_select_interface(phydev-&gt;sfp_bus, support);</div><div class='add'>+	caps = sfp_get_module_caps(phydev-&gt;sfp_bus);</div><div class='add'>+	iface = sfp_select_interface(phydev-&gt;sfp_bus, caps-&gt;link_modes);</div><div class='ctx'> </div><div class='ctx'> 	if (iface != PHY_INTERFACE_MODE_10GBASER) {</div><div class='ctx'> 		dev_err(&amp;phydev-&gt;mdio.dev, "incompatible SFP module inserted\n");</div><div class='hunk'>@@ -1284,7 +1263,8 @@ static int mv3310_get_number_of_ports(struct phy_device *phydev)</div><div class='ctx'> 	return ret + 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv3310_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int mv3310_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				   const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	if ((phydev-&gt;c45_ids.device_ids[MDIO_MMD_PMAPMD] &amp;</div><div class='ctx'> 	     MARVELL_PHY_ID_MASK) != MARVELL_PHY_ID_88X3310)</div><div class='hunk'>@@ -1293,7 +1273,8 @@ static int mv3310_match_phy_device(struct phy_device *phydev)</div><div class='ctx'> 	return mv3310_get_number_of_ports(phydev) == 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv3340_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int mv3340_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				   const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	if ((phydev-&gt;c45_ids.device_ids[MDIO_MMD_PMAPMD] &amp;</div><div class='ctx'> 	     MARVELL_PHY_ID_MASK) != MARVELL_PHY_ID_88X3310)</div><div class='hunk'>@@ -1317,12 +1298,14 @@ static int mv211x_match_phy_device(struct phy_device *phydev, bool has_5g)</div><div class='ctx'> 	return !!(val &amp; MDIO_PCS_SPEED_5G) == has_5g;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv2110_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int mv2110_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				   const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return mv211x_match_phy_device(phydev, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv2111_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int mv2111_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				   const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return mv211x_match_phy_device(phydev, false);</div><div class='ctx'> }</div><div class='hunk'>@@ -1484,7 +1467,7 @@ static struct phy_driver mv3310_drivers[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(mv3310_drivers);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused mv3310_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused mv3310_tbl[] = {</div><div class='ctx'> 	{ MARVELL_PHY_ID_88X3310, MARVELL_PHY_ID_MASK },</div><div class='ctx'> 	{ MARVELL_PHY_ID_88E2110, MARVELL_PHY_ID_MASK },</div><div class='ctx'> 	{ },</div><div class='head'>diff --git a/drivers/net/phy/mdio-boardinfo.c b/drivers/net/phy/mdio-boardinfo.c<br/>deleted file mode 100644<br/>index 2de679a68115..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mdio-boardinfo.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio-boardinfo.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,80 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0+</div><div class='del'>-/*</div><div class='del'>- * mdio-boardinfo - Collect pre-declarations for MDIO devices</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/export.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-</div><div class='del'>-#include "mdio-boardinfo.h"</div><div class='del'>-</div><div class='del'>-static LIST_HEAD(mdio_board_list);</div><div class='del'>-static DEFINE_MUTEX(mdio_board_lock);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * mdiobus_setup_mdiodev_from_board_info - create and setup MDIO devices</div><div class='del'>- * from pre-collected board specific MDIO information</div><div class='del'>- * @bus: Bus the board_info belongs to</div><div class='del'>- * @cb: Callback to create device on bus</div><div class='del'>- * Context: can sleep</div><div class='del'>- */</div><div class='del'>-void mdiobus_setup_mdiodev_from_board_info(struct mii_bus *bus,</div><div class='del'>-					   int (*cb)</div><div class='del'>-					   (struct mii_bus *bus,</div><div class='del'>-					    struct mdio_board_info *bi))</div><div class='del'>-{</div><div class='del'>-	struct mdio_board_entry *be;</div><div class='del'>-	struct mdio_board_entry *tmp;</div><div class='del'>-	struct mdio_board_info *bi;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;mdio_board_lock);</div><div class='del'>-	list_for_each_entry_safe(be, tmp, &amp;mdio_board_list, list) {</div><div class='del'>-		bi = &amp;be-&gt;board_info;</div><div class='del'>-</div><div class='del'>-		if (strcmp(bus-&gt;id, bi-&gt;bus_id))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		mutex_unlock(&amp;mdio_board_lock);</div><div class='del'>-		ret = cb(bus, bi);</div><div class='del'>-		mutex_lock(&amp;mdio_board_lock);</div><div class='del'>-		if (ret)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;mdio_board_lock);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mdiobus_setup_mdiodev_from_board_info);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * mdiobus_register_board_info - register MDIO devices for a given board</div><div class='del'>- * @info: array of devices descriptors</div><div class='del'>- * @n: number of descriptors provided</div><div class='del'>- * Context: can sleep</div><div class='del'>- *</div><div class='del'>- * The board info passed can be marked with __initdata but be pointers</div><div class='del'>- * such as platform_data etc. are copied as-is</div><div class='del'>- */</div><div class='del'>-int mdiobus_register_board_info(const struct mdio_board_info *info,</div><div class='del'>-				unsigned int n)</div><div class='del'>-{</div><div class='del'>-	struct mdio_board_entry *be;</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	be = kcalloc(n, sizeof(*be), GFP_KERNEL);</div><div class='del'>-	if (!be)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; n; i++, be++, info++) {</div><div class='del'>-		memcpy(&amp;be-&gt;board_info, info, sizeof(*info));</div><div class='del'>-		mutex_lock(&amp;mdio_board_lock);</div><div class='del'>-		list_add_tail(&amp;be-&gt;list, &amp;mdio_board_list);</div><div class='del'>-		mutex_unlock(&amp;mdio_board_lock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mdiobus_register_board_info);</div><div class='head'>diff --git a/drivers/net/phy/mdio-boardinfo.h b/drivers/net/phy/mdio-boardinfo.h<br/>deleted file mode 100644<br/>index 773bb51399be..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mdio-boardinfo.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio-boardinfo.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-/* SPDX-License-Identifier: GPL-2.0 */</div><div class='del'>-/*</div><div class='del'>- * mdio-boardinfo.h - board info interface internal to the mdio_bus</div><div class='del'>- * component</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MDIO_BOARD_INFO_H</div><div class='del'>-#define __MDIO_BOARD_INFO_H</div><div class='del'>-</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;linux/mutex.h&gt;</div><div class='del'>-</div><div class='del'>-struct mdio_board_entry {</div><div class='del'>-	struct list_head	list;</div><div class='del'>-	struct mdio_board_info	board_info;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void mdiobus_setup_mdiodev_from_board_info(struct mii_bus *bus,</div><div class='del'>-					   int (*cb)</div><div class='del'>-					   (struct mii_bus *bus,</div><div class='del'>-					    struct mdio_board_info *bi));</div><div class='del'>-</div><div class='del'>-#endif /* __MDIO_BOARD_INFO_H */</div><div class='head'>diff --git a/drivers/net/phy/mdio-open-alliance.h b/drivers/net/phy/mdio-open-alliance.h<br/>index 931e14660d75..449d0fb67093 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mdio-open-alliance.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio-open-alliance.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mdio-open-alliance.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mdio-open-alliance.h</a></div><div class='hunk'>@@ -43,4 +43,53 @@</div><div class='ctx'> /* Version Identifiers */</div><div class='ctx'> #define OATC14_IDM		0x0a00</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Open Alliance TC14 (10BASE-T1S) - Advanced Diagnostic Features Registers</div><div class='add'>+ *</div><div class='add'>+ * Refer to the OPEN Alliance documentation:</div><div class='add'>+ *   https://opensig.org/automotive-ethernet-specifications/</div><div class='add'>+ *</div><div class='add'>+ * Specification:</div><div class='add'>+ *   "10BASE-T1S Advanced Diagnostic PHY Features"</div><div class='add'>+ *   https://opensig.org/wp-content/uploads/2025/06/OPEN_Alliance_10BASE-T1S_Advanced_PHY_features_for-automotive_Ethernet_V2.1b.pdf</div><div class='add'>+ */</div><div class='add'>+/* Advanced Diagnostic Features Capability Register*/</div><div class='add'>+#define MDIO_OATC14_ADFCAP		0xcc00</div><div class='add'>+#define OATC14_ADFCAP_HDD_CAPABILITY	GENMASK(10, 8)</div><div class='add'>+#define OATC14_ADFCAP_SQIPLUS_CAPABILITY	GENMASK(4, 1)</div><div class='add'>+#define OATC14_ADFCAP_SQI_CAPABILITY	BIT(0)</div><div class='add'>+</div><div class='add'>+/* Harness Defect Detection Register */</div><div class='add'>+#define MDIO_OATC14_HDD			0xcc01</div><div class='add'>+#define OATC14_HDD_CONTROL		BIT(15)</div><div class='add'>+#define OATC14_HDD_READY		BIT(14)</div><div class='add'>+#define OATC14_HDD_START_CONTROL	BIT(13)</div><div class='add'>+#define OATC14_HDD_VALID		BIT(2)</div><div class='add'>+#define OATC14_HDD_SHORT_OPEN_STATUS	GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+/* Dynamic Channel Quality SQI Register */</div><div class='add'>+#define MDIO_OATC14_DCQ_SQI		0xcc03</div><div class='add'>+#define OATC14_DCQ_SQI_VALUE		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+/* Dynamic Channel Quality SQI Plus Register */</div><div class='add'>+#define MDIO_OATC14_DCQ_SQIPLUS		0xcc04</div><div class='add'>+#define OATC14_DCQ_SQIPLUS_VALUE	GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+/* SQI is supported using 3 bits means 8 levels (0-7) */</div><div class='add'>+#define OATC14_SQI_MAX_LEVEL		7</div><div class='add'>+</div><div class='add'>+/* Bus Short/Open Status:</div><div class='add'>+ * 0 0 - no fault; everything is ok. (Default)</div><div class='add'>+ * 0 1 - detected as an open or missing termination(s)</div><div class='add'>+ * 1 0 - detected as a short or extra termination(s)</div><div class='add'>+ * 1 1 - fault but fault type not detectable. More details can be available by</div><div class='add'>+ *       vender specific register if supported.</div><div class='add'>+ */</div><div class='add'>+enum oatc14_hdd_status {</div><div class='add'>+	OATC14_HDD_STATUS_CABLE_OK = 0,</div><div class='add'>+	OATC14_HDD_STATUS_OPEN,</div><div class='add'>+	OATC14_HDD_STATUS_SHORT,</div><div class='add'>+	OATC14_HDD_STATUS_NOT_DETECTABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #endif /* __MDIO_OPEN_ALLIANCE__ */</div><div class='head'>diff --git a/drivers/net/phy/mdio-private.h b/drivers/net/phy/mdio-private.h<br/>new file mode 100644<br/>index 000000000000..8bc6d9088af1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mdio-private.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mdio-private.h</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+#ifndef __MDIO_PRIVATE_H</div><div class='add'>+#define __MDIO_PRIVATE_H</div><div class='add'>+</div><div class='add'>+/* MDIO internal helpers</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int mdio_device_register_reset(struct mdio_device *mdiodev);</div><div class='add'>+void mdio_device_unregister_reset(struct mdio_device *mdiodev);</div><div class='add'>+</div><div class='add'>+#endif /* __MDIO_PRIVATE_H */</div><div class='head'>diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c<br/>index 7e2f10182c0c..afdf1ad6c0e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mdio_bus.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio_bus.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mdio_bus.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mdio_bus.c</a></div><div class='hunk'>@@ -8,17 +8,14 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/micrel_phy.h&gt;</div><div class='ctx'> #include &lt;linux/mii.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -27,45 +24,16 @@</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/reset.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/unistd.h&gt;</div><div class='add'>+#include "mdio-private.h"</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='ctx'> #include &lt;trace/events/mdio.h&gt;</div><div class='ctx'> </div><div class='del'>-#include "mdio-boardinfo.h"</div><div class='del'>-</div><div class='del'>-static int mdiobus_register_gpiod(struct mdio_device *mdiodev)</div><div class='del'>-{</div><div class='del'>-	/* Deassert the optional reset signal */</div><div class='del'>-	mdiodev-&gt;reset_gpio = gpiod_get_optional(&amp;mdiodev-&gt;dev,</div><div class='del'>-						 "reset", GPIOD_OUT_LOW);</div><div class='del'>-	if (IS_ERR(mdiodev-&gt;reset_gpio))</div><div class='del'>-		return PTR_ERR(mdiodev-&gt;reset_gpio);</div><div class='del'>-</div><div class='del'>-	if (mdiodev-&gt;reset_gpio)</div><div class='del'>-		gpiod_set_consumer_name(mdiodev-&gt;reset_gpio, "PHY reset");</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mdiobus_register_reset(struct mdio_device *mdiodev)</div><div class='del'>-{</div><div class='del'>-	struct reset_control *reset;</div><div class='del'>-</div><div class='del'>-	reset = reset_control_get_optional_exclusive(&amp;mdiodev-&gt;dev, "phy");</div><div class='del'>-	if (IS_ERR(reset))</div><div class='del'>-		return PTR_ERR(reset);</div><div class='del'>-</div><div class='del'>-	mdiodev-&gt;reset_ctrl = reset;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int mdiobus_register_device(struct mdio_device *mdiodev)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -74,11 +42,7 @@ int mdiobus_register_device(struct mdio_device *mdiodev)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	if (mdiodev-&gt;flags &amp; MDIO_DEVICE_FLAG_PHY) {</div><div class='del'>-		err = mdiobus_register_gpiod(mdiodev);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		err = mdiobus_register_reset(mdiodev);</div><div class='add'>+		err = mdio_device_register_reset(mdiodev);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> </div><div class='hunk'>@@ -97,7 +61,7 @@ int mdiobus_unregister_device(struct mdio_device *mdiodev)</div><div class='ctx'> 	if (mdiodev-&gt;bus-&gt;mdio_map[mdiodev-&gt;addr] != mdiodev)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	reset_control_put(mdiodev-&gt;reset_ctrl);</div><div class='add'>+	mdio_device_unregister_reset(mdiodev);</div><div class='ctx'> </div><div class='ctx'> 	mdiodev-&gt;bus-&gt;mdio_map[mdiodev-&gt;addr] = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -137,45 +101,6 @@ bool mdiobus_is_registered_device(struct mii_bus *bus, int addr)</div><div class='ctx'> EXPORT_SYMBOL(mdiobus_is_registered_device);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * mdiobus_alloc_size - allocate a mii_bus structure</div><div class='del'>- * @size: extra amount of memory to allocate for private storage.</div><div class='del'>- * If non-zero, then bus-&gt;priv is points to that memory.</div><div class='del'>- *</div><div class='del'>- * Description: called by a bus driver to allocate an mii_bus</div><div class='del'>- * structure to fill in.</div><div class='del'>- */</div><div class='del'>-struct mii_bus *mdiobus_alloc_size(size_t size)</div><div class='del'>-{</div><div class='del'>-	struct mii_bus *bus;</div><div class='del'>-	size_t aligned_size = ALIGN(sizeof(*bus), NETDEV_ALIGN);</div><div class='del'>-	size_t alloc_size;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* If we alloc extra space, it should be aligned */</div><div class='del'>-	if (size)</div><div class='del'>-		alloc_size = aligned_size + size;</div><div class='del'>-	else</div><div class='del'>-		alloc_size = sizeof(*bus);</div><div class='del'>-</div><div class='del'>-	bus = kzalloc(alloc_size, GFP_KERNEL);</div><div class='del'>-	if (!bus)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	bus-&gt;state = MDIOBUS_ALLOCATED;</div><div class='del'>-	if (size)</div><div class='del'>-		bus-&gt;priv = (void *)bus + aligned_size;</div><div class='del'>-</div><div class='del'>-	/* Initialise the interrupts to polling and 64-bit seqcounts */</div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='del'>-		bus-&gt;irq[i] = PHY_POLL;</div><div class='del'>-		u64_stats_init(&amp;bus-&gt;stats[i].syncp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return bus;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mdiobus_alloc_size);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * mdiobus_release - mii_bus device release callback</div><div class='ctx'>  * @d: the target struct device that contains the mii_bus</div><div class='ctx'>  *</div><div class='hunk'>@@ -403,17 +328,18 @@ static const struct attribute_group *mdio_bus_groups[] = {</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct class mdio_bus_class = {</div><div class='add'>+const struct class mdio_bus_class = {</div><div class='ctx'> 	.name		= "mdio_bus",</div><div class='ctx'> 	.dev_release	= mdiobus_release,</div><div class='ctx'> 	.dev_groups	= mdio_bus_groups,</div><div class='ctx'> };</div><div class='add'>+EXPORT_SYMBOL_GPL(mdio_bus_class);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * mdio_find_bus - Given the name of a mdiobus, find the mii_bus.</div><div class='ctx'>  * @mdio_name: The name of a mdiobus.</div><div class='ctx'>  *</div><div class='del'>- * Returns a reference to the mii_bus, or NULL if none found.  The</div><div class='add'>+ * Return: a reference to the mii_bus, or NULL if none found. The</div><div class='ctx'>  * embedded struct device will have its reference count incremented,</div><div class='ctx'>  * and this must be put_deviced'ed once the bus is finished with.</div><div class='ctx'>  */</div><div class='hunk'>@@ -431,7 +357,7 @@ EXPORT_SYMBOL(mdio_find_bus);</div><div class='ctx'>  * of_mdio_find_bus - Given an mii_bus node, find the mii_bus.</div><div class='ctx'>  * @mdio_bus_np: Pointer to the mii_bus.</div><div class='ctx'>  *</div><div class='del'>- * Returns a reference to the mii_bus, or NULL if none found.  The</div><div class='add'>+ * Return: a reference to the mii_bus, or NULL if none found. The</div><div class='ctx'>  * embedded struct device will have its reference count incremented,</div><div class='ctx'>  * and this must be put once the bus is finished with.</div><div class='ctx'>  *</div><div class='hunk'>@@ -451,408 +377,8 @@ struct mii_bus *of_mdio_find_bus(struct device_node *mdio_bus_np)</div><div class='ctx'> 	return d ? to_mii_bus(d) : NULL;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(of_mdio_find_bus);</div><div class='del'>-</div><div class='del'>-/* Walk the list of subnodes of a mdio bus and look for a node that</div><div class='del'>- * matches the mdio device's address with its 'reg' property. If</div><div class='del'>- * found, set the of_node pointer for the mdio device. This allows</div><div class='del'>- * auto-probed phy devices to be supplied with information passed in</div><div class='del'>- * via DT.</div><div class='del'>- * If a PHY package is found, PHY is searched also there.</div><div class='del'>- */</div><div class='del'>-static int of_mdiobus_find_phy(struct device *dev, struct mdio_device *mdiodev,</div><div class='del'>-			       struct device_node *np)</div><div class='del'>-{</div><div class='del'>-	struct device_node *child;</div><div class='del'>-</div><div class='del'>-	for_each_available_child_of_node(np, child) {</div><div class='del'>-		int addr;</div><div class='del'>-</div><div class='del'>-		if (of_node_name_eq(child, "ethernet-phy-package")) {</div><div class='del'>-			/* Validate PHY package reg presence */</div><div class='del'>-			if (!of_property_present(child, "reg")) {</div><div class='del'>-				of_node_put(child);</div><div class='del'>-				return -EINVAL;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (!of_mdiobus_find_phy(dev, mdiodev, child)) {</div><div class='del'>-				/* The refcount for the PHY package will be</div><div class='del'>-				 * incremented later when PHY join the Package.</div><div class='del'>-				 */</div><div class='del'>-				of_node_put(child);</div><div class='del'>-				return 0;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		addr = of_mdio_parse_addr(dev, child);</div><div class='del'>-		if (addr &lt; 0)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (addr == mdiodev-&gt;addr) {</div><div class='del'>-			device_set_node(dev, of_fwnode_handle(child));</div><div class='del'>-			/* The refcount on "child" is passed to the mdio</div><div class='del'>-			 * device. Do _not_ use of_node_put(child) here.</div><div class='del'>-			 */</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void of_mdiobus_link_mdiodev(struct mii_bus *bus,</div><div class='del'>-				    struct mdio_device *mdiodev)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;of_node || !bus-&gt;dev.of_node)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	of_mdiobus_find_phy(dev, mdiodev, bus-&gt;dev.of_node);</div><div class='del'>-}</div><div class='del'>-#else /* !IS_ENABLED(CONFIG_OF_MDIO) */</div><div class='del'>-static inline void of_mdiobus_link_mdiodev(struct mii_bus *mdio,</div><div class='del'>-					   struct mdio_device *mdiodev)</div><div class='del'>-{</div><div class='del'>-}</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * mdiobus_create_device - create a full MDIO device given</div><div class='del'>- * a mdio_board_info structure</div><div class='del'>- * @bus: MDIO bus to create the devices on</div><div class='del'>- * @bi: mdio_board_info structure describing the devices</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success or &lt; 0 on error.</div><div class='del'>- */</div><div class='del'>-static int mdiobus_create_device(struct mii_bus *bus,</div><div class='del'>-				 struct mdio_board_info *bi)</div><div class='del'>-{</div><div class='del'>-	struct mdio_device *mdiodev;</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	mdiodev = mdio_device_create(bus, bi-&gt;mdio_addr);</div><div class='del'>-	if (IS_ERR(mdiodev))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	strscpy(mdiodev-&gt;modalias, bi-&gt;modalias,</div><div class='del'>-		sizeof(mdiodev-&gt;modalias));</div><div class='del'>-	mdiodev-&gt;bus_match = mdio_device_bus_match;</div><div class='del'>-	mdiodev-&gt;dev.platform_data = (void *)bi-&gt;platform_data;</div><div class='del'>-</div><div class='del'>-	ret = mdio_device_register(mdiodev);</div><div class='del'>-	if (ret)</div><div class='del'>-		mdio_device_free(mdiodev);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr, bool c45)</div><div class='del'>-{</div><div class='del'>-	struct phy_device *phydev = ERR_PTR(-ENODEV);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	phydev = get_phy_device(bus, addr, c45);</div><div class='del'>-	if (IS_ERR(phydev))</div><div class='del'>-		return phydev;</div><div class='del'>-</div><div class='del'>-	/* For DT, see if the auto-probed phy has a corresponding child</div><div class='del'>-	 * in the bus node, and set the of_node pointer in this case.</div><div class='del'>-	 */</div><div class='del'>-	of_mdiobus_link_mdiodev(bus, &amp;phydev-&gt;mdio);</div><div class='del'>-</div><div class='del'>-	err = phy_device_register(phydev);</div><div class='del'>-	if (err) {</div><div class='del'>-		phy_device_free(phydev);</div><div class='del'>-		return ERR_PTR(-ENODEV);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return phydev;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * mdiobus_scan_c22 - scan one address on a bus for C22 MDIO devices.</div><div class='del'>- * @bus: mii_bus to scan</div><div class='del'>- * @addr: address on bus to scan</div><div class='del'>- *</div><div class='del'>- * This function scans one address on the MDIO bus, looking for</div><div class='del'>- * devices which can be identified using a vendor/product ID in</div><div class='del'>- * registers 2 and 3. Not all MDIO devices have such registers, but</div><div class='del'>- * PHY devices typically do. Hence this function assumes anything</div><div class='del'>- * found is a PHY, or can be treated as a PHY. Other MDIO devices,</div><div class='del'>- * such as switches, will probably not be found during the scan.</div><div class='del'>- */</div><div class='del'>-struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr)</div><div class='del'>-{</div><div class='del'>-	return mdiobus_scan(bus, addr, false);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mdiobus_scan_c22);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * mdiobus_scan_c45 - scan one address on a bus for C45 MDIO devices.</div><div class='del'>- * @bus: mii_bus to scan</div><div class='del'>- * @addr: address on bus to scan</div><div class='del'>- *</div><div class='del'>- * This function scans one address on the MDIO bus, looking for</div><div class='del'>- * devices which can be identified using a vendor/product ID in</div><div class='del'>- * registers 2 and 3. Not all MDIO devices have such registers, but</div><div class='del'>- * PHY devices typically do. Hence this function assumes anything</div><div class='del'>- * found is a PHY, or can be treated as a PHY. Other MDIO devices,</div><div class='del'>- * such as switches, will probably not be found during the scan.</div><div class='del'>- */</div><div class='del'>-static struct phy_device *mdiobus_scan_c45(struct mii_bus *bus, int addr)</div><div class='del'>-{</div><div class='del'>-	return mdiobus_scan(bus, addr, true);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mdiobus_scan_bus_c22(struct mii_bus *bus)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='del'>-		if ((bus-&gt;phy_mask &amp; BIT(i)) == 0) {</div><div class='del'>-			struct phy_device *phydev;</div><div class='del'>-</div><div class='del'>-			phydev = mdiobus_scan_c22(bus, i);</div><div class='del'>-			if (IS_ERR(phydev) &amp;&amp; (PTR_ERR(phydev) != -ENODEV))</div><div class='del'>-				return PTR_ERR(phydev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mdiobus_scan_bus_c45(struct mii_bus *bus)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='del'>-		if ((bus-&gt;phy_mask &amp; BIT(i)) == 0) {</div><div class='del'>-			struct phy_device *phydev;</div><div class='del'>-</div><div class='del'>-			/* Don't scan C45 if we already have a C22 device */</div><div class='del'>-			if (bus-&gt;mdio_map[i])</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			phydev = mdiobus_scan_c45(bus, i);</div><div class='del'>-			if (IS_ERR(phydev) &amp;&amp; (PTR_ERR(phydev) != -ENODEV))</div><div class='del'>-				return PTR_ERR(phydev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* There are some C22 PHYs which do bad things when where is a C45</div><div class='del'>- * transaction on the bus, like accepting a read themselves, and</div><div class='del'>- * stomping over the true devices reply, to performing a write to</div><div class='del'>- * themselves which was intended for another device. Now that C22</div><div class='del'>- * devices have been found, see if any of them are bad for C45, and if we</div><div class='del'>- * should skip the C45 scan.</div><div class='del'>- */</div><div class='del'>-static bool mdiobus_prevent_c45_scan(struct mii_bus *bus)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='del'>-		struct phy_device *phydev;</div><div class='del'>-		u32 oui;</div><div class='del'>-</div><div class='del'>-		phydev = mdiobus_get_phy(bus, i);</div><div class='del'>-		if (!phydev)</div><div class='del'>-			continue;</div><div class='del'>-		oui = phydev-&gt;phy_id &gt;&gt; 10;</div><div class='del'>-</div><div class='del'>-		if (oui == MICREL_OUI)</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * __mdiobus_register - bring up all the PHYs on a given bus and attach them to bus</div><div class='del'>- * @bus: target mii_bus</div><div class='del'>- * @owner: module containing bus accessor functions</div><div class='del'>- *</div><div class='del'>- * Description: Called by a bus driver to bring up all the PHYs</div><div class='del'>- *   on a given bus, and attach them to the bus. Drivers should use</div><div class='del'>- *   mdiobus_register() rather than __mdiobus_register() unless they</div><div class='del'>- *   need to pass a specific owner module. MDIO devices which are not</div><div class='del'>- *   PHYs will not be brought up by this function. They are expected</div><div class='del'>- *   to be explicitly listed in DT and instantiated by of_mdiobus_register().</div><div class='del'>- *</div><div class='del'>- * Returns 0 on success or &lt; 0 on error.</div><div class='del'>- */</div><div class='del'>-int __mdiobus_register(struct mii_bus *bus, struct module *owner)</div><div class='del'>-{</div><div class='del'>-	struct mdio_device *mdiodev;</div><div class='del'>-	struct gpio_desc *gpiod;</div><div class='del'>-	bool prevent_c45_scan;</div><div class='del'>-	int i, err;</div><div class='del'>-</div><div class='del'>-	if (!bus || !bus-&gt;name)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* An access method always needs both read and write operations */</div><div class='del'>-	if (!!bus-&gt;read != !!bus-&gt;write || !!bus-&gt;read_c45 != !!bus-&gt;write_c45)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* At least one method is mandatory */</div><div class='del'>-	if (!bus-&gt;read &amp;&amp; !bus-&gt;read_c45)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (bus-&gt;parent &amp;&amp; bus-&gt;parent-&gt;of_node)</div><div class='del'>-		bus-&gt;parent-&gt;of_node-&gt;fwnode.flags |=</div><div class='del'>-					FWNODE_FLAG_NEEDS_CHILD_BOUND_ON_ADD;</div><div class='del'>-</div><div class='del'>-	WARN(bus-&gt;state != MDIOBUS_ALLOCATED &amp;&amp;</div><div class='del'>-	     bus-&gt;state != MDIOBUS_UNREGISTERED,</div><div class='del'>-	     "%s: not in ALLOCATED or UNREGISTERED state\n", bus-&gt;id);</div><div class='del'>-</div><div class='del'>-	bus-&gt;owner = owner;</div><div class='del'>-	bus-&gt;dev.parent = bus-&gt;parent;</div><div class='del'>-	bus-&gt;dev.class = &amp;mdio_bus_class;</div><div class='del'>-	bus-&gt;dev.groups = NULL;</div><div class='del'>-	dev_set_name(&amp;bus-&gt;dev, "%s", bus-&gt;id);</div><div class='del'>-</div><div class='del'>-	/* If the bus state is allocated, we're registering a fresh bus</div><div class='del'>-	 * that may have a fwnode associated with it. Grab a reference</div><div class='del'>-	 * to the fwnode. This will be dropped when the bus is released.</div><div class='del'>-	 * If the bus was set to unregistered, it means that the bus was</div><div class='del'>-	 * previously registered, and we've already grabbed a reference.</div><div class='del'>-	 */</div><div class='del'>-	if (bus-&gt;state == MDIOBUS_ALLOCATED)</div><div class='del'>-		fwnode_handle_get(dev_fwnode(&amp;bus-&gt;dev));</div><div class='del'>-</div><div class='del'>-	/* We need to set state to MDIOBUS_UNREGISTERED to correctly release</div><div class='del'>-	 * the device in mdiobus_free()</div><div class='del'>-	 *</div><div class='del'>-	 * State will be updated later in this function in case of success</div><div class='del'>-	 */</div><div class='del'>-	bus-&gt;state = MDIOBUS_UNREGISTERED;</div><div class='del'>-</div><div class='del'>-	err = device_register(&amp;bus-&gt;dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		pr_err("mii_bus %s failed to register\n", bus-&gt;id);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;bus-&gt;mdio_lock);</div><div class='del'>-	mutex_init(&amp;bus-&gt;shared_lock);</div><div class='del'>-</div><div class='del'>-	/* assert bus level PHY GPIO reset */</div><div class='del'>-	gpiod = devm_gpiod_get_optional(&amp;bus-&gt;dev, "reset", GPIOD_OUT_HIGH);</div><div class='del'>-	if (IS_ERR(gpiod)) {</div><div class='del'>-		err = dev_err_probe(&amp;bus-&gt;dev, PTR_ERR(gpiod),</div><div class='del'>-				    "mii_bus %s couldn't get reset GPIO\n",</div><div class='del'>-				    bus-&gt;id);</div><div class='del'>-		device_del(&amp;bus-&gt;dev);</div><div class='del'>-		return err;</div><div class='del'>-	} else	if (gpiod) {</div><div class='del'>-		bus-&gt;reset_gpiod = gpiod;</div><div class='del'>-		fsleep(bus-&gt;reset_delay_us);</div><div class='del'>-		gpiod_set_value_cansleep(gpiod, 0);</div><div class='del'>-		if (bus-&gt;reset_post_delay_us &gt; 0)</div><div class='del'>-			fsleep(bus-&gt;reset_post_delay_us);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (bus-&gt;reset) {</div><div class='del'>-		err = bus-&gt;reset(bus);</div><div class='del'>-		if (err)</div><div class='del'>-			goto error_reset_gpiod;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (bus-&gt;read) {</div><div class='del'>-		err = mdiobus_scan_bus_c22(bus);</div><div class='del'>-		if (err)</div><div class='del'>-			goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	prevent_c45_scan = mdiobus_prevent_c45_scan(bus);</div><div class='del'>-</div><div class='del'>-	if (!prevent_c45_scan &amp;&amp; bus-&gt;read_c45) {</div><div class='del'>-		err = mdiobus_scan_bus_c45(bus);</div><div class='del'>-		if (err)</div><div class='del'>-			goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mdiobus_setup_mdiodev_from_board_info(bus, mdiobus_create_device);</div><div class='del'>-</div><div class='del'>-	bus-&gt;state = MDIOBUS_REGISTERED;</div><div class='del'>-	dev_dbg(&amp;bus-&gt;dev, "probed\n");</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='del'>-		mdiodev = bus-&gt;mdio_map[i];</div><div class='del'>-		if (!mdiodev)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		mdiodev-&gt;device_remove(mdiodev);</div><div class='del'>-		mdiodev-&gt;device_free(mdiodev);</div><div class='del'>-	}</div><div class='del'>-error_reset_gpiod:</div><div class='del'>-	/* Put PHYs in RESET to save power */</div><div class='del'>-	if (bus-&gt;reset_gpiod)</div><div class='del'>-		gpiod_set_value_cansleep(bus-&gt;reset_gpiod, 1);</div><div class='del'>-</div><div class='del'>-	device_del(&amp;bus-&gt;dev);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__mdiobus_register);</div><div class='del'>-</div><div class='del'>-void mdiobus_unregister(struct mii_bus *bus)</div><div class='del'>-{</div><div class='del'>-	struct mdio_device *mdiodev;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (WARN_ON_ONCE(bus-&gt;state != MDIOBUS_REGISTERED))</div><div class='del'>-		return;</div><div class='del'>-	bus-&gt;state = MDIOBUS_UNREGISTERED;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='del'>-		mdiodev = bus-&gt;mdio_map[i];</div><div class='del'>-		if (!mdiodev)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		if (mdiodev-&gt;reset_gpio)</div><div class='del'>-			gpiod_put(mdiodev-&gt;reset_gpio);</div><div class='del'>-</div><div class='del'>-		mdiodev-&gt;device_remove(mdiodev);</div><div class='del'>-		mdiodev-&gt;device_free(mdiodev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Put PHYs in RESET to save power */</div><div class='del'>-	if (bus-&gt;reset_gpiod)</div><div class='del'>-		gpiod_set_value_cansleep(bus-&gt;reset_gpiod, 1);</div><div class='del'>-</div><div class='del'>-	device_del(&amp;bus-&gt;dev);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mdiobus_unregister);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * mdiobus_free - free a struct mii_bus</div><div class='del'>- * @bus: mii_bus to free</div><div class='del'>- *</div><div class='del'>- * This function releases the reference to the underlying device</div><div class='del'>- * object in the mii_bus.  If this is the last reference, the mii_bus</div><div class='del'>- * will be freed.</div><div class='del'>- */</div><div class='del'>-void mdiobus_free(struct mii_bus *bus)</div><div class='del'>-{</div><div class='del'>-	/* For compatibility with error handling in drivers. */</div><div class='del'>-	if (bus-&gt;state == MDIOBUS_ALLOCATED) {</div><div class='del'>-		kfree(bus);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	WARN(bus-&gt;state != MDIOBUS_UNREGISTERED,</div><div class='del'>-	     "%s: not in UNREGISTERED state\n", bus-&gt;id);</div><div class='del'>-	bus-&gt;state = MDIOBUS_RELEASED;</div><div class='del'>-</div><div class='del'>-	put_device(&amp;bus-&gt;dev);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(mdiobus_free);</div><div class='del'>-</div><div class='ctx'> static void mdiobus_stats_acct(struct mdio_bus_stats *stats, bool op, int ret)</div><div class='ctx'> {</div><div class='ctx'> 	preempt_disable();</div><div class='hunk'>@@ -879,6 +405,8 @@ out:</div><div class='ctx'>  * @addr: the phy address</div><div class='ctx'>  * @regnum: register number to read</div><div class='ctx'>  *</div><div class='add'>+ * Return: The register value if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * Read a MDIO bus register. Caller must hold the mdio bus lock.</div><div class='ctx'>  *</div><div class='ctx'>  * NOTE: MUST NOT be called from interrupt context.</div><div class='hunk'>@@ -889,6 +417,9 @@ int __mdiobus_read(struct mii_bus *bus, int addr, u32 regnum)</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held_once(&amp;bus-&gt;mdio_lock);</div><div class='ctx'> </div><div class='add'>+	if (addr &gt;= PHY_MAX_ADDR)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='ctx'> 	if (bus-&gt;read)</div><div class='ctx'> 		retval = bus-&gt;read(bus, addr, regnum);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -908,6 +439,8 @@ EXPORT_SYMBOL(__mdiobus_read);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @val: value to write to @regnum</div><div class='ctx'>  *</div><div class='add'>+ * Return: Zero if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * Write a MDIO bus register. Caller must hold the mdio bus lock.</div><div class='ctx'>  *</div><div class='ctx'>  * NOTE: MUST NOT be called from interrupt context.</div><div class='hunk'>@@ -918,6 +451,9 @@ int __mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val)</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held_once(&amp;bus-&gt;mdio_lock);</div><div class='ctx'> </div><div class='add'>+	if (addr &gt;= PHY_MAX_ADDR)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='ctx'> 	if (bus-&gt;write)</div><div class='ctx'> 		err = bus-&gt;write(bus, addr, regnum, val);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -938,8 +474,11 @@ EXPORT_SYMBOL(__mdiobus_write);</div><div class='ctx'>  * @mask: bit mask of bits to clear</div><div class='ctx'>  * @set: bit mask of bits to set</div><div class='ctx'>  *</div><div class='add'>+ * Return: 1 if the register was modified, 0 if no change was needed,</div><div class='add'>+ *	   negative on any error condition</div><div class='add'>+ *</div><div class='ctx'>  * Read, modify, and if any change, write the register value back to the</div><div class='del'>- * device. Any error returns a negative number.</div><div class='add'>+ * device.</div><div class='ctx'>  *</div><div class='ctx'>  * NOTE: MUST NOT be called from interrupt context.</div><div class='ctx'>  */</div><div class='hunk'>@@ -969,6 +508,8 @@ EXPORT_SYMBOL_GPL(__mdiobus_modify_changed);</div><div class='ctx'>  * @devad: device address to read</div><div class='ctx'>  * @regnum: register number to read</div><div class='ctx'>  *</div><div class='add'>+ * Return: The register value if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * Read a MDIO bus register. Caller must hold the mdio bus lock.</div><div class='ctx'>  *</div><div class='ctx'>  * NOTE: MUST NOT be called from interrupt context.</div><div class='hunk'>@@ -979,6 +520,9 @@ int __mdiobus_c45_read(struct mii_bus *bus, int addr, int devad, u32 regnum)</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held_once(&amp;bus-&gt;mdio_lock);</div><div class='ctx'> </div><div class='add'>+	if (addr &gt;= PHY_MAX_ADDR)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='ctx'> 	if (bus-&gt;read_c45)</div><div class='ctx'> 		retval = bus-&gt;read_c45(bus, addr, devad, regnum);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -999,6 +543,8 @@ EXPORT_SYMBOL(__mdiobus_c45_read);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @val: value to write to @regnum</div><div class='ctx'>  *</div><div class='add'>+ * Return: Zero if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * Write a MDIO bus register. Caller must hold the mdio bus lock.</div><div class='ctx'>  *</div><div class='ctx'>  * NOTE: MUST NOT be called from interrupt context.</div><div class='hunk'>@@ -1010,6 +556,9 @@ int __mdiobus_c45_write(struct mii_bus *bus, int addr, int devad, u32 regnum,</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held_once(&amp;bus-&gt;mdio_lock);</div><div class='ctx'> </div><div class='add'>+	if (addr &gt;= PHY_MAX_ADDR)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='ctx'> 	if (bus-&gt;write_c45)</div><div class='ctx'> 		err = bus-&gt;write_c45(bus, addr, devad, regnum, val);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1031,6 +580,9 @@ EXPORT_SYMBOL(__mdiobus_c45_write);</div><div class='ctx'>  * @mask: bit mask of bits to clear</div><div class='ctx'>  * @set: bit mask of bits to set</div><div class='ctx'>  *</div><div class='add'>+ * Return: 1 if the register was modified, 0 if no change was needed,</div><div class='add'>+ *	   negative on any error condition</div><div class='add'>+ *</div><div class='ctx'>  * Read, modify, and if any change, write the register value back to the</div><div class='ctx'>  * device. Any error returns a negative number.</div><div class='ctx'>  *</div><div class='hunk'>@@ -1061,6 +613,8 @@ static int __mdiobus_c45_modify_changed(struct mii_bus *bus, int addr,</div><div class='ctx'>  * @addr: the phy address</div><div class='ctx'>  * @regnum: register number to read</div><div class='ctx'>  *</div><div class='add'>+ * Return: The register value if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * In case of nested MDIO bus access avoid lockdep false positives by</div><div class='ctx'>  * using mutex_lock_nested().</div><div class='ctx'>  *</div><div class='hunk'>@@ -1086,6 +640,8 @@ EXPORT_SYMBOL(mdiobus_read_nested);</div><div class='ctx'>  * @addr: the phy address</div><div class='ctx'>  * @regnum: register number to read</div><div class='ctx'>  *</div><div class='add'>+ * Return: The register value if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * NOTE: MUST NOT be called from interrupt context,</div><div class='ctx'>  * because the bus read/write functions may wait for an interrupt</div><div class='ctx'>  * to conclude the operation.</div><div class='hunk'>@@ -1109,6 +665,8 @@ EXPORT_SYMBOL(mdiobus_read);</div><div class='ctx'>  * @devad: device address to read</div><div class='ctx'>  * @regnum: register number to read</div><div class='ctx'>  *</div><div class='add'>+ * Return: The register value if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * NOTE: MUST NOT be called from interrupt context,</div><div class='ctx'>  * because the bus read/write functions may wait for an interrupt</div><div class='ctx'>  * to conclude the operation.</div><div class='hunk'>@@ -1132,6 +690,8 @@ EXPORT_SYMBOL(mdiobus_c45_read);</div><div class='ctx'>  * @devad: device address to read</div><div class='ctx'>  * @regnum: register number to read</div><div class='ctx'>  *</div><div class='add'>+ * Return: The register value if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * In case of nested MDIO bus access avoid lockdep false positives by</div><div class='ctx'>  * using mutex_lock_nested().</div><div class='ctx'>  *</div><div class='hunk'>@@ -1159,6 +719,8 @@ EXPORT_SYMBOL(mdiobus_c45_read_nested);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @val: value to write to @regnum</div><div class='ctx'>  *</div><div class='add'>+ * Return: Zero if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * In case of nested MDIO bus access avoid lockdep false positives by</div><div class='ctx'>  * using mutex_lock_nested().</div><div class='ctx'>  *</div><div class='hunk'>@@ -1185,6 +747,8 @@ EXPORT_SYMBOL(mdiobus_write_nested);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @val: value to write to @regnum</div><div class='ctx'>  *</div><div class='add'>+ * Return: Zero if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * NOTE: MUST NOT be called from interrupt context,</div><div class='ctx'>  * because the bus read/write functions may wait for an interrupt</div><div class='ctx'>  * to conclude the operation.</div><div class='hunk'>@@ -1209,6 +773,8 @@ EXPORT_SYMBOL(mdiobus_write);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @val: value to write to @regnum</div><div class='ctx'>  *</div><div class='add'>+ * Return: Zero if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * NOTE: MUST NOT be called from interrupt context,</div><div class='ctx'>  * because the bus read/write functions may wait for an interrupt</div><div class='ctx'>  * to conclude the operation.</div><div class='hunk'>@@ -1234,6 +800,8 @@ EXPORT_SYMBOL(mdiobus_c45_write);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @val: value to write to @regnum</div><div class='ctx'>  *</div><div class='add'>+ * Return: Zero if successful, negative error code on failure</div><div class='add'>+ *</div><div class='ctx'>  * In case of nested MDIO bus access avoid lockdep false positives by</div><div class='ctx'>  * using mutex_lock_nested().</div><div class='ctx'>  *</div><div class='hunk'>@@ -1262,6 +830,8 @@ EXPORT_SYMBOL(mdiobus_c45_write_nested);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @mask: bit mask of bits to clear</div><div class='ctx'>  * @set: bit mask of bits to set</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative on any error condition</div><div class='ctx'>  */</div><div class='ctx'> int __mdiobus_modify(struct mii_bus *bus, int addr, u32 regnum, u16 mask,</div><div class='ctx'> 		     u16 set)</div><div class='hunk'>@@ -1282,6 +852,8 @@ EXPORT_SYMBOL_GPL(__mdiobus_modify);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @mask: bit mask of bits to clear</div><div class='ctx'>  * @set: bit mask of bits to set</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative on any error condition</div><div class='ctx'>  */</div><div class='ctx'> int mdiobus_modify(struct mii_bus *bus, int addr, u32 regnum, u16 mask, u16 set)</div><div class='ctx'> {</div><div class='hunk'>@@ -1304,6 +876,8 @@ EXPORT_SYMBOL_GPL(mdiobus_modify);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @mask: bit mask of bits to clear</div><div class='ctx'>  * @set: bit mask of bits to set</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative on any error condition</div><div class='ctx'>  */</div><div class='ctx'> int mdiobus_c45_modify(struct mii_bus *bus, int addr, int devad, u32 regnum,</div><div class='ctx'> 		       u16 mask, u16 set)</div><div class='hunk'>@@ -1327,6 +901,9 @@ EXPORT_SYMBOL_GPL(mdiobus_c45_modify);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @mask: bit mask of bits to clear</div><div class='ctx'>  * @set: bit mask of bits to set</div><div class='add'>+ *</div><div class='add'>+ * Return: 1 if the register was modified, 0 if no change was needed,</div><div class='add'>+ *	   negative on any error condition</div><div class='ctx'>  */</div><div class='ctx'> int mdiobus_modify_changed(struct mii_bus *bus, int addr, u32 regnum,</div><div class='ctx'> 			   u16 mask, u16 set)</div><div class='hunk'>@@ -1350,6 +927,9 @@ EXPORT_SYMBOL_GPL(mdiobus_modify_changed);</div><div class='ctx'>  * @regnum: register number to write</div><div class='ctx'>  * @mask: bit mask of bits to clear</div><div class='ctx'>  * @set: bit mask of bits to set</div><div class='add'>+ *</div><div class='add'>+ * Return: 1 if the register was modified, 0 if no change was needed,</div><div class='add'>+ *	   negative on any error condition</div><div class='ctx'>  */</div><div class='ctx'> int mdiobus_c45_modify_changed(struct mii_bus *bus, int addr, int devad,</div><div class='ctx'> 			       u32 regnum, u16 mask, u16 set)</div><div class='hunk'>@@ -1370,10 +950,10 @@ EXPORT_SYMBOL_GPL(mdiobus_c45_modify_changed);</div><div class='ctx'>  * @dev: target MDIO device</div><div class='ctx'>  * @drv: given MDIO driver</div><div class='ctx'>  *</div><div class='del'>- * Description: Given a MDIO device, and a MDIO driver, return 1 if</div><div class='del'>- *   the driver supports the device.  Otherwise, return 0. This may</div><div class='del'>- *   require calling the devices own match function, since different classes</div><div class='del'>- *   of MDIO devices have different match criteria.</div><div class='add'>+ * Return: 1 if the driver supports the device, 0 otherwise</div><div class='add'>+ *</div><div class='add'>+ * Description: This may require calling the devices own match function,</div><div class='add'>+ *   since different classes of MDIO devices have different match criteria.</div><div class='ctx'>  */</div><div class='ctx'> static int mdio_bus_match(struct device *dev, const struct device_driver *drv)</div><div class='ctx'> {</div><div class='hunk'>@@ -1432,7 +1012,7 @@ const struct bus_type mdio_bus_type = {</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL(mdio_bus_type);</div><div class='ctx'> </div><div class='del'>-int __init mdio_bus_init(void)</div><div class='add'>+static int __init mdio_bus_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1446,16 +1026,14 @@ int __init mdio_bus_init(void)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if IS_ENABLED(CONFIG_PHYLIB)</div><div class='del'>-void mdio_bus_exit(void)</div><div class='add'>+static void __exit mdio_bus_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	class_unregister(&amp;mdio_bus_class);</div><div class='ctx'> 	bus_unregister(&amp;mdio_bus_type);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(mdio_bus_exit);</div><div class='del'>-#else</div><div class='del'>-module_init(mdio_bus_init);</div><div class='del'>-/* no module_exit, intentional */</div><div class='add'>+</div><div class='add'>+subsys_initcall(mdio_bus_init);</div><div class='add'>+module_exit(mdio_bus_exit);</div><div class='add'>+</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("MDIO bus/device layer");</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/phy/mdio_bus_provider.c b/drivers/net/phy/mdio_bus_provider.c<br/>new file mode 100644<br/>index 000000000000..4b0637405740<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mdio_bus_provider.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mdio_bus_provider.c</a></div><div class='hunk'>@@ -0,0 +1,442 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/* MDIO Bus provider interface</div><div class='add'>+ *</div><div class='add'>+ * Author: Andy Fleming</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2004 Freescale Semiconductor, Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/micrel_phy.h&gt;</div><div class='add'>+#include &lt;linux/mii.h&gt;</div><div class='add'>+#include &lt;linux/mm.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/unistd.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mdiobus_alloc_size - allocate a mii_bus structure</div><div class='add'>+ * @size: extra amount of memory to allocate for private storage.</div><div class='add'>+ * If non-zero, then bus-&gt;priv is points to that memory.</div><div class='add'>+ *</div><div class='add'>+ * Description: called by a bus driver to allocate an mii_bus</div><div class='add'>+ * structure to fill in.</div><div class='add'>+ */</div><div class='add'>+struct mii_bus *mdiobus_alloc_size(size_t size)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	size_t aligned_size = ALIGN(sizeof(*bus), NETDEV_ALIGN);</div><div class='add'>+	size_t alloc_size;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* If we alloc extra space, it should be aligned */</div><div class='add'>+	if (size)</div><div class='add'>+		alloc_size = aligned_size + size;</div><div class='add'>+	else</div><div class='add'>+		alloc_size = sizeof(*bus);</div><div class='add'>+</div><div class='add'>+	bus = kzalloc(alloc_size, GFP_KERNEL);</div><div class='add'>+	if (!bus)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	bus-&gt;state = MDIOBUS_ALLOCATED;</div><div class='add'>+	if (size)</div><div class='add'>+		bus-&gt;priv = (void *)bus + aligned_size;</div><div class='add'>+</div><div class='add'>+	/* Initialise the interrupts to polling and 64-bit seqcounts */</div><div class='add'>+	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='add'>+		bus-&gt;irq[i] = PHY_POLL;</div><div class='add'>+		u64_stats_init(&amp;bus-&gt;stats[i].syncp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return bus;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mdiobus_alloc_size);</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_OF_MDIO)</div><div class='add'>+/* Walk the list of subnodes of a mdio bus and look for a node that</div><div class='add'>+ * matches the mdio device's address with its 'reg' property. If</div><div class='add'>+ * found, set the of_node pointer for the mdio device. This allows</div><div class='add'>+ * auto-probed phy devices to be supplied with information passed in</div><div class='add'>+ * via DT.</div><div class='add'>+ * If a PHY package is found, PHY is searched also there.</div><div class='add'>+ */</div><div class='add'>+static int of_mdiobus_find_phy(struct device *dev, struct mdio_device *mdiodev,</div><div class='add'>+			       struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	struct device_node *child;</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node(np, child) {</div><div class='add'>+		int addr;</div><div class='add'>+</div><div class='add'>+		if (of_node_name_eq(child, "ethernet-phy-package")) {</div><div class='add'>+			/* Validate PHY package reg presence */</div><div class='add'>+			if (!of_property_present(child, "reg")) {</div><div class='add'>+				of_node_put(child);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (!of_mdiobus_find_phy(dev, mdiodev, child)) {</div><div class='add'>+				/* The refcount for the PHY package will be</div><div class='add'>+				 * incremented later when PHY join the Package.</div><div class='add'>+				 */</div><div class='add'>+				of_node_put(child);</div><div class='add'>+				return 0;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		addr = of_mdio_parse_addr(dev, child);</div><div class='add'>+		if (addr &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (addr == mdiodev-&gt;addr) {</div><div class='add'>+			device_set_node(dev, of_fwnode_handle(child));</div><div class='add'>+			/* The refcount on "child" is passed to the mdio</div><div class='add'>+			 * device. Do _not_ use of_node_put(child) here.</div><div class='add'>+			 */</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void of_mdiobus_link_mdiodev(struct mii_bus *bus,</div><div class='add'>+				    struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;of_node || !bus-&gt;dev.of_node)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	of_mdiobus_find_phy(dev, mdiodev, bus-&gt;dev.of_node);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr, bool c45)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = ERR_PTR(-ENODEV);</div><div class='add'>+	struct fwnode_handle *fwnode;</div><div class='add'>+	char node_name[16];</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	phydev = get_phy_device(bus, addr, c45);</div><div class='add'>+	if (IS_ERR(phydev))</div><div class='add'>+		return phydev;</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_OF_MDIO)</div><div class='add'>+	/* For DT, see if the auto-probed phy has a corresponding child</div><div class='add'>+	 * in the bus node, and set the of_node pointer in this case.</div><div class='add'>+	 */</div><div class='add'>+	of_mdiobus_link_mdiodev(bus, &amp;phydev-&gt;mdio);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* Search for a swnode for the phy in the swnode hierarchy of the bus.</div><div class='add'>+	 * If there is no swnode for the phy provided, just ignore it.</div><div class='add'>+	 */</div><div class='add'>+	if (dev_fwnode(&amp;bus-&gt;dev) &amp;&amp; !dev_fwnode(&amp;phydev-&gt;mdio.dev)) {</div><div class='add'>+		snprintf(node_name, sizeof(node_name), "ethernet-phy@%d",</div><div class='add'>+			 addr);</div><div class='add'>+		fwnode = fwnode_get_named_child_node(dev_fwnode(&amp;bus-&gt;dev),</div><div class='add'>+						     node_name);</div><div class='add'>+		if (fwnode)</div><div class='add'>+			device_set_node(&amp;phydev-&gt;mdio.dev, fwnode);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = phy_device_register(phydev);</div><div class='add'>+	if (err) {</div><div class='add'>+		phy_device_free(phydev);</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return phydev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mdiobus_scan_c22 - scan one address on a bus for C22 MDIO devices.</div><div class='add'>+ * @bus: mii_bus to scan</div><div class='add'>+ * @addr: address on bus to scan</div><div class='add'>+ *</div><div class='add'>+ * This function scans one address on the MDIO bus, looking for</div><div class='add'>+ * devices which can be identified using a vendor/product ID in</div><div class='add'>+ * registers 2 and 3. Not all MDIO devices have such registers, but</div><div class='add'>+ * PHY devices typically do. Hence this function assumes anything</div><div class='add'>+ * found is a PHY, or can be treated as a PHY. Other MDIO devices,</div><div class='add'>+ * such as switches, will probably not be found during the scan.</div><div class='add'>+ */</div><div class='add'>+struct phy_device *mdiobus_scan_c22(struct mii_bus *bus, int addr)</div><div class='add'>+{</div><div class='add'>+	return mdiobus_scan(bus, addr, false);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mdiobus_scan_c22);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mdiobus_scan_c45 - scan one address on a bus for C45 MDIO devices.</div><div class='add'>+ * @bus: mii_bus to scan</div><div class='add'>+ * @addr: address on bus to scan</div><div class='add'>+ *</div><div class='add'>+ * This function scans one address on the MDIO bus, looking for</div><div class='add'>+ * devices which can be identified using a vendor/product ID in</div><div class='add'>+ * registers 2 and 3. Not all MDIO devices have such registers, but</div><div class='add'>+ * PHY devices typically do. Hence this function assumes anything</div><div class='add'>+ * found is a PHY, or can be treated as a PHY. Other MDIO devices,</div><div class='add'>+ * such as switches, will probably not be found during the scan.</div><div class='add'>+ */</div><div class='add'>+static struct phy_device *mdiobus_scan_c45(struct mii_bus *bus, int addr)</div><div class='add'>+{</div><div class='add'>+	return mdiobus_scan(bus, addr, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mdiobus_scan_bus_c22(struct mii_bus *bus)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='add'>+		if ((bus-&gt;phy_mask &amp; BIT(i)) == 0) {</div><div class='add'>+			struct phy_device *phydev;</div><div class='add'>+</div><div class='add'>+			phydev = mdiobus_scan_c22(bus, i);</div><div class='add'>+			if (IS_ERR(phydev) &amp;&amp; (PTR_ERR(phydev) != -ENODEV))</div><div class='add'>+				return PTR_ERR(phydev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mdiobus_scan_bus_c45(struct mii_bus *bus)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='add'>+		if ((bus-&gt;phy_mask &amp; BIT(i)) == 0) {</div><div class='add'>+			struct phy_device *phydev;</div><div class='add'>+</div><div class='add'>+			/* Don't scan C45 if we already have a C22 device */</div><div class='add'>+			if (bus-&gt;mdio_map[i])</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			phydev = mdiobus_scan_c45(bus, i);</div><div class='add'>+			if (IS_ERR(phydev) &amp;&amp; (PTR_ERR(phydev) != -ENODEV))</div><div class='add'>+				return PTR_ERR(phydev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* There are some C22 PHYs which do bad things when where is a C45</div><div class='add'>+ * transaction on the bus, like accepting a read themselves, and</div><div class='add'>+ * stomping over the true devices reply, to performing a write to</div><div class='add'>+ * themselves which was intended for another device. Now that C22</div><div class='add'>+ * devices have been found, see if any of them are bad for C45, and if we</div><div class='add'>+ * should skip the C45 scan.</div><div class='add'>+ */</div><div class='add'>+static bool mdiobus_prevent_c45_scan(struct mii_bus *bus)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+</div><div class='add'>+	mdiobus_for_each_phy(bus, phydev) {</div><div class='add'>+		u32 oui = phydev-&gt;phy_id &gt;&gt; 10;</div><div class='add'>+</div><div class='add'>+		if (oui == MICREL_OUI)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __mdiobus_register - bring up all the PHYs on a given bus and attach them to bus</div><div class='add'>+ * @bus: target mii_bus</div><div class='add'>+ * @owner: module containing bus accessor functions</div><div class='add'>+ *</div><div class='add'>+ * Description: Called by a bus driver to bring up all the PHYs</div><div class='add'>+ *   on a given bus, and attach them to the bus. Drivers should use</div><div class='add'>+ *   mdiobus_register() rather than __mdiobus_register() unless they</div><div class='add'>+ *   need to pass a specific owner module. MDIO devices which are not</div><div class='add'>+ *   PHYs will not be brought up by this function. They are expected</div><div class='add'>+ *   to be explicitly listed in DT and instantiated by of_mdiobus_register().</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 on success or &lt; 0 on error.</div><div class='add'>+ */</div><div class='add'>+int __mdiobus_register(struct mii_bus *bus, struct module *owner)</div><div class='add'>+{</div><div class='add'>+	struct mdio_device *mdiodev;</div><div class='add'>+	struct gpio_desc *gpiod;</div><div class='add'>+	bool prevent_c45_scan;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	if (!bus || !bus-&gt;name)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* An access method always needs both read and write operations */</div><div class='add'>+	if (!!bus-&gt;read != !!bus-&gt;write || !!bus-&gt;read_c45 != !!bus-&gt;write_c45)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* At least one method is mandatory */</div><div class='add'>+	if (!bus-&gt;read &amp;&amp; !bus-&gt;read_c45)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (bus-&gt;parent &amp;&amp; bus-&gt;parent-&gt;of_node)</div><div class='add'>+		bus-&gt;parent-&gt;of_node-&gt;fwnode.flags |=</div><div class='add'>+					FWNODE_FLAG_NEEDS_CHILD_BOUND_ON_ADD;</div><div class='add'>+</div><div class='add'>+	WARN(bus-&gt;state != MDIOBUS_ALLOCATED &amp;&amp;</div><div class='add'>+	     bus-&gt;state != MDIOBUS_UNREGISTERED,</div><div class='add'>+	     "%s: not in ALLOCATED or UNREGISTERED state\n", bus-&gt;id);</div><div class='add'>+</div><div class='add'>+	bus-&gt;owner = owner;</div><div class='add'>+	bus-&gt;dev.parent = bus-&gt;parent;</div><div class='add'>+	bus-&gt;dev.class = &amp;mdio_bus_class;</div><div class='add'>+	bus-&gt;dev.groups = NULL;</div><div class='add'>+	dev_set_name(&amp;bus-&gt;dev, "%s", bus-&gt;id);</div><div class='add'>+</div><div class='add'>+	/* If the bus state is allocated, we're registering a fresh bus</div><div class='add'>+	 * that may have a fwnode associated with it. Grab a reference</div><div class='add'>+	 * to the fwnode. This will be dropped when the bus is released.</div><div class='add'>+	 * If the bus was set to unregistered, it means that the bus was</div><div class='add'>+	 * previously registered, and we've already grabbed a reference.</div><div class='add'>+	 */</div><div class='add'>+	if (bus-&gt;state == MDIOBUS_ALLOCATED)</div><div class='add'>+		fwnode_handle_get(dev_fwnode(&amp;bus-&gt;dev));</div><div class='add'>+</div><div class='add'>+	/* We need to set state to MDIOBUS_UNREGISTERED to correctly release</div><div class='add'>+	 * the device in mdiobus_free()</div><div class='add'>+	 *</div><div class='add'>+	 * State will be updated later in this function in case of success</div><div class='add'>+	 */</div><div class='add'>+	bus-&gt;state = MDIOBUS_UNREGISTERED;</div><div class='add'>+</div><div class='add'>+	err = device_register(&amp;bus-&gt;dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		pr_err("mii_bus %s failed to register\n", bus-&gt;id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;bus-&gt;mdio_lock);</div><div class='add'>+	mutex_init(&amp;bus-&gt;shared_lock);</div><div class='add'>+</div><div class='add'>+	/* assert bus level PHY GPIO reset */</div><div class='add'>+	gpiod = devm_gpiod_get_optional(&amp;bus-&gt;dev, "reset", GPIOD_OUT_HIGH);</div><div class='add'>+	if (IS_ERR(gpiod)) {</div><div class='add'>+		err = dev_err_probe(&amp;bus-&gt;dev, PTR_ERR(gpiod),</div><div class='add'>+				    "mii_bus %s couldn't get reset GPIO\n",</div><div class='add'>+				    bus-&gt;id);</div><div class='add'>+		device_del(&amp;bus-&gt;dev);</div><div class='add'>+		return err;</div><div class='add'>+	} else	if (gpiod) {</div><div class='add'>+		bus-&gt;reset_gpiod = gpiod;</div><div class='add'>+		fsleep(bus-&gt;reset_delay_us);</div><div class='add'>+		gpiod_set_value_cansleep(gpiod, 0);</div><div class='add'>+		if (bus-&gt;reset_post_delay_us &gt; 0)</div><div class='add'>+			fsleep(bus-&gt;reset_post_delay_us);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bus-&gt;reset) {</div><div class='add'>+		err = bus-&gt;reset(bus);</div><div class='add'>+		if (err)</div><div class='add'>+			goto error_reset_gpiod;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bus-&gt;read) {</div><div class='add'>+		err = mdiobus_scan_bus_c22(bus);</div><div class='add'>+		if (err)</div><div class='add'>+			goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prevent_c45_scan = mdiobus_prevent_c45_scan(bus);</div><div class='add'>+</div><div class='add'>+	if (!prevent_c45_scan &amp;&amp; bus-&gt;read_c45) {</div><div class='add'>+		err = mdiobus_scan_bus_c45(bus);</div><div class='add'>+		if (err)</div><div class='add'>+			goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus-&gt;state = MDIOBUS_REGISTERED;</div><div class='add'>+	dev_dbg(&amp;bus-&gt;dev, "probed\n");</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='add'>+		mdiodev = bus-&gt;mdio_map[i];</div><div class='add'>+		if (!mdiodev)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mdiodev-&gt;device_remove(mdiodev);</div><div class='add'>+		mdiodev-&gt;device_free(mdiodev);</div><div class='add'>+	}</div><div class='add'>+error_reset_gpiod:</div><div class='add'>+	/* Put PHYs in RESET to save power */</div><div class='add'>+	if (bus-&gt;reset_gpiod)</div><div class='add'>+		gpiod_set_value_cansleep(bus-&gt;reset_gpiod, 1);</div><div class='add'>+</div><div class='add'>+	device_del(&amp;bus-&gt;dev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__mdiobus_register);</div><div class='add'>+</div><div class='add'>+void mdiobus_unregister(struct mii_bus *bus)</div><div class='add'>+{</div><div class='add'>+	struct mdio_device *mdiodev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(bus-&gt;state != MDIOBUS_REGISTERED))</div><div class='add'>+		return;</div><div class='add'>+	bus-&gt;state = MDIOBUS_UNREGISTERED;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PHY_MAX_ADDR; i++) {</div><div class='add'>+		mdiodev = bus-&gt;mdio_map[i];</div><div class='add'>+		if (!mdiodev)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mdiodev-&gt;device_remove(mdiodev);</div><div class='add'>+		mdiodev-&gt;device_free(mdiodev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Put PHYs in RESET to save power */</div><div class='add'>+	if (bus-&gt;reset_gpiod)</div><div class='add'>+		gpiod_set_value_cansleep(bus-&gt;reset_gpiod, 1);</div><div class='add'>+</div><div class='add'>+	device_del(&amp;bus-&gt;dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mdiobus_unregister);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mdiobus_free - free a struct mii_bus</div><div class='add'>+ * @bus: mii_bus to free</div><div class='add'>+ *</div><div class='add'>+ * This function releases the reference to the underlying device</div><div class='add'>+ * object in the mii_bus.  If this is the last reference, the mii_bus</div><div class='add'>+ * will be freed.</div><div class='add'>+ */</div><div class='add'>+void mdiobus_free(struct mii_bus *bus)</div><div class='add'>+{</div><div class='add'>+	/* For compatibility with error handling in drivers. */</div><div class='add'>+	if (bus-&gt;state == MDIOBUS_ALLOCATED) {</div><div class='add'>+		kfree(bus);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WARN(bus-&gt;state != MDIOBUS_UNREGISTERED,</div><div class='add'>+	     "%s: not in UNREGISTERED state\n", bus-&gt;id);</div><div class='add'>+	bus-&gt;state = MDIOBUS_RELEASED;</div><div class='add'>+</div><div class='add'>+	put_device(&amp;bus-&gt;dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(mdiobus_free);</div><div class='head'>diff --git a/drivers/net/phy/mdio_device.c b/drivers/net/phy/mdio_device.c<br/>index e747ee63c665..6e90ed42cd98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mdio_device.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mdio_device.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mdio_device.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mdio_device.c</a></div><div class='hunk'>@@ -22,6 +22,7 @@</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/unistd.h&gt;</div><div class='ctx'> #include &lt;linux/property.h&gt;</div><div class='add'>+#include "mdio-private.h"</div><div class='ctx'> </div><div class='ctx'> void mdio_device_free(struct mdio_device *mdiodev)</div><div class='ctx'> {</div><div class='hunk'>@@ -35,7 +36,8 @@ static void mdio_device_release(struct device *dev)</div><div class='ctx'> 	kfree(to_mdio_device(dev));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int mdio_device_bus_match(struct device *dev, const struct device_driver *drv)</div><div class='add'>+static int mdio_device_bus_match(struct device *dev,</div><div class='add'>+				 const struct device_driver *drv)</div><div class='ctx'> {</div><div class='ctx'> 	struct mdio_device *mdiodev = to_mdio_device(dev);</div><div class='ctx'> 	const struct mdio_driver *mdiodrv = to_mdio_driver(drv);</div><div class='hunk'>@@ -58,6 +60,7 @@ struct mdio_device *mdio_device_create(struct mii_bus *bus, int addr)</div><div class='ctx'> 	mdiodev-&gt;dev.release = mdio_device_release;</div><div class='ctx'> 	mdiodev-&gt;dev.parent = &amp;bus-&gt;dev;</div><div class='ctx'> 	mdiodev-&gt;dev.bus = &amp;mdio_bus_type;</div><div class='add'>+	mdiodev-&gt;bus_match = mdio_device_bus_match;</div><div class='ctx'> 	mdiodev-&gt;device_free = mdio_device_free;</div><div class='ctx'> 	mdiodev-&gt;device_remove = mdio_device_remove;</div><div class='ctx'> 	mdiodev-&gt;bus = bus;</div><div class='hunk'>@@ -75,6 +78,8 @@ EXPORT_SYMBOL(mdio_device_create);</div><div class='ctx'> /**</div><div class='ctx'>  * mdio_device_register - Register the mdio device on the MDIO bus</div><div class='ctx'>  * @mdiodev: mdio_device structure to be added to the MDIO bus</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero if successful, negative error code on failure</div><div class='ctx'>  */</div><div class='ctx'> int mdio_device_register(struct mdio_device *mdiodev)</div><div class='ctx'> {</div><div class='hunk'>@@ -116,6 +121,59 @@ void mdio_device_remove(struct mdio_device *mdiodev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(mdio_device_remove);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * mdio_device_register_reset - Read and initialize the reset properties of</div><div class='add'>+ *				an mdio device</div><div class='add'>+ * @mdiodev: mdio_device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero if successful, negative error code on failure</div><div class='add'>+ */</div><div class='add'>+int mdio_device_register_reset(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct reset_control *reset;</div><div class='add'>+</div><div class='add'>+	/* Deassert the optional reset signal */</div><div class='add'>+	mdiodev-&gt;reset_gpio = gpiod_get_optional(&amp;mdiodev-&gt;dev,</div><div class='add'>+						 "reset", GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(mdiodev-&gt;reset_gpio))</div><div class='add'>+		return PTR_ERR(mdiodev-&gt;reset_gpio);</div><div class='add'>+</div><div class='add'>+	if (mdiodev-&gt;reset_gpio)</div><div class='add'>+		gpiod_set_consumer_name(mdiodev-&gt;reset_gpio, "PHY reset");</div><div class='add'>+</div><div class='add'>+	reset = reset_control_get_optional_exclusive(&amp;mdiodev-&gt;dev, "phy");</div><div class='add'>+	if (IS_ERR(reset)) {</div><div class='add'>+		gpiod_put(mdiodev-&gt;reset_gpio);</div><div class='add'>+		mdiodev-&gt;reset_gpio = NULL;</div><div class='add'>+		return PTR_ERR(reset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mdiodev-&gt;reset_ctrl = reset;</div><div class='add'>+</div><div class='add'>+	/* Read optional firmware properties */</div><div class='add'>+	device_property_read_u32(&amp;mdiodev-&gt;dev, "reset-assert-us",</div><div class='add'>+				 &amp;mdiodev-&gt;reset_assert_delay);</div><div class='add'>+	device_property_read_u32(&amp;mdiodev-&gt;dev, "reset-deassert-us",</div><div class='add'>+				 &amp;mdiodev-&gt;reset_deassert_delay);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mdio_device_unregister_reset - uninitialize the reset properties of</div><div class='add'>+ *				  an mdio device</div><div class='add'>+ * @mdiodev: mdio_device structure</div><div class='add'>+ */</div><div class='add'>+void mdio_device_unregister_reset(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	gpiod_put(mdiodev-&gt;reset_gpio);</div><div class='add'>+	mdiodev-&gt;reset_gpio = NULL;</div><div class='add'>+	reset_control_put(mdiodev-&gt;reset_ctrl);</div><div class='add'>+	mdiodev-&gt;reset_ctrl = NULL;</div><div class='add'>+	mdiodev-&gt;reset_assert_delay = 0;</div><div class='add'>+	mdiodev-&gt;reset_deassert_delay = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void mdio_device_reset(struct mdio_device *mdiodev, int value)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int d;</div><div class='hunk'>@@ -150,6 +208,8 @@ EXPORT_SYMBOL(mdio_device_reset);</div><div class='ctx'>  *</div><div class='ctx'>  * Description: Take care of setting up the mdio_device structure</div><div class='ctx'>  * and calling the driver to probe the device.</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero if successful, negative error code on failure</div><div class='ctx'>  */</div><div class='ctx'> static int mdio_probe(struct device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -200,6 +260,8 @@ static void mdio_shutdown(struct device *dev)</div><div class='ctx'> /**</div><div class='ctx'>  * mdio_driver_register - register an mdio_driver with the MDIO layer</div><div class='ctx'>  * @drv: new mdio_driver to register</div><div class='add'>+ *</div><div class='add'>+ * Return: Zero if successful, negative error code on failure</div><div class='ctx'>  */</div><div class='ctx'> int mdio_driver_register(struct mdio_driver *drv)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/phy/mediatek-ge.c b/drivers/net/phy/mediatek-ge.c<br/>deleted file mode 100644<br/>index 54ea64a37ab3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mediatek-ge.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mediatek-ge.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,111 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0+</div><div class='del'>-#include &lt;linux/bitfield.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-</div><div class='del'>-#define MTK_EXT_PAGE_ACCESS		0x1f</div><div class='del'>-#define MTK_PHY_PAGE_STANDARD		0x0000</div><div class='del'>-#define MTK_PHY_PAGE_EXTENDED		0x0001</div><div class='del'>-#define MTK_PHY_PAGE_EXTENDED_2		0x0002</div><div class='del'>-#define MTK_PHY_PAGE_EXTENDED_3		0x0003</div><div class='del'>-#define MTK_PHY_PAGE_EXTENDED_2A30	0x2a30</div><div class='del'>-#define MTK_PHY_PAGE_EXTENDED_52B5	0x52b5</div><div class='del'>-</div><div class='del'>-static int mtk_gephy_read_page(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mtk_gephy_write_page(struct phy_device *phydev, int page)</div><div class='del'>-{</div><div class='del'>-	return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mtk_gephy_config_init(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	/* Enable HW auto downshift */</div><div class='del'>-	phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED, 0x14, 0, BIT(4));</div><div class='del'>-</div><div class='del'>-	/* Increase SlvDPSready time */</div><div class='del'>-	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);</div><div class='del'>-	__phy_write(phydev, 0x10, 0xafae);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x2f);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x8fae);</div><div class='del'>-	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);</div><div class='del'>-</div><div class='del'>-	/* Adjust 100_mse_threshold */</div><div class='del'>-	phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x123, 0xffff);</div><div class='del'>-</div><div class='del'>-	/* Disable mcc */</div><div class='del'>-	phy_write_mmd(phydev, MDIO_MMD_VEND1, 0xa6, 0x300);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mt7530_phy_config_init(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	mtk_gephy_config_init(phydev);</div><div class='del'>-</div><div class='del'>-	/* Increase post_update_timer */</div><div class='del'>-	phy_write_paged(phydev, MTK_PHY_PAGE_EXTENDED_3, 0x11, 0x4b);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mt7531_phy_config_init(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	mtk_gephy_config_init(phydev);</div><div class='del'>-</div><div class='del'>-	/* PHY link down power saving enable */</div><div class='del'>-	phy_set_bits(phydev, 0x17, BIT(4));</div><div class='del'>-	phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, 0xc6, 0x300);</div><div class='del'>-</div><div class='del'>-	/* Set TX Pair delay selection */</div><div class='del'>-	phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x13, 0x404);</div><div class='del'>-	phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x14, 0x404);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct phy_driver mtk_gephy_driver[] = {</div><div class='del'>-	{</div><div class='del'>-		PHY_ID_MATCH_EXACT(0x03a29412),</div><div class='del'>-		.name		= "MediaTek MT7530 PHY",</div><div class='del'>-		.config_init	= mt7530_phy_config_init,</div><div class='del'>-		/* Interrupts are handled by the switch, not the PHY</div><div class='del'>-		 * itself.</div><div class='del'>-		 */</div><div class='del'>-		.config_intr	= genphy_no_config_intr,</div><div class='del'>-		.handle_interrupt = genphy_handle_interrupt_no_ack,</div><div class='del'>-		.suspend	= genphy_suspend,</div><div class='del'>-		.resume		= genphy_resume,</div><div class='del'>-		.read_page	= mtk_gephy_read_page,</div><div class='del'>-		.write_page	= mtk_gephy_write_page,</div><div class='del'>-	},</div><div class='del'>-	{</div><div class='del'>-		PHY_ID_MATCH_EXACT(0x03a29441),</div><div class='del'>-		.name		= "MediaTek MT7531 PHY",</div><div class='del'>-		.config_init	= mt7531_phy_config_init,</div><div class='del'>-		/* Interrupts are handled by the switch, not the PHY</div><div class='del'>-		 * itself.</div><div class='del'>-		 */</div><div class='del'>-		.config_intr	= genphy_no_config_intr,</div><div class='del'>-		.handle_interrupt = genphy_handle_interrupt_no_ack,</div><div class='del'>-		.suspend	= genphy_suspend,</div><div class='del'>-		.resume		= genphy_resume,</div><div class='del'>-		.read_page	= mtk_gephy_read_page,</div><div class='del'>-		.write_page	= mtk_gephy_write_page,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_phy_driver(mtk_gephy_driver);</div><div class='del'>-</div><div class='del'>-static struct mdio_device_id __maybe_unused mtk_gephy_tbl[] = {</div><div class='del'>-	{ PHY_ID_MATCH_EXACT(0x03a29441) },</div><div class='del'>-	{ PHY_ID_MATCH_EXACT(0x03a29412) },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("MediaTek Gigabit Ethernet PHY driver");</div><div class='del'>-MODULE_AUTHOR("DENG, Qingfang &lt;dqfext@gmail.com&gt;");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-MODULE_DEVICE_TABLE(mdio, mtk_gephy_tbl);</div><div class='head'>diff --git a/drivers/net/phy/mediatek/Kconfig b/drivers/net/phy/mediatek/Kconfig<br/>new file mode 100644<br/>index 000000000000..bb7dc876271e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mediatek/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mediatek/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config MEDIATEK_2P5GE_PHY</div><div class='add'>+	tristate "MediaTek 2.5Gb Ethernet PHYs"</div><div class='add'>+	depends on (ARM64 &amp;&amp; ARCH_MEDIATEK) || COMPILE_TEST</div><div class='add'>+	select MTK_NET_PHYLIB</div><div class='add'>+	help</div><div class='add'>+	  Supports MediaTek SoC built-in 2.5Gb Ethernet PHYs.</div><div class='add'>+</div><div class='add'>+	  This will load necessary firmware and add appropriate time delay.</div><div class='add'>+	  Accelerate this procedure through internal pbus instead of MDIO</div><div class='add'>+	  bus. Certain link-up issues will also be fixed here.</div><div class='add'>+</div><div class='add'>+config MEDIATEK_GE_PHY</div><div class='add'>+	tristate "MediaTek Gigabit Ethernet PHYs"</div><div class='add'>+	select MTK_NET_PHYLIB</div><div class='add'>+	help</div><div class='add'>+	  Supports the MediaTek non-built-in Gigabit Ethernet PHYs.</div><div class='add'>+</div><div class='add'>+	  Non-built-in Gigabit Ethernet PHYs include mt7530/mt7531.</div><div class='add'>+	  You may find mt7530 inside mt7621. This driver shares some</div><div class='add'>+	  common operations with MediaTek SoC built-in Gigabit</div><div class='add'>+	  Ethernet PHYs.</div><div class='add'>+</div><div class='add'>+config MEDIATEK_GE_SOC_PHY</div><div class='add'>+	tristate "MediaTek SoC Ethernet PHYs"</div><div class='add'>+	depends on ARM64 || COMPILE_TEST</div><div class='add'>+	depends on ARCH_AIROHA || (ARCH_MEDIATEK &amp;&amp; NVMEM_MTK_EFUSE) || \</div><div class='add'>+		   COMPILE_TEST</div><div class='add'>+	select MTK_NET_PHYLIB</div><div class='add'>+	select PHY_PACKAGE</div><div class='add'>+	help</div><div class='add'>+	  Supports MediaTek SoC built-in Gigabit Ethernet PHYs.</div><div class='add'>+</div><div class='add'>+	  Include support for built-in Ethernet PHYs which are present in</div><div class='add'>+	  the MT7981 and MT7988 SoCs. These PHYs need calibration data</div><div class='add'>+	  present in the SoCs efuse and will dynamically calibrate VCM</div><div class='add'>+	  (common-mode voltage) during startup.</div><div class='add'>+</div><div class='add'>+config MTK_NET_PHYLIB</div><div class='add'>+	tristate</div><div class='head'>diff --git a/drivers/net/phy/mediatek/Makefile b/drivers/net/phy/mediatek/Makefile<br/>new file mode 100644<br/>index 000000000000..ac57ecc799fc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mediatek/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mediatek/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+obj-$(CONFIG_MEDIATEK_2P5GE_PHY)	+= mtk-2p5ge.o</div><div class='add'>+obj-$(CONFIG_MEDIATEK_GE_PHY)		+= mtk-ge.o</div><div class='add'>+obj-$(CONFIG_MEDIATEK_GE_SOC_PHY)	+= mtk-ge-soc.o</div><div class='add'>+obj-$(CONFIG_MTK_NET_PHYLIB)		+= mtk-phy-lib.o</div><div class='head'>diff --git a/drivers/net/phy/mediatek/mtk-2p5ge.c b/drivers/net/phy/mediatek/mtk-2p5ge.c<br/>new file mode 100644<br/>index 000000000000..de8a41a1841d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mediatek/mtk-2p5ge.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mediatek/mtk-2p5ge.c</a></div><div class='hunk'>@@ -0,0 +1,413 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mtk.h"</div><div class='add'>+</div><div class='add'>+#define MTK_2P5GPHY_ID_MT7988		0x00339c11</div><div class='add'>+</div><div class='add'>+#define MT7988_2P5GE_PMB_FW		"mediatek/mt7988/i2p5ge-phy-pmb.bin"</div><div class='add'>+#define MT7988_2P5GE_PMB_FW_SIZE	0x20000</div><div class='add'>+#define MT7988_2P5GE_PMB_FW_BASE	0x0f100000</div><div class='add'>+#define MT7988_2P5GE_PMB_FW_LEN		0x20000</div><div class='add'>+#define MTK_2P5GPHY_MCU_CSR_BASE	0x0f0f0000</div><div class='add'>+#define MTK_2P5GPHY_MCU_CSR_LEN		0x20</div><div class='add'>+#define MD32_EN_CFG			0x18</div><div class='add'>+#define   MD32_EN			BIT(0)</div><div class='add'>+</div><div class='add'>+#define BASE100T_STATUS_EXTEND		0x10</div><div class='add'>+#define BASE1000T_STATUS_EXTEND		0x11</div><div class='add'>+#define EXTEND_CTRL_AND_STATUS		0x16</div><div class='add'>+</div><div class='add'>+#define PHY_AUX_CTRL_STATUS		0x1d</div><div class='add'>+#define   PHY_AUX_DPX_MASK		GENMASK(5, 5)</div><div class='add'>+#define   PHY_AUX_SPEED_MASK		GENMASK(4, 2)</div><div class='add'>+</div><div class='add'>+/* Registers on MDIO_MMD_VEND1 */</div><div class='add'>+#define MTK_PHY_LPI_PCS_DSP_CTRL		0x121</div><div class='add'>+#define   MTK_PHY_LPI_SIG_EN_LO_THRESH100_MASK	GENMASK(12, 8)</div><div class='add'>+</div><div class='add'>+#define MTK_PHY_HOST_CMD1		0x800e</div><div class='add'>+#define MTK_PHY_HOST_CMD2		0x800f</div><div class='add'>+/* Registers on Token Ring debug nodes */</div><div class='add'>+/* ch_addr = 0x0, node_addr = 0xf, data_addr = 0x3c */</div><div class='add'>+#define AUTO_NP_10XEN				BIT(6)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PHY_AUX_SPD_10 = 0,</div><div class='add'>+	PHY_AUX_SPD_100,</div><div class='add'>+	PHY_AUX_SPD_1000,</div><div class='add'>+	PHY_AUX_SPD_2500,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_load_fw(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='add'>+	void __iomem *mcu_csr_base, *pmb_addr;</div><div class='add'>+	const struct firmware *fw;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	pmb_addr = ioremap(MT7988_2P5GE_PMB_FW_BASE, MT7988_2P5GE_PMB_FW_LEN);</div><div class='add'>+	if (!pmb_addr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	mcu_csr_base = ioremap(MTK_2P5GPHY_MCU_CSR_BASE,</div><div class='add'>+			       MTK_2P5GPHY_MCU_CSR_LEN);</div><div class='add'>+	if (!mcu_csr_base) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto free_pmb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = request_firmware_direct(&amp;fw, MT7988_2P5GE_PMB_FW, dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "failed to load firmware: %s, ret: %d\n",</div><div class='add'>+			MT7988_2P5GE_PMB_FW, ret);</div><div class='add'>+		goto free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fw-&gt;size != MT7988_2P5GE_PMB_FW_SIZE) {</div><div class='add'>+		dev_err(dev, "Firmware size 0x%zx != 0x%x\n",</div><div class='add'>+			fw-&gt;size, MT7988_2P5GE_PMB_FW_SIZE);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto release_fw;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = readw(mcu_csr_base + MD32_EN_CFG);</div><div class='add'>+	if (reg &amp; MD32_EN) {</div><div class='add'>+		phy_set_bits(phydev, MII_BMCR, BMCR_RESET);</div><div class='add'>+		usleep_range(10000, 11000);</div><div class='add'>+	}</div><div class='add'>+	phy_set_bits(phydev, MII_BMCR, BMCR_PDOWN);</div><div class='add'>+</div><div class='add'>+	/* Write magic number to safely stall MCU */</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_HOST_CMD1, 0x1100);</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_HOST_CMD2, 0x00df);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MT7988_2P5GE_PMB_FW_SIZE - 1; i += 4)</div><div class='add'>+		writel(*((uint32_t *)(fw-&gt;data + i)), pmb_addr + i);</div><div class='add'>+</div><div class='add'>+	writew(reg &amp; ~MD32_EN, mcu_csr_base + MD32_EN_CFG);</div><div class='add'>+	writew(reg | MD32_EN, mcu_csr_base + MD32_EN_CFG);</div><div class='add'>+	phy_set_bits(phydev, MII_BMCR, BMCR_RESET);</div><div class='add'>+	/* We need a delay here to stabilize initialization of MCU */</div><div class='add'>+	usleep_range(7000, 8000);</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "Firmware date code: %x/%x/%x, version: %x.%x\n",</div><div class='add'>+		 be16_to_cpu(*((__be16 *)(fw-&gt;data +</div><div class='add'>+					  MT7988_2P5GE_PMB_FW_SIZE - 8))),</div><div class='add'>+		 *(fw-&gt;data + MT7988_2P5GE_PMB_FW_SIZE - 6),</div><div class='add'>+		 *(fw-&gt;data + MT7988_2P5GE_PMB_FW_SIZE - 5),</div><div class='add'>+		 *(fw-&gt;data + MT7988_2P5GE_PMB_FW_SIZE - 2),</div><div class='add'>+		 *(fw-&gt;data + MT7988_2P5GE_PMB_FW_SIZE - 1));</div><div class='add'>+</div><div class='add'>+release_fw:</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+free:</div><div class='add'>+	iounmap(mcu_csr_base);</div><div class='add'>+free_pmb:</div><div class='add'>+	iounmap(pmb_addr);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	/* Check if PHY interface type is compatible */</div><div class='add'>+	if (phydev-&gt;interface != PHY_INTERFACE_MODE_INTERNAL)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_LPI_PCS_DSP_CTRL,</div><div class='add'>+		       MTK_PHY_LPI_SIG_EN_LO_THRESH100_MASK, 0);</div><div class='add'>+</div><div class='add'>+	/* Enable 16-bit next page exchange bit if 1000-BT isn't advertising */</div><div class='add'>+	mtk_tr_modify(phydev, 0x0, 0xf, 0x3c, AUTO_NP_10XEN,</div><div class='add'>+		      FIELD_PREP(AUTO_NP_10XEN, 0x1));</div><div class='add'>+</div><div class='add'>+	/* Enable HW auto downshift */</div><div class='add'>+	phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED_1,</div><div class='add'>+			 MTK_PHY_AUX_CTRL_AND_STATUS,</div><div class='add'>+			 0, MTK_PHY_ENABLE_DOWNSHIFT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_config_aneg(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	bool changed = false;</div><div class='add'>+	u32 adv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = genphy_c45_an_config_aneg(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		changed = true;</div><div class='add'>+</div><div class='add'>+	/* Clause 45 doesn't define 1000BaseT support. Use Clause 22 instead in</div><div class='add'>+	 * our design.</div><div class='add'>+	 */</div><div class='add'>+	adv = linkmode_adv_to_mii_ctrl1000_t(phydev-&gt;advertising);</div><div class='add'>+	ret = phy_modify_changed(phydev, MII_CTRL1000, ADVERTISE_1000FULL, adv);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		changed = true;</div><div class='add'>+</div><div class='add'>+	return genphy_c45_check_and_restart_aneg(phydev, changed);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_get_features(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = genphy_c45_pma_read_abilities(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* This phy can't handle collision, and neither can (XFI)MAC it's</div><div class='add'>+	 * connected to. Although it can do HDX handshake, it doesn't support</div><div class='add'>+	 * CSMA/CD that HDX requires.</div><div class='add'>+	 */</div><div class='add'>+	linkmode_clear_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT,</div><div class='add'>+			   phydev-&gt;supported);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_read_status(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* When MDIO_STAT1_LSTATUS is raised genphy_c45_read_link(), this phy</div><div class='add'>+	 * actually hasn't finished AN. So use CL22's link update function</div><div class='add'>+	 * instead.</div><div class='add'>+	 */</div><div class='add'>+	ret = genphy_update_link(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	phydev-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+	phydev-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='add'>+	phydev-&gt;pause = 0;</div><div class='add'>+	phydev-&gt;asym_pause = 0;</div><div class='add'>+</div><div class='add'>+	/* We'll read link speed through vendor specific registers down below.</div><div class='add'>+	 * So remove phy_resolve_aneg_linkmode (AN on) &amp; genphy_c45_read_pma</div><div class='add'>+	 * (AN off).</div><div class='add'>+	 */</div><div class='add'>+	if (phydev-&gt;autoneg == AUTONEG_ENABLE &amp;&amp; phydev-&gt;autoneg_complete) {</div><div class='add'>+		ret = genphy_c45_read_lpa(phydev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Clause 45 doesn't define 1000BaseT support. Read the link</div><div class='add'>+		 * partner's 1G advertisement via Clause 22.</div><div class='add'>+		 */</div><div class='add'>+		ret = phy_read(phydev, MII_STAT1000);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		mii_stat1000_mod_linkmode_lpa_t(phydev-&gt;lp_advertising, ret);</div><div class='add'>+	} else if (phydev-&gt;autoneg == AUTONEG_DISABLE) {</div><div class='add'>+		linkmode_zero(phydev-&gt;lp_advertising);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;link) {</div><div class='add'>+		ret = phy_read(phydev, PHY_AUX_CTRL_STATUS);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		switch (FIELD_GET(PHY_AUX_SPEED_MASK, ret)) {</div><div class='add'>+		case PHY_AUX_SPD_10:</div><div class='add'>+			phydev-&gt;speed = SPEED_10;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_AUX_SPD_100:</div><div class='add'>+			phydev-&gt;speed = SPEED_100;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_AUX_SPD_1000:</div><div class='add'>+			phydev-&gt;speed = SPEED_1000;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_AUX_SPD_2500:</div><div class='add'>+			phydev-&gt;speed = SPEED_2500;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phydev-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+		phydev-&gt;rate_matching = RATE_MATCH_PAUSE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_get_rate_matching(struct phy_device *phydev,</div><div class='add'>+					      phy_interface_t iface)</div><div class='add'>+{</div><div class='add'>+	return RATE_MATCH_PAUSE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const unsigned long supported_triggers =</div><div class='add'>+	BIT(TRIGGER_NETDEV_FULL_DUPLEX) |</div><div class='add'>+	BIT(TRIGGER_NETDEV_LINK)        |</div><div class='add'>+	BIT(TRIGGER_NETDEV_LINK_10)     |</div><div class='add'>+	BIT(TRIGGER_NETDEV_LINK_100)    |</div><div class='add'>+	BIT(TRIGGER_NETDEV_LINK_1000)   |</div><div class='add'>+	BIT(TRIGGER_NETDEV_LINK_2500)   |</div><div class='add'>+	BIT(TRIGGER_NETDEV_RX)          |</div><div class='add'>+	BIT(TRIGGER_NETDEV_TX);</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_led_blink_set(struct phy_device *phydev, u8 index,</div><div class='add'>+					  unsigned long *delay_on,</div><div class='add'>+					  unsigned long *delay_off)</div><div class='add'>+{</div><div class='add'>+	bool blinking = false;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = mtk_phy_led_num_dly_cfg(index, delay_on, delay_off, &amp;blinking);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mtk_phy_hw_led_blink_set(phydev, index, blinking);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (blinking)</div><div class='add'>+		mtk_phy_hw_led_on_set(phydev, index, MTK_2P5GPHY_LED_ON_MASK,</div><div class='add'>+				      false);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_led_brightness_set(struct phy_device *phydev,</div><div class='add'>+					       u8 index,</div><div class='add'>+					       enum led_brightness value)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mtk_phy_hw_led_blink_set(phydev, index, false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mtk_phy_hw_led_on_set(phydev, index, MTK_2P5GPHY_LED_ON_MASK,</div><div class='add'>+				     (value != LED_OFF));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_led_hw_is_supported(struct phy_device *phydev,</div><div class='add'>+						u8 index, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	return mtk_phy_led_hw_is_supported(phydev, index, rules,</div><div class='add'>+					   supported_triggers);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_led_hw_control_get(struct phy_device *phydev,</div><div class='add'>+					       u8 index, unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	return mtk_phy_led_hw_ctrl_get(phydev, index, rules,</div><div class='add'>+				       MTK_2P5GPHY_LED_ON_SET,</div><div class='add'>+				       MTK_2P5GPHY_LED_RX_BLINK_SET,</div><div class='add'>+				       MTK_2P5GPHY_LED_TX_BLINK_SET);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_led_hw_control_set(struct phy_device *phydev,</div><div class='add'>+					       u8 index, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	return mtk_phy_led_hw_ctrl_set(phydev, index, rules,</div><div class='add'>+				       MTK_2P5GPHY_LED_ON_SET,</div><div class='add'>+				       MTK_2P5GPHY_LED_RX_BLINK_SET,</div><div class='add'>+				       MTK_2P5GPHY_LED_TX_BLINK_SET);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mt798x_2p5ge_phy_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct mtk_socphy_priv *priv;</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (phydev-&gt;drv-&gt;phy_id) {</div><div class='add'>+	case MTK_2P5GPHY_ID_MT7988:</div><div class='add'>+		/* This built-in 2.5GbE hardware only sets MDIO_DEVS_PMAPMD.</div><div class='add'>+		 * Set the rest by this driver since PCS/AN/VEND1/VEND2 MDIO</div><div class='add'>+		 * manageable devices actually exist.</div><div class='add'>+		 */</div><div class='add'>+		phydev-&gt;c45_ids.mmds_present |= MDIO_DEVS_PCS |</div><div class='add'>+						MDIO_DEVS_AN |</div><div class='add'>+						MDIO_DEVS_VEND1 |</div><div class='add'>+						MDIO_DEVS_VEND2;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mt798x_2p5ge_phy_load_fw(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Setup LED. On default, LED0 is on/off when link is up/down. As for</div><div class='add'>+	 * LED1, it blinks as tx/rx transmission takes place.</div><div class='add'>+	 */</div><div class='add'>+	phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_ON_CTRL,</div><div class='add'>+			 MTK_PHY_LED_ON_POLARITY | MTK_2P5GPHY_LED_ON_SET);</div><div class='add'>+	phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED0_BLINK_CTRL,</div><div class='add'>+			   MTK_2P5GPHY_LED_TX_BLINK_SET |</div><div class='add'>+			   MTK_2P5GPHY_LED_RX_BLINK_SET);</div><div class='add'>+	phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED1_ON_CTRL,</div><div class='add'>+			   MTK_PHY_LED_ON_FDX | MTK_PHY_LED_ON_HDX |</div><div class='add'>+			   MTK_2P5GPHY_LED_ON_SET);</div><div class='add'>+	phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MTK_PHY_LED1_BLINK_CTRL,</div><div class='add'>+			 MTK_2P5GPHY_LED_TX_BLINK_SET |</div><div class='add'>+			 MTK_2P5GPHY_LED_RX_BLINK_SET);</div><div class='add'>+</div><div class='add'>+	/* Switch pinctrl after setting polarity to avoid bogus blinking */</div><div class='add'>+	pinctrl = devm_pinctrl_get_select(&amp;phydev-&gt;mdio.dev, "i2p5gbe-led");</div><div class='add'>+	if (IS_ERR(pinctrl))</div><div class='add'>+		dev_err(&amp;phydev-&gt;mdio.dev, "Fail to set LED pins!\n");</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;phydev-&gt;mdio.dev, sizeof(struct mtk_socphy_priv),</div><div class='add'>+			    GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	phydev-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	mtk_phy_leds_state_init(phydev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phy_driver mtk_2p5gephy_driver[] = {</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_MODEL(MTK_2P5GPHY_ID_MT7988),</div><div class='add'>+		.name = "MediaTek MT7988 2.5GbE PHY",</div><div class='add'>+		.probe = mt798x_2p5ge_phy_probe,</div><div class='add'>+		.config_init = mt798x_2p5ge_phy_config_init,</div><div class='add'>+		.config_aneg = mt798x_2p5ge_phy_config_aneg,</div><div class='add'>+		.get_features = mt798x_2p5ge_phy_get_features,</div><div class='add'>+		.read_status = mt798x_2p5ge_phy_read_status,</div><div class='add'>+		.get_rate_matching = mt798x_2p5ge_phy_get_rate_matching,</div><div class='add'>+		.suspend = genphy_suspend,</div><div class='add'>+		.resume = genphy_resume,</div><div class='add'>+		.read_page = mtk_phy_read_page,</div><div class='add'>+		.write_page = mtk_phy_write_page,</div><div class='add'>+		.led_blink_set = mt798x_2p5ge_phy_led_blink_set,</div><div class='add'>+		.led_brightness_set = mt798x_2p5ge_phy_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = mt798x_2p5ge_phy_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_get = mt798x_2p5ge_phy_led_hw_control_get,</div><div class='add'>+		.led_hw_control_set = mt798x_2p5ge_phy_led_hw_control_set,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_phy_driver(mtk_2p5gephy_driver);</div><div class='add'>+</div><div class='add'>+static struct mdio_device_id __maybe_unused mtk_2p5ge_phy_tbl[] = {</div><div class='add'>+	{ PHY_ID_MATCH_VENDOR(0x00339c00) },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("MediaTek 2.5Gb Ethernet PHY driver");</div><div class='add'>+MODULE_AUTHOR("SkyLake Huang &lt;SkyLake.Huang@mediatek.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(mdio, mtk_2p5ge_phy_tbl);</div><div class='add'>+MODULE_FIRMWARE(MT7988_2P5GE_PMB_FW);</div><div class='head'>diff --git a/drivers/net/phy/mediatek-ge-soc.c b/drivers/net/phy/mediatek/mtk-ge-soc.c<br/>index a931832b1418..cd09fbf92ef2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mediatek-ge-soc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mediatek-ge-soc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mediatek/mtk-ge-soc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mediatek/mtk-ge-soc.c</a></div><div class='hunk'>@@ -7,9 +7,17 @@</div><div class='ctx'> #include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../phylib.h"</div><div class='add'>+#include "mtk.h"</div><div class='add'>+</div><div class='add'>+#define MTK_PHY_MAX_LEDS			2</div><div class='ctx'> </div><div class='ctx'> #define MTK_GPHY_ID_MT7981			0x03a29461</div><div class='ctx'> #define MTK_GPHY_ID_MT7988			0x03a29481</div><div class='add'>+#define MTK_GPHY_ID_AN7581			0x03a294c1</div><div class='add'>+#define MTK_GPHY_ID_AN7583			0xc0ff0420</div><div class='ctx'> </div><div class='ctx'> #define MTK_EXT_PAGE_ACCESS			0x1f</div><div class='ctx'> #define MTK_PHY_PAGE_STANDARD			0x0000</div><div class='hunk'>@@ -22,7 +30,107 @@</div><div class='ctx'> #define MTK_PHY_SMI_DET_ON_THRESH_MASK		GENMASK(13, 8)</div><div class='ctx'> </div><div class='ctx'> #define MTK_PHY_PAGE_EXTENDED_2A30		0x2a30</div><div class='del'>-#define MTK_PHY_PAGE_EXTENDED_52B5		0x52b5</div><div class='add'>+</div><div class='add'>+/* Registers on Token Ring debug nodes */</div><div class='add'>+/* ch_addr = 0x0, node_addr = 0x7, data_addr = 0x15 */</div><div class='add'>+/* NormMseLoThresh */</div><div class='add'>+#define NORMAL_MSE_LO_THRESH_MASK		GENMASK(15, 8)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x0, node_addr = 0xf, data_addr = 0x3c */</div><div class='add'>+/* RemAckCntLimitCtrl */</div><div class='add'>+#define REMOTE_ACK_COUNT_LIMIT_CTRL_MASK	GENMASK(2, 1)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x1, node_addr = 0xd, data_addr = 0x20 */</div><div class='add'>+/* VcoSlicerThreshBitsHigh */</div><div class='add'>+#define VCO_SLICER_THRESH_HIGH_MASK		GENMASK(23, 0)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x1, node_addr = 0xf, data_addr = 0x0 */</div><div class='add'>+/* DfeTailEnableVgaThresh1000 */</div><div class='add'>+#define DFE_TAIL_EANBLE_VGA_TRHESH_1000		GENMASK(5, 1)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x1, node_addr = 0xf, data_addr = 0x1 */</div><div class='add'>+/* MrvlTrFix100Kp */</div><div class='add'>+#define MRVL_TR_FIX_100KP_MASK			GENMASK(22, 20)</div><div class='add'>+/* MrvlTrFix100Kf */</div><div class='add'>+#define MRVL_TR_FIX_100KF_MASK			GENMASK(19, 17)</div><div class='add'>+/* MrvlTrFix1000Kp */</div><div class='add'>+#define MRVL_TR_FIX_1000KP_MASK			GENMASK(16, 14)</div><div class='add'>+/* MrvlTrFix1000Kf */</div><div class='add'>+#define MRVL_TR_FIX_1000KF_MASK			GENMASK(13, 11)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x1, node_addr = 0xf, data_addr = 0x12 */</div><div class='add'>+/* VgaDecRate */</div><div class='add'>+#define VGA_DECIMATION_RATE_MASK		GENMASK(8, 5)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x1, node_addr = 0xf, data_addr = 0x17 */</div><div class='add'>+/* SlvDSPreadyTime */</div><div class='add'>+#define SLAVE_DSP_READY_TIME_MASK		GENMASK(22, 15)</div><div class='add'>+/* MasDSPreadyTime */</div><div class='add'>+#define MASTER_DSP_READY_TIME_MASK		GENMASK(14, 7)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x1, node_addr = 0xf, data_addr = 0x18 */</div><div class='add'>+/* EnabRandUpdTrig */</div><div class='add'>+#define ENABLE_RANDOM_UPDOWN_COUNTER_TRIGGER	BIT(8)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x1, node_addr = 0xf, data_addr = 0x20 */</div><div class='add'>+/* ResetSyncOffset */</div><div class='add'>+#define RESET_SYNC_OFFSET_MASK			GENMASK(11, 8)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x2, node_addr = 0xd, data_addr = 0x0 */</div><div class='add'>+/* FfeUpdGainForceVal */</div><div class='add'>+#define FFE_UPDATE_GAIN_FORCE_VAL_MASK		GENMASK(9, 7)</div><div class='add'>+/* FfeUpdGainForce */</div><div class='add'>+#define FFE_UPDATE_GAIN_FORCE			BIT(6)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x2, node_addr = 0xd, data_addr = 0x3 */</div><div class='add'>+/* TrFreeze */</div><div class='add'>+#define TR_FREEZE_MASK				GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x2, node_addr = 0xd, data_addr = 0x6 */</div><div class='add'>+/* SS: Steady-state, KP: Proportional Gain */</div><div class='add'>+/* SSTrKp100 */</div><div class='add'>+#define SS_TR_KP100_MASK			GENMASK(21, 19)</div><div class='add'>+/* SSTrKf100 */</div><div class='add'>+#define SS_TR_KF100_MASK			GENMASK(18, 16)</div><div class='add'>+/* SSTrKp1000Mas */</div><div class='add'>+#define SS_TR_KP1000_MASTER_MASK		GENMASK(15, 13)</div><div class='add'>+/* SSTrKf1000Mas */</div><div class='add'>+#define SS_TR_KF1000_MASTER_MASK		GENMASK(12, 10)</div><div class='add'>+/* SSTrKp1000Slv */</div><div class='add'>+#define SS_TR_KP1000_SLAVE_MASK			GENMASK(9, 7)</div><div class='add'>+/* SSTrKf1000Slv */</div><div class='add'>+#define SS_TR_KF1000_SLAVE_MASK			GENMASK(6, 4)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x2, node_addr = 0xd, data_addr = 0x8 */</div><div class='add'>+/* clear this bit if wanna select from AFE */</div><div class='add'>+/* Regsigdet_sel_1000 */</div><div class='add'>+#define EEE1000_SELECT_SIGNAL_DETECTION_FROM_DFE	BIT(4)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x2, node_addr = 0xd, data_addr = 0xd */</div><div class='add'>+/* RegEEE_st2TrKf1000 */</div><div class='add'>+#define EEE1000_STAGE2_TR_KF_MASK		GENMASK(13, 11)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x2, node_addr = 0xd, data_addr = 0xf */</div><div class='add'>+/* RegEEE_slv_waketr_timer_tar */</div><div class='add'>+#define SLAVE_WAKETR_TIMER_MASK			GENMASK(20, 11)</div><div class='add'>+/* RegEEE_slv_remtx_timer_tar */</div><div class='add'>+#define SLAVE_REMTX_TIMER_MASK			GENMASK(10, 1)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x2, node_addr = 0xd, data_addr = 0x10 */</div><div class='add'>+/* RegEEE_slv_wake_int_timer_tar */</div><div class='add'>+#define SLAVE_WAKEINT_TIMER_MASK		GENMASK(10, 1)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x2, node_addr = 0xd, data_addr = 0x14 */</div><div class='add'>+/* RegEEE_trfreeze_timer2 */</div><div class='add'>+#define TR_FREEZE_TIMER2_MASK			GENMASK(9, 0)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x2, node_addr = 0xd, data_addr = 0x1c */</div><div class='add'>+/* RegEEE100Stg1_tar */</div><div class='add'>+#define EEE100_LPSYNC_STAGE1_UPDATE_TIMER_MASK	GENMASK(8, 0)</div><div class='add'>+</div><div class='add'>+/* ch_addr = 0x2, node_addr = 0xd, data_addr = 0x25 */</div><div class='add'>+/* REGEEE_wake_slv_tr_wait_dfesigdet_en */</div><div class='add'>+#define WAKE_SLAVE_TR_WAIT_DFE_DETECTION_EN	BIT(11)</div><div class='ctx'> </div><div class='ctx'> #define ANALOG_INTERNAL_OPERATION_MAX_US	20</div><div class='ctx'> #define TXRESERVE_MIN				0</div><div class='hunk'>@@ -210,41 +318,6 @@</div><div class='ctx'> #define MTK_PHY_DA_TX_R50_PAIR_D		0x540</div><div class='ctx'> </div><div class='ctx'> /* Registers on MDIO_MMD_VEND2 */</div><div class='del'>-#define MTK_PHY_LED0_ON_CTRL			0x24</div><div class='del'>-#define MTK_PHY_LED1_ON_CTRL			0x26</div><div class='del'>-#define   MTK_PHY_LED_ON_MASK			GENMASK(6, 0)</div><div class='del'>-#define   MTK_PHY_LED_ON_LINK1000		BIT(0)</div><div class='del'>-#define   MTK_PHY_LED_ON_LINK100		BIT(1)</div><div class='del'>-#define   MTK_PHY_LED_ON_LINK10			BIT(2)</div><div class='del'>-#define   MTK_PHY_LED_ON_LINK			(MTK_PHY_LED_ON_LINK10 |\</div><div class='del'>-						 MTK_PHY_LED_ON_LINK100 |\</div><div class='del'>-						 MTK_PHY_LED_ON_LINK1000)</div><div class='del'>-#define   MTK_PHY_LED_ON_LINKDOWN		BIT(3)</div><div class='del'>-#define   MTK_PHY_LED_ON_FDX			BIT(4) /* Full duplex */</div><div class='del'>-#define   MTK_PHY_LED_ON_HDX			BIT(5) /* Half duplex */</div><div class='del'>-#define   MTK_PHY_LED_ON_FORCE_ON		BIT(6)</div><div class='del'>-#define   MTK_PHY_LED_ON_POLARITY		BIT(14)</div><div class='del'>-#define   MTK_PHY_LED_ON_ENABLE			BIT(15)</div><div class='del'>-</div><div class='del'>-#define MTK_PHY_LED0_BLINK_CTRL			0x25</div><div class='del'>-#define MTK_PHY_LED1_BLINK_CTRL			0x27</div><div class='del'>-#define   MTK_PHY_LED_BLINK_1000TX		BIT(0)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_1000RX		BIT(1)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_100TX		BIT(2)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_100RX		BIT(3)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_10TX		BIT(4)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_10RX		BIT(5)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_RX			(MTK_PHY_LED_BLINK_10RX |\</div><div class='del'>-						 MTK_PHY_LED_BLINK_100RX |\</div><div class='del'>-						 MTK_PHY_LED_BLINK_1000RX)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_TX			(MTK_PHY_LED_BLINK_10TX |\</div><div class='del'>-						 MTK_PHY_LED_BLINK_100TX |\</div><div class='del'>-						 MTK_PHY_LED_BLINK_1000TX)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_COLLISION		BIT(6)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_RX_CRC_ERR		BIT(7)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_RX_IDLE_ERR		BIT(8)</div><div class='del'>-#define   MTK_PHY_LED_BLINK_FORCE_BLINK		BIT(9)</div><div class='del'>-</div><div class='ctx'> #define MTK_PHY_LED1_DEFAULT_POLARITIES		BIT(1)</div><div class='ctx'> </div><div class='ctx'> #define MTK_PHY_RG_BG_RASEL			0x115</div><div class='hunk'>@@ -299,29 +372,11 @@ enum CAL_MODE {</div><div class='ctx'> 	SW_M</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define MTK_PHY_LED_STATE_FORCE_ON	0</div><div class='del'>-#define MTK_PHY_LED_STATE_FORCE_BLINK	1</div><div class='del'>-#define MTK_PHY_LED_STATE_NETDEV	2</div><div class='del'>-</div><div class='del'>-struct mtk_socphy_priv {</div><div class='del'>-	unsigned long		led_state;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> struct mtk_socphy_shared {</div><div class='ctx'> 	u32			boottrap;</div><div class='ctx'> 	struct mtk_socphy_priv	priv[4];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int mtk_socphy_read_page(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mtk_socphy_write_page(struct phy_device *phydev, int page)</div><div class='del'>-{</div><div class='del'>-	return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* One calibration cycle consists of:</div><div class='ctx'>  * 1.Set DA_CALIN_FLAG high to start calibration. Keep it high</div><div class='ctx'>  *   until AD_CAL_COMP is ready to output calibration result.</div><div class='hunk'>@@ -752,40 +807,36 @@ restore:</div><div class='ctx'> static void mt798x_phy_common_finetune(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);</div><div class='del'>-	/* SlvDSPreadyTime = 24, MasDSPreadyTime = 24 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0xc71);</div><div class='del'>-	__phy_write(phydev, 0x12, 0xc);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x8fae);</div><div class='del'>-</div><div class='del'>-	/* EnabRandUpdTrig = 1 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x2f00);</div><div class='del'>-	__phy_write(phydev, 0x12, 0xe);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x8fb0);</div><div class='del'>-</div><div class='del'>-	/* NormMseLoThresh = 85 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x55a0);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x83aa);</div><div class='del'>-</div><div class='del'>-	/* FfeUpdGainForce = 1(Enable), FfeUpdGainForceVal = 4 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x240);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x9680);</div><div class='del'>-</div><div class='del'>-	/* TrFreeze = 0 (mt7988 default) */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x9686);</div><div class='del'>-</div><div class='del'>-	/* SSTrKp100 = 5 */</div><div class='del'>-	/* SSTrKf100 = 6 */</div><div class='del'>-	/* SSTrKp1000Mas = 5 */</div><div class='del'>-	/* SSTrKf1000Mas = 6 */</div><div class='del'>-	/* SSTrKp1000Slv = 5 */</div><div class='del'>-	/* SSTrKf1000Slv = 6 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0xbaef);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x2e);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x968c);</div><div class='add'>+	__mtk_tr_modify(phydev, 0x1, 0xf, 0x17,</div><div class='add'>+			SLAVE_DSP_READY_TIME_MASK | MASTER_DSP_READY_TIME_MASK,</div><div class='add'>+			FIELD_PREP(SLAVE_DSP_READY_TIME_MASK, 0x18) |</div><div class='add'>+			FIELD_PREP(MASTER_DSP_READY_TIME_MASK, 0x18));</div><div class='add'>+</div><div class='add'>+	__mtk_tr_set_bits(phydev, 0x1, 0xf, 0x18,</div><div class='add'>+			  ENABLE_RANDOM_UPDOWN_COUNTER_TRIGGER);</div><div class='add'>+</div><div class='add'>+	__mtk_tr_modify(phydev, 0x0, 0x7, 0x15,</div><div class='add'>+			NORMAL_MSE_LO_THRESH_MASK,</div><div class='add'>+			FIELD_PREP(NORMAL_MSE_LO_THRESH_MASK, 0x55));</div><div class='add'>+</div><div class='add'>+	__mtk_tr_modify(phydev, 0x2, 0xd, 0x0,</div><div class='add'>+			FFE_UPDATE_GAIN_FORCE_VAL_MASK,</div><div class='add'>+			FIELD_PREP(FFE_UPDATE_GAIN_FORCE_VAL_MASK, 0x4) |</div><div class='add'>+				   FFE_UPDATE_GAIN_FORCE);</div><div class='add'>+</div><div class='add'>+	__mtk_tr_clr_bits(phydev, 0x2, 0xd, 0x3, TR_FREEZE_MASK);</div><div class='add'>+</div><div class='add'>+	__mtk_tr_modify(phydev, 0x2, 0xd, 0x6,</div><div class='add'>+			SS_TR_KP100_MASK | SS_TR_KF100_MASK |</div><div class='add'>+			SS_TR_KP1000_MASTER_MASK | SS_TR_KF1000_MASTER_MASK |</div><div class='add'>+			SS_TR_KP1000_SLAVE_MASK | SS_TR_KF1000_SLAVE_MASK,</div><div class='add'>+			FIELD_PREP(SS_TR_KP100_MASK, 0x5) |</div><div class='add'>+			FIELD_PREP(SS_TR_KF100_MASK, 0x6) |</div><div class='add'>+			FIELD_PREP(SS_TR_KP1000_MASTER_MASK, 0x5) |</div><div class='add'>+			FIELD_PREP(SS_TR_KF1000_MASTER_MASK, 0x6) |</div><div class='add'>+			FIELD_PREP(SS_TR_KP1000_SLAVE_MASK, 0x5) |</div><div class='add'>+			FIELD_PREP(SS_TR_KF1000_SLAVE_MASK, 0x6));</div><div class='add'>+</div><div class='ctx'> 	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -808,27 +859,29 @@ static void mt7981_phy_finetune(struct phy_device *phydev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);</div><div class='del'>-	/* ResetSyncOffset = 6 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x600);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x8fc0);</div><div class='add'>+	__mtk_tr_modify(phydev, 0x1, 0xf, 0x20,</div><div class='add'>+			RESET_SYNC_OFFSET_MASK,</div><div class='add'>+			FIELD_PREP(RESET_SYNC_OFFSET_MASK, 0x6));</div><div class='ctx'> </div><div class='del'>-	/* VgaDecRate = 1 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x4c2a);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x3e);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x8fa4);</div><div class='add'>+	__mtk_tr_modify(phydev, 0x1, 0xf, 0x12,</div><div class='add'>+			VGA_DECIMATION_RATE_MASK,</div><div class='add'>+			FIELD_PREP(VGA_DECIMATION_RATE_MASK, 0x1));</div><div class='ctx'> </div><div class='ctx'> 	/* MrvlTrFix100Kp = 3, MrvlTrFix100Kf = 2,</div><div class='ctx'> 	 * MrvlTrFix1000Kp = 3, MrvlTrFix1000Kf = 2</div><div class='ctx'> 	 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0xd10a);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x34);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x8f82);</div><div class='add'>+	__mtk_tr_modify(phydev, 0x1, 0xf, 0x1,</div><div class='add'>+			MRVL_TR_FIX_100KP_MASK | MRVL_TR_FIX_100KF_MASK |</div><div class='add'>+			MRVL_TR_FIX_1000KP_MASK | MRVL_TR_FIX_1000KF_MASK,</div><div class='add'>+			FIELD_PREP(MRVL_TR_FIX_100KP_MASK, 0x3) |</div><div class='add'>+			FIELD_PREP(MRVL_TR_FIX_100KF_MASK, 0x2) |</div><div class='add'>+			FIELD_PREP(MRVL_TR_FIX_1000KP_MASK, 0x3) |</div><div class='add'>+			FIELD_PREP(MRVL_TR_FIX_1000KF_MASK, 0x2));</div><div class='ctx'> </div><div class='ctx'> 	/* VcoSlicerThreshBitsHigh */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x5555);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x55);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x8ec0);</div><div class='add'>+	__mtk_tr_modify(phydev, 0x1, 0xd, 0x20,</div><div class='add'>+			VCO_SLICER_THRESH_HIGH_MASK,</div><div class='add'>+			FIELD_PREP(VCO_SLICER_THRESH_HIGH_MASK, 0x555555));</div><div class='ctx'> 	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* TR_OPEN_LOOP_EN = 1, lpf_x_average = 9 */</div><div class='hunk'>@@ -880,25 +933,23 @@ static void mt7988_phy_finetune(struct phy_device *phydev)</div><div class='ctx'> 	phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_TX_FILTER, 0x5);</div><div class='ctx'> </div><div class='ctx'> 	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);</div><div class='del'>-	/* ResetSyncOffset = 5 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x500);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x8fc0);</div><div class='add'>+	__mtk_tr_modify(phydev, 0x1, 0xf, 0x20,</div><div class='add'>+			RESET_SYNC_OFFSET_MASK,</div><div class='add'>+			FIELD_PREP(RESET_SYNC_OFFSET_MASK, 0x5));</div><div class='ctx'> </div><div class='ctx'> 	/* VgaDecRate is 1 at default on mt7988 */</div><div class='ctx'> </div><div class='del'>-	/* MrvlTrFix100Kp = 6, MrvlTrFix100Kf = 7,</div><div class='del'>-	 * MrvlTrFix1000Kp = 6, MrvlTrFix1000Kf = 7</div><div class='del'>-	 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0xb90a);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x6f);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x8f82);</div><div class='del'>-</div><div class='del'>-	/* RemAckCntLimitCtrl = 1 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0xfbba);</div><div class='del'>-	__phy_write(phydev, 0x12, 0xc3);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x87f8);</div><div class='del'>-</div><div class='add'>+	__mtk_tr_modify(phydev, 0x1, 0xf, 0x1,</div><div class='add'>+			MRVL_TR_FIX_100KP_MASK | MRVL_TR_FIX_100KF_MASK |</div><div class='add'>+			MRVL_TR_FIX_1000KP_MASK | MRVL_TR_FIX_1000KF_MASK,</div><div class='add'>+			FIELD_PREP(MRVL_TR_FIX_100KP_MASK, 0x6) |</div><div class='add'>+			FIELD_PREP(MRVL_TR_FIX_100KF_MASK, 0x7) |</div><div class='add'>+			FIELD_PREP(MRVL_TR_FIX_1000KP_MASK, 0x6) |</div><div class='add'>+			FIELD_PREP(MRVL_TR_FIX_1000KF_MASK, 0x7));</div><div class='add'>+</div><div class='add'>+	__mtk_tr_modify(phydev, 0x0, 0xf, 0x3c,</div><div class='add'>+			REMOTE_ACK_COUNT_LIMIT_CTRL_MASK,</div><div class='add'>+			FIELD_PREP(REMOTE_ACK_COUNT_LIMIT_CTRL_MASK, 0x1));</div><div class='ctx'> 	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* TR_OPEN_LOOP_EN = 1, lpf_x_average = 10 */</div><div class='hunk'>@@ -974,45 +1025,37 @@ static void mt798x_phy_eee(struct phy_device *phydev)</div><div class='ctx'> 			 MTK_PHY_TR_READY_SKIP_AFE_WAKEUP);</div><div class='ctx'> </div><div class='ctx'> 	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);</div><div class='del'>-	/* Regsigdet_sel_1000 = 0 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0xb);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x9690);</div><div class='del'>-</div><div class='del'>-	/* REG_EEE_st2TrKf1000 = 2 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x114f);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x2);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x969a);</div><div class='del'>-</div><div class='del'>-	/* RegEEE_slv_wake_tr_timer_tar = 6, RegEEE_slv_remtx_timer_tar = 20 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x3028);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x969e);</div><div class='del'>-</div><div class='del'>-	/* RegEEE_slv_wake_int_timer_tar = 8 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x5010);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x96a0);</div><div class='del'>-</div><div class='del'>-	/* RegEEE_trfreeze_timer2 = 586 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x24a);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x96a8);</div><div class='del'>-</div><div class='del'>-	/* RegEEE100Stg1_tar = 16 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x3210);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x96b8);</div><div class='del'>-</div><div class='del'>-	/* REGEEE_wake_slv_tr_wait_dfesigdet_en = 0 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x1463);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x96ca);</div><div class='del'>-</div><div class='del'>-	/* DfeTailEnableVgaThresh1000 = 27 */</div><div class='del'>-	__phy_write(phydev, 0x11, 0x36);</div><div class='del'>-	__phy_write(phydev, 0x12, 0x0);</div><div class='del'>-	__phy_write(phydev, 0x10, 0x8f80);</div><div class='add'>+	__mtk_tr_clr_bits(phydev, 0x2, 0xd, 0x8,</div><div class='add'>+			  EEE1000_SELECT_SIGNAL_DETECTION_FROM_DFE);</div><div class='add'>+</div><div class='add'>+	__mtk_tr_modify(phydev, 0x2, 0xd, 0xd,</div><div class='add'>+			EEE1000_STAGE2_TR_KF_MASK,</div><div class='add'>+			FIELD_PREP(EEE1000_STAGE2_TR_KF_MASK, 0x2));</div><div class='add'>+</div><div class='add'>+	__mtk_tr_modify(phydev, 0x2, 0xd, 0xf,</div><div class='add'>+			SLAVE_WAKETR_TIMER_MASK | SLAVE_REMTX_TIMER_MASK,</div><div class='add'>+			FIELD_PREP(SLAVE_WAKETR_TIMER_MASK, 0x6) |</div><div class='add'>+			FIELD_PREP(SLAVE_REMTX_TIMER_MASK, 0x14));</div><div class='add'>+</div><div class='add'>+	__mtk_tr_modify(phydev, 0x2, 0xd, 0x10,</div><div class='add'>+			SLAVE_WAKEINT_TIMER_MASK,</div><div class='add'>+			FIELD_PREP(SLAVE_WAKEINT_TIMER_MASK, 0x8));</div><div class='add'>+</div><div class='add'>+	__mtk_tr_modify(phydev, 0x2, 0xd, 0x14,</div><div class='add'>+			TR_FREEZE_TIMER2_MASK,</div><div class='add'>+			FIELD_PREP(TR_FREEZE_TIMER2_MASK, 0x24a));</div><div class='add'>+</div><div class='add'>+	__mtk_tr_modify(phydev, 0x2, 0xd, 0x1c,</div><div class='add'>+			EEE100_LPSYNC_STAGE1_UPDATE_TIMER_MASK,</div><div class='add'>+			FIELD_PREP(EEE100_LPSYNC_STAGE1_UPDATE_TIMER_MASK,</div><div class='add'>+				   0x10));</div><div class='add'>+</div><div class='add'>+	__mtk_tr_clr_bits(phydev, 0x2, 0xd, 0x25,</div><div class='add'>+			  WAKE_SLAVE_TR_WAIT_DFE_DETECTION_EN);</div><div class='add'>+</div><div class='add'>+	__mtk_tr_modify(phydev, 0x1, 0xf, 0x0,</div><div class='add'>+			DFE_TAIL_EANBLE_VGA_TRHESH_1000,</div><div class='add'>+			FIELD_PREP(DFE_TAIL_EANBLE_VGA_TRHESH_1000, 0x1b));</div><div class='ctx'> 	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);</div><div class='ctx'> </div><div class='ctx'> 	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_3);</div><div class='hunk'>@@ -1172,76 +1215,23 @@ static int mt798x_phy_config_init(struct phy_device *phydev)</div><div class='ctx'> 	return mt798x_phy_calibration(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mt798x_phy_hw_led_on_set(struct phy_device *phydev, u8 index,</div><div class='del'>-				    bool on)</div><div class='del'>-{</div><div class='del'>-	unsigned int bit_on = MTK_PHY_LED_STATE_FORCE_ON + (index ? 16 : 0);</div><div class='del'>-	struct mtk_socphy_priv *priv = phydev-&gt;priv;</div><div class='del'>-	bool changed;</div><div class='del'>-</div><div class='del'>-	if (on)</div><div class='del'>-		changed = !test_and_set_bit(bit_on, &amp;priv-&gt;led_state);</div><div class='del'>-	else</div><div class='del'>-		changed = !!test_and_clear_bit(bit_on, &amp;priv-&gt;led_state);</div><div class='del'>-</div><div class='del'>-	changed |= !!test_and_clear_bit(MTK_PHY_LED_STATE_NETDEV +</div><div class='del'>-					(index ? 16 : 0), &amp;priv-&gt;led_state);</div><div class='del'>-	if (changed)</div><div class='del'>-		return phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?</div><div class='del'>-				      MTK_PHY_LED1_ON_CTRL :</div><div class='del'>-				      MTK_PHY_LED0_ON_CTRL,</div><div class='del'>-				      MTK_PHY_LED_ON_MASK,</div><div class='del'>-				      on ? MTK_PHY_LED_ON_FORCE_ON : 0);</div><div class='del'>-	else</div><div class='del'>-		return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mt798x_phy_hw_led_blink_set(struct phy_device *phydev, u8 index,</div><div class='del'>-				       bool blinking)</div><div class='del'>-{</div><div class='del'>-	unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +</div><div class='del'>-				 (index ? 16 : 0);</div><div class='del'>-	struct mtk_socphy_priv *priv = phydev-&gt;priv;</div><div class='del'>-	bool changed;</div><div class='del'>-</div><div class='del'>-	if (blinking)</div><div class='del'>-		changed = !test_and_set_bit(bit_blink, &amp;priv-&gt;led_state);</div><div class='del'>-	else</div><div class='del'>-		changed = !!test_and_clear_bit(bit_blink, &amp;priv-&gt;led_state);</div><div class='del'>-</div><div class='del'>-	changed |= !!test_bit(MTK_PHY_LED_STATE_NETDEV +</div><div class='del'>-			      (index ? 16 : 0), &amp;priv-&gt;led_state);</div><div class='del'>-	if (changed)</div><div class='del'>-		return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ?</div><div class='del'>-				     MTK_PHY_LED1_BLINK_CTRL :</div><div class='del'>-				     MTK_PHY_LED0_BLINK_CTRL,</div><div class='del'>-				     blinking ?</div><div class='del'>-				     MTK_PHY_LED_BLINK_FORCE_BLINK : 0);</div><div class='del'>-	else</div><div class='del'>-		return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mt798x_phy_led_blink_set(struct phy_device *phydev, u8 index,</div><div class='ctx'> 				    unsigned long *delay_on,</div><div class='ctx'> 				    unsigned long *delay_off)</div><div class='ctx'> {</div><div class='ctx'> 	bool blinking = false;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (index &gt; 1)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	if (delay_on &amp;&amp; delay_off &amp;&amp; (*delay_on &gt; 0) &amp;&amp; (*delay_off &gt; 0)) {</div><div class='del'>-		blinking = true;</div><div class='del'>-		*delay_on = 50;</div><div class='del'>-		*delay_off = 50;</div><div class='del'>-	}</div><div class='add'>+	err = mtk_phy_led_num_dly_cfg(index, delay_on, delay_off, &amp;blinking);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='del'>-	err = mt798x_phy_hw_led_blink_set(phydev, index, blinking);</div><div class='add'>+	err = mtk_phy_hw_led_blink_set(phydev, index, blinking);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return mt798x_phy_hw_led_on_set(phydev, index, false);</div><div class='add'>+	return mtk_phy_hw_led_on_set(phydev, index, MTK_GPHY_LED_ON_MASK,</div><div class='add'>+				     false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mt798x_phy_led_brightness_set(struct phy_device *phydev,</div><div class='hunk'>@@ -1249,11 +1239,12 @@ static int mt798x_phy_led_brightness_set(struct phy_device *phydev,</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = mt798x_phy_hw_led_blink_set(phydev, index, false);</div><div class='add'>+	err = mtk_phy_hw_led_blink_set(phydev, index, false);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return mt798x_phy_hw_led_on_set(phydev, index, (value != LED_OFF));</div><div class='add'>+	return mtk_phy_hw_led_on_set(phydev, index, MTK_GPHY_LED_ON_MASK,</div><div class='add'>+				     (value != LED_OFF));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const unsigned long supported_triggers =</div><div class='hunk'>@@ -1269,160 +1260,31 @@ static const unsigned long supported_triggers =</div><div class='ctx'> static int mt798x_phy_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='ctx'> 					  unsigned long rules)</div><div class='ctx'> {</div><div class='del'>-	if (index &gt; 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	/* All combinations of the supported triggers are allowed */</div><div class='del'>-	if (rules &amp; ~supported_triggers)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-};</div><div class='add'>+	return mtk_phy_led_hw_is_supported(phydev, index, rules,</div><div class='add'>+					   supported_triggers);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int mt798x_phy_led_hw_control_get(struct phy_device *phydev, u8 index,</div><div class='ctx'> 					 unsigned long *rules)</div><div class='ctx'> {</div><div class='del'>-	unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +</div><div class='del'>-				 (index ? 16 : 0);</div><div class='del'>-	unsigned int bit_netdev = MTK_PHY_LED_STATE_NETDEV + (index ? 16 : 0);</div><div class='del'>-	unsigned int bit_on = MTK_PHY_LED_STATE_FORCE_ON + (index ? 16 : 0);</div><div class='del'>-	struct mtk_socphy_priv *priv = phydev-&gt;priv;</div><div class='del'>-	int on, blink;</div><div class='del'>-</div><div class='del'>-	if (index &gt; 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	on = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='del'>-			  index ? MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL);</div><div class='del'>-</div><div class='del'>-	if (on &lt; 0)</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	blink = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='del'>-			     index ? MTK_PHY_LED1_BLINK_CTRL :</div><div class='del'>-				     MTK_PHY_LED0_BLINK_CTRL);</div><div class='del'>-	if (blink &lt; 0)</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	if ((on &amp; (MTK_PHY_LED_ON_LINK | MTK_PHY_LED_ON_FDX |</div><div class='del'>-		   MTK_PHY_LED_ON_HDX | MTK_PHY_LED_ON_LINKDOWN)) ||</div><div class='del'>-	    (blink &amp; (MTK_PHY_LED_BLINK_RX | MTK_PHY_LED_BLINK_TX)))</div><div class='del'>-		set_bit(bit_netdev, &amp;priv-&gt;led_state);</div><div class='del'>-	else</div><div class='del'>-		clear_bit(bit_netdev, &amp;priv-&gt;led_state);</div><div class='del'>-</div><div class='del'>-	if (on &amp; MTK_PHY_LED_ON_FORCE_ON)</div><div class='del'>-		set_bit(bit_on, &amp;priv-&gt;led_state);</div><div class='del'>-	else</div><div class='del'>-		clear_bit(bit_on, &amp;priv-&gt;led_state);</div><div class='del'>-</div><div class='del'>-	if (blink &amp; MTK_PHY_LED_BLINK_FORCE_BLINK)</div><div class='del'>-		set_bit(bit_blink, &amp;priv-&gt;led_state);</div><div class='del'>-	else</div><div class='del'>-		clear_bit(bit_blink, &amp;priv-&gt;led_state);</div><div class='del'>-</div><div class='del'>-	if (!rules)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (on &amp; MTK_PHY_LED_ON_LINK)</div><div class='del'>-		*rules |= BIT(TRIGGER_NETDEV_LINK);</div><div class='del'>-</div><div class='del'>-	if (on &amp; MTK_PHY_LED_ON_LINK10)</div><div class='del'>-		*rules |= BIT(TRIGGER_NETDEV_LINK_10);</div><div class='del'>-</div><div class='del'>-	if (on &amp; MTK_PHY_LED_ON_LINK100)</div><div class='del'>-		*rules |= BIT(TRIGGER_NETDEV_LINK_100);</div><div class='del'>-</div><div class='del'>-	if (on &amp; MTK_PHY_LED_ON_LINK1000)</div><div class='del'>-		*rules |= BIT(TRIGGER_NETDEV_LINK_1000);</div><div class='del'>-</div><div class='del'>-	if (on &amp; MTK_PHY_LED_ON_FDX)</div><div class='del'>-		*rules |= BIT(TRIGGER_NETDEV_FULL_DUPLEX);</div><div class='del'>-</div><div class='del'>-	if (on &amp; MTK_PHY_LED_ON_HDX)</div><div class='del'>-		*rules |= BIT(TRIGGER_NETDEV_HALF_DUPLEX);</div><div class='del'>-</div><div class='del'>-	if (blink &amp; MTK_PHY_LED_BLINK_RX)</div><div class='del'>-		*rules |= BIT(TRIGGER_NETDEV_RX);</div><div class='del'>-</div><div class='del'>-	if (blink &amp; MTK_PHY_LED_BLINK_TX)</div><div class='del'>-		*rules |= BIT(TRIGGER_NETDEV_TX);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return mtk_phy_led_hw_ctrl_get(phydev, index, rules,</div><div class='add'>+				       MTK_GPHY_LED_ON_SET,</div><div class='add'>+				       MTK_GPHY_LED_RX_BLINK_SET,</div><div class='add'>+				       MTK_GPHY_LED_TX_BLINK_SET);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int mt798x_phy_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='ctx'> 					 unsigned long rules)</div><div class='ctx'> {</div><div class='del'>-	unsigned int bit_netdev = MTK_PHY_LED_STATE_NETDEV + (index ? 16 : 0);</div><div class='del'>-	struct mtk_socphy_priv *priv = phydev-&gt;priv;</div><div class='del'>-	u16 on = 0, blink = 0;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (index &gt; 1)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (rules &amp; BIT(TRIGGER_NETDEV_FULL_DUPLEX))</div><div class='del'>-		on |= MTK_PHY_LED_ON_FDX;</div><div class='del'>-</div><div class='del'>-	if (rules &amp; BIT(TRIGGER_NETDEV_HALF_DUPLEX))</div><div class='del'>-		on |= MTK_PHY_LED_ON_HDX;</div><div class='del'>-</div><div class='del'>-	if (rules &amp; (BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK)))</div><div class='del'>-		on |= MTK_PHY_LED_ON_LINK10;</div><div class='del'>-</div><div class='del'>-	if (rules &amp; (BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK)))</div><div class='del'>-		on |= MTK_PHY_LED_ON_LINK100;</div><div class='del'>-</div><div class='del'>-	if (rules &amp; (BIT(TRIGGER_NETDEV_LINK_1000) | BIT(TRIGGER_NETDEV_LINK)))</div><div class='del'>-		on |= MTK_PHY_LED_ON_LINK1000;</div><div class='del'>-</div><div class='del'>-	if (rules &amp; BIT(TRIGGER_NETDEV_RX)) {</div><div class='del'>-		blink |= (on &amp; MTK_PHY_LED_ON_LINK) ?</div><div class='del'>-			  (((on &amp; MTK_PHY_LED_ON_LINK10) ?</div><div class='del'>-			    MTK_PHY_LED_BLINK_10RX : 0) |</div><div class='del'>-			   ((on &amp; MTK_PHY_LED_ON_LINK100) ?</div><div class='del'>-			    MTK_PHY_LED_BLINK_100RX : 0) |</div><div class='del'>-			   ((on &amp; MTK_PHY_LED_ON_LINK1000) ?</div><div class='del'>-			    MTK_PHY_LED_BLINK_1000RX : 0)) :</div><div class='del'>-			  MTK_PHY_LED_BLINK_RX;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rules &amp; BIT(TRIGGER_NETDEV_TX)) {</div><div class='del'>-		blink |= (on &amp; MTK_PHY_LED_ON_LINK) ?</div><div class='del'>-			  (((on &amp; MTK_PHY_LED_ON_LINK10) ?</div><div class='del'>-			    MTK_PHY_LED_BLINK_10TX : 0) |</div><div class='del'>-			   ((on &amp; MTK_PHY_LED_ON_LINK100) ?</div><div class='del'>-			    MTK_PHY_LED_BLINK_100TX : 0) |</div><div class='del'>-			   ((on &amp; MTK_PHY_LED_ON_LINK1000) ?</div><div class='del'>-			    MTK_PHY_LED_BLINK_1000TX : 0)) :</div><div class='del'>-			  MTK_PHY_LED_BLINK_TX;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (blink || on)</div><div class='del'>-		set_bit(bit_netdev, &amp;priv-&gt;led_state);</div><div class='del'>-	else</div><div class='del'>-		clear_bit(bit_netdev, &amp;priv-&gt;led_state);</div><div class='del'>-</div><div class='del'>-	ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?</div><div class='del'>-				MTK_PHY_LED1_ON_CTRL :</div><div class='del'>-				MTK_PHY_LED0_ON_CTRL,</div><div class='del'>-			     MTK_PHY_LED_ON_FDX     |</div><div class='del'>-			     MTK_PHY_LED_ON_HDX     |</div><div class='del'>-			     MTK_PHY_LED_ON_LINK,</div><div class='del'>-			     on);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ?</div><div class='del'>-				MTK_PHY_LED1_BLINK_CTRL :</div><div class='del'>-				MTK_PHY_LED0_BLINK_CTRL, blink);</div><div class='add'>+	return mtk_phy_led_hw_ctrl_set(phydev, index, rules,</div><div class='add'>+				       MTK_GPHY_LED_ON_SET,</div><div class='add'>+				       MTK_GPHY_LED_RX_BLINK_SET,</div><div class='add'>+				       MTK_GPHY_LED_TX_BLINK_SET);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static bool mt7988_phy_led_get_polarity(struct phy_device *phydev, int led_num)</div><div class='ctx'> {</div><div class='del'>-	struct mtk_socphy_shared *priv = phydev-&gt;shared-&gt;priv;</div><div class='add'>+	struct mtk_socphy_shared *priv = phy_package_get_priv(phydev);</div><div class='ctx'> 	u32 polarities;</div><div class='ctx'> </div><div class='ctx'> 	if (led_num == 0)</div><div class='hunk'>@@ -1461,7 +1323,8 @@ static int mt7988_phy_fix_leds_polarities(struct phy_device *phydev)</div><div class='ctx'> static int mt7988_phy_probe_shared(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np = dev_of_node(&amp;phydev-&gt;mdio.bus-&gt;dev);</div><div class='del'>-	struct mtk_socphy_shared *shared = phydev-&gt;shared-&gt;priv;</div><div class='add'>+	struct mtk_socphy_shared *shared = phy_package_get_priv(phydev);</div><div class='add'>+	struct device_node *pio_np;</div><div class='ctx'> 	struct regmap *regmap;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1479,7 +1342,13 @@ static int mt7988_phy_probe_shared(struct phy_device *phydev)</div><div class='ctx'> 	 * The 4 bits in TPBANK0 are kept as package shared data and are used to</div><div class='ctx'> 	 * set LED polarity for each of the LED0.</div><div class='ctx'> 	 */</div><div class='del'>-	regmap = syscon_regmap_lookup_by_phandle(np, "mediatek,pio");</div><div class='add'>+	pio_np = of_parse_phandle(np, "mediatek,pio", 0);</div><div class='add'>+	if (!pio_np)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	regmap = device_node_to_regmap(pio_np);</div><div class='add'>+	of_node_put(pio_np);</div><div class='add'>+</div><div class='ctx'> 	if (IS_ERR(regmap))</div><div class='ctx'> 		return PTR_ERR(regmap);</div><div class='ctx'> </div><div class='hunk'>@@ -1492,14 +1361,6 @@ static int mt7988_phy_probe_shared(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mt798x_phy_leds_state_init(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 2; ++i)</div><div class='del'>-		mt798x_phy_led_hw_control_get(phydev, i, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mt7988_phy_probe(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mtk_socphy_shared *shared;</div><div class='hunk'>@@ -1520,12 +1381,12 @@ static int mt7988_phy_probe(struct phy_device *phydev)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	shared = phydev-&gt;shared-&gt;priv;</div><div class='add'>+	shared = phy_package_get_priv(phydev);</div><div class='ctx'> 	priv = &amp;shared-&gt;priv[phydev-&gt;mdio.addr];</div><div class='ctx'> </div><div class='ctx'> 	phydev-&gt;priv = priv;</div><div class='ctx'> </div><div class='del'>-	mt798x_phy_leds_state_init(phydev);</div><div class='add'>+	mtk_phy_leds_state_init(phydev);</div><div class='ctx'> </div><div class='ctx'> 	err = mt7988_phy_fix_leds_polarities(phydev);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -1552,11 +1413,63 @@ static int mt7981_phy_probe(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	phydev-&gt;priv = priv;</div><div class='ctx'> </div><div class='del'>-	mt798x_phy_leds_state_init(phydev);</div><div class='add'>+	mtk_phy_leds_state_init(phydev);</div><div class='ctx'> </div><div class='ctx'> 	return mt798x_phy_calibration(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int an7581_phy_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct mtk_socphy_priv *priv;</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='add'>+</div><div class='add'>+	/* Toggle pinctrl to enable PHY LED */</div><div class='add'>+	pinctrl = devm_pinctrl_get_select(&amp;phydev-&gt;mdio.dev, "gbe-led");</div><div class='add'>+	if (IS_ERR(pinctrl))</div><div class='add'>+		dev_err(&amp;phydev-&gt;mdio.bus-&gt;dev,</div><div class='add'>+			"Failed to setup PHY LED pinctrl\n");</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;phydev-&gt;mdio.dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	phydev-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int an7581_phy_led_polarity_set(struct phy_device *phydev, int index,</div><div class='add'>+				       unsigned long modes)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0;</div><div class='add'>+	u32 mode;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= MTK_PHY_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(mode, &amp;modes, __PHY_LED_MODES_NUM) {</div><div class='add'>+		switch (mode) {</div><div class='add'>+		case PHY_LED_ACTIVE_LOW:</div><div class='add'>+			val = MTK_PHY_LED_ON_POLARITY;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_LED_ACTIVE_HIGH:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?</div><div class='add'>+			      MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL,</div><div class='add'>+			      MTK_PHY_LED_ON_POLARITY, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int an7583_phy_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	/* BMCR_PDOWN is enabled by default */</div><div class='add'>+	return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver mtk_socphy_driver[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7981),</div><div class='hunk'>@@ -1567,8 +1480,8 @@ static struct phy_driver mtk_socphy_driver[] = {</div><div class='ctx'> 		.probe		= mt7981_phy_probe,</div><div class='ctx'> 		.suspend	= genphy_suspend,</div><div class='ctx'> 		.resume		= genphy_resume,</div><div class='del'>-		.read_page	= mtk_socphy_read_page,</div><div class='del'>-		.write_page	= mtk_socphy_write_page,</div><div class='add'>+		.read_page	= mtk_phy_read_page,</div><div class='add'>+		.write_page	= mtk_phy_write_page,</div><div class='ctx'> 		.led_blink_set	= mt798x_phy_led_blink_set,</div><div class='ctx'> 		.led_brightness_set = mt798x_phy_led_brightness_set,</div><div class='ctx'> 		.led_hw_is_supported = mt798x_phy_led_hw_is_supported,</div><div class='hunk'>@@ -1584,21 +1497,46 @@ static struct phy_driver mtk_socphy_driver[] = {</div><div class='ctx'> 		.probe		= mt7988_phy_probe,</div><div class='ctx'> 		.suspend	= genphy_suspend,</div><div class='ctx'> 		.resume		= genphy_resume,</div><div class='del'>-		.read_page	= mtk_socphy_read_page,</div><div class='del'>-		.write_page	= mtk_socphy_write_page,</div><div class='add'>+		.read_page	= mtk_phy_read_page,</div><div class='add'>+		.write_page	= mtk_phy_write_page,</div><div class='add'>+		.led_blink_set	= mt798x_phy_led_blink_set,</div><div class='add'>+		.led_brightness_set = mt798x_phy_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = mt798x_phy_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = mt798x_phy_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = mt798x_phy_led_hw_control_get,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(MTK_GPHY_ID_AN7581),</div><div class='add'>+		.name		= "Airoha AN7581 PHY",</div><div class='add'>+		.probe		= an7581_phy_probe,</div><div class='add'>+		.led_blink_set	= mt798x_phy_led_blink_set,</div><div class='add'>+		.led_brightness_set = mt798x_phy_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = mt798x_phy_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = mt798x_phy_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = mt798x_phy_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = an7581_phy_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(MTK_GPHY_ID_AN7583),</div><div class='add'>+		.name		= "Airoha AN7583 PHY",</div><div class='add'>+		.config_init	= an7583_phy_config_init,</div><div class='add'>+		.probe		= an7581_phy_probe,</div><div class='ctx'> 		.led_blink_set	= mt798x_phy_led_blink_set,</div><div class='ctx'> 		.led_brightness_set = mt798x_phy_led_brightness_set,</div><div class='ctx'> 		.led_hw_is_supported = mt798x_phy_led_hw_is_supported,</div><div class='ctx'> 		.led_hw_control_set = mt798x_phy_led_hw_control_set,</div><div class='ctx'> 		.led_hw_control_get = mt798x_phy_led_hw_control_get,</div><div class='add'>+		.led_polarity_set = an7581_phy_led_polarity_set,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(mtk_socphy_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused mtk_socphy_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused mtk_socphy_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7981) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7988) },</div><div class='add'>+	{ PHY_ID_MATCH_EXACT(MTK_GPHY_ID_AN7581) },</div><div class='add'>+	{ PHY_ID_MATCH_EXACT(MTK_GPHY_ID_AN7583) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/mediatek/mtk-ge.c b/drivers/net/phy/mediatek/mtk-ge.c<br/>new file mode 100644<br/>index 000000000000..73d9b72f9d9e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mediatek/mtk-ge.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mediatek/mtk-ge.c</a></div><div class='hunk'>@@ -0,0 +1,142 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mtk.h"</div><div class='add'>+</div><div class='add'>+#define MTK_GPHY_ID_MT7530		0x03a29412</div><div class='add'>+#define MTK_GPHY_ID_MT7531		0x03a29441</div><div class='add'>+</div><div class='add'>+#define MTK_PHY_PAGE_EXTENDED_2			0x0002</div><div class='add'>+#define MTK_PHY_PAGE_EXTENDED_3			0x0003</div><div class='add'>+#define MTK_PHY_RG_LPI_PCS_DSP_CTRL_REG11	0x11</div><div class='add'>+</div><div class='add'>+#define MTK_PHY_PAGE_EXTENDED_2A30		0x2a30</div><div class='add'>+</div><div class='add'>+/* Registers on Token Ring debug nodes */</div><div class='add'>+/* ch_addr = 0x1, node_addr = 0xf, data_addr = 0x17 */</div><div class='add'>+#define SLAVE_DSP_READY_TIME_MASK		GENMASK(22, 15)</div><div class='add'>+</div><div class='add'>+/* Registers on MDIO_MMD_VEND1 */</div><div class='add'>+#define MTK_PHY_GBE_MODE_TX_DELAY_SEL		0x13</div><div class='add'>+#define MTK_PHY_TEST_MODE_TX_DELAY_SEL		0x14</div><div class='add'>+#define   MTK_TX_DELAY_PAIR_B_MASK		GENMASK(10, 8)</div><div class='add'>+#define   MTK_TX_DELAY_PAIR_D_MASK		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+#define MTK_PHY_MCC_CTRL_AND_TX_POWER_CTRL	0xa6</div><div class='add'>+#define   MTK_MCC_NEARECHO_OFFSET_MASK		GENMASK(15, 8)</div><div class='add'>+</div><div class='add'>+#define MTK_PHY_RXADC_CTRL_RG7			0xc6</div><div class='add'>+#define   MTK_PHY_DA_AD_BUF_BIAS_LP_MASK	GENMASK(9, 8)</div><div class='add'>+</div><div class='add'>+#define MTK_PHY_RG_LPI_PCS_DSP_CTRL_REG123	0x123</div><div class='add'>+#define   MTK_PHY_LPI_NORM_MSE_LO_THRESH100_MASK	GENMASK(15, 8)</div><div class='add'>+#define   MTK_PHY_LPI_NORM_MSE_HI_THRESH100_MASK	GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+static void mtk_gephy_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	/* Enable HW auto downshift */</div><div class='add'>+	phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED_1,</div><div class='add'>+			 MTK_PHY_AUX_CTRL_AND_STATUS,</div><div class='add'>+			 0, MTK_PHY_ENABLE_DOWNSHIFT);</div><div class='add'>+</div><div class='add'>+	/* Increase SlvDPSready time */</div><div class='add'>+	mtk_tr_modify(phydev, 0x1, 0xf, 0x17, SLAVE_DSP_READY_TIME_MASK,</div><div class='add'>+		      FIELD_PREP(SLAVE_DSP_READY_TIME_MASK, 0x5e));</div><div class='add'>+</div><div class='add'>+	/* Adjust 100_mse_threshold */</div><div class='add'>+	phy_modify_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+		       MTK_PHY_RG_LPI_PCS_DSP_CTRL_REG123,</div><div class='add'>+		       MTK_PHY_LPI_NORM_MSE_LO_THRESH100_MASK |</div><div class='add'>+		       MTK_PHY_LPI_NORM_MSE_HI_THRESH100_MASK,</div><div class='add'>+		       FIELD_PREP(MTK_PHY_LPI_NORM_MSE_LO_THRESH100_MASK,</div><div class='add'>+				  0xff) |</div><div class='add'>+		       FIELD_PREP(MTK_PHY_LPI_NORM_MSE_HI_THRESH100_MASK,</div><div class='add'>+				  0xff));</div><div class='add'>+</div><div class='add'>+	/* If echo time is narrower than 0x3, it will be regarded as noise */</div><div class='add'>+	phy_modify_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+		       MTK_PHY_MCC_CTRL_AND_TX_POWER_CTRL,</div><div class='add'>+		       MTK_MCC_NEARECHO_OFFSET_MASK,</div><div class='add'>+		       FIELD_PREP(MTK_MCC_NEARECHO_OFFSET_MASK, 0x3));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt7530_phy_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	mtk_gephy_config_init(phydev);</div><div class='add'>+</div><div class='add'>+	/* Increase post_update_timer */</div><div class='add'>+	phy_write_paged(phydev, MTK_PHY_PAGE_EXTENDED_3,</div><div class='add'>+			MTK_PHY_RG_LPI_PCS_DSP_CTRL_REG11, 0x4b);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt7531_phy_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	mtk_gephy_config_init(phydev);</div><div class='add'>+</div><div class='add'>+	/* PHY link down power saving enable */</div><div class='add'>+	phy_set_bits(phydev, 0x17, BIT(4));</div><div class='add'>+	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RXADC_CTRL_RG7,</div><div class='add'>+		       MTK_PHY_DA_AD_BUF_BIAS_LP_MASK,</div><div class='add'>+		       FIELD_PREP(MTK_PHY_DA_AD_BUF_BIAS_LP_MASK, 0x3));</div><div class='add'>+</div><div class='add'>+	/* Set TX Pair delay selection */</div><div class='add'>+	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_GBE_MODE_TX_DELAY_SEL,</div><div class='add'>+		       MTK_TX_DELAY_PAIR_B_MASK | MTK_TX_DELAY_PAIR_D_MASK,</div><div class='add'>+		       FIELD_PREP(MTK_TX_DELAY_PAIR_B_MASK, 0x4) |</div><div class='add'>+		       FIELD_PREP(MTK_TX_DELAY_PAIR_D_MASK, 0x4));</div><div class='add'>+	phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TEST_MODE_TX_DELAY_SEL,</div><div class='add'>+		       MTK_TX_DELAY_PAIR_B_MASK | MTK_TX_DELAY_PAIR_D_MASK,</div><div class='add'>+		       FIELD_PREP(MTK_TX_DELAY_PAIR_B_MASK, 0x4) |</div><div class='add'>+		       FIELD_PREP(MTK_TX_DELAY_PAIR_D_MASK, 0x4));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phy_driver mtk_gephy_driver[] = {</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7530),</div><div class='add'>+		.name		= "MediaTek MT7530 PHY",</div><div class='add'>+		.config_init	= mt7530_phy_config_init,</div><div class='add'>+		/* Interrupts are handled by the switch, not the PHY</div><div class='add'>+		 * itself.</div><div class='add'>+		 */</div><div class='add'>+		.config_intr	= genphy_no_config_intr,</div><div class='add'>+		.handle_interrupt = genphy_handle_interrupt_no_ack,</div><div class='add'>+		.suspend	= genphy_suspend,</div><div class='add'>+		.resume		= genphy_resume,</div><div class='add'>+		.read_page	= mtk_phy_read_page,</div><div class='add'>+		.write_page	= mtk_phy_write_page,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7531),</div><div class='add'>+		.name		= "MediaTek MT7531 PHY",</div><div class='add'>+		.config_init	= mt7531_phy_config_init,</div><div class='add'>+		/* Interrupts are handled by the switch, not the PHY</div><div class='add'>+		 * itself.</div><div class='add'>+		 */</div><div class='add'>+		.config_intr	= genphy_no_config_intr,</div><div class='add'>+		.handle_interrupt = genphy_handle_interrupt_no_ack,</div><div class='add'>+		.suspend	= genphy_suspend,</div><div class='add'>+		.resume		= genphy_resume,</div><div class='add'>+		.read_page	= mtk_phy_read_page,</div><div class='add'>+		.write_page	= mtk_phy_write_page,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_phy_driver(mtk_gephy_driver);</div><div class='add'>+</div><div class='add'>+static const struct mdio_device_id __maybe_unused mtk_gephy_tbl[] = {</div><div class='add'>+	{ PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7530) },</div><div class='add'>+	{ PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7531) },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("MediaTek Gigabit Ethernet PHY driver");</div><div class='add'>+MODULE_AUTHOR("DENG, Qingfang &lt;dqfext@gmail.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(mdio, mtk_gephy_tbl);</div><div class='head'>diff --git a/drivers/net/phy/mediatek/mtk-phy-lib.c b/drivers/net/phy/mediatek/mtk-phy-lib.c<br/>new file mode 100644<br/>index 000000000000..dfd0f4e439a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mediatek/mtk-phy-lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mediatek/mtk-phy-lib.c</a></div><div class='hunk'>@@ -0,0 +1,347 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mtk.h"</div><div class='add'>+</div><div class='add'>+/* Difference between functions with mtk_tr* and __mtk_tr* prefixes is</div><div class='add'>+ * mtk_tr* functions: wrapped by page switching operations</div><div class='add'>+ * __mtk_tr* functions: no page switching operations</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void __mtk_tr_access(struct phy_device *phydev, bool read, u8 ch_addr,</div><div class='add'>+			    u8 node_addr, u8 data_addr)</div><div class='add'>+{</div><div class='add'>+	u16 tr_cmd = BIT(15); /* bit 14 &amp; 0 are reserved */</div><div class='add'>+</div><div class='add'>+	if (read)</div><div class='add'>+		tr_cmd |= BIT(13);</div><div class='add'>+</div><div class='add'>+	tr_cmd |= (((ch_addr &amp; 0x3) &lt;&lt; 11) |</div><div class='add'>+		   ((node_addr &amp; 0xf) &lt;&lt; 7) |</div><div class='add'>+		   ((data_addr &amp; 0x3f) &lt;&lt; 1));</div><div class='add'>+	dev_dbg(&amp;phydev-&gt;mdio.dev, "tr_cmd: 0x%x\n", tr_cmd);</div><div class='add'>+	__phy_write(phydev, 0x10, tr_cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __mtk_tr_read(struct phy_device *phydev, u8 ch_addr, u8 node_addr,</div><div class='add'>+			  u8 data_addr, u16 *tr_high, u16 *tr_low)</div><div class='add'>+{</div><div class='add'>+	__mtk_tr_access(phydev, true, ch_addr, node_addr, data_addr);</div><div class='add'>+	*tr_low = __phy_read(phydev, 0x11);</div><div class='add'>+	*tr_high = __phy_read(phydev, 0x12);</div><div class='add'>+	dev_dbg(&amp;phydev-&gt;mdio.dev, "tr_high read: 0x%x, tr_low read: 0x%x\n",</div><div class='add'>+		*tr_high, *tr_low);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __mtk_tr_write(struct phy_device *phydev, u8 ch_addr, u8 node_addr,</div><div class='add'>+			   u8 data_addr, u32 tr_data)</div><div class='add'>+{</div><div class='add'>+	__phy_write(phydev, 0x11, tr_data &amp; 0xffff);</div><div class='add'>+	__phy_write(phydev, 0x12, tr_data &gt;&gt; 16);</div><div class='add'>+	dev_dbg(&amp;phydev-&gt;mdio.dev, "tr_high write: 0x%x, tr_low write: 0x%x\n",</div><div class='add'>+		tr_data &gt;&gt; 16, tr_data &amp; 0xffff);</div><div class='add'>+	__mtk_tr_access(phydev, false, ch_addr, node_addr, data_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr,</div><div class='add'>+		     u8 data_addr, u32 mask, u32 set)</div><div class='add'>+{</div><div class='add'>+	u32 tr_data;</div><div class='add'>+	u16 tr_high;</div><div class='add'>+	u16 tr_low;</div><div class='add'>+</div><div class='add'>+	__mtk_tr_read(phydev, ch_addr, node_addr, data_addr, &amp;tr_high, &amp;tr_low);</div><div class='add'>+	tr_data = (tr_high &lt;&lt; 16) | tr_low;</div><div class='add'>+	tr_data = (tr_data &amp; ~mask) | set;</div><div class='add'>+	__mtk_tr_write(phydev, ch_addr, node_addr, data_addr, tr_data);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__mtk_tr_modify);</div><div class='add'>+</div><div class='add'>+void mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr,</div><div class='add'>+		   u8 data_addr, u32 mask, u32 set)</div><div class='add'>+{</div><div class='add'>+	phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_52B5);</div><div class='add'>+	__mtk_tr_modify(phydev, ch_addr, node_addr, data_addr, mask, set);</div><div class='add'>+	phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mtk_tr_modify);</div><div class='add'>+</div><div class='add'>+void __mtk_tr_set_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr,</div><div class='add'>+		       u8 data_addr, u32 set)</div><div class='add'>+{</div><div class='add'>+	__mtk_tr_modify(phydev, ch_addr, node_addr, data_addr, 0, set);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__mtk_tr_set_bits);</div><div class='add'>+</div><div class='add'>+void __mtk_tr_clr_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr,</div><div class='add'>+		       u8 data_addr, u32 clr)</div><div class='add'>+{</div><div class='add'>+	__mtk_tr_modify(phydev, ch_addr, node_addr, data_addr, clr, 0);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__mtk_tr_clr_bits);</div><div class='add'>+</div><div class='add'>+int mtk_phy_read_page(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mtk_phy_read_page);</div><div class='add'>+</div><div class='add'>+int mtk_phy_write_page(struct phy_device *phydev, int page)</div><div class='add'>+{</div><div class='add'>+	return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mtk_phy_write_page);</div><div class='add'>+</div><div class='add'>+int mtk_phy_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='add'>+				unsigned long rules,</div><div class='add'>+				unsigned long supported_triggers)</div><div class='add'>+{</div><div class='add'>+	if (index &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* All combinations of the supported triggers are allowed */</div><div class='add'>+	if (rules &amp; ~supported_triggers)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mtk_phy_led_hw_is_supported);</div><div class='add'>+</div><div class='add'>+int mtk_phy_led_hw_ctrl_get(struct phy_device *phydev, u8 index,</div><div class='add'>+			    unsigned long *rules, u16 on_set,</div><div class='add'>+			    u16 rx_blink_set, u16 tx_blink_set)</div><div class='add'>+{</div><div class='add'>+	unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +</div><div class='add'>+				 (index ? 16 : 0);</div><div class='add'>+	unsigned int bit_netdev = MTK_PHY_LED_STATE_NETDEV + (index ? 16 : 0);</div><div class='add'>+	unsigned int bit_on = MTK_PHY_LED_STATE_FORCE_ON + (index ? 16 : 0);</div><div class='add'>+	struct mtk_socphy_priv *priv = phydev-&gt;priv;</div><div class='add'>+	int on, blink;</div><div class='add'>+</div><div class='add'>+	if (index &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	on = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+			  index ? MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL);</div><div class='add'>+</div><div class='add'>+	if (on &lt; 0)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	blink = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+			     index ? MTK_PHY_LED1_BLINK_CTRL :</div><div class='add'>+				     MTK_PHY_LED0_BLINK_CTRL);</div><div class='add'>+	if (blink &lt; 0)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if ((on &amp; (on_set | MTK_PHY_LED_ON_FDX |</div><div class='add'>+		   MTK_PHY_LED_ON_HDX | MTK_PHY_LED_ON_LINKDOWN)) ||</div><div class='add'>+	    (blink &amp; (rx_blink_set | tx_blink_set)))</div><div class='add'>+		set_bit(bit_netdev, &amp;priv-&gt;led_state);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(bit_netdev, &amp;priv-&gt;led_state);</div><div class='add'>+</div><div class='add'>+	if (on &amp; MTK_PHY_LED_ON_FORCE_ON)</div><div class='add'>+		set_bit(bit_on, &amp;priv-&gt;led_state);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(bit_on, &amp;priv-&gt;led_state);</div><div class='add'>+</div><div class='add'>+	if (blink &amp; MTK_PHY_LED_BLINK_FORCE_BLINK)</div><div class='add'>+		set_bit(bit_blink, &amp;priv-&gt;led_state);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(bit_blink, &amp;priv-&gt;led_state);</div><div class='add'>+</div><div class='add'>+	if (!rules)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (on &amp; on_set)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+</div><div class='add'>+	if (on &amp; MTK_PHY_LED_ON_LINK10)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_LINK_10);</div><div class='add'>+</div><div class='add'>+	if (on &amp; MTK_PHY_LED_ON_LINK100)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_LINK_100);</div><div class='add'>+</div><div class='add'>+	if (on &amp; MTK_PHY_LED_ON_LINK1000)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_LINK_1000);</div><div class='add'>+</div><div class='add'>+	if (on &amp; MTK_PHY_LED_ON_LINK2500)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_LINK_2500);</div><div class='add'>+</div><div class='add'>+	if (on &amp; MTK_PHY_LED_ON_FDX)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_FULL_DUPLEX);</div><div class='add'>+</div><div class='add'>+	if (on &amp; MTK_PHY_LED_ON_HDX)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_HALF_DUPLEX);</div><div class='add'>+</div><div class='add'>+	if (blink &amp; rx_blink_set)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_RX);</div><div class='add'>+</div><div class='add'>+	if (blink &amp; tx_blink_set)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_TX);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mtk_phy_led_hw_ctrl_get);</div><div class='add'>+</div><div class='add'>+int mtk_phy_led_hw_ctrl_set(struct phy_device *phydev, u8 index,</div><div class='add'>+			    unsigned long rules, u16 on_set,</div><div class='add'>+			    u16 rx_blink_set, u16 tx_blink_set)</div><div class='add'>+{</div><div class='add'>+	unsigned int bit_netdev = MTK_PHY_LED_STATE_NETDEV + (index ? 16 : 0);</div><div class='add'>+	struct mtk_socphy_priv *priv = phydev-&gt;priv;</div><div class='add'>+	u16 on = 0, blink = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (index &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_FULL_DUPLEX))</div><div class='add'>+		on |= MTK_PHY_LED_ON_FDX;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_HALF_DUPLEX))</div><div class='add'>+		on |= MTK_PHY_LED_ON_HDX;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; (BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK)))</div><div class='add'>+		on |= MTK_PHY_LED_ON_LINK10;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; (BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK)))</div><div class='add'>+		on |= MTK_PHY_LED_ON_LINK100;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; (BIT(TRIGGER_NETDEV_LINK_1000) | BIT(TRIGGER_NETDEV_LINK)))</div><div class='add'>+		on |= MTK_PHY_LED_ON_LINK1000;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; (BIT(TRIGGER_NETDEV_LINK_2500) | BIT(TRIGGER_NETDEV_LINK)))</div><div class='add'>+		on |= MTK_PHY_LED_ON_LINK2500;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_RX)) {</div><div class='add'>+		if (on &amp; on_set) {</div><div class='add'>+			if (on &amp; MTK_PHY_LED_ON_LINK10)</div><div class='add'>+				blink |= MTK_PHY_LED_BLINK_10RX;</div><div class='add'>+			if (on &amp; MTK_PHY_LED_ON_LINK100)</div><div class='add'>+				blink |= MTK_PHY_LED_BLINK_100RX;</div><div class='add'>+			if (on &amp; MTK_PHY_LED_ON_LINK1000)</div><div class='add'>+				blink |= MTK_PHY_LED_BLINK_1000RX;</div><div class='add'>+			if (on &amp; MTK_PHY_LED_ON_LINK2500)</div><div class='add'>+				blink |= MTK_PHY_LED_BLINK_2500RX;</div><div class='add'>+		} else {</div><div class='add'>+			blink |= rx_blink_set;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_TX)) {</div><div class='add'>+		if (on &amp; on_set) {</div><div class='add'>+			if (on &amp; MTK_PHY_LED_ON_LINK10)</div><div class='add'>+				blink |= MTK_PHY_LED_BLINK_10TX;</div><div class='add'>+			if (on &amp; MTK_PHY_LED_ON_LINK100)</div><div class='add'>+				blink |= MTK_PHY_LED_BLINK_100TX;</div><div class='add'>+			if (on &amp; MTK_PHY_LED_ON_LINK1000)</div><div class='add'>+				blink |= MTK_PHY_LED_BLINK_1000TX;</div><div class='add'>+			if (on &amp; MTK_PHY_LED_ON_LINK2500)</div><div class='add'>+				blink |= MTK_PHY_LED_BLINK_2500TX;</div><div class='add'>+		} else {</div><div class='add'>+			blink |= tx_blink_set;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (blink || on)</div><div class='add'>+		set_bit(bit_netdev, &amp;priv-&gt;led_state);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(bit_netdev, &amp;priv-&gt;led_state);</div><div class='add'>+</div><div class='add'>+	ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?</div><div class='add'>+			     MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL,</div><div class='add'>+			     MTK_PHY_LED_ON_FDX | MTK_PHY_LED_ON_HDX | on_set,</div><div class='add'>+			     on);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ?</div><div class='add'>+			     MTK_PHY_LED1_BLINK_CTRL :</div><div class='add'>+			     MTK_PHY_LED0_BLINK_CTRL, blink);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mtk_phy_led_hw_ctrl_set);</div><div class='add'>+</div><div class='add'>+int mtk_phy_led_num_dly_cfg(u8 index, unsigned long *delay_on,</div><div class='add'>+			    unsigned long *delay_off, bool *blinking)</div><div class='add'>+{</div><div class='add'>+	if (index &gt; 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (delay_on &amp;&amp; delay_off &amp;&amp; (*delay_on &gt; 0) &amp;&amp; (*delay_off &gt; 0)) {</div><div class='add'>+		*blinking = true;</div><div class='add'>+		*delay_on = 50;</div><div class='add'>+		*delay_off = 50;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mtk_phy_led_num_dly_cfg);</div><div class='add'>+</div><div class='add'>+int mtk_phy_hw_led_on_set(struct phy_device *phydev, u8 index,</div><div class='add'>+			  u16 led_on_mask, bool on)</div><div class='add'>+{</div><div class='add'>+	unsigned int bit_on = MTK_PHY_LED_STATE_FORCE_ON + (index ? 16 : 0);</div><div class='add'>+	struct mtk_socphy_priv *priv = phydev-&gt;priv;</div><div class='add'>+	bool changed;</div><div class='add'>+</div><div class='add'>+	if (on)</div><div class='add'>+		changed = !test_and_set_bit(bit_on, &amp;priv-&gt;led_state);</div><div class='add'>+	else</div><div class='add'>+		changed = !!test_and_clear_bit(bit_on, &amp;priv-&gt;led_state);</div><div class='add'>+</div><div class='add'>+	changed |= !!test_and_clear_bit(MTK_PHY_LED_STATE_NETDEV +</div><div class='add'>+					(index ? 16 : 0), &amp;priv-&gt;led_state);</div><div class='add'>+	if (changed)</div><div class='add'>+		return phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?</div><div class='add'>+				      MTK_PHY_LED1_ON_CTRL :</div><div class='add'>+				      MTK_PHY_LED0_ON_CTRL,</div><div class='add'>+				      led_on_mask,</div><div class='add'>+				      on ? MTK_PHY_LED_ON_FORCE_ON : 0);</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mtk_phy_hw_led_on_set);</div><div class='add'>+</div><div class='add'>+int mtk_phy_hw_led_blink_set(struct phy_device *phydev, u8 index, bool blinking)</div><div class='add'>+{</div><div class='add'>+	unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +</div><div class='add'>+				 (index ? 16 : 0);</div><div class='add'>+	struct mtk_socphy_priv *priv = phydev-&gt;priv;</div><div class='add'>+	bool changed;</div><div class='add'>+</div><div class='add'>+	if (blinking)</div><div class='add'>+		changed = !test_and_set_bit(bit_blink, &amp;priv-&gt;led_state);</div><div class='add'>+	else</div><div class='add'>+		changed = !!test_and_clear_bit(bit_blink, &amp;priv-&gt;led_state);</div><div class='add'>+</div><div class='add'>+	changed |= !!test_bit(MTK_PHY_LED_STATE_NETDEV +</div><div class='add'>+			      (index ? 16 : 0), &amp;priv-&gt;led_state);</div><div class='add'>+	if (changed)</div><div class='add'>+		return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ?</div><div class='add'>+				     MTK_PHY_LED1_BLINK_CTRL :</div><div class='add'>+				     MTK_PHY_LED0_BLINK_CTRL,</div><div class='add'>+				     blinking ?</div><div class='add'>+				     MTK_PHY_LED_BLINK_FORCE_BLINK : 0);</div><div class='add'>+	else</div><div class='add'>+		return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mtk_phy_hw_led_blink_set);</div><div class='add'>+</div><div class='add'>+void mtk_phy_leds_state_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 2; ++i)</div><div class='add'>+		phydev-&gt;drv-&gt;led_hw_control_get(phydev, i, NULL);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mtk_phy_leds_state_init);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("MediaTek Ethernet PHY driver common");</div><div class='add'>+MODULE_AUTHOR("Sky Huang &lt;SkyLake.Huang@mediatek.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Daniel Golle &lt;daniel@makrotopia.org&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/phy/mediatek/mtk.h b/drivers/net/phy/mediatek/mtk.h<br/>new file mode 100644<br/>index 000000000000..320f76ffa81f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mediatek/mtk.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mediatek/mtk.h</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0</div><div class='add'>+ *</div><div class='add'>+ * Common definition for Mediatek Ethernet PHYs</div><div class='add'>+ * Author: SkyLake Huang &lt;SkyLake.Huang@mediatek.com&gt;</div><div class='add'>+ * Copyright (c) 2024 MediaTek Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MTK_EPHY_H_</div><div class='add'>+#define _MTK_EPHY_H_</div><div class='add'>+</div><div class='add'>+#define MTK_PHY_AUX_CTRL_AND_STATUS		0x14</div><div class='add'>+#define   MTK_PHY_ENABLE_DOWNSHIFT		BIT(4)</div><div class='add'>+</div><div class='add'>+#define MTK_EXT_PAGE_ACCESS			0x1f</div><div class='add'>+#define MTK_PHY_PAGE_EXTENDED_1			0x0001</div><div class='add'>+#define MTK_PHY_PAGE_STANDARD			0x0000</div><div class='add'>+#define MTK_PHY_PAGE_EXTENDED_52B5		0x52b5</div><div class='add'>+</div><div class='add'>+/* Registers on MDIO_MMD_VEND2 */</div><div class='add'>+#define MTK_PHY_LED0_ON_CTRL			0x24</div><div class='add'>+#define MTK_PHY_LED1_ON_CTRL			0x26</div><div class='add'>+#define   MTK_GPHY_LED_ON_MASK			GENMASK(6, 0)</div><div class='add'>+#define   MTK_2P5GPHY_LED_ON_MASK		GENMASK(7, 0)</div><div class='add'>+#define   MTK_PHY_LED_ON_LINK1000		BIT(0)</div><div class='add'>+#define   MTK_PHY_LED_ON_LINK100		BIT(1)</div><div class='add'>+#define   MTK_PHY_LED_ON_LINK10			BIT(2)</div><div class='add'>+#define   MTK_PHY_LED_ON_LINKDOWN		BIT(3)</div><div class='add'>+#define   MTK_PHY_LED_ON_FDX			BIT(4) /* Full duplex */</div><div class='add'>+#define   MTK_PHY_LED_ON_HDX			BIT(5) /* Half duplex */</div><div class='add'>+#define   MTK_PHY_LED_ON_FORCE_ON		BIT(6)</div><div class='add'>+#define   MTK_PHY_LED_ON_LINK2500		BIT(7)</div><div class='add'>+#define   MTK_PHY_LED_ON_POLARITY		BIT(14)</div><div class='add'>+#define   MTK_PHY_LED_ON_ENABLE			BIT(15)</div><div class='add'>+</div><div class='add'>+#define MTK_PHY_LED0_BLINK_CTRL			0x25</div><div class='add'>+#define MTK_PHY_LED1_BLINK_CTRL			0x27</div><div class='add'>+#define   MTK_PHY_LED_BLINK_1000TX		BIT(0)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_1000RX		BIT(1)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_100TX		BIT(2)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_100RX		BIT(3)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_10TX		BIT(4)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_10RX		BIT(5)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_COLLISION		BIT(6)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_RX_CRC_ERR		BIT(7)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_RX_IDLE_ERR		BIT(8)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_FORCE_BLINK		BIT(9)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_2500TX		BIT(10)</div><div class='add'>+#define   MTK_PHY_LED_BLINK_2500RX		BIT(11)</div><div class='add'>+</div><div class='add'>+#define MTK_GPHY_LED_ON_SET			(MTK_PHY_LED_ON_LINK1000 | \</div><div class='add'>+						 MTK_PHY_LED_ON_LINK100 | \</div><div class='add'>+						 MTK_PHY_LED_ON_LINK10)</div><div class='add'>+#define MTK_GPHY_LED_RX_BLINK_SET		(MTK_PHY_LED_BLINK_1000RX | \</div><div class='add'>+						 MTK_PHY_LED_BLINK_100RX | \</div><div class='add'>+						 MTK_PHY_LED_BLINK_10RX)</div><div class='add'>+#define MTK_GPHY_LED_TX_BLINK_SET		(MTK_PHY_LED_BLINK_1000RX | \</div><div class='add'>+						 MTK_PHY_LED_BLINK_100RX | \</div><div class='add'>+						 MTK_PHY_LED_BLINK_10RX)</div><div class='add'>+</div><div class='add'>+#define MTK_2P5GPHY_LED_ON_SET			(MTK_PHY_LED_ON_LINK2500 | \</div><div class='add'>+						 MTK_GPHY_LED_ON_SET)</div><div class='add'>+#define MTK_2P5GPHY_LED_RX_BLINK_SET		(MTK_PHY_LED_BLINK_2500RX | \</div><div class='add'>+						 MTK_GPHY_LED_RX_BLINK_SET)</div><div class='add'>+#define MTK_2P5GPHY_LED_TX_BLINK_SET		(MTK_PHY_LED_BLINK_2500RX | \</div><div class='add'>+						 MTK_GPHY_LED_TX_BLINK_SET)</div><div class='add'>+</div><div class='add'>+#define MTK_PHY_LED_STATE_FORCE_ON	0</div><div class='add'>+#define MTK_PHY_LED_STATE_FORCE_BLINK	1</div><div class='add'>+#define MTK_PHY_LED_STATE_NETDEV	2</div><div class='add'>+</div><div class='add'>+struct mtk_socphy_priv {</div><div class='add'>+	unsigned long		led_state;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void __mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr,</div><div class='add'>+		     u8 data_addr, u32 mask, u32 set);</div><div class='add'>+void mtk_tr_modify(struct phy_device *phydev, u8 ch_addr, u8 node_addr,</div><div class='add'>+		   u8 data_addr, u32 mask, u32 set);</div><div class='add'>+void __mtk_tr_set_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr,</div><div class='add'>+		       u8 data_addr, u32 set);</div><div class='add'>+void __mtk_tr_clr_bits(struct phy_device *phydev, u8 ch_addr, u8 node_addr,</div><div class='add'>+		       u8 data_addr, u32 clr);</div><div class='add'>+</div><div class='add'>+int mtk_phy_read_page(struct phy_device *phydev);</div><div class='add'>+int mtk_phy_write_page(struct phy_device *phydev, int page);</div><div class='add'>+</div><div class='add'>+int mtk_phy_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='add'>+				unsigned long rules,</div><div class='add'>+				unsigned long supported_triggers);</div><div class='add'>+int mtk_phy_led_hw_ctrl_set(struct phy_device *phydev, u8 index,</div><div class='add'>+			    unsigned long rules, u16 on_set,</div><div class='add'>+			    u16 rx_blink_set, u16 tx_blink_set);</div><div class='add'>+int mtk_phy_led_hw_ctrl_get(struct phy_device *phydev, u8 index,</div><div class='add'>+			    unsigned long *rules, u16 on_set,</div><div class='add'>+			    u16 rx_blink_set, u16 tx_blink_set);</div><div class='add'>+int mtk_phy_led_num_dly_cfg(u8 index, unsigned long *delay_on,</div><div class='add'>+			    unsigned long *delay_off, bool *blinking);</div><div class='add'>+int mtk_phy_hw_led_on_set(struct phy_device *phydev, u8 index,</div><div class='add'>+			  u16 led_on_mask, bool on);</div><div class='add'>+int mtk_phy_hw_led_blink_set(struct phy_device *phydev, u8 index,</div><div class='add'>+			     bool blinking);</div><div class='add'>+void mtk_phy_leds_state_init(struct phy_device *phydev);</div><div class='add'>+</div><div class='add'>+#endif /* _MTK_EPHY_H_ */</div><div class='head'>diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c<br/>index bb9b33b6bce2..962ebbbc1348 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/meson-gxl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/meson-gxl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/meson-gxl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/meson-gxl.c</a></div><div class='hunk'>@@ -221,7 +221,7 @@ static struct phy_driver meson_gxl_phy[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused meson_gxl_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused meson_gxl_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_VENDOR(0x01814400) },</div><div class='ctx'> 	{ PHY_ID_MATCH_VENDOR(0x01803301) },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c<br/>index 43c82a87bc3a..05de68b9f719 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/micrel.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/micrel.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/micrel.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/micrel.c</a></div><div class='hunk'>@@ -34,6 +34,8 @@</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/gpio/consumer.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "phylib.h"</div><div class='add'>+</div><div class='ctx'> /* Operation Mode Strap Override */</div><div class='ctx'> #define MII_KSZPHY_OMSO				0x16</div><div class='ctx'> #define KSZPHY_OMSO_FACTORY_TEST		BIT(15)</div><div class='hunk'>@@ -99,12 +101,15 @@</div><div class='ctx'> #define LAN8814_CABLE_DIAG_VCT_DATA_MASK	GENMASK(7, 0)</div><div class='ctx'> #define LAN8814_PAIR_BIT_SHIFT			12</div><div class='ctx'> </div><div class='add'>+#define LAN8814_SKUS				0xB</div><div class='add'>+</div><div class='ctx'> #define LAN8814_WIRE_PAIR_MASK			0xF</div><div class='ctx'> </div><div class='ctx'> /* Lan8814 general Interrupt control/status reg in GPHY specific block. */</div><div class='ctx'> #define LAN8814_INTC				0x18</div><div class='ctx'> #define LAN8814_INTS				0x1B</div><div class='ctx'> </div><div class='add'>+#define LAN8814_INT_FLF				BIT(15)</div><div class='ctx'> #define LAN8814_INT_LINK_DOWN			BIT(2)</div><div class='ctx'> #define LAN8814_INT_LINK_UP			BIT(0)</div><div class='ctx'> #define LAN8814_INT_LINK			(LAN8814_INT_LINK_UP |\</div><div class='hunk'>@@ -264,6 +269,8 @@</div><div class='ctx'> </div><div class='ctx'> #define LAN8814_LED_CTRL_1			0x0</div><div class='ctx'> #define LAN8814_LED_CTRL_1_KSZ9031_LED_MODE_	BIT(6)</div><div class='add'>+#define LAN8814_LED_CTRL_2			0x1</div><div class='add'>+#define LAN8814_LED_CTRL_2_LED1_COM_DIS		BIT(8)</div><div class='ctx'> </div><div class='ctx'> /* PHY Control 1 */</div><div class='ctx'> #define MII_KSZPHY_CTRL_1			0x1e</div><div class='hunk'>@@ -360,6 +367,11 @@</div><div class='ctx'> /* Delay used to get the second part from the LTC */</div><div class='ctx'> #define LAN8841_GET_SEC_LTC_DELAY		(500 * NSEC_PER_MSEC)</div><div class='ctx'> </div><div class='add'>+#define LAN8842_REV_8832			0x8832</div><div class='add'>+</div><div class='add'>+#define LAN8814_REV_LAN8814			0x8814</div><div class='add'>+#define LAN8814_REV_LAN8818			0x8818</div><div class='add'>+</div><div class='ctx'> struct kszphy_hw_stat {</div><div class='ctx'> 	const char *string;</div><div class='ctx'> 	u8 reg;</div><div class='hunk'>@@ -429,14 +441,41 @@ struct kszphy_ptp_priv {</div><div class='ctx'> 	spinlock_t seconds_lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct kszphy_phy_stats {</div><div class='add'>+	u64 rx_err_pkt_cnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct kszphy_priv {</div><div class='ctx'> 	struct kszphy_ptp_priv ptp_priv;</div><div class='ctx'> 	const struct kszphy_type *type;</div><div class='add'>+	struct clk *clk;</div><div class='ctx'> 	int led_mode;</div><div class='ctx'> 	u16 vct_ctrl1000;</div><div class='ctx'> 	bool rmii_ref_clk_sel;</div><div class='ctx'> 	bool rmii_ref_clk_sel_val;</div><div class='add'>+	bool clk_enable;</div><div class='add'>+	bool is_ptp_available;</div><div class='ctx'> 	u64 stats[ARRAY_SIZE(kszphy_hw_stats)];</div><div class='add'>+	struct kszphy_phy_stats phy_stats;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct lan8842_phy_stats {</div><div class='add'>+	u64 rx_packets;</div><div class='add'>+	u64 rx_errors;</div><div class='add'>+	u64 tx_packets;</div><div class='add'>+	u64 tx_errors;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct lan8842_priv {</div><div class='add'>+	struct lan8842_phy_stats phy_stats;</div><div class='add'>+	struct kszphy_ptp_priv ptp_priv;</div><div class='add'>+	u16 rev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct lanphy_reg_data {</div><div class='add'>+	int page;</div><div class='add'>+	u16 addr;</div><div class='add'>+	u16 val;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct kszphy_type lan8814_type = {</div><div class='hunk'>@@ -468,6 +507,8 @@ static const struct kszphy_type ksz8051_type = {</div><div class='ctx'> </div><div class='ctx'> static const struct kszphy_type ksz8081_type = {</div><div class='ctx'> 	.led_mode_reg		= MII_KSZPHY_CTRL_2,</div><div class='add'>+	.cable_diag_reg		= KSZ8081_LMD,</div><div class='add'>+	.pair_mask		= KSZPHY_WIRE_PAIR_MASK,</div><div class='ctx'> 	.has_broadcast_disable	= true,</div><div class='ctx'> 	.has_nand_tree_disable	= true,</div><div class='ctx'> 	.has_rmii_ref_clk_sel	= true,</div><div class='hunk'>@@ -764,7 +805,8 @@ static int ksz8051_ksz8795_match_phy_device(struct phy_device *phydev,</div><div class='ctx'> 		return !ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ksz8051_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int ksz8051_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				    const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return ksz8051_ksz8795_match_phy_device(phydev, true);</div><div class='ctx'> }</div><div class='hunk'>@@ -884,7 +926,8 @@ static int ksz8061_config_init(struct phy_device *phydev)</div><div class='ctx'> 	return kszphy_config_init(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ksz8795_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int ksz8795_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				    const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return ksz8051_ksz8795_match_phy_device(phydev, false);</div><div class='ctx'> }</div><div class='hunk'>@@ -1019,7 +1062,7 @@ static int ksz9021_config_init(struct phy_device *phydev)</div><div class='ctx'> #define TX_CLK_ID			0x1f</div><div class='ctx'> </div><div class='ctx'> /* set tx and tx_clk to "No delay adjustment" to keep 0ns</div><div class='del'>- * dealy</div><div class='add'>+ * delay</div><div class='ctx'>  */</div><div class='ctx'> #define TX_ND				0x7</div><div class='ctx'> #define TX_CLK_ND			0xf</div><div class='hunk'>@@ -1028,6 +1071,29 @@ static int ksz9021_config_init(struct phy_device *phydev)</div><div class='ctx'> #define MII_KSZ9031RN_EDPD		0x23</div><div class='ctx'> #define MII_KSZ9031RN_EDPD_ENABLE	BIT(0)</div><div class='ctx'> </div><div class='add'>+static int ksz9031_set_loopback(struct phy_device *phydev, bool enable,</div><div class='add'>+				int speed)</div><div class='add'>+{</div><div class='add'>+	u16 ctl = BMCR_LOOPBACK;</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	if (!enable)</div><div class='add'>+		return genphy_loopback(phydev, enable, 0);</div><div class='add'>+</div><div class='add'>+	if (speed == SPEED_10 || speed == SPEED_100 || speed == SPEED_1000)</div><div class='add'>+		phydev-&gt;speed = speed;</div><div class='add'>+	else if (speed)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	phydev-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+</div><div class='add'>+	ctl |= mii_bmcr_encode_fixed(phydev-&gt;speed, phydev-&gt;duplex);</div><div class='add'>+</div><div class='add'>+	phy_write(phydev, MII_BMCR, ctl);</div><div class='add'>+</div><div class='add'>+	return phy_read_poll_timeout(phydev, MII_BMSR, val, val &amp; BMSR_LSTATUS,</div><div class='add'>+				     5000, 500000, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ksz9031_of_load_skew_values(struct phy_device *phydev,</div><div class='ctx'> 				       const struct device_node *of_node,</div><div class='ctx'> 				       u16 reg, size_t field_sz,</div><div class='hunk'>@@ -1689,7 +1755,8 @@ static int ksz9x31_cable_test_fault_length(struct phy_device *phydev, u16 stat)</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * distance to fault = (VCT_DATA - 22) * 4 / cable propagation velocity</div><div class='ctx'> 	 */</div><div class='del'>-	if (phydev_id_compare(phydev, PHY_ID_KSZ9131))</div><div class='add'>+	if (phydev_id_compare(phydev, PHY_ID_KSZ9131) ||</div><div class='add'>+	    phydev_id_compare(phydev, PHY_ID_KSZ9477))</div><div class='ctx'> 		dt = clamp(dt - 22, 0, 255);</div><div class='ctx'> </div><div class='ctx'> 	return (dt * 400) / 10;</div><div class='hunk'>@@ -1763,12 +1830,20 @@ static int ksz9x31_cable_test_get_status(struct phy_device *phydev,</div><div class='ctx'> 					 bool *finished)</div><div class='ctx'> {</div><div class='ctx'> 	struct kszphy_priv *priv = phydev-&gt;priv;</div><div class='del'>-	unsigned long pair_mask = 0xf;</div><div class='add'>+	unsigned long pair_mask;</div><div class='ctx'> 	int retries = 20;</div><div class='ctx'> 	int pair, ret, rv;</div><div class='ctx'> </div><div class='ctx'> 	*finished = false;</div><div class='ctx'> </div><div class='add'>+	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,</div><div class='add'>+			      phydev-&gt;supported) ||</div><div class='add'>+	    linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,</div><div class='add'>+			      phydev-&gt;supported))</div><div class='add'>+		pair_mask = 0xf; /* All pairs */</div><div class='add'>+	else</div><div class='add'>+		pair_mask = 0x3; /* Pairs A and B only */</div><div class='add'>+</div><div class='ctx'> 	/* Try harder if link partner is active */</div><div class='ctx'> 	while (pair_mask &amp;&amp; retries--) {</div><div class='ctx'> 		for_each_set_bit(pair, &amp;pair_mask, 4) {</div><div class='hunk'>@@ -1850,7 +1925,7 @@ static int ksz886x_config_aneg(struct phy_device *phydev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;autoneg != AUTONEG_ENABLE) {</div><div class='del'>-		/* When autonegotation is disabled, we need to manually force</div><div class='add'>+		/* When autonegotiation is disabled, we need to manually force</div><div class='ctx'> 		 * the link state. If we don't do this, the PHY will keep</div><div class='ctx'> 		 * sending Fast Link Pulses (FLPs) which are part of the</div><div class='ctx'> 		 * autonegotiation process. This is not desired when</div><div class='hunk'>@@ -1919,6 +1994,56 @@ static int ksz886x_read_status(struct phy_device *phydev)</div><div class='ctx'> 	return genphy_read_status(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ksz9477_mdix_update(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	if (phydev-&gt;mdix_ctrl != ETH_TP_MDI_AUTO)</div><div class='add'>+		phydev-&gt;mdix = phydev-&gt;mdix_ctrl;</div><div class='add'>+	else</div><div class='add'>+		phydev-&gt;mdix = ETH_TP_MDI_INVALID;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_read_mdix_ctrl(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	val = phy_read(phydev, MII_KSZ9131_AUTO_MDIX);</div><div class='add'>+	if (val &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+</div><div class='add'>+	if (!(val &amp; MII_KSZ9131_AUTO_MDIX_SWAP_OFF))</div><div class='add'>+		phydev-&gt;mdix_ctrl = ETH_TP_MDI_AUTO;</div><div class='add'>+	else if (val &amp; MII_KSZ9131_AUTO_MDI_SET)</div><div class='add'>+		phydev-&gt;mdix_ctrl = ETH_TP_MDI;</div><div class='add'>+	else</div><div class='add'>+		phydev-&gt;mdix_ctrl = ETH_TP_MDI_X;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_read_status(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz9477_mdix_update(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return genphy_read_status(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_config_aneg(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz9131_config_mdix(phydev, phydev-&gt;mdix_ctrl);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return genphy_config_aneg(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct ksz9477_errata_write {</div><div class='ctx'> 	u8 dev_addr;</div><div class='ctx'> 	u8 reg_addr;</div><div class='hunk'>@@ -1982,11 +2107,7 @@ static int ksz9477_phy_errata(struct phy_device *phydev)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = genphy_restart_aneg(phydev);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	return genphy_restart_aneg(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ksz9477_config_init(struct phy_device *phydev)</div><div class='hunk'>@@ -2000,11 +2121,12 @@ static int ksz9477_config_init(struct phy_device *phydev)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* According to KSZ9477 Errata DS80000754C (Module 4) all EEE modes</div><div class='del'>-	 * in this switch shall be regarded as broken.</div><div class='add'>+	/* Read initial MDI-X config state. So, we do not need to poll it</div><div class='add'>+	 * later on.</div><div class='ctx'> 	 */</div><div class='del'>-	if (phydev-&gt;dev_flags &amp; MICREL_NO_EEE)</div><div class='del'>-		phydev-&gt;eee_broken_modes = -1;</div><div class='add'>+	err = ksz9477_read_mdix_ctrl(phydev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	return kszphy_config_init(phydev);</div><div class='ctx'> }</div><div class='hunk'>@@ -2050,6 +2172,305 @@ static void kszphy_get_stats(struct phy_device *phydev,</div><div class='ctx'> 		data[i] = kszphy_get_stat(phydev, i);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* KSZ9477 PHY RXER Counter. Probably supported by other PHYs like KSZ9313,</div><div class='add'>+ * etc. The counter is incremented when the PHY receives a frame with one or</div><div class='add'>+ * more symbol errors. The counter is cleared when the register is read.</div><div class='add'>+ */</div><div class='add'>+#define MII_KSZ9477_PHY_RXER_COUNTER	0x15</div><div class='add'>+</div><div class='add'>+static int kszphy_update_stats(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct kszphy_priv *priv = phydev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read(phydev, MII_KSZ9477_PHY_RXER_COUNTER);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;phy_stats.rx_err_pkt_cnt += ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kszphy_get_phy_stats(struct phy_device *phydev,</div><div class='add'>+				 struct ethtool_eth_phy_stats *eth_stats,</div><div class='add'>+				 struct ethtool_phy_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct kszphy_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_errors = priv-&gt;phy_stats.rx_err_pkt_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Base register for Signal Quality Indicator (SQI) - Channel A</div><div class='add'>+ *</div><div class='add'>+ * MMD Address: MDIO_MMD_PMAPMD (0x01)</div><div class='add'>+ * Register:    0xAC (Channel A)</div><div class='add'>+ * Each channel (pair) has its own register:</div><div class='add'>+ *   Channel A: 0xAC</div><div class='add'>+ *   Channel B: 0xAD</div><div class='add'>+ *   Channel C: 0xAE</div><div class='add'>+ *   Channel D: 0xAF</div><div class='add'>+ */</div><div class='add'>+#define KSZ9477_MMD_SIGNAL_QUALITY_CHAN_A	0xac</div><div class='add'>+</div><div class='add'>+/* SQI field mask for bits [14:8]</div><div class='add'>+ *</div><div class='add'>+ * SQI indicates relative quality of the signal.</div><div class='add'>+ * A lower value indicates better signal quality.</div><div class='add'>+ */</div><div class='add'>+#define KSZ9477_MMD_SQI_MASK			GENMASK(14, 8)</div><div class='add'>+</div><div class='add'>+#define KSZ9477_MAX_CHANNELS			4</div><div class='add'>+#define KSZ9477_SQI_MAX				7</div><div class='add'>+</div><div class='add'>+/* Number of SQI samples to average for a stable result.</div><div class='add'>+ *</div><div class='add'>+ * Reference: KSZ9477S Datasheet DS00002392C, Section 4.1.11 (page 26)</div><div class='add'>+ * For noisy environments, a minimum of 30–50 readings is recommended.</div><div class='add'>+ */</div><div class='add'>+#define KSZ9477_SQI_SAMPLE_COUNT		40</div><div class='add'>+</div><div class='add'>+/* The hardware SQI register provides a raw value from 0-127, where a lower</div><div class='add'>+ * value indicates better signal quality. However, empirical testing has</div><div class='add'>+ * shown that only the 0-7 range is relevant for a functional link. A raw</div><div class='add'>+ * value of 8 or higher was measured directly before link drop. This aligns</div><div class='add'>+ * with the OPEN Alliance recommendation that SQI=0 should represent the</div><div class='add'>+ * pre-failure state.</div><div class='add'>+ *</div><div class='add'>+ * This table provides a non-linear mapping from the useful raw hardware</div><div class='add'>+ * values (0-7) to the standard 0-7 SQI scale, where higher is better.</div><div class='add'>+ */</div><div class='add'>+static const u8 ksz_sqi_mapping[] = {</div><div class='add'>+	7, /* raw 0 -&gt; SQI 7 */</div><div class='add'>+	7, /* raw 1 -&gt; SQI 7 */</div><div class='add'>+	6, /* raw 2 -&gt; SQI 6 */</div><div class='add'>+	5, /* raw 3 -&gt; SQI 5 */</div><div class='add'>+	4, /* raw 4 -&gt; SQI 4 */</div><div class='add'>+	3, /* raw 5 -&gt; SQI 3 */</div><div class='add'>+	2, /* raw 6 -&gt; SQI 2 */</div><div class='add'>+	1, /* raw 7 -&gt; SQI 1 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * kszphy_get_sqi - Read, average, and map Signal Quality Index (SQI)</div><div class='add'>+ * @phydev: the PHY device</div><div class='add'>+ *</div><div class='add'>+ * This function reads and processes the raw Signal Quality Index from the</div><div class='add'>+ * PHY. Based on empirical testing, a raw value of 8 or higher indicates a</div><div class='add'>+ * pre-failure state and is mapped to SQI 0. Raw values from 0-7 are</div><div class='add'>+ * mapped to the standard 0-7 SQI scale via a lookup table.</div><div class='add'>+ *</div><div class='add'>+ * Return: SQI value (0–7), or a negative errno on failure.</div><div class='add'>+ */</div><div class='add'>+static int kszphy_get_sqi(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int sum[KSZ9477_MAX_CHANNELS] = { 0 };</div><div class='add'>+	int worst_sqi = KSZ9477_SQI_MAX;</div><div class='add'>+	int i, val, raw_sqi, ch;</div><div class='add'>+	u8 channels;</div><div class='add'>+</div><div class='add'>+	/* Determine applicable channels based on link speed */</div><div class='add'>+	if (phydev-&gt;speed == SPEED_1000)</div><div class='add'>+		channels = 4;</div><div class='add'>+	else if (phydev-&gt;speed == SPEED_100)</div><div class='add'>+		channels = 1;</div><div class='add'>+	else</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Sample and accumulate SQI readings for each pair (currently only one).</div><div class='add'>+	 *</div><div class='add'>+	 * Reference: KSZ9477S Datasheet DS00002392C, Section 4.1.11 (page 26)</div><div class='add'>+	 * - The SQI register is updated every 2 µs.</div><div class='add'>+	 * - Values may fluctuate significantly, even in low-noise environments.</div><div class='add'>+	 * - For reliable estimation, average a minimum of 30–50 samples</div><div class='add'>+	 *   (recommended for noisy environments)</div><div class='add'>+	 * - In noisy environments, individual readings are highly unreliable.</div><div class='add'>+	 *</div><div class='add'>+	 * We use 40 samples per pair with a delay of 3 µs between each</div><div class='add'>+	 * read to ensure new values are captured (2 µs update interval).</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; KSZ9477_SQI_SAMPLE_COUNT; i++) {</div><div class='add'>+		for (ch = 0; ch &lt; channels; ch++) {</div><div class='add'>+			val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,</div><div class='add'>+					   KSZ9477_MMD_SIGNAL_QUALITY_CHAN_A + ch);</div><div class='add'>+			if (val &lt; 0)</div><div class='add'>+				return val;</div><div class='add'>+</div><div class='add'>+			raw_sqi = FIELD_GET(KSZ9477_MMD_SQI_MASK, val);</div><div class='add'>+			sum[ch] += raw_sqi;</div><div class='add'>+</div><div class='add'>+			/* We communicate with the PHY via MDIO via SPI or</div><div class='add'>+			 * I2C, which is relatively slow. At least slower than</div><div class='add'>+			 * the update interval of the SQI register.</div><div class='add'>+			 * So, we can skip the delay between reads.</div><div class='add'>+			 */</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate average for each channel and find the worst SQI */</div><div class='add'>+	for (ch = 0; ch &lt; channels; ch++) {</div><div class='add'>+		int avg_raw_sqi = sum[ch] / KSZ9477_SQI_SAMPLE_COUNT;</div><div class='add'>+		int mapped_sqi;</div><div class='add'>+</div><div class='add'>+		/* Handle the pre-fail/failed state first. */</div><div class='add'>+		if (avg_raw_sqi &gt;= ARRAY_SIZE(ksz_sqi_mapping))</div><div class='add'>+			mapped_sqi = 0;</div><div class='add'>+		else</div><div class='add'>+			/* Use the lookup table for the good signal range. */</div><div class='add'>+			mapped_sqi = ksz_sqi_mapping[avg_raw_sqi];</div><div class='add'>+</div><div class='add'>+		if (mapped_sqi &lt; worst_sqi)</div><div class='add'>+			worst_sqi = mapped_sqi;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return worst_sqi;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kszphy_get_sqi_max(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return KSZ9477_SQI_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kszphy_get_mse_capability(struct phy_device *phydev,</div><div class='add'>+				     struct phy_mse_capability *cap)</div><div class='add'>+{</div><div class='add'>+	/* Capabilities depend on link mode:</div><div class='add'>+	 * - 1000BASE-T: per-pair SQI registers exist =&gt; expose A..D</div><div class='add'>+	 *   and a WORST selector.</div><div class='add'>+	 * - 100BASE-TX: HW provides a single MSE/SQI reading in the "channel A"</div><div class='add'>+	 *   register, but with auto MDI-X there is no MDI-X resolution bit,</div><div class='add'>+	 *   so we cannot map that register to a specific wire pair reliably.</div><div class='add'>+	 *   To avoid misleading per-channel data, advertise only LINK.</div><div class='add'>+	 * Other speeds: no MSE exposure via this driver.</div><div class='add'>+	 *</div><div class='add'>+	 * Note: WORST is *not* a hardware selector on this family.</div><div class='add'>+	 * We expose it because the driver computes it in software</div><div class='add'>+	 * by scanning per-channel readouts (A..D) and picking the</div><div class='add'>+	 * maximum average MSE.</div><div class='add'>+	 */</div><div class='add'>+	if (phydev-&gt;speed == SPEED_1000)</div><div class='add'>+		cap-&gt;supported_caps = PHY_MSE_CAP_CHANNEL_A |</div><div class='add'>+				      PHY_MSE_CAP_CHANNEL_B |</div><div class='add'>+				      PHY_MSE_CAP_CHANNEL_C |</div><div class='add'>+				      PHY_MSE_CAP_CHANNEL_D |</div><div class='add'>+				      PHY_MSE_CAP_WORST_CHANNEL;</div><div class='add'>+	else if (phydev-&gt;speed == SPEED_100)</div><div class='add'>+		cap-&gt;supported_caps = PHY_MSE_CAP_LINK;</div><div class='add'>+	else</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	cap-&gt;max_average_mse = FIELD_MAX(KSZ9477_MMD_SQI_MASK);</div><div class='add'>+	cap-&gt;refresh_rate_ps = 2000000; /* 2 us */</div><div class='add'>+	/* Estimated from link modulation (125 MBd per channel) and documented</div><div class='add'>+	 * refresh rate of 2 us</div><div class='add'>+	 */</div><div class='add'>+	cap-&gt;num_symbols = 250;</div><div class='add'>+</div><div class='add'>+	cap-&gt;supported_caps |= PHY_MSE_CAP_AVG;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kszphy_get_mse_snapshot(struct phy_device *phydev,</div><div class='add'>+				   enum phy_mse_channel channel,</div><div class='add'>+				   struct phy_mse_snapshot *snapshot)</div><div class='add'>+{</div><div class='add'>+	u8 num_channels;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;speed == SPEED_1000)</div><div class='add'>+		num_channels = 4;</div><div class='add'>+	else if (phydev-&gt;speed == SPEED_100)</div><div class='add'>+		num_channels = 1;</div><div class='add'>+	else</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (channel == PHY_MSE_CHANNEL_WORST) {</div><div class='add'>+		u32 worst_val = 0;</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		/* WORST is implemented in software: select the maximum</div><div class='add'>+		 * average MSE across the available per-channel registers.</div><div class='add'>+		 * Only defined when multiple channels exist (1000BASE-T).</div><div class='add'>+		 */</div><div class='add'>+		if (num_channels &lt; 2)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; num_channels; i++) {</div><div class='add'>+			ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,</div><div class='add'>+					KSZ9477_MMD_SIGNAL_QUALITY_CHAN_A + i);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			ret = FIELD_GET(KSZ9477_MMD_SQI_MASK, ret);</div><div class='add'>+			if (ret &gt; worst_val)</div><div class='add'>+				worst_val = ret;</div><div class='add'>+		}</div><div class='add'>+		snapshot-&gt;average_mse = worst_val;</div><div class='add'>+	} else if (channel == PHY_MSE_CHANNEL_LINK &amp;&amp; num_channels == 1) {</div><div class='add'>+		ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,</div><div class='add'>+				   KSZ9477_MMD_SIGNAL_QUALITY_CHAN_A);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		snapshot-&gt;average_mse = FIELD_GET(KSZ9477_MMD_SQI_MASK, ret);</div><div class='add'>+	} else if (channel &gt;= PHY_MSE_CHANNEL_A &amp;&amp;</div><div class='add'>+		   channel &lt;= PHY_MSE_CHANNEL_D) {</div><div class='add'>+		/* Per-channel readouts are valid only for 1000BASE-T. */</div><div class='add'>+		if (phydev-&gt;speed != SPEED_1000)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD,</div><div class='add'>+				   KSZ9477_MMD_SIGNAL_QUALITY_CHAN_A + channel);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		snapshot-&gt;average_mse = FIELD_GET(KSZ9477_MMD_SQI_MASK, ret);</div><div class='add'>+	} else {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kszphy_enable_clk(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct kszphy_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;clk_enable &amp;&amp; priv-&gt;clk) {</div><div class='add'>+		clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+		priv-&gt;clk_enable = true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kszphy_disable_clk(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct kszphy_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;clk_enable &amp;&amp; priv-&gt;clk) {</div><div class='add'>+		clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+		priv-&gt;clk_enable = false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kszphy_generic_resume(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	kszphy_enable_clk(phydev);</div><div class='add'>+</div><div class='add'>+	return genphy_resume(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kszphy_generic_suspend(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = genphy_suspend(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	kszphy_disable_clk(phydev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int kszphy_suspend(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	/* Disable PHY Interrupts */</div><div class='hunk'>@@ -2059,7 +2480,7 @@ static int kszphy_suspend(struct phy_device *phydev)</div><div class='ctx'> 			phydev-&gt;drv-&gt;config_intr(phydev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return genphy_suspend(phydev);</div><div class='add'>+	return kszphy_generic_suspend(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void kszphy_parse_led_mode(struct phy_device *phydev)</div><div class='hunk'>@@ -2090,7 +2511,9 @@ static int kszphy_resume(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	genphy_resume(phydev);</div><div class='add'>+	ret = kszphy_generic_resume(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* After switching from power-down to normal mode, an internal global</div><div class='ctx'> 	 * reset is automatically generated. Wait a minimum of 1 ms before</div><div class='hunk'>@@ -2112,6 +2535,24 @@ static int kszphy_resume(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Because of errata DS80000700A, receiver error following software</div><div class='add'>+ * power down. Suspend and resume callbacks only disable and enable</div><div class='add'>+ * external rmii reference clock.</div><div class='add'>+ */</div><div class='add'>+static int ksz8041_resume(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	kszphy_enable_clk(phydev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8041_suspend(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	kszphy_disable_clk(phydev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ksz9477_resume(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -2159,7 +2600,10 @@ static int ksz8061_resume(struct phy_device *phydev)</div><div class='ctx'> 	if (!(ret &amp; BMCR_PDOWN))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	genphy_resume(phydev);</div><div class='add'>+	ret = kszphy_generic_resume(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	usleep_range(1000, 2000);</div><div class='ctx'> </div><div class='ctx'> 	/* Re-program the value after chip is reset. */</div><div class='hunk'>@@ -2177,6 +2621,11 @@ static int ksz8061_resume(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ksz8061_suspend(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return kszphy_suspend(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int kszphy_probe(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct kszphy_type *type = phydev-&gt;drv-&gt;driver_data;</div><div class='hunk'>@@ -2217,10 +2666,14 @@ static int kszphy_probe(struct phy_device *phydev)</div><div class='ctx'> 	} else if (!clk) {</div><div class='ctx'> 		/* unnamed clock from the generic ethernet-phy binding */</div><div class='ctx'> 		clk = devm_clk_get_optional_enabled(&amp;phydev-&gt;mdio.dev, NULL);</div><div class='del'>-		if (IS_ERR(clk))</div><div class='del'>-			return PTR_ERR(clk);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return PTR_ERR(clk);</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(clk);</div><div class='add'>+	priv-&gt;clk = clk;</div><div class='add'>+</div><div class='ctx'> 	if (ksz8041_fiber_mode(phydev))</div><div class='ctx'> 		phydev-&gt;port = PORT_FIBRE;</div><div class='ctx'> </div><div class='hunk'>@@ -2463,10 +2916,80 @@ static int ksz886x_cable_test_get_status(struct phy_device *phydev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * LAN8814_PAGE_PCS - Selects Extended Page 0.</div><div class='add'>+ *</div><div class='add'>+ * This page contains timers used for auto-negotiation, debug registers and</div><div class='add'>+ * register to configure fast link failure.</div><div class='add'>+ */</div><div class='add'>+#define LAN8814_PAGE_PCS 0</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * LAN8814_PAGE_AFE_PMA - Selects Extended Page 1.</div><div class='add'>+ *</div><div class='add'>+ * This page appears to control the Analog Front-End (AFE) and Physical</div><div class='add'>+ * Medium Attachment (PMA) layers. It is used to access registers like</div><div class='add'>+ * LAN8814_PD_CONTROLS and LAN8814_LINK_QUALITY.</div><div class='add'>+ */</div><div class='add'>+#define LAN8814_PAGE_AFE_PMA 1</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * LAN8814_PAGE_PCS_DIGITAL - Selects Extended Page 2.</div><div class='add'>+ *</div><div class='add'>+ * This page seems dedicated to the Physical Coding Sublayer (PCS) and other</div><div class='add'>+ * digital logic. It is used for MDI-X alignment (LAN8814_ALIGN_SWAP) and EEE</div><div class='add'>+ * state (LAN8814_EEE_STATE) in the LAN8814, and is repurposed for statistics</div><div class='add'>+ * and self-test counters in the LAN8842.</div><div class='add'>+ */</div><div class='add'>+#define LAN8814_PAGE_PCS_DIGITAL 2</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * LAN8814_PAGE_EEE - Selects Extended Page 3.</div><div class='add'>+ *</div><div class='add'>+ * This page contains EEE registers</div><div class='add'>+ */</div><div class='add'>+#define LAN8814_PAGE_EEE 3</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * LAN8814_PAGE_COMMON_REGS - Selects Extended Page 4.</div><div class='add'>+ *</div><div class='add'>+ * This page contains device-common registers that affect the entire chip.</div><div class='add'>+ * It includes controls for chip-level resets, strap status, GPIO,</div><div class='add'>+ * QSGMII, the shared 1588 PTP block, and the PVT monitor.</div><div class='add'>+ */</div><div class='add'>+#define LAN8814_PAGE_COMMON_REGS 4</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * LAN8814_PAGE_PORT_REGS - Selects Extended Page 5.</div><div class='add'>+ *</div><div class='add'>+ * This page contains port-specific registers that must be accessed</div><div class='add'>+ * on a per-port basis. It includes controls for port LEDs, QSGMII PCS,</div><div class='add'>+ * rate adaptation FIFOs, and the per-port 1588 TSU block.</div><div class='add'>+ */</div><div class='add'>+#define LAN8814_PAGE_PORT_REGS 5</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * LAN8814_PAGE_POWER_REGS - Selects Extended Page 28.</div><div class='add'>+ *</div><div class='add'>+ * This page contains analog control registers and power mode registers.</div><div class='add'>+ */</div><div class='add'>+#define LAN8814_PAGE_POWER_REGS 28</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * LAN8814_PAGE_SYSTEM_CTRL - Selects Extended Page 31.</div><div class='add'>+ *</div><div class='add'>+ * This page appears to hold fundamental system or global controls. In the</div><div class='add'>+ * driver, it is used by the related LAN8804 to access the</div><div class='add'>+ * LAN8814_CLOCK_MANAGEMENT register.</div><div class='add'>+ */</div><div class='add'>+#define LAN8814_PAGE_SYSTEM_CTRL 31</div><div class='add'>+</div><div class='ctx'> #define LAN_EXT_PAGE_ACCESS_CONTROL			0x16</div><div class='ctx'> #define LAN_EXT_PAGE_ACCESS_ADDRESS_DATA		0x17</div><div class='ctx'> #define LAN_EXT_PAGE_ACCESS_CTRL_EP_FUNC		0x4000</div><div class='ctx'> </div><div class='add'>+#define LAN8814_QSGMII_TX_CONFIG			0x35</div><div class='add'>+#define LAN8814_QSGMII_TX_CONFIG_QSGMII			BIT(3)</div><div class='ctx'> #define LAN8814_QSGMII_SOFT_RESET			0x43</div><div class='ctx'> #define LAN8814_QSGMII_SOFT_RESET_BIT			BIT(0)</div><div class='ctx'> #define LAN8814_QSGMII_PCS1G_ANEG_CONFIG		0x13</div><div class='hunk'>@@ -2513,6 +3036,27 @@ static int lanphy_write_page_reg(struct phy_device *phydev, int page, u16 addr,</div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int lanphy_modify_page_reg(struct phy_device *phydev, int page, u16 addr,</div><div class='add'>+				  u16 mask, u16 set)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	phy_lock_mdio_bus(phydev);</div><div class='add'>+	__phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL, page);</div><div class='add'>+	__phy_write(phydev, LAN_EXT_PAGE_ACCESS_ADDRESS_DATA, addr);</div><div class='add'>+	__phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL,</div><div class='add'>+		    (page | LAN_EXT_PAGE_ACCESS_CTRL_EP_FUNC));</div><div class='add'>+	ret = __phy_modify_changed(phydev, LAN_EXT_PAGE_ACCESS_ADDRESS_DATA,</div><div class='add'>+				   mask, set);</div><div class='add'>+	phy_unlock_mdio_bus(phydev);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		phydev_err(phydev, "__phy_modify_changed() failed: %pe\n",</div><div class='add'>+			   ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int lan8814_config_ts_intr(struct phy_device *phydev, bool enable)</div><div class='ctx'> {</div><div class='ctx'> 	u16 val = 0;</div><div class='hunk'>@@ -2523,42 +3067,52 @@ static int lan8814_config_ts_intr(struct phy_device *phydev, bool enable)</div><div class='ctx'> 		      PTP_TSU_INT_EN_PTP_RX_TS_EN_ |</div><div class='ctx'> 		      PTP_TSU_INT_EN_PTP_RX_TS_OVRFL_EN_;</div><div class='ctx'> </div><div class='del'>-	return lanphy_write_page_reg(phydev, 5, PTP_TSU_INT_EN, val);</div><div class='add'>+	return lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+				     PTP_TSU_INT_EN, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan8814_ptp_rx_ts_get(struct phy_device *phydev,</div><div class='ctx'> 				  u32 *seconds, u32 *nano_seconds, u16 *seq_id)</div><div class='ctx'> {</div><div class='del'>-	*seconds = lanphy_read_page_reg(phydev, 5, PTP_RX_INGRESS_SEC_HI);</div><div class='add'>+	*seconds = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+					PTP_RX_INGRESS_SEC_HI);</div><div class='ctx'> 	*seconds = (*seconds &lt;&lt; 16) |</div><div class='del'>-		   lanphy_read_page_reg(phydev, 5, PTP_RX_INGRESS_SEC_LO);</div><div class='add'>+		   lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+					PTP_RX_INGRESS_SEC_LO);</div><div class='ctx'> </div><div class='del'>-	*nano_seconds = lanphy_read_page_reg(phydev, 5, PTP_RX_INGRESS_NS_HI);</div><div class='add'>+	*nano_seconds = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+					     PTP_RX_INGRESS_NS_HI);</div><div class='ctx'> 	*nano_seconds = ((*nano_seconds &amp; 0x3fff) &lt;&lt; 16) |</div><div class='del'>-			lanphy_read_page_reg(phydev, 5, PTP_RX_INGRESS_NS_LO);</div><div class='add'>+			lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+					     PTP_RX_INGRESS_NS_LO);</div><div class='ctx'> </div><div class='del'>-	*seq_id = lanphy_read_page_reg(phydev, 5, PTP_RX_MSG_HEADER2);</div><div class='add'>+	*seq_id = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+				       PTP_RX_MSG_HEADER2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan8814_ptp_tx_ts_get(struct phy_device *phydev,</div><div class='ctx'> 				  u32 *seconds, u32 *nano_seconds, u16 *seq_id)</div><div class='ctx'> {</div><div class='del'>-	*seconds = lanphy_read_page_reg(phydev, 5, PTP_TX_EGRESS_SEC_HI);</div><div class='add'>+	*seconds = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+					PTP_TX_EGRESS_SEC_HI);</div><div class='ctx'> 	*seconds = *seconds &lt;&lt; 16 |</div><div class='del'>-		   lanphy_read_page_reg(phydev, 5, PTP_TX_EGRESS_SEC_LO);</div><div class='add'>+		   lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+					PTP_TX_EGRESS_SEC_LO);</div><div class='ctx'> </div><div class='del'>-	*nano_seconds = lanphy_read_page_reg(phydev, 5, PTP_TX_EGRESS_NS_HI);</div><div class='add'>+	*nano_seconds = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+					     PTP_TX_EGRESS_NS_HI);</div><div class='ctx'> 	*nano_seconds = ((*nano_seconds &amp; 0x3fff) &lt;&lt; 16) |</div><div class='del'>-			lanphy_read_page_reg(phydev, 5, PTP_TX_EGRESS_NS_LO);</div><div class='add'>+			lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+					     PTP_TX_EGRESS_NS_LO);</div><div class='ctx'> </div><div class='del'>-	*seq_id = lanphy_read_page_reg(phydev, 5, PTP_TX_MSG_HEADER2);</div><div class='add'>+	*seq_id = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+				       PTP_TX_MSG_HEADER2);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan8814_ts_info(struct mii_timestamper *mii_ts, struct kernel_ethtool_ts_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct kszphy_ptp_priv *ptp_priv = container_of(mii_ts, struct kszphy_ptp_priv, mii_ts);</div><div class='del'>-	struct phy_device *phydev = ptp_priv-&gt;phydev;</div><div class='del'>-	struct lan8814_shared_priv *shared = phydev-&gt;shared-&gt;priv;</div><div class='add'>+	struct lan8814_shared_priv *shared = phy_package_get_priv(ptp_priv-&gt;phydev);</div><div class='ctx'> </div><div class='ctx'> 	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='ctx'> 				SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='hunk'>@@ -2586,23 +3140,22 @@ static void lan8814_flush_fifo(struct phy_device *phydev, bool egress)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; FIFO_SIZE; ++i)</div><div class='del'>-		lanphy_read_page_reg(phydev, 5,</div><div class='add'>+		lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='ctx'> 				     egress ? PTP_TX_MSG_HEADER2 : PTP_RX_MSG_HEADER2);</div><div class='ctx'> </div><div class='ctx'> 	/* Read to clear overflow status bit */</div><div class='del'>-	lanphy_read_page_reg(phydev, 5, PTP_TSU_INT_STS);</div><div class='add'>+	lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS, PTP_TSU_INT_STS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lan8814_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='del'>-			    struct kernel_hwtstamp_config *config,</div><div class='del'>-			    struct netlink_ext_ack *extack)</div><div class='add'>+static int lan8814_hwtstamp_set(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct kszphy_ptp_priv *ptp_priv =</div><div class='ctx'> 			  container_of(mii_ts, struct kszphy_ptp_priv, mii_ts);</div><div class='ctx'> 	struct lan8814_ptp_rx_ts *rx_ts, *tmp;</div><div class='ctx'> 	int txcfg = 0, rxcfg = 0;</div><div class='ctx'> 	int pkt_ts_enable;</div><div class='del'>-	int tx_mod;</div><div class='ctx'> </div><div class='ctx'> 	ptp_priv-&gt;hwts_tx_type = config-&gt;tx_type;</div><div class='ctx'> 	ptp_priv-&gt;rx_filter = config-&gt;rx_filter;</div><div class='hunk'>@@ -2641,21 +3194,28 @@ static int lan8814_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> 		rxcfg |= PTP_RX_PARSE_CONFIG_IPV4_EN_ | PTP_RX_PARSE_CONFIG_IPV6_EN_;</div><div class='ctx'> 		txcfg |= PTP_TX_PARSE_CONFIG_IPV4_EN_ | PTP_TX_PARSE_CONFIG_IPV6_EN_;</div><div class='ctx'> 	}</div><div class='del'>-	lanphy_write_page_reg(ptp_priv-&gt;phydev, 5, PTP_RX_PARSE_CONFIG, rxcfg);</div><div class='del'>-	lanphy_write_page_reg(ptp_priv-&gt;phydev, 5, PTP_TX_PARSE_CONFIG, txcfg);</div><div class='add'>+	lanphy_write_page_reg(ptp_priv-&gt;phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      PTP_RX_PARSE_CONFIG, rxcfg);</div><div class='add'>+	lanphy_write_page_reg(ptp_priv-&gt;phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      PTP_TX_PARSE_CONFIG, txcfg);</div><div class='ctx'> </div><div class='ctx'> 	pkt_ts_enable = PTP_TIMESTAMP_EN_SYNC_ | PTP_TIMESTAMP_EN_DREQ_ |</div><div class='ctx'> 			PTP_TIMESTAMP_EN_PDREQ_ | PTP_TIMESTAMP_EN_PDRES_;</div><div class='del'>-	lanphy_write_page_reg(ptp_priv-&gt;phydev, 5, PTP_RX_TIMESTAMP_EN, pkt_ts_enable);</div><div class='del'>-	lanphy_write_page_reg(ptp_priv-&gt;phydev, 5, PTP_TX_TIMESTAMP_EN, pkt_ts_enable);</div><div class='add'>+	lanphy_write_page_reg(ptp_priv-&gt;phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      PTP_RX_TIMESTAMP_EN, pkt_ts_enable);</div><div class='add'>+	lanphy_write_page_reg(ptp_priv-&gt;phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      PTP_TX_TIMESTAMP_EN, pkt_ts_enable);</div><div class='ctx'> </div><div class='del'>-	tx_mod = lanphy_read_page_reg(ptp_priv-&gt;phydev, 5, PTP_TX_MOD);</div><div class='ctx'> 	if (ptp_priv-&gt;hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC) {</div><div class='del'>-		lanphy_write_page_reg(ptp_priv-&gt;phydev, 5, PTP_TX_MOD,</div><div class='del'>-				      tx_mod | PTP_TX_MOD_TX_PTP_SYNC_TS_INSERT_);</div><div class='add'>+		lanphy_modify_page_reg(ptp_priv-&gt;phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+				       PTP_TX_MOD,</div><div class='add'>+				       PTP_TX_MOD_TX_PTP_SYNC_TS_INSERT_,</div><div class='add'>+				       PTP_TX_MOD_TX_PTP_SYNC_TS_INSERT_);</div><div class='ctx'> 	} else if (ptp_priv-&gt;hwts_tx_type == HWTSTAMP_TX_ON) {</div><div class='del'>-		lanphy_write_page_reg(ptp_priv-&gt;phydev, 5, PTP_TX_MOD,</div><div class='del'>-				      tx_mod &amp; ~PTP_TX_MOD_TX_PTP_SYNC_TS_INSERT_);</div><div class='add'>+		lanphy_modify_page_reg(ptp_priv-&gt;phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+				       PTP_TX_MOD,</div><div class='add'>+				       PTP_TX_MOD_TX_PTP_SYNC_TS_INSERT_,</div><div class='add'>+				       0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (config-&gt;rx_filter != HWTSTAMP_FILTER_NONE)</div><div class='hunk'>@@ -2777,29 +3337,41 @@ static bool lan8814_rxtstamp(struct mii_timestamper *mii_ts, struct sk_buff *skb</div><div class='ctx'> static void lan8814_ptp_clock_set(struct phy_device *phydev,</div><div class='ctx'> 				  time64_t sec, u32 nsec)</div><div class='ctx'> {</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_CLOCK_SET_SEC_LO, lower_16_bits(sec));</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_CLOCK_SET_SEC_MID, upper_16_bits(sec));</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_CLOCK_SET_SEC_HI, upper_32_bits(sec));</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_CLOCK_SET_NS_LO, lower_16_bits(nsec));</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_CLOCK_SET_NS_HI, upper_16_bits(nsec));</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      PTP_CLOCK_SET_SEC_LO, lower_16_bits(sec));</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      PTP_CLOCK_SET_SEC_MID, upper_16_bits(sec));</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      PTP_CLOCK_SET_SEC_HI, upper_32_bits(sec));</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      PTP_CLOCK_SET_NS_LO, lower_16_bits(nsec));</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      PTP_CLOCK_SET_NS_HI, upper_16_bits(nsec));</div><div class='ctx'> </div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_CMD_CTL, PTP_CMD_CTL_PTP_CLOCK_LOAD_);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_CMD_CTL,</div><div class='add'>+			      PTP_CMD_CTL_PTP_CLOCK_LOAD_);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan8814_ptp_clock_get(struct phy_device *phydev,</div><div class='ctx'> 				  time64_t *sec, u32 *nsec)</div><div class='ctx'> {</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_CMD_CTL, PTP_CMD_CTL_PTP_CLOCK_READ_);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_CMD_CTL,</div><div class='add'>+			      PTP_CMD_CTL_PTP_CLOCK_READ_);</div><div class='ctx'> </div><div class='del'>-	*sec = lanphy_read_page_reg(phydev, 4, PTP_CLOCK_READ_SEC_HI);</div><div class='add'>+	*sec = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				    PTP_CLOCK_READ_SEC_HI);</div><div class='ctx'> 	*sec &lt;&lt;= 16;</div><div class='del'>-	*sec |= lanphy_read_page_reg(phydev, 4, PTP_CLOCK_READ_SEC_MID);</div><div class='add'>+	*sec |= lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				     PTP_CLOCK_READ_SEC_MID);</div><div class='ctx'> 	*sec &lt;&lt;= 16;</div><div class='del'>-	*sec |= lanphy_read_page_reg(phydev, 4, PTP_CLOCK_READ_SEC_LO);</div><div class='add'>+	*sec |= lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				     PTP_CLOCK_READ_SEC_LO);</div><div class='ctx'> </div><div class='del'>-	*nsec = lanphy_read_page_reg(phydev, 4, PTP_CLOCK_READ_NS_HI);</div><div class='add'>+	*nsec = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				     PTP_CLOCK_READ_NS_HI);</div><div class='ctx'> 	*nsec &lt;&lt;= 16;</div><div class='del'>-	*nsec |= lanphy_read_page_reg(phydev, 4, PTP_CLOCK_READ_NS_LO);</div><div class='add'>+	*nsec |= lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				      PTP_CLOCK_READ_NS_LO);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan8814_ptpci_gettime64(struct ptp_clock_info *ptpci,</div><div class='hunk'>@@ -2838,14 +3410,18 @@ static void lan8814_ptp_set_target(struct phy_device *phydev, int event,</div><div class='ctx'> 				   s64 start_sec, u32 start_nsec)</div><div class='ctx'> {</div><div class='ctx'> 	/* Set the start time */</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_PTP_CLOCK_TARGET_SEC_LO(event),</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      LAN8814_PTP_CLOCK_TARGET_SEC_LO(event),</div><div class='ctx'> 			      lower_16_bits(start_sec));</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_PTP_CLOCK_TARGET_SEC_HI(event),</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      LAN8814_PTP_CLOCK_TARGET_SEC_HI(event),</div><div class='ctx'> 			      upper_16_bits(start_sec));</div><div class='ctx'> </div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_PTP_CLOCK_TARGET_NS_LO(event),</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      LAN8814_PTP_CLOCK_TARGET_NS_LO(event),</div><div class='ctx'> 			      lower_16_bits(start_nsec));</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_PTP_CLOCK_TARGET_NS_HI(event),</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      LAN8814_PTP_CLOCK_TARGET_NS_HI(event),</div><div class='ctx'> 			      upper_16_bits(start_nsec) &amp; 0x3fff);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2943,9 +3519,11 @@ static void lan8814_ptp_clock_step(struct phy_device *phydev,</div><div class='ctx'> 			adjustment_value_lo = adjustment_value &amp; 0xffff;</div><div class='ctx'> 			adjustment_value_hi = (adjustment_value &gt;&gt; 16) &amp; 0x3fff;</div><div class='ctx'> </div><div class='del'>-			lanphy_write_page_reg(phydev, 4, PTP_LTC_STEP_ADJ_LO,</div><div class='add'>+			lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					      PTP_LTC_STEP_ADJ_LO,</div><div class='ctx'> 					      adjustment_value_lo);</div><div class='del'>-			lanphy_write_page_reg(phydev, 4, PTP_LTC_STEP_ADJ_HI,</div><div class='add'>+			lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					      PTP_LTC_STEP_ADJ_HI,</div><div class='ctx'> 					      PTP_LTC_STEP_ADJ_DIR_ |</div><div class='ctx'> 					      adjustment_value_hi);</div><div class='ctx'> 			seconds -= ((s32)adjustment_value);</div><div class='hunk'>@@ -2963,9 +3541,11 @@ static void lan8814_ptp_clock_step(struct phy_device *phydev,</div><div class='ctx'> 			adjustment_value_lo = adjustment_value &amp; 0xffff;</div><div class='ctx'> 			adjustment_value_hi = (adjustment_value &gt;&gt; 16) &amp; 0x3fff;</div><div class='ctx'> </div><div class='del'>-			lanphy_write_page_reg(phydev, 4, PTP_LTC_STEP_ADJ_LO,</div><div class='add'>+			lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					      PTP_LTC_STEP_ADJ_LO,</div><div class='ctx'> 					      adjustment_value_lo);</div><div class='del'>-			lanphy_write_page_reg(phydev, 4, PTP_LTC_STEP_ADJ_HI,</div><div class='add'>+			lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					      PTP_LTC_STEP_ADJ_HI,</div><div class='ctx'> 					      adjustment_value_hi);</div><div class='ctx'> 			seconds += ((s32)adjustment_value);</div><div class='ctx'> </div><div class='hunk'>@@ -2973,8 +3553,8 @@ static void lan8814_ptp_clock_step(struct phy_device *phydev,</div><div class='ctx'> 			set_seconds += adjustment_value;</div><div class='ctx'> 			lan8814_ptp_update_target(phydev, set_seconds);</div><div class='ctx'> 		}</div><div class='del'>-		lanphy_write_page_reg(phydev, 4, PTP_CMD_CTL,</div><div class='del'>-				      PTP_CMD_CTL_PTP_LTC_STEP_SEC_);</div><div class='add'>+		lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				      PTP_CMD_CTL, PTP_CMD_CTL_PTP_LTC_STEP_SEC_);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (nano_seconds) {</div><div class='ctx'> 		u16 nano_seconds_lo;</div><div class='hunk'>@@ -2983,12 +3563,14 @@ static void lan8814_ptp_clock_step(struct phy_device *phydev,</div><div class='ctx'> 		nano_seconds_lo = nano_seconds &amp; 0xffff;</div><div class='ctx'> 		nano_seconds_hi = (nano_seconds &gt;&gt; 16) &amp; 0x3fff;</div><div class='ctx'> </div><div class='del'>-		lanphy_write_page_reg(phydev, 4, PTP_LTC_STEP_ADJ_LO,</div><div class='add'>+		lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				      PTP_LTC_STEP_ADJ_LO,</div><div class='ctx'> 				      nano_seconds_lo);</div><div class='del'>-		lanphy_write_page_reg(phydev, 4, PTP_LTC_STEP_ADJ_HI,</div><div class='add'>+		lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				      PTP_LTC_STEP_ADJ_HI,</div><div class='ctx'> 				      PTP_LTC_STEP_ADJ_DIR_ |</div><div class='ctx'> 				      nano_seconds_hi);</div><div class='del'>-		lanphy_write_page_reg(phydev, 4, PTP_CMD_CTL,</div><div class='add'>+		lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_CMD_CTL,</div><div class='ctx'> 				      PTP_CMD_CTL_PTP_LTC_STEP_NSEC_);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -3030,8 +3612,10 @@ static int lan8814_ptpci_adjfine(struct ptp_clock_info *ptpci, long scaled_ppm)</div><div class='ctx'> 		kszphy_rate_adj_hi |= PTP_CLOCK_RATE_ADJ_DIR_;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;shared-&gt;shared_lock);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_CLOCK_RATE_ADJ_HI, kszphy_rate_adj_hi);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_CLOCK_RATE_ADJ_LO, kszphy_rate_adj_lo);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_CLOCK_RATE_ADJ_HI,</div><div class='add'>+			      kszphy_rate_adj_hi);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_CLOCK_RATE_ADJ_LO,</div><div class='add'>+			      kszphy_rate_adj_lo);</div><div class='ctx'> 	mutex_unlock(&amp;shared-&gt;shared_lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3040,17 +3624,17 @@ static int lan8814_ptpci_adjfine(struct ptp_clock_info *ptpci, long scaled_ppm)</div><div class='ctx'> static void lan8814_ptp_set_reload(struct phy_device *phydev, int event,</div><div class='ctx'> 				   s64 period_sec, u32 period_nsec)</div><div class='ctx'> {</div><div class='del'>-	lanphy_write_page_reg(phydev, 4,</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='ctx'> 			      LAN8814_PTP_CLOCK_TARGET_RELOAD_SEC_LO(event),</div><div class='ctx'> 			      lower_16_bits(period_sec));</div><div class='del'>-	lanphy_write_page_reg(phydev, 4,</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='ctx'> 			      LAN8814_PTP_CLOCK_TARGET_RELOAD_SEC_HI(event),</div><div class='ctx'> 			      upper_16_bits(period_sec));</div><div class='ctx'> </div><div class='del'>-	lanphy_write_page_reg(phydev, 4,</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='ctx'> 			      LAN8814_PTP_CLOCK_TARGET_RELOAD_NS_LO(event),</div><div class='ctx'> 			      lower_16_bits(period_nsec));</div><div class='del'>-	lanphy_write_page_reg(phydev, 4,</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='ctx'> 			      LAN8814_PTP_CLOCK_TARGET_RELOAD_NS_HI(event),</div><div class='ctx'> 			      upper_16_bits(period_nsec) &amp; 0x3fff);</div><div class='ctx'> }</div><div class='hunk'>@@ -3058,73 +3642,72 @@ static void lan8814_ptp_set_reload(struct phy_device *phydev, int event,</div><div class='ctx'> static void lan8814_ptp_enable_event(struct phy_device *phydev, int event,</div><div class='ctx'> 				     int pulse_width)</div><div class='ctx'> {</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 4, LAN8814_PTP_GENERAL_CONFIG);</div><div class='del'>-	/* Set the pulse width of the event */</div><div class='del'>-	val &amp;= ~(LAN8814_PTP_GENERAL_CONFIG_LTC_EVENT_MASK(event));</div><div class='del'>-	/* Make sure that the target clock will be incremented each time when</div><div class='add'>+	/* Set the pulse width of the event,</div><div class='add'>+	 * Make sure that the target clock will be incremented each time when</div><div class='ctx'> 	 * local time reaches or pass it</div><div class='add'>+	 * Set the polarity high</div><div class='ctx'> 	 */</div><div class='del'>-	val |= LAN8814_PTP_GENERAL_CONFIG_LTC_EVENT_SET(event, pulse_width);</div><div class='del'>-	val &amp;= ~(LAN8814_PTP_GENERAL_CONFIG_RELOAD_ADD_X(event));</div><div class='del'>-	/* Set the polarity high */</div><div class='del'>-	val |= LAN8814_PTP_GENERAL_CONFIG_POLARITY_X(event);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_PTP_GENERAL_CONFIG, val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, LAN8814_PTP_GENERAL_CONFIG,</div><div class='add'>+			       LAN8814_PTP_GENERAL_CONFIG_LTC_EVENT_MASK(event) |</div><div class='add'>+			       LAN8814_PTP_GENERAL_CONFIG_LTC_EVENT_SET(event, pulse_width) |</div><div class='add'>+			       LAN8814_PTP_GENERAL_CONFIG_RELOAD_ADD_X(event) |</div><div class='add'>+			       LAN8814_PTP_GENERAL_CONFIG_POLARITY_X(event),</div><div class='add'>+			       LAN8814_PTP_GENERAL_CONFIG_LTC_EVENT_SET(event, pulse_width) |</div><div class='add'>+			       LAN8814_PTP_GENERAL_CONFIG_POLARITY_X(event));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan8814_ptp_disable_event(struct phy_device *phydev, int event)</div><div class='ctx'> {</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='ctx'> 	/* Set target to too far in the future, effectively disabling it */</div><div class='ctx'> 	lan8814_ptp_set_target(phydev, event, 0xFFFFFFFF, 0);</div><div class='ctx'> </div><div class='del'>-	/* And then reload once it recheas the target */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 4, LAN8814_PTP_GENERAL_CONFIG);</div><div class='del'>-	val |= LAN8814_PTP_GENERAL_CONFIG_RELOAD_ADD_X(event);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_PTP_GENERAL_CONFIG, val);</div><div class='add'>+	/* And then reload once it reaches the target */</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, LAN8814_PTP_GENERAL_CONFIG,</div><div class='add'>+			       LAN8814_PTP_GENERAL_CONFIG_RELOAD_ADD_X(event),</div><div class='add'>+			       LAN8814_PTP_GENERAL_CONFIG_RELOAD_ADD_X(event));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan8814_ptp_perout_off(struct phy_device *phydev, int pin)</div><div class='ctx'> {</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='ctx'> 	/* Disable gpio alternate function,</div><div class='ctx'> 	 * 1: select as gpio,</div><div class='ctx'> 	 * 0: select alt func</div><div class='ctx'> 	 */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 4, LAN8814_GPIO_EN_ADDR(pin));</div><div class='del'>-	val |= LAN8814_GPIO_EN_BIT(pin);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_GPIO_EN_ADDR(pin), val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       LAN8814_GPIO_EN_ADDR(pin),</div><div class='add'>+			       LAN8814_GPIO_EN_BIT(pin),</div><div class='add'>+			       LAN8814_GPIO_EN_BIT(pin));</div><div class='ctx'> </div><div class='del'>-	val = lanphy_read_page_reg(phydev, 4, LAN8814_GPIO_DIR_ADDR(pin));</div><div class='del'>-	val &amp;= ~LAN8814_GPIO_DIR_BIT(pin);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_GPIO_DIR_ADDR(pin), val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       LAN8814_GPIO_DIR_ADDR(pin),</div><div class='add'>+			       LAN8814_GPIO_DIR_BIT(pin),</div><div class='add'>+			       0);</div><div class='ctx'> </div><div class='del'>-	val = lanphy_read_page_reg(phydev, 4, LAN8814_GPIO_BUF_ADDR(pin));</div><div class='del'>-	val &amp;= ~LAN8814_GPIO_BUF_BIT(pin);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_GPIO_BUF_ADDR(pin), val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       LAN8814_GPIO_BUF_ADDR(pin),</div><div class='add'>+			       LAN8814_GPIO_BUF_BIT(pin),</div><div class='add'>+			       0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan8814_ptp_perout_on(struct phy_device *phydev, int pin)</div><div class='ctx'> {</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='ctx'> 	/* Set as gpio output */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 4, LAN8814_GPIO_DIR_ADDR(pin));</div><div class='del'>-	val |= LAN8814_GPIO_DIR_BIT(pin);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_GPIO_DIR_ADDR(pin), val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       LAN8814_GPIO_DIR_ADDR(pin),</div><div class='add'>+			       LAN8814_GPIO_DIR_BIT(pin),</div><div class='add'>+			       LAN8814_GPIO_DIR_BIT(pin));</div><div class='ctx'> </div><div class='ctx'> 	/* Enable gpio 0:for alternate function, 1:gpio */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 4, LAN8814_GPIO_EN_ADDR(pin));</div><div class='del'>-	val &amp;= ~LAN8814_GPIO_EN_BIT(pin);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_GPIO_EN_ADDR(pin), val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       LAN8814_GPIO_EN_ADDR(pin),</div><div class='add'>+			       LAN8814_GPIO_EN_BIT(pin),</div><div class='add'>+			       0);</div><div class='ctx'> </div><div class='ctx'> 	/* Set buffer type to push pull */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 4, LAN8814_GPIO_BUF_ADDR(pin));</div><div class='del'>-	val |= LAN8814_GPIO_BUF_BIT(pin);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_GPIO_BUF_ADDR(pin), val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       LAN8814_GPIO_BUF_ADDR(pin),</div><div class='add'>+			       LAN8814_GPIO_BUF_BIT(pin),</div><div class='add'>+			       LAN8814_GPIO_BUF_BIT(pin));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan8814_ptp_perout(struct ptp_clock_info *ptpci,</div><div class='hunk'>@@ -3138,10 +3721,6 @@ static int lan8814_ptp_perout(struct ptp_clock_info *ptpci,</div><div class='ctx'> 	int pulse_width;</div><div class='ctx'> 	int pin, event;</div><div class='ctx'> </div><div class='del'>-	/* Reject requests with unsupported flags */</div><div class='del'>-	if (rq-&gt;perout.flags &amp; ~PTP_PEROUT_DUTY_CYCLE)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	mutex_lock(&amp;shared-&gt;shared_lock);</div><div class='ctx'> 	event = rq-&gt;perout.index;</div><div class='ctx'> 	pin = ptp_find_pin(shared-&gt;ptp_clock, PTP_PF_PEROUT, event);</div><div class='hunk'>@@ -3243,61 +3822,64 @@ static int lan8814_ptp_perout(struct ptp_clock_info *ptpci,</div><div class='ctx'> </div><div class='ctx'> static void lan8814_ptp_extts_on(struct phy_device *phydev, int pin, u32 flags)</div><div class='ctx'> {</div><div class='del'>-	u16 tmp;</div><div class='del'>-</div><div class='ctx'> 	/* Set as gpio input */</div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, LAN8814_GPIO_DIR_ADDR(pin));</div><div class='del'>-	tmp &amp;= ~LAN8814_GPIO_DIR_BIT(pin);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_GPIO_DIR_ADDR(pin), tmp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       LAN8814_GPIO_DIR_ADDR(pin),</div><div class='add'>+			       LAN8814_GPIO_DIR_BIT(pin),</div><div class='add'>+			       0);</div><div class='ctx'> </div><div class='ctx'> 	/* Map the pin to ltc pin 0 of the capture map registers */</div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, PTP_GPIO_CAP_MAP_LO);</div><div class='del'>-	tmp |= pin;</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_GPIO_CAP_MAP_LO, tmp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       PTP_GPIO_CAP_MAP_LO, pin, pin);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable capture on the edges of the ltc pin */</div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, PTP_GPIO_CAP_EN);</div><div class='ctx'> 	if (flags &amp; PTP_RISING_EDGE)</div><div class='del'>-		tmp |= PTP_GPIO_CAP_EN_GPIO_RE_CAPTURE_ENABLE(0);</div><div class='add'>+		lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				       PTP_GPIO_CAP_EN,</div><div class='add'>+				       PTP_GPIO_CAP_EN_GPIO_RE_CAPTURE_ENABLE(0),</div><div class='add'>+				       PTP_GPIO_CAP_EN_GPIO_RE_CAPTURE_ENABLE(0));</div><div class='ctx'> 	if (flags &amp; PTP_FALLING_EDGE)</div><div class='del'>-		tmp |= PTP_GPIO_CAP_EN_GPIO_FE_CAPTURE_ENABLE(0);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_GPIO_CAP_EN, tmp);</div><div class='add'>+		lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				       PTP_GPIO_CAP_EN,</div><div class='add'>+				       PTP_GPIO_CAP_EN_GPIO_FE_CAPTURE_ENABLE(0),</div><div class='add'>+				       PTP_GPIO_CAP_EN_GPIO_FE_CAPTURE_ENABLE(0));</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupt top interrupt */</div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, PTP_COMMON_INT_ENA);</div><div class='del'>-	tmp |= PTP_COMMON_INT_ENA_GPIO_CAP_EN;</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_COMMON_INT_ENA, tmp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_COMMON_INT_ENA,</div><div class='add'>+			       PTP_COMMON_INT_ENA_GPIO_CAP_EN,</div><div class='add'>+			       PTP_COMMON_INT_ENA_GPIO_CAP_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan8814_ptp_extts_off(struct phy_device *phydev, int pin)</div><div class='ctx'> {</div><div class='del'>-	u16 tmp;</div><div class='del'>-</div><div class='ctx'> 	/* Set as gpio out */</div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, LAN8814_GPIO_DIR_ADDR(pin));</div><div class='del'>-	tmp |= LAN8814_GPIO_DIR_BIT(pin);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_GPIO_DIR_ADDR(pin), tmp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       LAN8814_GPIO_DIR_ADDR(pin),</div><div class='add'>+			       LAN8814_GPIO_DIR_BIT(pin),</div><div class='add'>+			       LAN8814_GPIO_DIR_BIT(pin));</div><div class='ctx'> </div><div class='ctx'> 	/* Enable alternate, 0:for alternate function, 1:gpio */</div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, LAN8814_GPIO_EN_ADDR(pin));</div><div class='del'>-	tmp &amp;= ~LAN8814_GPIO_EN_BIT(pin);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_GPIO_EN_ADDR(pin), tmp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       LAN8814_GPIO_EN_ADDR(pin),</div><div class='add'>+			       LAN8814_GPIO_EN_BIT(pin),</div><div class='add'>+			       0);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear the mapping of pin to registers 0 of the capture registers */</div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, PTP_GPIO_CAP_MAP_LO);</div><div class='del'>-	tmp &amp;= ~GENMASK(3, 0);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_GPIO_CAP_MAP_LO, tmp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			       PTP_GPIO_CAP_MAP_LO,</div><div class='add'>+			       GENMASK(3, 0),</div><div class='add'>+			       0);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable capture on both of the edges */</div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, PTP_GPIO_CAP_EN);</div><div class='del'>-	tmp &amp;= ~PTP_GPIO_CAP_EN_GPIO_RE_CAPTURE_ENABLE(pin);</div><div class='del'>-	tmp &amp;= ~PTP_GPIO_CAP_EN_GPIO_FE_CAPTURE_ENABLE(pin);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_GPIO_CAP_EN, tmp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_GPIO_CAP_EN,</div><div class='add'>+			       PTP_GPIO_CAP_EN_GPIO_RE_CAPTURE_ENABLE(pin) |</div><div class='add'>+			       PTP_GPIO_CAP_EN_GPIO_FE_CAPTURE_ENABLE(pin),</div><div class='add'>+			       0);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable interrupt top interrupt */</div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, PTP_COMMON_INT_ENA);</div><div class='del'>-	tmp &amp;= ~PTP_COMMON_INT_ENA_GPIO_CAP_EN;</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_COMMON_INT_ENA, tmp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_COMMON_INT_ENA,</div><div class='add'>+			       PTP_COMMON_INT_ENA_GPIO_CAP_EN,</div><div class='add'>+			       0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan8814_ptp_extts(struct ptp_clock_info *ptpci,</div><div class='hunk'>@@ -3308,11 +3890,6 @@ static int lan8814_ptp_extts(struct ptp_clock_info *ptpci,</div><div class='ctx'> 	struct phy_device *phydev = shared-&gt;phydev;</div><div class='ctx'> 	int pin;</div><div class='ctx'> </div><div class='del'>-	if (rq-&gt;extts.flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-				PTP_EXTTS_EDGES |</div><div class='del'>-				PTP_STRICT_FLAGS))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	pin = ptp_find_pin(shared-&gt;ptp_clock, PTP_PF_EXTTS,</div><div class='ctx'> 			   rq-&gt;extts.index);</div><div class='ctx'> 	if (pin == -1 || pin != LAN8814_PTP_EXTTS_NUM)</div><div class='hunk'>@@ -3432,7 +4009,8 @@ static void lan8814_get_tx_ts(struct kszphy_ptp_priv *ptp_priv)</div><div class='ctx'> 		/* If other timestamps are available in the FIFO,</div><div class='ctx'> 		 * process them.</div><div class='ctx'> 		 */</div><div class='del'>-		reg = lanphy_read_page_reg(phydev, 5, PTP_CAP_INFO);</div><div class='add'>+		reg = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+					   PTP_CAP_INFO);</div><div class='ctx'> 	} while (PTP_CAP_INFO_TX_TS_CNT_GET_(reg) &gt; 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3505,7 +4083,8 @@ static void lan8814_get_rx_ts(struct kszphy_ptp_priv *ptp_priv)</div><div class='ctx'> 		/* If other timestamps are available in the FIFO,</div><div class='ctx'> 		 * process them.</div><div class='ctx'> 		 */</div><div class='del'>-		reg = lanphy_read_page_reg(phydev, 5, PTP_CAP_INFO);</div><div class='add'>+		reg = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+					   PTP_CAP_INFO);</div><div class='ctx'> 	} while (PTP_CAP_INFO_RX_TS_CNT_GET_(reg) &gt; 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3542,31 +4121,40 @@ static int lan8814_gpio_process_cap(struct lan8814_shared_priv *shared)</div><div class='ctx'> 	/* This is 0 because whatever was the input pin it was mapped it to</div><div class='ctx'> 	 * ltc gpio pin 0</div><div class='ctx'> 	 */</div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, PTP_GPIO_SEL);</div><div class='del'>-	tmp |= PTP_GPIO_SEL_GPIO_SEL(0);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_GPIO_SEL, tmp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_GPIO_SEL,</div><div class='add'>+			       PTP_GPIO_SEL_GPIO_SEL(0),</div><div class='add'>+			       PTP_GPIO_SEL_GPIO_SEL(0));</div><div class='ctx'> </div><div class='del'>-	tmp = lanphy_read_page_reg(phydev, 4, PTP_GPIO_CAP_STS);</div><div class='add'>+	tmp = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				   PTP_GPIO_CAP_STS);</div><div class='ctx'> 	if (!(tmp &amp; PTP_GPIO_CAP_STS_PTP_GPIO_RE_STS(0)) &amp;&amp;</div><div class='ctx'> 	    !(tmp &amp; PTP_GPIO_CAP_STS_PTP_GPIO_FE_STS(0)))</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	if (tmp &amp; BIT(0)) {</div><div class='del'>-		sec = lanphy_read_page_reg(phydev, 4, PTP_GPIO_RE_LTC_SEC_HI_CAP);</div><div class='add'>+		sec = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					   PTP_GPIO_RE_LTC_SEC_HI_CAP);</div><div class='ctx'> 		sec &lt;&lt;= 16;</div><div class='del'>-		sec |= lanphy_read_page_reg(phydev, 4, PTP_GPIO_RE_LTC_SEC_LO_CAP);</div><div class='add'>+		sec |= lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					    PTP_GPIO_RE_LTC_SEC_LO_CAP);</div><div class='ctx'> </div><div class='del'>-		nsec = lanphy_read_page_reg(phydev, 4, PTP_GPIO_RE_LTC_NS_HI_CAP) &amp; 0x3fff;</div><div class='add'>+		nsec = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					    PTP_GPIO_RE_LTC_NS_HI_CAP) &amp; 0x3fff;</div><div class='ctx'> 		nsec &lt;&lt;= 16;</div><div class='del'>-		nsec |= lanphy_read_page_reg(phydev, 4, PTP_GPIO_RE_LTC_NS_LO_CAP);</div><div class='add'>+		nsec |= lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					     PTP_GPIO_RE_LTC_NS_LO_CAP);</div><div class='ctx'> 	} else {</div><div class='del'>-		sec = lanphy_read_page_reg(phydev, 4, PTP_GPIO_FE_LTC_SEC_HI_CAP);</div><div class='add'>+		sec = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					   PTP_GPIO_FE_LTC_SEC_HI_CAP);</div><div class='ctx'> 		sec &lt;&lt;= 16;</div><div class='del'>-		sec |= lanphy_read_page_reg(phydev, 4, PTP_GPIO_FE_LTC_SEC_LO_CAP);</div><div class='add'>+		sec |= lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					    PTP_GPIO_FE_LTC_SEC_LO_CAP);</div><div class='ctx'> </div><div class='del'>-		nsec = lanphy_read_page_reg(phydev, 4, PTP_GPIO_FE_LTC_NS_HI_CAP) &amp; 0x3fff;</div><div class='add'>+		nsec = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					    PTP_GPIO_FE_LTC_NS_HI_CAP) &amp; 0x3fff;</div><div class='ctx'> 		nsec &lt;&lt;= 16;</div><div class='del'>-		nsec |= lanphy_read_page_reg(phydev, 4, PTP_GPIO_RE_LTC_NS_LO_CAP);</div><div class='add'>+		nsec |= lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					     PTP_GPIO_RE_LTC_NS_LO_CAP);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ptp_event.index = 0;</div><div class='hunk'>@@ -3579,7 +4167,7 @@ static int lan8814_gpio_process_cap(struct lan8814_shared_priv *shared)</div><div class='ctx'> </div><div class='ctx'> static int lan8814_handle_gpio_interrupt(struct phy_device *phydev, u16 status)</div><div class='ctx'> {</div><div class='del'>-	struct lan8814_shared_priv *shared = phydev-&gt;shared-&gt;priv;</div><div class='add'>+	struct lan8814_shared_priv *shared = phy_package_get_priv(phydev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;shared-&gt;shared_lock);</div><div class='hunk'>@@ -3591,19 +4179,17 @@ static int lan8814_handle_gpio_interrupt(struct phy_device *phydev, u16 status)</div><div class='ctx'> </div><div class='ctx'> static int lan8804_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='ctx'> 	/* MDI-X setting for swap A,B transmit */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 2, LAN8804_ALIGN_SWAP);</div><div class='del'>-	val &amp;= ~LAN8804_ALIGN_TX_A_B_SWAP_MASK;</div><div class='del'>-	val |= LAN8804_ALIGN_TX_A_B_SWAP;</div><div class='del'>-	lanphy_write_page_reg(phydev, 2, LAN8804_ALIGN_SWAP, val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_PCS_DIGITAL, LAN8804_ALIGN_SWAP,</div><div class='add'>+			       LAN8804_ALIGN_TX_A_B_SWAP_MASK,</div><div class='add'>+			       LAN8804_ALIGN_TX_A_B_SWAP);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure that the PHY will not stop generating the clock when the</div><div class='ctx'> 	 * link partner goes down</div><div class='ctx'> 	 */</div><div class='del'>-	lanphy_write_page_reg(phydev, 31, LAN8814_CLOCK_MANAGEMENT, 0x27e);</div><div class='del'>-	lanphy_read_page_reg(phydev, 1, LAN8814_LINK_QUALITY);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_SYSTEM_CTRL,</div><div class='add'>+			      LAN8814_CLOCK_MANAGEMENT, 0x27e);</div><div class='add'>+	lanphy_read_page_reg(phydev, LAN8814_PAGE_AFE_PMA, LAN8814_LINK_QUALITY);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3668,6 +4254,17 @@ static int lan8804_config_intr(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Check if the PHY has 1588 support. There are multiple skus of the PHY and</div><div class='add'>+ * some of them support PTP while others don't support it. This function will</div><div class='add'>+ * return true is the sku supports it, otherwise will return false.</div><div class='add'>+ */</div><div class='add'>+static bool lan8814_has_ptp(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct kszphy_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;is_ptp_available;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static irqreturn_t lan8814_handle_interrupt(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = IRQ_NONE;</div><div class='hunk'>@@ -3684,8 +4281,12 @@ static irqreturn_t lan8814_handle_interrupt(struct phy_device *phydev)</div><div class='ctx'> 		ret = IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!lan8814_has_ptp(phydev))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	while (true) {</div><div class='del'>-		irq_status = lanphy_read_page_reg(phydev, 5, PTP_TSU_INT_STS);</div><div class='add'>+		irq_status = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+						  PTP_TSU_INT_STS);</div><div class='ctx'> 		if (!irq_status)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -3713,7 +4314,7 @@ static int lan8814_config_intr(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_INTR_CTRL_REG,</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, LAN8814_INTR_CTRL_REG,</div><div class='ctx'> 			      LAN8814_INTR_CTRL_REG_POLARITY |</div><div class='ctx'> 			      LAN8814_INTR_CTRL_REG_INTR_ENABLE);</div><div class='ctx'> </div><div class='hunk'>@@ -3739,35 +4340,44 @@ static void lan8814_ptp_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct kszphy_priv *priv = phydev-&gt;priv;</div><div class='ctx'> 	struct kszphy_ptp_priv *ptp_priv = &amp;priv-&gt;ptp_priv;</div><div class='del'>-	u32 temp;</div><div class='ctx'> </div><div class='ctx'> 	if (!IS_ENABLED(CONFIG_PTP_1588_CLOCK) ||</div><div class='ctx'> 	    !IS_ENABLED(CONFIG_NETWORK_PHY_TIMESTAMPING))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	lanphy_write_page_reg(phydev, 5, TSU_HARD_RESET, TSU_HARD_RESET_);</div><div class='add'>+	if (!lan8814_has_ptp(phydev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      TSU_HARD_RESET, TSU_HARD_RESET_);</div><div class='ctx'> </div><div class='del'>-	temp = lanphy_read_page_reg(phydev, 5, PTP_TX_MOD);</div><div class='del'>-	temp |= PTP_TX_MOD_BAD_UDPV4_CHKSUM_FORCE_FCS_DIS_;</div><div class='del'>-	lanphy_write_page_reg(phydev, 5, PTP_TX_MOD, temp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_PORT_REGS, PTP_TX_MOD,</div><div class='add'>+			       PTP_TX_MOD_BAD_UDPV4_CHKSUM_FORCE_FCS_DIS_,</div><div class='add'>+			       PTP_TX_MOD_BAD_UDPV4_CHKSUM_FORCE_FCS_DIS_);</div><div class='ctx'> </div><div class='del'>-	temp = lanphy_read_page_reg(phydev, 5, PTP_RX_MOD);</div><div class='del'>-	temp |= PTP_RX_MOD_BAD_UDPV4_CHKSUM_FORCE_FCS_DIS_;</div><div class='del'>-	lanphy_write_page_reg(phydev, 5, PTP_RX_MOD, temp);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_PORT_REGS, PTP_RX_MOD,</div><div class='add'>+			       PTP_RX_MOD_BAD_UDPV4_CHKSUM_FORCE_FCS_DIS_,</div><div class='add'>+			       PTP_RX_MOD_BAD_UDPV4_CHKSUM_FORCE_FCS_DIS_);</div><div class='ctx'> </div><div class='del'>-	lanphy_write_page_reg(phydev, 5, PTP_RX_PARSE_CONFIG, 0);</div><div class='del'>-	lanphy_write_page_reg(phydev, 5, PTP_TX_PARSE_CONFIG, 0);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      PTP_RX_PARSE_CONFIG, 0);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      PTP_TX_PARSE_CONFIG, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Removing default registers configs related to L2 and IP */</div><div class='del'>-	lanphy_write_page_reg(phydev, 5, PTP_TX_PARSE_L2_ADDR_EN, 0);</div><div class='del'>-	lanphy_write_page_reg(phydev, 5, PTP_RX_PARSE_L2_ADDR_EN, 0);</div><div class='del'>-	lanphy_write_page_reg(phydev, 5, PTP_TX_PARSE_IP_ADDR_EN, 0);</div><div class='del'>-	lanphy_write_page_reg(phydev, 5, PTP_RX_PARSE_IP_ADDR_EN, 0);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      PTP_TX_PARSE_L2_ADDR_EN, 0);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      PTP_RX_PARSE_L2_ADDR_EN, 0);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      PTP_TX_PARSE_IP_ADDR_EN, 0);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      PTP_RX_PARSE_IP_ADDR_EN, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable checking for minorVersionPTP field */</div><div class='del'>-	lanphy_write_page_reg(phydev, 5, PTP_RX_VERSION,</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS, PTP_RX_VERSION,</div><div class='ctx'> 			      PTP_MAX_VERSION(0xff) | PTP_MIN_VERSION(0x0));</div><div class='del'>-	lanphy_write_page_reg(phydev, 5, PTP_TX_VERSION,</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS, PTP_TX_VERSION,</div><div class='ctx'> 			      PTP_MAX_VERSION(0xff) | PTP_MIN_VERSION(0x0));</div><div class='ctx'> </div><div class='ctx'> 	skb_queue_head_init(&amp;ptp_priv-&gt;tx_queue);</div><div class='hunk'>@@ -3779,7 +4389,7 @@ static void lan8814_ptp_init(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	ptp_priv-&gt;mii_ts.rxtstamp = lan8814_rxtstamp;</div><div class='ctx'> 	ptp_priv-&gt;mii_ts.txtstamp = lan8814_txtstamp;</div><div class='del'>-	ptp_priv-&gt;mii_ts.hwtstamp = lan8814_hwtstamp;</div><div class='add'>+	ptp_priv-&gt;mii_ts.hwtstamp_set = lan8814_hwtstamp_set;</div><div class='ctx'> 	ptp_priv-&gt;mii_ts.ts_info  = lan8814_ts_info;</div><div class='ctx'> </div><div class='ctx'> 	phydev-&gt;mii_ts = &amp;ptp_priv-&gt;mii_ts;</div><div class='hunk'>@@ -3788,26 +4398,29 @@ static void lan8814_ptp_init(struct phy_device *phydev)</div><div class='ctx'> 	phydev-&gt;default_timestamp = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lan8814_ptp_probe_once(struct phy_device *phydev)</div><div class='add'>+static int __lan8814_ptp_probe_once(struct phy_device *phydev, char *pin_name,</div><div class='add'>+				    int gpios)</div><div class='ctx'> {</div><div class='del'>-	struct lan8814_shared_priv *shared = phydev-&gt;shared-&gt;priv;</div><div class='add'>+	struct lan8814_shared_priv *shared = phy_package_get_priv(phydev);</div><div class='add'>+</div><div class='add'>+	shared-&gt;phydev = phydev;</div><div class='ctx'> </div><div class='ctx'> 	/* Initialise shared lock for clock*/</div><div class='ctx'> 	mutex_init(&amp;shared-&gt;shared_lock);</div><div class='ctx'> </div><div class='ctx'> 	shared-&gt;pin_config = devm_kmalloc_array(&amp;phydev-&gt;mdio.dev,</div><div class='del'>-						LAN8814_PTP_GPIO_NUM,</div><div class='add'>+						gpios,</div><div class='ctx'> 						sizeof(*shared-&gt;pin_config),</div><div class='ctx'> 						GFP_KERNEL);</div><div class='ctx'> 	if (!shared-&gt;pin_config)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	for (int i = 0; i &lt; LAN8814_PTP_GPIO_NUM; i++) {</div><div class='add'>+	for (int i = 0; i &lt; gpios; i++) {</div><div class='ctx'> 		struct ptp_pin_desc *ptp_pin = &amp;shared-&gt;pin_config[i];</div><div class='ctx'> </div><div class='ctx'> 		memset(ptp_pin, 0, sizeof(*ptp_pin));</div><div class='ctx'> 		snprintf(ptp_pin-&gt;name,</div><div class='del'>-			 sizeof(ptp_pin-&gt;name), "lan8814_ptp_pin_%02d", i);</div><div class='add'>+			 sizeof(ptp_pin-&gt;name), "%s_%02d", pin_name, i);</div><div class='ctx'> 		ptp_pin-&gt;index = i;</div><div class='ctx'> 		ptp_pin-&gt;func =  PTP_PF_NONE;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3817,8 +4430,12 @@ static int lan8814_ptp_probe_once(struct phy_device *phydev)</div><div class='ctx'> 	shared-&gt;ptp_clock_info.max_adj = 31249999;</div><div class='ctx'> 	shared-&gt;ptp_clock_info.n_alarm = 0;</div><div class='ctx'> 	shared-&gt;ptp_clock_info.n_ext_ts = LAN8814_PTP_EXTTS_NUM;</div><div class='del'>-	shared-&gt;ptp_clock_info.n_pins = LAN8814_PTP_GPIO_NUM;</div><div class='add'>+	shared-&gt;ptp_clock_info.n_pins = gpios;</div><div class='ctx'> 	shared-&gt;ptp_clock_info.pps = 0;</div><div class='add'>+	shared-&gt;ptp_clock_info.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+						       PTP_FALLING_EDGE |</div><div class='add'>+						       PTP_STRICT_FLAGS;</div><div class='add'>+	shared-&gt;ptp_clock_info.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE;</div><div class='ctx'> 	shared-&gt;ptp_clock_info.pin_config = shared-&gt;pin_config;</div><div class='ctx'> 	shared-&gt;ptp_clock_info.n_per_out = LAN8814_PTP_PEROUT_NUM;</div><div class='ctx'> 	shared-&gt;ptp_clock_info.adjfine = lan8814_ptpci_adjfine;</div><div class='hunk'>@@ -3832,8 +4449,8 @@ static int lan8814_ptp_probe_once(struct phy_device *phydev)</div><div class='ctx'> 	shared-&gt;ptp_clock = ptp_clock_register(&amp;shared-&gt;ptp_clock_info,</div><div class='ctx'> 					       &amp;phydev-&gt;mdio.dev);</div><div class='ctx'> 	if (IS_ERR(shared-&gt;ptp_clock)) {</div><div class='del'>-		phydev_err(phydev, "ptp_clock_register failed %lu\n",</div><div class='del'>-			   PTR_ERR(shared-&gt;ptp_clock));</div><div class='add'>+		phydev_err(phydev, "ptp_clock_register failed %pe\n",</div><div class='add'>+			   shared-&gt;ptp_clock);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3843,55 +4460,72 @@ static int lan8814_ptp_probe_once(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	phydev_dbg(phydev, "successfully registered ptp clock\n");</div><div class='ctx'> </div><div class='del'>-	shared-&gt;phydev = phydev;</div><div class='del'>-</div><div class='ctx'> 	/* The EP.4 is shared between all the PHYs in the package and also it</div><div class='ctx'> 	 * can be accessed by any of the PHYs</div><div class='ctx'> 	 */</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LTC_HARD_RESET, LTC_HARD_RESET_);</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_OPERATING_MODE,</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      LTC_HARD_RESET, LTC_HARD_RESET_);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_OPERATING_MODE,</div><div class='ctx'> 			      PTP_OPERATING_MODE_STANDALONE_);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable ptp to run LTC clock for ptp and gpio 1PPS operation */</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, PTP_CMD_CTL, PTP_CMD_CTL_PTP_ENABLE_);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, PTP_CMD_CTL,</div><div class='add'>+			      PTP_CMD_CTL_PTP_ENABLE_);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int lan8814_ptp_probe_once(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	if (!lan8814_has_ptp(phydev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return __lan8814_ptp_probe_once(phydev, "lan8814_ptp_pin",</div><div class='add'>+					LAN8814_PTP_GPIO_NUM);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void lan8814_setup_led(struct phy_device *phydev, int val)</div><div class='ctx'> {</div><div class='ctx'> 	int temp;</div><div class='ctx'> </div><div class='del'>-	temp = lanphy_read_page_reg(phydev, 5, LAN8814_LED_CTRL_1);</div><div class='add'>+	temp = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+				    LAN8814_LED_CTRL_1);</div><div class='ctx'> </div><div class='ctx'> 	if (val)</div><div class='ctx'> 		temp |= LAN8814_LED_CTRL_1_KSZ9031_LED_MODE_;</div><div class='ctx'> 	else</div><div class='ctx'> 		temp &amp;= ~LAN8814_LED_CTRL_1_KSZ9031_LED_MODE_;</div><div class='ctx'> </div><div class='del'>-	lanphy_write_page_reg(phydev, 5, LAN8814_LED_CTRL_1, temp);</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+			      LAN8814_LED_CTRL_1, temp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan8814_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct kszphy_priv *lan8814 = phydev-&gt;priv;</div><div class='del'>-	int val;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	/* Reset the PHY */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 4, LAN8814_QSGMII_SOFT_RESET);</div><div class='del'>-	val |= LAN8814_QSGMII_SOFT_RESET_BIT;</div><div class='del'>-	lanphy_write_page_reg(phydev, 4, LAN8814_QSGMII_SOFT_RESET, val);</div><div class='add'>+	/* Based on the interface type select how the advertise ability is</div><div class='add'>+	 * encoded, to set as SGMII or as USGMII.</div><div class='add'>+	 */</div><div class='add'>+	if (phydev-&gt;interface == PHY_INTERFACE_MODE_QSGMII)</div><div class='add'>+		ret = lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					     LAN8814_QSGMII_TX_CONFIG,</div><div class='add'>+					     LAN8814_QSGMII_TX_CONFIG_QSGMII,</div><div class='add'>+					     LAN8814_QSGMII_TX_CONFIG_QSGMII);</div><div class='add'>+	else</div><div class='add'>+		ret = lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+					     LAN8814_QSGMII_TX_CONFIG,</div><div class='add'>+					     LAN8814_QSGMII_TX_CONFIG_QSGMII,</div><div class='add'>+					     0);</div><div class='ctx'> </div><div class='del'>-	/* Disable ANEG with QSGMII PCS Host side */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 5, LAN8814_QSGMII_PCS1G_ANEG_CONFIG);</div><div class='del'>-	val &amp;= ~LAN8814_QSGMII_PCS1G_ANEG_CONFIG_ANEG_ENA;</div><div class='del'>-	lanphy_write_page_reg(phydev, 5, LAN8814_QSGMII_PCS1G_ANEG_CONFIG, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* MDI-X setting for swap A,B transmit */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 2, LAN8814_ALIGN_SWAP);</div><div class='del'>-	val &amp;= ~LAN8814_ALIGN_TX_A_B_SWAP_MASK;</div><div class='del'>-	val |= LAN8814_ALIGN_TX_A_B_SWAP;</div><div class='del'>-	lanphy_write_page_reg(phydev, 2, LAN8814_ALIGN_SWAP, val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_PCS_DIGITAL, LAN8814_ALIGN_SWAP,</div><div class='add'>+			       LAN8814_ALIGN_TX_A_B_SWAP_MASK,</div><div class='add'>+			       LAN8814_ALIGN_TX_A_B_SWAP);</div><div class='ctx'> </div><div class='ctx'> 	if (lan8814-&gt;led_mode &gt;= 0)</div><div class='ctx'> 		lan8814_setup_led(phydev, lan8814-&gt;led_mode);</div><div class='hunk'>@@ -3922,29 +4556,24 @@ static int lan8814_release_coma_mode(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static void lan8814_clear_2psp_bit(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='ctx'> 	/* It was noticed that when traffic is passing through the PHY and the</div><div class='del'>-	 * cable is removed then the LED was still one even though there is no</div><div class='add'>+	 * cable is removed then the LED was still on even though there is no</div><div class='ctx'> 	 * link</div><div class='ctx'> 	 */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 2, LAN8814_EEE_STATE);</div><div class='del'>-	val &amp;= ~LAN8814_EEE_STATE_MASK2P5P;</div><div class='del'>-	lanphy_write_page_reg(phydev, 2, LAN8814_EEE_STATE, val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_PCS_DIGITAL, LAN8814_EEE_STATE,</div><div class='add'>+			       LAN8814_EEE_STATE_MASK2P5P,</div><div class='add'>+			       0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan8814_update_meas_time(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='ctx'> 	/* By setting the measure time to a value of 0xb this will allow cables</div><div class='ctx'> 	 * longer than 100m to be used. This configuration can be used</div><div class='ctx'> 	 * regardless of the mode of operation of the PHY</div><div class='ctx'> 	 */</div><div class='del'>-	val = lanphy_read_page_reg(phydev, 1, LAN8814_PD_CONTROLS);</div><div class='del'>-	val &amp;= ~LAN8814_PD_CONTROLS_PD_MEAS_TIME_MASK;</div><div class='del'>-	val |= LAN8814_PD_CONTROLS_PD_MEAS_TIME_VAL;</div><div class='del'>-	lanphy_write_page_reg(phydev, 1, LAN8814_PD_CONTROLS, val);</div><div class='add'>+	lanphy_modify_page_reg(phydev, LAN8814_PAGE_AFE_PMA, LAN8814_PD_CONTROLS,</div><div class='add'>+			       LAN8814_PD_CONTROLS_PD_MEAS_TIME_MASK,</div><div class='add'>+			       LAN8814_PD_CONTROLS_PD_MEAS_TIME_VAL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan8814_probe(struct phy_device *phydev)</div><div class='hunk'>@@ -3967,11 +4596,29 @@ static int lan8814_probe(struct phy_device *phydev)</div><div class='ctx'> 	/* Strap-in value for PHY address, below register read gives starting</div><div class='ctx'> 	 * phy address value</div><div class='ctx'> 	 */</div><div class='del'>-	addr = lanphy_read_page_reg(phydev, 4, 0) &amp; 0x1F;</div><div class='add'>+	addr = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS, 0) &amp; 0x1F;</div><div class='ctx'> 	devm_phy_package_join(&amp;phydev-&gt;mdio.dev, phydev,</div><div class='ctx'> 			      addr, sizeof(struct lan8814_shared_priv));</div><div class='ctx'> </div><div class='add'>+	/* There are lan8814 SKUs that don't support PTP. Make sure that for</div><div class='add'>+	 * those skus no PTP device is created. Here we check if the SKU</div><div class='add'>+	 * supports PTP.</div><div class='add'>+	 */</div><div class='add'>+	err = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				   LAN8814_SKUS);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;is_ptp_available = err == LAN8814_REV_LAN8814 ||</div><div class='add'>+				 err == LAN8814_REV_LAN8818;</div><div class='add'>+</div><div class='ctx'> 	if (phy_package_init_once(phydev)) {</div><div class='add'>+		/* Reset the PHY */</div><div class='add'>+		lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				       LAN8814_QSGMII_SOFT_RESET,</div><div class='add'>+				       LAN8814_QSGMII_SOFT_RESET_BIT,</div><div class='add'>+				       LAN8814_QSGMII_SOFT_RESET_BIT);</div><div class='add'>+</div><div class='ctx'> 		err = lan8814_release_coma_mode(phydev);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='hunk'>@@ -4068,7 +4715,7 @@ static int lan8841_config_init(struct phy_device *phydev)</div><div class='ctx'> 	phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG,</div><div class='ctx'> 		      LAN8841_PTP_TX_VERSION, 0xff00);</div><div class='ctx'> </div><div class='del'>-	/* 100BT Clause 40 improvenent errata */</div><div class='add'>+	/* 100BT Clause 40 improvement errata */</div><div class='ctx'> 	phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG,</div><div class='ctx'> 		      LAN8841_ANALOG_CONTROL_1,</div><div class='ctx'> 		      LAN8841_ANALOG_CONTROL_1_PLL_TRIM(0x2));</div><div class='hunk'>@@ -4395,9 +5042,9 @@ static void lan8841_ptp_enable_processing(struct kszphy_ptp_priv *ptp_priv,</div><div class='ctx'> #define LAN8841_PTP_TX_TIMESTAMP_EN		443</div><div class='ctx'> #define LAN8841_PTP_TX_MOD			445</div><div class='ctx'> </div><div class='del'>-static int lan8841_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='del'>-			    struct kernel_hwtstamp_config *config,</div><div class='del'>-			    struct netlink_ext_ack *extack)</div><div class='add'>+static int lan8841_hwtstamp_set(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct kszphy_ptp_priv *ptp_priv = container_of(mii_ts, struct kszphy_ptp_priv, mii_ts);</div><div class='ctx'> 	struct phy_device *phydev = ptp_priv-&gt;phydev;</div><div class='hunk'>@@ -4970,9 +5617,6 @@ static int lan8841_ptp_perout(struct ptp_clock_info *ptp,</div><div class='ctx'> 	int pin;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (rq-&gt;perout.flags &amp; ~PTP_PEROUT_DUTY_CYCLE)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	pin = ptp_find_pin(ptp_priv-&gt;ptp_clock, PTP_PF_PEROUT, rq-&gt;perout.index);</div><div class='ctx'> 	if (pin == -1 || pin &gt;= LAN8841_PTP_GPIO_NUM)</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -5091,7 +5735,7 @@ static int lan8841_ptp_extts_on(struct kszphy_ptp_priv *ptp_priv, int pin,</div><div class='ctx'> 	u16 tmp = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	/* Set GPIO to be intput */</div><div class='add'>+	/* Set GPIO to be input */</div><div class='ctx'> 	ret = phy_set_bits_mmd(phydev, 2, LAN8841_GPIO_EN, BIT(pin));</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -5216,6 +5860,7 @@ static struct ptp_clock_info lan8841_ptp_clock_info = {</div><div class='ctx'> 	.n_per_out      = LAN8841_PTP_GPIO_NUM,</div><div class='ctx'> 	.n_ext_ts       = LAN8841_PTP_GPIO_NUM,</div><div class='ctx'> 	.n_pins         = LAN8841_PTP_GPIO_NUM,</div><div class='add'>+	.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define LAN8841_OPERATION_MODE_STRAP_LOW_REGISTER 3</div><div class='hunk'>@@ -5263,8 +5908,8 @@ static int lan8841_probe(struct phy_device *phydev)</div><div class='ctx'> 	ptp_priv-&gt;ptp_clock = ptp_clock_register(&amp;ptp_priv-&gt;ptp_clock_info,</div><div class='ctx'> 						 &amp;phydev-&gt;mdio.dev);</div><div class='ctx'> 	if (IS_ERR(ptp_priv-&gt;ptp_clock)) {</div><div class='del'>-		phydev_err(phydev, "ptp_clock_register failed: %lu\n",</div><div class='del'>-			   PTR_ERR(ptp_priv-&gt;ptp_clock));</div><div class='add'>+		phydev_err(phydev, "ptp_clock_register failed: %pe\n",</div><div class='add'>+			   ptp_priv-&gt;ptp_clock);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5279,7 +5924,7 @@ static int lan8841_probe(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	ptp_priv-&gt;mii_ts.rxtstamp = lan8841_rxtstamp;</div><div class='ctx'> 	ptp_priv-&gt;mii_ts.txtstamp = lan8814_txtstamp;</div><div class='del'>-	ptp_priv-&gt;mii_ts.hwtstamp = lan8841_hwtstamp;</div><div class='add'>+	ptp_priv-&gt;mii_ts.hwtstamp_set = lan8841_hwtstamp_set;</div><div class='ctx'> 	ptp_priv-&gt;mii_ts.ts_info = lan8841_ts_info;</div><div class='ctx'> </div><div class='ctx'> 	phydev-&gt;mii_ts = &amp;ptp_priv-&gt;mii_ts;</div><div class='hunk'>@@ -5290,6 +5935,21 @@ static int lan8841_probe(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int lan8804_resume(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return kszphy_resume(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan8804_suspend(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return kszphy_generic_suspend(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan8841_resume(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return kszphy_generic_resume(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int lan8841_suspend(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct kszphy_priv *priv = phydev-&gt;priv;</div><div class='hunk'>@@ -5298,13 +5958,521 @@ static int lan8841_suspend(struct phy_device *phydev)</div><div class='ctx'> 	if (ptp_priv-&gt;ptp_clock)</div><div class='ctx'> 		ptp_cancel_worker_sync(ptp_priv-&gt;ptp_clock);</div><div class='ctx'> </div><div class='del'>-	return genphy_suspend(phydev);</div><div class='add'>+	return kszphy_generic_suspend(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9131_resume(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	if (phydev-&gt;suspended &amp;&amp; phy_interface_is_rgmii(phydev))</div><div class='add'>+		ksz9131_config_rgmii_delay(phydev);</div><div class='add'>+</div><div class='add'>+	return kszphy_resume(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define LAN8842_PTP_GPIO_NUM 16</div><div class='add'>+</div><div class='add'>+static int lan8842_ptp_probe_once(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return __lan8814_ptp_probe_once(phydev, "lan8842_ptp_pin",</div><div class='add'>+					LAN8842_PTP_GPIO_NUM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define LAN8842_STRAP_REG			0 /* 0x0 */</div><div class='add'>+#define LAN8842_STRAP_REG_PHYADDR_MASK		GENMASK(4, 0)</div><div class='add'>+#define LAN8842_SKU_REG				11 /* 0x0b */</div><div class='add'>+#define LAN8842_SELF_TEST			14 /* 0x0e */</div><div class='add'>+#define LAN8842_SELF_TEST_RX_CNT_ENA		BIT(8)</div><div class='add'>+#define LAN8842_SELF_TEST_TX_CNT_ENA		BIT(4)</div><div class='add'>+</div><div class='add'>+static int lan8842_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct lan8842_priv *priv;</div><div class='add'>+	int addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;phydev-&gt;mdio.dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	phydev-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	/* Similar to lan8814 this PHY has a pin which needs to be pulled down</div><div class='add'>+	 * to enable to pass any traffic through it. Therefore use the same</div><div class='add'>+	 * function as lan8814</div><div class='add'>+	 */</div><div class='add'>+	ret = lan8814_release_coma_mode(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Enable to count the RX and TX packets */</div><div class='add'>+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_PCS_DIGITAL,</div><div class='add'>+				    LAN8842_SELF_TEST,</div><div class='add'>+				    LAN8842_SELF_TEST_RX_CNT_ENA |</div><div class='add'>+				    LAN8842_SELF_TEST_TX_CNT_ENA);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Revision lan8832 doesn't have support for PTP, therefore don't add</div><div class='add'>+	 * any PTP clocks</div><div class='add'>+	 */</div><div class='add'>+	ret = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				   LAN8842_SKU_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;rev = ret;</div><div class='add'>+	if (priv-&gt;rev == LAN8842_REV_8832)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* As the lan8814 and lan8842 has the same IP for the PTP block, the</div><div class='add'>+	 * only difference is the number of the GPIOs, then make sure that the</div><div class='add'>+	 * lan8842 initialized also the shared data pointer as this is used in</div><div class='add'>+	 * all the PTP functions for lan8814. The lan8842 doesn't have multiple</div><div class='add'>+	 * PHYs in the same package.</div><div class='add'>+	 */</div><div class='add'>+	addr = lanphy_read_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				    LAN8842_STRAP_REG);</div><div class='add'>+	if (addr &lt; 0)</div><div class='add'>+		return addr;</div><div class='add'>+	addr &amp;= LAN8842_STRAP_REG_PHYADDR_MASK;</div><div class='add'>+</div><div class='add'>+	ret = devm_phy_package_join(&amp;phydev-&gt;mdio.dev, phydev, addr,</div><div class='add'>+				    sizeof(struct lan8814_shared_priv));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (phy_package_init_once(phydev)) {</div><div class='add'>+		ret = lan8842_ptp_probe_once(phydev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lan8814_ptp_init(phydev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_3_ANEG_MDI		0x13</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_4_ANEG_MDIX		0x14</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_5_10BT_MDI		0x15</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_6_10BT_MDIX		0x16</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_7_100BT_TRAIN		0x17</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_8_100BT_MDI		0x18</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_9_100BT_EEE_MDI_TX	0x19</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_10_100BT_EEE_MDI_RX	0x1a</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_11_100BT_MDIX		0x1b</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_12_100BT_EEE_MDIX_TX	0x1c</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_13_100BT_EEE_MDIX_RX	0x1d</div><div class='add'>+#define LAN8814_POWER_MGMT_MODE_14_100BTX_EEE_TX_RX	0x1e</div><div class='add'>+</div><div class='add'>+#define LAN8814_POWER_MGMT_DLLPD_D			BIT(0)</div><div class='add'>+#define LAN8814_POWER_MGMT_ADCPD_D			BIT(1)</div><div class='add'>+#define LAN8814_POWER_MGMT_PGAPD_D			BIT(2)</div><div class='add'>+#define LAN8814_POWER_MGMT_TXPD_D			BIT(3)</div><div class='add'>+#define LAN8814_POWER_MGMT_DLLPD_C			BIT(4)</div><div class='add'>+#define LAN8814_POWER_MGMT_ADCPD_C			BIT(5)</div><div class='add'>+#define LAN8814_POWER_MGMT_PGAPD_C			BIT(6)</div><div class='add'>+#define LAN8814_POWER_MGMT_TXPD_C			BIT(7)</div><div class='add'>+#define LAN8814_POWER_MGMT_DLLPD_B			BIT(8)</div><div class='add'>+#define LAN8814_POWER_MGMT_ADCPD_B			BIT(9)</div><div class='add'>+#define LAN8814_POWER_MGMT_PGAPD_B			BIT(10)</div><div class='add'>+#define LAN8814_POWER_MGMT_TXPD_B			BIT(11)</div><div class='add'>+#define LAN8814_POWER_MGMT_DLLPD_A			BIT(12)</div><div class='add'>+#define LAN8814_POWER_MGMT_ADCPD_A			BIT(13)</div><div class='add'>+#define LAN8814_POWER_MGMT_PGAPD_A			BIT(14)</div><div class='add'>+#define LAN8814_POWER_MGMT_TXPD_A			BIT(15)</div><div class='add'>+</div><div class='add'>+#define LAN8814_POWER_MGMT_C_D		(LAN8814_POWER_MGMT_DLLPD_D | \</div><div class='add'>+					 LAN8814_POWER_MGMT_ADCPD_D | \</div><div class='add'>+					 LAN8814_POWER_MGMT_PGAPD_D | \</div><div class='add'>+					 LAN8814_POWER_MGMT_DLLPD_C | \</div><div class='add'>+					 LAN8814_POWER_MGMT_ADCPD_C | \</div><div class='add'>+					 LAN8814_POWER_MGMT_PGAPD_C)</div><div class='add'>+</div><div class='add'>+#define LAN8814_POWER_MGMT_B_C_D	(LAN8814_POWER_MGMT_C_D | \</div><div class='add'>+					 LAN8814_POWER_MGMT_DLLPD_B | \</div><div class='add'>+					 LAN8814_POWER_MGMT_ADCPD_B | \</div><div class='add'>+					 LAN8814_POWER_MGMT_PGAPD_B)</div><div class='add'>+</div><div class='add'>+#define LAN8814_POWER_MGMT_VAL1		(LAN8814_POWER_MGMT_C_D | \</div><div class='add'>+					 LAN8814_POWER_MGMT_ADCPD_B | \</div><div class='add'>+					 LAN8814_POWER_MGMT_PGAPD_B | \</div><div class='add'>+					 LAN8814_POWER_MGMT_ADCPD_A | \</div><div class='add'>+					 LAN8814_POWER_MGMT_PGAPD_A)</div><div class='add'>+</div><div class='add'>+#define LAN8814_POWER_MGMT_VAL2		LAN8814_POWER_MGMT_C_D</div><div class='add'>+</div><div class='add'>+#define LAN8814_POWER_MGMT_VAL3		(LAN8814_POWER_MGMT_C_D | \</div><div class='add'>+					 LAN8814_POWER_MGMT_DLLPD_B | \</div><div class='add'>+					 LAN8814_POWER_MGMT_ADCPD_B | \</div><div class='add'>+					 LAN8814_POWER_MGMT_PGAPD_A)</div><div class='add'>+</div><div class='add'>+#define LAN8814_POWER_MGMT_VAL4		(LAN8814_POWER_MGMT_B_C_D | \</div><div class='add'>+					 LAN8814_POWER_MGMT_ADCPD_A | \</div><div class='add'>+					 LAN8814_POWER_MGMT_PGAPD_A)</div><div class='add'>+</div><div class='add'>+#define LAN8814_POWER_MGMT_VAL5		LAN8814_POWER_MGMT_B_C_D</div><div class='add'>+</div><div class='add'>+#define LAN8814_EEE_WAKE_TX_TIMER			0x0e</div><div class='add'>+#define LAN8814_EEE_WAKE_TX_TIMER_MAX_VAL		0x1f</div><div class='add'>+</div><div class='add'>+static const struct lanphy_reg_data short_center_tap_errata[] = {</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_3_ANEG_MDI,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL1 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_4_ANEG_MDIX,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL1 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_5_10BT_MDI,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL1 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_6_10BT_MDIX,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL1 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_7_100BT_TRAIN,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL2 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_8_100BT_MDI,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL3 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_9_100BT_EEE_MDI_TX,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL3 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_10_100BT_EEE_MDI_RX,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL4 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_11_100BT_MDIX,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL5 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_12_100BT_EEE_MDIX_TX,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL5 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_13_100BT_EEE_MDIX_RX,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL4 },</div><div class='add'>+	{ LAN8814_PAGE_POWER_REGS,</div><div class='add'>+	  LAN8814_POWER_MGMT_MODE_14_100BTX_EEE_TX_RX,</div><div class='add'>+	  LAN8814_POWER_MGMT_VAL4 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct lanphy_reg_data waketx_timer_errata[] = {</div><div class='add'>+	{ LAN8814_PAGE_EEE,</div><div class='add'>+	  LAN8814_EEE_WAKE_TX_TIMER,</div><div class='add'>+	  LAN8814_EEE_WAKE_TX_TIMER_MAX_VAL },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int lanphy_write_reg_data(struct phy_device *phydev,</div><div class='add'>+				 const struct lanphy_reg_data *data,</div><div class='add'>+				 size_t num)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	while (num--) {</div><div class='add'>+		ret = lanphy_write_page_reg(phydev, data-&gt;page, data-&gt;addr,</div><div class='add'>+					    data-&gt;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan8842_erratas(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lanphy_write_reg_data(phydev, short_center_tap_errata,</div><div class='add'>+				    ARRAY_SIZE(short_center_tap_errata));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return lanphy_write_reg_data(phydev, waketx_timer_errata,</div><div class='add'>+				     ARRAY_SIZE(waketx_timer_errata));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan8842_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Reset the PHY */</div><div class='add'>+	ret = lanphy_modify_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				     LAN8814_QSGMII_SOFT_RESET,</div><div class='add'>+				     LAN8814_QSGMII_SOFT_RESET_BIT,</div><div class='add'>+				     LAN8814_QSGMII_SOFT_RESET_BIT);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Apply the erratas for this device */</div><div class='add'>+	ret = lan8842_erratas(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Even if the GPIOs are set to control the LEDs the behaviour of the</div><div class='add'>+	 * LEDs is wrong, they are not blinking when there is traffic.</div><div class='add'>+	 * To fix this it is required to set extended LED mode</div><div class='add'>+	 */</div><div class='add'>+	ret = lanphy_modify_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+				     LAN8814_LED_CTRL_1,</div><div class='add'>+				     LAN8814_LED_CTRL_1_KSZ9031_LED_MODE_, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = lanphy_modify_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+				     LAN8814_LED_CTRL_2,</div><div class='add'>+				     LAN8814_LED_CTRL_2_LED1_COM_DIS,</div><div class='add'>+				     LAN8814_LED_CTRL_2_LED1_COM_DIS);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* To allow the PHY to control the LEDs the GPIOs of the PHY should have</div><div class='add'>+	 * a function mode and not the GPIO. Apparently by default the value is</div><div class='add'>+	 * GPIO and not function even though the datasheet it says that it is</div><div class='add'>+	 * function. Therefore set this value.</div><div class='add'>+	 */</div><div class='add'>+	return lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+				     LAN8814_GPIO_EN2, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define LAN8842_INTR_CTRL_REG			52 /* 0x34 */</div><div class='add'>+</div><div class='add'>+static int lan8842_config_intr(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	lanphy_write_page_reg(phydev, LAN8814_PAGE_COMMON_REGS,</div><div class='add'>+			      LAN8842_INTR_CTRL_REG,</div><div class='add'>+			      LAN8814_INTR_CTRL_REG_INTR_ENABLE);</div><div class='add'>+</div><div class='add'>+	/* enable / disable interrupts */</div><div class='add'>+	if (phydev-&gt;interrupts == PHY_INTERRUPT_ENABLED) {</div><div class='add'>+		err = lan8814_ack_interrupt(phydev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = phy_write(phydev, LAN8814_INTC,</div><div class='add'>+				LAN8814_INT_LINK | LAN8814_INT_FLF);</div><div class='add'>+	} else {</div><div class='add'>+		err = phy_write(phydev, LAN8814_INTC, 0);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = lan8814_ack_interrupt(phydev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int lan8842_inband_caps(struct phy_device *phydev,</div><div class='add'>+					phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	/* Inband configuration can be enabled or disabled using the registers</div><div class='add'>+	 * PCS1G_ANEG_CONFIG.</div><div class='add'>+	 */</div><div class='add'>+	return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan8842_config_inband(struct phy_device *phydev, unsigned int modes)</div><div class='add'>+{</div><div class='add'>+	bool enable;</div><div class='add'>+</div><div class='add'>+	if (modes == LINK_INBAND_DISABLE)</div><div class='add'>+		enable = false;</div><div class='add'>+	else</div><div class='add'>+		enable = true;</div><div class='add'>+</div><div class='add'>+	/* Disable or enable in-band autoneg with PCS Host side</div><div class='add'>+	 * It has the same address as lan8814</div><div class='add'>+	 */</div><div class='add'>+	return lanphy_modify_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+				      LAN8814_QSGMII_PCS1G_ANEG_CONFIG,</div><div class='add'>+				      LAN8814_QSGMII_PCS1G_ANEG_CONFIG_ANEG_ENA,</div><div class='add'>+				      enable ? LAN8814_QSGMII_PCS1G_ANEG_CONFIG_ANEG_ENA : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan8842_handle_ptp_interrupt(struct phy_device *phydev, u16 status)</div><div class='add'>+{</div><div class='add'>+	struct kszphy_ptp_priv *ptp_priv;</div><div class='add'>+	struct lan8842_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = phydev-&gt;priv;</div><div class='add'>+	ptp_priv = &amp;priv-&gt;ptp_priv;</div><div class='add'>+</div><div class='add'>+	if (status &amp; PTP_TSU_INT_STS_PTP_TX_TS_EN_)</div><div class='add'>+		lan8814_get_tx_ts(ptp_priv);</div><div class='add'>+</div><div class='add'>+	if (status &amp; PTP_TSU_INT_STS_PTP_RX_TS_EN_)</div><div class='add'>+		lan8814_get_rx_ts(ptp_priv);</div><div class='add'>+</div><div class='add'>+	if (status &amp; PTP_TSU_INT_STS_PTP_TX_TS_OVRFL_INT_) {</div><div class='add'>+		lan8814_flush_fifo(phydev, true);</div><div class='add'>+		skb_queue_purge(&amp;ptp_priv-&gt;tx_queue);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (status &amp; PTP_TSU_INT_STS_PTP_RX_TS_OVRFL_INT_) {</div><div class='add'>+		lan8814_flush_fifo(phydev, false);</div><div class='add'>+		skb_queue_purge(&amp;ptp_priv-&gt;rx_queue);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t lan8842_handle_interrupt(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct lan8842_priv *priv = phydev-&gt;priv;</div><div class='add'>+	int ret = IRQ_NONE;</div><div class='add'>+	int irq_status;</div><div class='add'>+</div><div class='add'>+	irq_status = phy_read(phydev, LAN8814_INTS);</div><div class='add'>+	if (irq_status &lt; 0) {</div><div class='add'>+		phy_error(phydev);</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (irq_status &amp; (LAN8814_INT_LINK | LAN8814_INT_FLF)) {</div><div class='add'>+		phy_trigger_machine(phydev);</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Phy revision lan8832 doesn't have support for PTP therefore there is</div><div class='add'>+	 * not need to check the PTP and GPIO interrupts</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;rev == LAN8842_REV_8832)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	while (true) {</div><div class='add'>+		irq_status = lanphy_read_page_reg(phydev, LAN8814_PAGE_PORT_REGS,</div><div class='add'>+						  PTP_TSU_INT_STS);</div><div class='add'>+		if (!irq_status)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		lan8842_handle_ptp_interrupt(phydev, irq_status);</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!lan8814_handle_gpio_interrupt(phydev, irq_status))</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 lan8842_get_stat(struct phy_device *phydev, int count, int *regs)</div><div class='add'>+{</div><div class='add'>+	u64 ret = 0;</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	for (int j = 0; j &lt; count; ++j) {</div><div class='add'>+		val = lanphy_read_page_reg(phydev, LAN8814_PAGE_PCS_DIGITAL,</div><div class='add'>+					   regs[j]);</div><div class='add'>+		if (val &lt; 0)</div><div class='add'>+			return U64_MAX;</div><div class='add'>+</div><div class='add'>+		ret &lt;&lt;= 16;</div><div class='add'>+		ret += val;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan8842_update_stats(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct lan8842_priv *priv = phydev-&gt;priv;</div><div class='add'>+	int rx_packets_regs[] = {88, 61, 60};</div><div class='add'>+	int rx_errors_regs[] = {63, 62};</div><div class='add'>+	int tx_packets_regs[] = {89, 85, 84};</div><div class='add'>+	int tx_errors_regs[] = {87, 86};</div><div class='add'>+</div><div class='add'>+	priv-&gt;phy_stats.rx_packets = lan8842_get_stat(phydev,</div><div class='add'>+						      ARRAY_SIZE(rx_packets_regs),</div><div class='add'>+						      rx_packets_regs);</div><div class='add'>+	priv-&gt;phy_stats.rx_errors = lan8842_get_stat(phydev,</div><div class='add'>+						     ARRAY_SIZE(rx_errors_regs),</div><div class='add'>+						     rx_errors_regs);</div><div class='add'>+	priv-&gt;phy_stats.tx_packets = lan8842_get_stat(phydev,</div><div class='add'>+						      ARRAY_SIZE(tx_packets_regs),</div><div class='add'>+						      tx_packets_regs);</div><div class='add'>+	priv-&gt;phy_stats.tx_errors = lan8842_get_stat(phydev,</div><div class='add'>+						     ARRAY_SIZE(tx_errors_regs),</div><div class='add'>+						     tx_errors_regs);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define LAN8842_FLF				15 /* 0x0e */</div><div class='add'>+#define LAN8842_FLF_ENA				BIT(1)</div><div class='add'>+#define LAN8842_FLF_ENA_LINK_DOWN		BIT(0)</div><div class='add'>+</div><div class='add'>+static int lan8842_get_fast_down(struct phy_device *phydev, u8 *msecs)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lanphy_read_page_reg(phydev, LAN8814_PAGE_PCS, LAN8842_FLF);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ret &amp; LAN8842_FLF_ENA)</div><div class='add'>+		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_ON;</div><div class='add'>+	else</div><div class='add'>+		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan8842_set_fast_down(struct phy_device *phydev, const u8 *msecs)</div><div class='add'>+{</div><div class='add'>+	u16 flf;</div><div class='add'>+</div><div class='add'>+	switch (*msecs) {</div><div class='add'>+	case ETHTOOL_PHY_FAST_LINK_DOWN_OFF:</div><div class='add'>+		flf = 0;</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_PHY_FAST_LINK_DOWN_ON:</div><div class='add'>+		flf = LAN8842_FLF_ENA | LAN8842_FLF_ENA_LINK_DOWN;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return lanphy_modify_page_reg(phydev, LAN8814_PAGE_PCS,</div><div class='add'>+				      LAN8842_FLF,</div><div class='add'>+				      LAN8842_FLF_ENA |</div><div class='add'>+				      LAN8842_FLF_ENA_LINK_DOWN, flf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan8842_get_tunable(struct phy_device *phydev,</div><div class='add'>+			       struct ethtool_tunable *tuna, void *data)</div><div class='add'>+{</div><div class='add'>+	switch (tuna-&gt;id) {</div><div class='add'>+	case ETHTOOL_PHY_FAST_LINK_DOWN:</div><div class='add'>+		return lan8842_get_fast_down(phydev, data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan8842_set_tunable(struct phy_device *phydev,</div><div class='add'>+			       struct ethtool_tunable *tuna, const void *data)</div><div class='add'>+{</div><div class='add'>+	switch (tuna-&gt;id) {</div><div class='add'>+	case ETHTOOL_PHY_FAST_LINK_DOWN:</div><div class='add'>+		return lan8842_set_fast_down(phydev, data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan8842_get_phy_stats(struct phy_device *phydev,</div><div class='add'>+				  struct ethtool_eth_phy_stats *eth_stats,</div><div class='add'>+				  struct ethtool_phy_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct lan8842_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_packets = priv-&gt;phy_stats.rx_packets;</div><div class='add'>+	stats-&gt;rx_errors = priv-&gt;phy_stats.rx_errors;</div><div class='add'>+	stats-&gt;tx_packets = priv-&gt;phy_stats.tx_packets;</div><div class='add'>+	stats-&gt;tx_errors = priv-&gt;phy_stats.tx_errors;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> {</div><div class='del'>-	.phy_id		= PHY_ID_KS8737,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_KS8737),</div><div class='ctx'> 	.name		= "Micrel KS8737",</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> 	.driver_data	= &amp;ks8737_type,</div><div class='hunk'>@@ -5345,8 +6513,7 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.suspend	= kszphy_suspend,</div><div class='ctx'> 	.resume		= kszphy_resume,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_KSZ8041,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_KSZ8041),</div><div class='ctx'> 	.name		= "Micrel KSZ8041",</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> 	.driver_data	= &amp;ksz8041_type,</div><div class='hunk'>@@ -5358,12 +6525,10 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.get_sset_count = kszphy_get_sset_count,</div><div class='ctx'> 	.get_strings	= kszphy_get_strings,</div><div class='ctx'> 	.get_stats	= kszphy_get_stats,</div><div class='del'>-	/* No suspend/resume callbacks because of errata DS80000700A,</div><div class='del'>-	 * receiver error following software power down.</div><div class='del'>-	 */</div><div class='add'>+	.suspend	= ksz8041_suspend,</div><div class='add'>+	.resume		= ksz8041_resume,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_KSZ8041RNLI,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_KSZ8041RNLI),</div><div class='ctx'> 	.name		= "Micrel KSZ8041RNLI",</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> 	.driver_data	= &amp;ksz8041_type,</div><div class='hunk'>@@ -5406,9 +6571,8 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.suspend	= kszphy_suspend,</div><div class='ctx'> 	.resume		= kszphy_resume,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_KSZ8081,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_KSZ8081),</div><div class='ctx'> 	.name		= "Micrel KSZ8081 or KSZ8091",</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='ctx'> 	.flags		= PHY_POLL_CABLE_TEST,</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> 	.driver_data	= &amp;ksz8081_type,</div><div class='hunk'>@@ -5427,16 +6591,15 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.cable_test_start	= ksz886x_cable_test_start,</div><div class='ctx'> 	.cable_test_get_status	= ksz886x_cable_test_get_status,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_KSZ8061,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_KSZ8061),</div><div class='ctx'> 	.name		= "Micrel KSZ8061",</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> 	.probe		= kszphy_probe,</div><div class='ctx'> 	.config_init	= ksz8061_config_init,</div><div class='ctx'> 	.soft_reset	= genphy_soft_reset,</div><div class='ctx'> 	.config_intr	= kszphy_config_intr,</div><div class='ctx'> 	.handle_interrupt = kszphy_handle_interrupt,</div><div class='del'>-	.suspend	= kszphy_suspend,</div><div class='add'>+	.suspend	= ksz8061_suspend,</div><div class='ctx'> 	.resume		= ksz8061_resume,</div><div class='ctx'> }, {</div><div class='ctx'> 	.phy_id		= PHY_ID_KSZ9021,</div><div class='hunk'>@@ -5457,8 +6620,7 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.read_mmd	= genphy_read_mmd_unsupported,</div><div class='ctx'> 	.write_mmd	= genphy_write_mmd_unsupported,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_KSZ9031,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_KSZ9031),</div><div class='ctx'> 	.name		= "Micrel KSZ9031 Gigabit PHY",</div><div class='ctx'> 	.flags		= PHY_POLL_CABLE_TEST,</div><div class='ctx'> 	.driver_data	= &amp;ksz9021_type,</div><div class='hunk'>@@ -5476,9 +6638,9 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.resume		= kszphy_resume,</div><div class='ctx'> 	.cable_test_start	= ksz9x31_cable_test_start,</div><div class='ctx'> 	.cable_test_get_status	= ksz9x31_cable_test_get_status,</div><div class='add'>+	.set_loopback	= ksz9031_set_loopback,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_LAN8814,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_LAN8814),</div><div class='ctx'> 	.name		= "Microchip INDY Gigabit Quad PHY",</div><div class='ctx'> 	.flags          = PHY_POLL_CABLE_TEST,</div><div class='ctx'> 	.config_init	= lan8814_config_init,</div><div class='hunk'>@@ -5492,12 +6654,13 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.suspend	= genphy_suspend,</div><div class='ctx'> 	.resume		= kszphy_resume,</div><div class='ctx'> 	.config_intr	= lan8814_config_intr,</div><div class='add'>+	.inband_caps	= lan8842_inband_caps,</div><div class='add'>+	.config_inband	= lan8842_config_inband,</div><div class='ctx'> 	.handle_interrupt = lan8814_handle_interrupt,</div><div class='ctx'> 	.cable_test_start	= lan8814_cable_test_start,</div><div class='ctx'> 	.cable_test_get_status	= ksz886x_cable_test_get_status,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_LAN8804,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_LAN8804),</div><div class='ctx'> 	.name		= "Microchip LAN966X Gigabit PHY",</div><div class='ctx'> 	.config_init	= lan8804_config_init,</div><div class='ctx'> 	.driver_data	= &amp;ksz9021_type,</div><div class='hunk'>@@ -5507,13 +6670,12 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.get_sset_count	= kszphy_get_sset_count,</div><div class='ctx'> 	.get_strings	= kszphy_get_strings,</div><div class='ctx'> 	.get_stats	= kszphy_get_stats,</div><div class='del'>-	.suspend	= genphy_suspend,</div><div class='del'>-	.resume		= kszphy_resume,</div><div class='add'>+	.suspend	= lan8804_suspend,</div><div class='add'>+	.resume		= lan8804_resume,</div><div class='ctx'> 	.config_intr	= lan8804_config_intr,</div><div class='ctx'> 	.handle_interrupt = lan8804_handle_interrupt,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_LAN8841,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_LAN8841),</div><div class='ctx'> 	.name		= "Microchip LAN8841 Gigabit PHY",</div><div class='ctx'> 	.flags		= PHY_POLL_CABLE_TEST,</div><div class='ctx'> 	.driver_data	= &amp;lan8841_type,</div><div class='hunk'>@@ -5526,12 +6688,28 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.get_strings	= kszphy_get_strings,</div><div class='ctx'> 	.get_stats	= kszphy_get_stats,</div><div class='ctx'> 	.suspend	= lan8841_suspend,</div><div class='del'>-	.resume		= genphy_resume,</div><div class='add'>+	.resume		= lan8841_resume,</div><div class='ctx'> 	.cable_test_start	= lan8814_cable_test_start,</div><div class='ctx'> 	.cable_test_get_status	= ksz886x_cable_test_get_status,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_KSZ9131,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_LAN8842),</div><div class='add'>+	.name		= "Microchip LAN8842 Gigabit PHY",</div><div class='add'>+	.flags		= PHY_POLL_CABLE_TEST,</div><div class='add'>+	.driver_data	= &amp;lan8814_type,</div><div class='add'>+	.probe		= lan8842_probe,</div><div class='add'>+	.config_init	= lan8842_config_init,</div><div class='add'>+	.config_intr	= lan8842_config_intr,</div><div class='add'>+	.inband_caps	= lan8842_inband_caps,</div><div class='add'>+	.config_inband	= lan8842_config_inband,</div><div class='add'>+	.handle_interrupt = lan8842_handle_interrupt,</div><div class='add'>+	.get_phy_stats	= lan8842_get_phy_stats,</div><div class='add'>+	.update_stats	= lan8842_update_stats,</div><div class='add'>+	.get_tunable	= lan8842_get_tunable,</div><div class='add'>+	.set_tunable	= lan8842_set_tunable,</div><div class='add'>+	.cable_test_start	= lan8814_cable_test_start,</div><div class='add'>+	.cable_test_get_status	= ksz886x_cable_test_get_status,</div><div class='add'>+}, {</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_KSZ9131),</div><div class='ctx'> 	.name		= "Microchip KSZ9131 Gigabit PHY",</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.flags		= PHY_POLL_CABLE_TEST,</div><div class='hunk'>@@ -5547,13 +6725,12 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.get_strings	= kszphy_get_strings,</div><div class='ctx'> 	.get_stats	= kszphy_get_stats,</div><div class='ctx'> 	.suspend	= kszphy_suspend,</div><div class='del'>-	.resume		= kszphy_resume,</div><div class='add'>+	.resume		= ksz9131_resume,</div><div class='ctx'> 	.cable_test_start	= ksz9x31_cable_test_start,</div><div class='ctx'> 	.cable_test_get_status	= ksz9x31_cable_test_get_status,</div><div class='ctx'> 	.get_features	= ksz9477_get_features,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_KSZ8873MLL,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_KSZ8873MLL),</div><div class='ctx'> 	.name		= "Micrel KSZ8873MLL Switch",</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> 	.config_init	= kszphy_config_init,</div><div class='hunk'>@@ -5562,8 +6739,7 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.suspend	= genphy_suspend,</div><div class='ctx'> 	.resume		= genphy_resume,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_KSZ886X,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_KSZ886X),</div><div class='ctx'> 	.name		= "Micrel KSZ8851 Ethernet MAC or KSZ886X Switch",</div><div class='ctx'> 	.driver_data	= &amp;ksz886x_type,</div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='hunk'>@@ -5583,16 +6759,25 @@ static struct phy_driver ksphy_driver[] = {</div><div class='ctx'> 	.suspend	= genphy_suspend,</div><div class='ctx'> 	.resume		= genphy_resume,</div><div class='ctx'> }, {</div><div class='del'>-	.phy_id		= PHY_ID_KSZ9477,</div><div class='del'>-	.phy_id_mask	= MICREL_PHY_ID_MASK,</div><div class='add'>+	PHY_ID_MATCH_MODEL(PHY_ID_KSZ9477),</div><div class='ctx'> 	.name		= "Microchip KSZ9477",</div><div class='add'>+	.probe		= kszphy_probe,</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.config_init	= ksz9477_config_init,</div><div class='ctx'> 	.config_intr	= kszphy_config_intr,</div><div class='add'>+	.config_aneg	= ksz9477_config_aneg,</div><div class='add'>+	.read_status	= ksz9477_read_status,</div><div class='ctx'> 	.handle_interrupt = kszphy_handle_interrupt,</div><div class='ctx'> 	.suspend	= genphy_suspend,</div><div class='ctx'> 	.resume		= ksz9477_resume,</div><div class='del'>-	.get_features	= ksz9477_get_features,</div><div class='add'>+	.get_phy_stats	= kszphy_get_phy_stats,</div><div class='add'>+	.update_stats	= kszphy_update_stats,</div><div class='add'>+	.cable_test_start	= ksz9x31_cable_test_start,</div><div class='add'>+	.cable_test_get_status	= ksz9x31_cable_test_get_status,</div><div class='add'>+	.get_sqi	= kszphy_get_sqi,</div><div class='add'>+	.get_sqi_max	= kszphy_get_sqi_max,</div><div class='add'>+	.get_mse_capability = kszphy_get_mse_capability,</div><div class='add'>+	.get_mse_snapshot = kszphy_get_mse_snapshot,</div><div class='ctx'> } };</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(ksphy_driver);</div><div class='hunk'>@@ -5601,24 +6786,26 @@ MODULE_DESCRIPTION("Micrel PHY driver");</div><div class='ctx'> MODULE_AUTHOR("David J. Choi");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused micrel_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused micrel_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_KSZ9021, 0x000ffffe },</div><div class='del'>-	{ PHY_ID_KSZ9031, MICREL_PHY_ID_MASK },</div><div class='del'>-	{ PHY_ID_KSZ9131, MICREL_PHY_ID_MASK },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KSZ9031) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KSZ9131) },</div><div class='ctx'> 	{ PHY_ID_KSZ8001, 0x00fffffc },</div><div class='del'>-	{ PHY_ID_KS8737, MICREL_PHY_ID_MASK },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KS8737) },</div><div class='ctx'> 	{ PHY_ID_KSZ8021, 0x00ffffff },</div><div class='ctx'> 	{ PHY_ID_KSZ8031, 0x00ffffff },</div><div class='del'>-	{ PHY_ID_KSZ8041, MICREL_PHY_ID_MASK },</div><div class='del'>-	{ PHY_ID_KSZ8051, MICREL_PHY_ID_MASK },</div><div class='del'>-	{ PHY_ID_KSZ8061, MICREL_PHY_ID_MASK },</div><div class='del'>-	{ PHY_ID_KSZ8081, MICREL_PHY_ID_MASK },</div><div class='del'>-	{ PHY_ID_KSZ8873MLL, MICREL_PHY_ID_MASK },</div><div class='del'>-	{ PHY_ID_KSZ886X, MICREL_PHY_ID_MASK },</div><div class='del'>-	{ PHY_ID_KSZ9477, MICREL_PHY_ID_MASK },</div><div class='del'>-	{ PHY_ID_LAN8814, MICREL_PHY_ID_MASK },</div><div class='del'>-	{ PHY_ID_LAN8804, MICREL_PHY_ID_MASK },</div><div class='del'>-	{ PHY_ID_LAN8841, MICREL_PHY_ID_MASK },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KSZ8041) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KSZ8041RNLI) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KSZ8051) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KSZ8061) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KSZ8081) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KSZ8873MLL) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KSZ886X) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_KSZ9477) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_LAN8814) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_LAN8804) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_LAN8841) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_LAN8842) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/microchip.c b/drivers/net/phy/microchip.c<br/>index d3273bc0da4a..dc8634e7bcbe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/microchip.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/microchip.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/microchip.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/microchip.c</a></div><div class='hunk'>@@ -37,47 +37,6 @@ static int lan88xx_write_page(struct phy_device *phydev, int page)</div><div class='ctx'> 	return __phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lan88xx_phy_config_intr(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	if (phydev-&gt;interrupts == PHY_INTERRUPT_ENABLED) {</div><div class='del'>-		/* unmask all source and clear them before enable */</div><div class='del'>-		rc = phy_write(phydev, LAN88XX_INT_MASK, 0x7FFF);</div><div class='del'>-		rc = phy_read(phydev, LAN88XX_INT_STS);</div><div class='del'>-		rc = phy_write(phydev, LAN88XX_INT_MASK,</div><div class='del'>-			       LAN88XX_INT_MASK_MDINTPIN_EN_ |</div><div class='del'>-			       LAN88XX_INT_MASK_LINK_CHANGE_);</div><div class='del'>-	} else {</div><div class='del'>-		rc = phy_write(phydev, LAN88XX_INT_MASK, 0);</div><div class='del'>-		if (rc)</div><div class='del'>-			return rc;</div><div class='del'>-</div><div class='del'>-		/* Ack interrupts after they have been disabled */</div><div class='del'>-		rc = phy_read(phydev, LAN88XX_INT_STS);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return rc &lt; 0 ? rc : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t lan88xx_handle_interrupt(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	int irq_status;</div><div class='del'>-</div><div class='del'>-	irq_status = phy_read(phydev, LAN88XX_INT_STS);</div><div class='del'>-	if (irq_status &lt; 0) {</div><div class='del'>-		phy_error(phydev);</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!(irq_status &amp; LAN88XX_INT_STS_LINK_CHANGE_))</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-</div><div class='del'>-	phy_trigger_machine(phydev);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int lan88xx_suspend(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan88xx_priv *priv = phydev-&gt;priv;</div><div class='hunk'>@@ -351,13 +310,29 @@ static int lan88xx_config_aneg(struct phy_device *phydev)</div><div class='ctx'> static void lan88xx_link_change_notify(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int temp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Reset PHY to ensure MII_LPA provides up-to-date information. This</div><div class='add'>+	 * issue is reproducible only after parallel detection, as described</div><div class='add'>+	 * in IEEE 802.3-2022, Section 28.2.3.1 ("Parallel detection function"),</div><div class='add'>+	 * where the link partner does not support auto-negotiation.</div><div class='add'>+	 */</div><div class='add'>+	if (phydev-&gt;state == PHY_NOLINK) {</div><div class='add'>+		ret = phy_init_hw(phydev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto link_change_notify_failed;</div><div class='add'>+</div><div class='add'>+		ret = _phy_start_aneg(phydev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto link_change_notify_failed;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* At forced 100 F/H mode, chip may fail to set mode correctly</div><div class='ctx'> 	 * when cable is switched between long(~50+m) and short one.</div><div class='ctx'> 	 * As workaround, set to 10 before setting to 100</div><div class='ctx'> 	 * at forced 100 F/H mode.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!phydev-&gt;autoneg &amp;&amp; phydev-&gt;speed == 100) {</div><div class='add'>+	if (phydev-&gt;state == PHY_NOLINK &amp;&amp; !phydev-&gt;autoneg &amp;&amp; phydev-&gt;speed == 100) {</div><div class='ctx'> 		/* disable phy interrupt */</div><div class='ctx'> 		temp = phy_read(phydev, LAN88XX_INT_MASK);</div><div class='ctx'> 		temp &amp;= ~LAN88XX_INT_MASK_MDINTPIN_EN_;</div><div class='hunk'>@@ -377,6 +352,11 @@ static void lan88xx_link_change_notify(struct phy_device *phydev)</div><div class='ctx'> 		temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;</div><div class='ctx'> 		phy_write(phydev, LAN88XX_INT_MASK, temp);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+link_change_notify_failed:</div><div class='add'>+	phydev_err(phydev, "Link change process failed %pe\n", ERR_PTR(ret));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -494,6 +474,8 @@ static struct phy_driver microchip_phy_driver[] = {</div><div class='ctx'> 	/* This mask (0xfffffff2) is to differentiate from</div><div class='ctx'> 	 * LAN8742 (phy_id 0x0007c130 and 0x0007c131)</div><div class='ctx'> 	 * and allows future phy_id revisions.</div><div class='add'>+	 * These PHYs are integrated in LAN7800 and LAN7850 USB/Ethernet</div><div class='add'>+	 * controllers.</div><div class='ctx'> 	 */</div><div class='ctx'> 	.phy_id_mask	= 0xfffffff2,</div><div class='ctx'> 	.name		= "Microchip LAN88xx",</div><div class='hunk'>@@ -506,9 +488,11 @@ static struct phy_driver microchip_phy_driver[] = {</div><div class='ctx'> 	.config_init	= lan88xx_config_init,</div><div class='ctx'> 	.config_aneg	= lan88xx_config_aneg,</div><div class='ctx'> 	.link_change_notify = lan88xx_link_change_notify,</div><div class='add'>+	.soft_reset	= genphy_soft_reset,</div><div class='ctx'> </div><div class='del'>-	.config_intr	= lan88xx_phy_config_intr,</div><div class='del'>-	.handle_interrupt = lan88xx_handle_interrupt,</div><div class='add'>+	/* Interrupt handling is broken, do not define related</div><div class='add'>+	 * functions to force polling.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='ctx'> 	.suspend	= lan88xx_suspend,</div><div class='ctx'> 	.resume		= genphy_resume,</div><div class='hunk'>@@ -527,7 +511,7 @@ static struct phy_driver microchip_phy_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(microchip_phy_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused microchip_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused microchip_tbl[] = {</div><div class='ctx'> 	{ 0x0007c132, 0xfffffff2 },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_LAN937X_TX) },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/microchip_rds_ptp.c b/drivers/net/phy/microchip_rds_ptp.c<br/>new file mode 100644<br/>index 000000000000..4c6326b0ceaf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/microchip_rds_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/microchip_rds_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,1306 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (C) 2024 Microchip Technology</div><div class='add'>+</div><div class='add'>+#include "microchip_rds_ptp.h"</div><div class='add'>+</div><div class='add'>+static int mchp_rds_phy_read_mmd(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				 u32 offset, enum mchp_rds_ptp_base base)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = clock-&gt;phydev;</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	addr = (offset + ((base == MCHP_RDS_PTP_PORT) ? BASE_PORT(clock) :</div><div class='add'>+			  BASE_CLK(clock)));</div><div class='add'>+</div><div class='add'>+	return phy_read_mmd(phydev, PTP_MMD(clock), addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_phy_write_mmd(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				  u32 offset, enum mchp_rds_ptp_base base,</div><div class='add'>+				  u16 val)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = clock-&gt;phydev;</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	addr = (offset + ((base == MCHP_RDS_PTP_PORT) ? BASE_PORT(clock) :</div><div class='add'>+			  BASE_CLK(clock)));</div><div class='add'>+</div><div class='add'>+	return phy_write_mmd(phydev, PTP_MMD(clock), addr, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_phy_modify_mmd(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				   u32 offset, enum mchp_rds_ptp_base base,</div><div class='add'>+				   u16 mask, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = clock-&gt;phydev;</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	addr = (offset + ((base == MCHP_RDS_PTP_PORT) ? BASE_PORT(clock) :</div><div class='add'>+			  BASE_CLK(clock)));</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd(phydev, PTP_MMD(clock), addr, mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_phy_set_bits_mmd(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				     u32 offset, enum mchp_rds_ptp_base base,</div><div class='add'>+				     u16 val)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = clock-&gt;phydev;</div><div class='add'>+	u32 addr;</div><div class='add'>+</div><div class='add'>+	addr = (offset + ((base == MCHP_RDS_PTP_PORT) ? BASE_PORT(clock) :</div><div class='add'>+			  BASE_CLK(clock)));</div><div class='add'>+</div><div class='add'>+	return phy_set_bits_mmd(phydev, PTP_MMD(clock), addr, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_get_pulsewidth(struct phy_device *phydev,</div><div class='add'>+			       struct ptp_perout_request *perout_request,</div><div class='add'>+			       int *pulse_width)</div><div class='add'>+{</div><div class='add'>+	struct timespec64 ts_period;</div><div class='add'>+	s64 ts_on_nsec, period_nsec;</div><div class='add'>+	struct timespec64 ts_on;</div><div class='add'>+	static const s64 sup_on_necs[] = {</div><div class='add'>+		100,		/* 100ns */</div><div class='add'>+		500,		/* 500ns */</div><div class='add'>+		1000,		/* 1us */</div><div class='add'>+		5000,		/* 5us */</div><div class='add'>+		10000,		/* 10us */</div><div class='add'>+		50000,		/* 50us */</div><div class='add'>+		100000,		/* 100us */</div><div class='add'>+		500000,		/* 500us */</div><div class='add'>+		1000000,	/* 1ms */</div><div class='add'>+		5000000,	/* 5ms */</div><div class='add'>+		10000000,	/* 10ms */</div><div class='add'>+		50000000,	/* 50ms */</div><div class='add'>+		100000000,	/* 100ms */</div><div class='add'>+		200000000,	/* 200ms */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ts_period.tv_sec = perout_request-&gt;period.sec;</div><div class='add'>+	ts_period.tv_nsec = perout_request-&gt;period.nsec;</div><div class='add'>+</div><div class='add'>+	ts_on.tv_sec = perout_request-&gt;on.sec;</div><div class='add'>+	ts_on.tv_nsec = perout_request-&gt;on.nsec;</div><div class='add'>+	ts_on_nsec = timespec64_to_ns(&amp;ts_on);</div><div class='add'>+	period_nsec = timespec64_to_ns(&amp;ts_period);</div><div class='add'>+</div><div class='add'>+	if (period_nsec &lt; 200) {</div><div class='add'>+		phydev_warn(phydev, "perout period small, minimum is 200ns\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(sup_on_necs); i++) {</div><div class='add'>+		if (ts_on_nsec &lt;= sup_on_necs[i]) {</div><div class='add'>+			*pulse_width = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phydev_info(phydev, "pulse width is %d\n", *pulse_width);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_general_event_config(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				     int pulse_width)</div><div class='add'>+{</div><div class='add'>+	int general_config;</div><div class='add'>+</div><div class='add'>+	general_config = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_GEN_CFG,</div><div class='add'>+					       MCHP_RDS_PTP_CLOCK);</div><div class='add'>+	if (general_config &lt; 0)</div><div class='add'>+		return general_config;</div><div class='add'>+</div><div class='add'>+	general_config &amp;= ~MCHP_RDS_PTP_GEN_CFG_LTC_EVT_MASK;</div><div class='add'>+	general_config |= MCHP_RDS_PTP_GEN_CFG_LTC_EVT_SET(pulse_width);</div><div class='add'>+	general_config &amp;= ~MCHP_RDS_PTP_GEN_CFG_RELOAD_ADD;</div><div class='add'>+	general_config |= MCHP_RDS_PTP_GEN_CFG_POLARITY;</div><div class='add'>+</div><div class='add'>+	return mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_GEN_CFG,</div><div class='add'>+				      MCHP_RDS_PTP_CLOCK, general_config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_set_clock_reload(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				 s64 period_sec, u32 period_nsec)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock,</div><div class='add'>+				    MCHP_RDS_PTP_CLK_TRGT_RELOAD_SEC_LO,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    lower_16_bits(period_sec));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock,</div><div class='add'>+				    MCHP_RDS_PTP_CLK_TRGT_RELOAD_SEC_HI,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    upper_16_bits(period_sec));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock,</div><div class='add'>+				    MCHP_RDS_PTP_CLK_TRGT_RELOAD_NS_LO,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    lower_16_bits(period_nsec));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return mchp_rds_phy_write_mmd(clock,</div><div class='add'>+				      MCHP_RDS_PTP_CLK_TRGT_RELOAD_NS_HI,</div><div class='add'>+				      MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				      upper_16_bits(period_nsec) &amp; 0x3fff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_set_clock_target(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				 s64 start_sec, u32 start_nsec)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Set the start time */</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CLK_TRGT_SEC_LO,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    lower_16_bits(start_sec));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CLK_TRGT_SEC_HI,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    upper_16_bits(start_sec));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CLK_TRGT_NS_LO,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    lower_16_bits(start_nsec));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CLK_TRGT_NS_HI,</div><div class='add'>+				      MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				      upper_16_bits(start_nsec) &amp; 0x3fff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_perout_off(struct mchp_rds_ptp_clock *clock)</div><div class='add'>+{</div><div class='add'>+	u16 general_config;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Set target to too far in the future, effectively disabling it */</div><div class='add'>+	rc = mchp_set_clock_target(clock, 0xFFFFFFFF, 0);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	general_config = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_GEN_CFG,</div><div class='add'>+					       MCHP_RDS_PTP_CLOCK);</div><div class='add'>+	general_config |= MCHP_RDS_PTP_GEN_CFG_RELOAD_ADD;</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_GEN_CFG,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK, general_config);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	clock-&gt;mchp_rds_ptp_event = -1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mchp_get_event(struct mchp_rds_ptp_clock *clock, int pin)</div><div class='add'>+{</div><div class='add'>+	if (clock-&gt;mchp_rds_ptp_event &lt; 0 &amp;&amp; pin == clock-&gt;event_pin) {</div><div class='add'>+		clock-&gt;mchp_rds_ptp_event = pin;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_perout(struct ptp_clock_info *ptpci,</div><div class='add'>+			       struct ptp_perout_request *perout, int on)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock = container_of(ptpci,</div><div class='add'>+						      struct mchp_rds_ptp_clock,</div><div class='add'>+						      caps);</div><div class='add'>+	struct phy_device *phydev = clock-&gt;phydev;</div><div class='add'>+	int ret, event_pin, pulsewidth;</div><div class='add'>+</div><div class='add'>+	event_pin = ptp_find_pin(clock-&gt;ptp_clock, PTP_PF_PEROUT,</div><div class='add'>+				 perout-&gt;index);</div><div class='add'>+	if (event_pin != clock-&gt;event_pin)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!on) {</div><div class='add'>+		ret = mchp_rds_ptp_perout_off(clock);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!mchp_get_event(clock, event_pin))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = mchp_get_pulsewidth(phydev, perout, &amp;pulsewidth);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Configure to pulse every period */</div><div class='add'>+	ret = mchp_general_event_config(clock, pulsewidth);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = mchp_set_clock_target(clock, perout-&gt;start.sec,</div><div class='add'>+				    perout-&gt;start.nsec);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return mchp_set_clock_reload(clock, perout-&gt;period.sec,</div><div class='add'>+				     perout-&gt;period.nsec);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptpci_enable(struct ptp_clock_info *ptpci,</div><div class='add'>+				 struct ptp_clock_request *request, int on)</div><div class='add'>+{</div><div class='add'>+	switch (request-&gt;type) {</div><div class='add'>+	case PTP_CLK_REQ_PEROUT:</div><div class='add'>+		return mchp_rds_ptp_perout(ptpci, &amp;request-&gt;perout, on);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptpci_verify(struct ptp_clock_info *ptpci, unsigned int pin,</div><div class='add'>+				 enum ptp_pin_function func, unsigned int chan)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock = container_of(ptpci,</div><div class='add'>+						      struct mchp_rds_ptp_clock,</div><div class='add'>+						      caps);</div><div class='add'>+</div><div class='add'>+	if (!(pin == clock-&gt;event_pin &amp;&amp; chan == 0))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	switch (func) {</div><div class='add'>+	case PTP_PF_NONE:</div><div class='add'>+	case PTP_PF_PEROUT:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_flush_fifo(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				   enum mchp_rds_ptp_fifo_dir dir)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (dir == MCHP_RDS_PTP_EGRESS_FIFO)</div><div class='add'>+		skb_queue_purge(&amp;clock-&gt;tx_queue);</div><div class='add'>+	else</div><div class='add'>+		skb_queue_purge(&amp;clock-&gt;rx_queue);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; MCHP_RDS_PTP_FIFO_SIZE; ++i) {</div><div class='add'>+		rc = mchp_rds_phy_read_mmd(clock,</div><div class='add'>+					   dir == MCHP_RDS_PTP_EGRESS_FIFO ?</div><div class='add'>+					   MCHP_RDS_PTP_TX_MSG_HDR2 :</div><div class='add'>+					   MCHP_RDS_PTP_RX_MSG_HDR2,</div><div class='add'>+					   MCHP_RDS_PTP_PORT);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+	return mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_INT_STS,</div><div class='add'>+				     MCHP_RDS_PTP_PORT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_config_intr(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				    bool enable)</div><div class='add'>+{</div><div class='add'>+	/* Enable  or disable ptp interrupts */</div><div class='add'>+	return mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_INT_EN,</div><div class='add'>+				      MCHP_RDS_PTP_PORT,</div><div class='add'>+				      enable ? MCHP_RDS_PTP_INT_ALL_MSK : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mchp_rds_ptp_txtstamp(struct mii_timestamper *mii_ts,</div><div class='add'>+				  struct sk_buff *skb, int type)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock = container_of(mii_ts,</div><div class='add'>+						      struct mchp_rds_ptp_clock,</div><div class='add'>+						      mii_ts);</div><div class='add'>+</div><div class='add'>+	switch (clock-&gt;hwts_tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_ONESTEP_SYNC:</div><div class='add'>+		if (ptp_msg_is_sync(skb, type)) {</div><div class='add'>+			kfree_skb(skb);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+		skb_queue_tail(&amp;clock-&gt;tx_queue, skb);</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+	default:</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mchp_rds_ptp_get_sig_rx(struct sk_buff *skb, u16 *sig)</div><div class='add'>+{</div><div class='add'>+	struct ptp_header *ptp_header;</div><div class='add'>+	int type;</div><div class='add'>+</div><div class='add'>+	skb_push(skb, ETH_HLEN);</div><div class='add'>+	type = ptp_classify_raw(skb);</div><div class='add'>+	if (type == PTP_CLASS_NONE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	ptp_header = ptp_parse_header(skb, type);</div><div class='add'>+	if (!ptp_header)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	skb_pull_inline(skb, ETH_HLEN);</div><div class='add'>+</div><div class='add'>+	*sig = (__force u16)(ntohs(ptp_header-&gt;sequence_id));</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mchp_rds_ptp_match_skb(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				   struct mchp_rds_ptp_rx_ts *rx_ts)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps *shhwtstamps;</div><div class='add'>+	struct sk_buff *skb, *skb_tmp;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool rc = false;</div><div class='add'>+	u16 skb_sig;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;clock-&gt;rx_queue.lock, flags);</div><div class='add'>+	skb_queue_walk_safe(&amp;clock-&gt;rx_queue, skb, skb_tmp) {</div><div class='add'>+		if (!mchp_rds_ptp_get_sig_rx(skb, &amp;skb_sig))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (skb_sig != rx_ts-&gt;seq_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		__skb_unlink(skb, &amp;clock-&gt;rx_queue);</div><div class='add'>+</div><div class='add'>+		rc = true;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;clock-&gt;rx_queue.lock, flags);</div><div class='add'>+</div><div class='add'>+	if (rc) {</div><div class='add'>+		shhwtstamps = skb_hwtstamps(skb);</div><div class='add'>+		shhwtstamps-&gt;hwtstamp = ktime_set(rx_ts-&gt;seconds, rx_ts-&gt;nsec);</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mchp_rds_ptp_match_rx_ts(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				     struct mchp_rds_ptp_rx_ts *rx_ts)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* If we failed to match the skb add it to the queue for when</div><div class='add'>+	 * the frame will come</div><div class='add'>+	 */</div><div class='add'>+	if (!mchp_rds_ptp_match_skb(clock, rx_ts)) {</div><div class='add'>+		spin_lock_irqsave(&amp;clock-&gt;rx_ts_lock, flags);</div><div class='add'>+		list_add(&amp;rx_ts-&gt;list, &amp;clock-&gt;rx_ts_list);</div><div class='add'>+		spin_unlock_irqrestore(&amp;clock-&gt;rx_ts_lock, flags);</div><div class='add'>+	} else {</div><div class='add'>+		kfree(rx_ts);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mchp_rds_ptp_match_rx_skb(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				      struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_rx_ts *rx_ts, *tmp, *rx_ts_var = NULL;</div><div class='add'>+	struct skb_shared_hwtstamps *shhwtstamps;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u16 skb_sig;</div><div class='add'>+</div><div class='add'>+	if (!mchp_rds_ptp_get_sig_rx(skb, &amp;skb_sig))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Iterate over all RX timestamps and match it with the received skbs */</div><div class='add'>+	spin_lock_irqsave(&amp;clock-&gt;rx_ts_lock, flags);</div><div class='add'>+	list_for_each_entry_safe(rx_ts, tmp, &amp;clock-&gt;rx_ts_list, list) {</div><div class='add'>+		/* Check if we found the signature we were looking for. */</div><div class='add'>+		if (skb_sig != rx_ts-&gt;seq_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		shhwtstamps = skb_hwtstamps(skb);</div><div class='add'>+		shhwtstamps-&gt;hwtstamp = ktime_set(rx_ts-&gt;seconds, rx_ts-&gt;nsec);</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+</div><div class='add'>+		rx_ts_var = rx_ts;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;clock-&gt;rx_ts_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (rx_ts_var) {</div><div class='add'>+		list_del(&amp;rx_ts_var-&gt;list);</div><div class='add'>+		kfree(rx_ts_var);</div><div class='add'>+	} else {</div><div class='add'>+		skb_queue_tail(&amp;clock-&gt;rx_queue, skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mchp_rds_ptp_rxtstamp(struct mii_timestamper *mii_ts,</div><div class='add'>+				  struct sk_buff *skb, int type)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock = container_of(mii_ts,</div><div class='add'>+						      struct mchp_rds_ptp_clock,</div><div class='add'>+						      mii_ts);</div><div class='add'>+</div><div class='add'>+	if (clock-&gt;rx_filter == HWTSTAMP_FILTER_NONE ||</div><div class='add'>+	    type == PTP_CLASS_NONE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if ((type &amp; clock-&gt;version) == 0 || (type &amp; clock-&gt;layer) == 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Here if match occurs skb is sent to application, If not skb is added</div><div class='add'>+	 * to queue and sending skb to application will get handled when</div><div class='add'>+	 * interrupt occurs i.e., it get handles in interrupt handler. By</div><div class='add'>+	 * any means skb will reach the application so we should not return</div><div class='add'>+	 * false here if skb doesn't matches.</div><div class='add'>+	 */</div><div class='add'>+	mchp_rds_ptp_match_rx_skb(clock, skb);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_hwtstamp_set(struct mii_timestamper *mii_ts,</div><div class='add'>+				     struct kernel_hwtstamp_config *config,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock =</div><div class='add'>+				container_of(mii_ts, struct mchp_rds_ptp_clock,</div><div class='add'>+					     mii_ts);</div><div class='add'>+	struct mchp_rds_ptp_rx_ts *rx_ts, *tmp;</div><div class='add'>+	int txcfg = 0, rxcfg = 0;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	clock-&gt;hwts_tx_type = config-&gt;tx_type;</div><div class='add'>+	clock-&gt;rx_filter = config-&gt;rx_filter;</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		clock-&gt;layer = 0;</div><div class='add'>+		clock-&gt;version = 0;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='add'>+		clock-&gt;layer = PTP_CLASS_L4;</div><div class='add'>+		clock-&gt;version = PTP_CLASS_V2;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='add'>+		clock-&gt;layer = PTP_CLASS_L2;</div><div class='add'>+		clock-&gt;version = PTP_CLASS_V2;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='add'>+		clock-&gt;layer = PTP_CLASS_L4 | PTP_CLASS_L2;</div><div class='add'>+		clock-&gt;version = PTP_CLASS_V2;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Setup parsing of the frames and enable the timestamping for ptp</div><div class='add'>+	 * frames</div><div class='add'>+	 */</div><div class='add'>+	if (clock-&gt;layer &amp; PTP_CLASS_L2) {</div><div class='add'>+		rxcfg = MCHP_RDS_PTP_PARSE_CONFIG_LAYER2_EN;</div><div class='add'>+		txcfg = MCHP_RDS_PTP_PARSE_CONFIG_LAYER2_EN;</div><div class='add'>+	}</div><div class='add'>+	if (clock-&gt;layer &amp; PTP_CLASS_L4) {</div><div class='add'>+		rxcfg |= MCHP_RDS_PTP_PARSE_CONFIG_IPV4_EN |</div><div class='add'>+			 MCHP_RDS_PTP_PARSE_CONFIG_IPV6_EN;</div><div class='add'>+		txcfg |= MCHP_RDS_PTP_PARSE_CONFIG_IPV4_EN |</div><div class='add'>+			 MCHP_RDS_PTP_PARSE_CONFIG_IPV6_EN;</div><div class='add'>+	}</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_PARSE_CONFIG,</div><div class='add'>+				    MCHP_RDS_PTP_PORT, rxcfg);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_PARSE_CONFIG,</div><div class='add'>+				    MCHP_RDS_PTP_PORT, txcfg);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_TIMESTAMP_EN,</div><div class='add'>+				    MCHP_RDS_PTP_PORT,</div><div class='add'>+				    MCHP_RDS_PTP_TIMESTAMP_EN_ALL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_TIMESTAMP_EN,</div><div class='add'>+				    MCHP_RDS_PTP_PORT,</div><div class='add'>+				    MCHP_RDS_PTP_TIMESTAMP_EN_ALL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (clock-&gt;hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC)</div><div class='add'>+		/* Enable / disable of the TX timestamp in the SYNC frames */</div><div class='add'>+		rc = mchp_rds_phy_modify_mmd(clock, MCHP_RDS_PTP_TX_MOD,</div><div class='add'>+					     MCHP_RDS_PTP_PORT,</div><div class='add'>+					     MCHP_RDS_TX_MOD_PTP_SYNC_TS_INSERT,</div><div class='add'>+					    MCHP_RDS_TX_MOD_PTP_SYNC_TS_INSERT);</div><div class='add'>+	else</div><div class='add'>+		rc = mchp_rds_phy_modify_mmd(clock, MCHP_RDS_PTP_TX_MOD,</div><div class='add'>+					     MCHP_RDS_PTP_PORT,</div><div class='add'>+					     MCHP_RDS_TX_MOD_PTP_SYNC_TS_INSERT,</div><div class='add'>+				      (u16)~MCHP_RDS_TX_MOD_PTP_SYNC_TS_INSERT);</div><div class='add'>+</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* In case of multiple starts and stops, these needs to be cleared */</div><div class='add'>+	spin_lock_irqsave(&amp;clock-&gt;rx_ts_lock, flags);</div><div class='add'>+	list_for_each_entry_safe(rx_ts, tmp, &amp;clock-&gt;rx_ts_list, list) {</div><div class='add'>+		list_del(&amp;rx_ts-&gt;list);</div><div class='add'>+		kfree(rx_ts);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;clock-&gt;rx_ts_lock, flags);</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_ptp_flush_fifo(clock, MCHP_RDS_PTP_INGRESS_FIFO);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_ptp_flush_fifo(clock, MCHP_RDS_PTP_EGRESS_FIFO);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Now enable the timestamping interrupts */</div><div class='add'>+	rc = mchp_rds_ptp_config_intr(clock,</div><div class='add'>+				      config-&gt;rx_filter != HWTSTAMP_FILTER_NONE);</div><div class='add'>+</div><div class='add'>+	return rc &lt; 0 ? rc : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_ts_info(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock = container_of(mii_ts,</div><div class='add'>+						      struct mchp_rds_ptp_clock,</div><div class='add'>+						      mii_ts);</div><div class='add'>+</div><div class='add'>+	info-&gt;phc_index = ptp_clock_index(clock-&gt;ptp_clock);</div><div class='add'>+</div><div class='add'>+	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+				SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+				SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+</div><div class='add'>+	info-&gt;tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON) |</div><div class='add'>+			 BIT(HWTSTAMP_TX_ONESTEP_SYNC);</div><div class='add'>+</div><div class='add'>+	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_NONE) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='add'>+			   BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_ltc_adjtime(struct ptp_clock_info *info, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock = container_of(info,</div><div class='add'>+						      struct mchp_rds_ptp_clock,</div><div class='add'>+						      caps);</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+	bool add = true;</div><div class='add'>+	int rc = 0;</div><div class='add'>+	u32 nsec;</div><div class='add'>+	s32 sec;</div><div class='add'>+</div><div class='add'>+	/* The HW allows up to 15 sec to adjust the time, but here we limit to</div><div class='add'>+	 * 10 sec the adjustment. The reason is, in case the adjustment is 14</div><div class='add'>+	 * sec and 999999999 nsec, then we add 8ns to compensate the actual</div><div class='add'>+	 * increment so the value can be bigger than 15 sec. Therefore limit the</div><div class='add'>+	 * possible adjustments so we will not have these corner cases</div><div class='add'>+	 */</div><div class='add'>+	if (delta &gt; 10000000000LL || delta &lt; -10000000000LL) {</div><div class='add'>+		/* The timeadjustment is too big, so fall back using set time */</div><div class='add'>+		u64 now;</div><div class='add'>+</div><div class='add'>+		info-&gt;gettime64(info, &amp;ts);</div><div class='add'>+</div><div class='add'>+		now = ktime_to_ns(timespec64_to_ktime(ts));</div><div class='add'>+		ts = ns_to_timespec64(now + delta);</div><div class='add'>+</div><div class='add'>+		info-&gt;settime64(info, &amp;ts);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	sec = div_u64_rem(abs(delta), NSEC_PER_SEC, &amp;nsec);</div><div class='add'>+	if (delta &lt; 0 &amp;&amp; nsec != 0) {</div><div class='add'>+		/* It is not allowed to adjust low the nsec part, therefore</div><div class='add'>+		 * subtract more from second part and add to nanosecond such</div><div class='add'>+		 * that would roll over, so the second part will increase</div><div class='add'>+		 */</div><div class='add'>+		sec--;</div><div class='add'>+		nsec = NSEC_PER_SEC - nsec;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate the adjustments and the direction */</div><div class='add'>+	if (delta &lt; 0)</div><div class='add'>+		add = false;</div><div class='add'>+</div><div class='add'>+	if (nsec &gt; 0) {</div><div class='add'>+		/* add 8 ns to cover the likely normal increment */</div><div class='add'>+		nsec += 8;</div><div class='add'>+</div><div class='add'>+		if (nsec &gt;= NSEC_PER_SEC) {</div><div class='add'>+			/* carry into seconds */</div><div class='add'>+			sec++;</div><div class='add'>+			nsec -= NSEC_PER_SEC;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;clock-&gt;ptp_lock);</div><div class='add'>+	if (sec) {</div><div class='add'>+		sec = abs(sec);</div><div class='add'>+</div><div class='add'>+		rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_STEP_ADJ_LO,</div><div class='add'>+					    MCHP_RDS_PTP_CLOCK, sec);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+</div><div class='add'>+		rc = mchp_rds_phy_set_bits_mmd(clock, MCHP_RDS_PTP_STEP_ADJ_HI,</div><div class='add'>+					       MCHP_RDS_PTP_CLOCK,</div><div class='add'>+					       ((add ?</div><div class='add'>+						 MCHP_RDS_PTP_STEP_ADJ_HI_DIR :</div><div class='add'>+						 0) | ((sec &gt;&gt; 16) &amp;</div><div class='add'>+						       GENMASK(13, 0))));</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+</div><div class='add'>+		rc = mchp_rds_phy_set_bits_mmd(clock, MCHP_RDS_PTP_CMD_CTL,</div><div class='add'>+					       MCHP_RDS_PTP_CLOCK,</div><div class='add'>+					     MCHP_RDS_PTP_CMD_CTL_LTC_STEP_SEC);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (nsec) {</div><div class='add'>+		rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_STEP_ADJ_LO,</div><div class='add'>+					    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+					    nsec &amp; GENMASK(15, 0));</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+</div><div class='add'>+		rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_STEP_ADJ_HI,</div><div class='add'>+					    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+					    (nsec &gt;&gt; 16) &amp; GENMASK(13, 0));</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+</div><div class='add'>+		rc = mchp_rds_phy_set_bits_mmd(clock, MCHP_RDS_PTP_CMD_CTL,</div><div class='add'>+					       MCHP_RDS_PTP_CLOCK,</div><div class='add'>+					    MCHP_RDS_PTP_CMD_CTL_LTC_STEP_NSEC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;clock-&gt;ptp_lock);</div><div class='add'>+	info-&gt;gettime64(info, &amp;ts);</div><div class='add'>+	mutex_lock(&amp;clock-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	/* Target update is required for pulse generation on events that</div><div class='add'>+	 * are enabled</div><div class='add'>+	 */</div><div class='add'>+	if (clock-&gt;mchp_rds_ptp_event &gt;= 0)</div><div class='add'>+		mchp_set_clock_target(clock,</div><div class='add'>+				      ts.tv_sec + MCHP_RDS_PTP_BUFFER_TIME, 0);</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;clock-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_ltc_adjfine(struct ptp_clock_info *info,</div><div class='add'>+				    long scaled_ppm)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock = container_of(info,</div><div class='add'>+						      struct mchp_rds_ptp_clock,</div><div class='add'>+						      caps);</div><div class='add'>+	u16 rate_lo, rate_hi;</div><div class='add'>+	bool faster = true;</div><div class='add'>+	u32 rate;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!scaled_ppm)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (scaled_ppm &lt; 0) {</div><div class='add'>+		scaled_ppm = -scaled_ppm;</div><div class='add'>+		faster = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rate = MCHP_RDS_PTP_1PPM_FORMAT * (upper_16_bits(scaled_ppm));</div><div class='add'>+	rate += (MCHP_RDS_PTP_1PPM_FORMAT * (lower_16_bits(scaled_ppm))) &gt;&gt; 16;</div><div class='add'>+</div><div class='add'>+	rate_lo = rate &amp; GENMASK(15, 0);</div><div class='add'>+	rate_hi = (rate &gt;&gt; 16) &amp; GENMASK(13, 0);</div><div class='add'>+</div><div class='add'>+	if (faster)</div><div class='add'>+		rate_hi |= MCHP_RDS_PTP_LTC_RATE_ADJ_HI_DIR;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;clock-&gt;ptp_lock);</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_RATE_ADJ_HI,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK, rate_hi);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_RATE_ADJ_LO,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK, rate_lo);</div><div class='add'>+	if (rc &gt; 0)</div><div class='add'>+		rc = 0;</div><div class='add'>+error:</div><div class='add'>+	mutex_unlock(&amp;clock-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_ltc_gettime64(struct ptp_clock_info *info,</div><div class='add'>+				      struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock = container_of(info,</div><div class='add'>+						      struct mchp_rds_ptp_clock,</div><div class='add'>+						      caps);</div><div class='add'>+	time64_t secs;</div><div class='add'>+	int rc = 0;</div><div class='add'>+	s64 nsecs;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;clock-&gt;ptp_lock);</div><div class='add'>+	/* Set read bit to 1 to save current values of 1588 local time counter</div><div class='add'>+	 * into PTP LTC seconds and nanoseconds registers.</div><div class='add'>+	 */</div><div class='add'>+	rc = mchp_rds_phy_set_bits_mmd(clock, MCHP_RDS_PTP_CMD_CTL,</div><div class='add'>+				       MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				       MCHP_RDS_PTP_CMD_CTL_CLOCK_READ);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	/* Get LTC clock values */</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_LTC_READ_SEC_HI,</div><div class='add'>+				   MCHP_RDS_PTP_CLOCK);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	secs = rc &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_LTC_READ_SEC_MID,</div><div class='add'>+				   MCHP_RDS_PTP_CLOCK);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	secs |= rc;</div><div class='add'>+	secs &lt;&lt;= 16;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_LTC_READ_SEC_LO,</div><div class='add'>+				   MCHP_RDS_PTP_CLOCK);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	secs |= rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_LTC_READ_NS_HI,</div><div class='add'>+				   MCHP_RDS_PTP_CLOCK);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	nsecs = (rc &amp; GENMASK(13, 0));</div><div class='add'>+	nsecs &lt;&lt;= 16;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_LTC_READ_NS_LO,</div><div class='add'>+				   MCHP_RDS_PTP_CLOCK);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	nsecs |= rc;</div><div class='add'>+</div><div class='add'>+	set_normalized_timespec64(ts, secs, nsecs);</div><div class='add'>+</div><div class='add'>+	if (rc &gt; 0)</div><div class='add'>+		rc = 0;</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;clock-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_ltc_settime64(struct ptp_clock_info *info,</div><div class='add'>+				      const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock = container_of(info,</div><div class='add'>+						      struct mchp_rds_ptp_clock,</div><div class='add'>+						      caps);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;clock-&gt;ptp_lock);</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_SEC_LO,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    lower_16_bits(ts-&gt;tv_sec));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_SEC_MID,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    upper_16_bits(ts-&gt;tv_sec));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_SEC_HI,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    upper_32_bits(ts-&gt;tv_sec) &amp; GENMASK(15, 0));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_NS_LO,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    lower_16_bits(ts-&gt;tv_nsec));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LTC_NS_HI,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				   upper_16_bits(ts-&gt;tv_nsec) &amp; GENMASK(13, 0));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	/* Set load bit to 1 to write PTP LTC seconds and nanoseconds</div><div class='add'>+	 * registers to 1588 local time counter.</div><div class='add'>+	 */</div><div class='add'>+	rc = mchp_rds_phy_set_bits_mmd(clock, MCHP_RDS_PTP_CMD_CTL,</div><div class='add'>+				       MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				       MCHP_RDS_PTP_CMD_CTL_CLOCK_LOAD);</div><div class='add'>+	if (rc &gt; 0)</div><div class='add'>+		rc = 0;</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;clock-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mchp_rds_ptp_get_sig_tx(struct sk_buff *skb, u16 *sig)</div><div class='add'>+{</div><div class='add'>+	struct ptp_header *ptp_header;</div><div class='add'>+	int type;</div><div class='add'>+</div><div class='add'>+	type = ptp_classify_raw(skb);</div><div class='add'>+	if (type == PTP_CLASS_NONE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	ptp_header = ptp_parse_header(skb, type);</div><div class='add'>+	if (!ptp_header)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	*sig = (__force u16)(ntohs(ptp_header-&gt;sequence_id));</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mchp_rds_ptp_match_tx_skb(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				      u32 seconds, u32 nsec, u16 seq_id)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps shhwtstamps;</div><div class='add'>+	struct sk_buff *skb, *skb_tmp;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool rc = false;</div><div class='add'>+	u16 skb_sig;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;clock-&gt;tx_queue.lock, flags);</div><div class='add'>+	skb_queue_walk_safe(&amp;clock-&gt;tx_queue, skb, skb_tmp) {</div><div class='add'>+		if (!mchp_rds_ptp_get_sig_tx(skb, &amp;skb_sig))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (skb_sig != seq_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		__skb_unlink(skb, &amp;clock-&gt;tx_queue);</div><div class='add'>+		rc = true;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;clock-&gt;tx_queue.lock, flags);</div><div class='add'>+</div><div class='add'>+	if (rc) {</div><div class='add'>+		shhwtstamps.hwtstamp = ktime_set(seconds, nsec);</div><div class='add'>+		skb_complete_tx_timestamp(skb, &amp;shhwtstamps);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mchp_rds_ptp_rx_ts</div><div class='add'>+		       *mchp_rds_ptp_get_rx_ts(struct mchp_rds_ptp_clock *clock)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = clock-&gt;phydev;</div><div class='add'>+	struct mchp_rds_ptp_rx_ts *rx_ts = NULL;</div><div class='add'>+	u32 sec, nsec;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_RX_INGRESS_NS_HI,</div><div class='add'>+				   MCHP_RDS_PTP_PORT);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+	if (!(rc &amp; MCHP_RDS_PTP_RX_INGRESS_NS_HI_TS_VALID)) {</div><div class='add'>+		phydev_err(phydev, "RX Timestamp is not valid!\n");</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+	nsec = (rc &amp; GENMASK(13, 0)) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_RX_INGRESS_NS_LO,</div><div class='add'>+				   MCHP_RDS_PTP_PORT);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+	nsec |= rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_RX_INGRESS_SEC_HI,</div><div class='add'>+				   MCHP_RDS_PTP_PORT);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+	sec = rc &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_RX_INGRESS_SEC_LO,</div><div class='add'>+				   MCHP_RDS_PTP_PORT);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+	sec |= rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_RX_MSG_HDR2,</div><div class='add'>+				   MCHP_RDS_PTP_PORT);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	rx_ts = kmalloc(sizeof(*rx_ts), GFP_KERNEL);</div><div class='add'>+	if (!rx_ts)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	rx_ts-&gt;seconds = sec;</div><div class='add'>+	rx_ts-&gt;nsec = nsec;</div><div class='add'>+	rx_ts-&gt;seq_id = rc;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	return rx_ts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mchp_rds_ptp_process_rx_ts(struct mchp_rds_ptp_clock *clock)</div><div class='add'>+{</div><div class='add'>+	int caps;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		struct mchp_rds_ptp_rx_ts *rx_ts;</div><div class='add'>+</div><div class='add'>+		rx_ts = mchp_rds_ptp_get_rx_ts(clock);</div><div class='add'>+		if (rx_ts)</div><div class='add'>+			mchp_rds_ptp_match_rx_ts(clock, rx_ts);</div><div class='add'>+</div><div class='add'>+		caps = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_CAP_INFO,</div><div class='add'>+					     MCHP_RDS_PTP_PORT);</div><div class='add'>+		if (caps &lt; 0)</div><div class='add'>+			return;</div><div class='add'>+	} while (MCHP_RDS_PTP_RX_TS_CNT(caps) &gt; 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mchp_rds_ptp_get_tx_ts(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				   u32 *sec, u32 *nsec, u16 *seq)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_TX_EGRESS_NS_HI,</div><div class='add'>+				   MCHP_RDS_PTP_PORT);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+	if (!(rc &amp; MCHP_RDS_PTP_TX_EGRESS_NS_HI_TS_VALID))</div><div class='add'>+		return false;</div><div class='add'>+	*nsec = (rc &amp; GENMASK(13, 0)) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_TX_EGRESS_NS_LO,</div><div class='add'>+				   MCHP_RDS_PTP_PORT);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+	*nsec = *nsec | rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_TX_EGRESS_SEC_HI,</div><div class='add'>+				   MCHP_RDS_PTP_PORT);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+	*sec = rc &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_TX_EGRESS_SEC_LO,</div><div class='add'>+				   MCHP_RDS_PTP_PORT);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+	*sec = *sec | rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_TX_MSG_HDR2,</div><div class='add'>+				   MCHP_RDS_PTP_PORT);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	*seq = rc;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mchp_rds_ptp_process_tx_ts(struct mchp_rds_ptp_clock *clock)</div><div class='add'>+{</div><div class='add'>+	int caps;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		u32 sec, nsec;</div><div class='add'>+		u16 seq;</div><div class='add'>+</div><div class='add'>+		if (mchp_rds_ptp_get_tx_ts(clock, &amp;sec, &amp;nsec, &amp;seq))</div><div class='add'>+			mchp_rds_ptp_match_tx_skb(clock, sec, nsec, seq);</div><div class='add'>+</div><div class='add'>+		caps = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_CAP_INFO,</div><div class='add'>+					     MCHP_RDS_PTP_PORT);</div><div class='add'>+		if (caps &lt; 0)</div><div class='add'>+			return;</div><div class='add'>+	} while (MCHP_RDS_PTP_TX_TS_CNT(caps) &gt; 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mchp_rds_ptp_top_config_intr(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				 u16 reg, u16 val, bool clear)</div><div class='add'>+{</div><div class='add'>+	if (clear)</div><div class='add'>+		return phy_clear_bits_mmd(clock-&gt;phydev, PTP_MMD(clock), reg,</div><div class='add'>+					  val);</div><div class='add'>+	else</div><div class='add'>+		return phy_set_bits_mmd(clock-&gt;phydev, PTP_MMD(clock), reg,</div><div class='add'>+					val);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mchp_rds_ptp_top_config_intr);</div><div class='add'>+</div><div class='add'>+irqreturn_t mchp_rds_ptp_handle_interrupt(struct mchp_rds_ptp_clock *clock)</div><div class='add'>+{</div><div class='add'>+	int irq_sts;</div><div class='add'>+</div><div class='add'>+	/* To handle rogue interrupt scenarios */</div><div class='add'>+	if (!clock)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		irq_sts = mchp_rds_phy_read_mmd(clock, MCHP_RDS_PTP_INT_STS,</div><div class='add'>+						MCHP_RDS_PTP_PORT);</div><div class='add'>+		if (irq_sts &lt; 0)</div><div class='add'>+			return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+		if (irq_sts &amp; MCHP_RDS_PTP_INT_RX_TS_EN)</div><div class='add'>+			mchp_rds_ptp_process_rx_ts(clock);</div><div class='add'>+</div><div class='add'>+		if (irq_sts &amp; MCHP_RDS_PTP_INT_TX_TS_EN)</div><div class='add'>+			mchp_rds_ptp_process_tx_ts(clock);</div><div class='add'>+</div><div class='add'>+		if (irq_sts &amp; MCHP_RDS_PTP_INT_TX_TS_OVRFL_EN)</div><div class='add'>+			mchp_rds_ptp_flush_fifo(clock,</div><div class='add'>+						MCHP_RDS_PTP_EGRESS_FIFO);</div><div class='add'>+</div><div class='add'>+		if (irq_sts &amp; MCHP_RDS_PTP_INT_RX_TS_OVRFL_EN)</div><div class='add'>+			mchp_rds_ptp_flush_fifo(clock,</div><div class='add'>+						MCHP_RDS_PTP_INGRESS_FIFO);</div><div class='add'>+	} while (irq_sts &amp; (MCHP_RDS_PTP_INT_RX_TS_EN |</div><div class='add'>+			    MCHP_RDS_PTP_INT_TX_TS_EN |</div><div class='add'>+			    MCHP_RDS_PTP_INT_TX_TS_OVRFL_EN |</div><div class='add'>+			    MCHP_RDS_PTP_INT_RX_TS_OVRFL_EN));</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mchp_rds_ptp_handle_interrupt);</div><div class='add'>+</div><div class='add'>+static int mchp_rds_ptp_init(struct mchp_rds_ptp_clock *clock)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Disable PTP */</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CMD_CTL,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    MCHP_RDS_PTP_CMD_CTL_DIS);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Disable TSU */</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TSU_GEN_CONFIG,</div><div class='add'>+				    MCHP_RDS_PTP_PORT, 0);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Clear PTP interrupt status registers */</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TSU_HARD_RESET,</div><div class='add'>+				    MCHP_RDS_PTP_PORT,</div><div class='add'>+				    MCHP_RDS_PTP_TSU_HARDRESET);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Predictor enable */</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_LATENCY_CORRECTION_CTL,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    MCHP_RDS_PTP_LATENCY_SETTING);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Configure PTP operational mode */</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_OP_MODE,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    MCHP_RDS_PTP_OP_MODE_STANDALONE);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Reference clock configuration */</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_REF_CLK_CFG,</div><div class='add'>+				    MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				    MCHP_RDS_PTP_REF_CLK_CFG_SET);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Classifier configurations */</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_PARSE_CONFIG,</div><div class='add'>+				    MCHP_RDS_PTP_PORT, 0);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_PARSE_CONFIG,</div><div class='add'>+				    MCHP_RDS_PTP_PORT, 0);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_PARSE_L2_ADDR_EN,</div><div class='add'>+				    MCHP_RDS_PTP_PORT, 0);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_PARSE_L2_ADDR_EN,</div><div class='add'>+				    MCHP_RDS_PTP_PORT, 0);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_PARSE_IPV4_ADDR_EN,</div><div class='add'>+				    MCHP_RDS_PTP_PORT, 0);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_PARSE_IPV4_ADDR_EN,</div><div class='add'>+				    MCHP_RDS_PTP_PORT, 0);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_RX_VERSION,</div><div class='add'>+				    MCHP_RDS_PTP_PORT,</div><div class='add'>+				    MCHP_RDS_PTP_MAX_VERSION(0xff) |</div><div class='add'>+				    MCHP_RDS_PTP_MIN_VERSION(0x0));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TX_VERSION,</div><div class='add'>+				    MCHP_RDS_PTP_PORT,</div><div class='add'>+				    MCHP_RDS_PTP_MAX_VERSION(0xff) |</div><div class='add'>+				    MCHP_RDS_PTP_MIN_VERSION(0x0));</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Enable TSU */</div><div class='add'>+	rc = mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_TSU_GEN_CONFIG,</div><div class='add'>+				    MCHP_RDS_PTP_PORT,</div><div class='add'>+				    MCHP_RDS_PTP_TSU_GEN_CFG_TSU_EN);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Enable PTP */</div><div class='add'>+	return mchp_rds_phy_write_mmd(clock, MCHP_RDS_PTP_CMD_CTL,</div><div class='add'>+				      MCHP_RDS_PTP_CLOCK,</div><div class='add'>+				      MCHP_RDS_PTP_CMD_CTL_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mchp_rds_ptp_clock *mchp_rds_ptp_probe(struct phy_device *phydev, u8 mmd,</div><div class='add'>+					      u16 clk_base_addr,</div><div class='add'>+					      u16 port_base_addr)</div><div class='add'>+{</div><div class='add'>+	struct mchp_rds_ptp_clock *clock;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	clock = devm_kzalloc(&amp;phydev-&gt;mdio.dev, sizeof(*clock), GFP_KERNEL);</div><div class='add'>+	if (!clock)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	clock-&gt;port_base_addr	= port_base_addr;</div><div class='add'>+	clock-&gt;clk_base_addr	= clk_base_addr;</div><div class='add'>+	clock-&gt;mmd		= mmd;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;clock-&gt;ptp_lock);</div><div class='add'>+	clock-&gt;pin_config = devm_kmalloc_array(&amp;phydev-&gt;mdio.dev,</div><div class='add'>+					       MCHP_RDS_PTP_N_PIN,</div><div class='add'>+					       sizeof(*clock-&gt;pin_config),</div><div class='add'>+					       GFP_KERNEL);</div><div class='add'>+	if (!clock-&gt;pin_config)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; MCHP_RDS_PTP_N_PIN; ++i) {</div><div class='add'>+		struct ptp_pin_desc *p = &amp;clock-&gt;pin_config[i];</div><div class='add'>+</div><div class='add'>+		memset(p, 0, sizeof(*p));</div><div class='add'>+		snprintf(p-&gt;name, sizeof(p-&gt;name), "pin%d", i);</div><div class='add'>+		p-&gt;index = i;</div><div class='add'>+		p-&gt;func = PTP_PF_NONE;</div><div class='add'>+	}</div><div class='add'>+	/* Register PTP clock */</div><div class='add'>+	clock-&gt;caps.owner          = THIS_MODULE;</div><div class='add'>+	snprintf(clock-&gt;caps.name, 30, "%s", phydev-&gt;drv-&gt;name);</div><div class='add'>+	clock-&gt;caps.max_adj        = MCHP_RDS_PTP_MAX_ADJ;</div><div class='add'>+	clock-&gt;caps.n_ext_ts       = 0;</div><div class='add'>+	clock-&gt;caps.pps            = 0;</div><div class='add'>+	clock-&gt;caps.n_pins         = MCHP_RDS_PTP_N_PIN;</div><div class='add'>+	clock-&gt;caps.n_per_out      = MCHP_RDS_PTP_N_PEROUT;</div><div class='add'>+	clock-&gt;caps.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE;</div><div class='add'>+	clock-&gt;caps.pin_config     = clock-&gt;pin_config;</div><div class='add'>+	clock-&gt;caps.adjfine        = mchp_rds_ptp_ltc_adjfine;</div><div class='add'>+	clock-&gt;caps.adjtime        = mchp_rds_ptp_ltc_adjtime;</div><div class='add'>+	clock-&gt;caps.gettime64      = mchp_rds_ptp_ltc_gettime64;</div><div class='add'>+	clock-&gt;caps.settime64      = mchp_rds_ptp_ltc_settime64;</div><div class='add'>+	clock-&gt;caps.enable         = mchp_rds_ptpci_enable;</div><div class='add'>+	clock-&gt;caps.verify         = mchp_rds_ptpci_verify;</div><div class='add'>+	clock-&gt;caps.getcrosststamp = NULL;</div><div class='add'>+	clock-&gt;ptp_clock = ptp_clock_register(&amp;clock-&gt;caps,</div><div class='add'>+					      &amp;phydev-&gt;mdio.dev);</div><div class='add'>+	if (IS_ERR(clock-&gt;ptp_clock))</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	/* Check if PHC support is missing at the configuration level */</div><div class='add'>+	if (!clock-&gt;ptp_clock)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* Initialize the SW */</div><div class='add'>+	skb_queue_head_init(&amp;clock-&gt;tx_queue);</div><div class='add'>+	skb_queue_head_init(&amp;clock-&gt;rx_queue);</div><div class='add'>+	INIT_LIST_HEAD(&amp;clock-&gt;rx_ts_list);</div><div class='add'>+	spin_lock_init(&amp;clock-&gt;rx_ts_lock);</div><div class='add'>+</div><div class='add'>+	clock-&gt;mii_ts.rxtstamp = mchp_rds_ptp_rxtstamp;</div><div class='add'>+	clock-&gt;mii_ts.txtstamp = mchp_rds_ptp_txtstamp;</div><div class='add'>+	clock-&gt;mii_ts.hwtstamp_set = mchp_rds_ptp_hwtstamp_set;</div><div class='add'>+	clock-&gt;mii_ts.ts_info = mchp_rds_ptp_ts_info;</div><div class='add'>+</div><div class='add'>+	phydev-&gt;mii_ts = &amp;clock-&gt;mii_ts;</div><div class='add'>+</div><div class='add'>+	clock-&gt;mchp_rds_ptp_event = -1;</div><div class='add'>+</div><div class='add'>+	/* Timestamp selected by default to keep legacy API */</div><div class='add'>+	phydev-&gt;default_timestamp = true;</div><div class='add'>+</div><div class='add'>+	clock-&gt;phydev = phydev;</div><div class='add'>+</div><div class='add'>+	rc = mchp_rds_ptp_init(clock);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return ERR_PTR(rc);</div><div class='add'>+</div><div class='add'>+	return clock;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mchp_rds_ptp_probe);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("MICROCHIP PHY RDS PTP driver");</div><div class='add'>+MODULE_AUTHOR("Divya Koppera");</div><div class='head'>diff --git a/drivers/net/phy/microchip_rds_ptp.h b/drivers/net/phy/microchip_rds_ptp.h<br/>new file mode 100644<br/>index 000000000000..25af68337b94<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/microchip_rds_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/microchip_rds_ptp.h</a></div><div class='hunk'>@@ -0,0 +1,247 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0</div><div class='add'>+ * Copyright (C) 2024 Microchip Technology</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MICROCHIP_RDS_PTP_H</div><div class='add'>+#define _MICROCHIP_RDS_PTP_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock.h&gt;</div><div class='add'>+#include &lt;linux/ptp_classify.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='add'>+#include &lt;linux/mii.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_CMD_CTL			0x0</div><div class='add'>+#define MCHP_RDS_PTP_CMD_CTL_LTC_STEP_NSEC	BIT(6)</div><div class='add'>+#define MCHP_RDS_PTP_CMD_CTL_LTC_STEP_SEC	BIT(5)</div><div class='add'>+#define MCHP_RDS_PTP_CMD_CTL_CLOCK_LOAD		BIT(4)</div><div class='add'>+#define MCHP_RDS_PTP_CMD_CTL_CLOCK_READ		BIT(3)</div><div class='add'>+#define MCHP_RDS_PTP_CMD_CTL_EN			BIT(1)</div><div class='add'>+#define MCHP_RDS_PTP_CMD_CTL_DIS		BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_REF_CLK_CFG		0x2</div><div class='add'>+#define MCHP_RDS_PTP_REF_CLK_SRC_250MHZ		0x0</div><div class='add'>+#define MCHP_RDS_PTP_REF_CLK_PERIOD_OVERRIDE	BIT(9)</div><div class='add'>+#define MCHP_RDS_PTP_REF_CLK_PERIOD		4</div><div class='add'>+#define MCHP_RDS_PTP_REF_CLK_CFG_SET	(MCHP_RDS_PTP_REF_CLK_SRC_250MHZ |\</div><div class='add'>+					 MCHP_RDS_PTP_REF_CLK_PERIOD_OVERRIDE |\</div><div class='add'>+					 MCHP_RDS_PTP_REF_CLK_PERIOD)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_LTC_SEC_HI			0x5</div><div class='add'>+#define MCHP_RDS_PTP_LTC_SEC_MID		0x6</div><div class='add'>+#define MCHP_RDS_PTP_LTC_SEC_LO			0x7</div><div class='add'>+#define MCHP_RDS_PTP_LTC_NS_HI			0x8</div><div class='add'>+#define MCHP_RDS_PTP_LTC_NS_LO			0x9</div><div class='add'>+#define MCHP_RDS_PTP_LTC_RATE_ADJ_HI		0xc</div><div class='add'>+#define MCHP_RDS_PTP_LTC_RATE_ADJ_HI_DIR	BIT(15)</div><div class='add'>+#define MCHP_RDS_PTP_LTC_RATE_ADJ_LO		0xd</div><div class='add'>+#define MCHP_RDS_PTP_STEP_ADJ_HI		0x12</div><div class='add'>+#define MCHP_RDS_PTP_STEP_ADJ_HI_DIR		BIT(15)</div><div class='add'>+#define MCHP_RDS_PTP_STEP_ADJ_LO		0x13</div><div class='add'>+#define MCHP_RDS_PTP_LTC_READ_SEC_HI		0x29</div><div class='add'>+#define MCHP_RDS_PTP_LTC_READ_SEC_MID		0x2a</div><div class='add'>+#define MCHP_RDS_PTP_LTC_READ_SEC_LO		0x2b</div><div class='add'>+#define MCHP_RDS_PTP_LTC_READ_NS_HI		0x2c</div><div class='add'>+#define MCHP_RDS_PTP_LTC_READ_NS_LO		0x2d</div><div class='add'>+#define MCHP_RDS_PTP_OP_MODE			0x41</div><div class='add'>+#define MCHP_RDS_PTP_OP_MODE_DIS		0</div><div class='add'>+#define MCHP_RDS_PTP_OP_MODE_STANDALONE		1</div><div class='add'>+#define MCHP_RDS_PTP_LATENCY_CORRECTION_CTL	0x44</div><div class='add'>+#define MCHP_RDS_PTP_PREDICTOR_EN		BIT(6)</div><div class='add'>+#define MCHP_RDS_PTP_TX_PRED_DIS		BIT(1)</div><div class='add'>+#define MCHP_RDS_PTP_RX_PRED_DIS		BIT(0)</div><div class='add'>+#define MCHP_RDS_PTP_LATENCY_SETTING		(MCHP_RDS_PTP_PREDICTOR_EN | \</div><div class='add'>+						 MCHP_RDS_PTP_TX_PRED_DIS | \</div><div class='add'>+						 MCHP_RDS_PTP_RX_PRED_DIS)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_INT_EN			0x0</div><div class='add'>+#define MCHP_RDS_PTP_INT_STS			0x01</div><div class='add'>+#define MCHP_RDS_PTP_INT_TX_TS_OVRFL_EN		BIT(3)</div><div class='add'>+#define MCHP_RDS_PTP_INT_TX_TS_EN		BIT(2)</div><div class='add'>+#define MCHP_RDS_PTP_INT_RX_TS_OVRFL_EN		BIT(1)</div><div class='add'>+#define MCHP_RDS_PTP_INT_RX_TS_EN		BIT(0)</div><div class='add'>+#define MCHP_RDS_PTP_INT_ALL_MSK	(MCHP_RDS_PTP_INT_TX_TS_OVRFL_EN | \</div><div class='add'>+					 MCHP_RDS_PTP_INT_TX_TS_EN | \</div><div class='add'>+					 MCHP_RDS_PTP_INT_RX_TS_OVRFL_EN |\</div><div class='add'>+					 MCHP_RDS_PTP_INT_RX_TS_EN)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_CAP_INFO			0x2e</div><div class='add'>+#define MCHP_RDS_PTP_TX_TS_CNT(v)		(((v) &amp; GENMASK(11, 8)) &gt;&gt; 8)</div><div class='add'>+#define MCHP_RDS_PTP_RX_TS_CNT(v)		((v) &amp; GENMASK(3, 0))</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_RX_PARSE_CONFIG		0x42</div><div class='add'>+#define MCHP_RDS_PTP_RX_PARSE_L2_ADDR_EN	0x44</div><div class='add'>+#define MCHP_RDS_PTP_RX_PARSE_IPV4_ADDR_EN	0x45</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_RX_TIMESTAMP_CONFIG	0x4e</div><div class='add'>+#define MCHP_RDS_PTP_RX_TIMESTAMP_CONFIG_PTP_FCS_DIS BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_RX_VERSION			0x48</div><div class='add'>+#define MCHP_RDS_PTP_RX_TIMESTAMP_EN		0x4d</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_RX_INGRESS_NS_HI		0x54</div><div class='add'>+#define MCHP_RDS_PTP_RX_INGRESS_NS_HI_TS_VALID	BIT(15)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_RX_INGRESS_NS_LO		0x55</div><div class='add'>+#define MCHP_RDS_PTP_RX_INGRESS_SEC_HI		0x56</div><div class='add'>+#define MCHP_RDS_PTP_RX_INGRESS_SEC_LO		0x57</div><div class='add'>+#define MCHP_RDS_PTP_RX_MSG_HDR2		0x59</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_TX_PARSE_CONFIG		0x82</div><div class='add'>+#define MCHP_RDS_PTP_PARSE_CONFIG_LAYER2_EN	BIT(0)</div><div class='add'>+#define MCHP_RDS_PTP_PARSE_CONFIG_IPV4_EN	BIT(1)</div><div class='add'>+#define MCHP_RDS_PTP_PARSE_CONFIG_IPV6_EN	BIT(2)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_TX_PARSE_L2_ADDR_EN	0x84</div><div class='add'>+#define MCHP_RDS_PTP_TX_PARSE_IPV4_ADDR_EN	0x85</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_TX_VERSION			0x88</div><div class='add'>+#define MCHP_RDS_PTP_MAX_VERSION(x)		(((x) &amp; GENMASK(7, 0)) &lt;&lt; 8)</div><div class='add'>+#define MCHP_RDS_PTP_MIN_VERSION(x)		((x) &amp; GENMASK(7, 0))</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_TX_TIMESTAMP_EN		0x8d</div><div class='add'>+#define MCHP_RDS_PTP_TIMESTAMP_EN_SYNC		BIT(0)</div><div class='add'>+#define MCHP_RDS_PTP_TIMESTAMP_EN_DREQ		BIT(1)</div><div class='add'>+#define MCHP_RDS_PTP_TIMESTAMP_EN_PDREQ		BIT(2)</div><div class='add'>+#define MCHP_RDS_PTP_TIMESTAMP_EN_PDRES		BIT(3)</div><div class='add'>+#define MCHP_RDS_PTP_TIMESTAMP_EN_ALL	(MCHP_RDS_PTP_TIMESTAMP_EN_SYNC |\</div><div class='add'>+					 MCHP_RDS_PTP_TIMESTAMP_EN_DREQ |\</div><div class='add'>+					 MCHP_RDS_PTP_TIMESTAMP_EN_PDREQ |\</div><div class='add'>+					 MCHP_RDS_PTP_TIMESTAMP_EN_PDRES)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_TX_TIMESTAMP_CONFIG	0x8e</div><div class='add'>+#define MCHP_RDS_PTP_TX_TIMESTAMP_CONFIG_PTP_FCS_DIS BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_TX_MOD			0x8f</div><div class='add'>+#define MCHP_RDS_TX_MOD_PTP_SYNC_TS_INSERT	BIT(12)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_TX_EGRESS_NS_HI		0x94</div><div class='add'>+#define MCHP_RDS_PTP_TX_EGRESS_NS_HI_TS_VALID	BIT(15)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_TX_EGRESS_NS_LO		0x95</div><div class='add'>+#define MCHP_RDS_PTP_TX_EGRESS_SEC_HI		0x96</div><div class='add'>+#define MCHP_RDS_PTP_TX_EGRESS_SEC_LO		0x97</div><div class='add'>+#define MCHP_RDS_PTP_TX_MSG_HDR2		0x99</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_TSU_GEN_CONFIG		0xc0</div><div class='add'>+#define MCHP_RDS_PTP_TSU_GEN_CFG_TSU_EN		BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_TSU_HARD_RESET		0xc1</div><div class='add'>+#define MCHP_RDS_PTP_TSU_HARDRESET		BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_CLK_TRGT_SEC_HI		0x15</div><div class='add'>+#define MCHP_RDS_PTP_CLK_TRGT_SEC_LO		0x16</div><div class='add'>+#define MCHP_RDS_PTP_CLK_TRGT_NS_HI		0x17</div><div class='add'>+#define MCHP_RDS_PTP_CLK_TRGT_NS_LO		0x18</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_CLK_TRGT_RELOAD_SEC_HI	0x19</div><div class='add'>+#define MCHP_RDS_PTP_CLK_TRGT_RELOAD_SEC_LO	0x1a</div><div class='add'>+#define MCHP_RDS_PTP_CLK_TRGT_RELOAD_NS_HI	0x1b</div><div class='add'>+#define MCHP_RDS_PTP_CLK_TRGT_RELOAD_NS_LO	0x1c</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_GEN_CFG			0x01</div><div class='add'>+#define MCHP_RDS_PTP_GEN_CFG_LTC_EVT_MASK	GENMASK(11, 8)</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_GEN_CFG_LTC_EVT_SET(value) (((value) &amp; 0xF) &lt;&lt; 4)</div><div class='add'>+#define MCHP_RDS_PTP_GEN_CFG_RELOAD_ADD		BIT(0)</div><div class='add'>+#define MCHP_RDS_PTP_GEN_CFG_POLARITY		BIT(1)</div><div class='add'>+</div><div class='add'>+/* Represents 1ppm adjustment in 2^32 format with</div><div class='add'>+ * each nsec contains 4 clock cycles in 250MHz.</div><div class='add'>+ * The value is calculated as following: (1/1000000)/((2^-32)/4)</div><div class='add'>+ */</div><div class='add'>+#define MCHP_RDS_PTP_1PPM_FORMAT		17179</div><div class='add'>+#define MCHP_RDS_PTP_FIFO_SIZE			8</div><div class='add'>+#define MCHP_RDS_PTP_MAX_ADJ			31249999</div><div class='add'>+</div><div class='add'>+#define MCHP_RDS_PTP_BUFFER_TIME		2</div><div class='add'>+#define MCHP_RDS_PTP_N_PIN			4</div><div class='add'>+#define MCHP_RDS_PTP_N_PEROUT			1</div><div class='add'>+</div><div class='add'>+#define BASE_CLK(p)				((p)-&gt;clk_base_addr)</div><div class='add'>+#define BASE_PORT(p)				((p)-&gt;port_base_addr)</div><div class='add'>+#define PTP_MMD(p)				((p)-&gt;mmd)</div><div class='add'>+</div><div class='add'>+enum mchp_rds_ptp_base {</div><div class='add'>+	MCHP_RDS_PTP_PORT,</div><div class='add'>+	MCHP_RDS_PTP_CLOCK</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mchp_rds_ptp_fifo_dir {</div><div class='add'>+	MCHP_RDS_PTP_INGRESS_FIFO,</div><div class='add'>+	MCHP_RDS_PTP_EGRESS_FIFO</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mchp_rds_ptp_clock {</div><div class='add'>+	struct mii_timestamper mii_ts;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	struct ptp_clock *ptp_clock;</div><div class='add'>+</div><div class='add'>+	struct sk_buff_head tx_queue;</div><div class='add'>+	struct sk_buff_head rx_queue;</div><div class='add'>+	struct list_head rx_ts_list;</div><div class='add'>+</div><div class='add'>+	struct ptp_clock_info caps;</div><div class='add'>+</div><div class='add'>+	/* Lock for Rx ts fifo */</div><div class='add'>+	spinlock_t rx_ts_lock;</div><div class='add'>+	int hwts_tx_type;</div><div class='add'>+</div><div class='add'>+	enum hwtstamp_rx_filters rx_filter;</div><div class='add'>+	int layer;</div><div class='add'>+	int version;</div><div class='add'>+	u16 port_base_addr;</div><div class='add'>+	u16 clk_base_addr;</div><div class='add'>+</div><div class='add'>+	/* Lock for phc */</div><div class='add'>+	struct mutex ptp_lock;</div><div class='add'>+	u8 mmd;</div><div class='add'>+	int mchp_rds_ptp_event;</div><div class='add'>+	int event_pin;</div><div class='add'>+	struct ptp_pin_desc *pin_config;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mchp_rds_ptp_rx_ts {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	u32 seconds;</div><div class='add'>+	u32 nsec;</div><div class='add'>+	u16 seq_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_MICROCHIP_PHY_RDS_PTP)</div><div class='add'>+</div><div class='add'>+struct mchp_rds_ptp_clock *mchp_rds_ptp_probe(struct phy_device *phydev, u8 mmd,</div><div class='add'>+					      u16 clk_base, u16 port_base);</div><div class='add'>+</div><div class='add'>+int mchp_rds_ptp_top_config_intr(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+				 u16 reg, u16 val, bool enable);</div><div class='add'>+</div><div class='add'>+irqreturn_t mchp_rds_ptp_handle_interrupt(struct mchp_rds_ptp_clock *clock);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline struct mchp_rds_ptp_clock *mchp_rds_ptp_probe(struct phy_device</div><div class='add'>+							    *phydev, u8 mmd,</div><div class='add'>+							    u16 clk_base,</div><div class='add'>+							    u16 port_base)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int mchp_rds_ptp_top_config_intr(struct mchp_rds_ptp_clock *clock,</div><div class='add'>+					       u16 reg, u16 val, bool enable)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline irqreturn_t mchp_rds_ptp_handle_interrupt(struct</div><div class='add'>+							mchp_rds_ptp_clock</div><div class='add'>+							* clock)</div><div class='add'>+{</div><div class='add'>+	return IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif //CONFIG_MICROCHIP_PHY_RDS_PTP</div><div class='add'>+</div><div class='add'>+#endif //_MICROCHIP_RDS_PTP_H</div><div class='head'>diff --git a/drivers/net/phy/microchip_t1.c b/drivers/net/phy/microchip_t1.c<br/>index 71d6050b2833..62b36a318100 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/microchip_t1.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/microchip_t1.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/microchip_t1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/microchip_t1.c</a></div><div class='hunk'>@@ -10,11 +10,15 @@</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool_netlink.h&gt;</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include "microchip_rds_ptp.h"</div><div class='ctx'> </div><div class='ctx'> #define PHY_ID_LAN87XX				0x0007c150</div><div class='ctx'> #define PHY_ID_LAN937X				0x0007c180</div><div class='ctx'> #define PHY_ID_LAN887X				0x0007c1f0</div><div class='ctx'> </div><div class='add'>+#define MCHP_RDS_PTP_LTC_BASE_ADDR		0xe000</div><div class='add'>+#define MCHP_RDS_PTP_PORT_BASE_ADDR	    (MCHP_RDS_PTP_LTC_BASE_ADDR + 0x800)</div><div class='add'>+</div><div class='ctx'> /* External Register Control Register */</div><div class='ctx'> #define LAN87XX_EXT_REG_CTL                     (0x14)</div><div class='ctx'> #define LAN87XX_EXT_REG_CTL_RD_CTL              (0x1000)</div><div class='hunk'>@@ -229,10 +233,14 @@</div><div class='ctx'> </div><div class='ctx'> #define LAN887X_INT_STS				0xf000</div><div class='ctx'> #define LAN887X_INT_MSK				0xf001</div><div class='add'>+#define LAN887X_INT_MSK_P1588_MOD_INT_MSK	BIT(3)</div><div class='ctx'> #define LAN887X_INT_MSK_T1_PHY_INT_MSK		BIT(2)</div><div class='ctx'> #define LAN887X_INT_MSK_LINK_UP_MSK		BIT(1)</div><div class='ctx'> #define LAN887X_INT_MSK_LINK_DOWN_MSK		BIT(0)</div><div class='ctx'> </div><div class='add'>+#define LAN887X_MX_CHIP_TOP_REG_CONTROL1	0xF002</div><div class='add'>+#define LAN887X_MX_CHIP_TOP_REG_CONTROL1_EVT_EN	BIT(8)</div><div class='add'>+</div><div class='ctx'> #define LAN887X_MX_CHIP_TOP_LINK_MSK	(LAN887X_INT_MSK_LINK_UP_MSK |\</div><div class='ctx'> 					 LAN887X_INT_MSK_LINK_DOWN_MSK)</div><div class='ctx'> </div><div class='hunk'>@@ -319,6 +327,8 @@ struct lan887x_regwr_map {</div><div class='ctx'> </div><div class='ctx'> struct lan887x_priv {</div><div class='ctx'> 	u64 stats[ARRAY_SIZE(lan887x_hw_stats)];</div><div class='add'>+	struct mchp_rds_ptp_clock *clock;</div><div class='add'>+	bool init_done;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int lan937x_dsp_workaround(struct phy_device *phydev, u16 ereg, u8 bank)</div><div class='hunk'>@@ -1269,8 +1279,28 @@ static int lan887x_get_features(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static int lan887x_phy_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='add'>+	struct lan887x_priv *priv = phydev-&gt;priv;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!priv-&gt;init_done &amp;&amp; phy_interrupt_is_valid(phydev)) {</div><div class='add'>+		priv-&gt;clock = mchp_rds_ptp_probe(phydev, MDIO_MMD_VEND1,</div><div class='add'>+						 MCHP_RDS_PTP_LTC_BASE_ADDR,</div><div class='add'>+						 MCHP_RDS_PTP_PORT_BASE_ADDR);</div><div class='add'>+		if (IS_ERR(priv-&gt;clock))</div><div class='add'>+			return PTR_ERR(priv-&gt;clock);</div><div class='add'>+</div><div class='add'>+		/* Enable pin mux for EVT */</div><div class='add'>+		phy_modify_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+			       LAN887X_MX_CHIP_TOP_REG_CONTROL1,</div><div class='add'>+			       LAN887X_MX_CHIP_TOP_REG_CONTROL1_EVT_EN,</div><div class='add'>+			       LAN887X_MX_CHIP_TOP_REG_CONTROL1_EVT_EN);</div><div class='add'>+</div><div class='add'>+		/* Initialize pin numbers specific to PEROUT */</div><div class='add'>+		priv-&gt;clock-&gt;event_pin = 3;</div><div class='add'>+</div><div class='add'>+		priv-&gt;init_done = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Clear loopback */</div><div class='ctx'> 	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,</div><div class='ctx'> 				 LAN887X_MIS_CFG_REG2,</div><div class='hunk'>@@ -1470,6 +1500,7 @@ static int lan887x_probe(struct phy_device *phydev)</div><div class='ctx'> 	if (!priv)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	priv-&gt;init_done = false;</div><div class='ctx'> 	phydev-&gt;priv = priv;</div><div class='ctx'> </div><div class='ctx'> 	return lan887x_phy_setup(phydev);</div><div class='hunk'>@@ -1518,6 +1549,7 @@ static void lan887x_get_strings(struct phy_device *phydev, u8 *data)</div><div class='ctx'> </div><div class='ctx'> static int lan887x_config_intr(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='add'>+	struct lan887x_priv *priv = phydev-&gt;priv;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;interrupts == PHY_INTERRUPT_ENABLED) {</div><div class='hunk'>@@ -1537,12 +1569,24 @@ static int lan887x_config_intr(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 		rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, LAN887X_INT_STS);</div><div class='ctx'> 	}</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='del'>-	return rc &lt; 0 ? rc : 0;</div><div class='add'>+	if (phy_is_default_hwtstamp(phydev)) {</div><div class='add'>+		return mchp_rds_ptp_top_config_intr(priv-&gt;clock,</div><div class='add'>+					LAN887X_INT_MSK,</div><div class='add'>+					LAN887X_INT_MSK_P1588_MOD_INT_MSK,</div><div class='add'>+					(phydev-&gt;interrupts ==</div><div class='add'>+					 PHY_INTERRUPT_ENABLED));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t lan887x_handle_interrupt(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='add'>+	struct lan887x_priv *priv = phydev-&gt;priv;</div><div class='add'>+	int rc = IRQ_NONE;</div><div class='ctx'> 	int irq_status;</div><div class='ctx'> </div><div class='ctx'> 	irq_status = phy_read_mmd(phydev, MDIO_MMD_VEND1, LAN887X_INT_STS);</div><div class='hunk'>@@ -1553,10 +1597,13 @@ static irqreturn_t lan887x_handle_interrupt(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	if (irq_status &amp; LAN887X_MX_CHIP_TOP_LINK_MSK) {</div><div class='ctx'> 		phy_trigger_machine(phydev);</div><div class='del'>-		return IRQ_HANDLED;</div><div class='add'>+		rc = IRQ_HANDLED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return IRQ_NONE;</div><div class='add'>+	if (irq_status &amp; LAN887X_INT_MSK_P1588_MOD_INT_MSK)</div><div class='add'>+		rc = mchp_rds_ptp_handle_interrupt(priv-&gt;clock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan887x_cd_reset(struct phy_device *phydev,</div><div class='hunk'>@@ -2113,6 +2160,7 @@ static struct phy_driver microchip_t1_phy_driver[] = {</div><div class='ctx'> 		.handle_interrupt = lan887x_handle_interrupt,</div><div class='ctx'> 		.get_sqi	= lan887x_get_sqi,</div><div class='ctx'> 		.get_sqi_max	= lan87xx_get_sqi_max,</div><div class='add'>+		.set_loopback	= genphy_c45_loopback,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/microchip_t1s.c b/drivers/net/phy/microchip_t1s.c<br/>index 75d291154b4c..e601d56b2507 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/microchip_t1s.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/microchip_t1s.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/microchip_t1s.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/microchip_t1s.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * Driver for Microchip 10BASE-T1S PHYs</div><div class='ctx'>  *</div><div class='ctx'>  * Support: Microchip Phys:</div><div class='del'>- *  lan8670/1/2 Rev.B1/C1/C2</div><div class='add'>+ *  lan8670/1/2 Rev.B1/C1/C2/D0</div><div class='ctx'>  *  lan8650/1 Rev.B0/B1 Internal PHYs</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -14,6 +14,7 @@</div><div class='ctx'> #define PHY_ID_LAN867X_REVB1 0x0007C162</div><div class='ctx'> #define PHY_ID_LAN867X_REVC1 0x0007C164</div><div class='ctx'> #define PHY_ID_LAN867X_REVC2 0x0007C165</div><div class='add'>+#define PHY_ID_LAN867X_REVD0 0x0007C166</div><div class='ctx'> /* Both Rev.B0 and B1 clause 22 PHYID's are same due to B1 chip limitation */</div><div class='ctx'> #define PHY_ID_LAN865X_REVB 0x0007C1B3</div><div class='ctx'> </div><div class='hunk'>@@ -32,6 +33,17 @@</div><div class='ctx'> #define COL_DET_ENABLE			BIT(15)</div><div class='ctx'> #define COL_DET_DISABLE			0x0000</div><div class='ctx'> </div><div class='add'>+/* LAN8670/1/2 Rev.D0 Link Status Selection Register */</div><div class='add'>+#define LAN867X_REG_LINK_STATUS_CTRL	0x0012</div><div class='add'>+#define LINK_STATUS_CONFIGURATION	GENMASK(12, 11)</div><div class='add'>+#define LINK_STATUS_SEMAPHORE		BIT(0)</div><div class='add'>+</div><div class='add'>+/* Link Status Configuration */</div><div class='add'>+#define LINK_STATUS_CONFIG_PLCA_STATUS	0x1</div><div class='add'>+#define LINK_STATUS_CONFIG_SEMAPHORE	0x2</div><div class='add'>+</div><div class='add'>+#define LINK_STATUS_SEMAPHORE_SET	0x1</div><div class='add'>+</div><div class='ctx'> #define LAN865X_CFGPARAM_READ_ENABLE BIT(1)</div><div class='ctx'> </div><div class='ctx'> /* The arrays below are pulled from the following table from AN1699</div><div class='hunk'>@@ -109,6 +121,21 @@ static const u16 lan865x_revb_sqi_fixup_cfg_regs[3] = {</div><div class='ctx'> 	0x00AD, 0x00AE, 0x00AF,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* LAN867x Rev.D0 configuration parameters from AN1699</div><div class='add'>+ * As per the Configuration Application Note AN1699 published in the below link,</div><div class='add'>+ * https://www.microchip.com/en-us/application-notes/an1699</div><div class='add'>+ * Revision G (DS60001699G - October 2025)</div><div class='add'>+ */</div><div class='add'>+static const u16 lan867x_revd0_fixup_regs[8] = {</div><div class='add'>+	0x0037, 0x008A, 0x0118, 0x00D6,</div><div class='add'>+	0x0082, 0x00FD, 0x00FD, 0x0091,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u16 lan867x_revd0_fixup_values[8] = {</div><div class='add'>+	0x0800, 0xBFC0, 0x029C, 0x1001,</div><div class='add'>+	0x001C, 0x0C0B, 0x8C07, 0x9660,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Pulled from AN1760 describing 'indirect read'</div><div class='ctx'>  *</div><div class='ctx'>  * write_register(0x4, 0x00D8, addr)</div><div class='hunk'>@@ -377,6 +404,32 @@ static int lan867x_revb1_config_init(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int lan867x_revd0_link_active_selection(struct phy_device *phydev,</div><div class='add'>+					       bool plca_enabled)</div><div class='add'>+{</div><div class='add'>+	u16 value;</div><div class='add'>+</div><div class='add'>+	if (plca_enabled) {</div><div class='add'>+		/* 0x1 - When PLCA is enabled: link status reflects plca_status.</div><div class='add'>+		 */</div><div class='add'>+		value = FIELD_PREP(LINK_STATUS_CONFIGURATION,</div><div class='add'>+				   LINK_STATUS_CONFIG_PLCA_STATUS);</div><div class='add'>+	} else {</div><div class='add'>+		/* 0x2 - Link status is controlled by the value written into the</div><div class='add'>+		 * LINK_STATUS_SEMAPHORE bit written. Here the link semaphore</div><div class='add'>+		 * bit is written with 0x1 to set the link always active in</div><div class='add'>+		 * CSMA/CD mode as it doesn't support autoneg.</div><div class='add'>+		 */</div><div class='add'>+		value = FIELD_PREP(LINK_STATUS_CONFIGURATION,</div><div class='add'>+				   LINK_STATUS_CONFIG_SEMAPHORE) |</div><div class='add'>+			FIELD_PREP(LINK_STATUS_SEMAPHORE,</div><div class='add'>+				   LINK_STATUS_SEMAPHORE_SET);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return phy_write_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+			     LAN867X_REG_LINK_STATUS_CTRL, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* As per LAN8650/1 Rev.B0/B1 AN1760 (Revision F (DS60001760G - June 2024)) and</div><div class='ctx'>  * LAN8670/1/2 Rev.C1/C2 AN1699 (Revision E (DS60001699F - June 2024)), under</div><div class='ctx'>  * normal operation, the device should be operated in PLCA mode. Disabling</div><div class='hunk'>@@ -393,6 +446,14 @@ static int lan86xx_plca_set_cfg(struct phy_device *phydev,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	/* Link status selection must be configured for LAN8670/1/2 Rev.D0 */</div><div class='add'>+	if (phydev-&gt;phy_id == PHY_ID_LAN867X_REVD0) {</div><div class='add'>+		ret = lan867x_revd0_link_active_selection(phydev,</div><div class='add'>+							  plca_cfg-&gt;enabled);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = genphy_c45_plca_set_cfg(phydev, plca_cfg);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -407,6 +468,29 @@ static int lan86xx_plca_set_cfg(struct phy_device *phydev,</div><div class='ctx'> 			      COL_DET_CTRL0_ENABLE_BIT_MASK, COL_DET_ENABLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int lan867x_revd0_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = lan867x_check_reset_complete(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i &lt; ARRAY_SIZE(lan867x_revd0_fixup_regs); i++) {</div><div class='add'>+		ret = phy_write_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+				    lan867x_revd0_fixup_regs[i],</div><div class='add'>+				    lan867x_revd0_fixup_values[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initially the PHY will be in CSMA/CD mode by default. So it is</div><div class='add'>+	 * required to set the link always active as it doesn't support</div><div class='add'>+	 * autoneg.</div><div class='add'>+	 */</div><div class='add'>+	return lan867x_revd0_link_active_selection(phydev, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int lan86xx_read_status(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	/* The phy has some limitations, namely:</div><div class='hunk'>@@ -482,6 +566,19 @@ static struct phy_driver microchip_t1s_driver[] = {</div><div class='ctx'> 		.get_plca_status    = genphy_c45_plca_get_status,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVD0),</div><div class='add'>+		.name               = "LAN867X Rev.D0",</div><div class='add'>+		.features           = PHY_BASIC_T1S_P2MP_FEATURES,</div><div class='add'>+		.config_init        = lan867x_revd0_config_init,</div><div class='add'>+		.get_plca_cfg	    = genphy_c45_plca_get_cfg,</div><div class='add'>+		.set_plca_cfg	    = lan86xx_plca_set_cfg,</div><div class='add'>+		.get_plca_status    = genphy_c45_plca_get_status,</div><div class='add'>+		.cable_test_start   = genphy_c45_oatc14_cable_test_start,</div><div class='add'>+		.cable_test_get_status = genphy_c45_oatc14_cable_test_get_status,</div><div class='add'>+		.get_sqi            = genphy_c45_oatc14_get_sqi,</div><div class='add'>+		.get_sqi_max        = genphy_c45_oatc14_get_sqi_max,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(PHY_ID_LAN865X_REVB),</div><div class='ctx'> 		.name               = "LAN865X Rev.B0/B1 Internal Phy",</div><div class='ctx'> 		.features           = PHY_BASIC_T1S_P2MP_FEATURES,</div><div class='hunk'>@@ -497,10 +594,11 @@ static struct phy_driver microchip_t1s_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(microchip_t1s_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVB1) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVC1) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVC2) },</div><div class='add'>+	{ PHY_ID_MATCH_EXACT(PHY_ID_LAN867X_REVD0) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(PHY_ID_LAN865X_REVB) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c<br/>index 0e91f5d1a4fd..89b5b19a9bd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/motorcomm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/motorcomm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/motorcomm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/motorcomm.c</a></div><div class='hunk'>@@ -213,6 +213,20 @@</div><div class='ctx'> #define YT8521_RC1R_RGMII_2_100_NS		14</div><div class='ctx'> #define YT8521_RC1R_RGMII_2_250_NS		15</div><div class='ctx'> </div><div class='add'>+/* LED CONFIG */</div><div class='add'>+#define YT8521_MAX_LEDS				3</div><div class='add'>+#define YT8521_LED0_CFG_REG			0xA00C</div><div class='add'>+#define YT8521_LED1_CFG_REG			0xA00D</div><div class='add'>+#define YT8521_LED2_CFG_REG			0xA00E</div><div class='add'>+#define YT8521_LED_ACT_BLK_IND			BIT(13)</div><div class='add'>+#define YT8521_LED_FDX_ON_EN			BIT(12)</div><div class='add'>+#define YT8521_LED_HDX_ON_EN			BIT(11)</div><div class='add'>+#define YT8521_LED_TXACT_BLK_EN			BIT(10)</div><div class='add'>+#define YT8521_LED_RXACT_BLK_EN			BIT(9)</div><div class='add'>+#define YT8521_LED_1000_ON_EN			BIT(6)</div><div class='add'>+#define YT8521_LED_100_ON_EN			BIT(5)</div><div class='add'>+#define YT8521_LED_10_ON_EN			BIT(4)</div><div class='add'>+</div><div class='ctx'> #define YTPHY_MISC_CONFIG_REG			0xA006</div><div class='ctx'> #define YTPHY_MCR_FIBER_SPEED_MASK		BIT(0)</div><div class='ctx'> #define YTPHY_MCR_FIBER_1000BX			(0x1 &lt;&lt; 0)</div><div class='hunk'>@@ -1681,6 +1695,106 @@ err_restore_page:</div><div class='ctx'> 	return phy_restore_page(phydev, old_page, ret);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const unsigned long supported_trgs = (BIT(TRIGGER_NETDEV_FULL_DUPLEX) |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_HALF_DUPLEX) |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_LINK)        |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_LINK_10)     |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_LINK_100)    |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_LINK_1000)   |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_RX)          |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_TX));</div><div class='add'>+</div><div class='add'>+static int yt8521_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='add'>+				      unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	if (index &gt;= YT8521_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* All combinations of the supported triggers are allowed */</div><div class='add'>+	if (rules &amp; ~supported_trgs)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt8521_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='add'>+				     unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= YT8521_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK, &amp;rules)) {</div><div class='add'>+		val |= YT8521_LED_10_ON_EN;</div><div class='add'>+		val |= YT8521_LED_100_ON_EN;</div><div class='add'>+		val |= YT8521_LED_1000_ON_EN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK_10, &amp;rules))</div><div class='add'>+		val |= YT8521_LED_10_ON_EN;</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK_100, &amp;rules))</div><div class='add'>+		val |= YT8521_LED_100_ON_EN;</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK_1000, &amp;rules))</div><div class='add'>+		val |= YT8521_LED_1000_ON_EN;</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_FULL_DUPLEX, &amp;rules))</div><div class='add'>+		val |= YT8521_LED_HDX_ON_EN;</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_HALF_DUPLEX, &amp;rules))</div><div class='add'>+		val |= YT8521_LED_FDX_ON_EN;</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_TX, &amp;rules) ||</div><div class='add'>+	    test_bit(TRIGGER_NETDEV_RX, &amp;rules))</div><div class='add'>+		val |= YT8521_LED_ACT_BLK_IND;</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_TX, &amp;rules))</div><div class='add'>+		val |= YT8521_LED_TXACT_BLK_EN;</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_RX, &amp;rules))</div><div class='add'>+		val |= YT8521_LED_RXACT_BLK_EN;</div><div class='add'>+</div><div class='add'>+	return ytphy_write_ext(phydev, YT8521_LED0_CFG_REG + index, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt8521_led_hw_control_get(struct phy_device *phydev, u8 index,</div><div class='add'>+				     unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= YT8521_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = ytphy_read_ext(phydev, YT8521_LED0_CFG_REG + index);</div><div class='add'>+	if (val &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+</div><div class='add'>+	if (val &amp; YT8521_LED_TXACT_BLK_EN || val &amp; YT8521_LED_ACT_BLK_IND)</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_TX, rules);</div><div class='add'>+</div><div class='add'>+	if (val &amp; YT8521_LED_RXACT_BLK_EN || val &amp; YT8521_LED_ACT_BLK_IND)</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_RX, rules);</div><div class='add'>+</div><div class='add'>+	if (val &amp; YT8521_LED_FDX_ON_EN)</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_FULL_DUPLEX, rules);</div><div class='add'>+</div><div class='add'>+	if (val &amp; YT8521_LED_HDX_ON_EN)</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_HALF_DUPLEX, rules);</div><div class='add'>+</div><div class='add'>+	if (val &amp; YT8521_LED_1000_ON_EN)</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK_1000, rules);</div><div class='add'>+</div><div class='add'>+	if (val &amp; YT8521_LED_100_ON_EN)</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK_100, rules);</div><div class='add'>+</div><div class='add'>+	if (val &amp; YT8521_LED_10_ON_EN)</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK_10, rules);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int yt8531_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *node = phydev-&gt;mdio.dev.of_node;</div><div class='hunk'>@@ -2920,6 +3034,9 @@ static struct phy_driver motorcomm_phy_drvs[] = {</div><div class='ctx'> 		.soft_reset	= yt8521_soft_reset,</div><div class='ctx'> 		.suspend	= yt8521_suspend,</div><div class='ctx'> 		.resume		= yt8521_resume,</div><div class='add'>+		.led_hw_is_supported = yt8521_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = yt8521_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = yt8521_led_hw_control_get,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(PHY_ID_YT8531),</div><div class='hunk'>@@ -2931,6 +3048,9 @@ static struct phy_driver motorcomm_phy_drvs[] = {</div><div class='ctx'> 		.get_wol	= ytphy_get_wol,</div><div class='ctx'> 		.set_wol	= yt8531_set_wol,</div><div class='ctx'> 		.link_change_notify = yt8531_link_change_notify,</div><div class='add'>+		.led_hw_is_supported = yt8521_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_set = yt8521_led_hw_control_set,</div><div class='add'>+		.led_hw_control_get = yt8521_led_hw_control_get,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(PHY_ID_YT8531S),</div><div class='head'>diff --git a/drivers/net/phy/mscc/mscc.h b/drivers/net/phy/mscc/mscc.h<br/>index 6a3d8a754eb8..65c9d7bd9315 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mscc/mscc.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mscc/mscc.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mscc/mscc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mscc/mscc.h</a></div><div class='hunk'>@@ -85,6 +85,10 @@ enum rgmii_clock_delay {</div><div class='ctx'> #define LED_MODE_SEL_MASK(x)		  (GENMASK(3, 0) &lt;&lt; LED_MODE_SEL_POS(x))</div><div class='ctx'> #define LED_MODE_SEL(x, mode)		  (((mode) &lt;&lt; LED_MODE_SEL_POS(x)) &amp; LED_MODE_SEL_MASK(x))</div><div class='ctx'> </div><div class='add'>+#define MSCC_PHY_LED_BEHAVIOR		  30</div><div class='add'>+#define LED_COMBINE_DIS_MASK(x)		  BIT(x)</div><div class='add'>+#define LED_COMBINE_DIS(x, dis)		  (((dis) ? 1 : 0) &lt;&lt; (x))</div><div class='add'>+</div><div class='ctx'> #define MSCC_EXT_PAGE_CSR_CNTL_17	  17</div><div class='ctx'> #define MSCC_EXT_PAGE_CSR_CNTL_18	  18</div><div class='ctx'> </div><div class='hunk'>@@ -196,6 +200,9 @@ enum rgmii_clock_delay {</div><div class='ctx'> #define MSCC_PHY_EXTENDED_INT_MS_EGR	  BIT(9)</div><div class='ctx'> </div><div class='ctx'> /* Extended Page 3 Registers */</div><div class='add'>+#define MSCC_PHY_SERDES_PCS_CTRL	  16</div><div class='add'>+#define MSCC_PHY_SERDES_ANEG		  BIT(7)</div><div class='add'>+</div><div class='ctx'> #define MSCC_PHY_SERDES_TX_VALID_CNT	  21</div><div class='ctx'> #define MSCC_PHY_SERDES_TX_CRC_ERR_CNT	  22</div><div class='ctx'> #define MSCC_PHY_SERDES_RX_VALID_CNT	  28</div><div class='hunk'>@@ -286,12 +293,12 @@ enum rgmii_clock_delay {</div><div class='ctx'> #define PHY_ID_VSC8540			  0x00070760</div><div class='ctx'> #define PHY_ID_VSC8541			  0x00070770</div><div class='ctx'> #define PHY_ID_VSC8552			  0x000704e0</div><div class='del'>-#define PHY_ID_VSC856X			  0x000707e0</div><div class='add'>+#define PHY_ID_VSC856X			  0x000707e1</div><div class='ctx'> #define PHY_ID_VSC8572			  0x000704d0</div><div class='ctx'> #define PHY_ID_VSC8574			  0x000704a0</div><div class='del'>-#define PHY_ID_VSC8575			  0x000707d0</div><div class='del'>-#define PHY_ID_VSC8582			  0x000707b0</div><div class='del'>-#define PHY_ID_VSC8584			  0x000707c0</div><div class='add'>+#define PHY_ID_VSC8575			  0x000707d1</div><div class='add'>+#define PHY_ID_VSC8582			  0x000707b1</div><div class='add'>+#define PHY_ID_VSC8584			  0x000707c1</div><div class='ctx'> #define PHY_VENDOR_MSCC			0x00070400</div><div class='ctx'> </div><div class='ctx'> #define MSCC_VDDMAC_1500		  1500</div><div class='hunk'>@@ -362,6 +369,13 @@ struct vsc85xx_hw_stat {</div><div class='ctx'> 	u16 mask;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct vsc8531_skb_cb {</div><div class='add'>+	u32 ns;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define VSC8531_SKB_CB(skb) \</div><div class='add'>+	((struct vsc8531_skb_cb *)((skb)-&gt;cb))</div><div class='add'>+</div><div class='ctx'> struct vsc8531_private {</div><div class='ctx'> 	int rate_magic;</div><div class='ctx'> 	u16 supp_led_modes;</div><div class='hunk'>@@ -410,6 +424,11 @@ struct vsc8531_private {</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct mutex ts_lock;</div><div class='ctx'> 	struct mutex phc_lock;</div><div class='add'>+</div><div class='add'>+	/* list of skbs that were received and need timestamp information but it</div><div class='add'>+	 * didn't received it yet</div><div class='add'>+	 */</div><div class='add'>+	struct sk_buff_head rx_skbs_list;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Shared structure between the PHYs of the same package.</div><div class='hunk'>@@ -469,6 +488,7 @@ static inline void vsc8584_config_macsec_intr(struct phy_device *phydev)</div><div class='ctx'> void vsc85xx_link_change_notify(struct phy_device *phydev);</div><div class='ctx'> void vsc8584_config_ts_intr(struct phy_device *phydev);</div><div class='ctx'> int vsc8584_ptp_init(struct phy_device *phydev);</div><div class='add'>+void vsc8584_ptp_deinit(struct phy_device *phydev);</div><div class='ctx'> int vsc8584_ptp_probe_once(struct phy_device *phydev);</div><div class='ctx'> int vsc8584_ptp_probe(struct phy_device *phydev);</div><div class='ctx'> irqreturn_t vsc8584_handle_ts_interrupt(struct phy_device *phydev);</div><div class='hunk'>@@ -483,6 +503,9 @@ static inline int vsc8584_ptp_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+static inline void vsc8584_ptp_deinit(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> static inline int vsc8584_ptp_probe_once(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c<br/>index bee381200ab8..2b9fb8a675a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mscc/mscc_main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mscc/mscc_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mscc/mscc_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mscc/mscc_main.c</a></div><div class='hunk'>@@ -17,9 +17,29 @@</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/net/mscc-phy-vsc8531.h&gt;</div><div class='add'>+</div><div class='add'>+#include "../phylib.h"</div><div class='ctx'> #include "mscc_serdes.h"</div><div class='ctx'> #include "mscc.h"</div><div class='ctx'> </div><div class='add'>+struct vsc85xx_probe_config {</div><div class='add'>+	const struct vsc85xx_hw_stat *hw_stats;</div><div class='add'>+	size_t shared_size;</div><div class='add'>+	size_t nstats;</div><div class='add'>+	u16 supp_led_modes;</div><div class='add'>+	u8 nleds;</div><div class='add'>+	bool check_rate_magic;</div><div class='add'>+	bool use_package;</div><div class='add'>+	bool has_ptp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc85xx_default_led_modes_4[] = {</div><div class='add'>+	VSC8531_LINK_1000_ACTIVITY,</div><div class='add'>+	VSC8531_LINK_100_ACTIVITY,</div><div class='add'>+	VSC8531_LINK_ACTIVITY,</div><div class='add'>+	VSC8531_DUPLEX_COLLISION</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct vsc85xx_hw_stat vsc85xx_hw_stats[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.string	= "phy_receive_errors",</div><div class='hunk'>@@ -175,17 +195,19 @@ static int vsc85xx_led_cntl_set(struct phy_device *phydev,</div><div class='ctx'> 				u8 led_num,</div><div class='ctx'> 				u8 mode)</div><div class='ctx'> {</div><div class='del'>-	int rc;</div><div class='del'>-	u16 reg_val;</div><div class='add'>+	u16 mask = LED_MODE_SEL_MASK(led_num);</div><div class='add'>+	u16 val = LED_MODE_SEL(led_num, mode);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;phydev-&gt;lock);</div><div class='del'>-	reg_val = phy_read(phydev, MSCC_PHY_LED_MODE_SEL);</div><div class='del'>-	reg_val &amp;= ~LED_MODE_SEL_MASK(led_num);</div><div class='del'>-	reg_val |= LED_MODE_SEL(led_num, (u16)mode);</div><div class='del'>-	rc = phy_write(phydev, MSCC_PHY_LED_MODE_SEL, reg_val);</div><div class='del'>-	mutex_unlock(&amp;phydev-&gt;lock);</div><div class='add'>+	return phy_modify(phydev, MSCC_PHY_LED_MODE_SEL, mask, val);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return rc;</div><div class='add'>+static int vsc85xx_led_combine_disable_set(struct phy_device *phydev,</div><div class='add'>+					   u8 led_num, bool combine_disable)</div><div class='add'>+{</div><div class='add'>+	u16 val = LED_COMBINE_DIS(led_num, combine_disable);</div><div class='add'>+	u16 mask = LED_COMBINE_DIS_MASK(led_num);</div><div class='add'>+</div><div class='add'>+	return phy_modify(phydev, MSCC_PHY_LED_BEHAVIOR, mask, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vsc85xx_mdix_get(struct phy_device *phydev, u8 *mdix)</div><div class='hunk'>@@ -441,7 +463,7 @@ static int vsc85xx_dt_led_mode_get(struct phy_device *phydev,</div><div class='ctx'> #endif /* CONFIG_OF_MDIO */</div><div class='ctx'> </div><div class='ctx'> static int vsc85xx_dt_led_modes_get(struct phy_device *phydev,</div><div class='del'>-				    u32 *default_mode)</div><div class='add'>+				    const u32 *default_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct vsc8531_private *priv = phydev-&gt;priv;</div><div class='ctx'> 	char led_dt_prop[28];</div><div class='hunk'>@@ -528,7 +550,6 @@ static int vsc85xx_update_rgmii_cntl(struct phy_device *phydev, u32 rgmii_cntl,</div><div class='ctx'> 	u16 rgmii_rx_delay_pos = ffs(rgmii_rx_delay_mask) - 1;</div><div class='ctx'> 	u16 rgmii_tx_delay_pos = ffs(rgmii_tx_delay_mask) - 1;</div><div class='ctx'> 	int delay_size = ARRAY_SIZE(vsc85xx_internal_delay);</div><div class='del'>-	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='ctx'> 	u16 reg_val = 0;</div><div class='ctx'> 	u16 mask = 0;</div><div class='ctx'> 	s32 rx_delay;</div><div class='hunk'>@@ -547,7 +568,7 @@ static int vsc85xx_update_rgmii_cntl(struct phy_device *phydev, u32 rgmii_cntl,</div><div class='ctx'> 	if (phy_interface_is_rgmii(phydev))</div><div class='ctx'> 		mask |= rgmii_rx_delay_mask | rgmii_tx_delay_mask;</div><div class='ctx'> </div><div class='del'>-	rx_delay = phy_get_internal_delay(phydev, dev, vsc85xx_internal_delay,</div><div class='add'>+	rx_delay = phy_get_internal_delay(phydev, vsc85xx_internal_delay,</div><div class='ctx'> 					  delay_size, true);</div><div class='ctx'> 	if (rx_delay &lt; 0) {</div><div class='ctx'> 		if (phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_RXID ||</div><div class='hunk'>@@ -557,7 +578,7 @@ static int vsc85xx_update_rgmii_cntl(struct phy_device *phydev, u32 rgmii_cntl,</div><div class='ctx'> 			rx_delay = RGMII_CLK_DELAY_0_2_NS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tx_delay = phy_get_internal_delay(phydev, dev, vsc85xx_internal_delay,</div><div class='add'>+	tx_delay = phy_get_internal_delay(phydev, vsc85xx_internal_delay,</div><div class='ctx'> 					  delay_size, false);</div><div class='ctx'> 	if (tx_delay &lt; 0) {</div><div class='ctx'> 		if (phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_TXID ||</div><div class='hunk'>@@ -1723,12 +1744,6 @@ static int vsc8584_config_init(struct phy_device *phydev)</div><div class='ctx'> 	 * in this pre-init function.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (phy_package_init_once(phydev)) {</div><div class='del'>-		/* The following switch statement assumes that the lowest</div><div class='del'>-		 * nibble of the phy_id_mask is always 0. This works because</div><div class='del'>-		 * the lowest nibble of the PHY_ID's below are also 0.</div><div class='del'>-		 */</div><div class='del'>-		WARN_ON(phydev-&gt;drv-&gt;phy_id_mask &amp; 0xf);</div><div class='del'>-</div><div class='ctx'> 		switch (phydev-&gt;phy_id &amp; phydev-&gt;drv-&gt;phy_id_mask) {</div><div class='ctx'> 		case PHY_ID_VSC8504:</div><div class='ctx'> 		case PHY_ID_VSC8552:</div><div class='hunk'>@@ -2201,12 +2216,35 @@ static int vsc85xx_read_status(struct phy_device *phydev)</div><div class='ctx'> 	return genphy_read_status(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vsc8514_probe(struct phy_device *phydev)</div><div class='add'>+static unsigned int vsc85xx_inband_caps(struct phy_device *phydev,</div><div class='add'>+					phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	if (interface != PHY_INTERFACE_MODE_SGMII &amp;&amp;</div><div class='add'>+	    interface != PHY_INTERFACE_MODE_QSGMII)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc85xx_config_inband(struct phy_device *phydev, unsigned int modes)</div><div class='add'>+{</div><div class='add'>+	u16 reg_val = 0;</div><div class='add'>+</div><div class='add'>+	if (modes == LINK_INBAND_ENABLE)</div><div class='add'>+		reg_val = MSCC_PHY_SERDES_ANEG;</div><div class='add'>+</div><div class='add'>+	return phy_modify_paged(phydev, MSCC_PHY_PAGE_EXTENDED_3,</div><div class='add'>+				MSCC_PHY_SERDES_PCS_CTRL, MSCC_PHY_SERDES_ANEG,</div><div class='add'>+				reg_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc85xx_probe_common(struct phy_device *phydev,</div><div class='add'>+				const struct vsc85xx_probe_config *cfg,</div><div class='add'>+				const u32 *default_led_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct vsc8531_private *vsc8531;</div><div class='del'>-	u32 default_mode[4] = {VSC8531_LINK_1000_ACTIVITY,</div><div class='del'>-	   VSC8531_LINK_100_ACTIVITY, VSC8531_LINK_ACTIVITY,</div><div class='del'>-	   VSC8531_DUPLEX_COLLISION};</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	vsc8531 = devm_kzalloc(&amp;phydev-&gt;mdio.dev, sizeof(*vsc8531), GFP_KERNEL);</div><div class='ctx'> 	if (!vsc8531)</div><div class='hunk'>@@ -2214,124 +2252,296 @@ static int vsc8514_probe(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	phydev-&gt;priv = vsc8531;</div><div class='ctx'> </div><div class='del'>-	vsc8584_get_base_addr(phydev);</div><div class='del'>-	devm_phy_package_join(&amp;phydev-&gt;mdio.dev, phydev,</div><div class='del'>-			      vsc8531-&gt;base_addr, 0);</div><div class='add'>+	/* Check rate magic if needed (only for non-package PHYs) */</div><div class='add'>+	if (cfg-&gt;check_rate_magic) {</div><div class='add'>+		ret = vsc85xx_edge_rate_magic_get(phydev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		vsc8531-&gt;rate_magic = ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set up package if needed */</div><div class='add'>+	if (cfg-&gt;use_package) {</div><div class='add'>+		vsc8584_get_base_addr(phydev);</div><div class='add'>+		ret = devm_phy_package_join(&amp;phydev-&gt;mdio.dev, phydev,</div><div class='add'>+					    vsc8531-&gt;base_addr,</div><div class='add'>+					    cfg-&gt;shared_size);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure LED settings */</div><div class='add'>+	vsc8531-&gt;nleds = cfg-&gt;nleds;</div><div class='add'>+	vsc8531-&gt;supp_led_modes = cfg-&gt;supp_led_modes;</div><div class='ctx'> </div><div class='del'>-	vsc8531-&gt;nleds = 4;</div><div class='del'>-	vsc8531-&gt;supp_led_modes = VSC85XX_SUPP_LED_MODES;</div><div class='del'>-	vsc8531-&gt;hw_stats = vsc85xx_hw_stats;</div><div class='del'>-	vsc8531-&gt;nstats = ARRAY_SIZE(vsc85xx_hw_stats);</div><div class='add'>+	/* Configure hardware stats */</div><div class='add'>+	vsc8531-&gt;hw_stats = cfg-&gt;hw_stats;</div><div class='add'>+	vsc8531-&gt;nstats = cfg-&gt;nstats;</div><div class='ctx'> 	vsc8531-&gt;stats = devm_kcalloc(&amp;phydev-&gt;mdio.dev, vsc8531-&gt;nstats,</div><div class='ctx'> 				      sizeof(u64), GFP_KERNEL);</div><div class='ctx'> 	if (!vsc8531-&gt;stats)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	return vsc85xx_dt_led_modes_get(phydev, default_mode);</div><div class='add'>+	/* PTP setup for VSC8584 */</div><div class='add'>+	if (cfg-&gt;has_ptp) {</div><div class='add'>+		if (phy_package_probe_once(phydev)) {</div><div class='add'>+			ret = vsc8584_ptp_probe_once(phydev);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = vsc8584_ptp_probe(phydev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Check for LED configuration in device tree if available</div><div class='add'>+	 * or fall back to default `vsc8531,led-x-mode` DT properties.</div><div class='add'>+	 */</div><div class='add'>+	np = of_get_child_by_name(phydev-&gt;mdio.dev.of_node, "leds");</div><div class='add'>+	if (np) {</div><div class='add'>+		of_node_put(np);</div><div class='add'>+</div><div class='add'>+		/* Force to defaults */</div><div class='add'>+		for (unsigned int i = 0; i &lt; vsc8531-&gt;nleds; i++)</div><div class='add'>+			vsc8531-&gt;leds_mode[i] = default_led_mode[i];</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Parse LED modes from device tree */</div><div class='add'>+	return vsc85xx_dt_led_modes_get(phydev, default_led_mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vsc8574_probe(struct phy_device *phydev)</div><div class='add'>+static int vsc85xx_led_brightness_set(struct phy_device *phydev,</div><div class='add'>+				      u8 index, enum led_brightness value)</div><div class='ctx'> {</div><div class='del'>-	struct vsc8531_private *vsc8531;</div><div class='del'>-	u32 default_mode[4] = {VSC8531_LINK_1000_ACTIVITY,</div><div class='del'>-	   VSC8531_LINK_100_ACTIVITY, VSC8531_LINK_ACTIVITY,</div><div class='del'>-	   VSC8531_DUPLEX_COLLISION};</div><div class='add'>+	struct vsc8531_private *vsc8531 = phydev-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	vsc8531 = devm_kzalloc(&amp;phydev-&gt;mdio.dev, sizeof(*vsc8531), GFP_KERNEL);</div><div class='del'>-	if (!vsc8531)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (index &gt;= vsc8531-&gt;nleds)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	phydev-&gt;priv = vsc8531;</div><div class='add'>+	return vsc85xx_led_cntl_set(phydev, index, value == LED_OFF ?</div><div class='add'>+				    VSC8531_FORCE_LED_OFF : VSC8531_FORCE_LED_ON);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	vsc8584_get_base_addr(phydev);</div><div class='del'>-	devm_phy_package_join(&amp;phydev-&gt;mdio.dev, phydev,</div><div class='del'>-			      vsc8531-&gt;base_addr, 0);</div><div class='add'>+static int vsc85xx_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='add'>+				       unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	static const unsigned long supported = BIT(TRIGGER_NETDEV_LINK_1000) |</div><div class='add'>+					       BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='add'>+					       BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+					       BIT(TRIGGER_NETDEV_LINK) |</div><div class='add'>+					       BIT(TRIGGER_NETDEV_RX) |</div><div class='add'>+					       BIT(TRIGGER_NETDEV_TX);</div><div class='add'>+	struct vsc8531_private *vsc8531 = phydev-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	vsc8531-&gt;nleds = 4;</div><div class='del'>-	vsc8531-&gt;supp_led_modes = VSC8584_SUPP_LED_MODES;</div><div class='del'>-	vsc8531-&gt;hw_stats = vsc8584_hw_stats;</div><div class='del'>-	vsc8531-&gt;nstats = ARRAY_SIZE(vsc8584_hw_stats);</div><div class='del'>-	vsc8531-&gt;stats = devm_kcalloc(&amp;phydev-&gt;mdio.dev, vsc8531-&gt;nstats,</div><div class='del'>-				      sizeof(u64), GFP_KERNEL);</div><div class='del'>-	if (!vsc8531-&gt;stats)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	if (index &gt;= vsc8531-&gt;nleds)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return vsc85xx_dt_led_modes_get(phydev, default_mode);</div><div class='add'>+	if (rules &amp; ~supported)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vsc8584_probe(struct phy_device *phydev)</div><div class='add'>+static int vsc85xx_led_hw_control_get(struct phy_device *phydev, u8 index,</div><div class='add'>+				      unsigned long *rules)</div><div class='ctx'> {</div><div class='del'>-	struct vsc8531_private *vsc8531;</div><div class='del'>-	u32 default_mode[4] = {VSC8531_LINK_1000_ACTIVITY,</div><div class='del'>-	   VSC8531_LINK_100_ACTIVITY, VSC8531_LINK_ACTIVITY,</div><div class='del'>-	   VSC8531_DUPLEX_COLLISION};</div><div class='del'>-	int ret;</div><div class='add'>+	struct vsc8531_private *vsc8531 = phydev-&gt;priv;</div><div class='add'>+	u8 mode, behavior;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='del'>-	if ((phydev-&gt;phy_id &amp; MSCC_DEV_REV_MASK) != VSC8584_REVB) {</div><div class='del'>-		dev_err(&amp;phydev-&gt;mdio.dev, "Only VSC8584 revB is supported.\n");</div><div class='del'>-		return -ENOTSUPP;</div><div class='del'>-	}</div><div class='add'>+	if (index &gt;= vsc8531-&gt;nleds)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	vsc8531 = devm_kzalloc(&amp;phydev-&gt;mdio.dev, sizeof(*vsc8531), GFP_KERNEL);</div><div class='del'>-	if (!vsc8531)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	rc = phy_read(phydev, MSCC_PHY_LED_MODE_SEL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	mode = (rc &amp; LED_MODE_SEL_MASK(index)) &gt;&gt; LED_MODE_SEL_POS(index);</div><div class='ctx'> </div><div class='del'>-	phydev-&gt;priv = vsc8531;</div><div class='add'>+	rc = phy_read(phydev, MSCC_PHY_LED_BEHAVIOR);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	behavior = (rc &amp; LED_COMBINE_DIS_MASK(index)) &gt;&gt; index;</div><div class='ctx'> </div><div class='del'>-	vsc8584_get_base_addr(phydev);</div><div class='del'>-	devm_phy_package_join(&amp;phydev-&gt;mdio.dev, phydev, vsc8531-&gt;base_addr,</div><div class='del'>-			      sizeof(struct vsc85xx_shared_private));</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case VSC8531_LINK_ACTIVITY:</div><div class='add'>+	case VSC8531_ACTIVITY:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-	vsc8531-&gt;nleds = 4;</div><div class='del'>-	vsc8531-&gt;supp_led_modes = VSC8584_SUPP_LED_MODES;</div><div class='del'>-	vsc8531-&gt;hw_stats = vsc8584_hw_stats;</div><div class='del'>-	vsc8531-&gt;nstats = ARRAY_SIZE(vsc8584_hw_stats);</div><div class='del'>-	vsc8531-&gt;stats = devm_kcalloc(&amp;phydev-&gt;mdio.dev, vsc8531-&gt;nstats,</div><div class='del'>-				      sizeof(u64), GFP_KERNEL);</div><div class='del'>-	if (!vsc8531-&gt;stats)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	case VSC8531_LINK_1000_ACTIVITY:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK_1000) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-	if (phy_package_probe_once(phydev)) {</div><div class='del'>-		ret = vsc8584_ptp_probe_once(phydev);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='add'>+	case VSC8531_LINK_100_ACTIVITY:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case VSC8531_LINK_10_ACTIVITY:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case VSC8531_LINK_100_1000_ACTIVITY:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK_1000) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case VSC8531_LINK_10_1000_ACTIVITY:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK_1000) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case VSC8531_LINK_10_100_ACTIVITY:</div><div class='add'>+		*rules = BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+			 BIT(TRIGGER_NETDEV_LINK);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		*rules = 0;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = vsc8584_ptp_probe(phydev);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (!behavior &amp;&amp; *rules)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_RX) | BIT(TRIGGER_NETDEV_TX);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc85xx_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='add'>+				      unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	struct vsc8531_private *vsc8531 = phydev-&gt;priv;</div><div class='add'>+	u8 mode = VSC8531_FORCE_LED_ON;</div><div class='add'>+	bool combine_disable = false;</div><div class='add'>+	bool has_rx, has_tx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= vsc8531-&gt;nleds)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_LINK))</div><div class='add'>+		mode = VSC8531_LINK_ACTIVITY;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_LINK_10))</div><div class='add'>+		mode = VSC8531_LINK_10_ACTIVITY;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_LINK_100))</div><div class='add'>+		mode = VSC8531_LINK_100_ACTIVITY;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_LINK_1000))</div><div class='add'>+		mode = VSC8531_LINK_1000_ACTIVITY;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_LINK_100) &amp;&amp;</div><div class='add'>+	    rules &amp; BIT(TRIGGER_NETDEV_LINK_1000))</div><div class='add'>+		mode = VSC8531_LINK_100_1000_ACTIVITY;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_LINK_10) &amp;&amp;</div><div class='add'>+	    rules &amp; BIT(TRIGGER_NETDEV_LINK_1000))</div><div class='add'>+		mode = VSC8531_LINK_10_1000_ACTIVITY;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_LINK_10) &amp;&amp;</div><div class='add'>+	    rules &amp; BIT(TRIGGER_NETDEV_LINK_100))</div><div class='add'>+		mode = VSC8531_LINK_10_100_ACTIVITY;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The VSC85xx PHYs provides an option to control LED behavior. By</div><div class='add'>+	 * default, the LEDx combine function is enabled, meaning the LED</div><div class='add'>+	 * will be on when there is link/activity or duplex/collision. If</div><div class='add'>+	 * the combine function is disabled, the LED will be on only for</div><div class='add'>+	 * link or duplex.</div><div class='add'>+	 *</div><div class='add'>+	 * To control this behavior, we check the selected rules. If both</div><div class='add'>+	 * RX and TX activity are not selected, the LED combine function</div><div class='add'>+	 * is disabled; otherwise, it remains enabled.</div><div class='add'>+	 */</div><div class='add'>+	has_rx = !!(rules &amp; BIT(TRIGGER_NETDEV_RX));</div><div class='add'>+	has_tx = !!(rules &amp; BIT(TRIGGER_NETDEV_TX));</div><div class='add'>+	if (!has_rx &amp;&amp; !has_tx)</div><div class='add'>+		combine_disable = true;</div><div class='add'>+</div><div class='add'>+	ret = vsc85xx_led_combine_disable_set(phydev, index, combine_disable);</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return vsc85xx_dt_led_modes_get(phydev, default_mode);</div><div class='add'>+	return vsc85xx_led_cntl_set(phydev, index, mode);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vsc85xx_probe(struct phy_device *phydev)</div><div class='add'>+static int vsc8514_probe(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	struct vsc8531_private *vsc8531;</div><div class='del'>-	int rate_magic;</div><div class='del'>-	u32 default_mode[2] = {VSC8531_LINK_1000_ACTIVITY,</div><div class='del'>-	   VSC8531_LINK_100_ACTIVITY};</div><div class='add'>+	static const struct vsc85xx_probe_config vsc8514_cfg = {</div><div class='add'>+		.nleds = 4,</div><div class='add'>+		.supp_led_modes = VSC85XX_SUPP_LED_MODES,</div><div class='add'>+		.hw_stats = vsc85xx_hw_stats,</div><div class='add'>+		.nstats = ARRAY_SIZE(vsc85xx_hw_stats),</div><div class='add'>+		.use_package = true,</div><div class='add'>+		.shared_size = 0,</div><div class='add'>+		.has_ptp = false,</div><div class='add'>+		.check_rate_magic = false,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	rate_magic = vsc85xx_edge_rate_magic_get(phydev);</div><div class='del'>-	if (rate_magic &lt; 0)</div><div class='del'>-		return rate_magic;</div><div class='add'>+	return vsc85xx_probe_common(phydev, &amp;vsc8514_cfg, vsc85xx_default_led_modes_4);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	vsc8531 = devm_kzalloc(&amp;phydev-&gt;mdio.dev, sizeof(*vsc8531), GFP_KERNEL);</div><div class='del'>-	if (!vsc8531)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+static int vsc8574_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	static const struct vsc85xx_probe_config vsc8574_cfg = {</div><div class='add'>+		.nleds = 4,</div><div class='add'>+		.supp_led_modes = VSC8584_SUPP_LED_MODES,</div><div class='add'>+		.hw_stats = vsc8584_hw_stats,</div><div class='add'>+		.nstats = ARRAY_SIZE(vsc8584_hw_stats),</div><div class='add'>+		.use_package = true,</div><div class='add'>+		.shared_size = 0,</div><div class='add'>+		.has_ptp = false,</div><div class='add'>+		.check_rate_magic = false,</div><div class='add'>+	};</div><div class='ctx'> </div><div class='del'>-	phydev-&gt;priv = vsc8531;</div><div class='add'>+	return vsc85xx_probe_common(phydev, &amp;vsc8574_cfg, vsc85xx_default_led_modes_4);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	vsc8531-&gt;rate_magic = rate_magic;</div><div class='del'>-	vsc8531-&gt;nleds = 2;</div><div class='del'>-	vsc8531-&gt;supp_led_modes = VSC85XX_SUPP_LED_MODES;</div><div class='del'>-	vsc8531-&gt;hw_stats = vsc85xx_hw_stats;</div><div class='del'>-	vsc8531-&gt;nstats = ARRAY_SIZE(vsc85xx_hw_stats);</div><div class='del'>-	vsc8531-&gt;stats = devm_kcalloc(&amp;phydev-&gt;mdio.dev, vsc8531-&gt;nstats,</div><div class='del'>-				      sizeof(u64), GFP_KERNEL);</div><div class='del'>-	if (!vsc8531-&gt;stats)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+static int vsc8584_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	static const struct vsc85xx_probe_config vsc8584_cfg = {</div><div class='add'>+		.nleds = 4,</div><div class='add'>+		.supp_led_modes = VSC8584_SUPP_LED_MODES,</div><div class='add'>+		.hw_stats = vsc8584_hw_stats,</div><div class='add'>+		.nstats = ARRAY_SIZE(vsc8584_hw_stats),</div><div class='add'>+		.use_package = true,</div><div class='add'>+		.shared_size = sizeof(struct vsc85xx_shared_private),</div><div class='add'>+		.has_ptp = true,</div><div class='add'>+		.check_rate_magic = false,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return vsc85xx_probe_common(phydev, &amp;vsc8584_cfg, vsc85xx_default_led_modes_4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc85xx_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	static const struct vsc85xx_probe_config vsc85xx_cfg = {</div><div class='add'>+		.nleds = 2,</div><div class='add'>+		.supp_led_modes = VSC85XX_SUPP_LED_MODES,</div><div class='add'>+		.hw_stats = vsc85xx_hw_stats,</div><div class='add'>+		.nstats = ARRAY_SIZE(vsc85xx_hw_stats),</div><div class='add'>+		.use_package = false,</div><div class='add'>+		.has_ptp = false,</div><div class='add'>+		.check_rate_magic = true,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return vsc85xx_probe_common(phydev, &amp;vsc85xx_cfg, vsc85xx_default_led_modes_4);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return vsc85xx_dt_led_modes_get(phydev, default_mode);</div><div class='add'>+static void vsc85xx_remove(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	vsc8584_ptp_deinit(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Microsemi VSC85xx PHYs */</div><div class='hunk'>@@ -2359,6 +2569,10 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.phy_id		= PHY_ID_VSC8502,</div><div class='hunk'>@@ -2383,6 +2597,10 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.phy_id		= PHY_ID_VSC8504,</div><div class='hunk'>@@ -2408,6 +2626,12 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.inband_caps    = vsc85xx_inband_caps,</div><div class='add'>+	.config_inband  = vsc85xx_config_inband,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.phy_id		= PHY_ID_VSC8514,</div><div class='hunk'>@@ -2431,6 +2655,12 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.inband_caps    = vsc85xx_inband_caps,</div><div class='add'>+	.config_inband  = vsc85xx_config_inband,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.phy_id		= PHY_ID_VSC8530,</div><div class='hunk'>@@ -2455,6 +2685,10 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.phy_id		= PHY_ID_VSC8531,</div><div class='hunk'>@@ -2479,6 +2713,10 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.phy_id		= PHY_ID_VSC8540,</div><div class='hunk'>@@ -2503,6 +2741,10 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.phy_id		= PHY_ID_VSC8541,</div><div class='hunk'>@@ -2527,6 +2769,10 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.phy_id		= PHY_ID_VSC8552,</div><div class='hunk'>@@ -2551,11 +2797,16 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.inband_caps    = vsc85xx_inband_caps,</div><div class='add'>+	.config_inband  = vsc85xx_config_inband,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='del'>-	.phy_id		= PHY_ID_VSC856X,</div><div class='add'>+	PHY_ID_MATCH_EXACT(PHY_ID_VSC856X),</div><div class='ctx'> 	.name		= "Microsemi GE VSC856X SyncE",</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.soft_reset	= &amp;genphy_soft_reset,</div><div class='ctx'> 	.config_init    = &amp;vsc8584_config_init,</div><div class='hunk'>@@ -2573,6 +2824,12 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.inband_caps    = vsc85xx_inband_caps,</div><div class='add'>+	.config_inband  = vsc85xx_config_inband,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.phy_id		= PHY_ID_VSC8572,</div><div class='hunk'>@@ -2588,7 +2845,8 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.config_intr    = &amp;vsc85xx_config_intr,</div><div class='ctx'> 	.suspend	= &amp;genphy_suspend,</div><div class='ctx'> 	.resume		= &amp;genphy_resume,</div><div class='del'>-	.probe		= &amp;vsc8574_probe,</div><div class='add'>+	.remove		= &amp;vsc85xx_remove,</div><div class='add'>+	.probe		= &amp;vsc8584_probe,</div><div class='ctx'> 	.set_wol	= &amp;vsc85xx_wol_set,</div><div class='ctx'> 	.get_wol	= &amp;vsc85xx_wol_get,</div><div class='ctx'> 	.get_tunable	= &amp;vsc85xx_get_tunable,</div><div class='hunk'>@@ -2598,6 +2856,12 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.inband_caps    = vsc85xx_inband_caps,</div><div class='add'>+	.config_inband  = vsc85xx_config_inband,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='ctx'> 	.phy_id		= PHY_ID_VSC8574,</div><div class='hunk'>@@ -2609,11 +2873,12 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.config_aneg    = &amp;vsc85xx_config_aneg,</div><div class='ctx'> 	.aneg_done	= &amp;genphy_aneg_done,</div><div class='ctx'> 	.read_status	= &amp;vsc85xx_read_status,</div><div class='del'>-	.handle_interrupt = vsc85xx_handle_interrupt,</div><div class='add'>+	.handle_interrupt = vsc8584_handle_interrupt,</div><div class='ctx'> 	.config_intr    = &amp;vsc85xx_config_intr,</div><div class='ctx'> 	.suspend	= &amp;genphy_suspend,</div><div class='ctx'> 	.resume		= &amp;genphy_resume,</div><div class='del'>-	.probe		= &amp;vsc8574_probe,</div><div class='add'>+	.remove		= &amp;vsc85xx_remove,</div><div class='add'>+	.probe		= &amp;vsc8584_probe,</div><div class='ctx'> 	.set_wol	= &amp;vsc85xx_wol_set,</div><div class='ctx'> 	.get_wol	= &amp;vsc85xx_wol_get,</div><div class='ctx'> 	.get_tunable	= &amp;vsc85xx_get_tunable,</div><div class='hunk'>@@ -2623,11 +2888,16 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.inband_caps    = vsc85xx_inband_caps,</div><div class='add'>+	.config_inband  = vsc85xx_config_inband,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='del'>-	.phy_id		= PHY_ID_VSC8575,</div><div class='add'>+	PHY_ID_MATCH_EXACT(PHY_ID_VSC8575),</div><div class='ctx'> 	.name		= "Microsemi GE VSC8575 SyncE",</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.soft_reset	= &amp;genphy_soft_reset,</div><div class='ctx'> 	.config_init    = &amp;vsc8584_config_init,</div><div class='hunk'>@@ -2638,6 +2908,7 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.config_intr    = &amp;vsc85xx_config_intr,</div><div class='ctx'> 	.suspend	= &amp;genphy_suspend,</div><div class='ctx'> 	.resume		= &amp;genphy_resume,</div><div class='add'>+	.remove		= &amp;vsc85xx_remove,</div><div class='ctx'> 	.probe		= &amp;vsc8584_probe,</div><div class='ctx'> 	.get_tunable	= &amp;vsc85xx_get_tunable,</div><div class='ctx'> 	.set_tunable	= &amp;vsc85xx_set_tunable,</div><div class='hunk'>@@ -2646,11 +2917,16 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.inband_caps    = vsc85xx_inband_caps,</div><div class='add'>+	.config_inband  = vsc85xx_config_inband,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='del'>-	.phy_id		= PHY_ID_VSC8582,</div><div class='add'>+	PHY_ID_MATCH_EXACT(PHY_ID_VSC8582),</div><div class='ctx'> 	.name		= "Microsemi GE VSC8582 SyncE",</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.soft_reset	= &amp;genphy_soft_reset,</div><div class='ctx'> 	.config_init    = &amp;vsc8584_config_init,</div><div class='hunk'>@@ -2661,6 +2937,7 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.config_intr    = &amp;vsc85xx_config_intr,</div><div class='ctx'> 	.suspend	= &amp;genphy_suspend,</div><div class='ctx'> 	.resume		= &amp;genphy_resume,</div><div class='add'>+	.remove		= &amp;vsc85xx_remove,</div><div class='ctx'> 	.probe		= &amp;vsc8584_probe,</div><div class='ctx'> 	.get_tunable	= &amp;vsc85xx_get_tunable,</div><div class='ctx'> 	.set_tunable	= &amp;vsc85xx_set_tunable,</div><div class='hunk'>@@ -2669,11 +2946,16 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_sset_count = &amp;vsc85xx_get_sset_count,</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='add'>+	.inband_caps    = vsc85xx_inband_caps,</div><div class='add'>+	.config_inband  = vsc85xx_config_inband,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> },</div><div class='ctx'> {</div><div class='del'>-	.phy_id		= PHY_ID_VSC8584,</div><div class='add'>+	PHY_ID_MATCH_EXACT(PHY_ID_VSC8584),</div><div class='ctx'> 	.name		= "Microsemi GE VSC8584 SyncE",</div><div class='del'>-	.phy_id_mask	= 0xfffffff0,</div><div class='ctx'> 	/* PHY_GBIT_FEATURES */</div><div class='ctx'> 	.soft_reset	= &amp;genphy_soft_reset,</div><div class='ctx'> 	.config_init    = &amp;vsc8584_config_init,</div><div class='hunk'>@@ -2684,6 +2966,7 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.config_intr    = &amp;vsc85xx_config_intr,</div><div class='ctx'> 	.suspend	= &amp;genphy_suspend,</div><div class='ctx'> 	.resume		= &amp;genphy_resume,</div><div class='add'>+	.remove		= &amp;vsc85xx_remove,</div><div class='ctx'> 	.probe		= &amp;vsc8584_probe,</div><div class='ctx'> 	.get_tunable	= &amp;vsc85xx_get_tunable,</div><div class='ctx'> 	.set_tunable	= &amp;vsc85xx_set_tunable,</div><div class='hunk'>@@ -2693,13 +2976,19 @@ static struct phy_driver vsc85xx_driver[] = {</div><div class='ctx'> 	.get_strings    = &amp;vsc85xx_get_strings,</div><div class='ctx'> 	.get_stats      = &amp;vsc85xx_get_stats,</div><div class='ctx'> 	.link_change_notify = &amp;vsc85xx_link_change_notify,</div><div class='add'>+	.inband_caps    = vsc85xx_inband_caps,</div><div class='add'>+	.config_inband  = vsc85xx_config_inband,</div><div class='add'>+	.led_brightness_set = vsc85xx_led_brightness_set,</div><div class='add'>+	.led_hw_is_supported = vsc85xx_led_hw_is_supported,</div><div class='add'>+	.led_hw_control_get = vsc85xx_led_hw_control_get,</div><div class='add'>+	.led_hw_control_set = vsc85xx_led_hw_control_set,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(vsc85xx_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused vsc85xx_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused vsc85xx_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_VENDOR(PHY_VENDOR_MSCC) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/mscc/mscc_ptp.c b/drivers/net/phy/mscc/mscc_ptp.c<br/>index 738a8822fcf0..4865eac74b0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mscc/mscc_ptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mscc/mscc_ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mscc/mscc_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mscc/mscc_ptp.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/udp.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "../phylib.h"</div><div class='ctx'> #include "mscc.h"</div><div class='ctx'> #include "mscc_ptp.h"</div><div class='ctx'> </div><div class='hunk'>@@ -455,12 +456,12 @@ static void vsc85xx_dequeue_skb(struct vsc85xx_ptp *ptp)</div><div class='ctx'> 		*p++ = (reg &gt;&gt; 24) &amp; 0xff;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	len = skb_queue_len(&amp;ptp-&gt;tx_queue);</div><div class='add'>+	len = skb_queue_len_lockless(&amp;ptp-&gt;tx_queue);</div><div class='ctx'> 	if (len &lt; 1)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	while (len--) {</div><div class='del'>-		skb = __skb_dequeue(&amp;ptp-&gt;tx_queue);</div><div class='add'>+		skb = skb_dequeue(&amp;ptp-&gt;tx_queue);</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='hunk'>@@ -485,7 +486,7 @@ static void vsc85xx_dequeue_skb(struct vsc85xx_ptp *ptp)</div><div class='ctx'> 		 * packet in the FIFO right now, reschedule it for later</div><div class='ctx'> 		 * packets.</div><div class='ctx'> 		 */</div><div class='del'>-		__skb_queue_tail(&amp;ptp-&gt;tx_queue, skb);</div><div class='add'>+		skb_queue_tail(&amp;ptp-&gt;tx_queue, skb);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -645,11 +646,12 @@ static int __vsc85xx_gettime(struct ptp_clock_info *info, struct timespec64 *ts)</div><div class='ctx'> {</div><div class='ctx'> 	struct vsc85xx_ptp *ptp = container_of(info, struct vsc85xx_ptp, caps);</div><div class='ctx'> 	struct phy_device *phydev = ptp-&gt;phydev;</div><div class='del'>-	struct vsc85xx_shared_private *shared =</div><div class='del'>-		(struct vsc85xx_shared_private *)phydev-&gt;shared-&gt;priv;</div><div class='ctx'> 	struct vsc8531_private *priv = phydev-&gt;priv;</div><div class='add'>+	struct vsc85xx_shared_private *shared;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='add'>+	shared = phy_package_get_priv(phydev);</div><div class='add'>+</div><div class='ctx'> 	val = vsc85xx_ts_read_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL);</div><div class='ctx'> 	val |= PTP_LTC_CTRL_SAVE_ENA;</div><div class='ctx'> 	vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_CTRL, val);</div><div class='hunk'>@@ -696,11 +698,12 @@ static int __vsc85xx_settime(struct ptp_clock_info *info,</div><div class='ctx'> {</div><div class='ctx'> 	struct vsc85xx_ptp *ptp = container_of(info, struct vsc85xx_ptp, caps);</div><div class='ctx'> 	struct phy_device *phydev = ptp-&gt;phydev;</div><div class='del'>-	struct vsc85xx_shared_private *shared =</div><div class='del'>-		(struct vsc85xx_shared_private *)phydev-&gt;shared-&gt;priv;</div><div class='ctx'> 	struct vsc8531_private *priv = phydev-&gt;priv;</div><div class='add'>+	struct vsc85xx_shared_private *shared;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='add'>+	shared = phy_package_get_priv(phydev);</div><div class='add'>+</div><div class='ctx'> 	vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_LOAD_SEC_MSB,</div><div class='ctx'> 			     PTP_LTC_LOAD_SEC_MSB(ts-&gt;tv_sec));</div><div class='ctx'> 	vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_LTC_LOAD_SEC_LSB,</div><div class='hunk'>@@ -897,6 +900,7 @@ static int vsc85xx_eth1_conf(struct phy_device *phydev, enum ts_blk blk,</div><div class='ctx'> 				     get_unaligned_be32(ptp_multicast));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		val |= ANA_ETH1_FLOW_ADDR_MATCH2_ANY_MULTICAST;</div><div class='add'>+		val |= ANA_ETH1_FLOW_ADDR_MATCH2_ANY_UNICAST;</div><div class='ctx'> 		vsc85xx_ts_write_csr(phydev, blk,</div><div class='ctx'> 				     MSCC_ANA_ETH1_FLOW_ADDR_MATCH2(0), val);</div><div class='ctx'> 		vsc85xx_ts_write_csr(phydev, blk,</div><div class='hunk'>@@ -943,7 +947,9 @@ static int vsc85xx_ip1_conf(struct phy_device *phydev, enum ts_blk blk,</div><div class='ctx'> 	/* UDP checksum offset in IPv4 packet</div><div class='ctx'> 	 * according to: https://tools.ietf.org/html/rfc768</div><div class='ctx'> 	 */</div><div class='del'>-	val |= IP1_NXT_PROT_UDP_CHKSUM_OFF(26) | IP1_NXT_PROT_UDP_CHKSUM_CLEAR;</div><div class='add'>+	val |= IP1_NXT_PROT_UDP_CHKSUM_OFF(26);</div><div class='add'>+	if (enable)</div><div class='add'>+		val |= IP1_NXT_PROT_UDP_CHKSUM_CLEAR;</div><div class='ctx'> 	vsc85xx_ts_write_csr(phydev, blk, MSCC_ANA_IP1_NXT_PROT_UDP_CHKSUM,</div><div class='ctx'> 			     val);</div><div class='ctx'> </div><div class='hunk'>@@ -1045,9 +1051,21 @@ static void vsc85xx_ts_reset_fifo(struct phy_device *phydev)</div><div class='ctx'> 			     val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vsc85xx_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='del'>-			    struct kernel_hwtstamp_config *cfg,</div><div class='del'>-			    struct netlink_ext_ack *extack)</div><div class='add'>+static int vsc85xx_hwtstamp_get(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='add'>+	struct vsc8531_private *vsc8531 =</div><div class='add'>+		container_of(mii_ts, struct vsc8531_private, mii_ts);</div><div class='add'>+</div><div class='add'>+	cfg-&gt;tx_type = vsc8531-&gt;ptp-&gt;tx_type;</div><div class='add'>+	cfg-&gt;rx_filter = vsc8531-&gt;ptp-&gt;rx_filter;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc85xx_hwtstamp_set(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct vsc8531_private *vsc8531 =</div><div class='ctx'> 		container_of(mii_ts, struct vsc8531_private, mii_ts);</div><div class='hunk'>@@ -1062,6 +1080,7 @@ static int vsc85xx_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> 	case HWTSTAMP_TX_ON:</div><div class='ctx'> 		break;</div><div class='ctx'> 	case HWTSTAMP_TX_OFF:</div><div class='add'>+		skb_queue_purge(&amp;vsc8531-&gt;ptp-&gt;tx_queue);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ERANGE;</div><div class='hunk'>@@ -1086,9 +1105,6 @@ static int vsc85xx_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;vsc8531-&gt;ts_lock);</div><div class='ctx'> </div><div class='del'>-	__skb_queue_purge(&amp;vsc8531-&gt;ptp-&gt;tx_queue);</div><div class='del'>-	__skb_queue_head_init(&amp;vsc8531-&gt;ptp-&gt;tx_queue);</div><div class='del'>-</div><div class='ctx'> 	/* Disable predictor while configuring the 1588 block */</div><div class='ctx'> 	val = vsc85xx_ts_read_csr(phydev, PROCESSOR,</div><div class='ctx'> 				  MSCC_PHY_PTP_INGR_PREDICTOR);</div><div class='hunk'>@@ -1163,18 +1179,22 @@ static void vsc85xx_txtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> 		container_of(mii_ts, struct vsc8531_private, mii_ts);</div><div class='ctx'> </div><div class='ctx'> 	if (!vsc8531-&gt;ptp-&gt;configured)</div><div class='del'>-		return;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	if (vsc8531-&gt;ptp-&gt;tx_type == HWTSTAMP_TX_OFF) {</div><div class='del'>-		kfree_skb(skb);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	if (vsc8531-&gt;ptp-&gt;tx_type == HWTSTAMP_TX_OFF)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (vsc8531-&gt;ptp-&gt;tx_type == HWTSTAMP_TX_ONESTEP_SYNC)</div><div class='add'>+		if (ptp_msg_is_sync(skb, type))</div><div class='add'>+			goto out;</div><div class='ctx'> </div><div class='ctx'> 	skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;vsc8531-&gt;ts_lock);</div><div class='del'>-	__skb_queue_tail(&amp;vsc8531-&gt;ptp-&gt;tx_queue, skb);</div><div class='del'>-	mutex_unlock(&amp;vsc8531-&gt;ts_lock);</div><div class='add'>+	skb_queue_tail(&amp;vsc8531-&gt;ptp-&gt;tx_queue, skb);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree_skb(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool vsc85xx_rxtstamp(struct mii_timestamper *mii_ts,</div><div class='hunk'>@@ -1182,9 +1202,7 @@ static bool vsc85xx_rxtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> {</div><div class='ctx'> 	struct vsc8531_private *vsc8531 =</div><div class='ctx'> 		container_of(mii_ts, struct vsc8531_private, mii_ts);</div><div class='del'>-	struct skb_shared_hwtstamps *shhwtstamps = NULL;</div><div class='ctx'> 	struct vsc85xx_ptphdr *ptphdr;</div><div class='del'>-	struct timespec64 ts;</div><div class='ctx'> 	unsigned long ns;</div><div class='ctx'> </div><div class='ctx'> 	if (!vsc8531-&gt;ptp-&gt;configured)</div><div class='hunk'>@@ -1194,27 +1212,52 @@ static bool vsc85xx_rxtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> 	    type == PTP_CLASS_NONE)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	vsc85xx_gettime(&amp;vsc8531-&gt;ptp-&gt;caps, &amp;ts);</div><div class='del'>-</div><div class='ctx'> 	ptphdr = get_ptp_header_rx(skb, vsc8531-&gt;ptp-&gt;rx_filter);</div><div class='ctx'> 	if (!ptphdr)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	shhwtstamps = skb_hwtstamps(skb);</div><div class='del'>-	memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));</div><div class='del'>-</div><div class='ctx'> 	ns = ntohl(ptphdr-&gt;rsrvd2);</div><div class='ctx'> </div><div class='del'>-	/* nsec is in reserved field */</div><div class='del'>-	if (ts.tv_nsec &lt; ns)</div><div class='del'>-		ts.tv_sec--;</div><div class='add'>+	VSC8531_SKB_CB(skb)-&gt;ns = ns;</div><div class='add'>+	skb_queue_tail(&amp;vsc8531-&gt;rx_skbs_list, skb);</div><div class='ctx'> </div><div class='del'>-	shhwtstamps-&gt;hwtstamp = ktime_set(ts.tv_sec, ns);</div><div class='del'>-	netif_rx(skb);</div><div class='add'>+	ptp_schedule_worker(vsc8531-&gt;ptp-&gt;ptp_clock, 0);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static long vsc85xx_do_aux_work(struct ptp_clock_info *info)</div><div class='add'>+{</div><div class='add'>+	struct vsc85xx_ptp *ptp = container_of(info, struct vsc85xx_ptp, caps);</div><div class='add'>+	struct skb_shared_hwtstamps *shhwtstamps = NULL;</div><div class='add'>+	struct phy_device *phydev = ptp-&gt;phydev;</div><div class='add'>+	struct vsc8531_private *priv = phydev-&gt;priv;</div><div class='add'>+	struct sk_buff_head received;</div><div class='add'>+	struct sk_buff *rx_skb;</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	__skb_queue_head_init(&amp;received);</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;rx_skbs_list.lock, flags);</div><div class='add'>+	skb_queue_splice_tail_init(&amp;priv-&gt;rx_skbs_list, &amp;received);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;rx_skbs_list.lock, flags);</div><div class='add'>+</div><div class='add'>+	vsc85xx_gettime(info, &amp;ts);</div><div class='add'>+	while ((rx_skb = __skb_dequeue(&amp;received)) != NULL) {</div><div class='add'>+		shhwtstamps = skb_hwtstamps(rx_skb);</div><div class='add'>+		memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));</div><div class='add'>+</div><div class='add'>+		if (ts.tv_nsec &lt; VSC8531_SKB_CB(rx_skb)-&gt;ns)</div><div class='add'>+			ts.tv_sec--;</div><div class='add'>+</div><div class='add'>+		shhwtstamps-&gt;hwtstamp = ktime_set(ts.tv_sec,</div><div class='add'>+						  VSC8531_SKB_CB(rx_skb)-&gt;ns);</div><div class='add'>+		netif_rx(rx_skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ptp_clock_info vsc85xx_clk_caps = {</div><div class='ctx'> 	.owner		= THIS_MODULE,</div><div class='ctx'> 	.name		= "VSC85xx timer",</div><div class='hunk'>@@ -1228,6 +1271,7 @@ static const struct ptp_clock_info vsc85xx_clk_caps = {</div><div class='ctx'> 	.adjfine	= &amp;vsc85xx_adjfine,</div><div class='ctx'> 	.gettime64	= &amp;vsc85xx_gettime,</div><div class='ctx'> 	.settime64	= &amp;vsc85xx_settime,</div><div class='add'>+	.do_aux_work	= &amp;vsc85xx_do_aux_work,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct vsc8531_private *vsc8584_base_priv(struct phy_device *phydev)</div><div class='hunk'>@@ -1262,7 +1306,6 @@ static void vsc8584_set_input_clk_configured(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static int __vsc8584_init_ptp(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	struct vsc8531_private *vsc8531 = phydev-&gt;priv;</div><div class='ctx'> 	static const u32 ltc_seq_e[] = { 0, 400000, 0, 0, 0 };</div><div class='ctx'> 	static const u8  ltc_seq_a[] = { 8, 6, 5, 4, 2 };</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -1479,17 +1522,7 @@ static int __vsc8584_init_ptp(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	vsc85xx_ts_eth_cmp1_sig(phydev);</div><div class='ctx'> </div><div class='del'>-	vsc8531-&gt;mii_ts.rxtstamp = vsc85xx_rxtstamp;</div><div class='del'>-	vsc8531-&gt;mii_ts.txtstamp = vsc85xx_txtstamp;</div><div class='del'>-	vsc8531-&gt;mii_ts.hwtstamp = vsc85xx_hwtstamp;</div><div class='del'>-	vsc8531-&gt;mii_ts.ts_info  = vsc85xx_ts_info;</div><div class='del'>-	phydev-&gt;mii_ts = &amp;vsc8531-&gt;mii_ts;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;vsc8531-&gt;ptp-&gt;caps, &amp;vsc85xx_clk_caps, sizeof(vsc85xx_clk_caps));</div><div class='del'>-</div><div class='del'>-	vsc8531-&gt;ptp-&gt;ptp_clock = ptp_clock_register(&amp;vsc8531-&gt;ptp-&gt;caps,</div><div class='del'>-						     &amp;phydev-&gt;mdio.dev);</div><div class='del'>-	return PTR_ERR_OR_ZERO(vsc8531-&gt;ptp-&gt;ptp_clock);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vsc8584_config_ts_intr(struct phy_device *phydev)</div><div class='hunk'>@@ -1516,6 +1549,17 @@ int vsc8584_ptp_init(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void vsc8584_ptp_deinit(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct vsc8531_private *vsc8531 = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (vsc8531-&gt;ptp-&gt;ptp_clock) {</div><div class='add'>+		ptp_clock_unregister(vsc8531-&gt;ptp-&gt;ptp_clock);</div><div class='add'>+		skb_queue_purge(&amp;vsc8531-&gt;rx_skbs_list);</div><div class='add'>+		skb_queue_purge(&amp;vsc8531-&gt;ptp-&gt;tx_queue);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> irqreturn_t vsc8584_handle_ts_interrupt(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct vsc8531_private *priv = phydev-&gt;priv;</div><div class='hunk'>@@ -1536,7 +1580,7 @@ irqreturn_t vsc8584_handle_ts_interrupt(struct phy_device *phydev)</div><div class='ctx'> 	if (rc &amp; VSC85XX_1588_INT_FIFO_ADD) {</div><div class='ctx'> 		vsc85xx_get_tx_ts(priv-&gt;ptp);</div><div class='ctx'> 	} else if (rc &amp; VSC85XX_1588_INT_FIFO_OVERFLOW) {</div><div class='del'>-		__skb_queue_purge(&amp;priv-&gt;ptp-&gt;tx_queue);</div><div class='add'>+		skb_queue_purge(&amp;priv-&gt;ptp-&gt;tx_queue);</div><div class='ctx'> 		vsc85xx_ts_reset_fifo(phydev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1555,6 +1599,8 @@ int vsc8584_ptp_probe(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;vsc8531-&gt;phc_lock);</div><div class='ctx'> 	mutex_init(&amp;vsc8531-&gt;ts_lock);</div><div class='add'>+	skb_queue_head_init(&amp;vsc8531-&gt;rx_skbs_list);</div><div class='add'>+	skb_queue_head_init(&amp;vsc8531-&gt;ptp-&gt;tx_queue);</div><div class='ctx'> </div><div class='ctx'> 	/* Retrieve the shared load/save GPIO. Request it as non exclusive as</div><div class='ctx'> 	 * the same GPIO can be requested by all the PHYs of the same package.</div><div class='hunk'>@@ -1575,13 +1621,22 @@ int vsc8584_ptp_probe(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	vsc8531-&gt;ptp-&gt;phydev = phydev;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	vsc8531-&gt;mii_ts.rxtstamp = vsc85xx_rxtstamp;</div><div class='add'>+	vsc8531-&gt;mii_ts.txtstamp = vsc85xx_txtstamp;</div><div class='add'>+	vsc8531-&gt;mii_ts.hwtstamp_set = vsc85xx_hwtstamp_set;</div><div class='add'>+	vsc8531-&gt;mii_ts.hwtstamp_get = vsc85xx_hwtstamp_get;</div><div class='add'>+	vsc8531-&gt;mii_ts.ts_info  = vsc85xx_ts_info;</div><div class='add'>+	phydev-&gt;mii_ts = &amp;vsc8531-&gt;mii_ts;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;vsc8531-&gt;ptp-&gt;caps, &amp;vsc85xx_clk_caps, sizeof(vsc85xx_clk_caps));</div><div class='add'>+	vsc8531-&gt;ptp-&gt;ptp_clock = ptp_clock_register(&amp;vsc8531-&gt;ptp-&gt;caps,</div><div class='add'>+						     &amp;phydev-&gt;mdio.dev);</div><div class='add'>+	return PTR_ERR_OR_ZERO(vsc8531-&gt;ptp-&gt;ptp_clock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int vsc8584_ptp_probe_once(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	struct vsc85xx_shared_private *shared =</div><div class='del'>-		(struct vsc85xx_shared_private *)phydev-&gt;shared-&gt;priv;</div><div class='add'>+	struct vsc85xx_shared_private *shared = phy_package_get_priv(phydev);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize shared GPIO lock */</div><div class='ctx'> 	mutex_init(&amp;shared-&gt;gpio_lock);</div><div class='head'>diff --git a/drivers/net/phy/mscc/mscc_ptp.h b/drivers/net/phy/mscc/mscc_ptp.h<br/>index da3465360e90..ae9ad925bfa8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mscc/mscc_ptp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mscc/mscc_ptp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mscc/mscc_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mscc/mscc_ptp.h</a></div><div class='hunk'>@@ -98,6 +98,7 @@</div><div class='ctx'> #define MSCC_ANA_ETH1_FLOW_ADDR_MATCH2(x) (MSCC_ANA_ETH1_FLOW_ENA(x) + 3)</div><div class='ctx'> #define ANA_ETH1_FLOW_ADDR_MATCH2_MASK_MASK	GENMASK(22, 20)</div><div class='ctx'> #define ANA_ETH1_FLOW_ADDR_MATCH2_ANY_MULTICAST	0x400000</div><div class='add'>+#define ANA_ETH1_FLOW_ADDR_MATCH2_ANY_UNICAST	0x200000</div><div class='ctx'> #define ANA_ETH1_FLOW_ADDR_MATCH2_FULL_ADDR	0x100000</div><div class='ctx'> #define ANA_ETH1_FLOW_ADDR_MATCH2_SRC_DEST_MASK	GENMASK(17, 16)</div><div class='ctx'> #define ANA_ETH1_FLOW_ADDR_MATCH2_SRC_DEST	0x020000</div><div class='head'>diff --git a/drivers/net/phy/mxl-86110.c b/drivers/net/phy/mxl-86110.c<br/>new file mode 100644<br/>index 000000000000..e5d137a37a1d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mxl-86110.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mxl-86110.c</a></div><div class='hunk'>@@ -0,0 +1,978 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * PHY driver for Maxlinear MXL86110</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2023 MaxLinear Inc.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+/* PHY ID */</div><div class='add'>+#define PHY_ID_MXL86110		0xc1335580</div><div class='add'>+#define PHY_ID_MXL86111		0xc1335588</div><div class='add'>+</div><div class='add'>+/* required to access extended registers */</div><div class='add'>+#define MXL86110_EXTD_REG_ADDR_OFFSET			0x1E</div><div class='add'>+#define MXL86110_EXTD_REG_ADDR_DATA			0x1F</div><div class='add'>+#define PHY_IRQ_ENABLE_REG				0x12</div><div class='add'>+#define PHY_IRQ_ENABLE_REG_WOL				BIT(6)</div><div class='add'>+</div><div class='add'>+/* different pages for EXTD access for MXL86111 */</div><div class='add'>+/* SerDes/PHY Control Access Register - COM_EXT_SMI_SDS_PHY */</div><div class='add'>+#define MXL86111_EXT_SMI_SDS_PHY_REG			0xA000</div><div class='add'>+#define MXL86111_EXT_SMI_SDS_PHYSPACE_MASK		BIT(1)</div><div class='add'>+#define MXL86111_EXT_SMI_SDS_PHYFIBER_SPACE		(0x1 &lt;&lt; 1)</div><div class='add'>+#define MXL86111_EXT_SMI_SDS_PHYUTP_SPACE		(0x0 &lt;&lt; 1)</div><div class='add'>+#define MXL86111_EXT_SMI_SDS_PHY_AUTO			0xff</div><div class='add'>+</div><div class='add'>+/* SyncE Configuration Register - COM_EXT_SYNCE_CFG */</div><div class='add'>+#define MXL86110_EXT_SYNCE_CFG_REG			0xA012</div><div class='add'>+#define MXL86110_EXT_SYNCE_CFG_CLK_FRE_SEL		BIT(4)</div><div class='add'>+#define MXL86110_EXT_SYNCE_CFG_EN_SYNC_E_DURING_LNKDN	BIT(5)</div><div class='add'>+#define MXL86110_EXT_SYNCE_CFG_EN_SYNC_E		BIT(6)</div><div class='add'>+#define MXL86110_EXT_SYNCE_CFG_CLK_SRC_SEL_MASK		GENMASK(3, 1)</div><div class='add'>+#define MXL86110_EXT_SYNCE_CFG_CLK_SRC_SEL_125M_PLL	0</div><div class='add'>+#define MXL86110_EXT_SYNCE_CFG_CLK_SRC_SEL_25M		4</div><div class='add'>+</div><div class='add'>+/* MAC Address registers */</div><div class='add'>+#define MXL86110_EXT_MAC_ADDR_CFG1			0xA007</div><div class='add'>+#define MXL86110_EXT_MAC_ADDR_CFG2			0xA008</div><div class='add'>+#define MXL86110_EXT_MAC_ADDR_CFG3			0xA009</div><div class='add'>+</div><div class='add'>+#define MXL86110_EXT_WOL_CFG_REG			0xA00A</div><div class='add'>+#define MXL86110_WOL_CFG_WOL_MASK			BIT(3)</div><div class='add'>+</div><div class='add'>+/* RGMII register */</div><div class='add'>+#define MXL86110_EXT_RGMII_CFG1_REG			0xA003</div><div class='add'>+/* delay can be adjusted in steps of about 150ps */</div><div class='add'>+#define MXL86110_EXT_RGMII_CFG1_RX_NO_DELAY		(0x0 &lt;&lt; 10)</div><div class='add'>+/* Closest value to 2000 ps */</div><div class='add'>+#define MXL86110_EXT_RGMII_CFG1_RX_DELAY_1950PS		(0xD &lt;&lt; 10)</div><div class='add'>+#define MXL86110_EXT_RGMII_CFG1_RX_DELAY_MASK		GENMASK(13, 10)</div><div class='add'>+</div><div class='add'>+#define MXL86110_EXT_RGMII_CFG1_TX_1G_DELAY_1950PS	(0xD &lt;&lt; 0)</div><div class='add'>+#define MXL86110_EXT_RGMII_CFG1_TX_1G_DELAY_MASK	GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define MXL86110_EXT_RGMII_CFG1_TX_10MB_100MB_DELAY_1950PS	(0xD &lt;&lt; 4)</div><div class='add'>+#define MXL86110_EXT_RGMII_CFG1_TX_10MB_100MB_DELAY_MASK	GENMASK(7, 4)</div><div class='add'>+</div><div class='add'>+#define MXL86110_EXT_RGMII_CFG1_FULL_MASK \</div><div class='add'>+			((MXL86110_EXT_RGMII_CFG1_RX_DELAY_MASK) | \</div><div class='add'>+			(MXL86110_EXT_RGMII_CFG1_TX_1G_DELAY_MASK) | \</div><div class='add'>+			(MXL86110_EXT_RGMII_CFG1_TX_10MB_100MB_DELAY_MASK))</div><div class='add'>+</div><div class='add'>+/* EXT Sleep Control register */</div><div class='add'>+#define MXL86110_UTP_EXT_SLEEP_CTRL_REG			0x27</div><div class='add'>+#define MXL86110_UTP_EXT_SLEEP_CTRL_EN_SLEEP_SW_OFF	0</div><div class='add'>+#define MXL86110_UTP_EXT_SLEEP_CTRL_EN_SLEEP_SW_MASK	BIT(15)</div><div class='add'>+</div><div class='add'>+/* RGMII In-Band Status and MDIO Configuration Register */</div><div class='add'>+#define MXL86110_EXT_RGMII_MDIO_CFG			0xA005</div><div class='add'>+#define MXL86110_RGMII_MDIO_CFG_EPA0_MASK		GENMASK(6, 6)</div><div class='add'>+#define MXL86110_EXT_RGMII_MDIO_CFG_EBA_MASK		GENMASK(5, 5)</div><div class='add'>+#define MXL86110_EXT_RGMII_MDIO_CFG_BA_MASK		GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define MXL86110_MAX_LEDS	3</div><div class='add'>+/* LED registers and defines */</div><div class='add'>+#define MXL86110_COM_EXT_LED_GEN_CFG			0xA00B</div><div class='add'>+# define MXL86110_COM_EXT_LED_GEN_CFG_LFM(x)		((BIT(0) | BIT(1)) &lt;&lt; (3 * (x)))</div><div class='add'>+#  define MXL86110_COM_EXT_LED_GEN_CFG_LFME(x)		(BIT(0) &lt;&lt; (3 * (x)))</div><div class='add'>+# define MXL86110_COM_EXT_LED_GEN_CFG_LFE(x)		(BIT(2) &lt;&lt; (3 * (x)))</div><div class='add'>+</div><div class='add'>+#define MXL86110_LED0_CFG_REG 0xA00C</div><div class='add'>+#define MXL86110_LED1_CFG_REG 0xA00D</div><div class='add'>+#define MXL86110_LED2_CFG_REG 0xA00E</div><div class='add'>+</div><div class='add'>+#define MXL86110_LEDX_CFG_BLINK				BIT(13)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_FULL_DUPLEX_ON	BIT(12)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_HALF_DUPLEX_ON	BIT(11)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_TX_ACT_ON		BIT(10)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_RX_ACT_ON		BIT(9)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_TX_ON			BIT(8)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_RX_ON			BIT(7)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_1GB_ON		BIT(6)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_100MB_ON		BIT(5)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_10MB_ON		BIT(4)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_COLLISION		BIT(3)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_1GB_BLINK		BIT(2)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_100MB_BLINK		BIT(1)</div><div class='add'>+#define MXL86110_LEDX_CFG_LINK_UP_10MB_BLINK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_REG			0xA00F</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_FREQ_MODE1_2HZ		0</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_FREQ_MODE1_4HZ		BIT(0)</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_FREQ_MODE1_8HZ		BIT(1)</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_FREQ_MODE1_16HZ		(BIT(1) | BIT(0))</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_FREQ_MODE2_2HZ		0</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_FREQ_MODE2_4HZ		BIT(2)</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_FREQ_MODE2_8HZ		BIT(3)</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_FREQ_MODE2_16HZ		(BIT(3) | BIT(2))</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_DUTY_CYCLE_50_ON		0</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_DUTY_CYCLE_67_ON		(BIT(4))</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_DUTY_CYCLE_75_ON		(BIT(5))</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_DUTY_CYCLE_83_ON		(BIT(5) | BIT(4))</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_DUTY_CYCLE_50_OFF	(BIT(6))</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_DUTY_CYCLE_33_ON		(BIT(6) | BIT(4))</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_DUTY_CYCLE_25_ON		(BIT(6) | BIT(5))</div><div class='add'>+#define MXL86110_LED_BLINK_CFG_DUTY_CYCLE_17_ON	(BIT(6) | BIT(5) | BIT(4))</div><div class='add'>+</div><div class='add'>+/* Chip Configuration Register - COM_EXT_CHIP_CFG */</div><div class='add'>+#define MXL86110_EXT_CHIP_CFG_REG			0xA001</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_MODE_SEL_MASK		GENMASK(2, 0)</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_MODE_UTP_TO_RGMII		0</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_MODE_FIBER_TO_RGMII	1</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_MODE_UTP_FIBER_TO_RGMII	2</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_MODE_UTP_TO_SGMII		3</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_MODE_SGPHY_TO_RGMAC	4</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_MODE_SGMAC_TO_RGPHY	5</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_MODE_UTP_TO_FIBER_AUTO	6</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_MODE_UTP_TO_FIBER_FORCE	7</div><div class='add'>+</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_CLDO_MASK			GENMASK(5, 4)</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_CLDO_3V3			0</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_CLDO_2V5			1</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_CLDO_1V8_2		2</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_CLDO_1V8_3		3</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_CLDO_SHIFT		4</div><div class='add'>+#define MXL86111_EXT_CHIP_CFG_ELDO			BIT(6)</div><div class='add'>+#define MXL86110_EXT_CHIP_CFG_RXDLY_ENABLE		BIT(8)</div><div class='add'>+#define MXL86110_EXT_CHIP_CFG_SW_RST_N_MODE		BIT(15)</div><div class='add'>+</div><div class='add'>+/* Specific Status Register - PHY_STAT */</div><div class='add'>+#define MXL86111_PHY_STAT_REG				0x11</div><div class='add'>+#define MXL86111_PHY_STAT_SPEED_MASK			GENMASK(15, 14)</div><div class='add'>+#define MXL86111_PHY_STAT_SPEED_OFFSET			14</div><div class='add'>+#define MXL86111_PHY_STAT_SPEED_10M			0x0</div><div class='add'>+#define MXL86111_PHY_STAT_SPEED_100M			0x1</div><div class='add'>+#define MXL86111_PHY_STAT_SPEED_1000M			0x2</div><div class='add'>+#define MXL86111_PHY_STAT_DPX_OFFSET			13</div><div class='add'>+#define MXL86111_PHY_STAT_DPX				BIT(13)</div><div class='add'>+#define MXL86111_PHY_STAT_LSRT				BIT(10)</div><div class='add'>+</div><div class='add'>+/* 3 phy reg page modes,auto mode combines utp and fiber mode*/</div><div class='add'>+#define MXL86111_MODE_FIBER				0x1</div><div class='add'>+#define MXL86111_MODE_UTP				0x2</div><div class='add'>+#define MXL86111_MODE_AUTO				0x3</div><div class='add'>+</div><div class='add'>+/* FIBER Auto-Negotiation link partner ability - SDS_AN_LPA */</div><div class='add'>+#define MXL86111_SDS_AN_LPA_PAUSE			(0x3 &lt;&lt; 7)</div><div class='add'>+#define MXL86111_SDS_AN_LPA_ASYM_PAUSE			(0x2 &lt;&lt; 7)</div><div class='add'>+</div><div class='add'>+/* Miscellaneous Control Register - COM_EXT _MISC_CFG */</div><div class='add'>+#define MXL86111_EXT_MISC_CONFIG_REG			0xa006</div><div class='add'>+#define MXL86111_EXT_MISC_CONFIG_FIB_SPEED_SEL		BIT(0)</div><div class='add'>+#define MXL86111_EXT_MISC_CONFIG_FIB_SPEED_SEL_1000BX	(0x1 &lt;&lt; 0)</div><div class='add'>+#define MXL86111_EXT_MISC_CONFIG_FIB_SPEED_SEL_100BX	(0x0 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* Phy fiber Link timer cfg2 Register - EXT_SDS_LINK_TIMER_CFG2 */</div><div class='add'>+#define MXL86111_EXT_SDS_LINK_TIMER_CFG2_REG		0xA5</div><div class='add'>+#define MXL86111_EXT_SDS_LINK_TIMER_CFG2_EN_AUTOSEN	BIT(15)</div><div class='add'>+</div><div class='add'>+/* default values of PHY register, required for Dual Media mode */</div><div class='add'>+#define MII_BMSR_DEFAULT_VAL		0x7949</div><div class='add'>+#define MII_ESTATUS_DEFAULT_VAL		0x2000</div><div class='add'>+</div><div class='add'>+/* Timeout in ms for PHY SW reset check in STD_CTRL/SDS_CTRL */</div><div class='add'>+#define BMCR_RESET_TIMEOUT		500</div><div class='add'>+</div><div class='add'>+/* PL P1 requires optimized RGMII timing for 1.8V RGMII voltage</div><div class='add'>+ */</div><div class='add'>+#define MXL86111_PL_P1				0x500</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __mxl86110_write_extended_reg() - write to a PHY's extended register</div><div class='add'>+ * @phydev: pointer to the PHY device structure</div><div class='add'>+ * @regnum: register number to write</div><div class='add'>+ * @val: value to write to @regnum</div><div class='add'>+ *</div><div class='add'>+ * Unlocked version of mxl86110_write_extended_reg</div><div class='add'>+ *</div><div class='add'>+ * Note: This function assumes the caller already holds the MDIO bus lock</div><div class='add'>+ * or otherwise has exclusive access to the PHY.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative error code</div><div class='add'>+ */</div><div class='add'>+static int __mxl86110_write_extended_reg(struct phy_device *phydev,</div><div class='add'>+					 u16 regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = __phy_write(phydev, MXL86110_EXTD_REG_ADDR_OFFSET, regnum);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return __phy_write(phydev, MXL86110_EXTD_REG_ADDR_DATA, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __mxl86110_read_extended_reg - Read a PHY's extended register</div><div class='add'>+ * @phydev: pointer to the PHY device structure</div><div class='add'>+ * @regnum: extended register number to read (address written to reg 30)</div><div class='add'>+ *</div><div class='add'>+ * Unlocked version of mxl86110_read_extended_reg</div><div class='add'>+ *</div><div class='add'>+ * Reads the content of a PHY extended register using the MaxLinear</div><div class='add'>+ * 2-step access mechanism: write the register address to reg 30 (0x1E),</div><div class='add'>+ * then read the value from reg 31 (0x1F).</div><div class='add'>+ *</div><div class='add'>+ * Note: This function assumes the caller already holds the MDIO bus lock</div><div class='add'>+ * or otherwise has exclusive access to the PHY.</div><div class='add'>+ *</div><div class='add'>+ * Return: 16-bit register value on success, or negative errno code on failure.</div><div class='add'>+ */</div><div class='add'>+static int __mxl86110_read_extended_reg(struct phy_device *phydev, u16 regnum)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = __phy_write(phydev, MXL86110_EXTD_REG_ADDR_OFFSET, regnum);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	return __phy_read(phydev, MXL86110_EXTD_REG_ADDR_DATA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __mxl86110_modify_extended_reg() - modify bits of a PHY's extended register</div><div class='add'>+ * @phydev: pointer to the PHY device structure</div><div class='add'>+ * @regnum: register number to write</div><div class='add'>+ * @mask: bit mask of bits to clear</div><div class='add'>+ * @set: bit mask of bits to set</div><div class='add'>+ *</div><div class='add'>+ * Note: register value = (old register value &amp; ~mask) | set.</div><div class='add'>+ * This function assumes the caller already holds the MDIO bus lock</div><div class='add'>+ * or otherwise has exclusive access to the PHY.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative error code</div><div class='add'>+ */</div><div class='add'>+static int __mxl86110_modify_extended_reg(struct phy_device *phydev,</div><div class='add'>+					  u16 regnum, u16 mask, u16 set)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = __phy_write(phydev, MXL86110_EXTD_REG_ADDR_OFFSET, regnum);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return __phy_modify(phydev, MXL86110_EXTD_REG_ADDR_DATA, mask, set);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86110_write_extended_reg() - Write to a PHY's extended register</div><div class='add'>+ * @phydev: pointer to the PHY device structure</div><div class='add'>+ * @regnum: register number to write</div><div class='add'>+ * @val: value to write to @regnum</div><div class='add'>+ *</div><div class='add'>+ * This function writes to an extended register of the PHY using the</div><div class='add'>+ * MaxLinear two-step access method (reg 0x1E/0x1F). It handles acquiring</div><div class='add'>+ * and releasing the MDIO bus lock internally.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative error code</div><div class='add'>+ */</div><div class='add'>+static int mxl86110_write_extended_reg(struct phy_device *phydev,</div><div class='add'>+				       u16 regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	phy_lock_mdio_bus(phydev);</div><div class='add'>+	ret = __mxl86110_write_extended_reg(phydev, regnum, val);</div><div class='add'>+	phy_unlock_mdio_bus(phydev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86110_read_extended_reg() - Read a PHY's extended register</div><div class='add'>+ * @phydev: pointer to the PHY device structure</div><div class='add'>+ * @regnum: extended register number to read</div><div class='add'>+ *</div><div class='add'>+ * This function reads from an extended register of the PHY using the</div><div class='add'>+ * MaxLinear two-step access method (reg 0x1E/0x1F). It handles acquiring</div><div class='add'>+ * and releasing the MDIO bus lock internally.</div><div class='add'>+ *</div><div class='add'>+ * Return: 16-bit register value on success, or negative errno code on failure</div><div class='add'>+ */</div><div class='add'>+static int mxl86110_read_extended_reg(struct phy_device *phydev, u16 regnum)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	phy_lock_mdio_bus(phydev);</div><div class='add'>+	ret = __mxl86110_read_extended_reg(phydev, regnum);</div><div class='add'>+	phy_unlock_mdio_bus(phydev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86110_modify_extended_reg() - modify bits of a PHY's extended register</div><div class='add'>+ * @phydev: pointer to the PHY device structure</div><div class='add'>+ * @regnum: register number to write</div><div class='add'>+ * @mask: bit mask of bits to clear</div><div class='add'>+ * @set: bit mask of bits to set</div><div class='add'>+ *</div><div class='add'>+ * Note: register value = (old register value &amp; ~mask) | set.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative error code</div><div class='add'>+ */</div><div class='add'>+static int mxl86110_modify_extended_reg(struct phy_device *phydev,</div><div class='add'>+					u16 regnum, u16 mask, u16 set)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	phy_lock_mdio_bus(phydev);</div><div class='add'>+	ret = __mxl86110_modify_extended_reg(phydev, regnum, mask, set);</div><div class='add'>+	phy_unlock_mdio_bus(phydev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86110_get_wol() - report if wake-on-lan is enabled</div><div class='add'>+ * @phydev: pointer to the phy_device</div><div class='add'>+ * @wol: a pointer to a &amp;struct ethtool_wolinfo</div><div class='add'>+ */</div><div class='add'>+static void mxl86110_get_wol(struct phy_device *phydev,</div><div class='add'>+			     struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	wol-&gt;supported = WAKE_MAGIC;</div><div class='add'>+	wol-&gt;wolopts = 0;</div><div class='add'>+	val = mxl86110_read_extended_reg(phydev, MXL86110_EXT_WOL_CFG_REG);</div><div class='add'>+	if (val &gt;= 0 &amp;&amp; (val &amp; MXL86110_WOL_CFG_WOL_MASK))</div><div class='add'>+		wol-&gt;wolopts |= WAKE_MAGIC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86110_set_wol() - enable/disable wake-on-lan</div><div class='add'>+ * @phydev: pointer to the phy_device</div><div class='add'>+ * @wol: a pointer to a &amp;struct ethtool_wolinfo</div><div class='add'>+ *</div><div class='add'>+ * Configures the WOL Magic Packet MAC</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative errno code</div><div class='add'>+ */</div><div class='add'>+static int mxl86110_set_wol(struct phy_device *phydev,</div><div class='add'>+			    struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	const unsigned char *mac;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	phy_lock_mdio_bus(phydev);</div><div class='add'>+</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_MAGIC) {</div><div class='add'>+		netdev = phydev-&gt;attached_dev;</div><div class='add'>+		if (!netdev) {</div><div class='add'>+			ret = -ENODEV;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Configure the MAC address of the WOL magic packet */</div><div class='add'>+		mac = netdev-&gt;dev_addr;</div><div class='add'>+		ret = __mxl86110_write_extended_reg(phydev,</div><div class='add'>+						    MXL86110_EXT_MAC_ADDR_CFG1,</div><div class='add'>+						    ((mac[0] &lt;&lt; 8) | mac[1]));</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		ret = __mxl86110_write_extended_reg(phydev,</div><div class='add'>+						    MXL86110_EXT_MAC_ADDR_CFG2,</div><div class='add'>+						    ((mac[2] &lt;&lt; 8) | mac[3]));</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		ret = __mxl86110_write_extended_reg(phydev,</div><div class='add'>+						    MXL86110_EXT_MAC_ADDR_CFG3,</div><div class='add'>+						    ((mac[4] &lt;&lt; 8) | mac[5]));</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		ret = __mxl86110_modify_extended_reg(phydev,</div><div class='add'>+						     MXL86110_EXT_WOL_CFG_REG,</div><div class='add'>+						     MXL86110_WOL_CFG_WOL_MASK,</div><div class='add'>+						     MXL86110_WOL_CFG_WOL_MASK);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* Enables Wake-on-LAN interrupt in the PHY. */</div><div class='add'>+		ret = __phy_modify(phydev, PHY_IRQ_ENABLE_REG, 0,</div><div class='add'>+				   PHY_IRQ_ENABLE_REG_WOL);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		phydev_dbg(phydev,</div><div class='add'>+			   "%s, MAC Addr: %02X:%02X:%02X:%02X:%02X:%02X\n",</div><div class='add'>+			   __func__,</div><div class='add'>+			   mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);</div><div class='add'>+	} else {</div><div class='add'>+		ret = __mxl86110_modify_extended_reg(phydev,</div><div class='add'>+						     MXL86110_EXT_WOL_CFG_REG,</div><div class='add'>+						     MXL86110_WOL_CFG_WOL_MASK,</div><div class='add'>+						     0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* Disables Wake-on-LAN interrupt in the PHY. */</div><div class='add'>+		ret = __phy_modify(phydev, PHY_IRQ_ENABLE_REG,</div><div class='add'>+				   PHY_IRQ_ENABLE_REG_WOL, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	phy_unlock_mdio_bus(phydev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const unsigned long supported_trgs = (BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_LINK_1000) |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_HALF_DUPLEX) |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_FULL_DUPLEX) |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_TX) |</div><div class='add'>+					     BIT(TRIGGER_NETDEV_RX));</div><div class='add'>+</div><div class='add'>+static int mxl86110_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='add'>+					unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	if (index &gt;= MXL86110_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* All combinations of the supported triggers are allowed */</div><div class='add'>+	if (rules &amp; ~supported_trgs)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mxl86110_led_hw_control_get(struct phy_device *phydev, u8 index,</div><div class='add'>+				       unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= MXL86110_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = mxl86110_read_extended_reg(phydev,</div><div class='add'>+					 MXL86110_LED0_CFG_REG + index);</div><div class='add'>+	if (val &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+</div><div class='add'>+	if (val &amp; MXL86110_LEDX_CFG_LINK_UP_TX_ACT_ON)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_TX);</div><div class='add'>+</div><div class='add'>+	if (val &amp; MXL86110_LEDX_CFG_LINK_UP_RX_ACT_ON)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_RX);</div><div class='add'>+</div><div class='add'>+	if (val &amp; MXL86110_LEDX_CFG_LINK_UP_HALF_DUPLEX_ON)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_HALF_DUPLEX);</div><div class='add'>+</div><div class='add'>+	if (val &amp; MXL86110_LEDX_CFG_LINK_UP_FULL_DUPLEX_ON)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_FULL_DUPLEX);</div><div class='add'>+</div><div class='add'>+	if (val &amp; MXL86110_LEDX_CFG_LINK_UP_10MB_ON)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_LINK_10);</div><div class='add'>+</div><div class='add'>+	if (val &amp; MXL86110_LEDX_CFG_LINK_UP_100MB_ON)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_LINK_100);</div><div class='add'>+</div><div class='add'>+	if (val &amp; MXL86110_LEDX_CFG_LINK_UP_1GB_ON)</div><div class='add'>+		*rules |= BIT(TRIGGER_NETDEV_LINK_1000);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mxl86110_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='add'>+				       unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= MXL86110_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_LINK_10))</div><div class='add'>+		val |= MXL86110_LEDX_CFG_LINK_UP_10MB_ON;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_LINK_100))</div><div class='add'>+		val |= MXL86110_LEDX_CFG_LINK_UP_100MB_ON;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_LINK_1000))</div><div class='add'>+		val |= MXL86110_LEDX_CFG_LINK_UP_1GB_ON;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_TX))</div><div class='add'>+		val |= MXL86110_LEDX_CFG_LINK_UP_TX_ACT_ON;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_RX))</div><div class='add'>+		val |= MXL86110_LEDX_CFG_LINK_UP_RX_ACT_ON;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_HALF_DUPLEX))</div><div class='add'>+		val |= MXL86110_LEDX_CFG_LINK_UP_HALF_DUPLEX_ON;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_FULL_DUPLEX))</div><div class='add'>+		val |= MXL86110_LEDX_CFG_LINK_UP_FULL_DUPLEX_ON;</div><div class='add'>+</div><div class='add'>+	if (rules &amp; BIT(TRIGGER_NETDEV_TX) ||</div><div class='add'>+	    rules &amp; BIT(TRIGGER_NETDEV_RX))</div><div class='add'>+		val |= MXL86110_LEDX_CFG_BLINK;</div><div class='add'>+</div><div class='add'>+	ret = mxl86110_write_extended_reg(phydev,</div><div class='add'>+					  MXL86110_LED0_CFG_REG + index, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* clear manual control bit */</div><div class='add'>+	ret = mxl86110_modify_extended_reg(phydev,</div><div class='add'>+					   MXL86110_COM_EXT_LED_GEN_CFG,</div><div class='add'>+					   MXL86110_COM_EXT_LED_GEN_CFG_LFE(index),</div><div class='add'>+					   0);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mxl86110_led_brightness_set(struct phy_device *phydev,</div><div class='add'>+				       u8 index, enum led_brightness value)</div><div class='add'>+{</div><div class='add'>+	u16 mask, set;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= MXL86110_MAX_LEDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* force manual control */</div><div class='add'>+	set = MXL86110_COM_EXT_LED_GEN_CFG_LFE(index);</div><div class='add'>+	/* clear previous force mode */</div><div class='add'>+	mask = MXL86110_COM_EXT_LED_GEN_CFG_LFM(index);</div><div class='add'>+</div><div class='add'>+	/* force LED to be permanently on */</div><div class='add'>+	if (value != LED_OFF)</div><div class='add'>+		set |= MXL86110_COM_EXT_LED_GEN_CFG_LFME(index);</div><div class='add'>+</div><div class='add'>+	ret = mxl86110_modify_extended_reg(phydev,</div><div class='add'>+					   MXL86110_COM_EXT_LED_GEN_CFG,</div><div class='add'>+					   mask, set);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86110_synce_clk_cfg() - applies syncE/clk output configuration</div><div class='add'>+ * @phydev: pointer to the phy_device</div><div class='add'>+ *</div><div class='add'>+ * Note: This function assumes the caller already holds the MDIO bus lock</div><div class='add'>+ * or otherwise has exclusive access to the PHY.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative errno code</div><div class='add'>+ */</div><div class='add'>+static int mxl86110_synce_clk_cfg(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	u16 mask = 0, val = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Configures the clock output to its default</div><div class='add'>+	 * setting as per the datasheet.</div><div class='add'>+	 * This results in a 25MHz clock output being selected in the</div><div class='add'>+	 * COM_EXT_SYNCE_CFG register for SyncE configuration.</div><div class='add'>+	 */</div><div class='add'>+	val = MXL86110_EXT_SYNCE_CFG_EN_SYNC_E |</div><div class='add'>+			FIELD_PREP(MXL86110_EXT_SYNCE_CFG_CLK_SRC_SEL_MASK,</div><div class='add'>+				   MXL86110_EXT_SYNCE_CFG_CLK_SRC_SEL_25M);</div><div class='add'>+	mask = MXL86110_EXT_SYNCE_CFG_EN_SYNC_E |</div><div class='add'>+	       MXL86110_EXT_SYNCE_CFG_CLK_SRC_SEL_MASK |</div><div class='add'>+	       MXL86110_EXT_SYNCE_CFG_CLK_FRE_SEL;</div><div class='add'>+</div><div class='add'>+	/* Write clock output configuration */</div><div class='add'>+	return __mxl86110_modify_extended_reg(phydev,</div><div class='add'>+					      MXL86110_EXT_SYNCE_CFG_REG,</div><div class='add'>+					      mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86110_broadcast_cfg - Configure MDIO broadcast setting for PHY</div><div class='add'>+ * @phydev: Pointer to the PHY device structure</div><div class='add'>+ *</div><div class='add'>+ * This function configures the MDIO broadcast behavior of the MxL86110 PHY.</div><div class='add'>+ * Currently, broadcast mode is explicitly disabled by clearing the EPA0 bit</div><div class='add'>+ * in the RGMII_MDIO_CFG extended register.</div><div class='add'>+ *</div><div class='add'>+ * Note: This function assumes the caller already holds the MDIO bus lock</div><div class='add'>+ * or otherwise has exclusive access to the PHY.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative errno code on failure.</div><div class='add'>+ */</div><div class='add'>+static int mxl86110_broadcast_cfg(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return __mxl86110_modify_extended_reg(phydev,</div><div class='add'>+					      MXL86110_EXT_RGMII_MDIO_CFG,</div><div class='add'>+					      MXL86110_RGMII_MDIO_CFG_EPA0_MASK,</div><div class='add'>+					      0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86110_enable_led_activity_blink - Enable LEDs activity blink on PHY</div><div class='add'>+ * @phydev: Pointer to the PHY device structure</div><div class='add'>+ *</div><div class='add'>+ * Configure all PHY LEDs to blink on traffic activity regardless of whether</div><div class='add'>+ * they are ON or OFF. This behavior allows each LED to serve as a pure activity</div><div class='add'>+ * indicator, independently of its use as a link status indicator.</div><div class='add'>+ *</div><div class='add'>+ * By default, each LED blinks only when it is also in the ON state.</div><div class='add'>+ * This function modifies the appropriate registers (LABx fields)</div><div class='add'>+ * to enable blinking even when the LEDs are OFF, to allow the LED to be used</div><div class='add'>+ * as a traffic indicator without requiring it to also serve</div><div class='add'>+ * as a link status LED.</div><div class='add'>+ *</div><div class='add'>+ * Note: Any further LED customization can be performed via the</div><div class='add'>+ * /sys/class/leds interface; the functions led_hw_is_supported,</div><div class='add'>+ * led_hw_control_get, and led_hw_control_set are used</div><div class='add'>+ * to support this mechanism.</div><div class='add'>+ *</div><div class='add'>+ * This function assumes the caller already holds the MDIO bus lock</div><div class='add'>+ * or otherwise has exclusive access to the PHY.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative errno code on failure.</div><div class='add'>+ */</div><div class='add'>+static int mxl86110_enable_led_activity_blink(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MXL86110_MAX_LEDS; i++) {</div><div class='add'>+		ret = __mxl86110_modify_extended_reg(phydev,</div><div class='add'>+						     MXL86110_LED0_CFG_REG + i,</div><div class='add'>+						     0,</div><div class='add'>+						     MXL86110_LEDX_CFG_BLINK);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86110_config_rgmii_delay() - configure RGMII delays</div><div class='add'>+ * @phydev: pointer to the phy_device</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative errno code</div><div class='add'>+ */</div><div class='add'>+static int mxl86110_config_rgmii_delay(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	switch (phydev-&gt;interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+		val = 0;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		val = MXL86110_EXT_RGMII_CFG1_RX_DELAY_1950PS;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		val = MXL86110_EXT_RGMII_CFG1_TX_1G_DELAY_1950PS |</div><div class='add'>+			MXL86110_EXT_RGMII_CFG1_TX_10MB_100MB_DELAY_1950PS;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+		val = MXL86110_EXT_RGMII_CFG1_TX_1G_DELAY_1950PS |</div><div class='add'>+			MXL86110_EXT_RGMII_CFG1_TX_10MB_100MB_DELAY_1950PS |</div><div class='add'>+			MXL86110_EXT_RGMII_CFG1_RX_DELAY_1950PS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = __mxl86110_modify_extended_reg(phydev,</div><div class='add'>+					     MXL86110_EXT_RGMII_CFG1_REG,</div><div class='add'>+					     MXL86110_EXT_RGMII_CFG1_FULL_MASK,</div><div class='add'>+					     val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Configure RXDLY (RGMII Rx Clock Delay) to disable</div><div class='add'>+	 * the default additional delay value on RX_CLK</div><div class='add'>+	 * (2 ns for 125 MHz, 8 ns for 25 MHz/2.5 MHz)</div><div class='add'>+	 * and use just the digital one selected before</div><div class='add'>+	 */</div><div class='add'>+	ret = __mxl86110_modify_extended_reg(phydev,</div><div class='add'>+					     MXL86110_EXT_CHIP_CFG_REG,</div><div class='add'>+					     MXL86110_EXT_CHIP_CFG_RXDLY_ENABLE,</div><div class='add'>+					     0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86110_config_init() - initialize the MXL86110 PHY</div><div class='add'>+ * @phydev: pointer to the phy_device</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative errno code</div><div class='add'>+ */</div><div class='add'>+static int mxl86110_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	phy_lock_mdio_bus(phydev);</div><div class='add'>+</div><div class='add'>+	/* configure syncE / clk output */</div><div class='add'>+	ret = mxl86110_synce_clk_cfg(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = mxl86110_config_rgmii_delay(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = mxl86110_enable_led_activity_blink(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = mxl86110_broadcast_cfg(phydev);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	phy_unlock_mdio_bus(phydev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86111_probe() - validate bootstrap chip config and set UTP page</div><div class='add'>+ * @phydev: pointer to the phy_device</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative errno code</div><div class='add'>+ */</div><div class='add'>+static int mxl86111_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int chip_config;</div><div class='add'>+	u16 reg_page;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	chip_config = mxl86110_read_extended_reg(phydev, MXL86110_EXT_CHIP_CFG_REG);</div><div class='add'>+	if (chip_config &lt; 0)</div><div class='add'>+		return chip_config;</div><div class='add'>+</div><div class='add'>+	switch (chip_config &amp; MXL86111_EXT_CHIP_CFG_MODE_SEL_MASK) {</div><div class='add'>+	case MXL86111_EXT_CHIP_CFG_MODE_UTP_TO_SGMII:</div><div class='add'>+	case MXL86111_EXT_CHIP_CFG_MODE_UTP_TO_RGMII:</div><div class='add'>+		phydev-&gt;port = PORT_TP;</div><div class='add'>+		reg_page = MXL86111_EXT_SMI_SDS_PHYUTP_SPACE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mxl86110_write_extended_reg(phydev,</div><div class='add'>+					  MXL86111_EXT_SMI_SDS_PHY_REG,</div><div class='add'>+					  reg_page);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86111_config_init() - initialize the MXL86111 PHY</div><div class='add'>+ * @phydev: pointer to the phy_device</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative errno code</div><div class='add'>+ */</div><div class='add'>+static int mxl86111_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	phy_lock_mdio_bus(phydev);</div><div class='add'>+</div><div class='add'>+	/* configure syncE / clk output */</div><div class='add'>+	ret = mxl86110_synce_clk_cfg(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	switch (phydev-&gt;interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_100BASEX:</div><div class='add'>+		ret = __mxl86110_modify_extended_reg(phydev,</div><div class='add'>+						     MXL86111_EXT_MISC_CONFIG_REG,</div><div class='add'>+						     MXL86111_EXT_MISC_CONFIG_FIB_SPEED_SEL,</div><div class='add'>+						     MXL86111_EXT_MISC_CONFIG_FIB_SPEED_SEL_100BX);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+		ret = __mxl86110_modify_extended_reg(phydev,</div><div class='add'>+						     MXL86111_EXT_MISC_CONFIG_REG,</div><div class='add'>+						     MXL86111_EXT_MISC_CONFIG_FIB_SPEED_SEL,</div><div class='add'>+						     MXL86111_EXT_MISC_CONFIG_FIB_SPEED_SEL_1000BX);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* RGMII modes */</div><div class='add'>+		ret = mxl86110_config_rgmii_delay(phydev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+		ret = __mxl86110_modify_extended_reg(phydev, MXL86110_EXT_RGMII_CFG1_REG,</div><div class='add'>+						     MXL86110_EXT_RGMII_CFG1_FULL_MASK, ret);</div><div class='add'>+</div><div class='add'>+		/* PL P1 requires optimized RGMII timing for 1.8V RGMII voltage</div><div class='add'>+		 */</div><div class='add'>+		ret = __mxl86110_read_extended_reg(phydev, 0xf);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		if (ret == MXL86111_PL_P1) {</div><div class='add'>+			ret = __mxl86110_read_extended_reg(phydev, MXL86110_EXT_CHIP_CFG_REG);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				goto out;</div><div class='add'>+</div><div class='add'>+			/* check if LDO is in 1.8V mode */</div><div class='add'>+			switch (FIELD_GET(MXL86111_EXT_CHIP_CFG_CLDO_MASK, ret)) {</div><div class='add'>+			case MXL86111_EXT_CHIP_CFG_CLDO_1V8_3:</div><div class='add'>+			case MXL86111_EXT_CHIP_CFG_CLDO_1V8_2:</div><div class='add'>+				ret = __mxl86110_write_extended_reg(phydev, 0xa010, 0xabff);</div><div class='add'>+				if (ret &lt; 0)</div><div class='add'>+					goto out;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mxl86110_enable_led_activity_blink(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = mxl86110_broadcast_cfg(phydev);</div><div class='add'>+out:</div><div class='add'>+	phy_unlock_mdio_bus(phydev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86111_read_page() - read reg page</div><div class='add'>+ * @phydev: pointer to the phy_device</div><div class='add'>+ *</div><div class='add'>+ * Return: current reg space of mxl86111 or negative errno code</div><div class='add'>+ */</div><div class='add'>+static int mxl86111_read_page(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int page;</div><div class='add'>+</div><div class='add'>+	page = __mxl86110_read_extended_reg(phydev, MXL86111_EXT_SMI_SDS_PHY_REG);</div><div class='add'>+	if (page &lt; 0)</div><div class='add'>+		return page;</div><div class='add'>+</div><div class='add'>+	return page &amp; MXL86111_EXT_SMI_SDS_PHYSPACE_MASK;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mxl86111_write_page() - Set reg page</div><div class='add'>+ * @phydev: pointer to the phy_device</div><div class='add'>+ * @page: The reg page to set</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 or negative errno code</div><div class='add'>+ */</div><div class='add'>+static int mxl86111_write_page(struct phy_device *phydev, int page)</div><div class='add'>+{</div><div class='add'>+	return __mxl86110_modify_extended_reg(phydev, MXL86111_EXT_SMI_SDS_PHY_REG,</div><div class='add'>+					      MXL86111_EXT_SMI_SDS_PHYSPACE_MASK, page);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mxl86111_config_inband(struct phy_device *phydev, unsigned int modes)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_modify_paged(phydev, MXL86111_EXT_SMI_SDS_PHYFIBER_SPACE,</div><div class='add'>+			       MII_BMCR, BMCR_ANENABLE,</div><div class='add'>+			       (modes == LINK_INBAND_DISABLE) ? 0 : BMCR_ANENABLE);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	phy_lock_mdio_bus(phydev);</div><div class='add'>+</div><div class='add'>+	ret = __mxl86110_modify_extended_reg(phydev, MXL86111_EXT_SDS_LINK_TIMER_CFG2_REG,</div><div class='add'>+					     MXL86111_EXT_SDS_LINK_TIMER_CFG2_EN_AUTOSEN,</div><div class='add'>+					     (modes == LINK_INBAND_DISABLE) ? 0 :</div><div class='add'>+					     MXL86111_EXT_SDS_LINK_TIMER_CFG2_EN_AUTOSEN);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = __mxl86110_modify_extended_reg(phydev, MXL86110_EXT_CHIP_CFG_REG,</div><div class='add'>+					     MXL86110_EXT_CHIP_CFG_SW_RST_N_MODE, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* For fiber forced mode, power down/up to re-aneg */</div><div class='add'>+	if (modes != LINK_INBAND_DISABLE) {</div><div class='add'>+		__phy_modify(phydev, MII_BMCR, 0, BMCR_PDOWN);</div><div class='add'>+		usleep_range(1000, 1050);</div><div class='add'>+		__phy_modify(phydev, MII_BMCR, BMCR_PDOWN, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	phy_unlock_mdio_bus(phydev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int mxl86111_inband_caps(struct phy_device *phydev,</div><div class='add'>+					 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_100BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+		return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phy_driver mxl_phy_drvs[] = {</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_MXL86110),</div><div class='add'>+		.name			= "MXL86110 Gigabit Ethernet",</div><div class='add'>+		.config_init		= mxl86110_config_init,</div><div class='add'>+		.get_wol		= mxl86110_get_wol,</div><div class='add'>+		.set_wol		= mxl86110_set_wol,</div><div class='add'>+		.led_brightness_set	= mxl86110_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported	= mxl86110_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_get	= mxl86110_led_hw_control_get,</div><div class='add'>+		.led_hw_control_set	= mxl86110_led_hw_control_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_EXACT(PHY_ID_MXL86111),</div><div class='add'>+		.name			= "MXL86111 Gigabit Ethernet",</div><div class='add'>+		.probe			= mxl86111_probe,</div><div class='add'>+		.config_init		= mxl86111_config_init,</div><div class='add'>+		.get_wol		= mxl86110_get_wol,</div><div class='add'>+		.set_wol		= mxl86110_set_wol,</div><div class='add'>+		.inband_caps		= mxl86111_inband_caps,</div><div class='add'>+		.config_inband		= mxl86111_config_inband,</div><div class='add'>+		.read_page		= mxl86111_read_page,</div><div class='add'>+		.write_page		= mxl86111_write_page,</div><div class='add'>+		.led_brightness_set	= mxl86110_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported	= mxl86110_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_get	= mxl86110_led_hw_control_get,</div><div class='add'>+		.led_hw_control_set	= mxl86110_led_hw_control_set,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_phy_driver(mxl_phy_drvs);</div><div class='add'>+</div><div class='add'>+static const struct mdio_device_id __maybe_unused mxl_tbl[] = {</div><div class='add'>+	{ PHY_ID_MATCH_EXACT(PHY_ID_MXL86110) },</div><div class='add'>+	{ PHY_ID_MATCH_EXACT(PHY_ID_MXL86111) },</div><div class='add'>+	{  }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(mdio, mxl_tbl);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("MaxLinear MXL86110/MXL86111 PHY driver");</div><div class='add'>+MODULE_AUTHOR("Stefano Radaelli");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/phy/mxl-gpy.c b/drivers/net/phy/mxl-gpy.c<br/>index db3c1f72b407..8e2fd6b942b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mxl-gpy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/mxl-gpy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/mxl-gpy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/mxl-gpy.c</a></div><div class='hunk'>@@ -30,6 +30,9 @@</div><div class='ctx'> #define PHY_ID_GPY241B		0x67C9DE40</div><div class='ctx'> #define PHY_ID_GPY241BM		0x67C9DE80</div><div class='ctx'> #define PHY_ID_GPY245B		0x67C9DEC0</div><div class='add'>+#define PHY_ID_MXL86211C	0xC1335400</div><div class='add'>+#define PHY_ID_MXL86252		0xC1335520</div><div class='add'>+#define PHY_ID_MXL86282		0xC1335500</div><div class='ctx'> </div><div class='ctx'> #define PHY_CTL1		0x13</div><div class='ctx'> #define PHY_CTL1_MDICD		BIT(3)</div><div class='hunk'>@@ -199,6 +202,29 @@ static int gpy_hwmon_read(struct device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mxl862x2_hwmon_read(struct device *dev,</div><div class='add'>+			       enum hwmon_sensor_types type,</div><div class='add'>+			       u32 attr, int channel, long *value)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = dev_get_drvdata(dev);</div><div class='add'>+	long tmp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_TEMP_STA);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	if (!ret)</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	tmp = (s16)ret;</div><div class='add'>+	tmp *= 78125;</div><div class='add'>+	tmp /= 10000;</div><div class='add'>+</div><div class='add'>+	*value = tmp;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static umode_t gpy_hwmon_is_visible(const void *data,</div><div class='ctx'> 				    enum hwmon_sensor_types type,</div><div class='ctx'> 				    u32 attr, int channel)</div><div class='hunk'>@@ -216,25 +242,35 @@ static const struct hwmon_ops gpy_hwmon_hwmon_ops = {</div><div class='ctx'> 	.read		= gpy_hwmon_read,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct hwmon_ops mxl862x2_hwmon_hwmon_ops = {</div><div class='add'>+	.is_visible	= gpy_hwmon_is_visible,</div><div class='add'>+	.read		= mxl862x2_hwmon_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct hwmon_chip_info gpy_hwmon_chip_info = {</div><div class='ctx'> 	.ops		= &amp;gpy_hwmon_hwmon_ops,</div><div class='ctx'> 	.info		= gpy_hwmon_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct hwmon_chip_info mxl862x2_hwmon_chip_info = {</div><div class='add'>+	.ops		= &amp;mxl862x2_hwmon_hwmon_ops,</div><div class='add'>+	.info		= gpy_hwmon_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int gpy_hwmon_register(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='add'>+	const struct hwmon_chip_info *info;</div><div class='ctx'> 	struct device *hwmon_dev;</div><div class='del'>-	char *hwmon_name;</div><div class='ctx'> </div><div class='del'>-	hwmon_name = devm_hwmon_sanitize_name(dev, dev_name(dev));</div><div class='del'>-	if (IS_ERR(hwmon_name))</div><div class='del'>-		return PTR_ERR(hwmon_name);</div><div class='add'>+	if (phy_id_compare_model(phydev-&gt;phy_id, PHY_ID_MXL86252) ||</div><div class='add'>+	    phy_id_compare_model(phydev-&gt;phy_id, PHY_ID_MXL86282))</div><div class='add'>+		info = &amp;mxl862x2_hwmon_chip_info;</div><div class='add'>+	else</div><div class='add'>+		info = &amp;gpy_hwmon_chip_info;</div><div class='ctx'> </div><div class='del'>-	hwmon_dev = devm_hwmon_device_register_with_info(dev, hwmon_name,</div><div class='del'>-							 phydev,</div><div class='del'>-							 &amp;gpy_hwmon_chip_info,</div><div class='del'>-							 NULL);</div><div class='add'>+	hwmon_dev = devm_hwmon_device_register_with_info(dev, NULL, phydev,</div><div class='add'>+							 info, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return PTR_ERR_OR_ZERO(hwmon_dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -546,7 +582,7 @@ static int gpy_update_interface(struct phy_device *phydev)</div><div class='ctx'> 	/* Interface mode is fixed for USXGMII and integrated PHY */</div><div class='ctx'> 	if (phydev-&gt;interface == PHY_INTERFACE_MODE_USXGMII ||</div><div class='ctx'> 	    phydev-&gt;interface == PHY_INTERFACE_MODE_INTERNAL)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Automatically switch SERDES interface between SGMII and 2500-BaseX</div><div class='ctx'> 	 * according to speed. Disable ANEG in 2500-BaseX mode.</div><div class='hunk'>@@ -584,13 +620,7 @@ static int gpy_update_interface(struct phy_device *phydev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (phydev-&gt;speed == SPEED_2500 || phydev-&gt;speed == SPEED_1000) {</div><div class='del'>-		ret = genphy_read_master_slave(phydev);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return gpy_update_mdix(phydev);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gpy_read_status(struct phy_device *phydev)</div><div class='hunk'>@@ -645,6 +675,16 @@ static int gpy_read_status(struct phy_device *phydev)</div><div class='ctx'> 		ret = gpy_update_interface(phydev);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='add'>+</div><div class='add'>+		if (phydev-&gt;speed == SPEED_2500 || phydev-&gt;speed == SPEED_1000) {</div><div class='add'>+			ret = genphy_read_master_slave(phydev);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = gpy_update_mdix(phydev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -813,7 +853,7 @@ static void gpy_get_wol(struct phy_device *phydev,</div><div class='ctx'> 	wol-&gt;wolopts = priv-&gt;wolopts;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gpy_loopback(struct phy_device *phydev, bool enable)</div><div class='add'>+static int gpy_loopback(struct phy_device *phydev, bool enable, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpy_priv *priv = phydev-&gt;priv;</div><div class='ctx'> 	u16 set = 0;</div><div class='hunk'>@@ -822,6 +862,9 @@ static int gpy_loopback(struct phy_device *phydev, bool enable)</div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		u64 now = get_jiffies_64();</div><div class='ctx'> </div><div class='add'>+		if (speed)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 		/* wait until 3 seconds from last disable */</div><div class='ctx'> 		if (time_before64(now, priv-&gt;lb_dis_to))</div><div class='ctx'> 			msleep(jiffies64_to_msecs(priv-&gt;lb_dis_to - now));</div><div class='hunk'>@@ -845,15 +888,15 @@ static int gpy_loopback(struct phy_device *phydev, bool enable)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gpy115_loopback(struct phy_device *phydev, bool enable)</div><div class='add'>+static int gpy115_loopback(struct phy_device *phydev, bool enable, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct gpy_priv *priv = phydev-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	if (enable)</div><div class='del'>-		return gpy_loopback(phydev, enable);</div><div class='add'>+		return gpy_loopback(phydev, enable, speed);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;fw_minor &gt; 0x76)</div><div class='del'>-		return gpy_loopback(phydev, 0);</div><div class='add'>+		return gpy_loopback(phydev, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	return genphy_soft_reset(phydev);</div><div class='ctx'> }</div><div class='hunk'>@@ -1014,7 +1057,7 @@ static int gpy_led_polarity_set(struct phy_device *phydev, int index,</div><div class='ctx'> 	if (force_active_high)</div><div class='ctx'> 		return phy_clear_bits(phydev, PHY_LED, PHY_LED_POLARITY(index));</div><div class='ctx'> </div><div class='del'>-	unreachable();</div><div class='add'>+	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct phy_driver gpy_drivers[] = {</div><div class='hunk'>@@ -1271,10 +1314,76 @@ static struct phy_driver gpy_drivers[] = {</div><div class='ctx'> 		.get_wol	= gpy_get_wol,</div><div class='ctx'> 		.set_loopback	= gpy_loopback,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_MODEL(PHY_ID_MXL86211C),</div><div class='add'>+		.name		= "Maxlinear Ethernet MxL86211C",</div><div class='add'>+		.get_features	= genphy_c45_pma_read_abilities,</div><div class='add'>+		.config_init	= gpy_config_init,</div><div class='add'>+		.probe		= gpy_probe,</div><div class='add'>+		.suspend	= genphy_suspend,</div><div class='add'>+		.resume		= genphy_resume,</div><div class='add'>+		.config_aneg	= gpy_config_aneg,</div><div class='add'>+		.aneg_done	= genphy_c45_aneg_done,</div><div class='add'>+		.read_status	= gpy_read_status,</div><div class='add'>+		.config_intr	= gpy_config_intr,</div><div class='add'>+		.handle_interrupt = gpy_handle_interrupt,</div><div class='add'>+		.set_wol	= gpy_set_wol,</div><div class='add'>+		.get_wol	= gpy_get_wol,</div><div class='add'>+		.set_loopback	= gpy_loopback,</div><div class='add'>+		.led_brightness_set = gpy_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = gpy_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_get = gpy_led_hw_control_get,</div><div class='add'>+		.led_hw_control_set = gpy_led_hw_control_set,</div><div class='add'>+		.led_polarity_set = gpy_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_MODEL(PHY_ID_MXL86252),</div><div class='add'>+		.name		= "MaxLinear Ethernet MxL86252",</div><div class='add'>+		.get_features	= genphy_c45_pma_read_abilities,</div><div class='add'>+		.config_init	= gpy_config_init,</div><div class='add'>+		.probe		= gpy_probe,</div><div class='add'>+		.suspend	= genphy_suspend,</div><div class='add'>+		.resume		= genphy_resume,</div><div class='add'>+		.config_aneg	= gpy_config_aneg,</div><div class='add'>+		.aneg_done	= genphy_c45_aneg_done,</div><div class='add'>+		.read_status	= gpy_read_status,</div><div class='add'>+		.config_intr	= gpy_config_intr,</div><div class='add'>+		.handle_interrupt = gpy_handle_interrupt,</div><div class='add'>+		.set_wol	= gpy_set_wol,</div><div class='add'>+		.get_wol	= gpy_get_wol,</div><div class='add'>+		.set_loopback	= gpy_loopback,</div><div class='add'>+		.led_brightness_set = gpy_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = gpy_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_get = gpy_led_hw_control_get,</div><div class='add'>+		.led_hw_control_set = gpy_led_hw_control_set,</div><div class='add'>+		.led_polarity_set = gpy_led_polarity_set,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_MODEL(PHY_ID_MXL86282),</div><div class='add'>+		.name		= "MaxLinear Ethernet MxL86282",</div><div class='add'>+		.get_features	= genphy_c45_pma_read_abilities,</div><div class='add'>+		.config_init	= gpy_config_init,</div><div class='add'>+		.probe		= gpy_probe,</div><div class='add'>+		.suspend	= genphy_suspend,</div><div class='add'>+		.resume		= genphy_resume,</div><div class='add'>+		.config_aneg	= gpy_config_aneg,</div><div class='add'>+		.aneg_done	= genphy_c45_aneg_done,</div><div class='add'>+		.read_status	= gpy_read_status,</div><div class='add'>+		.config_intr	= gpy_config_intr,</div><div class='add'>+		.handle_interrupt = gpy_handle_interrupt,</div><div class='add'>+		.set_wol	= gpy_set_wol,</div><div class='add'>+		.get_wol	= gpy_get_wol,</div><div class='add'>+		.set_loopback	= gpy_loopback,</div><div class='add'>+		.led_brightness_set = gpy_led_brightness_set,</div><div class='add'>+		.led_hw_is_supported = gpy_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_get = gpy_led_hw_control_get,</div><div class='add'>+		.led_hw_control_set = gpy_led_hw_control_set,</div><div class='add'>+		.led_polarity_set = gpy_led_polarity_set,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> module_phy_driver(gpy_drivers);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused gpy_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused gpy_tbl[] = {</div><div class='ctx'> 	{PHY_ID_MATCH_MODEL(PHY_ID_GPY2xx)},</div><div class='ctx'> 	{PHY_ID_GPY115B, PHY_ID_GPYx15B_MASK},</div><div class='ctx'> 	{PHY_ID_MATCH_MODEL(PHY_ID_GPY115C)},</div><div class='hunk'>@@ -1287,6 +1396,9 @@ static struct mdio_device_id __maybe_unused gpy_tbl[] = {</div><div class='ctx'> 	{PHY_ID_MATCH_MODEL(PHY_ID_GPY241B)},</div><div class='ctx'> 	{PHY_ID_MATCH_MODEL(PHY_ID_GPY241BM)},</div><div class='ctx'> 	{PHY_ID_MATCH_MODEL(PHY_ID_GPY245B)},</div><div class='add'>+	{PHY_ID_MATCH_MODEL(PHY_ID_MXL86211C)},</div><div class='add'>+	{PHY_ID_MATCH_MODEL(PHY_ID_MXL86252)},</div><div class='add'>+	{PHY_ID_MATCH_MODEL(PHY_ID_MXL86282)},</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(mdio, gpy_tbl);</div><div class='head'>diff --git a/drivers/net/phy/national.c b/drivers/net/phy/national.c<br/>index 9ae9cc6b23c2..7f3ff322892e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/national.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/national.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/national.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/national.c</a></div><div class='hunk'>@@ -173,7 +173,7 @@ MODULE_DESCRIPTION("NatSemi PHY driver");</div><div class='ctx'> MODULE_AUTHOR("Stuart Menefy");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused ns_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused ns_tbl[] = {</div><div class='ctx'> 	{ DP83865_PHY_ID, 0xfffffff0 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/ncn26000.c b/drivers/net/phy/ncn26000.c<br/>index 5680584f659e..cabdd83c614f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/ncn26000.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/ncn26000.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/ncn26000.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/ncn26000.c</a></div><div class='hunk'>@@ -159,7 +159,7 @@ static struct phy_driver ncn26000_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(ncn26000_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused ncn26000_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused ncn26000_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_NCN26000) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/nxp-c45-tja11xx-macsec.c b/drivers/net/phy/nxp-c45-tja11xx-macsec.c<br/>index 550ef08970f4..fc897ba79b03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/nxp-c45-tja11xx-macsec.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/nxp-c45-tja11xx-macsec.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/nxp-c45-tja11xx-macsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/nxp-c45-tja11xx-macsec.c</a></div><div class='hunk'>@@ -926,7 +926,6 @@ static int nxp_c45_mdo_dev_open(struct macsec_context *ctx)</div><div class='ctx'> 	struct phy_device *phydev = ctx-&gt;phydev;</div><div class='ctx'> 	struct nxp_c45_phy *priv = phydev-&gt;priv;</div><div class='ctx'> 	struct nxp_c45_secy *phy_secy;</div><div class='del'>-	int any_bit_set;</div><div class='ctx'> </div><div class='ctx'> 	phy_secy = nxp_c45_find_secy(&amp;priv-&gt;macsec-&gt;secy_list, ctx-&gt;secy-&gt;sci);</div><div class='ctx'> 	if (IS_ERR(phy_secy))</div><div class='hunk'>@@ -939,8 +938,7 @@ static int nxp_c45_mdo_dev_open(struct macsec_context *ctx)</div><div class='ctx'> 	if (phy_secy-&gt;rx_sc)</div><div class='ctx'> 		nxp_c45_rx_sc_en(phydev, phy_secy-&gt;rx_sc, true);</div><div class='ctx'> </div><div class='del'>-	any_bit_set = find_first_bit(priv-&gt;macsec-&gt;secy_bitmap, TX_SC_MAX);</div><div class='del'>-	if (any_bit_set == TX_SC_MAX)</div><div class='add'>+	if (bitmap_empty(priv-&gt;macsec-&gt;secy_bitmap, TX_SC_MAX))</div><div class='ctx'> 		nxp_c45_macsec_en(phydev, true);</div><div class='ctx'> </div><div class='ctx'> 	set_bit(phy_secy-&gt;secy_id, priv-&gt;macsec-&gt;secy_bitmap);</div><div class='hunk'>@@ -953,7 +951,6 @@ static int nxp_c45_mdo_dev_stop(struct macsec_context *ctx)</div><div class='ctx'> 	struct phy_device *phydev = ctx-&gt;phydev;</div><div class='ctx'> 	struct nxp_c45_phy *priv = phydev-&gt;priv;</div><div class='ctx'> 	struct nxp_c45_secy *phy_secy;</div><div class='del'>-	int any_bit_set;</div><div class='ctx'> </div><div class='ctx'> 	phy_secy = nxp_c45_find_secy(&amp;priv-&gt;macsec-&gt;secy_list, ctx-&gt;secy-&gt;sci);</div><div class='ctx'> 	if (IS_ERR(phy_secy))</div><div class='hunk'>@@ -967,8 +964,7 @@ static int nxp_c45_mdo_dev_stop(struct macsec_context *ctx)</div><div class='ctx'> 	nxp_c45_set_rx_sc0_impl(phydev, false);</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(phy_secy-&gt;secy_id, priv-&gt;macsec-&gt;secy_bitmap);</div><div class='del'>-	any_bit_set = find_first_bit(priv-&gt;macsec-&gt;secy_bitmap, TX_SC_MAX);</div><div class='del'>-	if (any_bit_set == TX_SC_MAX)</div><div class='add'>+	if (bitmap_empty(priv-&gt;macsec-&gt;secy_bitmap, TX_SC_MAX))</div><div class='ctx'> 		nxp_c45_macsec_en(phydev, false);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c<br/>index ade544bc007d..f526528d2e32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/nxp-c45-tja11xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/nxp-c45-tja11xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/nxp-c45-tja11xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/nxp-c45-tja11xx.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> // SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> /* NXP C45 PHY driver</div><div class='del'>- * Copyright 2021-2023 NXP</div><div class='add'>+ * Copyright 2021-2025 NXP</div><div class='ctx'>  * Author: Radu Pirea &lt;radu-nicolae.pirea@oss.nxp.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -19,9 +19,16 @@</div><div class='ctx'> </div><div class='ctx'> #include "nxp-c45-tja11xx.h"</div><div class='ctx'> </div><div class='add'>+/* Same id: TJA1103, TJA1104 */</div><div class='ctx'> #define PHY_ID_TJA_1103			0x001BB010</div><div class='add'>+/* Same id: TJA1120, TJA1121 */</div><div class='ctx'> #define PHY_ID_TJA_1120			0x001BB031</div><div class='ctx'> </div><div class='add'>+#define VEND1_DEVICE_ID3		0x0004</div><div class='add'>+#define TJA1120_DEV_ID3_SILICON_VERSION	GENMASK(15, 12)</div><div class='add'>+#define TJA1120_DEV_ID3_SAMPLE_TYPE	GENMASK(11, 8)</div><div class='add'>+#define DEVICE_ID3_SAMPLE_TYPE_R	0x9</div><div class='add'>+</div><div class='ctx'> #define VEND1_DEVICE_CONTROL		0x0040</div><div class='ctx'> #define DEVICE_CONTROL_RESET		BIT(15)</div><div class='ctx'> #define DEVICE_CONTROL_CONFIG_GLOBAL_EN	BIT(14)</div><div class='hunk'>@@ -109,6 +116,9 @@</div><div class='ctx'> #define MII_BASIC_CONFIG_RMII		0x5</div><div class='ctx'> #define MII_BASIC_CONFIG_MII		0x4</div><div class='ctx'> </div><div class='add'>+#define VEND1_SGMII_BASIC_CONTROL	0xB000</div><div class='add'>+#define SGMII_LPM			BIT(11)</div><div class='add'>+</div><div class='ctx'> #define VEND1_SYMBOL_ERROR_CNT_XTD	0x8351</div><div class='ctx'> #define EXTENDED_CNT_EN			BIT(15)</div><div class='ctx'> #define VEND1_MONITOR_STATUS		0xAC80</div><div class='hunk'>@@ -752,9 +762,6 @@ static int nxp_c45_perout_enable(struct nxp_c45_phy *priv,</div><div class='ctx'> 	struct phy_device *phydev = priv-&gt;phydev;</div><div class='ctx'> 	int pin;</div><div class='ctx'> </div><div class='del'>-	if (perout-&gt;flags &amp; ~PTP_PEROUT_PHASE)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	pin = ptp_find_pin(priv-&gt;ptp_clock, PTP_PF_PEROUT, perout-&gt;index);</div><div class='ctx'> 	if (pin &lt; 0)</div><div class='ctx'> 		return pin;</div><div class='hunk'>@@ -850,12 +857,6 @@ static int nxp_c45_extts_enable(struct nxp_c45_phy *priv,</div><div class='ctx'> 	const struct nxp_c45_phy_data *data = nxp_c45_get_data(priv-&gt;phydev);</div><div class='ctx'> 	int pin;</div><div class='ctx'> </div><div class='del'>-	if (extts-&gt;flags &amp; ~(PTP_ENABLE_FEATURE |</div><div class='del'>-			      PTP_RISING_EDGE |</div><div class='del'>-			      PTP_FALLING_EDGE |</div><div class='del'>-			      PTP_STRICT_FLAGS))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	/* Sampling on both edges is not supported */</div><div class='ctx'> 	if ((extts-&gt;flags &amp; PTP_RISING_EDGE) &amp;&amp;</div><div class='ctx'> 	    (extts-&gt;flags &amp; PTP_FALLING_EDGE) &amp;&amp;</div><div class='hunk'>@@ -951,6 +952,10 @@ static int nxp_c45_init_ptp_clock(struct nxp_c45_phy *priv)</div><div class='ctx'> 		.n_pins		= ARRAY_SIZE(nxp_c45_ptp_pins),</div><div class='ctx'> 		.n_ext_ts	= 1,</div><div class='ctx'> 		.n_per_out	= 1,</div><div class='add'>+		.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+					 PTP_FALLING_EDGE |</div><div class='add'>+					 PTP_STRICT_FLAGS,</div><div class='add'>+		.supported_perout_flags = PTP_PEROUT_PHASE,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;ptp_clock = ptp_clock_register(&amp;priv-&gt;caps,</div><div class='hunk'>@@ -1007,9 +1012,22 @@ static bool nxp_c45_rxtstamp(struct mii_timestamper *mii_ts,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int nxp_c45_hwtstamp(struct mii_timestamper *mii_ts,</div><div class='del'>-			    struct kernel_hwtstamp_config *cfg,</div><div class='del'>-			    struct netlink_ext_ack *extack)</div><div class='add'>+static int nxp_c45_hwtstamp_get(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='add'>+	struct nxp_c45_phy *priv = container_of(mii_ts, struct nxp_c45_phy,</div><div class='add'>+						mii_ts);</div><div class='add'>+</div><div class='add'>+	cfg-&gt;tx_type = priv-&gt;hwts_tx;</div><div class='add'>+	cfg-&gt;rx_filter = priv-&gt;hwts_rx ? HWTSTAMP_FILTER_PTP_V2_L2_EVENT</div><div class='add'>+				       : HWTSTAMP_FILTER_NONE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nxp_c45_hwtstamp_set(struct mii_timestamper *mii_ts,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct nxp_c45_phy *priv = container_of(mii_ts, struct nxp_c45_phy,</div><div class='ctx'> 						mii_ts);</div><div class='hunk'>@@ -1297,6 +1315,8 @@ static int nxp_c45_soft_reset(struct phy_device *phydev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	usleep_range(2000, 2050);</div><div class='add'>+</div><div class='ctx'> 	return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,</div><div class='ctx'> 					 VEND1_DEVICE_CONTROL, ret,</div><div class='ctx'> 					 !(ret &amp; DEVICE_CONTROL_RESET), 20000,</div><div class='hunk'>@@ -1591,6 +1611,63 @@ static int nxp_c45_set_phy_mode(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Errata: ES_TJA1120 and ES_TJA1121 Rev. 1.0 — 28 November 2024 Section 3.1 &amp; 3.2 */</div><div class='add'>+static void nxp_c45_tja1120_errata(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	bool macsec_ability, sgmii_ability;</div><div class='add'>+	int silicon_version, sample_type;</div><div class='add'>+	int phy_abilities;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_DEVICE_ID3);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	sample_type = FIELD_GET(TJA1120_DEV_ID3_SAMPLE_TYPE, ret);</div><div class='add'>+	if (sample_type != DEVICE_ID3_SAMPLE_TYPE_R)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	silicon_version = FIELD_GET(TJA1120_DEV_ID3_SILICON_VERSION, ret);</div><div class='add'>+</div><div class='add'>+	phy_abilities = phy_read_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+				     VEND1_PORT_ABILITIES);</div><div class='add'>+	macsec_ability = !!(phy_abilities &amp; MACSEC_ABILITY);</div><div class='add'>+	sgmii_ability = !!(phy_abilities &amp; SGMII_ABILITY);</div><div class='add'>+	if ((!macsec_ability &amp;&amp; silicon_version == 2) ||</div><div class='add'>+	    (macsec_ability &amp;&amp; silicon_version == 1)) {</div><div class='add'>+		/* TJA1120/TJA1121 PHY configuration errata workaround.</div><div class='add'>+		 * Apply PHY writes sequence before link up.</div><div class='add'>+		 */</div><div class='add'>+		if (!macsec_ability) {</div><div class='add'>+			phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 0x4b95);</div><div class='add'>+			phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 0xf3cd);</div><div class='add'>+		} else {</div><div class='add'>+			phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 0x89c7);</div><div class='add'>+			phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 0x0893);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x0476, 0x58a0);</div><div class='add'>+</div><div class='add'>+		phy_write_mmd(phydev, MDIO_MMD_PMAPMD, 0x8921, 0xa3a);</div><div class='add'>+		phy_write_mmd(phydev, MDIO_MMD_PMAPMD, 0x89F1, 0x16c1);</div><div class='add'>+</div><div class='add'>+		phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 0x0);</div><div class='add'>+		phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 0x0);</div><div class='add'>+</div><div class='add'>+		if (sgmii_ability) {</div><div class='add'>+			/* TJA1120B/TJA1121B SGMII PCS restart errata workaround.</div><div class='add'>+			 * Put SGMII PCS into power down mode and back up.</div><div class='add'>+			 */</div><div class='add'>+			phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+					 VEND1_SGMII_BASIC_CONTROL,</div><div class='add'>+					 SGMII_LPM);</div><div class='add'>+			phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+					   VEND1_SGMII_BASIC_CONTROL,</div><div class='add'>+					   SGMII_LPM);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int nxp_c45_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1607,6 +1684,9 @@ static int nxp_c45_config_init(struct phy_device *phydev)</div><div class='ctx'> 	phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F8, 1);</div><div class='ctx'> 	phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x01F9, 2);</div><div class='ctx'> </div><div class='add'>+	if (phy_id_compare(phydev-&gt;phy_id, PHY_ID_TJA_1120, GENMASK(31, 4)))</div><div class='add'>+		nxp_c45_tja1120_errata(phydev);</div><div class='add'>+</div><div class='ctx'> 	phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, VEND1_PHY_CONFIG,</div><div class='ctx'> 			 PHY_CONFIG_AUTO);</div><div class='ctx'> </div><div class='hunk'>@@ -1682,7 +1762,8 @@ static int nxp_c45_probe(struct phy_device *phydev)</div><div class='ctx'> 	    IS_ENABLED(CONFIG_NETWORK_PHY_TIMESTAMPING)) {</div><div class='ctx'> 		priv-&gt;mii_ts.rxtstamp = nxp_c45_rxtstamp;</div><div class='ctx'> 		priv-&gt;mii_ts.txtstamp = nxp_c45_txtstamp;</div><div class='del'>-		priv-&gt;mii_ts.hwtstamp = nxp_c45_hwtstamp;</div><div class='add'>+		priv-&gt;mii_ts.hwtstamp_set = nxp_c45_hwtstamp_set;</div><div class='add'>+		priv-&gt;mii_ts.hwtstamp_get = nxp_c45_hwtstamp_get;</div><div class='ctx'> 		priv-&gt;mii_ts.ts_info = nxp_c45_ts_info;</div><div class='ctx'> 		phydev-&gt;mii_ts = &amp;priv-&gt;mii_ts;</div><div class='ctx'> 		ret = nxp_c45_init_ptp_clock(priv);</div><div class='hunk'>@@ -1886,6 +1967,41 @@ static void tja1120_nmi_handler(struct phy_device *phydev,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int nxp_c45_macsec_ability(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	bool macsec_ability;</div><div class='add'>+	int phy_abilities;</div><div class='add'>+</div><div class='add'>+	phy_abilities = phy_read_mmd(phydev, MDIO_MMD_VEND1,</div><div class='add'>+				     VEND1_PORT_ABILITIES);</div><div class='add'>+	macsec_ability = !!(phy_abilities &amp; MACSEC_ABILITY);</div><div class='add'>+</div><div class='add'>+	return macsec_ability;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool tja11xx_phy_id_compare(struct phy_device *phydev,</div><div class='add'>+				   const struct phy_driver *phydrv)</div><div class='add'>+{</div><div class='add'>+	u32 id = phydev-&gt;is_c45 ? phydev-&gt;c45_ids.device_ids[MDIO_MMD_PMAPMD] :</div><div class='add'>+				  phydev-&gt;phy_id;</div><div class='add'>+</div><div class='add'>+	return phy_id_compare(id, phydrv-&gt;phy_id, phydrv-&gt;phy_id_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tja11xx_no_macsec_match_phy_device(struct phy_device *phydev,</div><div class='add'>+					      const struct phy_driver *phydrv)</div><div class='add'>+{</div><div class='add'>+	return tja11xx_phy_id_compare(phydev, phydrv) &amp;&amp;</div><div class='add'>+	       !nxp_c45_macsec_ability(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tja11xx_macsec_match_phy_device(struct phy_device *phydev,</div><div class='add'>+					   const struct phy_driver *phydrv)</div><div class='add'>+{</div><div class='add'>+	return tja11xx_phy_id_compare(phydev, phydrv) &amp;&amp;</div><div class='add'>+	       nxp_c45_macsec_ability(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct nxp_c45_regmap tja1120_regmap = {</div><div class='ctx'> 	.vend1_ptp_clk_period	= 0x1020,</div><div class='ctx'> 	.vend1_event_msg_filt	= 0x9010,</div><div class='hunk'>@@ -1978,6 +2094,32 @@ static struct phy_driver nxp_c45_driver[] = {</div><div class='ctx'> 		.get_sqi		= nxp_c45_get_sqi,</div><div class='ctx'> 		.get_sqi_max		= nxp_c45_get_sqi_max,</div><div class='ctx'> 		.remove			= nxp_c45_remove,</div><div class='add'>+		.match_phy_device	= tja11xx_no_macsec_match_phy_device,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_MODEL(PHY_ID_TJA_1103),</div><div class='add'>+		.name			= "NXP C45 TJA1104",</div><div class='add'>+		.get_features		= nxp_c45_get_features,</div><div class='add'>+		.driver_data		= &amp;tja1103_phy_data,</div><div class='add'>+		.probe			= nxp_c45_probe,</div><div class='add'>+		.soft_reset		= nxp_c45_soft_reset,</div><div class='add'>+		.config_aneg		= genphy_c45_config_aneg,</div><div class='add'>+		.config_init		= nxp_c45_config_init,</div><div class='add'>+		.config_intr		= tja1103_config_intr,</div><div class='add'>+		.handle_interrupt	= nxp_c45_handle_interrupt,</div><div class='add'>+		.read_status		= genphy_c45_read_status,</div><div class='add'>+		.suspend		= genphy_c45_pma_suspend,</div><div class='add'>+		.resume			= genphy_c45_pma_resume,</div><div class='add'>+		.get_sset_count		= nxp_c45_get_sset_count,</div><div class='add'>+		.get_strings		= nxp_c45_get_strings,</div><div class='add'>+		.get_stats		= nxp_c45_get_stats,</div><div class='add'>+		.cable_test_start	= nxp_c45_cable_test_start,</div><div class='add'>+		.cable_test_get_status	= nxp_c45_cable_test_get_status,</div><div class='add'>+		.set_loopback		= genphy_c45_loopback,</div><div class='add'>+		.get_sqi		= nxp_c45_get_sqi,</div><div class='add'>+		.get_sqi_max		= nxp_c45_get_sqi_max,</div><div class='add'>+		.remove			= nxp_c45_remove,</div><div class='add'>+		.match_phy_device	= tja11xx_macsec_match_phy_device,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		PHY_ID_MATCH_MODEL(PHY_ID_TJA_1120),</div><div class='hunk'>@@ -2003,12 +2145,39 @@ static struct phy_driver nxp_c45_driver[] = {</div><div class='ctx'> 		.get_sqi		= nxp_c45_get_sqi,</div><div class='ctx'> 		.get_sqi_max		= nxp_c45_get_sqi_max,</div><div class='ctx'> 		.remove			= nxp_c45_remove,</div><div class='add'>+		.match_phy_device	= tja11xx_no_macsec_match_phy_device,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PHY_ID_MATCH_MODEL(PHY_ID_TJA_1120),</div><div class='add'>+		.name			= "NXP C45 TJA1121",</div><div class='add'>+		.get_features		= nxp_c45_get_features,</div><div class='add'>+		.driver_data		= &amp;tja1120_phy_data,</div><div class='add'>+		.probe			= nxp_c45_probe,</div><div class='add'>+		.soft_reset		= nxp_c45_soft_reset,</div><div class='add'>+		.config_aneg		= genphy_c45_config_aneg,</div><div class='add'>+		.config_init		= nxp_c45_config_init,</div><div class='add'>+		.config_intr		= tja1120_config_intr,</div><div class='add'>+		.handle_interrupt	= nxp_c45_handle_interrupt,</div><div class='add'>+		.read_status		= genphy_c45_read_status,</div><div class='add'>+		.link_change_notify	= tja1120_link_change_notify,</div><div class='add'>+		.suspend		= genphy_c45_pma_suspend,</div><div class='add'>+		.resume			= genphy_c45_pma_resume,</div><div class='add'>+		.get_sset_count		= nxp_c45_get_sset_count,</div><div class='add'>+		.get_strings		= nxp_c45_get_strings,</div><div class='add'>+		.get_stats		= nxp_c45_get_stats,</div><div class='add'>+		.cable_test_start	= nxp_c45_cable_test_start,</div><div class='add'>+		.cable_test_get_status	= nxp_c45_cable_test_get_status,</div><div class='add'>+		.set_loopback		= genphy_c45_loopback,</div><div class='add'>+		.get_sqi		= nxp_c45_get_sqi,</div><div class='add'>+		.get_sqi_max		= nxp_c45_get_sqi_max,</div><div class='add'>+		.remove			= nxp_c45_remove,</div><div class='add'>+		.match_phy_device	= tja11xx_macsec_match_phy_device,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(nxp_c45_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused nxp_c45_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused nxp_c45_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_TJA_1103) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_TJA_1120) },</div><div class='ctx'> 	{ /*sentinel*/ },</div><div class='head'>diff --git a/drivers/net/phy/nxp-cbtx.c b/drivers/net/phy/nxp-cbtx.c<br/>index 3d25491043a3..3286fcb4f47e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/nxp-cbtx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/nxp-cbtx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/nxp-cbtx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/nxp-cbtx.c</a></div><div class='hunk'>@@ -215,7 +215,7 @@ static struct phy_driver cbtx_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(cbtx_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused cbtx_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused cbtx_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_CBTX_SJA1110) },</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/nxp-tja11xx.c b/drivers/net/phy/nxp-tja11xx.c<br/>index 2c263ae44b4f..3c38a8ddae2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/nxp-tja11xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/nxp-tja11xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/nxp-tja11xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/nxp-tja11xx.c</a></div><div class='hunk'>@@ -21,12 +21,14 @@</div><div class='ctx'> #define PHY_ID_TJA1100			0x0180dc40</div><div class='ctx'> #define PHY_ID_TJA1101			0x0180dd00</div><div class='ctx'> #define PHY_ID_TJA1102			0x0180dc80</div><div class='add'>+#define PHY_ID_TJA1102S			0x0180dc90</div><div class='ctx'> </div><div class='ctx'> #define MII_ECTRL			17</div><div class='ctx'> #define MII_ECTRL_LINK_CONTROL		BIT(15)</div><div class='ctx'> #define MII_ECTRL_POWER_MODE_MASK	GENMASK(14, 11)</div><div class='ctx'> #define MII_ECTRL_POWER_MODE_NO_CHANGE	(0x0 &lt;&lt; 11)</div><div class='ctx'> #define MII_ECTRL_POWER_MODE_NORMAL	(0x3 &lt;&lt; 11)</div><div class='add'>+#define MII_ECTRL_POWER_MODE_SLEEP	(0xa &lt;&lt; 11)</div><div class='ctx'> #define MII_ECTRL_POWER_MODE_STANDBY	(0xc &lt;&lt; 11)</div><div class='ctx'> #define MII_ECTRL_CABLE_TEST		BIT(5)</div><div class='ctx'> #define MII_ECTRL_CONFIG_EN		BIT(2)</div><div class='hunk'>@@ -78,12 +80,13 @@</div><div class='ctx'> #define MII_COMMCFG			27</div><div class='ctx'> #define MII_COMMCFG_AUTO_OP		BIT(15)</div><div class='ctx'> </div><div class='add'>+#define MII_CFG3			28</div><div class='add'>+#define MII_CFG3_PHY_EN			BIT(0)</div><div class='add'>+</div><div class='ctx'> /* Configure REF_CLK as input in RMII mode */</div><div class='ctx'> #define TJA110X_RMII_MODE_REFCLK_IN       BIT(0)</div><div class='ctx'> </div><div class='ctx'> struct tja11xx_priv {</div><div class='del'>-	char		*hwmon_name;</div><div class='del'>-	struct device	*hwmon_dev;</div><div class='ctx'> 	struct phy_device *phydev;</div><div class='ctx'> 	struct work_struct phy_register_work;</div><div class='ctx'> 	u32 flags;</div><div class='hunk'>@@ -179,6 +182,14 @@ static int tja11xx_wakeup(struct phy_device *phydev)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='ctx'> 		return tja11xx_enable_link_control(phydev);</div><div class='add'>+	case MII_ECTRL_POWER_MODE_SLEEP:</div><div class='add'>+		switch (phydev-&gt;phy_id &amp; PHY_ID_MASK) {</div><div class='add'>+		case PHY_ID_TJA1102S:</div><div class='add'>+			/* Enable PHY, maybe it is disabled due to pin strapping */</div><div class='add'>+			return phy_set_bits(phydev, MII_CFG3, MII_CFG3_PHY_EN);</div><div class='add'>+		default:</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -316,6 +327,7 @@ static int tja11xx_config_init(struct phy_device *phydev)</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		break;</div><div class='add'>+	case PHY_ID_TJA1102S:</div><div class='ctx'> 	case PHY_ID_TJA1101:</div><div class='ctx'> 		reg_mask = MII_CFG1_INTERFACE_MODE_MASK;</div><div class='ctx'> 		ret = tja11xx_get_interface_mode(phydev);</div><div class='hunk'>@@ -494,19 +506,12 @@ static const struct hwmon_chip_info tja11xx_hwmon_chip_info = {</div><div class='ctx'> static int tja11xx_hwmon_register(struct phy_device *phydev,</div><div class='ctx'> 				  struct tja11xx_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='del'>-</div><div class='del'>-	priv-&gt;hwmon_name = devm_hwmon_sanitize_name(dev, dev_name(dev));</div><div class='del'>-	if (IS_ERR(priv-&gt;hwmon_name))</div><div class='del'>-		return PTR_ERR(priv-&gt;hwmon_name);</div><div class='add'>+	struct device *hdev, *dev = &amp;phydev-&gt;mdio.dev;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;hwmon_dev =</div><div class='del'>-		devm_hwmon_device_register_with_info(dev, priv-&gt;hwmon_name,</div><div class='del'>-						     phydev,</div><div class='del'>-						     &amp;tja11xx_hwmon_chip_info,</div><div class='del'>-						     NULL);</div><div class='del'>-</div><div class='del'>-	return PTR_ERR_OR_ZERO(priv-&gt;hwmon_dev);</div><div class='add'>+	hdev = devm_hwmon_device_register_with_info(dev, NULL, phydev,</div><div class='add'>+						    &amp;tja11xx_hwmon_chip_info,</div><div class='add'>+						    NULL);</div><div class='add'>+	return PTR_ERR_OR_ZERO(hdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tja11xx_parse_dt(struct phy_device *phydev)</div><div class='hunk'>@@ -646,12 +651,14 @@ static int tja1102_match_phy_device(struct phy_device *phydev, bool port0)</div><div class='ctx'> 	return !ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tja1102_p0_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int tja1102_p0_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				       const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return tja1102_match_phy_device(phydev, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tja1102_p1_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int tja1102_p1_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				       const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return tja1102_match_phy_device(phydev, false);</div><div class='ctx'> }</div><div class='hunk'>@@ -883,15 +890,39 @@ static struct phy_driver tja11xx_driver[] = {</div><div class='ctx'> 		.handle_interrupt = tja11xx_handle_interrupt,</div><div class='ctx'> 		.cable_test_start = tja11xx_cable_test_start,</div><div class='ctx'> 		.cable_test_get_status = tja11xx_cable_test_get_status,</div><div class='add'>+	}, {</div><div class='add'>+		PHY_ID_MATCH_MODEL(PHY_ID_TJA1102S),</div><div class='add'>+		.name		= "NXP TJA1102S",</div><div class='add'>+		.features       = PHY_BASIC_T1_FEATURES,</div><div class='add'>+		.flags          = PHY_POLL_CABLE_TEST,</div><div class='add'>+		.probe		= tja11xx_probe,</div><div class='add'>+		.soft_reset	= tja11xx_soft_reset,</div><div class='add'>+		.config_aneg	= tja11xx_config_aneg,</div><div class='add'>+		.config_init	= tja11xx_config_init,</div><div class='add'>+		.read_status	= tja11xx_read_status,</div><div class='add'>+		.get_sqi	= tja11xx_get_sqi,</div><div class='add'>+		.get_sqi_max	= tja11xx_get_sqi_max,</div><div class='add'>+		.suspend	= genphy_suspend,</div><div class='add'>+		.resume		= genphy_resume,</div><div class='add'>+		.set_loopback   = genphy_loopback,</div><div class='add'>+		/* Statistics */</div><div class='add'>+		.get_sset_count = tja11xx_get_sset_count,</div><div class='add'>+		.get_strings	= tja11xx_get_strings,</div><div class='add'>+		.get_stats	= tja11xx_get_stats,</div><div class='add'>+		.config_intr	= tja11xx_config_intr,</div><div class='add'>+		.handle_interrupt = tja11xx_handle_interrupt,</div><div class='add'>+		.cable_test_start = tja11xx_cable_test_start,</div><div class='add'>+		.cable_test_get_status = tja11xx_cable_test_get_status,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(tja11xx_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused tja11xx_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused tja11xx_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_TJA1100) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_TJA1101) },</div><div class='ctx'> 	{ PHY_ID_MATCH_MODEL(PHY_ID_TJA1102) },</div><div class='add'>+	{ PHY_ID_MATCH_MODEL(PHY_ID_TJA1102S) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/phy-c45.c b/drivers/net/phy/phy-c45.c<br/>index 5695935fdce9..d48aa7231b37 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy-c45.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy-c45.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy-c45.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phy-c45.c</a></div><div class='hunk'>@@ -7,8 +7,10 @@</div><div class='ctx'> #include &lt;linux/mdio.h&gt;</div><div class='ctx'> #include &lt;linux/mii.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/ethtool_netlink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mdio-open-alliance.h"</div><div class='add'>+#include "phylib-internal.h"</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * genphy_c45_baset1_able - checks if the PMA has BASE-T1 extended abilities</div><div class='hunk'>@@ -146,12 +148,12 @@ int genphy_c45_pma_setup_forced(struct phy_device *phydev)</div><div class='ctx'> 		ctrl2 |= MDIO_PMA_CTRL2_1000BT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPEED_2500:</div><div class='del'>-		ctrl1 |= MDIO_CTRL1_SPEED2_5G;</div><div class='add'>+		ctrl1 |= MDIO_PMA_CTRL1_SPEED2_5G;</div><div class='ctx'> 		/* Assume 2.5Gbase-T */</div><div class='ctx'> 		ctrl2 |= MDIO_PMA_CTRL2_2_5GBT;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPEED_5000:</div><div class='del'>-		ctrl1 |= MDIO_CTRL1_SPEED5G;</div><div class='add'>+		ctrl1 |= MDIO_PMA_CTRL1_SPEED5G;</div><div class='ctx'> 		/* Assume 5Gbase-T */</div><div class='ctx'> 		ctrl2 |= MDIO_PMA_CTRL2_5GBT;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -484,8 +486,8 @@ static int genphy_c45_baset1_read_lpa(struct phy_device *phydev)</div><div class='ctx'> 		mii_t1_adv_l_mod_linkmode_t(phydev-&gt;lp_advertising, 0);</div><div class='ctx'> 		mii_t1_adv_m_mod_linkmode_t(phydev-&gt;lp_advertising, 0);</div><div class='ctx'> </div><div class='del'>-		phydev-&gt;pause = 0;</div><div class='del'>-		phydev-&gt;asym_pause = 0;</div><div class='add'>+		phydev-&gt;pause = false;</div><div class='add'>+		phydev-&gt;asym_pause = false;</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -497,8 +499,8 @@ static int genphy_c45_baset1_read_lpa(struct phy_device *phydev)</div><div class='ctx'> 		return val;</div><div class='ctx'> </div><div class='ctx'> 	mii_t1_adv_l_mod_linkmode_t(phydev-&gt;lp_advertising, val);</div><div class='del'>-	phydev-&gt;pause = val &amp; MDIO_AN_T1_ADV_L_PAUSE_CAP ? 1 : 0;</div><div class='del'>-	phydev-&gt;asym_pause = val &amp; MDIO_AN_T1_ADV_L_PAUSE_ASYM ? 1 : 0;</div><div class='add'>+	phydev-&gt;pause = val &amp; MDIO_AN_T1_ADV_L_PAUSE_CAP;</div><div class='add'>+	phydev-&gt;asym_pause = val &amp; MDIO_AN_T1_ADV_L_PAUSE_ASYM;</div><div class='ctx'> </div><div class='ctx'> 	val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_LP_M);</div><div class='ctx'> 	if (val &lt; 0)</div><div class='hunk'>@@ -535,8 +537,8 @@ int genphy_c45_read_lpa(struct phy_device *phydev)</div><div class='ctx'> 				   phydev-&gt;lp_advertising);</div><div class='ctx'> 		mii_10gbt_stat_mod_linkmode_lpa_t(phydev-&gt;lp_advertising, 0);</div><div class='ctx'> 		mii_adv_mod_linkmode_adv_t(phydev-&gt;lp_advertising, 0);</div><div class='del'>-		phydev-&gt;pause = 0;</div><div class='del'>-		phydev-&gt;asym_pause = 0;</div><div class='add'>+		phydev-&gt;pause = false;</div><div class='add'>+		phydev-&gt;asym_pause = false;</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -550,8 +552,8 @@ int genphy_c45_read_lpa(struct phy_device *phydev)</div><div class='ctx'> 		return val;</div><div class='ctx'> </div><div class='ctx'> 	mii_adv_mod_linkmode_adv_t(phydev-&gt;lp_advertising, val);</div><div class='del'>-	phydev-&gt;pause = val &amp; LPA_PAUSE_CAP ? 1 : 0;</div><div class='del'>-	phydev-&gt;asym_pause = val &amp; LPA_PAUSE_ASYM ? 1 : 0;</div><div class='add'>+	phydev-&gt;pause = val &amp; LPA_PAUSE_CAP;</div><div class='add'>+	phydev-&gt;asym_pause = val &amp; LPA_PAUSE_ASYM;</div><div class='ctx'> </div><div class='ctx'> 	/* Read the link partner's 10G advertisement */</div><div class='ctx'> 	val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT);</div><div class='hunk'>@@ -616,10 +618,10 @@ int genphy_c45_read_pma(struct phy_device *phydev)</div><div class='ctx'> 	case MDIO_PMA_CTRL1_SPEED1000:</div><div class='ctx'> 		phydev-&gt;speed = SPEED_1000;</div><div class='ctx'> 		break;</div><div class='del'>-	case MDIO_CTRL1_SPEED2_5G:</div><div class='add'>+	case MDIO_PMA_CTRL1_SPEED2_5G:</div><div class='ctx'> 		phydev-&gt;speed = SPEED_2500;</div><div class='ctx'> 		break;</div><div class='del'>-	case MDIO_CTRL1_SPEED5G:</div><div class='add'>+	case MDIO_PMA_CTRL1_SPEED5G:</div><div class='ctx'> 		phydev-&gt;speed = SPEED_5000;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case MDIO_CTRL1_SPEED10G:</div><div class='hunk'>@@ -680,18 +682,14 @@ EXPORT_SYMBOL_GPL(genphy_c45_read_mdix);</div><div class='ctx'>  * @phydev: target phy_device struct</div><div class='ctx'>  * @adv: the linkmode advertisement settings</div><div class='ctx'>  */</div><div class='del'>-int genphy_c45_write_eee_adv(struct phy_device *phydev, unsigned long *adv)</div><div class='add'>+static int genphy_c45_write_eee_adv(struct phy_device *phydev,</div><div class='add'>+				    unsigned long *adv)</div><div class='ctx'> {</div><div class='ctx'> 	int val, changed = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (linkmode_intersects(phydev-&gt;supported_eee, PHY_EEE_CAP1_FEATURES)) {</div><div class='ctx'> 		val = linkmode_to_mii_eee_cap1_t(adv);</div><div class='ctx'> </div><div class='del'>-		/* In eee_broken_modes are stored MDIO_AN_EEE_ADV specific raw</div><div class='del'>-		 * register values.</div><div class='del'>-		 */</div><div class='del'>-		val &amp;= ~phydev-&gt;eee_broken_modes;</div><div class='del'>-</div><div class='ctx'> 		/* IEEE 802.3-2018 45.2.7.13 EEE advertisement 1</div><div class='ctx'> 		 * (Register 7.60)</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -942,7 +940,7 @@ EXPORT_SYMBOL_GPL(genphy_c45_read_eee_abilities);</div><div class='ctx'>  */</div><div class='ctx'> int genphy_c45_an_config_eee_aneg(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	if (!phydev-&gt;eee_enabled) {</div><div class='add'>+	if (!phydev-&gt;eee_cfg.eee_enabled) {</div><div class='ctx'> 		__ETHTOOL_DECLARE_LINK_MODE_MASK(adv) = {};</div><div class='ctx'> </div><div class='ctx'> 		return genphy_c45_write_eee_adv(phydev, adv);</div><div class='hunk'>@@ -950,6 +948,7 @@ int genphy_c45_an_config_eee_aneg(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	return genphy_c45_write_eee_adv(phydev, phydev-&gt;advertising_eee);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(genphy_c45_an_config_eee_aneg);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * genphy_c45_pma_baset1_read_abilities - read supported baset1 link modes from PMA</div><div class='hunk'>@@ -1173,8 +1172,8 @@ int genphy_c45_read_status(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	phydev-&gt;speed = SPEED_UNKNOWN;</div><div class='ctx'> 	phydev-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='del'>-	phydev-&gt;pause = 0;</div><div class='del'>-	phydev-&gt;asym_pause = 0;</div><div class='add'>+	phydev-&gt;pause = false;</div><div class='add'>+	phydev-&gt;asym_pause = false;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;autoneg == AUTONEG_ENABLE) {</div><div class='ctx'> 		ret = genphy_c45_read_lpa(phydev);</div><div class='hunk'>@@ -1230,8 +1229,11 @@ int gen10g_config_aneg(struct phy_device *phydev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(gen10g_config_aneg);</div><div class='ctx'> </div><div class='del'>-int genphy_c45_loopback(struct phy_device *phydev, bool enable)</div><div class='add'>+int genphy_c45_loopback(struct phy_device *phydev, bool enable, int speed)</div><div class='ctx'> {</div><div class='add'>+	if (enable &amp;&amp; speed)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	return phy_modify_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1,</div><div class='ctx'> 			      MDIO_PCS_CTRL1_LOOPBACK,</div><div class='ctx'> 			      enable ? MDIO_PCS_CTRL1_LOOPBACK : 0);</div><div class='hunk'>@@ -1467,46 +1469,32 @@ EXPORT_SYMBOL_GPL(genphy_c45_plca_get_status);</div><div class='ctx'> /**</div><div class='ctx'>  * genphy_c45_eee_is_active - get EEE status</div><div class='ctx'>  * @phydev: target phy_device struct</div><div class='del'>- * @adv: variable to store advertised linkmodes</div><div class='ctx'>  * @lp: variable to store LP advertised linkmodes</div><div class='del'>- * @is_enabled: variable to store EEE enabled/disabled configuration value</div><div class='ctx'>  *</div><div class='del'>- * Description: this function will read local and link partner PHY</div><div class='del'>- * advertisements. Compare them return current EEE state.</div><div class='add'>+ * Description: this function will read link partner PHY advertisement</div><div class='add'>+ * and compare it to local advertisement to return current EEE state.</div><div class='ctx'>  */</div><div class='del'>-int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *adv,</div><div class='del'>-			     unsigned long *lp, bool *is_enabled)</div><div class='add'>+int genphy_c45_eee_is_active(struct phy_device *phydev, unsigned long *lp)</div><div class='ctx'> {</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_adv) = {};</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_lp) = {};</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);</div><div class='del'>-	bool eee_enabled, eee_active;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = genphy_c45_read_eee_adv(phydev, tmp_adv);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	if (!phydev-&gt;eee_cfg.eee_enabled)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = genphy_c45_read_eee_lpa(phydev, tmp_lp);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	eee_enabled = !linkmode_empty(tmp_adv);</div><div class='del'>-	linkmode_and(common, tmp_adv, tmp_lp);</div><div class='del'>-	if (eee_enabled &amp;&amp; !linkmode_empty(common))</div><div class='del'>-		eee_active = phy_check_valid(phydev-&gt;speed, phydev-&gt;duplex,</div><div class='del'>-					     common);</div><div class='del'>-	else</div><div class='del'>-		eee_active = false;</div><div class='del'>-</div><div class='del'>-	if (adv)</div><div class='del'>-		linkmode_copy(adv, tmp_adv);</div><div class='ctx'> 	if (lp)</div><div class='ctx'> 		linkmode_copy(lp, tmp_lp);</div><div class='del'>-	if (is_enabled)</div><div class='del'>-		*is_enabled = eee_enabled;</div><div class='ctx'> </div><div class='del'>-	return eee_active;</div><div class='add'>+	linkmode_and(common, phydev-&gt;advertising_eee, tmp_lp);</div><div class='add'>+	if (linkmode_empty(common))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return phy_check_valid(phydev-&gt;speed, phydev-&gt;duplex, common);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(genphy_c45_eee_is_active);</div><div class='ctx'> </div><div class='hunk'>@@ -1521,21 +1509,16 @@ EXPORT_SYMBOL(genphy_c45_eee_is_active);</div><div class='ctx'> int genphy_c45_ethtool_get_eee(struct phy_device *phydev,</div><div class='ctx'> 			       struct ethtool_keee *data)</div><div class='ctx'> {</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(adv) = {};</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(lp) = {};</div><div class='del'>-	bool is_enabled;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = genphy_c45_eee_is_active(phydev, adv, lp, &amp;is_enabled);</div><div class='add'>+	ret = genphy_c45_eee_is_active(phydev, data-&gt;lp_advertised);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	data-&gt;eee_enabled = is_enabled;</div><div class='del'>-	data-&gt;eee_active = ret;</div><div class='del'>-	linkmode_copy(data-&gt;supported, phydev-&gt;supported_eee);</div><div class='del'>-	linkmode_copy(data-&gt;advertised, adv);</div><div class='del'>-	linkmode_copy(data-&gt;lp_advertised, lp);</div><div class='del'>-</div><div class='add'>+	data-&gt;eee_active = phydev-&gt;eee_active;</div><div class='add'>+	linkmode_andnot(data-&gt;supported, phydev-&gt;supported_eee,</div><div class='add'>+			phydev-&gt;eee_disabled_modes);</div><div class='add'>+	linkmode_copy(data-&gt;advertised, phydev-&gt;advertising_eee);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(genphy_c45_ethtool_get_eee);</div><div class='hunk'>@@ -1568,15 +1551,14 @@ int genphy_c45_ethtool_set_eee(struct phy_device *phydev,</div><div class='ctx'> 				phydev_warn(phydev, "At least some EEE link modes are not supported.\n");</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			}</div><div class='del'>-		} else {</div><div class='del'>-			adv = phydev-&gt;supported_eee;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='del'>-		linkmode_copy(phydev-&gt;advertising_eee, adv);</div><div class='add'>+			linkmode_andnot(phydev-&gt;advertising_eee, adv,</div><div class='add'>+					phydev-&gt;eee_disabled_modes);</div><div class='add'>+		} else if (linkmode_empty(phydev-&gt;advertising_eee)) {</div><div class='add'>+			phy_advertise_eee_all(phydev);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phydev-&gt;eee_enabled = data-&gt;eee_enabled;</div><div class='del'>-</div><div class='ctx'> 	ret = genphy_c45_an_config_eee_aneg(phydev);</div><div class='ctx'> 	if (ret &gt; 0) {</div><div class='ctx'> 		ret = phy_restart_aneg(phydev);</div><div class='hunk'>@@ -1593,9 +1575,260 @@ int genphy_c45_ethtool_set_eee(struct phy_device *phydev,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(genphy_c45_ethtool_set_eee);</div><div class='ctx'> </div><div class='del'>-struct phy_driver genphy_c45_driver = {</div><div class='del'>-	.phy_id         = 0xffffffff,</div><div class='del'>-	.phy_id_mask    = 0xffffffff,</div><div class='del'>-	.name           = "Generic Clause 45 PHY",</div><div class='del'>-	.read_status    = genphy_c45_read_status,</div><div class='del'>-};</div><div class='add'>+/**</div><div class='add'>+ * oatc14_cable_test_get_result_code - Convert hardware cable test status to</div><div class='add'>+ *                                     ethtool result code.</div><div class='add'>+ * @status: The hardware-reported cable test status</div><div class='add'>+ *</div><div class='add'>+ * This helper function maps the OATC14 HDD cable test status to the</div><div class='add'>+ * corresponding ethtool cable test result code. It provides a translation</div><div class='add'>+ * between the device-specific status values and the standardized ethtool</div><div class='add'>+ * result codes.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * ETHTOOL_A_CABLE_RESULT_CODE_OK          - Cable is OK</div><div class='add'>+ * * ETHTOOL_A_CABLE_RESULT_CODE_OPEN        - Open circuit detected</div><div class='add'>+ * * ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT  - Short circuit detected</div><div class='add'>+ * * ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC      - Status not detectable or invalid</div><div class='add'>+ */</div><div class='add'>+static int oatc14_cable_test_get_result_code(enum oatc14_hdd_status status)</div><div class='add'>+{</div><div class='add'>+	switch (status) {</div><div class='add'>+	case OATC14_HDD_STATUS_CABLE_OK:</div><div class='add'>+		return ETHTOOL_A_CABLE_RESULT_CODE_OK;</div><div class='add'>+	case OATC14_HDD_STATUS_OPEN:</div><div class='add'>+		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;</div><div class='add'>+	case OATC14_HDD_STATUS_SHORT:</div><div class='add'>+		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;</div><div class='add'>+	case OATC14_HDD_STATUS_NOT_DETECTABLE:</div><div class='add'>+	default:</div><div class='add'>+		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * genphy_c45_oatc14_cable_test_get_status - Get status of OATC14 10Base-T1S</div><div class='add'>+ *                                           PHY cable test.</div><div class='add'>+ * @phydev:   pointer to the PHY device structure</div><div class='add'>+ * @finished: pointer to a boolean set true if the test is complete</div><div class='add'>+ *</div><div class='add'>+ * Retrieves the current status of the OATC14 10Base-T1S PHY cable test.</div><div class='add'>+ * This function reads the OATC14 HDD register to determine whether the test</div><div class='add'>+ * results are valid and whether the test has finished.</div><div class='add'>+ *</div><div class='add'>+ * If the test is complete, the function reports the cable test result via</div><div class='add'>+ * the ethtool cable test interface using ethnl_cable_test_result(), and then</div><div class='add'>+ * clears the test control bit in the PHY register to reset the test state.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure (e.g. register</div><div class='add'>+ *         read/write error).</div><div class='add'>+ */</div><div class='add'>+int genphy_c45_oatc14_cable_test_get_status(struct phy_device *phydev,</div><div class='add'>+					    bool *finished)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 sts;</div><div class='add'>+</div><div class='add'>+	*finished = false;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, MDIO_OATC14_HDD);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(ret &amp; OATC14_HDD_VALID))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	*finished = true;</div><div class='add'>+</div><div class='add'>+	sts = FIELD_GET(OATC14_HDD_SHORT_OPEN_STATUS, ret);</div><div class='add'>+</div><div class='add'>+	ret = ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,</div><div class='add'>+				      oatc14_cable_test_get_result_code(sts));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+				  MDIO_OATC14_HDD, OATC14_HDD_CONTROL);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(genphy_c45_oatc14_cable_test_get_status);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * genphy_c45_oatc14_cable_test_start - Start a cable test on an OATC14</div><div class='add'>+ *                                      10Base-T1S PHY.</div><div class='add'>+ * @phydev: Pointer to the PHY device structure</div><div class='add'>+ *</div><div class='add'>+ * This function initiates a cable diagnostic test on a Clause 45 OATC14</div><div class='add'>+ * 10Base-T1S capable PHY device. It first reads the PHY’s advanced diagnostic</div><div class='add'>+ * capability register to check if High Definition Diagnostics (HDD) mode is</div><div class='add'>+ * supported. If the PHY does not report HDD capability, cable testing is not</div><div class='add'>+ * supported and the function returns -EOPNOTSUPP.</div><div class='add'>+ *</div><div class='add'>+ * For PHYs that support HDD, the function sets the appropriate control bits in</div><div class='add'>+ * the OATC14_HDD register to enable and start the cable diagnostic test.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0 on success</div><div class='add'>+ * * -EOPNOTSUPP if the PHY does not support HDD capability</div><div class='add'>+ * * A negative error code on I/O or register access failures</div><div class='add'>+ */</div><div class='add'>+int genphy_c45_oatc14_cable_test_start(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, MDIO_OATC14_ADFCAP);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(ret &amp; OATC14_ADFCAP_HDD_CAPABILITY))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MDIO_OATC14_HDD,</div><div class='add'>+			       OATC14_HDD_CONTROL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, MDIO_OATC14_HDD);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MDIO_OATC14_HDD,</div><div class='add'>+				OATC14_HDD_START_CONTROL);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(genphy_c45_oatc14_cable_test_start);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * oatc14_update_sqi_capability - Read and update OATC14 10Base-T1S PHY SQI/SQI+</div><div class='add'>+ *                                capability</div><div class='add'>+ * @phydev: Pointer to the PHY device structure</div><div class='add'>+ *</div><div class='add'>+ * This helper reads the OATC14 ADFCAP capability register to determine whether</div><div class='add'>+ * the PHY supports SQI or SQI+ reporting.</div><div class='add'>+ *</div><div class='add'>+ * SQI+ capability is detected first. The SQI+ field indicates the number of</div><div class='add'>+ * valid MSBs (3–8), corresponding to 8–256 SQI+ levels. When present, the</div><div class='add'>+ * function stores the number of SQI+ bits and computes the maximum SQI+ value</div><div class='add'>+ * as (2^bits - 1).</div><div class='add'>+ *</div><div class='add'>+ * If SQI+ is not supported, the function checks for basic SQI capability,</div><div class='add'>+ * which provides 0–7 SQI levels.</div><div class='add'>+ *</div><div class='add'>+ * On success, the capability information is stored in</div><div class='add'>+ * @phydev-&gt;oatc14_sqi_capability and marked as updated.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * 0        - capability successfully read and stored</div><div class='add'>+ * * -EOPNOTSUPP - SQI/SQI+ not supported by this PHY</div><div class='add'>+ * * Negative errno on read failure</div><div class='add'>+ */</div><div class='add'>+static int oatc14_update_sqi_capability(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	u8 bits;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, MDIO_OATC14_ADFCAP);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Check for SQI+ capability</div><div class='add'>+	 * 0 - SQI+ is not supported</div><div class='add'>+	 * (3-8) bits for (8-256) SQI+ levels supported</div><div class='add'>+	 */</div><div class='add'>+	bits = FIELD_GET(OATC14_ADFCAP_SQIPLUS_CAPABILITY, ret);</div><div class='add'>+	if (bits) {</div><div class='add'>+		phydev-&gt;oatc14_sqi_capability.sqiplus_bits = bits;</div><div class='add'>+		/* Max sqi+ level supported: (2 ^ bits) - 1 */</div><div class='add'>+		phydev-&gt;oatc14_sqi_capability.sqi_max = BIT(bits) - 1;</div><div class='add'>+		goto update_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for SQI capability</div><div class='add'>+	 * 0 - SQI is not supported</div><div class='add'>+	 * 1 - SQI is supported (0-7 levels)</div><div class='add'>+	 */</div><div class='add'>+	if (ret &amp; OATC14_ADFCAP_SQI_CAPABILITY) {</div><div class='add'>+		phydev-&gt;oatc14_sqi_capability.sqi_max = OATC14_SQI_MAX_LEVEL;</div><div class='add'>+		goto update_done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+update_done:</div><div class='add'>+	phydev-&gt;oatc14_sqi_capability.updated = true;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * genphy_c45_oatc14_get_sqi_max - Get maximum supported SQI or SQI+ level of</div><div class='add'>+ *				   OATC14 10Base-T1S PHY</div><div class='add'>+ * @phydev: pointer to the PHY device structure</div><div class='add'>+ *</div><div class='add'>+ * This function returns the maximum supported Signal Quality Indicator (SQI) or</div><div class='add'>+ * SQI+ level. The SQI capability is updated on first invocation if it has not</div><div class='add'>+ * already been updated.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * Maximum SQI/SQI+ level supported</div><div class='add'>+ * * Negative errno on capability read failure</div><div class='add'>+ */</div><div class='add'>+int genphy_c45_oatc14_get_sqi_max(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!phydev-&gt;oatc14_sqi_capability.updated) {</div><div class='add'>+		ret = oatc14_update_sqi_capability(phydev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return phydev-&gt;oatc14_sqi_capability.sqi_max;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(genphy_c45_oatc14_get_sqi_max);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * genphy_c45_oatc14_get_sqi - Get Signal Quality Indicator (SQI) from an OATC14</div><div class='add'>+ *			       10Base-T1S PHY</div><div class='add'>+ * @phydev: pointer to the PHY device structure</div><div class='add'>+ *</div><div class='add'>+ * This function reads the SQI+ or SQI value from an OATC14-compatible</div><div class='add'>+ * 10Base-T1S PHY. If SQI+ capability is supported, the function returns the</div><div class='add'>+ * extended SQI+ value; otherwise, it returns the basic SQI value. The SQI</div><div class='add'>+ * capability is updated on first invocation if it has not already been updated.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * SQI/SQI+ value on success</div><div class='add'>+ * * Negative errno on read failure</div><div class='add'>+ */</div><div class='add'>+int genphy_c45_oatc14_get_sqi(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	u8 shift;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!phydev-&gt;oatc14_sqi_capability.updated) {</div><div class='add'>+		ret = oatc14_update_sqi_capability(phydev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate and return SQI+ value if supported */</div><div class='add'>+	if (phydev-&gt;oatc14_sqi_capability.sqiplus_bits) {</div><div class='add'>+		ret = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+				   MDIO_OATC14_DCQ_SQIPLUS);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* SQI+ uses N MSBs out of 8 bits, left-aligned with padding 1's</div><div class='add'>+		 * Calculate the right-shift needed to isolate the N bits.</div><div class='add'>+		 */</div><div class='add'>+		shift = 8 - phydev-&gt;oatc14_sqi_capability.sqiplus_bits;</div><div class='add'>+</div><div class='add'>+		return (ret &amp; OATC14_DCQ_SQIPLUS_VALUE) &gt;&gt; shift;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read and return SQI value if SQI+ capability is not supported */</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, MDIO_OATC14_DCQ_SQI);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ret &amp; OATC14_DCQ_SQI_VALUE;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(genphy_c45_oatc14_get_sqi);</div><div class='head'>diff --git a/drivers/net/phy/phy-caps.h b/drivers/net/phy/phy-caps.h<br/>new file mode 100644<br/>index 000000000000..4951a39f3828<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy-caps.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phy-caps.h</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * link caps internal header, for link modes &lt;-&gt; capabilities &lt;-&gt; interfaces</div><div class='add'>+ * conversions.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PHY_CAPS_H</div><div class='add'>+#define __PHY_CAPS_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	LINK_CAPA_10HD = 0,</div><div class='add'>+	LINK_CAPA_10FD,</div><div class='add'>+	LINK_CAPA_100HD,</div><div class='add'>+	LINK_CAPA_100FD,</div><div class='add'>+	LINK_CAPA_1000HD,</div><div class='add'>+	LINK_CAPA_1000FD,</div><div class='add'>+	LINK_CAPA_2500FD,</div><div class='add'>+	LINK_CAPA_5000FD,</div><div class='add'>+	LINK_CAPA_10000FD,</div><div class='add'>+	LINK_CAPA_20000FD,</div><div class='add'>+	LINK_CAPA_25000FD,</div><div class='add'>+	LINK_CAPA_40000FD,</div><div class='add'>+	LINK_CAPA_50000FD,</div><div class='add'>+	LINK_CAPA_56000FD,</div><div class='add'>+	LINK_CAPA_100000FD,</div><div class='add'>+	LINK_CAPA_200000FD,</div><div class='add'>+	LINK_CAPA_400000FD,</div><div class='add'>+	LINK_CAPA_800000FD,</div><div class='add'>+	LINK_CAPA_1600000FD,</div><div class='add'>+</div><div class='add'>+	__LINK_CAPA_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define LINK_CAPA_ALL	GENMASK((__LINK_CAPA_MAX - 1), 0)</div><div class='add'>+</div><div class='add'>+struct link_capabilities {</div><div class='add'>+	int speed;</div><div class='add'>+	unsigned int duplex;</div><div class='add'>+	__ETHTOOL_DECLARE_LINK_MODE_MASK(linkmodes);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int __init phy_caps_init(void);</div><div class='add'>+</div><div class='add'>+size_t phy_caps_speeds(unsigned int *speeds, size_t size,</div><div class='add'>+		       unsigned long *linkmodes);</div><div class='add'>+void phy_caps_linkmode_max_speed(u32 max_speed, unsigned long *linkmodes);</div><div class='add'>+bool phy_caps_valid(int speed, int duplex, const unsigned long *linkmodes);</div><div class='add'>+void phy_caps_linkmodes(unsigned long caps, unsigned long *linkmodes);</div><div class='add'>+unsigned long phy_caps_from_interface(phy_interface_t interface);</div><div class='add'>+</div><div class='add'>+const struct link_capabilities *</div><div class='add'>+phy_caps_lookup_by_linkmode(const unsigned long *linkmodes);</div><div class='add'>+</div><div class='add'>+const struct link_capabilities *</div><div class='add'>+phy_caps_lookup_by_linkmode_rev(const unsigned long *linkmodes, bool fdx_only);</div><div class='add'>+</div><div class='add'>+const struct link_capabilities *</div><div class='add'>+phy_caps_lookup(int speed, unsigned int duplex, const unsigned long *supported,</div><div class='add'>+		bool exact);</div><div class='add'>+</div><div class='add'>+#endif /* __PHY_CAPS_H */</div><div class='head'>diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c<br/>index 4e8db12d6092..277c034bc32f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy-core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phy-core.c</a></div><div class='hunk'>@@ -6,6 +6,10 @@</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "phylib.h"</div><div class='add'>+#include "phylib-internal.h"</div><div class='add'>+#include "phy-caps.h"</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * phy_speed_to_str - Return a string representing the PHY link speed</div><div class='ctx'>  *</div><div class='hunk'>@@ -13,7 +17,7 @@</div><div class='ctx'>  */</div><div class='ctx'> const char *phy_speed_to_str(int speed)</div><div class='ctx'> {</div><div class='del'>-	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 103,</div><div class='add'>+	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 125,</div><div class='ctx'> 		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "</div><div class='ctx'> 		"If a speed or mode has been added please update phy_speed_to_str "</div><div class='ctx'> 		"and the PHY settings array.\n");</div><div class='hunk'>@@ -51,6 +55,8 @@ const char *phy_speed_to_str(int speed)</div><div class='ctx'> 		return "400Gbps";</div><div class='ctx'> 	case SPEED_800000:</div><div class='ctx'> 		return "800Gbps";</div><div class='add'>+	case SPEED_1600000:</div><div class='add'>+		return "1600Gbps";</div><div class='ctx'> 	case SPEED_UNKNOWN:</div><div class='ctx'> 		return "Unknown";</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -98,6 +104,49 @@ const char *phy_rate_matching_to_str(int rate_matching)</div><div class='ctx'> EXPORT_SYMBOL_GPL(phy_rate_matching_to_str);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * phy_fix_phy_mode_for_mac_delays - Convenience function for fixing PHY</div><div class='add'>+ * mode based on whether mac adds internal delay</div><div class='add'>+ *</div><div class='add'>+ * @interface: The current interface mode of the port</div><div class='add'>+ * @mac_txid: True if the mac adds internal tx delay</div><div class='add'>+ * @mac_rxid: True if the mac adds internal rx delay</div><div class='add'>+ *</div><div class='add'>+ * Return: fixed PHY mode, or PHY_INTERFACE_MODE_NA if the interface can</div><div class='add'>+ * not apply the internal delay</div><div class='add'>+ */</div><div class='add'>+phy_interface_t phy_fix_phy_mode_for_mac_delays(phy_interface_t interface,</div><div class='add'>+						bool mac_txid, bool mac_rxid)</div><div class='add'>+{</div><div class='add'>+	if (!phy_interface_mode_is_rgmii(interface))</div><div class='add'>+		return interface;</div><div class='add'>+</div><div class='add'>+	if (mac_txid &amp;&amp; mac_rxid) {</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RGMII_ID)</div><div class='add'>+			return PHY_INTERFACE_MODE_RGMII;</div><div class='add'>+		return PHY_INTERFACE_MODE_NA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mac_txid) {</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RGMII_ID)</div><div class='add'>+			return PHY_INTERFACE_MODE_RGMII_RXID;</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RGMII_TXID)</div><div class='add'>+			return PHY_INTERFACE_MODE_RGMII;</div><div class='add'>+		return PHY_INTERFACE_MODE_NA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mac_rxid) {</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RGMII_ID)</div><div class='add'>+			return PHY_INTERFACE_MODE_RGMII_TXID;</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RGMII_RXID)</div><div class='add'>+			return PHY_INTERFACE_MODE_RGMII;</div><div class='add'>+		return PHY_INTERFACE_MODE_NA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return interface;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_fix_phy_mode_for_mac_delays);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * phy_interface_num_ports - Return the number of links that can be carried by</div><div class='ctx'>  *			     a given MAC-PHY physical link. Returns 0 if this is</div><div class='ctx'>  *			     unknown, the number of links else.</div><div class='hunk'>@@ -111,6 +160,7 @@ int phy_interface_num_ports(phy_interface_t interface)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_INTERNAL:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+	case PHY_INTERFACE_MODE_MIILITE:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_GMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_TBI:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_REVMII:</div><div class='hunk'>@@ -138,6 +188,9 @@ int phy_interface_num_ports(phy_interface_t interface)</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RXAUI:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_XAUI:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_1000BASEKX:</div><div class='add'>+	case PHY_INTERFACE_MODE_50GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_LAUI:</div><div class='add'>+	case PHY_INTERFACE_MODE_100GBASEP:</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_QSGMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_QUSGMII:</div><div class='hunk'>@@ -153,203 +206,9 @@ int phy_interface_num_ports(phy_interface_t interface)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(phy_interface_num_ports);</div><div class='ctx'> </div><div class='del'>-/* A mapping of all SUPPORTED settings to speed/duplex.  This table</div><div class='del'>- * must be grouped by speed and sorted in descending match priority</div><div class='del'>- * - iow, descending speed.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \</div><div class='del'>-			       .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}</div><div class='del'>-</div><div class='del'>-static const struct phy_setting settings[] = {</div><div class='del'>-	/* 800G */</div><div class='del'>-	PHY_SETTING( 800000, FULL, 800000baseCR8_Full		),</div><div class='del'>-	PHY_SETTING( 800000, FULL, 800000baseKR8_Full		),</div><div class='del'>-	PHY_SETTING( 800000, FULL, 800000baseDR8_Full		),</div><div class='del'>-	PHY_SETTING( 800000, FULL, 800000baseDR8_2_Full		),</div><div class='del'>-	PHY_SETTING( 800000, FULL, 800000baseSR8_Full		),</div><div class='del'>-	PHY_SETTING( 800000, FULL, 800000baseVR8_Full		),</div><div class='del'>-	/* 400G */</div><div class='del'>-	PHY_SETTING( 400000, FULL, 400000baseCR8_Full		),</div><div class='del'>-	PHY_SETTING( 400000, FULL, 400000baseKR8_Full		),</div><div class='del'>-	PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full	),</div><div class='del'>-	PHY_SETTING( 400000, FULL, 400000baseDR8_Full		),</div><div class='del'>-	PHY_SETTING( 400000, FULL, 400000baseSR8_Full		),</div><div class='del'>-	PHY_SETTING( 400000, FULL, 400000baseCR4_Full		),</div><div class='del'>-	PHY_SETTING( 400000, FULL, 400000baseKR4_Full		),</div><div class='del'>-	PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full	),</div><div class='del'>-	PHY_SETTING( 400000, FULL, 400000baseDR4_Full		),</div><div class='del'>-	PHY_SETTING( 400000, FULL, 400000baseSR4_Full		),</div><div class='del'>-	/* 200G */</div><div class='del'>-	PHY_SETTING( 200000, FULL, 200000baseCR4_Full		),</div><div class='del'>-	PHY_SETTING( 200000, FULL, 200000baseKR4_Full		),</div><div class='del'>-	PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full	),</div><div class='del'>-	PHY_SETTING( 200000, FULL, 200000baseDR4_Full		),</div><div class='del'>-	PHY_SETTING( 200000, FULL, 200000baseSR4_Full		),</div><div class='del'>-	PHY_SETTING( 200000, FULL, 200000baseCR2_Full		),</div><div class='del'>-	PHY_SETTING( 200000, FULL, 200000baseKR2_Full		),</div><div class='del'>-	PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full	),</div><div class='del'>-	PHY_SETTING( 200000, FULL, 200000baseDR2_Full		),</div><div class='del'>-	PHY_SETTING( 200000, FULL, 200000baseSR2_Full		),</div><div class='del'>-	/* 100G */</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseCR4_Full		),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseKR4_Full		),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full	),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseSR4_Full		),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseCR2_Full		),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseKR2_Full		),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full	),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseDR2_Full		),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseSR2_Full		),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseCR_Full		),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseKR_Full		),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full	),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseDR_Full		),</div><div class='del'>-	PHY_SETTING( 100000, FULL, 100000baseSR_Full		),</div><div class='del'>-	/* 56G */</div><div class='del'>-	PHY_SETTING(  56000, FULL,  56000baseCR4_Full	  	),</div><div class='del'>-	PHY_SETTING(  56000, FULL,  56000baseKR4_Full	  	),</div><div class='del'>-	PHY_SETTING(  56000, FULL,  56000baseLR4_Full	  	),</div><div class='del'>-	PHY_SETTING(  56000, FULL,  56000baseSR4_Full	  	),</div><div class='del'>-	/* 50G */</div><div class='del'>-	PHY_SETTING(  50000, FULL,  50000baseCR2_Full		),</div><div class='del'>-	PHY_SETTING(  50000, FULL,  50000baseKR2_Full		),</div><div class='del'>-	PHY_SETTING(  50000, FULL,  50000baseSR2_Full		),</div><div class='del'>-	PHY_SETTING(  50000, FULL,  50000baseCR_Full		),</div><div class='del'>-	PHY_SETTING(  50000, FULL,  50000baseKR_Full		),</div><div class='del'>-	PHY_SETTING(  50000, FULL,  50000baseLR_ER_FR_Full	),</div><div class='del'>-	PHY_SETTING(  50000, FULL,  50000baseDR_Full		),</div><div class='del'>-	PHY_SETTING(  50000, FULL,  50000baseSR_Full		),</div><div class='del'>-	/* 40G */</div><div class='del'>-	PHY_SETTING(  40000, FULL,  40000baseCR4_Full		),</div><div class='del'>-	PHY_SETTING(  40000, FULL,  40000baseKR4_Full		),</div><div class='del'>-	PHY_SETTING(  40000, FULL,  40000baseLR4_Full		),</div><div class='del'>-	PHY_SETTING(  40000, FULL,  40000baseSR4_Full		),</div><div class='del'>-	/* 25G */</div><div class='del'>-	PHY_SETTING(  25000, FULL,  25000baseCR_Full		),</div><div class='del'>-	PHY_SETTING(  25000, FULL,  25000baseKR_Full		),</div><div class='del'>-	PHY_SETTING(  25000, FULL,  25000baseSR_Full		),</div><div class='del'>-	/* 20G */</div><div class='del'>-	PHY_SETTING(  20000, FULL,  20000baseKR2_Full		),</div><div class='del'>-	PHY_SETTING(  20000, FULL,  20000baseMLD2_Full		),</div><div class='del'>-	/* 10G */</div><div class='del'>-	PHY_SETTING(  10000, FULL,  10000baseCR_Full		),</div><div class='del'>-	PHY_SETTING(  10000, FULL,  10000baseER_Full		),</div><div class='del'>-	PHY_SETTING(  10000, FULL,  10000baseKR_Full		),</div><div class='del'>-	PHY_SETTING(  10000, FULL,  10000baseKX4_Full		),</div><div class='del'>-	PHY_SETTING(  10000, FULL,  10000baseLR_Full		),</div><div class='del'>-	PHY_SETTING(  10000, FULL,  10000baseLRM_Full		),</div><div class='del'>-	PHY_SETTING(  10000, FULL,  10000baseR_FEC		),</div><div class='del'>-	PHY_SETTING(  10000, FULL,  10000baseSR_Full		),</div><div class='del'>-	PHY_SETTING(  10000, FULL,  10000baseT_Full		),</div><div class='del'>-	/* 5G */</div><div class='del'>-	PHY_SETTING(   5000, FULL,   5000baseT_Full		),</div><div class='del'>-	/* 2.5G */</div><div class='del'>-	PHY_SETTING(   2500, FULL,   2500baseT_Full		),</div><div class='del'>-	PHY_SETTING(   2500, FULL,   2500baseX_Full		),</div><div class='del'>-	/* 1G */</div><div class='del'>-	PHY_SETTING(   1000, FULL,   1000baseT_Full		),</div><div class='del'>-	PHY_SETTING(   1000, HALF,   1000baseT_Half		),</div><div class='del'>-	PHY_SETTING(   1000, FULL,   1000baseT1_Full		),</div><div class='del'>-	PHY_SETTING(   1000, FULL,   1000baseX_Full		),</div><div class='del'>-	PHY_SETTING(   1000, FULL,   1000baseKX_Full		),</div><div class='del'>-	/* 100M */</div><div class='del'>-	PHY_SETTING(    100, FULL,    100baseT_Full		),</div><div class='del'>-	PHY_SETTING(    100, FULL,    100baseT1_Full		),</div><div class='del'>-	PHY_SETTING(    100, HALF,    100baseT_Half		),</div><div class='del'>-	PHY_SETTING(    100, HALF,    100baseFX_Half		),</div><div class='del'>-	PHY_SETTING(    100, FULL,    100baseFX_Full		),</div><div class='del'>-	/* 10M */</div><div class='del'>-	PHY_SETTING(     10, FULL,     10baseT_Full		),</div><div class='del'>-	PHY_SETTING(     10, HALF,     10baseT_Half		),</div><div class='del'>-	PHY_SETTING(     10, FULL,     10baseT1L_Full		),</div><div class='del'>-	PHY_SETTING(     10, FULL,     10baseT1S_Full		),</div><div class='del'>-	PHY_SETTING(     10, HALF,     10baseT1S_Half		),</div><div class='del'>-	PHY_SETTING(     10, HALF,     10baseT1S_P2MP_Half	),</div><div class='del'>-	PHY_SETTING(     10, FULL,     10baseT1BRR_Full		),</div><div class='del'>-};</div><div class='del'>-#undef PHY_SETTING</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * phy_lookup_setting - lookup a PHY setting</div><div class='del'>- * @speed: speed to match</div><div class='del'>- * @duplex: duplex to match</div><div class='del'>- * @mask: allowed link modes</div><div class='del'>- * @exact: an exact match is required</div><div class='del'>- *</div><div class='del'>- * Search the settings array for a setting that matches the speed and</div><div class='del'>- * duplex, and which is supported.</div><div class='del'>- *</div><div class='del'>- * If @exact is unset, either an exact match or %NULL for no match will</div><div class='del'>- * be returned.</div><div class='del'>- *</div><div class='del'>- * If @exact is set, an exact match, the fastest supported setting at</div><div class='del'>- * or below the specified speed, the slowest supported setting, or if</div><div class='del'>- * they all fail, %NULL will be returned.</div><div class='del'>- */</div><div class='del'>-const struct phy_setting *</div><div class='del'>-phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact)</div><div class='del'>-{</div><div class='del'>-	const struct phy_setting *p, *match = NULL, *last = NULL;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0, p = settings; i &lt; ARRAY_SIZE(settings); i++, p++) {</div><div class='del'>-		if (p-&gt;bit &lt; __ETHTOOL_LINK_MODE_MASK_NBITS &amp;&amp;</div><div class='del'>-		    test_bit(p-&gt;bit, mask)) {</div><div class='del'>-			last = p;</div><div class='del'>-			if (p-&gt;speed == speed &amp;&amp; p-&gt;duplex == duplex) {</div><div class='del'>-				/* Exact match for speed and duplex */</div><div class='del'>-				match = p;</div><div class='del'>-				break;</div><div class='del'>-			} else if (!exact) {</div><div class='del'>-				if (!match &amp;&amp; p-&gt;speed &lt;= speed)</div><div class='del'>-					/* Candidate */</div><div class='del'>-					match = p;</div><div class='del'>-</div><div class='del'>-				if (p-&gt;speed &lt; speed)</div><div class='del'>-					break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!match &amp;&amp; !exact)</div><div class='del'>-		match = last;</div><div class='del'>-</div><div class='del'>-	return match;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_lookup_setting);</div><div class='del'>-</div><div class='del'>-size_t phy_speeds(unsigned int *speeds, size_t size,</div><div class='del'>-		  unsigned long *mask)</div><div class='del'>-{</div><div class='del'>-	size_t count;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0, count = 0; i &lt; ARRAY_SIZE(settings) &amp;&amp; count &lt; size; i++)</div><div class='del'>-		if (settings[i].bit &lt; __ETHTOOL_LINK_MODE_MASK_NBITS &amp;&amp;</div><div class='del'>-		    test_bit(settings[i].bit, mask) &amp;&amp;</div><div class='del'>-		    (count == 0 || speeds[count - 1] != settings[i].speed))</div><div class='del'>-			speeds[count++] = settings[i].speed;</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __set_linkmode_max_speed(u32 max_speed, unsigned long *addr)</div><div class='del'>-{</div><div class='del'>-	const struct phy_setting *p;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0, p = settings; i &lt; ARRAY_SIZE(settings); i++, p++) {</div><div class='del'>-		if (p-&gt;speed &gt; max_speed)</div><div class='del'>-			linkmode_clear_bit(p-&gt;bit, addr);</div><div class='del'>-		else</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void __set_phy_supported(struct phy_device *phydev, u32 max_speed)</div><div class='ctx'> {</div><div class='del'>-	__set_linkmode_max_speed(max_speed, phydev-&gt;supported);</div><div class='add'>+	phy_caps_linkmode_max_speed(max_speed, phydev-&gt;supported);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -388,28 +247,25 @@ void of_set_phy_supported(struct phy_device *phydev)</div><div class='ctx'> void of_set_phy_eee_broken(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *node = phydev-&gt;mdio.dev.of_node;</div><div class='del'>-	u32 broken = 0;</div><div class='add'>+	unsigned long *modes = phydev-&gt;eee_disabled_modes;</div><div class='ctx'> </div><div class='del'>-	if (!IS_ENABLED(CONFIG_OF_MDIO))</div><div class='add'>+	if (!IS_ENABLED(CONFIG_OF_MDIO) || !node)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (!node)</div><div class='del'>-		return;</div><div class='add'>+	linkmode_zero(modes);</div><div class='ctx'> </div><div class='ctx'> 	if (of_property_read_bool(node, "eee-broken-100tx"))</div><div class='del'>-		broken |= MDIO_EEE_100TX;</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, modes);</div><div class='ctx'> 	if (of_property_read_bool(node, "eee-broken-1000t"))</div><div class='del'>-		broken |= MDIO_EEE_1000T;</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, modes);</div><div class='ctx'> 	if (of_property_read_bool(node, "eee-broken-10gt"))</div><div class='del'>-		broken |= MDIO_EEE_10GT;</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, modes);</div><div class='ctx'> 	if (of_property_read_bool(node, "eee-broken-1000kx"))</div><div class='del'>-		broken |= MDIO_EEE_1000KX;</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, modes);</div><div class='ctx'> 	if (of_property_read_bool(node, "eee-broken-10gkx4"))</div><div class='del'>-		broken |= MDIO_EEE_10GKX4;</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, modes);</div><div class='ctx'> 	if (of_property_read_bool(node, "eee-broken-10gkr"))</div><div class='del'>-		broken |= MDIO_EEE_10GKR;</div><div class='del'>-</div><div class='del'>-	phydev-&gt;eee_broken_modes = broken;</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, modes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -478,16 +334,15 @@ EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause);</div><div class='ctx'> void phy_resolve_aneg_linkmode(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);</div><div class='del'>-	int i;</div><div class='add'>+	const struct link_capabilities *c;</div><div class='ctx'> </div><div class='ctx'> 	linkmode_and(common, phydev-&gt;lp_advertising, phydev-&gt;advertising);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(settings); i++)</div><div class='del'>-		if (test_bit(settings[i].bit, common)) {</div><div class='del'>-			phydev-&gt;speed = settings[i].speed;</div><div class='del'>-			phydev-&gt;duplex = settings[i].duplex;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+	c = phy_caps_lookup_by_linkmode(common);</div><div class='add'>+	if (c) {</div><div class='add'>+		phydev-&gt;speed = c-&gt;speed;</div><div class='add'>+		phydev-&gt;duplex = c-&gt;duplex;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	phy_resolve_aneg_pause(phydev);</div><div class='ctx'> }</div><div class='hunk'>@@ -505,7 +360,8 @@ EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode);</div><div class='ctx'> void phy_check_downshift(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);</div><div class='del'>-	int i, speed = SPEED_UNKNOWN;</div><div class='add'>+	const struct link_capabilities *c;</div><div class='add'>+	int speed = SPEED_UNKNOWN;</div><div class='ctx'> </div><div class='ctx'> 	phydev-&gt;downshifted_rate = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -515,11 +371,9 @@ void phy_check_downshift(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	linkmode_and(common, phydev-&gt;lp_advertising, phydev-&gt;advertising);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(settings); i++)</div><div class='del'>-		if (test_bit(settings[i].bit, common)) {</div><div class='del'>-			speed = settings[i].speed;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+	c = phy_caps_lookup_by_linkmode(common);</div><div class='add'>+	if (c)</div><div class='add'>+		speed = c-&gt;speed;</div><div class='ctx'> </div><div class='ctx'> 	if (speed == SPEED_UNKNOWN || phydev-&gt;speed &gt;= speed)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -529,22 +383,17 @@ void phy_check_downshift(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	phydev-&gt;downshifted_rate = 1;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_check_downshift);</div><div class='ctx'> </div><div class='ctx'> static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only)</div><div class='ctx'> {</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);</div><div class='del'>-	int i = ARRAY_SIZE(settings);</div><div class='add'>+	const struct link_capabilities *c;</div><div class='ctx'> </div><div class='ctx'> 	linkmode_and(common, phydev-&gt;lp_advertising, phydev-&gt;advertising);</div><div class='ctx'> </div><div class='del'>-	while (--i &gt;= 0) {</div><div class='del'>-		if (test_bit(settings[i].bit, common)) {</div><div class='del'>-			if (fdx_only &amp;&amp; settings[i].duplex != DUPLEX_FULL)</div><div class='del'>-				continue;</div><div class='del'>-			return settings[i].speed;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	c = phy_caps_lookup_by_linkmode_rev(common, fdx_only);</div><div class='add'>+	if (c)</div><div class='add'>+		return c-&gt;speed;</div><div class='ctx'> </div><div class='ctx'> 	return SPEED_UNKNOWN;</div><div class='ctx'> }</div><div class='hunk'>@@ -556,7 +405,7 @@ int phy_speed_down_core(struct phy_device *phydev)</div><div class='ctx'> 	if (min_common_speed == SPEED_UNKNOWN)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	__set_linkmode_max_speed(min_common_speed, phydev-&gt;advertising);</div><div class='add'>+	phy_caps_linkmode_max_speed(min_common_speed, phydev-&gt;advertising);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -575,8 +424,8 @@ static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,</div><div class='ctx'> 			devad | MII_MMD_CTRL_NOINCR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,</div><div class='del'>-			int devad, u32 regnum)</div><div class='add'>+int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,</div><div class='add'>+		 int devad, u32 regnum)</div><div class='ctx'> {</div><div class='ctx'> 	if (is_c45)</div><div class='ctx'> 		return __mdiobus_c45_read(bus, phy_addr, devad, regnum);</div><div class='hunk'>@@ -585,9 +434,10 @@ static int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,</div><div class='ctx'> 	/* Read the content of the MMD's selected register */</div><div class='ctx'> 	return __mdiobus_read(bus, phy_addr, MII_MMD_DATA);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(mmd_phy_read);</div><div class='ctx'> </div><div class='del'>-static int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,</div><div class='del'>-			 int devad, u32 regnum, u16 val)</div><div class='add'>+int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,</div><div class='add'>+		  int devad, u32 regnum, u16 val)</div><div class='ctx'> {</div><div class='ctx'> 	if (is_c45)</div><div class='ctx'> 		return __mdiobus_c45_write(bus, phy_addr, devad, regnum, val);</div><div class='hunk'>@@ -596,6 +446,7 @@ static int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,</div><div class='ctx'> 	/* Write the data into MMD's selected register */</div><div class='ctx'> 	return __mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(mmd_phy_write);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * __phy_read_mmd - Convenience function for reading a register</div><div class='hunk'>@@ -686,146 +537,6 @@ int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)</div><div class='ctx'> EXPORT_SYMBOL(phy_write_mmd);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * __phy_package_read_mmd - read MMD reg relative to PHY package base addr</div><div class='del'>- * @phydev: The phy_device struct</div><div class='del'>- * @addr_offset: The offset to be added to PHY package base_addr</div><div class='del'>- * @devad: The MMD to read from</div><div class='del'>- * @regnum: The register on the MMD to read</div><div class='del'>- *</div><div class='del'>- * Convenience helper for reading a register of an MMD on a given PHY</div><div class='del'>- * using the PHY package base address. The base address is added to</div><div class='del'>- * the addr_offset value.</div><div class='del'>- *</div><div class='del'>- * Same calling rules as for __phy_read();</div><div class='del'>- *</div><div class='del'>- * NOTE: It's assumed that the entire PHY package is either C22 or C45.</div><div class='del'>- */</div><div class='del'>-int __phy_package_read_mmd(struct phy_device *phydev,</div><div class='del'>-			   unsigned int addr_offset, int devad,</div><div class='del'>-			   u32 regnum)</div><div class='del'>-{</div><div class='del'>-	int addr = phy_package_address(phydev, addr_offset);</div><div class='del'>-</div><div class='del'>-	if (addr &lt; 0)</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	if (regnum &gt; (u16)~0 || devad &gt; 32)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return mmd_phy_read(phydev-&gt;mdio.bus, addr, phydev-&gt;is_c45, devad,</div><div class='del'>-			    regnum);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__phy_package_read_mmd);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * phy_package_read_mmd - read MMD reg relative to PHY package base addr</div><div class='del'>- * @phydev: The phy_device struct</div><div class='del'>- * @addr_offset: The offset to be added to PHY package base_addr</div><div class='del'>- * @devad: The MMD to read from</div><div class='del'>- * @regnum: The register on the MMD to read</div><div class='del'>- *</div><div class='del'>- * Convenience helper for reading a register of an MMD on a given PHY</div><div class='del'>- * using the PHY package base address. The base address is added to</div><div class='del'>- * the addr_offset value.</div><div class='del'>- *</div><div class='del'>- * Same calling rules as for phy_read();</div><div class='del'>- *</div><div class='del'>- * NOTE: It's assumed that the entire PHY package is either C22 or C45.</div><div class='del'>- */</div><div class='del'>-int phy_package_read_mmd(struct phy_device *phydev,</div><div class='del'>-			 unsigned int addr_offset, int devad,</div><div class='del'>-			 u32 regnum)</div><div class='del'>-{</div><div class='del'>-	int addr = phy_package_address(phydev, addr_offset);</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	if (addr &lt; 0)</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	if (regnum &gt; (u16)~0 || devad &gt; 32)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	phy_lock_mdio_bus(phydev);</div><div class='del'>-	val = mmd_phy_read(phydev-&gt;mdio.bus, addr, phydev-&gt;is_c45, devad,</div><div class='del'>-			   regnum);</div><div class='del'>-	phy_unlock_mdio_bus(phydev);</div><div class='del'>-</div><div class='del'>-	return val;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(phy_package_read_mmd);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * __phy_package_write_mmd - write MMD reg relative to PHY package base addr</div><div class='del'>- * @phydev: The phy_device struct</div><div class='del'>- * @addr_offset: The offset to be added to PHY package base_addr</div><div class='del'>- * @devad: The MMD to write to</div><div class='del'>- * @regnum: The register on the MMD to write</div><div class='del'>- * @val: value to write to @regnum</div><div class='del'>- *</div><div class='del'>- * Convenience helper for writing a register of an MMD on a given PHY</div><div class='del'>- * using the PHY package base address. The base address is added to</div><div class='del'>- * the addr_offset value.</div><div class='del'>- *</div><div class='del'>- * Same calling rules as for __phy_write();</div><div class='del'>- *</div><div class='del'>- * NOTE: It's assumed that the entire PHY package is either C22 or C45.</div><div class='del'>- */</div><div class='del'>-int __phy_package_write_mmd(struct phy_device *phydev,</div><div class='del'>-			    unsigned int addr_offset, int devad,</div><div class='del'>-			    u32 regnum, u16 val)</div><div class='del'>-{</div><div class='del'>-	int addr = phy_package_address(phydev, addr_offset);</div><div class='del'>-</div><div class='del'>-	if (addr &lt; 0)</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	if (regnum &gt; (u16)~0 || devad &gt; 32)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return mmd_phy_write(phydev-&gt;mdio.bus, addr, phydev-&gt;is_c45, devad,</div><div class='del'>-			     regnum, val);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(__phy_package_write_mmd);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * phy_package_write_mmd - write MMD reg relative to PHY package base addr</div><div class='del'>- * @phydev: The phy_device struct</div><div class='del'>- * @addr_offset: The offset to be added to PHY package base_addr</div><div class='del'>- * @devad: The MMD to write to</div><div class='del'>- * @regnum: The register on the MMD to write</div><div class='del'>- * @val: value to write to @regnum</div><div class='del'>- *</div><div class='del'>- * Convenience helper for writing a register of an MMD on a given PHY</div><div class='del'>- * using the PHY package base address. The base address is added to</div><div class='del'>- * the addr_offset value.</div><div class='del'>- *</div><div class='del'>- * Same calling rules as for phy_write();</div><div class='del'>- *</div><div class='del'>- * NOTE: It's assumed that the entire PHY package is either C22 or C45.</div><div class='del'>- */</div><div class='del'>-int phy_package_write_mmd(struct phy_device *phydev,</div><div class='del'>-			  unsigned int addr_offset, int devad,</div><div class='del'>-			  u32 regnum, u16 val)</div><div class='del'>-{</div><div class='del'>-	int addr = phy_package_address(phydev, addr_offset);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (addr &lt; 0)</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	if (regnum &gt; (u16)~0 || devad &gt; 32)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	phy_lock_mdio_bus(phydev);</div><div class='del'>-	ret = mmd_phy_write(phydev-&gt;mdio.bus, addr, phydev-&gt;is_c45, devad,</div><div class='del'>-			    regnum, val);</div><div class='del'>-	phy_unlock_mdio_bus(phydev);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(phy_package_write_mmd);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * phy_modify_changed - Function for modifying a PHY register</div><div class='ctx'>  * @phydev: the phy_device struct</div><div class='ctx'>  * @regnum: register number to modify</div><div class='head'>diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c<br/>index 4f3e742907cb..13dd1691886d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phy.c</a></div><div class='hunk'>@@ -36,6 +36,9 @@</div><div class='ctx'> #include &lt;net/genetlink.h&gt;</div><div class='ctx'> #include &lt;net/sock.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "phylib-internal.h"</div><div class='add'>+#include "phy-caps.h"</div><div class='add'>+</div><div class='ctx'> #define PHY_STATE_TIME	HZ</div><div class='ctx'> </div><div class='ctx'> #define PHY_STATE_STR(_state)			\</div><div class='hunk'>@@ -211,25 +214,6 @@ int phy_aneg_done(struct phy_device *phydev)</div><div class='ctx'> EXPORT_SYMBOL(phy_aneg_done);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * phy_find_valid - find a PHY setting that matches the requested parameters</div><div class='del'>- * @speed: desired speed</div><div class='del'>- * @duplex: desired duplex</div><div class='del'>- * @supported: mask of supported link modes</div><div class='del'>- *</div><div class='del'>- * Locate a supported phy setting that is, in priority order:</div><div class='del'>- * - an exact match for the specified speed and duplex mode</div><div class='del'>- * - a match for the specified speed, or slower speed</div><div class='del'>- * - the slowest supported speed</div><div class='del'>- * Returns the matched phy_setting entry, or %NULL if no supported phy</div><div class='del'>- * settings were found.</div><div class='del'>- */</div><div class='del'>-static const struct phy_setting *</div><div class='del'>-phy_find_valid(int speed, int duplex, unsigned long *supported)</div><div class='del'>-{</div><div class='del'>-	return phy_lookup_setting(speed, duplex, supported, false);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * phy_supported_speeds - return all speeds currently supported by a phy device</div><div class='ctx'>  * @phy: The phy device to return supported speeds of.</div><div class='ctx'>  * @speeds: buffer to store supported speeds in.</div><div class='hunk'>@@ -243,7 +227,7 @@ unsigned int phy_supported_speeds(struct phy_device *phy,</div><div class='ctx'> 				  unsigned int *speeds,</div><div class='ctx'> 				  unsigned int size)</div><div class='ctx'> {</div><div class='del'>-	return phy_speeds(speeds, size, phy-&gt;supported);</div><div class='add'>+	return phy_caps_speeds(speeds, size, phy-&gt;supported);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -257,7 +241,7 @@ unsigned int phy_supported_speeds(struct phy_device *phy,</div><div class='ctx'>  */</div><div class='ctx'> bool phy_check_valid(int speed, int duplex, unsigned long *features)</div><div class='ctx'> {</div><div class='del'>-	return !!phy_lookup_setting(speed, duplex, features, true);</div><div class='add'>+	return phy_caps_valid(speed, duplex, features);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(phy_check_valid);</div><div class='ctx'> </div><div class='hunk'>@@ -271,13 +255,14 @@ EXPORT_SYMBOL(phy_check_valid);</div><div class='ctx'>  */</div><div class='ctx'> static void phy_sanitize_settings(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	const struct phy_setting *setting;</div><div class='add'>+	const struct link_capabilities *c;</div><div class='add'>+</div><div class='add'>+	c = phy_caps_lookup(phydev-&gt;speed, phydev-&gt;duplex, phydev-&gt;supported,</div><div class='add'>+			    false);</div><div class='ctx'> </div><div class='del'>-	setting = phy_find_valid(phydev-&gt;speed, phydev-&gt;duplex,</div><div class='del'>-				 phydev-&gt;supported);</div><div class='del'>-	if (setting) {</div><div class='del'>-		phydev-&gt;speed = setting-&gt;speed;</div><div class='del'>-		phydev-&gt;duplex = setting-&gt;duplex;</div><div class='add'>+	if (c) {</div><div class='add'>+		phydev-&gt;speed = c-&gt;speed;</div><div class='add'>+		phydev-&gt;duplex = c-&gt;duplex;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* We failed to find anything (no supported speeds?) */</div><div class='ctx'> 		phydev-&gt;speed = SPEED_UNKNOWN;</div><div class='hunk'>@@ -302,7 +287,7 @@ void phy_ethtool_ksettings_get(struct phy_device *phydev,</div><div class='ctx'> 		cmd-&gt;base.port = PORT_BNC;</div><div class='ctx'> 	else</div><div class='ctx'> 		cmd-&gt;base.port = phydev-&gt;port;</div><div class='del'>-	cmd-&gt;base.transceiver = phy_is_internal(phydev) ?</div><div class='add'>+	cmd-&gt;base.transceiver = phydev-&gt;is_internal ?</div><div class='ctx'> 				XCVR_INTERNAL : XCVR_EXTERNAL;</div><div class='ctx'> 	cmd-&gt;base.phy_address = phydev-&gt;mdio.addr;</div><div class='ctx'> 	cmd-&gt;base.autoneg = phydev-&gt;autoneg;</div><div class='hunk'>@@ -420,12 +405,14 @@ int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	case SIOCSHWTSTAMP:</div><div class='del'>-		if (phydev-&gt;mii_ts &amp;&amp; phydev-&gt;mii_ts-&gt;hwtstamp) {</div><div class='add'>+		if (phydev-&gt;mii_ts &amp;&amp; phydev-&gt;mii_ts-&gt;hwtstamp_set) {</div><div class='ctx'> 			if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='ctx'> 				return -EFAULT;</div><div class='ctx'> </div><div class='ctx'> 			hwtstamp_config_to_kernel(&amp;kernel_cfg, &amp;cfg);</div><div class='del'>-			ret = phydev-&gt;mii_ts-&gt;hwtstamp(phydev-&gt;mii_ts, &amp;kernel_cfg, &amp;extack);</div><div class='add'>+			ret = phydev-&gt;mii_ts-&gt;hwtstamp_set(phydev-&gt;mii_ts,</div><div class='add'>+							   &amp;kernel_cfg,</div><div class='add'>+							   &amp;extack);</div><div class='ctx'> 			if (ret)</div><div class='ctx'> 				return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -491,6 +478,9 @@ int __phy_hwtstamp_get(struct phy_device *phydev,</div><div class='ctx'> 	if (!phydev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='add'>+	if (phydev-&gt;mii_ts &amp;&amp; phydev-&gt;mii_ts-&gt;hwtstamp_get)</div><div class='add'>+		return phydev-&gt;mii_ts-&gt;hwtstamp_get(phydev-&gt;mii_ts, config);</div><div class='add'>+</div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -508,8 +498,9 @@ int __phy_hwtstamp_set(struct phy_device *phydev,</div><div class='ctx'> 	if (!phydev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (phydev-&gt;mii_ts &amp;&amp; phydev-&gt;mii_ts-&gt;hwtstamp)</div><div class='del'>-		return phydev-&gt;mii_ts-&gt;hwtstamp(phydev-&gt;mii_ts, config, extack);</div><div class='add'>+	if (phydev-&gt;mii_ts &amp;&amp; phydev-&gt;mii_ts-&gt;hwtstamp_set)</div><div class='add'>+		return phydev-&gt;mii_ts-&gt;hwtstamp_set(phydev-&gt;mii_ts, config,</div><div class='add'>+						    extack);</div><div class='ctx'> </div><div class='ctx'> 	return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='hunk'>@@ -520,12 +511,12 @@ int __phy_hwtstamp_set(struct phy_device *phydev,</div><div class='ctx'>  * @phydev: the phy_device struct</div><div class='ctx'>  * @jiffies: Run the state machine after these jiffies</div><div class='ctx'>  */</div><div class='del'>-void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies)</div><div class='add'>+static void phy_queue_state_machine(struct phy_device *phydev,</div><div class='add'>+				    unsigned long jiffies)</div><div class='ctx'> {</div><div class='ctx'> 	mod_delayed_work(system_power_efficient_wq, &amp;phydev-&gt;state_queue,</div><div class='ctx'> 			 jiffies);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(phy_queue_state_machine);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * phy_trigger_machine - Trigger the state machine to run now</div><div class='hunk'>@@ -616,6 +607,49 @@ int phy_ethtool_get_stats(struct phy_device *phydev,</div><div class='ctx'> EXPORT_SYMBOL(phy_ethtool_get_stats);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * __phy_ethtool_get_phy_stats - Retrieve standardized PHY statistics</div><div class='add'>+ * @phydev: Pointer to the PHY device</div><div class='add'>+ * @phy_stats: Pointer to ethtool_eth_phy_stats structure</div><div class='add'>+ * @phydev_stats: Pointer to ethtool_phy_stats structure</div><div class='add'>+ *</div><div class='add'>+ * Fetches PHY statistics using a kernel-defined interface for consistent</div><div class='add'>+ * diagnostics. Unlike phy_ethtool_get_stats(), which allows custom stats,</div><div class='add'>+ * this function enforces a standardized format for better interoperability.</div><div class='add'>+ */</div><div class='add'>+void __phy_ethtool_get_phy_stats(struct phy_device *phydev,</div><div class='add'>+				 struct ethtool_eth_phy_stats *phy_stats,</div><div class='add'>+				 struct ethtool_phy_stats *phydev_stats)</div><div class='add'>+{</div><div class='add'>+	if (!phydev-&gt;drv || !phydev-&gt;drv-&gt;get_phy_stats)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;phydev-&gt;lock);</div><div class='add'>+	phydev-&gt;drv-&gt;get_phy_stats(phydev, phy_stats, phydev_stats);</div><div class='add'>+	mutex_unlock(&amp;phydev-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __phy_ethtool_get_link_ext_stats - Retrieve extended link statistics for a PHY</div><div class='add'>+ * @phydev: Pointer to the PHY device</div><div class='add'>+ * @link_stats: Pointer to the structure to store extended link statistics</div><div class='add'>+ *</div><div class='add'>+ * Populates the ethtool_link_ext_stats structure with link down event counts</div><div class='add'>+ * and additional driver-specific link statistics, if available.</div><div class='add'>+ */</div><div class='add'>+void __phy_ethtool_get_link_ext_stats(struct phy_device *phydev,</div><div class='add'>+				      struct ethtool_link_ext_stats *link_stats)</div><div class='add'>+{</div><div class='add'>+	link_stats-&gt;link_down_events = READ_ONCE(phydev-&gt;link_down_events);</div><div class='add'>+</div><div class='add'>+	if (!phydev-&gt;drv || !phydev-&gt;drv-&gt;get_link_stats)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;phydev-&gt;lock);</div><div class='add'>+	phydev-&gt;drv-&gt;get_link_stats(phydev, link_stats);</div><div class='add'>+	mutex_unlock(&amp;phydev-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * phy_ethtool_get_plca_cfg - Get PLCA RS configuration</div><div class='ctx'>  * @phydev: the phy_device struct</div><div class='ctx'>  * @plca_cfg: where to store the retrieved configuration</div><div class='hunk'>@@ -988,16 +1022,15 @@ static int phy_check_link_status(struct phy_device *phydev)</div><div class='ctx'> 	if (phydev-&gt;link &amp;&amp; phydev-&gt;state != PHY_RUNNING) {</div><div class='ctx'> 		phy_check_downshift(phydev);</div><div class='ctx'> 		phydev-&gt;state = PHY_RUNNING;</div><div class='del'>-		err = genphy_c45_eee_is_active(phydev,</div><div class='del'>-					       NULL, NULL, NULL);</div><div class='del'>-		if (err &lt;= 0)</div><div class='del'>-			phydev-&gt;enable_tx_lpi = false;</div><div class='del'>-		else</div><div class='del'>-			phydev-&gt;enable_tx_lpi = phydev-&gt;eee_cfg.tx_lpi_enabled;</div><div class='add'>+		err = genphy_c45_eee_is_active(phydev, NULL);</div><div class='add'>+		phydev-&gt;eee_active = err &gt; 0;</div><div class='add'>+		phydev-&gt;enable_tx_lpi = phydev-&gt;eee_cfg.tx_lpi_enabled &amp;&amp;</div><div class='add'>+					phydev-&gt;eee_active;</div><div class='ctx'> </div><div class='ctx'> 		phy_link_up(phydev);</div><div class='ctx'> 	} else if (!phydev-&gt;link &amp;&amp; phydev-&gt;state != PHY_NOLINK) {</div><div class='ctx'> 		phydev-&gt;state = PHY_NOLINK;</div><div class='add'>+		phydev-&gt;eee_active = false;</div><div class='ctx'> 		phydev-&gt;enable_tx_lpi = false;</div><div class='ctx'> 		phy_link_down(phydev);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1006,6 +1039,55 @@ static int phy_check_link_status(struct phy_device *phydev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * phy_inband_caps - query which in-band signalling modes are supported</div><div class='add'>+ * @phydev: a pointer to a &amp;struct phy_device</div><div class='add'>+ * @interface: the interface mode for the PHY</div><div class='add'>+ *</div><div class='add'>+ * Returns zero if it is unknown what in-band signalling is supported by the</div><div class='add'>+ * PHY (e.g. because the PHY driver doesn't implement the method.) Otherwise,</div><div class='add'>+ * returns a bit mask of the LINK_INBAND_* values from</div><div class='add'>+ * &amp;enum link_inband_signalling to describe which inband modes are supported</div><div class='add'>+ * by the PHY for this interface mode.</div><div class='add'>+ */</div><div class='add'>+unsigned int phy_inband_caps(struct phy_device *phydev,</div><div class='add'>+			     phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	if (phydev-&gt;drv &amp;&amp; phydev-&gt;drv-&gt;inband_caps)</div><div class='add'>+		return phydev-&gt;drv-&gt;inband_caps(phydev, interface);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_inband_caps);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_config_inband - configure the desired PHY in-band mode</div><div class='add'>+ * @phydev: the phy_device struct</div><div class='add'>+ * @modes: in-band modes to configure</div><div class='add'>+ *</div><div class='add'>+ * Description: disables, enables or enables-with-bypass in-band signalling</div><div class='add'>+ *   between the PHY and host system.</div><div class='add'>+ *</div><div class='add'>+ * Returns: zero on success, or negative errno value.</div><div class='add'>+ */</div><div class='add'>+int phy_config_inband(struct phy_device *phydev, unsigned int modes)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;phydev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (!!(modes &amp; LINK_INBAND_DISABLE) +</div><div class='add'>+	    !!(modes &amp; LINK_INBAND_ENABLE) +</div><div class='add'>+	    !!(modes &amp; LINK_INBAND_BYPASS) != 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!phydev-&gt;drv)</div><div class='add'>+		return -EIO;</div><div class='add'>+	else if (!phydev-&gt;drv-&gt;config_inband)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return phydev-&gt;drv-&gt;config_inband(phydev, modes);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(phy_config_inband);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * _phy_start_aneg - start auto-negotiation for this PHY device</div><div class='ctx'>  * @phydev: the phy_device struct</div><div class='ctx'>  *</div><div class='hunk'>@@ -1347,6 +1429,23 @@ static int phy_enable_interrupts(struct phy_device *phydev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * phy_update_stats - Update PHY device statistics if supported.</div><div class='add'>+ * @phydev: Pointer to the PHY device structure.</div><div class='add'>+ *</div><div class='add'>+ * If the PHY driver provides an update_stats callback, this function</div><div class='add'>+ * invokes it to update the PHY statistics. If not, it returns 0.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code if the callback fails.</div><div class='add'>+ */</div><div class='add'>+static int phy_update_stats(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	if (!phydev-&gt;drv-&gt;update_stats)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return phydev-&gt;drv-&gt;update_stats(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * phy_request_interrupt - request and enable interrupt for a PHY device</div><div class='ctx'>  * @phydev: target phy_device struct</div><div class='ctx'>  *</div><div class='hunk'>@@ -1389,6 +1488,24 @@ void phy_free_interrupt(struct phy_device *phydev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(phy_free_interrupt);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * phy_get_next_update_time - Determine the next PHY update time</div><div class='add'>+ * @phydev: Pointer to the phy_device structure</div><div class='add'>+ *</div><div class='add'>+ * This function queries the PHY driver to get the time for the next polling</div><div class='add'>+ * event. If the driver does not implement the callback, a default value is</div><div class='add'>+ * used.</div><div class='add'>+ *</div><div class='add'>+ * Return: The time for the next polling event in jiffies</div><div class='add'>+ */</div><div class='add'>+static unsigned int phy_get_next_update_time(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	if (phydev-&gt;drv &amp;&amp; phydev-&gt;drv-&gt;get_next_update_time)</div><div class='add'>+		return phydev-&gt;drv-&gt;get_next_update_time(phydev);</div><div class='add'>+</div><div class='add'>+	return PHY_STATE_TIME;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum phy_state_work {</div><div class='ctx'> 	PHY_STATE_WORK_NONE,</div><div class='ctx'> 	PHY_STATE_WORK_ANEG,</div><div class='hunk'>@@ -1415,6 +1532,9 @@ static enum phy_state_work _phy_state_machine(struct phy_device *phydev)</div><div class='ctx'> 	case PHY_RUNNING:</div><div class='ctx'> 		err = phy_check_link_status(phydev);</div><div class='ctx'> 		func = &amp;phy_check_link_status;</div><div class='add'>+</div><div class='add'>+		if (!err)</div><div class='add'>+			err = phy_update_stats(phydev);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_CABLETEST:</div><div class='ctx'> 		err = phydev-&gt;drv-&gt;cable_test_get_status(phydev, &amp;finished);</div><div class='hunk'>@@ -1434,9 +1554,24 @@ static enum phy_state_work _phy_state_machine(struct phy_device *phydev)</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_HALTED:</div><div class='add'>+		if (phydev-&gt;link) {</div><div class='add'>+			if (phydev-&gt;autoneg == AUTONEG_ENABLE) {</div><div class='add'>+				phydev-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+				phydev-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='add'>+			}</div><div class='add'>+			if (phydev-&gt;master_slave_state !=</div><div class='add'>+						MASTER_SLAVE_STATE_UNSUPPORTED)</div><div class='add'>+				phydev-&gt;master_slave_state =</div><div class='add'>+						MASTER_SLAVE_STATE_UNKNOWN;</div><div class='add'>+			phydev-&gt;mdix = ETH_TP_MDI_INVALID;</div><div class='add'>+			linkmode_zero(phydev-&gt;lp_advertising);</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case PHY_ERROR:</div><div class='ctx'> 		if (phydev-&gt;link) {</div><div class='ctx'> 			phydev-&gt;link = 0;</div><div class='add'>+			phydev-&gt;eee_active = false;</div><div class='add'>+			phydev-&gt;enable_tx_lpi = false;</div><div class='ctx'> 			phy_link_down(phydev);</div><div class='ctx'> 		}</div><div class='ctx'> 		state_work = PHY_STATE_WORK_SUSPEND;</div><div class='hunk'>@@ -1465,7 +1600,8 @@ static enum phy_state_work _phy_state_machine(struct phy_device *phydev)</div><div class='ctx'> 	 * called from phy_disconnect() synchronously.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (phy_polling_mode(phydev) &amp;&amp; phy_is_started(phydev))</div><div class='del'>-		phy_queue_state_machine(phydev, PHY_STATE_TIME);</div><div class='add'>+		phy_queue_state_machine(phydev,</div><div class='add'>+					phy_get_next_update_time(phydev));</div><div class='ctx'> </div><div class='ctx'> 	return state_work;</div><div class='ctx'> }</div><div class='hunk'>@@ -1589,6 +1725,134 @@ void phy_mac_interrupt(struct phy_device *phydev)</div><div class='ctx'> EXPORT_SYMBOL(phy_mac_interrupt);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * phy_loopback - Configure loopback mode of PHY</div><div class='add'>+ * @phydev: target phy_device struct</div><div class='add'>+ * @enable: enable or disable loopback mode</div><div class='add'>+ * @speed: enable loopback mode with speed</div><div class='add'>+ *</div><div class='add'>+ * Configure loopback mode of PHY and signal link down and link up if speed is</div><div class='add'>+ * changing.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int phy_loopback(struct phy_device *phydev, bool enable, int speed)</div><div class='add'>+{</div><div class='add'>+	bool link_up = false;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!phydev-&gt;drv)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;phydev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (enable &amp;&amp; phydev-&gt;loopback_enabled) {</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!enable &amp;&amp; !phydev-&gt;loopback_enabled) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		/*</div><div class='add'>+		 * Link up is signaled with a defined speed. If speed changes,</div><div class='add'>+		 * then first link down and after that link up needs to be</div><div class='add'>+		 * signaled.</div><div class='add'>+		 */</div><div class='add'>+		if (phydev-&gt;link &amp;&amp; phydev-&gt;state == PHY_RUNNING) {</div><div class='add'>+			/* link is up and signaled */</div><div class='add'>+			if (speed &amp;&amp; phydev-&gt;speed != speed) {</div><div class='add'>+				/* signal link down and up for new speed */</div><div class='add'>+				phydev-&gt;link = false;</div><div class='add'>+				phydev-&gt;state = PHY_NOLINK;</div><div class='add'>+				phy_link_down(phydev);</div><div class='add'>+</div><div class='add'>+				link_up = true;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			/* link is not signaled */</div><div class='add'>+			if (speed) {</div><div class='add'>+				/* signal link up for new speed */</div><div class='add'>+				link_up = true;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;drv-&gt;set_loopback)</div><div class='add'>+		ret = phydev-&gt;drv-&gt;set_loopback(phydev, enable, speed);</div><div class='add'>+	else</div><div class='add'>+		ret = genphy_loopback(phydev, enable, speed);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (enable) {</div><div class='add'>+			/* try to restore link if enabling loopback fails */</div><div class='add'>+			if (phydev-&gt;drv-&gt;set_loopback)</div><div class='add'>+				phydev-&gt;drv-&gt;set_loopback(phydev, false, 0);</div><div class='add'>+			else</div><div class='add'>+				genphy_loopback(phydev, false, 0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (link_up) {</div><div class='add'>+		phydev-&gt;link = true;</div><div class='add'>+		phydev-&gt;state = PHY_RUNNING;</div><div class='add'>+		phy_link_up(phydev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phydev-&gt;loopback_enabled = enable;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;phydev-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(phy_loopback);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_eee_tx_clock_stop_capable() - indicate whether the MAC can stop tx clock</div><div class='add'>+ * @phydev: target phy_device struct</div><div class='add'>+ *</div><div class='add'>+ * Indicate whether the MAC can disable the transmit xMII clock while in LPI</div><div class='add'>+ * state. Returns 1 if the MAC may stop the transmit clock, 0 if the MAC must</div><div class='add'>+ * not stop the transmit clock, or negative error.</div><div class='add'>+ */</div><div class='add'>+int phy_eee_tx_clock_stop_capable(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int stat1;</div><div class='add'>+</div><div class='add'>+	stat1 = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='add'>+	if (stat1 &lt; 0)</div><div class='add'>+		return stat1;</div><div class='add'>+</div><div class='add'>+	return !!(stat1 &amp; MDIO_PCS_STAT1_CLKSTOP_CAP);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_eee_tx_clock_stop_capable);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_eee_rx_clock_stop() - configure PHY receive clock in LPI</div><div class='add'>+ * @phydev: target phy_device struct</div><div class='add'>+ * @clk_stop_enable: flag to indicate whether the clock can be stopped</div><div class='add'>+ *</div><div class='add'>+ * Configure whether the PHY can disable its receive clock during LPI mode,</div><div class='add'>+ * See IEEE 802.3 sections 22.2.2.2, 35.2.2.10, and 45.2.3.1.4.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 or negative error.</div><div class='add'>+ */</div><div class='add'>+int phy_eee_rx_clock_stop(struct phy_device *phydev, bool clk_stop_enable)</div><div class='add'>+{</div><div class='add'>+	/* Configure the PHY to stop receiving xMII</div><div class='add'>+	 * clock while it is signaling LPI.</div><div class='add'>+	 */</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1,</div><div class='add'>+			      MDIO_PCS_CTRL1_CLKSTOP_EN,</div><div class='add'>+			      clk_stop_enable ? MDIO_PCS_CTRL1_CLKSTOP_EN : 0);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_eee_rx_clock_stop);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * phy_init_eee - init and check the EEE feature</div><div class='ctx'>  * @phydev: target phy_device struct</div><div class='ctx'>  * @clk_stop_enable: PHY may stop the clock during LPI</div><div class='hunk'>@@ -1605,18 +1869,14 @@ int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)</div><div class='ctx'> 	if (!phydev-&gt;drv)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	ret = genphy_c45_eee_is_active(phydev, NULL, NULL, NULL);</div><div class='add'>+	ret = genphy_c45_eee_is_active(phydev, NULL);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		return -EPROTONOSUPPORT;</div><div class='ctx'> </div><div class='ctx'> 	if (clk_stop_enable)</div><div class='del'>-		/* Configure the PHY to stop receiving xMII</div><div class='del'>-		 * clock while it is signaling LPI.</div><div class='del'>-		 */</div><div class='del'>-		ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1,</div><div class='del'>-				       MDIO_PCS_CTRL1_CLKSTOP_EN);</div><div class='add'>+		ret = phy_eee_rx_clock_stop(phydev, true);</div><div class='ctx'> </div><div class='ctx'> 	return ret &lt; 0 ? ret : 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1649,8 +1909,8 @@ EXPORT_SYMBOL(phy_get_eee_err);</div><div class='ctx'>  * @phydev: target phy_device struct</div><div class='ctx'>  * @data: ethtool_keee data</div><div class='ctx'>  *</div><div class='del'>- * Description: reports the Supported/Advertisement/LP Advertisement</div><div class='del'>- * capabilities, etc.</div><div class='add'>+ * Description: get the current EEE settings, filling in all members of</div><div class='add'>+ * @data.</div><div class='ctx'>  */</div><div class='ctx'> int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_keee *data)</div><div class='ctx'> {</div><div class='hunk'>@@ -1672,7 +1932,7 @@ EXPORT_SYMBOL(phy_ethtool_get_eee);</div><div class='ctx'>  * phy_ethtool_set_eee_noneg - Adjusts MAC LPI configuration without PHY</div><div class='ctx'>  *			       renegotiation</div><div class='ctx'>  * @phydev: pointer to the target PHY device structure</div><div class='del'>- * @data: pointer to the ethtool_keee structure containing the new EEE settings</div><div class='add'>+ * @old_cfg: pointer to the eee_config structure containing the old EEE settings</div><div class='ctx'>  *</div><div class='ctx'>  * This function updates the Energy Efficient Ethernet (EEE) configuration</div><div class='ctx'>  * for cases where only the MAC's Low Power Idle (LPI) configuration changes,</div><div class='hunk'>@@ -1683,18 +1943,23 @@ EXPORT_SYMBOL(phy_ethtool_get_eee);</div><div class='ctx'>  * configuration.</div><div class='ctx'>  */</div><div class='ctx'> static void phy_ethtool_set_eee_noneg(struct phy_device *phydev,</div><div class='del'>-				      struct ethtool_keee *data)</div><div class='add'>+				      const struct eee_config *old_cfg)</div><div class='ctx'> {</div><div class='del'>-	if (phydev-&gt;eee_cfg.tx_lpi_enabled != data-&gt;tx_lpi_enabled ||</div><div class='del'>-	    phydev-&gt;eee_cfg.tx_lpi_timer != data-&gt;tx_lpi_timer) {</div><div class='del'>-		eee_to_eeecfg(&amp;phydev-&gt;eee_cfg, data);</div><div class='del'>-		phydev-&gt;enable_tx_lpi = eeecfg_mac_can_tx_lpi(&amp;phydev-&gt;eee_cfg);</div><div class='del'>-		if (phydev-&gt;link) {</div><div class='del'>-			phydev-&gt;link = false;</div><div class='del'>-			phy_link_down(phydev);</div><div class='del'>-			phydev-&gt;link = true;</div><div class='del'>-			phy_link_up(phydev);</div><div class='del'>-		}</div><div class='add'>+	bool enable_tx_lpi;</div><div class='add'>+</div><div class='add'>+	if (!phydev-&gt;link)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	enable_tx_lpi = phydev-&gt;eee_cfg.tx_lpi_enabled &amp;&amp; phydev-&gt;eee_active;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;enable_tx_lpi != enable_tx_lpi ||</div><div class='add'>+	    phydev-&gt;eee_cfg.tx_lpi_timer != old_cfg-&gt;tx_lpi_timer) {</div><div class='add'>+		phydev-&gt;enable_tx_lpi = false;</div><div class='add'>+		phydev-&gt;link = false;</div><div class='add'>+		phy_link_down(phydev);</div><div class='add'>+		phydev-&gt;enable_tx_lpi = enable_tx_lpi;</div><div class='add'>+		phydev-&gt;link = true;</div><div class='add'>+		phy_link_up(phydev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1707,18 +1972,23 @@ static void phy_ethtool_set_eee_noneg(struct phy_device *phydev,</div><div class='ctx'>  */</div><div class='ctx'> int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_keee *data)</div><div class='ctx'> {</div><div class='add'>+	struct eee_config old_cfg;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!phydev-&gt;drv)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;phydev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	old_cfg = phydev-&gt;eee_cfg;</div><div class='add'>+	eee_to_eeecfg(&amp;phydev-&gt;eee_cfg, data);</div><div class='add'>+</div><div class='ctx'> 	ret = genphy_c45_ethtool_set_eee(phydev, data);</div><div class='del'>-	if (ret &gt;= 0) {</div><div class='del'>-		if (ret == 0)</div><div class='del'>-			phy_ethtool_set_eee_noneg(phydev, data);</div><div class='del'>-		eee_to_eeecfg(&amp;phydev-&gt;eee_cfg, data);</div><div class='del'>-	}</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		phy_ethtool_set_eee_noneg(phydev, &amp;old_cfg);</div><div class='add'>+	else if (ret &lt; 0)</div><div class='add'>+		phydev-&gt;eee_cfg = old_cfg;</div><div class='add'>+</div><div class='ctx'> 	mutex_unlock(&amp;phydev-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret &lt; 0 ? ret : 0;</div><div class='head'>diff --git a/drivers/net/phy/phy_caps.c b/drivers/net/phy/phy_caps.c<br/>new file mode 100644<br/>index 000000000000..3a05982b39bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy_caps.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phy_caps.c</a></div><div class='hunk'>@@ -0,0 +1,380 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/linkmode.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#include "phy-caps.h"</div><div class='add'>+</div><div class='add'>+static struct link_capabilities link_caps[__LINK_CAPA_MAX] __ro_after_init = {</div><div class='add'>+	{ SPEED_10, DUPLEX_HALF, {0} }, /* LINK_CAPA_10HD */</div><div class='add'>+	{ SPEED_10, DUPLEX_FULL, {0} }, /* LINK_CAPA_10FD */</div><div class='add'>+	{ SPEED_100, DUPLEX_HALF, {0} }, /* LINK_CAPA_100HD */</div><div class='add'>+	{ SPEED_100, DUPLEX_FULL, {0} }, /* LINK_CAPA_100FD */</div><div class='add'>+	{ SPEED_1000, DUPLEX_HALF, {0} }, /* LINK_CAPA_1000HD */</div><div class='add'>+	{ SPEED_1000, DUPLEX_FULL, {0} }, /* LINK_CAPA_1000FD */</div><div class='add'>+	{ SPEED_2500, DUPLEX_FULL, {0} }, /* LINK_CAPA_2500FD */</div><div class='add'>+	{ SPEED_5000, DUPLEX_FULL, {0} }, /* LINK_CAPA_5000FD */</div><div class='add'>+	{ SPEED_10000, DUPLEX_FULL, {0} }, /* LINK_CAPA_10000FD */</div><div class='add'>+	{ SPEED_20000, DUPLEX_FULL, {0} }, /* LINK_CAPA_20000FD */</div><div class='add'>+	{ SPEED_25000, DUPLEX_FULL, {0} }, /* LINK_CAPA_25000FD */</div><div class='add'>+	{ SPEED_40000, DUPLEX_FULL, {0} }, /* LINK_CAPA_40000FD */</div><div class='add'>+	{ SPEED_50000, DUPLEX_FULL, {0} }, /* LINK_CAPA_50000FD */</div><div class='add'>+	{ SPEED_56000, DUPLEX_FULL, {0} }, /* LINK_CAPA_56000FD */</div><div class='add'>+	{ SPEED_100000, DUPLEX_FULL, {0} }, /* LINK_CAPA_100000FD */</div><div class='add'>+	{ SPEED_200000, DUPLEX_FULL, {0} }, /* LINK_CAPA_200000FD */</div><div class='add'>+	{ SPEED_400000, DUPLEX_FULL, {0} }, /* LINK_CAPA_400000FD */</div><div class='add'>+	{ SPEED_800000, DUPLEX_FULL, {0} }, /* LINK_CAPA_800000FD */</div><div class='add'>+	{ SPEED_1600000, DUPLEX_FULL, {0} }, /* LINK_CAPA_1600000FD */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int speed_duplex_to_capa(int speed, unsigned int duplex)</div><div class='add'>+{</div><div class='add'>+	if (duplex == DUPLEX_UNKNOWN ||</div><div class='add'>+	    (speed &gt; SPEED_1000 &amp;&amp; duplex != DUPLEX_FULL))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10: return duplex == DUPLEX_FULL ?</div><div class='add'>+			      LINK_CAPA_10FD : LINK_CAPA_10HD;</div><div class='add'>+	case SPEED_100: return duplex == DUPLEX_FULL ?</div><div class='add'>+			       LINK_CAPA_100FD : LINK_CAPA_100HD;</div><div class='add'>+	case SPEED_1000: return duplex == DUPLEX_FULL ?</div><div class='add'>+				LINK_CAPA_1000FD : LINK_CAPA_1000HD;</div><div class='add'>+	case SPEED_2500: return LINK_CAPA_2500FD;</div><div class='add'>+	case SPEED_5000: return LINK_CAPA_5000FD;</div><div class='add'>+	case SPEED_10000: return LINK_CAPA_10000FD;</div><div class='add'>+	case SPEED_20000: return LINK_CAPA_20000FD;</div><div class='add'>+	case SPEED_25000: return LINK_CAPA_25000FD;</div><div class='add'>+	case SPEED_40000: return LINK_CAPA_40000FD;</div><div class='add'>+	case SPEED_50000: return LINK_CAPA_50000FD;</div><div class='add'>+	case SPEED_56000: return LINK_CAPA_56000FD;</div><div class='add'>+	case SPEED_100000: return LINK_CAPA_100000FD;</div><div class='add'>+	case SPEED_200000: return LINK_CAPA_200000FD;</div><div class='add'>+	case SPEED_400000: return LINK_CAPA_400000FD;</div><div class='add'>+	case SPEED_800000: return LINK_CAPA_800000FD;</div><div class='add'>+	case SPEED_1600000: return LINK_CAPA_1600000FD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define for_each_link_caps_asc_speed(cap) \</div><div class='add'>+	for (cap = link_caps; cap &lt; &amp;link_caps[__LINK_CAPA_MAX]; cap++)</div><div class='add'>+</div><div class='add'>+#define for_each_link_caps_desc_speed(cap) \</div><div class='add'>+	for (cap = &amp;link_caps[__LINK_CAPA_MAX - 1]; cap &gt;= link_caps; cap--)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_caps_init() - Initializes the link_caps array from the link_mode_params.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 if phy caps init was successful, -EINVAL if we found an</div><div class='add'>+ *	    unexpected linkmode setting that requires LINK_CAPS update.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+int __init phy_caps_init(void)</div><div class='add'>+{</div><div class='add'>+	const struct link_mode_info *linkmode;</div><div class='add'>+	int i, capa;</div><div class='add'>+</div><div class='add'>+	/* Fill the caps array from net/ethtool/common.c */</div><div class='add'>+	for (i = 0; i &lt; __ETHTOOL_LINK_MODE_MASK_NBITS; i++) {</div><div class='add'>+		linkmode = &amp;link_mode_params[i];</div><div class='add'>+		capa = speed_duplex_to_capa(linkmode-&gt;speed, linkmode-&gt;duplex);</div><div class='add'>+</div><div class='add'>+		if (capa &lt; 0) {</div><div class='add'>+			if (linkmode-&gt;speed != SPEED_UNKNOWN) {</div><div class='add'>+				pr_err("Unknown speed %d, please update LINK_CAPS\n",</div><div class='add'>+				       linkmode-&gt;speed);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		__set_bit(i, link_caps[capa].linkmodes);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_caps_speeds() - Fill an array of supported SPEED_* values for given modes</div><div class='add'>+ * @speeds: Output array to store the speeds list into</div><div class='add'>+ * @size: Size of the output array</div><div class='add'>+ * @linkmodes: Linkmodes to get the speeds from</div><div class='add'>+ *</div><div class='add'>+ * Fills the speeds array with all possible speeds that can be achieved with</div><div class='add'>+ * the specified linkmodes.</div><div class='add'>+ *</div><div class='add'>+ * Returns: The number of speeds filled into the array. If the input array isn't</div><div class='add'>+ *	    big enough to store all speeds, fill it as much as possible.</div><div class='add'>+ */</div><div class='add'>+size_t phy_caps_speeds(unsigned int *speeds, size_t size,</div><div class='add'>+		       unsigned long *linkmodes)</div><div class='add'>+{</div><div class='add'>+	struct link_capabilities *lcap;</div><div class='add'>+	size_t count = 0;</div><div class='add'>+</div><div class='add'>+	for_each_link_caps_asc_speed(lcap) {</div><div class='add'>+		if (linkmode_intersects(lcap-&gt;linkmodes, linkmodes) &amp;&amp;</div><div class='add'>+		    (count == 0 || speeds[count - 1] != lcap-&gt;speed)) {</div><div class='add'>+			speeds[count++] = lcap-&gt;speed;</div><div class='add'>+			if (count &gt;= size)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_caps_lookup_by_linkmode() - Lookup the fastest matching link_capabilities</div><div class='add'>+ * @linkmodes: Linkmodes to match against</div><div class='add'>+ *</div><div class='add'>+ * Returns: The highest-speed link_capabilities that intersects the given</div><div class='add'>+ *	    linkmodes. In case several DUPLEX_ options exist at that speed,</div><div class='add'>+ *	    DUPLEX_FULL is matched first. NULL is returned if no match.</div><div class='add'>+ */</div><div class='add'>+const struct link_capabilities *</div><div class='add'>+phy_caps_lookup_by_linkmode(const unsigned long *linkmodes)</div><div class='add'>+{</div><div class='add'>+	struct link_capabilities *lcap;</div><div class='add'>+</div><div class='add'>+	for_each_link_caps_desc_speed(lcap)</div><div class='add'>+		if (linkmode_intersects(lcap-&gt;linkmodes, linkmodes))</div><div class='add'>+			return lcap;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_caps_lookup_by_linkmode_rev() - Lookup the slowest matching link_capabilities</div><div class='add'>+ * @linkmodes: Linkmodes to match against</div><div class='add'>+ * @fdx_only: Full duplex match only when set</div><div class='add'>+ *</div><div class='add'>+ * Returns: The lowest-speed link_capabilities that intersects the given</div><div class='add'>+ *	    linkmodes. When set, fdx_only will ignore half-duplex matches.</div><div class='add'>+ *	    NULL is returned if no match.</div><div class='add'>+ */</div><div class='add'>+const struct link_capabilities *</div><div class='add'>+phy_caps_lookup_by_linkmode_rev(const unsigned long *linkmodes, bool fdx_only)</div><div class='add'>+{</div><div class='add'>+	struct link_capabilities *lcap;</div><div class='add'>+</div><div class='add'>+	for_each_link_caps_asc_speed(lcap) {</div><div class='add'>+		if (fdx_only &amp;&amp; lcap-&gt;duplex != DUPLEX_FULL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (linkmode_intersects(lcap-&gt;linkmodes, linkmodes))</div><div class='add'>+			return lcap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_caps_lookup() - Lookup capabilities by speed/duplex that matches a mask</div><div class='add'>+ * @speed: Speed to match</div><div class='add'>+ * @duplex: Duplex to match</div><div class='add'>+ * @supported: Mask of linkmodes to match</div><div class='add'>+ * @exact: Perform an exact match or not.</div><div class='add'>+ *</div><div class='add'>+ * Lookup a link_capabilities entry that intersect the supported linkmodes mask,</div><div class='add'>+ * and that matches the passed speed and duplex.</div><div class='add'>+ *</div><div class='add'>+ * When @exact is set, an exact match is performed on speed and duplex, meaning</div><div class='add'>+ * that if the linkmodes for the given speed and duplex intersect the supported</div><div class='add'>+ * mask, this capability is returned, otherwise we don't have a match and return</div><div class='add'>+ * NULL.</div><div class='add'>+ *</div><div class='add'>+ * When @exact is not set, we return either an exact match, or matching capabilities</div><div class='add'>+ * at lower speed, or the lowest matching speed, or NULL.</div><div class='add'>+ *</div><div class='add'>+ * Non-exact matches will try to return an exact speed and duplex match, but may</div><div class='add'>+ * return matching capabilities with same speed but a different duplex.</div><div class='add'>+ *</div><div class='add'>+ * Returns: a matched link_capabilities according to the above process, NULL</div><div class='add'>+ *	    otherwise.</div><div class='add'>+ */</div><div class='add'>+const struct link_capabilities *</div><div class='add'>+phy_caps_lookup(int speed, unsigned int duplex, const unsigned long *supported,</div><div class='add'>+		bool exact)</div><div class='add'>+{</div><div class='add'>+	const struct link_capabilities *lcap, *match = NULL, *last = NULL;</div><div class='add'>+</div><div class='add'>+	for_each_link_caps_desc_speed(lcap) {</div><div class='add'>+		if (linkmode_intersects(lcap-&gt;linkmodes, supported)) {</div><div class='add'>+			last = lcap;</div><div class='add'>+			/* exact match on speed and duplex*/</div><div class='add'>+			if (lcap-&gt;speed == speed &amp;&amp; lcap-&gt;duplex == duplex) {</div><div class='add'>+				return lcap;</div><div class='add'>+			} else if (!exact) {</div><div class='add'>+				if (!match &amp;&amp; lcap-&gt;speed &lt;= speed)</div><div class='add'>+					match = lcap;</div><div class='add'>+</div><div class='add'>+				if (lcap-&gt;speed &lt; speed)</div><div class='add'>+					break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!match &amp;&amp; !exact)</div><div class='add'>+		match = last;</div><div class='add'>+</div><div class='add'>+	return match;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_caps_lookup);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_caps_linkmode_max_speed() - Clamp a linkmodes set to a max speed</div><div class='add'>+ * @max_speed: Speed limit for the linkmode set</div><div class='add'>+ * @linkmodes: Linkmodes to limit</div><div class='add'>+ */</div><div class='add'>+void phy_caps_linkmode_max_speed(u32 max_speed, unsigned long *linkmodes)</div><div class='add'>+{</div><div class='add'>+	struct link_capabilities *lcap;</div><div class='add'>+</div><div class='add'>+	for_each_link_caps_desc_speed(lcap)</div><div class='add'>+		if (lcap-&gt;speed &gt; max_speed)</div><div class='add'>+			linkmode_andnot(linkmodes, linkmodes, lcap-&gt;linkmodes);</div><div class='add'>+		else</div><div class='add'>+			break;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_caps_valid() - Validate a linkmodes set agains given speed and duplex</div><div class='add'>+ * @speed: input speed to validate</div><div class='add'>+ * @duplex: input duplex to validate. Passing DUPLEX_UNKNOWN is always not valid</div><div class='add'>+ * @linkmodes: The linkmodes to validate</div><div class='add'>+ *</div><div class='add'>+ * Returns: True if at least one of the linkmodes in @linkmodes can function at</div><div class='add'>+ *          the given speed and duplex, false otherwise.</div><div class='add'>+ */</div><div class='add'>+bool phy_caps_valid(int speed, int duplex, const unsigned long *linkmodes)</div><div class='add'>+{</div><div class='add'>+	int capa = speed_duplex_to_capa(speed, duplex);</div><div class='add'>+</div><div class='add'>+	if (capa &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return linkmode_intersects(link_caps[capa].linkmodes, linkmodes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_caps_linkmodes() - Convert a bitfield of capabilities into linkmodes</div><div class='add'>+ * @caps: The list of caps, each bit corresponding to a LINK_CAPA value</div><div class='add'>+ * @linkmodes: The set of linkmodes to fill. Must be previously initialized.</div><div class='add'>+ */</div><div class='add'>+void phy_caps_linkmodes(unsigned long caps, unsigned long *linkmodes)</div><div class='add'>+{</div><div class='add'>+	unsigned long capa;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(capa, &amp;caps, __LINK_CAPA_MAX)</div><div class='add'>+		linkmode_or(linkmodes, linkmodes, link_caps[capa].linkmodes);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_caps_linkmodes);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_caps_from_interface() - Get the link capa from a given PHY interface</div><div class='add'>+ * @interface: The PHY interface we want to get the possible Speed/Duplex from</div><div class='add'>+ *</div><div class='add'>+ * Returns: A bitmask of LINK_CAPA_xxx values that can be achieved with the</div><div class='add'>+ *          provided interface.</div><div class='add'>+ */</div><div class='add'>+unsigned long phy_caps_from_interface(phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	unsigned long link_caps = 0;</div><div class='add'>+</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_10000FD) | BIT(LINK_CAPA_5000FD);</div><div class='add'>+		fallthrough;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_10G_QXGMII:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_2500FD);</div><div class='add'>+		fallthrough;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_PSGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_QSGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_QUSGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_GMII:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_1000HD) | BIT(LINK_CAPA_1000FD);</div><div class='add'>+		fallthrough;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_REVRMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_SMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_REVMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_10HD) | BIT(LINK_CAPA_10FD);</div><div class='add'>+		fallthrough;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_100BASEX:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_100HD) | BIT(LINK_CAPA_100FD);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_MIILITE:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_10FD) | BIT(LINK_CAPA_100FD);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_TBI:</div><div class='add'>+	case PHY_INTERFACE_MODE_MOCA:</div><div class='add'>+	case PHY_INTERFACE_MODE_RTBI:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_1000HD);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEKX:</div><div class='add'>+	case PHY_INTERFACE_MODE_TRGMII:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_1000FD);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_2500FD);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_5GBASER:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_5000FD);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_XGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RXAUI:</div><div class='add'>+	case PHY_INTERFACE_MODE_XAUI:</div><div class='add'>+	case PHY_INTERFACE_MODE_10GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_10GKR:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_10000FD);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_25GBASER:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_25000FD);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_XLGMII:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_40000FD);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_50GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_LAUI:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_50000FD);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_100GBASEP:</div><div class='add'>+		link_caps |= BIT(LINK_CAPA_100000FD);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_INTERNAL:</div><div class='add'>+		link_caps |= LINK_CAPA_ALL;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_NA:</div><div class='add'>+	case PHY_INTERFACE_MODE_MAX:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return link_caps;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_caps_from_interface);</div><div class='head'>diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c<br/>index 563497a3274c..81984d4ebb7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy_device.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy_device.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy_device.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phy_device.c</a></div><div class='hunk'>@@ -32,6 +32,7 @@</div><div class='ctx'> #include &lt;linux/phy_link_topology.h&gt;</div><div class='ctx'> #include &lt;linux/pse-pd/pse.h&gt;</div><div class='ctx'> #include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;linux/sfp.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='hunk'>@@ -40,10 +41,31 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/unistd.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "phylib-internal.h"</div><div class='add'>+#include "phy-caps.h"</div><div class='add'>+</div><div class='ctx'> MODULE_DESCRIPTION("PHY library");</div><div class='ctx'> MODULE_AUTHOR("Andy Fleming");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='add'>+#define	PHY_ANY_ID	"MATCH ANY PHY"</div><div class='add'>+#define	PHY_ANY_UID	0xffffffff</div><div class='add'>+</div><div class='add'>+struct phy_fixup {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	char bus_id[MII_BUS_ID_SIZE + 3];</div><div class='add'>+	u32 phy_uid;</div><div class='add'>+	u32 phy_uid_mask;</div><div class='add'>+	int (*run)(struct phy_device *phydev);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct phy_driver genphy_c45_driver = {</div><div class='add'>+	.phy_id         = 0xffffffff,</div><div class='add'>+	.phy_id_mask    = 0xffffffff,</div><div class='add'>+	.name           = "Generic Clause 45 PHY",</div><div class='add'>+	.read_status    = genphy_c45_read_status,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;</div><div class='ctx'> EXPORT_SYMBOL_GPL(phy_basic_features);</div><div class='ctx'> </div><div class='hunk'>@@ -59,15 +81,9 @@ EXPORT_SYMBOL_GPL(phy_gbit_features);</div><div class='ctx'> __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;</div><div class='ctx'> EXPORT_SYMBOL_GPL(phy_gbit_fibre_features);</div><div class='ctx'> </div><div class='del'>-__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_gbit_all_ports_features);</div><div class='del'>-</div><div class='ctx'> __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;</div><div class='ctx'> EXPORT_SYMBOL_GPL(phy_10gbit_features);</div><div class='ctx'> </div><div class='del'>-__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_10gbit_fec_features);</div><div class='del'>-</div><div class='ctx'> const int phy_basic_ports_array[3] = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_Autoneg_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_TP_BIT,</div><div class='hunk'>@@ -75,12 +91,7 @@ const int phy_basic_ports_array[3] = {</div><div class='ctx'> };</div><div class='ctx'> EXPORT_SYMBOL_GPL(phy_basic_ports_array);</div><div class='ctx'> </div><div class='del'>-const int phy_fibre_port_array[1] = {</div><div class='del'>-	ETHTOOL_LINK_MODE_FIBRE_BIT,</div><div class='del'>-};</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_fibre_port_array);</div><div class='del'>-</div><div class='del'>-const int phy_all_ports_features_array[7] = {</div><div class='add'>+static const int phy_all_ports_features_array[7] __initconst = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_Autoneg_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_TP_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_MII_BIT,</div><div class='hunk'>@@ -89,55 +100,31 @@ const int phy_all_ports_features_array[7] = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_BNC_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_Backplane_BIT,</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_all_ports_features_array);</div><div class='ctx'> </div><div class='del'>-const int phy_10_100_features_array[4] = {</div><div class='add'>+static const int phy_10_100_features_array[4] __initconst = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_10baseT_Half_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_10baseT_Full_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_100baseT_Half_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_100baseT_Full_BIT,</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_10_100_features_array);</div><div class='ctx'> </div><div class='del'>-const int phy_basic_t1_features_array[3] = {</div><div class='add'>+static const int phy_basic_t1_features_array[3] __initconst = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_TP_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_10baseT1L_Full_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_100baseT1_Full_BIT,</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_basic_t1_features_array);</div><div class='ctx'> </div><div class='del'>-const int phy_basic_t1s_p2mp_features_array[2] = {</div><div class='add'>+static const int phy_basic_t1s_p2mp_features_array[2] __initconst = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_TP_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT,</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_basic_t1s_p2mp_features_array);</div><div class='ctx'> </div><div class='del'>-const int phy_gbit_features_array[2] = {</div><div class='add'>+static const int phy_gbit_features_array[2] __initconst = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_1000baseT_Half_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_1000baseT_Full_BIT,</div><div class='ctx'> };</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_gbit_features_array);</div><div class='del'>-</div><div class='del'>-const int phy_10gbit_features_array[1] = {</div><div class='del'>-	ETHTOOL_LINK_MODE_10000baseT_Full_BIT,</div><div class='del'>-};</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_10gbit_features_array);</div><div class='del'>-</div><div class='del'>-static const int phy_10gbit_fec_features_array[1] = {</div><div class='del'>-	ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_10gbit_full_features);</div><div class='del'>-</div><div class='del'>-static const int phy_10gbit_full_features_array[] = {</div><div class='del'>-	ETHTOOL_LINK_MODE_10baseT_Full_BIT,</div><div class='del'>-	ETHTOOL_LINK_MODE_100baseT_Full_BIT,</div><div class='del'>-	ETHTOOL_LINK_MODE_1000baseT_Full_BIT,</div><div class='del'>-	ETHTOOL_LINK_MODE_10000baseT_Full_BIT,</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-static const int phy_eee_cap1_features_array[] = {</div><div class='add'>+static const int phy_eee_cap1_features_array[] __initconst = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_100baseT_Full_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_1000baseT_Full_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_10000baseT_Full_BIT,</div><div class='hunk'>@@ -149,7 +136,7 @@ static const int phy_eee_cap1_features_array[] = {</div><div class='ctx'> __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap1_features) __ro_after_init;</div><div class='ctx'> EXPORT_SYMBOL_GPL(phy_eee_cap1_features);</div><div class='ctx'> </div><div class='del'>-static const int phy_eee_cap2_features_array[] = {</div><div class='add'>+static const int phy_eee_cap2_features_array[] __initconst = {</div><div class='ctx'> 	ETHTOOL_LINK_MODE_2500baseT_Full_BIT,</div><div class='ctx'> 	ETHTOOL_LINK_MODE_5000baseT_Full_BIT,</div><div class='ctx'> };</div><div class='hunk'>@@ -157,7 +144,7 @@ static const int phy_eee_cap2_features_array[] = {</div><div class='ctx'> __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_eee_cap2_features) __ro_after_init;</div><div class='ctx'> EXPORT_SYMBOL_GPL(phy_eee_cap2_features);</div><div class='ctx'> </div><div class='del'>-static void features_init(void)</div><div class='add'>+static void __init features_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	/* 10/100 half/full*/</div><div class='ctx'> 	linkmode_set_bit_array(phy_basic_ports_array,</div><div class='hunk'>@@ -198,20 +185,7 @@ static void features_init(void)</div><div class='ctx'> 	linkmode_set_bit_array(phy_gbit_features_array,</div><div class='ctx'> 			       ARRAY_SIZE(phy_gbit_features_array),</div><div class='ctx'> 			       phy_gbit_fibre_features);</div><div class='del'>-	linkmode_set_bit_array(phy_fibre_port_array,</div><div class='del'>-			       ARRAY_SIZE(phy_fibre_port_array),</div><div class='del'>-			       phy_gbit_fibre_features);</div><div class='del'>-</div><div class='del'>-	/* 10/100 half/full + 1000 half/full + TP/MII/FIBRE/AUI/BNC/Backplane*/</div><div class='del'>-	linkmode_set_bit_array(phy_all_ports_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_all_ports_features_array),</div><div class='del'>-			       phy_gbit_all_ports_features);</div><div class='del'>-	linkmode_set_bit_array(phy_10_100_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_10_100_features_array),</div><div class='del'>-			       phy_gbit_all_ports_features);</div><div class='del'>-	linkmode_set_bit_array(phy_gbit_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_gbit_features_array),</div><div class='del'>-			       phy_gbit_all_ports_features);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phy_gbit_fibre_features);</div><div class='ctx'> </div><div class='ctx'> 	/* 10/100 half/full + 1000 half/full + 10G full*/</div><div class='ctx'> 	linkmode_set_bit_array(phy_all_ports_features_array,</div><div class='hunk'>@@ -223,21 +197,9 @@ static void features_init(void)</div><div class='ctx'> 	linkmode_set_bit_array(phy_gbit_features_array,</div><div class='ctx'> 			       ARRAY_SIZE(phy_gbit_features_array),</div><div class='ctx'> 			       phy_10gbit_features);</div><div class='del'>-	linkmode_set_bit_array(phy_10gbit_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_10gbit_features_array),</div><div class='del'>-			       phy_10gbit_features);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,</div><div class='add'>+			 phy_10gbit_features);</div><div class='ctx'> </div><div class='del'>-	/* 10/100/1000/10G full */</div><div class='del'>-	linkmode_set_bit_array(phy_all_ports_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_all_ports_features_array),</div><div class='del'>-			       phy_10gbit_full_features);</div><div class='del'>-	linkmode_set_bit_array(phy_10gbit_full_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_10gbit_full_features_array),</div><div class='del'>-			       phy_10gbit_full_features);</div><div class='del'>-	/* 10G FEC only */</div><div class='del'>-	linkmode_set_bit_array(phy_10gbit_fec_features_array,</div><div class='del'>-			       ARRAY_SIZE(phy_10gbit_fec_features_array),</div><div class='del'>-			       phy_10gbit_fec_features);</div><div class='ctx'> 	linkmode_set_bit_array(phy_eee_cap1_features_array,</div><div class='ctx'> 			       ARRAY_SIZE(phy_eee_cap1_features_array),</div><div class='ctx'> 			       phy_eee_cap1_features);</div><div class='hunk'>@@ -289,6 +251,55 @@ static bool phy_drv_wol_enabled(struct phy_device *phydev)</div><div class='ctx'> 	return wol.wolopts != 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool phy_may_wakeup(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	/* If the PHY is using driver-model based wakeup, use that state. */</div><div class='add'>+	if (phy_can_wakeup(phydev))</div><div class='add'>+		return device_may_wakeup(&amp;phydev-&gt;mdio.dev);</div><div class='add'>+</div><div class='add'>+	return phy_drv_wol_enabled(phydev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_may_wakeup);</div><div class='add'>+</div><div class='add'>+static void phy_link_change(struct phy_device *phydev, bool up)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = phydev-&gt;attached_dev;</div><div class='add'>+</div><div class='add'>+	if (up)</div><div class='add'>+		netif_carrier_on(netdev);</div><div class='add'>+	else</div><div class='add'>+		netif_carrier_off(netdev);</div><div class='add'>+	phydev-&gt;adjust_link(netdev);</div><div class='add'>+	if (phydev-&gt;mii_ts &amp;&amp; phydev-&gt;mii_ts-&gt;link_state)</div><div class='add'>+		phydev-&gt;mii_ts-&gt;link_state(phydev-&gt;mii_ts, phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_uses_state_machine - test whether consumer driver uses PAL state machine</div><div class='add'>+ * @phydev: the target PHY device structure</div><div class='add'>+ *</div><div class='add'>+ * Ultimately, this aims to indirectly determine whether the PHY is attached</div><div class='add'>+ * to a consumer which uses the state machine by calling phy_start() and</div><div class='add'>+ * phy_stop().</div><div class='add'>+ *</div><div class='add'>+ * When the PHY driver consumer uses phylib, it must have previously called</div><div class='add'>+ * phy_connect_direct() or one of its derivatives, so that phy_prepare_link()</div><div class='add'>+ * has set up a hook for monitoring state changes.</div><div class='add'>+ *</div><div class='add'>+ * When the PHY driver is used by the MAC driver consumer through phylink (the</div><div class='add'>+ * only other provider of a phy_link_change() method), using the PHY state</div><div class='add'>+ * machine is not optional.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if consumer calls phy_start() and phy_stop(), false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool phy_uses_state_machine(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	if (phydev-&gt;phy_link_change == phy_link_change)</div><div class='add'>+		return phydev-&gt;attached_dev &amp;&amp; phydev-&gt;adjust_link;</div><div class='add'>+</div><div class='add'>+	return !!phydev-&gt;phy_link_change;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool mdio_bus_phy_may_suspend(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_driver *drv = phydev-&gt;mdio.dev.driver;</div><div class='hunk'>@@ -301,7 +312,7 @@ static bool mdio_bus_phy_may_suspend(struct phy_device *phydev)</div><div class='ctx'> 	/* If the PHY on the mido bus is not attached but has WOL enabled</div><div class='ctx'> 	 * we cannot suspend the PHY.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!netdev &amp;&amp; phy_drv_wol_enabled(phydev))</div><div class='add'>+	if (!netdev &amp;&amp; phy_may_wakeup(phydev))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	/* PHY not attached? May suspend if the PHY has not already been</div><div class='hunk'>@@ -355,7 +366,7 @@ static __maybe_unused int mdio_bus_phy_suspend(struct device *dev)</div><div class='ctx'> 	 * may call phy routines that try to grab the same lock, and that may</div><div class='ctx'> 	 * lead to a deadlock.</div><div class='ctx'> 	 */</div><div class='del'>-	if (phydev-&gt;attached_dev &amp;&amp; phydev-&gt;adjust_link)</div><div class='add'>+	if (phy_uses_state_machine(phydev))</div><div class='ctx'> 		phy_stop_machine(phydev);</div><div class='ctx'> </div><div class='ctx'> 	if (!mdio_bus_phy_may_suspend(phydev))</div><div class='hunk'>@@ -409,7 +420,7 @@ no_resume:</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (phydev-&gt;attached_dev &amp;&amp; phydev-&gt;adjust_link)</div><div class='add'>+	if (phy_uses_state_machine(phydev))</div><div class='ctx'> 		phy_start_machine(phydev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -427,8 +438,8 @@ static SIMPLE_DEV_PM_OPS(mdio_bus_phy_pm_ops, mdio_bus_phy_suspend,</div><div class='ctx'>  *	comparison</div><div class='ctx'>  * @run: The actual code to be run when a matching PHY is found</div><div class='ctx'>  */</div><div class='del'>-int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,</div><div class='del'>-		       int (*run)(struct phy_device *))</div><div class='add'>+static int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,</div><div class='add'>+			      int (*run)(struct phy_device *))</div><div class='ctx'> {</div><div class='ctx'> 	struct phy_fixup *fixup = kzalloc(sizeof(*fixup), GFP_KERNEL);</div><div class='ctx'> </div><div class='hunk'>@@ -446,7 +457,6 @@ int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(phy_register_fixup);</div><div class='ctx'> </div><div class='ctx'> /* Registers a fixup to be run on any PHY with the UID in phy_uid */</div><div class='ctx'> int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,</div><div class='hunk'>@@ -549,20 +559,26 @@ static int phy_scan_fixups(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int phy_bus_match(struct device *dev, const struct device_driver *drv)</div><div class='add'>+/**</div><div class='add'>+ * genphy_match_phy_device - match a PHY device with a PHY driver</div><div class='add'>+ * @phydev: target phy_device struct</div><div class='add'>+ * @phydrv: target phy_driver struct</div><div class='add'>+ *</div><div class='add'>+ * Description: Checks whether the given PHY device matches the specified</div><div class='add'>+ * PHY driver. For Clause 45 PHYs, iterates over the available device</div><div class='add'>+ * identifiers and compares them against the driver's expected PHY ID,</div><div class='add'>+ * applying the provided mask. For Clause 22 PHYs, a direct ID comparison</div><div class='add'>+ * is performed.</div><div class='add'>+ *</div><div class='add'>+ * Return: 1 if the PHY device matches the driver, 0 otherwise.</div><div class='add'>+ */</div><div class='add'>+int genphy_match_phy_device(struct phy_device *phydev,</div><div class='add'>+			    const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='del'>-	struct phy_device *phydev = to_phy_device(dev);</div><div class='del'>-	const struct phy_driver *phydrv = to_phy_driver(drv);</div><div class='del'>-	const int num_ids = ARRAY_SIZE(phydev-&gt;c45_ids.device_ids);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!(phydrv-&gt;mdiodrv.flags &amp; MDIO_DEVICE_IS_PHY))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (phydrv-&gt;match_phy_device)</div><div class='del'>-		return phydrv-&gt;match_phy_device(phydev);</div><div class='del'>-</div><div class='ctx'> 	if (phydev-&gt;is_c45) {</div><div class='add'>+		const int num_ids = ARRAY_SIZE(phydev-&gt;c45_ids.device_ids);</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='ctx'> 		for (i = 1; i &lt; num_ids; i++) {</div><div class='ctx'> 			if (phydev-&gt;c45_ids.device_ids[i] == 0xffffffff)</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -571,11 +587,27 @@ static int phy_bus_match(struct device *dev, const struct device_driver *drv)</div><div class='ctx'> 					   phydrv-&gt;phy_id, phydrv-&gt;phy_id_mask))</div><div class='ctx'> 				return 1;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		return 0;</div><div class='del'>-	} else {</div><div class='del'>-		return phy_id_compare(phydev-&gt;phy_id, phydrv-&gt;phy_id,</div><div class='del'>-				      phydrv-&gt;phy_id_mask);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return phy_id_compare(phydev-&gt;phy_id, phydrv-&gt;phy_id,</div><div class='add'>+			      phydrv-&gt;phy_id_mask);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(genphy_match_phy_device);</div><div class='add'>+</div><div class='add'>+static int phy_bus_match(struct device *dev, const struct device_driver *drv)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = to_phy_device(dev);</div><div class='add'>+	const struct phy_driver *phydrv = to_phy_driver(drv);</div><div class='add'>+</div><div class='add'>+	if (!(phydrv-&gt;mdiodrv.flags &amp; MDIO_DEVICE_IS_PHY))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (phydrv-&gt;match_phy_device)</div><div class='add'>+		return phydrv-&gt;match_phy_device(phydev, phydrv);</div><div class='add'>+</div><div class='add'>+	return genphy_match_phy_device(phydev, phydrv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static ssize_t</div><div class='hunk'>@@ -593,7 +625,7 @@ phy_interface_show(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='ctx'> 	struct phy_device *phydev = to_phy_device(dev);</div><div class='ctx'> 	const char *mode = NULL;</div><div class='ctx'> </div><div class='del'>-	if (phy_is_internal(phydev))</div><div class='add'>+	if (phydev-&gt;is_internal)</div><div class='ctx'> 		mode = "internal";</div><div class='ctx'> 	else</div><div class='ctx'> 		mode = phy_modes(phydev-&gt;interface);</div><div class='hunk'>@@ -629,11 +661,119 @@ static struct attribute *phy_dev_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_phy_dev_flags.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='del'>-ATTRIBUTE_GROUPS(phy_dev);</div><div class='add'>+</div><div class='add'>+static const struct attribute_group phy_dev_group = {</div><div class='add'>+	.attrs = phy_dev_attrs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MMD_DEVICE_ID_ATTR(n) \</div><div class='add'>+static ssize_t mmd##n##_device_id_show(struct device *dev, \</div><div class='add'>+				struct device_attribute *attr, char *buf) \</div><div class='add'>+{ \</div><div class='add'>+	struct phy_device *phydev = to_phy_device(dev); \</div><div class='add'>+	return sysfs_emit(buf, "0x%.8lx\n", \</div><div class='add'>+			 (unsigned long)phydev-&gt;c45_ids.device_ids[n]); \</div><div class='add'>+} \</div><div class='add'>+static DEVICE_ATTR_RO(mmd##n##_device_id)</div><div class='add'>+</div><div class='add'>+MMD_DEVICE_ID_ATTR(1);</div><div class='add'>+MMD_DEVICE_ID_ATTR(2);</div><div class='add'>+MMD_DEVICE_ID_ATTR(3);</div><div class='add'>+MMD_DEVICE_ID_ATTR(4);</div><div class='add'>+MMD_DEVICE_ID_ATTR(5);</div><div class='add'>+MMD_DEVICE_ID_ATTR(6);</div><div class='add'>+MMD_DEVICE_ID_ATTR(7);</div><div class='add'>+MMD_DEVICE_ID_ATTR(8);</div><div class='add'>+MMD_DEVICE_ID_ATTR(9);</div><div class='add'>+MMD_DEVICE_ID_ATTR(10);</div><div class='add'>+MMD_DEVICE_ID_ATTR(11);</div><div class='add'>+MMD_DEVICE_ID_ATTR(12);</div><div class='add'>+MMD_DEVICE_ID_ATTR(13);</div><div class='add'>+MMD_DEVICE_ID_ATTR(14);</div><div class='add'>+MMD_DEVICE_ID_ATTR(15);</div><div class='add'>+MMD_DEVICE_ID_ATTR(16);</div><div class='add'>+MMD_DEVICE_ID_ATTR(17);</div><div class='add'>+MMD_DEVICE_ID_ATTR(18);</div><div class='add'>+MMD_DEVICE_ID_ATTR(19);</div><div class='add'>+MMD_DEVICE_ID_ATTR(20);</div><div class='add'>+MMD_DEVICE_ID_ATTR(21);</div><div class='add'>+MMD_DEVICE_ID_ATTR(22);</div><div class='add'>+MMD_DEVICE_ID_ATTR(23);</div><div class='add'>+MMD_DEVICE_ID_ATTR(24);</div><div class='add'>+MMD_DEVICE_ID_ATTR(25);</div><div class='add'>+MMD_DEVICE_ID_ATTR(26);</div><div class='add'>+MMD_DEVICE_ID_ATTR(27);</div><div class='add'>+MMD_DEVICE_ID_ATTR(28);</div><div class='add'>+MMD_DEVICE_ID_ATTR(29);</div><div class='add'>+MMD_DEVICE_ID_ATTR(30);</div><div class='add'>+MMD_DEVICE_ID_ATTR(31);</div><div class='add'>+</div><div class='add'>+static struct attribute *phy_mmd_attrs[] = {</div><div class='add'>+	&amp;dev_attr_mmd1_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd2_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd3_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd4_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd5_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd6_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd7_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd8_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd9_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd10_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd11_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd12_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd13_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd14_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd15_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd16_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd17_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd18_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd19_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd20_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd21_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd22_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd23_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd24_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd25_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd26_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd27_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd28_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd29_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd30_device_id.attr,</div><div class='add'>+	&amp;dev_attr_mmd31_device_id.attr,</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static umode_t phy_mmd_is_visible(struct kobject *kobj,</div><div class='add'>+				  struct attribute *attr, int index)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = kobj_to_dev(kobj);</div><div class='add'>+	struct phy_device *phydev = to_phy_device(dev);</div><div class='add'>+	const int i = index + 1;</div><div class='add'>+</div><div class='add'>+	if (!phydev-&gt;is_c45)</div><div class='add'>+		return 0;</div><div class='add'>+	if (i &gt;= ARRAY_SIZE(phydev-&gt;c45_ids.device_ids) ||</div><div class='add'>+	    phydev-&gt;c45_ids.device_ids[i] == 0xffffffff)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return attr-&gt;mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct attribute_group phy_mmd_group = {</div><div class='add'>+	.name = "c45_phy_ids",</div><div class='add'>+	.attrs = phy_mmd_attrs,</div><div class='add'>+	.is_visible = phy_mmd_is_visible,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group *phy_device_groups[] = {</div><div class='add'>+	&amp;phy_dev_group,</div><div class='add'>+	&amp;phy_mmd_group,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static const struct device_type mdio_bus_phy_type = {</div><div class='ctx'> 	.name = "PHY",</div><div class='del'>-	.groups = phy_dev_groups,</div><div class='add'>+	.groups = phy_device_groups,</div><div class='ctx'> 	.release = phy_device_release,</div><div class='ctx'> 	.pm = pm_ptr(&amp;mdio_bus_phy_pm_ops),</div><div class='ctx'> };</div><div class='hunk'>@@ -685,8 +825,8 @@ struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;speed = SPEED_UNKNOWN;</div><div class='ctx'> 	dev-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='del'>-	dev-&gt;pause = 0;</div><div class='del'>-	dev-&gt;asym_pause = 0;</div><div class='add'>+	dev-&gt;pause = false;</div><div class='add'>+	dev-&gt;asym_pause = false;</div><div class='ctx'> 	dev-&gt;link = 0;</div><div class='ctx'> 	dev-&gt;port = PORT_TP;</div><div class='ctx'> 	dev-&gt;interface = PHY_INTERFACE_MODE_GMII;</div><div class='hunk'>@@ -1084,35 +1224,24 @@ int phy_get_c45_ids(struct phy_device *phydev)</div><div class='ctx'> EXPORT_SYMBOL(phy_get_c45_ids);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * phy_find_first - finds the first PHY device on the bus</div><div class='add'>+ * phy_find_next - finds the next PHY device on the bus</div><div class='ctx'>  * @bus: the target MII bus</div><div class='add'>+ * @pos: cursor</div><div class='add'>+ *</div><div class='add'>+ * Return: next phy_device on the bus, or NULL</div><div class='ctx'>  */</div><div class='del'>-struct phy_device *phy_find_first(struct mii_bus *bus)</div><div class='add'>+struct phy_device *phy_find_next(struct mii_bus *bus, struct phy_device *pos)</div><div class='ctx'> {</div><div class='del'>-	struct phy_device *phydev;</div><div class='del'>-	int addr;</div><div class='add'>+	for (int addr = pos ? pos-&gt;mdio.addr + 1 : 0;</div><div class='add'>+	     addr &lt; PHY_MAX_ADDR; addr++) {</div><div class='add'>+		struct phy_device *phydev = mdiobus_get_phy(bus, addr);</div><div class='ctx'> </div><div class='del'>-	for (addr = 0; addr &lt; PHY_MAX_ADDR; addr++) {</div><div class='del'>-		phydev = mdiobus_get_phy(bus, addr);</div><div class='ctx'> 		if (phydev)</div><div class='ctx'> 			return phydev;</div><div class='ctx'> 	}</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(phy_find_first);</div><div class='del'>-</div><div class='del'>-static void phy_link_change(struct phy_device *phydev, bool up)</div><div class='del'>-{</div><div class='del'>-	struct net_device *netdev = phydev-&gt;attached_dev;</div><div class='del'>-</div><div class='del'>-	if (up)</div><div class='del'>-		netif_carrier_on(netdev);</div><div class='del'>-	else</div><div class='del'>-		netif_carrier_off(netdev);</div><div class='del'>-	phydev-&gt;adjust_link(netdev);</div><div class='del'>-	if (phydev-&gt;mii_ts &amp;&amp; phydev-&gt;mii_ts-&gt;link_state)</div><div class='del'>-		phydev-&gt;mii_ts-&gt;link_state(phydev-&gt;mii_ts, phydev);</div><div class='del'>-}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_find_next);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * phy_prepare_link - prepares the PHY layer to monitor link status</div><div class='hunk'>@@ -1512,7 +1641,6 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,</div><div class='ctx'> 	struct mii_bus *bus = phydev-&gt;mdio.bus;</div><div class='ctx'> 	struct device *d = &amp;phydev-&gt;mdio.dev;</div><div class='ctx'> 	struct module *ndev_owner = NULL;</div><div class='del'>-	bool using_genphy = false;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* For Ethernet device drivers that register their own MDIO bus, we</div><div class='hunk'>@@ -1538,7 +1666,7 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,</div><div class='ctx'> 		else</div><div class='ctx'> 			d-&gt;driver = &amp;genphy_driver.mdiodrv.driver;</div><div class='ctx'> </div><div class='del'>-		using_genphy = true;</div><div class='add'>+		phydev-&gt;is_genphy_driven = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!try_module_get(d-&gt;driver-&gt;owner)) {</div><div class='hunk'>@@ -1547,7 +1675,7 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,</div><div class='ctx'> 		goto error_put_device;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (using_genphy) {</div><div class='add'>+	if (phydev-&gt;is_genphy_driven) {</div><div class='ctx'> 		err = d-&gt;driver-&gt;probe(d);</div><div class='ctx'> 		if (err &gt;= 0)</div><div class='ctx'> 			err = device_bind_driver(d);</div><div class='hunk'>@@ -1617,7 +1745,7 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,</div><div class='ctx'> 	 * the generic PHY driver we can't figure it out, thus set the old</div><div class='ctx'> 	 * legacy PORT_MII value.</div><div class='ctx'> 	 */</div><div class='del'>-	if (using_genphy)</div><div class='add'>+	if (phydev-&gt;is_genphy_driven)</div><div class='ctx'> 		phydev-&gt;port = PORT_MII;</div><div class='ctx'> </div><div class='ctx'> 	/* Initial carrier state is off as the phy is about to be</div><div class='hunk'>@@ -1656,6 +1784,7 @@ error:</div><div class='ctx'> </div><div class='ctx'> error_module_put:</div><div class='ctx'> 	module_put(d-&gt;driver-&gt;owner);</div><div class='add'>+	phydev-&gt;is_genphy_driven = 0;</div><div class='ctx'> 	d-&gt;driver = NULL;</div><div class='ctx'> error_put_device:</div><div class='ctx'> 	put_device(d);</div><div class='hunk'>@@ -1703,273 +1832,6 @@ struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(phy_attach);</div><div class='ctx'> </div><div class='del'>-static bool phy_driver_is_genphy_kind(struct phy_device *phydev,</div><div class='del'>-				      struct device_driver *driver)</div><div class='del'>-{</div><div class='del'>-	struct device *d = &amp;phydev-&gt;mdio.dev;</div><div class='del'>-	bool ret = false;</div><div class='del'>-</div><div class='del'>-	if (!phydev-&gt;drv)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	get_device(d);</div><div class='del'>-	ret = d-&gt;driver == driver;</div><div class='del'>-	put_device(d);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-bool phy_driver_is_genphy(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	return phy_driver_is_genphy_kind(phydev,</div><div class='del'>-					 &amp;genphy_driver.mdiodrv.driver);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_driver_is_genphy);</div><div class='del'>-</div><div class='del'>-bool phy_driver_is_genphy_10g(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	return phy_driver_is_genphy_kind(phydev,</div><div class='del'>-					 &amp;genphy_c45_driver.mdiodrv.driver);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_driver_is_genphy_10g);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * phy_package_join - join a common PHY group</div><div class='del'>- * @phydev: target phy_device struct</div><div class='del'>- * @base_addr: cookie and base PHY address of PHY package for offset</div><div class='del'>- *   calculation of global register access</div><div class='del'>- * @priv_size: if non-zero allocate this amount of bytes for private data</div><div class='del'>- *</div><div class='del'>- * This joins a PHY group and provides a shared storage for all phydevs in</div><div class='del'>- * this group. This is intended to be used for packages which contain</div><div class='del'>- * more than one PHY, for example a quad PHY transceiver.</div><div class='del'>- *</div><div class='del'>- * The base_addr parameter serves as cookie which has to have the same values</div><div class='del'>- * for all members of one group and as the base PHY address of the PHY package</div><div class='del'>- * for offset calculation to access generic registers of a PHY package.</div><div class='del'>- * Usually, one of the PHY addresses of the different PHYs in the package</div><div class='del'>- * provides access to these global registers.</div><div class='del'>- * The address which is given here, will be used in the phy_package_read()</div><div class='del'>- * and phy_package_write() convenience functions as base and added to the</div><div class='del'>- * passed offset in those functions.</div><div class='del'>- *</div><div class='del'>- * This will set the shared pointer of the phydev to the shared storage.</div><div class='del'>- * If this is the first call for a this cookie the shared storage will be</div><div class='del'>- * allocated. If priv_size is non-zero, the given amount of bytes are</div><div class='del'>- * allocated for the priv member.</div><div class='del'>- *</div><div class='del'>- * Returns &lt; 1 on error, 0 on success. Esp. calling phy_package_join()</div><div class='del'>- * with the same cookie but a different priv_size is an error.</div><div class='del'>- */</div><div class='del'>-int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size)</div><div class='del'>-{</div><div class='del'>-	struct mii_bus *bus = phydev-&gt;mdio.bus;</div><div class='del'>-	struct phy_package_shared *shared;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (base_addr &lt; 0 || base_addr &gt;= PHY_MAX_ADDR)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;bus-&gt;shared_lock);</div><div class='del'>-	shared = bus-&gt;shared[base_addr];</div><div class='del'>-	if (!shared) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		shared = kzalloc(sizeof(*shared), GFP_KERNEL);</div><div class='del'>-		if (!shared)</div><div class='del'>-			goto err_unlock;</div><div class='del'>-		if (priv_size) {</div><div class='del'>-			shared-&gt;priv = kzalloc(priv_size, GFP_KERNEL);</div><div class='del'>-			if (!shared-&gt;priv)</div><div class='del'>-				goto err_free;</div><div class='del'>-			shared-&gt;priv_size = priv_size;</div><div class='del'>-		}</div><div class='del'>-		shared-&gt;base_addr = base_addr;</div><div class='del'>-		shared-&gt;np = NULL;</div><div class='del'>-		refcount_set(&amp;shared-&gt;refcnt, 1);</div><div class='del'>-		bus-&gt;shared[base_addr] = shared;</div><div class='del'>-	} else {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		if (priv_size &amp;&amp; priv_size != shared-&gt;priv_size)</div><div class='del'>-			goto err_unlock;</div><div class='del'>-		refcount_inc(&amp;shared-&gt;refcnt);</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;bus-&gt;shared_lock);</div><div class='del'>-</div><div class='del'>-	phydev-&gt;shared = shared;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_free:</div><div class='del'>-	kfree(shared);</div><div class='del'>-err_unlock:</div><div class='del'>-	mutex_unlock(&amp;bus-&gt;shared_lock);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_package_join);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * of_phy_package_join - join a common PHY group in PHY package</div><div class='del'>- * @phydev: target phy_device struct</div><div class='del'>- * @priv_size: if non-zero allocate this amount of bytes for private data</div><div class='del'>- *</div><div class='del'>- * This is a variant of phy_package_join for PHY package defined in DT.</div><div class='del'>- *</div><div class='del'>- * The parent node of the @phydev is checked as a valid PHY package node</div><div class='del'>- * structure (by matching the node name "ethernet-phy-package") and the</div><div class='del'>- * base_addr for the PHY package is passed to phy_package_join.</div><div class='del'>- *</div><div class='del'>- * With this configuration the shared struct will also have the np value</div><div class='del'>- * filled to use additional DT defined properties in PHY specific</div><div class='del'>- * probe_once and config_init_once PHY package OPs.</div><div class='del'>- *</div><div class='del'>- * Returns &lt; 0 on error, 0 on success. Esp. calling phy_package_join()</div><div class='del'>- * with the same cookie but a different priv_size is an error. Or a parent</div><div class='del'>- * node is not detected or is not valid or doesn't match the expected node</div><div class='del'>- * name for PHY package.</div><div class='del'>- */</div><div class='del'>-int of_phy_package_join(struct phy_device *phydev, size_t priv_size)</div><div class='del'>-{</div><div class='del'>-	struct device_node *node = phydev-&gt;mdio.dev.of_node;</div><div class='del'>-	struct device_node *package_node;</div><div class='del'>-	u32 base_addr;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!node)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	package_node = of_get_parent(node);</div><div class='del'>-	if (!package_node)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!of_node_name_eq(package_node, "ethernet-phy-package")) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (of_property_read_u32(package_node, "reg", &amp;base_addr)) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = phy_package_join(phydev, base_addr, priv_size);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto exit;</div><div class='del'>-</div><div class='del'>-	phydev-&gt;shared-&gt;np = package_node;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-exit:</div><div class='del'>-	of_node_put(package_node);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(of_phy_package_join);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * phy_package_leave - leave a common PHY group</div><div class='del'>- * @phydev: target phy_device struct</div><div class='del'>- *</div><div class='del'>- * This leaves a PHY group created by phy_package_join(). If this phydev</div><div class='del'>- * was the last user of the shared data between the group, this data is</div><div class='del'>- * freed. Resets the phydev-&gt;shared pointer to NULL.</div><div class='del'>- */</div><div class='del'>-void phy_package_leave(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	struct phy_package_shared *shared = phydev-&gt;shared;</div><div class='del'>-	struct mii_bus *bus = phydev-&gt;mdio.bus;</div><div class='del'>-</div><div class='del'>-	if (!shared)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Decrease the node refcount on leave if present */</div><div class='del'>-	if (shared-&gt;np)</div><div class='del'>-		of_node_put(shared-&gt;np);</div><div class='del'>-</div><div class='del'>-	if (refcount_dec_and_mutex_lock(&amp;shared-&gt;refcnt, &amp;bus-&gt;shared_lock)) {</div><div class='del'>-		bus-&gt;shared[shared-&gt;base_addr] = NULL;</div><div class='del'>-		mutex_unlock(&amp;bus-&gt;shared_lock);</div><div class='del'>-		kfree(shared-&gt;priv);</div><div class='del'>-		kfree(shared);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	phydev-&gt;shared = NULL;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(phy_package_leave);</div><div class='del'>-</div><div class='del'>-static void devm_phy_package_leave(struct device *dev, void *res)</div><div class='del'>-{</div><div class='del'>-	phy_package_leave(*(struct phy_device **)res);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * devm_phy_package_join - resource managed phy_package_join()</div><div class='del'>- * @dev: device that is registering this PHY package</div><div class='del'>- * @phydev: target phy_device struct</div><div class='del'>- * @base_addr: cookie and base PHY address of PHY package for offset</div><div class='del'>- *   calculation of global register access</div><div class='del'>- * @priv_size: if non-zero allocate this amount of bytes for private data</div><div class='del'>- *</div><div class='del'>- * Managed phy_package_join(). Shared storage fetched by this function,</div><div class='del'>- * phy_package_leave() is automatically called on driver detach. See</div><div class='del'>- * phy_package_join() for more information.</div><div class='del'>- */</div><div class='del'>-int devm_phy_package_join(struct device *dev, struct phy_device *phydev,</div><div class='del'>-			  int base_addr, size_t priv_size)</div><div class='del'>-{</div><div class='del'>-	struct phy_device **ptr;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ptr = devres_alloc(devm_phy_package_leave, sizeof(*ptr),</div><div class='del'>-			   GFP_KERNEL);</div><div class='del'>-	if (!ptr)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ret = phy_package_join(phydev, base_addr, priv_size);</div><div class='del'>-</div><div class='del'>-	if (!ret) {</div><div class='del'>-		*ptr = phydev;</div><div class='del'>-		devres_add(dev, ptr);</div><div class='del'>-	} else {</div><div class='del'>-		devres_free(ptr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(devm_phy_package_join);</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * devm_of_phy_package_join - resource managed of_phy_package_join()</div><div class='del'>- * @dev: device that is registering this PHY package</div><div class='del'>- * @phydev: target phy_device struct</div><div class='del'>- * @priv_size: if non-zero allocate this amount of bytes for private data</div><div class='del'>- *</div><div class='del'>- * Managed of_phy_package_join(). Shared storage fetched by this function,</div><div class='del'>- * phy_package_leave() is automatically called on driver detach. See</div><div class='del'>- * of_phy_package_join() for more information.</div><div class='del'>- */</div><div class='del'>-int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev,</div><div class='del'>-			     size_t priv_size)</div><div class='del'>-{</div><div class='del'>-	struct phy_device **ptr;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ptr = devres_alloc(devm_phy_package_leave, sizeof(*ptr),</div><div class='del'>-			   GFP_KERNEL);</div><div class='del'>-	if (!ptr)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	ret = of_phy_package_join(phydev, priv_size);</div><div class='del'>-</div><div class='del'>-	if (!ret) {</div><div class='del'>-		*ptr = phydev;</div><div class='del'>-		devres_add(dev, ptr);</div><div class='del'>-	} else {</div><div class='del'>-		devres_free(ptr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(devm_of_phy_package_join);</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * phy_detach - detach a PHY device from its network device</div><div class='ctx'>  * @phydev: target phy_device struct</div><div class='hunk'>@@ -1983,8 +1845,10 @@ void phy_detach(struct phy_device *phydev)</div><div class='ctx'> 	struct module *ndev_owner = NULL;</div><div class='ctx'> 	struct mii_bus *bus;</div><div class='ctx'> </div><div class='del'>-	if (phydev-&gt;devlink)</div><div class='add'>+	if (phydev-&gt;devlink) {</div><div class='ctx'> 		device_link_del(phydev-&gt;devlink);</div><div class='add'>+		phydev-&gt;devlink = NULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;sysfs_links) {</div><div class='ctx'> 		if (dev)</div><div class='hunk'>@@ -1998,10 +1862,21 @@ void phy_detach(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	phy_suspend(phydev);</div><div class='ctx'> 	if (dev) {</div><div class='add'>+		struct hwtstamp_provider *hwprov;</div><div class='add'>+</div><div class='add'>+		hwprov = rtnl_dereference(dev-&gt;hwprov);</div><div class='add'>+		/* Disable timestamp if it is the one selected */</div><div class='add'>+		if (hwprov &amp;&amp; hwprov-&gt;phydev == phydev) {</div><div class='add'>+			rcu_assign_pointer(dev-&gt;hwprov, NULL);</div><div class='add'>+			kfree_rcu(hwprov, rcu_head);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		phydev-&gt;attached_dev-&gt;phydev = NULL;</div><div class='ctx'> 		phydev-&gt;attached_dev = NULL;</div><div class='ctx'> 		phy_link_topo_del_phy(dev, phydev);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	phydev-&gt;phy_link_change = NULL;</div><div class='ctx'> 	phydev-&gt;phylink = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (!phydev-&gt;is_on_sfp_module)</div><div class='hunk'>@@ -2015,9 +1890,10 @@ void phy_detach(struct phy_device *phydev)</div><div class='ctx'> 	 * from the generic driver so that there's a chance a</div><div class='ctx'> 	 * real driver could be loaded</div><div class='ctx'> 	 */</div><div class='del'>-	if (phy_driver_is_genphy(phydev) ||</div><div class='del'>-	    phy_driver_is_genphy_10g(phydev))</div><div class='add'>+	if (phydev-&gt;is_genphy_driven) {</div><div class='ctx'> 		device_release_driver(&amp;phydev-&gt;mdio.dev);</div><div class='add'>+		phydev-&gt;is_genphy_driven = 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Assert the reset signal */</div><div class='ctx'> 	phy_device_reset(phydev, 1);</div><div class='hunk'>@@ -2045,7 +1921,7 @@ int phy_suspend(struct phy_device *phydev)</div><div class='ctx'> 	if (phydev-&gt;suspended || !phydrv)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	phydev-&gt;wol_enabled = phy_drv_wol_enabled(phydev) ||</div><div class='add'>+	phydev-&gt;wol_enabled = phy_may_wakeup(phydev) ||</div><div class='ctx'> 			      (netdev &amp;&amp; netdev-&gt;ethtool-&gt;wol_enabled);</div><div class='ctx'> 	/* If the device has WOL enabled, we cannot suspend the PHY */</div><div class='ctx'> 	if (phydev-&gt;wol_enabled &amp;&amp; !(phydrv-&gt;flags &amp; PHY_ALWAYS_CALL_SUSPEND))</div><div class='hunk'>@@ -2092,41 +1968,6 @@ int phy_resume(struct phy_device *phydev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(phy_resume);</div><div class='ctx'> </div><div class='del'>-int phy_loopback(struct phy_device *phydev, bool enable)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	if (!phydev-&gt;drv)</div><div class='del'>-		return -EIO;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;phydev-&gt;lock);</div><div class='del'>-</div><div class='del'>-	if (enable &amp;&amp; phydev-&gt;loopback_enabled) {</div><div class='del'>-		ret = -EBUSY;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!enable &amp;&amp; !phydev-&gt;loopback_enabled) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (phydev-&gt;drv-&gt;set_loopback)</div><div class='del'>-		ret = phydev-&gt;drv-&gt;set_loopback(phydev, enable);</div><div class='del'>-	else</div><div class='del'>-		ret = genphy_loopback(phydev, enable);</div><div class='del'>-</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	phydev-&gt;loopback_enabled = enable;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;phydev-&gt;lock);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(phy_loopback);</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * phy_reset_after_clk_enable - perform a PHY reset if needed</div><div class='ctx'>  * @phydev: target phy_device struct</div><div class='hunk'>@@ -2240,29 +2081,6 @@ static int genphy_c37_config_advert(struct phy_device *phydev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * genphy_config_eee_advert - disable unwanted eee mode advertisement</div><div class='del'>- * @phydev: target phy_device struct</div><div class='del'>- *</div><div class='del'>- * Description: Writes MDIO_AN_EEE_ADV after disabling unsupported energy</div><div class='del'>- *   efficent ethernet modes. Returns 0 if the PHY's advertisement hasn't</div><div class='del'>- *   changed, and 1 if it has changed.</div><div class='del'>- */</div><div class='del'>-int genphy_config_eee_advert(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Nothing to disable */</div><div class='del'>-	if (!phydev-&gt;eee_broken_modes)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	err = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV,</div><div class='del'>-				     phydev-&gt;eee_broken_modes, 0);</div><div class='del'>-	/* If the call failed, we assume that EEE is not supported */</div><div class='del'>-	return err &lt; 0 ? 0 : err;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(genphy_config_eee_advert);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * genphy_setup_forced - configures/forces speed/duplex from @phydev</div><div class='ctx'>  * @phydev: target phy_device struct</div><div class='ctx'>  *</div><div class='hunk'>@@ -2274,8 +2092,8 @@ int genphy_setup_forced(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	u16 ctl;</div><div class='ctx'> </div><div class='del'>-	phydev-&gt;pause = 0;</div><div class='del'>-	phydev-&gt;asym_pause = 0;</div><div class='add'>+	phydev-&gt;pause = false;</div><div class='add'>+	phydev-&gt;asym_pause = false;</div><div class='ctx'> </div><div class='ctx'> 	ctl = mii_bmcr_encode_fixed(phydev-&gt;speed, phydev-&gt;duplex);</div><div class='ctx'> </div><div class='hunk'>@@ -2417,7 +2235,7 @@ EXPORT_SYMBOL(genphy_check_and_restart_aneg);</div><div class='ctx'> int __genphy_config_aneg(struct phy_device *phydev, bool changed)</div><div class='ctx'> {</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(fixed_advert);</div><div class='del'>-	const struct phy_setting *set;</div><div class='add'>+	const struct link_capabilities *c;</div><div class='ctx'> 	unsigned long *advert;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -2443,10 +2261,11 @@ int __genphy_config_aneg(struct phy_device *phydev, bool changed)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		linkmode_zero(fixed_advert);</div><div class='ctx'> </div><div class='del'>-		set = phy_lookup_setting(phydev-&gt;speed, phydev-&gt;duplex,</div><div class='del'>-					 phydev-&gt;supported, true);</div><div class='del'>-		if (set)</div><div class='del'>-			linkmode_set_bit(set-&gt;bit, fixed_advert);</div><div class='add'>+		c = phy_caps_lookup(phydev-&gt;speed, phydev-&gt;duplex,</div><div class='add'>+				    phydev-&gt;supported, true);</div><div class='add'>+		if (c)</div><div class='add'>+			linkmode_and(fixed_advert, phydev-&gt;supported,</div><div class='add'>+				     c-&gt;linkmodes);</div><div class='ctx'> </div><div class='ctx'> 		advert = fixed_advert;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2681,8 +2500,8 @@ int genphy_read_status(struct phy_device *phydev)</div><div class='ctx'> 	phydev-&gt;master_slave_state = MASTER_SLAVE_STATE_UNSUPPORTED;</div><div class='ctx'> 	phydev-&gt;speed = SPEED_UNKNOWN;</div><div class='ctx'> 	phydev-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='del'>-	phydev-&gt;pause = 0;</div><div class='del'>-	phydev-&gt;asym_pause = 0;</div><div class='add'>+	phydev-&gt;pause = false;</div><div class='add'>+	phydev-&gt;asym_pause = false;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;is_gigabit_capable) {</div><div class='ctx'> 		err = genphy_read_master_slave(phydev);</div><div class='hunk'>@@ -2735,8 +2554,8 @@ int genphy_c37_read_status(struct phy_device *phydev, bool *changed)</div><div class='ctx'> 	/* Signal link has changed */</div><div class='ctx'> 	*changed = true;</div><div class='ctx'> 	phydev-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='del'>-	phydev-&gt;pause = 0;</div><div class='del'>-	phydev-&gt;asym_pause = 0;</div><div class='add'>+	phydev-&gt;pause = false;</div><div class='add'>+	phydev-&gt;asym_pause = false;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;autoneg == AUTONEG_ENABLE &amp;&amp; phydev-&gt;autoneg_complete) {</div><div class='ctx'> 		lpa = phy_read(phydev, MII_LPA);</div><div class='hunk'>@@ -2906,12 +2725,18 @@ int genphy_resume(struct phy_device *phydev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(genphy_resume);</div><div class='ctx'> </div><div class='del'>-int genphy_loopback(struct phy_device *phydev, bool enable)</div><div class='add'>+int genphy_loopback(struct phy_device *phydev, bool enable, int speed)</div><div class='ctx'> {</div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		u16 ctl = BMCR_LOOPBACK;</div><div class='ctx'> 		int ret, val;</div><div class='ctx'> </div><div class='add'>+		if (speed == SPEED_10 || speed == SPEED_100 ||</div><div class='add'>+		    speed == SPEED_1000)</div><div class='add'>+			phydev-&gt;speed = speed;</div><div class='add'>+		else if (speed)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 		ctl |= mii_bmcr_encode_fixed(phydev-&gt;speed, phydev-&gt;duplex);</div><div class='ctx'> </div><div class='ctx'> 		phy_modify(phydev, MII_BMCR, ~0, ctl);</div><div class='hunk'>@@ -3017,6 +2842,23 @@ void phy_support_eee(struct phy_device *phydev)</div><div class='ctx'> EXPORT_SYMBOL(phy_support_eee);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * phy_disable_eee - Disable EEE for the PHY</div><div class='add'>+ * @phydev: Target phy_device struct</div><div class='add'>+ *</div><div class='add'>+ * This function is used by MAC drivers for MAC's which don't support EEE.</div><div class='add'>+ * It disables EEE on the PHY layer.</div><div class='add'>+ */</div><div class='add'>+void phy_disable_eee(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	linkmode_zero(phydev-&gt;advertising_eee);</div><div class='add'>+	phydev-&gt;eee_cfg.tx_lpi_enabled = false;</div><div class='add'>+	phydev-&gt;eee_cfg.eee_enabled = false;</div><div class='add'>+	/* don't let userspace re-enable EEE advertisement */</div><div class='add'>+	linkmode_fill(phydev-&gt;eee_disabled_modes);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_disable_eee);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * phy_support_sym_pause - Enable support of symmetrical pause</div><div class='ctx'>  * @phydev: target phy_device struct</div><div class='ctx'>  *</div><div class='hunk'>@@ -3142,19 +2984,12 @@ void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause)</div><div class='ctx'> EXPORT_SYMBOL(phy_get_pause);</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_OF_MDIO)</div><div class='del'>-static int phy_get_int_delay_property(struct device *dev, const char *name)</div><div class='add'>+static int phy_get_u32_property(struct device *dev, const char *name, u32 *val)</div><div class='ctx'> {</div><div class='del'>-	s32 int_delay;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = device_property_read_u32(dev, name, &amp;int_delay);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return int_delay;</div><div class='add'>+	return device_property_read_u32(dev, name, val);</div><div class='ctx'> }</div><div class='ctx'> #else</div><div class='del'>-static int phy_get_int_delay_property(struct device *dev, const char *name)</div><div class='add'>+static int phy_get_u32_property(struct device *dev, const char *name, u32 *val)</div><div class='ctx'> {</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='hunk'>@@ -3163,7 +2998,6 @@ static int phy_get_int_delay_property(struct device *dev, const char *name)</div><div class='ctx'> /**</div><div class='ctx'>  * phy_get_internal_delay - returns the index of the internal delay</div><div class='ctx'>  * @phydev: phy_device struct</div><div class='del'>- * @dev: pointer to the devices device struct</div><div class='ctx'>  * @delay_values: array of delays the PHY supports</div><div class='ctx'>  * @size: the size of the delay array</div><div class='ctx'>  * @is_rx: boolean to indicate to get the rx internal delay</div><div class='hunk'>@@ -3176,15 +3010,16 @@ static int phy_get_int_delay_property(struct device *dev, const char *name)</div><div class='ctx'>  * array then size = 0 and the value of the delay property is returned.</div><div class='ctx'>  * Return -EINVAL if the delay is invalid or cannot be found.</div><div class='ctx'>  */</div><div class='del'>-s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,</div><div class='del'>-			   const int *delay_values, int size, bool is_rx)</div><div class='add'>+s32 phy_get_internal_delay(struct phy_device *phydev, const int *delay_values,</div><div class='add'>+			   int size, bool is_rx)</div><div class='ctx'> {</div><div class='del'>-	s32 delay;</div><div class='del'>-	int i;</div><div class='add'>+	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='add'>+	int i, ret;</div><div class='add'>+	u32 delay;</div><div class='ctx'> </div><div class='ctx'> 	if (is_rx) {</div><div class='del'>-		delay = phy_get_int_delay_property(dev, "rx-internal-delay-ps");</div><div class='del'>-		if (delay &lt; 0 &amp;&amp; size == 0) {</div><div class='add'>+		ret = phy_get_u32_property(dev, "rx-internal-delay-ps", &amp;delay);</div><div class='add'>+		if (ret &lt; 0 &amp;&amp; size == 0) {</div><div class='ctx'> 			if (phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_ID ||</div><div class='ctx'> 			    phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_RXID)</div><div class='ctx'> 				return 1;</div><div class='hunk'>@@ -3193,8 +3028,8 @@ s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='del'>-		delay = phy_get_int_delay_property(dev, "tx-internal-delay-ps");</div><div class='del'>-		if (delay &lt; 0 &amp;&amp; size == 0) {</div><div class='add'>+		ret = phy_get_u32_property(dev, "tx-internal-delay-ps", &amp;delay);</div><div class='add'>+		if (ret &lt; 0 &amp;&amp; size == 0) {</div><div class='ctx'> 			if (phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_ID ||</div><div class='ctx'> 			    phydev-&gt;interface == PHY_INTERFACE_MODE_RGMII_TXID)</div><div class='ctx'> 				return 1;</div><div class='hunk'>@@ -3203,8 +3038,8 @@ s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (delay &lt; 0)</div><div class='del'>-		return delay;</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (size == 0)</div><div class='ctx'> 		return delay;</div><div class='hunk'>@@ -3239,6 +3074,45 @@ s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(phy_get_internal_delay);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * phy_get_tx_amplitude_gain - stores tx amplitude gain in @val</div><div class='add'>+ * @phydev: phy_device struct</div><div class='add'>+ * @dev: pointer to the devices device struct</div><div class='add'>+ * @linkmode: linkmode for which the tx amplitude gain should be retrieved</div><div class='add'>+ * @val: tx amplitude gain</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, &lt; 0 on failure</div><div class='add'>+ */</div><div class='add'>+int phy_get_tx_amplitude_gain(struct phy_device *phydev, struct device *dev,</div><div class='add'>+			      enum ethtool_link_mode_bit_indices linkmode,</div><div class='add'>+			      u32 *val)</div><div class='add'>+{</div><div class='add'>+	switch (linkmode) {</div><div class='add'>+	case ETHTOOL_LINK_MODE_100baseT_Full_BIT:</div><div class='add'>+		return phy_get_u32_property(dev,</div><div class='add'>+					    "tx-amplitude-100base-tx-percent",</div><div class='add'>+					    val);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_get_tx_amplitude_gain);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_get_mac_termination - stores MAC termination in @val</div><div class='add'>+ * @phydev: phy_device struct</div><div class='add'>+ * @dev: pointer to the devices device struct</div><div class='add'>+ * @val: MAC termination</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, &lt; 0 on failure</div><div class='add'>+ */</div><div class='add'>+int phy_get_mac_termination(struct phy_device *phydev, struct device *dev,</div><div class='add'>+			    u32 *val)</div><div class='add'>+{</div><div class='add'>+	return phy_get_u32_property(dev, "mac-termination-ohms", val);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_get_mac_termination);</div><div class='add'>+</div><div class='ctx'> static int phy_led_set_brightness(struct led_classdev *led_cdev,</div><div class='ctx'> 				  enum led_brightness value)</div><div class='ctx'> {</div><div class='hunk'>@@ -3500,18 +3374,6 @@ struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode)</div><div class='ctx'> EXPORT_SYMBOL(fwnode_phy_find_device);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * device_phy_find_device - For the given device, get the phy_device</div><div class='del'>- * @dev: Pointer to the given device</div><div class='del'>- *</div><div class='del'>- * Refer return conditions of fwnode_phy_find_device().</div><div class='del'>- */</div><div class='del'>-struct phy_device *device_phy_find_device(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	return fwnode_phy_find_device(dev_fwnode(dev));</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(device_phy_find_device);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * fwnode_get_phy_node - Get the phy_node using the named reference.</div><div class='ctx'>  * @fwnode: Pointer to fwnode from which phy_node has to be obtained.</div><div class='ctx'>  *</div><div class='hunk'>@@ -3526,12 +3388,12 @@ struct fwnode_handle *fwnode_get_phy_node(const struct fwnode_handle *fwnode)</div><div class='ctx'> </div><div class='ctx'> 	/* Only phy-handle is used for ACPI */</div><div class='ctx'> 	phy_node = fwnode_find_reference(fwnode, "phy-handle", 0);</div><div class='del'>-	if (is_acpi_node(fwnode) || !IS_ERR(phy_node))</div><div class='add'>+	if (!IS_ERR(phy_node) || is_acpi_node(fwnode))</div><div class='ctx'> 		return phy_node;</div><div class='ctx'> 	phy_node = fwnode_find_reference(fwnode, "phy", 0);</div><div class='del'>-	if (IS_ERR(phy_node))</div><div class='del'>-		phy_node = fwnode_find_reference(fwnode, "phy-device", 0);</div><div class='del'>-	return phy_node;</div><div class='add'>+	if (!IS_ERR(phy_node))</div><div class='add'>+		return phy_node;</div><div class='add'>+	return fwnode_find_reference(fwnode, "phy-device", 0);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(fwnode_get_phy_node);</div><div class='ctx'> </div><div class='hunk'>@@ -3609,22 +3471,21 @@ static int phy_probe(struct device *dev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	/* There is no "enabled" flag. If PHY is advertising, assume it is</div><div class='del'>-	 * kind of enabled.</div><div class='del'>-	 */</div><div class='del'>-	phydev-&gt;eee_enabled = !linkmode_empty(phydev-&gt;advertising_eee);</div><div class='add'>+	/* Get the EEE modes we want to prohibit. */</div><div class='add'>+	of_set_phy_eee_broken(phydev);</div><div class='ctx'> </div><div class='ctx'> 	/* Some PHYs may advertise, by default, not support EEE modes. So,</div><div class='del'>-	 * we need to clean them.</div><div class='add'>+	 * we need to clean them. In addition remove all disabled EEE modes.</div><div class='ctx'> 	 */</div><div class='del'>-	if (phydev-&gt;eee_enabled)</div><div class='del'>-		linkmode_and(phydev-&gt;advertising_eee, phydev-&gt;supported_eee,</div><div class='del'>-			     phydev-&gt;advertising_eee);</div><div class='add'>+	linkmode_and(phydev-&gt;advertising_eee, phydev-&gt;supported_eee,</div><div class='add'>+		     phydev-&gt;advertising_eee);</div><div class='add'>+	linkmode_andnot(phydev-&gt;advertising_eee, phydev-&gt;advertising_eee,</div><div class='add'>+			phydev-&gt;eee_disabled_modes);</div><div class='ctx'> </div><div class='del'>-	/* Get the EEE modes we want to prohibit. We will ask</div><div class='del'>-	 * the PHY stop advertising these mode later on</div><div class='add'>+	/* There is no "enabled" flag. If PHY is advertising, assume it is</div><div class='add'>+	 * kind of enabled.</div><div class='ctx'> 	 */</div><div class='del'>-	of_set_phy_eee_broken(phydev);</div><div class='add'>+	phydev-&gt;eee_cfg.eee_enabled = !linkmode_empty(phydev-&gt;advertising_eee);</div><div class='ctx'> </div><div class='ctx'> 	/* Get master/slave strap overrides */</div><div class='ctx'> 	of_set_phy_timing_role(phydev);</div><div class='hunk'>@@ -3654,7 +3515,7 @@ static int phy_probe(struct device *dev)</div><div class='ctx'> 	/* Get the LEDs from the device tree, and instantiate standard</div><div class='ctx'> 	 * LEDs for them.</div><div class='ctx'> 	 */</div><div class='del'>-	if (IS_ENABLED(CONFIG_PHYLIB_LEDS))</div><div class='add'>+	if (IS_ENABLED(CONFIG_PHYLIB_LEDS) &amp;&amp; !phy_driver_is_genphy(phydev))</div><div class='ctx'> 		err = of_phy_leds(phydev);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -3671,7 +3532,7 @@ static int phy_remove(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;phydev-&gt;state_queue);</div><div class='ctx'> </div><div class='del'>-	if (IS_ENABLED(CONFIG_PHYLIB_LEDS))</div><div class='add'>+	if (IS_ENABLED(CONFIG_PHYLIB_LEDS) &amp;&amp; !phy_driver_is_genphy(phydev))</div><div class='ctx'> 		phy_leds_unregister(phydev);</div><div class='ctx'> </div><div class='ctx'> 	phydev-&gt;state = PHY_DOWN;</div><div class='hunk'>@@ -3695,7 +3556,8 @@ static int phy_remove(struct device *dev)</div><div class='ctx'>  * @new_driver: new phy_driver to register</div><div class='ctx'>  * @owner: module owning this PHY</div><div class='ctx'>  */</div><div class='del'>-int phy_driver_register(struct phy_driver *new_driver, struct module *owner)</div><div class='add'>+static int phy_driver_register(struct phy_driver *new_driver,</div><div class='add'>+			       struct module *owner)</div><div class='ctx'> {</div><div class='ctx'> 	int retval;</div><div class='ctx'> </div><div class='hunk'>@@ -3738,7 +3600,11 @@ int phy_driver_register(struct phy_driver *new_driver, struct module *owner)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL(phy_driver_register);</div><div class='add'>+</div><div class='add'>+static void phy_driver_unregister(struct phy_driver *drv)</div><div class='add'>+{</div><div class='add'>+	driver_unregister(&amp;drv-&gt;mdiodrv.driver);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> int phy_drivers_register(struct phy_driver *new_driver, int n,</div><div class='ctx'> 			 struct module *owner)</div><div class='hunk'>@@ -3757,12 +3623,6 @@ int phy_drivers_register(struct phy_driver *new_driver, int n,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(phy_drivers_register);</div><div class='ctx'> </div><div class='del'>-void phy_driver_unregister(struct phy_driver *drv)</div><div class='del'>-{</div><div class='del'>-	driver_unregister(&amp;drv-&gt;mdiodrv.driver);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL(phy_driver_unregister);</div><div class='del'>-</div><div class='ctx'> void phy_drivers_unregister(struct phy_driver *drv, int n)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -3796,6 +3656,8 @@ static const struct ethtool_phy_ops phy_ethtool_phy_ops = {</div><div class='ctx'> static const struct phylib_stubs __phylib_stubs = {</div><div class='ctx'> 	.hwtstamp_get = __phy_hwtstamp_get,</div><div class='ctx'> 	.hwtstamp_set = __phy_hwtstamp_set,</div><div class='add'>+	.get_phy_stats = __phy_ethtool_get_phy_stats,</div><div class='add'>+	.get_link_ext_stats = __phy_ethtool_get_link_ext_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void phylib_register_stubs(void)</div><div class='hunk'>@@ -3817,7 +3679,7 @@ static int __init phy_init(void)</div><div class='ctx'> 	phylib_register_stubs();</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='del'>-	rc = mdio_bus_init();</div><div class='add'>+	rc = phy_caps_init();</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto err_ethtool_phy_ops;</div><div class='ctx'> </div><div class='hunk'>@@ -3825,7 +3687,7 @@ static int __init phy_init(void)</div><div class='ctx'> </div><div class='ctx'> 	rc = phy_driver_register(&amp;genphy_c45_driver, THIS_MODULE);</div><div class='ctx'> 	if (rc)</div><div class='del'>-		goto err_mdio_bus;</div><div class='add'>+		goto err_ethtool_phy_ops;</div><div class='ctx'> </div><div class='ctx'> 	rc = phy_driver_register(&amp;genphy_driver, THIS_MODULE);</div><div class='ctx'> 	if (rc)</div><div class='hunk'>@@ -3835,8 +3697,6 @@ static int __init phy_init(void)</div><div class='ctx'> </div><div class='ctx'> err_c45:</div><div class='ctx'> 	phy_driver_unregister(&amp;genphy_c45_driver);</div><div class='del'>-err_mdio_bus:</div><div class='del'>-	mdio_bus_exit();</div><div class='ctx'> err_ethtool_phy_ops:</div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	phylib_unregister_stubs();</div><div class='hunk'>@@ -3850,7 +3710,6 @@ static void __exit phy_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	phy_driver_unregister(&amp;genphy_c45_driver);</div><div class='ctx'> 	phy_driver_unregister(&amp;genphy_driver);</div><div class='del'>-	mdio_bus_exit();</div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	phylib_unregister_stubs();</div><div class='ctx'> 	ethtool_set_ethtool_phy_ops(NULL);</div><div class='head'>diff --git a/drivers/net/phy/phy_led_triggers.c b/drivers/net/phy/phy_led_triggers.c<br/>index f550576eb9da..60893691d4c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy_led_triggers.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy_led_triggers.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy_led_triggers.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phy_led_triggers.c</a></div><div class='hunk'>@@ -5,6 +5,8 @@</div><div class='ctx'> #include &lt;linux/phy_led_triggers.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "phylib-internal.h"</div><div class='add'>+</div><div class='ctx'> static struct phy_led_trigger *phy_speed_to_led_trigger(struct phy_device *phy,</div><div class='ctx'> 							unsigned int speed)</div><div class='ctx'> {</div><div class='hunk'>@@ -91,9 +93,8 @@ int phy_led_triggers_register(struct phy_device *phy)</div><div class='ctx'> 	if (!phy-&gt;phy_num_led_triggers)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	phy-&gt;led_link_trigger = devm_kzalloc(&amp;phy-&gt;mdio.dev,</div><div class='del'>-					     sizeof(*phy-&gt;led_link_trigger),</div><div class='del'>-					     GFP_KERNEL);</div><div class='add'>+	phy-&gt;led_link_trigger = kzalloc(sizeof(*phy-&gt;led_link_trigger),</div><div class='add'>+					GFP_KERNEL);</div><div class='ctx'> 	if (!phy-&gt;led_link_trigger) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto out_clear;</div><div class='hunk'>@@ -103,10 +104,9 @@ int phy_led_triggers_register(struct phy_device *phy)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out_free_link;</div><div class='ctx'> </div><div class='del'>-	phy-&gt;phy_led_triggers = devm_kcalloc(&amp;phy-&gt;mdio.dev,</div><div class='del'>-					    phy-&gt;phy_num_led_triggers,</div><div class='del'>-					    sizeof(struct phy_led_trigger),</div><div class='del'>-					    GFP_KERNEL);</div><div class='add'>+	phy-&gt;phy_led_triggers = kcalloc(phy-&gt;phy_num_led_triggers,</div><div class='add'>+					sizeof(struct phy_led_trigger),</div><div class='add'>+					GFP_KERNEL);</div><div class='ctx'> 	if (!phy-&gt;phy_led_triggers) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto out_unreg_link;</div><div class='hunk'>@@ -127,11 +127,11 @@ int phy_led_triggers_register(struct phy_device *phy)</div><div class='ctx'> out_unreg:</div><div class='ctx'> 	while (i--)</div><div class='ctx'> 		phy_led_trigger_unregister(&amp;phy-&gt;phy_led_triggers[i]);</div><div class='del'>-	devm_kfree(&amp;phy-&gt;mdio.dev, phy-&gt;phy_led_triggers);</div><div class='add'>+	kfree(phy-&gt;phy_led_triggers);</div><div class='ctx'> out_unreg_link:</div><div class='ctx'> 	phy_led_trigger_unregister(phy-&gt;led_link_trigger);</div><div class='ctx'> out_free_link:</div><div class='del'>-	devm_kfree(&amp;phy-&gt;mdio.dev, phy-&gt;led_link_trigger);</div><div class='add'>+	kfree(phy-&gt;led_link_trigger);</div><div class='ctx'> 	phy-&gt;led_link_trigger = NULL;</div><div class='ctx'> out_clear:</div><div class='ctx'> 	phy-&gt;phy_num_led_triggers = 0;</div><div class='hunk'>@@ -145,8 +145,13 @@ void phy_led_triggers_unregister(struct phy_device *phy)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; phy-&gt;phy_num_led_triggers; i++)</div><div class='ctx'> 		phy_led_trigger_unregister(&amp;phy-&gt;phy_led_triggers[i]);</div><div class='add'>+	kfree(phy-&gt;phy_led_triggers);</div><div class='add'>+	phy-&gt;phy_led_triggers = NULL;</div><div class='ctx'> </div><div class='del'>-	if (phy-&gt;led_link_trigger)</div><div class='add'>+	if (phy-&gt;led_link_trigger) {</div><div class='ctx'> 		phy_led_trigger_unregister(phy-&gt;led_link_trigger);</div><div class='add'>+		kfree(phy-&gt;led_link_trigger);</div><div class='add'>+		phy-&gt;led_link_trigger = NULL;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(phy_led_triggers_unregister);</div><div class='head'>diff --git a/drivers/net/phy/phy_link_topology.c b/drivers/net/phy/phy_link_topology.c<br/>index 4a5d73002a1a..0e9e987f37dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy_link_topology.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phy_link_topology.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy_link_topology.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phy_link_topology.c</a></div><div class='hunk'>@@ -73,7 +73,7 @@ int phy_link_topo_add_phy(struct net_device *dev,</div><div class='ctx'> 				      xa_limit_32b, &amp;topo-&gt;next_phy_index,</div><div class='ctx'> 				      GFP_KERNEL);</div><div class='ctx'> </div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/phy/phy_package.c b/drivers/net/phy/phy_package.c<br/>new file mode 100644<br/>index 000000000000..3024da0bbf7b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phy_package.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phy_package.c</a></div><div class='hunk'>@@ -0,0 +1,419 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * PHY package support</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#include "phylib.h"</div><div class='add'>+#include "phylib-internal.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct phy_package_shared - Shared information in PHY packages</div><div class='add'>+ * @base_addr: Base PHY address of PHY package used to combine PHYs</div><div class='add'>+ *   in one package and for offset calculation of phy_package_read/write</div><div class='add'>+ * @np: Pointer to the Device Node if PHY package defined in DT</div><div class='add'>+ * @refcnt: Number of PHYs connected to this shared data</div><div class='add'>+ * @flags: Initialization of PHY package</div><div class='add'>+ * @priv_size: Size of the shared private data @priv</div><div class='add'>+ * @priv: Driver private data shared across a PHY package</div><div class='add'>+ *</div><div class='add'>+ * Represents a shared structure between different phydev's in the same</div><div class='add'>+ * package, for example a quad PHY. See phy_package_join() and</div><div class='add'>+ * phy_package_leave().</div><div class='add'>+ */</div><div class='add'>+struct phy_package_shared {</div><div class='add'>+	u8 base_addr;</div><div class='add'>+	/* With PHY package defined in DT this points to the PHY package node */</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	refcount_t refcnt;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	size_t priv_size;</div><div class='add'>+</div><div class='add'>+	/* private data pointer */</div><div class='add'>+	/* note that this pointer is shared between different phydevs and</div><div class='add'>+	 * the user has to take care of appropriate locking. It is allocated</div><div class='add'>+	 * and freed automatically by phy_package_join() and</div><div class='add'>+	 * phy_package_leave().</div><div class='add'>+	 */</div><div class='add'>+	void *priv;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct device_node *phy_package_get_node(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return phydev-&gt;shared-&gt;np;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_package_get_node);</div><div class='add'>+</div><div class='add'>+void *phy_package_get_priv(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return phydev-&gt;shared-&gt;priv;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_package_get_priv);</div><div class='add'>+</div><div class='add'>+static int phy_package_address(struct phy_device *phydev,</div><div class='add'>+			       unsigned int addr_offset)</div><div class='add'>+{</div><div class='add'>+	struct phy_package_shared *shared = phydev-&gt;shared;</div><div class='add'>+	u8 base_addr = shared-&gt;base_addr;</div><div class='add'>+</div><div class='add'>+	if (addr_offset &gt;= PHY_MAX_ADDR - base_addr)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/* we know that addr will be in the range 0..31 and thus the</div><div class='add'>+	 * implicit cast to a signed int is not a problem.</div><div class='add'>+	 */</div><div class='add'>+	return base_addr + addr_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int __phy_package_read(struct phy_device *phydev, unsigned int addr_offset,</div><div class='add'>+		       u32 regnum)</div><div class='add'>+{</div><div class='add'>+	int addr = phy_package_address(phydev, addr_offset);</div><div class='add'>+</div><div class='add'>+	if (addr &lt; 0)</div><div class='add'>+		return addr;</div><div class='add'>+</div><div class='add'>+	return __mdiobus_read(phydev-&gt;mdio.bus, addr, regnum);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__phy_package_read);</div><div class='add'>+</div><div class='add'>+int __phy_package_write(struct phy_device *phydev, unsigned int addr_offset,</div><div class='add'>+			u32 regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	int addr = phy_package_address(phydev, addr_offset);</div><div class='add'>+</div><div class='add'>+	if (addr &lt; 0)</div><div class='add'>+		return addr;</div><div class='add'>+</div><div class='add'>+	return __mdiobus_write(phydev-&gt;mdio.bus, addr, regnum, val);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(__phy_package_write);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __phy_package_read_mmd - read MMD reg relative to PHY package base addr</div><div class='add'>+ * @phydev: The phy_device struct</div><div class='add'>+ * @addr_offset: The offset to be added to PHY package base_addr</div><div class='add'>+ * @devad: The MMD to read from</div><div class='add'>+ * @regnum: The register on the MMD to read</div><div class='add'>+ *</div><div class='add'>+ * Convenience helper for reading a register of an MMD on a given PHY</div><div class='add'>+ * using the PHY package base address. The base address is added to</div><div class='add'>+ * the addr_offset value.</div><div class='add'>+ *</div><div class='add'>+ * Same calling rules as for __phy_read();</div><div class='add'>+ *</div><div class='add'>+ * NOTE: It's assumed that the entire PHY package is either C22 or C45.</div><div class='add'>+ */</div><div class='add'>+int __phy_package_read_mmd(struct phy_device *phydev,</div><div class='add'>+			   unsigned int addr_offset, int devad,</div><div class='add'>+			   u32 regnum)</div><div class='add'>+{</div><div class='add'>+	int addr = phy_package_address(phydev, addr_offset);</div><div class='add'>+</div><div class='add'>+	if (addr &lt; 0)</div><div class='add'>+		return addr;</div><div class='add'>+</div><div class='add'>+	if (regnum &gt; (u16)~0 || devad &gt; 32)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return mmd_phy_read(phydev-&gt;mdio.bus, addr, phydev-&gt;is_c45, devad,</div><div class='add'>+			    regnum);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__phy_package_read_mmd);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __phy_package_write_mmd - write MMD reg relative to PHY package base addr</div><div class='add'>+ * @phydev: The phy_device struct</div><div class='add'>+ * @addr_offset: The offset to be added to PHY package base_addr</div><div class='add'>+ * @devad: The MMD to write to</div><div class='add'>+ * @regnum: The register on the MMD to write</div><div class='add'>+ * @val: value to write to @regnum</div><div class='add'>+ *</div><div class='add'>+ * Convenience helper for writing a register of an MMD on a given PHY</div><div class='add'>+ * using the PHY package base address. The base address is added to</div><div class='add'>+ * the addr_offset value.</div><div class='add'>+ *</div><div class='add'>+ * Same calling rules as for __phy_write();</div><div class='add'>+ *</div><div class='add'>+ * NOTE: It's assumed that the entire PHY package is either C22 or C45.</div><div class='add'>+ */</div><div class='add'>+int __phy_package_write_mmd(struct phy_device *phydev,</div><div class='add'>+			    unsigned int addr_offset, int devad,</div><div class='add'>+			    u32 regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	int addr = phy_package_address(phydev, addr_offset);</div><div class='add'>+</div><div class='add'>+	if (addr &lt; 0)</div><div class='add'>+		return addr;</div><div class='add'>+</div><div class='add'>+	if (regnum &gt; (u16)~0 || devad &gt; 32)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return mmd_phy_write(phydev-&gt;mdio.bus, addr, phydev-&gt;is_c45, devad,</div><div class='add'>+			     regnum, val);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(__phy_package_write_mmd);</div><div class='add'>+</div><div class='add'>+static bool __phy_package_set_once(struct phy_device *phydev, unsigned int b)</div><div class='add'>+{</div><div class='add'>+	struct phy_package_shared *shared = phydev-&gt;shared;</div><div class='add'>+</div><div class='add'>+	if (!shared)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !test_and_set_bit(b, &amp;shared-&gt;flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool phy_package_init_once(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return __phy_package_set_once(phydev, 0);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_package_init_once);</div><div class='add'>+</div><div class='add'>+bool phy_package_probe_once(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return __phy_package_set_once(phydev, 1);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_package_probe_once);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_package_join - join a common PHY group</div><div class='add'>+ * @phydev: target phy_device struct</div><div class='add'>+ * @base_addr: cookie and base PHY address of PHY package for offset</div><div class='add'>+ *   calculation of global register access</div><div class='add'>+ * @priv_size: if non-zero allocate this amount of bytes for private data</div><div class='add'>+ *</div><div class='add'>+ * This joins a PHY group and provides a shared storage for all phydevs in</div><div class='add'>+ * this group. This is intended to be used for packages which contain</div><div class='add'>+ * more than one PHY, for example a quad PHY transceiver.</div><div class='add'>+ *</div><div class='add'>+ * The base_addr parameter serves as cookie which has to have the same values</div><div class='add'>+ * for all members of one group and as the base PHY address of the PHY package</div><div class='add'>+ * for offset calculation to access generic registers of a PHY package.</div><div class='add'>+ * Usually, one of the PHY addresses of the different PHYs in the package</div><div class='add'>+ * provides access to these global registers.</div><div class='add'>+ * The address which is given here, will be used in the phy_package_read()</div><div class='add'>+ * and phy_package_write() convenience functions as base and added to the</div><div class='add'>+ * passed offset in those functions.</div><div class='add'>+ *</div><div class='add'>+ * This will set the shared pointer of the phydev to the shared storage.</div><div class='add'>+ * If this is the first call for a this cookie the shared storage will be</div><div class='add'>+ * allocated. If priv_size is non-zero, the given amount of bytes are</div><div class='add'>+ * allocated for the priv member.</div><div class='add'>+ *</div><div class='add'>+ * Returns &lt; 1 on error, 0 on success. Esp. calling phy_package_join()</div><div class='add'>+ * with the same cookie but a different priv_size is an error.</div><div class='add'>+ */</div><div class='add'>+int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = phydev-&gt;mdio.bus;</div><div class='add'>+	struct phy_package_shared *shared;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (base_addr &lt; 0 || base_addr &gt;= PHY_MAX_ADDR)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;bus-&gt;shared_lock);</div><div class='add'>+	shared = bus-&gt;shared[base_addr];</div><div class='add'>+	if (!shared) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		shared = kzalloc(sizeof(*shared), GFP_KERNEL);</div><div class='add'>+		if (!shared)</div><div class='add'>+			goto err_unlock;</div><div class='add'>+		if (priv_size) {</div><div class='add'>+			shared-&gt;priv = kzalloc(priv_size, GFP_KERNEL);</div><div class='add'>+			if (!shared-&gt;priv)</div><div class='add'>+				goto err_free;</div><div class='add'>+			shared-&gt;priv_size = priv_size;</div><div class='add'>+		}</div><div class='add'>+		shared-&gt;base_addr = base_addr;</div><div class='add'>+		shared-&gt;np = NULL;</div><div class='add'>+		refcount_set(&amp;shared-&gt;refcnt, 1);</div><div class='add'>+		bus-&gt;shared[base_addr] = shared;</div><div class='add'>+	} else {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		if (priv_size &amp;&amp; priv_size != shared-&gt;priv_size)</div><div class='add'>+			goto err_unlock;</div><div class='add'>+		refcount_inc(&amp;shared-&gt;refcnt);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;shared_lock);</div><div class='add'>+</div><div class='add'>+	phydev-&gt;shared = shared;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free:</div><div class='add'>+	kfree(shared);</div><div class='add'>+err_unlock:</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;shared_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_package_join);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * of_phy_package_join - join a common PHY group in PHY package</div><div class='add'>+ * @phydev: target phy_device struct</div><div class='add'>+ * @priv_size: if non-zero allocate this amount of bytes for private data</div><div class='add'>+ *</div><div class='add'>+ * This is a variant of phy_package_join for PHY package defined in DT.</div><div class='add'>+ *</div><div class='add'>+ * The parent node of the @phydev is checked as a valid PHY package node</div><div class='add'>+ * structure (by matching the node name "ethernet-phy-package") and the</div><div class='add'>+ * base_addr for the PHY package is passed to phy_package_join.</div><div class='add'>+ *</div><div class='add'>+ * With this configuration the shared struct will also have the np value</div><div class='add'>+ * filled to use additional DT defined properties in PHY specific</div><div class='add'>+ * probe_once and config_init_once PHY package OPs.</div><div class='add'>+ *</div><div class='add'>+ * Returns &lt; 0 on error, 0 on success. Esp. calling phy_package_join()</div><div class='add'>+ * with the same cookie but a different priv_size is an error. Or a parent</div><div class='add'>+ * node is not detected or is not valid or doesn't match the expected node</div><div class='add'>+ * name for PHY package.</div><div class='add'>+ */</div><div class='add'>+int of_phy_package_join(struct phy_device *phydev, size_t priv_size)</div><div class='add'>+{</div><div class='add'>+	struct device_node *node = phydev-&gt;mdio.dev.of_node;</div><div class='add'>+	struct device_node *package_node;</div><div class='add'>+	u32 base_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!node)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	package_node = of_get_parent(node);</div><div class='add'>+	if (!package_node)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!of_node_name_eq(package_node, "ethernet-phy-package")) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (of_property_read_u32(package_node, "reg", &amp;base_addr)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = phy_package_join(phydev, base_addr, priv_size);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	phydev-&gt;shared-&gt;np = package_node;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+exit:</div><div class='add'>+	of_node_put(package_node);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(of_phy_package_join);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phy_package_leave - leave a common PHY group</div><div class='add'>+ * @phydev: target phy_device struct</div><div class='add'>+ *</div><div class='add'>+ * This leaves a PHY group created by phy_package_join(). If this phydev</div><div class='add'>+ * was the last user of the shared data between the group, this data is</div><div class='add'>+ * freed. Resets the phydev-&gt;shared pointer to NULL.</div><div class='add'>+ */</div><div class='add'>+void phy_package_leave(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct phy_package_shared *shared = phydev-&gt;shared;</div><div class='add'>+	struct mii_bus *bus = phydev-&gt;mdio.bus;</div><div class='add'>+</div><div class='add'>+	if (!shared)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Decrease the node refcount on leave if present */</div><div class='add'>+	if (shared-&gt;np)</div><div class='add'>+		of_node_put(shared-&gt;np);</div><div class='add'>+</div><div class='add'>+	if (refcount_dec_and_mutex_lock(&amp;shared-&gt;refcnt, &amp;bus-&gt;shared_lock)) {</div><div class='add'>+		bus-&gt;shared[shared-&gt;base_addr] = NULL;</div><div class='add'>+		mutex_unlock(&amp;bus-&gt;shared_lock);</div><div class='add'>+		kfree(shared-&gt;priv);</div><div class='add'>+		kfree(shared);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phydev-&gt;shared = NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phy_package_leave);</div><div class='add'>+</div><div class='add'>+static void devm_phy_package_leave(struct device *dev, void *res)</div><div class='add'>+{</div><div class='add'>+	phy_package_leave(*(struct phy_device **)res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * devm_phy_package_join - resource managed phy_package_join()</div><div class='add'>+ * @dev: device that is registering this PHY package</div><div class='add'>+ * @phydev: target phy_device struct</div><div class='add'>+ * @base_addr: cookie and base PHY address of PHY package for offset</div><div class='add'>+ *   calculation of global register access</div><div class='add'>+ * @priv_size: if non-zero allocate this amount of bytes for private data</div><div class='add'>+ *</div><div class='add'>+ * Managed phy_package_join(). Shared storage fetched by this function,</div><div class='add'>+ * phy_package_leave() is automatically called on driver detach. See</div><div class='add'>+ * phy_package_join() for more information.</div><div class='add'>+ */</div><div class='add'>+int devm_phy_package_join(struct device *dev, struct phy_device *phydev,</div><div class='add'>+			  int base_addr, size_t priv_size)</div><div class='add'>+{</div><div class='add'>+	struct phy_device **ptr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ptr = devres_alloc(devm_phy_package_leave, sizeof(*ptr),</div><div class='add'>+			   GFP_KERNEL);</div><div class='add'>+	if (!ptr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = phy_package_join(phydev, base_addr, priv_size);</div><div class='add'>+</div><div class='add'>+	if (!ret) {</div><div class='add'>+		*ptr = phydev;</div><div class='add'>+		devres_add(dev, ptr);</div><div class='add'>+	} else {</div><div class='add'>+		devres_free(ptr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_phy_package_join);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * devm_of_phy_package_join - resource managed of_phy_package_join()</div><div class='add'>+ * @dev: device that is registering this PHY package</div><div class='add'>+ * @phydev: target phy_device struct</div><div class='add'>+ * @priv_size: if non-zero allocate this amount of bytes for private data</div><div class='add'>+ *</div><div class='add'>+ * Managed of_phy_package_join(). Shared storage fetched by this function,</div><div class='add'>+ * phy_package_leave() is automatically called on driver detach. See</div><div class='add'>+ * of_phy_package_join() for more information.</div><div class='add'>+ */</div><div class='add'>+int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev,</div><div class='add'>+			     size_t priv_size)</div><div class='add'>+{</div><div class='add'>+	struct phy_device **ptr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ptr = devres_alloc(devm_phy_package_leave, sizeof(*ptr),</div><div class='add'>+			   GFP_KERNEL);</div><div class='add'>+	if (!ptr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = of_phy_package_join(phydev, priv_size);</div><div class='add'>+</div><div class='add'>+	if (!ret) {</div><div class='add'>+		*ptr = phydev;</div><div class='add'>+		devres_add(dev, ptr);</div><div class='add'>+	} else {</div><div class='add'>+		devres_free(ptr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_of_phy_package_join);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("PHY package support");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/phy/phylib-internal.h b/drivers/net/phy/phylib-internal.h<br/>new file mode 100644<br/>index 000000000000..ebda74eb60a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phylib-internal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phylib-internal.h</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * phylib-internal header</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PHYLIB_INTERNAL_H</div><div class='add'>+#define __PHYLIB_INTERNAL_H</div><div class='add'>+</div><div class='add'>+struct phy_device;</div><div class='add'>+struct mii_bus;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * phy_supported_speeds - return all speeds currently supported by a PHY device</div><div class='add'>+ */</div><div class='add'>+unsigned int phy_supported_speeds(struct phy_device *phy,</div><div class='add'>+				  unsigned int *speeds,</div><div class='add'>+				  unsigned int size);</div><div class='add'>+void of_set_phy_supported(struct phy_device *phydev);</div><div class='add'>+void of_set_phy_eee_broken(struct phy_device *phydev);</div><div class='add'>+void of_set_phy_timing_role(struct phy_device *phydev);</div><div class='add'>+int phy_speed_down_core(struct phy_device *phydev);</div><div class='add'>+void phy_check_downshift(struct phy_device *phydev);</div><div class='add'>+</div><div class='add'>+int mmd_phy_read(struct mii_bus *bus, int phy_addr, bool is_c45,</div><div class='add'>+		 int devad, u32 regnum);</div><div class='add'>+int mmd_phy_write(struct mii_bus *bus, int phy_addr, bool is_c45,</div><div class='add'>+		  int devad, u32 regnum, u16 val);</div><div class='add'>+</div><div class='add'>+int genphy_c45_read_eee_adv(struct phy_device *phydev, unsigned long *adv);</div><div class='add'>+</div><div class='add'>+#endif /* __PHYLIB_INTERNAL_H */</div><div class='head'>diff --git a/drivers/net/phy/phylib.h b/drivers/net/phy/phylib.h<br/>new file mode 100644<br/>index 000000000000..c15484a805b3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phylib.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phylib.h</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * phylib header</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __PHYLIB_H</div><div class='add'>+#define __PHYLIB_H</div><div class='add'>+</div><div class='add'>+struct device_node;</div><div class='add'>+struct phy_device;</div><div class='add'>+</div><div class='add'>+struct device_node *phy_package_get_node(struct phy_device *phydev);</div><div class='add'>+void *phy_package_get_priv(struct phy_device *phydev);</div><div class='add'>+int __phy_package_read(struct phy_device *phydev, unsigned int addr_offset,</div><div class='add'>+		       u32 regnum);</div><div class='add'>+int __phy_package_write(struct phy_device *phydev, unsigned int addr_offset,</div><div class='add'>+			u32 regnum, u16 val);</div><div class='add'>+int __phy_package_read_mmd(struct phy_device *phydev,</div><div class='add'>+			   unsigned int addr_offset, int devad,</div><div class='add'>+			   u32 regnum);</div><div class='add'>+int __phy_package_write_mmd(struct phy_device *phydev,</div><div class='add'>+			    unsigned int addr_offset, int devad,</div><div class='add'>+			    u32 regnum, u16 val);</div><div class='add'>+bool phy_package_init_once(struct phy_device *phydev);</div><div class='add'>+bool phy_package_probe_once(struct phy_device *phydev);</div><div class='add'>+int phy_package_join(struct phy_device *phydev, int base_addr, size_t priv_size);</div><div class='add'>+int of_phy_package_join(struct phy_device *phydev, size_t priv_size);</div><div class='add'>+void phy_package_leave(struct phy_device *phydev);</div><div class='add'>+int devm_phy_package_join(struct device *dev, struct phy_device *phydev,</div><div class='add'>+			  int base_addr, size_t priv_size);</div><div class='add'>+int devm_of_phy_package_join(struct device *dev, struct phy_device *phydev,</div><div class='add'>+			     size_t priv_size);</div><div class='add'>+</div><div class='add'>+#endif /* __PHYLIB_H */</div><div class='head'>diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c<br/>index 6ca7ea970f51..43d8380aaefb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phylink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/phylink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/phylink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/phylink.c</a></div><div class='hunk'>@@ -20,16 +20,10 @@</div><div class='ctx'> #include &lt;linux/timer.h&gt;</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "phy-caps.h"</div><div class='ctx'> #include "sfp.h"</div><div class='ctx'> #include "swphy.h"</div><div class='ctx'> </div><div class='del'>-#define SUPPORTED_INTERFACES \</div><div class='del'>-	(SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \</div><div class='del'>-	 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)</div><div class='del'>-#define ADVERTISED_INTERFACES \</div><div class='del'>-	(ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \</div><div class='del'>-	 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)</div><div class='del'>-</div><div class='ctx'> enum {</div><div class='ctx'> 	PHYLINK_DISABLE_STOPPED,</div><div class='ctx'> 	PHYLINK_DISABLE_LINK,</div><div class='hunk'>@@ -56,9 +50,11 @@ struct phylink {</div><div class='ctx'> 	struct phy_device *phydev;</div><div class='ctx'> 	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */</div><div class='ctx'> 	u8 cfg_link_an_mode;		/* MLO_AN_xxx */</div><div class='del'>-	u8 cur_link_an_mode;</div><div class='add'>+	u8 req_link_an_mode;		/* Requested MLO_AN_xxx mode */</div><div class='add'>+	u8 act_link_an_mode;		/* Active MLO_AN_xxx mode */</div><div class='ctx'> 	u8 link_port;			/* The current non-phy ethtool port */</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);</div><div class='add'>+	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi);</div><div class='ctx'> </div><div class='ctx'> 	/* The link configuration settings */</div><div class='ctx'> 	struct phylink_link_state link_config;</div><div class='hunk'>@@ -69,22 +65,37 @@ struct phylink {</div><div class='ctx'> 	struct gpio_desc *link_gpio;</div><div class='ctx'> 	unsigned int link_irq;</div><div class='ctx'> 	struct timer_list link_poll;</div><div class='del'>-	void (*get_fixed_state)(struct net_device *dev,</div><div class='del'>-				struct phylink_link_state *s);</div><div class='ctx'> </div><div class='ctx'> 	struct mutex state_mutex;</div><div class='add'>+	/* Serialize updates to pl-&gt;phydev with phylink_resolve() */</div><div class='add'>+	struct mutex phydev_mutex;</div><div class='ctx'> 	struct phylink_link_state phy_state;</div><div class='add'>+	unsigned int phy_ib_mode;</div><div class='ctx'> 	struct work_struct resolve;</div><div class='ctx'> 	unsigned int pcs_neg_mode;</div><div class='ctx'> 	unsigned int pcs_state;</div><div class='ctx'> </div><div class='del'>-	bool mac_link_dropped;</div><div class='add'>+	bool link_failed;</div><div class='add'>+	bool suspend_link_up;</div><div class='add'>+	bool major_config_failed;</div><div class='add'>+	bool mac_supports_eee_ops;</div><div class='add'>+	bool mac_supports_eee;</div><div class='add'>+	bool phy_enable_tx_lpi;</div><div class='add'>+	bool mac_enable_tx_lpi;</div><div class='add'>+	bool mac_tx_clk_stop;</div><div class='add'>+	u32 mac_tx_lpi_timer;</div><div class='add'>+	u8 mac_rx_clk_stop_blocked;</div><div class='ctx'> </div><div class='ctx'> 	struct sfp_bus *sfp_bus;</div><div class='ctx'> 	bool sfp_may_have_phy;</div><div class='ctx'> 	DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);</div><div class='ctx'> 	u8 sfp_port;</div><div class='add'>+</div><div class='add'>+	struct eee_config eee_cfg;</div><div class='add'>+</div><div class='add'>+	u32 wolopts_mac;</div><div class='add'>+	u8 wol_sopass[SOPASS_MAX];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define phylink_printk(level, pl, fmt, ...) \</div><div class='hunk'>@@ -121,6 +132,9 @@ do {									\</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static const phy_interface_t phylink_sfp_interface_preference[] = {</div><div class='add'>+	PHY_INTERFACE_MODE_100GBASEP,</div><div class='add'>+	PHY_INTERFACE_MODE_50GBASER,</div><div class='add'>+	PHY_INTERFACE_MODE_LAUI,</div><div class='ctx'> 	PHY_INTERFACE_MODE_25GBASER,</div><div class='ctx'> 	PHY_INTERFACE_MODE_USXGMII,</div><div class='ctx'> 	PHY_INTERFACE_MODE_10GBASER,</div><div class='hunk'>@@ -174,6 +188,24 @@ static const char *phylink_an_mode_str(unsigned int mode)</div><div class='ctx'> 	return mode &lt; ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const char *phylink_pcs_mode_str(unsigned int mode)</div><div class='add'>+{</div><div class='add'>+	if (!mode)</div><div class='add'>+		return "none";</div><div class='add'>+</div><div class='add'>+	if (mode &amp; PHYLINK_PCS_NEG_OUTBAND)</div><div class='add'>+		return "outband";</div><div class='add'>+</div><div class='add'>+	if (mode &amp; PHYLINK_PCS_NEG_INBAND) {</div><div class='add'>+		if (mode &amp; PHYLINK_PCS_NEG_ENABLED)</div><div class='add'>+			return "inband,an-enabled";</div><div class='add'>+		else</div><div class='add'>+			return "inband,an-disabled";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return "unknown";</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static unsigned int phylink_interface_signal_rate(phy_interface_t interface)</div><div class='ctx'> {</div><div class='ctx'> 	switch (interface) {</div><div class='hunk'>@@ -210,6 +242,7 @@ static int phylink_interface_max_speed(phy_interface_t interface)</div><div class='ctx'> 	case PHY_INTERFACE_MODE_SMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_REVMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+	case PHY_INTERFACE_MODE_MIILITE:</div><div class='ctx'> 		return SPEED_100;</div><div class='ctx'> </div><div class='ctx'> 	case PHY_INTERFACE_MODE_TBI:</div><div class='hunk'>@@ -250,6 +283,13 @@ static int phylink_interface_max_speed(phy_interface_t interface)</div><div class='ctx'> 	case PHY_INTERFACE_MODE_XLGMII:</div><div class='ctx'> 		return SPEED_40000;</div><div class='ctx'> </div><div class='add'>+	case PHY_INTERFACE_MODE_50GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_LAUI:</div><div class='add'>+		return SPEED_50000;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_100GBASEP:</div><div class='add'>+		return SPEED_100000;</div><div class='add'>+</div><div class='ctx'> 	case PHY_INTERFACE_MODE_INTERNAL:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_NA:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MAX:</div><div class='hunk'>@@ -262,6 +302,61 @@ static int phylink_interface_max_speed(phy_interface_t interface)</div><div class='ctx'> 	return SPEED_UNKNOWN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct {</div><div class='add'>+	unsigned long mask;</div><div class='add'>+	int speed;</div><div class='add'>+	unsigned int duplex;</div><div class='add'>+	unsigned int caps_bit;</div><div class='add'>+} phylink_caps_params[] = {</div><div class='add'>+	{ MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) },</div><div class='add'>+	{ MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) },</div><div class='add'>+	{ MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) },</div><div class='add'>+	{ MAC_56000FD,  SPEED_56000,  DUPLEX_FULL, BIT(LINK_CAPA_56000FD) },</div><div class='add'>+	{ MAC_50000FD,  SPEED_50000,  DUPLEX_FULL, BIT(LINK_CAPA_50000FD) },</div><div class='add'>+	{ MAC_40000FD,  SPEED_40000,  DUPLEX_FULL, BIT(LINK_CAPA_40000FD) },</div><div class='add'>+	{ MAC_25000FD,  SPEED_25000,  DUPLEX_FULL, BIT(LINK_CAPA_25000FD) },</div><div class='add'>+	{ MAC_20000FD,  SPEED_20000,  DUPLEX_FULL, BIT(LINK_CAPA_20000FD) },</div><div class='add'>+	{ MAC_10000FD,  SPEED_10000,  DUPLEX_FULL, BIT(LINK_CAPA_10000FD) },</div><div class='add'>+	{ MAC_5000FD,   SPEED_5000,   DUPLEX_FULL, BIT(LINK_CAPA_5000FD) },</div><div class='add'>+	{ MAC_2500FD,   SPEED_2500,   DUPLEX_FULL, BIT(LINK_CAPA_2500FD) },</div><div class='add'>+	{ MAC_1000FD,   SPEED_1000,   DUPLEX_FULL, BIT(LINK_CAPA_1000FD) },</div><div class='add'>+	{ MAC_1000HD,   SPEED_1000,   DUPLEX_HALF, BIT(LINK_CAPA_1000HD) },</div><div class='add'>+	{ MAC_100FD,    SPEED_100,    DUPLEX_FULL, BIT(LINK_CAPA_100FD) },</div><div class='add'>+	{ MAC_100HD,    SPEED_100,    DUPLEX_HALF, BIT(LINK_CAPA_100HD) },</div><div class='add'>+	{ MAC_10FD,     SPEED_10,     DUPLEX_FULL, BIT(LINK_CAPA_10FD) },</div><div class='add'>+	{ MAC_10HD,     SPEED_10,     DUPLEX_HALF, BIT(LINK_CAPA_10HD) },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps</div><div class='add'>+ * @caps: A set of MAC capabilities</div><div class='add'>+ *</div><div class='add'>+ * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h</div><div class='add'>+ */</div><div class='add'>+static unsigned long phylink_caps_to_link_caps(unsigned long caps)</div><div class='add'>+{</div><div class='add'>+	unsigned long link_caps = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;  ARRAY_SIZE(phylink_caps_params); i++)</div><div class='add'>+		if (caps &amp; phylink_caps_params[i].mask)</div><div class='add'>+			link_caps |= phylink_caps_params[i].caps_bit;</div><div class='add'>+</div><div class='add'>+	return link_caps;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps)</div><div class='add'>+{</div><div class='add'>+	unsigned long caps = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;  ARRAY_SIZE(phylink_caps_params); i++)</div><div class='add'>+		if (link_caps &amp; phylink_caps_params[i].caps_bit)</div><div class='add'>+			caps |= phylink_caps_params[i].mask;</div><div class='add'>+</div><div class='add'>+	return caps;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes</div><div class='ctx'>  * @linkmodes: ethtool linkmode mask (must be already initialised)</div><div class='hunk'>@@ -273,172 +368,17 @@ static int phylink_interface_max_speed(phy_interface_t interface)</div><div class='ctx'> static void phylink_caps_to_linkmodes(unsigned long *linkmodes,</div><div class='ctx'> 				      unsigned long caps)</div><div class='ctx'> {</div><div class='add'>+	unsigned long link_caps = phylink_caps_to_link_caps(caps);</div><div class='add'>+</div><div class='ctx'> 	if (caps &amp; MAC_SYM_PAUSE)</div><div class='ctx'> 		__set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);</div><div class='ctx'> </div><div class='ctx'> 	if (caps &amp; MAC_ASYM_PAUSE)</div><div class='ctx'> 		__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);</div><div class='ctx'> </div><div class='del'>-	if (caps &amp; MAC_10HD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_10FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_100HD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_100FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_1000HD)</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_1000FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_2500FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_5000FD)</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_10000FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_25000FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_40000FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_50000FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,</div><div class='del'>-			  linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_56000FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_100000FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,</div><div class='del'>-			  linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,</div><div class='del'>-			  linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,</div><div class='del'>-			  linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_200000FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,</div><div class='del'>-			  linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,</div><div class='del'>-			  linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (caps &amp; MAC_400000FD) {</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,</div><div class='del'>-			  linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,</div><div class='del'>-			  linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);</div><div class='del'>-		__set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);</div><div class='del'>-	}</div><div class='add'>+	phy_caps_linkmodes(link_caps, linkmodes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct {</div><div class='del'>-	unsigned long mask;</div><div class='del'>-	int speed;</div><div class='del'>-	unsigned int duplex;</div><div class='del'>-} phylink_caps_params[] = {</div><div class='del'>-	{ MAC_400000FD, SPEED_400000, DUPLEX_FULL },</div><div class='del'>-	{ MAC_200000FD, SPEED_200000, DUPLEX_FULL },</div><div class='del'>-	{ MAC_100000FD, SPEED_100000, DUPLEX_FULL },</div><div class='del'>-	{ MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },</div><div class='del'>-	{ MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },</div><div class='del'>-	{ MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },</div><div class='del'>-	{ MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },</div><div class='del'>-	{ MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },</div><div class='del'>-	{ MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },</div><div class='del'>-	{ MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },</div><div class='del'>-	{ MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },</div><div class='del'>-	{ MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },</div><div class='del'>-	{ MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },</div><div class='del'>-	{ MAC_100FD,    SPEED_100,    DUPLEX_FULL },</div><div class='del'>-	{ MAC_100HD,    SPEED_100,    DUPLEX_HALF },</div><div class='del'>-	{ MAC_10FD,     SPEED_10,     DUPLEX_FULL },</div><div class='del'>-	{ MAC_10HD,     SPEED_10,     DUPLEX_HALF },</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * phylink_limit_mac_speed - limit the phylink_config to a maximum speed</div><div class='ctx'>  * @config: pointer to a &amp;struct phylink_config</div><div class='hunk'>@@ -494,86 +434,12 @@ static unsigned long phylink_get_capabilities(phy_interface_t interface,</div><div class='ctx'> 					      unsigned long mac_capabilities,</div><div class='ctx'> 					      int rate_matching)</div><div class='ctx'> {</div><div class='add'>+	unsigned long link_caps = phy_caps_from_interface(interface);</div><div class='ctx'> 	int max_speed = phylink_interface_max_speed(interface);</div><div class='ctx'> 	unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;</div><div class='ctx'> 	unsigned long matched_caps = 0;</div><div class='ctx'> </div><div class='del'>-	switch (interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_USXGMII:</div><div class='del'>-		caps |= MAC_10000FD | MAC_5000FD;</div><div class='del'>-		fallthrough;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_10G_QXGMII:</div><div class='del'>-		caps |= MAC_2500FD;</div><div class='del'>-		fallthrough;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='del'>-	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_PSGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_QSGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_QUSGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_SGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_GMII:</div><div class='del'>-		caps |= MAC_1000HD | MAC_1000FD;</div><div class='del'>-		fallthrough;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_REVRMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_SMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_REVMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_MII:</div><div class='del'>-		caps |= MAC_10HD | MAC_10FD;</div><div class='del'>-		fallthrough;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_100BASEX:</div><div class='del'>-		caps |= MAC_100HD | MAC_100FD;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_TBI:</div><div class='del'>-	case PHY_INTERFACE_MODE_MOCA:</div><div class='del'>-	case PHY_INTERFACE_MODE_RTBI:</div><div class='del'>-	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='del'>-		caps |= MAC_1000HD;</div><div class='del'>-		fallthrough;</div><div class='del'>-	case PHY_INTERFACE_MODE_1000BASEKX:</div><div class='del'>-	case PHY_INTERFACE_MODE_TRGMII:</div><div class='del'>-		caps |= MAC_1000FD;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='del'>-		caps |= MAC_2500FD;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_5GBASER:</div><div class='del'>-		caps |= MAC_5000FD;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_XGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_RXAUI:</div><div class='del'>-	case PHY_INTERFACE_MODE_XAUI:</div><div class='del'>-	case PHY_INTERFACE_MODE_10GBASER:</div><div class='del'>-	case PHY_INTERFACE_MODE_10GKR:</div><div class='del'>-		caps |= MAC_10000FD;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_25GBASER:</div><div class='del'>-		caps |= MAC_25000FD;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_XLGMII:</div><div class='del'>-		caps |= MAC_40000FD;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_INTERNAL:</div><div class='del'>-		caps |= ~0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PHY_INTERFACE_MODE_NA:</div><div class='del'>-	case PHY_INTERFACE_MODE_MAX:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	caps |= phylink_link_caps_to_mac_caps(link_caps);</div><div class='ctx'> </div><div class='ctx'> 	switch (rate_matching) {</div><div class='ctx'> 	case RATE_MATCH_OPEN_LOOP:</div><div class='hunk'>@@ -671,6 +537,17 @@ static int phylink_validate_mac_and_pcs(struct phylink *pl,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/* Ensure that this PCS supports the interface which the MAC</div><div class='add'>+		 * returned it for. It is an error for the MAC to return a PCS</div><div class='add'>+		 * that does not support the interface mode.</div><div class='add'>+		 */</div><div class='add'>+		if (!phy_interface_empty(pcs-&gt;supported_interfaces) &amp;&amp;</div><div class='add'>+		    !test_bit(state-&gt;interface, pcs-&gt;supported_interfaces)) {</div><div class='add'>+			phylink_err(pl, "MAC returned PCS which does not support %s\n",</div><div class='add'>+				    phy_modes(state-&gt;interface));</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* Validate the link parameters with the PCS */</div><div class='ctx'> 		if (pcs-&gt;ops-&gt;pcs_validate) {</div><div class='ctx'> 			ret = pcs-&gt;ops-&gt;pcs_validate(pcs, supported, state);</div><div class='hunk'>@@ -761,12 +638,29 @@ static int phylink_validate(struct phylink *pl, unsigned long *supported,</div><div class='ctx'> 	return phylink_validate_mac_and_pcs(pl, supported, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void phylink_fill_fixedlink_supported(unsigned long *supported)</div><div class='add'>+{</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int phylink_parse_fixedlink(struct phylink *pl,</div><div class='ctx'> 				   const struct fwnode_handle *fwnode)</div><div class='ctx'> {</div><div class='add'>+	__ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, };</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };</div><div class='add'>+	const struct link_capabilities *c;</div><div class='ctx'> 	struct fwnode_handle *fixed_node;</div><div class='del'>-	const struct phy_setting *s;</div><div class='ctx'> 	struct gpio_desc *desc;</div><div class='ctx'> 	u32 speed;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -814,6 +708,9 @@ static int phylink_parse_fixedlink(struct phylink *pl,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n",</div><div class='add'>+			     fwnode);</div><div class='add'>+</div><div class='ctx'> 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",</div><div class='ctx'> 						     prop, ARRAY_SIZE(prop));</div><div class='ctx'> 		if (!ret) {</div><div class='hunk'>@@ -834,12 +731,16 @@ static int phylink_parse_fixedlink(struct phylink *pl,</div><div class='ctx'> 		phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",</div><div class='ctx'> 			     pl-&gt;link_config.speed);</div><div class='ctx'> </div><div class='del'>-	linkmode_fill(pl-&gt;supported);</div><div class='add'>+	linkmode_zero(pl-&gt;supported);</div><div class='add'>+	phylink_fill_fixedlink_supported(pl-&gt;supported);</div><div class='add'>+</div><div class='ctx'> 	linkmode_copy(pl-&gt;link_config.advertising, pl-&gt;supported);</div><div class='ctx'> 	phylink_validate(pl, pl-&gt;supported, &amp;pl-&gt;link_config);</div><div class='ctx'> </div><div class='del'>-	s = phy_lookup_setting(pl-&gt;link_config.speed, pl-&gt;link_config.duplex,</div><div class='del'>-			       pl-&gt;supported, true);</div><div class='add'>+	c = phy_caps_lookup(pl-&gt;link_config.speed, pl-&gt;link_config.duplex,</div><div class='add'>+			    pl-&gt;supported, true);</div><div class='add'>+	if (c)</div><div class='add'>+		linkmode_and(match, pl-&gt;supported, c-&gt;linkmodes);</div><div class='ctx'> </div><div class='ctx'> 	linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask);</div><div class='ctx'> 	linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask);</div><div class='hunk'>@@ -848,9 +749,10 @@ static int phylink_parse_fixedlink(struct phylink *pl,</div><div class='ctx'> </div><div class='ctx'> 	phylink_set(pl-&gt;supported, MII);</div><div class='ctx'> </div><div class='del'>-	if (s) {</div><div class='del'>-		__set_bit(s-&gt;bit, pl-&gt;supported);</div><div class='del'>-		__set_bit(s-&gt;bit, pl-&gt;link_config.lp_advertising);</div><div class='add'>+	if (c) {</div><div class='add'>+		linkmode_or(pl-&gt;supported, pl-&gt;supported, match);</div><div class='add'>+		linkmode_or(pl-&gt;link_config.lp_advertising,</div><div class='add'>+			    pl-&gt;link_config.lp_advertising, match);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",</div><div class='ctx'> 			     pl-&gt;link_config.duplex == DUPLEX_FULL ? "full" : "half",</div><div class='hunk'>@@ -918,6 +820,9 @@ static int phylink_parse_mode(struct phylink *pl,</div><div class='ctx'> 		case PHY_INTERFACE_MODE_10GKR:</div><div class='ctx'> 		case PHY_INTERFACE_MODE_10GBASER:</div><div class='ctx'> 		case PHY_INTERFACE_MODE_XLGMII:</div><div class='add'>+		case PHY_INTERFACE_MODE_50GBASER:</div><div class='add'>+		case PHY_INTERFACE_MODE_LAUI:</div><div class='add'>+		case PHY_INTERFACE_MODE_100GBASEP:</div><div class='ctx'> 			caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);</div><div class='ctx'> 			caps = phylink_get_capabilities(pl-&gt;link_config.interface, caps,</div><div class='ctx'> 							RATE_MATCH_NONE);</div><div class='hunk'>@@ -971,6 +876,15 @@ static void phylink_resolve_an_pause(struct phylink_link_state *state)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs,</div><div class='add'>+				    phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	if (pcs &amp;&amp; pcs-&gt;ops-&gt;pcs_inband_caps)</div><div class='add'>+		return pcs-&gt;ops-&gt;pcs_inband_caps(pcs, interface);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void phylink_pcs_pre_config(struct phylink_pcs *pcs,</div><div class='ctx'> 				   phy_interface_t interface)</div><div class='ctx'> {</div><div class='hunk'>@@ -1024,10 +938,40 @@ static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='ctx'> 		pcs-&gt;ops-&gt;pcs_link_up(pcs, neg_mode, interface, speed, duplex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void phylink_pcs_disable_eee(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	if (pcs &amp;&amp; pcs-&gt;ops-&gt;pcs_disable_eee)</div><div class='add'>+		pcs-&gt;ops-&gt;pcs_disable_eee(pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void phylink_pcs_enable_eee(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	if (pcs &amp;&amp; pcs-&gt;ops-&gt;pcs_enable_eee)</div><div class='add'>+		pcs-&gt;ops-&gt;pcs_enable_eee(pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Query inband for a specific interface mode, asking the MAC for the</div><div class='add'>+ * PCS which will be used to handle the interface mode.</div><div class='add'>+ */</div><div class='add'>+static unsigned int phylink_inband_caps(struct phylink *pl,</div><div class='add'>+					 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='add'>+</div><div class='add'>+	if (!pl-&gt;mac_ops-&gt;mac_select_pcs)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	pcs = pl-&gt;mac_ops-&gt;mac_select_pcs(pl-&gt;config, interface);</div><div class='add'>+	if (!pcs)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return phylink_pcs_inband_caps(pcs, interface);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void phylink_pcs_poll_stop(struct phylink *pl)</div><div class='ctx'> {</div><div class='ctx'> 	if (pl-&gt;cfg_link_an_mode == MLO_AN_INBAND)</div><div class='del'>-		del_timer(&amp;pl-&gt;link_poll);</div><div class='add'>+		timer_delete(&amp;pl-&gt;link_poll);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void phylink_pcs_poll_start(struct phylink *pl)</div><div class='hunk'>@@ -1065,13 +1009,13 @@ static void phylink_mac_config(struct phylink *pl,</div><div class='ctx'> </div><div class='ctx'> 	phylink_dbg(pl,</div><div class='ctx'> 		    "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",</div><div class='del'>-		    __func__, phylink_an_mode_str(pl-&gt;cur_link_an_mode),</div><div class='add'>+		    __func__, phylink_an_mode_str(pl-&gt;act_link_an_mode),</div><div class='ctx'> 		    phy_modes(st.interface),</div><div class='ctx'> 		    phy_rate_matching_to_str(st.rate_matching),</div><div class='ctx'> 		    __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,</div><div class='ctx'> 		    st.pause);</div><div class='ctx'> </div><div class='del'>-	pl-&gt;mac_ops-&gt;mac_config(pl-&gt;config, pl-&gt;cur_link_an_mode, &amp;st);</div><div class='add'>+	pl-&gt;mac_ops-&gt;mac_config(pl-&gt;config, pl-&gt;act_link_an_mode, &amp;st);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void phylink_pcs_an_restart(struct phylink *pl)</div><div class='hunk'>@@ -1079,13 +1023,50 @@ static void phylink_pcs_an_restart(struct phylink *pl)</div><div class='ctx'> 	if (pl-&gt;pcs &amp;&amp; linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,</div><div class='ctx'> 					 pl-&gt;link_config.advertising) &amp;&amp;</div><div class='ctx'> 	    phy_interface_mode_is_8023z(pl-&gt;link_config.interface) &amp;&amp;</div><div class='del'>-	    phylink_autoneg_inband(pl-&gt;cur_link_an_mode))</div><div class='add'>+	    phylink_autoneg_inband(pl-&gt;act_link_an_mode))</div><div class='ctx'> 		pl-&gt;pcs-&gt;ops-&gt;pcs_an_restart(pl-&gt;pcs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+enum inband_type {</div><div class='add'>+	INBAND_NONE,</div><div class='add'>+	INBAND_CISCO_SGMII,</div><div class='add'>+	INBAND_BASEX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static enum inband_type phylink_get_inband_type(phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_QSGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_QUSGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_10G_QXGMII:</div><div class='add'>+		/* These protocols are designed for use with a PHY which</div><div class='add'>+		 * communicates its negotiation result back to the MAC via</div><div class='add'>+		 * inband communication. Note: there exist PHYs that run</div><div class='add'>+		 * with SGMII but do not send the inband data.</div><div class='add'>+		 */</div><div class='add'>+		return INBAND_CISCO_SGMII;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		/* 1000base-X is designed for use media-side for Fibre</div><div class='add'>+		 * connections, and thus the Autoneg bit needs to be</div><div class='add'>+		 * taken into account. We also do this for 2500base-X</div><div class='add'>+		 * as well, but drivers may not support this, so may</div><div class='add'>+		 * need to override this.</div><div class='add'>+		 */</div><div class='add'>+		return INBAND_BASEX;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return INBAND_NONE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * phylink_pcs_neg_mode() - helper to determine PCS inband mode</div><div class='del'>- * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.</div><div class='add'>+ * @pl: a pointer to a &amp;struct phylink returned from phylink_create()</div><div class='add'>+ * @pcs: a pointer to &amp;struct phylink_pcs</div><div class='ctx'>  * @interface: interface mode to be used</div><div class='ctx'>  * @advertising: adertisement ethtool link mode mask</div><div class='ctx'>  *</div><div class='hunk'>@@ -1102,52 +1083,154 @@ static void phylink_pcs_an_restart(struct phylink *pl)</div><div class='ctx'>  * Note: this is for cases where the PCS itself is involved in negotiation</div><div class='ctx'>  * (e.g. Clause 37, SGMII and similar) not Clause 73.</div><div class='ctx'>  */</div><div class='del'>-static unsigned int phylink_pcs_neg_mode(unsigned int mode,</div><div class='del'>-					 phy_interface_t interface,</div><div class='del'>-					 const unsigned long *advertising)</div><div class='add'>+static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs,</div><div class='add'>+				 phy_interface_t interface,</div><div class='add'>+				 const unsigned long *advertising)</div><div class='ctx'> {</div><div class='del'>-	unsigned int neg_mode;</div><div class='add'>+	unsigned int pcs_ib_caps = 0;</div><div class='add'>+	unsigned int phy_ib_caps = 0;</div><div class='add'>+	unsigned int neg_mode, mode;</div><div class='add'>+	enum inband_type type;</div><div class='add'>+</div><div class='add'>+	type = phylink_get_inband_type(interface);</div><div class='add'>+	if (type == INBAND_NONE) {</div><div class='add'>+		pl-&gt;pcs_neg_mode = PHYLINK_PCS_NEG_NONE;</div><div class='add'>+		pl-&gt;act_link_an_mode = pl-&gt;req_link_an_mode;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	switch (interface) {</div><div class='del'>-	case PHY_INTERFACE_MODE_SGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_QSGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_QUSGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_USXGMII:</div><div class='del'>-	case PHY_INTERFACE_MODE_10G_QXGMII:</div><div class='del'>-		/* These protocols are designed for use with a PHY which</div><div class='del'>-		 * communicates its negotiation result back to the MAC via</div><div class='del'>-		 * inband communication. Note: there exist PHYs that run</div><div class='del'>-		 * with SGMII but do not send the inband data.</div><div class='add'>+	mode = pl-&gt;req_link_an_mode;</div><div class='add'>+</div><div class='add'>+	pl-&gt;phy_ib_mode = 0;</div><div class='add'>+</div><div class='add'>+	if (pcs)</div><div class='add'>+		pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface);</div><div class='add'>+</div><div class='add'>+	if (pl-&gt;phydev)</div><div class='add'>+		phy_ib_caps = phy_inband_caps(pl-&gt;phydev, interface);</div><div class='add'>+</div><div class='add'>+	phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n",</div><div class='add'>+		    phy_modes(interface), pcs_ib_caps, phy_ib_caps);</div><div class='add'>+</div><div class='add'>+	if (!phylink_autoneg_inband(mode)) {</div><div class='add'>+		bool pcs_ib_only = false;</div><div class='add'>+		bool phy_ib_only = false;</div><div class='add'>+</div><div class='add'>+		if (pcs_ib_caps &amp;&amp; pcs_ib_caps != LINK_INBAND_DISABLE) {</div><div class='add'>+			/* PCS supports reporting in-band capabilities, and</div><div class='add'>+			 * supports more than disable mode.</div><div class='add'>+			 */</div><div class='add'>+			if (pcs_ib_caps &amp; LINK_INBAND_DISABLE)</div><div class='add'>+				neg_mode = PHYLINK_PCS_NEG_OUTBAND;</div><div class='add'>+			else if (pcs_ib_caps &amp; LINK_INBAND_ENABLE)</div><div class='add'>+				pcs_ib_only = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (phy_ib_caps &amp;&amp; phy_ib_caps != LINK_INBAND_DISABLE) {</div><div class='add'>+			/* PHY supports in-band capabilities, and supports</div><div class='add'>+			 * more than disable mode.</div><div class='add'>+			 */</div><div class='add'>+			if (phy_ib_caps &amp; LINK_INBAND_DISABLE)</div><div class='add'>+				pl-&gt;phy_ib_mode = LINK_INBAND_DISABLE;</div><div class='add'>+			else if (phy_ib_caps &amp; LINK_INBAND_BYPASS)</div><div class='add'>+				pl-&gt;phy_ib_mode = LINK_INBAND_BYPASS;</div><div class='add'>+			else if (phy_ib_caps &amp; LINK_INBAND_ENABLE)</div><div class='add'>+				phy_ib_only = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* If either the PCS or PHY requires inband to be enabled,</div><div class='add'>+		 * this is an invalid configuration. Provide a diagnostic</div><div class='add'>+		 * message for this case, but don't try to force the issue.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!phylink_autoneg_inband(mode))</div><div class='del'>-			neg_mode = PHYLINK_PCS_NEG_OUTBAND;</div><div class='del'>-		else</div><div class='add'>+		if (pcs_ib_only || phy_ib_only)</div><div class='add'>+			phylink_warn(pl,</div><div class='add'>+				     "firmware wants %s mode, but %s%s%s requires inband\n",</div><div class='add'>+				     phylink_an_mode_str(mode),</div><div class='add'>+				     pcs_ib_only ? "PCS" : "",</div><div class='add'>+				     pcs_ib_only &amp;&amp; phy_ib_only ? " and " : "",</div><div class='add'>+				     phy_ib_only ? "PHY" : "");</div><div class='add'>+</div><div class='add'>+		neg_mode = PHYLINK_PCS_NEG_OUTBAND;</div><div class='add'>+	} else if (type == INBAND_CISCO_SGMII || pl-&gt;phydev) {</div><div class='add'>+		/* For SGMII modes which are designed to be used with PHYs, or</div><div class='add'>+		 * Base-X with a PHY, we try to use in-band mode where-ever</div><div class='add'>+		 * possible. However, there are some PHYs e.g. BCM84881 which</div><div class='add'>+		 * do not support in-band.</div><div class='add'>+		 */</div><div class='add'>+		const unsigned int inband_ok = LINK_INBAND_ENABLE |</div><div class='add'>+					       LINK_INBAND_BYPASS;</div><div class='add'>+		const unsigned int outband_ok = LINK_INBAND_DISABLE |</div><div class='add'>+						LINK_INBAND_BYPASS;</div><div class='add'>+		/* PCS	PHY</div><div class='add'>+		 * D E	D E</div><div class='add'>+		 * 0 0  0 0	no information			inband enabled</div><div class='add'>+		 * 1 0  0 0	pcs doesn't support		outband</div><div class='add'>+		 * 0 1  0 0	pcs required			inband enabled</div><div class='add'>+		 * 1 1  0 0	pcs optional			inband enabled</div><div class='add'>+		 * 0 0  1 0	phy doesn't support		outband</div><div class='add'>+		 * 1 0  1 0	pcs+phy doesn't support		outband</div><div class='add'>+		 * 0 1  1 0	pcs required, phy doesn't support, invalid</div><div class='add'>+		 * 1 1  1 0	pcs optional, phy doesn't support, outband</div><div class='add'>+		 * 0 0  0 1	phy required			inband enabled</div><div class='add'>+		 * 1 0  0 1	pcs doesn't support, phy required, invalid</div><div class='add'>+		 * 0 1  0 1	pcs+phy required		inband enabled</div><div class='add'>+		 * 1 1  0 1	pcs optional, phy required	inband enabled</div><div class='add'>+		 * 0 0  1 1	phy optional			inband enabled</div><div class='add'>+		 * 1 0  1 1	pcs doesn't support, phy optional, outband</div><div class='add'>+		 * 0 1  1 1	pcs required, phy optional	inband enabled</div><div class='add'>+		 * 1 1  1 1	pcs+phy optional		inband enabled</div><div class='add'>+		 */</div><div class='add'>+		if ((!pcs_ib_caps || pcs_ib_caps &amp; inband_ok) &amp;&amp;</div><div class='add'>+		    (!phy_ib_caps || phy_ib_caps &amp; inband_ok)) {</div><div class='add'>+			/* In-band supported or unknown at both ends. Enable</div><div class='add'>+			 * in-band mode with or without bypass at the PHY.</div><div class='add'>+			 */</div><div class='add'>+			if (phy_ib_caps &amp; LINK_INBAND_ENABLE)</div><div class='add'>+				pl-&gt;phy_ib_mode = LINK_INBAND_ENABLE;</div><div class='add'>+			else if (phy_ib_caps &amp; LINK_INBAND_BYPASS)</div><div class='add'>+				pl-&gt;phy_ib_mode = LINK_INBAND_BYPASS;</div><div class='add'>+</div><div class='ctx'> 			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;</div><div class='del'>-		break;</div><div class='add'>+		} else if ((!pcs_ib_caps || pcs_ib_caps &amp; outband_ok) &amp;&amp;</div><div class='add'>+			   (!phy_ib_caps || phy_ib_caps &amp; outband_ok)) {</div><div class='add'>+			/* Either in-band not supported at at least one end.</div><div class='add'>+			 * In-band bypass at the other end is possible.</div><div class='add'>+			 */</div><div class='add'>+			if (phy_ib_caps &amp; LINK_INBAND_DISABLE)</div><div class='add'>+				pl-&gt;phy_ib_mode = LINK_INBAND_DISABLE;</div><div class='add'>+			else if (phy_ib_caps &amp; LINK_INBAND_BYPASS)</div><div class='add'>+				pl-&gt;phy_ib_mode = LINK_INBAND_BYPASS;</div><div class='ctx'> </div><div class='del'>-	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='del'>-	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='del'>-		/* 1000base-X is designed for use media-side for Fibre</div><div class='del'>-		 * connections, and thus the Autoneg bit needs to be</div><div class='del'>-		 * taken into account. We also do this for 2500base-X</div><div class='del'>-		 * as well, but drivers may not support this, so may</div><div class='del'>-		 * need to override this.</div><div class='del'>-		 */</div><div class='del'>-		if (!phylink_autoneg_inband(mode))</div><div class='ctx'> 			neg_mode = PHYLINK_PCS_NEG_OUTBAND;</div><div class='add'>+			if (pl-&gt;phydev)</div><div class='add'>+				mode = MLO_AN_PHY;</div><div class='add'>+		} else {</div><div class='add'>+			/* invalid */</div><div class='add'>+			phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band",</div><div class='add'>+				     phy_modes(interface));</div><div class='add'>+			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* For Base-X without a PHY */</div><div class='add'>+		if (pcs_ib_caps == LINK_INBAND_DISABLE)</div><div class='add'>+			/* If the PCS doesn't support inband, then inband must</div><div class='add'>+			 * be disabled.</div><div class='add'>+			 */</div><div class='add'>+			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;</div><div class='add'>+		else if (pcs_ib_caps == LINK_INBAND_ENABLE)</div><div class='add'>+			/* If the PCS requires inband, then inband must always</div><div class='add'>+			 * be enabled.</div><div class='add'>+			 */</div><div class='add'>+			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;</div><div class='ctx'> 		else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,</div><div class='ctx'> 					   advertising))</div><div class='ctx'> 			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;</div><div class='ctx'> 		else</div><div class='ctx'> 			neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		neg_mode = PHYLINK_PCS_NEG_NONE;</div><div class='del'>-		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return neg_mode;</div><div class='add'>+	pl-&gt;pcs_neg_mode = neg_mode;</div><div class='add'>+	pl-&gt;act_link_an_mode = mode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void phylink_major_config(struct phylink *pl, bool restart,</div><div class='hunk'>@@ -1156,14 +1239,13 @@ static void phylink_major_config(struct phylink *pl, bool restart,</div><div class='ctx'> 	struct phylink_pcs *pcs = NULL;</div><div class='ctx'> 	bool pcs_changed = false;</div><div class='ctx'> 	unsigned int rate_kbd;</div><div class='del'>-	unsigned int neg_mode;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	phylink_dbg(pl, "major config %s\n", phy_modes(state-&gt;interface));</div><div class='add'>+	phylink_dbg(pl, "major config, requested %s/%s\n",</div><div class='add'>+		    phylink_an_mode_str(pl-&gt;req_link_an_mode),</div><div class='add'>+		    phy_modes(state-&gt;interface));</div><div class='ctx'> </div><div class='del'>-	pl-&gt;pcs_neg_mode = phylink_pcs_neg_mode(pl-&gt;cur_link_an_mode,</div><div class='del'>-						state-&gt;interface,</div><div class='del'>-						state-&gt;advertising);</div><div class='add'>+	pl-&gt;major_config_failed = false;</div><div class='ctx'> </div><div class='ctx'> 	if (pl-&gt;mac_ops-&gt;mac_select_pcs) {</div><div class='ctx'> 		pcs = pl-&gt;mac_ops-&gt;mac_select_pcs(pl-&gt;config, state-&gt;interface);</div><div class='hunk'>@@ -1171,20 +1253,30 @@ static void phylink_major_config(struct phylink *pl, bool restart,</div><div class='ctx'> 			phylink_err(pl,</div><div class='ctx'> 				    "mac_select_pcs unexpectedly failed: %pe\n",</div><div class='ctx'> 				    pcs);</div><div class='add'>+</div><div class='add'>+			pl-&gt;major_config_failed = true;</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		pcs_changed = pl-&gt;pcs != pcs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	phylink_pcs_neg_mode(pl, pcs, state-&gt;interface, state-&gt;advertising);</div><div class='add'>+</div><div class='add'>+	phylink_dbg(pl, "major config, active %s/%s/%s\n",</div><div class='add'>+		    phylink_an_mode_str(pl-&gt;act_link_an_mode),</div><div class='add'>+		    phylink_pcs_mode_str(pl-&gt;pcs_neg_mode),</div><div class='add'>+		    phy_modes(state-&gt;interface));</div><div class='add'>+</div><div class='ctx'> 	phylink_pcs_poll_stop(pl);</div><div class='ctx'> </div><div class='ctx'> 	if (pl-&gt;mac_ops-&gt;mac_prepare) {</div><div class='del'>-		err = pl-&gt;mac_ops-&gt;mac_prepare(pl-&gt;config, pl-&gt;cur_link_an_mode,</div><div class='add'>+		err = pl-&gt;mac_ops-&gt;mac_prepare(pl-&gt;config, pl-&gt;act_link_an_mode,</div><div class='ctx'> 					       state-&gt;interface);</div><div class='ctx'> 		if (err &lt; 0) {</div><div class='ctx'> 			phylink_err(pl, "mac_prepare failed: %pe\n",</div><div class='ctx'> 				    ERR_PTR(err));</div><div class='add'>+			pl-&gt;major_config_failed = true;</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1208,33 +1300,50 @@ static void phylink_major_config(struct phylink *pl, bool restart,</div><div class='ctx'> </div><div class='ctx'> 	phylink_mac_config(pl, state);</div><div class='ctx'> </div><div class='del'>-	if (pl-&gt;pcs)</div><div class='del'>-		phylink_pcs_post_config(pl-&gt;pcs, state-&gt;interface);</div><div class='add'>+	if (pl-&gt;pcs) {</div><div class='add'>+		err = phylink_pcs_post_config(pl-&gt;pcs, state-&gt;interface);</div><div class='add'>+		if (err &lt; 0) {</div><div class='add'>+			phylink_err(pl, "pcs_post_config failed: %pe\n",</div><div class='add'>+				    ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+			pl-&gt;major_config_failed = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (pl-&gt;pcs_state == PCS_STATE_STARTING || pcs_changed)</div><div class='ctx'> 		phylink_pcs_enable(pl-&gt;pcs);</div><div class='ctx'> </div><div class='del'>-	neg_mode = pl-&gt;cur_link_an_mode;</div><div class='del'>-	if (pl-&gt;pcs &amp;&amp; pl-&gt;pcs-&gt;neg_mode)</div><div class='del'>-		neg_mode = pl-&gt;pcs_neg_mode;</div><div class='del'>-</div><div class='del'>-	err = phylink_pcs_config(pl-&gt;pcs, neg_mode, state,</div><div class='add'>+	err = phylink_pcs_config(pl-&gt;pcs, pl-&gt;pcs_neg_mode, state,</div><div class='ctx'> 				 !!(pl-&gt;link_config.pause &amp; MLO_PAUSE_AN));</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		phylink_err(pl, "pcs_config failed: %pe\n",</div><div class='del'>-			    ERR_PTR(err));</div><div class='del'>-	else if (err &gt; 0)</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err));</div><div class='add'>+		pl-&gt;major_config_failed = true;</div><div class='add'>+	} else if (err &gt; 0) {</div><div class='ctx'> 		restart = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (restart)</div><div class='ctx'> 		phylink_pcs_an_restart(pl);</div><div class='ctx'> </div><div class='ctx'> 	if (pl-&gt;mac_ops-&gt;mac_finish) {</div><div class='del'>-		err = pl-&gt;mac_ops-&gt;mac_finish(pl-&gt;config, pl-&gt;cur_link_an_mode,</div><div class='add'>+		err = pl-&gt;mac_ops-&gt;mac_finish(pl-&gt;config, pl-&gt;act_link_an_mode,</div><div class='ctx'> 					      state-&gt;interface);</div><div class='del'>-		if (err &lt; 0)</div><div class='add'>+		if (err &lt; 0) {</div><div class='ctx'> 			phylink_err(pl, "mac_finish failed: %pe\n",</div><div class='ctx'> 				    ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+			pl-&gt;major_config_failed = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pl-&gt;phydev &amp;&amp; pl-&gt;phy_ib_mode) {</div><div class='add'>+		err = phy_config_inband(pl-&gt;phydev, pl-&gt;phy_ib_mode);</div><div class='add'>+		if (err &lt; 0) {</div><div class='add'>+			phylink_err(pl, "phy_config_inband: %pe\n",</div><div class='add'>+				    ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+			pl-&gt;major_config_failed = true;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pl-&gt;sfp_bus) {</div><div class='hunk'>@@ -1254,32 +1363,26 @@ static void phylink_major_config(struct phylink *pl, bool restart,</div><div class='ctx'>  */</div><div class='ctx'> static int phylink_change_inband_advert(struct phylink *pl)</div><div class='ctx'> {</div><div class='del'>-	unsigned int neg_mode;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(PHYLINK_DISABLE_STOPPED, &amp;pl-&gt;phylink_disable_state))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,</div><div class='del'>-		    phylink_an_mode_str(pl-&gt;cur_link_an_mode),</div><div class='add'>+		    phylink_an_mode_str(pl-&gt;req_link_an_mode),</div><div class='ctx'> 		    phy_modes(pl-&gt;link_config.interface),</div><div class='ctx'> 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl-&gt;link_config.advertising,</div><div class='ctx'> 		    pl-&gt;link_config.pause);</div><div class='ctx'> </div><div class='ctx'> 	/* Recompute the PCS neg mode */</div><div class='del'>-	pl-&gt;pcs_neg_mode = phylink_pcs_neg_mode(pl-&gt;cur_link_an_mode,</div><div class='del'>-					pl-&gt;link_config.interface,</div><div class='del'>-					pl-&gt;link_config.advertising);</div><div class='del'>-</div><div class='del'>-	neg_mode = pl-&gt;cur_link_an_mode;</div><div class='del'>-	if (pl-&gt;pcs-&gt;neg_mode)</div><div class='del'>-		neg_mode = pl-&gt;pcs_neg_mode;</div><div class='add'>+	phylink_pcs_neg_mode(pl, pl-&gt;pcs, pl-&gt;link_config.interface,</div><div class='add'>+			     pl-&gt;link_config.advertising);</div><div class='ctx'> </div><div class='ctx'> 	/* Modern PCS-based method; update the advert at the PCS, and</div><div class='ctx'> 	 * restart negotiation if the pcs_config() helper indicates that</div><div class='ctx'> 	 * the programmed advertisement has changed.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = phylink_pcs_config(pl-&gt;pcs, neg_mode, &amp;pl-&gt;link_config,</div><div class='add'>+	ret = phylink_pcs_config(pl-&gt;pcs, pl-&gt;pcs_neg_mode, &amp;pl-&gt;link_config,</div><div class='ctx'> 				 !!(pl-&gt;link_config.pause &amp; MLO_PAUSE_AN));</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1293,12 +1396,18 @@ static int phylink_change_inband_advert(struct phylink *pl)</div><div class='ctx'> static void phylink_mac_pcs_get_state(struct phylink *pl,</div><div class='ctx'> 				      struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='add'>+	bool autoneg;</div><div class='add'>+</div><div class='ctx'> 	linkmode_copy(state-&gt;advertising, pl-&gt;link_config.advertising);</div><div class='ctx'> 	linkmode_zero(state-&gt;lp_advertising);</div><div class='ctx'> 	state-&gt;interface = pl-&gt;link_config.interface;</div><div class='ctx'> 	state-&gt;rate_matching = pl-&gt;link_config.rate_matching;</div><div class='del'>-	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,</div><div class='del'>-			      state-&gt;advertising)) {</div><div class='add'>+	state-&gt;an_complete = 0;</div><div class='add'>+	state-&gt;link = 1;</div><div class='add'>+</div><div class='add'>+	autoneg = pl-&gt;pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED;</div><div class='add'>+	if (autoneg) {</div><div class='ctx'> 		state-&gt;speed = SPEED_UNKNOWN;</div><div class='ctx'> 		state-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='ctx'> 		state-&gt;pause = MLO_PAUSE_NONE;</div><div class='hunk'>@@ -1307,11 +1416,10 @@ static void phylink_mac_pcs_get_state(struct phylink *pl,</div><div class='ctx'> 		state-&gt;duplex = pl-&gt;link_config.duplex;</div><div class='ctx'> 		state-&gt;pause = pl-&gt;link_config.pause;</div><div class='ctx'> 	}</div><div class='del'>-	state-&gt;an_complete = 0;</div><div class='del'>-	state-&gt;link = 1;</div><div class='ctx'> </div><div class='del'>-	if (pl-&gt;pcs)</div><div class='del'>-		pl-&gt;pcs-&gt;ops-&gt;pcs_get_state(pl-&gt;pcs, state);</div><div class='add'>+	pcs = pl-&gt;pcs;</div><div class='add'>+	if (pcs)</div><div class='add'>+		pcs-&gt;ops-&gt;pcs_get_state(pcs, pl-&gt;pcs_neg_mode, state);</div><div class='ctx'> 	else</div><div class='ctx'> 		state-&gt;link = 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1335,8 +1443,9 @@ static void phylink_get_fixed_state(struct phylink *pl,</div><div class='ctx'> static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)</div><div class='ctx'> {</div><div class='ctx'> 	struct phylink_link_state link_state;</div><div class='add'>+	struct phy_device *phy = pl-&gt;phydev;</div><div class='ctx'> </div><div class='del'>-	switch (pl-&gt;cur_link_an_mode) {</div><div class='add'>+	switch (pl-&gt;req_link_an_mode) {</div><div class='ctx'> 	case MLO_AN_PHY:</div><div class='ctx'> 		link_state = pl-&gt;phy_state;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1358,7 +1467,11 @@ static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)</div><div class='ctx'> 	link_state.link = false;</div><div class='ctx'> </div><div class='ctx'> 	phylink_apply_manual_flow(pl, &amp;link_state);</div><div class='add'>+	if (phy)</div><div class='add'>+		mutex_lock(&amp;phy-&gt;lock);</div><div class='ctx'> 	phylink_major_config(pl, force_restart, &amp;link_state);</div><div class='add'>+	if (phy)</div><div class='add'>+		mutex_unlock(&amp;phy-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *phylink_pause_to_str(int pause)</div><div class='hunk'>@@ -1375,11 +1488,50 @@ static const char *phylink_pause_to_str(int pause)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void phylink_deactivate_lpi(struct phylink *pl)</div><div class='add'>+{</div><div class='add'>+	if (pl-&gt;mac_enable_tx_lpi) {</div><div class='add'>+		pl-&gt;mac_enable_tx_lpi = false;</div><div class='add'>+</div><div class='add'>+		phylink_dbg(pl, "disabling LPI\n");</div><div class='add'>+</div><div class='add'>+		pl-&gt;mac_ops-&gt;mac_disable_tx_lpi(pl-&gt;config);</div><div class='add'>+</div><div class='add'>+		phylink_pcs_disable_eee(pl-&gt;pcs);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void phylink_activate_lpi(struct phylink *pl)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(pl-&gt;cur_interface, pl-&gt;config-&gt;lpi_interfaces)) {</div><div class='add'>+		phylink_dbg(pl, "MAC does not support LPI with %s\n",</div><div class='add'>+			    phy_modes(pl-&gt;cur_interface));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n",</div><div class='add'>+		    pl-&gt;mac_tx_lpi_timer, pl-&gt;mac_tx_clk_stop);</div><div class='add'>+</div><div class='add'>+	phylink_pcs_enable_eee(pl-&gt;pcs);</div><div class='add'>+</div><div class='add'>+	err = pl-&gt;mac_ops-&gt;mac_enable_tx_lpi(pl-&gt;config, pl-&gt;mac_tx_lpi_timer,</div><div class='add'>+					     pl-&gt;mac_tx_clk_stop);</div><div class='add'>+	if (err) {</div><div class='add'>+		phylink_pcs_disable_eee(pl-&gt;pcs);</div><div class='add'>+		phylink_err(pl, "%ps() failed: %pe\n",</div><div class='add'>+			    pl-&gt;mac_ops-&gt;mac_enable_tx_lpi, ERR_PTR(err));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pl-&gt;mac_enable_tx_lpi = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void phylink_link_up(struct phylink *pl,</div><div class='ctx'> 			    struct phylink_link_state link_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = pl-&gt;netdev;</div><div class='del'>-	unsigned int neg_mode;</div><div class='ctx'> 	int speed, duplex;</div><div class='ctx'> 	bool rx_pause;</div><div class='ctx'> </div><div class='hunk'>@@ -1410,17 +1562,16 @@ static void phylink_link_up(struct phylink *pl,</div><div class='ctx'> </div><div class='ctx'> 	pl-&gt;cur_interface = link_state.interface;</div><div class='ctx'> </div><div class='del'>-	neg_mode = pl-&gt;cur_link_an_mode;</div><div class='del'>-	if (pl-&gt;pcs &amp;&amp; pl-&gt;pcs-&gt;neg_mode)</div><div class='del'>-		neg_mode = pl-&gt;pcs_neg_mode;</div><div class='del'>-</div><div class='del'>-	phylink_pcs_link_up(pl-&gt;pcs, neg_mode, pl-&gt;cur_interface, speed,</div><div class='add'>+	phylink_pcs_link_up(pl-&gt;pcs, pl-&gt;pcs_neg_mode, pl-&gt;cur_interface, speed,</div><div class='ctx'> 			    duplex);</div><div class='ctx'> </div><div class='del'>-	pl-&gt;mac_ops-&gt;mac_link_up(pl-&gt;config, pl-&gt;phydev, pl-&gt;cur_link_an_mode,</div><div class='add'>+	pl-&gt;mac_ops-&gt;mac_link_up(pl-&gt;config, pl-&gt;phydev, pl-&gt;act_link_an_mode,</div><div class='ctx'> 				 pl-&gt;cur_interface, speed, duplex,</div><div class='ctx'> 				 !!(link_state.pause &amp; MLO_PAUSE_TX), rx_pause);</div><div class='ctx'> </div><div class='add'>+	if (pl-&gt;mac_supports_eee &amp;&amp; pl-&gt;phy_enable_tx_lpi)</div><div class='add'>+		phylink_activate_lpi(pl);</div><div class='add'>+</div><div class='ctx'> 	if (ndev)</div><div class='ctx'> 		netif_carrier_on(ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -1437,102 +1588,101 @@ static void phylink_link_down(struct phylink *pl)</div><div class='ctx'> </div><div class='ctx'> 	if (ndev)</div><div class='ctx'> 		netif_carrier_off(ndev);</div><div class='del'>-	pl-&gt;mac_ops-&gt;mac_link_down(pl-&gt;config, pl-&gt;cur_link_an_mode,</div><div class='add'>+</div><div class='add'>+	phylink_deactivate_lpi(pl);</div><div class='add'>+</div><div class='add'>+	pl-&gt;mac_ops-&gt;mac_link_down(pl-&gt;config, pl-&gt;act_link_an_mode,</div><div class='ctx'> 				   pl-&gt;cur_interface);</div><div class='ctx'> 	phylink_info(pl, "Link is Down\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool phylink_link_is_up(struct phylink *pl)</div><div class='add'>+{</div><div class='add'>+	return pl-&gt;netdev ? netif_carrier_ok(pl-&gt;netdev) : pl-&gt;old_link_state;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void phylink_resolve(struct work_struct *w)</div><div class='ctx'> {</div><div class='ctx'> 	struct phylink *pl = container_of(w, struct phylink, resolve);</div><div class='ctx'> 	struct phylink_link_state link_state;</div><div class='del'>-	struct net_device *ndev = pl-&gt;netdev;</div><div class='ctx'> 	bool mac_config = false;</div><div class='ctx'> 	bool retrigger = false;</div><div class='add'>+	struct phy_device *phy;</div><div class='ctx'> 	bool cur_link_state;</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;pl-&gt;phydev_mutex);</div><div class='add'>+	phy = pl-&gt;phydev;</div><div class='add'>+	if (phy)</div><div class='add'>+		mutex_lock(&amp;phy-&gt;lock);</div><div class='ctx'> 	mutex_lock(&amp;pl-&gt;state_mutex);</div><div class='del'>-	if (pl-&gt;netdev)</div><div class='del'>-		cur_link_state = netif_carrier_ok(ndev);</div><div class='del'>-	else</div><div class='del'>-		cur_link_state = pl-&gt;old_link_state;</div><div class='add'>+	cur_link_state = phylink_link_is_up(pl);</div><div class='ctx'> </div><div class='ctx'> 	if (pl-&gt;phylink_disable_state) {</div><div class='del'>-		pl-&gt;mac_link_dropped = false;</div><div class='add'>+		pl-&gt;link_failed = false;</div><div class='ctx'> 		link_state.link = false;</div><div class='del'>-	} else if (pl-&gt;mac_link_dropped) {</div><div class='add'>+	} else if (pl-&gt;link_failed) {</div><div class='ctx'> 		link_state.link = false;</div><div class='ctx'> 		retrigger = true;</div><div class='add'>+	} else if (pl-&gt;act_link_an_mode == MLO_AN_FIXED) {</div><div class='add'>+		phylink_get_fixed_state(pl, &amp;link_state);</div><div class='add'>+		mac_config = link_state.link;</div><div class='add'>+	} else if (pl-&gt;act_link_an_mode == MLO_AN_PHY) {</div><div class='add'>+		link_state = pl-&gt;phy_state;</div><div class='add'>+		mac_config = link_state.link;</div><div class='ctx'> 	} else {</div><div class='del'>-		switch (pl-&gt;cur_link_an_mode) {</div><div class='del'>-		case MLO_AN_PHY:</div><div class='del'>-			link_state = pl-&gt;phy_state;</div><div class='del'>-			phylink_apply_manual_flow(pl, &amp;link_state);</div><div class='del'>-			mac_config = link_state.link;</div><div class='del'>-			break;</div><div class='add'>+		phylink_mac_pcs_get_state(pl, &amp;link_state);</div><div class='ctx'> </div><div class='del'>-		case MLO_AN_FIXED:</div><div class='del'>-			phylink_get_fixed_state(pl, &amp;link_state);</div><div class='del'>-			mac_config = link_state.link;</div><div class='del'>-			break;</div><div class='add'>+		/* The PCS may have a latching link-fail indicator. If the link</div><div class='add'>+		 * was up, bring the link down and re-trigger the resolve.</div><div class='add'>+		 * Otherwise, re-read the PCS state to get the current status</div><div class='add'>+		 * of the link.</div><div class='add'>+		 */</div><div class='add'>+		if (!link_state.link) {</div><div class='add'>+			if (cur_link_state)</div><div class='add'>+				retrigger = true;</div><div class='add'>+			else</div><div class='add'>+				phylink_mac_pcs_get_state(pl, &amp;link_state);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		case MLO_AN_INBAND:</div><div class='del'>-			phylink_mac_pcs_get_state(pl, &amp;link_state);</div><div class='add'>+		/* If we have a phy, the "up" state is the union of both the</div><div class='add'>+		 * PHY and the MAC</div><div class='add'>+		 */</div><div class='add'>+		if (phy)</div><div class='add'>+			link_state.link &amp;= pl-&gt;phy_state.link;</div><div class='ctx'> </div><div class='del'>-			/* The PCS may have a latching link-fail indicator.</div><div class='del'>-			 * If the link was up, bring the link down and</div><div class='del'>-			 * re-trigger the resolve. Otherwise, re-read the</div><div class='del'>-			 * PCS state to get the current status of the link.</div><div class='add'>+		/* Only update if the PHY link is up */</div><div class='add'>+		if (phy &amp;&amp; pl-&gt;phy_state.link) {</div><div class='add'>+			/* If the interface has changed, force a link down</div><div class='add'>+			 * event if the link isn't already down, and re-resolve.</div><div class='ctx'> 			 */</div><div class='del'>-			if (!link_state.link) {</div><div class='del'>-				if (cur_link_state)</div><div class='del'>-					retrigger = true;</div><div class='del'>-				else</div><div class='del'>-					phylink_mac_pcs_get_state(pl,</div><div class='del'>-								  &amp;link_state);</div><div class='add'>+			if (link_state.interface != pl-&gt;phy_state.interface) {</div><div class='add'>+				retrigger = true;</div><div class='add'>+				link_state.link = false;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			/* If we have a phy, the "up" state is the union of</div><div class='del'>-			 * both the PHY and the MAC</div><div class='add'>+			link_state.interface = pl-&gt;phy_state.interface;</div><div class='add'>+</div><div class='add'>+			/* If we are doing rate matching, then the link</div><div class='add'>+			 * speed/duplex comes from the PHY</div><div class='ctx'> 			 */</div><div class='del'>-			if (pl-&gt;phydev)</div><div class='del'>-				link_state.link &amp;= pl-&gt;phy_state.link;</div><div class='del'>-</div><div class='del'>-			/* Only update if the PHY link is up */</div><div class='del'>-			if (pl-&gt;phydev &amp;&amp; pl-&gt;phy_state.link) {</div><div class='del'>-				/* If the interface has changed, force a</div><div class='del'>-				 * link down event if the link isn't already</div><div class='del'>-				 * down, and re-resolve.</div><div class='del'>-				 */</div><div class='del'>-				if (link_state.interface !=</div><div class='del'>-				    pl-&gt;phy_state.interface) {</div><div class='del'>-					retrigger = true;</div><div class='del'>-					link_state.link = false;</div><div class='del'>-				}</div><div class='del'>-				link_state.interface = pl-&gt;phy_state.interface;</div><div class='del'>-</div><div class='del'>-				/* If we are doing rate matching, then the</div><div class='del'>-				 * link speed/duplex comes from the PHY</div><div class='del'>-				 */</div><div class='del'>-				if (pl-&gt;phy_state.rate_matching) {</div><div class='del'>-					link_state.rate_matching =</div><div class='del'>-						pl-&gt;phy_state.rate_matching;</div><div class='del'>-					link_state.speed = pl-&gt;phy_state.speed;</div><div class='del'>-					link_state.duplex =</div><div class='del'>-						pl-&gt;phy_state.duplex;</div><div class='del'>-				}</div><div class='del'>-</div><div class='del'>-				/* If we have a PHY, we need to update with</div><div class='del'>-				 * the PHY flow control bits.</div><div class='del'>-				 */</div><div class='del'>-				link_state.pause = pl-&gt;phy_state.pause;</div><div class='del'>-				mac_config = true;</div><div class='add'>+			if (pl-&gt;phy_state.rate_matching) {</div><div class='add'>+				link_state.rate_matching =</div><div class='add'>+					pl-&gt;phy_state.rate_matching;</div><div class='add'>+				link_state.speed = pl-&gt;phy_state.speed;</div><div class='add'>+				link_state.duplex = pl-&gt;phy_state.duplex;</div><div class='ctx'> 			}</div><div class='del'>-			phylink_apply_manual_flow(pl, &amp;link_state);</div><div class='del'>-			break;</div><div class='add'>+</div><div class='add'>+			/* If we have a PHY, we need to update with the PHY</div><div class='add'>+			 * flow control bits.</div><div class='add'>+			 */</div><div class='add'>+			link_state.pause = pl-&gt;phy_state.pause;</div><div class='add'>+			mac_config = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (pl-&gt;act_link_an_mode != MLO_AN_FIXED)</div><div class='add'>+		phylink_apply_manual_flow(pl, &amp;link_state);</div><div class='add'>+</div><div class='ctx'> 	if (mac_config) {</div><div class='ctx'> 		if (link_state.interface != pl-&gt;link_config.interface) {</div><div class='ctx'> 			/* The interface has changed, force the link down and</div><div class='hunk'>@@ -1547,6 +1697,12 @@ static void phylink_resolve(struct work_struct *w)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* If configuration of the interface failed, force the link down</div><div class='add'>+	 * until we get a successful configuration.</div><div class='add'>+	 */</div><div class='add'>+	if (pl-&gt;major_config_failed)</div><div class='add'>+		link_state.link = false;</div><div class='add'>+</div><div class='ctx'> 	if (link_state.link != cur_link_state) {</div><div class='ctx'> 		pl-&gt;old_link_state = link_state.link;</div><div class='ctx'> 		if (!link_state.link)</div><div class='hunk'>@@ -1555,10 +1711,13 @@ static void phylink_resolve(struct work_struct *w)</div><div class='ctx'> 			phylink_link_up(pl, link_state);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!link_state.link &amp;&amp; retrigger) {</div><div class='del'>-		pl-&gt;mac_link_dropped = false;</div><div class='add'>+		pl-&gt;link_failed = false;</div><div class='ctx'> 		queue_work(system_power_efficient_wq, &amp;pl-&gt;resolve);</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;pl-&gt;state_mutex);</div><div class='add'>+	if (phy)</div><div class='add'>+		mutex_unlock(&amp;phy-&gt;lock);</div><div class='add'>+	mutex_unlock(&amp;pl-&gt;phydev_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void phylink_run_resolve(struct phylink *pl)</div><div class='hunk'>@@ -1631,21 +1790,20 @@ static int phylink_register_sfp(struct phylink *pl,</div><div class='ctx'> int phylink_set_fixed_link(struct phylink *pl,</div><div class='ctx'> 			   const struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='del'>-	const struct phy_setting *s;</div><div class='add'>+	const struct link_capabilities *c;</div><div class='ctx'> 	unsigned long *adv;</div><div class='ctx'> </div><div class='ctx'> 	if (pl-&gt;cfg_link_an_mode != MLO_AN_PHY || !state ||</div><div class='ctx'> 	    !test_bit(PHYLINK_DISABLE_STOPPED, &amp;pl-&gt;phylink_disable_state))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	s = phy_lookup_setting(state-&gt;speed, state-&gt;duplex,</div><div class='del'>-			       pl-&gt;supported, true);</div><div class='del'>-	if (!s)</div><div class='add'>+	c = phy_caps_lookup(state-&gt;speed, state-&gt;duplex,</div><div class='add'>+			    pl-&gt;supported, true);</div><div class='add'>+	if (!c)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	adv = pl-&gt;link_config.advertising;</div><div class='del'>-	linkmode_zero(adv);</div><div class='del'>-	linkmode_set_bit(s-&gt;bit, adv);</div><div class='add'>+	linkmode_and(adv, pl-&gt;supported, c-&gt;linkmodes);</div><div class='ctx'> 	linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);</div><div class='ctx'> </div><div class='ctx'> 	pl-&gt;link_config.speed = state-&gt;speed;</div><div class='hunk'>@@ -1654,7 +1812,7 @@ int phylink_set_fixed_link(struct phylink *pl,</div><div class='ctx'> 	pl-&gt;link_config.an_complete = 1;</div><div class='ctx'> </div><div class='ctx'> 	pl-&gt;cfg_link_an_mode = MLO_AN_FIXED;</div><div class='del'>-	pl-&gt;cur_link_an_mode = pl-&gt;cfg_link_an_mode;</div><div class='add'>+	pl-&gt;req_link_an_mode = pl-&gt;cfg_link_an_mode;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1695,6 +1853,7 @@ struct phylink *phylink_create(struct phylink_config *config,</div><div class='ctx'> 	if (!pl)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='add'>+	mutex_init(&amp;pl-&gt;phydev_mutex);</div><div class='ctx'> 	mutex_init(&amp;pl-&gt;state_mutex);</div><div class='ctx'> 	INIT_WORK(&amp;pl-&gt;resolve, phylink_resolve);</div><div class='ctx'> </div><div class='hunk'>@@ -1709,6 +1868,16 @@ struct phylink *phylink_create(struct phylink_config *config,</div><div class='ctx'> 		return ERR_PTR(-EINVAL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	pl-&gt;mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops);</div><div class='add'>+	pl-&gt;mac_supports_eee = pl-&gt;mac_supports_eee_ops &amp;&amp;</div><div class='add'>+			       pl-&gt;config-&gt;lpi_capabilities &amp;&amp;</div><div class='add'>+			       !phy_interface_empty(pl-&gt;config-&gt;lpi_interfaces);</div><div class='add'>+</div><div class='add'>+	/* Set the default EEE configuration */</div><div class='add'>+	pl-&gt;eee_cfg.eee_enabled = pl-&gt;config-&gt;eee_enabled_default;</div><div class='add'>+	pl-&gt;eee_cfg.tx_lpi_enabled = pl-&gt;eee_cfg.eee_enabled;</div><div class='add'>+	pl-&gt;eee_cfg.tx_lpi_timer = pl-&gt;config-&gt;lpi_timer_default;</div><div class='add'>+</div><div class='ctx'> 	pl-&gt;phy_state.interface = iface;</div><div class='ctx'> 	pl-&gt;link_interface = iface;</div><div class='ctx'> 	if (iface == PHY_INTERFACE_MODE_MOCA)</div><div class='hunk'>@@ -1742,7 +1911,7 @@ struct phylink *phylink_create(struct phylink_config *config,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pl-&gt;cur_link_an_mode = pl-&gt;cfg_link_an_mode;</div><div class='add'>+	pl-&gt;req_link_an_mode = pl-&gt;cfg_link_an_mode;</div><div class='ctx'> </div><div class='ctx'> 	ret = phylink_register_sfp(pl, fwnode);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='hunk'>@@ -1787,7 +1956,7 @@ bool phylink_expects_phy(struct phylink *pl)</div><div class='ctx'> {</div><div class='ctx'> 	if (pl-&gt;cfg_link_an_mode == MLO_AN_FIXED ||</div><div class='ctx'> 	    (pl-&gt;cfg_link_an_mode == MLO_AN_INBAND &amp;&amp;</div><div class='del'>-	     phy_interface_mode_is_8023z(pl-&gt;link_config.interface)))</div><div class='add'>+	     phy_interface_mode_is_8023z(pl-&gt;link_interface)))</div><div class='ctx'> 		return false;</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -1811,16 +1980,24 @@ static void phylink_phy_change(struct phy_device *phydev, bool up)</div><div class='ctx'> 		pl-&gt;phy_state.pause |= MLO_PAUSE_RX;</div><div class='ctx'> 	pl-&gt;phy_state.interface = phydev-&gt;interface;</div><div class='ctx'> 	pl-&gt;phy_state.link = up;</div><div class='add'>+	if (!up)</div><div class='add'>+		pl-&gt;link_failed = true;</div><div class='add'>+</div><div class='add'>+	/* Get the LPI state from phylib */</div><div class='add'>+	pl-&gt;phy_enable_tx_lpi = phydev-&gt;enable_tx_lpi;</div><div class='add'>+	pl-&gt;mac_tx_lpi_timer = phydev-&gt;eee_cfg.tx_lpi_timer;</div><div class='ctx'> 	mutex_unlock(&amp;pl-&gt;state_mutex);</div><div class='ctx'> </div><div class='ctx'> 	phylink_run_resolve(pl);</div><div class='ctx'> </div><div class='del'>-	phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",</div><div class='add'>+	phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n",</div><div class='add'>+		    up ? "up" : "down",</div><div class='ctx'> 		    phy_modes(phydev-&gt;interface),</div><div class='ctx'> 		    phy_speed_to_str(phydev-&gt;speed),</div><div class='ctx'> 		    phy_duplex_to_str(phydev-&gt;duplex),</div><div class='ctx'> 		    phy_rate_matching_to_str(phydev-&gt;rate_matching),</div><div class='del'>-		    phylink_pause_to_str(pl-&gt;phy_state.pause));</div><div class='add'>+		    phylink_pause_to_str(pl-&gt;phy_state.pause),</div><div class='add'>+		    phydev-&gt;enable_tx_lpi ? "" : "no");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,</div><div class='hunk'>@@ -1937,6 +2114,7 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,</div><div class='ctx'> 		     dev_name(&amp;phy-&gt;mdio.dev), phy-&gt;drv-&gt;name, irq_str);</div><div class='ctx'> 	kfree(irq_str);</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;pl-&gt;phydev_mutex);</div><div class='ctx'> 	mutex_lock(&amp;phy-&gt;lock);</div><div class='ctx'> 	mutex_lock(&amp;pl-&gt;state_mutex);</div><div class='ctx'> 	pl-&gt;phydev = phy;</div><div class='hunk'>@@ -1950,8 +2128,39 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,</div><div class='ctx'> </div><div class='ctx'> 	/* Restrict the phy advertisement according to the MAC support. */</div><div class='ctx'> 	linkmode_copy(phy-&gt;advertising, config.advertising);</div><div class='add'>+</div><div class='add'>+	/* If the MAC supports phylink managed EEE, restrict the EEE</div><div class='add'>+	 * advertisement according to the MAC's LPI capabilities.</div><div class='add'>+	 */</div><div class='add'>+	if (pl-&gt;mac_supports_eee) {</div><div class='add'>+		/* If EEE is enabled, then we need to call phy_support_eee()</div><div class='add'>+		 * to ensure that the advertising mask is appropriately set.</div><div class='add'>+		 * This also enables EEE at the PHY.</div><div class='add'>+		 */</div><div class='add'>+		if (pl-&gt;eee_cfg.eee_enabled)</div><div class='add'>+			phy_support_eee(phy);</div><div class='add'>+</div><div class='add'>+		phy-&gt;eee_cfg.tx_lpi_enabled = pl-&gt;eee_cfg.tx_lpi_enabled;</div><div class='add'>+		phy-&gt;eee_cfg.tx_lpi_timer = pl-&gt;eee_cfg.tx_lpi_timer;</div><div class='add'>+</div><div class='add'>+		/* Convert the MAC's LPI capabilities to linkmodes */</div><div class='add'>+		linkmode_zero(pl-&gt;supported_lpi);</div><div class='add'>+		phylink_caps_to_linkmodes(pl-&gt;supported_lpi,</div><div class='add'>+					  pl-&gt;config-&gt;lpi_capabilities);</div><div class='add'>+</div><div class='add'>+		/* Restrict the PHYs EEE support/advertisement to the modes</div><div class='add'>+		 * that the MAC supports.</div><div class='add'>+		 */</div><div class='add'>+		linkmode_and(phy-&gt;advertising_eee, phy-&gt;advertising_eee,</div><div class='add'>+			     pl-&gt;supported_lpi);</div><div class='add'>+	} else if (pl-&gt;mac_supports_eee_ops) {</div><div class='add'>+		/* MAC supports phylink EEE, but wants EEE always disabled. */</div><div class='add'>+		phy_disable_eee(phy);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mutex_unlock(&amp;pl-&gt;state_mutex);</div><div class='ctx'> 	mutex_unlock(&amp;phy-&gt;lock);</div><div class='add'>+	mutex_unlock(&amp;pl-&gt;phydev_mutex);</div><div class='ctx'> </div><div class='ctx'> 	phylink_dbg(pl,</div><div class='ctx'> 		    "phy: %s setting supported %*pb advertising %*pb\n",</div><div class='hunk'>@@ -1959,13 +2168,26 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,</div><div class='ctx'> 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl-&gt;supported,</div><div class='ctx'> 		    __ETHTOOL_LINK_MODE_MASK_NBITS, phy-&gt;advertising);</div><div class='ctx'> </div><div class='del'>-	if (phy_interrupt_is_valid(phy))</div><div class='del'>-		phy_request_interrupt(phy);</div><div class='del'>-</div><div class='ctx'> 	if (pl-&gt;config-&gt;mac_managed_pm)</div><div class='ctx'> 		phy-&gt;mac_managed_pm = true;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* Allow the MAC to stop its clock if the PHY has the capability */</div><div class='add'>+	pl-&gt;mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) &gt; 0;</div><div class='add'>+</div><div class='add'>+	if (pl-&gt;mac_supports_eee_ops) {</div><div class='add'>+		/* Explicitly configure whether the PHY is allowed to stop it's</div><div class='add'>+		 * receive clock.</div><div class='add'>+		 */</div><div class='add'>+		ret = phy_eee_rx_clock_stop(phy,</div><div class='add'>+					    pl-&gt;config-&gt;eee_rx_clk_stop_enable);</div><div class='add'>+		if (ret == -EOPNOTSUPP)</div><div class='add'>+			ret = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret == 0 &amp;&amp; phy_interrupt_is_valid(phy))</div><div class='add'>+		phy_request_interrupt(phy);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,</div><div class='hunk'>@@ -2117,15 +2339,21 @@ void phylink_disconnect_phy(struct phylink *pl)</div><div class='ctx'> </div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;pl-&gt;phydev_mutex);</div><div class='ctx'> 	phy = pl-&gt;phydev;</div><div class='ctx'> 	if (phy) {</div><div class='ctx'> 		mutex_lock(&amp;phy-&gt;lock);</div><div class='ctx'> 		mutex_lock(&amp;pl-&gt;state_mutex);</div><div class='ctx'> 		pl-&gt;phydev = NULL;</div><div class='add'>+		pl-&gt;phy_enable_tx_lpi = false;</div><div class='add'>+		pl-&gt;mac_tx_clk_stop = false;</div><div class='ctx'> 		mutex_unlock(&amp;pl-&gt;state_mutex);</div><div class='ctx'> 		mutex_unlock(&amp;phy-&gt;lock);</div><div class='del'>-		flush_work(&amp;pl-&gt;resolve);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;pl-&gt;phydev_mutex);</div><div class='ctx'> </div><div class='add'>+	if (phy) {</div><div class='add'>+		flush_work(&amp;pl-&gt;resolve);</div><div class='ctx'> 		phy_disconnect(phy);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2134,7 +2362,7 @@ EXPORT_SYMBOL_GPL(phylink_disconnect_phy);</div><div class='ctx'> static void phylink_link_changed(struct phylink *pl, bool up, const char *what)</div><div class='ctx'> {</div><div class='ctx'> 	if (!up)</div><div class='del'>-		pl-&gt;mac_link_dropped = true;</div><div class='add'>+		pl-&gt;link_failed = true;</div><div class='ctx'> 	phylink_run_resolve(pl);</div><div class='ctx'> 	phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");</div><div class='ctx'> }</div><div class='hunk'>@@ -2197,7 +2425,7 @@ void phylink_start(struct phylink *pl)</div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='ctx'> 	phylink_info(pl, "configuring for %s/%s link mode\n",</div><div class='del'>-		     phylink_an_mode_str(pl-&gt;cur_link_an_mode),</div><div class='add'>+		     phylink_an_mode_str(pl-&gt;req_link_an_mode),</div><div class='ctx'> 		     phy_modes(pl-&gt;link_config.interface));</div><div class='ctx'> </div><div class='ctx'> 	/* Always set the carrier off */</div><div class='hunk'>@@ -2268,7 +2496,7 @@ void phylink_stop(struct phylink *pl)</div><div class='ctx'> 		sfp_upstream_stop(pl-&gt;sfp_bus);</div><div class='ctx'> 	if (pl-&gt;phydev)</div><div class='ctx'> 		phy_stop(pl-&gt;phydev);</div><div class='del'>-	del_timer_sync(&amp;pl-&gt;link_poll);</div><div class='add'>+	timer_delete_sync(&amp;pl-&gt;link_poll);</div><div class='ctx'> 	if (pl-&gt;link_irq) {</div><div class='ctx'> 		free_irq(pl-&gt;link_irq, pl);</div><div class='ctx'> 		pl-&gt;link_irq = 0;</div><div class='hunk'>@@ -2283,6 +2511,81 @@ void phylink_stop(struct phylink *pl)</div><div class='ctx'> EXPORT_SYMBOL_GPL(phylink_stop);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI</div><div class='add'>+ * @pl: a pointer to a &amp;struct phylink returned from phylink_create()</div><div class='add'>+ *</div><div class='add'>+ * Disable the PHY's ability to stop the receive clock while the receive path</div><div class='add'>+ * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block()</div><div class='add'>+ * are balanced by calls to phylink_rx_clk_stop_unblock().</div><div class='add'>+ */</div><div class='add'>+void phylink_rx_clk_stop_block(struct phylink *pl)</div><div class='add'>+{</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	if (pl-&gt;mac_rx_clk_stop_blocked == U8_MAX) {</div><div class='add'>+		phylink_warn(pl, "%s called too many times - ignoring\n",</div><div class='add'>+			     __func__);</div><div class='add'>+		dump_stack();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable PHY receive clock stop if this is the first time this</div><div class='add'>+	 * function has been called and clock-stop was previously enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (pl-&gt;mac_rx_clk_stop_blocked++ == 0 &amp;&amp;</div><div class='add'>+	    pl-&gt;mac_supports_eee_ops &amp;&amp; pl-&gt;phydev &amp;&amp;</div><div class='add'>+	    pl-&gt;config-&gt;eee_rx_clk_stop_enable)</div><div class='add'>+		phy_eee_rx_clock_stop(pl-&gt;phydev, false);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock</div><div class='add'>+ * @pl: a pointer to a &amp;struct phylink returned from phylink_create()</div><div class='add'>+ *</div><div class='add'>+ * All calls to phylink_rx_clk_stop_block() must be balanced with a</div><div class='add'>+ * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs</div><div class='add'>+ * ability to stop the receive clock when the receive path is in EEE LPI mode.</div><div class='add'>+ */</div><div class='add'>+void phylink_rx_clk_stop_unblock(struct phylink *pl)</div><div class='add'>+{</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	if (pl-&gt;mac_rx_clk_stop_blocked == 0) {</div><div class='add'>+		phylink_warn(pl, "%s called too many times - ignoring\n",</div><div class='add'>+			     __func__);</div><div class='add'>+		dump_stack();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Re-enable PHY receive clock stop if the number of unblocks matches</div><div class='add'>+	 * the number of calls to the block function above.</div><div class='add'>+	 */</div><div class='add'>+	if (--pl-&gt;mac_rx_clk_stop_blocked == 0 &amp;&amp;</div><div class='add'>+	    pl-&gt;mac_supports_eee_ops &amp;&amp; pl-&gt;phydev &amp;&amp;</div><div class='add'>+	    pl-&gt;config-&gt;eee_rx_clk_stop_enable)</div><div class='add'>+		phy_eee_rx_clock_stop(pl-&gt;phydev, true);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock);</div><div class='add'>+</div><div class='add'>+static bool phylink_mac_supports_wol(struct phylink *pl)</div><div class='add'>+{</div><div class='add'>+	return !!pl-&gt;mac_ops-&gt;mac_wol_set;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool phylink_phy_supports_wol(struct phylink *pl,</div><div class='add'>+				     struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return phydev &amp;&amp; (pl-&gt;config-&gt;wol_phy_legacy || phy_can_wakeup(phydev));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool phylink_phy_pm_speed_ctrl(struct phylink *pl)</div><div class='add'>+{</div><div class='add'>+	return pl-&gt;config-&gt;wol_phy_speed_ctrl &amp;&amp; !pl-&gt;wolopts_mac &amp;&amp;</div><div class='add'>+	       pl-&gt;phydev &amp;&amp; phy_may_wakeup(pl-&gt;phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * phylink_suspend() - handle a network device suspend event</div><div class='ctx'>  * @pl: a pointer to a &amp;struct phylink returned from phylink_create()</div><div class='ctx'>  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan</div><div class='hunk'>@@ -2295,11 +2598,17 @@ EXPORT_SYMBOL_GPL(phylink_stop);</div><div class='ctx'>  *   can also bring down the link between the MAC and PHY.</div><div class='ctx'>  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC</div><div class='ctx'>  *   still needs to receive packets, so we can not bring the link down.</div><div class='add'>+ *</div><div class='add'>+ * Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored.</div><div class='add'>+ * (struct phylink_mac_ops.mac_set_wol populated.)</div><div class='ctx'>  */</div><div class='ctx'> void phylink_suspend(struct phylink *pl, bool mac_wol)</div><div class='ctx'> {</div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='add'>+	if (phylink_mac_supports_wol(pl))</div><div class='add'>+		mac_wol = !!pl-&gt;wolopts_mac;</div><div class='add'>+</div><div class='ctx'> 	if (mac_wol &amp;&amp; (!pl-&gt;netdev || pl-&gt;netdev-&gt;ethtool-&gt;wol_enabled)) {</div><div class='ctx'> 		/* Wake-on-Lan enabled, MAC handling */</div><div class='ctx'> 		mutex_lock(&amp;pl-&gt;state_mutex);</div><div class='hunk'>@@ -2307,14 +2616,16 @@ void phylink_suspend(struct phylink *pl, bool mac_wol)</div><div class='ctx'> 		/* Stop the resolver bringing the link up */</div><div class='ctx'> 		__set_bit(PHYLINK_DISABLE_MAC_WOL, &amp;pl-&gt;phylink_disable_state);</div><div class='ctx'> </div><div class='del'>-		/* Disable the carrier, to prevent transmit timeouts,</div><div class='del'>-		 * but one would hope all packets have been sent. This</div><div class='del'>-		 * also means phylink_resolve() will do nothing.</div><div class='del'>-		 */</div><div class='del'>-		if (pl-&gt;netdev)</div><div class='del'>-			netif_carrier_off(pl-&gt;netdev);</div><div class='del'>-		else</div><div class='add'>+		pl-&gt;suspend_link_up = phylink_link_is_up(pl);</div><div class='add'>+		if (pl-&gt;suspend_link_up) {</div><div class='add'>+			/* Disable the carrier, to prevent transmit timeouts,</div><div class='add'>+			 * but one would hope all packets have been sent. This</div><div class='add'>+			 * also means phylink_resolve() will do nothing.</div><div class='add'>+			 */</div><div class='add'>+			if (pl-&gt;netdev)</div><div class='add'>+				netif_carrier_off(pl-&gt;netdev);</div><div class='ctx'> 			pl-&gt;old_link_state = false;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* We do not call mac_link_down() here as we want the</div><div class='ctx'> 		 * link to remain up to receive the WoL packets.</div><div class='hunk'>@@ -2323,10 +2634,38 @@ void phylink_suspend(struct phylink *pl, bool mac_wol)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		phylink_stop(pl);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (phylink_phy_pm_speed_ctrl(pl))</div><div class='add'>+		phylink_speed_down(pl, false);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(phylink_suspend);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * phylink_prepare_resume() - prepare to resume a network device</div><div class='add'>+ * @pl: a pointer to a &amp;struct phylink returned from phylink_create()</div><div class='add'>+ *</div><div class='add'>+ * Optional, but if called must be called prior to phylink_resume().</div><div class='add'>+ *</div><div class='add'>+ * Prepare to resume a network device, preparing the PHY as necessary.</div><div class='add'>+ */</div><div class='add'>+void phylink_prepare_resume(struct phylink *pl)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = pl-&gt;phydev;</div><div class='add'>+</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	/* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock</div><div class='add'>+	 * when PDOWN is set. However, some MACs require RXC to be running</div><div class='add'>+	 * in order to resume. If the MAC requires RXC, and we have a PHY,</div><div class='add'>+	 * then resume the PHY. Note that 802.3 allows PHYs 500ms before</div><div class='add'>+	 * the clock meets requirements. We do not implement this delay.</div><div class='add'>+	 */</div><div class='add'>+	if (pl-&gt;config-&gt;mac_requires_rxc &amp;&amp; phydev &amp;&amp; phydev-&gt;suspended)</div><div class='add'>+		phy_resume(phydev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(phylink_prepare_resume);</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * phylink_resume() - handle a network device resume event</div><div class='ctx'>  * @pl: a pointer to a &amp;struct phylink returned from phylink_create()</div><div class='ctx'>  *</div><div class='hunk'>@@ -2337,18 +2676,24 @@ void phylink_resume(struct phylink *pl)</div><div class='ctx'> {</div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='add'>+	if (phylink_phy_pm_speed_ctrl(pl))</div><div class='add'>+		phylink_speed_up(pl);</div><div class='add'>+</div><div class='ctx'> 	if (test_bit(PHYLINK_DISABLE_MAC_WOL, &amp;pl-&gt;phylink_disable_state)) {</div><div class='ctx'> 		/* Wake-on-Lan enabled, MAC handling */</div><div class='ctx'> </div><div class='del'>-		/* Call mac_link_down() so we keep the overall state balanced.</div><div class='del'>-		 * Do this under the state_mutex lock for consistency. This</div><div class='del'>-		 * will cause a "Link Down" message to be printed during</div><div class='del'>-		 * resume, which is harmless - the true link state will be</div><div class='del'>-		 * printed when we run a resolve.</div><div class='del'>-		 */</div><div class='del'>-		mutex_lock(&amp;pl-&gt;state_mutex);</div><div class='del'>-		phylink_link_down(pl);</div><div class='del'>-		mutex_unlock(&amp;pl-&gt;state_mutex);</div><div class='add'>+		if (pl-&gt;suspend_link_up) {</div><div class='add'>+			/* Call mac_link_down() so we keep the overall state</div><div class='add'>+			 * balanced. Do this under the state_mutex lock for</div><div class='add'>+			 * consistency. This will cause a "Link Down" message</div><div class='add'>+			 * to be printed during resume, which is harmless -</div><div class='add'>+			 * the true link state will be printed when we run a</div><div class='add'>+			 * resolve.</div><div class='add'>+			 */</div><div class='add'>+			mutex_lock(&amp;pl-&gt;state_mutex);</div><div class='add'>+			phylink_link_down(pl);</div><div class='add'>+			mutex_unlock(&amp;pl-&gt;state_mutex);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* Re-apply the link parameters so that all the settings get</div><div class='ctx'> 		 * restored to the MAC.</div><div class='hunk'>@@ -2379,8 +2724,24 @@ void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)</div><div class='ctx'> 	wol-&gt;supported = 0;</div><div class='ctx'> 	wol-&gt;wolopts = 0;</div><div class='ctx'> </div><div class='del'>-	if (pl-&gt;phydev)</div><div class='del'>-		phy_ethtool_get_wol(pl-&gt;phydev, wol);</div><div class='add'>+	if (phylink_mac_supports_wol(pl)) {</div><div class='add'>+		if (phylink_phy_supports_wol(pl, pl-&gt;phydev))</div><div class='add'>+			phy_ethtool_get_wol(pl-&gt;phydev, wol);</div><div class='add'>+</div><div class='add'>+		/* Where the MAC augments the WoL support, merge its support and</div><div class='add'>+		 * current configuration.</div><div class='add'>+		 */</div><div class='add'>+		if (~wol-&gt;wolopts &amp; pl-&gt;wolopts_mac &amp; WAKE_MAGICSECURE)</div><div class='add'>+			memcpy(wol-&gt;sopass, pl-&gt;wol_sopass,</div><div class='add'>+			       sizeof(wol-&gt;sopass));</div><div class='add'>+</div><div class='add'>+		wol-&gt;supported |= pl-&gt;config-&gt;wol_mac_support;</div><div class='add'>+		wol-&gt;wolopts |= pl-&gt;wolopts_mac;</div><div class='add'>+	} else {</div><div class='add'>+		/* Legacy */</div><div class='add'>+		if (pl-&gt;phydev)</div><div class='add'>+			phy_ethtool_get_wol(pl-&gt;phydev, wol);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);</div><div class='ctx'> </div><div class='hunk'>@@ -2397,12 +2758,48 @@ EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);</div><div class='ctx'>  */</div><div class='ctx'> int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='add'>+	struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL };</div><div class='ctx'> 	int ret = -EOPNOTSUPP;</div><div class='add'>+	bool changed;</div><div class='add'>+	u32 wolopts;</div><div class='ctx'> </div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	if (pl-&gt;phydev)</div><div class='del'>-		ret = phy_ethtool_set_wol(pl-&gt;phydev, wol);</div><div class='add'>+	if (phylink_mac_supports_wol(pl)) {</div><div class='add'>+		wolopts = wol-&gt;wolopts;</div><div class='add'>+</div><div class='add'>+		if (phylink_phy_supports_wol(pl, pl-&gt;phydev)) {</div><div class='add'>+			ret = phy_ethtool_set_wol(pl-&gt;phydev, wol);</div><div class='add'>+			if (ret != 0 &amp;&amp; ret != -EOPNOTSUPP)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			phy_ethtool_get_wol(pl-&gt;phydev, &amp;w);</div><div class='add'>+</div><div class='add'>+			/* Any Wake-on-Lan modes which the PHY is handling</div><div class='add'>+			 * should not be passed on to the MAC.</div><div class='add'>+			 */</div><div class='add'>+			wolopts &amp;= ~w.wolopts;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		wolopts &amp;= pl-&gt;config-&gt;wol_mac_support;</div><div class='add'>+		changed = pl-&gt;wolopts_mac != wolopts;</div><div class='add'>+		if (wolopts &amp; WAKE_MAGICSECURE)</div><div class='add'>+			changed |= !!memcmp(wol-&gt;sopass, pl-&gt;wol_sopass,</div><div class='add'>+					    sizeof(wol-&gt;sopass));</div><div class='add'>+		memcpy(pl-&gt;wol_sopass, wol-&gt;sopass, sizeof(pl-&gt;wol_sopass));</div><div class='add'>+</div><div class='add'>+		if (changed) {</div><div class='add'>+			ret = pl-&gt;mac_ops-&gt;mac_wol_set(pl-&gt;config, wolopts,</div><div class='add'>+						       wol-&gt;sopass);</div><div class='add'>+			if (!ret)</div><div class='add'>+				pl-&gt;wolopts_mac = wolopts;</div><div class='add'>+		} else {</div><div class='add'>+			ret = 0;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (pl-&gt;phydev)</div><div class='add'>+			ret = phy_ethtool_set_wol(pl-&gt;phydev, wol);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2434,6 +2831,39 @@ static phy_interface_t phylink_sfp_select_interface(struct phylink *pl,</div><div class='ctx'> 	return interface;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl,</div><div class='add'>+							  u32 speed)</div><div class='add'>+{</div><div class='add'>+	phy_interface_t best_interface = PHY_INTERFACE_MODE_NA;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	u32 max_speed;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(phylink_sfp_interface_preference); i++) {</div><div class='add'>+		interface = phylink_sfp_interface_preference[i];</div><div class='add'>+		if (!test_bit(interface, pl-&gt;sfp_interfaces))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		max_speed = phylink_interface_max_speed(interface);</div><div class='add'>+</div><div class='add'>+		/* The logic here is: if speed == max_speed, then we've found</div><div class='add'>+		 * the best interface. Otherwise we find the interface that</div><div class='add'>+		 * can just support the requested speed.</div><div class='add'>+		 */</div><div class='add'>+		if (max_speed &gt;= speed)</div><div class='add'>+			best_interface = interface;</div><div class='add'>+</div><div class='add'>+		if (max_speed &lt;= speed)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (best_interface == PHY_INTERFACE_MODE_NA)</div><div class='add'>+		phylink_err(pl, "selection of interface failed, speed %u\n",</div><div class='add'>+			    speed);</div><div class='add'>+</div><div class='add'>+	return best_interface;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)</div><div class='ctx'> {</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask);</div><div class='hunk'>@@ -2482,7 +2912,7 @@ int phylink_ethtool_ksettings_get(struct phylink *pl,</div><div class='ctx'> </div><div class='ctx'> 	linkmode_copy(kset-&gt;link_modes.supported, pl-&gt;supported);</div><div class='ctx'> </div><div class='del'>-	switch (pl-&gt;cur_link_an_mode) {</div><div class='add'>+	switch (pl-&gt;act_link_an_mode) {</div><div class='ctx'> 	case MLO_AN_FIXED:</div><div class='ctx'> 		/* We are using fixed settings. Report these as the</div><div class='ctx'> 		 * current link settings - and note that these also</div><div class='hunk'>@@ -2513,6 +2943,26 @@ int phylink_ethtool_ksettings_get(struct phylink *pl,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);</div><div class='ctx'> </div><div class='add'>+static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl,</div><div class='add'>+					        phy_interface_t interface,</div><div class='add'>+						unsigned long *adv)</div><div class='add'>+{</div><div class='add'>+	unsigned int inband = phylink_inband_caps(pl, interface);</div><div class='add'>+	unsigned int mask;</div><div class='add'>+</div><div class='add'>+	/* If the PCS doesn't implement inband support, be permissive. */</div><div class='add'>+	if (!inband)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv))</div><div class='add'>+		mask = LINK_INBAND_ENABLE;</div><div class='add'>+	else</div><div class='add'>+		mask = LINK_INBAND_DISABLE;</div><div class='add'>+</div><div class='add'>+	/* Check whether the PCS implements the required mode */</div><div class='add'>+	return !!(inband &amp; mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * phylink_ethtool_ksettings_set() - set the link settings</div><div class='ctx'>  * @pl: a pointer to a &amp;struct phylink returned from phylink_create()</div><div class='hunk'>@@ -2522,8 +2972,8 @@ int phylink_ethtool_ksettings_set(struct phylink *pl,</div><div class='ctx'> 				  const struct ethtool_link_ksettings *kset)</div><div class='ctx'> {</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);</div><div class='add'>+	const struct link_capabilities *c;</div><div class='ctx'> 	struct phylink_link_state config;</div><div class='del'>-	const struct phy_setting *s;</div><div class='ctx'> </div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='hunk'>@@ -2566,23 +3016,23 @@ int phylink_ethtool_ksettings_set(struct phylink *pl,</div><div class='ctx'> 		/* Autonegotiation disabled, select a suitable speed and</div><div class='ctx'> 		 * duplex.</div><div class='ctx'> 		 */</div><div class='del'>-		s = phy_lookup_setting(kset-&gt;base.speed, kset-&gt;base.duplex,</div><div class='del'>-				       pl-&gt;supported, false);</div><div class='del'>-		if (!s)</div><div class='add'>+		c = phy_caps_lookup(kset-&gt;base.speed, kset-&gt;base.duplex,</div><div class='add'>+				    pl-&gt;supported, false);</div><div class='add'>+		if (!c)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		/* If we have a fixed link, refuse to change link parameters.</div><div class='ctx'> 		 * If the link parameters match, accept them but do nothing.</div><div class='ctx'> 		 */</div><div class='del'>-		if (pl-&gt;cur_link_an_mode == MLO_AN_FIXED) {</div><div class='del'>-			if (s-&gt;speed != pl-&gt;link_config.speed ||</div><div class='del'>-			    s-&gt;duplex != pl-&gt;link_config.duplex)</div><div class='add'>+		if (pl-&gt;req_link_an_mode == MLO_AN_FIXED) {</div><div class='add'>+			if (c-&gt;speed != pl-&gt;link_config.speed ||</div><div class='add'>+			    c-&gt;duplex != pl-&gt;link_config.duplex)</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> 			return 0;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		config.speed = s-&gt;speed;</div><div class='del'>-		config.duplex = s-&gt;duplex;</div><div class='add'>+		config.speed = c-&gt;speed;</div><div class='add'>+		config.duplex = c-&gt;duplex;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case AUTONEG_ENABLE:</div><div class='hunk'>@@ -2590,7 +3040,7 @@ int phylink_ethtool_ksettings_set(struct phylink *pl,</div><div class='ctx'> 		 * is our default case) but do not allow the advertisement to</div><div class='ctx'> 		 * be changed. If the advertisement matches, simply return.</div><div class='ctx'> 		 */</div><div class='del'>-		if (pl-&gt;cur_link_an_mode == MLO_AN_FIXED) {</div><div class='add'>+		if (pl-&gt;req_link_an_mode == MLO_AN_FIXED) {</div><div class='ctx'> 			if (!linkmode_equal(config.advertising,</div><div class='ctx'> 					    pl-&gt;link_config.advertising))</div><div class='ctx'> 				return -EINVAL;</div><div class='hunk'>@@ -2616,8 +3066,14 @@ int phylink_ethtool_ksettings_set(struct phylink *pl,</div><div class='ctx'> 	 * link can be configured correctly.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (pl-&gt;sfp_bus) {</div><div class='del'>-		config.interface = phylink_sfp_select_interface(pl,</div><div class='add'>+		if (kset-&gt;base.autoneg == AUTONEG_ENABLE)</div><div class='add'>+			config.interface =</div><div class='add'>+				phylink_sfp_select_interface(pl,</div><div class='ctx'> 							config.advertising);</div><div class='add'>+		else</div><div class='add'>+			config.interface =</div><div class='add'>+				phylink_sfp_select_interface_speed(pl,</div><div class='add'>+							config.speed);</div><div class='ctx'> 		if (config.interface == PHY_INTERFACE_MODE_NA)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -2625,7 +3081,7 @@ int phylink_ethtool_ksettings_set(struct phylink *pl,</div><div class='ctx'> 		linkmode_copy(support, pl-&gt;supported);</div><div class='ctx'> 		if (phylink_validate(pl, support, &amp;config)) {</div><div class='ctx'> 			phylink_err(pl, "validation of %s/%s with support %*pb failed\n",</div><div class='del'>-				    phylink_an_mode_str(pl-&gt;cur_link_an_mode),</div><div class='add'>+				    phylink_an_mode_str(pl-&gt;req_link_an_mode),</div><div class='ctx'> 				    phy_modes(config.interface),</div><div class='ctx'> 				    __ETHTOOL_LINK_MODE_MASK_NBITS, support);</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -2643,6 +3099,13 @@ int phylink_ethtool_ksettings_set(struct phylink *pl,</div><div class='ctx'> 	    phylink_is_empty_linkmode(config.advertising))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	/* Validate the autonegotiation state. We don't have a PHY in this</div><div class='add'>+	 * situation, so the PCS is the media-facing entity.</div><div class='add'>+	 */</div><div class='add'>+	if (!phylink_validate_pcs_inband_autoneg(pl, config.interface,</div><div class='add'>+						 config.advertising))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;pl-&gt;state_mutex);</div><div class='ctx'> 	pl-&gt;link_config.speed = config.speed;</div><div class='ctx'> 	pl-&gt;link_config.duplex = config.duplex;</div><div class='hunk'>@@ -2725,7 +3188,7 @@ int phylink_ethtool_set_pauseparam(struct phylink *pl,</div><div class='ctx'> </div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	if (pl-&gt;cur_link_an_mode == MLO_AN_FIXED)</div><div class='add'>+	if (pl-&gt;req_link_an_mode == MLO_AN_FIXED)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	if (!phylink_test(pl-&gt;supported, Pause) &amp;&amp;</div><div class='hunk'>@@ -2789,7 +3252,7 @@ int phylink_ethtool_set_pauseparam(struct phylink *pl,</div><div class='ctx'> 	 * link will cycle.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (manual_changed) {</div><div class='del'>-		pl-&gt;mac_link_dropped = true;</div><div class='add'>+		pl-&gt;link_failed = true;</div><div class='ctx'> 		phylink_run_resolve(pl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2821,24 +3284,6 @@ int phylink_get_eee_err(struct phylink *pl)</div><div class='ctx'> EXPORT_SYMBOL_GPL(phylink_get_eee_err);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * phylink_init_eee() - init and check the EEE features</div><div class='del'>- * @pl: a pointer to a &amp;struct phylink returned from phylink_create()</div><div class='del'>- * @clk_stop_enable: allow PHY to stop receive clock</div><div class='del'>- *</div><div class='del'>- * Must be called either with RTNL held or within mac_link_up()</div><div class='del'>- */</div><div class='del'>-int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)</div><div class='del'>-{</div><div class='del'>-	int ret = -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	if (pl-&gt;phydev)</div><div class='del'>-		ret = phy_init_eee(pl-&gt;phydev, clk_stop_enable);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(phylink_init_eee);</div><div class='del'>-</div><div class='del'>-/**</div><div class='ctx'>  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters</div><div class='ctx'>  * @pl: a pointer to a &amp;struct phylink returned from phylink_create()</div><div class='ctx'>  * @eee: a pointer to a &amp;struct ethtool_keee for the read parameters</div><div class='hunk'>@@ -2849,8 +3294,16 @@ int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)</div><div class='ctx'> </div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	if (pl-&gt;phydev)</div><div class='add'>+	if (pl-&gt;mac_supports_eee_ops &amp;&amp; !pl-&gt;mac_supports_eee)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (pl-&gt;phydev) {</div><div class='ctx'> 		ret = phy_ethtool_get_eee(pl-&gt;phydev, eee);</div><div class='add'>+		/* Restrict supported linkmode mask */</div><div class='add'>+		if (ret == 0 &amp;&amp; pl-&gt;mac_supports_eee_ops)</div><div class='add'>+			linkmode_and(eee-&gt;supported, eee-&gt;supported,</div><div class='add'>+				     pl-&gt;supported_lpi);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2863,12 +3316,29 @@ EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);</div><div class='ctx'>  */</div><div class='ctx'> int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)</div><div class='ctx'> {</div><div class='add'>+	bool mac_eee = pl-&gt;mac_supports_eee;</div><div class='ctx'> 	int ret = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	if (pl-&gt;phydev)</div><div class='add'>+	phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n",</div><div class='add'>+		    mac_eee ? "supports" : "does not support",</div><div class='add'>+		    eee-&gt;eee_enabled ? ", enabled" : "",</div><div class='add'>+		    __ETHTOOL_LINK_MODE_MASK_NBITS, eee-&gt;advertised,</div><div class='add'>+		    eee-&gt;tx_lpi_enabled ? " enabled" : "", eee-&gt;tx_lpi_timer);</div><div class='add'>+</div><div class='add'>+	if (pl-&gt;mac_supports_eee_ops &amp;&amp; !mac_eee)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (pl-&gt;phydev) {</div><div class='add'>+		/* Restrict advertisement mask */</div><div class='add'>+		if (pl-&gt;mac_supports_eee_ops)</div><div class='add'>+			linkmode_and(eee-&gt;advertised, eee-&gt;advertised,</div><div class='add'>+				     pl-&gt;supported_lpi);</div><div class='ctx'> 		ret = phy_ethtool_set_eee(pl-&gt;phydev, eee);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			eee_to_eeecfg(&amp;pl-&gt;eee_cfg, eee);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -2989,7 +3459,7 @@ static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,</div><div class='ctx'> 	struct phylink_link_state state;</div><div class='ctx'> 	int val = 0xffff;</div><div class='ctx'> </div><div class='del'>-	switch (pl-&gt;cur_link_an_mode) {</div><div class='add'>+	switch (pl-&gt;act_link_an_mode) {</div><div class='ctx'> 	case MLO_AN_FIXED:</div><div class='ctx'> 		if (phy_id == 0) {</div><div class='ctx'> 			phylink_get_fixed_state(pl, &amp;state);</div><div class='hunk'>@@ -3014,7 +3484,7 @@ static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,</div><div class='ctx'> static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,</div><div class='ctx'> 			     unsigned int reg, unsigned int val)</div><div class='ctx'> {</div><div class='del'>-	switch (pl-&gt;cur_link_an_mode) {</div><div class='add'>+	switch (pl-&gt;act_link_an_mode) {</div><div class='ctx'> 	case MLO_AN_FIXED:</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='hunk'>@@ -3184,11 +3654,11 @@ static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,</div><div class='ctx'> 	return interface;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void phylink_sfp_set_config(struct phylink *pl, u8 mode,</div><div class='del'>-				   unsigned long *supported,</div><div class='del'>-				   struct phylink_link_state *state)</div><div class='add'>+static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported,</div><div class='add'>+				   struct phylink_link_state *state,</div><div class='add'>+				   bool changed)</div><div class='ctx'> {</div><div class='del'>-	bool changed = false;</div><div class='add'>+	u8 mode = MLO_AN_INBAND;</div><div class='ctx'> </div><div class='ctx'> 	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",</div><div class='ctx'> 		    phylink_an_mode_str(mode), phy_modes(state-&gt;interface),</div><div class='hunk'>@@ -3204,9 +3674,9 @@ static void phylink_sfp_set_config(struct phylink *pl, u8 mode,</div><div class='ctx'> 		changed = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pl-&gt;cur_link_an_mode != mode ||</div><div class='add'>+	if (pl-&gt;req_link_an_mode != mode ||</div><div class='ctx'> 	    pl-&gt;link_config.interface != state-&gt;interface) {</div><div class='del'>-		pl-&gt;cur_link_an_mode = mode;</div><div class='add'>+		pl-&gt;req_link_an_mode = mode;</div><div class='ctx'> 		pl-&gt;link_config.interface = state-&gt;interface;</div><div class='ctx'> </div><div class='ctx'> 		changed = true;</div><div class='hunk'>@@ -3221,13 +3691,14 @@ static void phylink_sfp_set_config(struct phylink *pl, u8 mode,</div><div class='ctx'> 		phylink_mac_initial_config(pl, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,</div><div class='del'>-				  struct phy_device *phy)</div><div class='add'>+static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy)</div><div class='ctx'> {</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);</div><div class='ctx'> 	struct phylink_link_state config;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	/* We're not using pl-&gt;sfp_interfaces, so clear it. */</div><div class='add'>+	phy_interface_zero(pl-&gt;sfp_interfaces);</div><div class='ctx'> 	linkmode_copy(support, phy-&gt;supported);</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;config, 0, sizeof(config));</div><div class='hunk'>@@ -3266,7 +3737,7 @@ static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,</div><div class='ctx'> </div><div class='ctx'> 	pl-&gt;link_port = pl-&gt;sfp_port;</div><div class='ctx'> </div><div class='del'>-	phylink_sfp_set_config(pl, mode, support, &amp;config);</div><div class='add'>+	phylink_sfp_set_config(pl, support, &amp;config, true);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3274,8 +3745,8 @@ static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,</div><div class='ctx'> static int phylink_sfp_config_optical(struct phylink *pl)</div><div class='ctx'> {</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);</div><div class='del'>-	DECLARE_PHY_INTERFACE_MASK(interfaces);</div><div class='ctx'> 	struct phylink_link_state config;</div><div class='add'>+	enum inband_type inband_type;</div><div class='ctx'> 	phy_interface_t interface;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -3288,9 +3759,9 @@ static int phylink_sfp_config_optical(struct phylink *pl)</div><div class='ctx'> 	/* Find the union of the supported interfaces by the PCS/MAC and</div><div class='ctx'> 	 * the SFP module.</div><div class='ctx'> 	 */</div><div class='del'>-	phy_interface_and(interfaces, pl-&gt;config-&gt;supported_interfaces,</div><div class='add'>+	phy_interface_and(pl-&gt;sfp_interfaces, pl-&gt;config-&gt;supported_interfaces,</div><div class='ctx'> 			  pl-&gt;sfp_interfaces);</div><div class='del'>-	if (phy_interface_empty(interfaces)) {</div><div class='add'>+	if (phy_interface_empty(pl-&gt;sfp_interfaces)) {</div><div class='ctx'> 		phylink_err(pl, "unsupported SFP module: no common interface modes\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3306,14 +3777,14 @@ static int phylink_sfp_config_optical(struct phylink *pl)</div><div class='ctx'> 	 * mask to only those link modes that can be supported.</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = phylink_validate_mask(pl, NULL, pl-&gt;sfp_support, &amp;config,</div><div class='del'>-				    interfaces);</div><div class='add'>+				    pl-&gt;sfp_interfaces);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",</div><div class='ctx'> 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	interface = phylink_choose_sfp_interface(pl, interfaces);</div><div class='add'>+	interface = phylink_choose_sfp_interface(pl, pl-&gt;sfp_interfaces);</div><div class='ctx'> 	if (interface == PHY_INTERFACE_MODE_NA) {</div><div class='ctx'> 		phylink_err(pl, "failed to select SFP interface\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -3322,6 +3793,29 @@ static int phylink_sfp_config_optical(struct phylink *pl)</div><div class='ctx'> 	phylink_dbg(pl, "optical SFP: chosen %s interface\n",</div><div class='ctx'> 		    phy_modes(interface));</div><div class='ctx'> </div><div class='add'>+	inband_type = phylink_get_inband_type(interface);</div><div class='add'>+	if (inband_type == INBAND_NONE) {</div><div class='add'>+		/* If this is the sole interface, and there is no inband</div><div class='add'>+		 * support, clear the advertising mask and Autoneg bit in</div><div class='add'>+		 * the support mask. Otherwise, just clear the Autoneg bit</div><div class='add'>+		 * in the advertising mask.</div><div class='add'>+		 */</div><div class='add'>+		if (phy_interface_weight(pl-&gt;sfp_interfaces) == 1) {</div><div class='add'>+			linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,</div><div class='add'>+					   pl-&gt;sfp_support);</div><div class='add'>+			linkmode_zero(config.advertising);</div><div class='add'>+		} else {</div><div class='add'>+			linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,</div><div class='add'>+					   config.advertising);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!phylink_validate_pcs_inband_autoneg(pl, interface,</div><div class='add'>+						 config.advertising)) {</div><div class='add'>+		phylink_err(pl, "autoneg setting not compatible with PCS");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	config.interface = interface;</div><div class='ctx'> </div><div class='ctx'> 	/* Ignore errors if we're expecting a PHY to attach later */</div><div class='hunk'>@@ -3335,7 +3829,7 @@ static int phylink_sfp_config_optical(struct phylink *pl)</div><div class='ctx'> </div><div class='ctx'> 	pl-&gt;link_port = pl-&gt;sfp_port;</div><div class='ctx'> </div><div class='del'>-	phylink_sfp_set_config(pl, MLO_AN_INBAND, pl-&gt;sfp_support, &amp;config);</div><div class='add'>+	phylink_sfp_set_config(pl, pl-&gt;sfp_support, &amp;config, false);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3343,23 +3837,31 @@ static int phylink_sfp_config_optical(struct phylink *pl)</div><div class='ctx'> static int phylink_sfp_module_insert(void *upstream,</div><div class='ctx'> 				     const struct sfp_eeprom_id *id)</div><div class='ctx'> {</div><div class='add'>+	const struct sfp_module_caps *caps;</div><div class='ctx'> 	struct phylink *pl = upstream;</div><div class='ctx'> </div><div class='ctx'> 	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	linkmode_zero(pl-&gt;sfp_support);</div><div class='del'>-	phy_interface_zero(pl-&gt;sfp_interfaces);</div><div class='del'>-	sfp_parse_support(pl-&gt;sfp_bus, id, pl-&gt;sfp_support, pl-&gt;sfp_interfaces);</div><div class='del'>-	pl-&gt;sfp_port = sfp_parse_port(pl-&gt;sfp_bus, id, pl-&gt;sfp_support);</div><div class='add'>+	caps = sfp_get_module_caps(pl-&gt;sfp_bus);</div><div class='add'>+	phy_interface_copy(pl-&gt;sfp_interfaces, caps-&gt;interfaces);</div><div class='add'>+	linkmode_copy(pl-&gt;sfp_support, caps-&gt;link_modes);</div><div class='add'>+	pl-&gt;sfp_may_have_phy = caps-&gt;may_have_phy;</div><div class='add'>+	pl-&gt;sfp_port = caps-&gt;port;</div><div class='ctx'> </div><div class='ctx'> 	/* If this module may have a PHY connecting later, defer until later */</div><div class='del'>-	pl-&gt;sfp_may_have_phy = sfp_may_have_phy(pl-&gt;sfp_bus, id);</div><div class='ctx'> 	if (pl-&gt;sfp_may_have_phy)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	return phylink_sfp_config_optical(pl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void phylink_sfp_module_remove(void *upstream)</div><div class='add'>+{</div><div class='add'>+	struct phylink *pl = upstream;</div><div class='add'>+</div><div class='add'>+	phy_interface_zero(pl-&gt;sfp_interfaces);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int phylink_sfp_module_start(void *upstream)</div><div class='ctx'> {</div><div class='ctx'> 	struct phylink *pl = upstream;</div><div class='hunk'>@@ -3406,19 +3908,16 @@ static void phylink_sfp_link_up(void *upstream)</div><div class='ctx'> 	phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII</div><div class='del'>- * or 802.3z control word, so inband will not work.</div><div class='del'>- */</div><div class='del'>-static bool phylink_phy_no_inband(struct phy_device *phy)</div><div class='del'>-{</div><div class='del'>-	return phy-&gt;is_c45 &amp;&amp; phy_id_compare(phy-&gt;c45_ids.device_ids[1],</div><div class='del'>-					     0xae025150, 0xfffffff0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)</div><div class='ctx'> {</div><div class='ctx'> 	struct phylink *pl = upstream;</div><div class='del'>-	u8 mode;</div><div class='add'>+</div><div class='add'>+	if (!phy-&gt;drv) {</div><div class='add'>+		phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n",</div><div class='add'>+			    phydev_name(phy), (unsigned long)phy-&gt;phy_id);</div><div class='add'>+		phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This is the new way of dealing with flow control for PHYs,</div><div class='hunk'>@@ -3429,17 +3928,12 @@ static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)</div><div class='ctx'> 	 */</div><div class='ctx'> 	phy_support_asym_pause(phy);</div><div class='ctx'> </div><div class='del'>-	if (phylink_phy_no_inband(phy))</div><div class='del'>-		mode = MLO_AN_PHY;</div><div class='del'>-	else</div><div class='del'>-		mode = MLO_AN_INBAND;</div><div class='del'>-</div><div class='ctx'> 	/* Set the PHY's host supported interfaces */</div><div class='ctx'> 	phy_interface_and(phy-&gt;host_interfaces, phylink_sfp_interfaces,</div><div class='ctx'> 			  pl-&gt;config-&gt;supported_interfaces);</div><div class='ctx'> </div><div class='ctx'> 	/* Do the initial configuration */</div><div class='del'>-	return phylink_sfp_config_phy(pl, mode, phy);</div><div class='add'>+	return phylink_sfp_config_phy(pl, phy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void phylink_sfp_disconnect_phy(void *upstream,</div><div class='hunk'>@@ -3452,6 +3946,7 @@ static const struct sfp_upstream_ops sfp_phylink_ops = {</div><div class='ctx'> 	.attach = phylink_sfp_attach,</div><div class='ctx'> 	.detach = phylink_sfp_detach,</div><div class='ctx'> 	.module_insert = phylink_sfp_module_insert,</div><div class='add'>+	.module_remove = phylink_sfp_module_remove,</div><div class='ctx'> 	.module_start = phylink_sfp_module_start,</div><div class='ctx'> 	.module_stop = phylink_sfp_module_stop,</div><div class='ctx'> 	.link_up = phylink_sfp_link_up,</div><div class='hunk'>@@ -3634,6 +4129,7 @@ static void phylink_decode_usgmii_word(struct phylink_link_state *state,</div><div class='ctx'> /**</div><div class='ctx'>  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers</div><div class='ctx'>  * @state: a pointer to a &amp;struct phylink_link_state.</div><div class='add'>+ * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)</div><div class='ctx'>  * @bmsr: The value of the %MII_BMSR register</div><div class='ctx'>  * @lpa: The value of the %MII_LPA register</div><div class='ctx'>  *</div><div class='hunk'>@@ -3646,32 +4142,45 @@ static void phylink_decode_usgmii_word(struct phylink_link_state *state,</div><div class='ctx'>  * accessing @bmsr and @lpa cannot be done with MDIO directly.</div><div class='ctx'>  */</div><div class='ctx'> void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,</div><div class='del'>-				      u16 bmsr, u16 lpa)</div><div class='add'>+				      unsigned int neg_mode, u16 bmsr, u16 lpa)</div><div class='ctx'> {</div><div class='ctx'> 	state-&gt;link = !!(bmsr &amp; BMSR_LSTATUS);</div><div class='ctx'> 	state-&gt;an_complete = !!(bmsr &amp; BMSR_ANEGCOMPLETE);</div><div class='del'>-	/* If there is no link or autonegotiation is disabled, the LP advertisement</div><div class='del'>-	 * data is not meaningful, so don't go any further.</div><div class='del'>-	 */</div><div class='del'>-	if (!state-&gt;link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,</div><div class='del'>-					       state-&gt;advertising))</div><div class='add'>+</div><div class='add'>+	/* If the link is down, the advertisement data is undefined. */</div><div class='add'>+	if (!state-&gt;link)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	switch (state-&gt;interface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='del'>-		phylink_decode_c37_word(state, lpa, SPEED_1000);</div><div class='add'>+		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {</div><div class='add'>+			phylink_decode_c37_word(state, lpa, SPEED_1000);</div><div class='add'>+		} else {</div><div class='add'>+			state-&gt;speed = SPEED_1000;</div><div class='add'>+			state-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+			state-&gt;pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='del'>-		phylink_decode_c37_word(state, lpa, SPEED_2500);</div><div class='add'>+		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {</div><div class='add'>+			phylink_decode_c37_word(state, lpa, SPEED_2500);</div><div class='add'>+		} else {</div><div class='add'>+			state-&gt;speed = SPEED_2500;</div><div class='add'>+			state-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+			state-&gt;pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case PHY_INTERFACE_MODE_SGMII:</div><div class='ctx'> 	case PHY_INTERFACE_MODE_QSGMII:</div><div class='del'>-		phylink_decode_sgmii_word(state, lpa);</div><div class='add'>+		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)</div><div class='add'>+			phylink_decode_sgmii_word(state, lpa);</div><div class='ctx'> 		break;</div><div class='add'>+</div><div class='ctx'> 	case PHY_INTERFACE_MODE_QUSGMII:</div><div class='del'>-		phylink_decode_usgmii_word(state, lpa);</div><div class='add'>+		if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)</div><div class='add'>+			phylink_decode_usgmii_word(state, lpa);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -3684,6 +4193,7 @@ EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);</div><div class='ctx'> /**</div><div class='ctx'>  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state</div><div class='ctx'>  * @pcs: a pointer to a &amp;struct mdio_device.</div><div class='add'>+ * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)</div><div class='ctx'>  * @state: a pointer to a &amp;struct phylink_link_state.</div><div class='ctx'>  *</div><div class='ctx'>  * Helper for MAC PCS supporting the 802.3 clause 22 register set for</div><div class='hunk'>@@ -3696,6 +4206,7 @@ EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);</div><div class='ctx'>  * structure.</div><div class='ctx'>  */</div><div class='ctx'> void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,</div><div class='add'>+				   unsigned int neg_mode,</div><div class='ctx'> 				   struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='ctx'> 	int bmsr, lpa;</div><div class='hunk'>@@ -3707,7 +4218,7 @@ void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);</div><div class='add'>+	phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/qcom/Kconfig b/drivers/net/phy/qcom/Kconfig<br/>index 570626cc8e14..06e8430c13b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/qcom/Kconfig</a></div><div class='hunk'>@@ -7,7 +7,7 @@ config AT803X_PHY</div><div class='ctx'> 	select QCOM_NET_PHYLIB</div><div class='ctx'> 	depends on REGULATOR</div><div class='ctx'> 	help</div><div class='del'>-	  Currently supports the AR8030, AR8031, AR8033, AR8035 model</div><div class='add'>+	  Currently supports the AR8030, AR8031, AR8033, AR8035, IPQ5018 model</div><div class='ctx'> </div><div class='ctx'> config QCA83XX_PHY</div><div class='ctx'> 	tristate "Qualcomm Atheros QCA833x PHYs"</div><div class='hunk'>@@ -24,6 +24,7 @@ config QCA808X_PHY</div><div class='ctx'> config QCA807X_PHY</div><div class='ctx'> 	tristate "Qualcomm QCA807x PHYs"</div><div class='ctx'> 	select QCOM_NET_PHYLIB</div><div class='add'>+	select PHY_PACKAGE</div><div class='ctx'> 	depends on OF_MDIO</div><div class='ctx'> 	help</div><div class='ctx'> 	  Currently supports the Qualcomm QCA8072, QCA8075 and the PSGMII</div><div class='head'>diff --git a/drivers/net/phy/qcom/at803x.c b/drivers/net/phy/qcom/at803x.c<br/>index 105602581a03..338acd11a9b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/at803x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/at803x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/at803x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/qcom/at803x.c</a></div><div class='hunk'>@@ -19,6 +19,7 @@</div><div class='ctx'> #include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='ctx'> #include &lt;linux/sfp.h&gt;</div><div class='ctx'> #include &lt;dt-bindings/net/qca-ar803x.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -26,9 +27,6 @@</div><div class='ctx'> </div><div class='ctx'> #define AT803X_LED_CONTROL			0x18</div><div class='ctx'> </div><div class='del'>-#define AT803X_PHY_MMD3_WOL_CTRL		0x8012</div><div class='del'>-#define AT803X_WOL_EN				BIT(5)</div><div class='del'>-</div><div class='ctx'> #define AT803X_REG_CHIP_CONFIG			0x1f</div><div class='ctx'> #define AT803X_BT_BX_REG_SEL			0x8000</div><div class='ctx'> </div><div class='hunk'>@@ -96,6 +94,8 @@</div><div class='ctx'> #define ATH8035_PHY_ID				0x004dd072</div><div class='ctx'> #define AT8030_PHY_ID_MASK			0xffffffef</div><div class='ctx'> </div><div class='add'>+#define IPQ5018_PHY_ID				0x004dd0c0</div><div class='add'>+</div><div class='ctx'> #define QCA9561_PHY_ID				0x004dd042</div><div class='ctx'> </div><div class='ctx'> #define AT803X_PAGE_FIBER			0</div><div class='hunk'>@@ -108,6 +108,48 @@</div><div class='ctx'> /* disable hibernation mode */</div><div class='ctx'> #define AT803X_DISABLE_HIBERNATION_MODE		BIT(2)</div><div class='ctx'> </div><div class='add'>+#define IPQ5018_PHY_FIFO_CONTROL		0x19</div><div class='add'>+#define IPQ5018_PHY_FIFO_RESET			GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+#define IPQ5018_PHY_DEBUG_EDAC			0x4380</div><div class='add'>+#define IPQ5018_PHY_MMD1_MDAC			0x8100</div><div class='add'>+#define IPQ5018_PHY_DAC_MASK			GENMASK(15, 8)</div><div class='add'>+</div><div class='add'>+/* MDAC and EDAC values for short cable length */</div><div class='add'>+#define IPQ5018_PHY_DEBUG_EDAC_VAL		0x10</div><div class='add'>+#define IPQ5018_PHY_MMD1_MDAC_VAL		0x10</div><div class='add'>+</div><div class='add'>+#define IPQ5018_PHY_MMD1_MSE_THRESH1		0x1000</div><div class='add'>+#define IPQ5018_PHY_MMD1_MSE_THRESH2		0x1001</div><div class='add'>+#define IPQ5018_PHY_PCS_EEE_TX_TIMER		0x8008</div><div class='add'>+#define IPQ5018_PHY_PCS_EEE_RX_TIMER		0x8009</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL3	0x8074</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL4	0x8075</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL5	0x8076</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL6	0x8077</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL7	0x8078</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL9	0x807a</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL13	0x807e</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL14	0x807f</div><div class='add'>+</div><div class='add'>+#define IPQ5018_PHY_MMD1_MSE_THRESH1_VAL	0xf1</div><div class='add'>+#define IPQ5018_PHY_MMD1_MSE_THRESH2_VAL	0x1f6</div><div class='add'>+#define IPQ5018_PHY_PCS_EEE_TX_TIMER_VAL	0x7880</div><div class='add'>+#define IPQ5018_PHY_PCS_EEE_RX_TIMER_VAL	0xc8</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL3_VAL	0xc040</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL4_VAL	0xa060</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL5_VAL	0xc040</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL6_VAL	0xa060</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL7_VAL	0xc24c</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL9_VAL	0xc060</div><div class='add'>+#define IPQ5018_PHY_PCS_CDT_THRESH_CTRL13_VAL	0xb060</div><div class='add'>+#define IPQ5018_PHY_PCS_NEAR_ECHO_THRESH_VAL	0x90b0</div><div class='add'>+</div><div class='add'>+#define IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE		0x1</div><div class='add'>+#define IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE_MASK	GENMASK(7, 4)</div><div class='add'>+#define IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE_DEFAULT	0x50</div><div class='add'>+#define IPQ5018_PHY_DEBUG_ANA_DAC_FILTER	0xa080</div><div class='add'>+</div><div class='ctx'> MODULE_DESCRIPTION("Qualcomm Atheros AR803x PHY driver");</div><div class='ctx'> MODULE_AUTHOR("Matus Ujhelyi");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='hunk'>@@ -133,6 +175,11 @@ struct at803x_context {</div><div class='ctx'> 	u16 led_control;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ipq5018_priv {</div><div class='add'>+	struct reset_control *rst;</div><div class='add'>+	bool set_short_cable_dac;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int at803x_write_page(struct phy_device *phydev, int page)</div><div class='ctx'> {</div><div class='ctx'> 	int mask;</div><div class='hunk'>@@ -724,10 +771,10 @@ static int at8031_register_regulators(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static int at8031_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)</div><div class='ctx'> {</div><div class='del'>-	struct phy_device *phydev = upstream;</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(phy_support);</div><div class='ctx'> 	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);</div><div class='del'>-	DECLARE_PHY_INTERFACE_MASK(interfaces);</div><div class='add'>+	struct phy_device *phydev = upstream;</div><div class='add'>+	const struct sfp_module_caps *caps;</div><div class='ctx'> 	phy_interface_t iface;</div><div class='ctx'> </div><div class='ctx'> 	linkmode_zero(phy_support);</div><div class='hunk'>@@ -737,12 +784,11 @@ static int at8031_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)</div><div class='ctx'> 	phylink_set(phy_support, Pause);</div><div class='ctx'> 	phylink_set(phy_support, Asym_Pause);</div><div class='ctx'> </div><div class='del'>-	linkmode_zero(sfp_support);</div><div class='del'>-	sfp_parse_support(phydev-&gt;sfp_bus, id, sfp_support, interfaces);</div><div class='add'>+	caps = sfp_get_module_caps(phydev-&gt;sfp_bus);</div><div class='ctx'> 	/* Some modules support 10G modes as well as others we support.</div><div class='ctx'> 	 * Mask out non-supported modes so the correct interface is picked.</div><div class='ctx'> 	 */</div><div class='del'>-	linkmode_and(sfp_support, phy_support, sfp_support);</div><div class='add'>+	linkmode_and(sfp_support, phy_support, caps-&gt;link_modes);</div><div class='ctx'> </div><div class='ctx'> 	if (linkmode_empty(sfp_support)) {</div><div class='ctx'> 		dev_err(&amp;phydev-&gt;mdio.dev, "incompatible SFP module inserted\n");</div><div class='hunk'>@@ -866,30 +912,6 @@ static int at8031_config_init(struct phy_device *phydev)</div><div class='ctx'> 	return at803x_config_init(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int at8031_set_wol(struct phy_device *phydev,</div><div class='del'>-			  struct ethtool_wolinfo *wol)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* First setup MAC address and enable WOL interrupt */</div><div class='del'>-	ret = at803x_set_wol(phydev, wol);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (wol-&gt;wolopts &amp; WAKE_MAGIC)</div><div class='del'>-		/* Enable WOL function for 1588 */</div><div class='del'>-		ret = phy_modify_mmd(phydev, MDIO_MMD_PCS,</div><div class='del'>-				     AT803X_PHY_MMD3_WOL_CTRL,</div><div class='del'>-				     0, AT803X_WOL_EN);</div><div class='del'>-	else</div><div class='del'>-		/* Disable WoL function for 1588 */</div><div class='del'>-		ret = phy_modify_mmd(phydev, MDIO_MMD_PCS,</div><div class='del'>-				     AT803X_PHY_MMD3_WOL_CTRL,</div><div class='del'>-				     AT803X_WOL_EN, 0);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int at8031_config_intr(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct at803x_priv *priv = phydev-&gt;priv;</div><div class='hunk'>@@ -987,6 +1009,109 @@ static int at8035_probe(struct phy_device *phydev)</div><div class='ctx'> 	return at8035_parse_dt(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ipq5018_cable_test_start(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL3,</div><div class='add'>+		      IPQ5018_PHY_PCS_CDT_THRESH_CTRL3_VAL);</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL4,</div><div class='add'>+		      IPQ5018_PHY_PCS_CDT_THRESH_CTRL4_VAL);</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL5,</div><div class='add'>+		      IPQ5018_PHY_PCS_CDT_THRESH_CTRL5_VAL);</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL6,</div><div class='add'>+		      IPQ5018_PHY_PCS_CDT_THRESH_CTRL6_VAL);</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL7,</div><div class='add'>+		      IPQ5018_PHY_PCS_CDT_THRESH_CTRL7_VAL);</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL9,</div><div class='add'>+		      IPQ5018_PHY_PCS_CDT_THRESH_CTRL9_VAL);</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL13,</div><div class='add'>+		      IPQ5018_PHY_PCS_CDT_THRESH_CTRL13_VAL);</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_CDT_THRESH_CTRL3,</div><div class='add'>+		      IPQ5018_PHY_PCS_NEAR_ECHO_THRESH_VAL);</div><div class='add'>+</div><div class='add'>+	/* we do all the (time consuming) work later */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ipq5018_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct ipq5018_priv *priv = phydev-&gt;priv;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * set LDO efuse: first temporarily store ANA_DAC_FILTER value from</div><div class='add'>+	 * debug register as it will be reset once the ANA_LDO_EFUSE register</div><div class='add'>+	 * is written to</div><div class='add'>+	 */</div><div class='add'>+	val = at803x_debug_reg_read(phydev, IPQ5018_PHY_DEBUG_ANA_DAC_FILTER);</div><div class='add'>+	at803x_debug_reg_mask(phydev, IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE,</div><div class='add'>+			      IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE_MASK,</div><div class='add'>+			      IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE_DEFAULT);</div><div class='add'>+	at803x_debug_reg_write(phydev, IPQ5018_PHY_DEBUG_ANA_DAC_FILTER, val);</div><div class='add'>+</div><div class='add'>+	/* set 8023AZ EEE TX and RX timer values */</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_EEE_TX_TIMER,</div><div class='add'>+		      IPQ5018_PHY_PCS_EEE_TX_TIMER_VAL);</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_EEE_RX_TIMER,</div><div class='add'>+		      IPQ5018_PHY_PCS_EEE_RX_TIMER_VAL);</div><div class='add'>+</div><div class='add'>+	/* set MSE threshold values */</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PMAPMD, IPQ5018_PHY_MMD1_MSE_THRESH1,</div><div class='add'>+		      IPQ5018_PHY_MMD1_MSE_THRESH1_VAL);</div><div class='add'>+	phy_write_mmd(phydev, MDIO_MMD_PMAPMD, IPQ5018_PHY_MMD1_MSE_THRESH2,</div><div class='add'>+		      IPQ5018_PHY_MMD1_MSE_THRESH2_VAL);</div><div class='add'>+</div><div class='add'>+	/* PHY DAC values are optional and only set in a PHY to PHY link architecture */</div><div class='add'>+	if (priv-&gt;set_short_cable_dac) {</div><div class='add'>+		/* setting MDAC (Multi-level Digital-to-Analog Converter) in MMD1 */</div><div class='add'>+		phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, IPQ5018_PHY_MMD1_MDAC,</div><div class='add'>+			       IPQ5018_PHY_DAC_MASK, IPQ5018_PHY_MMD1_MDAC_VAL);</div><div class='add'>+</div><div class='add'>+		/* setting EDAC (Error-detection and Correction) in debug register */</div><div class='add'>+		at803x_debug_reg_mask(phydev, IPQ5018_PHY_DEBUG_EDAC,</div><div class='add'>+				      IPQ5018_PHY_DAC_MASK, IPQ5018_PHY_DEBUG_EDAC_VAL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ipq5018_link_change_notify(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Reset the FIFO buffer upon link disconnects to clear any residual data</div><div class='add'>+	 * which may cause issues with the FIFO which it cannot recover from.</div><div class='add'>+	 */</div><div class='add'>+	mdiobus_modify_changed(phydev-&gt;mdio.bus, phydev-&gt;mdio.addr,</div><div class='add'>+			       IPQ5018_PHY_FIFO_CONTROL, IPQ5018_PHY_FIFO_RESET,</div><div class='add'>+			       phydev-&gt;link ? IPQ5018_PHY_FIFO_RESET : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ipq5018_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='add'>+	struct ipq5018_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;set_short_cable_dac = of_property_read_bool(dev-&gt;of_node,</div><div class='add'>+							  "qcom,dac-preset-short-cable");</div><div class='add'>+</div><div class='add'>+	priv-&gt;rst = devm_reset_control_array_get_exclusive(dev);</div><div class='add'>+	if (IS_ERR(priv-&gt;rst))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(priv-&gt;rst),</div><div class='add'>+				     "failed to acquire reset\n");</div><div class='add'>+</div><div class='add'>+	ret = reset_control_reset(priv-&gt;rst);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "failed to reset\n");</div><div class='add'>+</div><div class='add'>+	phydev-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver at803x_driver[] = {</div><div class='ctx'> {</div><div class='ctx'> 	/* Qualcomm Atheros AR8035 */</div><div class='hunk'>@@ -1079,6 +1204,19 @@ static struct phy_driver at803x_driver[] = {</div><div class='ctx'> 	.soft_reset		= genphy_soft_reset,</div><div class='ctx'> 	.config_aneg		= at803x_config_aneg,</div><div class='ctx'> }, {</div><div class='add'>+	PHY_ID_MATCH_EXACT(IPQ5018_PHY_ID),</div><div class='add'>+	.name			= "Qualcomm Atheros IPQ5018 internal PHY",</div><div class='add'>+	.flags			= PHY_IS_INTERNAL | PHY_POLL_CABLE_TEST,</div><div class='add'>+	.probe			= ipq5018_probe,</div><div class='add'>+	.config_init		= ipq5018_config_init,</div><div class='add'>+	.link_change_notify	= ipq5018_link_change_notify,</div><div class='add'>+	.read_status		= at803x_read_status,</div><div class='add'>+	.config_intr		= at803x_config_intr,</div><div class='add'>+	.handle_interrupt	= at803x_handle_interrupt,</div><div class='add'>+	.cable_test_start	= ipq5018_cable_test_start,</div><div class='add'>+	.cable_test_get_status	= qca808x_cable_test_get_status,</div><div class='add'>+	.soft_reset		= genphy_soft_reset,</div><div class='add'>+}, {</div><div class='ctx'> 	/* Qualcomm Atheros QCA9561 */</div><div class='ctx'> 	PHY_ID_MATCH_EXACT(QCA9561_PHY_ID),</div><div class='ctx'> 	.name			= "Qualcomm Atheros QCA9561 built-in PHY",</div><div class='hunk'>@@ -1098,12 +1236,13 @@ static struct phy_driver at803x_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(at803x_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused atheros_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused atheros_tbl[] = {</div><div class='ctx'> 	{ ATH8030_PHY_ID, AT8030_PHY_ID_MASK },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(ATH8031_PHY_ID) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(ATH8032_PHY_ID) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(ATH8035_PHY_ID) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(ATH9331_PHY_ID) },</div><div class='add'>+	{ PHY_ID_MATCH_EXACT(IPQ5018_PHY_ID) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(QCA9561_PHY_ID) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/qcom/qca807x.c b/drivers/net/phy/qcom/qca807x.c<br/>index bd8a51ec0ecd..1be8295a95cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/qca807x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/qca807x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/qca807x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/qcom/qca807x.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/gpio/driver.h&gt;</div><div class='ctx'> #include &lt;linux/sfp.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "../phylib.h"</div><div class='ctx'> #include "qcom.h"</div><div class='ctx'> </div><div class='ctx'> #define QCA807X_CHIP_CONFIGURATION				0x1f</div><div class='hunk'>@@ -123,6 +124,7 @@ struct qca807x_priv {</div><div class='ctx'> 	bool dac_full_amplitude;</div><div class='ctx'> 	bool dac_full_bias_current;</div><div class='ctx'> 	bool dac_disable_bias_current_tweak;</div><div class='add'>+	struct qcom_phy_hw_stats hw_stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int qca807x_cable_test_start(struct phy_device *phydev)</div><div class='hunk'>@@ -376,7 +378,7 @@ static int qca807x_gpio_get(struct gpio_chip *gc, unsigned int offset)</div><div class='ctx'> 	return FIELD_GET(QCA807X_GPIO_FORCE_MODE_MASK, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void qca807x_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)</div><div class='add'>+static int qca807x_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='ctx'> 	struct qca807x_gpio_priv *priv = gpiochip_get_data(gc);</div><div class='ctx'> 	u16 reg;</div><div class='hunk'>@@ -385,18 +387,19 @@ static void qca807x_gpio_set(struct gpio_chip *gc, unsigned int offset, int valu</div><div class='ctx'> 	reg = QCA807X_MMD7_LED_FORCE_CTRL(offset);</div><div class='ctx'> </div><div class='ctx'> 	val = phy_read_mmd(priv-&gt;phy, MDIO_MMD_AN, reg);</div><div class='add'>+	if (val &lt; 0)</div><div class='add'>+		return val;</div><div class='add'>+</div><div class='ctx'> 	val &amp;= ~QCA807X_GPIO_FORCE_MODE_MASK;</div><div class='ctx'> 	val |= QCA807X_GPIO_FORCE_EN;</div><div class='ctx'> 	val |= FIELD_PREP(QCA807X_GPIO_FORCE_MODE_MASK, value);</div><div class='ctx'> </div><div class='del'>-	phy_write_mmd(priv-&gt;phy, MDIO_MMD_AN, reg, val);</div><div class='add'>+	return phy_write_mmd(priv-&gt;phy, MDIO_MMD_AN, reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qca807x_gpio_dir_out(struct gpio_chip *gc, unsigned int offset, int value)</div><div class='ctx'> {</div><div class='del'>-	qca807x_gpio_set(gc, offset, value);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return qca807x_gpio_set(gc, offset, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int qca807x_gpio(struct phy_device *phydev)</div><div class='hunk'>@@ -486,13 +489,13 @@ static int qca807x_read_status(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static int qca807x_phy_package_probe_once(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	struct phy_package_shared *shared = phydev-&gt;shared;</div><div class='del'>-	struct qca807x_shared_priv *priv = shared-&gt;priv;</div><div class='add'>+	struct qca807x_shared_priv *priv = phy_package_get_priv(phydev);</div><div class='add'>+	struct device_node *np = phy_package_get_node(phydev);</div><div class='ctx'> 	unsigned int tx_drive_strength;</div><div class='ctx'> 	const char *package_mode_name;</div><div class='ctx'> </div><div class='ctx'> 	/* Default to 600mw if not defined */</div><div class='del'>-	if (of_property_read_u32(shared-&gt;np, "qcom,tx-drive-strength-milliwatt",</div><div class='add'>+	if (of_property_read_u32(np, "qcom,tx-drive-strength-milliwatt",</div><div class='ctx'> 				 &amp;tx_drive_strength))</div><div class='ctx'> 		tx_drive_strength = 600;</div><div class='ctx'> </div><div class='hunk'>@@ -541,7 +544,7 @@ static int qca807x_phy_package_probe_once(struct phy_device *phydev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;package_mode = PHY_INTERFACE_MODE_NA;</div><div class='del'>-	if (!of_property_read_string(shared-&gt;np, "qcom,package-mode",</div><div class='add'>+	if (!of_property_read_string(np, "qcom,package-mode",</div><div class='ctx'> 				     &amp;package_mode_name)) {</div><div class='ctx'> 		if (!strcasecmp(package_mode_name,</div><div class='ctx'> 				phy_modes(PHY_INTERFACE_MODE_PSGMII)))</div><div class='hunk'>@@ -558,8 +561,7 @@ static int qca807x_phy_package_probe_once(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static int qca807x_phy_package_config_init_once(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	struct phy_package_shared *shared = phydev-&gt;shared;</div><div class='del'>-	struct qca807x_shared_priv *priv = shared-&gt;priv;</div><div class='add'>+	struct qca807x_shared_priv *priv = phy_package_get_priv(phydev);</div><div class='ctx'> 	int val, ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure PHY follow PHY package mode if enforced */</div><div class='hunk'>@@ -644,13 +646,12 @@ exit:</div><div class='ctx'> static int qca807x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct phy_device *phydev = upstream;</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };</div><div class='add'>+	const struct sfp_module_caps *caps;</div><div class='ctx'> 	phy_interface_t iface;</div><div class='ctx'> 	int ret;</div><div class='del'>-	DECLARE_PHY_INTERFACE_MASK(interfaces);</div><div class='ctx'> </div><div class='del'>-	sfp_parse_support(phydev-&gt;sfp_bus, id, support, interfaces);</div><div class='del'>-	iface = sfp_select_interface(phydev-&gt;sfp_bus, support);</div><div class='add'>+	caps = sfp_get_module_caps(phydev-&gt;sfp_bus);</div><div class='add'>+	iface = sfp_select_interface(phydev-&gt;sfp_bus, caps-&gt;link_modes);</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;phydev-&gt;mdio.dev, "%s SFP module inserted\n", phy_modes(iface));</div><div class='ctx'> </div><div class='hunk'>@@ -708,7 +709,6 @@ static int qca807x_probe(struct phy_device *phydev)</div><div class='ctx'> 	struct device_node *node = phydev-&gt;mdio.dev.of_node;</div><div class='ctx'> 	struct qca807x_shared_priv *shared_priv;</div><div class='ctx'> 	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='del'>-	struct phy_package_shared *shared;</div><div class='ctx'> 	struct qca807x_priv *priv;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -722,8 +722,7 @@ static int qca807x_probe(struct phy_device *phydev)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	shared = phydev-&gt;shared;</div><div class='del'>-	shared_priv = shared-&gt;priv;</div><div class='add'>+	shared_priv = phy_package_get_priv(phydev);</div><div class='ctx'> </div><div class='ctx'> 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='ctx'> 	if (!priv)</div><div class='hunk'>@@ -769,12 +768,16 @@ static int qca807x_config_init(struct phy_device *phydev)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = qcom_phy_counter_config(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	control_dac = phy_read_mmd(phydev, MDIO_MMD_AN,</div><div class='ctx'> 				   QCA807X_MMD7_1000BASE_T_POWER_SAVE_PER_CABLE_LENGTH);</div><div class='ctx'> 	control_dac &amp;= ~QCA807X_CONTROL_DAC_MASK;</div><div class='ctx'> 	if (!priv-&gt;dac_full_amplitude)</div><div class='ctx'> 		control_dac |= QCA807X_CONTROL_DAC_DSP_AMPLITUDE;</div><div class='del'>-	if (!priv-&gt;dac_full_amplitude)</div><div class='add'>+	if (!priv-&gt;dac_full_bias_current)</div><div class='ctx'> 		control_dac |= QCA807X_CONTROL_DAC_DSP_BIAS_CURRENT;</div><div class='ctx'> 	if (!priv-&gt;dac_disable_bias_current_tweak)</div><div class='ctx'> 		control_dac |= QCA807X_CONTROL_DAC_BIAS_CURRENT_TWEAK;</div><div class='hunk'>@@ -783,6 +786,22 @@ static int qca807x_config_init(struct phy_device *phydev)</div><div class='ctx'> 			     control_dac);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int qca807x_update_stats(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct qca807x_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return qcom_phy_update_stats(phydev, &amp;priv-&gt;hw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca807x_get_phy_stats(struct phy_device *phydev,</div><div class='add'>+				  struct ethtool_eth_phy_stats *eth_stats,</div><div class='add'>+				  struct ethtool_phy_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct qca807x_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	qcom_phy_get_stats(stats, priv-&gt;hw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver qca807x_drivers[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(PHY_ID_QCA8072),</div><div class='hunk'>@@ -801,6 +820,10 @@ static struct phy_driver qca807x_drivers[] = {</div><div class='ctx'> 		.suspend	= genphy_suspend,</div><div class='ctx'> 		.cable_test_start	= qca807x_cable_test_start,</div><div class='ctx'> 		.cable_test_get_status	= qca808x_cable_test_get_status,</div><div class='add'>+		.update_stats		= qca807x_update_stats,</div><div class='add'>+		.get_phy_stats		= qca807x_get_phy_stats,</div><div class='add'>+		.set_wol		= at8031_set_wol,</div><div class='add'>+		.get_wol		= at803x_get_wol,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(PHY_ID_QCA8075),</div><div class='hunk'>@@ -824,11 +847,15 @@ static struct phy_driver qca807x_drivers[] = {</div><div class='ctx'> 		.led_hw_is_supported = qca807x_led_hw_is_supported,</div><div class='ctx'> 		.led_hw_control_set = qca807x_led_hw_control_set,</div><div class='ctx'> 		.led_hw_control_get = qca807x_led_hw_control_get,</div><div class='add'>+		.update_stats		= qca807x_update_stats,</div><div class='add'>+		.get_phy_stats		= qca807x_get_phy_stats,</div><div class='add'>+		.set_wol		= at8031_set_wol,</div><div class='add'>+		.get_wol		= at803x_get_wol,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> module_phy_driver(qca807x_drivers);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused qca807x_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused qca807x_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(PHY_ID_QCA8072) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(PHY_ID_QCA8075) },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/qcom/qca808x.c b/drivers/net/phy/qcom/qca808x.c<br/>index 5048304ccc9e..8eb51b1a006c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/qca808x.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/qca808x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/qca808x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/qcom/qca808x.c</a></div><div class='hunk'>@@ -93,6 +93,7 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> struct qca808x_priv {</div><div class='ctx'> 	int led_polarity_mode;</div><div class='add'>+	struct qcom_phy_hw_stats hw_stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int qca808x_phy_fast_retrain_config(struct phy_device *phydev)</div><div class='hunk'>@@ -243,6 +244,10 @@ static int qca808x_config_init(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 	qca808x_fill_possible_interfaces(phydev);</div><div class='ctx'> </div><div class='add'>+	ret = qcom_phy_counter_config(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	/* Configure adc threshold as 100mv for the link 10M */</div><div class='ctx'> 	return at803x_debug_reg_mask(phydev, QCA808X_PHY_DEBUG_ADC_THRESHOLD,</div><div class='ctx'> 				     QCA808X_ADC_THRESHOLD_MASK,</div><div class='hunk'>@@ -622,6 +627,22 @@ static int qca808x_led_polarity_set(struct phy_device *phydev, int index,</div><div class='ctx'> 			      active_low ? 0 : QCA808X_LED_ACTIVE_HIGH);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int qca808x_update_stats(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct qca808x_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return qcom_phy_update_stats(phydev, &amp;priv-&gt;hw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca808x_get_phy_stats(struct phy_device *phydev,</div><div class='add'>+				  struct ethtool_eth_phy_stats *eth_stats,</div><div class='add'>+				  struct ethtool_phy_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct qca808x_priv *priv = phydev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	qcom_phy_get_stats(stats, priv-&gt;hw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver qca808x_driver[] = {</div><div class='ctx'> {</div><div class='ctx'> 	/* Qualcomm QCA8081 */</div><div class='hunk'>@@ -633,7 +654,7 @@ static struct phy_driver qca808x_driver[] = {</div><div class='ctx'> 	.handle_interrupt	= at803x_handle_interrupt,</div><div class='ctx'> 	.get_tunable		= at803x_get_tunable,</div><div class='ctx'> 	.set_tunable		= at803x_set_tunable,</div><div class='del'>-	.set_wol		= at803x_set_wol,</div><div class='add'>+	.set_wol		= at8031_set_wol,</div><div class='ctx'> 	.get_wol		= at803x_get_wol,</div><div class='ctx'> 	.get_features		= qca808x_get_features,</div><div class='ctx'> 	.config_aneg		= qca808x_config_aneg,</div><div class='hunk'>@@ -651,11 +672,13 @@ static struct phy_driver qca808x_driver[] = {</div><div class='ctx'> 	.led_hw_control_set	= qca808x_led_hw_control_set,</div><div class='ctx'> 	.led_hw_control_get	= qca808x_led_hw_control_get,</div><div class='ctx'> 	.led_polarity_set	= qca808x_led_polarity_set,</div><div class='add'>+	.update_stats		= qca808x_update_stats,</div><div class='add'>+	.get_phy_stats		= qca808x_get_phy_stats,</div><div class='ctx'> }, };</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(qca808x_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused qca808x_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused qca808x_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(QCA8081_PHY_ID) },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/qcom/qca83xx.c b/drivers/net/phy/qcom/qca83xx.c<br/>index 7a5039920b9f..bc70ed8efd86 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/qca83xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/qca83xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/qca83xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/qcom/qca83xx.c</a></div><div class='hunk'>@@ -259,7 +259,7 @@ static struct phy_driver qca83xx_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(qca83xx_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused qca83xx_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused qca83xx_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(QCA8337_PHY_ID) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(QCA8327_A_PHY_ID) },</div><div class='ctx'> 	{ PHY_ID_MATCH_EXACT(QCA8327_B_PHY_ID) },</div><div class='head'>diff --git a/drivers/net/phy/qcom/qcom-phy-lib.c b/drivers/net/phy/qcom/qcom-phy-lib.c<br/>index d28815ef56bb..965c2bb99a9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/qcom-phy-lib.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/qcom-phy-lib.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/qcom-phy-lib.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/qcom/qcom-phy-lib.c</a></div><div class='hunk'>@@ -115,6 +115,31 @@ int at803x_set_wol(struct phy_device *phydev,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(at803x_set_wol);</div><div class='ctx'> </div><div class='add'>+int at8031_set_wol(struct phy_device *phydev,</div><div class='add'>+		   struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* First setup MAC address and enable WOL interrupt */</div><div class='add'>+	ret = at803x_set_wol(phydev, wol);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_MAGIC)</div><div class='add'>+		/* Enable WOL function for 1588 */</div><div class='add'>+		ret = phy_modify_mmd(phydev, MDIO_MMD_PCS,</div><div class='add'>+				     AT803X_PHY_MMD3_WOL_CTRL,</div><div class='add'>+				     0, AT803X_WOL_EN);</div><div class='add'>+	else</div><div class='add'>+		/* Disable WoL function for 1588 */</div><div class='add'>+		ret = phy_modify_mmd(phydev, MDIO_MMD_PCS,</div><div class='add'>+				     AT803X_PHY_MMD3_WOL_CTRL,</div><div class='add'>+				     AT803X_WOL_EN, 0);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(at8031_set_wol);</div><div class='add'>+</div><div class='ctx'> void at803x_get_wol(struct phy_device *phydev,</div><div class='ctx'> 		    struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='hunk'>@@ -674,3 +699,78 @@ int qca808x_led_reg_blink_set(struct phy_device *phydev, u16 reg,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(qca808x_led_reg_blink_set);</div><div class='add'>+</div><div class='add'>+/* Enable CRC checking for both received and transmitted frames to ensure</div><div class='add'>+ * accurate counter recording. The hardware supports a 32-bit counter,</div><div class='add'>+ * configure the counter to clear after it is read to facilitate the</div><div class='add'>+ * implementation of a 64-bit software counter</div><div class='add'>+ */</div><div class='add'>+int qcom_phy_counter_config(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return phy_set_bits_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_CTRL,</div><div class='add'>+				QCA808X_MMD7_CNT_CTRL_CRC_CHECK_EN |</div><div class='add'>+				QCA808X_MMD7_CNT_CTRL_READ_CLEAR_EN);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qcom_phy_counter_config);</div><div class='add'>+</div><div class='add'>+int qcom_phy_update_stats(struct phy_device *phydev,</div><div class='add'>+			  struct qcom_phy_hw_stats *hw_stats)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 cnt;</div><div class='add'>+</div><div class='add'>+	/* PHY 32-bit counter for RX packets. */</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_PKT_15_0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cnt = ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_PKT_31_16);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cnt |= ret &lt;&lt; 16;</div><div class='add'>+	hw_stats-&gt;rx_pkts += cnt;</div><div class='add'>+</div><div class='add'>+	/* PHY 16-bit counter for RX CRC error packets. */</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_ERR_PKT);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	hw_stats-&gt;rx_err_pkts += ret;</div><div class='add'>+</div><div class='add'>+	/* PHY 32-bit counter for TX packets. */</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_TX_PKT_15_0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cnt = ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_TX_PKT_31_16);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cnt |= ret &lt;&lt; 16;</div><div class='add'>+	hw_stats-&gt;tx_pkts += cnt;</div><div class='add'>+</div><div class='add'>+	/* PHY 16-bit counter for TX CRC error packets. */</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_TX_ERR_PKT);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	hw_stats-&gt;tx_err_pkts += ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qcom_phy_update_stats);</div><div class='add'>+</div><div class='add'>+void qcom_phy_get_stats(struct ethtool_phy_stats *stats,</div><div class='add'>+			struct qcom_phy_hw_stats hw_stats)</div><div class='add'>+{</div><div class='add'>+	stats-&gt;tx_packets = hw_stats.tx_pkts;</div><div class='add'>+	stats-&gt;tx_errors = hw_stats.tx_err_pkts;</div><div class='add'>+	stats-&gt;rx_packets = hw_stats.rx_pkts;</div><div class='add'>+	stats-&gt;rx_errors = hw_stats.rx_err_pkts;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(qcom_phy_get_stats);</div><div class='head'>diff --git a/drivers/net/phy/qcom/qcom.h b/drivers/net/phy/qcom/qcom.h<br/>index 4bb541728846..5071e7149a11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/qcom.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qcom/qcom.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qcom/qcom.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/qcom/qcom.h</a></div><div class='hunk'>@@ -172,6 +172,9 @@</div><div class='ctx'> #define AT803X_LOC_MAC_ADDR_16_31_OFFSET	0x804B</div><div class='ctx'> #define AT803X_LOC_MAC_ADDR_32_47_OFFSET	0x804A</div><div class='ctx'> </div><div class='add'>+#define AT803X_PHY_MMD3_WOL_CTRL		0x8012</div><div class='add'>+#define AT803X_WOL_EN				BIT(5)</div><div class='add'>+</div><div class='ctx'> #define AT803X_DEBUG_ADDR			0x1D</div><div class='ctx'> #define AT803X_DEBUG_DATA			0x1E</div><div class='ctx'> </div><div class='hunk'>@@ -192,6 +195,17 @@</div><div class='ctx'> #define AT803X_MIN_DOWNSHIFT			2</div><div class='ctx'> #define AT803X_MAX_DOWNSHIFT			9</div><div class='ctx'> </div><div class='add'>+#define QCA808X_MMD7_CNT_CTRL			0x8029</div><div class='add'>+#define QCA808X_MMD7_CNT_CTRL_READ_CLEAR_EN	BIT(1)</div><div class='add'>+#define QCA808X_MMD7_CNT_CTRL_CRC_CHECK_EN	BIT(0)</div><div class='add'>+</div><div class='add'>+#define QCA808X_MMD7_CNT_RX_PKT_31_16		0x802a</div><div class='add'>+#define QCA808X_MMD7_CNT_RX_PKT_15_0		0x802b</div><div class='add'>+#define QCA808X_MMD7_CNT_RX_ERR_PKT		0x802c</div><div class='add'>+#define QCA808X_MMD7_CNT_TX_PKT_31_16		0x802d</div><div class='add'>+#define QCA808X_MMD7_CNT_TX_PKT_15_0		0x802e</div><div class='add'>+#define QCA808X_MMD7_CNT_TX_ERR_PKT		0x802f</div><div class='add'>+</div><div class='ctx'> enum stat_access_type {</div><div class='ctx'> 	PHY,</div><div class='ctx'> 	MMD</div><div class='hunk'>@@ -209,12 +223,21 @@ struct at803x_ss_mask {</div><div class='ctx'> 	u8 speed_shift;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct qcom_phy_hw_stats {</div><div class='add'>+	u64 rx_pkts;</div><div class='add'>+	u64 rx_err_pkts;</div><div class='add'>+	u64 tx_pkts;</div><div class='add'>+	u64 tx_err_pkts;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int at803x_debug_reg_read(struct phy_device *phydev, u16 reg);</div><div class='ctx'> int at803x_debug_reg_mask(struct phy_device *phydev, u16 reg,</div><div class='ctx'> 			  u16 clear, u16 set);</div><div class='ctx'> int at803x_debug_reg_write(struct phy_device *phydev, u16 reg, u16 data);</div><div class='ctx'> int at803x_set_wol(struct phy_device *phydev,</div><div class='ctx'> 		   struct ethtool_wolinfo *wol);</div><div class='add'>+int at8031_set_wol(struct phy_device *phydev,</div><div class='add'>+		   struct ethtool_wolinfo *wol);</div><div class='ctx'> void at803x_get_wol(struct phy_device *phydev,</div><div class='ctx'> 		    struct ethtool_wolinfo *wol);</div><div class='ctx'> int at803x_ack_interrupt(struct phy_device *phydev);</div><div class='hunk'>@@ -241,3 +264,8 @@ int qca808x_led_reg_brightness_set(struct phy_device *phydev,</div><div class='ctx'> int qca808x_led_reg_blink_set(struct phy_device *phydev, u16 reg,</div><div class='ctx'> 			      unsigned long *delay_on,</div><div class='ctx'> 			      unsigned long *delay_off);</div><div class='add'>+int qcom_phy_counter_config(struct phy_device *phydev);</div><div class='add'>+int qcom_phy_update_stats(struct phy_device *phydev,</div><div class='add'>+			  struct qcom_phy_hw_stats *hw_stats);</div><div class='add'>+void qcom_phy_get_stats(struct ethtool_phy_stats *stats,</div><div class='add'>+			struct qcom_phy_hw_stats hw_stats);</div><div class='head'>diff --git a/drivers/net/phy/qsemi.c b/drivers/net/phy/qsemi.c<br/>index 30d15f7c9b03..7b70ba6cab66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qsemi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qsemi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qsemi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/qsemi.c</a></div><div class='hunk'>@@ -155,7 +155,7 @@ static struct phy_driver qs6612_driver[] = { {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(qs6612_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused qs6612_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused qs6612_tbl[] = {</div><div class='ctx'> 	{ 0x00181440, 0xfffffff0 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/qt2025.rs b/drivers/net/phy/qt2025.rs<br/>index 1ab065798175..aaaead6512a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qt2025.rs?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/qt2025.rs</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/qt2025.rs?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/qt2025.rs</a></div><div class='hunk'>@@ -12,6 +12,7 @@</div><div class='ctx'> use kernel::c_str;</div><div class='ctx'> use kernel::error::code;</div><div class='ctx'> use kernel::firmware::Firmware;</div><div class='add'>+use kernel::io::poll::read_poll_timeout;</div><div class='ctx'> use kernel::net::phy::{</div><div class='ctx'>     self,</div><div class='ctx'>     reg::{Mmd, C45},</div><div class='hunk'>@@ -19,6 +20,7 @@ use kernel::net::phy::{</div><div class='ctx'> };</div><div class='ctx'> use kernel::prelude::*;</div><div class='ctx'> use kernel::sizes::{SZ_16K, SZ_8K};</div><div class='add'>+use kernel::time::Delta;</div><div class='ctx'> </div><div class='ctx'> kernel::module_phy_driver! {</div><div class='ctx'>     drivers: [PhyQT2025],</div><div class='hunk'>@@ -26,7 +28,7 @@ kernel::module_phy_driver! {</div><div class='ctx'>         phy::DeviceId::new_with_driver::&lt;PhyQT2025&gt;(),</div><div class='ctx'>     ],</div><div class='ctx'>     name: "qt2025_phy",</div><div class='del'>-    author: "FUJITA Tomonori &lt;fujita.tomonori@gmail.com&gt;",</div><div class='add'>+    authors: ["FUJITA Tomonori &lt;fujita.tomonori@gmail.com&gt;"],</div><div class='ctx'>     description: "AMCC QT2025 PHY driver",</div><div class='ctx'>     license: "GPL",</div><div class='ctx'>     firmware: ["qt2025-2.0.3.3.fw"],</div><div class='hunk'>@@ -41,7 +43,7 @@ impl Driver for PhyQT2025 {</div><div class='ctx'> </div><div class='ctx'>     fn probe(dev: &amp;mut phy::Device) -&gt; Result&lt;()&gt; {</div><div class='ctx'>         // Check the hardware revision code.</div><div class='del'>-        // Only 0x3b works with this driver and firmware.</div><div class='add'>+        // Only 0xb3 works with this driver and firmware.</div><div class='ctx'>         let hw_rev = dev.read(C45::new(Mmd::PMAPMD, 0xd001))?;</div><div class='ctx'>         if (hw_rev &gt;&gt; 8) != 0xb3 {</div><div class='ctx'>             return Err(code::ENODEV);</div><div class='hunk'>@@ -93,7 +95,13 @@ impl Driver for PhyQT2025 {</div><div class='ctx'>         // The micro-controller will start running from SRAM.</div><div class='ctx'>         dev.write(C45::new(Mmd::PCS, 0xe854), 0x0040)?;</div><div class='ctx'> </div><div class='del'>-        // TODO: sleep here until the hw becomes ready.</div><div class='add'>+        read_poll_timeout(</div><div class='add'>+            || dev.read(C45::new(Mmd::PCS, 0xd7fd)),</div><div class='add'>+            |val| *val != 0x00 &amp;&amp; *val != 0x10,</div><div class='add'>+            Delta::from_millis(50),</div><div class='add'>+            Delta::from_secs(3),</div><div class='add'>+        )?;</div><div class='add'>+</div><div class='ctx'>         Ok(())</div><div class='ctx'>     }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/realtek/Kconfig b/drivers/net/phy/realtek/Kconfig<br/>new file mode 100644<br/>index 000000000000..b05c2a1e9024<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/realtek/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/realtek/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config REALTEK_PHY</div><div class='add'>+	tristate "Realtek PHYs"</div><div class='add'>+	help</div><div class='add'>+	  Currently supports RTL821x/RTL822x and fast ethernet PHYs</div><div class='add'>+</div><div class='add'>+if REALTEK_PHY</div><div class='add'>+</div><div class='add'>+config REALTEK_PHY_HWMON</div><div class='add'>+	bool "HWMON support for Realtek PHYs"</div><div class='add'>+	depends on HWMON &amp;&amp; !(REALTEK_PHY=y &amp;&amp; HWMON=m)</div><div class='add'>+	help</div><div class='add'>+	  Optional hwmon support for the temperature sensor</div><div class='add'>+</div><div class='add'>+endif # REALTEK_PHY</div><div class='head'>diff --git a/drivers/net/phy/realtek/Makefile b/drivers/net/phy/realtek/Makefile<br/>new file mode 100644<br/>index 000000000000..dd21cf87f2f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/realtek/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/realtek/Makefile</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+realtek-y			+= realtek_main.o</div><div class='add'>+realtek-$(CONFIG_REALTEK_PHY_HWMON) += realtek_hwmon.o</div><div class='add'>+obj-$(CONFIG_REALTEK_PHY)	+= realtek.o</div><div class='head'>diff --git a/drivers/net/phy/realtek/realtek.h b/drivers/net/phy/realtek/realtek.h<br/>new file mode 100644<br/>index 000000000000..a39b44fa18a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/realtek/realtek.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/realtek/realtek.h</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+#ifndef REALTEK_H</div><div class='add'>+#define REALTEK_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+int rtl822x_hwmon_init(struct phy_device *phydev);</div><div class='add'>+</div><div class='add'>+#endif /* REALTEK_H */</div><div class='head'>diff --git a/drivers/net/phy/realtek/realtek_hwmon.c b/drivers/net/phy/realtek/realtek_hwmon.c<br/>new file mode 100644<br/>index 000000000000..ac96e2d1ebe8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/realtek/realtek_hwmon.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/realtek/realtek_hwmon.c</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/*</div><div class='add'>+ * HWMON support for Realtek PHY's</div><div class='add'>+ *</div><div class='add'>+ * Author: Heiner Kallweit &lt;hkallweit1@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/hwmon.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#include "realtek.h"</div><div class='add'>+</div><div class='add'>+#define RTL822X_VND2_TSALRM				0xa662</div><div class='add'>+#define RTL822X_VND2_TSRR				0xbd84</div><div class='add'>+#define RTL822X_VND2_TSSR				0xb54c</div><div class='add'>+</div><div class='add'>+static int rtl822x_hwmon_get_temp(int raw)</div><div class='add'>+{</div><div class='add'>+	if (raw &gt;= 512)</div><div class='add'>+		raw -= 1024;</div><div class='add'>+</div><div class='add'>+	return 1000 * raw / 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl822x_hwmon_read(struct device *dev, enum hwmon_sensor_types type,</div><div class='add'>+			      u32 attr, int channel, long *val)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = dev_get_drvdata(dev);</div><div class='add'>+	int raw;</div><div class='add'>+</div><div class='add'>+	switch (attr) {</div><div class='add'>+	case hwmon_temp_input:</div><div class='add'>+		raw = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSRR) &amp; 0x3ff;</div><div class='add'>+		*val = rtl822x_hwmon_get_temp(raw);</div><div class='add'>+		break;</div><div class='add'>+	case hwmon_temp_max:</div><div class='add'>+		/* Chip reduces speed to 1G if threshold is exceeded */</div><div class='add'>+		raw = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSSR) &gt;&gt; 6;</div><div class='add'>+		*val = rtl822x_hwmon_get_temp(raw);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct hwmon_ops rtl822x_hwmon_ops = {</div><div class='add'>+	.visible = 0444,</div><div class='add'>+	.read = rtl822x_hwmon_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hwmon_channel_info * const rtl822x_hwmon_info[] = {</div><div class='add'>+	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX),</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hwmon_chip_info rtl822x_hwmon_chip_info = {</div><div class='add'>+	.ops = &amp;rtl822x_hwmon_ops,</div><div class='add'>+	.info = rtl822x_hwmon_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int rtl822x_hwmon_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct device *hwdev, *dev = &amp;phydev-&gt;mdio.dev;</div><div class='add'>+</div><div class='add'>+	/* Ensure over-temp alarm is reset. */</div><div class='add'>+	phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, RTL822X_VND2_TSALRM, 3);</div><div class='add'>+</div><div class='add'>+	hwdev = devm_hwmon_device_register_with_info(dev, NULL, phydev,</div><div class='add'>+						     &amp;rtl822x_hwmon_chip_info,</div><div class='add'>+						     NULL);</div><div class='add'>+	return PTR_ERR_OR_ZERO(hwdev);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek/realtek_main.c<br/>index f65d7f1f348e..67ecf3d4af2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/realtek.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/realtek.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/realtek/realtek_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/realtek/realtek_main.c</a></div><div class='hunk'>@@ -8,30 +8,79 @@</div><div class='ctx'>  * Copyright (c) 2004 Freescale Semiconductor, Inc.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/ethtool_netlink.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/pm_wakeirq.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='ctx'> </div><div class='del'>-#define RTL821x_PHYSR				0x11</div><div class='del'>-#define RTL821x_PHYSR_DUPLEX			BIT(13)</div><div class='del'>-#define RTL821x_PHYSR_SPEED			GENMASK(15, 14)</div><div class='add'>+#include "realtek.h"</div><div class='add'>+</div><div class='add'>+#define RTL8201F_IER				0x13</div><div class='add'>+</div><div class='add'>+#define RTL8201F_ISR				0x1e</div><div class='add'>+#define RTL8201F_ISR_ANERR			BIT(15)</div><div class='add'>+#define RTL8201F_ISR_DUPLEX			BIT(13)</div><div class='add'>+#define RTL8201F_ISR_LINK			BIT(11)</div><div class='add'>+#define RTL8201F_ISR_MASK			(RTL8201F_ISR_ANERR | \</div><div class='add'>+						 RTL8201F_ISR_DUPLEX | \</div><div class='add'>+						 RTL8201F_ISR_LINK)</div><div class='ctx'> </div><div class='ctx'> #define RTL821x_INER				0x12</div><div class='ctx'> #define RTL8211B_INER_INIT			0x6400</div><div class='ctx'> #define RTL8211E_INER_LINK_STATUS		BIT(10)</div><div class='add'>+#define RTL8211F_INER_PME			BIT(7)</div><div class='ctx'> #define RTL8211F_INER_LINK_STATUS		BIT(4)</div><div class='ctx'> </div><div class='ctx'> #define RTL821x_INSR				0x13</div><div class='ctx'> </div><div class='ctx'> #define RTL821x_EXT_PAGE_SELECT			0x1e</div><div class='add'>+</div><div class='ctx'> #define RTL821x_PAGE_SELECT			0x1f</div><div class='add'>+#define RTL821x_SET_EXT_PAGE			0x07</div><div class='add'>+</div><div class='add'>+/* RTL8211E extension page 44/0x2c */</div><div class='add'>+#define RTL8211E_LEDCR_EXT_PAGE			0x2c</div><div class='add'>+#define RTL8211E_LEDCR1				0x1a</div><div class='add'>+#define RTL8211E_LEDCR1_ACT_TXRX		BIT(4)</div><div class='add'>+#define RTL8211E_LEDCR1_MASK			BIT(4)</div><div class='add'>+#define RTL8211E_LEDCR1_SHIFT			1</div><div class='add'>+</div><div class='add'>+#define RTL8211E_LEDCR2				0x1c</div><div class='add'>+#define RTL8211E_LEDCR2_LINK_1000		BIT(2)</div><div class='add'>+#define RTL8211E_LEDCR2_LINK_100		BIT(1)</div><div class='add'>+#define RTL8211E_LEDCR2_LINK_10			BIT(0)</div><div class='add'>+#define RTL8211E_LEDCR2_MASK			GENMASK(2, 0)</div><div class='add'>+#define RTL8211E_LEDCR2_SHIFT			4</div><div class='add'>+</div><div class='add'>+/* RTL8211E extension page 164/0xa4 */</div><div class='add'>+#define RTL8211E_RGMII_EXT_PAGE			0xa4</div><div class='add'>+#define RTL8211E_RGMII_DELAY			0x1c</div><div class='add'>+#define RTL8211E_CTRL_DELAY			BIT(13)</div><div class='add'>+#define RTL8211E_TX_DELAY			BIT(12)</div><div class='add'>+#define RTL8211E_RX_DELAY			BIT(11)</div><div class='add'>+#define RTL8211E_DELAY_MASK			GENMASK(13, 11)</div><div class='ctx'> </div><div class='add'>+/* RTL8211F PHY configuration */</div><div class='add'>+#define RTL8211F_PHYCR_PAGE			0xa43</div><div class='ctx'> #define RTL8211F_PHYCR1				0x18</div><div class='add'>+#define RTL8211F_ALDPS_PLL_OFF			BIT(1)</div><div class='add'>+#define RTL8211F_ALDPS_ENABLE			BIT(2)</div><div class='add'>+#define RTL8211F_ALDPS_XTAL_OFF			BIT(12)</div><div class='add'>+</div><div class='ctx'> #define RTL8211F_PHYCR2				0x19</div><div class='add'>+#define RTL8211F_CLKOUT_EN			BIT(0)</div><div class='add'>+#define RTL8211F_PHYCR2_PHY_EEE_ENABLE		BIT(5)</div><div class='add'>+</div><div class='add'>+#define RTL8211F_INSR_PAGE			0xa43</div><div class='ctx'> #define RTL8211F_INSR				0x1d</div><div class='ctx'> </div><div class='add'>+/* RTL8211F LED configuration */</div><div class='add'>+#define RTL8211F_LEDCR_PAGE			0xd04</div><div class='ctx'> #define RTL8211F_LEDCR				0x10</div><div class='ctx'> #define RTL8211F_LEDCR_MODE			BIT(15)</div><div class='ctx'> #define RTL8211F_LEDCR_ACT_TXRX			BIT(4)</div><div class='hunk'>@@ -41,27 +90,36 @@</div><div class='ctx'> #define RTL8211F_LEDCR_MASK			GENMASK(4, 0)</div><div class='ctx'> #define RTL8211F_LEDCR_SHIFT			5</div><div class='ctx'> </div><div class='del'>-#define RTL8211F_TX_DELAY			BIT(8)</div><div class='del'>-#define RTL8211F_RX_DELAY			BIT(3)</div><div class='add'>+/* RTL8211F(D)(I)-VD-CG CLKOUT configuration is specified via magic values</div><div class='add'>+ * to undocumented register pages. The names here do not reflect the datasheet.</div><div class='add'>+ * Unlike other PHY models, CLKOUT configuration does not go through PHYCR2.</div><div class='add'>+ */</div><div class='add'>+#define RTL8211FVD_CLKOUT_PAGE			0xd05</div><div class='add'>+#define RTL8211FVD_CLKOUT_REG			0x11</div><div class='add'>+#define RTL8211FVD_CLKOUT_EN			BIT(8)</div><div class='ctx'> </div><div class='del'>-#define RTL8211F_ALDPS_PLL_OFF			BIT(1)</div><div class='del'>-#define RTL8211F_ALDPS_ENABLE			BIT(2)</div><div class='del'>-#define RTL8211F_ALDPS_XTAL_OFF			BIT(12)</div><div class='add'>+/* RTL8211F RGMII configuration */</div><div class='add'>+#define RTL8211F_RGMII_PAGE			0xd08</div><div class='ctx'> </div><div class='del'>-#define RTL8211E_CTRL_DELAY			BIT(13)</div><div class='del'>-#define RTL8211E_TX_DELAY			BIT(12)</div><div class='del'>-#define RTL8211E_RX_DELAY			BIT(11)</div><div class='add'>+#define RTL8211F_TXCR				0x11</div><div class='add'>+#define RTL8211F_TX_DELAY			BIT(8)</div><div class='ctx'> </div><div class='del'>-#define RTL8211F_CLKOUT_EN			BIT(0)</div><div class='add'>+#define RTL8211F_RXCR				0x15</div><div class='add'>+#define RTL8211F_RX_DELAY			BIT(3)</div><div class='ctx'> </div><div class='del'>-#define RTL8201F_ISR				0x1e</div><div class='del'>-#define RTL8201F_ISR_ANERR			BIT(15)</div><div class='del'>-#define RTL8201F_ISR_DUPLEX			BIT(13)</div><div class='del'>-#define RTL8201F_ISR_LINK			BIT(11)</div><div class='del'>-#define RTL8201F_ISR_MASK			(RTL8201F_ISR_ANERR | \</div><div class='del'>-						 RTL8201F_ISR_DUPLEX | \</div><div class='del'>-						 RTL8201F_ISR_LINK)</div><div class='del'>-#define RTL8201F_IER				0x13</div><div class='add'>+/* RTL8211F WOL settings */</div><div class='add'>+#define RTL8211F_WOL_PAGE		0xd8a</div><div class='add'>+#define RTL8211F_WOL_SETTINGS_EVENTS		16</div><div class='add'>+#define RTL8211F_WOL_EVENT_MAGIC		BIT(12)</div><div class='add'>+#define RTL8211F_WOL_RST_RMSQ		17</div><div class='add'>+#define RTL8211F_WOL_RG_RSTB			BIT(15)</div><div class='add'>+#define RTL8211F_WOL_RMSQ			0x1fff</div><div class='add'>+</div><div class='add'>+/* RTL8211F Unique phyiscal and multicast address (WOL) */</div><div class='add'>+#define RTL8211F_PHYSICAL_ADDR_PAGE		0xd8c</div><div class='add'>+#define RTL8211F_PHYSICAL_ADDR_WORD0		16</div><div class='add'>+#define RTL8211F_PHYSICAL_ADDR_WORD1		17</div><div class='add'>+#define RTL8211F_PHYSICAL_ADDR_WORD2		18</div><div class='ctx'> </div><div class='ctx'> #define RTL822X_VND1_SERDES_OPTION			0x697a</div><div class='ctx'> #define RTL822X_VND1_SERDES_OPTION_MODE_MASK		GENMASK(5, 0)</div><div class='hunk'>@@ -76,9 +134,33 @@</div><div class='ctx'> /* RTL822X_VND2_XXXXX registers are only accessible when phydev-&gt;is_c45</div><div class='ctx'>  * is set, they cannot be accessed by C45-over-C22.</div><div class='ctx'>  */</div><div class='del'>-#define RTL822X_VND2_GBCR				0xa412</div><div class='add'>+#define RTL822X_VND2_C22_REG(reg)		(0xa400 + 2 * (reg))</div><div class='add'>+</div><div class='add'>+#define RTL8221B_VND2_INER			0xa4d2</div><div class='add'>+#define RTL8221B_VND2_INER_LINK_STATUS		BIT(4)</div><div class='add'>+</div><div class='add'>+#define RTL8221B_VND2_INSR			0xa4d4</div><div class='ctx'> </div><div class='del'>-#define RTL822X_VND2_GANLPAR				0xa414</div><div class='add'>+#define RTL8224_MII_RTCT			0x11</div><div class='add'>+#define RTL8224_MII_RTCT_ENABLE			BIT(0)</div><div class='add'>+#define RTL8224_MII_RTCT_PAIR_A			BIT(4)</div><div class='add'>+#define RTL8224_MII_RTCT_PAIR_B			BIT(5)</div><div class='add'>+#define RTL8224_MII_RTCT_PAIR_C			BIT(6)</div><div class='add'>+#define RTL8224_MII_RTCT_PAIR_D			BIT(7)</div><div class='add'>+#define RTL8224_MII_RTCT_DONE			BIT(15)</div><div class='add'>+</div><div class='add'>+#define RTL8224_MII_SRAM_ADDR			0x1b</div><div class='add'>+#define RTL8224_MII_SRAM_DATA			0x1c</div><div class='add'>+</div><div class='add'>+#define RTL8224_SRAM_RTCT_FAULT(pair)		(0x8026 + (pair) * 4)</div><div class='add'>+#define RTL8224_SRAM_RTCT_FAULT_BUSY		BIT(0)</div><div class='add'>+#define RTL8224_SRAM_RTCT_FAULT_OPEN		BIT(3)</div><div class='add'>+#define RTL8224_SRAM_RTCT_FAULT_SAME_SHORT	BIT(4)</div><div class='add'>+#define RTL8224_SRAM_RTCT_FAULT_OK		BIT(5)</div><div class='add'>+#define RTL8224_SRAM_RTCT_FAULT_DONE		BIT(6)</div><div class='add'>+#define RTL8224_SRAM_RTCT_FAULT_CROSS_SHORT	BIT(7)</div><div class='add'>+</div><div class='add'>+#define RTL8224_SRAM_RTCT_LEN(pair)		(0x8028 + (pair) * 4)</div><div class='ctx'> </div><div class='ctx'> #define RTL8366RB_POWER_SAVE			0x15</div><div class='ctx'> #define RTL8366RB_POWER_SAVE_ON			BIT(12)</div><div class='hunk'>@@ -93,24 +175,37 @@</div><div class='ctx'> #define RTL_VND2_PHYSR_MASTER			BIT(11)</div><div class='ctx'> #define RTL_VND2_PHYSR_SPEED_MASK		(RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)</div><div class='ctx'> </div><div class='add'>+#define	RTL_MDIO_PCS_EEE_ABLE			0xa5c4</div><div class='add'>+#define	RTL_MDIO_AN_EEE_ADV			0xa5d0</div><div class='add'>+#define	RTL_MDIO_AN_EEE_LPABLE			0xa5d2</div><div class='add'>+#define	RTL_MDIO_AN_10GBT_CTRL			0xa5d4</div><div class='add'>+#define	RTL_MDIO_AN_10GBT_STAT			0xa5d6</div><div class='add'>+#define	RTL_MDIO_PMA_SPEED			0xa616</div><div class='add'>+#define	RTL_MDIO_AN_EEE_LPABLE2			0xa6d0</div><div class='add'>+#define	RTL_MDIO_AN_EEE_ADV2			0xa6d4</div><div class='add'>+#define	RTL_MDIO_PCS_EEE_ABLE2			0xa6ec</div><div class='add'>+</div><div class='ctx'> #define RTL_GENERIC_PHYID			0x001cc800</div><div class='ctx'> #define RTL_8211FVD_PHYID			0x001cc878</div><div class='ctx'> #define RTL_8221B				0x001cc840</div><div class='ctx'> #define RTL_8221B_VB_CG				0x001cc849</div><div class='del'>-#define RTL_8221B_VN_CG				0x001cc84a</div><div class='add'>+#define RTL_8221B_VM_CG				0x001cc84a</div><div class='ctx'> #define RTL_8251B				0x001cc862</div><div class='add'>+#define RTL_8261C				0x001cc890</div><div class='ctx'> </div><div class='del'>-#define RTL8211F_LED_COUNT			3</div><div class='add'>+/* RTL8211E and RTL8211F support up to three LEDs */</div><div class='add'>+#define RTL8211x_LED_COUNT			3</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("Realtek PHY driver");</div><div class='ctx'> MODULE_AUTHOR("Johnson Leung");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> struct rtl821x_priv {</div><div class='del'>-	u16 phycr1;</div><div class='del'>-	u16 phycr2;</div><div class='del'>-	bool has_phycr2;</div><div class='add'>+	bool enable_aldps;</div><div class='add'>+	bool disable_clk_out;</div><div class='ctx'> 	struct clk *clk;</div><div class='add'>+	/* rtl8211f */</div><div class='add'>+	u16 iner;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int rtl821x_read_page(struct phy_device *phydev)</div><div class='hunk'>@@ -123,12 +218,40 @@ static int rtl821x_write_page(struct phy_device *phydev, int page)</div><div class='ctx'> 	return __phy_write(phydev, RTL821x_PAGE_SELECT, page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rtl821x_read_ext_page(struct phy_device *phydev, u16 ext_page,</div><div class='add'>+				 u32 regnum)</div><div class='add'>+{</div><div class='add'>+	int oldpage, ret = 0;</div><div class='add'>+</div><div class='add'>+	oldpage = phy_select_page(phydev, RTL821x_SET_EXT_PAGE);</div><div class='add'>+	if (oldpage &gt;= 0) {</div><div class='add'>+		ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, ext_page);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			ret = __phy_read(phydev, regnum);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return phy_restore_page(phydev, oldpage, ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl821x_modify_ext_page(struct phy_device *phydev, u16 ext_page,</div><div class='add'>+				   u32 regnum, u16 mask, u16 set)</div><div class='add'>+{</div><div class='add'>+	int oldpage, ret = 0;</div><div class='add'>+</div><div class='add'>+	oldpage = phy_select_page(phydev, RTL821x_SET_EXT_PAGE);</div><div class='add'>+	if (oldpage &gt;= 0) {</div><div class='add'>+		ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, ext_page);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			ret = __phy_modify(phydev, regnum, mask, set);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return phy_restore_page(phydev, oldpage, ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rtl821x_probe(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='ctx'> 	struct rtl821x_priv *priv;</div><div class='del'>-	u32 phy_id = phydev-&gt;drv-&gt;phy_id;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='ctx'> 	if (!priv)</div><div class='hunk'>@@ -139,28 +262,42 @@ static int rtl821x_probe(struct phy_device *phydev)</div><div class='ctx'> 		return dev_err_probe(dev, PTR_ERR(priv-&gt;clk),</div><div class='ctx'> 				     "failed to get phy clock\n");</div><div class='ctx'> </div><div class='del'>-	ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1);</div><div class='add'>+	priv-&gt;enable_aldps = of_property_read_bool(dev-&gt;of_node,</div><div class='add'>+						   "realtek,aldps-enable");</div><div class='add'>+	priv-&gt;disable_clk_out = of_property_read_bool(dev-&gt;of_node,</div><div class='add'>+						      "realtek,clkout-disable");</div><div class='add'>+</div><div class='add'>+	phydev-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8211f_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = rtl821x_probe(phydev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;phycr1 = ret &amp; (RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF);</div><div class='del'>-	if (of_property_read_bool(dev-&gt;of_node, "realtek,aldps-enable"))</div><div class='del'>-		priv-&gt;phycr1 |= RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF;</div><div class='del'>-</div><div class='del'>-	priv-&gt;has_phycr2 = !(phy_id == RTL_8211FVD_PHYID);</div><div class='del'>-	if (priv-&gt;has_phycr2) {</div><div class='del'>-		ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR2);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='add'>+	/* Disable all PME events */</div><div class='add'>+	ret = phy_write_paged(phydev, RTL8211F_WOL_PAGE,</div><div class='add'>+			      RTL8211F_WOL_SETTINGS_EVENTS, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-		priv-&gt;phycr2 = ret &amp; RTL8211F_CLKOUT_EN;</div><div class='del'>-		if (of_property_read_bool(dev-&gt;of_node, "realtek,clkout-disable"))</div><div class='del'>-			priv-&gt;phycr2 &amp;= ~RTL8211F_CLKOUT_EN;</div><div class='add'>+	/* Mark this PHY as wakeup capable and register the interrupt as a</div><div class='add'>+	 * wakeup IRQ if the PHY is marked as a wakeup source in firmware,</div><div class='add'>+	 * and the interrupt is valid.</div><div class='add'>+	 */</div><div class='add'>+	if (device_property_read_bool(dev, "wakeup-source") &amp;&amp;</div><div class='add'>+	    phy_interrupt_is_valid(phydev)) {</div><div class='add'>+		device_set_wakeup_capable(dev, true);</div><div class='add'>+		devm_pm_set_wake_irq(dev, phydev-&gt;irq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phydev-&gt;priv = priv;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rtl8201_ack_interrupt(struct phy_device *phydev)</div><div class='hunk'>@@ -185,7 +322,7 @@ static int rtl8211f_ack_interrupt(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);</div><div class='add'>+	err = phy_read_paged(phydev, RTL8211F_INSR_PAGE, RTL8211F_INSR);</div><div class='ctx'> </div><div class='ctx'> 	return (err &lt; 0) ? err : 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -260,6 +397,7 @@ static int rtl8211e_config_intr(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static int rtl8211f_config_intr(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='add'>+	struct rtl821x_priv *priv = phydev-&gt;priv;</div><div class='ctx'> 	u16 val;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -270,8 +408,10 @@ static int rtl8211f_config_intr(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> 		val = RTL8211F_INER_LINK_STATUS;</div><div class='ctx'> 		err = phy_write_paged(phydev, 0xa42, RTL821x_INER, val);</div><div class='add'>+		if (err == 0)</div><div class='add'>+			priv-&gt;iner = val;</div><div class='ctx'> 	} else {</div><div class='del'>-		val = 0;</div><div class='add'>+		priv-&gt;iner = val = 0;</div><div class='ctx'> 		err = phy_write_paged(phydev, 0xa42, RTL821x_INER, val);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='hunk'>@@ -328,18 +468,85 @@ static irqreturn_t rtl8211f_handle_interrupt(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int irq_status;</div><div class='ctx'> </div><div class='del'>-	irq_status = phy_read_paged(phydev, 0xa43, RTL8211F_INSR);</div><div class='add'>+	irq_status = phy_read_paged(phydev, RTL8211F_INSR_PAGE, RTL8211F_INSR);</div><div class='ctx'> 	if (irq_status &lt; 0) {</div><div class='ctx'> 		phy_error(phydev);</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!(irq_status &amp; RTL8211F_INER_LINK_STATUS))</div><div class='del'>-		return IRQ_NONE;</div><div class='add'>+	if (irq_status &amp; RTL8211F_INER_LINK_STATUS) {</div><div class='add'>+		phy_trigger_machine(phydev);</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	phy_trigger_machine(phydev);</div><div class='add'>+	if (irq_status &amp; RTL8211F_INER_PME) {</div><div class='add'>+		pm_wakeup_event(&amp;phydev-&gt;mdio.dev, 0);</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return IRQ_HANDLED;</div><div class='add'>+	return IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8211f_get_wol(struct phy_device *dev, struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	int wol_events;</div><div class='add'>+</div><div class='add'>+	/* If the PHY is not capable of waking the system, then WoL can not</div><div class='add'>+	 * be supported.</div><div class='add'>+	 */</div><div class='add'>+	if (!device_can_wakeup(&amp;dev-&gt;mdio.dev)) {</div><div class='add'>+		wol-&gt;supported = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wol-&gt;supported = WAKE_MAGIC;</div><div class='add'>+</div><div class='add'>+	wol_events = phy_read_paged(dev, RTL8211F_WOL_PAGE, RTL8211F_WOL_SETTINGS_EVENTS);</div><div class='add'>+	if (wol_events &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (wol_events &amp; RTL8211F_WOL_EVENT_MAGIC)</div><div class='add'>+		wol-&gt;wolopts = WAKE_MAGIC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8211f_set_wol(struct phy_device *dev, struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	const u8 *mac_addr = dev-&gt;attached_dev-&gt;dev_addr;</div><div class='add'>+	int oldpage;</div><div class='add'>+</div><div class='add'>+	if (!device_can_wakeup(&amp;dev-&gt;mdio.dev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	oldpage = phy_save_page(dev);</div><div class='add'>+	if (oldpage &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_MAGIC) {</div><div class='add'>+		/* Store the device address for the magic packet */</div><div class='add'>+		rtl821x_write_page(dev, RTL8211F_PHYSICAL_ADDR_PAGE);</div><div class='add'>+		__phy_write(dev, RTL8211F_PHYSICAL_ADDR_WORD0, mac_addr[1] &lt;&lt; 8 | (mac_addr[0]));</div><div class='add'>+		__phy_write(dev, RTL8211F_PHYSICAL_ADDR_WORD1, mac_addr[3] &lt;&lt; 8 | (mac_addr[2]));</div><div class='add'>+		__phy_write(dev, RTL8211F_PHYSICAL_ADDR_WORD2, mac_addr[5] &lt;&lt; 8 | (mac_addr[4]));</div><div class='add'>+</div><div class='add'>+		/* Enable magic packet matching */</div><div class='add'>+		rtl821x_write_page(dev, RTL8211F_WOL_PAGE);</div><div class='add'>+		__phy_write(dev, RTL8211F_WOL_SETTINGS_EVENTS, RTL8211F_WOL_EVENT_MAGIC);</div><div class='add'>+		/* Set the maximum packet size, and assert WoL reset */</div><div class='add'>+		__phy_write(dev, RTL8211F_WOL_RST_RMSQ, RTL8211F_WOL_RMSQ);</div><div class='add'>+	} else {</div><div class='add'>+		/* Disable magic packet matching */</div><div class='add'>+		rtl821x_write_page(dev, RTL8211F_WOL_PAGE);</div><div class='add'>+		__phy_write(dev, RTL8211F_WOL_SETTINGS_EVENTS, 0);</div><div class='add'>+</div><div class='add'>+		/* Place WoL in reset */</div><div class='add'>+		__phy_clear_bits(dev, RTL8211F_WOL_RST_RMSQ,</div><div class='add'>+				 RTL8211F_WOL_RG_RSTB);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	device_set_wakeup_enable(&amp;dev-&gt;mdio.dev, !!(wol-&gt;wolopts &amp; WAKE_MAGIC));</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	return phy_restore_page(dev, oldpage, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rtl8211_config_aneg(struct phy_device *phydev)</div><div class='hunk'>@@ -371,22 +578,11 @@ static int rtl8211c_config_init(struct phy_device *phydev)</div><div class='ctx'> 			    CTL1000_ENABLE_MASTER | CTL1000_AS_MASTER);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl8211f_config_init(struct phy_device *phydev)</div><div class='add'>+static int rtl8211f_config_rgmii_delay(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	struct rtl821x_priv *priv = phydev-&gt;priv;</div><div class='del'>-	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='ctx'> 	u16 val_txdly, val_rxdly;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,</div><div class='del'>-				       RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF,</div><div class='del'>-				       priv-&gt;phycr1);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_err(dev, "aldps mode  configuration failed: %pe\n",</div><div class='del'>-			ERR_PTR(ret));</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	switch (phydev-&gt;interface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII:</div><div class='ctx'> 		val_txdly = 0;</div><div class='hunk'>@@ -412,49 +608,122 @@ static int rtl8211f_config_init(struct phy_device *phydev)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = phy_modify_paged_changed(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY,</div><div class='add'>+	ret = phy_modify_paged_changed(phydev, RTL8211F_RGMII_PAGE,</div><div class='add'>+				       RTL8211F_TXCR, RTL8211F_TX_DELAY,</div><div class='ctx'> 				       val_txdly);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		dev_err(dev, "Failed to update the TX delay register\n");</div><div class='add'>+		phydev_err(phydev, "Failed to update the TX delay register: %pe\n",</div><div class='add'>+			   ERR_PTR(ret));</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	} else if (ret) {</div><div class='del'>-		dev_dbg(dev,</div><div class='del'>-			"%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n",</div><div class='del'>-			val_txdly ? "Enabling" : "Disabling");</div><div class='add'>+		phydev_dbg(phydev,</div><div class='add'>+			   "%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n",</div><div class='add'>+			   str_enable_disable(val_txdly));</div><div class='ctx'> 	} else {</div><div class='del'>-		dev_dbg(dev,</div><div class='del'>-			"2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n",</div><div class='del'>-			val_txdly ? "enabled" : "disabled");</div><div class='add'>+		phydev_dbg(phydev,</div><div class='add'>+			   "2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n",</div><div class='add'>+			   str_enabled_disabled(val_txdly));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = phy_modify_paged_changed(phydev, 0xd08, 0x15, RTL8211F_RX_DELAY,</div><div class='add'>+	ret = phy_modify_paged_changed(phydev, RTL8211F_RGMII_PAGE,</div><div class='add'>+				       RTL8211F_RXCR, RTL8211F_RX_DELAY,</div><div class='ctx'> 				       val_rxdly);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		dev_err(dev, "Failed to update the RX delay register\n");</div><div class='add'>+		phydev_err(phydev, "Failed to update the RX delay register: %pe\n",</div><div class='add'>+			   ERR_PTR(ret));</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	} else if (ret) {</div><div class='del'>-		dev_dbg(dev,</div><div class='del'>-			"%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n",</div><div class='del'>-			val_rxdly ? "Enabling" : "Disabling");</div><div class='add'>+		phydev_dbg(phydev,</div><div class='add'>+			   "%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n",</div><div class='add'>+			   str_enable_disable(val_rxdly));</div><div class='ctx'> 	} else {</div><div class='del'>-		dev_dbg(dev,</div><div class='del'>-			"2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n",</div><div class='del'>-			val_rxdly ? "enabled" : "disabled");</div><div class='add'>+		phydev_dbg(phydev,</div><div class='add'>+			   "2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n",</div><div class='add'>+			   str_enabled_disabled(val_rxdly));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;has_phycr2) {</div><div class='del'>-		ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,</div><div class='del'>-				       RTL8211F_CLKOUT_EN, priv-&gt;phycr2);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			dev_err(dev, "clkout configuration failed: %pe\n",</div><div class='del'>-				ERR_PTR(ret));</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8211f_config_clk_out(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct rtl821x_priv *priv = phydev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* The value is preserved if the device tree property is absent */</div><div class='add'>+	if (!priv-&gt;disable_clk_out)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;drv-&gt;phy_id == RTL_8211FVD_PHYID)</div><div class='add'>+		ret = phy_modify_paged(phydev, RTL8211FVD_CLKOUT_PAGE,</div><div class='add'>+				       RTL8211FVD_CLKOUT_REG,</div><div class='add'>+				       RTL8211FVD_CLKOUT_EN, 0);</div><div class='add'>+	else</div><div class='add'>+		ret = phy_modify_paged(phydev, RTL8211F_PHYCR_PAGE,</div><div class='add'>+				       RTL8211F_PHYCR2, RTL8211F_CLKOUT_EN, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return genphy_soft_reset(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Advance Link Down Power Saving (ALDPS) mode changes crystal/clock behaviour,</div><div class='add'>+ * which causes the RXC clock signal to stop for tens to hundreds of</div><div class='add'>+ * milliseconds.</div><div class='add'>+ *</div><div class='add'>+ * Some MACs need the RXC clock to support their internal RX logic, so ALDPS is</div><div class='add'>+ * only enabled based on an opt-in device tree property.</div><div class='add'>+ */</div><div class='add'>+static int rtl8211f_config_aldps(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct rtl821x_priv *priv = phydev-&gt;priv;</div><div class='add'>+	u16 mask = RTL8211F_ALDPS_PLL_OFF |</div><div class='add'>+		   RTL8211F_ALDPS_ENABLE |</div><div class='add'>+		   RTL8211F_ALDPS_XTAL_OFF;</div><div class='ctx'> </div><div class='del'>-		return genphy_soft_reset(phydev);</div><div class='add'>+	/* The value is preserved if the device tree property is absent */</div><div class='add'>+	if (!priv-&gt;enable_aldps)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return phy_modify_paged(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PHYCR1,</div><div class='add'>+				mask, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8211f_config_phy_eee(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	/* RTL8211FVD has no PHYCR2 register */</div><div class='add'>+	if (phydev-&gt;drv-&gt;phy_id == RTL_8211FVD_PHYID)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Disable PHY-mode EEE so LPI is passed to the MAC */</div><div class='add'>+	return phy_modify_paged(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PHYCR2,</div><div class='add'>+				RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8211f_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;phydev-&gt;mdio.dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = rtl8211f_config_aldps(phydev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "aldps mode configuration failed: %pe\n",</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	ret = rtl8211f_config_rgmii_delay(phydev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = rtl8211f_config_clk_out(phydev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "clkout configuration failed: %pe\n",</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rtl8211f_config_phy_eee(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rtl821x_suspend(struct phy_device *phydev)</div><div class='hunk'>@@ -474,6 +743,52 @@ static int rtl821x_suspend(struct phy_device *phydev)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rtl8211f_suspend(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	u16 wol_rst;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = rtl821x_suspend(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* If a PME event is enabled, then configure the interrupt for</div><div class='add'>+	 * PME events only, disabling link interrupt. We avoid switching</div><div class='add'>+	 * to PMEB mode as we don't have a status bit for that.</div><div class='add'>+	 */</div><div class='add'>+	if (device_may_wakeup(&amp;phydev-&gt;mdio.dev)) {</div><div class='add'>+		ret = phy_write_paged(phydev, 0xa42, RTL821x_INER,</div><div class='add'>+				      RTL8211F_INER_PME);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		/* Read the INSR to clear any pending interrupt */</div><div class='add'>+		phy_read_paged(phydev, RTL8211F_INSR_PAGE, RTL8211F_INSR);</div><div class='add'>+</div><div class='add'>+		/* Reset the WoL to ensure that an event is picked up.</div><div class='add'>+		 * Unless we do this, even if we receive another packet,</div><div class='add'>+		 * we may not have a PME interrupt raised.</div><div class='add'>+		 */</div><div class='add'>+		ret = phy_read_paged(phydev, RTL8211F_WOL_PAGE,</div><div class='add'>+				     RTL8211F_WOL_RST_RMSQ);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		wol_rst = ret &amp; ~RTL8211F_WOL_RG_RSTB;</div><div class='add'>+		ret = phy_write_paged(phydev, RTL8211F_WOL_PAGE,</div><div class='add'>+				      RTL8211F_WOL_RST_RMSQ, wol_rst);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		wol_rst |= RTL8211F_WOL_RG_RSTB;</div><div class='add'>+		ret = phy_write_paged(phydev, RTL8211F_WOL_PAGE,</div><div class='add'>+				      RTL8211F_WOL_RST_RMSQ, wol_rst);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rtl821x_resume(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct rtl821x_priv *priv = phydev-&gt;priv;</div><div class='hunk'>@@ -491,10 +806,29 @@ static int rtl821x_resume(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl8211f_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='add'>+static int rtl8211f_resume(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct rtl821x_priv *priv = phydev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = rtl821x_resume(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* If the device was programmed for a PME event, restore the interrupt</div><div class='add'>+	 * enable so phylib can receive link state interrupts.</div><div class='add'>+	 */</div><div class='add'>+	if (device_may_wakeup(&amp;phydev-&gt;mdio.dev))</div><div class='add'>+		ret = phy_write_paged(phydev, 0xa42, RTL821x_INER, priv-&gt;iner);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8211x_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='ctx'> 					unsigned long rules)</div><div class='ctx'> {</div><div class='del'>-	const unsigned long mask = BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='add'>+	const unsigned long mask = BIT(TRIGGER_NETDEV_LINK) |</div><div class='add'>+				   BIT(TRIGGER_NETDEV_LINK_10) |</div><div class='ctx'> 				   BIT(TRIGGER_NETDEV_LINK_100) |</div><div class='ctx'> 				   BIT(TRIGGER_NETDEV_LINK_1000) |</div><div class='ctx'> 				   BIT(TRIGGER_NETDEV_RX) |</div><div class='hunk'>@@ -510,9 +844,11 @@ static int rtl8211f_led_hw_is_supported(struct phy_device *phydev, u8 index,</div><div class='ctx'> 	 *      rates and Active indication always at all three 10+100+1000</div><div class='ctx'> 	 *      link rates.</div><div class='ctx'> 	 * This code currently uses mode B only.</div><div class='add'>+	 *</div><div class='add'>+	 * RTL8211E PHY LED has one mode, which works like RTL8211F mode B.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	if (index &gt;= RTL8211F_LED_COUNT)</div><div class='add'>+	if (index &gt;= RTL8211x_LED_COUNT)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* Filter out any other unsupported triggers. */</div><div class='hunk'>@@ -531,7 +867,7 @@ static int rtl8211f_led_hw_control_get(struct phy_device *phydev, u8 index,</div><div class='ctx'> {</div><div class='ctx'> 	int val;</div><div class='ctx'> </div><div class='del'>-	if (index &gt;= RTL8211F_LED_COUNT)</div><div class='add'>+	if (index &gt;= RTL8211x_LED_COUNT)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	val = phy_read_paged(phydev, 0xd04, RTL8211F_LEDCR);</div><div class='hunk'>@@ -542,17 +878,23 @@ static int rtl8211f_led_hw_control_get(struct phy_device *phydev, u8 index,</div><div class='ctx'> 	val &amp;= RTL8211F_LEDCR_MASK;</div><div class='ctx'> </div><div class='ctx'> 	if (val &amp; RTL8211F_LEDCR_LINK_10)</div><div class='del'>-		set_bit(TRIGGER_NETDEV_LINK_10, rules);</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK_10, rules);</div><div class='ctx'> </div><div class='ctx'> 	if (val &amp; RTL8211F_LEDCR_LINK_100)</div><div class='del'>-		set_bit(TRIGGER_NETDEV_LINK_100, rules);</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK_100, rules);</div><div class='ctx'> </div><div class='ctx'> 	if (val &amp; RTL8211F_LEDCR_LINK_1000)</div><div class='del'>-		set_bit(TRIGGER_NETDEV_LINK_1000, rules);</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK_1000, rules);</div><div class='add'>+</div><div class='add'>+	if ((val &amp; RTL8211F_LEDCR_LINK_10) &amp;&amp;</div><div class='add'>+	    (val &amp; RTL8211F_LEDCR_LINK_100) &amp;&amp;</div><div class='add'>+	    (val &amp; RTL8211F_LEDCR_LINK_1000)) {</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK, rules);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (val &amp; RTL8211F_LEDCR_ACT_TXRX) {</div><div class='del'>-		set_bit(TRIGGER_NETDEV_RX, rules);</div><div class='del'>-		set_bit(TRIGGER_NETDEV_TX, rules);</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_RX, rules);</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_TX, rules);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -564,17 +906,23 @@ static int rtl8211f_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='ctx'> 	const u16 mask = RTL8211F_LEDCR_MASK &lt;&lt; (RTL8211F_LEDCR_SHIFT * index);</div><div class='ctx'> 	u16 reg = 0;</div><div class='ctx'> </div><div class='del'>-	if (index &gt;= RTL8211F_LED_COUNT)</div><div class='add'>+	if (index &gt;= RTL8211x_LED_COUNT)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (test_bit(TRIGGER_NETDEV_LINK_10, &amp;rules))</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK, &amp;rules) ||</div><div class='add'>+	    test_bit(TRIGGER_NETDEV_LINK_10, &amp;rules)) {</div><div class='ctx'> 		reg |= RTL8211F_LEDCR_LINK_10;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (test_bit(TRIGGER_NETDEV_LINK_100, &amp;rules))</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK, &amp;rules) ||</div><div class='add'>+	    test_bit(TRIGGER_NETDEV_LINK_100, &amp;rules)) {</div><div class='ctx'> 		reg |= RTL8211F_LEDCR_LINK_100;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (test_bit(TRIGGER_NETDEV_LINK_1000, &amp;rules))</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK, &amp;rules) ||</div><div class='add'>+	    test_bit(TRIGGER_NETDEV_LINK_1000, &amp;rules)) {</div><div class='ctx'> 		reg |= RTL8211F_LEDCR_LINK_1000;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(TRIGGER_NETDEV_RX, &amp;rules) ||</div><div class='ctx'> 	    test_bit(TRIGGER_NETDEV_TX, &amp;rules)) {</div><div class='hunk'>@@ -587,9 +935,98 @@ static int rtl8211f_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='ctx'> 	return phy_modify_paged(phydev, 0xd04, RTL8211F_LEDCR, mask, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rtl8211e_led_hw_control_get(struct phy_device *phydev, u8 index,</div><div class='add'>+				       unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u16 cr1, cr2;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= RTL8211x_LED_COUNT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = rtl821x_read_ext_page(phydev, RTL8211E_LEDCR_EXT_PAGE,</div><div class='add'>+				    RTL8211E_LEDCR1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cr1 = ret &gt;&gt; RTL8211E_LEDCR1_SHIFT * index;</div><div class='add'>+	if (cr1 &amp; RTL8211E_LEDCR1_ACT_TXRX) {</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_RX, rules);</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_TX, rules);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = rtl821x_read_ext_page(phydev, RTL8211E_LEDCR_EXT_PAGE,</div><div class='add'>+				    RTL8211E_LEDCR2);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cr2 = ret &gt;&gt; RTL8211E_LEDCR2_SHIFT * index;</div><div class='add'>+	if (cr2 &amp; RTL8211E_LEDCR2_LINK_10)</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK_10, rules);</div><div class='add'>+</div><div class='add'>+	if (cr2 &amp; RTL8211E_LEDCR2_LINK_100)</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK_100, rules);</div><div class='add'>+</div><div class='add'>+	if (cr2 &amp; RTL8211E_LEDCR2_LINK_1000)</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK_1000, rules);</div><div class='add'>+</div><div class='add'>+	if ((cr2 &amp; RTL8211E_LEDCR2_LINK_10) &amp;&amp;</div><div class='add'>+	    (cr2 &amp; RTL8211E_LEDCR2_LINK_100) &amp;&amp;</div><div class='add'>+	    (cr2 &amp; RTL8211E_LEDCR2_LINK_1000)) {</div><div class='add'>+		__set_bit(TRIGGER_NETDEV_LINK, rules);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8211e_led_hw_control_set(struct phy_device *phydev, u8 index,</div><div class='add'>+				       unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	const u16 cr1mask =</div><div class='add'>+		RTL8211E_LEDCR1_MASK &lt;&lt; (RTL8211E_LEDCR1_SHIFT * index);</div><div class='add'>+	const u16 cr2mask =</div><div class='add'>+		RTL8211E_LEDCR2_MASK &lt;&lt; (RTL8211E_LEDCR2_SHIFT * index);</div><div class='add'>+	u16 cr1 = 0, cr2 = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= RTL8211x_LED_COUNT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_RX, &amp;rules) ||</div><div class='add'>+	    test_bit(TRIGGER_NETDEV_TX, &amp;rules)) {</div><div class='add'>+		cr1 |= RTL8211E_LEDCR1_ACT_TXRX;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cr1 &lt;&lt;= RTL8211E_LEDCR1_SHIFT * index;</div><div class='add'>+	ret = rtl821x_modify_ext_page(phydev, RTL8211E_LEDCR_EXT_PAGE,</div><div class='add'>+				      RTL8211E_LEDCR1, cr1mask, cr1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK, &amp;rules) ||</div><div class='add'>+	    test_bit(TRIGGER_NETDEV_LINK_10, &amp;rules)) {</div><div class='add'>+		cr2 |= RTL8211E_LEDCR2_LINK_10;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK, &amp;rules) ||</div><div class='add'>+	    test_bit(TRIGGER_NETDEV_LINK_100, &amp;rules)) {</div><div class='add'>+		cr2 |= RTL8211E_LEDCR2_LINK_100;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK, &amp;rules) ||</div><div class='add'>+	    test_bit(TRIGGER_NETDEV_LINK_1000, &amp;rules)) {</div><div class='add'>+		cr2 |= RTL8211E_LEDCR2_LINK_1000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cr2 &lt;&lt;= RTL8211E_LEDCR2_SHIFT * index;</div><div class='add'>+	ret = rtl821x_modify_ext_page(phydev, RTL8211E_LEDCR_EXT_PAGE,</div><div class='add'>+				      RTL8211E_LEDCR2, cr2mask, cr2);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rtl8211e_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	int ret = 0, oldpage;</div><div class='ctx'> 	u16 val;</div><div class='ctx'> </div><div class='ctx'> 	/* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */</div><div class='hunk'>@@ -619,20 +1056,9 @@ static int rtl8211e_config_init(struct phy_device *phydev)</div><div class='ctx'> 	 * 12 = RX Delay, 11 = TX Delay</div><div class='ctx'> 	 * 10:0 = Test &amp;&amp; debug settings reserved by realtek</div><div class='ctx'> 	 */</div><div class='del'>-	oldpage = phy_select_page(phydev, 0x7);</div><div class='del'>-	if (oldpage &lt; 0)</div><div class='del'>-		goto err_restore_page;</div><div class='del'>-</div><div class='del'>-	ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, 0xa4);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_restore_page;</div><div class='del'>-</div><div class='del'>-	ret = __phy_modify(phydev, 0x1c, RTL8211E_CTRL_DELAY</div><div class='del'>-			   | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,</div><div class='del'>-			   val);</div><div class='del'>-</div><div class='del'>-err_restore_page:</div><div class='del'>-	return phy_restore_page(phydev, oldpage, ret);</div><div class='add'>+	return rtl821x_modify_ext_page(phydev, RTL8211E_RGMII_EXT_PAGE,</div><div class='add'>+				       RTL8211E_RGMII_DELAY,</div><div class='add'>+				       RTL8211E_DELAY_MASK, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int rtl8211b_suspend(struct phy_device *phydev)</div><div class='hunk'>@@ -732,25 +1158,31 @@ static int rtlgen_read_status(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rtlgen_read_vend2(struct phy_device *phydev, int regnum)</div><div class='add'>+{</div><div class='add'>+	return __mdiobus_c45_read(phydev-&gt;mdio.bus, 0, MDIO_MMD_VEND2, regnum);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtlgen_write_vend2(struct phy_device *phydev, int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	return __mdiobus_c45_write(phydev-&gt;mdio.bus, 0, MDIO_MMD_VEND2, regnum,</div><div class='add'>+				   val);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (devnum == MDIO_MMD_PCS &amp;&amp; regnum == MDIO_PCS_EEE_ABLE) {</div><div class='del'>-		rtl821x_write_page(phydev, 0xa5c);</div><div class='del'>-		ret = __phy_read(phydev, 0x12);</div><div class='del'>-		rtl821x_write_page(phydev, 0);</div><div class='del'>-	} else if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_ADV) {</div><div class='del'>-		rtl821x_write_page(phydev, 0xa5d);</div><div class='del'>-		ret = __phy_read(phydev, 0x10);</div><div class='del'>-		rtl821x_write_page(phydev, 0);</div><div class='del'>-	} else if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_LPABLE) {</div><div class='del'>-		rtl821x_write_page(phydev, 0xa5d);</div><div class='del'>-		ret = __phy_read(phydev, 0x11);</div><div class='del'>-		rtl821x_write_page(phydev, 0);</div><div class='del'>-	} else {</div><div class='add'>+	if (devnum == MDIO_MMD_VEND2)</div><div class='add'>+		ret = rtlgen_read_vend2(phydev, regnum);</div><div class='add'>+	else if (devnum == MDIO_MMD_PCS &amp;&amp; regnum == MDIO_PCS_EEE_ABLE)</div><div class='add'>+		ret = rtlgen_read_vend2(phydev, RTL_MDIO_PCS_EEE_ABLE);</div><div class='add'>+	else if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_ADV)</div><div class='add'>+		ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_ADV);</div><div class='add'>+	else if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_LPABLE)</div><div class='add'>+		ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_LPABLE);</div><div class='add'>+	else</div><div class='ctx'> 		ret = -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -760,13 +1192,12 @@ static int rtlgen_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_ADV) {</div><div class='del'>-		rtl821x_write_page(phydev, 0xa5d);</div><div class='del'>-		ret = __phy_write(phydev, 0x10, val);</div><div class='del'>-		rtl821x_write_page(phydev, 0);</div><div class='del'>-	} else {</div><div class='add'>+	if (devnum == MDIO_MMD_VEND2)</div><div class='add'>+		ret = rtlgen_write_vend2(phydev, regnum, val);</div><div class='add'>+	else if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_ADV)</div><div class='add'>+		ret = rtlgen_write_vend2(phydev, regnum, RTL_MDIO_AN_EEE_ADV);</div><div class='add'>+	else</div><div class='ctx'> 		ret = -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -778,19 +1209,12 @@ static int rtl822x_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)</div><div class='ctx'> 	if (ret != -EOPNOTSUPP)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (devnum == MDIO_MMD_PCS &amp;&amp; regnum == MDIO_PCS_EEE_ABLE2) {</div><div class='del'>-		rtl821x_write_page(phydev, 0xa6e);</div><div class='del'>-		ret = __phy_read(phydev, 0x16);</div><div class='del'>-		rtl821x_write_page(phydev, 0);</div><div class='del'>-	} else if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_ADV2) {</div><div class='del'>-		rtl821x_write_page(phydev, 0xa6d);</div><div class='del'>-		ret = __phy_read(phydev, 0x12);</div><div class='del'>-		rtl821x_write_page(phydev, 0);</div><div class='del'>-	} else if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_LPABLE2) {</div><div class='del'>-		rtl821x_write_page(phydev, 0xa6d);</div><div class='del'>-		ret = __phy_read(phydev, 0x10);</div><div class='del'>-		rtl821x_write_page(phydev, 0);</div><div class='del'>-	}</div><div class='add'>+	if (devnum == MDIO_MMD_PCS &amp;&amp; regnum == MDIO_PCS_EEE_ABLE2)</div><div class='add'>+		ret = rtlgen_read_vend2(phydev, RTL_MDIO_PCS_EEE_ABLE2);</div><div class='add'>+	else if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_ADV2)</div><div class='add'>+		ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_ADV2);</div><div class='add'>+	else if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_LPABLE2)</div><div class='add'>+		ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_LPABLE2);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -803,16 +1227,22 @@ static int rtl822x_write_mmd(struct phy_device *phydev, int devnum, u16 regnum,</div><div class='ctx'> 	if (ret != -EOPNOTSUPP)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_ADV2) {</div><div class='del'>-		rtl821x_write_page(phydev, 0xa6d);</div><div class='del'>-		ret = __phy_write(phydev, 0x12, val);</div><div class='del'>-		rtl821x_write_page(phydev, 0);</div><div class='del'>-	}</div><div class='add'>+	if (devnum == MDIO_MMD_AN &amp;&amp; regnum == MDIO_AN_EEE_ADV2)</div><div class='add'>+		ret = rtlgen_write_vend2(phydev, RTL_MDIO_AN_EEE_ADV2, val);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl822xb_config_init(struct phy_device *phydev)</div><div class='add'>+static int rtl822x_probe(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	if (IS_ENABLED(CONFIG_REALTEK_PHY_HWMON) &amp;&amp;</div><div class='add'>+	    phydev-&gt;phy_id != RTL_GENERIC_PHYID)</div><div class='add'>+		return rtl822x_hwmon_init(phydev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool gen1)</div><div class='ctx'> {</div><div class='ctx'> 	bool has_2500, has_sgmii;</div><div class='ctx'> 	u16 mode;</div><div class='hunk'>@@ -847,15 +1277,18 @@ static int rtl822xb_config_init(struct phy_device *phydev)</div><div class='ctx'> 	/* the following sequence with magic numbers sets up the SerDes</div><div class='ctx'> 	 * option mode</div><div class='ctx'> 	 */</div><div class='del'>-	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+</div><div class='add'>+	if (!gen1) {</div><div class='add'>+		ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND1,</div><div class='ctx'> 				     RTL822X_VND1_SERDES_OPTION,</div><div class='ctx'> 				     RTL822X_VND1_SERDES_OPTION_MODE_MASK,</div><div class='ctx'> 				     mode);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	if (gen1 || ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6a04, 0x0503);</div><div class='hunk'>@@ -869,6 +1302,16 @@ static int rtl822xb_config_init(struct phy_device *phydev)</div><div class='ctx'> 	return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rtl822x_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return rtl822x_set_serdes_option_mode(phydev, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl822xb_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	return rtl822x_set_serdes_option_mode(phydev, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rtl822xb_get_rate_matching(struct phy_device *phydev,</div><div class='ctx'> 				      phy_interface_t iface)</div><div class='ctx'> {</div><div class='hunk'>@@ -894,7 +1337,7 @@ static int rtl822x_get_features(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int val;</div><div class='ctx'> </div><div class='del'>-	val = phy_read_paged(phydev, 0xa61, 0x13);</div><div class='add'>+	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_MDIO_PMA_SPEED);</div><div class='ctx'> 	if (val &lt; 0)</div><div class='ctx'> 		return val;</div><div class='ctx'> </div><div class='hunk'>@@ -915,10 +1358,10 @@ static int rtl822x_config_aneg(struct phy_device *phydev)</div><div class='ctx'> 	if (phydev-&gt;autoneg == AUTONEG_ENABLE) {</div><div class='ctx'> 		u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev-&gt;advertising);</div><div class='ctx'> </div><div class='del'>-		ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,</div><div class='del'>-					       MDIO_AN_10GBT_CTRL_ADV2_5G |</div><div class='del'>-					       MDIO_AN_10GBT_CTRL_ADV5G,</div><div class='del'>-					       adv);</div><div class='add'>+		ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2,</div><div class='add'>+					     RTL_MDIO_AN_10GBT_CTRL,</div><div class='add'>+					     MDIO_AN_10GBT_CTRL_ADV2_5G |</div><div class='add'>+					     MDIO_AN_10GBT_CTRL_ADV5G, adv);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -952,17 +1395,17 @@ static int rtl822x_read_status(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int lpadv, ret;</div><div class='ctx'> </div><div class='add'>+	mii_10gbt_stat_mod_linkmode_lpa_t(phydev-&gt;lp_advertising, 0);</div><div class='add'>+</div><div class='ctx'> 	ret = rtlgen_read_status(phydev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;autoneg == AUTONEG_DISABLE ||</div><div class='del'>-	    !phydev-&gt;autoneg_complete) {</div><div class='del'>-		mii_10gbt_stat_mod_linkmode_lpa_t(phydev-&gt;lp_advertising, 0);</div><div class='add'>+	    !phydev-&gt;autoneg_complete)</div><div class='ctx'> 		return 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	lpadv = phy_read_paged(phydev, 0xa5d, 0x13);</div><div class='add'>+	lpadv = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_MDIO_AN_10GBT_STAT);</div><div class='ctx'> 	if (lpadv &lt; 0)</div><div class='ctx'> 		return lpadv;</div><div class='ctx'> </div><div class='hunk'>@@ -1009,7 +1452,8 @@ static int rtl822x_c45_config_aneg(struct phy_device *phydev)</div><div class='ctx'> 	val = linkmode_adv_to_mii_ctrl1000_t(phydev-&gt;advertising);</div><div class='ctx'> </div><div class='ctx'> 	/* Vendor register as C45 has no standardized support for 1000BaseT */</div><div class='del'>-	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,</div><div class='add'>+	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2,</div><div class='add'>+				     RTL822X_VND2_C22_REG(MII_CTRL1000),</div><div class='ctx'> 				     ADVERTISE_1000FULL, val);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -1023,26 +1467,25 @@ static int rtl822x_c45_read_status(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret, val;</div><div class='ctx'> </div><div class='del'>-	ret = genphy_c45_read_status(phydev);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (phydev-&gt;autoneg == AUTONEG_DISABLE ||</div><div class='del'>-	    !genphy_c45_aneg_done(phydev))</div><div class='del'>-		mii_stat1000_mod_linkmode_lpa_t(phydev-&gt;lp_advertising, 0);</div><div class='del'>-</div><div class='ctx'> 	/* Vendor register as C45 has no standardized support for 1000BaseT */</div><div class='del'>-	if (phydev-&gt;autoneg == AUTONEG_ENABLE) {</div><div class='add'>+	if (phydev-&gt;autoneg == AUTONEG_ENABLE &amp;&amp; genphy_c45_aneg_done(phydev)) {</div><div class='ctx'> 		val = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='del'>-				   RTL822X_VND2_GANLPAR);</div><div class='add'>+				   RTL822X_VND2_C22_REG(MII_STAT1000));</div><div class='ctx'> 		if (val &lt; 0)</div><div class='ctx'> 			return val;</div><div class='del'>-</div><div class='del'>-		mii_stat1000_mod_linkmode_lpa_t(phydev-&gt;lp_advertising, val);</div><div class='add'>+	} else {</div><div class='add'>+		val = 0;</div><div class='ctx'> 	}</div><div class='add'>+	mii_stat1000_mod_linkmode_lpa_t(phydev-&gt;lp_advertising, val);</div><div class='ctx'> </div><div class='del'>-	if (!phydev-&gt;link)</div><div class='add'>+	ret = genphy_c45_read_status(phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!phydev-&gt;link) {</div><div class='add'>+		phydev-&gt;master_slave_state = MASTER_SLAVE_STATE_UNKNOWN;</div><div class='ctx'> 		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Read actual speed from vendor register. */</div><div class='ctx'> 	val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_VND2_PHYSR);</div><div class='hunk'>@@ -1054,6 +1497,21 @@ static int rtl822x_c45_read_status(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rtl822x_c45_soft_reset(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int ret, val;</div><div class='add'>+</div><div class='add'>+	ret = phy_modify_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1,</div><div class='add'>+			     MDIO_CTRL1_RESET, MDIO_CTRL1_RESET);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PMAPMD,</div><div class='add'>+					 MDIO_CTRL1, val,</div><div class='add'>+					 !(val &amp; MDIO_CTRL1_RESET),</div><div class='add'>+					 5000, 100000, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int rtl822xb_c45_read_status(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1067,6 +1525,168 @@ static int rtl822xb_c45_read_status(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rtl8224_cable_test_start(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* disable auto-negotiation and force 1000/Full */</div><div class='add'>+	ret = phy_modify_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+			     RTL822X_VND2_C22_REG(MII_BMCR),</div><div class='add'>+			     BMCR_ANENABLE | BMCR_SPEED100 | BMCR_SPEED10,</div><div class='add'>+			     BMCR_SPEED1000 | BMCR_FULLDPLX);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mdelay(500);</div><div class='add'>+</div><div class='add'>+	/* trigger cable test */</div><div class='add'>+	val = RTL8224_MII_RTCT_ENABLE;</div><div class='add'>+	val |= RTL8224_MII_RTCT_PAIR_A;</div><div class='add'>+	val |= RTL8224_MII_RTCT_PAIR_B;</div><div class='add'>+	val |= RTL8224_MII_RTCT_PAIR_C;</div><div class='add'>+	val |= RTL8224_MII_RTCT_PAIR_D;</div><div class='add'>+</div><div class='add'>+	return phy_modify_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+			      RTL822X_VND2_C22_REG(RTL8224_MII_RTCT),</div><div class='add'>+			      RTL8224_MII_RTCT_DONE, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8224_sram_read(struct phy_device *phydev, u32 reg)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = phy_write_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+			    RTL822X_VND2_C22_REG(RTL8224_MII_SRAM_ADDR),</div><div class='add'>+			    reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+			    RTL822X_VND2_C22_REG(RTL8224_MII_SRAM_DATA));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8224_pair_len_get(struct phy_device *phydev, u32 pair)</div><div class='add'>+{</div><div class='add'>+	int cable_len;</div><div class='add'>+	u32 reg_len;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 cm;</div><div class='add'>+</div><div class='add'>+	reg_len = RTL8224_SRAM_RTCT_LEN(pair);</div><div class='add'>+</div><div class='add'>+	ret = rtl8224_sram_read(phydev, reg_len);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cable_len = ret &amp; 0xff00;</div><div class='add'>+</div><div class='add'>+	ret = rtl8224_sram_read(phydev, reg_len + 1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cable_len |= (ret &amp; 0xff00) &gt;&gt; 8;</div><div class='add'>+</div><div class='add'>+	cable_len -= 620;</div><div class='add'>+	cable_len = max(cable_len, 0);</div><div class='add'>+</div><div class='add'>+	cm = cable_len * 100 / 78;</div><div class='add'>+</div><div class='add'>+	return cm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8224_cable_test_result_trans(u32 result)</div><div class='add'>+{</div><div class='add'>+	if (!(result &amp; RTL8224_SRAM_RTCT_FAULT_DONE))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (result &amp; RTL8224_SRAM_RTCT_FAULT_OK)</div><div class='add'>+		return ETHTOOL_A_CABLE_RESULT_CODE_OK;</div><div class='add'>+</div><div class='add'>+	if (result &amp; RTL8224_SRAM_RTCT_FAULT_OPEN)</div><div class='add'>+		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;</div><div class='add'>+</div><div class='add'>+	if (result &amp; RTL8224_SRAM_RTCT_FAULT_SAME_SHORT)</div><div class='add'>+		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;</div><div class='add'>+</div><div class='add'>+	if (result &amp; RTL8224_SRAM_RTCT_FAULT_BUSY)</div><div class='add'>+		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;</div><div class='add'>+</div><div class='add'>+	if (result &amp; RTL8224_SRAM_RTCT_FAULT_CROSS_SHORT)</div><div class='add'>+		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;</div><div class='add'>+</div><div class='add'>+	return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8224_cable_test_report_pair(struct phy_device *phydev, unsigned int pair)</div><div class='add'>+{</div><div class='add'>+	int fault_rslt;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = rtl8224_sram_read(phydev, RTL8224_SRAM_RTCT_FAULT(pair));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	fault_rslt = rtl8224_cable_test_result_trans(ret);</div><div class='add'>+	if (fault_rslt &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = ethnl_cable_test_result(phydev, pair, fault_rslt);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch (fault_rslt) {</div><div class='add'>+	case ETHTOOL_A_CABLE_RESULT_CODE_OPEN:</div><div class='add'>+	case ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT:</div><div class='add'>+	case ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT:</div><div class='add'>+		ret = rtl8224_pair_len_get(phydev, pair);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		return ethnl_cable_test_fault_length(phydev, pair, ret);</div><div class='add'>+	default:</div><div class='add'>+		return  0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8224_cable_test_report(struct phy_device *phydev, bool *finished)</div><div class='add'>+{</div><div class='add'>+	unsigned int pair;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for (pair = ETHTOOL_A_CABLE_PAIR_A; pair &lt;= ETHTOOL_A_CABLE_PAIR_D; pair++) {</div><div class='add'>+		ret = rtl8224_cable_test_report_pair(phydev, pair);</div><div class='add'>+		if (ret == -EBUSY) {</div><div class='add'>+			*finished = false;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8224_cable_test_get_status(struct phy_device *phydev, bool *finished)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*finished = false;</div><div class='add'>+</div><div class='add'>+	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+			   RTL822X_VND2_C22_REG(RTL8224_MII_RTCT));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(ret &amp; RTL8224_MII_RTCT_DONE))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	*finished = true;</div><div class='add'>+</div><div class='add'>+	return rtl8224_cable_test_report(phydev, finished);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	int val;</div><div class='hunk'>@@ -1095,13 +1715,15 @@ static bool rtlgen_supports_mmd(struct phy_device *phydev)</div><div class='ctx'> 	return val &gt; 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtlgen_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int rtlgen_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				   const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return phydev-&gt;phy_id == RTL_GENERIC_PHYID &amp;&amp;</div><div class='ctx'> 	       !rtlgen_supports_2_5gbps(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl8226_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int rtl8226_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				    const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return phydev-&gt;phy_id == RTL_GENERIC_PHYID &amp;&amp;</div><div class='ctx'> 	       rtlgen_supports_2_5gbps(phydev) &amp;&amp;</div><div class='hunk'>@@ -1117,32 +1739,38 @@ static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,</div><div class='ctx'> 		return !is_c45 &amp;&amp; (id == phydev-&gt;phy_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl8221b_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int rtl8221b_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				     const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return phydev-&gt;phy_id == RTL_8221B &amp;&amp; rtlgen_supports_mmd(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int rtl8221b_vb_cg_c22_match_phy_device(struct phy_device *phydev,</div><div class='add'>+					       const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl8221b_vb_cg_c45_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int rtl8221b_vb_cg_c45_match_phy_device(struct phy_device *phydev,</div><div class='add'>+					       const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return rtlgen_is_c45_match(phydev, RTL_8221B_VB_CG, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl8221b_vn_cg_c22_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int rtl8221b_vm_cg_c22_match_phy_device(struct phy_device *phydev,</div><div class='add'>+					       const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='del'>-	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, false);</div><div class='add'>+	return rtlgen_is_c45_match(phydev, RTL_8221B_VM_CG, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl8221b_vn_cg_c45_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int rtl8221b_vm_cg_c45_match_phy_device(struct phy_device *phydev,</div><div class='add'>+					       const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='del'>-	return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);</div><div class='add'>+	return rtlgen_is_c45_match(phydev, RTL_8221B_VM_CG, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev,</div><div class='add'>+						const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	if (phydev-&gt;is_c45)</div><div class='ctx'> 		return false;</div><div class='hunk'>@@ -1151,6 +1779,7 @@ static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev)</div><div class='ctx'> 	case RTL_GENERIC_PHYID:</div><div class='ctx'> 	case RTL_8221B:</div><div class='ctx'> 	case RTL_8251B:</div><div class='add'>+	case RTL_8261C:</div><div class='ctx'> 	case 0x001cc841:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1160,7 +1789,8 @@ static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev)</div><div class='ctx'> 	return rtlgen_supports_2_5gbps(phydev) &amp;&amp; !rtlgen_supports_mmd(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int rtl8251b_c45_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int rtl8251b_c45_match_phy_device(struct phy_device *phydev,</div><div class='add'>+					 const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return rtlgen_is_c45_match(phydev, RTL_8251B, true);</div><div class='ctx'> }</div><div class='hunk'>@@ -1300,6 +1930,53 @@ static irqreturn_t rtl9000a_handle_interrupt(struct phy_device *phydev)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int rtl8221b_ack_interrupt(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL8221B_VND2_INSR);</div><div class='add'>+</div><div class='add'>+	return (err &lt; 0) ? err : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8221b_config_intr(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;interrupts == PHY_INTERRUPT_ENABLED) {</div><div class='add'>+		err = rtl8221b_ack_interrupt(phydev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = phy_write_mmd(phydev, MDIO_MMD_VEND2, RTL8221B_VND2_INER,</div><div class='add'>+				    RTL8221B_VND2_INER_LINK_STATUS);</div><div class='add'>+	} else {</div><div class='add'>+		err = phy_write_mmd(phydev, MDIO_MMD_VEND2,</div><div class='add'>+				    RTL8221B_VND2_INER, 0);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = rtl8221b_ack_interrupt(phydev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t rtl8221b_handle_interrupt(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = rtl8221b_ack_interrupt(phydev);</div><div class='add'>+	if (err) {</div><div class='add'>+		phy_error(phydev);</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phy_trigger_machine(phydev);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct phy_driver realtek_drvs[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(0x00008201),</div><div class='hunk'>@@ -1370,20 +2047,25 @@ static struct phy_driver realtek_drvs[] = {</div><div class='ctx'> 		.resume		= genphy_resume,</div><div class='ctx'> 		.read_page	= rtl821x_read_page,</div><div class='ctx'> 		.write_page	= rtl821x_write_page,</div><div class='add'>+		.led_hw_is_supported = rtl8211x_led_hw_is_supported,</div><div class='add'>+		.led_hw_control_get = rtl8211e_led_hw_control_get,</div><div class='add'>+		.led_hw_control_set = rtl8211e_led_hw_control_set,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(0x001cc916),</div><div class='ctx'> 		.name		= "RTL8211F Gigabit Ethernet",</div><div class='del'>-		.probe		= rtl821x_probe,</div><div class='add'>+		.probe		= rtl8211f_probe,</div><div class='ctx'> 		.config_init	= &amp;rtl8211f_config_init,</div><div class='ctx'> 		.read_status	= rtlgen_read_status,</div><div class='ctx'> 		.config_intr	= &amp;rtl8211f_config_intr,</div><div class='ctx'> 		.handle_interrupt = rtl8211f_handle_interrupt,</div><div class='del'>-		.suspend	= rtl821x_suspend,</div><div class='del'>-		.resume		= rtl821x_resume,</div><div class='add'>+		.set_wol	= rtl8211f_set_wol,</div><div class='add'>+		.get_wol	= rtl8211f_get_wol,</div><div class='add'>+		.suspend	= rtl8211f_suspend,</div><div class='add'>+		.resume		= rtl8211f_resume,</div><div class='ctx'> 		.read_page	= rtl821x_read_page,</div><div class='ctx'> 		.write_page	= rtl821x_write_page,</div><div class='ctx'> 		.flags		= PHY_ALWAYS_CALL_SUSPEND,</div><div class='del'>-		.led_hw_is_supported = rtl8211f_led_hw_is_supported,</div><div class='add'>+		.led_hw_is_supported = rtl8211x_led_hw_is_supported,</div><div class='ctx'> 		.led_hw_control_get = rtl8211f_led_hw_control_get,</div><div class='ctx'> 		.led_hw_control_set = rtl8211f_led_hw_control_set,</div><div class='ctx'> 	}, {</div><div class='hunk'>@@ -1434,13 +2116,13 @@ static struct phy_driver realtek_drvs[] = {</div><div class='ctx'> 	}, {</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(0x001cc838),</div><div class='ctx'> 		.name           = "RTL8226-CG 2.5Gbps PHY",</div><div class='del'>-		.get_features   = rtl822x_get_features,</div><div class='del'>-		.config_aneg    = rtl822x_config_aneg,</div><div class='del'>-		.read_status    = rtl822x_read_status,</div><div class='del'>-		.suspend        = genphy_suspend,</div><div class='del'>-		.resume         = rtlgen_resume,</div><div class='del'>-		.read_page      = rtl821x_read_page,</div><div class='del'>-		.write_page     = rtl821x_write_page,</div><div class='add'>+		.soft_reset     = rtl822x_c45_soft_reset,</div><div class='add'>+		.get_features   = rtl822x_c45_get_features,</div><div class='add'>+		.config_aneg    = rtl822x_c45_config_aneg,</div><div class='add'>+		.config_init    = rtl822x_config_init,</div><div class='add'>+		.read_status    = rtl822xb_c45_read_status,</div><div class='add'>+		.suspend        = genphy_c45_pma_suspend,</div><div class='add'>+		.resume         = rtlgen_c45_resume,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(0x001cc848),</div><div class='ctx'> 		.name           = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",</div><div class='hunk'>@@ -1456,6 +2138,7 @@ static struct phy_driver realtek_drvs[] = {</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,</div><div class='ctx'> 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",</div><div class='add'>+		.probe		= rtl822x_probe,</div><div class='ctx'> 		.get_features   = rtl822x_get_features,</div><div class='ctx'> 		.config_aneg    = rtl822x_config_aneg,</div><div class='ctx'> 		.config_init    = rtl822xb_config_init,</div><div class='hunk'>@@ -1468,6 +2151,9 @@ static struct phy_driver realtek_drvs[] = {</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,</div><div class='ctx'> 		.name           = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",</div><div class='add'>+		.config_intr	= rtl8221b_config_intr,</div><div class='add'>+		.handle_interrupt = rtl8221b_handle_interrupt,</div><div class='add'>+		.probe		= rtl822x_probe,</div><div class='ctx'> 		.config_init    = rtl822xb_config_init,</div><div class='ctx'> 		.get_rate_matching = rtl822xb_get_rate_matching,</div><div class='ctx'> 		.get_features   = rtl822x_c45_get_features,</div><div class='hunk'>@@ -1476,8 +2162,9 @@ static struct phy_driver realtek_drvs[] = {</div><div class='ctx'> 		.suspend        = genphy_c45_pma_suspend,</div><div class='ctx'> 		.resume         = rtlgen_c45_resume,</div><div class='ctx'> 	}, {</div><div class='del'>-		.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,</div><div class='add'>+		.match_phy_device = rtl8221b_vm_cg_c22_match_phy_device,</div><div class='ctx'> 		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",</div><div class='add'>+		.probe		= rtl822x_probe,</div><div class='ctx'> 		.get_features   = rtl822x_get_features,</div><div class='ctx'> 		.config_aneg    = rtl822x_config_aneg,</div><div class='ctx'> 		.config_init    = rtl822xb_config_init,</div><div class='hunk'>@@ -1488,8 +2175,11 @@ static struct phy_driver realtek_drvs[] = {</div><div class='ctx'> 		.read_page      = rtl821x_read_page,</div><div class='ctx'> 		.write_page     = rtl821x_write_page,</div><div class='ctx'> 	}, {</div><div class='del'>-		.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,</div><div class='del'>-		.name           = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",</div><div class='add'>+		.match_phy_device = rtl8221b_vm_cg_c45_match_phy_device,</div><div class='add'>+		.name           = "RTL8221B-VM-CG 2.5Gbps PHY (C45)",</div><div class='add'>+		.config_intr	= rtl8221b_config_intr,</div><div class='add'>+		.handle_interrupt = rtl8221b_handle_interrupt,</div><div class='add'>+		.probe		= rtl822x_probe,</div><div class='ctx'> 		.config_init    = rtl822xb_config_init,</div><div class='ctx'> 		.get_rate_matching = rtl822xb_get_rate_matching,</div><div class='ctx'> 		.get_features   = rtl822x_c45_get_features,</div><div class='hunk'>@@ -1500,6 +2190,7 @@ static struct phy_driver realtek_drvs[] = {</div><div class='ctx'> 	}, {</div><div class='ctx'> 		.match_phy_device = rtl8251b_c45_match_phy_device,</div><div class='ctx'> 		.name           = "RTL8251B 5Gbps PHY",</div><div class='add'>+		.probe		= rtl822x_probe,</div><div class='ctx'> 		.get_features   = rtl822x_get_features,</div><div class='ctx'> 		.config_aneg    = rtl822x_config_aneg,</div><div class='ctx'> 		.read_status    = rtl822x_read_status,</div><div class='hunk'>@@ -1511,6 +2202,7 @@ static struct phy_driver realtek_drvs[] = {</div><div class='ctx'> 		.match_phy_device = rtl_internal_nbaset_match_phy_device,</div><div class='ctx'> 		.name           = "Realtek Internal NBASE-T PHY",</div><div class='ctx'> 		.flags		= PHY_IS_INTERNAL,</div><div class='add'>+		.probe		= rtl822x_probe,</div><div class='ctx'> 		.get_features   = rtl822x_get_features,</div><div class='ctx'> 		.config_aneg    = rtl822x_config_aneg,</div><div class='ctx'> 		.read_status    = rtl822x_read_status,</div><div class='hunk'>@@ -1523,11 +2215,14 @@ static struct phy_driver realtek_drvs[] = {</div><div class='ctx'> 	}, {</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(0x001ccad0),</div><div class='ctx'> 		.name		= "RTL8224 2.5Gbps PHY",</div><div class='add'>+		.flags		= PHY_POLL_CABLE_TEST,</div><div class='ctx'> 		.get_features   = rtl822x_c45_get_features,</div><div class='ctx'> 		.config_aneg    = rtl822x_c45_config_aneg,</div><div class='ctx'> 		.read_status    = rtl822x_c45_read_status,</div><div class='ctx'> 		.suspend        = genphy_c45_pma_suspend,</div><div class='ctx'> 		.resume         = rtlgen_c45_resume,</div><div class='add'>+		.cable_test_start = rtl8224_cable_test_start,</div><div class='add'>+		.cable_test_get_status = rtl8224_cable_test_get_status,</div><div class='ctx'> 	}, {</div><div class='ctx'> 		PHY_ID_MATCH_EXACT(0x001cc961),</div><div class='ctx'> 		.name		= "RTL8366RB Gigabit Ethernet",</div><div class='head'>diff --git a/drivers/net/phy/rockchip.c b/drivers/net/phy/rockchip.c<br/>index bb13e75183ee..b338f385e15a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/rockchip.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/rockchip.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/rockchip.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/rockchip.c</a></div><div class='hunk'>@@ -188,7 +188,7 @@ static struct phy_driver rockchip_phy_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(rockchip_phy_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused rockchip_phy_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused rockchip_phy_tbl[] = {</div><div class='ctx'> 	{ INTERNAL_EPHY_ID, 0xfffffff0 },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/sfp-bus.c b/drivers/net/phy/sfp-bus.c<br/>index f13c00b5b449..b945d75966d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/sfp-bus.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/sfp-bus.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/sfp-bus.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/sfp-bus.c</a></div><div class='hunk'>@@ -22,7 +22,6 @@ struct sfp_bus {</div><div class='ctx'> 	const struct sfp_socket_ops *socket_ops;</div><div class='ctx'> 	struct device *sfp_dev;</div><div class='ctx'> 	struct sfp *sfp;</div><div class='del'>-	const struct sfp_quirk *sfp_quirk;</div><div class='ctx'> </div><div class='ctx'> 	const struct sfp_upstream_ops *upstream_ops;</div><div class='ctx'> 	void *upstream;</div><div class='hunk'>@@ -30,24 +29,18 @@ struct sfp_bus {</div><div class='ctx'> </div><div class='ctx'> 	bool registered;</div><div class='ctx'> 	bool started;</div><div class='add'>+</div><div class='add'>+	struct sfp_module_caps caps;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * sfp_parse_port() - Parse the EEPROM base ID, setting the port type</div><div class='del'>- * @bus: a pointer to the &amp;struct sfp_bus structure for the sfp module</div><div class='del'>- * @id: a pointer to the module's &amp;struct sfp_eeprom_id</div><div class='del'>- * @support: optional pointer to an array of unsigned long for the</div><div class='del'>- *   ethtool support mask</div><div class='del'>- *</div><div class='del'>- * Parse the EEPROM identification given in @id, and return one of</div><div class='del'>- * %PORT_TP, %PORT_FIBRE or %PORT_OTHER. If @support is non-%NULL,</div><div class='del'>- * also set the ethtool %ETHTOOL_LINK_MODE_xxx_BIT corresponding with</div><div class='del'>- * the connector type.</div><div class='del'>- *</div><div class='del'>- * If the port type is not known, returns %PORT_OTHER.</div><div class='del'>- */</div><div class='del'>-int sfp_parse_port(struct sfp_bus *bus, const struct sfp_eeprom_id *id,</div><div class='del'>-		   unsigned long *support)</div><div class='add'>+const struct sfp_module_caps *sfp_get_module_caps(struct sfp_bus *bus)</div><div class='add'>+{</div><div class='add'>+	return &amp;bus-&gt;caps;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(sfp_get_module_caps);</div><div class='add'>+</div><div class='add'>+static void sfp_module_parse_port(struct sfp_bus *bus,</div><div class='add'>+				  const struct sfp_eeprom_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	int port;</div><div class='ctx'> </div><div class='hunk'>@@ -91,34 +84,26 @@ int sfp_parse_port(struct sfp_bus *bus, const struct sfp_eeprom_id *id,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (support) {</div><div class='del'>-		switch (port) {</div><div class='del'>-		case PORT_FIBRE:</div><div class='del'>-			phylink_set(support, FIBRE);</div><div class='del'>-			break;</div><div class='add'>+	switch (port) {</div><div class='add'>+	case PORT_FIBRE:</div><div class='add'>+		phylink_set(bus-&gt;caps.link_modes, FIBRE);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-		case PORT_TP:</div><div class='del'>-			phylink_set(support, TP);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+	case PORT_TP:</div><div class='add'>+		phylink_set(bus-&gt;caps.link_modes, TP);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return port;</div><div class='add'>+	bus-&gt;caps.port = port;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(sfp_parse_port);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * sfp_may_have_phy() - indicate whether the module may have a PHY</div><div class='del'>- * @bus: a pointer to the &amp;struct sfp_bus structure for the sfp module</div><div class='del'>- * @id: a pointer to the module's &amp;struct sfp_eeprom_id</div><div class='del'>- *</div><div class='del'>- * Parse the EEPROM identification given in @id, and return whether</div><div class='del'>- * this module may have a PHY.</div><div class='del'>- */</div><div class='del'>-bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id)</div><div class='add'>+static void sfp_module_parse_may_have_phy(struct sfp_bus *bus,</div><div class='add'>+					  const struct sfp_eeprom_id *id)</div><div class='ctx'> {</div><div class='del'>-	if (id-&gt;base.e1000_base_t)</div><div class='del'>-		return true;</div><div class='add'>+	if (id-&gt;base.e1000_base_t) {</div><div class='add'>+		bus-&gt;caps.may_have_phy = true;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (id-&gt;base.phys_id != SFF8024_ID_DWDM_SFP) {</div><div class='ctx'> 		switch (id-&gt;base.extended_cc) {</div><div class='hunk'>@@ -126,30 +111,20 @@ bool sfp_may_have_phy(struct sfp_bus *bus, const struct sfp_eeprom_id *id)</div><div class='ctx'> 		case SFF8024_ECC_10GBASE_T_SR:</div><div class='ctx'> 		case SFF8024_ECC_5GBASE_T:</div><div class='ctx'> 		case SFF8024_ECC_2_5GBASE_T:</div><div class='del'>-			return true;</div><div class='add'>+			bus-&gt;caps.may_have_phy = true;</div><div class='add'>+			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	bus-&gt;caps.may_have_phy = false;</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(sfp_may_have_phy);</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * sfp_parse_support() - Parse the eeprom id for supported link modes</div><div class='del'>- * @bus: a pointer to the &amp;struct sfp_bus structure for the sfp module</div><div class='del'>- * @id: a pointer to the module's &amp;struct sfp_eeprom_id</div><div class='del'>- * @support: pointer to an array of unsigned long for the ethtool support mask</div><div class='del'>- * @interfaces: pointer to an array of unsigned long for phy interface modes</div><div class='del'>- *		mask</div><div class='del'>- *</div><div class='del'>- * Parse the EEPROM identification information and derive the supported</div><div class='del'>- * ethtool link modes for the module.</div><div class='del'>- */</div><div class='del'>-void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id,</div><div class='del'>-		       unsigned long *support, unsigned long *interfaces)</div><div class='add'>+static void sfp_module_parse_support(struct sfp_bus *bus,</div><div class='add'>+				     const struct sfp_eeprom_id *id)</div><div class='ctx'> {</div><div class='add'>+	unsigned long *interfaces = bus-&gt;caps.interfaces;</div><div class='add'>+	unsigned long *modes = bus-&gt;caps.link_modes;</div><div class='ctx'> 	unsigned int br_min, br_nom, br_max;</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = { 0, };</div><div class='ctx'> </div><div class='ctx'> 	/* Decode the bitrate information to MBd */</div><div class='ctx'> 	br_min = br_nom = br_max = 0;</div><div class='hunk'>@@ -338,13 +313,21 @@ void sfp_parse_support(struct sfp_bus *bus, const struct sfp_eeprom_id *id,</div><div class='ctx'> 	phylink_set(modes, Autoneg);</div><div class='ctx'> 	phylink_set(modes, Pause);</div><div class='ctx'> 	phylink_set(modes, Asym_Pause);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (bus-&gt;sfp_quirk &amp;&amp; bus-&gt;sfp_quirk-&gt;modes)</div><div class='del'>-		bus-&gt;sfp_quirk-&gt;modes(id, modes, interfaces);</div><div class='add'>+static void sfp_init_module(struct sfp_bus *bus,</div><div class='add'>+			    const struct sfp_eeprom_id *id,</div><div class='add'>+			    const struct sfp_quirk *quirk)</div><div class='add'>+{</div><div class='add'>+	memset(&amp;bus-&gt;caps, 0, sizeof(bus-&gt;caps));</div><div class='add'>+</div><div class='add'>+	sfp_module_parse_support(bus, id);</div><div class='add'>+	sfp_module_parse_port(bus, id);</div><div class='add'>+	sfp_module_parse_may_have_phy(bus, id);</div><div class='ctx'> </div><div class='del'>-	linkmode_or(support, support, modes);</div><div class='add'>+	if (quirk &amp;&amp; quirk-&gt;support)</div><div class='add'>+		quirk-&gt;support(id, &amp;bus-&gt;caps);</div><div class='ctx'> }</div><div class='del'>-EXPORT_SYMBOL_GPL(sfp_parse_support);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * sfp_select_interface() - Select appropriate phy_interface_t mode</div><div class='hunk'>@@ -794,7 +777,7 @@ int sfp_module_insert(struct sfp_bus *bus, const struct sfp_eeprom_id *id,</div><div class='ctx'> 	const struct sfp_upstream_ops *ops = sfp_get_upstream_ops(bus);</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	bus-&gt;sfp_quirk = quirk;</div><div class='add'>+	sfp_init_module(bus, id, quirk);</div><div class='ctx'> </div><div class='ctx'> 	if (ops &amp;&amp; ops-&gt;module_insert)</div><div class='ctx'> 		ret = ops-&gt;module_insert(bus-&gt;upstream, id);</div><div class='hunk'>@@ -809,8 +792,6 @@ void sfp_module_remove(struct sfp_bus *bus)</div><div class='ctx'> </div><div class='ctx'> 	if (ops &amp;&amp; ops-&gt;module_remove)</div><div class='ctx'> 		ops-&gt;module_remove(bus-&gt;upstream);</div><div class='del'>-</div><div class='del'>-	bus-&gt;sfp_quirk = NULL;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(sfp_module_remove);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/sfp.c b/drivers/net/phy/sfp.c<br/>index 7dbcbf0a4ee2..0401fa6b24d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/sfp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/sfp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/sfp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/sfp.c</a></div><div class='hunk'>@@ -17,7 +17,6 @@</div><div class='ctx'> #include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "sfp.h"</div><div class='del'>-#include "swphy.h"</div><div class='ctx'> </div><div class='ctx'> enum {</div><div class='ctx'> 	GPIO_MODDEF0,</div><div class='hunk'>@@ -221,6 +220,8 @@ static const enum gpiod_flags gpio_flags[] = {</div><div class='ctx'>  */</div><div class='ctx'> #define SFP_EEPROM_BLOCK_SIZE	16</div><div class='ctx'> </div><div class='add'>+#define SFP_POLL_INTERVAL	msecs_to_jiffies(100)</div><div class='add'>+</div><div class='ctx'> struct sff_data {</div><div class='ctx'> 	unsigned int gpios;</div><div class='ctx'> 	bool (*module_supported)(const struct sfp_eeprom_id *id);</div><div class='hunk'>@@ -234,6 +235,7 @@ struct sfp {</div><div class='ctx'> 	enum mdio_i2c_proto mdio_protocol;</div><div class='ctx'> 	struct phy_device *mod_phy;</div><div class='ctx'> 	const struct sff_data *type;</div><div class='add'>+	size_t i2c_max_block_size;</div><div class='ctx'> 	size_t i2c_block_size;</div><div class='ctx'> 	u32 max_power_mW;</div><div class='ctx'> </div><div class='hunk'>@@ -298,6 +300,11 @@ struct sfp {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void sfp_schedule_poll(struct sfp *sfp)</div><div class='add'>+{</div><div class='add'>+	mod_delayed_work(system_percpu_wq, &amp;sfp-&gt;poll, SFP_POLL_INTERVAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool sff_module_supported(const struct sfp_eeprom_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	return id-&gt;base.phys_id == SFF8024_ID_SFF_8472 &amp;&amp;</div><div class='hunk'>@@ -360,6 +367,11 @@ static void sfp_fixup_ignore_tx_fault(struct sfp *sfp)</div><div class='ctx'> 	sfp-&gt;state_ignore_mask |= SFP_F_TX_FAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void sfp_fixup_ignore_hw(struct sfp *sfp, unsigned int mask)</div><div class='add'>+{</div><div class='add'>+	sfp-&gt;state_hw_mask &amp;= ~mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void sfp_fixup_nokia(struct sfp *sfp)</div><div class='ctx'> {</div><div class='ctx'> 	sfp_fixup_long_startup(sfp);</div><div class='hunk'>@@ -385,7 +397,7 @@ static void sfp_fixup_rollball(struct sfp *sfp)</div><div class='ctx'> 	sfp-&gt;phy_t_retry = msecs_to_jiffies(1000);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sfp_fixup_fs_2_5gt(struct sfp *sfp)</div><div class='add'>+static void sfp_fixup_rollball_wait4s(struct sfp *sfp)</div><div class='ctx'> {</div><div class='ctx'> 	sfp_fixup_rollball(sfp);</div><div class='ctx'> </div><div class='hunk'>@@ -399,7 +411,7 @@ static void sfp_fixup_fs_2_5gt(struct sfp *sfp)</div><div class='ctx'> static void sfp_fixup_fs_10gt(struct sfp *sfp)</div><div class='ctx'> {</div><div class='ctx'> 	sfp_fixup_10gbaset_30m(sfp);</div><div class='del'>-	sfp_fixup_fs_2_5gt(sfp);</div><div class='add'>+	sfp_fixup_rollball_wait4s(sfp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sfp_fixup_halny_gsfp(struct sfp *sfp)</div><div class='hunk'>@@ -408,7 +420,19 @@ static void sfp_fixup_halny_gsfp(struct sfp *sfp)</div><div class='ctx'> 	 * these are possibly used for other purposes on this</div><div class='ctx'> 	 * module, e.g. a serial port.</div><div class='ctx'> 	 */</div><div class='del'>-	sfp-&gt;state_hw_mask &amp;= ~(SFP_F_TX_FAULT | SFP_F_LOS);</div><div class='add'>+	sfp_fixup_ignore_hw(sfp, SFP_F_TX_FAULT | SFP_F_LOS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sfp_fixup_potron(struct sfp *sfp)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * The TX_FAULT and LOS pins on this device are used for serial</div><div class='add'>+	 * communication, so ignore them. Additionally, provide extra</div><div class='add'>+	 * time for this device to fully start up.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	sfp_fixup_long_startup(sfp);</div><div class='add'>+	sfp_fixup_ignore_hw(sfp, SFP_F_TX_FAULT | SFP_F_LOS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sfp_fixup_rollball_cc(struct sfp *sfp)</div><div class='hunk'>@@ -422,45 +446,44 @@ static void sfp_fixup_rollball_cc(struct sfp *sfp)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sfp_quirk_2500basex(const struct sfp_eeprom_id *id,</div><div class='del'>-				unsigned long *modes,</div><div class='del'>-				unsigned long *interfaces)</div><div class='add'>+				struct sfp_module_caps *caps)</div><div class='ctx'> {</div><div class='del'>-	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, modes);</div><div class='del'>-	__set_bit(PHY_INTERFACE_MODE_2500BASEX, interfaces);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT,</div><div class='add'>+			 caps-&gt;link_modes);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_2500BASEX, caps-&gt;interfaces);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sfp_quirk_disable_autoneg(const struct sfp_eeprom_id *id,</div><div class='del'>-				      unsigned long *modes,</div><div class='del'>-				      unsigned long *interfaces)</div><div class='add'>+				      struct sfp_module_caps *caps)</div><div class='ctx'> {</div><div class='del'>-	linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, modes);</div><div class='add'>+	linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, caps-&gt;link_modes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sfp_quirk_oem_2_5g(const struct sfp_eeprom_id *id,</div><div class='del'>-			       unsigned long *modes,</div><div class='del'>-			       unsigned long *interfaces)</div><div class='add'>+			       struct sfp_module_caps *caps)</div><div class='ctx'> {</div><div class='ctx'> 	/* Copper 2.5G SFP */</div><div class='del'>-	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, modes);</div><div class='del'>-	__set_bit(PHY_INTERFACE_MODE_2500BASEX, interfaces);</div><div class='del'>-	sfp_quirk_disable_autoneg(id, modes, interfaces);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,</div><div class='add'>+			 caps-&gt;link_modes);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_2500BASEX, caps-&gt;interfaces);</div><div class='add'>+	sfp_quirk_disable_autoneg(id, caps);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void sfp_quirk_ubnt_uf_instant(const struct sfp_eeprom_id *id,</div><div class='del'>-				      unsigned long *modes,</div><div class='del'>-				      unsigned long *interfaces)</div><div class='add'>+				      struct sfp_module_caps *caps)</div><div class='ctx'> {</div><div class='ctx'> 	/* Ubiquiti U-Fiber Instant module claims that support all transceiver</div><div class='ctx'> 	 * types including 10G Ethernet which is not truth. So clear all claimed</div><div class='ctx'> 	 * modes and set only one mode which module supports: 1000baseX_Full.</div><div class='ctx'> 	 */</div><div class='del'>-	linkmode_zero(modes);</div><div class='del'>-	linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, modes);</div><div class='add'>+	linkmode_zero(caps-&gt;link_modes);</div><div class='add'>+	linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,</div><div class='add'>+			 caps-&gt;link_modes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define SFP_QUIRK(_v, _p, _m, _f) \</div><div class='del'>-	{ .vendor = _v, .part = _p, .modes = _m, .fixup = _f, }</div><div class='del'>-#define SFP_QUIRK_M(_v, _p, _m) SFP_QUIRK(_v, _p, _m, NULL)</div><div class='add'>+#define SFP_QUIRK(_v, _p, _s, _f) \</div><div class='add'>+	{ .vendor = _v, .part = _p, .support = _s, .fixup = _f, }</div><div class='add'>+#define SFP_QUIRK_S(_v, _p, _s) SFP_QUIRK(_v, _p, _s, NULL)</div><div class='ctx'> #define SFP_QUIRK_F(_v, _p, _f) SFP_QUIRK(_v, _p, NULL, _f)</div><div class='ctx'> </div><div class='ctx'> static const struct sfp_quirk sfp_quirks[] = {</div><div class='hunk'>@@ -474,14 +497,18 @@ static const struct sfp_quirk sfp_quirks[] = {</div><div class='ctx'> 	SFP_QUIRK("ALCATELLUCENT", "3FE46541AA", sfp_quirk_2500basex,</div><div class='ctx'> 		  sfp_fixup_nokia),</div><div class='ctx'> </div><div class='add'>+	// FLYPRO SFP-10GT-CS-30M uses Rollball protocol to talk to the PHY.</div><div class='add'>+	SFP_QUIRK_F("FLYPRO", "SFP-10GT-CS-30M", sfp_fixup_rollball),</div><div class='add'>+</div><div class='ctx'> 	// Fiberstore SFP-10G-T doesn't identify as copper, uses the Rollball</div><div class='ctx'> 	// protocol to talk to the PHY and needs 4 sec wait before probing the</div><div class='ctx'> 	// PHY.</div><div class='ctx'> 	SFP_QUIRK_F("FS", "SFP-10G-T", sfp_fixup_fs_10gt),</div><div class='ctx'> </div><div class='del'>-	// Fiberstore SFP-2.5G-T uses Rollball protocol to talk to the PHY and</div><div class='del'>-	// needs 4 sec wait before probing the PHY.</div><div class='del'>-	SFP_QUIRK_F("FS", "SFP-2.5G-T", sfp_fixup_fs_2_5gt),</div><div class='add'>+	// Fiberstore SFP-2.5G-T and SFP-10GM-T uses Rollball protocol to talk</div><div class='add'>+	// to the PHY and needs 4 sec wait before probing the PHY.</div><div class='add'>+	SFP_QUIRK_F("FS", "SFP-2.5G-T", sfp_fixup_rollball_wait4s),</div><div class='add'>+	SFP_QUIRK_F("FS", "SFP-10GM-T", sfp_fixup_rollball_wait4s),</div><div class='ctx'> </div><div class='ctx'> 	// Fiberstore GPON-ONU-34-20BI can operate at 2500base-X, but report 1.2GBd</div><div class='ctx'> 	// NRZ in their EEPROM</div><div class='hunk'>@@ -492,7 +519,7 @@ static const struct sfp_quirk sfp_quirks[] = {</div><div class='ctx'> </div><div class='ctx'> 	// HG MXPD-483II-F 2.5G supports 2500Base-X, but incorrectly reports</div><div class='ctx'> 	// 2600MBd in their EERPOM</div><div class='del'>-	SFP_QUIRK_M("HG GENUINE", "MXPD-483II", sfp_quirk_2500basex),</div><div class='add'>+	SFP_QUIRK_S("HG GENUINE", "MXPD-483II", sfp_quirk_2500basex),</div><div class='ctx'> </div><div class='ctx'> 	// Huawei MA5671A can operate at 2500base-X, but report 1.2GBd NRZ in</div><div class='ctx'> 	// their EEPROM</div><div class='hunk'>@@ -501,20 +528,24 @@ static const struct sfp_quirk sfp_quirks[] = {</div><div class='ctx'> </div><div class='ctx'> 	// Lantech 8330-262D-E can operate at 2500base-X, but incorrectly report</div><div class='ctx'> 	// 2500MBd NRZ in their EEPROM</div><div class='del'>-	SFP_QUIRK_M("Lantech", "8330-262D-E", sfp_quirk_2500basex),</div><div class='add'>+	SFP_QUIRK_S("Lantech", "8330-262D-E", sfp_quirk_2500basex),</div><div class='ctx'> </div><div class='del'>-	SFP_QUIRK_M("UBNT", "UF-INSTANT", sfp_quirk_ubnt_uf_instant),</div><div class='add'>+	SFP_QUIRK_S("UBNT", "UF-INSTANT", sfp_quirk_ubnt_uf_instant),</div><div class='ctx'> </div><div class='ctx'> 	// Walsun HXSX-ATR[CI]-1 don't identify as copper, and use the</div><div class='ctx'> 	// Rollball protocol to talk to the PHY.</div><div class='ctx'> 	SFP_QUIRK_F("Walsun", "HXSX-ATRC-1", sfp_fixup_fs_10gt),</div><div class='ctx'> 	SFP_QUIRK_F("Walsun", "HXSX-ATRI-1", sfp_fixup_fs_10gt),</div><div class='ctx'> </div><div class='add'>+	SFP_QUIRK_F("YV", "SFP+ONU-XGSPON", sfp_fixup_potron),</div><div class='add'>+</div><div class='ctx'> 	// OEM SFP-GE-T is a 1000Base-T module with broken TX_FAULT indicator</div><div class='ctx'> 	SFP_QUIRK_F("OEM", "SFP-GE-T", sfp_fixup_ignore_tx_fault),</div><div class='ctx'> </div><div class='ctx'> 	SFP_QUIRK_F("OEM", "SFP-10G-T", sfp_fixup_rollball_cc),</div><div class='del'>-	SFP_QUIRK_M("OEM", "SFP-2.5G-T", sfp_quirk_oem_2_5g),</div><div class='add'>+	SFP_QUIRK_S("OEM", "SFP-2.5G-T", sfp_quirk_oem_2_5g),</div><div class='add'>+	SFP_QUIRK_S("OEM", "SFP-2.5G-BX10-D", sfp_quirk_2500basex),</div><div class='add'>+	SFP_QUIRK_S("OEM", "SFP-2.5G-BX10-U", sfp_quirk_2500basex),</div><div class='ctx'> 	SFP_QUIRK_F("OEM", "RTSFP-10", sfp_fixup_rollball_cc),</div><div class='ctx'> 	SFP_QUIRK_F("OEM", "RTSFP-10G", sfp_fixup_rollball_cc),</div><div class='ctx'> 	SFP_QUIRK_F("Turris", "RTSFP-2.5G", sfp_fixup_rollball),</div><div class='hunk'>@@ -562,8 +593,6 @@ static const struct sfp_quirk *sfp_lookup_quirk(const struct sfp_eeprom_id *id)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned long poll_jiffies;</div><div class='del'>-</div><div class='ctx'> static unsigned int sfp_gpio_get_state(struct sfp *sfp)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i, state, v;</div><div class='hunk'>@@ -688,14 +717,71 @@ static int sfp_i2c_write(struct sfp *sfp, bool a2, u8 dev_addr, void *buf,</div><div class='ctx'> 	return ret == ARRAY_SIZE(msgs) ? len : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sfp_i2c_configure(struct sfp *sfp, struct i2c_adapter *i2c)</div><div class='add'>+static int sfp_smbus_byte_read(struct sfp *sfp, bool a2, u8 dev_addr,</div><div class='add'>+			       void *buf, size_t len)</div><div class='ctx'> {</div><div class='del'>-	if (!i2c_check_functionality(i2c, I2C_FUNC_I2C))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	union i2c_smbus_data smbus_data;</div><div class='add'>+	u8 bus_addr = a2 ? 0x51 : 0x50;</div><div class='add'>+	u8 *data = buf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	while (len) {</div><div class='add'>+		ret = i2c_smbus_xfer(sfp-&gt;i2c, bus_addr, 0,</div><div class='add'>+				     I2C_SMBUS_READ, dev_addr,</div><div class='add'>+				     I2C_SMBUS_BYTE_DATA, &amp;smbus_data);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		*data = smbus_data.byte;</div><div class='ctx'> </div><div class='add'>+		len--;</div><div class='add'>+		data++;</div><div class='add'>+		dev_addr++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return data - (u8 *)buf;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sfp_smbus_byte_write(struct sfp *sfp, bool a2, u8 dev_addr,</div><div class='add'>+				void *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	union i2c_smbus_data smbus_data;</div><div class='add'>+	u8 bus_addr = a2 ? 0x51 : 0x50;</div><div class='add'>+	u8 *data = buf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	while (len) {</div><div class='add'>+		smbus_data.byte = *data;</div><div class='add'>+		ret = i2c_smbus_xfer(sfp-&gt;i2c, bus_addr, 0,</div><div class='add'>+				     I2C_SMBUS_WRITE, dev_addr,</div><div class='add'>+				     I2C_SMBUS_BYTE_DATA, &amp;smbus_data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		len--;</div><div class='add'>+		data++;</div><div class='add'>+		dev_addr++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sfp_i2c_configure(struct sfp *sfp, struct i2c_adapter *i2c)</div><div class='add'>+{</div><div class='ctx'> 	sfp-&gt;i2c = i2c;</div><div class='del'>-	sfp-&gt;read = sfp_i2c_read;</div><div class='del'>-	sfp-&gt;write = sfp_i2c_write;</div><div class='add'>+</div><div class='add'>+	if (i2c_check_functionality(i2c, I2C_FUNC_I2C)) {</div><div class='add'>+		sfp-&gt;read = sfp_i2c_read;</div><div class='add'>+		sfp-&gt;write = sfp_i2c_write;</div><div class='add'>+		sfp-&gt;i2c_max_block_size = SFP_EEPROM_BLOCK_SIZE;</div><div class='add'>+	} else if (i2c_check_functionality(i2c, I2C_FUNC_SMBUS_BYTE_DATA)) {</div><div class='add'>+		sfp-&gt;read = sfp_smbus_byte_read;</div><div class='add'>+		sfp-&gt;write = sfp_smbus_byte_write;</div><div class='add'>+		sfp-&gt;i2c_max_block_size = 1;</div><div class='add'>+	} else {</div><div class='add'>+		sfp-&gt;i2c = NULL;</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -829,7 +915,7 @@ static void sfp_soft_start_poll(struct sfp *sfp)</div><div class='ctx'> </div><div class='ctx'> 	if (sfp-&gt;state_soft_mask &amp; (SFP_F_LOS | SFP_F_TX_FAULT) &amp;&amp;</div><div class='ctx'> 	    !sfp-&gt;need_poll)</div><div class='del'>-		mod_delayed_work(system_wq, &amp;sfp-&gt;poll, poll_jiffies);</div><div class='add'>+		sfp_schedule_poll(sfp);</div><div class='ctx'> 	mutex_unlock(&amp;sfp-&gt;st_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1591,7 +1677,7 @@ static void sfp_hwmon_probe(struct work_struct *work)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (sfp-&gt;i2c_block_size &lt; 2) {</div><div class='ctx'> 		dev_info(sfp-&gt;dev,</div><div class='del'>-			 "skipping hwmon device registration due to broken EEPROM\n");</div><div class='add'>+			 "skipping hwmon device registration\n");</div><div class='ctx'> 		dev_info(sfp-&gt;dev,</div><div class='ctx'> 			 "diagnostic EEPROM area cannot be read atomically to guarantee data coherency\n");</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -1600,7 +1686,7 @@ static void sfp_hwmon_probe(struct work_struct *work)</div><div class='ctx'> 	err = sfp_read(sfp, true, 0, &amp;sfp-&gt;diag, sizeof(sfp-&gt;diag));</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		if (sfp-&gt;hwmon_tries--) {</div><div class='del'>-			mod_delayed_work(system_wq, &amp;sfp-&gt;hwmon_probe,</div><div class='add'>+			mod_delayed_work(system_percpu_wq, &amp;sfp-&gt;hwmon_probe,</div><div class='ctx'> 					 T_PROBE_RETRY_SLOW);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			dev_warn(sfp-&gt;dev, "hwmon probe failed: %pe\n",</div><div class='hunk'>@@ -1627,7 +1713,7 @@ static void sfp_hwmon_probe(struct work_struct *work)</div><div class='ctx'> static int sfp_hwmon_insert(struct sfp *sfp)</div><div class='ctx'> {</div><div class='ctx'> 	if (sfp-&gt;have_a2 &amp;&amp; sfp-&gt;id.ext.diagmon &amp; SFP_DIAGMON_DDM) {</div><div class='del'>-		mod_delayed_work(system_wq, &amp;sfp-&gt;hwmon_probe, 1);</div><div class='add'>+		mod_delayed_work(system_percpu_wq, &amp;sfp-&gt;hwmon_probe, 1);</div><div class='ctx'> 		sfp-&gt;hwmon_tries = R_PROBE_RETRY_SLOW;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2198,7 +2284,7 @@ static int sfp_sm_mod_probe(struct sfp *sfp, bool report)</div><div class='ctx'> 	u8 check;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	sfp-&gt;i2c_block_size = SFP_EEPROM_BLOCK_SIZE;</div><div class='add'>+	sfp-&gt;i2c_block_size = sfp-&gt;i2c_max_block_size;</div><div class='ctx'> </div><div class='ctx'> 	ret = sfp_read(sfp, false, 0, &amp;id.base, sizeof(id.base));</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='hunk'>@@ -2481,7 +2567,7 @@ static void sfp_sm_module(struct sfp *sfp, unsigned int event)</div><div class='ctx'> 		/* Force a poll to re-read the hardware signal state after</div><div class='ctx'> 		 * sfp_sm_mod_probe() changed state_hw_mask.</div><div class='ctx'> 		 */</div><div class='del'>-		mod_delayed_work(system_wq, &amp;sfp-&gt;poll, 1);</div><div class='add'>+		mod_delayed_work(system_percpu_wq, &amp;sfp-&gt;poll, 1);</div><div class='ctx'> </div><div class='ctx'> 		err = sfp_hwmon_insert(sfp);</div><div class='ctx'> 		if (err)</div><div class='hunk'>@@ -2926,7 +3012,7 @@ static void sfp_poll(struct work_struct *work)</div><div class='ctx'> 	// it's unimportant if we race while reading this.</div><div class='ctx'> 	if (sfp-&gt;state_soft_mask &amp; (SFP_F_LOS | SFP_F_TX_FAULT) ||</div><div class='ctx'> 	    sfp-&gt;need_poll)</div><div class='del'>-		mod_delayed_work(system_wq, &amp;sfp-&gt;poll, poll_jiffies);</div><div class='add'>+		sfp_schedule_poll(sfp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct sfp *sfp_alloc(struct device *dev)</div><div class='hunk'>@@ -2938,7 +3024,6 @@ static struct sfp *sfp_alloc(struct device *dev)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='ctx'> 	sfp-&gt;dev = dev;</div><div class='del'>-	sfp-&gt;i2c_block_size = SFP_EEPROM_BLOCK_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;sfp-&gt;sm_mutex);</div><div class='ctx'> 	mutex_init(&amp;sfp-&gt;st_mutex);</div><div class='hunk'>@@ -3097,7 +3182,7 @@ static int sfp_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (sfp-&gt;need_poll)</div><div class='del'>-		mod_delayed_work(system_wq, &amp;sfp-&gt;poll, poll_jiffies);</div><div class='add'>+		sfp_schedule_poll(sfp);</div><div class='ctx'> </div><div class='ctx'> 	/* We could have an issue in cases no Tx disable pin is available or</div><div class='ctx'> 	 * wired as modules using a laser as their light source will continue to</div><div class='hunk'>@@ -3112,6 +3197,15 @@ static int sfp_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (!sfp-&gt;sfp_bus)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	if (sfp-&gt;i2c_max_block_size &lt; 2)</div><div class='add'>+		dev_warn(sfp-&gt;dev,</div><div class='add'>+			 "Please note:\n"</div><div class='add'>+			 "This SFP cage is accessed via an SMBus only capable of single byte\n"</div><div class='add'>+			 "transactions. Some features are disabled, other may be unreliable or\n"</div><div class='add'>+			 "sporadically fail. Use with caution. There is nothing that the kernel\n"</div><div class='add'>+			 "or community can do to fix it, the kernel will try best efforts. Please\n"</div><div class='add'>+			 "verify any problems on hardware that supports multi-byte I2C transactions.\n");</div><div class='add'>+</div><div class='ctx'> 	sfp_debugfs_init(sfp);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3155,19 +3249,7 @@ static struct platform_driver sfp_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int sfp_init(void)</div><div class='del'>-{</div><div class='del'>-	poll_jiffies = msecs_to_jiffies(100);</div><div class='del'>-</div><div class='del'>-	return platform_driver_register(&amp;sfp_driver);</div><div class='del'>-}</div><div class='del'>-module_init(sfp_init);</div><div class='del'>-</div><div class='del'>-static void sfp_exit(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;sfp_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(sfp_exit);</div><div class='add'>+module_platform_driver(sfp_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_ALIAS("platform:sfp");</div><div class='ctx'> MODULE_AUTHOR("Russell King");</div><div class='head'>diff --git a/drivers/net/phy/sfp.h b/drivers/net/phy/sfp.h<br/>index 1fd097dccb9f..879dff7afe6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/sfp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/sfp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/sfp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/sfp.h</a></div><div class='hunk'>@@ -9,8 +9,8 @@ struct sfp;</div><div class='ctx'> struct sfp_quirk {</div><div class='ctx'> 	const char *vendor;</div><div class='ctx'> 	const char *part;</div><div class='del'>-	void (*modes)(const struct sfp_eeprom_id *id, unsigned long *modes,</div><div class='del'>-		      unsigned long *interfaces);</div><div class='add'>+	void (*support)(const struct sfp_eeprom_id *id,</div><div class='add'>+			struct sfp_module_caps *caps);</div><div class='ctx'> 	void (*fixup)(struct sfp *sfp);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c<br/>index e1853599d9ba..48487149c225 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/smsc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/smsc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/smsc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/smsc.c</a></div><div class='hunk'>@@ -155,10 +155,29 @@ static int smsc_phy_reset(struct phy_device *phydev)</div><div class='ctx'> </div><div class='ctx'> static int lan87xx_config_aneg(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='del'>-	int rc;</div><div class='add'>+	u8 mdix_ctrl;</div><div class='ctx'> 	int val;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='del'>-	switch (phydev-&gt;mdix_ctrl) {</div><div class='add'>+	/* When auto-negotiation is disabled (forced mode), the PHY's</div><div class='add'>+	 * Auto-MDIX will continue toggling the TX/RX pairs.</div><div class='add'>+	 *</div><div class='add'>+	 * To establish a stable link, we must select a fixed MDI mode.</div><div class='add'>+	 * If the user has not specified a fixed MDI mode (i.e., mdix_ctrl is</div><div class='add'>+	 * 'auto'), we default to ETH_TP_MDI. This choice of a ETH_TP_MDI mode</div><div class='add'>+	 * mirrors the behavior the hardware would exhibit if the AUTOMDIX_EN</div><div class='add'>+	 * strap were configured for a fixed MDI connection.</div><div class='add'>+	 */</div><div class='add'>+	if (phydev-&gt;autoneg == AUTONEG_DISABLE) {</div><div class='add'>+		if (phydev-&gt;mdix_ctrl == ETH_TP_MDI_AUTO)</div><div class='add'>+			mdix_ctrl = ETH_TP_MDI;</div><div class='add'>+		else</div><div class='add'>+			mdix_ctrl = phydev-&gt;mdix_ctrl;</div><div class='add'>+	} else {</div><div class='add'>+		mdix_ctrl = phydev-&gt;mdix_ctrl;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (mdix_ctrl) {</div><div class='ctx'> 	case ETH_TP_MDI:</div><div class='ctx'> 		val = SPECIAL_CTRL_STS_OVRRD_AMDIX_;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -167,7 +186,8 @@ static int lan87xx_config_aneg(struct phy_device *phydev)</div><div class='ctx'> 			SPECIAL_CTRL_STS_AMDIX_STATE_;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ETH_TP_MDI_AUTO:</div><div class='del'>-		val = SPECIAL_CTRL_STS_AMDIX_ENABLE_;</div><div class='add'>+		val = SPECIAL_CTRL_STS_OVRRD_AMDIX_ |</div><div class='add'>+			SPECIAL_CTRL_STS_AMDIX_ENABLE_;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return genphy_config_aneg(phydev);</div><div class='hunk'>@@ -183,7 +203,7 @@ static int lan87xx_config_aneg(struct phy_device *phydev)</div><div class='ctx'> 	rc |= val;</div><div class='ctx'> 	phy_write(phydev, SPECIAL_CTRL_STS, rc);</div><div class='ctx'> </div><div class='del'>-	phydev-&gt;mdix = phydev-&gt;mdix_ctrl;</div><div class='add'>+	phydev-&gt;mdix = mdix_ctrl;</div><div class='ctx'> 	return genphy_config_aneg(phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -261,6 +281,33 @@ int lan87xx_read_status(struct phy_device *phydev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(lan87xx_read_status);</div><div class='ctx'> </div><div class='add'>+static int lan87xx_phy_config_init(struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* The LAN87xx PHY's initial MDI-X mode is determined by the AUTOMDIX_EN</div><div class='add'>+	 * hardware strap, but the driver cannot read the strap's status. This</div><div class='add'>+	 * creates an unpredictable initial state.</div><div class='add'>+	 *</div><div class='add'>+	 * To ensure consistent and reliable behavior across all boards,</div><div class='add'>+	 * override the strap configuration on initialization and force the PHY</div><div class='add'>+	 * into a known state with Auto-MDIX enabled, which is the expected</div><div class='add'>+	 * default for modern hardware.</div><div class='add'>+	 */</div><div class='add'>+	rc = phy_modify(phydev, SPECIAL_CTRL_STS,</div><div class='add'>+			SPECIAL_CTRL_STS_OVRRD_AMDIX_ |</div><div class='add'>+			SPECIAL_CTRL_STS_AMDIX_ENABLE_ |</div><div class='add'>+			SPECIAL_CTRL_STS_AMDIX_STATE_,</div><div class='add'>+			SPECIAL_CTRL_STS_OVRRD_AMDIX_ |</div><div class='add'>+			SPECIAL_CTRL_STS_AMDIX_ENABLE_);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	phydev-&gt;mdix_ctrl = ETH_TP_MDI_AUTO;</div><div class='add'>+</div><div class='add'>+	return smsc_phy_config_init(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int lan874x_phy_config_init(struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	u16 val;</div><div class='hunk'>@@ -695,7 +742,7 @@ static struct phy_driver smsc_phy_driver[] = {</div><div class='ctx'> </div><div class='ctx'> 	/* basic functions */</div><div class='ctx'> 	.read_status	= lan87xx_read_status,</div><div class='del'>-	.config_init	= smsc_phy_config_init,</div><div class='add'>+	.config_init	= lan87xx_phy_config_init,</div><div class='ctx'> 	.soft_reset	= smsc_phy_reset,</div><div class='ctx'> 	.config_aneg	= lan87xx_config_aneg,</div><div class='ctx'> </div><div class='hunk'>@@ -738,6 +785,7 @@ static struct phy_driver smsc_phy_driver[] = {</div><div class='ctx'> </div><div class='ctx'> 	/* PHY_BASIC_FEATURES */</div><div class='ctx'> </div><div class='add'>+	.flags		= PHY_RST_AFTER_CLK_EN,</div><div class='ctx'> 	.probe		= smsc_phy_probe,</div><div class='ctx'> </div><div class='ctx'> 	/* basic functions */</div><div class='hunk'>@@ -838,7 +886,7 @@ MODULE_DESCRIPTION("SMSC PHY driver");</div><div class='ctx'> MODULE_AUTHOR("Herbert Valerio Riedel");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused smsc_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused smsc_tbl[] = {</div><div class='ctx'> 	{ 0x0007c0a0, 0xfffffff0 },</div><div class='ctx'> 	{ 0x0007c0b0, 0xfffffff0 },</div><div class='ctx'> 	{ 0x0007c0c0, 0xfffffff0 },</div><div class='head'>diff --git a/drivers/net/phy/spi_ks8995.c b/drivers/net/phy/spi_ks8995.c<br/>deleted file mode 100644<br/>index 7196e927c2cd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/spi_ks8995.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/spi_ks8995.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,506 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0</div><div class='del'>-/*</div><div class='del'>- * SPI driver for Micrel/Kendin KS8995M and KSZ8864RMN ethernet switches</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2008 Gabor Juhos &lt;juhosg at openwrt.org&gt;</div><div class='del'>- *</div><div class='del'>- * This file was based on: drivers/spi/at25.c</div><div class='del'>- *     Copyright (C) 2006 David Brownell</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/gpio/consumer.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/spi/spi.h&gt;</div><div class='del'>-</div><div class='del'>-#define DRV_VERSION		"0.1.1"</div><div class='del'>-#define DRV_DESC		"Micrel KS8995 Ethernet switch SPI driver"</div><div class='del'>-</div><div class='del'>-/* ------------------------------------------------------------------------ */</div><div class='del'>-</div><div class='del'>-#define KS8995_REG_ID0		0x00    /* Chip ID0 */</div><div class='del'>-#define KS8995_REG_ID1		0x01    /* Chip ID1 */</div><div class='del'>-</div><div class='del'>-#define KS8995_REG_GC0		0x02    /* Global Control 0 */</div><div class='del'>-#define KS8995_REG_GC1		0x03    /* Global Control 1 */</div><div class='del'>-#define KS8995_REG_GC2		0x04    /* Global Control 2 */</div><div class='del'>-#define KS8995_REG_GC3		0x05    /* Global Control 3 */</div><div class='del'>-#define KS8995_REG_GC4		0x06    /* Global Control 4 */</div><div class='del'>-#define KS8995_REG_GC5		0x07    /* Global Control 5 */</div><div class='del'>-#define KS8995_REG_GC6		0x08    /* Global Control 6 */</div><div class='del'>-#define KS8995_REG_GC7		0x09    /* Global Control 7 */</div><div class='del'>-#define KS8995_REG_GC8		0x0a    /* Global Control 8 */</div><div class='del'>-#define KS8995_REG_GC9		0x0b    /* Global Control 9 */</div><div class='del'>-</div><div class='del'>-#define KS8995_REG_PC(p, r)	((0x10 * p) + r)	 /* Port Control */</div><div class='del'>-#define KS8995_REG_PS(p, r)	((0x10 * p) + r + 0xe)  /* Port Status */</div><div class='del'>-</div><div class='del'>-#define KS8995_REG_TPC0		0x60    /* TOS Priority Control 0 */</div><div class='del'>-#define KS8995_REG_TPC1		0x61    /* TOS Priority Control 1 */</div><div class='del'>-#define KS8995_REG_TPC2		0x62    /* TOS Priority Control 2 */</div><div class='del'>-#define KS8995_REG_TPC3		0x63    /* TOS Priority Control 3 */</div><div class='del'>-#define KS8995_REG_TPC4		0x64    /* TOS Priority Control 4 */</div><div class='del'>-#define KS8995_REG_TPC5		0x65    /* TOS Priority Control 5 */</div><div class='del'>-#define KS8995_REG_TPC6		0x66    /* TOS Priority Control 6 */</div><div class='del'>-#define KS8995_REG_TPC7		0x67    /* TOS Priority Control 7 */</div><div class='del'>-</div><div class='del'>-#define KS8995_REG_MAC0		0x68    /* MAC address 0 */</div><div class='del'>-#define KS8995_REG_MAC1		0x69    /* MAC address 1 */</div><div class='del'>-#define KS8995_REG_MAC2		0x6a    /* MAC address 2 */</div><div class='del'>-#define KS8995_REG_MAC3		0x6b    /* MAC address 3 */</div><div class='del'>-#define KS8995_REG_MAC4		0x6c    /* MAC address 4 */</div><div class='del'>-#define KS8995_REG_MAC5		0x6d    /* MAC address 5 */</div><div class='del'>-</div><div class='del'>-#define KS8995_REG_IAC0		0x6e    /* Indirect Access Control 0 */</div><div class='del'>-#define KS8995_REG_IAC1		0x6f    /* Indirect Access Control 0 */</div><div class='del'>-#define KS8995_REG_IAD7		0x70    /* Indirect Access Data 7 */</div><div class='del'>-#define KS8995_REG_IAD6		0x71    /* Indirect Access Data 6 */</div><div class='del'>-#define KS8995_REG_IAD5		0x72    /* Indirect Access Data 5 */</div><div class='del'>-#define KS8995_REG_IAD4		0x73    /* Indirect Access Data 4 */</div><div class='del'>-#define KS8995_REG_IAD3		0x74    /* Indirect Access Data 3 */</div><div class='del'>-#define KS8995_REG_IAD2		0x75    /* Indirect Access Data 2 */</div><div class='del'>-#define KS8995_REG_IAD1		0x76    /* Indirect Access Data 1 */</div><div class='del'>-#define KS8995_REG_IAD0		0x77    /* Indirect Access Data 0 */</div><div class='del'>-</div><div class='del'>-#define KSZ8864_REG_ID1		0xfe	/* Chip ID in bit 7 */</div><div class='del'>-</div><div class='del'>-#define KS8995_REGS_SIZE	0x80</div><div class='del'>-#define KSZ8864_REGS_SIZE	0x100</div><div class='del'>-#define KSZ8795_REGS_SIZE	0x100</div><div class='del'>-</div><div class='del'>-#define ID1_CHIPID_M		0xf</div><div class='del'>-#define ID1_CHIPID_S		4</div><div class='del'>-#define ID1_REVISION_M		0x7</div><div class='del'>-#define ID1_REVISION_S		1</div><div class='del'>-#define ID1_START_SW		1	/* start the switch */</div><div class='del'>-</div><div class='del'>-#define FAMILY_KS8995		0x95</div><div class='del'>-#define FAMILY_KSZ8795		0x87</div><div class='del'>-#define CHIPID_M		0</div><div class='del'>-#define KS8995_CHIP_ID		0x00</div><div class='del'>-#define KSZ8864_CHIP_ID		0x01</div><div class='del'>-#define KSZ8795_CHIP_ID		0x09</div><div class='del'>-</div><div class='del'>-#define KS8995_CMD_WRITE	0x02U</div><div class='del'>-#define KS8995_CMD_READ		0x03U</div><div class='del'>-</div><div class='del'>-#define KS8995_RESET_DELAY	10 /* usec */</div><div class='del'>-</div><div class='del'>-enum ks8995_chip_variant {</div><div class='del'>-	ks8995,</div><div class='del'>-	ksz8864,</div><div class='del'>-	ksz8795,</div><div class='del'>-	max_variant</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ks8995_chip_params {</div><div class='del'>-	char *name;</div><div class='del'>-	int family_id;</div><div class='del'>-	int chip_id;</div><div class='del'>-	int regs_size;</div><div class='del'>-	int addr_width;</div><div class='del'>-	int addr_shift;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct ks8995_chip_params ks8995_chip[] = {</div><div class='del'>-	[ks8995] = {</div><div class='del'>-		.name = "KS8995MA",</div><div class='del'>-		.family_id = FAMILY_KS8995,</div><div class='del'>-		.chip_id = KS8995_CHIP_ID,</div><div class='del'>-		.regs_size = KS8995_REGS_SIZE,</div><div class='del'>-		.addr_width = 8,</div><div class='del'>-		.addr_shift = 0,</div><div class='del'>-	},</div><div class='del'>-	[ksz8864] = {</div><div class='del'>-		.name = "KSZ8864RMN",</div><div class='del'>-		.family_id = FAMILY_KS8995,</div><div class='del'>-		.chip_id = KSZ8864_CHIP_ID,</div><div class='del'>-		.regs_size = KSZ8864_REGS_SIZE,</div><div class='del'>-		.addr_width = 8,</div><div class='del'>-		.addr_shift = 0,</div><div class='del'>-	},</div><div class='del'>-	[ksz8795] = {</div><div class='del'>-		.name = "KSZ8795CLX",</div><div class='del'>-		.family_id = FAMILY_KSZ8795,</div><div class='del'>-		.chip_id = KSZ8795_CHIP_ID,</div><div class='del'>-		.regs_size = KSZ8795_REGS_SIZE,</div><div class='del'>-		.addr_width = 12,</div><div class='del'>-		.addr_shift = 1,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct ks8995_switch {</div><div class='del'>-	struct spi_device	*spi;</div><div class='del'>-	struct mutex		lock;</div><div class='del'>-	struct gpio_desc	*reset_gpio;</div><div class='del'>-	struct bin_attribute	regs_attr;</div><div class='del'>-	const struct ks8995_chip_params	*chip;</div><div class='del'>-	int			revision_id;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct spi_device_id ks8995_id[] = {</div><div class='del'>-	{"ks8995", ks8995},</div><div class='del'>-	{"ksz8864", ksz8864},</div><div class='del'>-	{"ksz8795", ksz8795},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(spi, ks8995_id);</div><div class='del'>-</div><div class='del'>-static const struct of_device_id ks8895_spi_of_match[] = {</div><div class='del'>-	{ .compatible = "micrel,ks8995" },</div><div class='del'>-	{ .compatible = "micrel,ksz8864" },</div><div class='del'>-	{ .compatible = "micrel,ksz8795" },</div><div class='del'>-	{ },</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(of, ks8895_spi_of_match);</div><div class='del'>-</div><div class='del'>-static inline u8 get_chip_id(u8 val)</div><div class='del'>-{</div><div class='del'>-	return (val &gt;&gt; ID1_CHIPID_S) &amp; ID1_CHIPID_M;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u8 get_chip_rev(u8 val)</div><div class='del'>-{</div><div class='del'>-	return (val &gt;&gt; ID1_REVISION_S) &amp; ID1_REVISION_M;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* create_spi_cmd - create a chip specific SPI command header</div><div class='del'>- * @ks: pointer to switch instance</div><div class='del'>- * @cmd: SPI command for switch</div><div class='del'>- * @address: register address for command</div><div class='del'>- *</div><div class='del'>- * Different chip families use different bit pattern to address the switches</div><div class='del'>- * registers:</div><div class='del'>- *</div><div class='del'>- * KS8995: 8bit command + 8bit address</div><div class='del'>- * KSZ8795: 3bit command + 12bit address + 1bit TR (?)</div><div class='del'>- */</div><div class='del'>-static inline __be16 create_spi_cmd(struct ks8995_switch *ks, int cmd,</div><div class='del'>-				    unsigned address)</div><div class='del'>-{</div><div class='del'>-	u16 result = cmd;</div><div class='del'>-</div><div class='del'>-	/* make room for address (incl. address shift) */</div><div class='del'>-	result &lt;&lt;= ks-&gt;chip-&gt;addr_width + ks-&gt;chip-&gt;addr_shift;</div><div class='del'>-	/* add address */</div><div class='del'>-	result |= address &lt;&lt; ks-&gt;chip-&gt;addr_shift;</div><div class='del'>-	/* SPI protocol needs big endian */</div><div class='del'>-	return cpu_to_be16(result);</div><div class='del'>-}</div><div class='del'>-/* ------------------------------------------------------------------------ */</div><div class='del'>-static int ks8995_read(struct ks8995_switch *ks, char *buf,</div><div class='del'>-		 unsigned offset, size_t count)</div><div class='del'>-{</div><div class='del'>-	__be16 cmd;</div><div class='del'>-	struct spi_transfer t[2];</div><div class='del'>-	struct spi_message m;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	cmd = create_spi_cmd(ks, KS8995_CMD_READ, offset);</div><div class='del'>-	spi_message_init(&amp;m);</div><div class='del'>-</div><div class='del'>-	memset(&amp;t, 0, sizeof(t));</div><div class='del'>-</div><div class='del'>-	t[0].tx_buf = &amp;cmd;</div><div class='del'>-	t[0].len = sizeof(cmd);</div><div class='del'>-	spi_message_add_tail(&amp;t[0], &amp;m);</div><div class='del'>-</div><div class='del'>-	t[1].rx_buf = buf;</div><div class='del'>-	t[1].len = count;</div><div class='del'>-	spi_message_add_tail(&amp;t[1], &amp;m);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ks-&gt;lock);</div><div class='del'>-	err = spi_sync(ks-&gt;spi, &amp;m);</div><div class='del'>-	mutex_unlock(&amp;ks-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return err ? err : count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ks8995_write(struct ks8995_switch *ks, char *buf,</div><div class='del'>-		 unsigned offset, size_t count)</div><div class='del'>-{</div><div class='del'>-	__be16 cmd;</div><div class='del'>-	struct spi_transfer t[2];</div><div class='del'>-	struct spi_message m;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	cmd = create_spi_cmd(ks, KS8995_CMD_WRITE, offset);</div><div class='del'>-	spi_message_init(&amp;m);</div><div class='del'>-</div><div class='del'>-	memset(&amp;t, 0, sizeof(t));</div><div class='del'>-</div><div class='del'>-	t[0].tx_buf = &amp;cmd;</div><div class='del'>-	t[0].len = sizeof(cmd);</div><div class='del'>-	spi_message_add_tail(&amp;t[0], &amp;m);</div><div class='del'>-</div><div class='del'>-	t[1].tx_buf = buf;</div><div class='del'>-	t[1].len = count;</div><div class='del'>-	spi_message_add_tail(&amp;t[1], &amp;m);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ks-&gt;lock);</div><div class='del'>-	err = spi_sync(ks-&gt;spi, &amp;m);</div><div class='del'>-	mutex_unlock(&amp;ks-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return err ? err : count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int ks8995_read_reg(struct ks8995_switch *ks, u8 addr, u8 *buf)</div><div class='del'>-{</div><div class='del'>-	return ks8995_read(ks, buf, addr, 1) != 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int ks8995_write_reg(struct ks8995_switch *ks, u8 addr, u8 val)</div><div class='del'>-{</div><div class='del'>-	char buf = val;</div><div class='del'>-</div><div class='del'>-	return ks8995_write(ks, &amp;buf, addr, 1) != 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* ------------------------------------------------------------------------ */</div><div class='del'>-</div><div class='del'>-static int ks8995_stop(struct ks8995_switch *ks)</div><div class='del'>-{</div><div class='del'>-	return ks8995_write_reg(ks, KS8995_REG_ID1, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ks8995_start(struct ks8995_switch *ks)</div><div class='del'>-{</div><div class='del'>-	return ks8995_write_reg(ks, KS8995_REG_ID1, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ks8995_reset(struct ks8995_switch *ks)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = ks8995_stop(ks);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	udelay(KS8995_RESET_DELAY);</div><div class='del'>-</div><div class='del'>-	return ks8995_start(ks);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ks8995_registers_read(struct file *filp, struct kobject *kobj,</div><div class='del'>-	struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count)</div><div class='del'>-{</div><div class='del'>-	struct device *dev;</div><div class='del'>-	struct ks8995_switch *ks8995;</div><div class='del'>-</div><div class='del'>-	dev = kobj_to_dev(kobj);</div><div class='del'>-	ks8995 = dev_get_drvdata(dev);</div><div class='del'>-</div><div class='del'>-	return ks8995_read(ks8995, buf, off, count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t ks8995_registers_write(struct file *filp, struct kobject *kobj,</div><div class='del'>-	struct bin_attribute *bin_attr, char *buf, loff_t off, size_t count)</div><div class='del'>-{</div><div class='del'>-	struct device *dev;</div><div class='del'>-	struct ks8995_switch *ks8995;</div><div class='del'>-</div><div class='del'>-	dev = kobj_to_dev(kobj);</div><div class='del'>-	ks8995 = dev_get_drvdata(dev);</div><div class='del'>-</div><div class='del'>-	return ks8995_write(ks8995, buf, off, count);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* ks8995_get_revision - get chip revision</div><div class='del'>- * @ks: pointer to switch instance</div><div class='del'>- *</div><div class='del'>- * Verify chip family and id and get chip revision.</div><div class='del'>- */</div><div class='del'>-static int ks8995_get_revision(struct ks8995_switch *ks)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	u8 id0, id1, ksz8864_id;</div><div class='del'>-</div><div class='del'>-	/* read family id */</div><div class='del'>-	err = ks8995_read_reg(ks, KS8995_REG_ID0, &amp;id0);</div><div class='del'>-	if (err) {</div><div class='del'>-		err = -EIO;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* verify family id */</div><div class='del'>-	if (id0 != ks-&gt;chip-&gt;family_id) {</div><div class='del'>-		dev_err(&amp;ks-&gt;spi-&gt;dev, "chip family id mismatch: expected 0x%02x but 0x%02x read\n",</div><div class='del'>-			ks-&gt;chip-&gt;family_id, id0);</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (ks-&gt;chip-&gt;family_id) {</div><div class='del'>-	case FAMILY_KS8995:</div><div class='del'>-		/* try reading chip id at CHIP ID1 */</div><div class='del'>-		err = ks8995_read_reg(ks, KS8995_REG_ID1, &amp;id1);</div><div class='del'>-		if (err) {</div><div class='del'>-			err = -EIO;</div><div class='del'>-			goto err_out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* verify chip id */</div><div class='del'>-		if ((get_chip_id(id1) == CHIPID_M) &amp;&amp;</div><div class='del'>-		    (get_chip_id(id1) == ks-&gt;chip-&gt;chip_id)) {</div><div class='del'>-			/* KS8995MA */</div><div class='del'>-			ks-&gt;revision_id = get_chip_rev(id1);</div><div class='del'>-		} else if (get_chip_id(id1) != CHIPID_M) {</div><div class='del'>-			/* KSZ8864RMN */</div><div class='del'>-			err = ks8995_read_reg(ks, KS8995_REG_ID1, &amp;ksz8864_id);</div><div class='del'>-			if (err) {</div><div class='del'>-				err = -EIO;</div><div class='del'>-				goto err_out;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if ((ksz8864_id &amp; 0x80) &amp;&amp;</div><div class='del'>-			    (ks-&gt;chip-&gt;chip_id == KSZ8864_CHIP_ID)) {</div><div class='del'>-				ks-&gt;revision_id = get_chip_rev(id1);</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-		} else {</div><div class='del'>-			dev_err(&amp;ks-&gt;spi-&gt;dev, "unsupported chip id for KS8995 family: 0x%02x\n",</div><div class='del'>-				id1);</div><div class='del'>-			err = -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case FAMILY_KSZ8795:</div><div class='del'>-		/* try reading chip id at CHIP ID1 */</div><div class='del'>-		err = ks8995_read_reg(ks, KS8995_REG_ID1, &amp;id1);</div><div class='del'>-		if (err) {</div><div class='del'>-			err = -EIO;</div><div class='del'>-			goto err_out;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (get_chip_id(id1) == ks-&gt;chip-&gt;chip_id) {</div><div class='del'>-			ks-&gt;revision_id = get_chip_rev(id1);</div><div class='del'>-		} else {</div><div class='del'>-			dev_err(&amp;ks-&gt;spi-&gt;dev, "unsupported chip id for KSZ8795 family: 0x%02x\n",</div><div class='del'>-				id1);</div><div class='del'>-			err = -ENODEV;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(&amp;ks-&gt;spi-&gt;dev, "unsupported family id: 0x%02x\n", id0);</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-err_out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct bin_attribute ks8995_registers_attr = {</div><div class='del'>-	.attr = {</div><div class='del'>-		.name   = "registers",</div><div class='del'>-		.mode   = 0600,</div><div class='del'>-	},</div><div class='del'>-	.size   = KS8995_REGS_SIZE,</div><div class='del'>-	.read   = ks8995_registers_read,</div><div class='del'>-	.write  = ks8995_registers_write,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* ------------------------------------------------------------------------ */</div><div class='del'>-static int ks8995_probe(struct spi_device *spi)</div><div class='del'>-{</div><div class='del'>-	struct ks8995_switch *ks;</div><div class='del'>-	int err;</div><div class='del'>-	int variant = spi_get_device_id(spi)-&gt;driver_data;</div><div class='del'>-</div><div class='del'>-	if (variant &gt;= max_variant) {</div><div class='del'>-		dev_err(&amp;spi-&gt;dev, "bad chip variant %d\n", variant);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ks = devm_kzalloc(&amp;spi-&gt;dev, sizeof(*ks), GFP_KERNEL);</div><div class='del'>-	if (!ks)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;ks-&gt;lock);</div><div class='del'>-	ks-&gt;spi = spi;</div><div class='del'>-	ks-&gt;chip = &amp;ks8995_chip[variant];</div><div class='del'>-</div><div class='del'>-	ks-&gt;reset_gpio = devm_gpiod_get_optional(&amp;spi-&gt;dev, "reset",</div><div class='del'>-						 GPIOD_OUT_HIGH);</div><div class='del'>-	err = PTR_ERR_OR_ZERO(ks-&gt;reset_gpio);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;spi-&gt;dev,</div><div class='del'>-			"failed to get reset gpio: %d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = gpiod_set_consumer_name(ks-&gt;reset_gpio, "switch-reset");</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* de-assert switch reset */</div><div class='del'>-	/* FIXME: this likely requires a delay */</div><div class='del'>-	gpiod_set_value_cansleep(ks-&gt;reset_gpio, 0);</div><div class='del'>-</div><div class='del'>-	spi_set_drvdata(spi, ks);</div><div class='del'>-</div><div class='del'>-	spi-&gt;mode = SPI_MODE_0;</div><div class='del'>-	spi-&gt;bits_per_word = 8;</div><div class='del'>-	err = spi_setup(spi);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;spi-&gt;dev, "spi_setup failed, err=%d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = ks8995_get_revision(ks);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;ks-&gt;regs_attr, &amp;ks8995_registers_attr, sizeof(ks-&gt;regs_attr));</div><div class='del'>-	ks-&gt;regs_attr.size = ks-&gt;chip-&gt;regs_size;</div><div class='del'>-</div><div class='del'>-	err = ks8995_reset(ks);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	sysfs_attr_init(&amp;ks-&gt;regs_attr.attr);</div><div class='del'>-	err = sysfs_create_bin_file(&amp;spi-&gt;dev.kobj, &amp;ks-&gt;regs_attr);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;spi-&gt;dev, "unable to create sysfs file, err=%d\n",</div><div class='del'>-				    err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_info(&amp;spi-&gt;dev, "%s device found, Chip ID:%x, Revision:%x\n",</div><div class='del'>-		 ks-&gt;chip-&gt;name, ks-&gt;chip-&gt;chip_id, ks-&gt;revision_id);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ks8995_remove(struct spi_device *spi)</div><div class='del'>-{</div><div class='del'>-	struct ks8995_switch *ks = spi_get_drvdata(spi);</div><div class='del'>-</div><div class='del'>-	sysfs_remove_bin_file(&amp;spi-&gt;dev.kobj, &amp;ks-&gt;regs_attr);</div><div class='del'>-</div><div class='del'>-	/* assert reset */</div><div class='del'>-	gpiod_set_value_cansleep(ks-&gt;reset_gpio, 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* ------------------------------------------------------------------------ */</div><div class='del'>-static struct spi_driver ks8995_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.name	    = "spi-ks8995",</div><div class='del'>-		.of_match_table = ks8895_spi_of_match,</div><div class='del'>-	},</div><div class='del'>-	.probe	  = ks8995_probe,</div><div class='del'>-	.remove	  = ks8995_remove,</div><div class='del'>-	.id_table = ks8995_id,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_spi_driver(ks8995_driver);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION(DRV_DESC);</div><div class='del'>-MODULE_VERSION(DRV_VERSION);</div><div class='del'>-MODULE_AUTHOR("Gabor Juhos &lt;juhosg at openwrt.org&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/phy/ste10Xp.c b/drivers/net/phy/ste10Xp.c<br/>index 309e4c3496c4..d4835d4c50e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/ste10Xp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/ste10Xp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/ste10Xp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/ste10Xp.c</a></div><div class='hunk'>@@ -124,7 +124,7 @@ static struct phy_driver ste10xp_pdriver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(ste10xp_pdriver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused ste10Xp_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused ste10Xp_tbl[] = {</div><div class='ctx'> 	{ STE101P_PHY_ID, 0xfffffff0 },</div><div class='ctx'> 	{ STE100P_PHY_ID, 0xffffffff },</div><div class='ctx'> 	{ }</div><div class='head'>diff --git a/drivers/net/phy/teranetics.c b/drivers/net/phy/teranetics.c<br/>index 8057ea8dbc21..46c5ff7d7b56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/teranetics.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/teranetics.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/teranetics.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/teranetics.c</a></div><div class='hunk'>@@ -67,7 +67,8 @@ static int teranetics_read_status(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int teranetics_match_phy_device(struct phy_device *phydev)</div><div class='add'>+static int teranetics_match_phy_device(struct phy_device *phydev,</div><div class='add'>+				       const struct phy_driver *phydrv)</div><div class='ctx'> {</div><div class='ctx'> 	return phydev-&gt;c45_ids.device_ids[3] == PHY_ID_TN2020;</div><div class='ctx'> }</div><div class='hunk'>@@ -87,7 +88,7 @@ static struct phy_driver teranetics_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(teranetics_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused teranetics_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused teranetics_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_TN2020, 0xffffffff },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/uPD60620.c b/drivers/net/phy/uPD60620.c<br/>index 38834347a427..900cb756c366 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/uPD60620.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/uPD60620.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/uPD60620.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/uPD60620.c</a></div><div class='hunk'>@@ -90,7 +90,7 @@ static struct phy_driver upd60620_driver[1] = { {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(upd60620_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused upd60620_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused upd60620_tbl[] = {</div><div class='ctx'> 	{ UPD60620_PHY_ID, 0xfffffffe },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c<br/>index 2377179de017..b1b7bbba284e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/vitesse.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/vitesse.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/vitesse.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/vitesse.c</a></div><div class='hunk'>@@ -674,7 +674,7 @@ static struct phy_driver vsc82xx_driver[] = {</div><div class='ctx'> </div><div class='ctx'> module_phy_driver(vsc82xx_driver);</div><div class='ctx'> </div><div class='del'>-static struct mdio_device_id __maybe_unused vitesse_tbl[] = {</div><div class='add'>+static const struct mdio_device_id __maybe_unused vitesse_tbl[] = {</div><div class='ctx'> 	{ PHY_ID_VSC8234, 0x000ffff0 },</div><div class='ctx'> 	{ PHY_ID_VSC8244, 0x000fffc0 },</div><div class='ctx'> 	{ PHY_ID_VSC8572, 0x000ffff0 },</div><div class='head'>diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c b/drivers/net/phy/xilinx_gmii2rgmii.c<br/>index 7c51daecf18e..2024d8ef36d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/xilinx_gmii2rgmii.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/phy/xilinx_gmii2rgmii.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/phy/xilinx_gmii2rgmii.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/phy/xilinx_gmii2rgmii.c</a></div><div class='hunk'>@@ -64,15 +64,16 @@ static int xgmiitorgmii_read_status(struct phy_device *phydev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgmiitorgmii_set_loopback(struct phy_device *phydev, bool enable)</div><div class='add'>+static int xgmiitorgmii_set_loopback(struct phy_device *phydev, bool enable,</div><div class='add'>+				     int speed)</div><div class='ctx'> {</div><div class='ctx'> 	struct gmii2rgmii *priv = mdiodev_get_drvdata(&amp;phydev-&gt;mdio);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;phy_drv-&gt;set_loopback)</div><div class='del'>-		err = priv-&gt;phy_drv-&gt;set_loopback(phydev, enable);</div><div class='add'>+		err = priv-&gt;phy_drv-&gt;set_loopback(phydev, enable, speed);</div><div class='ctx'> 	else</div><div class='del'>-		err = genphy_loopback(phydev, enable);</div><div class='add'>+		err = genphy_loopback(phydev, enable, speed);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ppp/Kconfig b/drivers/net/ppp/Kconfig<br/>index 8c9ed1889d1a..a1806b4b84be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ppp/Kconfig</a></div><div class='hunk'>@@ -85,9 +85,8 @@ config PPP_FILTER</div><div class='ctx'> config PPP_MPPE</div><div class='ctx'> 	tristate "PPP MPPE compression (encryption)"</div><div class='ctx'> 	depends on PPP</div><div class='del'>-	select CRYPTO</div><div class='del'>-	select CRYPTO_SHA1</div><div class='ctx'> 	select CRYPTO_LIB_ARC4</div><div class='add'>+	select CRYPTO_LIB_SHA1</div><div class='ctx'> 	help</div><div class='ctx'> 	  Support for the MPPE Encryption protocol, as employed by the</div><div class='ctx'> 	  Microsoft Point-to-Point Tunneling Protocol.</div><div class='head'>diff --git a/drivers/net/ppp/bsd_comp.c b/drivers/net/ppp/bsd_comp.c<br/>index 55954594e157..f385b759d5cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/bsd_comp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/bsd_comp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/bsd_comp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ppp/bsd_comp.c</a></div><div class='hunk'>@@ -406,7 +406,7 @@ static void *bsd_alloc (unsigned char *options, int opt_len, int decomp)</div><div class='ctx'>  * Allocate space for the dictionary. This may be more than one page in</div><div class='ctx'>  * length.</div><div class='ctx'>  */</div><div class='del'>-    db-&gt;dict = vmalloc(array_size(hsize, sizeof(struct bsd_dict)));</div><div class='add'>+    db-&gt;dict = vmalloc_array(hsize, sizeof(struct bsd_dict));</div><div class='ctx'>     if (!db-&gt;dict)</div><div class='ctx'>       {</div><div class='ctx'> 	bsd_free (db);</div><div class='hunk'>@@ -425,7 +425,7 @@ static void *bsd_alloc (unsigned char *options, int opt_len, int decomp)</div><div class='ctx'>  */</div><div class='ctx'>     else</div><div class='ctx'>       {</div><div class='del'>-        db-&gt;lens = vmalloc(array_size(sizeof(db-&gt;lens[0]), (maxmaxcode + 1)));</div><div class='add'>+        db-&gt;lens = vmalloc_array(maxmaxcode + 1, sizeof(db-&gt;lens[0]));</div><div class='ctx'> 	if (!db-&gt;lens)</div><div class='ctx'> 	  {</div><div class='ctx'> 	    bsd_free (db);</div><div class='head'>diff --git a/drivers/net/ppp/ppp_generic.c b/drivers/net/ppp/ppp_generic.c<br/>index 4583e15ad03a..f9f0f16c41d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/ppp_generic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/ppp_generic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/ppp_generic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ppp/ppp_generic.c</a></div><div class='hunk'>@@ -33,6 +33,7 @@</div><div class='ctx'> #include &lt;linux/ppp_channel.h&gt;</div><div class='ctx'> #include &lt;linux/ppp-comp.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/rculist.h&gt;</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='ctx'> #include &lt;linux/ip.h&gt;</div><div class='hunk'>@@ -45,6 +46,7 @@</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/file.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/slhc_vj.h&gt;</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> #include &lt;linux/refcount.h&gt;</div><div class='hunk'>@@ -72,6 +74,17 @@</div><div class='ctx'> #define PPP_PROTO_LEN	2</div><div class='ctx'> #define PPP_LCP_HDRLEN	4</div><div class='ctx'> </div><div class='add'>+/* The filter instructions generated by libpcap are constructed</div><div class='add'>+ * assuming a four-byte PPP header on each packet, where the last</div><div class='add'>+ * 2 bytes are the protocol field defined in the RFC and the first</div><div class='add'>+ * byte of the first 2 bytes indicates the direction.</div><div class='add'>+ * The second byte is currently unused, but we still need to initialize</div><div class='add'>+ * it to prevent crafted BPF programs from reading them which would</div><div class='add'>+ * cause reading of uninitialized data.</div><div class='add'>+ */</div><div class='add'>+#define PPP_FILTER_OUTBOUND_TAG 0x0100</div><div class='add'>+#define PPP_FILTER_INBOUND_TAG  0x0000</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * An instance of /dev/ppp can be associated with either a ppp</div><div class='ctx'>  * interface unit or a ppp channel.  In both cases, file-&gt;private_data</div><div class='hunk'>@@ -95,16 +108,9 @@ struct ppp_file {</div><div class='ctx'> #define PF_TO_PPP(pf)		PF_TO_X(pf, struct ppp)</div><div class='ctx'> #define PF_TO_CHANNEL(pf)	PF_TO_X(pf, struct channel)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Data structure to hold primary network stats for which</div><div class='del'>- * we want to use 64 bit storage.  Other network stats</div><div class='del'>- * are stored in dev-&gt;stats of the ppp strucute.</div><div class='del'>- */</div><div class='del'>-struct ppp_link_stats {</div><div class='del'>-	u64 rx_packets;</div><div class='del'>-	u64 tx_packets;</div><div class='del'>-	u64 rx_bytes;</div><div class='del'>-	u64 tx_bytes;</div><div class='add'>+struct ppp_xmit_recursion {</div><div class='add'>+	struct task_struct *owner;</div><div class='add'>+	local_lock_t bh_lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -120,7 +126,7 @@ struct ppp {</div><div class='ctx'> 	int		n_channels;	/* how many channels are attached 54 */</div><div class='ctx'> 	spinlock_t	rlock;		/* lock for receive side 58 */</div><div class='ctx'> 	spinlock_t	wlock;		/* lock for transmit side 5c */</div><div class='del'>-	int __percpu	*xmit_recursion; /* xmit recursion detect */</div><div class='add'>+	struct ppp_xmit_recursion __percpu *xmit_recursion; /* xmit recursion detect */</div><div class='ctx'> 	int		mru;		/* max receive unit 60 */</div><div class='ctx'> 	unsigned int	flags;		/* control bits 64 */</div><div class='ctx'> 	unsigned int	xstate;		/* transmit state bits 68 */</div><div class='hunk'>@@ -150,7 +156,6 @@ struct ppp {</div><div class='ctx'> 	struct bpf_prog *active_filter; /* filter for pkts to reset idle */</div><div class='ctx'> #endif /* CONFIG_PPP_FILTER */</div><div class='ctx'> 	struct net	*ppp_net;	/* the net we belong to */</div><div class='del'>-	struct ppp_link_stats stats64;	/* 64 bit network stats */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -174,11 +179,11 @@ struct channel {</div><div class='ctx'> 	struct ppp_channel *chan;	/* public channel data structure */</div><div class='ctx'> 	struct rw_semaphore chan_sem;	/* protects `chan' during chan ioctl */</div><div class='ctx'> 	spinlock_t	downl;		/* protects `chan', file.xq dequeue */</div><div class='del'>-	struct ppp	*ppp;		/* ppp unit we're connected to */</div><div class='add'>+	struct ppp __rcu *ppp;		/* ppp unit we're connected to */</div><div class='ctx'> 	struct net	*chan_net;	/* the net channel belongs to */</div><div class='ctx'> 	netns_tracker	ns_tracker;</div><div class='ctx'> 	struct list_head clist;		/* link in list of channels per unit */</div><div class='del'>-	rwlock_t	upl;		/* protects `ppp' and 'bridge' */</div><div class='add'>+	spinlock_t	upl;		/* protects `ppp' and 'bridge' */</div><div class='ctx'> 	struct channel __rcu *bridge;	/* "bridged" ppp channel */</div><div class='ctx'> #ifdef CONFIG_PPP_MULTILINK</div><div class='ctx'> 	u8		avail;		/* flag used in multilink stuff */</div><div class='hunk'>@@ -640,34 +645,34 @@ static struct bpf_prog *compat_ppp_get_filter(struct sock_fprog32 __user *p)</div><div class='ctx'>  */</div><div class='ctx'> static int ppp_bridge_channels(struct channel *pch, struct channel *pchb)</div><div class='ctx'> {</div><div class='del'>-	write_lock_bh(&amp;pch-&gt;upl);</div><div class='del'>-	if (pch-&gt;ppp ||</div><div class='add'>+	spin_lock(&amp;pch-&gt;upl);</div><div class='add'>+	if (rcu_dereference_protected(pch-&gt;ppp, lockdep_is_held(&amp;pch-&gt;upl)) ||</div><div class='ctx'> 	    rcu_dereference_protected(pch-&gt;bridge, lockdep_is_held(&amp;pch-&gt;upl))) {</div><div class='del'>-		write_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+		spin_unlock(&amp;pch-&gt;upl);</div><div class='ctx'> 		return -EALREADY;</div><div class='ctx'> 	}</div><div class='ctx'> 	refcount_inc(&amp;pchb-&gt;file.refcnt);</div><div class='ctx'> 	rcu_assign_pointer(pch-&gt;bridge, pchb);</div><div class='del'>-	write_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	spin_unlock(&amp;pch-&gt;upl);</div><div class='ctx'> </div><div class='del'>-	write_lock_bh(&amp;pchb-&gt;upl);</div><div class='del'>-	if (pchb-&gt;ppp ||</div><div class='add'>+	spin_lock(&amp;pchb-&gt;upl);</div><div class='add'>+	if (rcu_dereference_protected(pchb-&gt;ppp, lockdep_is_held(&amp;pchb-&gt;upl)) ||</div><div class='ctx'> 	    rcu_dereference_protected(pchb-&gt;bridge, lockdep_is_held(&amp;pchb-&gt;upl))) {</div><div class='del'>-		write_unlock_bh(&amp;pchb-&gt;upl);</div><div class='add'>+		spin_unlock(&amp;pchb-&gt;upl);</div><div class='ctx'> 		goto err_unset;</div><div class='ctx'> 	}</div><div class='ctx'> 	refcount_inc(&amp;pch-&gt;file.refcnt);</div><div class='ctx'> 	rcu_assign_pointer(pchb-&gt;bridge, pch);</div><div class='del'>-	write_unlock_bh(&amp;pchb-&gt;upl);</div><div class='add'>+	spin_unlock(&amp;pchb-&gt;upl);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_unset:</div><div class='del'>-	write_lock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	spin_lock(&amp;pch-&gt;upl);</div><div class='ctx'> 	/* Re-read pch-&gt;bridge with upl held in case it was modified concurrently */</div><div class='ctx'> 	pchb = rcu_dereference_protected(pch-&gt;bridge, lockdep_is_held(&amp;pch-&gt;upl));</div><div class='ctx'> 	RCU_INIT_POINTER(pch-&gt;bridge, NULL);</div><div class='del'>-	write_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	spin_unlock(&amp;pch-&gt;upl);</div><div class='ctx'> 	synchronize_rcu();</div><div class='ctx'> </div><div class='ctx'> 	if (pchb)</div><div class='hunk'>@@ -681,25 +686,25 @@ static int ppp_unbridge_channels(struct channel *pch)</div><div class='ctx'> {</div><div class='ctx'> 	struct channel *pchb, *pchbb;</div><div class='ctx'> </div><div class='del'>-	write_lock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	spin_lock(&amp;pch-&gt;upl);</div><div class='ctx'> 	pchb = rcu_dereference_protected(pch-&gt;bridge, lockdep_is_held(&amp;pch-&gt;upl));</div><div class='ctx'> 	if (!pchb) {</div><div class='del'>-		write_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+		spin_unlock(&amp;pch-&gt;upl);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	RCU_INIT_POINTER(pch-&gt;bridge, NULL);</div><div class='del'>-	write_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	spin_unlock(&amp;pch-&gt;upl);</div><div class='ctx'> </div><div class='ctx'> 	/* Only modify pchb if phcb-&gt;bridge points back to pch.</div><div class='ctx'> 	 * If not, it implies that there has been a race unbridging (and possibly</div><div class='ctx'> 	 * even rebridging) pchb.  We should leave pchb alone to avoid either a</div><div class='ctx'> 	 * refcount underflow, or breaking another established bridge instance.</div><div class='ctx'> 	 */</div><div class='del'>-	write_lock_bh(&amp;pchb-&gt;upl);</div><div class='add'>+	spin_lock(&amp;pchb-&gt;upl);</div><div class='ctx'> 	pchbb = rcu_dereference_protected(pchb-&gt;bridge, lockdep_is_held(&amp;pchb-&gt;upl));</div><div class='ctx'> 	if (pchbb == pch)</div><div class='ctx'> 		RCU_INIT_POINTER(pchb-&gt;bridge, NULL);</div><div class='del'>-	write_unlock_bh(&amp;pchb-&gt;upl);</div><div class='add'>+	spin_unlock(&amp;pchb-&gt;upl);</div><div class='ctx'> </div><div class='ctx'> 	synchronize_rcu();</div><div class='ctx'> </div><div class='hunk'>@@ -1119,6 +1124,8 @@ static const struct file_operations ppp_device_fops = {</div><div class='ctx'> 	.llseek		= noop_llseek,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void ppp_nl_dellink(struct net_device *dev, struct list_head *head);</div><div class='add'>+</div><div class='ctx'> static __net_init int ppp_init_net(struct net *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct ppp_net *pn = net_generic(net, ppp_net_id);</div><div class='hunk'>@@ -1134,28 +1141,20 @@ static __net_init int ppp_init_net(struct net *net)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static __net_exit void ppp_exit_net(struct net *net)</div><div class='add'>+static __net_exit void ppp_exit_rtnl_net(struct net *net,</div><div class='add'>+					 struct list_head *dev_to_kill)</div><div class='ctx'> {</div><div class='ctx'> 	struct ppp_net *pn = net_generic(net, ppp_net_id);</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct net_device *aux;</div><div class='ctx'> 	struct ppp *ppp;</div><div class='del'>-	LIST_HEAD(list);</div><div class='ctx'> 	int id;</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='del'>-	for_each_netdev_safe(net, dev, aux) {</div><div class='del'>-		if (dev-&gt;netdev_ops == &amp;ppp_netdev_ops)</div><div class='del'>-			unregister_netdevice_queue(dev, &amp;list);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	idr_for_each_entry(&amp;pn-&gt;units_idr, ppp, id)</div><div class='del'>-		/* Skip devices already unregistered by previous loop */</div><div class='del'>-		if (!net_eq(dev_net(ppp-&gt;dev), net))</div><div class='del'>-			unregister_netdevice_queue(ppp-&gt;dev, &amp;list);</div><div class='add'>+		ppp_nl_dellink(ppp-&gt;dev, dev_to_kill);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	unregister_netdevice_many(&amp;list);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+static __net_exit void ppp_exit_net(struct net *net)</div><div class='add'>+{</div><div class='add'>+	struct ppp_net *pn = net_generic(net, ppp_net_id);</div><div class='ctx'> </div><div class='ctx'> 	mutex_destroy(&amp;pn-&gt;all_ppp_mutex);</div><div class='ctx'> 	idr_destroy(&amp;pn-&gt;units_idr);</div><div class='hunk'>@@ -1165,6 +1164,7 @@ static __net_exit void ppp_exit_net(struct net *net)</div><div class='ctx'> </div><div class='ctx'> static struct pernet_operations ppp_net_ops = {</div><div class='ctx'> 	.init = ppp_init_net,</div><div class='add'>+	.exit_rtnl = ppp_exit_rtnl_net,</div><div class='ctx'> 	.exit = ppp_exit_net,</div><div class='ctx'> 	.id   = &amp;ppp_net_id,</div><div class='ctx'> 	.size = sizeof(struct ppp_net),</div><div class='hunk'>@@ -1255,13 +1255,18 @@ static int ppp_dev_configure(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	spin_lock_init(&amp;ppp-&gt;rlock);</div><div class='ctx'> 	spin_lock_init(&amp;ppp-&gt;wlock);</div><div class='ctx'> </div><div class='del'>-	ppp-&gt;xmit_recursion = alloc_percpu(int);</div><div class='add'>+	ppp-&gt;xmit_recursion = alloc_percpu(struct ppp_xmit_recursion);</div><div class='ctx'> 	if (!ppp-&gt;xmit_recursion) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err1;</div><div class='ctx'> 	}</div><div class='del'>-	for_each_possible_cpu(cpu)</div><div class='del'>-		(*per_cpu_ptr(ppp-&gt;xmit_recursion, cpu)) = 0;</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		struct ppp_xmit_recursion *xmit_recursion;</div><div class='add'>+</div><div class='add'>+		xmit_recursion = per_cpu_ptr(ppp-&gt;xmit_recursion, cpu);</div><div class='add'>+		xmit_recursion-&gt;owner = NULL;</div><div class='add'>+		local_lock_init(&amp;xmit_recursion-&gt;bh_lock);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPP_MULTILINK</div><div class='ctx'> 	ppp-&gt;minseq = -1;</div><div class='hunk'>@@ -1303,10 +1308,13 @@ static int ppp_nl_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ppp_nl_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-			  struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int ppp_nl_newlink(struct net_device *dev,</div><div class='add'>+			  struct rtnl_newlink_params *params,</div><div class='ctx'> 			  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	struct ppp_config conf = {</div><div class='ctx'> 		.unit = -1,</div><div class='ctx'> 		.ifname_is_set = true,</div><div class='hunk'>@@ -1343,7 +1351,7 @@ static int ppp_nl_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	if (!tb[IFLA_IFNAME] || !nla_len(tb[IFLA_IFNAME]) || !*(char *)nla_data(tb[IFLA_IFNAME]))</div><div class='ctx'> 		conf.ifname_is_set = false;</div><div class='ctx'> </div><div class='del'>-	err = ppp_dev_configure(src_net, dev, &amp;conf);</div><div class='add'>+	err = ppp_dev_configure(link_net, dev, &amp;conf);</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='ctx'> 	mutex_unlock(&amp;ppp_mutex);</div><div class='hunk'>@@ -1529,23 +1537,12 @@ ppp_net_siocdevprivate(struct net_device *dev, struct ifreq *ifr,</div><div class='ctx'> static void</div><div class='ctx'> ppp_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats64)</div><div class='ctx'> {</div><div class='del'>-	struct ppp *ppp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	ppp_recv_lock(ppp);</div><div class='del'>-	stats64-&gt;rx_packets = ppp-&gt;stats64.rx_packets;</div><div class='del'>-	stats64-&gt;rx_bytes   = ppp-&gt;stats64.rx_bytes;</div><div class='del'>-	ppp_recv_unlock(ppp);</div><div class='del'>-</div><div class='del'>-	ppp_xmit_lock(ppp);</div><div class='del'>-	stats64-&gt;tx_packets = ppp-&gt;stats64.tx_packets;</div><div class='del'>-	stats64-&gt;tx_bytes   = ppp-&gt;stats64.tx_bytes;</div><div class='del'>-	ppp_xmit_unlock(ppp);</div><div class='del'>-</div><div class='ctx'> 	stats64-&gt;rx_errors        = dev-&gt;stats.rx_errors;</div><div class='ctx'> 	stats64-&gt;tx_errors        = dev-&gt;stats.tx_errors;</div><div class='ctx'> 	stats64-&gt;rx_dropped       = dev-&gt;stats.rx_dropped;</div><div class='ctx'> 	stats64-&gt;tx_dropped       = dev-&gt;stats.tx_dropped;</div><div class='ctx'> 	stats64-&gt;rx_length_errors = dev-&gt;stats.rx_length_errors;</div><div class='add'>+	dev_fetch_sw_netstats(stats64, dev-&gt;tstats);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ppp_dev_init(struct net_device *dev)</div><div class='hunk'>@@ -1602,11 +1599,14 @@ static int ppp_fill_forward_path(struct net_device_path_ctx *ctx,</div><div class='ctx'> 	if (ppp-&gt;flags &amp; SC_MULTILINK)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	if (list_empty(&amp;ppp-&gt;channels))</div><div class='add'>+	pch = list_first_or_null_rcu(&amp;ppp-&gt;channels, struct channel, clist);</div><div class='add'>+	if (!pch)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	chan = READ_ONCE(pch-&gt;chan);</div><div class='add'>+	if (!chan)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	pch = list_first_entry(&amp;ppp-&gt;channels, struct channel, clist);</div><div class='del'>-	chan = pch-&gt;chan;</div><div class='ctx'> 	if (!chan-&gt;ops-&gt;fill_forward_path)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='hunk'>@@ -1640,6 +1640,7 @@ static void ppp_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;type = ARPHRD_PPP;</div><div class='ctx'> 	dev-&gt;flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST;</div><div class='ctx'> 	dev-&gt;priv_destructor = ppp_dev_priv_destructor;</div><div class='add'>+	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;</div><div class='ctx'> 	netif_keep_dst(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1673,15 +1674,20 @@ static void __ppp_xmit_process(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> static void ppp_xmit_process(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='add'>+	struct ppp_xmit_recursion *xmit_recursion;</div><div class='add'>+</div><div class='ctx'> 	local_bh_disable();</div><div class='ctx'> </div><div class='del'>-	if (unlikely(*this_cpu_ptr(ppp-&gt;xmit_recursion)))</div><div class='add'>+	xmit_recursion = this_cpu_ptr(ppp-&gt;xmit_recursion);</div><div class='add'>+	if (xmit_recursion-&gt;owner == current)</div><div class='ctx'> 		goto err;</div><div class='add'>+	local_lock_nested_bh(&amp;ppp-&gt;xmit_recursion-&gt;bh_lock);</div><div class='add'>+	xmit_recursion-&gt;owner = current;</div><div class='ctx'> </div><div class='del'>-	(*this_cpu_ptr(ppp-&gt;xmit_recursion))++;</div><div class='ctx'> 	__ppp_xmit_process(ppp, skb);</div><div class='del'>-	(*this_cpu_ptr(ppp-&gt;xmit_recursion))--;</div><div class='ctx'> </div><div class='add'>+	xmit_recursion-&gt;owner = NULL;</div><div class='add'>+	local_unlock_nested_bh(&amp;ppp-&gt;xmit_recursion-&gt;bh_lock);</div><div class='ctx'> 	local_bh_enable();</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='hunk'>@@ -1738,7 +1744,6 @@ pad_compress_skb(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (net_ratelimit())</div><div class='ctx'> 			netdev_err(ppp-&gt;dev, "ppp: compressor dropped pkt\n");</div><div class='del'>-		kfree_skb(skb);</div><div class='ctx'> 		consume_skb(new_skb);</div><div class='ctx'> 		new_skb = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1762,10 +1767,10 @@ ppp_send_frame(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	if (proto &lt; 0x8000) {</div><div class='ctx'> #ifdef CONFIG_PPP_FILTER</div><div class='del'>-		/* check if we should pass this packet */</div><div class='del'>-		/* the filter instructions are constructed assuming</div><div class='del'>-		   a four-byte PPP header on each packet */</div><div class='del'>-		*(u8 *)skb_push(skb, 2) = 1;</div><div class='add'>+		/* check if the packet passes the pass and active filters.</div><div class='add'>+		 * See comment for PPP_FILTER_OUTBOUND_TAG above.</div><div class='add'>+		 */</div><div class='add'>+		*(__be16 *)skb_push(skb, 2) = htons(PPP_FILTER_OUTBOUND_TAG);</div><div class='ctx'> 		if (ppp-&gt;pass_filter &amp;&amp;</div><div class='ctx'> 		    bpf_prog_run(ppp-&gt;pass_filter, skb) == 0) {</div><div class='ctx'> 			if (ppp-&gt;debug &amp; 1)</div><div class='hunk'>@@ -1786,8 +1791,7 @@ ppp_send_frame(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> #endif /* CONFIG_PPP_FILTER */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	++ppp-&gt;stats64.tx_packets;</div><div class='del'>-	ppp-&gt;stats64.tx_bytes += skb-&gt;len - PPP_PROTO_LEN;</div><div class='add'>+	dev_sw_netstats_tx_add(ppp-&gt;dev, 1, skb-&gt;len - PPP_PROTO_LEN);</div><div class='ctx'> </div><div class='ctx'> 	switch (proto) {</div><div class='ctx'> 	case PPP_IP:</div><div class='hunk'>@@ -1840,9 +1844,10 @@ ppp_send_frame(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> 					   "down - pkt dropped.\n");</div><div class='ctx'> 			goto drop;</div><div class='ctx'> 		}</div><div class='del'>-		skb = pad_compress_skb(ppp, skb);</div><div class='del'>-		if (!skb)</div><div class='add'>+		new_skb = pad_compress_skb(ppp, skb);</div><div class='add'>+		if (!new_skb)</div><div class='ctx'> 			goto drop;</div><div class='add'>+		skb = new_skb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2153,10 +2158,9 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> #endif /* CONFIG_PPP_MULTILINK */</div><div class='ctx'> </div><div class='ctx'> /* Try to send data out on a channel */</div><div class='del'>-static void __ppp_channel_push(struct channel *pch)</div><div class='add'>+static void __ppp_channel_push(struct channel *pch, struct ppp *ppp)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	struct ppp *ppp;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;pch-&gt;downl);</div><div class='ctx'> 	if (pch-&gt;chan) {</div><div class='hunk'>@@ -2175,7 +2179,6 @@ static void __ppp_channel_push(struct channel *pch)</div><div class='ctx'> 	spin_unlock(&amp;pch-&gt;downl);</div><div class='ctx'> 	/* see if there is anything from the attached unit to be sent */</div><div class='ctx'> 	if (skb_queue_empty(&amp;pch-&gt;file.xq)) {</div><div class='del'>-		ppp = pch-&gt;ppp;</div><div class='ctx'> 		if (ppp)</div><div class='ctx'> 			__ppp_xmit_process(ppp, NULL);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2183,15 +2186,22 @@ static void __ppp_channel_push(struct channel *pch)</div><div class='ctx'> </div><div class='ctx'> static void ppp_channel_push(struct channel *pch)</div><div class='ctx'> {</div><div class='del'>-	read_lock_bh(&amp;pch-&gt;upl);</div><div class='del'>-	if (pch-&gt;ppp) {</div><div class='del'>-		(*this_cpu_ptr(pch-&gt;ppp-&gt;xmit_recursion))++;</div><div class='del'>-		__ppp_channel_push(pch);</div><div class='del'>-		(*this_cpu_ptr(pch-&gt;ppp-&gt;xmit_recursion))--;</div><div class='add'>+	struct ppp_xmit_recursion *xmit_recursion;</div><div class='add'>+	struct ppp *ppp;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock_bh();</div><div class='add'>+	ppp = rcu_dereference_bh(pch-&gt;ppp);</div><div class='add'>+	if (ppp) {</div><div class='add'>+		xmit_recursion = this_cpu_ptr(ppp-&gt;xmit_recursion);</div><div class='add'>+		local_lock_nested_bh(&amp;ppp-&gt;xmit_recursion-&gt;bh_lock);</div><div class='add'>+		xmit_recursion-&gt;owner = current;</div><div class='add'>+		__ppp_channel_push(pch, ppp);</div><div class='add'>+		xmit_recursion-&gt;owner = NULL;</div><div class='add'>+		local_unlock_nested_bh(&amp;ppp-&gt;xmit_recursion-&gt;bh_lock);</div><div class='ctx'> 	} else {</div><div class='del'>-		__ppp_channel_push(pch);</div><div class='add'>+		__ppp_channel_push(pch, NULL);</div><div class='ctx'> 	}</div><div class='del'>-	read_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	rcu_read_unlock_bh();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2293,6 +2303,7 @@ void</div><div class='ctx'> ppp_input(struct ppp_channel *chan, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct channel *pch = chan-&gt;ppp;</div><div class='add'>+	struct ppp *ppp;</div><div class='ctx'> 	int proto;</div><div class='ctx'> </div><div class='ctx'> 	if (!pch) {</div><div class='hunk'>@@ -2304,18 +2315,19 @@ ppp_input(struct ppp_channel *chan, struct sk_buff *skb)</div><div class='ctx'> 	if (ppp_channel_bridge_input(pch, skb))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	read_lock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	rcu_read_lock_bh();</div><div class='add'>+	ppp = rcu_dereference_bh(pch-&gt;ppp);</div><div class='ctx'> 	if (!ppp_decompress_proto(skb)) {</div><div class='ctx'> 		kfree_skb(skb);</div><div class='del'>-		if (pch-&gt;ppp) {</div><div class='del'>-			++pch-&gt;ppp-&gt;dev-&gt;stats.rx_length_errors;</div><div class='del'>-			ppp_receive_error(pch-&gt;ppp);</div><div class='add'>+		if (ppp) {</div><div class='add'>+			++ppp-&gt;dev-&gt;stats.rx_length_errors;</div><div class='add'>+			ppp_receive_error(ppp);</div><div class='ctx'> 		}</div><div class='ctx'> 		goto done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	proto = PPP_PROTO(skb);</div><div class='del'>-	if (!pch-&gt;ppp || proto &gt;= 0xc000 || proto == PPP_CCPFRAG) {</div><div class='add'>+	if (!ppp || proto &gt;= 0xc000 || proto == PPP_CCPFRAG) {</div><div class='ctx'> 		/* put it on the channel queue */</div><div class='ctx'> 		skb_queue_tail(&amp;pch-&gt;file.rq, skb);</div><div class='ctx'> 		/* drop old frames if queue too long */</div><div class='hunk'>@@ -2324,11 +2336,11 @@ ppp_input(struct ppp_channel *chan, struct sk_buff *skb)</div><div class='ctx'> 			kfree_skb(skb);</div><div class='ctx'> 		wake_up_interruptible(&amp;pch-&gt;file.rwait);</div><div class='ctx'> 	} else {</div><div class='del'>-		ppp_do_recv(pch-&gt;ppp, skb, pch);</div><div class='add'>+		ppp_do_recv(ppp, skb, pch);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='del'>-	read_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	rcu_read_unlock_bh();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Put a 0-length skb in the receive queue as an error indication */</div><div class='hunk'>@@ -2337,20 +2349,22 @@ ppp_input_error(struct ppp_channel *chan, int code)</div><div class='ctx'> {</div><div class='ctx'> 	struct channel *pch = chan-&gt;ppp;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='add'>+	struct ppp *ppp;</div><div class='ctx'> </div><div class='ctx'> 	if (!pch)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	read_lock_bh(&amp;pch-&gt;upl);</div><div class='del'>-	if (pch-&gt;ppp) {</div><div class='add'>+	rcu_read_lock_bh();</div><div class='add'>+	ppp = rcu_dereference_bh(pch-&gt;ppp);</div><div class='add'>+	if (ppp) {</div><div class='ctx'> 		skb = alloc_skb(0, GFP_ATOMIC);</div><div class='ctx'> 		if (skb) {</div><div class='ctx'> 			skb-&gt;len = 0;		/* probably unnecessary */</div><div class='ctx'> 			skb-&gt;cb[0] = code;</div><div class='del'>-			ppp_do_recv(pch-&gt;ppp, skb, pch);</div><div class='add'>+			ppp_do_recv(ppp, skb, pch);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	read_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	rcu_read_unlock_bh();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -2464,8 +2478,7 @@ ppp_receive_nonmp_frame(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	++ppp-&gt;stats64.rx_packets;</div><div class='del'>-	ppp-&gt;stats64.rx_bytes += skb-&gt;len - 2;</div><div class='add'>+	dev_sw_netstats_rx_add(ppp-&gt;dev, skb-&gt;len - PPP_PROTO_LEN);</div><div class='ctx'> </div><div class='ctx'> 	npi = proto_to_npindex(proto);</div><div class='ctx'> 	if (npi &lt; 0) {</div><div class='hunk'>@@ -2482,14 +2495,13 @@ ppp_receive_nonmp_frame(struct ppp *ppp, struct sk_buff *skb)</div><div class='ctx'> 		/* network protocol frame - give it to the kernel */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PPP_FILTER</div><div class='del'>-		/* check if the packet passes the pass and active filters */</div><div class='del'>-		/* the filter instructions are constructed assuming</div><div class='del'>-		   a four-byte PPP header on each packet */</div><div class='ctx'> 		if (ppp-&gt;pass_filter || ppp-&gt;active_filter) {</div><div class='ctx'> 			if (skb_unclone(skb, GFP_ATOMIC))</div><div class='ctx'> 				goto err;</div><div class='del'>-</div><div class='del'>-			*(u8 *)skb_push(skb, 2) = 0;</div><div class='add'>+			/* Check if the packet passes the pass and active filters.</div><div class='add'>+			 * See comment for PPP_FILTER_INBOUND_TAG above.</div><div class='add'>+			 */</div><div class='add'>+			*(__be16 *)skb_push(skb, 2) = htons(PPP_FILTER_INBOUND_TAG);</div><div class='ctx'> 			if (ppp-&gt;pass_filter &amp;&amp;</div><div class='ctx'> 			    bpf_prog_run(ppp-&gt;pass_filter, skb) == 0) {</div><div class='ctx'> 				if (ppp-&gt;debug &amp; 1)</div><div class='hunk'>@@ -2900,7 +2912,6 @@ int ppp_register_net_channel(struct net *net, struct ppp_channel *chan)</div><div class='ctx'> </div><div class='ctx'> 	pn = ppp_pernet(net);</div><div class='ctx'> </div><div class='del'>-	pch-&gt;ppp = NULL;</div><div class='ctx'> 	pch-&gt;chan = chan;</div><div class='ctx'> 	pch-&gt;chan_net = get_net_track(net, &amp;pch-&gt;ns_tracker, GFP_KERNEL);</div><div class='ctx'> 	chan-&gt;ppp = pch;</div><div class='hunk'>@@ -2911,7 +2922,7 @@ int ppp_register_net_channel(struct net *net, struct ppp_channel *chan)</div><div class='ctx'> #endif /* CONFIG_PPP_MULTILINK */</div><div class='ctx'> 	init_rwsem(&amp;pch-&gt;chan_sem);</div><div class='ctx'> 	spin_lock_init(&amp;pch-&gt;downl);</div><div class='del'>-	rwlock_init(&amp;pch-&gt;upl);</div><div class='add'>+	spin_lock_init(&amp;pch-&gt;upl);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;pn-&gt;all_channels_lock);</div><div class='ctx'> 	pch-&gt;file.index = ++pn-&gt;last_channel_index;</div><div class='hunk'>@@ -2940,13 +2951,15 @@ int ppp_channel_index(struct ppp_channel *chan)</div><div class='ctx'> int ppp_unit_number(struct ppp_channel *chan)</div><div class='ctx'> {</div><div class='ctx'> 	struct channel *pch = chan-&gt;ppp;</div><div class='add'>+	struct ppp *ppp;</div><div class='ctx'> 	int unit = -1;</div><div class='ctx'> </div><div class='ctx'> 	if (pch) {</div><div class='del'>-		read_lock_bh(&amp;pch-&gt;upl);</div><div class='del'>-		if (pch-&gt;ppp)</div><div class='del'>-			unit = pch-&gt;ppp-&gt;file.index;</div><div class='del'>-		read_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		ppp = rcu_dereference(pch-&gt;ppp);</div><div class='add'>+		if (ppp)</div><div class='add'>+			unit = ppp-&gt;file.index;</div><div class='add'>+		rcu_read_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> 	return unit;</div><div class='ctx'> }</div><div class='hunk'>@@ -2958,12 +2971,14 @@ char *ppp_dev_name(struct ppp_channel *chan)</div><div class='ctx'> {</div><div class='ctx'> 	struct channel *pch = chan-&gt;ppp;</div><div class='ctx'> 	char *name = NULL;</div><div class='add'>+	struct ppp *ppp;</div><div class='ctx'> </div><div class='ctx'> 	if (pch) {</div><div class='del'>-		read_lock_bh(&amp;pch-&gt;upl);</div><div class='del'>-		if (pch-&gt;ppp &amp;&amp; pch-&gt;ppp-&gt;dev)</div><div class='del'>-			name = pch-&gt;ppp-&gt;dev-&gt;name;</div><div class='del'>-		read_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		ppp = rcu_dereference(pch-&gt;ppp);</div><div class='add'>+		if (ppp &amp;&amp; ppp-&gt;dev)</div><div class='add'>+			name = ppp-&gt;dev-&gt;name;</div><div class='add'>+		rcu_read_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> 	return name;</div><div class='ctx'> }</div><div class='hunk'>@@ -2990,7 +3005,7 @@ ppp_unregister_channel(struct ppp_channel *chan)</div><div class='ctx'> 	 */</div><div class='ctx'> 	down_write(&amp;pch-&gt;chan_sem);</div><div class='ctx'> 	spin_lock_bh(&amp;pch-&gt;downl);</div><div class='del'>-	pch-&gt;chan = NULL;</div><div class='add'>+	WRITE_ONCE(pch-&gt;chan, NULL);</div><div class='ctx'> 	spin_unlock_bh(&amp;pch-&gt;downl);</div><div class='ctx'> 	up_write(&amp;pch-&gt;chan_sem);</div><div class='ctx'> 	ppp_disconnect_channel(pch);</div><div class='hunk'>@@ -3294,14 +3309,25 @@ static void</div><div class='ctx'> ppp_get_stats(struct ppp *ppp, struct ppp_stats *st)</div><div class='ctx'> {</div><div class='ctx'> 	struct slcompress *vj = ppp-&gt;vj;</div><div class='add'>+	int cpu;</div><div class='ctx'> </div><div class='ctx'> 	memset(st, 0, sizeof(*st));</div><div class='del'>-	st-&gt;p.ppp_ipackets = ppp-&gt;stats64.rx_packets;</div><div class='add'>+	for_each_possible_cpu(cpu) {</div><div class='add'>+		struct pcpu_sw_netstats *p = per_cpu_ptr(ppp-&gt;dev-&gt;tstats, cpu);</div><div class='add'>+		u64 rx_packets, rx_bytes, tx_packets, tx_bytes;</div><div class='add'>+</div><div class='add'>+		rx_packets = u64_stats_read(&amp;p-&gt;rx_packets);</div><div class='add'>+		rx_bytes = u64_stats_read(&amp;p-&gt;rx_bytes);</div><div class='add'>+		tx_packets = u64_stats_read(&amp;p-&gt;tx_packets);</div><div class='add'>+		tx_bytes = u64_stats_read(&amp;p-&gt;tx_bytes);</div><div class='add'>+</div><div class='add'>+		st-&gt;p.ppp_ipackets += rx_packets;</div><div class='add'>+		st-&gt;p.ppp_ibytes += rx_bytes;</div><div class='add'>+		st-&gt;p.ppp_opackets += tx_packets;</div><div class='add'>+		st-&gt;p.ppp_obytes += tx_bytes;</div><div class='add'>+	}</div><div class='ctx'> 	st-&gt;p.ppp_ierrors = ppp-&gt;dev-&gt;stats.rx_errors;</div><div class='del'>-	st-&gt;p.ppp_ibytes = ppp-&gt;stats64.rx_bytes;</div><div class='del'>-	st-&gt;p.ppp_opackets = ppp-&gt;stats64.tx_packets;</div><div class='ctx'> 	st-&gt;p.ppp_oerrors = ppp-&gt;dev-&gt;stats.tx_errors;</div><div class='del'>-	st-&gt;p.ppp_obytes = ppp-&gt;stats64.tx_bytes;</div><div class='ctx'> 	if (!vj)</div><div class='ctx'> 		return;</div><div class='ctx'> 	st-&gt;vj.vjs_packets = vj-&gt;sls_o_compressed + vj-&gt;sls_o_uncompressed;</div><div class='hunk'>@@ -3475,9 +3501,9 @@ ppp_connect_channel(struct channel *pch, int unit)</div><div class='ctx'> 	ppp = ppp_find_unit(pn, unit);</div><div class='ctx'> 	if (!ppp)</div><div class='ctx'> 		goto out;</div><div class='del'>-	write_lock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	spin_lock(&amp;pch-&gt;upl);</div><div class='ctx'> 	ret = -EINVAL;</div><div class='del'>-	if (pch-&gt;ppp ||</div><div class='add'>+	if (rcu_dereference_protected(pch-&gt;ppp, lockdep_is_held(&amp;pch-&gt;upl)) ||</div><div class='ctx'> 	    rcu_dereference_protected(pch-&gt;bridge, lockdep_is_held(&amp;pch-&gt;upl)))</div><div class='ctx'> 		goto outl;</div><div class='ctx'> </div><div class='hunk'>@@ -3490,21 +3516,25 @@ ppp_connect_channel(struct channel *pch, int unit)</div><div class='ctx'> 		ret = -ENOTCONN;</div><div class='ctx'> 		goto outl;</div><div class='ctx'> 	}</div><div class='add'>+	if (pch-&gt;chan-&gt;direct_xmit)</div><div class='add'>+		ppp-&gt;dev-&gt;priv_flags |= IFF_NO_QUEUE;</div><div class='add'>+	else</div><div class='add'>+		ppp-&gt;dev-&gt;priv_flags &amp;= ~IFF_NO_QUEUE;</div><div class='ctx'> 	spin_unlock_bh(&amp;pch-&gt;downl);</div><div class='ctx'> 	if (pch-&gt;file.hdrlen &gt; ppp-&gt;file.hdrlen)</div><div class='ctx'> 		ppp-&gt;file.hdrlen = pch-&gt;file.hdrlen;</div><div class='ctx'> 	hdrlen = pch-&gt;file.hdrlen + 2;	/* for protocol bytes */</div><div class='ctx'> 	if (hdrlen &gt; ppp-&gt;dev-&gt;hard_header_len)</div><div class='ctx'> 		ppp-&gt;dev-&gt;hard_header_len = hdrlen;</div><div class='del'>-	list_add_tail(&amp;pch-&gt;clist, &amp;ppp-&gt;channels);</div><div class='add'>+	list_add_tail_rcu(&amp;pch-&gt;clist, &amp;ppp-&gt;channels);</div><div class='ctx'> 	++ppp-&gt;n_channels;</div><div class='del'>-	pch-&gt;ppp = ppp;</div><div class='add'>+	rcu_assign_pointer(pch-&gt;ppp, ppp);</div><div class='ctx'> 	refcount_inc(&amp;ppp-&gt;file.refcnt);</div><div class='ctx'> 	ppp_unlock(ppp);</div><div class='ctx'> 	ret = 0;</div><div class='ctx'> </div><div class='ctx'>  outl:</div><div class='del'>-	write_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	spin_unlock(&amp;pch-&gt;upl);</div><div class='ctx'>  out:</div><div class='ctx'> 	mutex_unlock(&amp;pn-&gt;all_ppp_mutex);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -3519,17 +3549,17 @@ ppp_disconnect_channel(struct channel *pch)</div><div class='ctx'> 	struct ppp *ppp;</div><div class='ctx'> 	int err = -EINVAL;</div><div class='ctx'> </div><div class='del'>-	write_lock_bh(&amp;pch-&gt;upl);</div><div class='del'>-	ppp = pch-&gt;ppp;</div><div class='del'>-	pch-&gt;ppp = NULL;</div><div class='del'>-	write_unlock_bh(&amp;pch-&gt;upl);</div><div class='add'>+	spin_lock(&amp;pch-&gt;upl);</div><div class='add'>+	ppp = rcu_replace_pointer(pch-&gt;ppp, NULL, lockdep_is_held(&amp;pch-&gt;upl));</div><div class='add'>+	spin_unlock(&amp;pch-&gt;upl);</div><div class='ctx'> 	if (ppp) {</div><div class='ctx'> 		/* remove it from the ppp unit's list */</div><div class='ctx'> 		ppp_lock(ppp);</div><div class='del'>-		list_del(&amp;pch-&gt;clist);</div><div class='add'>+		list_del_rcu(&amp;pch-&gt;clist);</div><div class='ctx'> 		if (--ppp-&gt;n_channels == 0)</div><div class='ctx'> 			wake_up_interruptible(&amp;ppp-&gt;file.rwait);</div><div class='ctx'> 		ppp_unlock(ppp);</div><div class='add'>+		synchronize_net();</div><div class='ctx'> 		if (refcount_dec_and_test(&amp;ppp-&gt;file.refcnt))</div><div class='ctx'> 			ppp_destroy_interface(ppp);</div><div class='ctx'> 		err = 0;</div><div class='head'>diff --git a/drivers/net/ppp/ppp_mppe.c b/drivers/net/ppp/ppp_mppe.c<br/>index bcc1eaedf58f..630cbf71c147 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/ppp_mppe.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/ppp_mppe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/ppp_mppe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ppp/ppp_mppe.c</a></div><div class='hunk'>@@ -43,7 +43,7 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/arc4.h&gt;</div><div class='del'>-#include &lt;crypto/hash.h&gt;</div><div class='add'>+#include &lt;crypto/sha1.h&gt;</div><div class='ctx'> #include &lt;linux/err.h&gt;</div><div class='ctx'> #include &lt;linux/fips.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -55,7 +55,6 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/ppp_defs.h&gt;</div><div class='ctx'> #include &lt;linux/ppp-comp.h&gt;</div><div class='del'>-#include &lt;linux/scatterlist.h&gt;</div><div class='ctx'> #include &lt;linux/unaligned.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ppp_mppe.h"</div><div class='hunk'>@@ -67,31 +66,15 @@ MODULE_ALIAS("ppp-compress-" __stringify(CI_MPPE));</div><div class='ctx'> MODULE_VERSION("1.0.2");</div><div class='ctx'> </div><div class='ctx'> #define SHA1_PAD_SIZE 40</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * kernel crypto API needs its arguments to be in kmalloc'd memory, not in the module</div><div class='del'>- * static data area.  That means sha_pad needs to be kmalloc'd.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-struct sha_pad {</div><div class='del'>-	unsigned char sha_pad1[SHA1_PAD_SIZE];</div><div class='del'>-	unsigned char sha_pad2[SHA1_PAD_SIZE];</div><div class='del'>-};</div><div class='del'>-static struct sha_pad *sha_pad;</div><div class='del'>-</div><div class='del'>-static inline void sha_pad_init(struct sha_pad *shapad)</div><div class='del'>-{</div><div class='del'>-	memset(shapad-&gt;sha_pad1, 0x00, sizeof(shapad-&gt;sha_pad1));</div><div class='del'>-	memset(shapad-&gt;sha_pad2, 0xF2, sizeof(shapad-&gt;sha_pad2));</div><div class='del'>-}</div><div class='add'>+static const u8 sha_pad1[SHA1_PAD_SIZE] = { 0 };</div><div class='add'>+static const u8 sha_pad2[SHA1_PAD_SIZE] = { [0 ... SHA1_PAD_SIZE - 1] = 0xF2 };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * State for an MPPE (de)compressor.</div><div class='ctx'>  */</div><div class='ctx'> struct ppp_mppe_state {</div><div class='ctx'> 	struct arc4_ctx arc4;</div><div class='del'>-	struct shash_desc *sha1;</div><div class='del'>-	unsigned char *sha1_digest;</div><div class='add'>+	unsigned char sha1_digest[SHA1_DIGEST_SIZE];</div><div class='ctx'> 	unsigned char master_key[MPPE_MAX_KEY_LEN];</div><div class='ctx'> 	unsigned char session_key[MPPE_MAX_KEY_LEN];</div><div class='ctx'> 	unsigned keylen;	/* key length in bytes             */</div><div class='hunk'>@@ -130,16 +113,14 @@ struct ppp_mppe_state {</div><div class='ctx'>  */</div><div class='ctx'> static void get_new_key_from_sha(struct ppp_mppe_state * state)</div><div class='ctx'> {</div><div class='del'>-	crypto_shash_init(state-&gt;sha1);</div><div class='del'>-	crypto_shash_update(state-&gt;sha1, state-&gt;master_key,</div><div class='del'>-			    state-&gt;keylen);</div><div class='del'>-	crypto_shash_update(state-&gt;sha1, sha_pad-&gt;sha_pad1,</div><div class='del'>-			    sizeof(sha_pad-&gt;sha_pad1));</div><div class='del'>-	crypto_shash_update(state-&gt;sha1, state-&gt;session_key,</div><div class='del'>-			    state-&gt;keylen);</div><div class='del'>-	crypto_shash_update(state-&gt;sha1, sha_pad-&gt;sha_pad2,</div><div class='del'>-			    sizeof(sha_pad-&gt;sha_pad2));</div><div class='del'>-	crypto_shash_final(state-&gt;sha1, state-&gt;sha1_digest);</div><div class='add'>+	struct sha1_ctx ctx;</div><div class='add'>+</div><div class='add'>+	sha1_init(&amp;ctx);</div><div class='add'>+	sha1_update(&amp;ctx, state-&gt;master_key, state-&gt;keylen);</div><div class='add'>+	sha1_update(&amp;ctx, sha_pad1, sizeof(sha_pad1));</div><div class='add'>+	sha1_update(&amp;ctx, state-&gt;session_key, state-&gt;keylen);</div><div class='add'>+	sha1_update(&amp;ctx, sha_pad2, sizeof(sha_pad2));</div><div class='add'>+	sha1_final(&amp;ctx, state-&gt;sha1_digest);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -171,39 +152,15 @@ static void mppe_rekey(struct ppp_mppe_state * state, int initial_key)</div><div class='ctx'> static void *mppe_alloc(unsigned char *options, int optlen)</div><div class='ctx'> {</div><div class='ctx'> 	struct ppp_mppe_state *state;</div><div class='del'>-	struct crypto_shash *shash;</div><div class='del'>-	unsigned int digestsize;</div><div class='ctx'> </div><div class='ctx'> 	if (optlen != CILEN_MPPE + sizeof(state-&gt;master_key) ||</div><div class='ctx'> 	    options[0] != CI_MPPE || options[1] != CILEN_MPPE ||</div><div class='ctx'> 	    fips_enabled)</div><div class='del'>-		goto out;</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	state = kzalloc(sizeof(*state), GFP_KERNEL);</div><div class='ctx'> 	if (state == NULL)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	shash = crypto_alloc_shash("sha1", 0, 0);</div><div class='del'>-	if (IS_ERR(shash))</div><div class='del'>-		goto out_free;</div><div class='del'>-</div><div class='del'>-	state-&gt;sha1 = kmalloc(sizeof(*state-&gt;sha1) +</div><div class='del'>-				     crypto_shash_descsize(shash),</div><div class='del'>-			      GFP_KERNEL);</div><div class='del'>-	if (!state-&gt;sha1) {</div><div class='del'>-		crypto_free_shash(shash);</div><div class='del'>-		goto out_free;</div><div class='del'>-	}</div><div class='del'>-	state-&gt;sha1-&gt;tfm = shash;</div><div class='del'>-</div><div class='del'>-	digestsize = crypto_shash_digestsize(shash);</div><div class='del'>-	if (digestsize &lt; MPPE_MAX_KEY_LEN)</div><div class='del'>-		goto out_free;</div><div class='del'>-</div><div class='del'>-	state-&gt;sha1_digest = kmalloc(digestsize, GFP_KERNEL);</div><div class='del'>-	if (!state-&gt;sha1_digest)</div><div class='del'>-		goto out_free;</div><div class='add'>+		return NULL;</div><div class='ctx'> </div><div class='ctx'> 	/* Save keys. */</div><div class='ctx'> 	memcpy(state-&gt;master_key, &amp;options[CILEN_MPPE],</div><div class='hunk'>@@ -217,16 +174,6 @@ static void *mppe_alloc(unsigned char *options, int optlen)</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='ctx'> 	return (void *)state;</div><div class='del'>-</div><div class='del'>-out_free:</div><div class='del'>-	kfree(state-&gt;sha1_digest);</div><div class='del'>-	if (state-&gt;sha1) {</div><div class='del'>-		crypto_free_shash(state-&gt;sha1-&gt;tfm);</div><div class='del'>-		kfree_sensitive(state-&gt;sha1);</div><div class='del'>-	}</div><div class='del'>-	kfree(state);</div><div class='del'>-out:</div><div class='del'>-	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -235,12 +182,8 @@ out:</div><div class='ctx'> static void mppe_free(void *arg)</div><div class='ctx'> {</div><div class='ctx'> 	struct ppp_mppe_state *state = (struct ppp_mppe_state *) arg;</div><div class='del'>-	if (state) {</div><div class='del'>-		kfree(state-&gt;sha1_digest);</div><div class='del'>-		crypto_free_shash(state-&gt;sha1-&gt;tfm);</div><div class='del'>-		kfree_sensitive(state-&gt;sha1);</div><div class='del'>-		kfree_sensitive(state);</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	kfree_sensitive(state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -649,31 +592,17 @@ static struct compressor ppp_mppe = {</div><div class='ctx'> 	.comp_extra     = MPPE_PAD,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * ppp_mppe_init()</div><div class='del'>- *</div><div class='del'>- * Prior to allowing load, try to load the arc4 and sha1 crypto</div><div class='del'>- * libraries.  The actual use will be allocated later, but</div><div class='del'>- * this way the module will fail to insmod if they aren't available.</div><div class='del'>- */</div><div class='del'>-</div><div class='ctx'> static int __init ppp_mppe_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int answer;</div><div class='del'>-	if (fips_enabled || !crypto_has_ahash("sha1", 0, CRYPTO_ALG_ASYNC))</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	sha_pad = kmalloc(sizeof(struct sha_pad), GFP_KERNEL);</div><div class='del'>-	if (!sha_pad)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	sha_pad_init(sha_pad);</div><div class='add'>+	if (fips_enabled)</div><div class='add'>+		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	answer = ppp_register_compressor(&amp;ppp_mppe);</div><div class='ctx'> </div><div class='ctx'> 	if (answer == 0)</div><div class='ctx'> 		printk(KERN_INFO "PPP MPPE Compression module registered\n");</div><div class='del'>-	else</div><div class='del'>-		kfree(sha_pad);</div><div class='ctx'> </div><div class='ctx'> 	return answer;</div><div class='ctx'> }</div><div class='hunk'>@@ -681,7 +610,6 @@ static int __init ppp_mppe_init(void)</div><div class='ctx'> static void __exit ppp_mppe_cleanup(void)</div><div class='ctx'> {</div><div class='ctx'> 	ppp_unregister_compressor(&amp;ppp_mppe);</div><div class='del'>-	kfree(sha_pad);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(ppp_mppe_init);</div><div class='head'>diff --git a/drivers/net/ppp/ppp_synctty.c b/drivers/net/ppp/ppp_synctty.c<br/>index 644e99fc3623..9c4932198931 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/ppp_synctty.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/ppp_synctty.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/ppp_synctty.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ppp/ppp_synctty.c</a></div><div class='hunk'>@@ -506,6 +506,11 @@ ppp_sync_txmunge(struct syncppp *ap, struct sk_buff *skb)</div><div class='ctx'> 	unsigned char *data;</div><div class='ctx'> 	int islcp;</div><div class='ctx'> </div><div class='add'>+	/* Ensure we can safely access protocol field and LCP code */</div><div class='add'>+	if (!pskb_may_pull(skb, 3)) {</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='ctx'> 	data  = skb-&gt;data;</div><div class='ctx'> 	proto = get_unaligned_be16(data);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ppp/pppoe.c b/drivers/net/ppp/pppoe.c<br/>index 2ea4f4890d23..4275b393a454 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/pppoe.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/pppoe.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/pppoe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ppp/pppoe.c</a></div><div class='hunk'>@@ -100,8 +100,8 @@ struct pppoe_net {</div><div class='ctx'> 	 * as well, moreover in case of SMP less locking</div><div class='ctx'> 	 * controversy here</div><div class='ctx'> 	 */</div><div class='del'>-	struct pppox_sock *hash_table[PPPOE_HASH_SIZE];</div><div class='del'>-	rwlock_t hash_lock;</div><div class='add'>+	struct pppox_sock __rcu *hash_table[PPPOE_HASH_SIZE];</div><div class='add'>+	spinlock_t hash_lock;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -162,13 +162,13 @@ static struct pppox_sock *__get_item(struct pppoe_net *pn, __be16 sid,</div><div class='ctx'> 	int hash = hash_item(sid, addr);</div><div class='ctx'> 	struct pppox_sock *ret;</div><div class='ctx'> </div><div class='del'>-	ret = pn-&gt;hash_table[hash];</div><div class='add'>+	ret = rcu_dereference(pn-&gt;hash_table[hash]);</div><div class='ctx'> 	while (ret) {</div><div class='ctx'> 		if (cmp_addr(&amp;ret-&gt;pppoe_pa, sid, addr) &amp;&amp;</div><div class='ctx'> 		    ret-&gt;pppoe_ifindex == ifindex)</div><div class='ctx'> 			return ret;</div><div class='ctx'> </div><div class='del'>-		ret = ret-&gt;next;</div><div class='add'>+		ret = rcu_dereference(ret-&gt;next);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='hunk'>@@ -177,19 +177,20 @@ static struct pppox_sock *__get_item(struct pppoe_net *pn, __be16 sid,</div><div class='ctx'> static int __set_item(struct pppoe_net *pn, struct pppox_sock *po)</div><div class='ctx'> {</div><div class='ctx'> 	int hash = hash_item(po-&gt;pppoe_pa.sid, po-&gt;pppoe_pa.remote);</div><div class='del'>-	struct pppox_sock *ret;</div><div class='add'>+	struct pppox_sock *ret, *first;</div><div class='ctx'> </div><div class='del'>-	ret = pn-&gt;hash_table[hash];</div><div class='add'>+	first = rcu_dereference_protected(pn-&gt;hash_table[hash], lockdep_is_held(&amp;pn-&gt;hash_lock));</div><div class='add'>+	ret = first;</div><div class='ctx'> 	while (ret) {</div><div class='ctx'> 		if (cmp_2_addr(&amp;ret-&gt;pppoe_pa, &amp;po-&gt;pppoe_pa) &amp;&amp;</div><div class='ctx'> 		    ret-&gt;pppoe_ifindex == po-&gt;pppoe_ifindex)</div><div class='ctx'> 			return -EALREADY;</div><div class='ctx'> </div><div class='del'>-		ret = ret-&gt;next;</div><div class='add'>+		ret = rcu_dereference_protected(ret-&gt;next, lockdep_is_held(&amp;pn-&gt;hash_lock));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	po-&gt;next = pn-&gt;hash_table[hash];</div><div class='del'>-	pn-&gt;hash_table[hash] = po;</div><div class='add'>+	RCU_INIT_POINTER(po-&gt;next, first);</div><div class='add'>+	rcu_assign_pointer(pn-&gt;hash_table[hash], po);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -198,20 +199,24 @@ static void __delete_item(struct pppoe_net *pn, __be16 sid,</div><div class='ctx'> 					char *addr, int ifindex)</div><div class='ctx'> {</div><div class='ctx'> 	int hash = hash_item(sid, addr);</div><div class='del'>-	struct pppox_sock *ret, **src;</div><div class='add'>+	struct pppox_sock *ret, __rcu **src;</div><div class='ctx'> </div><div class='del'>-	ret = pn-&gt;hash_table[hash];</div><div class='add'>+	ret = rcu_dereference_protected(pn-&gt;hash_table[hash], lockdep_is_held(&amp;pn-&gt;hash_lock));</div><div class='ctx'> 	src = &amp;pn-&gt;hash_table[hash];</div><div class='ctx'> </div><div class='ctx'> 	while (ret) {</div><div class='ctx'> 		if (cmp_addr(&amp;ret-&gt;pppoe_pa, sid, addr) &amp;&amp;</div><div class='ctx'> 		    ret-&gt;pppoe_ifindex == ifindex) {</div><div class='del'>-			*src = ret-&gt;next;</div><div class='add'>+			struct pppox_sock *next;</div><div class='add'>+</div><div class='add'>+			next = rcu_dereference_protected(ret-&gt;next,</div><div class='add'>+							 lockdep_is_held(&amp;pn-&gt;hash_lock));</div><div class='add'>+			rcu_assign_pointer(*src, next);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		src = &amp;ret-&gt;next;</div><div class='del'>-		ret = ret-&gt;next;</div><div class='add'>+		ret = rcu_dereference_protected(ret-&gt;next, lockdep_is_held(&amp;pn-&gt;hash_lock));</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -225,17 +230,15 @@ static inline struct pppox_sock *get_item(struct pppoe_net *pn, __be16 sid,</div><div class='ctx'> {</div><div class='ctx'> 	struct pppox_sock *po;</div><div class='ctx'> </div><div class='del'>-	read_lock_bh(&amp;pn-&gt;hash_lock);</div><div class='ctx'> 	po = __get_item(pn, sid, addr, ifindex);</div><div class='del'>-	if (po)</div><div class='del'>-		sock_hold(sk_pppox(po));</div><div class='del'>-	read_unlock_bh(&amp;pn-&gt;hash_lock);</div><div class='add'>+	if (po &amp;&amp; !refcount_inc_not_zero(&amp;sk_pppox(po)-&gt;sk_refcnt))</div><div class='add'>+		po = NULL;</div><div class='ctx'> </div><div class='ctx'> 	return po;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct pppox_sock *get_item_by_addr(struct net *net,</div><div class='del'>-						struct sockaddr_pppox *sp)</div><div class='add'>+static inline struct pppox_sock *__get_item_by_addr(struct net *net,</div><div class='add'>+						    struct sockaddr_pppox *sp)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct pppoe_net *pn;</div><div class='hunk'>@@ -243,24 +246,22 @@ static inline struct pppox_sock *get_item_by_addr(struct net *net,</div><div class='ctx'> </div><div class='ctx'> 	int ifindex;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='ctx'> 	dev = dev_get_by_name_rcu(net, sp-&gt;sa_addr.pppoe.dev);</div><div class='ctx'> 	if (dev) {</div><div class='ctx'> 		ifindex = dev-&gt;ifindex;</div><div class='ctx'> 		pn = pppoe_pernet(net);</div><div class='del'>-		pppox_sock = get_item(pn, sp-&gt;sa_addr.pppoe.sid,</div><div class='del'>-				sp-&gt;sa_addr.pppoe.remote, ifindex);</div><div class='add'>+		pppox_sock = __get_item(pn, sp-&gt;sa_addr.pppoe.sid,</div><div class='add'>+					sp-&gt;sa_addr.pppoe.remote, ifindex);</div><div class='ctx'> 	}</div><div class='del'>-	rcu_read_unlock();</div><div class='ctx'> 	return pppox_sock;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void delete_item(struct pppoe_net *pn, __be16 sid,</div><div class='ctx'> 					char *addr, int ifindex)</div><div class='ctx'> {</div><div class='del'>-	write_lock_bh(&amp;pn-&gt;hash_lock);</div><div class='add'>+	spin_lock(&amp;pn-&gt;hash_lock);</div><div class='ctx'> 	__delete_item(pn, sid, addr, ifindex);</div><div class='del'>-	write_unlock_bh(&amp;pn-&gt;hash_lock);</div><div class='add'>+	spin_unlock(&amp;pn-&gt;hash_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /***************************************************************************</div><div class='hunk'>@@ -276,14 +277,16 @@ static void pppoe_flush_dev(struct net_device *dev)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	pn = pppoe_pernet(dev_net(dev));</div><div class='del'>-	write_lock_bh(&amp;pn-&gt;hash_lock);</div><div class='add'>+	spin_lock(&amp;pn-&gt;hash_lock);</div><div class='ctx'> 	for (i = 0; i &lt; PPPOE_HASH_SIZE; i++) {</div><div class='del'>-		struct pppox_sock *po = pn-&gt;hash_table[i];</div><div class='add'>+		struct pppox_sock *po = rcu_dereference_protected(pn-&gt;hash_table[i],</div><div class='add'>+								  lockdep_is_held(&amp;pn-&gt;hash_lock));</div><div class='ctx'> 		struct sock *sk;</div><div class='ctx'> </div><div class='ctx'> 		while (po) {</div><div class='ctx'> 			while (po &amp;&amp; po-&gt;pppoe_dev != dev) {</div><div class='del'>-				po = po-&gt;next;</div><div class='add'>+				po = rcu_dereference_protected(po-&gt;next,</div><div class='add'>+							       lockdep_is_held(&amp;pn-&gt;hash_lock));</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (!po)</div><div class='hunk'>@@ -300,7 +303,7 @@ static void pppoe_flush_dev(struct net_device *dev)</div><div class='ctx'> 			 */</div><div class='ctx'> </div><div class='ctx'> 			sock_hold(sk);</div><div class='del'>-			write_unlock_bh(&amp;pn-&gt;hash_lock);</div><div class='add'>+			spin_unlock(&amp;pn-&gt;hash_lock);</div><div class='ctx'> 			lock_sock(sk);</div><div class='ctx'> </div><div class='ctx'> 			if (po-&gt;pppoe_dev == dev &amp;&amp;</div><div class='hunk'>@@ -320,11 +323,12 @@ static void pppoe_flush_dev(struct net_device *dev)</div><div class='ctx'> 			 */</div><div class='ctx'> </div><div class='ctx'> 			BUG_ON(pppoe_pernet(dev_net(dev)) == NULL);</div><div class='del'>-			write_lock_bh(&amp;pn-&gt;hash_lock);</div><div class='del'>-			po = pn-&gt;hash_table[i];</div><div class='add'>+			spin_lock(&amp;pn-&gt;hash_lock);</div><div class='add'>+			po = rcu_dereference_protected(pn-&gt;hash_table[i],</div><div class='add'>+						       lockdep_is_held(&amp;pn-&gt;hash_lock));</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	write_unlock_bh(&amp;pn-&gt;hash_lock);</div><div class='add'>+	spin_unlock(&amp;pn-&gt;hash_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pppoe_device_event(struct notifier_block *this,</div><div class='hunk'>@@ -372,24 +376,19 @@ static int pppoe_rcv_core(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> 	 * can't change.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	if (skb-&gt;pkt_type == PACKET_OTHERHOST)</div><div class='del'>-		goto abort_kfree;</div><div class='del'>-</div><div class='ctx'> 	if (sk-&gt;sk_state &amp; PPPOX_BOUND) {</div><div class='ctx'> 		ppp_input(&amp;po-&gt;chan, skb);</div><div class='ctx'> 	} else if (sk-&gt;sk_state &amp; PPPOX_RELAY) {</div><div class='del'>-		relay_po = get_item_by_addr(sock_net(sk),</div><div class='del'>-					    &amp;po-&gt;pppoe_relay);</div><div class='add'>+		relay_po = __get_item_by_addr(sock_net(sk),</div><div class='add'>+					      &amp;po-&gt;pppoe_relay);</div><div class='ctx'> 		if (relay_po == NULL)</div><div class='ctx'> 			goto abort_kfree;</div><div class='ctx'> </div><div class='ctx'> 		if ((sk_pppox(relay_po)-&gt;sk_state &amp; PPPOX_CONNECTED) == 0)</div><div class='del'>-			goto abort_put;</div><div class='add'>+			goto abort_kfree;</div><div class='ctx'> </div><div class='ctx'> 		if (!__pppoe_xmit(sk_pppox(relay_po), skb))</div><div class='del'>-			goto abort_put;</div><div class='del'>-</div><div class='del'>-		sock_put(sk_pppox(relay_po));</div><div class='add'>+			goto abort_kfree;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (sock_queue_rcv_skb(sk, skb))</div><div class='ctx'> 			goto abort_kfree;</div><div class='hunk'>@@ -397,9 +396,6 @@ static int pppoe_rcv_core(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	return NET_RX_SUCCESS;</div><div class='ctx'> </div><div class='del'>-abort_put:</div><div class='del'>-	sock_put(sk_pppox(relay_po));</div><div class='del'>-</div><div class='ctx'> abort_kfree:</div><div class='ctx'> 	kfree_skb(skb);</div><div class='ctx'> 	return NET_RX_DROP;</div><div class='hunk'>@@ -418,6 +414,9 @@ static int pppoe_rcv(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	struct pppoe_net *pn;</div><div class='ctx'> 	int len;</div><div class='ctx'> </div><div class='add'>+	if (skb-&gt;pkt_type == PACKET_OTHERHOST)</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='ctx'> 	skb = skb_share_check(skb, GFP_ATOMIC);</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -441,14 +440,11 @@ static int pppoe_rcv(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	ph = pppoe_hdr(skb);</div><div class='ctx'> 	pn = pppoe_pernet(dev_net(dev));</div><div class='ctx'> </div><div class='del'>-	/* Note that get_item does a sock_hold(), so sk_pppox(po)</div><div class='del'>-	 * is known to be safe.</div><div class='del'>-	 */</div><div class='del'>-	po = get_item(pn, ph-&gt;sid, eth_hdr(skb)-&gt;h_source, dev-&gt;ifindex);</div><div class='add'>+	po = __get_item(pn, ph-&gt;sid, eth_hdr(skb)-&gt;h_source, dev-&gt;ifindex);</div><div class='ctx'> 	if (!po)</div><div class='ctx'> 		goto drop;</div><div class='ctx'> </div><div class='del'>-	return sk_receive_skb(sk_pppox(po), skb, 0);</div><div class='add'>+	return __sk_receive_skb(sk_pppox(po), skb, 0, 1, false);</div><div class='ctx'> </div><div class='ctx'> drop:</div><div class='ctx'> 	kfree_skb(skb);</div><div class='hunk'>@@ -528,6 +524,11 @@ static struct proto pppoe_sk_proto __read_mostly = {</div><div class='ctx'> 	.obj_size = sizeof(struct pppox_sock),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void pppoe_destruct(struct sock *sk)</div><div class='add'>+{</div><div class='add'>+	skb_queue_purge(&amp;sk-&gt;sk_receive_queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /***********************************************************************</div><div class='ctx'>  *</div><div class='ctx'>  * Initialize a new struct sock.</div><div class='hunk'>@@ -542,11 +543,13 @@ static int pppoe_create(struct net *net, struct socket *sock, int kern)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	sock_init_data(sock, sk);</div><div class='add'>+	sock_set_flag(sk, SOCK_RCU_FREE);</div><div class='ctx'> </div><div class='ctx'> 	sock-&gt;state	= SS_UNCONNECTED;</div><div class='ctx'> 	sock-&gt;ops	= &amp;pppoe_ops;</div><div class='ctx'> </div><div class='ctx'> 	sk-&gt;sk_backlog_rcv	= pppoe_rcv_core;</div><div class='add'>+	sk-&gt;sk_destruct		= pppoe_destruct;</div><div class='ctx'> 	sk-&gt;sk_state		= PPPOX_NONE;</div><div class='ctx'> 	sk-&gt;sk_type		= SOCK_STREAM;</div><div class='ctx'> 	sk-&gt;sk_family		= PF_PPPOX;</div><div class='hunk'>@@ -599,15 +602,14 @@ static int pppoe_release(struct socket *sock)</div><div class='ctx'> 	sock_orphan(sk);</div><div class='ctx'> 	sock-&gt;sk = NULL;</div><div class='ctx'> </div><div class='del'>-	skb_queue_purge(&amp;sk-&gt;sk_receive_queue);</div><div class='ctx'> 	release_sock(sk);</div><div class='ctx'> 	sock_put(sk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr,</div><div class='del'>-		  int sockaddr_len, int flags)</div><div class='add'>+static int pppoe_connect(struct socket *sock, struct sockaddr_unsized *uservaddr,</div><div class='add'>+			 int sockaddr_len, int flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct sock *sk = sock-&gt;sk;</div><div class='ctx'> 	struct sockaddr_pppox *sp = (struct sockaddr_pppox *)uservaddr;</div><div class='hunk'>@@ -681,9 +683,9 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr,</div><div class='ctx'> 		       &amp;sp-&gt;sa_addr.pppoe,</div><div class='ctx'> 		       sizeof(struct pppoe_addr));</div><div class='ctx'> </div><div class='del'>-		write_lock_bh(&amp;pn-&gt;hash_lock);</div><div class='add'>+		spin_lock(&amp;pn-&gt;hash_lock);</div><div class='ctx'> 		error = __set_item(pn, po);</div><div class='del'>-		write_unlock_bh(&amp;pn-&gt;hash_lock);</div><div class='add'>+		spin_unlock(&amp;pn-&gt;hash_lock);</div><div class='ctx'> 		if (error &lt; 0)</div><div class='ctx'> 			goto err_put;</div><div class='ctx'> </div><div class='hunk'>@@ -693,6 +695,7 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr,</div><div class='ctx'> 		po-&gt;chan.mtu = dev-&gt;mtu - sizeof(struct pppoe_hdr) - 2;</div><div class='ctx'> 		po-&gt;chan.private = sk;</div><div class='ctx'> 		po-&gt;chan.ops = &amp;pppoe_chan_ops;</div><div class='add'>+		po-&gt;chan.direct_xmit = true;</div><div class='ctx'> </div><div class='ctx'> 		error = ppp_register_net_channel(dev_net(dev), &amp;po-&gt;chan);</div><div class='ctx'> 		if (error) {</div><div class='hunk'>@@ -807,11 +810,12 @@ static int pppoe_ioctl(struct socket *sock, unsigned int cmd,</div><div class='ctx'> </div><div class='ctx'> 		/* Check that the socket referenced by the address</div><div class='ctx'> 		   actually exists. */</div><div class='del'>-		relay_po = get_item_by_addr(sock_net(sk), &amp;po-&gt;pppoe_relay);</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		relay_po = __get_item_by_addr(sock_net(sk), &amp;po-&gt;pppoe_relay);</div><div class='add'>+		rcu_read_unlock();</div><div class='ctx'> 		if (!relay_po)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		sock_put(sk_pppox(relay_po));</div><div class='ctx'> 		sk-&gt;sk_state |= PPPOX_RELAY;</div><div class='ctx'> 		err = 0;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1051,11 +1055,11 @@ static inline struct pppox_sock *pppoe_get_idx(struct pppoe_net *pn, loff_t pos)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; PPPOE_HASH_SIZE; i++) {</div><div class='del'>-		po = pn-&gt;hash_table[i];</div><div class='add'>+		po = rcu_dereference(pn-&gt;hash_table[i]);</div><div class='ctx'> 		while (po) {</div><div class='ctx'> 			if (!pos--)</div><div class='ctx'> 				goto out;</div><div class='del'>-			po = po-&gt;next;</div><div class='add'>+			po = rcu_dereference(po-&gt;next);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1064,19 +1068,19 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *pppoe_seq_start(struct seq_file *seq, loff_t *pos)</div><div class='del'>-	__acquires(pn-&gt;hash_lock)</div><div class='add'>+	__acquires(RCU)</div><div class='ctx'> {</div><div class='ctx'> 	struct pppoe_net *pn = pppoe_pernet(seq_file_net(seq));</div><div class='ctx'> 	loff_t l = *pos;</div><div class='ctx'> </div><div class='del'>-	read_lock_bh(&amp;pn-&gt;hash_lock);</div><div class='add'>+	rcu_read_lock();</div><div class='ctx'> 	return l ? pppoe_get_idx(pn, --l) : SEQ_START_TOKEN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *pppoe_seq_next(struct seq_file *seq, void *v, loff_t *pos)</div><div class='ctx'> {</div><div class='ctx'> 	struct pppoe_net *pn = pppoe_pernet(seq_file_net(seq));</div><div class='del'>-	struct pppox_sock *po;</div><div class='add'>+	struct pppox_sock *po, *next;</div><div class='ctx'> </div><div class='ctx'> 	++*pos;</div><div class='ctx'> 	if (v == SEQ_START_TOKEN) {</div><div class='hunk'>@@ -1084,14 +1088,15 @@ static void *pppoe_seq_next(struct seq_file *seq, void *v, loff_t *pos)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	po = v;</div><div class='del'>-	if (po-&gt;next)</div><div class='del'>-		po = po-&gt;next;</div><div class='add'>+	next = rcu_dereference(po-&gt;next);</div><div class='add'>+	if (next)</div><div class='add'>+		po = next;</div><div class='ctx'> 	else {</div><div class='ctx'> 		int hash = hash_item(po-&gt;pppoe_pa.sid, po-&gt;pppoe_pa.remote);</div><div class='ctx'> </div><div class='ctx'> 		po = NULL;</div><div class='ctx'> 		while (++hash &lt; PPPOE_HASH_SIZE) {</div><div class='del'>-			po = pn-&gt;hash_table[hash];</div><div class='add'>+			po = rcu_dereference(pn-&gt;hash_table[hash]);</div><div class='ctx'> 			if (po)</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1102,10 +1107,9 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pppoe_seq_stop(struct seq_file *seq, void *v)</div><div class='del'>-	__releases(pn-&gt;hash_lock)</div><div class='add'>+	__releases(RCU)</div><div class='ctx'> {</div><div class='del'>-	struct pppoe_net *pn = pppoe_pernet(seq_file_net(seq));</div><div class='del'>-	read_unlock_bh(&amp;pn-&gt;hash_lock);</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct seq_operations pppoe_seq_ops = {</div><div class='hunk'>@@ -1148,7 +1152,7 @@ static __net_init int pppoe_init_net(struct net *net)</div><div class='ctx'> 	struct pppoe_net *pn = pppoe_pernet(net);</div><div class='ctx'> 	struct proc_dir_entry *pde;</div><div class='ctx'> </div><div class='del'>-	rwlock_init(&amp;pn-&gt;hash_lock);</div><div class='add'>+	spin_lock_init(&amp;pn-&gt;hash_lock);</div><div class='ctx'> </div><div class='ctx'> 	pde = proc_create_net("pppoe", 0444, net-&gt;proc_net,</div><div class='ctx'> 			&amp;pppoe_seq_ops, sizeof(struct seq_net_private));</div><div class='head'>diff --git a/drivers/net/ppp/pptp.c b/drivers/net/ppp/pptp.c<br/>index 689687bd2574..b18acd810561 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/pptp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/ppp/pptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ppp/pptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ppp/pptp.c</a></div><div class='hunk'>@@ -159,19 +159,17 @@ static int pptp_xmit(struct ppp_channel *chan, struct sk_buff *skb)</div><div class='ctx'> 	int len;</div><div class='ctx'> 	unsigned char *data;</div><div class='ctx'> 	__u32 seq_recv;</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> 	struct rtable *rt;</div><div class='ctx'> 	struct net_device *tdev;</div><div class='ctx'> 	struct iphdr  *iph;</div><div class='ctx'> 	int    max_headroom;</div><div class='ctx'> </div><div class='ctx'> 	if (sk_pppox(po)-&gt;sk_state &amp; PPPOX_DEAD)</div><div class='del'>-		goto tx_error;</div><div class='add'>+		goto tx_drop;</div><div class='ctx'> </div><div class='ctx'> 	rt = pptp_route_output(po, &amp;fl4);</div><div class='ctx'> 	if (IS_ERR(rt))</div><div class='del'>-		goto tx_error;</div><div class='add'>+		goto tx_drop;</div><div class='ctx'> </div><div class='ctx'> 	tdev = rt-&gt;dst.dev;</div><div class='ctx'> </div><div class='hunk'>@@ -179,16 +177,20 @@ static int pptp_xmit(struct ppp_channel *chan, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	if (skb_headroom(skb) &lt; max_headroom || skb_cloned(skb) || skb_shared(skb)) {</div><div class='ctx'> 		struct sk_buff *new_skb = skb_realloc_headroom(skb, max_headroom);</div><div class='del'>-		if (!new_skb) {</div><div class='del'>-			ip_rt_put(rt);</div><div class='add'>+</div><div class='add'>+		if (!new_skb)</div><div class='ctx'> 			goto tx_error;</div><div class='del'>-		}</div><div class='add'>+</div><div class='ctx'> 		if (skb-&gt;sk)</div><div class='ctx'> 			skb_set_owner_w(new_skb, skb-&gt;sk);</div><div class='ctx'> 		consume_skb(skb);</div><div class='ctx'> 		skb = new_skb;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Ensure we can safely access protocol field and LCP code */</div><div class='add'>+	if (!pskb_may_pull(skb, 3))</div><div class='add'>+		goto tx_error;</div><div class='add'>+</div><div class='ctx'> 	data = skb-&gt;data;</div><div class='ctx'> 	islcp = ((data[0] &lt;&lt; 8) + data[1]) == PPP_LCP &amp;&amp; 1 &lt;= data[2] &amp;&amp; data[2] &lt;= 7;</div><div class='ctx'> </div><div class='hunk'>@@ -262,6 +264,8 @@ static int pptp_xmit(struct ppp_channel *chan, struct sk_buff *skb)</div><div class='ctx'> 	return 1;</div><div class='ctx'> </div><div class='ctx'> tx_error:</div><div class='add'>+	ip_rt_put(rt);</div><div class='add'>+tx_drop:</div><div class='ctx'> 	kfree_skb(skb);</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -378,8 +382,8 @@ drop:</div><div class='ctx'> 	return NET_RX_DROP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pptp_bind(struct socket *sock, struct sockaddr *uservaddr,</div><div class='del'>-	int sockaddr_len)</div><div class='add'>+static int pptp_bind(struct socket *sock, struct sockaddr_unsized *uservaddr,</div><div class='add'>+		     int sockaddr_len)</div><div class='ctx'> {</div><div class='ctx'> 	struct sock *sk = sock-&gt;sk;</div><div class='ctx'> 	struct sockaddr_pppox *sp = (struct sockaddr_pppox *) uservaddr;</div><div class='hunk'>@@ -411,8 +415,8 @@ out:</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pptp_connect(struct socket *sock, struct sockaddr *uservaddr,</div><div class='del'>-	int sockaddr_len, int flags)</div><div class='add'>+static int pptp_connect(struct socket *sock, struct sockaddr_unsized *uservaddr,</div><div class='add'>+			int sockaddr_len, int flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct sock *sk = sock-&gt;sk;</div><div class='ctx'> 	struct sockaddr_pppox *sp = (struct sockaddr_pppox *) uservaddr;</div><div class='hunk'>@@ -465,6 +469,7 @@ static int pptp_connect(struct socket *sock, struct sockaddr *uservaddr,</div><div class='ctx'> 	po-&gt;chan.mtu -= PPTP_HEADER_OVERHEAD;</div><div class='ctx'> </div><div class='ctx'> 	po-&gt;chan.hdrlen = 2 + sizeof(struct pptp_gre_header);</div><div class='add'>+	po-&gt;chan.direct_xmit = true;</div><div class='ctx'> 	error = ppp_register_channel(&amp;po-&gt;chan);</div><div class='ctx'> 	if (error) {</div><div class='ctx'> 		pr_err("PPTP: failed to register PPP channel (%d)\n", error);</div><div class='head'>diff --git a/drivers/net/pse-pd/Kconfig b/drivers/net/pse-pd/Kconfig<br/>index 7fab916a7f46..7ef29657ee5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pse-pd/Kconfig</a></div><div class='hunk'>@@ -32,6 +32,17 @@ config PSE_PD692X0</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called pd692x0.</div><div class='ctx'> </div><div class='add'>+config PSE_SI3474</div><div class='add'>+	tristate "Si3474 PSE controller"</div><div class='add'>+	depends on I2C</div><div class='add'>+	help</div><div class='add'>+	  This module provides support for Si3474 regulator based Ethernet</div><div class='add'>+	  Power Sourcing Equipment.</div><div class='add'>+	  Only 4-pair PSE configurations are supported.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the</div><div class='add'>+	  module will be called si3474.</div><div class='add'>+</div><div class='ctx'> config PSE_TPS23881</div><div class='ctx'> 	tristate "TPS23881 PSE controller"</div><div class='ctx'> 	depends on I2C</div><div class='head'>diff --git a/drivers/net/pse-pd/Makefile b/drivers/net/pse-pd/Makefile<br/>index 9d2898b36737..cc78f7ea7f5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pse-pd/Makefile</a></div><div class='hunk'>@@ -5,4 +5,5 @@ obj-$(CONFIG_PSE_CONTROLLER) += pse_core.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_PSE_REGULATOR) += pse_regulator.o</div><div class='ctx'> obj-$(CONFIG_PSE_PD692X0) += pd692x0.o</div><div class='add'>+obj-$(CONFIG_PSE_SI3474) += si3474.o</div><div class='ctx'> obj-$(CONFIG_PSE_TPS23881) += tps23881.o</div><div class='head'>diff --git a/drivers/net/pse-pd/pd692x0.c b/drivers/net/pse-pd/pd692x0.c<br/>index 0af7db80b2f8..134435e90073 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/pd692x0.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/pd692x0.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/pd692x0.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pse-pd/pd692x0.c</a></div><div class='hunk'>@@ -12,6 +12,8 @@</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/pse-pd/pse.h&gt;</div><div class='add'>+#include &lt;linux/regulator/driver.h&gt;</div><div class='add'>+#include &lt;linux/regulator/machine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define PD692X0_PSE_NAME "pd692x0_pse"</div><div class='ctx'> </div><div class='hunk'>@@ -28,6 +30,8 @@</div><div class='ctx'> #define PD692X0_FW_MIN_VER	5</div><div class='ctx'> #define PD692X0_FW_PATCH_VER	5</div><div class='ctx'> </div><div class='add'>+#define PD692X0_USER_BYTE	42</div><div class='add'>+</div><div class='ctx'> enum pd692x0_fw_state {</div><div class='ctx'> 	PD692X0_FW_UNKNOWN,</div><div class='ctx'> 	PD692X0_FW_OK,</div><div class='hunk'>@@ -76,11 +80,19 @@ enum {</div><div class='ctx'> 	PD692X0_MSG_GET_PORT_CLASS,</div><div class='ctx'> 	PD692X0_MSG_GET_PORT_MEAS,</div><div class='ctx'> 	PD692X0_MSG_GET_PORT_PARAM,</div><div class='add'>+	PD692X0_MSG_GET_POWER_BANK,</div><div class='add'>+	PD692X0_MSG_SET_POWER_BANK,</div><div class='add'>+	PD692X0_MSG_SET_USER_BYTE,</div><div class='ctx'> </div><div class='ctx'> 	/* add new message above here */</div><div class='ctx'> 	PD692X0_MSG_CNT</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct pd692x0_matrix {</div><div class='add'>+	u8 hw_port_a;</div><div class='add'>+	u8 hw_port_b;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct pd692x0_priv {</div><div class='ctx'> 	struct i2c_client *client;</div><div class='ctx'> 	struct pse_controller_dev pcdev;</div><div class='hunk'>@@ -94,7 +106,12 @@ struct pd692x0_priv {</div><div class='ctx'> 	bool last_cmd_key;</div><div class='ctx'> 	unsigned long last_cmd_key_time;</div><div class='ctx'> </div><div class='add'>+	bool cfg_saved;</div><div class='ctx'> 	enum ethtool_c33_pse_admin_state admin_state[PD692X0_MAX_PIS];</div><div class='add'>+	struct regulator_dev *manager_reg[PD692X0_MAX_MANAGERS];</div><div class='add'>+	int manager_pw_budget[PD692X0_MAX_MANAGERS];</div><div class='add'>+	int nmanagers;</div><div class='add'>+	struct pd692x0_matrix *port_matrix;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Template list of communication messages. The non-null bytes defined here</div><div class='hunk'>@@ -170,6 +187,22 @@ static const struct pd692x0_msg pd692x0_msg_template_list[PD692X0_MSG_CNT] = {</div><div class='ctx'> 		.data = {0x4e, 0x4e, 0x4e, 0x4e,</div><div class='ctx'> 			 0x4e, 0x4e, 0x4e, 0x4e},</div><div class='ctx'> 	},</div><div class='add'>+	[PD692X0_MSG_GET_POWER_BANK] = {</div><div class='add'>+		.key = PD692X0_KEY_REQ,</div><div class='add'>+		.sub = {0x07, 0x0b, 0x57},</div><div class='add'>+		.data = {   0, 0x4e, 0x4e, 0x4e,</div><div class='add'>+			 0x4e, 0x4e, 0x4e, 0x4e},</div><div class='add'>+	},</div><div class='add'>+	[PD692X0_MSG_SET_POWER_BANK] = {</div><div class='add'>+		.key = PD692X0_KEY_CMD,</div><div class='add'>+		.sub = {0x07, 0x0b, 0x57},</div><div class='add'>+	},</div><div class='add'>+	[PD692X0_MSG_SET_USER_BYTE] = {</div><div class='add'>+		.key = PD692X0_KEY_PRG,</div><div class='add'>+		.sub = {0x41, PD692X0_USER_BYTE},</div><div class='add'>+		.data = {0x4e, 0x4e, 0x4e, 0x4e,</div><div class='add'>+			 0x4e, 0x4e, 0x4e, 0x4e},</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static u8 pd692x0_build_msg(struct pd692x0_msg *msg, u8 echo)</div><div class='hunk'>@@ -431,31 +464,6 @@ static int pd692x0_pi_disable(struct pse_controller_dev *pcdev, int id)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pd692x0_pi_is_enabled(struct pse_controller_dev *pcdev, int id)</div><div class='del'>-{</div><div class='del'>-	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='del'>-	struct pd692x0_msg msg, buf = {0};</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = pd692x0_fw_unavailable(priv);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_STATUS];</div><div class='del'>-	msg.sub[2] = id;</div><div class='del'>-	ret = pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (buf.sub[1]) {</div><div class='del'>-		priv-&gt;admin_state[id] = ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED;</div><div class='del'>-		return 1;</div><div class='del'>-	} else {</div><div class='del'>-		priv-&gt;admin_state[id] = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> struct pd692x0_pse_ext_state_mapping {</div><div class='ctx'> 	u32 status_code;</div><div class='ctx'> 	enum ethtool_c33_pse_ext_state pse_ext_state;</div><div class='hunk'>@@ -517,21 +525,38 @@ pd692x0_pse_ext_state_map[] = {</div><div class='ctx'> 	{ /* sentinel */ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void</div><div class='del'>-pd692x0_get_ext_state(struct ethtool_c33_pse_ext_state_info *c33_ext_state_info,</div><div class='del'>-		      u32 status_code)</div><div class='add'>+static int</div><div class='add'>+pd692x0_pi_get_ext_state(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+			 struct pse_ext_state_info *ext_state_info)</div><div class='ctx'> {</div><div class='add'>+	struct ethtool_c33_pse_ext_state_info *c33_ext_state_info;</div><div class='ctx'> 	const struct pd692x0_pse_ext_state_mapping *ext_state_map;</div><div class='add'>+	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='add'>+	struct pd692x0_msg msg, buf = {0};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pd692x0_fw_unavailable(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='add'>+	msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_STATUS];</div><div class='add'>+	msg.sub[2] = id;</div><div class='add'>+	ret = pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	c33_ext_state_info = &amp;ext_state_info-&gt;c33_ext_state_info;</div><div class='ctx'> 	ext_state_map = pd692x0_pse_ext_state_map;</div><div class='ctx'> 	while (ext_state_map-&gt;status_code) {</div><div class='del'>-		if (ext_state_map-&gt;status_code == status_code) {</div><div class='add'>+		if (ext_state_map-&gt;status_code == buf.sub[0]) {</div><div class='ctx'> 			c33_ext_state_info-&gt;c33_pse_ext_state = ext_state_map-&gt;pse_ext_state;</div><div class='ctx'> 			c33_ext_state_info-&gt;__c33_pse_ext_substate = ext_state_map-&gt;pse_ext_substate;</div><div class='del'>-			return;</div><div class='add'>+			return  0;</div><div class='ctx'> 		}</div><div class='ctx'> 		ext_state_map++;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct pd692x0_class_pw {</div><div class='hunk'>@@ -613,35 +638,66 @@ static int pd692x0_pi_set_pw_from_table(struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-pd692x0_pi_get_pw_ranges(struct pse_control_status *st)</div><div class='add'>+pd692x0_pi_get_pw_limit_ranges(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+			       struct pse_pw_limit_ranges *pw_limit_ranges)</div><div class='ctx'> {</div><div class='add'>+	struct ethtool_c33_pse_pw_limit_range *c33_pw_limit_ranges;</div><div class='ctx'> 	const struct pd692x0_class_pw *pw_table;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	pw_table = pd692x0_class_pw_table;</div><div class='del'>-	st-&gt;c33_pw_limit_ranges = kcalloc(PD692X0_CLASS_PW_TABLE_SIZE,</div><div class='del'>-					  sizeof(struct ethtool_c33_pse_pw_limit_range),</div><div class='del'>-					  GFP_KERNEL);</div><div class='del'>-	if (!st-&gt;c33_pw_limit_ranges)</div><div class='add'>+	c33_pw_limit_ranges = kcalloc(PD692X0_CLASS_PW_TABLE_SIZE,</div><div class='add'>+				      sizeof(*c33_pw_limit_ranges),</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+	if (!c33_pw_limit_ranges)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; PD692X0_CLASS_PW_TABLE_SIZE; i++, pw_table++) {</div><div class='del'>-		st-&gt;c33_pw_limit_ranges[i].min = pw_table-&gt;class_pw;</div><div class='del'>-		st-&gt;c33_pw_limit_ranges[i].max = pw_table-&gt;class_pw + pw_table-&gt;max_added_class_pw;</div><div class='add'>+		c33_pw_limit_ranges[i].min = pw_table-&gt;class_pw;</div><div class='add'>+		c33_pw_limit_ranges[i].max = pw_table-&gt;class_pw +</div><div class='add'>+					     pw_table-&gt;max_added_class_pw;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	st-&gt;c33_pw_limit_nb_ranges = i;</div><div class='add'>+	pw_limit_ranges-&gt;c33_pw_limit_ranges = c33_pw_limit_ranges;</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+pd692x0_pi_get_admin_state(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+			   struct pse_admin_state *admin_state)</div><div class='add'>+{</div><div class='add'>+	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='add'>+	struct pd692x0_msg msg, buf = {0};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pd692x0_fw_unavailable(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_STATUS];</div><div class='add'>+	msg.sub[2] = id;</div><div class='add'>+	ret = pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (buf.sub[1])</div><div class='add'>+		admin_state-&gt;c33_admin_state =</div><div class='add'>+			ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED;</div><div class='add'>+	else</div><div class='add'>+		admin_state-&gt;c33_admin_state =</div><div class='add'>+			ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED;</div><div class='add'>+</div><div class='add'>+	priv-&gt;admin_state[id] = admin_state-&gt;c33_admin_state;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev,</div><div class='del'>-				      unsigned long id,</div><div class='del'>-				      struct netlink_ext_ack *extack,</div><div class='del'>-				      struct pse_control_status *status)</div><div class='add'>+static int</div><div class='add'>+pd692x0_pi_get_pw_status(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+			 struct pse_pw_status *pw_status)</div><div class='ctx'> {</div><div class='ctx'> 	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='ctx'> 	struct pd692x0_msg msg, buf = {0};</div><div class='del'>-	u32 class;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = pd692x0_fw_unavailable(priv);</div><div class='hunk'>@@ -656,52 +712,87 @@ static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev,</div><div class='ctx'> </div><div class='ctx'> 	/* Compare Port Status (Communication Protocol Document par. 7.1) */</div><div class='ctx'> 	if ((buf.sub[0] &amp; 0xf0) == 0x80 || (buf.sub[0] &amp; 0xf0) == 0x90)</div><div class='del'>-		status-&gt;c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING;</div><div class='add'>+		pw_status-&gt;c33_pw_status =</div><div class='add'>+			ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING;</div><div class='ctx'> 	else if (buf.sub[0] == 0x1b || buf.sub[0] == 0x22)</div><div class='del'>-		status-&gt;c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_SEARCHING;</div><div class='add'>+		pw_status-&gt;c33_pw_status =</div><div class='add'>+			ETHTOOL_C33_PSE_PW_D_STATUS_SEARCHING;</div><div class='ctx'> 	else if (buf.sub[0] == 0x12)</div><div class='del'>-		status-&gt;c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_FAULT;</div><div class='add'>+		pw_status-&gt;c33_pw_status =</div><div class='add'>+			ETHTOOL_C33_PSE_PW_D_STATUS_FAULT;</div><div class='ctx'> 	else</div><div class='del'>-		status-&gt;c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED;</div><div class='add'>+		pw_status-&gt;c33_pw_status =</div><div class='add'>+			ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED;</div><div class='ctx'> </div><div class='del'>-	if (buf.sub[1])</div><div class='del'>-		status-&gt;c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED;</div><div class='del'>-	else</div><div class='del'>-		status-&gt;c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;admin_state[id] = status-&gt;c33_admin_state;</div><div class='add'>+static int</div><div class='add'>+pd692x0_pi_get_pw_class(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='add'>+	struct pd692x0_msg msg, buf = {0};</div><div class='add'>+	u32 class;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	pd692x0_get_ext_state(&amp;status-&gt;c33_ext_state_info, buf.sub[0]);</div><div class='del'>-	status-&gt;c33_actual_pw = (buf.data[0] &lt;&lt; 4 | buf.data[1]) * 100;</div><div class='add'>+	ret = pd692x0_fw_unavailable(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_PARAM];</div><div class='add'>+	msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_CLASS];</div><div class='ctx'> 	msg.sub[2] = id;</div><div class='del'>-	memset(&amp;buf, 0, sizeof(buf));</div><div class='ctx'> 	ret = pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = pd692x0_pi_get_pw_from_table(buf.data[0], buf.data[1]);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	class = buf.data[3] &gt;&gt; 4;</div><div class='add'>+	if (class &lt;= 8)</div><div class='add'>+		return class;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+pd692x0_pi_get_actual_pw(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='add'>+	struct pd692x0_msg msg, buf = {0};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pd692x0_fw_unavailable(priv);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	status-&gt;c33_avail_pw_limit = ret;</div><div class='ctx'> </div><div class='del'>-	memset(&amp;buf, 0, sizeof(buf));</div><div class='del'>-	msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_CLASS];</div><div class='add'>+	msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_STATUS];</div><div class='ctx'> 	msg.sub[2] = id;</div><div class='ctx'> 	ret = pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	class = buf.data[3] &gt;&gt; 4;</div><div class='del'>-	if (class &lt;= 8)</div><div class='del'>-		status-&gt;c33_pw_class = class;</div><div class='add'>+	return (buf.data[0] &lt;&lt; 4 | buf.data[1]) * 100;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	ret = pd692x0_pi_get_pw_ranges(status);</div><div class='add'>+static int</div><div class='add'>+pd692x0_pi_get_prio(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='add'>+	struct pd692x0_msg msg, buf = {0};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pd692x0_fw_unavailable(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_PARAM];</div><div class='add'>+	msg.sub[2] = id;</div><div class='add'>+	ret = pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='add'>+	if (!buf.data[2] || buf.data[2] &gt; pcdev-&gt;pis_prio_max + 1)</div><div class='add'>+		return -ERANGE;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* PSE core priority start at 0 */</div><div class='add'>+	return buf.data[2] - 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pd692x0_msg_ver pd692x0_get_sw_version(struct pd692x0_priv *priv)</div><div class='hunk'>@@ -731,14 +822,10 @@ static struct pd692x0_msg_ver pd692x0_get_sw_version(struct pd692x0_priv *priv)</div><div class='ctx'> </div><div class='ctx'> struct pd692x0_manager {</div><div class='ctx'> 	struct device_node *port_node[PD692X0_MAX_MANAGER_PORTS];</div><div class='add'>+	struct device_node *node;</div><div class='ctx'> 	int nports;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct pd692x0_matrix {</div><div class='del'>-	u8 hw_port_a;</div><div class='del'>-	u8 hw_port_b;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static int</div><div class='ctx'> pd692x0_of_get_ports_manager(struct pd692x0_priv *priv,</div><div class='ctx'> 			     struct pd692x0_manager *manager,</div><div class='hunk'>@@ -785,7 +872,7 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> pd692x0_of_get_managers(struct pd692x0_priv *priv,</div><div class='del'>-			struct pd692x0_manager manager[PD692X0_MAX_MANAGERS])</div><div class='add'>+			struct pd692x0_manager *manager)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *managers_node, *node;</div><div class='ctx'> 	int ret, nmanagers, i, j;</div><div class='hunk'>@@ -822,11 +909,14 @@ pd692x0_of_get_managers(struct pd692x0_priv *priv,</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='add'>+		of_node_get(node);</div><div class='add'>+		manager[manager_id].node = node;</div><div class='ctx'> 		nmanagers++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	of_node_put(managers_node);</div><div class='del'>-	return nmanagers;</div><div class='add'>+	priv-&gt;nmanagers = nmanagers;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	for (i = 0; i &lt; nmanagers; i++) {</div><div class='hunk'>@@ -834,6 +924,8 @@ out:</div><div class='ctx'> 			of_node_put(manager[i].port_node[j]);</div><div class='ctx'> 			manager[i].port_node[j] = NULL;</div><div class='ctx'> 		}</div><div class='add'>+		of_node_put(manager[i].node);</div><div class='add'>+		manager[i].node = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	of_node_put(node);</div><div class='hunk'>@@ -841,6 +933,161 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static const struct regulator_ops dummy_ops;</div><div class='add'>+</div><div class='add'>+static struct regulator_dev *</div><div class='add'>+pd692x0_register_manager_regulator(struct device *dev, char *reg_name,</div><div class='add'>+				   struct device_node *node)</div><div class='add'>+{</div><div class='add'>+	struct regulator_init_data *rinit_data;</div><div class='add'>+	struct regulator_config rconfig = {0};</div><div class='add'>+	struct regulator_desc *rdesc;</div><div class='add'>+	struct regulator_dev *rdev;</div><div class='add'>+</div><div class='add'>+	rinit_data = devm_kzalloc(dev, sizeof(*rinit_data),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (!rinit_data)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	rdesc = devm_kzalloc(dev, sizeof(*rdesc), GFP_KERNEL);</div><div class='add'>+	if (!rdesc)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	rdesc-&gt;name = reg_name;</div><div class='add'>+	rdesc-&gt;type = REGULATOR_VOLTAGE;</div><div class='add'>+	rdesc-&gt;ops = &amp;dummy_ops;</div><div class='add'>+	rdesc-&gt;owner = THIS_MODULE;</div><div class='add'>+</div><div class='add'>+	rinit_data-&gt;supply_regulator = "vmain";</div><div class='add'>+</div><div class='add'>+	rconfig.dev = dev;</div><div class='add'>+	rconfig.init_data = rinit_data;</div><div class='add'>+	rconfig.of_node = node;</div><div class='add'>+</div><div class='add'>+	rdev = devm_regulator_register(dev, rdesc, &amp;rconfig);</div><div class='add'>+	if (IS_ERR(rdev)) {</div><div class='add'>+		dev_err_probe(dev, PTR_ERR(rdev),</div><div class='add'>+			      "Failed to register regulator\n");</div><div class='add'>+		return rdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rdev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+pd692x0_register_managers_regulator(struct pd692x0_priv *priv,</div><div class='add'>+				    const struct pd692x0_manager *manager)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;priv-&gt;client-&gt;dev;</div><div class='add'>+	size_t reg_name_len;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Each regulator name len is dev name + 12 char +</div><div class='add'>+	 * int max digit number (10) + 1</div><div class='add'>+	 */</div><div class='add'>+	reg_name_len = strlen(dev_name(dev)) + 23;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;nmanagers; i++) {</div><div class='add'>+		static const char * const regulators[] = { "vaux5", "vaux3p3" };</div><div class='add'>+		struct regulator_dev *rdev;</div><div class='add'>+		char *reg_name;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		reg_name = devm_kzalloc(dev, reg_name_len, GFP_KERNEL);</div><div class='add'>+		if (!reg_name)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		snprintf(reg_name, 26, "pse-%s-manager%d", dev_name(dev), i);</div><div class='add'>+		rdev = pd692x0_register_manager_regulator(dev, reg_name,</div><div class='add'>+							  manager[i].node);</div><div class='add'>+		if (IS_ERR(rdev))</div><div class='add'>+			return PTR_ERR(rdev);</div><div class='add'>+</div><div class='add'>+		/* VMAIN is described as main supply for the manager.</div><div class='add'>+		 * Add other VAUX power supplies and link them to the</div><div class='add'>+		 * virtual device rdev-&gt;dev.</div><div class='add'>+		 */</div><div class='add'>+		ret = devm_regulator_bulk_get_enable(&amp;rdev-&gt;dev,</div><div class='add'>+						     ARRAY_SIZE(regulators),</div><div class='add'>+						     regulators);</div><div class='add'>+		if (ret)</div><div class='add'>+			return dev_err_probe(&amp;rdev-&gt;dev, ret,</div><div class='add'>+					     "Failed to enable regulators\n");</div><div class='add'>+</div><div class='add'>+		priv-&gt;manager_reg[i] = rdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+pd692x0_conf_manager_power_budget(struct pd692x0_priv *priv, int id)</div><div class='add'>+{</div><div class='add'>+	struct pd692x0_msg msg, buf;</div><div class='add'>+	int ret, pw_mW;</div><div class='add'>+</div><div class='add'>+	pw_mW = priv-&gt;manager_pw_budget[id] / 1000;</div><div class='add'>+	if (!pw_mW)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	msg = pd692x0_msg_template_list[PD692X0_MSG_GET_POWER_BANK];</div><div class='add'>+	msg.data[0] = id;</div><div class='add'>+	ret = pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	msg = pd692x0_msg_template_list[PD692X0_MSG_SET_POWER_BANK];</div><div class='add'>+	msg.data[0] = id;</div><div class='add'>+	msg.data[1] = pw_mW &gt;&gt; 8;</div><div class='add'>+	msg.data[2] = pw_mW &amp; 0xff;</div><div class='add'>+	msg.data[3] = buf.sub[2];</div><div class='add'>+	msg.data[4] = buf.data[0];</div><div class='add'>+	msg.data[5] = buf.data[1];</div><div class='add'>+	msg.data[6] = buf.data[2];</div><div class='add'>+	msg.data[7] = buf.data[3];</div><div class='add'>+	return pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+pd692x0_req_managers_pw_budget(struct pd692x0_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;nmanagers; i++) {</div><div class='add'>+		struct regulator *supply = priv-&gt;manager_reg[i]-&gt;supply;</div><div class='add'>+		int pw_budget;</div><div class='add'>+</div><div class='add'>+		pw_budget = regulator_get_unclaimed_power_budget(supply);</div><div class='add'>+		if (!pw_budget)</div><div class='add'>+			/* Do nothing if no power budget */</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Max power budget per manager */</div><div class='add'>+		if (pw_budget &gt; 6000000)</div><div class='add'>+			pw_budget = 6000000;</div><div class='add'>+		ret = regulator_request_power_budget(supply, pw_budget);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		priv-&gt;manager_pw_budget[i] = pw_budget;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+pd692x0_configure_managers(struct pd692x0_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;nmanagers; i++) {</div><div class='add'>+		ret = pd692x0_conf_manager_power_budget(priv, i);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> pd692x0_set_port_matrix(const struct pse_pi_pairset *pairset,</div><div class='ctx'> 			const struct pd692x0_manager *manager,</div><div class='hunk'>@@ -881,10 +1128,9 @@ pd692x0_set_port_matrix(const struct pse_pi_pairset *pairset,</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> pd692x0_set_ports_matrix(struct pd692x0_priv *priv,</div><div class='del'>-			 const struct pd692x0_manager *manager,</div><div class='del'>-			 int nmanagers,</div><div class='del'>-			 struct pd692x0_matrix port_matrix[PD692X0_MAX_PIS])</div><div class='add'>+			 const struct pd692x0_manager *manager)</div><div class='ctx'> {</div><div class='add'>+	struct pd692x0_matrix *port_matrix = priv-&gt;port_matrix;</div><div class='ctx'> 	struct pse_controller_dev *pcdev = &amp;priv-&gt;pcdev;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='hunk'>@@ -897,7 +1143,7 @@ pd692x0_set_ports_matrix(struct pd692x0_priv *priv,</div><div class='ctx'> 	/* Update with values for every PSE PIs */</div><div class='ctx'> 	for (i = 0; i &lt; pcdev-&gt;nr_lines; i++) {</div><div class='ctx'> 		ret = pd692x0_set_port_matrix(&amp;pcdev-&gt;pi[i].pairset[0],</div><div class='del'>-					      manager, nmanagers,</div><div class='add'>+					      manager, priv-&gt;nmanagers,</div><div class='ctx'> 					      &amp;port_matrix[i]);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(&amp;priv-&gt;client-&gt;dev,</div><div class='hunk'>@@ -906,7 +1152,7 @@ pd692x0_set_ports_matrix(struct pd692x0_priv *priv,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		ret = pd692x0_set_port_matrix(&amp;pcdev-&gt;pi[i].pairset[1],</div><div class='del'>-					      manager, nmanagers,</div><div class='add'>+					      manager, priv-&gt;nmanagers,</div><div class='ctx'> 					      &amp;port_matrix[i]);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			dev_err(&amp;priv-&gt;client-&gt;dev,</div><div class='hunk'>@@ -919,9 +1165,9 @@ pd692x0_set_ports_matrix(struct pd692x0_priv *priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-pd692x0_write_ports_matrix(struct pd692x0_priv *priv,</div><div class='del'>-			   const struct pd692x0_matrix port_matrix[PD692X0_MAX_PIS])</div><div class='add'>+pd692x0_write_ports_matrix(struct pd692x0_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	struct pd692x0_matrix *port_matrix = priv-&gt;port_matrix;</div><div class='ctx'> 	struct pd692x0_msg msg, buf;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='hunk'>@@ -946,36 +1192,122 @@ pd692x0_write_ports_matrix(struct pd692x0_priv *priv,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pd692x0_setup_pi_matrix(struct pse_controller_dev *pcdev)</div><div class='add'>+static int pd692x0_hw_conf_init(struct pd692x0_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct pd692x0_manager manager[PD692X0_MAX_MANAGERS] = {0};</div><div class='del'>-	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='del'>-	struct pd692x0_matrix port_matrix[PD692X0_MAX_PIS];</div><div class='del'>-	int ret, i, j, nmanagers;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	/* Should we flash the port matrix */</div><div class='add'>+	/* Is PD692x0 ready to be configured? */</div><div class='ctx'> 	if (priv-&gt;fw_state != PD692X0_FW_OK &amp;&amp;</div><div class='ctx'> 	    priv-&gt;fw_state != PD692X0_FW_COMPLETE)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = pd692x0_of_get_managers(priv, manager);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	ret = pd692x0_configure_managers(priv);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	nmanagers = ret;</div><div class='del'>-	ret = pd692x0_set_ports_matrix(priv, manager, nmanagers, port_matrix);</div><div class='add'>+	ret = pd692x0_write_ports_matrix(priv);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = pd692x0_write_ports_matrix(priv, port_matrix);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	for (i = 0; i &lt; nmanagers; i++) {</div><div class='add'>+static void pd692x0_of_put_managers(struct pd692x0_priv *priv,</div><div class='add'>+				    struct pd692x0_manager *manager)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;nmanagers; i++) {</div><div class='ctx'> 		for (j = 0; j &lt; manager[i].nports; j++)</div><div class='ctx'> 			of_node_put(manager[i].port_node[j]);</div><div class='add'>+		of_node_put(manager[i].node);</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pd692x0_managers_free_pw_budget(struct pd692x0_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PD692X0_MAX_MANAGERS; i++) {</div><div class='add'>+		struct regulator *supply;</div><div class='add'>+</div><div class='add'>+		if (!priv-&gt;manager_reg[i] || !priv-&gt;manager_pw_budget[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		supply = priv-&gt;manager_reg[i]-&gt;supply;</div><div class='add'>+		if (!supply)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		regulator_free_power_budget(supply,</div><div class='add'>+					    priv-&gt;manager_pw_budget[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+pd692x0_save_user_byte(struct pd692x0_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct pd692x0_msg msg, buf;</div><div class='add'>+</div><div class='add'>+	msg = pd692x0_msg_template_list[PD692X0_MSG_SET_USER_BYTE];</div><div class='add'>+	return pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pd692x0_setup_pi_matrix(struct pse_controller_dev *pcdev)</div><div class='add'>+{</div><div class='add'>+	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='add'>+	struct pd692x0_matrix *port_matrix;</div><div class='add'>+	struct pd692x0_manager *manager;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	manager = kcalloc(PD692X0_MAX_MANAGERS, sizeof(*manager), GFP_KERNEL);</div><div class='add'>+	if (!manager)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	port_matrix = devm_kcalloc(&amp;priv-&gt;client-&gt;dev, PD692X0_MAX_PIS,</div><div class='add'>+				   sizeof(*port_matrix), GFP_KERNEL);</div><div class='add'>+	if (!port_matrix) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_free_manager;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;port_matrix = port_matrix;</div><div class='add'>+</div><div class='add'>+	ret = pd692x0_of_get_managers(priv, manager);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_free_manager;</div><div class='add'>+</div><div class='add'>+	ret = pd692x0_register_managers_regulator(priv, manager);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_of_managers;</div><div class='add'>+</div><div class='add'>+	ret = pd692x0_req_managers_pw_budget(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_of_managers;</div><div class='add'>+</div><div class='add'>+	ret = pd692x0_set_ports_matrix(priv, manager);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_managers_req_pw;</div><div class='add'>+</div><div class='add'>+	/* Do not init the conf if it is already saved */</div><div class='add'>+	if (!priv-&gt;cfg_saved) {</div><div class='add'>+		ret = pd692x0_hw_conf_init(priv);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err_managers_req_pw;</div><div class='add'>+</div><div class='add'>+		ret = pd692x0_save_user_byte(priv);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err_managers_req_pw;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pd692x0_of_put_managers(priv, manager);</div><div class='add'>+	kfree(manager);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_managers_req_pw:</div><div class='add'>+	pd692x0_managers_free_pw_budget(priv);</div><div class='add'>+err_of_managers:</div><div class='add'>+	pd692x0_of_put_managers(priv, manager);</div><div class='add'>+err_free_manager:</div><div class='add'>+	kfree(manager);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -999,13 +1331,12 @@ static int pd692x0_pi_get_voltage(struct pse_controller_dev *pcdev, int id)</div><div class='ctx'> 	return (buf.sub[0] &lt;&lt; 8 | buf.sub[1]) * 100000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pd692x0_pi_get_current_limit(struct pse_controller_dev *pcdev,</div><div class='del'>-					int id)</div><div class='add'>+static int pd692x0_pi_get_pw_limit(struct pse_controller_dev *pcdev,</div><div class='add'>+				   int id)</div><div class='ctx'> {</div><div class='ctx'> 	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='ctx'> 	struct pd692x0_msg msg, buf = {0};</div><div class='del'>-	int mW, uV, uA, ret;</div><div class='del'>-	s64 tmp_64;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_PARAM];</div><div class='ctx'> 	msg.sub[2] = id;</div><div class='hunk'>@@ -1013,63 +1344,64 @@ static int pd692x0_pi_get_current_limit(struct pse_controller_dev *pcdev,</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = pd692x0_pi_get_pw_from_table(buf.data[2], buf.data[3]);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	return pd692x0_pi_get_pw_from_table(buf.data[0], buf.data[1]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pd692x0_pi_set_pw_limit(struct pse_controller_dev *pcdev,</div><div class='add'>+				   int id, int max_mW)</div><div class='add'>+{</div><div class='add'>+	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='add'>+	struct device *dev = &amp;priv-&gt;client-&gt;dev;</div><div class='add'>+	struct pd692x0_msg msg, buf = {0};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pd692x0_fw_unavailable(priv);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	mW = ret;</div><div class='ctx'> </div><div class='del'>-	ret = pd692x0_pi_get_voltage(pcdev, id);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	msg = pd692x0_msg_template_list[PD692X0_MSG_SET_PORT_PARAM];</div><div class='add'>+	msg.sub[2] = id;</div><div class='add'>+	ret = pd692x0_pi_set_pw_from_table(dev, &amp;msg, max_mW);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	uV = ret;</div><div class='ctx'> </div><div class='del'>-	tmp_64 = mW;</div><div class='del'>-	tmp_64 *= 1000000000ull;</div><div class='del'>-	/* uA = mW * 1000000000 / uV */</div><div class='del'>-	uA = DIV_ROUND_CLOSEST_ULL(tmp_64, uV);</div><div class='del'>-	return uA;</div><div class='add'>+	return pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pd692x0_pi_set_current_limit(struct pse_controller_dev *pcdev,</div><div class='del'>-					int id, int max_uA)</div><div class='add'>+static int pd692x0_pi_set_prio(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+			       unsigned int prio)</div><div class='ctx'> {</div><div class='ctx'> 	struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);</div><div class='del'>-	struct device *dev = &amp;priv-&gt;client-&gt;dev;</div><div class='ctx'> 	struct pd692x0_msg msg, buf = {0};</div><div class='del'>-	int uV, ret, mW;</div><div class='del'>-	s64 tmp_64;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = pd692x0_fw_unavailable(priv);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = pd692x0_pi_get_voltage(pcdev, id);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-	uV = ret;</div><div class='del'>-</div><div class='ctx'> 	msg = pd692x0_msg_template_list[PD692X0_MSG_SET_PORT_PARAM];</div><div class='ctx'> 	msg.sub[2] = id;</div><div class='del'>-	tmp_64 = uV;</div><div class='del'>-	tmp_64 *= max_uA;</div><div class='del'>-	/* mW = uV * uA / 1000000000 */</div><div class='del'>-	mW = DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000);</div><div class='del'>-	ret = pd692x0_pi_set_pw_from_table(dev, &amp;msg, mW);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	/* Controller priority from 1 to 3 */</div><div class='add'>+	msg.data[4] = prio + 1;</div><div class='ctx'> </div><div class='ctx'> 	return pd692x0_sendrecv_msg(priv, &amp;msg, &amp;buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct pse_controller_ops pd692x0_ops = {</div><div class='ctx'> 	.setup_pi_matrix = pd692x0_setup_pi_matrix,</div><div class='del'>-	.ethtool_get_status = pd692x0_ethtool_get_status,</div><div class='add'>+	.pi_get_admin_state = pd692x0_pi_get_admin_state,</div><div class='add'>+	.pi_get_pw_status = pd692x0_pi_get_pw_status,</div><div class='add'>+	.pi_get_ext_state = pd692x0_pi_get_ext_state,</div><div class='add'>+	.pi_get_pw_class = pd692x0_pi_get_pw_class,</div><div class='add'>+	.pi_get_actual_pw = pd692x0_pi_get_actual_pw,</div><div class='ctx'> 	.pi_enable = pd692x0_pi_enable,</div><div class='ctx'> 	.pi_disable = pd692x0_pi_disable,</div><div class='del'>-	.pi_is_enabled = pd692x0_pi_is_enabled,</div><div class='ctx'> 	.pi_get_voltage = pd692x0_pi_get_voltage,</div><div class='del'>-	.pi_get_current_limit = pd692x0_pi_get_current_limit,</div><div class='del'>-	.pi_set_current_limit = pd692x0_pi_set_current_limit,</div><div class='add'>+	.pi_get_pw_limit = pd692x0_pi_get_pw_limit,</div><div class='add'>+	.pi_set_pw_limit = pd692x0_pi_set_pw_limit,</div><div class='add'>+	.pi_get_pw_limit_ranges = pd692x0_pi_get_pw_limit_ranges,</div><div class='add'>+	.pi_get_prio = pd692x0_pi_get_prio,</div><div class='add'>+	.pi_set_prio = pd692x0_pi_set_prio,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define PD692X0_FW_LINE_MAX_SZ 0xff</div><div class='hunk'>@@ -1378,7 +1710,7 @@ static enum fw_upload_err pd692x0_fw_poll_complete(struct fw_upload *fwl)</div><div class='ctx'> 		return FW_UPLOAD_ERR_FW_INVALID;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = pd692x0_setup_pi_matrix(&amp;priv-&gt;pcdev);</div><div class='add'>+	ret = pd692x0_hw_conf_init(priv);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		dev_err(&amp;client-&gt;dev, "Error configuring ports matrix (%pe)\n",</div><div class='ctx'> 			ERR_PTR(ret));</div><div class='hunk'>@@ -1423,6 +1755,7 @@ static const struct fw_upload_ops pd692x0_fw_ops = {</div><div class='ctx'> </div><div class='ctx'> static int pd692x0_i2c_probe(struct i2c_client *client)</div><div class='ctx'> {</div><div class='add'>+	static const char * const regulators[] = { "vdd", "vdda" };</div><div class='ctx'> 	struct pd692x0_msg msg, buf = {0}, zero = {0};</div><div class='ctx'> 	struct device *dev = &amp;client-&gt;dev;</div><div class='ctx'> 	struct pd692x0_msg_ver ver;</div><div class='hunk'>@@ -1430,6 +1763,12 @@ static int pd692x0_i2c_probe(struct i2c_client *client)</div><div class='ctx'> 	struct fw_upload *fwl;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),</div><div class='add'>+					     regulators);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret,</div><div class='add'>+				     "Failed to enable regulators\n");</div><div class='add'>+</div><div class='ctx'> 	if (!i2c_check_functionality(client-&gt;adapter, I2C_FUNC_I2C)) {</div><div class='ctx'> 		dev_err(dev, "i2c check functionality failed\n");</div><div class='ctx'> 		return -ENXIO;</div><div class='hunk'>@@ -1480,12 +1819,17 @@ static int pd692x0_i2c_probe(struct i2c_client *client)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (buf.data[2] == PD692X0_USER_BYTE)</div><div class='add'>+		priv-&gt;cfg_saved = true;</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;np = dev-&gt;of_node;</div><div class='ctx'> 	priv-&gt;pcdev.nr_lines = PD692X0_MAX_PIS;</div><div class='ctx'> 	priv-&gt;pcdev.owner = THIS_MODULE;</div><div class='ctx'> 	priv-&gt;pcdev.ops = &amp;pd692x0_ops;</div><div class='ctx'> 	priv-&gt;pcdev.dev = dev;</div><div class='ctx'> 	priv-&gt;pcdev.types = ETHTOOL_PSE_C33;</div><div class='add'>+	priv-&gt;pcdev.supp_budget_eval_strategies = PSE_BUDGET_EVAL_STRAT_DYNAMIC;</div><div class='add'>+	priv-&gt;pcdev.pis_prio_max = 2;</div><div class='ctx'> 	ret = devm_pse_controller_register(dev, &amp;priv-&gt;pcdev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return dev_err_probe(dev, ret,</div><div class='hunk'>@@ -1505,6 +1849,7 @@ static void pd692x0_i2c_remove(struct i2c_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	struct pd692x0_priv *priv = i2c_get_clientdata(client);</div><div class='ctx'> </div><div class='add'>+	pd692x0_managers_free_pw_budget(priv);</div><div class='ctx'> 	firmware_upload_unregister(priv-&gt;fwl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c<br/>index 2906ce173f66..23eb3c9d0bcd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/pse_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/pse_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/pse_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pse-pd/pse_core.c</a></div><div class='hunk'>@@ -6,13 +6,22 @@</div><div class='ctx'> //</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/ethtool_netlink.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/pse-pd/pse.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/driver.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/machine.h&gt;</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+#include &lt;net/net_trackers.h&gt;</div><div class='add'>+</div><div class='add'>+#define PSE_PW_D_LIMIT INT_MAX</div><div class='ctx'> </div><div class='ctx'> static DEFINE_MUTEX(pse_list_mutex);</div><div class='ctx'> static LIST_HEAD(pse_controller_list);</div><div class='add'>+static DEFINE_XARRAY_ALLOC(pse_pw_d_map);</div><div class='add'>+static DEFINE_MUTEX(pse_pw_d_mutex);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * struct pse_control - a PSE control</div><div class='hunk'>@@ -22,6 +31,7 @@ static LIST_HEAD(pse_controller_list);</div><div class='ctx'>  * @list: list entry for the pcdev's PSE controller list</div><div class='ctx'>  * @id: ID of the PSE line in the PSE controller device</div><div class='ctx'>  * @refcnt: Number of gets of this pse_control</div><div class='add'>+ * @attached_phydev: PHY device pointer attached by the PSE control</div><div class='ctx'>  */</div><div class='ctx'> struct pse_control {</div><div class='ctx'> 	struct pse_controller_dev *pcdev;</div><div class='hunk'>@@ -29,6 +39,22 @@ struct pse_control {</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> 	unsigned int id;</div><div class='ctx'> 	struct kref refcnt;</div><div class='add'>+	struct phy_device *attached_phydev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct pse_power_domain - a PSE power domain</div><div class='add'>+ * @id: ID of the power domain</div><div class='add'>+ * @supply: Power supply the Power Domain</div><div class='add'>+ * @refcnt: Number of gets of this pse_power_domain</div><div class='add'>+ * @budget_eval_strategy: Current power budget evaluation strategy of the</div><div class='add'>+ *			  power domain</div><div class='add'>+ */</div><div class='add'>+struct pse_power_domain {</div><div class='add'>+	int id;</div><div class='add'>+	struct regulator *supply;</div><div class='add'>+	struct kref refcnt;</div><div class='add'>+	u32 budget_eval_strategy;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int of_load_single_pse_pi_pairset(struct device_node *node,</div><div class='hunk'>@@ -207,6 +233,182 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * pse_control_find_net_by_id - Find net attached to the pse control id</div><div class='add'>+ * @pcdev: a pointer to the PSE</div><div class='add'>+ * @id: index of the PSE control</div><div class='add'>+ *</div><div class='add'>+ * Return: pse_control pointer or NULL. The device returned has had a</div><div class='add'>+ *	   reference added and the pointer is safe until the user calls</div><div class='add'>+ *	   pse_control_put() to indicate they have finished with it.</div><div class='add'>+ */</div><div class='add'>+static struct pse_control *</div><div class='add'>+pse_control_find_by_id(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct pse_control *psec;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pse_list_mutex);</div><div class='add'>+	list_for_each_entry(psec, &amp;pcdev-&gt;pse_control_head, list) {</div><div class='add'>+		if (psec-&gt;id == id) {</div><div class='add'>+			kref_get(&amp;psec-&gt;refcnt);</div><div class='add'>+			mutex_unlock(&amp;pse_list_mutex);</div><div class='add'>+			return psec;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;pse_list_mutex);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_control_get_netdev - Return netdev associated to a PSE control</div><div class='add'>+ * @psec: PSE control pointer</div><div class='add'>+ *</div><div class='add'>+ * Return: netdev pointer or NULL</div><div class='add'>+ */</div><div class='add'>+static struct net_device *pse_control_get_netdev(struct pse_control *psec)</div><div class='add'>+{</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	if (!psec || !psec-&gt;attached_phydev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return psec-&gt;attached_phydev-&gt;attached_dev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_pi_is_hw_enabled - Is PI enabled at the hardware level</div><div class='add'>+ * @pcdev: a pointer to the PSE controller device</div><div class='add'>+ * @id: Index of the PI</div><div class='add'>+ *</div><div class='add'>+ * Return: 1 if the PI is enabled at the hardware level, 0 if not, and</div><div class='add'>+ *	   a failure value on error</div><div class='add'>+ */</div><div class='add'>+static int pse_pi_is_hw_enabled(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct pse_admin_state admin_state = {0};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pcdev-&gt;ops-&gt;pi_get_admin_state(pcdev, id, &amp;admin_state);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* PI is well enabled at the hardware level */</div><div class='add'>+	if (admin_state.podl_admin_state == ETHTOOL_PODL_PSE_ADMIN_STATE_ENABLED ||</div><div class='add'>+	    admin_state.c33_admin_state == ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_pi_is_admin_enable_pending - Check if PI is in admin enable pending state</div><div class='add'>+ *				    which mean the power is not yet being</div><div class='add'>+ *				    delivered</div><div class='add'>+ * @pcdev: a pointer to the PSE controller device</div><div class='add'>+ * @id: Index of the PI</div><div class='add'>+ *</div><div class='add'>+ * Detects if a PI is enabled in software with a PD detected, but the hardware</div><div class='add'>+ * admin state hasn't been applied yet.</div><div class='add'>+ *</div><div class='add'>+ * This function is used in the power delivery and retry mechanisms to determine</div><div class='add'>+ * which PIs need to have power delivery attempted again.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the PI has admin enable flag set in software but not yet</div><div class='add'>+ *	   reflected in the hardware admin state, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool</div><div class='add'>+pse_pi_is_admin_enable_pending(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* PI not enabled or nothing is plugged */</div><div class='add'>+	if (!pcdev-&gt;pi[id].admin_state_enabled ||</div><div class='add'>+	    !pcdev-&gt;pi[id].isr_pd_detected)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	ret = pse_pi_is_hw_enabled(pcdev, id);</div><div class='add'>+	/* PSE PI is already enabled at hardware level */</div><div class='add'>+	if (ret == 1)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int _pse_pi_delivery_power_sw_pw_ctrl(struct pse_controller_dev *pcdev,</div><div class='add'>+					     int id,</div><div class='add'>+					     struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_pw_d_retry_power_delivery - Retry power delivery for pending ports in a</div><div class='add'>+ *				   PSE power domain</div><div class='add'>+ * @pcdev: a pointer to the PSE controller device</div><div class='add'>+ * @pw_d: a pointer to the PSE power domain</div><div class='add'>+ *</div><div class='add'>+ * Scans all ports in the specified power domain and attempts to enable power</div><div class='add'>+ * delivery to any ports that have admin enable state set but don't yet have</div><div class='add'>+ * hardware power enabled. Used when there are changes in connection status,</div><div class='add'>+ * admin state, or priority that might allow previously unpowered ports to</div><div class='add'>+ * receive power, especially in over-budget conditions.</div><div class='add'>+ */</div><div class='add'>+static void pse_pw_d_retry_power_delivery(struct pse_controller_dev *pcdev,</div><div class='add'>+					  struct pse_power_domain *pw_d)</div><div class='add'>+{</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcdev-&gt;nr_lines; i++) {</div><div class='add'>+		int prio_max = pcdev-&gt;nr_lines;</div><div class='add'>+		struct netlink_ext_ack extack;</div><div class='add'>+</div><div class='add'>+		if (pcdev-&gt;pi[i].pw_d != pw_d)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!pse_pi_is_admin_enable_pending(pcdev, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Do not try to enable PI with a lower prio (higher value)</div><div class='add'>+		 * than one which already can't be enabled.</div><div class='add'>+		 */</div><div class='add'>+		if (pcdev-&gt;pi[i].prio &gt; prio_max)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = _pse_pi_delivery_power_sw_pw_ctrl(pcdev, i, &amp;extack);</div><div class='add'>+		if (ret == -ERANGE)</div><div class='add'>+			prio_max = pcdev-&gt;pi[i].prio;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_pw_d_is_sw_pw_control - Determine if power control is software managed</div><div class='add'>+ * @pcdev: a pointer to the PSE controller device</div><div class='add'>+ * @pw_d: a pointer to the PSE power domain</div><div class='add'>+ *</div><div class='add'>+ * This function determines whether the power control for a specific power</div><div class='add'>+ * domain is managed by software in the interrupt handler rather than directly</div><div class='add'>+ * by hardware.</div><div class='add'>+ *</div><div class='add'>+ * Software power control is active in the following cases:</div><div class='add'>+ * - When the budget evaluation strategy is set to static</div><div class='add'>+ * - When the budget evaluation strategy is disabled but the PSE controller</div><div class='add'>+ *   has an interrupt handler that can report if a Powered Device is connected</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the power control of the power domain is managed by software,</div><div class='add'>+ *         false otherwise</div><div class='add'>+ */</div><div class='add'>+static bool pse_pw_d_is_sw_pw_control(struct pse_controller_dev *pcdev,</div><div class='add'>+				      struct pse_power_domain *pw_d)</div><div class='add'>+{</div><div class='add'>+	if (!pw_d)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (pw_d-&gt;budget_eval_strategy == PSE_BUDGET_EVAL_STRAT_STATIC)</div><div class='add'>+		return true;</div><div class='add'>+	if (pw_d-&gt;budget_eval_strategy == PSE_BUDGET_EVAL_STRAT_DISABLED &amp;&amp;</div><div class='add'>+	    pcdev-&gt;ops-&gt;pi_enable &amp;&amp; pcdev-&gt;irq)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int pse_pi_is_enabled(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev);</div><div class='hunk'>@@ -214,22 +416,257 @@ static int pse_pi_is_enabled(struct regulator_dev *rdev)</div><div class='ctx'> 	int id, ret;</div><div class='ctx'> </div><div class='ctx'> 	ops = pcdev-&gt;ops;</div><div class='del'>-	if (!ops-&gt;pi_is_enabled)</div><div class='add'>+	if (!ops-&gt;pi_get_admin_state)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	id = rdev_get_id(rdev);</div><div class='ctx'> 	mutex_lock(&amp;pcdev-&gt;lock);</div><div class='del'>-	ret = ops-&gt;pi_is_enabled(pcdev, id);</div><div class='add'>+	if (pse_pw_d_is_sw_pw_control(pcdev, pcdev-&gt;pi[id].pw_d)) {</div><div class='add'>+		ret = pcdev-&gt;pi[id].admin_state_enabled;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pse_pi_is_hw_enabled(pcdev, id);</div><div class='add'>+</div><div class='add'>+out:</div><div class='ctx'> 	mutex_unlock(&amp;pcdev-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * pse_pi_deallocate_pw_budget - Deallocate power budget of the PI</div><div class='add'>+ * @pi: a pointer to the PSE PI</div><div class='add'>+ */</div><div class='add'>+static void pse_pi_deallocate_pw_budget(struct pse_pi *pi)</div><div class='add'>+{</div><div class='add'>+	if (!pi-&gt;pw_d || !pi-&gt;pw_allocated_mW)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	regulator_free_power_budget(pi-&gt;pw_d-&gt;supply, pi-&gt;pw_allocated_mW);</div><div class='add'>+	pi-&gt;pw_allocated_mW = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _pse_pi_disable - Call disable operation. Assumes the PSE lock has been</div><div class='add'>+ *		     acquired.</div><div class='add'>+ * @pcdev: a pointer to the PSE</div><div class='add'>+ * @id: index of the PSE control</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int _pse_pi_disable(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	const struct pse_controller_ops *ops = pcdev-&gt;ops;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ops-&gt;pi_disable)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ret = ops-&gt;pi_disable(pcdev, id);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pse_pi_deallocate_pw_budget(&amp;pcdev-&gt;pi[id]);</div><div class='add'>+</div><div class='add'>+	if (pse_pw_d_is_sw_pw_control(pcdev, pcdev-&gt;pi[id].pw_d))</div><div class='add'>+		pse_pw_d_retry_power_delivery(pcdev, pcdev-&gt;pi[id].pw_d);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_disable_pi_pol - Disable a PI on a power budget policy</div><div class='add'>+ * @pcdev: a pointer to the PSE</div><div class='add'>+ * @id: index of the PSE PI</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int pse_disable_pi_pol(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	unsigned long notifs = ETHTOOL_PSE_EVENT_OVER_BUDGET;</div><div class='add'>+	struct pse_ntf ntf = {};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(pcdev-&gt;dev, "Disabling PI %d to free power budget\n", id);</div><div class='add'>+</div><div class='add'>+	ret = _pse_pi_disable(pcdev, id);</div><div class='add'>+	if (ret)</div><div class='add'>+		notifs |= ETHTOOL_PSE_EVENT_SW_PW_CONTROL_ERROR;</div><div class='add'>+</div><div class='add'>+	ntf.notifs = notifs;</div><div class='add'>+	ntf.id = id;</div><div class='add'>+	kfifo_in_spinlocked(&amp;pcdev-&gt;ntf_fifo, &amp;ntf, 1, &amp;pcdev-&gt;ntf_fifo_lock);</div><div class='add'>+	schedule_work(&amp;pcdev-&gt;ntf_work);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_disable_pi_prio - Disable all PIs of a given priority inside a PSE</div><div class='add'>+ *			 power domain</div><div class='add'>+ * @pcdev: a pointer to the PSE</div><div class='add'>+ * @pw_d: a pointer to the PSE power domain</div><div class='add'>+ * @prio: priority</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int pse_disable_pi_prio(struct pse_controller_dev *pcdev,</div><div class='add'>+			       struct pse_power_domain *pw_d,</div><div class='add'>+			       int prio)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcdev-&gt;nr_lines; i++) {</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		if (pcdev-&gt;pi[i].prio != prio ||</div><div class='add'>+		    pcdev-&gt;pi[i].pw_d != pw_d ||</div><div class='add'>+		    pse_pi_is_hw_enabled(pcdev, i) &lt;= 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = pse_disable_pi_pol(pcdev, i);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_pi_allocate_pw_budget_static_prio - Allocate power budget for the PI</div><div class='add'>+ *					   when the budget eval strategy is</div><div class='add'>+ *					   static</div><div class='add'>+ * @pcdev: a pointer to the PSE</div><div class='add'>+ * @id: index of the PSE control</div><div class='add'>+ * @pw_req: power requested in mW</div><div class='add'>+ * @extack: extack for error reporting</div><div class='add'>+ *</div><div class='add'>+ * Allocates power using static budget evaluation strategy, where allocation</div><div class='add'>+ * is based on PD classification. When insufficient budget is available,</div><div class='add'>+ * lower-priority ports (higher priority numbers) are turned off first.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+pse_pi_allocate_pw_budget_static_prio(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+				      int pw_req, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct pse_pi *pi = &amp;pcdev-&gt;pi[id];</div><div class='add'>+	int ret, _prio;</div><div class='add'>+</div><div class='add'>+	_prio = pcdev-&gt;nr_lines;</div><div class='add'>+	while (regulator_request_power_budget(pi-&gt;pw_d-&gt;supply, pw_req) == -ERANGE) {</div><div class='add'>+		if (_prio &lt;= pi-&gt;prio) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "PI %d: not enough power budget available",</div><div class='add'>+					   id);</div><div class='add'>+			return -ERANGE;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = pse_disable_pi_prio(pcdev, pi-&gt;pw_d, _prio);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		_prio--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pi-&gt;pw_allocated_mW = pw_req;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_pi_allocate_pw_budget - Allocate power budget for the PI</div><div class='add'>+ * @pcdev: a pointer to the PSE</div><div class='add'>+ * @id: index of the PSE control</div><div class='add'>+ * @pw_req: power requested in mW</div><div class='add'>+ * @extack: extack for error reporting</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int pse_pi_allocate_pw_budget(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+				     int pw_req, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct pse_pi *pi = &amp;pcdev-&gt;pi[id];</div><div class='add'>+</div><div class='add'>+	if (!pi-&gt;pw_d)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* PSE_BUDGET_EVAL_STRAT_STATIC */</div><div class='add'>+	if (pi-&gt;pw_d-&gt;budget_eval_strategy == PSE_BUDGET_EVAL_STRAT_STATIC)</div><div class='add'>+		return pse_pi_allocate_pw_budget_static_prio(pcdev, id, pw_req,</div><div class='add'>+							     extack);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * _pse_pi_delivery_power_sw_pw_ctrl - Enable PSE PI in case of software power</div><div class='add'>+ *				       control. Assumes the PSE lock has been</div><div class='add'>+ *				       acquired.</div><div class='add'>+ * @pcdev: a pointer to the PSE</div><div class='add'>+ * @id: index of the PSE control</div><div class='add'>+ * @extack: extack for error reporting</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int _pse_pi_delivery_power_sw_pw_ctrl(struct pse_controller_dev *pcdev,</div><div class='add'>+					     int id,</div><div class='add'>+					     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	const struct pse_controller_ops *ops = pcdev-&gt;ops;</div><div class='add'>+	struct pse_pi *pi = &amp;pcdev-&gt;pi[id];</div><div class='add'>+	int ret, pw_req;</div><div class='add'>+</div><div class='add'>+	if (!ops-&gt;pi_get_pw_req) {</div><div class='add'>+		/* No power allocation management */</div><div class='add'>+		ret = ops-&gt;pi_enable(pcdev, id);</div><div class='add'>+		if (ret)</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "PI %d: enable error %d",</div><div class='add'>+					   id, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ops-&gt;pi_get_pw_req(pcdev, id);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pw_req = ret;</div><div class='add'>+</div><div class='add'>+	/* Compare requested power with port power limit and use the lowest</div><div class='add'>+	 * one.</div><div class='add'>+	 */</div><div class='add'>+	if (ops-&gt;pi_get_pw_limit) {</div><div class='add'>+		ret = ops-&gt;pi_get_pw_limit(pcdev, id);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (ret &lt; pw_req)</div><div class='add'>+			pw_req = ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pse_pi_allocate_pw_budget(pcdev, id, pw_req, extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ops-&gt;pi_enable(pcdev, id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pse_pi_deallocate_pw_budget(pi);</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "PI %d: enable error %d",</div><div class='add'>+				   id, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int pse_pi_enable(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev);</div><div class='ctx'> 	const struct pse_controller_ops *ops;</div><div class='del'>-	int id, ret;</div><div class='add'>+	int id, ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	ops = pcdev-&gt;ops;</div><div class='ctx'> 	if (!ops-&gt;pi_enable)</div><div class='hunk'>@@ -237,6 +674,23 @@ static int pse_pi_enable(struct regulator_dev *rdev)</div><div class='ctx'> </div><div class='ctx'> 	id = rdev_get_id(rdev);</div><div class='ctx'> 	mutex_lock(&amp;pcdev-&gt;lock);</div><div class='add'>+	if (pse_pw_d_is_sw_pw_control(pcdev, pcdev-&gt;pi[id].pw_d)) {</div><div class='add'>+		/* Manage enabled status by software.</div><div class='add'>+		 * Real enable process will happen if a port is connected.</div><div class='add'>+		 */</div><div class='add'>+		if (pcdev-&gt;pi[id].isr_pd_detected) {</div><div class='add'>+			struct netlink_ext_ack extack;</div><div class='add'>+</div><div class='add'>+			ret = _pse_pi_delivery_power_sw_pw_ctrl(pcdev, id, &amp;extack);</div><div class='add'>+		}</div><div class='add'>+		if (!ret || ret == -ERANGE) {</div><div class='add'>+			pcdev-&gt;pi[id].admin_state_enabled = 1;</div><div class='add'>+			ret = 0;</div><div class='add'>+		}</div><div class='add'>+		mutex_unlock(&amp;pcdev-&gt;lock);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = ops-&gt;pi_enable(pcdev, id);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		pcdev-&gt;pi[id].admin_state_enabled = 1;</div><div class='hunk'>@@ -248,21 +702,18 @@ static int pse_pi_enable(struct regulator_dev *rdev)</div><div class='ctx'> static int pse_pi_disable(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev);</div><div class='del'>-	const struct pse_controller_ops *ops;</div><div class='add'>+	struct pse_pi *pi;</div><div class='ctx'> 	int id, ret;</div><div class='ctx'> </div><div class='del'>-	ops = pcdev-&gt;ops;</div><div class='del'>-	if (!ops-&gt;pi_disable)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='ctx'> 	id = rdev_get_id(rdev);</div><div class='add'>+	pi = &amp;pcdev-&gt;pi[id];</div><div class='ctx'> 	mutex_lock(&amp;pcdev-&gt;lock);</div><div class='del'>-	ret = ops-&gt;pi_disable(pcdev, id);</div><div class='add'>+	ret = _pse_pi_disable(pcdev, id);</div><div class='ctx'> 	if (!ret)</div><div class='del'>-		pcdev-&gt;pi[id].admin_state_enabled = 0;</div><div class='del'>-	mutex_unlock(&amp;pcdev-&gt;lock);</div><div class='add'>+		pi-&gt;admin_state_enabled = 0;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	mutex_unlock(&amp;pcdev-&gt;lock);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int _pse_pi_get_voltage(struct regulator_dev *rdev)</div><div class='hunk'>@@ -291,32 +742,24 @@ static int pse_pi_get_voltage(struct regulator_dev *rdev)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev,</div><div class='del'>-				   int id,</div><div class='del'>-				   struct netlink_ext_ack *extack,</div><div class='del'>-				   struct pse_control_status *status);</div><div class='del'>-</div><div class='ctx'> static int pse_pi_get_current_limit(struct regulator_dev *rdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev);</div><div class='ctx'> 	const struct pse_controller_ops *ops;</div><div class='del'>-	struct netlink_ext_ack extack = {};</div><div class='del'>-	struct pse_control_status st = {};</div><div class='del'>-	int id, uV, ret;</div><div class='add'>+	int id, uV, mW, ret;</div><div class='ctx'> 	s64 tmp_64;</div><div class='ctx'> </div><div class='ctx'> 	ops = pcdev-&gt;ops;</div><div class='ctx'> 	id = rdev_get_id(rdev);</div><div class='add'>+	if (!ops-&gt;pi_get_pw_limit || !ops-&gt;pi_get_voltage)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;pcdev-&gt;lock);</div><div class='del'>-	if (ops-&gt;pi_get_current_limit) {</div><div class='del'>-		ret = ops-&gt;pi_get_current_limit(pcdev, id);</div><div class='add'>+	ret = ops-&gt;pi_get_pw_limit(pcdev, id);</div><div class='add'>+	if (ret &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='del'>-	}</div><div class='add'>+	mW = ret;</div><div class='ctx'> </div><div class='del'>-	/* If pi_get_current_limit() callback not populated get voltage</div><div class='del'>-	 * from pi_get_voltage() and power limit from ethtool_get_status()</div><div class='del'>-	 *  to calculate current limit.</div><div class='del'>-	 */</div><div class='ctx'> 	ret = _pse_pi_get_voltage(rdev);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		dev_err(pcdev-&gt;dev, "Voltage null\n");</div><div class='hunk'>@@ -327,16 +770,7 @@ static int pse_pi_get_current_limit(struct regulator_dev *rdev)</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	uV = ret;</div><div class='ctx'> </div><div class='del'>-	ret = _pse_ethtool_get_status(pcdev, id, &amp;extack, &amp;st);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	if (!st.c33_avail_pw_limit) {</div><div class='del'>-		ret = -ENODATA;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	tmp_64 = st.c33_avail_pw_limit;</div><div class='add'>+	tmp_64 = mW;</div><div class='ctx'> 	tmp_64 *= 1000000000ull;</div><div class='ctx'> 	/* uA = mW * 1000000000 / uV */</div><div class='ctx'> 	ret = DIV_ROUND_CLOSEST_ULL(tmp_64, uV);</div><div class='hunk'>@@ -351,15 +785,33 @@ static int pse_pi_set_current_limit(struct regulator_dev *rdev, int min_uA,</div><div class='ctx'> {</div><div class='ctx'> 	struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev);</div><div class='ctx'> 	const struct pse_controller_ops *ops;</div><div class='del'>-	int id, ret;</div><div class='add'>+	int id, mW, ret;</div><div class='add'>+	s64 tmp_64;</div><div class='ctx'> </div><div class='ctx'> 	ops = pcdev-&gt;ops;</div><div class='del'>-	if (!ops-&gt;pi_set_current_limit)</div><div class='add'>+	if (!ops-&gt;pi_set_pw_limit || !ops-&gt;pi_get_voltage)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='add'>+	if (max_uA &gt; MAX_PI_CURRENT)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='ctx'> 	id = rdev_get_id(rdev);</div><div class='ctx'> 	mutex_lock(&amp;pcdev-&gt;lock);</div><div class='del'>-	ret = ops-&gt;pi_set_current_limit(pcdev, id, max_uA);</div><div class='add'>+	ret = _pse_pi_get_voltage(rdev);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		dev_err(pcdev-&gt;dev, "Voltage null\n");</div><div class='add'>+		ret = -ERANGE;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	tmp_64 = ret;</div><div class='add'>+	tmp_64 *= max_uA;</div><div class='add'>+	/* mW = uA * uV / 1000000000 */</div><div class='add'>+	mW = DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000);</div><div class='add'>+	ret = ops-&gt;pi_set_pw_limit(pcdev, id, mW);</div><div class='add'>+out:</div><div class='ctx'> 	mutex_unlock(&amp;pcdev-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -403,17 +855,16 @@ devm_pse_pi_regulator_register(struct pse_controller_dev *pcdev,</div><div class='ctx'> </div><div class='ctx'> 	rinit_data-&gt;constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS;</div><div class='ctx'> </div><div class='del'>-	if (pcdev-&gt;ops-&gt;pi_set_current_limit) {</div><div class='add'>+	if (pcdev-&gt;ops-&gt;pi_set_pw_limit)</div><div class='ctx'> 		rinit_data-&gt;constraints.valid_ops_mask |=</div><div class='ctx'> 			REGULATOR_CHANGE_CURRENT;</div><div class='del'>-		rinit_data-&gt;constraints.max_uA = MAX_PI_CURRENT;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	rinit_data-&gt;supply_regulator = "vpwr";</div><div class='ctx'> </div><div class='ctx'> 	rconfig.dev = pcdev-&gt;dev;</div><div class='ctx'> 	rconfig.driver_data = pcdev;</div><div class='ctx'> 	rconfig.init_data = rinit_data;</div><div class='add'>+	rconfig.of_node = pcdev-&gt;pi[id].np;</div><div class='ctx'> </div><div class='ctx'> 	rdev = devm_regulator_register(pcdev-&gt;dev, rdesc, &amp;rconfig);</div><div class='ctx'> 	if (IS_ERR(rdev)) {</div><div class='hunk'>@@ -427,6 +878,158 @@ devm_pse_pi_regulator_register(struct pse_controller_dev *pcdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __pse_pw_d_release(struct kref *kref)</div><div class='add'>+{</div><div class='add'>+	struct pse_power_domain *pw_d = container_of(kref,</div><div class='add'>+						     struct pse_power_domain,</div><div class='add'>+						     refcnt);</div><div class='add'>+</div><div class='add'>+	regulator_put(pw_d-&gt;supply);</div><div class='add'>+	xa_erase(&amp;pse_pw_d_map, pw_d-&gt;id);</div><div class='add'>+	mutex_unlock(&amp;pse_pw_d_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_flush_pw_ds - flush all PSE power domains of a PSE</div><div class='add'>+ * @pcdev: a pointer to the initialized PSE controller device</div><div class='add'>+ */</div><div class='add'>+static void pse_flush_pw_ds(struct pse_controller_dev *pcdev)</div><div class='add'>+{</div><div class='add'>+	struct pse_power_domain *pw_d;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcdev-&gt;nr_lines; i++) {</div><div class='add'>+		if (!pcdev-&gt;pi[i].pw_d)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pw_d = xa_load(&amp;pse_pw_d_map, pcdev-&gt;pi[i].pw_d-&gt;id);</div><div class='add'>+		if (!pw_d)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		kref_put_mutex(&amp;pw_d-&gt;refcnt, __pse_pw_d_release,</div><div class='add'>+			       &amp;pse_pw_d_mutex);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * devm_pse_alloc_pw_d - allocate a new PSE power domain for a device</div><div class='add'>+ * @dev: device that is registering this PSE power domain</div><div class='add'>+ *</div><div class='add'>+ * Return: Pointer to the newly allocated PSE power domain or error pointers</div><div class='add'>+ */</div><div class='add'>+static struct pse_power_domain *devm_pse_alloc_pw_d(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pse_power_domain *pw_d;</div><div class='add'>+	int index, ret;</div><div class='add'>+</div><div class='add'>+	pw_d = devm_kzalloc(dev, sizeof(*pw_d), GFP_KERNEL);</div><div class='add'>+	if (!pw_d)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	ret = xa_alloc(&amp;pse_pw_d_map, &amp;index, pw_d, XA_LIMIT(1, PSE_PW_D_LIMIT),</div><div class='add'>+		       GFP_KERNEL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+	kref_init(&amp;pw_d-&gt;refcnt);</div><div class='add'>+	pw_d-&gt;id = index;</div><div class='add'>+	return pw_d;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_register_pw_ds - register the PSE power domains for a PSE</div><div class='add'>+ * @pcdev: a pointer to the PSE controller device</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int pse_register_pw_ds(struct pse_controller_dev *pcdev)</div><div class='add'>+{</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pse_pw_d_mutex);</div><div class='add'>+	for (i = 0; i &lt; pcdev-&gt;nr_lines; i++) {</div><div class='add'>+		struct regulator_dev *rdev = pcdev-&gt;pi[i].rdev;</div><div class='add'>+		struct pse_power_domain *pw_d;</div><div class='add'>+		struct regulator *supply;</div><div class='add'>+		bool present = false;</div><div class='add'>+		unsigned long index;</div><div class='add'>+</div><div class='add'>+		/* No regulator or regulator parent supply registered.</div><div class='add'>+		 * We need a regulator parent to register a PSE power domain</div><div class='add'>+		 */</div><div class='add'>+		if (!rdev || !rdev-&gt;supply)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		xa_for_each(&amp;pse_pw_d_map, index, pw_d) {</div><div class='add'>+			/* Power supply already registered as a PSE power</div><div class='add'>+			 * domain.</div><div class='add'>+			 */</div><div class='add'>+			if (regulator_is_equal(pw_d-&gt;supply, rdev-&gt;supply)) {</div><div class='add'>+				present = true;</div><div class='add'>+				pcdev-&gt;pi[i].pw_d = pw_d;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (present) {</div><div class='add'>+			kref_get(&amp;pw_d-&gt;refcnt);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pw_d = devm_pse_alloc_pw_d(pcdev-&gt;dev);</div><div class='add'>+		if (IS_ERR(pw_d)) {</div><div class='add'>+			ret = PTR_ERR(pw_d);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		supply = regulator_get(&amp;rdev-&gt;dev, rdev-&gt;supply_name);</div><div class='add'>+		if (IS_ERR(supply)) {</div><div class='add'>+			xa_erase(&amp;pse_pw_d_map, pw_d-&gt;id);</div><div class='add'>+			ret = PTR_ERR(supply);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pw_d-&gt;supply = supply;</div><div class='add'>+		if (pcdev-&gt;supp_budget_eval_strategies)</div><div class='add'>+			pw_d-&gt;budget_eval_strategy = pcdev-&gt;supp_budget_eval_strategies;</div><div class='add'>+		else</div><div class='add'>+			pw_d-&gt;budget_eval_strategy = PSE_BUDGET_EVAL_STRAT_DISABLED;</div><div class='add'>+		kref_init(&amp;pw_d-&gt;refcnt);</div><div class='add'>+		pcdev-&gt;pi[i].pw_d = pw_d;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;pse_pw_d_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_send_ntf_worker - Worker to send PSE notifications</div><div class='add'>+ * @work: work object</div><div class='add'>+ *</div><div class='add'>+ * Manage and send PSE netlink notifications using a workqueue to avoid</div><div class='add'>+ * deadlock between pcdev_lock and pse_list_mutex.</div><div class='add'>+ */</div><div class='add'>+static void pse_send_ntf_worker(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct pse_controller_dev *pcdev;</div><div class='add'>+	struct pse_ntf ntf;</div><div class='add'>+</div><div class='add'>+	pcdev = container_of(work, struct pse_controller_dev, ntf_work);</div><div class='add'>+</div><div class='add'>+	while (kfifo_out(&amp;pcdev-&gt;ntf_fifo, &amp;ntf, 1)) {</div><div class='add'>+		struct net_device *netdev;</div><div class='add'>+		struct pse_control *psec;</div><div class='add'>+</div><div class='add'>+		psec = pse_control_find_by_id(pcdev, ntf.id);</div><div class='add'>+		rtnl_lock();</div><div class='add'>+		netdev = pse_control_get_netdev(psec);</div><div class='add'>+		if (netdev)</div><div class='add'>+			ethnl_pse_send_ntf(netdev, ntf.notifs);</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+		pse_control_put(psec);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * pse_controller_register - register a PSE controller device</div><div class='ctx'>  * @pcdev: a pointer to the initialized PSE controller device</div><div class='hunk'>@@ -440,10 +1043,24 @@ int pse_controller_register(struct pse_controller_dev *pcdev)</div><div class='ctx'> </div><div class='ctx'> 	mutex_init(&amp;pcdev-&gt;lock);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;pcdev-&gt;pse_control_head);</div><div class='add'>+	spin_lock_init(&amp;pcdev-&gt;ntf_fifo_lock);</div><div class='add'>+	ret = kfifo_alloc(&amp;pcdev-&gt;ntf_fifo, pcdev-&gt;nr_lines, GFP_KERNEL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(pcdev-&gt;dev, "failed to allocate kfifo notifications\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	INIT_WORK(&amp;pcdev-&gt;ntf_work, pse_send_ntf_worker);</div><div class='ctx'> </div><div class='ctx'> 	if (!pcdev-&gt;nr_lines)</div><div class='ctx'> 		pcdev-&gt;nr_lines = 1;</div><div class='ctx'> </div><div class='add'>+	if (!pcdev-&gt;ops-&gt;pi_get_admin_state ||</div><div class='add'>+	    !pcdev-&gt;ops-&gt;pi_get_pw_status) {</div><div class='add'>+		dev_err(pcdev-&gt;dev,</div><div class='add'>+			"Mandatory status report callbacks are missing");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = of_load_pse_pis(pcdev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -479,6 +1096,10 @@ int pse_controller_register(struct pse_controller_dev *pcdev)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = pse_register_pw_ds(pcdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	mutex_lock(&amp;pse_list_mutex);</div><div class='ctx'> 	list_add(&amp;pcdev-&gt;list, &amp;pse_controller_list);</div><div class='ctx'> 	mutex_unlock(&amp;pse_list_mutex);</div><div class='hunk'>@@ -493,7 +1114,12 @@ EXPORT_SYMBOL_GPL(pse_controller_register);</div><div class='ctx'>  */</div><div class='ctx'> void pse_controller_unregister(struct pse_controller_dev *pcdev)</div><div class='ctx'> {</div><div class='add'>+	pse_flush_pw_ds(pcdev);</div><div class='ctx'> 	pse_release_pis(pcdev);</div><div class='add'>+	if (pcdev-&gt;irq)</div><div class='add'>+		disable_irq(pcdev-&gt;irq);</div><div class='add'>+	cancel_work_sync(&amp;pcdev-&gt;ntf_work);</div><div class='add'>+	kfifo_free(&amp;pcdev-&gt;ntf_fifo);</div><div class='ctx'> 	mutex_lock(&amp;pse_list_mutex);</div><div class='ctx'> 	list_del(&amp;pcdev-&gt;list);</div><div class='ctx'> 	mutex_unlock(&amp;pse_list_mutex);</div><div class='hunk'>@@ -540,6 +1166,191 @@ int devm_pse_controller_register(struct device *dev,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(devm_pse_controller_register);</div><div class='ctx'> </div><div class='add'>+struct pse_irq {</div><div class='add'>+	struct pse_controller_dev *pcdev;</div><div class='add'>+	struct pse_irq_desc desc;</div><div class='add'>+	unsigned long *notifs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_to_regulator_notifs - Convert PSE notifications to Regulator</div><div class='add'>+ *			     notifications</div><div class='add'>+ * @notifs: PSE notifications</div><div class='add'>+ *</div><div class='add'>+ * Return: Regulator notifications</div><div class='add'>+ */</div><div class='add'>+static unsigned long pse_to_regulator_notifs(unsigned long notifs)</div><div class='add'>+{</div><div class='add'>+	unsigned long rnotifs = 0;</div><div class='add'>+</div><div class='add'>+	if (notifs &amp; ETHTOOL_PSE_EVENT_OVER_CURRENT)</div><div class='add'>+		rnotifs |= REGULATOR_EVENT_OVER_CURRENT;</div><div class='add'>+	if (notifs &amp; ETHTOOL_PSE_EVENT_OVER_TEMP)</div><div class='add'>+		rnotifs |= REGULATOR_EVENT_OVER_TEMP;</div><div class='add'>+</div><div class='add'>+	return rnotifs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_set_config_isr - Set PSE control config according to the PSE</div><div class='add'>+ *			notifications</div><div class='add'>+ * @pcdev: a pointer to the PSE</div><div class='add'>+ * @id: index of the PSE control</div><div class='add'>+ * @notifs: PSE event notifications</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int pse_set_config_isr(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+			      unsigned long notifs)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (notifs &amp; PSE_BUDGET_EVAL_STRAT_DYNAMIC)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if ((notifs &amp; ETHTOOL_C33_PSE_EVENT_DISCONNECTION) &amp;&amp;</div><div class='add'>+	    ((notifs &amp; ETHTOOL_C33_PSE_EVENT_DETECTION) ||</div><div class='add'>+	     (notifs &amp; ETHTOOL_C33_PSE_EVENT_CLASSIFICATION))) {</div><div class='add'>+		dev_dbg(pcdev-&gt;dev,</div><div class='add'>+			"PI %d: error, connection and disconnection reported simultaneously",</div><div class='add'>+			id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (notifs &amp; ETHTOOL_C33_PSE_EVENT_CLASSIFICATION) {</div><div class='add'>+		struct netlink_ext_ack extack;</div><div class='add'>+</div><div class='add'>+		pcdev-&gt;pi[id].isr_pd_detected = true;</div><div class='add'>+		if (pcdev-&gt;pi[id].admin_state_enabled) {</div><div class='add'>+			ret = _pse_pi_delivery_power_sw_pw_ctrl(pcdev, id,</div><div class='add'>+								&amp;extack);</div><div class='add'>+			if (ret == -ERANGE)</div><div class='add'>+				ret = 0;</div><div class='add'>+		}</div><div class='add'>+	} else if (notifs &amp; ETHTOOL_C33_PSE_EVENT_DISCONNECTION) {</div><div class='add'>+		if (pcdev-&gt;pi[id].admin_state_enabled &amp;&amp;</div><div class='add'>+		    pcdev-&gt;pi[id].isr_pd_detected)</div><div class='add'>+			ret = _pse_pi_disable(pcdev, id);</div><div class='add'>+		pcdev-&gt;pi[id].isr_pd_detected = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pse_isr - IRQ handler for PSE</div><div class='add'>+ * @irq: irq number</div><div class='add'>+ * @data: pointer to user interrupt structure</div><div class='add'>+ *</div><div class='add'>+ * Return: irqreturn_t - status of IRQ</div><div class='add'>+ */</div><div class='add'>+static irqreturn_t pse_isr(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct pse_controller_dev *pcdev;</div><div class='add'>+	unsigned long notifs_mask = 0;</div><div class='add'>+	struct pse_irq_desc *desc;</div><div class='add'>+	struct pse_irq *h = data;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	desc = &amp;h-&gt;desc;</div><div class='add'>+	pcdev = h-&gt;pcdev;</div><div class='add'>+</div><div class='add'>+	/* Clear notifs mask */</div><div class='add'>+	memset(h-&gt;notifs, 0, pcdev-&gt;nr_lines * sizeof(*h-&gt;notifs));</div><div class='add'>+	mutex_lock(&amp;pcdev-&gt;lock);</div><div class='add'>+	ret = desc-&gt;map_event(irq, pcdev, h-&gt;notifs, &amp;notifs_mask);</div><div class='add'>+	if (ret || !notifs_mask) {</div><div class='add'>+		mutex_unlock(&amp;pcdev-&gt;lock);</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(i, &amp;notifs_mask, pcdev-&gt;nr_lines) {</div><div class='add'>+		unsigned long notifs, rnotifs;</div><div class='add'>+		struct pse_ntf ntf = {};</div><div class='add'>+</div><div class='add'>+		/* Do nothing PI not described */</div><div class='add'>+		if (!pcdev-&gt;pi[i].rdev)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		notifs = h-&gt;notifs[i];</div><div class='add'>+		if (pse_pw_d_is_sw_pw_control(pcdev, pcdev-&gt;pi[i].pw_d)) {</div><div class='add'>+			ret = pse_set_config_isr(pcdev, i, notifs);</div><div class='add'>+			if (ret)</div><div class='add'>+				notifs |= ETHTOOL_PSE_EVENT_SW_PW_CONTROL_ERROR;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev_dbg(h-&gt;pcdev-&gt;dev,</div><div class='add'>+			"Sending PSE notification EVT 0x%lx\n", notifs);</div><div class='add'>+</div><div class='add'>+		ntf.notifs = notifs;</div><div class='add'>+		ntf.id = i;</div><div class='add'>+		kfifo_in_spinlocked(&amp;pcdev-&gt;ntf_fifo, &amp;ntf, 1,</div><div class='add'>+				    &amp;pcdev-&gt;ntf_fifo_lock);</div><div class='add'>+		schedule_work(&amp;pcdev-&gt;ntf_work);</div><div class='add'>+</div><div class='add'>+		rnotifs = pse_to_regulator_notifs(notifs);</div><div class='add'>+		regulator_notifier_call_chain(pcdev-&gt;pi[i].rdev, rnotifs,</div><div class='add'>+					      NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pcdev-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * devm_pse_irq_helper - Register IRQ based PSE event notifier</div><div class='add'>+ * @pcdev: a pointer to the PSE</div><div class='add'>+ * @irq: the irq value to be passed to request_irq</div><div class='add'>+ * @irq_flags: the flags to be passed to request_irq</div><div class='add'>+ * @d: PSE interrupt description</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and errno on failure</div><div class='add'>+ */</div><div class='add'>+int devm_pse_irq_helper(struct pse_controller_dev *pcdev, int irq,</div><div class='add'>+			int irq_flags, const struct pse_irq_desc *d)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = pcdev-&gt;dev;</div><div class='add'>+	size_t irq_name_len;</div><div class='add'>+	struct pse_irq *h;</div><div class='add'>+	char *irq_name;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!d || !d-&gt;map_event || !d-&gt;name)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);</div><div class='add'>+	if (!h)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	h-&gt;pcdev = pcdev;</div><div class='add'>+	h-&gt;desc = *d;</div><div class='add'>+</div><div class='add'>+	/* IRQ name len is pcdev dev name + 5 char + irq desc name + 1 */</div><div class='add'>+	irq_name_len = strlen(dev_name(pcdev-&gt;dev)) + 5 + strlen(d-&gt;name) + 1;</div><div class='add'>+	irq_name = devm_kzalloc(dev, irq_name_len, GFP_KERNEL);</div><div class='add'>+	if (!irq_name)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	snprintf(irq_name, irq_name_len, "pse-%s:%s", dev_name(pcdev-&gt;dev),</div><div class='add'>+		 d-&gt;name);</div><div class='add'>+</div><div class='add'>+	h-&gt;notifs = devm_kcalloc(dev, pcdev-&gt;nr_lines,</div><div class='add'>+				 sizeof(*h-&gt;notifs), GFP_KERNEL);</div><div class='add'>+	if (!h-&gt;notifs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = devm_request_threaded_irq(dev, irq, NULL, pse_isr,</div><div class='add'>+					IRQF_ONESHOT | irq_flags,</div><div class='add'>+					irq_name, h);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(pcdev-&gt;dev, "Failed to request IRQ %d\n", irq);</div><div class='add'>+</div><div class='add'>+	pcdev-&gt;irq = irq;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_pse_irq_helper);</div><div class='add'>+</div><div class='ctx'> /* PSE control section */</div><div class='ctx'> </div><div class='ctx'> static void __pse_control_release(struct kref *kref)</div><div class='hunk'>@@ -582,7 +1393,8 @@ void pse_control_put(struct pse_control *psec)</div><div class='ctx'> EXPORT_SYMBOL_GPL(pse_control_put);</div><div class='ctx'> </div><div class='ctx'> static struct pse_control *</div><div class='del'>-pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int index)</div><div class='add'>+pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int index,</div><div class='add'>+			 struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pse_control *psec;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -605,6 +1417,20 @@ pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int index)</div><div class='ctx'> 		goto free_psec;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!pcdev-&gt;ops-&gt;pi_get_admin_state) {</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		goto free_psec;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize admin_state_enabled before the regulator_get. This</div><div class='add'>+	 * aims to have the right value reported in the first is_enabled</div><div class='add'>+	 * call in case of control managed by software.</div><div class='add'>+	 */</div><div class='add'>+	ret = pse_pi_is_hw_enabled(pcdev, index);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto free_psec;</div><div class='add'>+</div><div class='add'>+	pcdev-&gt;pi[index].admin_state_enabled = ret;</div><div class='ctx'> 	psec-&gt;ps = devm_regulator_get_exclusive(pcdev-&gt;dev,</div><div class='ctx'> 						rdev_get_name(pcdev-&gt;pi[index].rdev));</div><div class='ctx'> 	if (IS_ERR(psec-&gt;ps)) {</div><div class='hunk'>@@ -612,21 +1438,14 @@ pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int index)</div><div class='ctx'> 		goto put_module;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = regulator_is_enabled(psec-&gt;ps);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto regulator_put;</div><div class='del'>-</div><div class='del'>-	pcdev-&gt;pi[index].admin_state_enabled = ret;</div><div class='del'>-</div><div class='ctx'> 	psec-&gt;pcdev = pcdev;</div><div class='ctx'> 	list_add(&amp;psec-&gt;list, &amp;pcdev-&gt;pse_control_head);</div><div class='ctx'> 	psec-&gt;id = index;</div><div class='add'>+	psec-&gt;attached_phydev = phydev;</div><div class='ctx'> 	kref_init(&amp;psec-&gt;refcnt);</div><div class='ctx'> </div><div class='ctx'> 	return psec;</div><div class='ctx'> </div><div class='del'>-regulator_put:</div><div class='del'>-	devm_regulator_put(psec-&gt;ps);</div><div class='ctx'> put_module:</div><div class='ctx'> 	module_put(pcdev-&gt;owner);</div><div class='ctx'> free_psec:</div><div class='hunk'>@@ -676,7 +1495,8 @@ static int psec_id_xlate(struct pse_controller_dev *pcdev,</div><div class='ctx'> 	return pse_spec-&gt;args[0];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct pse_control *of_pse_control_get(struct device_node *node)</div><div class='add'>+struct pse_control *of_pse_control_get(struct device_node *node,</div><div class='add'>+				       struct phy_device *phydev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pse_controller_dev *r, *pcdev;</div><div class='ctx'> 	struct of_phandle_args args;</div><div class='hunk'>@@ -726,7 +1546,7 @@ struct pse_control *of_pse_control_get(struct device_node *node)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* pse_list_mutex also protects the pcdev's pse_control list */</div><div class='del'>-	psec = pse_control_get_internal(pcdev, psec_id);</div><div class='add'>+	psec = pse_control_get_internal(pcdev, psec_id, phydev);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;pse_list_mutex);</div><div class='hunk'>@@ -736,21 +1556,33 @@ out:</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(of_pse_control_get);</div><div class='ctx'> </div><div class='del'>-static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev,</div><div class='del'>-				   int id,</div><div class='del'>-				   struct netlink_ext_ack *extack,</div><div class='del'>-				   struct pse_control_status *status)</div><div class='add'>+/**</div><div class='add'>+ * pse_get_sw_admin_state - Convert the software admin state to c33 or podl</div><div class='add'>+ *			    admin state value used in the standard</div><div class='add'>+ * @psec: PSE control pointer</div><div class='add'>+ * @admin_state: a pointer to the admin_state structure</div><div class='add'>+ */</div><div class='add'>+static void pse_get_sw_admin_state(struct pse_control *psec,</div><div class='add'>+				   struct pse_admin_state *admin_state)</div><div class='ctx'> {</div><div class='del'>-	const struct pse_controller_ops *ops;</div><div class='del'>-</div><div class='del'>-	ops = pcdev-&gt;ops;</div><div class='del'>-	if (!ops-&gt;ethtool_get_status) {</div><div class='del'>-		NL_SET_ERR_MSG(extack,</div><div class='del'>-			       "PSE driver does not support status report");</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+	struct pse_pi *pi = &amp;psec-&gt;pcdev-&gt;pi[psec-&gt;id];</div><div class='add'>+</div><div class='add'>+	if (pse_has_podl(psec)) {</div><div class='add'>+		if (pi-&gt;admin_state_enabled)</div><div class='add'>+			admin_state-&gt;podl_admin_state =</div><div class='add'>+				ETHTOOL_PODL_PSE_ADMIN_STATE_ENABLED;</div><div class='add'>+		else</div><div class='add'>+			admin_state-&gt;podl_admin_state =</div><div class='add'>+				ETHTOOL_PODL_PSE_ADMIN_STATE_DISABLED;</div><div class='add'>+	}</div><div class='add'>+	if (pse_has_c33(psec)) {</div><div class='add'>+		if (pi-&gt;admin_state_enabled)</div><div class='add'>+			admin_state-&gt;c33_admin_state =</div><div class='add'>+				ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED;</div><div class='add'>+		else</div><div class='add'>+			admin_state-&gt;c33_admin_state =</div><div class='add'>+				ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	return ops-&gt;ethtool_get_status(pcdev, id, extack, status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -763,15 +1595,111 @@ static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev,</div><div class='ctx'>  */</div><div class='ctx'> int pse_ethtool_get_status(struct pse_control *psec,</div><div class='ctx'> 			   struct netlink_ext_ack *extack,</div><div class='del'>-			   struct pse_control_status *status)</div><div class='add'>+			   struct ethtool_pse_control_status *status)</div><div class='ctx'> {</div><div class='del'>-	int err;</div><div class='add'>+	struct pse_admin_state admin_state = {0};</div><div class='add'>+	struct pse_pw_status pw_status = {0};</div><div class='add'>+	const struct pse_controller_ops *ops;</div><div class='add'>+	struct pse_controller_dev *pcdev;</div><div class='add'>+	struct pse_pi *pi;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;psec-&gt;pcdev-&gt;lock);</div><div class='del'>-	err = _pse_ethtool_get_status(psec-&gt;pcdev, psec-&gt;id, extack, status);</div><div class='del'>-	mutex_unlock(&amp;psec-&gt;pcdev-&gt;lock);</div><div class='add'>+	pcdev = psec-&gt;pcdev;</div><div class='add'>+	ops = pcdev-&gt;ops;</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	pi = &amp;pcdev-&gt;pi[psec-&gt;id];</div><div class='add'>+	mutex_lock(&amp;pcdev-&gt;lock);</div><div class='add'>+	if (pi-&gt;pw_d) {</div><div class='add'>+		status-&gt;pw_d_id = pi-&gt;pw_d-&gt;id;</div><div class='add'>+		if (pse_pw_d_is_sw_pw_control(pcdev, pi-&gt;pw_d)) {</div><div class='add'>+			pse_get_sw_admin_state(psec, &amp;admin_state);</div><div class='add'>+		} else {</div><div class='add'>+			ret = ops-&gt;pi_get_admin_state(pcdev, psec-&gt;id,</div><div class='add'>+						      &amp;admin_state);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto out;</div><div class='add'>+		}</div><div class='add'>+		status-&gt;podl_admin_state = admin_state.podl_admin_state;</div><div class='add'>+		status-&gt;c33_admin_state = admin_state.c33_admin_state;</div><div class='add'>+</div><div class='add'>+		switch (pi-&gt;pw_d-&gt;budget_eval_strategy) {</div><div class='add'>+		case PSE_BUDGET_EVAL_STRAT_STATIC:</div><div class='add'>+			status-&gt;prio_max = pcdev-&gt;nr_lines - 1;</div><div class='add'>+			status-&gt;prio = pi-&gt;prio;</div><div class='add'>+			break;</div><div class='add'>+		case PSE_BUDGET_EVAL_STRAT_DYNAMIC:</div><div class='add'>+			status-&gt;prio_max = pcdev-&gt;pis_prio_max;</div><div class='add'>+			if (ops-&gt;pi_get_prio) {</div><div class='add'>+				ret = ops-&gt;pi_get_prio(pcdev, psec-&gt;id);</div><div class='add'>+				if (ret &lt; 0)</div><div class='add'>+					goto out;</div><div class='add'>+</div><div class='add'>+				status-&gt;prio = ret;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ops-&gt;pi_get_pw_status(pcdev, psec-&gt;id, &amp;pw_status);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	status-&gt;podl_pw_status = pw_status.podl_pw_status;</div><div class='add'>+	status-&gt;c33_pw_status = pw_status.c33_pw_status;</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;pi_get_ext_state) {</div><div class='add'>+		struct pse_ext_state_info ext_state_info = {0};</div><div class='add'>+</div><div class='add'>+		ret = ops-&gt;pi_get_ext_state(pcdev, psec-&gt;id,</div><div class='add'>+					    &amp;ext_state_info);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;status-&gt;c33_ext_state_info,</div><div class='add'>+		       &amp;ext_state_info.c33_ext_state_info,</div><div class='add'>+		       sizeof(status-&gt;c33_ext_state_info));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;pi_get_pw_class) {</div><div class='add'>+		ret = ops-&gt;pi_get_pw_class(pcdev, psec-&gt;id);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		status-&gt;c33_pw_class = ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;pi_get_actual_pw) {</div><div class='add'>+		ret = ops-&gt;pi_get_actual_pw(pcdev, psec-&gt;id);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		status-&gt;c33_actual_pw = ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;pi_get_pw_limit) {</div><div class='add'>+		ret = ops-&gt;pi_get_pw_limit(pcdev, psec-&gt;id);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		status-&gt;c33_avail_pw_limit = ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;pi_get_pw_limit_ranges) {</div><div class='add'>+		struct pse_pw_limit_ranges pw_limit_ranges = {0};</div><div class='add'>+</div><div class='add'>+		ret = ops-&gt;pi_get_pw_limit_ranges(pcdev, psec-&gt;id,</div><div class='add'>+						  &amp;pw_limit_ranges);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		status-&gt;c33_pw_limit_ranges =</div><div class='add'>+			pw_limit_ranges.c33_pw_limit_ranges;</div><div class='add'>+		status-&gt;c33_pw_limit_nb_ranges = ret;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;psec-&gt;pcdev-&gt;lock);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(pse_ethtool_get_status);</div><div class='ctx'> </div><div class='hunk'>@@ -862,6 +1790,52 @@ int pse_ethtool_set_config(struct pse_control *psec,</div><div class='ctx'> EXPORT_SYMBOL_GPL(pse_ethtool_set_config);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * pse_pi_update_pw_budget - Update PSE power budget allocated with new</div><div class='add'>+ *			     power in mW</div><div class='add'>+ * @pcdev: a pointer to the PSE controller device</div><div class='add'>+ * @id: index of the PSE PI</div><div class='add'>+ * @pw_req: power requested</div><div class='add'>+ * @extack: extack for reporting useful error messages</div><div class='add'>+ *</div><div class='add'>+ * Return: Previous power allocated on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int pse_pi_update_pw_budget(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+				   const unsigned int pw_req,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct pse_pi *pi = &amp;pcdev-&gt;pi[id];</div><div class='add'>+	int previous_pw_allocated;</div><div class='add'>+	int pw_diff, ret = 0;</div><div class='add'>+</div><div class='add'>+	/* We don't want pw_allocated_mW value change in the middle of an</div><div class='add'>+	 * power budget update</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;pcdev-&gt;lock);</div><div class='add'>+	previous_pw_allocated = pi-&gt;pw_allocated_mW;</div><div class='add'>+	pw_diff = pw_req - previous_pw_allocated;</div><div class='add'>+	if (!pw_diff) {</div><div class='add'>+		goto out;</div><div class='add'>+	} else if (pw_diff &gt; 0) {</div><div class='add'>+		ret = regulator_request_power_budget(pi-&gt;pw_d-&gt;supply, pw_diff);</div><div class='add'>+		if (ret) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "PI %d: not enough power budget available",</div><div class='add'>+					   id);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		regulator_free_power_budget(pi-&gt;pw_d-&gt;supply, -pw_diff);</div><div class='add'>+	}</div><div class='add'>+	pi-&gt;pw_allocated_mW = pw_req;</div><div class='add'>+	ret = previous_pw_allocated;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;pcdev-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * pse_ethtool_set_pw_limit - set PSE control power limit</div><div class='ctx'>  * @psec: PSE control pointer</div><div class='ctx'>  * @extack: extack for reporting useful error messages</div><div class='hunk'>@@ -873,9 +1847,12 @@ int pse_ethtool_set_pw_limit(struct pse_control *psec,</div><div class='ctx'> 			     struct netlink_ext_ack *extack,</div><div class='ctx'> 			     const unsigned int pw_limit)</div><div class='ctx'> {</div><div class='del'>-	int uV, uA, ret;</div><div class='add'>+	int uV, uA, ret, previous_pw_allocated = 0;</div><div class='ctx'> 	s64 tmp_64;</div><div class='ctx'> </div><div class='add'>+	if (pw_limit &gt; MAX_PI_PW)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='ctx'> 	ret = regulator_get_voltage(psec-&gt;ps);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		NL_SET_ERR_MSG(extack,</div><div class='hunk'>@@ -894,10 +1871,100 @@ int pse_ethtool_set_pw_limit(struct pse_control *psec,</div><div class='ctx'> 	/* uA = mW * 1000000000 / uV */</div><div class='ctx'> 	uA = DIV_ROUND_CLOSEST_ULL(tmp_64, uV);</div><div class='ctx'> </div><div class='del'>-	return regulator_set_current_limit(psec-&gt;ps, 0, uA);</div><div class='add'>+	/* Update power budget only in software power control case and</div><div class='add'>+	 * if a Power Device is powered.</div><div class='add'>+	 */</div><div class='add'>+	if (pse_pw_d_is_sw_pw_control(psec-&gt;pcdev,</div><div class='add'>+				      psec-&gt;pcdev-&gt;pi[psec-&gt;id].pw_d) &amp;&amp;</div><div class='add'>+	    psec-&gt;pcdev-&gt;pi[psec-&gt;id].admin_state_enabled &amp;&amp;</div><div class='add'>+	    psec-&gt;pcdev-&gt;pi[psec-&gt;id].isr_pd_detected) {</div><div class='add'>+		ret = pse_pi_update_pw_budget(psec-&gt;pcdev, psec-&gt;id,</div><div class='add'>+					      pw_limit, extack);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		previous_pw_allocated = ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regulator_set_current_limit(psec-&gt;ps, 0, uA);</div><div class='add'>+	if (ret &lt; 0 &amp;&amp; previous_pw_allocated) {</div><div class='add'>+		pse_pi_update_pw_budget(psec-&gt;pcdev, psec-&gt;id,</div><div class='add'>+					previous_pw_allocated, extack);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(pse_ethtool_set_pw_limit);</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * pse_ethtool_set_prio - Set PSE PI priority according to the budget</div><div class='add'>+ *			  evaluation strategy</div><div class='add'>+ * @psec: PSE control pointer</div><div class='add'>+ * @extack: extack for reporting useful error messages</div><div class='add'>+ * @prio: priovity value</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+int pse_ethtool_set_prio(struct pse_control *psec,</div><div class='add'>+			 struct netlink_ext_ack *extack,</div><div class='add'>+			 unsigned int prio)</div><div class='add'>+{</div><div class='add'>+	struct pse_controller_dev *pcdev = psec-&gt;pcdev;</div><div class='add'>+	const struct pse_controller_ops *ops;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!pcdev-&gt;pi[psec-&gt;id].pw_d) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "no power domain attached");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We don't want priority change in the middle of an</div><div class='add'>+	 * enable/disable call or a priority mode change</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;pcdev-&gt;lock);</div><div class='add'>+	switch (pcdev-&gt;pi[psec-&gt;id].pw_d-&gt;budget_eval_strategy) {</div><div class='add'>+	case PSE_BUDGET_EVAL_STRAT_STATIC:</div><div class='add'>+		if (prio &gt;= pcdev-&gt;nr_lines) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "priority %d exceed priority max %d",</div><div class='add'>+					   prio, pcdev-&gt;nr_lines);</div><div class='add'>+			ret = -ERANGE;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pcdev-&gt;pi[psec-&gt;id].prio = prio;</div><div class='add'>+		pse_pw_d_retry_power_delivery(pcdev, pcdev-&gt;pi[psec-&gt;id].pw_d);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PSE_BUDGET_EVAL_STRAT_DYNAMIC:</div><div class='add'>+		ops = psec-&gt;pcdev-&gt;ops;</div><div class='add'>+		if (!ops-&gt;pi_set_prio) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "pse driver does not support setting port priority");</div><div class='add'>+			ret = -EOPNOTSUPP;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (prio &gt; pcdev-&gt;pis_prio_max) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "priority %d exceed priority max %d",</div><div class='add'>+					   prio, pcdev-&gt;pis_prio_max);</div><div class='add'>+			ret = -ERANGE;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = ops-&gt;pi_set_prio(pcdev, psec-&gt;id, prio);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;pcdev-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pse_ethtool_set_prio);</div><div class='add'>+</div><div class='ctx'> bool pse_has_podl(struct pse_control *psec)</div><div class='ctx'> {</div><div class='ctx'> 	return psec-&gt;pcdev-&gt;types &amp; ETHTOOL_PSE_PODL;</div><div class='head'>diff --git a/drivers/net/pse-pd/pse_regulator.c b/drivers/net/pse-pd/pse_regulator.c<br/>index 64ab36974fe0..6ce6773fff31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/pse_regulator.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/pse_regulator.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/pse_regulator.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pse-pd/pse_regulator.c</a></div><div class='hunk'>@@ -52,17 +52,19 @@ pse_reg_pi_disable(struct pse_controller_dev *pcdev, int id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-pse_reg_pi_is_enabled(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+pse_reg_pi_get_admin_state(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+			   struct pse_admin_state *admin_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct pse_reg_priv *priv = to_pse_reg(pcdev);</div><div class='ctx'> </div><div class='del'>-	return regulator_is_enabled(priv-&gt;ps);</div><div class='add'>+	admin_state-&gt;podl_admin_state = priv-&gt;admin_state;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-pse_reg_ethtool_get_status(struct pse_controller_dev *pcdev, unsigned long id,</div><div class='del'>-			   struct netlink_ext_ack *extack,</div><div class='del'>-			   struct pse_control_status *status)</div><div class='add'>+pse_reg_pi_get_pw_status(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+			 struct pse_pw_status *pw_status)</div><div class='ctx'> {</div><div class='ctx'> 	struct pse_reg_priv *priv = to_pse_reg(pcdev);</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -72,20 +74,19 @@ pse_reg_ethtool_get_status(struct pse_controller_dev *pcdev, unsigned long id,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!ret)</div><div class='del'>-		status-&gt;podl_pw_status = ETHTOOL_PODL_PSE_PW_D_STATUS_DISABLED;</div><div class='add'>+		pw_status-&gt;podl_pw_status =</div><div class='add'>+			ETHTOOL_PODL_PSE_PW_D_STATUS_DISABLED;</div><div class='ctx'> 	else</div><div class='del'>-		status-&gt;podl_pw_status =</div><div class='add'>+		pw_status-&gt;podl_pw_status =</div><div class='ctx'> 			ETHTOOL_PODL_PSE_PW_D_STATUS_DELIVERING;</div><div class='ctx'> </div><div class='del'>-	status-&gt;podl_admin_state = priv-&gt;admin_state;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct pse_controller_ops pse_reg_ops = {</div><div class='del'>-	.ethtool_get_status = pse_reg_ethtool_get_status,</div><div class='add'>+	.pi_get_admin_state = pse_reg_pi_get_admin_state,</div><div class='add'>+	.pi_get_pw_status = pse_reg_pi_get_pw_status,</div><div class='ctx'> 	.pi_enable = pse_reg_pi_enable,</div><div class='del'>-	.pi_is_enabled = pse_reg_pi_is_enabled,</div><div class='ctx'> 	.pi_disable = pse_reg_pi_disable,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/pse-pd/si3474.c b/drivers/net/pse-pd/si3474.c<br/>new file mode 100644<br/>index 000000000000..aa07ffbce54d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/si3474.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pse-pd/si3474.c</a></div><div class='hunk'>@@ -0,0 +1,578 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Driver for the Skyworks Si3474 PoE PSE Controller</div><div class='add'>+ *</div><div class='add'>+ * Chip Architecture &amp; Terminology:</div><div class='add'>+ *</div><div class='add'>+ * The Si3474 is a single-chip PoE PSE controller managing 8 physical power</div><div class='add'>+ * delivery channels. Internally, it's structured into two logical "Quads".</div><div class='add'>+ *</div><div class='add'>+ * Quad 0: Manages physical channels ('ports' in datasheet) 0, 1, 2, 3</div><div class='add'>+ * Quad 1: Manages physical channels ('ports' in datasheet) 4, 5, 6, 7</div><div class='add'>+ *</div><div class='add'>+ * Each Quad is accessed via a separate I2C address. The base address range is</div><div class='add'>+ * set by hardware pins A1-A4, and the specific address selects Quad 0 (usually</div><div class='add'>+ * the lower/even address) or Quad 1 (usually the higher/odd address).</div><div class='add'>+ * See datasheet Table 2.2 for the address mapping.</div><div class='add'>+ *</div><div class='add'>+ * While the Quads manage channel-specific operations, the Si3474 package has</div><div class='add'>+ * several resources shared across the entire chip:</div><div class='add'>+ * - Single RESETb input pin.</div><div class='add'>+ * - Single INTb output pin (signals interrupts from *either* Quad).</div><div class='add'>+ * - Single OSS input pin (Emergency Shutdown).</div><div class='add'>+ * - Global I2C Address (0x7F) used for firmware updates.</div><div class='add'>+ * - Global status monitoring (Temperature, VDD/VPWR Undervoltage Lockout).</div><div class='add'>+ *</div><div class='add'>+ * Driver Architecture:</div><div class='add'>+ *</div><div class='add'>+ * To handle the mix of per-Quad access and shared resources correctly, this</div><div class='add'>+ * driver treats the entire Si3474 package as one logical device. The driver</div><div class='add'>+ * instance associated with the primary I2C address (Quad 0) takes ownership.</div><div class='add'>+ * It discovers and manages the I2C client for the secondary address (Quad 1).</div><div class='add'>+ * This primary instance handles shared resources like IRQ management and</div><div class='add'>+ * registers a single PSE controller device representing all logical PIs.</div><div class='add'>+ * Internal functions route I2C commands to the appropriate Quad's i2c_client</div><div class='add'>+ * based on the target channel or PI.</div><div class='add'>+ *</div><div class='add'>+ * Terminology Mapping:</div><div class='add'>+ *</div><div class='add'>+ * - "PI" (Power Interface): Refers to the logical PSE port as defined by</div><div class='add'>+ * IEEE 802.3 (typically corresponds to an RJ45 connector). This is the</div><div class='add'>+ * `id` (0-7) used in the pse_controller_ops.</div><div class='add'>+ * - "Channel": Refers to one of the 8 physical power control paths within</div><div class='add'>+ * the Si3474 chip itself (hardware channels 0-7). This terminology is</div><div class='add'>+ * used internally within the driver to avoid confusion with 'ports'.</div><div class='add'>+ * - "Quad": One of the two internal 4-channel management units within the</div><div class='add'>+ * Si3474, each accessed via its own I2C address.</div><div class='add'>+ *</div><div class='add'>+ * Relationship:</div><div class='add'>+ * - A 2-Pair PoE PI uses 1 Channel.</div><div class='add'>+ * - A 4-Pair PoE PI uses 2 Channels.</div><div class='add'>+ *</div><div class='add'>+ * ASCII Schematic:</div><div class='add'>+ *</div><div class='add'>+ * +-----------------------------------------------------+</div><div class='add'>+ * |                    Si3474 Chip                      |</div><div class='add'>+ * |                                                     |</div><div class='add'>+ * | +---------------------+     +---------------------+ |</div><div class='add'>+ * | |      Quad 0         |     |      Quad 1         | |</div><div class='add'>+ * | | Channels 0, 1, 2, 3 |     | Channels 4, 5, 6, 7 | |</div><div class='add'>+ * | +----------^----------+     +-------^-------------+ |</div><div class='add'>+ * | I2C Addr 0 |                        | I2C Addr 1    |</div><div class='add'>+ * |            +------------------------+               |</div><div class='add'>+ * | (Primary Driver Instance) (Managed by Primary)      |</div><div class='add'>+ * |                                                     |</div><div class='add'>+ * | Shared Resources (affect whole chip):               |</div><div class='add'>+ * |  - Single INTb Output -&gt; Handled by Primary         |</div><div class='add'>+ * |  - Single RESETb Input                              |</div><div class='add'>+ * |  - Single OSS Input   -&gt; Handled by Primary         |</div><div class='add'>+ * |  - Global I2C Addr (0x7F) for Firmware Update       |</div><div class='add'>+ * |  - Global Status (Temp, VDD/VPWR UVLO)              |</div><div class='add'>+ * +-----------------------------------------------------+</div><div class='add'>+ *        |   |   |   |        |   |   |   |</div><div class='add'>+ *        Ch0 Ch1 Ch2 Ch3      Ch4 Ch5 Ch6 Ch7  (Physical Channels)</div><div class='add'>+ *</div><div class='add'>+ * Example Mapping (Logical PI to Physical Channel(s)):</div><div class='add'>+ * * 2-Pair Mode (8 PIs):</div><div class='add'>+ * PI 0 -&gt; Ch 0</div><div class='add'>+ * PI 1 -&gt; Ch 1</div><div class='add'>+ * ...</div><div class='add'>+ * PI 7 -&gt; Ch 7</div><div class='add'>+ * * 4-Pair Mode (4 PIs):</div><div class='add'>+ * PI 0 -&gt; Ch 0 + Ch 1  (Managed via Quad 0 Addr)</div><div class='add'>+ * PI 1 -&gt; Ch 2 + Ch 3  (Managed via Quad 0 Addr)</div><div class='add'>+ * PI 2 -&gt; Ch 4 + Ch 5  (Managed via Quad 1 Addr)</div><div class='add'>+ * PI 3 -&gt; Ch 6 + Ch 7  (Managed via Quad 1 Addr)</div><div class='add'>+ * (Note: Actual mapping depends on Device Tree and PORT_REMAP config)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pse-pd/pse.h&gt;</div><div class='add'>+</div><div class='add'>+#define SI3474_MAX_CHANS 8</div><div class='add'>+</div><div class='add'>+#define MANUFACTURER_ID 0x08</div><div class='add'>+#define IC_ID 0x05</div><div class='add'>+#define SI3474_DEVICE_ID (MANUFACTURER_ID &lt;&lt; 3 | IC_ID)</div><div class='add'>+</div><div class='add'>+/* Misc registers */</div><div class='add'>+#define VENDOR_IC_ID_REG 0x1B</div><div class='add'>+#define TEMPERATURE_REG 0x2C</div><div class='add'>+#define FIRMWARE_REVISION_REG 0x41</div><div class='add'>+#define CHIP_REVISION_REG 0x43</div><div class='add'>+</div><div class='add'>+/* Main status registers */</div><div class='add'>+#define POWER_STATUS_REG 0x10</div><div class='add'>+#define PORT_MODE_REG 0x12</div><div class='add'>+#define DETECT_CLASS_ENABLE_REG 0x14</div><div class='add'>+</div><div class='add'>+/* PORTn Current */</div><div class='add'>+#define PORT1_CURRENT_LSB_REG 0x30</div><div class='add'>+</div><div class='add'>+/* PORTn Current [mA], return in [nA] */</div><div class='add'>+/* 1000 * ((PORTn_CURRENT_MSB &lt;&lt; 8) + PORTn_CURRENT_LSB) / 16384 */</div><div class='add'>+#define SI3474_NA_STEP (1000 * 1000 * 1000 / 16384)</div><div class='add'>+</div><div class='add'>+/* VPWR Voltage */</div><div class='add'>+#define VPWR_LSB_REG 0x2E</div><div class='add'>+#define VPWR_MSB_REG 0x2F</div><div class='add'>+</div><div class='add'>+/* PORTn Voltage */</div><div class='add'>+#define PORT1_VOLTAGE_LSB_REG 0x32</div><div class='add'>+</div><div class='add'>+/* VPWR Voltage [V], return in [uV] */</div><div class='add'>+/* 60 * (( VPWR_MSB &lt;&lt; 8) + VPWR_LSB) / 16384 */</div><div class='add'>+#define SI3474_UV_STEP (1000 * 1000 * 60 / 16384)</div><div class='add'>+</div><div class='add'>+/* Helper macros */</div><div class='add'>+#define CHAN_IDX(chan) ((chan) % 4)</div><div class='add'>+#define CHAN_BIT(chan) BIT(CHAN_IDX(chan))</div><div class='add'>+#define CHAN_UPPER_BIT(chan) BIT(CHAN_IDX(chan) + 4)</div><div class='add'>+</div><div class='add'>+#define CHAN_MASK(chan) (0x03U &lt;&lt; (2 * CHAN_IDX(chan)))</div><div class='add'>+#define CHAN_REG(base, chan) ((base) + (CHAN_IDX(chan) * 4))</div><div class='add'>+</div><div class='add'>+struct si3474_pi_desc {</div><div class='add'>+	u8 chan[2];</div><div class='add'>+	bool is_4p;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct si3474_priv {</div><div class='add'>+	struct i2c_client *client[2];</div><div class='add'>+	struct pse_controller_dev pcdev;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct si3474_pi_desc pi[SI3474_MAX_CHANS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct si3474_priv *to_si3474_priv(struct pse_controller_dev *pcdev)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcdev, struct si3474_priv, pcdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void si3474_get_channels(struct si3474_priv *priv, int id,</div><div class='add'>+				u8 *chan0, u8 *chan1)</div><div class='add'>+{</div><div class='add'>+	*chan0 = priv-&gt;pi[id].chan[0];</div><div class='add'>+	*chan1 = priv-&gt;pi[id].chan[1];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct i2c_client *si3474_get_chan_client(struct si3474_priv *priv,</div><div class='add'>+						 u8 chan)</div><div class='add'>+{</div><div class='add'>+	return (chan &lt; 4) ? priv-&gt;client[0] : priv-&gt;client[1];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_pi_get_admin_state(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+				     struct pse_admin_state *admin_state)</div><div class='add'>+{</div><div class='add'>+	struct si3474_priv *priv = to_si3474_priv(pcdev);</div><div class='add'>+	struct i2c_client *client;</div><div class='add'>+	bool is_enabled;</div><div class='add'>+	u8 chan0, chan1;</div><div class='add'>+	s32 ret;</div><div class='add'>+</div><div class='add'>+	si3474_get_channels(priv, id, &amp;chan0, &amp;chan1);</div><div class='add'>+	client = si3474_get_chan_client(priv, chan0);</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_byte_data(client, PORT_MODE_REG);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		admin_state-&gt;c33_admin_state =</div><div class='add'>+			ETHTOOL_C33_PSE_ADMIN_STATE_UNKNOWN;</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	is_enabled = ret &amp; (CHAN_MASK(chan0) | CHAN_MASK(chan1));</div><div class='add'>+</div><div class='add'>+	if (is_enabled)</div><div class='add'>+		admin_state-&gt;c33_admin_state =</div><div class='add'>+			ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED;</div><div class='add'>+	else</div><div class='add'>+		admin_state-&gt;c33_admin_state =</div><div class='add'>+			ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_pi_get_pw_status(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+				   struct pse_pw_status *pw_status)</div><div class='add'>+{</div><div class='add'>+	struct si3474_priv *priv = to_si3474_priv(pcdev);</div><div class='add'>+	struct i2c_client *client;</div><div class='add'>+	bool delivering;</div><div class='add'>+	u8 chan0, chan1;</div><div class='add'>+	s32 ret;</div><div class='add'>+</div><div class='add'>+	si3474_get_channels(priv, id, &amp;chan0, &amp;chan1);</div><div class='add'>+	client = si3474_get_chan_client(priv, chan0);</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_byte_data(client, POWER_STATUS_REG);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pw_status-&gt;c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_UNKNOWN;</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	delivering = ret &amp; (CHAN_UPPER_BIT(chan0) | CHAN_UPPER_BIT(chan1));</div><div class='add'>+</div><div class='add'>+	if (delivering)</div><div class='add'>+		pw_status-&gt;c33_pw_status =</div><div class='add'>+			ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING;</div><div class='add'>+	else</div><div class='add'>+		pw_status-&gt;c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_get_of_channels(struct si3474_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct pse_pi *pi;</div><div class='add'>+	u32 chan_id;</div><div class='add'>+	u8 pi_no;</div><div class='add'>+	s32 ret;</div><div class='add'>+</div><div class='add'>+	for (pi_no = 0; pi_no &lt; SI3474_MAX_CHANS; pi_no++) {</div><div class='add'>+		pi = &amp;priv-&gt;pcdev.pi[pi_no];</div><div class='add'>+		bool pairset_found = false;</div><div class='add'>+		u8 pairset_no;</div><div class='add'>+</div><div class='add'>+		for (pairset_no = 0; pairset_no &lt; 2; pairset_no++) {</div><div class='add'>+			if (!pi-&gt;pairset[pairset_no].np)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			pairset_found = true;</div><div class='add'>+</div><div class='add'>+			ret = of_property_read_u32(pi-&gt;pairset[pairset_no].np,</div><div class='add'>+						   "reg", &amp;chan_id);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(&amp;priv-&gt;client[0]-&gt;dev,</div><div class='add'>+					"Failed to read channel reg property\n");</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			if (chan_id &gt; SI3474_MAX_CHANS) {</div><div class='add'>+				dev_err(&amp;priv-&gt;client[0]-&gt;dev,</div><div class='add'>+					"Incorrect channel number: %d\n", chan_id);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			priv-&gt;pi[pi_no].chan[pairset_no] = chan_id;</div><div class='add'>+			/* Mark as 4-pair if second pairset is present */</div><div class='add'>+			priv-&gt;pi[pi_no].is_4p = (pairset_no == 1);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pairset_found &amp;&amp; !priv-&gt;pi[pi_no].is_4p) {</div><div class='add'>+			dev_err(&amp;priv-&gt;client[0]-&gt;dev,</div><div class='add'>+				"Second pairset is missing for PI %pOF, only 4p configs are supported\n",</div><div class='add'>+				pi-&gt;np);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_setup_pi_matrix(struct pse_controller_dev *pcdev)</div><div class='add'>+{</div><div class='add'>+	struct si3474_priv *priv = to_si3474_priv(pcdev);</div><div class='add'>+	s32 ret;</div><div class='add'>+</div><div class='add'>+	ret = si3474_get_of_channels(priv);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_warn(&amp;priv-&gt;client[0]-&gt;dev,</div><div class='add'>+			 "Unable to parse DT PSE power interface matrix\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_pi_enable(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct si3474_priv *priv = to_si3474_priv(pcdev);</div><div class='add'>+	struct i2c_client *client;</div><div class='add'>+	u8 chan0, chan1;</div><div class='add'>+	s32 ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	si3474_get_channels(priv, id, &amp;chan0, &amp;chan1);</div><div class='add'>+	client = si3474_get_chan_client(priv, chan0);</div><div class='add'>+</div><div class='add'>+	/* Release PI from shutdown */</div><div class='add'>+	ret = i2c_smbus_read_byte_data(client, PORT_MODE_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = (u8)ret;</div><div class='add'>+	val |= CHAN_MASK(chan0);</div><div class='add'>+	val |= CHAN_MASK(chan1);</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client, PORT_MODE_REG, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* DETECT_CLASS_ENABLE must be set when using AUTO mode,</div><div class='add'>+	 * otherwise PI does not power up - datasheet section 2.10.2</div><div class='add'>+	 */</div><div class='add'>+	val = CHAN_BIT(chan0) | CHAN_UPPER_BIT(chan0) |</div><div class='add'>+	      CHAN_BIT(chan1) | CHAN_UPPER_BIT(chan1);</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client, DETECT_CLASS_ENABLE_REG, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_pi_disable(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct si3474_priv *priv = to_si3474_priv(pcdev);</div><div class='add'>+	struct i2c_client *client;</div><div class='add'>+	u8 chan0, chan1;</div><div class='add'>+	s32 ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	si3474_get_channels(priv, id, &amp;chan0, &amp;chan1);</div><div class='add'>+	client = si3474_get_chan_client(priv, chan0);</div><div class='add'>+</div><div class='add'>+	/* Set PI in shutdown mode */</div><div class='add'>+	ret = i2c_smbus_read_byte_data(client, PORT_MODE_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = (u8)ret;</div><div class='add'>+	val &amp;= ~CHAN_MASK(chan0);</div><div class='add'>+	val &amp;= ~CHAN_MASK(chan1);</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_write_byte_data(client, PORT_MODE_REG, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_pi_get_chan_current(struct si3474_priv *priv, u8 chan)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client;</div><div class='add'>+	u64 tmp_64;</div><div class='add'>+	s32 ret;</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	client = si3474_get_chan_client(priv, chan);</div><div class='add'>+</div><div class='add'>+	/* Registers 0x30 to 0x3d */</div><div class='add'>+	reg = CHAN_REG(PORT1_CURRENT_LSB_REG, chan);</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tmp_64 = ret * SI3474_NA_STEP;</div><div class='add'>+</div><div class='add'>+	/* uA = nA / 1000 */</div><div class='add'>+	tmp_64 = DIV_ROUND_CLOSEST_ULL(tmp_64, 1000);</div><div class='add'>+	return (int)tmp_64;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_pi_get_chan_voltage(struct si3474_priv *priv, u8 chan)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client;</div><div class='add'>+	s32 ret;</div><div class='add'>+	u32 val;</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	client = si3474_get_chan_client(priv, chan);</div><div class='add'>+</div><div class='add'>+	/* Registers 0x32 to 0x3f */</div><div class='add'>+	reg = CHAN_REG(PORT1_VOLTAGE_LSB_REG, chan);</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = ret * SI3474_UV_STEP;</div><div class='add'>+</div><div class='add'>+	return (int)val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_pi_get_voltage(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct si3474_priv *priv = to_si3474_priv(pcdev);</div><div class='add'>+	struct i2c_client *client;</div><div class='add'>+	u8 chan0, chan1;</div><div class='add'>+	s32 ret;</div><div class='add'>+</div><div class='add'>+	si3474_get_channels(priv, id, &amp;chan0, &amp;chan1);</div><div class='add'>+	client = si3474_get_chan_client(priv, chan0);</div><div class='add'>+</div><div class='add'>+	/* Check which channels are enabled*/</div><div class='add'>+	ret = i2c_smbus_read_byte_data(client, POWER_STATUS_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Take voltage from the first enabled channel */</div><div class='add'>+	if (ret &amp; CHAN_BIT(chan0))</div><div class='add'>+		ret = si3474_pi_get_chan_voltage(priv, chan0);</div><div class='add'>+	else if (ret &amp; CHAN_BIT(chan1))</div><div class='add'>+		ret = si3474_pi_get_chan_voltage(priv, chan1);</div><div class='add'>+	else</div><div class='add'>+		/* 'should' be no voltage in this case */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_pi_get_actual_pw(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct si3474_priv *priv = to_si3474_priv(pcdev);</div><div class='add'>+	u8 chan0, chan1;</div><div class='add'>+	u32 uV, uA;</div><div class='add'>+	u64 tmp_64;</div><div class='add'>+	s32 ret;</div><div class='add'>+</div><div class='add'>+	ret = si3474_pi_get_voltage(&amp;priv-&gt;pcdev, id);</div><div class='add'>+</div><div class='add'>+	/* Do not read currents if voltage is 0 */</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return ret;</div><div class='add'>+	uV = ret;</div><div class='add'>+</div><div class='add'>+	si3474_get_channels(priv, id, &amp;chan0, &amp;chan1);</div><div class='add'>+</div><div class='add'>+	ret = si3474_pi_get_chan_current(priv, chan0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	uA = ret;</div><div class='add'>+</div><div class='add'>+	ret = si3474_pi_get_chan_current(priv, chan1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	uA += ret;</div><div class='add'>+</div><div class='add'>+	tmp_64 = uV;</div><div class='add'>+	tmp_64 *= uA;</div><div class='add'>+	/* mW = uV * uA / 1000000000 */</div><div class='add'>+	return DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pse_controller_ops si3474_ops = {</div><div class='add'>+	.setup_pi_matrix = si3474_setup_pi_matrix,</div><div class='add'>+	.pi_enable = si3474_pi_enable,</div><div class='add'>+	.pi_disable = si3474_pi_disable,</div><div class='add'>+	.pi_get_actual_pw = si3474_pi_get_actual_pw,</div><div class='add'>+	.pi_get_voltage = si3474_pi_get_voltage,</div><div class='add'>+	.pi_get_admin_state = si3474_pi_get_admin_state,</div><div class='add'>+	.pi_get_pw_status = si3474_pi_get_pw_status,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void si3474_ancillary_i2c_remove(void *data)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = data;</div><div class='add'>+</div><div class='add'>+	i2c_unregister_device(client);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int si3474_i2c_probe(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;client-&gt;dev;</div><div class='add'>+	struct si3474_priv *priv;</div><div class='add'>+	u8 fw_version;</div><div class='add'>+	s32 ret;</div><div class='add'>+</div><div class='add'>+	if (!i2c_check_functionality(client-&gt;adapter, I2C_FUNC_I2C)) {</div><div class='add'>+		dev_err(dev, "i2c check functionality failed\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_byte_data(client, VENDOR_IC_ID_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ret != SI3474_DEVICE_ID) {</div><div class='add'>+		dev_err(dev, "Wrong device ID: 0x%x\n", ret);</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_byte_data(client, FIRMWARE_REVISION_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	fw_version = ret;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_byte_data(client, CHIP_REVISION_REG);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "Chip revision: 0x%x, firmware version: 0x%x\n",</div><div class='add'>+		ret, fw_version);</div><div class='add'>+</div><div class='add'>+	priv-&gt;client[0] = client;</div><div class='add'>+	i2c_set_clientdata(client, priv);</div><div class='add'>+</div><div class='add'>+	priv-&gt;client[1] = i2c_new_ancillary_device(priv-&gt;client[0], "secondary",</div><div class='add'>+						   priv-&gt;client[0]-&gt;addr + 1);</div><div class='add'>+	if (IS_ERR(priv-&gt;client[1]))</div><div class='add'>+		return PTR_ERR(priv-&gt;client[1]);</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, si3474_ancillary_i2c_remove, priv-&gt;client[1]);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;priv-&gt;client[1]-&gt;dev, "Cannot register remove callback\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_byte_data(priv-&gt;client[1], VENDOR_IC_ID_REG);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;priv-&gt;client[1]-&gt;dev, "Cannot access secondary PSE controller\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret != SI3474_DEVICE_ID) {</div><div class='add'>+		dev_err(&amp;priv-&gt;client[1]-&gt;dev,</div><div class='add'>+			"Wrong device ID for secondary PSE controller: 0x%x\n", ret);</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;np = dev-&gt;of_node;</div><div class='add'>+	priv-&gt;pcdev.owner = THIS_MODULE;</div><div class='add'>+	priv-&gt;pcdev.ops = &amp;si3474_ops;</div><div class='add'>+	priv-&gt;pcdev.dev = dev;</div><div class='add'>+	priv-&gt;pcdev.types = ETHTOOL_PSE_C33;</div><div class='add'>+	priv-&gt;pcdev.nr_lines = SI3474_MAX_CHANS;</div><div class='add'>+</div><div class='add'>+	ret = devm_pse_controller_register(dev, &amp;priv-&gt;pcdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Failed to register PSE controller: 0x%x\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id si3474_id[] = {</div><div class='add'>+	{ "si3474" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, si3474_id);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id si3474_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "skyworks,si3474",</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, si3474_of_match);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver si3474_driver = {</div><div class='add'>+	.probe = si3474_i2c_probe,</div><div class='add'>+	.id_table = si3474_id,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "si3474",</div><div class='add'>+		.of_match_table = si3474_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_i2c_driver(si3474_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Piotr Kubik &lt;piotr.kubik@adtran.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Skyworks Si3474 PoE PSE Controller driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/pse-pd/tps23881.c b/drivers/net/pse-pd/tps23881.c<br/>index 5c4e88be46ee..76ec1555d60d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/tps23881.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/pse-pd/tps23881.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/pse-pd/tps23881.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/pse-pd/tps23881.c</a></div><div class='hunk'>@@ -16,29 +16,59 @@</div><div class='ctx'> #include &lt;linux/pse-pd/pse.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define TPS23881_MAX_CHANS 8</div><div class='del'>-</div><div class='add'>+#define TPS23881_MAX_IRQ_RETRIES 10</div><div class='add'>+</div><div class='add'>+#define TPS23881_REG_IT		0x0</div><div class='add'>+#define TPS23881_REG_IT_MASK	0x1</div><div class='add'>+#define TPS23881_REG_IT_DISF	BIT(2)</div><div class='add'>+#define TPS23881_REG_IT_DETC	BIT(3)</div><div class='add'>+#define TPS23881_REG_IT_CLASC	BIT(4)</div><div class='add'>+#define TPS23881_REG_IT_IFAULT	BIT(5)</div><div class='add'>+#define TPS23881_REG_IT_SUPF	BIT(7)</div><div class='add'>+#define TPS23881_REG_DET_EVENT	0x5</div><div class='add'>+#define TPS23881_REG_FAULT	0x7</div><div class='add'>+#define TPS23881_REG_SUPF_EVENT	0xb</div><div class='add'>+#define TPS23881_REG_TSD	BIT(7)</div><div class='add'>+#define TPS23881_REG_DISC	0xc</div><div class='ctx'> #define TPS23881_REG_PW_STATUS	0x10</div><div class='ctx'> #define TPS23881_REG_OP_MODE	0x12</div><div class='add'>+#define TPS23881_REG_DISC_EN	0x13</div><div class='ctx'> #define TPS23881_OP_MODE_SEMIAUTO	0xaaaa</div><div class='ctx'> #define TPS23881_REG_DIS_EN	0x13</div><div class='ctx'> #define TPS23881_REG_DET_CLA_EN	0x14</div><div class='ctx'> #define TPS23881_REG_GEN_MASK	0x17</div><div class='add'>+#define TPS23881_REG_CLCHE	BIT(2)</div><div class='add'>+#define TPS23881_REG_DECHE	BIT(3)</div><div class='ctx'> #define TPS23881_REG_NBITACC	BIT(5)</div><div class='add'>+#define TPS23881_REG_INTEN	BIT(7)</div><div class='ctx'> #define TPS23881_REG_PW_EN	0x19</div><div class='add'>+#define TPS23881_REG_RESET	0x1a</div><div class='add'>+#define TPS23881_REG_CLRAIN	BIT(7)</div><div class='add'>+#define TPS23881_REG_2PAIR_POL1	0x1e</div><div class='ctx'> #define TPS23881_REG_PORT_MAP	0x26</div><div class='ctx'> #define TPS23881_REG_PORT_POWER	0x29</div><div class='del'>-#define TPS23881_REG_POEPLUS	0x40</div><div class='add'>+#define TPS23881_REG_4PAIR_POL1	0x2a</div><div class='add'>+#define TPS23881_REG_INPUT_V	0x2e</div><div class='add'>+#define TPS23881_REG_CHAN1_A	0x30</div><div class='add'>+#define TPS23881_REG_CHAN1_V	0x32</div><div class='add'>+#define TPS23881_REG_FOLDBACK	0x40</div><div class='ctx'> #define TPS23881_REG_TPON	BIT(0)</div><div class='ctx'> #define TPS23881_REG_FWREV	0x41</div><div class='ctx'> #define TPS23881_REG_DEVID	0x43</div><div class='del'>-#define TPS23881_REG_DEVID_MASK	0xF0</div><div class='del'>-#define TPS23881_DEVICE_ID	0x02</div><div class='add'>+#define TPS23881_REG_CHAN1_CLASS	0x4c</div><div class='ctx'> #define TPS23881_REG_SRAM_CTRL	0x60</div><div class='ctx'> #define TPS23881_REG_SRAM_DATA	0x61</div><div class='ctx'> </div><div class='add'>+#define TPS23881_UV_STEP	3662</div><div class='add'>+#define TPS23881_NA_STEP	89500</div><div class='add'>+#define TPS23881_MW_STEP	500</div><div class='add'>+#define TPS23881_MIN_PI_PW_LIMIT_MW	2000</div><div class='add'>+</div><div class='ctx'> struct tps23881_port_desc {</div><div class='ctx'> 	u8 chan[2];</div><div class='ctx'> 	bool is_4p;</div><div class='add'>+	int pw_pol;</div><div class='add'>+	bool exist;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct tps23881_priv {</div><div class='hunk'>@@ -53,6 +83,103 @@ static struct tps23881_priv *to_tps23881_priv(struct pse_controller_dev *pcdev)</div><div class='ctx'> 	return container_of(pcdev, struct tps23881_priv, pcdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * Helper to extract a value from a u16 register value, which is made of two</div><div class='add'>+ * u8 registers. The function calculates the bit offset based on the channel</div><div class='add'>+ * and extracts the relevant bits using a provided field mask.</div><div class='add'>+ *</div><div class='add'>+ * @param reg_val: The u16 register value (composed of two u8 registers).</div><div class='add'>+ * @param chan: The channel number (0-7).</div><div class='add'>+ * @param field_offset: The base bit offset to apply (e.g., 0 or 4).</div><div class='add'>+ * @param field_mask: The mask to apply to extract the required bits.</div><div class='add'>+ * @return: The extracted value for the specific channel.</div><div class='add'>+ */</div><div class='add'>+static u16 tps23881_calc_val(u16 reg_val, u8 chan, u8 field_offset,</div><div class='add'>+			     u16 field_mask)</div><div class='add'>+{</div><div class='add'>+	if (chan &gt;= 4)</div><div class='add'>+		reg_val &gt;&gt;= 8;</div><div class='add'>+</div><div class='add'>+	return (reg_val &gt;&gt; field_offset) &amp; field_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Helper to combine individual channel values into a u16 register value.</div><div class='add'>+ * The function sets the value for a specific channel in the appropriate</div><div class='add'>+ * position.</div><div class='add'>+ *</div><div class='add'>+ * @param reg_val: The current u16 register value.</div><div class='add'>+ * @param chan: The channel number (0-7).</div><div class='add'>+ * @param field_offset: The base bit offset to apply (e.g., 0 or 4).</div><div class='add'>+ * @param field_mask: The mask to apply for the field (e.g., 0x0F).</div><div class='add'>+ * @param field_val: The value to set for the specific channel (masked by</div><div class='add'>+ *                   field_mask).</div><div class='add'>+ * @return: The updated u16 register value with the channel value set.</div><div class='add'>+ */</div><div class='add'>+static u16 tps23881_set_val(u16 reg_val, u8 chan, u8 field_offset,</div><div class='add'>+			    u16 field_mask, u16 field_val)</div><div class='add'>+{</div><div class='add'>+	field_val &amp;= field_mask;</div><div class='add'>+</div><div class='add'>+	if (chan &lt; 4) {</div><div class='add'>+		reg_val &amp;= ~(field_mask &lt;&lt; field_offset);</div><div class='add'>+		reg_val |= (field_val &lt;&lt; field_offset);</div><div class='add'>+	} else {</div><div class='add'>+		reg_val &amp;= ~(field_mask &lt;&lt; (field_offset + 8));</div><div class='add'>+		reg_val |= (field_val &lt;&lt; (field_offset + 8));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return reg_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+tps23881_pi_set_pw_pol_limit(struct tps23881_priv *priv, int id, u8 pw_pol,</div><div class='add'>+			     bool is_4p)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = priv-&gt;client;</div><div class='add'>+	int ret, reg;</div><div class='add'>+	u16 val;</div><div class='add'>+	u8 chan;</div><div class='add'>+</div><div class='add'>+	chan = priv-&gt;port[id].chan[0];</div><div class='add'>+	if (!is_4p) {</div><div class='add'>+		reg = TPS23881_REG_2PAIR_POL1 + (chan % 4);</div><div class='add'>+	} else {</div><div class='add'>+		/* One chan is enough to configure the 4p PI power limit */</div><div class='add'>+		if ((chan % 4) &lt; 2)</div><div class='add'>+			reg = TPS23881_REG_4PAIR_POL1;</div><div class='add'>+		else</div><div class='add'>+			reg = TPS23881_REG_4PAIR_POL1 + 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = tps23881_set_val(ret, chan, 0, 0xff, pw_pol);</div><div class='add'>+	return i2c_smbus_write_word_data(client, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tps23881_pi_enable_manual_pol(struct tps23881_priv *priv, int id)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = priv-&gt;client;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 chan;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_byte_data(client, TPS23881_REG_FOLDBACK);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* No need to test if the chan is PoE4 as setting either bit for a</div><div class='add'>+	 * 4P configured port disables the automatic configuration on both</div><div class='add'>+	 * channels.</div><div class='add'>+	 */</div><div class='add'>+	chan = priv-&gt;port[id].chan[0];</div><div class='add'>+	val = tps23881_set_val(ret, chan, 0, BIT(chan % 4), BIT(chan % 4));</div><div class='add'>+	return i2c_smbus_write_byte_data(client, TPS23881_REG_FOLDBACK, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int tps23881_pi_enable(struct pse_controller_dev *pcdev, int id)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps23881_priv *priv = to_tps23881_priv(pcdev);</div><div class='hunk'>@@ -64,28 +191,30 @@ static int tps23881_pi_enable(struct pse_controller_dev *pcdev, int id)</div><div class='ctx'> 	if (id &gt;= TPS23881_MAX_CHANS)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='del'>-	ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	chan = priv-&gt;port[id].chan[0];</div><div class='del'>-	if (chan &lt; 4)</div><div class='del'>-		val = (u16)(ret | BIT(chan));</div><div class='del'>-	else</div><div class='del'>-		val = (u16)(ret | BIT(chan + 4));</div><div class='add'>+	val = tps23881_set_val(0, chan, 0, BIT(chan % 4), BIT(chan % 4));</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;port[id].is_4p) {</div><div class='ctx'> 		chan = priv-&gt;port[id].chan[1];</div><div class='del'>-		if (chan &lt; 4)</div><div class='del'>-			val |= BIT(chan);</div><div class='del'>-		else</div><div class='del'>-			val |= BIT(chan + 4);</div><div class='add'>+		val = tps23881_set_val(val, chan, 0, BIT(chan % 4),</div><div class='add'>+				       BIT(chan % 4));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	/* Enable DC disconnect*/</div><div class='add'>+	chan = priv-&gt;port[id].chan[0];</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, TPS23881_REG_DISC_EN);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = tps23881_set_val(ret, chan, 0, BIT(chan % 4), BIT(chan % 4));</div><div class='add'>+	ret = i2c_smbus_write_word_data(client, TPS23881_REG_DISC_EN, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -100,37 +229,79 @@ static int tps23881_pi_disable(struct pse_controller_dev *pcdev, int id)</div><div class='ctx'> 	if (id &gt;= TPS23881_MAX_CHANS)</div><div class='ctx'> 		return -ERANGE;</div><div class='ctx'> </div><div class='del'>-	ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);</div><div class='add'>+	chan = priv-&gt;port[id].chan[0];</div><div class='add'>+	val = tps23881_set_val(0, chan, 4, BIT(chan % 4), BIT(chan % 4));</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;port[id].is_4p) {</div><div class='add'>+		chan = priv-&gt;port[id].chan[1];</div><div class='add'>+		val = tps23881_set_val(val, chan, 4, BIT(chan % 4),</div><div class='add'>+				       BIT(chan % 4));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* PWOFF command resets lots of register which need to be</div><div class='add'>+	 * configured again. According to the datasheet "It may take upwards</div><div class='add'>+	 * of 5ms after PWOFFn command for all register values to be updated"</div><div class='add'>+	 */</div><div class='add'>+	mdelay(5);</div><div class='add'>+</div><div class='add'>+	/* Disable DC disconnect*/</div><div class='add'>+	chan = priv-&gt;port[id].chan[0];</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, TPS23881_REG_DISC_EN);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = tps23881_set_val(ret, chan, 0, 0, BIT(chan % 4));</div><div class='add'>+	ret = i2c_smbus_write_word_data(client, TPS23881_REG_DISC_EN, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Enable detection and classification */</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, TPS23881_REG_DET_CLA_EN);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	chan = priv-&gt;port[id].chan[0];</div><div class='del'>-	if (chan &lt; 4)</div><div class='del'>-		val = (u16)(ret | BIT(chan + 4));</div><div class='del'>-	else</div><div class='del'>-		val = (u16)(ret | BIT(chan + 8));</div><div class='add'>+	val = tps23881_set_val(ret, chan, 0, BIT(chan % 4), BIT(chan % 4));</div><div class='add'>+	val = tps23881_set_val(val, chan, 4, BIT(chan % 4), BIT(chan % 4));</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;port[id].is_4p) {</div><div class='ctx'> 		chan = priv-&gt;port[id].chan[1];</div><div class='del'>-		if (chan &lt; 4)</div><div class='del'>-			val |= BIT(chan + 4);</div><div class='del'>-		else</div><div class='del'>-			val |= BIT(chan + 8);</div><div class='add'>+		val = tps23881_set_val(ret, chan, 0, BIT(chan % 4),</div><div class='add'>+				       BIT(chan % 4));</div><div class='add'>+		val = tps23881_set_val(val, chan, 4, BIT(chan % 4),</div><div class='add'>+				       BIT(chan % 4));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val);</div><div class='add'>+	ret = i2c_smbus_write_word_data(client, TPS23881_REG_DET_CLA_EN, val);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* No power policy */</div><div class='add'>+	if (priv-&gt;port[id].pw_pol &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = tps23881_pi_enable_manual_pol(priv, id);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set power policy */</div><div class='add'>+	return tps23881_pi_set_pw_pol_limit(priv, id, priv-&gt;port[id].pw_pol,</div><div class='add'>+					    priv-&gt;port[id].is_4p);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+static int</div><div class='add'>+tps23881_pi_get_admin_state(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+			    struct pse_admin_state *admin_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps23881_priv *priv = to_tps23881_priv(pcdev);</div><div class='ctx'> 	struct i2c_client *client = priv-&gt;client;</div><div class='ctx'> 	bool enabled;</div><div class='ctx'> 	u8 chan;</div><div class='add'>+	u16 val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);</div><div class='hunk'>@@ -138,32 +309,35 @@ static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	chan = priv-&gt;port[id].chan[0];</div><div class='del'>-	if (chan &lt; 4)</div><div class='del'>-		enabled = ret &amp; BIT(chan);</div><div class='del'>-	else</div><div class='del'>-		enabled = ret &amp; BIT(chan + 4);</div><div class='add'>+	val = tps23881_calc_val(ret, chan, 0, BIT(chan % 4));</div><div class='add'>+	enabled = !!(val);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;port[id].is_4p) {</div><div class='ctx'> 		chan = priv-&gt;port[id].chan[1];</div><div class='del'>-		if (chan &lt; 4)</div><div class='del'>-			enabled &amp;= !!(ret &amp; BIT(chan));</div><div class='del'>-		else</div><div class='del'>-			enabled &amp;= !!(ret &amp; BIT(chan + 4));</div><div class='add'>+		val = tps23881_calc_val(ret, chan, 0, BIT(chan % 4));</div><div class='add'>+		enabled &amp;= !!(val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Return enabled status only if both channel are on this state */</div><div class='del'>-	return enabled;</div><div class='add'>+	if (enabled)</div><div class='add'>+		admin_state-&gt;c33_admin_state =</div><div class='add'>+			ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED;</div><div class='add'>+	else</div><div class='add'>+		admin_state-&gt;c33_admin_state =</div><div class='add'>+			ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps23881_ethtool_get_status(struct pse_controller_dev *pcdev,</div><div class='del'>-				       unsigned long id,</div><div class='del'>-				       struct netlink_ext_ack *extack,</div><div class='del'>-				       struct pse_control_status *status)</div><div class='add'>+static int</div><div class='add'>+tps23881_pi_get_pw_status(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+			  struct pse_pw_status *pw_status)</div><div class='ctx'> {</div><div class='ctx'> 	struct tps23881_priv *priv = to_tps23881_priv(pcdev);</div><div class='ctx'> 	struct i2c_client *client = priv-&gt;client;</div><div class='del'>-	bool enabled, delivering;</div><div class='add'>+	bool delivering;</div><div class='ctx'> 	u8 chan;</div><div class='add'>+	u16 val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);</div><div class='hunk'>@@ -171,40 +345,197 @@ static int tps23881_ethtool_get_status(struct pse_controller_dev *pcdev,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	chan = priv-&gt;port[id].chan[0];</div><div class='del'>-	if (chan &lt; 4) {</div><div class='del'>-		enabled = ret &amp; BIT(chan);</div><div class='del'>-		delivering = ret &amp; BIT(chan + 4);</div><div class='del'>-	} else {</div><div class='del'>-		enabled = ret &amp; BIT(chan + 4);</div><div class='del'>-		delivering = ret &amp; BIT(chan + 8);</div><div class='del'>-	}</div><div class='add'>+	val = tps23881_calc_val(ret, chan, 4, BIT(chan % 4));</div><div class='add'>+	delivering = !!(val);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;port[id].is_4p) {</div><div class='ctx'> 		chan = priv-&gt;port[id].chan[1];</div><div class='del'>-		if (chan &lt; 4) {</div><div class='del'>-			enabled &amp;= !!(ret &amp; BIT(chan));</div><div class='del'>-			delivering &amp;= !!(ret &amp; BIT(chan + 4));</div><div class='del'>-		} else {</div><div class='del'>-			enabled &amp;= !!(ret &amp; BIT(chan + 4));</div><div class='del'>-			delivering &amp;= !!(ret &amp; BIT(chan + 8));</div><div class='del'>-		}</div><div class='add'>+		val = tps23881_calc_val(ret, chan, 4, BIT(chan % 4));</div><div class='add'>+		delivering &amp;= !!(val);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Return delivering status only if both channel are on this state */</div><div class='ctx'> 	if (delivering)</div><div class='del'>-		status-&gt;c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING;</div><div class='del'>-	else</div><div class='del'>-		status-&gt;c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED;</div><div class='del'>-</div><div class='del'>-	/* Return enabled status only if both channel are on this state */</div><div class='del'>-	if (enabled)</div><div class='del'>-		status-&gt;c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED;</div><div class='add'>+		pw_status-&gt;c33_pw_status =</div><div class='add'>+			ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING;</div><div class='ctx'> 	else</div><div class='del'>-		status-&gt;c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED;</div><div class='add'>+		pw_status-&gt;c33_pw_status =</div><div class='add'>+			ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int tps23881_pi_get_voltage(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct tps23881_priv *priv = to_tps23881_priv(pcdev);</div><div class='add'>+	struct i2c_client *client = priv-&gt;client;</div><div class='add'>+	int ret;</div><div class='add'>+	u64 uV;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, TPS23881_REG_INPUT_V);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	uV = ret &amp; 0x3fff;</div><div class='add'>+	uV *= TPS23881_UV_STEP;</div><div class='add'>+</div><div class='add'>+	return (int)uV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+tps23881_pi_get_chan_current(struct tps23881_priv *priv, u8 chan)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = priv-&gt;client;</div><div class='add'>+	int reg, ret;</div><div class='add'>+	u64 tmp_64;</div><div class='add'>+</div><div class='add'>+	/* Registers 0x30 to 0x3d */</div><div class='add'>+	reg = TPS23881_REG_CHAN1_A + (chan % 4) * 4 + (chan &gt;= 4);</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tmp_64 = ret &amp; 0x3fff;</div><div class='add'>+	tmp_64 *= TPS23881_NA_STEP;</div><div class='add'>+	/* uA = nA / 1000 */</div><div class='add'>+	tmp_64 = DIV_ROUND_CLOSEST_ULL(tmp_64, 1000);</div><div class='add'>+	return (int)tmp_64;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tps23881_pi_get_pw_class(struct pse_controller_dev *pcdev,</div><div class='add'>+				    int id)</div><div class='add'>+{</div><div class='add'>+	struct tps23881_priv *priv = to_tps23881_priv(pcdev);</div><div class='add'>+	struct i2c_client *client = priv-&gt;client;</div><div class='add'>+	int ret, reg;</div><div class='add'>+	u8 chan;</div><div class='add'>+</div><div class='add'>+	chan = priv-&gt;port[id].chan[0];</div><div class='add'>+	reg = TPS23881_REG_CHAN1_CLASS + (chan % 4);</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return tps23881_calc_val(ret, chan, 4, 0x0f);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+tps23881_pi_get_actual_pw(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct tps23881_priv *priv = to_tps23881_priv(pcdev);</div><div class='add'>+	int ret, uV, uA;</div><div class='add'>+	u64 tmp_64;</div><div class='add'>+	u8 chan;</div><div class='add'>+</div><div class='add'>+	ret = tps23881_pi_get_voltage(&amp;priv-&gt;pcdev, id);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	uV = ret;</div><div class='add'>+</div><div class='add'>+	chan = priv-&gt;port[id].chan[0];</div><div class='add'>+	ret = tps23881_pi_get_chan_current(priv, chan);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	uA = ret;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;port[id].is_4p) {</div><div class='add'>+		chan = priv-&gt;port[id].chan[1];</div><div class='add'>+		ret = tps23881_pi_get_chan_current(priv, chan);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		uA += ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tmp_64 = uV;</div><div class='add'>+	tmp_64 *= uA;</div><div class='add'>+	/* mW = uV * uA / 1000000000 */</div><div class='add'>+	return DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+tps23881_pi_get_pw_limit_chan(struct tps23881_priv *priv, u8 chan)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = priv-&gt;client;</div><div class='add'>+	int ret, reg;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	reg = TPS23881_REG_2PAIR_POL1 + (chan % 4);</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = tps23881_calc_val(ret, chan, 0, 0xff);</div><div class='add'>+	return val * TPS23881_MW_STEP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tps23881_pi_get_pw_limit(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct tps23881_priv *priv = to_tps23881_priv(pcdev);</div><div class='add'>+	int ret, mW;</div><div class='add'>+	u8 chan;</div><div class='add'>+</div><div class='add'>+	chan = priv-&gt;port[id].chan[0];</div><div class='add'>+	ret = tps23881_pi_get_pw_limit_chan(priv, chan);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mW = ret;</div><div class='add'>+	if (priv-&gt;port[id].is_4p) {</div><div class='add'>+		chan = priv-&gt;port[id].chan[1];</div><div class='add'>+		ret = tps23881_pi_get_pw_limit_chan(priv, chan);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		mW += ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mW;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tps23881_pi_set_pw_limit(struct pse_controller_dev *pcdev,</div><div class='add'>+				    int id, int max_mW)</div><div class='add'>+{</div><div class='add'>+	struct tps23881_priv *priv = to_tps23881_priv(pcdev);</div><div class='add'>+	u8 pw_pol;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (max_mW &lt; TPS23881_MIN_PI_PW_LIMIT_MW || MAX_PI_PW &lt; max_mW) {</div><div class='add'>+		dev_err(&amp;priv-&gt;client-&gt;dev,</div><div class='add'>+			"power limit %d out of ranges [%d,%d]",</div><div class='add'>+			max_mW, TPS23881_MIN_PI_PW_LIMIT_MW, MAX_PI_PW);</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = tps23881_pi_enable_manual_pol(priv, id);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pw_pol = DIV_ROUND_CLOSEST_ULL(max_mW, TPS23881_MW_STEP);</div><div class='add'>+</div><div class='add'>+	/* Save power policy to reconfigure it after a disabled call */</div><div class='add'>+	priv-&gt;port[id].pw_pol = pw_pol;</div><div class='add'>+	return tps23881_pi_set_pw_pol_limit(priv, id, pw_pol,</div><div class='add'>+					    priv-&gt;port[id].is_4p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+tps23881_pi_get_pw_limit_ranges(struct pse_controller_dev *pcdev, int id,</div><div class='add'>+				struct pse_pw_limit_ranges *pw_limit_ranges)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_c33_pse_pw_limit_range *c33_pw_limit_ranges;</div><div class='add'>+</div><div class='add'>+	c33_pw_limit_ranges = kzalloc(sizeof(*c33_pw_limit_ranges),</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+	if (!c33_pw_limit_ranges)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	c33_pw_limit_ranges-&gt;min = TPS23881_MIN_PI_PW_LIMIT_MW;</div><div class='add'>+	c33_pw_limit_ranges-&gt;max = MAX_PI_PW;</div><div class='add'>+	pw_limit_ranges-&gt;c33_pw_limit_ranges = c33_pw_limit_ranges;</div><div class='add'>+</div><div class='add'>+	/* Return the number of ranges */</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Parse managers subnode into a array of device node */</div><div class='ctx'> static int</div><div class='ctx'> tps23881_get_of_channels(struct tps23881_priv *priv,</div><div class='hunk'>@@ -488,7 +819,7 @@ tps23881_write_port_matrix(struct tps23881_priv *priv,</div><div class='ctx'> 	struct i2c_client *client = priv-&gt;client;</div><div class='ctx'> 	u8 pi_id, lgcl_chan, hw_chan;</div><div class='ctx'> 	u16 val = 0;</div><div class='del'>-	int i, ret;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; port_cnt; i++) {</div><div class='ctx'> 		pi_id = port_matrix[i].pi_id;</div><div class='hunk'>@@ -496,8 +827,13 @@ tps23881_write_port_matrix(struct tps23881_priv *priv,</div><div class='ctx'> 		hw_chan = port_matrix[i].hw_chan[0] % 4;</div><div class='ctx'> </div><div class='ctx'> 		/* Set software port matrix for existing ports */</div><div class='del'>-		if (port_matrix[i].exist)</div><div class='add'>+		if (port_matrix[i].exist) {</div><div class='ctx'> 			priv-&gt;port[pi_id].chan[0] = lgcl_chan;</div><div class='add'>+			priv-&gt;port[pi_id].exist = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Initialize power policy internal value */</div><div class='add'>+		priv-&gt;port[pi_id].pw_pol = -1;</div><div class='ctx'> </div><div class='ctx'> 		/* Set hardware port matrix for all ports */</div><div class='ctx'> 		val |= hw_chan &lt;&lt; (lgcl_chan * 2);</div><div class='hunk'>@@ -519,11 +855,7 @@ tps23881_write_port_matrix(struct tps23881_priv *priv,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Write hardware ports matrix */</div><div class='del'>-	ret = i2c_smbus_write_word_data(client, TPS23881_REG_PORT_MAP, val);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return i2c_smbus_write_word_data(client, TPS23881_REG_PORT_MAP, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -572,11 +904,7 @@ tps23881_set_ports_conf(struct tps23881_priv *priv,</div><div class='ctx'> 			val |= BIT(port_matrix[i].lgcl_chan[1]) |</div><div class='ctx'> 			       BIT(port_matrix[i].lgcl_chan[1] + 4);</div><div class='ctx'> 	}</div><div class='del'>-	ret = i2c_smbus_write_word_data(client, TPS23881_REG_DET_CLA_EN, val);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return i2c_smbus_write_word_data(client, TPS23881_REG_DET_CLA_EN, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -602,11 +930,7 @@ tps23881_set_ports_matrix(struct tps23881_priv *priv,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = tps23881_set_ports_conf(priv, port_matrix);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return tps23881_set_ports_conf(priv, port_matrix);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int tps23881_setup_pi_matrix(struct pse_controller_dev *pcdev)</div><div class='hunk'>@@ -630,16 +954,84 @@ static int tps23881_setup_pi_matrix(struct pse_controller_dev *pcdev)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int tps23881_power_class_table[] = {</div><div class='add'>+	-ERANGE,</div><div class='add'>+	4000,</div><div class='add'>+	7000,</div><div class='add'>+	15500,</div><div class='add'>+	30000,</div><div class='add'>+	15500,</div><div class='add'>+	15500,</div><div class='add'>+	-ERANGE,</div><div class='add'>+	45000,</div><div class='add'>+	60000,</div><div class='add'>+	75000,</div><div class='add'>+	90000,</div><div class='add'>+	15500,</div><div class='add'>+	45000,</div><div class='add'>+	-ERANGE,</div><div class='add'>+	-ERANGE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tps23881_pi_get_pw_req(struct pse_controller_dev *pcdev, int id)</div><div class='add'>+{</div><div class='add'>+	struct tps23881_priv *priv = to_tps23881_priv(pcdev);</div><div class='add'>+	struct i2c_client *client = priv-&gt;client;</div><div class='add'>+	u8 reg, chan;</div><div class='add'>+	int ret;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	/* For a 4-pair the classification need 5ms to be completed */</div><div class='add'>+	if (priv-&gt;port[id].is_4p)</div><div class='add'>+		mdelay(5);</div><div class='add'>+</div><div class='add'>+	chan = priv-&gt;port[id].chan[0];</div><div class='add'>+	reg = TPS23881_REG_DISC + (chan % 4);</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = tps23881_calc_val(ret, chan, 4, 0xf);</div><div class='add'>+	return tps23881_power_class_table[val];</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct pse_controller_ops tps23881_ops = {</div><div class='ctx'> 	.setup_pi_matrix = tps23881_setup_pi_matrix,</div><div class='ctx'> 	.pi_enable = tps23881_pi_enable,</div><div class='ctx'> 	.pi_disable = tps23881_pi_disable,</div><div class='del'>-	.pi_is_enabled = tps23881_pi_is_enabled,</div><div class='del'>-	.ethtool_get_status = tps23881_ethtool_get_status,</div><div class='add'>+	.pi_get_admin_state = tps23881_pi_get_admin_state,</div><div class='add'>+	.pi_get_pw_status = tps23881_pi_get_pw_status,</div><div class='add'>+	.pi_get_pw_class = tps23881_pi_get_pw_class,</div><div class='add'>+	.pi_get_actual_pw = tps23881_pi_get_actual_pw,</div><div class='add'>+	.pi_get_voltage = tps23881_pi_get_voltage,</div><div class='add'>+	.pi_get_pw_limit = tps23881_pi_get_pw_limit,</div><div class='add'>+	.pi_set_pw_limit = tps23881_pi_set_pw_limit,</div><div class='add'>+	.pi_get_pw_limit_ranges = tps23881_pi_get_pw_limit_ranges,</div><div class='add'>+	.pi_get_pw_req = tps23881_pi_get_pw_req,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const char fw_parity_name[] = "ti/tps23881/tps23881-parity-14.bin";</div><div class='del'>-static const char fw_sram_name[] = "ti/tps23881/tps23881-sram-14.bin";</div><div class='add'>+struct tps23881_info {</div><div class='add'>+	u8 dev_id;	/* device ID and silicon revision */</div><div class='add'>+	const char *fw_parity_name;	/* parity code firmware file name */</div><div class='add'>+	const char *fw_sram_name;	/* SRAM code firmware file name */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum tps23881_model {</div><div class='add'>+	TPS23881,</div><div class='add'>+	TPS23881B,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct tps23881_info tps23881_info[] = {</div><div class='add'>+	[TPS23881] = {</div><div class='add'>+		.dev_id = 0x22,</div><div class='add'>+		.fw_parity_name = "ti/tps23881/tps23881-parity-14.bin",</div><div class='add'>+		.fw_sram_name = "ti/tps23881/tps23881-sram-14.bin",</div><div class='add'>+	},</div><div class='add'>+	[TPS23881B] = {</div><div class='add'>+		.dev_id = 0x24,</div><div class='add'>+		/* skip SRAM load, ROM provides Clause 145 hardware-level support */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> struct tps23881_fw_conf {</div><div class='ctx'> 	u8 reg;</div><div class='hunk'>@@ -711,16 +1103,17 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tps23881_flash_sram_fw(struct i2c_client *client)</div><div class='add'>+static int tps23881_flash_sram_fw(struct i2c_client *client,</div><div class='add'>+				  const struct tps23881_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = tps23881_flash_sram_fw_part(client, fw_parity_name,</div><div class='add'>+	ret = tps23881_flash_sram_fw_part(client, info-&gt;fw_parity_name,</div><div class='ctx'> 					  tps23881_fw_parity_conf);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = tps23881_flash_sram_fw_part(client, fw_sram_name,</div><div class='add'>+	ret = tps23881_flash_sram_fw_part(client, info-&gt;fw_sram_name,</div><div class='ctx'> 					  tps23881_fw_sram_conf);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -734,9 +1127,311 @@ static int tps23881_flash_sram_fw(struct i2c_client *client)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Convert interrupt events to 0xff to be aligned with the chan</div><div class='add'>+ * number.</div><div class='add'>+ */</div><div class='add'>+static u8 tps23881_irq_export_chans_helper(u16 reg_val, u8 field_offset)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	val = (reg_val &gt;&gt; (4 + field_offset) &amp; 0xf0) |</div><div class='add'>+	      (reg_val &gt;&gt; field_offset &amp; 0x0f);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Convert chan number to port number */</div><div class='add'>+static void tps23881_set_notifs_helper(struct tps23881_priv *priv,</div><div class='add'>+				       u8 chans,</div><div class='add'>+				       unsigned long *notifs,</div><div class='add'>+				       unsigned long *notifs_mask,</div><div class='add'>+				       enum ethtool_pse_event event)</div><div class='add'>+{</div><div class='add'>+	u8 chan;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!chans)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; TPS23881_MAX_CHANS; i++) {</div><div class='add'>+		if (!priv-&gt;port[i].exist)</div><div class='add'>+			continue;</div><div class='add'>+		/* No need to look at the 2nd channel in case of PoE4 as</div><div class='add'>+		 * both registers are set.</div><div class='add'>+		 */</div><div class='add'>+		chan = priv-&gt;port[i].chan[0];</div><div class='add'>+</div><div class='add'>+		if (BIT(chan) &amp; chans) {</div><div class='add'>+			*notifs_mask |= BIT(i);</div><div class='add'>+			notifs[i] |= event;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tps23881_irq_event_over_temp(struct tps23881_priv *priv,</div><div class='add'>+					 u16 reg_val,</div><div class='add'>+					 unsigned long *notifs,</div><div class='add'>+					 unsigned long *notifs_mask)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (reg_val &amp; TPS23881_REG_TSD) {</div><div class='add'>+		for (i = 0; i &lt; TPS23881_MAX_CHANS; i++) {</div><div class='add'>+			if (!priv-&gt;port[i].exist)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			*notifs_mask |= BIT(i);</div><div class='add'>+			notifs[i] |= ETHTOOL_PSE_EVENT_OVER_TEMP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tps23881_irq_event_over_current(struct tps23881_priv *priv,</div><div class='add'>+					   u16 reg_val,</div><div class='add'>+					   unsigned long *notifs,</div><div class='add'>+					   unsigned long *notifs_mask)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+	u8 chans;</div><div class='add'>+</div><div class='add'>+	chans = tps23881_irq_export_chans_helper(reg_val, 0);</div><div class='add'>+	if (!chans)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	tps23881_set_notifs_helper(priv, chans, notifs, notifs_mask,</div><div class='add'>+				   ETHTOOL_PSE_EVENT_OVER_CURRENT |</div><div class='add'>+				   ETHTOOL_C33_PSE_EVENT_DISCONNECTION);</div><div class='add'>+</div><div class='add'>+	/* Over Current event resets the power limit registers so we need</div><div class='add'>+	 * to configured it again.</div><div class='add'>+	 */</div><div class='add'>+	for_each_set_bit(i, notifs_mask, priv-&gt;pcdev.nr_lines) {</div><div class='add'>+		if (priv-&gt;port[i].pw_pol &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = tps23881_pi_enable_manual_pol(priv, i);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Set power policy */</div><div class='add'>+		ret = tps23881_pi_set_pw_pol_limit(priv, i,</div><div class='add'>+						   priv-&gt;port[i].pw_pol,</div><div class='add'>+						   priv-&gt;port[i].is_4p);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tps23881_irq_event_disconnection(struct tps23881_priv *priv,</div><div class='add'>+					     u16 reg_val,</div><div class='add'>+					     unsigned long *notifs,</div><div class='add'>+					     unsigned long *notifs_mask)</div><div class='add'>+{</div><div class='add'>+	u8 chans;</div><div class='add'>+</div><div class='add'>+	chans = tps23881_irq_export_chans_helper(reg_val, 4);</div><div class='add'>+	if (chans)</div><div class='add'>+		tps23881_set_notifs_helper(priv, chans, notifs, notifs_mask,</div><div class='add'>+					   ETHTOOL_C33_PSE_EVENT_DISCONNECTION);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tps23881_irq_event_detection(struct tps23881_priv *priv,</div><div class='add'>+					u16 reg_val,</div><div class='add'>+					unsigned long *notifs,</div><div class='add'>+					unsigned long *notifs_mask)</div><div class='add'>+{</div><div class='add'>+	enum ethtool_pse_event event;</div><div class='add'>+	int reg, ret, i, val;</div><div class='add'>+	unsigned long chans;</div><div class='add'>+</div><div class='add'>+	chans = tps23881_irq_export_chans_helper(reg_val, 0);</div><div class='add'>+	for_each_set_bit(i, &amp;chans, TPS23881_MAX_CHANS) {</div><div class='add'>+		reg = TPS23881_REG_DISC + (i % 4);</div><div class='add'>+		ret = i2c_smbus_read_word_data(priv-&gt;client, reg);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		val = tps23881_calc_val(ret, i, 0, 0xf);</div><div class='add'>+		/* If detection valid */</div><div class='add'>+		if (val == 0x4)</div><div class='add'>+			event = ETHTOOL_C33_PSE_EVENT_DETECTION;</div><div class='add'>+		else</div><div class='add'>+			event = ETHTOOL_C33_PSE_EVENT_DISCONNECTION;</div><div class='add'>+</div><div class='add'>+		tps23881_set_notifs_helper(priv, BIT(i), notifs,</div><div class='add'>+					   notifs_mask, event);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tps23881_irq_event_classification(struct tps23881_priv *priv,</div><div class='add'>+					     u16 reg_val,</div><div class='add'>+					     unsigned long *notifs,</div><div class='add'>+					     unsigned long *notifs_mask)</div><div class='add'>+{</div><div class='add'>+	int reg, ret, val, i;</div><div class='add'>+	unsigned long chans;</div><div class='add'>+</div><div class='add'>+	chans = tps23881_irq_export_chans_helper(reg_val, 4);</div><div class='add'>+	for_each_set_bit(i, &amp;chans, TPS23881_MAX_CHANS) {</div><div class='add'>+		reg = TPS23881_REG_DISC + (i % 4);</div><div class='add'>+		ret = i2c_smbus_read_word_data(priv-&gt;client, reg);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		val = tps23881_calc_val(ret, i, 4, 0xf);</div><div class='add'>+		/* Do not report classification event for unknown class */</div><div class='add'>+		if (!val || val == 0x8 || val == 0xf)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		tps23881_set_notifs_helper(priv, BIT(i), notifs,</div><div class='add'>+					   notifs_mask,</div><div class='add'>+					   ETHTOOL_C33_PSE_EVENT_CLASSIFICATION);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tps23881_irq_event_handler(struct tps23881_priv *priv, u16 reg,</div><div class='add'>+				      unsigned long *notifs,</div><div class='add'>+				      unsigned long *notifs_mask)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = priv-&gt;client;</div><div class='add'>+	int ret, val;</div><div class='add'>+</div><div class='add'>+	/* The Supply event bit is repeated twice so we only need to read</div><div class='add'>+	 * the one from the first byte.</div><div class='add'>+	 */</div><div class='add'>+	if (reg &amp; TPS23881_REG_IT_SUPF) {</div><div class='add'>+		ret = i2c_smbus_read_word_data(client, TPS23881_REG_SUPF_EVENT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		tps23881_irq_event_over_temp(priv, ret, notifs, notifs_mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg &amp; (TPS23881_REG_IT_IFAULT | TPS23881_REG_IT_IFAULT &lt;&lt; 8 |</div><div class='add'>+		   TPS23881_REG_IT_DISF | TPS23881_REG_IT_DISF &lt;&lt; 8)) {</div><div class='add'>+		ret = i2c_smbus_read_word_data(client, TPS23881_REG_FAULT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		ret = tps23881_irq_event_over_current(priv, ret, notifs,</div><div class='add'>+						      notifs_mask);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		tps23881_irq_event_disconnection(priv, ret, notifs, notifs_mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg &amp; (TPS23881_REG_IT_DETC | TPS23881_REG_IT_DETC &lt;&lt; 8 |</div><div class='add'>+		   TPS23881_REG_IT_CLASC | TPS23881_REG_IT_CLASC &lt;&lt; 8)) {</div><div class='add'>+		ret = i2c_smbus_read_word_data(client, TPS23881_REG_DET_EVENT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		val = ret;</div><div class='add'>+		ret = tps23881_irq_event_detection(priv, val, notifs,</div><div class='add'>+						   notifs_mask);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = tps23881_irq_event_classification(priv, val, notifs,</div><div class='add'>+							notifs_mask);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tps23881_irq_handler(int irq, struct pse_controller_dev *pcdev,</div><div class='add'>+				unsigned long *notifs,</div><div class='add'>+				unsigned long *notifs_mask)</div><div class='add'>+{</div><div class='add'>+	struct tps23881_priv *priv = to_tps23881_priv(pcdev);</div><div class='add'>+	struct i2c_client *client = priv-&gt;client;</div><div class='add'>+	int ret, it_mask, retry;</div><div class='add'>+</div><div class='add'>+	/* Get interruption mask */</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, TPS23881_REG_IT_MASK);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	it_mask = ret;</div><div class='add'>+</div><div class='add'>+	/* Read interrupt register until it frees the interruption pin. */</div><div class='add'>+	retry = 0;</div><div class='add'>+	while (true) {</div><div class='add'>+		if (retry &gt; TPS23881_MAX_IRQ_RETRIES) {</div><div class='add'>+			dev_err(&amp;client-&gt;dev, "interrupt never freed");</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = i2c_smbus_read_word_data(client, TPS23881_REG_IT);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* No more relevant interruption */</div><div class='add'>+		if (!(ret &amp; it_mask))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		ret = tps23881_irq_event_handler(priv, (u16)ret, notifs,</div><div class='add'>+						 notifs_mask);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		retry++;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tps23881_setup_irq(struct tps23881_priv *priv, int irq)</div><div class='add'>+{</div><div class='add'>+	struct i2c_client *client = priv-&gt;client;</div><div class='add'>+	struct pse_irq_desc irq_desc = {</div><div class='add'>+		.name = "tps23881-irq",</div><div class='add'>+		.map_event = tps23881_irq_handler,</div><div class='add'>+	};</div><div class='add'>+	int ret;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	if (!irq) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "interrupt is missing");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = TPS23881_REG_IT_IFAULT | TPS23881_REG_IT_SUPF |</div><div class='add'>+	      TPS23881_REG_IT_DETC | TPS23881_REG_IT_CLASC |</div><div class='add'>+	      TPS23881_REG_IT_DISF;</div><div class='add'>+	val |= val &lt;&lt; 8;</div><div class='add'>+	ret = i2c_smbus_write_word_data(client, TPS23881_REG_IT_MASK, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = i2c_smbus_read_word_data(client, TPS23881_REG_GEN_MASK);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = TPS23881_REG_INTEN | TPS23881_REG_CLCHE | TPS23881_REG_DECHE;</div><div class='add'>+	val |= val &lt;&lt; 8;</div><div class='add'>+	val |= (u16)ret;</div><div class='add'>+	ret = i2c_smbus_write_word_data(client, TPS23881_REG_GEN_MASK, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Reset interrupts registers */</div><div class='add'>+	ret = i2c_smbus_write_word_data(client, TPS23881_REG_RESET,</div><div class='add'>+					TPS23881_REG_CLRAIN);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return devm_pse_irq_helper(&amp;priv-&gt;pcdev, irq, 0, &amp;irq_desc);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int tps23881_i2c_probe(struct i2c_client *client)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = &amp;client-&gt;dev;</div><div class='add'>+	const struct tps23881_info *info;</div><div class='ctx'> 	struct tps23881_priv *priv;</div><div class='ctx'> 	struct gpio_desc *reset;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -747,6 +1442,10 @@ static int tps23881_i2c_probe(struct i2c_client *client)</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	info = i2c_get_match_data(client);</div><div class='add'>+	if (!info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='ctx'> 	if (!priv)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -765,7 +1464,7 @@ static int tps23881_i2c_probe(struct i2c_client *client)</div><div class='ctx'> 		 * to Load TPS2388x SRAM and Parity Code over I2C" (Rev E))</div><div class='ctx'> 		 * indicates we should delay that programming by at least 50ms. So</div><div class='ctx'> 		 * we'll wait the entire 50ms here to ensure we're safe to go to the</div><div class='del'>-		 * SRAM loading proceedure.</div><div class='add'>+		 * SRAM loading procedure.</div><div class='ctx'> 		 */</div><div class='ctx'> 		msleep(50);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -774,20 +1473,27 @@ static int tps23881_i2c_probe(struct i2c_client *client)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (FIELD_GET(TPS23881_REG_DEVID_MASK, ret) != TPS23881_DEVICE_ID) {</div><div class='add'>+	if (ret != info-&gt;dev_id) {</div><div class='ctx'> 		dev_err(dev, "Wrong device ID\n");</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = tps23881_flash_sram_fw(client);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='add'>+	if (info-&gt;fw_sram_name) {</div><div class='add'>+		ret = tps23881_flash_sram_fw(client, info);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = i2c_smbus_read_byte_data(client, TPS23881_REG_FWREV);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	dev_info(&amp;client-&gt;dev, "Firmware revision 0x%x\n", ret);</div><div class='add'>+	if (ret == 0xFF) {</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Device entered safe mode\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+	dev_info(&amp;client-&gt;dev, "Firmware revision 0x%x%s\n", ret,</div><div class='add'>+		 ret == 0x00 ? " (ROM firmware)" : "");</div><div class='ctx'> </div><div class='ctx'> 	/* Set configuration B, 16 bit access on a single device address */</div><div class='ctx'> 	ret = i2c_smbus_read_byte_data(client, TPS23881_REG_GEN_MASK);</div><div class='hunk'>@@ -808,23 +1514,36 @@ static int tps23881_i2c_probe(struct i2c_client *client)</div><div class='ctx'> 	priv-&gt;pcdev.dev = dev;</div><div class='ctx'> 	priv-&gt;pcdev.types = ETHTOOL_PSE_C33;</div><div class='ctx'> 	priv-&gt;pcdev.nr_lines = TPS23881_MAX_CHANS;</div><div class='add'>+	priv-&gt;pcdev.supp_budget_eval_strategies = PSE_BUDGET_EVAL_STRAT_STATIC;</div><div class='ctx'> 	ret = devm_pse_controller_register(dev, &amp;priv-&gt;pcdev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		return dev_err_probe(dev, ret,</div><div class='ctx'> 				     "failed to register PSE controller\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = tps23881_setup_irq(priv, client-&gt;irq);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct i2c_device_id tps23881_id[] = {</div><div class='del'>-	{ "tps23881" },</div><div class='add'>+	{ "tps23881", .driver_data = (kernel_ulong_t)&amp;tps23881_info[TPS23881] },</div><div class='add'>+	{ "tps23881b", .driver_data = (kernel_ulong_t)&amp;tps23881_info[TPS23881B] },</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(i2c, tps23881_id);</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id tps23881_of_match[] = {</div><div class='del'>-	{ .compatible = "ti,tps23881", },</div><div class='add'>+	{</div><div class='add'>+		.compatible = "ti,tps23881",</div><div class='add'>+		.data = &amp;tps23881_info[TPS23881]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "ti,tps23881b",</div><div class='add'>+		.data = &amp;tps23881_info[TPS23881B]</div><div class='add'>+	},</div><div class='ctx'> 	{ },</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, tps23881_of_match);</div><div class='head'>diff --git a/drivers/net/sb1000.c b/drivers/net/sb1000.c<br/>deleted file mode 100644<br/>index c3f8020571ad..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/sb1000.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/sb1000.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1179 +0,0 @@</div><div class='del'>-// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-/* sb1000.c: A General Instruments SB1000 driver for linux. */</div><div class='del'>-/*</div><div class='del'>-	Written 1998 by Franco Venturi.</div><div class='del'>-</div><div class='del'>-	Copyright 1998 by Franco Venturi.</div><div class='del'>-	Copyright 1994,1995 by Donald Becker.</div><div class='del'>-	Copyright 1993 United States Government as represented by the</div><div class='del'>-	Director, National Security Agency.</div><div class='del'>-</div><div class='del'>-	This driver is for the General Instruments SB1000 (internal SURFboard)</div><div class='del'>-</div><div class='del'>-	The author may be reached as fventuri@mediaone.net</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	Changes:</div><div class='del'>-</div><div class='del'>-	981115 Steven Hirsch &lt;shirsch@adelphia.net&gt;</div><div class='del'>-</div><div class='del'>-	Linus changed the timer interface.  Should work on all recent</div><div class='del'>-	development kernels.</div><div class='del'>-</div><div class='del'>-	980608 Steven Hirsch &lt;shirsch@adelphia.net&gt;</div><div class='del'>-</div><div class='del'>-	Small changes to make it work with 2.1.x kernels. Hopefully,</div><div class='del'>-	nothing major will change before official release of Linux 2.2.</div><div class='del'>-</div><div class='del'>-	Merged with 2.2 - Alan Cox</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-static char version[] = "sb1000.c:v1.1.2 6/01/98 (fventuri@mediaone.net)\n";</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/if_cablemodem.h&gt; /* for SIOGCM/SIOSCM stuff */</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;	/* for udelay() */</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/pnp.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/processor.h&gt;</div><div class='del'>-#include &lt;linux/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-#ifdef SB1000_DEBUG</div><div class='del'>-static int sb1000_debug = SB1000_DEBUG;</div><div class='del'>-#else</div><div class='del'>-static const int sb1000_debug = 1;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static const int SB1000_IO_EXTENT = 8;</div><div class='del'>-/* SB1000 Maximum Receive Unit */</div><div class='del'>-static const int SB1000_MRU = 1500; /* octects */</div><div class='del'>-</div><div class='del'>-#define NPIDS 4</div><div class='del'>-struct sb1000_private {</div><div class='del'>-	struct sk_buff *rx_skb[NPIDS];</div><div class='del'>-	short rx_dlen[NPIDS];</div><div class='del'>-	unsigned int rx_frames;</div><div class='del'>-	short rx_error_count;</div><div class='del'>-	short rx_error_dpc_count;</div><div class='del'>-	unsigned char rx_session_id[NPIDS];</div><div class='del'>-	unsigned char rx_frame_id[NPIDS];</div><div class='del'>-	unsigned char rx_pkt_type[NPIDS];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* prototypes for Linux interface */</div><div class='del'>-extern int sb1000_probe(struct net_device *dev);</div><div class='del'>-static int sb1000_open(struct net_device *dev);</div><div class='del'>-static int sb1000_siocdevprivate(struct net_device *dev, struct ifreq *ifr,</div><div class='del'>-				 void __user *data, int cmd);</div><div class='del'>-static netdev_tx_t sb1000_start_xmit(struct sk_buff *skb,</div><div class='del'>-				     struct net_device *dev);</div><div class='del'>-static irqreturn_t sb1000_interrupt(int irq, void *dev_id);</div><div class='del'>-static int sb1000_close(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* SB1000 hardware routines to be used during open/configuration phases */</div><div class='del'>-static int card_wait_for_busy_clear(const int ioaddr[],</div><div class='del'>-	const char* name);</div><div class='del'>-static int card_wait_for_ready(const int ioaddr[], const char* name,</div><div class='del'>-	unsigned char in[]);</div><div class='del'>-static int card_send_command(const int ioaddr[], const char* name,</div><div class='del'>-	const unsigned char out[], unsigned char in[]);</div><div class='del'>-</div><div class='del'>-/* SB1000 hardware routines to be used during frame rx interrupt */</div><div class='del'>-static int sb1000_wait_for_ready(const int ioaddr[], const char* name);</div><div class='del'>-static int sb1000_wait_for_ready_clear(const int ioaddr[],</div><div class='del'>-	const char* name);</div><div class='del'>-static void sb1000_send_command(const int ioaddr[], const char* name,</div><div class='del'>-	const unsigned char out[]);</div><div class='del'>-static void sb1000_read_status(const int ioaddr[], unsigned char in[]);</div><div class='del'>-static void sb1000_issue_read_command(const int ioaddr[],</div><div class='del'>-	const char* name);</div><div class='del'>-</div><div class='del'>-/* SB1000 commands for open/configuration */</div><div class='del'>-static int sb1000_reset(const int ioaddr[], const char* name);</div><div class='del'>-static int sb1000_check_CRC(const int ioaddr[], const char* name);</div><div class='del'>-static inline int sb1000_start_get_set_command(const int ioaddr[],</div><div class='del'>-	const char* name);</div><div class='del'>-static int sb1000_end_get_set_command(const int ioaddr[],</div><div class='del'>-	const char* name);</div><div class='del'>-static int sb1000_activate(const int ioaddr[], const char* name);</div><div class='del'>-static int sb1000_get_firmware_version(const int ioaddr[],</div><div class='del'>-	const char* name, unsigned char version[], int do_end);</div><div class='del'>-static int sb1000_get_frequency(const int ioaddr[], const char* name,</div><div class='del'>-	int* frequency);</div><div class='del'>-static int sb1000_set_frequency(const int ioaddr[], const char* name,</div><div class='del'>-	int frequency);</div><div class='del'>-static int sb1000_get_PIDs(const int ioaddr[], const char* name,</div><div class='del'>-	short PID[]);</div><div class='del'>-static int sb1000_set_PIDs(const int ioaddr[], const char* name,</div><div class='del'>-	const short PID[]);</div><div class='del'>-</div><div class='del'>-/* SB1000 commands for frame rx interrupt */</div><div class='del'>-static int sb1000_rx(struct net_device *dev);</div><div class='del'>-static void sb1000_error_dpc(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-static const struct pnp_device_id sb1000_pnp_ids[] = {</div><div class='del'>-	{ "GIC1000", 0 },</div><div class='del'>-	{ "", 0 }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pnp, sb1000_pnp_ids);</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops sb1000_netdev_ops = {</div><div class='del'>-	.ndo_open		= sb1000_open,</div><div class='del'>-	.ndo_start_xmit		= sb1000_start_xmit,</div><div class='del'>-	.ndo_siocdevprivate	= sb1000_siocdevprivate,</div><div class='del'>-	.ndo_stop		= sb1000_close,</div><div class='del'>-	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-sb1000_probe_one(struct pnp_dev *pdev, const struct pnp_device_id *id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	unsigned short ioaddr[2], irq;</div><div class='del'>-	unsigned int serial_number;</div><div class='del'>-	int error = -ENODEV;</div><div class='del'>-	u8 addr[ETH_ALEN];</div><div class='del'>-</div><div class='del'>-	if (pnp_device_attach(pdev) &lt; 0)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	if (pnp_activate_dev(pdev) &lt; 0)</div><div class='del'>-		goto out_detach;</div><div class='del'>-</div><div class='del'>-	if (!pnp_port_valid(pdev, 0) || !pnp_port_valid(pdev, 1))</div><div class='del'>-		goto out_disable;</div><div class='del'>-	if (!pnp_irq_valid(pdev, 0))</div><div class='del'>-		goto out_disable;</div><div class='del'>-</div><div class='del'>-	serial_number = pdev-&gt;card-&gt;serial;</div><div class='del'>-</div><div class='del'>-	ioaddr[0] = pnp_port_start(pdev, 0);</div><div class='del'>-	ioaddr[1] = pnp_port_start(pdev, 0);</div><div class='del'>-</div><div class='del'>-	irq = pnp_irq(pdev, 0);</div><div class='del'>-</div><div class='del'>-	if (!request_region(ioaddr[0], 16, "sb1000"))</div><div class='del'>-		goto out_disable;</div><div class='del'>-	if (!request_region(ioaddr[1], 16, "sb1000"))</div><div class='del'>-		goto out_release_region0;</div><div class='del'>-</div><div class='del'>-	dev = alloc_etherdev(sizeof(struct sb1000_private));</div><div class='del'>-	if (!dev) {</div><div class='del'>-		error = -ENOMEM;</div><div class='del'>-		goto out_release_regions;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr = ioaddr[0];</div><div class='del'>-	/* mem_start holds the second I/O address */</div><div class='del'>-	dev-&gt;mem_start = ioaddr[1];</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-</div><div class='del'>-	if (sb1000_debug &gt; 0)</div><div class='del'>-		printk(KERN_NOTICE "%s: sb1000 at (%#3.3lx,%#3.3lx), "</div><div class='del'>-			"S/N %#8.8x, IRQ %d.\n", dev-&gt;name, dev-&gt;base_addr,</div><div class='del'>-			dev-&gt;mem_start, serial_number, dev-&gt;irq);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The SB1000 is an rx-only cable modem device.  The uplink is a modem</div><div class='del'>-	 * and we do not want to arp on it.</div><div class='del'>-	 */</div><div class='del'>-	dev-&gt;flags = IFF_POINTOPOINT|IFF_NOARP;</div><div class='del'>-</div><div class='del'>-	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	if (sb1000_debug &gt; 0)</div><div class='del'>-		printk(KERN_NOTICE "%s", version);</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops	= &amp;sb1000_netdev_ops;</div><div class='del'>-</div><div class='del'>-	/* hardware address is 0:0:serial_number */</div><div class='del'>-	addr[0] = 0;</div><div class='del'>-	addr[1] = 0;</div><div class='del'>-	addr[2]	= serial_number &gt;&gt; 24 &amp; 0xff;</div><div class='del'>-	addr[3]	= serial_number &gt;&gt; 16 &amp; 0xff;</div><div class='del'>-	addr[4]	= serial_number &gt;&gt;  8 &amp; 0xff;</div><div class='del'>-	addr[5]	= serial_number &gt;&gt;  0 &amp; 0xff;</div><div class='del'>-	eth_hw_addr_set(dev, addr);</div><div class='del'>-</div><div class='del'>-	pnp_set_drvdata(pdev, dev);</div><div class='del'>-</div><div class='del'>-	error = register_netdev(dev);</div><div class='del'>-	if (error)</div><div class='del'>-		goto out_free_netdev;</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>- out_free_netdev:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>- out_release_regions:</div><div class='del'>-	release_region(ioaddr[1], 16);</div><div class='del'>- out_release_region0:</div><div class='del'>-	release_region(ioaddr[0], 16);</div><div class='del'>- out_disable:</div><div class='del'>-	pnp_disable_dev(pdev);</div><div class='del'>- out_detach:</div><div class='del'>-	pnp_device_detach(pdev);</div><div class='del'>-	return error;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-sb1000_remove_one(struct pnp_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = pnp_get_drvdata(pdev);</div><div class='del'>-</div><div class='del'>-	unregister_netdev(dev);</div><div class='del'>-	release_region(dev-&gt;base_addr, 16);</div><div class='del'>-	release_region(dev-&gt;mem_start, 16);</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pnp_driver sb1000_driver = {</div><div class='del'>-	.name		= "sb1000",</div><div class='del'>-	.id_table	= sb1000_pnp_ids,</div><div class='del'>-	.probe		= sb1000_probe_one,</div><div class='del'>-	.remove		= sb1000_remove_one,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SB1000 hardware routines to be used during open/configuration phases</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static const int TimeOutJiffies = (875 * HZ) / 100;</div><div class='del'>-</div><div class='del'>-/* Card Wait For Busy Clear (cannot be used during an interrupt) */</div><div class='del'>-static int</div><div class='del'>-card_wait_for_busy_clear(const int ioaddr[], const char* name)</div><div class='del'>-{</div><div class='del'>-	unsigned char a;</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-</div><div class='del'>-	a = inb(ioaddr[0] + 7);</div><div class='del'>-	timeout = jiffies + TimeOutJiffies;</div><div class='del'>-	while (a &amp; 0x80 || a &amp; 0x40) {</div><div class='del'>-		/* a little sleep */</div><div class='del'>-		yield();</div><div class='del'>-</div><div class='del'>-		a = inb(ioaddr[0] + 7);</div><div class='del'>-		if (time_after_eq(jiffies, timeout)) {</div><div class='del'>-			printk(KERN_WARNING "%s: card_wait_for_busy_clear timeout\n",</div><div class='del'>-				name);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Card Wait For Ready (cannot be used during an interrupt) */</div><div class='del'>-static int</div><div class='del'>-card_wait_for_ready(const int ioaddr[], const char* name, unsigned char in[])</div><div class='del'>-{</div><div class='del'>-	unsigned char a;</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-</div><div class='del'>-	a = inb(ioaddr[1] + 6);</div><div class='del'>-	timeout = jiffies + TimeOutJiffies;</div><div class='del'>-	while (a &amp; 0x80 || !(a &amp; 0x40)) {</div><div class='del'>-		/* a little sleep */</div><div class='del'>-		yield();</div><div class='del'>-</div><div class='del'>-		a = inb(ioaddr[1] + 6);</div><div class='del'>-		if (time_after_eq(jiffies, timeout)) {</div><div class='del'>-			printk(KERN_WARNING "%s: card_wait_for_ready timeout\n",</div><div class='del'>-				name);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	in[1] = inb(ioaddr[0] + 1);</div><div class='del'>-	in[2] = inb(ioaddr[0] + 2);</div><div class='del'>-	in[3] = inb(ioaddr[0] + 3);</div><div class='del'>-	in[4] = inb(ioaddr[0] + 4);</div><div class='del'>-	in[0] = inb(ioaddr[0] + 5);</div><div class='del'>-	in[6] = inb(ioaddr[0] + 6);</div><div class='del'>-	in[5] = inb(ioaddr[1] + 6);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Card Send Command (cannot be used during an interrupt) */</div><div class='del'>-static int</div><div class='del'>-card_send_command(const int ioaddr[], const char* name,</div><div class='del'>-	const unsigned char out[], unsigned char in[])</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	if ((status = card_wait_for_busy_clear(ioaddr, name)))</div><div class='del'>-		return status;</div><div class='del'>-	outb(0xa0, ioaddr[0] + 6);</div><div class='del'>-	outb(out[2], ioaddr[0] + 1);</div><div class='del'>-	outb(out[3], ioaddr[0] + 2);</div><div class='del'>-	outb(out[4], ioaddr[0] + 3);</div><div class='del'>-	outb(out[5], ioaddr[0] + 4);</div><div class='del'>-	outb(out[1], ioaddr[0] + 5);</div><div class='del'>-	outb(0xa0, ioaddr[0] + 6);</div><div class='del'>-	outb(out[0], ioaddr[0] + 7);</div><div class='del'>-	if (out[0] != 0x20 &amp;&amp; out[0] != 0x30) {</div><div class='del'>-		if ((status = card_wait_for_ready(ioaddr, name, in)))</div><div class='del'>-			return status;</div><div class='del'>-		inb(ioaddr[0] + 7);</div><div class='del'>-		if (sb1000_debug &gt; 3)</div><div class='del'>-			printk(KERN_DEBUG "%s: card_send_command "</div><div class='del'>-				"out: %02x%02x%02x%02x%02x%02x  "</div><div class='del'>-				"in: %02x%02x%02x%02x%02x%02x%02x\n", name,</div><div class='del'>-				out[0], out[1], out[2], out[3], out[4], out[5],</div><div class='del'>-				in[0], in[1], in[2], in[3], in[4], in[5], in[6]);</div><div class='del'>-	} else {</div><div class='del'>-		if (sb1000_debug &gt; 3)</div><div class='del'>-			printk(KERN_DEBUG "%s: card_send_command "</div><div class='del'>-				"out: %02x%02x%02x%02x%02x%02x\n", name,</div><div class='del'>-				out[0], out[1], out[2], out[3], out[4], out[5]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (out[1] != 0x1b) {</div><div class='del'>-		if (out[0] &gt;= 0x80 &amp;&amp; in[0] != (out[1] | 0x80))</div><div class='del'>-			return -EIO;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SB1000 hardware routines to be used during frame rx interrupt</div><div class='del'>- */</div><div class='del'>-static const int Sb1000TimeOutJiffies = 7 * HZ;</div><div class='del'>-</div><div class='del'>-/* Card Wait For Ready (to be used during frame rx) */</div><div class='del'>-static int</div><div class='del'>-sb1000_wait_for_ready(const int ioaddr[], const char* name)</div><div class='del'>-{</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-</div><div class='del'>-	timeout = jiffies + Sb1000TimeOutJiffies;</div><div class='del'>-	while (inb(ioaddr[1] + 6) &amp; 0x80) {</div><div class='del'>-		if (time_after_eq(jiffies, timeout)) {</div><div class='del'>-			printk(KERN_WARNING "%s: sb1000_wait_for_ready timeout\n",</div><div class='del'>-				name);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	timeout = jiffies + Sb1000TimeOutJiffies;</div><div class='del'>-	while (!(inb(ioaddr[1] + 6) &amp; 0x40)) {</div><div class='del'>-		if (time_after_eq(jiffies, timeout)) {</div><div class='del'>-			printk(KERN_WARNING "%s: sb1000_wait_for_ready timeout\n",</div><div class='del'>-				name);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	inb(ioaddr[0] + 7);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Card Wait For Ready Clear (to be used during frame rx) */</div><div class='del'>-static int</div><div class='del'>-sb1000_wait_for_ready_clear(const int ioaddr[], const char* name)</div><div class='del'>-{</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-</div><div class='del'>-	timeout = jiffies + Sb1000TimeOutJiffies;</div><div class='del'>-	while (inb(ioaddr[1] + 6) &amp; 0x80) {</div><div class='del'>-		if (time_after_eq(jiffies, timeout)) {</div><div class='del'>-			printk(KERN_WARNING "%s: sb1000_wait_for_ready_clear timeout\n",</div><div class='del'>-				name);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	timeout = jiffies + Sb1000TimeOutJiffies;</div><div class='del'>-	while (inb(ioaddr[1] + 6) &amp; 0x40) {</div><div class='del'>-		if (time_after_eq(jiffies, timeout)) {</div><div class='del'>-			printk(KERN_WARNING "%s: sb1000_wait_for_ready_clear timeout\n",</div><div class='del'>-				name);</div><div class='del'>-			return -ETIME;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Card Send Command (to be used during frame rx) */</div><div class='del'>-static void</div><div class='del'>-sb1000_send_command(const int ioaddr[], const char* name,</div><div class='del'>-	const unsigned char out[])</div><div class='del'>-{</div><div class='del'>-	outb(out[2], ioaddr[0] + 1);</div><div class='del'>-	outb(out[3], ioaddr[0] + 2);</div><div class='del'>-	outb(out[4], ioaddr[0] + 3);</div><div class='del'>-	outb(out[5], ioaddr[0] + 4);</div><div class='del'>-	outb(out[1], ioaddr[0] + 5);</div><div class='del'>-	outb(out[0], ioaddr[0] + 7);</div><div class='del'>-	if (sb1000_debug &gt; 3)</div><div class='del'>-		printk(KERN_DEBUG "%s: sb1000_send_command out: %02x%02x%02x%02x"</div><div class='del'>-			"%02x%02x\n", name, out[0], out[1], out[2], out[3], out[4], out[5]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Card Read Status (to be used during frame rx) */</div><div class='del'>-static void</div><div class='del'>-sb1000_read_status(const int ioaddr[], unsigned char in[])</div><div class='del'>-{</div><div class='del'>-	in[1] = inb(ioaddr[0] + 1);</div><div class='del'>-	in[2] = inb(ioaddr[0] + 2);</div><div class='del'>-	in[3] = inb(ioaddr[0] + 3);</div><div class='del'>-	in[4] = inb(ioaddr[0] + 4);</div><div class='del'>-	in[0] = inb(ioaddr[0] + 5);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Issue Read Command (to be used during frame rx) */</div><div class='del'>-static void</div><div class='del'>-sb1000_issue_read_command(const int ioaddr[], const char* name)</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x20, 0x00, 0x00, 0x01, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	sb1000_wait_for_ready_clear(ioaddr, name);</div><div class='del'>-	outb(0xa0, ioaddr[0] + 6);</div><div class='del'>-	sb1000_send_command(ioaddr, name, Command0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SB1000 commands for open/configuration</div><div class='del'>- */</div><div class='del'>-/* reset SB1000 card */</div><div class='del'>-static int</div><div class='del'>-sb1000_reset(const int ioaddr[], const char* name)</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x80, 0x16, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	unsigned char st[7];</div><div class='del'>-	int port, status;</div><div class='del'>-</div><div class='del'>-	port = ioaddr[1] + 6;</div><div class='del'>-	outb(0x4, port);</div><div class='del'>-	inb(port);</div><div class='del'>-	udelay(1000);</div><div class='del'>-	outb(0x0, port);</div><div class='del'>-	inb(port);</div><div class='del'>-	ssleep(1);</div><div class='del'>-	outb(0x4, port);</div><div class='del'>-	inb(port);</div><div class='del'>-	udelay(1000);</div><div class='del'>-	outb(0x0, port);</div><div class='del'>-	inb(port);</div><div class='del'>-	udelay(0);</div><div class='del'>-</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command0, st)))</div><div class='del'>-		return status;</div><div class='del'>-	if (st[3] != 0xf0)</div><div class='del'>-		return -EIO;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* check SB1000 firmware CRC */</div><div class='del'>-static int</div><div class='del'>-sb1000_check_CRC(const int ioaddr[], const char* name)</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x80, 0x1f, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	unsigned char st[7];</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	/* check CRC */</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command0, st)))</div><div class='del'>-		return status;</div><div class='del'>-	if (st[1] != st[3] || st[2] != st[4])</div><div class='del'>-		return -EIO;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int</div><div class='del'>-sb1000_start_get_set_command(const int ioaddr[], const char* name)</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x80, 0x1b, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	unsigned char st[7];</div><div class='del'>-</div><div class='del'>-	return card_send_command(ioaddr, name, Command0, st);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-sb1000_end_get_set_command(const int ioaddr[], const char* name)</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x80, 0x1b, 0x02, 0x00, 0x00, 0x00};</div><div class='del'>-	static const unsigned char Command1[6] = {0x20, 0x00, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	unsigned char st[7];</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command0, st)))</div><div class='del'>-		return status;</div><div class='del'>-	return card_send_command(ioaddr, name, Command1, st);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-sb1000_activate(const int ioaddr[], const char* name)</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x80, 0x11, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-	static const unsigned char Command1[6] = {0x80, 0x16, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	unsigned char st[7];</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	ssleep(1);</div><div class='del'>-	status = card_send_command(ioaddr, name, Command0, st);</div><div class='del'>-	if (status)</div><div class='del'>-		return status;</div><div class='del'>-	status = card_send_command(ioaddr, name, Command1, st);</div><div class='del'>-	if (status)</div><div class='del'>-		return status;</div><div class='del'>-	if (st[3] != 0xf1) {</div><div class='del'>-		status = sb1000_start_get_set_command(ioaddr, name);</div><div class='del'>-		if (status)</div><div class='del'>-			return status;</div><div class='del'>-		return -EIO;</div><div class='del'>-	}</div><div class='del'>-	udelay(1000);</div><div class='del'>-	return sb1000_start_get_set_command(ioaddr, name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* get SB1000 firmware version */</div><div class='del'>-static int</div><div class='del'>-sb1000_get_firmware_version(const int ioaddr[], const char* name,</div><div class='del'>-	unsigned char version[], int do_end)</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x80, 0x23, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	unsigned char st[7];</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	if ((status = sb1000_start_get_set_command(ioaddr, name)))</div><div class='del'>-		return status;</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command0, st)))</div><div class='del'>-		return status;</div><div class='del'>-	if (st[0] != 0xa3)</div><div class='del'>-		return -EIO;</div><div class='del'>-	version[0] = st[1];</div><div class='del'>-	version[1] = st[2];</div><div class='del'>-	if (do_end)</div><div class='del'>-		return sb1000_end_get_set_command(ioaddr, name);</div><div class='del'>-	else</div><div class='del'>-		return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* get SB1000 frequency */</div><div class='del'>-static int</div><div class='del'>-sb1000_get_frequency(const int ioaddr[], const char* name, int* frequency)</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x80, 0x44, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	unsigned char st[7];</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	udelay(1000);</div><div class='del'>-	if ((status = sb1000_start_get_set_command(ioaddr, name)))</div><div class='del'>-		return status;</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command0, st)))</div><div class='del'>-		return status;</div><div class='del'>-	*frequency = ((st[1] &lt;&lt; 8 | st[2]) &lt;&lt; 8 | st[3]) &lt;&lt; 8 | st[4];</div><div class='del'>-	return sb1000_end_get_set_command(ioaddr, name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* set SB1000 frequency */</div><div class='del'>-static int</div><div class='del'>-sb1000_set_frequency(const int ioaddr[], const char* name, int frequency)</div><div class='del'>-{</div><div class='del'>-	unsigned char st[7];</div><div class='del'>-	int status;</div><div class='del'>-	unsigned char Command0[6] = {0x80, 0x29, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	const int FrequencyLowerLimit = 57000;</div><div class='del'>-	const int FrequencyUpperLimit = 804000;</div><div class='del'>-</div><div class='del'>-	if (frequency &lt; FrequencyLowerLimit || frequency &gt; FrequencyUpperLimit) {</div><div class='del'>-		printk(KERN_ERR "%s: frequency chosen (%d kHz) is not in the range "</div><div class='del'>-			"[%d,%d] kHz\n", name, frequency, FrequencyLowerLimit,</div><div class='del'>-			FrequencyUpperLimit);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	udelay(1000);</div><div class='del'>-	if ((status = sb1000_start_get_set_command(ioaddr, name)))</div><div class='del'>-		return status;</div><div class='del'>-	Command0[5] = frequency &amp; 0xff;</div><div class='del'>-	frequency &gt;&gt;= 8;</div><div class='del'>-	Command0[4] = frequency &amp; 0xff;</div><div class='del'>-	frequency &gt;&gt;= 8;</div><div class='del'>-	Command0[3] = frequency &amp; 0xff;</div><div class='del'>-	frequency &gt;&gt;= 8;</div><div class='del'>-	Command0[2] = frequency &amp; 0xff;</div><div class='del'>-	return card_send_command(ioaddr, name, Command0, st);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* get SB1000 PIDs */</div><div class='del'>-static int</div><div class='del'>-sb1000_get_PIDs(const int ioaddr[], const char* name, short PID[])</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x80, 0x40, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-	static const unsigned char Command1[6] = {0x80, 0x41, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-	static const unsigned char Command2[6] = {0x80, 0x42, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-	static const unsigned char Command3[6] = {0x80, 0x43, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	unsigned char st[7];</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	udelay(1000);</div><div class='del'>-	if ((status = sb1000_start_get_set_command(ioaddr, name)))</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command0, st)))</div><div class='del'>-		return status;</div><div class='del'>-	PID[0] = st[1] &lt;&lt; 8 | st[2];</div><div class='del'>-</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command1, st)))</div><div class='del'>-		return status;</div><div class='del'>-	PID[1] = st[1] &lt;&lt; 8 | st[2];</div><div class='del'>-</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command2, st)))</div><div class='del'>-		return status;</div><div class='del'>-	PID[2] = st[1] &lt;&lt; 8 | st[2];</div><div class='del'>-</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command3, st)))</div><div class='del'>-		return status;</div><div class='del'>-	PID[3] = st[1] &lt;&lt; 8 | st[2];</div><div class='del'>-</div><div class='del'>-	return sb1000_end_get_set_command(ioaddr, name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* set SB1000 PIDs */</div><div class='del'>-static int</div><div class='del'>-sb1000_set_PIDs(const int ioaddr[], const char* name, const short PID[])</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command4[6] = {0x80, 0x2e, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	unsigned char st[7];</div><div class='del'>-	short p;</div><div class='del'>-	int status;</div><div class='del'>-	unsigned char Command0[6] = {0x80, 0x31, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-	unsigned char Command1[6] = {0x80, 0x32, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-	unsigned char Command2[6] = {0x80, 0x33, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-	unsigned char Command3[6] = {0x80, 0x34, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	udelay(1000);</div><div class='del'>-	if ((status = sb1000_start_get_set_command(ioaddr, name)))</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='del'>-	p = PID[0];</div><div class='del'>-	Command0[3] = p &amp; 0xff;</div><div class='del'>-	p &gt;&gt;= 8;</div><div class='del'>-	Command0[2] = p &amp; 0xff;</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command0, st)))</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='del'>-	p = PID[1];</div><div class='del'>-	Command1[3] = p &amp; 0xff;</div><div class='del'>-	p &gt;&gt;= 8;</div><div class='del'>-	Command1[2] = p &amp; 0xff;</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command1, st)))</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='del'>-	p = PID[2];</div><div class='del'>-	Command2[3] = p &amp; 0xff;</div><div class='del'>-	p &gt;&gt;= 8;</div><div class='del'>-	Command2[2] = p &amp; 0xff;</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command2, st)))</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='del'>-	p = PID[3];</div><div class='del'>-	Command3[3] = p &amp; 0xff;</div><div class='del'>-	p &gt;&gt;= 8;</div><div class='del'>-	Command3[2] = p &amp; 0xff;</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command3, st)))</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='del'>-	if ((status = card_send_command(ioaddr, name, Command4, st)))</div><div class='del'>-		return status;</div><div class='del'>-	return sb1000_end_get_set_command(ioaddr, name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-sb1000_print_status_buffer(const char* name, unsigned char st[],</div><div class='del'>-	unsigned char buffer[], int size)</div><div class='del'>-{</div><div class='del'>-	int i, j, k;</div><div class='del'>-</div><div class='del'>-	printk(KERN_DEBUG "%s: status: %02x %02x\n", name, st[0], st[1]);</div><div class='del'>-	if (buffer[24] == 0x08 &amp;&amp; buffer[25] == 0x00 &amp;&amp; buffer[26] == 0x45) {</div><div class='del'>-		printk(KERN_DEBUG "%s: length: %d protocol: %d from: %d.%d.%d.%d:%d "</div><div class='del'>-			"to %d.%d.%d.%d:%d\n", name, buffer[28] &lt;&lt; 8 | buffer[29],</div><div class='del'>-			buffer[35], buffer[38], buffer[39], buffer[40], buffer[41],</div><div class='del'>-            buffer[46] &lt;&lt; 8 | buffer[47],</div><div class='del'>-			buffer[42], buffer[43], buffer[44], buffer[45],</div><div class='del'>-            buffer[48] &lt;&lt; 8 | buffer[49]);</div><div class='del'>-	} else {</div><div class='del'>-		for (i = 0, k = 0; i &lt; (size + 7) / 8; i++) {</div><div class='del'>-			printk(KERN_DEBUG "%s: %s", name, i ? "       " : "buffer:");</div><div class='del'>-			for (j = 0; j &lt; 8 &amp;&amp; k &lt; size; j++, k++)</div><div class='del'>-				printk(" %02x", buffer[k]);</div><div class='del'>-			printk("\n");</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SB1000 commands for frame rx interrupt</div><div class='del'>- */</div><div class='del'>-/* receive a single frame and assemble datagram</div><div class='del'>- * (this is the heart of the interrupt routine)</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-sb1000_rx(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-#define FRAMESIZE 184</div><div class='del'>-	unsigned char st[2], buffer[FRAMESIZE], session_id, frame_id;</div><div class='del'>-	short dlen;</div><div class='del'>-	int ioaddr, ns;</div><div class='del'>-	unsigned int skbsize;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct sb1000_private *lp = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-</div><div class='del'>-	/* SB1000 frame constants */</div><div class='del'>-	const int FrameSize = FRAMESIZE;</div><div class='del'>-	const int NewDatagramHeaderSkip = 8;</div><div class='del'>-	const int NewDatagramHeaderSize = NewDatagramHeaderSkip + 18;</div><div class='del'>-	const int NewDatagramDataSize = FrameSize - NewDatagramHeaderSize;</div><div class='del'>-	const int ContDatagramHeaderSkip = 7;</div><div class='del'>-	const int ContDatagramHeaderSize = ContDatagramHeaderSkip + 1;</div><div class='del'>-	const int ContDatagramDataSize = FrameSize - ContDatagramHeaderSize;</div><div class='del'>-	const int TrailerSize = 4;</div><div class='del'>-</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	insw(ioaddr, (unsigned short*) st, 1);</div><div class='del'>-#ifdef XXXDEBUG</div><div class='del'>-printk("cm0: received: %02x %02x\n", st[0], st[1]);</div><div class='del'>-#endif /* XXXDEBUG */</div><div class='del'>-	lp-&gt;rx_frames++;</div><div class='del'>-</div><div class='del'>-	/* decide if it is a good or bad frame */</div><div class='del'>-	for (ns = 0; ns &lt; NPIDS; ns++) {</div><div class='del'>-		session_id = lp-&gt;rx_session_id[ns];</div><div class='del'>-		frame_id = lp-&gt;rx_frame_id[ns];</div><div class='del'>-		if (st[0] == session_id) {</div><div class='del'>-			if (st[1] == frame_id || (!frame_id &amp;&amp; (st[1] &amp; 0xf0) == 0x30)) {</div><div class='del'>-				goto good_frame;</div><div class='del'>-			} else if ((st[1] &amp; 0xf0) == 0x30 &amp;&amp; (st[0] &amp; 0x40)) {</div><div class='del'>-				goto skipped_frame;</div><div class='del'>-			} else {</div><div class='del'>-				goto bad_frame;</div><div class='del'>-			}</div><div class='del'>-		} else if (st[0] == (session_id | 0x40)) {</div><div class='del'>-			if ((st[1] &amp; 0xf0) == 0x30) {</div><div class='del'>-				goto skipped_frame;</div><div class='del'>-			} else {</div><div class='del'>-				goto bad_frame;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	goto bad_frame;</div><div class='del'>-</div><div class='del'>-skipped_frame:</div><div class='del'>-	stats-&gt;rx_frame_errors++;</div><div class='del'>-	skb = lp-&gt;rx_skb[ns];</div><div class='del'>-	if (sb1000_debug &gt; 1)</div><div class='del'>-		printk(KERN_WARNING "%s: missing frame(s): got %02x %02x "</div><div class='del'>-			"expecting %02x %02x\n", dev-&gt;name, st[0], st[1],</div><div class='del'>-			skb ? session_id : session_id | 0x40, frame_id);</div><div class='del'>-	if (skb) {</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-		skb = NULL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-good_frame:</div><div class='del'>-	lp-&gt;rx_frame_id[ns] = 0x30 | ((st[1] + 1) &amp; 0x0f);</div><div class='del'>-	/* new datagram */</div><div class='del'>-	if (st[0] &amp; 0x40) {</div><div class='del'>-		/* get data length */</div><div class='del'>-		insw(ioaddr, buffer, NewDatagramHeaderSize / 2);</div><div class='del'>-#ifdef XXXDEBUG</div><div class='del'>-printk("cm0: IP identification: %02x%02x  fragment offset: %02x%02x\n", buffer[30], buffer[31], buffer[32], buffer[33]);</div><div class='del'>-#endif /* XXXDEBUG */</div><div class='del'>-		if (buffer[0] != NewDatagramHeaderSkip) {</div><div class='del'>-			if (sb1000_debug &gt; 1)</div><div class='del'>-				printk(KERN_WARNING "%s: new datagram header skip error: "</div><div class='del'>-					"got %02x expecting %02x\n", dev-&gt;name, buffer[0],</div><div class='del'>-					NewDatagramHeaderSkip);</div><div class='del'>-			stats-&gt;rx_length_errors++;</div><div class='del'>-			insw(ioaddr, buffer, NewDatagramDataSize / 2);</div><div class='del'>-			goto bad_frame_next;</div><div class='del'>-		}</div><div class='del'>-		dlen = ((buffer[NewDatagramHeaderSkip + 3] &amp; 0x0f) &lt;&lt; 8 |</div><div class='del'>-			buffer[NewDatagramHeaderSkip + 4]) - 17;</div><div class='del'>-		if (dlen &gt; SB1000_MRU) {</div><div class='del'>-			if (sb1000_debug &gt; 1)</div><div class='del'>-				printk(KERN_WARNING "%s: datagram length (%d) greater "</div><div class='del'>-					"than MRU (%d)\n", dev-&gt;name, dlen, SB1000_MRU);</div><div class='del'>-			stats-&gt;rx_length_errors++;</div><div class='del'>-			insw(ioaddr, buffer, NewDatagramDataSize / 2);</div><div class='del'>-			goto bad_frame_next;</div><div class='del'>-		}</div><div class='del'>-		lp-&gt;rx_dlen[ns] = dlen;</div><div class='del'>-		/* compute size to allocate for datagram */</div><div class='del'>-		skbsize = dlen + FrameSize;</div><div class='del'>-		if ((skb = alloc_skb(skbsize, GFP_ATOMIC)) == NULL) {</div><div class='del'>-			if (sb1000_debug &gt; 1)</div><div class='del'>-				printk(KERN_WARNING "%s: can't allocate %d bytes long "</div><div class='del'>-					"skbuff\n", dev-&gt;name, skbsize);</div><div class='del'>-			stats-&gt;rx_dropped++;</div><div class='del'>-			insw(ioaddr, buffer, NewDatagramDataSize / 2);</div><div class='del'>-			goto dropped_frame;</div><div class='del'>-		}</div><div class='del'>-		skb-&gt;dev = dev;</div><div class='del'>-		skb_reset_mac_header(skb);</div><div class='del'>-		skb-&gt;protocol = (unsigned short) buffer[NewDatagramHeaderSkip + 16];</div><div class='del'>-		insw(ioaddr, skb_put(skb, NewDatagramDataSize),</div><div class='del'>-			NewDatagramDataSize / 2);</div><div class='del'>-		lp-&gt;rx_skb[ns] = skb;</div><div class='del'>-	} else {</div><div class='del'>-		/* continuation of previous datagram */</div><div class='del'>-		insw(ioaddr, buffer, ContDatagramHeaderSize / 2);</div><div class='del'>-		if (buffer[0] != ContDatagramHeaderSkip) {</div><div class='del'>-			if (sb1000_debug &gt; 1)</div><div class='del'>-				printk(KERN_WARNING "%s: cont datagram header skip error: "</div><div class='del'>-					"got %02x expecting %02x\n", dev-&gt;name, buffer[0],</div><div class='del'>-					ContDatagramHeaderSkip);</div><div class='del'>-			stats-&gt;rx_length_errors++;</div><div class='del'>-			insw(ioaddr, buffer, ContDatagramDataSize / 2);</div><div class='del'>-			goto bad_frame_next;</div><div class='del'>-		}</div><div class='del'>-		skb = lp-&gt;rx_skb[ns];</div><div class='del'>-		insw(ioaddr, skb_put(skb, ContDatagramDataSize),</div><div class='del'>-			ContDatagramDataSize / 2);</div><div class='del'>-		dlen = lp-&gt;rx_dlen[ns];</div><div class='del'>-	}</div><div class='del'>-	if (skb-&gt;len &lt; dlen + TrailerSize) {</div><div class='del'>-		lp-&gt;rx_session_id[ns] &amp;= ~0x40;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* datagram completed: send to upper level */</div><div class='del'>-	skb_trim(skb, dlen);</div><div class='del'>-	__netif_rx(skb);</div><div class='del'>-	stats-&gt;rx_bytes+=dlen;</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	lp-&gt;rx_skb[ns] = NULL;</div><div class='del'>-	lp-&gt;rx_session_id[ns] |= 0x40;</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-bad_frame:</div><div class='del'>-	insw(ioaddr, buffer, FrameSize / 2);</div><div class='del'>-	if (sb1000_debug &gt; 1)</div><div class='del'>-		printk(KERN_WARNING "%s: frame error: got %02x %02x\n",</div><div class='del'>-			dev-&gt;name, st[0], st[1]);</div><div class='del'>-	stats-&gt;rx_frame_errors++;</div><div class='del'>-bad_frame_next:</div><div class='del'>-	if (sb1000_debug &gt; 2)</div><div class='del'>-		sb1000_print_status_buffer(dev-&gt;name, st, buffer, FrameSize);</div><div class='del'>-dropped_frame:</div><div class='del'>-	stats-&gt;rx_errors++;</div><div class='del'>-	if (ns &lt; NPIDS) {</div><div class='del'>-		if ((skb = lp-&gt;rx_skb[ns])) {</div><div class='del'>-			dev_kfree_skb(skb);</div><div class='del'>-			lp-&gt;rx_skb[ns] = NULL;</div><div class='del'>-		}</div><div class='del'>-		lp-&gt;rx_session_id[ns] |= 0x40;</div><div class='del'>-	}</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-sb1000_error_dpc(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x80, 0x26, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	char *name;</div><div class='del'>-	unsigned char st[5];</div><div class='del'>-	int ioaddr[2];</div><div class='del'>-	struct sb1000_private *lp = netdev_priv(dev);</div><div class='del'>-	const int ErrorDpcCounterInitialize = 200;</div><div class='del'>-</div><div class='del'>-	ioaddr[0] = dev-&gt;base_addr;</div><div class='del'>-	/* mem_start holds the second I/O address */</div><div class='del'>-	ioaddr[1] = dev-&gt;mem_start;</div><div class='del'>-	name = dev-&gt;name;</div><div class='del'>-</div><div class='del'>-	sb1000_wait_for_ready_clear(ioaddr, name);</div><div class='del'>-	sb1000_send_command(ioaddr, name, Command0);</div><div class='del'>-	sb1000_wait_for_ready(ioaddr, name);</div><div class='del'>-	sb1000_read_status(ioaddr, st);</div><div class='del'>-	if (st[1] &amp; 0x10)</div><div class='del'>-		lp-&gt;rx_error_dpc_count = ErrorDpcCounterInitialize;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Linux interface functions</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-sb1000_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	char *name;</div><div class='del'>-	int ioaddr[2], status;</div><div class='del'>-	struct sb1000_private *lp = netdev_priv(dev);</div><div class='del'>-	const unsigned short FirmwareVersion[] = {0x01, 0x01};</div><div class='del'>-</div><div class='del'>-	ioaddr[0] = dev-&gt;base_addr;</div><div class='del'>-	/* mem_start holds the second I/O address */</div><div class='del'>-	ioaddr[1] = dev-&gt;mem_start;</div><div class='del'>-	name = dev-&gt;name;</div><div class='del'>-</div><div class='del'>-	/* initialize sb1000 */</div><div class='del'>-	if ((status = sb1000_reset(ioaddr, name)))</div><div class='del'>-		return status;</div><div class='del'>-	ssleep(1);</div><div class='del'>-	if ((status = sb1000_check_CRC(ioaddr, name)))</div><div class='del'>-		return status;</div><div class='del'>-</div><div class='del'>-	/* initialize private data before board can catch interrupts */</div><div class='del'>-	lp-&gt;rx_skb[0] = NULL;</div><div class='del'>-	lp-&gt;rx_skb[1] = NULL;</div><div class='del'>-	lp-&gt;rx_skb[2] = NULL;</div><div class='del'>-	lp-&gt;rx_skb[3] = NULL;</div><div class='del'>-	lp-&gt;rx_dlen[0] = 0;</div><div class='del'>-	lp-&gt;rx_dlen[1] = 0;</div><div class='del'>-	lp-&gt;rx_dlen[2] = 0;</div><div class='del'>-	lp-&gt;rx_dlen[3] = 0;</div><div class='del'>-	lp-&gt;rx_frames = 0;</div><div class='del'>-	lp-&gt;rx_error_count = 0;</div><div class='del'>-	lp-&gt;rx_error_dpc_count = 0;</div><div class='del'>-	lp-&gt;rx_session_id[0] = 0x50;</div><div class='del'>-	lp-&gt;rx_session_id[1] = 0x48;</div><div class='del'>-	lp-&gt;rx_session_id[2] = 0x44;</div><div class='del'>-	lp-&gt;rx_session_id[3] = 0x42;</div><div class='del'>-	lp-&gt;rx_frame_id[0] = 0;</div><div class='del'>-	lp-&gt;rx_frame_id[1] = 0;</div><div class='del'>-	lp-&gt;rx_frame_id[2] = 0;</div><div class='del'>-	lp-&gt;rx_frame_id[3] = 0;</div><div class='del'>-	if (request_irq(dev-&gt;irq, sb1000_interrupt, 0, "sb1000", dev)) {</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (sb1000_debug &gt; 2)</div><div class='del'>-		printk(KERN_DEBUG "%s: Opening, IRQ %d\n", name, dev-&gt;irq);</div><div class='del'>-</div><div class='del'>-	/* Activate board and check firmware version */</div><div class='del'>-	udelay(1000);</div><div class='del'>-	if ((status = sb1000_activate(ioaddr, name)))</div><div class='del'>-		return status;</div><div class='del'>-	udelay(0);</div><div class='del'>-	if ((status = sb1000_get_firmware_version(ioaddr, name, version, 0)))</div><div class='del'>-		return status;</div><div class='del'>-	if (version[0] != FirmwareVersion[0] || version[1] != FirmwareVersion[1])</div><div class='del'>-		printk(KERN_WARNING "%s: found firmware version %x.%02x "</div><div class='del'>-			"(should be %x.%02x)\n", name, version[0], version[1],</div><div class='del'>-			FirmwareVersion[0], FirmwareVersion[1]);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-	return 0;					/* Always succeed */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sb1000_siocdevprivate(struct net_device *dev, struct ifreq *ifr,</div><div class='del'>-				 void __user *data, int cmd)</div><div class='del'>-{</div><div class='del'>-	char* name;</div><div class='del'>-	unsigned char version[2];</div><div class='del'>-	short PID[4];</div><div class='del'>-	int ioaddr[2], status, frequency;</div><div class='del'>-	unsigned int stats[5];</div><div class='del'>-	struct sb1000_private *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (!(dev &amp;&amp; dev-&gt;flags &amp; IFF_UP))</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	ioaddr[0] = dev-&gt;base_addr;</div><div class='del'>-	/* mem_start holds the second I/O address */</div><div class='del'>-	ioaddr[1] = dev-&gt;mem_start;</div><div class='del'>-	name = dev-&gt;name;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGCMSTATS:		/* get statistics */</div><div class='del'>-		stats[0] = dev-&gt;stats.rx_bytes;</div><div class='del'>-		stats[1] = lp-&gt;rx_frames;</div><div class='del'>-		stats[2] = dev-&gt;stats.rx_packets;</div><div class='del'>-		stats[3] = dev-&gt;stats.rx_errors;</div><div class='del'>-		stats[4] = dev-&gt;stats.rx_dropped;</div><div class='del'>-		if (copy_to_user(data, stats, sizeof(stats)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		status = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SIOCGCMFIRMWARE:		/* get firmware version */</div><div class='del'>-		if ((status = sb1000_get_firmware_version(ioaddr, name, version, 1)))</div><div class='del'>-			return status;</div><div class='del'>-		if (copy_to_user(data, version, sizeof(version)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SIOCGCMFREQUENCY:		/* get frequency */</div><div class='del'>-		if ((status = sb1000_get_frequency(ioaddr, name, &amp;frequency)))</div><div class='del'>-			return status;</div><div class='del'>-		if (put_user(frequency, (int __user *)data))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SIOCSCMFREQUENCY:		/* set frequency */</div><div class='del'>-		if (!capable(CAP_NET_ADMIN))</div><div class='del'>-			return -EPERM;</div><div class='del'>-		if (get_user(frequency, (int __user *)data))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		if ((status = sb1000_set_frequency(ioaddr, name, frequency)))</div><div class='del'>-			return status;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SIOCGCMPIDS:			/* get PIDs */</div><div class='del'>-		if ((status = sb1000_get_PIDs(ioaddr, name, PID)))</div><div class='del'>-			return status;</div><div class='del'>-		if (copy_to_user(data, PID, sizeof(PID)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SIOCSCMPIDS:			/* set PIDs */</div><div class='del'>-		if (!capable(CAP_NET_ADMIN))</div><div class='del'>-			return -EPERM;</div><div class='del'>-		if (copy_from_user(PID, data, sizeof(PID)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		if ((status = sb1000_set_PIDs(ioaddr, name, PID)))</div><div class='del'>-			return status;</div><div class='del'>-		/* set session_id, frame_id and pkt_type too */</div><div class='del'>-		lp-&gt;rx_session_id[0] = 0x50 | (PID[0] &amp; 0x0f);</div><div class='del'>-		lp-&gt;rx_session_id[1] = 0x48;</div><div class='del'>-		lp-&gt;rx_session_id[2] = 0x44;</div><div class='del'>-		lp-&gt;rx_session_id[3] = 0x42;</div><div class='del'>-		lp-&gt;rx_frame_id[0] = 0;</div><div class='del'>-		lp-&gt;rx_frame_id[1] = 0;</div><div class='del'>-		lp-&gt;rx_frame_id[2] = 0;</div><div class='del'>-		lp-&gt;rx_frame_id[3] = 0;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		status = -EINVAL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* transmit function: do nothing since SB1000 can't send anything out */</div><div class='del'>-static netdev_tx_t</div><div class='del'>-sb1000_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	printk(KERN_WARNING "%s: trying to transmit!!!\n", dev-&gt;name);</div><div class='del'>-	/* sb1000 can't xmit datagrams */</div><div class='del'>-	dev_kfree_skb(skb);</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* SB1000 interrupt handler. */</div><div class='del'>-static irqreturn_t sb1000_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	static const unsigned char Command0[6] = {0x80, 0x2c, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-	static const unsigned char Command1[6] = {0x80, 0x2e, 0x00, 0x00, 0x00, 0x00};</div><div class='del'>-</div><div class='del'>-	char *name;</div><div class='del'>-	unsigned char st;</div><div class='del'>-	int ioaddr[2];</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='del'>-	struct sb1000_private *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	const int MaxRxErrorCount = 6;</div><div class='del'>-</div><div class='del'>-	ioaddr[0] = dev-&gt;base_addr;</div><div class='del'>-	/* mem_start holds the second I/O address */</div><div class='del'>-	ioaddr[1] = dev-&gt;mem_start;</div><div class='del'>-	name = dev-&gt;name;</div><div class='del'>-</div><div class='del'>-	/* is it a good interrupt? */</div><div class='del'>-	st = inb(ioaddr[1] + 6);</div><div class='del'>-	if (!(st &amp; 0x08 &amp;&amp; st &amp; 0x20)) {</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (sb1000_debug &gt; 3)</div><div class='del'>-		printk(KERN_DEBUG "%s: entering interrupt\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	st = inb(ioaddr[0] + 7);</div><div class='del'>-	if (sb1000_rx(dev))</div><div class='del'>-		lp-&gt;rx_error_count++;</div><div class='del'>-#ifdef SB1000_DELAY</div><div class='del'>-	udelay(SB1000_DELAY);</div><div class='del'>-#endif /* SB1000_DELAY */</div><div class='del'>-	sb1000_issue_read_command(ioaddr, name);</div><div class='del'>-	if (st &amp; 0x01) {</div><div class='del'>-		sb1000_error_dpc(dev);</div><div class='del'>-		sb1000_issue_read_command(ioaddr, name);</div><div class='del'>-	}</div><div class='del'>-	if (lp-&gt;rx_error_dpc_count &amp;&amp; !(--lp-&gt;rx_error_dpc_count)) {</div><div class='del'>-		sb1000_wait_for_ready_clear(ioaddr, name);</div><div class='del'>-		sb1000_send_command(ioaddr, name, Command0);</div><div class='del'>-		sb1000_wait_for_ready(ioaddr, name);</div><div class='del'>-		sb1000_issue_read_command(ioaddr, name);</div><div class='del'>-	}</div><div class='del'>-	if (lp-&gt;rx_error_count &gt;= MaxRxErrorCount) {</div><div class='del'>-		sb1000_wait_for_ready_clear(ioaddr, name);</div><div class='del'>-		sb1000_send_command(ioaddr, name, Command1);</div><div class='del'>-		sb1000_wait_for_ready(ioaddr, name);</div><div class='del'>-		sb1000_issue_read_command(ioaddr, name);</div><div class='del'>-		lp-&gt;rx_error_count = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int sb1000_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int ioaddr[2];</div><div class='del'>-	struct sb1000_private *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (sb1000_debug &gt; 2)</div><div class='del'>-		printk(KERN_DEBUG "%s: Shutting down sb1000.\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	ioaddr[0] = dev-&gt;base_addr;</div><div class='del'>-	/* mem_start holds the second I/O address */</div><div class='del'>-	ioaddr[1] = dev-&gt;mem_start;</div><div class='del'>-</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	/* If we don't do this, we can't re-insmod it later. */</div><div class='del'>-	release_region(ioaddr[1], SB1000_IO_EXTENT);</div><div class='del'>-	release_region(ioaddr[0], SB1000_IO_EXTENT);</div><div class='del'>-</div><div class='del'>-	/* free rx_skb's if needed */</div><div class='del'>-	for (i=0; i&lt;4; i++) {</div><div class='del'>-		if (lp-&gt;rx_skb[i]) {</div><div class='del'>-			dev_kfree_skb(lp-&gt;rx_skb[i]);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Franco Venturi &lt;fventuri@mediaone.net&gt;");</div><div class='del'>-MODULE_DESCRIPTION("General Instruments SB1000 driver");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='del'>-module_pnp_driver(sb1000_driver);</div><div class='head'>diff --git a/drivers/net/slip/slip.c b/drivers/net/slip/slip.c<br/>index fb362ee248ff..c889fb374703 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/slip/slip.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/slip/slip.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/slip/slip.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/slip/slip.c</a></div><div class='hunk'>@@ -899,8 +899,8 @@ static void slip_close(struct tty_struct *tty)</div><div class='ctx'> </div><div class='ctx'> 	/* VSV = very important to remove timers */</div><div class='ctx'> #ifdef CONFIG_SLIP_SMART</div><div class='del'>-	del_timer_sync(&amp;sl-&gt;keepalive_timer);</div><div class='del'>-	del_timer_sync(&amp;sl-&gt;outfill_timer);</div><div class='add'>+	timer_delete_sync(&amp;sl-&gt;keepalive_timer);</div><div class='add'>+	timer_delete_sync(&amp;sl-&gt;outfill_timer);</div><div class='ctx'> #endif</div><div class='ctx'> 	/* Flush network side */</div><div class='ctx'> 	unregister_netdev(sl-&gt;dev);</div><div class='hunk'>@@ -1137,7 +1137,7 @@ static int slip_ioctl(struct tty_struct *tty, unsigned int cmd,</div><div class='ctx'> 					jiffies + sl-&gt;keepalive * HZ);</div><div class='ctx'> 			set_bit(SLF_KEEPTEST, &amp;sl-&gt;flags);</div><div class='ctx'> 		} else</div><div class='del'>-			del_timer(&amp;sl-&gt;keepalive_timer);</div><div class='add'>+			timer_delete(&amp;sl-&gt;keepalive_timer);</div><div class='ctx'> 		spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1162,7 +1162,7 @@ static int slip_ioctl(struct tty_struct *tty, unsigned int cmd,</div><div class='ctx'> 						jiffies + sl-&gt;outfill * HZ);</div><div class='ctx'> 			set_bit(SLF_OUTWAIT, &amp;sl-&gt;flags);</div><div class='ctx'> 		} else</div><div class='del'>-			del_timer(&amp;sl-&gt;outfill_timer);</div><div class='add'>+			timer_delete(&amp;sl-&gt;outfill_timer);</div><div class='ctx'> 		spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1217,7 +1217,7 @@ static int sl_siocdevprivate(struct net_device *dev, struct ifreq *rq,</div><div class='ctx'> 						jiffies + sl-&gt;keepalive * HZ);</div><div class='ctx'> 			set_bit(SLF_KEEPTEST, &amp;sl-&gt;flags);</div><div class='ctx'> 		} else</div><div class='del'>-			del_timer(&amp;sl-&gt;keepalive_timer);</div><div class='add'>+			timer_delete(&amp;sl-&gt;keepalive_timer);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SIOCGKEEPALIVE:</div><div class='hunk'>@@ -1235,7 +1235,7 @@ static int sl_siocdevprivate(struct net_device *dev, struct ifreq *rq,</div><div class='ctx'> 						jiffies + sl-&gt;outfill * HZ);</div><div class='ctx'> 			set_bit(SLF_OUTWAIT, &amp;sl-&gt;flags);</div><div class='ctx'> 		} else</div><div class='del'>-			del_timer(&amp;sl-&gt;outfill_timer);</div><div class='add'>+			timer_delete(&amp;sl-&gt;outfill_timer);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SIOCGOUTFILL:</div><div class='hunk'>@@ -1378,7 +1378,7 @@ module_exit(slip_exit);</div><div class='ctx'> </div><div class='ctx'> static void sl_outfill(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct slip *sl = from_timer(sl, t, outfill_timer);</div><div class='add'>+	struct slip *sl = timer_container_of(sl, t, outfill_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;sl-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1409,7 +1409,7 @@ out:</div><div class='ctx'> </div><div class='ctx'> static void sl_keepalive(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct slip *sl = from_timer(sl, t, keepalive_timer);</div><div class='add'>+	struct slip *sl = timer_container_of(sl, t, keepalive_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;sl-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1421,7 +1421,7 @@ static void sl_keepalive(struct timer_list *t)</div><div class='ctx'> 			/* keepalive still high :(, we must hangup */</div><div class='ctx'> 			if (sl-&gt;outfill)</div><div class='ctx'> 				/* outfill timer must be deleted too */</div><div class='del'>-				(void)del_timer(&amp;sl-&gt;outfill_timer);</div><div class='add'>+				(void) timer_delete(&amp;sl-&gt;outfill_timer);</div><div class='ctx'> 			printk(KERN_DEBUG "%s: no packets received during keepalive timeout, hangup.\n", sl-&gt;dev-&gt;name);</div><div class='ctx'> 			/* this must hangup tty &amp; close slip */</div><div class='ctx'> 			tty_hangup(sl-&gt;tty);</div><div class='head'>diff --git a/drivers/net/sungem_phy.c b/drivers/net/sungem_phy.c<br/>index 55aa8d0c8e1f..c10198d44576 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/sungem_phy.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/sungem_phy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/sungem_phy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/sungem_phy.c</a></div><div class='hunk'>@@ -1165,7 +1165,7 @@ int sungem_phy_probe(struct mii_phy *phy, int mii_id)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* We do not reset the mii_phy structure as the driver</div><div class='del'>-	 * may re-probe the PHY regulary</div><div class='add'>+	 * may re-probe the PHY regularly</div><div class='ctx'> 	 */</div><div class='ctx'> 	phy-&gt;mii_id = mii_id;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/tap.c b/drivers/net/tap.c<br/>index 5aa41d5f7765..1197f245e873 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/tap.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/tap.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/tap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/tap.c</a></div><div class='hunk'>@@ -26,74 +26,9 @@</div><div class='ctx'> #include &lt;linux/virtio_net.h&gt;</div><div class='ctx'> #include &lt;linux/skb_array.h&gt;</div><div class='ctx'> </div><div class='del'>-#define TAP_IFFEATURES (IFF_VNET_HDR | IFF_MULTI_QUEUE)</div><div class='del'>-</div><div class='del'>-#define TAP_VNET_LE 0x80000000</div><div class='del'>-#define TAP_VNET_BE 0x40000000</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_TUN_VNET_CROSS_LE</div><div class='del'>-static inline bool tap_legacy_is_little_endian(struct tap_queue *q)</div><div class='del'>-{</div><div class='del'>-	return q-&gt;flags &amp; TAP_VNET_BE ? false :</div><div class='del'>-		virtio_legacy_is_little_endian();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long tap_get_vnet_be(struct tap_queue *q, int __user *sp)</div><div class='del'>-{</div><div class='del'>-	int s = !!(q-&gt;flags &amp; TAP_VNET_BE);</div><div class='del'>-</div><div class='del'>-	if (put_user(s, sp))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long tap_set_vnet_be(struct tap_queue *q, int __user *sp)</div><div class='del'>-{</div><div class='del'>-	int s;</div><div class='add'>+#include "tun_vnet.h"</div><div class='ctx'> </div><div class='del'>-	if (get_user(s, sp))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (s)</div><div class='del'>-		q-&gt;flags |= TAP_VNET_BE;</div><div class='del'>-	else</div><div class='del'>-		q-&gt;flags &amp;= ~TAP_VNET_BE;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline bool tap_legacy_is_little_endian(struct tap_queue *q)</div><div class='del'>-{</div><div class='del'>-	return virtio_legacy_is_little_endian();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long tap_get_vnet_be(struct tap_queue *q, int __user *argp)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long tap_set_vnet_be(struct tap_queue *q, int __user *argp)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_TUN_VNET_CROSS_LE */</div><div class='del'>-</div><div class='del'>-static inline bool tap_is_little_endian(struct tap_queue *q)</div><div class='del'>-{</div><div class='del'>-	return q-&gt;flags &amp; TAP_VNET_LE ||</div><div class='del'>-		tap_legacy_is_little_endian(q);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u16 tap16_to_cpu(struct tap_queue *q, __virtio16 val)</div><div class='del'>-{</div><div class='del'>-	return __virtio16_to_cpu(tap_is_little_endian(q), val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline __virtio16 cpu_to_tap16(struct tap_queue *q, u16 val)</div><div class='del'>-{</div><div class='del'>-	return __cpu_to_virtio16(tap_is_little_endian(q), val);</div><div class='del'>-}</div><div class='add'>+#define TAP_IFFEATURES (IFF_VNET_HDR | IFF_MULTI_QUEUE)</div><div class='ctx'> </div><div class='ctx'> static struct proto tap_proto = {</div><div class='ctx'> 	.name = "tap",</div><div class='hunk'>@@ -645,6 +580,7 @@ static ssize_t tap_get_user(struct tap_queue *q, void *msg_control,</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct virtio_net_hdr vnet_hdr = { 0 };</div><div class='ctx'> 	int vnet_hdr_len = 0;</div><div class='add'>+	int hdr_len = 0;</div><div class='ctx'> 	int copylen = 0;</div><div class='ctx'> 	int depth;</div><div class='ctx'> 	bool zerocopy = false;</div><div class='hunk'>@@ -654,25 +590,13 @@ static ssize_t tap_get_user(struct tap_queue *q, void *msg_control,</div><div class='ctx'> 	if (q-&gt;flags &amp; IFF_VNET_HDR) {</div><div class='ctx'> 		vnet_hdr_len = READ_ONCE(q-&gt;vnet_hdr_sz);</div><div class='ctx'> </div><div class='del'>-		err = -EINVAL;</div><div class='del'>-		if (len &lt; vnet_hdr_len)</div><div class='add'>+		hdr_len = tun_vnet_hdr_get(vnet_hdr_len, q-&gt;flags, from, &amp;vnet_hdr);</div><div class='add'>+		if (hdr_len &lt; 0) {</div><div class='add'>+			err = hdr_len;</div><div class='ctx'> 			goto err;</div><div class='del'>-		len -= vnet_hdr_len;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		err = -EFAULT;</div><div class='del'>-		if (!copy_from_iter_full(&amp;vnet_hdr, sizeof(vnet_hdr), from))</div><div class='del'>-			goto err;</div><div class='del'>-		iov_iter_advance(from, vnet_hdr_len - sizeof(vnet_hdr));</div><div class='del'>-		if ((vnet_hdr.flags &amp; VIRTIO_NET_HDR_F_NEEDS_CSUM) &amp;&amp;</div><div class='del'>-		     tap16_to_cpu(q, vnet_hdr.csum_start) +</div><div class='del'>-		     tap16_to_cpu(q, vnet_hdr.csum_offset) + 2 &gt;</div><div class='del'>-			     tap16_to_cpu(q, vnet_hdr.hdr_len))</div><div class='del'>-			vnet_hdr.hdr_len = cpu_to_tap16(q,</div><div class='del'>-				 tap16_to_cpu(q, vnet_hdr.csum_start) +</div><div class='del'>-				 tap16_to_cpu(q, vnet_hdr.csum_offset) + 2);</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-		if (tap16_to_cpu(q, vnet_hdr.hdr_len) &gt; len)</div><div class='del'>-			goto err;</div><div class='add'>+		len -= vnet_hdr_len;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = -EINVAL;</div><div class='hunk'>@@ -682,12 +606,7 @@ static ssize_t tap_get_user(struct tap_queue *q, void *msg_control,</div><div class='ctx'> 	if (msg_control &amp;&amp; sock_flag(&amp;q-&gt;sk, SOCK_ZEROCOPY)) {</div><div class='ctx'> 		struct iov_iter i;</div><div class='ctx'> </div><div class='del'>-		copylen = vnet_hdr.hdr_len ?</div><div class='del'>-			tap16_to_cpu(q, vnet_hdr.hdr_len) : GOODCOPY_LEN;</div><div class='del'>-		if (copylen &gt; good_linear)</div><div class='del'>-			copylen = good_linear;</div><div class='del'>-		else if (copylen &lt; ETH_HLEN)</div><div class='del'>-			copylen = ETH_HLEN;</div><div class='add'>+		copylen = clamp(hdr_len ?: GOODCOPY_LEN, ETH_HLEN, good_linear);</div><div class='ctx'> 		linear = copylen;</div><div class='ctx'> 		i = *from;</div><div class='ctx'> 		iov_iter_advance(&amp;i, copylen);</div><div class='hunk'>@@ -697,11 +616,7 @@ static ssize_t tap_get_user(struct tap_queue *q, void *msg_control,</div><div class='ctx'> </div><div class='ctx'> 	if (!zerocopy) {</div><div class='ctx'> 		copylen = len;</div><div class='del'>-		linear = tap16_to_cpu(q, vnet_hdr.hdr_len);</div><div class='del'>-		if (linear &gt; good_linear)</div><div class='del'>-			linear = good_linear;</div><div class='del'>-		else if (linear &lt; ETH_HLEN)</div><div class='del'>-			linear = ETH_HLEN;</div><div class='add'>+		linear = clamp(hdr_len, ETH_HLEN, good_linear);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	skb = tap_alloc_skb(&amp;q-&gt;sk, TAP_RESERVE, copylen,</div><div class='hunk'>@@ -733,8 +648,7 @@ static ssize_t tap_get_user(struct tap_queue *q, void *msg_control,</div><div class='ctx'> 	skb-&gt;dev = tap-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (vnet_hdr_len) {</div><div class='del'>-		err = virtio_net_hdr_to_skb(skb, &amp;vnet_hdr,</div><div class='del'>-					    tap_is_little_endian(q));</div><div class='add'>+		err = tun_vnet_hdr_to_skb(q-&gt;flags, skb, &amp;vnet_hdr);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			rcu_read_unlock();</div><div class='ctx'> 			drop_reason = SKB_DROP_REASON_DEV_HDR;</div><div class='hunk'>@@ -797,23 +711,17 @@ static ssize_t tap_put_user(struct tap_queue *q,</div><div class='ctx'> 	int total;</div><div class='ctx'> </div><div class='ctx'> 	if (q-&gt;flags &amp; IFF_VNET_HDR) {</div><div class='del'>-		int vlan_hlen = skb_vlan_tag_present(skb) ? VLAN_HLEN : 0;</div><div class='ctx'> 		struct virtio_net_hdr vnet_hdr;</div><div class='ctx'> </div><div class='ctx'> 		vnet_hdr_len = READ_ONCE(q-&gt;vnet_hdr_sz);</div><div class='del'>-		if (iov_iter_count(iter) &lt; vnet_hdr_len)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		if (virtio_net_hdr_from_skb(skb, &amp;vnet_hdr,</div><div class='del'>-					    tap_is_little_endian(q), true,</div><div class='del'>-					    vlan_hlen))</div><div class='del'>-			BUG();</div><div class='ctx'> </div><div class='del'>-		if (copy_to_iter(&amp;vnet_hdr, sizeof(vnet_hdr), iter) !=</div><div class='del'>-		    sizeof(vnet_hdr))</div><div class='del'>-			return -EFAULT;</div><div class='add'>+		ret = tun_vnet_hdr_from_skb(q-&gt;flags, NULL, skb, &amp;vnet_hdr);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		iov_iter_advance(iter, vnet_hdr_len - sizeof(vnet_hdr));</div><div class='add'>+		ret = tun_vnet_hdr_put(vnet_hdr_len, iter, &amp;vnet_hdr);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> 	total = vnet_hdr_len;</div><div class='ctx'> 	total += skb-&gt;len;</div><div class='hunk'>@@ -1015,7 +923,7 @@ static long tap_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> 	unsigned int __user *up = argp;</div><div class='ctx'> 	unsigned short u;</div><div class='ctx'> 	int __user *sp = argp;</div><div class='del'>-	struct sockaddr sa;</div><div class='add'>+	struct sockaddr_storage ss;</div><div class='ctx'> 	int s;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1072,42 +980,6 @@ static long tap_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> 		q-&gt;sk.sk_sndbuf = s;</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	case TUNGETVNETHDRSZ:</div><div class='del'>-		s = q-&gt;vnet_hdr_sz;</div><div class='del'>-		if (put_user(s, sp))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	case TUNSETVNETHDRSZ:</div><div class='del'>-		if (get_user(s, sp))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		if (s &lt; (int)sizeof(struct virtio_net_hdr))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		q-&gt;vnet_hdr_sz = s;</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	case TUNGETVNETLE:</div><div class='del'>-		s = !!(q-&gt;flags &amp; TAP_VNET_LE);</div><div class='del'>-		if (put_user(s, sp))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	case TUNSETVNETLE:</div><div class='del'>-		if (get_user(s, sp))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		if (s)</div><div class='del'>-			q-&gt;flags |= TAP_VNET_LE;</div><div class='del'>-		else</div><div class='del'>-			q-&gt;flags &amp;= ~TAP_VNET_LE;</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	case TUNGETVNETBE:</div><div class='del'>-		return tap_get_vnet_be(q, sp);</div><div class='del'>-</div><div class='del'>-	case TUNSETVNETBE:</div><div class='del'>-		return tap_set_vnet_be(q, sp);</div><div class='del'>-</div><div class='ctx'> 	case TUNSETOFFLOAD:</div><div class='ctx'> 		/* let the user check for future flags */</div><div class='ctx'> 		if (arg &amp; ~(TUN_F_CSUM | TUN_F_TSO4 | TUN_F_TSO6 |</div><div class='hunk'>@@ -1128,16 +1000,17 @@ static long tap_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> 			return -ENOLINK;</div><div class='ctx'> 		}</div><div class='ctx'> 		ret = 0;</div><div class='del'>-		dev_get_mac_address(&amp;sa, dev_net(tap-&gt;dev), tap-&gt;dev-&gt;name);</div><div class='add'>+		netif_get_mac_address((struct sockaddr *)&amp;ss, dev_net(tap-&gt;dev),</div><div class='add'>+				      tap-&gt;dev-&gt;name);</div><div class='ctx'> 		if (copy_to_user(&amp;ifr-&gt;ifr_name, tap-&gt;dev-&gt;name, IFNAMSIZ) ||</div><div class='del'>-		    copy_to_user(&amp;ifr-&gt;ifr_hwaddr, &amp;sa, sizeof(sa)))</div><div class='add'>+		    copy_to_user(&amp;ifr-&gt;ifr_hwaddr, &amp;ss, sizeof(ifr-&gt;ifr_hwaddr)))</div><div class='ctx'> 			ret = -EFAULT;</div><div class='ctx'> 		tap_put_tap_dev(tap);</div><div class='ctx'> 		rtnl_unlock();</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	case SIOCSIFHWADDR:</div><div class='del'>-		if (copy_from_user(&amp;sa, &amp;ifr-&gt;ifr_hwaddr, sizeof(sa)))</div><div class='add'>+		if (copy_from_user(&amp;ss, &amp;ifr-&gt;ifr_hwaddr, sizeof(ifr-&gt;ifr_hwaddr)))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> 		rtnl_lock();</div><div class='ctx'> 		tap = tap_get_tap_dev(q);</div><div class='hunk'>@@ -1145,13 +1018,16 @@ static long tap_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> 			rtnl_unlock();</div><div class='ctx'> 			return -ENOLINK;</div><div class='ctx'> 		}</div><div class='del'>-		ret = dev_set_mac_address_user(tap-&gt;dev, &amp;sa, NULL);</div><div class='add'>+		if (tap-&gt;dev-&gt;addr_len &gt; sizeof(ifr-&gt;ifr_hwaddr))</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+		else</div><div class='add'>+			ret = dev_set_mac_address_user(tap-&gt;dev, &amp;ss, NULL);</div><div class='ctx'> 		tap_put_tap_dev(tap);</div><div class='ctx'> 		rtnl_unlock();</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		return -EINVAL;</div><div class='add'>+		return tun_vnet_ioctl(&amp;q-&gt;vnet_hdr_sz, &amp;q-&gt;flags, cmd, sp);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1168,9 +1044,8 @@ static const struct file_operations tap_fops = {</div><div class='ctx'> </div><div class='ctx'> static int tap_get_user_xdp(struct tap_queue *q, struct xdp_buff *xdp)</div><div class='ctx'> {</div><div class='del'>-	struct tun_xdp_hdr *hdr = xdp-&gt;data_hard_start;</div><div class='del'>-	struct virtio_net_hdr *gso = &amp;hdr-&gt;gso;</div><div class='del'>-	int buflen = hdr-&gt;buflen;</div><div class='add'>+	struct virtio_net_hdr *gso = xdp-&gt;data_hard_start;</div><div class='add'>+	int buflen = xdp-&gt;frame_sz;</div><div class='ctx'> 	int vnet_hdr_len = 0;</div><div class='ctx'> 	struct tap_dev *tap;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='hunk'>@@ -1198,7 +1073,7 @@ static int tap_get_user_xdp(struct tap_queue *q, struct xdp_buff *xdp)</div><div class='ctx'> 	skb-&gt;protocol = eth_hdr(skb)-&gt;h_proto;</div><div class='ctx'> </div><div class='ctx'> 	if (vnet_hdr_len) {</div><div class='del'>-		err = virtio_net_hdr_to_skb(skb, gso, tap_is_little_endian(q));</div><div class='add'>+		err = tun_vnet_hdr_to_skb(q-&gt;flags, skb, gso);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err_kfree;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1329,9 +1204,9 @@ int tap_queue_resize(struct tap_dev *tap)</div><div class='ctx'> 	list_for_each_entry(q, &amp;tap-&gt;queue_list, next)</div><div class='ctx'> 		rings[i++] = &amp;q-&gt;ring;</div><div class='ctx'> </div><div class='del'>-	ret = ptr_ring_resize_multiple(rings, n,</div><div class='del'>-				       dev-&gt;tx_queue_len, GFP_KERNEL,</div><div class='del'>-				       __skb_array_destroy_skb);</div><div class='add'>+	ret = ptr_ring_resize_multiple_bh(rings, n,</div><div class='add'>+					  dev-&gt;tx_queue_len, GFP_KERNEL,</div><div class='add'>+					  __skb_array_destroy_skb);</div><div class='ctx'> </div><div class='ctx'> 	kfree(rings);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1407,3 +1282,4 @@ MODULE_DESCRIPTION("Common library for drivers implementing the TAP interface");</div><div class='ctx'> MODULE_AUTHOR("Arnd Bergmann &lt;arnd@arndb.de&gt;");</div><div class='ctx'> MODULE_AUTHOR("Sainath Grandhi &lt;sainath.grandhi@intel.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_IMPORT_NS("NETDEV_INTERNAL");</div><div class='head'>diff --git a/drivers/net/team/team_core.c b/drivers/net/team/team_core.c<br/>index a1b27b69f010..4d5c9ae8f221 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/team/team_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/team/team_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/team/team_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/team/team_core.c</a></div><div class='hunk'>@@ -23,6 +23,7 @@</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;net/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;net/genetlink.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/netlink.h&gt;</div><div class='ctx'> #include &lt;net/sch_generic.h&gt;</div><div class='ctx'> #include &lt;linux/if_team.h&gt;</div><div class='hunk'>@@ -54,7 +55,7 @@ static int __set_port_dev_addr(struct net_device *port_dev,</div><div class='ctx'> </div><div class='ctx'> 	memcpy(addr.__data, dev_addr, port_dev-&gt;addr_len);</div><div class='ctx'> 	addr.ss_family = port_dev-&gt;type;</div><div class='del'>-	return dev_set_mac_address(port_dev, (struct sockaddr *)&amp;addr, NULL);</div><div class='add'>+	return dev_set_mac_address(port_dev, &amp;addr, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int team_port_set_orig_dev_addr(struct team_port *port)</div><div class='hunk'>@@ -932,7 +933,7 @@ static bool team_port_find(const struct team *team,</div><div class='ctx'>  * Enable/disable port by adding to enabled port hashlist and setting</div><div class='ctx'>  * port-&gt;index (Might be racy so reader could see incorrect ifindex when</div><div class='ctx'>  * processing a flying packet, but that is not a problem). Write guarded</div><div class='del'>- * by team-&gt;lock.</div><div class='add'>+ * by RTNL.</div><div class='ctx'>  */</div><div class='ctx'> static void team_port_enable(struct team *team,</div><div class='ctx'> 			     struct team_port *port)</div><div class='hunk'>@@ -981,57 +982,6 @@ static void team_port_disable(struct team *team,</div><div class='ctx'> 	team_lower_state_changed(port);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define TEAM_VLAN_FEATURES (NETIF_F_HW_CSUM | NETIF_F_SG | \</div><div class='del'>-			    NETIF_F_FRAGLIST | NETIF_F_GSO_SOFTWARE | \</div><div class='del'>-			    NETIF_F_HIGHDMA | NETIF_F_LRO)</div><div class='del'>-</div><div class='del'>-#define TEAM_ENC_FEATURES	(NETIF_F_HW_CSUM | NETIF_F_SG | \</div><div class='del'>-				 NETIF_F_RXCSUM | NETIF_F_GSO_SOFTWARE)</div><div class='del'>-</div><div class='del'>-static void __team_compute_features(struct team *team)</div><div class='del'>-{</div><div class='del'>-	struct team_port *port;</div><div class='del'>-	netdev_features_t vlan_features = TEAM_VLAN_FEATURES &amp;</div><div class='del'>-					  NETIF_F_ALL_FOR_ALL;</div><div class='del'>-	netdev_features_t enc_features  = TEAM_ENC_FEATURES;</div><div class='del'>-	unsigned short max_hard_header_len = ETH_HLEN;</div><div class='del'>-	unsigned int dst_release_flag = IFF_XMIT_DST_RELEASE |</div><div class='del'>-					IFF_XMIT_DST_RELEASE_PERM;</div><div class='del'>-</div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	list_for_each_entry_rcu(port, &amp;team-&gt;port_list, list) {</div><div class='del'>-		vlan_features = netdev_increment_features(vlan_features,</div><div class='del'>-					port-&gt;dev-&gt;vlan_features,</div><div class='del'>-					TEAM_VLAN_FEATURES);</div><div class='del'>-		enc_features =</div><div class='del'>-			netdev_increment_features(enc_features,</div><div class='del'>-						  port-&gt;dev-&gt;hw_enc_features,</div><div class='del'>-						  TEAM_ENC_FEATURES);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		dst_release_flag &amp;= port-&gt;dev-&gt;priv_flags;</div><div class='del'>-		if (port-&gt;dev-&gt;hard_header_len &gt; max_hard_header_len)</div><div class='del'>-			max_hard_header_len = port-&gt;dev-&gt;hard_header_len;</div><div class='del'>-	}</div><div class='del'>-	rcu_read_unlock();</div><div class='del'>-</div><div class='del'>-	team-&gt;dev-&gt;vlan_features = vlan_features;</div><div class='del'>-	team-&gt;dev-&gt;hw_enc_features = enc_features | NETIF_F_GSO_ENCAP_ALL |</div><div class='del'>-				     NETIF_F_HW_VLAN_CTAG_TX |</div><div class='del'>-				     NETIF_F_HW_VLAN_STAG_TX;</div><div class='del'>-	team-&gt;dev-&gt;hard_header_len = max_hard_header_len;</div><div class='del'>-</div><div class='del'>-	team-&gt;dev-&gt;priv_flags &amp;= ~IFF_XMIT_DST_RELEASE;</div><div class='del'>-	if (dst_release_flag == (IFF_XMIT_DST_RELEASE | IFF_XMIT_DST_RELEASE_PERM))</div><div class='del'>-		team-&gt;dev-&gt;priv_flags |= IFF_XMIT_DST_RELEASE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void team_compute_features(struct team *team)</div><div class='del'>-{</div><div class='del'>-	__team_compute_features(team);</div><div class='del'>-	netdev_change_features(team-&gt;dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int team_port_enter(struct team *team, struct team_port *port)</div><div class='ctx'> {</div><div class='ctx'> 	int err = 0;</div><div class='hunk'>@@ -1169,6 +1119,13 @@ static int team_port_add(struct team *team, struct net_device *port_dev,</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (netdev_has_upper_dev(port_dev, dev)) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "Device is already a lower device of the team interface");</div><div class='add'>+		netdev_err(dev, "Device %s is already a lower device of the team interface\n",</div><div class='add'>+			   portname);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (port_dev-&gt;features &amp; NETIF_F_VLAN_CHALLENGED &amp;&amp;</div><div class='ctx'> 	    vlan_uses_dev(dev)) {</div><div class='ctx'> 		NL_SET_ERR_MSG(extack, "Device is VLAN challenged and team device has VLAN set up");</div><div class='hunk'>@@ -1177,10 +1134,6 @@ static int team_port_add(struct team *team, struct net_device *port_dev,</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = team_dev_type_check_change(dev, port_dev);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='ctx'> 	if (port_dev-&gt;flags &amp; IFF_UP) {</div><div class='ctx'> 		NL_SET_ERR_MSG(extack, "Device is up. Set it down before adding it as a team port");</div><div class='ctx'> 		netdev_err(dev, "Device %s is up. Set it down before adding it as a team port\n",</div><div class='hunk'>@@ -1198,10 +1151,16 @@ static int team_port_add(struct team *team, struct net_device *port_dev,</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;port-&gt;qom_list);</div><div class='ctx'> </div><div class='ctx'> 	port-&gt;orig.mtu = port_dev-&gt;mtu;</div><div class='del'>-	err = dev_set_mtu(port_dev, dev-&gt;mtu);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_dbg(dev, "Error %d calling dev_set_mtu\n", err);</div><div class='del'>-		goto err_set_mtu;</div><div class='add'>+	/*</div><div class='add'>+	 * MTU assignment will be handled in team_dev_type_check_change</div><div class='add'>+	 * if dev and port_dev are of different types</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;type == port_dev-&gt;type) {</div><div class='add'>+		err = dev_set_mtu(port_dev, dev-&gt;mtu);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_dbg(dev, "Error %d calling dev_set_mtu\n", err);</div><div class='add'>+			goto err_set_mtu;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(port-&gt;orig.dev_addr, port_dev-&gt;dev_addr, port_dev-&gt;addr_len);</div><div class='hunk'>@@ -1272,10 +1231,14 @@ static int team_port_add(struct team *team, struct net_device *port_dev,</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			if (dev-&gt;flags &amp; IFF_PROMISC)</div><div class='ctx'> 				dev_set_promiscuity(port_dev, -1);</div><div class='del'>-			goto err_set_slave_promisc;</div><div class='add'>+			goto err_set_slave_allmulti;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	err = team_dev_type_check_change(dev, port_dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_set_dev_type;</div><div class='add'>+</div><div class='ctx'> 	if (dev-&gt;flags &amp; IFF_UP) {</div><div class='ctx'> 		netif_addr_lock_bh(dev);</div><div class='ctx'> 		dev_uc_sync_multiple(port_dev, dev);</div><div class='hunk'>@@ -1286,7 +1249,7 @@ static int team_port_add(struct team *team, struct net_device *port_dev,</div><div class='ctx'> 	port-&gt;index = -1;</div><div class='ctx'> 	list_add_tail_rcu(&amp;port-&gt;list, &amp;team-&gt;port_list);</div><div class='ctx'> 	team_port_enable(team, port);</div><div class='del'>-	__team_compute_features(team);</div><div class='add'>+	netdev_compute_master_upper_features(team-&gt;dev, true);</div><div class='ctx'> 	__team_port_change_port_added(port, !!netif_oper_up(port_dev));</div><div class='ctx'> 	__team_options_change_check(team);</div><div class='ctx'> </div><div class='hunk'>@@ -1294,6 +1257,8 @@ static int team_port_add(struct team *team, struct net_device *port_dev,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_set_dev_type:</div><div class='add'>+err_set_slave_allmulti:</div><div class='ctx'> err_set_slave_promisc:</div><div class='ctx'> 	__team_option_inst_del_port(team, port);</div><div class='ctx'> </div><div class='hunk'>@@ -1368,7 +1333,7 @@ static int team_port_del(struct team *team, struct net_device *port_dev)</div><div class='ctx'> 	dev_set_mtu(port_dev, port-&gt;orig.mtu);</div><div class='ctx'> 	kfree_rcu(port, rcu);</div><div class='ctx'> 	netdev_info(dev, "Port device %s removed\n", portname);</div><div class='del'>-	__team_compute_features(team);</div><div class='add'>+	netdev_compute_master_upper_features(team-&gt;dev, true);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1646,8 +1611,6 @@ static int team_init(struct net_device *dev)</div><div class='ctx'> 		goto err_options_register;</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> </div><div class='del'>-	lockdep_register_key(&amp;team-&gt;team_lock_key);</div><div class='del'>-	__mutex_init(&amp;team-&gt;lock, "team-&gt;team_lock_key", &amp;team-&gt;team_lock_key);</div><div class='ctx'> 	netdev_lockdep_set_classes(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1668,7 +1631,8 @@ static void team_uninit(struct net_device *dev)</div><div class='ctx'> 	struct team_port *port;</div><div class='ctx'> 	struct team_port *tmp;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry_safe(port, tmp, &amp;team-&gt;port_list, list)</div><div class='ctx'> 		team_port_del(team, port-&gt;dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1677,9 +1641,7 @@ static void team_uninit(struct net_device *dev)</div><div class='ctx'> 	team_mcast_rejoin_fini(team);</div><div class='ctx'> 	team_notify_peers_fini(team);</div><div class='ctx'> 	team_queue_override_fini(team);</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> 	netdev_change_features(dev);</div><div class='del'>-	lockdep_unregister_key(&amp;team-&gt;team_lock_key);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void team_destructor(struct net_device *dev)</div><div class='hunk'>@@ -1764,8 +1726,9 @@ static void team_change_rx_flags(struct net_device *dev, int change)</div><div class='ctx'> 	struct team_port *port;</div><div class='ctx'> 	int inc;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	list_for_each_entry_rcu(port, &amp;team-&gt;port_list, list) {</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(port, &amp;team-&gt;port_list, list) {</div><div class='ctx'> 		if (change &amp; IFF_PROMISC) {</div><div class='ctx'> 			inc = dev-&gt;flags &amp; IFF_PROMISC ? 1 : -1;</div><div class='ctx'> 			dev_set_promiscuity(port-&gt;dev, inc);</div><div class='hunk'>@@ -1775,7 +1738,6 @@ static void team_change_rx_flags(struct net_device *dev, int change)</div><div class='ctx'> 			dev_set_allmulti(port-&gt;dev, inc);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	rcu_read_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void team_set_rx_mode(struct net_device *dev)</div><div class='hunk'>@@ -1797,14 +1759,14 @@ static int team_set_mac_address(struct net_device *dev, void *p)</div><div class='ctx'> 	struct team *team = netdev_priv(dev);</div><div class='ctx'> 	struct team_port *port;</div><div class='ctx'> </div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	if (dev-&gt;type == ARPHRD_ETHER &amp;&amp; !is_valid_ether_addr(addr-&gt;sa_data))</div><div class='ctx'> 		return -EADDRNOTAVAIL;</div><div class='ctx'> 	dev_addr_set(dev, addr-&gt;sa_data);</div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='ctx'> 	list_for_each_entry(port, &amp;team-&gt;port_list, list)</div><div class='ctx'> 		if (team-&gt;ops.port_change_dev_addr)</div><div class='ctx'> 			team-&gt;ops.port_change_dev_addr(team, port);</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1814,11 +1776,8 @@ static int team_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 	struct team_port *port;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Alhough this is reader, it's guarded by team lock. It's not possible</div><div class='del'>-	 * to traverse list in reverse under rcu_read_lock</div><div class='del'>-	 */</div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	team-&gt;port_mtu_change_allowed = true;</div><div class='ctx'> 	list_for_each_entry(port, &amp;team-&gt;port_list, list) {</div><div class='ctx'> 		err = dev_set_mtu(port-&gt;dev, new_mtu);</div><div class='hunk'>@@ -1829,7 +1788,6 @@ static int team_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	team-&gt;port_mtu_change_allowed = false;</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='ctx'> </div><div class='hunk'>@@ -1839,7 +1797,6 @@ unwind:</div><div class='ctx'> 	list_for_each_entry_continue_reverse(port, &amp;team-&gt;port_list, list)</div><div class='ctx'> 		dev_set_mtu(port-&gt;dev, dev-&gt;mtu);</div><div class='ctx'> 	team-&gt;port_mtu_change_allowed = false;</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1889,24 +1846,19 @@ static int team_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)</div><div class='ctx'> 	struct team_port *port;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Alhough this is reader, it's guarded by team lock. It's not possible</div><div class='del'>-	 * to traverse list in reverse under rcu_read_lock</div><div class='del'>-	 */</div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry(port, &amp;team-&gt;port_list, list) {</div><div class='ctx'> 		err = vlan_vid_add(port-&gt;dev, proto, vid);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto unwind;</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> unwind:</div><div class='ctx'> 	list_for_each_entry_continue_reverse(port, &amp;team-&gt;port_list, list)</div><div class='ctx'> 		vlan_vid_del(port-&gt;dev, proto, vid);</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1916,10 +1868,10 @@ static int team_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)</div><div class='ctx'> 	struct team *team = netdev_priv(dev);</div><div class='ctx'> 	struct team_port *port;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry(port, &amp;team-&gt;port_list, list)</div><div class='ctx'> 		vlan_vid_del(port-&gt;dev, proto, vid);</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1941,9 +1893,9 @@ static void team_netpoll_cleanup(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct team *team = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	__team_netpoll_cleanup(team);</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int team_netpoll_setup(struct net_device *dev)</div><div class='hunk'>@@ -1952,7 +1904,8 @@ static int team_netpoll_setup(struct net_device *dev)</div><div class='ctx'> 	struct team_port *port;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry(port, &amp;team-&gt;port_list, list) {</div><div class='ctx'> 		err = __team_port_enable_netpoll(port);</div><div class='ctx'> 		if (err) {</div><div class='hunk'>@@ -1960,7 +1913,6 @@ static int team_netpoll_setup(struct net_device *dev)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1969,38 +1921,19 @@ static int team_add_slave(struct net_device *dev, struct net_device *port_dev,</div><div class='ctx'> 			  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct team *team = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='del'>-	err = team_port_add(team, port_dev, extack);</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	if (!err)</div><div class='del'>-		netdev_change_features(dev);</div><div class='add'>+	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	return team_port_add(team, port_dev, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int team_del_slave(struct net_device *dev, struct net_device *port_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct team *team = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='del'>-	err = team_port_del(team, port_dev);</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='add'>+	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (netif_is_team_master(port_dev)) {</div><div class='del'>-		lockdep_unregister_key(&amp;team-&gt;team_lock_key);</div><div class='del'>-		lockdep_register_key(&amp;team-&gt;team_lock_key);</div><div class='del'>-		lockdep_set_class(&amp;team-&gt;lock, &amp;team-&gt;team_lock_key);</div><div class='del'>-	}</div><div class='del'>-	netdev_change_features(dev);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='add'>+	return team_port_del(team, port_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_features_t team_fix_features(struct net_device *dev,</div><div class='hunk'>@@ -2011,8 +1944,7 @@ static netdev_features_t team_fix_features(struct net_device *dev,</div><div class='ctx'> 	netdev_features_t mask;</div><div class='ctx'> </div><div class='ctx'> 	mask = features;</div><div class='del'>-	features &amp;= ~NETIF_F_ONE_FOR_ALL;</div><div class='del'>-	features |= NETIF_F_ALL_FOR_ALL;</div><div class='add'>+	features = netdev_base_features(features);</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	list_for_each_entry_rcu(port, &amp;team-&gt;port_list, list) {</div><div class='hunk'>@@ -2191,11 +2123,11 @@ static void team_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;lltx = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Don't allow team devices to change network namespaces. */</div><div class='del'>-	dev-&gt;netns_local = true;</div><div class='add'>+	dev-&gt;netns_immutable = true;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;features |= NETIF_F_GRO;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;hw_features = TEAM_VLAN_FEATURES |</div><div class='add'>+	dev-&gt;hw_features = MASTER_UPPER_DEV_VLAN_FEATURES |</div><div class='ctx'> 			   NETIF_F_HW_VLAN_CTAG_RX |</div><div class='ctx'> 			   NETIF_F_HW_VLAN_CTAG_FILTER |</div><div class='ctx'> 			   NETIF_F_HW_VLAN_STAG_RX |</div><div class='hunk'>@@ -2206,10 +2138,12 @@ static void team_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_STAG_TX;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int team_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-			struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int team_newlink(struct net_device *dev,</div><div class='add'>+			struct rtnl_newlink_params *params,</div><div class='ctx'> 			struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='add'>+</div><div class='ctx'> 	if (tb[IFLA_ADDRESS] == NULL)</div><div class='ctx'> 		eth_hw_addr_random(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -2289,9 +2223,10 @@ err_msg_put:</div><div class='ctx'> static struct team *team_nl_team_get(struct genl_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct net *net = genl_info_net(info);</div><div class='del'>-	int ifindex;</div><div class='ctx'> 	struct net_device *dev;</div><div class='del'>-	struct team *team;</div><div class='add'>+	int ifindex;</div><div class='add'>+</div><div class='add'>+	ASSERT_RTNL();</div><div class='ctx'> </div><div class='ctx'> 	if (!info-&gt;attrs[TEAM_ATTR_TEAM_IFINDEX])</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -2303,14 +2238,11 @@ static struct team *team_nl_team_get(struct genl_info *info)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	team = netdev_priv(dev);</div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='del'>-	return team;</div><div class='add'>+	return netdev_priv(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void team_nl_team_put(struct team *team)</div><div class='ctx'> {</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> 	dev_put(team-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2500,9 +2432,13 @@ int team_nl_options_get_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> 	int err;</div><div class='ctx'> 	LIST_HEAD(sel_opt_inst_list);</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='ctx'> 	team = team_nl_team_get(info);</div><div class='del'>-	if (!team)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (!team) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto rtnl_unlock;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	list_for_each_entry(opt_inst, &amp;team-&gt;option_inst_list, list)</div><div class='ctx'> 		list_add_tail(&amp;opt_inst-&gt;tmp_list, &amp;sel_opt_inst_list);</div><div class='hunk'>@@ -2512,6 +2448,9 @@ int team_nl_options_get_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> </div><div class='ctx'> 	team_nl_team_put(team);</div><div class='ctx'> </div><div class='add'>+rtnl_unlock:</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2627,7 +2566,9 @@ int team_nl_options_set_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> 				ctx.data.u32_val = nla_get_u32(attr_data);</div><div class='ctx'> 				break;</div><div class='ctx'> 			case TEAM_OPTION_TYPE_STRING:</div><div class='del'>-				if (nla_len(attr_data) &gt; TEAM_STRING_MAX_LEN) {</div><div class='add'>+				if (nla_len(attr_data) &gt; TEAM_STRING_MAX_LEN ||</div><div class='add'>+				    !memchr(nla_data(attr_data), '\0',</div><div class='add'>+					    nla_len(attr_data))) {</div><div class='ctx'> 					err = -EINVAL;</div><div class='ctx'> 					goto team_put;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -2788,15 +2729,22 @@ int team_nl_port_list_get_doit(struct sk_buff *skb,</div><div class='ctx'> 	struct team *team;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='ctx'> 	team = team_nl_team_get(info);</div><div class='del'>-	if (!team)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (!team) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto rtnl_unlock;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = team_nl_send_port_list_get(team, info-&gt;snd_portid, info-&gt;snd_seq,</div><div class='ctx'> 					 NLM_F_ACK, team_nl_send_unicast, NULL);</div><div class='ctx'> </div><div class='ctx'> 	team_nl_team_put(team);</div><div class='ctx'> </div><div class='add'>+rtnl_unlock:</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2944,11 +2892,9 @@ static void __team_port_change_port_removed(struct team_port *port)</div><div class='ctx'> </div><div class='ctx'> static void team_port_change_check(struct team_port *port, bool linkup)</div><div class='ctx'> {</div><div class='del'>-	struct team *team = port-&gt;team;</div><div class='add'>+	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;team-&gt;lock);</div><div class='ctx'> 	__team_port_change_check(port, linkup);</div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -2985,7 +2931,7 @@ static int team_device_event(struct notifier_block *unused,</div><div class='ctx'> 	case NETDEV_FEAT_CHANGE:</div><div class='ctx'> 		if (!port-&gt;team-&gt;notifier_ctx) {</div><div class='ctx'> 			port-&gt;team-&gt;notifier_ctx = true;</div><div class='del'>-			team_compute_features(port-&gt;team);</div><div class='add'>+			netdev_compute_master_upper_features(port-&gt;team-&gt;dev, true);</div><div class='ctx'> 			port-&gt;team-&gt;notifier_ctx = false;</div><div class='ctx'> 		}</div><div class='ctx'> 		break;</div><div class='head'>diff --git a/drivers/net/team/team_mode_activebackup.c b/drivers/net/team/team_mode_activebackup.c<br/>index e0f599e2a51d..1c3336c7a1b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/team/team_mode_activebackup.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/team/team_mode_activebackup.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/team/team_mode_activebackup.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/team/team_mode_activebackup.c</a></div><div class='hunk'>@@ -67,8 +67,7 @@ static void ab_active_port_get(struct team *team, struct team_gsetter_ctx *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct team_port *active_port;</div><div class='ctx'> </div><div class='del'>-	active_port = rcu_dereference_protected(ab_priv(team)-&gt;active_port,</div><div class='del'>-						lockdep_is_held(&amp;team-&gt;lock));</div><div class='add'>+	active_port = rtnl_dereference(ab_priv(team)-&gt;active_port);</div><div class='ctx'> 	if (active_port)</div><div class='ctx'> 		ctx-&gt;data.u32_val = active_port-&gt;dev-&gt;ifindex;</div><div class='ctx'> 	else</div><div class='head'>diff --git a/drivers/net/team/team_mode_loadbalance.c b/drivers/net/team/team_mode_loadbalance.c<br/>index 00f8989c29c0..b14538bde2f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/team/team_mode_loadbalance.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/team/team_mode_loadbalance.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/team/team_mode_loadbalance.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/team/team_mode_loadbalance.c</a></div><div class='hunk'>@@ -301,8 +301,7 @@ static int lb_bpf_func_set(struct team *team, struct team_gsetter_ctx *ctx)</div><div class='ctx'> 	if (lb_priv-&gt;ex-&gt;orig_fprog) {</div><div class='ctx'> 		/* Clear old filter data */</div><div class='ctx'> 		__fprog_destroy(lb_priv-&gt;ex-&gt;orig_fprog);</div><div class='del'>-		orig_fp = rcu_dereference_protected(lb_priv-&gt;fp,</div><div class='del'>-						lockdep_is_held(&amp;team-&gt;lock));</div><div class='add'>+		orig_fp = rtnl_dereference(lb_priv-&gt;fp);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rcu_assign_pointer(lb_priv-&gt;fp, fp);</div><div class='hunk'>@@ -324,8 +323,7 @@ static void lb_bpf_func_free(struct team *team)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	__fprog_destroy(lb_priv-&gt;ex-&gt;orig_fprog);</div><div class='del'>-	fp = rcu_dereference_protected(lb_priv-&gt;fp,</div><div class='del'>-				       lockdep_is_held(&amp;team-&gt;lock));</div><div class='add'>+	fp = rtnl_dereference(lb_priv-&gt;fp);</div><div class='ctx'> 	bpf_prog_destroy(fp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -335,8 +333,7 @@ static void lb_tx_method_get(struct team *team, struct team_gsetter_ctx *ctx)</div><div class='ctx'> 	lb_select_tx_port_func_t *func;</div><div class='ctx'> 	char *name;</div><div class='ctx'> </div><div class='del'>-	func = rcu_dereference_protected(lb_priv-&gt;select_tx_port_func,</div><div class='del'>-					 lockdep_is_held(&amp;team-&gt;lock));</div><div class='add'>+	func = rtnl_dereference(lb_priv-&gt;select_tx_port_func);</div><div class='ctx'> 	name = lb_select_tx_port_get_name(func);</div><div class='ctx'> 	BUG_ON(!name);</div><div class='ctx'> 	ctx-&gt;data.str_val = name;</div><div class='hunk'>@@ -478,7 +475,7 @@ static void lb_stats_refresh(struct work_struct *work)</div><div class='ctx'> 	team = lb_priv_ex-&gt;team;</div><div class='ctx'> 	lb_priv = get_lb_priv(team);</div><div class='ctx'> </div><div class='del'>-	if (!mutex_trylock(&amp;team-&gt;lock)) {</div><div class='add'>+	if (!rtnl_trylock()) {</div><div class='ctx'> 		schedule_delayed_work(&amp;lb_priv_ex-&gt;stats.refresh_dw, 0);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -515,7 +512,7 @@ static void lb_stats_refresh(struct work_struct *work)</div><div class='ctx'> 	schedule_delayed_work(&amp;lb_priv_ex-&gt;stats.refresh_dw,</div><div class='ctx'> 			      (lb_priv_ex-&gt;stats.refresh_interval * HZ) / 10);</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;team-&gt;lock);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lb_stats_refresh_interval_get(struct team *team,</div><div class='head'>diff --git a/drivers/net/team/team_nl.c b/drivers/net/team/team_nl.c<br/>index 208424ab78f5..6db21725f9cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/team/team_nl.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/team/team_nl.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/team/team_nl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/team/team_nl.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Do not edit directly, auto-generated from: */</div><div class='ctx'> /*	Documentation/netlink/specs/team.yaml */</div><div class='ctx'> /* YNL-GEN kernel source */</div><div class='add'>+/* To regenerate run: tools/net/ynl/ynl-regen.sh */</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/netlink.h&gt;</div><div class='ctx'> #include &lt;net/genetlink.h&gt;</div><div class='head'>diff --git a/drivers/net/team/team_nl.h b/drivers/net/team/team_nl.h<br/>index c9ec1b22ac4d..74816b193475 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/team/team_nl.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/team/team_nl.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/team/team_nl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/team/team_nl.h</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /* Do not edit directly, auto-generated from: */</div><div class='ctx'> /*	Documentation/netlink/specs/team.yaml */</div><div class='ctx'> /* YNL-GEN kernel header */</div><div class='add'>+/* To regenerate run: tools/net/ynl/ynl-regen.sh */</div><div class='ctx'> </div><div class='ctx'> #ifndef _LINUX_TEAM_GEN_H</div><div class='ctx'> #define _LINUX_TEAM_GEN_H</div><div class='head'>diff --git a/drivers/net/thunderbolt/main.c b/drivers/net/thunderbolt/main.c<br/>index 0a53ec293d04..dcaa62377808 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/thunderbolt/main.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/thunderbolt/main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/thunderbolt/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/thunderbolt/main.c</a></div><div class='hunk'>@@ -396,9 +396,9 @@ static void tbnet_tear_down(struct tbnet *net, bool send_logout)</div><div class='ctx'> </div><div class='ctx'> 		ret = tb_xdomain_disable_paths(net-&gt;xd,</div><div class='ctx'> 					       net-&gt;local_transmit_path,</div><div class='del'>-					       net-&gt;rx_ring.ring-&gt;hop,</div><div class='add'>+					       net-&gt;tx_ring.ring-&gt;hop,</div><div class='ctx'> 					       net-&gt;remote_transmit_path,</div><div class='del'>-					       net-&gt;tx_ring.ring-&gt;hop);</div><div class='add'>+					       net-&gt;rx_ring.ring-&gt;hop);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			netdev_warn(net-&gt;dev, "failed to disable DMA paths\n");</div><div class='ctx'> </div><div class='hunk'>@@ -662,9 +662,9 @@ static void tbnet_connected_work(struct work_struct *work)</div><div class='ctx'> 		goto err_free_rx_buffers;</div><div class='ctx'> </div><div class='ctx'> 	ret = tb_xdomain_enable_paths(net-&gt;xd, net-&gt;local_transmit_path,</div><div class='del'>-				      net-&gt;rx_ring.ring-&gt;hop,</div><div class='add'>+				      net-&gt;tx_ring.ring-&gt;hop,</div><div class='ctx'> 				      net-&gt;remote_transmit_path,</div><div class='del'>-				      net-&gt;tx_ring.ring-&gt;hop);</div><div class='add'>+				      net-&gt;rx_ring.ring-&gt;hop);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_err(net-&gt;dev, "failed to enable DMA paths\n");</div><div class='ctx'> 		goto err_free_tx_buffers;</div><div class='hunk'>@@ -924,8 +924,12 @@ static int tbnet_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> </div><div class='del'>-	ring = tb_ring_alloc_tx(xd-&gt;tb-&gt;nhi, -1, TBNET_RING_SIZE,</div><div class='del'>-				RING_FLAG_FRAME);</div><div class='add'>+	flags = RING_FLAG_FRAME;</div><div class='add'>+	/* Only enable full E2E if the other end supports it too */</div><div class='add'>+	if (tbnet_e2e &amp;&amp; net-&gt;svc-&gt;prtcstns &amp; TBNET_E2E)</div><div class='add'>+		flags |= RING_FLAG_E2E;</div><div class='add'>+</div><div class='add'>+	ring = tb_ring_alloc_tx(xd-&gt;tb-&gt;nhi, -1, TBNET_RING_SIZE, flags);</div><div class='ctx'> 	if (!ring) {</div><div class='ctx'> 		netdev_err(dev, "failed to allocate Tx ring\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -944,11 +948,6 @@ static int tbnet_open(struct net_device *dev)</div><div class='ctx'> 	sof_mask = BIT(TBIP_PDF_FRAME_START);</div><div class='ctx'> 	eof_mask = BIT(TBIP_PDF_FRAME_END);</div><div class='ctx'> </div><div class='del'>-	flags = RING_FLAG_FRAME;</div><div class='del'>-	/* Only enable full E2E if the other end supports it too */</div><div class='del'>-	if (tbnet_e2e &amp;&amp; net-&gt;svc-&gt;prtcstns &amp; TBNET_E2E)</div><div class='del'>-		flags |= RING_FLAG_E2E;</div><div class='del'>-</div><div class='ctx'> 	ring = tb_ring_alloc_rx(xd-&gt;tb-&gt;nhi, -1, TBNET_RING_SIZE, flags,</div><div class='ctx'> 				net-&gt;tx_ring.ring-&gt;hop, sof_mask,</div><div class='ctx'> 				eof_mask, tbnet_start_poll, net);</div><div class='head'>diff --git a/drivers/net/tun.c b/drivers/net/tun.c<br/>index d7a865ef370b..8192740357a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/tun.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/tun.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/tun.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/tun.c</a></div><div class='hunk'>@@ -83,6 +83,8 @@</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "tun_vnet.h"</div><div class='add'>+</div><div class='ctx'> static void tun_default_link_ksettings(struct net_device *dev,</div><div class='ctx'> 				       struct ethtool_link_ksettings *cmd);</div><div class='ctx'> </div><div class='hunk'>@@ -94,9 +96,6 @@ static void tun_default_link_ksettings(struct net_device *dev,</div><div class='ctx'>  * overload it to mean fasync when stored there.</div><div class='ctx'>  */</div><div class='ctx'> #define TUN_FASYNC	IFF_ATTACH_QUEUE</div><div class='del'>-/* High bits in flags field are unused. */</div><div class='del'>-#define TUN_VNET_LE     0x80000000</div><div class='del'>-#define TUN_VNET_BE     0x40000000</div><div class='ctx'> </div><div class='ctx'> #define TUN_FEATURES (IFF_NO_PI | IFF_ONE_QUEUE | IFF_VNET_HDR | \</div><div class='ctx'> 		      IFF_MULTI_QUEUE | IFF_NAPI | IFF_NAPI_FRAGS)</div><div class='hunk'>@@ -187,7 +186,8 @@ struct tun_struct {</div><div class='ctx'> 	struct net_device	*dev;</div><div class='ctx'> 	netdev_features_t	set_features;</div><div class='ctx'> #define TUN_USER_FEATURES (NETIF_F_HW_CSUM|NETIF_F_TSO_ECN|NETIF_F_TSO| \</div><div class='del'>-			  NETIF_F_TSO6 | NETIF_F_GSO_UDP_L4)</div><div class='add'>+			  NETIF_F_TSO6 | NETIF_F_GSO_UDP_L4 | \</div><div class='add'>+			  NETIF_F_GSO_UDP_TUNNEL | NETIF_F_GSO_UDP_TUNNEL_CSUM)</div><div class='ctx'> </div><div class='ctx'> 	int			align;</div><div class='ctx'> 	int			vnet_hdr_sz;</div><div class='hunk'>@@ -298,70 +298,6 @@ static bool tun_napi_frags_enabled(const struct tun_file *tfile)</div><div class='ctx'> 	return tfile-&gt;napi_frags_enabled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_TUN_VNET_CROSS_LE</div><div class='del'>-static inline bool tun_legacy_is_little_endian(struct tun_struct *tun)</div><div class='del'>-{</div><div class='del'>-	return tun-&gt;flags &amp; TUN_VNET_BE ? false :</div><div class='del'>-		virtio_legacy_is_little_endian();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long tun_get_vnet_be(struct tun_struct *tun, int __user *argp)</div><div class='del'>-{</div><div class='del'>-	int be = !!(tun-&gt;flags &amp; TUN_VNET_BE);</div><div class='del'>-</div><div class='del'>-	if (put_user(be, argp))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long tun_set_vnet_be(struct tun_struct *tun, int __user *argp)</div><div class='del'>-{</div><div class='del'>-	int be;</div><div class='del'>-</div><div class='del'>-	if (get_user(be, argp))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (be)</div><div class='del'>-		tun-&gt;flags |= TUN_VNET_BE;</div><div class='del'>-	else</div><div class='del'>-		tun-&gt;flags &amp;= ~TUN_VNET_BE;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline bool tun_legacy_is_little_endian(struct tun_struct *tun)</div><div class='del'>-{</div><div class='del'>-	return virtio_legacy_is_little_endian();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long tun_get_vnet_be(struct tun_struct *tun, int __user *argp)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static long tun_set_vnet_be(struct tun_struct *tun, int __user *argp)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_TUN_VNET_CROSS_LE */</div><div class='del'>-</div><div class='del'>-static inline bool tun_is_little_endian(struct tun_struct *tun)</div><div class='del'>-{</div><div class='del'>-	return tun-&gt;flags &amp; TUN_VNET_LE ||</div><div class='del'>-		tun_legacy_is_little_endian(tun);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u16 tun16_to_cpu(struct tun_struct *tun, __virtio16 val)</div><div class='del'>-{</div><div class='del'>-	return __virtio16_to_cpu(tun_is_little_endian(tun), val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline __virtio16 cpu_to_tun16(struct tun_struct *tun, u16 val)</div><div class='del'>-{</div><div class='del'>-	return __cpu_to_virtio16(tun_is_little_endian(tun), val);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline u32 tun_hashfn(u32 rxhash)</div><div class='ctx'> {</div><div class='ctx'> 	return rxhash &amp; TUN_MASK_FLOW_ENTRIES;</div><div class='hunk'>@@ -442,7 +378,7 @@ static void tun_flow_delete_by_queue(struct tun_struct *tun, u16 queue_index)</div><div class='ctx'> </div><div class='ctx'> static void tun_flow_cleanup(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct tun_struct *tun = from_timer(tun, t, flow_gc_timer);</div><div class='add'>+	struct tun_struct *tun = timer_container_of(tun, t, flow_gc_timer);</div><div class='ctx'> 	unsigned long delay = tun-&gt;ageing_time;</div><div class='ctx'> 	unsigned long next_timer = jiffies + delay;</div><div class='ctx'> 	unsigned long count = 0;</div><div class='hunk'>@@ -580,7 +516,7 @@ static inline bool tun_not_capable(struct tun_struct *tun)</div><div class='ctx'> 	struct net *net = dev_net(tun-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return ((uid_valid(tun-&gt;owner) &amp;&amp; !uid_eq(cred-&gt;euid, tun-&gt;owner)) ||</div><div class='del'>-		  (gid_valid(tun-&gt;group) &amp;&amp; !in_egroup_p(tun-&gt;group))) &amp;&amp;</div><div class='add'>+		(gid_valid(tun-&gt;group) &amp;&amp; !in_egroup_p(tun-&gt;group))) &amp;&amp;</div><div class='ctx'> 		!ns_capable(net-&gt;user_ns, CAP_NET_ADMIN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -990,6 +926,7 @@ static int tun_net_init(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;hw_features = NETIF_F_SG | NETIF_F_FRAGLIST |</div><div class='ctx'> 			   TUN_USER_FEATURES | NETIF_F_HW_VLAN_CTAG_TX |</div><div class='ctx'> 			   NETIF_F_HW_VLAN_STAG_TX;</div><div class='add'>+	dev-&gt;hw_enc_features = dev-&gt;hw_features;</div><div class='ctx'> 	dev-&gt;features = dev-&gt;hw_features;</div><div class='ctx'> 	dev-&gt;vlan_features = dev-&gt;features &amp;</div><div class='ctx'> 			     ~(NETIF_F_HW_VLAN_CTAG_TX |</div><div class='hunk'>@@ -1065,8 +1002,8 @@ static unsigned int run_ebpf_filter(struct tun_struct *tun,</div><div class='ctx'> /* Net device start xmit */</div><div class='ctx'> static netdev_tx_t tun_net_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	enum skb_drop_reason drop_reason = SKB_DROP_REASON_NOT_SPECIFIED;</div><div class='ctx'> 	struct tun_struct *tun = netdev_priv(dev);</div><div class='del'>-	enum skb_drop_reason drop_reason;</div><div class='ctx'> 	int txq = skb-&gt;queue_mapping;</div><div class='ctx'> 	struct netdev_queue *queue;</div><div class='ctx'> 	struct tun_file *tfile;</div><div class='hunk'>@@ -1095,10 +1032,8 @@ static netdev_tx_t tun_net_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (tfile-&gt;socket.sk-&gt;sk_filter &amp;&amp;</div><div class='del'>-	    sk_filter(tfile-&gt;socket.sk, skb)) {</div><div class='del'>-		drop_reason = SKB_DROP_REASON_SOCKET_FILTER;</div><div class='add'>+	    sk_filter_reason(tfile-&gt;socket.sk, skb, &amp;drop_reason))</div><div class='ctx'> 		goto drop;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	len = run_ebpf_filter(tun, skb, len);</div><div class='ctx'> 	if (len == 0) {</div><div class='hunk'>@@ -1360,7 +1295,7 @@ static void tun_flow_init(struct tun_struct *tun)</div><div class='ctx'> </div><div class='ctx'> static void tun_flow_uninit(struct tun_struct *tun)</div><div class='ctx'> {</div><div class='del'>-	del_timer_sync(&amp;tun-&gt;flow_gc_timer);</div><div class='add'>+	timer_delete_sync(&amp;tun-&gt;flow_gc_timer);</div><div class='ctx'> 	tun_flow_flush(tun);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1481,7 +1416,7 @@ static struct sk_buff *tun_napi_alloc_frags(struct tun_file *tfile,</div><div class='ctx'> 	skb-&gt;truesize += skb-&gt;data_len;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 1; i &lt; it-&gt;nr_segs; i++) {</div><div class='del'>-		const struct iovec *iov = iter_iov(it);</div><div class='add'>+		const struct iovec *iov = iter_iov(it) + i;</div><div class='ctx'> 		size_t fragsz = iov-&gt;iov_len;</div><div class='ctx'> 		struct page *page;</div><div class='ctx'> 		void *frag;</div><div class='hunk'>@@ -1600,7 +1535,8 @@ static bool tun_can_build_skb(struct tun_struct *tun, struct tun_file *tfile,</div><div class='ctx'> </div><div class='ctx'> static struct sk_buff *__tun_build_skb(struct tun_file *tfile,</div><div class='ctx'> 				       struct page_frag *alloc_frag, char *buf,</div><div class='del'>-				       int buflen, int len, int pad)</div><div class='add'>+				       int buflen, int len, int pad,</div><div class='add'>+				       int metasize)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb = build_skb(buf, buflen);</div><div class='ctx'> </div><div class='hunk'>@@ -1609,6 +1545,8 @@ static struct sk_buff *__tun_build_skb(struct tun_file *tfile,</div><div class='ctx'> </div><div class='ctx'> 	skb_reserve(skb, pad);</div><div class='ctx'> 	skb_put(skb, len);</div><div class='add'>+	if (metasize)</div><div class='add'>+		skb_metadata_set(skb, metasize);</div><div class='ctx'> 	skb_set_owner_w(skb, tfile-&gt;socket.sk);</div><div class='ctx'> </div><div class='ctx'> 	get_page(alloc_frag-&gt;page);</div><div class='hunk'>@@ -1668,6 +1606,7 @@ static struct sk_buff *tun_build_skb(struct tun_struct *tun,</div><div class='ctx'> 	char *buf;</div><div class='ctx'> 	size_t copied;</div><div class='ctx'> 	int pad = TUN_RX_PAD;</div><div class='add'>+	int metasize = 0;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='hunk'>@@ -1695,7 +1634,7 @@ static struct sk_buff *tun_build_skb(struct tun_struct *tun,</div><div class='ctx'> 	if (hdr-&gt;gso_type || !xdp_prog) {</div><div class='ctx'> 		*skb_xdp = 1;</div><div class='ctx'> 		return __tun_build_skb(tfile, alloc_frag, buf, buflen, len,</div><div class='del'>-				       pad);</div><div class='add'>+				       pad, metasize);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	*skb_xdp = 0;</div><div class='hunk'>@@ -1709,7 +1648,7 @@ static struct sk_buff *tun_build_skb(struct tun_struct *tun,</div><div class='ctx'> 		u32 act;</div><div class='ctx'> </div><div class='ctx'> 		xdp_init_buff(&amp;xdp, buflen, &amp;tfile-&gt;xdp_rxq);</div><div class='del'>-		xdp_prepare_buff(&amp;xdp, buf, pad, len, false);</div><div class='add'>+		xdp_prepare_buff(&amp;xdp, buf, pad, len, true);</div><div class='ctx'> </div><div class='ctx'> 		act = bpf_prog_run_xdp(xdp_prog, &amp;xdp);</div><div class='ctx'> 		if (act == XDP_REDIRECT || act == XDP_TX) {</div><div class='hunk'>@@ -1730,12 +1669,18 @@ static struct sk_buff *tun_build_skb(struct tun_struct *tun,</div><div class='ctx'> </div><div class='ctx'> 		pad = xdp.data - xdp.data_hard_start;</div><div class='ctx'> 		len = xdp.data_end - xdp.data;</div><div class='add'>+</div><div class='add'>+		/* It is known that the xdp_buff was prepared with metadata</div><div class='add'>+		 * support, so the metasize will never be negative.</div><div class='add'>+		 */</div><div class='add'>+		metasize = xdp.data - xdp.data_meta;</div><div class='ctx'> 	}</div><div class='ctx'> 	bpf_net_ctx_clear(bpf_net_ctx);</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> 	local_bh_enable();</div><div class='ctx'> </div><div class='del'>-	return __tun_build_skb(tfile, alloc_frag, buf, buflen, len, pad);</div><div class='add'>+	return __tun_build_skb(tfile, alloc_frag, buf, buflen, len, pad,</div><div class='add'>+			       metasize);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	bpf_net_ctx_clear(bpf_net_ctx);</div><div class='hunk'>@@ -1753,15 +1698,26 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile,</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	size_t total_len = iov_iter_count(from);</div><div class='ctx'> 	size_t len = total_len, align = tun-&gt;align, linear;</div><div class='del'>-	struct virtio_net_hdr gso = { 0 };</div><div class='add'>+	struct virtio_net_hdr_v1_hash_tunnel hdr;</div><div class='add'>+	struct virtio_net_hdr *gso;</div><div class='ctx'> 	int good_linear;</div><div class='ctx'> 	int copylen;</div><div class='add'>+	int hdr_len = 0;</div><div class='ctx'> 	bool zerocopy = false;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u32 rxhash = 0;</div><div class='ctx'> 	int skb_xdp = 1;</div><div class='ctx'> 	bool frags = tun_napi_frags_enabled(tfile);</div><div class='ctx'> 	enum skb_drop_reason drop_reason = SKB_DROP_REASON_NOT_SPECIFIED;</div><div class='add'>+	netdev_features_t features = 0;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Keep it easy and always zero the whole buffer, even if the</div><div class='add'>+	 * tunnel-related field will be touched only when the feature</div><div class='add'>+	 * is enabled and the hdr size id compatible.</div><div class='add'>+	 */</div><div class='add'>+	memset(&amp;hdr, 0, sizeof(hdr));</div><div class='add'>+	gso = (struct virtio_net_hdr *)&amp;hdr;</div><div class='ctx'> </div><div class='ctx'> 	if (!(tun-&gt;flags &amp; IFF_NO_PI)) {</div><div class='ctx'> 		if (len &lt; sizeof(pi))</div><div class='hunk'>@@ -1775,26 +1731,18 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile,</div><div class='ctx'> 	if (tun-&gt;flags &amp; IFF_VNET_HDR) {</div><div class='ctx'> 		int vnet_hdr_sz = READ_ONCE(tun-&gt;vnet_hdr_sz);</div><div class='ctx'> </div><div class='del'>-		if (len &lt; vnet_hdr_sz)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		len -= vnet_hdr_sz;</div><div class='add'>+		features = tun_vnet_hdr_guest_features(vnet_hdr_sz);</div><div class='add'>+		hdr_len = __tun_vnet_hdr_get(vnet_hdr_sz, tun-&gt;flags,</div><div class='add'>+					     features, from, gso);</div><div class='add'>+		if (hdr_len &lt; 0)</div><div class='add'>+			return hdr_len;</div><div class='ctx'> </div><div class='del'>-		if (!copy_from_iter_full(&amp;gso, sizeof(gso), from))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-</div><div class='del'>-		if ((gso.flags &amp; VIRTIO_NET_HDR_F_NEEDS_CSUM) &amp;&amp;</div><div class='del'>-		    tun16_to_cpu(tun, gso.csum_start) + tun16_to_cpu(tun, gso.csum_offset) + 2 &gt; tun16_to_cpu(tun, gso.hdr_len))</div><div class='del'>-			gso.hdr_len = cpu_to_tun16(tun, tun16_to_cpu(tun, gso.csum_start) + tun16_to_cpu(tun, gso.csum_offset) + 2);</div><div class='del'>-</div><div class='del'>-		if (tun16_to_cpu(tun, gso.hdr_len) &gt; len)</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		iov_iter_advance(from, vnet_hdr_sz - sizeof(gso));</div><div class='add'>+		len -= vnet_hdr_sz;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((tun-&gt;flags &amp; TUN_TYPE_MASK) == IFF_TAP) {</div><div class='ctx'> 		align += NET_IP_ALIGN;</div><div class='del'>-		if (unlikely(len &lt; ETH_HLEN ||</div><div class='del'>-			     (gso.hdr_len &amp;&amp; tun16_to_cpu(tun, gso.hdr_len) &lt; ETH_HLEN)))</div><div class='add'>+		if (unlikely(len &lt; ETH_HLEN || (hdr_len &amp;&amp; hdr_len &lt; ETH_HLEN)))</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1807,9 +1755,7 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile,</div><div class='ctx'> 		 * enough room for skb expand head in case it is used.</div><div class='ctx'> 		 * The rest of the buffer is mapped from userspace.</div><div class='ctx'> 		 */</div><div class='del'>-		copylen = gso.hdr_len ? tun16_to_cpu(tun, gso.hdr_len) : GOODCOPY_LEN;</div><div class='del'>-		if (copylen &gt; good_linear)</div><div class='del'>-			copylen = good_linear;</div><div class='add'>+		copylen = min(hdr_len ? hdr_len : GOODCOPY_LEN, good_linear);</div><div class='ctx'> 		linear = copylen;</div><div class='ctx'> 		iov_iter_advance(&amp;i, copylen);</div><div class='ctx'> 		if (iov_iter_npages(&amp;i, INT_MAX) &lt;= MAX_SKB_FRAGS)</div><div class='hunk'>@@ -1821,7 +1767,7 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile,</div><div class='ctx'> 		 * (e.g gso or jumbo packet), we will do it at after</div><div class='ctx'> 		 * skb was created with generic XDP routine.</div><div class='ctx'> 		 */</div><div class='del'>-		skb = tun_build_skb(tun, tfile, from, &amp;gso, len, &amp;skb_xdp);</div><div class='add'>+		skb = tun_build_skb(tun, tfile, from, gso, len, &amp;skb_xdp);</div><div class='ctx'> 		err = PTR_ERR_OR_ZERO(skb);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto drop;</div><div class='hunk'>@@ -1830,10 +1776,7 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile,</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (!zerocopy) {</div><div class='ctx'> 			copylen = len;</div><div class='del'>-			if (tun16_to_cpu(tun, gso.hdr_len) &gt; good_linear)</div><div class='del'>-				linear = good_linear;</div><div class='del'>-			else</div><div class='del'>-				linear = tun16_to_cpu(tun, gso.hdr_len);</div><div class='add'>+			linear = min(hdr_len, good_linear);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (frags) {</div><div class='hunk'>@@ -1868,7 +1811,7 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (virtio_net_hdr_to_skb(skb, &amp;gso, tun_is_little_endian(tun))) {</div><div class='add'>+	if (tun_vnet_hdr_tnl_to_skb(tun-&gt;flags, features, skb, &amp;hdr)) {</div><div class='ctx'> 		atomic_long_inc(&amp;tun-&gt;rx_frame_errors);</div><div class='ctx'> 		err = -EINVAL;</div><div class='ctx'> 		goto free_skb;</div><div class='hunk'>@@ -1932,6 +1875,9 @@ static ssize_t tun_get_user(struct tun_struct *tun, struct tun_file *tfile,</div><div class='ctx'> 				local_bh_enable();</div><div class='ctx'> 				goto unlock_frags;</div><div class='ctx'> 			}</div><div class='add'>+</div><div class='add'>+			if (frags &amp;&amp; skb != tfile-&gt;napi.skb)</div><div class='add'>+				tfile-&gt;napi.skb = skb;</div><div class='ctx'> 		}</div><div class='ctx'> 		rcu_read_unlock();</div><div class='ctx'> 		local_bh_enable();</div><div class='hunk'>@@ -2063,18 +2009,15 @@ static ssize_t tun_put_user_xdp(struct tun_struct *tun,</div><div class='ctx'> {</div><div class='ctx'> 	int vnet_hdr_sz = 0;</div><div class='ctx'> 	size_t size = xdp_frame-&gt;len;</div><div class='del'>-	size_t ret;</div><div class='add'>+	ssize_t ret;</div><div class='ctx'> </div><div class='ctx'> 	if (tun-&gt;flags &amp; IFF_VNET_HDR) {</div><div class='ctx'> 		struct virtio_net_hdr gso = { 0 };</div><div class='ctx'> </div><div class='ctx'> 		vnet_hdr_sz = READ_ONCE(tun-&gt;vnet_hdr_sz);</div><div class='del'>-		if (unlikely(iov_iter_count(iter) &lt; vnet_hdr_sz))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		if (unlikely(copy_to_iter(&amp;gso, sizeof(gso), iter) !=</div><div class='del'>-			     sizeof(gso)))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		iov_iter_advance(iter, vnet_hdr_sz - sizeof(gso));</div><div class='add'>+		ret = tun_vnet_hdr_put(vnet_hdr_sz, iter, &amp;gso);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = copy_to_iter(xdp_frame-&gt;data, size, iter) + vnet_hdr_sz;</div><div class='hunk'>@@ -2097,6 +2040,7 @@ static ssize_t tun_put_user(struct tun_struct *tun,</div><div class='ctx'> 	int vlan_offset = 0;</div><div class='ctx'> 	int vlan_hlen = 0;</div><div class='ctx'> 	int vnet_hdr_sz = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (skb_vlan_tag_present(skb))</div><div class='ctx'> 		vlan_hlen = VLAN_HLEN;</div><div class='hunk'>@@ -2121,33 +2065,23 @@ static ssize_t tun_put_user(struct tun_struct *tun,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vnet_hdr_sz) {</div><div class='del'>-		struct virtio_net_hdr gso;</div><div class='del'>-</div><div class='del'>-		if (iov_iter_count(iter) &lt; vnet_hdr_sz)</div><div class='del'>-			return -EINVAL;</div><div class='add'>+		struct virtio_net_hdr_v1_hash_tunnel hdr;</div><div class='add'>+		struct virtio_net_hdr *gso;</div><div class='ctx'> </div><div class='del'>-		if (virtio_net_hdr_from_skb(skb, &amp;gso,</div><div class='del'>-					    tun_is_little_endian(tun), true,</div><div class='del'>-					    vlan_hlen)) {</div><div class='del'>-			struct skb_shared_info *sinfo = skb_shinfo(skb);</div><div class='del'>-</div><div class='del'>-			if (net_ratelimit()) {</div><div class='del'>-				netdev_err(tun-&gt;dev, "unexpected GSO type: 0x%x, gso_size %d, hdr_len %d\n",</div><div class='del'>-					   sinfo-&gt;gso_type, tun16_to_cpu(tun, gso.gso_size),</div><div class='del'>-					   tun16_to_cpu(tun, gso.hdr_len));</div><div class='del'>-				print_hex_dump(KERN_ERR, "tun: ",</div><div class='del'>-					       DUMP_PREFIX_NONE,</div><div class='del'>-					       16, 1, skb-&gt;head,</div><div class='del'>-					       min((int)tun16_to_cpu(tun, gso.hdr_len), 64), true);</div><div class='del'>-			}</div><div class='del'>-			WARN_ON_ONCE(1);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (copy_to_iter(&amp;gso, sizeof(gso), iter) != sizeof(gso))</div><div class='del'>-			return -EFAULT;</div><div class='add'>+		ret = tun_vnet_hdr_tnl_from_skb(tun-&gt;flags, tun-&gt;dev, skb,</div><div class='add'>+						&amp;hdr);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		iov_iter_advance(iter, vnet_hdr_sz - sizeof(gso));</div><div class='add'>+		/*</div><div class='add'>+		 * Drop the packet if the configured header size is too small</div><div class='add'>+		 * WRT the enabled offloads.</div><div class='add'>+		 */</div><div class='add'>+		gso = (struct virtio_net_hdr *)&amp;hdr;</div><div class='add'>+		ret = __tun_vnet_hdr_put(vnet_hdr_sz, tun-&gt;dev-&gt;features,</div><div class='add'>+					 iter, gso);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vlan_hlen) {</div><div class='hunk'>@@ -2445,13 +2379,15 @@ static int tun_xdp_one(struct tun_struct *tun,</div><div class='ctx'> 		       struct tun_page *tpage)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int datasize = xdp-&gt;data_end - xdp-&gt;data;</div><div class='del'>-	struct tun_xdp_hdr *hdr = xdp-&gt;data_hard_start;</div><div class='del'>-	struct virtio_net_hdr *gso = &amp;hdr-&gt;gso;</div><div class='add'>+	struct virtio_net_hdr *gso = xdp-&gt;data_hard_start;</div><div class='add'>+	struct virtio_net_hdr_v1_hash_tunnel *tnl_hdr;</div><div class='ctx'> 	struct bpf_prog *xdp_prog;</div><div class='ctx'> 	struct sk_buff *skb = NULL;</div><div class='ctx'> 	struct sk_buff_head *queue;</div><div class='add'>+	netdev_features_t features;</div><div class='ctx'> 	u32 rxhash = 0, act;</div><div class='del'>-	int buflen = hdr-&gt;buflen;</div><div class='add'>+	int buflen = xdp-&gt;frame_sz;</div><div class='add'>+	int metasize = 0;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	bool skb_xdp = false;</div><div class='ctx'> 	struct page *page;</div><div class='hunk'>@@ -2467,7 +2403,6 @@ static int tun_xdp_one(struct tun_struct *tun,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		xdp_init_buff(xdp, buflen, &amp;tfile-&gt;xdp_rxq);</div><div class='del'>-		xdp_set_data_meta_invalid(xdp);</div><div class='ctx'> </div><div class='ctx'> 		act = bpf_prog_run_xdp(xdp_prog, xdp);</div><div class='ctx'> 		ret = tun_xdp_act(tun, xdp_prog, xdp, act);</div><div class='hunk'>@@ -2507,7 +2442,17 @@ build:</div><div class='ctx'> 	skb_reserve(skb, xdp-&gt;data - xdp-&gt;data_hard_start);</div><div class='ctx'> 	skb_put(skb, xdp-&gt;data_end - xdp-&gt;data);</div><div class='ctx'> </div><div class='del'>-	if (virtio_net_hdr_to_skb(skb, gso, tun_is_little_endian(tun))) {</div><div class='add'>+	/* The externally provided xdp_buff may have no metadata support, which</div><div class='add'>+	 * is marked by xdp-&gt;data_meta being xdp-&gt;data + 1. This will lead to a</div><div class='add'>+	 * metasize of -1 and is the reason why the condition checks for &gt; 0.</div><div class='add'>+	 */</div><div class='add'>+	metasize = xdp-&gt;data - xdp-&gt;data_meta;</div><div class='add'>+	if (metasize &gt; 0)</div><div class='add'>+		skb_metadata_set(skb, metasize);</div><div class='add'>+</div><div class='add'>+	features = tun_vnet_hdr_guest_features(READ_ONCE(tun-&gt;vnet_hdr_sz));</div><div class='add'>+	tnl_hdr = (struct virtio_net_hdr_v1_hash_tunnel *)gso;</div><div class='add'>+	if (tun_vnet_hdr_tnl_to_skb(tun-&gt;flags, features, skb, tnl_hdr)) {</div><div class='ctx'> 		atomic_long_inc(&amp;tun-&gt;rx_frame_errors);</div><div class='ctx'> 		kfree_skb(skb);</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -2881,18 +2826,20 @@ static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr)</div><div class='ctx'> 	if (netif_running(tun-&gt;dev))</div><div class='ctx'> 		netif_tx_wake_all_queues(tun-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	strcpy(ifr-&gt;ifr_name, tun-&gt;dev-&gt;name);</div><div class='add'>+	strscpy(ifr-&gt;ifr_name, tun-&gt;dev-&gt;name);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void tun_get_iff(struct tun_struct *tun, struct ifreq *ifr)</div><div class='ctx'> {</div><div class='del'>-	strcpy(ifr-&gt;ifr_name, tun-&gt;dev-&gt;name);</div><div class='add'>+	strscpy(ifr-&gt;ifr_name, tun-&gt;dev-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	ifr-&gt;ifr_flags = tun_flags(tun);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define PLAIN_GSO (NETIF_F_GSO_UDP_L4 | NETIF_F_TSO | NETIF_F_TSO6)</div><div class='add'>+</div><div class='ctx'> /* This is like a cut-down ethtool ops, except done via tun fd so no</div><div class='ctx'>  * privs required. */</div><div class='ctx'> static int set_offload(struct tun_struct *tun, unsigned long arg)</div><div class='hunk'>@@ -2922,6 +2869,18 @@ static int set_offload(struct tun_struct *tun, unsigned long arg)</div><div class='ctx'> 			features |= NETIF_F_GSO_UDP_L4;</div><div class='ctx'> 			arg &amp;= ~(TUN_F_USO4 | TUN_F_USO6);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Tunnel offload is allowed only if some plain offload is</div><div class='add'>+		 * available, too.</div><div class='add'>+		 */</div><div class='add'>+		if (features &amp; PLAIN_GSO &amp;&amp; arg &amp; TUN_F_UDP_TUNNEL_GSO) {</div><div class='add'>+			features |= NETIF_F_GSO_UDP_TUNNEL;</div><div class='add'>+			if (arg &amp; TUN_F_UDP_TUNNEL_GSO_CSUM)</div><div class='add'>+				features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;</div><div class='add'>+			arg &amp;= ~(TUN_F_UDP_TUNNEL_GSO |</div><div class='add'>+				 TUN_F_UDP_TUNNEL_GSO_CSUM);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* This gives the user a way to test for new features in future by</div><div class='hunk'>@@ -3091,8 +3050,6 @@ static long __tun_chr_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> 	kgid_t group;</div><div class='ctx'> 	int ifindex;</div><div class='ctx'> 	int sndbuf;</div><div class='del'>-	int vnet_hdr_sz;</div><div class='del'>-	int le;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	bool do_notify = false;</div><div class='ctx'> </div><div class='hunk'>@@ -3269,14 +3226,20 @@ static long __tun_chr_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> </div><div class='ctx'> 	case SIOCGIFHWADDR:</div><div class='ctx'> 		/* Get hw address */</div><div class='del'>-		dev_get_mac_address(&amp;ifr.ifr_hwaddr, net, tun-&gt;dev-&gt;name);</div><div class='add'>+		netif_get_mac_address(&amp;ifr.ifr_hwaddr, net, tun-&gt;dev-&gt;name);</div><div class='ctx'> 		if (copy_to_user(argp, &amp;ifr, ifreq_len))</div><div class='ctx'> 			ret = -EFAULT;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case SIOCSIFHWADDR:</div><div class='ctx'> 		/* Set hw address */</div><div class='del'>-		ret = dev_set_mac_address_user(tun-&gt;dev, &amp;ifr.ifr_hwaddr, NULL);</div><div class='add'>+		if (tun-&gt;dev-&gt;addr_len &gt; sizeof(ifr.ifr_hwaddr)) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		ret = dev_set_mac_address_user(tun-&gt;dev,</div><div class='add'>+					       (struct sockaddr_storage *)&amp;ifr.ifr_hwaddr,</div><div class='add'>+					       NULL);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case TUNGETSNDBUF:</div><div class='hunk'>@@ -3299,50 +3262,6 @@ static long __tun_chr_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> 		tun_set_sndbuf(tun);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	case TUNGETVNETHDRSZ:</div><div class='del'>-		vnet_hdr_sz = tun-&gt;vnet_hdr_sz;</div><div class='del'>-		if (copy_to_user(argp, &amp;vnet_hdr_sz, sizeof(vnet_hdr_sz)))</div><div class='del'>-			ret = -EFAULT;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case TUNSETVNETHDRSZ:</div><div class='del'>-		if (copy_from_user(&amp;vnet_hdr_sz, argp, sizeof(vnet_hdr_sz))) {</div><div class='del'>-			ret = -EFAULT;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (vnet_hdr_sz &lt; (int)sizeof(struct virtio_net_hdr)) {</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		tun-&gt;vnet_hdr_sz = vnet_hdr_sz;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case TUNGETVNETLE:</div><div class='del'>-		le = !!(tun-&gt;flags &amp; TUN_VNET_LE);</div><div class='del'>-		if (put_user(le, (int __user *)argp))</div><div class='del'>-			ret = -EFAULT;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case TUNSETVNETLE:</div><div class='del'>-		if (get_user(le, (int __user *)argp)) {</div><div class='del'>-			ret = -EFAULT;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (le)</div><div class='del'>-			tun-&gt;flags |= TUN_VNET_LE;</div><div class='del'>-		else</div><div class='del'>-			tun-&gt;flags &amp;= ~TUN_VNET_LE;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case TUNGETVNETBE:</div><div class='del'>-		ret = tun_get_vnet_be(tun, argp);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case TUNSETVNETBE:</div><div class='del'>-		ret = tun_set_vnet_be(tun, argp);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='ctx'> 	case TUNATTACHFILTER:</div><div class='ctx'> 		/* Can be set only for TAPs */</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -3398,7 +3317,7 @@ static long __tun_chr_ioctl(struct file *file, unsigned int cmd,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+		ret = tun_vnet_ioctl(&amp;tun-&gt;vnet_hdr_sz, &amp;tun-&gt;flags, cmd, argp);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3697,9 +3616,9 @@ static int tun_queue_resize(struct tun_struct *tun)</div><div class='ctx'> 	list_for_each_entry(tfile, &amp;tun-&gt;disabled, next)</div><div class='ctx'> 		rings[i++] = &amp;tfile-&gt;tx_ring;</div><div class='ctx'> </div><div class='del'>-	ret = ptr_ring_resize_multiple(rings, n,</div><div class='del'>-				       dev-&gt;tx_queue_len, GFP_KERNEL,</div><div class='del'>-				       tun_ptr_free);</div><div class='add'>+	ret = ptr_ring_resize_multiple_bh(rings, n,</div><div class='add'>+					  dev-&gt;tx_queue_len, GFP_KERNEL,</div><div class='add'>+					  tun_ptr_free);</div><div class='ctx'> </div><div class='ctx'> 	kfree(rings);</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -3816,3 +3735,4 @@ MODULE_AUTHOR(DRV_COPYRIGHT);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_ALIAS_MISCDEV(TUN_MINOR);</div><div class='ctx'> MODULE_ALIAS("devname:net/tun");</div><div class='add'>+MODULE_IMPORT_NS("NETDEV_INTERNAL");</div><div class='head'>diff --git a/drivers/net/tun_vnet.h b/drivers/net/tun_vnet.h<br/>new file mode 100644<br/>index 000000000000..a5f93b6c4482<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/tun_vnet.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/tun_vnet.h</a></div><div class='hunk'>@@ -0,0 +1,269 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+#ifndef TUN_VNET_H</div><div class='add'>+#define TUN_VNET_H</div><div class='add'>+</div><div class='add'>+/* High bits in flags field are unused. */</div><div class='add'>+#define TUN_VNET_LE     0x80000000</div><div class='add'>+#define TUN_VNET_BE     0x40000000</div><div class='add'>+</div><div class='add'>+#define TUN_VNET_TNL_SIZE	sizeof(struct virtio_net_hdr_v1_hash_tunnel)</div><div class='add'>+</div><div class='add'>+static inline bool tun_vnet_legacy_is_little_endian(unsigned int flags)</div><div class='add'>+{</div><div class='add'>+	bool be = IS_ENABLED(CONFIG_TUN_VNET_CROSS_LE) &amp;&amp;</div><div class='add'>+		  (flags &amp; TUN_VNET_BE);</div><div class='add'>+</div><div class='add'>+	return !be &amp;&amp; virtio_legacy_is_little_endian();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline long tun_get_vnet_be(unsigned int flags, int __user *argp)</div><div class='add'>+{</div><div class='add'>+	int be = !!(flags &amp; TUN_VNET_BE);</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_TUN_VNET_CROSS_LE))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (put_user(be, argp))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline long tun_set_vnet_be(unsigned int *flags, int __user *argp)</div><div class='add'>+{</div><div class='add'>+	int be;</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_TUN_VNET_CROSS_LE))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (get_user(be, argp))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (be)</div><div class='add'>+		*flags |= TUN_VNET_BE;</div><div class='add'>+	else</div><div class='add'>+		*flags &amp;= ~TUN_VNET_BE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool tun_vnet_is_little_endian(unsigned int flags)</div><div class='add'>+{</div><div class='add'>+	return flags &amp; TUN_VNET_LE || tun_vnet_legacy_is_little_endian(flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 tun_vnet16_to_cpu(unsigned int flags, __virtio16 val)</div><div class='add'>+{</div><div class='add'>+	return __virtio16_to_cpu(tun_vnet_is_little_endian(flags), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline __virtio16 cpu_to_tun_vnet16(unsigned int flags, u16 val)</div><div class='add'>+{</div><div class='add'>+	return __cpu_to_virtio16(tun_vnet_is_little_endian(flags), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline long tun_vnet_ioctl(int *vnet_hdr_sz, unsigned int *flags,</div><div class='add'>+				  unsigned int cmd, int __user *sp)</div><div class='add'>+{</div><div class='add'>+	int s;</div><div class='add'>+</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case TUNGETVNETHDRSZ:</div><div class='add'>+		s = *vnet_hdr_sz;</div><div class='add'>+		if (put_user(s, sp))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case TUNSETVNETHDRSZ:</div><div class='add'>+		if (get_user(s, sp))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		if (s &lt; (int)sizeof(struct virtio_net_hdr))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		*vnet_hdr_sz = s;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case TUNGETVNETLE:</div><div class='add'>+		s = !!(*flags &amp; TUN_VNET_LE);</div><div class='add'>+		if (put_user(s, sp))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case TUNSETVNETLE:</div><div class='add'>+		if (get_user(s, sp))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		if (s)</div><div class='add'>+			*flags |= TUN_VNET_LE;</div><div class='add'>+		else</div><div class='add'>+			*flags &amp;= ~TUN_VNET_LE;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case TUNGETVNETBE:</div><div class='add'>+		return tun_get_vnet_be(*flags, sp);</div><div class='add'>+</div><div class='add'>+	case TUNSETVNETBE:</div><div class='add'>+		return tun_set_vnet_be(flags, sp);</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int tun_vnet_parse_size(netdev_features_t features)</div><div class='add'>+{</div><div class='add'>+	if (!(features &amp; NETIF_F_GSO_UDP_TUNNEL))</div><div class='add'>+		return sizeof(struct virtio_net_hdr);</div><div class='add'>+</div><div class='add'>+	return TUN_VNET_TNL_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int __tun_vnet_hdr_get(int sz, unsigned int flags,</div><div class='add'>+				     netdev_features_t features,</div><div class='add'>+				     struct iov_iter *from,</div><div class='add'>+				     struct virtio_net_hdr *hdr)</div><div class='add'>+{</div><div class='add'>+	unsigned int parsed_size = tun_vnet_parse_size(features);</div><div class='add'>+	u16 hdr_len;</div><div class='add'>+</div><div class='add'>+	if (iov_iter_count(from) &lt; sz)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!copy_from_iter_full(hdr, parsed_size, from))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	hdr_len = tun_vnet16_to_cpu(flags, hdr-&gt;hdr_len);</div><div class='add'>+</div><div class='add'>+	if (hdr-&gt;flags &amp; VIRTIO_NET_HDR_F_NEEDS_CSUM) {</div><div class='add'>+		hdr_len = max(tun_vnet16_to_cpu(flags, hdr-&gt;csum_start) + tun_vnet16_to_cpu(flags, hdr-&gt;csum_offset) + 2, hdr_len);</div><div class='add'>+		hdr-&gt;hdr_len = cpu_to_tun_vnet16(flags, hdr_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hdr_len &gt; iov_iter_count(from))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	iov_iter_advance(from, sz - parsed_size);</div><div class='add'>+</div><div class='add'>+	return hdr_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tun_vnet_hdr_get(int sz, unsigned int flags,</div><div class='add'>+				   struct iov_iter *from,</div><div class='add'>+				   struct virtio_net_hdr *hdr)</div><div class='add'>+{</div><div class='add'>+	return __tun_vnet_hdr_get(sz, flags, 0, from, hdr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int __tun_vnet_hdr_put(int sz, netdev_features_t features,</div><div class='add'>+				     struct iov_iter *iter,</div><div class='add'>+				     const struct virtio_net_hdr *hdr)</div><div class='add'>+{</div><div class='add'>+	unsigned int parsed_size = tun_vnet_parse_size(features);</div><div class='add'>+</div><div class='add'>+	if (unlikely(iov_iter_count(iter) &lt; sz))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (unlikely(copy_to_iter(hdr, parsed_size, iter) != parsed_size))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (iov_iter_zero(sz - parsed_size, iter) != sz - parsed_size)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tun_vnet_hdr_put(int sz, struct iov_iter *iter,</div><div class='add'>+				   const struct virtio_net_hdr *hdr)</div><div class='add'>+{</div><div class='add'>+	return __tun_vnet_hdr_put(sz, 0, iter, hdr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tun_vnet_hdr_to_skb(unsigned int flags, struct sk_buff *skb,</div><div class='add'>+				      const struct virtio_net_hdr *hdr)</div><div class='add'>+{</div><div class='add'>+	return virtio_net_hdr_to_skb(skb, hdr, tun_vnet_is_little_endian(flags));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Tun is not aware of the negotiated guest features, guess them from the</div><div class='add'>+ * virtio net hdr size</div><div class='add'>+ */</div><div class='add'>+static inline netdev_features_t tun_vnet_hdr_guest_features(int vnet_hdr_sz)</div><div class='add'>+{</div><div class='add'>+	if (vnet_hdr_sz &gt;= TUN_VNET_TNL_SIZE)</div><div class='add'>+		return NETIF_F_GSO_UDP_TUNNEL | NETIF_F_GSO_UDP_TUNNEL_CSUM;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+tun_vnet_hdr_tnl_to_skb(unsigned int flags, netdev_features_t features,</div><div class='add'>+			struct sk_buff *skb,</div><div class='add'>+			const struct virtio_net_hdr_v1_hash_tunnel *hdr)</div><div class='add'>+{</div><div class='add'>+	return virtio_net_hdr_tnl_to_skb(skb, hdr,</div><div class='add'>+				features &amp; NETIF_F_GSO_UDP_TUNNEL,</div><div class='add'>+				features &amp; NETIF_F_GSO_UDP_TUNNEL_CSUM,</div><div class='add'>+				tun_vnet_is_little_endian(flags));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int tun_vnet_hdr_from_skb(unsigned int flags,</div><div class='add'>+					const struct net_device *dev,</div><div class='add'>+					const struct sk_buff *skb,</div><div class='add'>+					struct virtio_net_hdr *hdr)</div><div class='add'>+{</div><div class='add'>+	int vlan_hlen = skb_vlan_tag_present(skb) ? VLAN_HLEN : 0;</div><div class='add'>+</div><div class='add'>+	if (virtio_net_hdr_from_skb(skb, hdr,</div><div class='add'>+				    tun_vnet_is_little_endian(flags), true,</div><div class='add'>+				    vlan_hlen)) {</div><div class='add'>+		struct skb_shared_info *sinfo = skb_shinfo(skb);</div><div class='add'>+</div><div class='add'>+		if (net_ratelimit()) {</div><div class='add'>+			netdev_err(dev, "unexpected GSO type: 0x%x, gso_size %d, hdr_len %d\n",</div><div class='add'>+				   sinfo-&gt;gso_type, tun_vnet16_to_cpu(flags, hdr-&gt;gso_size),</div><div class='add'>+				   tun_vnet16_to_cpu(flags, hdr-&gt;hdr_len));</div><div class='add'>+			print_hex_dump(KERN_ERR, "tun: ",</div><div class='add'>+				       DUMP_PREFIX_NONE,</div><div class='add'>+				       16, 1, skb-&gt;head,</div><div class='add'>+				       min(tun_vnet16_to_cpu(flags, hdr-&gt;hdr_len), 64), true);</div><div class='add'>+		}</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+tun_vnet_hdr_tnl_from_skb(unsigned int flags,</div><div class='add'>+			  const struct net_device *dev,</div><div class='add'>+			  const struct sk_buff *skb,</div><div class='add'>+			  struct virtio_net_hdr_v1_hash_tunnel *tnl_hdr)</div><div class='add'>+{</div><div class='add'>+	bool has_tnl_offload = !!(dev-&gt;features &amp; NETIF_F_GSO_UDP_TUNNEL);</div><div class='add'>+	int vlan_hlen = skb_vlan_tag_present(skb) ? VLAN_HLEN : 0;</div><div class='add'>+</div><div class='add'>+	if (virtio_net_hdr_tnl_from_skb(skb, tnl_hdr, has_tnl_offload,</div><div class='add'>+					tun_vnet_is_little_endian(flags),</div><div class='add'>+					vlan_hlen, true)) {</div><div class='add'>+		struct virtio_net_hdr_v1 *hdr = &amp;tnl_hdr-&gt;hash_hdr.hdr;</div><div class='add'>+		struct skb_shared_info *sinfo = skb_shinfo(skb);</div><div class='add'>+</div><div class='add'>+		if (net_ratelimit()) {</div><div class='add'>+			int hdr_len = tun_vnet16_to_cpu(flags, hdr-&gt;hdr_len);</div><div class='add'>+</div><div class='add'>+			netdev_err(dev, "unexpected GSO type: 0x%x, gso_size %d, hdr_len %d\n",</div><div class='add'>+				   sinfo-&gt;gso_type,</div><div class='add'>+				   tun_vnet16_to_cpu(flags, hdr-&gt;gso_size),</div><div class='add'>+				   tun_vnet16_to_cpu(flags, hdr-&gt;hdr_len));</div><div class='add'>+			print_hex_dump(KERN_ERR, "tun: ", DUMP_PREFIX_NONE,</div><div class='add'>+				       16, 1, skb-&gt;head, min(hdr_len, 64),</div><div class='add'>+				       true);</div><div class='add'>+		}</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* TUN_VNET_H */</div><div class='head'>diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig<br/>index 3c360d4f0635..856e648d804e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/Kconfig</a></div><div class='hunk'>@@ -101,9 +101,7 @@ config USB_RTL8152</div><div class='ctx'> 	select MII</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	select CRC32</div><div class='del'>-	select CRYPTO</div><div class='del'>-	select CRYPTO_HASH</div><div class='del'>-	select CRYPTO_SHA256</div><div class='add'>+	select CRYPTO_LIB_SHA256</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option adds support for Realtek RTL8152 based USB 2.0</div><div class='ctx'> 	  10/100 Ethernet adapters and RTL8153 based USB 3.0 10/100/1000</div><div class='hunk'>@@ -115,10 +113,10 @@ config USB_RTL8152</div><div class='ctx'> config USB_LAN78XX</div><div class='ctx'> 	tristate "Microchip LAN78XX Based USB Ethernet Adapters"</div><div class='ctx'> 	select MII</div><div class='del'>-	select PHYLIB</div><div class='add'>+	select PHYLINK</div><div class='ctx'> 	select MICROCHIP_PHY</div><div class='del'>-	select FIXED_PHY</div><div class='ctx'> 	select CRC32</div><div class='add'>+	imply NET_SELFTESTS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This option adds support for Microchip LAN78XX based USB 2</div><div class='ctx'> 	  &amp; USB 3 10/100/1000 Ethernet adapters.</div><div class='head'>diff --git a/drivers/net/usb/aqc111.c b/drivers/net/usb/aqc111.c<br/>index ff5be2cbf17b..9201ee10a13f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/aqc111.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/aqc111.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/aqc111.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/aqc111.c</a></div><div class='hunk'>@@ -30,11 +30,14 @@ static int aqc111_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,</div><div class='ctx'> 	ret = usbnet_read_cmd_nopm(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR |</div><div class='ctx'> 				   USB_RECIP_DEVICE, value, index, data, size);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(ret &lt; 0))</div><div class='add'>+	if (unlikely(ret &lt; size)) {</div><div class='ctx'> 		netdev_warn(dev-&gt;net,</div><div class='ctx'> 			    "Failed to read(0x%x) reg index 0x%04x: %d\n",</div><div class='ctx'> 			    cmd, index, ret);</div><div class='ctx'> </div><div class='add'>+		ret = ret &lt; 0 ? ret : -ENODATA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -46,11 +49,14 @@ static int aqc111_read_cmd(struct usbnet *dev, u8 cmd, u16 value,</div><div class='ctx'> 	ret = usbnet_read_cmd(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR |</div><div class='ctx'> 			      USB_RECIP_DEVICE, value, index, data, size);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(ret &lt; 0))</div><div class='add'>+	if (unlikely(ret &lt; size)) {</div><div class='ctx'> 		netdev_warn(dev-&gt;net,</div><div class='ctx'> 			    "Failed to read(0x%x) reg index 0x%04x: %d\n",</div><div class='ctx'> 			    cmd, index, ret);</div><div class='ctx'> </div><div class='add'>+		ret = ret &lt; 0 ? ret : -ENODATA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/usb/asix.h b/drivers/net/usb/asix.h<br/>index 74162190bccc..8531b804021a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/asix.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/asix.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/asix.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/asix.h</a></div><div class='hunk'>@@ -224,7 +224,6 @@ int asix_write_rx_ctl(struct usbnet *dev, u16 mode, int in_pm);</div><div class='ctx'> </div><div class='ctx'> u16 asix_read_medium_status(struct usbnet *dev, int in_pm);</div><div class='ctx'> int asix_write_medium_mode(struct usbnet *dev, u16 mode, int in_pm);</div><div class='del'>-void asix_adjust_link(struct net_device *netdev);</div><div class='ctx'> </div><div class='ctx'> int asix_write_gpio(struct usbnet *dev, u16 value, int sleep, int in_pm);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/usb/asix_common.c b/drivers/net/usb/asix_common.c<br/>index 72ffc89b477a..7fd763917ae2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/asix_common.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/asix_common.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/asix_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/asix_common.c</a></div><div class='hunk'>@@ -414,28 +414,6 @@ int asix_write_medium_mode(struct usbnet *dev, u16 mode, int in_pm)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* set MAC link settings according to information from phylib */</div><div class='del'>-void asix_adjust_link(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct phy_device *phydev = netdev-&gt;phydev;</div><div class='del'>-	struct usbnet *dev = netdev_priv(netdev);</div><div class='del'>-	u16 mode = 0;</div><div class='del'>-</div><div class='del'>-	if (phydev-&gt;link) {</div><div class='del'>-		mode = AX88772_MEDIUM_DEFAULT;</div><div class='del'>-</div><div class='del'>-		if (phydev-&gt;duplex == DUPLEX_HALF)</div><div class='del'>-			mode &amp;= ~AX_MEDIUM_FD;</div><div class='del'>-</div><div class='del'>-		if (phydev-&gt;speed != SPEED_100)</div><div class='del'>-			mode &amp;= ~AX_MEDIUM_PS;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	asix_write_medium_mode(dev, mode, 0);</div><div class='del'>-	phy_print_status(phydev);</div><div class='del'>-	usbnet_link_change(dev, phydev-&gt;link, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> int asix_write_gpio(struct usbnet *dev, u16 value, int sleep, int in_pm)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='head'>diff --git a/drivers/net/usb/asix_devices.c b/drivers/net/usb/asix_devices.c<br/>index 57d6e5abc30e..232bbd79a4de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/asix_devices.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/asix_devices.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/asix_devices.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/asix_devices.c</a></div><div class='hunk'>@@ -230,7 +230,9 @@ static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	unsigned long gpio_bits = dev-&gt;driver_info-&gt;data;</div><div class='ctx'> </div><div class='del'>-	usbnet_get_endpoints(dev,intf);</div><div class='add'>+	ret = usbnet_get_endpoints(dev, intf);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* Toggle the GPIOs in a manufacturer/model specific way */</div><div class='ctx'> 	for (i = 2; i &gt;= 0; i--) {</div><div class='hunk'>@@ -625,6 +627,21 @@ static void ax88772_suspend(struct usbnet *dev)</div><div class='ctx'> 		   asix_read_medium_status(dev, 1));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Notes on PM callbacks and locking context:</div><div class='add'>+ *</div><div class='add'>+ * - asix_suspend()/asix_resume() are invoked for both runtime PM and</div><div class='add'>+ *   system-wide suspend/resume. For struct usb_driver the -&gt;resume()</div><div class='add'>+ *   callback does not receive pm_message_t, so the resume type cannot</div><div class='add'>+ *   be distinguished here.</div><div class='add'>+ *</div><div class='add'>+ * - The MAC driver must hold RTNL when calling phylink interfaces such as</div><div class='add'>+ *   phylink_suspend()/resume(). Those calls will also perform MDIO I/O.</div><div class='add'>+ *</div><div class='add'>+ * - Taking RTNL and doing MDIO from a runtime-PM resume callback (while</div><div class='add'>+ *   the USB PM lock is held) is fragile. Since autosuspend brings no</div><div class='add'>+ *   measurable power saving here, we block it by holding a PM usage</div><div class='add'>+ *   reference in ax88772_bind().</div><div class='add'>+ */</div><div class='ctx'> static int asix_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet *dev = usb_get_intfdata(intf);</div><div class='hunk'>@@ -676,6 +693,7 @@ static int ax88772_init_mdio(struct usbnet *dev)</div><div class='ctx'> 	priv-&gt;mdio-&gt;read = &amp;asix_mdio_bus_read;</div><div class='ctx'> 	priv-&gt;mdio-&gt;write = &amp;asix_mdio_bus_write;</div><div class='ctx'> 	priv-&gt;mdio-&gt;name = "Asix MDIO Bus";</div><div class='add'>+	priv-&gt;mdio-&gt;phy_mask = ~(BIT(priv-&gt;phy_addr &amp; 0x1f) | BIT(AX_EMBD_PHY_ADDR));</div><div class='ctx'> 	/* mii bus name is usb-&lt;usb bus number&gt;-&lt;usb device number&gt; */</div><div class='ctx'> 	snprintf(priv-&gt;mdio-&gt;id, MII_BUS_ID_SIZE, "usb-%03d:%03d",</div><div class='ctx'> 		 dev-&gt;udev-&gt;bus-&gt;busnum, dev-&gt;udev-&gt;devnum);</div><div class='hunk'>@@ -752,7 +770,6 @@ static void ax88772_mac_link_down(struct phylink_config *config,</div><div class='ctx'> 	struct usbnet *dev = netdev_priv(to_net_dev(config-&gt;dev));</div><div class='ctx'> </div><div class='ctx'> 	asix_write_medium_mode(dev, 0, 0);</div><div class='del'>-	usbnet_link_change(dev, false, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ax88772_mac_link_up(struct phylink_config *config,</div><div class='hunk'>@@ -783,7 +800,6 @@ static void ax88772_mac_link_up(struct phylink_config *config,</div><div class='ctx'> 		m |= AX_MEDIUM_RFC;</div><div class='ctx'> </div><div class='ctx'> 	asix_write_medium_mode(dev, m, 0);</div><div class='del'>-	usbnet_link_change(dev, true, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct phylink_mac_ops ax88772_phylink_mac_ops = {</div><div class='hunk'>@@ -834,7 +850,9 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;driver_priv = priv;</div><div class='ctx'> </div><div class='del'>-	usbnet_get_endpoints(dev, intf);</div><div class='add'>+	ret = usbnet_get_endpoints(dev, intf);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Maybe the boot loader passed the MAC address via device tree */</div><div class='ctx'> 	if (!eth_platform_get_mac_address(&amp;dev-&gt;udev-&gt;dev, buf)) {</div><div class='hunk'>@@ -920,6 +938,13 @@ static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto initphy_err;</div><div class='ctx'> </div><div class='add'>+	/* Keep this interface runtime-PM active by taking a usage ref.</div><div class='add'>+	 * Prevents runtime suspend while bound and avoids resume paths</div><div class='add'>+	 * that could deadlock (autoresume under RTNL while USB PM lock</div><div class='add'>+	 * is held, phylink/MDIO wants RTNL).</div><div class='add'>+	 */</div><div class='add'>+	pm_runtime_get_noresume(&amp;intf-&gt;dev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> initphy_err:</div><div class='hunk'>@@ -949,6 +974,8 @@ static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 	phylink_destroy(priv-&gt;phylink);</div><div class='ctx'> 	ax88772_mdio_unregister(priv);</div><div class='ctx'> 	asix_rx_fixup_common_free(dev-&gt;driver_priv);</div><div class='add'>+	/* Drop the PM usage ref taken in bind() */</div><div class='add'>+	pm_runtime_put(&amp;intf-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ax88178_unbind(struct usbnet *dev, struct usb_interface *intf)</div><div class='hunk'>@@ -1258,7 +1285,9 @@ static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u8 buf[ETH_ALEN] = {0};</div><div class='ctx'> </div><div class='del'>-	usbnet_get_endpoints(dev,intf);</div><div class='add'>+	ret = usbnet_get_endpoints(dev, intf);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Get the MAC address */</div><div class='ctx'> 	ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);</div><div class='hunk'>@@ -1350,10 +1379,9 @@ static const struct driver_info ax88772_info = {</div><div class='ctx'> 	.description = "ASIX AX88772 USB 2.0 Ethernet",</div><div class='ctx'> 	.bind = ax88772_bind,</div><div class='ctx'> 	.unbind = ax88772_unbind,</div><div class='del'>-	.status = asix_status,</div><div class='ctx'> 	.reset = ax88772_reset,</div><div class='ctx'> 	.stop = ax88772_stop,</div><div class='del'>-	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,</div><div class='add'>+	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET,</div><div class='ctx'> 	.rx_fixup = asix_rx_fixup_common,</div><div class='ctx'> 	.tx_fixup = asix_tx_fixup,</div><div class='ctx'> };</div><div class='hunk'>@@ -1362,11 +1390,9 @@ static const struct driver_info ax88772b_info = {</div><div class='ctx'> 	.description = "ASIX AX88772B USB 2.0 Ethernet",</div><div class='ctx'> 	.bind = ax88772_bind,</div><div class='ctx'> 	.unbind = ax88772_unbind,</div><div class='del'>-	.status = asix_status,</div><div class='ctx'> 	.reset = ax88772_reset,</div><div class='ctx'> 	.stop = ax88772_stop,</div><div class='del'>-	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |</div><div class='del'>-	         FLAG_MULTI_PACKET,</div><div class='add'>+	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET,</div><div class='ctx'> 	.rx_fixup = asix_rx_fixup_common,</div><div class='ctx'> 	.tx_fixup = asix_tx_fixup,</div><div class='ctx'> 	.data = FLAG_EEPROM_MAC,</div><div class='hunk'>@@ -1376,11 +1402,9 @@ static const struct driver_info lxausb_t1l_info = {</div><div class='ctx'> 	.description = "Linux Automation GmbH USB 10Base-T1L",</div><div class='ctx'> 	.bind = ax88772_bind,</div><div class='ctx'> 	.unbind = ax88772_unbind,</div><div class='del'>-	.status = asix_status,</div><div class='ctx'> 	.reset = ax88772_reset,</div><div class='ctx'> 	.stop = ax88772_stop,</div><div class='del'>-	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |</div><div class='del'>-		 FLAG_MULTI_PACKET,</div><div class='add'>+	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET,</div><div class='ctx'> 	.rx_fixup = asix_rx_fixup_common,</div><div class='ctx'> 	.tx_fixup = asix_tx_fixup,</div><div class='ctx'> 	.data = FLAG_EEPROM_MAC,</div><div class='hunk'>@@ -1412,15 +1436,26 @@ static const struct driver_info hg20f9_info = {</div><div class='ctx'> 	.description = "HG20F9 USB 2.0 Ethernet",</div><div class='ctx'> 	.bind = ax88772_bind,</div><div class='ctx'> 	.unbind = ax88772_unbind,</div><div class='del'>-	.status = asix_status,</div><div class='ctx'> 	.reset = ax88772_reset,</div><div class='del'>-	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |</div><div class='del'>-	         FLAG_MULTI_PACKET,</div><div class='add'>+	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_MULTI_PACKET,</div><div class='ctx'> 	.rx_fixup = asix_rx_fixup_common,</div><div class='ctx'> 	.tx_fixup = asix_tx_fixup,</div><div class='ctx'> 	.data = FLAG_EEPROM_MAC,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct driver_info lyconsys_fibergecko100_info = {</div><div class='add'>+	.description = "LyconSys FiberGecko 100 USB 2.0 to SFP Adapter",</div><div class='add'>+	.bind = ax88178_bind,</div><div class='add'>+	.status = asix_status,</div><div class='add'>+	.link_reset = ax88178_link_reset,</div><div class='add'>+	.reset = ax88178_link_reset,</div><div class='add'>+	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |</div><div class='add'>+		 FLAG_MULTI_PACKET,</div><div class='add'>+	.rx_fixup = asix_rx_fixup_common,</div><div class='add'>+	.tx_fixup = asix_tx_fixup,</div><div class='add'>+	.data = 0x20061201,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct usb_device_id	products [] = {</div><div class='ctx'> {</div><div class='ctx'> 	// Linksys USB200M</div><div class='hunk'>@@ -1578,6 +1613,10 @@ static const struct usb_device_id	products [] = {</div><div class='ctx'> 	// Linux Automation GmbH USB 10Base-T1L</div><div class='ctx'> 	USB_DEVICE(0x33f7, 0x0004),</div><div class='ctx'> 	.driver_info = (unsigned long) &amp;lxausb_t1l_info,</div><div class='add'>+}, {</div><div class='add'>+	/* LyconSys FiberGecko 100 */</div><div class='add'>+	USB_DEVICE(0x1d2a, 0x0801),</div><div class='add'>+	.driver_info = (unsigned long) &amp;lyconsys_fibergecko100_info,</div><div class='ctx'> },</div><div class='ctx'> 	{ },		// END</div><div class='ctx'> };</div><div class='hunk'>@@ -1591,6 +1630,11 @@ static struct usb_driver asix_driver = {</div><div class='ctx'> 	.resume =	asix_resume,</div><div class='ctx'> 	.reset_resume =	asix_resume,</div><div class='ctx'> 	.disconnect =	usbnet_disconnect,</div><div class='add'>+	/* usbnet enables autosuspend by default (supports_autosuspend=1).</div><div class='add'>+	 * We keep runtime-PM active for AX88772* by taking a PM usage</div><div class='add'>+	 * reference in ax88772_bind() (pm_runtime_get_noresume()) and</div><div class='add'>+	 * dropping it in unbind(), which effectively blocks autosuspend.</div><div class='add'>+	 */</div><div class='ctx'> 	.supports_autosuspend = 1,</div><div class='ctx'> 	.disable_hub_initiated_lpm = 1,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/usb/ax88172a.c b/drivers/net/usb/ax88172a.c<br/>index e47bb125048d..f613e4bc68c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/ax88172a.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/ax88172a.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/ax88172a.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/ax88172a.c</a></div><div class='hunk'>@@ -18,8 +18,8 @@</div><div class='ctx'> struct ax88172a_private {</div><div class='ctx'> 	struct mii_bus *mdio;</div><div class='ctx'> 	struct phy_device *phydev;</div><div class='del'>-	char phy_name[20];</div><div class='del'>-	u16 phy_addr;</div><div class='add'>+	char phy_name[PHY_ID_SIZE];</div><div class='add'>+	u8 phy_addr;</div><div class='ctx'> 	u16 oldmode;</div><div class='ctx'> 	int use_embdphy;</div><div class='ctx'> 	struct asix_rx_fixup_info rx_fixup_info;</div><div class='hunk'>@@ -210,7 +210,11 @@ static int ax88172a_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 	ret = asix_read_phy_addr(dev, priv-&gt;use_embdphy);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto free;</div><div class='del'>-</div><div class='add'>+	if (ret &gt;= PHY_MAX_ADDR) {</div><div class='add'>+		netdev_err(dev-&gt;net, "Invalid PHY address %#x\n", ret);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto free;</div><div class='add'>+	}</div><div class='ctx'> 	priv-&gt;phy_addr = ret;</div><div class='ctx'> </div><div class='ctx'> 	ax88172a_reset_phy(dev, priv-&gt;use_embdphy);</div><div class='hunk'>@@ -308,7 +312,7 @@ static int ax88172a_reset(struct usbnet *dev)</div><div class='ctx'> 		   rx_ctl);</div><div class='ctx'> </div><div class='ctx'> 	/* Connect to PHY */</div><div class='del'>-	snprintf(priv-&gt;phy_name, 20, PHY_ID_FMT,</div><div class='add'>+	snprintf(priv-&gt;phy_name, sizeof(priv-&gt;phy_name), PHY_ID_FMT,</div><div class='ctx'> 		 priv-&gt;mdio-&gt;id, priv-&gt;phy_addr);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;phydev = phy_connect(dev-&gt;net, priv-&gt;phy_name,</div><div class='head'>diff --git a/drivers/net/usb/catc.c b/drivers/net/usb/catc.c<br/>index ff439ef535ac..6759388692f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/catc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/catc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/catc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/catc.c</a></div><div class='hunk'>@@ -602,7 +602,7 @@ static void catc_stats_done(struct catc *catc, struct ctrl_queue *q)</div><div class='ctx'> </div><div class='ctx'> static void catc_stats_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct catc *catc = from_timer(catc, t, timer);</div><div class='add'>+	struct catc *catc = timer_container_of(catc, t, timer);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 8; i++)</div><div class='hunk'>@@ -738,7 +738,7 @@ static int catc_stop(struct net_device *netdev)</div><div class='ctx'> 	netif_stop_queue(netdev);</div><div class='ctx'> </div><div class='ctx'> 	if (!catc-&gt;is_f5u011)</div><div class='del'>-		del_timer_sync(&amp;catc-&gt;timer);</div><div class='add'>+		timer_delete_sync(&amp;catc-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	usb_kill_urb(catc-&gt;rx_urb);</div><div class='ctx'> 	usb_kill_urb(catc-&gt;tx_urb);</div><div class='head'>diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c<br/>index a6469235d904..a032c1ded406 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/cdc_ether.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/cdc_ether.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/cdc_ether.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/cdc_ether.c</a></div><div class='hunk'>@@ -783,6 +783,13 @@ static const struct usb_device_id	products[] = {</div><div class='ctx'> 	.driver_info = 0,</div><div class='ctx'> },</div><div class='ctx'> </div><div class='add'>+/* Lenovo ThinkPad Hybrid USB-C with USB-A Dock (40af0135eu, based on Realtek RTL8153) */</div><div class='add'>+{</div><div class='add'>+	USB_DEVICE_AND_INTERFACE_INFO(LENOVO_VENDOR_ID, 0xa359, USB_CLASS_COMM,</div><div class='add'>+			USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE),</div><div class='add'>+	.driver_info = 0,</div><div class='add'>+},</div><div class='add'>+</div><div class='ctx'> /* Aquantia AQtion USB to 5GbE Controller (based on AQC111U) */</div><div class='ctx'> {</div><div class='ctx'> 	USB_DEVICE_AND_INTERFACE_INFO(AQUANTIA_VENDOR_ID, 0xc101,</div><div class='head'>diff --git a/drivers/net/usb/cdc_mbim.c b/drivers/net/usb/cdc_mbim.c<br/>index e13e4920ee9b..dbf01210b0e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/cdc_mbim.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/cdc_mbim.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/cdc_mbim.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/cdc_mbim.c</a></div><div class='hunk'>@@ -660,12 +660,12 @@ static const struct usb_device_id mbim_devs[] = {</div><div class='ctx'> 	  .driver_info = (unsigned long)&amp;cdc_mbim_info_avoid_altsetting_toggle,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='del'>-	/* Telit FN990 */</div><div class='add'>+	/* Telit FN990A */</div><div class='ctx'> 	{ USB_DEVICE_AND_INTERFACE_INFO(0x1bc7, 0x1071, USB_CLASS_COMM, USB_CDC_SUBCLASS_MBIM, USB_CDC_PROTO_NONE),</div><div class='ctx'> 	  .driver_info = (unsigned long)&amp;cdc_mbim_info_avoid_altsetting_toggle,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='del'>-	/* Telit FE990 */</div><div class='add'>+	/* Telit FE990A */</div><div class='ctx'> 	{ USB_DEVICE_AND_INTERFACE_INFO(0x1bc7, 0x1081, USB_CLASS_COMM, USB_CDC_SUBCLASS_MBIM, USB_CDC_PROTO_NONE),</div><div class='ctx'> 	  .driver_info = (unsigned long)&amp;cdc_mbim_info_avoid_altsetting_toggle,</div><div class='ctx'> 	},</div><div class='head'>diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c<br/>index d5c47a2a62dc..5d123df0a866 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/cdc_ncm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/cdc_ncm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/cdc_ncm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/cdc_ncm.c</a></div><div class='hunk'>@@ -833,8 +833,7 @@ int cdc_ncm_bind_common(struct usbnet *dev, struct usb_interface *intf, u8 data_</div><div class='ctx'> </div><div class='ctx'> 	ctx-&gt;dev = dev;</div><div class='ctx'> </div><div class='del'>-	hrtimer_init(&amp;ctx-&gt;tx_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='del'>-	ctx-&gt;tx_timer.function = &amp;cdc_ncm_tx_timer_cb;</div><div class='add'>+	hrtimer_setup(&amp;ctx-&gt;tx_timer, &amp;cdc_ncm_tx_timer_cb, CLOCK_MONOTONIC, HRTIMER_MODE_REL);</div><div class='ctx'> 	tasklet_setup(&amp;ctx-&gt;bh, cdc_ncm_txpath_bh);</div><div class='ctx'> 	atomic_set(&amp;ctx-&gt;stop, 0);</div><div class='ctx'> 	spin_lock_init(&amp;ctx-&gt;mtx);</div><div class='hunk'>@@ -893,6 +892,10 @@ int cdc_ncm_bind_common(struct usbnet *dev, struct usb_interface *intf, u8 data_</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ctx-&gt;func_desc)</div><div class='add'>+		ctx-&gt;filtering_supported = !!(ctx-&gt;func_desc-&gt;bmNetworkCapabilities</div><div class='add'>+			&amp; USB_CDC_NCM_NCAP_ETH_FILTER);</div><div class='add'>+</div><div class='ctx'> 	iface_no = ctx-&gt;data-&gt;cur_altsetting-&gt;desc.bInterfaceNumber;</div><div class='ctx'> </div><div class='ctx'> 	/* Device-specific flags */</div><div class='hunk'>@@ -1899,6 +1902,14 @@ static void cdc_ncm_status(struct usbnet *dev, struct urb *urb)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void cdc_ncm_update_filter(struct usbnet *dev)</div><div class='add'>+{</div><div class='add'>+	struct cdc_ncm_ctx *ctx = (struct cdc_ncm_ctx *)dev-&gt;data[0];</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;filtering_supported)</div><div class='add'>+		usbnet_cdc_update_filter(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct driver_info cdc_ncm_info = {</div><div class='ctx'> 	.description = "CDC NCM (NO ZLP)",</div><div class='ctx'> 	.flags = FLAG_POINTTOPOINT | FLAG_NO_SETINT | FLAG_MULTI_PACKET</div><div class='hunk'>@@ -1909,7 +1920,7 @@ static const struct driver_info cdc_ncm_info = {</div><div class='ctx'> 	.status = cdc_ncm_status,</div><div class='ctx'> 	.rx_fixup = cdc_ncm_rx_fixup,</div><div class='ctx'> 	.tx_fixup = cdc_ncm_tx_fixup,</div><div class='del'>-	.set_rx_mode = usbnet_cdc_update_filter,</div><div class='add'>+	.set_rx_mode = cdc_ncm_update_filter,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Same as cdc_ncm_info, but with FLAG_SEND_ZLP  */</div><div class='hunk'>@@ -1923,7 +1934,7 @@ static const struct driver_info cdc_ncm_zlp_info = {</div><div class='ctx'> 	.status = cdc_ncm_status,</div><div class='ctx'> 	.rx_fixup = cdc_ncm_rx_fixup,</div><div class='ctx'> 	.tx_fixup = cdc_ncm_tx_fixup,</div><div class='del'>-	.set_rx_mode = usbnet_cdc_update_filter,</div><div class='add'>+	.set_rx_mode = cdc_ncm_update_filter,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Same as cdc_ncm_info, but with FLAG_SEND_ZLP */</div><div class='hunk'>@@ -1965,7 +1976,7 @@ static const struct driver_info wwan_info = {</div><div class='ctx'> 	.status = cdc_ncm_status,</div><div class='ctx'> 	.rx_fixup = cdc_ncm_rx_fixup,</div><div class='ctx'> 	.tx_fixup = cdc_ncm_tx_fixup,</div><div class='del'>-	.set_rx_mode = usbnet_cdc_update_filter,</div><div class='add'>+	.set_rx_mode = cdc_ncm_update_filter,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Same as wwan_info, but with FLAG_NOARP  */</div><div class='hunk'>@@ -1979,7 +1990,7 @@ static const struct driver_info wwan_noarp_info = {</div><div class='ctx'> 	.status = cdc_ncm_status,</div><div class='ctx'> 	.rx_fixup = cdc_ncm_rx_fixup,</div><div class='ctx'> 	.tx_fixup = cdc_ncm_tx_fixup,</div><div class='del'>-	.set_rx_mode = usbnet_cdc_update_filter,</div><div class='add'>+	.set_rx_mode = cdc_ncm_update_filter,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct usb_device_id cdc_devs[] = {</div><div class='hunk'>@@ -2076,6 +2087,13 @@ static const struct usb_device_id cdc_devs[] = {</div><div class='ctx'> 	  .driver_info = (unsigned long)&amp;wwan_info,</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='add'>+	/* Intel modem (label from OEM reads Fibocom L850-GL) */</div><div class='add'>+	{ USB_DEVICE_AND_INTERFACE_INFO(0x8087, 0x095a,</div><div class='add'>+		USB_CLASS_COMM,</div><div class='add'>+		USB_CDC_SUBCLASS_NCM, USB_CDC_PROTO_NONE),</div><div class='add'>+	  .driver_info = (unsigned long)&amp;wwan_info,</div><div class='add'>+	},</div><div class='add'>+</div><div class='ctx'> 	/* DisplayLink docking stations */</div><div class='ctx'> 	{ .match_flags = USB_DEVICE_ID_MATCH_INT_INFO</div><div class='ctx'> 		| USB_DEVICE_ID_MATCH_VENDOR,</div><div class='head'>diff --git a/drivers/net/usb/ch9200.c b/drivers/net/usb/ch9200.c<br/>index f69d9b902da0..a206ffa76f1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/ch9200.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/ch9200.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/ch9200.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/ch9200.c</a></div><div class='hunk'>@@ -178,6 +178,7 @@ static int ch9200_mdio_read(struct net_device *netdev, int phy_id, int loc)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet *dev = netdev_priv(netdev);</div><div class='ctx'> 	unsigned char buff[2];</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(netdev, "%s phy_id:%02x loc:%02x\n",</div><div class='ctx'> 		   __func__, phy_id, loc);</div><div class='hunk'>@@ -185,8 +186,10 @@ static int ch9200_mdio_read(struct net_device *netdev, int phy_id, int loc)</div><div class='ctx'> 	if (phy_id != 0)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	control_read(dev, REQUEST_READ, 0, loc * 2, buff, 0x02,</div><div class='del'>-		     CONTROL_TIMEOUT_MS);</div><div class='add'>+	ret = control_read(dev, REQUEST_READ, 0, loc * 2, buff, 0x02,</div><div class='add'>+			   CONTROL_TIMEOUT_MS);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	return (buff[0] | buff[1] &lt;&lt; 8);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/usb/gl620a.c b/drivers/net/usb/gl620a.c<br/>index 46af78caf457..0bfa37c14059 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/gl620a.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/gl620a.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/gl620a.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/gl620a.c</a></div><div class='hunk'>@@ -179,9 +179,7 @@ static int genelink_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	dev-&gt;hard_mtu = GL_RCV_BUF_SIZE;</div><div class='ctx'> 	dev-&gt;net-&gt;hard_header_len += 4;</div><div class='del'>-	dev-&gt;in = usb_rcvbulkpipe(dev-&gt;udev, dev-&gt;driver_info-&gt;in);</div><div class='del'>-	dev-&gt;out = usb_sndbulkpipe(dev-&gt;udev, dev-&gt;driver_info-&gt;out);</div><div class='del'>-	return 0;</div><div class='add'>+	return usbnet_get_endpoints(dev, intf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct driver_info	genelink_info = {</div><div class='head'>diff --git a/drivers/net/usb/ipheth.c b/drivers/net/usb/ipheth.c<br/>index 46afb95ffabe..a19789b57190 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/ipheth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/ipheth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/ipheth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/ipheth.c</a></div><div class='hunk'>@@ -61,7 +61,18 @@</div><div class='ctx'> #define IPHETH_USBINTF_PROTO    1</div><div class='ctx'> </div><div class='ctx'> #define IPHETH_IP_ALIGN		2	/* padding at front of URB */</div><div class='del'>-#define IPHETH_NCM_HEADER_SIZE  (12 + 96) /* NCMH + NCM0 */</div><div class='add'>+/* On iOS devices, NCM headers in RX have a fixed size regardless of DPE count:</div><div class='add'>+ * - NTH16 (NCMH): 12 bytes, as per CDC NCM 1.0 spec</div><div class='add'>+ * - NDP16 (NCM0): 96 bytes, of which</div><div class='add'>+ *    - NDP16 fixed header: 8 bytes</div><div class='add'>+ *    - maximum of 22 DPEs (21 datagrams + trailer), 4 bytes each</div><div class='add'>+ */</div><div class='add'>+#define IPHETH_NDP16_MAX_DPE	22</div><div class='add'>+#define IPHETH_NDP16_HEADER_SIZE (sizeof(struct usb_cdc_ncm_ndp16) + \</div><div class='add'>+				  IPHETH_NDP16_MAX_DPE * \</div><div class='add'>+				  sizeof(struct usb_cdc_ncm_dpe16))</div><div class='add'>+#define IPHETH_NCM_HEADER_SIZE	(sizeof(struct usb_cdc_ncm_nth16) + \</div><div class='add'>+				 IPHETH_NDP16_HEADER_SIZE)</div><div class='ctx'> #define IPHETH_TX_BUF_SIZE      ETH_FRAME_LEN</div><div class='ctx'> #define IPHETH_RX_BUF_SIZE_LEGACY (IPHETH_IP_ALIGN + ETH_FRAME_LEN)</div><div class='ctx'> #define IPHETH_RX_BUF_SIZE_NCM	65536</div><div class='hunk'>@@ -207,15 +218,23 @@ static int ipheth_rcvbulk_callback_legacy(struct urb *urb)</div><div class='ctx'> 	return ipheth_consume_skb(buf, len, dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* In "NCM mode", the iOS device encapsulates RX (phone-&gt;computer) traffic</div><div class='add'>+ * in NCM Transfer Blocks (similarly to CDC NCM). However, unlike reverse</div><div class='add'>+ * tethering (handled by the `cdc_ncm` driver), regular tethering is not</div><div class='add'>+ * compliant with the CDC NCM spec, as the device is missing the necessary</div><div class='add'>+ * descriptors, and TX (computer-&gt;phone) traffic is not encapsulated</div><div class='add'>+ * at all. Thus `ipheth` implements a very limited subset of the spec with</div><div class='add'>+ * the sole purpose of parsing RX URBs.</div><div class='add'>+ */</div><div class='ctx'> static int ipheth_rcvbulk_callback_ncm(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct usb_cdc_ncm_nth16 *ncmh;</div><div class='ctx'> 	struct usb_cdc_ncm_ndp16 *ncm0;</div><div class='ctx'> 	struct usb_cdc_ncm_dpe16 *dpe;</div><div class='ctx'> 	struct ipheth_device *dev;</div><div class='add'>+	u16 dg_idx, dg_len;</div><div class='ctx'> 	int retval = -EINVAL;</div><div class='ctx'> 	char *buf;</div><div class='del'>-	int len;</div><div class='ctx'> </div><div class='ctx'> 	dev = urb-&gt;context;</div><div class='ctx'> </div><div class='hunk'>@@ -226,40 +245,42 @@ static int ipheth_rcvbulk_callback_ncm(struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	ncmh = urb-&gt;transfer_buffer;</div><div class='ctx'> 	if (ncmh-&gt;dwSignature != cpu_to_le32(USB_CDC_NCM_NTH16_SIGN) ||</div><div class='del'>-	    le16_to_cpu(ncmh-&gt;wNdpIndex) &gt;= urb-&gt;actual_length) {</div><div class='del'>-		dev-&gt;net-&gt;stats.rx_errors++;</div><div class='del'>-		return retval;</div><div class='del'>-	}</div><div class='add'>+	    /* On iOS, NDP16 directly follows NTH16 */</div><div class='add'>+	    ncmh-&gt;wNdpIndex != cpu_to_le16(sizeof(struct usb_cdc_ncm_nth16)))</div><div class='add'>+		goto rx_error;</div><div class='ctx'> </div><div class='del'>-	ncm0 = urb-&gt;transfer_buffer + le16_to_cpu(ncmh-&gt;wNdpIndex);</div><div class='del'>-	if (ncm0-&gt;dwSignature != cpu_to_le32(USB_CDC_NCM_NDP16_NOCRC_SIGN) ||</div><div class='del'>-	    le16_to_cpu(ncmh-&gt;wHeaderLength) + le16_to_cpu(ncm0-&gt;wLength) &gt;=</div><div class='del'>-	    urb-&gt;actual_length) {</div><div class='del'>-		dev-&gt;net-&gt;stats.rx_errors++;</div><div class='del'>-		return retval;</div><div class='del'>-	}</div><div class='add'>+	ncm0 = urb-&gt;transfer_buffer + sizeof(struct usb_cdc_ncm_nth16);</div><div class='add'>+	if (ncm0-&gt;dwSignature != cpu_to_le32(USB_CDC_NCM_NDP16_NOCRC_SIGN))</div><div class='add'>+		goto rx_error;</div><div class='ctx'> </div><div class='ctx'> 	dpe = ncm0-&gt;dpe16;</div><div class='del'>-	while (le16_to_cpu(dpe-&gt;wDatagramIndex) != 0 &amp;&amp;</div><div class='del'>-	       le16_to_cpu(dpe-&gt;wDatagramLength) != 0) {</div><div class='del'>-		if (le16_to_cpu(dpe-&gt;wDatagramIndex) &gt;= urb-&gt;actual_length ||</div><div class='del'>-		    le16_to_cpu(dpe-&gt;wDatagramIndex) +</div><div class='del'>-		    le16_to_cpu(dpe-&gt;wDatagramLength) &gt; urb-&gt;actual_length) {</div><div class='add'>+	for (int dpe_i = 0; dpe_i &lt; IPHETH_NDP16_MAX_DPE; ++dpe_i, ++dpe) {</div><div class='add'>+		dg_idx = le16_to_cpu(dpe-&gt;wDatagramIndex);</div><div class='add'>+		dg_len = le16_to_cpu(dpe-&gt;wDatagramLength);</div><div class='add'>+</div><div class='add'>+		/* Null DPE must be present after last datagram pointer entry</div><div class='add'>+		 * (3.3.1 USB CDC NCM spec v1.0)</div><div class='add'>+		 */</div><div class='add'>+		if (dg_idx == 0 &amp;&amp; dg_len == 0)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (dg_idx &lt; IPHETH_NCM_HEADER_SIZE ||</div><div class='add'>+		    dg_idx &gt;= urb-&gt;actual_length ||</div><div class='add'>+		    dg_len &gt; urb-&gt;actual_length - dg_idx) {</div><div class='ctx'> 			dev-&gt;net-&gt;stats.rx_length_errors++;</div><div class='ctx'> 			return retval;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		buf = urb-&gt;transfer_buffer + le16_to_cpu(dpe-&gt;wDatagramIndex);</div><div class='del'>-		len = le16_to_cpu(dpe-&gt;wDatagramLength);</div><div class='add'>+		buf = urb-&gt;transfer_buffer + dg_idx;</div><div class='ctx'> </div><div class='del'>-		retval = ipheth_consume_skb(buf, len, dev);</div><div class='add'>+		retval = ipheth_consume_skb(buf, dg_len, dev);</div><div class='ctx'> 		if (retval != 0)</div><div class='ctx'> 			return retval;</div><div class='del'>-</div><div class='del'>-		dpe++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+rx_error:</div><div class='add'>+	dev-&gt;net-&gt;stats.rx_errors++;</div><div class='add'>+	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ipheth_rcvbulk_callback(struct urb *urb)</div><div class='head'>diff --git a/drivers/net/usb/lan78xx.c b/drivers/net/usb/lan78xx.c<br/>index 8adf77e3557e..00397a807393 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/lan78xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/lan78xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/lan78xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/lan78xx.c</a></div><div class='hunk'>@@ -6,6 +6,7 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='ctx'> #include &lt;linux/signal.h&gt;</div><div class='hunk'>@@ -19,13 +20,13 @@</div><div class='ctx'> #include &lt;linux/mdio.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;net/ip6_checksum.h&gt;</div><div class='add'>+#include &lt;net/selftests.h&gt;</div><div class='ctx'> #include &lt;net/vxlan.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/irqdomain.h&gt;</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/irqchip/chained_irq.h&gt;</div><div class='ctx'> #include &lt;linux/microchipphy.h&gt;</div><div class='del'>-#include &lt;linux/phy_fixed.h&gt;</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='ctx'> #include "lan78xx.h"</div><div class='hunk'>@@ -384,7 +385,7 @@ struct skb_data {		/* skb-&gt;cb is one of these */</div><div class='ctx'> #define EVENT_RX_HALT			1</div><div class='ctx'> #define EVENT_RX_MEMORY			2</div><div class='ctx'> #define EVENT_STS_SPLIT			3</div><div class='del'>-#define EVENT_LINK_RESET		4</div><div class='add'>+#define EVENT_PHY_INT_ACK		4</div><div class='ctx'> #define EVENT_RX_PAUSED			5</div><div class='ctx'> #define EVENT_DEV_WAKING		6</div><div class='ctx'> #define EVENT_DEV_ASLEEP		7</div><div class='hunk'>@@ -413,7 +414,6 @@ struct lan78xx_net {</div><div class='ctx'> 	struct net_device	*net;</div><div class='ctx'> 	struct usb_device	*udev;</div><div class='ctx'> 	struct usb_interface	*intf;</div><div class='del'>-	void			*driver_priv;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int		tx_pend_data_len;</div><div class='ctx'> 	size_t			n_tx_urbs;</div><div class='hunk'>@@ -439,7 +439,7 @@ struct lan78xx_net {</div><div class='ctx'> 	struct usb_anchor	deferred;</div><div class='ctx'> </div><div class='ctx'> 	struct mutex		dev_mutex; /* serialise open/stop wrt suspend/resume */</div><div class='del'>-	struct mutex		phy_mutex; /* for phy access */</div><div class='add'>+	struct mutex		mdiobus_mutex; /* for MDIO bus access */</div><div class='ctx'> 	unsigned int		pipe_in, pipe_out, pipe_intr;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int		bulk_in_delay;</div><div class='hunk'>@@ -448,33 +448,25 @@ struct lan78xx_net {</div><div class='ctx'> 	unsigned long		flags;</div><div class='ctx'> </div><div class='ctx'> 	wait_queue_head_t	*wait;</div><div class='del'>-	unsigned char		suspend_count;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int		maxpacket;</div><div class='ctx'> 	struct timer_list	stat_monitor;</div><div class='ctx'> </div><div class='ctx'> 	unsigned long		data[5];</div><div class='ctx'> </div><div class='del'>-	int			link_on;</div><div class='del'>-	u8			mdix_ctrl;</div><div class='del'>-</div><div class='ctx'> 	u32			chipid;</div><div class='ctx'> 	u32			chiprev;</div><div class='ctx'> 	struct mii_bus		*mdiobus;</div><div class='ctx'> 	phy_interface_t		interface;</div><div class='ctx'> </div><div class='del'>-	int			fc_autoneg;</div><div class='del'>-	u8			fc_request_control;</div><div class='del'>-</div><div class='ctx'> 	int			delta;</div><div class='ctx'> 	struct statstage	stats;</div><div class='ctx'> </div><div class='ctx'> 	struct irq_domain_data	domain_data;</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-/* define external phy id */</div><div class='del'>-#define	PHY_LAN8835			(0x0007C130)</div><div class='del'>-#define	PHY_KSZ9031RNX			(0x00221620)</div><div class='add'>+	struct phylink		*phylink;</div><div class='add'>+	struct phylink_config	phylink_config;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* use ethtool to change the level for any given device */</div><div class='ctx'> static int msg_level = -1;</div><div class='hunk'>@@ -625,13 +617,13 @@ static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)</div><div class='ctx'> 		*data = *buf;</div><div class='ctx'> 	} else if (net_ratelimit()) {</div><div class='ctx'> 		netdev_warn(dev-&gt;net,</div><div class='del'>-			    "Failed to read register index 0x%08x. ret = %d",</div><div class='del'>-			    index, ret);</div><div class='add'>+			    "Failed to read register index 0x%08x. ret = %pe",</div><div class='add'>+			    index, ERR_PTR(ret));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(buf);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return ret &lt; 0 ? ret : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)</div><div class='hunk'>@@ -656,13 +648,13 @@ static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)</div><div class='ctx'> 	if (unlikely(ret &lt; 0) &amp;&amp;</div><div class='ctx'> 	    net_ratelimit()) {</div><div class='ctx'> 		netdev_warn(dev-&gt;net,</div><div class='del'>-			    "Failed to write register index 0x%08x. ret = %d",</div><div class='del'>-			    index, ret);</div><div class='add'>+			    "Failed to write register index 0x%08x. ret = %pe",</div><div class='add'>+			    index, ERR_PTR(ret));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(buf);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return ret &lt; 0 ? ret : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_update_reg(struct lan78xx_net *dev, u32 reg, u32 mask,</div><div class='hunk'>@@ -678,11 +670,7 @@ static int lan78xx_update_reg(struct lan78xx_net *dev, u32 reg, u32 mask,</div><div class='ctx'> 	buf &amp;= ~mask;</div><div class='ctx'> 	buf |= (mask &amp; data);</div><div class='ctx'> </div><div class='del'>-	ret = lan78xx_write_reg(dev, reg, buf);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return lan78xx_write_reg(dev, reg, buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_read_stats(struct lan78xx_net *dev,</div><div class='hunk'>@@ -812,8 +800,156 @@ static void lan78xx_update_stats(struct lan78xx_net *dev)</div><div class='ctx'> 	usb_autopm_put_interface(dev-&gt;intf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Loop until the read is completed with timeout called with phy_mutex held */</div><div class='del'>-static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)</div><div class='add'>+static int lan78xx_start_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enable)</div><div class='add'>+{</div><div class='add'>+	return lan78xx_update_reg(dev, reg, hw_enable, hw_enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan78xx_stop_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enabled,</div><div class='add'>+			   u32 hw_disabled)</div><div class='add'>+{</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+	bool stopped = true;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 buf;</div><div class='add'>+</div><div class='add'>+	/* Stop the h/w block (if not already stopped) */</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_read_reg(dev, reg, &amp;buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (buf &amp; hw_enabled) {</div><div class='add'>+		buf &amp;= ~hw_enabled;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_write_reg(dev, reg, buf);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		stopped = false;</div><div class='add'>+		timeout = jiffies + HW_DISABLE_TIMEOUT;</div><div class='add'>+		do  {</div><div class='add'>+			ret = lan78xx_read_reg(dev, reg, &amp;buf);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			if (buf &amp; hw_disabled)</div><div class='add'>+				stopped = true;</div><div class='add'>+			else</div><div class='add'>+				msleep(HW_DISABLE_DELAY_MS);</div><div class='add'>+		} while (!stopped &amp;&amp; !time_after(jiffies, timeout));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return stopped ? 0 : -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan78xx_flush_fifo(struct lan78xx_net *dev, u32 reg, u32 fifo_flush)</div><div class='add'>+{</div><div class='add'>+	return lan78xx_update_reg(dev, reg, fifo_flush, fifo_flush);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan78xx_start_tx_path(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	netif_dbg(dev, drv, dev-&gt;net, "start tx path");</div><div class='add'>+</div><div class='add'>+	/* Start the MAC transmitter */</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_start_hw(dev, MAC_TX, MAC_TX_TXEN_);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Start the Tx FIFO */</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_start_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan78xx_stop_tx_path(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	netif_dbg(dev, drv, dev-&gt;net, "stop tx path");</div><div class='add'>+</div><div class='add'>+	/* Stop the Tx FIFO */</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_stop_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_, FCT_TX_CTL_DIS_);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Stop the MAC transmitter */</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_stop_hw(dev, MAC_TX, MAC_TX_TXEN_, MAC_TX_TXD_);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The caller must ensure the Tx path is stopped before calling</div><div class='add'>+ * lan78xx_flush_tx_fifo().</div><div class='add'>+ */</div><div class='add'>+static int lan78xx_flush_tx_fifo(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='add'>+	return lan78xx_flush_fifo(dev, FCT_TX_CTL, FCT_TX_CTL_RST_);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan78xx_start_rx_path(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	netif_dbg(dev, drv, dev-&gt;net, "start rx path");</div><div class='add'>+</div><div class='add'>+	/* Start the Rx FIFO */</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_start_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Start the MAC receiver*/</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_start_hw(dev, MAC_RX, MAC_RX_RXEN_);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan78xx_stop_rx_path(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	netif_dbg(dev, drv, dev-&gt;net, "stop rx path");</div><div class='add'>+</div><div class='add'>+	/* Stop the MAC receiver */</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_stop_hw(dev, MAC_RX, MAC_RX_RXEN_, MAC_RX_RXD_);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Stop the Rx FIFO */</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_stop_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_, FCT_RX_CTL_DIS_);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The caller must ensure the Rx path is stopped before calling</div><div class='add'>+ * lan78xx_flush_rx_fifo().</div><div class='add'>+ */</div><div class='add'>+static int lan78xx_flush_rx_fifo(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='add'>+	return lan78xx_flush_fifo(dev, FCT_RX_CTL, FCT_RX_CTL_RST_);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Loop until the read is completed with timeout called with mdiobus_mutex held */</div><div class='add'>+static int lan78xx_mdiobus_wait_not_busy(struct lan78xx_net *dev)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long start_time = jiffies;</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -821,14 +957,14 @@ static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		ret = lan78xx_read_reg(dev, MII_ACC, &amp;val);</div><div class='del'>-		if (unlikely(ret &lt; 0))</div><div class='del'>-			return -EIO;</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		if (!(val &amp; MII_ACC_MII_BUSY_))</div><div class='ctx'> 			return 0;</div><div class='ctx'> 	} while (!time_after(jiffies, start_time + HZ));</div><div class='ctx'> </div><div class='del'>-	return -EIO;</div><div class='add'>+	return -ETIMEDOUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u32 mii_access(int id, int index, int read)</div><div class='hunk'>@@ -854,8 +990,8 @@ static int lan78xx_wait_eeprom(struct lan78xx_net *dev)</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		ret = lan78xx_read_reg(dev, E2P_CMD, &amp;val);</div><div class='del'>-		if (unlikely(ret &lt; 0))</div><div class='del'>-			return -EIO;</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		if (!(val &amp; E2P_CMD_EPC_BUSY_) ||</div><div class='ctx'> 		    (val &amp; E2P_CMD_EPC_TIMEOUT_))</div><div class='hunk'>@@ -865,7 +1001,7 @@ static int lan78xx_wait_eeprom(struct lan78xx_net *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (val &amp; (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {</div><div class='ctx'> 		netdev_warn(dev-&gt;net, "EEPROM read operation timeout");</div><div class='del'>-		return -EIO;</div><div class='add'>+		return -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -879,8 +1015,8 @@ static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		ret = lan78xx_read_reg(dev, E2P_CMD, &amp;val);</div><div class='del'>-		if (unlikely(ret &lt; 0))</div><div class='del'>-			return -EIO;</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		if (!(val &amp; E2P_CMD_EPC_BUSY_))</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -889,75 +1025,84 @@ static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)</div><div class='ctx'> 	} while (!time_after(jiffies, start_time + HZ));</div><div class='ctx'> </div><div class='ctx'> 	netdev_warn(dev-&gt;net, "EEPROM is busy");</div><div class='del'>-	return -EIO;</div><div class='add'>+	return -ETIMEDOUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,</div><div class='ctx'> 				   u32 length, u8 *data)</div><div class='ctx'> {</div><div class='del'>-	u32 val;</div><div class='del'>-	u32 saved;</div><div class='add'>+	u32 val, saved;</div><div class='ctx'> 	int i, ret;</div><div class='del'>-	int retval;</div><div class='ctx'> </div><div class='ctx'> 	/* depends on chip, some EEPROM pins are muxed with LED function.</div><div class='ctx'> 	 * disable &amp; restore LED function to access EEPROM.</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = lan78xx_read_reg(dev, HW_CFG, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	saved = val;</div><div class='ctx'> 	if (dev-&gt;chipid == ID_REV_CHIP_ID_7800_) {</div><div class='ctx'> 		val &amp;= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);</div><div class='ctx'> 		ret = lan78xx_write_reg(dev, HW_CFG, val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	retval = lan78xx_eeprom_confirm_not_busy(dev);</div><div class='del'>-	if (retval)</div><div class='del'>-		return retval;</div><div class='add'>+	ret = lan78xx_eeprom_confirm_not_busy(dev);</div><div class='add'>+	if (ret == -ETIMEDOUT)</div><div class='add'>+		goto read_raw_eeprom_done;</div><div class='add'>+	/* If USB fails, there is nothing to do */</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; length; i++) {</div><div class='ctx'> 		val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;</div><div class='ctx'> 		val |= (offset &amp; E2P_CMD_EPC_ADDR_MASK_);</div><div class='ctx'> 		ret = lan78xx_write_reg(dev, E2P_CMD, val);</div><div class='del'>-		if (unlikely(ret &lt; 0)) {</div><div class='del'>-			retval = -EIO;</div><div class='del'>-			goto exit;</div><div class='del'>-		}</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		retval = lan78xx_wait_eeprom(dev);</div><div class='del'>-		if (retval &lt; 0)</div><div class='del'>-			goto exit;</div><div class='add'>+		ret = lan78xx_wait_eeprom(dev);</div><div class='add'>+		/* Looks like not USB specific error, try to recover */</div><div class='add'>+		if (ret == -ETIMEDOUT)</div><div class='add'>+			goto read_raw_eeprom_done;</div><div class='add'>+		/* If USB fails, there is nothing to do */</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		ret = lan78xx_read_reg(dev, E2P_DATA, &amp;val);</div><div class='del'>-		if (unlikely(ret &lt; 0)) {</div><div class='del'>-			retval = -EIO;</div><div class='del'>-			goto exit;</div><div class='del'>-		}</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		data[i] = val &amp; 0xFF;</div><div class='ctx'> 		offset++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	retval = 0;</div><div class='del'>-exit:</div><div class='del'>-	if (dev-&gt;chipid == ID_REV_CHIP_ID_7800_)</div><div class='del'>-		ret = lan78xx_write_reg(dev, HW_CFG, saved);</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='add'>+read_raw_eeprom_done:</div><div class='add'>+	if (dev-&gt;chipid == ID_REV_CHIP_ID_7800_) {</div><div class='add'>+		int rc = lan78xx_write_reg(dev, HW_CFG, saved);</div><div class='add'>+		/* If USB fails, there is nothing to do */</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,</div><div class='ctx'> 			       u32 length, u8 *data)</div><div class='ctx'> {</div><div class='del'>-	u8 sig;</div><div class='ctx'> 	int ret;</div><div class='add'>+	u8 sig;</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_read_raw_eeprom(dev, 0, 1, &amp;sig);</div><div class='del'>-	if ((ret == 0) &amp;&amp; (sig == EEPROM_INDICATOR))</div><div class='del'>-		ret = lan78xx_read_raw_eeprom(dev, offset, length, data);</div><div class='del'>-	else</div><div class='del'>-		ret = -EINVAL;</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	if (sig != EEPROM_INDICATOR)</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	return lan78xx_read_raw_eeprom(dev, offset, length, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,</div><div class='hunk'>@@ -966,113 +1111,147 @@ static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	u32 saved;</div><div class='ctx'> 	int i, ret;</div><div class='del'>-	int retval;</div><div class='ctx'> </div><div class='ctx'> 	/* depends on chip, some EEPROM pins are muxed with LED function.</div><div class='ctx'> 	 * disable &amp; restore LED function to access EEPROM.</div><div class='ctx'> 	 */</div><div class='ctx'> 	ret = lan78xx_read_reg(dev, HW_CFG, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	saved = val;</div><div class='ctx'> 	if (dev-&gt;chipid == ID_REV_CHIP_ID_7800_) {</div><div class='ctx'> 		val &amp;= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);</div><div class='ctx'> 		ret = lan78xx_write_reg(dev, HW_CFG, val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	retval = lan78xx_eeprom_confirm_not_busy(dev);</div><div class='del'>-	if (retval)</div><div class='del'>-		goto exit;</div><div class='add'>+	ret = lan78xx_eeprom_confirm_not_busy(dev);</div><div class='add'>+	/* Looks like not USB specific error, try to recover */</div><div class='add'>+	if (ret == -ETIMEDOUT)</div><div class='add'>+		goto write_raw_eeprom_done;</div><div class='add'>+	/* If USB fails, there is nothing to do */</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Issue write/erase enable command */</div><div class='ctx'> 	val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;</div><div class='ctx'> 	ret = lan78xx_write_reg(dev, E2P_CMD, val);</div><div class='del'>-	if (unlikely(ret &lt; 0)) {</div><div class='del'>-		retval = -EIO;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	retval = lan78xx_wait_eeprom(dev);</div><div class='del'>-	if (retval &lt; 0)</div><div class='del'>-		goto exit;</div><div class='add'>+	ret = lan78xx_wait_eeprom(dev);</div><div class='add'>+	/* Looks like not USB specific error, try to recover */</div><div class='add'>+	if (ret == -ETIMEDOUT)</div><div class='add'>+		goto write_raw_eeprom_done;</div><div class='add'>+	/* If USB fails, there is nothing to do */</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; length; i++) {</div><div class='ctx'> 		/* Fill data register */</div><div class='ctx'> 		val = data[i];</div><div class='ctx'> 		ret = lan78xx_write_reg(dev, E2P_DATA, val);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			retval = -EIO;</div><div class='del'>-			goto exit;</div><div class='del'>-		}</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		/* Send "write" command */</div><div class='ctx'> 		val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;</div><div class='ctx'> 		val |= (offset &amp; E2P_CMD_EPC_ADDR_MASK_);</div><div class='ctx'> 		ret = lan78xx_write_reg(dev, E2P_CMD, val);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			retval = -EIO;</div><div class='del'>-			goto exit;</div><div class='del'>-		}</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		retval = lan78xx_wait_eeprom(dev);</div><div class='del'>-		if (retval &lt; 0)</div><div class='del'>-			goto exit;</div><div class='add'>+		ret = lan78xx_wait_eeprom(dev);</div><div class='add'>+		/* Looks like not USB specific error, try to recover */</div><div class='add'>+		if (ret == -ETIMEDOUT)</div><div class='add'>+			goto write_raw_eeprom_done;</div><div class='add'>+		/* If USB fails, there is nothing to do */</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		offset++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	retval = 0;</div><div class='del'>-exit:</div><div class='del'>-	if (dev-&gt;chipid == ID_REV_CHIP_ID_7800_)</div><div class='del'>-		ret = lan78xx_write_reg(dev, HW_CFG, saved);</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='add'>+write_raw_eeprom_done:</div><div class='add'>+	if (dev-&gt;chipid == ID_REV_CHIP_ID_7800_) {</div><div class='add'>+		int rc = lan78xx_write_reg(dev, HW_CFG, saved);</div><div class='add'>+		/* If USB fails, there is nothing to do */</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,</div><div class='ctx'> 				u32 length, u8 *data)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	u32 buf;</div><div class='ctx'> 	unsigned long timeout;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u32 buf;</div><div class='ctx'> </div><div class='del'>-	lan78xx_read_reg(dev, OTP_PWR_DN, &amp;buf);</div><div class='add'>+	ret = lan78xx_read_reg(dev, OTP_PWR_DN, &amp;buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (buf &amp; OTP_PWR_DN_PWRDN_N_) {</div><div class='ctx'> 		/* clear it and wait to be cleared */</div><div class='del'>-		lan78xx_write_reg(dev, OTP_PWR_DN, 0);</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		timeout = jiffies + HZ;</div><div class='ctx'> 		do {</div><div class='ctx'> 			usleep_range(1, 10);</div><div class='del'>-			lan78xx_read_reg(dev, OTP_PWR_DN, &amp;buf);</div><div class='add'>+			ret = lan78xx_read_reg(dev, OTP_PWR_DN, &amp;buf);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='ctx'> 			if (time_after(jiffies, timeout)) {</div><div class='ctx'> 				netdev_warn(dev-&gt;net,</div><div class='ctx'> 					    "timeout on OTP_PWR_DN");</div><div class='del'>-				return -EIO;</div><div class='add'>+				return -ETIMEDOUT;</div><div class='ctx'> 			}</div><div class='ctx'> 		} while (buf &amp; OTP_PWR_DN_PWRDN_N_);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; length; i++) {</div><div class='del'>-		lan78xx_write_reg(dev, OTP_ADDR1,</div><div class='del'>-				  ((offset + i) &gt;&gt; 8) &amp; OTP_ADDR1_15_11);</div><div class='del'>-		lan78xx_write_reg(dev, OTP_ADDR2,</div><div class='del'>-				  ((offset + i) &amp; OTP_ADDR2_10_3));</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_ADDR1,</div><div class='add'>+					((offset + i) &gt;&gt; 8) &amp; OTP_ADDR1_15_11);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_ADDR2,</div><div class='add'>+					((offset + i) &amp; OTP_ADDR2_10_3));</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-		lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);</div><div class='del'>-		lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		timeout = jiffies + HZ;</div><div class='ctx'> 		do {</div><div class='ctx'> 			udelay(1);</div><div class='del'>-			lan78xx_read_reg(dev, OTP_STATUS, &amp;buf);</div><div class='add'>+			ret = lan78xx_read_reg(dev, OTP_STATUS, &amp;buf);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='ctx'> 			if (time_after(jiffies, timeout)) {</div><div class='ctx'> 				netdev_warn(dev-&gt;net,</div><div class='ctx'> 					    "timeout on OTP_STATUS");</div><div class='del'>-				return -EIO;</div><div class='add'>+				return -ETIMEDOUT;</div><div class='ctx'> 			}</div><div class='ctx'> 		} while (buf &amp; OTP_STATUS_BUSY_);</div><div class='ctx'> </div><div class='del'>-		lan78xx_read_reg(dev, OTP_RD_DATA, &amp;buf);</div><div class='add'>+		ret = lan78xx_read_reg(dev, OTP_RD_DATA, &amp;buf);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		data[i] = (u8)(buf &amp; 0xFF);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1086,45 +1265,72 @@ static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u32 buf;</div><div class='ctx'> 	unsigned long timeout;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	lan78xx_read_reg(dev, OTP_PWR_DN, &amp;buf);</div><div class='add'>+	ret = lan78xx_read_reg(dev, OTP_PWR_DN, &amp;buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (buf &amp; OTP_PWR_DN_PWRDN_N_) {</div><div class='ctx'> 		/* clear it and wait to be cleared */</div><div class='del'>-		lan78xx_write_reg(dev, OTP_PWR_DN, 0);</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		timeout = jiffies + HZ;</div><div class='ctx'> 		do {</div><div class='ctx'> 			udelay(1);</div><div class='del'>-			lan78xx_read_reg(dev, OTP_PWR_DN, &amp;buf);</div><div class='add'>+			ret = lan78xx_read_reg(dev, OTP_PWR_DN, &amp;buf);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='ctx'> 			if (time_after(jiffies, timeout)) {</div><div class='ctx'> 				netdev_warn(dev-&gt;net,</div><div class='ctx'> 					    "timeout on OTP_PWR_DN completion");</div><div class='del'>-				return -EIO;</div><div class='add'>+				return -ETIMEDOUT;</div><div class='ctx'> 			}</div><div class='ctx'> 		} while (buf &amp; OTP_PWR_DN_PWRDN_N_);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* set to BYTE program mode */</div><div class='del'>-	lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);</div><div class='add'>+	ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; length; i++) {</div><div class='del'>-		lan78xx_write_reg(dev, OTP_ADDR1,</div><div class='del'>-				  ((offset + i) &gt;&gt; 8) &amp; OTP_ADDR1_15_11);</div><div class='del'>-		lan78xx_write_reg(dev, OTP_ADDR2,</div><div class='del'>-				  ((offset + i) &amp; OTP_ADDR2_10_3));</div><div class='del'>-		lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);</div><div class='del'>-		lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);</div><div class='del'>-		lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_ADDR1,</div><div class='add'>+					((offset + i) &gt;&gt; 8) &amp; OTP_ADDR1_15_11);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_ADDR2,</div><div class='add'>+					((offset + i) &amp; OTP_ADDR2_10_3));</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		timeout = jiffies + HZ;</div><div class='ctx'> 		do {</div><div class='ctx'> 			udelay(1);</div><div class='del'>-			lan78xx_read_reg(dev, OTP_STATUS, &amp;buf);</div><div class='add'>+			ret = lan78xx_read_reg(dev, OTP_STATUS, &amp;buf);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='ctx'> 			if (time_after(jiffies, timeout)) {</div><div class='ctx'> 				netdev_warn(dev-&gt;net,</div><div class='ctx'> 					    "Timeout on OTP_STATUS completion");</div><div class='del'>-				return -EIO;</div><div class='add'>+				return -ETIMEDOUT;</div><div class='ctx'> 			}</div><div class='ctx'> 		} while (buf &amp; OTP_STATUS_BUSY_);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1161,7 +1367,7 @@ static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)</div><div class='ctx'> </div><div class='ctx'> 		ret = lan78xx_read_reg(dev, DP_SEL, &amp;dp_sel);</div><div class='ctx'> 		if (unlikely(ret &lt; 0))</div><div class='del'>-			return -EIO;</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='ctx'> 		if (dp_sel &amp; DP_SEL_DPRDY_)</div><div class='ctx'> 			return 0;</div><div class='hunk'>@@ -1171,44 +1377,51 @@ static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)</div><div class='ctx'> </div><div class='ctx'> 	netdev_warn(dev-&gt;net, "%s timed out", __func__);</div><div class='ctx'> </div><div class='del'>-	return -EIO;</div><div class='add'>+	return -ETIMEDOUT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,</div><div class='ctx'> 				  u32 addr, u32 length, u32 *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev-&gt;data[0]);</div><div class='del'>-	u32 dp_sel;</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> </div><div class='del'>-	if (usb_autopm_get_interface(dev-&gt;intf) &lt; 0)</div><div class='del'>-		return 0;</div><div class='add'>+	ret = usb_autopm_get_interface(dev-&gt;intf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;pdata-&gt;dataport_mutex);</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_dataport_wait_not_busy(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto done;</div><div class='add'>+		goto dataport_write;</div><div class='ctx'> </div><div class='del'>-	ret = lan78xx_read_reg(dev, DP_SEL, &amp;dp_sel);</div><div class='del'>-</div><div class='del'>-	dp_sel &amp;= ~DP_SEL_RSEL_MASK_;</div><div class='del'>-	dp_sel |= ram_select;</div><div class='del'>-	ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);</div><div class='add'>+	ret = lan78xx_update_reg(dev, DP_SEL, DP_SEL_RSEL_MASK_, ram_select);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto dataport_write;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; length; i++) {</div><div class='ctx'> 		ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto dataport_write;</div><div class='ctx'> </div><div class='ctx'> 		ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto dataport_write;</div><div class='ctx'> </div><div class='ctx'> 		ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto dataport_write;</div><div class='ctx'> </div><div class='ctx'> 		ret = lan78xx_dataport_wait_not_busy(dev);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto done;</div><div class='add'>+			goto dataport_write;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-done:</div><div class='add'>+dataport_write:</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netdev_warn(dev-&gt;net, "dataport write failed %pe", ERR_PTR(ret));</div><div class='add'>+</div><div class='ctx'> 	mutex_unlock(&amp;pdata-&gt;dataport_mutex);</div><div class='ctx'> 	usb_autopm_put_interface(dev-&gt;intf);</div><div class='ctx'> </div><div class='hunk'>@@ -1244,23 +1457,39 @@ static void lan78xx_deferred_multicast_write(struct work_struct *param)</div><div class='ctx'> 	struct lan78xx_priv *pdata =</div><div class='ctx'> 			container_of(param, struct lan78xx_priv, set_multicast);</div><div class='ctx'> 	struct lan78xx_net *dev = pdata-&gt;dev;</div><div class='del'>-	int i;</div><div class='add'>+	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(dev, drv, dev-&gt;net, "deferred multicast write 0x%08x\n",</div><div class='ctx'> 		  pdata-&gt;rfe_ctl);</div><div class='ctx'> </div><div class='del'>-	lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,</div><div class='del'>-			       DP_SEL_VHF_HASH_LEN, pdata-&gt;mchash_table);</div><div class='add'>+	ret = lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_,</div><div class='add'>+				     DP_SEL_VHF_VLAN_LEN,</div><div class='add'>+				     DP_SEL_VHF_HASH_LEN, pdata-&gt;mchash_table);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto multicast_write_done;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 1; i &lt; NUM_OF_MAF; i++) {</div><div class='del'>-		lan78xx_write_reg(dev, MAF_HI(i), 0);</div><div class='del'>-		lan78xx_write_reg(dev, MAF_LO(i),</div><div class='del'>-				  pdata-&gt;pfilter_table[i][1]);</div><div class='del'>-		lan78xx_write_reg(dev, MAF_HI(i),</div><div class='del'>-				  pdata-&gt;pfilter_table[i][0]);</div><div class='add'>+		ret = lan78xx_write_reg(dev, MAF_HI(i), 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto multicast_write_done;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_write_reg(dev, MAF_LO(i),</div><div class='add'>+					pdata-&gt;pfilter_table[i][1]);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto multicast_write_done;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_write_reg(dev, MAF_HI(i),</div><div class='add'>+					pdata-&gt;pfilter_table[i][0]);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto multicast_write_done;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lan78xx_write_reg(dev, RFE_CTL, pdata-&gt;rfe_ctl);</div><div class='add'>+	ret = lan78xx_write_reg(dev, RFE_CTL, pdata-&gt;rfe_ctl);</div><div class='add'>+</div><div class='add'>+multicast_write_done:</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netdev_warn(dev-&gt;net, "multicast write failed %pe", ERR_PTR(ret));</div><div class='add'>+	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan78xx_set_multicast(struct net_device *netdev)</div><div class='hunk'>@@ -1327,40 +1556,6 @@ static void lan78xx_set_multicast(struct net_device *netdev)</div><div class='ctx'> 	schedule_work(&amp;pdata-&gt;set_multicast);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,</div><div class='del'>-				      u16 lcladv, u16 rmtadv)</div><div class='del'>-{</div><div class='del'>-	u32 flow = 0, fct_flow = 0;</div><div class='del'>-	u8 cap;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;fc_autoneg)</div><div class='del'>-		cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);</div><div class='del'>-	else</div><div class='del'>-		cap = dev-&gt;fc_request_control;</div><div class='del'>-</div><div class='del'>-	if (cap &amp; FLOW_CTRL_TX)</div><div class='del'>-		flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);</div><div class='del'>-</div><div class='del'>-	if (cap &amp; FLOW_CTRL_RX)</div><div class='del'>-		flow |= FLOW_CR_RX_FCEN_;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;udev-&gt;speed == USB_SPEED_SUPER)</div><div class='del'>-		fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_SS, FLOW_OFF_SS);</div><div class='del'>-	else if (dev-&gt;udev-&gt;speed == USB_SPEED_HIGH)</div><div class='del'>-		fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_HS, FLOW_OFF_HS);</div><div class='del'>-</div><div class='del'>-	netif_dbg(dev, link, dev-&gt;net, "rx pause %s, tx pause %s",</div><div class='del'>-		  (cap &amp; FLOW_CTRL_RX ? "enabled" : "disabled"),</div><div class='del'>-		  (cap &amp; FLOW_CTRL_TX ? "enabled" : "disabled"));</div><div class='del'>-</div><div class='del'>-	lan78xx_write_reg(dev, FCT_FLOW, fct_flow);</div><div class='del'>-</div><div class='del'>-	/* threshold value should be set before enabling flow */</div><div class='del'>-	lan78xx_write_reg(dev, FLOW, flow);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void lan78xx_rx_urb_submit_all(struct lan78xx_net *dev);</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_mac_reset(struct lan78xx_net *dev)</div><div class='hunk'>@@ -1369,24 +1564,24 @@ static int lan78xx_mac_reset(struct lan78xx_net *dev)</div><div class='ctx'> 	u32 val;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;dev-&gt;phy_mutex);</div><div class='add'>+	mutex_lock(&amp;dev-&gt;mdiobus_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* Resetting the device while there is activity on the MDIO</div><div class='ctx'> 	 * bus can result in the MAC interface locking up and not</div><div class='ctx'> 	 * completing register access transactions.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = lan78xx_phy_wait_not_busy(dev);</div><div class='add'>+	ret = lan78xx_mdiobus_wait_not_busy(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto done;</div><div class='add'>+		goto exit_unlock;</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_read_reg(dev, MAC_CR, &amp;val);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto done;</div><div class='add'>+		goto exit_unlock;</div><div class='ctx'> </div><div class='ctx'> 	val |= MAC_CR_RST_;</div><div class='ctx'> 	ret = lan78xx_write_reg(dev, MAC_CR, val);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto done;</div><div class='add'>+		goto exit_unlock;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for the reset to complete before allowing any further</div><div class='ctx'> 	 * MAC register accesses otherwise the MAC may lock up.</div><div class='hunk'>@@ -1394,114 +1589,33 @@ static int lan78xx_mac_reset(struct lan78xx_net *dev)</div><div class='ctx'> 	do {</div><div class='ctx'> 		ret = lan78xx_read_reg(dev, MAC_CR, &amp;val);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-			goto done;</div><div class='add'>+			goto exit_unlock;</div><div class='ctx'> </div><div class='ctx'> 		if (!(val &amp; MAC_CR_RST_)) {</div><div class='ctx'> 			ret = 0;</div><div class='del'>-			goto done;</div><div class='add'>+			goto exit_unlock;</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (!time_after(jiffies, start_time + HZ));</div><div class='ctx'> </div><div class='ctx'> 	ret = -ETIMEDOUT;</div><div class='del'>-done:</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;phy_mutex);</div><div class='add'>+exit_unlock:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;mdiobus_mutex);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lan78xx_link_reset(struct lan78xx_net *dev)</div><div class='add'>+/**</div><div class='add'>+ * lan78xx_phy_int_ack - Acknowledge PHY interrupt</div><div class='add'>+ * @dev: pointer to the LAN78xx device structure</div><div class='add'>+ *</div><div class='add'>+ * This function acknowledges the PHY interrupt by setting the</div><div class='add'>+ * INT_STS_PHY_INT_ bit in the interrupt status register (INT_STS).</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int lan78xx_phy_int_ack(struct lan78xx_net *dev)</div><div class='ctx'> {</div><div class='del'>-	struct phy_device *phydev = dev-&gt;net-&gt;phydev;</div><div class='del'>-	struct ethtool_link_ksettings ecmd;</div><div class='del'>-	int ladv, radv, ret, link;</div><div class='del'>-	u32 buf;</div><div class='del'>-</div><div class='del'>-	/* clear LAN78xx interrupt status */</div><div class='del'>-	ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);</div><div class='del'>-	if (unlikely(ret &lt; 0))</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;phydev-&gt;lock);</div><div class='del'>-	phy_read_status(phydev);</div><div class='del'>-	link = phydev-&gt;link;</div><div class='del'>-	mutex_unlock(&amp;phydev-&gt;lock);</div><div class='del'>-</div><div class='del'>-	if (!link &amp;&amp; dev-&gt;link_on) {</div><div class='del'>-		dev-&gt;link_on = false;</div><div class='del'>-</div><div class='del'>-		/* reset MAC */</div><div class='del'>-		ret = lan78xx_mac_reset(dev);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		del_timer(&amp;dev-&gt;stat_monitor);</div><div class='del'>-	} else if (link &amp;&amp; !dev-&gt;link_on) {</div><div class='del'>-		dev-&gt;link_on = true;</div><div class='del'>-</div><div class='del'>-		phy_ethtool_ksettings_get(phydev, &amp;ecmd);</div><div class='del'>-</div><div class='del'>-		if (dev-&gt;udev-&gt;speed == USB_SPEED_SUPER) {</div><div class='del'>-			if (ecmd.base.speed == 1000) {</div><div class='del'>-				/* disable U2 */</div><div class='del'>-				ret = lan78xx_read_reg(dev, USB_CFG1, &amp;buf);</div><div class='del'>-				if (ret &lt; 0)</div><div class='del'>-					return ret;</div><div class='del'>-				buf &amp;= ~USB_CFG1_DEV_U2_INIT_EN_;</div><div class='del'>-				ret = lan78xx_write_reg(dev, USB_CFG1, buf);</div><div class='del'>-				if (ret &lt; 0)</div><div class='del'>-					return ret;</div><div class='del'>-				/* enable U1 */</div><div class='del'>-				ret = lan78xx_read_reg(dev, USB_CFG1, &amp;buf);</div><div class='del'>-				if (ret &lt; 0)</div><div class='del'>-					return ret;</div><div class='del'>-				buf |= USB_CFG1_DEV_U1_INIT_EN_;</div><div class='del'>-				ret = lan78xx_write_reg(dev, USB_CFG1, buf);</div><div class='del'>-				if (ret &lt; 0)</div><div class='del'>-					return ret;</div><div class='del'>-			} else {</div><div class='del'>-				/* enable U1 &amp; U2 */</div><div class='del'>-				ret = lan78xx_read_reg(dev, USB_CFG1, &amp;buf);</div><div class='del'>-				if (ret &lt; 0)</div><div class='del'>-					return ret;</div><div class='del'>-				buf |= USB_CFG1_DEV_U2_INIT_EN_;</div><div class='del'>-				buf |= USB_CFG1_DEV_U1_INIT_EN_;</div><div class='del'>-				ret = lan78xx_write_reg(dev, USB_CFG1, buf);</div><div class='del'>-				if (ret &lt; 0)</div><div class='del'>-					return ret;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ladv = phy_read(phydev, MII_ADVERTISE);</div><div class='del'>-		if (ladv &lt; 0)</div><div class='del'>-			return ladv;</div><div class='del'>-</div><div class='del'>-		radv = phy_read(phydev, MII_LPA);</div><div class='del'>-		if (radv &lt; 0)</div><div class='del'>-			return radv;</div><div class='del'>-</div><div class='del'>-		netif_dbg(dev, link, dev-&gt;net,</div><div class='del'>-			  "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",</div><div class='del'>-			  ecmd.base.speed, ecmd.base.duplex, ladv, radv);</div><div class='del'>-</div><div class='del'>-		ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,</div><div class='del'>-						 radv);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		if (!timer_pending(&amp;dev-&gt;stat_monitor)) {</div><div class='del'>-			dev-&gt;delta = 1;</div><div class='del'>-			mod_timer(&amp;dev-&gt;stat_monitor,</div><div class='del'>-				  jiffies + STAT_UPDATE_TIMER);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		lan78xx_rx_urb_submit_all(dev);</div><div class='del'>-</div><div class='del'>-		local_bh_disable();</div><div class='del'>-		napi_schedule(&amp;dev-&gt;napi);</div><div class='del'>-		local_bh_enable();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* some work can't be done in tasklets, so we use keventd</div><div class='hunk'>@@ -1530,7 +1644,7 @@ static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 	if (intdata &amp; INT_ENP_PHY_INT) {</div><div class='ctx'> 		netif_dbg(dev, link, dev-&gt;net, "PHY INTR: 0x%08x\n", intdata);</div><div class='del'>-		lan78xx_defer_kevent(dev, EVENT_LINK_RESET);</div><div class='add'>+		lan78xx_defer_kevent(dev, EVENT_PHY_INT_ACK);</div><div class='ctx'> </div><div class='ctx'> 		if (dev-&gt;domain_data.phyirq &gt; 0)</div><div class='ctx'> 			generic_handle_irq_safe(dev-&gt;domain_data.phyirq);</div><div class='hunk'>@@ -1595,12 +1709,16 @@ static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,</div><div class='ctx'> {</div><div class='ctx'> 	if (stringset == ETH_SS_STATS)</div><div class='ctx'> 		memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));</div><div class='add'>+	else if (stringset == ETH_SS_TEST)</div><div class='add'>+		net_selftest_get_strings(data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_get_sset_count(struct net_device *netdev, int sset)</div><div class='ctx'> {</div><div class='ctx'> 	if (sset == ETH_SS_STATS)</div><div class='ctx'> 		return ARRAY_SIZE(lan78xx_gstrings);</div><div class='add'>+	else if (sset == ETH_SS_TEST)</div><div class='add'>+		return net_selftest_get_count();</div><div class='ctx'> 	else</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> }</div><div class='hunk'>@@ -1630,6 +1748,7 @@ static void lan78xx_get_wol(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_read_reg(dev, USB_CFG0, &amp;buf);</div><div class='ctx'> 	if (unlikely(ret &lt; 0)) {</div><div class='add'>+		netdev_warn(dev-&gt;net, "failed to get WoL %pe", ERR_PTR(ret));</div><div class='ctx'> 		wol-&gt;supported = 0;</div><div class='ctx'> 		wol-&gt;wolopts = 0;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -1652,19 +1771,22 @@ static int lan78xx_set_wol(struct net_device *netdev,</div><div class='ctx'> 	struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev-&gt;data[0]);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (wol-&gt;wolopts &amp; ~WAKE_ALL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	ret = usb_autopm_get_interface(dev-&gt;intf);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (wol-&gt;wolopts &amp; ~WAKE_ALL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	pdata-&gt;wol = wol-&gt;wolopts;</div><div class='ctx'> </div><div class='del'>-	device_set_wakeup_enable(&amp;dev-&gt;udev-&gt;dev, (bool)wol-&gt;wolopts);</div><div class='add'>+	ret = device_set_wakeup_enable(&amp;dev-&gt;udev-&gt;dev, (bool)wol-&gt;wolopts);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit_pm_put;</div><div class='ctx'> </div><div class='del'>-	phy_ethtool_set_wol(netdev-&gt;phydev, wol);</div><div class='add'>+	ret = phy_ethtool_set_wol(netdev-&gt;phydev, wol);</div><div class='ctx'> </div><div class='add'>+exit_pm_put:</div><div class='ctx'> 	usb_autopm_put_interface(dev-&gt;intf);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -1673,66 +1795,15 @@ static int lan78xx_set_wol(struct net_device *netdev,</div><div class='ctx'> static int lan78xx_get_eee(struct net_device *net, struct ethtool_keee *edata)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan78xx_net *dev = netdev_priv(net);</div><div class='del'>-	struct phy_device *phydev = net-&gt;phydev;</div><div class='del'>-	int ret;</div><div class='del'>-	u32 buf;</div><div class='del'>-</div><div class='del'>-	ret = usb_autopm_get_interface(dev-&gt;intf);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = phy_ethtool_get_eee(phydev, edata);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto exit;</div><div class='ctx'> </div><div class='del'>-	ret = lan78xx_read_reg(dev, MAC_CR, &amp;buf);</div><div class='del'>-	if (buf &amp; MAC_CR_EEE_EN_) {</div><div class='del'>-		/* EEE_TX_LPI_REQ_DLY &amp; tx_lpi_timer are same uSec unit */</div><div class='del'>-		ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &amp;buf);</div><div class='del'>-		edata-&gt;tx_lpi_timer = buf;</div><div class='del'>-	} else {</div><div class='del'>-		edata-&gt;tx_lpi_timer = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-exit:</div><div class='del'>-	usb_autopm_put_interface(dev-&gt;intf);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return phylink_ethtool_get_eee(dev-&gt;phylink, edata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_set_eee(struct net_device *net, struct ethtool_keee *edata)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan78xx_net *dev = netdev_priv(net);</div><div class='del'>-	int ret;</div><div class='del'>-	u32 buf;</div><div class='del'>-</div><div class='del'>-	ret = usb_autopm_get_interface(dev-&gt;intf);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = phy_ethtool_set_eee(net-&gt;phydev, edata);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='ctx'> </div><div class='del'>-	buf = (u32)edata-&gt;tx_lpi_timer;</div><div class='del'>-	ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);</div><div class='del'>-out:</div><div class='del'>-	usb_autopm_put_interface(dev-&gt;intf);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 lan78xx_get_link(struct net_device *net)</div><div class='del'>-{</div><div class='del'>-	u32 link;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;net-&gt;phydev-&gt;lock);</div><div class='del'>-	phy_read_status(net-&gt;phydev);</div><div class='del'>-	link = net-&gt;phydev-&gt;link;</div><div class='del'>-	mutex_unlock(&amp;net-&gt;phydev-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return link;</div><div class='add'>+	return phylink_ethtool_set_eee(dev-&gt;phylink, edata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan78xx_get_drvinfo(struct net_device *net,</div><div class='hunk'>@@ -1762,141 +1833,69 @@ static int lan78xx_get_link_ksettings(struct net_device *net,</div><div class='ctx'> 				      struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan78xx_net *dev = netdev_priv(net);</div><div class='del'>-	struct phy_device *phydev = net-&gt;phydev;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = usb_autopm_get_interface(dev-&gt;intf);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	phy_ethtool_ksettings_get(phydev, cmd);</div><div class='del'>-</div><div class='del'>-	usb_autopm_put_interface(dev-&gt;intf);</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return phylink_ethtool_ksettings_get(dev-&gt;phylink, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_set_link_ksettings(struct net_device *net,</div><div class='ctx'> 				      const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan78xx_net *dev = netdev_priv(net);</div><div class='del'>-	struct phy_device *phydev = net-&gt;phydev;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	int temp;</div><div class='del'>-</div><div class='del'>-	ret = usb_autopm_get_interface(dev-&gt;intf);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='ctx'> </div><div class='del'>-	/* change speed &amp; duplex */</div><div class='del'>-	ret = phy_ethtool_ksettings_set(phydev, cmd);</div><div class='del'>-</div><div class='del'>-	if (!cmd-&gt;base.autoneg) {</div><div class='del'>-		/* force link down */</div><div class='del'>-		temp = phy_read(phydev, MII_BMCR);</div><div class='del'>-		phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);</div><div class='del'>-		mdelay(1);</div><div class='del'>-		phy_write(phydev, MII_BMCR, temp);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	usb_autopm_put_interface(dev-&gt;intf);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return phylink_ethtool_ksettings_set(dev-&gt;phylink, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan78xx_get_pause(struct net_device *net,</div><div class='ctx'> 			      struct ethtool_pauseparam *pause)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan78xx_net *dev = netdev_priv(net);</div><div class='del'>-	struct phy_device *phydev = net-&gt;phydev;</div><div class='del'>-	struct ethtool_link_ksettings ecmd;</div><div class='del'>-</div><div class='del'>-	phy_ethtool_ksettings_get(phydev, &amp;ecmd);</div><div class='ctx'> </div><div class='del'>-	pause-&gt;autoneg = dev-&gt;fc_autoneg;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;fc_request_control &amp; FLOW_CTRL_TX)</div><div class='del'>-		pause-&gt;tx_pause = 1;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;fc_request_control &amp; FLOW_CTRL_RX)</div><div class='del'>-		pause-&gt;rx_pause = 1;</div><div class='add'>+	phylink_ethtool_get_pauseparam(dev-&gt;phylink, pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_set_pause(struct net_device *net,</div><div class='ctx'> 			     struct ethtool_pauseparam *pause)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan78xx_net *dev = netdev_priv(net);</div><div class='del'>-	struct phy_device *phydev = net-&gt;phydev;</div><div class='del'>-	struct ethtool_link_ksettings ecmd;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	phy_ethtool_ksettings_get(phydev, &amp;ecmd);</div><div class='del'>-</div><div class='del'>-	if (pause-&gt;autoneg &amp;&amp; !ecmd.base.autoneg) {</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;fc_request_control = 0;</div><div class='del'>-	if (pause-&gt;rx_pause)</div><div class='del'>-		dev-&gt;fc_request_control |= FLOW_CTRL_RX;</div><div class='ctx'> </div><div class='del'>-	if (pause-&gt;tx_pause)</div><div class='del'>-		dev-&gt;fc_request_control |= FLOW_CTRL_TX;</div><div class='del'>-</div><div class='del'>-	if (ecmd.base.autoneg) {</div><div class='del'>-		__ETHTOOL_DECLARE_LINK_MODE_MASK(fc) = { 0, };</div><div class='del'>-		u32 mii_adv;</div><div class='del'>-</div><div class='del'>-		linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,</div><div class='del'>-				   ecmd.link_modes.advertising);</div><div class='del'>-		linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,</div><div class='del'>-				   ecmd.link_modes.advertising);</div><div class='del'>-		mii_adv = (u32)mii_advertise_flowctrl(dev-&gt;fc_request_control);</div><div class='del'>-		mii_adv_to_linkmode_adv_t(fc, mii_adv);</div><div class='del'>-		linkmode_or(ecmd.link_modes.advertising, fc,</div><div class='del'>-			    ecmd.link_modes.advertising);</div><div class='del'>-</div><div class='del'>-		phy_ethtool_ksettings_set(phydev, &amp;ecmd);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;fc_autoneg = pause-&gt;autoneg;</div><div class='del'>-</div><div class='del'>-	ret = 0;</div><div class='del'>-exit:</div><div class='del'>-	return ret;</div><div class='add'>+	return phylink_ethtool_set_pauseparam(dev-&gt;phylink, pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_get_regs_len(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	if (!netdev-&gt;phydev)</div><div class='del'>-		return (sizeof(lan78xx_regs));</div><div class='del'>-	else</div><div class='del'>-		return (sizeof(lan78xx_regs) + PHY_REG_SIZE);</div><div class='add'>+	return sizeof(lan78xx_regs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='ctx'> lan78xx_get_regs(struct net_device *netdev, struct ethtool_regs *regs,</div><div class='ctx'> 		 void *buf)</div><div class='ctx'> {</div><div class='del'>-	u32 *data = buf;</div><div class='del'>-	int i, j;</div><div class='ctx'> 	struct lan78xx_net *dev = netdev_priv(netdev);</div><div class='add'>+	unsigned int data_count = 0;</div><div class='add'>+	u32 *data = buf;</div><div class='add'>+	int i, ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Read Device/MAC registers */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(lan78xx_regs); i++)</div><div class='del'>-		lan78xx_read_reg(dev, lan78xx_regs[i], &amp;data[i]);</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(lan78xx_regs); i++) {</div><div class='add'>+		ret = lan78xx_read_reg(dev, lan78xx_regs[i], &amp;data[i]);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			netdev_warn(dev-&gt;net,</div><div class='add'>+				    "failed to read register 0x%08x\n",</div><div class='add'>+				    lan78xx_regs[i]);</div><div class='add'>+			goto clean_data;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (!netdev-&gt;phydev)</div><div class='del'>-		return;</div><div class='add'>+		data_count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='ctx'> </div><div class='del'>-	/* Read PHY registers */</div><div class='del'>-	for (j = 0; j &lt; 32; i++, j++)</div><div class='del'>-		data[i] = phy_read(netdev-&gt;phydev, j);</div><div class='add'>+clean_data:</div><div class='add'>+	memset(data, 0, data_count * sizeof(u32));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops lan78xx_ethtool_ops = {</div><div class='del'>-	.get_link	= lan78xx_get_link,</div><div class='add'>+	.get_link	= ethtool_op_get_link,</div><div class='ctx'> 	.nway_reset	= phy_ethtool_nway_reset,</div><div class='ctx'> 	.get_drvinfo	= lan78xx_get_drvinfo,</div><div class='ctx'> 	.get_msglevel	= lan78xx_get_msglevel,</div><div class='hunk'>@@ -1906,6 +1905,7 @@ static const struct ethtool_ops lan78xx_ethtool_ops = {</div><div class='ctx'> 	.set_eeprom	= lan78xx_ethtool_set_eeprom,</div><div class='ctx'> 	.get_ethtool_stats = lan78xx_get_stats,</div><div class='ctx'> 	.get_sset_count = lan78xx_get_sset_count,</div><div class='add'>+	.self_test	= net_selftest,</div><div class='ctx'> 	.get_strings	= lan78xx_get_strings,</div><div class='ctx'> 	.get_wol	= lan78xx_get_wol,</div><div class='ctx'> 	.set_wol	= lan78xx_set_wol,</div><div class='hunk'>@@ -1920,13 +1920,19 @@ static const struct ethtool_ops lan78xx_ethtool_ops = {</div><div class='ctx'> 	.get_regs	= lan78xx_get_regs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void lan78xx_init_mac_address(struct lan78xx_net *dev)</div><div class='add'>+static int lan78xx_init_mac_address(struct lan78xx_net *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u32 addr_lo, addr_hi;</div><div class='ctx'> 	u8 addr[6];</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	lan78xx_read_reg(dev, RX_ADDRL, &amp;addr_lo);</div><div class='del'>-	lan78xx_read_reg(dev, RX_ADDRH, &amp;addr_hi);</div><div class='add'>+	ret = lan78xx_read_reg(dev, RX_ADDRL, &amp;addr_lo);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_read_reg(dev, RX_ADDRH, &amp;addr_hi);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	addr[0] = addr_lo &amp; 0xFF;</div><div class='ctx'> 	addr[1] = (addr_lo &gt;&gt; 8) &amp; 0xFF;</div><div class='hunk'>@@ -1959,14 +1965,26 @@ static void lan78xx_init_mac_address(struct lan78xx_net *dev)</div><div class='ctx'> 			  (addr[2] &lt;&lt; 16) | (addr[3] &lt;&lt; 24);</div><div class='ctx'> 		addr_hi = addr[4] | (addr[5] &lt;&lt; 8);</div><div class='ctx'> </div><div class='del'>-		lan78xx_write_reg(dev, RX_ADDRL, addr_lo);</div><div class='del'>-		lan78xx_write_reg(dev, RX_ADDRH, addr_hi);</div><div class='add'>+		ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lan78xx_write_reg(dev, MAF_LO(0), addr_lo);</div><div class='del'>-	lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);</div><div class='add'>+	ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	eth_hw_addr_set(dev-&gt;net, addr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* MDIO read and write wrappers for phylib */</div><div class='hunk'>@@ -1980,27 +1998,31 @@ static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;dev-&gt;phy_mutex);</div><div class='add'>+	mutex_lock(&amp;dev-&gt;mdiobus_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* confirm MII not busy */</div><div class='del'>-	ret = lan78xx_phy_wait_not_busy(dev);</div><div class='add'>+	ret = lan78xx_mdiobus_wait_not_busy(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='ctx'> 	/* set the address, index &amp; direction (read from PHY) */</div><div class='ctx'> 	addr = mii_access(phy_id, idx, MII_READ);</div><div class='ctx'> 	ret = lan78xx_write_reg(dev, MII_ACC, addr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto done;</div><div class='ctx'> </div><div class='del'>-	ret = lan78xx_phy_wait_not_busy(dev);</div><div class='add'>+	ret = lan78xx_mdiobus_wait_not_busy(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_read_reg(dev, MII_DATA, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto done;</div><div class='ctx'> </div><div class='ctx'> 	ret = (int)(val &amp; 0xFFFF);</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;phy_mutex);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;mdiobus_mutex);</div><div class='ctx'> 	usb_autopm_put_interface(dev-&gt;intf);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2017,28 +2039,32 @@ static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;dev-&gt;phy_mutex);</div><div class='add'>+	mutex_lock(&amp;dev-&gt;mdiobus_mutex);</div><div class='ctx'> </div><div class='ctx'> 	/* confirm MII not busy */</div><div class='del'>-	ret = lan78xx_phy_wait_not_busy(dev);</div><div class='add'>+	ret = lan78xx_mdiobus_wait_not_busy(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='ctx'> 	val = (u32)regval;</div><div class='ctx'> 	ret = lan78xx_write_reg(dev, MII_DATA, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto done;</div><div class='ctx'> </div><div class='ctx'> 	/* set the address, index &amp; direction (write to PHY) */</div><div class='ctx'> 	addr = mii_access(phy_id, idx, MII_WRITE);</div><div class='ctx'> 	ret = lan78xx_write_reg(dev, MII_ACC, addr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto done;</div><div class='ctx'> </div><div class='del'>-	ret = lan78xx_phy_wait_not_busy(dev);</div><div class='add'>+	ret = lan78xx_mdiobus_wait_not_busy(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto done;</div><div class='ctx'> </div><div class='ctx'> done:</div><div class='del'>-	mutex_unlock(&amp;dev-&gt;phy_mutex);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;mdiobus_mutex);</div><div class='ctx'> 	usb_autopm_put_interface(dev-&gt;intf);</div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_mdio_init(struct lan78xx_net *dev)</div><div class='hunk'>@@ -2094,26 +2120,6 @@ static void lan78xx_remove_mdio(struct lan78xx_net *dev)</div><div class='ctx'> 	mdiobus_free(dev-&gt;mdiobus);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lan78xx_link_status_change(struct net_device *net)</div><div class='del'>-{</div><div class='del'>-	struct lan78xx_net *dev = netdev_priv(net);</div><div class='del'>-	struct phy_device *phydev = net-&gt;phydev;</div><div class='del'>-	u32 data;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_read_reg(dev, MAC_CR, &amp;data);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (phydev-&gt;enable_tx_lpi)</div><div class='del'>-		data |=  MAC_CR_EEE_EN_;</div><div class='del'>-	else</div><div class='del'>-		data &amp;= ~MAC_CR_EEE_EN_;</div><div class='del'>-	lan78xx_write_reg(dev, MAC_CR, data);</div><div class='del'>-</div><div class='del'>-	phy_print_status(phydev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int irq_map(struct irq_domain *d, unsigned int irq,</div><div class='ctx'> 		   irq_hw_number_t hwirq)</div><div class='ctx'> {</div><div class='hunk'>@@ -2164,13 +2170,22 @@ static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)</div><div class='ctx'> 	struct lan78xx_net *dev =</div><div class='ctx'> 			container_of(data, struct lan78xx_net, domain_data);</div><div class='ctx'> 	u32 buf;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* call register access here because irq_bus_lock &amp; irq_bus_sync_unlock</div><div class='ctx'> 	 * are only two callbacks executed in non-atomic contex.</div><div class='ctx'> 	 */</div><div class='del'>-	lan78xx_read_reg(dev, INT_EP_CTL, &amp;buf);</div><div class='add'>+	ret = lan78xx_read_reg(dev, INT_EP_CTL, &amp;buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto irq_bus_sync_unlock;</div><div class='add'>+</div><div class='ctx'> 	if (buf != data-&gt;irqenable)</div><div class='del'>-		lan78xx_write_reg(dev, INT_EP_CTL, data-&gt;irqenable);</div><div class='add'>+		ret = lan78xx_write_reg(dev, INT_EP_CTL, data-&gt;irqenable);</div><div class='add'>+</div><div class='add'>+irq_bus_sync_unlock:</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netdev_err(dev-&gt;net, "Failed to sync IRQ enable register: %pe\n",</div><div class='add'>+			   ERR_PTR(ret));</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;data-&gt;irq_lock);</div><div class='ctx'> }</div><div class='hunk'>@@ -2185,24 +2200,24 @@ static struct irq_chip lan78xx_irqchip = {</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *of_node;</div><div class='ctx'> 	struct irq_domain *irqdomain;</div><div class='ctx'> 	unsigned int irqmap = 0;</div><div class='ctx'> 	u32 buf;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	of_node = dev-&gt;udev-&gt;dev.parent-&gt;of_node;</div><div class='del'>-</div><div class='ctx'> 	mutex_init(&amp;dev-&gt;domain_data.irq_lock);</div><div class='ctx'> </div><div class='del'>-	lan78xx_read_reg(dev, INT_EP_CTL, &amp;buf);</div><div class='add'>+	ret = lan78xx_read_reg(dev, INT_EP_CTL, &amp;buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;domain_data.irqenable = buf;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;domain_data.irqchip = &amp;lan78xx_irqchip;</div><div class='ctx'> 	dev-&gt;domain_data.irq_handler = handle_simple_irq;</div><div class='ctx'> </div><div class='del'>-	irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,</div><div class='del'>-					  &amp;chip_domain_ops, &amp;dev-&gt;domain_data);</div><div class='add'>+	irqdomain = irq_domain_create_simple(dev_fwnode(dev-&gt;udev-&gt;dev.parent), MAX_INT_EP, 0,</div><div class='add'>+					     &amp;chip_domain_ops, &amp;dev-&gt;domain_data);</div><div class='ctx'> 	if (irqdomain) {</div><div class='ctx'> 		/* create mapping for PHY interrupt */</div><div class='ctx'> 		irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);</div><div class='hunk'>@@ -2234,131 +2249,617 @@ static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)</div><div class='ctx'> 	dev-&gt;domain_data.irqdomain = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lan8835_fixup(struct phy_device *phydev)</div><div class='add'>+static void lan78xx_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			       const struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='del'>-	int buf;</div><div class='del'>-	struct lan78xx_net *dev = netdev_priv(phydev-&gt;attached_dev);</div><div class='add'>+	struct net_device *net = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct lan78xx_net *dev = netdev_priv(net);</div><div class='add'>+	u32 mac_cr = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	/* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */</div><div class='del'>-	buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010);</div><div class='del'>-	buf &amp;= ~0x1800;</div><div class='del'>-	buf |= 0x0800;</div><div class='del'>-	phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf);</div><div class='add'>+	/* Check if the mode is supported */</div><div class='add'>+	if (mode != MLO_AN_FIXED &amp;&amp; mode != MLO_AN_PHY) {</div><div class='add'>+		netdev_err(net, "Unsupported negotiation mode: %u\n", mode);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* RGMII MAC TXC Delay Enable */</div><div class='del'>-	lan78xx_write_reg(dev, MAC_RGMII_ID,</div><div class='del'>-			  MAC_RGMII_ID_TXC_DELAY_EN_);</div><div class='add'>+	switch (state-&gt;interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_GMII:</div><div class='add'>+		mac_cr |= MAC_CR_GMII_EN_;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_warn(net, "Unsupported interface mode: %d\n",</div><div class='add'>+			    state-&gt;interface);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* RGMII TX DLL Tune Adjust */</div><div class='del'>-	lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);</div><div class='add'>+	ret = lan78xx_update_reg(dev, MAC_CR, MAC_CR_GMII_EN_, mac_cr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netdev_err(net, "Failed to config MAC with error %pe\n",</div><div class='add'>+			   ERR_PTR(ret));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;interface = PHY_INTERFACE_MODE_RGMII_TXID;</div><div class='add'>+static void lan78xx_mac_link_down(struct phylink_config *config,</div><div class='add'>+				  unsigned int mode, phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct net_device *net = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct lan78xx_net *dev = netdev_priv(net);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	return 1;</div><div class='add'>+	netif_stop_queue(net);</div><div class='add'>+</div><div class='add'>+	/* MAC reset will not de-assert TXEN/RXEN, we need to stop them</div><div class='add'>+	 * manually before reset. TX and RX should be disabled before running</div><div class='add'>+	 * link_up sequence.</div><div class='add'>+	 */</div><div class='add'>+	ret = lan78xx_stop_tx_path(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto link_down_fail;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_stop_rx_path(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto link_down_fail;</div><div class='add'>+</div><div class='add'>+	/* MAC reset seems to not affect MAC configuration, no idea if it is</div><div class='add'>+	 * really needed, but it was done in previous driver version. So, leave</div><div class='add'>+	 * it here.</div><div class='add'>+	 */</div><div class='add'>+	ret = lan78xx_mac_reset(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto link_down_fail;</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+link_down_fail:</div><div class='add'>+	netdev_err(dev-&gt;net, "Failed to set MAC down with error %pe\n",</div><div class='add'>+		   ERR_PTR(ret));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ksz9031rnx_fixup(struct phy_device *phydev)</div><div class='add'>+/**</div><div class='add'>+ * lan78xx_configure_usb - Configure USB link power settings</div><div class='add'>+ * @dev: pointer to the LAN78xx device structure</div><div class='add'>+ * @speed: negotiated Ethernet link speed (in Mbps)</div><div class='add'>+ *</div><div class='add'>+ * This function configures U1/U2 link power management for SuperSpeed</div><div class='add'>+ * USB devices based on the current Ethernet link speed. It uses the</div><div class='add'>+ * USB_CFG1 register to enable or disable U1 and U2 low-power states.</div><div class='add'>+ *</div><div class='add'>+ * Note: Only LAN7800 and LAN7801 support SuperSpeed (USB 3.x).</div><div class='add'>+ *       LAN7850 is a High-Speed-only (USB 2.0) device and is skipped.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int lan78xx_configure_usb(struct lan78xx_net *dev, int speed)</div><div class='ctx'> {</div><div class='del'>-	struct lan78xx_net *dev = netdev_priv(phydev-&gt;attached_dev);</div><div class='add'>+	u32 mask, val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Only configure USB settings for SuperSpeed devices */</div><div class='add'>+	if (dev-&gt;udev-&gt;speed != USB_SPEED_SUPER)</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	/* Micrel9301RNX PHY configuration */</div><div class='del'>-	/* RGMII Control Signal Pad Skew */</div><div class='del'>-	phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077);</div><div class='del'>-	/* RGMII RX Data Pad Skew */</div><div class='del'>-	phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777);</div><div class='del'>-	/* RGMII RX Clock Pad Skew */</div><div class='del'>-	phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF);</div><div class='add'>+	/* LAN7850 does not support USB 3.x */</div><div class='add'>+	if (dev-&gt;chipid == ID_REV_CHIP_ID_7850_) {</div><div class='add'>+		netdev_warn_once(dev-&gt;net, "Unexpected SuperSpeed for LAN7850 (USB 2.0 only)\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;interface = PHY_INTERFACE_MODE_RGMII_RXID;</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		/* Disable U2, enable U1 */</div><div class='add'>+		ret = lan78xx_update_reg(dev, USB_CFG1,</div><div class='add'>+					 USB_CFG1_DEV_U2_INIT_EN_, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> </div><div class='del'>-	return 1;</div><div class='add'>+		return lan78xx_update_reg(dev, USB_CFG1,</div><div class='add'>+					  USB_CFG1_DEV_U1_INIT_EN_,</div><div class='add'>+					  USB_CFG1_DEV_U1_INIT_EN_);</div><div class='add'>+</div><div class='add'>+	case SPEED_100:</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		/* Enable both U1 and U2 */</div><div class='add'>+		mask = USB_CFG1_DEV_U1_INIT_EN_ | USB_CFG1_DEV_U2_INIT_EN_;</div><div class='add'>+		val = mask;</div><div class='add'>+		return lan78xx_update_reg(dev, USB_CFG1, mask, val);</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		netdev_warn(dev-&gt;net, "Unsupported link speed: %d\n", speed);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lan78xx_configure_flowcontrol - Set MAC and FIFO flow control configuration</div><div class='add'>+ * @dev: pointer to the LAN78xx device structure</div><div class='add'>+ * @tx_pause: enable transmission of pause frames</div><div class='add'>+ * @rx_pause: enable reception of pause frames</div><div class='add'>+ *</div><div class='add'>+ * This function configures the LAN78xx flow control settings by writing</div><div class='add'>+ * to the FLOW and FCT_FLOW registers. The pause time is set to the</div><div class='add'>+ * maximum allowed value (65535 quanta). FIFO thresholds are selected</div><div class='add'>+ * based on USB speed.</div><div class='add'>+ *</div><div class='add'>+ * The Pause Time field is measured in units of 512-bit times (quanta):</div><div class='add'>+ *   - At 1 Gbps: 1 quanta = 512 ns → max ~33.6 ms pause</div><div class='add'>+ *   - At 100 Mbps: 1 quanta = 5.12 µs → max ~335 ms pause</div><div class='add'>+ *   - At 10 Mbps: 1 quanta = 51.2 µs → max ~3.3 s pause</div><div class='add'>+ *</div><div class='add'>+ * Flow control thresholds (FCT_FLOW) are used to trigger pause/resume:</div><div class='add'>+ *   - RXUSED is the number of bytes used in the RX FIFO</div><div class='add'>+ *   - Flow is turned ON when RXUSED ≥ FLOW_ON threshold</div><div class='add'>+ *   - Flow is turned OFF when RXUSED ≤ FLOW_OFF threshold</div><div class='add'>+ *   - Both thresholds are encoded in units of 512 bytes (rounded up)</div><div class='add'>+ *</div><div class='add'>+ * Thresholds differ by USB speed because available USB bandwidth</div><div class='add'>+ * affects how fast packets can be drained from the RX FIFO:</div><div class='add'>+ *   - USB 3.x (SuperSpeed):</div><div class='add'>+ *       FLOW_ON  = 9216 bytes → 18 units</div><div class='add'>+ *       FLOW_OFF = 4096 bytes →  8 units</div><div class='add'>+ *   - USB 2.0 (High-Speed):</div><div class='add'>+ *       FLOW_ON  = 8704 bytes → 17 units</div><div class='add'>+ *       FLOW_OFF = 1024 bytes →  2 units</div><div class='add'>+ *</div><div class='add'>+ * Note: The FCT_FLOW register must be configured before enabling TX pause</div><div class='add'>+ *       (i.e., before setting FLOW_CR_TX_FCEN_), as required by the hardware.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int lan78xx_configure_flowcontrol(struct lan78xx_net *dev,</div><div class='add'>+					 bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	/* Use maximum pause time: 65535 quanta (512-bit times) */</div><div class='add'>+	const u32 pause_time_quanta = 65535;</div><div class='add'>+	u32 fct_flow = 0;</div><div class='add'>+	u32 flow = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Prepare MAC flow control bits */</div><div class='add'>+	if (tx_pause)</div><div class='add'>+		flow |= FLOW_CR_TX_FCEN_ | pause_time_quanta;</div><div class='add'>+</div><div class='add'>+	if (rx_pause)</div><div class='add'>+		flow |= FLOW_CR_RX_FCEN_;</div><div class='add'>+</div><div class='add'>+	/* Select RX FIFO thresholds based on USB speed</div><div class='add'>+	 *</div><div class='add'>+	 * FCT_FLOW layout:</div><div class='add'>+	 *   bits [6:0]   FLOW_ON threshold (RXUSED ≥ ON → assert pause)</div><div class='add'>+	 *   bits [14:8]  FLOW_OFF threshold (RXUSED ≤ OFF → deassert pause)</div><div class='add'>+	 *   thresholds are expressed in units of 512 bytes</div><div class='add'>+	 */</div><div class='add'>+	switch (dev-&gt;udev-&gt;speed) {</div><div class='add'>+	case USB_SPEED_SUPER:</div><div class='add'>+		fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_SS, FLOW_OFF_SS);</div><div class='add'>+		break;</div><div class='add'>+	case USB_SPEED_HIGH:</div><div class='add'>+		fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_HS, FLOW_OFF_HS);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_warn(dev-&gt;net, "Unsupported USB speed: %d\n",</div><div class='add'>+			    dev-&gt;udev-&gt;speed);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Step 1: Write FIFO thresholds before enabling pause frames */</div><div class='add'>+	ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Step 2: Enable MAC pause functionality */</div><div class='add'>+	return lan78xx_write_reg(dev, FLOW, flow);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct phy_device *lan7801_phy_init(struct lan78xx_net *dev)</div><div class='add'>+static void lan78xx_mac_link_up(struct phylink_config *config,</div><div class='add'>+				struct phy_device *phy,</div><div class='add'>+				unsigned int mode, phy_interface_t interface,</div><div class='add'>+				int speed, int duplex,</div><div class='add'>+				bool tx_pause, bool rx_pause)</div><div class='ctx'> {</div><div class='del'>-	u32 buf;</div><div class='add'>+	struct net_device *net = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct lan78xx_net *dev = netdev_priv(net);</div><div class='add'>+	u32 mac_cr = 0;</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct fixed_phy_status fphy_status = {</div><div class='del'>-		.link = 1,</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		mac_cr |= MAC_CR_SPEED_1000_;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		mac_cr |= MAC_CR_SPEED_100_;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		mac_cr |= MAC_CR_SPEED_10_;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_err(dev-&gt;net, "Unsupported speed %d\n", speed);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='add'>+		mac_cr |= MAC_CR_FULL_DUPLEX_;</div><div class='add'>+</div><div class='add'>+	/* make sure TXEN and RXEN are disabled before reconfiguring MAC */</div><div class='add'>+	ret = lan78xx_update_reg(dev, MAC_CR, MAC_CR_SPEED_MASK_ |</div><div class='add'>+				 MAC_CR_FULL_DUPLEX_ | MAC_CR_EEE_EN_, mac_cr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto link_up_fail;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_configure_flowcontrol(dev, tx_pause, rx_pause);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto link_up_fail;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_configure_usb(dev, speed);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto link_up_fail;</div><div class='add'>+</div><div class='add'>+	lan78xx_rx_urb_submit_all(dev);</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_flush_rx_fifo(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto link_up_fail;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_flush_tx_fifo(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto link_up_fail;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_start_tx_path(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto link_up_fail;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_start_rx_path(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto link_up_fail;</div><div class='add'>+</div><div class='add'>+	netif_start_queue(net);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+link_up_fail:</div><div class='add'>+	netdev_err(dev-&gt;net, "Failed to set MAC up with error %pe\n",</div><div class='add'>+		   ERR_PTR(ret));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lan78xx_mac_eee_enable - Enable or disable MAC-side EEE support</div><div class='add'>+ * @dev: LAN78xx device</div><div class='add'>+ * @enable: true to enable EEE, false to disable</div><div class='add'>+ *</div><div class='add'>+ * This function sets or clears the MAC_CR_EEE_EN_ bit to control Energy</div><div class='add'>+ * Efficient Ethernet (EEE) operation. According to current understanding</div><div class='add'>+ * of the LAN7800 documentation, this bit can be modified while TX and RX</div><div class='add'>+ * are enabled. No explicit requirement was found to disable data paths</div><div class='add'>+ * before changing this bit.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code</div><div class='add'>+ */</div><div class='add'>+static int lan78xx_mac_eee_enable(struct lan78xx_net *dev, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 mac_cr = 0;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		mac_cr |= MAC_CR_EEE_EN_;</div><div class='add'>+</div><div class='add'>+	return lan78xx_update_reg(dev, MAC_CR, MAC_CR_EEE_EN_, mac_cr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan78xx_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct net_device *net = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct lan78xx_net *dev = netdev_priv(net);</div><div class='add'>+</div><div class='add'>+	lan78xx_mac_eee_enable(dev, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan78xx_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,</div><div class='add'>+				     bool tx_clk_stop)</div><div class='add'>+{</div><div class='add'>+	struct net_device *net = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct lan78xx_net *dev = netdev_priv(net);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Software should only change this field when Energy Efficient</div><div class='add'>+	 * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing</div><div class='add'>+	 * EEEEN during probe, and phylink itself guarantees that</div><div class='add'>+	 * mac_disable_tx_lpi() will have been previously called.</div><div class='add'>+	 */</div><div class='add'>+	ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, timer);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return lan78xx_mac_eee_enable(dev, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops lan78xx_phylink_mac_ops = {</div><div class='add'>+	.mac_config = lan78xx_mac_config,</div><div class='add'>+	.mac_link_down = lan78xx_mac_link_down,</div><div class='add'>+	.mac_link_up = lan78xx_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = lan78xx_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = lan78xx_mac_enable_tx_lpi,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lan78xx_set_fixed_link() - Set fixed link configuration for LAN7801</div><div class='add'>+ * @dev: LAN78xx device</div><div class='add'>+ *</div><div class='add'>+ * Use fixed link configuration with 1 Gbps full duplex. This is used in special</div><div class='add'>+ * cases like EVB-KSZ9897-1, where LAN7801 acts as a USB-to-Ethernet interface</div><div class='add'>+ * to a switch without a visible PHY.</div><div class='add'>+ *</div><div class='add'>+ * Return: pointer to the registered fixed PHY, or ERR_PTR() on error.</div><div class='add'>+ */</div><div class='add'>+static int lan78xx_set_fixed_link(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='add'>+	static const struct phylink_link_state state = {</div><div class='ctx'> 		.speed = SPEED_1000,</div><div class='ctx'> 		.duplex = DUPLEX_FULL,</div><div class='ctx'> 	};</div><div class='add'>+</div><div class='add'>+	netdev_info(dev-&gt;net,</div><div class='add'>+		    "No PHY found on LAN7801 – using fixed link instead (e.g. EVB-KSZ9897-1)\n");</div><div class='add'>+</div><div class='add'>+	return phylink_set_fixed_link(dev-&gt;phylink, &amp;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lan78xx_get_phy() - Probe or register PHY device and set interface mode</div><div class='add'>+ * @dev: LAN78xx device structure</div><div class='add'>+ *</div><div class='add'>+ * This function attempts to find a PHY on the MDIO bus. If no PHY is found</div><div class='add'>+ * and the chip is LAN7801, it registers a fixed PHY as fallback. It also</div><div class='add'>+ * sets dev-&gt;interface based on chip ID and detected PHY type.</div><div class='add'>+ *</div><div class='add'>+ * Return: a valid PHY device pointer, or ERR_PTR() on failure.</div><div class='add'>+ */</div><div class='add'>+static struct phy_device *lan78xx_get_phy(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='ctx'> 	struct phy_device *phydev;</div><div class='ctx'> </div><div class='add'>+	/* Attempt to locate a PHY on the MDIO bus */</div><div class='ctx'> 	phydev = phy_find_first(dev-&gt;mdiobus);</div><div class='del'>-	if (!phydev) {</div><div class='del'>-		netdev_dbg(dev-&gt;net, "PHY Not Found!! Registering Fixed PHY\n");</div><div class='del'>-		phydev = fixed_phy_register(PHY_POLL, &amp;fphy_status, NULL);</div><div class='del'>-		if (IS_ERR(phydev)) {</div><div class='del'>-			netdev_err(dev-&gt;net, "No PHY/fixed_PHY found\n");</div><div class='del'>-			return NULL;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;chipid) {</div><div class='add'>+	case ID_REV_CHIP_ID_7801_:</div><div class='add'>+		if (phydev) {</div><div class='add'>+			/* External RGMII PHY detected */</div><div class='add'>+			dev-&gt;interface = PHY_INTERFACE_MODE_RGMII_ID;</div><div class='add'>+			phydev-&gt;is_internal = false;</div><div class='add'>+</div><div class='add'>+			if (!phydev-&gt;drv)</div><div class='add'>+				netdev_warn(dev-&gt;net,</div><div class='add'>+					    "PHY driver not found – assuming RGMII delays are on PCB or strapped for the PHY\n");</div><div class='add'>+</div><div class='add'>+			return phydev;</div><div class='ctx'> 		}</div><div class='del'>-		netdev_dbg(dev-&gt;net, "Registered FIXED PHY\n");</div><div class='add'>+</div><div class='ctx'> 		dev-&gt;interface = PHY_INTERFACE_MODE_RGMII;</div><div class='add'>+		/* No PHY found – fallback to fixed PHY (e.g. KSZ switch board) */</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	case ID_REV_CHIP_ID_7800_:</div><div class='add'>+	case ID_REV_CHIP_ID_7850_:</div><div class='add'>+		if (!phydev)</div><div class='add'>+			return ERR_PTR(-ENODEV);</div><div class='add'>+</div><div class='add'>+		/* These use internal GMII-connected PHY */</div><div class='add'>+		dev-&gt;interface = PHY_INTERFACE_MODE_GMII;</div><div class='add'>+		phydev-&gt;is_internal = true;</div><div class='add'>+		return phydev;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		netdev_err(dev-&gt;net, "Unknown CHIP ID: 0x%08x\n", dev-&gt;chipid);</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lan78xx_mac_prepare_for_phy() - Preconfigure MAC-side interface settings</div><div class='add'>+ * @dev: LAN78xx device</div><div class='add'>+ *</div><div class='add'>+ * Configure MAC-side registers according to dev-&gt;interface, which should be</div><div class='add'>+ * set by lan78xx_get_phy().</div><div class='add'>+ *</div><div class='add'>+ * - For PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+ *   Enable MAC-side TXC delay. This mode seems to be used in a special setup</div><div class='add'>+ *   without a real PHY, likely on EVB-KSZ9897-1. In that design, LAN7801 is</div><div class='add'>+ *   connected to the KSZ9897 switch, and the link timing is expected to be</div><div class='add'>+ *   hardwired (e.g. via strapping or board layout). No devicetree support is</div><div class='add'>+ *   assumed here.</div><div class='add'>+ *</div><div class='add'>+ * - For PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+ *   Disable MAC-side delay and rely on the PHY driver to provide delay.</div><div class='add'>+ *</div><div class='add'>+ * - For GMII, no MAC-specific config is needed.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code.</div><div class='add'>+ */</div><div class='add'>+static int lan78xx_mac_prepare_for_phy(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+		/* Enable MAC-side TX clock delay */</div><div class='ctx'> 		ret = lan78xx_write_reg(dev, MAC_RGMII_ID,</div><div class='ctx'> 					MAC_RGMII_ID_TXC_DELAY_EN_);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='ctx'> 		ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);</div><div class='del'>-		ret = lan78xx_read_reg(dev, HW_CFG, &amp;buf);</div><div class='del'>-		buf |= HW_CFG_CLK125_EN_;</div><div class='del'>-		buf |= HW_CFG_REFCLK25_EN_;</div><div class='del'>-		ret = lan78xx_write_reg(dev, HW_CFG, buf);</div><div class='del'>-	} else {</div><div class='del'>-		if (!phydev-&gt;drv) {</div><div class='del'>-			netdev_err(dev-&gt;net, "no PHY driver found\n");</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		dev-&gt;interface = PHY_INTERFACE_MODE_RGMII;</div><div class='del'>-		/* external PHY fixup for KSZ9031RNX */</div><div class='del'>-		ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,</div><div class='del'>-						 ksz9031rnx_fixup);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			netdev_err(dev-&gt;net, "Failed to register fixup for PHY_KSZ9031RNX\n");</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		/* external PHY fixup for LAN8835 */</div><div class='del'>-		ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,</div><div class='del'>-						 lan8835_fixup);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			netdev_err(dev-&gt;net, "Failed to register fixup for PHY_LAN8835\n");</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		/* add more external PHY fixup here if needed */</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = lan78xx_update_reg(dev, HW_CFG,</div><div class='add'>+					 HW_CFG_CLK125_EN_ | HW_CFG_REFCLK25_EN_,</div><div class='add'>+					 HW_CFG_CLK125_EN_ | HW_CFG_REFCLK25_EN_);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+		/* Disable MAC-side TXC delay, PHY provides it */</div><div class='add'>+		ret = lan78xx_write_reg(dev, MAC_RGMII_ID, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_GMII:</div><div class='add'>+		/* No MAC-specific configuration required */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		netdev_warn(dev-&gt;net, "Unsupported interface mode: %d\n",</div><div class='add'>+			    dev-&gt;interface);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lan78xx_configure_leds_from_dt() - Configure LED enables based on DT</div><div class='add'>+ * @dev: LAN78xx device</div><div class='add'>+ * @phydev: PHY device (must be valid)</div><div class='add'>+ *</div><div class='add'>+ * Reads "microchip,led-modes" property from the PHY's DT node and enables</div><div class='add'>+ * the corresponding number of LEDs by writing to HW_CFG.</div><div class='add'>+ *</div><div class='add'>+ * This helper preserves the original logic, enabling up to 4 LEDs.</div><div class='add'>+ * If the property is not present, this function does nothing.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success or a negative error code.</div><div class='add'>+ */</div><div class='add'>+static int lan78xx_configure_leds_from_dt(struct lan78xx_net *dev,</div><div class='add'>+					  struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = phydev-&gt;mdio.dev.of_node;</div><div class='add'>+	u32 reg;</div><div class='add'>+	int len, ret;</div><div class='add'>+</div><div class='add'>+	if (!np)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	len = of_property_count_elems_of_size(np, "microchip,led-modes",</div><div class='add'>+					      sizeof(u32));</div><div class='add'>+	if (len &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_read_reg(dev, HW_CFG, &amp;reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~(HW_CFG_LED0_EN_ | HW_CFG_LED1_EN_ |</div><div class='add'>+		 HW_CFG_LED2_EN_ | HW_CFG_LED3_EN_);</div><div class='add'>+</div><div class='add'>+	reg |= (len &gt; 0) * HW_CFG_LED0_EN_ |</div><div class='add'>+	       (len &gt; 1) * HW_CFG_LED1_EN_ |</div><div class='add'>+	       (len &gt; 2) * HW_CFG_LED2_EN_ |</div><div class='add'>+	       (len &gt; 3) * HW_CFG_LED3_EN_;</div><div class='add'>+</div><div class='add'>+	return lan78xx_write_reg(dev, HW_CFG, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan78xx_phylink_setup(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='add'>+	struct phylink_config *pc = &amp;dev-&gt;phylink_config;</div><div class='add'>+	struct phylink *phylink;</div><div class='ctx'> </div><div class='del'>-		phydev-&gt;is_internal = false;</div><div class='add'>+	pc-&gt;dev = &amp;dev-&gt;net-&gt;dev;</div><div class='add'>+	pc-&gt;type = PHYLINK_NETDEV;</div><div class='add'>+	pc-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | MAC_10 |</div><div class='add'>+			       MAC_100 | MAC_1000FD;</div><div class='add'>+	pc-&gt;mac_managed_pm = true;</div><div class='add'>+	pc-&gt;lpi_capabilities = MAC_100FD | MAC_1000FD;</div><div class='add'>+	/*</div><div class='add'>+	 * Default TX LPI (Low Power Idle) request delay count is set to 50us.</div><div class='add'>+	 *</div><div class='add'>+	 * Source: LAN7800 Documentation, DS00001992H, Section 15.1.57, Page 204.</div><div class='add'>+	 *</div><div class='add'>+	 * Reasoning:</div><div class='add'>+	 * According to the application note in the LAN7800 documentation, a</div><div class='add'>+	 * zero delay may negatively impact the TX data path’s ability to</div><div class='add'>+	 * support Gigabit operation. A value of 50us is recommended as a</div><div class='add'>+	 * reasonable default when the part operates at Gigabit speeds,</div><div class='add'>+	 * balancing stability and power efficiency in EEE mode. This delay can</div><div class='add'>+	 * be increased based on performance testing, as EEE is designed for</div><div class='add'>+	 * scenarios with mostly idle links and occasional bursts of full</div><div class='add'>+	 * bandwidth transmission. The goal is to ensure reliable Gigabit</div><div class='add'>+	 * performance without overly aggressive power optimization during</div><div class='add'>+	 * inactive periods.</div><div class='add'>+	 */</div><div class='add'>+	pc-&gt;lpi_timer_default = 50;</div><div class='add'>+	pc-&gt;eee_enabled_default = true;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chipid == ID_REV_CHIP_ID_7801_)</div><div class='add'>+		phy_interface_set_rgmii(pc-&gt;supported_interfaces);</div><div class='add'>+	else</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII, pc-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	memcpy(dev-&gt;phylink_config.lpi_interfaces,</div><div class='add'>+	       dev-&gt;phylink_config.supported_interfaces,</div><div class='add'>+	       sizeof(dev-&gt;phylink_config.lpi_interfaces));</div><div class='add'>+</div><div class='add'>+	phylink = phylink_create(pc, dev-&gt;net-&gt;dev.fwnode,</div><div class='add'>+				 dev-&gt;interface, &amp;lan78xx_phylink_mac_ops);</div><div class='add'>+	if (IS_ERR(phylink))</div><div class='add'>+		return PTR_ERR(phylink);</div><div class='add'>+</div><div class='add'>+	dev-&gt;phylink = phylink;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan78xx_phy_uninit(struct lan78xx_net *dev)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;phylink) {</div><div class='add'>+		phylink_disconnect_phy(dev-&gt;phylink);</div><div class='add'>+		phylink_destroy(dev-&gt;phylink);</div><div class='add'>+		dev-&gt;phylink = NULL;</div><div class='ctx'> 	}</div><div class='del'>-	return phydev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_phy_init(struct lan78xx_net *dev)</div><div class='ctx'> {</div><div class='del'>-	__ETHTOOL_DECLARE_LINK_MODE_MASK(fc) = { 0, };</div><div class='del'>-	int ret;</div><div class='del'>-	u32 mii_adv;</div><div class='ctx'> 	struct phy_device *phydev;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	switch (dev-&gt;chipid) {</div><div class='del'>-	case ID_REV_CHIP_ID_7801_:</div><div class='del'>-		phydev = lan7801_phy_init(dev);</div><div class='del'>-		if (!phydev) {</div><div class='del'>-			netdev_err(dev-&gt;net, "lan7801: PHY Init Failed");</div><div class='del'>-			return -EIO;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='add'>+	phydev = lan78xx_get_phy(dev);</div><div class='add'>+	/* phydev can be NULL if no PHY is found and the chip is LAN7801,</div><div class='add'>+	 * which will use a fixed link later.</div><div class='add'>+	 * If an  error occurs, return the error code immediately.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_ERR(phydev))</div><div class='add'>+		return PTR_ERR(phydev);</div><div class='ctx'> </div><div class='del'>-	case ID_REV_CHIP_ID_7800_:</div><div class='del'>-	case ID_REV_CHIP_ID_7850_:</div><div class='del'>-		phydev = phy_find_first(dev-&gt;mdiobus);</div><div class='del'>-		if (!phydev) {</div><div class='del'>-			netdev_err(dev-&gt;net, "no PHY found\n");</div><div class='del'>-			return -EIO;</div><div class='del'>-		}</div><div class='del'>-		phydev-&gt;is_internal = true;</div><div class='del'>-		dev-&gt;interface = PHY_INTERFACE_MODE_GMII;</div><div class='del'>-		break;</div><div class='add'>+	ret = lan78xx_phylink_setup(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-		netdev_err(dev-&gt;net, "Unknown CHIP ID found\n");</div><div class='del'>-		return -EIO;</div><div class='add'>+	ret = lan78xx_mac_prepare_for_phy(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto phylink_uninit;</div><div class='add'>+</div><div class='add'>+	/* If no PHY is found, set up a fixed link. It is very specific to</div><div class='add'>+	 * the LAN7801 and is used in special cases like EVB-KSZ9897-1 where</div><div class='add'>+	 * LAN7801 acts as a USB-to-Ethernet interface to a switch without</div><div class='add'>+	 * a visible PHY.</div><div class='add'>+	 */</div><div class='add'>+	if (!phydev) {</div><div class='add'>+		ret = lan78xx_set_fixed_link(dev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto phylink_uninit;</div><div class='add'>+</div><div class='add'>+		/* No PHY found, so set up a fixed link and return early.</div><div class='add'>+		 * No need to configure PHY IRQ or attach to phylink.</div><div class='add'>+		 */</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* if phyirq is not set, use polling mode in phylib */</div><div class='hunk'>@@ -2368,95 +2869,57 @@ static int lan78xx_phy_init(struct lan78xx_net *dev)</div><div class='ctx'> 		phydev-&gt;irq = PHY_POLL;</div><div class='ctx'> 	netdev_dbg(dev-&gt;net, "phydev-&gt;irq = %d\n", phydev-&gt;irq);</div><div class='ctx'> </div><div class='del'>-	/* set to AUTOMDIX */</div><div class='del'>-	phydev-&gt;mdix = ETH_TP_MDI_AUTO;</div><div class='del'>-</div><div class='del'>-	ret = phy_connect_direct(dev-&gt;net, phydev,</div><div class='del'>-				 lan78xx_link_status_change,</div><div class='del'>-				 dev-&gt;interface);</div><div class='add'>+	ret = phylink_connect_phy(dev-&gt;phylink, phydev);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		netdev_err(dev-&gt;net, "can't attach PHY to %s\n",</div><div class='del'>-			   dev-&gt;mdiobus-&gt;id);</div><div class='del'>-		if (dev-&gt;chipid == ID_REV_CHIP_ID_7801_) {</div><div class='del'>-			if (phy_is_pseudo_fixed_link(phydev)) {</div><div class='del'>-				fixed_phy_unregister(phydev);</div><div class='del'>-			} else {</div><div class='del'>-				phy_unregister_fixup_for_uid(PHY_KSZ9031RNX,</div><div class='del'>-							     0xfffffff0);</div><div class='del'>-				phy_unregister_fixup_for_uid(PHY_LAN8835,</div><div class='del'>-							     0xfffffff0);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		return -EIO;</div><div class='add'>+		netdev_err(dev-&gt;net, "can't attach PHY to %s, error %pe\n",</div><div class='add'>+			   dev-&gt;mdiobus-&gt;id, ERR_PTR(ret));</div><div class='add'>+		goto phylink_uninit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* MAC doesn't support 1000T Half */</div><div class='del'>-	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);</div><div class='del'>-</div><div class='del'>-	/* support both flow controls */</div><div class='del'>-	dev-&gt;fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);</div><div class='del'>-	linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,</div><div class='del'>-			   phydev-&gt;advertising);</div><div class='del'>-	linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,</div><div class='del'>-			   phydev-&gt;advertising);</div><div class='del'>-	mii_adv = (u32)mii_advertise_flowctrl(dev-&gt;fc_request_control);</div><div class='del'>-	mii_adv_to_linkmode_adv_t(fc, mii_adv);</div><div class='del'>-	linkmode_or(phydev-&gt;advertising, fc, phydev-&gt;advertising);</div><div class='del'>-</div><div class='del'>-	phy_support_eee(phydev);</div><div class='del'>-</div><div class='del'>-	if (phydev-&gt;mdio.dev.of_node) {</div><div class='del'>-		u32 reg;</div><div class='del'>-		int len;</div><div class='del'>-</div><div class='del'>-		len = of_property_count_elems_of_size(phydev-&gt;mdio.dev.of_node,</div><div class='del'>-						      "microchip,led-modes",</div><div class='del'>-						      sizeof(u32));</div><div class='del'>-		if (len &gt;= 0) {</div><div class='del'>-			/* Ensure the appropriate LEDs are enabled */</div><div class='del'>-			lan78xx_read_reg(dev, HW_CFG, &amp;reg);</div><div class='del'>-			reg &amp;= ~(HW_CFG_LED0_EN_ |</div><div class='del'>-				 HW_CFG_LED1_EN_ |</div><div class='del'>-				 HW_CFG_LED2_EN_ |</div><div class='del'>-				 HW_CFG_LED3_EN_);</div><div class='del'>-			reg |= (len &gt; 0) * HW_CFG_LED0_EN_ |</div><div class='del'>-				(len &gt; 1) * HW_CFG_LED1_EN_ |</div><div class='del'>-				(len &gt; 2) * HW_CFG_LED2_EN_ |</div><div class='del'>-				(len &gt; 3) * HW_CFG_LED3_EN_;</div><div class='del'>-			lan78xx_write_reg(dev, HW_CFG, reg);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	ret = lan78xx_configure_leds_from_dt(dev, phydev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto phylink_uninit;</div><div class='ctx'> </div><div class='del'>-	genphy_config_aneg(phydev);</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;fc_autoneg = phydev-&gt;autoneg;</div><div class='add'>+phylink_uninit:</div><div class='add'>+	lan78xx_phy_uninit(dev);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)</div><div class='ctx'> {</div><div class='del'>-	u32 buf;</div><div class='ctx'> 	bool rxenabled;</div><div class='add'>+	u32 buf;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	lan78xx_read_reg(dev, MAC_RX, &amp;buf);</div><div class='add'>+	ret = lan78xx_read_reg(dev, MAC_RX, &amp;buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	rxenabled = ((buf &amp; MAC_RX_RXEN_) != 0);</div><div class='ctx'> </div><div class='ctx'> 	if (rxenabled) {</div><div class='ctx'> 		buf &amp;= ~MAC_RX_RXEN_;</div><div class='del'>-		lan78xx_write_reg(dev, MAC_RX, buf);</div><div class='add'>+		ret = lan78xx_write_reg(dev, MAC_RX, buf);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* add 4 to size for FCS */</div><div class='ctx'> 	buf &amp;= ~MAC_RX_MAX_SIZE_MASK_;</div><div class='ctx'> 	buf |= (((size + 4) &lt;&lt; MAC_RX_MAX_SIZE_SHIFT_) &amp; MAC_RX_MAX_SIZE_MASK_);</div><div class='ctx'> </div><div class='del'>-	lan78xx_write_reg(dev, MAC_RX, buf);</div><div class='add'>+	ret = lan78xx_write_reg(dev, MAC_RX, buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (rxenabled) {</div><div class='ctx'> 		buf |= MAC_RX_RXEN_;</div><div class='del'>-		lan78xx_write_reg(dev, MAC_RX, buf);</div><div class='add'>+		ret = lan78xx_write_reg(dev, MAC_RX, buf);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2522,7 +2985,10 @@ static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_set_rx_max_frame_length(dev, max_frame_len);</div><div class='del'>-	if (!ret)</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netdev_err(dev-&gt;net, "MTU changed to %d from %d failed with %pe\n",</div><div class='add'>+			   new_mtu, netdev-&gt;mtu, ERR_PTR(ret));</div><div class='add'>+	else</div><div class='ctx'> 		WRITE_ONCE(netdev-&gt;mtu, new_mtu);</div><div class='ctx'> </div><div class='ctx'> 	usb_autopm_put_interface(dev-&gt;intf);</div><div class='hunk'>@@ -2535,6 +3001,7 @@ static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)</div><div class='ctx'> 	struct lan78xx_net *dev = netdev_priv(netdev);</div><div class='ctx'> 	struct sockaddr *addr = p;</div><div class='ctx'> 	u32 addr_lo, addr_hi;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		return -EBUSY;</div><div class='hunk'>@@ -2551,14 +3018,20 @@ static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)</div><div class='ctx'> 	addr_hi = netdev-&gt;dev_addr[4] |</div><div class='ctx'> 		  netdev-&gt;dev_addr[5] &lt;&lt; 8;</div><div class='ctx'> </div><div class='del'>-	lan78xx_write_reg(dev, RX_ADDRL, addr_lo);</div><div class='del'>-	lan78xx_write_reg(dev, RX_ADDRH, addr_hi);</div><div class='add'>+	ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Added to support MAC address changes */</div><div class='del'>-	lan78xx_write_reg(dev, MAF_LO(0), addr_lo);</div><div class='del'>-	lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);</div><div class='add'>+	ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Enable or disable Rx checksum offload engine */</div><div class='hunk'>@@ -2591,9 +3064,7 @@ static int lan78xx_set_features(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pdata-&gt;rfe_ctl_lock, flags);</div><div class='ctx'> </div><div class='del'>-	lan78xx_write_reg(dev, RFE_CTL, pdata-&gt;rfe_ctl);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return lan78xx_write_reg(dev, RFE_CTL, pdata-&gt;rfe_ctl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lan78xx_deferred_vlan_write(struct work_struct *param)</div><div class='hunk'>@@ -2644,13 +3115,16 @@ static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lan78xx_init_ltm(struct lan78xx_net *dev)</div><div class='add'>+static int lan78xx_init_ltm(struct lan78xx_net *dev)</div><div class='ctx'> {</div><div class='add'>+	u32 regs[6] = { 0 };</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u32 buf;</div><div class='del'>-	u32 regs[6] = { 0 };</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_read_reg(dev, USB_CFG1, &amp;buf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto init_ltm_failed;</div><div class='add'>+</div><div class='ctx'> 	if (buf &amp; USB_CFG1_LTM_ENABLE_) {</div><div class='ctx'> 		u8 temp[2];</div><div class='ctx'> 		/* Get values from EEPROM first */</div><div class='hunk'>@@ -2661,7 +3135,7 @@ static void lan78xx_init_ltm(struct lan78xx_net *dev)</div><div class='ctx'> 							      24,</div><div class='ctx'> 							      (u8 *)regs);</div><div class='ctx'> 				if (ret &lt; 0)</div><div class='del'>-					return;</div><div class='add'>+					return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {</div><div class='ctx'> 			if (temp[0] == 24) {</div><div class='hunk'>@@ -2670,17 +3144,40 @@ static void lan78xx_init_ltm(struct lan78xx_net *dev)</div><div class='ctx'> 							   24,</div><div class='ctx'> 							   (u8 *)regs);</div><div class='ctx'> 				if (ret &lt; 0)</div><div class='del'>-					return;</div><div class='add'>+					return ret;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);</div><div class='del'>-	lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);</div><div class='del'>-	lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);</div><div class='del'>-	lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);</div><div class='del'>-	lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);</div><div class='del'>-	lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);</div><div class='add'>+	ret = lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto init_ltm_failed;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto init_ltm_failed;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto init_ltm_failed;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto init_ltm_failed;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto init_ltm_failed;</div><div class='add'>+</div><div class='add'>+	ret = lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto init_ltm_failed;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+init_ltm_failed:</div><div class='add'>+	netdev_err(dev-&gt;net, "Failed to init LTM with error %pe\n", ERR_PTR(ret));</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int lan78xx_urb_config_init(struct lan78xx_net *dev)</div><div class='hunk'>@@ -2721,163 +3218,12 @@ static int lan78xx_urb_config_init(struct lan78xx_net *dev)</div><div class='ctx'> 	return result;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lan78xx_start_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enable)</div><div class='del'>-{</div><div class='del'>-	return lan78xx_update_reg(dev, reg, hw_enable, hw_enable);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int lan78xx_stop_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enabled,</div><div class='del'>-			   u32 hw_disabled)</div><div class='del'>-{</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-	bool stopped = true;</div><div class='del'>-	int ret;</div><div class='del'>-	u32 buf;</div><div class='del'>-</div><div class='del'>-	/* Stop the h/w block (if not already stopped) */</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_read_reg(dev, reg, &amp;buf);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (buf &amp; hw_enabled) {</div><div class='del'>-		buf &amp;= ~hw_enabled;</div><div class='del'>-</div><div class='del'>-		ret = lan78xx_write_reg(dev, reg, buf);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		stopped = false;</div><div class='del'>-		timeout = jiffies + HW_DISABLE_TIMEOUT;</div><div class='del'>-		do  {</div><div class='del'>-			ret = lan78xx_read_reg(dev, reg, &amp;buf);</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				return ret;</div><div class='del'>-</div><div class='del'>-			if (buf &amp; hw_disabled)</div><div class='del'>-				stopped = true;</div><div class='del'>-			else</div><div class='del'>-				msleep(HW_DISABLE_DELAY_MS);</div><div class='del'>-		} while (!stopped &amp;&amp; !time_after(jiffies, timeout));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = stopped ? 0 : -ETIME;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int lan78xx_flush_fifo(struct lan78xx_net *dev, u32 reg, u32 fifo_flush)</div><div class='del'>-{</div><div class='del'>-	return lan78xx_update_reg(dev, reg, fifo_flush, fifo_flush);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int lan78xx_start_tx_path(struct lan78xx_net *dev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	netif_dbg(dev, drv, dev-&gt;net, "start tx path");</div><div class='del'>-</div><div class='del'>-	/* Start the MAC transmitter */</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_start_hw(dev, MAC_TX, MAC_TX_TXEN_);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Start the Tx FIFO */</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_start_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int lan78xx_stop_tx_path(struct lan78xx_net *dev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	netif_dbg(dev, drv, dev-&gt;net, "stop tx path");</div><div class='del'>-</div><div class='del'>-	/* Stop the Tx FIFO */</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_stop_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_, FCT_TX_CTL_DIS_);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Stop the MAC transmitter */</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_stop_hw(dev, MAC_TX, MAC_TX_TXEN_, MAC_TX_TXD_);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* The caller must ensure the Tx path is stopped before calling</div><div class='del'>- * lan78xx_flush_tx_fifo().</div><div class='del'>- */</div><div class='del'>-static int lan78xx_flush_tx_fifo(struct lan78xx_net *dev)</div><div class='del'>-{</div><div class='del'>-	return lan78xx_flush_fifo(dev, FCT_TX_CTL, FCT_TX_CTL_RST_);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int lan78xx_start_rx_path(struct lan78xx_net *dev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	netif_dbg(dev, drv, dev-&gt;net, "start rx path");</div><div class='del'>-</div><div class='del'>-	/* Start the Rx FIFO */</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_start_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Start the MAC receiver*/</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_start_hw(dev, MAC_RX, MAC_RX_RXEN_);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int lan78xx_stop_rx_path(struct lan78xx_net *dev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	netif_dbg(dev, drv, dev-&gt;net, "stop rx path");</div><div class='del'>-</div><div class='del'>-	/* Stop the MAC receiver */</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_stop_hw(dev, MAC_RX, MAC_RX_RXEN_, MAC_RX_RXD_);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Stop the Rx FIFO */</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_stop_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_, FCT_RX_CTL_DIS_);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* The caller must ensure the Rx path is stopped before calling</div><div class='del'>- * lan78xx_flush_rx_fifo().</div><div class='del'>- */</div><div class='del'>-static int lan78xx_flush_rx_fifo(struct lan78xx_net *dev)</div><div class='del'>-{</div><div class='del'>-	return lan78xx_flush_fifo(dev, FCT_RX_CTL, FCT_RX_CTL_RST_);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int lan78xx_reset(struct lan78xx_net *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev-&gt;data[0]);</div><div class='ctx'> 	unsigned long timeout;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u32 buf;</div><div class='del'>-	u8 sig;</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_read_reg(dev, HW_CFG, &amp;buf);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -2904,8 +3250,6 @@ static int lan78xx_reset(struct lan78xx_net *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	} while (buf &amp; HW_CFG_LRST_);</div><div class='ctx'> </div><div class='del'>-	lan78xx_init_mac_address(dev);</div><div class='del'>-</div><div class='ctx'> 	/* save DEVID for later usage */</div><div class='ctx'> 	ret = lan78xx_read_reg(dev, ID_REV, &amp;buf);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -2914,6 +3258,10 @@ static int lan78xx_reset(struct lan78xx_net *dev)</div><div class='ctx'> 	dev-&gt;chipid = (buf &amp; ID_REV_CHIP_ID_MASK_) &gt;&gt; 16;</div><div class='ctx'> 	dev-&gt;chiprev = buf &amp; ID_REV_CHIP_REV_MASK_;</div><div class='ctx'> </div><div class='add'>+	ret = lan78xx_init_mac_address(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	/* Respond to the IN token with a NAK */</div><div class='ctx'> 	ret = lan78xx_read_reg(dev, USB_CFG0, &amp;buf);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -2926,7 +3274,9 @@ static int lan78xx_reset(struct lan78xx_net *dev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Init LTM */</div><div class='del'>-	lan78xx_init_ltm(dev);</div><div class='add'>+	ret = lan78xx_init_ltm(dev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_write_reg(dev, BURST_CAP, dev-&gt;burst_cap);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='hunk'>@@ -3030,22 +3380,12 @@ static int lan78xx_reset(struct lan78xx_net *dev)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='add'>+	buf &amp;= ~(MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_ | MAC_CR_EEE_EN_);</div><div class='add'>+</div><div class='ctx'> 	/* LAN7801 only has RGMII mode */</div><div class='del'>-	if (dev-&gt;chipid == ID_REV_CHIP_ID_7801_) {</div><div class='add'>+	if (dev-&gt;chipid == ID_REV_CHIP_ID_7801_)</div><div class='ctx'> 		buf &amp;= ~MAC_CR_GMII_EN_;</div><div class='del'>-		/* Enable Auto Duplex and Auto speed */</div><div class='del'>-		buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	if (dev-&gt;chipid == ID_REV_CHIP_ID_7800_ ||</div><div class='del'>-	    dev-&gt;chipid == ID_REV_CHIP_ID_7850_) {</div><div class='del'>-		ret = lan78xx_read_raw_eeprom(dev, 0, 1, &amp;sig);</div><div class='del'>-		if (!ret &amp;&amp; sig != EEPROM_INDICATOR) {</div><div class='del'>-			/* Implies there is no external eeprom. Set mac speed */</div><div class='del'>-			netdev_info(dev-&gt;net, "No External EEPROM. Setting MAC Speed\n");</div><div class='del'>-			buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='ctx'> 	ret = lan78xx_write_reg(dev, MAC_CR, buf);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -3095,9 +3435,11 @@ static int lan78xx_open(struct net_device *net)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;dev_mutex);</div><div class='ctx'> </div><div class='del'>-	phy_start(net-&gt;phydev);</div><div class='add'>+	lan78xx_init_stats(dev);</div><div class='ctx'> </div><div class='del'>-	netif_dbg(dev, ifup, dev-&gt;net, "phy initialised successfully");</div><div class='add'>+	napi_enable(&amp;dev-&gt;napi);</div><div class='add'>+</div><div class='add'>+	set_bit(EVENT_DEV_OPEN, &amp;dev-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	/* for Link Check */</div><div class='ctx'> 	if (dev-&gt;urb_intr) {</div><div class='hunk'>@@ -3109,31 +3451,8 @@ static int lan78xx_open(struct net_device *net)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = lan78xx_flush_rx_fifo(dev);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto done;</div><div class='del'>-	ret = lan78xx_flush_tx_fifo(dev);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto done;</div><div class='del'>-</div><div class='del'>-	ret = lan78xx_start_tx_path(dev);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto done;</div><div class='del'>-	ret = lan78xx_start_rx_path(dev);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto done;</div><div class='add'>+	phylink_start(dev-&gt;phylink);</div><div class='ctx'> </div><div class='del'>-	lan78xx_init_stats(dev);</div><div class='del'>-</div><div class='del'>-	set_bit(EVENT_DEV_OPEN, &amp;dev-&gt;flags);</div><div class='del'>-</div><div class='del'>-	netif_start_queue(net);</div><div class='del'>-</div><div class='del'>-	dev-&gt;link_on = false;</div><div class='del'>-</div><div class='del'>-	napi_enable(&amp;dev-&gt;napi);</div><div class='del'>-</div><div class='del'>-	lan78xx_defer_kevent(dev, EVENT_LINK_RESET);</div><div class='ctx'> done:</div><div class='ctx'> 	mutex_unlock(&amp;dev-&gt;dev_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -3188,10 +3507,9 @@ static int lan78xx_stop(struct net_device *net)</div><div class='ctx'> 	mutex_lock(&amp;dev-&gt;dev_mutex);</div><div class='ctx'> </div><div class='ctx'> 	if (timer_pending(&amp;dev-&gt;stat_monitor))</div><div class='del'>-		del_timer_sync(&amp;dev-&gt;stat_monitor);</div><div class='add'>+		timer_delete_sync(&amp;dev-&gt;stat_monitor);</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(EVENT_DEV_OPEN, &amp;dev-&gt;flags);</div><div class='del'>-	netif_stop_queue(net);</div><div class='ctx'> 	napi_disable(&amp;dev-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	lan78xx_terminate_urbs(dev);</div><div class='hunk'>@@ -3201,12 +3519,7 @@ static int lan78xx_stop(struct net_device *net)</div><div class='ctx'> 		   net-&gt;stats.rx_packets, net-&gt;stats.tx_packets,</div><div class='ctx'> 		   net-&gt;stats.rx_errors, net-&gt;stats.tx_errors);</div><div class='ctx'> </div><div class='del'>-	/* ignore errors that occur stopping the Tx and Rx data paths */</div><div class='del'>-	lan78xx_stop_tx_path(dev);</div><div class='del'>-	lan78xx_stop_rx_path(dev);</div><div class='del'>-</div><div class='del'>-	if (net-&gt;phydev)</div><div class='del'>-		phy_stop(net-&gt;phydev);</div><div class='add'>+	phylink_stop(dev-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	usb_kill_urb(dev-&gt;urb_intr);</div><div class='ctx'> </div><div class='hunk'>@@ -3216,7 +3529,7 @@ static int lan78xx_stop(struct net_device *net)</div><div class='ctx'> 	 */</div><div class='ctx'> 	clear_bit(EVENT_TX_HALT, &amp;dev-&gt;flags);</div><div class='ctx'> 	clear_bit(EVENT_RX_HALT, &amp;dev-&gt;flags);</div><div class='del'>-	clear_bit(EVENT_LINK_RESET, &amp;dev-&gt;flags);</div><div class='add'>+	clear_bit(EVENT_PHY_INT_ACK, &amp;dev-&gt;flags);</div><div class='ctx'> 	clear_bit(EVENT_STAT_UPDATE, &amp;dev-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;dev-&gt;wq);</div><div class='hunk'>@@ -4140,14 +4453,14 @@ static void lan78xx_delayedwork(struct work_struct *work)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (test_bit(EVENT_LINK_RESET, &amp;dev-&gt;flags)) {</div><div class='add'>+	if (test_bit(EVENT_PHY_INT_ACK, &amp;dev-&gt;flags)) {</div><div class='ctx'> 		int ret = 0;</div><div class='ctx'> </div><div class='del'>-		clear_bit(EVENT_LINK_RESET, &amp;dev-&gt;flags);</div><div class='del'>-		if (lan78xx_link_reset(dev) &lt; 0) {</div><div class='del'>-			netdev_info(dev-&gt;net, "link reset failed (%d)\n",</div><div class='del'>-				    ret);</div><div class='del'>-		}</div><div class='add'>+		clear_bit(EVENT_PHY_INT_ACK, &amp;dev-&gt;flags);</div><div class='add'>+		ret = lan78xx_phy_int_ack(dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			netdev_info(dev-&gt;net, "PHY INT ack failed (%pe)\n",</div><div class='add'>+				    ERR_PTR(ret));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(EVENT_STAT_UPDATE, &amp;dev-&gt;flags)) {</div><div class='hunk'>@@ -4221,33 +4534,29 @@ static void lan78xx_disconnect(struct usb_interface *intf)</div><div class='ctx'> 	struct lan78xx_net *dev;</div><div class='ctx'> 	struct usb_device *udev;</div><div class='ctx'> 	struct net_device *net;</div><div class='del'>-	struct phy_device *phydev;</div><div class='ctx'> </div><div class='ctx'> 	dev = usb_get_intfdata(intf);</div><div class='ctx'> 	usb_set_intfdata(intf, NULL);</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	netif_napi_del(&amp;dev-&gt;napi);</div><div class='del'>-</div><div class='ctx'> 	udev = interface_to_usbdev(intf);</div><div class='ctx'> 	net = dev-&gt;net;</div><div class='ctx'> </div><div class='add'>+	rtnl_lock();</div><div class='add'>+	phylink_stop(dev-&gt;phylink);</div><div class='add'>+	phylink_disconnect_phy(dev-&gt;phylink);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	netif_napi_del(&amp;dev-&gt;napi);</div><div class='add'>+</div><div class='ctx'> 	unregister_netdev(net);</div><div class='ctx'> </div><div class='ctx'> 	timer_shutdown_sync(&amp;dev-&gt;stat_monitor);</div><div class='ctx'> 	set_bit(EVENT_DEV_DISCONNECT, &amp;dev-&gt;flags);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;dev-&gt;wq);</div><div class='ctx'> </div><div class='del'>-	phydev = net-&gt;phydev;</div><div class='del'>-</div><div class='del'>-	phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);</div><div class='del'>-	phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);</div><div class='del'>-</div><div class='del'>-	phy_disconnect(net-&gt;phydev);</div><div class='del'>-</div><div class='del'>-	if (phy_is_pseudo_fixed_link(phydev))</div><div class='del'>-		fixed_phy_unregister(phydev);</div><div class='add'>+	phylink_destroy(dev-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	usb_scuttle_anchored_urbs(&amp;dev-&gt;deferred);</div><div class='ctx'> </div><div class='hunk'>@@ -4304,7 +4613,7 @@ static const struct net_device_ops lan78xx_netdev_ops = {</div><div class='ctx'> </div><div class='ctx'> static void lan78xx_stat_monitor(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct lan78xx_net *dev = from_timer(dev, t, stat_monitor);</div><div class='add'>+	struct lan78xx_net *dev = timer_container_of(dev, t, stat_monitor);</div><div class='ctx'> </div><div class='ctx'> 	lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);</div><div class='ctx'> }</div><div class='hunk'>@@ -4331,7 +4640,6 @@ static int lan78xx_probe(struct usb_interface *intf,</div><div class='ctx'> 		goto out1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* netdev_printk() needs this */</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	dev = netdev_priv(netdev);</div><div class='hunk'>@@ -4346,7 +4654,7 @@ static int lan78xx_probe(struct usb_interface *intf,</div><div class='ctx'> 	skb_queue_head_init(&amp;dev-&gt;rxq_done);</div><div class='ctx'> 	skb_queue_head_init(&amp;dev-&gt;txq_pend);</div><div class='ctx'> 	skb_queue_head_init(&amp;dev-&gt;rxq_overflow);</div><div class='del'>-	mutex_init(&amp;dev-&gt;phy_mutex);</div><div class='add'>+	mutex_init(&amp;dev-&gt;mdiobus_mutex);</div><div class='ctx'> 	mutex_init(&amp;dev-&gt;dev_mutex);</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_urb_config_init(dev);</div><div class='hunk'>@@ -4414,29 +4722,30 @@ static int lan78xx_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	period = ep_intr-&gt;desc.bInterval;</div><div class='ctx'> 	maxp = usb_maxpacket(dev-&gt;udev, dev-&gt;pipe_intr);</div><div class='del'>-	buf = kmalloc(maxp, GFP_KERNEL);</div><div class='del'>-	if (!buf) {</div><div class='add'>+</div><div class='add'>+	dev-&gt;urb_intr = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+	if (!dev-&gt;urb_intr) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto out5;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;urb_intr = usb_alloc_urb(0, GFP_KERNEL);</div><div class='del'>-	if (!dev-&gt;urb_intr) {</div><div class='add'>+	buf = kmalloc(maxp, GFP_KERNEL);</div><div class='add'>+	if (!buf) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='del'>-		goto out6;</div><div class='del'>-	} else {</div><div class='del'>-		usb_fill_int_urb(dev-&gt;urb_intr, dev-&gt;udev,</div><div class='del'>-				 dev-&gt;pipe_intr, buf, maxp,</div><div class='del'>-				 intr_complete, dev, period);</div><div class='del'>-		dev-&gt;urb_intr-&gt;transfer_flags |= URB_FREE_BUFFER;</div><div class='add'>+		goto free_urbs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	usb_fill_int_urb(dev-&gt;urb_intr, dev-&gt;udev,</div><div class='add'>+			 dev-&gt;pipe_intr, buf, maxp,</div><div class='add'>+			 intr_complete, dev, period);</div><div class='add'>+	dev-&gt;urb_intr-&gt;transfer_flags |= URB_FREE_BUFFER;</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;maxpacket = usb_maxpacket(dev-&gt;udev, dev-&gt;pipe_out);</div><div class='ctx'> </div><div class='ctx'> 	/* Reject broken descriptors. */</div><div class='ctx'> 	if (dev-&gt;maxpacket == 0) {</div><div class='ctx'> 		ret = -ENODEV;</div><div class='del'>-		goto out6;</div><div class='add'>+		goto free_urbs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* driver requires remote-wakeup capability during autosuspend. */</div><div class='hunk'>@@ -4444,12 +4753,12 @@ static int lan78xx_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	ret = lan78xx_phy_init(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='del'>-		goto out7;</div><div class='add'>+		goto free_urbs;</div><div class='ctx'> </div><div class='ctx'> 	ret = register_netdev(netdev);</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		netif_err(dev, probe, netdev, "couldn't register the device\n");</div><div class='del'>-		goto out8;</div><div class='add'>+		goto phy_uninit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	usb_set_intfdata(intf, dev);</div><div class='hunk'>@@ -4464,12 +4773,10 @@ static int lan78xx_probe(struct usb_interface *intf,</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-out8:</div><div class='del'>-	phy_disconnect(netdev-&gt;phydev);</div><div class='del'>-out7:</div><div class='add'>+phy_uninit:</div><div class='add'>+	lan78xx_phy_uninit(dev);</div><div class='add'>+free_urbs:</div><div class='ctx'> 	usb_free_urb(dev-&gt;urb_intr);</div><div class='del'>-out6:</div><div class='del'>-	kfree(buf);</div><div class='ctx'> out5:</div><div class='ctx'> 	lan78xx_unbind(dev, intf);</div><div class='ctx'> out4:</div><div class='hunk'>@@ -4802,6 +5109,10 @@ static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> 			spin_unlock_irq(&amp;dev-&gt;txq.lock);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		rtnl_lock();</div><div class='add'>+		phylink_suspend(dev-&gt;phylink, false);</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+</div><div class='ctx'> 		/* stop RX */</div><div class='ctx'> 		ret = lan78xx_stop_rx_path(dev);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='hunk'>@@ -4824,7 +5135,7 @@ static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> 		/* reattach */</div><div class='ctx'> 		netif_device_attach(dev-&gt;net);</div><div class='ctx'> </div><div class='del'>-		del_timer(&amp;dev-&gt;stat_monitor);</div><div class='add'>+		timer_delete(&amp;dev-&gt;stat_monitor);</div><div class='ctx'> </div><div class='ctx'> 		if (PMSG_IS_AUTO(message)) {</div><div class='ctx'> 			ret = lan78xx_set_auto_suspend(dev);</div><div class='hunk'>@@ -5029,11 +5340,15 @@ static int lan78xx_reset_resume(struct usb_interface *intf)</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	phy_start(dev-&gt;net-&gt;phydev);</div><div class='del'>-</div><div class='ctx'> 	ret = lan78xx_resume(intf);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	phylink_resume(dev-&gt;phylink);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct usb_device_id products[] = {</div><div class='head'>diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c<br/>index 0c011d8f5d4d..3a4985b582cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/qmi_wwan.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/qmi_wwan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/qmi_wwan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/qmi_wwan.c</a></div><div class='hunk'>@@ -192,6 +192,12 @@ static int qmimux_rx_fixup(struct usbnet *dev, struct sk_buff *skb)</div><div class='ctx'> 		if (!skbn)</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='add'>+	       /* Raw IP packets don't have a MAC header, but other subsystems</div><div class='add'>+		* (like xfrm) may still access MAC header offsets, so they must</div><div class='add'>+		* be initialized.</div><div class='add'>+		*/</div><div class='add'>+		skb_reset_mac_header(skbn);</div><div class='add'>+</div><div class='ctx'> 		switch (skb-&gt;data[offset + qmimux_hdr_sz] &amp; 0xf0) {</div><div class='ctx'> 		case 0x40:</div><div class='ctx'> 			skbn-&gt;protocol = htons(ETH_P_IP);</div><div class='hunk'>@@ -1355,16 +1361,25 @@ static const struct usb_device_id products[] = {</div><div class='ctx'> 	{QMI_FIXED_INTF(0x2357, 0x0201, 4)},	/* TP-LINK HSUPA Modem MA180 */</div><div class='ctx'> 	{QMI_FIXED_INTF(0x2357, 0x9000, 4)},	/* TP-LINK MA260 */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1031, 3)}, /* Telit LE910C1-EUX */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1034, 2)}, /* Telit LE910C4-WWX */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1037, 4)}, /* Telit LE910C4-WWX */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1038, 3)}, /* Telit LE910C4-WWX */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x1bc7, 0x103a, 0)}, /* Telit LE910C4-WWX */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1040, 2)},	/* Telit LE922A */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1050, 2)},	/* Telit FN980 */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1057, 2)},	/* Telit FN980 */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1060, 2)},	/* Telit LN920 */</div><div class='del'>-	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1070, 2)},	/* Telit FN990 */</div><div class='del'>-	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1080, 2)}, /* Telit FE990 */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1070, 2)},	/* Telit FN990A */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1077, 2)},	/* Telit FN990A w/audio */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x1080, 2)}, /* Telit FE990A */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x1bc7, 0x10a0, 0)}, /* Telit FN920C04 */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x1bc7, 0x10a4, 0)}, /* Telit FN920C04 */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x1bc7, 0x10a9, 0)}, /* Telit FN920C04 */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x10b0, 0)}, /* Telit FE990B */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x10c0, 0)}, /* Telit FE910C04 */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x10c4, 0)}, /* Telit FE910C04 */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x10c8, 0)}, /* Telit FE910C04 */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1bc7, 0x10d0, 0)}, /* Telit FN990B */</div><div class='ctx'> 	{QMI_FIXED_INTF(0x1bc7, 0x1100, 3)},	/* Telit ME910 */</div><div class='ctx'> 	{QMI_FIXED_INTF(0x1bc7, 0x1101, 3)},	/* Telit ME910 dual modem */</div><div class='ctx'> 	{QMI_FIXED_INTF(0x1bc7, 0x1200, 5)},	/* Telit LE920 */</div><div class='hunk'>@@ -1421,11 +1436,13 @@ static const struct usb_device_id products[] = {</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x22de, 0x9051, 2)}, /* Hucom Wireless HM-211S/K */</div><div class='ctx'> 	{QMI_FIXED_INTF(0x22de, 0x9061, 3)},	/* WeTelecom WPD-600N */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x1e0e, 0x9001, 5)},	/* SIMCom 7100E, 7230E, 7600E ++ */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x1e0e, 0x9071, 3)},	/* SIMCom 8230C ++ */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0121, 4)},	/* Quectel EC21 Mini PCIe */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0191, 4)},	/* Quectel EG91 */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0195, 4)},	/* Quectel EG95 */</div><div class='ctx'> 	{QMI_FIXED_INTF(0x2c7c, 0x0296, 4)},	/* Quectel BG96 */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x2c7c, 0x030e, 4)},	/* Quectel EM05GV2 */</div><div class='add'>+	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0316, 3)},	/* Quectel RG255C */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x2cb7, 0x0104, 4)},	/* Fibocom NL678 series */</div><div class='ctx'> 	{QMI_QUIRK_SET_DTR(0x2cb7, 0x0112, 0)},	/* Fibocom FG132 */</div><div class='ctx'> 	{QMI_FIXED_INTF(0x0489, 0xe0b4, 0)},	/* Foxconn T77W968 LTE */</div><div class='head'>diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c<br/>index 468c73974046..fa5192583860 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/r8152.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/r8152.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/r8152.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/r8152.c</a></div><div class='hunk'>@@ -26,7 +26,7 @@</div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='del'>-#include &lt;crypto/hash.h&gt;</div><div class='add'>+#include &lt;crypto/sha2.h&gt;</div><div class='ctx'> #include &lt;linux/usb/r8152.h&gt;</div><div class='ctx'> #include &lt;net/gso.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -785,6 +785,7 @@ enum rtl8152_flags {</div><div class='ctx'> #define DEVICE_ID_THINKPAD_USB_C_DONGLE			0x720c</div><div class='ctx'> #define DEVICE_ID_THINKPAD_USB_C_DOCK_GEN2		0xa387</div><div class='ctx'> #define DEVICE_ID_THINKPAD_USB_C_DOCK_GEN3		0x3062</div><div class='add'>+#define DEVICE_ID_THINKPAD_HYBRID_USB_C_DOCK		0xa359</div><div class='ctx'> </div><div class='ctx'> struct tally_counter {</div><div class='ctx'> 	__le64	tx_packets;</div><div class='hunk'>@@ -1664,14 +1665,14 @@ static int</div><div class='ctx'> rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u32 speed, u8 duplex,</div><div class='ctx'> 		  u32 advertising);</div><div class='ctx'> </div><div class='del'>-static int __rtl8152_set_mac_address(struct net_device *netdev, void *p,</div><div class='add'>+static int __rtl8152_set_mac_address(struct net_device *netdev,</div><div class='add'>+				     struct sockaddr_storage *addr,</div><div class='ctx'> 				     bool in_resume)</div><div class='ctx'> {</div><div class='ctx'> 	struct r8152 *tp = netdev_priv(netdev);</div><div class='del'>-	struct sockaddr *addr = p;</div><div class='ctx'> 	int ret = -EADDRNOTAVAIL;</div><div class='ctx'> </div><div class='del'>-	if (!is_valid_ether_addr(addr-&gt;sa_data))</div><div class='add'>+	if (!is_valid_ether_addr(addr-&gt;__data))</div><div class='ctx'> 		goto out1;</div><div class='ctx'> </div><div class='ctx'> 	if (!in_resume) {</div><div class='hunk'>@@ -1682,10 +1683,10 @@ static int __rtl8152_set_mac_address(struct net_device *netdev, void *p,</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;tp-&gt;control);</div><div class='ctx'> </div><div class='del'>-	eth_hw_addr_set(netdev, addr-&gt;sa_data);</div><div class='add'>+	eth_hw_addr_set(netdev, addr-&gt;__data);</div><div class='ctx'> </div><div class='ctx'> 	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);</div><div class='del'>-	pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr-&gt;sa_data);</div><div class='add'>+	pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr-&gt;__data);</div><div class='ctx'> 	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;tp-&gt;control);</div><div class='hunk'>@@ -1705,7 +1706,8 @@ static int rtl8152_set_mac_address(struct net_device *netdev, void *p)</div><div class='ctx'>  * host system provided MAC address.</div><div class='ctx'>  * Examples of this are Dell TB15 and Dell WD15 docks</div><div class='ctx'>  */</div><div class='del'>-static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)</div><div class='add'>+static int vendor_mac_passthru_addr_read(struct r8152 *tp,</div><div class='add'>+					 struct sockaddr_storage *ss)</div><div class='ctx'> {</div><div class='ctx'> 	acpi_status status;</div><div class='ctx'> 	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };</div><div class='hunk'>@@ -1773,47 +1775,48 @@ static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto amacout;</div><div class='ctx'> 	}</div><div class='del'>-	memcpy(sa-&gt;sa_data, buf, 6);</div><div class='add'>+	memcpy(ss-&gt;__data, buf, 6);</div><div class='ctx'> 	tp-&gt;netdev-&gt;addr_assign_type = NET_ADDR_STOLEN;</div><div class='ctx'> 	netif_info(tp, probe, tp-&gt;netdev,</div><div class='del'>-		   "Using pass-thru MAC addr %pM\n", sa-&gt;sa_data);</div><div class='add'>+		   "Using pass-thru MAC addr %pM\n", ss-&gt;__data);</div><div class='ctx'> </div><div class='ctx'> amacout:</div><div class='ctx'> 	kfree(obj);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa)</div><div class='add'>+static int determine_ethernet_addr(struct r8152 *tp,</div><div class='add'>+				   struct sockaddr_storage *ss)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = tp-&gt;netdev;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	sa-&gt;sa_family = dev-&gt;type;</div><div class='add'>+	ss-&gt;ss_family = dev-&gt;type;</div><div class='ctx'> </div><div class='del'>-	ret = eth_platform_get_mac_address(&amp;tp-&gt;udev-&gt;dev, sa-&gt;sa_data);</div><div class='add'>+	ret = eth_platform_get_mac_address(&amp;tp-&gt;udev-&gt;dev, ss-&gt;__data);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		if (tp-&gt;version == RTL_VER_01) {</div><div class='del'>-			ret = pla_ocp_read(tp, PLA_IDR, 8, sa-&gt;sa_data);</div><div class='add'>+			ret = pla_ocp_read(tp, PLA_IDR, 8, ss-&gt;__data);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* if device doesn't support MAC pass through this will</div><div class='ctx'> 			 * be expected to be non-zero</div><div class='ctx'> 			 */</div><div class='del'>-			ret = vendor_mac_passthru_addr_read(tp, sa);</div><div class='add'>+			ret = vendor_mac_passthru_addr_read(tp, ss);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='ctx'> 				ret = pla_ocp_read(tp, PLA_BACKUP, 8,</div><div class='del'>-						   sa-&gt;sa_data);</div><div class='add'>+						   ss-&gt;__data);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		netif_err(tp, probe, dev, "Get ether addr fail\n");</div><div class='del'>-	} else if (!is_valid_ether_addr(sa-&gt;sa_data)) {</div><div class='add'>+	} else if (!is_valid_ether_addr(ss-&gt;__data)) {</div><div class='ctx'> 		netif_err(tp, probe, dev, "Invalid ether addr %pM\n",</div><div class='del'>-			  sa-&gt;sa_data);</div><div class='add'>+			  ss-&gt;__data);</div><div class='ctx'> 		eth_hw_addr_random(dev);</div><div class='del'>-		ether_addr_copy(sa-&gt;sa_data, dev-&gt;dev_addr);</div><div class='add'>+		ether_addr_copy(ss-&gt;__data, dev-&gt;dev_addr);</div><div class='ctx'> 		netif_info(tp, probe, dev, "Random ether addr %pM\n",</div><div class='del'>-			   sa-&gt;sa_data);</div><div class='add'>+			   ss-&gt;__data);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1823,17 +1826,17 @@ static int determine_ethernet_addr(struct r8152 *tp, struct sockaddr *sa)</div><div class='ctx'> static int set_ethernet_addr(struct r8152 *tp, bool in_resume)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = tp-&gt;netdev;</div><div class='del'>-	struct sockaddr sa;</div><div class='add'>+	struct sockaddr_storage ss;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = determine_ethernet_addr(tp, &amp;sa);</div><div class='add'>+	ret = determine_ethernet_addr(tp, &amp;ss);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (tp-&gt;version == RTL_VER_01)</div><div class='del'>-		eth_hw_addr_set(dev, sa.sa_data);</div><div class='add'>+		eth_hw_addr_set(dev, ss.__data);</div><div class='ctx'> 	else</div><div class='del'>-		ret = __rtl8152_set_mac_address(dev, &amp;sa, in_resume);</div><div class='add'>+		ret = __rtl8152_set_mac_address(dev, &amp;ss, in_resume);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -4627,48 +4630,16 @@ out:</div><div class='ctx'> static long rtl8152_fw_verify_checksum(struct r8152 *tp,</div><div class='ctx'> 				       struct fw_header *fw_hdr, size_t size)</div><div class='ctx'> {</div><div class='del'>-	unsigned char checksum[sizeof(fw_hdr-&gt;checksum)];</div><div class='del'>-	struct crypto_shash *alg;</div><div class='del'>-	struct shash_desc *sdesc;</div><div class='del'>-	size_t len;</div><div class='del'>-	long rc;</div><div class='add'>+	u8 checksum[sizeof(fw_hdr-&gt;checksum)];</div><div class='ctx'> </div><div class='del'>-	alg = crypto_alloc_shash("sha256", 0, 0);</div><div class='del'>-	if (IS_ERR(alg)) {</div><div class='del'>-		rc = PTR_ERR(alg);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (crypto_shash_digestsize(alg) != sizeof(fw_hdr-&gt;checksum)) {</div><div class='del'>-		rc = -EFAULT;</div><div class='del'>-		dev_err(&amp;tp-&gt;intf-&gt;dev, "digestsize incorrect (%u)\n",</div><div class='del'>-			crypto_shash_digestsize(alg));</div><div class='del'>-		goto free_shash;</div><div class='del'>-	}</div><div class='add'>+	BUILD_BUG_ON(sizeof(checksum) != SHA256_DIGEST_SIZE);</div><div class='add'>+	sha256(fw_hdr-&gt;version, size - sizeof(checksum), checksum);</div><div class='ctx'> </div><div class='del'>-	len = sizeof(*sdesc) + crypto_shash_descsize(alg);</div><div class='del'>-	sdesc = kmalloc(len, GFP_KERNEL);</div><div class='del'>-	if (!sdesc) {</div><div class='del'>-		rc = -ENOMEM;</div><div class='del'>-		goto free_shash;</div><div class='del'>-	}</div><div class='del'>-	sdesc-&gt;tfm = alg;</div><div class='del'>-</div><div class='del'>-	len = size - sizeof(fw_hdr-&gt;checksum);</div><div class='del'>-	rc = crypto_shash_digest(sdesc, fw_hdr-&gt;version, len, checksum);</div><div class='del'>-	kfree(sdesc);</div><div class='del'>-	if (rc)</div><div class='del'>-		goto free_shash;</div><div class='del'>-</div><div class='del'>-	if (memcmp(fw_hdr-&gt;checksum, checksum, sizeof(fw_hdr-&gt;checksum))) {</div><div class='add'>+	if (memcmp(fw_hdr-&gt;checksum, checksum, sizeof(checksum))) {</div><div class='ctx'> 		dev_err(&amp;tp-&gt;intf-&gt;dev, "checksum fail\n");</div><div class='del'>-		rc = -EFAULT;</div><div class='add'>+		return -EFAULT;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-free_shash:</div><div class='del'>-	crypto_free_shash(alg);</div><div class='del'>-out:</div><div class='del'>-	return rc;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static long rtl8152_check_firmware(struct r8152 *tp, struct rtl_fw *rtl_fw)</div><div class='hunk'>@@ -8452,7 +8423,7 @@ static int rtl8152_post_reset(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct r8152 *tp = usb_get_intfdata(intf);</div><div class='ctx'> 	struct net_device *netdev;</div><div class='del'>-	struct sockaddr sa;</div><div class='add'>+	struct sockaddr_storage ss;</div><div class='ctx'> </div><div class='ctx'> 	if (!tp || !test_bit(PROBED_WITH_NO_ERRORS, &amp;tp-&gt;flags))</div><div class='ctx'> 		goto exit;</div><div class='hunk'>@@ -8460,8 +8431,8 @@ static int rtl8152_post_reset(struct usb_interface *intf)</div><div class='ctx'> 	rtl_set_accessible(tp);</div><div class='ctx'> </div><div class='ctx'> 	/* reset the MAC address in case of policy change */</div><div class='del'>-	if (determine_ethernet_addr(tp, &amp;sa) &gt;= 0)</div><div class='del'>-		dev_set_mac_address (tp-&gt;netdev, &amp;sa, NULL);</div><div class='add'>+	if (determine_ethernet_addr(tp, &amp;ss) &gt;= 0)</div><div class='add'>+		dev_set_mac_address(tp-&gt;netdev, &amp;ss, NULL);</div><div class='ctx'> </div><div class='ctx'> 	netdev = tp-&gt;netdev;</div><div class='ctx'> 	if (!netif_running(netdev))</div><div class='hunk'>@@ -9340,6 +9311,7 @@ static const struct ethtool_ops ops = {</div><div class='ctx'> 	.set_ringparam = rtl8152_set_ringparam,</div><div class='ctx'> 	.get_pauseparam = rtl8152_get_pauseparam,</div><div class='ctx'> 	.set_pauseparam = rtl8152_set_pauseparam,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)</div><div class='hunk'>@@ -9787,6 +9759,7 @@ static bool rtl8152_supports_lenovo_macpassthru(struct usb_device *udev)</div><div class='ctx'> 		case DEVICE_ID_THINKPAD_USB_C_DOCK_GEN2:</div><div class='ctx'> 		case DEVICE_ID_THINKPAD_USB_C_DOCK_GEN3:</div><div class='ctx'> 		case DEVICE_ID_THINKPAD_USB_C_DONGLE:</div><div class='add'>+		case DEVICE_ID_THINKPAD_HYBRID_USB_C_DOCK:</div><div class='ctx'> 			return 1;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (vendor_id == VENDOR_ID_REALTEK &amp;&amp; parent_vendor_id == VENDOR_ID_LENOVO) {</div><div class='hunk'>@@ -10064,6 +10037,8 @@ static const struct usb_device_id rtl8152_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_MICROSOFT, 0x0927) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_MICROSOFT, 0x0c5e) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101) },</div><div class='add'>+</div><div class='add'>+	/* Lenovo */</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_LENOVO,  0x304f) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_LENOVO,  0x3054) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_LENOVO,  0x3062) },</div><div class='hunk'>@@ -10074,11 +10049,15 @@ static const struct usb_device_id rtl8152_table[] = {</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_LENOVO,  0x720c) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_LENOVO,  0x7214) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_LENOVO,  0x721e) },</div><div class='add'>+	{ USB_DEVICE(VENDOR_ID_LENOVO,  0xa359) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_LENOVO,  0xa387) },</div><div class='add'>+</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_LINKSYS, 0x0041) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_TPLINK,  0x0601) },</div><div class='add'>+	{ USB_DEVICE(VENDOR_ID_TPLINK,  0x0602) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_DLINK,   0xb301) },</div><div class='add'>+	{ USB_DEVICE(VENDOR_ID_DELL,    0xb097) },</div><div class='ctx'> 	{ USB_DEVICE(VENDOR_ID_ASUS,    0x1976) },</div><div class='ctx'> 	{}</div><div class='ctx'> };</div><div class='hunk'>@@ -10144,7 +10123,12 @@ static int __init rtl8152_driver_init(void)</div><div class='ctx'> 	ret = usb_register_device_driver(&amp;rtl8152_cfgselector_driver, THIS_MODULE);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	return usb_register(&amp;rtl8152_driver);</div><div class='add'>+</div><div class='add'>+	ret = usb_register(&amp;rtl8152_driver);</div><div class='add'>+	if (ret)</div><div class='add'>+		usb_deregister_device_driver(&amp;rtl8152_cfgselector_driver);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __exit rtl8152_driver_exit(void)</div><div class='head'>diff --git a/drivers/net/usb/r8153_ecm.c b/drivers/net/usb/r8153_ecm.c<br/>index 20b2df8d74ae..8d860dacdf49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/r8153_ecm.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/r8153_ecm.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/r8153_ecm.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/r8153_ecm.c</a></div><div class='hunk'>@@ -135,6 +135,12 @@ static const struct usb_device_id products[] = {</div><div class='ctx'> 				      USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE),</div><div class='ctx'> 	.driver_info = (unsigned long)&amp;r8153_info,</div><div class='ctx'> },</div><div class='add'>+/* Lenovo ThinkPad Hybrid USB-C with USB-A Dock (40af0135eu, based on Realtek RTL8153) */</div><div class='add'>+{</div><div class='add'>+	USB_DEVICE_AND_INTERFACE_INFO(VENDOR_ID_LENOVO, 0xa359, USB_CLASS_COMM,</div><div class='add'>+				      USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE),</div><div class='add'>+	.driver_info = (unsigned long)&amp;r8153_info,</div><div class='add'>+},</div><div class='ctx'> </div><div class='ctx'> 	{ },		/* END */</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/usb/rtl8150.c b/drivers/net/usb/rtl8150.c<br/>index 01a3b2417a54..278e6cb6f4d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/rtl8150.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/rtl8150.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/rtl8150.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/rtl8150.c</a></div><div class='hunk'>@@ -71,6 +71,14 @@</div><div class='ctx'> #define MSR_SPEED		(1&lt;&lt;3)</div><div class='ctx'> #define MSR_LINK		(1&lt;&lt;2)</div><div class='ctx'> </div><div class='add'>+/* USB endpoints */</div><div class='add'>+enum rtl8150_usb_ep {</div><div class='add'>+	RTL8150_USB_EP_CONTROL = 0,</div><div class='add'>+	RTL8150_USB_EP_BULK_IN = 1,</div><div class='add'>+	RTL8150_USB_EP_BULK_OUT = 2,</div><div class='add'>+	RTL8150_USB_EP_INT_IN = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Interrupt pipe data */</div><div class='ctx'> #define INT_TSR			0x00</div><div class='ctx'> #define INT_RSR			0x01</div><div class='hunk'>@@ -656,7 +664,6 @@ static void rtl8150_set_multicast(struct net_device *netdev)</div><div class='ctx'> 	rtl8150_t *dev = netdev_priv(netdev);</div><div class='ctx'> 	u16 rx_creg = 0x9e;</div><div class='ctx'> </div><div class='del'>-	netif_stop_queue(netdev);</div><div class='ctx'> 	if (netdev-&gt;flags &amp; IFF_PROMISC) {</div><div class='ctx'> 		rx_creg |= 0x0001;</div><div class='ctx'> 		dev_info(&amp;netdev-&gt;dev, "%s: promiscuous mode\n", netdev-&gt;name);</div><div class='hunk'>@@ -670,7 +677,6 @@ static void rtl8150_set_multicast(struct net_device *netdev)</div><div class='ctx'> 		rx_creg &amp;= 0x00fc;</div><div class='ctx'> 	}</div><div class='ctx'> 	async_set_registers(dev, RCR, sizeof(rx_creg), rx_creg);</div><div class='del'>-	netif_wake_queue(netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t rtl8150_start_xmit(struct sk_buff *skb,</div><div class='hunk'>@@ -679,9 +685,16 @@ static netdev_tx_t rtl8150_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	rtl8150_t *dev = netdev_priv(netdev);</div><div class='ctx'> 	int count, res;</div><div class='ctx'> </div><div class='add'>+	/* pad the frame and ensure terminating USB packet, datasheet 9.2.3 */</div><div class='add'>+	count = max(skb-&gt;len, ETH_ZLEN);</div><div class='add'>+	if (count % 64 == 0)</div><div class='add'>+		count++;</div><div class='add'>+	if (skb_padto(skb, count)) {</div><div class='add'>+		netdev-&gt;stats.tx_dropped++;</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	netif_stop_queue(netdev);</div><div class='del'>-	count = (skb-&gt;len &lt; 60) ? 60 : skb-&gt;len;</div><div class='del'>-	count = (count &amp; 0x3f) ? count : count + 1;</div><div class='ctx'> 	dev-&gt;tx_skb = skb;</div><div class='ctx'> 	usb_fill_bulk_urb(dev-&gt;tx_urb, dev-&gt;udev, usb_sndbulkpipe(dev-&gt;udev, 2),</div><div class='ctx'> 		      skb-&gt;data, count, write_bulk_callback, dev);</div><div class='hunk'>@@ -867,6 +880,13 @@ static int rtl8150_probe(struct usb_interface *intf,</div><div class='ctx'> 	struct usb_device *udev = interface_to_usbdev(intf);</div><div class='ctx'> 	rtl8150_t *dev;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='add'>+	static const u8 bulk_ep_addr[] = {</div><div class='add'>+		RTL8150_USB_EP_BULK_IN | USB_DIR_IN,</div><div class='add'>+		RTL8150_USB_EP_BULK_OUT | USB_DIR_OUT,</div><div class='add'>+		0};</div><div class='add'>+	static const u8 int_ep_addr[] = {</div><div class='add'>+		RTL8150_USB_EP_INT_IN | USB_DIR_IN,</div><div class='add'>+		0};</div><div class='ctx'> </div><div class='ctx'> 	netdev = alloc_etherdev(sizeof(rtl8150_t));</div><div class='ctx'> 	if (!netdev)</div><div class='hunk'>@@ -880,6 +900,13 @@ static int rtl8150_probe(struct usb_interface *intf,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Verify that all required endpoints are present */</div><div class='add'>+	if (!usb_check_bulk_endpoints(intf, bulk_ep_addr) ||</div><div class='add'>+	    !usb_check_int_endpoints(intf, int_ep_addr)) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "couldn't find required endpoints\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	tasklet_setup(&amp;dev-&gt;tl, rx_fixup);</div><div class='ctx'> 	spin_lock_init(&amp;dev-&gt;rx_pool_lock);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/usb/sierra_net.c b/drivers/net/usb/sierra_net.c<br/>index 3d239b8d1a1b..36c73db44f77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/sierra_net.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/sierra_net.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/sierra_net.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/sierra_net.c</a></div><div class='hunk'>@@ -522,7 +522,7 @@ static void sierra_net_kevent(struct work_struct *work)</div><div class='ctx'> 						" stopping sync timer",</div><div class='ctx'> 						hh.msgspecific.byte);</div><div class='ctx'> 				/* Got sync resp - stop timer &amp; clear mask */</div><div class='del'>-				del_timer_sync(&amp;priv-&gt;sync_timer);</div><div class='add'>+				timer_delete_sync(&amp;priv-&gt;sync_timer);</div><div class='ctx'> 				clear_bit(SIERRA_NET_TIMER_EXPIRY,</div><div class='ctx'> 					  &amp;priv-&gt;kevent_flags);</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -573,7 +573,7 @@ static void sierra_net_defer_kevent(struct usbnet *dev, int work)</div><div class='ctx'>  */</div><div class='ctx'> static void sierra_sync_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct sierra_net_data *priv = from_timer(priv, t, sync_timer);</div><div class='add'>+	struct sierra_net_data *priv = timer_container_of(priv, t, sync_timer);</div><div class='ctx'> 	struct usbnet *dev = priv-&gt;usbnet;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;dev-&gt;udev-&gt;dev, "%s", __func__);</div><div class='hunk'>@@ -689,6 +689,10 @@ static int sierra_net_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 			status);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='add'>+	if (!dev-&gt;status) {</div><div class='add'>+		dev_err(&amp;dev-&gt;udev-&gt;dev, "No status endpoint found");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> 	/* Initialize sierra private data */</div><div class='ctx'> 	priv = kzalloc(sizeof *priv, GFP_KERNEL);</div><div class='ctx'> 	if (!priv)</div><div class='head'>diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c<br/>index 8e82184be5e7..de733e0488bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/smsc95xx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/smsc95xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/smsc95xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/smsc95xx.c</a></div><div class='hunk'>@@ -63,6 +63,9 @@ struct smsc95xx_priv {</div><div class='ctx'> 	u32 hash_hi;</div><div class='ctx'> 	u32 hash_lo;</div><div class='ctx'> 	u32 wolopts;</div><div class='add'>+	bool pause_rx;</div><div class='add'>+	bool pause_tx;</div><div class='add'>+	bool pause_autoneg;</div><div class='ctx'> 	spinlock_t mac_cr_lock;</div><div class='ctx'> 	u8 features;</div><div class='ctx'> 	u8 suspend_flags;</div><div class='hunk'>@@ -537,16 +540,23 @@ static void smsc95xx_set_multicast(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev)</div><div class='ctx'> {</div><div class='del'>-	u32 flow = 0, afc_cfg;</div><div class='ctx'> 	struct smsc95xx_priv *pdata = dev-&gt;driver_priv;</div><div class='del'>-	bool tx_pause, rx_pause;</div><div class='add'>+	u32 flow = 0, afc_cfg;</div><div class='ctx'> </div><div class='ctx'> 	int ret = smsc95xx_read_reg(dev, AFC_CFG, &amp;afc_cfg);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;phydev-&gt;duplex == DUPLEX_FULL) {</div><div class='del'>-		phy_get_pause(pdata-&gt;phydev, &amp;tx_pause, &amp;rx_pause);</div><div class='add'>+		bool tx_pause, rx_pause;</div><div class='add'>+</div><div class='add'>+		if (pdata-&gt;phydev-&gt;autoneg == AUTONEG_ENABLE &amp;&amp;</div><div class='add'>+		    pdata-&gt;pause_autoneg) {</div><div class='add'>+			phy_get_pause(pdata-&gt;phydev, &amp;tx_pause, &amp;rx_pause);</div><div class='add'>+		} else {</div><div class='add'>+			tx_pause = pdata-&gt;pause_tx;</div><div class='add'>+			rx_pause = pdata-&gt;pause_rx;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (rx_pause)</div><div class='ctx'> 			flow = 0xFFFF0002;</div><div class='hunk'>@@ -772,6 +782,55 @@ static int smsc95xx_ethtool_get_sset_count(struct net_device *ndev, int sset)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void smsc95xx_get_pauseparam(struct net_device *ndev,</div><div class='add'>+				    struct ethtool_pauseparam *pause)</div><div class='add'>+{</div><div class='add'>+	struct smsc95xx_priv *pdata;</div><div class='add'>+	struct usbnet *dev;</div><div class='add'>+</div><div class='add'>+	dev = netdev_priv(ndev);</div><div class='add'>+	pdata = dev-&gt;driver_priv;</div><div class='add'>+</div><div class='add'>+	pause-&gt;autoneg = pdata-&gt;pause_autoneg;</div><div class='add'>+	pause-&gt;rx_pause = pdata-&gt;pause_rx;</div><div class='add'>+	pause-&gt;tx_pause = pdata-&gt;pause_tx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int smsc95xx_set_pauseparam(struct net_device *ndev,</div><div class='add'>+				   struct ethtool_pauseparam *pause)</div><div class='add'>+{</div><div class='add'>+	bool pause_autoneg_rx, pause_autoneg_tx;</div><div class='add'>+	struct smsc95xx_priv *pdata;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	struct usbnet *dev;</div><div class='add'>+</div><div class='add'>+	dev = netdev_priv(ndev);</div><div class='add'>+	pdata = dev-&gt;driver_priv;</div><div class='add'>+	phydev = ndev-&gt;phydev;</div><div class='add'>+</div><div class='add'>+	if (!phydev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;pause_rx = pause-&gt;rx_pause;</div><div class='add'>+	pdata-&gt;pause_tx = pause-&gt;tx_pause;</div><div class='add'>+	pdata-&gt;pause_autoneg = pause-&gt;autoneg;</div><div class='add'>+</div><div class='add'>+	if (pause-&gt;autoneg) {</div><div class='add'>+		pause_autoneg_rx = pause-&gt;rx_pause;</div><div class='add'>+		pause_autoneg_tx = pause-&gt;tx_pause;</div><div class='add'>+	} else {</div><div class='add'>+		pause_autoneg_rx = false;</div><div class='add'>+		pause_autoneg_tx = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phy_set_asym_pause(ndev-&gt;phydev, pause_autoneg_rx, pause_autoneg_tx);</div><div class='add'>+	if (phydev-&gt;link &amp;&amp; (!pause-&gt;autoneg ||</div><div class='add'>+			     phydev-&gt;autoneg == AUTONEG_DISABLE))</div><div class='add'>+		smsc95xx_mac_update_fullduplex(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops smsc95xx_ethtool_ops = {</div><div class='ctx'> 	.get_link	= smsc95xx_get_link,</div><div class='ctx'> 	.nway_reset	= phy_ethtool_nway_reset,</div><div class='hunk'>@@ -791,6 +850,8 @@ static const struct ethtool_ops smsc95xx_ethtool_ops = {</div><div class='ctx'> 	.self_test	= net_selftest,</div><div class='ctx'> 	.get_strings	= smsc95xx_ethtool_get_strings,</div><div class='ctx'> 	.get_sset_count	= smsc95xx_ethtool_get_sset_count,</div><div class='add'>+	.get_pauseparam	= smsc95xx_get_pauseparam,</div><div class='add'>+	.set_pauseparam	= smsc95xx_set_pauseparam,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)</div><div class='hunk'>@@ -1227,6 +1288,11 @@ static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 	dev-&gt;net-&gt;max_mtu = ETH_DATA_LEN;</div><div class='ctx'> 	dev-&gt;hard_mtu = dev-&gt;net-&gt;mtu + dev-&gt;net-&gt;hard_header_len;</div><div class='ctx'> </div><div class='add'>+	pdata-&gt;pause_tx = true;</div><div class='add'>+	pdata-&gt;pause_rx = true;</div><div class='add'>+	pdata-&gt;pause_autoneg = true;</div><div class='add'>+	phy_support_asym_pause(pdata-&gt;phydev);</div><div class='add'>+</div><div class='ctx'> 	ret = phy_connect_direct(dev-&gt;net, pdata-&gt;phydev,</div><div class='ctx'> 				 &amp;smsc95xx_handle_link_change,</div><div class='ctx'> 				 PHY_INTERFACE_MODE_MII);</div><div class='head'>diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c<br/>index 44179f4e807f..1d9faa70ba3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/usbnet.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/usb/usbnet.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/usb/usbnet.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/usb/usbnet.c</a></div><div class='hunk'>@@ -142,16 +142,16 @@ int usbnet_get_endpoints(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> </div><div class='ctx'> 	if (alt-&gt;desc.bAlternateSetting != 0 ||</div><div class='ctx'> 	    !(dev-&gt;driver_info-&gt;flags &amp; FLAG_NO_SETINT)) {</div><div class='del'>-		tmp = usb_set_interface (dev-&gt;udev, alt-&gt;desc.bInterfaceNumber,</div><div class='del'>-				alt-&gt;desc.bAlternateSetting);</div><div class='add'>+		tmp = usb_set_interface(dev-&gt;udev, alt-&gt;desc.bInterfaceNumber,</div><div class='add'>+					alt-&gt;desc.bAlternateSetting);</div><div class='ctx'> 		if (tmp &lt; 0)</div><div class='ctx'> 			return tmp;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;in = usb_rcvbulkpipe (dev-&gt;udev,</div><div class='del'>-			in-&gt;desc.bEndpointAddress &amp; USB_ENDPOINT_NUMBER_MASK);</div><div class='del'>-	dev-&gt;out = usb_sndbulkpipe (dev-&gt;udev,</div><div class='del'>-			out-&gt;desc.bEndpointAddress &amp; USB_ENDPOINT_NUMBER_MASK);</div><div class='add'>+	dev-&gt;in = usb_rcvbulkpipe(dev-&gt;udev,</div><div class='add'>+				  in-&gt;desc.bEndpointAddress &amp; USB_ENDPOINT_NUMBER_MASK);</div><div class='add'>+	dev-&gt;out = usb_sndbulkpipe(dev-&gt;udev,</div><div class='add'>+				   out-&gt;desc.bEndpointAddress &amp; USB_ENDPOINT_NUMBER_MASK);</div><div class='ctx'> 	dev-&gt;status = status;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -163,7 +163,7 @@ int usbnet_get_ethernet_addr(struct usbnet *dev, int iMACAddress)</div><div class='ctx'> 	int 		tmp = -1, ret;</div><div class='ctx'> 	unsigned char	buf [13];</div><div class='ctx'> </div><div class='del'>-	ret = usb_string(dev-&gt;udev, iMACAddress, buf, sizeof buf);</div><div class='add'>+	ret = usb_string(dev-&gt;udev, iMACAddress, buf, sizeof(buf));</div><div class='ctx'> 	if (ret == 12)</div><div class='ctx'> 		tmp = hex2bin(addr, buf, 6);</div><div class='ctx'> 	if (tmp &lt; 0) {</div><div class='hunk'>@@ -178,7 +178,18 @@ int usbnet_get_ethernet_addr(struct usbnet *dev, int iMACAddress)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(usbnet_get_ethernet_addr);</div><div class='ctx'> </div><div class='del'>-static void intr_complete (struct urb *urb)</div><div class='add'>+static bool usbnet_needs_usb_name_format(struct usbnet *dev, struct net_device *net)</div><div class='add'>+{</div><div class='add'>+	/* Point to point devices which don't have a real MAC address</div><div class='add'>+	 * (or report a fake local one) have historically used the usb%d</div><div class='add'>+	 * naming. Preserve this..</div><div class='add'>+	 */</div><div class='add'>+	return (dev-&gt;driver_info-&gt;flags &amp; FLAG_POINTTOPOINT) != 0 &amp;&amp;</div><div class='add'>+		(is_zero_ether_addr(net-&gt;dev_addr) ||</div><div class='add'>+		 is_local_ether_addr(net-&gt;dev_addr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void intr_complete(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet	*dev = urb-&gt;context;</div><div class='ctx'> 	int		status = urb-&gt;status;</div><div class='hunk'>@@ -204,13 +215,13 @@ static void intr_complete (struct urb *urb)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	status = usb_submit_urb (urb, GFP_ATOMIC);</div><div class='add'>+	status = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (status != 0)</div><div class='ctx'> 		netif_err(dev, timer, dev-&gt;net,</div><div class='ctx'> 			  "intr resubmit --&gt; %d\n", status);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int init_status (struct usbnet *dev, struct usb_interface *intf)</div><div class='add'>+static int init_status(struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	char		*buf = NULL;</div><div class='ctx'> 	unsigned	pipe = 0;</div><div class='hunk'>@@ -220,24 +231,24 @@ static int init_status (struct usbnet *dev, struct usb_interface *intf)</div><div class='ctx'> 	if (!dev-&gt;driver_info-&gt;status)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	pipe = usb_rcvintpipe (dev-&gt;udev,</div><div class='del'>-			dev-&gt;status-&gt;desc.bEndpointAddress</div><div class='del'>-				&amp; USB_ENDPOINT_NUMBER_MASK);</div><div class='add'>+	pipe = usb_rcvintpipe(dev-&gt;udev,</div><div class='add'>+			      dev-&gt;status-&gt;desc.bEndpointAddress</div><div class='add'>+			      &amp; USB_ENDPOINT_NUMBER_MASK);</div><div class='ctx'> 	maxp = usb_maxpacket(dev-&gt;udev, pipe);</div><div class='ctx'> </div><div class='ctx'> 	/* avoid 1 msec chatter:  min 8 msec poll rate */</div><div class='ctx'> 	period = max ((int) dev-&gt;status-&gt;desc.bInterval,</div><div class='ctx'> 		(dev-&gt;udev-&gt;speed == USB_SPEED_HIGH) ? 7 : 3);</div><div class='ctx'> </div><div class='del'>-	buf = kmalloc (maxp, GFP_KERNEL);</div><div class='add'>+	buf = kmalloc(maxp, GFP_KERNEL);</div><div class='ctx'> 	if (buf) {</div><div class='del'>-		dev-&gt;interrupt = usb_alloc_urb (0, GFP_KERNEL);</div><div class='add'>+		dev-&gt;interrupt = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 		if (!dev-&gt;interrupt) {</div><div class='del'>-			kfree (buf);</div><div class='add'>+			kfree(buf);</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			usb_fill_int_urb(dev-&gt;interrupt, dev-&gt;udev, pipe,</div><div class='del'>-				buf, maxp, intr_complete, dev, period);</div><div class='add'>+					 buf, maxp, intr_complete, dev, period);</div><div class='ctx'> 			dev-&gt;interrupt-&gt;transfer_flags |= URB_FREE_BUFFER;</div><div class='ctx'> 			dev_dbg(&amp;intf-&gt;dev,</div><div class='ctx'> 				"status ep%din, %d bytes period %d\n",</div><div class='hunk'>@@ -315,7 +326,7 @@ static void __usbnet_status_stop_force(struct usbnet *dev)</div><div class='ctx'>  * Some link protocols batch packets, so their rx_fixup paths</div><div class='ctx'>  * can return clones as well as just modify the original skb.</div><div class='ctx'>  */</div><div class='del'>-void usbnet_skb_return (struct usbnet *dev, struct sk_buff *skb)</div><div class='add'>+void usbnet_skb_return(struct usbnet *dev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcpu_sw_netstats *stats64 = this_cpu_ptr(dev-&gt;net-&gt;tstats);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -328,7 +339,7 @@ void usbnet_skb_return (struct usbnet *dev, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	/* only update if unset to allow minidriver rx_fixup override */</div><div class='ctx'> 	if (skb-&gt;protocol == 0)</div><div class='del'>-		skb-&gt;protocol = eth_type_trans (skb, dev-&gt;net);</div><div class='add'>+		skb-&gt;protocol = eth_type_trans(skb, dev-&gt;net);</div><div class='ctx'> </div><div class='ctx'> 	flags = u64_stats_update_begin_irqsave(&amp;stats64-&gt;syncp);</div><div class='ctx'> 	u64_stats_inc(&amp;stats64-&gt;rx_packets);</div><div class='hunk'>@@ -336,8 +347,8 @@ void usbnet_skb_return (struct usbnet *dev, struct sk_buff *skb)</div><div class='ctx'> 	u64_stats_update_end_irqrestore(&amp;stats64-&gt;syncp, flags);</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(dev, rx_status, dev-&gt;net, "&lt; rx, len %zu, type 0x%x\n",</div><div class='del'>-		  skb-&gt;len + sizeof (struct ethhdr), skb-&gt;protocol);</div><div class='del'>-	memset (skb-&gt;cb, 0, sizeof (struct skb_data));</div><div class='add'>+		  skb-&gt;len + sizeof(struct ethhdr), skb-&gt;protocol);</div><div class='add'>+	memset(skb-&gt;cb, 0, sizeof(struct skb_data));</div><div class='ctx'> </div><div class='ctx'> 	if (skb_defer_rx_timestamp(skb))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -385,7 +396,7 @@ EXPORT_SYMBOL_GPL(usbnet_update_max_qlen);</div><div class='ctx'>  *</div><div class='ctx'>  *-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='del'>-int usbnet_change_mtu (struct net_device *net, int new_mtu)</div><div class='add'>+int usbnet_change_mtu(struct net_device *net, int new_mtu)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet	*dev = netdev_priv(net);</div><div class='ctx'> 	int		ll_mtu = new_mtu + net-&gt;hard_header_len;</div><div class='hunk'>@@ -450,7 +461,7 @@ static enum skb_state defer_bh(struct usbnet *dev, struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	__skb_queue_tail(&amp;dev-&gt;done, skb);</div><div class='ctx'> 	if (dev-&gt;done.qlen == 1)</div><div class='del'>-		tasklet_schedule(&amp;dev-&gt;bh);</div><div class='add'>+		queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='ctx'> 	spin_unlock(&amp;dev-&gt;done.lock);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;list-&gt;lock, flags);</div><div class='ctx'> 	return old_state;</div><div class='hunk'>@@ -461,7 +472,7 @@ static enum skb_state defer_bh(struct usbnet *dev, struct sk_buff *skb,</div><div class='ctx'>  * NOTE:  annoying asymmetry:  if it's active, schedule_work() fails,</div><div class='ctx'>  * but tasklet_schedule() doesn't.  hope the failure is rare.</div><div class='ctx'>  */</div><div class='del'>-void usbnet_defer_kevent (struct usbnet *dev, int work)</div><div class='add'>+void usbnet_defer_kevent(struct usbnet *dev, int work)</div><div class='ctx'> {</div><div class='ctx'> 	set_bit (work, &amp;dev-&gt;flags);</div><div class='ctx'> 	if (!usbnet_going_away(dev)) {</div><div class='hunk'>@@ -478,9 +489,9 @@ EXPORT_SYMBOL_GPL(usbnet_defer_kevent);</div><div class='ctx'> </div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='del'>-static void rx_complete (struct urb *urb);</div><div class='add'>+static void rx_complete(struct urb *urb);</div><div class='ctx'> </div><div class='del'>-static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags)</div><div class='add'>+static int rx_submit(struct usbnet *dev, struct urb *urb, gfp_t flags)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff		*skb;</div><div class='ctx'> 	struct skb_data		*entry;</div><div class='hunk'>@@ -500,8 +511,8 @@ static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags)</div><div class='ctx'> 		skb = __netdev_alloc_skb_ip_align(dev-&gt;net, size, flags);</div><div class='ctx'> 	if (!skb) {</div><div class='ctx'> 		netif_dbg(dev, rx_err, dev-&gt;net, "no rx skb\n");</div><div class='del'>-		usbnet_defer_kevent (dev, EVENT_RX_MEMORY);</div><div class='del'>-		usb_free_urb (urb);</div><div class='add'>+		usbnet_defer_kevent(dev, EVENT_RX_MEMORY);</div><div class='add'>+		usb_free_urb(urb);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -510,26 +521,27 @@ static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags)</div><div class='ctx'> 	entry-&gt;dev = dev;</div><div class='ctx'> 	entry-&gt;length = 0;</div><div class='ctx'> </div><div class='del'>-	usb_fill_bulk_urb (urb, dev-&gt;udev, dev-&gt;in,</div><div class='del'>-		skb-&gt;data, size, rx_complete, skb);</div><div class='add'>+	usb_fill_bulk_urb(urb, dev-&gt;udev, dev-&gt;in,</div><div class='add'>+			  skb-&gt;data, size, rx_complete, skb);</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave (&amp;dev-&gt;rxq.lock, lockflags);</div><div class='add'>+	spin_lock_irqsave(&amp;dev-&gt;rxq.lock, lockflags);</div><div class='ctx'> </div><div class='del'>-	if (netif_running (dev-&gt;net) &amp;&amp;</div><div class='del'>-	    netif_device_present (dev-&gt;net) &amp;&amp;</div><div class='add'>+	if (netif_running(dev-&gt;net) &amp;&amp;</div><div class='add'>+	    netif_device_present(dev-&gt;net) &amp;&amp;</div><div class='ctx'> 	    test_bit(EVENT_DEV_OPEN, &amp;dev-&gt;flags) &amp;&amp;</div><div class='del'>-	    !test_bit (EVENT_RX_HALT, &amp;dev-&gt;flags) &amp;&amp;</div><div class='del'>-	    !test_bit (EVENT_DEV_ASLEEP, &amp;dev-&gt;flags)) {</div><div class='del'>-		switch (retval = usb_submit_urb (urb, GFP_ATOMIC)) {</div><div class='add'>+	    !test_bit(EVENT_RX_HALT, &amp;dev-&gt;flags) &amp;&amp;</div><div class='add'>+	    !test_bit(EVENT_DEV_ASLEEP, &amp;dev-&gt;flags) &amp;&amp;</div><div class='add'>+	    !usbnet_going_away(dev)) {</div><div class='add'>+		switch (retval = usb_submit_urb(urb, GFP_ATOMIC)) {</div><div class='ctx'> 		case -EPIPE:</div><div class='del'>-			usbnet_defer_kevent (dev, EVENT_RX_HALT);</div><div class='add'>+			usbnet_defer_kevent(dev, EVENT_RX_HALT);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case -ENOMEM:</div><div class='del'>-			usbnet_defer_kevent (dev, EVENT_RX_MEMORY);</div><div class='add'>+			usbnet_defer_kevent(dev, EVENT_RX_MEMORY);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case -ENODEV:</div><div class='ctx'> 			netif_dbg(dev, ifdown, dev-&gt;net, "device gone\n");</div><div class='del'>-			netif_device_detach (dev-&gt;net);</div><div class='add'>+			netif_device_detach(dev-&gt;net);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case -EHOSTUNREACH:</div><div class='ctx'> 			retval = -ENOLINK;</div><div class='hunk'>@@ -537,20 +549,19 @@ static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags)</div><div class='ctx'> 		default:</div><div class='ctx'> 			netif_dbg(dev, rx_err, dev-&gt;net,</div><div class='ctx'> 				  "rx submit, %d\n", retval);</div><div class='del'>-			tasklet_schedule (&amp;dev-&gt;bh);</div><div class='add'>+			queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 0:</div><div class='del'>-			if (!usbnet_going_away(dev))</div><div class='del'>-				__usbnet_queue_skb(&amp;dev-&gt;rxq, skb, rx_start);</div><div class='add'>+			__usbnet_queue_skb(&amp;dev-&gt;rxq, skb, rx_start);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		netif_dbg(dev, ifdown, dev-&gt;net, "rx: stopped\n");</div><div class='ctx'> 		retval = -ENOLINK;</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore (&amp;dev-&gt;rxq.lock, lockflags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev-&gt;rxq.lock, lockflags);</div><div class='ctx'> 	if (retval) {</div><div class='del'>-		dev_kfree_skb_any (skb);</div><div class='del'>-		usb_free_urb (urb);</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		usb_free_urb(urb);</div><div class='ctx'> 	}</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='hunk'>@@ -561,7 +572,7 @@ static int rx_submit (struct usbnet *dev, struct urb *urb, gfp_t flags)</div><div class='ctx'> static inline int rx_process(struct usbnet *dev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	if (dev-&gt;driver_info-&gt;rx_fixup &amp;&amp;</div><div class='del'>-	    !dev-&gt;driver_info-&gt;rx_fixup (dev, skb)) {</div><div class='add'>+	    !dev-&gt;driver_info-&gt;rx_fixup(dev, skb)) {</div><div class='ctx'> 		/* With RX_ASSEMBLE, rx_fixup() must update counters */</div><div class='ctx'> 		if (!(dev-&gt;driver_info-&gt;flags &amp; FLAG_RX_ASSEMBLE))</div><div class='ctx'> 			dev-&gt;net-&gt;stats.rx_errors++;</div><div class='hunk'>@@ -586,7 +597,7 @@ static inline int rx_process(struct usbnet *dev, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='del'>-static void rx_complete (struct urb *urb)</div><div class='add'>+static void rx_complete(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff		*skb = (struct sk_buff *) urb-&gt;context;</div><div class='ctx'> 	struct skb_data		*entry = (struct skb_data *) skb-&gt;cb;</div><div class='hunk'>@@ -594,7 +605,7 @@ static void rx_complete (struct urb *urb)</div><div class='ctx'> 	int			urb_status = urb-&gt;status;</div><div class='ctx'> 	enum skb_state		state;</div><div class='ctx'> </div><div class='del'>-	skb_put (skb, urb-&gt;actual_length);</div><div class='add'>+	skb_put(skb, urb-&gt;actual_length);</div><div class='ctx'> 	state = rx_done;</div><div class='ctx'> 	entry-&gt;urb = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -610,7 +621,7 @@ static void rx_complete (struct urb *urb)</div><div class='ctx'> 	 */</div><div class='ctx'> 	case -EPIPE:</div><div class='ctx'> 		dev-&gt;net-&gt;stats.rx_errors++;</div><div class='del'>-		usbnet_defer_kevent (dev, EVENT_RX_HALT);</div><div class='add'>+		usbnet_defer_kevent(dev, EVENT_RX_HALT);</div><div class='ctx'> 		fallthrough;</div><div class='ctx'> </div><div class='ctx'> 	/* software-driven interface shutdown */</div><div class='hunk'>@@ -628,8 +639,8 @@ static void rx_complete (struct urb *urb)</div><div class='ctx'> 	case -ETIME:</div><div class='ctx'> 	case -EILSEQ:</div><div class='ctx'> 		dev-&gt;net-&gt;stats.rx_errors++;</div><div class='del'>-		if (!timer_pending (&amp;dev-&gt;delay)) {</div><div class='del'>-			mod_timer (&amp;dev-&gt;delay, jiffies + THROTTLE_JIFFIES);</div><div class='add'>+		if (!timer_pending(&amp;dev-&gt;delay)) {</div><div class='add'>+			mod_timer(&amp;dev-&gt;delay, jiffies + THROTTLE_JIFFIES);</div><div class='ctx'> 			netif_dbg(dev, link, dev-&gt;net,</div><div class='ctx'> 				  "rx throttle %d\n", urb_status);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -665,14 +676,14 @@ block:</div><div class='ctx'> 	state = defer_bh(dev, skb, &amp;dev-&gt;rxq, state);</div><div class='ctx'> </div><div class='ctx'> 	if (urb) {</div><div class='del'>-		if (netif_running (dev-&gt;net) &amp;&amp;</div><div class='del'>-		    !test_bit (EVENT_RX_HALT, &amp;dev-&gt;flags) &amp;&amp;</div><div class='add'>+		if (netif_running(dev-&gt;net) &amp;&amp;</div><div class='add'>+		    !test_bit(EVENT_RX_HALT, &amp;dev-&gt;flags) &amp;&amp;</div><div class='ctx'> 		    state != unlink_start) {</div><div class='del'>-			rx_submit (dev, urb, GFP_ATOMIC);</div><div class='add'>+			rx_submit(dev, urb, GFP_ATOMIC);</div><div class='ctx'> 			usb_mark_last_busy(dev-&gt;udev);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='del'>-		usb_free_urb (urb);</div><div class='add'>+		usb_free_urb(urb);</div><div class='ctx'> 	}</div><div class='ctx'> 	netif_dbg(dev, rx_err, dev-&gt;net, "no read resubmitted\n");</div><div class='ctx'> }</div><div class='hunk'>@@ -691,6 +702,7 @@ void usbnet_resume_rx(struct usbnet *dev)</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	int num = 0;</div><div class='ctx'> </div><div class='add'>+	local_bh_disable();</div><div class='ctx'> 	clear_bit(EVENT_RX_PAUSED, &amp;dev-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	while ((skb = skb_dequeue(&amp;dev-&gt;rxq_pause)) != NULL) {</div><div class='hunk'>@@ -698,7 +710,8 @@ void usbnet_resume_rx(struct usbnet *dev)</div><div class='ctx'> 		num++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tasklet_schedule(&amp;dev-&gt;bh);</div><div class='add'>+	queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='add'>+	local_bh_enable();</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(dev, rx_status, dev-&gt;net,</div><div class='ctx'> 		  "paused rx queue disabled, %d skbs requeued\n", num);</div><div class='hunk'>@@ -715,7 +728,7 @@ EXPORT_SYMBOL_GPL(usbnet_purge_paused_rxq);</div><div class='ctx'> </div><div class='ctx'> // unlink pending rx/tx; completion handlers do all other cleanup</div><div class='ctx'> </div><div class='del'>-static int unlink_urbs (struct usbnet *dev, struct sk_buff_head *q)</div><div class='add'>+static int unlink_urbs(struct usbnet *dev, struct sk_buff_head *q)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long		flags;</div><div class='ctx'> 	struct sk_buff		*skb;</div><div class='hunk'>@@ -748,7 +761,7 @@ found:</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;q-&gt;lock, flags);</div><div class='ctx'> 		// during some PM-driven resume scenarios,</div><div class='ctx'> 		// these (async) unlinks complete immediately</div><div class='del'>-		retval = usb_unlink_urb (urb);</div><div class='add'>+		retval = usb_unlink_urb(urb);</div><div class='ctx'> 		if (retval != -EINPROGRESS &amp;&amp; retval != 0)</div><div class='ctx'> 			netdev_dbg(dev-&gt;net, "unlink urb err, %d\n", retval);</div><div class='ctx'> 		else</div><div class='hunk'>@@ -756,7 +769,7 @@ found:</div><div class='ctx'> 		usb_put_urb(urb);</div><div class='ctx'> 		spin_lock_irqsave(&amp;q-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore (&amp;q-&gt;lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;q-&gt;lock, flags);</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -767,7 +780,7 @@ void usbnet_unlink_rx_urbs(struct usbnet *dev)</div><div class='ctx'> {</div><div class='ctx'> 	if (netif_running(dev-&gt;net)) {</div><div class='ctx'> 		(void) unlink_urbs (dev, &amp;dev-&gt;rxq);</div><div class='del'>-		tasklet_schedule(&amp;dev-&gt;bh);</div><div class='add'>+		queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(usbnet_unlink_rx_urbs);</div><div class='hunk'>@@ -810,14 +823,15 @@ static void usbnet_terminate_urbs(struct usbnet *dev)</div><div class='ctx'> 	remove_wait_queue(&amp;dev-&gt;wait, &amp;wait);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int usbnet_stop (struct net_device *net)</div><div class='add'>+int usbnet_stop(struct net_device *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet		*dev = netdev_priv(net);</div><div class='ctx'> 	const struct driver_info *info = dev-&gt;driver_info;</div><div class='ctx'> 	int			retval, pm, mpn;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(EVENT_DEV_OPEN, &amp;dev-&gt;flags);</div><div class='del'>-	netif_stop_queue (net);</div><div class='add'>+	netif_stop_queue(net);</div><div class='add'>+	netdev_reset_queue(net);</div><div class='ctx'> </div><div class='ctx'> 	netif_info(dev, ifdown, dev-&gt;net,</div><div class='ctx'> 		   "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",</div><div class='hunk'>@@ -849,16 +863,16 @@ int usbnet_stop (struct net_device *net)</div><div class='ctx'> </div><div class='ctx'> 	/* deferred work (timer, softirq, task) must also stop */</div><div class='ctx'> 	dev-&gt;flags = 0;</div><div class='del'>-	del_timer_sync(&amp;dev-&gt;delay);</div><div class='del'>-	tasklet_kill(&amp;dev-&gt;bh);</div><div class='add'>+	timer_delete_sync(&amp;dev-&gt;delay);</div><div class='add'>+	cancel_work_sync(&amp;dev-&gt;bh_work);</div><div class='ctx'> 	cancel_work_sync(&amp;dev-&gt;kevent);</div><div class='ctx'> </div><div class='ctx'> 	/* We have cyclic dependencies. Those calls are needed</div><div class='ctx'> 	 * to break a cycle. We cannot fall into the gaps because</div><div class='ctx'> 	 * we have a flag</div><div class='ctx'> 	 */</div><div class='del'>-	tasklet_kill(&amp;dev-&gt;bh);</div><div class='del'>-	del_timer_sync(&amp;dev-&gt;delay);</div><div class='add'>+	cancel_work_sync(&amp;dev-&gt;bh_work);</div><div class='add'>+	timer_delete_sync(&amp;dev-&gt;delay);</div><div class='ctx'> 	cancel_work_sync(&amp;dev-&gt;kevent);</div><div class='ctx'> </div><div class='ctx'> 	if (!pm)</div><div class='hunk'>@@ -879,7 +893,7 @@ EXPORT_SYMBOL_GPL(usbnet_stop);</div><div class='ctx'> </div><div class='ctx'> // precondition: never called in_interrupt</div><div class='ctx'> </div><div class='del'>-int usbnet_open (struct net_device *net)</div><div class='add'>+int usbnet_open(struct net_device *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet		*dev = netdev_priv(net);</div><div class='ctx'> 	int			retval;</div><div class='hunk'>@@ -896,23 +910,29 @@ int usbnet_open (struct net_device *net)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	// put into "known safe" state</div><div class='del'>-	if (info-&gt;reset &amp;&amp; (retval = info-&gt;reset (dev)) &lt; 0) {</div><div class='del'>-		netif_info(dev, ifup, dev-&gt;net,</div><div class='del'>-			   "open reset fail (%d) usbnet usb-%s-%s, %s\n",</div><div class='del'>-			   retval,</div><div class='del'>-			   dev-&gt;udev-&gt;bus-&gt;bus_name,</div><div class='del'>-			   dev-&gt;udev-&gt;devpath,</div><div class='del'>-			   info-&gt;description);</div><div class='del'>-		goto done;</div><div class='add'>+	if (info-&gt;reset) {</div><div class='add'>+		retval = info-&gt;reset(dev);</div><div class='add'>+		if (retval &lt; 0) {</div><div class='add'>+			netif_info(dev, ifup, dev-&gt;net,</div><div class='add'>+				   "open reset fail (%d) usbnet usb-%s-%s, %s\n",</div><div class='add'>+				   retval,</div><div class='add'>+				   dev-&gt;udev-&gt;bus-&gt;bus_name,</div><div class='add'>+				   dev-&gt;udev-&gt;devpath,</div><div class='add'>+				   info-&gt;description);</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* hard_mtu or rx_urb_size may change in reset() */</div><div class='ctx'> 	usbnet_update_max_qlen(dev);</div><div class='ctx'> </div><div class='ctx'> 	// insist peer be connected</div><div class='del'>-	if (info-&gt;check_connect &amp;&amp; (retval = info-&gt;check_connect (dev)) &lt; 0) {</div><div class='del'>-		netif_err(dev, ifup, dev-&gt;net, "can't open; %d\n", retval);</div><div class='del'>-		goto done;</div><div class='add'>+	if (info-&gt;check_connect) {</div><div class='add'>+		retval = info-&gt;check_connect(dev);</div><div class='add'>+		if (retval &lt; 0) {</div><div class='add'>+			netif_err(dev, ifup, dev-&gt;net, "can't open; %d\n", retval);</div><div class='add'>+			goto done;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* start any status interrupt transfer */</div><div class='hunk'>@@ -926,6 +946,7 @@ int usbnet_open (struct net_device *net)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	set_bit(EVENT_DEV_OPEN, &amp;dev-&gt;flags);</div><div class='add'>+	netdev_reset_queue(net);</div><div class='ctx'> 	netif_start_queue (net);</div><div class='ctx'> 	netif_info(dev, ifup, dev-&gt;net,</div><div class='ctx'> 		   "open: enable queueing (rx %d, tx %d) mtu %d %s framing\n",</div><div class='hunk'>@@ -944,7 +965,7 @@ int usbnet_open (struct net_device *net)</div><div class='ctx'> 	clear_bit(EVENT_RX_KILL, &amp;dev-&gt;flags);</div><div class='ctx'> </div><div class='ctx'> 	// delay posting reads until we're fully open</div><div class='del'>-	tasklet_schedule (&amp;dev-&gt;bh);</div><div class='add'>+	queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='ctx'> 	if (info-&gt;manage_power) {</div><div class='ctx'> 		retval = info-&gt;manage_power(dev, 1);</div><div class='ctx'> 		if (retval &lt; 0) {</div><div class='hunk'>@@ -1002,6 +1023,13 @@ int usbnet_get_link_ksettings_internal(struct net_device *net,</div><div class='ctx'> 	else</div><div class='ctx'> 		cmd-&gt;base.speed = SPEED_UNKNOWN;</div><div class='ctx'> </div><div class='add'>+	/* The standard "Universal Serial Bus Class Definitions</div><div class='add'>+	 * for Communications Devices v1.2" does not specify</div><div class='add'>+	 * anything about duplex status.</div><div class='add'>+	 * So set it DUPLEX_UNKNOWN instead of default DUPLEX_HALF.</div><div class='add'>+	 */</div><div class='add'>+	cmd-&gt;base.duplex = DUPLEX_UNKNOWN;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(usbnet_get_link_ksettings_internal);</div><div class='hunk'>@@ -1028,13 +1056,13 @@ int usbnet_set_link_ksettings_mii(struct net_device *net,</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(usbnet_set_link_ksettings_mii);</div><div class='ctx'> </div><div class='del'>-u32 usbnet_get_link (struct net_device *net)</div><div class='add'>+u32 usbnet_get_link(struct net_device *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet *dev = netdev_priv(net);</div><div class='ctx'> </div><div class='ctx'> 	/* If a check_connect is defined, return its result */</div><div class='ctx'> 	if (dev-&gt;driver_info-&gt;check_connect)</div><div class='del'>-		return dev-&gt;driver_info-&gt;check_connect (dev) == 0;</div><div class='add'>+		return dev-&gt;driver_info-&gt;check_connect(dev) == 0;</div><div class='ctx'> </div><div class='ctx'> 	/* if the device has mii operations, use those */</div><div class='ctx'> 	if (dev-&gt;mii.mdio_read)</div><div class='hunk'>@@ -1056,18 +1084,18 @@ int usbnet_nway_reset(struct net_device *net)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(usbnet_nway_reset);</div><div class='ctx'> </div><div class='del'>-void usbnet_get_drvinfo (struct net_device *net, struct ethtool_drvinfo *info)</div><div class='add'>+void usbnet_get_drvinfo(struct net_device *net, struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet *dev = netdev_priv(net);</div><div class='ctx'> </div><div class='ctx'> 	strscpy(info-&gt;driver, dev-&gt;driver_name, sizeof(info-&gt;driver));</div><div class='ctx'> 	strscpy(info-&gt;fw_version, dev-&gt;driver_info-&gt;description,</div><div class='ctx'> 		sizeof(info-&gt;fw_version));</div><div class='del'>-	usb_make_path (dev-&gt;udev, info-&gt;bus_info, sizeof info-&gt;bus_info);</div><div class='add'>+	usb_make_path(dev-&gt;udev, info-&gt;bus_info, sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(usbnet_get_drvinfo);</div><div class='ctx'> </div><div class='del'>-u32 usbnet_get_msglevel (struct net_device *net)</div><div class='add'>+u32 usbnet_get_msglevel(struct net_device *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet *dev = netdev_priv(net);</div><div class='ctx'> </div><div class='hunk'>@@ -1075,7 +1103,7 @@ u32 usbnet_get_msglevel (struct net_device *net)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(usbnet_get_msglevel);</div><div class='ctx'> </div><div class='del'>-void usbnet_set_msglevel (struct net_device *net, u32 level)</div><div class='add'>+void usbnet_set_msglevel(struct net_device *net, u32 level)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet *dev = netdev_priv(net);</div><div class='ctx'> </div><div class='hunk'>@@ -1102,6 +1130,9 @@ static void __handle_link_change(struct usbnet *dev)</div><div class='ctx'> 	if (!test_bit(EVENT_DEV_OPEN, &amp;dev-&gt;flags))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	if (test_and_clear_bit(EVENT_LINK_CARRIER_ON, &amp;dev-&gt;flags))</div><div class='add'>+		netif_carrier_on(dev-&gt;net);</div><div class='add'>+</div><div class='ctx'> 	if (!netif_carrier_ok(dev-&gt;net)) {</div><div class='ctx'> 		/* kill URBs for reading packets to save bus bandwidth */</div><div class='ctx'> 		unlink_urbs(dev, &amp;dev-&gt;rxq);</div><div class='hunk'>@@ -1112,7 +1143,7 @@ static void __handle_link_change(struct usbnet *dev)</div><div class='ctx'> 		 */</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* submitting URBs for reading packets */</div><div class='del'>-		tasklet_schedule(&amp;dev-&gt;bh);</div><div class='add'>+		queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* hard_mtu or rx_urb_size may change during link change */</div><div class='hunk'>@@ -1143,77 +1174,77 @@ static void __handle_set_rx_mode(struct usbnet *dev)</div><div class='ctx'>  * especially now that control transfers can be queued.</div><div class='ctx'>  */</div><div class='ctx'> static void</div><div class='del'>-usbnet_deferred_kevent (struct work_struct *work)</div><div class='add'>+usbnet_deferred_kevent(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet		*dev =</div><div class='ctx'> 		container_of(work, struct usbnet, kevent);</div><div class='ctx'> 	int			status;</div><div class='ctx'> </div><div class='ctx'> 	/* usb_clear_halt() needs a thread context */</div><div class='del'>-	if (test_bit (EVENT_TX_HALT, &amp;dev-&gt;flags)) {</div><div class='del'>-		unlink_urbs (dev, &amp;dev-&gt;txq);</div><div class='add'>+	if (test_bit(EVENT_TX_HALT, &amp;dev-&gt;flags)) {</div><div class='add'>+		unlink_urbs(dev, &amp;dev-&gt;txq);</div><div class='ctx'> 		status = usb_autopm_get_interface(dev-&gt;intf);</div><div class='ctx'> 		if (status &lt; 0)</div><div class='ctx'> 			goto fail_pipe;</div><div class='del'>-		status = usb_clear_halt (dev-&gt;udev, dev-&gt;out);</div><div class='add'>+		status = usb_clear_halt(dev-&gt;udev, dev-&gt;out);</div><div class='ctx'> 		usb_autopm_put_interface(dev-&gt;intf);</div><div class='ctx'> 		if (status &lt; 0 &amp;&amp;</div><div class='ctx'> 		    status != -EPIPE &amp;&amp;</div><div class='ctx'> 		    status != -ESHUTDOWN) {</div><div class='del'>-			if (netif_msg_tx_err (dev))</div><div class='add'>+			if (netif_msg_tx_err(dev))</div><div class='ctx'> fail_pipe:</div><div class='ctx'> 				netdev_err(dev-&gt;net, "can't clear tx halt, status %d\n",</div><div class='ctx'> 					   status);</div><div class='ctx'> 		} else {</div><div class='del'>-			clear_bit (EVENT_TX_HALT, &amp;dev-&gt;flags);</div><div class='add'>+			clear_bit(EVENT_TX_HALT, &amp;dev-&gt;flags);</div><div class='ctx'> 			if (status != -ESHUTDOWN)</div><div class='del'>-				netif_wake_queue (dev-&gt;net);</div><div class='add'>+				netif_wake_queue(dev-&gt;net);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	if (test_bit (EVENT_RX_HALT, &amp;dev-&gt;flags)) {</div><div class='del'>-		unlink_urbs (dev, &amp;dev-&gt;rxq);</div><div class='add'>+	if (test_bit(EVENT_RX_HALT, &amp;dev-&gt;flags)) {</div><div class='add'>+		unlink_urbs(dev, &amp;dev-&gt;rxq);</div><div class='ctx'> 		status = usb_autopm_get_interface(dev-&gt;intf);</div><div class='ctx'> 		if (status &lt; 0)</div><div class='ctx'> 			goto fail_halt;</div><div class='del'>-		status = usb_clear_halt (dev-&gt;udev, dev-&gt;in);</div><div class='add'>+		status = usb_clear_halt(dev-&gt;udev, dev-&gt;in);</div><div class='ctx'> 		usb_autopm_put_interface(dev-&gt;intf);</div><div class='ctx'> 		if (status &lt; 0 &amp;&amp;</div><div class='ctx'> 		    status != -EPIPE &amp;&amp;</div><div class='ctx'> 		    status != -ESHUTDOWN) {</div><div class='del'>-			if (netif_msg_rx_err (dev))</div><div class='add'>+			if (netif_msg_rx_err(dev))</div><div class='ctx'> fail_halt:</div><div class='ctx'> 				netdev_err(dev-&gt;net, "can't clear rx halt, status %d\n",</div><div class='ctx'> 					   status);</div><div class='ctx'> 		} else {</div><div class='del'>-			clear_bit (EVENT_RX_HALT, &amp;dev-&gt;flags);</div><div class='add'>+			clear_bit(EVENT_RX_HALT, &amp;dev-&gt;flags);</div><div class='ctx'> 			if (!usbnet_going_away(dev))</div><div class='del'>-				tasklet_schedule(&amp;dev-&gt;bh);</div><div class='add'>+				queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* tasklet could resubmit itself forever if memory is tight */</div><div class='del'>-	if (test_bit (EVENT_RX_MEMORY, &amp;dev-&gt;flags)) {</div><div class='add'>+	/* work could resubmit itself forever if memory is tight */</div><div class='add'>+	if (test_bit(EVENT_RX_MEMORY, &amp;dev-&gt;flags)) {</div><div class='ctx'> 		struct urb	*urb = NULL;</div><div class='ctx'> 		int resched = 1;</div><div class='ctx'> </div><div class='del'>-		if (netif_running (dev-&gt;net))</div><div class='del'>-			urb = usb_alloc_urb (0, GFP_KERNEL);</div><div class='add'>+		if (netif_running(dev-&gt;net))</div><div class='add'>+			urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 		else</div><div class='del'>-			clear_bit (EVENT_RX_MEMORY, &amp;dev-&gt;flags);</div><div class='add'>+			clear_bit(EVENT_RX_MEMORY, &amp;dev-&gt;flags);</div><div class='ctx'> 		if (urb != NULL) {</div><div class='del'>-			clear_bit (EVENT_RX_MEMORY, &amp;dev-&gt;flags);</div><div class='add'>+			clear_bit(EVENT_RX_MEMORY, &amp;dev-&gt;flags);</div><div class='ctx'> 			status = usb_autopm_get_interface(dev-&gt;intf);</div><div class='ctx'> 			if (status &lt; 0) {</div><div class='ctx'> 				usb_free_urb(urb);</div><div class='ctx'> 				goto fail_lowmem;</div><div class='ctx'> 			}</div><div class='del'>-			if (rx_submit (dev, urb, GFP_KERNEL) == -ENOLINK)</div><div class='add'>+			if (rx_submit(dev, urb, GFP_KERNEL) == -ENOLINK)</div><div class='ctx'> 				resched = 0;</div><div class='ctx'> 			usb_autopm_put_interface(dev-&gt;intf);</div><div class='ctx'> fail_lowmem:</div><div class='ctx'> 			if (resched)</div><div class='ctx'> 				if (!usbnet_going_away(dev))</div><div class='del'>-					tasklet_schedule(&amp;dev-&gt;bh);</div><div class='add'>+					queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1221,7 +1252,7 @@ fail_lowmem:</div><div class='ctx'> 		const struct driver_info *info = dev-&gt;driver_info;</div><div class='ctx'> 		int			retval = 0;</div><div class='ctx'> </div><div class='del'>-		clear_bit (EVENT_LINK_RESET, &amp;dev-&gt;flags);</div><div class='add'>+		clear_bit(EVENT_LINK_RESET, &amp;dev-&gt;flags);</div><div class='ctx'> 		status = usb_autopm_get_interface(dev-&gt;intf);</div><div class='ctx'> 		if (status &lt; 0)</div><div class='ctx'> 			goto skip_reset;</div><div class='hunk'>@@ -1241,10 +1272,10 @@ skip_reset:</div><div class='ctx'> 		__handle_link_change(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (test_bit (EVENT_LINK_CHANGE, &amp;dev-&gt;flags))</div><div class='add'>+	if (test_bit(EVENT_LINK_CHANGE, &amp;dev-&gt;flags))</div><div class='ctx'> 		__handle_link_change(dev);</div><div class='ctx'> </div><div class='del'>-	if (test_bit (EVENT_SET_RX_MODE, &amp;dev-&gt;flags))</div><div class='add'>+	if (test_bit(EVENT_SET_RX_MODE, &amp;dev-&gt;flags))</div><div class='ctx'> 		__handle_set_rx_mode(dev);</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1254,7 +1285,7 @@ skip_reset:</div><div class='ctx'> </div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='del'>-static void tx_complete (struct urb *urb)</div><div class='add'>+static void tx_complete(struct urb *urb)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff		*skb = (struct sk_buff *) urb-&gt;context;</div><div class='ctx'> 	struct skb_data		*entry = (struct skb_data *) skb-&gt;cb;</div><div class='hunk'>@@ -1273,7 +1304,7 @@ static void tx_complete (struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> 		switch (urb-&gt;status) {</div><div class='ctx'> 		case -EPIPE:</div><div class='del'>-			usbnet_defer_kevent (dev, EVENT_TX_HALT);</div><div class='add'>+			usbnet_defer_kevent(dev, EVENT_TX_HALT);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		/* software-driven interface shutdown */</div><div class='hunk'>@@ -1288,13 +1319,13 @@ static void tx_complete (struct urb *urb)</div><div class='ctx'> 		case -ETIME:</div><div class='ctx'> 		case -EILSEQ:</div><div class='ctx'> 			usb_mark_last_busy(dev-&gt;udev);</div><div class='del'>-			if (!timer_pending (&amp;dev-&gt;delay)) {</div><div class='del'>-				mod_timer (&amp;dev-&gt;delay,</div><div class='del'>-					jiffies + THROTTLE_JIFFIES);</div><div class='add'>+			if (!timer_pending(&amp;dev-&gt;delay)) {</div><div class='add'>+				mod_timer(&amp;dev-&gt;delay,</div><div class='add'>+					  jiffies + THROTTLE_JIFFIES);</div><div class='ctx'> 				netif_dbg(dev, link, dev-&gt;net,</div><div class='ctx'> 					  "tx throttle %d\n", urb-&gt;status);</div><div class='ctx'> 			}</div><div class='del'>-			netif_stop_queue (dev-&gt;net);</div><div class='add'>+			netif_stop_queue(dev-&gt;net);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			netif_dbg(dev, tx_err, dev-&gt;net,</div><div class='hunk'>@@ -1309,12 +1340,12 @@ static void tx_complete (struct urb *urb)</div><div class='ctx'> </div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='del'>-void usbnet_tx_timeout (struct net_device *net, unsigned int txqueue)</div><div class='add'>+void usbnet_tx_timeout(struct net_device *net, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet		*dev = netdev_priv(net);</div><div class='ctx'> </div><div class='del'>-	unlink_urbs (dev, &amp;dev-&gt;txq);</div><div class='del'>-	tasklet_schedule (&amp;dev-&gt;bh);</div><div class='add'>+	unlink_urbs(dev, &amp;dev-&gt;txq);</div><div class='add'>+	queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='ctx'> 	/* this needs to be handled individually because the generic layer</div><div class='ctx'> 	 * doesn't know what is sufficient and could not restore private</div><div class='ctx'> 	 * information if a remedy of an unconditional reset were used.</div><div class='hunk'>@@ -1359,8 +1390,7 @@ static int build_dma_sg(const struct sk_buff *skb, struct urb *urb)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-netdev_tx_t usbnet_start_xmit (struct sk_buff *skb,</div><div class='del'>-				     struct net_device *net)</div><div class='add'>+netdev_tx_t usbnet_start_xmit(struct sk_buff *skb, struct net_device *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet		*dev = netdev_priv(net);</div><div class='ctx'> 	unsigned int			length;</div><div class='hunk'>@@ -1376,7 +1406,7 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb,</div><div class='ctx'> 	// some devices want funky USB-level framing, for</div><div class='ctx'> 	// win32 driver (usually) and/or hardware quirks</div><div class='ctx'> 	if (info-&gt;tx_fixup) {</div><div class='del'>-		skb = info-&gt;tx_fixup (dev, skb, GFP_ATOMIC);</div><div class='add'>+		skb = info-&gt;tx_fixup(dev, skb, GFP_ATOMIC);</div><div class='ctx'> 		if (!skb) {</div><div class='ctx'> 			/* packet collected; minidriver waiting for more */</div><div class='ctx'> 			if (info-&gt;flags &amp; FLAG_MULTI_PACKET)</div><div class='hunk'>@@ -1386,7 +1416,8 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!(urb = usb_alloc_urb (0, GFP_ATOMIC))) {</div><div class='add'>+	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='add'>+	if (!urb) {</div><div class='ctx'> 		netif_dbg(dev, tx_err, dev-&gt;net, "no urb\n");</div><div class='ctx'> 		goto drop;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1395,8 +1426,8 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb,</div><div class='ctx'> 	entry-&gt;urb = urb;</div><div class='ctx'> 	entry-&gt;dev = dev;</div><div class='ctx'> </div><div class='del'>-	usb_fill_bulk_urb (urb, dev-&gt;udev, dev-&gt;out,</div><div class='del'>-			skb-&gt;data, skb-&gt;len, tx_complete, skb);</div><div class='add'>+	usb_fill_bulk_urb(urb, dev-&gt;udev, dev-&gt;out,</div><div class='add'>+			  skb-&gt;data, skb-&gt;len, tx_complete, skb);</div><div class='ctx'> 	if (dev-&gt;can_dma_sg) {</div><div class='ctx'> 		if (build_dma_sg(skb, urb) &lt; 0)</div><div class='ctx'> 			goto drop;</div><div class='hunk'>@@ -1466,8 +1497,8 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	switch ((retval = usb_submit_urb (urb, GFP_ATOMIC))) {</div><div class='ctx'> 	case -EPIPE:</div><div class='del'>-		netif_stop_queue (net);</div><div class='del'>-		usbnet_defer_kevent (dev, EVENT_TX_HALT);</div><div class='add'>+		netif_stop_queue(net);</div><div class='add'>+		usbnet_defer_kevent(dev, EVENT_TX_HALT);</div><div class='ctx'> 		usb_autopm_put_interface_async(dev-&gt;intf);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -1478,10 +1509,11 @@ netdev_tx_t usbnet_start_xmit (struct sk_buff *skb,</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		netif_trans_update(net);</div><div class='ctx'> 		__usbnet_queue_skb(&amp;dev-&gt;txq, skb, tx_start);</div><div class='add'>+		netdev_sent_queue(net, skb-&gt;len);</div><div class='ctx'> 		if (dev-&gt;txq.qlen &gt;= TX_QLEN (dev))</div><div class='ctx'> 			netif_stop_queue (net);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore (&amp;dev-&gt;txq.lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;dev-&gt;txq.lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	if (retval) {</div><div class='ctx'> 		netif_dbg(dev, tx_err, dev-&gt;net, "drop, code %d\n", retval);</div><div class='hunk'>@@ -1489,7 +1521,7 @@ drop:</div><div class='ctx'> 		dev-&gt;net-&gt;stats.tx_dropped++;</div><div class='ctx'> not_drop:</div><div class='ctx'> 		if (skb)</div><div class='del'>-			dev_kfree_skb_any (skb);</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='ctx'> 		if (urb) {</div><div class='ctx'> 			kfree(urb-&gt;sg);</div><div class='ctx'> 			usb_free_urb(urb);</div><div class='hunk'>@@ -1536,11 +1568,12 @@ static inline void usb_free_skb(struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> /*-------------------------------------------------------------------------*/</div><div class='ctx'> </div><div class='del'>-// tasklet (work deferred from completions, in_irq) or timer</div><div class='add'>+// work (work deferred from completions, in_irq) or timer</div><div class='ctx'> </div><div class='del'>-static void usbnet_bh (struct timer_list *t)</div><div class='add'>+static void usbnet_bh(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct usbnet		*dev = from_timer(dev, t, delay);</div><div class='add'>+	struct usbnet		*dev = timer_container_of(dev, t, delay);</div><div class='add'>+	unsigned int bytes_compl = 0, pkts_compl = 0;</div><div class='ctx'> 	struct sk_buff		*skb;</div><div class='ctx'> 	struct skb_data		*entry;</div><div class='ctx'> </div><div class='hunk'>@@ -1552,6 +1585,8 @@ static void usbnet_bh (struct timer_list *t)</div><div class='ctx'> 				usb_free_skb(skb);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		case tx_done:</div><div class='add'>+			bytes_compl += skb-&gt;len;</div><div class='add'>+			pkts_compl++;</div><div class='ctx'> 			kfree(entry-&gt;urb-&gt;sg);</div><div class='ctx'> 			fallthrough;</div><div class='ctx'> 		case rx_cleanup:</div><div class='hunk'>@@ -1562,6 +1597,10 @@ static void usbnet_bh (struct timer_list *t)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;dev-&gt;bql_spinlock);</div><div class='add'>+	netdev_completed_queue(dev-&gt;net, pkts_compl, bytes_compl);</div><div class='add'>+	spin_unlock_bh(&amp;dev-&gt;bql_spinlock);</div><div class='add'>+</div><div class='ctx'> 	/* restart RX again after disabling due to high error rate */</div><div class='ctx'> 	clear_bit(EVENT_RX_KILL, &amp;dev-&gt;flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1590,16 +1629,16 @@ static void usbnet_bh (struct timer_list *t)</div><div class='ctx'> 					  "rxqlen %d --&gt; %d\n",</div><div class='ctx'> 					  temp, dev-&gt;rxq.qlen);</div><div class='ctx'> 			if (dev-&gt;rxq.qlen &lt; RX_QLEN(dev))</div><div class='del'>-				tasklet_schedule (&amp;dev-&gt;bh);</div><div class='add'>+				queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (dev-&gt;txq.qlen &lt; TX_QLEN (dev))</div><div class='del'>-			netif_wake_queue (dev-&gt;net);</div><div class='add'>+			netif_wake_queue(dev-&gt;net);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void usbnet_bh_tasklet(struct tasklet_struct *t)</div><div class='add'>+static void usbnet_bh_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct usbnet *dev = from_tasklet(dev, t, bh);</div><div class='add'>+	struct usbnet *dev = from_work(dev, work, bh_work);</div><div class='ctx'> </div><div class='ctx'> 	usbnet_bh(&amp;dev-&gt;delay);</div><div class='ctx'> }</div><div class='hunk'>@@ -1613,7 +1652,7 @@ static void usbnet_bh_tasklet(struct tasklet_struct *t)</div><div class='ctx'> </div><div class='ctx'> // precondition: never called in_interrupt</div><div class='ctx'> </div><div class='del'>-void usbnet_disconnect (struct usb_interface *intf)</div><div class='add'>+void usbnet_disconnect(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet		*dev;</div><div class='ctx'> 	struct usb_device	*xdev;</div><div class='hunk'>@@ -1626,7 +1665,7 @@ void usbnet_disconnect (struct usb_interface *intf)</div><div class='ctx'> 		return;</div><div class='ctx'> 	usbnet_mark_going_away(dev);</div><div class='ctx'> </div><div class='del'>-	xdev = interface_to_usbdev (intf);</div><div class='add'>+	xdev = interface_to_usbdev(intf);</div><div class='ctx'> </div><div class='ctx'> 	netif_info(dev, probe, dev-&gt;net, "unregister '%s' usb-%s-%s, %s\n",</div><div class='ctx'> 		   intf-&gt;dev.driver-&gt;name,</div><div class='hunk'>@@ -1634,7 +1673,9 @@ void usbnet_disconnect (struct usb_interface *intf)</div><div class='ctx'> 		   dev-&gt;driver_info-&gt;description);</div><div class='ctx'> </div><div class='ctx'> 	net = dev-&gt;net;</div><div class='del'>-	unregister_netdev (net);</div><div class='add'>+	unregister_netdev(net);</div><div class='add'>+</div><div class='add'>+	cancel_work_sync(&amp;dev-&gt;kevent);</div><div class='ctx'> </div><div class='ctx'> 	while ((urb = usb_get_from_anchor(&amp;dev-&gt;deferred))) {</div><div class='ctx'> 		dev_kfree_skb(urb-&gt;context);</div><div class='hunk'>@@ -1677,7 +1718,7 @@ static const struct device_type wwan_type = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int</div><div class='del'>-usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='add'>+usbnet_probe(struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet			*dev;</div><div class='ctx'> 	struct net_device		*net;</div><div class='hunk'>@@ -1703,7 +1744,7 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> 		dev_dbg (&amp;udev-&gt;dev, "blacklisted by %s\n", name);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-	xdev = interface_to_usbdev (udev);</div><div class='add'>+	xdev = interface_to_usbdev(udev);</div><div class='ctx'> 	interface = udev-&gt;cur_altsetting;</div><div class='ctx'> </div><div class='ctx'> 	status = -ENOMEM;</div><div class='hunk'>@@ -1731,11 +1772,12 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> 	skb_queue_head_init (&amp;dev-&gt;txq);</div><div class='ctx'> 	skb_queue_head_init (&amp;dev-&gt;done);</div><div class='ctx'> 	skb_queue_head_init(&amp;dev-&gt;rxq_pause);</div><div class='del'>-	tasklet_setup(&amp;dev-&gt;bh, usbnet_bh_tasklet);</div><div class='del'>-	INIT_WORK (&amp;dev-&gt;kevent, usbnet_deferred_kevent);</div><div class='add'>+	spin_lock_init(&amp;dev-&gt;bql_spinlock);</div><div class='add'>+	INIT_WORK(&amp;dev-&gt;bh_work, usbnet_bh_work);</div><div class='add'>+	INIT_WORK(&amp;dev-&gt;kevent, usbnet_deferred_kevent);</div><div class='ctx'> 	init_usb_anchor(&amp;dev-&gt;deferred);</div><div class='ctx'> 	timer_setup(&amp;dev-&gt;delay, usbnet_bh, 0);</div><div class='del'>-	mutex_init (&amp;dev-&gt;phy_mutex);</div><div class='add'>+	mutex_init(&amp;dev-&gt;phy_mutex);</div><div class='ctx'> 	mutex_init(&amp;dev-&gt;interrupt_mutex);</div><div class='ctx'> 	dev-&gt;interrupt_count = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1748,7 +1790,6 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> 	dev-&gt;hard_mtu = net-&gt;mtu + net-&gt;hard_header_len;</div><div class='ctx'> 	net-&gt;min_mtu = 0;</div><div class='ctx'> 	net-&gt;max_mtu = ETH_MAX_MTU;</div><div class='del'>-	net-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;</div><div class='ctx'> </div><div class='ctx'> 	net-&gt;netdev_ops = &amp;usbnet_netdev_ops;</div><div class='ctx'> 	net-&gt;watchdog_timeo = TX_TIMEOUT_JIFFIES;</div><div class='hunk'>@@ -1758,17 +1799,15 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> 	// allow device-specific bind/init procedures</div><div class='ctx'> 	// NOTE net-&gt;name still not usable ...</div><div class='ctx'> 	if (info-&gt;bind) {</div><div class='del'>-		status = info-&gt;bind (dev, udev);</div><div class='add'>+		status = info-&gt;bind(dev, udev);</div><div class='ctx'> 		if (status &lt; 0)</div><div class='ctx'> 			goto out1;</div><div class='ctx'> </div><div class='del'>-		// heuristic:  "usb%d" for links we know are two-host,</div><div class='del'>-		// else "eth%d" when there's reasonable doubt.  userspace</div><div class='del'>-		// can rename the link if it knows better.</div><div class='add'>+		/* heuristic: rename to "eth%d" if we are not sure this link</div><div class='add'>+		 * is two-host (these links keep "usb%d")</div><div class='add'>+		 */</div><div class='ctx'> 		if ((dev-&gt;driver_info-&gt;flags &amp; FLAG_ETHER) != 0 &amp;&amp;</div><div class='del'>-		    ((dev-&gt;driver_info-&gt;flags &amp; FLAG_POINTTOPOINT) == 0 ||</div><div class='del'>-		     /* somebody touched it*/</div><div class='del'>-		     !is_zero_ether_addr(net-&gt;dev_addr)))</div><div class='add'>+		    !usbnet_needs_usb_name_format(dev, net))</div><div class='ctx'> 			strscpy(net-&gt;name, "eth%d", sizeof(net-&gt;name));</div><div class='ctx'> 		/* WLAN devices should always be named "wlan%d" */</div><div class='ctx'> 		if ((dev-&gt;driver_info-&gt;flags &amp; FLAG_WLAN) != 0)</div><div class='hunk'>@@ -1785,18 +1824,18 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> 		if (net-&gt;mtu &gt; (dev-&gt;hard_mtu - net-&gt;hard_header_len))</div><div class='ctx'> 			net-&gt;mtu = dev-&gt;hard_mtu - net-&gt;hard_header_len;</div><div class='ctx'> 	} else if (!info-&gt;in || !info-&gt;out)</div><div class='del'>-		status = usbnet_get_endpoints (dev, udev);</div><div class='add'>+		status = usbnet_get_endpoints(dev, udev);</div><div class='ctx'> 	else {</div><div class='ctx'> 		u8 ep_addrs[3] = {</div><div class='ctx'> 			info-&gt;in + USB_DIR_IN, info-&gt;out + USB_DIR_OUT, 0</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='del'>-		dev-&gt;in = usb_rcvbulkpipe (xdev, info-&gt;in);</div><div class='del'>-		dev-&gt;out = usb_sndbulkpipe (xdev, info-&gt;out);</div><div class='add'>+		dev-&gt;in = usb_rcvbulkpipe(xdev, info-&gt;in);</div><div class='add'>+		dev-&gt;out = usb_sndbulkpipe(xdev, info-&gt;out);</div><div class='ctx'> 		if (!(info-&gt;flags &amp; FLAG_NO_SETINT))</div><div class='del'>-			status = usb_set_interface (xdev,</div><div class='del'>-				interface-&gt;desc.bInterfaceNumber,</div><div class='del'>-				interface-&gt;desc.bAlternateSetting);</div><div class='add'>+			status = usb_set_interface(xdev,</div><div class='add'>+						   interface-&gt;desc.bInterfaceNumber,</div><div class='add'>+						   interface-&gt;desc.bAlternateSetting);</div><div class='ctx'> 		else</div><div class='ctx'> 			status = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1804,7 +1843,7 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> 			status = -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (status &gt;= 0 &amp;&amp; dev-&gt;status)</div><div class='del'>-		status = init_status (dev, udev);</div><div class='add'>+		status = init_status(dev, udev);</div><div class='ctx'> 	if (status &lt; 0)</div><div class='ctx'> 		goto out3;</div><div class='ctx'> </div><div class='hunk'>@@ -1838,7 +1877,7 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	status = register_netdev (net);</div><div class='add'>+	status = register_netdev(net);</div><div class='ctx'> 	if (status)</div><div class='ctx'> 		goto out5;</div><div class='ctx'> 	netif_info(dev, probe, dev-&gt;net,</div><div class='hunk'>@@ -1849,9 +1888,9 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)</div><div class='ctx'> 		   net-&gt;dev_addr);</div><div class='ctx'> </div><div class='ctx'> 	// ok, it's ready to go.</div><div class='del'>-	usb_set_intfdata (udev, dev);</div><div class='add'>+	usb_set_intfdata(udev, dev);</div><div class='ctx'> </div><div class='del'>-	netif_device_attach (net);</div><div class='add'>+	netif_device_attach(net);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;driver_info-&gt;flags &amp; FLAG_LINK_INTR)</div><div class='ctx'> 		usbnet_link_change(dev, 0, 0);</div><div class='hunk'>@@ -1864,7 +1903,7 @@ out4:</div><div class='ctx'> 	usb_free_urb(dev-&gt;interrupt);</div><div class='ctx'> out3:</div><div class='ctx'> 	if (info-&gt;unbind)</div><div class='del'>-		info-&gt;unbind (dev, udev);</div><div class='add'>+		info-&gt;unbind(dev, udev);</div><div class='ctx'> out1:</div><div class='ctx'> 	/* subdrivers must undo all they did in bind() if they</div><div class='ctx'> 	 * fail it, but we may fail later and a deferred kevent</div><div class='hunk'>@@ -1873,7 +1912,7 @@ out1:</div><div class='ctx'> 	 */</div><div class='ctx'> 	usbnet_mark_going_away(dev);</div><div class='ctx'> 	cancel_work_sync(&amp;dev-&gt;kevent);</div><div class='del'>-	del_timer_sync(&amp;dev-&gt;delay);</div><div class='add'>+	timer_delete_sync(&amp;dev-&gt;delay);</div><div class='ctx'> 	free_netdev(net);</div><div class='ctx'> out:</div><div class='ctx'> 	return status;</div><div class='hunk'>@@ -1887,7 +1926,7 @@ EXPORT_SYMBOL_GPL(usbnet_probe);</div><div class='ctx'>  * resume only when the last interface is resumed</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-int usbnet_suspend (struct usb_interface *intf, pm_message_t message)</div><div class='add'>+int usbnet_suspend(struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet		*dev = usb_get_intfdata(intf);</div><div class='ctx'> </div><div class='hunk'>@@ -1906,7 +1945,7 @@ int usbnet_suspend (struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> 		 * accelerate emptying of the rx and queues, to avoid</div><div class='ctx'> 		 * having everything error out.</div><div class='ctx'> 		 */</div><div class='del'>-		netif_device_detach (dev-&gt;net);</div><div class='add'>+		netif_device_detach(dev-&gt;net);</div><div class='ctx'> 		usbnet_terminate_urbs(dev);</div><div class='ctx'> 		__usbnet_status_stop_force(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1914,13 +1953,13 @@ int usbnet_suspend (struct usb_interface *intf, pm_message_t message)</div><div class='ctx'> 		 * reattach so runtime management can use and</div><div class='ctx'> 		 * wake the device</div><div class='ctx'> 		 */</div><div class='del'>-		netif_device_attach (dev-&gt;net);</div><div class='add'>+		netif_device_attach(dev-&gt;net);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(usbnet_suspend);</div><div class='ctx'> </div><div class='del'>-int usbnet_resume (struct usb_interface *intf)</div><div class='add'>+int usbnet_resume(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct usbnet		*dev = usb_get_intfdata(intf);</div><div class='ctx'> 	struct sk_buff          *skb;</div><div class='hunk'>@@ -1962,7 +2001,7 @@ int usbnet_resume (struct usb_interface *intf)</div><div class='ctx'> </div><div class='ctx'> 			if (!(dev-&gt;txq.qlen &gt;= TX_QLEN(dev)))</div><div class='ctx'> 				netif_tx_wake_all_queues(dev-&gt;net);</div><div class='del'>-			tasklet_schedule (&amp;dev-&gt;bh);</div><div class='add'>+			queue_work(system_bh_wq, &amp;dev-&gt;bh_work);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2000,10 +2039,12 @@ EXPORT_SYMBOL(usbnet_manage_power);</div><div class='ctx'> void usbnet_link_change(struct usbnet *dev, bool link, bool need_reset)</div><div class='ctx'> {</div><div class='ctx'> 	/* update link after link is reseted */</div><div class='del'>-	if (link &amp;&amp; !need_reset)</div><div class='del'>-		netif_carrier_on(dev-&gt;net);</div><div class='del'>-	else</div><div class='add'>+	if (link &amp;&amp; !need_reset) {</div><div class='add'>+		set_bit(EVENT_LINK_CARRIER_ON, &amp;dev-&gt;flags);</div><div class='add'>+	} else {</div><div class='add'>+		clear_bit(EVENT_LINK_CARRIER_ON, &amp;dev-&gt;flags);</div><div class='ctx'> 		netif_carrier_off(dev-&gt;net);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (need_reset &amp;&amp; link)</div><div class='ctx'> 		usbnet_defer_kevent(dev, EVENT_LINK_RESET);</div><div class='head'>diff --git a/drivers/net/veth.c b/drivers/net/veth.c<br/>index 18148e068aa0..14e6f2a2fb77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/veth.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/veth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/veth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/veth.c</a></div><div class='hunk'>@@ -17,6 +17,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;net/dst.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/xfrm.h&gt;</div><div class='ctx'> #include &lt;net/xdp.h&gt;</div><div class='ctx'> #include &lt;linux/veth.h&gt;</div><div class='hunk'>@@ -306,12 +307,10 @@ static void __veth_xdp_flush(struct veth_rq *rq)</div><div class='ctx'> </div><div class='ctx'> static int veth_xdp_rx(struct veth_rq *rq, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	if (unlikely(ptr_ring_produce(&amp;rq-&gt;xdp_ring, skb))) {</div><div class='del'>-		dev_kfree_skb_any(skb);</div><div class='del'>-		return NET_RX_DROP;</div><div class='del'>-	}</div><div class='add'>+	if (unlikely(ptr_ring_produce(&amp;rq-&gt;xdp_ring, skb)))</div><div class='add'>+		return NETDEV_TX_BUSY; /* signal qdisc layer */</div><div class='ctx'> </div><div class='del'>-	return NET_RX_SUCCESS;</div><div class='add'>+	return NET_RX_SUCCESS; /* same as NETDEV_TX_OK */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int veth_forward_skb(struct net_device *dev, struct sk_buff *skb,</div><div class='hunk'>@@ -345,11 +344,11 @@ static netdev_tx_t veth_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct veth_priv *rcv_priv, *priv = netdev_priv(dev);</div><div class='ctx'> 	struct veth_rq *rq = NULL;</div><div class='del'>-	int ret = NETDEV_TX_OK;</div><div class='add'>+	struct netdev_queue *txq;</div><div class='ctx'> 	struct net_device *rcv;</div><div class='ctx'> 	int length = skb-&gt;len;</div><div class='ctx'> 	bool use_napi = false;</div><div class='del'>-	int rxq;</div><div class='add'>+	int ret, rxq;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	rcv = rcu_dereference(priv-&gt;peer);</div><div class='hunk'>@@ -372,17 +371,43 @@ static netdev_tx_t veth_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='del'>-	if (likely(veth_forward_skb(rcv, skb, rq, use_napi) == NET_RX_SUCCESS)) {</div><div class='add'>+</div><div class='add'>+	ret = veth_forward_skb(rcv, skb, rq, use_napi);</div><div class='add'>+	switch (ret) {</div><div class='add'>+	case NET_RX_SUCCESS: /* same as NETDEV_TX_OK */</div><div class='ctx'> 		if (!use_napi)</div><div class='ctx'> 			dev_sw_netstats_tx_add(dev, 1, length);</div><div class='ctx'> 		else</div><div class='ctx'> 			__veth_xdp_flush(rq);</div><div class='del'>-	} else {</div><div class='add'>+		break;</div><div class='add'>+	case NETDEV_TX_BUSY:</div><div class='add'>+		/* If a qdisc is attached to our virtual device, returning</div><div class='add'>+		 * NETDEV_TX_BUSY is allowed.</div><div class='add'>+		 */</div><div class='add'>+		txq = netdev_get_tx_queue(dev, rxq);</div><div class='add'>+</div><div class='add'>+		if (qdisc_txq_has_no_queue(txq)) {</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+			goto drop;</div><div class='add'>+		}</div><div class='add'>+		/* Restore Eth hdr pulled by dev_forward_skb/eth_type_trans */</div><div class='add'>+		__skb_push(skb, ETH_HLEN);</div><div class='add'>+		netif_tx_stop_queue(txq);</div><div class='add'>+		/* Makes sure NAPI peer consumer runs. Consumer is responsible</div><div class='add'>+		 * for starting txq again, until then ndo_start_xmit (this</div><div class='add'>+		 * function) will not be invoked by the netstack again.</div><div class='add'>+		 */</div><div class='add'>+		__veth_xdp_flush(rq);</div><div class='add'>+		break;</div><div class='add'>+	case NET_RX_DROP: /* same as NET_XMIT_DROP */</div><div class='ctx'> drop:</div><div class='ctx'> 		atomic64_inc(&amp;priv-&gt;dropped);</div><div class='ctx'> 		ret = NET_XMIT_DROP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		net_crit_ratelimited("%s(%s): Invalid return code(%d)",</div><div class='add'>+				     __func__, dev-&gt;name, ret);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -634,7 +659,7 @@ static struct xdp_frame *veth_xdp_rcv_one(struct veth_rq *rq,</div><div class='ctx'> 			break;</div><div class='ctx'> 		case XDP_TX:</div><div class='ctx'> 			orig_frame = *frame;</div><div class='del'>-			xdp-&gt;rxq-&gt;mem = frame-&gt;mem;</div><div class='add'>+			xdp-&gt;rxq-&gt;mem.type = frame-&gt;mem_type;</div><div class='ctx'> 			if (unlikely(veth_xdp_tx(rq, xdp, bq) &lt; 0)) {</div><div class='ctx'> 				trace_xdp_exception(rq-&gt;dev, xdp_prog, act);</div><div class='ctx'> 				frame = &amp;orig_frame;</div><div class='hunk'>@@ -646,7 +671,7 @@ static struct xdp_frame *veth_xdp_rcv_one(struct veth_rq *rq,</div><div class='ctx'> 			goto xdp_xmit;</div><div class='ctx'> 		case XDP_REDIRECT:</div><div class='ctx'> 			orig_frame = *frame;</div><div class='del'>-			xdp-&gt;rxq-&gt;mem = frame-&gt;mem;</div><div class='add'>+			xdp-&gt;rxq-&gt;mem.type = frame-&gt;mem_type;</div><div class='ctx'> 			if (xdp_do_redirect(rq-&gt;dev, xdp, xdp_prog)) {</div><div class='ctx'> 				frame = &amp;orig_frame;</div><div class='ctx'> 				stats-&gt;rx_drops++;</div><div class='hunk'>@@ -684,8 +709,7 @@ static void veth_xdp_rcv_bulk_skb(struct veth_rq *rq, void **frames,</div><div class='ctx'> 	void *skbs[VETH_XDP_BATCH];</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (xdp_alloc_skb_bulk(skbs, n_xdpf,</div><div class='del'>-			       GFP_ATOMIC | __GFP_ZERO) &lt; 0) {</div><div class='add'>+	if (unlikely(!napi_skb_cache_get_bulk(skbs, n_xdpf))) {</div><div class='ctx'> 		for (i = 0; i &lt; n_xdpf; i++)</div><div class='ctx'> 			xdp_return_frame(frames[i]);</div><div class='ctx'> 		stats-&gt;rx_drops += n_xdpf;</div><div class='hunk'>@@ -932,17 +956,28 @@ static int veth_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct veth_rq *rq =</div><div class='ctx'> 		container_of(napi, struct veth_rq, xdp_napi);</div><div class='add'>+	struct veth_priv *priv = netdev_priv(rq-&gt;dev);</div><div class='add'>+	int queue_idx = rq-&gt;xdp_rxq.queue_index;</div><div class='add'>+	struct netdev_queue *peer_txq;</div><div class='ctx'> 	struct veth_stats stats = {};</div><div class='add'>+	struct net_device *peer_dev;</div><div class='ctx'> 	struct veth_xdp_tx_bq bq;</div><div class='ctx'> 	int done;</div><div class='ctx'> </div><div class='ctx'> 	bq.count = 0;</div><div class='ctx'> </div><div class='add'>+	/* NAPI functions as RCU section */</div><div class='add'>+	peer_dev = rcu_dereference_check(priv-&gt;peer, rcu_read_lock_bh_held());</div><div class='add'>+	peer_txq = peer_dev ? netdev_get_tx_queue(peer_dev, queue_idx) : NULL;</div><div class='add'>+</div><div class='ctx'> 	xdp_set_return_frame_no_direct();</div><div class='ctx'> 	done = veth_xdp_rcv(rq, budget, &amp;bq, &amp;stats);</div><div class='ctx'> </div><div class='ctx'> 	if (stats.xdp_redirect &gt; 0)</div><div class='ctx'> 		xdp_do_flush();</div><div class='add'>+	if (stats.xdp_tx &gt; 0)</div><div class='add'>+		veth_xdp_flush(rq, &amp;bq);</div><div class='add'>+	xdp_clear_return_frame_no_direct();</div><div class='ctx'> </div><div class='ctx'> 	if (done &lt; budget &amp;&amp; napi_complete_done(napi, done)) {</div><div class='ctx'> 		/* Write rx_notify_masked before reading ptr_ring */</div><div class='hunk'>@@ -955,9 +990,12 @@ static int veth_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (stats.xdp_tx &gt; 0)</div><div class='del'>-		veth_xdp_flush(rq, &amp;bq);</div><div class='del'>-	xdp_clear_return_frame_no_direct();</div><div class='add'>+	/* Release backpressure per NAPI poll */</div><div class='add'>+	smp_rmb(); /* Paired with netif_tx_stop_queue set_bit */</div><div class='add'>+	if (peer_txq &amp;&amp; netif_tx_queue_stopped(peer_txq)) {</div><div class='add'>+		txq_trans_cond_update(peer_txq);</div><div class='add'>+		netif_tx_wake_queue(peer_txq);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return done;</div><div class='ctx'> }</div><div class='hunk'>@@ -1286,7 +1324,7 @@ static int veth_set_channels(struct net_device *dev,</div><div class='ctx'> 		if (peer)</div><div class='ctx'> 			netif_carrier_off(peer);</div><div class='ctx'> </div><div class='del'>-		/* try to allocate new resurces, as needed*/</div><div class='add'>+		/* try to allocate new resources, as needed*/</div><div class='ctx'> 		err = veth_enable_range_safe(dev, old_rx_count, new_rx_count);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -1765,10 +1803,13 @@ static int veth_init_queues(struct net_device *dev, struct nlattr *tb[])</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int veth_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-			struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int veth_newlink(struct net_device *dev,</div><div class='add'>+			struct rtnl_newlink_params *params,</div><div class='ctx'> 			struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *peer_net = rtnl_newlink_peer_net(params);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	struct net_device *peer;</div><div class='ctx'> 	struct veth_priv *priv;</div><div class='hunk'>@@ -1776,24 +1817,15 @@ static int veth_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	struct nlattr *peer_tb[IFLA_MAX + 1], **tbp;</div><div class='ctx'> 	unsigned char name_assign_type;</div><div class='ctx'> 	struct ifinfomsg *ifmp;</div><div class='del'>-	struct net *net;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * create and register peer first</div><div class='ctx'> 	 */</div><div class='del'>-	if (data != NULL &amp;&amp; data[VETH_INFO_PEER] != NULL) {</div><div class='del'>-		struct nlattr *nla_peer;</div><div class='add'>+	if (data &amp;&amp; data[VETH_INFO_PEER]) {</div><div class='add'>+		struct nlattr *nla_peer = data[VETH_INFO_PEER];</div><div class='ctx'> </div><div class='del'>-		nla_peer = data[VETH_INFO_PEER];</div><div class='ctx'> 		ifmp = nla_data(nla_peer);</div><div class='del'>-		err = rtnl_nla_parse_ifinfomsg(peer_tb, nla_peer, extack);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		err = veth_validate(peer_tb, NULL, extack);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='add'>+		rtnl_nla_parse_ifinfomsg(peer_tb, nla_peer, extack);</div><div class='ctx'> 		tbp = peer_tb;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ifmp = NULL;</div><div class='hunk'>@@ -1808,16 +1840,10 @@ static int veth_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 		name_assign_type = NET_NAME_ENUM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	net = rtnl_link_get_net(src_net, tbp);</div><div class='del'>-	if (IS_ERR(net))</div><div class='del'>-		return PTR_ERR(net);</div><div class='del'>-</div><div class='del'>-	peer = rtnl_create_link(net, ifname, name_assign_type,</div><div class='add'>+	peer = rtnl_create_link(peer_net, ifname, name_assign_type,</div><div class='ctx'> 				&amp;veth_link_ops, tbp, extack);</div><div class='del'>-	if (IS_ERR(peer)) {</div><div class='del'>-		put_net(net);</div><div class='add'>+	if (IS_ERR(peer))</div><div class='ctx'> 		return PTR_ERR(peer);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (!ifmp || !tbp[IFLA_ADDRESS])</div><div class='ctx'> 		eth_hw_addr_random(peer);</div><div class='hunk'>@@ -1828,8 +1854,6 @@ static int veth_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	netif_inherit_tso_max(peer, dev);</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdevice(peer);</div><div class='del'>-	put_net(net);</div><div class='del'>-	net = NULL;</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto err_register_peer;</div><div class='ctx'> </div><div class='hunk'>@@ -1952,6 +1976,7 @@ static struct rtnl_link_ops veth_link_ops = {</div><div class='ctx'> 	.newlink	= veth_newlink,</div><div class='ctx'> 	.dellink	= veth_dellink,</div><div class='ctx'> 	.policy		= veth_policy,</div><div class='add'>+	.peer_type	= VETH_INFO_PEER,</div><div class='ctx'> 	.maxtype	= VETH_INFO_MAX,</div><div class='ctx'> 	.get_link_net	= veth_get_link_net,</div><div class='ctx'> 	.get_num_tx_queues	= veth_get_num_queues,</div><div class='head'>diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c<br/>index 869586c17ffd..1bb3aeca66c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/virtio_net.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/virtio_net.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/virtio_net.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/virtio_net.c</a></div><div class='hunk'>@@ -35,6 +35,23 @@ module_param(csum, bool, 0444);</div><div class='ctx'> module_param(gso, bool, 0444);</div><div class='ctx'> module_param(napi_tx, bool, 0644);</div><div class='ctx'> </div><div class='add'>+#define VIRTIO_OFFLOAD_MAP_MIN	46</div><div class='add'>+#define VIRTIO_OFFLOAD_MAP_MAX	47</div><div class='add'>+#define VIRTIO_FEATURES_MAP_MIN	65</div><div class='add'>+#define VIRTIO_O2F_DELTA	(VIRTIO_FEATURES_MAP_MIN - \</div><div class='add'>+				 VIRTIO_OFFLOAD_MAP_MIN)</div><div class='add'>+</div><div class='add'>+static bool virtio_is_mapped_offload(unsigned int obit)</div><div class='add'>+{</div><div class='add'>+	return obit &gt;= VIRTIO_OFFLOAD_MAP_MIN &amp;&amp;</div><div class='add'>+	       obit &lt;= VIRTIO_OFFLOAD_MAP_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int virtio_offload_to_feature(unsigned int obit)</div><div class='add'>+{</div><div class='add'>+	return virtio_is_mapped_offload(obit) ? obit + VIRTIO_O2F_DELTA : obit;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* FIXME: MTU in config. */</div><div class='ctx'> #define GOOD_PACKET_LEN (ETH_HLEN + VLAN_HLEN + ETH_DATA_LEN)</div><div class='ctx'> #define GOOD_COPY_LEN	128</div><div class='hunk'>@@ -45,9 +62,6 @@ module_param(napi_tx, bool, 0644);</div><div class='ctx'> #define VIRTIO_XDP_TX		BIT(0)</div><div class='ctx'> #define VIRTIO_XDP_REDIR	BIT(1)</div><div class='ctx'> </div><div class='del'>-#define VIRTIO_XDP_FLAG		BIT(0)</div><div class='del'>-#define VIRTIO_ORPHAN_FLAG	BIT(1)</div><div class='del'>-</div><div class='ctx'> /* RX packet size EWMA. The average packet size is used to determine the packet</div><div class='ctx'>  * buffer size when refilling RX rings. As the entire RX ring may be refilled</div><div class='ctx'>  * at once, the weight is chosen so that the EWMA will be insensitive to short-</div><div class='hunk'>@@ -65,15 +79,19 @@ static const unsigned long guest_offloads[] = {</div><div class='ctx'> 	VIRTIO_NET_F_GUEST_CSUM,</div><div class='ctx'> 	VIRTIO_NET_F_GUEST_USO4,</div><div class='ctx'> 	VIRTIO_NET_F_GUEST_USO6,</div><div class='del'>-	VIRTIO_NET_F_GUEST_HDRLEN</div><div class='add'>+	VIRTIO_NET_F_GUEST_HDRLEN,</div><div class='add'>+	VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO_MAPPED,</div><div class='add'>+	VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO_CSUM_MAPPED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define GUEST_OFFLOAD_GRO_HW_MASK ((1ULL &lt;&lt; VIRTIO_NET_F_GUEST_TSO4) | \</div><div class='del'>-				(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_TSO6) | \</div><div class='del'>-				(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_ECN)  | \</div><div class='del'>-				(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_UFO)  | \</div><div class='del'>-				(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_USO4) | \</div><div class='del'>-				(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_USO6))</div><div class='add'>+			(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_TSO6) | \</div><div class='add'>+			(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_ECN)  | \</div><div class='add'>+			(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_UFO)  | \</div><div class='add'>+			(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_USO4) | \</div><div class='add'>+			(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_USO6) | \</div><div class='add'>+			(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO_MAPPED) | \</div><div class='add'>+			(1ULL &lt;&lt; VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO_CSUM_MAPPED))</div><div class='ctx'> </div><div class='ctx'> struct virtnet_stat_desc {</div><div class='ctx'> 	char desc[ETH_GSTRING_LEN];</div><div class='hunk'>@@ -86,6 +104,7 @@ struct virtnet_sq_free_stats {</div><div class='ctx'> 	u64 bytes;</div><div class='ctx'> 	u64 napi_packets;</div><div class='ctx'> 	u64 napi_bytes;</div><div class='add'>+	u64 xsk;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct virtnet_sq_stats {</div><div class='hunk'>@@ -298,6 +317,10 @@ struct send_queue {</div><div class='ctx'> </div><div class='ctx'> 	/* Record whether sq is in reset state. */</div><div class='ctx'> 	bool reset;</div><div class='add'>+</div><div class='add'>+	struct xsk_buff_pool *xsk_pool;</div><div class='add'>+</div><div class='add'>+	dma_addr_t xsk_hdr_dma_addr;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Internal representation of a receive virtqueue */</div><div class='hunk'>@@ -356,28 +379,9 @@ struct receive_queue {</div><div class='ctx'> 	struct xdp_rxq_info xsk_rxq_info;</div><div class='ctx'> </div><div class='ctx'> 	struct xdp_buff **xsk_buffs;</div><div class='del'>-</div><div class='del'>-	/* Do dma by self */</div><div class='del'>-	bool do_dma;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* This structure can contain rss message with maximum settings for indirection table and keysize</div><div class='del'>- * Note, that default structure that describes RSS configuration virtio_net_rss_config</div><div class='del'>- * contains same info but can't handle table values.</div><div class='del'>- * In any case, structure would be passed to virtio hw through sg_buf split by parts</div><div class='del'>- * because table sizes may be differ according to the device configuration.</div><div class='del'>- */</div><div class='ctx'> #define VIRTIO_NET_RSS_MAX_KEY_SIZE     40</div><div class='del'>-#define VIRTIO_NET_RSS_MAX_TABLE_LEN    128</div><div class='del'>-struct virtio_net_ctrl_rss {</div><div class='del'>-	u32 hash_types;</div><div class='del'>-	u16 indirection_table_mask;</div><div class='del'>-	u16 unclassified_queue;</div><div class='del'>-	u16 indirection_table[VIRTIO_NET_RSS_MAX_TABLE_LEN];</div><div class='del'>-	u16 max_tx_vq;</div><div class='del'>-	u8 hash_key_length;</div><div class='del'>-	u8 key[VIRTIO_NET_RSS_MAX_KEY_SIZE];</div><div class='del'>-};</div><div class='ctx'> </div><div class='ctx'> /* Control VQ buffers: protected by the rtnl lock */</div><div class='ctx'> struct control_buf {</div><div class='hunk'>@@ -421,7 +425,9 @@ struct virtnet_info {</div><div class='ctx'> 	u16 rss_indir_table_size;</div><div class='ctx'> 	u32 rss_hash_types_supported;</div><div class='ctx'> 	u32 rss_hash_types_saved;</div><div class='del'>-	struct virtio_net_ctrl_rss rss;</div><div class='add'>+	struct virtio_net_rss_config_hdr *rss_hdr;</div><div class='add'>+	struct virtio_net_rss_config_trailer rss_trailer;</div><div class='add'>+	u8 rss_hash_key_data[VIRTIO_NET_RSS_MAX_KEY_SIZE];</div><div class='ctx'> </div><div class='ctx'> 	/* Has control virtqueue */</div><div class='ctx'> 	bool has_cvq;</div><div class='hunk'>@@ -438,6 +444,13 @@ struct virtnet_info {</div><div class='ctx'> 	/* Work struct for delayed refilling if we run low on memory. */</div><div class='ctx'> 	struct delayed_work refill;</div><div class='ctx'> </div><div class='add'>+	/* UDP tunnel support */</div><div class='add'>+	bool tx_tnl;</div><div class='add'>+</div><div class='add'>+	bool rx_tnl;</div><div class='add'>+</div><div class='add'>+	bool rx_tnl_csum;</div><div class='add'>+</div><div class='ctx'> 	/* Is delayed refill enabled? */</div><div class='ctx'> 	bool refill_enabled;</div><div class='ctx'> </div><div class='hunk'>@@ -497,10 +510,14 @@ struct virtio_net_common_hdr {</div><div class='ctx'> 		struct virtio_net_hdr hdr;</div><div class='ctx'> 		struct virtio_net_hdr_mrg_rxbuf	mrg_hdr;</div><div class='ctx'> 		struct virtio_net_hdr_v1_hash hash_v1_hdr;</div><div class='add'>+		struct virtio_net_hdr_v1_hash_tunnel tnl_hdr;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct virtio_net_common_hdr xsk_hdr;</div><div class='add'>+</div><div class='ctx'> static void virtnet_sq_free_unused_buf(struct virtqueue *vq, void *buf);</div><div class='add'>+static void virtnet_sq_free_unused_buf_done(struct virtqueue *vq);</div><div class='ctx'> static int virtnet_xdp_handler(struct bpf_prog *xdp_prog, struct xdp_buff *xdp,</div><div class='ctx'> 			       struct net_device *dev,</div><div class='ctx'> 			       unsigned int *xdp_xmit,</div><div class='hunk'>@@ -511,68 +528,120 @@ static struct sk_buff *virtnet_skb_append_frag(struct sk_buff *head_skb,</div><div class='ctx'> 					       struct sk_buff *curr_skb,</div><div class='ctx'> 					       struct page *page, void *buf,</div><div class='ctx'> 					       int len, int truesize);</div><div class='add'>+static void virtnet_xsk_completed(struct send_queue *sq, int num);</div><div class='add'>+</div><div class='add'>+enum virtnet_xmit_type {</div><div class='add'>+	VIRTNET_XMIT_TYPE_SKB,</div><div class='add'>+	VIRTNET_XMIT_TYPE_SKB_ORPHAN,</div><div class='add'>+	VIRTNET_XMIT_TYPE_XDP,</div><div class='add'>+	VIRTNET_XMIT_TYPE_XSK,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static bool is_xdp_frame(void *ptr)</div><div class='add'>+static size_t virtnet_rss_hdr_size(const struct virtnet_info *vi)</div><div class='ctx'> {</div><div class='del'>-	return (unsigned long)ptr &amp; VIRTIO_XDP_FLAG;</div><div class='add'>+	u16 indir_table_size = vi-&gt;has_rss ? vi-&gt;rss_indir_table_size : 1;</div><div class='add'>+</div><div class='add'>+	return struct_size(vi-&gt;rss_hdr, indirection_table, indir_table_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void *xdp_to_ptr(struct xdp_frame *ptr)</div><div class='add'>+static size_t virtnet_rss_trailer_size(const struct virtnet_info *vi)</div><div class='ctx'> {</div><div class='del'>-	return (void *)((unsigned long)ptr | VIRTIO_XDP_FLAG);</div><div class='add'>+	return struct_size(&amp;vi-&gt;rss_trailer, hash_key_data, vi-&gt;rss_key_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct xdp_frame *ptr_to_xdp(void *ptr)</div><div class='add'>+/* We use the last two bits of the pointer to distinguish the xmit type. */</div><div class='add'>+#define VIRTNET_XMIT_TYPE_MASK (BIT(0) | BIT(1))</div><div class='add'>+</div><div class='add'>+#define VIRTIO_XSK_FLAG_OFFSET 2</div><div class='add'>+</div><div class='add'>+static enum virtnet_xmit_type virtnet_xmit_ptr_unpack(void **ptr)</div><div class='ctx'> {</div><div class='del'>-	return (struct xdp_frame *)((unsigned long)ptr &amp; ~VIRTIO_XDP_FLAG);</div><div class='add'>+	unsigned long p = (unsigned long)*ptr;</div><div class='add'>+</div><div class='add'>+	*ptr = (void *)(p &amp; ~VIRTNET_XMIT_TYPE_MASK);</div><div class='add'>+</div><div class='add'>+	return p &amp; VIRTNET_XMIT_TYPE_MASK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool is_orphan_skb(void *ptr)</div><div class='add'>+static void *virtnet_xmit_ptr_pack(void *ptr, enum virtnet_xmit_type type)</div><div class='ctx'> {</div><div class='del'>-	return (unsigned long)ptr &amp; VIRTIO_ORPHAN_FLAG;</div><div class='add'>+	return (void *)((unsigned long)ptr | type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void *skb_to_ptr(struct sk_buff *skb, bool orphan)</div><div class='add'>+static int virtnet_add_outbuf(struct send_queue *sq, int num, void *data,</div><div class='add'>+			      enum virtnet_xmit_type type)</div><div class='ctx'> {</div><div class='del'>-	return (void *)((unsigned long)skb | (orphan ? VIRTIO_ORPHAN_FLAG : 0));</div><div class='add'>+	return virtqueue_add_outbuf(sq-&gt;vq, sq-&gt;sg, num,</div><div class='add'>+				    virtnet_xmit_ptr_pack(data, type),</div><div class='add'>+				    GFP_ATOMIC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct sk_buff *ptr_to_skb(void *ptr)</div><div class='add'>+static u32 virtnet_ptr_to_xsk_buff_len(void *ptr)</div><div class='ctx'> {</div><div class='del'>-	return (struct sk_buff *)((unsigned long)ptr &amp; ~VIRTIO_ORPHAN_FLAG);</div><div class='add'>+	return ((unsigned long)ptr) &gt;&gt; VIRTIO_XSK_FLAG_OFFSET;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sg_fill_dma(struct scatterlist *sg, dma_addr_t addr, u32 len)</div><div class='add'>+{</div><div class='add'>+	sg_dma_address(sg) = addr;</div><div class='add'>+	sg_dma_len(sg) = len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __free_old_xmit(struct send_queue *sq, struct netdev_queue *txq,</div><div class='ctx'> 			    bool in_napi, struct virtnet_sq_free_stats *stats)</div><div class='ctx'> {</div><div class='add'>+	struct xdp_frame *frame;</div><div class='add'>+	struct sk_buff *skb;</div><div class='ctx'> 	unsigned int len;</div><div class='ctx'> 	void *ptr;</div><div class='ctx'> </div><div class='ctx'> 	while ((ptr = virtqueue_get_buf(sq-&gt;vq, &amp;len)) != NULL) {</div><div class='del'>-		if (!is_xdp_frame(ptr)) {</div><div class='del'>-			struct sk_buff *skb = ptr_to_skb(ptr);</div><div class='add'>+		switch (virtnet_xmit_ptr_unpack(&amp;ptr)) {</div><div class='add'>+		case VIRTNET_XMIT_TYPE_SKB:</div><div class='add'>+			skb = ptr;</div><div class='ctx'> </div><div class='ctx'> 			pr_debug("Sent skb %p\n", skb);</div><div class='add'>+			stats-&gt;napi_packets++;</div><div class='add'>+			stats-&gt;napi_bytes += skb-&gt;len;</div><div class='add'>+			napi_consume_skb(skb, in_napi);</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-			if (is_orphan_skb(ptr)) {</div><div class='del'>-				stats-&gt;packets++;</div><div class='del'>-				stats-&gt;bytes += skb-&gt;len;</div><div class='del'>-			} else {</div><div class='del'>-				stats-&gt;napi_packets++;</div><div class='del'>-				stats-&gt;napi_bytes += skb-&gt;len;</div><div class='del'>-			}</div><div class='add'>+		case VIRTNET_XMIT_TYPE_SKB_ORPHAN:</div><div class='add'>+			skb = ptr;</div><div class='add'>+</div><div class='add'>+			stats-&gt;packets++;</div><div class='add'>+			stats-&gt;bytes += skb-&gt;len;</div><div class='ctx'> 			napi_consume_skb(skb, in_napi);</div><div class='del'>-		} else {</div><div class='del'>-			struct xdp_frame *frame = ptr_to_xdp(ptr);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case VIRTNET_XMIT_TYPE_XDP:</div><div class='add'>+			frame = ptr;</div><div class='ctx'> </div><div class='ctx'> 			stats-&gt;packets++;</div><div class='ctx'> 			stats-&gt;bytes += xdp_get_frame_len(frame);</div><div class='ctx'> 			xdp_return_frame(frame);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case VIRTNET_XMIT_TYPE_XSK:</div><div class='add'>+			stats-&gt;bytes += virtnet_ptr_to_xsk_buff_len(ptr);</div><div class='add'>+			stats-&gt;xsk++;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	netdev_tx_completed_queue(txq, stats-&gt;napi_packets, stats-&gt;napi_bytes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void virtnet_free_old_xmit(struct send_queue *sq,</div><div class='add'>+				  struct netdev_queue *txq,</div><div class='add'>+				  bool in_napi,</div><div class='add'>+				  struct virtnet_sq_free_stats *stats)</div><div class='add'>+{</div><div class='add'>+	__free_old_xmit(sq, txq, in_napi, stats);</div><div class='add'>+</div><div class='add'>+	if (stats-&gt;xsk)</div><div class='add'>+		virtnet_xsk_completed(sq, stats-&gt;xsk);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Converting between virtqueue no. and kernel tx/rx queue no.</div><div class='ctx'>  * 0:rx0 1:tx0 2:rx1 3:tx1 ... 2N:rxN 2N+1:txN 2N+2:cvq</div><div class='ctx'>  */</div><div class='hunk'>@@ -706,10 +775,26 @@ static bool virtqueue_napi_complete(struct napi_struct *napi,</div><div class='ctx'> 	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void virtnet_tx_wake_queue(struct virtnet_info *vi,</div><div class='add'>+				struct send_queue *sq)</div><div class='add'>+{</div><div class='add'>+	unsigned int index = vq2txq(sq-&gt;vq);</div><div class='add'>+	struct netdev_queue *txq = netdev_get_tx_queue(vi-&gt;dev, index);</div><div class='add'>+</div><div class='add'>+	if (netif_tx_queue_stopped(txq)) {</div><div class='add'>+		u64_stats_update_begin(&amp;sq-&gt;stats.syncp);</div><div class='add'>+		u64_stats_inc(&amp;sq-&gt;stats.wake);</div><div class='add'>+		u64_stats_update_end(&amp;sq-&gt;stats.syncp);</div><div class='add'>+		netif_tx_wake_queue(txq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void skb_xmit_done(struct virtqueue *vq)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtnet_info *vi = vq-&gt;vdev-&gt;priv;</div><div class='del'>-	struct napi_struct *napi = &amp;vi-&gt;sq[vq2txq(vq)].napi;</div><div class='add'>+	unsigned int index = vq2txq(vq);</div><div class='add'>+	struct send_queue *sq = &amp;vi-&gt;sq[index];</div><div class='add'>+	struct napi_struct *napi = &amp;sq-&gt;napi;</div><div class='ctx'> </div><div class='ctx'> 	/* Suppress further interrupts. */</div><div class='ctx'> 	virtqueue_disable_cb(vq);</div><div class='hunk'>@@ -717,8 +802,7 @@ static void skb_xmit_done(struct virtqueue *vq)</div><div class='ctx'> 	if (napi-&gt;weight)</div><div class='ctx'> 		virtqueue_napi_schedule(napi, vq);</div><div class='ctx'> 	else</div><div class='del'>-		/* We were probably waiting for more output buffers. */</div><div class='del'>-		netif_wake_subqueue(vi-&gt;dev, vq2txq(vq));</div><div class='add'>+		virtnet_tx_wake_queue(vi, sq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #define MRG_CTX_HEADER_SHIFT 22</div><div class='hunk'>@@ -738,6 +822,26 @@ static unsigned int mergeable_ctx_to_truesize(void *mrg_ctx)</div><div class='ctx'> 	return (unsigned long)mrg_ctx &amp; ((1 &lt;&lt; MRG_CTX_HEADER_SHIFT) - 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int check_mergeable_len(struct net_device *dev, void *mrg_ctx,</div><div class='add'>+			       unsigned int len)</div><div class='add'>+{</div><div class='add'>+	unsigned int headroom, tailroom, room, truesize;</div><div class='add'>+</div><div class='add'>+	truesize = mergeable_ctx_to_truesize(mrg_ctx);</div><div class='add'>+	headroom = mergeable_ctx_to_headroom(mrg_ctx);</div><div class='add'>+	tailroom = headroom ? sizeof(struct skb_shared_info) : 0;</div><div class='add'>+	room = SKB_DATA_ALIGN(headroom + tailroom);</div><div class='add'>+</div><div class='add'>+	if (len &gt; truesize - room) {</div><div class='add'>+		pr_debug("%s: rx error: len %u exceeds truesize %lu\n",</div><div class='add'>+			 dev-&gt;name, len, (unsigned long)(truesize - room));</div><div class='add'>+		DEV_STATS_INC(dev, rx_length_errors);</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static struct sk_buff *virtnet_build_skb(void *buf, unsigned int buflen,</div><div class='ctx'> 					 unsigned int headroom,</div><div class='ctx'> 					 unsigned int len)</div><div class='hunk'>@@ -821,17 +925,6 @@ static struct sk_buff *page_to_skb(struct virtnet_info *vi,</div><div class='ctx'> 		goto ok;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Verify that we can indeed put this data into a skb.</div><div class='del'>-	 * This is here to handle cases when the device erroneously</div><div class='del'>-	 * tries to receive more than is possible. This is usually</div><div class='del'>-	 * the case of a broken device.</div><div class='del'>-	 */</div><div class='del'>-	if (unlikely(len &gt; MAX_SKB_FRAGS * PAGE_SIZE)) {</div><div class='del'>-		net_dbg_ratelimited("%s: too much data\n", skb-&gt;dev-&gt;name);</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='ctx'> 	BUG_ON(offset &gt;= PAGE_SIZE);</div><div class='ctx'> 	while (len) {</div><div class='ctx'> 		unsigned int frag_size = min((unsigned)PAGE_SIZE - offset, len);</div><div class='hunk'>@@ -856,11 +949,14 @@ ok:</div><div class='ctx'> </div><div class='ctx'> static void virtnet_rq_unmap(struct receive_queue *rq, void *buf, u32 len)</div><div class='ctx'> {</div><div class='add'>+	struct virtnet_info *vi = rq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='ctx'> 	struct page *page = virt_to_head_page(buf);</div><div class='ctx'> 	struct virtnet_rq_dma *dma;</div><div class='ctx'> 	void *head;</div><div class='ctx'> 	int offset;</div><div class='ctx'> </div><div class='add'>+	BUG_ON(vi-&gt;big_packets &amp;&amp; !vi-&gt;mergeable_rx_bufs);</div><div class='add'>+</div><div class='ctx'> 	head = page_address(page);</div><div class='ctx'> </div><div class='ctx'> 	dma = head;</div><div class='hunk'>@@ -870,7 +966,7 @@ static void virtnet_rq_unmap(struct receive_queue *rq, void *buf, u32 len)</div><div class='ctx'> 	if (dma-&gt;need_sync &amp;&amp; len) {</div><div class='ctx'> 		offset = buf - (head + sizeof(*dma));</div><div class='ctx'> </div><div class='del'>-		virtqueue_dma_sync_single_range_for_cpu(rq-&gt;vq, dma-&gt;addr,</div><div class='add'>+		virtqueue_map_sync_single_range_for_cpu(rq-&gt;vq, dma-&gt;addr,</div><div class='ctx'> 							offset, len,</div><div class='ctx'> 							DMA_FROM_DEVICE);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -878,17 +974,20 @@ static void virtnet_rq_unmap(struct receive_queue *rq, void *buf, u32 len)</div><div class='ctx'> 	if (dma-&gt;ref)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	virtqueue_dma_unmap_single_attrs(rq-&gt;vq, dma-&gt;addr, dma-&gt;len,</div><div class='del'>-					 DMA_FROM_DEVICE, DMA_ATTR_SKIP_CPU_SYNC);</div><div class='add'>+	virtqueue_unmap_single_attrs(rq-&gt;vq, dma-&gt;addr, dma-&gt;len,</div><div class='add'>+				     DMA_FROM_DEVICE, DMA_ATTR_SKIP_CPU_SYNC);</div><div class='ctx'> 	put_page(page);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *virtnet_rq_get_buf(struct receive_queue *rq, u32 *len, void **ctx)</div><div class='ctx'> {</div><div class='add'>+	struct virtnet_info *vi = rq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='ctx'> 	void *buf;</div><div class='ctx'> </div><div class='add'>+	BUG_ON(vi-&gt;big_packets &amp;&amp; !vi-&gt;mergeable_rx_bufs);</div><div class='add'>+</div><div class='ctx'> 	buf = virtqueue_get_buf_ctx(rq-&gt;vq, len, ctx);</div><div class='del'>-	if (buf &amp;&amp; rq-&gt;do_dma)</div><div class='add'>+	if (buf)</div><div class='ctx'> 		virtnet_rq_unmap(rq, buf, *len);</div><div class='ctx'> </div><div class='ctx'> 	return buf;</div><div class='hunk'>@@ -896,15 +995,13 @@ static void *virtnet_rq_get_buf(struct receive_queue *rq, u32 *len, void **ctx)</div><div class='ctx'> </div><div class='ctx'> static void virtnet_rq_init_one_sg(struct receive_queue *rq, void *buf, u32 len)</div><div class='ctx'> {</div><div class='add'>+	struct virtnet_info *vi = rq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='ctx'> 	struct virtnet_rq_dma *dma;</div><div class='ctx'> 	dma_addr_t addr;</div><div class='ctx'> 	u32 offset;</div><div class='ctx'> 	void *head;</div><div class='ctx'> </div><div class='del'>-	if (!rq-&gt;do_dma) {</div><div class='del'>-		sg_init_one(rq-&gt;sg, buf, len);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	BUG_ON(vi-&gt;big_packets &amp;&amp; !vi-&gt;mergeable_rx_bufs);</div><div class='ctx'> </div><div class='ctx'> 	head = page_address(rq-&gt;alloc_frag.page);</div><div class='ctx'> </div><div class='hunk'>@@ -915,60 +1012,57 @@ static void virtnet_rq_init_one_sg(struct receive_queue *rq, void *buf, u32 len)</div><div class='ctx'> 	addr = dma-&gt;addr - sizeof(*dma) + offset;</div><div class='ctx'> </div><div class='ctx'> 	sg_init_table(rq-&gt;sg, 1);</div><div class='del'>-	rq-&gt;sg[0].dma_address = addr;</div><div class='del'>-	rq-&gt;sg[0].length = len;</div><div class='add'>+	sg_fill_dma(rq-&gt;sg, addr, len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void *virtnet_rq_alloc(struct receive_queue *rq, u32 size, gfp_t gfp)</div><div class='ctx'> {</div><div class='ctx'> 	struct page_frag *alloc_frag = &amp;rq-&gt;alloc_frag;</div><div class='add'>+	struct virtnet_info *vi = rq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='ctx'> 	struct virtnet_rq_dma *dma;</div><div class='ctx'> 	void *buf, *head;</div><div class='ctx'> 	dma_addr_t addr;</div><div class='ctx'> </div><div class='del'>-	if (unlikely(!skb_page_frag_refill(size, alloc_frag, gfp)))</div><div class='del'>-		return NULL;</div><div class='add'>+	BUG_ON(vi-&gt;big_packets &amp;&amp; !vi-&gt;mergeable_rx_bufs);</div><div class='ctx'> </div><div class='ctx'> 	head = page_address(alloc_frag-&gt;page);</div><div class='ctx'> </div><div class='del'>-	if (rq-&gt;do_dma) {</div><div class='del'>-		dma = head;</div><div class='del'>-</div><div class='del'>-		/* new pages */</div><div class='del'>-		if (!alloc_frag-&gt;offset) {</div><div class='del'>-			if (rq-&gt;last_dma) {</div><div class='del'>-				/* Now, the new page is allocated, the last dma</div><div class='del'>-				 * will not be used. So the dma can be unmapped</div><div class='del'>-				 * if the ref is 0.</div><div class='del'>-				 */</div><div class='del'>-				virtnet_rq_unmap(rq, rq-&gt;last_dma, 0);</div><div class='del'>-				rq-&gt;last_dma = NULL;</div><div class='del'>-			}</div><div class='add'>+	dma = head;</div><div class='ctx'> </div><div class='del'>-			dma-&gt;len = alloc_frag-&gt;size - sizeof(*dma);</div><div class='add'>+	/* new pages */</div><div class='add'>+	if (!alloc_frag-&gt;offset) {</div><div class='add'>+		if (rq-&gt;last_dma) {</div><div class='add'>+			/* Now, the new page is allocated, the last dma</div><div class='add'>+			 * will not be used. So the dma can be unmapped</div><div class='add'>+			 * if the ref is 0.</div><div class='add'>+			 */</div><div class='add'>+			virtnet_rq_unmap(rq, rq-&gt;last_dma, 0);</div><div class='add'>+			rq-&gt;last_dma = NULL;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			addr = virtqueue_dma_map_single_attrs(rq-&gt;vq, dma + 1,</div><div class='del'>-							      dma-&gt;len, DMA_FROM_DEVICE, 0);</div><div class='del'>-			if (virtqueue_dma_mapping_error(rq-&gt;vq, addr))</div><div class='del'>-				return NULL;</div><div class='add'>+		dma-&gt;len = alloc_frag-&gt;size - sizeof(*dma);</div><div class='ctx'> </div><div class='del'>-			dma-&gt;addr = addr;</div><div class='del'>-			dma-&gt;need_sync = virtqueue_dma_need_sync(rq-&gt;vq, addr);</div><div class='add'>+		addr = virtqueue_map_single_attrs(rq-&gt;vq, dma + 1,</div><div class='add'>+						  dma-&gt;len, DMA_FROM_DEVICE, 0);</div><div class='add'>+		if (virtqueue_map_mapping_error(rq-&gt;vq, addr))</div><div class='add'>+			return NULL;</div><div class='ctx'> </div><div class='del'>-			/* Add a reference to dma to prevent the entire dma from</div><div class='del'>-			 * being released during error handling. This reference</div><div class='del'>-			 * will be freed after the pages are no longer used.</div><div class='del'>-			 */</div><div class='del'>-			get_page(alloc_frag-&gt;page);</div><div class='del'>-			dma-&gt;ref = 1;</div><div class='del'>-			alloc_frag-&gt;offset = sizeof(*dma);</div><div class='add'>+		dma-&gt;addr = addr;</div><div class='add'>+		dma-&gt;need_sync = virtqueue_map_need_sync(rq-&gt;vq, addr);</div><div class='ctx'> </div><div class='del'>-			rq-&gt;last_dma = dma;</div><div class='del'>-		}</div><div class='add'>+		/* Add a reference to dma to prevent the entire dma from</div><div class='add'>+		 * being released during error handling. This reference</div><div class='add'>+		 * will be freed after the pages are no longer used.</div><div class='add'>+		 */</div><div class='add'>+		get_page(alloc_frag-&gt;page);</div><div class='add'>+		dma-&gt;ref = 1;</div><div class='add'>+		alloc_frag-&gt;offset = sizeof(*dma);</div><div class='ctx'> </div><div class='del'>-		++dma-&gt;ref;</div><div class='add'>+		rq-&gt;last_dma = dma;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	++dma-&gt;ref;</div><div class='add'>+</div><div class='ctx'> 	buf = head + alloc_frag-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 	get_page(alloc_frag-&gt;page);</div><div class='hunk'>@@ -990,7 +1084,7 @@ static void virtnet_rq_unmap_free_buf(struct virtqueue *vq, void *buf)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (rq-&gt;do_dma)</div><div class='add'>+	if (!vi-&gt;big_packets || vi-&gt;mergeable_rx_bufs)</div><div class='ctx'> 		virtnet_rq_unmap(rq, buf, 0);</div><div class='ctx'> </div><div class='ctx'> 	virtnet_rq_free_buf(vi, rq, buf);</div><div class='hunk'>@@ -1001,7 +1095,7 @@ static void free_old_xmit(struct send_queue *sq, struct netdev_queue *txq,</div><div class='ctx'> {</div><div class='ctx'> 	struct virtnet_sq_free_stats stats = {0};</div><div class='ctx'> </div><div class='del'>-	__free_old_xmit(sq, txq, in_napi, &amp;stats);</div><div class='add'>+	virtnet_free_old_xmit(sq, txq, in_napi, &amp;stats);</div><div class='ctx'> </div><div class='ctx'> 	/* Avoid overhead when no packets have been processed</div><div class='ctx'> 	 * happens when called speculatively from start_xmit.</div><div class='hunk'>@@ -1025,11 +1119,10 @@ static bool is_xdp_raw_buffer_queue(struct virtnet_info *vi, int q)</div><div class='ctx'> 		return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void check_sq_full_and_disable(struct virtnet_info *vi,</div><div class='del'>-				      struct net_device *dev,</div><div class='del'>-				      struct send_queue *sq)</div><div class='add'>+static bool tx_may_stop(struct virtnet_info *vi,</div><div class='add'>+			struct net_device *dev,</div><div class='add'>+			struct send_queue *sq)</div><div class='ctx'> {</div><div class='del'>-	bool use_napi = sq-&gt;napi.weight;</div><div class='ctx'> 	int qnum;</div><div class='ctx'> </div><div class='ctx'> 	qnum = sq - vi-&gt;sq;</div><div class='hunk'>@@ -1044,20 +1137,39 @@ static void check_sq_full_and_disable(struct virtnet_info *vi,</div><div class='ctx'> 	 * Since most packets only take 1 or 2 ring slots, stopping the queue</div><div class='ctx'> 	 * early means 16 slots are typically wasted.</div><div class='ctx'> 	 */</div><div class='del'>-	if (sq-&gt;vq-&gt;num_free &lt; 2+MAX_SKB_FRAGS) {</div><div class='add'>+	if (sq-&gt;vq-&gt;num_free &lt; MAX_SKB_FRAGS + 2) {</div><div class='ctx'> 		struct netdev_queue *txq = netdev_get_tx_queue(dev, qnum);</div><div class='ctx'> </div><div class='ctx'> 		netif_tx_stop_queue(txq);</div><div class='ctx'> 		u64_stats_update_begin(&amp;sq-&gt;stats.syncp);</div><div class='ctx'> 		u64_stats_inc(&amp;sq-&gt;stats.stop);</div><div class='ctx'> 		u64_stats_update_end(&amp;sq-&gt;stats.syncp);</div><div class='add'>+</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_sq_full_and_disable(struct virtnet_info *vi,</div><div class='add'>+				      struct net_device *dev,</div><div class='add'>+				      struct send_queue *sq)</div><div class='add'>+{</div><div class='add'>+	bool use_napi = sq-&gt;napi.weight;</div><div class='add'>+	int qnum;</div><div class='add'>+</div><div class='add'>+	qnum = sq - vi-&gt;sq;</div><div class='add'>+</div><div class='add'>+	if (tx_may_stop(vi, dev, sq)) {</div><div class='add'>+		struct netdev_queue *txq = netdev_get_tx_queue(dev, qnum);</div><div class='add'>+</div><div class='ctx'> 		if (use_napi) {</div><div class='ctx'> 			if (unlikely(!virtqueue_enable_cb_delayed(sq-&gt;vq)))</div><div class='ctx'> 				virtqueue_napi_schedule(&amp;sq-&gt;napi, sq-&gt;vq);</div><div class='ctx'> 		} else if (unlikely(!virtqueue_enable_cb_delayed(sq-&gt;vq))) {</div><div class='ctx'> 			/* More just got used, free them then recheck. */</div><div class='ctx'> 			free_old_xmit(sq, txq, false);</div><div class='del'>-			if (sq-&gt;vq-&gt;num_free &gt;= 2+MAX_SKB_FRAGS) {</div><div class='add'>+			if (sq-&gt;vq-&gt;num_free &gt;= MAX_SKB_FRAGS + 2) {</div><div class='ctx'> 				netif_start_subqueue(dev, qnum);</div><div class='ctx'> 				u64_stats_update_begin(&amp;sq-&gt;stats.syncp);</div><div class='ctx'> 				u64_stats_inc(&amp;sq-&gt;stats.wake);</div><div class='hunk'>@@ -1068,21 +1180,29 @@ static void check_sq_full_and_disable(struct virtnet_info *vi,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void sg_fill_dma(struct scatterlist *sg, dma_addr_t addr, u32 len)</div><div class='del'>-{</div><div class='del'>-	sg-&gt;dma_address = addr;</div><div class='del'>-	sg-&gt;length = len;</div><div class='del'>-}</div><div class='del'>-</div><div class='add'>+/* Note that @len is the length of received data without virtio header */</div><div class='ctx'> static struct xdp_buff *buf_to_xdp(struct virtnet_info *vi,</div><div class='del'>-				   struct receive_queue *rq, void *buf, u32 len)</div><div class='add'>+				   struct receive_queue *rq, void *buf,</div><div class='add'>+				   u32 len, bool first_buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct xdp_buff *xdp;</div><div class='ctx'> 	u32 bufsize;</div><div class='ctx'> </div><div class='ctx'> 	xdp = (struct xdp_buff *)buf;</div><div class='ctx'> </div><div class='del'>-	bufsize = xsk_pool_get_rx_frame_size(rq-&gt;xsk_pool) + vi-&gt;hdr_len;</div><div class='add'>+	/* In virtnet_add_recvbuf_xsk, we use part of XDP_PACKET_HEADROOM for</div><div class='add'>+	 * virtio header and ask the vhost to fill data from</div><div class='add'>+	 *         hard_start + XDP_PACKET_HEADROOM - vi-&gt;hdr_len</div><div class='add'>+	 * The first buffer has virtio header so the remaining region for frame</div><div class='add'>+	 * data is</div><div class='add'>+	 *         xsk_pool_get_rx_frame_size()</div><div class='add'>+	 * While other buffers than the first one do not have virtio header, so</div><div class='add'>+	 * the maximum frame data's length can be</div><div class='add'>+	 *         xsk_pool_get_rx_frame_size() + vi-&gt;hdr_len</div><div class='add'>+	 */</div><div class='add'>+	bufsize = xsk_pool_get_rx_frame_size(rq-&gt;xsk_pool);</div><div class='add'>+	if (!first_buf)</div><div class='add'>+		bufsize += vi-&gt;hdr_len;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(len &gt; bufsize)) {</div><div class='ctx'> 		pr_debug("%s: rx error: len %u exceeds truesize %u\n",</div><div class='hunk'>@@ -1092,7 +1212,14 @@ static struct xdp_buff *buf_to_xdp(struct virtnet_info *vi,</div><div class='ctx'> 		return NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	xsk_buff_set_size(xdp, len);</div><div class='add'>+	if (first_buf) {</div><div class='add'>+		xsk_buff_set_size(xdp, len);</div><div class='add'>+	} else {</div><div class='add'>+		xdp_prepare_buff(xdp, xdp-&gt;data_hard_start,</div><div class='add'>+				 XDP_PACKET_HEADROOM - vi-&gt;hdr_len, len, 1);</div><div class='add'>+		xdp-&gt;flags = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	xsk_buff_dma_sync_for_cpu(xdp);</div><div class='ctx'> </div><div class='ctx'> 	return xdp;</div><div class='hunk'>@@ -1207,7 +1334,7 @@ static int xsk_append_merge_buffer(struct virtnet_info *vi,</div><div class='ctx'> </div><div class='ctx'> 		u64_stats_add(&amp;stats-&gt;bytes, len);</div><div class='ctx'> </div><div class='del'>-		xdp = buf_to_xdp(vi, rq, buf, len);</div><div class='add'>+		xdp = buf_to_xdp(vi, rq, buf, len, false);</div><div class='ctx'> 		if (!xdp)</div><div class='ctx'> 			goto err;</div><div class='ctx'> </div><div class='hunk'>@@ -1217,7 +1344,7 @@ static int xsk_append_merge_buffer(struct virtnet_info *vi,</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		memcpy(buf, xdp-&gt;data - vi-&gt;hdr_len, len);</div><div class='add'>+		memcpy(buf, xdp-&gt;data, len);</div><div class='ctx'> </div><div class='ctx'> 		xsk_buff_free(xdp);</div><div class='ctx'> </div><div class='hunk'>@@ -1256,9 +1383,14 @@ static struct sk_buff *virtnet_receive_xsk_merge(struct net_device *dev, struct</div><div class='ctx'> 	ret = XDP_PASS;</div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	prog = rcu_dereference(rq-&gt;xdp_prog);</div><div class='del'>-	/* TODO: support multi buffer. */</div><div class='del'>-	if (prog &amp;&amp; num_buf == 1)</div><div class='del'>-		ret = virtnet_xdp_handler(prog, xdp, dev, xdp_xmit, stats);</div><div class='add'>+	if (prog) {</div><div class='add'>+		/* TODO: support multi buffer. */</div><div class='add'>+		if (num_buf == 1)</div><div class='add'>+			ret = virtnet_xdp_handler(prog, xdp, dev, xdp_xmit,</div><div class='add'>+						  stats);</div><div class='add'>+		else</div><div class='add'>+			ret = XDP_ABORTED;</div><div class='add'>+	}</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	switch (ret) {</div><div class='hunk'>@@ -1305,7 +1437,7 @@ static void virtnet_receive_xsk_buf(struct virtnet_info *vi, struct receive_queu</div><div class='ctx'> </div><div class='ctx'> 	u64_stats_add(&amp;stats-&gt;bytes, len);</div><div class='ctx'> </div><div class='del'>-	xdp = buf_to_xdp(vi, rq, buf, len);</div><div class='add'>+	xdp = buf_to_xdp(vi, rq, buf, len, true);</div><div class='ctx'> 	if (!xdp)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -1354,7 +1486,8 @@ static int virtnet_add_recvbuf_xsk(struct virtnet_info *vi, struct receive_queue</div><div class='ctx'> 		sg_init_table(rq-&gt;sg, 1);</div><div class='ctx'> 		sg_fill_dma(rq-&gt;sg, addr, len);</div><div class='ctx'> </div><div class='del'>-		err = virtqueue_add_inbuf(rq-&gt;vq, rq-&gt;sg, 1, xsk_buffs[i], gfp);</div><div class='add'>+		err = virtqueue_add_inbuf_premapped(rq-&gt;vq, rq-&gt;sg, 1,</div><div class='add'>+						    xsk_buffs[i], NULL, gfp);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1368,6 +1501,120 @@ err:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void *virtnet_xsk_to_ptr(u32 len)</div><div class='add'>+{</div><div class='add'>+	unsigned long p;</div><div class='add'>+</div><div class='add'>+	p = len &lt;&lt; VIRTIO_XSK_FLAG_OFFSET;</div><div class='add'>+</div><div class='add'>+	return virtnet_xmit_ptr_pack((void *)p, VIRTNET_XMIT_TYPE_XSK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int virtnet_xsk_xmit_one(struct send_queue *sq,</div><div class='add'>+				struct xsk_buff_pool *pool,</div><div class='add'>+				struct xdp_desc *desc)</div><div class='add'>+{</div><div class='add'>+	struct virtnet_info *vi;</div><div class='add'>+	dma_addr_t addr;</div><div class='add'>+</div><div class='add'>+	vi = sq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	addr = xsk_buff_raw_get_dma(pool, desc-&gt;addr);</div><div class='add'>+	xsk_buff_raw_dma_sync_for_device(pool, addr, desc-&gt;len);</div><div class='add'>+</div><div class='add'>+	sg_init_table(sq-&gt;sg, 2);</div><div class='add'>+	sg_fill_dma(sq-&gt;sg, sq-&gt;xsk_hdr_dma_addr, vi-&gt;hdr_len);</div><div class='add'>+	sg_fill_dma(sq-&gt;sg + 1, addr, desc-&gt;len);</div><div class='add'>+</div><div class='add'>+	return virtqueue_add_outbuf_premapped(sq-&gt;vq, sq-&gt;sg, 2,</div><div class='add'>+					      virtnet_xsk_to_ptr(desc-&gt;len),</div><div class='add'>+					      GFP_ATOMIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int virtnet_xsk_xmit_batch(struct send_queue *sq,</div><div class='add'>+				  struct xsk_buff_pool *pool,</div><div class='add'>+				  unsigned int budget,</div><div class='add'>+				  u64 *kicks)</div><div class='add'>+{</div><div class='add'>+	struct xdp_desc *descs = pool-&gt;tx_descs;</div><div class='add'>+	bool kick = false;</div><div class='add'>+	u32 nb_pkts, i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	budget = min_t(u32, budget, sq-&gt;vq-&gt;num_free);</div><div class='add'>+</div><div class='add'>+	nb_pkts = xsk_tx_peek_release_desc_batch(pool, budget);</div><div class='add'>+	if (!nb_pkts)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nb_pkts; i++) {</div><div class='add'>+		err = virtnet_xsk_xmit_one(sq, pool, &amp;descs[i]);</div><div class='add'>+		if (unlikely(err)) {</div><div class='add'>+			xsk_tx_completed(sq-&gt;xsk_pool, nb_pkts - i);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		kick = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (kick &amp;&amp; virtqueue_kick_prepare(sq-&gt;vq) &amp;&amp; virtqueue_notify(sq-&gt;vq))</div><div class='add'>+		(*kicks)++;</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool virtnet_xsk_xmit(struct send_queue *sq, struct xsk_buff_pool *pool,</div><div class='add'>+			     int budget)</div><div class='add'>+{</div><div class='add'>+	struct virtnet_info *vi = sq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='add'>+	struct virtnet_sq_free_stats stats = {};</div><div class='add'>+	struct net_device *dev = vi-&gt;dev;</div><div class='add'>+	u64 kicks = 0;</div><div class='add'>+	int sent;</div><div class='add'>+</div><div class='add'>+	/* Avoid to wakeup napi meanless, so call __free_old_xmit instead of</div><div class='add'>+	 * free_old_xmit().</div><div class='add'>+	 */</div><div class='add'>+	__free_old_xmit(sq, netdev_get_tx_queue(dev, sq - vi-&gt;sq), true, &amp;stats);</div><div class='add'>+</div><div class='add'>+	if (stats.xsk)</div><div class='add'>+		xsk_tx_completed(sq-&gt;xsk_pool, stats.xsk);</div><div class='add'>+</div><div class='add'>+	sent = virtnet_xsk_xmit_batch(sq, pool, budget, &amp;kicks);</div><div class='add'>+</div><div class='add'>+	if (!is_xdp_raw_buffer_queue(vi, sq - vi-&gt;sq))</div><div class='add'>+		check_sq_full_and_disable(vi, vi-&gt;dev, sq);</div><div class='add'>+</div><div class='add'>+	if (sent) {</div><div class='add'>+		struct netdev_queue *txq;</div><div class='add'>+</div><div class='add'>+		txq = netdev_get_tx_queue(vi-&gt;dev, sq - vi-&gt;sq);</div><div class='add'>+		txq_trans_cond_update(txq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;sq-&gt;stats.syncp);</div><div class='add'>+	u64_stats_add(&amp;sq-&gt;stats.packets, stats.packets);</div><div class='add'>+	u64_stats_add(&amp;sq-&gt;stats.bytes,   stats.bytes);</div><div class='add'>+	u64_stats_add(&amp;sq-&gt;stats.kicks,   kicks);</div><div class='add'>+	u64_stats_add(&amp;sq-&gt;stats.xdp_tx,  sent);</div><div class='add'>+	u64_stats_update_end(&amp;sq-&gt;stats.syncp);</div><div class='add'>+</div><div class='add'>+	if (xsk_uses_need_wakeup(pool))</div><div class='add'>+		xsk_set_tx_need_wakeup(pool);</div><div class='add'>+</div><div class='add'>+	return sent;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xsk_wakeup(struct send_queue *sq)</div><div class='add'>+{</div><div class='add'>+	if (napi_if_scheduled_mark_missed(&amp;sq-&gt;napi))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	local_bh_disable();</div><div class='add'>+	virtqueue_napi_schedule(&amp;sq-&gt;napi, sq-&gt;vq);</div><div class='add'>+	local_bh_enable();</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int virtnet_xsk_wakeup(struct net_device *dev, u32 qid, u32 flag)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtnet_info *vi = netdev_priv(dev);</div><div class='hunk'>@@ -1381,14 +1628,19 @@ static int virtnet_xsk_wakeup(struct net_device *dev, u32 qid, u32 flag)</div><div class='ctx'> </div><div class='ctx'> 	sq = &amp;vi-&gt;sq[qid];</div><div class='ctx'> </div><div class='del'>-	if (napi_if_scheduled_mark_missed(&amp;sq-&gt;napi))</div><div class='del'>-		return 0;</div><div class='add'>+	xsk_wakeup(sq);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	local_bh_disable();</div><div class='del'>-	virtqueue_napi_schedule(&amp;sq-&gt;napi, sq-&gt;vq);</div><div class='del'>-	local_bh_enable();</div><div class='add'>+static void virtnet_xsk_completed(struct send_queue *sq, int num)</div><div class='add'>+{</div><div class='add'>+	xsk_tx_completed(sq-&gt;xsk_pool, num);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* If this is called by rx poll, start_xmit and xdp xmit we should</div><div class='add'>+	 * wakeup the tx napi to consume the xsk tx queue, because the tx</div><div class='add'>+	 * interrupt may not be triggered.</div><div class='add'>+	 */</div><div class='add'>+	xsk_wakeup(sq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __virtnet_xdp_xmit_one(struct virtnet_info *vi,</div><div class='hunk'>@@ -1431,8 +1683,7 @@ static int __virtnet_xdp_xmit_one(struct virtnet_info *vi,</div><div class='ctx'> 			    skb_frag_size(frag), skb_frag_off(frag));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = virtqueue_add_outbuf(sq-&gt;vq, sq-&gt;sg, nr_frags + 1,</div><div class='del'>-				   xdp_to_ptr(xdpf), GFP_ATOMIC);</div><div class='add'>+	err = virtnet_add_outbuf(sq, nr_frags + 1, xdpf, VIRTNET_XMIT_TYPE_XDP);</div><div class='ctx'> 	if (unlikely(err))</div><div class='ctx'> 		return -ENOSPC; /* Caller handle free/refcnt */</div><div class='ctx'> </div><div class='hunk'>@@ -1505,8 +1756,8 @@ static int virtnet_xdp_xmit(struct net_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Free up any pending old buffers before queueing new ones. */</div><div class='del'>-	__free_old_xmit(sq, netdev_get_tx_queue(dev, sq - vi-&gt;sq),</div><div class='del'>-			false, &amp;stats);</div><div class='add'>+	virtnet_free_old_xmit(sq, netdev_get_tx_queue(dev, sq - vi-&gt;sq),</div><div class='add'>+			      false, &amp;stats);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; n; i++) {</div><div class='ctx'> 		struct xdp_frame *xdpf = frames[i];</div><div class='hunk'>@@ -1625,7 +1876,8 @@ static unsigned int virtnet_get_headroom(struct virtnet_info *vi)</div><div class='ctx'>  * across multiple buffers (num_buf &gt; 1), and we make sure buffers</div><div class='ctx'>  * have enough headroom.</div><div class='ctx'>  */</div><div class='del'>-static struct page *xdp_linearize_page(struct receive_queue *rq,</div><div class='add'>+static struct page *xdp_linearize_page(struct net_device *dev,</div><div class='add'>+				       struct receive_queue *rq,</div><div class='ctx'> 				       int *num_buf,</div><div class='ctx'> 				       struct page *p,</div><div class='ctx'> 				       int offset,</div><div class='hunk'>@@ -1645,18 +1897,27 @@ static struct page *xdp_linearize_page(struct receive_queue *rq,</div><div class='ctx'> 	memcpy(page_address(page) + page_off, page_address(p) + offset, *len);</div><div class='ctx'> 	page_off += *len;</div><div class='ctx'> </div><div class='add'>+	/* Only mergeable mode can go inside this while loop. In small mode,</div><div class='add'>+	 * *num_buf == 1, so it cannot go inside.</div><div class='add'>+	 */</div><div class='ctx'> 	while (--*num_buf) {</div><div class='ctx'> 		unsigned int buflen;</div><div class='ctx'> 		void *buf;</div><div class='add'>+		void *ctx;</div><div class='ctx'> 		int off;</div><div class='ctx'> </div><div class='del'>-		buf = virtnet_rq_get_buf(rq, &amp;buflen, NULL);</div><div class='add'>+		buf = virtnet_rq_get_buf(rq, &amp;buflen, &amp;ctx);</div><div class='ctx'> 		if (unlikely(!buf))</div><div class='ctx'> 			goto err_buf;</div><div class='ctx'> </div><div class='ctx'> 		p = virt_to_head_page(buf);</div><div class='ctx'> 		off = buf - page_address(p);</div><div class='ctx'> </div><div class='add'>+		if (check_mergeable_len(dev, ctx, buflen)) {</div><div class='add'>+			put_page(p);</div><div class='add'>+			goto err_buf;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* guard against a misconfigured or uncooperative backend that</div><div class='ctx'> 		 * is sending packet larger than the MTU.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -1745,7 +2006,7 @@ static struct sk_buff *receive_small_xdp(struct net_device *dev,</div><div class='ctx'> 		headroom = vi-&gt;hdr_len + header_offset;</div><div class='ctx'> 		buflen = SKB_DATA_ALIGN(GOOD_PACKET_LEN + headroom) +</div><div class='ctx'> 			SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='del'>-		xdp_page = xdp_linearize_page(rq, &amp;num_buf, page,</div><div class='add'>+		xdp_page = xdp_linearize_page(dev, rq, &amp;num_buf, page,</div><div class='ctx'> 					      offset, header_offset,</div><div class='ctx'> 					      &amp;tlen);</div><div class='ctx'> 		if (!xdp_page)</div><div class='hunk'>@@ -1855,9 +2116,19 @@ static struct sk_buff *receive_big(struct net_device *dev,</div><div class='ctx'> 				   struct virtnet_rq_stats *stats)</div><div class='ctx'> {</div><div class='ctx'> 	struct page *page = buf;</div><div class='del'>-	struct sk_buff *skb =</div><div class='del'>-		page_to_skb(vi, rq, page, 0, len, PAGE_SIZE, 0);</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	/* Make sure that len does not exceed the size allocated in</div><div class='add'>+	 * add_recvbuf_big.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(len &gt; (vi-&gt;big_packets_num_skbfrags + 1) * PAGE_SIZE)) {</div><div class='add'>+		pr_debug("%s: rx error: len %u exceeds allocated size %lu\n",</div><div class='add'>+			 dev-&gt;name, len,</div><div class='add'>+			 (vi-&gt;big_packets_num_skbfrags + 1) * PAGE_SIZE);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	skb = page_to_skb(vi, rq, page, 0, len, PAGE_SIZE, 0);</div><div class='ctx'> 	u64_stats_add(&amp;stats-&gt;bytes, len - vi-&gt;hdr_len);</div><div class='ctx'> 	if (unlikely(!skb))</div><div class='ctx'> 		goto err;</div><div class='hunk'>@@ -1933,10 +2204,9 @@ static struct sk_buff *build_skb_from_xdp_buff(struct net_device *dev,</div><div class='ctx'> 		skb_metadata_set(skb, metasize);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(xdp_buff_has_frags(xdp)))</div><div class='del'>-		xdp_update_skb_shared_info(skb, nr_frags,</div><div class='del'>-					   sinfo-&gt;xdp_frags_size,</div><div class='del'>-					   xdp_frags_truesz,</div><div class='del'>-					   xdp_buff_is_frag_pfmemalloc(xdp));</div><div class='add'>+		xdp_update_skb_frags_info(skb, nr_frags, sinfo-&gt;xdp_frags_size,</div><div class='add'>+					  xdp_frags_truesz,</div><div class='add'>+					  xdp_buff_get_skb_flags(xdp));</div><div class='ctx'> </div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='hunk'>@@ -1954,10 +2224,9 @@ static int virtnet_build_xdp_buff_mrg(struct net_device *dev,</div><div class='ctx'> 				      struct virtnet_rq_stats *stats)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtio_net_hdr_mrg_rxbuf *hdr = buf;</div><div class='del'>-	unsigned int headroom, tailroom, room;</div><div class='del'>-	unsigned int truesize, cur_frag_size;</div><div class='ctx'> 	struct skb_shared_info *shinfo;</div><div class='ctx'> 	unsigned int xdp_frags_truesz = 0;</div><div class='add'>+	unsigned int truesize;</div><div class='ctx'> 	struct page *page;</div><div class='ctx'> 	skb_frag_t *frag;</div><div class='ctx'> 	int offset;</div><div class='hunk'>@@ -2000,21 +2269,14 @@ static int virtnet_build_xdp_buff_mrg(struct net_device *dev,</div><div class='ctx'> 		page = virt_to_head_page(buf);</div><div class='ctx'> 		offset = buf - page_address(page);</div><div class='ctx'> </div><div class='del'>-		truesize = mergeable_ctx_to_truesize(ctx);</div><div class='del'>-		headroom = mergeable_ctx_to_headroom(ctx);</div><div class='del'>-		tailroom = headroom ? sizeof(struct skb_shared_info) : 0;</div><div class='del'>-		room = SKB_DATA_ALIGN(headroom + tailroom);</div><div class='del'>-</div><div class='del'>-		cur_frag_size = truesize;</div><div class='del'>-		xdp_frags_truesz += cur_frag_size;</div><div class='del'>-		if (unlikely(len &gt; truesize - room || cur_frag_size &gt; PAGE_SIZE)) {</div><div class='add'>+		if (check_mergeable_len(dev, ctx, len)) {</div><div class='ctx'> 			put_page(page);</div><div class='del'>-			pr_debug("%s: rx error: len %u exceeds truesize %lu\n",</div><div class='del'>-				 dev-&gt;name, len, (unsigned long)(truesize - room));</div><div class='del'>-			DEV_STATS_INC(dev, rx_length_errors);</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		truesize = mergeable_ctx_to_truesize(ctx);</div><div class='add'>+		xdp_frags_truesz += truesize;</div><div class='add'>+</div><div class='ctx'> 		frag = &amp;shinfo-&gt;frags[shinfo-&gt;nr_frags++];</div><div class='ctx'> 		skb_frag_fill_page_desc(frag, page, offset, len);</div><div class='ctx'> 		if (page_is_pfmemalloc(page))</div><div class='hunk'>@@ -2080,7 +2342,7 @@ static void *mergeable_xdp_get_buf(struct virtnet_info *vi,</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!xdp_prog-&gt;aux-&gt;xdp_has_frags) {</div><div class='ctx'> 		/* linearize data for XDP */</div><div class='del'>-		xdp_page = xdp_linearize_page(rq, num_buf,</div><div class='add'>+		xdp_page = xdp_linearize_page(vi-&gt;dev, rq, num_buf,</div><div class='ctx'> 					      *page, offset,</div><div class='ctx'> 					      XDP_PACKET_HEADROOM,</div><div class='ctx'> 					      len);</div><div class='hunk'>@@ -2228,18 +2490,12 @@ static struct sk_buff *receive_mergeable(struct net_device *dev,</div><div class='ctx'> 	struct sk_buff *head_skb, *curr_skb;</div><div class='ctx'> 	unsigned int truesize = mergeable_ctx_to_truesize(ctx);</div><div class='ctx'> 	unsigned int headroom = mergeable_ctx_to_headroom(ctx);</div><div class='del'>-	unsigned int tailroom = headroom ? sizeof(struct skb_shared_info) : 0;</div><div class='del'>-	unsigned int room = SKB_DATA_ALIGN(headroom + tailroom);</div><div class='ctx'> </div><div class='ctx'> 	head_skb = NULL;</div><div class='ctx'> 	u64_stats_add(&amp;stats-&gt;bytes, len - vi-&gt;hdr_len);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(len &gt; truesize - room)) {</div><div class='del'>-		pr_debug("%s: rx error: len %u exceeds truesize %lu\n",</div><div class='del'>-			 dev-&gt;name, len, (unsigned long)(truesize - room));</div><div class='del'>-		DEV_STATS_INC(dev, rx_length_errors);</div><div class='add'>+	if (check_mergeable_len(dev, ctx, len))</div><div class='ctx'> 		goto err_skb;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(vi-&gt;xdp_enabled)) {</div><div class='ctx'> 		struct bpf_prog *xdp_prog;</div><div class='hunk'>@@ -2274,17 +2530,10 @@ static struct sk_buff *receive_mergeable(struct net_device *dev,</div><div class='ctx'> 		u64_stats_add(&amp;stats-&gt;bytes, len);</div><div class='ctx'> 		page = virt_to_head_page(buf);</div><div class='ctx'> </div><div class='del'>-		truesize = mergeable_ctx_to_truesize(ctx);</div><div class='del'>-		headroom = mergeable_ctx_to_headroom(ctx);</div><div class='del'>-		tailroom = headroom ? sizeof(struct skb_shared_info) : 0;</div><div class='del'>-		room = SKB_DATA_ALIGN(headroom + tailroom);</div><div class='del'>-		if (unlikely(len &gt; truesize - room)) {</div><div class='del'>-			pr_debug("%s: rx error: len %u exceeds truesize %lu\n",</div><div class='del'>-				 dev-&gt;name, len, (unsigned long)(truesize - room));</div><div class='del'>-			DEV_STATS_INC(dev, rx_length_errors);</div><div class='add'>+		if (check_mergeable_len(dev, ctx, len))</div><div class='ctx'> 			goto err_skb;</div><div class='del'>-		}</div><div class='ctx'> </div><div class='add'>+		truesize = mergeable_ctx_to_truesize(ctx);</div><div class='ctx'> 		curr_skb  = virtnet_skb_append_frag(head_skb, curr_skb, page,</div><div class='ctx'> 						    buf, len, truesize);</div><div class='ctx'> 		if (!curr_skb)</div><div class='hunk'>@@ -2304,6 +2553,13 @@ err_buf:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline u32</div><div class='add'>+virtio_net_hash_value(const struct virtio_net_hdr_v1_hash *hdr_hash)</div><div class='add'>+{</div><div class='add'>+	return __le16_to_cpu(hdr_hash-&gt;hash_value_lo) |</div><div class='add'>+		(__le16_to_cpu(hdr_hash-&gt;hash_value_hi) &lt;&lt; 16);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void virtio_skb_set_hash(const struct virtio_net_hdr_v1_hash *hdr_hash,</div><div class='ctx'> 				struct sk_buff *skb)</div><div class='ctx'> {</div><div class='hunk'>@@ -2330,7 +2586,7 @@ static void virtio_skb_set_hash(const struct virtio_net_hdr_v1_hash *hdr_hash,</div><div class='ctx'> 	default:</div><div class='ctx'> 		rss_hash_type = PKT_HASH_TYPE_NONE;</div><div class='ctx'> 	}</div><div class='del'>-	skb_set_hash(skb, __le32_to_cpu(hdr_hash-&gt;hash_value), rss_hash_type);</div><div class='add'>+	skb_set_hash(skb, virtio_net_hash_value(hdr_hash), rss_hash_type);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void virtnet_receive_done(struct virtnet_info *vi, struct receive_queue *rq,</div><div class='hunk'>@@ -2343,14 +2599,21 @@ static void virtnet_receive_done(struct virtnet_info *vi, struct receive_queue *</div><div class='ctx'> 	if (dev-&gt;features &amp; NETIF_F_RXHASH &amp;&amp; vi-&gt;has_rss_hash_report)</div><div class='ctx'> 		virtio_skb_set_hash(&amp;hdr-&gt;hash_v1_hdr, skb);</div><div class='ctx'> </div><div class='del'>-	if (flags &amp; VIRTIO_NET_HDR_F_DATA_VALID)</div><div class='del'>-		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+	hdr-&gt;hdr.flags = flags;</div><div class='add'>+	if (virtio_net_handle_csum_offload(skb, &amp;hdr-&gt;hdr, vi-&gt;rx_tnl_csum)) {</div><div class='add'>+		net_warn_ratelimited("%s: bad csum: flags: %x, gso_type: %x rx_tnl_csum %d\n",</div><div class='add'>+				     dev-&gt;name, hdr-&gt;hdr.flags,</div><div class='add'>+				     hdr-&gt;hdr.gso_type, vi-&gt;rx_tnl_csum);</div><div class='add'>+		goto frame_err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (virtio_net_hdr_to_skb(skb, &amp;hdr-&gt;hdr,</div><div class='del'>-				  virtio_is_little_endian(vi-&gt;vdev))) {</div><div class='del'>-		net_warn_ratelimited("%s: bad gso: type: %u, size: %u\n",</div><div class='add'>+	if (virtio_net_hdr_tnl_to_skb(skb, &amp;hdr-&gt;tnl_hdr, vi-&gt;rx_tnl,</div><div class='add'>+				      vi-&gt;rx_tnl_csum,</div><div class='add'>+				      virtio_is_little_endian(vi-&gt;vdev))) {</div><div class='add'>+		net_warn_ratelimited("%s: bad gso: type: %x, size: %u, flags %x tunnel %d tnl csum %d\n",</div><div class='ctx'> 				     dev-&gt;name, hdr-&gt;hdr.gso_type,</div><div class='del'>-				     hdr-&gt;hdr.gso_size);</div><div class='add'>+				     hdr-&gt;hdr.gso_size, hdr-&gt;hdr.flags,</div><div class='add'>+				     vi-&gt;rx_tnl, vi-&gt;rx_tnl_csum);</div><div class='ctx'> 		goto frame_err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2383,22 +2646,28 @@ static void receive_buf(struct virtnet_info *vi, struct receive_queue *rq,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* 1. Save the flags early, as the XDP program might overwrite them.</div><div class='add'>+	/* About the flags below:</div><div class='add'>+	 * 1. Save the flags early, as the XDP program might overwrite them.</div><div class='ctx'> 	 * These flags ensure packets marked as VIRTIO_NET_HDR_F_DATA_VALID</div><div class='ctx'> 	 * stay valid after XDP processing.</div><div class='ctx'> 	 * 2. XDP doesn't work with partially checksummed packets (refer to</div><div class='ctx'> 	 * virtnet_xdp_set()), so packets marked as</div><div class='ctx'> 	 * VIRTIO_NET_HDR_F_NEEDS_CSUM get dropped during XDP processing.</div><div class='ctx'> 	 */</div><div class='del'>-	flags = ((struct virtio_net_common_hdr *)buf)-&gt;hdr.flags;</div><div class='ctx'> </div><div class='del'>-	if (vi-&gt;mergeable_rx_bufs)</div><div class='add'>+	if (vi-&gt;mergeable_rx_bufs) {</div><div class='add'>+		flags = ((struct virtio_net_common_hdr *)buf)-&gt;hdr.flags;</div><div class='ctx'> 		skb = receive_mergeable(dev, vi, rq, buf, ctx, len, xdp_xmit,</div><div class='ctx'> 					stats);</div><div class='del'>-	else if (vi-&gt;big_packets)</div><div class='add'>+	} else if (vi-&gt;big_packets) {</div><div class='add'>+		void *p = page_address((struct page *)buf);</div><div class='add'>+</div><div class='add'>+		flags = ((struct virtio_net_common_hdr *)p)-&gt;hdr.flags;</div><div class='ctx'> 		skb = receive_big(dev, vi, rq, buf, len, stats);</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='add'>+		flags = ((struct virtio_net_common_hdr *)buf)-&gt;hdr.flags;</div><div class='ctx'> 		skb = receive_small(dev, vi, rq, buf, ctx, len, xdp_xmit, stats);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!skb))</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -2423,6 +2692,9 @@ static int add_recvbuf_small(struct virtnet_info *vi, struct receive_queue *rq,</div><div class='ctx'> 	len = SKB_DATA_ALIGN(len) +</div><div class='ctx'> 	      SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='ctx'> </div><div class='add'>+	if (unlikely(!skb_page_frag_refill(len, &amp;rq-&gt;alloc_frag, gfp)))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	buf = virtnet_rq_alloc(rq, len, gfp);</div><div class='ctx'> 	if (unlikely(!buf))</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -2431,10 +2703,9 @@ static int add_recvbuf_small(struct virtnet_info *vi, struct receive_queue *rq,</div><div class='ctx'> </div><div class='ctx'> 	virtnet_rq_init_one_sg(rq, buf, vi-&gt;hdr_len + GOOD_PACKET_LEN);</div><div class='ctx'> </div><div class='del'>-	err = virtqueue_add_inbuf_ctx(rq-&gt;vq, rq-&gt;sg, 1, buf, ctx, gfp);</div><div class='add'>+	err = virtqueue_add_inbuf_premapped(rq-&gt;vq, rq-&gt;sg, 1, buf, ctx, gfp);</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='del'>-		if (rq-&gt;do_dma)</div><div class='del'>-			virtnet_rq_unmap(rq, buf, 0);</div><div class='add'>+		virtnet_rq_unmap(rq, buf, 0);</div><div class='ctx'> 		put_page(virt_to_head_page(buf));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2525,6 +2796,12 @@ static int add_recvbuf_mergeable(struct virtnet_info *vi,</div><div class='ctx'> 	 */</div><div class='ctx'> 	len = get_mergeable_buf_len(rq, &amp;rq-&gt;mrg_avg_pkt_len, room);</div><div class='ctx'> </div><div class='add'>+	if (unlikely(!skb_page_frag_refill(len + room, alloc_frag, gfp)))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (!alloc_frag-&gt;offset &amp;&amp; len + room + sizeof(struct virtnet_rq_dma) &gt; alloc_frag-&gt;size)</div><div class='add'>+		len -= sizeof(struct virtnet_rq_dma);</div><div class='add'>+</div><div class='ctx'> 	buf = virtnet_rq_alloc(rq, len + room, gfp);</div><div class='ctx'> 	if (unlikely(!buf))</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -2546,10 +2823,9 @@ static int add_recvbuf_mergeable(struct virtnet_info *vi,</div><div class='ctx'> 	virtnet_rq_init_one_sg(rq, buf, len);</div><div class='ctx'> </div><div class='ctx'> 	ctx = mergeable_len_to_ctx(len + room, headroom);</div><div class='del'>-	err = virtqueue_add_inbuf_ctx(rq-&gt;vq, rq-&gt;sg, 1, buf, ctx, gfp);</div><div class='add'>+	err = virtqueue_add_inbuf_premapped(rq-&gt;vq, rq-&gt;sg, 1, buf, ctx, gfp);</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='del'>-		if (rq-&gt;do_dma)</div><div class='del'>-			virtnet_rq_unmap(rq, buf, 0);</div><div class='add'>+		virtnet_rq_unmap(rq, buf, 0);</div><div class='ctx'> 		put_page(virt_to_head_page(buf));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2606,7 +2882,8 @@ static void skb_recv_done(struct virtqueue *rvq)</div><div class='ctx'> 	virtqueue_napi_schedule(&amp;rq-&gt;napi, rvq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void virtnet_napi_enable(struct virtqueue *vq, struct napi_struct *napi)</div><div class='add'>+static void virtnet_napi_do_enable(struct virtqueue *vq,</div><div class='add'>+				   struct napi_struct *napi)</div><div class='ctx'> {</div><div class='ctx'> 	napi_enable(napi);</div><div class='ctx'> </div><div class='hunk'>@@ -2619,10 +2896,21 @@ static void virtnet_napi_enable(struct virtqueue *vq, struct napi_struct *napi)</div><div class='ctx'> 	local_bh_enable();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void virtnet_napi_tx_enable(struct virtnet_info *vi,</div><div class='del'>-				   struct virtqueue *vq,</div><div class='del'>-				   struct napi_struct *napi)</div><div class='add'>+static void virtnet_napi_enable(struct receive_queue *rq)</div><div class='ctx'> {</div><div class='add'>+	struct virtnet_info *vi = rq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='add'>+	int qidx = vq2rxq(rq-&gt;vq);</div><div class='add'>+</div><div class='add'>+	virtnet_napi_do_enable(rq-&gt;vq, &amp;rq-&gt;napi);</div><div class='add'>+	netif_queue_set_napi(vi-&gt;dev, qidx, NETDEV_QUEUE_TYPE_RX, &amp;rq-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void virtnet_napi_tx_enable(struct send_queue *sq)</div><div class='add'>+{</div><div class='add'>+	struct virtnet_info *vi = sq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='add'>+	struct napi_struct *napi = &amp;sq-&gt;napi;</div><div class='add'>+	int qidx = vq2txq(sq-&gt;vq);</div><div class='add'>+</div><div class='ctx'> 	if (!napi-&gt;weight)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -2634,13 +2922,30 @@ static void virtnet_napi_tx_enable(struct virtnet_info *vi,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return virtnet_napi_enable(vq, napi);</div><div class='add'>+	virtnet_napi_do_enable(sq-&gt;vq, napi);</div><div class='add'>+	netif_queue_set_napi(vi-&gt;dev, qidx, NETDEV_QUEUE_TYPE_TX, napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void virtnet_napi_tx_disable(struct napi_struct *napi)</div><div class='add'>+static void virtnet_napi_tx_disable(struct send_queue *sq)</div><div class='ctx'> {</div><div class='del'>-	if (napi-&gt;weight)</div><div class='add'>+	struct virtnet_info *vi = sq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='add'>+	struct napi_struct *napi = &amp;sq-&gt;napi;</div><div class='add'>+	int qidx = vq2txq(sq-&gt;vq);</div><div class='add'>+</div><div class='add'>+	if (napi-&gt;weight) {</div><div class='add'>+		netif_queue_set_napi(vi-&gt;dev, qidx, NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='ctx'> 		napi_disable(napi);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void virtnet_napi_disable(struct receive_queue *rq)</div><div class='add'>+{</div><div class='add'>+	struct virtnet_info *vi = rq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='add'>+	struct napi_struct *napi = &amp;rq-&gt;napi;</div><div class='add'>+	int qidx = vq2rxq(rq-&gt;vq);</div><div class='add'>+</div><div class='add'>+	netif_queue_set_napi(vi-&gt;dev, qidx, NETDEV_QUEUE_TYPE_RX, NULL);</div><div class='add'>+	napi_disable(napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void refill_work(struct work_struct *work)</div><div class='hunk'>@@ -2653,9 +2958,23 @@ static void refill_work(struct work_struct *work)</div><div class='ctx'> 	for (i = 0; i &lt; vi-&gt;curr_queue_pairs; i++) {</div><div class='ctx'> 		struct receive_queue *rq = &amp;vi-&gt;rq[i];</div><div class='ctx'> </div><div class='add'>+		/*</div><div class='add'>+		 * When queue API support is added in the future and the call</div><div class='add'>+		 * below becomes napi_disable_locked, this driver will need to</div><div class='add'>+		 * be refactored.</div><div class='add'>+		 *</div><div class='add'>+		 * One possible solution would be to:</div><div class='add'>+		 *   - cancel refill_work with cancel_delayed_work (note:</div><div class='add'>+		 *     non-sync)</div><div class='add'>+		 *   - cancel refill_work with cancel_delayed_work_sync in</div><div class='add'>+		 *     virtnet_remove after the netdev is unregistered</div><div class='add'>+		 *   - wrap all of the work in a lock (perhaps the netdev</div><div class='add'>+		 *     instance lock)</div><div class='add'>+		 *   - check netif_running() and return early to avoid a race</div><div class='add'>+		 */</div><div class='ctx'> 		napi_disable(&amp;rq-&gt;napi);</div><div class='ctx'> 		still_empty = !try_fill_recv(vi, rq, GFP_KERNEL);</div><div class='del'>-		virtnet_napi_enable(rq-&gt;vq, &amp;rq-&gt;napi);</div><div class='add'>+		virtnet_napi_do_enable(rq-&gt;vq, &amp;rq-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 		/* In theory, this can happen: if we don't get any buffers in</div><div class='ctx'> 		 * we will *never* try to fill again.</div><div class='hunk'>@@ -2706,7 +3025,7 @@ static int virtnet_receive_packets(struct virtnet_info *vi,</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		while (packets &lt; budget &amp;&amp;</div><div class='del'>-		       (buf = virtnet_rq_get_buf(rq, &amp;len, NULL)) != NULL) {</div><div class='add'>+		       (buf = virtqueue_get_buf(rq-&gt;vq, &amp;len)) != NULL) {</div><div class='ctx'> 			receive_buf(vi, rq, buf, len, NULL, xdp_xmit, stats);</div><div class='ctx'> 			packets++;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2776,14 +3095,8 @@ static void virtnet_poll_cleantx(struct receive_queue *rq, int budget)</div><div class='ctx'> 			free_old_xmit(sq, txq, !!budget);</div><div class='ctx'> 		} while (unlikely(!virtqueue_enable_cb_delayed(sq-&gt;vq)));</div><div class='ctx'> </div><div class='del'>-		if (sq-&gt;vq-&gt;num_free &gt;= 2 + MAX_SKB_FRAGS) {</div><div class='del'>-			if (netif_tx_queue_stopped(txq)) {</div><div class='del'>-				u64_stats_update_begin(&amp;sq-&gt;stats.syncp);</div><div class='del'>-				u64_stats_inc(&amp;sq-&gt;stats.wake);</div><div class='del'>-				u64_stats_update_end(&amp;sq-&gt;stats.syncp);</div><div class='del'>-			}</div><div class='del'>-			netif_tx_wake_queue(txq);</div><div class='del'>-		}</div><div class='add'>+		if (sq-&gt;vq-&gt;num_free &gt;= MAX_SKB_FRAGS + 2)</div><div class='add'>+			virtnet_tx_wake_queue(vi, sq);</div><div class='ctx'> </div><div class='ctx'> 		__netif_tx_unlock(txq);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2852,8 +3165,8 @@ static int virtnet_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> static void virtnet_disable_queue_pair(struct virtnet_info *vi, int qp_index)</div><div class='ctx'> {</div><div class='del'>-	virtnet_napi_tx_disable(&amp;vi-&gt;sq[qp_index].napi);</div><div class='del'>-	napi_disable(&amp;vi-&gt;rq[qp_index].napi);</div><div class='add'>+	virtnet_napi_tx_disable(&amp;vi-&gt;sq[qp_index]);</div><div class='add'>+	virtnet_napi_disable(&amp;vi-&gt;rq[qp_index]);</div><div class='ctx'> 	xdp_rxq_info_unreg(&amp;vi-&gt;rq[qp_index].xdp_rxq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2872,9 +3185,8 @@ static int virtnet_enable_queue_pair(struct virtnet_info *vi, int qp_index)</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto err_xdp_reg_mem_model;</div><div class='ctx'> </div><div class='del'>-	netdev_tx_reset_queue(netdev_get_tx_queue(vi-&gt;dev, qp_index));</div><div class='del'>-	virtnet_napi_enable(vi-&gt;rq[qp_index].vq, &amp;vi-&gt;rq[qp_index].napi);</div><div class='del'>-	virtnet_napi_tx_enable(vi, vi-&gt;sq[qp_index].vq, &amp;vi-&gt;sq[qp_index].napi);</div><div class='add'>+	virtnet_napi_enable(&amp;vi-&gt;rq[qp_index]);</div><div class='add'>+	virtnet_napi_tx_enable(&amp;vi-&gt;sq[qp_index]);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -2956,7 +3268,7 @@ static int virtnet_poll_tx(struct napi_struct *napi, int budget)</div><div class='ctx'> 	struct virtnet_info *vi = sq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='ctx'> 	unsigned int index = vq2txq(sq-&gt;vq);</div><div class='ctx'> 	struct netdev_queue *txq;</div><div class='del'>-	int opaque;</div><div class='add'>+	int opaque, xsk_done = 0;</div><div class='ctx'> 	bool done;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(is_xdp_raw_buffer_queue(vi, index))) {</div><div class='hunk'>@@ -2968,15 +3280,18 @@ static int virtnet_poll_tx(struct napi_struct *napi, int budget)</div><div class='ctx'> 	txq = netdev_get_tx_queue(vi-&gt;dev, index);</div><div class='ctx'> 	__netif_tx_lock(txq, raw_smp_processor_id());</div><div class='ctx'> 	virtqueue_disable_cb(sq-&gt;vq);</div><div class='del'>-	free_old_xmit(sq, txq, !!budget);</div><div class='ctx'> </div><div class='del'>-	if (sq-&gt;vq-&gt;num_free &gt;= 2 + MAX_SKB_FRAGS) {</div><div class='del'>-		if (netif_tx_queue_stopped(txq)) {</div><div class='del'>-			u64_stats_update_begin(&amp;sq-&gt;stats.syncp);</div><div class='del'>-			u64_stats_inc(&amp;sq-&gt;stats.wake);</div><div class='del'>-			u64_stats_update_end(&amp;sq-&gt;stats.syncp);</div><div class='del'>-		}</div><div class='del'>-		netif_tx_wake_queue(txq);</div><div class='add'>+	if (sq-&gt;xsk_pool)</div><div class='add'>+		xsk_done = virtnet_xsk_xmit(sq, sq-&gt;xsk_pool, budget);</div><div class='add'>+	else</div><div class='add'>+		free_old_xmit(sq, txq, !!budget);</div><div class='add'>+</div><div class='add'>+	if (sq-&gt;vq-&gt;num_free &gt;= MAX_SKB_FRAGS + 2)</div><div class='add'>+		virtnet_tx_wake_queue(vi, sq);</div><div class='add'>+</div><div class='add'>+	if (xsk_done &gt;= budget) {</div><div class='add'>+		__netif_tx_unlock(txq);</div><div class='add'>+		return budget;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	opaque = virtqueue_enable_cb_prepare(sq-&gt;vq);</div><div class='hunk'>@@ -3004,32 +3319,37 @@ static int virtnet_poll_tx(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> static int xmit_skb(struct send_queue *sq, struct sk_buff *skb, bool orphan)</div><div class='ctx'> {</div><div class='del'>-	struct virtio_net_hdr_mrg_rxbuf *hdr;</div><div class='ctx'> 	const unsigned char *dest = ((struct ethhdr *)skb-&gt;data)-&gt;h_dest;</div><div class='ctx'> 	struct virtnet_info *vi = sq-&gt;vq-&gt;vdev-&gt;priv;</div><div class='add'>+	struct virtio_net_hdr_v1_hash_tunnel *hdr;</div><div class='ctx'> 	int num_sg;</div><div class='ctx'> 	unsigned hdr_len = vi-&gt;hdr_len;</div><div class='ctx'> 	bool can_push;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: xmit %p %pM\n", vi-&gt;dev-&gt;name, skb, dest);</div><div class='ctx'> </div><div class='add'>+	/* Make sure it's safe to cast between formats */</div><div class='add'>+	BUILD_BUG_ON(__alignof__(*hdr) != __alignof__(hdr-&gt;hash_hdr));</div><div class='add'>+	BUILD_BUG_ON(__alignof__(*hdr) != __alignof__(hdr-&gt;hash_hdr.hdr));</div><div class='add'>+</div><div class='ctx'> 	can_push = vi-&gt;any_header_sg &amp;&amp;</div><div class='ctx'> 		!((unsigned long)skb-&gt;data &amp; (__alignof__(*hdr) - 1)) &amp;&amp;</div><div class='ctx'> 		!skb_header_cloned(skb) &amp;&amp; skb_headroom(skb) &gt;= hdr_len;</div><div class='ctx'> 	/* Even if we can, don't push here yet as this would skew</div><div class='ctx'> 	 * csum_start offset below. */</div><div class='ctx'> 	if (can_push)</div><div class='del'>-		hdr = (struct virtio_net_hdr_mrg_rxbuf *)(skb-&gt;data - hdr_len);</div><div class='add'>+		hdr = (struct virtio_net_hdr_v1_hash_tunnel *)(skb-&gt;data -</div><div class='add'>+							       hdr_len);</div><div class='ctx'> 	else</div><div class='del'>-		hdr = &amp;skb_vnet_common_hdr(skb)-&gt;mrg_hdr;</div><div class='add'>+		hdr = &amp;skb_vnet_common_hdr(skb)-&gt;tnl_hdr;</div><div class='ctx'> </div><div class='del'>-	if (virtio_net_hdr_from_skb(skb, &amp;hdr-&gt;hdr,</div><div class='del'>-				    virtio_is_little_endian(vi-&gt;vdev), false,</div><div class='del'>-				    0))</div><div class='add'>+	if (virtio_net_hdr_tnl_from_skb(skb, hdr, vi-&gt;tx_tnl,</div><div class='add'>+					virtio_is_little_endian(vi-&gt;vdev), 0,</div><div class='add'>+					false))</div><div class='ctx'> 		return -EPROTO;</div><div class='ctx'> </div><div class='ctx'> 	if (vi-&gt;mergeable_rx_bufs)</div><div class='del'>-		hdr-&gt;num_buffers = 0;</div><div class='add'>+		hdr-&gt;hash_hdr.hdr.num_buffers = 0;</div><div class='ctx'> </div><div class='ctx'> 	sg_init_table(sq-&gt;sg, skb_shinfo(skb)-&gt;nr_frags + (can_push ? 1 : 2));</div><div class='ctx'> 	if (can_push) {</div><div class='hunk'>@@ -3046,8 +3366,9 @@ static int xmit_skb(struct send_queue *sq, struct sk_buff *skb, bool orphan)</div><div class='ctx'> 			return num_sg;</div><div class='ctx'> 		num_sg++;</div><div class='ctx'> 	}</div><div class='del'>-	return virtqueue_add_outbuf(sq-&gt;vq, sq-&gt;sg, num_sg,</div><div class='del'>-				    skb_to_ptr(skb, orphan), GFP_ATOMIC);</div><div class='add'>+</div><div class='add'>+	return virtnet_add_outbuf(sq, num_sg, skb,</div><div class='add'>+				  orphan ? VIRTNET_XMIT_TYPE_SKB_ORPHAN : VIRTNET_XMIT_TYPE_SKB);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='hunk'>@@ -3061,15 +3382,10 @@ static netdev_tx_t start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	bool use_napi = sq-&gt;napi.weight;</div><div class='ctx'> 	bool kick;</div><div class='ctx'> </div><div class='del'>-	/* Free up any pending old buffers before queueing new ones. */</div><div class='del'>-	do {</div><div class='del'>-		if (use_napi)</div><div class='del'>-			virtqueue_disable_cb(sq-&gt;vq);</div><div class='del'>-</div><div class='add'>+	if (!use_napi)</div><div class='ctx'> 		free_old_xmit(sq, txq, false);</div><div class='del'>-</div><div class='del'>-	} while (use_napi &amp;&amp; !xmit_more &amp;&amp;</div><div class='del'>-	       unlikely(!virtqueue_enable_cb_delayed(sq-&gt;vq)));</div><div class='add'>+	else</div><div class='add'>+		virtqueue_disable_cb(sq-&gt;vq);</div><div class='ctx'> </div><div class='ctx'> 	/* timestamp packet in software */</div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='hunk'>@@ -3095,7 +3411,10 @@ static netdev_tx_t start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		nf_reset_ct(skb);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	check_sq_full_and_disable(vi, dev, sq);</div><div class='add'>+	if (use_napi)</div><div class='add'>+		tx_may_stop(vi, dev, sq);</div><div class='add'>+	else</div><div class='add'>+		check_sq_full_and_disable(vi, dev,sq);</div><div class='ctx'> </div><div class='ctx'> 	kick = use_napi ? __netdev_tx_sent_queue(txq, skb-&gt;len, xmit_more) :</div><div class='ctx'> 			  !xmit_more || netif_xmit_stopped(txq);</div><div class='hunk'>@@ -3107,28 +3426,81 @@ static netdev_tx_t start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (use_napi &amp;&amp; kick &amp;&amp; unlikely(!virtqueue_enable_cb_delayed(sq-&gt;vq)))</div><div class='add'>+		virtqueue_napi_schedule(&amp;sq-&gt;napi, sq-&gt;vq);</div><div class='add'>+</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void virtnet_rx_pause(struct virtnet_info *vi, struct receive_queue *rq)</div><div class='add'>+static void __virtnet_rx_pause(struct virtnet_info *vi,</div><div class='add'>+			       struct receive_queue *rq)</div><div class='ctx'> {</div><div class='ctx'> 	bool running = netif_running(vi-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	if (running) {</div><div class='del'>-		napi_disable(&amp;rq-&gt;napi);</div><div class='add'>+		virtnet_napi_disable(rq);</div><div class='ctx'> 		virtnet_cancel_dim(vi, &amp;rq-&gt;dim);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void virtnet_rx_resume(struct virtnet_info *vi, struct receive_queue *rq)</div><div class='add'>+static void virtnet_rx_pause_all(struct virtnet_info *vi)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure refill_work does not run concurrently to</div><div class='add'>+	 * avoid napi_disable race which leads to deadlock.</div><div class='add'>+	 */</div><div class='add'>+	disable_delayed_refill(vi);</div><div class='add'>+	cancel_delayed_work_sync(&amp;vi-&gt;refill);</div><div class='add'>+	for (i = 0; i &lt; vi-&gt;max_queue_pairs; i++)</div><div class='add'>+		__virtnet_rx_pause(vi, &amp;vi-&gt;rq[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void virtnet_rx_pause(struct virtnet_info *vi, struct receive_queue *rq)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure refill_work does not run concurrently to</div><div class='add'>+	 * avoid napi_disable race which leads to deadlock.</div><div class='add'>+	 */</div><div class='add'>+	disable_delayed_refill(vi);</div><div class='add'>+	cancel_delayed_work_sync(&amp;vi-&gt;refill);</div><div class='add'>+	__virtnet_rx_pause(vi, rq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __virtnet_rx_resume(struct virtnet_info *vi,</div><div class='add'>+				struct receive_queue *rq,</div><div class='add'>+				bool refill)</div><div class='ctx'> {</div><div class='ctx'> 	bool running = netif_running(vi-&gt;dev);</div><div class='add'>+	bool schedule_refill = false;</div><div class='ctx'> </div><div class='del'>-	if (!try_fill_recv(vi, rq, GFP_KERNEL))</div><div class='add'>+	if (refill &amp;&amp; !try_fill_recv(vi, rq, GFP_KERNEL))</div><div class='add'>+		schedule_refill = true;</div><div class='add'>+	if (running)</div><div class='add'>+		virtnet_napi_enable(rq);</div><div class='add'>+</div><div class='add'>+	if (schedule_refill)</div><div class='ctx'> 		schedule_delayed_work(&amp;vi-&gt;refill, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (running)</div><div class='del'>-		virtnet_napi_enable(rq-&gt;vq, &amp;rq-&gt;napi);</div><div class='add'>+static void virtnet_rx_resume_all(struct virtnet_info *vi)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	enable_delayed_refill(vi);</div><div class='add'>+	for (i = 0; i &lt; vi-&gt;max_queue_pairs; i++) {</div><div class='add'>+		if (i &lt; vi-&gt;curr_queue_pairs)</div><div class='add'>+			__virtnet_rx_resume(vi, &amp;vi-&gt;rq[i], true);</div><div class='add'>+		else</div><div class='add'>+			__virtnet_rx_resume(vi, &amp;vi-&gt;rq[i], false);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void virtnet_rx_resume(struct virtnet_info *vi, struct receive_queue *rq)</div><div class='add'>+{</div><div class='add'>+	enable_delayed_refill(vi);</div><div class='add'>+	__virtnet_rx_resume(vi, rq, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int virtnet_rx_resize(struct virtnet_info *vi,</div><div class='hunk'>@@ -3140,7 +3512,7 @@ static int virtnet_rx_resize(struct virtnet_info *vi,</div><div class='ctx'> </div><div class='ctx'> 	virtnet_rx_pause(vi, rq);</div><div class='ctx'> </div><div class='del'>-	err = virtqueue_resize(rq-&gt;vq, ring_num, virtnet_rq_unmap_free_buf);</div><div class='add'>+	err = virtqueue_resize(rq-&gt;vq, ring_num, virtnet_rq_unmap_free_buf, NULL);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		netdev_err(vi-&gt;dev, "resize rx fail: rx queue index: %d err: %d\n", qindex, err);</div><div class='ctx'> </div><div class='hunk'>@@ -3157,7 +3529,7 @@ static void virtnet_tx_pause(struct virtnet_info *vi, struct send_queue *sq)</div><div class='ctx'> 	qindex = sq - vi-&gt;sq;</div><div class='ctx'> </div><div class='ctx'> 	if (running)</div><div class='del'>-		virtnet_napi_tx_disable(&amp;sq-&gt;napi);</div><div class='add'>+		virtnet_napi_tx_disable(sq);</div><div class='ctx'> </div><div class='ctx'> 	txq = netdev_get_tx_queue(vi-&gt;dev, qindex);</div><div class='ctx'> </div><div class='hunk'>@@ -3171,6 +3543,9 @@ static void virtnet_tx_pause(struct virtnet_info *vi, struct send_queue *sq)</div><div class='ctx'> </div><div class='ctx'> 	/* Prevent the upper layer from trying to send packets. */</div><div class='ctx'> 	netif_stop_subqueue(vi-&gt;dev, qindex);</div><div class='add'>+	u64_stats_update_begin(&amp;sq-&gt;stats.syncp);</div><div class='add'>+	u64_stats_inc(&amp;sq-&gt;stats.stop);</div><div class='add'>+	u64_stats_update_end(&amp;sq-&gt;stats.syncp);</div><div class='ctx'> </div><div class='ctx'> 	__netif_tx_unlock_bh(txq);</div><div class='ctx'> }</div><div class='hunk'>@@ -3187,11 +3562,11 @@ static void virtnet_tx_resume(struct virtnet_info *vi, struct send_queue *sq)</div><div class='ctx'> </div><div class='ctx'> 	__netif_tx_lock_bh(txq);</div><div class='ctx'> 	sq-&gt;reset = false;</div><div class='del'>-	netif_tx_wake_queue(txq);</div><div class='add'>+	virtnet_tx_wake_queue(vi, sq);</div><div class='ctx'> 	__netif_tx_unlock_bh(txq);</div><div class='ctx'> </div><div class='ctx'> 	if (running)</div><div class='del'>-		virtnet_napi_tx_enable(vi, sq-&gt;vq, &amp;sq-&gt;napi);</div><div class='add'>+		virtnet_napi_tx_enable(sq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int virtnet_tx_resize(struct virtnet_info *vi, struct send_queue *sq,</div><div class='hunk'>@@ -3199,11 +3574,18 @@ static int virtnet_tx_resize(struct virtnet_info *vi, struct send_queue *sq,</div><div class='ctx'> {</div><div class='ctx'> 	int qindex, err;</div><div class='ctx'> </div><div class='add'>+	if (ring_num &lt;= MAX_SKB_FRAGS + 2) {</div><div class='add'>+		netdev_err(vi-&gt;dev, "tx size (%d) cannot be smaller than %d\n",</div><div class='add'>+			   ring_num, MAX_SKB_FRAGS + 2);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	qindex = sq - vi-&gt;sq;</div><div class='ctx'> </div><div class='ctx'> 	virtnet_tx_pause(vi, sq);</div><div class='ctx'> </div><div class='del'>-	err = virtqueue_resize(sq-&gt;vq, ring_num, virtnet_sq_free_unused_buf);</div><div class='add'>+	err = virtqueue_resize(sq-&gt;vq, ring_num, virtnet_sq_free_unused_buf,</div><div class='add'>+			       virtnet_sq_free_unused_buf_done);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		netdev_err(vi-&gt;dev, "resize tx fail: tx queue index: %d err: %d\n", qindex, err);</div><div class='ctx'> </div><div class='hunk'>@@ -3374,15 +3756,64 @@ static void virtnet_ack_link_announce(struct virtnet_info *vi)</div><div class='ctx'> 		dev_warn(&amp;vi-&gt;dev-&gt;dev, "Failed to ack link announce.\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool virtnet_commit_rss_command(struct virtnet_info *vi);</div><div class='add'>+</div><div class='add'>+static void virtnet_rss_update_by_qpairs(struct virtnet_info *vi, u16 queue_pairs)</div><div class='add'>+{</div><div class='add'>+	u32 indir_val = 0;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	for (; i &lt; vi-&gt;rss_indir_table_size; ++i) {</div><div class='add'>+		indir_val = ethtool_rxfh_indir_default(i, queue_pairs);</div><div class='add'>+		vi-&gt;rss_hdr-&gt;indirection_table[i] = cpu_to_le16(indir_val);</div><div class='add'>+	}</div><div class='add'>+	vi-&gt;rss_trailer.max_tx_vq = cpu_to_le16(queue_pairs);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int virtnet_set_queues(struct virtnet_info *vi, u16 queue_pairs)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtio_net_ctrl_mq *mq __free(kfree) = NULL;</div><div class='del'>-	struct scatterlist sg;</div><div class='add'>+	struct virtio_net_rss_config_hdr *old_rss_hdr;</div><div class='add'>+	struct virtio_net_rss_config_trailer old_rss_trailer;</div><div class='ctx'> 	struct net_device *dev = vi-&gt;dev;</div><div class='add'>+	struct scatterlist sg;</div><div class='ctx'> </div><div class='ctx'> 	if (!vi-&gt;has_cvq || !virtio_has_feature(vi-&gt;vdev, VIRTIO_NET_F_MQ))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	/* Firstly check if we need update rss. Do updating if both (1) rss enabled and</div><div class='add'>+	 * (2) no user configuration.</div><div class='add'>+	 *</div><div class='add'>+	 * During rss command processing, device updates queue_pairs using rss.max_tx_vq. That is,</div><div class='add'>+	 * the device updates queue_pairs together with rss, so we can skip the separate queue_pairs</div><div class='add'>+	 * update (VIRTIO_NET_CTRL_MQ_VQ_PAIRS_SET below) and return directly.</div><div class='add'>+	 */</div><div class='add'>+	if (vi-&gt;has_rss &amp;&amp; !netif_is_rxfh_configured(dev)) {</div><div class='add'>+		old_rss_hdr = vi-&gt;rss_hdr;</div><div class='add'>+		old_rss_trailer = vi-&gt;rss_trailer;</div><div class='add'>+		vi-&gt;rss_hdr = devm_kzalloc(&amp;dev-&gt;dev, virtnet_rss_hdr_size(vi), GFP_KERNEL);</div><div class='add'>+		if (!vi-&gt;rss_hdr) {</div><div class='add'>+			vi-&gt;rss_hdr = old_rss_hdr;</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*vi-&gt;rss_hdr = *old_rss_hdr;</div><div class='add'>+		virtnet_rss_update_by_qpairs(vi, queue_pairs);</div><div class='add'>+</div><div class='add'>+		if (!virtnet_commit_rss_command(vi)) {</div><div class='add'>+			/* restore ctrl_rss if commit_rss_command failed */</div><div class='add'>+			devm_kfree(&amp;dev-&gt;dev, vi-&gt;rss_hdr);</div><div class='add'>+			vi-&gt;rss_hdr = old_rss_hdr;</div><div class='add'>+			vi-&gt;rss_trailer = old_rss_trailer;</div><div class='add'>+</div><div class='add'>+			dev_warn(&amp;dev-&gt;dev, "Fail to set num of queue pairs to %d, because committing RSS failed\n",</div><div class='add'>+				 queue_pairs);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		devm_kfree(&amp;dev-&gt;dev, old_rss_hdr);</div><div class='add'>+		goto succ;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	mq = kzalloc(sizeof(*mq), GFP_KERNEL);</div><div class='ctx'> 	if (!mq)</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -3395,12 +3826,14 @@ static int virtnet_set_queues(struct virtnet_info *vi, u16 queue_pairs)</div><div class='ctx'> 		dev_warn(&amp;dev-&gt;dev, "Fail to set num of queue pairs to %d\n",</div><div class='ctx'> 			 queue_pairs);</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	} else {</div><div class='del'>-		vi-&gt;curr_queue_pairs = queue_pairs;</div><div class='del'>-		/* virtnet_open() will refill when device is going to up. */</div><div class='del'>-		if (dev-&gt;flags &amp; IFF_UP)</div><div class='del'>-			schedule_delayed_work(&amp;vi-&gt;refill, 0);</div><div class='ctx'> 	}</div><div class='add'>+succ:</div><div class='add'>+	vi-&gt;curr_queue_pairs = queue_pairs;</div><div class='add'>+	/* virtnet_open() will refill when device is going to up. */</div><div class='add'>+	spin_lock_bh(&amp;vi-&gt;refill_lock);</div><div class='add'>+	if (dev-&gt;flags &amp; IFF_UP &amp;&amp; vi-&gt;refill_enabled)</div><div class='add'>+		schedule_delayed_work(&amp;vi-&gt;refill, 0);</div><div class='add'>+	spin_unlock_bh(&amp;vi-&gt;refill_lock);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3589,7 +4022,7 @@ static void virtnet_set_affinity(struct virtnet_info *vi)</div><div class='ctx'> 	cpumask_var_t mask;</div><div class='ctx'> 	int stragglers;</div><div class='ctx'> 	int group_size;</div><div class='del'>-	int i, j, cpu;</div><div class='add'>+	int i, start = 0, cpu;</div><div class='ctx'> 	int num_cpu;</div><div class='ctx'> 	int stride;</div><div class='ctx'> </div><div class='hunk'>@@ -3603,16 +4036,18 @@ static void virtnet_set_affinity(struct virtnet_info *vi)</div><div class='ctx'> 	stragglers = num_cpu &gt;= vi-&gt;curr_queue_pairs ?</div><div class='ctx'> 			num_cpu % vi-&gt;curr_queue_pairs :</div><div class='ctx'> 			0;</div><div class='del'>-	cpu = cpumask_first(cpu_online_mask);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; vi-&gt;curr_queue_pairs; i++) {</div><div class='ctx'> 		group_size = stride + (i &lt; stragglers ? 1 : 0);</div><div class='ctx'> </div><div class='del'>-		for (j = 0; j &lt; group_size; j++) {</div><div class='add'>+		for_each_online_cpu_wrap(cpu, start) {</div><div class='add'>+			if (!group_size--) {</div><div class='add'>+				start = cpu;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 			cpumask_set_cpu(cpu, mask);</div><div class='del'>-			cpu = cpumask_next_wrap(cpu, cpu_online_mask,</div><div class='del'>-						nr_cpu_ids, false);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		virtqueue_set_affinity(vi-&gt;rq[i].vq, mask);</div><div class='ctx'> 		virtqueue_set_affinity(vi-&gt;sq[i].vq, mask);</div><div class='ctx'> 		__netif_set_xps_queue(vi-&gt;dev, cpumask_bits(mask), i, XPS_CPUS);</div><div class='hunk'>@@ -3822,24 +4257,12 @@ static int virtnet_set_ringparam(struct net_device *dev,</div><div class='ctx'> static bool virtnet_commit_rss_command(struct virtnet_info *vi)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = vi-&gt;dev;</div><div class='del'>-	struct scatterlist sgs[4];</div><div class='del'>-	unsigned int sg_buf_size;</div><div class='add'>+	struct scatterlist sgs[2];</div><div class='ctx'> </div><div class='ctx'> 	/* prepare sgs */</div><div class='del'>-	sg_init_table(sgs, 4);</div><div class='del'>-</div><div class='del'>-	sg_buf_size = offsetof(struct virtio_net_ctrl_rss, indirection_table);</div><div class='del'>-	sg_set_buf(&amp;sgs[0], &amp;vi-&gt;rss, sg_buf_size);</div><div class='del'>-</div><div class='del'>-	sg_buf_size = sizeof(uint16_t) * (vi-&gt;rss.indirection_table_mask + 1);</div><div class='del'>-	sg_set_buf(&amp;sgs[1], vi-&gt;rss.indirection_table, sg_buf_size);</div><div class='del'>-</div><div class='del'>-	sg_buf_size = offsetof(struct virtio_net_ctrl_rss, key)</div><div class='del'>-			- offsetof(struct virtio_net_ctrl_rss, max_tx_vq);</div><div class='del'>-	sg_set_buf(&amp;sgs[2], &amp;vi-&gt;rss.max_tx_vq, sg_buf_size);</div><div class='del'>-</div><div class='del'>-	sg_buf_size = vi-&gt;rss_key_size;</div><div class='del'>-	sg_set_buf(&amp;sgs[3], vi-&gt;rss.key, sg_buf_size);</div><div class='add'>+	sg_init_table(sgs, 2);</div><div class='add'>+	sg_set_buf(&amp;sgs[0], vi-&gt;rss_hdr, virtnet_rss_hdr_size(vi));</div><div class='add'>+	sg_set_buf(&amp;sgs[1], &amp;vi-&gt;rss_trailer, virtnet_rss_trailer_size(vi));</div><div class='ctx'> </div><div class='ctx'> 	if (!virtnet_send_command(vi, VIRTIO_NET_CTRL_MQ,</div><div class='ctx'> 				  vi-&gt;has_rss ? VIRTIO_NET_CTRL_MQ_RSS_CONFIG</div><div class='hunk'>@@ -3856,28 +4279,24 @@ err:</div><div class='ctx'> </div><div class='ctx'> static void virtnet_init_default_rss(struct virtnet_info *vi)</div><div class='ctx'> {</div><div class='del'>-	u32 indir_val = 0;</div><div class='del'>-	int i = 0;</div><div class='del'>-</div><div class='del'>-	vi-&gt;rss.hash_types = vi-&gt;rss_hash_types_supported;</div><div class='add'>+	vi-&gt;rss_hdr-&gt;hash_types = cpu_to_le32(vi-&gt;rss_hash_types_supported);</div><div class='ctx'> 	vi-&gt;rss_hash_types_saved = vi-&gt;rss_hash_types_supported;</div><div class='del'>-	vi-&gt;rss.indirection_table_mask = vi-&gt;rss_indir_table_size</div><div class='del'>-						? vi-&gt;rss_indir_table_size - 1 : 0;</div><div class='del'>-	vi-&gt;rss.unclassified_queue = 0;</div><div class='add'>+	vi-&gt;rss_hdr-&gt;indirection_table_mask = vi-&gt;rss_indir_table_size</div><div class='add'>+						? cpu_to_le16(vi-&gt;rss_indir_table_size - 1) : 0;</div><div class='add'>+	vi-&gt;rss_hdr-&gt;unclassified_queue = 0;</div><div class='ctx'> </div><div class='del'>-	for (; i &lt; vi-&gt;rss_indir_table_size; ++i) {</div><div class='del'>-		indir_val = ethtool_rxfh_indir_default(i, vi-&gt;curr_queue_pairs);</div><div class='del'>-		vi-&gt;rss.indirection_table[i] = indir_val;</div><div class='del'>-	}</div><div class='add'>+	virtnet_rss_update_by_qpairs(vi, vi-&gt;curr_queue_pairs);</div><div class='ctx'> </div><div class='del'>-	vi-&gt;rss.max_tx_vq = vi-&gt;has_rss ? vi-&gt;curr_queue_pairs : 0;</div><div class='del'>-	vi-&gt;rss.hash_key_length = vi-&gt;rss_key_size;</div><div class='add'>+	vi-&gt;rss_trailer.hash_key_length = vi-&gt;rss_key_size;</div><div class='ctx'> </div><div class='del'>-	netdev_rss_key_fill(vi-&gt;rss.key, vi-&gt;rss_key_size);</div><div class='add'>+	netdev_rss_key_fill(vi-&gt;rss_hash_key_data, vi-&gt;rss_key_size);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void virtnet_get_hashflow(const struct virtnet_info *vi, struct ethtool_rxnfc *info)</div><div class='add'>+static int virtnet_get_hashflow(struct net_device *dev,</div><div class='add'>+				struct ethtool_rxfh_fields *info)</div><div class='ctx'> {</div><div class='add'>+	struct virtnet_info *vi = netdev_priv(dev);</div><div class='add'>+</div><div class='ctx'> 	info-&gt;data = 0;</div><div class='ctx'> 	switch (info-&gt;flow_type) {</div><div class='ctx'> 	case TCP_V4_FLOW:</div><div class='hunk'>@@ -3926,17 +4345,22 @@ static void virtnet_get_hashflow(const struct virtnet_info *vi, struct ethtool_r</div><div class='ctx'> 		info-&gt;data = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool virtnet_set_hashflow(struct virtnet_info *vi, struct ethtool_rxnfc *info)</div><div class='add'>+static int virtnet_set_hashflow(struct net_device *dev,</div><div class='add'>+				const struct ethtool_rxfh_fields *info,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct virtnet_info *vi = netdev_priv(dev);</div><div class='ctx'> 	u32 new_hashtypes = vi-&gt;rss_hash_types_saved;</div><div class='ctx'> 	bool is_disable = info-&gt;data &amp; RXH_DISCARD;</div><div class='ctx'> 	bool is_l4 = info-&gt;data == (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3);</div><div class='ctx'> </div><div class='ctx'> 	/* supports only 'sd', 'sdfn' and 'r' */</div><div class='ctx'> 	if (!((info-&gt;data == (RXH_IP_SRC | RXH_IP_DST)) | is_l4 | is_disable))</div><div class='del'>-		return false;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	switch (info-&gt;flow_type) {</div><div class='ctx'> 	case TCP_V4_FLOW:</div><div class='hunk'>@@ -3975,21 +4399,22 @@ static bool virtnet_set_hashflow(struct virtnet_info *vi, struct ethtool_rxnfc *</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		/* unsupported flow */</div><div class='del'>-		return false;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* if unsupported hashtype was set */</div><div class='ctx'> 	if (new_hashtypes != (new_hashtypes &amp; vi-&gt;rss_hash_types_supported))</div><div class='del'>-		return false;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (new_hashtypes != vi-&gt;rss_hash_types_saved) {</div><div class='ctx'> 		vi-&gt;rss_hash_types_saved = new_hashtypes;</div><div class='del'>-		vi-&gt;rss.hash_types = vi-&gt;rss_hash_types_saved;</div><div class='add'>+		vi-&gt;rss_hdr-&gt;hash_types = cpu_to_le32(vi-&gt;rss_hash_types_saved);</div><div class='ctx'> 		if (vi-&gt;dev-&gt;features &amp; NETIF_F_RXHASH)</div><div class='del'>-			return virtnet_commit_rss_command(vi);</div><div class='add'>+			if (!virtnet_commit_rss_command(vi))</div><div class='add'>+				return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void virtnet_get_drvinfo(struct net_device *dev,</div><div class='hunk'>@@ -5011,7 +5436,7 @@ static int virtnet_set_coalesce(struct net_device *dev,</div><div class='ctx'> 				struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtnet_info *vi = netdev_priv(dev);</div><div class='del'>-	int ret, queue_number, napi_weight;</div><div class='add'>+	int ret, queue_number, napi_weight, i;</div><div class='ctx'> 	bool update_napi = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Can't change NAPI weight if the link is up */</div><div class='hunk'>@@ -5040,6 +5465,14 @@ static int virtnet_set_coalesce(struct net_device *dev,</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	if (update_napi) {</div><div class='add'>+		/* xsk xmit depends on the tx napi. So if xsk is active,</div><div class='add'>+		 * prevent modifications to tx napi.</div><div class='add'>+		 */</div><div class='add'>+		for (i = queue_number; i &lt; vi-&gt;max_queue_pairs; i++) {</div><div class='add'>+			if (vi-&gt;sq[i].xsk_pool)</div><div class='add'>+				return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		for (; queue_number &lt; vi-&gt;max_queue_pairs; queue_number++)</div><div class='ctx'> 			vi-&gt;sq[queue_number].napi.weight = napi_weight;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5156,11 +5589,11 @@ static int virtnet_get_rxfh(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	if (rxfh-&gt;indir) {</div><div class='ctx'> 		for (i = 0; i &lt; vi-&gt;rss_indir_table_size; ++i)</div><div class='del'>-			rxfh-&gt;indir[i] = vi-&gt;rss.indirection_table[i];</div><div class='add'>+			rxfh-&gt;indir[i] = le16_to_cpu(vi-&gt;rss_hdr-&gt;indirection_table[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rxfh-&gt;key)</div><div class='del'>-		memcpy(rxfh-&gt;key, vi-&gt;rss.key, vi-&gt;rss_key_size);</div><div class='add'>+		memcpy(rxfh-&gt;key, vi-&gt;rss_hash_key_data, vi-&gt;rss_key_size);</div><div class='ctx'> </div><div class='ctx'> 	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='ctx'> </div><div class='hunk'>@@ -5184,7 +5617,7 @@ static int virtnet_set_rxfh(struct net_device *dev,</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 		for (i = 0; i &lt; vi-&gt;rss_indir_table_size; ++i)</div><div class='del'>-			vi-&gt;rss.indirection_table[i] = rxfh-&gt;indir[i];</div><div class='add'>+			vi-&gt;rss_hdr-&gt;indirection_table[i] = cpu_to_le16(rxfh-&gt;indir[i]);</div><div class='ctx'> 		update = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5196,7 +5629,7 @@ static int virtnet_set_rxfh(struct net_device *dev,</div><div class='ctx'> 		if (!vi-&gt;has_rss &amp;&amp; !vi-&gt;has_rss_hash_report)</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-		memcpy(vi-&gt;rss.key, rxfh-&gt;key, vi-&gt;rss_key_size);</div><div class='add'>+		memcpy(vi-&gt;rss_hash_key_data, rxfh-&gt;key, vi-&gt;rss_key_size);</div><div class='ctx'> 		update = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5206,41 +5639,11 @@ static int virtnet_set_rxfh(struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int virtnet_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, u32 *rule_locs)</div><div class='add'>+static u32 virtnet_get_rx_ring_count(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct virtnet_info *vi = netdev_priv(dev);</div><div class='del'>-	int rc = 0;</div><div class='ctx'> </div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		info-&gt;data = vi-&gt;curr_queue_pairs;</div><div class='del'>-		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		virtnet_get_hashflow(vi, info);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		rc = -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int virtnet_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)</div><div class='del'>-{</div><div class='del'>-	struct virtnet_info *vi = netdev_priv(dev);</div><div class='del'>-	int rc = 0;</div><div class='del'>-</div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		if (!virtnet_set_hashflow(vi, info))</div><div class='del'>-			rc = -EINVAL;</div><div class='del'>-</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		rc = -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='add'>+	return vi-&gt;curr_queue_pairs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops virtnet_ethtool_ops = {</div><div class='hunk'>@@ -5266,8 +5669,9 @@ static const struct ethtool_ops virtnet_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh_indir_size = virtnet_get_rxfh_indir_size,</div><div class='ctx'> 	.get_rxfh = virtnet_get_rxfh,</div><div class='ctx'> 	.set_rxfh = virtnet_set_rxfh,</div><div class='del'>-	.get_rxnfc = virtnet_get_rxnfc,</div><div class='del'>-	.set_rxnfc = virtnet_set_rxnfc,</div><div class='add'>+	.get_rxfh_fields = virtnet_get_hashflow,</div><div class='add'>+	.set_rxfh_fields = virtnet_set_hashflow,</div><div class='add'>+	.get_rx_ring_count = virtnet_get_rx_ring_count,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void virtnet_get_queue_stats_rx(struct net_device *dev, int i,</div><div class='hunk'>@@ -5353,6 +5757,10 @@ static void virtnet_get_base_stats(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	if (vi-&gt;device_stats_cap &amp; VIRTIO_NET_STATS_TYPE_TX_SPEED)</div><div class='ctx'> 		tx-&gt;hw_drop_ratelimits = 0;</div><div class='add'>+</div><div class='add'>+	netdev_stat_queue_sum(dev,</div><div class='add'>+			      dev-&gt;real_num_rx_queues, vi-&gt;max_queue_pairs, rx,</div><div class='add'>+			      dev-&gt;real_num_tx_queues, vi-&gt;max_queue_pairs, tx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct netdev_stat_ops virtnet_stat_ops = {</div><div class='hunk'>@@ -5370,11 +5778,15 @@ static void virtnet_freeze_down(struct virtio_device *vdev)</div><div class='ctx'> 	disable_rx_mode_work(vi);</div><div class='ctx'> 	flush_work(&amp;vi-&gt;rx_mode_work);</div><div class='ctx'> </div><div class='add'>+	if (netif_running(vi-&gt;dev)) {</div><div class='add'>+		rtnl_lock();</div><div class='add'>+		virtnet_close(vi-&gt;dev);</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	netif_tx_lock_bh(vi-&gt;dev);</div><div class='ctx'> 	netif_device_detach(vi-&gt;dev);</div><div class='ctx'> 	netif_tx_unlock_bh(vi-&gt;dev);</div><div class='del'>-	if (netif_running(vi-&gt;dev))</div><div class='del'>-		virtnet_close(vi-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int init_vqs(struct virtnet_info *vi);</div><div class='hunk'>@@ -5394,7 +5806,9 @@ static int virtnet_restore_up(struct virtio_device *vdev)</div><div class='ctx'> 	enable_rx_mode_work(vi);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(vi-&gt;dev)) {</div><div class='add'>+		rtnl_lock();</div><div class='ctx'> 		err = virtnet_open(vi-&gt;dev);</div><div class='add'>+		rtnl_unlock();</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5469,7 +5883,7 @@ static int virtnet_rq_bind_xsk_pool(struct virtnet_info *vi, struct receive_queu</div><div class='ctx'> </div><div class='ctx'> 	virtnet_rx_pause(vi, rq);</div><div class='ctx'> </div><div class='del'>-	err = virtqueue_reset(rq-&gt;vq, virtnet_rq_unmap_free_buf);</div><div class='add'>+	err = virtqueue_reset(rq-&gt;vq, virtnet_rq_unmap_free_buf, NULL);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netdev_err(vi-&gt;dev, "reset rx fail: rx queue index: %d err: %d\n", qindex, err);</div><div class='ctx'> </div><div class='hunk'>@@ -5488,6 +5902,30 @@ unreg:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int virtnet_sq_bind_xsk_pool(struct virtnet_info *vi,</div><div class='add'>+				    struct send_queue *sq,</div><div class='add'>+				    struct xsk_buff_pool *pool)</div><div class='add'>+{</div><div class='add'>+	int err, qindex;</div><div class='add'>+</div><div class='add'>+	qindex = sq - vi-&gt;sq;</div><div class='add'>+</div><div class='add'>+	virtnet_tx_pause(vi, sq);</div><div class='add'>+</div><div class='add'>+	err = virtqueue_reset(sq-&gt;vq, virtnet_sq_free_unused_buf,</div><div class='add'>+			      virtnet_sq_free_unused_buf_done);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(vi-&gt;dev, "reset tx fail: tx queue index: %d err: %d\n", qindex, err);</div><div class='add'>+		pool = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sq-&gt;xsk_pool = pool;</div><div class='add'>+</div><div class='add'>+	virtnet_tx_resume(vi, sq);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int virtnet_xsk_pool_enable(struct net_device *dev,</div><div class='ctx'> 				   struct xsk_buff_pool *pool,</div><div class='ctx'> 				   u16 qid)</div><div class='hunk'>@@ -5496,6 +5934,7 @@ static int virtnet_xsk_pool_enable(struct net_device *dev,</div><div class='ctx'> 	struct receive_queue *rq;</div><div class='ctx'> 	struct device *dma_dev;</div><div class='ctx'> 	struct send_queue *sq;</div><div class='add'>+	dma_addr_t hdr_dma;</div><div class='ctx'> 	int err, size;</div><div class='ctx'> </div><div class='ctx'> 	if (vi-&gt;hdr_len &gt; xsk_pool_get_headroom(pool))</div><div class='hunk'>@@ -5533,6 +5972,13 @@ static int virtnet_xsk_pool_enable(struct net_device *dev,</div><div class='ctx'> 	if (!rq-&gt;xsk_buffs)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	hdr_dma = virtqueue_map_single_attrs(sq-&gt;vq, &amp;xsk_hdr, vi-&gt;hdr_len,</div><div class='add'>+					     DMA_TO_DEVICE, 0);</div><div class='add'>+	if (virtqueue_map_mapping_error(sq-&gt;vq, hdr_dma)) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_free_buffs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = xsk_pool_dma_map(pool, dma_dev, 0);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_xsk_map;</div><div class='hunk'>@@ -5541,11 +5987,26 @@ static int virtnet_xsk_pool_enable(struct net_device *dev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto err_rq;</div><div class='ctx'> </div><div class='add'>+	err = virtnet_sq_bind_xsk_pool(vi, sq, pool);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_sq;</div><div class='add'>+</div><div class='add'>+	/* Now, we do not support tx offload(such as tx csum), so all the tx</div><div class='add'>+	 * virtnet hdr is zero. So all the tx packets can share a single hdr.</div><div class='add'>+	 */</div><div class='add'>+	sq-&gt;xsk_hdr_dma_addr = hdr_dma;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_sq:</div><div class='add'>+	virtnet_rq_bind_xsk_pool(vi, rq, NULL);</div><div class='ctx'> err_rq:</div><div class='ctx'> 	xsk_pool_dma_unmap(pool, 0);</div><div class='ctx'> err_xsk_map:</div><div class='add'>+	virtqueue_unmap_single_attrs(rq-&gt;vq, hdr_dma, vi-&gt;hdr_len,</div><div class='add'>+				     DMA_TO_DEVICE, 0);</div><div class='add'>+err_free_buffs:</div><div class='add'>+	kvfree(rq-&gt;xsk_buffs);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -5554,19 +6015,24 @@ static int virtnet_xsk_pool_disable(struct net_device *dev, u16 qid)</div><div class='ctx'> 	struct virtnet_info *vi = netdev_priv(dev);</div><div class='ctx'> 	struct xsk_buff_pool *pool;</div><div class='ctx'> 	struct receive_queue *rq;</div><div class='add'>+	struct send_queue *sq;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (qid &gt;= vi-&gt;curr_queue_pairs)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	sq = &amp;vi-&gt;sq[qid];</div><div class='ctx'> 	rq = &amp;vi-&gt;rq[qid];</div><div class='ctx'> </div><div class='ctx'> 	pool = rq-&gt;xsk_pool;</div><div class='ctx'> </div><div class='ctx'> 	err = virtnet_rq_bind_xsk_pool(vi, rq, NULL);</div><div class='add'>+	err |= virtnet_sq_bind_xsk_pool(vi, sq, NULL);</div><div class='ctx'> </div><div class='ctx'> 	xsk_pool_dma_unmap(pool, 0);</div><div class='ctx'> </div><div class='add'>+	virtqueue_unmap_single_attrs(sq-&gt;vq, sq-&gt;xsk_hdr_dma_addr,</div><div class='add'>+				     vi-&gt;hdr_len, DMA_TO_DEVICE, 0);</div><div class='ctx'> 	kvfree(rq-&gt;xsk_buffs);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -5633,12 +6099,12 @@ static int virtnet_xdp_set(struct net_device *dev, struct bpf_prog *prog,</div><div class='ctx'> 	if (prog)</div><div class='ctx'> 		bpf_prog_add(prog, vi-&gt;max_queue_pairs - 1);</div><div class='ctx'> </div><div class='add'>+	virtnet_rx_pause_all(vi);</div><div class='add'>+</div><div class='ctx'> 	/* Make sure NAPI is not using any XDP TX queues for RX. */</div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='del'>-		for (i = 0; i &lt; vi-&gt;max_queue_pairs; i++) {</div><div class='del'>-			napi_disable(&amp;vi-&gt;rq[i].napi);</div><div class='del'>-			virtnet_napi_tx_disable(&amp;vi-&gt;sq[i].napi);</div><div class='del'>-		}</div><div class='add'>+		for (i = 0; i &lt; vi-&gt;max_queue_pairs; i++)</div><div class='add'>+			virtnet_napi_tx_disable(&amp;vi-&gt;sq[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!prog) {</div><div class='hunk'>@@ -5670,14 +6136,12 @@ static int virtnet_xdp_set(struct net_device *dev, struct bpf_prog *prog,</div><div class='ctx'> 		vi-&gt;xdp_enabled = false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	virtnet_rx_resume_all(vi);</div><div class='ctx'> 	for (i = 0; i &lt; vi-&gt;max_queue_pairs; i++) {</div><div class='ctx'> 		if (old_prog)</div><div class='ctx'> 			bpf_prog_put(old_prog);</div><div class='del'>-		if (netif_running(dev)) {</div><div class='del'>-			virtnet_napi_enable(vi-&gt;rq[i].vq, &amp;vi-&gt;rq[i].napi);</div><div class='del'>-			virtnet_napi_tx_enable(vi, vi-&gt;sq[i].vq,</div><div class='del'>-					       &amp;vi-&gt;sq[i].napi);</div><div class='del'>-		}</div><div class='add'>+		if (netif_running(dev))</div><div class='add'>+			virtnet_napi_tx_enable(&amp;vi-&gt;sq[i]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -5689,12 +6153,10 @@ err:</div><div class='ctx'> 			rcu_assign_pointer(vi-&gt;rq[i].xdp_prog, old_prog);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	virtnet_rx_resume_all(vi);</div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='del'>-		for (i = 0; i &lt; vi-&gt;max_queue_pairs; i++) {</div><div class='del'>-			virtnet_napi_enable(vi-&gt;rq[i].vq, &amp;vi-&gt;rq[i].napi);</div><div class='del'>-			virtnet_napi_tx_enable(vi, vi-&gt;sq[i].vq,</div><div class='del'>-					       &amp;vi-&gt;sq[i].napi);</div><div class='del'>-		}</div><div class='add'>+		for (i = 0; i &lt; vi-&gt;max_queue_pairs; i++)</div><div class='add'>+			virtnet_napi_tx_enable(&amp;vi-&gt;sq[i]);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (prog)</div><div class='ctx'> 		bpf_prog_sub(prog, vi-&gt;max_queue_pairs - 1);</div><div class='hunk'>@@ -5754,9 +6216,9 @@ static int virtnet_set_features(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	if ((dev-&gt;features ^ features) &amp; NETIF_F_RXHASH) {</div><div class='ctx'> 		if (features &amp; NETIF_F_RXHASH)</div><div class='del'>-			vi-&gt;rss.hash_types = vi-&gt;rss_hash_types_saved;</div><div class='add'>+			vi-&gt;rss_hdr-&gt;hash_types = cpu_to_le32(vi-&gt;rss_hash_types_saved);</div><div class='ctx'> 		else</div><div class='del'>-			vi-&gt;rss.hash_types = VIRTIO_NET_HASH_REPORT_NONE;</div><div class='add'>+			vi-&gt;rss_hdr-&gt;hash_types = cpu_to_le32(VIRTIO_NET_HASH_REPORT_NONE);</div><div class='ctx'> </div><div class='ctx'> 		if (!virtnet_commit_rss_command(vi))</div><div class='ctx'> 			return -EINVAL;</div><div class='hunk'>@@ -5916,7 +6378,7 @@ static void free_receive_page_frags(struct virtnet_info *vi)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	for (i = 0; i &lt; vi-&gt;max_queue_pairs; i++)</div><div class='ctx'> 		if (vi-&gt;rq[i].alloc_frag.page) {</div><div class='del'>-			if (vi-&gt;rq[i].do_dma &amp;&amp; vi-&gt;rq[i].last_dma)</div><div class='add'>+			if (vi-&gt;rq[i].last_dma)</div><div class='ctx'> 				virtnet_rq_unmap(&amp;vi-&gt;rq[i], vi-&gt;rq[i].last_dma, 0);</div><div class='ctx'> 			put_page(vi-&gt;rq[i].alloc_frag.page);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -5924,10 +6386,34 @@ static void free_receive_page_frags(struct virtnet_info *vi)</div><div class='ctx'> </div><div class='ctx'> static void virtnet_sq_free_unused_buf(struct virtqueue *vq, void *buf)</div><div class='ctx'> {</div><div class='del'>-	if (!is_xdp_frame(buf))</div><div class='add'>+	struct virtnet_info *vi = vq-&gt;vdev-&gt;priv;</div><div class='add'>+	struct send_queue *sq;</div><div class='add'>+	int i = vq2txq(vq);</div><div class='add'>+</div><div class='add'>+	sq = &amp;vi-&gt;sq[i];</div><div class='add'>+</div><div class='add'>+	switch (virtnet_xmit_ptr_unpack(&amp;buf)) {</div><div class='add'>+	case VIRTNET_XMIT_TYPE_SKB:</div><div class='add'>+	case VIRTNET_XMIT_TYPE_SKB_ORPHAN:</div><div class='ctx'> 		dev_kfree_skb(buf);</div><div class='del'>-	else</div><div class='del'>-		xdp_return_frame(ptr_to_xdp(buf));</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case VIRTNET_XMIT_TYPE_XDP:</div><div class='add'>+		xdp_return_frame(buf);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case VIRTNET_XMIT_TYPE_XSK:</div><div class='add'>+		xsk_tx_completed(sq-&gt;xsk_pool, 1);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void virtnet_sq_free_unused_buf_done(struct virtqueue *vq)</div><div class='add'>+{</div><div class='add'>+	struct virtnet_info *vi = vq-&gt;vdev-&gt;priv;</div><div class='add'>+	int i = vq2txq(vq);</div><div class='add'>+</div><div class='add'>+	netdev_tx_reset_queue(netdev_get_tx_queue(vi-&gt;dev, i));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void free_unused_bufs(struct virtnet_info *vi)</div><div class='hunk'>@@ -6076,8 +6562,9 @@ static int virtnet_alloc_queues(struct virtnet_info *vi)</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;vi-&gt;refill, refill_work);</div><div class='ctx'> 	for (i = 0; i &lt; vi-&gt;max_queue_pairs; i++) {</div><div class='ctx'> 		vi-&gt;rq[i].pages = NULL;</div><div class='del'>-		netif_napi_add_weight(vi-&gt;dev, &amp;vi-&gt;rq[i].napi, virtnet_poll,</div><div class='del'>-				      napi_weight);</div><div class='add'>+		netif_napi_add_config(vi-&gt;dev, &amp;vi-&gt;rq[i].napi, virtnet_poll,</div><div class='add'>+				      i);</div><div class='add'>+		vi-&gt;rq[i].napi.weight = napi_weight;</div><div class='ctx'> 		netif_napi_add_tx_weight(vi-&gt;dev, &amp;vi-&gt;sq[i].napi,</div><div class='ctx'> 					 virtnet_poll_tx,</div><div class='ctx'> 					 napi_tx ? napi_weight : 0);</div><div class='hunk'>@@ -6288,7 +6775,7 @@ static int virtnet_xdp_rx_hash(const struct xdp_md *_ctx, u32 *hash,</div><div class='ctx'> 		hash_report = VIRTIO_NET_HASH_REPORT_NONE;</div><div class='ctx'> </div><div class='ctx'> 	*rss_type = virtnet_xdp_rss_type[hash_report];</div><div class='del'>-	*hash = __le32_to_cpu(hdr_hash-&gt;hash_value);</div><div class='add'>+	*hash = virtio_net_hash_value(hdr_hash);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -6352,10 +6839,20 @@ static int virtnet_probe(struct virtio_device *vdev)</div><div class='ctx'> 		if (virtio_has_feature(vdev, VIRTIO_NET_F_HOST_USO))</div><div class='ctx'> 			dev-&gt;hw_features |= NETIF_F_GSO_UDP_L4;</div><div class='ctx'> </div><div class='add'>+		if (virtio_has_feature(vdev, VIRTIO_NET_F_HOST_UDP_TUNNEL_GSO)) {</div><div class='add'>+			dev-&gt;hw_features |= NETIF_F_GSO_UDP_TUNNEL;</div><div class='add'>+			dev-&gt;hw_enc_features = dev-&gt;hw_features;</div><div class='add'>+		}</div><div class='add'>+		if (dev-&gt;hw_features &amp; NETIF_F_GSO_UDP_TUNNEL &amp;&amp;</div><div class='add'>+		    virtio_has_feature(vdev, VIRTIO_NET_F_HOST_UDP_TUNNEL_GSO_CSUM)) {</div><div class='add'>+			dev-&gt;hw_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;</div><div class='add'>+			dev-&gt;hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		dev-&gt;features |= NETIF_F_GSO_ROBUST;</div><div class='ctx'> </div><div class='ctx'> 		if (gso)</div><div class='del'>-			dev-&gt;features |= dev-&gt;hw_features &amp; NETIF_F_ALL_TSO;</div><div class='add'>+			dev-&gt;features |= dev-&gt;hw_features;</div><div class='ctx'> 		/* (!csum &amp;&amp; gso) case will be fixed by register_netdev() */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -6375,7 +6872,8 @@ static int virtnet_probe(struct virtio_device *vdev)</div><div class='ctx'> 		dev-&gt;hw_features |= NETIF_F_GRO_HW;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;vlan_features = dev-&gt;features;</div><div class='del'>-	dev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT;</div><div class='add'>+	dev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |</div><div class='add'>+		NETDEV_XDP_ACT_XSK_ZEROCOPY;</div><div class='ctx'> </div><div class='ctx'> 	/* MTU range: 68 - 65535 */</div><div class='ctx'> 	dev-&gt;min_mtu = MIN_MTU;</div><div class='hunk'>@@ -6420,10 +6918,21 @@ static int virtnet_probe(struct virtio_device *vdev)</div><div class='ctx'> 			virtio_cread16(vdev, offsetof(struct virtio_net_config,</div><div class='ctx'> 				rss_max_indirection_table_length));</div><div class='ctx'> 	}</div><div class='add'>+	vi-&gt;rss_hdr = devm_kzalloc(&amp;vdev-&gt;dev, virtnet_rss_hdr_size(vi), GFP_KERNEL);</div><div class='add'>+	if (!vi-&gt;rss_hdr) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto free;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (vi-&gt;has_rss || vi-&gt;has_rss_hash_report) {</div><div class='ctx'> 		vi-&gt;rss_key_size =</div><div class='ctx'> 			virtio_cread8(vdev, offsetof(struct virtio_net_config, rss_max_key_size));</div><div class='add'>+		if (vi-&gt;rss_key_size &gt; VIRTIO_NET_RSS_MAX_KEY_SIZE) {</div><div class='add'>+			dev_err(&amp;vdev-&gt;dev, "rss_max_key_size=%u exceeds the limit %u.\n",</div><div class='add'>+				vi-&gt;rss_key_size, VIRTIO_NET_RSS_MAX_KEY_SIZE);</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto free;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		vi-&gt;rss_hash_types_supported =</div><div class='ctx'> 		    virtio_cread32(vdev, offsetof(struct virtio_net_config, supported_hash_types));</div><div class='hunk'>@@ -6436,7 +6945,10 @@ static int virtnet_probe(struct virtio_device *vdev)</div><div class='ctx'> 		dev-&gt;xdp_metadata_ops = &amp;virtnet_xdp_metadata_ops;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (vi-&gt;has_rss_hash_report)</div><div class='add'>+	if (virtio_has_feature(vdev, VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO) ||</div><div class='add'>+	    virtio_has_feature(vdev, VIRTIO_NET_F_HOST_UDP_TUNNEL_GSO))</div><div class='add'>+		vi-&gt;hdr_len = sizeof(struct virtio_net_hdr_v1_hash_tunnel);</div><div class='add'>+	else if (vi-&gt;has_rss_hash_report)</div><div class='ctx'> 		vi-&gt;hdr_len = sizeof(struct virtio_net_hdr_v1_hash);</div><div class='ctx'> 	else if (virtio_has_feature(vdev, VIRTIO_NET_F_MRG_RXBUF) ||</div><div class='ctx'> 		 virtio_has_feature(vdev, VIRTIO_F_VERSION_1))</div><div class='hunk'>@@ -6444,6 +6956,13 @@ static int virtnet_probe(struct virtio_device *vdev)</div><div class='ctx'> 	else</div><div class='ctx'> 		vi-&gt;hdr_len = sizeof(struct virtio_net_hdr);</div><div class='ctx'> </div><div class='add'>+	if (virtio_has_feature(vdev, VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO_CSUM))</div><div class='add'>+		vi-&gt;rx_tnl_csum = true;</div><div class='add'>+	if (virtio_has_feature(vdev, VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO))</div><div class='add'>+		vi-&gt;rx_tnl = true;</div><div class='add'>+	if (virtio_has_feature(vdev, VIRTIO_NET_F_HOST_UDP_TUNNEL_GSO))</div><div class='add'>+		vi-&gt;tx_tnl = true;</div><div class='add'>+</div><div class='ctx'> 	if (virtio_has_feature(vdev, VIRTIO_F_ANY_LAYOUT) ||</div><div class='ctx'> 	    virtio_has_feature(vdev, VIRTIO_F_VERSION_1))</div><div class='ctx'> 		vi-&gt;any_header_sg = true;</div><div class='hunk'>@@ -6551,6 +7070,15 @@ static int virtnet_probe(struct virtio_device *vdev)</div><div class='ctx'> </div><div class='ctx'> 	virtio_device_ready(vdev);</div><div class='ctx'> </div><div class='add'>+	if (vi-&gt;has_rss || vi-&gt;has_rss_hash_report) {</div><div class='add'>+		if (!virtnet_commit_rss_command(vi)) {</div><div class='add'>+			dev_warn(&amp;vdev-&gt;dev, "RSS disabled because committing failed.\n");</div><div class='add'>+			dev-&gt;hw_features &amp;= ~NETIF_F_RXHASH;</div><div class='add'>+			vi-&gt;has_rss_hash_report = false;</div><div class='add'>+			vi-&gt;has_rss = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	virtnet_set_queues(vi, vi-&gt;curr_queue_pairs);</div><div class='ctx'> </div><div class='ctx'> 	/* a random MAC address has been assigned, notify the device.</div><div class='hunk'>@@ -6602,16 +7130,20 @@ static int virtnet_probe(struct virtio_device *vdev)</div><div class='ctx'> 	   otherwise get link status from config. */</div><div class='ctx'> 	netif_carrier_off(dev);</div><div class='ctx'> 	if (virtio_has_feature(vi-&gt;vdev, VIRTIO_NET_F_STATUS)) {</div><div class='del'>-		virtnet_config_changed_work(&amp;vi-&gt;config_work);</div><div class='add'>+		virtio_config_changed(vi-&gt;vdev);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		vi-&gt;status = VIRTIO_NET_S_LINK_UP;</div><div class='ctx'> 		virtnet_update_settings(vi);</div><div class='ctx'> 		netif_carrier_on(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(guest_offloads); i++)</div><div class='del'>-		if (virtio_has_feature(vi-&gt;vdev, guest_offloads[i]))</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(guest_offloads); i++) {</div><div class='add'>+		unsigned int fbit;</div><div class='add'>+</div><div class='add'>+		fbit = virtio_offload_to_feature(guest_offloads[i]);</div><div class='add'>+		if (virtio_has_feature(vi-&gt;vdev, fbit))</div><div class='ctx'> 			set_bit(guest_offloads[i], &amp;vi-&gt;guest_offloads);</div><div class='add'>+	}</div><div class='ctx'> 	vi-&gt;guest_offloads_capable = vi-&gt;guest_offloads;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_unlock();</div><div class='hunk'>@@ -6643,11 +7175,20 @@ free:</div><div class='ctx'> </div><div class='ctx'> static void remove_vq_common(struct virtnet_info *vi)</div><div class='ctx'> {</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='ctx'> 	virtio_reset_device(vi-&gt;vdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Free unused buffers in both send and recv, if any. */</div><div class='ctx'> 	free_unused_bufs(vi);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Rule of thumb is netdev_tx_reset_queue() should follow any</div><div class='add'>+	 * skb freeing not followed by netdev_tx_completed_queue()</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; vi-&gt;max_queue_pairs; i++)</div><div class='add'>+		netdev_tx_reset_queue(netdev_get_tx_queue(vi-&gt;dev, i));</div><div class='add'>+</div><div class='ctx'> 	free_receive_bufs(vi);</div><div class='ctx'> </div><div class='ctx'> 	free_receive_page_frags(vi);</div><div class='hunk'>@@ -6732,6 +7273,10 @@ static struct virtio_device_id id_table[] = {</div><div class='ctx'> </div><div class='ctx'> static unsigned int features[] = {</div><div class='ctx'> 	VIRTNET_FEATURES,</div><div class='add'>+	VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO,</div><div class='add'>+	VIRTIO_NET_F_GUEST_UDP_TUNNEL_GSO_CSUM,</div><div class='add'>+	VIRTIO_NET_F_HOST_UDP_TUNNEL_GSO,</div><div class='add'>+	VIRTIO_NET_F_HOST_UDP_TUNNEL_GSO_CSUM,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static unsigned int features_legacy[] = {</div><div class='head'>diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c<br/>index 6793fa09f9d1..0572f6a9bdb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/vmxnet3/vmxnet3_drv.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vmxnet3/vmxnet3_drv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/vmxnet3/vmxnet3_drv.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/vmxnet3/vmxnet3_drv.c</a></div><div class='hunk'>@@ -27,6 +27,10 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;net/ip6_checksum.h&gt;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_X86</div><div class='add'>+#include &lt;asm/msr.h&gt;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #include "vmxnet3_int.h"</div><div class='ctx'> #include "vmxnet3_xdp.h"</div><div class='ctx'> </div><div class='hunk'>@@ -1568,6 +1572,30 @@ vmxnet3_get_hdr_len(struct vmxnet3_adapter *adapter, struct sk_buff *skb,</div><div class='ctx'> 	return (hlen + (hdr.tcp-&gt;doff &lt;&lt; 2));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+vmxnet3_lro_tunnel(struct sk_buff *skb, __be16 ip_proto)</div><div class='add'>+{</div><div class='add'>+	struct udphdr *uh = NULL;</div><div class='add'>+</div><div class='add'>+	if (ip_proto == htons(ETH_P_IP)) {</div><div class='add'>+		struct iphdr *iph = (struct iphdr *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+		if (iph-&gt;protocol == IPPROTO_UDP)</div><div class='add'>+			uh = (struct udphdr *)(iph + 1);</div><div class='add'>+	} else {</div><div class='add'>+		struct ipv6hdr *iph = (struct ipv6hdr *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+		if (iph-&gt;nexthdr == IPPROTO_UDP)</div><div class='add'>+			uh = (struct udphdr *)(iph + 1);</div><div class='add'>+	}</div><div class='add'>+	if (uh) {</div><div class='add'>+		if (uh-&gt;check)</div><div class='add'>+			skb_shinfo(skb)-&gt;gso_type |= SKB_GSO_UDP_TUNNEL_CSUM;</div><div class='add'>+		else</div><div class='add'>+			skb_shinfo(skb)-&gt;gso_type |= SKB_GSO_UDP_TUNNEL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int</div><div class='ctx'> vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,</div><div class='ctx'> 		       struct vmxnet3_adapter *adapter, int quota)</div><div class='hunk'>@@ -1881,6 +1909,8 @@ sop_done:</div><div class='ctx'> 			if (segCnt != 0 &amp;&amp; mss != 0) {</div><div class='ctx'> 				skb_shinfo(skb)-&gt;gso_type = rcd-&gt;v4 ?</div><div class='ctx'> 					SKB_GSO_TCPV4 : SKB_GSO_TCPV6;</div><div class='add'>+				if (encap_lro)</div><div class='add'>+					vmxnet3_lro_tunnel(skb, skb-&gt;protocol);</div><div class='ctx'> 				skb_shinfo(skb)-&gt;gso_size = mss;</div><div class='ctx'> 				skb_shinfo(skb)-&gt;gso_segs = segCnt;</div><div class='ctx'> 			} else if ((segCnt != 0 || skb-&gt;len &gt; mtu) &amp;&amp; !encap_lro) {</div><div class='hunk'>@@ -2033,6 +2063,11 @@ vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,</div><div class='ctx'> </div><div class='ctx'> 	rq-&gt;comp_ring.gen = VMXNET3_INIT_GEN;</div><div class='ctx'> 	rq-&gt;comp_ring.next2proc = 0;</div><div class='add'>+</div><div class='add'>+	if (xdp_rxq_info_is_reg(&amp;rq-&gt;xdp_rxq))</div><div class='add'>+		xdp_rxq_info_unreg(&amp;rq-&gt;xdp_rxq);</div><div class='add'>+	page_pool_destroy(rq-&gt;page_pool);</div><div class='add'>+	rq-&gt;page_pool = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -2073,11 +2108,6 @@ static void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (xdp_rxq_info_is_reg(&amp;rq-&gt;xdp_rxq))</div><div class='del'>-		xdp_rxq_info_unreg(&amp;rq-&gt;xdp_rxq);</div><div class='del'>-	page_pool_destroy(rq-&gt;page_pool);</div><div class='del'>-	rq-&gt;page_pool = NULL;</div><div class='del'>-</div><div class='ctx'> 	if (rq-&gt;data_ring.base) {</div><div class='ctx'> 		dma_free_coherent(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='ctx'> 				  rq-&gt;rx_ring[0].size * rq-&gt;data_ring.desc_size,</div><div class='hunk'>@@ -3607,8 +3637,6 @@ vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 	struct vmxnet3_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	WRITE_ONCE(netdev-&gt;mtu, new_mtu);</div><div class='del'>-</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Reset_work may be in the middle of resetting the device, wait for its</div><div class='ctx'> 	 * completion.</div><div class='hunk'>@@ -3622,6 +3650,7 @@ vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> </div><div class='ctx'> 		/* we need to re-create the rx queue based on the new mtu */</div><div class='ctx'> 		vmxnet3_rq_destroy_all(adapter);</div><div class='add'>+		WRITE_ONCE(netdev-&gt;mtu, new_mtu);</div><div class='ctx'> 		vmxnet3_adjust_rx_ring_size(adapter);</div><div class='ctx'> 		err = vmxnet3_rq_create_all(adapter);</div><div class='ctx'> 		if (err) {</div><div class='hunk'>@@ -3638,6 +3667,8 @@ vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 				   "Closing it\n", err);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='add'>+	} else {</div><div class='add'>+		WRITE_ONCE(netdev-&gt;mtu, new_mtu);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='head'>diff --git a/drivers/net/vmxnet3/vmxnet3_ethtool.c b/drivers/net/vmxnet3/vmxnet3_ethtool.c<br/>index 471f91c4204a..a14d0ad978e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/vmxnet3/vmxnet3_ethtool.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vmxnet3/vmxnet3_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/vmxnet3/vmxnet3_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/vmxnet3/vmxnet3_ethtool.c</a></div><div class='hunk'>@@ -833,11 +833,19 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-vmxnet3_get_rss_hash_opts(struct vmxnet3_adapter *adapter,</div><div class='del'>-			  struct ethtool_rxnfc *info)</div><div class='add'>+vmxnet3_get_rss_hash_opts(struct net_device *netdev,</div><div class='add'>+			  struct ethtool_rxfh_fields *info)</div><div class='ctx'> {</div><div class='add'>+	struct vmxnet3_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	enum Vmxnet3_RSSField rss_fields;</div><div class='ctx'> </div><div class='add'>+	if (!VMXNET3_VERSION_GE_4(adapter))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+#ifdef VMXNET3_RSS</div><div class='add'>+	if (!adapter-&gt;rss)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	if (netif_running(adapter-&gt;netdev)) {</div><div class='ctx'> 		unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -900,10 +908,20 @@ vmxnet3_get_rss_hash_opts(struct vmxnet3_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> vmxnet3_set_rss_hash_opt(struct net_device *netdev,</div><div class='del'>-			 struct vmxnet3_adapter *adapter,</div><div class='del'>-			 struct ethtool_rxnfc *nfc)</div><div class='add'>+			 const struct ethtool_rxfh_fields *nfc,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='del'>-	enum Vmxnet3_RSSField rss_fields = adapter-&gt;rss_fields;</div><div class='add'>+	struct vmxnet3_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	enum Vmxnet3_RSSField rss_fields;</div><div class='add'>+</div><div class='add'>+	if (!VMXNET3_VERSION_GE_4(adapter))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+#ifdef VMXNET3_RSS</div><div class='add'>+	if (!adapter-&gt;rss)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	rss_fields = adapter-&gt;rss_fields;</div><div class='ctx'> </div><div class='ctx'> 	/* RSS does not support anything other than hashing</div><div class='ctx'> 	 * to queues on src and dst IPs and ports</div><div class='hunk'>@@ -1063,66 +1081,11 @@ vmxnet3_set_rss_hash_opt(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-vmxnet3_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *info,</div><div class='del'>-		  u32 *rules)</div><div class='del'>-{</div><div class='del'>-	struct vmxnet3_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_GRXRINGS:</div><div class='del'>-		info-&gt;data = adapter-&gt;num_rx_queues;</div><div class='del'>-		break;</div><div class='del'>-	case ETHTOOL_GRXFH:</div><div class='del'>-		if (!VMXNET3_VERSION_GE_4(adapter)) {</div><div class='del'>-			err = -EOPNOTSUPP;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-#ifdef VMXNET3_RSS</div><div class='del'>-		if (!adapter-&gt;rss) {</div><div class='del'>-			err = -EOPNOTSUPP;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-		err = vmxnet3_get_rss_hash_opts(adapter, info);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		err = -EOPNOTSUPP;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-vmxnet3_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *info)</div><div class='add'>+static u32 vmxnet3_get_rx_ring_count(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct vmxnet3_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	int err = 0;</div><div class='ctx'> </div><div class='del'>-	if (!VMXNET3_VERSION_GE_4(adapter)) {</div><div class='del'>-		err = -EOPNOTSUPP;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-#ifdef VMXNET3_RSS</div><div class='del'>-	if (!adapter-&gt;rss) {</div><div class='del'>-		err = -EOPNOTSUPP;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	switch (info-&gt;cmd) {</div><div class='del'>-	case ETHTOOL_SRXFH:</div><div class='del'>-		err = vmxnet3_set_rss_hash_opt(netdev, adapter, info);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		err = -EOPNOTSUPP;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	return err;</div><div class='add'>+	return adapter-&gt;num_rx_queues;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef VMXNET3_RSS</div><div class='hunk'>@@ -1360,13 +1323,14 @@ static const struct ethtool_ops vmxnet3_ethtool_ops = {</div><div class='ctx'> 	.get_ethtool_stats = vmxnet3_get_ethtool_stats,</div><div class='ctx'> 	.get_ringparam     = vmxnet3_get_ringparam,</div><div class='ctx'> 	.set_ringparam     = vmxnet3_set_ringparam,</div><div class='del'>-	.get_rxnfc         = vmxnet3_get_rxnfc,</div><div class='del'>-	.set_rxnfc         = vmxnet3_set_rxnfc,</div><div class='add'>+	.get_rx_ring_count = vmxnet3_get_rx_ring_count,</div><div class='ctx'> #ifdef VMXNET3_RSS</div><div class='ctx'> 	.get_rxfh_indir_size = vmxnet3_get_rss_indir_size,</div><div class='ctx'> 	.get_rxfh          = vmxnet3_get_rss,</div><div class='ctx'> 	.set_rxfh          = vmxnet3_set_rss,</div><div class='ctx'> #endif</div><div class='add'>+	.get_rxfh_fields   = vmxnet3_get_rss_hash_opts,</div><div class='add'>+	.set_rxfh_fields   = vmxnet3_set_rss_hash_opt,</div><div class='ctx'> 	.get_link_ksettings = vmxnet3_get_link_ksettings,</div><div class='ctx'> 	.get_channels      = vmxnet3_get_channels,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/vmxnet3/vmxnet3_xdp.c b/drivers/net/vmxnet3/vmxnet3_xdp.c<br/>index 1341374a4588..5f470499e600 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/vmxnet3/vmxnet3_xdp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vmxnet3/vmxnet3_xdp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/vmxnet3/vmxnet3_xdp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/vmxnet3/vmxnet3_xdp.c</a></div><div class='hunk'>@@ -28,7 +28,7 @@ vmxnet3_xdp_get_tq(struct vmxnet3_adapter *adapter)</div><div class='ctx'> 	if (likely(cpu &lt; tq_number))</div><div class='ctx'> 		tq = &amp;adapter-&gt;tx_queue[cpu];</div><div class='ctx'> 	else</div><div class='del'>-		tq = &amp;adapter-&gt;tx_queue[reciprocal_scale(cpu, tq_number)];</div><div class='add'>+		tq = &amp;adapter-&gt;tx_queue[cpu % tq_number];</div><div class='ctx'> </div><div class='ctx'> 	return tq;</div><div class='ctx'> }</div><div class='hunk'>@@ -124,6 +124,7 @@ vmxnet3_xdp_xmit_frame(struct vmxnet3_adapter *adapter,</div><div class='ctx'> 	u32 buf_size;</div><div class='ctx'> 	u32 dw2;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irq(&amp;tq-&gt;tx_lock);</div><div class='ctx'> 	dw2 = (tq-&gt;tx_ring.gen ^ 0x1) &lt;&lt; VMXNET3_TXD_GEN_SHIFT;</div><div class='ctx'> 	dw2 |= xdpf-&gt;len;</div><div class='ctx'> 	ctx.sop_txd = tq-&gt;tx_ring.base + tq-&gt;tx_ring.next2fill;</div><div class='hunk'>@@ -134,6 +135,7 @@ vmxnet3_xdp_xmit_frame(struct vmxnet3_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	if (vmxnet3_cmd_ring_desc_avail(&amp;tq-&gt;tx_ring) == 0) {</div><div class='ctx'> 		tq-&gt;stats.tx_ring_full++;</div><div class='add'>+		spin_unlock_irq(&amp;tq-&gt;tx_lock);</div><div class='ctx'> 		return -ENOSPC;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -142,8 +144,10 @@ vmxnet3_xdp_xmit_frame(struct vmxnet3_adapter *adapter,</div><div class='ctx'> 		tbi-&gt;dma_addr = dma_map_single(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='ctx'> 					       xdpf-&gt;data, buf_size,</div><div class='ctx'> 					       DMA_TO_DEVICE);</div><div class='del'>-		if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev, tbi-&gt;dma_addr))</div><div class='add'>+		if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev, tbi-&gt;dma_addr)) {</div><div class='add'>+			spin_unlock_irq(&amp;tq-&gt;tx_lock);</div><div class='ctx'> 			return -EFAULT;</div><div class='add'>+		}</div><div class='ctx'> 		tbi-&gt;map_type |= VMXNET3_MAP_SINGLE;</div><div class='ctx'> 	} else { /* XDP buffer from page pool */</div><div class='ctx'> 		page = virt_to_page(xdpf-&gt;data);</div><div class='hunk'>@@ -182,6 +186,7 @@ vmxnet3_xdp_xmit_frame(struct vmxnet3_adapter *adapter,</div><div class='ctx'> 	dma_wmb();</div><div class='ctx'> 	gdesc-&gt;dword[2] = cpu_to_le32(le32_to_cpu(gdesc-&gt;dword[2]) ^</div><div class='ctx'> 						  VMXNET3_TXD_GEN);</div><div class='add'>+	spin_unlock_irq(&amp;tq-&gt;tx_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* No need to handle the case when tx_num_deferred doesn't reach</div><div class='ctx'> 	 * threshold. Backend driver at hypervisor side will poll and reset</div><div class='hunk'>@@ -225,6 +230,7 @@ vmxnet3_xdp_xmit(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct vmxnet3_adapter *adapter = netdev_priv(dev);</div><div class='ctx'> 	struct vmxnet3_tx_queue *tq;</div><div class='add'>+	struct netdev_queue *nq;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(test_bit(VMXNET3_STATE_BIT_QUIESCED, &amp;adapter-&gt;state)))</div><div class='hunk'>@@ -236,6 +242,9 @@ vmxnet3_xdp_xmit(struct net_device *dev,</div><div class='ctx'> 	if (tq-&gt;stopped)</div><div class='ctx'> 		return -ENETDOWN;</div><div class='ctx'> </div><div class='add'>+	nq = netdev_get_tx_queue(adapter-&gt;netdev, tq-&gt;qid);</div><div class='add'>+</div><div class='add'>+	__netif_tx_lock(nq, smp_processor_id());</div><div class='ctx'> 	for (i = 0; i &lt; n; i++) {</div><div class='ctx'> 		if (vmxnet3_xdp_xmit_frame(adapter, frames[i], tq, true)) {</div><div class='ctx'> 			tq-&gt;stats.xdp_xmit_err++;</div><div class='hunk'>@@ -243,6 +252,7 @@ vmxnet3_xdp_xmit(struct net_device *dev,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	tq-&gt;stats.xdp_xmit += i;</div><div class='add'>+	__netif_tx_unlock(nq);</div><div class='ctx'> </div><div class='ctx'> 	return i;</div><div class='ctx'> }</div><div class='hunk'>@@ -387,7 +397,7 @@ vmxnet3_process_xdp(struct vmxnet3_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> 	xdp_init_buff(&amp;xdp, PAGE_SIZE, &amp;rq-&gt;xdp_rxq);</div><div class='ctx'> 	xdp_prepare_buff(&amp;xdp, page_address(page), rq-&gt;page_pool-&gt;p.offset,</div><div class='del'>-			 rbi-&gt;len, false);</div><div class='add'>+			 rcd-&gt;len, false);</div><div class='ctx'> 	xdp_buff_clear_frags_flag(&amp;xdp);</div><div class='ctx'> </div><div class='ctx'> 	xdp_prog = rcu_dereference(rq-&gt;adapter-&gt;xdp_bpf_prog);</div><div class='head'>diff --git a/drivers/net/vrf.c b/drivers/net/vrf.c<br/>index 67d25f4f94ef..571847a7f86d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/vrf.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vrf.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/vrf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/vrf.c</a></div><div class='hunk'>@@ -26,6 +26,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/inetdevice.h&gt;</div><div class='ctx'> #include &lt;net/arp.h&gt;</div><div class='add'>+#include &lt;net/flow.h&gt;</div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='ctx'> #include &lt;net/ip_fib.h&gt;</div><div class='ctx'> #include &lt;net/ip6_fib.h&gt;</div><div class='hunk'>@@ -34,10 +35,10 @@</div><div class='ctx'> #include &lt;net/addrconf.h&gt;</div><div class='ctx'> #include &lt;net/l3mdev.h&gt;</div><div class='ctx'> #include &lt;net/fib_rules.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/sch_generic.h&gt;</div><div class='ctx'> #include &lt;net/netns/generic.h&gt;</div><div class='ctx'> #include &lt;net/netfilter/nf_conntrack.h&gt;</div><div class='del'>-#include &lt;net/inet_dscp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"vrf"</div><div class='ctx'> #define DRV_VERSION	"1.1"</div><div class='hunk'>@@ -122,16 +123,6 @@ struct net_vrf {</div><div class='ctx'> 	int			ifindex;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void vrf_rx_stats(struct net_device *dev, int len)</div><div class='del'>-{</div><div class='del'>-	struct pcpu_dstats *dstats = this_cpu_ptr(dev-&gt;dstats);</div><div class='del'>-</div><div class='del'>-	u64_stats_update_begin(&amp;dstats-&gt;syncp);</div><div class='del'>-	u64_stats_inc(&amp;dstats-&gt;rx_packets);</div><div class='del'>-	u64_stats_add(&amp;dstats-&gt;rx_bytes, len);</div><div class='del'>-	u64_stats_update_end(&amp;dstats-&gt;syncp);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void vrf_tx_error(struct net_device *vrf_dev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	vrf_dev-&gt;stats.tx_errors++;</div><div class='hunk'>@@ -352,15 +343,13 @@ unlock:</div><div class='ctx'> static bool qdisc_tx_is_default(const struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_queue *txq;</div><div class='del'>-	struct Qdisc *qdisc;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;num_tx_queues &gt; 1)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	txq = netdev_get_tx_queue(dev, 0);</div><div class='del'>-	qdisc = rcu_access_pointer(txq-&gt;qdisc);</div><div class='ctx'> </div><div class='del'>-	return !qdisc-&gt;enqueue;</div><div class='add'>+	return qdisc_txq_has_no_queue(txq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Local traffic destined to local address. Reinsert the packet to rx</div><div class='hunk'>@@ -369,7 +358,7 @@ static bool qdisc_tx_is_default(const struct net_device *dev)</div><div class='ctx'> static int vrf_local_xmit(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			  struct dst_entry *dst)</div><div class='ctx'> {</div><div class='del'>-	int len = skb-&gt;len;</div><div class='add'>+	unsigned int len = skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	skb_orphan(skb);</div><div class='ctx'> </div><div class='hunk'>@@ -382,15 +371,10 @@ static int vrf_local_xmit(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='ctx'> </div><div class='del'>-	if (likely(__netif_rx(skb) == NET_RX_SUCCESS)) {</div><div class='del'>-		vrf_rx_stats(dev, len);</div><div class='del'>-	} else {</div><div class='del'>-		struct pcpu_dstats *dstats = this_cpu_ptr(dev-&gt;dstats);</div><div class='del'>-</div><div class='del'>-		u64_stats_update_begin(&amp;dstats-&gt;syncp);</div><div class='del'>-		u64_stats_inc(&amp;dstats-&gt;rx_drops);</div><div class='del'>-		u64_stats_update_end(&amp;dstats-&gt;syncp);</div><div class='del'>-	}</div><div class='add'>+	if (likely(__netif_rx(skb) == NET_RX_SUCCESS))</div><div class='add'>+		dev_dstats_rx_add(dev, len);</div><div class='add'>+	else</div><div class='add'>+		dev_dstats_rx_dropped(dev);</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -521,7 +505,7 @@ static netdev_tx_t vrf_process_v4_outbound(struct sk_buff *skb,</div><div class='ctx'> 	/* needed to match OIF rule */</div><div class='ctx'> 	fl4.flowi4_l3mdev = vrf_dev-&gt;ifindex;</div><div class='ctx'> 	fl4.flowi4_iif = LOOPBACK_IFINDEX;</div><div class='del'>-	fl4.flowi4_tos = inet_dscp_to_dsfield(ip4h_dscp(ip4h));</div><div class='add'>+	fl4.flowi4_dscp = ip4h_dscp(ip4h);</div><div class='ctx'> 	fl4.flowi4_flags = FLOWI_FLAG_ANYSRC;</div><div class='ctx'> 	fl4.flowi4_proto = ip4h-&gt;protocol;</div><div class='ctx'> 	fl4.daddr = ip4h-&gt;daddr;</div><div class='hunk'>@@ -578,20 +562,14 @@ static netdev_tx_t is_ip_tx_frame(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t vrf_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct pcpu_dstats *dstats = this_cpu_ptr(dev-&gt;dstats);</div><div class='add'>+	unsigned int len = skb-&gt;len;</div><div class='add'>+	netdev_tx_t ret;</div><div class='ctx'> </div><div class='del'>-	int len = skb-&gt;len;</div><div class='del'>-	netdev_tx_t ret = is_ip_tx_frame(skb, dev);</div><div class='del'>-</div><div class='del'>-	u64_stats_update_begin(&amp;dstats-&gt;syncp);</div><div class='del'>-	if (likely(ret == NET_XMIT_SUCCESS || ret == NET_XMIT_CN)) {</div><div class='del'>-</div><div class='del'>-		u64_stats_inc(&amp;dstats-&gt;tx_packets);</div><div class='del'>-		u64_stats_add(&amp;dstats-&gt;tx_bytes, len);</div><div class='del'>-	} else {</div><div class='del'>-		u64_stats_inc(&amp;dstats-&gt;tx_drops);</div><div class='del'>-	}</div><div class='del'>-	u64_stats_update_end(&amp;dstats-&gt;syncp);</div><div class='add'>+	ret = is_ip_tx_frame(skb, dev);</div><div class='add'>+	if (likely(ret == NET_XMIT_SUCCESS || ret == NET_XMIT_CN))</div><div class='add'>+		dev_dstats_tx_add(dev, len);</div><div class='add'>+	else</div><div class='add'>+		dev_dstats_tx_dropped(dev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1324,6 +1302,8 @@ static void vrf_ip6_input_dst(struct sk_buff *skb, struct net_device *vrf_dev,</div><div class='ctx'> 	struct net *net = dev_net(vrf_dev);</div><div class='ctx'> 	struct rt6_info *rt6;</div><div class='ctx'> </div><div class='add'>+	skb_dst_drop(skb);</div><div class='add'>+</div><div class='ctx'> 	rt6 = vrf_ip6_route_lookup(net, vrf_dev, &amp;fl6, ifindex, skb,</div><div class='ctx'> 				   RT6_LOOKUP_F_HAS_SADDR | RT6_LOOKUP_F_IFACE);</div><div class='ctx'> 	if (unlikely(!rt6))</div><div class='hunk'>@@ -1364,7 +1344,7 @@ static struct sk_buff *vrf_ip6_rcv(struct net_device *vrf_dev,</div><div class='ctx'> 	if (!is_ndisc) {</div><div class='ctx'> 		struct net_device *orig_dev = skb-&gt;dev;</div><div class='ctx'> </div><div class='del'>-		vrf_rx_stats(vrf_dev, skb-&gt;len);</div><div class='add'>+		dev_dstats_rx_add(vrf_dev, skb-&gt;len);</div><div class='ctx'> 		skb-&gt;dev = vrf_dev;</div><div class='ctx'> 		skb-&gt;skb_iif = vrf_dev-&gt;ifindex;</div><div class='ctx'> </div><div class='hunk'>@@ -1420,7 +1400,7 @@ static struct sk_buff *vrf_ip_rcv(struct net_device *vrf_dev,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	vrf_rx_stats(vrf_dev, skb-&gt;len);</div><div class='add'>+	dev_dstats_rx_add(vrf_dev, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	if (!list_empty(&amp;vrf_dev-&gt;ptype_all)) {</div><div class='ctx'> 		int err;</div><div class='hunk'>@@ -1558,14 +1538,12 @@ static int vrf_fib_rule(const struct net_device *dev, __u8 family, bool add_it)</div><div class='ctx'> </div><div class='ctx'> 	nlmsg_end(skb, nlh);</div><div class='ctx'> </div><div class='del'>-	/* fib_nl_{new,del}rule handling looks for net from skb-&gt;sk */</div><div class='del'>-	skb-&gt;sk = dev_net(dev)-&gt;rtnl;</div><div class='ctx'> 	if (add_it) {</div><div class='del'>-		err = fib_nl_newrule(skb, nlh, NULL);</div><div class='add'>+		err = fib_newrule(dev_net(dev), skb, nlh, NULL, true);</div><div class='ctx'> 		if (err == -EEXIST)</div><div class='ctx'> 			err = 0;</div><div class='ctx'> 	} else {</div><div class='del'>-		err = fib_nl_delrule(skb, nlh, NULL);</div><div class='add'>+		err = fib_delrule(dev_net(dev), skb, nlh, NULL, true);</div><div class='ctx'> 		if (err == -ENOENT)</div><div class='ctx'> 			err = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1640,7 +1618,7 @@ static void vrf_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;lltx = true;</div><div class='ctx'> </div><div class='ctx'> 	/* don't allow vrf devices to change network namespaces. */</div><div class='del'>-	dev-&gt;netns_local = true;</div><div class='add'>+	dev-&gt;netns_immutable = true;</div><div class='ctx'> </div><div class='ctx'> 	/* does not make sense for a VLAN to be added to a vrf device */</div><div class='ctx'> 	dev-&gt;features   |= NETIF_F_VLAN_CHALLENGED;</div><div class='hunk'>@@ -1698,11 +1676,12 @@ static void vrf_dellink(struct net_device *dev, struct list_head *head)</div><div class='ctx'> 	unregister_netdevice_queue(dev, head);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vrf_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-		       struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int vrf_newlink(struct net_device *dev,</div><div class='add'>+		       struct rtnl_newlink_params *params,</div><div class='ctx'> 		       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_vrf *vrf = netdev_priv(dev);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='ctx'> 	struct netns_vrf *nn_vrf;</div><div class='ctx'> 	bool *add_fib_rules;</div><div class='ctx'> 	struct net *net;</div><div class='head'>diff --git a/drivers/net/vxlan/vxlan_core.c b/drivers/net/vxlan/vxlan_core.c<br/>index 841b59d1c1c2..e957aa12a8a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/vxlan/vxlan_core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vxlan/vxlan_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/vxlan/vxlan_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/vxlan/vxlan_core.c</a></div><div class='hunk'>@@ -15,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/igmp.h&gt;</div><div class='ctx'> #include &lt;linux/if_ether.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/rhashtable.h&gt;</div><div class='ctx'> #include &lt;net/arp.h&gt;</div><div class='ctx'> #include &lt;net/ndisc.h&gt;</div><div class='ctx'> #include &lt;net/gro.h&gt;</div><div class='hunk'>@@ -25,6 +26,7 @@</div><div class='ctx'> #include &lt;net/inet_ecn.h&gt;</div><div class='ctx'> #include &lt;net/net_namespace.h&gt;</div><div class='ctx'> #include &lt;net/netns/generic.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/tun_proto.h&gt;</div><div class='ctx'> #include &lt;net/vxlan.h&gt;</div><div class='ctx'> #include &lt;net/nexthop.h&gt;</div><div class='hunk'>@@ -62,8 +64,12 @@ static int vxlan_sock_add(struct vxlan_dev *vxlan);</div><div class='ctx'> </div><div class='ctx'> static void vxlan_vs_del_dev(struct vxlan_dev *vxlan);</div><div class='ctx'> </div><div class='del'>-/* salt for hash table */</div><div class='del'>-static u32 vxlan_salt __read_mostly;</div><div class='add'>+static const struct rhashtable_params vxlan_fdb_rht_params = {</div><div class='add'>+	.head_offset = offsetof(struct vxlan_fdb, rhnode),</div><div class='add'>+	.key_offset = offsetof(struct vxlan_fdb, key),</div><div class='add'>+	.key_len = sizeof(struct vxlan_fdb_key),</div><div class='add'>+	.automatic_shrinking = true,</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static inline bool vxlan_collect_metadata(struct vxlan_sock *vs)</div><div class='ctx'> {</div><div class='hunk'>@@ -185,7 +191,7 @@ static int vxlan_fdb_info(struct sk_buff *skb, struct vxlan_dev *vxlan,</div><div class='ctx'> 		} else if (nh) {</div><div class='ctx'> 			ndm-&gt;ndm_family = nh_family;</div><div class='ctx'> 		}</div><div class='del'>-		send_eth = !is_zero_ether_addr(fdb-&gt;eth_addr);</div><div class='add'>+		send_eth = !is_zero_ether_addr(fdb-&gt;key.eth_addr);</div><div class='ctx'> 	} else</div><div class='ctx'> 		ndm-&gt;ndm_family	= AF_BRIDGE;</div><div class='ctx'> 	ndm-&gt;ndm_state = fdb-&gt;state;</div><div class='hunk'>@@ -200,7 +206,7 @@ static int vxlan_fdb_info(struct sk_buff *skb, struct vxlan_dev *vxlan,</div><div class='ctx'> 			peernet2id(dev_net(vxlan-&gt;dev), vxlan-&gt;net)))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='del'>-	if (send_eth &amp;&amp; nla_put(skb, NDA_LLADDR, ETH_ALEN, &amp;fdb-&gt;eth_addr))</div><div class='add'>+	if (send_eth &amp;&amp; nla_put(skb, NDA_LLADDR, ETH_ALEN, &amp;fdb-&gt;key.eth_addr))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> 	if (nh) {</div><div class='ctx'> 		if (nla_put_u32(skb, NDA_NH_ID, nh_id))</div><div class='hunk'>@@ -222,14 +228,14 @@ static int vxlan_fdb_info(struct sk_buff *skb, struct vxlan_dev *vxlan,</div><div class='ctx'> 			goto nla_put_failure;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((vxlan-&gt;cfg.flags &amp; VXLAN_F_COLLECT_METADATA) &amp;&amp; fdb-&gt;vni &amp;&amp;</div><div class='add'>+	if ((vxlan-&gt;cfg.flags &amp; VXLAN_F_COLLECT_METADATA) &amp;&amp; fdb-&gt;key.vni &amp;&amp;</div><div class='ctx'> 	    nla_put_u32(skb, NDA_SRC_VNI,</div><div class='del'>-			be32_to_cpu(fdb-&gt;vni)))</div><div class='add'>+			be32_to_cpu(fdb-&gt;key.vni)))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='del'>-	ci.ndm_used	 = jiffies_to_clock_t(now - fdb-&gt;used);</div><div class='add'>+	ci.ndm_used	 = jiffies_to_clock_t(now - READ_ONCE(fdb-&gt;used));</div><div class='ctx'> 	ci.ndm_confirmed = 0;</div><div class='del'>-	ci.ndm_updated	 = jiffies_to_clock_t(now - fdb-&gt;updated);</div><div class='add'>+	ci.ndm_updated	 = jiffies_to_clock_t(now - READ_ONCE(fdb-&gt;updated));</div><div class='ctx'> 	ci.ndm_refcnt	 = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (nla_put(skb, NDA_CACHEINFO, sizeof(ci), &amp;ci))</div><div class='hunk'>@@ -292,8 +298,8 @@ static void vxlan_fdb_switchdev_notifier_info(const struct vxlan_dev *vxlan,</div><div class='ctx'> 	fdb_info-&gt;remote_port = rd-&gt;remote_port;</div><div class='ctx'> 	fdb_info-&gt;remote_vni = rd-&gt;remote_vni;</div><div class='ctx'> 	fdb_info-&gt;remote_ifindex = rd-&gt;remote_ifindex;</div><div class='del'>-	memcpy(fdb_info-&gt;eth_addr, fdb-&gt;eth_addr, ETH_ALEN);</div><div class='del'>-	fdb_info-&gt;vni = fdb-&gt;vni;</div><div class='add'>+	memcpy(fdb_info-&gt;eth_addr, fdb-&gt;key.eth_addr, ETH_ALEN);</div><div class='add'>+	fdb_info-&gt;vni = fdb-&gt;key.vni;</div><div class='ctx'> 	fdb_info-&gt;offloaded = rd-&gt;offloaded;</div><div class='ctx'> 	fdb_info-&gt;added_by_user = fdb-&gt;flags &amp; NTF_VXLAN_ADDED_BY_USER;</div><div class='ctx'> }</div><div class='hunk'>@@ -365,67 +371,42 @@ static void vxlan_fdb_miss(struct vxlan_dev *vxlan, const u8 eth_addr[ETH_ALEN])</div><div class='ctx'> 	};</div><div class='ctx'> 	struct vxlan_rdst remote = { };</div><div class='ctx'> </div><div class='del'>-	memcpy(f.eth_addr, eth_addr, ETH_ALEN);</div><div class='add'>+	memcpy(f.key.eth_addr, eth_addr, ETH_ALEN);</div><div class='ctx'> </div><div class='ctx'> 	vxlan_fdb_notify(vxlan, &amp;f, &amp;remote, RTM_GETNEIGH, true, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Hash Ethernet address */</div><div class='del'>-static u32 eth_hash(const unsigned char *addr)</div><div class='del'>-{</div><div class='del'>-	u64 value = get_unaligned((u64 *)addr);</div><div class='del'>-</div><div class='del'>-	/* only want 6 bytes */</div><div class='del'>-#ifdef __BIG_ENDIAN</div><div class='del'>-	value &gt;&gt;= 16;</div><div class='del'>-#else</div><div class='del'>-	value &lt;&lt;= 16;</div><div class='del'>-#endif</div><div class='del'>-	return hash_64(value, FDB_HASH_BITS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-u32 eth_vni_hash(const unsigned char *addr, __be32 vni)</div><div class='add'>+/* Look up Ethernet address in forwarding table */</div><div class='add'>+static struct vxlan_fdb *vxlan_find_mac_rcu(struct vxlan_dev *vxlan,</div><div class='add'>+					    const u8 *mac, __be32 vni)</div><div class='ctx'> {</div><div class='del'>-	/* use 1 byte of OUI and 3 bytes of NIC */</div><div class='del'>-	u32 key = get_unaligned((u32 *)(addr + 2));</div><div class='del'>-</div><div class='del'>-	return jhash_2words(key, vni, vxlan_salt) &amp; (FDB_HASH_SIZE - 1);</div><div class='del'>-}</div><div class='add'>+	struct vxlan_fdb_key key;</div><div class='ctx'> </div><div class='del'>-u32 fdb_head_index(struct vxlan_dev *vxlan, const u8 *mac, __be32 vni)</div><div class='del'>-{</div><div class='del'>-	if (vxlan-&gt;cfg.flags &amp; VXLAN_F_COLLECT_METADATA)</div><div class='del'>-		return eth_vni_hash(mac, vni);</div><div class='add'>+	memset(&amp;key, 0, sizeof(key));</div><div class='add'>+	memcpy(key.eth_addr, mac, sizeof(key.eth_addr));</div><div class='add'>+	if (!(vxlan-&gt;cfg.flags &amp; VXLAN_F_COLLECT_METADATA))</div><div class='add'>+		key.vni = vxlan-&gt;default_dst.remote_vni;</div><div class='ctx'> 	else</div><div class='del'>-		return eth_hash(mac);</div><div class='del'>-}</div><div class='add'>+		key.vni = vni;</div><div class='ctx'> </div><div class='del'>-/* Hash chain to use given mac address */</div><div class='del'>-static inline struct hlist_head *vxlan_fdb_head(struct vxlan_dev *vxlan,</div><div class='del'>-						const u8 *mac, __be32 vni)</div><div class='del'>-{</div><div class='del'>-	return &amp;vxlan-&gt;fdb_head[fdb_head_index(vxlan, mac, vni)];</div><div class='add'>+	return rhashtable_lookup(&amp;vxlan-&gt;fdb_hash_tbl, &amp;key,</div><div class='add'>+				 vxlan_fdb_rht_params);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Look up Ethernet address in forwarding table */</div><div class='del'>-static struct vxlan_fdb *__vxlan_find_mac(struct vxlan_dev *vxlan,</div><div class='del'>-					  const u8 *mac, __be32 vni)</div><div class='add'>+static struct vxlan_fdb *vxlan_find_mac_tx(struct vxlan_dev *vxlan,</div><div class='add'>+					   const u8 *mac, __be32 vni)</div><div class='ctx'> {</div><div class='del'>-	struct hlist_head *head = vxlan_fdb_head(vxlan, mac, vni);</div><div class='ctx'> 	struct vxlan_fdb *f;</div><div class='ctx'> </div><div class='del'>-	hlist_for_each_entry_rcu(f, head, hlist) {</div><div class='del'>-		if (ether_addr_equal(mac, f-&gt;eth_addr)) {</div><div class='del'>-			if (vxlan-&gt;cfg.flags &amp; VXLAN_F_COLLECT_METADATA) {</div><div class='del'>-				if (vni == f-&gt;vni)</div><div class='del'>-					return f;</div><div class='del'>-			} else {</div><div class='del'>-				return f;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+	f = vxlan_find_mac_rcu(vxlan, mac, vni);</div><div class='add'>+	if (f) {</div><div class='add'>+		unsigned long now = jiffies;</div><div class='add'>+</div><div class='add'>+		if (READ_ONCE(f-&gt;used) != now)</div><div class='add'>+			WRITE_ONCE(f-&gt;used, now);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return NULL;</div><div class='add'>+	return f;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct vxlan_fdb *vxlan_find_mac(struct vxlan_dev *vxlan,</div><div class='hunk'>@@ -433,9 +414,11 @@ static struct vxlan_fdb *vxlan_find_mac(struct vxlan_dev *vxlan,</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_fdb *f;</div><div class='ctx'> </div><div class='del'>-	f = __vxlan_find_mac(vxlan, mac, vni);</div><div class='del'>-	if (f &amp;&amp; f-&gt;used != jiffies)</div><div class='del'>-		f-&gt;used = jiffies;</div><div class='add'>+	lockdep_assert_held_once(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	f = vxlan_find_mac_rcu(vxlan, mac, vni);</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return f;</div><div class='ctx'> }</div><div class='hunk'>@@ -463,7 +446,7 @@ int vxlan_fdb_find_uc(struct net_device *dev, const u8 *mac, __be32 vni,</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='ctx'> 	u8 eth_addr[ETH_ALEN + 2] = { 0 };</div><div class='del'>-	struct vxlan_rdst *rdst;</div><div class='add'>+	struct vxlan_rdst *rdst = NULL;</div><div class='ctx'> 	struct vxlan_fdb *f;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -475,13 +458,14 @@ int vxlan_fdb_find_uc(struct net_device *dev, const u8 *mac, __be32 vni,</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> </div><div class='del'>-	f = __vxlan_find_mac(vxlan, eth_addr, vni);</div><div class='del'>-	if (!f) {</div><div class='add'>+	f = vxlan_find_mac_rcu(vxlan, eth_addr, vni);</div><div class='add'>+	if (f)</div><div class='add'>+		rdst = first_remote_rcu(f);</div><div class='add'>+	if (!rdst) {</div><div class='ctx'> 		rc = -ENOENT;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rdst = first_remote_rcu(f);</div><div class='ctx'> 	vxlan_fdb_switchdev_notifier_info(vxlan, f, rdst, NULL, fdb_info);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -512,32 +496,28 @@ int vxlan_fdb_replay(const struct net_device *dev, __be32 vni,</div><div class='ctx'> 	struct vxlan_dev *vxlan;</div><div class='ctx'> 	struct vxlan_rdst *rdst;</div><div class='ctx'> 	struct vxlan_fdb *f;</div><div class='del'>-	unsigned int h;</div><div class='ctx'> 	int rc = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_is_vxlan(dev))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	vxlan = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	for (h = 0; h &lt; FDB_HASH_SIZE; ++h) {</div><div class='del'>-		spin_lock_bh(&amp;vxlan-&gt;hash_lock[h]);</div><div class='del'>-		hlist_for_each_entry(f, &amp;vxlan-&gt;fdb_head[h], hlist) {</div><div class='del'>-			if (f-&gt;vni == vni) {</div><div class='del'>-				list_for_each_entry(rdst, &amp;f-&gt;remotes, list) {</div><div class='del'>-					rc = vxlan_fdb_notify_one(nb, vxlan,</div><div class='del'>-								  f, rdst,</div><div class='del'>-								  extack);</div><div class='del'>-					if (rc)</div><div class='del'>-						goto unlock;</div><div class='del'>-				}</div><div class='add'>+	spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+	hlist_for_each_entry(f, &amp;vxlan-&gt;fdb_list, fdb_node) {</div><div class='add'>+		if (f-&gt;key.vni == vni) {</div><div class='add'>+			list_for_each_entry(rdst, &amp;f-&gt;remotes, list) {</div><div class='add'>+				rc = vxlan_fdb_notify_one(nb, vxlan, f, rdst,</div><div class='add'>+							  extack);</div><div class='add'>+				if (rc)</div><div class='add'>+					goto unlock;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		spin_unlock_bh(&amp;vxlan-&gt;hash_lock[h]);</div><div class='ctx'> 	}</div><div class='add'>+	spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> unlock:</div><div class='del'>-	spin_unlock_bh(&amp;vxlan-&gt;hash_lock[h]);</div><div class='add'>+	spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(vxlan_fdb_replay);</div><div class='hunk'>@@ -547,20 +527,19 @@ void vxlan_fdb_clear_offload(const struct net_device *dev, __be32 vni)</div><div class='ctx'> 	struct vxlan_dev *vxlan;</div><div class='ctx'> 	struct vxlan_rdst *rdst;</div><div class='ctx'> 	struct vxlan_fdb *f;</div><div class='del'>-	unsigned int h;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_is_vxlan(dev))</div><div class='ctx'> 		return;</div><div class='ctx'> 	vxlan = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	for (h = 0; h &lt; FDB_HASH_SIZE; ++h) {</div><div class='del'>-		spin_lock_bh(&amp;vxlan-&gt;hash_lock[h]);</div><div class='del'>-		hlist_for_each_entry(f, &amp;vxlan-&gt;fdb_head[h], hlist)</div><div class='del'>-			if (f-&gt;vni == vni)</div><div class='del'>-				list_for_each_entry(rdst, &amp;f-&gt;remotes, list)</div><div class='del'>-					rdst-&gt;offloaded = false;</div><div class='del'>-		spin_unlock_bh(&amp;vxlan-&gt;hash_lock[h]);</div><div class='add'>+	spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+	hlist_for_each_entry(f, &amp;vxlan-&gt;fdb_list, fdb_node) {</div><div class='add'>+		if (f-&gt;key.vni == vni) {</div><div class='add'>+			list_for_each_entry(rdst, &amp;f-&gt;remotes, list)</div><div class='add'>+				rdst-&gt;offloaded = false;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+	spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(vxlan_fdb_clear_offload);</div><div class='hunk'>@@ -605,10 +584,10 @@ static int vxlan_fdb_append(struct vxlan_fdb *f,</div><div class='ctx'> 	if (rd == NULL)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (dst_cache_init(&amp;rd-&gt;dst_cache, GFP_ATOMIC)) {</div><div class='del'>-		kfree(rd);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='add'>+	/* The driver can work correctly without a dst cache, so do not treat</div><div class='add'>+	 * dst cache initialization errors as fatal.</div><div class='add'>+	 */</div><div class='add'>+	dst_cache_init(&amp;rd-&gt;dst_cache, GFP_ATOMIC | __GFP_NOWARN);</div><div class='ctx'> </div><div class='ctx'> 	rd-&gt;remote_ip = *ip;</div><div class='ctx'> 	rd-&gt;remote_port = port;</div><div class='hunk'>@@ -622,9 +601,9 @@ static int vxlan_fdb_append(struct vxlan_fdb *f,</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool vxlan_parse_gpe_proto(struct vxlanhdr *hdr, __be16 *protocol)</div><div class='add'>+static bool vxlan_parse_gpe_proto(const struct vxlanhdr *hdr, __be16 *protocol)</div><div class='ctx'> {</div><div class='del'>-	struct vxlanhdr_gpe *gpe = (struct vxlanhdr_gpe *)hdr;</div><div class='add'>+	const struct vxlanhdr_gpe *gpe = (const struct vxlanhdr_gpe *)hdr;</div><div class='ctx'> </div><div class='ctx'> 	/* Need to have Next Protocol set for interfaces in GPE mode. */</div><div class='ctx'> 	if (!gpe-&gt;np_applied)</div><div class='hunk'>@@ -798,27 +777,20 @@ static struct vxlan_fdb *vxlan_fdb_alloc(struct vxlan_dev *vxlan, const u8 *mac,</div><div class='ctx'> 	f = kmalloc(sizeof(*f), GFP_ATOMIC);</div><div class='ctx'> 	if (!f)</div><div class='ctx'> 		return NULL;</div><div class='add'>+	memset(&amp;f-&gt;key, 0, sizeof(f-&gt;key));</div><div class='ctx'> 	f-&gt;state = state;</div><div class='ctx'> 	f-&gt;flags = ndm_flags;</div><div class='ctx'> 	f-&gt;updated = f-&gt;used = jiffies;</div><div class='del'>-	f-&gt;vni = src_vni;</div><div class='add'>+	f-&gt;key.vni = src_vni;</div><div class='ctx'> 	f-&gt;nh = NULL;</div><div class='ctx'> 	RCU_INIT_POINTER(f-&gt;vdev, vxlan);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;f-&gt;nh_list);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;f-&gt;remotes);</div><div class='del'>-	memcpy(f-&gt;eth_addr, mac, ETH_ALEN);</div><div class='add'>+	memcpy(f-&gt;key.eth_addr, mac, ETH_ALEN);</div><div class='ctx'> </div><div class='ctx'> 	return f;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void vxlan_fdb_insert(struct vxlan_dev *vxlan, const u8 *mac,</div><div class='del'>-			     __be32 src_vni, struct vxlan_fdb *f)</div><div class='del'>-{</div><div class='del'>-	++vxlan-&gt;addrcnt;</div><div class='del'>-	hlist_add_head_rcu(&amp;f-&gt;hlist,</div><div class='del'>-			   vxlan_fdb_head(vxlan, mac, src_vni));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int vxlan_fdb_nh_update(struct vxlan_dev *vxlan, struct vxlan_fdb *fdb,</div><div class='ctx'> 			       u32 nhid, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='hunk'>@@ -908,10 +880,27 @@ int vxlan_fdb_create(struct vxlan_dev *vxlan,</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		goto errout;</div><div class='ctx'> </div><div class='add'>+	rc = rhashtable_lookup_insert_fast(&amp;vxlan-&gt;fdb_hash_tbl, &amp;f-&gt;rhnode,</div><div class='add'>+					   vxlan_fdb_rht_params);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto destroy_remote;</div><div class='add'>+</div><div class='add'>+	++vxlan-&gt;addrcnt;</div><div class='add'>+	hlist_add_head_rcu(&amp;f-&gt;fdb_node, &amp;vxlan-&gt;fdb_list);</div><div class='add'>+</div><div class='ctx'> 	*fdb = f;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+destroy_remote:</div><div class='add'>+	if (rcu_access_pointer(f-&gt;nh)) {</div><div class='add'>+		list_del_rcu(&amp;f-&gt;nh_list);</div><div class='add'>+		nexthop_put(rtnl_dereference(f-&gt;nh));</div><div class='add'>+	} else {</div><div class='add'>+		list_del(&amp;rd-&gt;list);</div><div class='add'>+		dst_cache_destroy(&amp;rd-&gt;dst_cache);</div><div class='add'>+		kfree(rd);</div><div class='add'>+	}</div><div class='ctx'> errout:</div><div class='ctx'> 	kfree(f);</div><div class='ctx'> 	return rc;</div><div class='hunk'>@@ -948,7 +937,7 @@ static void vxlan_fdb_destroy(struct vxlan_dev *vxlan, struct vxlan_fdb *f,</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_rdst *rd;</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(vxlan-&gt;dev, "delete %pM\n", f-&gt;eth_addr);</div><div class='add'>+	netdev_dbg(vxlan-&gt;dev, "delete %pM\n", f-&gt;key.eth_addr);</div><div class='ctx'> </div><div class='ctx'> 	--vxlan-&gt;addrcnt;</div><div class='ctx'> 	if (do_notify) {</div><div class='hunk'>@@ -961,7 +950,9 @@ static void vxlan_fdb_destroy(struct vxlan_dev *vxlan, struct vxlan_fdb *f,</div><div class='ctx'> 						 swdev_notify, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	hlist_del_rcu(&amp;f-&gt;hlist);</div><div class='add'>+	hlist_del_init_rcu(&amp;f-&gt;fdb_node);</div><div class='add'>+	rhashtable_remove_fast(&amp;vxlan-&gt;fdb_hash_tbl, &amp;f-&gt;rhnode,</div><div class='add'>+			       vxlan_fdb_rht_params);</div><div class='ctx'> 	list_del_rcu(&amp;f-&gt;nh_list);</div><div class='ctx'> 	call_rcu(&amp;f-&gt;rcu, vxlan_fdb_free);</div><div class='ctx'> }</div><div class='hunk'>@@ -1009,20 +1000,18 @@ static int vxlan_fdb_update_existing(struct vxlan_dev *vxlan,</div><div class='ctx'> 	    !(f-&gt;flags &amp; NTF_VXLAN_ADDED_BY_USER)) {</div><div class='ctx'> 		if (f-&gt;state != state) {</div><div class='ctx'> 			f-&gt;state = state;</div><div class='del'>-			f-&gt;updated = jiffies;</div><div class='ctx'> 			notify = 1;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (f-&gt;flags != fdb_flags) {</div><div class='ctx'> 			f-&gt;flags = fdb_flags;</div><div class='del'>-			f-&gt;updated = jiffies;</div><div class='ctx'> 			notify = 1;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((flags &amp; NLM_F_REPLACE)) {</div><div class='ctx'> 		/* Only change unicasts */</div><div class='del'>-		if (!(is_multicast_ether_addr(f-&gt;eth_addr) ||</div><div class='del'>-		      is_zero_ether_addr(f-&gt;eth_addr))) {</div><div class='add'>+		if (!(is_multicast_ether_addr(f-&gt;key.eth_addr) ||</div><div class='add'>+		      is_zero_ether_addr(f-&gt;key.eth_addr))) {</div><div class='ctx'> 			if (nhid) {</div><div class='ctx'> 				rc = vxlan_fdb_nh_update(vxlan, f, nhid, extack);</div><div class='ctx'> 				if (rc &lt; 0)</div><div class='hunk'>@@ -1038,8 +1027,8 @@ static int vxlan_fdb_update_existing(struct vxlan_dev *vxlan,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((flags &amp; NLM_F_APPEND) &amp;&amp;</div><div class='del'>-	    (is_multicast_ether_addr(f-&gt;eth_addr) ||</div><div class='del'>-	     is_zero_ether_addr(f-&gt;eth_addr))) {</div><div class='add'>+	    (is_multicast_ether_addr(f-&gt;key.eth_addr) ||</div><div class='add'>+	     is_zero_ether_addr(f-&gt;key.eth_addr))) {</div><div class='ctx'> 		rc = vxlan_fdb_append(f, ip, port, vni, ifindex, &amp;rd);</div><div class='ctx'> </div><div class='ctx'> 		if (rc &lt; 0)</div><div class='hunk'>@@ -1048,12 +1037,13 @@ static int vxlan_fdb_update_existing(struct vxlan_dev *vxlan,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ndm_flags &amp; NTF_USE)</div><div class='del'>-		f-&gt;used = jiffies;</div><div class='add'>+		WRITE_ONCE(f-&gt;updated, jiffies);</div><div class='ctx'> </div><div class='ctx'> 	if (notify) {</div><div class='ctx'> 		if (rd == NULL)</div><div class='ctx'> 			rd = first_remote_rtnl(f);</div><div class='ctx'> </div><div class='add'>+		WRITE_ONCE(f-&gt;updated, jiffies);</div><div class='ctx'> 		err = vxlan_fdb_notify(vxlan, f, rd, RTM_NEWNEIGH,</div><div class='ctx'> 				       swdev_notify, extack);</div><div class='ctx'> 		if (err)</div><div class='hunk'>@@ -1097,7 +1087,6 @@ static int vxlan_fdb_update_create(struct vxlan_dev *vxlan,</div><div class='ctx'> 	if (rc &lt; 0)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	vxlan_fdb_insert(vxlan, mac, src_vni, f);</div><div class='ctx'> 	rc = vxlan_fdb_notify(vxlan, f, first_remote_rtnl(f), RTM_NEWNEIGH,</div><div class='ctx'> 			      swdev_notify, extack);</div><div class='ctx'> 	if (rc)</div><div class='hunk'>@@ -1121,7 +1110,7 @@ int vxlan_fdb_update(struct vxlan_dev *vxlan,</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_fdb *f;</div><div class='ctx'> </div><div class='del'>-	f = __vxlan_find_mac(vxlan, mac, src_vni);</div><div class='add'>+	f = vxlan_find_mac(vxlan, mac, src_vni);</div><div class='ctx'> 	if (f) {</div><div class='ctx'> 		if (flags &amp; NLM_F_EXCL) {</div><div class='ctx'> 			netdev_dbg(vxlan-&gt;dev,</div><div class='hunk'>@@ -1232,10 +1221,7 @@ static int vxlan_fdb_parse(struct nlattr *tb[], struct vxlan_dev *vxlan,</div><div class='ctx'> 		*ifindex = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (tb[NDA_NH_ID])</div><div class='del'>-		*nhid = nla_get_u32(tb[NDA_NH_ID]);</div><div class='del'>-	else</div><div class='del'>-		*nhid = 0;</div><div class='add'>+	*nhid = nla_get_u32_default(tb[NDA_NH_ID], 0);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1244,7 +1230,7 @@ static int vxlan_fdb_parse(struct nlattr *tb[], struct vxlan_dev *vxlan,</div><div class='ctx'> static int vxlan_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			 struct net_device *dev,</div><div class='ctx'> 			 const unsigned char *addr, u16 vid, u16 flags,</div><div class='del'>-			 struct netlink_ext_ack *extack)</div><div class='add'>+			 bool *notified, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='ctx'> 	/* struct net *net = dev_net(vxlan-&gt;dev); */</div><div class='hunk'>@@ -1252,7 +1238,6 @@ static int vxlan_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 	__be16 port;</div><div class='ctx'> 	__be32 src_vni, vni;</div><div class='ctx'> 	u32 ifindex, nhid;</div><div class='del'>-	u32 hash_index;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!(ndm-&gt;ndm_state &amp; (NUD_PERMANENT|NUD_REACHABLE))) {</div><div class='hunk'>@@ -1272,13 +1257,15 @@ static int vxlan_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 	if (vxlan-&gt;default_dst.remote_ip.sa.sa_family != ip.sa.sa_family)</div><div class='ctx'> 		return -EAFNOSUPPORT;</div><div class='ctx'> </div><div class='del'>-	hash_index = fdb_head_index(vxlan, addr, src_vni);</div><div class='del'>-	spin_lock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 	err = vxlan_fdb_update(vxlan, addr, &amp;ip, ndm-&gt;ndm_state, flags,</div><div class='ctx'> 			       port, src_vni, vni, ifindex,</div><div class='ctx'> 			       ndm-&gt;ndm_flags | NTF_VXLAN_ADDED_BY_USER,</div><div class='ctx'> 			       nhid, true, extack);</div><div class='del'>-	spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+</div><div class='add'>+	if (!err)</div><div class='add'>+		*notified = true;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1319,14 +1306,13 @@ out:</div><div class='ctx'> /* Delete entry (via netlink) */</div><div class='ctx'> static int vxlan_fdb_delete(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 			    struct net_device *dev,</div><div class='del'>-			    const unsigned char *addr, u16 vid,</div><div class='add'>+			    const unsigned char *addr, u16 vid, bool *notified,</div><div class='ctx'> 			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='ctx'> 	union vxlan_addr ip;</div><div class='ctx'> 	__be32 src_vni, vni;</div><div class='ctx'> 	u32 ifindex, nhid;</div><div class='del'>-	u32 hash_index;</div><div class='ctx'> 	__be16 port;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -1335,11 +1321,13 @@ static int vxlan_fdb_delete(struct ndmsg *ndm, struct nlattr *tb[],</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	hash_index = fdb_head_index(vxlan, addr, src_vni);</div><div class='del'>-	spin_lock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 	err = __vxlan_fdb_delete(vxlan, addr, ip, port, src_vni, vni, ifindex,</div><div class='ctx'> 				 true);</div><div class='del'>-	spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+</div><div class='add'>+	if (!err)</div><div class='add'>+		*notified = true;</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1349,53 +1337,48 @@ static int vxlan_fdb_dump(struct sk_buff *skb, struct netlink_callback *cb,</div><div class='ctx'> 			  struct net_device *dev,</div><div class='ctx'> 			  struct net_device *filter_dev, int *idx)</div><div class='ctx'> {</div><div class='add'>+	struct ndo_fdb_dump_context *ctx = (void *)cb-&gt;ctx;</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='del'>-	unsigned int h;</div><div class='add'>+	struct vxlan_fdb *f;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	for (h = 0; h &lt; FDB_HASH_SIZE; ++h) {</div><div class='del'>-		struct vxlan_fdb *f;</div><div class='del'>-</div><div class='del'>-		rcu_read_lock();</div><div class='del'>-		hlist_for_each_entry_rcu(f, &amp;vxlan-&gt;fdb_head[h], hlist) {</div><div class='del'>-			struct vxlan_rdst *rd;</div><div class='del'>-</div><div class='del'>-			if (rcu_access_pointer(f-&gt;nh)) {</div><div class='del'>-				if (*idx &lt; cb-&gt;args[2])</div><div class='del'>-					goto skip_nh;</div><div class='del'>-				err = vxlan_fdb_info(skb, vxlan, f,</div><div class='del'>-						     NETLINK_CB(cb-&gt;skb).portid,</div><div class='del'>-						     cb-&gt;nlh-&gt;nlmsg_seq,</div><div class='del'>-						     RTM_NEWNEIGH,</div><div class='del'>-						     NLM_F_MULTI, NULL);</div><div class='del'>-				if (err &lt; 0) {</div><div class='del'>-					rcu_read_unlock();</div><div class='del'>-					goto out;</div><div class='del'>-				}</div><div class='del'>-skip_nh:</div><div class='del'>-				*idx += 1;</div><div class='del'>-				continue;</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	hlist_for_each_entry_rcu(f, &amp;vxlan-&gt;fdb_list, fdb_node) {</div><div class='add'>+		struct vxlan_rdst *rd;</div><div class='add'>+</div><div class='add'>+		if (rcu_access_pointer(f-&gt;nh)) {</div><div class='add'>+			if (*idx &lt; ctx-&gt;fdb_idx)</div><div class='add'>+				goto skip_nh;</div><div class='add'>+			err = vxlan_fdb_info(skb, vxlan, f,</div><div class='add'>+					     NETLINK_CB(cb-&gt;skb).portid,</div><div class='add'>+					     cb-&gt;nlh-&gt;nlmsg_seq,</div><div class='add'>+					     RTM_NEWNEIGH, NLM_F_MULTI, NULL);</div><div class='add'>+			if (err &lt; 0) {</div><div class='add'>+				rcu_read_unlock();</div><div class='add'>+				goto out;</div><div class='ctx'> 			}</div><div class='add'>+skip_nh:</div><div class='add'>+			*idx += 1;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			list_for_each_entry_rcu(rd, &amp;f-&gt;remotes, list) {</div><div class='del'>-				if (*idx &lt; cb-&gt;args[2])</div><div class='del'>-					goto skip;</div><div class='del'>-</div><div class='del'>-				err = vxlan_fdb_info(skb, vxlan, f,</div><div class='del'>-						     NETLINK_CB(cb-&gt;skb).portid,</div><div class='del'>-						     cb-&gt;nlh-&gt;nlmsg_seq,</div><div class='del'>-						     RTM_NEWNEIGH,</div><div class='del'>-						     NLM_F_MULTI, rd);</div><div class='del'>-				if (err &lt; 0) {</div><div class='del'>-					rcu_read_unlock();</div><div class='del'>-					goto out;</div><div class='del'>-				}</div><div class='del'>-skip:</div><div class='del'>-				*idx += 1;</div><div class='add'>+		list_for_each_entry_rcu(rd, &amp;f-&gt;remotes, list) {</div><div class='add'>+			if (*idx &lt; ctx-&gt;fdb_idx)</div><div class='add'>+				goto skip;</div><div class='add'>+</div><div class='add'>+			err = vxlan_fdb_info(skb, vxlan, f,</div><div class='add'>+					     NETLINK_CB(cb-&gt;skb).portid,</div><div class='add'>+					     cb-&gt;nlh-&gt;nlmsg_seq,</div><div class='add'>+					     RTM_NEWNEIGH, NLM_F_MULTI, rd);</div><div class='add'>+			if (err &lt; 0) {</div><div class='add'>+				rcu_read_unlock();</div><div class='add'>+				goto out;</div><div class='ctx'> 			}</div><div class='add'>+skip:</div><div class='add'>+			*idx += 1;</div><div class='ctx'> 		}</div><div class='del'>-		rcu_read_unlock();</div><div class='ctx'> 	}</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1419,7 +1402,7 @@ static int vxlan_fdb_get(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> </div><div class='del'>-	f = __vxlan_find_mac(vxlan, addr, vni);</div><div class='add'>+	f = vxlan_find_mac_rcu(vxlan, addr, vni);</div><div class='ctx'> 	if (!f) {</div><div class='ctx'> 		NL_SET_ERR_MSG(extack, "Fdb entry not found");</div><div class='ctx'> 		err = -ENOENT;</div><div class='hunk'>@@ -1455,9 +1438,17 @@ static enum skb_drop_reason vxlan_snoop(struct net_device *dev,</div><div class='ctx'> 		ifindex = src_ifindex;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	f = vxlan_find_mac(vxlan, src_mac, vni);</div><div class='add'>+	f = vxlan_find_mac_rcu(vxlan, src_mac, vni);</div><div class='ctx'> 	if (likely(f)) {</div><div class='ctx'> 		struct vxlan_rdst *rdst = first_remote_rcu(f);</div><div class='add'>+		unsigned long now = jiffies;</div><div class='add'>+</div><div class='add'>+		if (READ_ONCE(f-&gt;updated) != now)</div><div class='add'>+			WRITE_ONCE(f-&gt;updated, now);</div><div class='add'>+</div><div class='add'>+		/* Don't override an fdb with nexthop with a learnt entry */</div><div class='add'>+		if (rcu_access_pointer(f-&gt;nh))</div><div class='add'>+			return SKB_DROP_REASON_VXLAN_ENTRY_EXISTS;</div><div class='ctx'> </div><div class='ctx'> 		if (likely(vxlan_addr_equal(&amp;rdst-&gt;remote_ip, src_ip) &amp;&amp;</div><div class='ctx'> 			   rdst-&gt;remote_ifindex == ifindex))</div><div class='hunk'>@@ -1467,23 +1458,16 @@ static enum skb_drop_reason vxlan_snoop(struct net_device *dev,</div><div class='ctx'> 		if (f-&gt;state &amp; (NUD_PERMANENT | NUD_NOARP))</div><div class='ctx'> 			return SKB_DROP_REASON_VXLAN_ENTRY_EXISTS;</div><div class='ctx'> </div><div class='del'>-		/* Don't override an fdb with nexthop with a learnt entry */</div><div class='del'>-		if (rcu_access_pointer(f-&gt;nh))</div><div class='del'>-			return SKB_DROP_REASON_VXLAN_ENTRY_EXISTS;</div><div class='del'>-</div><div class='ctx'> 		if (net_ratelimit())</div><div class='ctx'> 			netdev_info(dev,</div><div class='ctx'> 				    "%pM migrated from %pIS to %pIS\n",</div><div class='ctx'> 				    src_mac, &amp;rdst-&gt;remote_ip.sa, &amp;src_ip-&gt;sa);</div><div class='ctx'> </div><div class='ctx'> 		rdst-&gt;remote_ip = *src_ip;</div><div class='del'>-		f-&gt;updated = jiffies;</div><div class='ctx'> 		vxlan_fdb_notify(vxlan, f, rdst, RTM_NEWNEIGH, true, NULL);</div><div class='ctx'> 	} else {</div><div class='del'>-		u32 hash_index = fdb_head_index(vxlan, src_mac, vni);</div><div class='del'>-</div><div class='ctx'> 		/* learned new entry */</div><div class='del'>-		spin_lock(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+		spin_lock(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> </div><div class='ctx'> 		/* close off race between vxlan_flush and incoming packets */</div><div class='ctx'> 		if (netif_running(dev))</div><div class='hunk'>@@ -1494,7 +1478,7 @@ static enum skb_drop_reason vxlan_snoop(struct net_device *dev,</div><div class='ctx'> 					 vni,</div><div class='ctx'> 					 vxlan-&gt;default_dst.remote_vni,</div><div class='ctx'> 					 ifindex, NTF_SELF, 0, true, NULL);</div><div class='del'>-		spin_unlock(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+		spin_unlock(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return SKB_NOT_DROPPED_YET;</div><div class='hunk'>@@ -1502,21 +1486,18 @@ static enum skb_drop_reason vxlan_snoop(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> static bool __vxlan_sock_release_prep(struct vxlan_sock *vs)</div><div class='ctx'> {</div><div class='del'>-	struct vxlan_net *vn;</div><div class='add'>+	ASSERT_RTNL();</div><div class='ctx'> </div><div class='ctx'> 	if (!vs)</div><div class='ctx'> 		return false;</div><div class='ctx'> 	if (!refcount_dec_and_test(&amp;vs-&gt;refcnt))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	vn = net_generic(sock_net(vs-&gt;sock-&gt;sk), vxlan_net_id);</div><div class='del'>-	spin_lock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> 	hlist_del_rcu(&amp;vs-&gt;hlist);</div><div class='ctx'> 	udp_tunnel_notify_del_rx_port(vs-&gt;sock,</div><div class='ctx'> 				      (vs-&gt;flags &amp; VXLAN_F_GPE) ?</div><div class='ctx'> 				      UDP_TUNNEL_TYPE_VXLAN_GPE :</div><div class='ctx'> 				      UDP_TUNNEL_TYPE_VXLAN);</div><div class='del'>-	spin_unlock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='hunk'>@@ -1551,18 +1532,17 @@ static void vxlan_sock_release(struct vxlan_dev *vxlan)</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum skb_drop_reason vxlan_remcsum(struct vxlanhdr *unparsed,</div><div class='del'>-					  struct sk_buff *skb,</div><div class='del'>-					  u32 vxflags)</div><div class='add'>+static enum skb_drop_reason vxlan_remcsum(struct sk_buff *skb, u32 vxflags)</div><div class='ctx'> {</div><div class='add'>+	const struct vxlanhdr *vh = vxlan_hdr(skb);</div><div class='ctx'> 	enum skb_drop_reason reason;</div><div class='ctx'> 	size_t start, offset;</div><div class='ctx'> </div><div class='del'>-	if (!(unparsed-&gt;vx_flags &amp; VXLAN_HF_RCO) || skb-&gt;remcsum_offload)</div><div class='del'>-		goto out;</div><div class='add'>+	if (!(vh-&gt;vx_flags &amp; VXLAN_HF_RCO) || skb-&gt;remcsum_offload)</div><div class='add'>+		return SKB_NOT_DROPPED_YET;</div><div class='ctx'> </div><div class='del'>-	start = vxlan_rco_start(unparsed-&gt;vx_vni);</div><div class='del'>-	offset = start + vxlan_rco_offset(unparsed-&gt;vx_vni);</div><div class='add'>+	start = vxlan_rco_start(vh-&gt;vx_vni);</div><div class='add'>+	offset = start + vxlan_rco_offset(vh-&gt;vx_vni);</div><div class='ctx'> </div><div class='ctx'> 	reason = pskb_may_pull_reason(skb, offset + sizeof(u16));</div><div class='ctx'> 	if (reason)</div><div class='hunk'>@@ -1570,22 +1550,20 @@ static enum skb_drop_reason vxlan_remcsum(struct vxlanhdr *unparsed,</div><div class='ctx'> </div><div class='ctx'> 	skb_remcsum_process(skb, (void *)(vxlan_hdr(skb) + 1), start, offset,</div><div class='ctx'> 			    !!(vxflags &amp; VXLAN_F_REMCSUM_NOPARTIAL));</div><div class='del'>-out:</div><div class='del'>-	unparsed-&gt;vx_flags &amp;= ~VXLAN_HF_RCO;</div><div class='del'>-	unparsed-&gt;vx_vni &amp;= VXLAN_VNI_MASK;</div><div class='del'>-</div><div class='ctx'> 	return SKB_NOT_DROPPED_YET;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void vxlan_parse_gbp_hdr(struct vxlanhdr *unparsed,</div><div class='del'>-				struct sk_buff *skb, u32 vxflags,</div><div class='add'>+static void vxlan_parse_gbp_hdr(struct sk_buff *skb, u32 vxflags,</div><div class='ctx'> 				struct vxlan_metadata *md)</div><div class='ctx'> {</div><div class='del'>-	struct vxlanhdr_gbp *gbp = (struct vxlanhdr_gbp *)unparsed;</div><div class='add'>+	const struct vxlanhdr *vh = vxlan_hdr(skb);</div><div class='add'>+	const struct vxlanhdr_gbp *gbp;</div><div class='ctx'> 	struct metadata_dst *tun_dst;</div><div class='ctx'> </div><div class='del'>-	if (!(unparsed-&gt;vx_flags &amp; VXLAN_HF_GBP))</div><div class='del'>-		goto out;</div><div class='add'>+	gbp = (const struct vxlanhdr_gbp *)vh;</div><div class='add'>+</div><div class='add'>+	if (!(vh-&gt;vx_flags &amp; VXLAN_HF_GBP))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> 	md-&gt;gbp = ntohs(gbp-&gt;policy_id);</div><div class='ctx'> </div><div class='hunk'>@@ -1604,8 +1582,6 @@ static void vxlan_parse_gbp_hdr(struct vxlanhdr *unparsed,</div><div class='ctx'> 	/* In flow-based mode, GBP is carried in dst_metadata */</div><div class='ctx'> 	if (!(vxflags &amp; VXLAN_F_COLLECT_METADATA))</div><div class='ctx'> 		skb-&gt;mark = md-&gt;gbp;</div><div class='del'>-out:</div><div class='del'>-	unparsed-&gt;vx_flags &amp;= ~VXLAN_GBP_USED_BITS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static enum skb_drop_reason vxlan_set_mac(struct vxlan_dev *vxlan,</div><div class='hunk'>@@ -1665,13 +1641,12 @@ static bool vxlan_ecn_decapsulate(struct vxlan_sock *vs, void *oiph,</div><div class='ctx'> 	return err &lt;= 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Callback from net/ipv4/udp.c to receive packets */</div><div class='ctx'> static int vxlan_rcv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_vni_node *vninode = NULL;</div><div class='add'>+	const struct vxlanhdr *vh;</div><div class='ctx'> 	struct vxlan_dev *vxlan;</div><div class='ctx'> 	struct vxlan_sock *vs;</div><div class='del'>-	struct vxlanhdr unparsed;</div><div class='ctx'> 	struct vxlan_metadata _md;</div><div class='ctx'> 	struct vxlan_metadata *md = &amp;_md;</div><div class='ctx'> 	__be16 protocol = htons(ETH_P_TEB);</div><div class='hunk'>@@ -1686,24 +1661,21 @@ static int vxlan_rcv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> 	if (reason)</div><div class='ctx'> 		goto drop;</div><div class='ctx'> </div><div class='del'>-	unparsed = *vxlan_hdr(skb);</div><div class='add'>+	vh = vxlan_hdr(skb);</div><div class='ctx'> 	/* VNI flag always required to be set */</div><div class='del'>-	if (!(unparsed.vx_flags &amp; VXLAN_HF_VNI)) {</div><div class='add'>+	if (!(vh-&gt;vx_flags &amp; VXLAN_HF_VNI)) {</div><div class='ctx'> 		netdev_dbg(skb-&gt;dev, "invalid vxlan flags=%#x vni=%#x\n",</div><div class='del'>-			   ntohl(vxlan_hdr(skb)-&gt;vx_flags),</div><div class='del'>-			   ntohl(vxlan_hdr(skb)-&gt;vx_vni));</div><div class='add'>+			   ntohl(vh-&gt;vx_flags), ntohl(vh-&gt;vx_vni));</div><div class='ctx'> 		reason = SKB_DROP_REASON_VXLAN_INVALID_HDR;</div><div class='ctx'> 		/* Return non vxlan pkt */</div><div class='ctx'> 		goto drop;</div><div class='ctx'> 	}</div><div class='del'>-	unparsed.vx_flags &amp;= ~VXLAN_HF_VNI;</div><div class='del'>-	unparsed.vx_vni &amp;= ~VXLAN_VNI_MASK;</div><div class='ctx'> </div><div class='ctx'> 	vs = rcu_dereference_sk_user_data(sk);</div><div class='ctx'> 	if (!vs)</div><div class='ctx'> 		goto drop;</div><div class='ctx'> </div><div class='del'>-	vni = vxlan_vni(vxlan_hdr(skb)-&gt;vx_vni);</div><div class='add'>+	vni = vxlan_vni(vh-&gt;vx_vni);</div><div class='ctx'> </div><div class='ctx'> 	vxlan = vxlan_vs_find_vni(vs, skb-&gt;dev-&gt;ifindex, vni, &amp;vninode);</div><div class='ctx'> 	if (!vxlan) {</div><div class='hunk'>@@ -1711,13 +1683,27 @@ static int vxlan_rcv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> 		goto drop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* For backwards compatibility, only allow reserved fields to be</div><div class='del'>-	 * used by VXLAN extensions if explicitly requested.</div><div class='del'>-	 */</div><div class='del'>-	if (vs-&gt;flags &amp; VXLAN_F_GPE) {</div><div class='del'>-		if (!vxlan_parse_gpe_proto(&amp;unparsed, &amp;protocol))</div><div class='add'>+	if (vh-&gt;vx_flags &amp; vxlan-&gt;cfg.reserved_bits.vx_flags ||</div><div class='add'>+	    vh-&gt;vx_vni &amp; vxlan-&gt;cfg.reserved_bits.vx_vni) {</div><div class='add'>+		/* If the header uses bits besides those enabled by the</div><div class='add'>+		 * netdevice configuration, treat this as a malformed packet.</div><div class='add'>+		 * This behavior diverges from VXLAN RFC (RFC7348) which</div><div class='add'>+		 * stipulates that bits in reserved in reserved fields are to be</div><div class='add'>+		 * ignored. The approach here maintains compatibility with</div><div class='add'>+		 * previous stack code, and also is more robust and provides a</div><div class='add'>+		 * little more security in adding extensions to VXLAN.</div><div class='add'>+		 */</div><div class='add'>+		reason = SKB_DROP_REASON_VXLAN_INVALID_HDR;</div><div class='add'>+		DEV_STATS_INC(vxlan-&gt;dev, rx_frame_errors);</div><div class='add'>+		DEV_STATS_INC(vxlan-&gt;dev, rx_errors);</div><div class='add'>+		vxlan_vnifilter_count(vxlan, vni, vninode,</div><div class='add'>+				      VXLAN_VNI_STATS_RX_ERRORS, 0);</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vxlan-&gt;cfg.flags &amp; VXLAN_F_GPE) {</div><div class='add'>+		if (!vxlan_parse_gpe_proto(vh, &amp;protocol))</div><div class='ctx'> 			goto drop;</div><div class='del'>-		unparsed.vx_flags &amp;= ~VXLAN_GPE_USED_BITS;</div><div class='ctx'> 		raw_proto = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1727,8 +1713,8 @@ static int vxlan_rcv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> 		goto drop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (vs-&gt;flags &amp; VXLAN_F_REMCSUM_RX) {</div><div class='del'>-		reason = vxlan_remcsum(&amp;unparsed, skb, vs-&gt;flags);</div><div class='add'>+	if (vxlan-&gt;cfg.flags &amp; VXLAN_F_REMCSUM_RX) {</div><div class='add'>+		reason = vxlan_remcsum(skb, vxlan-&gt;cfg.flags);</div><div class='ctx'> 		if (unlikely(reason))</div><div class='ctx'> 			goto drop;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1753,25 +1739,12 @@ static int vxlan_rcv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> 		memset(md, 0, sizeof(*md));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (vs-&gt;flags &amp; VXLAN_F_GBP)</div><div class='del'>-		vxlan_parse_gbp_hdr(&amp;unparsed, skb, vs-&gt;flags, md);</div><div class='add'>+	if (vxlan-&gt;cfg.flags &amp; VXLAN_F_GBP)</div><div class='add'>+		vxlan_parse_gbp_hdr(skb, vxlan-&gt;cfg.flags, md);</div><div class='ctx'> 	/* Note that GBP and GPE can never be active together. This is</div><div class='ctx'> 	 * ensured in vxlan_dev_configure.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	if (unparsed.vx_flags || unparsed.vx_vni) {</div><div class='del'>-		/* If there are any unprocessed flags remaining treat</div><div class='del'>-		 * this as a malformed packet. This behavior diverges from</div><div class='del'>-		 * VXLAN RFC (RFC7348) which stipulates that bits in reserved</div><div class='del'>-		 * in reserved fields are to be ignored. The approach here</div><div class='del'>-		 * maintains compatibility with previous stack code, and also</div><div class='del'>-		 * is more robust and provides a little more security in</div><div class='del'>-		 * adding extensions to VXLAN.</div><div class='del'>-		 */</div><div class='del'>-		reason = SKB_DROP_REASON_VXLAN_INVALID_HDR;</div><div class='del'>-		goto drop;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (!raw_proto) {</div><div class='ctx'> 		reason = vxlan_set_mac(vxlan, vs, skb, vni);</div><div class='ctx'> 		if (reason)</div><div class='hunk'>@@ -1815,14 +1788,14 @@ static int vxlan_rcv(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!(vxlan-&gt;dev-&gt;flags &amp; IFF_UP))) {</div><div class='ctx'> 		rcu_read_unlock();</div><div class='del'>-		dev_core_stats_rx_dropped_inc(vxlan-&gt;dev);</div><div class='add'>+		dev_dstats_rx_dropped(vxlan-&gt;dev);</div><div class='ctx'> 		vxlan_vnifilter_count(vxlan, vni, vninode,</div><div class='ctx'> 				      VXLAN_VNI_STATS_RX_DROPS, 0);</div><div class='ctx'> 		reason = SKB_DROP_REASON_DEV_READY;</div><div class='ctx'> 		goto drop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_sw_netstats_rx_add(vxlan-&gt;dev, skb-&gt;len);</div><div class='add'>+	dev_dstats_rx_add(vxlan-&gt;dev, skb-&gt;len);</div><div class='ctx'> 	vxlan_vnifilter_count(vxlan, vni, vninode, VXLAN_VNI_STATS_RX, skb-&gt;len);</div><div class='ctx'> 	gro_cells_receive(&amp;vxlan-&gt;gro_cells, skb);</div><div class='ctx'> </div><div class='hunk'>@@ -1837,7 +1810,6 @@ drop:</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Callback from net/ipv{4,6}/udp.c to check that we have a VNI for errors */</div><div class='ctx'> static int vxlan_err_lookup(struct sock *sk, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan;</div><div class='hunk'>@@ -1877,7 +1849,7 @@ static int arp_reduce(struct net_device *dev, struct sk_buff *skb, __be32 vni)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (!pskb_may_pull(skb, arp_hdr_len(dev))) {</div><div class='del'>-		dev_core_stats_tx_dropped_inc(dev);</div><div class='add'>+		dev_dstats_tx_dropped(dev);</div><div class='ctx'> 		vxlan_vnifilter_count(vxlan, vni, NULL,</div><div class='ctx'> 				      VXLAN_VNI_STATS_TX_DROPS, 0);</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -1906,6 +1878,7 @@ static int arp_reduce(struct net_device *dev, struct sk_buff *skb, __be32 vni)</div><div class='ctx'> 	n = neigh_lookup(&amp;arp_tbl, &amp;tip, dev);</div><div class='ctx'> </div><div class='ctx'> 	if (n) {</div><div class='add'>+		struct vxlan_rdst *rdst = NULL;</div><div class='ctx'> 		struct vxlan_fdb *f;</div><div class='ctx'> 		struct sk_buff	*reply;</div><div class='ctx'> </div><div class='hunk'>@@ -1914,12 +1887,17 @@ static int arp_reduce(struct net_device *dev, struct sk_buff *skb, __be32 vni)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		f = vxlan_find_mac(vxlan, n-&gt;ha, vni);</div><div class='del'>-		if (f &amp;&amp; vxlan_addr_any(&amp;(first_remote_rcu(f)-&gt;remote_ip))) {</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		f = vxlan_find_mac_tx(vxlan, n-&gt;ha, vni);</div><div class='add'>+		if (f)</div><div class='add'>+			rdst = first_remote_rcu(f);</div><div class='add'>+		if (rdst &amp;&amp; vxlan_addr_any(&amp;rdst-&gt;remote_ip)) {</div><div class='ctx'> 			/* bridge-local neighbor */</div><div class='ctx'> 			neigh_release(n);</div><div class='add'>+			rcu_read_unlock();</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='add'>+		rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 		reply = arp_create(ARPOP_REPLY, ETH_P_ARP, sip, dev, tip, sha,</div><div class='ctx'> 				n-&gt;ha, sha);</div><div class='hunk'>@@ -1935,7 +1913,7 @@ static int arp_reduce(struct net_device *dev, struct sk_buff *skb, __be32 vni)</div><div class='ctx'> 		reply-&gt;pkt_type = PACKET_HOST;</div><div class='ctx'> </div><div class='ctx'> 		if (netif_rx(reply) == NET_RX_DROP) {</div><div class='del'>-			dev_core_stats_rx_dropped_inc(dev);</div><div class='add'>+			dev_dstats_rx_dropped(dev);</div><div class='ctx'> 			vxlan_vnifilter_count(vxlan, vni, NULL,</div><div class='ctx'> 					      VXLAN_VNI_STATS_RX_DROPS, 0);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2070,6 +2048,7 @@ static int neigh_reduce(struct net_device *dev, struct sk_buff *skb, __be32 vni)</div><div class='ctx'> 	n = neigh_lookup(ipv6_stub-&gt;nd_tbl, &amp;msg-&gt;target, dev);</div><div class='ctx'> </div><div class='ctx'> 	if (n) {</div><div class='add'>+		struct vxlan_rdst *rdst = NULL;</div><div class='ctx'> 		struct vxlan_fdb *f;</div><div class='ctx'> 		struct sk_buff *reply;</div><div class='ctx'> </div><div class='hunk'>@@ -2078,8 +2057,10 @@ static int neigh_reduce(struct net_device *dev, struct sk_buff *skb, __be32 vni)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		f = vxlan_find_mac(vxlan, n-&gt;ha, vni);</div><div class='del'>-		if (f &amp;&amp; vxlan_addr_any(&amp;(first_remote_rcu(f)-&gt;remote_ip))) {</div><div class='add'>+		f = vxlan_find_mac_tx(vxlan, n-&gt;ha, vni);</div><div class='add'>+		if (f)</div><div class='add'>+			rdst = first_remote_rcu(f);</div><div class='add'>+		if (rdst &amp;&amp; vxlan_addr_any(&amp;rdst-&gt;remote_ip)) {</div><div class='ctx'> 			/* bridge-local neighbor */</div><div class='ctx'> 			neigh_release(n);</div><div class='ctx'> 			goto out;</div><div class='hunk'>@@ -2094,7 +2075,7 @@ static int neigh_reduce(struct net_device *dev, struct sk_buff *skb, __be32 vni)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='ctx'> 		if (netif_rx(reply) == NET_RX_DROP) {</div><div class='del'>-			dev_core_stats_rx_dropped_inc(dev);</div><div class='add'>+			dev_dstats_rx_dropped(dev);</div><div class='ctx'> 			vxlan_vnifilter_count(vxlan, vni, NULL,</div><div class='ctx'> 					      VXLAN_VNI_STATS_RX_DROPS, 0);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2268,8 +2249,8 @@ static void vxlan_encap_bypass(struct sk_buff *skb, struct vxlan_dev *src_vxlan,</div><div class='ctx'> {</div><div class='ctx'> 	union vxlan_addr loopback;</div><div class='ctx'> 	union vxlan_addr *remote_ip = &amp;dst_vxlan-&gt;default_dst.remote_ip;</div><div class='add'>+	unsigned int len = skb-&gt;len;</div><div class='ctx'> 	struct net_device *dev;</div><div class='del'>-	int len = skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;pkt_type = PACKET_HOST;</div><div class='ctx'> 	skb-&gt;encapsulation = 0;</div><div class='hunk'>@@ -2296,16 +2277,16 @@ static void vxlan_encap_bypass(struct sk_buff *skb, struct vxlan_dev *src_vxlan,</div><div class='ctx'> 	if ((dst_vxlan-&gt;cfg.flags &amp; VXLAN_F_LEARN) &amp;&amp; snoop)</div><div class='ctx'> 		vxlan_snoop(dev, &amp;loopback, eth_hdr(skb)-&gt;h_source, 0, vni);</div><div class='ctx'> </div><div class='del'>-	dev_sw_netstats_tx_add(src_vxlan-&gt;dev, 1, len);</div><div class='add'>+	dev_dstats_tx_add(src_vxlan-&gt;dev, len);</div><div class='ctx'> 	vxlan_vnifilter_count(src_vxlan, vni, NULL, VXLAN_VNI_STATS_TX, len);</div><div class='ctx'> </div><div class='ctx'> 	if (__netif_rx(skb) == NET_RX_SUCCESS) {</div><div class='del'>-		dev_sw_netstats_rx_add(dst_vxlan-&gt;dev, len);</div><div class='add'>+		dev_dstats_rx_add(dst_vxlan-&gt;dev, len);</div><div class='ctx'> 		vxlan_vnifilter_count(dst_vxlan, vni, NULL, VXLAN_VNI_STATS_RX,</div><div class='ctx'> 				      len);</div><div class='ctx'> 	} else {</div><div class='ctx'> drop:</div><div class='del'>-		dev_core_stats_rx_dropped_inc(dev);</div><div class='add'>+		dev_dstats_rx_dropped(dev);</div><div class='ctx'> 		vxlan_vnifilter_count(dst_vxlan, vni, NULL,</div><div class='ctx'> 				      VXLAN_VNI_STATS_RX_DROPS, 0);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2368,7 +2349,7 @@ void vxlan_xmit_one(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	int addr_family;</div><div class='ctx'> 	__u8 tos, ttl;</div><div class='ctx'> 	int ifindex;</div><div class='del'>-	int err;</div><div class='add'>+	int err = 0;</div><div class='ctx'> 	u32 flags = vxlan-&gt;cfg.flags;</div><div class='ctx'> 	bool use_cache;</div><div class='ctx'> 	bool udp_sum = false;</div><div class='hunk'>@@ -2473,11 +2454,18 @@ void vxlan_xmit_one(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	if (addr_family == AF_INET) {</div><div class='del'>-		struct vxlan_sock *sock4 = rcu_dereference(vxlan-&gt;vn4_sock);</div><div class='add'>+		struct vxlan_sock *sock4;</div><div class='add'>+		u16 ipcb_flags = 0;</div><div class='ctx'> 		struct rtable *rt;</div><div class='ctx'> 		__be16 df = 0;</div><div class='ctx'> 		__be32 saddr;</div><div class='ctx'> </div><div class='add'>+		sock4 = rcu_dereference(vxlan-&gt;vn4_sock);</div><div class='add'>+		if (unlikely(!sock4)) {</div><div class='add'>+			reason = SKB_DROP_REASON_DEV_READY;</div><div class='add'>+			goto tx_error;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (!ifindex)</div><div class='ctx'> 			ifindex = sock4-&gt;sock-&gt;sk-&gt;sk_bound_dev_if;</div><div class='ctx'> </div><div class='hunk'>@@ -2490,6 +2478,9 @@ void vxlan_xmit_one(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			goto tx_error;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (flags &amp; VXLAN_F_MC_ROUTE)</div><div class='add'>+			ipcb_flags |= IPSKB_MCROUTE;</div><div class='add'>+</div><div class='ctx'> 		if (!info) {</div><div class='ctx'> 			/* Bypass encapsulation if the destination is local */</div><div class='ctx'> 			err = encap_bypass_if_local(skb, dev, vxlan, AF_INET,</div><div class='hunk'>@@ -2545,11 +2536,19 @@ void vxlan_xmit_one(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 		udp_tunnel_xmit_skb(rt, sock4-&gt;sock-&gt;sk, skb, saddr,</div><div class='ctx'> 				    pkey-&gt;u.ipv4.dst, tos, ttl, df,</div><div class='del'>-				    src_port, dst_port, xnet, !udp_sum);</div><div class='add'>+				    src_port, dst_port, xnet, !udp_sum,</div><div class='add'>+				    ipcb_flags);</div><div class='ctx'> #if IS_ENABLED(CONFIG_IPV6)</div><div class='ctx'> 	} else {</div><div class='del'>-		struct vxlan_sock *sock6 = rcu_dereference(vxlan-&gt;vn6_sock);</div><div class='add'>+		struct vxlan_sock *sock6;</div><div class='ctx'> 		struct in6_addr saddr;</div><div class='add'>+		u16 ip6cb_flags = 0;</div><div class='add'>+</div><div class='add'>+		sock6 = rcu_dereference(vxlan-&gt;vn6_sock);</div><div class='add'>+		if (unlikely(!sock6)) {</div><div class='add'>+			reason = SKB_DROP_REASON_DEV_READY;</div><div class='add'>+			goto tx_error;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		if (!ifindex)</div><div class='ctx'> 			ifindex = sock6-&gt;sock-&gt;sk-&gt;sk_bound_dev_if;</div><div class='hunk'>@@ -2565,6 +2564,9 @@ void vxlan_xmit_one(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			goto tx_error;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		if (flags &amp; VXLAN_F_MC_ROUTE)</div><div class='add'>+			ip6cb_flags |= IP6SKB_MCROUTE;</div><div class='add'>+</div><div class='ctx'> 		if (!info) {</div><div class='ctx'> 			u32 rt6i_flags = dst_rt6_info(ndst)-&gt;rt6i_flags;</div><div class='ctx'> </div><div class='hunk'>@@ -2609,7 +2611,8 @@ void vxlan_xmit_one(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 		udp_tunnel6_xmit_skb(ndst, sock6-&gt;sock-&gt;sk, skb, dev,</div><div class='ctx'> 				     &amp;saddr, &amp;pkey-&gt;u.ipv6.dst, tos, ttl,</div><div class='del'>-				     pkey-&gt;label, src_port, dst_port, !udp_sum);</div><div class='add'>+				     pkey-&gt;label, src_port, dst_port, !udp_sum,</div><div class='add'>+				     ip6cb_flags);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='ctx'> 	vxlan_vnifilter_count(vxlan, vni, NULL, VXLAN_VNI_STATS_TX, pkt_len);</div><div class='hunk'>@@ -2618,7 +2621,7 @@ out_unlock:</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> drop:</div><div class='del'>-	dev_core_stats_tx_dropped_inc(dev);</div><div class='add'>+	dev_dstats_tx_dropped(dev);</div><div class='ctx'> 	vxlan_vnifilter_count(vxlan, vni, NULL, VXLAN_VNI_STATS_TX_DROPS, 0);</div><div class='ctx'> 	kfree_skb_reason(skb, reason);</div><div class='ctx'> 	return;</div><div class='hunk'>@@ -2646,14 +2649,10 @@ static void vxlan_xmit_nh(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	memset(&amp;nh_rdst, 0, sizeof(struct vxlan_rdst));</div><div class='ctx'> 	hash = skb_get_hash(skb);</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='ctx'> 	nh = rcu_dereference(f-&gt;nh);</div><div class='del'>-	if (!nh) {</div><div class='del'>-		rcu_read_unlock();</div><div class='add'>+	if (!nh)</div><div class='ctx'> 		goto drop;</div><div class='del'>-	}</div><div class='ctx'> 	do_xmit = vxlan_fdb_nh_path_select(nh, hash, &amp;nh_rdst);</div><div class='del'>-	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	if (likely(do_xmit))</div><div class='ctx'> 		vxlan_xmit_one(skb, dev, vni, &amp;nh_rdst, did_rsc);</div><div class='hunk'>@@ -2663,7 +2662,7 @@ static void vxlan_xmit_nh(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> drop:</div><div class='del'>-	dev_core_stats_tx_dropped_inc(dev);</div><div class='add'>+	dev_dstats_tx_dropped(dev);</div><div class='ctx'> 	vxlan_vnifilter_count(netdev_priv(dev), vni, NULL,</div><div class='ctx'> 			      VXLAN_VNI_STATS_TX_DROPS, 0);</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='hunk'>@@ -2701,7 +2700,7 @@ static netdev_tx_t vxlan_xmit_nhid(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> drop:</div><div class='del'>-	dev_core_stats_tx_dropped_inc(dev);</div><div class='add'>+	dev_dstats_tx_dropped(dev);</div><div class='ctx'> 	vxlan_vnifilter_count(netdev_priv(dev), vni, NULL,</div><div class='ctx'> 			      VXLAN_VNI_STATS_TX_DROPS, 0);</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='hunk'>@@ -2780,7 +2779,8 @@ static netdev_tx_t vxlan_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	eth = eth_hdr(skb);</div><div class='del'>-	f = vxlan_find_mac(vxlan, eth-&gt;h_dest, vni);</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	f = vxlan_find_mac_tx(vxlan, eth-&gt;h_dest, vni);</div><div class='ctx'> 	did_rsc = false;</div><div class='ctx'> </div><div class='ctx'> 	if (f &amp;&amp; (f-&gt;flags &amp; NTF_ROUTER) &amp;&amp; (vxlan-&gt;cfg.flags &amp; VXLAN_F_RSC) &amp;&amp;</div><div class='hunk'>@@ -2788,21 +2788,21 @@ static netdev_tx_t vxlan_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	     ntohs(eth-&gt;h_proto) == ETH_P_IPV6)) {</div><div class='ctx'> 		did_rsc = route_shortcircuit(dev, skb);</div><div class='ctx'> 		if (did_rsc)</div><div class='del'>-			f = vxlan_find_mac(vxlan, eth-&gt;h_dest, vni);</div><div class='add'>+			f = vxlan_find_mac_tx(vxlan, eth-&gt;h_dest, vni);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (f == NULL) {</div><div class='del'>-		f = vxlan_find_mac(vxlan, all_zeros_mac, vni);</div><div class='add'>+		f = vxlan_find_mac_tx(vxlan, all_zeros_mac, vni);</div><div class='ctx'> 		if (f == NULL) {</div><div class='ctx'> 			if ((vxlan-&gt;cfg.flags &amp; VXLAN_F_L2MISS) &amp;&amp;</div><div class='ctx'> 			    !is_multicast_ether_addr(eth-&gt;h_dest))</div><div class='ctx'> 				vxlan_fdb_miss(vxlan, eth-&gt;h_dest);</div><div class='ctx'> </div><div class='del'>-			dev_core_stats_tx_dropped_inc(dev);</div><div class='add'>+			dev_dstats_tx_dropped(dev);</div><div class='ctx'> 			vxlan_vnifilter_count(vxlan, vni, NULL,</div><div class='ctx'> 					      VXLAN_VNI_STATS_TX_DROPS, 0);</div><div class='del'>-			kfree_skb_reason(skb, SKB_DROP_REASON_VXLAN_NO_REMOTE);</div><div class='del'>-			return NETDEV_TX_OK;</div><div class='add'>+			kfree_skb_reason(skb, SKB_DROP_REASON_NO_TX_TARGET);</div><div class='add'>+			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2824,75 +2824,72 @@ static netdev_tx_t vxlan_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		if (fdst)</div><div class='ctx'> 			vxlan_xmit_one(skb, dev, vni, fdst, did_rsc);</div><div class='ctx'> 		else</div><div class='del'>-			kfree_skb_reason(skb, SKB_DROP_REASON_VXLAN_NO_REMOTE);</div><div class='add'>+			kfree_skb_reason(skb, SKB_DROP_REASON_NO_TX_TARGET);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Walk the forwarding table and purge stale entries */</div><div class='ctx'> static void vxlan_cleanup(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct vxlan_dev *vxlan = from_timer(vxlan, t, age_timer);</div><div class='add'>+	struct vxlan_dev *vxlan = timer_container_of(vxlan, t, age_timer);</div><div class='ctx'> 	unsigned long next_timer = jiffies + FDB_AGE_INTERVAL;</div><div class='del'>-	unsigned int h;</div><div class='add'>+	struct vxlan_fdb *f;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(vxlan-&gt;dev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	for (h = 0; h &lt; FDB_HASH_SIZE; ++h) {</div><div class='del'>-		struct hlist_node *p, *n;</div><div class='del'>-</div><div class='del'>-		spin_lock(&amp;vxlan-&gt;hash_lock[h]);</div><div class='del'>-		hlist_for_each_safe(p, n, &amp;vxlan-&gt;fdb_head[h]) {</div><div class='del'>-			struct vxlan_fdb *f</div><div class='del'>-				= container_of(p, struct vxlan_fdb, hlist);</div><div class='del'>-			unsigned long timeout;</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	hlist_for_each_entry_rcu(f, &amp;vxlan-&gt;fdb_list, fdb_node) {</div><div class='add'>+		unsigned long timeout;</div><div class='ctx'> </div><div class='del'>-			if (f-&gt;state &amp; (NUD_PERMANENT | NUD_NOARP))</div><div class='del'>-				continue;</div><div class='add'>+		if (f-&gt;state &amp; (NUD_PERMANENT | NUD_NOARP))</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-			if (f-&gt;flags &amp; NTF_EXT_LEARNED)</div><div class='del'>-				continue;</div><div class='add'>+		if (f-&gt;flags &amp; NTF_EXT_LEARNED)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-			timeout = f-&gt;used + vxlan-&gt;cfg.age_interval * HZ;</div><div class='del'>-			if (time_before_eq(timeout, jiffies)) {</div><div class='del'>-				netdev_dbg(vxlan-&gt;dev,</div><div class='del'>-					   "garbage collect %pM\n",</div><div class='del'>-					   f-&gt;eth_addr);</div><div class='add'>+		timeout = READ_ONCE(f-&gt;updated) + vxlan-&gt;cfg.age_interval * HZ;</div><div class='add'>+		if (time_before_eq(timeout, jiffies)) {</div><div class='add'>+			spin_lock(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+			if (!hlist_unhashed(&amp;f-&gt;fdb_node)) {</div><div class='add'>+				netdev_dbg(vxlan-&gt;dev, "garbage collect %pM\n",</div><div class='add'>+					   f-&gt;key.eth_addr);</div><div class='ctx'> 				f-&gt;state = NUD_STALE;</div><div class='ctx'> 				vxlan_fdb_destroy(vxlan, f, true, true);</div><div class='del'>-			} else if (time_before(timeout, next_timer))</div><div class='del'>-				next_timer = timeout;</div><div class='add'>+			}</div><div class='add'>+			spin_unlock(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+		} else if (time_before(timeout, next_timer)) {</div><div class='add'>+			next_timer = timeout;</div><div class='ctx'> 		}</div><div class='del'>-		spin_unlock(&amp;vxlan-&gt;hash_lock[h]);</div><div class='ctx'> 	}</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	mod_timer(&amp;vxlan-&gt;age_timer, next_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vxlan_vs_del_dev(struct vxlan_dev *vxlan)</div><div class='ctx'> {</div><div class='del'>-	struct vxlan_net *vn = net_generic(vxlan-&gt;net, vxlan_net_id);</div><div class='add'>+	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> 	hlist_del_init_rcu(&amp;vxlan-&gt;hlist4.hlist);</div><div class='ctx'> #if IS_ENABLED(CONFIG_IPV6)</div><div class='ctx'> 	hlist_del_init_rcu(&amp;vxlan-&gt;hlist6.hlist);</div><div class='ctx'> #endif</div><div class='del'>-	spin_unlock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vxlan_vs_add_dev(struct vxlan_sock *vs, struct vxlan_dev *vxlan,</div><div class='ctx'> 			     struct vxlan_dev_node *node)</div><div class='ctx'> {</div><div class='del'>-	struct vxlan_net *vn = net_generic(vxlan-&gt;net, vxlan_net_id);</div><div class='ctx'> 	__be32 vni = vxlan-&gt;default_dst.remote_vni;</div><div class='ctx'> </div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	node-&gt;vxlan = vxlan;</div><div class='del'>-	spin_lock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> 	hlist_add_head_rcu(&amp;node-&gt;hlist, vni_head(vs, vni));</div><div class='del'>-	spin_unlock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Setup stats when device is created */</div><div class='hunk'>@@ -2901,8 +2898,15 @@ static int vxlan_init(struct net_device *dev)</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (vxlan-&gt;cfg.flags &amp; VXLAN_F_VNIFILTER)</div><div class='del'>-		vxlan_vnigroup_init(vxlan);</div><div class='add'>+	err = rhashtable_init(&amp;vxlan-&gt;fdb_hash_tbl, &amp;vxlan_fdb_rht_params);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (vxlan-&gt;cfg.flags &amp; VXLAN_F_VNIFILTER) {</div><div class='add'>+		err = vxlan_vnigroup_init(vxlan);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_rhashtable_destroy;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = gro_cells_init(&amp;vxlan-&gt;gro_cells, dev);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -2920,21 +2924,11 @@ err_gro_cells_destroy:</div><div class='ctx'> err_vnigroup_uninit:</div><div class='ctx'> 	if (vxlan-&gt;cfg.flags &amp; VXLAN_F_VNIFILTER)</div><div class='ctx'> 		vxlan_vnigroup_uninit(vxlan);</div><div class='add'>+err_rhashtable_destroy:</div><div class='add'>+	rhashtable_destroy(&amp;vxlan-&gt;fdb_hash_tbl);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void vxlan_fdb_delete_default(struct vxlan_dev *vxlan, __be32 vni)</div><div class='del'>-{</div><div class='del'>-	struct vxlan_fdb *f;</div><div class='del'>-	u32 hash_index = fdb_head_index(vxlan, all_zeros_mac, vni);</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='del'>-	f = __vxlan_find_mac(vxlan, all_zeros_mac, vni);</div><div class='del'>-	if (f)</div><div class='del'>-		vxlan_fdb_destroy(vxlan, f, true, true);</div><div class='del'>-	spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void vxlan_uninit(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='hunk'>@@ -2946,7 +2940,7 @@ static void vxlan_uninit(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	gro_cells_destroy(&amp;vxlan-&gt;gro_cells);</div><div class='ctx'> </div><div class='del'>-	vxlan_fdb_delete_default(vxlan, vxlan-&gt;cfg.vni);</div><div class='add'>+	rhashtable_destroy(&amp;vxlan-&gt;fdb_hash_tbl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Start ageing timer and join group when device is brought up */</div><div class='hunk'>@@ -2987,7 +2981,8 @@ struct vxlan_fdb_flush_desc {</div><div class='ctx'> static bool vxlan_fdb_is_default_entry(const struct vxlan_fdb *f,</div><div class='ctx'> 				       const struct vxlan_dev *vxlan)</div><div class='ctx'> {</div><div class='del'>-	return is_zero_ether_addr(f-&gt;eth_addr) &amp;&amp; f-&gt;vni == vxlan-&gt;cfg.vni;</div><div class='add'>+	return is_zero_ether_addr(f-&gt;key.eth_addr) &amp;&amp;</div><div class='add'>+	       f-&gt;key.vni == vxlan-&gt;cfg.vni;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool vxlan_fdb_nhid_matches(const struct vxlan_fdb *f, u32 nhid)</div><div class='hunk'>@@ -3010,7 +3005,7 @@ static bool vxlan_fdb_flush_matches(const struct vxlan_fdb *f,</div><div class='ctx'> 	if (desc-&gt;ignore_default_entry &amp;&amp; vxlan_fdb_is_default_entry(f, vxlan))</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (desc-&gt;src_vni &amp;&amp; f-&gt;vni != desc-&gt;src_vni)</div><div class='add'>+	if (desc-&gt;src_vni &amp;&amp; f-&gt;key.vni != desc-&gt;src_vni)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='ctx'> 	if (desc-&gt;nhid &amp;&amp; !vxlan_fdb_nhid_matches(f, desc-&gt;nhid))</div><div class='hunk'>@@ -3066,33 +3061,32 @@ static void vxlan_flush(struct vxlan_dev *vxlan,</div><div class='ctx'> 			const struct vxlan_fdb_flush_desc *desc)</div><div class='ctx'> {</div><div class='ctx'> 	bool match_remotes = vxlan_fdb_flush_should_match_remotes(desc);</div><div class='del'>-	unsigned int h;</div><div class='del'>-</div><div class='del'>-	for (h = 0; h &lt; FDB_HASH_SIZE; ++h) {</div><div class='del'>-		struct hlist_node *p, *n;</div><div class='del'>-</div><div class='del'>-		spin_lock_bh(&amp;vxlan-&gt;hash_lock[h]);</div><div class='del'>-		hlist_for_each_safe(p, n, &amp;vxlan-&gt;fdb_head[h]) {</div><div class='del'>-			struct vxlan_fdb *f</div><div class='del'>-				= container_of(p, struct vxlan_fdb, hlist);</div><div class='add'>+	struct vxlan_fdb *f;</div><div class='ctx'> </div><div class='del'>-			if (!vxlan_fdb_flush_matches(f, vxlan, desc))</div><div class='del'>-				continue;</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	hlist_for_each_entry_rcu(f, &amp;vxlan-&gt;fdb_list, fdb_node) {</div><div class='add'>+		if (!vxlan_fdb_flush_matches(f, vxlan, desc))</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-			if (match_remotes) {</div><div class='del'>-				bool destroy_fdb = false;</div><div class='add'>+		spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+		if (hlist_unhashed(&amp;f-&gt;fdb_node))</div><div class='add'>+			goto unlock;</div><div class='ctx'> </div><div class='del'>-				vxlan_fdb_flush_match_remotes(f, vxlan, desc,</div><div class='del'>-							      &amp;destroy_fdb);</div><div class='add'>+		if (match_remotes) {</div><div class='add'>+			bool destroy_fdb = false;</div><div class='ctx'> </div><div class='del'>-				if (!destroy_fdb)</div><div class='del'>-					continue;</div><div class='del'>-			}</div><div class='add'>+			vxlan_fdb_flush_match_remotes(f, vxlan, desc,</div><div class='add'>+						      &amp;destroy_fdb);</div><div class='ctx'> </div><div class='del'>-			vxlan_fdb_destroy(vxlan, f, true, true);</div><div class='add'>+			if (!destroy_fdb)</div><div class='add'>+				goto unlock;</div><div class='ctx'> 		}</div><div class='del'>-		spin_unlock_bh(&amp;vxlan-&gt;hash_lock[h]);</div><div class='add'>+</div><div class='add'>+		vxlan_fdb_destroy(vxlan, f, true, true);</div><div class='add'>+unlock:</div><div class='add'>+		spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 	}</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct nla_policy vxlan_del_bulk_policy[NDA_MAX + 1] = {</div><div class='hunk'>@@ -3180,7 +3174,7 @@ static int vxlan_stop(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='ctx'> 	struct vxlan_fdb_flush_desc desc = {</div><div class='del'>-		/* Default entry is deleted at vxlan_uninit. */</div><div class='add'>+		/* Default entry is deleted at vxlan_dellink. */</div><div class='ctx'> 		.ignore_default_entry = true,</div><div class='ctx'> 		.state = 0,</div><div class='ctx'> 		.state_mask = NUD_PERMANENT | NUD_NOARP,</div><div class='hunk'>@@ -3188,7 +3182,7 @@ static int vxlan_stop(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	vxlan_multicast_leave(vxlan);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;vxlan-&gt;age_timer);</div><div class='add'>+	timer_delete_sync(&amp;vxlan-&gt;age_timer);</div><div class='ctx'> </div><div class='ctx'> 	vxlan_flush(vxlan, &amp;desc);</div><div class='ctx'> 	vxlan_sock_release(vxlan);</div><div class='hunk'>@@ -3320,9 +3314,10 @@ static void vxlan_offload_rx_ports(struct net_device *dev, bool push)</div><div class='ctx'> 	struct vxlan_net *vn = net_generic(net, vxlan_net_id);</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;vn-&gt;sock_lock);</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; PORT_HASH_SIZE; ++i) {</div><div class='del'>-		hlist_for_each_entry_rcu(vs, &amp;vn-&gt;sock_list[i], hlist) {</div><div class='add'>+		hlist_for_each_entry(vs, &amp;vn-&gt;sock_list[i], hlist) {</div><div class='ctx'> 			unsigned short type;</div><div class='ctx'> </div><div class='ctx'> 			if (vs-&gt;flags &amp; VXLAN_F_GPE)</div><div class='hunk'>@@ -3336,14 +3331,12 @@ static void vxlan_offload_rx_ports(struct net_device *dev, bool push)</div><div class='ctx'> 				udp_tunnel_drop_rx_port(dev, vs-&gt;sock, type);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Initialize the device structure. */</div><div class='ctx'> static void vxlan_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='del'>-	unsigned int h;</div><div class='ctx'> </div><div class='ctx'> 	eth_hw_addr_random(dev);</div><div class='ctx'> 	ether_setup(dev);</div><div class='hunk'>@@ -3368,17 +3361,15 @@ static void vxlan_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;min_mtu = ETH_MIN_MTU;</div><div class='ctx'> 	dev-&gt;max_mtu = ETH_MAX_MTU;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;</div><div class='add'>+	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_DSTATS;</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;vxlan-&gt;next);</div><div class='add'>+	spin_lock_init(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> </div><div class='ctx'> 	timer_setup(&amp;vxlan-&gt;age_timer, vxlan_cleanup, TIMER_DEFERRABLE);</div><div class='ctx'> </div><div class='ctx'> 	vxlan-&gt;dev = dev;</div><div class='ctx'> </div><div class='del'>-	for (h = 0; h &lt; FDB_HASH_SIZE; ++h) {</div><div class='del'>-		spin_lock_init(&amp;vxlan-&gt;hash_lock[h]);</div><div class='del'>-		INIT_HLIST_HEAD(&amp;vxlan-&gt;fdb_head[h]);</div><div class='del'>-	}</div><div class='add'>+	INIT_HLIST_HEAD(&amp;vxlan-&gt;fdb_list);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vxlan_ether_setup(struct net_device *dev)</div><div class='hunk'>@@ -3432,6 +3423,8 @@ static const struct nla_policy vxlan_policy[IFLA_VXLAN_MAX + 1] = {</div><div class='ctx'> 	[IFLA_VXLAN_VNIFILTER]	= { .type = NLA_U8 },</div><div class='ctx'> 	[IFLA_VXLAN_LOCALBYPASS]	= NLA_POLICY_MAX(NLA_U8, 1),</div><div class='ctx'> 	[IFLA_VXLAN_LABEL_POLICY]       = NLA_POLICY_MAX(NLA_U32, VXLAN_LABEL_MAX),</div><div class='add'>+	[IFLA_VXLAN_RESERVED_BITS] = NLA_POLICY_EXACT_LEN(sizeof(struct vxlanhdr)),</div><div class='add'>+	[IFLA_VXLAN_MC_ROUTE]		= NLA_POLICY_MAX(NLA_U8, 1),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int vxlan_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='hunk'>@@ -3568,12 +3561,13 @@ static struct vxlan_sock *vxlan_socket_create(struct net *net, bool ipv6,</div><div class='ctx'> 					      __be16 port, u32 flags,</div><div class='ctx'> 					      int ifindex)</div><div class='ctx'> {</div><div class='del'>-	struct vxlan_net *vn = net_generic(net, vxlan_net_id);</div><div class='ctx'> 	struct vxlan_sock *vs;</div><div class='ctx'> 	struct socket *sock;</div><div class='ctx'> 	unsigned int h;</div><div class='ctx'> 	struct udp_tunnel_sock_cfg tunnel_cfg;</div><div class='ctx'> </div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	vs = kzalloc(sizeof(*vs), GFP_KERNEL);</div><div class='ctx'> 	if (!vs)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='hunk'>@@ -3591,13 +3585,11 @@ static struct vxlan_sock *vxlan_socket_create(struct net *net, bool ipv6,</div><div class='ctx'> 	refcount_set(&amp;vs-&gt;refcnt, 1);</div><div class='ctx'> 	vs-&gt;flags = (flags &amp; VXLAN_F_RCV_FLAGS);</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> 	hlist_add_head_rcu(&amp;vs-&gt;hlist, vs_head(net, port));</div><div class='ctx'> 	udp_tunnel_notify_add_rx_port(sock,</div><div class='ctx'> 				      (vs-&gt;flags &amp; VXLAN_F_GPE) ?</div><div class='ctx'> 				      UDP_TUNNEL_TYPE_VXLAN_GPE :</div><div class='ctx'> 				      UDP_TUNNEL_TYPE_VXLAN);</div><div class='del'>-	spin_unlock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Mark socket as an encapsulation socket. */</div><div class='ctx'> 	memset(&amp;tunnel_cfg, 0, sizeof(tunnel_cfg));</div><div class='hunk'>@@ -3621,26 +3613,27 @@ static struct vxlan_sock *vxlan_socket_create(struct net *net, bool ipv6,</div><div class='ctx'> </div><div class='ctx'> static int __vxlan_sock_add(struct vxlan_dev *vxlan, bool ipv6)</div><div class='ctx'> {</div><div class='del'>-	struct vxlan_net *vn = net_generic(vxlan-&gt;net, vxlan_net_id);</div><div class='ctx'> 	bool metadata = vxlan-&gt;cfg.flags &amp; VXLAN_F_COLLECT_METADATA;</div><div class='ctx'> 	struct vxlan_sock *vs = NULL;</div><div class='ctx'> 	struct vxlan_dev_node *node;</div><div class='ctx'> 	int l3mdev_index = 0;</div><div class='ctx'> </div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	if (vxlan-&gt;cfg.remote_ifindex)</div><div class='ctx'> 		l3mdev_index = l3mdev_master_upper_ifindex_by_index(</div><div class='ctx'> 			vxlan-&gt;net, vxlan-&gt;cfg.remote_ifindex);</div><div class='ctx'> </div><div class='ctx'> 	if (!vxlan-&gt;cfg.no_share) {</div><div class='del'>-		spin_lock(&amp;vn-&gt;sock_lock);</div><div class='add'>+		rcu_read_lock();</div><div class='ctx'> 		vs = vxlan_find_sock(vxlan-&gt;net, ipv6 ? AF_INET6 : AF_INET,</div><div class='ctx'> 				     vxlan-&gt;cfg.dst_port, vxlan-&gt;cfg.flags,</div><div class='ctx'> 				     l3mdev_index);</div><div class='ctx'> 		if (vs &amp;&amp; !refcount_inc_not_zero(&amp;vs-&gt;refcnt)) {</div><div class='del'>-			spin_unlock(&amp;vn-&gt;sock_lock);</div><div class='add'>+			rcu_read_unlock();</div><div class='ctx'> 			return -EBUSY;</div><div class='ctx'> 		}</div><div class='del'>-		spin_unlock(&amp;vn-&gt;sock_lock);</div><div class='add'>+		rcu_read_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!vs)</div><div class='ctx'> 		vs = vxlan_socket_create(vxlan-&gt;net, ipv6,</div><div class='hunk'>@@ -3931,7 +3924,7 @@ static void vxlan_config_apply(struct net_device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vxlan_dev_configure(struct net *src_net, struct net_device *dev,</div><div class='del'>-			       struct vxlan_config *conf, bool changelink,</div><div class='add'>+			       struct vxlan_config *conf,</div><div class='ctx'> 			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='hunk'>@@ -3942,7 +3935,7 @@ static int vxlan_dev_configure(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	vxlan_config_apply(dev, conf, lowerdev, src_net, changelink);</div><div class='add'>+	vxlan_config_apply(dev, conf, lowerdev, src_net, false);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3954,84 +3947,64 @@ static int __vxlan_dev_create(struct net *net, struct net_device *dev,</div><div class='ctx'> 	struct vxlan_net *vn = net_generic(net, vxlan_net_id);</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='ctx'> 	struct net_device *remote_dev = NULL;</div><div class='del'>-	struct vxlan_fdb *f = NULL;</div><div class='del'>-	bool unregister = false;</div><div class='ctx'> 	struct vxlan_rdst *dst;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	dst = &amp;vxlan-&gt;default_dst;</div><div class='del'>-	err = vxlan_dev_configure(net, dev, conf, false, extack);</div><div class='add'>+	err = vxlan_dev_configure(net, dev, conf, extack);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;vxlan_ethtool_ops;</div><div class='ctx'> </div><div class='del'>-	/* create an fdb entry for a valid default destination */</div><div class='del'>-	if (!vxlan_addr_any(&amp;dst-&gt;remote_ip)) {</div><div class='del'>-		err = vxlan_fdb_create(vxlan, all_zeros_mac,</div><div class='del'>-				       &amp;dst-&gt;remote_ip,</div><div class='del'>-				       NUD_REACHABLE | NUD_PERMANENT,</div><div class='del'>-				       vxlan-&gt;cfg.dst_port,</div><div class='del'>-				       dst-&gt;remote_vni,</div><div class='del'>-				       dst-&gt;remote_vni,</div><div class='del'>-				       dst-&gt;remote_ifindex,</div><div class='del'>-				       NTF_SELF, 0, &amp;f, extack);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	err = register_netdevice(dev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto errout;</div><div class='del'>-	unregister = true;</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	if (dst-&gt;remote_ifindex) {</div><div class='ctx'> 		remote_dev = __dev_get_by_index(net, dst-&gt;remote_ifindex);</div><div class='ctx'> 		if (!remote_dev) {</div><div class='ctx'> 			err = -ENODEV;</div><div class='del'>-			goto errout;</div><div class='add'>+			goto unregister;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		err = netdev_upper_dev_link(remote_dev, dev, extack);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto errout;</div><div class='add'>+			goto unregister;</div><div class='add'>+</div><div class='add'>+		dst-&gt;remote_dev = remote_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = rtnl_configure_link(dev, NULL, 0, NULL);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		goto unlink;</div><div class='ctx'> </div><div class='del'>-	if (f) {</div><div class='del'>-		vxlan_fdb_insert(vxlan, all_zeros_mac, dst-&gt;remote_vni, f);</div><div class='del'>-</div><div class='del'>-		/* notify default fdb entry */</div><div class='del'>-		err = vxlan_fdb_notify(vxlan, f, first_remote_rtnl(f),</div><div class='del'>-				       RTM_NEWNEIGH, true, extack);</div><div class='del'>-		if (err) {</div><div class='del'>-			vxlan_fdb_destroy(vxlan, f, false, false);</div><div class='del'>-			if (remote_dev)</div><div class='del'>-				netdev_upper_dev_unlink(remote_dev, dev);</div><div class='del'>-			goto unregister;</div><div class='del'>-		}</div><div class='add'>+	/* create an fdb entry for a valid default destination */</div><div class='add'>+	if (!vxlan_addr_any(&amp;dst-&gt;remote_ip)) {</div><div class='add'>+		spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+		err = vxlan_fdb_update(vxlan, all_zeros_mac,</div><div class='add'>+				       &amp;dst-&gt;remote_ip,</div><div class='add'>+				       NUD_REACHABLE | NUD_PERMANENT,</div><div class='add'>+				       NLM_F_EXCL | NLM_F_CREATE,</div><div class='add'>+				       vxlan-&gt;cfg.dst_port,</div><div class='add'>+				       dst-&gt;remote_vni,</div><div class='add'>+				       dst-&gt;remote_vni,</div><div class='add'>+				       dst-&gt;remote_ifindex,</div><div class='add'>+				       NTF_SELF, 0, true, extack);</div><div class='add'>+		spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlink;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	list_add(&amp;vxlan-&gt;next, &amp;vn-&gt;vxlan_list);</div><div class='del'>-	if (remote_dev)</div><div class='del'>-		dst-&gt;remote_dev = remote_dev;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='ctx'> unlink:</div><div class='ctx'> 	if (remote_dev)</div><div class='ctx'> 		netdev_upper_dev_unlink(remote_dev, dev);</div><div class='del'>-errout:</div><div class='del'>-	/* unregister_netdevice() destroys the default FDB entry with deletion</div><div class='del'>-	 * notification. But the addition notification was not sent yet, so</div><div class='del'>-	 * destroy the entry by hand here.</div><div class='del'>-	 */</div><div class='del'>-	if (f)</div><div class='del'>-		__vxlan_fdb_free(f);</div><div class='ctx'> unregister:</div><div class='del'>-	if (unregister)</div><div class='del'>-		unregister_netdevice(dev);</div><div class='add'>+	unregister_netdevice(dev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4067,6 +4040,10 @@ static int vxlan_nl2conf(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 			 struct net_device *dev, struct vxlan_config *conf,</div><div class='ctx'> 			 bool changelink, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct vxlanhdr used_bits = {</div><div class='add'>+		.vx_flags = VXLAN_HF_VNI,</div><div class='add'>+		.vx_vni = VXLAN_VNI_MASK,</div><div class='add'>+	};</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -4083,7 +4060,7 @@ static int vxlan_nl2conf(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 			NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_VXLAN_ID], "Cannot change VNI");</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 		}</div><div class='del'>-		conf-&gt;vni = cpu_to_be32(nla_get_u32(data[IFLA_VXLAN_ID]));</div><div class='add'>+		conf-&gt;vni = vni;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (data[IFLA_VXLAN_GROUP]) {</div><div class='hunk'>@@ -4293,6 +4270,8 @@ static int vxlan_nl2conf(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 				    extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='add'>+		used_bits.vx_flags |= VXLAN_HF_RCO;</div><div class='add'>+		used_bits.vx_vni |= ~VXLAN_VNI_MASK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (data[IFLA_VXLAN_GBP]) {</div><div class='hunk'>@@ -4300,6 +4279,7 @@ static int vxlan_nl2conf(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 				    VXLAN_F_GBP, changelink, false, extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='add'>+		used_bits.vx_flags |= VXLAN_GBP_USED_BITS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (data[IFLA_VXLAN_GPE]) {</div><div class='hunk'>@@ -4308,6 +4288,46 @@ static int vxlan_nl2conf(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 				    extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='add'>+</div><div class='add'>+		used_bits.vx_flags |= VXLAN_GPE_USED_BITS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_VXLAN_RESERVED_BITS]) {</div><div class='add'>+		struct vxlanhdr reserved_bits;</div><div class='add'>+</div><div class='add'>+		if (changelink) {</div><div class='add'>+			NL_SET_ERR_MSG_ATTR(extack,</div><div class='add'>+					    data[IFLA_VXLAN_RESERVED_BITS],</div><div class='add'>+					    "Cannot change reserved_bits");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nla_memcpy(&amp;reserved_bits, data[IFLA_VXLAN_RESERVED_BITS],</div><div class='add'>+			   sizeof(reserved_bits));</div><div class='add'>+		if (used_bits.vx_flags &amp; reserved_bits.vx_flags ||</div><div class='add'>+		    used_bits.vx_vni &amp; reserved_bits.vx_vni) {</div><div class='add'>+			__be64 ub_be64, rb_be64;</div><div class='add'>+</div><div class='add'>+			memcpy(&amp;ub_be64, &amp;used_bits, sizeof(ub_be64));</div><div class='add'>+			memcpy(&amp;rb_be64, &amp;reserved_bits, sizeof(rb_be64));</div><div class='add'>+</div><div class='add'>+			NL_SET_ERR_MSG_ATTR_FMT(extack,</div><div class='add'>+						data[IFLA_VXLAN_RESERVED_BITS],</div><div class='add'>+						"Used bits %#018llx cannot overlap reserved bits %#018llx",</div><div class='add'>+						be64_to_cpu(ub_be64),</div><div class='add'>+						be64_to_cpu(rb_be64));</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		conf-&gt;reserved_bits = reserved_bits;</div><div class='add'>+	} else {</div><div class='add'>+		/* For backwards compatibility, only allow reserved fields to be</div><div class='add'>+		 * used by VXLAN extensions if explicitly requested.</div><div class='add'>+		 */</div><div class='add'>+		conf-&gt;reserved_bits = (struct vxlanhdr) {</div><div class='add'>+			.vx_flags = ~used_bits.vx_flags,</div><div class='add'>+			.vx_vni = ~used_bits.vx_vni,</div><div class='add'>+		};</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (data[IFLA_VXLAN_REMCSUM_NOPARTIAL]) {</div><div class='hunk'>@@ -4318,6 +4338,14 @@ static int vxlan_nl2conf(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (data[IFLA_VXLAN_MC_ROUTE]) {</div><div class='add'>+		err = vxlan_nl2flag(conf, data, IFLA_VXLAN_MC_ROUTE,</div><div class='add'>+				    VXLAN_F_MC_ROUTE, changelink,</div><div class='add'>+				    true, extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (tb[IFLA_MTU]) {</div><div class='ctx'> 		if (changelink) {</div><div class='ctx'> 			NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_MTU],</div><div class='hunk'>@@ -4348,10 +4376,13 @@ static int vxlan_nl2conf(struct nlattr *tb[], struct nlattr *data[],</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vxlan_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-			 struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int vxlan_newlink(struct net_device *dev,</div><div class='add'>+			 struct rtnl_newlink_params *params,</div><div class='ctx'> 			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	struct vxlan_config conf;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -4359,7 +4390,7 @@ static int vxlan_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return __vxlan_dev_create(src_net, dev, &amp;conf, extack);</div><div class='add'>+	return __vxlan_dev_create(link_net, dev, &amp;conf, extack);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='hunk'>@@ -4367,6 +4398,7 @@ static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 			    struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='add'>+	bool rem_ip_changed, change_igmp;</div><div class='ctx'> 	struct net_device *lowerdev;</div><div class='ctx'> 	struct vxlan_config conf;</div><div class='ctx'> 	struct vxlan_rdst *dst;</div><div class='hunk'>@@ -4390,11 +4422,14 @@ static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* handle default dst entry */</div><div class='del'>-	if (!vxlan_addr_equal(&amp;conf.remote_ip, &amp;dst-&gt;remote_ip)) {</div><div class='del'>-		u32 hash_index = fdb_head_index(vxlan, all_zeros_mac, conf.vni);</div><div class='add'>+	rem_ip_changed = !vxlan_addr_equal(&amp;conf.remote_ip, &amp;dst-&gt;remote_ip);</div><div class='add'>+	change_igmp = vxlan-&gt;dev-&gt;flags &amp; IFF_UP &amp;&amp;</div><div class='add'>+		      (rem_ip_changed ||</div><div class='add'>+		       dst-&gt;remote_ifindex != conf.remote_ifindex);</div><div class='ctx'> </div><div class='del'>-		spin_lock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	/* handle default dst entry */</div><div class='add'>+	if (rem_ip_changed) {</div><div class='add'>+		spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 		if (!vxlan_addr_any(&amp;conf.remote_ip)) {</div><div class='ctx'> 			err = vxlan_fdb_update(vxlan, all_zeros_mac,</div><div class='ctx'> 					       &amp;conf.remote_ip,</div><div class='hunk'>@@ -4405,7 +4440,7 @@ static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 					       conf.remote_ifindex,</div><div class='ctx'> 					       NTF_SELF, 0, true, extack);</div><div class='ctx'> 			if (err) {</div><div class='del'>-				spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+				spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 				netdev_adjacent_change_abort(dst-&gt;remote_dev,</div><div class='ctx'> 							     lowerdev, dev);</div><div class='ctx'> 				return err;</div><div class='hunk'>@@ -4419,7 +4454,7 @@ static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 					   dst-&gt;remote_vni,</div><div class='ctx'> 					   dst-&gt;remote_ifindex,</div><div class='ctx'> 					   true);</div><div class='del'>-		spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+		spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> </div><div class='ctx'> 		/* If vni filtering device, also update fdb entries of</div><div class='ctx'> 		 * all vnis that were using default remote ip</div><div class='hunk'>@@ -4435,6 +4470,9 @@ static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (change_igmp &amp;&amp; vxlan_addr_multicast(&amp;dst-&gt;remote_ip))</div><div class='add'>+		err = vxlan_multicast_leave(vxlan);</div><div class='add'>+</div><div class='ctx'> 	if (conf.age_interval != vxlan-&gt;cfg.age_interval)</div><div class='ctx'> 		mod_timer(&amp;vxlan-&gt;age_timer, jiffies);</div><div class='ctx'> </div><div class='hunk'>@@ -4442,16 +4480,18 @@ static int vxlan_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='ctx'> 	if (lowerdev &amp;&amp; lowerdev != dst-&gt;remote_dev)</div><div class='ctx'> 		dst-&gt;remote_dev = lowerdev;</div><div class='ctx'> 	vxlan_config_apply(dev, &amp;conf, lowerdev, vxlan-&gt;net, true);</div><div class='del'>-	return 0;</div><div class='add'>+</div><div class='add'>+	if (!err &amp;&amp; change_igmp &amp;&amp;</div><div class='add'>+	    vxlan_addr_multicast(&amp;dst-&gt;remote_ip))</div><div class='add'>+		err = vxlan_multicast_join(vxlan);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vxlan_dellink(struct net_device *dev, struct list_head *head)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='del'>-	struct vxlan_fdb_flush_desc desc = {</div><div class='del'>-		/* Default entry is deleted at vxlan_uninit. */</div><div class='del'>-		.ignore_default_entry = true,</div><div class='del'>-	};</div><div class='add'>+	struct vxlan_fdb_flush_desc desc = {};</div><div class='ctx'> </div><div class='ctx'> 	vxlan_flush(vxlan, &amp;desc);</div><div class='ctx'> </div><div class='hunk'>@@ -4494,6 +4534,8 @@ static size_t vxlan_get_size(const struct net_device *dev)</div><div class='ctx'> 		nla_total_size(0) + /* IFLA_VXLAN_GPE */</div><div class='ctx'> 		nla_total_size(0) + /* IFLA_VXLAN_REMCSUM_NOPARTIAL */</div><div class='ctx'> 		nla_total_size(sizeof(__u8)) + /* IFLA_VXLAN_VNIFILTER */</div><div class='add'>+		/* IFLA_VXLAN_RESERVED_BITS */</div><div class='add'>+		nla_total_size(sizeof(struct vxlanhdr)) +</div><div class='ctx'> 		0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4596,6 +4638,11 @@ static int vxlan_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='ctx'> 		       !!(vxlan-&gt;cfg.flags &amp; VXLAN_F_VNIFILTER)))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='add'>+	if (nla_put(skb, IFLA_VXLAN_RESERVED_BITS,</div><div class='add'>+		    sizeof(vxlan-&gt;cfg.reserved_bits),</div><div class='add'>+		    &amp;vxlan-&gt;cfg.reserved_bits))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> nla_put_failure:</div><div class='hunk'>@@ -4707,11 +4754,8 @@ vxlan_fdb_offloaded_set(struct net_device *dev,</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='ctx'> 	struct vxlan_rdst *rdst;</div><div class='ctx'> 	struct vxlan_fdb *f;</div><div class='del'>-	u32 hash_index;</div><div class='del'>-</div><div class='del'>-	hash_index = fdb_head_index(vxlan, fdb_info-&gt;eth_addr, fdb_info-&gt;vni);</div><div class='ctx'> </div><div class='del'>-	spin_lock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> </div><div class='ctx'> 	f = vxlan_find_mac(vxlan, fdb_info-&gt;eth_addr, fdb_info-&gt;vni);</div><div class='ctx'> 	if (!f)</div><div class='hunk'>@@ -4727,7 +4771,7 @@ vxlan_fdb_offloaded_set(struct net_device *dev,</div><div class='ctx'> 	rdst-&gt;offloaded = fdb_info-&gt;offloaded;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -4736,13 +4780,11 @@ vxlan_fdb_external_learn_add(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='ctx'> 	struct netlink_ext_ack *extack;</div><div class='del'>-	u32 hash_index;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	hash_index = fdb_head_index(vxlan, fdb_info-&gt;eth_addr, fdb_info-&gt;vni);</div><div class='ctx'> 	extack = switchdev_notifier_info_to_extack(&amp;fdb_info-&gt;info);</div><div class='ctx'> </div><div class='del'>-	spin_lock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 	err = vxlan_fdb_update(vxlan, fdb_info-&gt;eth_addr, &amp;fdb_info-&gt;remote_ip,</div><div class='ctx'> 			       NUD_REACHABLE,</div><div class='ctx'> 			       NLM_F_CREATE | NLM_F_REPLACE,</div><div class='hunk'>@@ -4752,7 +4794,7 @@ vxlan_fdb_external_learn_add(struct net_device *dev,</div><div class='ctx'> 			       fdb_info-&gt;remote_ifindex,</div><div class='ctx'> 			       NTF_USE | NTF_SELF | NTF_EXT_LEARNED,</div><div class='ctx'> 			       0, false, extack);</div><div class='del'>-	spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -4763,11 +4805,9 @@ vxlan_fdb_external_learn_del(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_dev *vxlan = netdev_priv(dev);</div><div class='ctx'> 	struct vxlan_fdb *f;</div><div class='del'>-	u32 hash_index;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	hash_index = fdb_head_index(vxlan, fdb_info-&gt;eth_addr, fdb_info-&gt;vni);</div><div class='del'>-	spin_lock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> </div><div class='ctx'> 	f = vxlan_find_mac(vxlan, fdb_info-&gt;eth_addr, fdb_info-&gt;vni);</div><div class='ctx'> 	if (!f)</div><div class='hunk'>@@ -4781,7 +4821,7 @@ vxlan_fdb_external_learn_del(struct net_device *dev,</div><div class='ctx'> 					 fdb_info-&gt;remote_ifindex,</div><div class='ctx'> 					 false);</div><div class='ctx'> </div><div class='del'>-	spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -4830,18 +4870,15 @@ static void vxlan_fdb_nh_flush(struct nexthop *nh)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_fdb *fdb;</div><div class='ctx'> 	struct vxlan_dev *vxlan;</div><div class='del'>-	u32 hash_index;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	list_for_each_entry_rcu(fdb, &amp;nh-&gt;fdb_list, nh_list) {</div><div class='ctx'> 		vxlan = rcu_dereference(fdb-&gt;vdev);</div><div class='ctx'> 		WARN_ON(!vxlan);</div><div class='del'>-		hash_index = fdb_head_index(vxlan, fdb-&gt;eth_addr,</div><div class='del'>-					    vxlan-&gt;default_dst.remote_vni);</div><div class='del'>-		spin_lock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='del'>-		if (!hlist_unhashed(&amp;fdb-&gt;hlist))</div><div class='add'>+		spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+		if (!hlist_unhashed(&amp;fdb-&gt;fdb_node))</div><div class='ctx'> 			vxlan_fdb_destroy(vxlan, fdb, false, false);</div><div class='del'>-		spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+		spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 	}</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> }</div><div class='hunk'>@@ -4870,7 +4907,6 @@ static __net_init int vxlan_init_net(struct net *net)</div><div class='ctx'> 	unsigned int h;</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;vn-&gt;vxlan_list);</div><div class='del'>-	spin_lock_init(&amp;vn-&gt;sock_lock);</div><div class='ctx'> 	vn-&gt;nexthop_notifier_block.notifier_call = vxlan_nexthop_event;</div><div class='ctx'> </div><div class='ctx'> 	for (h = 0; h &lt; PORT_HASH_SIZE; ++h)</div><div class='hunk'>@@ -4889,19 +4925,15 @@ static void __net_exit vxlan_destroy_tunnels(struct vxlan_net *vn,</div><div class='ctx'> 		vxlan_dellink(vxlan-&gt;dev, dev_to_kill);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __net_exit vxlan_exit_batch_rtnl(struct list_head *net_list,</div><div class='del'>-					     struct list_head *dev_to_kill)</div><div class='add'>+static void __net_exit vxlan_exit_rtnl(struct net *net,</div><div class='add'>+				       struct list_head *dev_to_kill)</div><div class='ctx'> {</div><div class='del'>-	struct net *net;</div><div class='del'>-</div><div class='del'>-	ASSERT_RTNL();</div><div class='del'>-	list_for_each_entry(net, net_list, exit_list) {</div><div class='del'>-		struct vxlan_net *vn = net_generic(net, vxlan_net_id);</div><div class='add'>+	struct vxlan_net *vn = net_generic(net, vxlan_net_id);</div><div class='ctx'> </div><div class='del'>-		__unregister_nexthop_notifier(net, &amp;vn-&gt;nexthop_notifier_block);</div><div class='add'>+	ASSERT_RTNL_NET(net);</div><div class='ctx'> </div><div class='del'>-		vxlan_destroy_tunnels(vn, dev_to_kill);</div><div class='del'>-	}</div><div class='add'>+	__unregister_nexthop_notifier(net, &amp;vn-&gt;nexthop_notifier_block);</div><div class='add'>+	vxlan_destroy_tunnels(vn, dev_to_kill);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void __net_exit vxlan_exit_net(struct net *net)</div><div class='hunk'>@@ -4915,7 +4947,7 @@ static void __net_exit vxlan_exit_net(struct net *net)</div><div class='ctx'> </div><div class='ctx'> static struct pernet_operations vxlan_net_ops = {</div><div class='ctx'> 	.init = vxlan_init_net,</div><div class='del'>-	.exit_batch_rtnl = vxlan_exit_batch_rtnl,</div><div class='add'>+	.exit_rtnl = vxlan_exit_rtnl,</div><div class='ctx'> 	.exit = vxlan_exit_net,</div><div class='ctx'> 	.id   = &amp;vxlan_net_id,</div><div class='ctx'> 	.size = sizeof(struct vxlan_net),</div><div class='hunk'>@@ -4925,8 +4957,6 @@ static int __init vxlan_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	get_random_bytes(&amp;vxlan_salt, sizeof(vxlan_salt));</div><div class='del'>-</div><div class='ctx'> 	rc = register_pernet_subsys(&amp;vxlan_net_ops);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		goto out1;</div><div class='head'>diff --git a/drivers/net/vxlan/vxlan_mdb.c b/drivers/net/vxlan/vxlan_mdb.c<br/>index 8735891ee128..816ab1aa0526 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/vxlan/vxlan_mdb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vxlan/vxlan_mdb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/vxlan/vxlan_mdb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/vxlan/vxlan_mdb.c</a></div><div class='hunk'>@@ -1712,7 +1712,7 @@ netdev_tx_t vxlan_mdb_xmit(struct vxlan_dev *vxlan,</div><div class='ctx'> 		vxlan_xmit_one(skb, vxlan-&gt;dev, src_vni,</div><div class='ctx'> 			       rcu_dereference(fremote-&gt;rd), false);</div><div class='ctx'> 	else</div><div class='del'>-		kfree_skb_reason(skb, SKB_DROP_REASON_VXLAN_NO_REMOTE);</div><div class='add'>+		kfree_skb_reason(skb, SKB_DROP_REASON_NO_TX_TARGET);</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/vxlan/vxlan_private.h b/drivers/net/vxlan/vxlan_private.h<br/>index 76a351a997d5..b1eec2216360 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/vxlan/vxlan_private.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vxlan/vxlan_private.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/vxlan/vxlan_private.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/vxlan/vxlan_private.h</a></div><div class='hunk'>@@ -19,23 +19,28 @@ extern const struct rhashtable_params vxlan_vni_rht_params;</div><div class='ctx'> /* per-network namespace private data for this module */</div><div class='ctx'> struct vxlan_net {</div><div class='ctx'> 	struct list_head  vxlan_list;</div><div class='add'>+	/* sock_list is protected by rtnl lock */</div><div class='ctx'> 	struct hlist_head sock_list[PORT_HASH_SIZE];</div><div class='del'>-	spinlock_t	  sock_lock;</div><div class='ctx'> 	struct notifier_block nexthop_notifier_block;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct vxlan_fdb_key {</div><div class='add'>+	u8 eth_addr[ETH_ALEN];</div><div class='add'>+	__be32 vni;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Forwarding table entry */</div><div class='ctx'> struct vxlan_fdb {</div><div class='del'>-	struct hlist_node hlist;	/* linked list of entries */</div><div class='add'>+	struct rhash_head rhnode;</div><div class='ctx'> 	struct rcu_head	  rcu;</div><div class='ctx'> 	unsigned long	  updated;	/* jiffies */</div><div class='ctx'> 	unsigned long	  used;</div><div class='ctx'> 	struct list_head  remotes;</div><div class='del'>-	u8		  eth_addr[ETH_ALEN];</div><div class='add'>+	struct vxlan_fdb_key key;</div><div class='ctx'> 	u16		  state;	/* see ndm_state */</div><div class='del'>-	__be32		  vni;</div><div class='ctx'> 	u16		  flags;	/* see ndm_flags and below */</div><div class='ctx'> 	struct list_head  nh_list;</div><div class='add'>+	struct hlist_node fdb_node;</div><div class='ctx'> 	struct nexthop __rcu *nh;</div><div class='ctx'> 	struct vxlan_dev  __rcu *vdev;</div><div class='ctx'> };</div><div class='hunk'>@@ -56,9 +61,7 @@ static inline struct hlist_head *vs_head(struct net *net, __be16 port)</div><div class='ctx'> 	return &amp;vn-&gt;sock_list[hash_32(ntohs(port), PORT_HASH_BITS)];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* First remote destination for a forwarding entry.</div><div class='del'>- * Guaranteed to be non-NULL because remotes are never deleted.</div><div class='del'>- */</div><div class='add'>+/* First remote destination for a forwarding entry. */</div><div class='ctx'> static inline struct vxlan_rdst *first_remote_rcu(struct vxlan_fdb *fdb)</div><div class='ctx'> {</div><div class='ctx'> 	if (rcu_access_pointer(fdb-&gt;nh))</div><div class='hunk'>@@ -185,8 +188,6 @@ int __vxlan_fdb_delete(struct vxlan_dev *vxlan,</div><div class='ctx'> 		       const unsigned char *addr, union vxlan_addr ip,</div><div class='ctx'> 		       __be16 port, __be32 src_vni, __be32 vni,</div><div class='ctx'> 		       u32 ifindex, bool swdev_notify);</div><div class='del'>-u32 eth_vni_hash(const unsigned char *addr, __be32 vni);</div><div class='del'>-u32 fdb_head_index(struct vxlan_dev *vxlan, const u8 *mac, __be32 vni);</div><div class='ctx'> int vxlan_fdb_update(struct vxlan_dev *vxlan,</div><div class='ctx'> 		     const u8 *mac, union vxlan_addr *ip,</div><div class='ctx'> 		     __u16 state, __u16 flags,</div><div class='head'>diff --git a/drivers/net/vxlan/vxlan_vnifilter.c b/drivers/net/vxlan/vxlan_vnifilter.c<br/>index d2023e7131bd..adc89e651e27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/vxlan/vxlan_vnifilter.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/vxlan/vxlan_vnifilter.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/vxlan/vxlan_vnifilter.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/vxlan/vxlan_vnifilter.c</a></div><div class='hunk'>@@ -40,11 +40,11 @@ static void vxlan_vs_add_del_vninode(struct vxlan_dev *vxlan,</div><div class='ctx'> 				     struct vxlan_vni_node *v,</div><div class='ctx'> 				     bool del)</div><div class='ctx'> {</div><div class='del'>-	struct vxlan_net *vn = net_generic(vxlan-&gt;net, vxlan_net_id);</div><div class='ctx'> 	struct vxlan_dev_node *node;</div><div class='ctx'> 	struct vxlan_sock *vs;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;vn-&gt;sock_lock);</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	if (del) {</div><div class='ctx'> 		if (!hlist_unhashed(&amp;v-&gt;hlist4.hlist))</div><div class='ctx'> 			hlist_del_init_rcu(&amp;v-&gt;hlist4.hlist);</div><div class='hunk'>@@ -52,7 +52,7 @@ static void vxlan_vs_add_del_vninode(struct vxlan_dev *vxlan,</div><div class='ctx'> 		if (!hlist_unhashed(&amp;v-&gt;hlist6.hlist))</div><div class='ctx'> 			hlist_del_init_rcu(&amp;v-&gt;hlist6.hlist);</div><div class='ctx'> #endif</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #if IS_ENABLED(CONFIG_IPV6)</div><div class='hunk'>@@ -67,23 +67,21 @@ static void vxlan_vs_add_del_vninode(struct vxlan_dev *vxlan,</div><div class='ctx'> 		node = &amp;v-&gt;hlist4;</div><div class='ctx'> 		hlist_add_head_rcu(&amp;node-&gt;hlist, vni_head(vs, v-&gt;vni));</div><div class='ctx'> 	}</div><div class='del'>-out:</div><div class='del'>-	spin_unlock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vxlan_vs_add_vnigrp(struct vxlan_dev *vxlan,</div><div class='ctx'> 			 struct vxlan_sock *vs,</div><div class='ctx'> 			 bool ipv6)</div><div class='ctx'> {</div><div class='del'>-	struct vxlan_net *vn = net_generic(vxlan-&gt;net, vxlan_net_id);</div><div class='ctx'> 	struct vxlan_vni_group *vg = rtnl_dereference(vxlan-&gt;vnigrp);</div><div class='ctx'> 	struct vxlan_vni_node *v, *tmp;</div><div class='ctx'> 	struct vxlan_dev_node *node;</div><div class='ctx'> </div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	if (!vg)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> 	list_for_each_entry_safe(v, tmp, &amp;vg-&gt;vni_list, vlist) {</div><div class='ctx'> #if IS_ENABLED(CONFIG_IPV6)</div><div class='ctx'> 		if (ipv6)</div><div class='hunk'>@@ -94,26 +92,24 @@ void vxlan_vs_add_vnigrp(struct vxlan_dev *vxlan,</div><div class='ctx'> 		node-&gt;vxlan = vxlan;</div><div class='ctx'> 		hlist_add_head_rcu(&amp;node-&gt;hlist, vni_head(vs, v-&gt;vni));</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void vxlan_vs_del_vnigrp(struct vxlan_dev *vxlan)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_vni_group *vg = rtnl_dereference(vxlan-&gt;vnigrp);</div><div class='del'>-	struct vxlan_net *vn = net_generic(vxlan-&gt;net, vxlan_net_id);</div><div class='ctx'> 	struct vxlan_vni_node *v, *tmp;</div><div class='ctx'> </div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='ctx'> 	if (!vg)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	spin_lock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> 	list_for_each_entry_safe(v, tmp, &amp;vg-&gt;vni_list, vlist) {</div><div class='ctx'> 		hlist_del_init_rcu(&amp;v-&gt;hlist4.hlist);</div><div class='ctx'> #if IS_ENABLED(CONFIG_IPV6)</div><div class='ctx'> 		hlist_del_init_rcu(&amp;v-&gt;hlist6.hlist);</div><div class='ctx'> #endif</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock(&amp;vn-&gt;sock_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void vxlan_vnifilter_stats_get(const struct vxlan_vni_node *vninode,</div><div class='hunk'>@@ -411,7 +407,11 @@ static int vxlan_vnifilter_dump(struct sk_buff *skb, struct netlink_callback *cb</div><div class='ctx'> 	struct tunnel_msg *tmsg;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> </div><div class='del'>-	tmsg = nlmsg_data(cb-&gt;nlh);</div><div class='add'>+	tmsg = nlmsg_payload(cb-&gt;nlh, sizeof(*tmsg));</div><div class='add'>+	if (!tmsg) {</div><div class='add'>+		NL_SET_ERR_MSG(cb-&gt;extack, "Invalid msg length");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (tmsg-&gt;flags &amp; ~TUNNEL_MSG_VALID_USER_FLAGS) {</div><div class='ctx'> 		NL_SET_ERR_MSG(cb-&gt;extack, "Invalid tunnelmsg flags in ancillary header");</div><div class='hunk'>@@ -478,11 +478,9 @@ static int vxlan_update_default_fdb_entry(struct vxlan_dev *vxlan, __be32 vni,</div><div class='ctx'> 					  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct vxlan_rdst *dst = &amp;vxlan-&gt;default_dst;</div><div class='del'>-	u32 hash_index;</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> </div><div class='del'>-	hash_index = fdb_head_index(vxlan, all_zeros_mac, vni);</div><div class='del'>-	spin_lock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 	if (remote_ip &amp;&amp; !vxlan_addr_any(remote_ip)) {</div><div class='ctx'> 		err = vxlan_fdb_update(vxlan, all_zeros_mac,</div><div class='ctx'> 				       remote_ip,</div><div class='hunk'>@@ -494,7 +492,7 @@ static int vxlan_update_default_fdb_entry(struct vxlan_dev *vxlan, __be32 vni,</div><div class='ctx'> 				       dst-&gt;remote_ifindex,</div><div class='ctx'> 				       NTF_SELF, 0, true, extack);</div><div class='ctx'> 		if (err) {</div><div class='del'>-			spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+			spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 			return err;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -507,7 +505,7 @@ static int vxlan_update_default_fdb_entry(struct vxlan_dev *vxlan, __be32 vni,</div><div class='ctx'> 				   dst-&gt;remote_ifindex,</div><div class='ctx'> 				   true);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_bh(&amp;vxlan-&gt;hash_lock[hash_index]);</div><div class='add'>+	spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -622,7 +620,8 @@ static void vxlan_vni_delete_group(struct vxlan_dev *vxlan,</div><div class='ctx'> 	 * default dst remote_ip previously added for this vni</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!vxlan_addr_any(&amp;vninode-&gt;remote_ip) ||</div><div class='del'>-	    !vxlan_addr_any(&amp;dst-&gt;remote_ip))</div><div class='add'>+	    !vxlan_addr_any(&amp;dst-&gt;remote_ip)) {</div><div class='add'>+		spin_lock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='ctx'> 		__vxlan_fdb_delete(vxlan, all_zeros_mac,</div><div class='ctx'> 				   (vxlan_addr_any(&amp;vninode-&gt;remote_ip) ?</div><div class='ctx'> 				   dst-&gt;remote_ip : vninode-&gt;remote_ip),</div><div class='hunk'>@@ -630,6 +629,8 @@ static void vxlan_vni_delete_group(struct vxlan_dev *vxlan,</div><div class='ctx'> 				   vninode-&gt;vni, vninode-&gt;vni,</div><div class='ctx'> 				   dst-&gt;remote_ifindex,</div><div class='ctx'> 				   true);</div><div class='add'>+		spin_unlock_bh(&amp;vxlan-&gt;hash_lock);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (vxlan-&gt;dev-&gt;flags &amp; IFF_UP) {</div><div class='ctx'> 		if (vxlan_addr_multicast(&amp;vninode-&gt;remote_ip) &amp;&amp;</div><div class='hunk'>@@ -970,15 +971,10 @@ static int vxlan_vnifilter_process(struct sk_buff *skb, struct nlmsghdr *nlh,</div><div class='ctx'> 	if (!(vxlan-&gt;cfg.flags &amp; VXLAN_F_VNIFILTER))</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='del'>-	nlmsg_for_each_attr(attr, nlh, sizeof(*tmsg), rem) {</div><div class='del'>-		switch (nla_type(attr)) {</div><div class='del'>-		case VXLAN_VNIFILTER_ENTRY:</div><div class='del'>-			err = vxlan_process_vni_filter(vxlan, attr,</div><div class='del'>-						       nlh-&gt;nlmsg_type, extack);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='add'>+	nlmsg_for_each_attr_type(attr, VXLAN_VNIFILTER_ENTRY, nlh,</div><div class='add'>+				 sizeof(*tmsg), rem) {</div><div class='add'>+		err = vxlan_process_vni_filter(vxlan, attr, nlh-&gt;nlmsg_type,</div><div class='add'>+					       extack);</div><div class='ctx'> 		vnis++;</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			break;</div><div class='head'>diff --git a/drivers/net/wan/framer/framer-core.c b/drivers/net/wan/framer/framer-core.c<br/>index f547c22e26ac..58f5143359df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/framer/framer-core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/framer/framer-core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/framer/framer-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wan/framer/framer-core.c</a></div><div class='hunk'>@@ -732,8 +732,8 @@ EXPORT_SYMBOL_GPL(devm_framer_create);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * framer_provider_simple_of_xlate() - returns the framer instance from framer provider</div><div class='del'>- * @dev: the framer provider device</div><div class='del'>- * @args: of_phandle_args (not used here)</div><div class='add'>+ * @dev: the framer provider device (not used here)</div><div class='add'>+ * @args: of_phandle_args</div><div class='ctx'>  *</div><div class='ctx'>  * Intended to be used by framer provider for the common case where #framer-cells is</div><div class='ctx'>  * 0. For other cases where #framer-cells is greater than '0', the framer provider</div><div class='hunk'>@@ -743,21 +743,14 @@ EXPORT_SYMBOL_GPL(devm_framer_create);</div><div class='ctx'> struct framer *framer_provider_simple_of_xlate(struct device *dev,</div><div class='ctx'> 					       const struct of_phandle_args *args)</div><div class='ctx'> {</div><div class='del'>-	struct class_dev_iter iter;</div><div class='del'>-	struct framer *framer;</div><div class='del'>-</div><div class='del'>-	class_dev_iter_init(&amp;iter, &amp;framer_class, NULL, NULL);</div><div class='del'>-	while ((dev = class_dev_iter_next(&amp;iter))) {</div><div class='del'>-		framer = dev_to_framer(dev);</div><div class='del'>-		if (args-&gt;np != framer-&gt;dev.of_node)</div><div class='del'>-			continue;</div><div class='add'>+	struct device *target_dev;</div><div class='ctx'> </div><div class='del'>-		class_dev_iter_exit(&amp;iter);</div><div class='del'>-		return framer;</div><div class='del'>-	}</div><div class='add'>+	target_dev = class_find_device_by_of_node(&amp;framer_class, args-&gt;np);</div><div class='add'>+	if (!target_dev)</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='ctx'> </div><div class='del'>-	class_dev_iter_exit(&amp;iter);</div><div class='del'>-	return ERR_PTR(-ENODEV);</div><div class='add'>+	put_device(target_dev);</div><div class='add'>+	return dev_to_framer(target_dev);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(framer_provider_simple_of_xlate);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wan/framer/pef2256/pef2256.c b/drivers/net/wan/framer/pef2256/pef2256.c<br/>index 1e4c8e85d598..c058cc79137d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/framer/pef2256/pef2256.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/framer/pef2256/pef2256.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/framer/pef2256/pef2256.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wan/framer/pef2256/pef2256.c</a></div><div class='hunk'>@@ -37,6 +37,7 @@ struct pef2256 {</div><div class='ctx'> 	struct device *dev;</div><div class='ctx'> 	struct regmap *regmap;</div><div class='ctx'> 	enum pef2256_version version;</div><div class='add'>+	const char *version_txt;</div><div class='ctx'> 	struct clk *mclk;</div><div class='ctx'> 	struct clk *sclkr;</div><div class='ctx'> 	struct clk *sclkx;</div><div class='hunk'>@@ -114,6 +115,16 @@ enum pef2256_version pef2256_get_version(struct pef2256 *pef2256)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(pef2256_get_version);</div><div class='ctx'> </div><div class='add'>+static ssize_t version_show(struct device *dev, struct device_attribute *attr,</div><div class='add'>+			    char *buf)</div><div class='add'>+{</div><div class='add'>+	struct pef2256 *pef2256 = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%s\n", pef2256-&gt;version_txt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEVICE_ATTR_RO(version);</div><div class='add'>+</div><div class='ctx'> enum pef2256_gcm_config_item {</div><div class='ctx'> 	PEF2256_GCM_CONFIG_1544000 = 0,</div><div class='ctx'> 	PEF2256_GCM_CONFIG_2048000,</div><div class='hunk'>@@ -637,7 +648,8 @@ static int pef2256_add_audio_devices(struct pef2256 *pef2256)</div><div class='ctx'> 		audio_devs[i].id = i;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = mfd_add_devices(pef2256-&gt;dev, 0, audio_devs, count, NULL, 0, NULL);</div><div class='add'>+	ret = devm_mfd_add_devices(pef2256-&gt;dev, 0, audio_devs, count,</div><div class='add'>+				   NULL, 0, NULL);</div><div class='ctx'> 	kfree(audio_devs);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -697,7 +709,6 @@ static int pef2256_probe(struct platform_device *pdev)</div><div class='ctx'> 	unsigned long sclkr_rate, sclkx_rate;</div><div class='ctx'> 	struct framer_provider *framer_provider;</div><div class='ctx'> 	struct pef2256 *pef2256;</div><div class='del'>-	const char *version_txt;</div><div class='ctx'> 	void __iomem *iomem;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int irq;</div><div class='hunk'>@@ -719,8 +730,8 @@ static int pef2256_probe(struct platform_device *pdev)</div><div class='ctx'> 	pef2256-&gt;regmap = devm_regmap_init_mmio(&amp;pdev-&gt;dev, iomem,</div><div class='ctx'> 						&amp;pef2256_regmap_config);</div><div class='ctx'> 	if (IS_ERR(pef2256-&gt;regmap)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Failed to initialise Regmap (%ld)\n",</div><div class='del'>-			PTR_ERR(pef2256-&gt;regmap));</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to initialise Regmap (%pe)\n",</div><div class='add'>+			pef2256-&gt;regmap);</div><div class='ctx'> 		return PTR_ERR(pef2256-&gt;regmap);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -763,18 +774,18 @@ static int pef2256_probe(struct platform_device *pdev)</div><div class='ctx'> 	pef2256-&gt;version = pef2256_get_version(pef2256);</div><div class='ctx'> 	switch (pef2256-&gt;version) {</div><div class='ctx'> 	case PEF2256_VERSION_1_2:</div><div class='del'>-		version_txt = "1.2";</div><div class='add'>+		pef2256-&gt;version_txt = "1.2";</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PEF2256_VERSION_2_1:</div><div class='del'>-		version_txt = "2.1";</div><div class='add'>+		pef2256-&gt;version_txt = "2.1";</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PEF2256_VERSION_2_2:</div><div class='del'>-		version_txt = "2.2";</div><div class='add'>+		pef2256-&gt;version_txt = "2.2";</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-	dev_info(pef2256-&gt;dev, "Version %s detected\n", version_txt);</div><div class='add'>+	dev_info(pef2256-&gt;dev, "Version %s detected\n", pef2256-&gt;version_txt);</div><div class='ctx'> </div><div class='ctx'> 	ret = pef2556_of_parse(pef2256, np);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -812,8 +823,8 @@ static int pef2256_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, pef2256);</div><div class='ctx'> </div><div class='del'>-	ret = mfd_add_devices(pef2256-&gt;dev, 0, pef2256_devs,</div><div class='del'>-			      ARRAY_SIZE(pef2256_devs), NULL, 0, NULL);</div><div class='add'>+	ret = devm_mfd_add_devices(pef2256-&gt;dev, 0, pef2256_devs,</div><div class='add'>+				   ARRAY_SIZE(pef2256_devs), NULL, 0, NULL);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(pef2256-&gt;dev, "add devices failed (%d)\n", ret);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -835,6 +846,8 @@ static int pef2256_probe(struct platform_device *pdev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	device_create_file(pef2256-&gt;dev, &amp;dev_attr_version);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -849,6 +862,8 @@ static void pef2256_remove(struct platform_device *pdev)</div><div class='ctx'> 	pef2256_write8(pef2256, PEF2256_IMR3, 0xff);</div><div class='ctx'> 	pef2256_write8(pef2256, PEF2256_IMR4, 0xff);</div><div class='ctx'> 	pef2256_write8(pef2256, PEF2256_IMR5, 0xff);</div><div class='add'>+</div><div class='add'>+	device_remove_file(pef2256-&gt;dev, &amp;dev_attr_version);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id pef2256_id_table[] = {</div><div class='head'>diff --git a/drivers/net/wan/hdlc_cisco.c b/drivers/net/wan/hdlc_cisco.c<br/>index cdebe65a7e2d..bfc978b15bc2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/hdlc_cisco.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/hdlc_cisco.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/hdlc_cisco.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wan/hdlc_cisco.c</a></div><div class='hunk'>@@ -244,7 +244,7 @@ rx_error:</div><div class='ctx'> </div><div class='ctx'> static void cisco_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct cisco_state *st = from_timer(st, t, timer);</div><div class='add'>+	struct cisco_state *st = timer_container_of(st, t, timer);</div><div class='ctx'> 	struct net_device *dev = st-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;st-&gt;lock);</div><div class='hunk'>@@ -285,7 +285,7 @@ static void cisco_stop(struct net_device *dev)</div><div class='ctx'> 	struct cisco_state *st = state(hdlc);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;st-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;st-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;st-&gt;lock, flags);</div><div class='ctx'> 	netif_dormant_on(dev);</div><div class='head'>diff --git a/drivers/net/wan/hdlc_fr.c b/drivers/net/wan/hdlc_fr.c<br/>index 81e72bc1891f..08a0ba5ca471 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/hdlc_fr.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/hdlc_fr.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/hdlc_fr.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wan/hdlc_fr.c</a></div><div class='hunk'>@@ -581,7 +581,7 @@ static void fr_set_link_state(int reliable, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void fr_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct frad_state *st = from_timer(st, t, timer);</div><div class='add'>+	struct frad_state *st = timer_container_of(st, t, timer);</div><div class='ctx'> 	struct net_device *dev = st-&gt;dev;</div><div class='ctx'> 	hdlc_device *hdlc = dev_to_hdlc(dev);</div><div class='ctx'> 	int i, cnt = 0, reliable;</div><div class='hunk'>@@ -1025,7 +1025,7 @@ static void fr_stop(struct net_device *dev)</div><div class='ctx'> 	printk(KERN_DEBUG "fr_stop\n");</div><div class='ctx'> #endif</div><div class='ctx'> 	if (state(hdlc)-&gt;settings.lmi != LMI_NONE)</div><div class='del'>-		del_timer_sync(&amp;state(hdlc)-&gt;timer);</div><div class='add'>+		timer_delete_sync(&amp;state(hdlc)-&gt;timer);</div><div class='ctx'> 	fr_set_link_state(0, dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wan/hdlc_ppp.c b/drivers/net/wan/hdlc_ppp.c<br/>index 37a3c989cba1..159295c4bd6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/hdlc_ppp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/hdlc_ppp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/hdlc_ppp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wan/hdlc_ppp.c</a></div><div class='hunk'>@@ -126,14 +126,12 @@ static inline struct proto *get_proto(struct net_device *dev, u16 pid)</div><div class='ctx'> static inline const char *proto_name(u16 pid)</div><div class='ctx'> {</div><div class='ctx'> 	switch (pid) {</div><div class='del'>-	case PID_LCP:</div><div class='del'>-		return "LCP";</div><div class='ctx'> 	case PID_IPCP:</div><div class='ctx'> 		return "IPCP";</div><div class='ctx'> 	case PID_IPV6CP:</div><div class='ctx'> 		return "IPV6CP";</div><div class='ctx'> 	default:</div><div class='del'>-		return NULL;</div><div class='add'>+		return "LCP";</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -358,7 +356,7 @@ static void ppp_cp_event(struct net_device *dev, u16 pid, u16 event, u8 code,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (old_state != CLOSED &amp;&amp; proto-&gt;state == CLOSED)</div><div class='del'>-		del_timer(&amp;proto-&gt;timer);</div><div class='add'>+		timer_delete(&amp;proto-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> #if DEBUG_STATE</div><div class='ctx'> 	printk(KERN_DEBUG "%s: %s ppp_cp_event(%s) ... %s\n", dev-&gt;name,</div><div class='hunk'>@@ -561,7 +559,7 @@ out:</div><div class='ctx'> </div><div class='ctx'> static void ppp_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct proto *proto = from_timer(proto, t, timer);</div><div class='add'>+	struct proto *proto = timer_container_of(proto, t, timer);</div><div class='ctx'> 	struct ppp *ppp = get_ppp(proto-&gt;dev);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wan/lapbether.c b/drivers/net/wan/lapbether.c<br/>index 56326f38fe8a..f357a7ac70ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/lapbether.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wan/lapbether.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wan/lapbether.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wan/lapbether.c</a></div><div class='hunk'>@@ -39,6 +39,7 @@</div><div class='ctx'> #include &lt;linux/lapb.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> </div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/x25device.h&gt;</div><div class='ctx'> </div><div class='ctx'> static const u8 bcast_addr[6] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };</div><div class='hunk'>@@ -80,7 +81,7 @@ static struct lapbethdev *lapbeth_get_x25_dev(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static __inline__ int dev_is_ethdev(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	return dev-&gt;type == ARPHRD_ETHER &amp;&amp; strncmp(dev-&gt;name, "dummy", 5);</div><div class='add'>+	return dev-&gt;type == ARPHRD_ETHER &amp;&amp; !netdev_need_ops_lock(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ------------------------------------------------------------------------ */</div><div class='hunk'>@@ -366,6 +367,7 @@ static const struct net_device_ops lapbeth_netdev_ops = {</div><div class='ctx'> </div><div class='ctx'> static void lapbeth_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	netdev_lockdep_set_classes(dev);</div><div class='ctx'> 	dev-&gt;netdev_ops	     = &amp;lapbeth_netdev_ops;</div><div class='ctx'> 	dev-&gt;needs_free_netdev = true;</div><div class='ctx'> 	dev-&gt;type            = ARPHRD_X25;</div><div class='head'>diff --git a/drivers/net/wireguard/Makefile b/drivers/net/wireguard/Makefile<br/>index dbe1f8514efc..00cbcc9ab69d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/Makefile</a></div><div class='hunk'>@@ -13,5 +13,5 @@ wireguard-y += peerlookup.o</div><div class='ctx'> wireguard-y += allowedips.o</div><div class='ctx'> wireguard-y += ratelimiter.o</div><div class='ctx'> wireguard-y += cookie.o</div><div class='del'>-wireguard-y += netlink.o</div><div class='add'>+wireguard-y += netlink.o generated/netlink.o</div><div class='ctx'> obj-$(CONFIG_WIREGUARD) := wireguard.o</div><div class='head'>diff --git a/drivers/net/wireguard/allowedips.c b/drivers/net/wireguard/allowedips.c<br/>index 4b8528206cc8..09f7fcd7da78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/allowedips.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/allowedips.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/allowedips.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/allowedips.c</a></div><div class='hunk'>@@ -249,6 +249,52 @@ static int add(struct allowedips_node __rcu **trie, u8 bits, const u8 *key,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void remove_node(struct allowedips_node *node, struct mutex *lock)</div><div class='add'>+{</div><div class='add'>+	struct allowedips_node *child, **parent_bit, *parent;</div><div class='add'>+	bool free_parent;</div><div class='add'>+</div><div class='add'>+	list_del_init(&amp;node-&gt;peer_list);</div><div class='add'>+	RCU_INIT_POINTER(node-&gt;peer, NULL);</div><div class='add'>+	if (node-&gt;bit[0] &amp;&amp; node-&gt;bit[1])</div><div class='add'>+		return;</div><div class='add'>+	child = rcu_dereference_protected(node-&gt;bit[!rcu_access_pointer(node-&gt;bit[0])],</div><div class='add'>+					  lockdep_is_held(lock));</div><div class='add'>+	if (child)</div><div class='add'>+		child-&gt;parent_bit_packed = node-&gt;parent_bit_packed;</div><div class='add'>+	parent_bit = (struct allowedips_node **)(node-&gt;parent_bit_packed &amp; ~3UL);</div><div class='add'>+	*parent_bit = child;</div><div class='add'>+	parent = (void *)parent_bit -</div><div class='add'>+			offsetof(struct allowedips_node, bit[node-&gt;parent_bit_packed &amp; 1]);</div><div class='add'>+	free_parent = !rcu_access_pointer(node-&gt;bit[0]) &amp;&amp; !rcu_access_pointer(node-&gt;bit[1]) &amp;&amp;</div><div class='add'>+			(node-&gt;parent_bit_packed &amp; 3) &lt;= 1 &amp;&amp; !rcu_access_pointer(parent-&gt;peer);</div><div class='add'>+	if (free_parent)</div><div class='add'>+		child = rcu_dereference_protected(parent-&gt;bit[!(node-&gt;parent_bit_packed &amp; 1)],</div><div class='add'>+						  lockdep_is_held(lock));</div><div class='add'>+	call_rcu(&amp;node-&gt;rcu, node_free_rcu);</div><div class='add'>+	if (!free_parent)</div><div class='add'>+		return;</div><div class='add'>+	if (child)</div><div class='add'>+		child-&gt;parent_bit_packed = parent-&gt;parent_bit_packed;</div><div class='add'>+	*(struct allowedips_node **)(parent-&gt;parent_bit_packed &amp; ~3UL) = child;</div><div class='add'>+	call_rcu(&amp;parent-&gt;rcu, node_free_rcu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int remove(struct allowedips_node __rcu **trie, u8 bits, const u8 *key,</div><div class='add'>+		  u8 cidr, struct wg_peer *peer, struct mutex *lock)</div><div class='add'>+{</div><div class='add'>+	struct allowedips_node *node;</div><div class='add'>+</div><div class='add'>+	if (unlikely(cidr &gt; bits))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (!rcu_access_pointer(*trie) || !node_placement(*trie, key, cidr, bits, &amp;node, lock) ||</div><div class='add'>+	    peer != rcu_access_pointer(node-&gt;peer))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	remove_node(node, lock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void wg_allowedips_init(struct allowedips *table)</div><div class='ctx'> {</div><div class='ctx'> 	table-&gt;root4 = table-&gt;root6 = NULL;</div><div class='hunk'>@@ -300,44 +346,38 @@ int wg_allowedips_insert_v6(struct allowedips *table, const struct in6_addr *ip,</div><div class='ctx'> 	return add(&amp;table-&gt;root6, 128, key, cidr, peer, lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int wg_allowedips_remove_v4(struct allowedips *table, const struct in_addr *ip,</div><div class='add'>+			    u8 cidr, struct wg_peer *peer, struct mutex *lock)</div><div class='add'>+{</div><div class='add'>+	/* Aligned so it can be passed to fls */</div><div class='add'>+	u8 key[4] __aligned(__alignof(u32));</div><div class='add'>+</div><div class='add'>+	++table-&gt;seq;</div><div class='add'>+	swap_endian(key, (const u8 *)ip, 32);</div><div class='add'>+	return remove(&amp;table-&gt;root4, 32, key, cidr, peer, lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int wg_allowedips_remove_v6(struct allowedips *table, const struct in6_addr *ip,</div><div class='add'>+			    u8 cidr, struct wg_peer *peer, struct mutex *lock)</div><div class='add'>+{</div><div class='add'>+	/* Aligned so it can be passed to fls64 */</div><div class='add'>+	u8 key[16] __aligned(__alignof(u64));</div><div class='add'>+</div><div class='add'>+	++table-&gt;seq;</div><div class='add'>+	swap_endian(key, (const u8 *)ip, 128);</div><div class='add'>+	return remove(&amp;table-&gt;root6, 128, key, cidr, peer, lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void wg_allowedips_remove_by_peer(struct allowedips *table,</div><div class='ctx'> 				  struct wg_peer *peer, struct mutex *lock)</div><div class='ctx'> {</div><div class='del'>-	struct allowedips_node *node, *child, **parent_bit, *parent, *tmp;</div><div class='del'>-	bool free_parent;</div><div class='add'>+	struct allowedips_node *node, *tmp;</div><div class='ctx'> </div><div class='ctx'> 	if (list_empty(&amp;peer-&gt;allowedips_list))</div><div class='ctx'> 		return;</div><div class='ctx'> 	++table-&gt;seq;</div><div class='del'>-	list_for_each_entry_safe(node, tmp, &amp;peer-&gt;allowedips_list, peer_list) {</div><div class='del'>-		list_del_init(&amp;node-&gt;peer_list);</div><div class='del'>-		RCU_INIT_POINTER(node-&gt;peer, NULL);</div><div class='del'>-		if (node-&gt;bit[0] &amp;&amp; node-&gt;bit[1])</div><div class='del'>-			continue;</div><div class='del'>-		child = rcu_dereference_protected(node-&gt;bit[!rcu_access_pointer(node-&gt;bit[0])],</div><div class='del'>-						  lockdep_is_held(lock));</div><div class='del'>-		if (child)</div><div class='del'>-			child-&gt;parent_bit_packed = node-&gt;parent_bit_packed;</div><div class='del'>-		parent_bit = (struct allowedips_node **)(node-&gt;parent_bit_packed &amp; ~3UL);</div><div class='del'>-		*parent_bit = child;</div><div class='del'>-		parent = (void *)parent_bit -</div><div class='del'>-			 offsetof(struct allowedips_node, bit[node-&gt;parent_bit_packed &amp; 1]);</div><div class='del'>-		free_parent = !rcu_access_pointer(node-&gt;bit[0]) &amp;&amp;</div><div class='del'>-			      !rcu_access_pointer(node-&gt;bit[1]) &amp;&amp;</div><div class='del'>-			      (node-&gt;parent_bit_packed &amp; 3) &lt;= 1 &amp;&amp;</div><div class='del'>-			      !rcu_access_pointer(parent-&gt;peer);</div><div class='del'>-		if (free_parent)</div><div class='del'>-			child = rcu_dereference_protected(</div><div class='del'>-					parent-&gt;bit[!(node-&gt;parent_bit_packed &amp; 1)],</div><div class='del'>-					lockdep_is_held(lock));</div><div class='del'>-		call_rcu(&amp;node-&gt;rcu, node_free_rcu);</div><div class='del'>-		if (!free_parent)</div><div class='del'>-			continue;</div><div class='del'>-		if (child)</div><div class='del'>-			child-&gt;parent_bit_packed = parent-&gt;parent_bit_packed;</div><div class='del'>-		*(struct allowedips_node **)(parent-&gt;parent_bit_packed &amp; ~3UL) = child;</div><div class='del'>-		call_rcu(&amp;parent-&gt;rcu, node_free_rcu);</div><div class='del'>-	}</div><div class='add'>+	list_for_each_entry_safe(node, tmp, &amp;peer-&gt;allowedips_list, peer_list)</div><div class='add'>+		remove_node(node, lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int wg_allowedips_read_node(struct allowedips_node *node, u8 ip[16], u8 *cidr)</div><div class='head'>diff --git a/drivers/net/wireguard/allowedips.h b/drivers/net/wireguard/allowedips.h<br/>index 2346c797eb4d..931958cb6e10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/allowedips.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/allowedips.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/allowedips.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/allowedips.h</a></div><div class='hunk'>@@ -38,6 +38,10 @@ int wg_allowedips_insert_v4(struct allowedips *table, const struct in_addr *ip,</div><div class='ctx'> 			    u8 cidr, struct wg_peer *peer, struct mutex *lock);</div><div class='ctx'> int wg_allowedips_insert_v6(struct allowedips *table, const struct in6_addr *ip,</div><div class='ctx'> 			    u8 cidr, struct wg_peer *peer, struct mutex *lock);</div><div class='add'>+int wg_allowedips_remove_v4(struct allowedips *table, const struct in_addr *ip,</div><div class='add'>+			    u8 cidr, struct wg_peer *peer, struct mutex *lock);</div><div class='add'>+int wg_allowedips_remove_v6(struct allowedips *table, const struct in6_addr *ip,</div><div class='add'>+			    u8 cidr, struct wg_peer *peer, struct mutex *lock);</div><div class='ctx'> void wg_allowedips_remove_by_peer(struct allowedips *table,</div><div class='ctx'> 				  struct wg_peer *peer, struct mutex *lock);</div><div class='ctx'> /* The ip input pointer should be __aligned(__alignof(u64))) */</div><div class='head'>diff --git a/drivers/net/wireguard/cookie.c b/drivers/net/wireguard/cookie.c<br/>index f89581b5e8cb..08731b3fa32b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/cookie.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/cookie.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/cookie.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/cookie.c</a></div><div class='hunk'>@@ -26,14 +26,14 @@ void wg_cookie_checker_init(struct cookie_checker *checker,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> enum { COOKIE_KEY_LABEL_LEN = 8 };</div><div class='del'>-static const u8 mac1_key_label[COOKIE_KEY_LABEL_LEN] = "mac1----";</div><div class='del'>-static const u8 cookie_key_label[COOKIE_KEY_LABEL_LEN] = "cookie--";</div><div class='add'>+static const u8 mac1_key_label[COOKIE_KEY_LABEL_LEN] __nonstring = "mac1----";</div><div class='add'>+static const u8 cookie_key_label[COOKIE_KEY_LABEL_LEN] __nonstring = "cookie--";</div><div class='ctx'> </div><div class='ctx'> static void precompute_key(u8 key[NOISE_SYMMETRIC_KEY_LEN],</div><div class='ctx'> 			   const u8 pubkey[NOISE_PUBLIC_KEY_LEN],</div><div class='ctx'> 			   const u8 label[COOKIE_KEY_LABEL_LEN])</div><div class='ctx'> {</div><div class='del'>-	struct blake2s_state blake;</div><div class='add'>+	struct blake2s_ctx blake;</div><div class='ctx'> </div><div class='ctx'> 	blake2s_init(&amp;blake, NOISE_SYMMETRIC_KEY_LEN);</div><div class='ctx'> 	blake2s_update(&amp;blake, label, COOKIE_KEY_LABEL_LEN);</div><div class='hunk'>@@ -77,7 +77,7 @@ static void compute_mac1(u8 mac1[COOKIE_LEN], const void *message, size_t len,</div><div class='ctx'> {</div><div class='ctx'> 	len = len - sizeof(struct message_macs) +</div><div class='ctx'> 	      offsetof(struct message_macs, mac1);</div><div class='del'>-	blake2s(mac1, message, key, COOKIE_LEN, len, NOISE_SYMMETRIC_KEY_LEN);</div><div class='add'>+	blake2s(key, NOISE_SYMMETRIC_KEY_LEN, message, len, mac1, COOKIE_LEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void compute_mac2(u8 mac2[COOKIE_LEN], const void *message, size_t len,</div><div class='hunk'>@@ -85,13 +85,13 @@ static void compute_mac2(u8 mac2[COOKIE_LEN], const void *message, size_t len,</div><div class='ctx'> {</div><div class='ctx'> 	len = len - sizeof(struct message_macs) +</div><div class='ctx'> 	      offsetof(struct message_macs, mac2);</div><div class='del'>-	blake2s(mac2, message, cookie, COOKIE_LEN, len, COOKIE_LEN);</div><div class='add'>+	blake2s(cookie, COOKIE_LEN, message, len, mac2, COOKIE_LEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void make_cookie(u8 cookie[COOKIE_LEN], struct sk_buff *skb,</div><div class='ctx'> 			struct cookie_checker *checker)</div><div class='ctx'> {</div><div class='del'>-	struct blake2s_state state;</div><div class='add'>+	struct blake2s_ctx blake;</div><div class='ctx'> </div><div class='ctx'> 	if (wg_birthdate_has_expired(checker-&gt;secret_birthdate,</div><div class='ctx'> 				     COOKIE_SECRET_MAX_AGE)) {</div><div class='hunk'>@@ -103,15 +103,15 @@ static void make_cookie(u8 cookie[COOKIE_LEN], struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	down_read(&amp;checker-&gt;secret_lock);</div><div class='ctx'> </div><div class='del'>-	blake2s_init_key(&amp;state, COOKIE_LEN, checker-&gt;secret, NOISE_HASH_LEN);</div><div class='add'>+	blake2s_init_key(&amp;blake, COOKIE_LEN, checker-&gt;secret, NOISE_HASH_LEN);</div><div class='ctx'> 	if (skb-&gt;protocol == htons(ETH_P_IP))</div><div class='del'>-		blake2s_update(&amp;state, (u8 *)&amp;ip_hdr(skb)-&gt;saddr,</div><div class='add'>+		blake2s_update(&amp;blake, (u8 *)&amp;ip_hdr(skb)-&gt;saddr,</div><div class='ctx'> 			       sizeof(struct in_addr));</div><div class='ctx'> 	else if (skb-&gt;protocol == htons(ETH_P_IPV6))</div><div class='del'>-		blake2s_update(&amp;state, (u8 *)&amp;ipv6_hdr(skb)-&gt;saddr,</div><div class='add'>+		blake2s_update(&amp;blake, (u8 *)&amp;ipv6_hdr(skb)-&gt;saddr,</div><div class='ctx'> 			       sizeof(struct in6_addr));</div><div class='del'>-	blake2s_update(&amp;state, (u8 *)&amp;udp_hdr(skb)-&gt;source, sizeof(__be16));</div><div class='del'>-	blake2s_final(&amp;state, cookie);</div><div class='add'>+	blake2s_update(&amp;blake, (u8 *)&amp;udp_hdr(skb)-&gt;source, sizeof(__be16));</div><div class='add'>+	blake2s_final(&amp;blake, cookie);</div><div class='ctx'> </div><div class='ctx'> 	up_read(&amp;checker-&gt;secret_lock);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireguard/device.c b/drivers/net/wireguard/device.c<br/>index 45e9b908dbfb..46a71ec36af8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/device.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/device.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/device.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/device.c</a></div><div class='hunk'>@@ -81,7 +81,7 @@ static int wg_pm_notification(struct notifier_block *nb, unsigned long action, v</div><div class='ctx'> 	list_for_each_entry(wg, &amp;device_list, device_list) {</div><div class='ctx'> 		mutex_lock(&amp;wg-&gt;device_update_lock);</div><div class='ctx'> 		list_for_each_entry(peer, &amp;wg-&gt;peer_list, peer_list) {</div><div class='del'>-			del_timer(&amp;peer-&gt;timer_zero_key_material);</div><div class='add'>+			timer_delete(&amp;peer-&gt;timer_zero_key_material);</div><div class='ctx'> 			wg_noise_handshake_clear(&amp;peer-&gt;handshake);</div><div class='ctx'> 			wg_noise_keypairs_clear(&amp;peer-&gt;keypairs);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -302,18 +302,20 @@ static void wg_setup(struct net_device *dev)</div><div class='ctx'> 	/* We need to keep the dst around in case of icmp replies. */</div><div class='ctx'> 	netif_keep_dst(dev);</div><div class='ctx'> </div><div class='del'>-	memset(wg, 0, sizeof(*wg));</div><div class='add'>+	netif_set_tso_max_size(dev, GSO_MAX_SIZE);</div><div class='add'>+</div><div class='ctx'> 	wg-&gt;dev = dev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wg_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-		      struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+static int wg_newlink(struct net_device *dev,</div><div class='add'>+		      struct rtnl_newlink_params *params,</div><div class='ctx'> 		      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='ctx'> 	struct wg_device *wg = netdev_priv(dev);</div><div class='ctx'> 	int ret = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	rcu_assign_pointer(wg-&gt;creating_net, src_net);</div><div class='add'>+	rcu_assign_pointer(wg-&gt;creating_net, link_net);</div><div class='ctx'> 	init_rwsem(&amp;wg-&gt;static_identity.lock);</div><div class='ctx'> 	mutex_init(&amp;wg-&gt;socket_update_lock);</div><div class='ctx'> 	mutex_init(&amp;wg-&gt;device_update_lock);</div><div class='hunk'>@@ -331,7 +333,8 @@ static int wg_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 		goto err_free_peer_hashtable;</div><div class='ctx'> </div><div class='ctx'> 	wg-&gt;handshake_receive_wq = alloc_workqueue("wg-kex-%s",</div><div class='del'>-			WQ_CPU_INTENSIVE | WQ_FREEZABLE, 0, dev-&gt;name);</div><div class='add'>+			WQ_CPU_INTENSIVE | WQ_FREEZABLE | WQ_PERCPU, 0,</div><div class='add'>+			dev-&gt;name);</div><div class='ctx'> 	if (!wg-&gt;handshake_receive_wq)</div><div class='ctx'> 		goto err_free_index_hashtable;</div><div class='ctx'> </div><div class='hunk'>@@ -341,7 +344,8 @@ static int wg_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 		goto err_destroy_handshake_receive;</div><div class='ctx'> </div><div class='ctx'> 	wg-&gt;packet_crypt_wq = alloc_workqueue("wg-crypt-%s",</div><div class='del'>-			WQ_CPU_INTENSIVE | WQ_MEM_RECLAIM, 0, dev-&gt;name);</div><div class='add'>+			WQ_CPU_INTENSIVE | WQ_MEM_RECLAIM | WQ_PERCPU, 0,</div><div class='add'>+			dev-&gt;name);</div><div class='ctx'> 	if (!wg-&gt;packet_crypt_wq)</div><div class='ctx'> 		goto err_destroy_handshake_send;</div><div class='ctx'> </div><div class='hunk'>@@ -364,6 +368,7 @@ static int wg_newlink(struct net *src_net, struct net_device *dev,</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto err_free_handshake_queue;</div><div class='ctx'> </div><div class='add'>+	netif_threaded_enable(dev);</div><div class='ctx'> 	ret = register_netdevice(dev);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		goto err_uninit_ratelimiter;</div><div class='head'>diff --git a/drivers/net/wireguard/generated/netlink.c b/drivers/net/wireguard/generated/netlink.c<br/>new file mode 100644<br/>index 000000000000..3ef8c29908c2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/generated/netlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/generated/netlink.c</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+// SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+/* Do not edit directly, auto-generated from: */</div><div class='add'>+/*	Documentation/netlink/specs/wireguard.yaml */</div><div class='add'>+/* YNL-GEN kernel source */</div><div class='add'>+/* YNL-ARG --function-prefix wg */</div><div class='add'>+/* To regenerate run: tools/net/ynl/ynl-regen.sh */</div><div class='add'>+</div><div class='add'>+#include &lt;net/netlink.h&gt;</div><div class='add'>+#include &lt;net/genetlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "netlink.h"</div><div class='add'>+</div><div class='add'>+#include &lt;uapi/linux/wireguard.h&gt;</div><div class='add'>+#include &lt;linux/time_types.h&gt;</div><div class='add'>+</div><div class='add'>+/* Common nested types */</div><div class='add'>+const struct nla_policy wireguard_wgallowedip_nl_policy[WGALLOWEDIP_A_FLAGS + 1] = {</div><div class='add'>+	[WGALLOWEDIP_A_FAMILY] = { .type = NLA_U16, },</div><div class='add'>+	[WGALLOWEDIP_A_IPADDR] = NLA_POLICY_MIN_LEN(4),</div><div class='add'>+	[WGALLOWEDIP_A_CIDR_MASK] = { .type = NLA_U8, },</div><div class='add'>+	[WGALLOWEDIP_A_FLAGS] = NLA_POLICY_MASK(NLA_U32, 0x1),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct nla_policy wireguard_wgpeer_nl_policy[WGPEER_A_PROTOCOL_VERSION + 1] = {</div><div class='add'>+	[WGPEER_A_PUBLIC_KEY] = NLA_POLICY_EXACT_LEN(WG_KEY_LEN),</div><div class='add'>+	[WGPEER_A_PRESHARED_KEY] = NLA_POLICY_EXACT_LEN(WG_KEY_LEN),</div><div class='add'>+	[WGPEER_A_FLAGS] = NLA_POLICY_MASK(NLA_U32, 0x7),</div><div class='add'>+	[WGPEER_A_ENDPOINT] = NLA_POLICY_MIN_LEN(16),</div><div class='add'>+	[WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL] = { .type = NLA_U16, },</div><div class='add'>+	[WGPEER_A_LAST_HANDSHAKE_TIME] = NLA_POLICY_EXACT_LEN(16),</div><div class='add'>+	[WGPEER_A_RX_BYTES] = { .type = NLA_U64, },</div><div class='add'>+	[WGPEER_A_TX_BYTES] = { .type = NLA_U64, },</div><div class='add'>+	[WGPEER_A_ALLOWEDIPS] = NLA_POLICY_NESTED_ARRAY(wireguard_wgallowedip_nl_policy),</div><div class='add'>+	[WGPEER_A_PROTOCOL_VERSION] = { .type = NLA_U32, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* WG_CMD_GET_DEVICE - dump */</div><div class='add'>+static const struct nla_policy wireguard_get_device_nl_policy[WGDEVICE_A_IFNAME + 1] = {</div><div class='add'>+	[WGDEVICE_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+	[WGDEVICE_A_IFNAME] = { .type = NLA_NUL_STRING, .len = 15, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* WG_CMD_SET_DEVICE - do */</div><div class='add'>+static const struct nla_policy wireguard_set_device_nl_policy[WGDEVICE_A_PEERS + 1] = {</div><div class='add'>+	[WGDEVICE_A_IFINDEX] = { .type = NLA_U32, },</div><div class='add'>+	[WGDEVICE_A_IFNAME] = { .type = NLA_NUL_STRING, .len = 15, },</div><div class='add'>+	[WGDEVICE_A_PRIVATE_KEY] = NLA_POLICY_EXACT_LEN(WG_KEY_LEN),</div><div class='add'>+	[WGDEVICE_A_PUBLIC_KEY] = NLA_POLICY_EXACT_LEN(WG_KEY_LEN),</div><div class='add'>+	[WGDEVICE_A_FLAGS] = NLA_POLICY_MASK(NLA_U32, 0x1),</div><div class='add'>+	[WGDEVICE_A_LISTEN_PORT] = { .type = NLA_U16, },</div><div class='add'>+	[WGDEVICE_A_FWMARK] = { .type = NLA_U32, },</div><div class='add'>+	[WGDEVICE_A_PEERS] = NLA_POLICY_NESTED_ARRAY(wireguard_wgpeer_nl_policy),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Ops table for wireguard */</div><div class='add'>+const struct genl_split_ops wireguard_nl_ops[2] = {</div><div class='add'>+	{</div><div class='add'>+		.cmd		= WG_CMD_GET_DEVICE,</div><div class='add'>+		.start		= wg_get_device_start,</div><div class='add'>+		.dumpit		= wg_get_device_dumpit,</div><div class='add'>+		.done		= wg_get_device_done,</div><div class='add'>+		.policy		= wireguard_get_device_nl_policy,</div><div class='add'>+		.maxattr	= WGDEVICE_A_IFNAME,</div><div class='add'>+		.flags		= GENL_UNS_ADMIN_PERM | GENL_CMD_CAP_DUMP,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.cmd		= WG_CMD_SET_DEVICE,</div><div class='add'>+		.doit		= wg_set_device_doit,</div><div class='add'>+		.policy		= wireguard_set_device_nl_policy,</div><div class='add'>+		.maxattr	= WGDEVICE_A_PEERS,</div><div class='add'>+		.flags		= GENL_UNS_ADMIN_PERM | GENL_CMD_CAP_DO,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/wireguard/generated/netlink.h b/drivers/net/wireguard/generated/netlink.h<br/>new file mode 100644<br/>index 000000000000..5dc977ee9e7c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/generated/netlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/generated/netlink.h</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */</div><div class='add'>+/* Do not edit directly, auto-generated from: */</div><div class='add'>+/*	Documentation/netlink/specs/wireguard.yaml */</div><div class='add'>+/* YNL-GEN kernel header */</div><div class='add'>+/* YNL-ARG --function-prefix wg */</div><div class='add'>+/* To regenerate run: tools/net/ynl/ynl-regen.sh */</div><div class='add'>+</div><div class='add'>+#ifndef _LINUX_WIREGUARD_GEN_H</div><div class='add'>+#define _LINUX_WIREGUARD_GEN_H</div><div class='add'>+</div><div class='add'>+#include &lt;net/netlink.h&gt;</div><div class='add'>+#include &lt;net/genetlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;uapi/linux/wireguard.h&gt;</div><div class='add'>+#include &lt;linux/time_types.h&gt;</div><div class='add'>+</div><div class='add'>+/* Common nested types */</div><div class='add'>+extern const struct nla_policy wireguard_wgallowedip_nl_policy[WGALLOWEDIP_A_FLAGS + 1];</div><div class='add'>+extern const struct nla_policy wireguard_wgpeer_nl_policy[WGPEER_A_PROTOCOL_VERSION + 1];</div><div class='add'>+</div><div class='add'>+/* Ops table for wireguard */</div><div class='add'>+extern const struct genl_split_ops wireguard_nl_ops[2];</div><div class='add'>+</div><div class='add'>+int wg_get_device_start(struct netlink_callback *cb);</div><div class='add'>+int wg_get_device_done(struct netlink_callback *cb);</div><div class='add'>+</div><div class='add'>+int wg_get_device_dumpit(struct sk_buff *skb, struct netlink_callback *cb);</div><div class='add'>+int wg_set_device_doit(struct sk_buff *skb, struct genl_info *info);</div><div class='add'>+</div><div class='add'>+#endif /* _LINUX_WIREGUARD_GEN_H */</div><div class='head'>diff --git a/drivers/net/wireguard/netlink.c b/drivers/net/wireguard/netlink.c<br/>index f7055180ba4a..1da7e98d0d50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/netlink.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/netlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/netlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/netlink.c</a></div><div class='hunk'>@@ -9,6 +9,7 @@</div><div class='ctx'> #include "socket.h"</div><div class='ctx'> #include "queueing.h"</div><div class='ctx'> #include "messages.h"</div><div class='add'>+#include "generated/netlink.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;uapi/linux/wireguard.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -19,36 +20,6 @@</div><div class='ctx'> </div><div class='ctx'> static struct genl_family genl_family;</div><div class='ctx'> </div><div class='del'>-static const struct nla_policy device_policy[WGDEVICE_A_MAX + 1] = {</div><div class='del'>-	[WGDEVICE_A_IFINDEX]		= { .type = NLA_U32 },</div><div class='del'>-	[WGDEVICE_A_IFNAME]		= { .type = NLA_NUL_STRING, .len = IFNAMSIZ - 1 },</div><div class='del'>-	[WGDEVICE_A_PRIVATE_KEY]	= NLA_POLICY_EXACT_LEN(NOISE_PUBLIC_KEY_LEN),</div><div class='del'>-	[WGDEVICE_A_PUBLIC_KEY]		= NLA_POLICY_EXACT_LEN(NOISE_PUBLIC_KEY_LEN),</div><div class='del'>-	[WGDEVICE_A_FLAGS]		= { .type = NLA_U32 },</div><div class='del'>-	[WGDEVICE_A_LISTEN_PORT]	= { .type = NLA_U16 },</div><div class='del'>-	[WGDEVICE_A_FWMARK]		= { .type = NLA_U32 },</div><div class='del'>-	[WGDEVICE_A_PEERS]		= { .type = NLA_NESTED }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct nla_policy peer_policy[WGPEER_A_MAX + 1] = {</div><div class='del'>-	[WGPEER_A_PUBLIC_KEY]				= NLA_POLICY_EXACT_LEN(NOISE_PUBLIC_KEY_LEN),</div><div class='del'>-	[WGPEER_A_PRESHARED_KEY]			= NLA_POLICY_EXACT_LEN(NOISE_SYMMETRIC_KEY_LEN),</div><div class='del'>-	[WGPEER_A_FLAGS]				= { .type = NLA_U32 },</div><div class='del'>-	[WGPEER_A_ENDPOINT]				= NLA_POLICY_MIN_LEN(sizeof(struct sockaddr)),</div><div class='del'>-	[WGPEER_A_PERSISTENT_KEEPALIVE_INTERVAL]	= { .type = NLA_U16 },</div><div class='del'>-	[WGPEER_A_LAST_HANDSHAKE_TIME]			= NLA_POLICY_EXACT_LEN(sizeof(struct __kernel_timespec)),</div><div class='del'>-	[WGPEER_A_RX_BYTES]				= { .type = NLA_U64 },</div><div class='del'>-	[WGPEER_A_TX_BYTES]				= { .type = NLA_U64 },</div><div class='del'>-	[WGPEER_A_ALLOWEDIPS]				= { .type = NLA_NESTED },</div><div class='del'>-	[WGPEER_A_PROTOCOL_VERSION]			= { .type = NLA_U32 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct nla_policy allowedip_policy[WGALLOWEDIP_A_MAX + 1] = {</div><div class='del'>-	[WGALLOWEDIP_A_FAMILY]		= { .type = NLA_U16 },</div><div class='del'>-	[WGALLOWEDIP_A_IPADDR]		= NLA_POLICY_MIN_LEN(sizeof(struct in_addr)),</div><div class='del'>-	[WGALLOWEDIP_A_CIDR_MASK]	= { .type = NLA_U8 }</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct wg_device *lookup_interface(struct nlattr **attrs,</div><div class='ctx'> 					  struct sk_buff *skb)</div><div class='ctx'> {</div><div class='hunk'>@@ -196,7 +167,7 @@ err:</div><div class='ctx'> 	return -EMSGSIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wg_get_device_start(struct netlink_callback *cb)</div><div class='add'>+int wg_get_device_start(struct netlink_callback *cb)</div><div class='ctx'> {</div><div class='ctx'> 	struct wg_device *wg;</div><div class='ctx'> </div><div class='hunk'>@@ -207,7 +178,7 @@ static int wg_get_device_start(struct netlink_callback *cb)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wg_get_device_dump(struct sk_buff *skb, struct netlink_callback *cb)</div><div class='add'>+int wg_get_device_dumpit(struct sk_buff *skb, struct netlink_callback *cb)</div><div class='ctx'> {</div><div class='ctx'> 	struct wg_peer *peer, *next_peer_cursor;</div><div class='ctx'> 	struct dump_ctx *ctx = DUMP_CTX(cb);</div><div class='hunk'>@@ -301,7 +272,7 @@ out:</div><div class='ctx'> 	 */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wg_get_device_done(struct netlink_callback *cb)</div><div class='add'>+int wg_get_device_done(struct netlink_callback *cb)</div><div class='ctx'> {</div><div class='ctx'> 	struct dump_ctx *ctx = DUMP_CTX(cb);</div><div class='ctx'> </div><div class='hunk'>@@ -329,6 +300,7 @@ static int set_port(struct wg_device *wg, u16 port)</div><div class='ctx'> static int set_allowedip(struct wg_peer *peer, struct nlattr **attrs)</div><div class='ctx'> {</div><div class='ctx'> 	int ret = -EINVAL;</div><div class='add'>+	u32 flags = 0;</div><div class='ctx'> 	u16 family;</div><div class='ctx'> 	u8 cidr;</div><div class='ctx'> </div><div class='hunk'>@@ -337,19 +309,30 @@ static int set_allowedip(struct wg_peer *peer, struct nlattr **attrs)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	family = nla_get_u16(attrs[WGALLOWEDIP_A_FAMILY]);</div><div class='ctx'> 	cidr = nla_get_u8(attrs[WGALLOWEDIP_A_CIDR_MASK]);</div><div class='add'>+	if (attrs[WGALLOWEDIP_A_FLAGS])</div><div class='add'>+		flags = nla_get_u32(attrs[WGALLOWEDIP_A_FLAGS]);</div><div class='ctx'> </div><div class='ctx'> 	if (family == AF_INET &amp;&amp; cidr &lt;= 32 &amp;&amp;</div><div class='del'>-	    nla_len(attrs[WGALLOWEDIP_A_IPADDR]) == sizeof(struct in_addr))</div><div class='del'>-		ret = wg_allowedips_insert_v4(</div><div class='del'>-			&amp;peer-&gt;device-&gt;peer_allowedips,</div><div class='del'>-			nla_data(attrs[WGALLOWEDIP_A_IPADDR]), cidr, peer,</div><div class='del'>-			&amp;peer-&gt;device-&gt;device_update_lock);</div><div class='del'>-	else if (family == AF_INET6 &amp;&amp; cidr &lt;= 128 &amp;&amp;</div><div class='del'>-		 nla_len(attrs[WGALLOWEDIP_A_IPADDR]) == sizeof(struct in6_addr))</div><div class='del'>-		ret = wg_allowedips_insert_v6(</div><div class='del'>-			&amp;peer-&gt;device-&gt;peer_allowedips,</div><div class='del'>-			nla_data(attrs[WGALLOWEDIP_A_IPADDR]), cidr, peer,</div><div class='del'>-			&amp;peer-&gt;device-&gt;device_update_lock);</div><div class='add'>+	    nla_len(attrs[WGALLOWEDIP_A_IPADDR]) == sizeof(struct in_addr)) {</div><div class='add'>+		if (flags &amp; WGALLOWEDIP_F_REMOVE_ME)</div><div class='add'>+			ret = wg_allowedips_remove_v4(&amp;peer-&gt;device-&gt;peer_allowedips,</div><div class='add'>+						      nla_data(attrs[WGALLOWEDIP_A_IPADDR]), cidr,</div><div class='add'>+						      peer, &amp;peer-&gt;device-&gt;device_update_lock);</div><div class='add'>+		else</div><div class='add'>+			ret = wg_allowedips_insert_v4(&amp;peer-&gt;device-&gt;peer_allowedips,</div><div class='add'>+						      nla_data(attrs[WGALLOWEDIP_A_IPADDR]), cidr,</div><div class='add'>+						      peer, &amp;peer-&gt;device-&gt;device_update_lock);</div><div class='add'>+	} else if (family == AF_INET6 &amp;&amp; cidr &lt;= 128 &amp;&amp;</div><div class='add'>+		   nla_len(attrs[WGALLOWEDIP_A_IPADDR]) == sizeof(struct in6_addr)) {</div><div class='add'>+		if (flags &amp; WGALLOWEDIP_F_REMOVE_ME)</div><div class='add'>+			ret = wg_allowedips_remove_v6(&amp;peer-&gt;device-&gt;peer_allowedips,</div><div class='add'>+						      nla_data(attrs[WGALLOWEDIP_A_IPADDR]), cidr,</div><div class='add'>+						      peer, &amp;peer-&gt;device-&gt;device_update_lock);</div><div class='add'>+		else</div><div class='add'>+			ret = wg_allowedips_insert_v6(&amp;peer-&gt;device-&gt;peer_allowedips,</div><div class='add'>+						      nla_data(attrs[WGALLOWEDIP_A_IPADDR]), cidr,</div><div class='add'>+						      peer, &amp;peer-&gt;device-&gt;device_update_lock);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -373,9 +356,6 @@ static int set_peer(struct wg_device *wg, struct nlattr **attrs)</div><div class='ctx'> </div><div class='ctx'> 	if (attrs[WGPEER_A_FLAGS])</div><div class='ctx'> 		flags = nla_get_u32(attrs[WGPEER_A_FLAGS]);</div><div class='del'>-	ret = -EOPNOTSUPP;</div><div class='del'>-	if (flags &amp; ~__WGPEER_F_ALL)</div><div class='del'>-		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ret = -EPFNOSUPPORT;</div><div class='ctx'> 	if (attrs[WGPEER_A_PROTOCOL_VERSION]) {</div><div class='hunk'>@@ -457,7 +437,7 @@ static int set_peer(struct wg_device *wg, struct nlattr **attrs)</div><div class='ctx'> </div><div class='ctx'> 		nla_for_each_nested(attr, attrs[WGPEER_A_ALLOWEDIPS], rem) {</div><div class='ctx'> 			ret = nla_parse_nested(allowedip, WGALLOWEDIP_A_MAX,</div><div class='del'>-					       attr, allowedip_policy, NULL);</div><div class='add'>+					       attr, NULL, NULL);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			ret = set_allowedip(peer, allowedip);</div><div class='hunk'>@@ -490,7 +470,7 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int wg_set_device(struct sk_buff *skb, struct genl_info *info)</div><div class='add'>+int wg_set_device_doit(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct wg_device *wg = lookup_interface(info-&gt;attrs, skb);</div><div class='ctx'> 	u32 flags = 0;</div><div class='hunk'>@@ -506,9 +486,6 @@ static int wg_set_device(struct sk_buff *skb, struct genl_info *info)</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;attrs[WGDEVICE_A_FLAGS])</div><div class='ctx'> 		flags = nla_get_u32(info-&gt;attrs[WGDEVICE_A_FLAGS]);</div><div class='del'>-	ret = -EOPNOTSUPP;</div><div class='del'>-	if (flags &amp; ~__WGDEVICE_F_ALL)</div><div class='del'>-		goto out;</div><div class='ctx'> </div><div class='ctx'> 	if (info-&gt;attrs[WGDEVICE_A_LISTEN_PORT] || info-&gt;attrs[WGDEVICE_A_FWMARK]) {</div><div class='ctx'> 		struct net *net;</div><div class='hunk'>@@ -586,7 +563,7 @@ skip_set_private_key:</div><div class='ctx'> </div><div class='ctx'> 		nla_for_each_nested(attr, info-&gt;attrs[WGDEVICE_A_PEERS], rem) {</div><div class='ctx'> 			ret = nla_parse_nested(peer, WGPEER_A_MAX, attr,</div><div class='del'>-					       peer_policy, NULL);</div><div class='add'>+					       NULL, NULL);</div><div class='ctx'> 			if (ret &lt; 0)</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			ret = set_peer(wg, peer);</div><div class='hunk'>@@ -607,34 +584,20 @@ out_nodev:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct genl_ops genl_ops[] = {</div><div class='del'>-	{</div><div class='del'>-		.cmd = WG_CMD_GET_DEVICE,</div><div class='del'>-		.start = wg_get_device_start,</div><div class='del'>-		.dumpit = wg_get_device_dump,</div><div class='del'>-		.done = wg_get_device_done,</div><div class='del'>-		.flags = GENL_UNS_ADMIN_PERM</div><div class='del'>-	}, {</div><div class='del'>-		.cmd = WG_CMD_SET_DEVICE,</div><div class='del'>-		.doit = wg_set_device,</div><div class='del'>-		.flags = GENL_UNS_ADMIN_PERM</div><div class='del'>-	}</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static struct genl_family genl_family __ro_after_init = {</div><div class='del'>-	.ops = genl_ops,</div><div class='del'>-	.n_ops = ARRAY_SIZE(genl_ops),</div><div class='del'>-	.resv_start_op = WG_CMD_SET_DEVICE + 1,</div><div class='add'>+	.split_ops = wireguard_nl_ops,</div><div class='add'>+	.n_split_ops = ARRAY_SIZE(wireguard_nl_ops),</div><div class='ctx'> 	.name = WG_GENL_NAME,</div><div class='ctx'> 	.version = WG_GENL_VERSION,</div><div class='del'>-	.maxattr = WGDEVICE_A_MAX,</div><div class='ctx'> 	.module = THIS_MODULE,</div><div class='del'>-	.policy = device_policy,</div><div class='ctx'> 	.netnsok = true</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int __init wg_genetlink_init(void)</div><div class='ctx'> {</div><div class='add'>+	BUILD_BUG_ON(WG_KEY_LEN != NOISE_PUBLIC_KEY_LEN);</div><div class='add'>+	BUILD_BUG_ON(WG_KEY_LEN != NOISE_SYMMETRIC_KEY_LEN);</div><div class='add'>+</div><div class='ctx'> 	return genl_register_family(&amp;genl_family);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireguard/noise.c b/drivers/net/wireguard/noise.c<br/>index 202a33af5a72..1fe8468f0bef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/noise.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/noise.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/noise.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/noise.c</a></div><div class='hunk'>@@ -25,18 +25,18 @@</div><div class='ctx'>  * &lt;- e, ee, se, psk, {}</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static const u8 handshake_name[37] = "Noise_IKpsk2_25519_ChaChaPoly_BLAKE2s";</div><div class='del'>-static const u8 identifier_name[34] = "WireGuard v1 zx2c4 Jason@zx2c4.com";</div><div class='add'>+static const u8 handshake_name[37] __nonstring = "Noise_IKpsk2_25519_ChaChaPoly_BLAKE2s";</div><div class='add'>+static const u8 identifier_name[34] __nonstring = "WireGuard v1 zx2c4 Jason@zx2c4.com";</div><div class='ctx'> static u8 handshake_init_hash[NOISE_HASH_LEN] __ro_after_init;</div><div class='ctx'> static u8 handshake_init_chaining_key[NOISE_HASH_LEN] __ro_after_init;</div><div class='ctx'> static atomic64_t keypair_counter = ATOMIC64_INIT(0);</div><div class='ctx'> </div><div class='ctx'> void __init wg_noise_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct blake2s_state blake;</div><div class='add'>+	struct blake2s_ctx blake;</div><div class='ctx'> </div><div class='del'>-	blake2s(handshake_init_chaining_key, handshake_name, NULL,</div><div class='del'>-		NOISE_HASH_LEN, sizeof(handshake_name), 0);</div><div class='add'>+	blake2s(NULL, 0, handshake_name, sizeof(handshake_name),</div><div class='add'>+		handshake_init_chaining_key, NOISE_HASH_LEN);</div><div class='ctx'> 	blake2s_init(&amp;blake, NOISE_HASH_LEN);</div><div class='ctx'> 	blake2s_update(&amp;blake, handshake_init_chaining_key, NOISE_HASH_LEN);</div><div class='ctx'> 	blake2s_update(&amp;blake, identifier_name, sizeof(identifier_name));</div><div class='hunk'>@@ -304,33 +304,33 @@ void wg_noise_set_static_identity_private_key(</div><div class='ctx'> </div><div class='ctx'> static void hmac(u8 *out, const u8 *in, const u8 *key, const size_t inlen, const size_t keylen)</div><div class='ctx'> {</div><div class='del'>-	struct blake2s_state state;</div><div class='add'>+	struct blake2s_ctx blake;</div><div class='ctx'> 	u8 x_key[BLAKE2S_BLOCK_SIZE] __aligned(__alignof__(u32)) = { 0 };</div><div class='ctx'> 	u8 i_hash[BLAKE2S_HASH_SIZE] __aligned(__alignof__(u32));</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (keylen &gt; BLAKE2S_BLOCK_SIZE) {</div><div class='del'>-		blake2s_init(&amp;state, BLAKE2S_HASH_SIZE);</div><div class='del'>-		blake2s_update(&amp;state, key, keylen);</div><div class='del'>-		blake2s_final(&amp;state, x_key);</div><div class='add'>+		blake2s_init(&amp;blake, BLAKE2S_HASH_SIZE);</div><div class='add'>+		blake2s_update(&amp;blake, key, keylen);</div><div class='add'>+		blake2s_final(&amp;blake, x_key);</div><div class='ctx'> 	} else</div><div class='ctx'> 		memcpy(x_key, key, keylen);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; BLAKE2S_BLOCK_SIZE; ++i)</div><div class='ctx'> 		x_key[i] ^= 0x36;</div><div class='ctx'> </div><div class='del'>-	blake2s_init(&amp;state, BLAKE2S_HASH_SIZE);</div><div class='del'>-	blake2s_update(&amp;state, x_key, BLAKE2S_BLOCK_SIZE);</div><div class='del'>-	blake2s_update(&amp;state, in, inlen);</div><div class='del'>-	blake2s_final(&amp;state, i_hash);</div><div class='add'>+	blake2s_init(&amp;blake, BLAKE2S_HASH_SIZE);</div><div class='add'>+	blake2s_update(&amp;blake, x_key, BLAKE2S_BLOCK_SIZE);</div><div class='add'>+	blake2s_update(&amp;blake, in, inlen);</div><div class='add'>+	blake2s_final(&amp;blake, i_hash);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; BLAKE2S_BLOCK_SIZE; ++i)</div><div class='ctx'> 		x_key[i] ^= 0x5c ^ 0x36;</div><div class='ctx'> </div><div class='del'>-	blake2s_init(&amp;state, BLAKE2S_HASH_SIZE);</div><div class='del'>-	blake2s_update(&amp;state, x_key, BLAKE2S_BLOCK_SIZE);</div><div class='del'>-	blake2s_update(&amp;state, i_hash, BLAKE2S_HASH_SIZE);</div><div class='del'>-	blake2s_final(&amp;state, i_hash);</div><div class='add'>+	blake2s_init(&amp;blake, BLAKE2S_HASH_SIZE);</div><div class='add'>+	blake2s_update(&amp;blake, x_key, BLAKE2S_BLOCK_SIZE);</div><div class='add'>+	blake2s_update(&amp;blake, i_hash, BLAKE2S_HASH_SIZE);</div><div class='add'>+	blake2s_final(&amp;blake, i_hash);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(out, i_hash, BLAKE2S_HASH_SIZE);</div><div class='ctx'> 	memzero_explicit(x_key, BLAKE2S_BLOCK_SIZE);</div><div class='hunk'>@@ -431,7 +431,7 @@ static bool __must_check mix_precomputed_dh(u8 chaining_key[NOISE_HASH_LEN],</div><div class='ctx'> </div><div class='ctx'> static void mix_hash(u8 hash[NOISE_HASH_LEN], const u8 *src, size_t src_len)</div><div class='ctx'> {</div><div class='del'>-	struct blake2s_state blake;</div><div class='add'>+	struct blake2s_ctx blake;</div><div class='ctx'> </div><div class='ctx'> 	blake2s_init(&amp;blake, NOISE_HASH_LEN);</div><div class='ctx'> 	blake2s_update(&amp;blake, hash, NOISE_HASH_LEN);</div><div class='head'>diff --git a/drivers/net/wireguard/peer.h b/drivers/net/wireguard/peer.h<br/>index 76e4d3128ad4..718fb42bdac7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/peer.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/peer.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/peer.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/peer.h</a></div><div class='hunk'>@@ -20,7 +20,7 @@ struct wg_device;</div><div class='ctx'> </div><div class='ctx'> struct endpoint {</div><div class='ctx'> 	union {</div><div class='del'>-		struct sockaddr addr;</div><div class='add'>+		struct sockaddr_inet addr;     /* Large enough for both address families */</div><div class='ctx'> 		struct sockaddr_in addr4;</div><div class='ctx'> 		struct sockaddr_in6 addr6;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/drivers/net/wireguard/queueing.h b/drivers/net/wireguard/queueing.h<br/>index 7eb76724b3ed..79b6d70de236 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/queueing.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/queueing.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/queueing.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/queueing.h</a></div><div class='hunk'>@@ -104,16 +104,11 @@ static inline void wg_reset_packet(struct sk_buff *skb, bool encapsulating)</div><div class='ctx'> </div><div class='ctx'> static inline int wg_cpumask_choose_online(int *stored_cpu, unsigned int id)</div><div class='ctx'> {</div><div class='del'>-	unsigned int cpu = *stored_cpu, cpu_index, i;</div><div class='add'>+	unsigned int cpu = *stored_cpu;</div><div class='add'>+</div><div class='add'>+	while (unlikely(cpu &gt;= nr_cpu_ids || !cpu_online(cpu)))</div><div class='add'>+		cpu = *stored_cpu = cpumask_nth(id % num_online_cpus(), cpu_online_mask);</div><div class='ctx'> </div><div class='del'>-	if (unlikely(cpu &gt;= nr_cpu_ids ||</div><div class='del'>-		     !cpumask_test_cpu(cpu, cpu_online_mask))) {</div><div class='del'>-		cpu_index = id % cpumask_weight(cpu_online_mask);</div><div class='del'>-		cpu = cpumask_first(cpu_online_mask);</div><div class='del'>-		for (i = 0; i &lt; cpu_index; ++i)</div><div class='del'>-			cpu = cpumask_next(cpu, cpu_online_mask);</div><div class='del'>-		*stored_cpu = cpu;</div><div class='del'>-	}</div><div class='ctx'> 	return cpu;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireguard/selftest/allowedips.c b/drivers/net/wireguard/selftest/allowedips.c<br/>index 3d1f64ff2e12..41837efa70cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/selftest/allowedips.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/selftest/allowedips.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/selftest/allowedips.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/selftest/allowedips.c</a></div><div class='hunk'>@@ -383,7 +383,6 @@ static __init bool randomized_test(void)</div><div class='ctx'> 		for (i = 0; i &lt; NUM_QUERIES; ++i) {</div><div class='ctx'> 			get_random_bytes(ip, 4);</div><div class='ctx'> 			if (lookup(t.root4, 32, ip) != horrible_allowedips_lookup_v4(&amp;h, (struct in_addr *)ip)) {</div><div class='del'>-				horrible_allowedips_lookup_v4(&amp;h, (struct in_addr *)ip);</div><div class='ctx'> 				pr_err("allowedips random v4 self-test: FAIL\n");</div><div class='ctx'> 				goto free;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -461,6 +460,10 @@ static __init struct wg_peer *init_peer(void)</div><div class='ctx'> 	wg_allowedips_insert_v##version(&amp;t, ip##version(ipa, ipb, ipc, ipd), \</div><div class='ctx'> 					cidr, mem, &amp;mutex)</div><div class='ctx'> </div><div class='add'>+#define remove(version, mem, ipa, ipb, ipc, ipd, cidr)                      \</div><div class='add'>+	wg_allowedips_remove_v##version(&amp;t, ip##version(ipa, ipb, ipc, ipd), \</div><div class='add'>+					cidr, mem, &amp;mutex)</div><div class='add'>+</div><div class='ctx'> #define maybe_fail() do {                                               \</div><div class='ctx'> 		++i;                                                    \</div><div class='ctx'> 		if (!_s) {                                              \</div><div class='hunk'>@@ -586,6 +589,50 @@ bool __init wg_allowedips_selftest(void)</div><div class='ctx'> 	test_negative(4, a, 192, 0, 0, 0);</div><div class='ctx'> 	test_negative(4, a, 255, 0, 0, 0);</div><div class='ctx'> </div><div class='add'>+	insert(4, a, 1, 0, 0, 0, 32);</div><div class='add'>+	insert(4, a, 192, 0, 0, 0, 24);</div><div class='add'>+	insert(6, a, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef, 128);</div><div class='add'>+	insert(6, a, 0x24446800, 0xf0e40800, 0xeeaebeef, 0, 98);</div><div class='add'>+	test(4, a, 1, 0, 0, 0);</div><div class='add'>+	test(4, a, 192, 0, 0, 1);</div><div class='add'>+	test(6, a, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef);</div><div class='add'>+	test(6, a, 0x24446800, 0xf0e40800, 0xeeaebeef, 0x10101010);</div><div class='add'>+	/* Must be an exact match to remove */</div><div class='add'>+	remove(4, a, 192, 0, 0, 0, 32);</div><div class='add'>+	test(4, a, 192, 0, 0, 1);</div><div class='add'>+	/* NULL peer should have no effect and return 0 */</div><div class='add'>+	test_boolean(!remove(4, NULL, 192, 0, 0, 0, 24));</div><div class='add'>+	test(4, a, 192, 0, 0, 1);</div><div class='add'>+	/* different peer should have no effect and return 0 */</div><div class='add'>+	test_boolean(!remove(4, b, 192, 0, 0, 0, 24));</div><div class='add'>+	test(4, a, 192, 0, 0, 1);</div><div class='add'>+	/* invalid CIDR should have no effect and return -EINVAL */</div><div class='add'>+	test_boolean(remove(4, b, 192, 0, 0, 0, 33) == -EINVAL);</div><div class='add'>+	test(4, a, 192, 0, 0, 1);</div><div class='add'>+	remove(4, a, 192, 0, 0, 0, 24);</div><div class='add'>+	test_negative(4, a, 192, 0, 0, 1);</div><div class='add'>+	remove(4, a, 1, 0, 0, 0, 32);</div><div class='add'>+	test_negative(4, a, 1, 0, 0, 0);</div><div class='add'>+	/* Must be an exact match to remove */</div><div class='add'>+	remove(6, a, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef, 96);</div><div class='add'>+	test(6, a, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef);</div><div class='add'>+	/* NULL peer should have no effect and return 0 */</div><div class='add'>+	test_boolean(!remove(6, NULL, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef, 128));</div><div class='add'>+	test(6, a, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef);</div><div class='add'>+	/* different peer should have no effect and return 0 */</div><div class='add'>+	test_boolean(!remove(6, b, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef, 128));</div><div class='add'>+	test(6, a, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef);</div><div class='add'>+	/* invalid CIDR should have no effect and return -EINVAL */</div><div class='add'>+	test_boolean(remove(6, a, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef, 129)  == -EINVAL);</div><div class='add'>+	test(6, a, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef);</div><div class='add'>+	remove(6, a, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef, 128);</div><div class='add'>+	test_negative(6, a, 0x24446801, 0x40e40800, 0xdeaebeef, 0xdefbeef);</div><div class='add'>+	/* Must match the peer to remove */</div><div class='add'>+	remove(6, b, 0x24446800, 0xf0e40800, 0xeeaebeef, 0, 98);</div><div class='add'>+	test(6, a, 0x24446800, 0xf0e40800, 0xeeaebeef, 0x10101010);</div><div class='add'>+	remove(6, a, 0x24446800, 0xf0e40800, 0xeeaebeef, 0, 98);</div><div class='add'>+	test_negative(6, a, 0x24446800, 0xf0e40800, 0xeeaebeef, 0x10101010);</div><div class='add'>+</div><div class='ctx'> 	wg_allowedips_free(&amp;t, &amp;mutex);</div><div class='ctx'> 	wg_allowedips_init(&amp;t);</div><div class='ctx'> 	insert(4, a, 192, 168, 0, 0, 16);</div><div class='head'>diff --git a/drivers/net/wireguard/socket.c b/drivers/net/wireguard/socket.c<br/>index 0414d7a6ce74..253488f8c00f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/socket.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/socket.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/socket.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/socket.c</a></div><div class='hunk'>@@ -84,7 +84,7 @@ static int send4(struct wg_device *wg, struct sk_buff *skb,</div><div class='ctx'> 	skb-&gt;ignore_df = 1;</div><div class='ctx'> 	udp_tunnel_xmit_skb(rt, sock, skb, fl.saddr, fl.daddr, ds,</div><div class='ctx'> 			    ip4_dst_hoplimit(&amp;rt-&gt;dst), 0, fl.fl4_sport,</div><div class='del'>-			    fl.fl4_dport, false, false);</div><div class='add'>+			    fl.fl4_dport, false, false, 0);</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='hunk'>@@ -151,7 +151,7 @@ static int send6(struct wg_device *wg, struct sk_buff *skb,</div><div class='ctx'> 	skb-&gt;ignore_df = 1;</div><div class='ctx'> 	udp_tunnel6_xmit_skb(dst, sock, skb, skb-&gt;dev, &amp;fl.saddr, &amp;fl.daddr, ds,</div><div class='ctx'> 			     ip6_dst_hoplimit(dst), 0, fl.fl6_sport,</div><div class='del'>-			     fl.fl6_dport, false);</div><div class='add'>+			     fl.fl6_dport, false, 0);</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='head'>diff --git a/drivers/net/wireguard/timers.c b/drivers/net/wireguard/timers.c<br/>index 968bdb4df0b3..4016a3065602 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/timers.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireguard/timers.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireguard/timers.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireguard/timers.c</a></div><div class='hunk'>@@ -40,15 +40,15 @@ static inline void mod_peer_timer(struct wg_peer *peer,</div><div class='ctx'> </div><div class='ctx'> static void wg_expired_retransmit_handshake(struct timer_list *timer)</div><div class='ctx'> {</div><div class='del'>-	struct wg_peer *peer = from_timer(peer, timer,</div><div class='del'>-					  timer_retransmit_handshake);</div><div class='add'>+	struct wg_peer *peer = timer_container_of(peer, timer,</div><div class='add'>+						  timer_retransmit_handshake);</div><div class='ctx'> </div><div class='ctx'> 	if (peer-&gt;timer_handshake_attempts &gt; MAX_TIMER_HANDSHAKES) {</div><div class='ctx'> 		pr_debug("%s: Handshake for peer %llu (%pISpfsc) did not complete after %d attempts, giving up\n",</div><div class='ctx'> 			 peer-&gt;device-&gt;dev-&gt;name, peer-&gt;internal_id,</div><div class='ctx'> 			 &amp;peer-&gt;endpoint.addr, (int)MAX_TIMER_HANDSHAKES + 2);</div><div class='ctx'> </div><div class='del'>-		del_timer(&amp;peer-&gt;timer_send_keepalive);</div><div class='add'>+		timer_delete(&amp;peer-&gt;timer_send_keepalive);</div><div class='ctx'> 		/* We drop all packets without a keypair and don't try again,</div><div class='ctx'> 		 * if we try unsuccessfully for too long to make a handshake.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -78,7 +78,8 @@ static void wg_expired_retransmit_handshake(struct timer_list *timer)</div><div class='ctx'> </div><div class='ctx'> static void wg_expired_send_keepalive(struct timer_list *timer)</div><div class='ctx'> {</div><div class='del'>-	struct wg_peer *peer = from_timer(peer, timer, timer_send_keepalive);</div><div class='add'>+	struct wg_peer *peer = timer_container_of(peer, timer,</div><div class='add'>+						  timer_send_keepalive);</div><div class='ctx'> </div><div class='ctx'> 	wg_packet_send_keepalive(peer);</div><div class='ctx'> 	if (peer-&gt;timer_need_another_keepalive) {</div><div class='hunk'>@@ -90,7 +91,8 @@ static void wg_expired_send_keepalive(struct timer_list *timer)</div><div class='ctx'> </div><div class='ctx'> static void wg_expired_new_handshake(struct timer_list *timer)</div><div class='ctx'> {</div><div class='del'>-	struct wg_peer *peer = from_timer(peer, timer, timer_new_handshake);</div><div class='add'>+	struct wg_peer *peer = timer_container_of(peer, timer,</div><div class='add'>+						  timer_new_handshake);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: Retrying handshake with peer %llu (%pISpfsc) because we stopped hearing back after %d seconds\n",</div><div class='ctx'> 		 peer-&gt;device-&gt;dev-&gt;name, peer-&gt;internal_id,</div><div class='hunk'>@@ -104,7 +106,8 @@ static void wg_expired_new_handshake(struct timer_list *timer)</div><div class='ctx'> </div><div class='ctx'> static void wg_expired_zero_key_material(struct timer_list *timer)</div><div class='ctx'> {</div><div class='del'>-	struct wg_peer *peer = from_timer(peer, timer, timer_zero_key_material);</div><div class='add'>+	struct wg_peer *peer = timer_container_of(peer, timer,</div><div class='add'>+						  timer_zero_key_material);</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock_bh();</div><div class='ctx'> 	if (!READ_ONCE(peer-&gt;is_dead)) {</div><div class='hunk'>@@ -134,8 +137,8 @@ static void wg_queued_expired_zero_key_material(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void wg_expired_send_persistent_keepalive(struct timer_list *timer)</div><div class='ctx'> {</div><div class='del'>-	struct wg_peer *peer = from_timer(peer, timer,</div><div class='del'>-					  timer_persistent_keepalive);</div><div class='add'>+	struct wg_peer *peer = timer_container_of(peer, timer,</div><div class='add'>+						  timer_persistent_keepalive);</div><div class='ctx'> </div><div class='ctx'> 	if (likely(peer-&gt;persistent_keepalive_interval))</div><div class='ctx'> 		wg_packet_send_keepalive(peer);</div><div class='hunk'>@@ -167,7 +170,7 @@ void wg_timers_data_received(struct wg_peer *peer)</div><div class='ctx'>  */</div><div class='ctx'> void wg_timers_any_authenticated_packet_sent(struct wg_peer *peer)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;peer-&gt;timer_send_keepalive);</div><div class='add'>+	timer_delete(&amp;peer-&gt;timer_send_keepalive);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Should be called after any type of authenticated packet is received, whether</div><div class='hunk'>@@ -175,7 +178,7 @@ void wg_timers_any_authenticated_packet_sent(struct wg_peer *peer)</div><div class='ctx'>  */</div><div class='ctx'> void wg_timers_any_authenticated_packet_received(struct wg_peer *peer)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;peer-&gt;timer_new_handshake);</div><div class='add'>+	timer_delete(&amp;peer-&gt;timer_new_handshake);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Should be called after a handshake initiation message is sent. */</div><div class='hunk'>@@ -191,7 +194,7 @@ void wg_timers_handshake_initiated(struct wg_peer *peer)</div><div class='ctx'>  */</div><div class='ctx'> void wg_timers_handshake_complete(struct wg_peer *peer)</div><div class='ctx'> {</div><div class='del'>-	del_timer(&amp;peer-&gt;timer_retransmit_handshake);</div><div class='add'>+	timer_delete(&amp;peer-&gt;timer_retransmit_handshake);</div><div class='ctx'> 	peer-&gt;timer_handshake_attempts = 0;</div><div class='ctx'> 	peer-&gt;sent_lastminute_handshake = false;</div><div class='ctx'> 	ktime_get_real_ts64(&amp;peer-&gt;walltime_last_handshake);</div><div class='head'>diff --git a/drivers/net/wireless/admtek/adm8211.c b/drivers/net/wireless/admtek/adm8211.c<br/>index a2d87c3ad196..e94a6b180314 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/admtek/adm8211.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/admtek/adm8211.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/admtek/adm8211.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/admtek/adm8211.c</a></div><div class='hunk'>@@ -1293,7 +1293,7 @@ static void adm8211_set_bssid(struct ieee80211_hw *dev, const u8 *bssid)</div><div class='ctx'> 	ADM8211_CSR_WRITE(ABDA1, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int adm8211_config(struct ieee80211_hw *dev, u32 changed)</div><div class='add'>+static int adm8211_config(struct ieee80211_hw *dev, int radio_idx, u32 changed)</div><div class='ctx'> {</div><div class='ctx'> 	struct adm8211_priv *priv = dev-&gt;priv;</div><div class='ctx'> 	struct ieee80211_conf *conf = &amp;dev-&gt;conf;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ar5523/ar5523.c b/drivers/net/wireless/ath/ar5523/ar5523.c<br/>index 156f3650c006..1230e6278f23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ar5523/ar5523.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ar5523/ar5523.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ar5523/ar5523.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ar5523/ar5523.c</a></div><div class='hunk'>@@ -733,7 +733,7 @@ static void ar5523_data_tx_pkt_put(struct ar5523 *ar)</div><div class='ctx'> {</div><div class='ctx'> 	atomic_dec(&amp;ar-&gt;tx_nr_total);</div><div class='ctx'> 	if (!atomic_dec_return(&amp;ar-&gt;tx_nr_pending)) {</div><div class='del'>-		del_timer(&amp;ar-&gt;tx_wd_timer);</div><div class='add'>+		timer_delete(&amp;ar-&gt;tx_wd_timer);</div><div class='ctx'> 		wake_up(&amp;ar-&gt;tx_flush_waitq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -902,7 +902,7 @@ static void ar5523_tx_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> static void ar5523_tx_wd_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ar5523 *ar = from_timer(ar, t, tx_wd_timer);</div><div class='add'>+	struct ar5523 *ar = timer_container_of(ar, t, tx_wd_timer);</div><div class='ctx'> </div><div class='ctx'> 	ar5523_dbg(ar, "TX watchdog timer triggered\n");</div><div class='ctx'> 	ieee80211_queue_work(ar-&gt;hw, &amp;ar-&gt;tx_wd_work);</div><div class='hunk'>@@ -1076,14 +1076,15 @@ static void ar5523_stop(struct ieee80211_hw *hw, bool suspend)</div><div class='ctx'> </div><div class='ctx'> 	ar5523_cmd_write(ar, WDCMSG_TARGET_STOP, NULL, 0, 0);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ar-&gt;tx_wd_timer);</div><div class='add'>+	timer_delete_sync(&amp;ar-&gt;tx_wd_timer);</div><div class='ctx'> 	cancel_work_sync(&amp;ar-&gt;tx_wd_work);</div><div class='ctx'> 	cancel_work_sync(&amp;ar-&gt;rx_refill_work);</div><div class='ctx'> 	ar5523_cancel_rx_bufs(ar);</div><div class='ctx'> 	mutex_unlock(&amp;ar-&gt;mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ar5523_set_rts_threshold(struct ieee80211_hw *hw, u32 value)</div><div class='add'>+static int ar5523_set_rts_threshold(struct ieee80211_hw *hw, int radio_idx,</div><div class='add'>+				    u32 value)</div><div class='ctx'> {</div><div class='ctx'> 	struct ar5523 *ar = hw-&gt;priv;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1137,7 +1138,7 @@ static void ar5523_remove_interface(struct ieee80211_hw *hw,</div><div class='ctx'> 	ar-&gt;vif = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ar5523_hwconfig(struct ieee80211_hw *hw, u32 changed)</div><div class='add'>+static int ar5523_hwconfig(struct ieee80211_hw *hw, int radio_idx, u32 changed)</div><div class='ctx'> {</div><div class='ctx'> 	struct ar5523 *ar = hw-&gt;priv;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/ahb.c b/drivers/net/wireless/ath/ath10k/ahb.c<br/>index f0441b3d7dcb..eb8b35b6224d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/ahb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/ahb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/ahb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/ahb.c</a></div><div class='hunk'>@@ -497,7 +497,7 @@ static int ath10k_ahb_resource_init(struct ath10k *ar)</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "irq: %d\n", ar_ahb-&gt;irq);</div><div class='ctx'> </div><div class='del'>-	ath10k_dbg(ar, ATH10K_DBG_BOOT, "mem: 0x%pK mem_len: %lu gcc mem: 0x%pK tcsr_mem: 0x%pK\n",</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_BOOT, "mem: 0x%p mem_len: %lu gcc mem: 0x%p tcsr_mem: 0x%p\n",</div><div class='ctx'> 		   ar_ahb-&gt;mem, ar_ahb-&gt;mem_len,</div><div class='ctx'> 		   ar_ahb-&gt;gcc_mem, ar_ahb-&gt;tcsr_mem);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -837,12 +837,12 @@ static void ath10k_ahb_remove(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver ath10k_ahb_driver = {</div><div class='del'>-	.driver         = {</div><div class='del'>-		.name   = "ath10k_ahb",</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "ath10k_ahb",</div><div class='ctx'> 		.of_match_table = ath10k_ahb_of_match,</div><div class='ctx'> 	},</div><div class='del'>-	.probe  = ath10k_ahb_probe,</div><div class='del'>-	.remove_new = ath10k_ahb_remove,</div><div class='add'>+	.probe = ath10k_ahb_probe,</div><div class='add'>+	.remove = ath10k_ahb_remove,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int ath10k_ahb_init(void)</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/bmi.c b/drivers/net/wireless/ath/ath10k/bmi.c<br/>index 9a4f8e815412..52118867ecde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/bmi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/bmi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/bmi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/bmi.c</a></div><div class='hunk'>@@ -3,8 +3,10 @@</div><div class='ctx'>  * Copyright (c) 2005-2011 Atheros Communications Inc.</div><div class='ctx'>  * Copyright (c) 2011-2014,2016-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include "bmi.h"</div><div class='ctx'> #include "hif.h"</div><div class='ctx'> #include "debug.h"</div><div class='hunk'>@@ -349,7 +351,7 @@ static int ath10k_bmi_lz_data_large(struct ath10k *ar, const void *buffer, u32 l</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	size_t buf_len;</div><div class='ctx'> </div><div class='del'>-	ath10k_dbg(ar, ATH10K_DBG_BMI, "large bmi lz data buffer 0x%pK length %d\n",</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_BMI, "large bmi lz data buffer 0x%p length %d\n",</div><div class='ctx'> 		   buffer, length);</div><div class='ctx'> </div><div class='ctx'> 	if (ar-&gt;bmi.done_sent) {</div><div class='hunk'>@@ -395,7 +397,7 @@ int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length)</div><div class='ctx'> 	u32 txlen;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz data buffer 0x%pK length %d\n",</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz data buffer 0x%p length %d\n",</div><div class='ctx'> 		   buffer, length);</div><div class='ctx'> </div><div class='ctx'> 	if (ar-&gt;bmi.done_sent) {</div><div class='hunk'>@@ -461,7 +463,7 @@ int ath10k_bmi_fast_download(struct ath10k *ar,</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_BMI,</div><div class='del'>-		   "bmi fast download address 0x%x buffer 0x%pK length %d\n",</div><div class='add'>+		   "bmi fast download address 0x%x buffer 0x%p length %d\n",</div><div class='ctx'> 		   address, buffer, length);</div><div class='ctx'> </div><div class='ctx'> 	ret = ath10k_bmi_lz_stream_start(ar, address);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/ce.c b/drivers/net/wireless/ath/ath10k/ce.c<br/>index afae4a8027f8..7bbda46cfd93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/ce.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/ce.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/ce.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/ce.c</a></div><div class='hunk'>@@ -4,8 +4,10 @@</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2018 The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include "hif.h"</div><div class='ctx'> #include "ce.h"</div><div class='ctx'> #include "debug.h"</div><div class='hunk'>@@ -80,7 +82,7 @@ static inline u32 shadow_sr_wr_ind_addr(struct ath10k *ar,</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int</div><div class='ctx'> ath10k_set_ring_byte(unsigned int offset,</div><div class='del'>-		     struct ath10k_hw_ce_regs_addr_map *addr_map)</div><div class='add'>+		     const struct ath10k_hw_ce_regs_addr_map *addr_map)</div><div class='ctx'> {</div><div class='ctx'> 	return ((offset &lt;&lt; addr_map-&gt;lsb) &amp; addr_map-&gt;mask);</div><div class='ctx'> }</div><div class='hunk'>@@ -203,7 +205,7 @@ static inline void ath10k_ce_src_ring_dmax_set(struct ath10k *ar,</div><div class='ctx'> 					       u32 ce_ctrl_addr,</div><div class='ctx'> 					       unsigned int n)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar-&gt;hw_ce_regs-&gt;ctrl1_regs;</div><div class='add'>+	const struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar-&gt;hw_ce_regs-&gt;ctrl1_regs;</div><div class='ctx'> </div><div class='ctx'> 	u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr +</div><div class='ctx'> 					  ctrl_regs-&gt;addr);</div><div class='hunk'>@@ -217,7 +219,7 @@ static inline void ath10k_ce_src_ring_byte_swap_set(struct ath10k *ar,</div><div class='ctx'> 						    u32 ce_ctrl_addr,</div><div class='ctx'> 						    unsigned int n)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar-&gt;hw_ce_regs-&gt;ctrl1_regs;</div><div class='add'>+	const struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar-&gt;hw_ce_regs-&gt;ctrl1_regs;</div><div class='ctx'> </div><div class='ctx'> 	u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr +</div><div class='ctx'> 					  ctrl_regs-&gt;addr);</div><div class='hunk'>@@ -231,7 +233,7 @@ static inline void ath10k_ce_dest_ring_byte_swap_set(struct ath10k *ar,</div><div class='ctx'> 						     u32 ce_ctrl_addr,</div><div class='ctx'> 						     unsigned int n)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar-&gt;hw_ce_regs-&gt;ctrl1_regs;</div><div class='add'>+	const struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar-&gt;hw_ce_regs-&gt;ctrl1_regs;</div><div class='ctx'> </div><div class='ctx'> 	u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr +</div><div class='ctx'> 					  ctrl_regs-&gt;addr);</div><div class='hunk'>@@ -313,7 +315,7 @@ static inline void ath10k_ce_src_ring_highmark_set(struct ath10k *ar,</div><div class='ctx'> 						   u32 ce_ctrl_addr,</div><div class='ctx'> 						   unsigned int n)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_dst_src_wm_regs *srcr_wm = ar-&gt;hw_ce_regs-&gt;wm_srcr;</div><div class='add'>+	const struct ath10k_hw_ce_dst_src_wm_regs *srcr_wm = ar-&gt;hw_ce_regs-&gt;wm_srcr;</div><div class='ctx'> 	u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + srcr_wm-&gt;addr);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm-&gt;addr,</div><div class='hunk'>@@ -325,7 +327,7 @@ static inline void ath10k_ce_src_ring_lowmark_set(struct ath10k *ar,</div><div class='ctx'> 						  u32 ce_ctrl_addr,</div><div class='ctx'> 						  unsigned int n)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_dst_src_wm_regs *srcr_wm = ar-&gt;hw_ce_regs-&gt;wm_srcr;</div><div class='add'>+	const struct ath10k_hw_ce_dst_src_wm_regs *srcr_wm = ar-&gt;hw_ce_regs-&gt;wm_srcr;</div><div class='ctx'> 	u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + srcr_wm-&gt;addr);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm-&gt;addr,</div><div class='hunk'>@@ -337,7 +339,7 @@ static inline void ath10k_ce_dest_ring_highmark_set(struct ath10k *ar,</div><div class='ctx'> 						    u32 ce_ctrl_addr,</div><div class='ctx'> 						    unsigned int n)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_dst_src_wm_regs *dstr_wm = ar-&gt;hw_ce_regs-&gt;wm_dstr;</div><div class='add'>+	const struct ath10k_hw_ce_dst_src_wm_regs *dstr_wm = ar-&gt;hw_ce_regs-&gt;wm_dstr;</div><div class='ctx'> 	u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + dstr_wm-&gt;addr);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm-&gt;addr,</div><div class='hunk'>@@ -349,7 +351,7 @@ static inline void ath10k_ce_dest_ring_lowmark_set(struct ath10k *ar,</div><div class='ctx'> 						   u32 ce_ctrl_addr,</div><div class='ctx'> 						   unsigned int n)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_dst_src_wm_regs *dstr_wm = ar-&gt;hw_ce_regs-&gt;wm_dstr;</div><div class='add'>+	const struct ath10k_hw_ce_dst_src_wm_regs *dstr_wm = ar-&gt;hw_ce_regs-&gt;wm_dstr;</div><div class='ctx'> 	u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + dstr_wm-&gt;addr);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm-&gt;addr,</div><div class='hunk'>@@ -360,7 +362,7 @@ static inline void ath10k_ce_dest_ring_lowmark_set(struct ath10k *ar,</div><div class='ctx'> static inline void ath10k_ce_copy_complete_inter_enable(struct ath10k *ar,</div><div class='ctx'> 							u32 ce_ctrl_addr)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_host_ie *host_ie = ar-&gt;hw_ce_regs-&gt;host_ie;</div><div class='add'>+	const struct ath10k_hw_ce_host_ie *host_ie = ar-&gt;hw_ce_regs-&gt;host_ie;</div><div class='ctx'> </div><div class='ctx'> 	u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr +</div><div class='ctx'> 					    ar-&gt;hw_ce_regs-&gt;host_ie_addr);</div><div class='hunk'>@@ -372,7 +374,7 @@ static inline void ath10k_ce_copy_complete_inter_enable(struct ath10k *ar,</div><div class='ctx'> static inline void ath10k_ce_copy_complete_intr_disable(struct ath10k *ar,</div><div class='ctx'> 							u32 ce_ctrl_addr)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_host_ie *host_ie = ar-&gt;hw_ce_regs-&gt;host_ie;</div><div class='add'>+	const struct ath10k_hw_ce_host_ie *host_ie = ar-&gt;hw_ce_regs-&gt;host_ie;</div><div class='ctx'> </div><div class='ctx'> 	u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr +</div><div class='ctx'> 					    ar-&gt;hw_ce_regs-&gt;host_ie_addr);</div><div class='hunk'>@@ -384,7 +386,7 @@ static inline void ath10k_ce_copy_complete_intr_disable(struct ath10k *ar,</div><div class='ctx'> static inline void ath10k_ce_watermark_intr_disable(struct ath10k *ar,</div><div class='ctx'> 						    u32 ce_ctrl_addr)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_host_wm_regs *wm_regs = ar-&gt;hw_ce_regs-&gt;wm_regs;</div><div class='add'>+	const struct ath10k_hw_ce_host_wm_regs *wm_regs = ar-&gt;hw_ce_regs-&gt;wm_regs;</div><div class='ctx'> </div><div class='ctx'> 	u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr +</div><div class='ctx'> 					    ar-&gt;hw_ce_regs-&gt;host_ie_addr);</div><div class='hunk'>@@ -396,7 +398,7 @@ static inline void ath10k_ce_watermark_intr_disable(struct ath10k *ar,</div><div class='ctx'> static inline void ath10k_ce_error_intr_disable(struct ath10k *ar,</div><div class='ctx'> 						u32 ce_ctrl_addr)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_misc_regs *misc_regs = ar-&gt;hw_ce_regs-&gt;misc_regs;</div><div class='add'>+	const struct ath10k_hw_ce_misc_regs *misc_regs = ar-&gt;hw_ce_regs-&gt;misc_regs;</div><div class='ctx'> </div><div class='ctx'> 	u32 misc_ie_addr = ath10k_ce_read32(ar,</div><div class='ctx'> 			ce_ctrl_addr + ar-&gt;hw_ce_regs-&gt;misc_ie_addr);</div><div class='hunk'>@@ -410,7 +412,7 @@ static inline void ath10k_ce_engine_int_status_clear(struct ath10k *ar,</div><div class='ctx'> 						     u32 ce_ctrl_addr,</div><div class='ctx'> 						     unsigned int mask)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_hw_ce_host_wm_regs *wm_regs = ar-&gt;hw_ce_regs-&gt;wm_regs;</div><div class='add'>+	const struct ath10k_hw_ce_host_wm_regs *wm_regs = ar-&gt;hw_ce_regs-&gt;wm_regs;</div><div class='ctx'> </div><div class='ctx'> 	ath10k_ce_write32(ar, ce_ctrl_addr + wm_regs-&gt;addr, mask);</div><div class='ctx'> }</div><div class='hunk'>@@ -1230,7 +1232,7 @@ void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k_ce *ce = ath10k_ce_priv(ar);</div><div class='ctx'> 	struct ath10k_ce_pipe *ce_state = &amp;ce-&gt;ce_states[ce_id];</div><div class='del'>-	struct ath10k_hw_ce_host_wm_regs *wm_regs = ar-&gt;hw_ce_regs-&gt;wm_regs;</div><div class='add'>+	const struct ath10k_hw_ce_host_wm_regs *wm_regs = ar-&gt;hw_ce_regs-&gt;wm_regs;</div><div class='ctx'> 	u32 ctrl_addr = ce_state-&gt;ctrl_addr;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -1388,7 +1390,7 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar,</div><div class='ctx'> 	ath10k_ce_src_ring_highmark_set(ar, ctrl_addr, nentries);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_BOOT,</div><div class='del'>-		   "boot init ce src ring id %d entries %d base_addr %pK\n",</div><div class='add'>+		   "boot init ce src ring id %d entries %d base_addr %p\n",</div><div class='ctx'> 		   ce_id, nentries, src_ring-&gt;base_addr_owner_space);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1426,7 +1428,7 @@ static int ath10k_ce_init_dest_ring(struct ath10k *ar,</div><div class='ctx'> 	ath10k_ce_dest_ring_highmark_set(ar, ctrl_addr, nentries);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_BOOT,</div><div class='del'>-		   "boot ce dest ring id %d entries %d base_addr %pK\n",</div><div class='add'>+		   "boot ce dest ring id %d entries %d base_addr %p\n",</div><div class='ctx'> 		   ce_id, nentries, dest_ring-&gt;base_addr_owner_space);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c<br/>index b3294287bce1..7c2939cbde5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/core.c</a></div><div class='hunk'>@@ -3,9 +3,10 @@</div><div class='ctx'>  * Copyright (c) 2005-2011 Atheros Communications Inc.</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='hunk'>@@ -1163,9 +1164,12 @@ int ath10k_core_check_dt(struct ath10k *ar)</div><div class='ctx'> 	if (!node)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='del'>-	of_property_read_string(node, "qcom,ath10k-calibration-variant",</div><div class='add'>+	of_property_read_string(node, "qcom,calibration-variant",</div><div class='ctx'> 				&amp;variant);</div><div class='ctx'> 	if (!variant)</div><div class='add'>+		of_property_read_string(node, "qcom,ath10k-calibration-variant",</div><div class='add'>+					&amp;variant);</div><div class='add'>+	if (!variant)</div><div class='ctx'> 		return -ENODATA;</div><div class='ctx'> </div><div class='ctx'> 	if (strscpy(ar-&gt;id.bdf_ext, variant, sizeof(ar-&gt;id.bdf_ext)) &lt; 0)</div><div class='hunk'>@@ -1182,7 +1186,7 @@ static int ath10k_download_fw(struct ath10k *ar)</div><div class='ctx'> 	u32 address, data_len;</div><div class='ctx'> 	const void *data;</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct pm_qos_request latency_qos;</div><div class='add'>+	struct pm_qos_request latency_qos = {};</div><div class='ctx'> </div><div class='ctx'> 	address = ar-&gt;hw_params.patch_load_addr;</div><div class='ctx'> </div><div class='hunk'>@@ -1197,7 +1201,7 @@ static int ath10k_download_fw(struct ath10k *ar)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_BOOT,</div><div class='del'>-		   "boot uploading firmware image %pK len %d\n",</div><div class='add'>+		   "boot uploading firmware image %p len %d\n",</div><div class='ctx'> 		   data, data_len);</div><div class='ctx'> </div><div class='ctx'> 	/* Check if device supports to download firmware via</div><div class='hunk'>@@ -1216,7 +1220,6 @@ static int ath10k_download_fw(struct ath10k *ar)</div><div class='ctx'> 			    ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memset(&amp;latency_qos, 0, sizeof(latency_qos));</div><div class='ctx'> 	cpu_latency_qos_add_request(&amp;latency_qos, 0);</div><div class='ctx'> </div><div class='ctx'> 	ret = ath10k_bmi_fast_download(ar, address, data, data_len);</div><div class='hunk'>@@ -1560,7 +1563,7 @@ static int ath10k_core_create_board_name(struct ath10k *ar, char *name,</div><div class='ctx'> 					 bool with_chip_id)</div><div class='ctx'> {</div><div class='ctx'> 	/* strlen(',variant=') + strlen(ar-&gt;id.bdf_ext) */</div><div class='del'>-	char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };</div><div class='add'>+	char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = {};</div><div class='ctx'> </div><div class='ctx'> 	if (with_variant &amp;&amp; ar-&gt;id.bdf_ext[0] != '\0')</div><div class='ctx'> 		scnprintf(variant, sizeof(variant), ",variant=%s",</div><div class='hunk'>@@ -1823,7 +1826,7 @@ static int ath10k_download_and_run_otp(struct ath10k *ar)</div><div class='ctx'> </div><div class='ctx'> 	if (!ar-&gt;running_fw-&gt;fw_file.otp_data ||</div><div class='ctx'> 	    !ar-&gt;running_fw-&gt;fw_file.otp_len) {</div><div class='del'>-		ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",</div><div class='add'>+		ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",</div><div class='ctx'> 			    ar-&gt;running_fw-&gt;fw_file.otp_data,</div><div class='ctx'> 			    ar-&gt;running_fw-&gt;fw_file.otp_len);</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -2259,7 +2262,9 @@ static int ath10k_core_pre_cal_download(struct ath10k *ar)</div><div class='ctx'> 		   "boot did not find a pre calibration file, try DT next: %d\n",</div><div class='ctx'> 		   ret);</div><div class='ctx'> </div><div class='del'>-	ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");</div><div class='add'>+	ret = ath10k_download_cal_dt(ar, "qcom,pre-calibration-data");</div><div class='add'>+	if (ret == -ENOENT)</div><div class='add'>+		ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath10k_dbg(ar, ATH10K_DBG_BOOT,</div><div class='ctx'> 			   "unable to load pre cal data from DT: %d\n", ret);</div><div class='hunk'>@@ -2337,7 +2342,9 @@ static int ath10k_download_cal_data(struct ath10k *ar)</div><div class='ctx'> 		   "boot did not find a calibration file, try DT next: %d\n",</div><div class='ctx'> 		   ret);</div><div class='ctx'> </div><div class='del'>-	ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");</div><div class='add'>+	ret = ath10k_download_cal_dt(ar, "qcom,calibration-data");</div><div class='add'>+	if (ret == -ENOENT)</div><div class='add'>+		ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");</div><div class='ctx'> 	if (ret == 0) {</div><div class='ctx'> 		ar-&gt;cal_mode = ATH10K_CAL_MODE_DT;</div><div class='ctx'> 		goto done;</div><div class='hunk'>@@ -2484,15 +2491,51 @@ static int ath10k_init_hw_params(struct ath10k *ar)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ath10k_core_start_recovery(struct ath10k *ar)</div><div class='add'>+static void ath10k_core_recovery_check_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	if (test_and_set_bit(ATH10K_FLAG_RESTARTING, &amp;ar-&gt;dev_flags)) {</div><div class='del'>-		ath10k_warn(ar, "already restarting\n");</div><div class='add'>+	struct ath10k *ar = container_of(work, struct ath10k, recovery_check_work);</div><div class='add'>+	long time_left;</div><div class='add'>+</div><div class='add'>+	/* Sometimes the recovery will fail and then the next all recovery fail,</div><div class='add'>+	 * so avoid infinite recovery.</div><div class='add'>+	 */</div><div class='add'>+	if (atomic_read(&amp;ar-&gt;fail_cont_count) &gt;= ATH10K_RECOVERY_MAX_FAIL_COUNT) {</div><div class='add'>+		ath10k_err(ar, "consecutive fail %d times, will shutdown driver!",</div><div class='add'>+			   atomic_read(&amp;ar-&gt;fail_cont_count));</div><div class='add'>+		ar-&gt;state = ATH10K_STATE_WEDGED;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_BOOT, "total recovery count: %d", ++ar-&gt;recovery_count);</div><div class='add'>+</div><div class='add'>+	if (atomic_read(&amp;ar-&gt;pending_recovery)) {</div><div class='add'>+		/* Sometimes it happened another recovery work before the previous one</div><div class='add'>+		 * completed, then the second recovery work will destroy the previous</div><div class='add'>+		 * one, thus below is to avoid that.</div><div class='add'>+		 */</div><div class='add'>+		time_left = wait_for_completion_timeout(&amp;ar-&gt;driver_recovery,</div><div class='add'>+							ATH10K_RECOVERY_TIMEOUT_HZ);</div><div class='add'>+		if (time_left) {</div><div class='add'>+			ath10k_warn(ar, "previous recovery succeeded, skip this!\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Record the continuous recovery fail count when recovery failed. */</div><div class='add'>+		atomic_inc(&amp;ar-&gt;fail_cont_count);</div><div class='add'>+</div><div class='add'>+		/* Avoid having multiple recoveries at the same time. */</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	atomic_inc(&amp;ar-&gt;pending_recovery);</div><div class='ctx'> 	queue_work(ar-&gt;workqueue, &amp;ar-&gt;restart_work);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void ath10k_core_start_recovery(struct ath10k *ar)</div><div class='add'>+{</div><div class='add'>+	/* Use workqueue_aux to avoid blocking recovery tracking */</div><div class='add'>+	queue_work(ar-&gt;workqueue_aux, &amp;ar-&gt;recovery_check_work);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL(ath10k_core_start_recovery);</div><div class='ctx'> </div><div class='ctx'> void ath10k_core_napi_enable(struct ath10k *ar)</div><div class='hunk'>@@ -2525,6 +2568,8 @@ static void ath10k_core_restart(struct work_struct *work)</div><div class='ctx'> 	struct ath10k *ar = container_of(work, struct ath10k, restart_work);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	reinit_completion(&amp;ar-&gt;driver_recovery);</div><div class='add'>+</div><div class='ctx'> 	set_bit(ATH10K_FLAG_CRASH_FLUSH, &amp;ar-&gt;dev_flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Place a barrier to make sure the compiler doesn't reorder</div><div class='hunk'>@@ -2589,8 +2634,6 @@ static void ath10k_core_restart(struct work_struct *work)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",</div><div class='ctx'> 			    ret);</div><div class='del'>-</div><div class='del'>-	complete(&amp;ar-&gt;driver_recovery);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath10k_core_set_coverage_class_work(struct work_struct *work)</div><div class='hunk'>@@ -2599,7 +2642,7 @@ static void ath10k_core_set_coverage_class_work(struct work_struct *work)</div><div class='ctx'> 					 set_coverage_class_work);</div><div class='ctx'> </div><div class='ctx'> 	if (ar-&gt;hw_params.hw_ops-&gt;set_coverage_class)</div><div class='del'>-		ar-&gt;hw_params.hw_ops-&gt;set_coverage_class(ar, -1);</div><div class='add'>+		ar-&gt;hw_params.hw_ops-&gt;set_coverage_class(ar, -1, -1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath10k_core_init_firmware_features(struct ath10k *ar)</div><div class='hunk'>@@ -3309,7 +3352,7 @@ EXPORT_SYMBOL(ath10k_core_stop);</div><div class='ctx'>  */</div><div class='ctx'> static int ath10k_core_probe_fw(struct ath10k *ar)</div><div class='ctx'> {</div><div class='del'>-	struct bmi_target_info target_info;</div><div class='add'>+	struct bmi_target_info target_info = {};</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);</div><div class='hunk'>@@ -3320,7 +3363,6 @@ static int ath10k_core_probe_fw(struct ath10k *ar)</div><div class='ctx'> </div><div class='ctx'> 	switch (ar-&gt;hif.bus) {</div><div class='ctx'> 	case ATH10K_BUS_SDIO:</div><div class='del'>-		memset(&amp;target_info, 0, sizeof(target_info));</div><div class='ctx'> 		ret = ath10k_bmi_get_target_info_sdio(ar, &amp;target_info);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			ath10k_err(ar, "could not get target info (%d)\n", ret);</div><div class='hunk'>@@ -3332,7 +3374,6 @@ static int ath10k_core_probe_fw(struct ath10k *ar)</div><div class='ctx'> 	case ATH10K_BUS_PCI:</div><div class='ctx'> 	case ATH10K_BUS_AHB:</div><div class='ctx'> 	case ATH10K_BUS_USB:</div><div class='del'>-		memset(&amp;target_info, 0, sizeof(target_info));</div><div class='ctx'> 		ret = ath10k_bmi_get_target_info(ar, &amp;target_info);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			ath10k_err(ar, "could not get target info (%d)\n", ret);</div><div class='hunk'>@@ -3342,7 +3383,6 @@ static int ath10k_core_probe_fw(struct ath10k *ar)</div><div class='ctx'> 		ar-&gt;hw-&gt;wiphy-&gt;hw_version = target_info.version;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case ATH10K_BUS_SNOC:</div><div class='del'>-		memset(&amp;target_info, 0, sizeof(target_info));</div><div class='ctx'> 		ret = ath10k_hif_get_target_info(ar, &amp;target_info);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			ath10k_err(ar, "could not get target info (%d)\n", ret);</div><div class='hunk'>@@ -3687,6 +3727,7 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,</div><div class='ctx'> </div><div class='ctx'> 	INIT_WORK(&amp;ar-&gt;register_work, ath10k_core_register_work);</div><div class='ctx'> 	INIT_WORK(&amp;ar-&gt;restart_work, ath10k_core_restart);</div><div class='add'>+	INIT_WORK(&amp;ar-&gt;recovery_check_work, ath10k_core_recovery_check_work);</div><div class='ctx'> 	INIT_WORK(&amp;ar-&gt;set_coverage_class_work,</div><div class='ctx'> 		  ath10k_core_set_coverage_class_work);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/core.h b/drivers/net/wireless/ath/ath10k/core.h<br/>index 446dca74f06a..73a9db302245 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/core.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/core.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/core.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * Copyright (c) 2005-2011 Atheros Communications Inc.</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _CORE_H_</div><div class='hunk'>@@ -87,6 +87,8 @@</div><div class='ctx'> 				  IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)</div><div class='ctx'> #define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\</div><div class='ctx'> 				  IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)</div><div class='add'>+#define ATH10K_RECOVERY_TIMEOUT_HZ			(5 * HZ)</div><div class='add'>+#define ATH10K_RECOVERY_MAX_FAIL_COUNT			4</div><div class='ctx'> </div><div class='ctx'> struct ath10k;</div><div class='ctx'> </div><div class='hunk'>@@ -779,7 +781,7 @@ enum ath10k_fw_features {</div><div class='ctx'> 	/* Firmware supports bypassing PLL setting on init. */</div><div class='ctx'> 	ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,</div><div class='ctx'> </div><div class='del'>-	/* Raw mode support. If supported, FW supports receiving and trasmitting</div><div class='add'>+	/* Raw mode support. If supported, FW supports receiving and transmitting</div><div class='ctx'> 	 * frames in raw mode.</div><div class='ctx'> 	 */</div><div class='ctx'> 	ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,</div><div class='hunk'>@@ -865,9 +867,6 @@ enum ath10k_dev_flags {</div><div class='ctx'> 	/* Per Station statistics service */</div><div class='ctx'> 	ATH10K_FLAG_PEER_STATS,</div><div class='ctx'> </div><div class='del'>-	/* Indicates that ath10k device is during recovery process and not complete */</div><div class='del'>-	ATH10K_FLAG_RESTARTING,</div><div class='del'>-</div><div class='ctx'> 	/* protected by conf_mutex */</div><div class='ctx'> 	ATH10K_FLAG_NAPI_ENABLED,</div><div class='ctx'> };</div><div class='hunk'>@@ -1208,9 +1207,15 @@ struct ath10k {</div><div class='ctx'> </div><div class='ctx'> 	struct work_struct register_work;</div><div class='ctx'> 	struct work_struct restart_work;</div><div class='add'>+	struct work_struct recovery_check_work;</div><div class='ctx'> 	struct work_struct bundle_tx_work;</div><div class='ctx'> 	struct work_struct tx_complete_work;</div><div class='ctx'> </div><div class='add'>+	atomic_t pending_recovery;</div><div class='add'>+	unsigned int recovery_count;</div><div class='add'>+	/* continuous recovery fail count */</div><div class='add'>+	atomic_t fail_cont_count;</div><div class='add'>+</div><div class='ctx'> 	/* cycle count is reported twice for each visited channel during scan.</div><div class='ctx'> 	 * access protected by data_lock</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1254,9 +1259,13 @@ struct ath10k {</div><div class='ctx'> 	struct {</div><div class='ctx'> 		/* protected by conf_mutex */</div><div class='ctx'> 		struct ath10k_fw_components utf_mode_fw;</div><div class='add'>+		u8 ftm_msgref;</div><div class='ctx'> </div><div class='ctx'> 		/* protected by data_lock */</div><div class='ctx'> 		bool utf_monitor;</div><div class='add'>+		u32 data_pos;</div><div class='add'>+		u32 expected_seq;</div><div class='add'>+		u8 *eventdata;</div><div class='ctx'> 	} testmode;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/coredump.c b/drivers/net/wireless/ath/ath10k/coredump.c<br/>index bb3a276b7ed5..50d0c4213ecf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/coredump.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/coredump.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/coredump.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/coredump.c</a></div><div class='hunk'>@@ -3,11 +3,13 @@</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2018, The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "coredump.h"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/devcoredump.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/utsname.h&gt;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/debug.c b/drivers/net/wireless/ath/ath10k/debug.c<br/>index 35bfe7232e95..b7520220465a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/debug.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/debug.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/debug.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/debug.c</a></div><div class='hunk'>@@ -4,10 +4,12 @@</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2018, The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='hunk'>@@ -545,7 +547,7 @@ static ssize_t ath10k_write_simulate_fw_crash(struct file *file,</div><div class='ctx'> 					      size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k *ar = file-&gt;private_data;</div><div class='del'>-	char buf[32] = {0};</div><div class='add'>+	char buf[32] = {};</div><div class='ctx'> 	ssize_t rc;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -981,7 +983,7 @@ static ssize_t ath10k_write_htt_max_amsdu_ampdu(struct file *file,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k *ar = file-&gt;private_data;</div><div class='ctx'> 	int res;</div><div class='del'>-	char buf[64] = {0};</div><div class='add'>+	char buf[64] = {};</div><div class='ctx'> 	unsigned int amsdu, ampdu;</div><div class='ctx'> </div><div class='ctx'> 	res = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,</div><div class='hunk'>@@ -1037,7 +1039,7 @@ static ssize_t ath10k_write_fw_dbglog(struct file *file,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k *ar = file-&gt;private_data;</div><div class='ctx'> 	int ret;</div><div class='del'>-	char buf[96] = {0};</div><div class='add'>+	char buf[96] = {};</div><div class='ctx'> 	unsigned int log_level;</div><div class='ctx'> 	u64 mask;</div><div class='ctx'> </div><div class='hunk'>@@ -1751,7 +1753,7 @@ void ath10k_debug_stop(struct ath10k *ar)</div><div class='ctx'> </div><div class='ctx'> 	/* Must not use _sync to avoid deadlock, we do that in</div><div class='ctx'> 	 * ath10k_debug_destroy(). The check for htt_stats_mask is to avoid</div><div class='del'>-	 * warning from del_timer().</div><div class='add'>+	 * warning from timer_delete().</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (ar-&gt;debug.htt_stats_mask != 0)</div><div class='ctx'> 		cancel_delayed_work(&amp;ar-&gt;debug.htt_stats_dwork);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/debugfs_sta.c b/drivers/net/wireless/ath/ath10k/debugfs_sta.c<br/>index 0f6de862c3a9..b9fb192e0b48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/debugfs_sta.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/debugfs_sta.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/debugfs_sta.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/debugfs_sta.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (c) 2014-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2018, The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='hunk'>@@ -244,7 +245,7 @@ static ssize_t ath10k_dbg_sta_write_addba(struct file *file,</div><div class='ctx'> 	struct ath10k *ar = arsta-&gt;arvif-&gt;ar;</div><div class='ctx'> 	u32 tid, buf_size;</div><div class='ctx'> 	int ret;</div><div class='del'>-	char buf[64] = {0};</div><div class='add'>+	char buf[64] = {};</div><div class='ctx'> </div><div class='ctx'> 	ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,</div><div class='ctx'> 				     user_buf, count);</div><div class='hunk'>@@ -295,7 +296,7 @@ static ssize_t ath10k_dbg_sta_write_addba_resp(struct file *file,</div><div class='ctx'> 	struct ath10k *ar = arsta-&gt;arvif-&gt;ar;</div><div class='ctx'> 	u32 tid, status;</div><div class='ctx'> 	int ret;</div><div class='del'>-	char buf[64] = {0};</div><div class='add'>+	char buf[64] = {};</div><div class='ctx'> </div><div class='ctx'> 	ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,</div><div class='ctx'> 				     user_buf, count);</div><div class='hunk'>@@ -345,7 +346,7 @@ static ssize_t ath10k_dbg_sta_write_delba(struct file *file,</div><div class='ctx'> 	struct ath10k *ar = arsta-&gt;arvif-&gt;ar;</div><div class='ctx'> 	u32 tid, initiator, reason;</div><div class='ctx'> 	int ret;</div><div class='del'>-	char buf[64] = {0};</div><div class='add'>+	char buf[64] = {};</div><div class='ctx'> </div><div class='ctx'> 	ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,</div><div class='ctx'> 				     user_buf, count);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/htc.c b/drivers/net/wireless/ath/ath10k/htc.c<br/>index a6e21ce90bad..ce9b248c12dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/htc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/htc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/htc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/htc.c</a></div><div class='hunk'>@@ -3,8 +3,11 @@</div><div class='ctx'>  * Copyright (c) 2005-2011 Atheros Communications Inc.</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "hif.h"</div><div class='ctx'> #include "debug.h"</div><div class='hunk'>@@ -34,7 +37,7 @@ static struct sk_buff *ath10k_htc_build_tx_ctrl_skb(void *ar)</div><div class='ctx'> 	skb_cb = ATH10K_SKB_CB(skb);</div><div class='ctx'> 	memset(skb_cb, 0, sizeof(*skb_cb));</div><div class='ctx'> </div><div class='del'>-	ath10k_dbg(ar, ATH10K_DBG_HTC, "%s: skb %pK\n", __func__, skb);</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_HTC, "%s: skb %p\n", __func__, skb);</div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -54,7 +57,7 @@ void ath10k_htc_notify_tx_completion(struct ath10k_htc_ep *ep,</div><div class='ctx'> 	struct ath10k *ar = ep-&gt;htc-&gt;ar;</div><div class='ctx'> 	struct ath10k_htc_hdr *hdr;</div><div class='ctx'> </div><div class='del'>-	ath10k_dbg(ar, ATH10K_DBG_HTC, "%s: ep %d skb %pK\n", __func__,</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_HTC, "%s: ep %d skb %p\n", __func__,</div><div class='ctx'> 		   ep-&gt;eid, skb);</div><div class='ctx'> </div><div class='ctx'> 	/* A corner case where the copy completion is reaching to host but still</div><div class='hunk'>@@ -515,7 +518,7 @@ void ath10k_htc_rx_completion_handler(struct ath10k *ar, struct sk_buff *skb)</div><div class='ctx'> 		/* zero length packet with trailer data, just drop these */</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	ath10k_dbg(ar, ATH10K_DBG_HTC, "htc rx completion ep %d skb %pK\n",</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_HTC, "htc rx completion ep %d skb %p\n",</div><div class='ctx'> 		   eid, skb);</div><div class='ctx'> 	ep-&gt;ep_ops.ep_rx_complete(ar, skb);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/htt_rx.c b/drivers/net/wireless/ath/ath10k/htt_rx.c<br/>index 7d28ae5453cf..d7e429041065 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/htt_rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/htt_rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/htt_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/htt_rx.c</a></div><div class='hunk'>@@ -4,8 +4,11 @@</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2018, The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "htc.h"</div><div class='ctx'> #include "htt.h"</div><div class='hunk'>@@ -257,7 +260,8 @@ static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)</div><div class='ctx'> </div><div class='ctx'> static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_htt *htt = from_timer(htt, t, rx_ring.refill_retry_timer);</div><div class='add'>+	struct ath10k_htt *htt = timer_container_of(htt, t,</div><div class='add'>+						    rx_ring.refill_retry_timer);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_htt_rx_msdu_buff_replenish(htt);</div><div class='ctx'> }</div><div class='hunk'>@@ -287,7 +291,7 @@ void ath10k_htt_rx_free(struct ath10k_htt *htt)</div><div class='ctx'> 	if (htt-&gt;ar-&gt;bus_param.dev_type == ATH10K_DEV_TYPE_HL)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;htt-&gt;rx_ring.refill_retry_timer);</div><div class='add'>+	timer_delete_sync(&amp;htt-&gt;rx_ring.refill_retry_timer);</div><div class='ctx'> </div><div class='ctx'> 	skb_queue_purge(&amp;htt-&gt;rx_msdus_q);</div><div class='ctx'> 	skb_queue_purge(&amp;htt-&gt;rx_in_ord_compl_q);</div><div class='hunk'>@@ -1373,7 +1377,7 @@ static void ath10k_process_rx(struct ath10k *ar, struct sk_buff *skb)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_DATA,</div><div class='del'>-		   "rx skb %pK len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",</div><div class='add'>+		   "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",</div><div class='ctx'> 		   skb,</div><div class='ctx'> 		   skb-&gt;len,</div><div class='ctx'> 		   ieee80211_get_SA(hdr),</div><div class='hunk'>@@ -1880,7 +1884,7 @@ static bool ath10k_htt_rx_h_frag_pn_check(struct ath10k *ar,</div><div class='ctx'> 					  enum htt_rx_mpdu_encrypt_type enctype)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k_peer *peer;</div><div class='del'>-	union htt_rx_pn_t *last_pn, new_pn = {0};</div><div class='add'>+	union htt_rx_pn_t *last_pn, new_pn = {};</div><div class='ctx'> 	struct ieee80211_hdr *hdr;</div><div class='ctx'> 	u8 tid, frag_number;</div><div class='ctx'> 	u32 seq;</div><div class='hunk'>@@ -2398,7 +2402,7 @@ static bool ath10k_htt_rx_pn_check_replay_hl(struct ath10k *ar,</div><div class='ctx'> 	bool last_pn_valid, pn_invalid = false;</div><div class='ctx'> 	enum htt_txrx_sec_cast_type sec_index;</div><div class='ctx'> 	enum htt_security_types sec_type;</div><div class='del'>-	union htt_rx_pn_t new_pn = {0};</div><div class='add'>+	union htt_rx_pn_t new_pn = {};</div><div class='ctx'> 	struct htt_hl_rx_desc *rx_desc;</div><div class='ctx'> 	union htt_rx_pn_t *last_pn;</div><div class='ctx'> 	u32 rx_desc_info, tid;</div><div class='hunk'>@@ -2461,7 +2465,7 @@ static bool ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt *htt,</div><div class='ctx'> 	struct fw_rx_desc_hl *fw_desc;</div><div class='ctx'> 	enum htt_txrx_sec_cast_type sec_index;</div><div class='ctx'> 	enum htt_security_types sec_type;</div><div class='del'>-	union htt_rx_pn_t new_pn = {0};</div><div class='add'>+	union htt_rx_pn_t new_pn = {};</div><div class='ctx'> 	struct htt_hl_rx_desc *rx_desc;</div><div class='ctx'> 	struct ieee80211_hdr *hdr;</div><div class='ctx'> 	struct ieee80211_rx_status *rx_status;</div><div class='hunk'>@@ -2763,7 +2767,7 @@ static bool ath10k_htt_rx_proc_rx_frag_ind_hl(struct ath10k_htt *htt,</div><div class='ctx'> 	struct htt_rx_indication_hl *rx_hl;</div><div class='ctx'> 	enum htt_security_types sec_type;</div><div class='ctx'> 	u32 tid, frag, seq, rx_desc_info;</div><div class='del'>-	union htt_rx_pn_t new_pn = {0};</div><div class='add'>+	union htt_rx_pn_t new_pn = {};</div><div class='ctx'> 	struct htt_hl_rx_desc *rx_desc;</div><div class='ctx'> 	u16 peer_id, sc, hdr_space;</div><div class='ctx'> 	union htt_rx_pn_t *last_pn;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/htt_tx.c b/drivers/net/wireless/ath/ath10k/htt_tx.c<br/>index 9725feecefd6..d6f1d85ba871 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/htt_tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/htt_tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/htt_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/htt_tx.c</a></div><div class='hunk'>@@ -3,8 +3,10 @@</div><div class='ctx'>  * Copyright (c) 2005-2011 Atheros Communications Inc.</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include "htt.h"</div><div class='ctx'> #include "mac.h"</div><div class='hunk'>@@ -508,7 +510,7 @@ static int ath10k_htt_tx_clean_up_pending(int msdu_id, void *skb, void *ctx)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k *ar = ctx;</div><div class='ctx'> 	struct ath10k_htt *htt = &amp;ar-&gt;htt;</div><div class='del'>-	struct htt_tx_done tx_done = {0};</div><div class='add'>+	struct htt_tx_done tx_done = {};</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_HTT, "force cleanup msdu_id %u\n", msdu_id);</div><div class='ctx'> </div><div class='hunk'>@@ -558,7 +560,7 @@ void ath10k_htt_op_ep_tx_credits(struct ath10k *ar)</div><div class='ctx'> void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k_htt *htt = &amp;ar-&gt;htt;</div><div class='del'>-	struct htt_tx_done tx_done = {0};</div><div class='add'>+	struct htt_tx_done tx_done = {};</div><div class='ctx'> 	struct htt_cmd_hdr *htt_hdr;</div><div class='ctx'> 	struct htt_data_tx_desc *desc_hdr = NULL;</div><div class='ctx'> 	u16 flags1 = 0;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/hw.c b/drivers/net/wireless/ath/ath10k/hw.c<br/>index 8fafe096adff..59b6cebfdd8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/hw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/hw.c</a></div><div class='hunk'>@@ -212,40 +212,40 @@ const struct ath10k_hw_regs wcn3990_regs = {</div><div class='ctx'> 	.pcie_intr_fw_mask			= 0x00100000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map wcn3990_src_ring = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map wcn3990_src_ring = {</div><div class='ctx'> 	.msb	= 0x00000010,</div><div class='ctx'> 	.lsb	= 0x00000010,</div><div class='ctx'> 	.mask	= GENMASK(17, 17),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map wcn3990_dst_ring = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map wcn3990_dst_ring = {</div><div class='ctx'> 	.msb	= 0x00000012,</div><div class='ctx'> 	.lsb	= 0x00000012,</div><div class='ctx'> 	.mask	= GENMASK(18, 18),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map wcn3990_dmax = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map wcn3990_dmax = {</div><div class='ctx'> 	.msb	= 0x00000000,</div><div class='ctx'> 	.lsb	= 0x00000000,</div><div class='ctx'> 	.mask	= GENMASK(15, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_ctrl1 wcn3990_ctrl1 = {</div><div class='add'>+static const struct ath10k_hw_ce_ctrl1 wcn3990_ctrl1 = {</div><div class='ctx'> 	.addr		= 0x00000018,</div><div class='ctx'> 	.src_ring	= &amp;wcn3990_src_ring,</div><div class='ctx'> 	.dst_ring	= &amp;wcn3990_dst_ring,</div><div class='ctx'> 	.dmax		= &amp;wcn3990_dmax,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map wcn3990_host_ie_cc = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map wcn3990_host_ie_cc = {</div><div class='ctx'> 	.mask	= GENMASK(0, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_host_ie wcn3990_host_ie = {</div><div class='add'>+static const struct ath10k_hw_ce_host_ie wcn3990_host_ie = {</div><div class='ctx'> 	.copy_complete	= &amp;wcn3990_host_ie_cc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_host_wm_regs wcn3990_wm_reg = {</div><div class='add'>+static const struct ath10k_hw_ce_host_wm_regs wcn3990_wm_reg = {</div><div class='ctx'> 	.dstr_lmask	= 0x00000010,</div><div class='ctx'> 	.dstr_hmask	= 0x00000008,</div><div class='ctx'> 	.srcr_lmask	= 0x00000004,</div><div class='hunk'>@@ -255,7 +255,7 @@ static struct ath10k_hw_ce_host_wm_regs wcn3990_wm_reg = {</div><div class='ctx'> 	.addr		= 0x00000030,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_misc_regs wcn3990_misc_reg = {</div><div class='add'>+static const struct ath10k_hw_ce_misc_regs wcn3990_misc_reg = {</div><div class='ctx'> 	.axi_err	= 0x00000100,</div><div class='ctx'> 	.dstr_add_err	= 0x00000200,</div><div class='ctx'> 	.srcr_len_err	= 0x00000100,</div><div class='hunk'>@@ -266,19 +266,19 @@ static struct ath10k_hw_ce_misc_regs wcn3990_misc_reg = {</div><div class='ctx'> 	.addr		= 0x00000038,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map wcn3990_src_wm_low = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map wcn3990_src_wm_low = {</div><div class='ctx'> 	.msb	= 0x00000000,</div><div class='ctx'> 	.lsb	= 0x00000010,</div><div class='ctx'> 	.mask	= GENMASK(31, 16),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map wcn3990_src_wm_high = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map wcn3990_src_wm_high = {</div><div class='ctx'> 	.msb	= 0x0000000f,</div><div class='ctx'> 	.lsb	= 0x00000000,</div><div class='ctx'> 	.mask	= GENMASK(15, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_dst_src_wm_regs wcn3990_wm_src_ring = {</div><div class='add'>+static const struct ath10k_hw_ce_dst_src_wm_regs wcn3990_wm_src_ring = {</div><div class='ctx'> 	.addr		= 0x0000004c,</div><div class='ctx'> 	.low_rst	= 0x00000000,</div><div class='ctx'> 	.high_rst	= 0x00000000,</div><div class='hunk'>@@ -286,18 +286,18 @@ static struct ath10k_hw_ce_dst_src_wm_regs wcn3990_wm_src_ring = {</div><div class='ctx'> 	.wm_high	= &amp;wcn3990_src_wm_high,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map wcn3990_dst_wm_low = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map wcn3990_dst_wm_low = {</div><div class='ctx'> 	.lsb	= 0x00000010,</div><div class='ctx'> 	.mask	= GENMASK(31, 16),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map wcn3990_dst_wm_high = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map wcn3990_dst_wm_high = {</div><div class='ctx'> 	.msb	= 0x0000000f,</div><div class='ctx'> 	.lsb	= 0x00000000,</div><div class='ctx'> 	.mask	= GENMASK(15, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_dst_src_wm_regs wcn3990_wm_dst_ring = {</div><div class='add'>+static const struct ath10k_hw_ce_dst_src_wm_regs wcn3990_wm_dst_ring = {</div><div class='ctx'> 	.addr		= 0x00000050,</div><div class='ctx'> 	.low_rst	= 0x00000000,</div><div class='ctx'> 	.high_rst	= 0x00000000,</div><div class='hunk'>@@ -305,7 +305,7 @@ static struct ath10k_hw_ce_dst_src_wm_regs wcn3990_wm_dst_ring = {</div><div class='ctx'> 	.wm_high	= &amp;wcn3990_dst_wm_high,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_ctrl1_upd wcn3990_ctrl1_upd = {</div><div class='add'>+static const struct ath10k_hw_ce_ctrl1_upd wcn3990_ctrl1_upd = {</div><div class='ctx'> 	.shift = 19,</div><div class='ctx'> 	.mask = 0x00080000,</div><div class='ctx'> 	.enable = 0x00000000,</div><div class='hunk'>@@ -344,25 +344,25 @@ const struct ath10k_hw_values wcn3990_values = {</div><div class='ctx'> 	.ce_desc_meta_data_lsb		= 4,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map qcax_src_ring = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map qcax_src_ring = {</div><div class='ctx'> 	.msb	= 0x00000010,</div><div class='ctx'> 	.lsb	= 0x00000010,</div><div class='ctx'> 	.mask	= GENMASK(16, 16),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map qcax_dst_ring = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map qcax_dst_ring = {</div><div class='ctx'> 	.msb	= 0x00000011,</div><div class='ctx'> 	.lsb	= 0x00000011,</div><div class='ctx'> 	.mask	= GENMASK(17, 17),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map qcax_dmax = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map qcax_dmax = {</div><div class='ctx'> 	.msb	= 0x0000000f,</div><div class='ctx'> 	.lsb	= 0x00000000,</div><div class='ctx'> 	.mask	= GENMASK(15, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_ctrl1 qcax_ctrl1 = {</div><div class='add'>+static const struct ath10k_hw_ce_ctrl1 qcax_ctrl1 = {</div><div class='ctx'> 	.addr		= 0x00000010,</div><div class='ctx'> 	.hw_mask	= 0x0007ffff,</div><div class='ctx'> 	.sw_mask	= 0x0007ffff,</div><div class='hunk'>@@ -375,31 +375,31 @@ static struct ath10k_hw_ce_ctrl1 qcax_ctrl1 = {</div><div class='ctx'> 	.dmax		= &amp;qcax_dmax,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map qcax_cmd_halt_status = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map qcax_cmd_halt_status = {</div><div class='ctx'> 	.msb	= 0x00000003,</div><div class='ctx'> 	.lsb	= 0x00000003,</div><div class='ctx'> 	.mask	= GENMASK(3, 3),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_cmd_halt qcax_cmd_halt = {</div><div class='add'>+static const struct ath10k_hw_ce_cmd_halt qcax_cmd_halt = {</div><div class='ctx'> 	.msb		= 0x00000000,</div><div class='ctx'> 	.mask		= GENMASK(0, 0),</div><div class='ctx'> 	.status_reset	= 0x00000000,</div><div class='ctx'> 	.status		= &amp;qcax_cmd_halt_status,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map qcax_host_ie_cc = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map qcax_host_ie_cc = {</div><div class='ctx'> 	.msb	= 0x00000000,</div><div class='ctx'> 	.lsb	= 0x00000000,</div><div class='ctx'> 	.mask	= GENMASK(0, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_host_ie qcax_host_ie = {</div><div class='add'>+static const struct ath10k_hw_ce_host_ie qcax_host_ie = {</div><div class='ctx'> 	.copy_complete_reset	= 0x00000000,</div><div class='ctx'> 	.copy_complete		= &amp;qcax_host_ie_cc,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_host_wm_regs qcax_wm_reg = {</div><div class='add'>+static const struct ath10k_hw_ce_host_wm_regs qcax_wm_reg = {</div><div class='ctx'> 	.dstr_lmask	= 0x00000010,</div><div class='ctx'> 	.dstr_hmask	= 0x00000008,</div><div class='ctx'> 	.srcr_lmask	= 0x00000004,</div><div class='hunk'>@@ -409,7 +409,7 @@ static struct ath10k_hw_ce_host_wm_regs qcax_wm_reg = {</div><div class='ctx'> 	.addr		= 0x00000030,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_misc_regs qcax_misc_reg = {</div><div class='add'>+static const struct ath10k_hw_ce_misc_regs qcax_misc_reg = {</div><div class='ctx'> 	.axi_err	= 0x00000400,</div><div class='ctx'> 	.dstr_add_err	= 0x00000200,</div><div class='ctx'> 	.srcr_len_err	= 0x00000100,</div><div class='hunk'>@@ -420,19 +420,19 @@ static struct ath10k_hw_ce_misc_regs qcax_misc_reg = {</div><div class='ctx'> 	.addr		= 0x00000038,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map qcax_src_wm_low = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map qcax_src_wm_low = {</div><div class='ctx'> 	.msb    = 0x0000001f,</div><div class='ctx'> 	.lsb	= 0x00000010,</div><div class='ctx'> 	.mask	= GENMASK(31, 16),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map qcax_src_wm_high = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map qcax_src_wm_high = {</div><div class='ctx'> 	.msb	= 0x0000000f,</div><div class='ctx'> 	.lsb	= 0x00000000,</div><div class='ctx'> 	.mask	= GENMASK(15, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_dst_src_wm_regs qcax_wm_src_ring = {</div><div class='add'>+static const struct ath10k_hw_ce_dst_src_wm_regs qcax_wm_src_ring = {</div><div class='ctx'> 	.addr		= 0x0000004c,</div><div class='ctx'> 	.low_rst	= 0x00000000,</div><div class='ctx'> 	.high_rst	= 0x00000000,</div><div class='hunk'>@@ -440,18 +440,18 @@ static struct ath10k_hw_ce_dst_src_wm_regs qcax_wm_src_ring = {</div><div class='ctx'> 	.wm_high        = &amp;qcax_src_wm_high,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map qcax_dst_wm_low = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map qcax_dst_wm_low = {</div><div class='ctx'> 	.lsb	= 0x00000010,</div><div class='ctx'> 	.mask	= GENMASK(31, 16),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_regs_addr_map qcax_dst_wm_high = {</div><div class='add'>+static const struct ath10k_hw_ce_regs_addr_map qcax_dst_wm_high = {</div><div class='ctx'> 	.msb	= 0x0000000f,</div><div class='ctx'> 	.lsb	= 0x00000000,</div><div class='ctx'> 	.mask	= GENMASK(15, 0),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct ath10k_hw_ce_dst_src_wm_regs qcax_wm_dst_ring = {</div><div class='add'>+static const struct ath10k_hw_ce_dst_src_wm_regs qcax_wm_dst_ring = {</div><div class='ctx'> 	.addr		= 0x00000050,</div><div class='ctx'> 	.low_rst	= 0x00000000,</div><div class='ctx'> 	.high_rst	= 0x00000000,</div><div class='hunk'>@@ -590,6 +590,7 @@ void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,</div><div class='ctx'>  * function monitors and modifies the corresponding MAC registers.</div><div class='ctx'>  */</div><div class='ctx'> static void ath10k_hw_qca988x_set_coverage_class(struct ath10k *ar,</div><div class='add'>+						 int radio_idx,</div><div class='ctx'> 						 s16 value)</div><div class='ctx'> {</div><div class='ctx'> 	u32 slottime_reg;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h<br/>index 442091c6dfd2..da71dce9babf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/hw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/hw.h</a></div><div class='hunk'>@@ -289,19 +289,22 @@ struct ath10k_hw_ce_ctrl1 {</div><div class='ctx'> 	u32 sw_wr_mask;</div><div class='ctx'> 	u32 reset_mask;</div><div class='ctx'> 	u32 reset;</div><div class='del'>-	struct ath10k_hw_ce_regs_addr_map *src_ring;</div><div class='del'>-	struct ath10k_hw_ce_regs_addr_map *dst_ring;</div><div class='del'>-	struct ath10k_hw_ce_regs_addr_map *dmax; };</div><div class='add'>+	const struct ath10k_hw_ce_regs_addr_map *src_ring;</div><div class='add'>+	const struct ath10k_hw_ce_regs_addr_map *dst_ring;</div><div class='add'>+	const struct ath10k_hw_ce_regs_addr_map *dmax;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> struct ath10k_hw_ce_cmd_halt {</div><div class='ctx'> 	u32 status_reset;</div><div class='ctx'> 	u32 msb;</div><div class='ctx'> 	u32 mask;</div><div class='del'>-	struct ath10k_hw_ce_regs_addr_map *status; };</div><div class='add'>+	const struct ath10k_hw_ce_regs_addr_map *status;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> struct ath10k_hw_ce_host_ie {</div><div class='ctx'> 	u32 copy_complete_reset;</div><div class='del'>-	struct ath10k_hw_ce_regs_addr_map *copy_complete; };</div><div class='add'>+	const struct ath10k_hw_ce_regs_addr_map *copy_complete;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> struct ath10k_hw_ce_host_wm_regs {</div><div class='ctx'> 	u32 dstr_lmask;</div><div class='hunk'>@@ -328,8 +331,9 @@ struct ath10k_hw_ce_dst_src_wm_regs {</div><div class='ctx'> 	u32 addr;</div><div class='ctx'> 	u32 low_rst;</div><div class='ctx'> 	u32 high_rst;</div><div class='del'>-	struct ath10k_hw_ce_regs_addr_map *wm_low;</div><div class='del'>-	struct ath10k_hw_ce_regs_addr_map *wm_high; };</div><div class='add'>+	const struct ath10k_hw_ce_regs_addr_map *wm_low;</div><div class='add'>+	const struct ath10k_hw_ce_regs_addr_map *wm_high;</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> struct ath10k_hw_ce_ctrl1_upd {</div><div class='ctx'> 	u32 shift;</div><div class='hunk'>@@ -355,14 +359,14 @@ struct ath10k_hw_ce_regs {</div><div class='ctx'> 	u32 ce_rri_low;</div><div class='ctx'> 	u32 ce_rri_high;</div><div class='ctx'> 	u32 host_ie_addr;</div><div class='del'>-	struct ath10k_hw_ce_host_wm_regs *wm_regs;</div><div class='del'>-	struct ath10k_hw_ce_misc_regs *misc_regs;</div><div class='del'>-	struct ath10k_hw_ce_ctrl1 *ctrl1_regs;</div><div class='del'>-	struct ath10k_hw_ce_cmd_halt *cmd_halt;</div><div class='del'>-	struct ath10k_hw_ce_host_ie *host_ie;</div><div class='del'>-	struct ath10k_hw_ce_dst_src_wm_regs *wm_srcr;</div><div class='del'>-	struct ath10k_hw_ce_dst_src_wm_regs *wm_dstr;</div><div class='del'>-	struct ath10k_hw_ce_ctrl1_upd *upd;</div><div class='add'>+	const struct ath10k_hw_ce_host_wm_regs *wm_regs;</div><div class='add'>+	const struct ath10k_hw_ce_misc_regs *misc_regs;</div><div class='add'>+	const struct ath10k_hw_ce_ctrl1 *ctrl1_regs;</div><div class='add'>+	const struct ath10k_hw_ce_cmd_halt *cmd_halt;</div><div class='add'>+	const struct ath10k_hw_ce_host_ie *host_ie;</div><div class='add'>+	const struct ath10k_hw_ce_dst_src_wm_regs *wm_srcr;</div><div class='add'>+	const struct ath10k_hw_ce_dst_src_wm_regs *wm_dstr;</div><div class='add'>+	const struct ath10k_hw_ce_ctrl1_upd *upd;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath10k_hw_values {</div><div class='hunk'>@@ -469,8 +473,8 @@ enum ath10k_hw_cc_wraparound_type {</div><div class='ctx'> 	 */</div><div class='ctx'> 	ATH10K_HW_CC_WRAP_SHIFTED_ALL = 1,</div><div class='ctx'> </div><div class='del'>-	/* Each hw counter wrapsaround independently. When the</div><div class='del'>-	 * counter overflows the repestive counter is right shifted</div><div class='add'>+	/* Each hw counter wraps around independently. When the</div><div class='add'>+	 * counter overflows the respective counter is right shifted</div><div class='ctx'> 	 * by 1, i.e reset to 0x7fffffff, and other counters will be</div><div class='ctx'> 	 * running unaffected. In this type of wraparound, it should</div><div class='ctx'> 	 * be possible to report accurate Rx busy time unlike the</div><div class='hunk'>@@ -642,7 +646,7 @@ struct htt_rx_ring_rx_desc_offsets;</div><div class='ctx'> </div><div class='ctx'> /* Defines needed for Rx descriptor abstraction */</div><div class='ctx'> struct ath10k_hw_ops {</div><div class='del'>-	void (*set_coverage_class)(struct ath10k *ar, s16 value);</div><div class='add'>+	void (*set_coverage_class)(struct ath10k *ar, int radio_idx, s16 value);</div><div class='ctx'> 	int (*enable_pll_clk)(struct ath10k *ar);</div><div class='ctx'> 	int (*tx_data_rssi_pad_bytes)(struct htt_resp *htt);</div><div class='ctx'> 	int (*is_rssi_enable)(struct htt_resp *resp);</div><div class='hunk'>@@ -833,7 +837,7 @@ ath10k_is_rssi_enable(struct ath10k_hw_params *hw,</div><div class='ctx'> #define TARGET_10_4_NUM_TDLS_BUFFER_STA		1</div><div class='ctx'> #define TARGET_10_4_NUM_TDLS_SLEEP_STA		1</div><div class='ctx'> </div><div class='del'>-/* Maximum number of Copy Engine's supported */</div><div class='add'>+/* Maximum number of Copy Engines supported */</div><div class='ctx'> #define CE_COUNT_MAX 12</div><div class='ctx'> </div><div class='ctx'> /* Number of Copy Engines supported */</div><div class='hunk'>@@ -1130,7 +1134,7 @@ ath10k_is_rssi_enable(struct ath10k_hw_params *hw,</div><div class='ctx'> #define RTC_STATE_V_GET(x) (((x) &amp; RTC_STATE_V_MASK) &gt;&gt; RTC_STATE_V_LSB)</div><div class='ctx'> </div><div class='ctx'> /* Register definitions for first generation ath10k cards. These cards include</div><div class='del'>- * a mac thich has a register allocation similar to ath9k and at least some</div><div class='add'>+ * a mac which has a register allocation similar to ath9k and at least some</div><div class='ctx'>  * registers including the ones relevant for modifying the coverage class are</div><div class='ctx'>  * identical to the ath9k definitions.</div><div class='ctx'>  * These registers are usually managed by the ath10k firmware. However by</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/leds.c b/drivers/net/wireless/ath/ath10k/leds.c<br/>index 9b1d04eb4265..3a6c8111e7c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/leds.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/leds.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/leds.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/leds.c</a></div><div class='hunk'>@@ -27,7 +27,7 @@ static int ath10k_leds_set_brightness_blocking(struct led_classdev *led_cdev,</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	ar-&gt;leds.gpio_state_pin = (brightness != LED_OFF) ^ led-&gt;active_low;</div><div class='del'>-	ath10k_wmi_gpio_output(ar, led-&gt;gpio, ar-&gt;leds.gpio_state_pin);</div><div class='add'>+	ath10k_wmi_gpio_output(ar, ar-&gt;hw_params.led_pin, ar-&gt;leds.gpio_state_pin);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='hunk'>@@ -64,7 +64,6 @@ int ath10k_leds_register(struct ath10k *ar)</div><div class='ctx'> 	snprintf(ar-&gt;leds.label, sizeof(ar-&gt;leds.label), "ath10k-%s",</div><div class='ctx'> 		 wiphy_name(ar-&gt;hw-&gt;wiphy));</div><div class='ctx'> 	ar-&gt;leds.wifi_led.active_low = 1;</div><div class='del'>-	ar-&gt;leds.wifi_led.gpio = ar-&gt;hw_params.led_pin;</div><div class='ctx'> 	ar-&gt;leds.wifi_led.name = ar-&gt;leds.label;</div><div class='ctx'> 	ar-&gt;leds.wifi_led.default_state = LEDS_GPIO_DEFSTATE_KEEP;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/mac.c b/drivers/net/wireless/ath/ath10k/mac.c<br/>index 41ab83c3d3f7..da6f7957a0ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/mac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/mac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/mac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/mac.c</a></div><div class='hunk'>@@ -3,17 +3,19 @@</div><div class='ctx'>  * Copyright (c) 2005-2011 Atheros Communications Inc.</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "mac.h"</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;net/cfg80211.h&gt;</div><div class='ctx'> #include &lt;net/mac80211.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "hif.h"</div><div class='ctx'> #include "core.h"</div><div class='hunk'>@@ -288,8 +290,15 @@ static int ath10k_send_key(struct ath10k_vif *arvif,</div><div class='ctx'> 		key-&gt;flags |= IEEE80211_KEY_FLAG_GENERATE_IV;</div><div class='ctx'> </div><div class='ctx'> 	if (cmd == DISABLE_KEY) {</div><div class='del'>-		arg.key_cipher = ar-&gt;wmi_key_cipher[WMI_CIPHER_NONE];</div><div class='del'>-		arg.key_data = NULL;</div><div class='add'>+		if (flags &amp; WMI_KEY_GROUP) {</div><div class='add'>+			/* Not all hardware handles group-key deletion operation</div><div class='add'>+			 * correctly. Replace the key with a junk value to invalidate it.</div><div class='add'>+			 */</div><div class='add'>+			get_random_bytes(key-&gt;key, key-&gt;keylen);</div><div class='add'>+		} else {</div><div class='add'>+			arg.key_cipher = ar-&gt;wmi_key_cipher[WMI_CIPHER_NONE];</div><div class='add'>+			arg.key_data = NULL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ath10k_wmi_vdev_install_key(arvif-&gt;ar, &amp;arg);</div><div class='hunk'>@@ -875,7 +884,7 @@ static void ath10k_peer_map_cleanup(struct ath10k *ar, struct ath10k_peer *peer)</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(ar-&gt;peer_map); i++) {</div><div class='ctx'> 		if (ar-&gt;peer_map[i] == peer) {</div><div class='del'>-			ath10k_warn(ar, "removing stale peer_map entry for %pM (ptr %pK idx %d)\n",</div><div class='add'>+			ath10k_warn(ar, "removing stale peer_map entry for %pM (ptr %p idx %d)\n",</div><div class='ctx'> 				    peer-&gt;addr, peer, i);</div><div class='ctx'> 			ar-&gt;peer_map[i] = NULL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1022,6 +1031,26 @@ static inline int ath10k_vdev_setup_sync(struct ath10k *ar)</div><div class='ctx'> 	return ar-&gt;last_wmi_vdev_start_status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline int ath10k_vdev_delete_sync(struct ath10k *ar)</div><div class='add'>+{</div><div class='add'>+	unsigned long time_left;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ar-&gt;conf_mutex);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(WMI_SERVICE_SYNC_DELETE_CMDS, ar-&gt;wmi.svc_map))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ATH10K_FLAG_CRASH_FLUSH, &amp;ar-&gt;dev_flags))</div><div class='add'>+		return -ESHUTDOWN;</div><div class='add'>+</div><div class='add'>+	time_left = wait_for_completion_timeout(&amp;ar-&gt;vdev_delete_done,</div><div class='add'>+						ATH10K_VDEV_DELETE_TIMEOUT_HZ);</div><div class='add'>+	if (time_left == 0)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath10k_monitor_vdev_start(struct ath10k *ar, int vdev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct cfg80211_chan_def *chandef = NULL;</div><div class='hunk'>@@ -3363,7 +3392,7 @@ static int ath10k_update_channel_list(struct ath10k *ar)</div><div class='ctx'> 	struct ieee80211_supported_band **bands;</div><div class='ctx'> 	enum nl80211_band band;</div><div class='ctx'> 	struct ieee80211_channel *channel;</div><div class='del'>-	struct wmi_scan_chan_list_arg arg = {0};</div><div class='add'>+	struct wmi_scan_chan_list_arg arg = {};</div><div class='ctx'> 	struct wmi_channel_arg *ch;</div><div class='ctx'> 	bool passive;</div><div class='ctx'> 	int len;</div><div class='hunk'>@@ -4063,7 +4092,7 @@ static int ath10k_mac_tx(struct ath10k *ar,</div><div class='ctx'> </div><div class='ctx'> 	if (!noque_offchan &amp;&amp; info-&gt;flags &amp; IEEE80211_TX_CTL_TX_OFFCHAN) {</div><div class='ctx'> 		if (!ath10k_mac_tx_frm_has_freq(ar)) {</div><div class='del'>-			ath10k_dbg(ar, ATH10K_DBG_MAC, "mac queued offchannel skb %pK len %d\n",</div><div class='add'>+			ath10k_dbg(ar, ATH10K_DBG_MAC, "mac queued offchannel skb %p len %d\n",</div><div class='ctx'> 				   skb, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 			skb_queue_tail(&amp;ar-&gt;offchan_tx_queue, skb);</div><div class='hunk'>@@ -4126,7 +4155,7 @@ void ath10k_offchan_tx_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 		mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> </div><div class='del'>-		ath10k_dbg(ar, ATH10K_DBG_MAC, "mac offchannel skb %pK len %d\n",</div><div class='add'>+		ath10k_dbg(ar, ATH10K_DBG_MAC, "mac offchannel skb %p len %d\n",</div><div class='ctx'> 			   skb, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 		hdr = (struct ieee80211_hdr *)skb-&gt;data;</div><div class='hunk'>@@ -4181,7 +4210,7 @@ void ath10k_offchan_tx_work(struct work_struct *work)</div><div class='ctx'> 		time_left =</div><div class='ctx'> 		wait_for_completion_timeout(&amp;ar-&gt;offchan_tx_completed, 3 * HZ);</div><div class='ctx'> 		if (time_left == 0)</div><div class='del'>-			ath10k_warn(ar, "timed out waiting for offchannel skb %pK, len: %d\n",</div><div class='add'>+			ath10k_warn(ar, "timed out waiting for offchannel skb %p, len: %d\n",</div><div class='ctx'> 				    skb, skb-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 		if (!peer &amp;&amp; tmp_peer_created) {</div><div class='hunk'>@@ -4799,7 +4828,8 @@ void ath10k_halt(struct ath10k *ar)</div><div class='ctx'> 	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath10k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)</div><div class='add'>+static int ath10k_get_antenna(struct ieee80211_hw *hw, int radio_idx,</div><div class='add'>+			      u32 *tx_ant, u32 *rx_ant)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> </div><div class='hunk'>@@ -4862,7 +4892,7 @@ static int ath10k_mac_get_vht_cap_bf_sound_dim(struct ath10k *ar)</div><div class='ctx'> </div><div class='ctx'> static struct ieee80211_sta_vht_cap ath10k_create_vht_cap(struct ath10k *ar)</div><div class='ctx'> {</div><div class='del'>-	struct ieee80211_sta_vht_cap vht_cap = {0};</div><div class='add'>+	struct ieee80211_sta_vht_cap vht_cap = {};</div><div class='ctx'> 	struct ath10k_hw_params *hw = &amp;ar-&gt;hw_params;</div><div class='ctx'> 	u16 mcs_map;</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -4920,7 +4950,7 @@ static struct ieee80211_sta_vht_cap ath10k_create_vht_cap(struct ath10k *ar)</div><div class='ctx'> static struct ieee80211_sta_ht_cap ath10k_get_ht_cap(struct ath10k *ar)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	struct ieee80211_sta_ht_cap ht_cap = {0};</div><div class='add'>+	struct ieee80211_sta_ht_cap ht_cap = {};</div><div class='ctx'> </div><div class='ctx'> 	if (!(ar-&gt;ht_cap_info &amp; WMI_HT_CAP_ENABLED))</div><div class='ctx'> 		return ht_cap;</div><div class='hunk'>@@ -5046,7 +5076,8 @@ static int __ath10k_set_antenna(struct ath10k *ar, u32 tx_ant, u32 rx_ant)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath10k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)</div><div class='add'>+static int ath10k_set_antenna(struct ieee80211_hw *hw, int radio_idx,</div><div class='add'>+			      u32 tx_ant, u32 rx_ant)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -5151,7 +5182,7 @@ static int ath10k_start(struct ieee80211_hw *hw)</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> 	u32 param;</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	struct wmi_bb_timing_cfg_arg bb_timing = {0};</div><div class='add'>+	struct wmi_bb_timing_cfg_arg bb_timing = {};</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * This makes sense only when restarting hw. It is harmless to call</div><div class='hunk'>@@ -5396,6 +5427,7 @@ static void ath10k_stop(struct ieee80211_hw *hw, bool suspend)</div><div class='ctx'> 	cancel_work_sync(&amp;ar-&gt;set_coverage_class_work);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;ar-&gt;scan.timeout);</div><div class='ctx'> 	cancel_work_sync(&amp;ar-&gt;restart_work);</div><div class='add'>+	cancel_work_sync(&amp;ar-&gt;recovery_check_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath10k_config_ps(struct ath10k *ar)</div><div class='hunk'>@@ -5416,7 +5448,7 @@ static int ath10k_config_ps(struct ath10k *ar)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath10k_config(struct ieee80211_hw *hw, u32 changed)</div><div class='add'>+static int ath10k_config(struct ieee80211_hw *hw, int radio_idx, u32 changed)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> 	struct ieee80211_conf *conf = &amp;hw-&gt;conf;</div><div class='hunk'>@@ -5900,7 +5932,6 @@ static void ath10k_remove_interface(struct ieee80211_hw *hw,</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> 	struct ath10k_vif *arvif = (void *)vif-&gt;drv_priv;</div><div class='ctx'> 	struct ath10k_peer *peer;</div><div class='del'>-	unsigned long time_left;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -5940,13 +5971,10 @@ static void ath10k_remove_interface(struct ieee80211_hw *hw,</div><div class='ctx'> 		ath10k_warn(ar, "failed to delete WMI vdev %i: %d\n",</div><div class='ctx'> 			    arvif-&gt;vdev_id, ret);</div><div class='ctx'> </div><div class='del'>-	if (test_bit(WMI_SERVICE_SYNC_DELETE_CMDS, ar-&gt;wmi.svc_map)) {</div><div class='del'>-		time_left = wait_for_completion_timeout(&amp;ar-&gt;vdev_delete_done,</div><div class='del'>-							ATH10K_VDEV_DELETE_TIMEOUT_HZ);</div><div class='del'>-		if (time_left == 0) {</div><div class='del'>-			ath10k_warn(ar, "Timeout in receiving vdev delete response\n");</div><div class='del'>-			goto out;</div><div class='del'>-		}</div><div class='add'>+	ret = ath10k_vdev_delete_sync(ar);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath10k_warn(ar, "Error in receiving vdev delete response: %d\n", ret);</div><div class='add'>+		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Some firmware revisions don't notify host about self-peer removal</div><div class='hunk'>@@ -6319,7 +6347,8 @@ static void ath10k_bss_info_changed(struct ieee80211_hw *hw,</div><div class='ctx'> 	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ath10k_mac_op_set_coverage_class(struct ieee80211_hw *hw, s16 value)</div><div class='add'>+static void ath10k_mac_op_set_coverage_class(struct ieee80211_hw *hw, int radio_idx,</div><div class='add'>+					     s16 value)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> </div><div class='hunk'>@@ -6330,7 +6359,7 @@ static void ath10k_mac_op_set_coverage_class(struct ieee80211_hw *hw, s16 value)</div><div class='ctx'> 		WARN_ON_ONCE(1);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='del'>-	ar-&gt;hw_params.hw_ops-&gt;set_coverage_class(ar, value);</div><div class='add'>+	ar-&gt;hw_params.hw_ops-&gt;set_coverage_class(ar, -1, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> struct ath10k_mac_tdls_iter_data {</div><div class='hunk'>@@ -6369,7 +6398,7 @@ static int ath10k_hw_scan(struct ieee80211_hw *hw,</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> 	struct ath10k_vif *arvif = (void *)vif-&gt;drv_priv;</div><div class='ctx'> 	struct cfg80211_scan_request *req = &amp;hw_req-&gt;req;</div><div class='del'>-	struct wmi_start_scan_arg arg;</div><div class='add'>+	struct wmi_start_scan_arg *arg = NULL;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	u32 scan_timeout;</div><div class='hunk'>@@ -6402,56 +6431,61 @@ static int ath10k_hw_scan(struct ieee80211_hw *hw,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> </div><div class='del'>-	memset(&amp;arg, 0, sizeof(arg));</div><div class='del'>-	ath10k_wmi_start_scan_init(ar, &amp;arg);</div><div class='del'>-	arg.vdev_id = arvif-&gt;vdev_id;</div><div class='del'>-	arg.scan_id = ATH10K_SCAN_ID;</div><div class='add'>+	arg = kzalloc(sizeof(*arg), GFP_KERNEL);</div><div class='add'>+	if (!arg) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath10k_wmi_start_scan_init(ar, arg);</div><div class='add'>+	arg-&gt;vdev_id = arvif-&gt;vdev_id;</div><div class='add'>+	arg-&gt;scan_id = ATH10K_SCAN_ID;</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;ie_len) {</div><div class='del'>-		arg.ie_len = req-&gt;ie_len;</div><div class='del'>-		memcpy(arg.ie, req-&gt;ie, arg.ie_len);</div><div class='add'>+		arg-&gt;ie_len = req-&gt;ie_len;</div><div class='add'>+		memcpy(arg-&gt;ie, req-&gt;ie, arg-&gt;ie_len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;n_ssids) {</div><div class='del'>-		arg.n_ssids = req-&gt;n_ssids;</div><div class='del'>-		for (i = 0; i &lt; arg.n_ssids; i++) {</div><div class='del'>-			arg.ssids[i].len  = req-&gt;ssids[i].ssid_len;</div><div class='del'>-			arg.ssids[i].ssid = req-&gt;ssids[i].ssid;</div><div class='add'>+		arg-&gt;n_ssids = req-&gt;n_ssids;</div><div class='add'>+		for (i = 0; i &lt; arg-&gt;n_ssids; i++) {</div><div class='add'>+			arg-&gt;ssids[i].len  = req-&gt;ssids[i].ssid_len;</div><div class='add'>+			arg-&gt;ssids[i].ssid = req-&gt;ssids[i].ssid;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		arg.scan_ctrl_flags |= WMI_SCAN_FLAG_PASSIVE;</div><div class='add'>+		arg-&gt;scan_ctrl_flags |= WMI_SCAN_FLAG_PASSIVE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;flags &amp; NL80211_SCAN_FLAG_RANDOM_ADDR) {</div><div class='del'>-		arg.scan_ctrl_flags |=  WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ;</div><div class='del'>-		ether_addr_copy(arg.mac_addr.addr, req-&gt;mac_addr);</div><div class='del'>-		ether_addr_copy(arg.mac_mask.addr, req-&gt;mac_addr_mask);</div><div class='add'>+		arg-&gt;scan_ctrl_flags |=  WMI_SCAN_ADD_SPOOFED_MAC_IN_PROBE_REQ;</div><div class='add'>+		ether_addr_copy(arg-&gt;mac_addr.addr, req-&gt;mac_addr);</div><div class='add'>+		ether_addr_copy(arg-&gt;mac_mask.addr, req-&gt;mac_addr_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (req-&gt;n_channels) {</div><div class='del'>-		arg.n_channels = req-&gt;n_channels;</div><div class='del'>-		for (i = 0; i &lt; arg.n_channels; i++)</div><div class='del'>-			arg.channels[i] = req-&gt;channels[i]-&gt;center_freq;</div><div class='add'>+		arg-&gt;n_channels = req-&gt;n_channels;</div><div class='add'>+		for (i = 0; i &lt; arg-&gt;n_channels; i++)</div><div class='add'>+			arg-&gt;channels[i] = req-&gt;channels[i]-&gt;center_freq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* if duration is set, default dwell times will be overwritten */</div><div class='ctx'> 	if (req-&gt;duration) {</div><div class='del'>-		arg.dwell_time_active = req-&gt;duration;</div><div class='del'>-		arg.dwell_time_passive = req-&gt;duration;</div><div class='del'>-		arg.burst_duration_ms = req-&gt;duration;</div><div class='add'>+		arg-&gt;dwell_time_active = req-&gt;duration;</div><div class='add'>+		arg-&gt;dwell_time_passive = req-&gt;duration;</div><div class='add'>+		arg-&gt;burst_duration_ms = req-&gt;duration;</div><div class='ctx'> </div><div class='del'>-		scan_timeout = min_t(u32, arg.max_rest_time *</div><div class='del'>-				(arg.n_channels - 1) + (req-&gt;duration +</div><div class='add'>+		scan_timeout = min_t(u32, arg-&gt;max_rest_time *</div><div class='add'>+				(arg-&gt;n_channels - 1) + (req-&gt;duration +</div><div class='ctx'> 				ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD) *</div><div class='del'>-				arg.n_channels, arg.max_scan_time);</div><div class='add'>+				arg-&gt;n_channels, arg-&gt;max_scan_time);</div><div class='ctx'> 	} else {</div><div class='del'>-		scan_timeout = arg.max_scan_time;</div><div class='add'>+		scan_timeout = arg-&gt;max_scan_time;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Add a 200ms margin to account for event/command processing */</div><div class='ctx'> 	scan_timeout += 200;</div><div class='ctx'> </div><div class='del'>-	ret = ath10k_start_scan(ar, &amp;arg);</div><div class='add'>+	ret = ath10k_start_scan(ar, arg);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath10k_warn(ar, "failed to start hw scan: %d\n", ret);</div><div class='ctx'> 		spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='hunk'>@@ -6463,6 +6497,8 @@ static int ath10k_hw_scan(struct ieee80211_hw *hw,</div><div class='ctx'> 				     msecs_to_jiffies(scan_timeout));</div><div class='ctx'> </div><div class='ctx'> exit:</div><div class='add'>+	kfree(arg);</div><div class='add'>+</div><div class='ctx'> 	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -7597,7 +7633,7 @@ static int ath10k_sta_state(struct ieee80211_hw *hw,</div><div class='ctx'> 		 * Existing station deletion.</div><div class='ctx'> 		 */</div><div class='ctx'> 		ath10k_dbg(ar, ATH10K_DBG_STA,</div><div class='del'>-			   "mac vdev %d peer delete %pM sta %pK (sta gone)\n",</div><div class='add'>+			   "mac vdev %d peer delete %pM sta %p (sta gone)\n",</div><div class='ctx'> 			   arvif-&gt;vdev_id, sta-&gt;addr, sta);</div><div class='ctx'> </div><div class='ctx'> 		if (sta-&gt;tdls) {</div><div class='hunk'>@@ -7624,7 +7660,7 @@ static int ath10k_sta_state(struct ieee80211_hw *hw,</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			if (peer-&gt;sta == sta) {</div><div class='del'>-				ath10k_warn(ar, "found sta peer %pM (ptr %pK id %d) entry on vdev %i after it was supposedly removed\n",</div><div class='add'>+				ath10k_warn(ar, "found sta peer %pM (ptr %p id %d) entry on vdev %i after it was supposedly removed\n",</div><div class='ctx'> 					    sta-&gt;addr, peer, i, arvif-&gt;vdev_id);</div><div class='ctx'> 				peer-&gt;sta = NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -7899,7 +7935,7 @@ static int ath10k_remain_on_channel(struct ieee80211_hw *hw,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> 	struct ath10k_vif *arvif = (void *)vif-&gt;drv_priv;</div><div class='del'>-	struct wmi_start_scan_arg arg;</div><div class='add'>+	struct wmi_start_scan_arg *arg = NULL;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	u32 scan_time_msec;</div><div class='ctx'> </div><div class='hunk'>@@ -7936,20 +7972,25 @@ static int ath10k_remain_on_channel(struct ieee80211_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	scan_time_msec = ar-&gt;hw-&gt;wiphy-&gt;max_remain_on_channel_duration * 2;</div><div class='ctx'> </div><div class='del'>-	memset(&amp;arg, 0, sizeof(arg));</div><div class='del'>-	ath10k_wmi_start_scan_init(ar, &amp;arg);</div><div class='del'>-	arg.vdev_id = arvif-&gt;vdev_id;</div><div class='del'>-	arg.scan_id = ATH10K_SCAN_ID;</div><div class='del'>-	arg.n_channels = 1;</div><div class='del'>-	arg.channels[0] = chan-&gt;center_freq;</div><div class='del'>-	arg.dwell_time_active = scan_time_msec;</div><div class='del'>-	arg.dwell_time_passive = scan_time_msec;</div><div class='del'>-	arg.max_scan_time = scan_time_msec;</div><div class='del'>-	arg.scan_ctrl_flags |= WMI_SCAN_FLAG_PASSIVE;</div><div class='del'>-	arg.scan_ctrl_flags |= WMI_SCAN_FILTER_PROBE_REQ;</div><div class='del'>-	arg.burst_duration_ms = duration;</div><div class='del'>-</div><div class='del'>-	ret = ath10k_start_scan(ar, &amp;arg);</div><div class='add'>+	arg = kzalloc(sizeof(*arg), GFP_KERNEL);</div><div class='add'>+	if (!arg) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath10k_wmi_start_scan_init(ar, arg);</div><div class='add'>+	arg-&gt;vdev_id = arvif-&gt;vdev_id;</div><div class='add'>+	arg-&gt;scan_id = ATH10K_SCAN_ID;</div><div class='add'>+	arg-&gt;n_channels = 1;</div><div class='add'>+	arg-&gt;channels[0] = chan-&gt;center_freq;</div><div class='add'>+	arg-&gt;dwell_time_active = scan_time_msec;</div><div class='add'>+	arg-&gt;dwell_time_passive = scan_time_msec;</div><div class='add'>+	arg-&gt;max_scan_time = scan_time_msec;</div><div class='add'>+	arg-&gt;scan_ctrl_flags |= WMI_SCAN_FLAG_PASSIVE;</div><div class='add'>+	arg-&gt;scan_ctrl_flags |= WMI_SCAN_FILTER_PROBE_REQ;</div><div class='add'>+	arg-&gt;burst_duration_ms = duration;</div><div class='add'>+</div><div class='add'>+	ret = ath10k_start_scan(ar, arg);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath10k_warn(ar, "failed to start roc scan: %d\n", ret);</div><div class='ctx'> 		spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='hunk'>@@ -7975,6 +8016,8 @@ static int ath10k_remain_on_channel(struct ieee80211_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	ret = 0;</div><div class='ctx'> exit:</div><div class='add'>+	kfree(arg);</div><div class='add'>+</div><div class='ctx'> 	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -8004,7 +8047,8 @@ static int ath10k_cancel_remain_on_channel(struct ieee80211_hw *hw,</div><div class='ctx'>  * in ath10k, but device-specific in mac80211.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static int ath10k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)</div><div class='add'>+static int ath10k_set_rts_threshold(struct ieee80211_hw *hw, int radio_idx,</div><div class='add'>+				    u32 value)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> 	struct ath10k_vif *arvif;</div><div class='hunk'>@@ -8027,7 +8071,8 @@ static int ath10k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath10k_mac_op_set_frag_threshold(struct ieee80211_hw *hw, u32 value)</div><div class='add'>+static int ath10k_mac_op_set_frag_threshold(struct ieee80211_hw *hw,</div><div class='add'>+					    int radio_idx, u32 value)</div><div class='ctx'> {</div><div class='ctx'> 	/* Even though there's a WMI enum for fragmentation threshold no known</div><div class='ctx'> 	 * firmware actually implements it. Moreover it is not possible to rely</div><div class='hunk'>@@ -8125,7 +8170,12 @@ static void ath10k_reconfig_complete(struct ieee80211_hw *hw,</div><div class='ctx'> 		ath10k_info(ar, "device successfully recovered\n");</div><div class='ctx'> 		ar-&gt;state = ATH10K_STATE_ON;</div><div class='ctx'> 		ieee80211_wake_queues(ar-&gt;hw);</div><div class='del'>-		clear_bit(ATH10K_FLAG_RESTARTING, &amp;ar-&gt;dev_flags);</div><div class='add'>+</div><div class='add'>+		/* Clear recovery state. */</div><div class='add'>+		complete(&amp;ar-&gt;driver_recovery);</div><div class='add'>+		atomic_set(&amp;ar-&gt;fail_cont_count, 0);</div><div class='add'>+		atomic_set(&amp;ar-&gt;pending_recovery, 0);</div><div class='add'>+</div><div class='ctx'> 		if (ar-&gt;hw_params.hw_restart_disconnect) {</div><div class='ctx'> 			list_for_each_entry(arvif, &amp;ar-&gt;arvifs, list) {</div><div class='ctx'> 				if (arvif-&gt;is_up &amp;&amp; arvif-&gt;vdev_type == WMI_VDEV_TYPE_STA)</div><div class='hunk'>@@ -8797,7 +8847,7 @@ ath10k_mac_op_add_chanctx(struct ieee80211_hw *hw,</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_MAC,</div><div class='del'>-		   "mac chanctx add freq %u width %d ptr %pK\n",</div><div class='add'>+		   "mac chanctx add freq %u width %d ptr %p\n",</div><div class='ctx'> 		   ctx-&gt;def.chan-&gt;center_freq, ctx-&gt;def.width, ctx);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='hunk'>@@ -8821,7 +8871,7 @@ ath10k_mac_op_remove_chanctx(struct ieee80211_hw *hw,</div><div class='ctx'> 	struct ath10k *ar = hw-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_MAC,</div><div class='del'>-		   "mac chanctx remove freq %u width %d ptr %pK\n",</div><div class='add'>+		   "mac chanctx remove freq %u width %d ptr %p\n",</div><div class='ctx'> 		   ctx-&gt;def.chan-&gt;center_freq, ctx-&gt;def.width, ctx);</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='hunk'>@@ -8886,7 +8936,7 @@ ath10k_mac_op_change_chanctx(struct ieee80211_hw *hw,</div><div class='ctx'> 	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_MAC,</div><div class='del'>-		   "mac chanctx change freq %u width %d ptr %pK changed %x\n",</div><div class='add'>+		   "mac chanctx change freq %u width %d ptr %p changed %x\n",</div><div class='ctx'> 		   ctx-&gt;def.chan-&gt;center_freq, ctx-&gt;def.width, ctx, changed);</div><div class='ctx'> </div><div class='ctx'> 	/* This shouldn't really happen because channel switching should use</div><div class='hunk'>@@ -8945,7 +8995,7 @@ ath10k_mac_op_assign_vif_chanctx(struct ieee80211_hw *hw,</div><div class='ctx'> 	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_MAC,</div><div class='del'>-		   "mac chanctx assign ptr %pK vdev_id %i\n",</div><div class='add'>+		   "mac chanctx assign ptr %p vdev_id %i\n",</div><div class='ctx'> 		   ctx, arvif-&gt;vdev_id);</div><div class='ctx'> </div><div class='ctx'> 	if (WARN_ON(arvif-&gt;is_started)) {</div><div class='hunk'>@@ -9025,7 +9075,7 @@ ath10k_mac_op_unassign_vif_chanctx(struct ieee80211_hw *hw,</div><div class='ctx'> 	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_MAC,</div><div class='del'>-		   "mac chanctx unassign ptr %pK vdev_id %i\n",</div><div class='add'>+		   "mac chanctx unassign ptr %p vdev_id %i\n",</div><div class='ctx'> 		   ctx, arvif-&gt;vdev_id);</div><div class='ctx'> </div><div class='ctx'> 	WARN_ON(!arvif-&gt;is_started);</div><div class='hunk'>@@ -9122,7 +9172,7 @@ static const struct ath10k_index_vht_data_rate_type supported_vht_mcs_rate_nss1[</div><div class='ctx'> 	{6,  {2633, 2925}, {1215, 1350}, {585,  650} },</div><div class='ctx'> 	{7,  {2925, 3250}, {1350, 1500}, {650,  722} },</div><div class='ctx'> 	{8,  {3510, 3900}, {1620, 1800}, {780,  867} },</div><div class='del'>-	{9,  {3900, 4333}, {1800, 2000}, {780,  867} }</div><div class='add'>+	{9,  {3900, 4333}, {1800, 2000}, {865,  960} }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*MCS parameters with Nss = 2 */</div><div class='hunk'>@@ -9137,7 +9187,7 @@ static const struct ath10k_index_vht_data_rate_type supported_vht_mcs_rate_nss2[</div><div class='ctx'> 	{6,  {5265, 5850}, {2430, 2700}, {1170, 1300} },</div><div class='ctx'> 	{7,  {5850, 6500}, {2700, 3000}, {1300, 1444} },</div><div class='ctx'> 	{8,  {7020, 7800}, {3240, 3600}, {1560, 1733} },</div><div class='del'>-	{9,  {7800, 8667}, {3600, 4000}, {1560, 1733} }</div><div class='add'>+	{9,  {7800, 8667}, {3600, 4000}, {1730, 1920} }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void ath10k_mac_get_rate_flags_ht(struct ath10k *ar, u32 rate, u8 nss, u8 mcs,</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c<br/>index c52a16f8078f..97b49bf4ad80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/pci.c</a></div><div class='hunk'>@@ -3,6 +3,7 @@</div><div class='ctx'>  * Copyright (c) 2005-2011 Atheros Communications Inc.</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='hunk'>@@ -63,7 +64,7 @@ static const struct pci_device_id ath10k_pci_id_table[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(ATHEROS, QCA9984_1_0_DEVICE_ID) }, /* PCI-E QCA9984 V1 */</div><div class='ctx'> 	{ PCI_VDEVICE(ATHEROS, QCA9377_1_0_DEVICE_ID) }, /* PCI-E QCA9377 V1 */</div><div class='ctx'> 	{ PCI_VDEVICE(ATHEROS, QCA9887_1_0_DEVICE_ID) }, /* PCI-E QCA9887 */</div><div class='del'>-	{0}</div><div class='add'>+	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {</div><div class='hunk'>@@ -591,7 +592,7 @@ skip:</div><div class='ctx'> </div><div class='ctx'> static void ath10k_pci_ps_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_pci *ar_pci = from_timer(ar_pci, t, ps_timer);</div><div class='add'>+	struct ath10k_pci *ar_pci = timer_container_of(ar_pci, t, ps_timer);</div><div class='ctx'> 	struct ath10k *ar = ar_pci-&gt;ar;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -619,7 +620,7 @@ static void ath10k_pci_sleep_sync(struct ath10k *ar)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ar_pci-&gt;ps_timer);</div><div class='add'>+	timer_delete_sync(&amp;ar_pci-&gt;ps_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;ar_pci-&gt;ps_lock, flags);</div><div class='ctx'> 	WARN_ON(ar_pci-&gt;ps_wake_refcount &gt; 0);</div><div class='hunk'>@@ -844,7 +845,8 @@ void ath10k_pci_rx_post(struct ath10k *ar)</div><div class='ctx'> </div><div class='ctx'> void ath10k_pci_rx_replenish_retry(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_pci *ar_pci = from_timer(ar_pci, t, rx_post_retry);</div><div class='add'>+	struct ath10k_pci *ar_pci = timer_container_of(ar_pci, t,</div><div class='add'>+						       rx_post_retry);</div><div class='ctx'> 	struct ath10k *ar = ar_pci-&gt;ar;</div><div class='ctx'> </div><div class='ctx'> 	ath10k_pci_rx_post(ar);</div><div class='hunk'>@@ -1817,7 +1819,7 @@ static void ath10k_pci_rx_retry_sync(struct ath10k *ar)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ar_pci-&gt;rx_post_retry);</div><div class='add'>+	timer_delete_sync(&amp;ar_pci-&gt;rx_post_retry);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ath10k_pci_hif_map_service_to_pipe(struct ath10k *ar, u16 service_id,</div><div class='hunk'>@@ -3411,7 +3413,7 @@ static int ath10k_pci_claim(struct ath10k *ar)</div><div class='ctx'> 		goto err_region;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot pci_mem 0x%pK\n", ar_pci-&gt;mem);</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot pci_mem 0x%p\n", ar_pci-&gt;mem);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_region:</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/qmi.c b/drivers/net/wireless/ath/ath10k/qmi.c<br/>index f1f33af0170a..8275345631a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/qmi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/qmi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/qmi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/qmi.c</a></div><div class='hunk'>@@ -986,7 +986,7 @@ static int ath10k_qmi_new_server(struct qmi_handle *qmi_hdl,</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_QMI, "wifi fw qmi service found\n");</div><div class='ctx'> </div><div class='del'>-	ret = kernel_connect(qmi_hdl-&gt;sock, (struct sockaddr *)&amp;qmi-&gt;sq,</div><div class='add'>+	ret = kernel_connect(qmi_hdl-&gt;sock, (struct sockaddr_unsized *)&amp;qmi-&gt;sq,</div><div class='ctx'> 			     sizeof(qmi-&gt;sq), 0);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath10k_err(ar, "failed to connect to a remote QMI service port\n");</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/sdio.c b/drivers/net/wireless/ath/ath10k/sdio.c<br/>index 08a6f36a6be9..c06d50db40b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/sdio.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/sdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/sdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/sdio.c</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * Copyright (c) 2004-2011 Atheros Communications Inc.</div><div class='ctx'>  * Copyright (c) 2011-2012,2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2016-2017 Erik Stromdahl &lt;erik.stromdahl@gmail.com&gt;</div><div class='del'>- * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -1447,7 +1447,8 @@ release:</div><div class='ctx'> </div><div class='ctx'> static void ath10k_sdio_sleep_timer_handler(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_sdio *ar_sdio = from_timer(ar_sdio, t, sleep_timer);</div><div class='add'>+	struct ath10k_sdio *ar_sdio = timer_container_of(ar_sdio, t,</div><div class='add'>+							 sleep_timer);</div><div class='ctx'> </div><div class='ctx'> 	ar_sdio-&gt;mbox_state = SDIO_MBOX_REQUEST_TO_SLEEP_STATE;</div><div class='ctx'> 	queue_work(ar_sdio-&gt;workqueue, &amp;ar_sdio-&gt;wr_async_work);</div><div class='hunk'>@@ -1621,7 +1622,7 @@ static void ath10k_sdio_hif_power_down(struct ath10k *ar)</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "sdio power off\n");</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ar_sdio-&gt;sleep_timer);</div><div class='add'>+	timer_delete_sync(&amp;ar_sdio-&gt;sleep_timer);</div><div class='ctx'> 	ath10k_sdio_set_mbox_sleep(ar, true);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable the card */</div><div class='hunk'>@@ -1844,7 +1845,7 @@ static int ath10k_sdio_get_htt_tx_complete(struct ath10k *ar)</div><div class='ctx'> 	ret = ath10k_sdio_diag_read32(ar, addr, &amp;val);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath10k_warn(ar,</div><div class='del'>-			    "unable to read hi_acs_flags for htt tx comple : %d\n", ret);</div><div class='add'>+			    "unable to read hi_acs_flags for htt tx complete: %d\n", ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2648,9 +2649,9 @@ static void ath10k_sdio_remove(struct sdio_func *func)</div><div class='ctx'> </div><div class='ctx'> 	netif_napi_del(&amp;ar-&gt;napi);</div><div class='ctx'> </div><div class='del'>-	ath10k_core_destroy(ar);</div><div class='del'>-</div><div class='ctx'> 	destroy_workqueue(ar_sdio-&gt;workqueue);</div><div class='add'>+</div><div class='add'>+	ath10k_core_destroy(ar);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct sdio_device_id ath10k_sdio_devices[] = {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/snoc.c b/drivers/net/wireless/ath/ath10k/snoc.c<br/>index 0fe47d51013c..b3f6424c17d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/snoc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/snoc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/snoc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/snoc.c</a></div><div class='hunk'>@@ -13,7 +13,7 @@</div><div class='ctx'> #include &lt;linux/property.h&gt;</div><div class='ctx'> #include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/remoteproc/qcom_rproc.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_reserved_mem.h&gt;</div><div class='ctx'> #include &lt;linux/iommu.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "ce.h"</div><div class='hunk'>@@ -644,7 +644,8 @@ static void ath10k_snoc_htt_rx_cb(struct ath10k_ce_pipe *ce_state)</div><div class='ctx'> </div><div class='ctx'> static void ath10k_snoc_rx_replenish_retry(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ath10k_snoc *ar_snoc = from_timer(ar_snoc, t, rx_post_retry);</div><div class='add'>+	struct ath10k_snoc *ar_snoc = timer_container_of(ar_snoc, t,</div><div class='add'>+							 rx_post_retry);</div><div class='ctx'> 	struct ath10k *ar = ar_snoc-&gt;ar;</div><div class='ctx'> </div><div class='ctx'> 	ath10k_snoc_rx_post(ar);</div><div class='hunk'>@@ -911,7 +912,7 @@ static void ath10k_snoc_buffer_cleanup(struct ath10k *ar)</div><div class='ctx'> 	struct ath10k_snoc_pipe *pipe_info;</div><div class='ctx'> 	int pipe_num;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ar_snoc-&gt;rx_post_retry);</div><div class='add'>+	timer_delete_sync(&amp;ar_snoc-&gt;rx_post_retry);</div><div class='ctx'> 	for (pipe_num = 0; pipe_num &lt; CE_COUNT; pipe_num++) {</div><div class='ctx'> 		pipe_info = &amp;ar_snoc-&gt;pipe_info[pipe_num];</div><div class='ctx'> 		ath10k_snoc_rx_pipe_cleanup(pipe_info);</div><div class='hunk'>@@ -935,9 +936,11 @@ static int ath10k_snoc_hif_start(struct ath10k *ar)</div><div class='ctx'> </div><div class='ctx'> 	bitmap_clear(ar_snoc-&gt;pending_ce_irqs, 0, CE_COUNT_MAX);</div><div class='ctx'> </div><div class='del'>-	dev_set_threaded(ar-&gt;napi_dev, true);</div><div class='add'>+	netif_threaded_enable(ar-&gt;napi_dev);</div><div class='ctx'> 	ath10k_core_napi_enable(ar);</div><div class='del'>-	ath10k_snoc_irq_enable(ar);</div><div class='add'>+	/* IRQs are left enabled when we restart due to a firmware crash */</div><div class='add'>+	if (!test_bit(ATH10K_SNOC_FLAG_RECOVERY, &amp;ar_snoc-&gt;flags))</div><div class='add'>+		ath10k_snoc_irq_enable(ar);</div><div class='ctx'> 	ath10k_snoc_rx_post(ar);</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(ATH10K_SNOC_FLAG_RECOVERY, &amp;ar_snoc-&gt;flags);</div><div class='hunk'>@@ -1556,19 +1559,11 @@ static void ath10k_modem_deinit(struct ath10k *ar)</div><div class='ctx'> static int ath10k_setup_msa_resources(struct ath10k *ar, u32 msa_size)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = ar-&gt;dev;</div><div class='del'>-	struct device_node *node;</div><div class='ctx'> 	struct resource r;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	node = of_parse_phandle(dev-&gt;of_node, "memory-region", 0);</div><div class='del'>-	if (node) {</div><div class='del'>-		ret = of_address_to_resource(node, 0, &amp;r);</div><div class='del'>-		of_node_put(node);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(dev, "failed to resolve msa fixed region\n");</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='add'>+	ret = of_reserved_mem_region_to_resource(dev-&gt;of_node, 0, &amp;r);</div><div class='add'>+	if (!ret) {</div><div class='ctx'> 		ar-&gt;msa.paddr = r.start;</div><div class='ctx'> 		ar-&gt;msa.mem_size = resource_size(&amp;r);</div><div class='ctx'> 		ar-&gt;msa.vaddr = devm_memremap(dev, ar-&gt;msa.paddr,</div><div class='hunk'>@@ -1885,11 +1880,11 @@ static void ath10k_snoc_shutdown(struct platform_device *pdev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver ath10k_snoc_driver = {</div><div class='del'>-	.probe  = ath10k_snoc_probe,</div><div class='del'>-	.remove_new = ath10k_snoc_remove,</div><div class='add'>+	.probe = ath10k_snoc_probe,</div><div class='add'>+	.remove = ath10k_snoc_remove,</div><div class='ctx'> 	.shutdown = ath10k_snoc_shutdown,</div><div class='ctx'> 	.driver = {</div><div class='del'>-		.name   = "ath10k_snoc",</div><div class='add'>+		.name = "ath10k_snoc",</div><div class='ctx'> 		.of_match_table = ath10k_snoc_dt_match,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/testmode.c b/drivers/net/wireless/ath/ath10k/testmode.c<br/>index 7a9b9bbcdbfc..d3bd385694d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/testmode.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/testmode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/testmode.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/testmode.c</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: ISC</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2014-2017 Qualcomm Atheros, Inc.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "testmode.h"</div><div class='hunk'>@@ -10,12 +11,17 @@</div><div class='ctx'> </div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "wmi.h"</div><div class='add'>+#include "wmi-tlv.h"</div><div class='ctx'> #include "hif.h"</div><div class='ctx'> #include "hw.h"</div><div class='ctx'> #include "core.h"</div><div class='ctx'> </div><div class='ctx'> #include "testmode_i.h"</div><div class='ctx'> </div><div class='add'>+#define ATH10K_FTM_SEG_NONE			((u32)-1)</div><div class='add'>+#define ATH10K_FTM_SEGHDR_CURRENT_SEQ		GENMASK(3, 0)</div><div class='add'>+#define ATH10K_FTM_SEGHDR_TOTAL_SEGMENTS	GENMASK(7, 4)</div><div class='add'>+</div><div class='ctx'> static const struct nla_policy ath10k_tm_policy[ATH10K_TM_ATTR_MAX + 1] = {</div><div class='ctx'> 	[ATH10K_TM_ATTR_CMD]		= { .type = NLA_U32 },</div><div class='ctx'> 	[ATH10K_TM_ATTR_DATA]		= { .type = NLA_BINARY,</div><div class='hunk'>@@ -25,41 +31,19 @@ static const struct nla_policy ath10k_tm_policy[ATH10K_TM_ATTR_MAX + 1] = {</div><div class='ctx'> 	[ATH10K_TM_ATTR_VERSION_MINOR]	= { .type = NLA_U32 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Returns true if callee consumes the skb and the skb should be discarded.</div><div class='del'>- * Returns false if skb is not used. Does not sleep.</div><div class='del'>- */</div><div class='del'>-bool ath10k_tm_event_wmi(struct ath10k *ar, u32 cmd_id, struct sk_buff *skb)</div><div class='add'>+static void ath10k_tm_event_unsegmented(struct ath10k *ar, u32 cmd_id,</div><div class='add'>+					struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *nl_skb;</div><div class='del'>-	bool consumed;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ath10k_dbg(ar, ATH10K_DBG_TESTMODE,</div><div class='del'>-		   "testmode event wmi cmd_id %d skb %pK skb-&gt;len %d\n",</div><div class='del'>-		   cmd_id, skb, skb-&gt;len);</div><div class='del'>-</div><div class='del'>-	ath10k_dbg_dump(ar, ATH10K_DBG_TESTMODE, NULL, "", skb-&gt;data, skb-&gt;len);</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-</div><div class='del'>-	if (!ar-&gt;testmode.utf_monitor) {</div><div class='del'>-		consumed = false;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Only testmode.c should be handling events from utf firmware,</div><div class='del'>-	 * otherwise all sort of problems will arise as mac80211 operations</div><div class='del'>-	 * are not initialised.</div><div class='del'>-	 */</div><div class='del'>-	consumed = true;</div><div class='del'>-</div><div class='ctx'> 	nl_skb = cfg80211_testmode_alloc_event_skb(ar-&gt;hw-&gt;wiphy,</div><div class='ctx'> 						   2 * sizeof(u32) + skb-&gt;len,</div><div class='ctx'> 						   GFP_ATOMIC);</div><div class='ctx'> 	if (!nl_skb) {</div><div class='ctx'> 		ath10k_warn(ar,</div><div class='ctx'> 			    "failed to allocate skb for testmode wmi event\n");</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = nla_put_u32(nl_skb, ATH10K_TM_ATTR_CMD, ATH10K_TM_CMD_WMI);</div><div class='hunk'>@@ -68,7 +52,7 @@ bool ath10k_tm_event_wmi(struct ath10k *ar, u32 cmd_id, struct sk_buff *skb)</div><div class='ctx'> 			    "failed to put testmode wmi event cmd attribute: %d\n",</div><div class='ctx'> 			    ret);</div><div class='ctx'> 		kfree_skb(nl_skb);</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = nla_put_u32(nl_skb, ATH10K_TM_ATTR_WMI_CMDID, cmd_id);</div><div class='hunk'>@@ -77,7 +61,7 @@ bool ath10k_tm_event_wmi(struct ath10k *ar, u32 cmd_id, struct sk_buff *skb)</div><div class='ctx'> 			    "failed to put testmode wmi event cmd_id: %d\n",</div><div class='ctx'> 			    ret);</div><div class='ctx'> 		kfree_skb(nl_skb);</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = nla_put(nl_skb, ATH10K_TM_ATTR_DATA, skb-&gt;len, skb-&gt;data);</div><div class='hunk'>@@ -86,10 +70,122 @@ bool ath10k_tm_event_wmi(struct ath10k *ar, u32 cmd_id, struct sk_buff *skb)</div><div class='ctx'> 			    "failed to copy skb to testmode wmi event: %d\n",</div><div class='ctx'> 			    ret);</div><div class='ctx'> 		kfree_skb(nl_skb);</div><div class='del'>-		goto out;</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cfg80211_testmode_event(nl_skb, GFP_ATOMIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath10k_tm_event_segmented(struct ath10k *ar, u32 cmd_id, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct wmi_ftm_cmd *ftm = (struct wmi_ftm_cmd *)skb-&gt;data;</div><div class='add'>+	u8 total_segments, current_seq;</div><div class='add'>+	struct sk_buff *nl_skb;</div><div class='add'>+	u8 const *buf_pos;</div><div class='add'>+	u16 datalen;</div><div class='add'>+	u32 data_pos;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;len &lt; sizeof(*ftm)) {</div><div class='add'>+		ath10k_warn(ar, "Invalid ftm event length: %d\n", skb-&gt;len);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	current_seq = FIELD_GET(ATH10K_FTM_SEGHDR_CURRENT_SEQ,</div><div class='add'>+				__le32_to_cpu(ftm-&gt;seg_hdr.segmentinfo));</div><div class='add'>+	total_segments = FIELD_GET(ATH10K_FTM_SEGHDR_TOTAL_SEGMENTS,</div><div class='add'>+				   __le32_to_cpu(ftm-&gt;seg_hdr.segmentinfo));</div><div class='add'>+	datalen = skb-&gt;len - sizeof(*ftm);</div><div class='add'>+	buf_pos = ftm-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (current_seq == 0) {</div><div class='add'>+		ar-&gt;testmode.expected_seq = 0;</div><div class='add'>+		ar-&gt;testmode.data_pos = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data_pos = ar-&gt;testmode.data_pos;</div><div class='add'>+</div><div class='add'>+	if ((data_pos + datalen) &gt; ATH_FTM_EVENT_MAX_BUF_LENGTH) {</div><div class='add'>+		ath10k_warn(ar, "Invalid ftm event length at %u: %u\n",</div><div class='add'>+			    data_pos, datalen);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;ar-&gt;testmode.eventdata[data_pos], buf_pos, datalen);</div><div class='add'>+	data_pos += datalen;</div><div class='add'>+</div><div class='add'>+	if (++ar-&gt;testmode.expected_seq != total_segments) {</div><div class='add'>+		ar-&gt;testmode.data_pos = data_pos;</div><div class='add'>+		ath10k_dbg(ar, ATH10K_DBG_TESTMODE, "partial data received %u/%u\n",</div><div class='add'>+			   current_seq + 1, total_segments);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_TESTMODE, "total data length %u\n", data_pos);</div><div class='add'>+</div><div class='add'>+	nl_skb = cfg80211_testmode_alloc_event_skb(ar-&gt;hw-&gt;wiphy,</div><div class='add'>+						   2 * sizeof(u32) + data_pos,</div><div class='add'>+						   GFP_ATOMIC);</div><div class='add'>+	if (!nl_skb) {</div><div class='add'>+		ath10k_warn(ar, "failed to allocate skb for testmode wmi event\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = nla_put_u32(nl_skb, ATH10K_TM_ATTR_CMD, ATH10K_TM_CMD_TLV);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath10k_warn(ar, "failed to put testmode wmi event attribute: %d\n", ret);</div><div class='add'>+		kfree_skb(nl_skb);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = nla_put_u32(nl_skb, ATH10K_TM_ATTR_WMI_CMDID, cmd_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath10k_warn(ar, "failed to put testmode wmi event cmd_id: %d\n", ret);</div><div class='add'>+		kfree_skb(nl_skb);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = nla_put(nl_skb, ATH10K_TM_ATTR_DATA, data_pos, &amp;ar-&gt;testmode.eventdata[0]);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath10k_warn(ar, "failed to copy skb to testmode wmi event: %d\n", ret);</div><div class='add'>+		kfree_skb(nl_skb);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfg80211_testmode_event(nl_skb, GFP_ATOMIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Returns true if callee consumes the skb and the skb should be discarded.</div><div class='add'>+ * Returns false if skb is not used. Does not sleep.</div><div class='add'>+ */</div><div class='add'>+bool ath10k_tm_event_wmi(struct ath10k *ar, u32 cmd_id, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	bool consumed;</div><div class='add'>+</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_TESTMODE,</div><div class='add'>+		   "testmode event wmi cmd_id %d skb %p skb-&gt;len %d\n",</div><div class='add'>+		   cmd_id, skb, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+	ath10k_dbg_dump(ar, ATH10K_DBG_TESTMODE, NULL, "", skb-&gt;data, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='add'>+	if (!ar-&gt;testmode.utf_monitor) {</div><div class='add'>+		consumed = false;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Only testmode.c should be handling events from utf firmware,</div><div class='add'>+	 * otherwise all sort of problems will arise as mac80211 operations</div><div class='add'>+	 * are not initialised.</div><div class='add'>+	 */</div><div class='add'>+	consumed = true;</div><div class='add'>+</div><div class='add'>+	if (ar-&gt;testmode.expected_seq != ATH10K_FTM_SEG_NONE)</div><div class='add'>+		ath10k_tm_event_segmented(ar, cmd_id, skb);</div><div class='add'>+	else</div><div class='add'>+		ath10k_tm_event_unsegmented(ar, cmd_id, skb);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='hunk'>@@ -281,12 +377,18 @@ static int ath10k_tm_cmd_utf_start(struct ath10k *ar, struct nlattr *tb[])</div><div class='ctx'> 		goto err_release_utf_mode_fw;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ar-&gt;testmode.eventdata = kzalloc(ATH_FTM_EVENT_MAX_BUF_LENGTH, GFP_KERNEL);</div><div class='add'>+	if (!ar-&gt;testmode.eventdata) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_power_down;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_UTF,</div><div class='ctx'> 				&amp;ar-&gt;testmode.utf_mode_fw);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath10k_err(ar, "failed to start core (testmode): %d\n", ret);</div><div class='ctx'> 		ar-&gt;state = ATH10K_STATE_OFF;</div><div class='del'>-		goto err_power_down;</div><div class='add'>+		goto err_release_eventdata;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ar-&gt;state = ATH10K_STATE_UTF;</div><div class='hunk'>@@ -302,6 +404,10 @@ static int ath10k_tm_cmd_utf_start(struct ath10k *ar, struct nlattr *tb[])</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_release_eventdata:</div><div class='add'>+	kfree(ar-&gt;testmode.eventdata);</div><div class='add'>+	ar-&gt;testmode.eventdata = NULL;</div><div class='add'>+</div><div class='ctx'> err_power_down:</div><div class='ctx'> 	ath10k_hif_power_down(ar);</div><div class='ctx'> </div><div class='hunk'>@@ -341,6 +447,9 @@ static void __ath10k_tm_cmd_utf_stop(struct ath10k *ar)</div><div class='ctx'> 	release_firmware(ar-&gt;testmode.utf_mode_fw.fw_file.firmware);</div><div class='ctx'> 	ar-&gt;testmode.utf_mode_fw.fw_file.firmware = NULL;</div><div class='ctx'> </div><div class='add'>+	kfree(ar-&gt;testmode.eventdata);</div><div class='add'>+	ar-&gt;testmode.eventdata = NULL;</div><div class='add'>+</div><div class='ctx'> 	ar-&gt;state = ATH10K_STATE_OFF;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -397,7 +506,7 @@ static int ath10k_tm_cmd_wmi(struct ath10k *ar, struct nlattr *tb[])</div><div class='ctx'> 	cmd_id = nla_get_u32(tb[ATH10K_TM_ATTR_WMI_CMDID]);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_TESTMODE,</div><div class='del'>-		   "testmode cmd wmi cmd_id %d buf %pK buf_len %d\n",</div><div class='add'>+		   "testmode cmd wmi cmd_id %d buf %p buf_len %d\n",</div><div class='ctx'> 		   cmd_id, buf, buf_len);</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg_dump(ar, ATH10K_DBG_TESTMODE, NULL, "", buf, buf_len);</div><div class='hunk'>@@ -424,6 +533,85 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ath10k_tm_cmd_tlv(struct ath10k *ar, struct nlattr *tb[])</div><div class='add'>+{</div><div class='add'>+	u16 total_bytes, num_segments;</div><div class='add'>+	u32 cmd_id, buf_len;</div><div class='add'>+	u8 segnumber = 0;</div><div class='add'>+	u8 *bufpos;</div><div class='add'>+	void *buf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='add'>+</div><div class='add'>+	if (ar-&gt;state != ATH10K_STATE_UTF) {</div><div class='add'>+		ret = -ENETDOWN;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buf = nla_data(tb[ATH10K_TM_ATTR_DATA]);</div><div class='add'>+	buf_len = nla_len(tb[ATH10K_TM_ATTR_DATA]);</div><div class='add'>+	cmd_id = WMI_PDEV_UTF_CMDID;</div><div class='add'>+</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_TESTMODE,</div><div class='add'>+		   "cmd wmi ftm cmd_id %d buffer length %d\n",</div><div class='add'>+		   cmd_id, buf_len);</div><div class='add'>+	ath10k_dbg_dump(ar, ATH10K_DBG_TESTMODE, NULL, "", buf, buf_len);</div><div class='add'>+</div><div class='add'>+	bufpos = buf;</div><div class='add'>+	total_bytes = buf_len;</div><div class='add'>+	num_segments = total_bytes / MAX_WMI_UTF_LEN;</div><div class='add'>+	ar-&gt;testmode.expected_seq = 0;</div><div class='add'>+</div><div class='add'>+	if (buf_len - (num_segments * MAX_WMI_UTF_LEN))</div><div class='add'>+		num_segments++;</div><div class='add'>+</div><div class='add'>+	while (buf_len) {</div><div class='add'>+		u16 chunk_len = min_t(u16, buf_len, MAX_WMI_UTF_LEN);</div><div class='add'>+		struct wmi_ftm_cmd *ftm_cmd;</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+		u32 hdr_info;</div><div class='add'>+		u8 seginfo;</div><div class='add'>+</div><div class='add'>+		skb = ath10k_wmi_alloc_skb(ar, (chunk_len +</div><div class='add'>+					   sizeof(struct wmi_ftm_cmd)));</div><div class='add'>+		if (!skb) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ftm_cmd = (struct wmi_ftm_cmd *)skb-&gt;data;</div><div class='add'>+		hdr_info = FIELD_PREP(WMI_TLV_TAG, WMI_TLV_TAG_ARRAY_BYTE) |</div><div class='add'>+			   FIELD_PREP(WMI_TLV_LEN, (chunk_len +</div><div class='add'>+				      sizeof(struct wmi_ftm_seg_hdr)));</div><div class='add'>+		ftm_cmd-&gt;tlv_header = __cpu_to_le32(hdr_info);</div><div class='add'>+		ftm_cmd-&gt;seg_hdr.len = __cpu_to_le32(total_bytes);</div><div class='add'>+		ftm_cmd-&gt;seg_hdr.msgref = __cpu_to_le32(ar-&gt;testmode.ftm_msgref);</div><div class='add'>+		seginfo = FIELD_PREP(ATH10K_FTM_SEGHDR_TOTAL_SEGMENTS, num_segments) |</div><div class='add'>+			  FIELD_PREP(ATH10K_FTM_SEGHDR_CURRENT_SEQ, segnumber);</div><div class='add'>+		ftm_cmd-&gt;seg_hdr.segmentinfo = __cpu_to_le32(seginfo);</div><div class='add'>+		segnumber++;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;ftm_cmd-&gt;data, bufpos, chunk_len);</div><div class='add'>+</div><div class='add'>+		ret = ath10k_wmi_cmd_send(ar, skb, cmd_id);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath10k_warn(ar, "failed to send wmi ftm command: %d\n", ret);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		buf_len -= chunk_len;</div><div class='add'>+		bufpos += chunk_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ar-&gt;testmode.ftm_msgref++;</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ath10k_tm_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,</div><div class='ctx'> 		  void *data, int len)</div><div class='ctx'> {</div><div class='hunk'>@@ -439,9 +627,14 @@ int ath10k_tm_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,</div><div class='ctx'> 	if (!tb[ATH10K_TM_ATTR_CMD])</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	ar-&gt;testmode.expected_seq = ATH10K_FTM_SEG_NONE;</div><div class='add'>+</div><div class='ctx'> 	switch (nla_get_u32(tb[ATH10K_TM_ATTR_CMD])) {</div><div class='ctx'> 	case ATH10K_TM_CMD_GET_VERSION:</div><div class='del'>-		return ath10k_tm_cmd_get_version(ar, tb);</div><div class='add'>+		if (!tb[ATH10K_TM_ATTR_DATA])</div><div class='add'>+			return ath10k_tm_cmd_get_version(ar, tb);</div><div class='add'>+		else /* ATH10K_TM_CMD_TLV */</div><div class='add'>+			return ath10k_tm_cmd_tlv(ar, tb);</div><div class='ctx'> 	case ATH10K_TM_CMD_UTF_START:</div><div class='ctx'> 		return ath10k_tm_cmd_utf_start(ar, tb);</div><div class='ctx'> 	case ATH10K_TM_CMD_UTF_STOP:</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/testmode_i.h b/drivers/net/wireless/ath/ath10k/testmode_i.h<br/>index ee1cb27c1d60..1603f5276682 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/testmode_i.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/testmode_i.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/testmode_i.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/testmode_i.h</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: ISC */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2014,2017 Qualcomm Atheros, Inc.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* "API" level of the ath10k testmode interface. Bump it after every</div><div class='hunk'>@@ -14,6 +15,7 @@</div><div class='ctx'> #define ATH10K_TESTMODE_VERSION_MINOR 0</div><div class='ctx'> </div><div class='ctx'> #define ATH10K_TM_DATA_MAX_LEN		5000</div><div class='add'>+#define ATH_FTM_EVENT_MAX_BUF_LENGTH	2048</div><div class='ctx'> </div><div class='ctx'> enum ath10k_tm_attr {</div><div class='ctx'> 	__ATH10K_TM_ATTR_INVALID	= 0,</div><div class='hunk'>@@ -57,4 +59,17 @@ enum ath10k_tm_cmd {</div><div class='ctx'> 	 * ATH10K_TM_ATTR_DATA.</div><div class='ctx'> 	 */</div><div class='ctx'> 	ATH10K_TM_CMD_WMI = 3,</div><div class='add'>+</div><div class='add'>+	/* The command used to transmit a test command to the firmware</div><div class='add'>+	 * and the event to receive test events from the firmware. The data</div><div class='add'>+	 * received only contain the TLV payload, need to add the tlv header</div><div class='add'>+	 * and send the cmd to firmware with command id WMI_PDEV_UTF_CMDID.</div><div class='add'>+	 * The data payload size could be large and the driver needs to</div><div class='add'>+	 * send segmented data to firmware.</div><div class='add'>+	 *</div><div class='add'>+	 * This legacy testmode command shares the same value as the get-version</div><div class='add'>+	 * command. To distinguish between them, we check whether the data attribute</div><div class='add'>+	 * is present.</div><div class='add'>+	 */</div><div class='add'>+	ATH10K_TM_CMD_TLV = ATH10K_TM_CMD_GET_VERSION,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/trace.c b/drivers/net/wireless/ath/ath10k/trace.c<br/>index c7d4c97e6079..421ec47c59bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/trace.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/trace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/trace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/trace.c</a></div><div class='hunk'>@@ -1,8 +1,10 @@</div><div class='ctx'> // SPDX-License-Identifier: ISC</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2012 Qualcomm Atheros, Inc.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/txrx.c b/drivers/net/wireless/ath/ath10k/txrx.c<br/>index da3bc35e41aa..493bfb410aff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/txrx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/txrx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/txrx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/txrx.c</a></div><div class='hunk'>@@ -35,7 +35,7 @@ static void ath10k_report_offchan_tx(struct ath10k *ar, struct sk_buff *skb)</div><div class='ctx'> 	complete(&amp;ar-&gt;offchan_tx_completed);</div><div class='ctx'> 	ar-&gt;offchan_tx_skb = NULL; /* just for sanity */</div><div class='ctx'> </div><div class='del'>-	ath10k_dbg(ar, ATH10K_DBG_HTT, "completed offchannel skb %pK\n", skb);</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_HTT, "completed offchannel skb %p\n", skb);</div><div class='ctx'> out:</div><div class='ctx'> 	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/usb.c b/drivers/net/wireless/ath/ath10k/usb.c<br/>index 3b51b7f52130..1732a4f98418 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/usb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/usb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/usb.c</a></div><div class='hunk'>@@ -131,7 +131,7 @@ static void ath10k_usb_recv_complete(struct urb *urb)</div><div class='ctx'> 	int status = 0;</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_USB_BULK,</div><div class='del'>-		   "usb recv pipe %d stat %d len %d urb 0x%pK\n",</div><div class='add'>+		   "usb recv pipe %d stat %d len %d urb 0x%p\n",</div><div class='ctx'> 		   pipe-&gt;logical_pipe_num, urb-&gt;status, urb-&gt;actual_length,</div><div class='ctx'> 		   urb);</div><div class='ctx'> </div><div class='hunk'>@@ -230,7 +230,7 @@ static void ath10k_usb_post_recv_transfers(struct ath10k *ar,</div><div class='ctx'> 				  ath10k_usb_recv_complete, urb_context);</div><div class='ctx'> </div><div class='ctx'> 		ath10k_dbg(ar, ATH10K_DBG_USB_BULK,</div><div class='del'>-			   "usb bulk recv submit %d 0x%x ep 0x%2.2x len %d buf 0x%pK\n",</div><div class='add'>+			   "usb bulk recv submit %d 0x%x ep 0x%2.2x len %d buf 0x%p\n",</div><div class='ctx'> 			   recv_pipe-&gt;logical_pipe_num,</div><div class='ctx'> 			   recv_pipe-&gt;usb_pipe_handle, recv_pipe-&gt;ep_address,</div><div class='ctx'> 			   ATH10K_USB_RX_BUFFER_SIZE, urb_context-&gt;skb);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/wmi.c b/drivers/net/wireless/ath/ath10k/wmi.c<br/>index 5e061f7525a6..b4aad6604d6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/wmi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/wmi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/wmi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/wmi.c</a></div><div class='hunk'>@@ -4,6 +4,7 @@</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='hunk'>@@ -1937,10 +1938,16 @@ int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)</div><div class='ctx'> 	if (cmd_id == WMI_CMD_UNSUPPORTED) {</div><div class='ctx'> 		ath10k_warn(ar, "wmi command %d is not supported by firmware\n",</div><div class='ctx'> 			    cmd_id);</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	wait_event_timeout(ar-&gt;wmi.tx_credits_wq, ({</div><div class='add'>+		if (ar-&gt;state == ATH10K_STATE_WEDGED) {</div><div class='add'>+			ret = -ESHUTDOWN;</div><div class='add'>+			ath10k_dbg(ar, ATH10K_DBG_WMI,</div><div class='add'>+				   "drop wmi command %d, hardware is wedged\n", cmd_id);</div><div class='add'>+		}</div><div class='ctx'> 		/* try to send pending beacons first. they take priority */</div><div class='ctx'> 		ath10k_wmi_tx_beacons_nowait(ar);</div><div class='ctx'> </div><div class='hunk'>@@ -2029,7 +2036,7 @@ ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)</div><div class='ctx'> 	ether_addr_copy(cmd-&gt;hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));</div><div class='ctx'> 	memcpy(cmd-&gt;buf, msdu-&gt;data, msdu-&gt;len);</div><div class='ctx'> </div><div class='del'>-	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",</div><div class='add'>+	ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",</div><div class='ctx'> 		   msdu, skb-&gt;len, fc &amp; IEEE80211_FCTL_FTYPE,</div><div class='ctx'> 		   fc &amp; IEEE80211_FCTL_STYPE);</div><div class='ctx'> 	trace_ath10k_tx_hdr(ar, skb-&gt;data, skb-&gt;len);</div><div class='hunk'>@@ -2637,7 +2644,7 @@ int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)</div><div class='ctx'> 		status-&gt;boottime_ns = ktime_get_boottime_ns();</div><div class='ctx'> </div><div class='ctx'> 	ath10k_dbg(ar, ATH10K_DBG_MGMT,</div><div class='del'>-		   "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",</div><div class='add'>+		   "event mgmt rx skb %p len %d ftype %02x stype %02x\n",</div><div class='ctx'> 		   skb, skb-&gt;len,</div><div class='ctx'> 		   fc &amp; IEEE80211_FCTL_FTYPE, fc &amp; IEEE80211_FCTL_STYPE);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath10k/wmi.h b/drivers/net/wireless/ath/ath10k/wmi.h<br/>index 0faefc0a9a40..7f50a1de6b97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/wmi.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath10k/wmi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath10k/wmi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath10k/wmi.h</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'>  * Copyright (c) 2005-2011 Atheros Communications Inc.</div><div class='ctx'>  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.</div><div class='ctx'>  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _WMI_H_</div><div class='hunk'>@@ -7418,6 +7418,23 @@ struct wmi_pdev_bb_timing_cfg_cmd {</div><div class='ctx'> 	__le32 bb_xpa_timing;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+struct wmi_ftm_seg_hdr {</div><div class='add'>+	__le32 len;</div><div class='add'>+	__le32 msgref;</div><div class='add'>+	__le32 segmentinfo;</div><div class='add'>+	__le32 pdev_id;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct wmi_ftm_cmd {</div><div class='add'>+	__le32 tlv_header;</div><div class='add'>+	struct wmi_ftm_seg_hdr seg_hdr;</div><div class='add'>+	u8 data[];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define WMI_TLV_LEN      GENMASK(15, 0)</div><div class='add'>+#define WMI_TLV_TAG	 GENMASK(31, 16)</div><div class='add'>+#define MAX_WMI_UTF_LEN  252</div><div class='add'>+</div><div class='ctx'> struct ath10k;</div><div class='ctx'> struct ath10k_vif;</div><div class='ctx'> struct ath10k_fw_stats_pdev;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/Kconfig b/drivers/net/wireless/ath/ath11k/Kconfig<br/>index 2e935d381b6b..659ef134ef16 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/Kconfig</a></div><div class='hunk'>@@ -24,7 +24,7 @@ config ATH11K_PCI</div><div class='ctx'> 	select MHI_BUS</div><div class='ctx'> 	select QRTR</div><div class='ctx'> 	select QRTR_MHI</div><div class='del'>-	select PCI_PWRCTL_PWRSEQ if HAVE_PWRCTL</div><div class='add'>+	select PCI_PWRCTRL_PWRSEQ if HAVE_PWRCTRL</div><div class='ctx'> 	help</div><div class='ctx'> 	  This module adds support for PCIE bus</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/Makefile b/drivers/net/wireless/ath/ath11k/Makefile<br/>index 43d2d8ddcdc0..d9092414b362 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/Makefile</a></div><div class='hunk'>@@ -27,6 +27,7 @@ ath11k-$(CONFIG_ATH11K_TRACING) += trace.o</div><div class='ctx'> ath11k-$(CONFIG_THERMAL) += thermal.o</div><div class='ctx'> ath11k-$(CONFIG_ATH11K_SPECTRAL) += spectral.o</div><div class='ctx'> ath11k-$(CONFIG_PM) += wow.o</div><div class='add'>+ath11k-$(CONFIG_DEV_COREDUMP) += coredump.o</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_ATH11K_AHB) += ath11k_ahb.o</div><div class='ctx'> ath11k_ahb-y += ahb.o</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c<br/>index 97b12f51ef28..8dfe9b40c126 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/ahb.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/ahb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/ahb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/ahb.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -9,8 +9,8 @@</div><div class='ctx'> #include &lt;linux/property.h&gt;</div><div class='ctx'> #include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_reserved_mem.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='ctx'> #include &lt;linux/iommu.h&gt;</div><div class='ctx'> #include "ahb.h"</div><div class='ctx'> #include "debug.h"</div><div class='hunk'>@@ -397,7 +397,7 @@ static void ath11k_ahb_stop(struct ath11k_base *ab)</div><div class='ctx'> 		ath11k_ahb_ce_irqs_disable(ab);</div><div class='ctx'> 	ath11k_ahb_sync_ce_irqs(ab);</div><div class='ctx'> 	ath11k_ahb_kill_tasklets(ab);</div><div class='del'>-	del_timer_sync(&amp;ab-&gt;rx_replenish_retry);</div><div class='add'>+	timer_delete_sync(&amp;ab-&gt;rx_replenish_retry);</div><div class='ctx'> 	ath11k_ce_cleanup_pipes(ab);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -413,7 +413,7 @@ static int ath11k_ahb_power_up(struct ath11k_base *ab)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ath11k_ahb_power_down(struct ath11k_base *ab)</div><div class='add'>+static void ath11k_ahb_power_down(struct ath11k_base *ab, bool is_suspend)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_ahb *ab_ahb = ath11k_ahb_priv(ab);</div><div class='ctx'> </div><div class='hunk'>@@ -919,16 +919,10 @@ static int ath11k_ahb_setup_msa_resources(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_ahb *ab_ahb = ath11k_ahb_priv(ab);</div><div class='ctx'> 	struct device *dev = ab-&gt;dev;</div><div class='del'>-	struct device_node *node;</div><div class='ctx'> 	struct resource r;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	node = of_parse_phandle(dev-&gt;of_node, "memory-region", 0);</div><div class='del'>-	if (!node)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	ret = of_address_to_resource(node, 0, &amp;r);</div><div class='del'>-	of_node_put(node);</div><div class='add'>+	ret = of_reserved_mem_region_to_resource(dev-&gt;of_node, 0, &amp;r);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "failed to resolve msa fixed region\n");</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -937,12 +931,7 @@ static int ath11k_ahb_setup_msa_resources(struct ath11k_base *ab)</div><div class='ctx'> 	ab_ahb-&gt;fw.msa_paddr = r.start;</div><div class='ctx'> 	ab_ahb-&gt;fw.msa_size = resource_size(&amp;r);</div><div class='ctx'> </div><div class='del'>-	node = of_parse_phandle(dev-&gt;of_node, "memory-region", 1);</div><div class='del'>-	if (!node)</div><div class='del'>-		return -ENOENT;</div><div class='del'>-</div><div class='del'>-	ret = of_address_to_resource(node, 0, &amp;r);</div><div class='del'>-	of_node_put(node);</div><div class='add'>+	ret = of_reserved_mem_region_to_resource(dev-&gt;of_node, 1, &amp;r);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "failed to resolve ce fixed region\n");</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -988,7 +977,7 @@ static int ath11k_ahb_fw_resources_init(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_ahb *ab_ahb = ath11k_ahb_priv(ab);</div><div class='ctx'> 	struct device *host_dev = ab-&gt;dev;</div><div class='del'>-	struct platform_device_info info = {0};</div><div class='add'>+	struct platform_device_info info = {};</div><div class='ctx'> 	struct iommu_domain *iommu_dom;</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	struct device_node *node;</div><div class='hunk'>@@ -1000,18 +989,18 @@ static int ath11k_ahb_fw_resources_init(struct ath11k_base *ab)</div><div class='ctx'> 	if (!ab-&gt;hw_params.fixed_fw_mem)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ret = ath11k_ahb_setup_msa_resources(ab);</div><div class='del'>-	if (ret) {</div><div class='del'>-		ath11k_err(ab, "failed to setup msa resources\n");</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	node = of_get_child_by_name(host_dev-&gt;of_node, "wifi-firmware");</div><div class='ctx'> 	if (!node) {</div><div class='ctx'> 		ab_ahb-&gt;fw.use_tz = true;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ret = ath11k_ahb_setup_msa_resources(ab);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath11k_err(ab, "failed to setup msa resources\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	info.fwnode = &amp;node-&gt;fwnode;</div><div class='ctx'> 	info.parent = host_dev;</div><div class='ctx'> 	info.name = node-&gt;name;</div><div class='hunk'>@@ -1280,7 +1269,7 @@ static void ath11k_ahb_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct ath11k_base *ab = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(ATH11K_FLAG_QMI_FAIL, &amp;ab-&gt;dev_flags)) {</div><div class='del'>-		ath11k_ahb_power_down(ab);</div><div class='add'>+		ath11k_ahb_power_down(ab, false);</div><div class='ctx'> 		ath11k_debugfs_soc_destroy(ab);</div><div class='ctx'> 		ath11k_qmi_deinit_service(ab);</div><div class='ctx'> 		goto qmi_fail;</div><div class='hunk'>@@ -1290,6 +1279,7 @@ static void ath11k_ahb_remove(struct platform_device *pdev)</div><div class='ctx'> 	ath11k_core_deinit(ab);</div><div class='ctx'> </div><div class='ctx'> qmi_fail:</div><div class='add'>+	ath11k_fw_destroy(ab);</div><div class='ctx'> 	ath11k_ahb_free_resources(ab);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1309,16 +1299,17 @@ static void ath11k_ahb_shutdown(struct platform_device *pdev)</div><div class='ctx'> 	ath11k_core_deinit(ab);</div><div class='ctx'> </div><div class='ctx'> free_resources:</div><div class='add'>+	ath11k_fw_destroy(ab);</div><div class='ctx'> 	ath11k_ahb_free_resources(ab);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver ath11k_ahb_driver = {</div><div class='del'>-	.driver         = {</div><div class='del'>-		.name   = "ath11k",</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "ath11k",</div><div class='ctx'> 		.of_match_table = ath11k_ahb_of_match,</div><div class='ctx'> 	},</div><div class='del'>-	.probe  = ath11k_ahb_probe,</div><div class='del'>-	.remove_new = ath11k_ahb_remove,</div><div class='add'>+	.probe = ath11k_ahb_probe,</div><div class='add'>+	.remove = ath11k_ahb_remove,</div><div class='ctx'> 	.shutdown = ath11k_ahb_shutdown,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/ce.c b/drivers/net/wireless/ath/ath11k/ce.c<br/>index e66e86bdec20..a7a163621b21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/ce.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/ce.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/ce.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/ce.c</a></div><div class='hunk'>@@ -2,8 +2,10 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include "dp_rx.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "hif.h"</div><div class='hunk'>@@ -352,7 +354,8 @@ static int ath11k_ce_rx_post_pipe(struct ath11k_ce_pipe *pipe)</div><div class='ctx'> 		ret = ath11k_ce_rx_buf_enqueue_pipe(pipe, skb, paddr);</div><div class='ctx'> </div><div class='ctx'> 		if (ret) {</div><div class='del'>-			ath11k_warn(ab, "failed to enqueue rx buf: %d\n", ret);</div><div class='add'>+			ath11k_dbg(ab, ATH11K_DBG_CE, "failed to enqueue rx buf: %d\n",</div><div class='add'>+				   ret);</div><div class='ctx'> 			dma_unmap_single(ab-&gt;dev, paddr,</div><div class='ctx'> 					 skb-&gt;len + skb_tailroom(skb),</div><div class='ctx'> 					 DMA_FROM_DEVICE);</div><div class='hunk'>@@ -394,10 +397,6 @@ static int ath11k_ce_completed_recv_next(struct ath11k_ce_pipe *pipe,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	*nbytes = ath11k_hal_ce_dst_status_get_length(desc);</div><div class='del'>-	if (*nbytes == 0) {</div><div class='del'>-		ret = -EIO;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	*skb = pipe-&gt;dest_ring-&gt;skb[sw_index];</div><div class='ctx'> 	pipe-&gt;dest_ring-&gt;skb[sw_index] = NULL;</div><div class='hunk'>@@ -430,8 +429,8 @@ static void ath11k_ce_recv_process_cb(struct ath11k_ce_pipe *pipe)</div><div class='ctx'> 		dma_unmap_single(ab-&gt;dev, ATH11K_SKB_RXCB(skb)-&gt;paddr,</div><div class='ctx'> 				 max_nbytes, DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='del'>-		if (unlikely(max_nbytes &lt; nbytes)) {</div><div class='del'>-			ath11k_warn(ab, "rxed more than expected (nbytes %d, max %d)",</div><div class='add'>+		if (unlikely(max_nbytes &lt; nbytes || nbytes == 0)) {</div><div class='add'>+			ath11k_warn(ab, "unexpected rx length (nbytes %d, max %d)",</div><div class='ctx'> 				    nbytes, max_nbytes);</div><div class='ctx'> 			dev_kfree_skb_any(skb);</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -556,7 +555,7 @@ static int ath11k_ce_init_ring(struct ath11k_base *ab,</div><div class='ctx'> 			       struct ath11k_ce_ring *ce_ring,</div><div class='ctx'> 			       int ce_id, enum hal_ring_type type)</div><div class='ctx'> {</div><div class='del'>-	struct hal_srng_params params = { 0 };</div><div class='add'>+	struct hal_srng_params params = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	params.ring_base_paddr = ce_ring-&gt;base_addr_ce_space;</div><div class='hunk'>@@ -908,7 +907,7 @@ EXPORT_SYMBOL(ath11k_ce_rx_post_buf);</div><div class='ctx'> </div><div class='ctx'> void ath11k_ce_rx_replenish_retry(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ath11k_base *ab = from_timer(ab, t, rx_replenish_retry);</div><div class='add'>+	struct ath11k_base *ab = timer_container_of(ab, t, rx_replenish_retry);</div><div class='ctx'> </div><div class='ctx'> 	ath11k_ce_rx_post_buf(ab);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c<br/>index ccf4ad35fdc3..812686173ac8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/core.c</a></div><div class='hunk'>@@ -1,9 +1,11 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/remoteproc.h&gt;</div><div class='hunk'>@@ -123,6 +125,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {</div><div class='ctx'> 		.tx_ring_size = DP_TCL_DATA_RING_SIZE,</div><div class='ctx'> 		.smp2p_wow_exit = false,</div><div class='ctx'> 		.support_dual_stations = false,</div><div class='add'>+		.pdev_suspend = false,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.hw_rev = ATH11K_HW_IPQ6018_HW10,</div><div class='hunk'>@@ -207,6 +210,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {</div><div class='ctx'> 		.smp2p_wow_exit = false,</div><div class='ctx'> 		.support_fw_mac_sequence = false,</div><div class='ctx'> 		.support_dual_stations = false,</div><div class='add'>+		.pdev_suspend = false,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "qca6390 hw2.0",</div><div class='hunk'>@@ -296,6 +300,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {</div><div class='ctx'> 		.smp2p_wow_exit = false,</div><div class='ctx'> 		.support_fw_mac_sequence = true,</div><div class='ctx'> 		.support_dual_stations = true,</div><div class='add'>+		.pdev_suspend = false,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "qcn9074 hw1.0",</div><div class='hunk'>@@ -379,6 +384,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {</div><div class='ctx'> 		.smp2p_wow_exit = false,</div><div class='ctx'> 		.support_fw_mac_sequence = false,</div><div class='ctx'> 		.support_dual_stations = false,</div><div class='add'>+		.pdev_suspend = false,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "wcn6855 hw2.0",</div><div class='hunk'>@@ -468,6 +474,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {</div><div class='ctx'> 		.smp2p_wow_exit = false,</div><div class='ctx'> 		.support_fw_mac_sequence = true,</div><div class='ctx'> 		.support_dual_stations = true,</div><div class='add'>+		.pdev_suspend = false,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "wcn6855 hw2.1",</div><div class='hunk'>@@ -555,6 +562,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {</div><div class='ctx'> 		.smp2p_wow_exit = false,</div><div class='ctx'> 		.support_fw_mac_sequence = true,</div><div class='ctx'> 		.support_dual_stations = true,</div><div class='add'>+		.pdev_suspend = false,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "wcn6750 hw1.0",</div><div class='hunk'>@@ -616,7 +624,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {</div><div class='ctx'> 		.supports_dynamic_smps_6ghz = false,</div><div class='ctx'> 		.alloc_cacheable_memory = false,</div><div class='ctx'> 		.supports_rssi_stats = true,</div><div class='del'>-		.fw_wmi_diag_event = false,</div><div class='add'>+		.fw_wmi_diag_event = true,</div><div class='ctx'> 		.current_cc_support = true,</div><div class='ctx'> 		.dbr_debug_support = false,</div><div class='ctx'> 		.global_reset = false,</div><div class='hunk'>@@ -637,6 +645,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {</div><div class='ctx'> 		.smp2p_wow_exit = true,</div><div class='ctx'> 		.support_fw_mac_sequence = true,</div><div class='ctx'> 		.support_dual_stations = false,</div><div class='add'>+		.pdev_suspend = true,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.hw_rev = ATH11K_HW_IPQ5018_HW10,</div><div class='hunk'>@@ -719,6 +728,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {</div><div class='ctx'> 		.smp2p_wow_exit = false,</div><div class='ctx'> 		.support_fw_mac_sequence = false,</div><div class='ctx'> 		.support_dual_stations = false,</div><div class='add'>+		.pdev_suspend = false,</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = "qca2066 hw2.1",</div><div class='hunk'>@@ -809,14 +819,183 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {</div><div class='ctx'> 		.support_fw_mac_sequence = true,</div><div class='ctx'> 		.support_dual_stations = true,</div><div class='ctx'> 	},</div><div class='del'>-};</div><div class='add'>+	{</div><div class='add'>+		.name = "qca6698aq hw2.1",</div><div class='add'>+		.hw_rev = ATH11K_HW_QCA6698AQ_HW21,</div><div class='add'>+		.fw = {</div><div class='add'>+			.dir = "QCA6698AQ/hw2.1",</div><div class='add'>+			.board_size = 256 * 1024,</div><div class='add'>+			.cal_offset = 128 * 1024,</div><div class='add'>+		},</div><div class='add'>+		.max_radios = 3,</div><div class='add'>+		.bdf_addr = 0x4B0C0000,</div><div class='add'>+		.hw_ops = &amp;wcn6855_ops,</div><div class='add'>+		.ring_mask = &amp;ath11k_hw_ring_mask_qca6390,</div><div class='add'>+		.internal_sleep_clock = true,</div><div class='add'>+		.regs = &amp;wcn6855_regs,</div><div class='add'>+		.qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390,</div><div class='add'>+		.host_ce_config = ath11k_host_ce_config_qca6390,</div><div class='add'>+		.ce_count = 9,</div><div class='add'>+		.target_ce_config = ath11k_target_ce_config_wlan_qca6390,</div><div class='add'>+		.target_ce_count = 9,</div><div class='add'>+		.svc_to_ce_map = ath11k_target_service_to_ce_map_wlan_qca6390,</div><div class='add'>+		.svc_to_ce_map_len = 14,</div><div class='add'>+		.single_pdev_only = true,</div><div class='add'>+		.rxdma1_enable = false,</div><div class='add'>+		.num_rxdma_per_pdev = 2,</div><div class='add'>+		.rx_mac_buf_ring = true,</div><div class='add'>+		.vdev_start_delay = true,</div><div class='add'>+		.htt_peer_map_v2 = false,</div><div class='ctx'> </div><div class='del'>-static inline struct ath11k_pdev *ath11k_core_get_single_pdev(struct ath11k_base *ab)</div><div class='del'>-{</div><div class='del'>-	WARN_ON(!ab-&gt;hw_params.single_pdev_only);</div><div class='add'>+		.spectral = {</div><div class='add'>+			.fft_sz = 0,</div><div class='add'>+			.fft_pad_sz = 0,</div><div class='add'>+			.summary_pad_sz = 0,</div><div class='add'>+			.fft_hdr_len = 0,</div><div class='add'>+			.max_fft_bins = 0,</div><div class='add'>+			.fragment_160mhz = false,</div><div class='add'>+		},</div><div class='ctx'> </div><div class='del'>-	return &amp;ab-&gt;pdevs[0];</div><div class='del'>-}</div><div class='add'>+		.interface_modes = BIT(NL80211_IFTYPE_STATION) |</div><div class='add'>+					BIT(NL80211_IFTYPE_AP) |</div><div class='add'>+					BIT(NL80211_IFTYPE_P2P_DEVICE) |</div><div class='add'>+					BIT(NL80211_IFTYPE_P2P_CLIENT) |</div><div class='add'>+					BIT(NL80211_IFTYPE_P2P_GO),</div><div class='add'>+		.supports_monitor = false,</div><div class='add'>+		.supports_shadow_regs = true,</div><div class='add'>+		.idle_ps = true,</div><div class='add'>+		.supports_sta_ps = true,</div><div class='add'>+		.coldboot_cal_mm = false,</div><div class='add'>+		.coldboot_cal_ftm = false,</div><div class='add'>+		.cbcal_restart_fw = false,</div><div class='add'>+		.fw_mem_mode = 0,</div><div class='add'>+		.num_vdevs = 2 + 1,</div><div class='add'>+		.num_peers = 512,</div><div class='add'>+		.supports_suspend = true,</div><div class='add'>+		.hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),</div><div class='add'>+		.supports_regdb = true,</div><div class='add'>+		.fix_l1ss = false,</div><div class='add'>+		.credit_flow = true,</div><div class='add'>+		.max_tx_ring = DP_TCL_NUM_RING_MAX_QCA6390,</div><div class='add'>+		.hal_params = &amp;ath11k_hw_hal_params_qca6390,</div><div class='add'>+		.supports_dynamic_smps_6ghz = false,</div><div class='add'>+		.alloc_cacheable_memory = false,</div><div class='add'>+		.supports_rssi_stats = true,</div><div class='add'>+		.fw_wmi_diag_event = true,</div><div class='add'>+		.current_cc_support = true,</div><div class='add'>+		.dbr_debug_support = false,</div><div class='add'>+		.global_reset = true,</div><div class='add'>+		.bios_sar_capa = &amp;ath11k_hw_sar_capa_wcn6855,</div><div class='add'>+		.m3_fw_support = true,</div><div class='add'>+		.fixed_bdf_addr = false,</div><div class='add'>+		.fixed_mem_region = false,</div><div class='add'>+		.static_window_map = false,</div><div class='add'>+		.hybrid_bus_type = false,</div><div class='add'>+		.fixed_fw_mem = false,</div><div class='add'>+		.support_off_channel_tx = true,</div><div class='add'>+		.supports_multi_bssid = true,</div><div class='add'>+</div><div class='add'>+		.sram_dump = {</div><div class='add'>+			.start = 0x01400000,</div><div class='add'>+			.end = 0x0177ffff,</div><div class='add'>+		},</div><div class='add'>+</div><div class='add'>+		.tcl_ring_retry = true,</div><div class='add'>+		.tx_ring_size = DP_TCL_DATA_RING_SIZE,</div><div class='add'>+		.smp2p_wow_exit = false,</div><div class='add'>+		.support_fw_mac_sequence = true,</div><div class='add'>+		.support_dual_stations = true,</div><div class='add'>+		.pdev_suspend = false,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dmi_system_id ath11k_pm_quirk_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* X13 G4 AMD #1 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21J3"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* X13 G4 AMD #2 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21J4"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* T14 G4 AMD #1 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21K3"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* T14 G4 AMD #2 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21K4"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* P14s G4 AMD #1 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21K5"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* P14s G4 AMD #2 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21K6"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* T16 G2 AMD #1 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21K7"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* T16 G2 AMD #2 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21K8"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* P16s G2 AMD #1 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21K9"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* P16s G2 AMD #2 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21KA"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* T14s G4 AMD #1 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21F8"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.driver_data = (void *)ATH11K_PM_WOW,</div><div class='add'>+		.matches = { /* T14s G4 AMD #2 */</div><div class='add'>+			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),</div><div class='add'>+			DMI_MATCH(DMI_PRODUCT_NAME, "21F9"),</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> void ath11k_fw_stats_pdevs_free(struct list_head *head)</div><div class='ctx'> {</div><div class='hunk'>@@ -855,6 +1034,7 @@ void ath11k_fw_stats_init(struct ath11k *ar)</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;ar-&gt;fw_stats.bcn);</div><div class='ctx'> </div><div class='ctx'> 	init_completion(&amp;ar-&gt;fw_stats_complete);</div><div class='add'>+	init_completion(&amp;ar-&gt;fw_stats_done);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ath11k_fw_stats_free(struct ath11k_fw_stats *stats)</div><div class='hunk'>@@ -876,23 +1056,33 @@ bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab)</div><div class='ctx'> 		return ab-&gt;hw_params.coldboot_cal_mm;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ath11k_core_suspend(struct ath11k_base *ab)</div><div class='add'>+/* Check if we need to continue with suspend/resume operation.</div><div class='add'>+ * Return:</div><div class='add'>+ *	a negative value: error happens and don't continue.</div><div class='add'>+ *	0:  no error but don't continue.</div><div class='add'>+ *	positive value: no error and do continue.</div><div class='add'>+ */</div><div class='add'>+static int ath11k_core_continue_suspend_resume(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-	struct ath11k_pdev *pdev;</div><div class='ctx'> 	struct ath11k *ar;</div><div class='ctx'> </div><div class='ctx'> 	if (!ab-&gt;hw_params.supports_suspend)</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> </div><div class='ctx'> 	/* so far single_pdev_only chips have supports_suspend as true</div><div class='del'>-	 * and only the first pdev is valid.</div><div class='add'>+	 * so pass 0 as a dummy pdev_id here.</div><div class='ctx'> 	 */</div><div class='del'>-	pdev = ath11k_core_get_single_pdev(ab);</div><div class='del'>-	ar = pdev-&gt;ar;</div><div class='add'>+	ar = ab-&gt;pdevs[0].ar;</div><div class='ctx'> 	if (!ar || ar-&gt;state != ATH11K_STATE_OFF)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath11k_core_suspend_wow(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	ret = ath11k_dp_rx_pktlog_stop(ab, true);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath11k_warn(ab, "failed to stop dp rx (and timer) pktlog during suspend: %d\n",</div><div class='hunk'>@@ -900,7 +1090,10 @@ int ath11k_core_suspend(struct ath11k_base *ab)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = ath11k_mac_wait_tx_complete(ar);</div><div class='add'>+	/* So far only single_pdev_only devices can reach here,</div><div class='add'>+	 * so it is valid to handle the first, and the only, pdev.</div><div class='add'>+	 */</div><div class='add'>+	ret = ath11k_mac_wait_tx_complete(ab-&gt;pdevs[0].ar);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath11k_warn(ab, "failed to wait tx complete: %d\n", ret);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -933,24 +1126,146 @@ int ath11k_core_suspend(struct ath11k_base *ab)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static int ath11k_core_suspend_default(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ath11k_dp_rx_pktlog_stop(ab, true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath11k_warn(ab, "failed to stop dp rx (and timer) pktlog during suspend: %d\n",</div><div class='add'>+			    ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* So far only single_pdev_only devices can reach here,</div><div class='add'>+	 * so it is valid to handle the first, and the only, pdev.</div><div class='add'>+	 */</div><div class='add'>+	ret = ath11k_mac_wait_tx_complete(ab-&gt;pdevs[0].ar);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath11k_warn(ab, "failed to wait tx complete: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ath11k_dp_rx_pktlog_stop(ab, false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath11k_warn(ab, "failed to stop dp rx pktlog during suspend: %d\n",</div><div class='add'>+			    ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath11k_ce_stop_shadow_timers(ab);</div><div class='add'>+	ath11k_dp_stop_shadow_timers(ab);</div><div class='add'>+</div><div class='add'>+	/* PM framework skips suspend_late/resume_early callbacks</div><div class='add'>+	 * if other devices report errors in their suspend callbacks.</div><div class='add'>+	 * However ath11k_core_resume() would still be called because</div><div class='add'>+	 * here we return success thus kernel put us on dpm_suspended_list.</div><div class='add'>+	 * Since we won't go through a power down/up cycle, there is</div><div class='add'>+	 * no chance to call complete(&amp;ab-&gt;restart_completed) in</div><div class='add'>+	 * ath11k_core_restart(), making ath11k_core_resume() timeout.</div><div class='add'>+	 * So call it here to avoid this issue. This also works in case</div><div class='add'>+	 * no error happens thus suspend_late/resume_early get called,</div><div class='add'>+	 * because it will be reinitialized in ath11k_core_resume_early().</div><div class='add'>+	 */</div><div class='add'>+	complete(&amp;ab-&gt;restart_completed);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ath11k_core_suspend(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ath11k_core_continue_suspend_resume(ab);</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;actual_pm_policy == ATH11K_PM_WOW)</div><div class='add'>+		return ath11k_core_suspend_wow(ab);</div><div class='add'>+</div><div class='add'>+	return ath11k_core_suspend_default(ab);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL(ath11k_core_suspend);</div><div class='ctx'> </div><div class='del'>-int ath11k_core_resume(struct ath11k_base *ab)</div><div class='add'>+int ath11k_core_suspend_late(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='del'>-	struct ath11k_pdev *pdev;</div><div class='add'>+</div><div class='add'>+	ret = ath11k_core_continue_suspend_resume(ab);</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;actual_pm_policy == ATH11K_PM_WOW)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ath11k_hif_irq_disable(ab);</div><div class='add'>+	ath11k_hif_ce_irq_disable(ab);</div><div class='add'>+</div><div class='add'>+	ath11k_hif_power_down(ab, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ath11k_core_suspend_late);</div><div class='add'>+</div><div class='add'>+int ath11k_core_resume_early(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ath11k_core_continue_suspend_resume(ab);</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;actual_pm_policy == ATH11K_PM_WOW)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;ab-&gt;restart_completed);</div><div class='add'>+	ret = ath11k_hif_power_up(ab);</div><div class='add'>+	if (ret)</div><div class='add'>+		ath11k_warn(ab, "failed to power up hif during resume: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ath11k_core_resume_early);</div><div class='add'>+</div><div class='add'>+static int ath11k_core_resume_default(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='ctx'> 	struct ath11k *ar;</div><div class='add'>+	long time_left;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (!ab-&gt;hw_params.supports_suspend)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+	time_left = wait_for_completion_timeout(&amp;ab-&gt;restart_completed,</div><div class='add'>+						ATH11K_RESET_TIMEOUT_HZ);</div><div class='add'>+	if (time_left == 0) {</div><div class='add'>+		ath11k_warn(ab, "timeout while waiting for restart complete");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* so far signle_pdev_only chips have supports_suspend as true</div><div class='del'>-	 * and only the first pdev is valid.</div><div class='add'>+	/* So far only single_pdev_only devices can reach here,</div><div class='add'>+	 * so it is valid to handle the first, and the only, pdev.</div><div class='ctx'> 	 */</div><div class='del'>-	pdev = ath11k_core_get_single_pdev(ab);</div><div class='del'>-	ar = pdev-&gt;ar;</div><div class='del'>-	if (!ar || ar-&gt;state != ATH11K_STATE_OFF)</div><div class='del'>-		return 0;</div><div class='add'>+	ar = ab-&gt;pdevs[0].ar;</div><div class='add'>+	if (ab-&gt;hw_params.current_cc_support &amp;&amp;</div><div class='add'>+	    ar-&gt;alpha2[0] != 0 &amp;&amp; ar-&gt;alpha2[1] != 0) {</div><div class='add'>+		ret = ath11k_reg_set_cc(ar);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath11k_warn(ab, "failed to set country code during resume: %d\n",</div><div class='add'>+				    ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ath11k_dp_rx_pktlog_start(ab);</div><div class='add'>+	if (ret)</div><div class='add'>+		ath11k_warn(ab, "failed to start rx pktlog during resume: %d\n",</div><div class='add'>+			    ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath11k_core_resume_wow(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = ath11k_hif_resume(ab);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -976,6 +1291,20 @@ int ath11k_core_resume(struct ath11k_base *ab)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int ath11k_core_resume(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ath11k_core_continue_suspend_resume(ab);</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;actual_pm_policy == ATH11K_PM_WOW)</div><div class='add'>+		return ath11k_core_resume_wow(ab);</div><div class='add'>+</div><div class='add'>+	return ath11k_core_resume_default(ab);</div><div class='add'>+}</div><div class='ctx'> EXPORT_SYMBOL(ath11k_core_resume);</div><div class='ctx'> </div><div class='ctx'> static void ath11k_core_check_cc_code_bdfext(const struct dmi_header *hdr, void *data)</div><div class='hunk'>@@ -1079,9 +1408,12 @@ int ath11k_core_check_dt(struct ath11k_base *ab)</div><div class='ctx'> 	if (!node)</div><div class='ctx'> 		return -ENOENT;</div><div class='ctx'> </div><div class='del'>-	of_property_read_string(node, "qcom,ath11k-calibration-variant",</div><div class='add'>+	of_property_read_string(node, "qcom,calibration-variant",</div><div class='ctx'> 				&amp;variant);</div><div class='ctx'> 	if (!variant)</div><div class='add'>+		of_property_read_string(node, "qcom,ath11k-calibration-variant",</div><div class='add'>+					&amp;variant);</div><div class='add'>+	if (!variant)</div><div class='ctx'> 		return -ENODATA;</div><div class='ctx'> </div><div class='ctx'> 	if (strscpy(ab-&gt;qmi.target.bdf_ext, variant, max_len) &lt; 0)</div><div class='hunk'>@@ -1103,7 +1435,7 @@ static int __ath11k_core_create_board_name(struct ath11k_base *ab, char *name,</div><div class='ctx'> 					   enum ath11k_bdf_name_type name_type)</div><div class='ctx'> {</div><div class='ctx'> 	/* strlen(',variant=') + strlen(ab-&gt;qmi.target.bdf_ext) */</div><div class='del'>-	char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = { 0 };</div><div class='add'>+	char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = {};</div><div class='ctx'> </div><div class='ctx'> 	if (with_variant &amp;&amp; ab-&gt;qmi.target.bdf_ext[0] != '\0')</div><div class='ctx'> 		scnprintf(variant, sizeof(variant), ",variant=%s",</div><div class='hunk'>@@ -1669,11 +2001,47 @@ err_pdev_debug:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ath11k_core_pdev_suspend_target(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath11k *ar;</div><div class='add'>+	struct ath11k_pdev *pdev;</div><div class='add'>+	unsigned long time_left;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!ab-&gt;hw_params.pdev_suspend)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;num_radios; i++) {</div><div class='add'>+		pdev = &amp;ab-&gt;pdevs[i];</div><div class='add'>+		ar = pdev-&gt;ar;</div><div class='add'>+</div><div class='add'>+		reinit_completion(&amp;ab-&gt;htc_suspend);</div><div class='add'>+</div><div class='add'>+		ret = ath11k_wmi_pdev_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR,</div><div class='add'>+					      pdev-&gt;pdev_id);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath11k_warn(ab, "could not suspend target :%d\n", ret);</div><div class='add'>+			/* pointless to try other pdevs */</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		time_left = wait_for_completion_timeout(&amp;ab-&gt;htc_suspend, 3 * HZ);</div><div class='add'>+</div><div class='add'>+		if (!time_left) {</div><div class='add'>+			ath11k_warn(ab, "suspend timed out - target pause event never came\n");</div><div class='add'>+			/* pointless to try other pdevs */</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ath11k_core_pdev_destroy(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	ath11k_spectral_deinit(ab);</div><div class='ctx'> 	ath11k_thermal_unregister(ab);</div><div class='ctx'> 	ath11k_mac_unregister(ab);</div><div class='add'>+	ath11k_core_pdev_suspend_target(ab);</div><div class='ctx'> 	ath11k_hif_irq_disable(ab);</div><div class='ctx'> 	ath11k_dp_pdev_free(ab);</div><div class='ctx'> 	ath11k_debugfs_pdev_destroy(ab);</div><div class='hunk'>@@ -1811,6 +2179,20 @@ int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	switch (ath11k_crypto_mode) {</div><div class='add'>+	case ATH11K_CRYPT_MODE_SW:</div><div class='add'>+		set_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &amp;ab-&gt;dev_flags);</div><div class='add'>+		set_bit(ATH11K_FLAG_RAW_MODE, &amp;ab-&gt;dev_flags);</div><div class='add'>+		break;</div><div class='add'>+	case ATH11K_CRYPT_MODE_HW:</div><div class='add'>+		clear_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &amp;ab-&gt;dev_flags);</div><div class='add'>+		clear_bit(ATH11K_FLAG_RAW_MODE, &amp;ab-&gt;dev_flags);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ath11k_info(ab, "invalid crypto_mode: %d\n", ath11k_crypto_mode);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = ath11k_core_start_firmware(ab, ab-&gt;fw_mode);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath11k_err(ab, "failed to start firmware: %d\n", ret);</div><div class='hunk'>@@ -1829,20 +2211,6 @@ int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab)</div><div class='ctx'> 		goto err_firmware_stop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	switch (ath11k_crypto_mode) {</div><div class='del'>-	case ATH11K_CRYPT_MODE_SW:</div><div class='del'>-		set_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &amp;ab-&gt;dev_flags);</div><div class='del'>-		set_bit(ATH11K_FLAG_RAW_MODE, &amp;ab-&gt;dev_flags);</div><div class='del'>-		break;</div><div class='del'>-	case ATH11K_CRYPT_MODE_HW:</div><div class='del'>-		clear_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &amp;ab-&gt;dev_flags);</div><div class='del'>-		clear_bit(ATH11K_FLAG_RAW_MODE, &amp;ab-&gt;dev_flags);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ath11k_info(ab, "invalid crypto_mode: %d\n", ath11k_crypto_mode);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (ath11k_frame_mode == ATH11K_HW_TXRX_RAW)</div><div class='ctx'> 		set_bit(ATH11K_FLAG_RAW_MODE, &amp;ab-&gt;dev_flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1889,14 +2257,10 @@ static int ath11k_core_reconfigure_on_crash(struct ath11k_base *ab)</div><div class='ctx'> 	mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='ctx'> </div><div class='ctx'> 	ath11k_dp_free(ab);</div><div class='del'>-	ath11k_hal_srng_deinit(ab);</div><div class='add'>+	ath11k_hal_srng_clear(ab);</div><div class='ctx'> </div><div class='ctx'> 	ab-&gt;free_vdev_map = (1LL &lt;&lt; (ab-&gt;num_radios * TARGET_NUM_VDEVS(ab))) - 1;</div><div class='ctx'> </div><div class='del'>-	ret = ath11k_hal_srng_init(ab);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='ctx'> 	clear_bit(ATH11K_FLAG_CRASH_FLUSH, &amp;ab-&gt;dev_flags);</div><div class='ctx'> </div><div class='ctx'> 	ret = ath11k_core_qmi_firmware_ready(ab);</div><div class='hunk'>@@ -1915,6 +2279,7 @@ err_hal_srng_deinit:</div><div class='ctx'> void ath11k_core_halt(struct ath11k *ar)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='add'>+	struct list_head *pos, *n;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> </div><div class='hunk'>@@ -1924,12 +2289,18 @@ void ath11k_core_halt(struct ath11k *ar)</div><div class='ctx'> 	ath11k_mac_scan_finish(ar);</div><div class='ctx'> 	ath11k_mac_peer_cleanup_all(ar);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;ar-&gt;scan.timeout);</div><div class='add'>+	cancel_work_sync(&amp;ar-&gt;channel_update_work);</div><div class='ctx'> 	cancel_work_sync(&amp;ar-&gt;regd_update_work);</div><div class='ctx'> 	cancel_work_sync(&amp;ab-&gt;update_11d_work);</div><div class='ctx'> </div><div class='ctx'> 	rcu_assign_pointer(ab-&gt;pdevs_active[ar-&gt;pdev_idx], NULL);</div><div class='ctx'> 	synchronize_rcu();</div><div class='del'>-	INIT_LIST_HEAD(&amp;ar-&gt;arvifs);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+	list_for_each_safe(pos, n, &amp;ar-&gt;arvifs)</div><div class='add'>+		list_del_init(pos);</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='ctx'> 	idr_init(&amp;ar-&gt;txmgmt_idr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2069,6 +2440,8 @@ static void ath11k_core_restart(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 	if (!ab-&gt;is_reset)</div><div class='ctx'> 		ath11k_core_post_reconfigure_recovery(ab);</div><div class='add'>+</div><div class='add'>+	complete(&amp;ab-&gt;restart_completed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath11k_core_reset(struct work_struct *work)</div><div class='hunk'>@@ -2125,6 +2498,7 @@ static void ath11k_core_reset(struct work_struct *work)</div><div class='ctx'> 	reinit_completion(&amp;ab-&gt;recovery_start);</div><div class='ctx'> 	atomic_set(&amp;ab-&gt;recovery_start_count, 0);</div><div class='ctx'> </div><div class='add'>+	ath11k_coredump_collect(ab);</div><div class='ctx'> 	ath11k_core_pre_reconfigure_recovery(ab);</div><div class='ctx'> </div><div class='ctx'> 	reinit_completion(&amp;ab-&gt;reconfigure_complete);</div><div class='hunk'>@@ -2138,7 +2512,7 @@ static void ath11k_core_reset(struct work_struct *work)</div><div class='ctx'> 	ath11k_hif_irq_disable(ab);</div><div class='ctx'> 	ath11k_hif_ce_irq_disable(ab);</div><div class='ctx'> </div><div class='del'>-	ath11k_hif_power_down(ab);</div><div class='add'>+	ath11k_hif_power_down(ab, false);</div><div class='ctx'> 	ath11k_hif_power_up(ab);</div><div class='ctx'> </div><div class='ctx'> 	ath11k_dbg(ab, ATH11K_DBG_BOOT, "reset started\n");</div><div class='hunk'>@@ -2188,17 +2562,74 @@ int ath11k_core_pre_init(struct ath11k_base *ab)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ath11k_core_pre_init);</div><div class='ctx'> </div><div class='add'>+static int ath11k_core_pm_notify(struct notifier_block *nb,</div><div class='add'>+				 unsigned long action, void *nouse)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_base *ab = container_of(nb, struct ath11k_base,</div><div class='add'>+					      pm_nb);</div><div class='add'>+</div><div class='add'>+	switch (action) {</div><div class='add'>+	case PM_SUSPEND_PREPARE:</div><div class='add'>+		ab-&gt;actual_pm_policy = ab-&gt;pm_policy;</div><div class='add'>+		break;</div><div class='add'>+	case PM_HIBERNATION_PREPARE:</div><div class='add'>+		ab-&gt;actual_pm_policy = ATH11K_PM_DEFAULT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NOTIFY_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath11k_core_pm_notifier_register(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	ab-&gt;pm_nb.notifier_call = ath11k_core_pm_notify;</div><div class='add'>+	return register_pm_notifier(&amp;ab-&gt;pm_nb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath11k_core_pm_notifier_unregister(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = unregister_pm_notifier(&amp;ab-&gt;pm_nb);</div><div class='add'>+	if (ret)</div><div class='add'>+		/* just warn here, there is nothing can be done in fail case */</div><div class='add'>+		ath11k_warn(ab, "failed to unregister PM notifier %d\n", ret);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ath11k_core_pm_notifier_unregister);</div><div class='add'>+</div><div class='ctx'> int ath11k_core_init(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='add'>+	const struct dmi_system_id *dmi_id;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	dmi_id = dmi_first_match(ath11k_pm_quirk_table);</div><div class='add'>+	if (dmi_id)</div><div class='add'>+		ab-&gt;pm_policy = (kernel_ulong_t)dmi_id-&gt;driver_data;</div><div class='add'>+	else</div><div class='add'>+		ab-&gt;pm_policy = ATH11K_PM_DEFAULT;</div><div class='add'>+</div><div class='add'>+	ath11k_dbg(ab, ATH11K_DBG_BOOT, "pm policy %u\n", ab-&gt;pm_policy);</div><div class='add'>+</div><div class='add'>+	ret = ath11k_core_pm_notifier_register(ab);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath11k_err(ab, "failed to register PM notifier: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = ath11k_core_soc_create(ab);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath11k_err(ab, "failed to create soc core: %d\n", ret);</div><div class='del'>-		return ret;</div><div class='add'>+		goto err_unregister_pm_notifier;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_unregister_pm_notifier:</div><div class='add'>+	ath11k_core_pm_notifier_unregister(ab);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ath11k_core_init);</div><div class='ctx'> </div><div class='hunk'>@@ -2211,10 +2642,10 @@ void ath11k_core_deinit(struct ath11k_base *ab)</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='ctx'> </div><div class='del'>-	ath11k_hif_power_down(ab);</div><div class='add'>+	ath11k_hif_power_down(ab, false);</div><div class='ctx'> 	ath11k_mac_destroy(ab);</div><div class='ctx'> 	ath11k_core_soc_destroy(ab);</div><div class='del'>-	ath11k_fw_destroy(ab);</div><div class='add'>+	ath11k_core_pm_notifier_unregister(ab);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ath11k_core_deinit);</div><div class='ctx'> </div><div class='hunk'>@@ -2261,9 +2692,11 @@ struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,</div><div class='ctx'> 	INIT_WORK(&amp;ab-&gt;restart_work, ath11k_core_restart);</div><div class='ctx'> 	INIT_WORK(&amp;ab-&gt;update_11d_work, ath11k_update_11d);</div><div class='ctx'> 	INIT_WORK(&amp;ab-&gt;reset_work, ath11k_core_reset);</div><div class='add'>+	INIT_WORK(&amp;ab-&gt;dump_work, ath11k_coredump_upload);</div><div class='ctx'> 	timer_setup(&amp;ab-&gt;rx_replenish_retry, ath11k_ce_rx_replenish_retry, 0);</div><div class='ctx'> 	init_completion(&amp;ab-&gt;htc_suspend);</div><div class='ctx'> 	init_completion(&amp;ab-&gt;wow.wakeup_completed);</div><div class='add'>+	init_completion(&amp;ab-&gt;restart_completed);</div><div class='ctx'> </div><div class='ctx'> 	ab-&gt;dev = dev;</div><div class='ctx'> 	ab-&gt;hif.bus = bus;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h<br/>index 09c37e19a168..e8780b05ce11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/core.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/core.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/core.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef ATH11K_CORE_H</div><div class='hunk'>@@ -16,6 +16,8 @@</div><div class='ctx'> #include &lt;linux/rhashtable.h&gt;</div><div class='ctx'> #include &lt;linux/average.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/suspend.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "qmi.h"</div><div class='ctx'> #include "htc.h"</div><div class='hunk'>@@ -32,6 +34,7 @@</div><div class='ctx'> #include "spectral.h"</div><div class='ctx'> #include "wow.h"</div><div class='ctx'> #include "fw.h"</div><div class='add'>+#include "coredump.h"</div><div class='ctx'> </div><div class='ctx'> #define SM(_v, _f) (((_v) &lt;&lt; _f##_LSB) &amp; _f##_MASK)</div><div class='ctx'> </div><div class='hunk'>@@ -148,6 +151,7 @@ enum ath11k_hw_rev {</div><div class='ctx'> 	ATH11K_HW_WCN6750_HW10,</div><div class='ctx'> 	ATH11K_HW_IPQ5018_HW10,</div><div class='ctx'> 	ATH11K_HW_QCA2066_HW21,</div><div class='add'>+	ATH11K_HW_QCA6698AQ_HW21,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum ath11k_firmware_mode {</div><div class='hunk'>@@ -340,7 +344,6 @@ struct ath11k_chan_power_info {</div><div class='ctx'>  * @ap_power_type: type of power (SP/LPI/VLP)</div><div class='ctx'>  * @num_pwr_levels: number of power levels</div><div class='ctx'>  * @reg_max: Array of maximum TX power (dBm) per PSD value</div><div class='del'>- * @ap_constraint_power: AP constraint power (dBm)</div><div class='ctx'>  * @tpe: TPE values processed from TPE IE</div><div class='ctx'>  * @chan_power_info: power info to send to firmware</div><div class='ctx'>  */</div><div class='hunk'>@@ -350,7 +353,6 @@ struct ath11k_reg_tpc_power_info {</div><div class='ctx'> 	enum wmi_reg_6ghz_ap_type ap_power_type;</div><div class='ctx'> 	u8 num_pwr_levels;</div><div class='ctx'> 	u8 reg_max[ATH11K_NUM_PWR_LEVELS];</div><div class='del'>-	u8 ap_constraint_power;</div><div class='ctx'> 	s8 tpe[ATH11K_NUM_PWR_LEVELS];</div><div class='ctx'> 	struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS];</div><div class='ctx'> };</div><div class='hunk'>@@ -370,8 +372,8 @@ struct ath11k_vif {</div><div class='ctx'> 	struct ath11k *ar;</div><div class='ctx'> 	struct ieee80211_vif *vif;</div><div class='ctx'> </div><div class='del'>-	u16 tx_seq_no;</div><div class='ctx'> 	struct wmi_wmm_params_all_arg wmm_params;</div><div class='add'>+	struct wmi_wmm_params_all_arg muedca_params;</div><div class='ctx'> 	struct list_head list;</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct {</div><div class='hunk'>@@ -409,6 +411,8 @@ struct ath11k_vif {</div><div class='ctx'> 	bool do_not_send_tmpl;</div><div class='ctx'> 	struct ath11k_arp_ns_offload arp_ns_offload;</div><div class='ctx'> 	struct ath11k_rekey_data rekey_data;</div><div class='add'>+	u32 num_stations;</div><div class='add'>+	bool reinstall_group_keys;</div><div class='ctx'> </div><div class='ctx'> 	struct ath11k_reg_tpc_power_info reg_tpc_info;</div><div class='ctx'> </div><div class='hunk'>@@ -599,6 +603,8 @@ struct ath11k_fw_stats {</div><div class='ctx'> 	struct list_head pdevs;</div><div class='ctx'> 	struct list_head vdevs;</div><div class='ctx'> 	struct list_head bcn;</div><div class='add'>+	u32 num_vdev_recvd;</div><div class='add'>+	u32 num_bcn_recvd;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath11k_dbg_htt_stats {</div><div class='hunk'>@@ -687,7 +693,7 @@ struct ath11k {</div><div class='ctx'> 	struct mutex conf_mutex;</div><div class='ctx'> 	/* protects the radio specific data like debug stats, ppdu_stats_info stats,</div><div class='ctx'> 	 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,</div><div class='del'>-	 * channel context data, survey info, test mode data.</div><div class='add'>+	 * channel context data, survey info, test mode data, channel_update_queue.</div><div class='ctx'> 	 */</div><div class='ctx'> 	spinlock_t data_lock;</div><div class='ctx'> </div><div class='hunk'>@@ -745,6 +751,9 @@ struct ath11k {</div><div class='ctx'> 	struct completion bss_survey_done;</div><div class='ctx'> </div><div class='ctx'> 	struct work_struct regd_update_work;</div><div class='add'>+	struct work_struct channel_update_work;</div><div class='add'>+	/* protected with data_lock */</div><div class='add'>+	struct list_head channel_update_queue;</div><div class='ctx'> </div><div class='ctx'> 	struct work_struct wmi_mgmt_tx_work;</div><div class='ctx'> 	struct sk_buff_head wmi_mgmt_tx_queue;</div><div class='hunk'>@@ -780,7 +789,7 @@ struct ath11k {</div><div class='ctx'> 	u8 alpha2[REG_ALPHA2_LEN + 1];</div><div class='ctx'> 	struct ath11k_fw_stats fw_stats;</div><div class='ctx'> 	struct completion fw_stats_complete;</div><div class='del'>-	bool fw_stats_done;</div><div class='add'>+	struct completion fw_stats_done;</div><div class='ctx'> </div><div class='ctx'> 	/* protected by conf_mutex */</div><div class='ctx'> 	bool ps_state_enable;</div><div class='hunk'>@@ -889,6 +898,11 @@ struct ath11k_msi_config {</div><div class='ctx'> 	u16 hw_rev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum ath11k_pm_policy {</div><div class='add'>+	ATH11K_PM_DEFAULT,</div><div class='add'>+	ATH11K_PM_WOW,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* Master structure to hold the hw data which may be used in core module */</div><div class='ctx'> struct ath11k_base {</div><div class='ctx'> 	enum ath11k_hw_rev hw_rev;</div><div class='hunk'>@@ -902,6 +916,10 @@ struct ath11k_base {</div><div class='ctx'> 	/* HW channel counters frequency value in hertz common to all MACs */</div><div class='ctx'> 	u32 cc_freq_hz;</div><div class='ctx'> </div><div class='add'>+	struct ath11k_dump_file_data *dump_data;</div><div class='add'>+	size_t ath11k_coredump_len;</div><div class='add'>+	struct work_struct dump_work;</div><div class='add'>+</div><div class='ctx'> 	struct ath11k_htc htc;</div><div class='ctx'> </div><div class='ctx'> 	struct ath11k_dp dp;</div><div class='hunk'>@@ -1043,6 +1061,8 @@ struct ath11k_base {</div><div class='ctx'> 		DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT);</div><div class='ctx'> 	} fw;</div><div class='ctx'> </div><div class='add'>+	struct completion restart_completed;</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_NL80211_TESTMODE</div><div class='ctx'> 	struct {</div><div class='ctx'> 		u32 data_pos;</div><div class='hunk'>@@ -1051,6 +1071,10 @@ struct ath11k_base {</div><div class='ctx'> 	} testmode;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+	enum ath11k_pm_policy pm_policy;</div><div class='add'>+	enum ath11k_pm_policy actual_pm_policy;</div><div class='add'>+	struct notifier_block pm_nb;</div><div class='add'>+</div><div class='ctx'> 	/* must be last */</div><div class='ctx'> 	u8 drv_priv[] __aligned(sizeof(void *));</div><div class='ctx'> };</div><div class='hunk'>@@ -1242,8 +1266,10 @@ void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);</div><div class='ctx'> int ath11k_core_check_dt(struct ath11k_base *ath11k);</div><div class='ctx'> int ath11k_core_check_smbios(struct ath11k_base *ab);</div><div class='ctx'> void ath11k_core_halt(struct ath11k *ar);</div><div class='add'>+int ath11k_core_resume_early(struct ath11k_base *ab);</div><div class='ctx'> int ath11k_core_resume(struct ath11k_base *ab);</div><div class='ctx'> int ath11k_core_suspend(struct ath11k_base *ab);</div><div class='add'>+int ath11k_core_suspend_late(struct ath11k_base *ab);</div><div class='ctx'> void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);</div><div class='ctx'> bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab);</div><div class='ctx'> </div><div class='hunk'>@@ -1299,8 +1325,16 @@ static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,</div><div class='ctx'> 						    const char *filename,</div><div class='ctx'> 						    void *buf, size_t buf_len)</div><div class='ctx'> {</div><div class='del'>-	snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,</div><div class='del'>-		 ab-&gt;hw_params.fw.dir, filename);</div><div class='add'>+	const char *fw_name = NULL;</div><div class='add'>+</div><div class='add'>+	of_property_read_string(ab-&gt;dev-&gt;of_node, "firmware-name", &amp;fw_name);</div><div class='add'>+</div><div class='add'>+	if (fw_name &amp;&amp; strncmp(filename, "board", 5))</div><div class='add'>+		snprintf(buf, buf_len, "%s/%s/%s/%s", ATH11K_FW_DIR,</div><div class='add'>+			 ab-&gt;hw_params.fw.dir, fw_name, filename);</div><div class='add'>+	else</div><div class='add'>+		snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,</div><div class='add'>+			 ab-&gt;hw_params.fw.dir, filename);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline const char *ath11k_bus_str(enum ath11k_bus bus)</div><div class='hunk'>@@ -1315,4 +1349,6 @@ static inline const char *ath11k_bus_str(enum ath11k_bus bus)</div><div class='ctx'> 	return "unknown";</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ath11k_core_pm_notifier_unregister(struct ath11k_base *ab);</div><div class='add'>+</div><div class='ctx'> #endif /* _CORE_H_ */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/coredump.c b/drivers/net/wireless/ath/ath11k/coredump.c<br/>new file mode 100644<br/>index 000000000000..1949d57b007a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/coredump.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/coredump.c</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2020 The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/devcoredump.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include "hif.h"</div><div class='add'>+#include "coredump.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+</div><div class='add'>+enum</div><div class='add'>+ath11k_fw_crash_dump_type ath11k_coredump_get_dump_type(int type)</div><div class='add'>+{</div><div class='add'>+	enum ath11k_fw_crash_dump_type dump_type;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case HOST_DDR_REGION_TYPE:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_REMOTE_MEM_DATA;</div><div class='add'>+		break;</div><div class='add'>+	case M3_DUMP_REGION_TYPE:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_M3_DUMP;</div><div class='add'>+		break;</div><div class='add'>+	case PAGEABLE_MEM_REGION_TYPE:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_PAGEABLE_DATA;</div><div class='add'>+		break;</div><div class='add'>+	case BDF_MEM_REGION_TYPE:</div><div class='add'>+	case CALDB_MEM_REGION_TYPE:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_NONE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_TYPE_MAX;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dump_type;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ath11k_coredump_get_dump_type);</div><div class='add'>+</div><div class='add'>+void ath11k_coredump_upload(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_base *ab = container_of(work, struct ath11k_base, dump_work);</div><div class='add'>+</div><div class='add'>+	ath11k_info(ab, "Uploading coredump\n");</div><div class='add'>+	/* dev_coredumpv() takes ownership of the buffer */</div><div class='add'>+	dev_coredumpv(ab-&gt;dev, ab-&gt;dump_data, ab-&gt;ath11k_coredump_len, GFP_KERNEL);</div><div class='add'>+	ab-&gt;dump_data = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath11k_coredump_collect(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	ath11k_hif_coredump_download(ab);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/coredump.h b/drivers/net/wireless/ath/ath11k/coredump.h<br/>new file mode 100644<br/>index 000000000000..3960d9385261<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/coredump.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/coredump.h</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+/* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2020 The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#ifndef _ATH11K_COREDUMP_H_</div><div class='add'>+#define _ATH11K_COREDUMP_H_</div><div class='add'>+</div><div class='add'>+#define ATH11K_FW_CRASH_DUMP_V2      2</div><div class='add'>+</div><div class='add'>+enum ath11k_fw_crash_dump_type {</div><div class='add'>+	FW_CRASH_DUMP_PAGING_DATA,</div><div class='add'>+	FW_CRASH_DUMP_RDDM_DATA,</div><div class='add'>+	FW_CRASH_DUMP_REMOTE_MEM_DATA,</div><div class='add'>+	FW_CRASH_DUMP_PAGEABLE_DATA,</div><div class='add'>+	FW_CRASH_DUMP_M3_DUMP,</div><div class='add'>+	FW_CRASH_DUMP_NONE,</div><div class='add'>+</div><div class='add'>+	/* keep last */</div><div class='add'>+	FW_CRASH_DUMP_TYPE_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define COREDUMP_TLV_HDR_SIZE 8</div><div class='add'>+</div><div class='add'>+struct ath11k_tlv_dump_data {</div><div class='add'>+	/* see ath11k_fw_crash_dump_type above */</div><div class='add'>+	__le32 type;</div><div class='add'>+</div><div class='add'>+	/* in bytes */</div><div class='add'>+	__le32 tlv_len;</div><div class='add'>+</div><div class='add'>+	/* pad to 32-bit boundaries as needed */</div><div class='add'>+	u8 tlv_data[];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ath11k_dump_file_data {</div><div class='add'>+	/* "ATH11K-FW-DUMP" */</div><div class='add'>+	char df_magic[16];</div><div class='add'>+	/* total dump len in bytes */</div><div class='add'>+	__le32 len;</div><div class='add'>+	/* file dump version */</div><div class='add'>+	__le32 version;</div><div class='add'>+	/* pci device id */</div><div class='add'>+	__le32 chip_id;</div><div class='add'>+	/* qrtr instance id */</div><div class='add'>+	__le32 qrtr_id;</div><div class='add'>+	/* pci domain id */</div><div class='add'>+	__le32 bus_id;</div><div class='add'>+	guid_t guid;</div><div class='add'>+	/* time-of-day stamp */</div><div class='add'>+	__le64 tv_sec;</div><div class='add'>+	/* time-of-day stamp, nano-seconds */</div><div class='add'>+	__le64 tv_nsec;</div><div class='add'>+	/* room for growth w/out changing binary format */</div><div class='add'>+	u8 unused[128];</div><div class='add'>+	u8 data[];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEV_COREDUMP</div><div class='add'>+enum ath11k_fw_crash_dump_type ath11k_coredump_get_dump_type(int type);</div><div class='add'>+void ath11k_coredump_upload(struct work_struct *work);</div><div class='add'>+void ath11k_coredump_collect(struct ath11k_base *ab);</div><div class='add'>+#else</div><div class='add'>+static inline enum</div><div class='add'>+ath11k_fw_crash_dump_type ath11k_coredump_get_dump_type(int type)</div><div class='add'>+{</div><div class='add'>+	return FW_CRASH_DUMP_TYPE_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath11k_coredump_upload(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath11k_coredump_collect(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/dbring.c b/drivers/net/wireless/ath/ath11k/dbring.c<br/>index fbb6e8d8a476..520d8b8662a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/dbring.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/dbring.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/dbring.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/dbring.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='hunk'>@@ -153,7 +154,7 @@ int ath11k_dbring_wmi_cfg_setup(struct ath11k *ar,</div><div class='ctx'> 				struct ath11k_dbring *ring,</div><div class='ctx'> 				enum wmi_direct_buffer_module id)</div><div class='ctx'> {</div><div class='del'>-	struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd param = {0};</div><div class='add'>+	struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd param = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (id &gt;= WMI_DIRECT_BUF_MAX)</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/debug.c b/drivers/net/wireless/ath/ath11k/debug.c<br/>index 2b8544355fc1..37d23a559ba3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/debug.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/debug.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/debug.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/debug.c</a></div><div class='hunk'>@@ -2,8 +2,10 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "debug.h"</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/debugfs.c b/drivers/net/wireless/ath/ath11k/debugfs.c<br/>index 57281a135dd7..977f945b6e66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/debugfs.c</a></div><div class='hunk'>@@ -1,9 +1,11 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2020 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "debugfs.h"</div><div class='hunk'>@@ -93,57 +95,14 @@ void ath11k_debugfs_add_dbring_entry(struct ath11k *ar,</div><div class='ctx'> 	spin_unlock_bh(&amp;dbr_data-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ath11k_debugfs_fw_stats_reset(struct ath11k *ar)</div><div class='del'>-{</div><div class='del'>-	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-	ar-&gt;fw_stats_done = false;</div><div class='del'>-	ath11k_fw_stats_pdevs_free(&amp;ar-&gt;fw_stats.pdevs);</div><div class='del'>-	ath11k_fw_stats_vdevs_free(&amp;ar-&gt;fw_stats.vdevs);</div><div class='del'>-	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> void ath11k_debugfs_fw_stats_process(struct ath11k *ar, struct ath11k_fw_stats *stats)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	struct ath11k_pdev *pdev;</div><div class='del'>-	bool is_end;</div><div class='del'>-	static unsigned int num_vdev, num_bcn;</div><div class='del'>-	size_t total_vdevs_started = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* WMI_REQUEST_PDEV_STAT request has been already processed */</div><div class='del'>-</div><div class='del'>-	if (stats-&gt;stats_id == WMI_REQUEST_RSSI_PER_CHAIN_STAT) {</div><div class='del'>-		ar-&gt;fw_stats_done = true;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (stats-&gt;stats_id == WMI_REQUEST_VDEV_STAT) {</div><div class='del'>-		if (list_empty(&amp;stats-&gt;vdevs)) {</div><div class='del'>-			ath11k_warn(ab, "empty vdev stats");</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		/* FW sends all the active VDEV stats irrespective of PDEV,</div><div class='del'>-		 * hence limit until the count of all VDEVs started</div><div class='del'>-		 */</div><div class='del'>-		for (i = 0; i &lt; ab-&gt;num_radios; i++) {</div><div class='del'>-			pdev = rcu_dereference(ab-&gt;pdevs_active[i]);</div><div class='del'>-			if (pdev &amp;&amp; pdev-&gt;ar)</div><div class='del'>-				total_vdevs_started += ar-&gt;num_started_vdevs;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		is_end = ((++num_vdev) == total_vdevs_started);</div><div class='del'>-</div><div class='del'>-		list_splice_tail_init(&amp;stats-&gt;vdevs,</div><div class='del'>-				      &amp;ar-&gt;fw_stats.vdevs);</div><div class='del'>-</div><div class='del'>-		if (is_end) {</div><div class='del'>-			ar-&gt;fw_stats_done = true;</div><div class='del'>-			num_vdev = 0;</div><div class='del'>-		}</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='add'>+	bool is_end = true;</div><div class='ctx'> </div><div class='add'>+	/* WMI_REQUEST_PDEV_STAT, WMI_REQUEST_RSSI_PER_CHAIN_STAT and</div><div class='add'>+	 * WMI_REQUEST_VDEV_STAT requests have been already processed.</div><div class='add'>+	 */</div><div class='ctx'> 	if (stats-&gt;stats_id == WMI_REQUEST_BCN_STAT) {</div><div class='ctx'> 		if (list_empty(&amp;stats-&gt;bcn)) {</div><div class='ctx'> 			ath11k_warn(ab, "empty bcn stats");</div><div class='hunk'>@@ -152,97 +111,18 @@ void ath11k_debugfs_fw_stats_process(struct ath11k *ar, struct ath11k_fw_stats *</div><div class='ctx'> 		/* Mark end until we reached the count of all started VDEVs</div><div class='ctx'> 		 * within the PDEV</div><div class='ctx'> 		 */</div><div class='del'>-		is_end = ((++num_bcn) == ar-&gt;num_started_vdevs);</div><div class='add'>+		if (ar-&gt;num_started_vdevs)</div><div class='add'>+			is_end = ((++ar-&gt;fw_stats.num_bcn_recvd) ==</div><div class='add'>+				  ar-&gt;num_started_vdevs);</div><div class='ctx'> </div><div class='ctx'> 		list_splice_tail_init(&amp;stats-&gt;bcn,</div><div class='ctx'> 				      &amp;ar-&gt;fw_stats.bcn);</div><div class='ctx'> </div><div class='del'>-		if (is_end) {</div><div class='del'>-			ar-&gt;fw_stats_done = true;</div><div class='del'>-			num_bcn = 0;</div><div class='del'>-		}</div><div class='add'>+		if (is_end)</div><div class='add'>+			complete(&amp;ar-&gt;fw_stats_done);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath11k_debugfs_fw_stats_request(struct ath11k *ar,</div><div class='del'>-					   struct stats_request_params *req_param)</div><div class='del'>-{</div><div class='del'>-	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	unsigned long timeout, time_left;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;ar-&gt;conf_mutex);</div><div class='del'>-</div><div class='del'>-	/* FW stats can get split when exceeding the stats data buffer limit.</div><div class='del'>-	 * In that case, since there is no end marking for the back-to-back</div><div class='del'>-	 * received 'update stats' event, we keep a 3 seconds timeout in case,</div><div class='del'>-	 * fw_stats_done is not marked yet</div><div class='del'>-	 */</div><div class='del'>-	timeout = jiffies + msecs_to_jiffies(3 * 1000);</div><div class='del'>-</div><div class='del'>-	ath11k_debugfs_fw_stats_reset(ar);</div><div class='del'>-</div><div class='del'>-	reinit_completion(&amp;ar-&gt;fw_stats_complete);</div><div class='del'>-</div><div class='del'>-	ret = ath11k_wmi_send_stats_request_cmd(ar, req_param);</div><div class='del'>-</div><div class='del'>-	if (ret) {</div><div class='del'>-		ath11k_warn(ab, "could not request fw stats (%d)\n",</div><div class='del'>-			    ret);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	time_left = wait_for_completion_timeout(&amp;ar-&gt;fw_stats_complete, 1 * HZ);</div><div class='del'>-</div><div class='del'>-	if (!time_left)</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	for (;;) {</div><div class='del'>-		if (time_after(jiffies, timeout))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-		if (ar-&gt;fw_stats_done) {</div><div class='del'>-			spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int ath11k_debugfs_get_fw_stats(struct ath11k *ar, u32 pdev_id,</div><div class='del'>-				u32 vdev_id, u32 stats_id)</div><div class='del'>-{</div><div class='del'>-	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	struct stats_request_params req_param;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='del'>-</div><div class='del'>-	if (ar-&gt;state != ATH11K_STATE_ON) {</div><div class='del'>-		ret = -ENETDOWN;</div><div class='del'>-		goto err_unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	req_param.pdev_id = pdev_id;</div><div class='del'>-	req_param.vdev_id = vdev_id;</div><div class='del'>-	req_param.stats_id = stats_id;</div><div class='del'>-</div><div class='del'>-	ret = ath11k_debugfs_fw_stats_request(ar, &amp;req_param);</div><div class='del'>-	if (ret)</div><div class='del'>-		ath11k_warn(ab, "failed to request fw stats: %d\n", ret);</div><div class='del'>-</div><div class='del'>-	ath11k_dbg(ab, ATH11K_DBG_WMI,</div><div class='del'>-		   "debug get fw stat pdev id %d vdev id %d stats id 0x%x\n",</div><div class='del'>-		   pdev_id, vdev_id, stats_id);</div><div class='del'>-</div><div class='del'>-err_unlock:</div><div class='del'>-	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ath11k_open_pdev_stats(struct inode *inode, struct file *file)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = inode-&gt;i_private;</div><div class='hunk'>@@ -268,7 +148,7 @@ static int ath11k_open_pdev_stats(struct inode *inode, struct file *file)</div><div class='ctx'> 	req_param.vdev_id = 0;</div><div class='ctx'> 	req_param.stats_id = WMI_REQUEST_PDEV_STAT;</div><div class='ctx'> </div><div class='del'>-	ret = ath11k_debugfs_fw_stats_request(ar, &amp;req_param);</div><div class='add'>+	ret = ath11k_mac_fw_stats_request(ar, &amp;req_param);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath11k_warn(ab, "failed to request fw pdev stats: %d\n", ret);</div><div class='ctx'> 		goto err_free;</div><div class='hunk'>@@ -339,7 +219,7 @@ static int ath11k_open_vdev_stats(struct inode *inode, struct file *file)</div><div class='ctx'> 	req_param.vdev_id = 0;</div><div class='ctx'> 	req_param.stats_id = WMI_REQUEST_VDEV_STAT;</div><div class='ctx'> </div><div class='del'>-	ret = ath11k_debugfs_fw_stats_request(ar, &amp;req_param);</div><div class='add'>+	ret = ath11k_mac_fw_stats_request(ar, &amp;req_param);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath11k_warn(ar-&gt;ab, "failed to request fw vdev stats: %d\n", ret);</div><div class='ctx'> 		goto err_free;</div><div class='hunk'>@@ -415,7 +295,7 @@ static int ath11k_open_bcn_stats(struct inode *inode, struct file *file)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		req_param.vdev_id = arvif-&gt;vdev_id;</div><div class='del'>-		ret = ath11k_debugfs_fw_stats_request(ar, &amp;req_param);</div><div class='add'>+		ret = ath11k_mac_fw_stats_request(ar, &amp;req_param);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			ath11k_warn(ar-&gt;ab, "failed to request fw bcn stats: %d\n", ret);</div><div class='ctx'> 			goto err_free;</div><div class='hunk'>@@ -495,7 +375,7 @@ static ssize_t ath11k_write_simulate_fw_crash(struct file *file,</div><div class='ctx'> 	struct ath11k_base *ab = file-&gt;private_data;</div><div class='ctx'> 	struct ath11k_pdev *pdev;</div><div class='ctx'> 	struct ath11k *ar = ab-&gt;pdevs[0].ar;</div><div class='del'>-	char buf[32] = {0};</div><div class='add'>+	char buf[32] = {};</div><div class='ctx'> 	ssize_t rc;</div><div class='ctx'> 	int i, ret, radioup = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -593,7 +473,7 @@ static ssize_t ath11k_read_enable_extd_tx_stats(struct file *file,</div><div class='ctx'> 						size_t count, loff_t *ppos)</div><div class='ctx'> </div><div class='ctx'> {</div><div class='del'>-	char buf[32] = {0};</div><div class='add'>+	char buf[32] = {};</div><div class='ctx'> 	struct ath11k *ar = file-&gt;private_data;</div><div class='ctx'> 	int len = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -617,7 +497,7 @@ static ssize_t ath11k_write_extd_rx_stats(struct file *file,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = file-&gt;private_data;</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	struct htt_rx_ring_tlv_filter tlv_filter = {0};</div><div class='add'>+	struct htt_rx_ring_tlv_filter tlv_filter = {};</div><div class='ctx'> 	u32 enable, rx_filter = 0, ring_id;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -857,7 +737,7 @@ static ssize_t ath11k_write_fw_dbglog(struct file *file,</div><div class='ctx'> 				      size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = file-&gt;private_data;</div><div class='del'>-	char buf[128] = {0};</div><div class='add'>+	char buf[128] = {};</div><div class='ctx'> 	struct ath11k_fw_dbglog dbglog;</div><div class='ctx'> 	unsigned int param, mod_id_index, is_end;</div><div class='ctx'> 	u64 value;</div><div class='hunk'>@@ -1070,9 +950,9 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = file-&gt;private_data;</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	struct htt_rx_ring_tlv_filter tlv_filter = {0};</div><div class='add'>+	struct htt_rx_ring_tlv_filter tlv_filter = {};</div><div class='ctx'> 	u32 rx_filter = 0, ring_id, filter, mode;</div><div class='del'>-	u8 buf[128] = {0};</div><div class='add'>+	u8 buf[128] = {};</div><div class='ctx'> 	int i, ret, rx_buf_sz = 0;</div><div class='ctx'> 	ssize_t rc;</div><div class='ctx'> </div><div class='hunk'>@@ -1201,7 +1081,7 @@ static ssize_t ath11k_read_pktlog_filter(struct file *file,</div><div class='ctx'> 					 size_t count, loff_t *ppos)</div><div class='ctx'> </div><div class='ctx'> {</div><div class='del'>-	char buf[32] = {0};</div><div class='add'>+	char buf[32] = {};</div><div class='ctx'> 	struct ath11k *ar = file-&gt;private_data;</div><div class='ctx'> 	int len = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1355,7 +1235,7 @@ static ssize_t ath11k_debugfs_write_enable_dbr_dbg(struct file *file,</div><div class='ctx'> 						   size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = file-&gt;private_data;</div><div class='del'>-	char buf[32] = {0};</div><div class='add'>+	char buf[32] = {};</div><div class='ctx'> 	u32 dbr_id, enable;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1593,7 +1473,7 @@ int ath11k_debugfs_register(struct ath11k *ar)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='ctx'> 	char pdev_name[10];</div><div class='del'>-	char buf[100] = {0};</div><div class='add'>+	char buf[100] = {};</div><div class='ctx'> </div><div class='ctx'> 	snprintf(pdev_name, sizeof(pdev_name), "%s%u", "mac", ar-&gt;pdev_idx);</div><div class='ctx'> </div><div class='hunk'>@@ -1676,10 +1556,10 @@ static ssize_t ath11k_write_twt_add_dialog(struct file *file,</div><div class='ctx'> 					   size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_vif *arvif = file-&gt;private_data;</div><div class='del'>-	struct wmi_twt_add_dialog_params params = { 0 };</div><div class='del'>-	struct wmi_twt_enable_params twt_params = {0};</div><div class='add'>+	struct wmi_twt_add_dialog_params params = {};</div><div class='add'>+	struct wmi_twt_enable_params twt_params = {};</div><div class='ctx'> 	struct ath11k *ar = arvif-&gt;ar;</div><div class='del'>-	u8 buf[128] = {0};</div><div class='add'>+	u8 buf[128] = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (ar-&gt;twt_enabled == 0) {</div><div class='hunk'>@@ -1752,10 +1632,10 @@ static ssize_t ath11k_write_twt_del_dialog(struct file *file,</div><div class='ctx'> 					   size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_vif *arvif = file-&gt;private_data;</div><div class='del'>-	struct wmi_twt_del_dialog_params params = { 0 };</div><div class='del'>-	struct wmi_twt_enable_params twt_params = {0};</div><div class='add'>+	struct wmi_twt_del_dialog_params params = {};</div><div class='add'>+	struct wmi_twt_enable_params twt_params = {};</div><div class='ctx'> 	struct ath11k *ar = arvif-&gt;ar;</div><div class='del'>-	u8 buf[64] = {0};</div><div class='add'>+	u8 buf[64] = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (ar-&gt;twt_enabled == 0) {</div><div class='hunk'>@@ -1799,8 +1679,8 @@ static ssize_t ath11k_write_twt_pause_dialog(struct file *file,</div><div class='ctx'> 					     size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_vif *arvif = file-&gt;private_data;</div><div class='del'>-	struct wmi_twt_pause_dialog_params params = { 0 };</div><div class='del'>-	u8 buf[64] = {0};</div><div class='add'>+	struct wmi_twt_pause_dialog_params params = {};</div><div class='add'>+	u8 buf[64] = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (arvif-&gt;ar-&gt;twt_enabled == 0) {</div><div class='hunk'>@@ -1838,8 +1718,8 @@ static ssize_t ath11k_write_twt_resume_dialog(struct file *file,</div><div class='ctx'> 					      size_t count, loff_t *ppos)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_vif *arvif = file-&gt;private_data;</div><div class='del'>-	struct wmi_twt_resume_dialog_params params = { 0 };</div><div class='del'>-	u8 buf[64] = {0};</div><div class='add'>+	struct wmi_twt_resume_dialog_params params = {};</div><div class='add'>+	u8 buf[64] = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (arvif-&gt;ar-&gt;twt_enabled == 0) {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/debugfs.h b/drivers/net/wireless/ath/ath11k/debugfs.h<br/>index a39e458637b0..ed7fec177588 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/debugfs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/debugfs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/debugfs.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2022, 2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _ATH11K_DEBUGFS_H_</div><div class='hunk'>@@ -273,8 +273,6 @@ void ath11k_debugfs_unregister(struct ath11k *ar);</div><div class='ctx'> void ath11k_debugfs_fw_stats_process(struct ath11k *ar, struct ath11k_fw_stats *stats);</div><div class='ctx'> </div><div class='ctx'> void ath11k_debugfs_fw_stats_init(struct ath11k *ar);</div><div class='del'>-int ath11k_debugfs_get_fw_stats(struct ath11k *ar, u32 pdev_id,</div><div class='del'>-				u32 vdev_id, u32 stats_id);</div><div class='ctx'> </div><div class='ctx'> static inline bool ath11k_debugfs_is_pktlog_lite_mode_enabled(struct ath11k *ar)</div><div class='ctx'> {</div><div class='hunk'>@@ -381,12 +379,6 @@ static inline int ath11k_debugfs_rx_filter(struct ath11k *ar)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int ath11k_debugfs_get_fw_stats(struct ath11k *ar,</div><div class='del'>-					      u32 pdev_id, u32 vdev_id, u32 stats_id)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline void</div><div class='ctx'> ath11k_debugfs_add_dbring_entry(struct ath11k *ar,</div><div class='ctx'> 				enum wmi_direct_buffer_module id,</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c<br/>index 870e86a31bf8..11d28c42227e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='hunk'>@@ -375,7 +376,7 @@ static inline void htt_print_hw_stats_intr_misc_tlv(const void *tag_buf,</div><div class='ctx'> 	u8 *buf = stats_req-&gt;buf;</div><div class='ctx'> 	u32 len = stats_req-&gt;buf_len;</div><div class='ctx'> 	u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;</div><div class='del'>-	char hw_intr_name[HTT_STATS_MAX_HW_INTR_NAME_LEN + 1] = {0};</div><div class='add'>+	char hw_intr_name[HTT_STATS_MAX_HW_INTR_NAME_LEN + 1] = {};</div><div class='ctx'> </div><div class='ctx'> 	len += scnprintf(buf + len, buf_len - len, "HTT_HW_STATS_INTR_MISC_TLV:\n");</div><div class='ctx'> 	memcpy(hw_intr_name, &amp;(htt_stats_buf-&gt;hw_intr_name[0]),</div><div class='hunk'>@@ -402,7 +403,7 @@ htt_print_hw_stats_wd_timeout_tlv(const void *tag_buf,</div><div class='ctx'> 	u8 *buf = stats_req-&gt;buf;</div><div class='ctx'> 	u32 len = stats_req-&gt;buf_len;</div><div class='ctx'> 	u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;</div><div class='del'>-	char hw_module_name[HTT_STATS_MAX_HW_MODULE_NAME_LEN + 1] = {0};</div><div class='add'>+	char hw_module_name[HTT_STATS_MAX_HW_MODULE_NAME_LEN + 1] = {};</div><div class='ctx'> </div><div class='ctx'> 	len += scnprintf(buf + len, buf_len - len, "HTT_HW_STATS_WD_TIMEOUT_TLV:\n");</div><div class='ctx'> 	memcpy(hw_module_name, &amp;(htt_stats_buf-&gt;hw_module_name[0]),</div><div class='hunk'>@@ -514,7 +515,7 @@ static inline void htt_print_tx_tid_stats_tlv(const void *tag_buf,</div><div class='ctx'> 	u8 *buf = stats_req-&gt;buf;</div><div class='ctx'> 	u32 len = stats_req-&gt;buf_len;</div><div class='ctx'> 	u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;</div><div class='del'>-	char tid_name[MAX_HTT_TID_NAME + 1] = {0};</div><div class='add'>+	char tid_name[MAX_HTT_TID_NAME + 1] = {};</div><div class='ctx'> </div><div class='ctx'> 	len += scnprintf(buf + len, buf_len - len, "HTT_TX_TID_STATS_TLV:\n");</div><div class='ctx'> 	memcpy(tid_name, &amp;(htt_stats_buf-&gt;tid_name[0]), MAX_HTT_TID_NAME);</div><div class='hunk'>@@ -567,7 +568,7 @@ static inline void htt_print_tx_tid_stats_v1_tlv(const void *tag_buf,</div><div class='ctx'> 	u8 *buf = stats_req-&gt;buf;</div><div class='ctx'> 	u32 len = stats_req-&gt;buf_len;</div><div class='ctx'> 	u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;</div><div class='del'>-	char tid_name[MAX_HTT_TID_NAME + 1] = {0};</div><div class='add'>+	char tid_name[MAX_HTT_TID_NAME + 1] = {};</div><div class='ctx'> </div><div class='ctx'> 	len += scnprintf(buf + len, buf_len - len, "HTT_TX_TID_STATS_V1_TLV:\n");</div><div class='ctx'> 	memcpy(tid_name, &amp;(htt_stats_buf-&gt;tid_name[0]), MAX_HTT_TID_NAME);</div><div class='hunk'>@@ -624,7 +625,7 @@ static inline void htt_print_rx_tid_stats_tlv(const void *tag_buf,</div><div class='ctx'> 	u8 *buf = stats_req-&gt;buf;</div><div class='ctx'> 	u32 len = stats_req-&gt;buf_len;</div><div class='ctx'> 	u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;</div><div class='del'>-	char tid_name[MAX_HTT_TID_NAME + 1] = {0};</div><div class='add'>+	char tid_name[MAX_HTT_TID_NAME + 1] = {};</div><div class='ctx'> </div><div class='ctx'> 	len += scnprintf(buf + len, buf_len - len, "HTT_RX_TID_STATS_TLV:\n");</div><div class='ctx'> 	len += scnprintf(buf + len, buf_len - len, "sw_peer_id = %lu\n",</div><div class='hunk'>@@ -4712,7 +4713,7 @@ int ath11k_debugfs_htt_stats_req(struct ath11k *ar)</div><div class='ctx'> 	u8 type = stats_req-&gt;type;</div><div class='ctx'> 	u64 cookie = 0;</div><div class='ctx'> 	int ret, pdev_id = ar-&gt;pdev-&gt;pdev_id;</div><div class='del'>-	struct htt_ext_stats_cfg_params cfg_params = { 0 };</div><div class='add'>+	struct htt_ext_stats_cfg_params cfg_params = {};</div><div class='ctx'> </div><div class='ctx'> 	init_completion(&amp;stats_req-&gt;cmpln);</div><div class='ctx'> </div><div class='hunk'>@@ -4852,7 +4853,7 @@ static ssize_t ath11k_write_htt_stats_reset(struct file *file,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = file-&gt;private_data;</div><div class='ctx'> 	u8 type;</div><div class='del'>-	struct htt_ext_stats_cfg_params cfg_params = { 0 };</div><div class='add'>+	struct htt_ext_stats_cfg_params cfg_params = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = kstrtou8_from_user(user_buf, count, 0, &amp;type);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/debugfs_sta.c b/drivers/net/wireless/ath/ath11k/debugfs_sta.c<br/>index f56a24b6c8da..d89d0f28d890 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/debugfs_sta.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/debugfs_sta.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/debugfs_sta.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/debugfs_sta.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='hunk'>@@ -456,7 +457,7 @@ static ssize_t ath11k_dbg_sta_read_peer_pktlog(struct file *file,</div><div class='ctx'> 	struct ieee80211_sta *sta = file-&gt;private_data;</div><div class='ctx'> 	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);</div><div class='ctx'> 	struct ath11k *ar = arsta-&gt;arvif-&gt;ar;</div><div class='del'>-	char buf[32] = {0};</div><div class='add'>+	char buf[32] = {};</div><div class='ctx'> 	int len;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='hunk'>@@ -485,7 +486,7 @@ static ssize_t ath11k_dbg_sta_write_delba(struct file *file,</div><div class='ctx'> 	struct ath11k *ar = arsta-&gt;arvif-&gt;ar;</div><div class='ctx'> 	u32 tid, initiator, reason;</div><div class='ctx'> 	int ret;</div><div class='del'>-	char buf[64] = {0};</div><div class='add'>+	char buf[64] = {};</div><div class='ctx'> </div><div class='ctx'> 	ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,</div><div class='ctx'> 				     user_buf, count);</div><div class='hunk'>@@ -536,7 +537,7 @@ static ssize_t ath11k_dbg_sta_write_addba_resp(struct file *file,</div><div class='ctx'> 	struct ath11k *ar = arsta-&gt;arvif-&gt;ar;</div><div class='ctx'> 	u32 tid, status;</div><div class='ctx'> 	int ret;</div><div class='del'>-	char buf[64] = {0};</div><div class='add'>+	char buf[64] = {};</div><div class='ctx'> </div><div class='ctx'> 	ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,</div><div class='ctx'> 				     user_buf, count);</div><div class='hunk'>@@ -586,7 +587,7 @@ static ssize_t ath11k_dbg_sta_write_addba(struct file *file,</div><div class='ctx'> 	struct ath11k *ar = arsta-&gt;arvif-&gt;ar;</div><div class='ctx'> 	u32 tid, buf_size;</div><div class='ctx'> 	int ret;</div><div class='del'>-	char buf[64] = {0};</div><div class='add'>+	char buf[64] = {};</div><div class='ctx'> </div><div class='ctx'> 	ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,</div><div class='ctx'> 				     user_buf, count);</div><div class='hunk'>@@ -700,7 +701,7 @@ ath11k_write_htt_peer_stats_reset(struct file *file,</div><div class='ctx'> 	struct ieee80211_sta *sta = file-&gt;private_data;</div><div class='ctx'> 	struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);</div><div class='ctx'> 	struct ath11k *ar = arsta-&gt;arvif-&gt;ar;</div><div class='del'>-	struct htt_ext_stats_cfg_params cfg_params = { 0 };</div><div class='add'>+	struct htt_ext_stats_cfg_params cfg_params = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u8 type;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/dp.c b/drivers/net/wireless/ath/ath11k/dp.c<br/>index fbf666d0ecf1..56b1a657e0b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/dp.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/dp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/dp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/dp.c</a></div><div class='hunk'>@@ -1,10 +1,12 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;crypto/hash.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "dp_tx.h"</div><div class='ctx'> #include "hal_tx.h"</div><div class='hunk'>@@ -104,14 +106,12 @@ void ath11k_dp_srng_cleanup(struct ath11k_base *ab, struct dp_srng *ring)</div><div class='ctx'> 	if (!ring-&gt;vaddr_unaligned)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (ring-&gt;cached) {</div><div class='del'>-		dma_unmap_single(ab-&gt;dev, ring-&gt;paddr_unaligned, ring-&gt;size,</div><div class='del'>-				 DMA_FROM_DEVICE);</div><div class='del'>-		kfree(ring-&gt;vaddr_unaligned);</div><div class='del'>-	} else {</div><div class='add'>+	if (ring-&gt;cached)</div><div class='add'>+		dma_free_noncoherent(ab-&gt;dev, ring-&gt;size, ring-&gt;vaddr_unaligned,</div><div class='add'>+				     ring-&gt;paddr_unaligned, DMA_FROM_DEVICE);</div><div class='add'>+	else</div><div class='ctx'> 		dma_free_coherent(ab-&gt;dev, ring-&gt;size, ring-&gt;vaddr_unaligned,</div><div class='ctx'> 				  ring-&gt;paddr_unaligned);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	ring-&gt;vaddr_unaligned = NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -225,7 +225,7 @@ int ath11k_dp_srng_setup(struct ath11k_base *ab, struct dp_srng *ring,</div><div class='ctx'> 			 enum hal_ring_type type, int ring_num,</div><div class='ctx'> 			 int mac_id, int num_entries)</div><div class='ctx'> {</div><div class='del'>-	struct hal_srng_params params = { 0 };</div><div class='add'>+	struct hal_srng_params params = {};</div><div class='ctx'> 	int entry_sz = ath11k_hal_srng_get_entrysize(ab, type);</div><div class='ctx'> 	int max_entries = ath11k_hal_srng_get_max_entries(ab, type);</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -249,25 +249,14 @@ int ath11k_dp_srng_setup(struct ath11k_base *ab, struct dp_srng *ring,</div><div class='ctx'> 		default:</div><div class='ctx'> 			cached = false;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-		if (cached) {</div><div class='del'>-			ring-&gt;vaddr_unaligned = kzalloc(ring-&gt;size, GFP_KERNEL);</div><div class='del'>-			if (!ring-&gt;vaddr_unaligned)</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-</div><div class='del'>-			ring-&gt;paddr_unaligned = dma_map_single(ab-&gt;dev,</div><div class='del'>-							       ring-&gt;vaddr_unaligned,</div><div class='del'>-							       ring-&gt;size,</div><div class='del'>-							       DMA_FROM_DEVICE);</div><div class='del'>-			if (dma_mapping_error(ab-&gt;dev, ring-&gt;paddr_unaligned)) {</div><div class='del'>-				kfree(ring-&gt;vaddr_unaligned);</div><div class='del'>-				ring-&gt;vaddr_unaligned = NULL;</div><div class='del'>-				return -ENOMEM;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!cached)</div><div class='add'>+	if (cached)</div><div class='add'>+		ring-&gt;vaddr_unaligned = dma_alloc_noncoherent(ab-&gt;dev, ring-&gt;size,</div><div class='add'>+							      &amp;ring-&gt;paddr_unaligned,</div><div class='add'>+							      DMA_FROM_DEVICE,</div><div class='add'>+							      GFP_KERNEL);</div><div class='add'>+	else</div><div class='ctx'> 		ring-&gt;vaddr_unaligned = dma_alloc_coherent(ab-&gt;dev, ring-&gt;size,</div><div class='ctx'> 							   &amp;ring-&gt;paddr_unaligned,</div><div class='ctx'> 							   GFP_KERNEL);</div><div class='hunk'>@@ -888,7 +877,7 @@ void ath11k_dp_pdev_free(struct ath11k_base *ab)</div><div class='ctx'> 	struct ath11k *ar;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;ab-&gt;mon_reap_timer);</div><div class='add'>+	timer_delete_sync(&amp;ab-&gt;mon_reap_timer);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ab-&gt;num_radios; i++) {</div><div class='ctx'> 		ar = ab-&gt;pdevs[i].ar;</div><div class='hunk'>@@ -1130,8 +1119,9 @@ fail_link_desc_cleanup:</div><div class='ctx'> </div><div class='ctx'> static void ath11k_dp_shadow_timer_handler(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ath11k_hp_update_timer *update_timer = from_timer(update_timer,</div><div class='del'>-								 t, timer);</div><div class='add'>+	struct ath11k_hp_update_timer *update_timer = timer_container_of(update_timer,</div><div class='add'>+									 t,</div><div class='add'>+									 timer);</div><div class='ctx'> 	struct ath11k_base *ab = update_timer-&gt;ab;</div><div class='ctx'> 	struct hal_srng	*srng = &amp;ab-&gt;hal.srng_list[update_timer-&gt;ring_id];</div><div class='ctx'> </div><div class='hunk'>@@ -1183,7 +1173,7 @@ void ath11k_dp_shadow_stop_timer(struct ath11k_base *ab,</div><div class='ctx'> 	if (!update_timer-&gt;init)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;update_timer-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;update_timer-&gt;timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ath11k_dp_shadow_init_timer(struct ath11k_base *ab,</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/dp.h b/drivers/net/wireless/ath/ath11k/dp.h<br/>index 65d2bc0687c8..7a55afd33be8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/dp.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/dp.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/dp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/dp.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2023, 2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef ATH11K_DP_H</div><div class='hunk'>@@ -20,7 +20,6 @@ struct ath11k_ext_irq_grp;</div><div class='ctx'> </div><div class='ctx'> struct dp_rx_tid {</div><div class='ctx'> 	u8 tid;</div><div class='del'>-	u32 *vaddr;</div><div class='ctx'> 	dma_addr_t paddr;</div><div class='ctx'> 	u32 size;</div><div class='ctx'> 	u32 ba_win_sz;</div><div class='hunk'>@@ -37,6 +36,9 @@ struct dp_rx_tid {</div><div class='ctx'> 	/* Timer info related to fragments */</div><div class='ctx'> 	struct timer_list frag_timer;</div><div class='ctx'> 	struct ath11k_base *ab;</div><div class='add'>+	u32 *vaddr_unaligned;</div><div class='add'>+	dma_addr_t paddr_unaligned;</div><div class='add'>+	u32 unaligned_size;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define DP_REO_DESC_FREE_THRESHOLD  64</div><div class='hunk'>@@ -165,7 +167,6 @@ struct ath11k_mon_data {</div><div class='ctx'> 	struct ath11k_pdev_mon_stats rx_mon_stats;</div><div class='ctx'> 	/* lock for monitor data */</div><div class='ctx'> 	spinlock_t mon_lock;</div><div class='del'>-	struct sk_buff_head rx_status_q;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath11k_pdev_dp {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/dp_rx.c b/drivers/net/wireless/ath/ath11k/dp_rx.c<br/>index 40088e62572e..b9e976ddcbbf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/dp_rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/dp_rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/dp_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/dp_rx.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ieee80211.h&gt;</div><div class='hunk'>@@ -308,7 +308,7 @@ static u8 *ath11k_dp_rxdesc_mpdu_start_addr2(struct ath11k_base *ab,</div><div class='ctx'> </div><div class='ctx'> static void ath11k_dp_service_mon_ring(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ath11k_base *ab = from_timer(ab, t, mon_reap_timer);</div><div class='add'>+	struct ath11k_base *ab = timer_container_of(ab, t, mon_reap_timer);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ab-&gt;hw_params.num_rxdma_per_pdev; i++)</div><div class='hunk'>@@ -675,11 +675,11 @@ void ath11k_dp_reo_cmd_list_cleanup(struct ath11k_base *ab)</div><div class='ctx'> 	list_for_each_entry_safe(cmd, tmp, &amp;dp-&gt;reo_cmd_list, list) {</div><div class='ctx'> 		list_del(&amp;cmd-&gt;list);</div><div class='ctx'> 		rx_tid = &amp;cmd-&gt;data;</div><div class='del'>-		if (rx_tid-&gt;vaddr) {</div><div class='del'>-			dma_unmap_single(ab-&gt;dev, rx_tid-&gt;paddr,</div><div class='del'>-					 rx_tid-&gt;size, DMA_BIDIRECTIONAL);</div><div class='del'>-			kfree(rx_tid-&gt;vaddr);</div><div class='del'>-			rx_tid-&gt;vaddr = NULL;</div><div class='add'>+		if (rx_tid-&gt;vaddr_unaligned) {</div><div class='add'>+			dma_free_noncoherent(ab-&gt;dev, rx_tid-&gt;unaligned_size,</div><div class='add'>+					     rx_tid-&gt;vaddr_unaligned,</div><div class='add'>+					     rx_tid-&gt;paddr_unaligned, DMA_BIDIRECTIONAL);</div><div class='add'>+			rx_tid-&gt;vaddr_unaligned = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 		kfree(cmd);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -689,11 +689,11 @@ void ath11k_dp_reo_cmd_list_cleanup(struct ath11k_base *ab)</div><div class='ctx'> 		list_del(&amp;cmd_cache-&gt;list);</div><div class='ctx'> 		dp-&gt;reo_cmd_cache_flush_count--;</div><div class='ctx'> 		rx_tid = &amp;cmd_cache-&gt;data;</div><div class='del'>-		if (rx_tid-&gt;vaddr) {</div><div class='del'>-			dma_unmap_single(ab-&gt;dev, rx_tid-&gt;paddr,</div><div class='del'>-					 rx_tid-&gt;size, DMA_BIDIRECTIONAL);</div><div class='del'>-			kfree(rx_tid-&gt;vaddr);</div><div class='del'>-			rx_tid-&gt;vaddr = NULL;</div><div class='add'>+		if (rx_tid-&gt;vaddr_unaligned) {</div><div class='add'>+			dma_free_noncoherent(ab-&gt;dev, rx_tid-&gt;unaligned_size,</div><div class='add'>+					     rx_tid-&gt;vaddr_unaligned,</div><div class='add'>+					     rx_tid-&gt;paddr_unaligned, DMA_BIDIRECTIONAL);</div><div class='add'>+			rx_tid-&gt;vaddr_unaligned = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 		kfree(cmd_cache);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -708,18 +708,18 @@ static void ath11k_dp_reo_cmd_free(struct ath11k_dp *dp, void *ctx,</div><div class='ctx'> 	if (status != HAL_REO_CMD_SUCCESS)</div><div class='ctx'> 		ath11k_warn(dp-&gt;ab, "failed to flush rx tid hw desc, tid %d status %d\n",</div><div class='ctx'> 			    rx_tid-&gt;tid, status);</div><div class='del'>-	if (rx_tid-&gt;vaddr) {</div><div class='del'>-		dma_unmap_single(dp-&gt;ab-&gt;dev, rx_tid-&gt;paddr, rx_tid-&gt;size,</div><div class='del'>-				 DMA_BIDIRECTIONAL);</div><div class='del'>-		kfree(rx_tid-&gt;vaddr);</div><div class='del'>-		rx_tid-&gt;vaddr = NULL;</div><div class='add'>+	if (rx_tid-&gt;vaddr_unaligned) {</div><div class='add'>+		dma_free_noncoherent(dp-&gt;ab-&gt;dev, rx_tid-&gt;unaligned_size,</div><div class='add'>+				     rx_tid-&gt;vaddr_unaligned,</div><div class='add'>+				     rx_tid-&gt;paddr_unaligned, DMA_BIDIRECTIONAL);</div><div class='add'>+		rx_tid-&gt;vaddr_unaligned = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath11k_dp_reo_cache_flush(struct ath11k_base *ab,</div><div class='ctx'> 				      struct dp_rx_tid *rx_tid)</div><div class='ctx'> {</div><div class='del'>-	struct ath11k_hal_reo_cmd cmd = {0};</div><div class='add'>+	struct ath11k_hal_reo_cmd cmd = {};</div><div class='ctx'> 	unsigned long tot_desc_sz, desc_sz;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -749,10 +749,10 @@ static void ath11k_dp_reo_cache_flush(struct ath11k_base *ab,</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath11k_err(ab, "failed to send HAL_REO_CMD_FLUSH_CACHE cmd, tid %d (%d)\n",</div><div class='ctx'> 			   rx_tid-&gt;tid, ret);</div><div class='del'>-		dma_unmap_single(ab-&gt;dev, rx_tid-&gt;paddr, rx_tid-&gt;size,</div><div class='del'>-				 DMA_BIDIRECTIONAL);</div><div class='del'>-		kfree(rx_tid-&gt;vaddr);</div><div class='del'>-		rx_tid-&gt;vaddr = NULL;</div><div class='add'>+		dma_free_noncoherent(ab-&gt;dev, rx_tid-&gt;unaligned_size,</div><div class='add'>+				     rx_tid-&gt;vaddr_unaligned,</div><div class='add'>+				     rx_tid-&gt;paddr_unaligned, DMA_BIDIRECTIONAL);</div><div class='add'>+		rx_tid-&gt;vaddr_unaligned = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -802,16 +802,16 @@ static void ath11k_dp_rx_tid_del_func(struct ath11k_dp *dp, void *ctx,</div><div class='ctx'> </div><div class='ctx'> 	return;</div><div class='ctx'> free_desc:</div><div class='del'>-	dma_unmap_single(ab-&gt;dev, rx_tid-&gt;paddr, rx_tid-&gt;size,</div><div class='del'>-			 DMA_BIDIRECTIONAL);</div><div class='del'>-	kfree(rx_tid-&gt;vaddr);</div><div class='del'>-	rx_tid-&gt;vaddr = NULL;</div><div class='add'>+	dma_free_noncoherent(ab-&gt;dev, rx_tid-&gt;unaligned_size,</div><div class='add'>+			     rx_tid-&gt;vaddr_unaligned,</div><div class='add'>+			     rx_tid-&gt;paddr_unaligned, DMA_BIDIRECTIONAL);</div><div class='add'>+	rx_tid-&gt;vaddr_unaligned = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ath11k_peer_rx_tid_delete(struct ath11k *ar,</div><div class='ctx'> 			       struct ath11k_peer *peer, u8 tid)</div><div class='ctx'> {</div><div class='del'>-	struct ath11k_hal_reo_cmd cmd = {0};</div><div class='add'>+	struct ath11k_hal_reo_cmd cmd = {};</div><div class='ctx'> 	struct dp_rx_tid *rx_tid = &amp;peer-&gt;rx_tid[tid];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -831,14 +831,16 @@ void ath11k_peer_rx_tid_delete(struct ath11k *ar,</div><div class='ctx'> 		if (ret != -ESHUTDOWN)</div><div class='ctx'> 			ath11k_err(ar-&gt;ab, "failed to send HAL_REO_CMD_UPDATE_RX_QUEUE cmd, tid %d (%d)\n",</div><div class='ctx'> 				   tid, ret);</div><div class='del'>-		dma_unmap_single(ar-&gt;ab-&gt;dev, rx_tid-&gt;paddr, rx_tid-&gt;size,</div><div class='del'>-				 DMA_BIDIRECTIONAL);</div><div class='del'>-		kfree(rx_tid-&gt;vaddr);</div><div class='del'>-		rx_tid-&gt;vaddr = NULL;</div><div class='add'>+		dma_free_noncoherent(ar-&gt;ab-&gt;dev, rx_tid-&gt;unaligned_size,</div><div class='add'>+				     rx_tid-&gt;vaddr_unaligned,</div><div class='add'>+				     rx_tid-&gt;paddr_unaligned, DMA_BIDIRECTIONAL);</div><div class='add'>+		rx_tid-&gt;vaddr_unaligned = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rx_tid-&gt;paddr = 0;</div><div class='add'>+	rx_tid-&gt;paddr_unaligned = 0;</div><div class='ctx'> 	rx_tid-&gt;size = 0;</div><div class='add'>+	rx_tid-&gt;unaligned_size = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath11k_dp_rx_link_desc_return(struct ath11k_base *ab,</div><div class='hunk'>@@ -904,7 +906,7 @@ void ath11k_peer_frags_flush(struct ath11k *ar, struct ath11k_peer *peer)</div><div class='ctx'> 		rx_tid = &amp;peer-&gt;rx_tid[i];</div><div class='ctx'> </div><div class='ctx'> 		spin_unlock_bh(&amp;ar-&gt;ab-&gt;base_lock);</div><div class='del'>-		del_timer_sync(&amp;rx_tid-&gt;frag_timer);</div><div class='add'>+		timer_delete_sync(&amp;rx_tid-&gt;frag_timer);</div><div class='ctx'> 		spin_lock_bh(&amp;ar-&gt;ab-&gt;base_lock);</div><div class='ctx'> </div><div class='ctx'> 		ath11k_dp_rx_frags_cleanup(rx_tid, true);</div><div class='hunk'>@@ -925,7 +927,7 @@ void ath11k_peer_rx_tid_cleanup(struct ath11k *ar, struct ath11k_peer *peer)</div><div class='ctx'> 		ath11k_dp_rx_frags_cleanup(rx_tid, true);</div><div class='ctx'> </div><div class='ctx'> 		spin_unlock_bh(&amp;ar-&gt;ab-&gt;base_lock);</div><div class='del'>-		del_timer_sync(&amp;rx_tid-&gt;frag_timer);</div><div class='add'>+		timer_delete_sync(&amp;rx_tid-&gt;frag_timer);</div><div class='ctx'> 		spin_lock_bh(&amp;ar-&gt;ab-&gt;base_lock);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -936,7 +938,7 @@ static int ath11k_peer_rx_tid_reo_update(struct ath11k *ar,</div><div class='ctx'> 					 u32 ba_win_sz, u16 ssn,</div><div class='ctx'> 					 bool update_ssn)</div><div class='ctx'> {</div><div class='del'>-	struct ath11k_hal_reo_cmd cmd = {0};</div><div class='add'>+	struct ath11k_hal_reo_cmd cmd = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	cmd.addr_lo = lower_32_bits(rx_tid-&gt;paddr);</div><div class='hunk'>@@ -982,10 +984,9 @@ static void ath11k_dp_rx_tid_mem_free(struct ath11k_base *ab,</div><div class='ctx'> 	if (!rx_tid-&gt;active)</div><div class='ctx'> 		goto unlock_exit;</div><div class='ctx'> </div><div class='del'>-	dma_unmap_single(ab-&gt;dev, rx_tid-&gt;paddr, rx_tid-&gt;size,</div><div class='del'>-			 DMA_BIDIRECTIONAL);</div><div class='del'>-	kfree(rx_tid-&gt;vaddr);</div><div class='del'>-	rx_tid-&gt;vaddr = NULL;</div><div class='add'>+	dma_free_noncoherent(ab-&gt;dev, rx_tid-&gt;unaligned_size, rx_tid-&gt;vaddr_unaligned,</div><div class='add'>+			     rx_tid-&gt;paddr_unaligned, DMA_BIDIRECTIONAL);</div><div class='add'>+	rx_tid-&gt;vaddr_unaligned = NULL;</div><div class='ctx'> </div><div class='ctx'> 	rx_tid-&gt;active = false;</div><div class='ctx'> </div><div class='hunk'>@@ -1000,9 +1001,8 @@ int ath11k_peer_rx_tid_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id,</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='ctx'> 	struct ath11k_peer *peer;</div><div class='ctx'> 	struct dp_rx_tid *rx_tid;</div><div class='del'>-	u32 hw_desc_sz;</div><div class='del'>-	u32 *addr_aligned;</div><div class='del'>-	void *vaddr;</div><div class='add'>+	u32 hw_desc_sz, *vaddr;</div><div class='add'>+	void *vaddr_unaligned;</div><div class='ctx'> 	dma_addr_t paddr;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -1050,37 +1050,34 @@ int ath11k_peer_rx_tid_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id,</div><div class='ctx'> 	else</div><div class='ctx'> 		hw_desc_sz = ath11k_hal_reo_qdesc_size(DP_BA_WIN_SZ_MAX, tid);</div><div class='ctx'> </div><div class='del'>-	vaddr = kzalloc(hw_desc_sz + HAL_LINK_DESC_ALIGN - 1, GFP_ATOMIC);</div><div class='del'>-	if (!vaddr) {</div><div class='add'>+	rx_tid-&gt;unaligned_size = hw_desc_sz + HAL_LINK_DESC_ALIGN - 1;</div><div class='add'>+	vaddr_unaligned = dma_alloc_noncoherent(ab-&gt;dev, rx_tid-&gt;unaligned_size, &amp;paddr,</div><div class='add'>+						DMA_BIDIRECTIONAL, GFP_ATOMIC);</div><div class='add'>+	if (!vaddr_unaligned) {</div><div class='ctx'> 		spin_unlock_bh(&amp;ab-&gt;base_lock);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	addr_aligned = PTR_ALIGN(vaddr, HAL_LINK_DESC_ALIGN);</div><div class='del'>-</div><div class='del'>-	ath11k_hal_reo_qdesc_setup(addr_aligned, tid, ba_win_sz,</div><div class='del'>-				   ssn, pn_type);</div><div class='del'>-</div><div class='del'>-	paddr = dma_map_single(ab-&gt;dev, addr_aligned, hw_desc_sz,</div><div class='del'>-			       DMA_BIDIRECTIONAL);</div><div class='del'>-</div><div class='del'>-	ret = dma_mapping_error(ab-&gt;dev, paddr);</div><div class='del'>-	if (ret) {</div><div class='del'>-		spin_unlock_bh(&amp;ab-&gt;base_lock);</div><div class='del'>-		ath11k_warn(ab, "failed to setup dma map for peer %pM rx tid %d: %d\n",</div><div class='del'>-			    peer_mac, tid, ret);</div><div class='del'>-		goto err_mem_free;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rx_tid-&gt;vaddr = vaddr;</div><div class='del'>-	rx_tid-&gt;paddr = paddr;</div><div class='add'>+	rx_tid-&gt;vaddr_unaligned = vaddr_unaligned;</div><div class='add'>+	vaddr = PTR_ALIGN(vaddr_unaligned, HAL_LINK_DESC_ALIGN);</div><div class='add'>+	rx_tid-&gt;paddr_unaligned = paddr;</div><div class='add'>+	rx_tid-&gt;paddr = rx_tid-&gt;paddr_unaligned + ((unsigned long)vaddr -</div><div class='add'>+			(unsigned long)rx_tid-&gt;vaddr_unaligned);</div><div class='add'>+	ath11k_hal_reo_qdesc_setup(vaddr, tid, ba_win_sz, ssn, pn_type);</div><div class='ctx'> 	rx_tid-&gt;size = hw_desc_sz;</div><div class='ctx'> 	rx_tid-&gt;active = true;</div><div class='ctx'> </div><div class='add'>+	/* After dma_alloc_noncoherent, vaddr is being modified for reo qdesc setup.</div><div class='add'>+	 * Since these changes are not reflected in the device, driver now needs to</div><div class='add'>+	 * explicitly call dma_sync_single_for_device.</div><div class='add'>+	 */</div><div class='add'>+	dma_sync_single_for_device(ab-&gt;dev, rx_tid-&gt;paddr,</div><div class='add'>+				   rx_tid-&gt;size,</div><div class='add'>+				   DMA_TO_DEVICE);</div><div class='ctx'> 	spin_unlock_bh(&amp;ab-&gt;base_lock);</div><div class='ctx'> </div><div class='del'>-	ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id, peer_mac,</div><div class='del'>-						     paddr, tid, 1, ba_win_sz);</div><div class='add'>+	ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id, peer_mac, rx_tid-&gt;paddr,</div><div class='add'>+						     tid, 1, ba_win_sz);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath11k_warn(ar-&gt;ab, "failed to setup rx reorder queue for peer %pM tid %d: %d\n",</div><div class='ctx'> 			    peer_mac, tid, ret);</div><div class='hunk'>@@ -1088,12 +1085,6 @@ int ath11k_peer_rx_tid_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='del'>-</div><div class='del'>-err_mem_free:</div><div class='del'>-	kfree(rx_tid-&gt;vaddr);</div><div class='del'>-	rx_tid-&gt;vaddr = NULL;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ath11k_dp_rx_ampdu_start(struct ath11k *ar,</div><div class='hunk'>@@ -1166,7 +1157,7 @@ int ath11k_dp_peer_rx_pn_replay_config(struct ath11k_vif *arvif,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = arvif-&gt;ar;</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	struct ath11k_hal_reo_cmd cmd = {0};</div><div class='add'>+	struct ath11k_hal_reo_cmd cmd = {};</div><div class='ctx'> 	struct ath11k_peer *peer;</div><div class='ctx'> 	struct dp_rx_tid *rx_tid;</div><div class='ctx'> 	u8 tid;</div><div class='hunk'>@@ -2600,7 +2591,7 @@ static void ath11k_dp_rx_process_received_packets(struct ath11k_base *ab,</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *msdu;</div><div class='ctx'> 	struct ath11k *ar;</div><div class='del'>-	struct ieee80211_rx_status rx_status = {0};</div><div class='add'>+	struct ieee80211_rx_status rx_status = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (skb_queue_empty(msdu_list))</div><div class='hunk'>@@ -2635,7 +2626,7 @@ int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_dp *dp = &amp;ab-&gt;dp;</div><div class='ctx'> 	struct dp_rxdma_ring *rx_ring;</div><div class='del'>-	int num_buffs_reaped[MAX_RADIOS] = {0};</div><div class='add'>+	int num_buffs_reaped[MAX_RADIOS] = {};</div><div class='ctx'> 	struct sk_buff_head msdu_list[MAX_RADIOS];</div><div class='ctx'> 	struct ath11k_skb_rxcb *rxcb;</div><div class='ctx'> 	int total_msdu_reaped = 0;</div><div class='hunk'>@@ -2831,8 +2822,6 @@ static void ath11k_dp_rx_update_peer_stats(struct ath11k_sta *arsta,</div><div class='ctx'> 	rx_stats-&gt;dcm_count += ppdu_info-&gt;dcm;</div><div class='ctx'> 	rx_stats-&gt;ru_alloc_cnt[ppdu_info-&gt;ru_alloc] += num_msdu;</div><div class='ctx'> </div><div class='del'>-	arsta-&gt;rssi_comb = ppdu_info-&gt;rssi_comb;</div><div class='del'>-</div><div class='ctx'> 	BUILD_BUG_ON(ARRAY_SIZE(arsta-&gt;chain_signal) &gt;</div><div class='ctx'> 			     ARRAY_SIZE(ppdu_info-&gt;rssi_chain_pri20));</div><div class='ctx'> </div><div class='hunk'>@@ -3178,7 +3167,8 @@ move_next:</div><div class='ctx'> </div><div class='ctx'> static void ath11k_dp_rx_frag_timer(struct timer_list *timer)</div><div class='ctx'> {</div><div class='del'>-	struct dp_rx_tid *rx_tid = from_timer(rx_tid, timer, frag_timer);</div><div class='add'>+	struct dp_rx_tid *rx_tid = timer_container_of(rx_tid, timer,</div><div class='add'>+						      frag_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;rx_tid-&gt;ab-&gt;base_lock);</div><div class='ctx'> 	if (rx_tid-&gt;last_frag_no &amp;&amp;</div><div class='hunk'>@@ -3234,7 +3224,7 @@ static int ath11k_dp_rx_h_michael_mic(struct crypto_shash *tfm, u8 *key,</div><div class='ctx'> 				      size_t data_len, u8 *mic)</div><div class='ctx'> {</div><div class='ctx'> 	SHASH_DESC_ON_STACK(desc, tfm);</div><div class='del'>-	u8 mic_hdr[16] = {0};</div><div class='add'>+	u8 mic_hdr[16] = {};</div><div class='ctx'> 	u8 tid = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -3721,7 +3711,7 @@ static int ath11k_dp_rx_frag_h_mpdu(struct ath11k *ar,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;ab-&gt;base_lock);</div><div class='del'>-	del_timer_sync(&amp;rx_tid-&gt;frag_timer);</div><div class='add'>+	timer_delete_sync(&amp;rx_tid-&gt;frag_timer);</div><div class='ctx'> 	spin_lock_bh(&amp;ab-&gt;base_lock);</div><div class='ctx'> </div><div class='ctx'> 	peer = ath11k_peer_find_by_id(ab, peer_id);</div><div class='hunk'>@@ -3828,7 +3818,7 @@ int ath11k_dp_process_rx_err(struct ath11k_base *ab, struct napi_struct *napi,</div><div class='ctx'> 	struct dp_link_desc_bank *link_desc_banks;</div><div class='ctx'> 	enum hal_rx_buf_return_buf_manager rbm;</div><div class='ctx'> 	int tot_n_bufs_reaped, quota, ret, i;</div><div class='del'>-	int n_bufs_reaped[MAX_RADIOS] = {0};</div><div class='add'>+	int n_bufs_reaped[MAX_RADIOS] = {};</div><div class='ctx'> 	struct dp_rxdma_ring *rx_ring;</div><div class='ctx'> 	struct dp_srng *reo_except;</div><div class='ctx'> 	u32 desc_bank, num_msdus;</div><div class='hunk'>@@ -3872,6 +3862,7 @@ int ath11k_dp_process_rx_err(struct ath11k_base *ab, struct napi_struct *napi,</div><div class='ctx'> 		ath11k_hal_rx_msdu_link_info_get(link_desc_va, &amp;num_msdus, msdu_cookies,</div><div class='ctx'> 						 &amp;rbm);</div><div class='ctx'> 		if (rbm != HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST &amp;&amp;</div><div class='add'>+		    rbm != HAL_RX_BUF_RBM_SW1_BM &amp;&amp;</div><div class='ctx'> 		    rbm != HAL_RX_BUF_RBM_SW3_BM) {</div><div class='ctx'> 			ab-&gt;soc_stats.invalid_rbm++;</div><div class='ctx'> 			ath11k_warn(ab, "invalid return buffer manager %d\n", rbm);</div><div class='hunk'>@@ -4108,7 +4099,7 @@ static void ath11k_dp_rx_wbm_err(struct ath11k *ar,</div><div class='ctx'> 				 struct sk_buff_head *msdu_list)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);</div><div class='del'>-	struct ieee80211_rx_status rxs = {0};</div><div class='add'>+	struct ieee80211_rx_status rxs = {};</div><div class='ctx'> 	bool drop = true;</div><div class='ctx'> </div><div class='ctx'> 	switch (rxcb-&gt;err_rel_src) {</div><div class='hunk'>@@ -4144,7 +4135,7 @@ int ath11k_dp_rx_process_wbm_err(struct ath11k_base *ab,</div><div class='ctx'> 	struct ath11k_skb_rxcb *rxcb;</div><div class='ctx'> 	u32 *rx_desc;</div><div class='ctx'> 	int buf_id, mac_id;</div><div class='del'>-	int num_buffs_reaped[MAX_RADIOS] = {0};</div><div class='add'>+	int num_buffs_reaped[MAX_RADIOS] = {};</div><div class='ctx'> 	int total_num_buffs_reaped = 0;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='hunk'>@@ -4624,7 +4615,6 @@ static void ath11k_hal_rx_msdu_list_get(struct ath11k *ar,</div><div class='ctx'> 			      msdu_details[i].buf_addr_info.info0) == 0) {</div><div class='ctx'> 			msdu_desc_info = &amp;msdu_details[i - 1].rx_msdu_info;</div><div class='ctx'> 			msdu_desc_info-&gt;info0 |= last;</div><div class='del'>-			;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		msdu_desc_info = &amp;msdu_details[i].rx_msdu_info;</div><div class='hunk'>@@ -4690,11 +4680,12 @@ static void ath11k_dp_mon_get_buf_len(struct hal_rx_msdu_desc_info *info,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32</div><div class='del'>-ath11k_dp_rx_mon_mpdu_pop(struct ath11k *ar, int mac_id,</div><div class='del'>-			  void *ring_entry, struct sk_buff **head_msdu,</div><div class='del'>-			  struct sk_buff **tail_msdu, u32 *npackets,</div><div class='del'>-			  u32 *ppdu_id)</div><div class='add'>+/* clang stack usage explodes if this is inlined */</div><div class='add'>+static noinline_for_stack</div><div class='add'>+u32 ath11k_dp_rx_mon_mpdu_pop(struct ath11k *ar, int mac_id,</div><div class='add'>+			      void *ring_entry, struct sk_buff **head_msdu,</div><div class='add'>+			      struct sk_buff **tail_msdu, u32 *npackets,</div><div class='add'>+			      u32 *ppdu_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_pdev_dp *dp = &amp;ar-&gt;dp;</div><div class='ctx'> 	struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&amp;dp-&gt;mon_data;</div><div class='hunk'>@@ -4781,7 +4772,7 @@ ath11k_dp_rx_mon_mpdu_pop(struct ath11k *ar, int mac_id,</div><div class='ctx'> 			if (!msdu) {</div><div class='ctx'> 				ath11k_dbg(ar-&gt;ab, ATH11K_DBG_DATA,</div><div class='ctx'> 					   "msdu_pop: invalid buf_id %d\n", buf_id);</div><div class='del'>-				break;</div><div class='add'>+				goto next_msdu;</div><div class='ctx'> 			}</div><div class='ctx'> 			rxcb = ATH11K_SKB_RXCB(msdu);</div><div class='ctx'> 			if (!rxcb-&gt;unmapped) {</div><div class='hunk'>@@ -5146,7 +5137,7 @@ static void ath11k_dp_rx_mon_dest_process(struct ath11k *ar, int mac_id,</div><div class='ctx'> 	struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&amp;dp-&gt;mon_data;</div><div class='ctx'> 	const struct ath11k_hw_hal_params *hal_params;</div><div class='ctx'> 	void *ring_entry;</div><div class='del'>-	void *mon_dst_srng;</div><div class='add'>+	struct hal_srng *mon_dst_srng;</div><div class='ctx'> 	u32 ppdu_id;</div><div class='ctx'> 	u32 rx_bufs_used;</div><div class='ctx'> 	u32 ring_id;</div><div class='hunk'>@@ -5163,6 +5154,7 @@ static void ath11k_dp_rx_mon_dest_process(struct ath11k *ar, int mac_id,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;pmon-&gt;mon_lock);</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;mon_dst_srng-&gt;lock);</div><div class='ctx'> 	ath11k_hal_srng_access_begin(ar-&gt;ab, mon_dst_srng);</div><div class='ctx'> </div><div class='ctx'> 	ppdu_id = pmon-&gt;mon_ppdu_info.ppdu_id;</div><div class='hunk'>@@ -5221,6 +5213,7 @@ static void ath11k_dp_rx_mon_dest_process(struct ath11k *ar, int mac_id,</div><div class='ctx'> 								mon_dst_srng);</div><div class='ctx'> 	}</div><div class='ctx'> 	ath11k_hal_srng_access_end(ar-&gt;ab, mon_dst_srng);</div><div class='add'>+	spin_unlock_bh(&amp;mon_dst_srng-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;pmon-&gt;mon_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -5408,7 +5401,7 @@ ath11k_dp_rx_full_mon_mpdu_pop(struct ath11k *ar,</div><div class='ctx'> 					   "full mon msdu_pop: invalid buf_id %d\n",</div><div class='ctx'> 					    buf_id);</div><div class='ctx'> 				spin_unlock_bh(&amp;rx_ring-&gt;idr_lock);</div><div class='del'>-				break;</div><div class='add'>+				goto next_msdu;</div><div class='ctx'> 			}</div><div class='ctx'> 			idr_remove(&amp;rx_ring-&gt;bufs_idr, buf_id);</div><div class='ctx'> 			spin_unlock_bh(&amp;rx_ring-&gt;idr_lock);</div><div class='hunk'>@@ -5610,7 +5603,7 @@ static int ath11k_dp_full_mon_process_rx(struct ath11k_base *ab, int mac_id,</div><div class='ctx'> 	struct hal_sw_mon_ring_entries *sw_mon_entries;</div><div class='ctx'> 	struct ath11k_pdev_mon_stats *rx_mon_stats;</div><div class='ctx'> 	struct sk_buff *head_msdu, *tail_msdu;</div><div class='del'>-	void *mon_dst_srng = &amp;ar-&gt;ab-&gt;hal.srng_list[dp-&gt;rxdma_mon_dst_ring.ring_id];</div><div class='add'>+	struct hal_srng *mon_dst_srng;</div><div class='ctx'> 	void *ring_entry;</div><div class='ctx'> 	u32 rx_bufs_used = 0, mpdu_rx_bufs_used;</div><div class='ctx'> 	int quota = 0, ret;</div><div class='hunk'>@@ -5626,6 +5619,9 @@ static int ath11k_dp_full_mon_process_rx(struct ath11k_base *ab, int mac_id,</div><div class='ctx'> 		goto reap_status_ring;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mon_dst_srng = &amp;ar-&gt;ab-&gt;hal.srng_list[dp-&gt;rxdma_mon_dst_ring.ring_id];</div><div class='add'>+	spin_lock_bh(&amp;mon_dst_srng-&gt;lock);</div><div class='add'>+</div><div class='ctx'> 	ath11k_hal_srng_access_begin(ar-&gt;ab, mon_dst_srng);</div><div class='ctx'> 	while ((ring_entry = ath11k_hal_srng_dst_peek(ar-&gt;ab, mon_dst_srng))) {</div><div class='ctx'> 		head_msdu = NULL;</div><div class='hunk'>@@ -5669,6 +5665,7 @@ next_entry:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ath11k_hal_srng_access_end(ar-&gt;ab, mon_dst_srng);</div><div class='add'>+	spin_unlock_bh(&amp;mon_dst_srng-&gt;lock);</div><div class='ctx'> 	spin_unlock_bh(&amp;pmon-&gt;mon_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (rx_bufs_used) {</div><div class='hunk'>@@ -5705,8 +5702,6 @@ static int ath11k_dp_rx_pdev_mon_status_attach(struct ath11k *ar)</div><div class='ctx'> 	struct ath11k_pdev_dp *dp = &amp;ar-&gt;dp;</div><div class='ctx'> 	struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&amp;dp-&gt;mon_data;</div><div class='ctx'> </div><div class='del'>-	skb_queue_head_init(&amp;pmon-&gt;rx_status_q);</div><div class='del'>-</div><div class='ctx'> 	pmon-&gt;mon_ppdu_status = DP_PPDU_STATUS_START;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;pmon-&gt;rx_mon_stats, 0,</div><div class='hunk'>@@ -5786,7 +5781,7 @@ int ath11k_dp_rx_pktlog_stop(struct ath11k_base *ab, bool stop_timer)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (stop_timer)</div><div class='del'>-		del_timer_sync(&amp;ab-&gt;mon_reap_timer);</div><div class='add'>+		timer_delete_sync(&amp;ab-&gt;mon_reap_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* reap all the monitor related rings */</div><div class='ctx'> 	ret = ath11k_dp_purge_mon_ring(ab);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/dp_tx.c b/drivers/net/wireless/ath/ath11k/dp_tx.c<br/>index 8522c67baabf..562aba66582f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/dp_tx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/dp_tx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/dp_tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/dp_tx.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='hunk'>@@ -84,7 +85,7 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='ctx'> 	struct ath11k_dp *dp = &amp;ab-&gt;dp;</div><div class='del'>-	struct hal_tx_info ti = {0};</div><div class='add'>+	struct hal_tx_info ti = {};</div><div class='ctx'> 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);</div><div class='ctx'> 	struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb);</div><div class='ctx'> 	struct hal_srng *tcl_ring;</div><div class='hunk'>@@ -316,7 +317,7 @@ ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab,</div><div class='ctx'> 				 struct dp_tx_ring *tx_ring,</div><div class='ctx'> 				 struct ath11k_dp_htt_wbm_tx_status *ts)</div><div class='ctx'> {</div><div class='del'>-	struct ieee80211_tx_status status = { 0 };</div><div class='add'>+	struct ieee80211_tx_status status = {};</div><div class='ctx'> 	struct sk_buff *msdu;</div><div class='ctx'> 	struct ieee80211_tx_info *info;</div><div class='ctx'> 	struct ath11k_skb_cb *skb_cb;</div><div class='hunk'>@@ -391,7 +392,7 @@ ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base *ab,</div><div class='ctx'> 				     u32 msdu_id, struct dp_tx_ring *tx_ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct htt_tx_wbm_completion *status_desc;</div><div class='del'>-	struct ath11k_dp_htt_wbm_tx_status ts = {0};</div><div class='add'>+	struct ath11k_dp_htt_wbm_tx_status ts = {};</div><div class='ctx'> 	enum hal_wbm_htt_tx_comp_status wbm_status;</div><div class='ctx'> </div><div class='ctx'> 	status_desc = desc + HTT_TX_WBM_COMP_STATUS_OFFSET;</div><div class='hunk'>@@ -551,8 +552,8 @@ static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,</div><div class='ctx'> 				       struct sk_buff *msdu,</div><div class='ctx'> 				       struct hal_tx_status *ts)</div><div class='ctx'> {</div><div class='del'>-	struct ieee80211_tx_status status = { 0 };</div><div class='del'>-	struct ieee80211_rate_status status_rate = { 0 };</div><div class='add'>+	struct ieee80211_tx_status status = {};</div><div class='add'>+	struct ieee80211_rate_status status_rate = {};</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='ctx'> 	struct ieee80211_tx_info *info;</div><div class='ctx'> 	struct ath11k_skb_cb *skb_cb;</div><div class='hunk'>@@ -690,7 +691,7 @@ void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)</div><div class='ctx'> 	int hal_ring_id = dp-&gt;tx_ring[ring_id].tcl_comp_ring.ring_id;</div><div class='ctx'> 	struct hal_srng *status_ring = &amp;ab-&gt;hal.srng_list[hal_ring_id];</div><div class='ctx'> 	struct sk_buff *msdu;</div><div class='del'>-	struct hal_tx_status ts = { 0 };</div><div class='add'>+	struct hal_tx_status ts = {};</div><div class='ctx'> 	struct dp_tx_ring *tx_ring = &amp;dp-&gt;tx_ring[ring_id];</div><div class='ctx'> 	u32 *desc;</div><div class='ctx'> 	u32 msdu_id;</div><div class='hunk'>@@ -1187,7 +1188,7 @@ int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_pdev_dp *dp = &amp;ar-&gt;dp;</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	struct htt_rx_ring_tlv_filter tlv_filter = {0};</div><div class='add'>+	struct htt_rx_ring_tlv_filter tlv_filter = {};</div><div class='ctx'> 	int ret = 0, ring_id = 0, i;</div><div class='ctx'> </div><div class='ctx'> 	if (ab-&gt;hw_params.full_monitor_mode) {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/fw.c b/drivers/net/wireless/ath/ath11k/fw.c<br/>index 4e36292a79db..07d775a7b528 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/fw.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/fw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/fw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/fw.c</a></div><div class='hunk'>@@ -1,8 +1,10 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='del'>- * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include "core.h"</div><div class='ctx'> </div><div class='ctx'> #include "debug.h"</div><div class='hunk'>@@ -166,3 +168,4 @@ void ath11k_fw_destroy(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	release_firmware(ab-&gt;fw.fw);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(ath11k_fw_destroy);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/hal.c b/drivers/net/wireless/ath/ath11k/hal.c<br/>index f02599bd1c36..0c797b8d0a27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/hal.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/hal.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/hal.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/hal.c</a></div><div class='hunk'>@@ -2,8 +2,10 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include "hal_tx.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "hal_desc.h"</div><div class='hunk'>@@ -823,13 +825,23 @@ u32 *ath11k_hal_srng_src_peek(struct ath11k_base *ab, struct hal_srng *srng)</div><div class='ctx'> </div><div class='ctx'> void ath11k_hal_srng_access_begin(struct ath11k_base *ab, struct hal_srng *srng)</div><div class='ctx'> {</div><div class='add'>+	u32 hp;</div><div class='add'>+</div><div class='ctx'> 	lockdep_assert_held(&amp;srng-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (srng-&gt;ring_dir == HAL_SRNG_DIR_SRC) {</div><div class='ctx'> 		srng-&gt;u.src_ring.cached_tp =</div><div class='ctx'> 			*(volatile u32 *)srng-&gt;u.src_ring.tp_addr;</div><div class='ctx'> 	} else {</div><div class='del'>-		srng-&gt;u.dst_ring.cached_hp = *srng-&gt;u.dst_ring.hp_addr;</div><div class='add'>+		hp = READ_ONCE(*srng-&gt;u.dst_ring.hp_addr);</div><div class='add'>+</div><div class='add'>+		if (hp != srng-&gt;u.dst_ring.cached_hp) {</div><div class='add'>+			srng-&gt;u.dst_ring.cached_hp = hp;</div><div class='add'>+			/* Make sure descriptor is read after the head</div><div class='add'>+			 * pointer.</div><div class='add'>+			 */</div><div class='add'>+			dma_rmb();</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* Try to prefetch the next descriptor in the ring */</div><div class='ctx'> 		if (srng-&gt;flags &amp; HAL_SRNG_FLAGS_CACHED)</div><div class='hunk'>@@ -844,7 +856,6 @@ void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng)</div><div class='ctx'> {</div><div class='ctx'> 	lockdep_assert_held(&amp;srng-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	/* TODO: See if we need a write memory barrier here */</div><div class='ctx'> 	if (srng-&gt;flags &amp; HAL_SRNG_FLAGS_LMAC_RING) {</div><div class='ctx'> 		/* For LMAC rings, ring pointer updates are done through FW and</div><div class='ctx'> 		 * hence written to a shared memory location that is read by FW</div><div class='hunk'>@@ -852,21 +863,37 @@ void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng)</div><div class='ctx'> 		if (srng-&gt;ring_dir == HAL_SRNG_DIR_SRC) {</div><div class='ctx'> 			srng-&gt;u.src_ring.last_tp =</div><div class='ctx'> 				*(volatile u32 *)srng-&gt;u.src_ring.tp_addr;</div><div class='del'>-			*srng-&gt;u.src_ring.hp_addr = srng-&gt;u.src_ring.hp;</div><div class='add'>+			/* Make sure descriptor is written before updating the</div><div class='add'>+			 * head pointer.</div><div class='add'>+			 */</div><div class='add'>+			dma_wmb();</div><div class='add'>+			WRITE_ONCE(*srng-&gt;u.src_ring.hp_addr, srng-&gt;u.src_ring.hp);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			srng-&gt;u.dst_ring.last_hp = *srng-&gt;u.dst_ring.hp_addr;</div><div class='del'>-			*srng-&gt;u.dst_ring.tp_addr = srng-&gt;u.dst_ring.tp;</div><div class='add'>+			/* Make sure descriptor is read before updating the</div><div class='add'>+			 * tail pointer.</div><div class='add'>+			 */</div><div class='add'>+			dma_mb();</div><div class='add'>+			WRITE_ONCE(*srng-&gt;u.dst_ring.tp_addr, srng-&gt;u.dst_ring.tp);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (srng-&gt;ring_dir == HAL_SRNG_DIR_SRC) {</div><div class='ctx'> 			srng-&gt;u.src_ring.last_tp =</div><div class='ctx'> 				*(volatile u32 *)srng-&gt;u.src_ring.tp_addr;</div><div class='add'>+			/* Assume implementation use an MMIO write accessor</div><div class='add'>+			 * which has the required wmb() so that the descriptor</div><div class='add'>+			 * is written before the updating the head pointer.</div><div class='add'>+			 */</div><div class='ctx'> 			ath11k_hif_write32(ab,</div><div class='ctx'> 					   (unsigned long)srng-&gt;u.src_ring.hp_addr -</div><div class='ctx'> 					   (unsigned long)ab-&gt;mem,</div><div class='ctx'> 					   srng-&gt;u.src_ring.hp);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			srng-&gt;u.dst_ring.last_hp = *srng-&gt;u.dst_ring.hp_addr;</div><div class='add'>+			/* Make sure descriptor is read before updating the</div><div class='add'>+			 * tail pointer.</div><div class='add'>+			 */</div><div class='add'>+			mb();</div><div class='ctx'> 			ath11k_hif_write32(ab,</div><div class='ctx'> 					   (unsigned long)srng-&gt;u.dst_ring.tp_addr -</div><div class='ctx'> 					   (unsigned long)ab-&gt;mem,</div><div class='hunk'>@@ -1346,14 +1373,35 @@ EXPORT_SYMBOL(ath11k_hal_srng_init);</div><div class='ctx'> void ath11k_hal_srng_deinit(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_hal *hal = &amp;ab-&gt;hal;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; HAL_SRNG_RING_ID_MAX; i++)</div><div class='add'>+		ab-&gt;hal.srng_list[i].initialized = 0;</div><div class='ctx'> </div><div class='ctx'> 	ath11k_hal_unregister_srng_key(ab);</div><div class='ctx'> 	ath11k_hal_free_cont_rdp(ab);</div><div class='ctx'> 	ath11k_hal_free_cont_wrp(ab);</div><div class='ctx'> 	kfree(hal-&gt;srng_config);</div><div class='add'>+	hal-&gt;srng_config = NULL;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ath11k_hal_srng_deinit);</div><div class='ctx'> </div><div class='add'>+void ath11k_hal_srng_clear(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	/* No need to memset rdp and wrp memory since each individual</div><div class='add'>+	 * segment would get cleared in ath11k_hal_srng_src_hw_init()</div><div class='add'>+	 * and ath11k_hal_srng_dst_hw_init().</div><div class='add'>+	 */</div><div class='add'>+	memset(ab-&gt;hal.srng_list, 0,</div><div class='add'>+	       sizeof(ab-&gt;hal.srng_list));</div><div class='add'>+	memset(ab-&gt;hal.shadow_reg_addr, 0,</div><div class='add'>+	       sizeof(ab-&gt;hal.shadow_reg_addr));</div><div class='add'>+	ab-&gt;hal.avail_blk_resource = 0;</div><div class='add'>+	ab-&gt;hal.current_blk_index = 0;</div><div class='add'>+	ab-&gt;hal.num_shadow_reg_configured = 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ath11k_hal_srng_clear);</div><div class='add'>+</div><div class='ctx'> void ath11k_hal_dump_srng_stats(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	struct hal_srng *srng;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/hal.h b/drivers/net/wireless/ath/ath11k/hal.h<br/>index dc8bbe073017..82603a389bb9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/hal.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/hal.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/hal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/hal.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef ATH11K_HAL_H</div><div class='hunk'>@@ -43,14 +43,14 @@ struct ath11k_base;</div><div class='ctx'> #define HAL_SEQ_WCSS_UMAC_OFFSET		0x00a00000</div><div class='ctx'> #define HAL_SEQ_WCSS_UMAC_REO_REG		0x00a38000</div><div class='ctx'> #define HAL_SEQ_WCSS_UMAC_TCL_REG		0x00a44000</div><div class='del'>-#define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;hal_seq_wcss_umac_ce0_src_reg)</div><div class='del'>-#define HAL_SEQ_WCSS_UMAC_CE0_DST_REG(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;hal_seq_wcss_umac_ce0_dst_reg)</div><div class='del'>-#define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;hal_seq_wcss_umac_ce1_src_reg)</div><div class='del'>-#define HAL_SEQ_WCSS_UMAC_CE1_DST_REG(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;hal_seq_wcss_umac_ce1_dst_reg)</div><div class='add'>+#define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;hal_seq_wcss_umac_ce0_src_reg)</div><div class='add'>+#define HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;hal_seq_wcss_umac_ce0_dst_reg)</div><div class='add'>+#define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;hal_seq_wcss_umac_ce1_src_reg)</div><div class='add'>+#define HAL_SEQ_WCSS_UMAC_CE1_DST_REG(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;hal_seq_wcss_umac_ce1_dst_reg)</div><div class='ctx'> #define HAL_SEQ_WCSS_UMAC_WBM_REG		0x00a34000</div><div class='ctx'> </div><div class='ctx'> #define HAL_CE_WFSS_CE_REG_BASE			0x01b80000</div><div class='hunk'>@@ -209,10 +209,10 @@ struct ath11k_base;</div><div class='ctx'> #define HAL_REO_STATUS_HP(ab)			ab-&gt;hw_params.regs-&gt;hal_reo_status_hp</div><div class='ctx'> </div><div class='ctx'> /* WBM Idle R0 address */</div><div class='del'>-#define HAL_WBM_IDLE_LINK_RING_BASE_LSB(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;hal_wbm_idle_link_ring_base_lsb)</div><div class='del'>-#define HAL_WBM_IDLE_LINK_RING_MISC_ADDR(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;hal_wbm_idle_link_ring_misc)</div><div class='add'>+#define HAL_WBM_IDLE_LINK_RING_BASE_LSB(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;hal_wbm_idle_link_ring_base_lsb)</div><div class='add'>+#define HAL_WBM_IDLE_LINK_RING_MISC_ADDR(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;hal_wbm_idle_link_ring_misc)</div><div class='ctx'> #define HAL_WBM_R0_IDLE_LIST_CONTROL_ADDR	0x00000048</div><div class='ctx'> #define HAL_WBM_R0_IDLE_LIST_SIZE_ADDR		0x0000004c</div><div class='ctx'> #define HAL_WBM_SCATTERED_RING_BASE_LSB		0x00000058</div><div class='hunk'>@@ -227,17 +227,17 @@ struct ath11k_base;</div><div class='ctx'> #define HAL_WBM_IDLE_LINK_RING_HP		0x000030b0</div><div class='ctx'> </div><div class='ctx'> /* SW2WBM R0 release address */</div><div class='del'>-#define HAL_WBM_RELEASE_RING_BASE_LSB(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;hal_wbm_release_ring_base_lsb)</div><div class='add'>+#define HAL_WBM_RELEASE_RING_BASE_LSB(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;hal_wbm_release_ring_base_lsb)</div><div class='ctx'> </div><div class='ctx'> /* SW2WBM R2 release address */</div><div class='ctx'> #define HAL_WBM_RELEASE_RING_HP			0x00003018</div><div class='ctx'> </div><div class='ctx'> /* WBM2SW R0 release address */</div><div class='del'>-#define HAL_WBM0_RELEASE_RING_BASE_LSB(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;hal_wbm0_release_ring_base_lsb)</div><div class='del'>-#define HAL_WBM1_RELEASE_RING_BASE_LSB(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;hal_wbm1_release_ring_base_lsb)</div><div class='add'>+#define HAL_WBM0_RELEASE_RING_BASE_LSB(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;hal_wbm0_release_ring_base_lsb)</div><div class='add'>+#define HAL_WBM1_RELEASE_RING_BASE_LSB(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;hal_wbm1_release_ring_base_lsb)</div><div class='ctx'> </div><div class='ctx'> /* WBM2SW R2 release address */</div><div class='ctx'> #define HAL_WBM0_RELEASE_RING_HP		0x000030c0</div><div class='hunk'>@@ -700,7 +700,7 @@ enum hal_rx_buf_return_buf_manager {</div><div class='ctx'> #define HAL_REO_CMD_FLG_UNBLK_RESOURCE		BIT(7)</div><div class='ctx'> #define HAL_REO_CMD_FLG_UNBLK_CACHE		BIT(8)</div><div class='ctx'> </div><div class='del'>-/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO0_UPD_* feilds */</div><div class='add'>+/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO0_UPD_* fields */</div><div class='ctx'> #define HAL_REO_CMD_UPD0_RX_QUEUE_NUM		BIT(8)</div><div class='ctx'> #define HAL_REO_CMD_UPD0_VLD			BIT(9)</div><div class='ctx'> #define HAL_REO_CMD_UPD0_ALDC			BIT(10)</div><div class='hunk'>@@ -725,7 +725,7 @@ enum hal_rx_buf_return_buf_manager {</div><div class='ctx'> #define HAL_REO_CMD_UPD0_PN_VALID		BIT(29)</div><div class='ctx'> #define HAL_REO_CMD_UPD0_PN			BIT(30)</div><div class='ctx'> </div><div class='del'>-/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO1_* feilds */</div><div class='add'>+/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO1_* fields */</div><div class='ctx'> #define HAL_REO_CMD_UPD1_VLD			BIT(16)</div><div class='ctx'> #define HAL_REO_CMD_UPD1_ALDC			GENMASK(18, 17)</div><div class='ctx'> #define HAL_REO_CMD_UPD1_DIS_DUP_DETECTION	BIT(19)</div><div class='hunk'>@@ -741,7 +741,7 @@ enum hal_rx_buf_return_buf_manager {</div><div class='ctx'> #define HAL_REO_CMD_UPD1_PN_HANDLE_ENABLE	BIT(30)</div><div class='ctx'> #define HAL_REO_CMD_UPD1_IGNORE_AMPDU_FLG	BIT(31)</div><div class='ctx'> </div><div class='del'>-/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO2_* feilds */</div><div class='add'>+/* Should be matching with HAL_REO_UPD_RX_QUEUE_INFO2_* fields */</div><div class='ctx'> #define HAL_REO_CMD_UPD2_SVLD			BIT(10)</div><div class='ctx'> #define HAL_REO_CMD_UPD2_SSN			GENMASK(22, 11)</div><div class='ctx'> #define HAL_REO_CMD_UPD2_SEQ_2K_ERR		BIT(23)</div><div class='hunk'>@@ -965,6 +965,7 @@ int ath11k_hal_srng_setup(struct ath11k_base *ab, enum hal_ring_type type,</div><div class='ctx'> 			  struct hal_srng_params *params);</div><div class='ctx'> int ath11k_hal_srng_init(struct ath11k_base *ath11k);</div><div class='ctx'> void ath11k_hal_srng_deinit(struct ath11k_base *ath11k);</div><div class='add'>+void ath11k_hal_srng_clear(struct ath11k_base *ab);</div><div class='ctx'> void ath11k_hal_dump_srng_stats(struct ath11k_base *ab);</div><div class='ctx'> void ath11k_hal_srng_get_shadow_config(struct ath11k_base *ab,</div><div class='ctx'> 				       u32 **cfg, u32 *len);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/hal_rx.c b/drivers/net/wireless/ath/ath11k/hal_rx.c<br/>index 8f7dd43dc1bd..753bd93f0212 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/hal_rx.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/hal_rx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/hal_rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/hal_rx.c</a></div><div class='hunk'>@@ -372,7 +372,8 @@ int ath11k_hal_wbm_desc_parse_err(struct ath11k_base *ab, void *desc,</div><div class='ctx'> </div><div class='ctx'> 	ret_buf_mgr = FIELD_GET(BUFFER_ADDR_INFO1_RET_BUF_MGR,</div><div class='ctx'> 				wbm_desc-&gt;buf_addr_info.info1);</div><div class='del'>-	if (ret_buf_mgr != HAL_RX_BUF_RBM_SW3_BM) {</div><div class='add'>+	if (ret_buf_mgr != HAL_RX_BUF_RBM_SW1_BM &amp;&amp;</div><div class='add'>+	    ret_buf_mgr != HAL_RX_BUF_RBM_SW3_BM) {</div><div class='ctx'> 		ab-&gt;soc_stats.invalid_rbm++;</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/hif.h b/drivers/net/wireless/ath/ath11k/hif.h<br/>index 674ff772b181..cd9c4b838246 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/hif.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/hif.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/hif.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/hif.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _HIF_H_</div><div class='hunk'>@@ -18,7 +18,7 @@ struct ath11k_hif_ops {</div><div class='ctx'> 	int (*start)(struct ath11k_base *ab);</div><div class='ctx'> 	void (*stop)(struct ath11k_base *ab);</div><div class='ctx'> 	int (*power_up)(struct ath11k_base *ab);</div><div class='del'>-	void (*power_down)(struct ath11k_base *ab);</div><div class='add'>+	void (*power_down)(struct ath11k_base *ab, bool is_suspend);</div><div class='ctx'> 	int (*suspend)(struct ath11k_base *ab);</div><div class='ctx'> 	int (*resume)(struct ath11k_base *ab);</div><div class='ctx'> 	int (*map_service_to_pipe)(struct ath11k_base *ab, u16 service_id,</div><div class='hunk'>@@ -31,6 +31,7 @@ struct ath11k_hif_ops {</div><div class='ctx'> 	void (*ce_irq_enable)(struct ath11k_base *ab);</div><div class='ctx'> 	void (*ce_irq_disable)(struct ath11k_base *ab);</div><div class='ctx'> 	void (*get_ce_msi_idx)(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx);</div><div class='add'>+	void (*coredump_download)(struct ath11k_base *ab);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline void ath11k_hif_ce_irq_enable(struct ath11k_base *ab)</div><div class='hunk'>@@ -67,12 +68,18 @@ static inline void ath11k_hif_irq_disable(struct ath11k_base *ab)</div><div class='ctx'> </div><div class='ctx'> static inline int ath11k_hif_power_up(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='add'>+	if (!ab-&gt;hif.ops-&gt;power_up)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	return ab-&gt;hif.ops-&gt;power_up(ab);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void ath11k_hif_power_down(struct ath11k_base *ab)</div><div class='add'>+static inline void ath11k_hif_power_down(struct ath11k_base *ab, bool is_suspend)</div><div class='ctx'> {</div><div class='del'>-	ab-&gt;hif.ops-&gt;power_down(ab);</div><div class='add'>+	if (!ab-&gt;hif.ops-&gt;power_down)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ab-&gt;hif.ops-&gt;power_down(ab, is_suspend);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline int ath11k_hif_suspend(struct ath11k_base *ab)</div><div class='hunk'>@@ -146,4 +153,10 @@ static inline void ath11k_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id,</div><div class='ctx'> 		*msi_data_idx = ce_id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline void ath11k_hif_coredump_download(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	if (ab-&gt;hif.ops-&gt;coredump_download)</div><div class='add'>+		ab-&gt;hif.ops-&gt;coredump_download(ab);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* _HIF_H_ */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/htc.c b/drivers/net/wireless/ath/ath11k/htc.c<br/>index 23054ab29a5e..4571d01cc33d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/htc.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/htc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/htc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/htc.c</a></div><div class='hunk'>@@ -497,7 +497,7 @@ static u8 ath11k_htc_get_credit_allocation(struct ath11k_htc *htc,</div><div class='ctx'> static int ath11k_htc_setup_target_buffer_assignments(struct ath11k_htc *htc)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_htc_svc_tx_credits *serv_entry;</div><div class='del'>-	u32 svc_id[] = {</div><div class='add'>+	static const u32 svc_id[] = {</div><div class='ctx'> 		ATH11K_HTC_SVC_ID_WMI_CONTROL,</div><div class='ctx'> 		ATH11K_HTC_SVC_ID_WMI_CONTROL_MAC1,</div><div class='ctx'> 		ATH11K_HTC_SVC_ID_WMI_CONTROL_MAC2,</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h<br/>index 300322535766..52d9f4c13b13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/hw.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/hw.h</a></div><div class='hunk'>@@ -227,6 +227,7 @@ struct ath11k_hw_params {</div><div class='ctx'> 	bool smp2p_wow_exit;</div><div class='ctx'> 	bool support_fw_mac_sequence;</div><div class='ctx'> 	bool support_dual_stations;</div><div class='add'>+	bool pdev_suspend;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath11k_hw_ops {</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/mac.c b/drivers/net/wireless/ath/ath11k/mac.c<br/>index e6acbff06749..3276fe443502 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/mac.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/mac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/mac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/mac.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/mac80211.h&gt;</div><div class='hunk'>@@ -1037,7 +1037,7 @@ static int ath11k_mac_monitor_vdev_create(struct ath11k *ar)</div><div class='ctx'> 	struct ath11k_pdev *pdev = ar-&gt;pdev;</div><div class='ctx'> 	struct vdev_create_params param = {};</div><div class='ctx'> 	int bit, ret;</div><div class='del'>-	u8 tmp_addr[6] = {0};</div><div class='add'>+	u8 tmp_addr[6] = {};</div><div class='ctx'> 	u16 nss;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;ar-&gt;conf_mutex);</div><div class='hunk'>@@ -1283,7 +1283,7 @@ static int ath11k_mac_config_ps(struct ath11k *ar)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath11k_mac_op_config(struct ieee80211_hw *hw, u32 changed)</div><div class='add'>+static int ath11k_mac_op_config(struct ieee80211_hw *hw, int radio_idx, u32 changed)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = hw-&gt;priv;</div><div class='ctx'> 	struct ieee80211_conf *conf = &amp;hw-&gt;conf;</div><div class='hunk'>@@ -1529,17 +1529,29 @@ static int ath11k_mac_set_vif_params(struct ath11k_vif *arvif,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath11k_mac_setup_bcn_tmpl_ema(struct ath11k_vif *arvif)</div><div class='add'>+static struct ath11k_vif *ath11k_mac_get_tx_arvif(struct ath11k_vif *arvif)</div><div class='add'>+{</div><div class='add'>+	struct ieee80211_bss_conf *link_conf, *tx_bss_conf;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_wiphy(arvif-&gt;ar-&gt;hw-&gt;wiphy);</div><div class='add'>+</div><div class='add'>+	link_conf = &amp;arvif-&gt;vif-&gt;bss_conf;</div><div class='add'>+	tx_bss_conf = wiphy_dereference(arvif-&gt;ar-&gt;hw-&gt;wiphy, link_conf-&gt;tx_bss_conf);</div><div class='add'>+	if (tx_bss_conf)</div><div class='add'>+		return ath11k_vif_to_arvif(tx_bss_conf-&gt;vif);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath11k_mac_setup_bcn_tmpl_ema(struct ath11k_vif *arvif,</div><div class='add'>+					 struct ath11k_vif *tx_arvif)</div><div class='ctx'> {</div><div class='del'>-	struct ath11k_vif *tx_arvif;</div><div class='ctx'> 	struct ieee80211_ema_beacons *beacons;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	bool nontx_vif_params_set = false;</div><div class='ctx'> 	u32 params = 0;</div><div class='ctx'> 	u8 i = 0;</div><div class='ctx'> </div><div class='del'>-	tx_arvif = ath11k_vif_to_arvif(arvif-&gt;vif-&gt;mbssid_tx_vif);</div><div class='del'>-</div><div class='ctx'> 	beacons = ieee80211_beacon_get_template_ema_list(tx_arvif-&gt;ar-&gt;hw,</div><div class='ctx'> 							 tx_arvif-&gt;vif, 0);</div><div class='ctx'> 	if (!beacons || !beacons-&gt;cnt) {</div><div class='hunk'>@@ -1585,25 +1597,22 @@ static int ath11k_mac_setup_bcn_tmpl_ema(struct ath11k_vif *arvif)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath11k_mac_setup_bcn_tmpl_mbssid(struct ath11k_vif *arvif)</div><div class='add'>+static int ath11k_mac_setup_bcn_tmpl_mbssid(struct ath11k_vif *arvif,</div><div class='add'>+					    struct ath11k_vif *tx_arvif)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = arvif-&gt;ar;</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	struct ath11k_vif *tx_arvif = arvif;</div><div class='ctx'> 	struct ieee80211_hw *hw = ar-&gt;hw;</div><div class='ctx'> 	struct ieee80211_vif *vif = arvif-&gt;vif;</div><div class='ctx'> 	struct ieee80211_mutable_offsets offs = {};</div><div class='ctx'> 	struct sk_buff *bcn;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (vif-&gt;mbssid_tx_vif) {</div><div class='del'>-		tx_arvif = ath11k_vif_to_arvif(vif-&gt;mbssid_tx_vif);</div><div class='del'>-		if (tx_arvif != arvif) {</div><div class='del'>-			ar = tx_arvif-&gt;ar;</div><div class='del'>-			ab = ar-&gt;ab;</div><div class='del'>-			hw = ar-&gt;hw;</div><div class='del'>-			vif = tx_arvif-&gt;vif;</div><div class='del'>-		}</div><div class='add'>+	if (tx_arvif != arvif) {</div><div class='add'>+		ar = tx_arvif-&gt;ar;</div><div class='add'>+		ab = ar-&gt;ab;</div><div class='add'>+		hw = ar-&gt;hw;</div><div class='add'>+		vif = tx_arvif-&gt;vif;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	bcn = ieee80211_beacon_get_template(hw, vif, &amp;offs, 0);</div><div class='hunk'>@@ -1632,6 +1641,7 @@ static int ath11k_mac_setup_bcn_tmpl_mbssid(struct ath11k_vif *arvif)</div><div class='ctx'> static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)</div><div class='ctx'> {</div><div class='ctx'> 	struct ieee80211_vif *vif = arvif-&gt;vif;</div><div class='add'>+	struct ath11k_vif *tx_arvif;</div><div class='ctx'> </div><div class='ctx'> 	if (arvif-&gt;vdev_type != WMI_VDEV_TYPE_AP)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -1639,14 +1649,18 @@ static int ath11k_mac_setup_bcn_tmpl(struct ath11k_vif *arvif)</div><div class='ctx'> 	/* Target does not expect beacon templates for the already up</div><div class='ctx'> 	 * non-transmitting interfaces, and results in a crash if sent.</div><div class='ctx'> 	 */</div><div class='del'>-	if (vif-&gt;mbssid_tx_vif &amp;&amp;</div><div class='del'>-	    arvif != ath11k_vif_to_arvif(vif-&gt;mbssid_tx_vif) &amp;&amp; arvif-&gt;is_up)</div><div class='del'>-		return 0;</div><div class='add'>+	tx_arvif = ath11k_mac_get_tx_arvif(arvif);</div><div class='add'>+	if (tx_arvif) {</div><div class='add'>+		if (arvif != tx_arvif &amp;&amp; arvif-&gt;is_up)</div><div class='add'>+			return 0;</div><div class='ctx'> </div><div class='del'>-	if (vif-&gt;bss_conf.ema_ap &amp;&amp; vif-&gt;mbssid_tx_vif)</div><div class='del'>-		return ath11k_mac_setup_bcn_tmpl_ema(arvif);</div><div class='add'>+		if (vif-&gt;bss_conf.ema_ap)</div><div class='add'>+			return ath11k_mac_setup_bcn_tmpl_ema(arvif, tx_arvif);</div><div class='add'>+	} else {</div><div class='add'>+		tx_arvif = arvif;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return ath11k_mac_setup_bcn_tmpl_mbssid(arvif);</div><div class='add'>+	return ath11k_mac_setup_bcn_tmpl_mbssid(arvif, tx_arvif);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ath11k_mac_bcn_tx_event(struct ath11k_vif *arvif)</div><div class='hunk'>@@ -1674,7 +1688,7 @@ static void ath11k_control_beaconing(struct ath11k_vif *arvif,</div><div class='ctx'> 				     struct ieee80211_bss_conf *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = arvif-&gt;ar;</div><div class='del'>-	struct ath11k_vif *tx_arvif = NULL;</div><div class='add'>+	struct ath11k_vif *tx_arvif;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	lockdep_assert_held(&amp;arvif-&gt;ar-&gt;conf_mutex);</div><div class='hunk'>@@ -1697,15 +1711,11 @@ static void ath11k_control_beaconing(struct ath11k_vif *arvif,</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	arvif-&gt;tx_seq_no = 0x1000;</div><div class='del'>-</div><div class='ctx'> 	arvif-&gt;aid = 0;</div><div class='ctx'> </div><div class='ctx'> 	ether_addr_copy(arvif-&gt;bssid, info-&gt;bssid);</div><div class='ctx'> </div><div class='del'>-	if (arvif-&gt;vif-&gt;mbssid_tx_vif)</div><div class='del'>-		tx_arvif = ath11k_vif_to_arvif(arvif-&gt;vif-&gt;mbssid_tx_vif);</div><div class='del'>-</div><div class='add'>+	tx_arvif = ath11k_mac_get_tx_arvif(arvif);</div><div class='ctx'> 	ret = ath11k_wmi_vdev_up(arvif-&gt;ar, arvif-&gt;vdev_id, arvif-&gt;aid,</div><div class='ctx'> 				 arvif-&gt;bssid,</div><div class='ctx'> 				 tx_arvif ? tx_arvif-&gt;bssid : NULL,</div><div class='hunk'>@@ -2225,12 +2235,12 @@ static void ath11k_peer_assoc_h_vht(struct ath11k *ar,</div><div class='ctx'> 	arg-&gt;peer_nss = min(sta-&gt;deflink.rx_nss, max_nss);</div><div class='ctx'> 	arg-&gt;rx_max_rate = __le16_to_cpu(vht_cap-&gt;vht_mcs.rx_highest);</div><div class='ctx'> 	arg-&gt;rx_mcs_set = __le16_to_cpu(vht_cap-&gt;vht_mcs.rx_mcs_map);</div><div class='add'>+	arg-&gt;rx_mcs_set = ath11k_peer_assoc_h_vht_limit(arg-&gt;rx_mcs_set, vht_mcs_mask);</div><div class='ctx'> 	arg-&gt;tx_max_rate = __le16_to_cpu(vht_cap-&gt;vht_mcs.tx_highest);</div><div class='del'>-	arg-&gt;tx_mcs_set = ath11k_peer_assoc_h_vht_limit(</div><div class='del'>-		__le16_to_cpu(vht_cap-&gt;vht_mcs.tx_mcs_map), vht_mcs_mask);</div><div class='add'>+	arg-&gt;tx_mcs_set = __le16_to_cpu(vht_cap-&gt;vht_mcs.tx_mcs_map);</div><div class='ctx'> </div><div class='ctx'> 	/* In IPQ8074 platform, VHT mcs rate 10 and 11 is enabled by default.</div><div class='del'>-	 * VHT mcs rate 10 and 11 is not suppoerted in 11ac standard.</div><div class='add'>+	 * VHT mcs rate 10 and 11 is not supported in 11ac standard.</div><div class='ctx'> 	 * so explicitly disable the VHT MCS rate 10 and 11 in 11ac mode.</div><div class='ctx'> 	 */</div><div class='ctx'> 	arg-&gt;tx_mcs_set &amp;= ~IEEE80211_VHT_MCS_SUPPORT_0_11_MASK;</div><div class='hunk'>@@ -2512,10 +2522,10 @@ static void ath11k_peer_assoc_h_he(struct ath11k *ar,</div><div class='ctx'> 			he_tx_mcs = v;</div><div class='ctx'> 		}</div><div class='ctx'> 		v = le16_to_cpu(he_cap-&gt;he_mcs_nss_supp.rx_mcs_160);</div><div class='add'>+		v = ath11k_peer_assoc_h_he_limit(v, he_mcs_mask);</div><div class='ctx'> 		arg-&gt;peer_he_rx_mcs_set[WMI_HECAP_TXRX_MCS_NSS_IDX_160] = v;</div><div class='ctx'> </div><div class='ctx'> 		v = le16_to_cpu(he_cap-&gt;he_mcs_nss_supp.tx_mcs_160);</div><div class='del'>-		v = ath11k_peer_assoc_h_he_limit(v, he_mcs_mask);</div><div class='ctx'> 		arg-&gt;peer_he_tx_mcs_set[WMI_HECAP_TXRX_MCS_NSS_IDX_160] = v;</div><div class='ctx'> </div><div class='ctx'> 		arg-&gt;peer_he_mcs_count++;</div><div class='hunk'>@@ -2525,10 +2535,10 @@ static void ath11k_peer_assoc_h_he(struct ath11k *ar,</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		v = le16_to_cpu(he_cap-&gt;he_mcs_nss_supp.rx_mcs_80);</div><div class='add'>+		v = ath11k_peer_assoc_h_he_limit(v, he_mcs_mask);</div><div class='ctx'> 		arg-&gt;peer_he_rx_mcs_set[WMI_HECAP_TXRX_MCS_NSS_IDX_80] = v;</div><div class='ctx'> </div><div class='ctx'> 		v = le16_to_cpu(he_cap-&gt;he_mcs_nss_supp.tx_mcs_80);</div><div class='del'>-		v = ath11k_peer_assoc_h_he_limit(v, he_mcs_mask);</div><div class='ctx'> 		arg-&gt;peer_he_tx_mcs_set[WMI_HECAP_TXRX_MCS_NSS_IDX_80] = v;</div><div class='ctx'> </div><div class='ctx'> 		arg-&gt;peer_he_mcs_count++;</div><div class='hunk'>@@ -3016,7 +3026,7 @@ static bool ath11k_mac_vif_recalc_sta_he_txbf(struct ath11k *ar,</div><div class='ctx'> 					      struct ieee80211_sta_he_cap *he_cap)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);</div><div class='del'>-	struct ieee80211_he_cap_elem he_cap_elem = {0};</div><div class='add'>+	struct ieee80211_he_cap_elem he_cap_elem = {};</div><div class='ctx'> 	struct ieee80211_sta_he_cap *cap_band = NULL;</div><div class='ctx'> 	struct cfg80211_chan_def def;</div><div class='ctx'> 	u32 param = WMI_VDEV_PARAM_SET_HEMU_MODE;</div><div class='hunk'>@@ -3753,7 +3763,7 @@ static void ath11k_mac_op_bss_info_changed(struct ieee80211_hw *hw,</div><div class='ctx'> 		ath11k_recalculate_mgmt_rate(ar, vif, &amp;def);</div><div class='ctx'> </div><div class='ctx'> 	if (changed &amp; BSS_CHANGED_TWT) {</div><div class='del'>-		struct wmi_twt_enable_params twt_params = {0};</div><div class='add'>+		struct wmi_twt_enable_params twt_params = {};</div><div class='ctx'> </div><div class='ctx'> 		if (info-&gt;twt_requester || info-&gt;twt_responder) {</div><div class='ctx'> 			ath11k_wmi_fill_default_twt_params(&amp;twt_params);</div><div class='hunk'>@@ -4018,6 +4028,150 @@ static int ath11k_start_scan(struct ath11k *ar,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ath11k_mac_fw_stats_reset(struct ath11k *ar)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+	ath11k_fw_stats_pdevs_free(&amp;ar-&gt;fw_stats.pdevs);</div><div class='add'>+	ath11k_fw_stats_vdevs_free(&amp;ar-&gt;fw_stats.vdevs);</div><div class='add'>+	ar-&gt;fw_stats.num_vdev_recvd = 0;</div><div class='add'>+	ar-&gt;fw_stats.num_bcn_recvd = 0;</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ath11k_mac_fw_stats_request(struct ath11k *ar,</div><div class='add'>+				struct stats_request_params *req_param)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_base *ab = ar-&gt;ab;</div><div class='add'>+	unsigned long time_left;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ar-&gt;conf_mutex);</div><div class='add'>+</div><div class='add'>+	ath11k_mac_fw_stats_reset(ar);</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;ar-&gt;fw_stats_complete);</div><div class='add'>+	reinit_completion(&amp;ar-&gt;fw_stats_done);</div><div class='add'>+</div><div class='add'>+	ret = ath11k_wmi_send_stats_request_cmd(ar, req_param);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath11k_warn(ab, "could not request fw stats (%d)\n",</div><div class='add'>+			    ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	time_left = wait_for_completion_timeout(&amp;ar-&gt;fw_stats_complete, 1 * HZ);</div><div class='add'>+	if (!time_left)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	/* FW stats can get split when exceeding the stats data buffer limit.</div><div class='add'>+	 * In that case, since there is no end marking for the back-to-back</div><div class='add'>+	 * received 'update stats' event, we keep a 3 seconds timeout in case,</div><div class='add'>+	 * fw_stats_done is not marked yet</div><div class='add'>+	 */</div><div class='add'>+	time_left = wait_for_completion_timeout(&amp;ar-&gt;fw_stats_done, 3 * HZ);</div><div class='add'>+	if (!time_left)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath11k_mac_get_fw_stats(struct ath11k *ar, u32 pdev_id,</div><div class='add'>+				   u32 vdev_id, u32 stats_id)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_base *ab = ar-&gt;ab;</div><div class='add'>+	struct stats_request_params req_param;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ar-&gt;conf_mutex);</div><div class='add'>+</div><div class='add'>+	if (ar-&gt;state != ATH11K_STATE_ON)</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	req_param.pdev_id = pdev_id;</div><div class='add'>+	req_param.vdev_id = vdev_id;</div><div class='add'>+	req_param.stats_id = stats_id;</div><div class='add'>+</div><div class='add'>+	ret = ath11k_mac_fw_stats_request(ar, &amp;req_param);</div><div class='add'>+	if (ret)</div><div class='add'>+		ath11k_warn(ab, "failed to request fw stats: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	ath11k_dbg(ab, ATH11K_DBG_WMI,</div><div class='add'>+		   "debug get fw stat pdev id %d vdev id %d stats id 0x%x\n",</div><div class='add'>+		   pdev_id, vdev_id, stats_id);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath11k_mac_handle_get_txpower(struct ath11k *ar,</div><div class='add'>+					 struct ieee80211_vif *vif,</div><div class='add'>+					 int *dbm)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_base *ab = ar-&gt;ab;</div><div class='add'>+	struct ath11k_fw_stats_pdev *pdev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Final Tx power is minimum of Target Power, CTL power, Regulatory</div><div class='add'>+	 * Power, PSD EIRP Power. We just know the Regulatory power from the</div><div class='add'>+	 * regulatory rules obtained. FW knows all these power and sets the min</div><div class='add'>+	 * of these. Hence, we request the FW pdev stats in which FW reports</div><div class='add'>+	 * the minimum of all vdev's channel Tx power.</div><div class='add'>+	 */</div><div class='add'>+	lockdep_assert_held(&amp;ar-&gt;conf_mutex);</div><div class='add'>+</div><div class='add'>+	/* Firmware doesn't provide Tx power during CAC hence no need to fetch</div><div class='add'>+	 * the stats.</div><div class='add'>+	 */</div><div class='add'>+	if (test_bit(ATH11K_CAC_RUNNING, &amp;ar-&gt;dev_flags))</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	ret = ath11k_mac_get_fw_stats(ar, ar-&gt;pdev-&gt;pdev_id, 0,</div><div class='add'>+				      WMI_REQUEST_PDEV_STAT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath11k_warn(ab, "failed to request fw pdev stats: %d\n", ret);</div><div class='add'>+		goto err_fallback;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+	pdev = list_first_entry_or_null(&amp;ar-&gt;fw_stats.pdevs,</div><div class='add'>+					struct ath11k_fw_stats_pdev, list);</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+		goto err_fallback;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* tx power is set as 2 units per dBm in FW. */</div><div class='add'>+	*dbm = pdev-&gt;chan_tx_power / 2;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='add'>+	ath11k_dbg(ar-&gt;ab, ATH11K_DBG_MAC, "txpower from firmware %d, reported %d dBm\n",</div><div class='add'>+		   pdev-&gt;chan_tx_power, *dbm);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_fallback:</div><div class='add'>+	/* We didn't get txpower from FW. Hence, relying on vif-&gt;bss_conf.txpower */</div><div class='add'>+	*dbm = vif-&gt;bss_conf.txpower;</div><div class='add'>+	ath11k_dbg(ar-&gt;ab, ATH11K_DBG_MAC, "txpower from firmware NaN, reported %d dBm\n",</div><div class='add'>+		   *dbm);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath11k_mac_op_get_txpower(struct ieee80211_hw *hw,</div><div class='add'>+				     struct ieee80211_vif *vif,</div><div class='add'>+				     unsigned int link_id,</div><div class='add'>+				     int *dbm)</div><div class='add'>+{</div><div class='add'>+	struct ath11k *ar = hw-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='add'>+	ret = ath11k_mac_handle_get_txpower(ar, vif, dbm);</div><div class='add'>+	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath11k_mac_op_hw_scan(struct ieee80211_hw *hw,</div><div class='ctx'> 				 struct ieee80211_vif *vif,</div><div class='ctx'> 				 struct ieee80211_scan_request *hw_req)</div><div class='hunk'>@@ -4307,6 +4461,40 @@ static int ath11k_clear_peer_keys(struct ath11k_vif *arvif,</div><div class='ctx'> 	return first_errno;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ath11k_set_group_keys(struct ath11k_vif *arvif)</div><div class='add'>+{</div><div class='add'>+	struct ath11k *ar = arvif-&gt;ar;</div><div class='add'>+	struct ath11k_base *ab = ar-&gt;ab;</div><div class='add'>+	const u8 *addr = arvif-&gt;bssid;</div><div class='add'>+	int i, ret, first_errno = 0;</div><div class='add'>+	struct ath11k_peer *peer;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ab-&gt;base_lock);</div><div class='add'>+	peer = ath11k_peer_find(ab, arvif-&gt;vdev_id, addr);</div><div class='add'>+	spin_unlock_bh(&amp;ab-&gt;base_lock);</div><div class='add'>+</div><div class='add'>+	if (!peer)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(peer-&gt;keys); i++) {</div><div class='add'>+		struct ieee80211_key_conf *key = peer-&gt;keys[i];</div><div class='add'>+</div><div class='add'>+		if (!key || (key-&gt;flags &amp; IEEE80211_KEY_FLAG_PAIRWISE))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = ath11k_install_key(arvif, key, SET_KEY, addr,</div><div class='add'>+					 WMI_KEY_GROUP);</div><div class='add'>+		if (ret &lt; 0 &amp;&amp; first_errno == 0)</div><div class='add'>+			first_errno = ret;</div><div class='add'>+</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			ath11k_warn(ab, "failed to set group key of idx %d for vdev %d: %d\n",</div><div class='add'>+				    i, arvif-&gt;vdev_id, ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return first_errno;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath11k_mac_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,</div><div class='ctx'> 				 struct ieee80211_vif *vif, struct ieee80211_sta *sta,</div><div class='ctx'> 				 struct ieee80211_key_conf *key)</div><div class='hunk'>@@ -4316,6 +4504,7 @@ static int ath11k_mac_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,</div><div class='ctx'> 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);</div><div class='ctx'> 	struct ath11k_peer *peer;</div><div class='ctx'> 	struct ath11k_sta *arsta;</div><div class='add'>+	bool is_ap_with_no_sta;</div><div class='ctx'> 	const u8 *peer_addr;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	u32 flags = 0;</div><div class='hunk'>@@ -4372,20 +4561,61 @@ static int ath11k_mac_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (key-&gt;flags &amp; IEEE80211_KEY_FLAG_PAIRWISE)</div><div class='del'>-		flags |= WMI_KEY_PAIRWISE;</div><div class='add'>+		flags = WMI_KEY_PAIRWISE;</div><div class='ctx'> 	else</div><div class='del'>-		flags |= WMI_KEY_GROUP;</div><div class='add'>+		flags = WMI_KEY_GROUP;</div><div class='ctx'> </div><div class='del'>-	ret = ath11k_install_key(arvif, key, cmd, peer_addr, flags);</div><div class='del'>-	if (ret) {</div><div class='del'>-		ath11k_warn(ab, "ath11k_install_key failed (%d)\n", ret);</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='add'>+	ath11k_dbg(ar-&gt;ab, ATH11K_DBG_MAC,</div><div class='add'>+		   "%s for peer %pM on vdev %d flags 0x%X, type = %d, num_sta %d\n",</div><div class='add'>+		   cmd == SET_KEY ? "SET_KEY" : "DEL_KEY", peer_addr, arvif-&gt;vdev_id,</div><div class='add'>+		   flags, arvif-&gt;vdev_type, arvif-&gt;num_stations);</div><div class='add'>+</div><div class='add'>+	/* Allow group key clearing only in AP mode when no stations are</div><div class='add'>+	 * associated. There is a known race condition in firmware where</div><div class='add'>+	 * group addressed packets may be dropped if the key is cleared</div><div class='add'>+	 * and immediately set again during rekey.</div><div class='add'>+	 *</div><div class='add'>+	 * During GTK rekey, mac80211 issues a clear key (if the old key</div><div class='add'>+	 * exists) followed by an install key operation for same key</div><div class='add'>+	 * index. This causes ath11k to send two WMI commands in quick</div><div class='add'>+	 * succession: one to clear the old key and another to install the</div><div class='add'>+	 * new key in the same slot.</div><div class='add'>+	 *</div><div class='add'>+	 * Under certain conditions—especially under high load or time</div><div class='add'>+	 * sensitive scenarios, firmware may process these commands</div><div class='add'>+	 * asynchronously in a way that firmware assumes the key is</div><div class='add'>+	 * cleared whereas hardware has a valid key. This inconsistency</div><div class='add'>+	 * between hardware and firmware leads to group addressed packet</div><div class='add'>+	 * drops after rekey.</div><div class='add'>+	 * Only setting the same key again can restore a valid key in</div><div class='add'>+	 * firmware and allow packets to be transmitted.</div><div class='add'>+	 *</div><div class='add'>+	 * There is a use case where an AP can transition from Secure mode</div><div class='add'>+	 * to open mode without a vdev restart by just deleting all</div><div class='add'>+	 * associated peers and clearing key, Hence allow clear key for</div><div class='add'>+	 * that case alone. Mark arvif-&gt;reinstall_group_keys in such cases</div><div class='add'>+	 * and reinstall the same key when the first peer is added,</div><div class='add'>+	 * allowing firmware to recover from the race if it had occurred.</div><div class='add'>+	 */</div><div class='ctx'> </div><div class='del'>-	ret = ath11k_dp_peer_rx_pn_replay_config(arvif, peer_addr, cmd, key);</div><div class='del'>-	if (ret) {</div><div class='del'>-		ath11k_warn(ab, "failed to offload PN replay detection %d\n", ret);</div><div class='del'>-		goto exit;</div><div class='add'>+	is_ap_with_no_sta = (vif-&gt;type == NL80211_IFTYPE_AP &amp;&amp;</div><div class='add'>+			     !arvif-&gt;num_stations);</div><div class='add'>+	if (flags == WMI_KEY_PAIRWISE || cmd == SET_KEY || is_ap_with_no_sta) {</div><div class='add'>+		ret = ath11k_install_key(arvif, key, cmd, peer_addr, flags);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath11k_warn(ab, "ath11k_install_key failed (%d)\n", ret);</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = ath11k_dp_peer_rx_pn_replay_config(arvif, peer_addr, cmd, key);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath11k_warn(ab, "failed to offload PN replay detection %d\n",</div><div class='add'>+				    ret);</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (flags == WMI_KEY_GROUP &amp;&amp; cmd == SET_KEY &amp;&amp; is_ap_with_no_sta)</div><div class='add'>+			arvif-&gt;reinstall_group_keys = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;ab-&gt;base_lock);</div><div class='hunk'>@@ -4984,6 +5214,7 @@ static int ath11k_mac_inc_num_stations(struct ath11k_vif *arvif,</div><div class='ctx'> 		return -ENOBUFS;</div><div class='ctx'> </div><div class='ctx'> 	ar-&gt;num_stations++;</div><div class='add'>+	arvif-&gt;num_stations++;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -4999,6 +5230,7 @@ static void ath11k_mac_dec_num_stations(struct ath11k_vif *arvif,</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	ar-&gt;num_stations--;</div><div class='add'>+	arvif-&gt;num_stations--;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 ath11k_mac_ieee80211_sta_bw_to_wmi(struct ath11k *ar,</div><div class='hunk'>@@ -5206,6 +5438,45 @@ exit:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ath11k_mac_op_conf_tx_mu_edca(struct ieee80211_hw *hw,</div><div class='add'>+					 struct ieee80211_vif *vif,</div><div class='add'>+					 unsigned int link_id, u16 ac,</div><div class='add'>+					 const struct ieee80211_tx_queue_params *params)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);</div><div class='add'>+	struct ath11k *ar = hw-&gt;priv;</div><div class='add'>+	struct wmi_wmm_params_arg *p;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (ac) {</div><div class='add'>+	case IEEE80211_AC_VO:</div><div class='add'>+		p = &amp;arvif-&gt;muedca_params.ac_vo;</div><div class='add'>+		break;</div><div class='add'>+	case IEEE80211_AC_VI:</div><div class='add'>+		p = &amp;arvif-&gt;muedca_params.ac_vi;</div><div class='add'>+		break;</div><div class='add'>+	case IEEE80211_AC_BE:</div><div class='add'>+		p = &amp;arvif-&gt;muedca_params.ac_be;</div><div class='add'>+		break;</div><div class='add'>+	case IEEE80211_AC_BK:</div><div class='add'>+		p = &amp;arvif-&gt;muedca_params.ac_bk;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ath11k_warn(ar-&gt;ab, "error ac: %d", ac);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	p-&gt;cwmin = u8_get_bits(params-&gt;mu_edca_param_rec.ecw_min_max, GENMASK(3, 0));</div><div class='add'>+	p-&gt;cwmax = u8_get_bits(params-&gt;mu_edca_param_rec.ecw_min_max, GENMASK(7, 4));</div><div class='add'>+	p-&gt;aifs = u8_get_bits(params-&gt;mu_edca_param_rec.aifsn, GENMASK(3, 0));</div><div class='add'>+	p-&gt;txop = params-&gt;mu_edca_param_rec.mu_edca_timer;</div><div class='add'>+</div><div class='add'>+	ret = ath11k_wmi_send_wmm_update_cmd_tlv(ar, arvif-&gt;vdev_id,</div><div class='add'>+						 &amp;arvif-&gt;muedca_params,</div><div class='add'>+						 WMI_WMM_PARAM_TYPE_11AX_MU_EDCA);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath11k_mac_op_conf_tx(struct ieee80211_hw *hw,</div><div class='ctx'> 				 struct ieee80211_vif *vif,</div><div class='ctx'> 				 unsigned int link_id, u16 ac,</div><div class='hunk'>@@ -5244,12 +5515,22 @@ static int ath11k_mac_op_conf_tx(struct ieee80211_hw *hw,</div><div class='ctx'> 	p-&gt;txop = params-&gt;txop;</div><div class='ctx'> </div><div class='ctx'> 	ret = ath11k_wmi_send_wmm_update_cmd_tlv(ar, arvif-&gt;vdev_id,</div><div class='del'>-						 &amp;arvif-&gt;wmm_params);</div><div class='add'>+						 &amp;arvif-&gt;wmm_params,</div><div class='add'>+						 WMI_WMM_PARAM_TYPE_LEGACY);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath11k_warn(ar-&gt;ab, "failed to set wmm params: %d\n", ret);</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (params-&gt;mu_edca) {</div><div class='add'>+		ret = ath11k_mac_op_conf_tx_mu_edca(hw, vif, link_id, ac,</div><div class='add'>+						    params);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath11k_warn(ar-&gt;ab, "failed to set mu_edca params: %d\n", ret);</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = ath11k_conf_tx_uapsd(ar, vif, ac, params-&gt;uapsd);</div><div class='ctx'> </div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -5264,7 +5545,7 @@ static struct ieee80211_sta_ht_cap</div><div class='ctx'> ath11k_create_ht_cap(struct ath11k *ar, u32 ar_ht_cap, u32 rate_cap_rx_chainmask)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='del'>-	struct ieee80211_sta_ht_cap ht_cap = {0};</div><div class='add'>+	struct ieee80211_sta_ht_cap ht_cap = {};</div><div class='ctx'> 	u32 ar_vht_cap = ar-&gt;pdev-&gt;cap.vht_cap;</div><div class='ctx'> </div><div class='ctx'> 	if (!(ar_ht_cap &amp; WMI_HT_CAP_ENABLED))</div><div class='hunk'>@@ -5338,8 +5619,6 @@ static int ath11k_mac_set_txbf_conf(struct ath11k_vif *arvif)</div><div class='ctx'> 	if (vht_cap &amp; (IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE)) {</div><div class='ctx'> 		nsts = vht_cap &amp; IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK;</div><div class='ctx'> 		nsts &gt;&gt;= IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;</div><div class='del'>-		if (nsts &gt; (ar-&gt;num_rx_chains - 1))</div><div class='del'>-			nsts = ar-&gt;num_rx_chains - 1;</div><div class='ctx'> 		value |= SM(nsts, WMI_TXBF_STS_CAP_OFFSET);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -5423,9 +5702,6 @@ static void ath11k_set_vht_txbf_cap(struct ath11k *ar, u32 *vht_cap)</div><div class='ctx'> </div><div class='ctx'> 	/* Enable Beamformee STS Field only if SU BF is enabled */</div><div class='ctx'> 	if (subfee) {</div><div class='del'>-		if (nsts &gt; (ar-&gt;num_rx_chains - 1))</div><div class='del'>-			nsts = ar-&gt;num_rx_chains - 1;</div><div class='del'>-</div><div class='ctx'> 		nsts &lt;&lt;= IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT;</div><div class='ctx'> 		nsts &amp;=  IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK;</div><div class='ctx'> 		*vht_cap |= nsts;</div><div class='hunk'>@@ -5436,7 +5712,7 @@ static struct ieee80211_sta_vht_cap</div><div class='ctx'> ath11k_create_vht_cap(struct ath11k *ar, u32 rate_cap_tx_chainmask,</div><div class='ctx'> 		      u32 rate_cap_rx_chainmask)</div><div class='ctx'> {</div><div class='del'>-	struct ieee80211_sta_vht_cap vht_cap = {0};</div><div class='add'>+	struct ieee80211_sta_vht_cap vht_cap = {};</div><div class='ctx'> 	u16 txmcs_map, rxmcs_map;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -5975,6 +6251,159 @@ static void ath11k_mgmt_over_wmi_tx_purge(struct ath11k *ar)</div><div class='ctx'> 		ath11k_mgmt_over_wmi_tx_drop(ar, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ath11k_mac_mgmt_action_frame_fill_elem_data(struct ath11k_vif *arvif,</div><div class='add'>+						       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb-&gt;data;</div><div class='add'>+	u8 category, *buf, iv_len, action_code, dialog_token;</div><div class='add'>+	int cur_tx_power, max_tx_power;</div><div class='add'>+	struct ath11k *ar = arvif-&gt;ar;</div><div class='add'>+	struct cfg80211_chan_def def;</div><div class='add'>+	struct ath11k_skb_cb *skb_cb;</div><div class='add'>+	struct ieee80211_mgmt *mgmt;</div><div class='add'>+	unsigned int remaining_len;</div><div class='add'>+	bool has_protected;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ar-&gt;conf_mutex);</div><div class='add'>+</div><div class='add'>+	/* make sure category field is present */</div><div class='add'>+	if (skb-&gt;len &lt; IEEE80211_MIN_ACTION_SIZE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	remaining_len = skb-&gt;len - IEEE80211_MIN_ACTION_SIZE;</div><div class='add'>+	has_protected = ieee80211_has_protected(hdr-&gt;frame_control);</div><div class='add'>+</div><div class='add'>+	/* In case of SW crypto and hdr protected (PMF), packet will already be encrypted,</div><div class='add'>+	 * we can't put in data in this case</div><div class='add'>+	 */</div><div class='add'>+	if (test_bit(ATH11K_FLAG_HW_CRYPTO_DISABLED, &amp;ar-&gt;ab-&gt;dev_flags) &amp;&amp;</div><div class='add'>+	    has_protected)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mgmt = (struct ieee80211_mgmt *)hdr;</div><div class='add'>+	buf = (u8 *)&amp;mgmt-&gt;u.action;</div><div class='add'>+</div><div class='add'>+	/* FCTL_PROTECTED frame might have extra space added for HDR_LEN. Offset that</div><div class='add'>+	 * many bytes if it is there</div><div class='add'>+	 */</div><div class='add'>+	if (has_protected) {</div><div class='add'>+		skb_cb = ATH11K_SKB_CB(skb);</div><div class='add'>+</div><div class='add'>+		switch (skb_cb-&gt;cipher) {</div><div class='add'>+		/* Cipher suite having flag %IEEE80211_KEY_FLAG_GENERATE_IV_MGMT set in</div><div class='add'>+		 * key needs to be processed. See ath11k_install_key()</div><div class='add'>+		 */</div><div class='add'>+		case WLAN_CIPHER_SUITE_CCMP:</div><div class='add'>+		case WLAN_CIPHER_SUITE_CCMP_256:</div><div class='add'>+		case WLAN_CIPHER_SUITE_GCMP:</div><div class='add'>+		case WLAN_CIPHER_SUITE_GCMP_256:</div><div class='add'>+			iv_len = IEEE80211_CCMP_HDR_LEN;</div><div class='add'>+			break;</div><div class='add'>+		case WLAN_CIPHER_SUITE_TKIP:</div><div class='add'>+			iv_len = 0;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (remaining_len &lt; iv_len)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		buf += iv_len;</div><div class='add'>+		remaining_len -= iv_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	category = *buf++;</div><div class='add'>+	/* category code is already taken care in %IEEE80211_MIN_ACTION_SIZE hence</div><div class='add'>+	 * no need to adjust remaining_len</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	switch (category) {</div><div class='add'>+	case WLAN_CATEGORY_RADIO_MEASUREMENT:</div><div class='add'>+		/* need action code and dialog token */</div><div class='add'>+		if (remaining_len &lt; 2)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		/* Packet Format:</div><div class='add'>+		 *	Action Code | Dialog Token | Variable Len (based on Action Code)</div><div class='add'>+		 */</div><div class='add'>+		action_code = *buf++;</div><div class='add'>+		dialog_token = *buf++;</div><div class='add'>+		remaining_len -= 2;</div><div class='add'>+</div><div class='add'>+		if (ath11k_mac_vif_chan(arvif-&gt;vif, &amp;def))</div><div class='add'>+			return -ENOENT;</div><div class='add'>+</div><div class='add'>+		cur_tx_power = arvif-&gt;vif-&gt;bss_conf.txpower;</div><div class='add'>+		max_tx_power = min(def.chan-&gt;max_reg_power, (int)ar-&gt;max_tx_power / 2);</div><div class='add'>+		ath11k_mac_handle_get_txpower(ar, arvif-&gt;vif, &amp;cur_tx_power);</div><div class='add'>+</div><div class='add'>+		switch (action_code) {</div><div class='add'>+		case WLAN_RM_ACTION_LINK_MEASUREMENT_REQUEST:</div><div class='add'>+			/* need variable fields to be present in len */</div><div class='add'>+			if (remaining_len &lt; 2)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			/* Variable length format as defined in IEEE 802.11-2024,</div><div class='add'>+			 * Figure 9-1187-Link Measurement Request frame Action field</div><div class='add'>+			 * format.</div><div class='add'>+			 *	Transmit Power | Max Tx Power</div><div class='add'>+			 * We fill both of these.</div><div class='add'>+			 */</div><div class='add'>+			*buf++ = cur_tx_power;</div><div class='add'>+			*buf = max_tx_power;</div><div class='add'>+</div><div class='add'>+			ath11k_dbg(ar-&gt;ab, ATH11K_DBG_MAC,</div><div class='add'>+				   "RRM: Link Measurement Req dialog_token %u cur_tx_power %d max_tx_power %d\n",</div><div class='add'>+				   dialog_token, cur_tx_power, max_tx_power);</div><div class='add'>+			break;</div><div class='add'>+		case WLAN_RM_ACTION_LINK_MEASUREMENT_REPORT:</div><div class='add'>+			/* need variable fields to be present in len */</div><div class='add'>+			if (remaining_len &lt; 3)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			/* Variable length format as defined in IEEE 802.11-2024,</div><div class='add'>+			 * Figure 9-1188-Link Measurement Report frame Action field format</div><div class='add'>+			 *	TPC Report | Variable Fields</div><div class='add'>+			 *</div><div class='add'>+			 * TPC Report Format:</div><div class='add'>+			 *	Element ID | Len | Tx Power | Link Margin</div><div class='add'>+			 *</div><div class='add'>+			 * We fill Tx power in the TPC Report (2nd index)</div><div class='add'>+			 */</div><div class='add'>+			buf[2] = cur_tx_power;</div><div class='add'>+</div><div class='add'>+			/* TODO: At present, Link margin data is not present so can't</div><div class='add'>+			 * really fill it now. Once it is available, it can be added</div><div class='add'>+			 * here</div><div class='add'>+			 */</div><div class='add'>+			ath11k_dbg(ar-&gt;ab, ATH11K_DBG_MAC,</div><div class='add'>+				   "RRM: Link Measurement Report dialog_token %u cur_tx_power %d\n",</div><div class='add'>+				   dialog_token, cur_tx_power);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* nothing to fill */</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath11k_mac_mgmt_frame_fill_elem_data(struct ath11k_vif *arvif,</div><div class='add'>+						struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (!ieee80211_is_action(hdr-&gt;frame_control))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ath11k_mac_mgmt_action_frame_fill_elem_data(arvif, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ath11k_mgmt_over_wmi_tx_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = container_of(work, struct ath11k, wmi_mgmt_tx_work);</div><div class='hunk'>@@ -5994,6 +6423,19 @@ static void ath11k_mgmt_over_wmi_tx_work(struct work_struct *work)</div><div class='ctx'> 		arvif = ath11k_vif_to_arvif(skb_cb-&gt;vif);</div><div class='ctx'> 		mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> 		if (ar-&gt;allocated_vdev_map &amp; (1LL &lt;&lt; arvif-&gt;vdev_id)) {</div><div class='add'>+			/* Fill in the data which is required to be filled by the driver</div><div class='add'>+			 * For example: Max Tx power in Link Measurement Request/Report</div><div class='add'>+			 */</div><div class='add'>+			ret = ath11k_mac_mgmt_frame_fill_elem_data(arvif, skb);</div><div class='add'>+			if (ret) {</div><div class='add'>+				/* If we couldn't fill the data due to any reason,</div><div class='add'>+				 * let's not discard transmitting the packet.</div><div class='add'>+				 */</div><div class='add'>+				ath11k_dbg(ar-&gt;ab, ATH11K_DBG_MAC,</div><div class='add'>+					   "Failed to fill the required data for the mgmt packet err %d\n",</div><div class='add'>+					   ret);</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			ret = ath11k_mac_mgmt_tx_wmi(ar, arvif, skb);</div><div class='ctx'> 			if (ret) {</div><div class='ctx'> 				ath11k_warn(ar-&gt;ab, "failed to tx mgmt frame, vdev_id %d :%d\n",</div><div class='hunk'>@@ -6105,7 +6547,7 @@ void ath11k_mac_drain_tx(struct ath11k *ar)</div><div class='ctx'> </div><div class='ctx'> static int ath11k_mac_config_mon_status_default(struct ath11k *ar, bool enable)</div><div class='ctx'> {</div><div class='del'>-	struct htt_rx_ring_tlv_filter tlv_filter = {0};</div><div class='add'>+	struct htt_rx_ring_tlv_filter tlv_filter = {};</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='ctx'> 	int i, ret = 0;</div><div class='ctx'> 	u32 ring_id;</div><div class='hunk'>@@ -6290,6 +6732,7 @@ static void ath11k_mac_op_stop(struct ieee80211_hw *hw, bool suspend)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = hw-&gt;priv;</div><div class='ctx'> 	struct htt_ppdu_stats_info *ppdu_stats, *tmp;</div><div class='add'>+	struct scan_chan_list_params *params;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ath11k_mac_drain_tx(ar);</div><div class='hunk'>@@ -6305,6 +6748,7 @@ static void ath11k_mac_op_stop(struct ieee80211_hw *hw, bool suspend)</div><div class='ctx'> 	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> </div><div class='ctx'> 	cancel_delayed_work_sync(&amp;ar-&gt;scan.timeout);</div><div class='add'>+	cancel_work_sync(&amp;ar-&gt;channel_update_work);</div><div class='ctx'> 	cancel_work_sync(&amp;ar-&gt;regd_update_work);</div><div class='ctx'> 	cancel_work_sync(&amp;ar-&gt;ab-&gt;update_11d_work);</div><div class='ctx'> </div><div class='hunk'>@@ -6314,10 +6758,19 @@ static void ath11k_mac_op_stop(struct ieee80211_hw *hw, bool suspend)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='ctx'> 	list_for_each_entry_safe(ppdu_stats, tmp, &amp;ar-&gt;ppdu_stats_info, list) {</div><div class='ctx'> 		list_del(&amp;ppdu_stats-&gt;list);</div><div class='ctx'> 		kfree(ppdu_stats);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	while ((params = list_first_entry_or_null(&amp;ar-&gt;channel_update_queue,</div><div class='add'>+						  struct scan_chan_list_params,</div><div class='add'>+						  list))) {</div><div class='add'>+		list_del(&amp;params-&gt;list);</div><div class='add'>+		kfree(params);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='ctx'> </div><div class='ctx'> 	rcu_assign_pointer(ar-&gt;ab-&gt;pdevs_active[ar-&gt;pdev_idx], NULL);</div><div class='hunk'>@@ -6332,23 +6785,20 @@ static int ath11k_mac_setup_vdev_params_mbssid(struct ath11k_vif *arvif,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = arvif-&gt;ar;</div><div class='ctx'> 	struct ath11k_vif *tx_arvif;</div><div class='del'>-	struct ieee80211_vif *tx_vif;</div><div class='ctx'> </div><div class='ctx'> 	*tx_vdev_id = 0;</div><div class='del'>-	tx_vif = arvif-&gt;vif-&gt;mbssid_tx_vif;</div><div class='del'>-	if (!tx_vif) {</div><div class='add'>+	tx_arvif = ath11k_mac_get_tx_arvif(arvif);</div><div class='add'>+	if (!tx_arvif) {</div><div class='ctx'> 		*flags = WMI_HOST_VDEV_FLAGS_NON_MBSSID_AP;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	tx_arvif = ath11k_vif_to_arvif(tx_vif);</div><div class='del'>-</div><div class='ctx'> 	if (arvif-&gt;vif-&gt;bss_conf.nontransmitted) {</div><div class='del'>-		if (ar-&gt;hw-&gt;wiphy != ieee80211_vif_to_wdev(tx_vif)-&gt;wiphy)</div><div class='add'>+		if (ar-&gt;hw-&gt;wiphy != tx_arvif-&gt;ar-&gt;hw-&gt;wiphy)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		*flags = WMI_HOST_VDEV_FLAGS_NON_TRANSMIT_AP;</div><div class='del'>-		*tx_vdev_id = ath11k_vif_to_arvif(tx_vif)-&gt;vdev_id;</div><div class='add'>+		*tx_vdev_id = tx_arvif-&gt;vdev_id;</div><div class='ctx'> 	} else if (tx_arvif == arvif) {</div><div class='ctx'> 		*flags = WMI_HOST_VDEV_FLAGS_TRANSMIT_AP;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -6616,7 +7066,7 @@ static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw,</div><div class='ctx'> 	struct ath11k *ar = hw-&gt;priv;</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='ctx'> 	struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);</div><div class='del'>-	struct vdev_create_params vdev_param = {0};</div><div class='add'>+	struct vdev_create_params vdev_param = {};</div><div class='ctx'> 	struct peer_create_params peer_param;</div><div class='ctx'> 	u32 param_id, param_value;</div><div class='ctx'> 	u16 nss;</div><div class='hunk'>@@ -6952,7 +7402,7 @@ err_vdev_del:</div><div class='ctx'> 	/* Recalc txpower for remaining vdev */</div><div class='ctx'> 	ath11k_mac_txpower_recalc(ar);</div><div class='ctx'> </div><div class='del'>-	/* TODO: recal traffic pause state based on the available vdevs */</div><div class='add'>+	/* TODO: recalc traffic pause state based on the available vdevs */</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> }</div><div class='hunk'>@@ -6982,7 +7432,8 @@ static void ath11k_mac_op_configure_filter(struct ieee80211_hw *hw,</div><div class='ctx'> 	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath11k_mac_op_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)</div><div class='add'>+static int ath11k_mac_op_get_antenna(struct ieee80211_hw *hw, int radio_idx,</div><div class='add'>+				     u32 *tx_ant, u32 *rx_ant)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = hw-&gt;priv;</div><div class='ctx'> </div><div class='hunk'>@@ -6996,7 +7447,8 @@ static int ath11k_mac_op_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath11k_mac_op_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)</div><div class='add'>+static int ath11k_mac_op_set_antenna(struct ieee80211_hw *hw, int radio_idx,</div><div class='add'>+				     u32 tx_ant, u32 rx_ant)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = hw-&gt;priv;</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -7308,8 +7760,7 @@ ath11k_mac_update_vif_chan(struct ath11k *ar,</div><div class='ctx'> 			   int n_vifs)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	struct ath11k_vif *arvif, *tx_arvif = NULL;</div><div class='del'>-	struct ieee80211_vif *mbssid_tx_vif;</div><div class='add'>+	struct ath11k_vif *arvif, *tx_arvif;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	bool monitor_vif = false;</div><div class='hunk'>@@ -7363,10 +7814,7 @@ ath11k_mac_update_vif_chan(struct ath11k *ar,</div><div class='ctx'> 			ath11k_warn(ab, "failed to update bcn tmpl during csa: %d\n",</div><div class='ctx'> 				    ret);</div><div class='ctx'> </div><div class='del'>-		mbssid_tx_vif = arvif-&gt;vif-&gt;mbssid_tx_vif;</div><div class='del'>-		if (mbssid_tx_vif)</div><div class='del'>-			tx_arvif = ath11k_vif_to_arvif(mbssid_tx_vif);</div><div class='del'>-</div><div class='add'>+		tx_arvif = ath11k_mac_get_tx_arvif(arvif);</div><div class='ctx'> 		ret = ath11k_wmi_vdev_up(arvif-&gt;ar, arvif-&gt;vdev_id, arvif-&gt;aid,</div><div class='ctx'> 					 arvif-&gt;bssid,</div><div class='ctx'> 					 tx_arvif ? tx_arvif-&gt;bssid : NULL,</div><div class='hunk'>@@ -8124,7 +8572,8 @@ ath11k_set_vdev_param_to_all_vifs(struct ath11k *ar, int param, u32 value)</div><div class='ctx'> /* mac80211 stores device specific RTS/Fragmentation threshold value,</div><div class='ctx'>  * this is set interface specific to firmware from ath11k driver</div><div class='ctx'>  */</div><div class='del'>-static int ath11k_mac_op_set_rts_threshold(struct ieee80211_hw *hw, u32 value)</div><div class='add'>+static int ath11k_mac_op_set_rts_threshold(struct ieee80211_hw *hw,</div><div class='add'>+					   int radio_idx, u32 value)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = hw-&gt;priv;</div><div class='ctx'> 	int param_id = WMI_VDEV_PARAM_RTS_THRESHOLD;</div><div class='hunk'>@@ -8132,7 +8581,8 @@ static int ath11k_mac_op_set_rts_threshold(struct ieee80211_hw *hw, u32 value)</div><div class='ctx'> 	return ath11k_set_vdev_param_to_all_vifs(ar, param_id, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath11k_mac_op_set_frag_threshold(struct ieee80211_hw *hw, u32 value)</div><div class='add'>+static int ath11k_mac_op_set_frag_threshold(struct ieee80211_hw *hw,</div><div class='add'>+					    int radio_idx, u32 value)</div><div class='ctx'> {</div><div class='ctx'> 	/* Even though there's a WMI vdev param for fragmentation threshold no</div><div class='ctx'> 	 * known firmware actually implements it. Moreover it is not possible to</div><div class='hunk'>@@ -8682,9 +9132,9 @@ ath11k_mac_op_set_bitrate_mask(struct ieee80211_hw *hw,</div><div class='ctx'> 				    arvif-&gt;vdev_id, ret);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='del'>-		ieee80211_iterate_stations_atomic(ar-&gt;hw,</div><div class='del'>-						  ath11k_mac_disable_peer_fixed_rate,</div><div class='del'>-						  arvif);</div><div class='add'>+		ieee80211_iterate_stations_mtx(ar-&gt;hw,</div><div class='add'>+					       ath11k_mac_disable_peer_fixed_rate,</div><div class='add'>+					       arvif);</div><div class='ctx'> 	} else if (ath11k_mac_bitrate_mask_get_single_nss(ar, arvif, band, mask,</div><div class='ctx'> 							  &amp;single_nss)) {</div><div class='ctx'> 		rate = WMI_FIXED_RATE_NONE;</div><div class='hunk'>@@ -8751,9 +9201,9 @@ ath11k_mac_op_set_bitrate_mask(struct ieee80211_hw *hw,</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='del'>-		ieee80211_iterate_stations_atomic(ar-&gt;hw,</div><div class='del'>-						  ath11k_mac_disable_peer_fixed_rate,</div><div class='del'>-						  arvif);</div><div class='add'>+		ieee80211_iterate_stations_mtx(ar-&gt;hw,</div><div class='add'>+					       ath11k_mac_disable_peer_fixed_rate,</div><div class='add'>+					       arvif);</div><div class='ctx'> </div><div class='ctx'> 		arvif-&gt;bitrate_mask = *mask;</div><div class='ctx'> 		ieee80211_iterate_stations_atomic(ar-&gt;hw,</div><div class='hunk'>@@ -8973,11 +9423,12 @@ static void ath11k_mac_op_sta_statistics(struct ieee80211_hw *hw,</div><div class='ctx'> </div><div class='ctx'> 	ath11k_mac_put_chain_rssi(sinfo, arsta, "ppdu", false);</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> 	if (!(sinfo-&gt;filled &amp; BIT_ULL(NL80211_STA_INFO_CHAIN_SIGNAL)) &amp;&amp;</div><div class='ctx'> 	    arsta-&gt;arvif-&gt;vdev_type == WMI_VDEV_TYPE_STA &amp;&amp;</div><div class='ctx'> 	    ar-&gt;ab-&gt;hw_params.supports_rssi_stats &amp;&amp;</div><div class='del'>-	    !ath11k_debugfs_get_fw_stats(ar, ar-&gt;pdev-&gt;pdev_id, 0,</div><div class='del'>-					 WMI_REQUEST_RSSI_PER_CHAIN_STAT)) {</div><div class='add'>+	    !ath11k_mac_get_fw_stats(ar, ar-&gt;pdev-&gt;pdev_id, 0,</div><div class='add'>+				     WMI_REQUEST_RSSI_PER_CHAIN_STAT)) {</div><div class='ctx'> 		ath11k_mac_put_chain_rssi(sinfo, arsta, "fw stats", true);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -8985,9 +9436,10 @@ static void ath11k_mac_op_sta_statistics(struct ieee80211_hw *hw,</div><div class='ctx'> 	if (!signal &amp;&amp;</div><div class='ctx'> 	    arsta-&gt;arvif-&gt;vdev_type == WMI_VDEV_TYPE_STA &amp;&amp;</div><div class='ctx'> 	    ar-&gt;ab-&gt;hw_params.supports_rssi_stats &amp;&amp;</div><div class='del'>-	    !(ath11k_debugfs_get_fw_stats(ar, ar-&gt;pdev-&gt;pdev_id, 0,</div><div class='del'>-					WMI_REQUEST_VDEV_STAT)))</div><div class='add'>+	    !(ath11k_mac_get_fw_stats(ar, ar-&gt;pdev-&gt;pdev_id, 0,</div><div class='add'>+				      WMI_REQUEST_VDEV_STAT)))</div><div class='ctx'> 		signal = arsta-&gt;rssi_beacon;</div><div class='add'>+	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> </div><div class='ctx'> 	ath11k_dbg(ar-&gt;ab, ATH11K_DBG_MAC,</div><div class='ctx'> 		   "sta statistics db2dbm %u rssi comb %d rssi beacon %d\n",</div><div class='hunk'>@@ -9322,103 +9774,6 @@ exit:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath11k_fw_stats_request(struct ath11k *ar,</div><div class='del'>-				   struct stats_request_params *req_param)</div><div class='del'>-{</div><div class='del'>-	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	unsigned long time_left;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	lockdep_assert_held(&amp;ar-&gt;conf_mutex);</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-	ar-&gt;fw_stats_done = false;</div><div class='del'>-	ath11k_fw_stats_pdevs_free(&amp;ar-&gt;fw_stats.pdevs);</div><div class='del'>-	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-</div><div class='del'>-	reinit_completion(&amp;ar-&gt;fw_stats_complete);</div><div class='del'>-</div><div class='del'>-	ret = ath11k_wmi_send_stats_request_cmd(ar, req_param);</div><div class='del'>-	if (ret) {</div><div class='del'>-		ath11k_warn(ab, "could not request fw stats (%d)\n",</div><div class='del'>-			    ret);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	time_left = wait_for_completion_timeout(&amp;ar-&gt;fw_stats_complete,</div><div class='del'>-						1 * HZ);</div><div class='del'>-</div><div class='del'>-	if (!time_left)</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ath11k_mac_op_get_txpower(struct ieee80211_hw *hw,</div><div class='del'>-				     struct ieee80211_vif *vif,</div><div class='del'>-				     int *dbm)</div><div class='del'>-{</div><div class='del'>-	struct ath11k *ar = hw-&gt;priv;</div><div class='del'>-	struct ath11k_base *ab = ar-&gt;ab;</div><div class='del'>-	struct stats_request_params req_param = {0};</div><div class='del'>-	struct ath11k_fw_stats_pdev *pdev;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Final Tx power is minimum of Target Power, CTL power, Regulatory</div><div class='del'>-	 * Power, PSD EIRP Power. We just know the Regulatory power from the</div><div class='del'>-	 * regulatory rules obtained. FW knows all these power and sets the min</div><div class='del'>-	 * of these. Hence, we request the FW pdev stats in which FW reports</div><div class='del'>-	 * the minimum of all vdev's channel Tx power.</div><div class='del'>-	 */</div><div class='del'>-	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='del'>-</div><div class='del'>-	if (ar-&gt;state != ATH11K_STATE_ON)</div><div class='del'>-		goto err_fallback;</div><div class='del'>-</div><div class='del'>-	/* Firmware doesn't provide Tx power during CAC hence no need to fetch</div><div class='del'>-	 * the stats.</div><div class='del'>-	 */</div><div class='del'>-	if (test_bit(ATH11K_CAC_RUNNING, &amp;ar-&gt;dev_flags)) {</div><div class='del'>-		mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	req_param.pdev_id = ar-&gt;pdev-&gt;pdev_id;</div><div class='del'>-	req_param.stats_id = WMI_REQUEST_PDEV_STAT;</div><div class='del'>-</div><div class='del'>-	ret = ath11k_fw_stats_request(ar, &amp;req_param);</div><div class='del'>-	if (ret) {</div><div class='del'>-		ath11k_warn(ab, "failed to request fw pdev stats: %d\n", ret);</div><div class='del'>-		goto err_fallback;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-	pdev = list_first_entry_or_null(&amp;ar-&gt;fw_stats.pdevs,</div><div class='del'>-					struct ath11k_fw_stats_pdev, list);</div><div class='del'>-	if (!pdev) {</div><div class='del'>-		spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-		goto err_fallback;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* tx power is set as 2 units per dBm in FW. */</div><div class='del'>-	*dbm = pdev-&gt;chan_tx_power / 2;</div><div class='del'>-</div><div class='del'>-	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='del'>-	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='del'>-</div><div class='del'>-	ath11k_dbg(ar-&gt;ab, ATH11K_DBG_MAC, "txpower from firmware %d, reported %d dBm\n",</div><div class='del'>-		   pdev-&gt;chan_tx_power, *dbm);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_fallback:</div><div class='del'>-	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='del'>-	/* We didn't get txpower from FW. Hence, relying on vif-&gt;bss_conf.txpower */</div><div class='del'>-	*dbm = vif-&gt;bss_conf.txpower;</div><div class='del'>-	ath11k_dbg(ar-&gt;ab, ATH11K_DBG_MAC, "txpower from firmware NaN, reported %d dBm\n",</div><div class='del'>-		   *dbm);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int ath11k_mac_station_add(struct ath11k *ar,</div><div class='ctx'> 				  struct ieee80211_vif *vif,</div><div class='ctx'> 				  struct ieee80211_sta *sta)</div><div class='hunk'>@@ -9438,6 +9793,21 @@ static int ath11k_mac_station_add(struct ath11k *ar,</div><div class='ctx'> 		goto exit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Driver allows the DEL KEY followed by SET KEY sequence for</div><div class='add'>+	 * group keys for only when there is no clients associated, if at</div><div class='add'>+	 * all firmware has entered the race during that window,</div><div class='add'>+	 * reinstalling the same key when the first sta connects will allow</div><div class='add'>+	 * firmware to recover from the race.</div><div class='add'>+	 */</div><div class='add'>+	if (arvif-&gt;num_stations == 1 &amp;&amp; arvif-&gt;reinstall_group_keys) {</div><div class='add'>+		ath11k_dbg(ab, ATH11K_DBG_MAC, "set group keys on 1st station add for vdev %d\n",</div><div class='add'>+			   arvif-&gt;vdev_id);</div><div class='add'>+		ret = ath11k_set_group_keys(arvif);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto dec_num_station;</div><div class='add'>+		arvif-&gt;reinstall_group_keys = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	arsta-&gt;rx_stats = kzalloc(sizeof(*arsta-&gt;rx_stats), GFP_KERNEL);</div><div class='ctx'> 	if (!arsta-&gt;rx_stats) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -9913,12 +10283,17 @@ static int ath11k_mac_setup_iface_combinations(struct ath11k *ar)</div><div class='ctx'> 	struct ath11k_base *ab = ar-&gt;ab;</div><div class='ctx'> 	struct ieee80211_iface_combination *combinations;</div><div class='ctx'> 	struct ieee80211_iface_limit *limits;</div><div class='del'>-	int n_limits;</div><div class='add'>+	int n_limits, n_combos;</div><div class='ctx'> 	bool p2p;</div><div class='ctx'> </div><div class='ctx'> 	p2p = ab-&gt;hw_params.interface_modes &amp; BIT(NL80211_IFTYPE_P2P_DEVICE);</div><div class='ctx'> </div><div class='del'>-	combinations = kzalloc(sizeof(*combinations), GFP_KERNEL);</div><div class='add'>+	if (ab-&gt;hw_params.support_dual_stations)</div><div class='add'>+		n_combos = 2;</div><div class='add'>+	else</div><div class='add'>+		n_combos = 1;</div><div class='add'>+</div><div class='add'>+	combinations = kcalloc(n_combos, sizeof(*combinations), GFP_KERNEL);</div><div class='ctx'> 	if (!combinations)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -9933,7 +10308,9 @@ static int ath11k_mac_setup_iface_combinations(struct ath11k *ar)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	limits[0].max = 1;</div><div class='ctx'> 	limits[0].types |= BIT(NL80211_IFTYPE_STATION);</div><div class='add'>+	limits[1].max = 16;</div><div class='ctx'> 	limits[1].types |= BIT(NL80211_IFTYPE_AP);</div><div class='ctx'> 	if (IS_ENABLED(CONFIG_MAC80211_MESH) &amp;&amp;</div><div class='ctx'> 	    ab-&gt;hw_params.interface_modes &amp; BIT(NL80211_IFTYPE_MESH_POINT))</div><div class='hunk'>@@ -9943,25 +10320,24 @@ static int ath11k_mac_setup_iface_combinations(struct ath11k *ar)</div><div class='ctx'> 	combinations[0].n_limits = n_limits;</div><div class='ctx'> 	combinations[0].beacon_int_infra_match = true;</div><div class='ctx'> 	combinations[0].beacon_int_min_gcd = 100;</div><div class='add'>+	combinations[0].max_interfaces = 16;</div><div class='add'>+	combinations[0].num_different_channels = 1;</div><div class='add'>+	combinations[0].radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |</div><div class='add'>+						BIT(NL80211_CHAN_WIDTH_20) |</div><div class='add'>+						BIT(NL80211_CHAN_WIDTH_40) |</div><div class='add'>+						BIT(NL80211_CHAN_WIDTH_80) |</div><div class='add'>+						BIT(NL80211_CHAN_WIDTH_80P80) |</div><div class='add'>+						BIT(NL80211_CHAN_WIDTH_160);</div><div class='ctx'> </div><div class='ctx'> 	if (ab-&gt;hw_params.support_dual_stations) {</div><div class='ctx'> 		limits[0].max = 2;</div><div class='del'>-		limits[1].max = 1;</div><div class='ctx'> </div><div class='del'>-		combinations[0].max_interfaces = ab-&gt;hw_params.num_vdevs;</div><div class='del'>-		combinations[0].num_different_channels = 2;</div><div class='del'>-	} else {</div><div class='del'>-		limits[0].max = 1;</div><div class='del'>-		limits[1].max = 16;</div><div class='del'>-</div><div class='del'>-		combinations[0].max_interfaces = 16;</div><div class='del'>-		combinations[0].num_different_channels = 1;</div><div class='del'>-		combinations[0].radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |</div><div class='del'>-							BIT(NL80211_CHAN_WIDTH_20) |</div><div class='del'>-							BIT(NL80211_CHAN_WIDTH_40) |</div><div class='del'>-							BIT(NL80211_CHAN_WIDTH_80) |</div><div class='del'>-							BIT(NL80211_CHAN_WIDTH_80P80) |</div><div class='del'>-							BIT(NL80211_CHAN_WIDTH_160);</div><div class='add'>+		combinations[1].limits = limits;</div><div class='add'>+		combinations[1].n_limits = n_limits;</div><div class='add'>+		combinations[1].beacon_int_infra_match = true;</div><div class='add'>+		combinations[1].beacon_int_min_gcd = 100;</div><div class='add'>+		combinations[1].max_interfaces = ab-&gt;hw_params.num_vdevs;</div><div class='add'>+		combinations[1].num_different_channels = 2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (p2p) {</div><div class='hunk'>@@ -9972,7 +10348,7 @@ static int ath11k_mac_setup_iface_combinations(struct ath11k *ar)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ar-&gt;hw-&gt;wiphy-&gt;iface_combinations = combinations;</div><div class='del'>-	ar-&gt;hw-&gt;wiphy-&gt;n_iface_combinations = 1;</div><div class='add'>+	ar-&gt;hw-&gt;wiphy-&gt;n_iface_combinations = n_combos;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -10020,6 +10396,7 @@ static const struct wiphy_iftype_ext_capab ath11k_iftypes_ext_capa[] = {</div><div class='ctx'> </div><div class='ctx'> static void __ath11k_mac_unregister(struct ath11k *ar)</div><div class='ctx'> {</div><div class='add'>+	cancel_work_sync(&amp;ar-&gt;channel_update_work);</div><div class='ctx'> 	cancel_work_sync(&amp;ar-&gt;regd_update_work);</div><div class='ctx'> </div><div class='ctx'> 	ieee80211_unregister_hw(ar-&gt;hw);</div><div class='hunk'>@@ -10166,6 +10543,8 @@ static int __ath11k_mac_register(struct ath11k *ar)</div><div class='ctx'> 	ar-&gt;hw-&gt;wiphy-&gt;features |= NL80211_FEATURE_AP_MODE_CHAN_WIDTH_CHANGE |</div><div class='ctx'> 				   NL80211_FEATURE_AP_SCAN;</div><div class='ctx'> </div><div class='add'>+	ar-&gt;hw-&gt;wiphy-&gt;features |= NL80211_FEATURE_TX_POWER_INSERTION;</div><div class='add'>+</div><div class='ctx'> 	ar-&gt;max_num_stations = TARGET_NUM_STATIONS(ab);</div><div class='ctx'> 	ar-&gt;max_num_peers = TARGET_NUM_PEERS_PDEV(ab);</div><div class='ctx'> </div><div class='hunk'>@@ -10312,7 +10691,7 @@ int ath11k_mac_register(struct ath11k_base *ab)</div><div class='ctx'> 	struct ath11k_pdev *pdev;</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int ret;</div><div class='del'>-	u8 mac_addr[ETH_ALEN] = {0};</div><div class='add'>+	u8 mac_addr[ETH_ALEN] = {};</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(ATH11K_FLAG_REGISTERED, &amp;ab-&gt;dev_flags))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -10419,6 +10798,8 @@ int ath11k_mac_allocate(struct ath11k_base *ab)</div><div class='ctx'> 		init_completion(&amp;ar-&gt;thermal.wmi_sync);</div><div class='ctx'> </div><div class='ctx'> 		INIT_DELAYED_WORK(&amp;ar-&gt;scan.timeout, ath11k_scan_timeout_work);</div><div class='add'>+		INIT_WORK(&amp;ar-&gt;channel_update_work, ath11k_regd_update_chan_list_work);</div><div class='add'>+		INIT_LIST_HEAD(&amp;ar-&gt;channel_update_queue);</div><div class='ctx'> 		INIT_WORK(&amp;ar-&gt;regd_update_work, ath11k_regd_update_work);</div><div class='ctx'> </div><div class='ctx'> 		INIT_WORK(&amp;ar-&gt;wmi_mgmt_tx_work, ath11k_mgmt_over_wmi_tx_work);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/mac.h b/drivers/net/wireless/ath/ath11k/mac.h<br/>index f5800fbecff8..5e61eea1bb03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/mac.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/mac.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/mac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/mac.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2023, 2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef ATH11K_MAC_H</div><div class='hunk'>@@ -179,4 +179,6 @@ int ath11k_mac_vif_set_keepalive(struct ath11k_vif *arvif,</div><div class='ctx'> void ath11k_mac_fill_reg_tpc_info(struct ath11k *ar,</div><div class='ctx'> 				  struct ieee80211_vif *vif,</div><div class='ctx'> 				  struct ieee80211_chanctx_conf *ctx);</div><div class='add'>+int ath11k_mac_fw_stats_request(struct ath11k *ar,</div><div class='add'>+				struct stats_request_params *req_param);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/mhi.c b/drivers/net/wireless/ath/ath11k/mhi.c<br/>index 6974a551883f..acd76e9392d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/mhi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/mhi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/mhi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/mhi.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2020 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/msi.h&gt;</div><div class='hunk'>@@ -398,6 +398,7 @@ int ath11k_mhi_register(struct ath11k_pci *ab_pci)</div><div class='ctx'> 	case ATH11K_HW_WCN6855_HW20:</div><div class='ctx'> 	case ATH11K_HW_WCN6855_HW21:</div><div class='ctx'> 	case ATH11K_HW_QCA2066_HW21:</div><div class='add'>+	case ATH11K_HW_QCA6698AQ_HW21:</div><div class='ctx'> 		ath11k_mhi_config = &amp;ath11k_mhi_config_qca6390;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -453,9 +454,17 @@ int ath11k_mhi_start(struct ath11k_pci *ab_pci)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ath11k_mhi_stop(struct ath11k_pci *ab_pci)</div><div class='add'>+void ath11k_mhi_stop(struct ath11k_pci *ab_pci, bool is_suspend)</div><div class='ctx'> {</div><div class='del'>-	mhi_power_down(ab_pci-&gt;mhi_ctrl, true);</div><div class='add'>+	/* During suspend we need to use mhi_power_down_keep_dev()</div><div class='add'>+	 * workaround, otherwise ath11k_core_resume() will timeout</div><div class='add'>+	 * during resume.</div><div class='add'>+	 */</div><div class='add'>+	if (is_suspend)</div><div class='add'>+		mhi_power_down_keep_dev(ab_pci-&gt;mhi_ctrl, true);</div><div class='add'>+	else</div><div class='add'>+		mhi_power_down(ab_pci-&gt;mhi_ctrl, true);</div><div class='add'>+</div><div class='ctx'> 	mhi_unprepare_after_power_down(ab_pci-&gt;mhi_ctrl);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -490,3 +499,8 @@ int ath11k_mhi_resume(struct ath11k_pci *ab_pci)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void ath11k_mhi_coredump(struct mhi_controller *mhi_ctrl, bool in_panic)</div><div class='add'>+{</div><div class='add'>+	mhi_download_rddm_image(mhi_ctrl, in_panic);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/mhi.h b/drivers/net/wireless/ath/ath11k/mhi.h<br/>index a682aad52fc5..5c5c2b03c81f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/mhi.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/mhi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/mhi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/mhi.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2020 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> #ifndef _ATH11K_MHI_H</div><div class='ctx'> #define _ATH11K_MHI_H</div><div class='hunk'>@@ -18,7 +18,7 @@</div><div class='ctx'> #define MHICTRL_RESET_MASK			0x2</div><div class='ctx'> </div><div class='ctx'> int ath11k_mhi_start(struct ath11k_pci *ar_pci);</div><div class='del'>-void ath11k_mhi_stop(struct ath11k_pci *ar_pci);</div><div class='add'>+void ath11k_mhi_stop(struct ath11k_pci *ar_pci, bool is_suspend);</div><div class='ctx'> int ath11k_mhi_register(struct ath11k_pci *ar_pci);</div><div class='ctx'> void ath11k_mhi_unregister(struct ath11k_pci *ar_pci);</div><div class='ctx'> void ath11k_mhi_set_mhictrl_reset(struct ath11k_base *ab);</div><div class='hunk'>@@ -26,5 +26,6 @@ void ath11k_mhi_clear_vector(struct ath11k_base *ab);</div><div class='ctx'> </div><div class='ctx'> int ath11k_mhi_suspend(struct ath11k_pci *ar_pci);</div><div class='ctx'> int ath11k_mhi_resume(struct ath11k_pci *ar_pci);</div><div class='add'>+void ath11k_mhi_coredump(struct mhi_controller *mhi_ctrl, bool in_panic);</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/pci.c b/drivers/net/wireless/ath/ath11k/pci.c<br/>index be9d2c69cc41..7114eca8810d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/pci.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/pci.c</a></div><div class='hunk'>@@ -1,13 +1,15 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/msi.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/time.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "pci.h"</div><div class='ctx'> #include "core.h"</div><div class='hunk'>@@ -35,7 +37,7 @@ static const struct pci_device_id ath11k_pci_id_table[] = {</div><div class='ctx'> 	{ PCI_VDEVICE(QCOM, QCA6390_DEVICE_ID) },</div><div class='ctx'> 	{ PCI_VDEVICE(QCOM, WCN6855_DEVICE_ID) },</div><div class='ctx'> 	{ PCI_VDEVICE(QCOM, QCN9074_DEVICE_ID) },</div><div class='del'>-	{0}</div><div class='add'>+	{}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> MODULE_DEVICE_TABLE(pci, ath11k_pci_id_table);</div><div class='hunk'>@@ -175,6 +177,19 @@ static inline void ath11k_pci_select_static_window(struct ath11k_pci *ab_pci)</div><div class='ctx'> 		  ab_pci-&gt;ab-&gt;mem + ATH11K_PCI_WINDOW_REG_ADDRESS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ath11k_pci_restore_window(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ab_pci-&gt;window_lock);</div><div class='add'>+</div><div class='add'>+	iowrite32(ATH11K_PCI_WINDOW_ENABLE_BIT | ab_pci-&gt;register_window,</div><div class='add'>+		  ab-&gt;mem + ATH11K_PCI_WINDOW_REG_ADDRESS);</div><div class='add'>+	ioread32(ab-&gt;mem + ATH11K_PCI_WINDOW_REG_ADDRESS);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;ab_pci-&gt;window_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ath11k_pci_soc_global_reset(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val, delay;</div><div class='hunk'>@@ -199,6 +214,11 @@ static void ath11k_pci_soc_global_reset(struct ath11k_base *ab)</div><div class='ctx'> 	val = ath11k_pcic_read32(ab, PCIE_SOC_GLOBAL_RESET);</div><div class='ctx'> 	if (val == 0xffffffff)</div><div class='ctx'> 		ath11k_warn(ab, "link down error during global reset\n");</div><div class='add'>+</div><div class='add'>+	/* Restore window register as its content is cleared during</div><div class='add'>+	 * hardware global reset, such that it aligns with host cache.</div><div class='add'>+	 */</div><div class='add'>+	ath11k_pci_restore_window(ab);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath11k_pci_clear_dbg_registers(struct ath11k_base *ab)</div><div class='hunk'>@@ -610,6 +630,187 @@ static void ath11k_pci_aspm_restore(struct ath11k_pci *ab_pci)</div><div class='ctx'> 						   PCI_EXP_LNKCTL_ASPMC);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_DEV_COREDUMP</div><div class='add'>+static int ath11k_pci_coredump_calculate_size(struct ath11k_base *ab, u32 *dump_seg_sz)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);</div><div class='add'>+	struct mhi_controller *mhi_ctrl = ab_pci-&gt;mhi_ctrl;</div><div class='add'>+	struct image_info *rddm_img, *fw_img;</div><div class='add'>+	struct ath11k_tlv_dump_data *dump_tlv;</div><div class='add'>+	enum ath11k_fw_crash_dump_type mem_type;</div><div class='add'>+	u32 len = 0, rddm_tlv_sz = 0, paging_tlv_sz = 0;</div><div class='add'>+	struct ath11k_dump_file_data *file_data;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	rddm_img = mhi_ctrl-&gt;rddm_image;</div><div class='add'>+	if (!rddm_img) {</div><div class='add'>+		ath11k_err(ab, "No RDDM dump found\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fw_img = mhi_ctrl-&gt;fbc_image;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fw_img-&gt;entries ; i++) {</div><div class='add'>+		if (!fw_img-&gt;mhi_buf[i].buf)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		paging_tlv_sz += fw_img-&gt;mhi_buf[i].len;</div><div class='add'>+	}</div><div class='add'>+	dump_seg_sz[FW_CRASH_DUMP_PAGING_DATA] = paging_tlv_sz;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; rddm_img-&gt;entries; i++) {</div><div class='add'>+		if (!rddm_img-&gt;mhi_buf[i].buf)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rddm_tlv_sz += rddm_img-&gt;mhi_buf[i].len;</div><div class='add'>+	}</div><div class='add'>+	dump_seg_sz[FW_CRASH_DUMP_RDDM_DATA] = rddm_tlv_sz;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;qmi.mem_seg_count; i++) {</div><div class='add'>+		mem_type = ath11k_coredump_get_dump_type(ab-&gt;qmi.target_mem[i].type);</div><div class='add'>+</div><div class='add'>+		if (mem_type == FW_CRASH_DUMP_NONE)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (mem_type == FW_CRASH_DUMP_TYPE_MAX) {</div><div class='add'>+			ath11k_dbg(ab, ATH11K_DBG_PCI,</div><div class='add'>+				   "target mem region type %d not supported",</div><div class='add'>+				   ab-&gt;qmi.target_mem[i].type);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!ab-&gt;qmi.target_mem[i].anyaddr)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dump_seg_sz[mem_type] += ab-&gt;qmi.target_mem[i].size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; FW_CRASH_DUMP_TYPE_MAX; i++) {</div><div class='add'>+		if (!dump_seg_sz[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		len += sizeof(*dump_tlv) + dump_seg_sz[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (len)</div><div class='add'>+		len += sizeof(*file_data);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath11k_pci_coredump_download(struct ath11k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);</div><div class='add'>+	struct mhi_controller *mhi_ctrl = ab_pci-&gt;mhi_ctrl;</div><div class='add'>+	struct image_info *rddm_img, *fw_img;</div><div class='add'>+	struct timespec64 timestamp;</div><div class='add'>+	int i, len, mem_idx;</div><div class='add'>+	enum ath11k_fw_crash_dump_type mem_type;</div><div class='add'>+	struct ath11k_dump_file_data *file_data;</div><div class='add'>+	struct ath11k_tlv_dump_data *dump_tlv;</div><div class='add'>+	size_t hdr_len = sizeof(*file_data);</div><div class='add'>+	void *buf;</div><div class='add'>+	u32 dump_seg_sz[FW_CRASH_DUMP_TYPE_MAX] = {};</div><div class='add'>+</div><div class='add'>+	ath11k_mhi_coredump(mhi_ctrl, false);</div><div class='add'>+</div><div class='add'>+	len = ath11k_pci_coredump_calculate_size(ab, dump_seg_sz);</div><div class='add'>+	if (!len) {</div><div class='add'>+		ath11k_warn(ab, "No crash dump data found for devcoredump");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rddm_img = mhi_ctrl-&gt;rddm_image;</div><div class='add'>+	fw_img = mhi_ctrl-&gt;fbc_image;</div><div class='add'>+</div><div class='add'>+	/* dev_coredumpv() requires vmalloc data */</div><div class='add'>+	buf = vzalloc(len);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ab-&gt;dump_data = buf;</div><div class='add'>+	ab-&gt;ath11k_coredump_len = len;</div><div class='add'>+	file_data = ab-&gt;dump_data;</div><div class='add'>+	strscpy(file_data-&gt;df_magic, "ATH11K-FW-DUMP", sizeof(file_data-&gt;df_magic));</div><div class='add'>+	file_data-&gt;len = cpu_to_le32(len);</div><div class='add'>+	file_data-&gt;version = cpu_to_le32(ATH11K_FW_CRASH_DUMP_V2);</div><div class='add'>+	file_data-&gt;chip_id = cpu_to_le32(ab_pci-&gt;dev_id);</div><div class='add'>+	file_data-&gt;qrtr_id = cpu_to_le32(ab_pci-&gt;ab-&gt;qmi.service_ins_id);</div><div class='add'>+	file_data-&gt;bus_id = cpu_to_le32(pci_domain_nr(ab_pci-&gt;pdev-&gt;bus));</div><div class='add'>+	guid_gen(&amp;file_data-&gt;guid);</div><div class='add'>+	ktime_get_real_ts64(&amp;timestamp);</div><div class='add'>+	file_data-&gt;tv_sec = cpu_to_le64(timestamp.tv_sec);</div><div class='add'>+	file_data-&gt;tv_nsec = cpu_to_le64(timestamp.tv_nsec);</div><div class='add'>+	buf += hdr_len;</div><div class='add'>+	dump_tlv = buf;</div><div class='add'>+	dump_tlv-&gt;type = cpu_to_le32(FW_CRASH_DUMP_PAGING_DATA);</div><div class='add'>+	dump_tlv-&gt;tlv_len = cpu_to_le32(dump_seg_sz[FW_CRASH_DUMP_PAGING_DATA]);</div><div class='add'>+	buf += COREDUMP_TLV_HDR_SIZE;</div><div class='add'>+</div><div class='add'>+	/* append all segments together as they are all part of a single contiguous</div><div class='add'>+	 * block of memory</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; fw_img-&gt;entries ; i++) {</div><div class='add'>+		if (!fw_img-&gt;mhi_buf[i].buf)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		memcpy_fromio(buf, (void const __iomem *)fw_img-&gt;mhi_buf[i].buf,</div><div class='add'>+			      fw_img-&gt;mhi_buf[i].len);</div><div class='add'>+		buf += fw_img-&gt;mhi_buf[i].len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dump_tlv = buf;</div><div class='add'>+	dump_tlv-&gt;type = cpu_to_le32(FW_CRASH_DUMP_RDDM_DATA);</div><div class='add'>+	dump_tlv-&gt;tlv_len = cpu_to_le32(dump_seg_sz[FW_CRASH_DUMP_RDDM_DATA]);</div><div class='add'>+	buf += COREDUMP_TLV_HDR_SIZE;</div><div class='add'>+</div><div class='add'>+	/* append all segments together as they are all part of a single contiguous</div><div class='add'>+	 * block of memory</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; rddm_img-&gt;entries; i++) {</div><div class='add'>+		if (!rddm_img-&gt;mhi_buf[i].buf)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		memcpy_fromio(buf, (void const __iomem *)rddm_img-&gt;mhi_buf[i].buf,</div><div class='add'>+			      rddm_img-&gt;mhi_buf[i].len);</div><div class='add'>+		buf += rddm_img-&gt;mhi_buf[i].len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mem_idx = FW_CRASH_DUMP_REMOTE_MEM_DATA;</div><div class='add'>+	for (; mem_idx &lt; FW_CRASH_DUMP_TYPE_MAX; mem_idx++) {</div><div class='add'>+		if (mem_idx == FW_CRASH_DUMP_NONE)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ab-&gt;qmi.mem_seg_count; i++) {</div><div class='add'>+			mem_type = ath11k_coredump_get_dump_type</div><div class='add'>+						(ab-&gt;qmi.target_mem[i].type);</div><div class='add'>+</div><div class='add'>+			if (mem_type != mem_idx)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (!ab-&gt;qmi.target_mem[i].anyaddr) {</div><div class='add'>+				ath11k_dbg(ab, ATH11K_DBG_PCI,</div><div class='add'>+					   "Skipping mem region type %d",</div><div class='add'>+					   ab-&gt;qmi.target_mem[i].type);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			dump_tlv = buf;</div><div class='add'>+			dump_tlv-&gt;type = cpu_to_le32(mem_idx);</div><div class='add'>+			dump_tlv-&gt;tlv_len = cpu_to_le32(dump_seg_sz[mem_idx]);</div><div class='add'>+			buf += COREDUMP_TLV_HDR_SIZE;</div><div class='add'>+</div><div class='add'>+			memcpy_fromio(buf, ab-&gt;qmi.target_mem[i].iaddr,</div><div class='add'>+				      ab-&gt;qmi.target_mem[i].size);</div><div class='add'>+</div><div class='add'>+			buf += ab-&gt;qmi.target_mem[i].size;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	queue_work(ab-&gt;workqueue, &amp;ab-&gt;dump_work);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int ath11k_pci_power_up(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);</div><div class='hunk'>@@ -638,7 +839,7 @@ static int ath11k_pci_power_up(struct ath11k_base *ab)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ath11k_pci_power_down(struct ath11k_base *ab)</div><div class='add'>+static void ath11k_pci_power_down(struct ath11k_base *ab, bool is_suspend)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);</div><div class='ctx'> </div><div class='hunk'>@@ -649,7 +850,7 @@ static void ath11k_pci_power_down(struct ath11k_base *ab)</div><div class='ctx'> </div><div class='ctx'> 	ath11k_pci_msi_disable(ab_pci);</div><div class='ctx'> </div><div class='del'>-	ath11k_mhi_stop(ab_pci);</div><div class='add'>+	ath11k_mhi_stop(ab_pci, is_suspend);</div><div class='ctx'> 	clear_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &amp;ab-&gt;dev_flags);</div><div class='ctx'> 	ath11k_pci_sw_reset(ab_pci-&gt;ab, false);</div><div class='ctx'> }</div><div class='hunk'>@@ -713,6 +914,9 @@ static const struct ath11k_hif_ops ath11k_pci_hif_ops = {</div><div class='ctx'> 	.ce_irq_enable = ath11k_pci_hif_ce_irq_enable,</div><div class='ctx'> 	.ce_irq_disable = ath11k_pci_hif_ce_irq_disable,</div><div class='ctx'> 	.get_ce_msi_idx = ath11k_pcic_get_ce_msi_idx,</div><div class='add'>+#ifdef CONFIG_DEV_COREDUMP</div><div class='add'>+	.coredump_download = ath11k_pci_coredump_download,</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void ath11k_pci_read_hw_version(struct ath11k_base *ab, u32 *major, u32 *minor)</div><div class='hunk'>@@ -735,7 +939,7 @@ static int ath11k_pci_set_irq_affinity_hint(struct ath11k_pci *ab_pci,</div><div class='ctx'> 	if (test_bit(ATH11K_FLAG_MULTI_MSI_VECTORS, &amp;ab_pci-&gt;ab-&gt;dev_flags))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return irq_set_affinity_hint(ab_pci-&gt;pdev-&gt;irq, m);</div><div class='add'>+	return irq_set_affinity_and_hint(ab_pci-&gt;pdev-&gt;irq, m);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath11k_pci_probe(struct pci_dev *pdev,</div><div class='hunk'>@@ -743,7 +947,7 @@ static int ath11k_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_base *ab;</div><div class='ctx'> 	struct ath11k_pci *ab_pci;</div><div class='del'>-	u32 soc_hw_version_major, soc_hw_version_minor, addr;</div><div class='add'>+	u32 soc_hw_version_major, soc_hw_version_minor;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	u32 sub_version;</div><div class='ctx'> </div><div class='hunk'>@@ -769,8 +973,7 @@ static int ath11k_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	 * from DT. If memory is reserved from DT for FW, ath11k driver need not</div><div class='ctx'> 	 * allocate memory.</div><div class='ctx'> 	 */</div><div class='del'>-	ret = of_property_read_u32(ab-&gt;dev-&gt;of_node, "memory-region", &amp;addr);</div><div class='del'>-	if (!ret)</div><div class='add'>+	if (of_property_present(ab-&gt;dev-&gt;of_node, "memory-region"))</div><div class='ctx'> 		set_bit(ATH11K_FLAG_FIXED_MEM_RGN, &amp;ab-&gt;dev_flags);</div><div class='ctx'> </div><div class='ctx'> 	ret = ath11k_pci_claim(ab_pci, pdev);</div><div class='hunk'>@@ -846,6 +1049,9 @@ static int ath11k_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 				case 0x1019D0E1:</div><div class='ctx'> 					ab-&gt;hw_rev = ATH11K_HW_QCA2066_HW21;</div><div class='ctx'> 					break;</div><div class='add'>+				case 0x001e60e1:</div><div class='add'>+					ab-&gt;hw_rev = ATH11K_HW_QCA6698AQ_HW21;</div><div class='add'>+					break;</div><div class='ctx'> 				default:</div><div class='ctx'> 					ab-&gt;hw_rev = ATH11K_HW_WCN6855_HW21;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -936,6 +1142,8 @@ unsupported_wcn6855_soc:</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_free_irq:</div><div class='add'>+	/* __free_irq() expects the caller to have cleared the affinity hint */</div><div class='add'>+	ath11k_pci_set_irq_affinity_hint(ab_pci, NULL);</div><div class='ctx'> 	ath11k_pcic_free_irq(ab);</div><div class='ctx'> </div><div class='ctx'> err_ce_free:</div><div class='hunk'>@@ -970,17 +1178,21 @@ static void ath11k_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> 	ath11k_pci_set_irq_affinity_hint(ab_pci, NULL);</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(ATH11K_FLAG_QMI_FAIL, &amp;ab-&gt;dev_flags)) {</div><div class='del'>-		ath11k_pci_power_down(ab);</div><div class='add'>+		ath11k_pci_power_down(ab, false);</div><div class='ctx'> 		ath11k_debugfs_soc_destroy(ab);</div><div class='ctx'> 		ath11k_qmi_deinit_service(ab);</div><div class='add'>+		ath11k_core_pm_notifier_unregister(ab);</div><div class='ctx'> 		goto qmi_fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	set_bit(ATH11K_FLAG_UNREGISTERING, &amp;ab-&gt;dev_flags);</div><div class='ctx'> </div><div class='add'>+	cancel_work_sync(&amp;ab-&gt;reset_work);</div><div class='add'>+	cancel_work_sync(&amp;ab-&gt;dump_work);</div><div class='ctx'> 	ath11k_core_deinit(ab);</div><div class='ctx'> </div><div class='ctx'> qmi_fail:</div><div class='add'>+	ath11k_fw_destroy(ab);</div><div class='ctx'> 	ath11k_mhi_unregister(ab_pci);</div><div class='ctx'> </div><div class='ctx'> 	ath11k_pcic_free_irq(ab);</div><div class='hunk'>@@ -998,7 +1210,7 @@ static void ath11k_pci_shutdown(struct pci_dev *pdev)</div><div class='ctx'> 	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);</div><div class='ctx'> </div><div class='ctx'> 	ath11k_pci_set_irq_affinity_hint(ab_pci, NULL);</div><div class='del'>-	ath11k_pci_power_down(ab);</div><div class='add'>+	ath11k_pci_power_down(ab, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static __maybe_unused int ath11k_pci_pm_suspend(struct device *dev)</div><div class='hunk'>@@ -1035,9 +1247,39 @@ static __maybe_unused int ath11k_pci_pm_resume(struct device *dev)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static SIMPLE_DEV_PM_OPS(ath11k_pci_pm_ops,</div><div class='del'>-			 ath11k_pci_pm_suspend,</div><div class='del'>-			 ath11k_pci_pm_resume);</div><div class='add'>+static __maybe_unused int ath11k_pci_pm_suspend_late(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_base *ab = dev_get_drvdata(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ath11k_core_suspend_late(ab);</div><div class='add'>+	if (ret)</div><div class='add'>+		ath11k_warn(ab, "failed to late suspend core: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	/* Similar to ath11k_pci_pm_suspend(), we return success here</div><div class='add'>+	 * even error happens, to allow system suspend/hibernation survive.</div><div class='add'>+	 */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __maybe_unused int ath11k_pci_pm_resume_early(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ath11k_base *ab = dev_get_drvdata(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ath11k_core_resume_early(ab);</div><div class='add'>+	if (ret)</div><div class='add'>+		ath11k_warn(ab, "failed to early resume core: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops __maybe_unused ath11k_pci_pm_ops = {</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(ath11k_pci_pm_suspend,</div><div class='add'>+				ath11k_pci_pm_resume)</div><div class='add'>+	SET_LATE_SYSTEM_SLEEP_PM_OPS(ath11k_pci_pm_suspend_late,</div><div class='add'>+				     ath11k_pci_pm_resume_early)</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver ath11k_pci_driver = {</div><div class='ctx'> 	.name = "ath11k_pci",</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/pci.h b/drivers/net/wireless/ath/ath11k/pci.h<br/>index c33c7865145c..1e3005a4b64c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/pci.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/pci.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/pci.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/pci.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2022,2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> #ifndef _ATH11K_PCI_H</div><div class='ctx'> #define _ATH11K_PCI_H</div><div class='hunk'>@@ -35,18 +35,18 @@</div><div class='ctx'> #define PCIE_SMLH_REQ_RST_LINK_DOWN		0x2</div><div class='ctx'> #define PCIE_INT_CLEAR_ALL			0xffffffff</div><div class='ctx'> </div><div class='del'>-#define PCIE_QSERDES_COM_SYSCLK_EN_SEL_REG(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;pcie_qserdes_sysclk_en_sel)</div><div class='add'>+#define PCIE_QSERDES_COM_SYSCLK_EN_SEL_REG(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;pcie_qserdes_sysclk_en_sel)</div><div class='ctx'> #define PCIE_QSERDES_COM_SYSCLK_EN_SEL_VAL	0x10</div><div class='ctx'> #define PCIE_QSERDES_COM_SYSCLK_EN_SEL_MSK	0xffffffff</div><div class='del'>-#define PCIE_PCS_OSC_DTCT_CONFIG1_REG(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;pcie_pcs_osc_dtct_config_base)</div><div class='add'>+#define PCIE_PCS_OSC_DTCT_CONFIG1_REG(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;pcie_pcs_osc_dtct_config_base)</div><div class='ctx'> #define PCIE_PCS_OSC_DTCT_CONFIG1_VAL		0x02</div><div class='del'>-#define PCIE_PCS_OSC_DTCT_CONFIG2_REG(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;pcie_pcs_osc_dtct_config_base + 0x4)</div><div class='add'>+#define PCIE_PCS_OSC_DTCT_CONFIG2_REG(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;pcie_pcs_osc_dtct_config_base + 0x4)</div><div class='ctx'> #define PCIE_PCS_OSC_DTCT_CONFIG2_VAL		0x52</div><div class='del'>-#define PCIE_PCS_OSC_DTCT_CONFIG4_REG(x) \</div><div class='del'>-		(ab-&gt;hw_params.regs-&gt;pcie_pcs_osc_dtct_config_base + 0xc)</div><div class='add'>+#define PCIE_PCS_OSC_DTCT_CONFIG4_REG(ab) \</div><div class='add'>+		((ab)-&gt;hw_params.regs-&gt;pcie_pcs_osc_dtct_config_base + 0xc)</div><div class='ctx'> #define PCIE_PCS_OSC_DTCT_CONFIG4_VAL		0xff</div><div class='ctx'> #define PCIE_PCS_OSC_DTCT_CONFIG_MSK		0x000000ff</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c<br/>index debe7c5919ef..fc6e7da05c60 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/pcic.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/pcic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/pcic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/pcic.c</a></div><div class='hunk'>@@ -1,9 +1,11 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "pcic.h"</div><div class='ctx'> #include "debug.h"</div><div class='hunk'>@@ -126,6 +128,17 @@ static const struct ath11k_msi_config ath11k_msi_config[] = {</div><div class='ctx'> 		},</div><div class='ctx'> 		.hw_rev = ATH11K_HW_QCA2066_HW21,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.total_vectors = 32,</div><div class='add'>+		.total_users = 4,</div><div class='add'>+		.users = (struct ath11k_msi_user[]) {</div><div class='add'>+			{ .name = "MHI", .num_vectors = 3, .base_vector = 0 },</div><div class='add'>+			{ .name = "CE", .num_vectors = 10, .base_vector = 3 },</div><div class='add'>+			{ .name = "WAKE", .num_vectors = 1, .base_vector = 13 },</div><div class='add'>+			{ .name = "DP", .num_vectors = 18, .base_vector = 14 },</div><div class='add'>+		},</div><div class='add'>+		.hw_rev = ATH11K_HW_QCA6698AQ_HW21,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int ath11k_pcic_init_msi_config(struct ath11k_base *ab)</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c<br/>index f477afd325de..ff6a97e328b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/qmi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/qmi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/qmi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/qmi.c</a></div><div class='hunk'>@@ -1,17 +1,19 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/elf.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "qmi.h"</div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "debug.h"</div><div class='ctx'> #include "hif.h"</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_reserved_mem.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='hunk'>@@ -1704,7 +1706,9 @@ static const struct qmi_elem_info qmi_wlfw_fw_init_done_ind_msg_v01_ei[] = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int ath11k_qmi_host_cap_send(struct ath11k_base *ab)</div><div class='add'>+/* clang stack usage explodes if this is inlined */</div><div class='add'>+static noinline_for_stack</div><div class='add'>+int ath11k_qmi_host_cap_send(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	struct qmi_wlanfw_host_cap_req_msg_v01 req;</div><div class='ctx'> 	struct qmi_wlanfw_host_cap_resp_msg_v01 resp;</div><div class='hunk'>@@ -1955,13 +1959,15 @@ static void ath11k_qmi_free_target_mem_chunk(struct ath11k_base *ab)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ab-&gt;qmi.mem_seg_count; i++) {</div><div class='del'>-		if ((ab-&gt;hw_params.fixed_mem_region ||</div><div class='del'>-		     test_bit(ATH11K_FLAG_FIXED_MEM_RGN, &amp;ab-&gt;dev_flags)) &amp;&amp;</div><div class='del'>-		     ab-&gt;qmi.target_mem[i].iaddr)</div><div class='del'>-			iounmap(ab-&gt;qmi.target_mem[i].iaddr);</div><div class='add'>+		if (!ab-&gt;qmi.target_mem[i].anyaddr)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-		if (!ab-&gt;qmi.target_mem[i].vaddr)</div><div class='add'>+		if (ab-&gt;hw_params.fixed_mem_region ||</div><div class='add'>+		    test_bit(ATH11K_FLAG_FIXED_MEM_RGN, &amp;ab-&gt;dev_flags)) {</div><div class='add'>+			iounmap(ab-&gt;qmi.target_mem[i].iaddr);</div><div class='add'>+			ab-&gt;qmi.target_mem[i].iaddr = NULL;</div><div class='ctx'> 			continue;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		dma_free_coherent(ab-&gt;dev,</div><div class='ctx'> 				  ab-&gt;qmi.target_mem[i].prev_size,</div><div class='hunk'>@@ -1989,6 +1995,15 @@ static int ath11k_qmi_alloc_target_mem_chunk(struct ath11k_base *ab)</div><div class='ctx'> 			    chunk-&gt;prev_size == chunk-&gt;size)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='add'>+			if (ab-&gt;qmi.mem_seg_count &lt;= ATH11K_QMI_FW_MEM_REQ_SEGMENT_CNT) {</div><div class='add'>+				ath11k_dbg(ab, ATH11K_DBG_QMI,</div><div class='add'>+					   "size/type mismatch (current %d %u) (prev %d %u), try later with small size\n",</div><div class='add'>+					    chunk-&gt;size, chunk-&gt;type,</div><div class='add'>+					    chunk-&gt;prev_size, chunk-&gt;prev_type);</div><div class='add'>+				ab-&gt;qmi.target_mem_delayed = true;</div><div class='add'>+				return 0;</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			/* cannot reuse the existing chunk */</div><div class='ctx'> 			dma_free_coherent(ab-&gt;dev, chunk-&gt;prev_size,</div><div class='ctx'> 					  chunk-&gt;vaddr, chunk-&gt;paddr);</div><div class='hunk'>@@ -2025,23 +2040,14 @@ static int ath11k_qmi_alloc_target_mem_chunk(struct ath11k_base *ab)</div><div class='ctx'> static int ath11k_qmi_assign_target_mem_chunk(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = ab-&gt;dev;</div><div class='del'>-	struct device_node *hremote_node = NULL;</div><div class='del'>-	struct resource res;</div><div class='add'>+	struct resource res = {};</div><div class='ctx'> 	u32 host_ddr_sz;</div><div class='ctx'> 	int i, idx, ret;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0, idx = 0; i &lt; ab-&gt;qmi.mem_seg_count; i++) {</div><div class='ctx'> 		switch (ab-&gt;qmi.target_mem[i].type) {</div><div class='ctx'> 		case HOST_DDR_REGION_TYPE:</div><div class='del'>-			hremote_node = of_parse_phandle(dev-&gt;of_node, "memory-region", 0);</div><div class='del'>-			if (!hremote_node) {</div><div class='del'>-				ath11k_dbg(ab, ATH11K_DBG_QMI,</div><div class='del'>-					   "fail to get hremote_node\n");</div><div class='del'>-				return -ENODEV;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			ret = of_address_to_resource(hremote_node, 0, &amp;res);</div><div class='del'>-			of_node_put(hremote_node);</div><div class='add'>+			ret = of_reserved_mem_region_to_resource(dev-&gt;of_node, 0, &amp;res);</div><div class='ctx'> 			if (ret) {</div><div class='ctx'> 				ath11k_dbg(ab, ATH11K_DBG_QMI,</div><div class='ctx'> 					   "fail to get reg from hremote\n");</div><div class='hunk'>@@ -2068,7 +2074,7 @@ static int ath11k_qmi_assign_target_mem_chunk(struct ath11k_base *ab)</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BDF_MEM_REGION_TYPE:</div><div class='ctx'> 			ab-&gt;qmi.target_mem[idx].paddr = ab-&gt;hw_params.bdf_addr;</div><div class='del'>-			ab-&gt;qmi.target_mem[idx].vaddr = NULL;</div><div class='add'>+			ab-&gt;qmi.target_mem[idx].iaddr = NULL;</div><div class='ctx'> 			ab-&gt;qmi.target_mem[idx].size = ab-&gt;qmi.target_mem[i].size;</div><div class='ctx'> 			ab-&gt;qmi.target_mem[idx].type = ab-&gt;qmi.target_mem[i].type;</div><div class='ctx'> 			idx++;</div><div class='hunk'>@@ -2080,7 +2086,7 @@ static int ath11k_qmi_assign_target_mem_chunk(struct ath11k_base *ab)</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (ath11k_core_coldboot_cal_support(ab)) {</div><div class='del'>-				if (hremote_node) {</div><div class='add'>+				if (resource_size(&amp;res)) {</div><div class='ctx'> 					ab-&gt;qmi.target_mem[idx].paddr =</div><div class='ctx'> 							res.start + host_ddr_sz;</div><div class='ctx'> 					ab-&gt;qmi.target_mem[idx].iaddr =</div><div class='hunk'>@@ -2091,10 +2097,11 @@ static int ath11k_qmi_assign_target_mem_chunk(struct ath11k_base *ab)</div><div class='ctx'> 				} else {</div><div class='ctx'> 					ab-&gt;qmi.target_mem[idx].paddr =</div><div class='ctx'> 						ATH11K_QMI_CALDB_ADDRESS;</div><div class='add'>+					ab-&gt;qmi.target_mem[idx].iaddr = NULL;</div><div class='ctx'> 				}</div><div class='ctx'> 			} else {</div><div class='ctx'> 				ab-&gt;qmi.target_mem[idx].paddr = 0;</div><div class='del'>-				ab-&gt;qmi.target_mem[idx].vaddr = NULL;</div><div class='add'>+				ab-&gt;qmi.target_mem[idx].iaddr = NULL;</div><div class='ctx'> 			}</div><div class='ctx'> 			ab-&gt;qmi.target_mem[idx].size = ab-&gt;qmi.target_mem[i].size;</div><div class='ctx'> 			ab-&gt;qmi.target_mem[idx].type = ab-&gt;qmi.target_mem[i].type;</div><div class='hunk'>@@ -2180,6 +2187,9 @@ static int ath11k_qmi_request_device_info(struct ath11k_base *ab)</div><div class='ctx'> 	ab-&gt;mem = bar_addr_va;</div><div class='ctx'> 	ab-&gt;mem_len = resp.bar_size;</div><div class='ctx'> </div><div class='add'>+	if (!ab-&gt;hw_params.ce_remap)</div><div class='add'>+		ab-&gt;mem_ce = ab-&gt;mem;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> out:</div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -2538,7 +2548,7 @@ static int ath11k_qmi_m3_load(struct ath11k_base *ab)</div><div class='ctx'> 					   GFP_KERNEL);</div><div class='ctx'> 	if (!m3_mem-&gt;vaddr) {</div><div class='ctx'> 		ath11k_err(ab, "failed to allocate memory for M3 with size %zu\n",</div><div class='del'>-			   fw-&gt;size);</div><div class='add'>+			   m3_len);</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2567,7 +2577,9 @@ static void ath11k_qmi_m3_free(struct ath11k_base *ab)</div><div class='ctx'> 	m3_mem-&gt;size = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath11k_qmi_wlanfw_m3_info_send(struct ath11k_base *ab)</div><div class='add'>+/* clang stack usage explodes if this is inlined */</div><div class='add'>+static noinline_for_stack</div><div class='add'>+int ath11k_qmi_wlanfw_m3_info_send(struct ath11k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	struct m3_mem_region *m3_mem = &amp;ab-&gt;qmi.m3_mem;</div><div class='ctx'> 	struct qmi_wlanfw_m3_info_req_msg_v01 req;</div><div class='hunk'>@@ -2877,7 +2889,7 @@ int ath11k_qmi_fwreset_from_cold_boot(struct ath11k_base *ab)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* reset the firmware */</div><div class='del'>-	ath11k_hif_power_down(ab);</div><div class='add'>+	ath11k_hif_power_down(ab, false);</div><div class='ctx'> 	ath11k_hif_power_up(ab);</div><div class='ctx'> 	ath11k_dbg(ab, ATH11K_DBG_QMI, "exit wait for cold boot done\n");</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3165,7 +3177,7 @@ static int ath11k_qmi_ops_new_server(struct qmi_handle *qmi_hdl,</div><div class='ctx'> 	sq-&gt;sq_node = service-&gt;node;</div><div class='ctx'> 	sq-&gt;sq_port = service-&gt;port;</div><div class='ctx'> </div><div class='del'>-	ret = kernel_connect(qmi_hdl-&gt;sock, (struct sockaddr *)sq,</div><div class='add'>+	ret = kernel_connect(qmi_hdl-&gt;sock, (struct sockaddr_unsized *)sq,</div><div class='ctx'> 			     sizeof(*sq), 0);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath11k_warn(ab, "failed to connect to qmi remote service: %d\n", ret);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/qmi.h b/drivers/net/wireless/ath/ath11k/qmi.h<br/>index 7e06d100af57..7968ab122b65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/qmi.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/qmi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/qmi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/qmi.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef ATH11K_QMI_H</div><div class='hunk'>@@ -102,8 +102,11 @@ struct target_mem_chunk {</div><div class='ctx'> 	u32 prev_size;</div><div class='ctx'> 	u32 prev_type;</div><div class='ctx'> 	dma_addr_t paddr;</div><div class='del'>-	u32 *vaddr;</div><div class='del'>-	void __iomem *iaddr;</div><div class='add'>+	union {</div><div class='add'>+		u32 *vaddr;</div><div class='add'>+		void __iomem *iaddr;</div><div class='add'>+		void *anyaddr;</div><div class='add'>+	};</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct target_info {</div><div class='hunk'>@@ -154,6 +157,7 @@ struct ath11k_qmi {</div><div class='ctx'> #define BDF_MEM_REGION_TYPE				0x2</div><div class='ctx'> #define M3_DUMP_REGION_TYPE				0x3</div><div class='ctx'> #define CALDB_MEM_REGION_TYPE				0x4</div><div class='add'>+#define PAGEABLE_MEM_REGION_TYPE			0x9</div><div class='ctx'> </div><div class='ctx'> struct qmi_wlanfw_host_cap_req_msg_v01 {</div><div class='ctx'> 	u8 num_clients_valid;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/reg.c b/drivers/net/wireless/ath/ath11k/reg.c<br/>index b0f289784dd3..d62a2014315a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/reg.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/reg.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/reg.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/reg.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -55,6 +55,19 @@ ath11k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)</div><div class='ctx'> 	ath11k_dbg(ar-&gt;ab, ATH11K_DBG_REG,</div><div class='ctx'> 		   "Regulatory Notification received for %s\n", wiphy_name(wiphy));</div><div class='ctx'> </div><div class='add'>+	if (request-&gt;initiator == NL80211_REGDOM_SET_BY_DRIVER) {</div><div class='add'>+		ath11k_dbg(ar-&gt;ab, ATH11K_DBG_REG,</div><div class='add'>+			   "driver initiated regd update\n");</div><div class='add'>+		if (ar-&gt;state != ATH11K_STATE_ON)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		ret = ath11k_reg_update_chan_list(ar, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			ath11k_warn(ar-&gt;ab, "failed to update channel list: %d\n", ret);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Currently supporting only General User Hints. Cell base user</div><div class='ctx'> 	 * hints to be handled later.</div><div class='ctx'> 	 * Hints from other sources like Core, Beacons are not expected for</div><div class='hunk'>@@ -111,32 +124,7 @@ int ath11k_reg_update_chan_list(struct ath11k *ar, bool wait)</div><div class='ctx'> 	struct channel_param *ch;</div><div class='ctx'> 	enum nl80211_band band;</div><div class='ctx'> 	int num_channels = 0;</div><div class='del'>-	int i, ret, left;</div><div class='del'>-</div><div class='del'>-	if (wait &amp;&amp; ar-&gt;state_11d != ATH11K_11D_IDLE) {</div><div class='del'>-		left = wait_for_completion_timeout(&amp;ar-&gt;completed_11d_scan,</div><div class='del'>-						   ATH11K_SCAN_TIMEOUT_HZ);</div><div class='del'>-		if (!left) {</div><div class='del'>-			ath11k_dbg(ar-&gt;ab, ATH11K_DBG_REG,</div><div class='del'>-				   "failed to receive 11d scan complete: timed out\n");</div><div class='del'>-			ar-&gt;state_11d = ATH11K_11D_IDLE;</div><div class='del'>-		}</div><div class='del'>-		ath11k_dbg(ar-&gt;ab, ATH11K_DBG_REG,</div><div class='del'>-			   "11d scan wait left time %d\n", left);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (wait &amp;&amp;</div><div class='del'>-	    (ar-&gt;scan.state == ATH11K_SCAN_STARTING ||</div><div class='del'>-	    ar-&gt;scan.state == ATH11K_SCAN_RUNNING)) {</div><div class='del'>-		left = wait_for_completion_timeout(&amp;ar-&gt;scan.completed,</div><div class='del'>-						   ATH11K_SCAN_TIMEOUT_HZ);</div><div class='del'>-		if (!left)</div><div class='del'>-			ath11k_dbg(ar-&gt;ab, ATH11K_DBG_REG,</div><div class='del'>-				   "failed to receive hw scan complete: timed out\n");</div><div class='del'>-</div><div class='del'>-		ath11k_dbg(ar-&gt;ab, ATH11K_DBG_REG,</div><div class='del'>-			   "hw scan wait left time %d\n", left);</div><div class='del'>-	}</div><div class='add'>+	int i, ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (ar-&gt;state == ATH11K_STATE_RESTARTING)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -218,6 +206,16 @@ int ath11k_reg_update_chan_list(struct ath11k *ar, bool wait)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (wait) {</div><div class='add'>+		spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+		list_add_tail(&amp;params-&gt;list, &amp;ar-&gt;channel_update_queue);</div><div class='add'>+		spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='add'>+		queue_work(ar-&gt;ab-&gt;workqueue, &amp;ar-&gt;channel_update_work);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = ath11k_wmi_send_scan_chan_list_cmd(ar, params);</div><div class='ctx'> 	kfree(params);</div><div class='ctx'> </div><div class='hunk'>@@ -293,12 +291,6 @@ int ath11k_regd_update(struct ath11k *ar)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='del'>-	if (ar-&gt;state == ATH11K_STATE_ON) {</div><div class='del'>-		ret = ath11k_reg_update_chan_list(ar, true);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> err:</div><div class='ctx'> 	ath11k_warn(ab, "failed to perform regd update : %d\n", ret);</div><div class='hunk'>@@ -804,6 +796,54 @@ ret:</div><div class='ctx'> 	return new_regd;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ath11k_regd_update_chan_list_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ath11k *ar = container_of(work, struct ath11k,</div><div class='add'>+					 channel_update_work);</div><div class='add'>+	struct scan_chan_list_params *params;</div><div class='add'>+	struct list_head local_update_list;</div><div class='add'>+	int left;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;local_update_list);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+	list_splice_tail_init(&amp;ar-&gt;channel_update_queue, &amp;local_update_list);</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='add'>+	while ((params = list_first_entry_or_null(&amp;local_update_list,</div><div class='add'>+						  struct scan_chan_list_params,</div><div class='add'>+						  list))) {</div><div class='add'>+		if (ar-&gt;state_11d != ATH11K_11D_IDLE) {</div><div class='add'>+			left = wait_for_completion_timeout(&amp;ar-&gt;completed_11d_scan,</div><div class='add'>+							   ATH11K_SCAN_TIMEOUT_HZ);</div><div class='add'>+			if (!left) {</div><div class='add'>+				ath11k_dbg(ar-&gt;ab, ATH11K_DBG_REG,</div><div class='add'>+					   "failed to receive 11d scan complete: timed out\n");</div><div class='add'>+				ar-&gt;state_11d = ATH11K_11D_IDLE;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			ath11k_dbg(ar-&gt;ab, ATH11K_DBG_REG,</div><div class='add'>+				   "reg 11d scan wait left time %d\n", left);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if ((ar-&gt;scan.state == ATH11K_SCAN_STARTING ||</div><div class='add'>+		     ar-&gt;scan.state == ATH11K_SCAN_RUNNING)) {</div><div class='add'>+			left = wait_for_completion_timeout(&amp;ar-&gt;scan.completed,</div><div class='add'>+							   ATH11K_SCAN_TIMEOUT_HZ);</div><div class='add'>+			if (!left)</div><div class='add'>+				ath11k_dbg(ar-&gt;ab, ATH11K_DBG_REG,</div><div class='add'>+					   "failed to receive hw scan complete: timed out\n");</div><div class='add'>+</div><div class='add'>+			ath11k_dbg(ar-&gt;ab, ATH11K_DBG_REG,</div><div class='add'>+				   "reg hw scan wait left time %d\n", left);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ath11k_wmi_send_scan_chan_list_cmd(ar, params);</div><div class='add'>+		list_del(&amp;params-&gt;list);</div><div class='add'>+		kfree(params);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool ath11k_reg_is_world_alpha(char *alpha)</div><div class='ctx'> {</div><div class='ctx'> 	if (alpha[0] == '0' &amp;&amp; alpha[1] == '0')</div><div class='hunk'>@@ -977,6 +1017,7 @@ void ath11k_regd_update_work(struct work_struct *work)</div><div class='ctx'> void ath11k_reg_init(struct ath11k *ar)</div><div class='ctx'> {</div><div class='ctx'> 	ar-&gt;hw-&gt;wiphy-&gt;regulatory_flags = REGULATORY_WIPHY_SELF_MANAGED;</div><div class='add'>+	ar-&gt;hw-&gt;wiphy-&gt;flags |= WIPHY_FLAG_NOTIFY_REGDOM_BY_DRIVER;</div><div class='ctx'> 	ar-&gt;hw-&gt;wiphy-&gt;reg_notifier = ath11k_reg_notifier;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/reg.h b/drivers/net/wireless/ath/ath11k/reg.h<br/>index 263ea9061948..72b483594015 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/reg.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/reg.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/reg.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef ATH11K_REG_H</div><div class='hunk'>@@ -33,6 +33,7 @@ void ath11k_reg_init(struct ath11k *ar);</div><div class='ctx'> void ath11k_reg_reset_info(struct cur_regulatory_info *reg_info);</div><div class='ctx'> void ath11k_reg_free(struct ath11k_base *ab);</div><div class='ctx'> void ath11k_regd_update_work(struct work_struct *work);</div><div class='add'>+void ath11k_regd_update_chan_list_work(struct work_struct *work);</div><div class='ctx'> struct ieee80211_regdomain *</div><div class='ctx'> ath11k_reg_build_regd(struct ath11k_base *ab,</div><div class='ctx'> 		      struct cur_regulatory_info *reg_info, bool intersect,</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/spectral.c b/drivers/net/wireless/ath/ath11k/spectral.c<br/>index 79e091134515..b6b0516819a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/spectral.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/spectral.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/spectral.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/spectral.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/relay.h&gt;</div><div class='hunk'>@@ -205,7 +206,7 @@ static int ath11k_spectral_scan_trigger(struct ath11k *ar)</div><div class='ctx'> static int ath11k_spectral_scan_config(struct ath11k *ar,</div><div class='ctx'> 				       enum ath11k_spectral_mode mode)</div><div class='ctx'> {</div><div class='del'>-	struct ath11k_wmi_vdev_spectral_conf_param param = { 0 };</div><div class='add'>+	struct ath11k_wmi_vdev_spectral_conf_param param = {};</div><div class='ctx'> 	struct ath11k_vif *arvif;</div><div class='ctx'> 	int ret, count;</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/testmode.c b/drivers/net/wireless/ath/ath11k/testmode.c<br/>index 302d66092b97..a9751ea2a0b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/testmode.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/testmode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/testmode.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/testmode.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2023-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "testmode.h"</div><div class='hunk'>@@ -10,18 +10,18 @@</div><div class='ctx'> #include "wmi.h"</div><div class='ctx'> #include "hw.h"</div><div class='ctx'> #include "core.h"</div><div class='del'>-#include "testmode_i.h"</div><div class='add'>+#include "../testmode_i.h"</div><div class='ctx'> </div><div class='ctx'> #define ATH11K_FTM_SEGHDR_CURRENT_SEQ		GENMASK(3, 0)</div><div class='ctx'> #define ATH11K_FTM_SEGHDR_TOTAL_SEGMENTS	GENMASK(7, 4)</div><div class='ctx'> </div><div class='del'>-static const struct nla_policy ath11k_tm_policy[ATH11K_TM_ATTR_MAX + 1] = {</div><div class='del'>-	[ATH11K_TM_ATTR_CMD]		= { .type = NLA_U32 },</div><div class='del'>-	[ATH11K_TM_ATTR_DATA]		= { .type = NLA_BINARY,</div><div class='del'>-					    .len = ATH11K_TM_DATA_MAX_LEN },</div><div class='del'>-	[ATH11K_TM_ATTR_WMI_CMDID]	= { .type = NLA_U32 },</div><div class='del'>-	[ATH11K_TM_ATTR_VERSION_MAJOR]	= { .type = NLA_U32 },</div><div class='del'>-	[ATH11K_TM_ATTR_VERSION_MINOR]	= { .type = NLA_U32 },</div><div class='add'>+static const struct nla_policy ath11k_tm_policy[ATH_TM_ATTR_MAX + 1] = {</div><div class='add'>+	[ATH_TM_ATTR_CMD]		= { .type = NLA_U32 },</div><div class='add'>+	[ATH_TM_ATTR_DATA]		= { .type = NLA_BINARY,</div><div class='add'>+					    .len = ATH_TM_DATA_MAX_LEN },</div><div class='add'>+	[ATH_TM_ATTR_WMI_CMDID]		= { .type = NLA_U32 },</div><div class='add'>+	[ATH_TM_ATTR_VERSION_MAJOR]	= { .type = NLA_U32 },</div><div class='add'>+	[ATH_TM_ATTR_VERSION_MINOR]	= { .type = NLA_U32 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct ath11k *ath11k_tm_get_ar(struct ath11k_base *ab)</div><div class='hunk'>@@ -73,9 +73,9 @@ static void ath11k_tm_wmi_event_unsegmented(struct ath11k_base *ab, u32 cmd_id,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (nla_put_u32(nl_skb, ATH11K_TM_ATTR_CMD, ATH11K_TM_CMD_WMI) ||</div><div class='del'>-	    nla_put_u32(nl_skb, ATH11K_TM_ATTR_WMI_CMDID, cmd_id) ||</div><div class='del'>-	    nla_put(nl_skb, ATH11K_TM_ATTR_DATA, skb-&gt;len, skb-&gt;data)) {</div><div class='add'>+	if (nla_put_u32(nl_skb, ATH_TM_ATTR_CMD, ATH_TM_CMD_WMI) ||</div><div class='add'>+	    nla_put_u32(nl_skb, ATH_TM_ATTR_WMI_CMDID, cmd_id) ||</div><div class='add'>+	    nla_put(nl_skb, ATH_TM_ATTR_DATA, skb-&gt;len, skb-&gt;data)) {</div><div class='ctx'> 		ath11k_warn(ab, "failed to populate testmode unsegmented event\n");</div><div class='ctx'> 		kfree_skb(nl_skb);</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -107,7 +107,7 @@ static int ath11k_tm_process_event(struct ath11k_base *ab, u32 cmd_id,</div><div class='ctx'> 	u32 pdev_id;</div><div class='ctx'> </div><div class='ctx'> 	ath11k_dbg(ab, ATH11K_DBG_TESTMODE,</div><div class='del'>-		   "event wmi cmd_id %d ftm event msg %pK datalen %d\n",</div><div class='add'>+		   "event wmi cmd_id %d ftm event msg %p datalen %d\n",</div><div class='ctx'> 		   cmd_id, ftm_msg, length);</div><div class='ctx'> 	ath11k_dbg_dump(ab, ATH11K_DBG_TESTMODE, NULL, "", ftm_msg, length);</div><div class='ctx'> 	pdev_id = DP_HW2SW_MACID(ftm_msg-&gt;seg_hdr.pdev_id);</div><div class='hunk'>@@ -140,7 +140,7 @@ static int ath11k_tm_process_event(struct ath11k_base *ab, u32 cmd_id,</div><div class='ctx'> </div><div class='ctx'> 	data_pos = ab-&gt;testmode.data_pos;</div><div class='ctx'> </div><div class='del'>-	if ((data_pos + datalen) &gt; ATH11K_FTM_EVENT_MAX_BUF_LENGTH) {</div><div class='add'>+	if ((data_pos + datalen) &gt; ATH_FTM_EVENT_MAX_BUF_LENGTH) {</div><div class='ctx'> 		ath11k_warn(ab, "Invalid ftm event length at %d: %d\n",</div><div class='ctx'> 			    data_pos, datalen);</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -172,10 +172,10 @@ static int ath11k_tm_process_event(struct ath11k_base *ab, u32 cmd_id,</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (nla_put_u32(nl_skb, ATH11K_TM_ATTR_CMD,</div><div class='del'>-			ATH11K_TM_CMD_WMI_FTM) ||</div><div class='del'>-	    nla_put_u32(nl_skb, ATH11K_TM_ATTR_WMI_CMDID, cmd_id) ||</div><div class='del'>-	    nla_put(nl_skb, ATH11K_TM_ATTR_DATA, data_pos,</div><div class='add'>+	if (nla_put_u32(nl_skb, ATH_TM_ATTR_CMD,</div><div class='add'>+			ATH_TM_CMD_WMI_FTM) ||</div><div class='add'>+	    nla_put_u32(nl_skb, ATH_TM_ATTR_WMI_CMDID, cmd_id) ||</div><div class='add'>+	    nla_put(nl_skb, ATH_TM_ATTR_DATA, data_pos,</div><div class='ctx'> 		    &amp;ab-&gt;testmode.eventdata[0])) {</div><div class='ctx'> 		ath11k_warn(ab, "failed to populate segmented testmode event");</div><div class='ctx'> 		kfree_skb(nl_skb);</div><div class='hunk'>@@ -235,23 +235,23 @@ static int ath11k_tm_cmd_get_version(struct ath11k *ar, struct nlattr *tb[])</div><div class='ctx'> </div><div class='ctx'> 	ath11k_dbg(ar-&gt;ab, ATH11K_DBG_TESTMODE,</div><div class='ctx'> 		   "cmd get version_major %d version_minor %d\n",</div><div class='del'>-		   ATH11K_TESTMODE_VERSION_MAJOR,</div><div class='del'>-		   ATH11K_TESTMODE_VERSION_MINOR);</div><div class='add'>+		   ATH_TESTMODE_VERSION_MAJOR,</div><div class='add'>+		   ATH_TESTMODE_VERSION_MINOR);</div><div class='ctx'> </div><div class='ctx'> 	skb = cfg80211_testmode_alloc_reply_skb(ar-&gt;hw-&gt;wiphy,</div><div class='ctx'> 						nla_total_size(sizeof(u32)));</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	ret = nla_put_u32(skb, ATH11K_TM_ATTR_VERSION_MAJOR,</div><div class='del'>-			  ATH11K_TESTMODE_VERSION_MAJOR);</div><div class='add'>+	ret = nla_put_u32(skb, ATH_TM_ATTR_VERSION_MAJOR,</div><div class='add'>+			  ATH_TESTMODE_VERSION_MAJOR);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree_skb(skb);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = nla_put_u32(skb, ATH11K_TM_ATTR_VERSION_MINOR,</div><div class='del'>-			  ATH11K_TESTMODE_VERSION_MINOR);</div><div class='add'>+	ret = nla_put_u32(skb, ATH_TM_ATTR_VERSION_MINOR,</div><div class='add'>+			  ATH_TESTMODE_VERSION_MINOR);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		kfree_skb(skb);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -277,7 +277,7 @@ static int ath11k_tm_cmd_testmode_start(struct ath11k *ar, struct nlattr *tb[])</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ar-&gt;ab-&gt;testmode.eventdata = kzalloc(ATH11K_FTM_EVENT_MAX_BUF_LENGTH,</div><div class='add'>+	ar-&gt;ab-&gt;testmode.eventdata = kzalloc(ATH_FTM_EVENT_MAX_BUF_LENGTH,</div><div class='ctx'> 					     GFP_KERNEL);</div><div class='ctx'> 	if (!ar-&gt;ab-&gt;testmode.eventdata) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='hunk'>@@ -310,25 +310,25 @@ static int ath11k_tm_cmd_wmi(struct ath11k *ar, struct nlattr *tb[],</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> </div><div class='del'>-	if (!tb[ATH11K_TM_ATTR_DATA]) {</div><div class='add'>+	if (!tb[ATH_TM_ATTR_DATA]) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!tb[ATH11K_TM_ATTR_WMI_CMDID]) {</div><div class='add'>+	if (!tb[ATH_TM_ATTR_WMI_CMDID]) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	buf = nla_data(tb[ATH11K_TM_ATTR_DATA]);</div><div class='del'>-	buf_len = nla_len(tb[ATH11K_TM_ATTR_DATA]);</div><div class='add'>+	buf = nla_data(tb[ATH_TM_ATTR_DATA]);</div><div class='add'>+	buf_len = nla_len(tb[ATH_TM_ATTR_DATA]);</div><div class='ctx'> 	if (!buf_len) {</div><div class='ctx'> 		ath11k_warn(ar-&gt;ab, "No data present in testmode wmi command\n");</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cmd_id = nla_get_u32(tb[ATH11K_TM_ATTR_WMI_CMDID]);</div><div class='add'>+	cmd_id = nla_get_u32(tb[ATH_TM_ATTR_WMI_CMDID]);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure that the buffer length is long enough to</div><div class='ctx'> 	 * hold TLV and pdev/vdev id.</div><div class='hunk'>@@ -409,13 +409,13 @@ static int ath11k_tm_cmd_wmi_ftm(struct ath11k *ar, struct nlattr *tb[])</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!tb[ATH11K_TM_ATTR_DATA]) {</div><div class='add'>+	if (!tb[ATH_TM_ATTR_DATA]) {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	buf = nla_data(tb[ATH11K_TM_ATTR_DATA]);</div><div class='del'>-	buf_len = nla_len(tb[ATH11K_TM_ATTR_DATA]);</div><div class='add'>+	buf = nla_data(tb[ATH_TM_ATTR_DATA]);</div><div class='add'>+	buf_len = nla_len(tb[ATH_TM_ATTR_DATA]);</div><div class='ctx'> 	cmd_id = WMI_PDEV_UTF_CMDID;</div><div class='ctx'> </div><div class='ctx'> 	ath11k_dbg(ar-&gt;ab, ATH11K_DBG_TESTMODE,</div><div class='hunk'>@@ -476,25 +476,25 @@ int ath11k_tm_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,</div><div class='ctx'> 		  void *data, int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar = hw-&gt;priv;</div><div class='del'>-	struct nlattr *tb[ATH11K_TM_ATTR_MAX + 1];</div><div class='add'>+	struct nlattr *tb[ATH_TM_ATTR_MAX + 1];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = nla_parse(tb, ATH11K_TM_ATTR_MAX, data, len, ath11k_tm_policy,</div><div class='add'>+	ret = nla_parse(tb, ATH_TM_ATTR_MAX, data, len, ath11k_tm_policy,</div><div class='ctx'> 			NULL);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if (!tb[ATH11K_TM_ATTR_CMD])</div><div class='add'>+	if (!tb[ATH_TM_ATTR_CMD])</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	switch (nla_get_u32(tb[ATH11K_TM_ATTR_CMD])) {</div><div class='del'>-	case ATH11K_TM_CMD_GET_VERSION:</div><div class='add'>+	switch (nla_get_u32(tb[ATH_TM_ATTR_CMD])) {</div><div class='add'>+	case ATH_TM_CMD_GET_VERSION:</div><div class='ctx'> 		return ath11k_tm_cmd_get_version(ar, tb);</div><div class='del'>-	case ATH11K_TM_CMD_WMI:</div><div class='add'>+	case ATH_TM_CMD_WMI:</div><div class='ctx'> 		return ath11k_tm_cmd_wmi(ar, tb, vif);</div><div class='del'>-	case ATH11K_TM_CMD_TESTMODE_START:</div><div class='add'>+	case ATH_TM_CMD_TESTMODE_START:</div><div class='ctx'> 		return ath11k_tm_cmd_testmode_start(ar, tb);</div><div class='del'>-	case ATH11K_TM_CMD_WMI_FTM:</div><div class='add'>+	case ATH_TM_CMD_WMI_FTM:</div><div class='ctx'> 		return ath11k_tm_cmd_wmi_ftm(ar, tb);</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/trace.c b/drivers/net/wireless/ath/ath11k/trace.c<br/>index 6620650d7845..44ff8e9eff5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/trace.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/trace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/trace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/trace.c</a></div><div class='hunk'>@@ -1,8 +1,10 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2019 The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define CREATE_TRACE_POINTS</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/wmi.c b/drivers/net/wireless/ath/ath11k/wmi.c<br/>index 87abfa547529..110035dae8a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/wmi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/wmi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/wmi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/wmi.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/ctype.h&gt;</div><div class='hunk'>@@ -2061,10 +2061,13 @@ int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,</div><div class='ctx'> 	cmd-&gt;peer_bw_rxnss_override |= param-&gt;peer_bw_rxnss_override;</div><div class='ctx'> </div><div class='ctx'> 	if (param-&gt;vht_capable) {</div><div class='del'>-		mcs-&gt;rx_max_rate = param-&gt;rx_max_rate;</div><div class='del'>-		mcs-&gt;rx_mcs_set = param-&gt;rx_mcs_set;</div><div class='del'>-		mcs-&gt;tx_max_rate = param-&gt;tx_max_rate;</div><div class='del'>-		mcs-&gt;tx_mcs_set = param-&gt;tx_mcs_set;</div><div class='add'>+		/* firmware interprets mcs-&gt;tx_mcs_set field as peer's</div><div class='add'>+		 * RX capability</div><div class='add'>+		 */</div><div class='add'>+		mcs-&gt;tx_max_rate = param-&gt;rx_max_rate;</div><div class='add'>+		mcs-&gt;tx_mcs_set = param-&gt;rx_mcs_set;</div><div class='add'>+		mcs-&gt;rx_max_rate = param-&gt;tx_max_rate;</div><div class='add'>+		mcs-&gt;rx_mcs_set = param-&gt;tx_mcs_set;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* HE Rates */</div><div class='hunk'>@@ -2088,8 +2091,11 @@ int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,</div><div class='ctx'> 				     FIELD_PREP(WMI_TLV_LEN,</div><div class='ctx'> 						sizeof(*he_mcs) - TLV_HDR_SIZE);</div><div class='ctx'> </div><div class='del'>-		he_mcs-&gt;rx_mcs_set = param-&gt;peer_he_tx_mcs_set[i];</div><div class='del'>-		he_mcs-&gt;tx_mcs_set = param-&gt;peer_he_rx_mcs_set[i];</div><div class='add'>+		/* firmware interprets mcs-&gt;rx_mcs_set field as peer's</div><div class='add'>+		 * RX capability</div><div class='add'>+		 */</div><div class='add'>+		he_mcs-&gt;rx_mcs_set = param-&gt;peer_he_rx_mcs_set[i];</div><div class='add'>+		he_mcs-&gt;tx_mcs_set = param-&gt;peer_he_tx_mcs_set[i];</div><div class='ctx'> 		ptr += sizeof(*he_mcs);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2662,7 +2668,8 @@ int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,</div><div class='del'>-				       struct wmi_wmm_params_all_arg *param)</div><div class='add'>+				       struct wmi_wmm_params_all_arg *param,</div><div class='add'>+				       enum wmi_wmm_params_type wmm_param_type)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_pdev_wmi *wmi = ar-&gt;wmi;</div><div class='ctx'> 	struct wmi_vdev_set_wmm_params_cmd *cmd;</div><div class='hunk'>@@ -2681,7 +2688,7 @@ int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,</div><div class='ctx'> 			  FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	cmd-&gt;vdev_id = vdev_id;</div><div class='del'>-	cmd-&gt;wmm_param_type = 0;</div><div class='add'>+	cmd-&gt;wmm_param_type = wmm_param_type;</div><div class='ctx'> </div><div class='ctx'> 	for (ac = 0; ac &lt; WME_NUM_AC; ac++) {</div><div class='ctx'> 		switch (ac) {</div><div class='hunk'>@@ -2714,8 +2721,8 @@ int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,</div><div class='ctx'> 		wmm_param-&gt;no_ack = wmi_wmm_arg-&gt;no_ack;</div><div class='ctx'> </div><div class='ctx'> 		ath11k_dbg(ar-&gt;ab, ATH11K_DBG_WMI,</div><div class='del'>-			   "wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",</div><div class='del'>-			   ac, wmm_param-&gt;aifs, wmm_param-&gt;cwmin,</div><div class='add'>+			   "wmm set type %d ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",</div><div class='add'>+			   wmm_param_type, ac, wmm_param-&gt;aifs, wmm_param-&gt;cwmin,</div><div class='ctx'> 			   wmm_param-&gt;cwmax, wmm_param-&gt;txoplimit,</div><div class='ctx'> 			   wmm_param-&gt;acm, wmm_param-&gt;no_ack);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -5960,6 +5967,9 @@ static int wmi_process_mgmt_tx_comp(struct ath11k *ar,</div><div class='ctx'> 	dma_unmap_single(ar-&gt;ab-&gt;dev, skb_cb-&gt;paddr, msdu-&gt;len, DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 	info = IEEE80211_SKB_CB(msdu);</div><div class='add'>+	memset(&amp;info-&gt;status, 0, sizeof(info-&gt;status));</div><div class='add'>+	info-&gt;status.rates[0].idx = -1;</div><div class='add'>+</div><div class='ctx'> 	if ((!(info-&gt;flags &amp; IEEE80211_TX_CTL_NO_ACK)) &amp;&amp;</div><div class='ctx'> 	    !tx_compl_param-&gt;status) {</div><div class='ctx'> 		info-&gt;flags |= IEEE80211_TX_STAT_ACK;</div><div class='hunk'>@@ -7541,7 +7551,7 @@ static void ath11k_vdev_stopped_event(struct ath11k_base *ab, struct sk_buff *sk</div><div class='ctx'> </div><div class='ctx'> static void ath11k_mgmt_rx_event(struct ath11k_base *ab, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct mgmt_rx_event_params rx_ev = {0};</div><div class='add'>+	struct mgmt_rx_event_params rx_ev = {};</div><div class='ctx'> 	struct ath11k *ar;</div><div class='ctx'> 	struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);</div><div class='ctx'> 	struct ieee80211_hdr *hdr;</div><div class='hunk'>@@ -7656,7 +7666,7 @@ exit:</div><div class='ctx'> </div><div class='ctx'> static void ath11k_mgmt_tx_compl_event(struct ath11k_base *ab, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct wmi_mgmt_tx_compl_event tx_compl_param = {0};</div><div class='add'>+	struct wmi_mgmt_tx_compl_event tx_compl_param = {};</div><div class='ctx'> 	struct ath11k *ar;</div><div class='ctx'> </div><div class='ctx'> 	if (ath11k_pull_mgmt_tx_compl_param_tlv(ab, skb, &amp;tx_compl_param) != 0) {</div><div class='hunk'>@@ -7711,7 +7721,7 @@ static struct ath11k *ath11k_get_ar_on_scan_state(struct ath11k_base *ab,</div><div class='ctx'> static void ath11k_scan_event(struct ath11k_base *ab, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k *ar;</div><div class='del'>-	struct wmi_scan_event scan_ev = {0};</div><div class='add'>+	struct wmi_scan_event scan_ev = {};</div><div class='ctx'> </div><div class='ctx'> 	if (ath11k_pull_scan_ev(ab, skb, &amp;scan_ev) != 0) {</div><div class='ctx'> 		ath11k_warn(ab, "failed to extract scan event");</div><div class='hunk'>@@ -7883,7 +7893,7 @@ static void ath11k_roam_event(struct ath11k_base *ab, struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> static void ath11k_chan_info_event(struct ath11k_base *ab, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct wmi_chan_info_event ch_info_ev = {0};</div><div class='add'>+	struct wmi_chan_info_event ch_info_ev = {};</div><div class='ctx'> 	struct ath11k *ar;</div><div class='ctx'> 	struct survey_info *survey;</div><div class='ctx'> 	int idx;</div><div class='hunk'>@@ -8030,7 +8040,7 @@ exit:</div><div class='ctx'> static void ath11k_vdev_install_key_compl_event(struct ath11k_base *ab,</div><div class='ctx'> 						struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct wmi_vdev_install_key_complete_arg install_key_compl = {0};</div><div class='add'>+	struct wmi_vdev_install_key_complete_arg install_key_compl = {};</div><div class='ctx'> 	struct ath11k *ar;</div><div class='ctx'> </div><div class='ctx'> 	if (ath11k_pull_vdev_install_key_compl_ev(ab, skb, &amp;install_key_compl) != 0) {</div><div class='hunk'>@@ -8128,7 +8138,7 @@ static void ath11k_service_available_event(struct ath11k_base *ab, struct sk_buf</div><div class='ctx'> </div><div class='ctx'> static void ath11k_peer_assoc_conf_event(struct ath11k_base *ab, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0};</div><div class='add'>+	struct wmi_peer_assoc_conf_arg peer_assoc_conf = {};</div><div class='ctx'> 	struct ath11k *ar;</div><div class='ctx'> </div><div class='ctx'> 	if (ath11k_pull_peer_assoc_conf_ev(ab, skb, &amp;peer_assoc_conf) != 0) {</div><div class='hunk'>@@ -8157,6 +8167,11 @@ static void ath11k_peer_assoc_conf_event(struct ath11k_base *ab, struct sk_buff</div><div class='ctx'> static void ath11k_update_stats_event(struct ath11k_base *ab, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath11k_fw_stats stats = {};</div><div class='add'>+	size_t total_vdevs_started = 0;</div><div class='add'>+	struct ath11k_pdev *pdev;</div><div class='add'>+	bool is_end = true;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='ctx'> 	struct ath11k *ar;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -8183,25 +8198,57 @@ static void ath11k_update_stats_event(struct ath11k_base *ab, struct sk_buff *sk</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='ctx'> </div><div class='del'>-	/* WMI_REQUEST_PDEV_STAT can be requested via .get_txpower mac ops or via</div><div class='add'>+	/* WMI_REQUEST_PDEV_STAT, WMI_REQUEST_VDEV_STAT and</div><div class='add'>+	 * WMI_REQUEST_RSSI_PER_CHAIN_STAT can be requested via mac ops or via</div><div class='ctx'> 	 * debugfs fw stats. Therefore, processing it separately.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (stats.stats_id == WMI_REQUEST_PDEV_STAT) {</div><div class='ctx'> 		list_splice_tail_init(&amp;stats.pdevs, &amp;ar-&gt;fw_stats.pdevs);</div><div class='del'>-		ar-&gt;fw_stats_done = true;</div><div class='add'>+		complete(&amp;ar-&gt;fw_stats_done);</div><div class='add'>+		goto complete;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stats.stats_id == WMI_REQUEST_RSSI_PER_CHAIN_STAT) {</div><div class='add'>+		complete(&amp;ar-&gt;fw_stats_done);</div><div class='add'>+		goto complete;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stats.stats_id == WMI_REQUEST_VDEV_STAT) {</div><div class='add'>+		if (list_empty(&amp;stats.vdevs)) {</div><div class='add'>+			ath11k_warn(ab, "empty vdev stats");</div><div class='add'>+			goto complete;</div><div class='add'>+		}</div><div class='add'>+		/* FW sends all the active VDEV stats irrespective of PDEV,</div><div class='add'>+		 * hence limit until the count of all VDEVs started</div><div class='add'>+		 */</div><div class='add'>+		for (i = 0; i &lt; ab-&gt;num_radios; i++) {</div><div class='add'>+			pdev = rcu_dereference(ab-&gt;pdevs_active[i]);</div><div class='add'>+			if (pdev &amp;&amp; pdev-&gt;ar)</div><div class='add'>+				total_vdevs_started += ar-&gt;num_started_vdevs;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (total_vdevs_started)</div><div class='add'>+			is_end = ((++ar-&gt;fw_stats.num_vdev_recvd) ==</div><div class='add'>+				  total_vdevs_started);</div><div class='add'>+</div><div class='add'>+		list_splice_tail_init(&amp;stats.vdevs,</div><div class='add'>+				      &amp;ar-&gt;fw_stats.vdevs);</div><div class='add'>+</div><div class='add'>+		if (is_end)</div><div class='add'>+			complete(&amp;ar-&gt;fw_stats_done);</div><div class='add'>+</div><div class='ctx'> 		goto complete;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* WMI_REQUEST_VDEV_STAT, WMI_REQUEST_BCN_STAT and WMI_REQUEST_RSSI_PER_CHAIN_STAT</div><div class='del'>-	 * are currently requested only via debugfs fw stats. Hence, processing these</div><div class='del'>-	 * in debugfs context</div><div class='add'>+	/* WMI_REQUEST_BCN_STAT is currently requested only via debugfs fw stats.</div><div class='add'>+	 * Hence, processing it in debugfs context</div><div class='ctx'> 	 */</div><div class='ctx'> 	ath11k_debugfs_fw_stats_process(ar, &amp;stats);</div><div class='ctx'> </div><div class='ctx'> complete:</div><div class='ctx'> 	complete(&amp;ar-&gt;fw_stats_complete);</div><div class='del'>-	rcu_read_unlock();</div><div class='ctx'> 	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	/* Since the stats's pdev, vdev and beacon list are spliced and reinitialised</div><div class='ctx'> 	 * at this point, no need to free the individual list.</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/wmi.h b/drivers/net/wireless/ath/ath11k/wmi.h<br/>index 8982b909c821..0f0de24a3840 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/wmi.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/wmi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/wmi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/wmi.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef ATH11K_WMI_H</div><div class='hunk'>@@ -3463,20 +3463,6 @@ struct scan_cancel_param {</div><div class='ctx'> 	u32 pdev_id;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct  wmi_bcn_send_from_host_cmd {</div><div class='del'>-	u32 tlv_header;</div><div class='del'>-	u32 vdev_id;</div><div class='del'>-	u32 data_len;</div><div class='del'>-	union {</div><div class='del'>-		u32 frag_ptr;</div><div class='del'>-		u32 frag_ptr_lo;</div><div class='del'>-	};</div><div class='del'>-	u32 frame_ctrl;</div><div class='del'>-	u32 dtim_flag;</div><div class='del'>-	u32 bcn_antenna;</div><div class='del'>-	u32 frag_ptr_hi;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> #define WMI_CHAN_INFO_MODE		GENMASK(5, 0)</div><div class='ctx'> #define WMI_CHAN_INFO_HT40_PLUS		BIT(6)</div><div class='ctx'> #define WMI_CHAN_INFO_PASSIVE		BIT(7)</div><div class='hunk'>@@ -3817,6 +3803,7 @@ struct wmi_stop_scan_cmd {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct scan_chan_list_params {</div><div class='add'>+	struct list_head list;</div><div class='ctx'> 	u32 pdev_id;</div><div class='ctx'> 	u16 nallchans;</div><div class='ctx'> 	struct channel_param ch_param[];</div><div class='hunk'>@@ -4132,8 +4119,10 @@ struct wmi_rate_set {</div><div class='ctx'> struct wmi_vht_rate_set {</div><div class='ctx'> 	u32 tlv_header;</div><div class='ctx'> 	u32 rx_max_rate;</div><div class='add'>+	/* MCS at which the peer can transmit */</div><div class='ctx'> 	u32 rx_mcs_set;</div><div class='ctx'> 	u32 tx_max_rate;</div><div class='add'>+	/* MCS at which the peer can receive */</div><div class='ctx'> 	u32 tx_mcs_set;</div><div class='ctx'> 	u32 tx_max_mcs_nss;</div><div class='ctx'> } __packed;</div><div class='hunk'>@@ -6346,6 +6335,11 @@ enum wmi_sta_keepalive_method {</div><div class='ctx'> #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT	30</div><div class='ctx'> #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE	0</div><div class='ctx'> </div><div class='add'>+enum wmi_wmm_params_type {</div><div class='add'>+	WMI_WMM_PARAM_TYPE_LEGACY = 0,</div><div class='add'>+	WMI_WMM_PARAM_TYPE_11AX_MU_EDCA = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> const void **ath11k_wmi_tlv_parse_alloc(struct ath11k_base *ab,</div><div class='ctx'> 					struct sk_buff *skb, gfp_t gfp);</div><div class='ctx'> int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,</div><div class='hunk'>@@ -6402,7 +6396,8 @@ int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,</div><div class='ctx'> int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar,</div><div class='ctx'> 				  struct scan_cancel_param *param);</div><div class='ctx'> int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,</div><div class='del'>-				       struct wmi_wmm_params_all_arg *param);</div><div class='add'>+				       struct wmi_wmm_params_all_arg *param,</div><div class='add'>+				       enum wmi_wmm_params_type wmm_param_type);</div><div class='ctx'> int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt,</div><div class='ctx'> 			    u32 pdev_id);</div><div class='ctx'> int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath11k/wow.c b/drivers/net/wireless/ath/ath11k/wow.c<br/>index 99d8ba45a75b..b6f08755129f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/wow.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath11k/wow.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath11k/wow.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath11k/wow.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2020 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='hunk'>@@ -148,13 +148,16 @@ static int ath11k_wow_cleanup(struct ath11k *ar)</div><div class='ctx'>  * 802.11: |4B|dest mac(6B)| 6B |src mac(6B)|  8B  |type(2B)|  body...  |</div><div class='ctx'>  *         +--+------------+----+-----------+---------------+-----------+</div><div class='ctx'>  */</div><div class='del'>-static void ath11k_wow_convert_8023_to_80211(struct cfg80211_pkt_pattern *new,</div><div class='del'>-					     const struct cfg80211_pkt_pattern *old)</div><div class='add'>+/* clang stack usage explodes if this is inlined */</div><div class='add'>+static noinline_for_stack</div><div class='add'>+void ath11k_wow_convert_8023_to_80211(struct cfg80211_pkt_pattern *new,</div><div class='add'>+				      const struct cfg80211_pkt_pattern *old)</div><div class='ctx'> {</div><div class='ctx'> 	u8 hdr_8023_pattern[ETH_HLEN] = {};</div><div class='ctx'> 	u8 hdr_8023_bit_mask[ETH_HLEN] = {};</div><div class='ctx'> 	u8 hdr_80211_pattern[WOW_HDR_LEN] = {};</div><div class='ctx'> 	u8 hdr_80211_bit_mask[WOW_HDR_LEN] = {};</div><div class='add'>+	u8 bytemask[WOW_MAX_PATTERN_SIZE] = {};</div><div class='ctx'> </div><div class='ctx'> 	int total_len = old-&gt;pkt_offset + old-&gt;pattern_len;</div><div class='ctx'> 	int hdr_80211_end_offset;</div><div class='hunk'>@@ -172,11 +175,17 @@ static void ath11k_wow_convert_8023_to_80211(struct cfg80211_pkt_pattern *new,</div><div class='ctx'> 	struct rfc1042_hdr *new_rfc_mask =</div><div class='ctx'> 		(struct rfc1042_hdr *)(hdr_80211_bit_mask + hdr_len);</div><div class='ctx'> 	int rfc_len = sizeof(*new_rfc_pattern);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* convert bitmask to bytemask */</div><div class='add'>+	for (i = 0; i &lt; old-&gt;pattern_len; i++)</div><div class='add'>+		if (old-&gt;mask[i / 8] &amp; BIT(i % 8))</div><div class='add'>+			bytemask[i] = 0xff;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(hdr_8023_pattern + old-&gt;pkt_offset,</div><div class='ctx'> 	       old-&gt;pattern, ETH_HLEN - old-&gt;pkt_offset);</div><div class='ctx'> 	memcpy(hdr_8023_bit_mask + old-&gt;pkt_offset,</div><div class='del'>-	       old-&gt;mask, ETH_HLEN - old-&gt;pkt_offset);</div><div class='add'>+	       bytemask, ETH_HLEN - old-&gt;pkt_offset);</div><div class='ctx'> </div><div class='ctx'> 	/* Copy destination address */</div><div class='ctx'> 	memcpy(new_hdr_pattern-&gt;addr1, old_hdr_pattern-&gt;h_dest, ETH_ALEN);</div><div class='hunk'>@@ -232,7 +241,7 @@ static void ath11k_wow_convert_8023_to_80211(struct cfg80211_pkt_pattern *new,</div><div class='ctx'> 		       (void *)old-&gt;pattern + ETH_HLEN - old-&gt;pkt_offset,</div><div class='ctx'> 		       total_len - ETH_HLEN);</div><div class='ctx'> 		memcpy((u8 *)new-&gt;mask + new-&gt;pattern_len,</div><div class='del'>-		       (void *)old-&gt;mask + ETH_HLEN - old-&gt;pkt_offset,</div><div class='add'>+		       bytemask + ETH_HLEN - old-&gt;pkt_offset,</div><div class='ctx'> 		       total_len - ETH_HLEN);</div><div class='ctx'> </div><div class='ctx'> 		new-&gt;pattern_len += total_len - ETH_HLEN;</div><div class='hunk'>@@ -393,35 +402,31 @@ static int ath11k_vif_wow_set_wakeups(struct ath11k_vif *arvif,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; wowlan-&gt;n_patterns; i++) {</div><div class='del'>-		u8 bitmask[WOW_MAX_PATTERN_SIZE] = {};</div><div class='ctx'> 		u8 ath_pattern[WOW_MAX_PATTERN_SIZE] = {};</div><div class='ctx'> 		u8 ath_bitmask[WOW_MAX_PATTERN_SIZE] = {};</div><div class='ctx'> 		struct cfg80211_pkt_pattern new_pattern = {};</div><div class='del'>-		struct cfg80211_pkt_pattern old_pattern = patterns[i];</div><div class='del'>-		int j;</div><div class='ctx'> </div><div class='ctx'> 		new_pattern.pattern = ath_pattern;</div><div class='ctx'> 		new_pattern.mask = ath_bitmask;</div><div class='ctx'> 		if (patterns[i].pattern_len &gt; WOW_MAX_PATTERN_SIZE)</div><div class='ctx'> 			continue;</div><div class='del'>-		/* convert bytemask to bitmask */</div><div class='del'>-		for (j = 0; j &lt; patterns[i].pattern_len; j++)</div><div class='del'>-			if (patterns[i].mask[j / 8] &amp; BIT(j % 8))</div><div class='del'>-				bitmask[j] = 0xff;</div><div class='del'>-		old_pattern.mask = bitmask;</div><div class='ctx'> </div><div class='ctx'> 		if (ar-&gt;wmi-&gt;wmi_ab-&gt;wlan_resource_config.rx_decap_mode ==</div><div class='ctx'> 		    ATH11K_HW_TXRX_NATIVE_WIFI) {</div><div class='ctx'> 			if (patterns[i].pkt_offset &lt; ETH_HLEN) {</div><div class='del'>-				u8 pattern_ext[WOW_MAX_PATTERN_SIZE] = {};</div><div class='del'>-</div><div class='del'>-				memcpy(pattern_ext, old_pattern.pattern,</div><div class='del'>-				       old_pattern.pattern_len);</div><div class='del'>-				old_pattern.pattern = pattern_ext;</div><div class='ctx'> 				ath11k_wow_convert_8023_to_80211(&amp;new_pattern,</div><div class='del'>-								 &amp;old_pattern);</div><div class='add'>+								 &amp;patterns[i]);</div><div class='ctx'> 			} else {</div><div class='del'>-				new_pattern = old_pattern;</div><div class='add'>+				int j;</div><div class='add'>+</div><div class='add'>+				new_pattern = patterns[i];</div><div class='add'>+				new_pattern.mask = ath_bitmask;</div><div class='add'>+</div><div class='add'>+				/* convert bitmask to bytemask */</div><div class='add'>+				for (j = 0; j &lt; patterns[i].pattern_len; j++)</div><div class='add'>+					if (patterns[i].mask[j / 8] &amp; BIT(j % 8))</div><div class='add'>+						ath_bitmask[j] = 0xff;</div><div class='add'>+</div><div class='ctx'> 				new_pattern.pkt_offset += WOW_HDR_LEN - ETH_HLEN;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/Kconfig b/drivers/net/wireless/ath/ath12k/Kconfig<br/>index f64e7c322216..1ea1af1b8f6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/Kconfig?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/Kconfig</a></div><div class='hunk'>@@ -7,7 +7,7 @@ config ATH12K</div><div class='ctx'> 	select MHI_BUS</div><div class='ctx'> 	select QRTR</div><div class='ctx'> 	select QRTR_MHI</div><div class='del'>-	select PCI_PWRCTL_PWRSEQ if HAVE_PWRCTL</div><div class='add'>+	select PCI_PWRCTRL_PWRSEQ if HAVE_PWRCTRL</div><div class='ctx'> 	help</div><div class='ctx'> 	  Enable support for Qualcomm Technologies Wi-Fi 7 (IEEE</div><div class='ctx'> 	  802.11be) family of chipsets, for example WCN7850 and</div><div class='hunk'>@@ -15,6 +15,14 @@ config ATH12K</div><div class='ctx'> </div><div class='ctx'> 	  If you choose to build a module, it'll be called ath12k.</div><div class='ctx'> </div><div class='add'>+config ATH12K_AHB</div><div class='add'>+	bool "QTI ath12k AHB support"</div><div class='add'>+	depends on ATH12K &amp;&amp; REMOTEPROC</div><div class='add'>+	select QCOM_MDT_LOADER</div><div class='add'>+	select QCOM_SCM</div><div class='add'>+	help</div><div class='add'>+	  Enable support for Ath12k AHB bus chipsets, example IPQ5332.</div><div class='add'>+</div><div class='ctx'> config ATH12K_DEBUG</div><div class='ctx'> 	bool "ath12k debugging"</div><div class='ctx'> 	depends on ATH12K</div><div class='hunk'>@@ -42,3 +50,13 @@ config ATH12K_TRACING</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say Y to make it easier to debug problems. But if</div><div class='ctx'> 	  you want optimal performance choose N.</div><div class='add'>+</div><div class='add'>+config ATH12K_COREDUMP</div><div class='add'>+	bool "ath12k coredump"</div><div class='add'>+	depends on ATH12K</div><div class='add'>+	select WANT_DEV_COREDUMP</div><div class='add'>+	help</div><div class='add'>+	  Enable ath12k coredump collection</div><div class='add'>+</div><div class='add'>+	  If unsure, say Y to make it easier to debug problems. But if</div><div class='add'>+	  dump collection not required choose N.</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/Makefile b/drivers/net/wireless/ath/ath12k/Makefile<br/>index 5a1ed20d730e..d95ee525a6cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/Makefile?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/Makefile</a></div><div class='hunk'>@@ -23,10 +23,13 @@ ath12k-y += core.o \</div><div class='ctx'> 	    fw.o \</div><div class='ctx'> 	    p2p.o</div><div class='ctx'> </div><div class='del'>-ath12k-$(CONFIG_ATH12K_DEBUGFS) += debugfs.o debugfs_htt_stats.o</div><div class='add'>+ath12k-$(CONFIG_ATH12K_AHB) += ahb.o</div><div class='add'>+ath12k-$(CONFIG_ATH12K_DEBUGFS) += debugfs.o debugfs_htt_stats.o debugfs_sta.o</div><div class='ctx'> ath12k-$(CONFIG_ACPI) += acpi.o</div><div class='ctx'> ath12k-$(CONFIG_ATH12K_TRACING) += trace.o</div><div class='ctx'> ath12k-$(CONFIG_PM) += wow.o</div><div class='add'>+ath12k-$(CONFIG_ATH12K_COREDUMP) += coredump.o</div><div class='add'>+ath12k-$(CONFIG_NL80211_TESTMODE) += testmode.o</div><div class='ctx'> </div><div class='ctx'> # for tracing framework to find trace.h</div><div class='ctx'> CFLAGS_trace.o := -I$(src)</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/acpi.c b/drivers/net/wireless/ath/ath12k/acpi.c<br/>index 0555d35aab47..d81367ce6929 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/acpi.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/acpi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/acpi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/acpi.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='hunk'>@@ -12,7 +12,7 @@ static int ath12k_acpi_dsm_get_data(struct ath12k_base *ab, int func)</div><div class='ctx'> {</div><div class='ctx'> 	union acpi_object *obj;</div><div class='ctx'> 	acpi_handle root_handle;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, i;</div><div class='ctx'> </div><div class='ctx'> 	root_handle = ACPI_HANDLE(ab-&gt;dev);</div><div class='ctx'> 	if (!root_handle) {</div><div class='hunk'>@@ -29,9 +29,48 @@ static int ath12k_acpi_dsm_get_data(struct ath12k_base *ab, int func)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (obj-&gt;type == ACPI_TYPE_INTEGER) {</div><div class='del'>-		ab-&gt;acpi.func_bit = obj-&gt;integer.value;</div><div class='add'>+		switch (func) {</div><div class='add'>+		case ATH12K_ACPI_DSM_FUNC_SUPPORT_FUNCS:</div><div class='add'>+			ab-&gt;acpi.func_bit = obj-&gt;integer.value;</div><div class='add'>+			break;</div><div class='add'>+		case ATH12K_ACPI_DSM_FUNC_DISABLE_FLAG:</div><div class='add'>+			ab-&gt;acpi.bit_flag = obj-&gt;integer.value;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else if (obj-&gt;type == ACPI_TYPE_STRING) {</div><div class='add'>+		switch (func) {</div><div class='add'>+		case ATH12K_ACPI_DSM_FUNC_BDF_EXT:</div><div class='add'>+			if (obj-&gt;string.length &lt;= ATH12K_ACPI_BDF_ANCHOR_STRING_LEN ||</div><div class='add'>+			    obj-&gt;string.length &gt; ATH12K_ACPI_BDF_MAX_LEN ||</div><div class='add'>+			    memcmp(obj-&gt;string.pointer, ATH12K_ACPI_BDF_ANCHOR_STRING,</div><div class='add'>+				   ATH12K_ACPI_BDF_ANCHOR_STRING_LEN)) {</div><div class='add'>+				ath12k_warn(ab, "invalid ACPI DSM BDF size: %d\n",</div><div class='add'>+					    obj-&gt;string.length);</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			memcpy(ab-&gt;acpi.bdf_string, obj-&gt;string.pointer,</div><div class='add'>+			       obj-&gt;buffer.length);</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 	} else if (obj-&gt;type == ACPI_TYPE_BUFFER) {</div><div class='ctx'> 		switch (func) {</div><div class='add'>+		case ATH12K_ACPI_DSM_FUNC_SUPPORT_FUNCS:</div><div class='add'>+			if (obj-&gt;buffer.length &lt; ATH12K_ACPI_DSM_FUNC_MIN_BITMAP_SIZE ||</div><div class='add'>+			    obj-&gt;buffer.length &gt; ATH12K_ACPI_DSM_FUNC_MAX_BITMAP_SIZE) {</div><div class='add'>+				ath12k_warn(ab, "invalid ACPI DSM func size: %d\n",</div><div class='add'>+					    obj-&gt;buffer.length);</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			ab-&gt;acpi.func_bit = 0;</div><div class='add'>+			for (i = 0; i &lt; obj-&gt;buffer.length; i++)</div><div class='add'>+				ab-&gt;acpi.func_bit += obj-&gt;buffer.pointer[i] &lt;&lt; (i * 8);</div><div class='add'>+</div><div class='add'>+			break;</div><div class='ctx'> 		case ATH12K_ACPI_DSM_FUNC_TAS_CFG:</div><div class='ctx'> 			if (obj-&gt;buffer.length != ATH12K_ACPI_DSM_TAS_CFG_SIZE) {</div><div class='ctx'> 				ath12k_warn(ab, "invalid ACPI DSM TAS config size: %d\n",</div><div class='hunk'>@@ -247,24 +286,118 @@ static int ath12k_acpi_set_tas_params(struct ath12k_base *ab)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+bool ath12k_acpi_get_disable_rfkill(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	return ab-&gt;acpi.acpi_disable_rfkill;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ath12k_acpi_get_disable_11be(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	return ab-&gt;acpi.acpi_disable_11be;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_acpi_set_dsm_func(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 *buf;</div><div class='add'>+</div><div class='add'>+	if (!ab-&gt;hw_params-&gt;acpi_guid)</div><div class='add'>+		/* not supported with this hardware */</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;acpi.acpi_tas_enable) {</div><div class='add'>+		ret = ath12k_acpi_set_tas_params(ab);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath12k_warn(ab, "failed to send ACPI TAS parameters: %d\n", ret);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;acpi.acpi_bios_sar_enable) {</div><div class='add'>+		ret = ath12k_acpi_set_bios_sar_params(ab);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath12k_warn(ab, "failed to send ACPI BIOS SAR: %d\n", ret);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;acpi.acpi_cca_enable) {</div><div class='add'>+		buf = ab-&gt;acpi.cca_data + ATH12K_ACPI_CCA_THR_OFFSET_DATA_OFFSET;</div><div class='add'>+		ret = ath12k_wmi_set_bios_cmd(ab,</div><div class='add'>+					      WMI_BIOS_PARAM_CCA_THRESHOLD_TYPE,</div><div class='add'>+					      buf,</div><div class='add'>+					      ATH12K_ACPI_CCA_THR_OFFSET_LEN);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath12k_warn(ab, "failed to set ACPI DSM CCA threshold: %d\n",</div><div class='add'>+				    ret);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;acpi.acpi_band_edge_enable) {</div><div class='add'>+		ret = ath12k_wmi_set_bios_cmd(ab,</div><div class='add'>+					      WMI_BIOS_PARAM_TYPE_BANDEDGE,</div><div class='add'>+					      ab-&gt;acpi.band_edge_power,</div><div class='add'>+					      sizeof(ab-&gt;acpi.band_edge_power));</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath12k_warn(ab,</div><div class='add'>+				    "failed to set ACPI DSM band edge channel power: %d\n",</div><div class='add'>+				    ret);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ath12k_acpi_start(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	acpi_status status;</div><div class='del'>-	u8 *buf;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	ab-&gt;acpi.acpi_tas_enable = false;</div><div class='add'>+	ab-&gt;acpi.acpi_disable_11be = false;</div><div class='add'>+	ab-&gt;acpi.acpi_disable_rfkill = false;</div><div class='add'>+	ab-&gt;acpi.acpi_bios_sar_enable = false;</div><div class='add'>+	ab-&gt;acpi.acpi_cca_enable = false;</div><div class='add'>+	ab-&gt;acpi.acpi_band_edge_enable = false;</div><div class='add'>+	ab-&gt;acpi.acpi_enable_bdf = false;</div><div class='add'>+	ab-&gt;acpi.bdf_string[0] = '\0';</div><div class='add'>+</div><div class='ctx'> 	if (!ab-&gt;hw_params-&gt;acpi_guid)</div><div class='ctx'> 		/* not supported with this hardware */</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	ab-&gt;acpi.acpi_tas_enable = false;</div><div class='del'>-</div><div class='ctx'> 	ret = ath12k_acpi_dsm_get_data(ab, ATH12K_ACPI_DSM_FUNC_SUPPORT_FUNCS);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath12k_dbg(ab, ATH12K_DBG_BOOT, "failed to get ACPI DSM data: %d\n", ret);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (ATH12K_ACPI_FUNC_BIT_VALID(ab-&gt;acpi, ATH12K_ACPI_FUNC_BIT_DISABLE_FLAG)) {</div><div class='add'>+		ret = ath12k_acpi_dsm_get_data(ab, ATH12K_ACPI_DSM_FUNC_DISABLE_FLAG);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath12k_warn(ab, "failed to get ACPI DISABLE FLAG: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ATH12K_ACPI_CHEK_BIT_VALID(ab-&gt;acpi,</div><div class='add'>+					       ATH12K_ACPI_DSM_DISABLE_11BE_BIT))</div><div class='add'>+			ab-&gt;acpi.acpi_disable_11be = true;</div><div class='add'>+</div><div class='add'>+		if (!ATH12K_ACPI_CHEK_BIT_VALID(ab-&gt;acpi,</div><div class='add'>+						ATH12K_ACPI_DSM_DISABLE_RFKILL_BIT))</div><div class='add'>+			ab-&gt;acpi.acpi_disable_rfkill = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ATH12K_ACPI_FUNC_BIT_VALID(ab-&gt;acpi, ATH12K_ACPI_FUNC_BIT_BDF_EXT)) {</div><div class='add'>+		ret = ath12k_acpi_dsm_get_data(ab, ATH12K_ACPI_DSM_FUNC_BDF_EXT);</div><div class='add'>+		if (ret || ab-&gt;acpi.bdf_string[0] == '\0') {</div><div class='add'>+			ath12k_warn(ab, "failed to get ACPI BDF EXT: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ab-&gt;acpi.acpi_enable_bdf = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (ATH12K_ACPI_FUNC_BIT_VALID(ab-&gt;acpi, ATH12K_ACPI_FUNC_BIT_TAS_CFG)) {</div><div class='ctx'> 		ret = ath12k_acpi_dsm_get_data(ab, ATH12K_ACPI_DSM_FUNC_TAS_CFG);</div><div class='ctx'> 		if (ret) {</div><div class='hunk'>@@ -308,20 +441,6 @@ int ath12k_acpi_start(struct ath12k_base *ab)</div><div class='ctx'> 			ab-&gt;acpi.acpi_bios_sar_enable = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ab-&gt;acpi.acpi_tas_enable) {</div><div class='del'>-		ret = ath12k_acpi_set_tas_params(ab);</div><div class='del'>-		if (ret) {</div><div class='del'>-			ath12k_warn(ab, "failed to send ACPI parameters: %d\n", ret);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (ab-&gt;acpi.acpi_bios_sar_enable) {</div><div class='del'>-		ret = ath12k_acpi_set_bios_sar_params(ab);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	if (ATH12K_ACPI_FUNC_BIT_VALID(ab-&gt;acpi, ATH12K_ACPI_FUNC_BIT_CCA)) {</div><div class='ctx'> 		ret = ath12k_acpi_dsm_get_data(ab, ATH12K_ACPI_DSM_FUNC_INDEX_CCA);</div><div class='ctx'> 		if (ret) {</div><div class='hunk'>@@ -332,18 +451,8 @@ int ath12k_acpi_start(struct ath12k_base *ab)</div><div class='ctx'> </div><div class='ctx'> 		if (ab-&gt;acpi.cca_data[0] == ATH12K_ACPI_CCA_THR_VERSION &amp;&amp;</div><div class='ctx'> 		    ab-&gt;acpi.cca_data[ATH12K_ACPI_CCA_THR_OFFSET_DATA_OFFSET] ==</div><div class='del'>-		    ATH12K_ACPI_CCA_THR_ENABLE_FLAG) {</div><div class='del'>-			buf = ab-&gt;acpi.cca_data + ATH12K_ACPI_CCA_THR_OFFSET_DATA_OFFSET;</div><div class='del'>-			ret = ath12k_wmi_set_bios_cmd(ab,</div><div class='del'>-						      WMI_BIOS_PARAM_CCA_THRESHOLD_TYPE,</div><div class='del'>-						      buf,</div><div class='del'>-						      ATH12K_ACPI_CCA_THR_OFFSET_LEN);</div><div class='del'>-			if (ret) {</div><div class='del'>-				ath12k_warn(ab, "failed to set ACPI DSM CCA threshold: %d\n",</div><div class='del'>-					    ret);</div><div class='del'>-				return ret;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		    ATH12K_ACPI_CCA_THR_ENABLE_FLAG)</div><div class='add'>+			ab-&gt;acpi.acpi_cca_enable = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ATH12K_ACPI_FUNC_BIT_VALID(ab-&gt;acpi,</div><div class='hunk'>@@ -356,18 +465,8 @@ int ath12k_acpi_start(struct ath12k_base *ab)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (ab-&gt;acpi.band_edge_power[0] == ATH12K_ACPI_BAND_EDGE_VERSION &amp;&amp;</div><div class='del'>-		    ab-&gt;acpi.band_edge_power[1] == ATH12K_ACPI_BAND_EDGE_ENABLE_FLAG) {</div><div class='del'>-			ret = ath12k_wmi_set_bios_cmd(ab,</div><div class='del'>-						      WMI_BIOS_PARAM_TYPE_BANDEDGE,</div><div class='del'>-						      ab-&gt;acpi.band_edge_power,</div><div class='del'>-						      sizeof(ab-&gt;acpi.band_edge_power));</div><div class='del'>-			if (ret) {</div><div class='del'>-				ath12k_warn(ab,</div><div class='del'>-					    "failed to set ACPI DSM band edge channel power: %d\n",</div><div class='del'>-					    ret);</div><div class='del'>-				return ret;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		    ab-&gt;acpi.band_edge_power[1] == ATH12K_ACPI_BAND_EDGE_ENABLE_FLAG)</div><div class='add'>+			ab-&gt;acpi.acpi_band_edge_enable = true;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	status = acpi_install_notify_handler(ACPI_HANDLE(ab-&gt;dev),</div><div class='hunk'>@@ -383,6 +482,21 @@ int ath12k_acpi_start(struct ath12k_base *ab)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+int ath12k_acpi_check_bdf_variant_name(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	size_t max_len = sizeof(ab-&gt;qmi.target.bdf_ext);</div><div class='add'>+</div><div class='add'>+	if (!ab-&gt;acpi.acpi_enable_bdf)</div><div class='add'>+		return -ENODATA;</div><div class='add'>+</div><div class='add'>+	if (strscpy(ab-&gt;qmi.target.bdf_ext, ab-&gt;acpi.bdf_string + 4, max_len) &lt; 0)</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT,</div><div class='add'>+			   "acpi bdf variant longer than the buffer (variant: %s)\n",</div><div class='add'>+			   ab-&gt;acpi.bdf_string);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void ath12k_acpi_stop(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	if (!ab-&gt;acpi.started)</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/acpi.h b/drivers/net/wireless/ath/ath12k/acpi.h<br/>index 39e003d86a48..3a26fea6af1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/acpi.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/acpi.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/acpi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/acpi.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> #ifndef ATH12K_ACPI_H</div><div class='ctx'> #define ATH12K_ACPI_H</div><div class='hunk'>@@ -9,6 +9,8 @@</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define ATH12K_ACPI_DSM_FUNC_SUPPORT_FUNCS	0</div><div class='add'>+#define ATH12K_ACPI_DSM_FUNC_DISABLE_FLAG	2</div><div class='add'>+#define ATH12K_ACPI_DSM_FUNC_BDF_EXT		3</div><div class='ctx'> #define ATH12K_ACPI_DSM_FUNC_BIOS_SAR		4</div><div class='ctx'> #define ATH12K_ACPI_DSM_FUNC_GEO_OFFSET		5</div><div class='ctx'> #define ATH12K_ACPI_DSM_FUNC_INDEX_CCA		6</div><div class='hunk'>@@ -16,6 +18,8 @@</div><div class='ctx'> #define ATH12K_ACPI_DSM_FUNC_TAS_DATA		9</div><div class='ctx'> #define ATH12K_ACPI_DSM_FUNC_INDEX_BAND_EDGE		10</div><div class='ctx'> </div><div class='add'>+#define ATH12K_ACPI_FUNC_BIT_DISABLE_FLAG		BIT(1)</div><div class='add'>+#define ATH12K_ACPI_FUNC_BIT_BDF_EXT			BIT(2)</div><div class='ctx'> #define ATH12K_ACPI_FUNC_BIT_BIOS_SAR			BIT(3)</div><div class='ctx'> #define ATH12K_ACPI_FUNC_BIT_GEO_OFFSET			BIT(4)</div><div class='ctx'> #define ATH12K_ACPI_FUNC_BIT_CCA			BIT(5)</div><div class='hunk'>@@ -25,6 +29,7 @@</div><div class='ctx'> </div><div class='ctx'> #define ATH12K_ACPI_NOTIFY_EVENT			0x86</div><div class='ctx'> #define ATH12K_ACPI_FUNC_BIT_VALID(_acdata, _func)	(((_acdata).func_bit) &amp; (_func))</div><div class='add'>+#define ATH12K_ACPI_CHEK_BIT_VALID(_acdata, _func)	(((_acdata).bit_flag) &amp; (_func))</div><div class='ctx'> </div><div class='ctx'> #define ATH12K_ACPI_TAS_DATA_VERSION		0x1</div><div class='ctx'> #define ATH12K_ACPI_TAS_DATA_ENABLE		0x1</div><div class='hunk'>@@ -48,6 +53,16 @@</div><div class='ctx'> #define ATH12K_ACPI_DSM_BAND_EDGE_DATA_SIZE		100</div><div class='ctx'> #define ATH12K_ACPI_DSM_TAS_CFG_SIZE			108</div><div class='ctx'> </div><div class='add'>+#define ATH12K_ACPI_DSM_FUNC_MIN_BITMAP_SIZE	1</div><div class='add'>+#define ATH12K_ACPI_DSM_FUNC_MAX_BITMAP_SIZE	4</div><div class='add'>+</div><div class='add'>+#define ATH12K_ACPI_DSM_DISABLE_11BE_BIT	BIT(0)</div><div class='add'>+#define ATH12K_ACPI_DSM_DISABLE_RFKILL_BIT	BIT(2)</div><div class='add'>+</div><div class='add'>+#define ATH12K_ACPI_BDF_ANCHOR_STRING_LEN	3</div><div class='add'>+#define ATH12K_ACPI_BDF_ANCHOR_STRING		"BDF"</div><div class='add'>+#define ATH12K_ACPI_BDF_MAX_LEN			100</div><div class='add'>+</div><div class='ctx'> #define ATH12K_ACPI_DSM_GEO_OFFSET_DATA_SIZE (ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET + \</div><div class='ctx'> 					      ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN)</div><div class='ctx'> #define ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE (ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET + \</div><div class='hunk'>@@ -59,6 +74,10 @@</div><div class='ctx'> </div><div class='ctx'> int ath12k_acpi_start(struct ath12k_base *ab);</div><div class='ctx'> void ath12k_acpi_stop(struct ath12k_base *ab);</div><div class='add'>+bool ath12k_acpi_get_disable_rfkill(struct ath12k_base *ab);</div><div class='add'>+bool ath12k_acpi_get_disable_11be(struct ath12k_base *ab);</div><div class='add'>+void ath12k_acpi_set_dsm_func(struct ath12k_base *ab);</div><div class='add'>+int ath12k_acpi_check_bdf_variant_name(struct ath12k_base *ab);</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='hunk'>@@ -71,6 +90,25 @@ static inline void ath12k_acpi_stop(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool ath12k_acpi_get_disable_rfkill(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ath12k_acpi_get_disable_11be(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath12k_acpi_set_dsm_func(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath12k_acpi_check_bdf_variant_name(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* CONFIG_ACPI */</div><div class='ctx'> </div><div class='ctx'> #endif /* ATH12K_ACPI_H */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/ahb.c b/drivers/net/wireless/ath/ath12k/ahb.c<br/>new file mode 100644<br/>index 000000000000..b30527c402f6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/ahb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/ahb.c</a></div><div class='hunk'>@@ -0,0 +1,1156 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/firmware/qcom/qcom_scm.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/remoteproc.h&gt;</div><div class='add'>+#include &lt;linux/soc/qcom/mdt_loader.h&gt;</div><div class='add'>+#include &lt;linux/soc/qcom/smem_state.h&gt;</div><div class='add'>+#include "ahb.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+#include "hif.h"</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ath12k_ahb_of_match[] = {</div><div class='add'>+	{ .compatible = "qcom,ipq5332-wifi",</div><div class='add'>+	  .data = (void *)ATH12K_HW_IPQ5332_HW10,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(of, ath12k_ahb_of_match);</div><div class='add'>+</div><div class='add'>+#define ATH12K_IRQ_CE0_OFFSET 4</div><div class='add'>+#define ATH12K_MAX_UPDS 1</div><div class='add'>+#define ATH12K_UPD_IRQ_WRD_LEN  18</div><div class='add'>+static const char ath12k_userpd_irq[][9] = {"spawn",</div><div class='add'>+				     "ready",</div><div class='add'>+				     "stop-ack"};</div><div class='add'>+</div><div class='add'>+static const char *irq_name[ATH12K_IRQ_NUM_MAX] = {</div><div class='add'>+	"misc-pulse1",</div><div class='add'>+	"misc-latch",</div><div class='add'>+	"sw-exception",</div><div class='add'>+	"watchdog",</div><div class='add'>+	"ce0",</div><div class='add'>+	"ce1",</div><div class='add'>+	"ce2",</div><div class='add'>+	"ce3",</div><div class='add'>+	"ce4",</div><div class='add'>+	"ce5",</div><div class='add'>+	"ce6",</div><div class='add'>+	"ce7",</div><div class='add'>+	"ce8",</div><div class='add'>+	"ce9",</div><div class='add'>+	"ce10",</div><div class='add'>+	"ce11",</div><div class='add'>+	"host2wbm-desc-feed",</div><div class='add'>+	"host2reo-re-injection",</div><div class='add'>+	"host2reo-command",</div><div class='add'>+	"host2rxdma-monitor-ring3",</div><div class='add'>+	"host2rxdma-monitor-ring2",</div><div class='add'>+	"host2rxdma-monitor-ring1",</div><div class='add'>+	"reo2ost-exception",</div><div class='add'>+	"wbm2host-rx-release",</div><div class='add'>+	"reo2host-status",</div><div class='add'>+	"reo2host-destination-ring4",</div><div class='add'>+	"reo2host-destination-ring3",</div><div class='add'>+	"reo2host-destination-ring2",</div><div class='add'>+	"reo2host-destination-ring1",</div><div class='add'>+	"rxdma2host-monitor-destination-mac3",</div><div class='add'>+	"rxdma2host-monitor-destination-mac2",</div><div class='add'>+	"rxdma2host-monitor-destination-mac1",</div><div class='add'>+	"ppdu-end-interrupts-mac3",</div><div class='add'>+	"ppdu-end-interrupts-mac2",</div><div class='add'>+	"ppdu-end-interrupts-mac1",</div><div class='add'>+	"rxdma2host-monitor-status-ring-mac3",</div><div class='add'>+	"rxdma2host-monitor-status-ring-mac2",</div><div class='add'>+	"rxdma2host-monitor-status-ring-mac1",</div><div class='add'>+	"host2rxdma-host-buf-ring-mac3",</div><div class='add'>+	"host2rxdma-host-buf-ring-mac2",</div><div class='add'>+	"host2rxdma-host-buf-ring-mac1",</div><div class='add'>+	"rxdma2host-destination-ring-mac3",</div><div class='add'>+	"rxdma2host-destination-ring-mac2",</div><div class='add'>+	"rxdma2host-destination-ring-mac1",</div><div class='add'>+	"host2tcl-input-ring4",</div><div class='add'>+	"host2tcl-input-ring3",</div><div class='add'>+	"host2tcl-input-ring2",</div><div class='add'>+	"host2tcl-input-ring1",</div><div class='add'>+	"wbm2host-tx-completions-ring4",</div><div class='add'>+	"wbm2host-tx-completions-ring3",</div><div class='add'>+	"wbm2host-tx-completions-ring2",</div><div class='add'>+	"wbm2host-tx-completions-ring1",</div><div class='add'>+	"tcl2host-status-ring",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ext_irq_num {</div><div class='add'>+	host2wbm_desc_feed = 16,</div><div class='add'>+	host2reo_re_injection,</div><div class='add'>+	host2reo_command,</div><div class='add'>+	host2rxdma_monitor_ring3,</div><div class='add'>+	host2rxdma_monitor_ring2,</div><div class='add'>+	host2rxdma_monitor_ring1,</div><div class='add'>+	reo2host_exception,</div><div class='add'>+	wbm2host_rx_release,</div><div class='add'>+	reo2host_status,</div><div class='add'>+	reo2host_destination_ring4,</div><div class='add'>+	reo2host_destination_ring3,</div><div class='add'>+	reo2host_destination_ring2,</div><div class='add'>+	reo2host_destination_ring1,</div><div class='add'>+	rxdma2host_monitor_destination_mac3,</div><div class='add'>+	rxdma2host_monitor_destination_mac2,</div><div class='add'>+	rxdma2host_monitor_destination_mac1,</div><div class='add'>+	ppdu_end_interrupts_mac3,</div><div class='add'>+	ppdu_end_interrupts_mac2,</div><div class='add'>+	ppdu_end_interrupts_mac1,</div><div class='add'>+	rxdma2host_monitor_status_ring_mac3,</div><div class='add'>+	rxdma2host_monitor_status_ring_mac2,</div><div class='add'>+	rxdma2host_monitor_status_ring_mac1,</div><div class='add'>+	host2rxdma_host_buf_ring_mac3,</div><div class='add'>+	host2rxdma_host_buf_ring_mac2,</div><div class='add'>+	host2rxdma_host_buf_ring_mac1,</div><div class='add'>+	rxdma2host_destination_ring_mac3,</div><div class='add'>+	rxdma2host_destination_ring_mac2,</div><div class='add'>+	rxdma2host_destination_ring_mac1,</div><div class='add'>+	host2tcl_input_ring4,</div><div class='add'>+	host2tcl_input_ring3,</div><div class='add'>+	host2tcl_input_ring2,</div><div class='add'>+	host2tcl_input_ring1,</div><div class='add'>+	wbm2host_tx_completions_ring4,</div><div class='add'>+	wbm2host_tx_completions_ring3,</div><div class='add'>+	wbm2host_tx_completions_ring2,</div><div class='add'>+	wbm2host_tx_completions_ring1,</div><div class='add'>+	tcl2host_status_ring,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 ath12k_ahb_read32(struct ath12k_base *ab, u32 offset)</div><div class='add'>+{</div><div class='add'>+	if (ab-&gt;ce_remap &amp;&amp; offset &lt; HAL_SEQ_WCSS_CMEM_OFFSET)</div><div class='add'>+		return ioread32(ab-&gt;mem_ce + offset);</div><div class='add'>+	return ioread32(ab-&gt;mem + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_write32(struct ath12k_base *ab, u32 offset,</div><div class='add'>+			       u32 value)</div><div class='add'>+{</div><div class='add'>+	if (ab-&gt;ce_remap &amp;&amp; offset &lt; HAL_SEQ_WCSS_CMEM_OFFSET)</div><div class='add'>+		iowrite32(value, ab-&gt;mem_ce + offset);</div><div class='add'>+	else</div><div class='add'>+		iowrite32(value, ab-&gt;mem + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_cancel_workqueue(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;hw_params-&gt;ce_count; i++) {</div><div class='add'>+		struct ath12k_ce_pipe *ce_pipe = &amp;ab-&gt;ce.ce_pipe[i];</div><div class='add'>+</div><div class='add'>+		if (ath12k_ce_get_attr_flags(ab, i) &amp; CE_ATTR_DIS_INTR)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		cancel_work_sync(&amp;ce_pipe-&gt;intr_wq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_ext_grp_disable(struct ath12k_ext_irq_grp *irq_grp)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; irq_grp-&gt;num_irq; i++)</div><div class='add'>+		disable_irq_nosync(irq_grp-&gt;ab-&gt;irq_num[irq_grp-&gt;irqs[i]]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __ath12k_ahb_ext_irq_disable(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {</div><div class='add'>+		struct ath12k_ext_irq_grp *irq_grp = &amp;ab-&gt;ext_irq_grp[i];</div><div class='add'>+</div><div class='add'>+		ath12k_ahb_ext_grp_disable(irq_grp);</div><div class='add'>+		if (irq_grp-&gt;napi_enabled) {</div><div class='add'>+			napi_synchronize(&amp;irq_grp-&gt;napi);</div><div class='add'>+			napi_disable(&amp;irq_grp-&gt;napi);</div><div class='add'>+			irq_grp-&gt;napi_enabled = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_ext_grp_enable(struct ath12k_ext_irq_grp *irq_grp)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; irq_grp-&gt;num_irq; i++)</div><div class='add'>+		enable_irq(irq_grp-&gt;ab-&gt;irq_num[irq_grp-&gt;irqs[i]]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_setbit32(struct ath12k_base *ab, u8 bit, u32 offset)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = ath12k_ahb_read32(ab, offset);</div><div class='add'>+	ath12k_ahb_write32(ab, offset, val | BIT(bit));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_clearbit32(struct ath12k_base *ab, u8 bit, u32 offset)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = ath12k_ahb_read32(ab, offset);</div><div class='add'>+	ath12k_ahb_write32(ab, offset, val &amp; ~BIT(bit));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_ce_irq_enable(struct ath12k_base *ab, u16 ce_id)</div><div class='add'>+{</div><div class='add'>+	const struct ce_attr *ce_attr;</div><div class='add'>+	const struct ce_ie_addr *ce_ie_addr = ab-&gt;hw_params-&gt;ce_ie_addr;</div><div class='add'>+	u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;</div><div class='add'>+</div><div class='add'>+	ie1_reg_addr = ce_ie_addr-&gt;ie1_reg_addr;</div><div class='add'>+	ie2_reg_addr = ce_ie_addr-&gt;ie2_reg_addr;</div><div class='add'>+	ie3_reg_addr = ce_ie_addr-&gt;ie3_reg_addr;</div><div class='add'>+</div><div class='add'>+	ce_attr = &amp;ab-&gt;hw_params-&gt;host_ce_config[ce_id];</div><div class='add'>+	if (ce_attr-&gt;src_nentries)</div><div class='add'>+		ath12k_ahb_setbit32(ab, ce_id, ie1_reg_addr);</div><div class='add'>+</div><div class='add'>+	if (ce_attr-&gt;dest_nentries) {</div><div class='add'>+		ath12k_ahb_setbit32(ab, ce_id, ie2_reg_addr);</div><div class='add'>+		ath12k_ahb_setbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,</div><div class='add'>+				    ie3_reg_addr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_ce_irq_disable(struct ath12k_base *ab, u16 ce_id)</div><div class='add'>+{</div><div class='add'>+	const struct ce_attr *ce_attr;</div><div class='add'>+	const struct ce_ie_addr *ce_ie_addr = ab-&gt;hw_params-&gt;ce_ie_addr;</div><div class='add'>+	u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;</div><div class='add'>+</div><div class='add'>+	ie1_reg_addr = ce_ie_addr-&gt;ie1_reg_addr;</div><div class='add'>+	ie2_reg_addr = ce_ie_addr-&gt;ie2_reg_addr;</div><div class='add'>+	ie3_reg_addr = ce_ie_addr-&gt;ie3_reg_addr;</div><div class='add'>+</div><div class='add'>+	ce_attr = &amp;ab-&gt;hw_params-&gt;host_ce_config[ce_id];</div><div class='add'>+	if (ce_attr-&gt;src_nentries)</div><div class='add'>+		ath12k_ahb_clearbit32(ab, ce_id, ie1_reg_addr);</div><div class='add'>+</div><div class='add'>+	if (ce_attr-&gt;dest_nentries) {</div><div class='add'>+		ath12k_ahb_clearbit32(ab, ce_id, ie2_reg_addr);</div><div class='add'>+		ath12k_ahb_clearbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,</div><div class='add'>+				      ie3_reg_addr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_sync_ce_irqs(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int irq_idx;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;hw_params-&gt;ce_count; i++) {</div><div class='add'>+		if (ath12k_ce_get_attr_flags(ab, i) &amp; CE_ATTR_DIS_INTR)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		irq_idx = ATH12K_IRQ_CE0_OFFSET + i;</div><div class='add'>+		synchronize_irq(ab-&gt;irq_num[irq_idx]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_sync_ext_irqs(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int i, j;</div><div class='add'>+	int irq_idx;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {</div><div class='add'>+		struct ath12k_ext_irq_grp *irq_grp = &amp;ab-&gt;ext_irq_grp[i];</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; irq_grp-&gt;num_irq; j++) {</div><div class='add'>+			irq_idx = irq_grp-&gt;irqs[j];</div><div class='add'>+			synchronize_irq(ab-&gt;irq_num[irq_idx]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_ce_irqs_enable(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;hw_params-&gt;ce_count; i++) {</div><div class='add'>+		if (ath12k_ce_get_attr_flags(ab, i) &amp; CE_ATTR_DIS_INTR)</div><div class='add'>+			continue;</div><div class='add'>+		ath12k_ahb_ce_irq_enable(ab, i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_ce_irqs_disable(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;hw_params-&gt;ce_count; i++) {</div><div class='add'>+		if (ath12k_ce_get_attr_flags(ab, i) &amp; CE_ATTR_DIS_INTR)</div><div class='add'>+			continue;</div><div class='add'>+		ath12k_ahb_ce_irq_disable(ab, i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_start(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	ath12k_ahb_ce_irqs_enable(ab);</div><div class='add'>+	ath12k_ce_rx_post_buf(ab);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_ext_irq_enable(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ext_irq_grp *irq_grp;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {</div><div class='add'>+		irq_grp = &amp;ab-&gt;ext_irq_grp[i];</div><div class='add'>+		if (!irq_grp-&gt;napi_enabled) {</div><div class='add'>+			napi_enable(&amp;irq_grp-&gt;napi);</div><div class='add'>+			irq_grp-&gt;napi_enabled = true;</div><div class='add'>+		}</div><div class='add'>+		ath12k_ahb_ext_grp_enable(irq_grp);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_ext_irq_disable(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	__ath12k_ahb_ext_irq_disable(ab);</div><div class='add'>+	ath12k_ahb_sync_ext_irqs(ab);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_stop(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	if (!test_bit(ATH12K_FLAG_CRASH_FLUSH, &amp;ab-&gt;dev_flags))</div><div class='add'>+		ath12k_ahb_ce_irqs_disable(ab);</div><div class='add'>+	ath12k_ahb_sync_ce_irqs(ab);</div><div class='add'>+	ath12k_ahb_cancel_workqueue(ab);</div><div class='add'>+	timer_delete_sync(&amp;ab-&gt;rx_replenish_retry);</div><div class='add'>+	ath12k_ce_cleanup_pipes(ab);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_power_up(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+	char fw_name[ATH12K_USERPD_FW_NAME_LEN];</div><div class='add'>+	char fw2_name[ATH12K_USERPD_FW_NAME_LEN];</div><div class='add'>+	struct device *dev = ab-&gt;dev;</div><div class='add'>+	const struct firmware *fw, *fw2;</div><div class='add'>+	struct reserved_mem *rmem = NULL;</div><div class='add'>+	unsigned long time_left;</div><div class='add'>+	phys_addr_t mem_phys;</div><div class='add'>+	void *mem_region;</div><div class='add'>+	size_t mem_size;</div><div class='add'>+	u32 pasid;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rmem = ath12k_core_get_reserved_mem(ab, 0);</div><div class='add'>+	if (!rmem)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	mem_phys = rmem-&gt;base;</div><div class='add'>+	mem_size = rmem-&gt;size;</div><div class='add'>+	mem_region = devm_memremap(dev, mem_phys, mem_size, MEMREMAP_WC);</div><div class='add'>+	if (IS_ERR(mem_region)) {</div><div class='add'>+		ath12k_err(ab, "unable to map memory region: %pa+%pa\n",</div><div class='add'>+			   &amp;rmem-&gt;base, &amp;rmem-&gt;size);</div><div class='add'>+		return PTR_ERR(mem_region);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(fw_name, sizeof(fw_name), "%s/%s/%s%d%s", ATH12K_FW_DIR,</div><div class='add'>+		 ab-&gt;hw_params-&gt;fw.dir, ATH12K_AHB_FW_PREFIX, ab_ahb-&gt;userpd_id,</div><div class='add'>+		 ATH12K_AHB_FW_SUFFIX);</div><div class='add'>+</div><div class='add'>+	ret = request_firmware(&amp;fw, fw_name, dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		ath12k_err(ab, "request_firmware failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath12k_dbg(ab, ATH12K_DBG_AHB, "Booting fw image %s, size %zd\n", fw_name,</div><div class='add'>+		   fw-&gt;size);</div><div class='add'>+</div><div class='add'>+	if (!fw-&gt;size) {</div><div class='add'>+		ath12k_err(ab, "Invalid firmware size\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_fw;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pasid = (u32_encode_bits(ab_ahb-&gt;userpd_id, ATH12K_USERPD_ID_MASK)) |</div><div class='add'>+		ATH12K_AHB_UPD_SWID;</div><div class='add'>+</div><div class='add'>+	/* Load FW image to a reserved memory location */</div><div class='add'>+	ret = qcom_mdt_load(dev, fw, fw_name, pasid, mem_region, mem_phys, mem_size,</div><div class='add'>+			    &amp;mem_phys);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_err(ab, "Failed to load MDT segments: %d\n", ret);</div><div class='add'>+		goto err_fw;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(fw2_name, sizeof(fw2_name), "%s/%s/%s", ATH12K_FW_DIR,</div><div class='add'>+		 ab-&gt;hw_params-&gt;fw.dir, ATH12K_AHB_FW2);</div><div class='add'>+</div><div class='add'>+	ret = request_firmware(&amp;fw2, fw2_name, dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		ath12k_err(ab, "request_firmware failed\n");</div><div class='add'>+		goto err_fw;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath12k_dbg(ab, ATH12K_DBG_AHB, "Booting fw image %s, size %zd\n", fw2_name,</div><div class='add'>+		   fw2-&gt;size);</div><div class='add'>+</div><div class='add'>+	if (!fw2-&gt;size) {</div><div class='add'>+		ath12k_err(ab, "Invalid firmware size\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_fw2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = qcom_mdt_load_no_init(dev, fw2, fw2_name, mem_region, mem_phys,</div><div class='add'>+				    mem_size, &amp;mem_phys);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_err(ab, "Failed to load MDT segments: %d\n", ret);</div><div class='add'>+		goto err_fw2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Authenticate FW image using peripheral ID */</div><div class='add'>+	ret = qcom_scm_pas_auth_and_reset(pasid);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_err(ab, "failed to boot the remote processor %d\n", ret);</div><div class='add'>+		goto err_fw2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Instruct Q6 to spawn userPD thread */</div><div class='add'>+	ret = qcom_smem_state_update_bits(ab_ahb-&gt;spawn_state, BIT(ab_ahb-&gt;spawn_bit),</div><div class='add'>+					  BIT(ab_ahb-&gt;spawn_bit));</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_err(ab, "Failed to update spawn state %d\n", ret);</div><div class='add'>+		goto err_fw2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	time_left = wait_for_completion_timeout(&amp;ab_ahb-&gt;userpd_spawned,</div><div class='add'>+						ATH12K_USERPD_SPAWN_TIMEOUT);</div><div class='add'>+	if (!time_left) {</div><div class='add'>+		ath12k_err(ab, "UserPD spawn wait timed out\n");</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+		goto err_fw2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	time_left = wait_for_completion_timeout(&amp;ab_ahb-&gt;userpd_ready,</div><div class='add'>+						ATH12K_USERPD_READY_TIMEOUT);</div><div class='add'>+	if (!time_left) {</div><div class='add'>+		ath12k_err(ab, "UserPD ready wait timed out\n");</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+		goto err_fw2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qcom_smem_state_update_bits(ab_ahb-&gt;spawn_state, BIT(ab_ahb-&gt;spawn_bit), 0);</div><div class='add'>+</div><div class='add'>+	ath12k_dbg(ab, ATH12K_DBG_AHB, "UserPD%d is now UP\n", ab_ahb-&gt;userpd_id);</div><div class='add'>+</div><div class='add'>+err_fw2:</div><div class='add'>+	release_firmware(fw2);</div><div class='add'>+err_fw:</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_power_down(struct ath12k_base *ab, bool is_suspend)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+	unsigned long time_left;</div><div class='add'>+	u32 pasid;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	qcom_smem_state_update_bits(ab_ahb-&gt;stop_state, BIT(ab_ahb-&gt;stop_bit),</div><div class='add'>+				    BIT(ab_ahb-&gt;stop_bit));</div><div class='add'>+</div><div class='add'>+	time_left = wait_for_completion_timeout(&amp;ab_ahb-&gt;userpd_stopped,</div><div class='add'>+						ATH12K_USERPD_STOP_TIMEOUT);</div><div class='add'>+	if (!time_left) {</div><div class='add'>+		ath12k_err(ab, "UserPD stop wait timed out\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qcom_smem_state_update_bits(ab_ahb-&gt;stop_state, BIT(ab_ahb-&gt;stop_bit), 0);</div><div class='add'>+</div><div class='add'>+	pasid = (u32_encode_bits(ab_ahb-&gt;userpd_id, ATH12K_USERPD_ID_MASK)) |</div><div class='add'>+		ATH12K_AHB_UPD_SWID;</div><div class='add'>+	/* Release the firmware */</div><div class='add'>+	ret = qcom_scm_pas_shutdown(pasid);</div><div class='add'>+	if (ret)</div><div class='add'>+		ath12k_err(ab, "scm pas shutdown failed for userPD%d: %d\n",</div><div class='add'>+			   ab_ahb-&gt;userpd_id, ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_qmi_ce_cfg *cfg = &amp;ab-&gt;qmi.ce_cfg;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;tgt_ce_len = ab-&gt;hw_params-&gt;target_ce_count;</div><div class='add'>+	cfg-&gt;tgt_ce = ab-&gt;hw_params-&gt;target_ce_config;</div><div class='add'>+	cfg-&gt;svc_to_ce_map_len = ab-&gt;hw_params-&gt;svc_to_ce_map_len;</div><div class='add'>+	cfg-&gt;svc_to_ce_map = ab-&gt;hw_params-&gt;svc_to_ce_map;</div><div class='add'>+	ab-&gt;qmi.service_ins_id = ab-&gt;hw_params-&gt;qmi_service_ins_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_ce_workqueue(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ce_pipe *ce_pipe = from_work(ce_pipe, work, intr_wq);</div><div class='add'>+</div><div class='add'>+	ath12k_ce_per_engine_service(ce_pipe-&gt;ab, ce_pipe-&gt;pipe_num);</div><div class='add'>+</div><div class='add'>+	ath12k_ahb_ce_irq_enable(ce_pipe-&gt;ab, ce_pipe-&gt;pipe_num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ath12k_ahb_ce_interrupt_handler(int irq, void *arg)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ce_pipe *ce_pipe = arg;</div><div class='add'>+</div><div class='add'>+	/* last interrupt received for this CE */</div><div class='add'>+	ce_pipe-&gt;timestamp = jiffies;</div><div class='add'>+</div><div class='add'>+	ath12k_ahb_ce_irq_disable(ce_pipe-&gt;ab, ce_pipe-&gt;pipe_num);</div><div class='add'>+</div><div class='add'>+	queue_work(system_bh_wq, &amp;ce_pipe-&gt;intr_wq);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_ext_grp_napi_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ext_irq_grp *irq_grp = container_of(napi,</div><div class='add'>+						struct ath12k_ext_irq_grp,</div><div class='add'>+						napi);</div><div class='add'>+	struct ath12k_base *ab = irq_grp-&gt;ab;</div><div class='add'>+	int work_done;</div><div class='add'>+</div><div class='add'>+	work_done = ath12k_dp_service_srng(ab, irq_grp, budget);</div><div class='add'>+	if (work_done &lt; budget) {</div><div class='add'>+		napi_complete_done(napi, work_done);</div><div class='add'>+		ath12k_ahb_ext_grp_enable(irq_grp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (work_done &gt; budget)</div><div class='add'>+		work_done = budget;</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ath12k_ahb_ext_interrupt_handler(int irq, void *arg)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ext_irq_grp *irq_grp = arg;</div><div class='add'>+</div><div class='add'>+	/* last interrupt received for this group */</div><div class='add'>+	irq_grp-&gt;timestamp = jiffies;</div><div class='add'>+</div><div class='add'>+	ath12k_ahb_ext_grp_disable(irq_grp);</div><div class='add'>+</div><div class='add'>+	napi_schedule(&amp;irq_grp-&gt;napi);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_config_ext_irq(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_hw_ring_mask *ring_mask;</div><div class='add'>+	struct ath12k_ext_irq_grp *irq_grp;</div><div class='add'>+	const struct hal_ops *hal_ops;</div><div class='add'>+	int i, j, irq, irq_idx, ret;</div><div class='add'>+	u32 num_irq;</div><div class='add'>+</div><div class='add'>+	ring_mask = ab-&gt;hw_params-&gt;ring_mask;</div><div class='add'>+	hal_ops = ab-&gt;hw_params-&gt;hal_ops;</div><div class='add'>+	for (i = 0; i &lt; ATH12K_EXT_IRQ_GRP_NUM_MAX; i++) {</div><div class='add'>+		irq_grp = &amp;ab-&gt;ext_irq_grp[i];</div><div class='add'>+		num_irq = 0;</div><div class='add'>+</div><div class='add'>+		irq_grp-&gt;ab = ab;</div><div class='add'>+		irq_grp-&gt;grp_id = i;</div><div class='add'>+</div><div class='add'>+		irq_grp-&gt;napi_ndev = alloc_netdev_dummy(0);</div><div class='add'>+		if (!irq_grp-&gt;napi_ndev)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		netif_napi_add(irq_grp-&gt;napi_ndev, &amp;irq_grp-&gt;napi,</div><div class='add'>+			       ath12k_ahb_ext_grp_napi_poll);</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; ATH12K_EXT_IRQ_NUM_MAX; j++) {</div><div class='add'>+			/* For TX ring, ensure that the ring mask and the</div><div class='add'>+			 * tcl_to_wbm_rbm_map point to the same ring number.</div><div class='add'>+			 */</div><div class='add'>+			if (ring_mask-&gt;tx[i] &amp;</div><div class='add'>+			    BIT(hal_ops-&gt;tcl_to_wbm_rbm_map[j].wbm_ring_num)) {</div><div class='add'>+				irq_grp-&gt;irqs[num_irq++] =</div><div class='add'>+					wbm2host_tx_completions_ring1 - j;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ring_mask-&gt;rx[i] &amp; BIT(j)) {</div><div class='add'>+				irq_grp-&gt;irqs[num_irq++] =</div><div class='add'>+					reo2host_destination_ring1 - j;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ring_mask-&gt;rx_err[i] &amp; BIT(j))</div><div class='add'>+				irq_grp-&gt;irqs[num_irq++] = reo2host_exception;</div><div class='add'>+</div><div class='add'>+			if (ring_mask-&gt;rx_wbm_rel[i] &amp; BIT(j))</div><div class='add'>+				irq_grp-&gt;irqs[num_irq++] = wbm2host_rx_release;</div><div class='add'>+</div><div class='add'>+			if (ring_mask-&gt;reo_status[i] &amp; BIT(j))</div><div class='add'>+				irq_grp-&gt;irqs[num_irq++] = reo2host_status;</div><div class='add'>+</div><div class='add'>+			if (ring_mask-&gt;rx_mon_dest[i] &amp; BIT(j))</div><div class='add'>+				irq_grp-&gt;irqs[num_irq++] =</div><div class='add'>+					rxdma2host_monitor_destination_mac1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		irq_grp-&gt;num_irq = num_irq;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; irq_grp-&gt;num_irq; j++) {</div><div class='add'>+			irq_idx = irq_grp-&gt;irqs[j];</div><div class='add'>+</div><div class='add'>+			irq = platform_get_irq_byname(ab-&gt;pdev,</div><div class='add'>+						      irq_name[irq_idx]);</div><div class='add'>+			ab-&gt;irq_num[irq_idx] = irq;</div><div class='add'>+			irq_set_status_flags(irq, IRQ_NOAUTOEN | IRQ_DISABLE_UNLAZY);</div><div class='add'>+			ret = devm_request_irq(ab-&gt;dev, irq,</div><div class='add'>+					       ath12k_ahb_ext_interrupt_handler,</div><div class='add'>+					       IRQF_TRIGGER_RISING,</div><div class='add'>+					       irq_name[irq_idx], irq_grp);</div><div class='add'>+			if (ret)</div><div class='add'>+				ath12k_warn(ab, "failed request_irq for %d\n", irq);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_config_irq(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int irq, irq_idx, i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Configure CE irqs */</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;hw_params-&gt;ce_count; i++) {</div><div class='add'>+		struct ath12k_ce_pipe *ce_pipe = &amp;ab-&gt;ce.ce_pipe[i];</div><div class='add'>+</div><div class='add'>+		if (ath12k_ce_get_attr_flags(ab, i) &amp; CE_ATTR_DIS_INTR)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		irq_idx = ATH12K_IRQ_CE0_OFFSET + i;</div><div class='add'>+</div><div class='add'>+		INIT_WORK(&amp;ce_pipe-&gt;intr_wq, ath12k_ahb_ce_workqueue);</div><div class='add'>+		irq = platform_get_irq_byname(ab-&gt;pdev, irq_name[irq_idx]);</div><div class='add'>+		ret = devm_request_irq(ab-&gt;dev, irq, ath12k_ahb_ce_interrupt_handler,</div><div class='add'>+				       IRQF_TRIGGER_RISING, irq_name[irq_idx],</div><div class='add'>+				       ce_pipe);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ab-&gt;irq_num[irq_idx] = irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure external interrupts */</div><div class='add'>+	ret = ath12k_ahb_config_ext_irq(ab);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_map_service_to_pipe(struct ath12k_base *ab, u16 service_id,</div><div class='add'>+					  u8 *ul_pipe, u8 *dl_pipe)</div><div class='add'>+{</div><div class='add'>+	const struct service_to_pipe *entry;</div><div class='add'>+	bool ul_set = false, dl_set = false;</div><div class='add'>+	u32 pipedir;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;hw_params-&gt;svc_to_ce_map_len; i++) {</div><div class='add'>+		entry = &amp;ab-&gt;hw_params-&gt;svc_to_ce_map[i];</div><div class='add'>+</div><div class='add'>+		if (__le32_to_cpu(entry-&gt;service_id) != service_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pipedir = __le32_to_cpu(entry-&gt;pipedir);</div><div class='add'>+		if (pipedir == PIPEDIR_IN || pipedir == PIPEDIR_INOUT) {</div><div class='add'>+			WARN_ON(dl_set);</div><div class='add'>+			*dl_pipe = __le32_to_cpu(entry-&gt;pipenum);</div><div class='add'>+			dl_set = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pipedir == PIPEDIR_OUT || pipedir == PIPEDIR_INOUT) {</div><div class='add'>+			WARN_ON(ul_set);</div><div class='add'>+			*ul_pipe = __le32_to_cpu(entry-&gt;pipenum);</div><div class='add'>+			ul_set = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!ul_set || !dl_set))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ath12k_hif_ops ath12k_ahb_hif_ops_ipq5332 = {</div><div class='add'>+	.start = ath12k_ahb_start,</div><div class='add'>+	.stop = ath12k_ahb_stop,</div><div class='add'>+	.read32 = ath12k_ahb_read32,</div><div class='add'>+	.write32 = ath12k_ahb_write32,</div><div class='add'>+	.irq_enable = ath12k_ahb_ext_irq_enable,</div><div class='add'>+	.irq_disable = ath12k_ahb_ext_irq_disable,</div><div class='add'>+	.map_service_to_pipe = ath12k_ahb_map_service_to_pipe,</div><div class='add'>+	.power_up = ath12k_ahb_power_up,</div><div class='add'>+	.power_down = ath12k_ahb_power_down,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static irqreturn_t ath12k_userpd_irq_handler(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab = data;</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+</div><div class='add'>+	if (irq == ab_ahb-&gt;userpd_irq_num[ATH12K_USERPD_SPAWN_IRQ]) {</div><div class='add'>+		complete(&amp;ab_ahb-&gt;userpd_spawned);</div><div class='add'>+	} else if (irq == ab_ahb-&gt;userpd_irq_num[ATH12K_USERPD_READY_IRQ]) {</div><div class='add'>+		complete(&amp;ab_ahb-&gt;userpd_ready);</div><div class='add'>+	} else if (irq == ab_ahb-&gt;userpd_irq_num[ATH12K_USERPD_STOP_ACK_IRQ])	{</div><div class='add'>+		complete(&amp;ab_ahb-&gt;userpd_stopped);</div><div class='add'>+	} else {</div><div class='add'>+		ath12k_err(ab, "Invalid userpd interrupt\n");</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_config_rproc_irq(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+	int i, ret;</div><div class='add'>+	char *upd_irq_name;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ATH12K_USERPD_MAX_IRQ; i++) {</div><div class='add'>+		ab_ahb-&gt;userpd_irq_num[i] = platform_get_irq_byname(ab-&gt;pdev,</div><div class='add'>+								    ath12k_userpd_irq[i]);</div><div class='add'>+		if (ab_ahb-&gt;userpd_irq_num[i] &lt; 0)</div><div class='add'>+			return ab_ahb-&gt;userpd_irq_num[i];</div><div class='add'>+</div><div class='add'>+		upd_irq_name = devm_kzalloc(&amp;ab-&gt;pdev-&gt;dev, ATH12K_UPD_IRQ_WRD_LEN,</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+		if (!upd_irq_name)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		scnprintf(upd_irq_name, ATH12K_UPD_IRQ_WRD_LEN, "UserPD%u-%s",</div><div class='add'>+			  ab_ahb-&gt;userpd_id, ath12k_userpd_irq[i]);</div><div class='add'>+		ret = devm_request_threaded_irq(&amp;ab-&gt;pdev-&gt;dev, ab_ahb-&gt;userpd_irq_num[i],</div><div class='add'>+						NULL, ath12k_userpd_irq_handler,</div><div class='add'>+						IRQF_TRIGGER_RISING | IRQF_ONESHOT,</div><div class='add'>+						upd_irq_name, ab);</div><div class='add'>+		if (ret)</div><div class='add'>+			return dev_err_probe(&amp;ab-&gt;pdev-&gt;dev, ret,</div><div class='add'>+					     "Request %s irq failed: %d\n",</div><div class='add'>+					     ath12k_userpd_irq[i], ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab_ahb-&gt;spawn_state = devm_qcom_smem_state_get(&amp;ab-&gt;pdev-&gt;dev, "spawn",</div><div class='add'>+						       &amp;ab_ahb-&gt;spawn_bit);</div><div class='add'>+	if (IS_ERR(ab_ahb-&gt;spawn_state))</div><div class='add'>+		return dev_err_probe(&amp;ab-&gt;pdev-&gt;dev, PTR_ERR(ab_ahb-&gt;spawn_state),</div><div class='add'>+				     "Failed to acquire spawn state\n");</div><div class='add'>+</div><div class='add'>+	ab_ahb-&gt;stop_state = devm_qcom_smem_state_get(&amp;ab-&gt;pdev-&gt;dev, "stop",</div><div class='add'>+						      &amp;ab_ahb-&gt;stop_bit);</div><div class='add'>+	if (IS_ERR(ab_ahb-&gt;stop_state))</div><div class='add'>+		return dev_err_probe(&amp;ab-&gt;pdev-&gt;dev, PTR_ERR(ab_ahb-&gt;stop_state),</div><div class='add'>+				     "Failed to acquire stop state\n");</div><div class='add'>+</div><div class='add'>+	init_completion(&amp;ab_ahb-&gt;userpd_spawned);</div><div class='add'>+	init_completion(&amp;ab_ahb-&gt;userpd_ready);</div><div class='add'>+	init_completion(&amp;ab_ahb-&gt;userpd_stopped);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_root_pd_state_notifier(struct notifier_block *nb,</div><div class='add'>+					     const unsigned long event, void *data)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = container_of(nb, struct ath12k_ahb, root_pd_nb);</div><div class='add'>+	struct ath12k_base *ab = ab_ahb-&gt;ab;</div><div class='add'>+</div><div class='add'>+	if (event == ATH12K_RPROC_AFTER_POWERUP) {</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_AHB, "Root PD is UP\n");</div><div class='add'>+		complete(&amp;ab_ahb-&gt;rootpd_ready);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_register_rproc_notifier(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+</div><div class='add'>+	ab_ahb-&gt;root_pd_nb.notifier_call = ath12k_ahb_root_pd_state_notifier;</div><div class='add'>+	init_completion(&amp;ab_ahb-&gt;rootpd_ready);</div><div class='add'>+</div><div class='add'>+	ab_ahb-&gt;root_pd_notifier = qcom_register_ssr_notifier(ab_ahb-&gt;tgt_rproc-&gt;name,</div><div class='add'>+							      &amp;ab_ahb-&gt;root_pd_nb);</div><div class='add'>+	if (IS_ERR(ab_ahb-&gt;root_pd_notifier))</div><div class='add'>+		return PTR_ERR(ab_ahb-&gt;root_pd_notifier);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_unregister_rproc_notifier(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+</div><div class='add'>+	if (!ab_ahb-&gt;root_pd_notifier) {</div><div class='add'>+		ath12k_err(ab, "Rproc notifier not registered\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qcom_unregister_ssr_notifier(ab_ahb-&gt;root_pd_notifier,</div><div class='add'>+				     &amp;ab_ahb-&gt;root_pd_nb);</div><div class='add'>+	ab_ahb-&gt;root_pd_notifier = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_get_rproc(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+	struct device *dev = ab-&gt;dev;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct rproc *prproc;</div><div class='add'>+</div><div class='add'>+	np = of_parse_phandle(dev-&gt;of_node, "qcom,rproc", 0);</div><div class='add'>+	if (!np) {</div><div class='add'>+		ath12k_err(ab, "failed to get q6_rproc handle\n");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	prproc = rproc_get_by_phandle(np-&gt;phandle);</div><div class='add'>+	of_node_put(np);</div><div class='add'>+	if (!prproc)</div><div class='add'>+		return dev_err_probe(&amp;ab-&gt;pdev-&gt;dev, -EPROBE_DEFER,</div><div class='add'>+				     "failed to get rproc\n");</div><div class='add'>+</div><div class='add'>+	ab_ahb-&gt;tgt_rproc = prproc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_boot_root_pd(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+	unsigned long time_left;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = rproc_boot(ab_ahb-&gt;tgt_rproc);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		ath12k_err(ab, "RootPD boot failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	time_left = wait_for_completion_timeout(&amp;ab_ahb-&gt;rootpd_ready,</div><div class='add'>+						ATH12K_ROOTPD_READY_TIMEOUT);</div><div class='add'>+	if (!time_left) {</div><div class='add'>+		ath12k_err(ab, "RootPD ready wait timed out\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_configure_rproc(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_ahb_get_rproc(ab);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_ahb_register_rproc_notifier(ab);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		ret = dev_err_probe(&amp;ab-&gt;pdev-&gt;dev, ret,</div><div class='add'>+				    "failed to register rproc notifier\n");</div><div class='add'>+		goto err_put_rproc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ab_ahb-&gt;tgt_rproc-&gt;state != RPROC_RUNNING) {</div><div class='add'>+		ret = ath12k_ahb_boot_root_pd(ab);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			ath12k_err(ab, "failed to boot the remote processor Q6\n");</div><div class='add'>+			goto err_unreg_notifier;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ath12k_ahb_config_rproc_irq(ab);</div><div class='add'>+</div><div class='add'>+err_unreg_notifier:</div><div class='add'>+	ath12k_ahb_unregister_rproc_notifier(ab);</div><div class='add'>+</div><div class='add'>+err_put_rproc:</div><div class='add'>+	rproc_put(ab_ahb-&gt;tgt_rproc);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_deconfigure_rproc(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+</div><div class='add'>+	ath12k_ahb_unregister_rproc_notifier(ab);</div><div class='add'>+	rproc_put(ab_ahb-&gt;tgt_rproc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_resource_init(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+	struct platform_device *pdev = ab-&gt;pdev;</div><div class='add'>+	struct resource *mem_res;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ab-&gt;mem = devm_platform_get_and_ioremap_resource(pdev, 0, &amp;mem_res);</div><div class='add'>+	if (IS_ERR(ab-&gt;mem)) {</div><div class='add'>+		ret = dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(ab-&gt;mem), "ioremap error\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab-&gt;mem_len = resource_size(mem_res);</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;hw_params-&gt;ce_remap) {</div><div class='add'>+		const struct ce_remap *ce_remap = ab-&gt;hw_params-&gt;ce_remap;</div><div class='add'>+		/* CE register space is moved out of WCSS and the space is not</div><div class='add'>+		 * contiguous, hence remapping the CE registers to a new space</div><div class='add'>+		 * for accessing them.</div><div class='add'>+		 */</div><div class='add'>+		ab-&gt;mem_ce = ioremap(ce_remap-&gt;base, ce_remap-&gt;size);</div><div class='add'>+		if (!ab-&gt;mem_ce) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "ce ioremap error\n");</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err_mem_unmap;</div><div class='add'>+		}</div><div class='add'>+		ab-&gt;ce_remap = true;</div><div class='add'>+		ab-&gt;ce_remap_base_addr = HAL_IPQ5332_CE_WFSS_REG_BASE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab_ahb-&gt;xo_clk = devm_clk_get(ab-&gt;dev, "xo");</div><div class='add'>+	if (IS_ERR(ab_ahb-&gt;xo_clk)) {</div><div class='add'>+		ret = dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(ab_ahb-&gt;xo_clk),</div><div class='add'>+				    "failed to get xo clock\n");</div><div class='add'>+		goto err_mem_ce_unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare_enable(ab_ahb-&gt;xo_clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to enable gcc_xo_clk: %d\n", ret);</div><div class='add'>+		goto err_clock_deinit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_clock_deinit:</div><div class='add'>+	devm_clk_put(ab-&gt;dev, ab_ahb-&gt;xo_clk);</div><div class='add'>+</div><div class='add'>+err_mem_ce_unmap:</div><div class='add'>+	ab_ahb-&gt;xo_clk = NULL;</div><div class='add'>+	if (ab-&gt;hw_params-&gt;ce_remap)</div><div class='add'>+		iounmap(ab-&gt;mem_ce);</div><div class='add'>+</div><div class='add'>+err_mem_unmap:</div><div class='add'>+	ab-&gt;mem_ce = NULL;</div><div class='add'>+	devm_iounmap(ab-&gt;dev, ab-&gt;mem);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	ab-&gt;mem = NULL;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_resource_deinit(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_ahb *ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;mem)</div><div class='add'>+		devm_iounmap(ab-&gt;dev, ab-&gt;mem);</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;mem_ce)</div><div class='add'>+		iounmap(ab-&gt;mem_ce);</div><div class='add'>+</div><div class='add'>+	ab-&gt;mem = NULL;</div><div class='add'>+	ab-&gt;mem_ce = NULL;</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(ab_ahb-&gt;xo_clk);</div><div class='add'>+	devm_clk_put(ab-&gt;dev, ab_ahb-&gt;xo_clk);</div><div class='add'>+	ab_ahb-&gt;xo_clk = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_ahb_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab;</div><div class='add'>+	const struct ath12k_hif_ops *hif_ops;</div><div class='add'>+	struct ath12k_ahb *ab_ahb;</div><div class='add'>+	enum ath12k_hw_rev hw_rev;</div><div class='add'>+	u32 addr, userpd_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(32));</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to set 32-bit coherent dma\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab = ath12k_core_alloc(&amp;pdev-&gt;dev, sizeof(struct ath12k_ahb),</div><div class='add'>+			       ATH12K_BUS_AHB);</div><div class='add'>+	if (!ab)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hw_rev = (enum ath12k_hw_rev)(kernel_ulong_t)of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	switch (hw_rev) {</div><div class='add'>+	case ATH12K_HW_IPQ5332_HW10:</div><div class='add'>+		hif_ops = &amp;ath12k_ahb_hif_ops_ipq5332;</div><div class='add'>+		userpd_id = ATH12K_IPQ5332_USERPD_ID;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		goto err_core_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab-&gt;hif.ops = hif_ops;</div><div class='add'>+	ab-&gt;pdev = pdev;</div><div class='add'>+	ab-&gt;hw_rev = hw_rev;</div><div class='add'>+	ab-&gt;target_mem_mode = ATH12K_QMI_MEMORY_MODE_DEFAULT;</div><div class='add'>+	platform_set_drvdata(pdev, ab);</div><div class='add'>+	ab_ahb = ath12k_ab_to_ahb(ab);</div><div class='add'>+	ab_ahb-&gt;ab = ab;</div><div class='add'>+	ab_ahb-&gt;userpd_id = userpd_id;</div><div class='add'>+</div><div class='add'>+	/* Set fixed_mem_region to true for platforms that support fixed memory</div><div class='add'>+	 * reservation from DT. If memory is reserved from DT for FW, ath12k driver</div><div class='add'>+	 * need not to allocate memory.</div><div class='add'>+	 */</div><div class='add'>+	if (!of_property_read_u32(ab-&gt;dev-&gt;of_node, "memory-region", &amp;addr))</div><div class='add'>+		set_bit(ATH12K_FLAG_FIXED_MEM_REGION, &amp;ab-&gt;dev_flags);</div><div class='add'>+</div><div class='add'>+	ret = ath12k_core_pre_init(ab);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_core_free;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_ahb_resource_init(ab);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_core_free;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_hal_srng_init(ab);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_resource_deinit;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_ce_alloc_pipes(ab);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_err(ab, "failed to allocate ce pipes: %d\n", ret);</div><div class='add'>+		goto err_hal_srng_deinit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath12k_ahb_init_qmi_ce_config(ab);</div><div class='add'>+</div><div class='add'>+	ret = ath12k_ahb_configure_rproc(ab);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_ce_free;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_ahb_config_irq(ab);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_err(ab, "failed to configure irq: %d\n", ret);</div><div class='add'>+		goto err_rproc_deconfigure;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ath12k_core_init(ab);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_err(ab, "failed to init core: %d\n", ret);</div><div class='add'>+		goto err_rproc_deconfigure;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_rproc_deconfigure:</div><div class='add'>+	ath12k_ahb_deconfigure_rproc(ab);</div><div class='add'>+</div><div class='add'>+err_ce_free:</div><div class='add'>+	ath12k_ce_free_pipes(ab);</div><div class='add'>+</div><div class='add'>+err_hal_srng_deinit:</div><div class='add'>+	ath12k_hal_srng_deinit(ab);</div><div class='add'>+</div><div class='add'>+err_resource_deinit:</div><div class='add'>+	ath12k_ahb_resource_deinit(ab);</div><div class='add'>+</div><div class='add'>+err_core_free:</div><div class='add'>+	ath12k_core_free(ab);</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_remove_prepare(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	unsigned long left;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ATH12K_FLAG_RECOVERY, &amp;ab-&gt;dev_flags)) {</div><div class='add'>+		left = wait_for_completion_timeout(&amp;ab-&gt;driver_recovery,</div><div class='add'>+						   ATH12K_AHB_RECOVERY_TIMEOUT);</div><div class='add'>+		if (!left)</div><div class='add'>+			ath12k_warn(ab, "failed to receive recovery response completion\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_bit(ATH12K_FLAG_UNREGISTERING, &amp;ab-&gt;dev_flags);</div><div class='add'>+	cancel_work_sync(&amp;ab-&gt;restart_work);</div><div class='add'>+	cancel_work_sync(&amp;ab-&gt;qmi.event_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_free_resources(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = ab-&gt;pdev;</div><div class='add'>+</div><div class='add'>+	ath12k_hal_srng_deinit(ab);</div><div class='add'>+	ath12k_ce_free_pipes(ab);</div><div class='add'>+	ath12k_ahb_resource_deinit(ab);</div><div class='add'>+	ath12k_ahb_deconfigure_rproc(ab);</div><div class='add'>+	ath12k_core_free(ab);</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_ahb_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (test_bit(ATH12K_FLAG_QMI_FAIL, &amp;ab-&gt;dev_flags)) {</div><div class='add'>+		ath12k_ahb_power_down(ab, false);</div><div class='add'>+		goto qmi_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath12k_ahb_remove_prepare(ab);</div><div class='add'>+	ath12k_core_hw_group_cleanup(ab-&gt;ag);</div><div class='add'>+qmi_fail:</div><div class='add'>+	ath12k_core_deinit(ab);</div><div class='add'>+	ath12k_ahb_free_resources(ab);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver ath12k_ahb_driver = {</div><div class='add'>+	.driver         = {</div><div class='add'>+		.name   = "ath12k_ahb",</div><div class='add'>+		.of_match_table = ath12k_ahb_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe  = ath12k_ahb_probe,</div><div class='add'>+	.remove = ath12k_ahb_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ath12k_ahb_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;ath12k_ahb_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_ahb_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;ath12k_ahb_driver);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/ahb.h b/drivers/net/wireless/ath/ath12k/ahb.h<br/>new file mode 100644<br/>index 000000000000..d56244b20a6a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/ahb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/ahb.h</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+/* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2022-2025, Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#ifndef ATH12K_AHB_H</div><div class='add'>+#define ATH12K_AHB_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/remoteproc/qcom_rproc.h&gt;</div><div class='add'>+#include "core.h"</div><div class='add'>+</div><div class='add'>+#define ATH12K_AHB_RECOVERY_TIMEOUT (3 * HZ)</div><div class='add'>+</div><div class='add'>+#define ATH12K_AHB_SMP2P_SMEM_MSG		GENMASK(15, 0)</div><div class='add'>+#define ATH12K_AHB_SMP2P_SMEM_SEQ_NO		GENMASK(31, 16)</div><div class='add'>+#define ATH12K_AHB_SMP2P_SMEM_VALUE_MASK	0xFFFFFFFF</div><div class='add'>+#define ATH12K_PCI_CE_WAKE_IRQ			2</div><div class='add'>+#define ATH12K_PCI_IRQ_CE0_OFFSET		3</div><div class='add'>+#define ATH12K_ROOTPD_READY_TIMEOUT		(5 * HZ)</div><div class='add'>+#define ATH12K_RPROC_AFTER_POWERUP		QCOM_SSR_AFTER_POWERUP</div><div class='add'>+#define ATH12K_AHB_FW_PREFIX			"q6_fw"</div><div class='add'>+#define ATH12K_AHB_FW_SUFFIX			".mdt"</div><div class='add'>+#define ATH12K_AHB_FW2				"iu_fw.mdt"</div><div class='add'>+#define ATH12K_AHB_UPD_SWID			0x12</div><div class='add'>+#define ATH12K_USERPD_SPAWN_TIMEOUT		(5 * HZ)</div><div class='add'>+#define ATH12K_USERPD_READY_TIMEOUT		(10 * HZ)</div><div class='add'>+#define ATH12K_USERPD_STOP_TIMEOUT		(5 * HZ)</div><div class='add'>+#define ATH12K_USERPD_ID_MASK			GENMASK(9, 8)</div><div class='add'>+#define ATH12K_USERPD_FW_NAME_LEN		35</div><div class='add'>+</div><div class='add'>+enum ath12k_ahb_smp2p_msg_id {</div><div class='add'>+	ATH12K_AHB_POWER_SAVE_ENTER = 1,</div><div class='add'>+	ATH12K_AHB_POWER_SAVE_EXIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ath12k_ahb_userpd_irq {</div><div class='add'>+	ATH12K_USERPD_SPAWN_IRQ,</div><div class='add'>+	ATH12K_USERPD_READY_IRQ,</div><div class='add'>+	ATH12K_USERPD_STOP_ACK_IRQ,</div><div class='add'>+	ATH12K_USERPD_MAX_IRQ,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath12k_base;</div><div class='add'>+</div><div class='add'>+struct ath12k_ahb {</div><div class='add'>+	struct ath12k_base *ab;</div><div class='add'>+	struct rproc *tgt_rproc;</div><div class='add'>+	struct clk *xo_clk;</div><div class='add'>+	struct completion rootpd_ready;</div><div class='add'>+	struct notifier_block root_pd_nb;</div><div class='add'>+	void *root_pd_notifier;</div><div class='add'>+	struct qcom_smem_state *spawn_state;</div><div class='add'>+	struct qcom_smem_state *stop_state;</div><div class='add'>+	struct completion userpd_spawned;</div><div class='add'>+	struct completion userpd_ready;</div><div class='add'>+	struct completion userpd_stopped;</div><div class='add'>+	u32 userpd_id;</div><div class='add'>+	u32 spawn_bit;</div><div class='add'>+	u32 stop_bit;</div><div class='add'>+	int userpd_irq_num[ATH12K_USERPD_MAX_IRQ];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct ath12k_ahb *ath12k_ab_to_ahb(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	return (struct ath12k_ahb *)ab-&gt;drv_priv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ATH12K_AHB</div><div class='add'>+int ath12k_ahb_init(void);</div><div class='add'>+void ath12k_ahb_exit(void);</div><div class='add'>+#else</div><div class='add'>+static inline int ath12k_ahb_init(void)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath12k_ahb_exit(void) {};</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/ce.c b/drivers/net/wireless/ath/ath12k/ce.c<br/>index be0d669d31fc..9a63608838ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/ce.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/ce.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/ce.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/ce.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "dp_rx.h"</div><div class='hunk'>@@ -219,6 +219,96 @@ const struct ce_attr ath12k_host_ce_config_wcn7850[] = {</div><div class='ctx'> </div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+const struct ce_attr ath12k_host_ce_config_ipq5332[] = {</div><div class='add'>+	/* CE0: host-&gt;target HTC control and raw streams */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS,</div><div class='add'>+		.src_nentries = 16,</div><div class='add'>+		.src_sz_max = 2048,</div><div class='add'>+		.dest_nentries = 0,</div><div class='add'>+	},</div><div class='add'>+	/* CE1: target-&gt;host HTT + HTC control */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS,</div><div class='add'>+		.src_nentries = 0,</div><div class='add'>+		.src_sz_max = 2048,</div><div class='add'>+		.dest_nentries = 512,</div><div class='add'>+		.recv_cb = ath12k_htc_rx_completion_handler,</div><div class='add'>+	},</div><div class='add'>+	/* CE2: target-&gt;host WMI */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS,</div><div class='add'>+		.src_nentries = 0,</div><div class='add'>+		.src_sz_max = 2048,</div><div class='add'>+		.dest_nentries = 128,</div><div class='add'>+		.recv_cb = ath12k_htc_rx_completion_handler,</div><div class='add'>+	},</div><div class='add'>+	/* CE3: host-&gt;target WMI */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS,</div><div class='add'>+		.src_nentries = 32,</div><div class='add'>+		.src_sz_max = 2048,</div><div class='add'>+		.dest_nentries = 0,</div><div class='add'>+	},</div><div class='add'>+	/* CE4: host-&gt;target HTT */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,</div><div class='add'>+		.src_nentries = 2048,</div><div class='add'>+		.src_sz_max = 256,</div><div class='add'>+		.dest_nentries = 0,</div><div class='add'>+	},</div><div class='add'>+	/* CE5: target -&gt; host PKTLOG */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS,</div><div class='add'>+		.src_nentries = 0,</div><div class='add'>+		.src_sz_max = 2048,</div><div class='add'>+		.dest_nentries = 512,</div><div class='add'>+		.recv_cb = ath12k_dp_htt_htc_t2h_msg_handler,</div><div class='add'>+	},</div><div class='add'>+	/* CE6: Target autonomous HIF_memcpy */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,</div><div class='add'>+		.src_nentries = 0,</div><div class='add'>+		.src_sz_max = 0,</div><div class='add'>+		.dest_nentries = 0,</div><div class='add'>+	},</div><div class='add'>+	/* CE7: CV Prefetch */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,</div><div class='add'>+		.src_nentries = 0,</div><div class='add'>+		.src_sz_max = 0,</div><div class='add'>+		.dest_nentries = 0,</div><div class='add'>+	},</div><div class='add'>+	/* CE8: Target HIF memcpy (Generic HIF memcypy) */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,</div><div class='add'>+		.src_nentries = 0,</div><div class='add'>+		.src_sz_max = 0,</div><div class='add'>+		.dest_nentries = 0,</div><div class='add'>+	},</div><div class='add'>+	/* CE9: WMI logging/CFR/Spectral/Radar */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS,</div><div class='add'>+		.src_nentries = 0,</div><div class='add'>+		.src_sz_max = 2048,</div><div class='add'>+		.dest_nentries = 128,</div><div class='add'>+	},</div><div class='add'>+	/* CE10: Unused */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,</div><div class='add'>+		.src_nentries = 0,</div><div class='add'>+		.src_sz_max = 0,</div><div class='add'>+		.dest_nentries = 0,</div><div class='add'>+	},</div><div class='add'>+	/* CE11: Unused */</div><div class='add'>+	{</div><div class='add'>+		.flags = CE_ATTR_FLAGS | CE_ATTR_DIS_INTR,</div><div class='add'>+		.src_nentries = 0,</div><div class='add'>+		.src_sz_max = 0,</div><div class='add'>+		.dest_nentries = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int ath12k_ce_rx_buf_enqueue_pipe(struct ath12k_ce_pipe *pipe,</div><div class='ctx'> 					 struct sk_buff *skb, dma_addr_t paddr)</div><div class='ctx'> {</div><div class='hunk'>@@ -302,7 +392,8 @@ static int ath12k_ce_rx_post_pipe(struct ath12k_ce_pipe *pipe)</div><div class='ctx'> </div><div class='ctx'> 		ret = ath12k_ce_rx_buf_enqueue_pipe(pipe, skb, paddr);</div><div class='ctx'> 		if (ret) {</div><div class='del'>-			ath12k_warn(ab, "failed to enqueue rx buf: %d\n", ret);</div><div class='add'>+			ath12k_dbg(ab, ATH12K_DBG_CE, "failed to enqueue rx buf: %d\n",</div><div class='add'>+				   ret);</div><div class='ctx'> 			dma_unmap_single(ab-&gt;dev, paddr,</div><div class='ctx'> 					 skb-&gt;len + skb_tailroom(skb),</div><div class='ctx'> 					 DMA_FROM_DEVICE);</div><div class='hunk'>@@ -344,10 +435,6 @@ static int ath12k_ce_completed_recv_next(struct ath12k_ce_pipe *pipe,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	*nbytes = ath12k_hal_ce_dst_status_get_length(desc);</div><div class='del'>-	if (*nbytes == 0) {</div><div class='del'>-		ret = -EIO;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	*skb = pipe-&gt;dest_ring-&gt;skb[sw_index];</div><div class='ctx'> 	pipe-&gt;dest_ring-&gt;skb[sw_index] = NULL;</div><div class='hunk'>@@ -380,8 +467,8 @@ static void ath12k_ce_recv_process_cb(struct ath12k_ce_pipe *pipe)</div><div class='ctx'> 		dma_unmap_single(ab-&gt;dev, ATH12K_SKB_RXCB(skb)-&gt;paddr,</div><div class='ctx'> 				 max_nbytes, DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='del'>-		if (unlikely(max_nbytes &lt; nbytes)) {</div><div class='del'>-			ath12k_warn(ab, "rxed more than expected (nbytes %d, max %d)",</div><div class='add'>+		if (unlikely(max_nbytes &lt; nbytes || nbytes == 0)) {</div><div class='add'>+			ath12k_warn(ab, "unexpected rx length (nbytes %d, max %d)",</div><div class='ctx'> 				    nbytes, max_nbytes);</div><div class='ctx'> 			dev_kfree_skb_any(skb);</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -392,7 +479,7 @@ static void ath12k_ce_recv_process_cb(struct ath12k_ce_pipe *pipe)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	while ((skb = __skb_dequeue(&amp;list))) {</div><div class='del'>-		ath12k_dbg(ab, ATH12K_DBG_AHB, "rx ce pipe %d len %d\n",</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_CE, "rx ce pipe %d len %d\n",</div><div class='ctx'> 			   pipe-&gt;pipe_num, skb-&gt;len);</div><div class='ctx'> 		pipe-&gt;recv_cb(ab, skb);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -492,7 +579,7 @@ static int ath12k_ce_init_ring(struct ath12k_base *ab,</div><div class='ctx'> 			       struct ath12k_ce_ring *ce_ring,</div><div class='ctx'> 			       int ce_id, enum hal_ring_type type)</div><div class='ctx'> {</div><div class='del'>-	struct hal_srng_params params = { 0 };</div><div class='add'>+	struct hal_srng_params params = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	params.ring_base_paddr = ce_ring-&gt;base_addr_ce_space;</div><div class='hunk'>@@ -779,7 +866,7 @@ void ath12k_ce_rx_post_buf(struct ath12k_base *ab)</div><div class='ctx'> </div><div class='ctx'> void ath12k_ce_rx_replenish_retry(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct ath12k_base *ab = from_timer(ab, t, rx_replenish_retry);</div><div class='add'>+	struct ath12k_base *ab = timer_container_of(ab, t, rx_replenish_retry);</div><div class='ctx'> </div><div class='ctx'> 	ath12k_ce_rx_post_buf(ab);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/ce.h b/drivers/net/wireless/ath/ath12k/ce.h<br/>index 857bc5f9e946..57f75899ee03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/ce.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/ce.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/ce.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/ce.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef ATH12K_CE_H</div><div class='hunk'>@@ -39,8 +39,8 @@</div><div class='ctx'> #define PIPEDIR_INOUT_H2H	4 /* bidirectional, host to host */</div><div class='ctx'> </div><div class='ctx'> /* CE address/mask */</div><div class='del'>-#define CE_HOST_IE_ADDRESS	0x00A1803C</div><div class='del'>-#define CE_HOST_IE_2_ADDRESS	0x00A18040</div><div class='add'>+#define CE_HOST_IE_ADDRESS	0x75804C</div><div class='add'>+#define CE_HOST_IE_2_ADDRESS	0x758050</div><div class='ctx'> #define CE_HOST_IE_3_ADDRESS	CE_HOST_IE_ADDRESS</div><div class='ctx'> </div><div class='ctx'> #define CE_HOST_IE_3_SHIFT	0xC</div><div class='hunk'>@@ -76,6 +76,17 @@ struct ce_pipe_config {</div><div class='ctx'> 	__le32 reserved;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ce_ie_addr {</div><div class='add'>+	u32 ie1_reg_addr;</div><div class='add'>+	u32 ie2_reg_addr;</div><div class='add'>+	u32 ie3_reg_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ce_remap {</div><div class='add'>+	u32 base;</div><div class='add'>+	u32 size;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ce_attr {</div><div class='ctx'> 	/* CE_ATTR_* values */</div><div class='ctx'> 	unsigned int flags;</div><div class='hunk'>@@ -148,7 +159,7 @@ struct ath12k_ce_pipe {</div><div class='ctx'> 	void (*send_cb)(struct ath12k_ce_pipe *pipe);</div><div class='ctx'> 	void (*recv_cb)(struct ath12k_base *ab, struct sk_buff *skb);</div><div class='ctx'> </div><div class='del'>-	struct tasklet_struct intr_tq;</div><div class='add'>+	struct work_struct intr_wq;</div><div class='ctx'> 	struct ath12k_ce_ring *src_ring;</div><div class='ctx'> 	struct ath12k_ce_ring *dest_ring;</div><div class='ctx'> 	struct ath12k_ce_ring *status_ring;</div><div class='hunk'>@@ -164,6 +175,7 @@ struct ath12k_ce {</div><div class='ctx'> </div><div class='ctx'> extern const struct ce_attr ath12k_host_ce_config_qcn9274[];</div><div class='ctx'> extern const struct ce_attr ath12k_host_ce_config_wcn7850[];</div><div class='add'>+extern const struct ce_attr ath12k_host_ce_config_ipq5332[];</div><div class='ctx'> </div><div class='ctx'> void ath12k_ce_cleanup_pipes(struct ath12k_base *ab);</div><div class='ctx'> void ath12k_ce_rx_replenish_retry(struct timer_list *t);</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/core.c b/drivers/net/wireless/ath/ath12k/core.c<br/>index 51252e8bc1ae..cc352eef1939 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/core.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/core.c</a></div><div class='hunk'>@@ -1,27 +1,71 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/remoteproc.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_graph.h&gt;</div><div class='add'>+#include "ahb.h"</div><div class='ctx'> #include "core.h"</div><div class='ctx'> #include "dp_tx.h"</div><div class='ctx'> #include "dp_rx.h"</div><div class='ctx'> #include "debug.h"</div><div class='del'>-#include "hif.h"</div><div class='del'>-#include "fw.h"</div><div class='ctx'> #include "debugfs.h"</div><div class='add'>+#include "fw.h"</div><div class='add'>+#include "hif.h"</div><div class='add'>+#include "pci.h"</div><div class='ctx'> #include "wow.h"</div><div class='ctx'> </div><div class='add'>+static int ahb_err, pci_err;</div><div class='ctx'> unsigned int ath12k_debug_mask;</div><div class='ctx'> module_param_named(debug_mask, ath12k_debug_mask, uint, 0644);</div><div class='ctx'> MODULE_PARM_DESC(debug_mask, "Debugging mask");</div><div class='ctx'> </div><div class='add'>+bool ath12k_ftm_mode;</div><div class='add'>+module_param_named(ftm_mode, ath12k_ftm_mode, bool, 0444);</div><div class='add'>+MODULE_PARM_DESC(ftm_mode, "Boots up in factory test mode");</div><div class='add'>+</div><div class='add'>+/* protected with ath12k_hw_group_mutex */</div><div class='add'>+static struct list_head ath12k_hw_group_list = LIST_HEAD_INIT(ath12k_hw_group_list);</div><div class='add'>+</div><div class='add'>+static DEFINE_MUTEX(ath12k_hw_group_mutex);</div><div class='add'>+</div><div class='add'>+static const struct</div><div class='add'>+ath12k_mem_profile_based_param ath12k_mem_profile_based_param[] = {</div><div class='add'>+[ATH12K_QMI_MEMORY_MODE_DEFAULT] = {</div><div class='add'>+		.num_vdevs = 17,</div><div class='add'>+		.max_client_single = 512,</div><div class='add'>+		.max_client_dbs = 128,</div><div class='add'>+		.max_client_dbs_sbs = 128,</div><div class='add'>+		.dp_params = {</div><div class='add'>+			.tx_comp_ring_size = 32768,</div><div class='add'>+			.rxdma_monitor_buf_ring_size = 4096,</div><div class='add'>+			.rxdma_monitor_dst_ring_size = 8092,</div><div class='add'>+			.num_pool_tx_desc = 32768,</div><div class='add'>+			.rx_desc_count = 12288,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+[ATH12K_QMI_MEMORY_MODE_LOW_512_M] = {</div><div class='add'>+		.num_vdevs = 9,</div><div class='add'>+		.max_client_single = 128,</div><div class='add'>+		.max_client_dbs = 64,</div><div class='add'>+		.max_client_dbs_sbs = 64,</div><div class='add'>+		.dp_params = {</div><div class='add'>+			.tx_comp_ring_size = 16384,</div><div class='add'>+			.rxdma_monitor_buf_ring_size = 256,</div><div class='add'>+			.rxdma_monitor_dst_ring_size = 512,</div><div class='add'>+			.num_pool_tx_desc = 16384,</div><div class='add'>+			.rx_desc_count = 6144,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int ath12k_core_rfkill_config(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath12k *ar;</div><div class='hunk'>@@ -30,6 +74,9 @@ static int ath12k_core_rfkill_config(struct ath12k_base *ab)</div><div class='ctx'> 	if (!(ab-&gt;target_caps.sys_cap_info &amp; WMI_SYS_CAP_INFO_RFKILL))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	if (ath12k_acpi_get_disable_rfkill(ab))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; ab-&gt;num_radios; i++) {</div><div class='ctx'> 		ar = ab-&gt;pdevs[i].ar;</div><div class='ctx'> </div><div class='hunk'>@@ -79,11 +126,17 @@ int ath12k_core_suspend(struct ath12k_base *ab)</div><div class='ctx'> 		ar = ab-&gt;pdevs[i].ar;</div><div class='ctx'> 		if (!ar)</div><div class='ctx'> 			continue;</div><div class='add'>+</div><div class='add'>+		wiphy_lock(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='add'>+</div><div class='ctx'> 		ret = ath12k_mac_wait_tx_complete(ar);</div><div class='ctx'> 		if (ret) {</div><div class='add'>+			wiphy_unlock(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='ctx'> 			ath12k_warn(ab, "failed to wait tx complete: %d\n", ret);</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		wiphy_unlock(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* PM framework skips suspend_late/resume_early callbacks</div><div class='hunk'>@@ -161,10 +214,10 @@ EXPORT_SYMBOL(ath12k_core_resume);</div><div class='ctx'> </div><div class='ctx'> static int __ath12k_core_create_board_name(struct ath12k_base *ab, char *name,</div><div class='ctx'> 					   size_t name_len, bool with_variant,</div><div class='del'>-					   bool bus_type_mode)</div><div class='add'>+					   bool bus_type_mode, bool with_default)</div><div class='ctx'> {</div><div class='ctx'> 	/* strlen(',variant=') + strlen(ab-&gt;qmi.target.bdf_ext) */</div><div class='del'>-	char variant[9 + ATH12K_QMI_BDF_EXT_STR_LENGTH] = { 0 };</div><div class='add'>+	char variant[9 + ATH12K_QMI_BDF_EXT_STR_LENGTH] = {};</div><div class='ctx'> </div><div class='ctx'> 	if (with_variant &amp;&amp; ab-&gt;qmi.target.bdf_ext[0] != '\0')</div><div class='ctx'> 		scnprintf(variant, sizeof(variant), ",variant=%s",</div><div class='hunk'>@@ -192,7 +245,9 @@ static int __ath12k_core_create_board_name(struct ath12k_base *ab, char *name,</div><div class='ctx'> 			  "bus=%s,qmi-chip-id=%d,qmi-board-id=%d%s",</div><div class='ctx'> 			  ath12k_bus_str(ab-&gt;hif.bus),</div><div class='ctx'> 			  ab-&gt;qmi.target.chip_id,</div><div class='del'>-			  ab-&gt;qmi.target.board_id, variant);</div><div class='add'>+			  with_default ?</div><div class='add'>+			  ATH12K_BOARD_ID_DEFAULT : ab-&gt;qmi.target.board_id,</div><div class='add'>+			  variant);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -204,19 +259,19 @@ static int __ath12k_core_create_board_name(struct ath12k_base *ab, char *name,</div><div class='ctx'> static int ath12k_core_create_board_name(struct ath12k_base *ab, char *name,</div><div class='ctx'> 					 size_t name_len)</div><div class='ctx'> {</div><div class='del'>-	return __ath12k_core_create_board_name(ab, name, name_len, true, false);</div><div class='add'>+	return __ath12k_core_create_board_name(ab, name, name_len, true, false, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath12k_core_create_fallback_board_name(struct ath12k_base *ab, char *name,</div><div class='ctx'> 						  size_t name_len)</div><div class='ctx'> {</div><div class='del'>-	return __ath12k_core_create_board_name(ab, name, name_len, false, false);</div><div class='add'>+	return __ath12k_core_create_board_name(ab, name, name_len, false, false, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath12k_core_create_bus_type_board_name(struct ath12k_base *ab, char *name,</div><div class='ctx'> 						  size_t name_len)</div><div class='ctx'> {</div><div class='del'>-	return __ath12k_core_create_board_name(ab, name, name_len, false, true);</div><div class='add'>+	return __ath12k_core_create_board_name(ab, name, name_len, false, true, true);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab,</div><div class='hunk'>@@ -567,45 +622,100 @@ exit:</div><div class='ctx'> u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	if (ab-&gt;num_radios == 2)</div><div class='del'>-		return TARGET_NUM_STATIONS_DBS;</div><div class='del'>-	else if (ab-&gt;num_radios == 3)</div><div class='del'>-		return TARGET_NUM_PEERS_PDEV_DBS_SBS;</div><div class='del'>-	return TARGET_NUM_STATIONS_SINGLE;</div><div class='add'>+		return TARGET_NUM_STATIONS(ab, DBS);</div><div class='add'>+	if (ab-&gt;num_radios == 3)</div><div class='add'>+		return TARGET_NUM_STATIONS(ab, DBS_SBS);</div><div class='add'>+	return TARGET_NUM_STATIONS(ab, SINGLE);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='del'>-	if (ab-&gt;num_radios == 2)</div><div class='del'>-		return TARGET_NUM_PEERS_PDEV_DBS;</div><div class='del'>-	else if (ab-&gt;num_radios == 3)</div><div class='del'>-		return TARGET_NUM_PEERS_PDEV_DBS_SBS;</div><div class='del'>-	return TARGET_NUM_PEERS_PDEV_SINGLE;</div><div class='add'>+	return ath12k_core_get_max_station_per_radio(ab) + TARGET_NUM_VDEVS(ab);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab)</div><div class='add'>+struct reserved_mem *ath12k_core_get_reserved_mem(struct ath12k_base *ab,</div><div class='add'>+						  int index)</div><div class='ctx'> {</div><div class='del'>-	if (ab-&gt;num_radios == 2)</div><div class='del'>-		return TARGET_NUM_TIDS(DBS);</div><div class='del'>-	else if (ab-&gt;num_radios == 3)</div><div class='del'>-		return TARGET_NUM_TIDS(DBS_SBS);</div><div class='del'>-	return TARGET_NUM_TIDS(SINGLE);</div><div class='add'>+	struct device *dev = ab-&gt;dev;</div><div class='add'>+	struct reserved_mem *rmem;</div><div class='add'>+	struct device_node *node;</div><div class='add'>+</div><div class='add'>+	node = of_parse_phandle(dev-&gt;of_node, "memory-region", index);</div><div class='add'>+	if (!node) {</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT,</div><div class='add'>+			   "failed to parse memory-region for index %d\n", index);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rmem = of_reserved_mem_lookup(node);</div><div class='add'>+	of_node_put(node);</div><div class='add'>+	if (!rmem) {</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT,</div><div class='add'>+			   "unable to get memory-region for index %d\n", index);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rmem;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline</div><div class='add'>+void ath12k_core_to_group_ref_get(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_hw_group *ag = ab-&gt;ag;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (ab-&gt;hw_group_ref) {</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT, "core already attached to group %d\n",</div><div class='add'>+			   ag-&gt;id);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab-&gt;hw_group_ref = true;</div><div class='add'>+	ag-&gt;num_started++;</div><div class='add'>+</div><div class='add'>+	ath12k_dbg(ab, ATH12K_DBG_BOOT, "core attached to group %d, num_started %d\n",</div><div class='add'>+		   ag-&gt;id, ag-&gt;num_started);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline</div><div class='add'>+void ath12k_core_to_group_ref_put(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_hw_group *ag = ab-&gt;ag;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (!ab-&gt;hw_group_ref) {</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT, "core already de-attached from group %d\n",</div><div class='add'>+			   ag-&gt;id);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab-&gt;hw_group_ref = false;</div><div class='add'>+	ag-&gt;num_started--;</div><div class='add'>+</div><div class='add'>+	ath12k_dbg(ab, ATH12K_DBG_BOOT, "core de-attached from group %d, num_started %d\n",</div><div class='add'>+		   ag-&gt;id, ag-&gt;num_started);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath12k_core_stop(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='add'>+	ath12k_core_to_group_ref_put(ab);</div><div class='add'>+</div><div class='ctx'> 	if (!test_bit(ATH12K_FLAG_CRASH_FLUSH, &amp;ab-&gt;dev_flags))</div><div class='ctx'> 		ath12k_qmi_firmware_stop(ab);</div><div class='ctx'> </div><div class='ctx'> 	ath12k_acpi_stop(ab);</div><div class='ctx'> </div><div class='add'>+	ath12k_dp_rx_pdev_reo_cleanup(ab);</div><div class='ctx'> 	ath12k_hif_stop(ab);</div><div class='ctx'> 	ath12k_wmi_detach(ab);</div><div class='del'>-	ath12k_dp_rx_pdev_reo_cleanup(ab);</div><div class='add'>+	ath12k_dp_free(ab);</div><div class='ctx'> </div><div class='ctx'> 	/* De-Init of components as needed */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ath12k_core_check_bdfext(const struct dmi_header *hdr, void *data)</div><div class='add'>+static void ath12k_core_check_cc_code_bdfext(const struct dmi_header *hdr, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath12k_base *ab = data;</div><div class='ctx'> 	const char *magic = ATH12K_SMBIOS_BDF_EXT_MAGIC;</div><div class='hunk'>@@ -627,6 +737,28 @@ static void ath12k_core_check_bdfext(const struct dmi_header *hdr, void *data)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	spin_lock_bh(&amp;ab-&gt;base_lock);</div><div class='add'>+</div><div class='add'>+	switch (smbios-&gt;country_code_flag) {</div><div class='add'>+	case ATH12K_SMBIOS_CC_ISO:</div><div class='add'>+		ab-&gt;new_alpha2[0] = u16_get_bits(smbios-&gt;cc_code &gt;&gt; 8, 0xff);</div><div class='add'>+		ab-&gt;new_alpha2[1] = u16_get_bits(smbios-&gt;cc_code, 0xff);</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT, "boot smbios cc_code %c%c\n",</div><div class='add'>+			   ab-&gt;new_alpha2[0], ab-&gt;new_alpha2[1]);</div><div class='add'>+		break;</div><div class='add'>+	case ATH12K_SMBIOS_CC_WW:</div><div class='add'>+		ab-&gt;new_alpha2[0] = '0';</div><div class='add'>+		ab-&gt;new_alpha2[1] = '0';</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT, "boot smbios worldwide regdomain\n");</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT, "boot ignore smbios country code setting %d\n",</div><div class='add'>+			   smbios-&gt;country_code_flag);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;ab-&gt;base_lock);</div><div class='add'>+</div><div class='ctx'> 	if (!smbios-&gt;bdf_enabled) {</div><div class='ctx'> 		ath12k_dbg(ab, ATH12K_DBG_BOOT, "bdf variant name not found.\n");</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -666,7 +798,7 @@ static void ath12k_core_check_bdfext(const struct dmi_header *hdr, void *data)</div><div class='ctx'> int ath12k_core_check_smbios(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	ab-&gt;qmi.target.bdf_ext[0] = '\0';</div><div class='del'>-	dmi_walk(ath12k_core_check_bdfext, ab);</div><div class='add'>+	dmi_walk(ath12k_core_check_cc_code_bdfext, ab);</div><div class='ctx'> </div><div class='ctx'> 	if (ab-&gt;qmi.target.bdf_ext[0] == '\0')</div><div class='ctx'> 		return -ENODATA;</div><div class='hunk'>@@ -678,6 +810,11 @@ static int ath12k_core_soc_create(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (ath12k_ftm_mode) {</div><div class='add'>+		ab-&gt;fw_mode = ATH12K_FIRMWARE_MODE_FTM;</div><div class='add'>+		ath12k_info(ab, "Booting in ftm mode\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = ath12k_qmi_init_service(ab);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath12k_err(ab, "failed to initialize qmi :%d\n", ret);</div><div class='hunk'>@@ -692,6 +829,8 @@ static int ath12k_core_soc_create(struct ath12k_base *ab)</div><div class='ctx'> 		goto err_qmi_deinit;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	ath12k_debugfs_pdev_create(ab);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_qmi_deinit:</div><div class='hunk'>@@ -702,7 +841,7 @@ err_qmi_deinit:</div><div class='ctx'> </div><div class='ctx'> static void ath12k_core_soc_destroy(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='del'>-	ath12k_dp_free(ab);</div><div class='add'>+	ath12k_hif_power_down(ab, false);</div><div class='ctx'> 	ath12k_reg_free(ab);</div><div class='ctx'> 	ath12k_debugfs_soc_destroy(ab);</div><div class='ctx'> 	ath12k_qmi_deinit_service(ab);</div><div class='hunk'>@@ -712,38 +851,26 @@ static int ath12k_core_pdev_create(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = ath12k_mac_register(ab);</div><div class='del'>-	if (ret) {</div><div class='del'>-		ath12k_err(ab, "failed register the radio with mac80211: %d\n", ret);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ret = ath12k_dp_pdev_alloc(ab);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath12k_err(ab, "failed to attach DP pdev: %d\n", ret);</div><div class='del'>-		goto err_mac_unregister;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_mac_unregister:</div><div class='del'>-	ath12k_mac_unregister(ab);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath12k_core_pdev_destroy(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='del'>-	ath12k_mac_unregister(ab);</div><div class='del'>-	ath12k_hif_irq_disable(ab);</div><div class='ctx'> 	ath12k_dp_pdev_free(ab);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ath12k_core_start(struct ath12k_base *ab,</div><div class='del'>-			     enum ath12k_firmware_mode mode)</div><div class='add'>+static int ath12k_core_start(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	lockdep_assert_held(&amp;ab-&gt;core_lock);</div><div class='add'>+</div><div class='ctx'> 	ret = ath12k_wmi_attach(ab);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath12k_err(ab, "failed to attach wmi: %d\n", ret);</div><div class='hunk'>@@ -793,19 +920,12 @@ static int ath12k_core_start(struct ath12k_base *ab,</div><div class='ctx'> 		goto err_hif_stop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = ath12k_mac_allocate(ab);</div><div class='del'>-	if (ret) {</div><div class='del'>-		ath12k_err(ab, "failed to create new hw device with mac80211 :%d\n",</div><div class='del'>-			   ret);</div><div class='del'>-		goto err_hif_stop;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	ath12k_dp_cc_config(ab);</div><div class='ctx'> </div><div class='ctx'> 	ret = ath12k_dp_rx_pdev_reo_setup(ab);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath12k_err(ab, "failed to initialize reo destination rings: %d\n", ret);</div><div class='del'>-		goto err_mac_destroy;</div><div class='add'>+		goto err_hif_stop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ath12k_dp_hal_rx_desc_init(ab);</div><div class='hunk'>@@ -839,17 +959,15 @@ static int ath12k_core_start(struct ath12k_base *ab,</div><div class='ctx'> 		goto err_reo_cleanup;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = ath12k_acpi_start(ab);</div><div class='del'>-	if (ret)</div><div class='del'>-		/* ACPI is optional so continue in case of an error */</div><div class='del'>-		ath12k_dbg(ab, ATH12K_DBG_BOOT, "acpi failed: %d\n", ret);</div><div class='add'>+	ath12k_acpi_set_dsm_func(ab);</div><div class='add'>+</div><div class='add'>+	/* Indicate the core start in the appropriate group */</div><div class='add'>+	ath12k_core_to_group_ref_get(ab);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_reo_cleanup:</div><div class='ctx'> 	ath12k_dp_rx_pdev_reo_cleanup(ab);</div><div class='del'>-err_mac_destroy:</div><div class='del'>-	ath12k_mac_destroy(ab);</div><div class='ctx'> err_hif_stop:</div><div class='ctx'> 	ath12k_hif_stop(ab);</div><div class='ctx'> err_wmi_detach:</div><div class='hunk'>@@ -857,6 +975,204 @@ err_wmi_detach:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ath12k_core_device_cleanup(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;ab-&gt;core_lock);</div><div class='add'>+</div><div class='add'>+	ath12k_hif_irq_disable(ab);</div><div class='add'>+	ath12k_core_pdev_destroy(ab);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_core_hw_group_stop(struct ath12k_hw_group *ag)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	clear_bit(ATH12K_GROUP_FLAG_REGISTERED, &amp;ag-&gt;flags);</div><div class='add'>+</div><div class='add'>+	ath12k_mac_unregister(ag);</div><div class='add'>+</div><div class='add'>+	for (i = ag-&gt;num_devices - 1; i &gt;= 0; i--) {</div><div class='add'>+		ab = ag-&gt;ab[i];</div><div class='add'>+		if (!ab)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		clear_bit(ATH12K_FLAG_REGISTERED, &amp;ab-&gt;dev_flags);</div><div class='add'>+</div><div class='add'>+		ath12k_core_device_cleanup(ab);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath12k_mac_destroy(ag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 ath12k_get_num_partner_link(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *partner_ab, *ab = ar-&gt;ab;</div><div class='add'>+	struct ath12k_hw_group *ag = ab-&gt;ag;</div><div class='add'>+	struct ath12k_pdev *pdev;</div><div class='add'>+	u8 num_link = 0;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_devices; i++) {</div><div class='add'>+		partner_ab = ag-&gt;ab[i];</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; partner_ab-&gt;num_radios; j++) {</div><div class='add'>+			pdev = &amp;partner_ab-&gt;pdevs[j];</div><div class='add'>+</div><div class='add'>+			/* Avoid the self link */</div><div class='add'>+			if (ar == pdev-&gt;ar)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			num_link++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return num_link;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __ath12k_mac_mlo_ready(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	u8 num_link = ath12k_get_num_partner_link(ar);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (num_link == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_wmi_mlo_ready(ar);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_err(ar-&gt;ab, "MLO ready failed for pdev %d: %d\n",</div><div class='add'>+			   ar-&gt;pdev_idx, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath12k_dbg(ar-&gt;ab, ATH12K_DBG_MAC, "mlo ready done for pdev %d\n",</div><div class='add'>+		   ar-&gt;pdev_idx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ath12k_mac_mlo_ready(struct ath12k_hw_group *ag)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_hw *ah;</div><div class='add'>+	struct ath12k *ar;</div><div class='add'>+	int ret;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_hw; i++) {</div><div class='add'>+		ah = ag-&gt;ah[i];</div><div class='add'>+		if (!ah)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for_each_ar(ah, ar, j) {</div><div class='add'>+			ar = &amp;ah-&gt;radio[j];</div><div class='add'>+			ret = __ath12k_mac_mlo_ready(ar);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_core_mlo_setup(struct ath12k_hw_group *ag)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	if (!ag-&gt;mlo_capable)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_mac_mlo_setup(ag);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_devices; i++)</div><div class='add'>+		ath12k_dp_partner_cc_init(ag-&gt;ab[i]);</div><div class='add'>+</div><div class='add'>+	ret = ath12k_mac_mlo_ready(ag);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_mlo_teardown;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_mlo_teardown:</div><div class='add'>+	ath12k_mac_mlo_teardown(ag);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_core_hw_group_start(struct ath12k_hw_group *ag)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (test_bit(ATH12K_GROUP_FLAG_REGISTERED, &amp;ag-&gt;flags))</div><div class='add'>+		goto core_pdev_create;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_mac_allocate(ag);</div><div class='add'>+	if (WARN_ON(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_core_mlo_setup(ag);</div><div class='add'>+	if (WARN_ON(ret))</div><div class='add'>+		goto err_mac_destroy;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_mac_register(ag);</div><div class='add'>+	if (WARN_ON(ret))</div><div class='add'>+		goto err_mlo_teardown;</div><div class='add'>+</div><div class='add'>+	set_bit(ATH12K_GROUP_FLAG_REGISTERED, &amp;ag-&gt;flags);</div><div class='add'>+</div><div class='add'>+core_pdev_create:</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_devices; i++) {</div><div class='add'>+		ab = ag-&gt;ab[i];</div><div class='add'>+		if (!ab)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;ab-&gt;core_lock);</div><div class='add'>+</div><div class='add'>+		set_bit(ATH12K_FLAG_REGISTERED, &amp;ab-&gt;dev_flags);</div><div class='add'>+</div><div class='add'>+		ret = ath12k_core_pdev_create(ab);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath12k_err(ab, "failed to create pdev core %d\n", ret);</div><div class='add'>+			mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ath12k_hif_irq_enable(ab);</div><div class='add'>+</div><div class='add'>+		ret = ath12k_core_rfkill_config(ab);</div><div class='add'>+		if (ret &amp;&amp; ret != -EOPNOTSUPP) {</div><div class='add'>+			mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	ath12k_core_hw_group_stop(ag);</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+err_mlo_teardown:</div><div class='add'>+	ath12k_mac_mlo_teardown(ag);</div><div class='add'>+</div><div class='add'>+err_mac_destroy:</div><div class='add'>+	ath12k_mac_destroy(ag);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ath12k_core_start_firmware(struct ath12k_base *ab,</div><div class='ctx'> 				      enum ath12k_firmware_mode mode)</div><div class='ctx'> {</div><div class='hunk'>@@ -874,11 +1190,93 @@ static int ath12k_core_start_firmware(struct ath12k_base *ab,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline</div><div class='add'>+bool ath12k_core_hw_group_start_ready(struct ath12k_hw_group *ag)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return (ag-&gt;num_started == ag-&gt;num_devices);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_fw_stats_pdevs_free(struct list_head *head)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_fw_stats_pdev *i, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(i, tmp, head, list) {</div><div class='add'>+		list_del(&amp;i-&gt;list);</div><div class='add'>+		kfree(i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_fw_stats_bcn_free(struct list_head *head)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_fw_stats_bcn *i, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(i, tmp, head, list) {</div><div class='add'>+		list_del(&amp;i-&gt;list);</div><div class='add'>+		kfree(i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_fw_stats_vdevs_free(struct list_head *head)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_fw_stats_vdev *i, *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(i, tmp, head, list) {</div><div class='add'>+		list_del(&amp;i-&gt;list);</div><div class='add'>+		kfree(i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_fw_stats_init(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	INIT_LIST_HEAD(&amp;ar-&gt;fw_stats.vdevs);</div><div class='add'>+	INIT_LIST_HEAD(&amp;ar-&gt;fw_stats.pdevs);</div><div class='add'>+	INIT_LIST_HEAD(&amp;ar-&gt;fw_stats.bcn);</div><div class='add'>+	init_completion(&amp;ar-&gt;fw_stats_complete);</div><div class='add'>+	init_completion(&amp;ar-&gt;fw_stats_done);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_fw_stats_free(struct ath12k_fw_stats *stats)</div><div class='add'>+{</div><div class='add'>+	ath12k_fw_stats_pdevs_free(&amp;stats-&gt;pdevs);</div><div class='add'>+	ath12k_fw_stats_vdevs_free(&amp;stats-&gt;vdevs);</div><div class='add'>+	ath12k_fw_stats_bcn_free(&amp;stats-&gt;bcn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_fw_stats_reset(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+	ath12k_fw_stats_free(&amp;ar-&gt;fw_stats);</div><div class='add'>+	ar-&gt;fw_stats.num_vdev_recvd = 0;</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_core_trigger_partner(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_hw_group *ag = ab-&gt;ag;</div><div class='add'>+	struct ath12k_base *partner_ab;</div><div class='add'>+	bool found = false;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_devices; i++) {</div><div class='add'>+		partner_ab = ag-&gt;ab[i];</div><div class='add'>+		if (!partner_ab)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (found)</div><div class='add'>+			ath12k_qmi_trigger_host_cap(partner_ab);</div><div class='add'>+</div><div class='add'>+		found = (partner_ab == ab);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	struct ath12k_hw_group *ag = ath12k_ab_to_ag(ab);</div><div class='add'>+	int ret, i;</div><div class='ctx'> </div><div class='del'>-	ret = ath12k_core_start_firmware(ab, ATH12K_FIRMWARE_MODE_NORMAL);</div><div class='add'>+	ret = ath12k_core_start_firmware(ab, ab-&gt;fw_mode);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath12k_err(ab, "failed to start firmware: %d\n", ret);</div><div class='ctx'> 		return ret;</div><div class='hunk'>@@ -896,47 +1294,60 @@ int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab)</div><div class='ctx'> 		goto err_firmware_stop;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;ag-&gt;mutex);</div><div class='ctx'> 	mutex_lock(&amp;ab-&gt;core_lock);</div><div class='del'>-	ret = ath12k_core_start(ab, ATH12K_FIRMWARE_MODE_NORMAL);</div><div class='add'>+</div><div class='add'>+	ret = ath12k_core_start(ab);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		ath12k_err(ab, "failed to start core: %d\n", ret);</div><div class='ctx'> 		goto err_dp_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = ath12k_core_pdev_create(ab);</div><div class='del'>-	if (ret) {</div><div class='del'>-		ath12k_err(ab, "failed to create pdev core: %d\n", ret);</div><div class='del'>-		goto err_core_stop;</div><div class='del'>-	}</div><div class='del'>-	ath12k_hif_irq_enable(ab);</div><div class='add'>+	mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='ctx'> </div><div class='del'>-	ret = ath12k_core_rfkill_config(ab);</div><div class='del'>-	if (ret &amp;&amp; ret != -EOPNOTSUPP) {</div><div class='del'>-		ath12k_err(ab, "failed to config rfkill: %d\n", ret);</div><div class='del'>-		goto err_core_pdev_destroy;</div><div class='add'>+	if (ath12k_core_hw_group_start_ready(ag)) {</div><div class='add'>+		ret = ath12k_core_hw_group_start(ag);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath12k_warn(ab, "unable to start hw group\n");</div><div class='add'>+			goto err_core_stop;</div><div class='add'>+		}</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT, "group %d started\n", ag-&gt;id);</div><div class='add'>+	} else {</div><div class='add'>+		ath12k_core_trigger_partner(ab);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+	mutex_unlock(&amp;ag-&gt;mutex);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_core_pdev_destroy:</div><div class='del'>-	ath12k_core_pdev_destroy(ab);</div><div class='ctx'> err_core_stop:</div><div class='del'>-	ath12k_core_stop(ab);</div><div class='del'>-	ath12k_mac_destroy(ab);</div><div class='add'>+	for (i = ag-&gt;num_devices - 1; i &gt;= 0; i--) {</div><div class='add'>+		ab = ag-&gt;ab[i];</div><div class='add'>+		if (!ab)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;ab-&gt;core_lock);</div><div class='add'>+		ath12k_core_stop(ab);</div><div class='add'>+		mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+	goto exit;</div><div class='add'>+</div><div class='ctx'> err_dp_free:</div><div class='ctx'> 	ath12k_dp_free(ab);</div><div class='ctx'> 	mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+	mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='ctx'> err_firmware_stop:</div><div class='ctx'> 	ath12k_qmi_firmware_stop(ab);</div><div class='ctx'> </div><div class='add'>+exit:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ath12k_core_reconfigure_on_crash(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, total_vdev;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;ab-&gt;core_lock);</div><div class='ctx'> 	ath12k_dp_pdev_free(ab);</div><div class='hunk'>@@ -947,8 +1358,8 @@ static int ath12k_core_reconfigure_on_crash(struct ath12k_base *ab)</div><div class='ctx'> </div><div class='ctx'> 	ath12k_dp_free(ab);</div><div class='ctx'> 	ath12k_hal_srng_deinit(ab);</div><div class='del'>-</div><div class='del'>-	ab-&gt;free_vdev_map = (1LL &lt;&lt; (ab-&gt;num_radios * TARGET_NUM_VDEVS)) - 1;</div><div class='add'>+	total_vdev = ab-&gt;num_radios * TARGET_NUM_VDEVS(ab);</div><div class='add'>+	ab-&gt;free_vdev_map = (1LL &lt;&lt; total_vdev) - 1;</div><div class='ctx'> </div><div class='ctx'> 	ret = ath12k_hal_srng_init(ab);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -972,6 +1383,7 @@ err_hal_srng_deinit:</div><div class='ctx'> static void ath12k_rfkill_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath12k_base *ab = container_of(work, struct ath12k_base, rfkill_work);</div><div class='add'>+	struct ath12k_hw_group *ag = ab-&gt;ag;</div><div class='ctx'> 	struct ath12k *ar;</div><div class='ctx'> 	struct ath12k_hw *ah;</div><div class='ctx'> 	struct ieee80211_hw *hw;</div><div class='hunk'>@@ -982,8 +1394,8 @@ static void ath12k_rfkill_work(struct work_struct *work)</div><div class='ctx'> 	rfkill_radio_on = ab-&gt;rfkill_radio_on;</div><div class='ctx'> 	spin_unlock_bh(&amp;ab-&gt;base_lock);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ab-&gt;num_hw; i++) {</div><div class='del'>-		ah = ab-&gt;ah[i];</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_hw; i++) {</div><div class='add'>+		ah = ath12k_ag_to_ah(ag, i);</div><div class='ctx'> 		if (!ah)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -1002,9 +1414,10 @@ static void ath12k_rfkill_work(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> void ath12k_core_halt(struct ath12k *ar)</div><div class='ctx'> {</div><div class='add'>+	struct list_head *pos, *n;</div><div class='ctx'> 	struct ath12k_base *ab = ar-&gt;ab;</div><div class='ctx'> </div><div class='del'>-	lockdep_assert_held(&amp;ar-&gt;conf_mutex);</div><div class='add'>+	lockdep_assert_wiphy(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='ctx'> </div><div class='ctx'> 	ar-&gt;num_created_vdevs = 0;</div><div class='ctx'> 	ar-&gt;allocated_vdev_map = 0;</div><div class='hunk'>@@ -1013,16 +1426,24 @@ void ath12k_core_halt(struct ath12k *ar)</div><div class='ctx'> 	ath12k_mac_peer_cleanup_all(ar);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;ar-&gt;scan.timeout);</div><div class='ctx'> 	cancel_work_sync(&amp;ar-&gt;regd_update_work);</div><div class='add'>+	cancel_work_sync(&amp;ar-&gt;regd_channel_update_work);</div><div class='ctx'> 	cancel_work_sync(&amp;ab-&gt;rfkill_work);</div><div class='add'>+	cancel_work_sync(&amp;ab-&gt;update_11d_work);</div><div class='ctx'> </div><div class='ctx'> 	rcu_assign_pointer(ab-&gt;pdevs_active[ar-&gt;pdev_idx], NULL);</div><div class='ctx'> 	synchronize_rcu();</div><div class='del'>-	INIT_LIST_HEAD(&amp;ar-&gt;arvifs);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+	list_for_each_safe(pos, n, &amp;ar-&gt;arvifs)</div><div class='add'>+		list_del_init(pos);</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='ctx'> 	idr_init(&amp;ar-&gt;txmgmt_idr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath12k_core_pre_reconfigure_recovery(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='add'>+	struct ath12k_hw_group *ag = ab-&gt;ag;</div><div class='ctx'> 	struct ath12k *ar;</div><div class='ctx'> 	struct ath12k_hw *ah;</div><div class='ctx'> 	int i, j;</div><div class='hunk'>@@ -1034,19 +1455,34 @@ static void ath12k_core_pre_reconfigure_recovery(struct ath12k_base *ab)</div><div class='ctx'> 	if (ab-&gt;is_reset)</div><div class='ctx'> 		set_bit(ATH12K_FLAG_CRASH_FLUSH, &amp;ab-&gt;dev_flags);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ab-&gt;num_hw; i++) {</div><div class='del'>-		ah = ab-&gt;ah[i];</div><div class='del'>-		if (!ah || ah-&gt;state == ATH12K_HW_STATE_OFF)</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_hw; i++) {</div><div class='add'>+		ah = ath12k_ag_to_ah(ag, i);</div><div class='add'>+		if (!ah || ah-&gt;state == ATH12K_HW_STATE_OFF ||</div><div class='add'>+		    ah-&gt;state == ATH12K_HW_STATE_TM)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		wiphy_lock(ah-&gt;hw-&gt;wiphy);</div><div class='add'>+</div><div class='add'>+		/* If queue 0 is stopped, it is safe to assume that all</div><div class='add'>+		 * other queues are stopped by driver via</div><div class='add'>+		 * ieee80211_stop_queues() below. This means, there is</div><div class='add'>+		 * no need to stop it again and hence continue</div><div class='add'>+		 */</div><div class='add'>+		if (ieee80211_queue_stopped(ah-&gt;hw, 0)) {</div><div class='add'>+			wiphy_unlock(ah-&gt;hw-&gt;wiphy);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		ieee80211_stop_queues(ah-&gt;hw);</div><div class='ctx'> </div><div class='ctx'> 		for (j = 0; j &lt; ah-&gt;num_radio; j++) {</div><div class='ctx'> 			ar = &amp;ah-&gt;radio[j];</div><div class='ctx'> </div><div class='ctx'> 			ath12k_mac_drain_tx(ar);</div><div class='add'>+			ar-&gt;state_11d = ATH12K_11D_IDLE;</div><div class='add'>+			complete(&amp;ar-&gt;completed_11d_scan);</div><div class='ctx'> 			complete(&amp;ar-&gt;scan.started);</div><div class='del'>-			complete(&amp;ar-&gt;scan.completed);</div><div class='add'>+			complete_all(&amp;ar-&gt;scan.completed);</div><div class='ctx'> 			complete(&amp;ar-&gt;scan.on_channel);</div><div class='ctx'> 			complete(&amp;ar-&gt;peer_assoc_done);</div><div class='ctx'> 			complete(&amp;ar-&gt;peer_delete_done);</div><div class='hunk'>@@ -1054,30 +1490,70 @@ static void ath12k_core_pre_reconfigure_recovery(struct ath12k_base *ab)</div><div class='ctx'> 			complete(&amp;ar-&gt;vdev_setup_done);</div><div class='ctx'> 			complete(&amp;ar-&gt;vdev_delete_done);</div><div class='ctx'> 			complete(&amp;ar-&gt;bss_survey_done);</div><div class='add'>+			complete_all(&amp;ar-&gt;regd_update_completed);</div><div class='ctx'> </div><div class='ctx'> 			wake_up(&amp;ar-&gt;dp.tx_empty_waitq);</div><div class='ctx'> 			idr_for_each(&amp;ar-&gt;txmgmt_idr,</div><div class='ctx'> 				     ath12k_mac_tx_mgmt_pending_free, ar);</div><div class='ctx'> 			idr_destroy(&amp;ar-&gt;txmgmt_idr);</div><div class='ctx'> 			wake_up(&amp;ar-&gt;txmgmt_empty_waitq);</div><div class='add'>+</div><div class='add'>+			ar-&gt;monitor_vdev_id = -1;</div><div class='add'>+			ar-&gt;monitor_vdev_created = false;</div><div class='add'>+			ar-&gt;monitor_started = false;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		wiphy_unlock(ah-&gt;hw-&gt;wiphy);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	wake_up(&amp;ab-&gt;wmi_ab.tx_credits_wq);</div><div class='ctx'> 	wake_up(&amp;ab-&gt;peer_mapping_wq);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ath12k_update_11d(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab = container_of(work, struct ath12k_base, update_11d_work);</div><div class='add'>+	struct ath12k *ar;</div><div class='add'>+	struct ath12k_pdev *pdev;</div><div class='add'>+	struct wmi_set_current_country_arg arg = {};</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ab-&gt;base_lock);</div><div class='add'>+	memcpy(&amp;arg.alpha2, &amp;ab-&gt;new_alpha2, 2);</div><div class='add'>+	spin_unlock_bh(&amp;ab-&gt;base_lock);</div><div class='add'>+</div><div class='add'>+	ath12k_dbg(ab, ATH12K_DBG_WMI, "update 11d new cc %c%c\n",</div><div class='add'>+		   arg.alpha2[0], arg.alpha2[1]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;num_radios; i++) {</div><div class='add'>+		pdev = &amp;ab-&gt;pdevs[i];</div><div class='add'>+		ar = pdev-&gt;ar;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;ar-&gt;alpha2, &amp;arg.alpha2, 2);</div><div class='add'>+</div><div class='add'>+		reinit_completion(&amp;ar-&gt;regd_update_completed);</div><div class='add'>+</div><div class='add'>+		ret = ath12k_wmi_send_set_current_country_cmd(ar, &amp;arg);</div><div class='add'>+		if (ret)</div><div class='add'>+			ath12k_warn(ar-&gt;ab,</div><div class='add'>+				    "pdev id %d failed set current country code: %d\n",</div><div class='add'>+				    i, ret);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ath12k_core_post_reconfigure_recovery(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='add'>+	struct ath12k_hw_group *ag = ab-&gt;ag;</div><div class='ctx'> 	struct ath12k_hw *ah;</div><div class='ctx'> 	struct ath12k *ar;</div><div class='ctx'> 	int i, j;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ab-&gt;num_hw; i++) {</div><div class='del'>-		ah = ab-&gt;ah[i];</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_hw; i++) {</div><div class='add'>+		ah = ath12k_ag_to_ah(ag, i);</div><div class='ctx'> 		if (!ah || ah-&gt;state == ATH12K_HW_STATE_OFF)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		wiphy_lock(ah-&gt;hw-&gt;wiphy);</div><div class='ctx'> 		mutex_lock(&amp;ah-&gt;hw_mutex);</div><div class='ctx'> </div><div class='ctx'> 		switch (ah-&gt;state) {</div><div class='hunk'>@@ -1086,10 +1562,7 @@ static void ath12k_core_post_reconfigure_recovery(struct ath12k_base *ab)</div><div class='ctx'> </div><div class='ctx'> 			for (j = 0; j &lt; ah-&gt;num_radio; j++) {</div><div class='ctx'> 				ar = &amp;ah-&gt;radio[j];</div><div class='del'>-</div><div class='del'>-				mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> 				ath12k_core_halt(ar);</div><div class='del'>-				mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1107,9 +1580,13 @@ static void ath12k_core_post_reconfigure_recovery(struct ath12k_base *ab)</div><div class='ctx'> 			ath12k_warn(ab,</div><div class='ctx'> 				    "device is wedged, will not restart hw %d\n", i);</div><div class='ctx'> 			break;</div><div class='add'>+		case ATH12K_HW_STATE_TM:</div><div class='add'>+			ath12k_warn(ab, "fw mode reset done radio %d\n", i);</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		mutex_unlock(&amp;ah-&gt;hw_mutex);</div><div class='add'>+		wiphy_unlock(ah-&gt;hw-&gt;wiphy);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	complete(&amp;ab-&gt;driver_recovery);</div><div class='hunk'>@@ -1118,6 +1595,7 @@ static void ath12k_core_post_reconfigure_recovery(struct ath12k_base *ab)</div><div class='ctx'> static void ath12k_core_restart(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath12k_base *ab = container_of(work, struct ath12k_base, restart_work);</div><div class='add'>+	struct ath12k_hw_group *ag = ab-&gt;ag;</div><div class='ctx'> 	struct ath12k_hw *ah;</div><div class='ctx'> 	int ret, i;</div><div class='ctx'> </div><div class='hunk'>@@ -1128,22 +1606,41 @@ static void ath12k_core_restart(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (ab-&gt;is_reset) {</div><div class='del'>-		for (i = 0; i &lt; ab-&gt;num_hw; i++) {</div><div class='del'>-			ah = ab-&gt;ah[i];</div><div class='add'>+		if (!test_bit(ATH12K_FLAG_REGISTERED, &amp;ab-&gt;dev_flags)) {</div><div class='add'>+			atomic_dec(&amp;ab-&gt;reset_count);</div><div class='add'>+			complete(&amp;ab-&gt;reset_complete);</div><div class='add'>+			ab-&gt;is_reset = false;</div><div class='add'>+			atomic_set(&amp;ab-&gt;fail_cont_count, 0);</div><div class='add'>+			ath12k_dbg(ab, ATH12K_DBG_BOOT, "reset success\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+		if (!ath12k_core_hw_group_start_ready(ag)) {</div><div class='add'>+			mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+			goto exit_restart;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ag-&gt;num_hw; i++) {</div><div class='add'>+			ah = ath12k_ag_to_ah(ag, i);</div><div class='ctx'> 			ieee80211_restart_hw(ah-&gt;hw);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;ag-&gt;mutex);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+exit_restart:</div><div class='ctx'> 	complete(&amp;ab-&gt;restart_completed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ath12k_core_reset(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath12k_base *ab = container_of(work, struct ath12k_base, reset_work);</div><div class='del'>-	int reset_count, fail_cont_count;</div><div class='add'>+	struct ath12k_hw_group *ag = ab-&gt;ag;</div><div class='add'>+	int reset_count, fail_cont_count, i;</div><div class='ctx'> 	long time_left;</div><div class='ctx'> </div><div class='del'>-	if (!(test_bit(ATH12K_FLAG_REGISTERED, &amp;ab-&gt;dev_flags))) {</div><div class='add'>+	if (!(test_bit(ATH12K_FLAG_QMI_FW_READY_COMPLETE, &amp;ab-&gt;dev_flags))) {</div><div class='ctx'> 		ath12k_warn(ab, "ignore reset dev flags 0x%lx\n", ab-&gt;dev_flags);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1188,6 +1685,7 @@ static void ath12k_core_reset(struct work_struct *work)</div><div class='ctx'> 	ab-&gt;is_reset = true;</div><div class='ctx'> 	atomic_set(&amp;ab-&gt;recovery_count, 0);</div><div class='ctx'> </div><div class='add'>+	ath12k_coredump_collect(ab);</div><div class='ctx'> 	ath12k_core_pre_reconfigure_recovery(ab);</div><div class='ctx'> </div><div class='ctx'> 	ath12k_core_post_reconfigure_recovery(ab);</div><div class='hunk'>@@ -1198,13 +1696,53 @@ static void ath12k_core_reset(struct work_struct *work)</div><div class='ctx'> 	ath12k_hif_ce_irq_disable(ab);</div><div class='ctx'> </div><div class='ctx'> 	ath12k_hif_power_down(ab, false);</div><div class='del'>-	ath12k_hif_power_up(ab);</div><div class='ctx'> </div><div class='del'>-	ath12k_dbg(ab, ATH12K_DBG_BOOT, "reset started\n");</div><div class='add'>+	/* prepare for power up */</div><div class='add'>+	ab-&gt;qmi.num_radios = U8_MAX;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ag-&gt;mutex);</div><div class='add'>+	ath12k_core_to_group_ref_put(ab);</div><div class='add'>+</div><div class='add'>+	if (ag-&gt;num_started &gt; 0) {</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT,</div><div class='add'>+			   "waiting for %d partner device(s) to reset\n",</div><div class='add'>+			   ag-&gt;num_started);</div><div class='add'>+		mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Prepare MLO global memory region for power up */</div><div class='add'>+	ath12k_qmi_reset_mlo_mem(ag);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_devices; i++) {</div><div class='add'>+		ab = ag-&gt;ab[i];</div><div class='add'>+		if (!ab)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ath12k_hif_power_up(ab);</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT, "reset started\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	unsigned long total_ram;</div><div class='add'>+	struct sysinfo si;</div><div class='add'>+</div><div class='add'>+	si_meminfo(&amp;si);</div><div class='add'>+	total_ram = si.totalram * si.mem_unit;</div><div class='add'>+</div><div class='add'>+	if (total_ram &lt; SZ_512M)</div><div class='add'>+		return ATH12K_QMI_MEMORY_MODE_LOW_512_M;</div><div class='add'>+</div><div class='add'>+	return ATH12K_QMI_MEMORY_MODE_DEFAULT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> int ath12k_core_pre_init(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='add'>+	const struct ath12k_mem_profile_based_param *param;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = ath12k_hw_init(ab);</div><div class='hunk'>@@ -1213,6 +1751,8 @@ int ath12k_core_pre_init(struct ath12k_base *ab)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	param = &amp;ath12k_mem_profile_based_param[ab-&gt;target_mem_mode];</div><div class='add'>+	ab-&gt;profile_param = param;</div><div class='ctx'> 	ath12k_fw_map(ab);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1241,38 +1781,445 @@ static void ath12k_core_panic_notifier_unregister(struct ath12k_base *ab)</div><div class='ctx'> 					 &amp;ab-&gt;panic_nb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int ath12k_core_init(struct ath12k_base *ab)</div><div class='add'>+static inline</div><div class='add'>+bool ath12k_core_hw_group_create_ready(struct ath12k_hw_group *ag)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='add'>+	lockdep_assert_held(&amp;ag-&gt;mutex);</div><div class='ctx'> </div><div class='del'>-	ret = ath12k_core_soc_create(ab);</div><div class='del'>-	if (ret) {</div><div class='del'>-		ath12k_err(ab, "failed to create soc core: %d\n", ret);</div><div class='del'>-		return ret;</div><div class='add'>+	return (ag-&gt;num_probed == ag-&gt;num_devices);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ath12k_hw_group *ath12k_core_hw_group_alloc(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_hw_group *ag;</div><div class='add'>+	int count = 0;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ath12k_hw_group_mutex);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(ag, &amp;ath12k_hw_group_list, list)</div><div class='add'>+		count++;</div><div class='add'>+</div><div class='add'>+	ag = kzalloc(sizeof(*ag), GFP_KERNEL);</div><div class='add'>+	if (!ag)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ag-&gt;id = count;</div><div class='add'>+	list_add(&amp;ag-&gt;list, &amp;ath12k_hw_group_list);</div><div class='add'>+	mutex_init(&amp;ag-&gt;mutex);</div><div class='add'>+	ag-&gt;mlo_capable = false;</div><div class='add'>+</div><div class='add'>+	return ag;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_core_hw_group_free(struct ath12k_hw_group *ag)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;ath12k_hw_group_mutex);</div><div class='add'>+</div><div class='add'>+	list_del(&amp;ag-&gt;list);</div><div class='add'>+	kfree(ag);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ath12k_hw_group_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ath12k_hw_group *ath12k_core_hw_group_find_by_dt(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_hw_group *ag;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!ab-&gt;dev-&gt;of_node)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(ag, &amp;ath12k_hw_group_list, list)</div><div class='add'>+		for (i = 0; i &lt; ag-&gt;num_devices; i++)</div><div class='add'>+			if (ag-&gt;wsi_node[i] == ab-&gt;dev-&gt;of_node)</div><div class='add'>+				return ag;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_core_get_wsi_info(struct ath12k_hw_group *ag,</div><div class='add'>+				    struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct device_node *wsi_dev = ab-&gt;dev-&gt;of_node, *next_wsi_dev;</div><div class='add'>+	struct device_node *tx_endpoint, *next_rx_endpoint;</div><div class='add'>+	int device_count = 0;</div><div class='add'>+</div><div class='add'>+	next_wsi_dev = wsi_dev;</div><div class='add'>+</div><div class='add'>+	if (!next_wsi_dev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		ag-&gt;wsi_node[device_count] = next_wsi_dev;</div><div class='add'>+</div><div class='add'>+		tx_endpoint = of_graph_get_endpoint_by_regs(next_wsi_dev, 0, -1);</div><div class='add'>+		if (!tx_endpoint) {</div><div class='add'>+			of_node_put(next_wsi_dev);</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		next_rx_endpoint = of_graph_get_remote_endpoint(tx_endpoint);</div><div class='add'>+		if (!next_rx_endpoint) {</div><div class='add'>+			of_node_put(next_wsi_dev);</div><div class='add'>+			of_node_put(tx_endpoint);</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		of_node_put(tx_endpoint);</div><div class='add'>+		of_node_put(next_wsi_dev);</div><div class='add'>+</div><div class='add'>+		next_wsi_dev = of_graph_get_port_parent(next_rx_endpoint);</div><div class='add'>+		if (!next_wsi_dev) {</div><div class='add'>+			of_node_put(next_rx_endpoint);</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		of_node_put(next_rx_endpoint);</div><div class='add'>+</div><div class='add'>+		device_count++;</div><div class='add'>+		if (device_count &gt; ATH12K_MAX_DEVICES) {</div><div class='add'>+			ath12k_warn(ab, "device count in DT %d is more than limit %d\n",</div><div class='add'>+				    device_count, ATH12K_MAX_DEVICES);</div><div class='add'>+			of_node_put(next_wsi_dev);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} while (wsi_dev != next_wsi_dev);</div><div class='add'>+</div><div class='add'>+	of_node_put(next_wsi_dev);</div><div class='add'>+	ag-&gt;num_devices = device_count;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_core_get_wsi_index(struct ath12k_hw_group *ag,</div><div class='add'>+				     struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	int i, wsi_controller_index = -1, node_index = -1;</div><div class='add'>+	bool control;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_devices; i++) {</div><div class='add'>+		control = of_property_read_bool(ag-&gt;wsi_node[i], "qcom,wsi-controller");</div><div class='add'>+		if (control)</div><div class='add'>+			wsi_controller_index = i;</div><div class='add'>+</div><div class='add'>+		if (ag-&gt;wsi_node[i] == ab-&gt;dev-&gt;of_node)</div><div class='add'>+			node_index = i;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (wsi_controller_index == -1) {</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT, "wsi controller is not defined in dt");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (node_index == -1) {</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT, "unable to get WSI node index");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab-&gt;wsi_info.index = (ag-&gt;num_devices + node_index - wsi_controller_index) %</div><div class='add'>+		ag-&gt;num_devices;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ath12k_hw_group *ath12k_core_hw_group_assign(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_wsi_info *wsi = &amp;ab-&gt;wsi_info;</div><div class='add'>+	struct ath12k_hw_group *ag;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ath12k_hw_group_mutex);</div><div class='add'>+</div><div class='add'>+	if (ath12k_ftm_mode)</div><div class='add'>+		goto invalid_group;</div><div class='add'>+</div><div class='add'>+	/* The grouping of multiple devices will be done based on device tree file.</div><div class='add'>+	 * The platforms that do not have any valid group information would have</div><div class='add'>+	 * each device to be part of its own invalid group.</div><div class='add'>+	 *</div><div class='add'>+	 * We use group id ATH12K_INVALID_GROUP_ID for single device group</div><div class='add'>+	 * which didn't have dt entry or wrong dt entry, there could be many</div><div class='add'>+	 * groups with same group id, i.e ATH12K_INVALID_GROUP_ID. So</div><div class='add'>+	 * default group id of ATH12K_INVALID_GROUP_ID combined with</div><div class='add'>+	 * num devices in ath12k_hw_group determines if the group is</div><div class='add'>+	 * multi device or single device group</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	ag = ath12k_core_hw_group_find_by_dt(ab);</div><div class='add'>+	if (!ag) {</div><div class='add'>+		ag = ath12k_core_hw_group_alloc(ab);</div><div class='add'>+		if (!ag) {</div><div class='add'>+			ath12k_warn(ab, "unable to create new hw group\n");</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ath12k_core_get_wsi_info(ag, ab) ||</div><div class='add'>+		    ath12k_core_get_wsi_index(ag, ab)) {</div><div class='add'>+			ath12k_dbg(ab, ATH12K_DBG_BOOT,</div><div class='add'>+				   "unable to get wsi info from dt, grouping single device");</div><div class='add'>+			ag-&gt;id = ATH12K_INVALID_GROUP_ID;</div><div class='add'>+			ag-&gt;num_devices = 1;</div><div class='add'>+			memset(ag-&gt;wsi_node, 0, sizeof(ag-&gt;wsi_node));</div><div class='add'>+			wsi-&gt;index = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		goto exit;</div><div class='add'>+	} else if (test_bit(ATH12K_GROUP_FLAG_UNREGISTER, &amp;ag-&gt;flags)) {</div><div class='add'>+		ath12k_dbg(ab, ATH12K_DBG_BOOT, "group id %d in unregister state\n",</div><div class='add'>+			   ag-&gt;id);</div><div class='add'>+		goto invalid_group;</div><div class='add'>+	} else {</div><div class='add'>+		if (ath12k_core_get_wsi_index(ag, ab))</div><div class='add'>+			goto invalid_group;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+invalid_group:</div><div class='add'>+	ag = ath12k_core_hw_group_alloc(ab);</div><div class='add'>+	if (!ag) {</div><div class='add'>+		ath12k_warn(ab, "unable to create new hw group\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ag-&gt;id = ATH12K_INVALID_GROUP_ID;</div><div class='add'>+	ag-&gt;num_devices = 1;</div><div class='add'>+	wsi-&gt;index = 0;</div><div class='add'>+</div><div class='add'>+	ath12k_dbg(ab, ATH12K_DBG_BOOT, "single device added to hardware group\n");</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	if (ag-&gt;num_probed &gt;= ag-&gt;num_devices) {</div><div class='add'>+		ath12k_warn(ab, "unable to add new device to group, max limit reached\n");</div><div class='add'>+		goto invalid_group;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ab-&gt;device_id = ag-&gt;num_probed++;</div><div class='add'>+	ag-&gt;ab[ab-&gt;device_id] = ab;</div><div class='add'>+	ab-&gt;ag = ag;</div><div class='add'>+</div><div class='add'>+	ath12k_dbg(ab, ATH12K_DBG_BOOT, "wsi group-id %d num-devices %d index %d",</div><div class='add'>+		   ag-&gt;id, ag-&gt;num_devices, wsi-&gt;index);</div><div class='add'>+</div><div class='add'>+	return ag;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_core_hw_group_unassign(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_hw_group *ag = ath12k_ab_to_ag(ab);</div><div class='add'>+	u8 device_id = ab-&gt;device_id;</div><div class='add'>+	int num_probed;</div><div class='add'>+</div><div class='add'>+	if (!ag)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(device_id &gt;= ag-&gt;num_devices)) {</div><div class='add'>+		mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(ag-&gt;ab[device_id] != ab)) {</div><div class='add'>+		mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ag-&gt;ab[device_id] = NULL;</div><div class='add'>+	ab-&gt;ag = NULL;</div><div class='add'>+	ab-&gt;device_id = ATH12K_INVALID_DEVICE_ID;</div><div class='add'>+</div><div class='add'>+	if (ag-&gt;num_probed)</div><div class='add'>+		ag-&gt;num_probed--;</div><div class='add'>+</div><div class='add'>+	num_probed = ag-&gt;num_probed;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (!num_probed)</div><div class='add'>+		ath12k_core_hw_group_free(ag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_core_hw_group_destroy(struct ath12k_hw_group *ag)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!ag))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_devices; i++) {</div><div class='add'>+		ab = ag-&gt;ab[i];</div><div class='add'>+		if (!ab)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ath12k_core_soc_destroy(ab);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_core_hw_group_cleanup(struct ath12k_hw_group *ag)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!ag)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (test_bit(ATH12K_GROUP_FLAG_UNREGISTER, &amp;ag-&gt;flags)) {</div><div class='add'>+		mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_bit(ATH12K_GROUP_FLAG_UNREGISTER, &amp;ag-&gt;flags);</div><div class='add'>+</div><div class='add'>+	ath12k_core_hw_group_stop(ag);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_devices; i++) {</div><div class='add'>+		ab = ag-&gt;ab[i];</div><div class='add'>+		if (!ab)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;ab-&gt;core_lock);</div><div class='add'>+		ath12k_core_stop(ab);</div><div class='add'>+		mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_core_hw_group_create(struct ath12k_hw_group *ag)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_devices; i++) {</div><div class='add'>+		ab = ag-&gt;ab[i];</div><div class='add'>+		if (!ab)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;ab-&gt;core_lock);</div><div class='add'>+</div><div class='add'>+		ret = ath12k_core_soc_create(ab);</div><div class='add'>+		if (ret) {</div><div class='add'>+			mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+			ath12k_err(ab, "failed to create soc %d core: %d\n", i, ret);</div><div class='add'>+			goto destroy;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy:</div><div class='add'>+	for (i--; i &gt;= 0; i--) {</div><div class='add'>+		ab = ag-&gt;ab[i];</div><div class='add'>+		if (!ab)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;ab-&gt;core_lock);</div><div class='add'>+		ath12k_core_soc_destroy(ab);</div><div class='add'>+		mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (ath12k_ftm_mode)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (ag-&gt;num_devices == 1) {</div><div class='add'>+		ab = ag-&gt;ab[0];</div><div class='add'>+		/* QCN9274 firmware uses firmware IE for MLO advertisement */</div><div class='add'>+		if (ab-&gt;fw.fw_features_valid) {</div><div class='add'>+			ag-&gt;mlo_capable =</div><div class='add'>+				ath12k_fw_feature_supported(ab, ATH12K_FW_FEATURE_MLO);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* while WCN7850 firmware uses QMI single_chip_mlo_support bit */</div><div class='add'>+		ag-&gt;mlo_capable = ab-&gt;single_chip_mlo_support;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ag-&gt;mlo_capable = true;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ag-&gt;num_devices; i++) {</div><div class='add'>+		ab = ag-&gt;ab[i];</div><div class='add'>+		if (!ab)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* even if 1 device's firmware feature indicates MLO</div><div class='add'>+		 * unsupported, make MLO unsupported for the whole group</div><div class='add'>+		 */</div><div class='add'>+		if (!ath12k_fw_feature_supported(ab, ATH12K_FW_FEATURE_MLO)) {</div><div class='add'>+			ag-&gt;mlo_capable = false;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ath12k_core_init(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_hw_group *ag;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	ret = ath12k_core_panic_notifier_register(ab);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		ath12k_warn(ab, "failed to register panic handler: %d\n", ret);</div><div class='ctx'> </div><div class='add'>+	mutex_lock(&amp;ath12k_hw_group_mutex);</div><div class='add'>+</div><div class='add'>+	ag = ath12k_core_hw_group_assign(ab);</div><div class='add'>+	if (!ag) {</div><div class='add'>+		mutex_unlock(&amp;ath12k_hw_group_mutex);</div><div class='add'>+		ath12k_warn(ab, "unable to get hw group\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err_unregister_notifier;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ath12k_hw_group_mutex);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	ath12k_dbg(ab, ATH12K_DBG_BOOT, "num devices %d num probed %d\n",</div><div class='add'>+		   ag-&gt;num_devices, ag-&gt;num_probed);</div><div class='add'>+</div><div class='add'>+	if (ath12k_core_hw_group_create_ready(ag)) {</div><div class='add'>+		ret = ath12k_core_hw_group_create(ag);</div><div class='add'>+		if (ret) {</div><div class='add'>+			mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+			ath12k_warn(ab, "unable to create hw group\n");</div><div class='add'>+			goto err_unassign_hw_group;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ag-&gt;mutex);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+err_unassign_hw_group:</div><div class='add'>+	ath12k_core_hw_group_unassign(ab);</div><div class='add'>+err_unregister_notifier:</div><div class='add'>+	ath12k_core_panic_notifier_unregister(ab);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ath12k_core_deinit(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='add'>+	ath12k_core_hw_group_destroy(ab-&gt;ag);</div><div class='add'>+	ath12k_core_hw_group_unassign(ab);</div><div class='ctx'> 	ath12k_core_panic_notifier_unregister(ab);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ab-&gt;core_lock);</div><div class='del'>-</div><div class='del'>-	ath12k_core_pdev_destroy(ab);</div><div class='del'>-	ath12k_core_stop(ab);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;ab-&gt;core_lock);</div><div class='del'>-</div><div class='del'>-	ath12k_hif_power_down(ab, false);</div><div class='del'>-	ath12k_mac_destroy(ab);</div><div class='del'>-	ath12k_core_soc_destroy(ab);</div><div class='del'>-	ath12k_fw_unmap(ab);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ath12k_core_free(struct ath12k_base *ab)</div><div class='hunk'>@@ -1312,6 +2259,8 @@ struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size,</div><div class='ctx'> 	INIT_WORK(&amp;ab-&gt;restart_work, ath12k_core_restart);</div><div class='ctx'> 	INIT_WORK(&amp;ab-&gt;reset_work, ath12k_core_reset);</div><div class='ctx'> 	INIT_WORK(&amp;ab-&gt;rfkill_work, ath12k_rfkill_work);</div><div class='add'>+	INIT_WORK(&amp;ab-&gt;dump_work, ath12k_coredump_upload);</div><div class='add'>+	INIT_WORK(&amp;ab-&gt;update_11d_work, ath12k_update_11d);</div><div class='ctx'> </div><div class='ctx'> 	timer_setup(&amp;ab-&gt;rx_replenish_retry, ath12k_ce_rx_replenish_retry, 0);</div><div class='ctx'> 	init_completion(&amp;ab-&gt;htc_suspend);</div><div class='hunk'>@@ -1321,7 +2270,7 @@ struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size,</div><div class='ctx'> 	ab-&gt;dev = dev;</div><div class='ctx'> 	ab-&gt;hif.bus = bus;</div><div class='ctx'> 	ab-&gt;qmi.num_radios = U8_MAX;</div><div class='del'>-	ab-&gt;mlo_capable_flags = ATH12K_INTRA_DEVICE_MLO_SUPPORT;</div><div class='add'>+	ab-&gt;single_chip_mlo_support = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Device index used to identify the devices in a group.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -1342,5 +2291,31 @@ err_sc_free:</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11be wireless LAN cards.");</div><div class='add'>+static int ath12k_init(void)</div><div class='add'>+{</div><div class='add'>+	ahb_err = ath12k_ahb_init();</div><div class='add'>+	if (ahb_err)</div><div class='add'>+		pr_warn("Failed to initialize ath12k AHB device: %d\n", ahb_err);</div><div class='add'>+</div><div class='add'>+	pci_err = ath12k_pci_init();</div><div class='add'>+	if (pci_err)</div><div class='add'>+		pr_warn("Failed to initialize ath12k PCI device: %d\n", pci_err);</div><div class='add'>+</div><div class='add'>+	/* If both failed, return one of the failures (arbitrary) */</div><div class='add'>+	return ahb_err &amp;&amp; pci_err ? ahb_err : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_exit(void)</div><div class='add'>+{</div><div class='add'>+	if (!pci_err)</div><div class='add'>+		ath12k_pci_exit();</div><div class='add'>+</div><div class='add'>+	if (!ahb_err)</div><div class='add'>+		ath12k_ahb_exit();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(ath12k_init);</div><div class='add'>+module_exit(ath12k_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Driver support for Qualcomm Technologies 802.11be WLAN devices");</div><div class='ctx'> MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h<br/>index 7f2e9a9b4097..3c1e0069be1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/core.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/core.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/core.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef ATH12K_CORE_H</div><div class='hunk'>@@ -14,7 +14,10 @@</div><div class='ctx'> #include &lt;linux/dmi.h&gt;</div><div class='ctx'> #include &lt;linux/ctype.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/of_reserved_mem.h&gt;</div><div class='ctx'> #include &lt;linux/panic_notifier.h&gt;</div><div class='add'>+#include &lt;linux/average.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include "qmi.h"</div><div class='ctx'> #include "htc.h"</div><div class='ctx'> #include "wmi.h"</div><div class='hunk'>@@ -30,6 +33,7 @@</div><div class='ctx'> #include "acpi.h"</div><div class='ctx'> #include "wow.h"</div><div class='ctx'> #include "debugfs_htt_stats.h"</div><div class='add'>+#include "coredump.h"</div><div class='ctx'> </div><div class='ctx'> #define SM(_v, _f) (((_v) &lt;&lt; _f##_LSB) &amp; _f##_MASK)</div><div class='ctx'> </div><div class='hunk'>@@ -51,8 +55,6 @@</div><div class='ctx'> </div><div class='ctx'> #define ATH12K_INVALID_HW_MAC_ID	0xFF</div><div class='ctx'> #define ATH12K_CONNECTION_LOSS_HZ	(3 * HZ)</div><div class='del'>-#define	ATH12K_RX_RATE_TABLE_NUM	320</div><div class='del'>-#define	ATH12K_RX_RATE_TABLE_11AX_NUM	576</div><div class='ctx'> </div><div class='ctx'> #define ATH12K_MON_TIMER_INTERVAL  10</div><div class='ctx'> #define ATH12K_RESET_TIMEOUT_HZ			(20 * HZ)</div><div class='hunk'>@@ -62,6 +64,17 @@</div><div class='ctx'> #define ATH12K_RECONFIGURE_TIMEOUT_HZ		(10 * HZ)</div><div class='ctx'> #define ATH12K_RECOVER_START_TIMEOUT_HZ		(20 * HZ)</div><div class='ctx'> </div><div class='add'>+#define ATH12K_MAX_DEVICES 3</div><div class='add'>+#define ATH12K_GROUP_MAX_RADIO (ATH12K_MAX_DEVICES * MAX_RADIOS)</div><div class='add'>+#define ATH12K_INVALID_GROUP_ID  0xFF</div><div class='add'>+#define ATH12K_INVALID_DEVICE_ID 0xFF</div><div class='add'>+</div><div class='add'>+#define ATH12K_MAX_MLO_PEERS            256</div><div class='add'>+#define ATH12K_MLO_PEER_ID_INVALID      0xFFFF</div><div class='add'>+</div><div class='add'>+#define ATH12K_INVALID_RSSI_FULL -1</div><div class='add'>+#define ATH12K_INVALID_RSSI_EMPTY -128</div><div class='add'>+</div><div class='ctx'> enum ath12k_bdf_search {</div><div class='ctx'> 	ATH12K_BDF_SEARCH_DEFAULT,</div><div class='ctx'> 	ATH12K_BDF_SEARCH_BUS_AND_BOARD,</div><div class='hunk'>@@ -78,6 +91,7 @@ enum wme_ac {</div><div class='ctx'> #define ATH12K_HT_MCS_MAX	7</div><div class='ctx'> #define ATH12K_VHT_MCS_MAX	9</div><div class='ctx'> #define ATH12K_HE_MCS_MAX	11</div><div class='add'>+#define ATH12K_EHT_MCS_MAX	15</div><div class='ctx'> </div><div class='ctx'> enum ath12k_crypt_mode {</div><div class='ctx'> 	/* Only use hardware crypto engine */</div><div class='hunk'>@@ -94,9 +108,18 @@ static inline enum wme_ac ath12k_tid_to_ac(u32 tid)</div><div class='ctx'> 		WME_AC_VO);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline u64 ath12k_le32hilo_to_u64(__le32 hi, __le32 lo)</div><div class='add'>+{</div><div class='add'>+	u64 hi64 = le32_to_cpu(hi);</div><div class='add'>+	u64 lo64 = le32_to_cpu(lo);</div><div class='add'>+</div><div class='add'>+	return (hi64 &lt;&lt; 32) | lo64;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> enum ath12k_skb_flags {</div><div class='ctx'> 	ATH12K_SKB_HW_80211_ENCAP = BIT(0),</div><div class='ctx'> 	ATH12K_SKB_CIPHER_SET = BIT(1),</div><div class='add'>+	ATH12K_SKB_MLO_STA = BIT(2),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath12k_skb_cb {</div><div class='hunk'>@@ -106,6 +129,7 @@ struct ath12k_skb_cb {</div><div class='ctx'> 	dma_addr_t paddr_ext_desc;</div><div class='ctx'> 	u32 cipher;</div><div class='ctx'> 	u8 flags;</div><div class='add'>+	u8 link_id;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath12k_skb_rxcb {</div><div class='hunk'>@@ -118,17 +142,19 @@ struct ath12k_skb_rxcb {</div><div class='ctx'> 	struct hal_rx_desc *rx_desc;</div><div class='ctx'> 	u8 err_rel_src;</div><div class='ctx'> 	u8 err_code;</div><div class='del'>-	u8 mac_id;</div><div class='add'>+	u8 hw_link_id;</div><div class='ctx'> 	u8 unmapped;</div><div class='ctx'> 	u8 is_frag;</div><div class='ctx'> 	u8 tid;</div><div class='ctx'> 	u16 peer_id;</div><div class='add'>+	bool is_end_of_ppdu;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum ath12k_hw_rev {</div><div class='ctx'> 	ATH12K_HW_QCN9274_HW10,</div><div class='ctx'> 	ATH12K_HW_QCN9274_HW20,</div><div class='del'>-	ATH12K_HW_WCN7850_HW20</div><div class='add'>+	ATH12K_HW_WCN7850_HW20,</div><div class='add'>+	ATH12K_HW_IPQ5332_HW10,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum ath12k_firmware_mode {</div><div class='hunk'>@@ -141,6 +167,7 @@ enum ath12k_firmware_mode {</div><div class='ctx'> </div><div class='ctx'> #define ATH12K_IRQ_NUM_MAX 57</div><div class='ctx'> #define ATH12K_EXT_IRQ_NUM_MAX	16</div><div class='add'>+#define ATH12K_MAX_TCL_RING_NUM	3</div><div class='ctx'> </div><div class='ctx'> struct ath12k_ext_irq_grp {</div><div class='ctx'> 	struct ath12k_base *ab;</div><div class='hunk'>@@ -148,13 +175,39 @@ struct ath12k_ext_irq_grp {</div><div class='ctx'> 	u32 num_irq;</div><div class='ctx'> 	u32 grp_id;</div><div class='ctx'> 	u64 timestamp;</div><div class='add'>+	bool napi_enabled;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	struct net_device *napi_ndev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum ath12k_smbios_cc_type {</div><div class='add'>+	/* disable country code setting from SMBIOS */</div><div class='add'>+	ATH12K_SMBIOS_CC_DISABLE = 0,</div><div class='add'>+</div><div class='add'>+	/* set country code by ANSI country name, based on ISO3166-1 alpha2 */</div><div class='add'>+	ATH12K_SMBIOS_CC_ISO = 1,</div><div class='add'>+</div><div class='add'>+	/* worldwide regdomain */</div><div class='add'>+	ATH12K_SMBIOS_CC_WW = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ath12k_smbios_bdf {</div><div class='ctx'> 	struct dmi_header hdr;</div><div class='del'>-	u32 padding;</div><div class='add'>+	u8 features_disabled;</div><div class='add'>+</div><div class='add'>+	/* enum ath12k_smbios_cc_type */</div><div class='add'>+	u8 country_code_flag;</div><div class='add'>+</div><div class='add'>+	/* To set specific country, you need to set country code</div><div class='add'>+	 * flag=ATH12K_SMBIOS_CC_ISO first, then if country is United</div><div class='add'>+	 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=</div><div class='add'>+	 * 0x53). To set country to INDONESIA, then country code value =</div><div class='add'>+	 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =</div><div class='add'>+	 * ATH12K_SMBIOS_CC_WW, then you can use worldwide regulatory</div><div class='add'>+	 * setting.</div><div class='add'>+	 */</div><div class='add'>+	u16 cc_code;</div><div class='add'>+</div><div class='ctx'> 	u8 bdf_enabled;</div><div class='ctx'> 	u8 bdf_ext[];</div><div class='ctx'> } __packed;</div><div class='hunk'>@@ -199,8 +252,19 @@ enum ath12k_scan_state {</div><div class='ctx'> 	ATH12K_SCAN_ABORTING,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum ath12k_11d_state {</div><div class='add'>+	ATH12K_11D_IDLE,</div><div class='add'>+	ATH12K_11D_PREPARING,</div><div class='add'>+	ATH12K_11D_RUNNING,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ath12k_hw_group_flags {</div><div class='add'>+	ATH12K_GROUP_FLAG_REGISTERED,</div><div class='add'>+	ATH12K_GROUP_FLAG_UNREGISTER,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum ath12k_dev_flags {</div><div class='del'>-	ATH12K_CAC_RUNNING,</div><div class='add'>+	ATH12K_FLAG_CAC_RUNNING,</div><div class='ctx'> 	ATH12K_FLAG_CRASH_FLUSH,</div><div class='ctx'> 	ATH12K_FLAG_RAW_MODE,</div><div class='ctx'> 	ATH12K_FLAG_HW_CRYPTO_DISABLED,</div><div class='hunk'>@@ -211,6 +275,9 @@ enum ath12k_dev_flags {</div><div class='ctx'> 	ATH12K_FLAG_HTC_SUSPEND_COMPLETE,</div><div class='ctx'> 	ATH12K_FLAG_CE_IRQ_ENABLED,</div><div class='ctx'> 	ATH12K_FLAG_EXT_IRQ_ENABLED,</div><div class='add'>+	ATH12K_FLAG_QMI_FW_READY_COMPLETE,</div><div class='add'>+	ATH12K_FLAG_FTM_SEGMENTED,</div><div class='add'>+	ATH12K_FLAG_FIXED_MEM_REGION,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath12k_tx_conf {</div><div class='hunk'>@@ -220,8 +287,9 @@ struct ath12k_tx_conf {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath12k_key_conf {</div><div class='del'>-	bool changed;</div><div class='ctx'> 	enum set_key_cmd cmd;</div><div class='add'>+	struct list_head list;</div><div class='add'>+	struct ieee80211_sta *sta;</div><div class='ctx'> 	struct ieee80211_key_conf *key;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -238,10 +306,8 @@ struct ath12k_rekey_data {</div><div class='ctx'> 	bool enable_offload;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ath12k_vif {</div><div class='add'>+struct ath12k_link_vif {</div><div class='ctx'> 	u32 vdev_id;</div><div class='del'>-	enum wmi_vdev_type vdev_type;</div><div class='del'>-	enum wmi_vdev_subtype vdev_subtype;</div><div class='ctx'> 	u32 beacon_interval;</div><div class='ctx'> 	u32 dtim_period;</div><div class='ctx'> 	u16 ast_hash;</div><div class='hunk'>@@ -251,13 +317,54 @@ struct ath12k_vif {</div><div class='ctx'> 	u8 search_type;</div><div class='ctx'> </div><div class='ctx'> 	struct ath12k *ar;</div><div class='del'>-	struct ieee80211_vif *vif;</div><div class='ctx'> </div><div class='ctx'> 	int bank_id;</div><div class='ctx'> 	u8 vdev_id_check_en;</div><div class='add'>+	bool beacon_prot;</div><div class='ctx'> </div><div class='ctx'> 	struct wmi_wmm_params_all_arg wmm_params;</div><div class='ctx'> 	struct list_head list;</div><div class='add'>+</div><div class='add'>+	bool is_created;</div><div class='add'>+	bool is_started;</div><div class='add'>+	bool is_up;</div><div class='add'>+	u8 bssid[ETH_ALEN];</div><div class='add'>+	struct cfg80211_bitrate_mask bitrate_mask;</div><div class='add'>+	struct delayed_work connection_loss_work;</div><div class='add'>+	int num_legacy_stations;</div><div class='add'>+	int rtscts_prot_mode;</div><div class='add'>+	int txpower;</div><div class='add'>+	bool rsnie_present;</div><div class='add'>+	bool wpaie_present;</div><div class='add'>+	u8 vdev_stats_id;</div><div class='add'>+	u32 punct_bitmap;</div><div class='add'>+	u8 link_id;</div><div class='add'>+	struct ath12k_vif *ahvif;</div><div class='add'>+	struct ath12k_rekey_data rekey_data;</div><div class='add'>+	struct ath12k_link_stats link_stats;</div><div class='add'>+	spinlock_t link_stats_lock; /* Protects updates to link_stats */</div><div class='add'>+</div><div class='add'>+	u8 current_cntdown_counter;</div><div class='add'>+</div><div class='add'>+	/* only used in station mode */</div><div class='add'>+	bool is_sta_assoc_link;</div><div class='add'>+</div><div class='add'>+	struct ath12k_reg_tpc_power_info reg_tpc_info;</div><div class='add'>+</div><div class='add'>+	bool group_key_valid;</div><div class='add'>+	struct wmi_vdev_install_key_arg group_key;</div><div class='add'>+	bool pairwise_key_done;</div><div class='add'>+	u16 num_stations;</div><div class='add'>+	bool is_csa_in_progress;</div><div class='add'>+	struct wiphy_work bcn_tx_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath12k_vif {</div><div class='add'>+	enum wmi_vdev_type vdev_type;</div><div class='add'>+	enum wmi_vdev_subtype vdev_subtype;</div><div class='add'>+	struct ieee80211_vif *vif;</div><div class='add'>+	struct ath12k_hw *ah;</div><div class='add'>+</div><div class='ctx'> 	union {</div><div class='ctx'> 		struct {</div><div class='ctx'> 			u32 uapsd;</div><div class='hunk'>@@ -275,26 +382,17 @@ struct ath12k_vif {</div><div class='ctx'> 		} ap;</div><div class='ctx'> 	} u;</div><div class='ctx'> </div><div class='del'>-	bool is_created;</div><div class='del'>-	bool is_started;</div><div class='del'>-	bool is_up;</div><div class='ctx'> 	u32 aid;</div><div class='del'>-	u8 bssid[ETH_ALEN];</div><div class='del'>-	struct cfg80211_bitrate_mask bitrate_mask;</div><div class='del'>-	struct delayed_work connection_loss_work;</div><div class='del'>-	int num_legacy_stations;</div><div class='del'>-	int rtscts_prot_mode;</div><div class='del'>-	int txpower;</div><div class='del'>-	bool rsnie_present;</div><div class='del'>-	bool wpaie_present;</div><div class='ctx'> 	u32 key_cipher;</div><div class='ctx'> 	u8 tx_encap_type;</div><div class='del'>-	u8 vdev_stats_id;</div><div class='del'>-	u32 punct_bitmap;</div><div class='ctx'> 	bool ps;</div><div class='del'>-	struct ath12k_vif_cache *cache;</div><div class='del'>-	struct ath12k_rekey_data rekey_data;</div><div class='add'>+	atomic_t mcbc_gsn;</div><div class='ctx'> </div><div class='add'>+	struct ath12k_link_vif deflink;</div><div class='add'>+	struct ath12k_link_vif __rcu *link[ATH12K_NUM_MAX_LINKS];</div><div class='add'>+	struct ath12k_vif_cache *cache[IEEE80211_MLD_MAX_NUM_LINKS];</div><div class='add'>+	/* indicates bitmap of link vif created in FW */</div><div class='add'>+	u32 links_map;</div><div class='ctx'> 	/* Must be last - ends in a flexible-array member.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,</div><div class='hunk'>@@ -306,7 +404,7 @@ struct ath12k_vif {</div><div class='ctx'> struct ath12k_vif_iter {</div><div class='ctx'> 	u32 vdev_id;</div><div class='ctx'> 	struct ath12k *ar;</div><div class='del'>-	struct ath12k_vif *arvif;</div><div class='add'>+	struct ath12k_link_vif *arvif;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define HAL_AST_IDX_INVALID	0xFFFF</div><div class='hunk'>@@ -314,20 +412,22 @@ struct ath12k_vif_iter {</div><div class='ctx'> #define HAL_RX_MAX_MCS_HT	31</div><div class='ctx'> #define HAL_RX_MAX_MCS_VHT	9</div><div class='ctx'> #define HAL_RX_MAX_MCS_HE	11</div><div class='add'>+#define HAL_RX_MAX_MCS_BE	15</div><div class='ctx'> #define HAL_RX_MAX_NSS		8</div><div class='ctx'> #define HAL_RX_MAX_NUM_LEGACY_RATES 12</div><div class='del'>-#define ATH12K_RX_RATE_TABLE_11AX_NUM	576</div><div class='del'>-#define ATH12K_RX_RATE_TABLE_NUM 320</div><div class='add'>+</div><div class='add'>+#define ATH12K_SCAN_TIMEOUT_HZ (20 * HZ)</div><div class='ctx'> </div><div class='ctx'> struct ath12k_rx_peer_rate_stats {</div><div class='ctx'> 	u64 ht_mcs_count[HAL_RX_MAX_MCS_HT + 1];</div><div class='ctx'> 	u64 vht_mcs_count[HAL_RX_MAX_MCS_VHT + 1];</div><div class='ctx'> 	u64 he_mcs_count[HAL_RX_MAX_MCS_HE + 1];</div><div class='add'>+	u64 be_mcs_count[HAL_RX_MAX_MCS_BE + 1];</div><div class='ctx'> 	u64 nss_count[HAL_RX_MAX_NSS];</div><div class='ctx'> 	u64 bw_count[HAL_RX_BW_MAX];</div><div class='ctx'> 	u64 gi_count[HAL_RX_GI_MAX];</div><div class='ctx'> 	u64 legacy_count[HAL_RX_MAX_NUM_LEGACY_RATES];</div><div class='del'>-	u64 rx_rate[ATH12K_RX_RATE_TABLE_11AX_NUM];</div><div class='add'>+	u64 rx_rate[HAL_RX_BW_MAX][HAL_RX_GI_MAX][HAL_RX_MAX_NSS][HAL_RX_MAX_MCS_HT + 1];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath12k_rx_peer_stats {</div><div class='hunk'>@@ -341,10 +441,6 @@ struct ath12k_rx_peer_stats {</div><div class='ctx'> 	u64 non_ampdu_msdu_count;</div><div class='ctx'> 	u64 stbc_count;</div><div class='ctx'> 	u64 beamformed_count;</div><div class='del'>-	u64 mcs_count[HAL_RX_MAX_MCS + 1];</div><div class='del'>-	u64 nss_count[HAL_RX_MAX_NSS];</div><div class='del'>-	u64 bw_count[HAL_RX_BW_MAX];</div><div class='del'>-	u64 gi_count[HAL_RX_GI_MAX];</div><div class='ctx'> 	u64 coding_count[HAL_RX_SU_MU_CODING_MAX];</div><div class='ctx'> 	u64 tid_count[IEEE80211_NUM_TIDS + 1];</div><div class='ctx'> 	u64 pream_cnt[HAL_RX_PREAMBLE_MAX];</div><div class='hunk'>@@ -441,32 +537,88 @@ struct ath12k_wbm_tx_stats {</div><div class='ctx'> 	u64 wbm_tx_comp_stats[HAL_WBM_REL_HTT_TX_COMP_STATUS_MAX];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ath12k_sta {</div><div class='del'>-	struct ath12k_vif *arvif;</div><div class='add'>+DECLARE_EWMA(avg_rssi, 10, 8)</div><div class='add'>+</div><div class='add'>+struct ath12k_link_sta {</div><div class='add'>+	struct ath12k_link_vif *arvif;</div><div class='add'>+	struct ath12k_sta *ahsta;</div><div class='add'>+</div><div class='add'>+	/* link address similar to ieee80211_link_sta */</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> </div><div class='ctx'> 	/* the following are protected by ar-&gt;data_lock */</div><div class='ctx'> 	u32 changed; /* IEEE80211_RC_* */</div><div class='ctx'> 	u32 bw;</div><div class='ctx'> 	u32 nss;</div><div class='ctx'> 	u32 smps;</div><div class='del'>-	enum hal_pn_type pn_type;</div><div class='ctx'> </div><div class='del'>-	struct work_struct update_wk;</div><div class='add'>+	struct wiphy_work update_wk;</div><div class='ctx'> 	struct rate_info txrate;</div><div class='ctx'> 	struct rate_info last_txrate;</div><div class='ctx'> 	u64 rx_duration;</div><div class='ctx'> 	u64 tx_duration;</div><div class='ctx'> 	u8 rssi_comb;</div><div class='add'>+	struct ewma_avg_rssi avg_rssi;</div><div class='add'>+	u8 link_id;</div><div class='ctx'> 	struct ath12k_rx_peer_stats *rx_stats;</div><div class='ctx'> 	struct ath12k_wbm_tx_stats *wbm_tx_stats;</div><div class='ctx'> 	u32 bw_prev;</div><div class='add'>+	u32 peer_nss;</div><div class='add'>+	s8 rssi_beacon;</div><div class='add'>+	s8 chain_signal[IEEE80211_MAX_CHAINS];</div><div class='add'>+</div><div class='add'>+	/* For now the assoc link will be considered primary */</div><div class='add'>+	bool is_assoc_link;</div><div class='add'>+</div><div class='add'>+	 /* for firmware use only */</div><div class='add'>+	u8 link_idx;</div><div class='add'>+	u32 tx_retry_failed;</div><div class='add'>+	u32 tx_retry_count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define ATH12K_MIN_5G_FREQ 4150</div><div class='del'>-#define ATH12K_MIN_6G_FREQ 5925</div><div class='del'>-#define ATH12K_MAX_6G_FREQ 7115</div><div class='add'>+struct ath12k_reoq_buf {</div><div class='add'>+	void *vaddr;</div><div class='add'>+	dma_addr_t paddr_aligned;</div><div class='add'>+	u32 size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath12k_sta {</div><div class='add'>+	struct ath12k_vif *ahvif;</div><div class='add'>+	enum hal_pn_type pn_type;</div><div class='add'>+	struct ath12k_link_sta deflink;</div><div class='add'>+	struct ath12k_link_sta __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS];</div><div class='add'>+	/* indicates bitmap of link sta created in FW */</div><div class='add'>+	u16 links_map;</div><div class='add'>+	u8 assoc_link_id;</div><div class='add'>+	u16 ml_peer_id;</div><div class='add'>+	u8 num_peer;</div><div class='add'>+</div><div class='add'>+	enum ieee80211_sta_state state;</div><div class='add'>+</div><div class='add'>+	struct ath12k_reoq_buf reoq_bufs[IEEE80211_NUM_TIDS + 1];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ATH12K_HALF_20MHZ_BW	10</div><div class='add'>+#define ATH12K_2GHZ_MIN_CENTER	2412</div><div class='add'>+#define ATH12K_2GHZ_MAX_CENTER	2484</div><div class='add'>+#define ATH12K_5GHZ_MIN_CENTER	4900</div><div class='add'>+#define ATH12K_5GHZ_MAX_CENTER	5920</div><div class='add'>+#define ATH12K_6GHZ_MIN_CENTER	5935</div><div class='add'>+#define ATH12K_6GHZ_MAX_CENTER	7115</div><div class='add'>+#define ATH12K_MIN_2GHZ_FREQ	(ATH12K_2GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW - 1)</div><div class='add'>+#define ATH12K_MAX_2GHZ_FREQ	(ATH12K_2GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW + 1)</div><div class='add'>+#define ATH12K_MIN_5GHZ_FREQ	(ATH12K_5GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW)</div><div class='add'>+#define ATH12K_MAX_5GHZ_FREQ	(ATH12K_5GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW)</div><div class='add'>+#define ATH12K_MIN_6GHZ_FREQ	(ATH12K_6GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW)</div><div class='add'>+#define ATH12K_MAX_6GHZ_FREQ	(ATH12K_6GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW)</div><div class='ctx'> #define ATH12K_NUM_CHANS 101</div><div class='del'>-#define ATH12K_MAX_5G_CHAN 173</div><div class='add'>+#define ATH12K_MAX_5GHZ_CHAN 173</div><div class='add'>+</div><div class='add'>+static inline bool ath12k_is_2ghz_channel_freq(u32 freq)</div><div class='add'>+{</div><div class='add'>+	return freq &gt;= ATH12K_MIN_2GHZ_FREQ &amp;&amp;</div><div class='add'>+	       freq &lt;= ATH12K_MAX_2GHZ_FREQ;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> enum ath12k_hw_state {</div><div class='ctx'> 	ATH12K_HW_STATE_OFF,</div><div class='hunk'>@@ -474,18 +626,26 @@ enum ath12k_hw_state {</div><div class='ctx'> 	ATH12K_HW_STATE_RESTARTING,</div><div class='ctx'> 	ATH12K_HW_STATE_RESTARTED,</div><div class='ctx'> 	ATH12K_HW_STATE_WEDGED,</div><div class='add'>+	ATH12K_HW_STATE_TM,</div><div class='ctx'> 	/* Add other states as required */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Antenna noise floor */</div><div class='ctx'> #define ATH12K_DEFAULT_NOISE_FLOOR -95</div><div class='ctx'> </div><div class='add'>+struct ath12k_ftm_event_obj {</div><div class='add'>+	u32 data_pos;</div><div class='add'>+	u32 expected_seq;</div><div class='add'>+	u8 *eventdata;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct ath12k_fw_stats {</div><div class='ctx'> 	u32 pdev_id;</div><div class='ctx'> 	u32 stats_id;</div><div class='ctx'> 	struct list_head pdevs;</div><div class='ctx'> 	struct list_head vdevs;</div><div class='ctx'> 	struct list_head bcn;</div><div class='add'>+	u32 num_vdev_recvd;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath12k_dbg_htt_stats {</div><div class='hunk'>@@ -499,6 +659,12 @@ struct ath12k_debug {</div><div class='ctx'> 	struct dentry *debugfs_pdev;</div><div class='ctx'> 	struct dentry *debugfs_pdev_symlink;</div><div class='ctx'> 	struct ath12k_dbg_htt_stats htt_stats;</div><div class='add'>+	enum wmi_halphy_ctrl_path_stats_id tpc_stats_type;</div><div class='add'>+	bool tpc_request;</div><div class='add'>+	struct completion tpc_complete;</div><div class='add'>+	struct wmi_tpc_stats_arg *tpc_stats;</div><div class='add'>+	u32 rx_filter;</div><div class='add'>+	bool extd_rx_stats;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath12k_per_peer_tx_stats {</div><div class='hunk'>@@ -518,6 +684,15 @@ struct ath12k_per_peer_tx_stats {</div><div class='ctx'> 	bool is_ampdu;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ath12k_pdev_rssi_offsets {</div><div class='add'>+	s32 temp_offset;</div><div class='add'>+	s8 min_nf_dbm;</div><div class='add'>+	/* Cache the sum here to avoid calculating it every time in hot path</div><div class='add'>+	 * noise_floor = min_nf_dbm + temp_offset</div><div class='add'>+	 */</div><div class='add'>+	s32 noise_floor;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define ATH12K_FLUSH_TIMEOUT (5 * HZ)</div><div class='ctx'> #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)</div><div class='ctx'> </div><div class='hunk'>@@ -539,9 +714,10 @@ struct ath12k {</div><div class='ctx'> 		struct delayed_work timeout;</div><div class='ctx'> 		enum ath12k_scan_state state;</div><div class='ctx'> 		bool is_roc;</div><div class='del'>-		int vdev_id;</div><div class='ctx'> 		int roc_freq;</div><div class='ctx'> 		bool roc_notify;</div><div class='add'>+		struct wiphy_work vdev_clean_wk;</div><div class='add'>+		struct ath12k_link_vif *arvif;</div><div class='ctx'> 	} scan;</div><div class='ctx'> </div><div class='ctx'> 	struct {</div><div class='hunk'>@@ -559,16 +735,13 @@ struct ath12k {</div><div class='ctx'> 	u32 txpower_scale;</div><div class='ctx'> 	u32 power_scale;</div><div class='ctx'> 	u32 chan_tx_pwr;</div><div class='add'>+	u32 rts_threshold;</div><div class='ctx'> 	u32 num_stations;</div><div class='ctx'> 	u32 max_num_stations;</div><div class='del'>-	bool monitor_present;</div><div class='del'>-	/* To synchronize concurrent synchronous mac80211 callback operations,</div><div class='del'>-	 * concurrent debugfs configuration and concurrent FW statistics events.</div><div class='del'>-	 */</div><div class='del'>-	struct mutex conf_mutex;</div><div class='add'>+</div><div class='ctx'> 	/* protects the radio specific data like debug stats, ppdu_stats_info stats,</div><div class='del'>-	 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_vif info,</div><div class='del'>-	 * channel context data, survey info, test mode data.</div><div class='add'>+	 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_link_vif info,</div><div class='add'>+	 * channel context data, survey info, test mode data, regd_channel_update_queue.</div><div class='ctx'> 	 */</div><div class='ctx'> 	spinlock_t data_lock;</div><div class='ctx'> </div><div class='hunk'>@@ -627,8 +800,10 @@ struct ath12k {</div><div class='ctx'> 	struct completion bss_survey_done;</div><div class='ctx'> </div><div class='ctx'> 	struct work_struct regd_update_work;</div><div class='add'>+	struct work_struct regd_channel_update_work;</div><div class='add'>+	struct list_head regd_channel_update_queue;</div><div class='ctx'> </div><div class='del'>-	struct work_struct wmi_mgmt_tx_work;</div><div class='add'>+	struct wiphy_work wmi_mgmt_tx_work;</div><div class='ctx'> 	struct sk_buff_head wmi_mgmt_tx_queue;</div><div class='ctx'> </div><div class='ctx'> 	struct ath12k_wow wow;</div><div class='hunk'>@@ -646,19 +821,39 @@ struct ath12k {</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	bool dfs_block_radar_events;</div><div class='del'>-	bool monitor_conf_enabled;</div><div class='ctx'> 	bool monitor_vdev_created;</div><div class='ctx'> 	bool monitor_started;</div><div class='ctx'> 	int monitor_vdev_id;</div><div class='ctx'> </div><div class='del'>-	u32 freq_low;</div><div class='del'>-	u32 freq_high;</div><div class='add'>+	struct wiphy_radio_freq_range freq_range;</div><div class='ctx'> </div><div class='ctx'> 	bool nlo_enabled;</div><div class='add'>+</div><div class='add'>+	/* Protected by wiphy::mtx lock. */</div><div class='add'>+	u32 vdev_id_11d_scan;</div><div class='add'>+	struct completion completed_11d_scan;</div><div class='add'>+	enum ath12k_11d_state state_11d;</div><div class='add'>+	u8 alpha2[REG_ALPHA2_LEN];</div><div class='add'>+	bool regdom_set_by_user;</div><div class='add'>+	struct completion regd_update_completed;</div><div class='add'>+</div><div class='add'>+	struct completion fw_stats_complete;</div><div class='add'>+	struct completion fw_stats_done;</div><div class='add'>+</div><div class='add'>+	struct completion mlo_setup_done;</div><div class='add'>+	u32 mlo_setup_status;</div><div class='add'>+	u8 ftm_msgref;</div><div class='add'>+	struct ath12k_fw_stats fw_stats;</div><div class='add'>+	unsigned long last_tx_power_update;</div><div class='add'>+</div><div class='add'>+	s8 max_allowed_tx_power;</div><div class='add'>+	struct ath12k_pdev_rssi_offsets rssi_info;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ath12k_hw {</div><div class='ctx'> 	struct ieee80211_hw *hw;</div><div class='add'>+	struct device *dev;</div><div class='add'>+</div><div class='ctx'> 	/* Protect the write operation of the hardware state ath12k_hw::state</div><div class='ctx'> 	 * between hardware start&lt;=&gt;reconfigure&lt;=&gt;stop transitions.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -666,8 +861,14 @@ struct ath12k_hw {</div><div class='ctx'> 	enum ath12k_hw_state state;</div><div class='ctx'> 	bool regd_updated;</div><div class='ctx'> 	bool use_6ghz_regd;</div><div class='add'>+</div><div class='ctx'> 	u8 num_radio;</div><div class='ctx'> </div><div class='add'>+	DECLARE_BITMAP(free_ml_peer_id_map, ATH12K_MAX_MLO_PEERS);</div><div class='add'>+</div><div class='add'>+	/* protected by wiphy_lock() */</div><div class='add'>+	struct list_head ml_peers;</div><div class='add'>+</div><div class='ctx'> 	/* Keep last */</div><div class='ctx'> 	struct ath12k radio[] __aligned(sizeof(void *));</div><div class='ctx'> };</div><div class='hunk'>@@ -702,6 +903,10 @@ struct ath12k_pdev_cap {</div><div class='ctx'> 	u32 tx_chain_mask_shift;</div><div class='ctx'> 	u32 rx_chain_mask_shift;</div><div class='ctx'> 	struct ath12k_band_cap band[NUM_NL80211_BANDS];</div><div class='add'>+	u32 eml_cap;</div><div class='add'>+	u32 mld_cap;</div><div class='add'>+	bool nss_ratio_enabled;</div><div class='add'>+	u8 nss_ratio_info;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mlo_timestamp {</div><div class='hunk'>@@ -736,7 +941,7 @@ struct ath12k_board_data {</div><div class='ctx'> 	size_t len;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ath12k_soc_dp_tx_err_stats {</div><div class='add'>+struct ath12k_device_dp_tx_err_stats {</div><div class='ctx'> 	/* TCL Ring Descriptor unavailable */</div><div class='ctx'> 	u32 desc_na[DP_TCL_NUM_RING_MAX];</div><div class='ctx'> 	/* Other failures during dp_tx due to mem allocation failure</div><div class='hunk'>@@ -745,28 +950,89 @@ struct ath12k_soc_dp_tx_err_stats {</div><div class='ctx'> 	atomic_t misc_fail;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ath12k_soc_dp_stats {</div><div class='add'>+struct ath12k_device_dp_stats {</div><div class='ctx'> 	u32 err_ring_pkts;</div><div class='ctx'> 	u32 invalid_rbm;</div><div class='ctx'> 	u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];</div><div class='ctx'> 	u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];</div><div class='ctx'> 	u32 hal_reo_error[DP_REO_DST_RING_MAX];</div><div class='del'>-	struct ath12k_soc_dp_tx_err_stats tx_err;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * enum ath12k_link_capable_flags - link capable flags</div><div class='del'>- *</div><div class='del'>- * Single/Multi link capability information</div><div class='del'>- *</div><div class='del'>- * @ATH12K_INTRA_DEVICE_MLO_SUPPORT: SLO/MLO form between the radio, where all</div><div class='del'>- *	the links (radios) present within a device.</div><div class='del'>- * @ATH12K_INTER_DEVICE_MLO_SUPPORT: SLO/MLO form between the radio, where all</div><div class='del'>- *	the links (radios) present across the devices.</div><div class='add'>+	struct ath12k_device_dp_tx_err_stats tx_err;</div><div class='add'>+	u32 reo_rx[DP_REO_DST_RING_MAX][ATH12K_MAX_DEVICES];</div><div class='add'>+	u32 rx_wbm_rel_source[HAL_WBM_REL_SRC_MODULE_MAX][ATH12K_MAX_DEVICES];</div><div class='add'>+	u32 tqm_rel_reason[MAX_TQM_RELEASE_REASON];</div><div class='add'>+	u32 fw_tx_status[MAX_FW_TX_STATUS];</div><div class='add'>+	u32 tx_wbm_rel_source[HAL_WBM_REL_SRC_MODULE_MAX];</div><div class='add'>+	u32 tx_enqueued[DP_TCL_NUM_RING_MAX];</div><div class='add'>+	u32 tx_completed[DP_TCL_NUM_RING_MAX];</div><div class='add'>+	u32 reo_excep_msdu_buf_type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath12k_reg_freq {</div><div class='add'>+	u32 start_freq;</div><div class='add'>+	u32 end_freq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath12k_mlo_memory {</div><div class='add'>+	struct target_mem_chunk chunk[ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01];</div><div class='add'>+	int mlo_mem_size;</div><div class='add'>+	bool init_done;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath12k_hw_link {</div><div class='add'>+	u8 device_id;</div><div class='add'>+	u8 pdev_idx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Holds info on the group of devices that are registered as a single</div><div class='add'>+ * wiphy, protected with struct ath12k_hw_group::mutex.</div><div class='ctx'>  */</div><div class='del'>-enum ath12k_link_capable_flags {</div><div class='del'>-	ATH12K_INTRA_DEVICE_MLO_SUPPORT	= BIT(0),</div><div class='del'>-	ATH12K_INTER_DEVICE_MLO_SUPPORT	= BIT(1),</div><div class='add'>+struct ath12k_hw_group {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	u8 id;</div><div class='add'>+	u8 num_devices;</div><div class='add'>+	u8 num_probed;</div><div class='add'>+	u8 num_started;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ath12k_base *ab[ATH12K_MAX_DEVICES];</div><div class='add'>+</div><div class='add'>+	/* protects access to this struct */</div><div class='add'>+	struct mutex mutex;</div><div class='add'>+</div><div class='add'>+	/* Holds information of wiphy (hw) registration.</div><div class='add'>+	 *</div><div class='add'>+	 * In Multi/Single Link Operation case, all pdevs are registered as</div><div class='add'>+	 * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is</div><div class='add'>+	 * registered as separate wiphys.</div><div class='add'>+	 */</div><div class='add'>+	struct ath12k_hw *ah[ATH12K_GROUP_MAX_RADIO];</div><div class='add'>+	u8 num_hw;</div><div class='add'>+	bool mlo_capable;</div><div class='add'>+	struct device_node *wsi_node[ATH12K_MAX_DEVICES];</div><div class='add'>+	struct ath12k_mlo_memory mlo_mem;</div><div class='add'>+	struct ath12k_hw_link hw_links[ATH12K_GROUP_MAX_RADIO];</div><div class='add'>+	bool hw_link_id_init_done;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Holds WSI info specific to each device, excluding WSI group info */</div><div class='add'>+struct ath12k_wsi_info {</div><div class='add'>+	u32 index;</div><div class='add'>+	u32 hw_link_id_base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath12k_dp_profile_params {</div><div class='add'>+	u32 tx_comp_ring_size;</div><div class='add'>+	u32 rxdma_monitor_buf_ring_size;</div><div class='add'>+	u32 rxdma_monitor_dst_ring_size;</div><div class='add'>+	u32 num_pool_tx_desc;</div><div class='add'>+	u32 rx_desc_count;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath12k_mem_profile_based_param {</div><div class='add'>+	u32 num_vdevs;</div><div class='add'>+	u32 max_client_single;</div><div class='add'>+	u32 max_client_dbs;</div><div class='add'>+	u32 max_client_dbs_sbs;</div><div class='add'>+	struct ath12k_dp_profile_params dp_params;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Master structure to hold the hw data which may be used in core module */</div><div class='hunk'>@@ -782,6 +1048,10 @@ struct ath12k_base {</div><div class='ctx'> 	/* HW channel counters frequency value in hertz common to all MACs */</div><div class='ctx'> 	u32 cc_freq_hz;</div><div class='ctx'> </div><div class='add'>+	struct ath12k_dump_file_data *dump_data;</div><div class='add'>+	size_t ath12k_coredump_len;</div><div class='add'>+	struct work_struct dump_work;</div><div class='add'>+</div><div class='ctx'> 	struct ath12k_htc htc;</div><div class='ctx'> </div><div class='ctx'> 	struct ath12k_dp dp;</div><div class='hunk'>@@ -789,6 +1059,10 @@ struct ath12k_base {</div><div class='ctx'> 	void __iomem *mem;</div><div class='ctx'> 	unsigned long mem_len;</div><div class='ctx'> </div><div class='add'>+	void __iomem *mem_ce;</div><div class='add'>+	u32 ce_remap_base_addr;</div><div class='add'>+	bool ce_remap;</div><div class='add'>+</div><div class='ctx'> 	struct {</div><div class='ctx'> 		enum ath12k_bus bus;</div><div class='ctx'> 		const struct ath12k_hif_ops *ops;</div><div class='hunk'>@@ -828,15 +1102,6 @@ struct ath12k_base {</div><div class='ctx'> </div><div class='ctx'> 	struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS];</div><div class='ctx'> </div><div class='del'>-	/* Holds information of wiphy (hw) registration.</div><div class='del'>-	 *</div><div class='del'>-	 * In Multi/Single Link Operation case, all pdevs are registered as</div><div class='del'>-	 * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is</div><div class='del'>-	 * registered as separate wiphys.</div><div class='del'>-	 */</div><div class='del'>-	struct ath12k_hw *ah[MAX_RADIOS];</div><div class='del'>-	u8 num_hw;</div><div class='del'>-</div><div class='ctx'> 	struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS];</div><div class='ctx'> 	unsigned long long free_vdev_map;</div><div class='ctx'> 	unsigned long long free_vdev_stats_id_map;</div><div class='hunk'>@@ -866,9 +1131,11 @@ struct ath12k_base {</div><div class='ctx'> 	 */</div><div class='ctx'> 	struct ieee80211_regdomain *new_regd[MAX_RADIOS];</div><div class='ctx'> </div><div class='add'>+	struct ath12k_reg_info *reg_info[MAX_RADIOS];</div><div class='add'>+</div><div class='ctx'> 	/* Current DFS Regulatory */</div><div class='ctx'> 	enum ath12k_dfs_region dfs_region;</div><div class='del'>-	struct ath12k_soc_dp_stats soc_stats;</div><div class='add'>+	struct ath12k_device_dp_stats device_stats;</div><div class='ctx'> #ifdef CONFIG_ATH12K_DEBUGFS</div><div class='ctx'> 	struct dentry *debugfs_soc;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -886,6 +1153,8 @@ struct ath12k_base {</div><div class='ctx'> 	/* continuous recovery fail count */</div><div class='ctx'> 	atomic_t fail_cont_count;</div><div class='ctx'> 	unsigned long reset_fail_timeout;</div><div class='add'>+	struct work_struct update_11d_work;</div><div class='add'>+	u8 new_alpha2[2];</div><div class='ctx'> 	struct {</div><div class='ctx'> 		/* protected by data_lock */</div><div class='ctx'> 		u32 fw_crash_counter;</div><div class='hunk'>@@ -895,8 +1164,6 @@ struct ath12k_base {</div><div class='ctx'> 	struct ath12k_dbring_cap *db_caps;</div><div class='ctx'> 	u32 num_db_cap;</div><div class='ctx'> </div><div class='del'>-	struct timer_list mon_reap_timer;</div><div class='del'>-</div><div class='ctx'> 	struct completion htc_suspend;</div><div class='ctx'> </div><div class='ctx'> 	u64 fw_soc_drop_count;</div><div class='hunk'>@@ -926,17 +1193,11 @@ struct ath12k_base {</div><div class='ctx'> 		size_t m3_len;</div><div class='ctx'> </div><div class='ctx'> 		DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT);</div><div class='add'>+		bool fw_features_valid;</div><div class='ctx'> 	} fw;</div><div class='ctx'> </div><div class='ctx'> 	const struct hal_rx_ops *hal_rx_ops;</div><div class='ctx'> </div><div class='del'>-	/* mlo_capable_flags denotes the single/multi link operation</div><div class='del'>-	 * capabilities of the Device.</div><div class='del'>-	 *</div><div class='del'>-	 * See enum ath12k_link_capable_flags</div><div class='del'>-	 */</div><div class='del'>-	u8 mlo_capable_flags;</div><div class='del'>-</div><div class='ctx'> 	struct completion restart_completed;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='hunk'>@@ -946,6 +1207,13 @@ struct ath12k_base {</div><div class='ctx'> 		u32 func_bit;</div><div class='ctx'> 		bool acpi_tas_enable;</div><div class='ctx'> 		bool acpi_bios_sar_enable;</div><div class='add'>+		bool acpi_disable_11be;</div><div class='add'>+		bool acpi_disable_rfkill;</div><div class='add'>+		bool acpi_cca_enable;</div><div class='add'>+		bool acpi_band_edge_enable;</div><div class='add'>+		bool acpi_enable_bdf;</div><div class='add'>+		u32 bit_flag;</div><div class='add'>+		char bdf_string[ATH12K_ACPI_BDF_MAX_LEN];</div><div class='ctx'> 		u8 tas_cfg[ATH12K_ACPI_DSM_TAS_CFG_SIZE];</div><div class='ctx'> 		u8 tas_sar_power_table[ATH12K_ACPI_DSM_TAS_DATA_SIZE];</div><div class='ctx'> 		u8 bios_sar_data[ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE];</div><div class='hunk'>@@ -958,6 +1226,21 @@ struct ath12k_base {</div><div class='ctx'> </div><div class='ctx'> 	struct notifier_block panic_nb;</div><div class='ctx'> </div><div class='add'>+	struct ath12k_hw_group *ag;</div><div class='add'>+	struct ath12k_wsi_info wsi_info;</div><div class='add'>+	enum ath12k_firmware_mode fw_mode;</div><div class='add'>+	struct ath12k_ftm_event_obj ftm_event_obj;</div><div class='add'>+	bool hw_group_ref;</div><div class='add'>+</div><div class='add'>+	/* Denote whether MLO is possible within the device */</div><div class='add'>+	bool single_chip_mlo_support;</div><div class='add'>+</div><div class='add'>+	struct ath12k_reg_freq reg_freq_2ghz;</div><div class='add'>+	struct ath12k_reg_freq reg_freq_5ghz;</div><div class='add'>+	struct ath12k_reg_freq reg_freq_6ghz;</div><div class='add'>+	const struct ath12k_mem_profile_based_param *profile_param;</div><div class='add'>+	enum ath12k_qmi_mem_mode target_mem_mode;</div><div class='add'>+</div><div class='ctx'> 	/* must be last */</div><div class='ctx'> 	u8 drv_priv[] __aligned(sizeof(void *));</div><div class='ctx'> };</div><div class='hunk'>@@ -967,7 +1250,95 @@ struct ath12k_pdev_map {</div><div class='ctx'> 	u8 pdev_idx;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct ath12k_fw_stats_vdev {</div><div class='add'>+	struct list_head list;</div><div class='add'>+</div><div class='add'>+	u32 vdev_id;</div><div class='add'>+	u32 beacon_snr;</div><div class='add'>+	u32 data_snr;</div><div class='add'>+	u32 num_tx_frames[WLAN_MAX_AC];</div><div class='add'>+	u32 num_rx_frames;</div><div class='add'>+	u32 num_tx_frames_retries[WLAN_MAX_AC];</div><div class='add'>+	u32 num_tx_frames_failures[WLAN_MAX_AC];</div><div class='add'>+	u32 num_rts_fail;</div><div class='add'>+	u32 num_rts_success;</div><div class='add'>+	u32 num_rx_err;</div><div class='add'>+	u32 num_rx_discard;</div><div class='add'>+	u32 num_tx_not_acked;</div><div class='add'>+	u32 tx_rate_history[MAX_TX_RATE_VALUES];</div><div class='add'>+	u32 beacon_rssi_history[MAX_TX_RATE_VALUES];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath12k_fw_stats_bcn {</div><div class='add'>+	struct list_head list;</div><div class='add'>+</div><div class='add'>+	u32 vdev_id;</div><div class='add'>+	u32 tx_bcn_succ_cnt;</div><div class='add'>+	u32 tx_bcn_outage_cnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ath12k_fw_stats_pdev {</div><div class='add'>+	struct list_head list;</div><div class='add'>+</div><div class='add'>+	/* PDEV stats */</div><div class='add'>+	s32 ch_noise_floor;</div><div class='add'>+	u32 tx_frame_count;</div><div class='add'>+	u32 rx_frame_count;</div><div class='add'>+	u32 rx_clear_count;</div><div class='add'>+	u32 cycle_count;</div><div class='add'>+	u32 phy_err_count;</div><div class='add'>+	u32 chan_tx_power;</div><div class='add'>+	u32 ack_rx_bad;</div><div class='add'>+	u32 rts_bad;</div><div class='add'>+	u32 rts_good;</div><div class='add'>+	u32 fcs_bad;</div><div class='add'>+	u32 no_beacons;</div><div class='add'>+	u32 mib_int_count;</div><div class='add'>+</div><div class='add'>+	/* PDEV TX stats */</div><div class='add'>+	s32 comp_queued;</div><div class='add'>+	s32 comp_delivered;</div><div class='add'>+	s32 msdu_enqued;</div><div class='add'>+	s32 mpdu_enqued;</div><div class='add'>+	s32 wmm_drop;</div><div class='add'>+	s32 local_enqued;</div><div class='add'>+	s32 local_freed;</div><div class='add'>+	s32 hw_queued;</div><div class='add'>+	s32 hw_reaped;</div><div class='add'>+	s32 underrun;</div><div class='add'>+	s32 tx_abort;</div><div class='add'>+	s32 mpdus_requed;</div><div class='add'>+	u32 tx_ko;</div><div class='add'>+	u32 data_rc;</div><div class='add'>+	u32 self_triggers;</div><div class='add'>+	u32 sw_retry_failure;</div><div class='add'>+	u32 illgl_rate_phy_err;</div><div class='add'>+	u32 pdev_cont_xretry;</div><div class='add'>+	u32 pdev_tx_timeout;</div><div class='add'>+	u32 pdev_resets;</div><div class='add'>+	u32 stateless_tid_alloc_failure;</div><div class='add'>+	u32 phy_underrun;</div><div class='add'>+	u32 txop_ovf;</div><div class='add'>+</div><div class='add'>+	/* PDEV RX stats */</div><div class='add'>+	s32 mid_ppdu_route_change;</div><div class='add'>+	s32 status_rcvd;</div><div class='add'>+	s32 r0_frags;</div><div class='add'>+	s32 r1_frags;</div><div class='add'>+	s32 r2_frags;</div><div class='add'>+	s32 r3_frags;</div><div class='add'>+	s32 htt_msdus;</div><div class='add'>+	s32 htt_mpdus;</div><div class='add'>+	s32 loc_msdus;</div><div class='add'>+	s32 loc_mpdus;</div><div class='add'>+	s32 oversize_amsdu;</div><div class='add'>+	s32 phy_errs;</div><div class='add'>+	s32 phy_err_drop;</div><div class='add'>+	s32 mpdu_errs;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab);</div><div class='add'>+void ath12k_core_hw_group_cleanup(struct ath12k_hw_group *ag);</div><div class='ctx'> int ath12k_core_pre_init(struct ath12k_base *ab);</div><div class='ctx'> int ath12k_core_init(struct ath12k_base *ath12k);</div><div class='ctx'> void ath12k_core_deinit(struct ath12k_base *ath12k);</div><div class='hunk'>@@ -988,12 +1359,22 @@ int ath12k_core_resume_early(struct ath12k_base *ab);</div><div class='ctx'> int ath12k_core_resume(struct ath12k_base *ab);</div><div class='ctx'> int ath12k_core_suspend(struct ath12k_base *ab);</div><div class='ctx'> int ath12k_core_suspend_late(struct ath12k_base *ab);</div><div class='add'>+void ath12k_core_hw_group_unassign(struct ath12k_base *ab);</div><div class='add'>+u8 ath12k_get_num_partner_link(struct ath12k *ar);</div><div class='ctx'> </div><div class='ctx'> const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab,</div><div class='ctx'> 						    const char *filename);</div><div class='ctx'> u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab);</div><div class='ctx'> u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab);</div><div class='del'>-u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab);</div><div class='add'>+</div><div class='add'>+void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag);</div><div class='add'>+void ath12k_fw_stats_init(struct ath12k *ar);</div><div class='add'>+void ath12k_fw_stats_bcn_free(struct list_head *head);</div><div class='add'>+void ath12k_fw_stats_free(struct ath12k_fw_stats *stats);</div><div class='add'>+void ath12k_fw_stats_reset(struct ath12k *ar);</div><div class='add'>+struct reserved_mem *ath12k_core_get_reserved_mem(struct ath12k_base *ab,</div><div class='add'>+						  int index);</div><div class='add'>+enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab);</div><div class='ctx'> </div><div class='ctx'> static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state)</div><div class='ctx'> {</div><div class='hunk'>@@ -1024,16 +1405,26 @@ static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb)</div><div class='ctx'> 	return (struct ath12k_skb_rxcb *)skb-&gt;cb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct ath12k_vif *ath12k_vif_to_arvif(struct ieee80211_vif *vif)</div><div class='add'>+static inline struct ath12k_vif *ath12k_vif_to_ahvif(struct ieee80211_vif *vif)</div><div class='ctx'> {</div><div class='ctx'> 	return (struct ath12k_vif *)vif-&gt;drv_priv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline struct ath12k_sta *ath12k_sta_to_arsta(struct ieee80211_sta *sta)</div><div class='add'>+static inline struct ath12k_sta *ath12k_sta_to_ahsta(struct ieee80211_sta *sta)</div><div class='ctx'> {</div><div class='ctx'> 	return (struct ath12k_sta *)sta-&gt;drv_priv;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline struct ieee80211_sta *ath12k_ahsta_to_sta(struct ath12k_sta *ahsta)</div><div class='add'>+{</div><div class='add'>+	return container_of((void *)ahsta, struct ieee80211_sta, drv_priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ieee80211_vif *ath12k_ahvif_to_vif(struct ath12k_vif *ahvif)</div><div class='add'>+{</div><div class='add'>+	return container_of((void *)ahvif, struct ieee80211_vif, drv_priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab,</div><div class='ctx'> 					     int mac_id)</div><div class='ctx'> {</div><div class='hunk'>@@ -1044,8 +1435,16 @@ static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab,</div><div class='ctx'> 						    const char *filename,</div><div class='ctx'> 						    void *buf, size_t buf_len)</div><div class='ctx'> {</div><div class='del'>-	snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR,</div><div class='del'>-		 ab-&gt;hw_params-&gt;fw.dir, filename);</div><div class='add'>+	const char *fw_name = NULL;</div><div class='add'>+</div><div class='add'>+	of_property_read_string(ab-&gt;dev-&gt;of_node, "firmware-name", &amp;fw_name);</div><div class='add'>+</div><div class='add'>+	if (fw_name &amp;&amp; strncmp(filename, "board", 5))</div><div class='add'>+		snprintf(buf, buf_len, "%s/%s/%s/%s", ATH12K_FW_DIR,</div><div class='add'>+			 ab-&gt;hw_params-&gt;fw.dir, fw_name, filename);</div><div class='add'>+	else</div><div class='add'>+		snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR,</div><div class='add'>+			 ab-&gt;hw_params-&gt;fw.dir, filename);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline const char *ath12k_bus_str(enum ath12k_bus bus)</div><div class='hunk'>@@ -1053,6 +1452,8 @@ static inline const char *ath12k_bus_str(enum ath12k_bus bus)</div><div class='ctx'> 	switch (bus) {</div><div class='ctx'> 	case ATH12K_BUS_PCI:</div><div class='ctx'> 		return "pci";</div><div class='add'>+	case ATH12K_BUS_AHB:</div><div class='add'>+		return "ahb";</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return "unknown";</div><div class='hunk'>@@ -1085,4 +1486,34 @@ static inline struct ieee80211_hw *ath12k_ar_to_hw(struct ath12k *ar)</div><div class='ctx'> #define for_each_ar(ah, ar, index) \</div><div class='ctx'> 	for ((index) = 0; ((index) &lt; (ah)-&gt;num_radio &amp;&amp; \</div><div class='ctx'> 	     ((ar) = &amp;(ah)-&gt;radio[(index)])); (index)++)</div><div class='add'>+</div><div class='add'>+static inline struct ath12k_hw *ath12k_ag_to_ah(struct ath12k_hw_group *ag, int idx)</div><div class='add'>+{</div><div class='add'>+	return ag-&gt;ah[idx];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath12k_ag_set_ah(struct ath12k_hw_group *ag, int idx,</div><div class='add'>+				    struct ath12k_hw *ah)</div><div class='add'>+{</div><div class='add'>+	ag-&gt;ah[idx] = ah;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ath12k_hw_group *ath12k_ab_to_ag(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	return ab-&gt;ag;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ath12k_base *ath12k_ag_to_ab(struct ath12k_hw_group *ag,</div><div class='add'>+						  u8 device_id)</div><div class='add'>+{</div><div class='add'>+	return ag-&gt;ab[device_id];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline s32 ath12k_pdev_get_noise_floor(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='add'>+	return ar-&gt;rssi_info.noise_floor;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* _CORE_H_ */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/coredump.c b/drivers/net/wireless/ath/ath12k/coredump.c<br/>new file mode 100644<br/>index 000000000000..ce1beeb54836<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/coredump.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/coredump.c</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2020 The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/devcoredump.h&gt;</div><div class='add'>+#include "hif.h"</div><div class='add'>+#include "coredump.h"</div><div class='add'>+#include "debug.h"</div><div class='add'>+</div><div class='add'>+enum</div><div class='add'>+ath12k_fw_crash_dump_type ath12k_coredump_get_dump_type(enum ath12k_qmi_target_mem type)</div><div class='add'>+{</div><div class='add'>+	enum ath12k_fw_crash_dump_type dump_type;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case HOST_DDR_REGION_TYPE:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_REMOTE_MEM_DATA;</div><div class='add'>+		break;</div><div class='add'>+	case M3_DUMP_REGION_TYPE:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_M3_DUMP;</div><div class='add'>+		break;</div><div class='add'>+	case PAGEABLE_MEM_REGION_TYPE:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_PAGEABLE_DATA;</div><div class='add'>+		break;</div><div class='add'>+	case BDF_MEM_REGION_TYPE:</div><div class='add'>+	case CALDB_MEM_REGION_TYPE:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_NONE;</div><div class='add'>+		break;</div><div class='add'>+	case MLO_GLOBAL_MEM_REGION_TYPE:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_MLO_GLOBAL_DATA;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dump_type = FW_CRASH_DUMP_TYPE_MAX;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dump_type;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_coredump_upload(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab = container_of(work, struct ath12k_base, dump_work);</div><div class='add'>+</div><div class='add'>+	ath12k_info(ab, "Uploading coredump\n");</div><div class='add'>+	/* dev_coredumpv() takes ownership of the buffer */</div><div class='add'>+	dev_coredumpv(ab-&gt;dev, ab-&gt;dump_data, ab-&gt;ath12k_coredump_len, GFP_KERNEL);</div><div class='add'>+	ab-&gt;dump_data = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ath12k_coredump_collect(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	ath12k_hif_coredump_download(ab);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/coredump.h b/drivers/net/wireless/ath/ath12k/coredump.h<br/>new file mode 100644<br/>index 000000000000..13f46a605113<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/coredump.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/coredump.h</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+/* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2020 The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#ifndef _ATH12K_COREDUMP_H_</div><div class='add'>+#define _ATH12K_COREDUMP_H_</div><div class='add'>+</div><div class='add'>+#define ATH12K_FW_CRASH_DUMP_V2      2</div><div class='add'>+</div><div class='add'>+enum ath12k_fw_crash_dump_type {</div><div class='add'>+	FW_CRASH_DUMP_PAGING_DATA,</div><div class='add'>+	FW_CRASH_DUMP_RDDM_DATA,</div><div class='add'>+	FW_CRASH_DUMP_REMOTE_MEM_DATA,</div><div class='add'>+	FW_CRASH_DUMP_PAGEABLE_DATA,</div><div class='add'>+	FW_CRASH_DUMP_M3_DUMP,</div><div class='add'>+	FW_CRASH_DUMP_NONE,</div><div class='add'>+	FW_CRASH_DUMP_MLO_GLOBAL_DATA,</div><div class='add'>+</div><div class='add'>+	/* keep last */</div><div class='add'>+	FW_CRASH_DUMP_TYPE_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define COREDUMP_TLV_HDR_SIZE 8</div><div class='add'>+</div><div class='add'>+struct ath12k_tlv_dump_data {</div><div class='add'>+	/* see ath11k_fw_crash_dump_type above */</div><div class='add'>+	__le32 type;</div><div class='add'>+</div><div class='add'>+	/* in bytes */</div><div class='add'>+	__le32 tlv_len;</div><div class='add'>+</div><div class='add'>+	/* pad to 32-bit boundaries as needed */</div><div class='add'>+	u8 tlv_data[];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ath12k_dump_file_data {</div><div class='add'>+	/* "ATH12K-FW-DUMP" */</div><div class='add'>+	char df_magic[16];</div><div class='add'>+	/* total dump len in bytes */</div><div class='add'>+	__le32 len;</div><div class='add'>+	/* file dump version */</div><div class='add'>+	__le32 version;</div><div class='add'>+	/* pci device id */</div><div class='add'>+	__le32 chip_id;</div><div class='add'>+	/* qrtr instance id */</div><div class='add'>+	__le32 qrtr_id;</div><div class='add'>+	/* pci domain id */</div><div class='add'>+	__le32 bus_id;</div><div class='add'>+	guid_t guid;</div><div class='add'>+	/* time-of-day stamp */</div><div class='add'>+	__le64 tv_sec;</div><div class='add'>+	/* time-of-day stamp, nano-seconds */</div><div class='add'>+	__le64 tv_nsec;</div><div class='add'>+	/* room for growth w/out changing binary format */</div><div class='add'>+	u8 unused[128];</div><div class='add'>+	u8 data[];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ATH12K_COREDUMP</div><div class='add'>+enum ath12k_fw_crash_dump_type ath12k_coredump_get_dump_type</div><div class='add'>+						(enum ath12k_qmi_target_mem type);</div><div class='add'>+void ath12k_coredump_upload(struct work_struct *work);</div><div class='add'>+void ath12k_coredump_collect(struct ath12k_base *ab);</div><div class='add'>+#else</div><div class='add'>+static inline enum ath12k_fw_crash_dump_type ath12k_coredump_get_dump_type</div><div class='add'>+							(enum ath12k_qmi_target_mem type)</div><div class='add'>+{</div><div class='add'>+	return FW_CRASH_DUMP_TYPE_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath12k_coredump_upload(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath12k_coredump_collect(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/dbring.c b/drivers/net/wireless/ath/ath12k/dbring.c<br/>index 788160c84c68..6604dacea2ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/dbring.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/dbring.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/dbring.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/dbring.c</a></div><div class='hunk'>@@ -2,6 +2,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.</div><div class='ctx'>  * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='hunk'>@@ -117,7 +118,7 @@ int ath12k_dbring_wmi_cfg_setup(struct ath12k *ar,</div><div class='ctx'> 				struct ath12k_dbring *ring,</div><div class='ctx'> 				enum wmi_direct_buffer_module id)</div><div class='ctx'> {</div><div class='del'>-	struct ath12k_wmi_pdev_dma_ring_cfg_arg arg = {0};</div><div class='add'>+	struct ath12k_wmi_pdev_dma_ring_cfg_arg arg = {};</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (id &gt;= WMI_DIRECT_BUF_MAX)</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/debug.c b/drivers/net/wireless/ath/ath12k/debug.c<br/>index fe5a732ba9ec..5ce100cd9a9d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/debug.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debug.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/debug.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/debug.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='hunk'>@@ -36,7 +36,7 @@ void ath12k_err(struct ath12k_base *ab, const char *fmt, ...)</div><div class='ctx'> 	va_end(args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void ath12k_warn(struct ath12k_base *ab, const char *fmt, ...)</div><div class='add'>+void __ath12k_warn(struct device *dev, const char *fmt, ...)</div><div class='ctx'> {</div><div class='ctx'> 	struct va_format vaf = {</div><div class='ctx'> 		.fmt = fmt,</div><div class='hunk'>@@ -45,7 +45,7 @@ void ath12k_warn(struct ath12k_base *ab, const char *fmt, ...)</div><div class='ctx'> </div><div class='ctx'> 	va_start(args, fmt);</div><div class='ctx'> 	vaf.va = &amp;args;</div><div class='del'>-	dev_warn_ratelimited(ab-&gt;dev, "%pV", &amp;vaf);</div><div class='add'>+	dev_warn_ratelimited(dev, "%pV", &amp;vaf);</div><div class='ctx'> 	/* TODO: Trace the log */</div><div class='ctx'> 	va_end(args);</div><div class='ctx'> }</div><div class='hunk'>@@ -63,8 +63,10 @@ void __ath12k_dbg(struct ath12k_base *ab, enum ath12k_debug_mask mask,</div><div class='ctx'> 	vaf.fmt = fmt;</div><div class='ctx'> 	vaf.va = &amp;args;</div><div class='ctx'> </div><div class='del'>-	if (ath12k_debug_mask &amp; mask)</div><div class='add'>+	if (likely(ab))</div><div class='ctx'> 		dev_printk(KERN_DEBUG, ab-&gt;dev, "%pV", &amp;vaf);</div><div class='add'>+	else</div><div class='add'>+		printk(KERN_DEBUG "ath12k: %pV", &amp;vaf);</div><div class='ctx'> </div><div class='ctx'> 	/* TODO: trace log */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/debug.h b/drivers/net/wireless/ath/ath12k/debug.h<br/>index f7005917362c..bf254e43a68d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/debug.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debug.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/debug.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/debug.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2022, 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _ATH12K_DEBUG_H_</div><div class='hunk'>@@ -26,14 +26,19 @@ enum ath12k_debug_mask {</div><div class='ctx'> 	ATH12K_DBG_DP_TX	= 0x00002000,</div><div class='ctx'> 	ATH12K_DBG_DP_RX	= 0x00004000,</div><div class='ctx'> 	ATH12K_DBG_WOW		= 0x00008000,</div><div class='add'>+	ATH12K_DBG_CE		= 0x00010000,</div><div class='ctx'> 	ATH12K_DBG_ANY		= 0xffffffff,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> __printf(2, 3) void ath12k_info(struct ath12k_base *ab, const char *fmt, ...);</div><div class='ctx'> __printf(2, 3) void ath12k_err(struct ath12k_base *ab, const char *fmt, ...);</div><div class='del'>-__printf(2, 3) void ath12k_warn(struct ath12k_base *ab, const char *fmt, ...);</div><div class='add'>+__printf(2, 3) void __ath12k_warn(struct device *dev, const char *fmt, ...);</div><div class='add'>+</div><div class='add'>+#define ath12k_warn(ab, fmt, ...) __ath12k_warn((ab)-&gt;dev, fmt, ##__VA_ARGS__)</div><div class='add'>+#define ath12k_hw_warn(ah, fmt, ...) __ath12k_warn((ah)-&gt;dev, fmt, ##__VA_ARGS__)</div><div class='ctx'> </div><div class='ctx'> extern unsigned int ath12k_debug_mask;</div><div class='add'>+extern bool ath12k_ftm_mode;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ATH12K_DEBUG</div><div class='ctx'> __printf(3, 4) void __ath12k_dbg(struct ath12k_base *ab,</div><div class='hunk'>@@ -58,11 +63,14 @@ static inline void ath12k_dbg_dump(struct ath12k_base *ab,</div><div class='ctx'> }</div><div class='ctx'> #endif /* CONFIG_ATH12K_DEBUG */</div><div class='ctx'> </div><div class='del'>-#define ath12k_dbg(ar, dbg_mask, fmt, ...)			\</div><div class='add'>+#define ath12k_dbg(ab, dbg_mask, fmt, ...)			\</div><div class='ctx'> do {								\</div><div class='ctx'> 	typeof(dbg_mask) mask = (dbg_mask);			\</div><div class='ctx'> 	if (ath12k_debug_mask &amp; mask)				\</div><div class='del'>-		__ath12k_dbg(ar, mask, fmt, ##__VA_ARGS__);	\</div><div class='add'>+		__ath12k_dbg(ab, mask, fmt, ##__VA_ARGS__);	\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='add'>+#define ath12k_generic_dbg(dbg_mask, fmt, ...)			\</div><div class='add'>+	ath12k_dbg(NULL, dbg_mask, fmt, ##__VA_ARGS__)</div><div class='add'>+</div><div class='ctx'> #endif /* _ATH12K_DEBUG_H_ */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/debugfs.c b/drivers/net/wireless/ath/ath12k/debugfs.c<br/>index 2a977c36af00..d6a86f075d73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/debugfs.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/debugfs.c</a></div><div class='hunk'>@@ -1,10 +1,12 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "core.h"</div><div class='add'>+#include "dp_tx.h"</div><div class='add'>+#include "debug.h"</div><div class='ctx'> #include "debugfs.h"</div><div class='ctx'> #include "debugfs_htt_stats.h"</div><div class='ctx'> </div><div class='hunk'>@@ -15,14 +17,14 @@ static ssize_t ath12k_write_simulate_radar(struct file *file,</div><div class='ctx'> 	struct ath12k *ar = file-&gt;private_data;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;ar-&gt;conf_mutex);</div><div class='add'>+	wiphy_lock(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='ctx'> 	ret = ath12k_wmi_simulate_radar(ar);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto exit;</div><div class='ctx'> </div><div class='ctx'> 	ret = count;</div><div class='ctx'> exit:</div><div class='del'>-	mutex_unlock(&amp;ar-&gt;conf_mutex);</div><div class='add'>+	wiphy_unlock(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -31,10 +33,1194 @@ static const struct file_operations fops_simulate_radar = {</div><div class='ctx'> 	.open = simple_open</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static ssize_t ath12k_read_simulate_fw_crash(struct file *file,</div><div class='add'>+					     char __user *user_buf,</div><div class='add'>+					     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	const char buf[] =</div><div class='add'>+		"To simulate firmware crash write one of the keywords to this file:\n"</div><div class='add'>+		"`assert` - send WMI_FORCE_FW_HANG_CMDID to firmware to cause assert.\n";</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(user_buf, count, ppos, buf, strlen(buf));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t</div><div class='add'>+ath12k_write_simulate_fw_crash(struct file *file,</div><div class='add'>+			       const char __user *user_buf,</div><div class='add'>+			       size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab = file-&gt;private_data;</div><div class='add'>+	struct ath12k_pdev *pdev;</div><div class='add'>+	struct ath12k *ar = NULL;</div><div class='add'>+	char buf[32] = {};</div><div class='add'>+	int i, ret;</div><div class='add'>+	ssize_t rc;</div><div class='add'>+</div><div class='add'>+	/* filter partial writes and invalid commands */</div><div class='add'>+	if (*ppos != 0 || count &gt;= sizeof(buf) || count == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rc = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, user_buf, count);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* drop the possible '\n' from the end */</div><div class='add'>+	if (buf[*ppos - 1] == '\n')</div><div class='add'>+		buf[*ppos - 1] = '\0';</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;num_radios; i++) {</div><div class='add'>+		pdev = &amp;ab-&gt;pdevs[i];</div><div class='add'>+		ar = pdev-&gt;ar;</div><div class='add'>+		if (ar)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ar)</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	if (!strcmp(buf, "assert")) {</div><div class='add'>+		ath12k_info(ab, "simulating firmware assert crash\n");</div><div class='add'>+		ret = ath12k_wmi_force_fw_hang_cmd(ar,</div><div class='add'>+						   ATH12K_WMI_FW_HANG_ASSERT_TYPE,</div><div class='add'>+						   ATH12K_WMI_FW_HANG_DELAY);</div><div class='add'>+	} else {</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_warn(ab, "failed to simulate firmware crash: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations fops_simulate_fw_crash = {</div><div class='add'>+	.read = ath12k_read_simulate_fw_crash,</div><div class='add'>+	.write = ath12k_write_simulate_fw_crash,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static ssize_t ath12k_write_tpc_stats_type(struct file *file,</div><div class='add'>+					   const char __user *user_buf,</div><div class='add'>+					   size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct ath12k *ar = file-&gt;private_data;</div><div class='add'>+	u8 type;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = kstrtou8_from_user(user_buf, count, 0, &amp;type);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (type &gt;= WMI_HALPHY_PDEV_TX_STATS_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+	ar-&gt;debug.tpc_stats_type = type;</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_debug_tpc_stats_request(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	enum wmi_halphy_ctrl_path_stats_id tpc_stats_sub_id;</div><div class='add'>+	struct ath12k_base *ab = ar-&gt;ab;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_wiphy(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;ar-&gt;debug.tpc_complete);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+	ar-&gt;debug.tpc_request = true;</div><div class='add'>+	tpc_stats_sub_id = ar-&gt;debug.tpc_stats_type;</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='add'>+	ret = ath12k_wmi_send_tpc_stats_request(ar, tpc_stats_sub_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_warn(ab, "failed to request pdev tpc stats: %d\n", ret);</div><div class='add'>+		spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+		ar-&gt;debug.tpc_request = false;</div><div class='add'>+		spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_get_tpc_ctl_mode_idx(struct wmi_tpc_stats_arg *tpc_stats,</div><div class='add'>+				       enum wmi_tpc_pream_bw pream_bw, int *mode_idx)</div><div class='add'>+{</div><div class='add'>+	u32 chan_freq = le32_to_cpu(tpc_stats-&gt;tpc_config.chan_freq);</div><div class='add'>+	u8 band;</div><div class='add'>+</div><div class='add'>+	band = ((chan_freq &gt; ATH12K_MIN_6GHZ_FREQ) ? NL80211_BAND_6GHZ :</div><div class='add'>+		((chan_freq &gt; ATH12K_MIN_5GHZ_FREQ) ? NL80211_BAND_5GHZ :</div><div class='add'>+		NL80211_BAND_2GHZ));</div><div class='add'>+</div><div class='add'>+	if (band == NL80211_BAND_5GHZ || band == NL80211_BAND_6GHZ) {</div><div class='add'>+		switch (pream_bw) {</div><div class='add'>+		case WMI_TPC_PREAM_HT20:</div><div class='add'>+		case WMI_TPC_PREAM_VHT20:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_HT_VHT20_5GHZ_6GHZ;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_HE20:</div><div class='add'>+		case WMI_TPC_PREAM_EHT20:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_HE_EHT20_5GHZ_6GHZ;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_HT40:</div><div class='add'>+		case WMI_TPC_PREAM_VHT40:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_HT_VHT40_5GHZ_6GHZ;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_HE40:</div><div class='add'>+		case WMI_TPC_PREAM_EHT40:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_HE_EHT40_5GHZ_6GHZ;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_VHT80:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_VHT80_5GHZ_6GHZ;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_EHT60:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_EHT80_SU_PUNC20;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_HE80:</div><div class='add'>+		case WMI_TPC_PREAM_EHT80:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_HE_EHT80_5GHZ_6GHZ;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_VHT160:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_VHT160_5GHZ_6GHZ;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_EHT120:</div><div class='add'>+		case WMI_TPC_PREAM_EHT140:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_EHT160_SU_PUNC20;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_HE160:</div><div class='add'>+		case WMI_TPC_PREAM_EHT160:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_HE_EHT160_5GHZ_6GHZ;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_EHT200:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_EHT320_SU_PUNC120;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_EHT240:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_EHT320_SU_PUNC80;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_EHT280:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_EHT320_SU_PUNC40;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_EHT320:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_HE_EHT320_5GHZ_6GHZ;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			/* for 5GHZ and 6GHZ, default case will be for OFDM */</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_LEGACY_5GHZ_6GHZ;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		switch (pream_bw) {</div><div class='add'>+		case WMI_TPC_PREAM_OFDM:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_LEGACY_2GHZ;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_HT20:</div><div class='add'>+		case WMI_TPC_PREAM_VHT20:</div><div class='add'>+		case WMI_TPC_PREAM_HE20:</div><div class='add'>+		case WMI_TPC_PREAM_EHT20:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_HT20_2GHZ;</div><div class='add'>+			break;</div><div class='add'>+		case WMI_TPC_PREAM_HT40:</div><div class='add'>+		case WMI_TPC_PREAM_VHT40:</div><div class='add'>+		case WMI_TPC_PREAM_HE40:</div><div class='add'>+		case WMI_TPC_PREAM_EHT40:</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_HT40_2GHZ;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			/* for 2GHZ, default case will be CCK */</div><div class='add'>+			*mode_idx = ATH12K_TPC_STATS_CTL_MODE_CCK_2GHZ;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static s16 ath12k_tpc_get_rate(struct ath12k *ar,</div><div class='add'>+			       struct wmi_tpc_stats_arg *tpc_stats,</div><div class='add'>+			       u32 rate_idx, u32 num_chains, u32 rate_code,</div><div class='add'>+			       enum wmi_tpc_pream_bw pream_bw,</div><div class='add'>+			       enum wmi_halphy_ctrl_path_stats_id type,</div><div class='add'>+			       u32 eht_rate_idx)</div><div class='add'>+{</div><div class='add'>+	u32 tot_nss, tot_modes, txbf_on_off, index_offset1, index_offset2, index_offset3;</div><div class='add'>+	u8 chain_idx, stm_idx, num_streams;</div><div class='add'>+	bool is_mu, txbf_enabled = 0;</div><div class='add'>+	s8 rates_ctl_min, tpc_ctl;</div><div class='add'>+	s16 rates, tpc, reg_pwr;</div><div class='add'>+	u16 rate1, rate2;</div><div class='add'>+	int mode, ret;</div><div class='add'>+</div><div class='add'>+	num_streams = 1 + ATH12K_HW_NSS(rate_code);</div><div class='add'>+	chain_idx = num_chains - 1;</div><div class='add'>+	stm_idx = num_streams - 1;</div><div class='add'>+	mode = -1;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_get_tpc_ctl_mode_idx(tpc_stats, pream_bw, &amp;mode);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_warn(ar-&gt;ab, "Invalid mode index received\n");</div><div class='add'>+		tpc = TPC_INVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (num_chains &lt; num_streams) {</div><div class='add'>+		tpc = TPC_INVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (le32_to_cpu(tpc_stats-&gt;tpc_config.num_tx_chain) &lt;= 1) {</div><div class='add'>+		tpc = TPC_INVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type == WMI_HALPHY_PDEV_TX_SUTXBF_STATS ||</div><div class='add'>+	    type == WMI_HALPHY_PDEV_TX_MUTXBF_STATS)</div><div class='add'>+		txbf_enabled = 1;</div><div class='add'>+</div><div class='add'>+	if (type == WMI_HALPHY_PDEV_TX_MU_STATS ||</div><div class='add'>+	    type == WMI_HALPHY_PDEV_TX_MUTXBF_STATS) {</div><div class='add'>+		is_mu = true;</div><div class='add'>+	} else {</div><div class='add'>+		is_mu = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Below is the min calculation of ctl array, rates array and</div><div class='add'>+	 * regulator power table. tpc is minimum of all 3</div><div class='add'>+	 */</div><div class='add'>+	if (pream_bw &gt;= WMI_TPC_PREAM_EHT20 &amp;&amp; pream_bw &lt;= WMI_TPC_PREAM_EHT320) {</div><div class='add'>+		rate2 = tpc_stats-&gt;rates_array2.rate_array[eht_rate_idx];</div><div class='add'>+		if (is_mu)</div><div class='add'>+			rates = u32_get_bits(rate2, ATH12K_TPC_RATE_ARRAY_MU);</div><div class='add'>+		else</div><div class='add'>+			rates = u32_get_bits(rate2, ATH12K_TPC_RATE_ARRAY_SU);</div><div class='add'>+	} else {</div><div class='add'>+		rate1 = tpc_stats-&gt;rates_array1.rate_array[rate_idx];</div><div class='add'>+		if (is_mu)</div><div class='add'>+			rates = u32_get_bits(rate1, ATH12K_TPC_RATE_ARRAY_MU);</div><div class='add'>+		else</div><div class='add'>+			rates = u32_get_bits(rate1, ATH12K_TPC_RATE_ARRAY_SU);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tpc_stats-&gt;tlvs_rcvd &amp; WMI_TPC_CTL_PWR_ARRAY) {</div><div class='add'>+		tot_nss = le32_to_cpu(tpc_stats-&gt;ctl_array.tpc_ctl_pwr.d1);</div><div class='add'>+		tot_modes = le32_to_cpu(tpc_stats-&gt;ctl_array.tpc_ctl_pwr.d2);</div><div class='add'>+		txbf_on_off = le32_to_cpu(tpc_stats-&gt;ctl_array.tpc_ctl_pwr.d3);</div><div class='add'>+		index_offset1 = txbf_on_off * tot_modes * tot_nss;</div><div class='add'>+		index_offset2 = tot_modes * tot_nss;</div><div class='add'>+		index_offset3 = tot_nss;</div><div class='add'>+</div><div class='add'>+		tpc_ctl = *(tpc_stats-&gt;ctl_array.ctl_pwr_table +</div><div class='add'>+			    chain_idx * index_offset1 + txbf_enabled * index_offset2</div><div class='add'>+			    + mode * index_offset3 + stm_idx);</div><div class='add'>+	} else {</div><div class='add'>+		tpc_ctl = TPC_MAX;</div><div class='add'>+		ath12k_warn(ar-&gt;ab,</div><div class='add'>+			    "ctl array for tpc stats not received from fw\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rates_ctl_min = min_t(s16, rates, tpc_ctl);</div><div class='add'>+</div><div class='add'>+	reg_pwr = tpc_stats-&gt;max_reg_allowed_power.reg_pwr_array[chain_idx];</div><div class='add'>+</div><div class='add'>+	if (reg_pwr &lt; 0)</div><div class='add'>+		reg_pwr = TPC_INVAL;</div><div class='add'>+</div><div class='add'>+	tpc = min_t(s16, rates_ctl_min, reg_pwr);</div><div class='add'>+</div><div class='add'>+	/* MODULATION_LIMIT is the maximum power limit,tpc should not exceed</div><div class='add'>+	 * modulation limit even if min tpc of all three array is greater</div><div class='add'>+	 * modulation limit</div><div class='add'>+	 */</div><div class='add'>+	tpc = min_t(s16, tpc, MODULATION_LIMIT);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return tpc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 ath12k_get_ratecode(u16 pream_idx, u16 nss, u16 mcs_rate)</div><div class='add'>+{</div><div class='add'>+	u16 mode_type = ~0;</div><div class='add'>+</div><div class='add'>+	/* Below assignments are just for printing purpose only */</div><div class='add'>+	switch (pream_idx) {</div><div class='add'>+	case WMI_TPC_PREAM_CCK:</div><div class='add'>+		mode_type = WMI_RATE_PREAMBLE_CCK;</div><div class='add'>+		break;</div><div class='add'>+	case WMI_TPC_PREAM_OFDM:</div><div class='add'>+		mode_type = WMI_RATE_PREAMBLE_OFDM;</div><div class='add'>+		break;</div><div class='add'>+	case WMI_TPC_PREAM_HT20:</div><div class='add'>+	case WMI_TPC_PREAM_HT40:</div><div class='add'>+		mode_type = WMI_RATE_PREAMBLE_HT;</div><div class='add'>+		break;</div><div class='add'>+	case WMI_TPC_PREAM_VHT20:</div><div class='add'>+	case WMI_TPC_PREAM_VHT40:</div><div class='add'>+	case WMI_TPC_PREAM_VHT80:</div><div class='add'>+	case WMI_TPC_PREAM_VHT160:</div><div class='add'>+		mode_type = WMI_RATE_PREAMBLE_VHT;</div><div class='add'>+		break;</div><div class='add'>+	case WMI_TPC_PREAM_HE20:</div><div class='add'>+	case WMI_TPC_PREAM_HE40:</div><div class='add'>+	case WMI_TPC_PREAM_HE80:</div><div class='add'>+	case WMI_TPC_PREAM_HE160:</div><div class='add'>+		mode_type = WMI_RATE_PREAMBLE_HE;</div><div class='add'>+		break;</div><div class='add'>+	case WMI_TPC_PREAM_EHT20:</div><div class='add'>+	case WMI_TPC_PREAM_EHT40:</div><div class='add'>+	case WMI_TPC_PREAM_EHT60:</div><div class='add'>+	case WMI_TPC_PREAM_EHT80:</div><div class='add'>+	case WMI_TPC_PREAM_EHT120:</div><div class='add'>+	case WMI_TPC_PREAM_EHT140:</div><div class='add'>+	case WMI_TPC_PREAM_EHT160:</div><div class='add'>+	case WMI_TPC_PREAM_EHT200:</div><div class='add'>+	case WMI_TPC_PREAM_EHT240:</div><div class='add'>+	case WMI_TPC_PREAM_EHT280:</div><div class='add'>+	case WMI_TPC_PREAM_EHT320:</div><div class='add'>+		mode_type = WMI_RATE_PREAMBLE_EHT;</div><div class='add'>+		if (mcs_rate == 0 || mcs_rate == 1)</div><div class='add'>+			mcs_rate += 14;</div><div class='add'>+		else</div><div class='add'>+			mcs_rate -= 2;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return mode_type;</div><div class='add'>+	}</div><div class='add'>+	return ((mode_type &lt;&lt; 8) | ((nss &amp; 0x7) &lt;&lt; 5) | (mcs_rate &amp; 0x1F));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ath12k_he_supports_extra_mcs(struct ath12k *ar, int freq)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_pdev_cap *cap = &amp;ar-&gt;pdev-&gt;cap;</div><div class='add'>+	struct ath12k_band_cap *cap_band;</div><div class='add'>+	bool extra_mcs_supported;</div><div class='add'>+</div><div class='add'>+	if (freq &lt;= ATH12K_2GHZ_MAX_FREQUENCY)</div><div class='add'>+		cap_band = &amp;cap-&gt;band[NL80211_BAND_2GHZ];</div><div class='add'>+	else if (freq &lt;= ATH12K_5GHZ_MAX_FREQUENCY)</div><div class='add'>+		cap_band = &amp;cap-&gt;band[NL80211_BAND_5GHZ];</div><div class='add'>+	else</div><div class='add'>+		cap_band = &amp;cap-&gt;band[NL80211_BAND_6GHZ];</div><div class='add'>+</div><div class='add'>+	extra_mcs_supported = u32_get_bits(cap_band-&gt;he_cap_info[1],</div><div class='add'>+					   HE_EXTRA_MCS_SUPPORT);</div><div class='add'>+	return extra_mcs_supported;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_tpc_fill_pream(struct ath12k *ar, char *buf, int buf_len, int len,</div><div class='add'>+				 enum wmi_tpc_pream_bw pream_bw, u32 max_rix,</div><div class='add'>+				 int max_nss, int max_rates, int pream_type,</div><div class='add'>+				 enum wmi_halphy_ctrl_path_stats_id tpc_type,</div><div class='add'>+				 int rate_idx, int eht_rate_idx)</div><div class='add'>+{</div><div class='add'>+	struct wmi_tpc_stats_arg *tpc_stats = ar-&gt;debug.tpc_stats;</div><div class='add'>+	int nss, rates, chains;</div><div class='add'>+	u8 active_tx_chains;</div><div class='add'>+	u16 rate_code;</div><div class='add'>+	s16 tpc;</div><div class='add'>+</div><div class='add'>+	static const char *const pream_str[] = {</div><div class='add'>+		[WMI_TPC_PREAM_CCK]     = "CCK",</div><div class='add'>+		[WMI_TPC_PREAM_OFDM]    = "OFDM",</div><div class='add'>+		[WMI_TPC_PREAM_HT20]    = "HT20",</div><div class='add'>+		[WMI_TPC_PREAM_HT40]    = "HT40",</div><div class='add'>+		[WMI_TPC_PREAM_VHT20]   = "VHT20",</div><div class='add'>+		[WMI_TPC_PREAM_VHT40]   = "VHT40",</div><div class='add'>+		[WMI_TPC_PREAM_VHT80]   = "VHT80",</div><div class='add'>+		[WMI_TPC_PREAM_VHT160]  = "VHT160",</div><div class='add'>+		[WMI_TPC_PREAM_HE20]    = "HE20",</div><div class='add'>+		[WMI_TPC_PREAM_HE40]    = "HE40",</div><div class='add'>+		[WMI_TPC_PREAM_HE80]    = "HE80",</div><div class='add'>+		[WMI_TPC_PREAM_HE160]   = "HE160",</div><div class='add'>+		[WMI_TPC_PREAM_EHT20]   = "EHT20",</div><div class='add'>+		[WMI_TPC_PREAM_EHT40]   = "EHT40",</div><div class='add'>+		[WMI_TPC_PREAM_EHT60]   = "EHT60",</div><div class='add'>+		[WMI_TPC_PREAM_EHT80]   = "EHT80",</div><div class='add'>+		[WMI_TPC_PREAM_EHT120]   = "EHT120",</div><div class='add'>+		[WMI_TPC_PREAM_EHT140]   = "EHT140",</div><div class='add'>+		[WMI_TPC_PREAM_EHT160]   = "EHT160",</div><div class='add'>+		[WMI_TPC_PREAM_EHT200]   = "EHT200",</div><div class='add'>+		[WMI_TPC_PREAM_EHT240]   = "EHT240",</div><div class='add'>+		[WMI_TPC_PREAM_EHT280]   = "EHT280",</div><div class='add'>+		[WMI_TPC_PREAM_EHT320]   = "EHT320"};</div><div class='add'>+</div><div class='add'>+	active_tx_chains = ar-&gt;num_tx_chains;</div><div class='add'>+</div><div class='add'>+	for (nss = 0; nss &lt; max_nss; nss++) {</div><div class='add'>+		for (rates = 0; rates &lt; max_rates; rates++, rate_idx++, max_rix++) {</div><div class='add'>+			/* FW send extra MCS(10&amp;11) for VHT and HE rates,</div><div class='add'>+			 *  this is not used. Hence skipping it here</div><div class='add'>+			 */</div><div class='add'>+			if (pream_type == WMI_RATE_PREAMBLE_VHT &amp;&amp;</div><div class='add'>+			    rates &gt; ATH12K_VHT_MCS_MAX)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (pream_type == WMI_RATE_PREAMBLE_HE &amp;&amp;</div><div class='add'>+			    rates &gt; ATH12K_HE_MCS_MAX)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (pream_type == WMI_RATE_PREAMBLE_EHT &amp;&amp;</div><div class='add'>+			    rates &gt; ATH12K_EHT_MCS_MAX)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			rate_code = ath12k_get_ratecode(pream_bw, nss, rates);</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "%d\t %s\t 0x%03x\t", max_rix,</div><div class='add'>+					 pream_str[pream_bw], rate_code);</div><div class='add'>+</div><div class='add'>+			for (chains = 0; chains &lt; active_tx_chains; chains++) {</div><div class='add'>+				if (nss &gt; chains) {</div><div class='add'>+					len += scnprintf(buf + len,</div><div class='add'>+							 buf_len - len,</div><div class='add'>+							 "\t%s", "NA");</div><div class='add'>+				} else {</div><div class='add'>+					tpc = ath12k_tpc_get_rate(ar, tpc_stats,</div><div class='add'>+								  rate_idx, chains + 1,</div><div class='add'>+								  rate_code, pream_bw,</div><div class='add'>+								  tpc_type,</div><div class='add'>+								  eht_rate_idx);</div><div class='add'>+</div><div class='add'>+					if (tpc == TPC_INVAL) {</div><div class='add'>+						len += scnprintf(buf + len,</div><div class='add'>+								 buf_len - len, "\tNA");</div><div class='add'>+					} else {</div><div class='add'>+						len += scnprintf(buf + len,</div><div class='add'>+								 buf_len - len, "\t%d",</div><div class='add'>+								 tpc);</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+			if (pream_type == WMI_RATE_PREAMBLE_EHT)</div><div class='add'>+				/*For fetching the next eht rates pwr from rates array2*/</div><div class='add'>+				++eht_rate_idx;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_tpc_stats_print(struct ath12k *ar,</div><div class='add'>+				  struct wmi_tpc_stats_arg *tpc_stats,</div><div class='add'>+				  char *buf, size_t len,</div><div class='add'>+				  enum wmi_halphy_ctrl_path_stats_id type)</div><div class='add'>+{</div><div class='add'>+	u32 eht_idx = 0, pream_idx = 0, rate_pream_idx = 0, total_rates = 0, max_rix = 0;</div><div class='add'>+	u32 chan_freq, num_tx_chain, caps, i, j = 1;</div><div class='add'>+	size_t buf_len = ATH12K_TPC_STATS_BUF_SIZE;</div><div class='add'>+	u8 nss, active_tx_chains;</div><div class='add'>+	bool he_ext_mcs;</div><div class='add'>+	static const char *const type_str[WMI_HALPHY_PDEV_TX_STATS_MAX] = {</div><div class='add'>+		[WMI_HALPHY_PDEV_TX_SU_STATS]		= "SU",</div><div class='add'>+		[WMI_HALPHY_PDEV_TX_SUTXBF_STATS]	= "SU WITH TXBF",</div><div class='add'>+		[WMI_HALPHY_PDEV_TX_MU_STATS]		= "MU",</div><div class='add'>+		[WMI_HALPHY_PDEV_TX_MUTXBF_STATS]	= "MU WITH TXBF"};</div><div class='add'>+</div><div class='add'>+	u8 max_rates[WMI_TPC_PREAM_MAX] = {</div><div class='add'>+		[WMI_TPC_PREAM_CCK]     = ATH12K_CCK_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_OFDM]    = ATH12K_OFDM_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_HT20]    = ATH12K_HT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_HT40]    = ATH12K_HT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_VHT20]   = ATH12K_VHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_VHT40]   = ATH12K_VHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_VHT80]   = ATH12K_VHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_VHT160]  = ATH12K_VHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_HE20]    = ATH12K_HE_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_HE40]    = ATH12K_HE_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_HE80]    = ATH12K_HE_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_HE160]   = ATH12K_HE_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT20]   = ATH12K_EHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT40]   = ATH12K_EHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT60]   = ATH12K_EHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT80]   = ATH12K_EHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT120]  = ATH12K_EHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT140]  = ATH12K_EHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT160]  = ATH12K_EHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT200]  = ATH12K_EHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT240]  = ATH12K_EHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT280]  = ATH12K_EHT_RATES,</div><div class='add'>+		[WMI_TPC_PREAM_EHT320]  = ATH12K_EHT_RATES};</div><div class='add'>+	static const u8 max_nss[WMI_TPC_PREAM_MAX] = {</div><div class='add'>+		[WMI_TPC_PREAM_CCK]     = ATH12K_NSS_1,</div><div class='add'>+		[WMI_TPC_PREAM_OFDM]    = ATH12K_NSS_1,</div><div class='add'>+		[WMI_TPC_PREAM_HT20]    = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_HT40]    = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_VHT20]   = ATH12K_NSS_8,</div><div class='add'>+		[WMI_TPC_PREAM_VHT40]   = ATH12K_NSS_8,</div><div class='add'>+		[WMI_TPC_PREAM_VHT80]   = ATH12K_NSS_8,</div><div class='add'>+		[WMI_TPC_PREAM_VHT160]  = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_HE20]    = ATH12K_NSS_8,</div><div class='add'>+		[WMI_TPC_PREAM_HE40]    = ATH12K_NSS_8,</div><div class='add'>+		[WMI_TPC_PREAM_HE80]    = ATH12K_NSS_8,</div><div class='add'>+		[WMI_TPC_PREAM_HE160]   = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT20]   = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT40]   = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT60]   = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT80]   = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT120]  = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT140]  = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT160]  = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT200]  = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT240]  = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT280]  = ATH12K_NSS_4,</div><div class='add'>+		[WMI_TPC_PREAM_EHT320]  = ATH12K_NSS_4};</div><div class='add'>+</div><div class='add'>+	u16 rate_idx[WMI_TPC_PREAM_MAX] = {}, eht_rate_idx[WMI_TPC_PREAM_MAX] = {};</div><div class='add'>+	static const u8 pream_type[WMI_TPC_PREAM_MAX] = {</div><div class='add'>+		[WMI_TPC_PREAM_CCK]     = WMI_RATE_PREAMBLE_CCK,</div><div class='add'>+		[WMI_TPC_PREAM_OFDM]    = WMI_RATE_PREAMBLE_OFDM,</div><div class='add'>+		[WMI_TPC_PREAM_HT20]    = WMI_RATE_PREAMBLE_HT,</div><div class='add'>+		[WMI_TPC_PREAM_HT40]    = WMI_RATE_PREAMBLE_HT,</div><div class='add'>+		[WMI_TPC_PREAM_VHT20]   = WMI_RATE_PREAMBLE_VHT,</div><div class='add'>+		[WMI_TPC_PREAM_VHT40]   = WMI_RATE_PREAMBLE_VHT,</div><div class='add'>+		[WMI_TPC_PREAM_VHT80]   = WMI_RATE_PREAMBLE_VHT,</div><div class='add'>+		[WMI_TPC_PREAM_VHT160]  = WMI_RATE_PREAMBLE_VHT,</div><div class='add'>+		[WMI_TPC_PREAM_HE20]    = WMI_RATE_PREAMBLE_HE,</div><div class='add'>+		[WMI_TPC_PREAM_HE40]    = WMI_RATE_PREAMBLE_HE,</div><div class='add'>+		[WMI_TPC_PREAM_HE80]    = WMI_RATE_PREAMBLE_HE,</div><div class='add'>+		[WMI_TPC_PREAM_HE160]   = WMI_RATE_PREAMBLE_HE,</div><div class='add'>+		[WMI_TPC_PREAM_EHT20]   = WMI_RATE_PREAMBLE_EHT,</div><div class='add'>+		[WMI_TPC_PREAM_EHT40]   = WMI_RATE_PREAMBLE_EHT,</div><div class='add'>+		[WMI_TPC_PREAM_EHT60]   = WMI_RATE_PREAMBLE_EHT,</div><div class='add'>+		[WMI_TPC_PREAM_EHT80]   = WMI_RATE_PREAMBLE_EHT,</div><div class='add'>+		[WMI_TPC_PREAM_EHT120]  = WMI_RATE_PREAMBLE_EHT,</div><div class='add'>+		[WMI_TPC_PREAM_EHT140]  = WMI_RATE_PREAMBLE_EHT,</div><div class='add'>+		[WMI_TPC_PREAM_EHT160]  = WMI_RATE_PREAMBLE_EHT,</div><div class='add'>+		[WMI_TPC_PREAM_EHT200]  = WMI_RATE_PREAMBLE_EHT,</div><div class='add'>+		[WMI_TPC_PREAM_EHT240]  = WMI_RATE_PREAMBLE_EHT,</div><div class='add'>+		[WMI_TPC_PREAM_EHT280]  = WMI_RATE_PREAMBLE_EHT,</div><div class='add'>+		[WMI_TPC_PREAM_EHT320]  = WMI_RATE_PREAMBLE_EHT};</div><div class='add'>+</div><div class='add'>+	chan_freq = le32_to_cpu(tpc_stats-&gt;tpc_config.chan_freq);</div><div class='add'>+	num_tx_chain = le32_to_cpu(tpc_stats-&gt;tpc_config.num_tx_chain);</div><div class='add'>+	caps = le32_to_cpu(tpc_stats-&gt;tpc_config.caps);</div><div class='add'>+</div><div class='add'>+	active_tx_chains = ar-&gt;num_tx_chains;</div><div class='add'>+	he_ext_mcs = ath12k_he_supports_extra_mcs(ar, chan_freq);</div><div class='add'>+</div><div class='add'>+	/* mcs 12&amp;13 is sent by FW for certain HWs in rate array, skipping it as</div><div class='add'>+	 * it is not supported</div><div class='add'>+	 */</div><div class='add'>+	if (he_ext_mcs) {</div><div class='add'>+		for (i = WMI_TPC_PREAM_HE20; i &lt;= WMI_TPC_PREAM_HE160; ++i)</div><div class='add'>+			max_rates[i] = ATH12K_HE_RATES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (type == WMI_HALPHY_PDEV_TX_MU_STATS ||</div><div class='add'>+	    type == WMI_HALPHY_PDEV_TX_MUTXBF_STATS) {</div><div class='add'>+		pream_idx = WMI_TPC_PREAM_VHT20;</div><div class='add'>+</div><div class='add'>+		for (i = WMI_TPC_PREAM_CCK; i &lt;= WMI_TPC_PREAM_HT40; ++i)</div><div class='add'>+			max_rix += max_nss[i] * max_rates[i];</div><div class='add'>+	}</div><div class='add'>+	/* Enumerate all the rate indices */</div><div class='add'>+	for (i = rate_pream_idx + 1; i &lt; WMI_TPC_PREAM_MAX; i++) {</div><div class='add'>+		nss = (max_nss[i - 1] &lt; num_tx_chain ?</div><div class='add'>+		       max_nss[i - 1] : num_tx_chain);</div><div class='add'>+</div><div class='add'>+		rate_idx[i] = rate_idx[i - 1] + max_rates[i - 1] * nss;</div><div class='add'>+</div><div class='add'>+		if (pream_type[i] == WMI_RATE_PREAMBLE_EHT) {</div><div class='add'>+			eht_rate_idx[j] = eht_rate_idx[j - 1] + max_rates[i] * nss;</div><div class='add'>+			++j;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; WMI_TPC_PREAM_MAX; i++) {</div><div class='add'>+		nss = (max_nss[i] &lt; num_tx_chain ?</div><div class='add'>+		       max_nss[i] : num_tx_chain);</div><div class='add'>+		total_rates += max_rates[i] * nss;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "No.of rates-%d\n", total_rates);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "**************** %s ****************\n",</div><div class='add'>+			 type_str[type]);</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "\t\t\t\tTPC values for Active chains\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "Rate idx Preamble Rate code");</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt;= active_tx_chains; ++i) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "\t%d-Chain", i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+	for (i = pream_idx; i &lt; WMI_TPC_PREAM_MAX; i++) {</div><div class='add'>+		if (chan_freq &lt;= 2483) {</div><div class='add'>+			if (i == WMI_TPC_PREAM_VHT80 ||</div><div class='add'>+			    i == WMI_TPC_PREAM_VHT160 ||</div><div class='add'>+			    i == WMI_TPC_PREAM_HE80 ||</div><div class='add'>+			    i == WMI_TPC_PREAM_HE160 ||</div><div class='add'>+			    (i &gt;= WMI_TPC_PREAM_EHT60 &amp;&amp;</div><div class='add'>+			     i &lt;= WMI_TPC_PREAM_EHT320)) {</div><div class='add'>+				max_rix += max_nss[i] * max_rates[i];</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			if (i == WMI_TPC_PREAM_CCK) {</div><div class='add'>+				max_rix += max_rates[i];</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		nss = (max_nss[i] &lt; ar-&gt;num_tx_chains ? max_nss[i] : ar-&gt;num_tx_chains);</div><div class='add'>+</div><div class='add'>+		if (!(caps &amp;</div><div class='add'>+		    (1 &lt;&lt; ATH12K_TPC_STATS_SUPPORT_BE_PUNC))) {</div><div class='add'>+			if (i == WMI_TPC_PREAM_EHT60 || i == WMI_TPC_PREAM_EHT120 ||</div><div class='add'>+			    i == WMI_TPC_PREAM_EHT140 || i == WMI_TPC_PREAM_EHT200 ||</div><div class='add'>+			    i == WMI_TPC_PREAM_EHT240 || i == WMI_TPC_PREAM_EHT280) {</div><div class='add'>+				max_rix += max_nss[i] * max_rates[i];</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		len = ath12k_tpc_fill_pream(ar, buf, buf_len, len, i, max_rix, nss,</div><div class='add'>+					    max_rates[i], pream_type[i],</div><div class='add'>+					    type, rate_idx[i], eht_rate_idx[eht_idx]);</div><div class='add'>+</div><div class='add'>+		if (pream_type[i] == WMI_RATE_PREAMBLE_EHT)</div><div class='add'>+			/*For fetch the next index eht rates from rates array2*/</div><div class='add'>+			++eht_idx;</div><div class='add'>+</div><div class='add'>+		max_rix += max_nss[i] * max_rates[i];</div><div class='add'>+	}</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_tpc_stats_fill(struct ath12k *ar,</div><div class='add'>+				  struct wmi_tpc_stats_arg *tpc_stats,</div><div class='add'>+				  char *buf)</div><div class='add'>+{</div><div class='add'>+	size_t buf_len = ATH12K_TPC_STATS_BUF_SIZE;</div><div class='add'>+	struct wmi_tpc_config_params *tpc;</div><div class='add'>+	size_t len = 0;</div><div class='add'>+</div><div class='add'>+	if (!tpc_stats) {</div><div class='add'>+		ath12k_warn(ar-&gt;ab, "failed to find tpc stats\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='add'>+	tpc = &amp;tpc_stats-&gt;tpc_config;</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "*************** TPC config **************\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "* powers are in 0.25 dBm steps\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "reg domain-%d\t\tchan freq-%d\n",</div><div class='add'>+			 tpc-&gt;reg_domain, tpc-&gt;chan_freq);</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "power limit-%d\t\tmax reg-domain Power-%d\n",</div><div class='add'>+			 le32_to_cpu(tpc-&gt;twice_max_reg_power) / 2, tpc-&gt;power_limit);</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "No.of tx chain-%d\t",</div><div class='add'>+			 ar-&gt;num_tx_chains);</div><div class='add'>+</div><div class='add'>+	ath12k_tpc_stats_print(ar, tpc_stats, buf, len,</div><div class='add'>+			       ar-&gt;debug.tpc_stats_type);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_open_tpc_stats(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct ath12k *ar = inode-&gt;i_private;</div><div class='add'>+	struct ath12k_hw *ah = ath12k_ar_to_ah(ar);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	guard(wiphy)(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='add'>+</div><div class='add'>+	if (ah-&gt;state != ATH12K_HW_STATE_ON) {</div><div class='add'>+		ath12k_warn(ar-&gt;ab, "Interface not up\n");</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	void *buf __free(kfree) = kzalloc(ATH12K_TPC_STATS_BUF_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_debug_tpc_stats_request(ar);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_warn(ar-&gt;ab, "failed to request tpc stats: %d\n",</div><div class='add'>+			    ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;ar-&gt;debug.tpc_complete, TPC_STATS_WAIT_TIME)) {</div><div class='add'>+		spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+		ath12k_wmi_free_tpc_stats_mem(ar);</div><div class='add'>+		ar-&gt;debug.tpc_request = false;</div><div class='add'>+		spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath12k_tpc_stats_fill(ar, ar-&gt;debug.tpc_stats, buf);</div><div class='add'>+	file-&gt;private_data = no_free_ptr(buf);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+	ath12k_wmi_free_tpc_stats_mem(ar);</div><div class='add'>+	spin_unlock_bh(&amp;ar-&gt;data_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ath12k_read_tpc_stats(struct file *file,</div><div class='add'>+				     char __user *user_buf,</div><div class='add'>+				     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	const char *buf = file-&gt;private_data;</div><div class='add'>+	size_t len = strlen(buf);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_release_tpc_stats(struct inode *inode,</div><div class='add'>+				    struct file *file)</div><div class='add'>+{</div><div class='add'>+	kfree(file-&gt;private_data);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations fops_tpc_stats = {</div><div class='add'>+	.open = ath12k_open_tpc_stats,</div><div class='add'>+	.release = ath12k_release_tpc_stats,</div><div class='add'>+	.read = ath12k_read_tpc_stats,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct file_operations fops_tpc_stats_type = {</div><div class='add'>+	.write = ath12k_write_tpc_stats_type,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static ssize_t ath12k_write_extd_rx_stats(struct file *file,</div><div class='add'>+					  const char __user *ubuf,</div><div class='add'>+					  size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct ath12k *ar = file-&gt;private_data;</div><div class='add'>+	struct htt_rx_ring_tlv_filter tlv_filter = {};</div><div class='add'>+	u32 ring_id, rx_filter = 0;</div><div class='add'>+	bool enable;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	if (kstrtobool_from_user(ubuf, count, &amp;enable))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	wiphy_lock(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='add'>+</div><div class='add'>+	if (!ar-&gt;ab-&gt;hw_params-&gt;rxdma1_enable) {</div><div class='add'>+		ret = count;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ar-&gt;ah-&gt;state != ATH12K_HW_STATE_ON) {</div><div class='add'>+		ret = -ENETDOWN;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enable == ar-&gt;debug.extd_rx_stats) {</div><div class='add'>+		ret = count;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		rx_filter =  HTT_RX_FILTER_TLV_FLAGS_MPDU_START;</div><div class='add'>+		rx_filter |= HTT_RX_FILTER_TLV_FLAGS_PPDU_START;</div><div class='add'>+		rx_filter |= HTT_RX_FILTER_TLV_FLAGS_PPDU_END;</div><div class='add'>+		rx_filter |= HTT_RX_FILTER_TLV_FLAGS_PPDU_END_USER_STATS;</div><div class='add'>+		rx_filter |= HTT_RX_FILTER_TLV_FLAGS_PPDU_END_USER_STATS_EXT;</div><div class='add'>+		rx_filter |= HTT_RX_FILTER_TLV_FLAGS_PPDU_END_STATUS_DONE;</div><div class='add'>+		rx_filter |= HTT_RX_FILTER_TLV_FLAGS_PPDU_START_USER_INFO;</div><div class='add'>+</div><div class='add'>+		tlv_filter.rx_filter = rx_filter;</div><div class='add'>+		tlv_filter.pkt_filter_flags0 = HTT_RX_FP_MGMT_FILTER_FLAGS0;</div><div class='add'>+		tlv_filter.pkt_filter_flags1 = HTT_RX_FP_MGMT_FILTER_FLAGS1;</div><div class='add'>+		tlv_filter.pkt_filter_flags2 = HTT_RX_FP_CTRL_FILTER_FLASG2;</div><div class='add'>+		tlv_filter.pkt_filter_flags3 = HTT_RX_FP_CTRL_FILTER_FLASG3 |</div><div class='add'>+			HTT_RX_FP_DATA_FILTER_FLASG3;</div><div class='add'>+	} else {</div><div class='add'>+		tlv_filter = ath12k_mac_mon_status_filter_default;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ar-&gt;debug.rx_filter = tlv_filter.rx_filter;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ar-&gt;ab-&gt;hw_params-&gt;num_rxdma_per_pdev; i++) {</div><div class='add'>+		ring_id = ar-&gt;dp.rxdma_mon_dst_ring[i].ring_id;</div><div class='add'>+		ret = ath12k_dp_tx_htt_rx_filter_setup(ar-&gt;ab, ring_id, ar-&gt;dp.mac_id + i,</div><div class='add'>+						       HAL_RXDMA_MONITOR_DST,</div><div class='add'>+						       DP_RXDMA_REFILL_RING_SIZE,</div><div class='add'>+						       &amp;tlv_filter);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath12k_warn(ar-&gt;ab, "failed to set rx filter for monitor status ring\n");</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ar-&gt;debug.extd_rx_stats = !!enable;</div><div class='add'>+	ret = count;</div><div class='add'>+exit:</div><div class='add'>+	wiphy_unlock(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ath12k_read_extd_rx_stats(struct file *file,</div><div class='add'>+					 char __user *ubuf,</div><div class='add'>+					 size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct ath12k *ar = file-&gt;private_data;</div><div class='add'>+	char buf[32];</div><div class='add'>+	int len = 0;</div><div class='add'>+</div><div class='add'>+	wiphy_lock(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='add'>+	len = scnprintf(buf, sizeof(buf) - len, "%d\n",</div><div class='add'>+			ar-&gt;debug.extd_rx_stats);</div><div class='add'>+	wiphy_unlock(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(ubuf, count, ppos, buf, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations fops_extd_rx_stats = {</div><div class='add'>+	.read = ath12k_read_extd_rx_stats,</div><div class='add'>+	.write = ath12k_write_extd_rx_stats,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ath12k_open_link_stats(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_vif *ahvif = inode-&gt;i_private;</div><div class='add'>+	size_t len = 0, buf_len = (PAGE_SIZE * 2);</div><div class='add'>+	struct ath12k_link_stats linkstat;</div><div class='add'>+	struct ath12k_link_vif *arvif;</div><div class='add'>+	unsigned long links_map;</div><div class='add'>+	struct wiphy *wiphy;</div><div class='add'>+	int link_id, i;</div><div class='add'>+	char *buf;</div><div class='add'>+</div><div class='add'>+	if (!ahvif)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	buf = kzalloc(buf_len, GFP_KERNEL);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	wiphy = ahvif-&gt;ah-&gt;hw-&gt;wiphy;</div><div class='add'>+	wiphy_lock(wiphy);</div><div class='add'>+</div><div class='add'>+	links_map = ahvif-&gt;links_map;</div><div class='add'>+	for_each_set_bit(link_id, &amp;links_map,</div><div class='add'>+			 IEEE80211_MLD_MAX_NUM_LINKS) {</div><div class='add'>+		arvif = rcu_dereference_protected(ahvif-&gt;link[link_id],</div><div class='add'>+						  lockdep_is_held(&amp;wiphy-&gt;mtx));</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;arvif-&gt;link_stats_lock);</div><div class='add'>+		linkstat = arvif-&gt;link_stats;</div><div class='add'>+		spin_unlock_bh(&amp;arvif-&gt;link_stats_lock);</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "link[%d] Tx Unicast Frames Enqueued  = %d\n",</div><div class='add'>+				 link_id, linkstat.tx_enqueued);</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "link[%d] Tx Broadcast Frames Enqueued = %d\n",</div><div class='add'>+				 link_id, linkstat.tx_bcast_mcast);</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "link[%d] Tx Frames Completed = %d\n",</div><div class='add'>+				 link_id, linkstat.tx_completed);</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "link[%d] Tx Frames Dropped = %d\n",</div><div class='add'>+				 link_id, linkstat.tx_dropped);</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "link[%d] Tx Frame descriptor Encap Type = ",</div><div class='add'>+				 link_id);</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 " raw:%d",</div><div class='add'>+					 linkstat.tx_encap_type[0]);</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 " native_wifi:%d",</div><div class='add'>+					 linkstat.tx_encap_type[1]);</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 " ethernet:%d",</div><div class='add'>+					 linkstat.tx_encap_type[2]);</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "\nlink[%d] Tx Frame descriptor Encrypt Type = ",</div><div class='add'>+				 link_id);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; HAL_ENCRYPT_TYPE_MAX; i++) {</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 " %d:%d", i,</div><div class='add'>+					 linkstat.tx_encrypt_type[i]);</div><div class='add'>+		}</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "\nlink[%d] Tx Frame descriptor Type = buffer:%d extension:%d\n",</div><div class='add'>+				 link_id, linkstat.tx_desc_type[0],</div><div class='add'>+				 linkstat.tx_desc_type[1]);</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				"------------------------------------------------------\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wiphy_unlock(wiphy);</div><div class='add'>+</div><div class='add'>+	file-&gt;private_data = buf;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_release_link_stats(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	kfree(file-&gt;private_data);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ath12k_read_link_stats(struct file *file,</div><div class='add'>+				      char __user *user_buf,</div><div class='add'>+				      size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	const char *buf = file-&gt;private_data;</div><div class='add'>+	size_t len = strlen(buf);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations ath12k_fops_link_stats = {</div><div class='add'>+	.open = ath12k_open_link_stats,</div><div class='add'>+	.release = ath12k_release_link_stats,</div><div class='add'>+	.read = ath12k_read_link_stats,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ath12k_debugfs_op_vif_add(struct ieee80211_hw *hw,</div><div class='add'>+			       struct ieee80211_vif *vif)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_vif *ahvif = ath12k_vif_to_ahvif(vif);</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("link_stats", 0400, vif-&gt;debugfs_dir, ahvif,</div><div class='add'>+			    &amp;ath12k_fops_link_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ath12k_debugfs_dump_device_dp_stats(struct file *file,</div><div class='add'>+						   char __user *user_buf,</div><div class='add'>+						   size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct ath12k_base *ab = file-&gt;private_data;</div><div class='add'>+	struct ath12k_device_dp_stats *device_stats = &amp;ab-&gt;device_stats;</div><div class='add'>+	int len = 0, i, j, ret;</div><div class='add'>+	struct ath12k *ar;</div><div class='add'>+	const int size = 4096;</div><div class='add'>+	static const char *rxdma_err[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX] = {</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_OVERFLOW_ERR] = "Overflow",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_MPDU_LEN_ERR] = "MPDU len",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_FCS_ERR] = "FCS",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_DECRYPT_ERR] = "Decrypt",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_TKIP_MIC_ERR] = "TKIP MIC",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_UNECRYPTED_ERR] = "Unencrypt",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_MSDU_LEN_ERR] = "MSDU len",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_MSDU_LIMIT_ERR] = "MSDU limit",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_WIFI_PARSE_ERR] = "WiFi parse",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_AMSDU_PARSE_ERR] = "AMSDU parse",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_SA_TIMEOUT_ERR] = "SA timeout",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_DA_TIMEOUT_ERR] = "DA timeout",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_FLOW_TIMEOUT_ERR] = "Flow timeout",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_FLUSH_REQUEST_ERR] = "Flush req",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_AMSDU_FRAG_ERR] = "AMSDU frag",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_MULTICAST_ECHO_ERR] = "Multicast echo",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_AMSDU_MISMATCH_ERR] = "AMSDU mismatch",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_UNAUTH_WDS_ERR] = "Unauth WDS",</div><div class='add'>+		[HAL_REO_ENTR_RING_RXDMA_ECODE_GRPCAST_AMSDU_WDS_ERR] = "AMSDU or WDS"};</div><div class='add'>+</div><div class='add'>+	static const char *reo_err[HAL_REO_DEST_RING_ERROR_CODE_MAX] = {</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_DESC_ADDR_ZERO] = "Desc addr zero",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_DESC_INVALID] = "Desc inval",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_AMPDU_IN_NON_BA] =  "AMPDU in non BA",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_NON_BA_DUPLICATE] = "Non BA dup",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_BA_DUPLICATE] = "BA dup",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_FRAME_2K_JUMP] = "Frame 2k jump",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_BAR_2K_JUMP] = "BAR 2k jump",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_FRAME_OOR] = "Frame OOR",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_BAR_OOR] = "BAR OOR",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_NO_BA_SESSION] = "No BA session",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_FRAME_SN_EQUALS_SSN] = "Frame SN equal SSN",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_PN_CHECK_FAILED] = "PN check fail",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_2K_ERR_FLAG_SET] = "2k err",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_PN_ERR_FLAG_SET] = "PN err",</div><div class='add'>+		[HAL_REO_DEST_RING_ERROR_CODE_DESC_BLOCKED] = "Desc blocked"};</div><div class='add'>+</div><div class='add'>+	static const char *wbm_rel_src[HAL_WBM_REL_SRC_MODULE_MAX] = {</div><div class='add'>+		[HAL_WBM_REL_SRC_MODULE_TQM] = "TQM",</div><div class='add'>+		[HAL_WBM_REL_SRC_MODULE_RXDMA] = "Rxdma",</div><div class='add'>+		[HAL_WBM_REL_SRC_MODULE_REO] = "Reo",</div><div class='add'>+		[HAL_WBM_REL_SRC_MODULE_FW] = "FW",</div><div class='add'>+		[HAL_WBM_REL_SRC_MODULE_SW] = "SW"};</div><div class='add'>+</div><div class='add'>+	char *buf __free(kfree) = kzalloc(size, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "DEVICE RX STATS:\n\n");</div><div class='add'>+	len += scnprintf(buf + len, size - len, "err ring pkts: %u\n",</div><div class='add'>+			 device_stats-&gt;err_ring_pkts);</div><div class='add'>+	len += scnprintf(buf + len, size - len, "Invalid RBM: %u\n\n",</div><div class='add'>+			 device_stats-&gt;invalid_rbm);</div><div class='add'>+	len += scnprintf(buf + len, size - len, "RXDMA errors:\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; HAL_REO_ENTR_RING_RXDMA_ECODE_MAX; i++)</div><div class='add'>+		len += scnprintf(buf + len, size - len, "%s: %u\n",</div><div class='add'>+				 rxdma_err[i], device_stats-&gt;rxdma_error[i]);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\nREO errors:\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; HAL_REO_DEST_RING_ERROR_CODE_MAX; i++)</div><div class='add'>+		len += scnprintf(buf + len, size - len, "%s: %u\n",</div><div class='add'>+				 reo_err[i], device_stats-&gt;reo_error[i]);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\nHAL REO errors:\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DP_REO_DST_RING_MAX; i++)</div><div class='add'>+		len += scnprintf(buf + len, size - len,</div><div class='add'>+				 "ring%d: %u\n", i,</div><div class='add'>+				 device_stats-&gt;hal_reo_error[i]);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\nDEVICE TX STATS:\n");</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\nTCL Ring Full Failures:\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DP_TCL_NUM_RING_MAX; i++)</div><div class='add'>+		len += scnprintf(buf + len, size - len, "ring%d: %u\n",</div><div class='add'>+				 i, device_stats-&gt;tx_err.desc_na[i]);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len,</div><div class='add'>+			 "\nMisc Transmit Failures: %d\n",</div><div class='add'>+			 atomic_read(&amp;device_stats-&gt;tx_err.misc_fail));</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\ntx_wbm_rel_source:");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; HAL_WBM_REL_SRC_MODULE_MAX; i++)</div><div class='add'>+		len += scnprintf(buf + len, size - len, " %d:%u",</div><div class='add'>+				 i, device_stats-&gt;tx_wbm_rel_source[i]);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\ntqm_rel_reason:");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_TQM_RELEASE_REASON; i++)</div><div class='add'>+		len += scnprintf(buf + len, size - len, " %d:%u",</div><div class='add'>+				 i, device_stats-&gt;tqm_rel_reason[i]);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\nfw_tx_status:");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_FW_TX_STATUS; i++)</div><div class='add'>+		len += scnprintf(buf + len, size - len, " %d:%u",</div><div class='add'>+				 i, device_stats-&gt;fw_tx_status[i]);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\ntx_enqueued:");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DP_TCL_NUM_RING_MAX; i++)</div><div class='add'>+		len += scnprintf(buf + len, size - len, " %d:%u", i,</div><div class='add'>+				 device_stats-&gt;tx_enqueued[i]);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\ntx_completed:");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DP_TCL_NUM_RING_MAX; i++)</div><div class='add'>+		len += scnprintf(buf + len, size - len, " %d:%u",</div><div class='add'>+				 i, device_stats-&gt;tx_completed[i]);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ab-&gt;num_radios; i++) {</div><div class='add'>+		ar = ath12k_mac_get_ar_by_pdev_id(ab, DP_SW2HW_MACID(i));</div><div class='add'>+		if (ar) {</div><div class='add'>+			len += scnprintf(buf + len, size - len,</div><div class='add'>+					"\nradio%d tx_pending: %u\n", i,</div><div class='add'>+					atomic_read(&amp;ar-&gt;dp.num_tx_pending));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\nREO Rx Received:\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; DP_REO_DST_RING_MAX; i++) {</div><div class='add'>+		len += scnprintf(buf + len, size - len, "Ring%d:", i + 1);</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; ATH12K_MAX_DEVICES; j++) {</div><div class='add'>+			len += scnprintf(buf + len, size - len,</div><div class='add'>+					"\t%d:%u", j,</div><div class='add'>+					 device_stats-&gt;reo_rx[i][j]);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, size - len, "\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\nREO excep MSDU buf type:%u\n",</div><div class='add'>+			 device_stats-&gt;reo_excep_msdu_buf_type);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, size - len, "\nRx WBM REL SRC Errors:\n");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; HAL_WBM_REL_SRC_MODULE_MAX; i++) {</div><div class='add'>+		len += scnprintf(buf + len, size - len, "%s:", wbm_rel_src[i]);</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; ATH12K_MAX_DEVICES; j++) {</div><div class='add'>+			len += scnprintf(buf + len,</div><div class='add'>+					 size - len,</div><div class='add'>+					 "\t%d:%u", j,</div><div class='add'>+					 device_stats-&gt;rx_wbm_rel_source[i][j]);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, size - len, "\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations fops_device_dp_stats = {</div><div class='add'>+	.read = ath12k_debugfs_dump_device_dp_stats,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ath12k_debugfs_pdev_create(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+	debugfs_create_file("simulate_fw_crash", 0600, ab-&gt;debugfs_soc, ab,</div><div class='add'>+			    &amp;fops_simulate_fw_crash);</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("device_dp_stats", 0400, ab-&gt;debugfs_soc, ab,</div><div class='add'>+			    &amp;fops_device_dp_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void ath12k_debugfs_soc_create(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='ctx'> 	bool dput_needed;</div><div class='del'>-	char soc_name[64] = { 0 };</div><div class='add'>+	char soc_name[64] = {};</div><div class='ctx'> 	struct dentry *debugfs_ath12k;</div><div class='ctx'> </div><div class='ctx'> 	debugfs_ath12k = debugfs_lookup("ath12k", NULL);</div><div class='hunk'>@@ -68,12 +1254,223 @@ void ath12k_debugfs_soc_destroy(struct ath12k_base *ab)</div><div class='ctx'> 	 */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int ath12k_open_vdev_stats(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct ath12k *ar = inode-&gt;i_private;</div><div class='add'>+	struct ath12k_fw_stats_req_params param;</div><div class='add'>+	struct ath12k_hw *ah = ath12k_ar_to_ah(ar);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	guard(wiphy)(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='add'>+</div><div class='add'>+	if (!ah)</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	if (ah-&gt;state != ATH12K_HW_STATE_ON)</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	void *buf __free(kfree) = kzalloc(ATH12K_FW_STATS_BUF_SIZE, GFP_ATOMIC);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	param.pdev_id = ath12k_mac_get_target_pdev_id(ar);</div><div class='add'>+	/* VDEV stats is always sent for all active VDEVs from FW */</div><div class='add'>+	param.vdev_id = 0;</div><div class='add'>+	param.stats_id = WMI_REQUEST_VDEV_STAT;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_mac_get_fw_stats(ar, &amp;param);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_warn(ar-&gt;ab, "failed to request fw vdev stats: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath12k_wmi_fw_stats_dump(ar, &amp;ar-&gt;fw_stats, param.stats_id,</div><div class='add'>+				 buf);</div><div class='add'>+	ath12k_fw_stats_reset(ar);</div><div class='add'>+</div><div class='add'>+	file-&gt;private_data = no_free_ptr(buf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_release_vdev_stats(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	kfree(file-&gt;private_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ath12k_read_vdev_stats(struct file *file,</div><div class='add'>+				      char __user *user_buf,</div><div class='add'>+				      size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	const char *buf = file-&gt;private_data;</div><div class='add'>+	size_t len = strlen(buf);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations fops_vdev_stats = {</div><div class='add'>+	.open = ath12k_open_vdev_stats,</div><div class='add'>+	.release = ath12k_release_vdev_stats,</div><div class='add'>+	.read = ath12k_read_vdev_stats,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ath12k_open_bcn_stats(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct ath12k *ar = inode-&gt;i_private;</div><div class='add'>+	struct ath12k_link_vif *arvif;</div><div class='add'>+	struct ath12k_fw_stats_req_params param;</div><div class='add'>+	struct ath12k_hw *ah = ath12k_ar_to_ah(ar);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	guard(wiphy)(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='add'>+</div><div class='add'>+	if (ah &amp;&amp; ah-&gt;state != ATH12K_HW_STATE_ON)</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	void *buf __free(kfree) = kzalloc(ATH12K_FW_STATS_BUF_SIZE, GFP_ATOMIC);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	param.pdev_id = ath12k_mac_get_target_pdev_id(ar);</div><div class='add'>+	param.stats_id = WMI_REQUEST_BCN_STAT;</div><div class='add'>+</div><div class='add'>+	/* loop all active VDEVs for bcn stats */</div><div class='add'>+	list_for_each_entry(arvif, &amp;ar-&gt;arvifs, list) {</div><div class='add'>+		if (!arvif-&gt;is_up)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		param.vdev_id = arvif-&gt;vdev_id;</div><div class='add'>+		ret = ath12k_mac_get_fw_stats(ar, &amp;param);</div><div class='add'>+		if (ret) {</div><div class='add'>+			ath12k_warn(ar-&gt;ab, "failed to request fw bcn stats: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath12k_wmi_fw_stats_dump(ar, &amp;ar-&gt;fw_stats, param.stats_id,</div><div class='add'>+				 buf);</div><div class='add'>+	ath12k_fw_stats_reset(ar);</div><div class='add'>+</div><div class='add'>+	file-&gt;private_data = no_free_ptr(buf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_release_bcn_stats(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	kfree(file-&gt;private_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ath12k_read_bcn_stats(struct file *file,</div><div class='add'>+				     char __user *user_buf,</div><div class='add'>+				     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	const char *buf = file-&gt;private_data;</div><div class='add'>+	size_t len = strlen(buf);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations fops_bcn_stats = {</div><div class='add'>+	.open = ath12k_open_bcn_stats,</div><div class='add'>+	.release = ath12k_release_bcn_stats,</div><div class='add'>+	.read = ath12k_read_bcn_stats,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ath12k_open_pdev_stats(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	struct ath12k *ar = inode-&gt;i_private;</div><div class='add'>+	struct ath12k_hw *ah = ath12k_ar_to_ah(ar);</div><div class='add'>+	struct ath12k_base *ab = ar-&gt;ab;</div><div class='add'>+	struct ath12k_fw_stats_req_params param;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	guard(wiphy)(ath12k_ar_to_hw(ar)-&gt;wiphy);</div><div class='add'>+</div><div class='add'>+	if (ah &amp;&amp; ah-&gt;state != ATH12K_HW_STATE_ON)</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	void *buf __free(kfree) = kzalloc(ATH12K_FW_STATS_BUF_SIZE, GFP_ATOMIC);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	param.pdev_id = ath12k_mac_get_target_pdev_id(ar);</div><div class='add'>+	param.vdev_id = 0;</div><div class='add'>+	param.stats_id = WMI_REQUEST_PDEV_STAT;</div><div class='add'>+</div><div class='add'>+	ret = ath12k_mac_get_fw_stats(ar, &amp;param);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ath12k_warn(ab, "failed to request fw pdev stats: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ath12k_wmi_fw_stats_dump(ar, &amp;ar-&gt;fw_stats, param.stats_id,</div><div class='add'>+				 buf);</div><div class='add'>+	ath12k_fw_stats_reset(ar);</div><div class='add'>+</div><div class='add'>+	file-&gt;private_data = no_free_ptr(buf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ath12k_release_pdev_stats(struct inode *inode, struct file *file)</div><div class='add'>+{</div><div class='add'>+	kfree(file-&gt;private_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t ath12k_read_pdev_stats(struct file *file,</div><div class='add'>+				      char __user *user_buf,</div><div class='add'>+				      size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	const char *buf = file-&gt;private_data;</div><div class='add'>+	size_t len = strlen(buf);</div><div class='add'>+</div><div class='add'>+	return simple_read_from_buffer(user_buf, count, ppos, buf, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations fops_pdev_stats = {</div><div class='add'>+	.open = ath12k_open_pdev_stats,</div><div class='add'>+	.release = ath12k_release_pdev_stats,</div><div class='add'>+	.read = ath12k_read_pdev_stats,</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.llseek = default_llseek,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static</div><div class='add'>+void ath12k_debugfs_fw_stats_register(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	struct dentry *fwstats_dir = debugfs_create_dir("fw_stats",</div><div class='add'>+							ar-&gt;debug.debugfs_pdev);</div><div class='add'>+</div><div class='add'>+	/* all stats debugfs files created are under "fw_stats" directory</div><div class='add'>+	 * created per PDEV</div><div class='add'>+	 */</div><div class='add'>+	debugfs_create_file("vdev_stats", 0600, fwstats_dir, ar,</div><div class='add'>+			    &amp;fops_vdev_stats);</div><div class='add'>+	debugfs_create_file("beacon_stats", 0600, fwstats_dir, ar,</div><div class='add'>+			    &amp;fops_bcn_stats);</div><div class='add'>+	debugfs_create_file("pdev_stats", 0600, fwstats_dir, ar,</div><div class='add'>+			    &amp;fops_pdev_stats);</div><div class='add'>+</div><div class='add'>+	ath12k_fw_stats_init(ar);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void ath12k_debugfs_register(struct ath12k *ar)</div><div class='ctx'> {</div><div class='ctx'> 	struct ath12k_base *ab = ar-&gt;ab;</div><div class='ctx'> 	struct ieee80211_hw *hw = ar-&gt;ah-&gt;hw;</div><div class='ctx'> 	char pdev_name[5];</div><div class='del'>-	char buf[100] = {0};</div><div class='add'>+	char buf[100] = {};</div><div class='ctx'> </div><div class='ctx'> 	scnprintf(pdev_name, sizeof(pdev_name), "%s%d", "mac", ar-&gt;pdev_idx);</div><div class='ctx'> </div><div class='hunk'>@@ -91,7 +1488,18 @@ void ath12k_debugfs_register(struct ath12k *ar)</div><div class='ctx'> 				    &amp;fops_simulate_radar);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	debugfs_create_file("tpc_stats", 0400, ar-&gt;debug.debugfs_pdev, ar,</div><div class='add'>+			    &amp;fops_tpc_stats);</div><div class='add'>+	debugfs_create_file("tpc_stats_type", 0200, ar-&gt;debug.debugfs_pdev,</div><div class='add'>+			    ar, &amp;fops_tpc_stats_type);</div><div class='add'>+	init_completion(&amp;ar-&gt;debug.tpc_complete);</div><div class='add'>+</div><div class='ctx'> 	ath12k_debugfs_htt_stats_register(ar);</div><div class='add'>+	ath12k_debugfs_fw_stats_register(ar);</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("ext_rx_stats", 0644,</div><div class='add'>+			    ar-&gt;debug.debugfs_pdev, ar,</div><div class='add'>+			    &amp;fops_extd_rx_stats);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void ath12k_debugfs_unregister(struct ath12k *ar)</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/debugfs.h b/drivers/net/wireless/ath/ath12k/debugfs.h<br/>index 8d64ba03aa9a..21641a8a0346 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/debugfs.h?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debugfs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/debugfs.h</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /* SPDX-License-Identifier: BSD-3-Clause-Clear */</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _ATH12K_DEBUGFS_H_</div><div class='hunk'>@@ -12,6 +12,101 @@ void ath12k_debugfs_soc_create(struct ath12k_base *ab);</div><div class='ctx'> void ath12k_debugfs_soc_destroy(struct ath12k_base *ab);</div><div class='ctx'> void ath12k_debugfs_register(struct ath12k *ar);</div><div class='ctx'> void ath12k_debugfs_unregister(struct ath12k *ar);</div><div class='add'>+void ath12k_debugfs_op_vif_add(struct ieee80211_hw *hw,</div><div class='add'>+			       struct ieee80211_vif *vif);</div><div class='add'>+void ath12k_debugfs_pdev_create(struct ath12k_base *ab);</div><div class='add'>+</div><div class='add'>+static inline bool ath12k_debugfs_is_extd_rx_stats_enabled(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	return ar-&gt;debug.extd_rx_stats;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath12k_debugfs_rx_filter(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	return ar-&gt;debug.rx_filter;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ATH12K_CCK_RATES			4</div><div class='add'>+#define ATH12K_OFDM_RATES			8</div><div class='add'>+#define ATH12K_HT_RATES				8</div><div class='add'>+#define ATH12K_VHT_RATES			12</div><div class='add'>+#define ATH12K_HE_RATES				12</div><div class='add'>+#define ATH12K_HE_RATES_WITH_EXTRA_MCS		14</div><div class='add'>+#define ATH12K_EHT_RATES			16</div><div class='add'>+#define HE_EXTRA_MCS_SUPPORT			GENMASK(31, 16)</div><div class='add'>+#define ATH12K_NSS_1				1</div><div class='add'>+#define ATH12K_NSS_4				4</div><div class='add'>+#define ATH12K_NSS_8				8</div><div class='add'>+#define ATH12K_HW_NSS(_rcode)			(((_rcode) &gt;&gt; 5) &amp; 0x7)</div><div class='add'>+#define TPC_STATS_WAIT_TIME			(1 * HZ)</div><div class='add'>+#define MAX_TPC_PREAM_STR_LEN			7</div><div class='add'>+#define TPC_INVAL				-128</div><div class='add'>+#define TPC_MAX					127</div><div class='add'>+#define TPC_STATS_WAIT_TIME			(1 * HZ)</div><div class='add'>+#define TPC_STATS_TOT_ROW			700</div><div class='add'>+#define TPC_STATS_TOT_COLUMN			100</div><div class='add'>+#define MODULATION_LIMIT			126</div><div class='add'>+</div><div class='add'>+#define ATH12K_TPC_STATS_BUF_SIZE	(TPC_STATS_TOT_ROW * TPC_STATS_TOT_COLUMN)</div><div class='add'>+</div><div class='add'>+enum wmi_tpc_pream_bw {</div><div class='add'>+	WMI_TPC_PREAM_CCK,</div><div class='add'>+	WMI_TPC_PREAM_OFDM,</div><div class='add'>+	WMI_TPC_PREAM_HT20,</div><div class='add'>+	WMI_TPC_PREAM_HT40,</div><div class='add'>+	WMI_TPC_PREAM_VHT20,</div><div class='add'>+	WMI_TPC_PREAM_VHT40,</div><div class='add'>+	WMI_TPC_PREAM_VHT80,</div><div class='add'>+	WMI_TPC_PREAM_VHT160,</div><div class='add'>+	WMI_TPC_PREAM_HE20,</div><div class='add'>+	WMI_TPC_PREAM_HE40,</div><div class='add'>+	WMI_TPC_PREAM_HE80,</div><div class='add'>+	WMI_TPC_PREAM_HE160,</div><div class='add'>+	WMI_TPC_PREAM_EHT20,</div><div class='add'>+	WMI_TPC_PREAM_EHT40,</div><div class='add'>+	WMI_TPC_PREAM_EHT60,</div><div class='add'>+	WMI_TPC_PREAM_EHT80,</div><div class='add'>+	WMI_TPC_PREAM_EHT120,</div><div class='add'>+	WMI_TPC_PREAM_EHT140,</div><div class='add'>+	WMI_TPC_PREAM_EHT160,</div><div class='add'>+	WMI_TPC_PREAM_EHT200,</div><div class='add'>+	WMI_TPC_PREAM_EHT240,</div><div class='add'>+	WMI_TPC_PREAM_EHT280,</div><div class='add'>+	WMI_TPC_PREAM_EHT320,</div><div class='add'>+	WMI_TPC_PREAM_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ath12k_debug_tpc_stats_ctl_mode {</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_LEGACY_5GHZ_6GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_HT_VHT20_5GHZ_6GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_HE_EHT20_5GHZ_6GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_HT_VHT40_5GHZ_6GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_HE_EHT40_5GHZ_6GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_VHT80_5GHZ_6GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_HE_EHT80_5GHZ_6GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_VHT160_5GHZ_6GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_HE_EHT160_5GHZ_6GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_HE_EHT320_5GHZ_6GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_CCK_2GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_LEGACY_2GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_HT20_2GHZ,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_HT40_2GHZ,</div><div class='add'>+</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_EHT80_SU_PUNC20 = 23,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_EHT160_SU_PUNC20,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_EHT320_SU_PUNC40,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_EHT320_SU_PUNC80,</div><div class='add'>+	ATH12K_TPC_STATS_CTL_MODE_EHT320_SU_PUNC120</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ath12k_debug_tpc_stats_support_modes {</div><div class='add'>+	ATH12K_TPC_STATS_SUPPORT_160 = 0,</div><div class='add'>+	ATH12K_TPC_STATS_SUPPORT_320,</div><div class='add'>+	ATH12K_TPC_STATS_SUPPORT_AX,</div><div class='add'>+	ATH12K_TPC_STATS_SUPPORT_AX_EXTRA_MCS,</div><div class='add'>+	ATH12K_TPC_STATS_SUPPORT_BE,</div><div class='add'>+	ATH12K_TPC_STATS_SUPPORT_BE_PUNC,</div><div class='add'>+};</div><div class='ctx'> #else</div><div class='ctx'> static inline void ath12k_debugfs_soc_create(struct ath12k_base *ab)</div><div class='ctx'> {</div><div class='hunk'>@@ -29,6 +124,24 @@ static inline void ath12k_debugfs_unregister(struct ath12k *ar)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline bool ath12k_debugfs_is_extd_rx_stats_enabled(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ath12k_debugfs_rx_filter(struct ath12k *ar)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath12k_debugfs_op_vif_add(struct ieee80211_hw *hw,</div><div class='add'>+					     struct ieee80211_vif *vif)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ath12k_debugfs_pdev_create(struct ath12k_base *ab)</div><div class='add'>+{</div><div class='add'>+}</div><div class='ctx'> #endif /* CONFIG_ATH12K_DEBUGFS */</div><div class='ctx'> </div><div class='ctx'> #endif /* _ATH12K_DEBUGFS_H_ */</div><div class='head'>diff --git a/drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c b/drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c<br/>index f1b7e74aefe4..48b010a1b756 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c?id=b440d677e15ff30009ac4964a0f987db4416918b'>drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> // SPDX-License-Identifier: BSD-3-Clause-Clear</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.</div><div class='del'>- * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+ * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/vmalloc.h&gt;</div><div class='hunk'>@@ -12,8 +12,8 @@</div><div class='ctx'> #include "dp_rx.h"</div><div class='ctx'> </div><div class='ctx'> static u32</div><div class='del'>-print_array_to_buf(u8 *buf, u32 offset, const char *header,</div><div class='del'>-		   const __le32 *array, u32 array_len, const char *footer)</div><div class='add'>+print_array_to_buf_index(u8 *buf, u32 offset, const char *header, u32 stats_index,</div><div class='add'>+			 const __le32 *array, u32 array_len, const char *footer)</div><div class='ctx'> {</div><div class='ctx'> 	int index = 0;</div><div class='ctx'> 	u8 i;</div><div class='hunk'>@@ -26,7 +26,7 @@ print_array_to_buf(u8 *buf, u32 offset, const char *header,</div><div class='ctx'> 	for (i = 0; i &lt; array_len; i++) {</div><div class='ctx'> 		index += scnprintf(buf + offset + index,</div><div class='ctx'> 				   (ATH12K_HTT_STATS_BUF_SIZE - offset) - index,</div><div class='del'>-				   " %u:%u,", i, le32_to_cpu(array[i]));</div><div class='add'>+				   " %u:%u,", stats_index++, le32_to_cpu(array[i]));</div><div class='ctx'> 	}</div><div class='ctx'> 	/* To overwrite the last trailing comma */</div><div class='ctx'> 	index--;</div><div class='hunk'>@@ -40,6 +40,115 @@ print_array_to_buf(u8 *buf, u32 offset, const char *header,</div><div class='ctx'> 	return index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32</div><div class='add'>+print_array_to_buf(u8 *buf, u32 offset, const char *header,</div><div class='add'>+		   const __le32 *array, u32 array_len, const char *footer)</div><div class='add'>+{</div><div class='add'>+	return print_array_to_buf_index(buf, offset, header, 0, array, array_len,</div><div class='add'>+					footer);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+print_array_to_buf_s8(u8 *buf, u32 offset, const char *header, u32 stats_index,</div><div class='add'>+		      const s8 *array, u32 array_len, const char *footer)</div><div class='add'>+{</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	int index = 0;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (header)</div><div class='add'>+		index += scnprintf(buf + offset, buf_len - offset, "%s = ", header);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; array_len; i++) {</div><div class='add'>+		index += scnprintf(buf + offset + index, (buf_len - offset) - index,</div><div class='add'>+				   " %u:%d,", stats_index++, array[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	index--;</div><div class='add'>+	if ((offset + index) &lt; buf_len)</div><div class='add'>+		buf[offset + index] = '\0';</div><div class='add'>+</div><div class='add'>+	if (footer) {</div><div class='add'>+		index += scnprintf(buf + offset + index, (buf_len - offset) - index,</div><div class='add'>+				   "%s", footer);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return index;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *ath12k_htt_ax_tx_rx_ru_size_to_str(u8 ru_size)</div><div class='add'>+{</div><div class='add'>+	switch (ru_size) {</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_AX_RU_SIZE_26:</div><div class='add'>+		return "26";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_AX_RU_SIZE_52:</div><div class='add'>+		return "52";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_AX_RU_SIZE_106:</div><div class='add'>+		return "106";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_AX_RU_SIZE_242:</div><div class='add'>+		return "242";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_AX_RU_SIZE_484:</div><div class='add'>+		return "484";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_AX_RU_SIZE_996:</div><div class='add'>+		return "996";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_AX_RU_SIZE_996x2:</div><div class='add'>+		return "996x2";</div><div class='add'>+	default:</div><div class='add'>+		return "unknown";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *ath12k_htt_be_tx_rx_ru_size_to_str(u8 ru_size)</div><div class='add'>+{</div><div class='add'>+	switch (ru_size) {</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_26:</div><div class='add'>+		return "26";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_52:</div><div class='add'>+		return "52";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_52_26:</div><div class='add'>+		return "52+26";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_106:</div><div class='add'>+		return "106";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_106_26:</div><div class='add'>+		return "106+26";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_242:</div><div class='add'>+		return "242";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_484:</div><div class='add'>+		return "484";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_484_242:</div><div class='add'>+		return "484+242";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_996:</div><div class='add'>+		return "996";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_996_484:</div><div class='add'>+		return "996+484";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_996_484_242:</div><div class='add'>+		return "996+484+242";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_996x2:</div><div class='add'>+		return "996x2";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_996x2_484:</div><div class='add'>+		return "996x2+484";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_996x3:</div><div class='add'>+		return "996x3";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_996x3_484:</div><div class='add'>+		return "996x3+484";</div><div class='add'>+	case ATH12K_HTT_TX_RX_PDEV_STATS_BE_RU_SIZE_996x4:</div><div class='add'>+		return "996x4";</div><div class='add'>+	default:</div><div class='add'>+		return "unknown";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char*</div><div class='add'>+ath12k_tx_ru_size_to_str(enum ath12k_htt_stats_ru_type ru_type, u8 ru_size)</div><div class='add'>+{</div><div class='add'>+	if (ru_type == ATH12K_HTT_STATS_RU_TYPE_SINGLE_RU_ONLY)</div><div class='add'>+		return ath12k_htt_ax_tx_rx_ru_size_to_str(ru_size);</div><div class='add'>+	else if (ru_type == ATH12K_HTT_STATS_RU_TYPE_SINGLE_AND_MULTI_RU)</div><div class='add'>+		return ath12k_htt_be_tx_rx_ru_size_to_str(ru_size);</div><div class='add'>+	else</div><div class='add'>+		return "unknown";</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void</div><div class='ctx'> htt_print_tx_pdev_stats_cmn_tlv(const void *tag_buf, u16 tag_len,</div><div class='ctx'> 				struct debug_htt_stats_req *stats_req)</div><div class='hunk'>@@ -1447,6 +1556,3987 @@ ath12k_htt_print_tx_de_compl_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='ctx'> 	stats_req-&gt;buf_len = len;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_selfgen_cmn_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					  struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_selfgen_cmn_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 mac_id_word;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mac_id_word = __le32_to_cpu(htt_stats_buf-&gt;mac_id__word);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TX_SELFGEN_CMN_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id_word, ATH12K_HTT_STATS_MAC_ID));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "su_bar = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;su_bar));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rts = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rts));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "cts2self = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;cts2self));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "qos_null = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;qos_null));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "delayed_bar_1 = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;delayed_bar_1));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "delayed_bar_2 = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;delayed_bar_2));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "delayed_bar_3 = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;delayed_bar_3));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "delayed_bar_4 = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;delayed_bar_4));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "delayed_bar_5 = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;delayed_bar_5));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "delayed_bar_6 = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;delayed_bar_6));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "delayed_bar_7 = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;delayed_bar_7));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_selfgen_ac_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					 struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_selfgen_ac_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TX_SELFGEN_AC_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_su_ndpa_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_su_ndpa));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_su_ndp_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_su_ndp));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_mu_mimo_ndpa_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_ndpa));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_mu_mimo_ndp_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_ndp));</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "ac_mu_mimo_brpollX_tried = ", 1,</div><div class='add'>+					htt_stats_buf-&gt;ac_mu_mimo_brpoll,</div><div class='add'>+					ATH12K_HTT_TX_NUM_AC_MUMIMO_USER_STATS - 1,</div><div class='add'>+					"\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_selfgen_ax_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					 struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_selfgen_ax_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TX_SELFGEN_AX_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_su_ndpa_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_su_ndpa));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_su_ndp_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_su_ndp));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_mu_mimo_ndpa_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_mu_mimo_ndpa));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_mu_mimo_ndp_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_mu_mimo_ndp));</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "ax_mu_mimo_brpollX_tried = ", 1,</div><div class='add'>+					htt_stats_buf-&gt;ax_mu_mimo_brpoll,</div><div class='add'>+					ATH12K_HTT_TX_NUM_AX_MUMIMO_USER_STATS - 1, "\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_basic_trigger = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_basic_trigger));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_ulmumimo_total_trigger = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_ulmumimo_trigger));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_bsr_trigger = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_bsr_trigger));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_mu_bar_trigger = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_mu_bar_trigger));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_mu_rts_trigger = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_mu_rts_trigger));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_selfgen_be_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					 struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_selfgen_be_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TX_SELFGEN_BE_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_su_ndpa_queued = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_su_ndpa_queued));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_su_ndpa_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_su_ndpa));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_su_ndp_queued = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_su_ndp_queued));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_su_ndp_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_su_ndp));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_mimo_ndpa_queued = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_ndpa_queued));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_mimo_ndpa_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_ndpa));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_mimo_ndp_queued = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_ndp_queued));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_mimo_ndp_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_ndp));</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "be_mu_mimo_brpollX_queued = ", 1,</div><div class='add'>+					htt_stats_buf-&gt;be_mu_mimo_brpoll_queued,</div><div class='add'>+					ATH12K_HTT_TX_NUM_BE_MUMIMO_USER_STATS - 1,</div><div class='add'>+					"\n");</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "be_mu_mimo_brpollX_tried = ", 1,</div><div class='add'>+					htt_stats_buf-&gt;be_mu_mimo_brpoll,</div><div class='add'>+					ATH12K_HTT_TX_NUM_BE_MUMIMO_USER_STATS - 1,</div><div class='add'>+					"\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_ul_mumimo_trigger = ",</div><div class='add'>+				  htt_stats_buf-&gt;be_ul_mumimo_trigger,</div><div class='add'>+				  ATH12K_HTT_TX_NUM_BE_MUMIMO_USER_STATS, "\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_basic_trigger = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_basic_trigger));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_ulmumimo_total_trigger = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_ulmumimo_trigger));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_bsr_trigger = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_bsr_trigger));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_bar_trigger = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_bar_trigger));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_rts_trigger = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_rts_trigger));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_selfgen_ac_err_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_selfgen_ac_err_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TX_SELFGEN_AC_ERR_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_su_ndp_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_su_ndp_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_su_ndpa_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_su_ndpa_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_mu_mimo_ndpa_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_ndpa_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_mu_mimo_ndp_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_ndp_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_mu_mimo_brp1_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_brp1_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_mu_mimo_brp2_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_brp2_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ac_mu_mimo_brp3_err = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_brp3_err));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_selfgen_ax_err_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_selfgen_ax_err_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TX_SELFGEN_AX_ERR_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_su_ndp_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_su_ndp_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_su_ndpa_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_su_ndpa_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_mu_mimo_ndpa_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_mu_mimo_ndpa_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_mu_mimo_ndp_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_mu_mimo_ndp_err));</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "ax_mu_mimo_brpX_err", 1,</div><div class='add'>+					htt_stats_buf-&gt;ax_mu_mimo_brp_err,</div><div class='add'>+					ATH12K_HTT_TX_NUM_AX_MUMIMO_USER_STATS - 1,</div><div class='add'>+					"\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_basic_trigger_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_basic_trigger_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_ulmumimo_total_trigger_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_ulmumimo_trigger_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_bsr_trigger_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_bsr_trigger_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_mu_bar_trigger_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_mu_bar_trigger_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_mu_rts_trigger_err = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_mu_rts_trigger_err));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_selfgen_be_err_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_selfgen_be_err_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TX_SELFGEN_BE_ERR_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_su_ndp_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_su_ndp_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_su_ndp_flushed = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_su_ndp_flushed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_su_ndpa_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_su_ndpa_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_su_ndpa_flushed = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_su_ndpa_flushed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_mimo_ndpa_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_ndpa_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_mimo_ndpa_flushed = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_ndpa_flushed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_mimo_ndp_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_ndp_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_mimo_ndp_flushed = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_ndp_flushed));</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "be_mu_mimo_brpX_err", 1,</div><div class='add'>+					htt_stats_buf-&gt;be_mu_mimo_brp_err,</div><div class='add'>+					ATH12K_HTT_TX_NUM_BE_MUMIMO_USER_STATS - 1,</div><div class='add'>+					"\n");</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "be_mu_mimo_brpollX_flushed", 1,</div><div class='add'>+					htt_stats_buf-&gt;be_mu_mimo_brpoll_flushed,</div><div class='add'>+					ATH12K_HTT_TX_NUM_BE_MUMIMO_USER_STATS - 1,</div><div class='add'>+					"\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_mu_mimo_num_cbf_rcvd_on_brp_err",</div><div class='add'>+				  htt_stats_buf-&gt;be_mu_mimo_brp_err_num_cbf_rxd,</div><div class='add'>+				  ATH12K_HTT_TX_NUM_BE_MUMIMO_USER_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_ul_mumimo_trigger_err",</div><div class='add'>+				  htt_stats_buf-&gt;be_ul_mumimo_trigger_err,</div><div class='add'>+				  ATH12K_HTT_TX_NUM_BE_MUMIMO_USER_STATS, "\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_basic_trigger_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_basic_trigger_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_ulmumimo_total_trig_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_ulmumimo_trigger_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_bsr_trigger_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_bsr_trigger_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_bar_trigger_err = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_bar_trigger_err));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_mu_rts_trigger_err = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_mu_rts_trigger_err));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_selfgen_ac_sched_status_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+						      struct debug_htt_stats_req *stats)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_selfgen_ac_sched_status_stats_tlv *htt_stats_buf =</div><div class='add'>+		     tag_buf;</div><div class='add'>+	u8 *buf = stats-&gt;buf;</div><div class='add'>+	u32 len = stats-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_TX_SELFGEN_AC_SCHED_STATUS_STATS_TLV:\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ac_su_ndpa_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ac_su_ndpa_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ac_su_ndp_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ac_su_ndp_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ac_mu_mimo_ndpa_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ac_mu_mimo_ndpa_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ac_mu_mimo_ndp_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ac_mu_mimo_ndp_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ac_mu_mimo_brp_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ac_mu_mimo_brp_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ac_su_ndp_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;ac_su_ndp_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ac_mu_mimo_ndp_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;ac_mu_mimo_ndp_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ac_mu_mimo_brp_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;ac_mu_mimo_brp_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_selfgen_ax_sched_status_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+						      struct debug_htt_stats_req *stats)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_selfgen_ax_sched_status_stats_tlv *htt_stats_buf =</div><div class='add'>+		     tag_buf;</div><div class='add'>+	u8 *buf = stats-&gt;buf;</div><div class='add'>+	u32 len = stats-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_TX_SELFGEN_AX_SCHED_STATUS_STATS_TLV:\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_su_ndpa_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ax_su_ndpa_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_su_ndp_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ax_su_ndp_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_mu_mimo_ndpa_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ax_mu_mimo_ndpa_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_mu_mimo_ndp_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ax_mu_mimo_ndp_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_mu_brp_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ax_mu_brp_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_mu_bar_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ax_mu_bar_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_basic_trig_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ax_basic_trig_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_su_ndp_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;ax_su_ndp_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_mu_mimo_ndp_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;ax_mu_mimo_ndp_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_mu_brp_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;ax_mu_brp_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_mu_bar_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;ax_mu_bar_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_basic_trig_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;ax_basic_trig_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_ulmumimo_trig_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;ax_ulmumimo_trig_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_ulmumimo_trig_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;ax_ulmumimo_trig_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_selfgen_be_sched_status_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+						      struct debug_htt_stats_req *stats)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_selfgen_be_sched_status_stats_tlv *htt_stats_buf =</div><div class='add'>+		     tag_buf;</div><div class='add'>+	u8 *buf = stats-&gt;buf;</div><div class='add'>+	u32 len = stats-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_TX_SELFGEN_BE_SCHED_STATUS_STATS_TLV:\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_su_ndpa_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;be_su_ndpa_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_su_ndp_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;be_su_ndp_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_mu_mimo_ndpa_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;be_mu_mimo_ndpa_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_mu_mimo_ndp_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;be_mu_mimo_ndp_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_mu_brp_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;be_mu_brp_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_mu_bar_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;be_mu_bar_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_basic_trig_sch_status",</div><div class='add'>+				  htt_stats_buf-&gt;be_basic_trig_sch_status,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_su_ndp_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;be_su_ndp_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_mu_mimo_ndp_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;be_mu_mimo_ndp_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_mu_brp_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;be_mu_brp_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_mu_bar_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;be_mu_bar_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_basic_trig_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;be_basic_trig_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_basic_trig_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;be_basic_trig_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_ulmumimo_trig_sch_flag_err",</div><div class='add'>+				  htt_stats_buf-&gt;be_ulmumimo_trig_sch_flag_err,</div><div class='add'>+				  ATH12K_HTT_TX_SELFGEN_SCH_TSFLAG_ERR_STATS, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_stats_string_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				  struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_stats_string_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u8 i;</div><div class='add'>+	u16 index = 0;</div><div class='add'>+	u32 datum;</div><div class='add'>+	char data[ATH12K_HTT_MAX_STRING_LEN] = {};</div><div class='add'>+</div><div class='add'>+	tag_len = tag_len &gt;&gt; 2;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_STATS_STRING_TLV:\n");</div><div class='add'>+	for (i = 0; i &lt; tag_len; i++) {</div><div class='add'>+		datum = __le32_to_cpu(htt_stats_buf-&gt;data[i]);</div><div class='add'>+		index += scnprintf(&amp;data[index], ATH12K_HTT_MAX_STRING_LEN - index,</div><div class='add'>+				   "%.*s", 4, (char *)&amp;datum);</div><div class='add'>+		if (index &gt;= ATH12K_HTT_MAX_STRING_LEN)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "data = %s\n\n", data);</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_sring_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				 struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_sring_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 mac_id_word;</div><div class='add'>+	u32 avail_words;</div><div class='add'>+	u32 head_tail_ptr;</div><div class='add'>+	u32 sring_stat;</div><div class='add'>+	u32 tail_ptr;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mac_id_word = __le32_to_cpu(htt_stats_buf-&gt;mac_id__ring_id__arena__ep);</div><div class='add'>+	avail_words = __le32_to_cpu(htt_stats_buf-&gt;num_avail_words__num_valid_words);</div><div class='add'>+	head_tail_ptr = __le32_to_cpu(htt_stats_buf-&gt;head_ptr__tail_ptr);</div><div class='add'>+	sring_stat = __le32_to_cpu(htt_stats_buf-&gt;consumer_empty__producer_full);</div><div class='add'>+	tail_ptr = __le32_to_cpu(htt_stats_buf-&gt;prefetch_count__internal_tail_ptr);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_SRING_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id_word, ATH12K_HTT_SRING_STATS_MAC_ID));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ring_id = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id_word, ATH12K_HTT_SRING_STATS_RING_ID));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "arena = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id_word, ATH12K_HTT_SRING_STATS_ARENA));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ep = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id_word, ATH12K_HTT_SRING_STATS_EP));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "base_addr_lsb = 0x%x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;base_addr_lsb));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "base_addr_msb = 0x%x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;base_addr_msb));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ring_size = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ring_size));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "elem_size = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;elem_size));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_avail_words = %u\n",</div><div class='add'>+			 u32_get_bits(avail_words,</div><div class='add'>+				      ATH12K_HTT_SRING_STATS_NUM_AVAIL_WORDS));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_valid_words = %u\n",</div><div class='add'>+			 u32_get_bits(avail_words,</div><div class='add'>+				      ATH12K_HTT_SRING_STATS_NUM_VALID_WORDS));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "head_ptr = %u\n",</div><div class='add'>+			 u32_get_bits(head_tail_ptr, ATH12K_HTT_SRING_STATS_HEAD_PTR));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "tail_ptr = %u\n",</div><div class='add'>+			 u32_get_bits(head_tail_ptr, ATH12K_HTT_SRING_STATS_TAIL_PTR));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "consumer_empty = %u\n",</div><div class='add'>+			 u32_get_bits(sring_stat,</div><div class='add'>+				      ATH12K_HTT_SRING_STATS_CONSUMER_EMPTY));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "producer_full = %u\n",</div><div class='add'>+			 u32_get_bits(head_tail_ptr,</div><div class='add'>+				      ATH12K_HTT_SRING_STATS_PRODUCER_FULL));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "prefetch_count = %u\n",</div><div class='add'>+			 u32_get_bits(tail_ptr, ATH12K_HTT_SRING_STATS_PREFETCH_COUNT));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "internal_tail_ptr = %u\n\n",</div><div class='add'>+			 u32_get_bits(tail_ptr,</div><div class='add'>+				      ATH12K_HTT_SRING_STATS_INTERNAL_TAIL_PTR));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_sfm_cmn_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+			     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_sfm_cmn_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 mac_id_word;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mac_id_word = __le32_to_cpu(htt_stats_buf-&gt;mac_id__word);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_SFM_CMN_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id_word, ATH12K_HTT_STATS_MAC_ID));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "buf_total = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;buf_total));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mem_empty = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;mem_empty));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "deallocate_bufs = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;deallocate_bufs));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_records = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_records));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_sfm_client_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_sfm_client_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_SFM_CLIENT_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "client_id = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;client_id));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "buf_min = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;buf_min));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "buf_max = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;buf_max));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "buf_busy = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;buf_busy));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "buf_alloc = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;buf_alloc));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "buf_avail = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;buf_avail));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_users = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_users));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_sfm_client_user_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_sfm_client_user_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u16 num_elems = tag_len &gt;&gt; 2;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_SFM_CLIENT_USER_TLV:\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "dwords_used_by_user_n",</div><div class='add'>+				  htt_stats_buf-&gt;dwords_used_by_user_n,</div><div class='add'>+				  num_elems, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_pdev_mu_mimo_sch_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					       struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_pdev_mu_mimo_sch_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_TX_PDEV_MU_MIMO_SCH_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mu_mimo_sch_posted = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;mu_mimo_sch_posted));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mu_mimo_sch_failed = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;mu_mimo_sch_failed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mu_mimo_ppdu_posted = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;mu_mimo_ppdu_posted));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "\nac_mu_mimo_sch_posted_per_group_index %u (SU) = %u\n", 0,</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_per_grp_sz[0]));</div><div class='add'>+	for (i = 1; i &lt; ATH12K_HTT_TX_NUM_AC_MUMIMO_USER_STATS; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ac_mu_mimo_sch_posted_per_group_index %u ", i);</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "(TOTAL STREAMS = %u) = %u\n", i + 1,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_per_grp_sz[i]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_NUM_AC_MUMIMO_USER_STATS; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ac_mu_mimo_sch_posted_per_group_index %u ",</div><div class='add'>+				 i + ATH12K_HTT_TX_NUM_AC_MUMIMO_USER_STATS);</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "(TOTAL STREAMS = %u) = %u\n",</div><div class='add'>+				 i + ATH12K_HTT_TX_NUM_AC_MUMIMO_USER_STATS + 1,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_grp_sz_ext[i]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "\nax_mu_mimo_sch_posted_per_group_index %u (SU) = %u\n", 0,</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ax_mu_mimo_per_grp_sz[0]));</div><div class='add'>+	for (i = 1; i &lt; ATH12K_HTT_TX_NUM_AX_MUMIMO_USER_STATS; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_mu_mimo_sch_posted_per_group_index %u ", i);</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "(TOTAL STREAMS = %u) = %u\n", i + 1,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ax_mu_mimo_per_grp_sz[i]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			"\nbe_mu_mimo_sch_posted_per_group_index %u (SU) = %u\n", 0,</div><div class='add'>+			le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_per_grp_sz[0]));</div><div class='add'>+	for (i = 1; i &lt; ATH12K_HTT_TX_NUM_BE_MUMIMO_USER_STATS; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "be_mu_mimo_sch_posted_per_group_index %u ", i);</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "(TOTAL STREAMS = %u) = %u\n", i + 1,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_per_grp_sz[i]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n11ac MU_MIMO SCH STATS:\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_NUM_AC_MUMIMO_USER_STATS; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "ac_mu_mimo_sch_nusers_");</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "%u = %u\n", i,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ac_mu_mimo_sch_nusers[i]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n11ax MU_MIMO SCH STATS:\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_NUM_AX_MUMIMO_USER_STATS; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "ax_mu_mimo_sch_nusers_");</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "%u = %u\n", i,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ax_mu_mimo_sch_nusers[i]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n11be MU_MIMO SCH STATS:\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_NUM_BE_MUMIMO_USER_STATS; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "be_mu_mimo_sch_nusers_");</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "%u = %u\n", i,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;be_mu_mimo_sch_nusers[i]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n11ax OFDMA SCH STATS:\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_NUM_OFDMA_USER_STATS; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_ofdma_sch_nusers_%u = %u\n", i,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ax_ofdma_sch_nusers[i]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_ul_ofdma_basic_sch_nusers_%u = %u\n", i,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ax_ul_ofdma_nusers[i]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_ul_ofdma_bsr_sch_nusers_%u = %u\n", i,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ax_ul_ofdma_bsr_nusers[i]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_ul_ofdma_bar_sch_nusers_%u = %u\n", i,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ax_ul_ofdma_bar_nusers[i]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_ul_ofdma_brp_sch_nusers_%u = %u\n\n", i,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ax_ul_ofdma_brp_nusers[i]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "11ax UL MUMIMO SCH STATS:\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_NUM_UL_MUMIMO_USER_STATS; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_ul_mumimo_basic_sch_nusers_%u = %u\n", i,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ax_ul_mumimo_nusers[i]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_ul_mumimo_brp_sch_nusers_%u = %u\n\n", i,</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;ax_ul_mumimo_brp_nusers[i]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_pdev_mumimo_grp_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					      struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_pdev_mumimo_grp_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	int j;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TX_PDEV_MUMIMO_GRP_STATS:\n");</div><div class='add'>+	len += print_array_to_buf(buf, len,</div><div class='add'>+				  "dl_mumimo_grp_tputs_observed (per bin = 300 mbps)",</div><div class='add'>+				  htt_stats_buf-&gt;dl_mumimo_grp_tputs,</div><div class='add'>+				  ATH12K_HTT_STATS_MUMIMO_TPUT_NUM_BINS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "dl_mumimo_grp eligible",</div><div class='add'>+				  htt_stats_buf-&gt;dl_mumimo_grp_eligible,</div><div class='add'>+				  ATH12K_HTT_STATS_NUM_MAX_MUMIMO_SZ, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "dl_mumimo_grp_ineligible",</div><div class='add'>+				  htt_stats_buf-&gt;dl_mumimo_grp_ineligible,</div><div class='add'>+				  ATH12K_HTT_STATS_NUM_MAX_MUMIMO_SZ, "\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "dl_mumimo_grp_invalid:\n");</div><div class='add'>+	for (j = 0; j &lt; ATH12K_HTT_STATS_NUM_MAX_MUMIMO_SZ; j++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "grp_id = %u", j);</div><div class='add'>+		len += print_array_to_buf(buf, len, "",</div><div class='add'>+					  htt_stats_buf-&gt;dl_mumimo_grp_invalid,</div><div class='add'>+					  ATH12K_HTT_STATS_MAX_INVALID_REASON_CODE,</div><div class='add'>+					  "\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += print_array_to_buf(buf, len, "ul_mumimo_grp_best_grp_size",</div><div class='add'>+				  htt_stats_buf-&gt;ul_mumimo_grp_best_grp_size,</div><div class='add'>+				  ATH12K_HTT_STATS_NUM_MAX_MUMIMO_SZ, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ul_mumimo_grp_best_num_usrs = ",</div><div class='add'>+				  htt_stats_buf-&gt;ul_mumimo_grp_best_usrs,</div><div class='add'>+				  ATH12K_HTT_TX_NUM_AX_MUMIMO_USER_STATS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len,</div><div class='add'>+				  "ul_mumimo_grp_tputs_observed (per bin = 300 mbps)",</div><div class='add'>+				  htt_stats_buf-&gt;ul_mumimo_grp_tputs,</div><div class='add'>+				  ATH12K_HTT_STATS_MUMIMO_TPUT_NUM_BINS, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_pdev_mu_mimo_mpdu_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+						struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_pdev_mpdu_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 user_index;</div><div class='add'>+	u32 tx_sched_mode;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	user_index = __le32_to_cpu(htt_stats_buf-&gt;user_index);</div><div class='add'>+	tx_sched_mode = __le32_to_cpu(htt_stats_buf-&gt;tx_sched_mode);</div><div class='add'>+</div><div class='add'>+	if (tx_sched_mode == ATH12K_HTT_STATS_TX_SCHED_MODE_MU_MIMO_AC) {</div><div class='add'>+		if (!user_index)</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "HTT_TX_PDEV_MU_MIMO_AC_MPDU_STATS:\n");</div><div class='add'>+</div><div class='add'>+		if (user_index &lt; ATH12K_HTT_TX_NUM_AC_MUMIMO_USER_STATS) {</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ac_mu_mimo_mpdus_queued_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_queued_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ac_mu_mimo_mpdus_tried_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_tried_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ac_mu_mimo_mpdus_failed_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_failed_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ac_mu_mimo_mpdus_requeued_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_requeued_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ac_mu_mimo_err_no_ba_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;err_no_ba_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ac_mu_mimo_mpdu_underrun_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdu_underrun_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					"ac_mu_mimo_ampdu_underrun_usr_%u = %u\n\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;ampdu_underrun_usr));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tx_sched_mode == ATH12K_HTT_STATS_TX_SCHED_MODE_MU_MIMO_AX) {</div><div class='add'>+		if (!user_index)</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "HTT_TX_PDEV_MU_MIMO_AX_MPDU_STATS:\n");</div><div class='add'>+</div><div class='add'>+		if (user_index &lt; ATH12K_HTT_TX_NUM_AX_MUMIMO_USER_STATS) {</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_mimo_mpdus_queued_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_queued_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_mimo_mpdus_tried_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_tried_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_mimo_mpdus_failed_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_failed_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_mimo_mpdus_requeued_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_requeued_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_mimo_err_no_ba_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;err_no_ba_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_mimo_mpdu_underrun_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdu_underrun_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_mimo_ampdu_underrun_usr_%u = %u\n\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;ampdu_underrun_usr));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tx_sched_mode == ATH12K_HTT_STATS_TX_SCHED_MODE_MU_OFDMA_AX) {</div><div class='add'>+		if (!user_index)</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "HTT_TX_PDEV_AX_MU_OFDMA_MPDU_STATS:\n");</div><div class='add'>+</div><div class='add'>+		if (user_index &lt; ATH12K_HTT_TX_NUM_OFDMA_USER_STATS) {</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_ofdma_mpdus_queued_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_queued_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_ofdma_mpdus_tried_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_tried_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_ofdma_mpdus_failed_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_failed_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_ofdma_mpdus_requeued_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdus_requeued_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_ofdma_err_no_ba_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;err_no_ba_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_ofdma_mpdu_underrun_usr_%u = %u\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;mpdu_underrun_usr));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ax_mu_ofdma_ampdu_underrun_usr_%u = %u\n\n",</div><div class='add'>+					 user_index,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;ampdu_underrun_usr));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_pdev_cca_stats_hist_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					 struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_pdev_cca_stats_hist_v1_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_PDEV_CCA_STATS_HIST_TLV :\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "chan_num = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;chan_num));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_records = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_records));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "valid_cca_counters_bitmap = 0x%x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;valid_cca_counters_bitmap));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "collection_interval = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;collection_interval));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_pdev_stats_cca_counters_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_pdev_stats_cca_counters_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_PDEV_STATS_CCA_COUNTERS_TLV:(in usec)\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "tx_frame_usec = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_frame_usec));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_frame_usec = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_frame_usec));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_clear_usec = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_clear_usec));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "my_rx_frame_usec = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;my_rx_frame_usec));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "usec_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;usec_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "med_rx_idle_usec = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;med_rx_idle_usec));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "med_tx_idle_global_usec = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;med_tx_idle_global_usec));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "cca_obss_usec = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;cca_obss_usec));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_sounding_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				       struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_sounding_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	const __le32 *cbf_20, *cbf_40, *cbf_80, *cbf_160, *cbf_320;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 tx_sounding_mode;</div><div class='add'>+	u8 i, u;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cbf_20 = htt_stats_buf-&gt;cbf_20;</div><div class='add'>+	cbf_40 = htt_stats_buf-&gt;cbf_40;</div><div class='add'>+	cbf_80 = htt_stats_buf-&gt;cbf_80;</div><div class='add'>+	cbf_160 = htt_stats_buf-&gt;cbf_160;</div><div class='add'>+	cbf_320 = htt_stats_buf-&gt;cbf_320;</div><div class='add'>+	tx_sounding_mode = le32_to_cpu(htt_stats_buf-&gt;tx_sounding_mode);</div><div class='add'>+</div><div class='add'>+	if (tx_sounding_mode == ATH12K_HTT_TX_AC_SOUNDING_MODE) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "HTT_TX_AC_SOUNDING_STATS_TLV:\n");</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ac_cbf_20 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ac_cbf_40 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ac_cbf_80 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ac_cbf_160 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+</div><div class='add'>+		for (u = 0, i = 0; u &lt; ATH12K_HTT_TX_NUM_AC_MUMIMO_USER_STATS; u++) {</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "Sounding User_%u = 20MHz: %u, ", u,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "40MHz: %u, ",</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "80MHz: %u, ",</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "160MHz: %u\n",</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+		}</div><div class='add'>+	} else if (tx_sounding_mode == ATH12K_HTT_TX_AX_SOUNDING_MODE) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "\nHTT_TX_AX_SOUNDING_STATS_TLV:\n");</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_cbf_20 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_cbf_40 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_cbf_80 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ax_cbf_160 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+</div><div class='add'>+		for (u = 0, i = 0; u &lt; ATH12K_HTT_TX_NUM_AX_MUMIMO_USER_STATS; u++) {</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "Sounding User_%u = 20MHz: %u, ", u,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "40MHz: %u, ",</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "80MHz: %u, ",</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "160MHz: %u\n",</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+		}</div><div class='add'>+	} else if (tx_sounding_mode == ATH12K_HTT_TX_BE_SOUNDING_MODE) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "\nHTT_TX_BE_SOUNDING_STATS_TLV:\n");</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "be_cbf_20 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_20[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "be_cbf_40 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_40[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "be_cbf_80 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_80[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "be_cbf_160 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_160[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "be_cbf_320 = IBF: %u, SU_SIFS: %u, SU_RBO: %u, ",</div><div class='add'>+				 le32_to_cpu(cbf_320[ATH12K_HTT_IMPL_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_320[ATH12K_HTT_EXPL_SUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_320[ATH12K_HTT_EXPL_SURBO_STEER_STATS]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "MU_SIFS: %u, MU_RBO: %u\n",</div><div class='add'>+				 le32_to_cpu(cbf_320[ATH12K_HTT_EXPL_MUSIFS_STEER_STATS]),</div><div class='add'>+				 le32_to_cpu(cbf_320[ATH12K_HTT_EXPL_MURBO_STEER_STATS]));</div><div class='add'>+		for (u = 0, i = 0; u &lt; ATH12K_HTT_TX_NUM_BE_MUMIMO_USER_STATS; u++) {</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "Sounding User_%u = 20MHz: %u, ", u,</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "40MHz: %u, ",</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "80MHz: %u, ",</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]));</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "160MHz: %u, 320MHz: %u\n",</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding[i++]),</div><div class='add'>+					 le32_to_cpu(htt_stats_buf-&gt;sounding_320[u]));</div><div class='add'>+		}</div><div class='add'>+	} else if (tx_sounding_mode == ATH12K_HTT_TX_CMN_SOUNDING_MODE) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "\nCV UPLOAD HANDLER STATS:\n");</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_nc_mismatch_err = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_nc_mismatch_err));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_fcs_err = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_fcs_err));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_frag_idx_mismatch = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_frag_idx_mismatch));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_invalid_peer_id = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_invalid_peer_id));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_no_txbf_setup = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_no_txbf_setup));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_expiry_in_update = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_expiry_in_update));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_pkt_bw_exceed = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_pkt_bw_exceed));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_dma_not_done_err = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_dma_not_done_err));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_update_failed = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_update_failed));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_dma_timeout_error = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_dma_timeout_error));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_buf_ibf_uploads = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_buf_ibf_uploads));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_buf_ebf_uploads = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_buf_ebf_uploads));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_buf_received = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_buf_received));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_buf_fed_back = %u\n\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_buf_fed_back));</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "CV QUERY STATS:\n");</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_total_query = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_total_query));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "cv_total_pattern_query = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_total_pattern_query));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_total_bw_query = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_total_bw_query));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_invalid_bw_coding = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_invalid_bw_coding));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_forced_sounding = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_forced_sounding));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "cv_standalone_sounding = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_standalone_sounding));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_nc_mismatch = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_nc_mismatch));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_fb_type_mismatch = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_fb_type_mismatch));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_ofdma_bw_mismatch = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_ofdma_bw_mismatch));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_bw_mismatch = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_bw_mismatch));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_pattern_mismatch = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_pattern_mismatch));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_preamble_mismatch = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_preamble_mismatch));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_nr_mismatch = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_nr_mismatch));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "cv_in_use_cnt_exceeded = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_in_use_cnt_exceeded));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_ntbr_sounding = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_ntbr_sounding));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "cv_found_upload_in_progress = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_found_upload_in_progress));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "cv_expired_during_query = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_expired_during_query));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_found = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_found));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_not_found = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_not_found));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_total_query_ibf = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_total_query_ibf));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_found_ibf = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_found_ibf));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "cv_not_found_ibf = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_not_found_ibf));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "cv_expired_during_query_ibf = %u\n\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;cv_expired_during_query_ibf));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_pdev_obss_pd_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_pdev_obss_pd_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u8 i;</div><div class='add'>+	static const char *access_cat_names[ATH12K_HTT_NUM_AC_WMM] = {"best effort",</div><div class='add'>+								      "background",</div><div class='add'>+								      "video", "voice"};</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_PDEV_OBSS_PD_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_spatial_reuse_tx = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_sr_tx_transmissions));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "num_spatial_reuse_opportunities = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_spatial_reuse_opportunities));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_non_srg_opportunities = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_non_srg_opportunities));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_non_srg_ppdu_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_non_srg_ppdu_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_non_srg_ppdu_success = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_non_srg_ppdu_success));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_srg_opportunities = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_srg_opportunities));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_srg_ppdu_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_srg_ppdu_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_srg_ppdu_success = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_srg_ppdu_success));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_psr_opportunities = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_psr_opportunities));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_psr_ppdu_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_psr_ppdu_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "num_psr_ppdu_success = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_psr_ppdu_success));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "min_duration_check_flush_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_obss_min_dur_check_flush_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "sr_ppdu_abort_flush_cnt = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;num_sr_ppdu_abort_flush_cnt));</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_PDEV_OBSS_PD_PER_AC_STATS:\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_NUM_AC_WMM; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "Access Category %u (%s)\n",</div><div class='add'>+				 i, access_cat_names[i]);</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "num_non_srg_ppdu_tried = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;num_non_srg_tried_per_ac[i]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "num_non_srg_ppdu_success = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;num_non_srg_success_ac[i]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "num_srg_ppdu_tried = %u\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;num_srg_tried_per_ac[i]));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "num_srg_ppdu_success = %u\n\n",</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;num_srg_success_per_ac[i]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_latency_prof_ctx_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				      struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_latency_prof_ctx_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_STATS_LATENCY_CTX_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "duration = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;duration));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "tx_msdu_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_msdu_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "tx_mpdu_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_mpdu_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_msdu_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_msdu_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_mpdu_cnt = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_mpdu_cnt));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_latency_prof_cnt(const void *tag_buf, u16 tag_len,</div><div class='add'>+				  struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_latency_prof_cnt_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_STATS_LATENCY_CNT_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "prof_enable_cnt = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;prof_enable_cnt));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_latency_prof_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_latency_prof_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (le32_to_cpu(htt_stats_buf-&gt;print_header) == 1) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "HTT_STATS_LATENCY_PROF_TLV:\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Latency name = %s\n",</div><div class='add'>+			 htt_stats_buf-&gt;latency_prof_name);</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "count = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "minimum = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;min));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "maximum = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;max));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "last = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;last));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "total = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tot));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "average = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;avg));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "histogram interval = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;hist_intvl));</div><div class='add'>+	len += print_array_to_buf(buf, len, "histogram", htt_stats_buf-&gt;hist,</div><div class='add'>+				  ATH12K_HTT_LATENCY_PROFILE_NUM_MAX_HIST, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_ul_ofdma_trigger_stats(const void *tag_buf, u16 tag_len,</div><div class='add'>+					struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_rx_pdev_ul_trigger_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 mac_id;</div><div class='add'>+	u8 j;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mac_id = __le32_to_cpu(htt_stats_buf-&gt;mac_id__word);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_RX_PDEV_UL_TRIGGER_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id, ATH12K_HTT_STATS_MAC_ID));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_11ax_ul_ofdma = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_11ax_ul_ofdma));</div><div class='add'>+	len += print_array_to_buf(buf, len, "ul_ofdma_rx_mcs",</div><div class='add'>+				  htt_stats_buf-&gt;ul_ofdma_rx_mcs,</div><div class='add'>+				  ATH12K_HTT_RX_NUM_MCS_CNTRS, "\n");</div><div class='add'>+	for (j = 0; j &lt; ATH12K_HTT_RX_NUM_GI_CNTRS; j++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "ul_ofdma_rx_gi[%u]", j);</div><div class='add'>+		len += print_array_to_buf(buf, len, "",</div><div class='add'>+					  htt_stats_buf-&gt;ul_ofdma_rx_gi[j],</div><div class='add'>+					  ATH12K_HTT_RX_NUM_MCS_CNTRS, "\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "ul_ofdma_rx_nss", 1,</div><div class='add'>+					htt_stats_buf-&gt;ul_ofdma_rx_nss,</div><div class='add'>+					ATH12K_HTT_RX_NUM_SPATIAL_STREAMS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ul_ofdma_rx_bw",</div><div class='add'>+				  htt_stats_buf-&gt;ul_ofdma_rx_bw,</div><div class='add'>+				  ATH12K_HTT_RX_NUM_BW_CNTRS, "\n");</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; ATH12K_HTT_RX_NUM_REDUCED_CHAN_TYPES; j++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, j == 0 ?</div><div class='add'>+				 "half_ul_ofdma_rx_bw" :</div><div class='add'>+				 "quarter_ul_ofdma_rx_bw");</div><div class='add'>+		len += print_array_to_buf(buf, len, "", htt_stats_buf-&gt;red_bw[j],</div><div class='add'>+					  ATH12K_HTT_RX_NUM_BW_CNTRS, "\n");</div><div class='add'>+	}</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ul_ofdma_rx_stbc = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ul_ofdma_rx_stbc));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ul_ofdma_rx_ldpc = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ul_ofdma_rx_ldpc));</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_ulofdma_data_ru_size_ppdu = ");</div><div class='add'>+	for (j = 0; j &lt; ATH12K_HTT_RX_NUM_RU_SIZE_CNTRS; j++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %s:%u ",</div><div class='add'>+				 ath12k_htt_ax_tx_rx_ru_size_to_str(j),</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;data_ru_size_ppdu[j]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "rx_ulofdma_non_data_ru_size_ppdu = ");</div><div class='add'>+	for (j = 0; j &lt; ATH12K_HTT_RX_NUM_RU_SIZE_CNTRS; j++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %s:%u ",</div><div class='add'>+				 ath12k_htt_ax_tx_rx_ru_size_to_str(j),</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;non_data_ru_size_ppdu[j]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += print_array_to_buf(buf, len, "rx_rssi_track_sta_aid",</div><div class='add'>+				  htt_stats_buf-&gt;uplink_sta_aid,</div><div class='add'>+				  ATH12K_HTT_RX_UL_MAX_UPLINK_RSSI_TRACK, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "rx_sta_target_rssi",</div><div class='add'>+				  htt_stats_buf-&gt;uplink_sta_target_rssi,</div><div class='add'>+				  ATH12K_HTT_RX_UL_MAX_UPLINK_RSSI_TRACK, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "rx_sta_fd_rssi",</div><div class='add'>+				  htt_stats_buf-&gt;uplink_sta_fd_rssi,</div><div class='add'>+				  ATH12K_HTT_RX_UL_MAX_UPLINK_RSSI_TRACK, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "rx_sta_power_headroom",</div><div class='add'>+				  htt_stats_buf-&gt;uplink_sta_power_headroom,</div><div class='add'>+				  ATH12K_HTT_RX_UL_MAX_UPLINK_RSSI_TRACK, "\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "ul_ofdma_basic_trigger_rx_qos_null_only = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ul_ofdma_bsc_trig_rx_qos_null_only));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_ul_ofdma_user_stats(const void *tag_buf, u16 tag_len,</div><div class='add'>+				     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_rx_pdev_ul_ofdma_user_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 user_index;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	user_index = __le32_to_cpu(htt_stats_buf-&gt;user_index);</div><div class='add'>+</div><div class='add'>+	if (!user_index)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "HTT_RX_PDEV_UL_OFDMA_USER_STAS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_ulofdma_non_data_ppdu_%u = %u\n",</div><div class='add'>+			 user_index,</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_ulofdma_non_data_ppdu));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_ulofdma_data_ppdu_%u = %u\n",</div><div class='add'>+			 user_index,</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_ulofdma_data_ppdu));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_ulofdma_mpdu_ok_%u = %u\n",</div><div class='add'>+			 user_index,</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_ulofdma_mpdu_ok));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_ulofdma_mpdu_fail_%u = %u\n",</div><div class='add'>+			 user_index,</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_ulofdma_mpdu_fail));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "rx_ulofdma_non_data_nusers_%u = %u\n", user_index,</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_ulofdma_non_data_nusers));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_ulofdma_data_nusers_%u = %u\n\n",</div><div class='add'>+			 user_index,</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_ulofdma_data_nusers));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_ul_mumimo_trig_stats(const void *tag_buf, u16 tag_len,</div><div class='add'>+				      struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_rx_ul_mumimo_trig_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	char str_buf[ATH12K_HTT_MAX_STRING_LEN] = {};</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 mac_id;</div><div class='add'>+	u16 index;</div><div class='add'>+	u8 i, j;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mac_id = __le32_to_cpu(htt_stats_buf-&gt;mac_id__word);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_RX_PDEV_UL_MUMIMO_TRIG_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id, ATH12K_HTT_STATS_MAC_ID));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_11ax_ul_mumimo = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_11ax_ul_mumimo));</div><div class='add'>+	index = 0;</div><div class='add'>+	memset(str_buf, 0x0, ATH12K_HTT_MAX_STRING_LEN);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_RX_NUM_MCS_CNTRS; i++)</div><div class='add'>+		index += scnprintf(&amp;str_buf[index], ATH12K_HTT_MAX_STRING_LEN - index,</div><div class='add'>+				  " %u:%u,", i,</div><div class='add'>+				  le32_to_cpu(htt_stats_buf-&gt;ul_mumimo_rx_mcs[i]));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_RX_NUM_EXTRA_MCS_CNTRS; i++)</div><div class='add'>+		index += scnprintf(&amp;str_buf[index], ATH12K_HTT_MAX_STRING_LEN - index,</div><div class='add'>+				  " %u:%u,", i + ATH12K_HTT_RX_NUM_MCS_CNTRS,</div><div class='add'>+				  le32_to_cpu(htt_stats_buf-&gt;ul_mumimo_rx_mcs_ext[i]));</div><div class='add'>+	str_buf[--index] = '\0';</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ul_mumimo_rx_mcs = %s\n", str_buf);</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; ATH12K_HTT_RX_NUM_GI_CNTRS; j++) {</div><div class='add'>+		index = 0;</div><div class='add'>+		memset(&amp;str_buf[index], 0x0, ATH12K_HTT_MAX_STRING_LEN);</div><div class='add'>+		for (i = 0; i &lt; ATH12K_HTT_RX_NUM_MCS_CNTRS; i++)</div><div class='add'>+			index += scnprintf(&amp;str_buf[index],</div><div class='add'>+					  ATH12K_HTT_MAX_STRING_LEN - index,</div><div class='add'>+					  " %u:%u,", i,</div><div class='add'>+					  le32_to_cpu(htt_stats_buf-&gt;ul_rx_gi[j][i]));</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ATH12K_HTT_RX_NUM_EXTRA_MCS_CNTRS; i++)</div><div class='add'>+			index += scnprintf(&amp;str_buf[index],</div><div class='add'>+					  ATH12K_HTT_MAX_STRING_LEN - index,</div><div class='add'>+					  " %u:%u,", i + ATH12K_HTT_RX_NUM_MCS_CNTRS,</div><div class='add'>+					  le32_to_cpu(htt_stats_buf-&gt;ul_gi_ext[j][i]));</div><div class='add'>+		str_buf[--index] = '\0';</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "ul_mumimo_rx_gi_%u = %s\n", j, str_buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	index = 0;</div><div class='add'>+	memset(str_buf, 0x0, ATH12K_HTT_MAX_STRING_LEN);</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "ul_mumimo_rx_nss", 1,</div><div class='add'>+					htt_stats_buf-&gt;ul_mumimo_rx_nss,</div><div class='add'>+					ATH12K_HTT_RX_NUM_SPATIAL_STREAMS, "\n");</div><div class='add'>+</div><div class='add'>+	len += print_array_to_buf(buf, len, "ul_mumimo_rx_bw",</div><div class='add'>+				  htt_stats_buf-&gt;ul_mumimo_rx_bw,</div><div class='add'>+				  ATH12K_HTT_RX_NUM_BW_CNTRS, "\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_RX_NUM_REDUCED_CHAN_TYPES; i++) {</div><div class='add'>+		index = 0;</div><div class='add'>+		memset(str_buf, 0x0, ATH12K_HTT_MAX_STRING_LEN);</div><div class='add'>+		for (j = 0; j &lt; ATH12K_HTT_RX_NUM_BW_CNTRS; j++)</div><div class='add'>+			index += scnprintf(&amp;str_buf[index],</div><div class='add'>+					  ATH12K_HTT_MAX_STRING_LEN - index,</div><div class='add'>+					  " %u:%u,", j,</div><div class='add'>+					  le32_to_cpu(htt_stats_buf-&gt;red_bw[i][j]));</div><div class='add'>+		str_buf[--index] = '\0';</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "%s = %s\n",</div><div class='add'>+				 i == 0 ? "half_ul_mumimo_rx_bw" :</div><div class='add'>+				 "quarter_ul_mumimo_rx_bw", str_buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ul_mumimo_rx_stbc = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ul_mumimo_rx_stbc));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ul_mumimo_rx_ldpc = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ul_mumimo_rx_ldpc));</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; ATH12K_HTT_RX_NUM_SPATIAL_STREAMS; j++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "rx_ul_mumimo_rssi_in_dbm: chain%u ", j);</div><div class='add'>+		len += print_array_to_buf_s8(buf, len, "", 0,</div><div class='add'>+					     htt_stats_buf-&gt;ul_rssi[j],</div><div class='add'>+					     ATH12K_HTT_RX_NUM_BW_CNTRS, "\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; ATH12K_HTT_TX_UL_MUMIMO_USER_STATS; j++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "rx_ul_mumimo_target_rssi: user_%u ", j);</div><div class='add'>+		len += print_array_to_buf_s8(buf, len, "", 0,</div><div class='add'>+					     htt_stats_buf-&gt;tgt_rssi[j],</div><div class='add'>+					     ATH12K_HTT_RX_NUM_BW_CNTRS, "\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; ATH12K_HTT_TX_UL_MUMIMO_USER_STATS; j++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "rx_ul_mumimo_fd_rssi: user_%u ", j);</div><div class='add'>+		len += print_array_to_buf_s8(buf, len, "", 0,</div><div class='add'>+					     htt_stats_buf-&gt;fd[j],</div><div class='add'>+					     ATH12K_HTT_RX_NUM_SPATIAL_STREAMS, "\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (j = 0; j &lt; ATH12K_HTT_TX_UL_MUMIMO_USER_STATS; j++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "rx_ulmumimo_pilot_evm_db_mean: user_%u ", j);</div><div class='add'>+		len += print_array_to_buf_s8(buf, len, "", 0,</div><div class='add'>+					     htt_stats_buf-&gt;db[j],</div><div class='add'>+					     ATH12K_HTT_RX_NUM_SPATIAL_STREAMS, "\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "ul_mumimo_basic_trigger_rx_qos_null_only = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;mumimo_bsc_trig_rx_qos_null_only));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_rx_fse_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				  struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_rx_fse_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_STATS_RX_FSE_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "=== Software RX FSE STATS ===\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Enable count  = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_enable_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Disable count = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_disable_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Cache invalidate entry count = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_invalidate_entry_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Full cache invalidate count = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_full_cache_invalidate_cnt));</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n=== Hardware RX FSE STATS ===\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Cache hits count = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_num_cache_hits_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Cache no. of searches = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_num_searches_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Cache occupancy peak count:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[0] = %u [1-16] = %u [17-32] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_peak_cnt[0]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_peak_cnt[1]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_peak_cnt[2]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[33-48] = %u [49-64] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_peak_cnt[3]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_peak_cnt[4]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[65-80] = %u [81-96] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_peak_cnt[5]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_peak_cnt[6]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[97-112] = %u [113-127] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_peak_cnt[7]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_peak_cnt[8]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[128] = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_peak_cnt[9]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Cache occupancy current count:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[0] = %u [1-16] = %u [17-32] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_curr_cnt[0]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_curr_cnt[1]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_curr_cnt[2]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[33-48] = %u [49-64] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_curr_cnt[3]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_curr_cnt[4]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[65-80] = %u [81-96] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_curr_cnt[5]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_curr_cnt[6]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[97-112] = %u [113-127] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_curr_cnt[7]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_curr_cnt[8]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[128] = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_cache_occupancy_curr_cnt[9]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Cache search square count:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[0] = %u [1-50] = %u [51-100] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_square_cnt[0]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_square_cnt[1]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_square_cnt[2]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[101-200] = %u [201-255] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_square_cnt[3]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_square_cnt[4]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[256] = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_square_cnt[5]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Cache search peak pending count:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[0] = %u [1-2] = %u [3-4] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_peak_cnt[0]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_peak_cnt[1]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_peak_cnt[2]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[Greater/Equal to 5] = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_peak_cnt[3]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Cache search tot pending count:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[0] = %u [1-2] = %u [3-4] = %u ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_pending_cnt[0]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_pending_cnt[1]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_pending_cnt[2]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "[Greater/Equal to 5] = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fse_search_stat_pending_cnt[3]));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_pdev_tx_rate_txbf_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_pdev_txrate_txbf_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_STATS_PDEV_TX_RATE_TXBF_STATS:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Legacy OFDM Rates: 6 Mbps: %u, ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_legacy_ofdm_rate[0]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "9 Mbps: %u, 12 Mbps: %u, ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_legacy_ofdm_rate[1]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_legacy_ofdm_rate[2]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "18 Mbps: %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_legacy_ofdm_rate[3]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "24 Mbps: %u, 36 Mbps: %u, ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_legacy_ofdm_rate[4]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_legacy_ofdm_rate[5]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "48 Mbps: %u, 54 Mbps: %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_legacy_ofdm_rate[6]),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_legacy_ofdm_rate[7]));</div><div class='add'>+</div><div class='add'>+	len += print_array_to_buf(buf, len, "tx_ol_mcs", htt_stats_buf-&gt;tx_su_ol_mcs,</div><div class='add'>+				  ATH12K_HTT_TX_BF_RATE_STATS_NUM_MCS_COUNTERS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "tx_ibf_mcs", htt_stats_buf-&gt;tx_su_ibf_mcs,</div><div class='add'>+				  ATH12K_HTT_TX_BF_RATE_STATS_NUM_MCS_COUNTERS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "tx_txbf_mcs", htt_stats_buf-&gt;tx_su_txbf_mcs,</div><div class='add'>+				  ATH12K_HTT_TX_BF_RATE_STATS_NUM_MCS_COUNTERS, "\n");</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "tx_ol_nss", 1,</div><div class='add'>+					htt_stats_buf-&gt;tx_su_ol_nss,</div><div class='add'>+					ATH12K_HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS,</div><div class='add'>+					"\n");</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "tx_ibf_nss", 1,</div><div class='add'>+					htt_stats_buf-&gt;tx_su_ibf_nss,</div><div class='add'>+					ATH12K_HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS,</div><div class='add'>+					"\n");</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "tx_txbf_nss", 1,</div><div class='add'>+					htt_stats_buf-&gt;tx_su_txbf_nss,</div><div class='add'>+					ATH12K_HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS,</div><div class='add'>+					"\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "tx_ol_bw", htt_stats_buf-&gt;tx_su_ol_bw,</div><div class='add'>+				  ATH12K_HTT_TXBF_NUM_BW_CNTRS, "\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TXBF_NUM_REDUCED_CHAN_TYPES; i++)</div><div class='add'>+		len += print_array_to_buf(buf, len, i ? "quarter_tx_ol_bw" :</div><div class='add'>+					  "half_tx_ol_bw",</div><div class='add'>+					  htt_stats_buf-&gt;ol[i],</div><div class='add'>+					  ATH12K_HTT_TXBF_NUM_BW_CNTRS,</div><div class='add'>+					  "\n");</div><div class='add'>+</div><div class='add'>+	len += print_array_to_buf(buf, len, "tx_ibf_bw", htt_stats_buf-&gt;tx_su_ibf_bw,</div><div class='add'>+				  ATH12K_HTT_TXBF_NUM_BW_CNTRS, "\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TXBF_NUM_REDUCED_CHAN_TYPES; i++)</div><div class='add'>+		len += print_array_to_buf(buf, len, i ? "quarter_tx_ibf_bw" :</div><div class='add'>+					  "half_tx_ibf_bw",</div><div class='add'>+					  htt_stats_buf-&gt;ibf[i],</div><div class='add'>+					  ATH12K_HTT_TXBF_NUM_BW_CNTRS,</div><div class='add'>+					  "\n");</div><div class='add'>+</div><div class='add'>+	len += print_array_to_buf(buf, len, "tx_txbf_bw", htt_stats_buf-&gt;tx_su_txbf_bw,</div><div class='add'>+				  ATH12K_HTT_TXBF_NUM_BW_CNTRS, "\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TXBF_NUM_REDUCED_CHAN_TYPES; i++)</div><div class='add'>+		len += print_array_to_buf(buf, len, i ? "quarter_tx_txbf_bw" :</div><div class='add'>+					  "half_tx_txbf_bw",</div><div class='add'>+					  htt_stats_buf-&gt;txbf[i],</div><div class='add'>+					  ATH12K_HTT_TXBF_NUM_BW_CNTRS,</div><div class='add'>+					  "\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_STATS_PDEV_TXBF_FLAG_RETURN_STATS:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "TXBF_reason_code_stats: 0:%u, 1:%u,",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;txbf_flag_set_mu_mode),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;txbf_flag_set_final_status));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, " 2:%u, 3:%u, 4:%u, 5:%u, ",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;txbf_flag_not_set_verified_txbf_mode),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;txbf_flag_not_set_disable_p2p_access),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;txbf_flag_not_set_max_nss_in_he160),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;txbf_flag_not_set_disable_uldlofdma));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "6:%u, 7:%u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;txbf_flag_not_set_mcs_threshold_val),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;txbf_flag_not_set_final_status));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_txbf_ofdma_ax_ndpa_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					      struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_txbf_ofdma_ax_ndpa_stats_tlv *stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 num_elements;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	num_elements = le32_to_cpu(stats_buf-&gt;num_elems_ax_ndpa_arr);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TXBF_OFDMA_AX_NDPA_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_ofdma_ndpa_queued =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_ndpa[i].ax_ofdma_ndpa_queued));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_ndpa_tried =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_ndpa[i].ax_ofdma_ndpa_tried));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_ndpa_flushed =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_ndpa[i].ax_ofdma_ndpa_flush));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_ndpa_err =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_ndpa[i].ax_ofdma_ndpa_err));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_txbf_ofdma_ax_ndp_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_txbf_ofdma_ax_ndp_stats_tlv *stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 num_elements;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	num_elements = le32_to_cpu(stats_buf-&gt;num_elems_ax_ndp_arr);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TXBF_OFDMA_AX_NDP_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_ofdma_ndp_queued =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_ndp[i].ax_ofdma_ndp_queued));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_ndp_tried =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_ndp[i].ax_ofdma_ndp_tried));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_ndp_flushed =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_ndp[i].ax_ofdma_ndp_flush));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_ndp_err =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_ndp[i].ax_ofdma_ndp_err));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_txbf_ofdma_ax_brp_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_txbf_ofdma_ax_brp_stats_tlv *stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 num_elements;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	num_elements = le32_to_cpu(stats_buf-&gt;num_elems_ax_brp_arr);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_TXBF_OFDMA_AX_BRP_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_ofdma_brpoll_queued =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_brp[i].ax_ofdma_brp_queued));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_brpoll_tied =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_brp[i].ax_ofdma_brp_tried));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_brpoll_flushed =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_brp[i].ax_ofdma_brp_flushed));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_brp_err =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_brp[i].ax_ofdma_brp_err));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_brp_err_num_cbf_rcvd =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_brp[i].ax_ofdma_num_cbf_rcvd));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_txbf_ofdma_ax_steer_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					       struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_txbf_ofdma_ax_steer_stats_tlv *stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 num_elements;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	num_elements = le32_to_cpu(stats_buf-&gt;num_elems_ax_steer_arr);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_TXBF_OFDMA_AX_STEER_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ax_ofdma_num_ppdu_steer =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_steer[i].num_ppdu_steer));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_num_usrs_prefetch =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_steer[i].num_usr_prefetch));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_num_usrs_sound =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_steer[i].num_usr_sound));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nax_ofdma_num_usrs_force_sound =");</div><div class='add'>+	for (i = 0; i &lt; num_elements; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u,", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;ax_steer[i].num_usr_force_sound));</div><div class='add'>+	len--;</div><div class='add'>+	*(buf + len) = '\0';</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_txbf_ofdma_ax_steer_mpdu_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+						    struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_txbf_ofdma_ax_steer_mpdu_stats_tlv *stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_TXBF_OFDMA_AX_STEER_MPDU_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rbo_steer_mpdus_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(stats_buf-&gt;ax_ofdma_rbo_steer_mpdus_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rbo_steer_mpdus_failed = %u\n",</div><div class='add'>+			 le32_to_cpu(stats_buf-&gt;ax_ofdma_rbo_steer_mpdus_failed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "sifs_steer_mpdus_tried = %u\n",</div><div class='add'>+			 le32_to_cpu(stats_buf-&gt;ax_ofdma_sifs_steer_mpdus_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "sifs_steer_mpdus_failed = %u\n\n",</div><div class='add'>+			 le32_to_cpu(stats_buf-&gt;ax_ofdma_sifs_steer_mpdus_failed));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ath12k_htt_print_dlpager_entry(const struct ath12k_htt_pgs_info *pg_info,</div><div class='add'>+					   int idx, char *str_buf)</div><div class='add'>+{</div><div class='add'>+	u64 page_timestamp;</div><div class='add'>+	u16 index = 0;</div><div class='add'>+</div><div class='add'>+	page_timestamp = ath12k_le32hilo_to_u64(pg_info-&gt;ts_msb, pg_info-&gt;ts_lsb);</div><div class='add'>+</div><div class='add'>+	index += snprintf(&amp;str_buf[index], ATH12K_HTT_MAX_STRING_LEN - index,</div><div class='add'>+			  "Index - %u ; Page Number - %u ; ",</div><div class='add'>+			  idx, le32_to_cpu(pg_info-&gt;page_num));</div><div class='add'>+	index += snprintf(&amp;str_buf[index], ATH12K_HTT_MAX_STRING_LEN - index,</div><div class='add'>+			  "Num of pages - %u ; Timestamp - %lluus\n",</div><div class='add'>+			  le32_to_cpu(pg_info-&gt;num_pgs), page_timestamp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_dlpager_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				   struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_dl_pager_stats_tlv *stat_buf = tag_buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 dword_lock, dword_unlock;</div><div class='add'>+	int i;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u8 pg_locked;</div><div class='add'>+	u8 pg_unlock;</div><div class='add'>+	char str_buf[ATH12K_HTT_MAX_STRING_LEN] = {};</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*stat_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dword_lock = le32_get_bits(stat_buf-&gt;info2,</div><div class='add'>+				   ATH12K_HTT_DLPAGER_TOTAL_LOCK_PAGES_INFO2);</div><div class='add'>+	dword_unlock = le32_get_bits(stat_buf-&gt;info2,</div><div class='add'>+				     ATH12K_HTT_DLPAGER_TOTAL_FREE_PAGES_INFO2);</div><div class='add'>+</div><div class='add'>+	pg_locked = ATH12K_HTT_STATS_PAGE_LOCKED;</div><div class='add'>+	pg_unlock = ATH12K_HTT_STATS_PAGE_UNLOCKED;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_DLPAGER_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ASYNC locked pages = %u\n",</div><div class='add'>+			 le32_get_bits(stat_buf-&gt;info0,</div><div class='add'>+				       ATH12K_HTT_DLPAGER_ASYNC_LOCK_PG_CNT_INFO0));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "SYNC locked pages = %u\n",</div><div class='add'>+			 le32_get_bits(stat_buf-&gt;info0,</div><div class='add'>+				       ATH12K_HTT_DLPAGER_SYNC_LOCK_PG_CNT_INFO0));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Total locked pages = %u\n",</div><div class='add'>+			 le32_get_bits(stat_buf-&gt;info1,</div><div class='add'>+				       ATH12K_HTT_DLPAGER_TOTAL_LOCK_PAGES_INFO1));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "Total free pages = %u\n",</div><div class='add'>+			 le32_get_bits(stat_buf-&gt;info1,</div><div class='add'>+				       ATH12K_HTT_DLPAGER_TOTAL_FREE_PAGES_INFO1));</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nLOCKED PAGES HISTORY\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "last_locked_page_idx = %u\n",</div><div class='add'>+			 dword_lock ? dword_lock - 1 : (ATH12K_PAGER_MAX - 1));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ATH12K_PAGER_MAX; i++) {</div><div class='add'>+		memset(str_buf, 0x0, ATH12K_HTT_MAX_STRING_LEN);</div><div class='add'>+		ath12k_htt_print_dlpager_entry(&amp;stat_buf-&gt;pgs_info[pg_locked][i],</div><div class='add'>+					       i, str_buf);</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "%s", str_buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nUNLOCKED PAGES HISTORY\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "last_unlocked_page_idx = %u\n",</div><div class='add'>+			 dword_unlock ? dword_unlock - 1 : ATH12K_PAGER_MAX - 1);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ATH12K_PAGER_MAX; i++) {</div><div class='add'>+		memset(str_buf, 0x0, ATH12K_HTT_MAX_STRING_LEN);</div><div class='add'>+		ath12k_htt_print_dlpager_entry(&amp;stat_buf-&gt;pgs_info[pg_unlock][i],</div><div class='add'>+					       i, str_buf);</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "%s", str_buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_phy_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+			       struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_phy_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf, i;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_PHY_STATS_TLV:\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_STATS_MAX_CHAINS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "bdf_nf_chain[%d] = %d\n",</div><div class='add'>+				 i, a_sle32_to_cpu(htt_stats_buf-&gt;nf_chain[i]));</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_STATS_MAX_CHAINS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "runtime_nf_chain[%d] = %d\n",</div><div class='add'>+				 i, a_sle32_to_cpu(htt_stats_buf-&gt;runtime_nf_chain[i]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "false_radar_cnt = %u / %u (mins)\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;false_radar_cnt),</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;fw_run_time));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "radar_cs_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;radar_cs_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ani_level = %d\n\n",</div><div class='add'>+			 a_sle32_to_cpu(htt_stats_buf-&gt;ani_level));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_phy_counters_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				  struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_phy_counters_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_PHY_COUNTERS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_ofdma_timing_err_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_ofdma_timing_err_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_cck_fail_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_cck_fail_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mactx_abort_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;mactx_abort_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "macrx_abort_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;macrx_abort_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phytx_abort_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phytx_abort_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phyrx_abort_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phyrx_abort_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phyrx_defer_abort_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phyrx_defer_abort_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_gain_adj_lstf_event_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_gain_adj_lstf_event_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_gain_adj_non_legacy_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_gain_adj_non_legacy_cnt));</div><div class='add'>+	len += print_array_to_buf(buf, len, "rx_pkt_cnt", htt_stats_buf-&gt;rx_pkt_cnt,</div><div class='add'>+				  ATH12K_HTT_MAX_RX_PKT_CNT, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "rx_pkt_crc_pass_cnt",</div><div class='add'>+				  htt_stats_buf-&gt;rx_pkt_crc_pass_cnt,</div><div class='add'>+				  ATH12K_HTT_MAX_RX_PKT_CRC_PASS_CNT, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "per_blk_err_cnt",</div><div class='add'>+				  htt_stats_buf-&gt;per_blk_err_cnt,</div><div class='add'>+				  ATH12K_HTT_MAX_PER_BLK_ERR_CNT, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "rx_ota_err_cnt",</div><div class='add'>+				  htt_stats_buf-&gt;rx_ota_err_cnt,</div><div class='add'>+				  ATH12K_HTT_MAX_RX_OTA_ERR_CNT, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_phy_reset_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				     struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_phy_reset_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_PHY_RESET_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "pdev_id = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;pdev_id));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "chan_mhz = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;chan_mhz));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "chan_band_center_freq1 = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;chan_band_center_freq1));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "chan_band_center_freq2 = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;chan_band_center_freq2));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "chan_phy_mode = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;chan_phy_mode));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "chan_flags = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;chan_flags));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "chan_num = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;chan_num));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "reset_cause = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;reset_cause));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "prev_reset_cause = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;prev_reset_cause));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phy_warm_reset_src = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phy_warm_reset_src));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rx_gain_tbl_mode = %d\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rx_gain_tbl_mode));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "xbar_val = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;xbar_val));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "force_calibration = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;force_calibration));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phyrf_mode = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phyrf_mode));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phy_homechan = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phy_homechan));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phy_tx_ch_mask = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phy_tx_ch_mask));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phy_rx_ch_mask = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phy_rx_ch_mask));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phybb_ini_mask = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phybb_ini_mask));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phyrf_ini_mask = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phyrf_ini_mask));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phy_dfs_en_mask = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phy_dfs_en_mask));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phy_sscan_en_mask = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phy_sscan_en_mask));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phy_synth_sel_mask = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phy_synth_sel_mask));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phy_adfs_freq = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phy_adfs_freq));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "cck_fir_settings = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;cck_fir_settings));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phy_dyn_pri_chan = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phy_dyn_pri_chan));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "cca_thresh = 0x%0x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;cca_thresh));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "dyn_cca_status = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;dyn_cca_status));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rxdesense_thresh_hw = 0x%x\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rxdesense_thresh_hw));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rxdesense_thresh_sw = 0x%x\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rxdesense_thresh_sw));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_phy_reset_counters_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_phy_reset_counters_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_PHY_RESET_COUNTERS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "pdev_id = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;pdev_id));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "cf_active_low_fail_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;cf_active_low_fail_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "cf_active_low_pass_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;cf_active_low_pass_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "phy_off_through_vreg_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;phy_off_through_vreg_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "force_calibration_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;force_calibration_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "rf_mode_switch_phy_off_cnt = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;rf_mode_switch_phy_off_cnt));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "temperature_recal_cnt = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;temperature_recal_cnt));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_phy_tpc_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				   struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_phy_tpc_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_PHY_TPC_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "pdev_id = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;pdev_id));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "tx_power_scale = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_power_scale));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "tx_power_scale_db = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;tx_power_scale_db));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "min_negative_tx_power = %d\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;min_negative_tx_power));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "reg_ctl_domain = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;reg_ctl_domain));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "twice_max_rd_power = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;twice_max_rd_power));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "max_tx_power = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;max_tx_power));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "home_max_tx_power = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;home_max_tx_power));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "psd_power = %d\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;psd_power));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "eirp_power = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;eirp_power));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "power_type_6ghz = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;power_type_6ghz));</div><div class='add'>+	len += print_array_to_buf(buf, len, "max_reg_allowed_power",</div><div class='add'>+				  htt_stats_buf-&gt;max_reg_allowed_power,</div><div class='add'>+				  ATH12K_HTT_STATS_MAX_CHAINS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "max_reg_allowed_power_6ghz",</div><div class='add'>+				  htt_stats_buf-&gt;max_reg_allowed_power_6ghz,</div><div class='add'>+				  ATH12K_HTT_STATS_MAX_CHAINS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "sub_band_cfreq",</div><div class='add'>+				  htt_stats_buf-&gt;sub_band_cfreq,</div><div class='add'>+				  ATH12K_HTT_MAX_CH_PWR_INFO_SIZE, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "sub_band_txpower",</div><div class='add'>+				  htt_stats_buf-&gt;sub_band_txpower,</div><div class='add'>+				  ATH12K_HTT_MAX_CH_PWR_INFO_SIZE, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_soc_txrx_stats_common_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					   struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_t2h_soc_txrx_stats_common_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u64 drop_count;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	drop_count = ath12k_le32hilo_to_u64(htt_stats_buf-&gt;inv_peers_msdu_drop_count_hi,</div><div class='add'>+					    htt_stats_buf-&gt;inv_peers_msdu_drop_count_lo);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_SOC_COMMON_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "soc_drop_count = %llu\n\n",</div><div class='add'>+			 drop_count);</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_per_rate_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				       struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_per_rate_stats_tlv *stats_buf = tag_buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 ru_size_cnt = 0;</div><div class='add'>+	u32 rc_mode, ru_type;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf, i;</div><div class='add'>+	const char *mode_prefix;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rc_mode = le32_to_cpu(stats_buf-&gt;rc_mode);</div><div class='add'>+	ru_type = le32_to_cpu(stats_buf-&gt;ru_type);</div><div class='add'>+</div><div class='add'>+	switch (rc_mode) {</div><div class='add'>+	case ATH12K_HTT_STATS_RC_MODE_DLSU:</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "HTT_TX_PER_STATS:\n");</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\nPER_STATS_SU:\n");</div><div class='add'>+		mode_prefix = "su";</div><div class='add'>+		break;</div><div class='add'>+	case ATH12K_HTT_STATS_RC_MODE_DLMUMIMO:</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\nPER_STATS_DL_MUMIMO:\n");</div><div class='add'>+		mode_prefix = "mu";</div><div class='add'>+		break;</div><div class='add'>+	case ATH12K_HTT_STATS_RC_MODE_DLOFDMA:</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\nPER_STATS_DL_OFDMA:\n");</div><div class='add'>+		mode_prefix = "ofdma";</div><div class='add'>+		if (ru_type == ATH12K_HTT_STATS_RU_TYPE_SINGLE_RU_ONLY)</div><div class='add'>+			ru_size_cnt = ATH12K_HTT_TX_RX_PDEV_STATS_NUM_AX_RU_SIZE_CNTRS;</div><div class='add'>+		else if (ru_type == ATH12K_HTT_STATS_RU_TYPE_SINGLE_AND_MULTI_RU)</div><div class='add'>+			ru_size_cnt = ATH12K_HTT_TX_RX_PDEV_NUM_BE_RU_SIZE_CNTRS;</div><div class='add'>+		break;</div><div class='add'>+	case ATH12K_HTT_STATS_RC_MODE_ULMUMIMO:</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "HTT_RX_PER_STATS:\n");</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\nPER_STATS_UL_MUMIMO:\n");</div><div class='add'>+		mode_prefix = "ulmu";</div><div class='add'>+		break;</div><div class='add'>+	case ATH12K_HTT_STATS_RC_MODE_ULOFDMA:</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\nPER_STATS_UL_OFDMA:\n");</div><div class='add'>+		mode_prefix = "ulofdma";</div><div class='add'>+		if (ru_type == ATH12K_HTT_STATS_RU_TYPE_SINGLE_RU_ONLY)</div><div class='add'>+			ru_size_cnt = ATH12K_HTT_TX_RX_PDEV_STATS_NUM_AX_RU_SIZE_CNTRS;</div><div class='add'>+		else if (ru_type == ATH12K_HTT_STATS_RU_TYPE_SINGLE_AND_MULTI_RU)</div><div class='add'>+			ru_size_cnt = ATH12K_HTT_TX_RX_PDEV_NUM_BE_RU_SIZE_CNTRS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nPER per BW:\n");</div><div class='add'>+	if (rc_mode == ATH12K_HTT_STATS_RC_MODE_ULOFDMA ||</div><div class='add'>+	    rc_mode == ATH12K_HTT_STATS_RC_MODE_ULMUMIMO)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "data_ppdus_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	else</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "ppdus_tried_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_PDEV_STATS_NUM_BW_CNTRS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_bw[i].ppdus_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, " %u:%u\n", i,</div><div class='add'>+			 le32_to_cpu(stats_buf-&gt;per_bw320.ppdus_tried));</div><div class='add'>+</div><div class='add'>+	if (rc_mode == ATH12K_HTT_STATS_RC_MODE_ULOFDMA ||</div><div class='add'>+	    rc_mode == ATH12K_HTT_STATS_RC_MODE_ULMUMIMO)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "non_data_ppdus_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	else</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "ppdus_ack_failed_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_PDEV_STATS_NUM_BW_CNTRS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_bw[i].ppdus_ack_failed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, " %u:%u\n", i,</div><div class='add'>+			 le32_to_cpu(stats_buf-&gt;per_bw320.ppdus_ack_failed));</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mpdus_tried_%s = ", mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_PDEV_STATS_NUM_BW_CNTRS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_bw[i].mpdus_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, " %u:%u\n", i,</div><div class='add'>+			 le32_to_cpu(stats_buf-&gt;per_bw320.mpdus_tried));</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mpdus_failed_%s = ", mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_PDEV_STATS_NUM_BW_CNTRS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u", i,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_bw[i].mpdus_failed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, " %u:%u\n", i,</div><div class='add'>+			 le32_to_cpu(stats_buf-&gt;per_bw320.mpdus_failed));</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nPER per NSS:\n");</div><div class='add'>+	if (rc_mode == ATH12K_HTT_STATS_RC_MODE_ULOFDMA ||</div><div class='add'>+	    rc_mode == ATH12K_HTT_STATS_RC_MODE_ULMUMIMO)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "data_ppdus_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	else</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "ppdus_tried_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_PDEV_STAT_NUM_SPATIAL_STREAMS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_nss[i].ppdus_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	if (rc_mode == ATH12K_HTT_STATS_RC_MODE_ULOFDMA ||</div><div class='add'>+	    rc_mode == ATH12K_HTT_STATS_RC_MODE_ULMUMIMO)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "non_data_ppdus_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	else</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "ppdus_ack_failed_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_PDEV_STAT_NUM_SPATIAL_STREAMS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_nss[i].ppdus_ack_failed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mpdus_tried_%s = ", mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_PDEV_STAT_NUM_SPATIAL_STREAMS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_nss[i].mpdus_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mpdus_failed_%s = ", mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_PDEV_STAT_NUM_SPATIAL_STREAMS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_nss[i].mpdus_failed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\nPER per MCS:\n");</div><div class='add'>+	if (rc_mode == ATH12K_HTT_STATS_RC_MODE_ULOFDMA ||</div><div class='add'>+	    rc_mode == ATH12K_HTT_STATS_RC_MODE_ULMUMIMO)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "data_ppdus_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	else</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "ppdus_tried_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TXBF_RATE_STAT_NUM_MCS_CNTRS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_mcs[i].ppdus_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	if (rc_mode == ATH12K_HTT_STATS_RC_MODE_ULOFDMA ||</div><div class='add'>+	    rc_mode == ATH12K_HTT_STATS_RC_MODE_ULMUMIMO)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "non_data_ppdus_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	else</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "ppdus_ack_failed_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TXBF_RATE_STAT_NUM_MCS_CNTRS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_mcs[i].ppdus_ack_failed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mpdus_tried_%s = ", mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TXBF_RATE_STAT_NUM_MCS_CNTRS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_mcs[i].mpdus_tried));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mpdus_failed_%s = ", mode_prefix);</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TXBF_RATE_STAT_NUM_MCS_CNTRS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %u:%u ", i,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;per_mcs[i].mpdus_failed));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	if ((rc_mode == ATH12K_HTT_STATS_RC_MODE_DLOFDMA ||</div><div class='add'>+	     rc_mode == ATH12K_HTT_STATS_RC_MODE_ULOFDMA) &amp;&amp;</div><div class='add'>+	     ru_type != ATH12K_HTT_STATS_RU_TYPE_INVALID) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\nPER per RU:\n");</div><div class='add'>+</div><div class='add'>+		if (rc_mode == ATH12K_HTT_STATS_RC_MODE_ULOFDMA)</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "data_ppdus_%s = ",</div><div class='add'>+					 mode_prefix);</div><div class='add'>+		else</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, "ppdus_tried_%s = ",</div><div class='add'>+					 mode_prefix);</div><div class='add'>+		for (i = 0; i &lt; ru_size_cnt; i++)</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, " %s:%u ",</div><div class='add'>+					 ath12k_tx_ru_size_to_str(ru_type, i),</div><div class='add'>+					 le32_to_cpu(stats_buf-&gt;ru[i].ppdus_tried));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+		if (rc_mode == ATH12K_HTT_STATS_RC_MODE_ULOFDMA)</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "non_data_ppdus_%s = ", mode_prefix);</div><div class='add'>+		else</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+					 "ppdus_ack_failed_%s = ", mode_prefix);</div><div class='add'>+		for (i = 0; i &lt; ru_size_cnt; i++)</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, " %s:%u ",</div><div class='add'>+					 ath12k_tx_ru_size_to_str(ru_type, i),</div><div class='add'>+					 le32_to_cpu(stats_buf-&gt;ru[i].ppdus_ack_failed));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "mpdus_tried_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+		for (i = 0; i &lt; ru_size_cnt; i++)</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, " %s:%u ",</div><div class='add'>+					 ath12k_tx_ru_size_to_str(ru_type, i),</div><div class='add'>+					 le32_to_cpu(stats_buf-&gt;ru[i].mpdus_tried));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "mpdus_failed_%s = ",</div><div class='add'>+				 mode_prefix);</div><div class='add'>+		for (i = 0; i &lt; ru_size_cnt; i++)</div><div class='add'>+			len += scnprintf(buf + len, buf_len - len, " %s:%u ",</div><div class='add'>+					 ath12k_tx_ru_size_to_str(ru_type, i),</div><div class='add'>+					 le32_to_cpu(stats_buf-&gt;ru[i].mpdus_failed));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\n\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rc_mode == ATH12K_HTT_STATS_RC_MODE_DLMUMIMO) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "\nlast_probed_bw  = %u\n",</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;last_probed_bw));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "last_probed_nss = %u\n",</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;last_probed_nss));</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, "last_probed_mcs = %u\n",</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;last_probed_mcs));</div><div class='add'>+		len += print_array_to_buf(buf, len, "MU Probe count per RC MODE",</div><div class='add'>+					  stats_buf-&gt;probe_cnt,</div><div class='add'>+					  ATH12K_HTT_RC_MODE_2D_COUNT, "\n\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_ast_entry_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+			       struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_ast_entry_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 mac_addr_l32;</div><div class='add'>+	u32 mac_addr_h16;</div><div class='add'>+	u32 ast_info;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mac_addr_l32 = le32_to_cpu(htt_stats_buf-&gt;mac_addr.mac_addr_l32);</div><div class='add'>+	mac_addr_h16 = le32_to_cpu(htt_stats_buf-&gt;mac_addr.mac_addr_h16);</div><div class='add'>+	ast_info = le32_to_cpu(htt_stats_buf-&gt;info);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_AST_ENTRY_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ast_index = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ast_index));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "mac_addr = %02x:%02x:%02x:%02x:%02x:%02x\n",</div><div class='add'>+			 u32_get_bits(mac_addr_l32, ATH12K_HTT_MAC_ADDR_L32_0),</div><div class='add'>+			 u32_get_bits(mac_addr_l32, ATH12K_HTT_MAC_ADDR_L32_1),</div><div class='add'>+			 u32_get_bits(mac_addr_l32, ATH12K_HTT_MAC_ADDR_L32_2),</div><div class='add'>+			 u32_get_bits(mac_addr_l32, ATH12K_HTT_MAC_ADDR_L32_3),</div><div class='add'>+			 u32_get_bits(mac_addr_h16, ATH12K_HTT_MAC_ADDR_H16_0),</div><div class='add'>+			 u32_get_bits(mac_addr_h16, ATH12K_HTT_MAC_ADDR_H16_1));</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "sw_peer_id = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;sw_peer_id));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "pdev_id = %u\n",</div><div class='add'>+			 u32_get_bits(ast_info, ATH12K_HTT_AST_PDEV_ID_INFO));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "vdev_id = %u\n",</div><div class='add'>+			 u32_get_bits(ast_info, ATH12K_HTT_AST_VDEV_ID_INFO));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "next_hop = %u\n",</div><div class='add'>+			 u32_get_bits(ast_info, ATH12K_HTT_AST_NEXT_HOP_INFO));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mcast = %u\n",</div><div class='add'>+			 u32_get_bits(ast_info, ATH12K_HTT_AST_MCAST_INFO));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "monitor_direct = %u\n",</div><div class='add'>+			 u32_get_bits(ast_info, ATH12K_HTT_AST_MONITOR_DIRECT_INFO));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mesh_sta = %u\n",</div><div class='add'>+			 u32_get_bits(ast_info, ATH12K_HTT_AST_MESH_STA_INFO));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mec = %u\n",</div><div class='add'>+			 u32_get_bits(ast_info, ATH12K_HTT_AST_MEC_INFO));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "intra_bss = %u\n\n",</div><div class='add'>+			 u32_get_bits(ast_info, ATH12K_HTT_AST_INTRA_BSS_INFO));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char*</div><div class='add'>+ath12k_htt_get_punct_dir_type_str(enum ath12k_htt_stats_direction direction)</div><div class='add'>+{</div><div class='add'>+	switch (direction) {</div><div class='add'>+	case ATH12K_HTT_STATS_DIRECTION_TX:</div><div class='add'>+		return "tx";</div><div class='add'>+	case ATH12K_HTT_STATS_DIRECTION_RX:</div><div class='add'>+		return "rx";</div><div class='add'>+	default:</div><div class='add'>+		return "unknown";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char*</div><div class='add'>+ath12k_htt_get_punct_ppdu_type_str(enum ath12k_htt_stats_ppdu_type ppdu_type)</div><div class='add'>+{</div><div class='add'>+	switch (ppdu_type) {</div><div class='add'>+	case ATH12K_HTT_STATS_PPDU_TYPE_MODE_SU:</div><div class='add'>+		return "su";</div><div class='add'>+	case ATH12K_HTT_STATS_PPDU_TYPE_DL_MU_MIMO:</div><div class='add'>+		return "dl_mu_mimo";</div><div class='add'>+	case ATH12K_HTT_STATS_PPDU_TYPE_UL_MU_MIMO:</div><div class='add'>+		return "ul_mu_mimo";</div><div class='add'>+	case ATH12K_HTT_STATS_PPDU_TYPE_DL_MU_OFDMA:</div><div class='add'>+		return "dl_mu_ofdma";</div><div class='add'>+	case ATH12K_HTT_STATS_PPDU_TYPE_UL_MU_OFDMA:</div><div class='add'>+		return "ul_mu_ofdma";</div><div class='add'>+	default:</div><div class='add'>+		return "unknown";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char*</div><div class='add'>+ath12k_htt_get_punct_pream_type_str(enum ath12k_htt_stats_param_type pream_type)</div><div class='add'>+{</div><div class='add'>+	switch (pream_type) {</div><div class='add'>+	case ATH12K_HTT_STATS_PREAM_OFDM:</div><div class='add'>+		return "ofdm";</div><div class='add'>+	case ATH12K_HTT_STATS_PREAM_CCK:</div><div class='add'>+		return "cck";</div><div class='add'>+	case ATH12K_HTT_STATS_PREAM_HT:</div><div class='add'>+		return "ht";</div><div class='add'>+	case ATH12K_HTT_STATS_PREAM_VHT:</div><div class='add'>+		return "ac";</div><div class='add'>+	case ATH12K_HTT_STATS_PREAM_HE:</div><div class='add'>+		return "ax";</div><div class='add'>+	case ATH12K_HTT_STATS_PREAM_EHT:</div><div class='add'>+		return "be";</div><div class='add'>+	default:</div><div class='add'>+		return "unknown";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_puncture_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				    struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_pdev_puncture_stats_tlv *stats_buf = tag_buf;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	const char *direction;</div><div class='add'>+	const char *ppdu_type;</div><div class='add'>+	const char *preamble;</div><div class='add'>+	u32 mac_id__word;</div><div class='add'>+	u32 subband_limit;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mac_id__word = le32_to_cpu(stats_buf-&gt;mac_id__word);</div><div class='add'>+	subband_limit = min(le32_to_cpu(stats_buf-&gt;subband_cnt),</div><div class='add'>+			    ATH12K_HTT_PUNCT_STATS_MAX_SUBBAND_CNT);</div><div class='add'>+</div><div class='add'>+	direction = ath12k_htt_get_punct_dir_type_str(le32_to_cpu(stats_buf-&gt;direction));</div><div class='add'>+	ppdu_type = ath12k_htt_get_punct_ppdu_type_str(le32_to_cpu(stats_buf-&gt;ppdu_type));</div><div class='add'>+	preamble = ath12k_htt_get_punct_pream_type_str(le32_to_cpu(stats_buf-&gt;preamble));</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_PDEV_PUNCTURE_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id__word, ATH12K_HTT_STATS_MAC_ID));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "%s_%s_%s_last_used_pattern_mask = 0x%08x\n",</div><div class='add'>+			 direction, preamble, ppdu_type,</div><div class='add'>+			 le32_to_cpu(stats_buf-&gt;last_used_pattern_mask));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; subband_limit; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "%s_%s_%s_num_subbands_used_cnt_%02d = %u\n",</div><div class='add'>+				 direction, preamble, ppdu_type, i + 1,</div><div class='add'>+				 le32_to_cpu(stats_buf-&gt;num_subbands_used_cnt[i]));</div><div class='add'>+	}</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_dmac_reset_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+				      struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_dmac_reset_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u64 time;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_DMAC_RESET_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "reset_count = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;reset_count));</div><div class='add'>+	time = ath12k_le32hilo_to_u64(htt_stats_buf-&gt;reset_time_hi_ms,</div><div class='add'>+				      htt_stats_buf-&gt;reset_time_lo_ms);</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "reset_time_ms = %llu\n", time);</div><div class='add'>+	time = ath12k_le32hilo_to_u64(htt_stats_buf-&gt;disengage_time_hi_ms,</div><div class='add'>+				      htt_stats_buf-&gt;disengage_time_lo_ms);</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "disengage_time_ms = %llu\n", time);</div><div class='add'>+</div><div class='add'>+	time = ath12k_le32hilo_to_u64(htt_stats_buf-&gt;engage_time_hi_ms,</div><div class='add'>+				      htt_stats_buf-&gt;engage_time_lo_ms);</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "engage_time_ms = %llu\n", time);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "disengage_count = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;disengage_count));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "engage_count = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;engage_count));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "drain_dest_ring_mask = 0x%x\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;drain_dest_ring_mask));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_pdev_sched_algo_ofdma_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+						 struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_pdev_sched_algo_ofdma_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 mac_id_word;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mac_id_word = le32_to_cpu(htt_stats_buf-&gt;mac_id__word);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_PDEV_SCHED_ALGO_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id_word, ATH12K_HTT_STATS_MAC_ID));</div><div class='add'>+	len += print_array_to_buf(buf, len, "rate_based_dlofdma_enabled_count",</div><div class='add'>+				  htt_stats_buf-&gt;rate_based_dlofdma_enabled_cnt,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "rate_based_dlofdma_disabled_count",</div><div class='add'>+				  htt_stats_buf-&gt;rate_based_dlofdma_disabled_cnt,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "rate_based_dlofdma_probing_count",</div><div class='add'>+				  htt_stats_buf-&gt;rate_based_dlofdma_disabled_cnt,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "rate_based_dlofdma_monitoring_count",</div><div class='add'>+				  htt_stats_buf-&gt;rate_based_dlofdma_monitor_cnt,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "chan_acc_lat_based_dlofdma_enabled_count",</div><div class='add'>+				  htt_stats_buf-&gt;chan_acc_lat_based_dlofdma_enabled_cnt,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "chan_acc_lat_based_dlofdma_disabled_count",</div><div class='add'>+				  htt_stats_buf-&gt;chan_acc_lat_based_dlofdma_disabled_cnt,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "chan_acc_lat_based_dlofdma_monitoring_count",</div><div class='add'>+				  htt_stats_buf-&gt;chan_acc_lat_based_dlofdma_monitor_cnt,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "downgrade_to_dl_su_ru_alloc_fail",</div><div class='add'>+				  htt_stats_buf-&gt;downgrade_to_dl_su_ru_alloc_fail,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "candidate_list_single_user_disable_ofdma",</div><div class='add'>+				  htt_stats_buf-&gt;candidate_list_single_user_disable_ofdma,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "dl_cand_list_dropped_high_ul_qos_weight",</div><div class='add'>+				  htt_stats_buf-&gt;dl_cand_list_dropped_high_ul_qos_weight,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "ax_dlofdma_disabled_due_to_pipelining",</div><div class='add'>+				  htt_stats_buf-&gt;ax_dlofdma_disabled_due_to_pipelining,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "dlofdma_disabled_su_only_eligible",</div><div class='add'>+				  htt_stats_buf-&gt;dlofdma_disabled_su_only_eligible,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "dlofdma_disabled_consec_no_mpdus_tried",</div><div class='add'>+				  htt_stats_buf-&gt;dlofdma_disabled_consec_no_mpdus_tried,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "dlofdma_disabled_consec_no_mpdus_success",</div><div class='add'>+				  htt_stats_buf-&gt;dlofdma_disabled_consec_no_mpdus_success,</div><div class='add'>+				  ATH12K_HTT_NUM_AC_WMM, "\n\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_tx_pdev_rate_stats_be_ofdma_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+						 struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_pdev_rate_stats_be_ofdma_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 mac_id_word;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mac_id_word = le32_to_cpu(htt_stats_buf-&gt;mac_id__word);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "HTT_TX_PDEV_RATE_STATS_BE_OFDMA_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id_word, ATH12K_HTT_STATS_MAC_ID));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_ofdma_tx_ldpc = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;be_ofdma_tx_ldpc));</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_ofdma_tx_mcs",</div><div class='add'>+				  htt_stats_buf-&gt;be_ofdma_tx_mcs,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_NUM_BE_MCS_CNTRS, "\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_ofdma_eht_sig_mcs",</div><div class='add'>+				  htt_stats_buf-&gt;be_ofdma_eht_sig_mcs,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_NUM_EHT_SIG_MCS_CNTRS, "\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "be_ofdma_tx_ru_size = ");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_RX_PDEV_NUM_BE_RU_SIZE_CNTRS; i++)</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len, " %s:%u ",</div><div class='add'>+				 ath12k_htt_be_tx_rx_ru_size_to_str(i),</div><div class='add'>+				 le32_to_cpu(htt_stats_buf-&gt;be_ofdma_tx_ru_size[i]));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+	len += print_array_to_buf_index(buf, len, "be_ofdma_tx_nss = ", 1,</div><div class='add'>+					htt_stats_buf-&gt;be_ofdma_tx_nss,</div><div class='add'>+					ATH12K_HTT_PDEV_STAT_NUM_SPATIAL_STREAMS,</div><div class='add'>+					"\n");</div><div class='add'>+	len += print_array_to_buf(buf, len, "be_ofdma_tx_bw",</div><div class='add'>+				  htt_stats_buf-&gt;be_ofdma_tx_bw,</div><div class='add'>+				  ATH12K_HTT_TX_PDEV_NUM_BE_BW_CNTRS, "\n");</div><div class='add'>+	for (i = 0; i &lt; ATH12K_HTT_TX_PDEV_NUM_GI_CNTRS; i++) {</div><div class='add'>+		len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+				 "be_ofdma_tx_gi[%u]", i);</div><div class='add'>+		len += print_array_to_buf(buf, len, "", htt_stats_buf-&gt;gi[i],</div><div class='add'>+					  ATH12K_HTT_TX_PDEV_NUM_BE_MCS_CNTRS, "\n");</div><div class='add'>+	}</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "\n");</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ath12k_htt_print_pdev_mbssid_ctrl_frame_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+						  struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_pdev_mbssid_ctrl_frame_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u32 mac_id_word;</div><div class='add'>+</div><div class='add'>+	if (tag_len &lt; sizeof(*htt_stats_buf))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mac_id_word = le32_to_cpu(htt_stats_buf-&gt;mac_id__word);</div><div class='add'>+</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "HTT_MBSSID_CTRL_FRAME_STATS_TLV:\n");</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",</div><div class='add'>+			 u32_get_bits(mac_id_word, ATH12K_HTT_STATS_MAC_ID));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "basic_trigger_across_bss = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;basic_trigger_across_bss));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "basic_trigger_within_bss = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;basic_trigger_within_bss));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "bsr_trigger_across_bss = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;bsr_trigger_across_bss));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "bsr_trigger_within_bss = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;bsr_trigger_within_bss));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mu_rts_across_bss = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;mu_rts_across_bss));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "mu_rts_within_bss = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;mu_rts_within_bss));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len, "ul_mumimo_trigger_across_bss = %u\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ul_mumimo_trigger_across_bss));</div><div class='add'>+	len += scnprintf(buf + len, buf_len - len,</div><div class='add'>+			 "ul_mumimo_trigger_within_bss = %u\n\n",</div><div class='add'>+			 le32_to_cpu(htt_stats_buf-&gt;ul_mumimo_trigger_within_bss));</div><div class='add'>+</div><div class='add'>+	stats_req-&gt;buf_len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+ath12k_htt_print_tx_pdev_rate_stats_tlv(const void *tag_buf, u16 tag_len,</div><div class='add'>+					struct debug_htt_stats_req *stats_req)</div><div class='add'>+{</div><div class='add'>+	const struct ath12k_htt_tx_pdev_rate_stats_tlv *htt_stats_buf = tag_buf;</div><div class='add'>+	u8 *buf = stats_req-&gt;buf;</div><div class='add'>+	u32 len = stats_req-&gt;buf_len;</div><div class='add'>+	u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;</div><div class='add'>+	u8 i, j;</div>